LA 7213P QHRAE Rev Compal
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A B C D E www.qdzbwx.com 1 1 QHRAE Superior 10AS/10ASG 2 2 LA-7213P REV 1.0 Schematic AMD Llano FS1 Processor / Hudson M2/M3 Whistler Pro 2011-04-30 Rev 1.0 3 3 4 4 Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C D SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet E 1 of 51 A EC SMBus B C D E www.qdzbwx.com PWM Fan HDMI-CEC page 30 AMD APU FS1 Processor PCI-Express X4 5GHz HDMI Conn. VGA HDMI page 5 page 30 1 PCI-Express X16 5GHz Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2 Dual Channel page 10,11 BANK 0, 1, 2, 3 Llano uPGA-722 35mm*35mm 1 1.5V DDRIII 1066/1333 MT/s page 5,6,7,8 LVDS Translator ANX3110 AMD GPU AMD Whistler PRO, 128bit with 1GB/2GB DDR3 AMD Whistler LP, 128bit with 1GB/2GB DDR3 (Design Ready) FCBGA-962 VGA eDP DP0, DP1 (X2) DP1 (X4) PCIe X1 X1 UMI X4 USB/B Right 1.1V 5GT/s 2.5GT/s page 27 PCIe X1 USB port 2 page 31 USB 3.0 1.1V 5GT/s Int. Camera USB port 10 page 35 USB LVDS Conn. 29mm*29mm page 12,13,14,15,16,17,18,19,20,21 Left USB USB port 0,1 page 31 USB port 5 page 28 5V 480MHz page 28 2 PCIeMini Card WLAN USB 2 5V 480MHz VGA CRT CRT USB port 8 page 32 page 29 AMD FCH Hudson M2/M3 RTL8105E 10/100M RTL8111E 1G RJ45 page 34 APU PCIe port 1 page 32 SATA port 0 5V 6GHz(600MB/s) SATA port 0 page 31 SATA port 2 SATA port 1 24.5mm*24.5mm 5V 6GHz(600MB/s) PCIe X1 SATA port 1 page 31 USB 3.0 5GHz page 22,23,24,25,26 1.1V 5GT/s 3.3V 33 MHz USB3.0 port0 page 35 USB3.0 UPD720200AF1-DAP-A PCIe X1 SPI Bus SATA port 2 page 31 SATA ODD USB 3.0 port0 1.1V 5GT/s FCH PCIe port2 page 34 2nd HDD 5V 6GHz(600MB/s) FCBGA-656 3 page 32 SATA HDD APU PCIe port 0 page 33 Cardreader JMB389C PCIeMini Card JET APU PCIe port 2 3 FCH PCIe port1 page 36 LPC Bus 3.3V 24MHz HD Audio 3.3V 33 MHz TP& Light Pipe/B LS-6061P page 39 RTC CKT. page 22 DC/DC Interface CKT. Cap Sensor & Light Sensor/B LS-6062P page 39 LED/B LS-6063P HDA Codec SPI ROM (2MB) page 24 Debug Port page 38 Touch Pad page 40 ALC269 ENE KB930 Int.KBD EC ROM (128KB) page 38 page 38 page 39 page 40 4 Power Circuit DC/DC Audio & USB/B LS-6064P page page 36 page 37 CIR page 39 Int. MIC Conn G-Sensor page 38 SPK Conn page 37 page 36 JPIO (HP &page MIC) 36 EC SMBus 4 31 page 41,42,43,44,45,46 47,48,49 Power On/Off CKT. page 39 Power/B_FPC DA300006JM0 2011/01/06 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2012/01/06 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. page 39 Date: A B C D SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet E 2 of 51 5 4 3 DESIGN CURRENT 0.1A DESIGN CURRENT 0.1A +3VL +5VL DESIGN CURRENT 5A +5VALW DESIGN CURRENT 4A +5VS DESIGN CURRENT 400mA +5VS_LED 2 www.qdzbwx.com B+ Ipeak=5A, Imax=3.5A, Iocp min=7.9A 1 SUSP N-CHANNEL SI4800 KB_LED P-CHANNEL AO-3413 D D +5VS DESIGN CURRENT 300mA +3VS_HDP DESIGN CURRENT 1.6A +5VS_ODD DESIGN CURRENT 5A +3VALW DESIGN CURRENT 330mA +3V_LAN DESIGN CURRENT 0.2A +3V DESIGN CURRENT 1.65A +1.8VSG DESIGN CURRENT 4A +3VS DESIGN CURRENT 1.5A +LCD_VDD DESIGN CURRENT 0.3A +3VSG DESIGN CURRENT 1A +2.5VS DESIGN CURRENT 5.3A +1.1VALW DESIGN CURRENT 4A +1.1VS DESIGN CURRENT 50A +CPU_CORE DESIGN CURRENT 27.5A +CPU_CORE_NB LDO G9191 ODD_PWR TPS51125A P-CHANNEL AO-3413 Ipeak=5A, Imax=3.5A, Iocp min=7.7A WOL_EN# P-CHANNEL AO-3413 SYSON P-CHANNEL AO-3413 GPU_PWREN SY8033BDBC SUSP N-CHANNEL LCD_ENVDD SI4800 C P-CHANNEL AO-3413 C PXS_PWREN P-CHANNEL AO-3413 +3VS LDO APL5508-25DC POK G5603RU1U Ipeak=5.3A, Imax=3.71A, Iocp min=6.81A SUSP N-CHANNEL FDS6676AS VR_ON Ipeak=50A, Imax=35A, Iocp min=65.21A ISL6267HRZ-T B Ipeak=27.5A, Imax=19.25A, Iocp min=34.92A B VR_ON Ipeak=6.5A, Imax=4.55A, Iocp min=8.55A DESIGN CURRENT 6.5A +1.2VS DESIGN CURRENT 20A +1.5V DESIGN CURRENT 2A +1.5VS DESIGN CURRENT 1A +1.05V DESIGN CURRENT 1.5A +0.75VS DESIGN CURRENT 11A +1.5VSG G5603RU1U SYSON G5603RU1U DIS Ipeak=20A, Imax=14A, Iocp min=24.13A UMA Ipeak=8.5A, Imax=5.95A, Iocp min=10.44A SUSP N-CHANNEL FDS6676AS +3V LDO APL5930KAI-TRG SUSP G2992F1U VGA_PWRGD N-CHANNEL FDS6676AS A A GPU_PWREN LDO VGACORE_EN DESIGN CURRENT 3A +1.0VSG DESIGN CURRENT 32.6A +VGA_CORE APL5930KAI Ipeak=32.6A, Imax=20.3A, Iocp min=36.19A RT8237CZQW Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 1 Sheet 3 of 51 A Voltage Rails B ( O MEANS ON +RTCVCC D B+ +5VL +5VALW +1.5V +3VL +3VALW +3V +1.1VALW +1.05V +VSB E www.qdzbwx.com X MEANS OFF ) power plane 1 C BTO Option Table +5VS +3VS Function +2.5VS +1.5VS description SKU HDMI SKU 1 explain UMA PowerXpress Discrete BTO IHDMI@ DHDMI@ +1.2VS +1.1VS HDMI +0.75VS COMMON HDMI@ CEC UMA PowerXpress CEC@ UMA@ UMA@+VGA@+PXS@ Discrete VGA@+DIS@ +CPU_CORE +CPU_CORE_NB +VGA_CORE State +3VSG LAN Function LAN description +1.8VSG +1.5VSG explain 10/100M GIGA BTO 8105E@ 8111E@ +1.0VSG S0 2 O O O O O O Panel explain G-SENSOR Cam & Mic 3D LVDS eDP Non-3D & EDP BTO GSENSOR@ CAM@ 3D@+NOEDP@ EDP@ NO3D@+NOEDP@ O S3 O O O O O X O O O O X X O O O X X X description O X X X X X explain PowerXpress Enable Crossfire Enable BTO PXSEN@ CROSSEN@ 2 description explain 3 Address +3VS DDR SO-DIMM 0 A0 H 1010 0000 b +3VS DDR SO-DIMM 1 A4 H 1010 0100 b +3VS WLAN +3VS 3G BTO EC SM Bus1 Address 4 HEX Address Power +3VL Smart Battery 16 H 0001 0110 b +3VS CPU Thermal Sensor 98 H 1001 1001 b +3VL HDMI-CEC 34 H 0011 0100 b +3VS GPU Thermal Sensor 41 H 0100 0001 b +3VL Cap. Sensor HEX Address Virtual I2C FCH Renesas USB3.0 PowerXpress (PXS@) Renesas USB3.0 Non-BACO Renesas USB3.0 BACO mode BACO@ NOBACO@ RENE@ GPU Hudson-M3 HUDM3R1@ PowerXpress STATE EC SM Bus2 Address Device Device PowerXpress (PXS@) Whistler Pro HUDM3R3@ WHPROR1@ FCH WHPROR3@ EC FCH EC Hudson-M2 Hudson-M3 KB-930 KB-9012 M2@ M3@ KB930@ KB9012@ 3 Power Power Chipset GPIO for PowerXpress Function Function HEX KBL@ Panel (DIS@) O Device CIR@ Cam & Mic O Power KB Light Cam & Mic O FCH SM Bus Address (SCL0/SDA0) KB Light CIR G-SENSOR O S5 S4/AC & Battery don't exist CIR G-SENSOR Function O S5 S4/ Battery only KB Light description S1 S5 S4/AC CIR Device HEX Address +3VS G-Sensor 40 H 0100 0000 b +3VS Light Sensor 52 H 0101 0010 b +3VS 3D - Bootloader C0 H 1100 0000 b +3VS 3D - Slave C0 H 1100 0000 b SIGNAL SLP_S3# SLP_S5# Full ON HIGH HIGH S1(Power On Suspend) HIGH HIGH S3 (Suspend to RAM) LOW HIGH S4 (Suspend to Disk) LOW HIGH S5 (Soft OFF) LOW LOW G3 LOW LOW 4 2011/01/06 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: A B C D Monday, July 04, 2011 Sheet E 4 of 51 A B C D 12 PCIE_GTX_C_FRX_P[0..15] PCIE_FTX_C_GRX_P[0..15] 12 12 PCIE_GTX_C_FRX_N[0..15] PCIE_FTX_C_GRX_N[0..15] 12 JAPUA E www.qdzbwx.com @ PCI EXPRESS AA2 PCIE_FTX_GRX_P0 C1 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P0 P_GFX_TXN0 AA3 PCIE_FTX_GRX_N0 C2 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N0 PCIE_GTX_C_FRX_P1 Y7 P_GFX_RXP1 P_GFX_TXP1 Y2 PCIE_FTX_GRX_P1 C3 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P1 PCIE_GTX_C_FRX_N1 Y8 P_GFX_RXN1 P_GFX_TXN1 Y1 PCIE_FTX_GRX_N1 C4 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N1 PCIE_GTX_C_FRX_P2 W5 P_GFX_RXP2 P_GFX_TXP2 Y4 PCIE_FTX_GRX_P2 C9 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P2 PCIE_GTX_C_FRX_N2 W6 P_GFX_RXN2 P_GFX_TXN2 Y5 PCIE_FTX_GRX_N2 C22 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N2 PCIE_GTX_C_FRX_P3 W8 P_GFX_RXP3 P_GFX_TXP3 W2 PCIE_FTX_GRX_P3 C23 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P3 PCIE_GTX_C_FRX_N3 W9 P_GFX_RXN3 P_GFX_TXN3 W3 PCIE_FTX_GRX_N3 C24 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N3 PCIE_GTX_C_FRX_P4 V7 P_GFX_RXP4 P_GFX_TXP4 V2 PCIE_FTX_GRX_P4 C25 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P4 PCIE_GTX_C_FRX_N4 V8 P_GFX_RXN4 P_GFX_TXN4 V1 PCIE_FTX_GRX_N4 C26 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N4 PCIE_GTX_C_FRX_P5 U5 P_GFX_RXP5 P_GFX_TXP5 V4 PCIE_FTX_GRX_P5 C27 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P5 PCIE_GTX_C_FRX_N5 U6 P_GFX_RXN5 P_GFX_TXN5 V5 PCIE_FTX_GRX_N5 C28 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N5 PCIE_GTX_C_FRX_P6 U8 P_GFX_TXP6 U2 PCIE_FTX_GRX_P6 C29 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P6 P_GFX_TXN6 U3 PCIE_FTX_GRX_N6 C30 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N6 P_GFX_TXP7 T2 PCIE_FTX_GRX_P7 C31 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P7 P_GFX_TXN7 T1 PCIE_FTX_GRX_N7 C32 1 2 VGA@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N7 PCIE_FTX_GRX_P8 C33 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P8 P_GFX_RXP6 PCIE_GTX_C_FRX_N6 U9 P_GFX_RXN6 PCIE_GTX_C_FRX_P7 T7 P_GFX_RXP7 PCIE_GTX_C_FRX_N7 T8 PCIE_GTX_C_FRX_P8 R5 P_GFX_RXP8 P_GFX_TXP8 T4 PCIE_GTX_C_FRX_N8 R6 P_GFX_RXN8 P_GFX_TXN8 T5 PCIE_FTX_GRX_N8 C34 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N8 PCIE_GTX_C_FRX_P9 R8 P_GFX_RXP9 P_GFX_TXP9 R2 PCIE_FTX_GRX_P9 C35 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P9 PCIE_GTX_C_FRX_N9 R9 P_GFX_RXN9 P_GFX_TXN9 R3 PCIE_FTX_GRX_N9 C36 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N9 PCIE_GTX_C_FRX_P10 P7 P_GFX_RXP10 P_GFX_TXP10 P2 PCIE_FTX_GRX_P10 C37 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P10 PCIE_GTX_C_FRX_N10 P8 P_GFX_RXN10 P_GFX_TXN10 P1 PCIE_FTX_GRX_N10 C38 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N10 PCIE_GTX_C_FRX_P11 N5 P_GFX_RXP11 P_GFX_TXP11 P4 PCIE_FTX_GRX_P11 C39 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P11 PCIE_GTX_C_FRX_N11 N6 P_GFX_RXN11 P_GFX_TXN11 P5 PCIE_FTX_GRX_N11 C40 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N11 PCIE_GTX_C_FRX_P12 N8 P_GFX_RXP12 P_GFX_TXP12 N2 PCIE_FTX_GRX_P12 C41 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P12 PCIE_GTX_C_FRX_N12 N9 P_GFX_RXN12 P_GFX_TXN12 N3 PCIE_FTX_GRX_N12 C42 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N12 PCIE_GTX_C_FRX_P13 M7 P_GFX_RXP13 P_GFX_TXP13 M2 PCIE_FTX_GRX_P13 C43 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P13 PCIE_GTX_C_FRX_N13 M8 P_GFX_RXN13 P_GFX_TXN13 M1 PCIE_FTX_GRX_N13 C44 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N13 PCIE_GTX_C_FRX_P14 L5 P_GFX_RXP14 P_GFX_TXP14 M4 PCIE_FTX_GRX_P14 C45 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P14 PCIE_GTX_C_FRX_N14 L6 P_GFX_RXN14 P_GFX_TXN14 M5 PCIE_FTX_GRX_N14 C46 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N14 PCIE_GTX_C_FRX_P15 L8 P_GFX_RXP15 P_GFX_TXP15 L2 PCIE_FTX_GRX_P15 C47 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_P15 PCIE_GTX_C_FRX_N15 L9 P_GFX_RXN15 P_GFX_TXN15 L3 PCIE_FTX_GRX_N15 C48 1 2 DIS@ 0.1U_0402_16V7K PCIE_FTX_C_GRX_N15 P_GFX_RXN7 1 For PowerXpress Place R1 ~ R8 close to C33 ~ C40 PCIE_FRX_C_LANTX_P0 AC5 P_GPP_RXP0 P_GPP_TXP0 AD4 PCIE_FTX_LANRX_P0 C49 1 2 0.1U_0402_16V7K PCIE_FTX_C_LANRX_P0 33 33 PCIE_FRX_C_LANTX_N0 PCIE_FRX_C_LANTX_N0 AC6 P_GPP_RXN0 P_GPP_TXN0 AD5 PCIE_FTX_LANRX_N0 C50 1 2 0.1U_0402_16V7K PCIE_FTX_C_LANRX_N0 33 P_GPP_TXP1 AC2 PCIE_FTX_WLANRX_P1 C51 1 2 0.1U_0402_16V7K PCIE_FTX_C_WLANRX_P1 32 P_GPP_TXN1 AC3 PCIE_FTX_WLANRX_N1 C52 1 2 0.1U_0402_16V7K PCIE_FTX_C_WLANRX_N1 32 P_GPP_RXN1 PCIE_FRX_JETTX_P2 AB7 P_GPP_RXP2 P_GPP_TXP2 AB2 PCIE_FTX_JETRX_P2 C53 1 2 0.1U_0402_16V7K PCIE_FTX_C_JETRX_P2 32 PCIE_FRX_JETTX_N2 AB8 P_GPP_RXN2 P_GPP_TXN2 AB1 PCIE_FTX_JETRX_N2 C54 1 2 0.1U_0402_16V7K PCIE_FTX_C_JETRX_N2 32 AA5 P_GPP_RXP3 P_GPP_TXP3 AB4 AA6 P_GPP_RXN3 P_GPP_TXN3 AB5 AF8 P_UMI_RXP0 P_UMI_TXP0 AF1 UMI_FTX_MRX_P0 C55 P_UMI_TXN0 AF2 UMI_FTX_MRX_N0 C56 UMI_MTX_C_FRX_N0 22 UMI_MTX_C_FRX_N0 22 UMI_MTX_C_FRX_P1 22 UMI_MTX_C_FRX_N1 22 UMI_MTX_C_FRX_P2 22 UMI_MTX_C_FRX_N2 22 UMI_MTX_C_FRX_P3 UMI_MTX_C_FRX_P1 AE6 P_UMI_RXP1 UMI_MTX_C_FRX_N1 AE5 P_UMI_RXN1 UMI_MTX_C_FRX_P2 AE9 UMI_MTX_C_FRX_N2 AE8 UMI_MTX_C_FRX_P3 AD8 UMI_MTX_C_FRX_N3 AD7 P_ZVDDP 2 196_0402_1% K5 1 2 0.1U_0402_16V7K R4 1 IHDMI@ 2 0_0402_5% UMA_HDMI_TX1- 30 PCIE_FTX_GRX_P10 R5 1 IHDMI@ 2 0_0402_5% UMA_HDMI_TX0+ 30 PCIE_FTX_GRX_N10 R6 1 IHDMI@ 2 0_0402_5% UMA_HDMI_TX0- 30 PCIE_FTX_GRX_P11 R7 1 IHDMI@ 2 0_0402_5% UMA_HDMI_TXC+ 30 PCIE_FTX_GRX_N11 R8 1 IHDMI@ 2 0_0402_5% UMA_HDMI_TXC- 30 LAN 3 WLAN FAN Control Circuit JET 1 2 0.1U_0402_16V7K R18 10K_0402_5% UMI_FTX_C_MRX_N0 22 AF5 UMI_FTX_MRX_P1 C57 1 2 0.1U_0402_16V7K UMI_FTX_C_MRX_P1 22 AF4 UMI_FTX_MRX_N1 C58 1 2 0.1U_0402_16V7K UMI_FTX_C_MRX_N1 22 P_UMI_RXP2 P_UMI_TXP2 AE3 UMI_FTX_MRX_P2 C59 1 2 0.1U_0402_16V7K UMI_FTX_C_MRX_P2 22 P_UMI_RXN2 P_UMI_TXN2 AE2 UMI_FTX_MRX_N2 C60 1 2 0.1U_0402_16V7K UMI_FTX_C_MRX_N2 22 P_UMI_RXP3 P_UMI_TXP3 AD1 UMI_FTX_MRX_P3 C61 1 2 0.1U_0402_16V7K UMI_FTX_C_MRX_P3 22 P_UMI_TXN3 AD2 UMI_FTX_MRX_N3 C62 1 2 0.1U_0402_16V7K K4 P_ZVSS P_ZVSS UMA_HDMI_TX1+ 30 PCIE_FTX_GRX_N9 1 R10 JFAN UMI_FTX_C_MRX_P0 22 P_UMI_TXP1 P_ZVDDP 0_0402_5% +3VS P_UMI_TXN1 P_UMI_RXN3 R3 1 IHDMI@ 2 UMI_FTX_C_MRX_N3 22 37 FAN_SPEED1 1 +5VS 2 +FAN1 2 0_0603_5% 1 R15 +FAN1 C13 0.01U_0402_25V7K @ Close to Connector D7 1 C10 10U_0805_10V6K 1 @ 1 2 2 1SS355TE-17_SOD323-2 D8 C12 BAS16_SOT23-3 AMD_TOPEDO_FS-1 2 1 C11 1 2 4 Compal Electronics, Inc. Compal Secret Data 2011/01/06 Issued Date 1 2 3 4 ACES_85204-0400N @ +5VS 2 196_0402_1% Security Classification 1 2 3 4 FANPWM FANPWM 40 mils 1A 2 37 1000P_0402_50V7K 1 R9 P_UMI_RXN0 UMA_HDMI_TX2- 30 PCIE_FTX_GRX_P9 10U_0805_10V6K 22 UMI_MTX_C_FRX_N3 AF7 UMA_HDMI_TX2+ 30 0_0402_5% 2 UMI_MTX_C_FRX_P0 22 UMI_MTX_C_FRX_P0 +1.2VS AC9 0_0402_5% R2 1 IHDMI@ 2 1 32 PCIE_FRX_JETTX_N2 P_GPP_RXP1 PCIE_FRX_WLANTX_N1 R1 1 IHDMI@ 2 2 32 PCIE_FRX_JETTX_P2 AC8 GPP 32 PCIE_FRX_WLANTX_P1 PCIE_FRX_WLANTX_P1 PCIE_FTX_GRX_P8 PCIE_FTX_GRX_N8 2 33 PCIE_FRX_C_LANTX_P0 32 PCIE_FRX_WLANTX_N1 4 P_GFX_TXP0 P_GFX_RXN0 UMI-LINK 3 P_GFX_RXP0 AA9 1 2 AA8 PCIE_GTX_C_FRX_N0 GRAPHICS 1 PCIE_GTX_C_FRX_P0 2012/01/06 Deciphered Date Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: A B C D Sheet Monday, July 04, 2011 E 5 of 51 A B C D E www.qdzbwx.com 10 DDR_A_DQS[0..7] 11 DDR_B_DQS[0..7] 10 DDR_A_DQS#[0..7] 11 DDR_B_DQS#[0..7] 1 1 JAPUB 10 DDR_A_MA[0..15] 10 10 10 10 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 DDR_A_DM[0..7] 2 10 10 10 10 DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK1 DDR_A_CLK1# 10 DDR_A_CKE0 10 DDR_A_CKE1 10 DDR_A_ODT0 10 DDR_A_ODT1 10 DDR_A_SCS0# 10 DDR_A_SCS1# 3 10 DDR_A_RAS# 10 DDR_A_CAS# 10 DDR_A_WE# 10 MEM_MA_RST# 10 MEM_MA_EVENT# MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 U24 U21 L23 MA_BANK0 MA_BANK1 MA_BANK2 DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7 E14 J17 E21 F25 AD27 AC23 AD19 AC15 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7 G14 H14 G18 H18 J21 H21 E27 E26 AE26 AD26 AB22 AA22 AB18 AA18 AA14 AA15 MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK1 DDR_A_CLK1# T21 T22 R23 R24 MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1 DDR_A_CKE0 DDR_A_CKE1 H28 H27 MA_CKE0 MA_CKE1 DDR_A_ODT0 DDR_A_ODT1 Y25 AA27 MA_ODT0 MA_ODT1 DDR_A_SCS0# DDR_A_SCS1# V22 AA26 MA_CS_L0 MA_CS_L1 DDR_A_RAS# DDR_A_CAS# DDR_A_WE# V21 W24 W23 MA_RAS_L MA_CAS_L MA_WE_L MEM_MA_RST# MEM_MA_EVENT# H25 T24 MA_RESET_L MA_EVENT_L W20 M_VREF W21 M_ZVDDIO 1 R33 15mil 2 M_ZVDDIO 39.2_0402_1% JAPUC MEMORY CHANNEL A U20 R20 R21 P22 P21 N24 N23 N20 N21 M21 U23 M22 L24 AA25 L21 L20 +MEM_VREF +1.5V @ MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 E13 J13 H15 J15 H13 F13 F15 E15 DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 H17 F17 E19 J19 G16 H16 H19 F19 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 H20 F21 J23 H23 G20 E20 G22 H22 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 G24 E25 G27 G26 F23 H24 E28 F27 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 AB28 AC27 AD25 AA24 AE28 AD28 AB26 AC25 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 Y23 AA23 Y21 AA20 AB24 AD24 AA21 AC21 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 AA19 AC19 AC17 AA17 AB20 Y19 AD18 AD17 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63 AA16 Y15 AA13 AC13 Y17 AB16 AB14 Y13 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_A_D[0..63] 10 11 DDR_B_MA[0..15] 11 11 11 11 11 11 11 11 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 DDR_B_DM[0..7] DDR_B_CLK0 DDR_B_CLK0# DDR_B_CLK1 DDR_B_CLK1# 11 DDR_B_CKE0 11 DDR_B_CKE1 11 DDR_B_ODT0 11 DDR_B_ODT1 11 DDR_B_SCS0# 11 DDR_B_SCS1# 11 DDR_B_RAS# 11 DDR_B_CAS# 11 DDR_B_WE# 11 MEM_MB_RST# 11 MEM_MB_EVENT# @ MEMORY CHANNEL B DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 T27 P24 P25 N27 N26 M28 M27 M24 M25 L26 U26 L27 K27 W26 K25 K24 MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 U27 T28 K28 MB_BANK0 MB_BANK1 MB_BANK2 DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7 D14 A18 A22 C25 AF25 AG22 AH18 AD14 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7 C15 B15 E18 D18 E22 D22 B26 A26 AG24 AG25 AG21 AF21 AG17 AG18 AH14 AG14 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 DDR_B_CLK0 DDR_B_CLK0# DDR_B_CLK1 DDR_B_CLK1# R26 R27 P27 P28 MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1 DDR_B_CKE0 DDR_B_CKE1 J26 J27 MB_CKE0 MB_CKE1 DDR_B_ODT0 DDR_B_ODT1 W27 Y28 MB_ODT0 MB_ODT1 DDR_B_SCS0# DDR_B_SCS1# V25 Y27 MB_CS_L0 MB_CS_L1 DDR_B_RAS# DDR_B_CAS# DDR_B_WE# V24 V27 V28 MB_RAS_L MB_CAS_L MB_WE_L MEM_MB_RST# MEM_MB_EVENT# J25 T25 MB_RESET_L MB_EVENT_L MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 A14 B14 D16 E16 B13 C13 B16 A16 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 C17 B18 B20 A20 E17 B17 B19 C19 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 C21 B22 C23 A24 D20 B21 E23 B23 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 E24 B25 B27 D28 B24 D24 D26 C27 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 AG26 AH26 AF23 AG23 AG27 AF27 AH24 AE24 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 AE22 AH22 AE20 AH20 AD23 AD22 AD21 AD20 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 AF19 AE18 AE16 AH16 AG20 AG19 AF17 AD16 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63 AG15 AD15 AG13 AD13 AG16 AF15 AE14 AF13 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 DDR_B_D[0..63] 11 2 3 AMD_TOPEDO_FS-1 AMD_TOPEDO_FS-1 0.75V Reference Voltage +1.5V 2 EVENT# pull high +1.5V 4 4 R31 1K_0402_1% 2 1K_0402_5% MEM_MA_EVENT# 1 2 1K_0402_5% MEM_MB_EVENT# 1 1 R12 +MEM_VREF 2 R11 15mil 1 R32 1K_0402_1% 1000P_0402_50V7K 2 1 C64 0.1U_0402_16V7K 2011/01/06 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2012/01/06 Deciphered Date Title SCHEMATIC, MB A7213 1 2 C63 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: A B C D Sheet Monday, July 04, 2011 E 6 of 51 B C223 1 C79 1 DP0_TXN0 DP0_AUXN DP0_AUXN C80 1 2 0.1U_0402_16V7K UMA@ 2 0.1U_0402_16V7K UMA@ DP0_TXP1 E3 DP0_TXP1 DP1_AUXP E5 DP1_AUXP C81 1 DP0_TXN1 E2 DP0_TXN1 DP1_AUXN E6 DP1_AUXN C82 1 D2 DP0_TXP2 DP2_AUXP J5 D1 DP0_TXN2 1 C2 DP0_TXP3 C3 DP0_TXN3 Close to APU To FCH 24 ML_VGA_TXP2 24 ML_VGA_TXN2 24 ML_VGA_TXP3 24 ML_VGA_TXN3 100MHz (SS) 1 C73 1 C74 1 C75 1 C76 1 C77 1 C78 1 SB-TSI APU_RST# 1 1000P_0402_50V7K 2 C258 C83 APU_PWRGD 1 1000P_0402_50V7K 2 +1.5VS 2 1K_0402_5% APU_SVC_R @ 2 1K_0402_5% APU_SVD_R 1 2 300_0402_5% APU_RST# R48 1 2 300_0402_5% APU_PWRGD DP4_HPD G7 DP4_HPD DP5_HPD F7 DP5_HPD DP_BLON C6 DP_ENBKL DP_DIGON C5 DP_ENVDD DP_VARY_BL C7 DP_INT_PWM DP_AUX_ZVSS D8 DP_AUX_ZVSS CLKIN_H AH6 CLKIN_L APU_DISP_CLKP AH4 DISP_CLKIN_H APU_DISP_CLKN AH3 DISP_CLKIN_L 2 0_0402_5% APU_SVC_R B8 SVC 2 0_0402_5% APU_SVD_R A8 SVD 22 APU_PWRGD H12 T6 TEST14 APU_RST# AF10 RESET_L TEST15 E9 T7 APU_PWRGD AE10 PWROK TEST16 G9 T8 TEST TDI A12 TDO A11 TCK T18 D12 TMS T19 B12 TRST_L T20 B11 DBRDY T21 C11 DBREQ_L 2 0_0402_5% R212 1 2 0_0402_5% T1 2 0_0402_5% VDDNB_SENSE T4 2 0_0402_5% VDD_SENSE T5 VSS_SENSE C8 VDDP_SENSE A9 VDDNB_SENSE B10 C9 A10 2 1K_0402_5% 1 2 1K_0402_5% APU_TCK 2 1K_0402_5% APU_TMS R116 1 2 1K_0402_5% APU_TRST# R117 1 2 300_0402_5% APU_DBREQ# 2 300_0402_5% R191 1 R130 1 2 1K_0402_5% R131 1 2 1K_0402_5% TEST20 F12 APU_TEST20 R136 1 2 1K_0402_5% TEST21 E11 APU_TEST21 R137 1 2 1K_0402_5% TEST22 D11 APU_TEST22 R142 1 2 1K_0402_5% TEST23 F10 TEST24 G12 APU_TEST24 R152 1 2 1K_0402_5% FS1R1 RSVD R192 1 2 39.2_0402_1% R196 1 2 10K_0402_5% R49 @ 1 2 1K_0402_5% UMA_HDMI_CLK R55 1 IHDMI@ 2 1K_0402_5% UMA_HDMI_DATA R57 1 IHDMI@ 2 1K_0402_5% 2 +3VS R44 10K_0402_5% R43 1K_0402_5% R46 1 2 10K_0402_5% APU_PROCHOT# AH10 TEST25_H TEST25_L AH9 TEST25_L TEST28_H K7 K8 TEST30_H AA12 T11 TEST30_L AB12 T12 H_PROCHOT# 37,42,49 +1.5V R52 1K_0402_5% R51 10K_0402_5% APU_THERMTRIP# 3 3 Q5 1 H_THERMTRIP# 23 HDT Debug conn +1.5V JHDT M_TEST AB11 T13 AA11 T14 TEST35 D10 Q41 3 MMBT3904_NL_SOT23-3 TEST28_L K22 R45 10K_0402_5% 1 Thermal Shutdown Temperature: 125 degree APU_TRST# FS1R1 will be low for non-FS1 APU Y11 FS1R1 AB10 DMA_ACTIVE# DMA_ACTIVE# 22 VDD_SENSE VDDR_SENSE 2 39.2_0402_1% 2 1K_0402_5% T9 TEST25_H FS1R1 @ MMBT3904_NL_SOT23-3 APU_TEST19 TEST31 2 300_0402_5% @ +1.5V M_TEST TEST4 THERMDA AE12 T15 TEST5 THERMDC AD12 T16 1 R122 1 R123 1 R124 2 10K_0402_5% 2 10K_0402_5% 2 10K_0402_5% Llano do not support internal thermal die @ 1 1 2 2 APU_TCK 3 3 4 4 APU_TMS 5 5 6 6 APU_TDI 7 7 8 8 T22 9 9 10 10 T23 11 11 12 12 13 13 14 14 T24 T28 APU_DBREQ# 15 15 16 16 17 17 18 18 T29 19 19 20 20 T50 4 SAMTE_ASP-136446-07-B R40 1 2 1K_0402_5% APU_SIC R41 1 2 1K_0402_5% APU_SID R42 1 2 1K_0402_5% APU_ALERT# R107 1 2 1K_0402_5% APU_SVC_R R108 1 2 1K_0402_5% APU_SVD_R 2011/01/06 Issued Date Avoid leakage issue Compal Electronics, Inc. Compal Secret Data Security Classification 2012/01/06 Deciphered Date Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B Rev B 4019D8 Date: A R155 1 APU_TDI R100 1 R97 TEST35 1 AMD_TOPEDO_FS-1 +1.5V 1 2 510_0402_1% +1.5VS R109 1 22 APU_PROCHOT# APU_TEST18 DMAACTIVE_L 4 Close to JHDT R160 1 +3VALW 2 1K_0402_5% G11 TEST35 VDDIO_SENSE TEST25_H 2 150_0402_1% H11 TEST32_L B9 1 TEST19 TEST32_H VSS_SENSE R61 TEST18 RSVD_3 SENSE 1 2 510_0402_1% HDMI H9 RSVD_1 RSVD_2 CRT TEST17 ALERT_L T17 R156 1 DP_INT_PWM 9 R129 1 D9 AC11 R95 AA10 H10 T10 TEST25_L +1.5V TEST6 TEST12 C12 LVDS DP1_HPD 9 1 100K_0402_5% 1 100K_0402_5% 1 100K_0402_5% DP_ENVDD 9 SID THERMTRIP_L 2 UMA@ 1 1.8K_0402_5% DMA_ACTIVE# AG11 AH12 R37 R128 1 2 R105 2 R70 2 R102 DP_ENBKL 9 APU_SID AG12 DP0_HPD 9 DMA_ACTIVE# TEST9 APU_ALERT# 2 UMA@ 1 1.8K_0402_5% DP1_AUXN +1.5V TEST10 APU_THERMTRIP# UMA_HDMI_DATA 30 DP4_HPD 9 SIC PROCHOT_L R36 +1.5V VDDIO level Need level shifter Avoid leakage issue AH11 AD10 UMA_HDMI_CLK 30 DP5_HPD APU_SIC APU_PROCHOT# 2 UMA@ 1 1.8K_0402_5% DP1_AUXP To FCH DP3_HPD G10 K21 +1.5V DP3_HPD DP3_HPD 22 APU_RST# 49 APU_VDD_SENSE DP2_HPD DP1_TXN3 APU_SID R215 1 J7 DP1_TXP3 9,23 R214 1 DP2_HPD G3 APU_SIC 49 APU_VDDNB_SENSE DP1_HPD DP1_TXN3 E8 49 APU_VDD_RUN_FB_L DP0_HPD E7 H7 9,23 R58 D7 DP1_HPD G2 Reserve test point for debug use 49 APU_VDDNB_RUN_FB_L DP0_HPD DP1_TXP3 AH7 2 UMA@ 1 1.8K_0402_5% R35 C R47 F5 2 0.1U_0402_16V7K UMA@ 2 0.1U_0402_16V7K UMA@ APU_CLKN R34 DP0_AUXN ML_VGA_AUXN 24 E @ 1 DP5_AUXN DP1_TXP2 APU_CLKP ML_VGA_AUXP 24 DP0_AUXP B 1 DP5_AUXP H1 T3 R39 UMA_HDMI_DATA H2 2 0.1U_0402_16V7K R38 G6 F4 DP1_TXN2 JTAG 3 DP4_AUXN DP1_TXP2 DP1_TXN2 DP0_AUXN_C 27 DP2_HPD @ 1 C199 UMA_HDMI_CLK 2 0.1U_0402_16V7K UMA@ 2 0.1U_0402_16V7K UMA@ 24 APU_ALERT# Close to R38 and R39 G5 DP1_TXN1 22 APU_DISP_CLKN R217 1 H5 DP4_AUXP DP1_TXP1 22 APU_DISP_CLKP APU_SVD DP1_TXN0 DP3_AUXN J2 APU_CLKN APU_SVC K1 2 0.1U_0402_16V7K UMA@ 2 0.1U_0402_16V7K UMA@ To LVDS Translator AUX 2~5 are for GFX interface use, they could be selected to DDC or AUX logic J3 APU_CLKP 49 DP1_TXN0 DP3_AUXP DP1_TXN1 22 49 DP1_TXP0 www.qdzbwx.com DP0_AUXP_C 27 +1.2VS DP1_TXP1 22 R216 1 K2 J6 H4 2 0.1U_0402_16V7K UMA@ 2 0.1U_0402_16V7K UMA@ 2 100MHz (NSS) DP1_TXP0 DISPLAY PORT 1 24 ML_VGA_TXN1 C72 2 0.1U_0402_16V7K UMA@ 2 0.1U_0402_16V7K UMA@ CLK 24 ML_VGA_TXP1 1 SER. 24 ML_VGA_TXN0 C71 CTRL 24 ML_VGA_TXP0 DP2_AUXN 2 0.1U_0402_16V7K UMA@ 2 0.1U_0402_16V7K UMA@ 1 DP0_TXN1_C DP0_AUXP D5 2 27 D4 1 C189 1 DP0_AUXP DP0_TXP0 2 DP0_TXP1_C F1 2 B 27 F2 DP0_TXN0 E DP0_TXN0_C DP0_TXP0 C 27 2 0.1U_0402_16V7K UMA@ 2 0.1U_0402_16V7K UMA@ 1 1 2 2 1 C70 2 C69 E 2 DP0_TXP0_C DISPLAY PORT MISC. 27 D Close to APU @ DISPLAY PORT 0 To LVDS Translator C JAPUD 1 Close to APU 1 A C D Monday, July 04, 2011 Sheet E 7 of 51 A B C D E www.qdzbwx.com CPU BOTTOM SIDE DECOUPLING JAPUF +CPU_CORE C132 + 2 1 + 2 1 + 2 330U_D2_2V_Y 2 2 1 2 1 2 C98 1 2 C99 1 2 C100 1 2 C101 1 2 180P_0402_50V8J 2 1 C97 180P_0402_50V8J 2 1 C96 0.22U_0402_6.3V6K 2 1 C95 0.22U_0402_6.3V6K 2 1 C94 0.22U_0402_6.3V6K 2 1 C93 0.22U_0402_6.3V6K 1 C92 0.22U_0402_6.3V6K 2 C91 1 2 1 2 C104 1 + C106 2 390U_2.5V_M_R10 1 2 C105 1 2 If the VSS plane is cut to create a VDDIO plane, place across the VDDIO and VSS plane split VDDP Decoupling +1.2VS C124 C123 1 2 1 2 C125 1 2 C126 1 2 C127 1 2 C128 1 2 C129 1 2 0.22U_0402_6.3V6K 1 + 2 A7 A13 A15 A17 A19 A21 A23 A25 B7 C4 C10 C14 C16 C18 C20 C22 C24 C26 C28 D13 D15 D17 D19 D21 D23 D25 D27 E4 E10 E12 F9 F11 F14 F16 F18 F20 F22 F24 F26 F28 G4 G8 G13 G15 G17 G19 G21 G23 G25 J4 J8 J18 J20 J22 J24 K19 L4 L7 L10 M9 M11 M19 N4 N7 N10 N18 P9 P11 P19 R4 R7 R10 R18 T9 @ C163 C201 390U_2.5V_M_R10 2 1 1 390U_2.5V_M_R10 2 1 C160 180P_0402_50V8J 2 1 C159 180P_0402_50V8J 2 1 0.22U_0402_6.3V6K 1 180P_0402_50V8J 1 + C130 2 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS @ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS T11 T19 U4 U7 U10 U18 V9 V11 V19 W4 W7 W10 W12 W14 W16 W18 Y9 Y22 AA4 AA7 AB9 AB13 AB15 AB17 AB19 AB21 AB23 AB25 AB27 AC4 AC7 AC10 AC12 AC14 AC16 AC18 AC20 AC22 AC24 AC26 AC28 AD9 AD11 AE4 AE7 AE13 AE15 AE17 AE19 AE21 AE23 AE25 AE27 AF3 AF6 AF9 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28 AG10 AH5 AH8 AH13 AH15 AH17 AH19 AH21 AH23 AH25 1 2 3 390U_2.5V_M_R10 AMD_TOPEDO_FS-1 VDDR Decoupling 0.75A C120 C111 C107 2 2 C117 C108 1 2 1 2 C118 C109 1 2 1 2 +1.2VS CRB Decoupling Capacitor (include PWM side)： C110 1 2 VDD: 470uF x 6 22uF x 9 0.22uF x 2 0.01uF x 3 180pF x 2 4.7U_0603_6.3V6K 1 1 4.7U_0603_6.3V6K 2 2 C116 4.7U_0603_6.3V6K 1 1 4.7U_0603_6.3V6K 2 2 C115 0.22U_0402_6.3V6K 2 1 1 C113 0.22U_0402_6.3V6K 2 4 1 C112 0.22U_0402_6.3V6K 1 0.22U_0402_6.3V6K C114 2 C122 1000P_0402_50V7K 2 1 1000P_0402_50V7K 2 1 1000P_0402_50V7K C119 1 1000P_0402_50V7K C198 AMD_TOPEDO_FS-1 180P_0402_50V8J @ C121 180P_0402_50V8J 2 + 2 1 330U_D2_2V_Y + 2 1 C148 330U_D2_2V_Y + 2 1 C147 330U_D2_2V_Y 2 1 C146 330U_D2_2V_Y 2 1 C145 180P_0402_50V8J 2 1 C144 180P_0402_50V8J 2 1 C143 0.01U_0402_16V7K 2 1 C142 0.01U_0402_16V7K 2 1 C141 0.01U_0402_16V7K 1 C140 0.22U_0402_6.3V6K 2 0.22U_0402_6.3V6K 1 C139 C158 180P_0402_50V8J 2 1 C155 4.7U_0603_6.3V6K C102 180P_0402_50V8J 2 2 22U_0805_6.3V6M C90 0.22U_0402_6.3V6K 1 1 C138 +1.5V 180P_0402_50V8J 2 C164 1 C154 0.22U_0402_6.3V6K 2 180P_0402_50V8J 2 +2.5VS_VDDA 3300P_0402_50V7K 2 C165 1 0.22U_0402_6.3V6K + 1 4.7U_0603_6.3V6K C196 @ 100U_B2_4VM_R35M 1 3A 22U_0805_6.3V6M 1 10U_0603_6.3V6M L1 FBM_L11_201209_300LMA30T_0805 C170 1 2 A5 A6 B5 B6 2 C153 4.7U_0603_6.3V6K C88 0.22U_0402_6.3V6K +2.5VS VDDR VDDR VDDR VDDR 2 0.22U_0402_6.3V6K C89 10U_0603_6.3V6M +1.2VS VDDP_B_2 VDDP_B_3 VDDP_B_4 A3 A4 B3 B4 1 C136 +1.5V 10U_0603_6.3V6M 3 3.5AVDDP_B_1 C137 22U_0805_6.3V6M 2 1 0.22U_0402_6.3V6K VDDA VDDA 2 1 C152 180P_0402_50V8J AE11 AF11 1 C149 C151 C103 +1.2VS 2 4.7U_0603_6.3V6K VDDR VDDR VDDR VDDR +1.5V VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO 4A 1 22U_0805_6.3V6M AG6 AG7 AG8 AG9 R22 R25 R28 T20 T23 T26 U22 U25 U28 V20 V23 V26 W22 W25 W28 Y24 Y26 AA28 22U_0805_6.3V6M VDDP_A_1 VDDP_A_2 VDDP_A_3 VDDP_A_4 +CPU_CORE_NB C150 180P_0402_50V8J AG2 AG3 AG4 AG5 K11 K12 K13 K14 K16 K17 K18 L18 C134 +CPU_CORE_NB 180P_0402_50V8J VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB 2 4.7U_0603_6.3V6K +1.5V G28 H26 J28 K20 K23 K26 L22 L25 L28 M20 M23 M26 N22 N25 N28 P20 P23 P26 22.5A 2 1 22U_0805_6.3V6M VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB 2 C135 22U_0805_6.3V6M J9 J10 J11 J12 J14 J16 K9 K10 2 22U_0805_6.3V6M 2 50A C131 T6 T10 T18 U1 U11 U19 V3 V6 V10 V18 W1 W11 W13 W15 W17 W19 Y3 Y6 Y10 Y12 Y14 Y16 Y18 Y20 AA1 AB3 AB6 AC1 AD3 AD6 AE1 1 22U_0805_6.3V6M +CPU_CORE_NB 1 +CPU_CORE VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 22U_0805_6.3V6M VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 1 22U_0805_6.3V6M C1 D3 D6 E1 F3 F6 F8 G1 H3 H6 H8 J1 K3 K6 L1 L11 L19 M3 M6 M10 M18 N1 N11 N19 P3 P6 P10 P18 R1 R11 R19 T3 1 22U_0805_6.3V6M +CPU_CORE @ 22U_0805_6.3V6M JAPUE C133 VDDIO: 680uF x 1 330uF x 1 22uF x 2 4.7uF x 4 0.22uF x 8 180pF x 4 VDDP/R_PWM: 470uF x 2 10uF x 1 2011/01/06 VDDP: 10uF x 3 0.22uF x 2 180pF x 2 VDDR: 4.7uF x 4 0.22uF x 4 1nF x 4 180pF x 4 VDDA: 100uF x 1 4.7uF x 1 0.22uF x 1 3.3nF x 1 4 Compal Electronics, Inc. Compal Secret Data Security Classification Issued Date VDDNB: 470uF x 4 22uF x 6 0.22uF x 2 180pF x 3 2012/01/06 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: A B C D Monday, July 04, 2011 Sheet E 8 of 51 5 4 3 2 www.qdzbwx.com Panel ENBKL HPD 1 +3VS +3VS 1 Q14A 2N7002DW-T/R7_SOT363-6 @ 2 1 C DP0_HPD 7 1 R66 DP_ENBKL 2 E @ R65 100K_0402_5% 1 +3VS C @ Q15 MMBT3904_NL_SOT23-3 2 2 2.2K_0402_5% B 3 7 1 @ 2 UMA@ 1 R207 100K_0402_5% D APU_ENBKL 28 6 1 2 1 2 @ R67 100K_0402_5% E LVDS_HPD LVDS_HPD 2 UMA@ Q26 3 1 MMBT3904_NL_SOT23-3 From Translator or Conn 27 B R54 1 2 10K_0402_5% UMA@ Translator HPD UMA@ R60 4.7K_0402_5% 2 D @ R68 4.7K_0402_5% 2 1 +1.5VS UMA@ R59 10K_0402_5% 1 +1.5VS 2 2 2 From FCH E UMA@ Q16 3 1 MMBT3904_NL_SOT23-3 FCH_CRT_HPD DP1_HPD 7 C 24 FCH_CRT_HPD UMA@ R63 4.7K_0402_5% B R154 1 2 10K_0402_5% UMA@ CRT HPD 1 UMA@ R62 10K_0402_5% 2 UMA@ 1 R64 100K_0402_5% Panel ENVDD +3VS C C 1 +3VS 2 3 1 APU_ENVDD 28 E 5 C DP4_HPD 7 1 R71 E 3 DP_ENVDD 2 2 2.2K_0402_5% B 2 7 C @ Q28 MMBT3904_NL_SOT23-3 4 @ 2 IHDMI@ 1 R199 100K_0402_5% Q14B 2N7002DW-T/R7_SOT363-6 @ 1 HDMI_HPD @ R75 4.7K_0402_5% 2 2 2 IHDMI@ Q27 3 1 MMBT3904_NL_SOT23-3 From HDMI Conn 23,30 HDMI_HPD IHDMI@ R210 4.7K_0402_5% B R267 1 2 10K_0402_5% IHDMI@ HDMI HPD @ R74 100K_0402_5% 1 IHDMI@ R208 10K_0402_5% 2 1 +1.5VS 1 @ R69 100K_0402_5% B B Panel PWM SB-TSI +3VS 1 R89 2 2 UMA@ R76 4.7K_0402_5% Q42 G 2 G Q25 2 2 2.2K_0402_5% B E 1 7 DP_INT_PWM 3 BSH111_SOT23-3 UMA@ Q35 2N7002_SOT23-3 2 G S C UMA@ Q21 MMBT3904_NL_SOT23-3 EC_SMB_DA2 13,32,37,38,39 UMA@ D 3 1 1 3 D BSH111_SOT23-3 1 2 2 G APU_SID_Q S D 3 Q37 1 2 APU_INVT_PWM 27,28 S 1 APU_SID UMA@ R93 47K_0402_5% 2 2 R219 2.2K_0402_5% 2.2K_0402_5% G 7,23 UMA@ R92 47K_0402_5% 1 1 2 R218 Q22 1 Vgs of BSH111 : Min = 0.4V Max = 1.3V +1.5VS Need to confirm R93 value 4.7K or 47K A 3 3 1 A EC_SMB_CK2 13,32,37,38,39 D BSH111_SOT23-3 APU_SIC_Q S S 1 APU_SIC D 7,23 BSH111_SOT23-3 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 2012/01/06 Deciphered Date Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: 5 4 3 2 Sheet Monday, July 04, 2011 1 9 of 51 4 +1.5V JDDRH DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_D18 DDR_A_D19 DDR_A_D24 DDR_A_D25 DDR_A_DM3 6 DDR_A_BS2 DDR_A_CKE0 DDR_A_BS2 DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 6 6 DDR_A_CLK0 DDR_A_CLK0# 6 DDR_A_BS0 6 6 DDR_A_WE# DDR_A_CAS# DDR_A_CLK0 DDR_A_CLK0# DDR_A_MA10 DDR_A_BS0 DDR_A_WE# DDR_A_CAS# DDR_A_MA13 DDR_A_SCS1# 6 DDR_A_SCS1# DDR_A_D32 DDR_A_D33 DDR_A_D40 DDR_A_D41 DDR_A_DM5 DDR_A_D42 DDR_A_D43 DDR_A_D48 DDR_A_D49 DDR_A_DQS#6 DDR_A_DQS6 DDR_A_D50 DDR_A_D51 DDR_A_D56 DDR_A_D57 DDR_A_DM7 C181 2 2 1 1 1 C182 +0.75VS R91 10K_0402_5% 2 +3VS 2.2U_0603_6.3V6K A 0.1U_0402_16V4Z DDR_A_D58 DDR_A_D59 R90 1 2 10K_0402_5% 205 207 GND1 GND2 BOSS1 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 GND2 BOSS1 206 208 BOSS2 6 6 6 6 6 DDR_A_D12 DDR_A_D13 DDR_A_DM1 MEM_MA_RST# D MEM_MA_RST# 6 DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D21 +1.5V DDR_A_DM2 R79 1K_0402_1% DDR_A_D22 DDR_A_D23 DDR_A_D28 DDR_A_D29 +VREF_DQA DDR_A_DQS#3 DDR_A_DQS3 C65 1 C156 1 C157 R81 1K_0402_1% 1 @ DDR_A_D30 DDR_A_D31 DDR_A_CKE1 DDR_A_CKE1 6 DDR_A_MA15 DDR_A_MA14 2 2 2 Reserve for EMI request +1.5V C Close to JDDRH.1 1 C286 2 33P_0402_50V8J 1 C287 2 33P_0402_50V8J 1 C291 2 33P_0402_50V8J 1 C295 2 33P_0402_50V8J +1.5V 1 C316 2 33P_0402_50V8J 1 C324 2 33P_0402_50V8J 1 C325 2 33P_0402_50V8J DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 DDR_A_CLK1 DDR_A_CLK1# DDR_A_BS1 DDR_A_RAS# DDR_A_SCS0# DDR_A_ODT0 DDR_A_ODT1 DDR_A_CLK1 6 DDR_A_CLK1# 6 DDR_A_BS1 6 DDR_A_RAS# 6 DDR_A_SCS0# 6 DDR_A_ODT0 6 R80 1K_0402_1% DDR_A_ODT1 6 +VREF_CAA DDR_A_D36 DDR_A_D37 C66 1 C162 1 C161 1 DDR_A_DM4 DDR_A_D38 DDR_A_D39 DDR_A_D44 DDR_A_D45 DDR_A_DQS#5 DDR_A_DQS5 DDR_A_D46 DDR_A_D47 R82 1K_0402_1% @ 2 2 2.2U_0603_6.3V6K DDR_A_D34 DDR_A_D35 CKE1 VDD A15 A14 VDD A11 A7 VDD A6 A4 VDD A2 A0 VDD CK1 CK1# VDD BA1 RAS# VDD S0# ODT0 VDD ODT1 NC VDD VREF_CA VSS DQ36 DQ37 VSS DM4 VSS DQ38 DQ39 VSS DQ44 DQ45 VSS DQS5# DQS5 VSS DQ46 DQ47 VSS DQ52 DQ53 VSS DM6 VSS DQ54 DQ55 VSS DQ60 DQ61 VSS DQS7# DQS7 VSS DQ62 DQ63 VSS EVENT# SDA SCL VTT DDR_A_DM[0..7] 0.1U_0402_16V7K B CKE0 VDD NC BA2 VDD A12/BC# A9 VDD A8 A5 VDD A3 A1 VDD CK0 CK0# VDD A10/AP BA0 VDD WE# CAS# VDD A13 S1# VDD TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT DDR_A_MA[0..15] DDR_A_D6 DDR_A_D7 1000P_0402_50V7K DDR_A_DQS#4 DDR_A_DQS4 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 DDR_A_D[0..63] 2.2U_0603_6.3V6K DDR_A_CKE0 DDR_A_DQS#0 DDR_A_DQS0 0.1U_0402_16V7K C 6 www.qdzbwx.com DDR_A_DQS#[0..7] 1000P_0402_50V7K DDR_A_D26 DDR_A_D27 DDR_A_DQS[0..7] 1 DDR_A_D10 DDR_A_D11 DDR3 SO-DIMM A Standard Type 2 DDR_A_DQS#1 DDR_A_DQS1 DDR_A_D4 DDR_A_D5 1 DDR_A_D8 DDR_A_D9 D 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 2 DDR_A_D2 DDR_A_D3 VSS DQ4 DQ5 VSS DQS0# DQS0 VSS DQ6 DQ7 VSS DQ12 DQ13 VSS DM1 RESET# VSS DQ14 DQ15 VSS DQ20 DQ21 VSS DM2 VSS DQ22 DQ23 VSS DQ28 DQ29 VSS DQS3# DQS3 VSS DQ30 DQ31 VSS 2 +1.5V C218 1 Layout Note: Place near JDDRH.203 and 204 2 390U_2.5V_M_R10 Close to JDDRH.126 DDR_A_D52 DDR_A_D53 DDR_A_DM6 DDR_A_D54 DDR_A_D55 DDR_A_D60 DDR_A_D61 DDR_A_DQS#7 DDR_A_DQS7 DDR_A_D62 DDR_A_D63 MEM_MA_EVENT# FCH_SDATA0 FCH_SCLK0 B Layout Note: Place near JDDRH + DDR_A_DM0 VREF_DQ VSS DQ0 DQ1 VSS DM0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 VSS DQ26 DQ27 VSS 1 1 DDR_A_D0 DDR_A_D1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 2 2 +VREF_DQA 3 1 +1.5V 2 5 C166 1 2 0.1U_0402_16V4Z C168 1 2 0.1U_0402_16V4Z C171 1 2 0.1U_0402_16V4Z C174 1 2 0.1U_0402_16V4Z C173 1 2 0.1U_0402_16V4Z C176 1 2 0.1U_0402_16V4Z C179 1 2 0.1U_0402_16V4Z C178 1 2 0.1U_0402_16V4Z C186 1 2 0.1U_0402_16V4Z C185 1 2 0.1U_0402_16V4Z C205 1 2 0.1U_0402_16V4Z C180 1 2 0.1U_0402_16V4Z +0.75VS +1.5V @ C85 1 2 0.1U_0402_16V4Z C84 1 2 4.7U_0603_6.3V6K A MEM_MA_EVENT# 6 FCH_SDATA0 11,23,32 FCH_SCLK0 11,23,32 +0.75VS Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date LOTES_AAA-DDR-111-K01_204P @ Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: 5 4 3 2 Monday, July 04, 2011 Sheet 1 10 of 51 B C +1.5V DDR_B_D16 DDR_B_D17 DDR_B_DQS#2 DDR_B_DQS2 DDR_B_D18 DDR_B_D19 DDR_B_D24 DDR_B_D25 DDR_B_DM3 DDR_B_D26 DDR_B_D27 DDR_B_BS2 DDR_B_BS2 DDR_B_MA12 DDR_B_MA9 DDR_B_MA8 DDR_B_MA5 DDR_B_MA3 DDR_B_MA1 6 6 DDR_B_CLK0 DDR_B_CLK0# DDR_B_CLK0 DDR_B_CLK0# 6 DDR_B_BS0 6 6 DDR_B_WE# DDR_B_CAS# DDR_B_MA10 DDR_B_BS0 DDR_B_WE# DDR_B_CAS# DDR_B_MA13 DDR_B_SCS1# 6 DDR_B_SCS1# DDR_B_D37 DDR_B_D36 DDR_B_D40 DDR_B_D41 DDR_B_DM5 DDR_B_D42 DDR_B_D43 DDR_B_D48 DDR_B_D49 DDR_B_DQS#6 DDR_B_DQS6 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_DM7 DDR_B_D58 DDR_B_D59 R98 1 2 10K_0402_5% 4 +3VS C207 @ 2 2 1 C208 2 @ 0.1U_0402_16V4Z +0.75VS R99 10K_0402_5% 205 207 GND1 GND2 BOSS1 1 2.2U_0603_6.3V6K 1 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 GND2 BOSS1 206 208 BOSS2 DDR_B_DM1 MEM_MB_RST# 1 MEM_MB_RST# 6 DDR_B_D14 DDR_B_D15 DDR_B_D20 DDR_B_D21 +1.5V DDR_B_DM2 DDR_B_D22 DDR_B_D23 R83 1K_0402_1% DDR_B_D28 DDR_B_D29 DDR_B_DQS#3 DDR_B_DQS3 +VREF_DQB DDR_B_D30 DDR_B_D31 DDR_B_CKE1 C67 DDR_B_CKE1 6 DDR_B_MA15 DDR_B_MA14 DDR_B_MA11 DDR_B_MA7 1 2 C184 1 2 C183 1 R84 1K_0402_1% @ 2 2 Close to JDDRL.1 DDR_B_MA6 DDR_B_MA4 DDR_B_MA2 DDR_B_MA0 DDR_B_CLK1 DDR_B_CLK1# DDR_B_BS1 DDR_B_RAS# DDR_B_SCS0# DDR_B_ODT0 DDR_B_ODT1 DDR_B_CLK1 6 DDR_B_CLK1# 6 +1.5V DDR_B_BS1 6 DDR_B_RAS# 6 DDR_B_SCS0# 6 DDR_B_ODT0 6 R86 1K_0402_1% DDR_B_ODT1 6 +VREF_CAB DDR_B_D32 DDR_B_D33 C68 1 C188 1 C187 1 DDR_B_DM4 DDR_B_D38 DDR_B_D39 DDR_B_D44 DDR_B_D45 DDR_B_DQS#5 DDR_B_DQS5 DDR_B_D46 DDR_B_D47 R94 1K_0402_1% @ 2 2 2.2U_0603_6.3V6K DDR_B_D34 DDR_B_D35 CKE1 VDD A15 A14 VDD A11 A7 VDD A6 A4 VDD A2 A0 VDD CK1 CK1# VDD BA1 RAS# VDD S0# ODT0 VDD ODT1 NC VDD VREF_CA VSS DQ36 DQ37 VSS DM4 VSS DQ38 DQ39 VSS DQ44 DQ45 VSS DQS5# DQS5 VSS DQ46 DQ47 VSS DQ52 DQ53 VSS DM6 VSS DQ54 DQ55 VSS DQ60 DQ61 VSS DQS7# DQS7 VSS DQ62 DQ63 VSS EVENT# SDA SCL VTT 6 6 DDR_B_D12 DDR_B_D13 0.1U_0402_16V7K 3 CKE0 VDD NC BA2 VDD A12/BC# A9 VDD A8 A5 VDD A3 A1 VDD CK0 CK0# VDD A10/AP BA0 VDD WE# CAS# VDD A13 S1# VDD TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT 6 DDR_B_DM[0..7] 1000P_0402_50V7K DDR_B_DQS#4 DDR_B_DQS4 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 DDR_B_D6 DDR_B_D7 2.2U_0603_6.3V6K 6 DDR_B_CKE0 6 DDR_B_MA[0..15] 0.1U_0402_16V7K DDR_B_CKE0 DDR_B_D[0..63] DDR_B_DQS#0 DDR_B_DQS0 1000P_0402_50V7K 2 6 6 DDR_B_DQS[0..7] 1 DDR_B_D10 DDR_B_D11 DDR_B_DQS#[0..7] 2 DDR_B_DQS#1 DDR_B_DQS1 DDR_B_D4 DDR_B_D5 1 DDR_B_D8 DDR_B_D9 1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 1 DDR_B_D2 DDR_B_D3 VSS DQ4 DQ5 VSS DQS0# DQS0 VSS DQ6 DQ7 VSS DQ12 DQ13 VSS DM1 RESET# VSS DQ14 DQ15 VSS DQ20 DQ21 VSS DM2 VSS DQ22 DQ23 VSS DQ28 DQ29 VSS DQS3# DQS3 VSS DQ30 DQ31 VSS 2 DDR_B_DM0 VREF_DQ VSS DQ0 DQ1 VSS DM0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 VSS DQ26 DQ27 VSS 1 DDR_B_D0 DDR_B_D1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 E www.qdzbwx.com DDR3 SO-DIMM B Standard Type JDDRL +VREF_DQB D 2 +1.5V 2 Layout Note: Place near JDDRH.203 and 204 +1.5V Close to JDDRL.126 DDR_B_D52 DDR_B_D53 DDR_B_DM6 DDR_B_D50 DDR_B_D51 DDR_B_D60 DDR_B_D61 DDR_B_DQS#7 DDR_B_DQS7 DDR_B_D62 DDR_B_D63 MEM_MB_EVENT# FCH_SDATA0 FCH_SCLK0 3 Layout Note: Place near JDDRH 2 A C167 1 2 0.1U_0402_16V4Z C169 1 2 0.1U_0402_16V4Z C172 1 2 0.1U_0402_16V4Z C175 1 2 0.1U_0402_16V4Z C195 1 2 0.1U_0402_16V4Z C177 1 2 0.1U_0402_16V4Z C190 1 2 0.1U_0402_16V4Z C191 1 2 0.1U_0402_16V4Z C194 1 2 0.1U_0402_16V4Z C192 1 2 0.1U_0402_16V4Z C206 1 2 0.1U_0402_16V4Z C193 1 2 0.1U_0402_16V4Z +0.75VS +1.5V @ C87 1 2 0.1U_0402_16V4Z C86 1 2 4.7U_0603_6.3V6K 4 MEM_MB_EVENT# 6 FCH_SDATA0 10,23,32 FCH_SCLK0 10,23,32 +0.75VS Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date LOTES_AAA-DDR-111-K01_204P @ Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: A B C D Monday, July 04, 2011 Sheet E 11 of 51 PCIE_FTX_C_GRX_P[0..15] PCIE_GTX_C_FRX_P[0..15] PCIE_FTX_C_GRX_N[0..15] PCIE_GTX_C_FRX_N[0..15] PCIE_GTX_C_FRX_P[0..15] 5 PCIE_GTX_C_FRX_N[0..15] 5 E www.qdzbwx.com VGA_INVT_PWM UV1G WHPROR3@ WHPROR3@ LVDS CONTROL PCIE_TX0P PCIE_TX0N PCIE_GTX_FRX_P0 PCIE_GTX_FRX_N0 CV1 CV2 1 1 2 VGA@ 0.1U_0402_16V7K 2 VGA@ 0.1U_0402_16V7K Y35 W36 PCIE_RX1P PCIE_RX1N PCIE_TX1P PCIE_TX1N W33 W32 PCIE_GTX_FRX_P1 PCIE_GTX_FRX_N1 CV3 CV4 1 1 2 VGA@ 0.1U_0402_16V7K 2 VGA@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P1 PCIE_GTX_C_FRX_N1 PCIE_FTX_C_GRX_P2 PCIE_FTX_C_GRX_N2 W38 V37 PCIE_RX2P PCIE_RX2N PCIE_TX2P PCIE_TX2N U33 U32 PCIE_GTX_FRX_P2 PCIE_GTX_FRX_N2 CV5 CV6 1 1 2 VGA@ 0.1U_0402_16V7K 2 VGA@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P2 PCIE_GTX_C_FRX_N2 PCIE_FTX_C_GRX_P3 PCIE_FTX_C_GRX_N3 V35 U36 PCIE_RX3P PCIE_RX3N PCIE_TX3P PCIE_TX3N U30 U29 PCIE_GTX_FRX_P3 PCIE_GTX_FRX_N3 CV7 CV8 1 1 2 VGA@ 0.1U_0402_16V7K 2 VGA@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P3 PCIE_GTX_C_FRX_N3 U38 T37 PCIE_RX4P PCIE_RX4N PCIE_TX4P PCIE_TX4N T33 T32 PCIE_GTX_FRX_P4 PCIE_GTX_FRX_N4 CV9 1 CV10 1 2 VGA@ 0.1U_0402_16V7K 2 VGA@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P4 PCIE_GTX_C_FRX_N4 PCIE_FTX_C_GRX_P5 PCIE_FTX_C_GRX_N5 T35 R36 PCIE_RX5P PCIE_RX5N PCIE_TX5P PCIE_TX5N T30 T29 PCIE_GTX_FRX_P5 PCIE_GTX_FRX_N5 CV11 1 CV12 1 2 VGA@ 0.1U_0402_16V7K 2 VGA@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P5 PCIE_GTX_C_FRX_N5 PCIE_FTX_C_GRX_P6 PCIE_FTX_C_GRX_N6 R38 P37 PCIE_TX6P PCIE_TX6N P33 P32 PCIE_GTX_FRX_P6 PCIE_GTX_FRX_N6 CV13 1 CV14 1 2 VGA@ 0.1U_0402_16V7K 2 VGA@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P6 PCIE_GTX_C_FRX_N6 PCIE_FTX_C_GRX_P7 PCIE_FTX_C_GRX_N7 P35 N36 PCIE_TX7P PCIE_TX7N P30 P29 PCIE_GTX_FRX_P7 PCIE_GTX_FRX_N7 CV15 1 CV16 1 2 VGA@ 0.1U_0402_16V7K 2 VGA@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P7 PCIE_GTX_C_FRX_N7 PCIE_RX7P PCIE_RX7N PCIE_FTX_C_GRX_P8 PCIE_FTX_C_GRX_N8 N38 M37 PCIE_RX8P PCIE_RX8N PCIE_TX8P PCIE_TX8N N33 N32 PCIE_GTX_FRX_P8 PCIE_GTX_FRX_N8 CV17 1 CV18 1 2 DIS@ 0.1U_0402_16V7K 2 DIS@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P8 PCIE_GTX_C_FRX_N8 PCIE_FTX_C_GRX_P9 PCIE_FTX_C_GRX_N9 M35 L36 PCIE_TX9P PCIE_TX9N N30 N29 PCIE_GTX_FRX_P9 PCIE_GTX_FRX_N9 CV19 1 CV20 1 2 DIS@ 0.1U_0402_16V7K 2 DIS@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P9 PCIE_GTX_C_FRX_N9 PCIE_RX9P PCIE_RX9N PCIE_FTX_C_GRX_P10 PCIE_FTX_C_GRX_N10 L38 K37 PCIE_RX10P PCIE_RX10N PCIE_TX10P PCIE_TX10N L33 L32 PCIE_GTX_FRX_P10 PCIE_GTX_FRX_N10 CV21 1 CV22 1 2 DIS@ 0.1U_0402_16V7K 2 DIS@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P10 PCIE_GTX_C_FRX_N10 PCIE_FTX_C_GRX_P11 PCIE_FTX_C_GRX_N11 K35 J36 PCIE_RX11P PCIE_RX11N PCIE_TX11P PCIE_TX11N L30 L29 PCIE_GTX_FRX_P11 PCIE_GTX_FRX_N11 CV23 1 CV24 1 2 DIS@ 0.1U_0402_16V7K 2 DIS@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P11 PCIE_GTX_C_FRX_N11 PCIE_FTX_C_GRX_P12 PCIE_FTX_C_GRX_N12 J38 H37 PCIE_RX12P PCIE_RX12N PCIE_TX12P PCIE_TX12N K33 K32 PCIE_GTX_FRX_P12 PCIE_GTX_FRX_N12 CV25 1 CV26 1 2 DIS@ 0.1U_0402_16V7K 2 DIS@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P12 PCIE_GTX_C_FRX_N12 PCIE_FTX_C_GRX_P13 PCIE_FTX_C_GRX_N13 H35 G36 PCIE_RX13P PCIE_RX13N PCIE_TX13P PCIE_TX13N J33 J32 PCIE_GTX_FRX_P13 PCIE_GTX_FRX_N13 CV27 1 CV28 1 2 DIS@ 0.1U_0402_16V7K 2 DIS@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P13 PCIE_GTX_C_FRX_N13 PCIE_FTX_C_GRX_P14 PCIE_FTX_C_GRX_N14 G38 F37 PCIE_RX14P PCIE_RX14N PCIE_TX14P PCIE_TX14N K30 K29 PCIE_GTX_FRX_P14 PCIE_GTX_FRX_N14 CV29 1 CV30 1 2 DIS@ 0.1U_0402_16V7K 2 DIS@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P14 PCIE_GTX_C_FRX_N14 PCIE_FTX_C_GRX_P15 PCIE_FTX_C_GRX_N15 F35 E37 PCIE_RX15P PCIE_RX15N PCIE_TX15P PCIE_TX15N H33 H32 PCIE_GTX_FRX_P15 PCIE_GTX_FRX_N15 CV31 1 CV32 1 2 DIS@ 0.1U_0402_16V7K 2 DIS@ 0.1U_0402_16V7K PCIE_GTX_C_FRX_P15 PCIE_GTX_C_FRX_N15 PCIE_RX6P PCIE_RX6N PCI EXPRESS INTERFACE PCIE_FTX_C_GRX_P4 PCIE_FTX_C_GRX_N4 AJ38 AK37 TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N AH35 AJ36 TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N AG38 AH37 TXOUT_U3P TXOUT_U3N AF35 AG36 For PowerXpress TXCLK_LP_DPE3P TXCLK_LN_DPE3N AP34 AR34 TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N AW37 AU35 TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N AR37 AU39 TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N AP35 AR35 TXOUT_L3P TXOUT_L3N AN36 AP37 VGA_RST# +3VSG PXS@ 1 2 CV262 0.1U_0402_16V4Z 3 PXS_RST# 22,27,32,33 APU_PCIE_RST# PCIE_REFCLKP PCIE_REFCLKN AA30 NC#1 NC#2 PWRGOOD 2 RV10 100K_0402_5% @ PCIE_CALRP Y30 VGA_PCIE_CALRP RV2 1 VGA@ 2 1.27K_0402_1% PCIE_CALRN Y29 VGA_PCIE_CALRN RV3 1 VGA@ 2 2K_0402_1% 2 AJ21 AK21 AH16 Remove LVDS channel 216-0772000-PRO_FCBGA962 CALIBRATION 2 VGA@ 1 RV1 10K_0402_5% Remove FHD 3D Panel 1 AB35 AA36 TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N LVTMDP CLOCK CLK_PEG_VGA CLK_PEG_VGA# AK35 AL36 VGA_INVT_PWM 28 VGA_ENVDD 28 1 22 22 CLK_PEG_VGA 22 CLK_PEG_VGA# TXCLK_UP_DPF3P TXCLK_UN_DPF3N VGA_INVT_PWM VGA_ENVDD PCIE_GTX_C_FRX_P0 PCIE_GTX_C_FRX_N0 PCIE_FTX_C_GRX_P1 PCIE_FTX_C_GRX_N1 2 3 PCIE_RX0P PCIE_RX0N Y33 Y32 AK27 AJ27 1 IN1 2 IN2 UV2 O VGA_RST# 4 SN74AHC1G08DCKR_SC70-5 PXS@ 1 1 AA38 Y37 VARY_BL DIGON 5 PCIE_FTX_C_GRX_P0 PCIE_FTX_C_GRX_N0 @ 1 2 RV4 10K_0402_5% 1 DIS@ 2 RV5 10K_0402_5% VGA_ENVDD RV13 100K_0402_5% @ 1 DIS@ 2 RV12 0_0402_5% 2 UV1A D P 5 PCIE_FTX_C_GRX_N[0..15] C 3 5 PCIE_FTX_C_GRX_P[0..15] B G A +1.0VSG PERSTB 216-0772000-PRO_FCBGA962 4 4 Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: A B C D Sheet Monday, July 04, 2011 E 12 of 51 C TX_DEEMPH_EN GPIO1 1 1 PCI Express Transmitter De-emphasis Enable (Internal PD) 0: Tx de-emphasis diabled 1: Tx de-emphasis enabled 1 GPIO22 GPIO13,12,11 (config 2,1,0) : (Internal PD) memory apertures a) If BIOS_ROM_EN = 1, then Config[2:0] defines CONFIG[3:0] the ROM type. 128 MB 000 b) If BIOS_ROM_EN = 0, then Config[2:0] defines 256 MB 001 * 64 MB 010 the primary memory aperture size. 32 MB 011 Enable external BIOS ROM device (Internal PD) 1: Enable 0: Diable AUD[1] HSYNC 00: No audio function; 10: Audio for DisplayPort only; 01: Audio for DisplayPort and HDMI if adapter is detected AUD[0] VSYNC 11: Audio for both DisplayPort and HDMI GPIO2 0= Advertises the PCI-E device as 2.5 GT/s capable at power-on 1= Advertises the PCI-E device as 5.0 GT/s capable at power-on 5.0 GT/s capability will be controlled by software CONFIG[2] GPIO13 CONFIG[1] GPIO12 CONFIG[0] GPIO11 BIOS_ROM_EN BIF_GEN2_EN DPA VRAM_ID0 VRAM_ID1 VRAM_ID2 VRAM_ID3 001 0 11 0 H2SYNC (GENLK_CLK) Internal use only. THIS PAD HAS AN INTERNAL GPIO8 PULL-DOWN AND MUST BE 0 V AT RESET. The pad may be left unconnected GPIO21 RESERVED NC AR8 AU8 AP8 AW8 AR3 AR1 AU1 AU3 AW3 AP6 AW5 AU5 AR6 AW6 AU6 AT7 AV7 AN7 AV9 AT9 AR10 AW10 AU10 AP10 AV11 AT11 AR12 AW12 AU12 AP12 DVPCNTL_MVP_0 DVPCNTL_MVP_1 DVPCNTL_0 DVPCNTL_1 DVPCNTL_2 DVPCLK DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8 DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23 DPB DPC DPD +3VSG Remove LVDS I2C RV36 1 VGA@ 2 3K_0402_5% VGA_GPIO0 RV37 1 VGA@ 2 3K_0402_5% VGA_GPIO1 RV38 1 @ 2 3K_0402_5% VGA_GPIO2 RV43 1 @ 2 330K_0402_5% ACIN_VGA RV45 1 @ TV2 TV3 AK26 AJ26 AU24 AV23 VGA_HDMI_CLK+ VGA_HDMI_CLK- TX0P_DPA2P TX0M_DPA2N AT25 AR24 VGA_HDMI_TX0+ VGA_HDMI_TX0- TX1P_DPA1P TX1M_DPA1N AU26 AV25 VGA_HDMI_TX1+ VGA_HDMI_TX1- TX2P_DPA0P TX2M_DPA0N AT27 AR26 VGA_HDMI_TX2+ VGA_HDMI_TX2- TXCBP_DPB3P TXCBM_DPB3N AR30 AT29 TX3P_DPB2P TX3M_DPB2N AV31 AU30 TX4P_DPB1P TX4M_DPB1N AR32 AT31 TX5P_DPB0P TX5M_DPB0N AT33 AU32 TXCCP_DPC3P TXCCM_DPC3N AU14 AV13 VGA_EDP_TX3+ VGA_EDP_TX3- TX0P_DPC2P TX0M_DPC2N AT15 AR14 VGA_EDP_TX2+ VGA_EDP_TX2- TX1P_DPC1P TX1M_DPC1N AU16 AV15 VGA_EDP_TX1+ VGA_EDP_TX1- TX2P_DPC0P TX2M_DPC0N AT17 AR16 VGA_EDP_TX0+ VGA_EDP_TX0- TXCDP_DPD3P TXCDM_DPD3N AU20 AT19 TX3P_DPD2P TX3M_DPD2N AT21 AR20 TX4P_DPD1P TX4M_DPD1N AU22 AV21 TX5P_DPD0P TX5M_DPD0N AT23 AR22 2 3K_0402_5% VGA_GPIO9 RV47 1 VGA@ 2 3K_0402_5% VGA_GPIO11 RV48 1 @ 2 3K_0402_5% VGA_GPIO12 RV49 1 @ 2 3K_0402_5% VGA_GPIO13 R RB AD39 AD37 VGA_CRT_R G GB AE36 AD35 VGA_CRT_G B BB AF37 AE38 VGA_CRT_B @ 2 3K_0402_5% VGA_GPIO22 RV51 1 @ 2 10K_0402_5% THM_ALERT# DIS@ 2 10K_0402_5% 2 100K_0402_5% GPIO14_HPD2 RV52 1 VGA@ 2 100K_0402_5% EDP_HPD RV53 1 VGA@ 2 100K_0402_5% VGA_HDMI_HPD @ 2 10K_0402_5% 28 VGA_ENBKL RV50 1 VGA@ RV54 1 23,37,39,43 ACIN VGA_GPIO21 RV61 1 VGA@ 2 100K_0402_5% VGA_HPD4 RV84 1 VGA@ 2 100K_0402_5% VGA_HPD5 RV85 1 VGA@ 2 100K_0402_5% VGA_HPD6 48 GPU_VID0 28 EDP_HPD 48 GPU_VID1 3 AK24 HPD1 THM_ALERT# EDP_HPD 32 STEREO_SYNC 2 0_0402_5% TV1 1 EDP@ 2 RV62 0_0402_5% 1 CV261 0.1U_0402_16V7K @ 2 For Debug 30 VGA_HDMI_HPD @ 1 RV60 @ 1 RV58 @ 1 RV56 VGA_HDMI_HPD VGA_GPIO11 VGA_GPIO12 VGA_GPIO13 GPIO14_HPD2 GPU_VID0 @ 1 RV55 23 PEG_CLKREQ# RV62 0_0402_5% 3D@ +3VSG VGA_HPD4 VGA_HPD5 VGA_HPD6 GPIO_0 GPIO_1 GPIO_2 GPIO_3_SMBDATA GPIO_4_SMBCLK GPIO_5_AC_BATT GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21_BB_EN GPIO_22_ROMCSB GPIO_23_CLKREQB JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4 GENERICF GENERICG VGA_ENBKL VGA_ENBKL HSYNC VSYNC AC36 AC38 VGA_CRT_HSYNC VGA_CRT_VSYNC RSET AB34 RV9 AVDD AVSSQ AD34 AE34 +A1VDD VDD1DI VSS1DI AC33 AC34 +VDD1DI JTAG_TMS 2 10K_0402_5% JTAG_TDI 2 10K_0402_5% JTAG_TRSTB 1 @ 2 10K_0402_5% RV57 JTAG_TCK @ 1 RV59 +1.8VSG RV86 1 VGA@ RV87 1 VGA@ 2 10K_0402_5% 2 10K_0402_5% CV39 GPU_VID1 VGA_GPIO21 VGA_GPIO22 PEG_CLKREQ#_R JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO GENERICA 2 0.1U_0402_16V7K 1 XTALOUT VGA@ 2 1 RV88 1M_0402_5% +VGA_VREF LV4 2 1 BLM18PG121SN1D_0603 VGA@ 1 CV45 10U_0603_6.3V6M VGA@ 2 VGA@ CV46 18P_0402_50V8J +DPLL_PVDD 1U_0402_6.3V6K 1 CV42 VGA@ AH13 2 1 CV43 VGA@ 1U_0402_6.3V6K 2 1 AM32 AN32 20mil 1 CV41 +DPLL_VDDC VGA@ 0.1U_0402_16V7K 2 XTALIN XTALOUT 0.1U_0402_16V7K +1.0VSG 1 XO_IN CV44 VGA@ 27 MHz 4 RV90 1 VGA@ 2 10K_0402_5% XO_IN2 100 MHz LV5 2 1 BLM18PG121SN1D_0603 VGA@ CV50 10U_0603_6.3V6M VGA@ G2 G2B AD30 AD31 B2 B2B AF30 AF31 C Y COMP AC32 AD32 AF32 H2SYNC V2SYNC AD29 AC29 VDD2DI VSS2DI AG31 AG32 XO_IN2 +TSVDD 1 2 2 CV48 VGA@ 1 2 CV49 VGA@ 0.1U_0402_16V7K +3VSG VGA_EDP_TX3+ 28 VGA_EDP_TX3- 28 RV39 4.7K_0402_5% VGA@ VGA_EDP_TX2+ 28 VGA_EDP_TX2- 28 For 3D eDP Panel +3VSG RV40 4.7K_0402_5% VGA@ VGA_SMB_CK2 VGA_EDP_TX1+ 28 VGA_EDP_TX1- 28 VGA_EDP_TX0+ 28 VGA_EDP_TX0- 28 4 VGA@ QV1A 1 VGA_SMB_DA2 VGA@ QV1B 3 Internal Thermal Sensor Address: 0x41 H EC_SMB_CK2 9,32,37,38,39 2N7002DW-T/R7_SOT363-6 6 EC_SMB_DA2 9,32,37,38,39 2N7002DW-T/R7_SOT363-6 AW34 XO_IN SS_IN TS_A AJ32 AJ33 TSVDD TSVSS 1 VGA@ 2 3K_0402_5% VGA_CRT_HSYNC RV27 1 DIS@ 2 3K_0402_5% VGA_HDMI_CLK RV20 1 DHDMI@2 4.7K_0402_5% VGA_HDMI_DATA RV21 1 DHDMI@2 4.7K_0402_5% VGA_CRT_CLK RV24 1 DIS@ 2 2.2K_0402_5% VGA_CRT_DATA RV25 1 DIS@ 2 2.2K_0402_5% 2 VGA_CRT_B 29 VGA_CRT_HSYNC VGA_CRT_VSYNC RV26 1 DIS@ LV1 0_0603_5% PXS@ 29 29 2 499_0402_1% LV1 10mil 1U_0402_6.3V6K 10mil 1 CV33 DIS@ 0.1U_0402_16V7K 2 1 2 CV34 DIS@ 2 1 BLM18PG121SN1D_0603 DIS@ 1 CV35 10U_0603_6.3V6M DIS@ 2 LV2 2 1 BLM18PG121SN1D_0603 DIS@ 1 CV36 10U_0603_6.3V6M DIS@ 2 LV2 0_0603_5% PXS@ 1 CV37 DIS@ 0.1U_0402_16V7K 2 1 CV38 DIS@ 2 +1.8VSG Remove VGA_LCD_CLK/DATA H2SYNC RV14 1 @ 2 3K_0402_5% V2SYNC RV15 1 @ 2 3K_0402_5% VGA_CRT_R RV6 1 DIS@ 2 150_0402_1% VGA_CRT_G RV7 1 DIS@ 2 150_0402_1% VGA_CRT_B RV8 1 DIS@ 2 150_0402_1% +1.8VSG NC for Whistler Close to GPU H2SYNC V2SYNC For Capilano 10mil 130mA A2VDD 2mA A2VDDQ AD33 A2VSSQ AF33 R2SET AA29 DDC1CLK DDC1DATA AM26 AN26 AUX1P AUX1N AM27 AL27 DDC2CLK DDC2DATA AM19 AL19 AG33 10mil AUX2P AUX2N AN20 AM20 DDCCLK_AUX3P DDCDATA_AUX3N AL30 AM30 DDCCLK_AUX4P DDCDATA_AUX4N AL29 AM29 THERMAL DDCCLK_AUX5P DDCDATA_AUX5N AN21 AM21 TS_FDO AL31 VGA_CRT_G 29 VGA_CRT_VSYNC +VDD2DI @ 1 RV16 2 0_0402_5% +1.8VSG +A2VDD @ 1 RV17 @ 1 RV18 2 0_0402_5% 2 0_0402_5% +3VSG 3 +A2VDDQ @ 1 RV19 NC for Whistler Except A2VSSQ change to TSVSSQ +1.8VSG 2 715_0402_1% For Capilano 125mA DPLUS DMINUS VGA_CRT_R 29 1U_0402_6.3V6K 75mA XTALIN XTALOUT 10mil 1U_0402_6.3V6K 1 DPLL_PVDD DPLL_PVSS PLL/CLOCK DPLL_VDDC AW35 1 10mil VREFG AV33 AU34 AF29 +1.8VSG For GDDR5 50mA AN31 AK32 VGA@ 2 10K_0402_5% XO_IN AC30 AC31 2 27MHZ_16PF_X5H027000FG1H VGA@ VGA@ CV47 18P_0402_50V8J VGA_HDMI_TX2+ 30 VGA_HDMI_TX2- 30 DAC2 DDC/AUX Remove Thermal InterfaceAG29 RV89 1 R2 R2B 20mil 2 1 BLM18PG121SN1D_0603 VGA@ 1 CV40 10U_0603_6.3V6M VGA@ 2 YV1 2 45mA VGA@ +1.8VSG XTALIN 70mA 20mil LV3 For DDR3/GDDR3 DAC1 2 499_0402_1% 2 249_0402_1% VGA_HDMI_TX1+ 30 VGA_HDMI_TX1- 30 +3VSG AH20 AH18 AN16 AH23 AJ23 AH17 AJ17 AK17 AJ13 AH15 AJ16 AK16 AL16 AM16 AM14 AM13 AK14 AG30 AN14 AM17 AL13 AJ14 AK13 AN13 AM23 AN23 AK23 AL24 AM24 AJ19 AK19 AJ20 AK20 AJ24 AH26 AH24 VGA_GPIO9 RV46 1 RV44 1 @ DV1 RB751V40_SC76-2 1 2 VGA_GPIO0 VGA_GPIO1 VGA_GPIO2 VGA_SMB_DA2 VGA_SMB_CK2 ACIN_VGA VGA_HDMI_TX0+ 30 VGA_HDMI_TX0- 30 SCL SDA GENERAL PURPOSE I/O 2 www.qdzbwx.com VGA_HDMI_CLK+ 30 VGA_HDMI_CLK- 30 2 TX_PWRS_ENB GPIO0 MUTI GFX 0 Transmitter Power Saving Enable (Internal PD) 0: 50% Tx output swing 1: full Tx output swing TXCAP_DPA3P TXCAM_DPA3N 2 VGA Disable determines (Internal PD) 0: VGA Controller capacity enabled 1: The device will not be recognized as the system’s VGA controller GPIO9 Don't have this strap for Whistler 0 E 1 VIP Device Strap Enable indicates to the software driver (Internal PD) 0: Driver would ignore the value sampled on VHAD_0 during reset (GENLK_VSYNC) 1: VHAD_0 to determine whether or not a VIP slave device VIP_DEVICE_EN V2SYNC VGA_DIS D WHPROR3@ 5 UV1B 2 B Setting Pin Straps description1 A Pin Name Strap Name 20mA DDC6CLK DDC6DATA AJ30 AJ31 DDCCLK_AUX7P DDCDATA_AUX7N AK30 AK29 VGA_HDMI_CLK VGA_HDMI_DATA VGA_HDMI_CLK 30 VGA_HDMI_DATA 30 HDMI VRAM STRAP (VRAM_ID[0:3] internal pull-down) +1.8VSG VGA_EDP_AUX+ VGA_EDP_AUX- VGA_CRT_CLK VGA_CRT_DATA VGA_EDP_AUX+ 28 VGA_EDP_AUX- 28 VGA_CRT_CLK 29 VGA_CRT_DATA 29 1 RV28 1 RV30 1 RV32 1 RV34 eDP @ @ @ @ VRAM_ID0 2 10K_0402_5% VRAM_ID1 2 10K_0402_5% VRAM_ID2 2 10K_0402_5% VRAM_ID3 2 10K_0402_5% 1 RV29 1 RV31 1 RV33 1 RV35 @ @ @ @ 2 10K_0402_5% 2 10K_0402_5% 2 10K_0402_5% 2 10K_0402_5% CRT Location VRAM DDR3 Type VRAM_ID0 VRAM_ID1 VRAM_ID2 VRAM_ID3 Part Number 4 216-0772000-PRO_FCBGA962 64Mx16 900MHz K4W1G1646G-BC11 0 0 0 0 HYNIX (1GB) 64Mx16 900MHz H5TQ1G63DFR-11C 1 0 0 0 Samsung (2GB) 128Mx16 900MHz K4W2G1646C-HC11 0 1 0 0 HYNIX (2GB) 128Mx16 900MHz H5TQ2G63BFR-11C 1 1 0 0 Compal Electronics, Inc. Compal Secret Data Security Classification Issued Date Samsung (1GB) 2011/01/06 Deciphered Date 2012/01/06 Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: A B C D Sheet Monday, July 04, 2011 E 13 of 51 +1.5VSG RV101 RV103 RV105 1 VGA@ 1 VGA@ 1 VGA@ 2 240_0402_1% 2 240_0402_1% 2 240_0402_1% RV110 RV107 RV109 1 VGA@ 1 VGA@ 1 VGA@ 2 240_0402_1% 2 240_0402_1% 2 240_0402_1% L27 N12 AG12 M12 M27 AH12 ADBIA0/ODTA0 ADBIA1/ODTA1 J21 G19 ODTA0 ODTA1 CLKA0 CLKA0B H27 G27 CLKA0 CLKA0# CLKA1 CLKA1B J14 H14 CLKA1 CLKA1# RASA0B RASA1B K23 K19 RASA0# RASA1# CASA0B CASA1B K20 K17 CASA0# CASA1# CSA0B_0 CSA0B_1 K24 K27 CSA0#_0 CSA1B_0 CSA1B_1 M13 K16 CSA1#_0 CKEA0 CKEA1 K21 J20 CKEA0 CKEA1 WEA0B WEA1B K26 L15 WEA0# WEA1# H23 J19 MAA13 MVREFDA MVREFSA MEM_CALRN0 MEM_CALRN1 MEM_CALRN2 MEM_CALRP1 MEM_CALRP0 MEM_CALRP2 1 15mil 2 DQSA[0..7] DQSA[0..7] 18,19 +MVREFDB 1 RV96 VGA@ 100_0402_1% 2 DQSA#[0..7] CV56 VGA@ 0.1U_0402_16V7K DQSA#[0..7] 18,19 +1.5VSG RV97 VGA@ 40.2_0402_1% ODTA0 ODTA1 18 19 CLKA0 CLKA0# 18 18 CLKA1 CLKA1# 19 19 15mil +MVREFSB RASA0# RASA1# 18 19 CASA0# CASA1# 18 19 CSA0#_0 18 CSA1#_0 19 CKEA0 CKEA1 18 19 WEA0# WEA1# 18 19 1 RV99 VGA@ 100_0402_1% 2 CV55 VGA@ 0.1U_0402_16V7K +3VSG +MVREFDB Y12 +MVREFSBAA12 RV113 5.11K_0402_1% @ MAB[0..12] MAB[0..12] 20,21 MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8 MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12 MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1 P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 B_BA2 B_BA0 B_BA1 WCKB0_0/DQMB_0 WCKB0B_0/DQMB_1 WCKB0_1/DQMB_2 WCKB0B_1/DQMB_3 WCKB1_0/DQMB_4 WCKB1B_0/DQMB_5 WCKB1_1/DQMB_6 WCKB1B_1/DQMB_7 GDDR5/DDR2/GDDR3 EDCB0_0/QSB_0/RDQSB_0 EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7 H3 H1 T3 T5 AE4 AF5 AK6 AK5 DQMB0 DQMB1 DQMB2 DQMB3 DQMB4 DQMB5 DQMB6 DQMB7 F6 K3 P3 V5 AB5 AH1 AJ9 AM5 DQSB0 DQSB1 DQSB2 DQSB3 DQSB4 DQSB5 DQSB6 DQSB7 DDBIB0_0/QSB_0B/WDQSB_0 DDBIB0_1/QSB_1B/WDQSB_1 DDBIB0_2/QSB_2B/WDQSB_2 DDBIB0_3/QSB_3B/WDQSB_3 DDBIB1_0/QSB_4B/WDQSB_4 DDBIB1_1/QSB_5B/WDQSB_5 DDBIB1_2/QSB_6B/WDQSB_6 DDBIB1_3/QSB_7B/WDQSB_7 G7 K1 P1 W4 AC4 AH3 AJ8 AM3 DQSB#0 DQSB#1 DQSB#2 DQSB#3 DQSB#4 DQSB#5 DQSB#6 DQSB#7 T7 W7 ODTB0 ODTB1 L9 L8 CLKB0 CLKB0# CLKB1 CLKB1B AD8 AD7 CLKB1 CLKB1# RASB0B RASB1B T10 Y10 RASB0# RASB1# CASB0B CASB1B W10 AA10 CASB0# CASB1# CSB0B_0 CSB0B_1 P10 L10 CSB0#_0 CSB1B_0 CSB1B_1 AD10 AC10 CSB1#_0 CKEB0 CKEB1 U10 AA11 CKEB0 CKEB1 WEB0B WEB1B N10 AB11 WEB0# WEB1# T8 W8 MAB13 AH11 1 VGA@ 2 1 VGA@ 2 RV76 10_0402_5% RV65 51.1_0402_1% MEMORY INTERFACE B DQSA#0 DQSA#1 DQSA#2 DQSA#3 DQSA#4 DQSA#5 DQSA#6 DQSA#7 RV95 VGA@ 40.2_0402_1% 1 A34 E30 E26 C20 C16 C12 J11 F8 +1.5VSG 2 L18 L20 DDBIA0_0/QSA_0B/WDQSA_0 DDBIA0_1/QSA_1B/WDQSA_1 DDBIA0_2/QSA_2B/WDQSA_2 DDBIA0_3/QSA_3B/WDQSA_3 DDBIA1_0/QSA_4B/WDQSA_4 DDBIA1_1/QSA_5B/WDQSA_5 DDBIA1_2/QSA_6B/WDQSA_6 DDBIA1_3/QSA_7B/WDQSA_7 DQMA[0..7] 18,19 1 +MVREFDA +MVREFSA C34 D29 D25 E20 E16 E12 J10 D7 DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7 DQMA[0..7] DQB0_0/DQB_0 DQB0_1/DQB_1 DQB0_2/DQB_2 DQB0_3/DQB_3 DQB0_4/DQB_4 DQB0_5/DQB_5 DQB0_6/DQB_6 DQB0_7/DQB_7 DQB0_8/DQB_8 DQB0_9/DQB_9 DQB0_10/DQB_10 DQB0_11/DQB_11 DQB0_12/DQB_12 DQB0_13/DQB_13 DQB0_14/DQB_14 DQB0_15/DQB_15 DQB0_16/DQB_16 DQB0_17/DQB_17 DQB0_18/DQB_18 DQB0_19/DQB_19 DQB0_20/DQB_20 DQB0_21/DQB_21 DQB0_22/DQB_22 DQB0_23/DQB_23 DQB0_24/DQB_24 DQB0_25/DQB_25 DQB0_26/DQB_26 DQB0_27/DQB_27 DQB0_28/DQB_28 DQB0_29/DQB_29 DQB0_30/DQB_30 DQB0_31/DQB_31 DQB1_0/DQB_32 DQB1_1/DQB_33 DQB1_2/DQB_34 DQB1_3/DQB_35 DQB1_4/DQB_36 DQB1_5/DQB_37 DQB1_6/DQB_38 DQB1_7/DQB_39 DQB1_8/DQB_40 DQB1_9/DQB_41 DQB1_10/DQB_42 DQB1_11/DQB_43 DQB1_12/DQB_44 DQB1_13/DQB_45 DQB1_14/DQB_46 DQB1_15/DQB_47 DQB1_16/DQB_48 DQB1_17/DQB_49 DQB1_18/DQB_50 DQB1_19/DQB_51 DQB1_20/DQB_52 DQB1_21/DQB_53 DQB1_22/DQB_54 DQB1_23/DQB_55 DQB1_24/DQB_56 DQB1_25/DQB_57 DQB1_26/DQB_58 DQB1_27/DQB_59 DQB1_28/DQB_60 DQB1_29/DQB_61 DQB1_30/DQB_62 DQB1_31/DQB_63 ADBIB0/ODTB0 ADBIB1/ODTB1 CLKB0 CLKB0B MVREFDB MVREFSB 1 B_BA[0..2] B_BA[0..2] 20,21 DQMB[0..7] DQMB[0..7] 20,21 DQSB[0..7] DQSB[0..7] 20,21 DQSB#[0..7] MAA0_8 MAA1_8 MAA13 18,19 For 128MbX16 DQSB#[0..7] 20,21 ODTB0 ODTB1 20 21 CLKB0 CLKB0# 20 20 CLKB1 CLKB1# 21 21 RASB0# RASB1# 20 21 2 CASB0# CASB1# 20 21 CSB0#_0 20 CSB1#_0 21 CKEB0 CKEB1 20 21 WEB0# WEB1# 20 21 AD28 TESTEN TEST_MCLK TEST_YCLK AK10 AL10 CLKTESTA CLKTESTB MAB0_8 MAB1_8 DRAM_RST MAB13 20,21 For 128MbX16 VRAM_RST# 18,19,20,21 2 1 RV114 1K_0402_5% VGA@ 3 TESTEN 2 CV58 0.1U_0402_16V4Z @ 1 1 216-0772000-PRO_FCBGA962 2 1 CV57 0.1U_0402_16V4Z @ 1 216-0772000-PRO_FCBGA962 2 2 CV52 VGA@ 0.1U_0402_16V7K DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7 A_BA[0..2] 18,19 C5 C3 E3 E1 F1 F3 F5 G4 H5 H6 J4 K6 K5 L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3 Y5 AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6 AJ4 AK3 AF8 AF9 AG8 AG7 AK9 AL7 AM8 AM7 AK1 AL4 AM6 AM1 AN4 AP3 AP1 AP5 GDDR5 1 A32 C32 D23 E22 C14 A14 E10 D9 MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63 WHPROR3@ DDR2 GDDR5/GDDR3 DDR3 RV115 51.1_0402_1% @ Place all these components close to GPU (Within 25mm) and keep all component close to each Other (within5mm) except Rser2 2 RV116 51.1_0402_1% @ 2 3 RV117 CV59 120P_0402_50V8 4.99K_0402_1% VGA@ VGA@ 2 1 2 RV94 VGA@ 100_0402_1% WCKA0_0/DQMA_0 WCKA0B_0/DQMA_1 WCKA0_1/DQMA_2 WCKA0B_1/DQMA_3 WCKA1_0/DQMA_4 WCKA1B_0/DQMA_5 WCKA1_1/DQMA_6 WCKA1B_1/DQMA_7 GDDR5/DDR2/GDDR3 EDCA0_0/QSA_0/RDQSA_0 EDCA0_1/QSA_1/RDQSA_1 EDCA0_2/QSA_2/RDQSA_2 EDCA0_3/QSA_3/RDQSA_3 EDCA1_0/QSA_4/RDQSA_4 EDCA1_1/QSA_5/RDQSA_5 EDCA1_2/QSA_6/RDQSA_6 EDCA1_3/QSA_7/RDQSA_7 A_BA[0..2] 2 15mil +MVREFSA 1 2 RV93 VGA@ 40.2_0402_1% MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 A_BA2 A_BA0 A_BA1 UV1D DDR2 GDDR3/GDDR5 DDR3 MDB[0..63] 20,21 MDB[0..63] 1 1 +1.5VSG G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17 www.qdzbwx.com MAA[0..12] 18,19 2 2 CV51 VGA@ 0.1U_0402_16V7K MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8 MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12 MAA1_5/MAA_13_BA2 MAA1_6/MAA_14_BA0 MAA1_7/MAA_A15_BA1 E 2 2 1 DQA0_0/DQA_0 DQA0_1/DQA_1 DQA0_2/DQA_2 DQA0_3/DQA_3 DQA0_4/DQA_4 DQA0_5/DQA_5 DQA0_6/DQA_6 DQA0_7/DQA_7 DQA0_8/DQA_8 DQA0_9/DQA_9 DQA0_10/DQA_10 DQA0_11/DQA_11 DQA0_12/DQA_12 DQA0_13/DQA_13 DQA0_14/DQA_14 DQA0_15/DQA_15 DQA0_16/DQA_16 DQA0_17/DQA_17 DQA0_18/DQA_18 DQA0_19/DQA_19 DQA0_20/DQA_20 DQA0_21/DQA_21 DQA0_22/DQA_22 DQA0_23/DQA_23 DQA0_24/DQA_24 DQA0_25/DQA_25 DQA0_26/DQA_26 DQA0_27/DQA_27 DQA0_28/DQA_28 DQA0_29/DQA_29 DQA0_30/DQA_30 DQA0_31/DQA_31 DQA1_0/DQA_32 DQA1_1/DQA_33 DQA1_2/DQA_34 DQA1_3/DQA_35 DQA1_4/DQA_36 DQA1_5/DQA_37 DQA1_6/DQA_38 DQA1_7/DQA_39 DQA1_8/DQA_40 DQA1_9/DQA_41 DQA1_10/DQA_42 DQA1_11/DQA_43 DQA1_12/DQA_44 DQA1_13/DQA_45 DQA1_14/DQA_46 DQA1_15/DQA_47 DQA1_16/DQA_48 DQA1_17/DQA_49 DQA1_18/DQA_50 DQA1_19/DQA_51 DQA1_20/DQA_52 DQA1_21/DQA_53 DQA1_22/DQA_54 DQA1_23/DQA_55 DQA1_24/DQA_56 DQA1_25/DQA_57 DQA1_26/DQA_58 DQA1_27/DQA_59 DQA1_28/DQA_60 DQA1_29/DQA_61 DQA1_30/DQA_62 DQA1_31/DQA_63 MAA[0..12] D 1 15mil +MVREFDA 1 2 RV91 VGA@ 40.2_0402_1% C37 C35 A35 E34 G32 D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10 G8 K9 K10 G9 A8 C8 E8 A6 C6 E6 A5 GDDR5 1 +1.5VSG MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 C WHPROR3@ DDR2 GDDR5/GDDR3 DDR3 MEMORY INTERFACE A 1 2 UV1C DDR2 GDDR3/GDDR5 DDR3 MDA[0..63] 18,19 MDA[0..63] RV92 VGA@ 100_0402_1% B 1 A Route 50ohm single-ended and 100ohm diff and keep short 4 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: A B C D Monday, July 04, 2011 Sheet E 14 of 51 A B 1U_0402_6.3V6K +1.5VSG 1 CV96 CV97 1U_0402_6.3V6K 1 CV99 1 CV98 C 1U_0402_6.3V6K 1 CV100 1 CV101 D 1 CV103 1 CV102 UV1E 1 WHPROR3@ MEM I/O VGA@ 2 VGA@ 2 VGA@ 2 1U_0402_6.3V6K 1U_0402_6.3V6K CV104 1 CV105 VGA@ 2 1U_0402_6.3V6K 1 CV107 VGA@ 2 1U_0402_6.3V6K 1 CV106 VGA@ 2 1U_0402_6.3V6K 1 CV108 VGA@ 2 1U_0402_6.3V6K 1 CV110 VGA@ AC7 AD11 AF7 AG10 AJ7 AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10 J7 J9 K11 K13 K8 L12 L16 L21 L23 L26 L7 M11 N11 P7 R11 U11 U7 Y11 Y7 1U_0402_6.3V6K 1 CV111 1 CV109 1 1 VGA@ 2 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 2 2 2 2 2 2 2 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M CV116 VGA@ 1 2 CV117 VGA@ 1 2 CV118 VGA@ 1 2 CV119 VGA@ 1 2 CV120 VGA@ 1U_0402_6.3V6K 1 2 CV112 VGA@ 1 2 CV114 VGA@ 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 2 CV115 VGA@ 1 2 CV113 VGA@ 1U_0402_6.3V6K LV6 2 1 BLM18PG121SN1D_0603 VGA@ +1.8VSG 1U_0402_6.3V6K 1 1 2 1U_0402_6.3V6K 1U_0402_6.3V6K CV121 VGA@ 1 2 CV123 VGA@ 1 2 10U_0603_6.3V6M CV124 VGA@ 1 2 0.1U_0402_16V7K CV127 1 CV125 1 CV126 1 LV7 1U_0402_6.3V6K 2 1 BLM18PG121SN1D_0603 VGA@ 1 1 1 CV130 CV128 CV129 VGA@ VGA@ +VDD_CT 10mil VGA@ 2 2 2 10U_0603_6.3V6M 0.1U_0402_16V7K LV8 1U_0402_6.3V6K 0.1U_0402_16V7K 2 1 BLM18PG121SN1D_0603 VGA@ 1 1 1 1 1 CV131 CV132 CV133 CV135 CV134 VGA@ 3 2 VGA@ 10U_0603_6.3V6M +1.8VSG 2 VGA@ LV9 1U_0402_6.3V6K 2 1 BLM18PG121SN1D_0603 VGA@ 1 1 1 CV136 CV137 CV138 VGA@ 2 VGA@ 2 VGA@ 2 VGA@ 1U_0402_6.3V6K 2 2 VGA@ 0.1U_0402_16V7K AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28 219mA AF23 AF24 AG23 AG24 VDDR3#1 VDDR3#2 VDDR3#3 VDDR3#4 AF13 AF15 AG13 AG15 VDDR4#4 VDDR4#5 VDDR4#7 VDDR4#8 AD12 AF11 AF12 AG11 VDDR4#1 VDDR4#2 VDDR4#3 VDDR4#6 VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8 VDDCI#9 VDDCI#10 VDDCI#11 4A VDDCI#12 VDDCI#13 VDDCI#14 ISOLATED VDDCI#15 CORE I/O VDDCI#16 VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22 AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13 60mA 25A 170mA M20 M21 NC_VDDRHA NC_VSSRHA V12 U12 NC_VDDRHB NC_VSSRHB PLL 2 +PCIE_VDDR 0.1U_0402_16V7K 20mil 10mil 1U_0402_6.3V6K 2 1 BLM18PG121SN1D_0603 VGA@ 1 1 1 CV139 CV140 CV141 VGA@ 10U_0603_6.3V6M VDD_CT#1 VDD_CT#2 VDD_CT#3 VDD_CT#4 2 VGA@ 10U_0603_6.3V6M 2 VGA@ 20mil AB37 +MPV_18 H7 H8 +SPV_18 +SPV10 PCIE_PVDD MPV18#1 MPV18#2 150mA AM10 SPV18 75mA AN9 SPV10 120mA AN10 SPVSS 2 VOLTAGE SENESE 0.1U_0402_16V7K 48 VCORE_SENSE VCORE_SENSE AF28 FB_VDDC AG28 FB_VDDCI AH29 +PCIE_VDDR CV147 VGA@ 0.1U_0402_16V7K 1U_0402_6.3V6K 1 2 CV146 VGA@ 1 2 CV144 VGA@ 1 2 CV145 VGA@ 1 2 0.1U_0402_16V7K 1U_0402_6.3V6K FB_GND 1U_0402_6.3V6K G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28 VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8 VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32 VDDC#33 VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41 VDDC#42 VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58 CORE Combined with PCIE_VDDR LV10 +1.0VSG 3.4A I/O 20mil +VDDR4_5 +1.8VSG AF26 AF27 AG26 AG27 AA31 AA32 AA33 AA34 V28 W29 W30 Y31 CV143 VGA@ 1 2 LV11 10U_0603_6.3V6M 2 1 FBMA-L11-201209-221LMA30T_0805 VGA@ 1 CV142 VGA@ +1.8VSG 2 1U_0402_6.3V6K 1 PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 2A PCIE_VDDC#7 PCIE_VDDC#8 PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12 POWER +1.8VSG PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 440mA PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8 LEVEL TRANSLATION 20mil VGA@ VGA@ VGA@ 2 2 2 10U_0603_6.3V6M 0.1U_0402_16V7K 2 VDDR1#1 VDDR1#2 VDDR1#3 VDDR1#4 VDDR1#5 VDDR1#6 VDDR1#7 VDDR1#8 VDDR1#9 VDDR1#10 VDDR1#11 VDDR1#12 VDDR1#13 VDDR1#14 VDDR1#15 VDDR1#16 VDDR1#17 VDDR1#18 VDDR1#19 VDDR1#20 VDDR1#21 VDDR1#22 VDDR1#23 VDDR1#24 VDDR1#25 VDDR1#26 VDDR1#27 VDDR1#28 VDDR1#29 VDDR1#30 VDDR1#31 VDDR1#32 VDDR1#33 VDDR1#34 1U_0402_6.3V6K +3VSG 40mil PCIE 2 1U_0402_6.3V6K E www.qdzbwx.com 1U_0402_6.3V6K CV148 VGA@ 1 2 CV149 VGA@ 1U_0402_6.3V6K CV196 VGA@ 1 2 1 2 CV150 VGA@ 1U_0402_6.3V6K 1 2 VGA@ 1 2 CV216 VGA@ 1 2 CV181 VGA@ 1 2 CV193 VGA@ 1U_0402_6.3V6K 1 2 10U_0603_6.3V6M 1 CV194 VGA@ 2 CV195 VGA@ +1.0VSG 1 2 1U_0402_6.3V6K 1U_0402_6.3V6K 1 1 CV197 CV198 1U_0402_6.3V6K 1 1 CV199 CV200 1U_0402_6.3V6K 1 1 CV201 CV202 1U_0402_6.3V6K 1 1 CV203 CV204 1U_0402_6.3V6K 1 CV205 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 2 2 VGA@ 2 1U_0402_6.3V6K 2 VGA@ 2 1U_0402_6.3V6K 2 2 2 1U_0402_6.3V6K 1U_0402_6.3V6K 1 1 CV209 CV210 1U_0402_6.3V6K 1 1 CV211 CV212 1U_0402_6.3V6K 1 1 CV213 CV215 1U_0402_6.3V6K 1 CV214 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 2 2 VGA@ 2 1U_0402_6.3V6K 2 VGA@ 2 1U_0402_6.3V6K 2 VGA@ VGA@ 2 10U_0603_6.3V6M VGA@ 2 2 10U_0603_6.3V6M VGA@ 2 VGA@ 2 10U_0603_6.3V6M 2 2 +VGA_CORE Capilano LP: VDDC+VDDCI= 27.6A (Eng. clock= 500MHz, Mem. clock= 900 MHz) Whistler LP: VDDC+VDDCI= 24.7A (Eng. clock= 485MHz, Mem. clock= 800 MHz) Whistler PRO: VDDC+VDDCI= 32.6A (Eng. clock= 600MHz, Mem. clock= 900 MHz) 1U_0402_6.3V6K 2 1 1 + CV221 390U_2.5V_M_R10 VGA@ 2 + CV224 390U_2.5V_M_R10 VGA@ 2 2 10U_0603_6.3V6M +BIF_VDDC： Capilano: Connect to +VGA_CORE Whisler: Normal mode: +VGA_CORE BACO mode: +1.0VSG 55mA +BIF_VDDC VGA@ VGA@ 2 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 1 1 1 1 1 1 CV217 CV219 CV218 CV223 CV220 CV222 2 VGA@ 2 1U_0402_6.3V6K 1U_0402_6.3V6K 1 1 CV207 CV208 1U_0402_6.3V6K 1 VGA@ 1U_0402_6.3V6K 1U_0402_6.3V6K CV206 CV151 1U_0402_6.3V6K +BIF_VDDC 3 +VDDCI 1 CV225 1U_0402_6.3V6K 1 1 CV226 CV227 1U_0402_6.3V6K 1 1 CV228 CV229 1U_0402_6.3V6K 1 1 CV230 CV231 1U_0402_6.3V6K 1 1 CV232 CV234 LV12 1U_0402_6.3V6K 2 1 FBMA-L11-201209-121LMA50T_0805 1 CV233 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 2 1U_0402_6.3V6K 2 VGA@ 2 1U_0402_6.3V6K 2 VGA@ 2 VGA@ 2 1U_0402_6.3V6K 2 1U_0402_6.3V6K CV235 VGA@ 2 CV236 VGA@ 1 2 CV237 VGA@ VGA@ 2 2 1U_0402_6.3V6K 0.1U_0402_16V7K 1 2 +VGA_CORE 10U_0603_6.3V6M 1 2 CV239 VGA@ 1 2 CV238 VGA@ 1 2 1U_0402_6.3V6K 10U_0603_6.3V6M 10U_0603_6.3V6M 216-0772000-PRO_FCBGA962 4 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: A B C D Monday, July 04, 2011 Sheet E 15 of 51 A B UV1F 1 2 3 4 AB39 E39 F34 F39 G33 G34 H31 H34 H39 J31 J34 K31 K34 K39 L31 L34 M34 M39 N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39 W31 W34 Y34 Y39 F15 F17 F19 F21 F23 F25 F27 F29 F31 F33 F7 F9 G2 G6 H9 J2 J27 J6 J8 K14 K7 L11 L17 L2 L22 L24 L6 M17 M22 M24 N16 N18 N2 N21 N23 N26 N6 R15 R17 R2 R20 R22 R24 R27 R6 T11 T13 T16 T18 T21 T23 T26 U15 U17 U2 U20 U22 U24 U27 U6 V11 V16 V18 V21 V23 V26 W2 W6 Y15 Y17 Y20 Y22 Y24 Y27 U13 V13 C D www.qdzbwx.com WHPROR3@ PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8 PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31 PCIE_VSS#32 PCIE_VSS#33 PCIE_VSS#34 PCIE_VSS#35 GND GND#100 GND#101 GND#102 GND#103 GND#104 GND#105 GND#106 GND#107 GND#108 GND#109 GND#110 GND#111 GND#112 GND#113 GND#114 GND#115 GND#116 GND#117 GND#118 GND#119 GND#120 GND#121 GND#122 GND#123 GND#124 GND#125 GND#126 GND#127 GND#128 GND#129 GND#130 GND#131 GND#132 GND#133 GND#134 GND#135 GND#136 GND#137 GND#138 GND#139 GND#140 GND#141 GND#142 GND#143 GND#144 GND#145 GND#146 GND#147 GND#148 GND#149 GND#150 GND#151 GND#153 GND#154 GND#155 GND#156 GND#157 GND#158 GND#159 GND#160 GND#161 GND#163 GND#164 GND#165 GND#166 GND#167 GND#168 GND#169 GND#170 GND#171 GND#172 GND#173 GND#174 GND#175 GND#152 GND#162 GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8 GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98 A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13 E 1 LV15 0_0603_5% NOEDP@ LV15 0_0603_5% PXS@ UV1H WHPROR3@ DP C/D POWER +1.8VSG LV15 1U_0402_6.3V6K 1 2 BLM18PG121SN1D_0603 EDP@ 1 1 CV250 CV249 EDP@ 2 EDP@ 2 20mil +DPCD_VDD18 1 CV251 20mil +DPCD_VDD10 EDP@ 2 10U_0603_6.3V6M 0.1U_0402_16V7K LV16 0_0603_5% NOEDP@ +1.0VSG AP13 AT13 20mil +DPCD_VDD18 DP A/B POWER AN24 AP24 DPC_VDD18#1 DPA_VDD18#1 130mA130mA DPC_VDD18#2 DPA_VDD18#2 20mil AP31 AP32 DPC_VSSR#1 DPC_VSSR#2 DPC_VSSR#3 DPC_VSSR#4 DPC_VSSR#5 DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5 AN27 AP27 AP28 AW24 AW26 AP22 AP23 DPD_VDD18#1 DPB_VDD18#1 130mA 130mA DPD_VDD18#2 DPB_VDD18#2 AP25 AP26 +DPAB_VDD18 AP14 AP15 DPD_VDD10#1 DPB_VDD10#1 110mA 110mA DPD_VDD10#2 DPB_VDD10#2 AN33 AP33 +DPAB_VDD10 20mil +DPCD_VDD10 20mil +DPAB_VDD18 DPC_VDD10#1 DPA_VDD10#1 110mA 110mA DPC_VDD10#2 DPA_VDD10#2 AN17 AP16 AP17 AW14 AW16 LV16 0_0603_5% PXS@ LV16 1U_0402_6.3V6K 1 2 BLM18PG121SN1D_0603 EDP@ 1 1 CV253 CV252 AP20 AP21 LV13 0_0603_5% PXS@ 1 CV254 +DPAB_VDD10 1U_0402_6.3V6K CV245 EDP@ 2 EDP@ 2 AN19 AP18 AP19 AW20 AW22 10U_0603_6.3V6M 0.1U_0402_16V7K AW18 2 VGA@ 1 RV162 150_0402_1% +1.8VSG PX_EN LV17 1U_0402_6.3V6K 1 2 BLM18PG121SN1D_0603 DIS@ 1 1 CV256 CV255 17 LV17 0_0603_5% PXS@ DIS@ 2 DIS@ 2 1 CV257 DPCD_CALR DPAB_CALR AW28 DP PLL POWER DPA_PVDD DPA_PVSS AU28 AV27 +DPAB_VDD18 1U_0402_6.3V6K DPB_PVDD DPB_PVSS AV29 AR28 +DPAB_VDD18 DPC_PVDD DPC_PVSS AU18 AV17 +DPCD_VDD18 DPD_PVDD DPD_PVSS AV19 AR18 +DPCD_VDD18 DPE_PVDD DPE_PVSS AM37 AN38 +DPEF_VDD18 DPF_PVDD DPF_PVSS AL38 AM35 +DPEF_VDD18 20mil +DPEF_VDD18 DIS@ 2 CV246 1 CV247 1 LV14 2 1 BLM18PG121SN1D_0603 DHDMI@ +1.0VSG 2 DHDMI@ DHDMI@ DHDMI@ 2 2 2 0.1U_0402_16V7K 10U_0603_6.3V6M 1 VGA@ 2 RV163 150_0402_1% DP E/F POWER DPE_VDD18#1 125mA DPE_VDD18#2 AL33 AM33 DPE_VDD10#1 DPE_VDD10#2 90mA AN34 AP39 AR39 AU37 DPE_VSSR#1 DPE_VSSR#2 DPE_VSSR#3 DPE_VSSR#4 20mA 10mil 20mA 10mil LV18 0_0603_5% PXS@ DIS@ 2 1 10mil AH34 AJ34 10U_0603_6.3V6M 0.1U_0402_16V7K LV18 1U_0402_6.3V6K 1 2 BLM18PG121SN1D_0603 DIS@ 1 1 CV259 CV258 +1.8VSG LV14 0_0603_5% PXS@ 20mil AN29 AP29 AP30 AW30 AW32 20mA 10mil 20mA +1.0VSG LV13 2 1 BLM18PG121SN1D_0603 DHDMI@ 20mil DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5 20mil +DPEF_VDD10 DIS@ 2 CV244 1 0.1U_0402_16V7K 10U_0603_6.3V6M DPD_VSSR#1 DPD_VSSR#2 DPD_VSSR#3 DPD_VSSR#4 DPD_VSSR#5 20mil +DPEF_VDD18 CV243 1 DHDMI@ DHDMI@ DHDMI@ 2 2 2 CV248 EDP@ 2 1 20mil +DPEF_VDD10 AF34 AG34 AK33 AK34 DPF_VDD18#1 125mA DPF_VDD18#2 DPF_VDD10#1 DPF_VDD10#2 90mA 10mil 20mA 1 CV260 AF39 AH39 AK39 AL34 AM34 DIS@ 2 10U_0603_6.3V6M 0.1U_0402_16V7K AM39 2 VGA@ 1 RV111 150_0402_1% 3 10mil 20mA DPF_VSSR#1 DPF_VSSR#2 DPF_VSSR#3 DPF_VSSR#4 DPF_VSSR#5 DPEF_CALR 216-0772000-PRO_FCBGA962 4 VSS_MECH#1 VSS_MECH#2 VSS_MECH#3 A39 AW1 AW39 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 2012/01/06 Deciphered Date Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 216-0772000-PRO_FCBGA962 Rev B 4019D8 Date: A B C D Sheet Monday, July 04, 2011 E 16 of 51 1 2 3 +3VS 5 1 PXS_PWREN 1 RV74 2 10K_0402_5% +3VS PX_EN# S 1 P O 2 4 BACO_EN# BACO_EN# 37,40 IN2 3 1 3 1 BACO@ RV78 5.11K_0402_1% BACO@ UV4 SN74AHC1G08DCKR_SC70-5 BACO@ BACO@ QV2 2N7002_SOT23-3 +5VS +5VS 2 2 2 PX_EN= H : BACO mode PX_EN= L : Normal mode D 1 BACO@ 2 2 RV77 0_0402_5% G PX_EN www.qdzbwx.com CV240 0.1U_0402_16V4Z 1 2 IN1 BACO@ 16 5 G 22,40 PXS_PWREN 1 4 O IN2 QV7A BACO@ 2 4 2N7002DW-T/R7_SOT363-6 5 3 SN74AHC1G08DCKR_SC70-5 BACO@ 2 QV7B 2N7002DW-T/R7_SOT363-6 BACO@ 4 5 IN1 1 22,40,48 VGA_PWRGD UV13 P 1 BACO@ 2 1 RV79 0_0402_5% 2 G BACO_EN# 3 1.0_EN BACO@ 2 VDDC_EN +3VS 6 CV241 0.1U_0402_16V4Z 2 1 1 BACO@ RV82 1K_0402_5% 1 BACO@ RV80 1K_0402_5% +BIF_VDDC 1 G 2 +1.0VSG_Q 1 AO3416_SOT23-3 BACO@ 30mil S D 3 +VGA_CORE QV5 20mil D QV4 3 2 G +1.0VSG S BACO mode: +VGA_CORE: off +1.5VSG: off +BIF_VDDC= +1.0VSG AO3416_SOT23-3 BACO@ 1.0_EN 1 2 NOBACO@ 2 1 RV83 0_0603_5% BACO@ CV242 22U_0805_6.3V6M 3 3 QV3 30mil 1 +VGA_CORE_Q1 D S AO3416_SOT23-3 BACO@ QV6 3 S 3 D G +VGA_CORE 2 G VDDC_EN 2 Normal mode: +BIF_VDDC= +VGA_CORE AO3416_SOT23-3 BACO@ AO3416 NMOS Vgs(th)(Max)= 1V Rds(on)(Max)= 22m ohm @Vgs=4.5V 4 4 Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: 1 2 3 4 Monday, July 04, 2011 Sheet 5 17 of 51 5 4 3 2 1 www.qdzbwx.com Memory Partition A - Lower 32 bits MDA[0..63] 14,19 MAA[0..13] 14,19 DQMA[0..7] 14,19 VGA@ CLKA0# 1 RV118 2 56_0402_1% CV60 0.01U_0402_16V7K VGA@ A_BA0 A_BA1 A_BA2 2 BA0 BA1 BA2 14 14 14 CLKA0 CLKA0# CKEA0 14 14 14 14 14 ODTA0 CSA0#_0 RASA0# CASA0# WEA0# MDA3 MDA6 MDA1 MDA4 MDA2 MDA7 MDA0 MDA5 Group0 +1.5VSG CLKA0 CLKA0# CKEA0 J7 K7 K9 CK CK CKE/CKE0 ODTA0 CSA0#_0 RASA0# CASA0# WEA0# K1 L2 J3 K3 L3 ODT/ODT0 CS/CS0 RAS CAS WE DQSA3 DQSA0 F3 C7 DQSL DQSU DQMA3 DQMA0 E7 D3 DML DMU N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3 M2 N8 M3 BA0 BA1 BA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD B2 D9 G7 K2 K8 N1 N9 R1 R9 A_BA0 A_BA1 A_BA2 CLKA0 CLKA0# CKEA0 J7 K7 K9 CK CK CKE/CKE0 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A1 A8 C1 C9 D2 E9 F1 H2 H9 ODTA0 CSA0#_0 RASA0# CASA0# WEA0# K1 L2 J3 K3 L3 ODT/ODT0 CS/CS0 RAS CAS WE DQSA2 DQSA1 F3 C7 DQSL DQSU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 DQMA2 DQMA1 E7 D3 DML DMU VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ B1 B9 D1 D8 E2 E8 F9 G1 G9 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 MDA19 MDA21 MDA16 MDA23 MDA18 MDA22 MDA17 MDA20 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDA13 MDA10 MDA15 MDA9 MDA14 MDA8 MDA12 MDA11 A_BA[0..2] 14,19 Group2 D +1.5VSG Group1 B2 D9 G7 K2 K8 N1 N9 R1 R9 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ B1 B9 D1 D8 E2 E8 F9 G1 G9 +1.5VSG RV122 4.99K_0402_1% VGA@ +1.5VSG VDD VDD VDD VDD VDD VDD VDD VDD VDD 14,19 DQSA#[0..7] 14,19 1 M2 N8 M3 1 D7 C3 C8 C2 A7 A2 B8 A3 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 Group3 VREFCA VREFDQ RV124 4.99K_0402_1% VGA@ 2 2 56_0402_1% DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 +VREFCA_A2 M8 +VREFDQ_A2 H1 +VREFCA_A1 1 RV123 4.99K_0402_1% VGA@ +VREFDQ_A1 1 1 RV64 MDA29 MDA26 MDA30 MDA24 MDA27 MDA25 MDA31 MDA28 2 CV64 0.1U_0402_16V7K VGA@ 1 RV125 4.99K_0402_1% VGA@ 2 2 CLKA0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3 E3 F7 F2 F8 H3 H8 G2 H7 1 VGA@ N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 2 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 D VREFCA VREFDQ DQSA[0..7] 1 +VREFCA_A1 M8 +VREFDQ_A1 H1 UV6 2 UV5 CV65 0.1U_0402_16V7K VGA@ C C RESET L8 ZQ/ZQ0 J1 L1 J9 L9 NC/ODT1 NC/CS1 NC/CE1 NCZQ1 1 1 2 2 G3 B7 DQSL DQSU VRAM_RST# T2 RESET L8 ZQ/ZQ0 J1 L1 J9 L9 NC/ODT1 NC/CS1 NC/CE1 NCZQ1 1 RV127 4.99K_0402_1% VGA@ +VREFDQ_A2 1 +VREFCA_A2 1 DQSA#2 DQSA#1 2 RV138 240_0402_1% VGA@ RV139 240_0402_1% VGA@ 2 B RV128 4.99K_0402_1% VGA@ 2 CV66 0.1U_0402_16V7K VGA@ 1 RV129 4.99K_0402_1% VGA@ 2 CV67 0.1U_0402_16V7K VGA@ 1 VRAM_RST# T2 RV126 4.99K_0402_1% VGA@ 2 DQSL DQSU 1 14,19,20,21 VRAM_RST# G3 B7 +1.5VSG 2 DQSA#3 DQSA#0 +1.5VSG 96-BALL SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96 @ B 96-BALL SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96 @ +1.5VSG +1.5VSG +1.5VSG 10U_0603_6.3V6M 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 1U_0402_6.3V6K 1U_0402_6.3V6K 1 + 2 CV122 390U_2.5V_M_R10 VGA@ 1 CV72 VGA@ 1 2 2 10U_0603_6.3V6M CV73 VGA@ 1 CV152 VGA@ 2 1U_0402_6.3V6K 1 2 1 CV153 VGA@ CV154 VGA@ 2 1U_0402_6.3V6K 1 2 CV155 VGA@ 1 2 CV156 VGA@ 1U_0402_6.3V6K 1 CV75 VGA@ 1 2 2 10U_0603_6.3V6M CV74 VGA@ 1 1 CV157 VGA@ 2 1U_0402_6.3V6K 2 CV158 VGA@ 1 CV159 VGA@ 2 1U_0402_6.3V6K 1 CV160 VGA@ 2 1 2 CV161 VGA@ 1U_0402_6.3V6K A A Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: 5 4 3 2 Monday, July 04, 2011 Sheet 1 18 of 51 5 4 3 2 1 www.qdzbwx.com Memory Partition A - Upper 32 bits MDA[0..63] 14,18 MAA[0..13] 14,18 CV61 0.01U_0402_16V7K VGA@ M2 N8 M3 BA0 BA1 BA2 CLKA1 CLKA1# CKEA1 J7 K7 K9 CK CK CKE/CKE0 ODTA1 CSA1#_0 RASA1# CASA1# WEA1# K1 L2 J3 K3 L3 ODT/ODT0 CS/CS0 RAS CAS WE DQSA4 DQSA5 F3 C7 DQSL DQSU DQMA4 DQMA5 E7 D3 DML DMU DQSA#4 DQSA#5 G3 B7 DQSL DQSU 1 2 14 14 14 CLKA1 CLKA1# CKEA1 14 14 14 14 14 ODTA1 CSA1#_0 RASA1# CASA1# WEA1# +1.5VSG BA0 BA1 BA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD B2 D9 G7 K2 K8 N1 N9 R1 R9 A_BA0 A_BA1 A_BA2 M2 N8 M3 CLKA1 CLKA1# CKEA1 J7 K7 K9 CK CK CKE/CKE0 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A1 A8 C1 C9 D2 E9 F1 H2 H9 ODTA1 CSA1#_0 RASA1# CASA1# WEA1# K1 L2 J3 K3 L3 ODT/ODT0 CS/CS0 RAS CAS WE DQSA6 DQSA7 F3 C7 DQSL DQSU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 DQMA6 DQMA7 E7 D3 DML DMU DQSA#6 DQSA#7 G3 B7 DQSL DQSU VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ B1 B9 D1 D8 E2 E8 F9 G1 G9 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDA61 MDA57 MDA63 MDA58 MDA60 MDA56 MDA62 MDA59 DQSA#[0..7] B2 D9 G7 K2 K8 N1 N9 R1 R9 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 +1.5VSG RESET NC/ODT1 NC/CS1 NC/CE1 NCZQ1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ B1 B9 D1 D8 E2 E8 F9 G1 G9 RV131 4.99K_0402_1% VGA@ ZQ/ZQ0 J1 L1 J9 L9 2 RV140 240_0402_1% VGA@ NC/ODT1 NC/CS1 NC/CE1 NCZQ1 RV141 240_0402_1% VGA@ 2 B 2 RESET L8 +VREFCA_A3 1 +VREFDQ_A3 2 CV68 0.1U_0402_16V7K VGA@ 1 RV137 4.99K_0402_1% VGA@ C +1.5VSG 1 +1.5VSG 2 CV71 0.1U_0402_16V7K VGA@ RV134 4.99K_0402_1% VGA@ 2 RV132 4.99K_0402_1% VGA@ 1 +VREFCA_A4 1 RV133 4.99K_0402_1% VGA@ +VREFDQ_A4 2 CV69 0.1U_0402_16V7K VGA@ 1 RV135 4.99K_0402_1% VGA@ 2 CV70 0.1U_0402_16V7K VGA@ 1 ZQ/ZQ0 J1 L1 J9 L9 VRAM_RST# T2 1 L8 RV136 4.99K_0402_1% VGA@ 2 VRAM_RST# T2 +1.5VSG RV130 4.99K_0402_1% VGA@ C 14,18,20,21 VRAM_RST# D Group7 +1.5VSG VDD VDD VDD VDD VDD VDD VDD VDD VDD 14,18 A_BA[0..2] 14,18 Group6 1 A_BA0 A_BA1 A_BA2 2 56_0402_1% DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 2 1 RV119 Group5 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3 1 CLKA1# MDA42 MDA44 MDA40 MDA46 MDA43 MDA45 MDA41 MDA47 Group4 VREFCA VREFDQ N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 2 VGA@ D7 C3 C8 C2 A7 A2 B8 A3 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 DQSA[0..7] 14,18 1 2 56_0402_1% A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3 MDA51 MDA52 MDA48 MDA53 MDA49 MDA54 MDA50 MDA55 2 1 RV70 DQMA[0..7] 14,18 E3 F7 F2 F8 H3 H8 G2 H7 1 CLKA1 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VREFCA VREFDQ N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 +VREFCA_A4 M8 +VREFDQ_A4 H1 2 VGA@ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 MDA38 MDA34 MDA39 MDA36 MDA35 MDA33 MDA37 MDA32 1 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 D E3 F7 F2 F8 H3 H8 G2 H7 2 +VREFCA_A3 M8 +VREFDQ_A3 H1 UV7 1 UV8 96-BALL SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96 @ B 96-BALL SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96 @ +1.5VSG +1.5VSG 10U_0603_6.3V6M 10U_0603_6.3V6M 1U_0402_6.3V6K 1 1 CV85 VGA@ 1 2 2 10U_0603_6.3V6M CV84 VGA@ 1 CV162 VGA@ 2 1U_0402_6.3V6K 1 2 CV163 VGA@ 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1 CV164 VGA@ 2 1U_0402_6.3V6K 1 2 CV165 VGA@ 1 2 CV166 VGA@ 1U_0402_6.3V6K CV87 VGA@ 1 2 2 10U_0603_6.3V6M CV86 VGA@ 1 CV167 VGA@ 2 1U_0402_6.3V6K 1 2 CV168 VGA@ 1 CV169 VGA@ 2 1U_0402_6.3V6K 1 2 CV170 VGA@ 1 2 CV171 VGA@ 1U_0402_6.3V6K A A Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: 5 4 3 2 Monday, July 04, 2011 Sheet 1 19 of 51 5 4 3 2 1 www.qdzbwx.com Memory Partition C - Lower 32 bits MDB[0..63] 14,21 MAB[0..13] 14,21 DQMB[0..7] 14,21 B_BA0 B_BA1 B_BA2 M2 N8 M3 BA0 BA1 BA2 CLKB0 CLKB0# CKEB0 J7 K7 K9 CK CK CKE/CKE0 ODTB0 CSB0#_0 RASB0# CASB0# WEB0# K1 L2 J3 K3 L3 ODT/ODT0 CS/CS0 RAS CAS WE DQSB3 DQSB0 F3 C7 DQSL DQSU DQMB3 DQMB0 E7 D3 DML DMU DQSB#3 DQSB#0 G3 B7 DQSL DQSU 2 56_0402_1% CV62 0.01U_0402_16V7K VGA@ 2 14 14 14 CLKB0 CLKB0# CKEB0 14 14 14 14 14 ODTB0 CSB0#_0 RASB0# CASB0# WEB0# +1.5VSG MDB16 MDB17 MDB19 MDB18 MDB23 MDB21 MDB22 MDB20 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDB13 MDB10 MDB15 MDB11 MDB12 MDB9 MDB14 MDB8 DQSB#[0..7] VDD VDD VDD VDD VDD VDD VDD VDD VDD B2 D9 G7 K2 K8 N1 N9 R1 R9 B_BA0 B_BA1 B_BA2 M2 N8 M3 BA0 BA1 BA2 CLKB0 CLKB0# CKEB0 J7 K7 K9 CK CK CKE/CKE0 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A1 A8 C1 C9 D2 E9 F1 H2 H9 ODTB0 CSB0#_0 RASB0# CASB0# WEB0# K1 L2 J3 K3 L3 ODT/ODT0 CS/CS0 RAS CAS WE DQSB2 DQSB1 F3 C7 DQSL DQSU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 DQMB2 DQMB1 E7 D3 DML DMU DQSB#2 DQSB#1 G3 B7 DQSL DQSU Group1 +1.5VSG +1.5VSG +1.5VSG VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ B1 B9 D1 D8 E2 E8 F9 G1 G9 VDD VDD VDD VDD VDD VDD VDD VDD VDD B2 D9 G7 K2 K8 N1 N9 R1 R9 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ B1 B9 D1 D8 E2 E8 F9 G1 G9 RV154 4.99K_0402_1% VGA@ RV160 4.99K_0402_1% VGA@ +VREFCA_B1 1 RV155 4.99K_0402_1% VGA@ RESET L8 ZQ/ZQ0 J1 L1 J9 L9 NC/ODT1 NC/CS1 NC/CE1 NCZQ1 VRAM_RST# T2 RESET L8 ZQ/ZQ0 J1 L1 J9 L9 NC/ODT1 NC/CS1 NC/CE1 NCZQ1 +VREFDQ_B1 2 CV80 0.1U_0402_16V7K VGA@ 1 RV161 4.99K_0402_1% VGA@ 2 +1.5VSG +1.5VSG C CV83 0.1U_0402_16V7K VGA@ 2 RV158 4.99K_0402_1% VGA@ 2 RV156 4.99K_0402_1% VGA@ RV157 4.99K_0402_1% VGA@ +VREFDQ_B2 1 1 +VREFCA_B2 1 2 CV81 0.1U_0402_16V7K VGA@ 1 RV159 4.99K_0402_1% VGA@ 2 VRAM_RST# T2 D Group2 2 14,18,19,21 VRAM_RST# 14,21 B_BA[0..2] 14,21 1 C 1 Group0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3 E3 F7 F2 F8 H3 H8 G2 H7 2 1 RV120 MDB3 MDB5 MDB2 MDB4 MDB1 MDB6 MDB0 MDB7 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 1 VGA@ CLKB0# D7 C3 C8 C2 A7 A2 B8 A3 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 Group3 VREFCA VREFDQ 2 2 56_0402_1% DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 +VREFCA_B2 M8 +VREFDQ_B2 H1 1 1 RV75 MDB31 MDB26 MDB29 MDB24 MDB28 MDB25 MDB30 MDB27 1 CLKB0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3 E3 F7 F2 F8 H3 H8 G2 H7 2 VGA@ N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 1 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 VREFCA VREFDQ 2 +VREFCA_B1 M8 +VREFDQ_B1 H1 D DQSB[0..7] 14,21 UV10 1 UV9 2 CV82 0.1U_0402_16V7K VGA@ 1 B 1 B RV143 240_0402_1% VGA@ 2 2 RV142 240_0402_1% VGA@ 96-BALL SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96 @ 96-BALL SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96 @ +1.5VSG +1.5VSG 10U_0603_6.3V6M 10U_0603_6.3V6M 1U_0402_6.3V6K 1 1 CV89 VGA@ 1 2 2 10U_0603_6.3V6M CV88 VGA@ 1 CV172 VGA@ 2 1U_0402_6.3V6K 1 CV173 VGA@ 2 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1 CV174 VGA@ 2 1U_0402_6.3V6K 1 2 CV175 VGA@ 1 2 CV176 VGA@ 1U_0402_6.3V6K CV91 VGA@ 1 2 2 10U_0603_6.3V6M CV90 VGA@ 1 CV177 VGA@ 2 1U_0402_6.3V6K 1 2 CV178 VGA@ 1 CV179 VGA@ 2 1U_0402_6.3V6K 1 2 CV180 VGA@ 1 2 CV182 VGA@ 1U_0402_6.3V6K A A Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: 5 4 3 2 Monday, July 04, 2011 Sheet 1 20 of 51 5 4 3 2 1 www.qdzbwx.com Memory Partition C - Upper 32 bits MDB[0..63] 14,20 MAB[0..13] 14,20 2 56_0402_1% CV63 0.01U_0402_16V7K VGA@ 1 2 14 14 14 14 14 ODTB1 CSB1#_0 RASB1# CASB1# WEB1# 14,18,19,20 VRAM_RST# CK CK CKE/CKE0 ODTB1 CSB1#_0 RASB1# CASB1# WEB1# K1 L2 J3 K3 L3 ODT/ODT0 CS/CS0 RAS CAS WE DQSB6 DQSB5 F3 C7 DQSL DQSU DQMB6 DQMB5 E7 D3 DML DMU DQSB#6 DQSB#5 G3 B7 DQSL DQSU VRAM_RST# T2 RESET L8 ZQ/ZQ0 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A1 A8 C1 C9 D2 E9 F1 H2 H9 ODTB1 CSB1#_0 RASB1# CASB1# WEB1# K1 L2 J3 K3 L3 ODT/ODT0 CS/CS0 RAS CAS WE DQSB4 DQSB7 F3 C7 DQSL DQSU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 DQMB4 DQMB7 E7 D3 DML DMU DQSB#4 DQSB#7 G3 B7 DQSL DQSU VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ B1 B9 D1 D8 E2 E8 F9 G1 G9 VRAM_RST# T2 RESET L8 ZQ/ZQ0 J1 L1 J9 L9 NC/ODT1 NC/CS1 NC/CE1 NCZQ1 1 B J1 L1 J9 L9 NC/ODT1 NC/CS1 NC/CE1 NCZQ1 2 RV144 240_0402_1% VGA@ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A1 A8 C1 C9 D2 E9 F1 H2 H9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ B1 B9 D1 D8 E2 E8 F9 G1 G9 1 2 RV152 4.99K_0402_1% VGA@ RV147 4.99K_0402_1% VGA@ +VREFDQ_B3 1 +VREFCA_B3 1 2 CV76 0.1U_0402_16V7K VGA@ 1 RV153 4.99K_0402_1% VGA@ 2 +1.5VSG +1.5VSG CV79 0.1U_0402_16V7K VGA@ C RV148 4.99K_0402_1% VGA@ RV150 4.99K_0402_1% VGA@ +VREFCA_B4 1 RV149 4.99K_0402_1% VGA@ +VREFDQ_B4 2 CV77 0.1U_0402_16V7K VGA@ 1 RV151 4.99K_0402_1% VGA@ 2 CV78 0.1U_0402_16V7K VGA@ B RV145 240_0402_1% VGA@ 96-BALL SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96 @ 96-BALL SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96 @ +1.5VSG +1.5VSG 10U_0603_6.3V6M 1 CK CK CKE/CKE0 RV146 4.99K_0402_1% VGA@ B2 D9 G7 K2 K8 N1 N9 R1 R9 2 1 RV121 J7 K7 K9 VDD VDD VDD VDD VDD VDD VDD VDD VDD +1.5VSG 1 CLKB1# CLKB1 CLKB1# CKEB1 CLKB1 CLKB1# CKEB1 +1.5VSG 2 14 14 14 VGA@ BA0 BA1 BA2 Group7 1 J7 K7 K9 M2 N8 M3 MDB63 MDB59 MDB57 MDB62 MDB58 MDB60 MDB56 MDB61 2 CLKB1 CLKB1# CKEB1 B2 D9 G7 K2 K8 N1 N9 R1 R9 D Group4 +1.5VSG 2 C 2 56_0402_1% VDD VDD VDD VDD VDD VDD VDD VDD VDD D7 C3 C8 C2 A7 A2 B8 A3 14,20 B_BA[0..2] 14,20 1 1 RV81 B_BA0 B_BA1 B_BA2 +1.5VSG VGA@ CLKB1 Group5 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQSB#[0..7] 1 BA0 BA1 BA2 MDB45 MDB41 MDB47 MDB40 MDB44 MDB42 MDB46 MDB43 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 2 M2 N8 M3 D7 C3 C8 C2 A7 A2 B8 A3 Group6 VREFCA VREFDQ N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 1 B_BA0 B_BA1 B_BA2 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 DQSB[0..7] 14,20 MDB37 MDB35 MDB36 MDB34 MDB38 MDB32 MDB39 MDB33 2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 1 VREFCA VREFDQ N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 +VREFCA_B4 M8 +VREFDQ_B4 H1 2 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 MDB49 MDB55 MDB48 MDB53 MDB51 MDB52 MDB50 MDB54 1 D DQMB[0..7] 14,20 UV12 E3 F7 F2 F8 H3 H8 G2 H7 2 UV11 +VREFCA_B3 M8 +VREFDQ_B3 H1 CV93 VGA@ 1 2 2 10U_0603_6.3V6M CV92 VGA@ 1U_0402_6.3V6K 1 CV183 VGA@ 2 1U_0402_6.3V6K 1 2 CV184 VGA@ 1U_0402_6.3V6K 1 CV185 VGA@ 2 1U_0402_6.3V6K 1 2 CV186 VGA@ 10U_0603_6.3V6M 1 2 1 CV187 VGA@ 1U_0402_6.3V6K CV95 VGA@ 1 2 2 10U_0603_6.3V6M CV94 VGA@ 1U_0402_6.3V6K 1 CV188 VGA@ 2 1U_0402_6.3V6K 1 2 CV189 VGA@ 1U_0402_6.3V6K 1 1 CV190 VGA@ 2 1U_0402_6.3V6K CV191 VGA@ 2 1 2 CV192 VGA@ 1U_0402_6.3V6K A A Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: 5 4 3 2 Monday, July 04, 2011 Sheet 1 21 of 51 C U1A D Input from external clock generator NC for internal clock generator 7 APU_DISP_CLKP 7 APU_DISP_CLKN 27 TRAVIS_CLK 27 TRAVIS_CLK# LVDS IC 7 7 APU APU_CLKP APU_CLKN 12 CLK_PEG_VGA 12 CLK_PEG_VGA# VGA 34 34 Cardreader 32 32 WLAN CLK_CR CLK_CR# JET 32 32 CLK_JET CLK_JET# 35 35 USB3.0 TRAVIS_CLK TRAVIS_CLK# H33 H31 DISP2_CLKP DISP2_CLKN APU_CLKP APU_CLKN T24 T23 APU_CLKP APU_CLKN CLK_PEG_VGA CLK_PEG_VGA# J30 K29 SLT_GFX_CLKP SLT_GFX_CLKN CLK_CR CLK_CR# H27 H28 GPP_CLK0P GPP_CLK0N J27 K26 GPP_CLK1P GPP_CLK1N F33 F31 GPP_CLK2P GPP_CLK2N CLK_LAN CLK_LAN# E33 E31 GPP_CLK3P GPP_CLK3N CLK_JET CLK_JET# M23 M24 GPP_CLK4P GPP_CLK4N M27 M26 GPP_CLK5P GPP_CLK5N N25 N26 GPP_CLK6P GPP_CLK6N R23 R24 GPP_CLK7P GPP_CLK7N N27 R27 GPP_CLK8P GPP_CLK8N CLK_USB30 CLK_USB30# CLK_USB30 CLK_USB30# J26 2 27P_0402_50V8J 25M_X1 C31 R229 1M_0402_5% C230 1 2 25M_X2 C33 CROSS_EN# B25 LPC_CLK0 R255 1 2 22_0402_5% D25 D27 C28 A26 A29 A31 B27 AE27 AE19 LPC_CLK1 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# R258 1 2 22_0402_5% G25 E28 E26 G26 F26 DMA_ACTIVE# APU_PROCHOT#_R 1 APU_PWRGD R259 25M_X1 150P_0402_50V8J LPCCLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1#/CLK_REQ6#/GPIO49 SERIRQ/GPIO48 DMA_ACTIVE# PROCHOT# APU_PG LDT_STP# APU_RST# S5_CORE_EN RTCCLK INTRUDER_ALERT# VDDBT_RTC_G H7 F1 F3 E6 32K_X1 G2 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 VGA_PWRGD_R PCI_AD23 25 Strap PCI_AD24 25 PCI_AD25 25 PCI_AD26 25 PCI_AD27 25 1 2 R254 PXS@ 0_0402_5% R126 1K_0402_5% EDP@ 2 3D_EN# PXS_EN# FELICA_PWR 2 R72 NC 3 1 OSC NC 2 L SKU Non-3D 3D(LVDS/eDP) PXS_EN# H SKU R252 1 PXS@ 2 0_0402_5% R253 1 PXS@ 2 0_0402_5% CLKREQ_USB30# 35 1 R283 2 8.2K_0402_5% H L NonCrossFire SKU PXS_RST# 12 PXS_PWREN 17,40 CrossFire 2 PXS@ 1 R257 10K_0402_5% +3VS +1.5VS +3VS Strap CLK_PCI_DDR 25,38 LPC_AD0 37,38 LPC_AD1 37,38 LPC_AD2 37,38 LPC_AD3 37,38 LPC_FRAME# 37,38 SERIRQ R270 10K_0402_5% CLK_PCI_EC 25,37 4.7K_0402_5% APU_PWRGD 3 Q46 1 APU_PWRGD_L 49 SERIRQ 37,38 +RTCBATT DMA active. The FCH drives the DMA_ACTIVE# to APU to notify DMA activity. This will cause the APU 2 C231 to reestablish the UMI link quicker. DMA_ACTIVE# 7 APU_PROCHOT# 7 APU_PWRGD 7 2 0_0402_5% APU_RST# 22P_0402_50V8J @ APU_RST# 7 T25 RTC_CLK_R 1 R260 2 0_0402_5% RTC_CLK 25,37 Strap S5_CORE_EN is for S5+ mode used to turn off +1.1VALW and +3VALW of FCH on S5+ mode 1 Reserver for ESD test +RTCBATT +RTCVCC_R 32K_X1 32K_X2 R271 1 2 120_0402_5% 20 mils C250 D13 BAS40-04_SOT23-3 1 2 1 2 R355 R268 1 2+RTCBATT_R 1 2+RTCBATT_D 120_0402_5% 1K_0402_5% C252 1U_0402_6.3V6K JCMOS @ 1 2 +3VL C256 4 0.1U_0402_16V4Z 2011/01/06 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 32K_X2 2012/01/06 Deciphered Date Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: A B C 3 MMBT3904_NL_SOT23-3 +RTCVCC G4 2 CROSS_EN# (Internal 8.2K PU) 1 100K_0402_5% For PowerXpress PXS_RST#_R PXS_PWREN_R L NonPowerXpress PowerXpress CMOS Setting Place under DDR Door 32.768KHZ_12.5PF_Q13MC14610002 18P_0402_50V8J H CROSS_EN# 3D_EN# PXS_EN# Y2 OSC 3D_EN# PXS_EN# (Internal 15K PU) 32K_X1 1 2 C249 1 VGA_PWRGD 17,40,48 CROSSEN@ 2 1 R135 1K_0402_5% 2 3D@ 1 R126 1K_0402_5% 2 PXSEN@1 R85 1K_0402_5% CROSS_EN# 0.1U_0402_16V4Z 4 R224 100K_0402_5% @ 2 FELICA_PWR 4 2 18P_0402_50V8J 1 For PowerXpress 25M_X2 32K_X2 1 LPC_RST# 37,38 3D_EN# (Internal 15K PU) 27P_0402_50V8J R230 20M_0402_5% 2 33_0402_5% C222 HUDSON-M3_FCBGA656 C248 1 R226 1 R269 LPCCLK0 2 Y1 25MHZ_20PF_7A25000012 AF18 AE18 AC16 AD18 14M_25M_48M_OSC 1 C220 1 INTE#/GPIO32 INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35 A_RST# is for LPC devices LPC_RST#_R C CLK_LAN CLK_LAN# DISP_CLKP DISP_CLKN 2 E 33 33 PCIE_RCLKP PCIE_RCLKN R26 T26 150P_0402_50V8J AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31 CBE0# CBE1# CBE2# CBE3# FRAME# DEVSEL# IRDY# TRDY# PAR STOP# PERR# SERR# REQ0# REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42 GNT0# GNT1#/GPO44 GNT2#/SD_LED/GPO45 GNT3#/CLK_REQ7#/GPIO46 CLKRUN# LOCK# AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10 AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9 B LAN G30 G28 CLK_WLAN CLK_WLAN# CLK_WLAN CLK_WLAN# CLK_CALRN APU_DISP_CLKP APU_DISP_CLKN APU_PCIE_RST# 12,27,32,33 R223 100K_0402_5% @ 2 F27 AB5 1 2 2 2K_0402_1% CLK_CALRN C221 1 GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N 2 33_0402_5% 1 AA27 AA26 W27 V27 V26 W26 W24 W23 PCIE_MRX_C_USBTX_P1 PCIE_MRX_C_USBTX_N1 PCIE_MRX_C_CRTX_P2 PCIE_MRX_C_CRTX_N2 R225 1 3 GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N PCIE_MTX_USBRX_P1 PCIE_MTX_USBRX_N1 PCIE_MTX_CRRX_P2 PCIE_MTX_CRRX_N2 APU_PCIE_RST#_R Strap PCI_CLK3 25 PCI_CLK4 25 1 PCIE_CALRP PCIE_CALRN V33 V31 W30 W32 AB26 AB27 AA24 AA23 PCI_CLK3 PCI_CLK4 2 AF29 AF31 PCI_CLK1 25 1 UMI_RX0P UMI_RX0N UMI_RX1P UMI_RX1N UMI_RX2P UMI_RX2N UMI_RX3P UMI_RX3N PCIE_RST# is for PCIE devices on APU PCI_CLK1 1 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K R228 1 APU Display 3 AB33 AB31 AB28 AB29 Y33 Y31 Y28 Y29 PCIRST# AF3 AF1 AF5 AG2 AF6 2 2 RENE@ 1 2 1RENE@ 2 1 2 1 2 SS SS UMI_FTX_C_MRX_P0 UMI_FTX_C_MRX_N0 UMI_FTX_C_MRX_P1 UMI_FTX_C_MRX_N1 UMI_FTX_C_MRX_P2 UMI_FTX_C_MRX_N2 UMI_FTX_C_MRX_P3 UMI_FTX_C_MRX_N3 2 590_0402_1% PCIE_CALRP 2 2K_0402_1% PCIE_CALRN PCIE_MRX_C_USBTX_P1 PCIE_MRX_C_USBTX_N1 PCIE_MRX_C_CRTX_P2 PCIE_MRX_C_CRTX_N2 +1.1VS_CKVDD NSS UMI_TX0P UMI_TX0N UMI_TX1P UMI_TX1N UMI_TX2P UMI_TX2N UMI_TX3P UMI_TX3N PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38 PCICLK4/14M_OSC/GPO39 1 2 AE30 AE32 AD33 AD31 AD28 AD29 AC30 AC32 PCI INTERFACE 35 35 34 34 C214 C215 C216 C219 PCIE_MTX_C_USBRX_P1 PCIE_MTX_C_USBRX_N1 PCIE_MTX_C_CRRX_P2 PCIE_MTX_C_CRRX_N2 UMI_MTX_FRX_P0 UMI_MTX_FRX_N0 UMI_MTX_FRX_P1 UMI_MTX_FRX_N1 UMI_MTX_FRX_P2 UMI_MTX_FRX_N2 UMI_MTX_FRX_P3 UMI_MTX_FRX_N3 LPC Cardreader 35 35 34 34 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K R220 1 R221 1 +PCIE_VDDR_FCH USB3.0 2 2 2 2 2 2 2 2 APU UMI_FTX_C_MRX_P0 UMI_FTX_C_MRX_N0 UMI_FTX_C_MRX_P1 UMI_FTX_C_MRX_N1 UMI_FTX_C_MRX_P2 UMI_FTX_C_MRX_N2 UMI_FTX_C_MRX_P3 UMI_FTX_C_MRX_N3 1 1 1 1 1 1 1 1 S5 PLUS 5 5 5 5 5 5 5 5 C202 C203 C204 C209 C210 C211 C213 C212 PCI EXPRESS INTERFACES UMI_MTX_C_FRX_P0 UMI_MTX_C_FRX_N0 UMI_MTX_C_FRX_P1 UMI_MTX_C_FRX_N1 UMI_MTX_C_FRX_P2 UMI_MTX_C_FRX_N2 UMI_MTX_C_FRX_P3 UMI_MTX_C_FRX_N3 PCIE_RST# A_RST# CLOCK GENERATOR 1 5 5 5 5 5 5 5 5 AE2 AD5 PCI CLKS HUDSON-2 APU_PCIE_RST#_R LPC_RST#_R E www.qdzbwx.com HUDM3R3@ 2 B 2 A D Sheet Monday, July 04, 2011 E 22 of 51 1 R301 2 VGA@ 1 R295 1K_0402_5% GATEA20 GATEA20 AE22 KB_RST# EC_SCI# EC_SMI# AG19 R9 C26 T5 U4 FCH_PCIE_WAKE# K1 33,35 FCH_PCIE_WAKE# T67 V7 H_THERMTRIP# R10 WD_PWRGD AF19 1 2 +3VS R279 10K_0402_5% EC_RSMRST# U2 37 EC_RSMRST# 37 37 37 7 H_THERMTRIP# @ KB_RST# EC_SCI# EC_SMI# T69 CLKREQ_JET# CLKREQ_LAN#_R 32 CLKREQ_JET# 2 RB751V40_SC76-2 2 0_0402_5% 1 D17 1 R361 33 CLKREQ_LAN# CLKREQ_CR# FCH_SPKR FCH_SCLK0 FCH_SDATA0 FCH_SCLK1 FCH_SDATA1 CLKREQ_WLAN# 36 FCH_SPKR 10,11,32 FCH_SCLK0 10,11,32 FCH_SDATA0 SM Bus 0-->S0 PWR domain SM Bus 1-->S5 PWR domain (for ASF device only) 32 CLKREQ_WLAN# T30 2 VGA_PD: Support CRT power saving 25 L: MLDAC power on H: MLDAC power off R292 1 VGA_PD @ 2 0_0402_5% VGA_PD_FCH T65 HDMI_HPD_FCH_R PEG_CLKREQ# 13 PEG_CLKREQ# 35 Internal PU 10K USB_OC1# is for USB port2 USB30_SMI# USB30_SMI# 31 ODD_PLUGIN# ODD_DA#_FCH USB_OC3# CR_CPPE# USB_OC1# USB_OC0# 37 USB_OC3# 34 CR_CPPE# 32,35,37 USB_OC1# 31,37 USB_OC0# AG24 AE24 AE26 AF22 AH17 AG18 AF24 AD26 AD25 T7 R7 AG25 AG22 J2 AG26 V8 W8 Y6 V10 AA8 AF25 M7 R8 T1 P6 F5 P5 J7 T8 USB_OC0# is for USB port0 and port1 R320 1 R321 1 36 AZ_BITCLK_HD 36 AZ_SDOUT_HD 36 AZ_SDIN0_HD R322 1 R323 1 36 AZ_SYNC_HD 36 AZ_RST_HD# 2 33_0402_5% 2 33_0402_5% HDA_BITCLK HDA_SDOUT AZ_SDIN0_HD HDA_SYNC HDA_RST# 2 33_0402_5% 2 33_0402_5% AB3 AB1 AA2 Y5 Y3 Y1 AD6 AE4 USB MISC USB 1.1 TEST0 TEST1/TMS TEST2 GA20IN/GEVENT0# KBRST#/GEVENT1# LPC_PME#/GEVENT3# LPC_SMI#/GEVENT23# LPC_PD#/GEVENT5# SYS_RESET#/GEVENT19# WAKE#/GEVENT8# IR_RX1/GEVENT20# THRMTRIP#/SMBALERT#/GEVENT2# WD_PWRGD USB_RCOMP B9 USB_FSD1P/GPIO186 USB_FSD1N H1 H3 USB_FSD0P/GPIO185 USB_FSD0N H6 H5 BLINK/USB_OC7#/GEVENT18# USB_OC6#/IR_TX1/GEVENT6# USB_OC5#/IR_TX0/GEVENT17# USB_OC4#/IR_RX0/GEVENT16# USB_OC3#/AC_PRES/TDO/GEVENT15# USB_OC2#/TCK/GEVENT14# USB_OC1#/TDI/GEVENT13# USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12# AZ_BITCLK AZ_SDOUT AZ_SDIN0/GPIO167 AZ_SDIN1/GPIO168 AZ_SDIN2/GPIO169 AZ_SDIN3/GPIO170 AZ_SYNC AZ_RST# CR_CPPE# @ 1 R332 USB_OC3# VGA_PD_FCH FCH_SCLK1 ACIN_FCH# FCH_SDATA1 Change to low active for AC_IN LED issue FCH_PCIE_WAKE# USB30_SMI# 13,37,39,43 ACIN Q191 2 G 2N7002_SOT23-3 USB_OC0# 1 EC_LID_OUT# T33 T32 T35 T34 T37 T36 T38 T39 T45 T44 T46 T47 T41 T40 T42 T43 T49 T48 S USB_OC1# ACIN_FCH# @ B11 D11 USB_HSD8P USB_HSD8N E10 F10 USB_HSD7P USB_HSD7N C10 A10 USB_HSD6P USB_HSD6N H9 G9 USB_HSD5P USB_HSD5N A8 C8 USB_HSD4P USB_HSD4N F8 E8 USB_HSD3P USB_HSD3N C6 A6 USB_HSD2P USB_HSD2N C5 A5 USB20_P2 USB20_N2 USB_HSD1P USB_HSD1N C1 C3 USB20_P1 USB20_N1 USB_HSD0P USB_HSD0N E1 E3 USB20_P0 USB20_N0 USBSS_CALRP USBSS_CALRN C16 A16 USBSS_CALRP USBSS_CALRN USB_SS_TX3P USB_SS_TX3N A14 C14 PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192 EMBEDDED CTRL KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217 KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226 C12 A12 USB_SS_TX2P USB_SS_TX2N D15 B15 USB_SS_RX2P USB_SS_RX2N E14 F14 USB_SS_TX1P USB_SS_TX1N F15 G15 Hudson-M3 XHCI (DEV-16, FUN-0) XHCI (DEV-16, FUN-1) USB 3.0 (For Hudson M3 only) USB20_P10 32 USB20_N10 32 Remove Felica USB20_P8 USB20_N8 USB20_P8 32 USB20_N8 32 WLAN (BT) Hudson-M2/M3 OHCI (DEV-19, FUN-0) EHCI (DEV-19, FUN-2) Remove Finger Printer Remove 3G/TV #1 USB20_P5 USB20_N5 USB20_P5 28 USB20_N5 28 Int. Camera Hudson-M2/M3 OHCI (DEV-18, FUN-0) EHCI (DEV-18, FUN-2) Remove TV #2 USB20_P2 31 USB20_N2 31 USB-Left USB20_P1 31 USB20_N1 31 USB-Right2 USB20_P0 31 USB20_N0 31 USB-Right1 R330 1 M3@ R334 1 M3@ 2 2 1K_0402_1% 2 1K_0402_1% +VDDANCR_11_SSUSB Hudson-M3 XHCI (DEV-16, FUN-0) XHCI (DEV-16, FUN-1) J15 K15 USB30_RX0P USB30_RX0N SCL2/GPIO193 SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196 EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 EC_PWM3/EC_TIMER3/GPIO200 H19 G19 G22 G21 E22 H22 J22 H21 R326 1 R328 1 FCH_SIC FCH_SID KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208 K21 K22 F22 F24 E24 B23 C24 F18 USB30_TX0P 35 USB30_TX0N 35 USB 3.0 (For Hudson M3 only) USB30_RX0P 35 USB30_RX0N 35 2 10K_0402_5% 2 10K_0402_5% 1 2 R338 1 2 0_0402_5% R343 0_0402_5% EC_PWM2 3 +3VALW EC_PWM2 25 APU_SIC 7,9 APU_SID 7,9 SB-TSI Strap +3VALW +3VS +3VS R312 10K_0402_5% @ Place R425 and C363 close to FCH for ESD ODD_DA#_FCH 1 2 ODD_DA#_Q R425 0_0402_5% 1 C379 0.1U_0402_16V4Z R311 10K_0402_5% Q208 1 3 ODD_DA# 31 2N7002_SOT23-3 2 FCH_SDATA0 HUDSON-M3_FCBGA656 +3VALW CLKREQ_WLAN# CLKREQ_JET# CLKREQ_CR# 2 R282 CLKREQ_LAN#_R Set cardreader clock as free-running +3VS CEC@ Q192 1 1K_0402_5% EC_RSMRST# 1 100K_0402_5% HDA_BITCLK 2 10K_0402_5% AZ_SDIN0_HD 2 10K_0402_5% R331 10K_0402_5% @ For FCH internal debug use (Internal 10K pull-down) 1 R273 1 R274 1 R275 @ @ @ 2 2.2K_0402_5% 2 2.2K_0402_5% 2 2.2K_0402_5% TEST0 TEST1 TEST2 3 9,30 HDMI_HPD 1 D +3VALW S 2 R280 @ 1 R324 @ 1 R325 USB_HSD9P USB_HSD9N USB20_P10 USB20_N10 USB_SS_RX0P USB_SS_RX0N G @ K12 K13 2 @ USB_HSD10P USB_HSD10N USB30_TX0P USB30_TX0N 1 @ G12 F12 USB_SS_TX0P USB_SS_TX0N 2 4 F21 E20 F20 A22 E18 A20 J18 H18 G18 B21 K18 D19 A18 C18 B19 B17 A24 D17 USB_HSD11P USB_HSD11N 1 Hudson-M2 OHCI (DEV-22, FUN-0) EHCI (DEV-22, FUN-2) H13 G13 PS2_DAT/SDA4/GPIO187 PS2_CLK/CEC/SCL4/GPIO188 SPI_CS2#/GBE_STAT2/GPIO166 D FCH_SCLK0 2 2.2K_0402_5% 2 2.2K_0402_5% 2 8.2K_0402_5% 2 8.2K_0402_5% 2 8.2K_0402_5% 2 8.2K_0402_5% D21 C20 D23 C22 K10 J12 J16 H16 H_THERMTRIP# +3VS 1 R286 1 R287 1 R291 1 R290 1 R281 1 R284 K19 J19 J21 USB_HSD12P USB_HSD12N 1 2 10K_0402_5% T26 T27 CIR@ 2 1 CIR_EN# R442 1K_0402_5% 3 3 1 2 R421 10K_0402_5% @ 1 2 R293 10K_0402_5% 1 2 R278 10K_0402_5% 1 2 R288 10K_0402_5% 1 2 R289 10K_0402_5% @ 1 2 R272 10K_0402_5% 1 2 R276 10K_0402_5% 1 RENE@ 2 R306 10K_0402_5% 1 2 R318 10K_0402_5% 1 2 R319 10K_0402_5% @ 1 2 R436 330K_0402_5% H10 G10 USB_SS_RX3P USB_SS_RX3N 2 11.8K_0402_1% Hudson-M2/M3 OHCI (DEV-20, FUN-5) USB_SS_RX1P USB_SS_RX1N +3VALW R329 1 USB_HSD13P USB_HSD13N RSMRST# CLK_REQ4#/SATA_IS0#/GPIO64 CLK_REQ3#/SATA_IS1#/GPIO63 SMARTVOLT1/SATA_IS2#/GPIO50 CLK_REQ0#/SATA_IS3#/GPIO60 SATA_IS4#/FANOUT3/GPIO55 SATA_IS5#/FANIN3/GPIO59 SPKR/GPIO66 SCL0/GPIO43 SDA0/GPIO47 SCL1/GPIO227 SDA1/GPIO228 CLK_REQ2#/FANIN4/GPIO62 CLK_REQ1#/FANOUT4/GPIO61 IR_LED#/LLB#/GPIO184 SMARTVOLT2/SHUTDOWN#/GPIO51 DDR3_RST#/GEVENT7#/VGA_PD GBE_LED0/GPIO183 SPI_HOLD#/GBE_LED1/GEVENT9# GBE_LED2/GEVENT10# GBE_STAT0/GEVENT11# CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_RCOMP 2 37 PEG_CLKREQ# 2 8.2K_0402_5% @ T9 T10 V9 USBCLK/14M_25M_48M_OSC S +3VS TEST0 TEST1 TEST2 ACPI / WAKE UP EVENTS 1 PCIE_RST2#/PCI_PME#/GEVENT4# RI#/GEVENT22# SPI_CS3#/GBE_STAT1/GEVENT21# SLP_S3# SLP_S5# PWR_BTN# PWR_GOOD G8 USB 2.0 37 SLP_S3# 37 SLP_S5# 37 PBTN_OUT# 37 FCH_PWRGD AB6 R2 W7 T3 W2 J4 N7 GPIO 34,35 FCH_PCIE_RST# www.qdzbwx.com HUDM3R3@ HUDSON-2 FCH_PCIE_RST#_R EC_LID_OUT# T68 SLP_S3# SLP_S5# PBTN_OUT# FCH_PWRGD 1 U1D R222 33_0402_5% 1 2 37 EC_LID_OUT# E D 1 100K_0402_5% 2 150P_0402_50V8J USB OC @ 1 HD AUDIO C19 D USB 3.0 R227 2 C 2 G B PCIE_RST2# is for PCIE devices on FCH 2 A 4 1 CEC@ 2HDMI_HPD_FCH_R R419 0_0402_5% 2N7002_SOT23-3 2011/01/06 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2012/01/06 Deciphered Date Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: A B C D Monday, July 04, 2011 Sheet E 23 of 51 A B C U1B D 31 SATA_FTX_DRX_P1 31 SATA_FTX_DRX_N1 ODD 31 SATA_FRX_C_DTX_N1 31 SATA_FRX_C_DTX_P1 31 SATA_FTX_DRX_P2 31 SATA_FTX_DRX_N2 2nd HDD 31 SATA_FRX_C_DTX_N2 31 SATA_FRX_C_DTX_P2 SATA_FRX_C_DTX_N0 SATA_FRX_C_DTX_P0 AL20 AN20 SATA_RX0N SATA_RX0P SATA_FTX_DRX_P1 SATA_FTX_DRX_N1 AN22 AL22 SATA_TX1P SATA_TX1N SATA_FRX_C_DTX_N1 SATA_FRX_C_DTX_P1 AH20 AJ20 SATA_RX1N SATA_RX1P SATA_FTX_DRX_P2 SATA_FTX_DRX_N2 AJ22 AH22 SATA_TX2P SATA_TX2N SATA_FRX_C_DTX_N2 SATA_FRX_C_DTX_P2 AM23 AK23 SATA_RX2N SATA_RX2P AH24 AJ24 SATA_TX3P SATA_TX3N AN24 AL24 SATA_RX3N SATA_RX3P AL26 AN26 SATA_TX4P SATA_TX4N AJ26 AH26 SATA_RX4N SATA_RX4P AN29 AL28 SATA_TX5P SATA_TX5N AK27 AM27 SATA_RX5N SATA_RX5P AL29 AN31 NC6 NC7 AL31 AL33 NC8 NC9 +1.5V E @ Q33 1 FCH_ALERT# C MMBT3904_NL_SOT23-3 AH33 AH31 AJ33 AJ31 SPI ROM R437 10K_0402_5% 2 2 2 B 3 7 APU_ALERT# 1 1 +3VALW R285 10K_0402_5% @ NC12 NC13 To avoid LED flashing +5VS 1 R444 2 R446 SATA_LED# 2 10K_0402_5% 1 20K_0402_5% 2 R336 2 R337 +AVDD_SATA 39 SATA_CALRP 1 1K_0402_1% SATA_CALRN 1 1K_0402_1% SATA_LED# SATA_LED# AF28 SATA_CALRP AF27 SATA_CALRN AD22 SATA_ACT#/GPIO67 AF21 VGA MAINLINK 2 SATA_X1 +3VALW 1 R434 2 10K_0402_5% CR_WAKE#_R AG21 SATA_X2 +3VS @ 1 R339 @ 1 R340 @ 1 R344 1 R363 1 R447 2 8.2K_0402_5% 2 8.2K_0402_5% 2 8.2K_0402_5% 2 8.2K_0402_5% WL_OFF# 2 100K_0402_5% ODD_PWR 1 HDMI_EN# AC4 AD3 AD9 W10 AB8 AH7 AF7 AE7 AD7 AG8 AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7 W9 GBE_COL GBE_CRS R346 1 R347 1 GBE_MDIO 1 R345 2 10K_0402_5% 1 R348 2 10K_0402_5% GBE_PHY_INTR 1 R352 2 10K_0402_5% HDMI_EN# GBE_RXERR V6 V5 V3 T6 V1 FCH_SPI_MISO FCH_SPI_MOSI FCH_SPI_CLK FCH_SPI_CS1# L30 UMA_CRT_R L32 UMA_CRT_G VGA_BLUE M29 UMA_CRT_B VGA_HSYNC/GPO68 VGA_VSYNC/GPO69 M28 N30 UMA_CRT_HSYNC UMA_CRT_VSYNC VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71 M33 N32 UMA_CRT_DATA UMA_CRT_CLK UMA_CRT_B 29 UMA_CRT_HSYNC 29 UMA_CRT_VSYNC 29 K31 VGA_DAC_RSET 1 R366 ML_VGA_AUXP ML_VGA_AUXN AUXCAL U28 AUXCAL ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N T31 T33 T29 T28 R32 R30 P29 P28 ML_VGA_TXP0 ML_VGA_TXN0 ML_VGA_TXP1 ML_VGA_TXN1 ML_VGA_TXP2 ML_VGA_TXN2 ML_VGA_TXP3 ML_VGA_TXN3 FCH_CRT_HPD VIN1/GPIO176 M3 1 R101 LOGO_LED VIN2/SDATI_1/GPIO177 L2 WL_BT_LED VIN3/SDATO_1/GPIO178 N4 VIN4/SLOAD_1/GPIO179 P1 1 R106 SLP_CHG_M3 VIN5/SCLK_1/GPIO180 P3 SLP_CHG# VIN6/GBE_STAT3/GPIO181 M1 VIN7/GBE_LED3/GPIO182 M5 PW_CLEAR# ODD_PWR BT_ON# 32 32 34 WL_OFF# 3G_OFF# ODD_PWR BT_ON# AH16 AM15 AJ16 FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54 PW_CLEAR# WL_OFF# 3G_OFF# AK15 AN16 AL16 FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58 K6 2 10K_0402_5% CR_WAKE# 2 1 CR_WAKE#_R RB751V40_SC76-2 1 2 R103 10K_0402_5% Place JPW under DDR Door R367 1 UMA@ 2 150_0402_1% UMA_CRT_G R368 1 UMA@ 2 150_0402_1% UMA_CRT_B R369 1 UMA@ 2 150_0402_1% 2 2 715_0402_1% ML_VGA_AUXP 7 ML_VGA_AUXN 7 1 R364 2 100_0402_1% +FCH_VDDAN_11_MLDAC ML_VGA_TXP0 ML_VGA_TXN0 ML_VGA_TXP1 ML_VGA_TXN1 ML_VGA_TXP2 ML_VGA_TXN2 ML_VGA_TXP3 ML_VGA_TXN3 7 7 7 7 7 7 7 7 FCH_CRT_HPD +FCH_VDDAN_33_DAC_R HW MONITOR TEMPIN0/GPIO171 FCH_ALERT# K5 TEMPIN1/GPIO172 K3 TEMPIN2/GPIO173 M6 TEMPIN3/TALERT#/GPIO174 1 R115 1 R114 2 FCH_CRT_HPD 1 UMA@ 2 R365 10K_0402_5% SLP_CHG_M3 1 R418 1 R420 2 10K_0402_5% 2 10K_0402_5% 1 R449 2 10K_0402_5% 9 10K_0402_5% LOGO_LED 39 2 SLP_CHG# 10K_0402_5% SLP_CHG_M3 32 LOGO_LED SLP_CHG# 32 2 2 3 10K_0402_5% 10K_0402_5% AG16 AH10 A28 G27 L4 NC1 NC2 NC3 NC4 NC5 6 Q32A FCH_SPI_MOSI FCH_SPI_CLK FCH_SPI_CS1# FCH_SPI_MISO +3VS 1A 2A 3A 4A 14 VCC FCH_SPI_MOSI FCH_SPI_CLK FCH_SPI_CS1# FCH_SPI_MISO 1B 2B 3B 4B GND 3 6 8 11 R572 R573 R574 R575 DI CLK CS# DO 1 1 1 1 2 2 2 2 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% DI CLK CS# DO 2 1 2 5 9 12 WL_BT_LED 1 1OE# 2OE# 3OE# 4OE# @ R450 10K_0402_5% 2 U51 1 4 10 13 2N7002DW-T/R7_SOT363-6 39 WL_BT_LED# HUDSON-M3_FCBGA656 1 UMA_CRT_R UMA_CRT_DATA 29 UMA_CRT_CLK 29 V28 V29 C29 +3VS 1 UMA@ 2 R454 2.2K_0402_5% 1 UMA@ 2 R459 2.2K_0402_5% UMA_CRT_G 29 AUX_VGA_CH_P AUX_VGA_CH_N N2 1 UMA_CRT_R 29 VGA_DAC_RSET VIN0/GPIO175 +3VALW UMA_CRT_CLK VGA_RED L HDMI SKU 2 10K_0402_5% 2 10K_0402_5% UMA_CRT_DATA VGA_GREEN H Non-HDMI SKU SKU +3VALW 40 32 PW_CLEAR# 2 SPI_DI/GPIO164 SPI_DO/GPIO163 SPI_CLK/GPIO162 SPI_CS1#/GPIO165 ROM_RST#/SPI_WP#/GPIO161 ML_VGA_HPD/GPIO229 T66 BT_ON# D18 JPW @ GBE_COL GBE_CRS GBE_MDCK GBE_MDIO GBE_RXCLK GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0 GBE_RXCTL/RXDV GBE_RXERR GBE_TXCLK GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0 GBE_TXCTL/TXEN GBE_PHY_PD GBE_PHY_RST# GBE_PHY_INTR HDMI_EN# (Internal 8.2K PU) HDMI@ 2 1 R443 1K_0402_1% AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14 3G_OFF# 1 R111 3 SD_CLK/SCLK_2/GPIO73 SD_CMD/SLOAD_2/GPIO74 SD_CD/GPIO75 SD_WP/GPIO76 SD_DATA0/SDATI_2/GPIO77 SD_DATA1/SDATO_2/GPIO78 SD_DATA2/GPIO79 SD_DATA3/GPIO80 NC10 NC11 VGA DAC 1 SATA_TX0P SATA_TX0N GBE LAN 31 SATA_FRX_C_DTX_N0 31 SATA_FRX_C_DTX_P0 AK19 AM19 SERIAL ATA 1st HDD SATA_FTX_DRX_P0 SATA_FTX_DRX_N0 SD CARD HUDSON-2 31 SATA_FTX_DRX_P0 31 SATA_FTX_DRX_N0 E www.qdzbwx.com HUDM3R3@ Q32B in page39 For MP phase 7 SN74CBTLV3125PWR_TSSOP14 C484 @ 0.1U_0402_16V4Z +3VALW 2 2 C498 1 2M Byte 0.1U_0402_16V4Z U53 4 EC_ON 1 4 10 13 1OE# 2OE# 3OE# 4OE# KSI6 KSI5 KSI3 KSI7 2 5 9 12 1A 2A 3A 4A +3VALW 14 VCC 37,39 EC_ON 37,38,39 37,38 37,38 37,38 1 2 @ U13 1B 2B 3B 4B GND 3 6 8 11 7 SN74CBTLV3125PWR_TSSOP14 C485 @ 0.1U_0402_16V4Z DI CLK CS# DO @ @ C257 R402 1 2 1 2 10_0402_5% 10P_0402_50V8J 8 VCC 3 W 7 HOLD CS# 1 S CLK 6 C DI 5 D VSS 4 Q 2 4 DO Issued Date Socket: SP07000F500/SP07000H900 Compal Electronics, Inc. Compal Secret Data Security Classification MX25L1606EM2I-12G SOP 8P For EMI 2011/01/06 Deciphered Date 2012/01/06 Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: A B C D Monday, July 04, 2011 Sheet E 24 of 51 A B C D E www.qdzbwx.com STRAP PINS 1 PULL HIGH PCI_CLK1 PCI_CLK3 PCI_CLK4 ALLOW PCIE GEN2 ENABLE DEBUG STRAP NON_FUSION EC CLOCK MODE ENABLED LPC_CLK0 DEFAULT PULL LOW LPC_CLK1 EC_PWM2 RTC_CLK CLKGEN ENABLED LPC ROM (INTERNAL 10K PULL-UP) S5 PLUS MODE DISABLED DEFAULT FORCE PCIE GEN1 DISABLE DEBUG STRAP FUSION CLOCK MODE EC DISABLED DEFAULT DEFAULT DEFAULT 1 DEFAULT CLKGEN DISABLE S5 PLUS MODE ENABLED SPI ROM DEFAULT +3VS C496 0.1U_0402_16V7K @ R240 Q62 2 3 2 2 1 R245 @ 10K_0402_5% 10K_0402_5% 1 L32 1 2 MBK1608221YZF_2P UMA@ 1 R238 2 VGA_PD_R 10K_0402_5% 2 2 R243 @ 10K_0402_5% 2 +3VALW 1 1 1 2 2 +3VALW PCI_CLK1 @ C497 0.01U_0402_25V7K +FCH_VDDAN_33_DAC C690 1U_0402_6.3V6K 2 @ 2 CLK_PCI_EC 22,37 CLK_PCI_EC 1 2 MBK1608221YZF_2P 1 1 C689 4.7U_0805_10V4Z @ PCI_CLK4 22 PCI_CLK4 +FCH_VDDAN_33_DAC_R L31 @ 30mils PCI_CLK3 22 PCI_CLK3 @ C277 UMA@ 1 1 C276 UMA@ 2 2 CLK_PCI_DDR 22,38 CLK_PCI_DDR 0.1U_0402_16V7K 1 AO3413_SOT23 2.2U_0603_6.3V6K 22 PCI_CLK1 2 C276 0_0402_5% DIS@ EC_PWM2 2 2 2 1 1 VGA_PD @ 1 R439 2 VGA_PD_R 47K_0402_5% 2 R294 2.2K_0402_5% @ 1 AO3413_SOT23 @ C495 0.01U_0402_25V7K C687 4.7U_0805_10V4Z @ FCH HAS 15K INTERNAL PU-UP FOR PCI_AD[27:23] 3 PULL HIGH PULL LOW 22 PCI_AD27 22 PCI_AD26 22 PCI_AD25 22 PCI_AD24 22 PCI_AD23 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 USE PCI PLL DISABLE ILA AUTORUN USE FC PLL USE DEFAULT PCIE STRAPS DISABLE PCI MEM BOOT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT BYPASS PCI PLL ENABLE ILA AUTORUN BYPASS FC PLL USE EEPROM PCIE STRAPS ENABLE PCI MEM BOOT @ R303 0_0603_5% UMA@ +FCH_VDDAN_11_MLDAC 30mils 1 2 DEBUG STRAPS Q61 2 AO3413 Vgs(max)= -1V G 23 C494 0.1U_0402_16V7K @ 2 R246 @ 2.2K_0402_5% 2.2K_0402_5% 1 1 R239 +1.1VS 3 R244 @ 10K_0402_5% 2 10K_0402_5% 2 R237 10K_0402_5% 2 R234 10K_0402_5% 2 R233 1 1 1 1 1 1 2 R232 @ 10K_0402_5% VGA_PD: Support CRT power saving L: MLDAC power on H: MLDAC power off 1 RTC_CLK D 23 EC_PWM2 22,37 RTC_CLK S 2 R242 @ 10K_0402_5% 2 R241 @ 10K_0402_5% 10K_0402_5% +3VALW 1 1 R231 +3VALW G +3VS D +3VS S +3VS 1 CRT Power Down Circuit 1 2 C688 1U_0402_6.3V6K 2 3 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 1 1 R251 @ 2.2K_0402_5% 2 R250 @ 2.2K_0402_5% 2 R249 @ 2.2K_0402_5% 2 R248 @ 2.2K_0402_5% 2 2 R247 @ 2.2K_0402_5% 1 1 4 1 4 2011/01/06 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2012/01/06 Deciphered Date Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: A B C D Sheet Monday, July 04, 2011 E 25 of 51 B C D E www.qdzbwx.com +VCC_FCH_R MAIN LINK SERIAL ATA GBE LAN 3.3V_S5 I/O VDDXL_33_S G24 2 G 3 1 R371 2 C330 1 2 1 C499 2 2 0_0603_5% +1.1VS 1 C326 2 +AVDD_SATA C501 1 2 C502 1 2 C503 1 2 C504 1 2 1 C505 2 +VDDIO_33_S C507 1 2 10mils C508 1 2 1 C506 2 1 C500 2 1 R26 1 R194 2 0_0805_5% 1 R370 2 0_0805_5% +1.1VS +3VALW 2 0_0402_5% +3VALW L28 1 2 MBK1608221YZF_2P +VDDXL_3.3V 1 C510 1 C509 2 2 220 ohm +1.1VALW USB VDDAN_11_USB_S_1 VDDAN_11_USB_S_2 2 22U_0805_6.3V6M 5mA 1 +1.1VS AO3416_SOT23-3 22U_0805_6.3V6M VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 658mA VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12 59mA +5VS 22U_0805_6.3V6M 2 1 2.2U_0603_6.3V6K 2 VDDIO_GBE_S_1 VDDIO_GBE_S_2 Add Q40 for leakage issue @ Q40 10mils 140mA VDDCR_11_S_1 187mA VDDCR_11_S_2 N20 M20 +VDDCR_1.1V C512 1 2 1 C511 2 1 R373 197mA 10mils J24 1 C513 2 2 VSSAN_HWM K25 VSSXL H25 VSSPL_SYS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSPL_DAC VSSAN_DAC VSSANQ_DAC VSSIO_DAC T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33 1 2 T21 L28 K33 N28 R6 3 HUDSON-M3_FCBGA656 Connect to GND through a dedicated via L29 1 2 MBK1608221YZF_2P +VDDPL_1.1V 1 C514 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS EFUSE 2.2U_0603_6.3V6K 70mA VDDPL_11_SYS_S 0.1U_0402_16V7K VDDCR_11_USB_S_1 VDDCR_11_USB_S_2 A3 A33 B7 B13 D9 D13 E5 E12 E16 E29 F7 F9 F11 F13 F16 F17 F19 F23 F25 F29 G6 G16 G32 H12 H15 H29 J6 J9 J10 J13 J28 J32 K7 K16 K27 K28 L6 L12 L13 L15 L16 L21 M13 M16 M21 M25 N6 N11 N13 N23 N24 P12 P18 P20 P21 P31 P33 R4 R11 R25 R28 T11 T16 T18 N8 2 0_0603_5% +1.1VALW T12 T13 HUDM3R3@ HUDSON-2 +AVDD_SATA 10mils N18 L19 M18 V12 V13 Y12 Y13 W11 2 1 C318 2.2U_0603_6.3V6K 1 C304 2 C329 2.2U_0603_6.3V6K 2 2 1 C302 AA9 AA10 AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19 VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8 2 2.2U_0603_6.3V6K 2 1 C296 1 VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2 U12 U13 1 1U_0402_6.3V6K C297 1 0.1U_0402_16V7K 3 2.2U_0603_6.3V6K 220 ohm C303 VDDIO_33_GBE_S AB11 AA11 20mils 0.1U_0402_16V7K +VDDPL_33_SATA 0.1U_0402_16V7K L22 1 2 MBK1608221YZF_2P 2.2U_0603_6.3V6K 220 ohm 2 C328 1U_0402_6.3V6K +VDDANCR_11_USB 1 2 MBK1608221YZF_2P +3VS 1 1U_0402_6.3V6K L58 2 1U_0402_6.3V6K +1.1VALW C327 0.1U_0402_16V7K 2 C322 1 C323 2.2U_0603_6.3V6K 1 AB10 G7 H8 J8 K8 K9 M9 M10 N9 N10 M12 N12 M11 2 1U_0402_6.3V6K 2 C292 226mA 2 1 C317 +PCIE_VDDR_FCH 1U_0402_6.3V6K 1 VDDAN_11_ML_1 VDDAN_11_ML_2 VDDAN_11_ML_3 VDDAN_11_ML_4 30mils 1U_0402_6.3V6K 2 2 C290 1U_0402_6.3V6K 2 1 C293 1 22U_0805_6.3V6M 1 UMA@ 2 +VDDAN_33_USB C289 0.1U_0402_16V7K C294 UMA@ 2 L56 +VDDPL_33_PCIE 220 ohm 2 1 C301 +3VALW 220 ohm/3A 2.2U_0603_6.3V6K L36 1 2 MBK1608221YZF_2P UMA@ 1 C300 Y22 V23 V24 V25 C321 1 60mils VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 1337mA VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9 VDDAN_11_SATA_10 1 C315 +PCIE_VDDR_FCH 7mA VDDPL_11_DAC 2 1 50mils LDO_CAP 1 2 1U_0402_6.3V6K C300 0_0402_5% DIS@ 1 2 FBMA-L11-201209-221LMA30T_0805 +3VS 93mA AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27 1U_0402_6.3V6K 2 0.1U_0402_16V7K 2.2U_0603_6.3V6K 2 VDDPL_33_SATA VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 1088mA VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8 C320 1U_0402_6.3V6K +FCH_VDDPL_33_USB C280 43mA 2 1 1U_0402_6.3V6K C301 0_0402_5% DIS@ L35 1 C281 17mA VDDPL_33_PCIE C319 1U_0402_6.3V6K +VDDAN_33_USB 1 20mA VDDPL_33_USB_S 2 C314 +1.1VS_CKVDD 1 1U_0402_6.3V6K 1 2 220 ohm VDDPL_33_SSUSB_S 20mils +FCH_VDDAN_11_MLDAC C299 1 2 MBK1608221YZF_2P M31 V21 0.1U_0402_16V7K M3@ 2 30mA H26 J25 K24 L22 M22 N21 N22 P22 220 ohm 0.1U_0402_16V7K 2 1 C278 20mA VDDAN_33_DAC 10mils +VDDAN_11_DAC 2.2U_0603_6.3V6K M3@ 1 AG28 VDDPL_33_ML VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 340mAVDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8 1 +1.1VS_CKVDD 20mils 15mils LDO_CAP 2 2.2U_0603_6.3V6K 1 C298 L24 UMA@ 1 2 MBK1608221YZF_2P 0.1U_0402_16V7K C279 2.2U_0603_6.3V6K 220 ohm C278 0_0402_5% M2@ 10mils @ +FCH_VDDAN_11_MLDAC D7 AH29 +VDDPL_33_SATA M3@ L34 +FCH_VDDPL_33_SSUSB 1 2 MBK1608221YZF_2P L18 10mils +VDDPL_33_PCIE +3VALW 10mils 10mils +FCH_VDDPL_33_USB LDO_CAP: Internally generated 1.8V supply for the RGB output T22 20mA 2 C313 1U_0402_6.3V6K 0.1U_0402_16V7K 2.2U_0603_6.3V6K C274 0_0402_5% DIS@ UMA@ 2 2 +FCH_VDDPL_33_SSUSB 10mils 47mA VDDPL_33_DAC 1 1U_0402_6.3V6K U22 +FCH_VDDAN_33_DAC_R VDDPL_33_SSUSB_S For Hudson M3 USB3.0 only For Hudson M2, connect to GND VDDPL_33_SYS 2 C312 1U_0402_6.3V6K +FCH_VDDPL_33_MLDAC @ 2 0_0603_5% L33 1 2 MBK1608221YZF_2P 1 1 C275 C274 UMA@ UMA@ V22 10mils 1 R19 +3VS 10mils 1 2.2U_0603_6.3V6K H24 +FCH_VDDPL_33_MLDAC 1007mA C311 2 0_0805_5% D 10mils +VDDPL_3.3V +FCH_VDDAN_33_DAC_R 131mA PCI/GPIO I/O 2 CORE S0 C271 CLKGEN I/O 2 PCI EXPRESS C270 T14 T17 T20 U16 U18 V14 V17 V20 Y17 1 R193 22U_0805_6.3V6M 2 VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9 2.2U_0603_6.3V6K C269 VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 1U_0402_6.3V6K 2 AB17 AB18 AE9 AD10 AG7 AC13 AB12 AB13 AB14 AB16 1U_0402_6.3V6K C267 1 50mils 1U_0402_6.3V6K 2 2 1 1U_0402_6.3V6K 2 C266 1 1U_0402_6.3V6K 1 C273 1 1U_0402_6.3V6K 1 1 1U_0402_6.3V6K C272 0.1U_0402_16V7K 2.2U_0603_6.3V6K 220 ohm 1 2 0_0603_5% +VDDPL_3.3V 22U_0805_6.3V6M 1 R20 L30 1 2 MBK1608221YZF_2P +VDDIO_33_PCIGP U1E +VCC_FCH_R HUDSON-2 1U_0402_6.3V6K +3VS +1.1VS HUDM3R3@ 10mils S U1C +3VS GROUND A 220 ohm +3VALW +VDDANCR_11_SSUSB M3@ 2 1 C308 M3@ 2 1 C309 M3@ 2 1 C310 M3@ 2 C310 0_0402_5% M2@ VDDAN_11_SSUSB_S_1 VDDAN_11_SSUSB_S_2 VDDAN_11_SSUSB_S_3 VDDAN_11_SSUSB_S_4 282mA VDDAN_11_SSUSB_S_5 N16 N17 P17 M17 VDDCR_11_SSUSB_S_1 VDDCR_11_SSUSB_S_2 VDDCR_11_SSUSB_S_3 424mA VDDCR_11_SSUSB_S_4 12mA VDDAN_33_HWM_S 10mils M8 +VDDAN_33_HWM 1 C516 2 1 C515 2 2.2U_0603_6.3V6K M3@ 2 1 C307 P16 M14 N14 P13 P14 0.1U_0402_16V7K 1 0.1U_0402_16V7K M3@ 2 C306 0.1U_0402_16V7K 1 0.1U_0402_16V7K M3@ 2 C305 0.1U_0402_16V7K 1 1U_0402_6.3V6K C197 1U_0402_6.3V6K 220 ohm/3A 40mils +VDDANCR_11_SSUSB 10U_0603_6.3V6M L62 M3@ 2 1 FBMA-L11-201209-221LMA30T_0805 USB SS +1.1VALW 1 R27 2 0_0402_5% 1 R28 2 0_0402_5% +3VS 26mA VDDIO_AZ_S POWER 10mils AA4 +VDDIO_AZ 1 HUDSON-M3_FCBGA656 4 C517 1U_0402_6.3V6K 4 2 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 2012/01/06 Deciphered Date Title SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: A B C D Monday, July 04, 2011 Sheet E 26 of 51 5 4 3 2 www.qdzbwx.com +DVDD12 +3VS 1 +DVDD33 +3VS_ANX 40mil +3VS_ANX PD 100K at Page10 +1.2VS_ANX L150UMA@ FBMA-L11-201209-221LMA30T_0805 0.1U_0402_16V7K 2 1 2 2 2 C1513 C1514 C1515 UMA@ 1 0.1U_0402_16V7K 20mil 0.1U_0402_16V7K 2 1 C1516 C1517 UMA@ UMA@ 1 1 0.1U_0402_16V7K +DVDD12 0.01U_0402_16V7K 1 1 C1518 C1519 DP0_AUXN_C 60 DP0_AUXP_C 61 LVDS_HPD 58 1 UMA@ 2 R1317 0_0402_5% 4 3 7 6 7 DP0_AUXN_C 7 DP0_AUXP_C 9 LVDS_HPD 7 DP0_TXN0_C 7 DP0_TXP0_C 7 DP0_TXN1_C 7 DP0_TXP1_C UMA@ UMA@ UMA@ UMA@ 1 2 2 2 0.01U_0402_16V7K 2.2U_0603_6.3V4Z 1 UMA@ 2 R1312 1M_0402_5% 2 1 C1509 0.1U_0402_16V7K UMA@ +3VS_ANX +AVDD12 L151UMA@ +1.2VS_ANX FBMA-L11-201209-221LMA30T_0805 0.1U_0402_16V7K 2 1 2 2 1 C1521 C1522 C1525 UMA@ 1 0.1U_0402_16V7K C +3VS_ANX T57 T58 20mil 0.01U_0402_16V7K 1 1 C1526 C1527 R78 1 UMA@ 2 10K_0402_5% T59 T60 2 1 R1315 UMA@ 12K_0402_1% R_BIAS UMA@1 2 C1510 100P_0402_50V8J UMA@ UMA@ UMA@ UMA@ 1 2 2 2 0.01U_0402_16V7K 2.2U_0603_6.3V4Z 20mil +DVDD33 L152UMA@ FBMA-L11-201209-221LMA30T_0805 2 1 0.1U_0402_16V7K 2 1 C1529 C1530 R96 UMA@ UMA@ 1 2 2.2U_0603_6.3V4Z +3VS_ANX L153UMA@ FBMA-L11-201209-221LMA30T_0805 0.1U_0402_16V7K 2 1 2 2 C1532 C1533 1 2 T61 T62 T63 T64 10K_0402_5% 0.1U_0402_16V7K 2 1 C1534 C1535 +AVDD33 0.01U_0402_16V7K 1 1 C1536 C1537 UMA@ UMA@ 1 2 0.01U_0402_16V7K UMA@ UMA@ 2 2 2.2U_0603_6.3V4Z DP0_AUXP_C @ 2 R1321 1 1M_0402_5% DP0_AUXN_C @ 2 R1323 1 1M_0402_5% 13 53 DVDD33 DVDD33 CLK_SEL RESET_L DIGON 34 POR 51 52 CFG_SCL CFG_SDA 16 17 18 GPIO_0 GPIO_1 GPIO_2 64 R_BIAS 55 57 56 54 11 TDI TMS TCK TDO TEST_EN 65 PAD ANX3110_QFN64_9X9 +3VS_ANX 20mil UMA@ UMA@ 1 1 0.1U_0402_16V7K 10 1 UMA@ 2 R30 10K_0402_5% 12 14 +3VS_ANX 12,22,32,33 APU_PCIE_RST# 28 ANX_ENVDD DPRX_AUX_N DPRX_AUX_P DPPX_HPD DPRX_LN0_N DPRX_LN0_P DPRX_LN1_N DPRX_LN1_P UMA_LCD_CLK R1314 1 UMA@ 2 4.7K_0402_5% UMA_LCD_DATA R1313 1 UMA@ 2 4.7K_0402_5% AVDD33 AVDD33 AVDD33 AVDD33 AVDD33 8 25 33 39 63 LVDS_CLKL_N LVDS_CLKL_P LVDS_L0_N LVDS_L0_P LVDS_L1_N LVDS_L1_P LVDS_L2_N LVDS_L2_P LVDS_L3_N LVDS_L3_P 26 27 19 20 21 22 23 24 28 29 APU_TXOUT_CLK- 28 APU_TXOUT_CLK+ 28 APU_TXOUT0- 28 APU_TXOUT0+ 28 APU_TXOUT1- 28 APU_TXOUT1+ 28 APU_TXOUT2- 28 APU_TXOUT2+ 28 LVDS_CLKU_N LVDS_CLKU_P LVDS_U0_N LVDS_U0_P LVDS_U1_N LVDS_U1_P LVDS_U2_N LVDS_U2_P LVDS_U3_N LVDS_U3_P 42 43 35 36 37 38 40 41 44 45 APU_TZOUT_CLK- 28 APU_TZOUT_CLK+ 28 APU_TZOUT0- 28 APU_TZOUT0+ 28 APU_TZOUT1- 28 APU_TZOUT1+ 28 APU_TZOUT2- 28 APU_TZOUT2+ 28 DDC_CLK DDC_DATA 49 50 BL_EN VARY_BL CPU_VARY_BL OSC_OUT OSC_IN 15 47 48 31 30 UMA_LCD_CLK UMA_LCD_DATA D C UMA_LCD_CLK 28 UMA_LCD_DATA 28 ANX_BKOFF# 28 ANX_INVT_PWM 28 APU_INVT_PWM 9,28 TRAVIS_CLK# 22 TRAVIS_CLK 22 AVSS AVSS AVSS 1 UMA@ 2 R946 0_0805_5% AVDD12 +AVDD33 2 5 62 1 +1.2VS_ANX 40mil DVDD12 DVDD12 DVDD12 DVDD12 D +1.2VS U8 +AVDD12 9 32 46 59 UMA@ 1 UMA@ 2 R944 0_0805_5% Place via on each trace bus and let resistor very close the via. B B A A Compal Secret Data Security Classification Issued Date 2010/12/30 2012/01/01 Deciphered Date Title Compal Electronics, Inc. SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: 5 4 3 2 Sheet Monday, July 04, 2011 1 27 of 51 E F 27 APU_TZOUT0+ 27 APU_TZOUT027 APU_TZOUT1+ 27 APU_TZOUT127 APU_TZOUT2+ 27 APU_TZOUT227 APU_TZOUT_CLK+ 27 APU_TZOUT_CLK27 UMA_LCD_CLK 27 UMA_LCD_DATA 9,27 APU_INVT_PWM 2 9 APU_ENVDD 9 APU_ENBKL 1 2 UMA@ 2 CD228 0.1U_0402_16V7K QD1A UMA@ 2 2N7002DW-T/R7_SOT363-6 2 10K_0402_5% LVDS_TXCLK+ 1 RD1092LCDPWR_GATE 1 2 47K_0402_5% 1 UMA@ CD229 0.01U_0402_25V7K UMA@ 2 3 LVDS_TXCLK- Reserve for EMI request LVDS_TZOUT0+ 1 CAM@ 2 RD78 0_0402_5% LD55 @ 1 1 2 2 LVDS_TZOUT0LVDS_TZOUT1+ 23 LVDS_TZOUT1LVDS_TZOUT2+ USB20_N5 23 4 USB20_P5 4 3 LCD_ENVDD USB20_N5_R WCM-2012-900T_0805 LVDS_TZCLK+ 1 CAM@ 2 RD96 0_0402_5% UMA@ QD17 AO3413_SOT23 LCDPWR_GATE 1 W=80mils 2 +LCD_VDD 1 2 RD107 150_0603_5% NO3D@ 1 EDP@ QD23 AO3413_SOT23 +LCD_VDD W=80mils QD1B 2N7002DW-T/R7_SOT363-6 UMA@ RD112 100K_0402_5% UMA@ USB20_P5_R 3 LVDS_TZOUT2- 5 EDP@ 2 CD251 0.1U_0402_16V7K W=80mils 3 1 RD113 +5VS 1 BKOFF#_D 1 RB751V40_SC76-2 3 2 BKOFF# +3VS 1 37 LVDS_TXOUT2- RD120 100K_0402_5% EDP@ 6 DD30 LVDS_TXOUT2+ RD108 100K_0402_5% UMA@ 2 LVDS_TXOUT1- 2 RD107 150_0603_5% UMA@ 2 47K_0402_5% 4 27 APU_TXOUT_CLK+ 27 APU_TXOUT_CLK- 1 RD144 1 27 APU_TXOUT2- RB751V40_SC76-2 2 27 APU_TXOUT2+ 1 LED_PWM LVDS_TXOUT1+ 1 27 APU_TXOUT1- LVDS_TXOUT0- +5VS G 27 APU_TXOUT1+ +3VS D 27 APU_TXOUT0- @ 1 2 RD449 0_0402_5% DD29 LED_PWM_D 2 1 LVDS_TXOUT0+ 1 www.qdzbwx.com +LCD_VDD 1 UMA@ 2 RD262 0_0402_5% 1 UMA@ 2 RD263 0_0402_5% 1 UMA@ 2 RD265 0_0402_5% 1 UMA@ 2 RD264 0_0402_5% 1 UMA@ 2 RD298 0_0402_5% 1 UMA@ 2 RD277 0_0402_5% 1 UMA@ 2 RD297 0_0402_5% 1 UMA@ 2 RD296 0_0402_5% 1 UMA@ 2 RD268 0_0402_5% 1 UMA@ 2 RD267 0_0402_5% 1 UMA@ 2 RD269 0_0402_5% 1 UMA@ 2 RD266 0_0402_5% 1 UMA@ 2 RD302 0_0402_5% 1 UMA@ 2 RD278 0_0402_5% 1 UMA@ 2 RD301 0_0402_5% 1 UMA@ 2 RD303 0_0402_5% 1 UMA@ 2 RD300 0_0402_5% 1 UMA@ 2 RD299 0_0402_5% @ 1 2 RD332 0_0402_5% @ 1 2 RD350 0_0402_5% @ 1 2 RD357 0_0402_5% 27 APU_TXOUT0+ H RD107 RD109 CD233 150_0603_5% 47K_0402_5% 0.1U_0402_16V4Z EDP@ EDP@ EDP@ CD229 QD1 0.01U_0402_25V7K 2N7002DW-T/R7_SOT363-6 EDP@ EDP@ D For UMA & PowerXpress G 1 D To prevent EC pin damage S C G B S A CD233 0.1U_0402_16V4Z UMA@ RD108 100K_0402_5% NO3D@ W=80mils RD109 47K_0402_5% NO3D@ CD228 0.1U_0402_16V7K NO3D@ LVDS_TZCLKQD1 2N7002DW-T/R7_SOT363-6 NO3D@ LVDS_EDID_CLK LVDS_EDID_DATA EC PWM 37 @ 1 RD387 INVT_PWM CD233 0.1U_0402_16V4Z NO3D@ QD17 AO3413_SOT23 NO3D@ LED_PWM LCD_ENVDD CD229 0.01U_0402_25V7K NO3D@ LED_PWM 2 0_0402_5% 2 EC_ENBKL EC_ENBKL 37 Close to LVDS Connector For DISCRETE LCD/PANEL BD. Conn. W=20mils Remove LVDS channel +3VS_LVDS_CAM 1 CAM@ 2 RD388 0_0603_5% +3VS CAM@ 0.1U_0402_16V4Z 1 2 CD225 1 RD143 2 EDP@ 0_0402_5% JLVDS LCD_ENVDD LVDS_TXOUT0+ LVDS_TXOUT0LVDS_TXOUT1+ LVDS_TXOUT1LVDS_TXOUT2+ LVDS_TXOUT2- EC_ENBKL Close to LVDS Connector 3 LVDS_TZOUT0+ LVDS_TZOUT0LVDS_TZOUT1+ LVDS_TZOUT1LVDS_TZOUT2+ LVDS_TZOUT2BKOFF#_D Remove DISCRETE for 3D LVDS Panel Remove 3D LVDS Panel +LCD_INV 13 VGA_EDP_TX013 VGA_EDP_TX1+ 13 VGA_EDP_TX113 VGA_EDP_TX2+ 13 VGA_EDP_TX213 VGA_EDP_TX3+ 13 VGA_EDP_TX3- CD880 CD881 CD882 CD883 CD884 CD885 CD886 CD887 EDP@ 1 20.1U_0402_16V7K EDP@ 1 20.1U_0402_16V7K EDP@ 1 20.1U_0402_16V7K EDP@ 1 20.1U_0402_16V7K EDP@ 1 20.1U_0402_16V7K EDP@ 1 20.1U_0402_16V7K EDP@ 1 20.1U_0402_16V7K EDP@ 1 20.1U_0402_16V7K 13 VGA_EDP_AUX- CD889 2 LVDS_TZCLK+ LVDS_TZCLK- 1 @ CD231 680P_0402_50V7K 2 1 3 YSLC05CH_SOT23-3 LVDS_EDID_CLK LVDS_EDID_DATA INT_MIC_CLK INT_MIC_DATA LCD_ENVDD LED_PWM_D +3VS_LVDSDDC 1 2 NOEDP@ CD232 0.1U_0402_16V4Z INT_MIC_CLK 36 INT_MIC_DATA 36 CD232 0.1U_0402_16V4Z UMA@ 3A +LCD_VDD 1 +LCD_INV +3VS For EMI 2 +LCD_INV 1 CD226 0.1U_0402_16V4Z 2 CD227 4.7U_0805_10V4Z CD234 68P_0402_50V8J B+ 1 LD2 2 1 1 FBMA-L11-201209-221LMA30T_0805 2 2 B+ LVDS_TXOUT1+ For EMI LVDS_TXOUT1LVDS_TXOUT2+ LVDS_TXOUT2- 1 For LVDS Translator CD236 @ +3VS LVDS_TXCLK+ LVDS_TXCLK- 2 EDP@ 1 LVDS_EDID_DATA RD209 100K_0402_5% 27 ANX_INVT_PWM 27 ANX_ENVDD 2 EDP@ 1 LVDS_EDID_CLK RD256 100K_0402_5% 27 ANX_BKOFF# EDP@ 1 20.1U_0402_16V7K LVDS_EDID_CLK EDP@ 1 20.1U_0402_16V7K LVDS_EDID_DATA Issued Date LED_PWM 1 UMA@ 2 RD333 0_0402_5% LCD_ENVDD 1 UMA@ 2 RD351 0_0402_5% EC_ENBKL 1 UMA@ 2 RD360 0_0402_5% 2 1 CD268 @ 2 2011/01/06 1 CD489 @ 2 1 CD490 @ 2 4 Compal Electronics, Inc. Compal Secret Data Security Classification Close to LVDS Connector 2012/01/06 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Monday, July 04, 2011 Date: A B 3 CD235 0.1U_0402_25V6 LVDS_TXOUT0- Close to LVDS1 Connector CD888 DD84 LVDS_TXOUT0+ 4 13 VGA_EDP_AUX+ LVDS_TXCLK+ LVDS_TXCLK- ACES_87242-4001-09 DISCRETE for 3D eDP Panel 13 VGA_EDP_TX0+ 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 0.1U_0402_25V6 VGA_ENBKL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 GMD GND EDP_HPD 13 2 RD1440 1 NOEDP@ 0_0603_5% 0.1U_0402_25V6 VGA_ENVDD 13 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 USB20_P5_R USB20_N5_R +3VS_LVDSDDC 0.1U_0402_25V6 12 LED_PWM @ 0.1U_0402_25V6 1 DIS@ 2 RD349 0_0402_5% 1 DIS@ 2 RD356 0_0402_5% 1 DIS@ 2 RD358 0_0402_5% 12 VGA_INVT_PWM RD1440 0_0603_5% UMA@ C D E F G Sheet 28 H of 51 C D E D3 @ D4 @ D5 1 www.qdzbwx.com CRT CONNECTOR 1 B 1 A @ +3VS If=1A +5VS 3 2 3 2 3 2 L3 1 2 NBQ100505T-800Y_0402 CRT_R_L CRT_G L4 1 2 NBQ100505T-800Y_0402 CRT_G_L CRT_B L5 1 2 NBQ100505T-800Y_0402 CRT_HSYNC CRT_VSYNC 40 mils 1 1 2 RB491D_SOT23-3 0.5A_8V_KMC3S050RY 1 CRT_B_L JCRT R138 R139 R140 Close to CRT Connector 1 C238 1 C239 2 1 C240 2 2 1 C241 2 1 C242 2 1 C243 2 2.2P_0402_50V8C CRT_DATA 1 C237 0.1U_0402_16V4Z 2 @ CRT_CLK 2.2P_0402_50V8C 24 UMA_CRT_DATA CRT_R CRT_B 2.2P_0402_50V8C 24 UMA_CRT_CLK +CRT_VCC F1 2 CRT_G 2.2P_0402_50V8C 24 UMA_CRT_VSYNC DAN217_SC59 3 2.2P_0402_50V8C 24 UMA_CRT_HSYNC DAN217_SC59 CRT_R 2.2P_0402_50V8C UMA_CRT_G 24 UMA_CRT_B 1 UMA@ 2 R200 0_0402_5% 1 UMA@ 2 R204 0_0402_5% 1 UMA@ 2 R211 0_0402_5% 1 UMA@ 2 R213 0_0402_5% 1 UMA@ 2 R235 0_0402_5% 1 UMA@ 2 R236 0_0402_5% 1 UMA@ 2 R261 0_0402_5% 2 1 150_0402_1% 24 UMA_CRT_R 2 1 150_0402_1% 24 DAN217_SC59 2 1 150_0402_1% 1 +CRT_VCC_R D6 For UMA & PowerXpress T75 PAD CRT_R_L CRT_DDC_DAT CRT_G_L HSYNC CRT_B_L +CRT_VCC VSYNC T76 PAD CRT_DDC_CLK 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5 @ G G 16 17 ALLTO_C10532-11505-L_15P-T 2 2 +CRT_VCC 2 0.1U_0402_16V4Z 2 R141 13 VGA_CRT_CLK 13 VGA_CRT_DATA 4 U6 74AHCT1G125GW_SOT353-5 CRT_G CRT_B D_CRT_HSYNC 1 L6 2 10_0402_5% D_CRT_VSYNC 1 L7 2 10_0402_5% +CRT_VCC CRT_VSYNC 2 CRT_HSYNC HSYNC A 4 Y U7 74AHCT1G125GW_SOT353-5 CRT_VSYNC C245 @ VSYNC 1 2 CRT_CLK CRT_DATA 1 C246 @ 2 10P_0402_50V8J 13 VGA_CRT_VSYNC Y 10P_0402_50V8J 13 VGA_CRT_HSYNC A 5 1 VGA_CRT_B 2 G VGA_CRT_G 13 CRT_R 1 10K_0402_5% 3 13 1 DIS@ 2 R178 0_0402_5% 1 DIS@ 2 R181 0_0402_5% 1 DIS@ 2 R167 0_0402_5% DIS@ 1 2 R177 0_0402_5% 1 DIS@ 2 R179 0_0402_5% 1 DIS@ 2 R209 0_0402_5% 1 DIS@ 2 R256 0_0402_5% 3 VGA_CRT_R G CRT_HSYNC 13 P OE# For DISCRETE P OE# 5 1 1 C244 Close to CRT Connector 3 3 +CRT_VCC 2 2 +3VS 5 Q205B 4 CRT_DATA 1 C282 33P_0402_50V8K 2 @ 1 1 2 Q205A 1 CRT_CLK R159 4.7K_0402_5% 1 R153 4.7K_0402_5% CRT_DDC_CLK 6 2N7002DW-T/R7_SOT363-6 CRT_DDC_DAT 3 2N7002DW-T/R7_SOT363-6 C285 33P_0402_50V8K 2 @ C284 470P_0402_50V8J @ 1 1 2 C283 470P_0402_50V8J 2 @ 4 4 Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C D SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet E 29 of 51 2 2 CEC@ 1CEC_XIN R174 47K_0402_5% P1_3/KI3#/AN11/TZOUT 14 RESET# XOUT/P4_7 1 CEC@ 2 R168 4.7K_0402_5% +3VL CEC_FSHUPD (Pin13) Low= Force to update flash. R166 4.7K_0402_5% CEC@ +3VL 7 VCC/AVCC P1_1/KI1#/AN9/CMP0_1 17 8 MODE P1_0/KI0#/AN8/CMP0_0 18 HDMI_DATA 9 P4_5/INT0#/RXD1 P3_3/TCIN/INT3#/SSI00/CMP1_0 19 HDMI_HPD_R P3_4/SCS#/SDA/CMP1_1 20 P4_2/VREF 16 1 C848 1 C263 HDMI_DATA 1 R163 2 27K_0402_5% CEC@ Q212B 2N7002DW-T/R7_SOT363-6 CEC@ 1 4 5 C262 1 0.1U_0402_16V4Z CEC@ 2 R165 100K_0402_5% CEC@ HDMI_CECIN HDMI_CECOUT 10 P1_7/CNTR00/INT10# 2 R5F211A4C33SP-W4_LSSOP20 Q47 BSH111_SOT23-3 CEC@ 3 3 D HDMI_SCLK 1 HDMI_SDATA 1 S HDMI_CECOUT 2 CEC@ 1 R176 4.7K_0402_5% R164 4.7K_0402_5% CEC@ HDMI_CLK 3 15 D XIN/P4_6 P1_2/KI2#/AN10/CMP0_2 D 6 CEC@ 2 1U_0402_6.3V6K 2 0.1U_0402_16V4Z CEC@ HDMI_CLK VSS/AVSS +3VL 2 P1_4/TXD0 CEC_FSHUPD1 CEC@ 2 R170 4.7K_0402_5% +3VL S 1 CEC_TEST P3_7/CNTR0#/SSO/TXD1 3 5 HDMI_CEC 12 13 2 CEC_INT# 37 G 2 P1_5/RXD0/CNTR01/INT11# P1_6/CLK0/SSI01 2 CEC@ 1CEC_XOUT 4 R171 47K_0402_5% 1 1 2 Q212A 2N7002DW-T/R7_SOT363-6 CEC@ CEC_INT# P3_5/SSCK/SCL/CMP1_2 G D 2 CEC@ 1CEC_RST# R169 4.7K_0402_5% R581 27K_0402_5% CEC@ 6 HDMI_CECIN D9 RB751V40_SC76-2 CEC@ 11 1 2 2 +3VL R162 10K_0402_5% CEC@ www.qdzbwx.com U16 Address: 0011010X 37,42 EC_SMB_CK1 1 1 +3VL 2 1 +3VL 1 HDMI CEC Controller 3 2 4 2 5 Q48 BSH111_SOT23-3 CEC@ EC_SMB_DA1 37,42 CEC@ +1.5VS +3VSG +HDMI_5V_OUT 13 VGA_HDMI_TX0- 2 0.1U_0402_16V7K DHDMI@ CV298 1 2 0.1U_0402_16V7K DHDMI@ VGA_DVI_TXD1- CV295 1 2 0.1U_0402_16V7K DHDMI@ VGA_DVI_TXD2+ CV300 1 2 0.1U_0402_16V7K DHDMI@ VGA_DVI_TXD2- VGA_DVI_TXD0- 3 2 R401 13 VGA_HDMI_DATA 1 3 0_0402_5% 2 R438 7 UMA_HDMI_DATA 5 P 1 74AHCT1G125GW_SOT353-5 HDMI@ HDMI_SDATA +3VL Q19 IHDMI@ BSH111_SOT23-3 1 HDMI@ 0_0402_5% HDMI@ 2 1 R570 100K_0402_5% HDMI@ 2 1 R571 2.2K_0402_5% HDMI_HPD_R 5 UMA_HDMI_TXCB 5 UMA_HDMI_TX0+ 5 UMA_HDMI_TX05 UMA_HDMI_TX1+ 5 UMA_HDMI_TX15 UMA_HDMI_TX2+ 5 UMA_HDMI_TX2- CV308 CV304 CV306 1 2 0.1U_0402_16V7K IHDMI@ VGA_DVI_TXC+ 1 2 0.1U_0402_16V7K IHDMI@ VGA_DVI_TXC- 1 2 0.1U_0402_16V7K IHDMI@ CV302 1 2 0.1U_0402_16V7K IHDMI@ CV303 1 2 0.1U_0402_16V7K IHDMI@ VGA_DVI_TXC+ 1 1 2 0_0402_5% HDMI@ 2 2 4 4 3 HDMI_R_CK- HDMI_R_CK+ HDMI_R_CKHDMI_R_D1HDMI_R_D1+ 3 OCE2012120YZF @ 1 2 R173 0_0402_5% HDMI_R_D0+ HDMI_R_CK+ HDMI_R_D0- VGA_DVI_TXD0+ HDMI_R_D2VGA_DVI_TXD0- VGA_DVI_TXD0+ 1 R175 L9 1 1 2 0_0402_5% HDMI@ 2 2 4 4 3 VGA_DVI_TXD1+ CV301 1 2 0.1U_0402_16V7K IHDMI@ VGA_DVI_TXD1- CV307 1 2 0.1U_0402_16V7K IHDMI@ VGA_DVI_TXD2+ CV305 1 2 0.1U_0402_16V7K IHDMI@ VGA_DVI_TXD2- VGA_DVI_TXD1- @ 1 R182 L10 1 1 2 0_0402_5% HDMI@ 2 2 4 4 3 VGA_DVI_TXD2+ 1 R187 L11 1 A 4 1 4 @ 2 0_0402_5% HDMI@ 2 2 3 HDMI_R_D2+ +5VS 1 HDMI@ D53 +5VS 2 VGA_HDMI_HPD +HDMI_5V_OUT_F 1 2 +HDMI_5V_OUT 0.5A_8V_KMC3S050RY HDMI@ D54 D S 2 G 2 13 F2 1 PMEG2010AEH_SOD123 +5VL 9,23 1 2 1 C259 HDMI@ 0.1U_0402_16V4Z B PMEG2010AEH_SOD123 CEC@ Q24 2N7002_SOT23-3 HDMI@ HDMI Connector JHDMI HDMI_HPD_C 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 +HDMI_5V_OUT HDMI_R_D1+ HDMI_R_D2+ R195 604_0402_1% IHDMI@ R197 604_0402_1% IHDMI@ R198 604_0402_1% IHDMI@ R202 604_0402_1% IHDMI@ R201 604_0402_1% IHDMI@ R203 604_0402_1% IHDMI@ R205 604_0402_1% IHDMI@ R206 604_0402_1% IHDMI@ HDMI_SDATA HDMI_SCLK HDMI_CEC HDMI_R_CKHDMI_R_CK+ HDMI_R_D0HDMI_R_D0+ HDMI_R_D1HDMI_R_D1+ HDMI_R_D2HDMI_R_D2+ @ HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKGND CK_shield GND CK+ GND D0GND D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+ 20 21 22 23 A TYCO_1939864-1_19P HDMI_R_D2- Issued Date Compal Electronics, Inc. Compal Secret Data 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 4 2 HDMI_HPD DHDMI@ 1 2 R374 0_0402_5% HDMI_R_D1- Security Classification 5 +3VS 2 3 OCE2012120YZF @ 1 2 R188 0_0402_5% C HDMI_R_D0- 3 OCE2012120YZF @ 1 2 R183 0_0402_5% VGA_DVI_TXD1+ HDMI_R_D0+ 2 DHDMI@ 499_0402_1% 2 DHDMI@ 499_0402_1% 2 DHDMI@ 499_0402_1% 2 DHDMI@ 499_0402_1% 2 DHDMI@ 499_0402_1% 2 DHDMI@ 499_0402_1% 2 DHDMI@ 499_0402_1% 2 DHDMI@ 499_0402_1% 3 OCE2012120YZF @ 1 2 R180 0_0402_5% VGA_DVI_TXD0- VGA_DVI_TXD2- @ 1 R195 1 R197 1 R198 1 R202 1 R201 1 R203 1 R205 1 R206 1 5 UMA_HDMI_TXC+ @ 3 For UMA & PowerXpress 1 R157 L8 C265 0.1U_0402_16V4Z HDMI@ D55 RB751V40_SC76-2 HDMI@ VGA_DVI_TXC- 1 HDMI_SCLK 1 Q18 BSH111_SOT23-3 HDMI@ 1 DHDMI@ 1 1 1 VGA_DVI_TXD1+ 4 Y 2 1 2 0.1U_0402_16V7K DHDMI@ 1 U9 OE# 1 CV299 A G CV297 DHDMI@ 2 1 R391 0_0402_5% 13 VGA_HDMI_CLK 2 R185 2K_0402_1% HDMI@ 3 VGA_DVI_TXD0+ 1 HDMI_HPD_C R186 100K_0402_5% HDMI@ HDMI_HPD_R 2 VGA_DVI_TXC- 2 0.1U_0402_16V7K DHDMI@ 2 D 2 0.1U_0402_16V7K DHDMI@ 1 R184 2K_0402_1% HDMI@ D 13 VGA_HDMI_TX2- 1 CV294 S 13 VGA_HDMI_TX2+ CV293 7 UMA_HDMI_CLK S 13 VGA_HDMI_TX1- VGA_DVI_TXC+ G 13 VGA_HDMI_TX1+ 2 0.1U_0402_16V7K DHDMI@ G 13 VGA_HDMI_TX0+ 1 C264 0.1U_0402_16V4Z HDMI@ 2 13 VGA_HDMI_CLK- CV296 2 13 VGA_HDMI_CLK+ IHDMI@ 2 1 R435 0_0402_5% 1 For DISCRETE 2 C HDMI@ R145 HDMI_HPD_U 1 2 1K_0402_5% 2 2 +5VL R453 R452 0_0402_5% 0_0402_5% IHDMI@ DHDMI@ 3 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet 1 30 of 51 4 3 SATA HDD Conn. 2 1 www.qdzbwx.com USB Board@ Left Side SATA ODD Conn. Close to JODD +5VS 1 2 3 4 5 6 7 8 9 10 11 12 GND GND 1.2A D 1 1 C356 10U_0805_10V6K 2 2 1 2 GND GND C359 0.1U_0402_16V4Z 2 1 2 3 4 5 6 7 SATA_FTX_C_DRX_P0 SATA_FTX_C_DRX_N0 C369 1 C367 1 2 0.01U_0402_25V7K 2 0.01U_0402_25V7K SATA_FRX_DTX_N0 SATA_FRX_DTX_P0 C368 1 C370 1 2 0.01U_0402_25V7K 2 0.01U_0402_25V7K 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 V33 V33 V33 GND GND GND V5 V5 V5 GND Reserved GND V12 V12 V12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 D 1 +USB_VCCC C376 1 C377 1 2 0.01U_0402_25V7K 2 0.01U_0402_25V7K SATA_FTX_DRX_P1 24 SATA_FTX_DRX_N1 24 SATA_FRX_DTX_N1 SATA_FRX_DTX_P1 C378 1 C375 1 2 0.01U_0402_25V7K 2 0.01U_0402_25V7K SATA_FRX_C_DTX_N1 24 SATA_FRX_C_DTX_P1 24 ODD_PLUGIN#_R 1 R561 +5VS_ODD 2 0_0402_5% ODD_PLUGIN# ODD_DA# 3 +USB_VCCB AO3413_SOT23 SATA_FTX_C_DRX_P1 SATA_FTX_C_DRX_N1 1 R568 +5VALW 37 2 100K_0402_5% D USB_EN# USB_EN# 23 ODD_DA# 23 +USB_VCCC ACES_88058-120N Close to JHDD GND A+ AGND BB+ GND C 1 C358 0.1U_0402_16V4Z JHDD1 @ 24 23 C357 0.1U_0402_16V4Z Q8 @ 2 G JODD Place components closely HDD CONN. S 5 W=60mils @ 2 R190 SATA_FTX_DRX_P0 24 SATA_FTX_DRX_N0 24 C428 1 C389 1 1 0_0402_5% L15 SATA_FRX_C_DTX_N0 24 SATA_FRX_C_DTX_P0 24 23 USB20_N2 4 23 USB20_P2 1 +3VS 3 3 1 2 2 USB20_N2_R USB20_P2_R WCM-2012-900T_0805 @ 2 0.1U_0402_16V4Z JUSB 4 2 R189 2 1000P_0402_50V7K 1 0_0402_5% @ 1 2 3 4 VCC DD+ GND 5 6 7 8 GND1 GND2 GND3 GND4 C ACON_UARB2-4K1926 +5VS D23 USB20_N2_R 2 1 USB20_P2_R 3 AZC199-02SPR7G_SOT23-3 OCTEK_SAT-22SO1G USB Board@ Right Side SATA 2nd HDD Conn. W=60mils 2.5A +5VALW +USB_VCCA For EMI U14 +5VS 1.2A 1 Place closely JHDD2 SATA CONN. C363 10U_0805_10V6K 2 B 1 C372 0.1U_0402_16V4Z 2 1 C373 0.1U_0402_16V4Z 2 1 1 2 3 4 USB_EN# C374 0.1U_0402_16V4Z GND VOUT VIN VOUT VIN VOUT EN FLG 8 7 6 5 2 C361 USB_OC0# 23,37 1 RT9715BGS_SO8 R73 1 2 @ 1 1000P_0402_50V7K 0_0402_5% 2 C362 4.7U_0805_10V4Z 2 @ B L53 23 23 1 USB20_N0 4 USB20_P0 1 2 4 3 2 USB20_N0_R 3 USB20_P0_R W=60mils +USB_VCCA WCM-2012-900T_0805 Close to JHDD2 1 R87 @ ACES_85201-2005N 2 0_0402_5% 1 3 5 7 9 11 13 15 17 19 21 23 1 3 5 7 9 11 13 15 17 19 21 23 2 4 6 8 10 12 14 16 18 20 22 24 2 4 6 8 10 12 14 16 18 20 22 24 SATA_FTX_C_DRX_P2 SATA_FTX_C_DRX_N2 C364 1 C365 1 2 0.01U_0402_25V7K 2 0.01U_0402_25V7K SATA_FRX_DTX_N2 SATA_FRX_DTX_P2 C366 1 C371 1 2 0.01U_0402_25V7K 2 0.01U_0402_25V7K R77 1 SATA_FTX_DRX_P2 24 SATA_FTX_DRX_N2 24 @ 0_0402_5% 2 +5VALW SATA_FRX_C_DTX_N2 24 SATA_FRX_C_DTX_P2 24 USB20_N1 1 1 23 USB20_P1 4 4 +5VS 2 2 USB20_N1_R 3 3 USB20_P1_R USB20_N0_R USB20_P0_R WCM-2012-900T_0805 1 R88 @ 36 36 2 0_0402_5% D24 USB20_N0_R Confirm SSD need 3V or not. USB20_P0_R @ D25 2 1 3 USB20_N1_R 2 USB20_P1_R 3 AZC199-02S.R7G_SOT23-3 Issued Date @ 1 2011/01/06 AZC199-02S.R7G_SOT23-3 Compal Electronics, Inc. 2012/01/06 Deciphered Date Title Date: 4 3 A JPIO THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 @ Compal Secret Data Security Classification HP_R HP_L 36 MIC1_L 36 MIC1_R 36 NBA_PLUG 36 BACK_SENSE ACES_85203-1202L A +5V_IO USB20_N1_R USB20_P1_R @ 1 2 R148 0_0402_5% L54 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 1 2 R149 0_0402_5% +5VL @ JHDD2 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Sheet Monday, July 04, 2011 1 31 of 51 E F G Slot 1 Half PCIe Mini Card-WLAN Slot 2 Half PCIe Mini Card- JET WLAN&BT Combo module circuits 2 1 1 +3V_WLAN 24 PJ26@ JUMP_43X79 1 2 +3VS 3 BT_CTRL D S 2N7002_SOT23-3 BT on module Enable Disable BT_CRTL H L BT_ON# L H Q36 2 G BT_ON# BT on module Remove 3G/TV tuner CM4 +1.5VS Short PJ26 for WLAN 23 CLKREQ_JET# 22 22 CM1 CM2 CM3 C253 47P_0402_50V8J 2 2 @ 4.7U_0805_10V4Z 2 0.01U_0402_25V7K For SED 0.1U_0402_16V4Z 1 1 CM7 @ CM8 @ 2 0.01U_0402_25V7K 1 CM9 @ C254 47P_0402_50V8J 2 2 @ 4.7U_0805_10V4Z +1.5VS JWLAN @ R1443 0_0402_5% BT_CTRL 1 2BT_CTRL_R 23 CLKREQ_WLAN# 22 22 CLK_WLAN# CLK_WLAN 2 5 PCIE_FRX_WLANTX_N1 5 PCIE_FRX_WLANTX_P1 5 PCIE_FTX_C_WLANRX_N1 5 PCIE_FTX_C_WLANRX_P1 WLAN +3V_WLAN R16 10_0402_5%2 1 2 0_0402_5% R17 37,38 E51_TXD 37,38 E51_RXD E51_TXD_R E51_RXD_R 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 GND1 Debug card using 5 PCIE_FTX_C_JETRX_N2 5 PCIE_FTX_C_JETRX_P2 1 1 1 0.1U_0402_16V4Z 1 2 1 5 PCIE_FRX_JETTX_N2 5 PCIE_FRX_JETTX_P2 +1.5VS For SED +3VS +3V_WLAN @ 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 GND2 54 WLAN_OFF# 1 R21 0_0402_5% 2 WL_OFF# 24 APU_PCIE_RST# 12,22,27,33 USB20_N8 23 USB20_P8 23 53 GND1 +3VS For SED 0.1U_0402_16V4Z 1 1 1 CM11 CM10 C288 @ @ 47P_0402_50V8J 2 2 2 @ 0.01U_0402_25V7K 4.7U_0805_10V4Z @ 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 GND2 54 2.75A 1 APU_PCIE_RST# 3G_OFF# 24 FCH_SCLK0 FCH_SDATA0 2 Need to double check JET pin define BT BT_CTRL 1 R327 2 E51_RXD_R 1K_0402_5% MAX14566B +USB_VCCB U15 35,37 USB_CHG_EN# 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 2 2 4.7U_0805_10V4Z C255 47P_0402_50V8J CM12 @ @ For isolate Intel Rainbow Peak and Compal Debug Card. CB SLP_CHG# 2.5A 1 2 3 4 0.1U_0402_16V4Z 1 1 CM5 CM6 +1.5VS For SED FCH_SCLK0 10,11,23 FCH_SDATA0 10,11,23 USB Sleep & Charge: Auto-Mode Mode3 +5VALW 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 120 mils FOX_AS0B226-S40N-7F FOX_AS0B226-S40N-7F 3 CLK_JET# CLK_JET 2 40 mils +3V_WLAN 1 0.01U_0402_25V7K 2 JTV 1 H www.qdzbwx.com +3VS 1 D 2 C 1 B 2 A GND VOUT VIN VOUT VIN VOUT EN FLG 0 AUTO MODE 0 1 Force Dedicated charger mode (MODE3) 1 X Pass-Through (USB) Mode: Connect DP/DM to TDP/TDM C400 0.1U_0402_16V4Z 3D@ +3VS USB_OC1# 23,35,37 1 2 3 IR Emitter Connector STATUS 0 W=60mils 8 7 6 5 RT9715BGS_SO8 CEN# SLP_CHG_M3 2 3D@ R262 C383 4.7U_0805_10V4Z @ 1 0_0603_5% 9,13,37,38,39 EC_SMB_CK2 9,13,37,38,39 EC_SMB_DA2 13 STEREO_SYNC JIR +IR_VCC EC_SMB_CK2 EC_SMB_DA2 STEREO_SYNC @ 1 2 3 4 5 6 1 2 3 4 5 6 7 8 GND GND ACES_87213-0600G_6P 4 4 U5 SLP_CHG_M3 USB20_DN1_R USB20_DP1_R 24 SLP_CHG_M3 35 USB20_DN1_R 35 USB20_DP1_R 1 2 3 4 9 CEN DM DP GND GND CB TDM TDP VCC SLP_CHG# USB20_N10 USB20_P10 8 7 6 5 1 MAX14566BEETA+_TDFN-EP8_2X2 SLP_CHG# 24 USB20_N10 23 USB20_P10 23 +5VALW C892 0.1U_0402_16V7K Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date 2 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C D E F G SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 32 Sheet H of 51 A B C UL1 5 PCIE_FRX_C_LANTX_P0 CL1 5 PCIE_FRX_C_LANTX_N0 CL2 1 2 0.1U_0402_16V7K PCIE_FRX_LANTX_P0 1 2 0.1U_0402_16V7K PCIE_FRX_LANTX_N0 5 PCIE_FTX_C_LANRX_P0 5 PCIE_FTX_C_LANRX_N0 CLKREQ_LAN# 23 CLKREQ_LAN# 12,22,27,32 APU_PCIE_RST# 1 +3V_LAN 22 22 RL24 2 @ 1 10K_0402_5% CLKREQ_LAN# RL25 2 @ 1 10K_0402_5% FCH_PCIE_WAKE# +3VS Pin15 NC CLKREQB PERSTB 19 20 REFCLK_P REFCLK_N LAN_X1 43 CKXTAL1 LAN_X2 44 CKXTAL2 NC 28 26 RL21 2 8111E@ 1 10K_0402_5% RL22 1 2 1K_0402_5% +3V_LAN ENSWREG WOL_EN 2 0_0402_5% RL7 15K_0402_5% 31 37 40 EECS/SCL EEDI/SDA 30 32 RL2 2 RL1 2 MDIP0 MDIN0 MDIP1 MDIN1 NC/MDIP2 NC/MDIN2 NC/MDIP3 NC/MDIN3 1 2 4 5 7 8 10 11 LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1LAN_MDI2+ LAN_MDI2LAN_MDI3+ LAN_MDI3- DVDD10 DVDD10 DVDD10 13 29 41 ISOLATEB Sx Enable Wake up Sx Disable Wake up LOW WOL_EN HIGH S0 NC/SMBCLK NC/SMBDATA GPO/SMBALERT 33 ENSWREG VDDREG VDDREG 46 2 2.49K_0402_1% 24 49 1 RL5 LL1 1 10K_0402_5% 1 10K_0402_5% 8111E@ +LAN_REGOUT 1 2 2.2UH +-5% NLC252018T-2R2J-N 1 RSET GND PGND +LAN_VDD10 CL9 0.1U_0402_16V4Z 2 8111E@ +LAN_VDD10 +3V_LAN +3V_LAN EVDD10 21 +LAN_EVDD10 AVDD10 AVDD10 AVDD10 AVDD10 3 6 9 45 +LAN_VDD10 1 1 2 2 CL17 0.1U_0402_16V4Z Close to Pin 21 +3V_LAN 8111E@ 8111E@ +LAN_VDDREG 8111E@ 1 8111E@ LL3 2 0_0603_5% 1 CL28 4.7U_0603_6.3V6K 8111E@ 2 +LAN_REGOUT 36 2 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z CL19, CL20,CL21 close to pin 13,29,45, respectively CL22 close to pin 3, respectively CL23,CL24,CL25 close to pin 6,9,41, respectively 2 0_0603_5% CL18 1U_0402_6.3V6K 12 42 47 48 2 +LAN_EVDD10 1 LL2 AVDD33 AVDD33 AVDD33 AVDD33 REGOUT CL3 to CL6 close to Pin 27,39,47,48 CL7 to CL8 close to Pin 12,42 1 CL3 1 CL4 1 CL5 1 CL6 1 8111E@ CL7 1 8111E@ CL8 1 Layout Note: LL1 must be within 200mil to Pin36, CL13 CL13,CL9 must be within 4.7U_0603_6.3V6K 200mil to LL1 8111E@ 2 +LAN_VDD10 27 39 DVDD33 DVDD33 14 15 38 34 35 +LAN_VDDREG +3V_LAN +LAN_VDD10 LED3/EEDO LED1/EESK LED0 LANWAKEB 10K ohm PD 1K ohm Pull-high 1 RL433 HSIP HSIN CLK_LAN CLK_LAN# FCH_PCIE_WAKE# 23,35 FCH_PCIE_WAKE# 1K_0402_5% RL6 @ ISOLATE# HSON 17 18 16 2 1 RL19 0_0402_5% APU_PCIE_RST# 25 ISOLATE# Pin38 1 2 NC 23 E www.qdzbwx.com 8111E@ HSOP RTL8111E RTL8105E Pin14 CLK_LAN CLK_LAN# 22 D 60 mils 8111E@ 1 1 CL19 1 CL20 1 CL21 1 CL22 1 CL23 1 CL24 1 CL25 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z CL29 0.1U_0402_16V4Z 2 8111E@ +3V_LAN HIGH RTL8111E-GR-VL_QFN48_6X6 2 2 SA00004LR00 1 +3VALW TO +3V_LAN YL1 1 1 +3V_LAN LAN_X2 2 FOR EMI ISN TEST DEMAND. 0 ohm (Pull Down) 1 2 RL23 0_0402_5% 8105E@ 1 1 PJ29 JUMP_43X79 @ +3V_LAN SP050006W00 RJ45_MIDI0+ RJ45_MIDI0- 16 15 14 13 12 11 10 9 JLAN 3 PR4- RJ45_MIDI3+ 7 PR4+ RJ45_MIDI1- 6 PR2- RJ45_MIDI2- 5 PR3- RJ45_MIDI2+ 4 PR3+ RJ45_MIDI1+ 3 PR2+ RJ45_MIDI0- 2 PR1- RJ45_MIDI0+ 1 PR1+ 10/100M transformer_HD245 UL1 8105E@ 1 2 3 TCT1 TD1+ TD1- MCT1 MX1+ MX1- 24 23 22 LAN_MDI2LAN_MDI2+ 4 5 6 TCT2 TD2+ TD2- MCT2 MX2+ MX2- 21 20 19 LAN_MDI1LAN_MDI1+ 7 8 9 TCT3 TD3+ TD3- MCT3 MX3+ MX3- 18 17 16 LAN_MDI0LAN_MDI0+ 10 11 12 TCT4 TD4+ TD4- MCT4 MX4+ MX4- 15 14 13 RTL8105E-VL-CGT SA00003PO30 CL40 1000P_0402_50V7K 2 1 1 8111E@ 2 RL12 75_0402_1% 8111E@ CL41 1000P_0402_50V7K 2 1 1 2 RL13 75_0402_1% CL42 1000P_0402_50V7K 2 1 1 2 RL15 75_0402_1% RJ45_MIDI3RJ45_MIDI3+ RJ45_MIDI2RJ45_MIDI2+ 1 1 2 2 1 CL36 2 1000P_1808_3KV7K LANGND 1 2 Compal Secret Data 2011/01/06 Issued Date 10 AZC199-02SPR7G_SOT23-3 DL2 SP050006800 Security Classification 9 SHLD2 RJ45_MIDI0RJ45_MIDI0+ SUPERWORLD_SWG150401 CL34 0.1U_0402_25V6 SHLD1 SANTA_130451-D @ RJ45_MIDI1RJ45_MIDI1+ RJ45_GND @ CL35 0.1U_0402_25V6 4 DL1 AZC199-02SPR7G_SOT23-3 2 LAN_MDI3LAN_MDI3+ CL39 1000P_0402_50V7K 2 1 1 8111E@ 2 RL11 75_0402_1% 8111E@ 2 For P/N and footprint Please place them to ISPD page 8111E@ 1 UL4 1 8 1 RJ45_MIDI1+ RJ45_MIDI1- RJ45_MIDI3- 3 LAN_MDI1+ LAN_MDI1- TX+ TXCT NC NC CT RX+ RX- 2 +3V_LAN rising time (10%~90%) need > 1ms and <100ms. LAN Conn. 8105E@ TD+ TDCT NC NC CT RD+ RD- 3 3 1 2 3 4 5 6 7 8 2012/01/06 Deciphered Date 3 UL3 LAN_MDI0+ LAN_MDI0- 2 3 2 CL682 1U_0402_6.3V6K 2 1 1 CL681 4.7U_0805_10V4Z @ NC RL23 1 2 2 3 @ CL482 0.01U_0402_25V7K RL4 0_0402_5% 8111E@ 1 1 AO3413_SOT23 CL27 27P_0402_50V8J 2 ENSWREG G 2 1 CL26 27P_0402_50V8J 2 Vgs=-4.5V,Id=3A,Rds<97mohm 1 2 @ QL51 2 2 47K_0402_5% CL483 @ 0.1U_0402_16V7K D 1 @RL432 @ RL432 1 WOL_EN 2 S RL147 100K_0402_5% @ 37 1 25MHZ_20PF_7A25000012 2 LAN_X1 +3VALW +3VALW CL684 10U_0805_10V6K 2 RTL8105E-VC RTL8105E-VC RTL8111E-VB PWM Mode LDO Mode NC RL4 0 ohm (Pull High) Title CL37 220P_0402_50V6K 1 2 CL38 @ 4.7U_0603_6.3V6K 4 Compal Electronics, Inc. SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev B 4019D8 Date: A B C D Sheet Monday, July 04, 2011 E 33 of 51 3 2 JMB389C D 2 2 1 CC4 2 CC4 close to pin 10 23 22 PCIE_MTX_C_CRRX_N2 22 PCIE_MTX_C_CRRX_P2 22 PCIE_MRX_C_CRTX_N2 22 PCIE_MRX_C_CRTX_P2 CC8 CC9 1 1 2 2 3 4 APCLKN APCLKP 9 8 APRXN APRXP PCIE_MRX_CRTX_N2 11 PCIE_MRX_CRTX_P2 12 APTXN APTXP PCIE_MTX_C_CRRX_N2 PCIE_MTX_C_CRRX_P2 0.1U_0402_16V7K 0.1U_0402_16V7K APREXT 2 1 RC3 12K_0402_1% 12mil 2 CC16 +SDV33_18 1 2.2U_0603_6.3V6K 7 43 39 CC16 close to pin43 For internal LDO in SD3.0 APVDD APV18 NC/TAV33 5 10 36 DV33 DV33 DV33 DV18 DV18 19 20 44 18 37 MDIO0 MDIO1 MDIO2 MDIO3 MDIO6/4 MDIO5 G/MDIO6 MDIO7 MDIO8 MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14 48 47 46 45 41 42 24 40 29 28 27 26 25 23 22 NC/SPI_SCK NC/SPI_CSN NC/SPI_SO NC/SPI_SI 30 33 34 35 APGND NC/GND NC/GND NC/GND 6 31 32 38 APREXT SDDV/MDIO4 TXIN/NC JMB389 FCH_PCIE_RST# 23,35 FCH_PCIE_RST# 1 2 +VCC_OUT C 2 RC7 1 RC9 1 10K_0402_5% 2 1K_0402_5% XDWP#_SDWP# XRSTN XTEST CPPE# XD_CD# 13 14 CPPE_N CR1_CD2N MS_CD# SD_CD# 15 16 CR1_CD1N CR1_CD0N 17 CR1_PCTLN 21 CR1_LEDN XD_RB# 40 mils +VCC_OUT CR_LEDCON# 39 CR_LEDCON# 1 3 CPPE# 2N7002_SOT23-3 RC6 1 24 CR_WAKE# place near pin 19,20 and 44 CLK_CR# CLK_CR 1 0_0402_5% SD_CD# 2 D +3VS UC1 CLK_CR# CLK_CR CR_CPPE# QC1 +3VS 22 22 RC19 10K_0402_5% 2 1 CC3 2 G 1 CC2 +3VS +3VS S 2 D3E mode D 1 CC1 10U_0805_10V6K 20mil 1 www.qdzbwx.com CC3 close to pin 5 CC2 close to CC3 CC1 is near CC3 0.1U_0402_16V4Z +1.8VS_OUT 1000P_0402_50V7K 4 0.22U_0402_6.3V6K 5 40mil CC5 1 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 1 CC6 1 CC7 2 RC18 @ 1 10K_0402_5% CC12 0.1U_0402_16V4Z 1 +1.8VS_OUT 20mil +3VS 2 CC12 close to pin 36 Power On Strapping setting XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 SDCMD_MSBS_XDWE# SDCLK_MSCLK_XDCE# XDWP#_SDWP# XD_CLE XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7 XD_RE# XD_RB# XD_ALE CC10 2 1 1 2 0.22U_0402_6.3V6K CC11 10U_0805_10V6K Description Pin name CC11 close to pin18 For intenal LDO's usage low High MDIO7 on-board★ add-in card MDIO14 CR_LEDCON# high active CR_LEDCON# low active★ CC10 close to pin37 C JMB389-LGAZ0A_LQFP48_7X7 Add RC24 and RC17 close to UC1 for xD issue SDCMD_MSBS_XDWE# 5 in 1 Card Reader B SD_CD# XD_CD# JREAD +VCC_OUT CC22 0.1U_0402_16V4Z @ 1 1 2 2 CC23 0.1U_0402_16V4Z CC17 10U_0805_10V6K 1 2 33 XD_CD# 34 XD_RB# 1 XD_RE# 2 SDCLK_MSCLK_XDCE#_R 3 XD_CLE 0.1U_0402_16V4Z 4 2 XD_ALE 5 XDWE# 6 XDWP#_SDWP# 7 1 CC18 XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7 8 9 26 27 28 30 31 32 XD-VCC XD-CD-SW XD-R/B XD-RE XD-CE XD-CLE XD-ALE XD-WE XD-WP XD-D0 XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7 1 22_0402_5% 2 RC17 SDCMD_MSBS 1 0_0402_5% Change RC17 to 0 ohm for SDXC performance low issue @ 40 mils XDWE# 2 RC24 MS-VCC MS-SCLK MS-INS MS-BS MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3 14 15 17 21 19 20 18 16 SDCLK_MSCLK_XDCE#_R MS_CD# SDCMD_MSBS XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 SD-VCC SD-CLK SD-CMD SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-WP-SW SD-CD-SW 23 24 12 25 29 10 11 35 36 SDCLK_MSCLK_XDCE#_R SDCMD_MSBS XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XDWP#_SDWP# SD_CD# 4in1-GND 4in1-GND 4in1-GND 4in1-GND 13 22 37 38 B +VCC_OUT Reserved for EMI,close to UC1.42 SDCLK_MSCLK_XDCE# +VCC_OUT 1 RC11 SDCLK_MSCLK_XDCE#_R 2 0_0402_5% 1 CC13 22P_0402_50V8J @ 2 Change MDIO5 clock trace routing for SDHC issue TAITW_R015-211-LM-A_NR A A Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title Compal Electronics, Inc. SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Rev B 4019D8 Monday, July 04, 2011 Sheet 1 34 of 51 5 4 RENE@ VIN VOUT VIN VOUT VCNTL POK FB 3 4 USB30_POK 5 9 6 7 +3V 8 EN 1 GND RENE@ 2 2 1 RT2 10K_0402_1% 8P_0402_50V8D CT6 1 1 @ 2 +3VALW to +3V Transfer RT3 RENE@ 32.4K_0402_1% RENE@ 1 2 1 0.1U_0402_16V7K CT4 RENE@ RENE@ 2 CT5 2 0.01U_0402_25V7K 2 RT15 RT16 RT17 0_0402_5% FCH_PCIE_RST# USB30_WAKE# CLKREQ_USB30#_R 1 RENE@ 2 10K_0402_5% @ 1 2 100_0402_1% RENE@ 1 2 10K_0402_5% USB30_SMI_R USB30_SMI#_R 2 1SS355TE-17_SOD323-2 1 2 RENE@ 1 2 DT3 USB30_SMI#_IC 1 1 For UPD720200: SMI high active D 1 Q57 @ 2 2 1 G S 2N7002_SOT23-3 1 SPI_CLK_USB SPI_CS_USB# SPI_SI_USB SPI_SO_USB RENE@ @ 2 USB30_SMI_R RT21 0_0402_5% +1.05V:800mA H2 K1 K2 PERSTB PEWAKEB PECREQB USB30_XT1 USB30_XT2 J2 J1 H1 P4 AUXDET PSEL SMI SMIB P5 PONRSTB M2 N2 N1 M1 SPISCK SPISCB SPISI SPISO K13 K14 J13 GND GND GND C14 GND N14 M14 23 USB30_RX0N 23 USB30_RX0P 2 CT38 RENE@ 1 2 RENE@ RT29 @ +3V USB30_RX0P 23 USB30_TX0N U3TXDN1 2 0.1U_0402_16V7K 23 USB30_TX0P 1 CT32 U3TXDP1 2 0.1U_0402_16V7K +USB_VCCB W=80mils D7 U3TXDP2 B6 U3TXDN2 U2DM2 A6 N8 4.7U_0805_10V4Z U2DP2 U3RXDP2 P8 B8 CT26 A1 A2 A3 A4 A5 A7 A9 A11 A13 A14 B3 B4 B5 B7 B9 B11 B13 B14 C1 C2 C3 C10 C11 2 OCI2B OCI1B G14 H13 OCI2# OCL1# PPON2 PPON1 H14 J14 USB30PWRON 1 RT13 2 10K_0402_5% RENE@ U3TXDP1 B10 U3TX_C_DP1 T51 A10 N10 U3TX_C_DN1 U2D_DN1_N T52 T53 U2DP1 U3RXDP1 P10 B12 U2D_DP1_N U3RXDP1_R T54 T55 U3RXDN1 A12 U3RXDN1_R T56 RREF U2AVSS P12 N12 RT22 U2PVSS N11 U3AVSS D6 2 0_0402_5% USB_CHG_EN# U3TXDP1_L 32,37 +USB_VCCB 9 1 8 3 7 2 6 4 5 U3TXDN1_L USB20_DP1_L USB20_DN1_L U3RXDP1_R_L U3RXDN1_R_L @ SSTX+ VBUS SSTXD+ GND DSSRX+ GND SSRX- DT5 U3TXDP1_L 1 1 USB20_DP1_L 2 2 USB20_DN1_L 3 3 @ W=80mils GND GND GND GND 10 11 12 13 1 1 P14 P11 P9 P7 P2 P1 N13 N9 N7 N3 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 L12 L11 L7 L6 @ U3TXDP1_L 109 U3TXDN1_L 2 2 98 U3TXDN1_L U3RXDP1_R_L 4 4 77 U3RXDP1_R_L U3RXDN1_R_L 5 5 66 U3RXDN1_R_L 8 YSCLAMP0524P_SLP2510P8-10-9 Change ESD Diode for EMI request +3V CLKREQ_USB30#_R RT45 10K_0402_5% RENE@ DT1 1 2 CLKREQ_USB30# 22 RB751V40_SC76-2 RENE@ 1 RT8 @ +3V 2 0_0402_5% C12 C13 D3 D4 D11 D12 D13 D14 E1 E2 E13 E14 F4 F6 F7 F8 F9 F11 F12 G1 G2 G6 G7 G8 G9 G11 G12 G13 H6 H7 H8 H9 H12 J3 J4 J6 J7 J8 J9 J11 J12 K3 K4 L1 L2 L3 L4 +3V 10K_0402_5% 2 RT43 1 RENE@ USB30_SMI#_IC QT3B 4 3 USB30_SMI# 23 QT3A 1 Close to UT1.M2 2 CS# SO WP# GND +3V 1 RENE@ VCC HOLD# SCLK SI 8 7 6 5 CT39 RENE@ 1 2 0.1U_0402_16V7K RENE@ 1 RT35 210K_0402_5% SPI_CLK_USB_R SPI_SI_USB 6 A USB_OC1# 23,32,37 2N7002DW-T/R7_SOT363-6 RENE@ SPI_CLK_USB_R 1 RT36 2 0_0402_5% 1 RT34 2 0_0402_5% @ 2 1 MX25L5121EMC-20G SOP 8P Compal Secret Data Security Classification CT40 0.1U_0402_16V7K @ Issued Date 2011/01/06 Deciphered Date 2012/01/06 Title Compal Electronics, Inc. SCHEMATIC, MB A7213 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SPI_CLK_USB RENE@ 5 10K_0402_5% 2 RT44 1 RENE@ 35mA SPI_CLK_USB 1 2 3 4 B 3 3 OCL1# UT4 1000P_0402_50V7K 1 RENE@ 2 1.6K_0402_1% AZC199-02SPR7G_SOT23-3 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND CT28 2 LOTES_AUSB0003-P001C DT4 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 1 +3V JUSB30 @ 1 RT11 U3TXDN1 U2DM1 CSEL=0：24MHz XTAL CSEL=1：48MHz Clock CT27 2 UPD720200AF1-DAP-A RT33 10K_0402_5% RENE@ 1 CT31 C A8 A 2 + 2 XT1 XT2 CSEL 0.1U_0402_16V4Z 1 1 2N7002DW-T/R7_SOT363-6 RENE@ RT32 47K_0402_5% RENE@ USB20_DN1_L USB30_RX0N +3V 1 2 SM070000K00 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND Place as close as possibile to UT1.N14 and UT1.M14 SPI_CS_USB# SPI_SO_USB 1 USB20_DP1_L 2 2 1 1 12P_0402_50V8J CT37 RENE@ 12P_0402_50V8J 0_0402_5% RT30 @ 4 WCM-2012-900T_0805 1 2 RT7 0_0402_5% U3RXDN1_R_L 1 CT33 1 RT28 24MHZ_12PF_X5H024000DC1H 1 2 0_0402_5% RENE@ YT1 2 P6 1 2 0_0402_5% 1 1 SM070001U00 1 RT26 100_0402_5% RENE@ 1 2 2 2 2 1 1 CT15 0.01U_0402_25V7K 1 2 CT14 0.1U_0402_16V7K 2 CT13 0.01U_0402_25V7K 1 CT12 0.01U_0402_25V7K CT11 0.01U_0402_25V7K CT10 0.01U_0402_25V7K 1 2 USB20_DN1_R 220U_6.3V_M_R15 +3V 2 3 32 USB20_DN1_R 2 0_0402_5% @ 3 3 P13 H11 K11 K12 L8 VDD10 VDD10 VDD10 VDD10 E11 E12 E3 E4 H3 H4 L5 VDD10 VDD10 VDD10 VDD10 VDD10 VDD10 VDD10 C8 C9 D8 D9 VDD10 VDD10 VDD10 VDD10 C4 C5 C6 C7 D5 VDD10 VDD10 VDD10 VDD10 VDD10 N4 N5 N6 P3 VDD33 VDD33 VDD33 VDD33 L13 L14 +3V:200mA @ 2 USB30_SMI#_R RT40 0_0402_5% RENE@ RENE@ RENE@ RENE@ RENE@ RENE@ B 32 USB20_DP1_R 3 4 U2AVDD10 PERXP PERXN 1 RT18 RENE@ RT391 RENE@ 2 10K_0402_5% +3V 3 1 2 4 2 USB20_DP1_R Co-Layout with Hudson M3 internal USB3.0 Place co-layout resistors close to UT1 U3AVDO33 PCIE_MTX_C_USBRX_P1 F2 PCIE_MTX_C_USBRX_N1 F1 VDD33 VDD33 VDD33 VDD33 VDD33 PETXP PETXN CT44 1U_0402_6.3V6K 1 2 CT24 0.01U_0402_25V7K 2 CT23 0.01U_0402_25V7K 2 CT22 0.01U_0402_25V7K 1 CT21 0.1U_0402_16V7K 1 CT20 0.01U_0402_25V7K 2 CT19 0.01U_0402_25V7K 1 CT18 0.1U_0402_16V7K CT17 0.01U_0402_25V7K CT16 0.1U_0402_16V7K 2 1 PECLKP PECLKN RENE@ RT12 10_0402_5% 2 23,34 FCH_PCIE_RST# 23,33 FCH_PCIE_WAKE# RENE@ RENE@ RENE@ RENE@ RENE@ RENE@ RENE@ RENE@ RENE@ 1 1 RT5 LT2 2 WCM-2012HS-670T _0805 @ 1 2 RT10 0_0402_5% USB30_RX0N SM070001U00 U3RXDN2 +3V 2 B2 B1 D2 D1 L9 L10 RENE@ UT1 RENE@ 22 PCIE_MTX_C_USBRX_P1 22 PCIE_MTX_C_USBRX_N1 +1.05V U3TXDN1_L U3RXDP1_R_L 1 0_0402_5% +1.05V VDD33 VDD33 +3V USB30_SMI#_IC 2 4 +3VA CLK_USB30 CLK_USB30# RENE@ CT29 2 1 0.1U_0402_16V7K PCIE_MRX_USBTX_P1 CT30 2 1 0.1U_0402_16V7K PCIE_MRX_USBTX_N1 CLK_USB30 CLK_USB30# UPD720200A: SMIB Low active 1 3 3 QT1 AO3413_SOT23 RENE@ +3V 2 2 +3V F3 G3 G4 3 1 1 1 G 3 RENE@ CT42 0.1U_0402_16V4Z D 22 22 CT25 10U_0603_6.3V6M RENE@ 2 1 4 2 WCM-2012HS-670T _0805 @ 1 2 RT6 0_0402_5% U3TXDN1 @ 2 RT9 LT4 1 S C 1 USB30_RX0P 2 Follow Vendor recommend. 22 PCIE_MRX_C_USBTX_P1 22 PCIE_MRX_C_USBTX_N1 LT3 1 2 BLM18AG601SN1D_2P RENE@ 1 4 www.qdzbwx.com U3TXDP1_L 2 0_0402_5% +3VALW 2 RENE@ RT37 CT41 100K_0402_5% 0.1U_0402_16V7K RENE@ 1 1 RENE@ 2 2 RT38 47K_0402_5% 2 CT43 D 0.01U_0402_25V7K RENE@ 1 S 2N7002_SOT23-3 +3VA 1 0.1U_0402_16V7K CT7 RENE@ RENE@ 2 CT8 2 0.01U_0402_25V7K 2 +3V & +1.05V has power sequence timing: 0.1*VDD(+3V) ~ 0.9*VDD(+1.05V) < 100ms +3V 8P_0402_50V8D CT9 1 1 @ @ D +3VALW 37,40,45 SYSON 1 RT4 LT1 1 Vout=0.8(1+10K/32.4K) 1.042 ~ 1.0469 ~ 1.0519V Spec: 0.9975 ~ 1.05 ~ 1.1025 RENE@ 2 G QT2 U3TXDP1 +3VA 1A APL5930KAI-TRG_SO8 D Close to U102.P13 +3VA 1 2 UT2 Close to U102.D7 +1.05V VDD33 VDD33 VDD33 2 USB30_POK RENE@ 1 1 1 RT1 2 4.7K_0402_5% +3V +1.5V CT3 10U_0603_6.3V6M CT2 10U_0603_6.3V6M RENE@ +3V D10 F13 F14 +1.5V 2 5 +1.5V to +1.05V Transfer 3 Date: 4 3 2 Rev B 4019D8 Sheet Monday, July 04, 2011 1 35 of 51 3 +PVDD 2 RA2 2 1 0_0603_5% 600 mA 0.1U_0402_16V4Z CA57 1 1 CA56 1 www.qdzbwx.com Speaker Connector 0.1U_0402_16V4Z +5VALW 1 1 CA44 CA43 placement near Audio Codec RA13 2 1 0_0603_5% SPKL+ 2 RA20 CA1 1 CA61 35 mA 1 CA8 MIC1_LINE1_R_R 2 4.7U_0805_10V4Z 28 INT_MIC_DATA For EMI CA11 0.01U_0402_25V7K @ 1 CA12 2 0.1U_0603_50V7K CA50 1 2 0.1U_0603_50V7K 2 RA18 1 10_0603_5% Impedance +5VALW 25 AVDD1 46 39 PVDD2 MIC1_L MIC1_R HP_OUT_L HP_OUT_R 32 33 16 17 MIC2_L MIC2_R PD# RESET# 12 PCBEEP 13 SENSE A 18 SENSE B 36 35 CBP A SENSE B 75_0402_1% RA5 75_0402_1% 31 HP_R 31 10 AZ_SYNC_HD BCLK 6 AZ_BITCLK_HD SDATA_OUT 5 AZ_SDOUT_HD SDATA_IN 8 EAPD 47 SPDIFO 48 MONO_OUT 20 AZ_SDIN0_HD_R AZ_SDIN0_HD @ 29 MIC1_VREFO_R LDO_CAP 30 28 VREF 27 AC_VREF +MIC1_VREFO_R 31 MIC1_VREFO_L JDREF 19 AC_JDREF2 RA9 43 42 49 7 PVSS2 PVSS1 DVSS2 DVSS1 CPVEE 34 CPVEE 1 CA14 AVSS1 AVSS2 26 37 Ext.MIC/LINE IN JACK 10U_0805_10V6K 2 MIC1_LINE1_R_L 1 2 2 0.1U_0402_16V4Z CA16 2.2U_0603_6.3V6K @ Ext. MIC 10K PORT-C (PIN 23, 24) PORT-F (PIN 16, 17) 1 4.7K_0402_5% +3VL place close to chip 2 RA10 1 20K_0402_1% 31 100K_0402_5% 2 37 SENSE_A RA43 100K_0402_5% SM_SENSE# QA1B 5 2N7002DW-T/R7_SOT363-6 31 NBA_PLUG RA21 39.2K_0402_1% 2011/01/06 PORT-H (PIN 20) Deciphered Date 2012/01/06 Date: 3 A Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4 BACK_SENSE 31 Compal Electronics, Inc. Compal Secret Data Security Classification Issued Date 5 MIC1_L MIC_SENSE AGND Function PORT-B (PIN 21, 22) 20K 31 +MIC1_VREFO_L RA28 RA22 2 20K PORT-E (PIN 14, 15) MIC1_R QA1A Headphone out 39.2K RA29 1 2 2.2K_0402_5% 2N7002DW-T/R7_SOT363-6 PORT-I (PIN 32, 33) (PIN 48) +MIC1_VREFO_R B place close to chip DGND 5.1K 2 1 1K_0402_5% RA32 1 CA17 RA42 100K_0402_5% @ Codec Signals RA33 2 RA31 1 1K_0402_5% 2.2K_0402_5% 2 1 MIC1_LINE1_R_R 1 20K_0402_1% 2 2.2U_0603_6.3V6K CA18 100P_0402_50V8J 1 Change to AGND for high frequency noise issue CA23 1 2 4.7K_0402_5% 23 CA29 1 1 2 @ RA17 10P_0402_50V8J AZ_BITCLK_HD 2 10_0402_5% C Change value for Beep by A51 demand. 2010/08/31 RA12 For EMI MIC2_VREFO CBN 1 33_0402_5% MONO_IN 0.1U_0402_16V4Z 23 AZ_SDOUT_HD 23 2 RA6 CA13 1 2 RA8 1 2 47K_0402_5% FCH_SPKR AZ_BITCLK_HD 23 3 PESD5V0U2BT_SOT23-3 RA7 1 2 47K_0402_5% EC_BEEP# PCI Beep AZ_SYNC_HD ACES_85204-0400N @ 2 1 ALC269Q-VB5-GR _QFN48_7X7 39.2K 10K HP_L D 1 2 3 4 Beep sound EC Beep 37 RA4 SYNC MIC_SENSE SENSE A SPKR- close to chip 1 2 3 4 DA6 10U_0805_10V6K 2 2 CA27 1U_0402_6.3V6K 1 @ 1 CA26 10U_0805_10V6K RA16 @ 2 SPK_R2 2 1 0_0603_5% 23 GPIO1/DMIC_CLK 1 2 INT_MIC_CLK_R CA15 FBMA-10-100505-301T 2.2U_0603_6.3V6K CAM@ 1 +MIC1_VREFO_L CA28 27P_0402_50V8J @ 2 EC_MUTE# Sense Pin 21 22 JSPK SPK_L1 SPK_L2 SPK_R1 SPK_R2 6 2 0.1U_0603_50V7K CA49 1 SPKR+ SPKR- 3 PESD5V0U2BT_SOT23-3 CA25 @ +5VALW 1 CA6 2 1 1 CA48 1 45 44 11 1 CA24 1U_0402_6.3V6K @ 3 2 0.1U_0603_50V7K 10U_0805_10V6K 2 4 B CA47 1 SPK_OUT_R+ SPK_OUT_R- 4 0.1U_0402_16V4Z 2 1 0_0603_5% 2 2 place 0.1U_0402_16V4Z LINE2_L LINE2_R GPIO0/DMIC_DATA RA41 28 INT_MIC_CLK CA5 14 15 3 For EMI 2 SPKL+ SPKL- 2 SENSE_A CA4 2 10U_0805_10V6K 40 41 INT_MIC_CLK_R MONO_IN 2 100P_0402_50V8J CA3 1 SPK_OUT_L+ SPK_OUT_L- INT_MIC_DATA AZ_RST_HD# 23 AZ_RST_HD# UA1 1 LINE1_L LINE1_R 1 EC_MUTE# EC_MUTE# 10U_0805_10V6K 23 24 2 CA22 PVDD1 9 1 CA10 1 CA9 1U_0402_6.3V6K 4.7U_0805_10V4Z CA21 MIC1_LINE1_R_L 2 1 RA44 100K_0402_5% @ SPKR+ 68 mA DVDD MIC1_LINE1_R_R 37 +AVDD 2 RA3 DVDD_IO 1U_0402_6.3V6K 1 2 C SPKL- Remove relates to +5VALW sch 0.1U_0402_16V4Z 2 MIC1_LINE1_R_L DA7 2 1 CA20 RA14 @ 10U_0805_10V6K 2 SPK_L2 2 1 0_0603_5% RA15 SPK_R1 2 1 0_0603_5% 1 CA7 10U_0805_10V6K 2 Ext. Mic/LINE IN CA19 @ 2 1 SPK_L1 1 1 0.1U_0402_16V4Z 2 1 FBMH1608HM601-T 2 10U_0805_10V6K +3VS_DVDD 2 RA1 +3VS 2 place close to chip 1 38 10U_0805_10V6K place close to chip 1 AVDD2 CA2 D 0.1U_0402_16V4Z +DVDD_IO 2 1 FBMH1608HM601-T +3VS 2 10U_0805_10V6K 2 4 1 5 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet 1 36 of 51 5 4 3 2 +3VL 2 2 0.1U_0402_16V4Z C441 1000P_0402_50V7K 1 1 1000P_0402_50V7K U19 1 VCC VCC VCC VCC VCC VCC CLK_PCI_EC R377 10_0402_5% @ C443 22P_0402_50V8J @ GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 1 2 3 4 5 7 8 10 GATEA20/GPIO00 KBRST#/GPIO01 SERIRQ# LPC_FRAME#/LFRAME# LPC_AD3/LAD3 LPC_AD2/LAD2 LPC_AD1/LAD1 LPC_AD0/LAD0 CLK_PCI_EC LPC_RST# ECRST# EC_SCI# HDPLOCK 12 13 37 20 38 CLK_PCI_EC/PCICLK PCIRST#/GPIO05 EC_RST#/ECRST# EC_SCI#/GPIO0E CLKRUN#/GPIO1D KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82 KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 Int. K/B KSO6/GPIO26 Matrix KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 77 78 79 80 EC_SMB_CK1/SCL0/GPIO44 EC_SMB_DA1/SDA0/GPIO45 EC_SMB_CK2/SCL1/GPIO46 EC_SMB_DA2/SDA1/GPIO47 23 GATEA20 23 KB_RST# 22,38 SERIRQ 22,38 LPC_FRAME# 22,38 LPC_AD3 22,38 LPC_AD2 22,38 LPC_AD1 22,38 LPC_AD0 2 D 1 2 22,25 CLK_PCI_EC 22,38 LPC_RST# +3VL R378 47K_0402_5% 2 1 2 C444 23 38 ECRST# EC_SCI# HDPLOCK 1 0.1U_0402_16V4Z Reserve for ESD test @ C20 1 2 22P_0402_50V8J EC_ON @ C21 EC_RSMRST# 2 22P_0402_50V8J 1 @ 1 C229 2 22P_0402_50V8J KB_RST# @ LPC_RST# 2 22P_0402_50V8J 1 C232 C KSI[0..7] 24,38,39 KSI[0..7] 38,39 KSO[0..17] KSO[0..17] LPC & MISC 8 7 6 5 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 30,42 30,42 9,13,32,38,39 9,13,32,38,39 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 32,35 USB_CHG_EN# @ 1 C820 SLP_S3# SLP_S5# EC_SMI# USB_CHG_EN#_R ESB_CK ESB_DAT 6 14 15 16 17 18 19 INVT_PWM 25 FAN_SPEED1 28 SM_SENSE# 29 E51_TXD 30 E51_RXD 31 ON/OFFBTN# 32 PWR_SUSP_LED# 34 NUM_LED# 36 ESB_CK ESB_DAT 28 INVT_PWM 5 FAN_SPEED1 36 SM_SENSE# 32,38 E51_TXD 32,38 E51_RXD 39 ON/OFFBTN# 39 PWR_SUSP_LED# 38 NUM_LED# SUSP# 2 180P_0402_50V8J B 2 1 R342 BATT_TEMPA DAC_BRIG/DA0/GPO3C EN_DFAN1/DA1/GPO3D IREF/DA2/GPO3E DA3/GPO3F 122 123 ADP_I ADP_V HDPACT 68 70 71 72 IREF CHGVADJ 119 120 126 128 EC_SI_SPI_SO EC_SO_SPI_SI EC_SPI_CLK SPI_CS# GPIO40 H_PECI/GPIO41 FSTCHG/GPIO50 BATT_CHG_LED#/GPIO52 CAPS_LED#/GPIO53 BATT_LOW_LED#/GPIO54 PWR_LED#/GPIO55 SYSON/GPIO56 VR_ON/XCLK32K/GPIO57 AC_IN/GPIO59 73 74 89 90 91 92 93 95 121 127 CIR_IN USB_OC0#_R FSTCHG BATT_FULL_LED# CAPS_LED# BATT_CHG_LOW_LED# PWR_ON_LED# SYSON VR_ON ACIN_D PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_SMI#/GPIO08 EC_ON/GPXIOA05 GPIO0A EC_SWI#/GPXIOA06 GPIO0B ICH_PWROK/GPXIOA07 GPIO GPIO0C BKOFF#/GPXIOA08 GPO RF_OFF#/GPXIOA09 SUS_PWR_DN_ACK/GPIO0D INVT_PWM/PWM2/GPIO11 GPXIOA10 FAN_SPEED1/FANFB0/GPIO14 GPXIOA11 FANFB1/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 PM_SLP_S4#/GPXIOD01 ON_OFF/GPIO18 ENBKL/GPXIOD02 SUSP_LED#/GPIO19 EAPD/GPXIOD03 GPI EC_THERM#/GPXIOD04 NUM_LED#/GPIO1A SUSP#/GPXIOD05 PBTN_OUT#/GPXIOD06 EC_PME#/GPXIOD07 XCLK1 XCLK0 V18R 100 101 102 103 104 105 106 107 108 EC_RSMRST# EC_LID_OUT# EC_ON TP_LED FCH_PWRGD BKOFF# HDPINT CAP_RST# BACO_EN# 110 112 114 115 116 117 118 CEC_INT# EC_ENBKL USB_OC1# E51_TXD 2 100K_0402_5% BATT_TEMPA 42 USB_OC3# 23 ADP_I 42,43 ADP_V 43 +3VL EC_MUTE# 36 USB_EN# 31 CAP_INT# 39 H_PROCHOT# 7,42,49 TP_CLK 39 TP_DATA 39 LID_SW# LID_SW# LID_SW# 2 R456 1 47K_0402_5% CEC_INT# 2 R53 1 100K_0402_5% CAP_INT# @ 1 R172 2 4.7K_0402_5% +5VS TP_CLK VGATE 49 WOL_EN 33 SPI Device I/F SPI Flash ROM D IREF 43 CHGVADJ 43 SPIDI/MISO SPIDO/MOSI SPICLK/GPIO58 SPICS# C1206 20P_0402_50V8J 2 KB930@ 2 100P_0402_50V8J 2 100P_0402_50V8J HDPACT 38 VGATE WOL_EN 1 R266 100K_0402_5% KB930@ 63 64 65 66 75 76 97 98 99 109 1 22,25 RTC_CLK CRY1_EC CRY2_EC R991 @ 0_0402_5% R992 @ 0_0402_5% R990 0_0402_5% KB930@ BATT_TEMP/AD0/GPI38 BATT_OVP/AD1/GPI39 ADP_I/AD2/GPI3A AD3/GPI3B AD Input AD4/GPI42 AD5/GPI43 SDICS#/GPXIOA00 WOL_EN/SDICLK/GPXIOA01 ME_EN/SDIMOSI/GPXIOA02 LID_SW#/GPXIOD00 PS2 1 C445 1 C446 KB_LED 38 EC_BEEP# 36 FANPWM 5 ACOFF 43 ACOFF EC_MUTE# USB_EN# CAP_INT# H_PROCHOT# TP_CLK TP_DATA 1 R379 TP_DATA 1 R381 2 4.7K_0402_5% 2 4.7K_0402_5% SYSON 2 4.7K_0402_5% 1 R56 39 EC_SI_SPI_SO 38 EC_SO_SPI_SI 38 SPI_CS# 38 CIR_IN 39 C Reserved for EMI KB930@ GPIO GND GND GND GND GND CRY1 CRY2 Close to EC KB_LED EC_BEEP# EC_MUTE#/PSCLK1/GPIO4A USB_EN#/PSDAT1/GPIO4B CAP_INT#/PSCLK2/GPIO4C Interface PSDAT2/GPIO4D TP_CLK/PSCLK3/GPIO4E TP_DATA/PSDAT3/GPIO4F SM Bus SLP_S3# SLP_S5# EC_SMI# 21 23 26 27 83 84 85 86 87 88 2.2K_0804_8P4R_5% 23 23 R1442 23 1 2 0_0402_5% 39 39 PWM0/GPIO0F BEEP#/PWM1/GPIO10 FANPWM0/GPIO12 ACOFF/FANPWM1/GPIO13 DA Output 11 24 35 94 113 +3VS 1 2 3 4 ACIN_D KB930@ PWM Output RP7 +3VL BATT_TEMPA 0.1U_0402_16V4Z 67 2 C440 AVCC 2 C442 1 2 2 C439 EC_SPI_CLK 2 R161 FSTCHG 43 BATT_FULL_LED# 39 CAPS_LED# 38 BATT_CHG_LOW_LED# 39 PWR_ON_LED# 39 SYSON 35,40,45 VR_ON 40,47,49 1 0_0402_5% SPI_CLK 38 R341 330K_0402_5% 1 2 +3VL D21 ACIN_D EC_RSMRST# 23 EC_LID_OUT# 23 EC_ON 24,39 TP_LED 39 FCH_PWRGD 23 BKOFF# 28 HDPINT 38 CAP_RST# 39 BACO_EN# 17,40 2 1 ACIN 13,23,39,43 RB751V40_SC76-2 For KB930 and KB9012 KB9012@ 1 2 R362 0_0402_5% KB930@ USB_OC0#_RR 1 2 R359 0_0402_5% USB_OC0#_R CEC_INT# 30 EC_ENBKL 28 USB_OC1# 23,32,35 SUSP# PBTN_OUT# USB_OC0#_RR USB_OC0# 23,31 SUSP# 40 PBTN_OUT# 23 B +EC_V18R 124 AGND 0.1U_0402_16V4Z For EMI 0.1U_0402_16V4Z 1 2 C438 69 C437 9 22 33 96 111 125 0.1U_0402_16V4Z 1 1 1 C436 1 www.qdzbwx.com +3VL C448 4.7U_0805_10V4Z KB930QF-A1_LQFP128_14X14 SUSP# R423 2 1 10K_0402_5% VR_ON R462 2 1 10K_0402_5% U19 KB9012QF KB9012@ R389 CRY1 1 2 CRY2 10M_0402_5% @ OSC @ NC OSC 2 3 NC Y4 @ C450 18P_0402_50V8J 18P_0402_50V8J 2 4 1 1 1 2 @ C449 A 32.768KHZ_12.5PF_Q13MC14610002 A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 2012/01/06 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet 1 37 of 51 1 2 3 4 18 17 16 16 15 15 14 14 13 13 12 12 11 11 10 10 9 9 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 @ JDB ACES_88512-1641 20mils U22 SPI_CLK 37 EC_SO_SPI_SI VCC 3 W VSS 7 HOLD SPI_CS# 1 S SPI_CLK 6 C EC_SO_SPI_SI 5 A 37 SPI_CS# 8 4 22,37 D Q 2 T31 SERIRQ Place T31 close to JDB. EC_SI_SPI_SO EC_SI_SPI_SO 37 W25X10BVSNIG_SO8 SPI_CLK 1 R394 2 10_0402_5% 1 C454 1 2 3 4 GND GND B 1 +5VS_LED 1 1 G 1 3 Close to JKB D Q52 2N7002_SOT23-3 KBL@ KSO16 KSO17 KSO0 KSO4 KEYBOARD CONN. KSO3 KSO5 C KSO[0..17] 24,37,39 KSO14 KSO[0..17] 37,39 KSO6 KSO7 JKB D 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 JKB34 KSO16 1 2 R372 300_0402_5% KSO13 +3VS KSO8 KSO17 KSO9 KSO2 KSO1 KSO0 KSO4 KSO3 KSO5 KSO14 KSO6 KSO7 KSO13 KSO8 KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 JKB4 2 1 CAPS_LED# R376 300_0402_5% NUM_LED# +3VALW UG1 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 +3VS CAPS_LED# 37 NUM_LED# 37 +5VS GSENSOR@ RB751V40_SC76-2 2 DG1 1 KSO1 KSI[0..7] CAPS_LED# NUM_LED# 1 C401 1 C402 1 C404 1 C405 1 C406 1 C407 1 C408 1 C409 1 C410 1 C411 1 C412 1 C413 1 C415 1 C416 1 C417 1 C418 1 C419 1 C420 1 C421 1 C422 1 C423 1 C424 1 C425 1 C427 1 C429 1 C431 1 C433 1 C435 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J ACES_88170-3400 @ 2 12 CG12 1U_0402_6.3V6K GSENSOR@ 2 UG3 1 +3VS_HDP VIN 2 GND 3 SHDN# VOUT BP 4 6 8 2 GSENSOR@ 1 SELF_TEST CG13 1U_0402_6.3V6K 1 GSENSOR@ 5 4 G9191-330T1U_SOT23-5 +3VS_HDP 9 Vdd1 Vdd2 ST PD FS Rev GSENSOR@ 2 3 VOUTX CG1 VOUTY CG2 VOUTZ CG3 Voutx Vouty Voutz 3 5 7 NC1 NC2 NC3 NC4 NC5 10 11 14 15 16 GND1 GND2 1 13 GSENSOR@ 0.033U_0402_16V7K 1 2 0.033U_0402_16V7K 1 2 0.033U_0402_16V7K 1 2GSENSOR@ GSENSOR@ B TSH352TR LGA 16P CG14 2 1 @ 0.22U_0402_6.3V6K UG5 1 9,13,32,37,39 EC_SMB_CK2 SELF_TEST +3VS_HDP P1_6/CLK0/SSI01 11 P1_5/RXD0/CNTR01/INT11# 12 P1_4/TXD0 13 P1_3/KI3#/AN11/TZOUT 14 P3_5/SSCK/SCL/CMP1_2 HDPINT P3_7/CNTR0#/SSO/TXD1 RG3 2 GSENSOR@ 1 4.7K_0402_5% 3 RESET# RG4 2 GSENSOR@ 1GXOUT 4.7K_0402_5% 4 XOUT/P4_7 RG5 2 GSENSOR@ 37 2 1GXIN 4.7K_0402_5% 5 VSS/AVSS HDPACT 37 6 XIN/P4_6 16 VOUTX VOUTY VCC/AVCC P1_1/KI1#/AN9/CMP0_1 2 1 4.7K_0402_5% GSENSOR@ 8 MODE P1_0/KI0#/AN8/CMP0_0 18 RG7 2 1 1K_0402_5% GSENSOR@ 9 P4_5/INT0#/RXD1 P3_3/TCIN/INT3#/SSI00/CMP1_0 19 P3_4/SCS#/SDA/CMP1_1 20 1 10 P1_7/CNTR00/INT10# 1 CG8 GSENSOR@ 0.1U_0402_16V4Z R5F211B4D34SP 2 VOUTZ P4_2/VREF RG6 C HDPLOCK 37 15 17 CG7 0.1U_0402_16V4Z GSENSOR@ 2 7 RG9 47K_0402_5% GSENSOR@ P1_2/KI2#/AN10/CMP0_2 RG10 47K_0402_5% 2 1 GSENSOR@ +3VS_HDP 1 2 CG6 0.1U_0402_16V4Z GSENSOR@ EC_SMB_DA2 9,13,32,37,39 GSENSOR@ D Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 2012/01/06 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 1 A +3VS +3VS_HDP ACES_85201-0405N @ C836 0.1U_0402_16V4Z 2 @ KSO2 KSI[0..7] LPC_RST# 22,37 CLK_PCI_DDR 22,25 LPC_AD0 22,37 LPC_AD1 22,37 LPC_AD2 22,37 LPC_AD3 22,37 LPC_FRAME# 22,37 CLK_PCI_DDR Place UG1 on TOP Layer +5VS_LED 2 2 1 2 3 4 5 6 For EMI S E51_RXD 32,37 E51_TXD 32,37 2 D S 3 2 G 2 2 0_0402_5% 0_0402_5% JBLG Q38 KBL@ AO3413_SOT23 +5VS KB_LED E51_RXD_DB 1 E51_TXD_DB R23 1 R24 G-Sensor Keyboard LED 37 G18 G17 2 10P_0402_50V8J For EMI R587 10K_0402_5% KBL@ 8 1 1 7 www.qdzbwx.com Place JDB under DDR DIMM. 2 37 6 LPC Debug Port SPI Flash (128KB) +3VL C451 0.1U_0402_16V4Z 5 4 5 6 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 7 Sheet 38 of 8 51 4 3 +3VL Caps Sensor/Light Sensor Conn. 1 www.qdzbwx.com 2 Power Button 2 Touchpad & Light Pipe Connector R395 JCS 51_ON# ON/OFFBTN# 2 SW3 C458 0.1U_0402_25V6 @ 24,37 37 37 37 37 2 EC_ON @ 1 41 Q7A 2N7002DW-T/R7_SOT363-6 ESB_DAT ESB_CK CAP_INT# CAP_RST# 9,13,32,37,38 9,13,32,37,38 2 1 37 6 ON/OFFBTN# TOP side +5VALW +3VL FBMA-11-100505-301T_0402 +3VS L13 1 2 L14 1 2 FBMA-11-100505-301T_0402 R396 10K_0402_5% 3 EC_SMB_CK2 EC_SMB_DA2 1 1 100K_0402_5% 1 2 3 ESB_DAZ 4 ESB_CKZ 5 CAP_INT# 6 CAP_RST# 7 8 9 10 11 12 D 2 For EMI request 4 JTPL SMT1-05-A_4P TP_CLK TP_DATA @ PACDN042Y3R_SOT23-3 D86 6 5 JPOWER @ G2 6 G1 5 4 4 3 3 2 2 1 1 24,37,38 37,38 TP_LED# KSI6 KSO0 KSI6 KSO0 1 3 For EMI PWR_ON_LED# 1 R22 2 390_0402_5% +5VALW @ 1 ESB_DAZ D83 ACES_85201-0405N ON/OFFBTN# 2 PWR_ON_LED# 3 ESB_CKZ R428 2 1 C260 @ 2 Q7B 37 100_0402_5% 100P_0402_50V8J @ 1 1 1 R427 2 100_0402_5% D P-TWO_161021-10021 5 TP_LED @ 1 2 3 4 5 6 7 8 9 10 GND GND 2N7002DW-T/R7_SOT363-6 4 ON/OFFBTN# 1 2 3 4 5 6 7 8 9 10 11 12 +5VS 37 37 P-TWO_161021-10021 1 BTM side @ 1 2 3 4 5 6 7 8 9 10 GND GND 3 For debug 2 5 C261 @ 2 100P_0402_50V8J PESD5V2S2UT_SOT23-3 Screw Hole B+ CPU 2N7002DW-T/R7_SOT363-6 VGA H3 H_4P9 @ H4 H_4P2x4P7 @ H_4P2x4P7 @ H5 H_4P2 @ H6 H_2P9 @ H15 H_2P9 @ H_2P9x3P4 @ 1 Reserve for ESD request H2 0.1U_0402_25V6 1 4 1 1 H1 1 1 0.1U_0402_25V6 1 3 0.1U_0402_25V6 2 2 C228 C227 C226 1 2 1 DC_IN 13,23,37,43 5 ACIN Q32B 1 DC-IN LED Q32A in page24 C C +5VS +3VS Reserve for EMI request 0.1U_0402_25V6 H_1P2 @ 1 MINI CARD -- WLAN H12 H13 H_1P2 @ H8 H_1P2 @ H9 H_3P3 @ H30 H_3P3 @ H31 H_3P1x3P6N @ H_3P1N @ 2 +5VALW 1 0.1U_0402_25V6 1 1 H14 H26 H_3P0 @ C233 @ 0.1U_0402_25V6 H23 1 H17 H_3P0 @ H24 H_3P0 @ Reserve for ESD request H16 H_3P0 @ H18 H_3P0 @ H25 H_3P0 @ H19 H_3P0 @ H20 H_3P0 @ H21 H_3P0 @ H22 H_3P0 @ H_3P0 @ 1 C224 @ 0.1U_0402_25V6 1 1 1 1 1 C234 @ 2 1 C235 @ 2 H27 H_3P0 @ H_7P5 @ 1 2 2 1 2N7002DW-T/R7_SOT363-6 @ 1 2 R50 0_0402_5% C225 @ 0.1U_0402_25V6 1 0.1U_0402_25V6 1 2 4 Q9B B+ B+ 1 3 1 Q9A 2N7002DW-T/R7_SOT363-6 1 5 6 1 HDD_LED# H_1P2 @ Close to H17 SATA_LED# 24 2 R404 1 10K_0402_5% +3VS H11 1 H10 1 1 C236 @ 0.1U_0402_25V6 1 1 2 1 1 C247 @ 1 2 1 HDD LED 2 1 MINI CARD -- TV C251 @ 0.1U_0402_25V6 PCB Fedical Mark PAD @ 1 @ ISPD Remove WIMAX_LED_GND# 24 WL_BT_LED# DC_IN PWR_ON_LED# PWR_SUSP_LED# HDD_LED# CR_LEDCON# BATT_FULL_LED# BATT_CHG_LOW_LED# WL_BT_LED# 37 PWR_ON_LED# 37 PWR_SUSP_LED# 34 CR_LEDCON# 37 BATT_FULL_LED# 37 BATT_CHG_LOW_LED# 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12 UV1 JLOGO +5VL 37 CIR_IN 24 GND GND @ WHPROR3@ SA00004C790 R749 10K_0402_5% @ 1 JLED +5VALW +5VS @ B FD4 2 +5VL FD3 1 LOGO/B Connector FD2 1 LED/B Connector FD1 1 B 37 13 14 ACES_85201-1205N +5VS LOGO_LED +3VALW +3VL LID_SW# CIR_IN 1 2 3 4 5 6 7 8 9 10 11 12 WHPROR1@ ZZZ @ 1 2 3 4 5 6 7 8 9 10 GND GND SA00004C780 DAZ0K600100 216-0810005 A11 WHISTLER PRO U1 PCB LA-7213P HUDM3R1@ PJP1 SA000043I60 P-TWO_161021-10021 45@ DC30100AA00 218-0755022 A13 HUDSON-M3 PJP1 A A HUDM3R3@ SA000043I70 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 2012/01/06 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet 1 39 of 51 C Q11B 2 S S S G 2 2 1 @ 1 1 C469 C470 2 R408 1U_0402_6.3V6K SI4800BDY_SO8 2 R414 820K_0402_5% 1 R411 2 +VSB 220K_0402_5% 470_0805_5% D D D D 3 1 C821 1 Q12A Q12B SUSP 2 5 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 4 Q11A SUSP 2 5 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 @ 2 4.7U_0805_10V4Z 1 C464 1 6 2 R413 200K_0402_5% @ 1 C822 C463 1 2 3 4 1 C468 2 +VSB 2 8 7 6 5 4.7U_0805_10V4Z C467 2 1 1 R410 2 47K_0402_5% R407 470_0805_5% 2 0.1U_0402_16V4Z Q10B 1 Q31 3 1 2 SI4800BDY_SO8 Q10A SUSP 2 5 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 1U_0402_6.3V6K +1.5VS Vgs=10V,Id=9A,Rds=18.5mohm For EMI 0.1U_0402_16V4Z R412 330K_0402_5% 2 +VSB S S S G +5VS 4 1 R409 2 47K_0402_5% D D D D 6 6 1 C466 1 C465 2 1 2 0.022U_0402_25V7K 4.7U_0805_10V4Z SI4800BDY_SO8 1 R406 1 2 1 2 1U_0402_6.3V6K C461 1 2 3 4 4.7U_0805_10V4Z 1 C462 1 2 2 S S S G 3 1 D D D D +1.5V +5VS Q30 8 7 6 5 4 1 C459 1 2 3 4 4.7U_0805_10V4Z 1 C460 4.7U_0805_10V4Z Q29 8 7 6 5 +5VALW Vgs=10V,Id=9A,Rds=18.5mohm 1 +1.5V to +1.5VS Vgs=10V,Id=9A,Rds=18.5mohm 0.01U_0402_25V7K +3VS www.qdzbwx.com +5VALW TO +5VS 470_0805_5% +3VALW E 1 +3VALW TO +3VS D 2 B 0.1U_0402_25V6 A +0.75VS +5VALW +5VALW 2 2 +1.8VSG 1 2 2 +5VS_ODD 1 2 2 3 2 Q13B 2N7002DW-T/R7_SOT363-6 VGA@ R458 470_0805_5% PXS@ Q45 2 2 2 Q53B 1 24 Q206B 2N7002DW-T/R7_SOT363-6 PXS@ 3 2 C680 1U_0402_6.3V6K 2 4 100K_0402_5% Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A 1 1 C679 4.7U_0805_10V4Z @ PXS_PWREN# Q188B VGA@ 2N7002DW-T/R7_SOT363-6 5 PJ28 JUMP_43X79 @ +5VS_ODD 4 R146 1 VGA@ 2 5 AO3413_SOT23 C217 0.01U_0402_25V7K 5 2N7002DW-T/R7_SOT363-6 ODD_PWR Vgs=-4.5V,Id=3A,Rds<97mohm 2 2 1 R440 ODD_PWR# 1 C471 0.1U_0402_16V7K 1 47K_0402_5% +5VALW 17,22,48 VGA_PWRGD 2 4 6 1 R430 Q13A 820K_0402_5% VGA@ VGA@ VGA_PWRGD# 5 2 2N7002DW-T/R7_SOT363-6 +3VSG 4 2 R429 VGA@ 1 C481 VGA@ 2 2 1 C473 VGA@ 0.1U_0402_25V6 4 4.7U_0805_10V4Z FDS6676AS_SO8 1 +5VALW 2 3 1 2 VGA@ 1 R431 2 +VSB 220K_0402_5% 470_0805_5% 2 1U_0402_6.3V6K +5VS ODD_PWR# 2N7002DW-T/R7_SOT363-6 R441 100K_0402_5% C475 4.7U_0805_10V4Z VGA@ 2 1 3 1 D D D D 1 2 2 C684 1U_0402_6.3V6K PXS@ 4 8 7 6 5 C478 VGA@ 1 2 C683 4.7U_0805_10V4Z @ +3VSG Q53A 1 Vgs=10V,Id=14.5A,Rds=6mohm VGA@ S 1 S 2 S 3 G 4 R104 0_0805_5% DIS@ 1 Q206A PXS@ PXS@ 1 2 2N7002DW-T/R7_SOT363-6 AO3413_SOT23 PXS@ C492 0.01U_0402_25V7K 1 2 1 +1.5VSG 3 Q54 2 2 47K_0402_5% PXS@ R457 470_0805_5% 1 6 PXS_PWREN R426 1 3 2 PXS_PWREN# 2 0_0402_5% 1 +5VS TO +5VS_ODD Vgs=-4.5V,Id=3A,Rds<97mohm 1 1 GPU_PWREN 46,48 C491 0.1U_0402_16V7K PXS@ G 2 0_0402_5% 2 D R433 100K_0402_5% PXS@ +1.5V to +1.5VSG Q43 2N7002DW-T/R7_SOT363-6 1 2N7002DW-T/R7_SOT363-6 DIS@ +1.5V Q211A 2 37,47,49 VR_ON +3VS S 1 R384 Q210A +3VALW PXS@ SUSP# VR_ON# 5 2N7002DW-T/R7_SOT363-6 2 35,37,45 SYSON R448 100K_0402_5% Q211B 1 4 +3VS to +3VSG VGACORE_EN 48 3 1 2 3 1 SYSON# 5 2N7002DW-T/R7_SOT363-6 NOBACO@ 2 0_0402_5% DIS@ 2 0_0402_5% BACO@ 2 0_0402_5% +5VALW R479 470_0805_5% R432 100K_0402_5% Q210B For GPU power enable 1 R382 +5VALW R478 470_0805_5% 3 PXS_PWREN +1.2VS 2 +1.5V 4 1 6 @ C200 SUSP 2 0_0402_5% 1 1 R385 6 2 2N7002DW-T/R7_SOT363-6 3 1 R380 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 1 17,37 BACO_EN# Q6B in page40 2 1 1 R375 SUSP# 6 1 1 R158 1 6 3 2N7002DW-T/R7_SOT363-6 Q6A For +VGA_CORE power enable SUSP# SUSP SUSP Q188A VGA@ GPU_PWREN 2 Need to delay after +3VS ramp up 37 45 Q209A 2 17,22 PXS_PWREN 1 1 2 S 2N7002DW-T/R7_SOT363-6 GPU_PWREN# Q189 SUSP 2 G 2N7002_SOT23-3 1 4 D 6 2 1 1 GPU_PWREN# 5 4 6 1 R416 820K_0402_5% Q190A VGA@ R422 100K_0402_5% 2 2 Q190B VGA@ R424 100K_0402_5% VGA@ 0.1U_0402_25V6 C477 1 R415 2 +VSB 220K_0402_5% 1 C474 2 2 1 0.1U_0402_25V6 4.7U_0805_10V4Z 2 Q209B 5 2N7002DW-T/R7_SOT363-6 1U_0402_6.3V6K FDS6676AS_SO8 1 SUSP 1 2 R477 470_0805_5% 1 2 3 1 2 3 4 S S S G R470 470_0805_5% VGA@ G C476 D D D D R475 470_0805_5% VGA@ D Q44 8 7 6 5 1 3 1 4.7U_0805_10V4Z 1 C472 6 R417 470_0805_5% +1.1VS Vgs=10V,Id=14.5A,Rds=6mohm S +1.1VALW 2 2 +1.0VSG 2 +1.1VS +1.1VALW to +1.1VS B C D SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet E 40 of 51 A B C D www.qdzbwx.com 1 VIN N3 1 1 B+ 1 2 1 @ PR3 1K_1206_5% 1 @PR4 @ PR4 100K_0402_1% 1 2 VL @ PR5 2.2M_0402_5% 2 1 @ PR38 @PR38 511K_0402_1% 5 - 6 1 1 @ PJ333 2 @ 1 1 +3VL +3VALWP JUMP_43X39 2 2 PJ332 1 1 2 +3VALW +VGA_COREP 1 1 +5VL +5VALWP JUMP_43X39 2 2 1 1 2 1 +VSB +1.1VALWP JUMP_43X39 2 2 1 +1.5VP 8 +VGA_CORE 3 RTC Battery +2.5VS +1.0VSGP 2 2 1 1 @ PJ152 1 1 - 2 2 @ PJ153 1 1 2 PBJ1 2 + 1 PR13 PR17 560_0603_5% 560_0603_5% 1 2 1 2 +RTCBATT +RTCBATT +1.5V @ MAXEL_ML1220T10 JUMP_43X118 (DIS 20A, 800mils ,Via NO.= 40, OCP=24.13A) (UMA 8.5A, OCP=10.44A) @ PJ102 1 1 @ PJ703 1 1 2 JUMP_43X118 +1.1VALW (5.3A,212mils ,Via NO.= 11) OCP=6.81A @ PJ252 2 2 1 JUMP_43X118 (120mA,40mils ,Via NO.= 1) +2.5VSP 2 2 @ PJ112 1 +5VALWP @ PQ2 @PQ2 DTC115EUA_SC70-3 @ PJ702 1 1 (32.6A,1288mils ,Via NO.= 65) OCP= 36.19A +5VALW (5A,200mils ,Via NO.= 10) OCP=7.9A 2 2 2 JUMP_43X118 @ PJ72 +VSBP - JUMP_43X118 @ PJ352 3 2 3 JUMP_43X118 (5A,200mils ,Via NO.= 10) OCP=7.7A @ PJ353 2 2 + O JUMP_43X118 (100mA,40mils ,Via NO.= 2) VL 43 2 3 1 P @PU2A @ PU2A 2 G 2 2 2 2 PC5 0.1U_0603_25V7K LM393DG_SO8 2 PACIN N1 1 PC6 0.22U_0603_25V7K 22K_0402_1% +3VLP 43 1 VS PR11 1 51_ON# 2 G S 1 PR10 100K_0402_1% 39 2 2 1 2 2 1 @ PC14 @PC14 1000P_0402_50V7K @PR39 @ PR39 47K_0402_1% 2 1 D @ PQ1 SSM3K7002FU_SC70-3 1 RLS4148_LL34-2 3 @PR35 @ PR35 255K_0402_1% @ PR36 @PR36 150K_0402_1% 3 N1 1 @ PR7 @PR7 66.5K_0402_1% 4 2 BATT+ 2 @ PC13 @PC13 1000P_0402_50V7K 1 @ PR6 @PR6 34K_0402_1% PR9 68_1206_5% 2 PQ4 TP0610K-T1-E3_SOT23-3 PD4 @PC16 @ PC16 1000P_0402_50V7K 1 1 1 RLS4148_LL34-2 PR8 68_1206_5% 2 4 LM393DG_SO8 PD3 1 + O 2 7 2 3 1 ACON 2 43 @ PU2B 1 6251VREF 2 1 EN0 P 44 G @PD2 @ PD2 RB715F_SOT323-3 VIN 8 N1 1 1 2 PC4 100P_0402_50V8J 1 2 2 SINGA_2DW-0005-B03 PC3 1000P_0402_50V7K 1 2 @ PR2 @PR2 1K_1206_5% RLS4148_LL34-2 1 4 @PD1 @ PD1 2 VIN PC2 100P_0402_50V8J 3 - DC_IN_S2 2 10A_125V_451010MRL 2 - DC_IN_S1 1 1 + 2 PC1 1000P_0402_50V7K 1 2 PF1 + 2 @ PJP1 2 @ PR1 @PR1 1K_1206_5% PL1 SMB3025500YA_2P 1 2 +1.0VSG SP093MX0000 JUMP_43X79 JUMP_43X39 (3A,120mils ,Via NO.= 6) ACIN @ PJ182 +1.8VSGP 2 2 1 1 @ PJ76 +1.8VSG JUMP_43X118 +0.75VSP 2 2 1 1 Precharge detector Min. typ. Max. H-->L 14.42V 14.74V 15.23V L-->H 15.39V 15.88V 16.39V +0.75VS JUMP_43X79 (2.5A,100mils ,Via NO.= 5) (0.5A,40mils ,Via NO.= 1) 4 @ PJ122 +1.2VSP 2 2 1 1 +1.2VS JUMP_43X118 (6.5A,260mils ,Via NO.= 13) OCP=8.55A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet D 41 of 51 4 A B C D www.qdzbwx.com 1 1 VMB @ PJP2 BATT_S1 1 2 3 4 5 6 7 8 9 1 2 BATT+ PC8 0.01U_0402_25V7K 2 PH1 under CPU botten side : CPU thermal protection at 90 degree C Recovery at 56 degree C 2 PC7 1000P_0402_50V7K @ PC15 .1U_0402_16V7K 2 SUYIN_200045MR009G171ZR 1 1 PR14 1K_0402_1% 1 15A_65V_451015MRL BATT_P4 BATT_P5 EC_SMDA EC_SMCA 2 GND GND GND GND PF2 1 2 3 4 5 6 7 8 9 1 10 11 12 13 PL2 SMB3025500YA_2P 1 2 1 PR16 6.49K_0402_1% 2 1 1 Rtmh at 90C = 7.87K, Rtml at 56C = 26.1K Rset = 3 * 7.87K = 23.61K ==> 23.7K Rhyst = (23.7K * 26.1K) / (3 * 26.1K - 23.7K) = 11.33K ==> 11.3K +3VL 1 3 2 Rset = 3 * Rtmh Rhyst = (Rset* Rtml) / (3*Rtml - Rset) PD6 PJSOT24C_SOT23-3 PD5 2 PJSOT24C_SOT23-3 3 2 VL 1 1 PR15 23.7K_0402_1% 2 PC9 0.1U_0603_25V7K 2 EC_SMB_DA1 30,37 1 1 BATT_TEMPA 37 2 PR21 100_0402_1% PR18 11.3K_0402_1% 2 1 1 VCC TMSNS1 8 2 GND RHYST1 7 3 OT1 TMSNS2 6 4 OT2 RHYST2 5 100K_0402_1%_NCP15WF104F03RC 90W@ PR22 560_0402_1% 2 PR29 100K_0402_1% 44 1 7,37,49 H_PROCHOT# 37,43 PH1 2 +3VS EC_SMB_CK1 30,37 ADP_I PU1 1 VS_ON 65W@ PR22 180_0402_1% 1 D PQ7 SSM3K7002FU_SC70-3 2 G G718TM1U_SOT23-8 2 90W@ PR28 1.69K_0402_1% 65W@ PR28 1.18K_0402_1% PR27 10K_0402_1% 1 3 S 1 2 1 PR20 100_0402_1% 2 2 2 2 PR19 1K_0402_1% PQ5 TP0610K-T1-E3_SOT23-3 2 PR24 1 PR25 100K_0402_1% +VSBP 2 @ 2 1 2 PC10 0.22U_0603_25V7K 2 1 PR23 100K_0402_1% VL 1 3 1 3 B+ 3 PC11 @ 0.1U_0603_25V7K Adaptor protection Adaptor 2 Recovery point ADP_I 113.5W 1.783V 86.4W 1.357V 65W 71.8W 1.5V 62.44W 1.3V 1 D 3 1 22K_0402_1% Throttling point ADP_I 90W S PR26 44,46 1 POK 2 PQ6 SSM3K7002FU_SC70-3 2 G @ PC12 .1U_0402_16V7K 2 1 0_0402_5% 4 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet D 42 of 51 @ PQ209 1 2 3 1 3 4 CELLS CSOP 21 5 ICOMP CSIN 20 6 VCOMP CSIP 19 7 ICM PHASE 18 2 1 PR231 PC220 20_0402_5% 0.1U_0603_25V7K 1 2 PR232 2_0402_5% LX_CHG 8 VREF UGATE 17 DH_CHG 1 PR229 20_0402_5% 1 2 PC219 0.047U_0402_16V7K 1 2 PR230 20_0402_5% 5 6 7 8 D S PACIN 2 G PQ216 SSM3K7002FU_SC70-3 PQ201 AO4466L_SO8 2 4 PL202 10UH_MSCDRI-104A-100M-E_4.6A_20% CHG 1 1 2 5 6 7 8 9 CHLIM BOOT 16 BST_CHG 1 2 3.3_0603_1% 10 ACLIM VDDP 15 6251VDDP 11 VADJ LGATE 14 DL_CHG 12 GND PGND 13 PR206 4.7_1206_5% PC205 BST_CHGA 2 1 BATT+ 4 3 0.02_1206_1% 4 0.1U_0603_25V7K PD202 RB751V-40_SOD323-2 1 2 6251VDD PR233 PC221 4.7U_0603_6.3V6M PR235 2 PQ202 AO4466L_SO8 53.6K_0402_1% 90W@ PR223 20K_0402_1% CSOP PC206 680P_0603_50V7K PC204 10U_1206_25V6M 2 1 6251aclim CSON 1 CSON 3 2 EN PC203 10U_1206_25V6M 2 1 6251VREF 1 PR222 2 1 1 1 23 22 PR205 90W@ PC222 PC202 10U_1206_25V6M 2 1 1 1 PR221 120K_0402_1% PC216 ACOFF 2 37 PQ213 DTC115EUA_SC70-3 ACOFF 2 2.39V 6251VREF 2 ACSET ACPRN 2 IREF 1 2 41 PR220 154K_0402_1% .1U_0402_16V7K 2 1 2 0.1U_0402_25V6 1 4 37 ACON PC215 S 1 41 ADP_I 1 1SS355_SOD323-2 2 PACIN 37,42 PR219 1 2 100_0402_1% 2 0.1U_0603_25V7K ACPRN 2 41 PR211 22K_0402_5% 1 2 2 10K_0402_1% VIN PD10 PQ215 DTC115EUA_SC70-3 3 6800P_0402_25V7K PR218 1 0.01U_0402_25V7K PR238 200K_0402_1% 2 1 1 1 D 5 G 1 3 SB00000EO00 ACOFF 4.7_0603_5% 2 PQ212B DMN66D0LDW-7_SOT363-6 PC214 1 2 2 1SS355_SOD323-2 2 PC213 1 2 PQ212A DMN66D0LDW-7_SOT363-6 S 0.01U_0402_25V7K 1 2 VIN 1 DCIN 1 PD9 1 1.26V PR228 14.3K_0402_1% 1 2 G 2 2 VDD DCIN 2 2 2 2 6251_EN D PC217 1000P_0402_50V7K 2 1 1 1 1 2 100K_0402_1% ACSETIN PC218 24 PR236 1 2 200K_0402_1% PR237 47K_0402_1% 3 2 1 6251VDD 1 PU200 1 PR217 PR213 150K_0402_1% PQ211 DTC115EUA_SC70-3 PR227 10_1206_5% 3 6 2 FSTCHG 1 1 1 37 PR216 10K_0402_1% 2 1 PD201 RB751V-40_SOD323-2 2 2 PC212 2.2U_0603_6.3V6K ACSETIN PR226 191K_0402_1% 2 1 PR212 200K_0402_1% LDO 5.075V AO4407A_SO8 8 7 6 5 4 2 1 2 3 PC210 0.1U_0603_25V7K 2 1 1 2 PQ210 DTA144EUA_SC70-3 @ PC211 5600P_0402_25V7K 2 CSIP VIN 4 4 1 PR210 47K_0402_1% 1 2 3 CSIN 3 65W@ PQ208 AOS4435 CHG_B+ PL201 1UH_PH041H-1R0MS_3.8A_20% 2 1 1 2 AO4407A_SO8 8 7 6 5 4 B+ PR215 90W@ 0.015_2512_1% 4 2 1 3 2 1 8 7 6 5 @ PC233 4.7U_0805_25V6-K 2 1 P3 PQ204 AO4409L_SO8 1 2 3 @ PC232 4.7U_0805_25V6-K 2 1 VIN P2 @ 75W@ PQ208 1 2 3 PC231 4.7U_0805_25V6-K 2 1 PQ203 90W@ AO4407A_SO8 1 2 3 8 7 6 5 65W@ PR215 0.02_2512_1% D www.qdzbwx.com PC209 10U_1206_25V6M 2 1 65W@ PQ203 AOS4435 C PC208 10U_1206_25V6M 2 1 B PC207 10U_1206_25V6M 2 1 A 65W@ PR222 75k_0402_1% ISL6251AHAZ-T_QSOP24 65W@ PR223 20k_0402_1% PR224 37 CHGVADJ 3 1 2 3 2 15.4K_0402_1% PR225 31.6K_0402_1% 6251VDD PR241 10K_0402_1% 1 2 ACIN 13,23,37,39 2 PR246 309K_0402_1% PACIN PR247 10K_0402_1% 1 2 1 2 PR242 10K_0402_1% 2 PR240 47K_0402_1% 1 1 1 1 VIN 1 ACPRN 2 PR248 PR243 14.3K_0402_1% 37 PC223 .1U_0402_16V7K 47K_0402_1% 2 CC=0.25A~3.6A Vin Detector 3 IREF=0.228V~3.288V UMA Iada=0~3.421A(65W) CP=3.147A VCHLIM need over 88mV Vaclim=0.619V(65W) PR222=75k, PR223=20k, PR215=0.02 CHGVADJ=(Vcell-4)*9.445 DIS Iada=0~4.74A(90W) CP=4.36A Vaclim=0.735V(90W) PR222=53.6k, PR223=20k, PR215=0.015 IREF=0.9133*Icharge 4 Vcell 4V CHGVADJ 0V 4.2V 1.889V 4.35V 3.30575V 2 2 CP mode CP= 92%*Iada ADP_V 1 1 PQ214 DTC115EUA_SC70-3 High 18.089V Low 17.44V 4 1.26 / 14.3 * 205.3 = 18.089V Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet D 43 of 51 5 4 3 2 1 www.qdzbwx.com 2VREF_8205 D 2 PC363 1U_0603_10V6K 1 D PR365 19.1K_0402_1% 1 2 PR337 150K_0402_1% 1 2 PR357 150K_0402_1% 1 2 5 6 7 8 1 ENTRIP1 LG_5V 5 6 7 8 PL352 4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20% 1 2 VCLK PR361 1 PC356 680P_0603_50V7K 2 + TPS51125ARGER_QFN24_4X4 4 VL PC364 4.7U_0805_10V6K RT8205_B+ B Ipeak=5A Imax=3.5A F=245KHz Total Capacitor 330uF ESR 15mohm 1 S PC365 0.1U_0603_25V7K 2VREF_8205 2 3 4 6 D 15mohm 3 2 1 AO4712L_SO8 2 PQ352 2 PR356 4.7_1206_5% ENTRIP2 D +5VALWP 1 2 18 VIN VREG5 17 16 EN0 13 PR360 499K_0402_1% 1 2 AO4466L_SO8 PC352 330U_6.3V_M 19 DRVL2 PC355 2 0.1U_0603_25V7K 1 DRVL1 12 1 3 2 1 3 LL1 LX_5V LG_3V 1 1 2 3 2 21 20 LL2 AO4712L_SO8 ENTRIP1 VFB1 DRVH1 EN0 PC362 1U_0402_6.3V6K VREF DRVH2 PR355 BST_5V 1 2 2.2_0603_1% UG_5V 11 2 B 4 22 42,46 1 B+ Ipeak=5A Imax=3.5A F=305KHz Total Capacitor 330uF ESR 15mohm VFB2 23 VBST1 LX_3V 1 PC336 680P_0603_50V7K 4 2 2 1 2 330U_6.3V_M 15mohm 41 + TONSEL 6 PGOOD VBST2 100K_0402_5% 1 PC332 5 VREG3 PQ332 PR336 4.7_1206_5% 4 POK 2 1 +3VALWP 8 7 6 5 PL332 4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20% 1 2 C 24 GND 8 PR335 1 2 BST_3V 9 2.2_0603_1% UG_3V 10 2 PQ351 VO1 VO2 SKIPSEL 7 P PAD ENTRIP2 25 15 1 2 3 PC335 0.1U_0603_25V7K 1 PU330 14 1 PC361 4 2 PQ331 AO4466L_SO8 C 4.7U_0805_10V6K 8 7 6 5 2 PC366 10U_1206_25V6M 2 PC360 10U_1206_25V6M RT8205_B+ 1 +3VLP 1 B+ PR363 20K_0402_1% 1 2 ENTRIP1 PJ331 @ JUMP_43X118 2 2 1 1 PR364 30K_0402_1% 1 2 ENTRIP2 RT8205_B+ PR362 13K_0402_1% 1 2 PQ360A G 2 5 G PQ360B DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 1 S SB00000EO00 1 VL PR370 2 1 100K_0402_1% PQ361 DTC115EUA_SC70-3 A 3 0.01U_0402_16V7K 2 PR372 A @PC370 2 1 2 1 VS VS_ON 42.2K_0402_1% 42 PR371 1 2 100K_0402_1% Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet 1 44 of 51 A B C D www.qdzbwx.com PC154 4.7U_0805_25V6-K 2 1 PC153 4.7U_0805_25V6-K 2 1 DIS Ipeak=20A Imax=14A Rtrip=14K, OCP=24.13A F=315KHz Total Capacitor 1500uF, ESR 2.73mohm B+ 5 1 PJ151 @ JUMP_43X118 2 2 1 1 PR164 255K_0402_1% 1 2 BST_1.5V PR160 1 35,37,40 SYSON 2 PR521 0_0603_5% 1 2 PR155 1 2 2.2_0603_1% HW side: C106 390uF 10m C218 390uF 10m VGA@ CV122 390uF 10m @ C189 330uF 15m PQ151 4 TPCA8065-H_PPAK56-8-5 1 65W@ PL152 1.8uH VDD 10 PGOOD 4 65W@ PR157 5.9K_0402_1% 1 PGND DL_1.5V 8 AGND 7 G5603RU1U_TQFN14_3P5X3P5 2 9 PC162 4.7U_0805_10V6K UMA Ipeak=8.5A Imax=5.95A Rtrip=5.9K, OCP=10.44A F=315KHz Total Capacitor 1110uF, ESR 3.75mohm 1 FB 6 DL +1.5VP PR156 4.7_1206_5% 1 + PC152 330U_6.3V_M 2 5 PQ603 +5VALW 2 1 LX_1.5V 90W@ PR157 1 2 14K_0402_1% 2 PC161 4.7U_0603_6.3V6K 1 PC156 680P_0603_50V7K 2 2 11 TPCA8059-H_PPAK56-8-5 12 ILIM 5 BST LX VCC 4 3 2 1 15 OUT 3 1 100_0603_5% 14 DH_1.5V 2 2 2 0.1U_0603_25V7K 13 TON 90W@ PL152 1UH_MMD-10DZ-1R0M-X1A_18A_20% PC155 1 2 BST_1.5V-1 DH 2 PR161 1 +5VALW TP PU150 1 PC160 @ .1U_0402_16V7K EN_SKIP 2 1 3 2 1 0_0402_5% PR162 1 2 1 10K_0402_1% 2 PR163 10K_0402_1% @PJ75 @ PJ75 JUMP_43X79 2 2 1 1 +1.5V PC261 4.7U_0805_6.3V6K 40 SUSP VCNTL 6 2 3 GND NC 5 VREF NC 4 7 VOUT NC 8 TP 9 2 +3VALW PC264 1U_0603_10V6K 1 2 @ PC260 .1U_0402_16V7K PR281 1 +0.75VSP 2 S 2 G PC263 .1U_0402_16V7K 2 1 G2992F1U_SO8 D 1K_0402_1% PC252 4.7U_0805_6.3V6K PR280 1K_0402_1% 1 1 1 PR282 0_0402_5% 1 2 VIN 2 +2.5VSP GND 2 PC251 1U_0603_10V6K 3 2 OUT 1 1 2 IN 1 2 PQ260 SSM3K7002FU_SC70-3 2 1 2 3 1 @ JUMP_43X39 1 1 2 +3VS 3 PU75 PU25 APL5508-25DC-TRL_SOT89-3 PJ251 1 3 PC262 10U_0805_6.3V6M For shortage changed 4 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet D 45 of 51 5 4 3 2 1 www.qdzbwx.com PJ401 1 PC414 4.7U_0805_25V6-K 2 1 1 B+ @ JUMP_43X118 D 5 6 7 8 D 2 2 1 PC413 4.7U_0805_25V6-K 2 PQ401 FB VDD 10 6 PGOOD 9 DL_1.1V 1 2 1 4 G5603RU1U_TQFN14_3P5X3P5 2 1 PGND 8 AGND 7 C +5VALW PC402 330U_6.3V_M 5 2 PR407 14K_0402_1% PR406 4.7_1206_5% ILIM 1 PC412 4.7U_0805_10V6K PQ402 AO4712L_SO8 +1.1VALWP 1 + Ipeak=5.3A Imax=3.71A Rtrip=14K, OCP=6.64A F=315KHz Total Capacitor 330uF, ESR 15mohm 2 C 1 PR412 4.75K_0402_1% 1 2 PC406 680P_0603_50V7K VCC DL 0.1U_0603_25V7K LX_1.1V 12 11 @ PC114 47P_0402_50V8J 1 2 2 PC411 4.7U_0603_6.3V6K 3 2 1 14 15 TP 1 DH LX 4 PL402 2.2UH_VMPI0703AR-2R2M-Z01_8A_20% 1 2 2 5 6 7 8 OUT DH_1.1V 13 1 3 2 1 TON 3 AO4466L_SO8 PC405 BST_1.1V 2 PR411 100_0603_1% 1 2 2 EN_SKIP 2 PU400 1 +5VALW @ PC410 .1U_0402_16V7K 4 PR405 2.2_0603_1% 1 2 BST POK 1 42,44 PR414 255K_0402_1% 1 2 PR410 0_0402_5% 1 2 2 PR413 10K_0402_1% 1 2 2 PC185 90W@ 0.1U_0402_10V7K 90W@ 1 Ipeak=2.5A ILIM = 4A F=1MHz Total Capacitor 44uF, B PC183 22U_0805_6.3VAM PR184 90W@ 10K_0402_1% 2 1 2 FB_1.8V PC182 22U_0805_6.3VAM 2 PC186 90W@ PC187 90W@ PR183 90W@ 20K_0402_1% 68P_0402_50V8J 2 1 2 NC PR186 90W@ FB=0.6Volt 1 PR182 @ 499K_0402_1% +1.8VSGP 1 6 1 2 EN_1.8V 150K_0402_1% 7 TP EN 11 40,48 GPU_PWREN PR181 FB 2 SVIN LX 3 NC 90W@ PC184 22U_0805_6.3VAM 5 90W@ 1 90W@ PL182 1UH_FMJ-0630T-1R0 HF_11A_20% 1 2 LX_1.8V 1 8 2 90W@ 2 PVIN LX 1 9 2 1 JUMP_43X39 PVIN 4.7_1206_5% 10 680P_0603_50V7K 1 1 +3VALW PG B 4 PU180 90W@ SY8033BDBC_DFN10_3X3 PJ181 @ 2 2 1 A A Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Sheet Monday, July 04, 2011 1 46 of 51 5 4 3 2 1 www.qdzbwx.com D D PJ451 PR462 255K_0402_1% 1 2 11 5 FB VDD 6 PGOOD DL LX_1.2V 1 10 2 PR457 18K_0402_1% 9 DL_1.2V 1 PR456 4.7_1206_5% +5VALW 4 PC462 4.7U_0805_10V6K PQ452 AO4712L_SO8 3 2 1 G5603RU1U_TQFN14_3P5X3P5 2 1 PGND B+ +1.2VSP 1 12 ILIM 0.1U_0603_25V7K 2 LX VCC 2 1 OUT 4 DH_1.2V 13 1 5 6 7 8 3 DH AGND 1 AO4466L_SO8 PC456 680P_0603_50V7K BST TON 8 B 1 C PC452 330U_2.5V_M 14 15 TP 2 7 @ PC123 47P_0402_50V8J 1 2 2 PC461 4.7U_0603_6.3V6K 2 @ JUMP_43X118 PL452 2.2UH_VMPI0703AR-2R2M-Z01_8A_20% 1 2 PC455 BST_1.2V 2 PR461 100_0603_1% 1 2 1 PU450 1 +5VALW @ PC460 .1U_0402_16V7K EN_SKIP 2 0_0402_5% 3 2 1 2 1 1 2 4 PR455 2.2_0603_1% 1 2 PR460 37,40,49 VR_ON PC464 4.7U_0805_25V6-K PQ451 2 1 2 5 6 7 8 C PC463 4.7U_0805_25V6-K 1.2V_B+ Ipeak=6.5A Imax=4.55A Rtrip=18K, OCP=8.37A F=315KHz Total Capacitor 720uF, ESR 6mohm 1 + 2 HW side: C130 390uF 10m B 1 PR465 6.04K_0402_1% 1 2 2 PR466 10K_0402_1% A A Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Sheet Monday, July 04, 2011 1 47 of 51 4 PL601 90W@ HCB4532KF-800T90_1812 1 2 2 +3VS 90W@ PR520 0_0603_5% 1 2 PQ601 90W@ 4 4 3 2 1 TPCA8059-H_PPAK56-8-5 1 90W@ + 2 PC636 0.1U_0402_25V6 @ PC606 680P_0603_50V7K 90W@ PC602 560U_2.5V_M 1 90W@ RT8237CZQW(2) WDFN PR625 470K_0402_1% PC628 90W@ 2.2U_0603_6.3V6K @ PR606 4.7_1206_5% 1 11 PQ604 @ 3 2 1 TP 1 PQ602 90W@ 2 DL_VCORE 2 6 RF +VGA_COREP 1 7 VFB 5 PL602 90W@ 0.56UH_ETQP4LR56WFC_21A_20% 1 2 2 V5IN DRVL 4 0.1U_0603_25V7K PR626 90W@ 1 2 +5VALW 0_0603_5% 1 LX_VCORE EN 2 DH_VCORE 8 TRIP 3 PC605 90W@ 1 2 TPCA8059-H_PPAK56-8-5 9 SW 2 PR605 90W@ 1 2 0_0603_5% 5 DRVH VBST 3 2 1 BST_VCORE PGOOD 2 2 @ 10 1 D HW side: CV221 390u 17m CV224 390u 17m 4 5 1 90W@ PR624 1 2 165K_0402_1% 2 0_0402_5% 90W@ PU700 90W@ 1 PR623 Ipeak=32.6A Imax=20.3A Rtrip=165K, OCP=36.19A F=290KHz Total Capacitor 1220uF, ESR 4.59mohm TPCA8065-H_PPAK56-8-5 PC623 .1U_0402_16V7K 1 40 VGACORE_EN www.qdzbwx.com @ 90W@ PR620 10K_0402_1% 17,22,40 VGA_PWRGD 1 5 PC622 4.7U_0805_25V6-K 2 1 D 2 B+_core 10U_1206_25VAK 90W@ PC620 2 1 B+ 3 10U_1206_25VAK 90W@ PC621 2 1 5 90W@ PR631 2 C 1 C VCORE_SENSE 15 @ PR635 90W@ 5.1K_0402_1%13 1 GPU_VID0 2 2 PR636 90W@ 10K_0402_5% 1 3 S PQ605 90W@ SSM3K7002FU_SC70-3 1 2 G 2 @ PR644 10K_0402_5% PR634 10K_0402_1% 2 D 90W@ PC633 90W@PC633 .1U_0402_16V7K GPU_VID1 2 2 PR643 @ 13 5.1K_0402_1% 1 2 1 2 S 1 2 G PC634 .1U_0402_16V7K 1 D 3 SSM3K7002FU_SC70-3 PQ606 2.94K_0402_1% 1 2 @ PR642 @ 10K_0402_1% +3VSG @ 1 PR632 90W@ PR633 90W@ 1 +3VSG @ 6.19K_0402_1% 1 1 2 PR640 10K_0402_1% 1 1 2 100_0402_1% @PR637 @PC635 @PC635 Rtrip = 165K, OCP = 36.19A PR641 90W@ 6.98K_0402_1% 2 2 Rrf = 470K, FSW = 290KHz B GPU VID0 Capilano LP X L 1 1 X H 0.9 0.9 1 1000P_0402_50V7K +VGA_COREP 2 2.94K_0402_1% B +1.5V Whistler Pro +5VALW 2 1 2 1 FB 2 PC102 90W@ 22U_0805_6.3V6M 2 GND EN POK +1.0VSGP 90W@ PR101 1.82K_0402_1% 2 3 4 1 VOUT VOUT 1 2 2 8 7 90W@ PR106 7.32K_0402_1% PC106 90W@ 0.01U_0402_25V7K 2 2 PC105 90W@ 1U_0402_16V6K 1 1 40,46 GPU_PWREN 90W@ PR105 10K_0402_1% 1 2 APL5930KAI-TRG_SO8 VCNTL VIN VIN 1 H 90W@ PU100 6 5 9 1 H PC108 90W@ 1U_0603_6.3V6M 2 L PC109 90W@ 4.7U_0805_6.3V6K H @ PJ101 JUMP_43X79 1 1 GPU VID1 1 A A Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet 1 48 of 51 5 4 3 2 NB@ PC556 VSUMG+ PQ501 1 www.qdzbwx.com PL501 HCB4532KF-800T90_1812 1 2 B+ Ipeak=27.5A Imax=15.75A Ri=845, Rdroop=976,OCP=34.92A F=300KHz Total Capacitor 660uF, ESR 8.5mohm NB@ TPCA8065-H_PPAK56-8-5 3 2 1 NB@ PL502 0.36UH_PCMC104T-R36MN1R17_30A_20% 1 4 2 5 10K_0402_1%_TSM0A103F34D1RZ 1 1 11K_0402_1% NB@ PR572 2.61K_0402_1% 1 2 1 2 NB@ PC558 330P_0402_50V7K 0.047U_0402_16V7K NB@ PC557 330P_0402_50V7K NB@ PR573 1 0.1U_0402_10V7K 1 2 1 7 APU_VDDNB_SENSE +CPU_CORE_NB 10_0402_5% 2 1 NB@ PR508 NB@PC571 NB@PC571 2 1 2 7 APU_VDDNB_RUN_FB_L NB@ PC573 2 1 D 2 0.01U_0402_25V7K~N PC567 2200P_0402_50V7K 2 1 NB@ PR517 0_0603_5% 1 2 4 PC565 0.01U_0402_25V7K 2 1 PC563 10U_1206_25V6M 2 1 5 PLACE NEAR NB choke NB@ PR509 10_0402_5% 2 1 PC564 10U_1206_25V6M 2 1 CPU_B+ NB@PQ502 NB@ PQ502 NB@ PH504 TPCA8059-H_PPAK56-8-5 D HW side: C160 330u 17m C201 330u 17m @C163 330u 9m +CPU_CORE_NB 3 NB@ PR506 4.7_1206_5% NB@ PR571 1_0402_1% 2 1 2 3 2 1 1 2 NB@PR505 NB@PR505 PC505 NB@PC505 NB@ 2.2_0603_1% 0.1U_0603_50V7K 1 2 1 2 LG1 29 LGATE1 BOOT1 25 1 PR519 0_0603_5% 1 2 TP PC549 0.22U_0603_25V7K 2 1 PC562 0.22U_0402_6.3V6K 2 1 PC544 0.22U_0402_6.3V6K PR524 10_0402_5% 2 1 PR554 976_0402_1% 2 1 3 2 1 PQ508 TPCA8059-H_PPAK56-8-5 @ PH503 680P_0603_50V7K 4.7_1206_5% 1 1 VSUM- 4 3 2 1 PR551 1 2.67K_0402_1% PC574 100U_25V_M PC569 100U_25V_M PC566 47U_25V_M PC568 100U_25V_M 2 +CPU_CORE 2 1 10K_0402_1% VSUM+ PR590 PR592 2 1 2 3.65K_0402_1% 1 ISEN2 10K_0402_1% PR593 VSUM- 2 If the layout of each phase to CPU is symmetric, the two res. can be removed. They are used for phase current balance adjustment. 1 1_0402_1% Ipeak=54A Imax=36A Ri=976, Rdroop=2.67K,OCP=65.21A F=300KHz Total Capacitor 1320uF, ESR 2.25mohm 4 1 3 2 PR580 ISEN2 2 B HW side: C145 330u 9m C146 330u 9m C147 330u 9m C148 330u 9m +CPU_CORE PR581 1 2 10K_0402_1% 1 ISEN1 10K_0402_1% PR582 VSUM+ 2 1 3.65K_0402_1% PR583 VSUM- 2 10K_0402_1%_TSM0A103F34D1RZ 1 1_0402_1% VSUM- 1 +CPU_CORE 2 C PL503 0.36UH_PCMC104T-R36MN1R17_30A_20% @ LGATE2 2 PR549 1 143K_0402_1% 1000P_0402_50V7K 3 PR591 ISEN1 TPCA8065-H_PPAK56-8-5 1 2 PC515 0.22U_0603_10V7K 1 2 1 PR515 0_0603_5% PR557 2.61K_0402_1% 2 PC543 1 4 PQ505 VSUM+ PC542 1 PR556 2 1 11K_0402_1% 2 470P_0402_50V7K 324_0402_1% 2 0.01U_0402_16V7K 68P_0402_50V8J 1 + 2 CPU_B+ BOOT2 2 PC551 2 1 PR543 2 PC550 2 1 PC541 1 2 2 PHASE2 0.22U_0402_10V6K PR547 100K_0402_1% 2 1 2 1U_0603_10V6K 2 1 33P_0402_50V8K 2 ISEN2 PC540 1 ISEN1 2 2 Rfset(Kohm)=(Period(uS))-0.29)*2.65 PC539 1000P_0402_50V7K PC548 1 1 PR546 8.06K_0402_1% 2 1 2 PR560 6.65K_0402_1% CPU_B+ PR559 1 0_0603_5% 1 +5VS PR558 1_0603_5% 2 @ TPCA8059-H_PPAK56-8-5 UGATE2 B @ PQ504 49 24 VDD 23 22 21 RTN 20 19 PH502 470K_0402_5%_TSM0B474J4702RE 18 1 VIN 26 PROG1 ISUMP BOOT1 NTC ISUMN PROC_HOT 12 VSEN 11 ISEN1 UGATE1 ISEN2 27 ISEN3/FB2 UG1 17 PLACE NEAR Phase1 L-MOS PGOOD 16 2 10 FB PR545 27.4K_0402_1% 1 2 PHASE1 15 3.83K_0402_1% 1 2 28 COMP PR544 PH1 VW 7,37,42 H_PROCHOT# ENABLE 14 VGATE 9 13 37 37,40,47 VR_ON 2 @ 1 PC582 4.7U_0805_25V6-K 2 1 PWM3 PR526 PWM3 30 2 31 680P_0603_50V7K 4.7_1206_5% SVC LG2 VCCP 1 PWROK 8 ISL6267HRZ-T_QFN48_6X6 PC525 0.22U_0603_10V7K 1 2 1 PR525 0_0603_5% LGATE1 4 BOOT1 2 PR516 SVD 7 + 5 PGOOD_NB 6 PR561 0_0603_5% PC526 2 1 LGATE2 PC581 4.7U_0805_25V6-K 2 1 PHASE2 3 2 1 33 32 1 + PL504 0.36UH_PCMC104T-R36MN1R17_30A_20% 4 1 5 PH2 1 2 @ TPCA8065-H_PPAK56-8-5 3 2 1 VW_NB + 1 4 1 PHASE1 2 UGATE2 PC585 4.7U_0805_25V6-K 2 1 37 BOOT2 34 1 PH1_NB LG1_NB 38 39 UG1_NB BOOT1_NB PROG2 NTC_NB 42 43 ISUMN_NB 44 45 RTN_NB VSEN_NB ISUMP_NB 46 47 48 ISEN1_NB 35 UG2 5 APU_SVC BOOT2 COMP_NB PQ503 1U_0603_10V6K 2 7 FB_NB 3 2 @ PR513 100K_0402_5% 2 0_0603_5% PR510 0_0402_5% 2 1 SDA PR511 0_0402_5% 2 1 ALERT# PR512 0_0402_5% 2 1 SCLK APU_SVD 22 APU_PWRGD_L 36 PC554 2 1 7 1 PR541 100K_0402_5% FB2_NB PWM2_NB 4 +5VS 1 5 PR518 0_0603_5% 1 2 UGATE1 PR562 2 1 +3VS ISEN2_NB PU500 C PC584 4.7U_0805_25V6-K 2 1 CPU_B+ Rfset(Kohm)=(Period(uS))-0.29)*2.65 2 1 2 NB@ PC530 1000P_0402_50V7K 1 1 0_0603_5% DIS@ PR563 2 2 NB@ PR530 8.06K_0402_1% VSUMG- PC516 2 1 1 680P_0603_50V7K PC583 4.7U_0805_25V6-K 2 1 2 NB@PR570 3.65K_0402_1% 2 1 PC580 4.7U_0805_25V6-K 2 1 1 VSUMG+ 5 2 NB@ PC532 NB@ PR532 NB@PR532 324_0402_1% 1000P_0402_50V7K BOOT1_NB 6.65K_0402_1% 1 NB@ PH4 470K_0402_5%_TSM0B474J4702RE PC570 NB@ 1 2 0.1U_0603_50V7K NB@PR514 27.4K_0402_1% 1 2 1 2 NB@ PR550 3.83K_0402_1% 40 +5VS 2 NB@PC531 NB@PC531 100P_0402_50V8J 4 VSUMG- NB@ PC506 41 PR533 143K_0402_1% 2 1 2 1 NB@ PR575 845_0402_1% NB@ PR531 100K_0402_1% 2 1 PC533 470P_0402_50V7K 2 1 NB@ PR534 2.26K_0402_1% 2 1 NTC_NB NB@ PR548 PROG2 1 2 NB@ 1 2 2 PLACE NEAR NB L-MOS NB@ PLACE NEAR Phase1 choke 2 7 APU_VDD_RUN_FB_L 2 PR527 10_0402_5% 2 1 2 1 PC553 0.1U_0603_50V7K 1 2 PC545 330P_0402_50V7K 7 APU_VDD_SENSE PC547 330P_0402_50V7K 1 PC546 0.01U_0402_25V7K~N A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 SCHEMATIC, MB A7213 Document Number Rev B 4019D8 Monday, July 04, 2011 Sheet 1 49 of 51 NO DATE PAGE MODIFICATION LIST PURPOSE -------------------------------------------------------------------------------------------------------------------------------2011/03/30 www.qdzbwx.com 42 Change PR22 to 180Ω,PR28 to 1.18KΩ Change PR22 to 523Ω,PR28 to 3KΩ For 65W SKU For 90W SKU 43 Change PC217 to SE074102K80,PR236 to 200KΩ,PR237 to 47KΩ PR205 to 3.3Ω,PR235 to SD00000S120,Add PR206,PC206, Delete PC211 Change PR222 to 53.6KΩ,PR223 to 20KΩ,Delate PQ209 Change PR222 to 75KΩ Circuit modify 44 Change PR335,PR355 to 2.2Ω,PC332,PC352 to SF000002080 ,PL332,PL352 to SH00000KN00,Add PR336,PR356,PC336,PC356 Circuit modify 45 Change PR155 to 2.2Ω,PC152 to SF000002080, Add PR156,PC156,PR521,Delete PC260 Change PR157 to 5.9KΩ,PL152 to SH00000IP00 Change PR157 to 14KΩ,PL152 to SH00000CN00 Circuit modify 46 Change PR405 to 2.2Ω,PC402 to SF000002080,Add PR406,PC406 Change PR407 to 14KΩ,PL402 to 2.2UH 7*7 Circuit modify 47 Change PR455 to 2.2Ω,PR457 to 18KΩ,PL452 to 2.2UH 7*7 Add PR456,PC456 Circuit modify 48 Change PR624 to 165KΩ,PR631 to 100Ω,Delete PR630, Add PC636,PR520 Circuit modify 49 Circuit modify Change PR505 to 2.2Ω,PR560 to 6.65KΩ,PR551 to 2.67KΩ Change PH503,PH504 to SL200000W00,PC569,PC574 to SF000003W00 Add PC506,PR506,PR517,PR518,PR519 For 90W SKU For 65W SKU Compal Electronics, Inc. Compal Secret Data Security Classification Issued Date For 90W SKU For 65W SKU 2011/01/06 Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: Monday, July 04, 2011 Sheet 50 of 51 5 4 3 2 HW PIR (Product Improve Record) 1 www.qdzbwx.com QHRAE LA-7213P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2 D Item Date Page Solution Request -------------------------------------------------------------------------------------------------------------------------1. 3/17 P23 Remove level-shifter for ODD_PLUGIN# ODD has internal 1K pull-down 2. 3/17 P34 Add level-shifter for CR_CPPE# For leakage issue 3. 3/17 P23 Change HDMI_HPD to GEVENT10# and reserve GEVENT19# GEVENT9# has issue 4. 3/17 P24 Change LOGO_LED to GPIO176 and WL_BT_LED to GPIO177 For LED flash issue after power-on 5. 3/24 P10 Add C295,C316,C324,C325 For EMI test 6. 3/28 P39 Reserve C20,C21,C229,C231~C236,C247,C251 For ESD test) 7. 3/29 P38 Change LPC debug port to 16pins connector To support new debug card 8. 3/30 P07 Add R70,R102,R105 Pull-down for unused HPD port --------------------------------------------------------------------------------------------------------------------- D REVISION CHANGE: 0.2 TO 1.0 C Item Date Page Solution Request -------------------------------------------------------------------------------------------------------------------------1. 4/15 P31 Reserve D24, D25 2. 4/27 P22 Change R257 form 100k to 10k for leakage issue. 3. 4/27 P37 Add BACO_EN# to EC To inform EC GPU thermal sensor status C B B A A Compal Electronics, Inc. Compal Secret Data Security Classification 2011/01/06 Issued Date Deciphered Date 2012/01/06 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. SCHEMATIC, MB A7213 Rev B 4019D8 Date: 5 4 3 2 Monday, July 04, 2011 Sheet 1 51 of 51
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