LA 7491P PCW20 Rev Compal R10

Compal_LA-7491P

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A

B

C

D

E

ZZZ1

LA-7491P

DA60000N810

1

1

Compal Confidential

2

2

Brazos PCW20 LA7491 Schematics Document
AMD APU Ontario-FT1+ FCH Hudson-M1

2011-03-29
3

3

REV:1.0

4

4

2010/05/06

Issued Date

Compal Electronics,Ltd.

Compal Secret Data

Security Classification

Title

Deciphered Date

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date: Friday, May 06, 2011

A

B

C

D

Sheet
E

1

of

36

A

B

C

D

E

Compal Confidential
Model Name : Brazos
File Name : LA7491

DDR3-SO-DIMM X2

Single Channel

1

page 11

page 8,9

DDR3-800/1066(1.5V)
DDR3-800/1066(1.35V)

AMD FUSION APU
Ontario FT1
BGA-413

LVDS Conn.

1

BANK 0, 1, 2, 3

PCI-Express

page5~7

HDMI

LAN(10/100)

MINI Card

page 9

WLAN&BT

RTL8105E-VC-GR

page 20

page 19

UMI*8

CRT

2

2

page 10

RJ45

page 19

CMOS Camera

Internal
clock GEN

USB conn x3

page 12

page 24

AMD HUDSON-M1
3.3V 48MHz

S-ATA

port 1

USB

605-BALL

port 0

HD Audio

page12~16

3.3V 24.576MHz/48Mhz

S-ATA ODD
Conn.page 18

3

S-ATA HDD
Conn.page 18

RTS5138

page 18

TPM
RTC CKT.

3

3 in 1
socket

page 22

page 17

SPK
CONN

EC

page 13

page 17

Audio Codec
ALC259-GR
page 21

LPC BUS

page 22

ENE KB926D3

Power/B
Power On/Off CKT.

Card Reader

Smart Card

page 23
page 23

page 24

USB I/O Conn.
DC/DC Interface CKT.

Int.KBD
Touch Pad

page 24

page 25

BIOS

4

Power Circuit DC/DC

page 23

page 23

Debug port
page 19

page 26,28,29
30,31,32,33

LED
page 27

2010/05/06

Issued Date

Compal Electronics,Ltd.

Compal Secret Data

Security Classification

CHARGER

4

page 23

Title

Deciphered Date

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

page 21

Date:

A

B

C

D

Rev
B

4019D2

Friday, May 06, 2011

Sheet
E

2

of

36

A

B

C

D

E

DDR3 Voltage Rails
FCH SM Bus0 address

1

+5VS

power
plane

+B

+1.5VS
+CPU_CORE
+1.5V

+3VL
+5VL

S0

+3VALW

1010 0000

WLAN

A2

1010 0010

1

Address

HEX

+1.1VALW

EC SM Bus2 address

HEX

Address

Smart Battery

16H

0001 011X b

Device

HEX

APU internal themal sensor

Address
1001 100X b

+1.1VS
+1.0VS

O

O

S1

O

O

O

O

S3

O

O

O

X

S5 S4/AC

O

O

X

X

O

X

X

X

X

X

X

X

TDP1_AUXP
TDP1_AUXN
LTDP0_AUXP
LTDP1_AUXN
DAC_SCL
DAC_SDA
SIC
SID

SVD
SMB_FCH_CK0

@

A0

SDDIM II

Device

SVC

3

SDDIM I

+0.75VS

O

S5 S4/AC & Battery
don't exist

Device

+1.8VS

O

S5 S4/ Battery only

Address

EC SM Bus1 address

+NB_CORE

+RTCVCC

2

HEX

+3VS
+5VALW

State

FCH SM Bus1 address

Device

Reserve

CONN@

ME CONNECTOR

8105E@

100M LAN function

SMB_FCH_DA0
SMB_FCH_CK1
SMB_FCH_DA1
SMB_EC_CK1
SMB_EC_DA1

8111E@

GLAN function

REAL@

ALC259-GR

VIA@

V1802T

ROM@

not support flash ROM

FROM@

Support flash ROM

SMB_EC_CK2
SMB_EC_DA2

SOURCE

POWER
PLAN

APU

+3VS

APU

+3VS

APU

+3VS

APU

+3VS

APU

+1.8VS

FCH

+3VS

FCH

+3VALW

EC

+5VALW

EC

+3VS

HDMI

LVDS

CRT

FCH

CPU
CORE

SDDIM
I/II

2

WLAN

BATT

APU

V
V
+5VS
V
+5VS
V
+3VALW
V
V

3

V
V
V

4

4

2009/05/06

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Title

Deciphered Date

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

Rev
B

4019D2

Friday, May 06, 2011

Sheet
E

3

of

36

A

B

C

D

E

POWER SEQUENCE
POWER MAP
+3VL
1

B+

VIN

+5VL
UP618CQAG

1

B+

+3VALW

+3VL

+5VALW

+3VALW,+5VALW

SUSP#

+1.1VALW

+1.8VS
SY8033BDBC

ON/OFFBTN#

NOTE1
T1>10ms, +3VALW to RSMRST#
T1

SUSP#

EC->FCH

EC_RSMRST#

EC->FCH

PBTN_OUT#

T2>100ms, RSMRST# to PBTN_OUT#

+5VS
SI4800BDY

T2
T3>100ns, PBTN_OUT# to SLP_S5#
T3

EN_WOL#

FCH->EC

FCH_SLP_S5#

EC->PWR

SYSON

T4>10ms, SLP_S5# to SYSON

+3V_LAN
AP2301GN

T4

+1.5V

SUSP#

The same with SLP_S5#

+3VS
SI4800BDY

FCH->EC

FCH_SLP_S3#

EC->PWR

SUSP#

T5>10ms, SYSON to SUSP#
T5

ENVDD
2

+LCDVDD
SI4800BDY

POK

2

+3VS,+5VS,+0.75VS
+1.8VS

+1.1VALW

RT8209BGQW

EC->PWR

+1.1VS_ON

1.1VSON#
+1.1VS

+1.1VS

T6>100ms, SUSP# to VR_ON

IRF8113PBF

T6
VR_ON

EC->PWR

SUSP#
+CPU_CORE
+CPU_CORE_NB

+1.0VS
STS11N3LLH5
PWR->EC

VR_ON

NOTE2

VGATE
T7>50ms, VGATE to EC_FCH_PWROK

+CPU_CORE

ISL6265AH
RTZ

T7
EC->FCH EC_FCH_PWROK

+CPU_CORE_NB
EC->FCH

KB_RST#
98ms>T7>150ms, EC_FCH_PWROK to APU_PWRGD
T8

FCH->APU

APU_PWRGD
101ms>T7>113ms, EC_FCH_PWROK to A_RST#

SYSON

T9

3

+1.5V

FCH->DEVICE

A_RST#

FCH->APU

LDT_RST#

3

RT8209BGQW

SUSP#
+1.5VS
SI4800BDY

NOTE1:

RSMRST# rise time(10% to 90%)<50ms
fail time<1ms

NOTE2:

EC_FCH_PWROK rise time(10% to 90%)<50ms
fail time<1ms

SUSP
+0.75VS
VDTT11V8

4

4

2010/05/06

Issued Date

Compal Electronics,Ltd.

Compal Secret Data

Security Classification

Title

Deciphered Date

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

A

B

C

D

Friday, May 06, 2011

Sheet
E

4

of

36

5

4

3

2

1

+1.8VS

2 1K_0402_5%

APU_SVD

1

2 300_0402_5%

LDT_RST#

R6

1

2 300_0402_5%

APU_PWRGD

R7

1

2 510_0402_1%

TEST_25_L

2 1K_0402_5%

TEST_36

R333 1

TDP1_TXP0
TDP1_TXN0

<10> HDMI_TX1+
<10> HDMI_TX1-

B9
A9

TDP1_TXP1
TDP1_TXN1

<10> HDMI_TX0+
<10> HDMI_TX0-

D10
C10

TDP1_TXP2
TDP1_TXN2

A10
B10

TDP1_TXP3
TDP1_TXN3

LVDS_TX2+
LVDS_TX2-

B5
A5

LTDP0_TXP0
LTDP0_TXN0

LVDS_TX1+
LVDS_TX1-

D6
C6

LTDP0_TXP1
LTDP0_TXN1

LVDS_TX0+
LVDS_TX0-

A6
B6

LTDP0_TXP2
LTDP0_TXN2

D8
C8

LTDP0_TXP3
LTDP0_TXN3

<10>
<10>
<12>
<12>

+3VS

<12>
<12>
R64

1

2 1K_0402_5%

APU_ALERT#_R

R14

1

2 1K_0402_5%

APU_PROCHOT

@ R16

1

2 1K_0402_5%

APU_SIC

@ R17

1

2 1K_0402_5%

R18

1

2 4.7K_0402_5%

<12>
<12>
<12>
<12>

APU_SID
HDMI_DAT

R19

1

2 4.7K_0402_5%

HDMI_SCL

R21

1

2 4.7K_0402_5%

LVDS_DAT

R22

1

2 4.7K_0402_5%

LVDS_SCL

R26

2

1 1K_0402_5%

TEST_18

R27

2

1 1K_0402_5%

TEST_19

R28

1

2 510_0402_1%

2

1 1K_0402_5%

R30
@ R31

2
2

1 1K_0402_5%

<14> CLK_APU
<14> CLK_APU#

V2
V1

<14> CLK_APU_DP
<14> CLK_APU_DP#

D2
D1

DISP_CLKIN_H
DISP_CLKIN_L

APU_SIC
APU_SID
<14> LDT_RST#
<14> APU_PWRGD
APU_PROCHOT_FCH#
APU_PROCHOT_EC#
<13>

@ R29

LVDS_CLK+
LVDS_CLK-

<35> APU_SVC
<35> APU_SVD

<14>
<23>

C

HDMI_CLK+
HDMI_CLK-

R23
R24
@ R35
R45

APU_ALERT#

TEST_25_H
TEST_35

1 1K_0402_5% APU_LDT_STP#

<35>
<35>

SVC
SVD
SIC
SID

T3
T4

RESET_L
PWROK

U1
U2
T2

PROCHOT_L
THERMTRIP_L
ALERT_L

APU_TDI
APU_TDO
APU_TCLK
APU_TMS
APU_TRST#
DBRDY
DBREQ#

N2
N1
P1
P2
M4
M3
M1

TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L

F4
G1
F3

VDDCR_NB_SENSE
VDDCR_CPU_SENSE
VDDIO_MEM_S_SENSE

1 R271
1 R272
T28 PAD

<35> VDDCR_NB_SENSE_H
<35> VDDCR_APU_SENSE_H

TEST_15

J1
J2
P3
P4

1
2 LDT_RST#_R
1
2 APU_PWRGD_R
0_0402_5%
APU_PROCHOT
0_0402_5%
APU_THERMTRIP#_R
0_0402_5% 1
2APU_ALERT#_R

0_0402_5%
0_0402_5%
1
2
1
2

R63

CLKIN_H
CLKIN_L

1 R273
1 R274

VDDCR_NB_SENSE_L
VDDCR_APU_SENSE_L

2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%

F1
B4
W11
V5

DP_ZVSS

H3

DP_BLON
DP_DIGON
DP_VARY_BL

G2
H2
H1

TDP1_AUXP
TDP1_AUXN

B2
C2

TDP1_HPD

C1

LTDP0_AUXP
LTDP0_AUXN

A3
B3

LTDP0_HPD

D3

DAC_RED
DAC_REDB
DAC_GREEN
DAC_GREENB
DAC_BLUE
DAC_BLUEB

C12
D13
A12
B12
A13
B13

DAC_HSYNC
DAC_VSYNC

E1
E2

DAC_SCL
DAC_SDA

F2
D4

DAC_ZVSS

D12

TEST4
TEST5
TEST6
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST31
TEST33_H
TEST33_L
TEST34_H
TEST34_L
TEST35
TEST36
TEST37

R1
R2
R6
T5
E4
K4
L1
L2
M2
K1
K2
L5
M5
M21
J18
J19
U15
T15
H4
N5
R5

R8

1

2 0.1U_0402_16V4Z

R5

1

2 51_0402_1%

TEST_33_L

1

2 0.1U_0402_16V4Z

R9

1

2 51_0402_1%

2 150_0402_1%

1

ENBKL <12>
ENVDD <12>
INV_PWM <12>

HDMI_SCL <10>
HDMI_DAT <10>

D

<10>

HDMI_HPD

LVDS_SCL <12>
LVDS_DAT <12>
R10
R12

2

1 100K_0402_5%

1

2 150_0402_1%

R13

1

2 150_0402_1%

R15

1

2 150_0402_1%

+5VS

C3
CRT_R

<11>

CRT_G

<11>

CRT_B

<11>

CRT_HSYNC
CRT_VSYNC

TEST38
DMAACTIVE_L

RSVD_1
RSVD_2
RSVD_3

1
2
3
4

+VCC_FAN1
EN_FAN1

<11>
<11>

CRT_DDC_CLK
CRT_DDC_DATA

2

U2

<23>

R20

1A

10U_0805_10V4Z 1

9
8
7
6
5

VEN Thermal Pad
VIN
GND
VO
GND
VSET
GND
GND

1

C4

G996RD1U_TDFN8_3X3

<11>
<11>

2

10U_0805_6.3V6M

2 499_0402_1%

1

TEST_4
TEST_5

PAD T1
PAD T2

TEST_14
TEST_15
TEST_16
TEST_17
TEST_18
TEST_19
TEST_25_H
TEST_25_L
TEST_28_H
TEST_28_L
TEST_31
TEST_33_H
TEST_33_L
TEST_34_H
TEST_34_L
TEST_35
TEST_36
TEST_37

PAD T4
PAD T5
PAD T6

PAD T7
PAD T9
PAD T8

+3VS
@

PAD T10
PAD T11

JFAN

+VCC_FAN1

FAN_SPEED1
1

APU_LDT_STP#

<14>

C7
1000P_0402_50V7K

2

U1 1.5G@

U1 1.2G@

U1 1.0G@

1.6G

1.5G

1.2G

1.0G

1
2
3

1
2
3

4
5

GND
GND

CONN@

ACES_85205-03001

ONTARIO-2M161000-1.6G_BGA413
@

U1 1.6G@

2

1000P_0402_50V7K

40mil

K3
T1

C

C6
1

R32
10K_0402_5%

PAD T13
<23>

VSS_SENSE

C2

1

1

R4

A8
B8

TEST_33_H C1

2

R3

<10> HDMI_TX2+
<10> HDMI_TX2-

DP MISC

APU_SVC

VGA DAC

2 1K_0402_5%

TEST

1

DISPLAYPORT 1

R2

U1B

DISPLAYPORT 0

APU_LDT_STP#

CLK

TEST_35

2 1K_0402_5%

SER

1 1K_0402_5%

1

CTRL

2

R1

JTAG

D

R74

5

+3VS

2N7002DW-T/R7_SOT363-6
APU_SIC

4

3

@
1 R302

2 0_0402_5%

SCL3_LV

1 R364

2 0_0402_5%

EC_SMB_CK2

FCH

<15>

Q1B @
1 R366
2
0_0402_5%

B

<23>

EC

B

+3VS
+1.8VS

1

6

@
1 R363

2 0_0402_5%

SDA3_LV

1 R365

2 0_0402_5%

EC_SMB_DA2

<15>

HDT CONNECTOR
AMD APU DEBUG PORT

FCH
2

APU_SID

2

2N7002DW-T/R7_SOT363-6

+1.8VS

Q1A @

JP1 CONN@
<23>

EC

R33

1

1

2

2

APU_TCLK

R34

2

1 1K_0402_5%

1K_0402_5%

3

3

4

4

APU_TMS

R36

2

1 1K_0402_5%

5

5

6

6

APU_TDI

R37

2

1 1K_0402_5%

7

7

8

8

APU_TDO

R42

1

2 300_0402_5%

R43

1

2 0_0402_5%

TEST_19

J108_PLLTST1 R44

1

2 0_0402_5%

TEST_18

1

1 R367
2
0_0402_5%

APU_TRST#

0_0402_5%
R38 1
2

+3VS
R39

1

R40
R41

APU_TRST#_R

2

1

2

1

2

1

10K_0402_5%
10K_0402_5%
10K_0402_5%

2

R70
10K_0402_5%

9

10

10

11

12

12

13

13

14

14

DBRDY
DBREQ#

15

15

16

16

17

17

18

18

19

19

20

20

LDT_RST#

J108_PLLTST0

+1.8VS

1

B

2 2

R25
1K_0402_5%

APU_PWRGD

9
11

SAMTE_ASP-136446-07-B
E

APU_THERMTRIP#_R

1

APU_THERMTRIP#

C

3

<15>

Q212
MMBT3904_NL_SOT23-3

A

1 R368
@

A

2 0_0402_5%

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2009/05/06

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet

Friday, May 06, 2011
1

5

of

36

5

4

3

2

1

<8,9> DDR_D[0..63]
<8,9> DDR_DM[0..7]
<8,9> DDR_DQS#[0..7]
<8,9> DDR_DQS[0..7]
<8,9> DDR_MA[0..15]

U1E

DDR_DQS0
DDR_DQS#0
DDR_DQS1
DDR_DQS#1
DDR_DQS2
DDR_DQS#2
DDR_DQS3
DDR_DQS#3
DDR_DQS4
DDR_DQS#4
DDR_DQS5
DDR_DQS#5
DDR_DQS6
DDR_DQS#6
DDR_DQS7
DDR_DQS#7

A16
B16
B20
A20
E23
E22
J22
J23
R22
P22
W22
V22
AC20
AC21
AB16
AC16

M_DQS_H0
M_DQS_L0
M_DQS_H1
M_DQS_L1
M_DQS_H2
M_DQS_L2
M_DQS_H3
M_DQS_L3
M_DQS_H4
M_DQS_L4
M_DQS_H5
M_DQS_L5
M_DQS_H6
M_DQS_L6
M_DQS_H7
M_DQS_L7

DDR_A_CLK0
DDR_A_CLK0#
DDR_A_CLK1
DDR_A_CLK1#
DDR_B_CLK0
DDR_B_CLK0#
DDR_B_CLK1
DDR_B_CLK1#

M17
M16
M19
M18
N18
N19
L18
L17

M_CLK_H0
M_CLK_L0
M_CLK_H1
M_CLK_L1
M_CLK_H2
M_CLK_L2
M_CLK_H3
M_CLK_L3

<8,9>
<8,9>

DDR_RST#
DDR_EVENT#

L23
N17

M_RESET_L
M_EVENT_L

DDR_CKE0
DDR_CKE1

F15
E15

<8,9>
<8,9>
<8,9>

M_CKE0
M_CKE1

<8>
<8>
<9>
<9>

DDR_A_ODT0
DDR_A_ODT1
DDR_B_ODT0
DDR_B_ODT1

W19
V15
U19
W15

M0_ODT0
M0_ODT1
M1_ODT0
M1_ODT1

<8>
<8>
<9>
<9>

DDR_A_CS0#
DDR_A_CS1#
DDR_B_CS0#
DDR_B_CS1#

T17
W16
U17
V16

M0_CS_L0
M0_CS_L1
M1_CS_L0
M1_CS_L1

U18
V19
V17

M_RAS_L
M_CAS_L
M_WE_L

DDR_RAS#
DDR_CAS#
DDR_WE#

DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7

M_DATA8
M_DATA9
M_DATA10
M_DATA11
M_DATA12
M_DATA13
M_DATA14
M_DATA15

C18
A19
B21
D20
A18
B18
A21
C20

DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15

M_DATA16
M_DATA17
M_DATA18
M_DATA19
M_DATA20
M_DATA21
M_DATA22
M_DATA23

C23
D23
F23
F22
C22
D22
F20
F21

DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23

M_DATA24
M_DATA25
M_DATA26
M_DATA27
M_DATA28
M_DATA29
M_DATA30
M_DATA31

H21
H23
K22
K21
G23
H20
K20
K23

DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31

M_DATA32
M_DATA33
M_DATA34
M_DATA35
M_DATA36
M_DATA37
M_DATA38
M_DATA39

N23
P21
T20
T23
M20
P20
R23
T22

DDR_D32
DDR_D33
DDR_D34
DDR_D35
DDR_D36
DDR_D37
DDR_D38
DDR_D39

M_DATA40
M_DATA41
M_DATA42
M_DATA43
M_DATA44
M_DATA45
M_DATA46
M_DATA47

V20
V21
Y23
Y22
T21
U23
W23
Y21

DDR_D40
DDR_D41
DDR_D42
DDR_D43
DDR_D44
DDR_D45
DDR_D46
DDR_D47

M_DATA48
M_DATA49
M_DATA50
M_DATA51
M_DATA52
M_DATA53
M_DATA54
M_DATA55

Y20
AB22
AC19
AA18
AA23
AA20
AB19
Y18

DDR_D48
DDR_D49
DDR_D50
DDR_D51
DDR_D52
DDR_D53
DDR_D54
DDR_D55

M_DATA56
M_DATA57
M_DATA58
M_DATA59
M_DATA60
M_DATA61
M_DATA62
M_DATA63

AC17
Y16
AB14
AC14
AC18
AB18
AB15
AC15

DDR_D56
DDR_D57
DDR_D58
DDR_D59
DDR_D60
DDR_D61
DDR_D62
DDR_D63

M_VREF

M23

M_ZVDDIO_MEM_S

M22

D

<14>
<14>

UMI_C_TXP[0..3]
UMI_C_TXN[0..3]

<14>
<14>

UMI_C_RXP[0..3]
UMI_C_RXN[0..3]

U1A

<25>
USB3.0
<25>

PCIE_PRX_C_USB30TX_P4
PCIE_PRX_C_USB30TX_N4

AA6
Y6

P_GPP_RXP0
P_GPP_RXN0

AB4
AC4

P_GPP_RXP1
P_GPP_RXN1

<19>
LAN <19>

PCIE_PTX_C_IRX_P2
PCIE_PTX_C_IRX_N2

AA1
AA2

<20>

PCIE_PTX_C_IRX_P3
PCIE_PTX_C_IRX_N3

Y4
Y3

WLAN<20>

+1.0VS

R46

2 2K_0402_1% Y14

1

UMI_C_RXP0
UMI_C_RXN0

AA12
Y12

UMI_C_RXP1
UMI_C_RXN1

AA10
Y10

UMI_C_RXP2
UMI_C_RXN2

AB10
AC10

UMI_C_RXP3
UMI_C_RXN3

AC7
AB7

P_GPP_RXP2
P_GPP_RXN2
P_GPP_RXP3
P_GPP_RXN3

PCIE I/F

M_DM0
M_DM1
M_DM2
M_DM3
M_DM4
M_DM5
M_DM6
M_DM7

B14
A15
A17
D18
A14
C14
C16
D16

P_GPP_TXP0
P_GPP_TXN0

AB6
AC6

P_GPP_TXP1
P_GPP_TXN1

AB3
AC3

P_GPP_TXP2
P_GPP_TXN2

Y1
Y2

USB3.0@
PCIE_ITX_PRX_P1 C441 1
PCIE_ITX_PRX_N1 C442 1
USB3.0@
PCIE_ITX_PRX_P2 C338 1
PCIE_ITX_PRX_N2 C339 1

P_GPP_TXP3
P_GPP_TXN3

V3
V4

PCIE_ITX_PRX_P3 C340 1
PCIE_ITX_PRX_N3 C341 1

P_ZVDD_10

P_ZVSS

P_UMI_RXP0
P_UMI_RXN0

UMI I/F

D15
B19
D21
H22
P23
V23
AB20
AA16

<8,9>
<8,9>

B

M_BANK0
M_BANK1
M_BANK2

DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7

C

<8>
<8>
<8>
<8>
<9>
<9>
<9>
<9>

R18
T18
F16

M_DATA0
M_DATA1
M_DATA2
M_DATA3
M_DATA4
M_DATA5
M_DATA6
M_DATA7

P_UMI_RXP1
P_UMI_RXN1
P_UMI_RXP2
P_UMI_RXN2
P_UMI_RXP3
P_UMI_RXN3

AA14 R47

1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_PTX_C_USB30RX_P4
PCIE_PTX_C_USB30RX_N4

<25>
USB3.0
<25>

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_ITX_C_PRX_P2
PCIE_ITX_C_PRX_N2

<19>
<19>

LAN

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_ITX_C_PRX_P3
PCIE_ITX_C_PRX_N3

<20>
<20>

WLAN

C

2 1.27K_0402_1%

P_UMI_TXP0
P_UMI_TXN0

AB12
AC12

UMI_TXP0 C9
UMI_TXN0 C10

1
1

2 0.1U_0402_16V7K UMI_C_TXP0
2 0.1U_0402_16V7K UMI_C_TXN0

P_UMI_TXP1
P_UMI_TXN1

AC11
AB11

UMI_TXP1 C11
UMI_TXN1 C12

1
1

2 0.1U_0402_16V7K UMI_C_TXP1
2 0.1U_0402_16V7K UMI_C_TXN1

P_UMI_TXP2
P_UMI_TXN2

AA8
Y8

UMI_TXP2 C13
UMI_TXN2 C14

1
1

2 0.1U_0402_16V7K UMI_C_TXP2
2 0.1U_0402_16V7K UMI_C_TXN2

P_UMI_TXP3
P_UMI_TXN3

AB8
AC8

UMI_TXP3 C15
UMI_TXN3 C16

1
1

2 0.1U_0402_16V7K UMI_C_TXP3
2 0.1U_0402_16V7K UMI_C_TXN3

ONTARIO-2M161000-1.6G_BGA413 @

B

+1.5V

+M_VREF

+1.5V
1

DDR_BS0
DDR_BS1
DDR_BS2

DDR SYSTEM MEMORY

<8,9>
<8,9>
<8,9>

M_ADD0
M_ADD1
M_ADD2
M_ADD3
M_ADD4
M_ADD5
M_ADD6
M_ADD7
M_ADD8
M_ADD9
M_ADD10
M_ADD11
M_ADD12
M_ADD13
M_ADD14
M_ADD15

R48

ONTARIO-2M161000-1.6G_BGA413

R49

1

2

39.2_0402_1%

1K_0402_1%
+M_VREF 1000P_0402_50V7K
1
1
C428
C172

@

2

2

D

R17
H19
J17
H18
H17
G17
H15
G18
F19
E19
T19
F17
E18
W17
E16
G15

1

DDR_MA0
DDR_MA1
DDR_MA2
DDR_MA3
DDR_MA4
DDR_MA5
DDR_MA6
DDR_MA7
DDR_MA8
DDR_MA9
DDR_MA10
DDR_MA11
DDR_MA12
DDR_MA13
DDR_MA14
DDR_MA15

R50

2

1K_0402_1%
2

0.1U_0402_16V4Z
+1.5V

DDR_EVENT# R51

2

1 1K_0402_1%

DDR_RST#

2

1 1K_0402_1%

R69
@

A

A

2010/05/06

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Title

Deciphered Date

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet

Friday, May 06, 2011
1

6

of

36

5

4

3

2

1

+CPU_CORE

1

C19

1

C21

1

@
C939 2

2
2
0.1U_0402_16V4Z

2
1U_0402_6.3V4Z

2

2
10U_0805_6.3V6M

W9

1

180P_0402_50V8J
C938
@

2

DDR3

5500mA0.1U_0402_16V4Z
1

C52

C937
@
180P_0402_50V8J 2

1

C53

C50

+

2

2

FBMA-L11-201209-221LMA30T_0805

C22

1
+

D

2

1

C31
2

+1.0VS

2

1U_0402_6.3V4Z

1

C40

1

C41

1

C42

1

1

C43

1

C44

0.1U_0402_16V4Z
1

C45

+1.0VS_VDD

C51

1

1

+1.0VS

2

2

2

1U_0402_6.3V4Z

2

1

C46

2

1

C47

0.1U_0402_16V4Z

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C

1U_0402_6.3V4Z

L4 1
2
FBMA-L11-201209-121LMA50

10U_0805_6.3V6M
C48

120次_5A
DCR:0.02次

2

C49

1

+CPU_CORE_NB

2
2
2
2
0.1U_0402_16V4Z
1U_0402_6.3V4Z

2

2
+CPU_CORE_NB

1

1U_0402_6.3V4Z

2

+1.0VS

N13
N20
N22
P10
P14
R4
R7
R20
T6
T9
T11
T13
U4
U5
U7
U12
U20
U22
V8
V9
V11
V13
W1
W2
W4
W5
W7
W12
W20
Y5
Y7
Y9
Y11
Y13
Y15
Y17
Y19
AA4
AA22
AB2
AB5
AB9
AB13
AB17
AB21
AC5
AC9
AC13
A11

1
C55

1

C56 +

2

2

1
C57 +
2

@

1
+

C64
@

220U_D2_4VM_R15 2

2

10U_0805_6.3V6M

1

1

1

C60

2

1U_0402_6.3V4Z

1

C61

2

C62

2

2

10U_0805_6.3V6M

+CPU_CORE_NB

10U_0805_6.3V6M

1

C59

1

2

C932
@

2

+CPU_CORE_NB

C58

10U_0805_6.3V6M

1
C931
@

10U_0805_6.3V6M

ESR:9ohm(MAX)

C63

1

2

10U_0805_6.3V6M

1U_0402_6.3V4Z
0.1U_0402_16V4Z

B

0.1U_0402_16V4Z

1U_0402_6.3V4Z
C65

1

C66

2

1

C67

2

1

C68

2

1

C69

2

1

C70

2

1

C71

2

1

C72

2

1

C73

2

2

0.1U_0402_16V4Z
1U_0402_6.3V4Z

1

0.1U_0402_16V4Z

1U_0402_6.3V4Z

+1.5V

+1.5V

ESR:9ohm(MAX)
330U_D2_2.5VY_R9M
1

C75

1

C74 +

@
10U_0805_6.3V6M

1

2

1
C933
@

2

C934
@

180P_0402_50V8J

VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSSBG_DAC

2

10U_0805_6.3V6M

+3VS

C54

2
10U_0805_6.3V6M

1U_0402_6.3V4Z

180P_0402_50V8J

1

2

0.1U_0402_16V4Z

FBMA-L11-201209-221LMA30T_0805

A4

C167
0.1U_0402_16V4Z

C35

+CPU_CORE

330U_D2_2.5VY_R9M

VDD_33

1

C34

10U_0805_6.3V6M

2

330U_D2_2.5VY_R9M

500mA

1

C33

2

10U_0805_6.3V6M

1

C32

10U_0805_6.3V6M

220次_3A
DCR:0.04次

10U_0805_6.3V6M

1

C30
2

2

1

1

C29

C39
2

10U_0805_6.3V6M

1

10U_0805_6.3V6M

+1.5V
1U_0402_6.3V4Z

2

1U_0402_6.3V4Z

10U_0805_6.3V6M 1U_0402_6.3V4Z

2
1
C76

1

C78

1

0.1U_0402_16V4Z
C79

1

C80

1

C81

1

C82

1

1

C83

C84

1
A

C77
2

2

2

2

2

2

10U_0805_6.3V6M

2

2

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

2010/05/06

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

ONTARIO-2M161000-1.6G_BGA413

Title

Deciphered Date

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

@

Date:

5

2

+CPU_CORE

10U_0805_6.3V6M

ESR:17ohm(MAX)

1

1U_0402_6.3V4Z
1

1

ESR:9ohm(MAX)

2

GND

A

2

180P_0402_50V8J

U13
W13
V12
T12

@ C23

+1.8VS

U1D

B

2

+1.8VS

10U_0805_6.3V6M

L3
1

220次_3A
DCR:0.04次
1

+1.0VS_VDDPL

1U_0402_6.3V4Z
U11 180P_0402_50V8J
1
1
1
C38
C37
C936
C36
@
2
2
2
0.1U_0402_16V4Z

@

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49

C930
@

2

180P_0402_50V8J

PCIE/IO/DDR3 Phy

VDD_10_1
VDD_10_2
VDD_10_3
VDD_10_4

1

2

200mA
VDDPL_10

L2

1U_0402_6.3V4Z
1
C28
C27

2

POWER

ONTARIO-2M161000-1.6G_BGA413

A7
B7
B11
B17
B22
C4
D5
D7
D9
D11
D14
B15
D17
D19
E7
E9
E12
E20
F8
F11
F13
G4
G5
G7
G9
G12
G20
G22
H6
H11
H13
J4
J5
J7
J20
K10
K14
L4
L6
L8
L11
L13
L20
L22
M7
N4
N6
N8
N11

C929
@

2

2

10U_0805_6.3V6M

VDDIO_MEM_S_1
VDDIO_MEM_S_2
VDDIO_MEM_S_3
VDDIO_MEM_S_4
VDDIO_MEM_S_5
VDDIO_MEM_S_6
VDDIO_MEM_S_7
VDDIO_MEM_S_8
VDDIO_MEM_S_9
VDDIO_MEM_S_10
VDDIO_MEM_S_11

C18

1U_0402_6.3V4Z

150mA

VDD_18_DAC

DP Phy/IO

G16
G19
E17
J16
L16
L19
N16
R16
R19
W18
U16

1

C17

1
C26 +

ESR:9ohm(MAX)

DIS PLL

VDDCR_NB_1
VDDCR_NB_2
VDDCR_NB_3
VDDCR_NB_4
VDDCR_NB_5
VDDCR_NB_6
VDDCR_NB_7
VDDCR_NB_8
VDDCR_NB_9
VDDCR_NB_10
VDDCR_NB_11
VDDCR_NB_12
VDDCR_NB_13
VDDCR_NB_14
VDDCR_NB_15
VDDCR_NB_16
VDDCR_NB_17
VDDCR_NB_18
VDDCR_NB_19
VDDCR_NB_20
VDDCR_NB_21
VDDCR_NB_22

1

1
C25 +

330U_D2_2.5VY_R9M

C20

C24 +

330U_D2_2.5VY_R9M

1

1

180P_0402_50V8J

C426

1
1

330U_D2_2.5VY_R9M

DAC

2000mA

E8
E11
E13
F9
F12
G11
G13
H9
H12
K11
K13
L10
L12
L14
M11
M12
M13
N10
N12
N14
P11
P13

GPU AND NB CORE

+1.5V

1

+1.8VS

L1 1
2
FBMA-L11-201209-121LMA50

1U_0402_6.3V4Z

+1.8VS_DAC

10000mA

C

VDD_18_1
VDD_18_2
VDD_18_3
VDD_18_4
VDD_18_5
VDD_18_6
VDD_18_7

1U_0402_6.3V4Z

180P_0402_50V8J

330U_D2_2.5VY_R9M

+CPU_CORE_NB

VDDCR_CPU_1
VDDCR_CPU_2
VDDCR_CPU_3
VDDCR_CPU_4
VDDCR_CPU_5
VDDCR_CPU_6
VDDCR_CPU_7
VDDCR_CPU_8
VDDCR_CPU_9
VDDCR_CPU_10
VDDCR_CPU_11
VDDCR_CPU_12
VDDCR_CPU_13
VDDCR_CPU_14
VDDCR_CPU_15

TSense/PLL/DP/PCIE/IO

D

U8
W8
U6
U9
W6
T7
V7

120次_5A
DCR:0.02次

+1.8VS_VDD

2000mA

CPU CORE

E5
E6
F5
F7
G6
G8
H5
H7
J6
J8
L7
M6
M8
N7
R8

180P_0402_50V8J

U1C

11000mA

330U_D2_2.5VY_R9M

+CPU_CORE
+CPU_CORE

4

3

2

Sheet

Friday, May 06, 2011
1

7

of

36

5

4

3

2

1

+1.5V
<6,9>

DDR_DQS#[0..7]

<6,9>

DDR_D[0..63]

<6,9>

DDR_DM[0..7]

1
R53
1K_0402_1%

<6,9>

DDR_DQS[0..7]

<6,9>

DDR_MA[0..15]

+V_DDR3_DIMM_REF

R52

1

2 0_0402_5%

1

C86
1000P_0402_50V7K

+VREF_DQA
DDR_D0
DDR_D1

1 0.1U_0402_16V4Z

C85

DDR_DM0
2

2

R54

DDR_D8
DDR_D9

1

2

+V_DDR3_DIMM_REF

DDR_D2
DDR_D3

D

DDR_DQS#1
DDR_DQS1

2

1K_0402_1%

DDR_D10
DDR_D11

Put it between DDR3 +1.5VS shape and GND shape

DDR_D16
DDR_D17

+1.5V
0.1U_0402_16V4Z

DDR_DQS#2
DDR_DQS2
1

2

1
C330
@

2

1
C113
@

2

1
C293 @
0.01U_0402_16V7K

2

1
C328 @
0.01U_0402_16V7K

DDR_D18
DDR_D19

C329 @
0.01U_0402_16V7K

2

DDR_D24
DDR_D25
DDR_DM3

0.1U_0402_16V4Z
DDR_D26
DDR_D27

Layout Note:
Place near JDDR1
Layout Note: Place these 4 Caps near Command
and Control signals of DIMMA

change two 100U to one 220U
06/21

+1.5V

C

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V4Z

10U_0603_6.3V6M

0.1U_0402_16V4Z

<6,9>

DDR_CKE0

<6,9>

DDR_BS2
DDR_MA12
DDR_MA9

10U_0603_6.3V6M
DDR_MA8
DDR_MA5

1
1

C92

1

C91

1

1

C94

C93
2

2

1

C96

1

1

C95
2

1
C97

2

2

2

2

1
C98

2

1
C99

2

1
C100

2

1
C101

2

C102
2

+ C87
@
220U_D2_4VM_R15

DDR_MA3
DDR_MA1

2

<6>
<6>

DDR_A_CLK0
DDR_A_CLK0#
DDR_MA10

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0603_6.3V6M

<6,9>

DDR_BS0

<6,9>
<6,9>

DDR_WE#
DDR_CAS#
DDR_MA13

<6>

Layout Note:
Place near JDDR1.203 & JDDR1.204

DDR_A_CS1#

DDR_D32
DDR_D33
DDR_DQS#4
DDR_DQS4

+0.75VS
1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0805_6.3V6M

DDR_D34
DDR_D35

B

1

C106

1

C107

1

C108

1

C109

1

1

2

2

DDR_D40
DDR_D41
C110
DDR_DM5

C105
2

1U_0402_6.3V6K

2

2

2

1U_0402_6.3V6K

CONN@

JDDR1

+1.5V

+V_DDR3_DIMM_REF

+1.5V

DDR_D42
DDR_D43
DDR_D48
DDR_D49

10U_0805_6.3V6M

DDR_DQS#6
DDR_DQS6
DDR_D50
DDR_D51
DDR_D56
DDR_D57
DDR_DM7
DDR_D58
DDR_D59
R56

1

2 10K_0402_5%

C103
2.2U_0603_6.3V6K

1

2

2

C104
0.1U_0402_16V4Z

R57
10K_0402_5%

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

205

G1

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

4.0mm G2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

DDR_D4
DDR_D5
DDR_DQS#0
DDR_DQS0
DDR_D6
DDR_D7
DDR_D12
DDR_D13
D

DDR_DM1
DDR_RST#

DDR_D20
DDR_D21
DDR_DM2
DDR_D22
DDR_D23
DDR_D28
DDR_D29
Need close to JDDR1
@
C264

DDR_DQS#3
DDR_DQS3
DDR_D30
DDR_D31

1

2010/05/06

Issued Date

2

DDR_CKE1

33P_0402_50V8J

DDR_CKE1

<6,9>

DDR_MA15
DDR_MA14
C

DDR_MA11
DDR_MA7
DDR_MA6
DDR_MA4
DDR_MA2
DDR_MA0
DDR_A_CLK1 <6>
DDR_A_CLK1# <6>
DDR_BS1 <6,9>
DDR_RAS# <6,9>

+DDR_VREF_CA_DIMMA

DDR_A_CS0#
DDR_A_ODT0

<6>
<6>

DDR_A_ODT1

<6>

R55

+V_DDR3_DIMM_REF

2 0_0402_5%

1

DDR_D36
DDR_D37

C89
1000P_0402_50V7K

DDR_DM4

1

1

2

2

C90
0.1U_0402_16V4Z

DDR_D38
DDR_D39
DDR_D44
DDR_D45

B

DDR_DQS#5
DDR_DQS5
DDR_D46
DDR_D47
DDR_D52
DDR_D53
DDR_DM6
DDR_D54
DDR_D55
DDR_D60
DDR_D61
DDR_DQS#7
DDR_DQS7
DDR_D62
DDR_D63

+0.75VS

DDR_EVENT# <6,9>
SMB_FCH_DA0 <9,15>
SMB_FCH_CK0 <9,15>

206

DDR3 SO-DIMM A
Standard Type

DAN06-K4406-0102

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification

<6,9>

DDR_D14
DDR_D15

2

A

1

1

+3VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet

Friday, May 06, 2011
1

8

of

36

5

4

3

2

+1.5V
2 0_0402_5%

1

C111
1000P_0402_50V7K

D

<6,8>

DDR_DQS#[0..7]

<6,8>

DDR_D[0..63]

<6,8>

DDR_DM[0..7]

<6,8>

DDR_DQS[0..7]

<6,8>

DDR_MA[0..15]

1

C112

VREF_DQB
1 0.1U_0402_16V4Z

DDR_D0
DDR_D1
DDR_DM0

2

2

DDR_D2
DDR_D3
DDR_D8
DDR_D9
DDR_DQS#1
DDR_DQS1
DDR_D10
DDR_D11
DDR_D16
DDR_D17
DDR_DQS#2
DDR_DQS2
DDR_D18
DDR_D19
DDR_D24
DDR_D25
DDR_DM3

Need close to JDDR2
@
1

Layout Note:
Place near JP3

DDR_D26
DDR_D27

C288
2

DDR_CKE0

change two 100U to one 220U
06/21

+1.5V
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
0.1U_0402_16V4Z

<6,8>

DDR_CKE0

<6,8>

DDR_BS2
DDR_MA12
DDR_MA9

10U_0603_6.3V6M

0.1U_0402_16V4Z

DDR_MA8
DDR_MA5

1
1

C118

1

C117

1
C119

2

1
C120

2

2

1
C121

1

C123

1

C124

1

C125

1

C126

1

C122

2

2

1
C127

2

2

2

2

2

1

+ C114

C128
2

2

2

DDR_MA3
DDR_MA1

220U_D2_4VM_R15
<6>
<6>

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_B_CLK0
DDR_B_CLK0#
DDR_MA10

10U_0603_6.3V6M
<6,8>

DDR_BS0

<6,8>
<6,8>

DDR_WE#
DDR_CAS#
DDR_MA13

Layout Note:
Place near JP3.203 & JP3.204

<6>

DDR_B_CS1#

DDR_D32
DDR_D33

+0.75VS
1U_0402_6.3V6K

DDR_DQS#4
DDR_DQS4

1U_0402_6.3V6K

DDR_D34
DDR_D35
B

C129

1

C130

2

1

C131

2

1

C132

2

1

1

2

2

DDR_D40
DDR_D41

C133
10U_0805_6.3V6M

DDR_DM5
DDR_D42
DDR_D43

1U_0402_6.3V6K

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

DDR_D4
DDR_D5
DDR_DQS#0
DDR_DQS0
DDR_D6
DDR_D7
DDR_D12
DDR_D13

D

DDR_DM1

1U_0402_6.3V6K
DDR_D48
DDR_D49
DDR_DQS#6
DDR_DQS6
DDR_D50
DDR_D51
DDR_D56
DDR_D57
DDR_DM7
SA0
Compal
common design
ADM CRB

SA1

DDR_D58
DDR_D59

@
R139 1
0
1

1

2 10K_0402_5%
R60 1

+3VS

0
C134
2.2U_0603_6.3V6K

A

1
R61 @
1
R203

1

1

2

2 0.1U_0402_16V4Z

C135

<6,8>

DDR_CKE1

<6,8>

DDR_D20
DDR_D21
DDR_DM2
DDR_D22
DDR_D23
DDR_D28
DDR_D29
DDR_DQS#3
DDR_DQS3
DDR_D30
DDR_D31

2010/05/06

Issued Date

2 10K_0402_5%

2
10K_0402_5%
2
10K_0402_5% 205

G1

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

G2

206

8.0mm

DDR_MA15
DDR_MA14
C

DDR_MA11
DDR_MA7
DDR_MA6
DDR_MA4
DDR_MA2
DDR_MA0
DDR_B_CLK1 <6>
DDR_B_CLK1# <6>
DDR_BS1 <6,8>
DDR_RAS# <6,8>

DDR_VREF_CA_DIMMB R59
DDR_D36
DDR_D37

<6>

+V_DDR3_DIMM_REF

2 0_0402_5%

1

1

1

2

2

C116
0.1U_0402_16V4Z

DDR_D38
DDR_D39
B

DDR_D44
DDR_D45
DDR_DQS#5
DDR_DQS5
DDR_D46
DDR_D47
DDR_D52
DDR_D53
DDR_DM6
DDR_D54
DDR_D55
DDR_D60
DDR_D61
DDR_DQS#7
DDR_DQS7
DDR_D62
DDR_D63

+0.75VS

DDR_EVENT# <6,8>
SMB_FCH_DA0 <8,15>
SMB_FCH_CK0 <8,15>

A

DDR3 SO-DIMM B
REV Type

DAN06-K4806-0102

Compal Electronics, Inc.
Title

Deciphered Date

SCHEMATIC MB A7491
Date:

3

<6>
<6>

DDR_B_ODT1

C115
1000P_0402_50V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

DDR_B_CS0#
DDR_B_ODT0

DDR_DM4

Compal Secret Data

Security Classification

5

DDR_RST#
DDR_D14
DDR_D15

33P_0402_50V8J

Layout Note: Place these 4 Caps near Command
and Control signals of DIMMA
C

+1.5V

CONN@

JDDR2
R58

+V_DDR3_DIMM_REF

1

2

Document Number

Rev
B

4019D2
Friday, May 06, 2011

Sheet
1

9

of

36

5

4

3

2

HDMI_CLKHDMI_CLK+

<5>
<5>

HDMI_TX2+
HDMI_TX2-

<5>
<5>

HDMI_TX1+
HDMI_TX1-

<5>
<5>

HDMI_TX0+
HDMI_TX0-

C136 1
C137 1

HDMI_TX2+
HDMI_TX2-

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

C138 1
C139 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

2

HDMI_CLKHDMI_CLK+

HDMI_C_CLKHDMI_C_CLK+
<5>

HDMI_C_TX2+
HDMI_C_TX2-

HDMI_TX1+
HDMI_TX1-

C140 1
C141 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

HDMI_C_TX1+
HDMI_C_TX1-

HDMI_TX0+
HDMI_TX0-

C142 1
C143 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

HDMI_C_TX0+
HDMI_C_TX0-

0_0402_5%
D

2N7002DW-T/R7_SOT363-6

1

HDMI_DAT

HDMIDAT_R

6
Q2A
2

1
R91 @
0_0402_5%

5

<5>
<5>

2 R62

1

+3VS

D

1

<5>

4

HDMI_SCL

HDMICLK_R

3

Q2B
2N7002DW-T/R7_SOT363-6
2

1
R93 @
0_0402_5%

L5
3

HDMI_CLK+_CONN

2

2

HDMI_CLK-_CONN

HDMI_DET

+5VS
+3VS
0_0402_5%
1

WCM-2012-670T
L6

2

A
3

L7
4

3

3

1

2

2

1

1

2

C166 @
0.1U_0402_16V4Z

Y

4

HDMI_HPD

U7 @
74AHCT1G125GW_SOT353-5

C

<5>

100K_0402_5%
R119

HDMI_TX1+_CONN

+5VS

2

HDMI_C_TX1- 1

2

G

WCM-2012-670T

HDMI_C_TX1+ 4

100K_0402_5%
R1192
@

HDMI_TX1-_CONN

2

2

HDMI_TX0-_CONN

R84 @
2.2K_0402_5%

3

2

C165 @
0.1U_0402_16V4Z

R98

2

1

1
5

3

HDMI_TX0+_CONN

2

HDMI_C_TX0- 1

4

3

P

HDMI_C_TX0+ 4

OE#

C

1

1

3

2

4

1

HDMI_C_CLK- 1

1

HDMI_C_CLK+ 4

WCM-2012-670T
D11 @
4

3

3

HDMI_TX2+_CONN

HDMI_C_TX2- 1

1

2

2

HDMI_TX2-_CONN

BAT54S-7-F_SOT23-3
1

L8
HDMI_C_TX2+ 4

HDMI_DET
+5VS

WCM-2012-670T

2
2
2
2
2
2
2
2

HDMI_CLK+_CONN
HDMI_CLK-_CONN
HDMI_TX0+_CONN
HDMI_TX0-_CONN
HDMI_TX1+_CONN
HDMI_TX1-_CONN
HDMI_TX2+_CONN
HDMI_TX2-_CONN

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

+5VS_HDMI
R78
2.2K_0402_5%
HDMIDAT_R
HDMICLK_R

R81
HDMI_TX0+_CONN
R82
HDMI_TX0-_CONN
R83
HDMI_TX1+_CONN
R85
HDMI_TX1-_CONN
R87
HDMI_TX2+_CONN
R89
HDMI_TX2-_CONN
R92

NEAR CONNECT

A

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

499_0402_1%

2

+5VS_HDMI 1

2

1

2 470_0402_1%

@ R1560

1

2 470_0402_1%

@ R1561

1

2 470_0402_1%

@ R1562

1

2 470_0402_1%

499_0402_1%

JHDMI

HDMI_DET 19
18
17
16
15
14
13
HDMI_CLK-_CONN
12
11
HDMI_CLK+_CONN
10
HDMI_TX0-_CONN
9
8
HDMI_TX0+_CONN
7
HDMI_TX1-_CONN
6
5
HDMI_TX1+_CONN
4
HDMI_TX2-_CONN
3
2
HDMI_TX2+_CONN
1

@

D

499_0402_1%
499_0402_1%

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+

20
21
22
23

SUYIN_100042MR019S153ZL
CONN@

499_0402_1%
499_0402_1%

C144
0.1U_0402_16V4Z
B

R79
2.2K_0402_5%

@ R1559

499_0402_1%

1

R80
HDMI_CLK-_CONN

2
G
S

3

HDMI_CLK+_CONN

1

F1
1.1A_6VDC_FUSE

1

1
1
1
1
1
1
1
1

1

R65
R66
R67
R68
R71
R72
R73
R75

2

B

@
@
@
@
@
@
@
@

2

HDMI_C_CLK+
HDMI_C_CLKHDMI_C_TX0+
HDMI_C_TX0HDMI_C_TX1+
HDMI_C_TX1HDMI_C_TX2+
HDMI_C_TX2-

D5
3 PMEG2010ET SOT23
+VCC_HDMI
1
2

0_0402_5%
2 R90
1
2
1
R88
0_0402_5%

+3VS
+5VS

Q10

499_0402_1%
2N7002W-T/R7_SOT323-3
A

2010/05/06

Issued Date

Compal Electronics,Ltd.

Compal Secret Data

Security Classification

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date: Friday, May 06, 2011

5

4

3

2

Sheet
1

10

of

36

A

B

C

D

E

CRT Connector

1

+CRT_VCC

1

1

1

D7
D8
D9
@
@
@
DAN217_SC59 DAN217_SC59 DAN217_SC59

1

+5VS

+R_CRT_VCC
D10
3

F2

1

2

3

2

3

2

3

2

1

W=40mils

2

W=40mils

1.1A_6VDC_FUSE

1

PMEG2010ET SOT23

+3VS

2
CRT_R_2

<5>

CRT_G

L14 1
2
FBMA-L10-160808-600LMT_2P

CRT_G_2

<5>

CRT_B

2

2

1
2

2

2

2

2

JCRT

CRT_B_2

C146 1

C147 1

2

5P_0402_50V8C

2

L12 1
2
FBMA-L10-160808-600LMT_2P

1
C151

5P_0402_50V8C

R96

1
C150

5P_0402_50V8C

C149 1

5P_0402_50V8C

5P_0402_50V8C

5P_0402_50V8C

R95

150_0402_1%

150_0402_1%

150_0402_1%

R94

1

L11 1
2
FBMA-L10-160808-600LMT_2P

1

CRT_R

<5>

C148 1

2

+CRT_VCC
2
0.1U_0402_16V4Z

C152

1

5

OE#

P
2

CRT_HSYNC

A

2

U4
CRT_HSYNC_0

4

Y

R99

G

<5>

1

1 10K_0402_5%

2 CRT_HSYNC_1
27_0402_5%

1

C155
10P_0402_50V8J

3

74AHCT1G125GW_SOT353-5

1

1

2

2

2

C156
10P_0402_50V8J

1

P

5

2
0.1U_0402_16V4Z

2

CRT_VSYNC

A

Y

CRT_VSYNC_0
R100

4

G

<5>

U5

OE#

1
C158

1

2

CRT_VSYNC_1
27_0402_5%

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

RGND
ID0
Red
GGND
SDA
Green
BGND
Hsync
Blue
+5V
Vsync
res
SGND
SCL
GND

16
17

GND
GND

2

SUYIN_070546FR015S293ZR
CONN@

68P_0402_50V8K

+CRT_VCC

100P_0402_50V8J

1
C153

R97

C145
0.1U_0402_16V4Z

1

2

C154

1

2

DAT_R R254 1

2 33_0402_5%

DAT

CLK_R R294 1

2 33_0402_5%

CLK

C157
68P_0402_50V8K

3

74AHCT1G125GW_SOT353-5

3

3

+CRT_VCC

DAT

6

1

1
R105

R106
4.7K_0402_5%
2

2

2

2

4.7K_0402_5%

0_0402_5%

R104
1

R103
4.7K_0402_5%

4.7K_0402_5%
2
1

R102
2

1

1

+3VS

CRT_DDC_DATA

<5>

CRT_DDC_CLK

<5>

Q3A
2N7002DW-T/R7_SOT363-6
2

R86

0_0402_5%

@

CLK

3

5

1

4

Q3B
2N7002DW-T/R7_SOT363-6
4

4

1

2

R101 0_0402_5%
@

2010/05/06

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Title

Deciphered Date

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

Document Number

Rev
B

4019D2
Friday, May 06, 2011

Sheet
E

11

of

36

5

4

3

2

1

LCD POWER CIRCUIT
+3VS

+3VALW
+LCDVDD

D

W=60mils

1

D

1

1
1

3

2
2
R109

1
100K_0402_5%

1

2 0_0402_5%

D

S

+LCDVDD

2N7002W-T/R7_SOT323-3
Q13

2
G

1

R110 1

1
ENVDD

ENVDD

3

3

<5>

Q12
AO3413_SOT23-3

2

S

4.7U_0805_10V4Z

0.1U_0402_16V4Z
1
1
@ C161
C343

R111
100K_0402_5%

4.7U_0805_10V4Z
2

2

C162

EC_INVT_PWM
<5>

INV_PWM

<5>

ENBKL

@ R114 1

2 0_0402_5%

R115 1

2 0_0402_5%

2
R116

1

INVTPWM
EC_ENBKL

0_0402_5%

0.1U_0402_16V4Z

<23>

R117
10K_0402_5%
2

2

2

1

<23>

1

1 2
2
G

G

Q11
2N7002W-T/R7_SOT323-3

2

0.1U_0402_16V4Z

2

D

C160

C159

D

R108
100K_0402_5%

S

R107
300_0603_5%

+LCD_INV
C

C

B+
L18

1.5A

W=30mils

1

2

R113
2

+5VS

0_0603_5%
1
2

C169
68P_0402_50V8J

+5VS_LVDS_CAM

2
1
FBMA-L11-201209-221LMA30T_0805
1
C168
@ C171
680P_0402_50V7K
0.1U_0603_25V7K
2
2

1

1

Rated Current MAX:3000mA

+5VS_LVDS_CAM

<15>
<15>

JLVDS

<5>
<5>
<5>
<5>
<5>
<5>

LVDS_TX0+
LVDS_TX0LVDS_TX1+
LVDS_TX1LVDS_TX2+
LVDS_TX2-

+LCD_INV

2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40
39
GND GMD

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41

USB20_N1
USB20_P1

R120 1
R121 1

2 0_0402_5%
2 0_0402_5%

USB20_N1_R
USB20_P1_R
B

LVDS_CLK+
LVDS_CLK-

<5>
<5>

L20

LVDS_SCL <5>
LVDS_DAT <5>
CE_EN_R

R369 1 @

2 1K_0402_5% CE_EN

INVTPWM
+LCDVDD
BKOFF#
+LCD_INV

@
<23>

1

1

CE_EN
+3VS

@

4

4

3

3

1

1

2

2

WCM2012F2SF-121T04_0805

<14>

1

USB20_P1_R
USB20_N1_R

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42

C431
C714
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2

100K_0402_5%
R1191
D28 @

2

B

C170
47P_0402_50V8J

ACES_87242-4001-09
CONN@

USB20_N1_R

2

USB20_P1_R

3

1
PJDLC05_SOT23-3

A

1

CE_EN_R

1

BKOFF#

A

100K_0402_5%
R1193
2

2

R112
10K_0402_5%

2010/05/06

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Title

Deciphered Date

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Friday, May 06, 2011

Sheet
1

12

of

36

5

4

0.01U_0402_16V7K
SATA_ITX_C_DRX_P0 2
SATA_ITX_C_DRX_N0 2
0.01U_0402_16V7K

<18> SATA_ITX_C_DRX_P0
<18> SATA_ITX_C_DRX_N0

D

SATA for HDD

<18> SATA_DTX_C_IRX_N0
<18> SATA_DTX_C_IRX_P0

0.01U_0402_16V7K
SATA_ITX_C_DRX_P1 2
SATA_ITX_C_DRX_N1 2
0.01U_0402_16V7K

<18> SATA_ITX_C_DRX_P1
<18> SATA_ITX_C_DRX_N1

SATA for ODD

3

1 C444
1 C443

AJ8
AH8

SATA_RX0N
SATA_RX0P

SATA_ITX_DRX_P1
SATA_ITX_DRX_N1

AH10
AJ10

SATA_TX1P
SATA_TX1N

SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_P1

AG10
AF10

SATA_RX1N
SATA_RX1P

AG12
AF12

SATA_TX2P
SATA_TX2N

AJ12
AH12

SATA_RX2N
SATA_RX2P

AH14
AJ14

SATA_TX3P
SATA_TX3N

AG14
AF14

SATA_RX3N
SATA_RX3P

AG17
AF17

SATA_TX4P
SATA_TX4N

AJ17
AH17

SATA_RX4N
SATA_RX4P

AJ18
AH18

SATA_TX5P
SATA_TX5N

AH19
AJ19

SATA_RX5N
SATA_RX5P

2 1K_0402_1%
2 931_0402_1%

10K_0402_5% 2

+3VS
<26>

SATA_CALRP
SATA_CALRN

1 R124
SATA_LED#

SATA_LED#

AB14
AA14
AD11

HW MONITOR

SATA_TX0P
SATA_TX0N

SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0

GPIOD

AH9
AJ9

SERIAL ATA

SATA_ITX_DRX_P0
SATA_ITX_DRX_N0

C

1 R122
1 R123

SATA_CALRP
SATA_CALRN
SATA_ACT_L/GPIO67

2

AD16

SATA_X1

AC16

SATA_X2

27P_0402_50V8J

2

@
C5

1

Y3 @
2
1

2

@
C210
27P_0402_50V8J

<17>
<17>
<17>
<17>

FCH_SPI_DO
FCH_SPI_DI
FCH_SPI_CLK
FCH_SPI_CS1#
PAD T15

J5
E2
K4
K9
G2

SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1_L/GPIO165
ROM_RST_L/GPIO161

FC_OE_L/GPIOD145
FC_AVD_L/GPIOD146
FC_WE_L/GPIOD148
FC_CE1_L/GPIOD149
FC_CE2_L/GPIOD150
FC_INT1/GPIOD144
FC_INT2/GPIOD147

AF28
AG29
AG26
AF27
AE29
AF29
AH27

FC_ADQ0/GPIOD128
FC_ADQ1/GPIOD129
FC_ADQ2/GPIOD130
FC_ADQ3/GPIOD131
FC_ADQ4/GPIOD132
FC_ADQ5/GPIOD133
FC_ADQ6/GPIOD134
FC_ADQ7/GPIOD135
FC_ADQ8/GPIOD136
FC_ADQ9/GPIOD137
FC_ADQ10/GPIOD138
FC_ADQ11/GPIOD139
FC_ADQ12/GPIOD140
FC_ADQ13/GPIOD141
FC_ADQ14/GPIOD142
FC_ADQ15/GPIOD143

AJ27
AJ26
AH25
AH24
AG23
AH23
AJ22
AG21
AF21
AH22
AJ23
AF23
AJ24
AJ25
AG25
AH26

D

FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58

W7
V9
W8

TEMPIN0/GPIO171
TEMPIN1/GPIO172
TEMPIN2/GPIO173
TEMPIN3/TALERT_L/GPIO174
TEMP_COMM

B6
A6
A5
B5
C7

R129 1
R130 1
R131 1

VIN0/GPIO175
VIN1/GPIO176
VIN2/GPIO177
VIN3/GPIO178
VIN4/GPIO179
VIN5/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182

A3
B4
A4
C5
A7
B7
B8
A8

R281
R136
R133
R182

SPI ROM

1
1

AH28
AG28
AF26

W5
W6
Y9

@ R126
1M_0402_5%
SATA_X2

FC_CLK
FC_FBCLKOUT
FC_FBCLKIN

FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54

SATA_X1

25MHZ_20PF_7A25000012

1

U6B
1 C173
1 C174

<18> SATA_DTX_C_IRX_N1
<18> SATA_DTX_C_IRX_P1

+1.1VS

2

NC1
NC2

C

R400
2

1

ODD_EN#

<18>

0_0402_5%
2 10K_0402_5%
@ 2 10K_0402_5%
2 10K_0402_5%
APU_ALERT#

1
1
1
1

R132 1
R127 1
R128 1

@
R125 1

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
DDR_VID
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
2
2
2
2

<5>

2 10K_0402_5%

G27
Y2

21807-A11-HUDSON-M1_FCBGA605
B

B

DDR_VID
DDR_VID

1.5V@
R134 1

DDR_VID

DDR voltage

<32>
0

+1.5V

1

+1.35V

2 10K_0402_5%

A

A

2010/05/06

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Title

Deciphered Date

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet

Friday, May 06, 2011
1

13

of

36

5

4

3

2

1

C176 150P_0402_50V8J

CLK_PCIE_WLAN
CLK_PCIE_WLAN#

2 0_0402_5%
2 0_0402_5%

<25>
<25>

CLK_PCIE_USB30
CLK_PCIE_USB30#

R386 1
R385 1

2 0_0402_5%
2 0_0402_5%
USB3.0@
USB3.0@

GPP_CLK0P
GPP_CLK0N

CLK_PCIE_WAN_R
CLK_PCIE_WAN#_R

N29
N28

GPP_CLK1P
GPP_CLK1N

CLK_PCIE_USB30_R
CLK_PCIE_USB30#_R

M29
M28

GPP_CLK2P
GPP_CLK2N
GPP_CLK3P
GPP_CLK3N

L24
L23

GPP_CLK4P
GPP_CLK4N

P25
M25

GPP_CLK5P
GPP_CLK5N

P29
P28

GPP_CLK6P
GPP_CLK6N

N26
N27

GPP_CLK7P
GPP_CLK7N

CLK_SD_48M

1

33_0402_5%

CLK_SD_48M_R

LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME_L
LDRQ0_L
LDRQ1_L/CLK_REQ6_L/GPIO49
SERIRQ/GPIO48

LPC

T25
V25

INTE_L/GPIO32
INTF_L/GPIO33
INTG_L/GPIO34
INTH_L/GPIO35

GPP_CLK8P
GPP_CLK8N

L25

ALLOW_LDTSTP/DMA_ACTIVE_L
PROCHOT_L
LDT_PG
LDT_STP_L
LDT_RST_L

XTAL25_OUT

L27

25M_X1

27P_0402_50V8J

2

Y1
25MHZ_20PF_7A25000012

G21
H21
K19
G22
J24

25M_X2

32K_X1

C1

32K_X2

C2

1
<15>

EC_PWM3

<15>

EC_PWM2

RTCCLK
INTRUDER_ALERT_L
VDDBT_RTC_G

D2
B2
B1

2

2

C192 27P_0402_50V8J

2 0_0402_5%

+3VS
@
C187
1

R153
10K_0402_5%

T35 PAD

R228 1
IN_TPM@

2 0_0402_5%

PLT_RST_BUF#

CLK_PCI_EC
CLK_PCI_TPM

<14,23>
<22>

APU_LDT_STP# <5>
APU_PROCHOT_FCH#
APU_PWRGD <5>

APU_PWRGD

LDT_RST#

<5>

EC_PWM2

+RTCVCC

<5>

1

1

1

1

2

2

2

2

2

2

1

2
1

1

1

1

1

1

1

2

1

R160
10K_0402_5%

R161
10K_0402_5%

C

Description

*

ROM TYPE

1

0

SPI ROM

1

1

Reserved

0

0

Reserved

0

1

LPC ROM

*

B

R1554
120_0402_5%

FCH_RTCX2
SUSCLK

<23>

R175 1

0 : External clock mode.
CLK_PCI_DB_R

2 510_0402_5%

2

1

1

2

C189
1U_0402_6.3V4Z

J10 @
JUMP_43X39

PCICLK1

1 : Integrated clock mode. *
0 : Force PCIe interface at Gen I mode.*
1 : PCIe interface is at Gen II mode.
0 : Disable the boot fail timer function. *
1 : Enable the boot fail timer function.

1

0 : Disable Debug Straps.
FCH_RTCX1

*

1 : Select external Debug Straps.

2

PCICLK3

NC

OSC

4

2

NC

OSC

1

C193
2
1

R177
20M_0603_5%

0 : Required setting for integrated clock mode.
PCICLK4

1

3

FCH_RTCX2

*

1 : Reserved.

D29

R227
560_0603_5%
1
2

2

18P_0402_50V8J

+CHGRTC

0 : Required setting for integrated clock mode.

1

HDA_SDOUT_R

A

3
BAS40-04_SOT23

MAXEL_ML1220T10

SP093MX0000

+RTCVCC
2

1

2

1

*

A

1 : Reserved (Hudson-1 does not support
the lower power mode).

C354
0.1U_0402_16V7K

J3
+CHGRTC

R159
10K_0402_5%

0 : Integrated Microcontroller (IMC) Disabled

EC_PWM3 EC_PWM2

FCH_RTCX1

32.768KHZ_12.5PF_9H03200413
R178
560_0603_5%
1
2

R158
10K_0402_5%

1 : Integrated Microcontroller (IMC) Enabled

EC_PWM3

T39 PAD
SERIRQ <22,23>

SERIRQ

C191
18P_0402_50V8J
2
1

2

+

R157
10K_0402_5%

<19,20,22,23,25>

RTC Battery
1

R156
10K_0402_5%
@

<22>

CLK_PCI_EC_R

CLK_PCI_EC_R 33_0402_5% 2
1 R172
CLK_PCI_TPM_R 33_0402_5% 2
1 R173
LPC_AD0
IN_TPM@
LPC_AD0 <20,22,23>
LPC_AD1
LPC_AD1 <20,22,23>
LPC_AD2
LPC_AD2 <20,22,23>
LPC_AD3
LPC_AD3 <20,22,23>
LPC_FRAME#
LPC_FRAME# <20,22,23>

X1

PBJ1 @

PM_CLKRUN#

R155

Net Name

R165
100K_0402_5%

+RTCBATT

+3VS

@ R148
10K_0402_5%

R248 1 @
10K_0402_5%

5

4

3

NC7SZ08P5X_NL_SC70-5
@

2

1

T34 PAD

G

A

+3VS

R151
10K_0402_5%
@

HDA_SDOUT_R

PCICLK2
Y

1

+3VS

R147
10K_0402_5%
@

PCICLK4
<15>

0.1U_0402_16V7K

2

+3VS

R146
10K_0402_5%
@

PCICLK3

P

U9
2 B

PLT_RST#

+3VS

@ R145
10K_0402_5%

CLK_PCI_TPM_R

1

1 R162

-

R154
@

+3VALW

R144
10K_0402_5%

PCICLK2

C188
0.1U_0402_16V7K
1

<17>
<17>
<17>
<17>
<17>

+3VS

@ R143

D

PCICLK1

21807-A11-HUDSON-M1_FCBGA605

2

XTAL25_OUT

H24
H25
J27
J26
H29
H28
G28
J25
AA18
AB19

<35>

2

1

1

1

R176
1M_0402_5%

L26

RTC

XTAL25_IN

XTAL25_IN

CLK_PCI_EC_R
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27

+3VS

R142
@

14M_25M_48M_OSC

B

C190

+3VALW

R141
10K_0402_5%
@

2
AJ6
AG6
AG4
AJ4

APU_PWRGD_CORE

2

L29
L28

1
Q14
BSS138W-7-F_SOT323-3

2

SLT_GFX_CLKP
SLT_GFX_CLKN

3

2

CPU_HT_CLKP
CPU_HT_CLKN

V23
T23

2 0_0402_5% APU_PWRGD_Q

2

V21
T21

CPU

<18>

2

2

CLK_APU_R
CLK_APU#_R

APU_PWRGD 1 R137

2

NB_HT_CLKP
NB_HT_CLKN

<12>

2

NB_DISP_CLKP
NB_DISP_CLKN

T26
T27

CE_EN

1

U29
U28

AA1
AA4
AA3
AB1
AA5
AB2
AB6
AB5
AA6
AC2
AC3
AC4
AC1
AD1
AD2
AC6
AE2
AE1
AF8
AE3
AF1
AG1
AF2
AE9
AD9
AC11
AF6
AF4
AF3
AH2
AG2
AH3
AA8
AD5
AD8
AA10
AE8
AB9
AJ3
AE7
AC5
AF5
AE6
AE4
AE11
AH5
AH4
AC12
AD12
AJ5
AH6
AB12
AB11
AD7

2

PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN

T29
T28
R174

R135
10K_0402_5%

PAD T16

2

M23
P23

T17 PAD
T18 PAD

CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R

2 0_0402_5%
2 0_0402_5%

+3VS

CLK_PCI_EC <14,23>
CLK_PCI_DB <20>

2

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N

2 22_0402_5%
2 22_0402_5%

2.2K_0402_5%

<20>
<20>

R170 1
R171 1

AA22
Y21
AA25
AA24
W23
V24
W24
W25

AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0_L
CBE1_L
CBE2_L
CBE3_L
FRAME_L
DEVSEL_L
IRDY_L
TRDY_L
PAR
STOP_L
PERR_L
SERR_L
REQ0_L
REQ1_L/GPIO40
REQ2_L/CLK_REQ8_L/GPIO41
REQ3_L/CLK_REQ5_L/GPIO42
GNT0_L
GNT1_L/GPO44
GNT2_L/GPO45
GNT3_L/CLK_REQ7_L/GPIO46
CLKRUN_L
LOCK_L

CLOCK GENERATOR

R168 1
R169 1

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N

@

2.2K_0402_5%

1 0_0402_5%
1 0_0402_5%

CLK_PCIE_LAN
CLK_PCIE_LAN#

<19>
<19>

PCIE_CALRP
PCIE_CALRN

AA28
AA29
Y29
Y28
Y26
Y27
W28
W29

CLK_APU_DP_R
CLK_APU_DP#_R

1 0_0402_5%
1 0_0402_5%

R166 2
R167 2

CLK_APU
CLK_APU#

AD29
AD28

PCIE_CALRP
PCIE_CALRN

R208 1
R204 1

2.2K_0402_5%

<5>
<5>

R163 2
R164 2

CLK_APU_DP
CLK_APU_DP#

UMI_RX0P
UMI_RX0N
UMI_RX1P
UMI_RX1N
UMI_RX2P
UMI_RX2N
UMI_RX3P
UMI_RX3N

V2

+1.8VS
PCICLK1
PCICLK2
PCICLK3
PCICLK4

2.2K_0402_5%

<5>
<5>

AE24
AE23
AD25
AD24
AC24
AC25
AB25
AB24

PCIRST_L

PCI I/F

C

2 590_0402_1%
2 2K_0402_1%

UMI_C_TXP0
UMI_C_TXN0
UMI_C_TXP1
UMI_C_TXN1
UMI_C_TXP2
UMI_C_TXN2
UMI_C_TXP3
UMI_C_TXN3

W2
W1
W3
W4
Y1

1

R149 1
R152 1

+1.1VS

UMI_TX0P
UMI_TX0N
UMI_TX1P
UMI_TX1N
UMI_TX2P
UMI_TX2N
UMI_TX3P
UMI_TX3N

PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39

D

UMI_C_TXP[0..3]
UMI_C_TXN[0..3]

AD26
AD27
AC28
AC29
AB29
AB28
AB26
AB27

S

D

<6>
<6>

U6E
P1 False
PCIE_RST_L
L1 A_RST_L

UMI_RXP0
UMI_RXN0
UMI_RXP1
UMI_RXN1
UMI_RXP2
UMI_RXN2
UMI_RXP3
UMI_RXN3

1

0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K

2

2
2
2
2
2
2
2
2

PCI EXPRESS I/F

1
1
1
1
1
1
1
1

1

UMI_C_RXP[0..3]
UMI_C_RXN[0..3]

C177
C178
C179
C180
C181
C182
C183
C184

2

1 0_0402_5%
1 33_0402_5%

G

UMI_C_RXP0
UMI_C_RXN0
UMI_C_RXP1
UMI_C_RXN1
UMI_C_RXP2
UMI_C_RXN2
UMI_C_RXP3
UMI_C_RXN3

1

R140 2
R150 2

PCI CLKS

<6>
<6>

@

2

PLT_RST#

1

2 0_0402_5%

2

R138 1

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

+3VL

PAD-OPEN 2x2m

2010/05/06

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet

Friday, May 06, 2011
1

14

of

36

5

4

3

2

1

+3VALW
U6A

1

APU_THERMTRIP#

FCH_RSMRST#

PAD T25

C

PAD T41

PAD T36
PAD T38
USB_OC#0

@ R205 2
R206 1
R207 1

<21> HDA_SYNC
<21> HDA_RST#

H9
J8

1

ODD_EN#

<18>

0_0402_5%
SC@

USB_HSD12P
USB_HSD12N

F11
E11

USB_HSD11P
USB_HSD11N

E14
E12

USB_HSD10P
USB_HSD10N

J12
J14

M3
N1
L2
M2
M1
1 10K_0402_5%
M4
2 33_0402_5% HDA_SYNC_R N2
2 33_0402_5% HDA_RST#_R P2

USB_HSD9P
USB_HSD9N

A13
B13

USB20_P9
USB20_N9

<26>
<26>

USB_HSD8P
USB_HSD8N

D13
C13

USB20_P8
USB20_N8

<26>
<26>

USB(USB/B2)

USB_HSD7P
USB_HSD7N

G12
G14

USB20_P7
USB20_N7

<20>
<20>

BT(MINI CARD)

USB_HSD6P
USB_HSD6N

G16
G18

USB_HSD5P
USB_HSD5N

D16
C16

USB_HSD4P
USB_HSD4N

B14
A14

USB_HSD3P
USB_HSD3N

E18
E16

USB_HSD2P
USB_HSD2N

J16
J18

USB20_P2
USB20_N2

<18>
<18>

CardReader

USB_HSD1P
USB_HSD1N

B17
A17

USB20_P1
USB20_N1

<12>
<12>

Camera

USB_HSD0P
USB_HSD0N

A16
B16

USB20_P0
USB20_N0

<25>
<25>

USB(MB)

GBE_RXERR

GBE_PHY_INTR
PAD T32
PAD T33
PAD T26

GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST_L
GBE_PHY_INTR

E23
E24
F21
G29

PS2_DAT/SDA4/GPIO187
PS2_CLK/SCL4/GPIO188
SPI_CS2_L/GBE_STAT2/GPIO166
FC_RST_L/GPO160

D27
F28
F29
E27

PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192

GBE LAN

B

T1
T4
L6
L5
T9
U1
U3
T2
U2
T5
V5
P5
M5
P9
T7
P7
M7
P4
M9
V7

AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST_L

SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198
EC_PWM2/EC_TIMER2/GPIO199
EC_PWM3/EC_TIMER3/GPIO200

D25
F23
B26
E26
F25
E22
F22
E21

KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208

G24
G25
E28
E29
D29
D28
C29
C28

EMBEDDED CTRL

GBE_MDIO

1 10K_0402_5%

2

1 10K_0402_5%

R186

2

1 200K_0402_5%

USB_OC#7

R183 2

1 200K_0402_5%

SCL3_LV

R187 2

1 10K_0402_5%

SDA3_LV

R188 2

1 10K_0402_5%

SMB_FCH_CK1

R184 1

2 2.2K_0402_5%

SMB_FCH_DA1

R185 1

2 2.2K_0402_5%

FCH_PCIE_WAKE# R189 2

1 10K_0402_5%

USB(USB/B1)

SMB_FCH_CK0

R190 1

2 2.2K_0402_5%

SMB_FCH_DA0

R191 1

2 2.2K_0402_5%

NB_PWRGD

1
R192

2
4.7K_0402_5%

SCL2

2
R193
2
R194
1
R195
2
R196
2
R197
2
R198

1
10K_0402_5%
1
10K_0402_5%
2
2.2K_0402_5%
1
10K_0402_5%
1
10K_0402_5%
1
10K_0402_5%

SDA2
EC_RSMRST#
GBE_COL
USB20_P3
USB20_N3

<18>
<18>

GBE_CRS

Smart Card

GBE_RXERR

FCH_RSMRST#

2 33_0402_5%HDA_BITCLK_R
2 33_0402_5%HDA_SDOUT_R

GBE_COL
GBE_CRS

2

R181

KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226

B28
A27
B27
D26
A26
C26
A24
B25
A25
D24
B24
C24
B23
A23
D22 <22,35>
C22
A22
B22

D

+3VS

1 10K_0402_5%

HD AUDIO

R201 1
R202 1

<21> HDA_BITCLK
<21> HDA_SDOUT
<21> HDA_SDIN0
<14> HDA_SDOUT_R

R179

GBE_MDIO

SCL2
SDA2

R199 2

1 0_0402_5%

C

EC_RSMRST#

<23>

SCL3_LV <5>
SDA3_LV <5>
EC_PWM2
EC_PWM3

<14>
<14>

B

R209 2

1 0_0402_5%

+3VS @
C194 0.1U_0402_16V7K
1
2
5

<25>

@ R200 2

BLINK/USB_OC7_L/GEVENT18_L
USB_OC6_L/IR_TX1/GEVENT6_L
USB_OC5_L/IR_TX0/GEVENT17_L
USB_OC4_L/IR_RX0/GEVENT16_L
USB_OC3_L/AC_PRES/TDO/GEVENT15_L
USB_OC2_L/TCK/GEVENT14_L
USB_OC1_L/TDI/GEVENT13_L
USB_OC0_L/TRST_L/GEVENT12_L

USB_FSD0P/GPIO185
USB_FSD0N

2

USB_HSD13P
USB_HSD13N

USB OC

H3
D1
E4
D4
E8
F7
E7
F8

<26> USB_OC#7
<23> EC_LID_OUT#

USB_FSD1P/GPIO186
USB_FSD1N

J10
H11

B12
A12

USB 2.0

<21> FCH_SPK
<8,9> SMB_FCH_CK0
<8,9> SMB_FCH_DA0
<20> SMB_FCH_CK1
<20> SMB_FCH_DA1
<25> USB30_CLKREQ2#
<20> WLAN_CLKREQ1#

GBE_PHY_INTR

2 11.8K_0402_1%

USB_OC#0

RSMRST_L
CLK_REQ4_L/SATA_IS0_L/GPIO64
CLK_REQ3_L/SATA_IS1_L/GPIO63
SMARTVOLT1/SATA_IS2_L/GPIO50
CLK_REQ0_L/SATA_IS3_L/GPIO60
SATA_IS4_L/FANOUT3/GPIO55
SATA_IS5_L/FANIN3/GPIO59
SPKR_GPIO66
SCL0_GPIO43
SDA0_GPIO47
SCL1_GPIO227
SDA1_GPIO228
CLK_REQ2_L/FANIN4_GPIO62
CLK_REQ1_L/FANOUT4_GPIO61
IR_LED_L/LLB_L/GPIO184
SMARTVOLT2/SHUTDOWN_L/GPIO51
DDR3_RST_L/GEVENT7_L
GBE_LED0/GPIO183
GBE_LED1/GEVENT9_L
GBE_LED2/GEVENT10_L
GBE_STAT0/GEVENT11_L
CLK_REQG_L/GPIO65_OSCIN

1 R180

R399

GPIO

AD19
AA16
AB21
AC18
AF20
AE19
AF19
AD22
AE22
F5
F4
AH21
AB18
E1
AJ21
H4
D5
D7
G5
K3
AA20

LAN_CLKREQ0#

PAD T20
USB_PCOMP

FCH_PWROK

4

P

<19>

G1

G19

B

2

G

<5>

A10

USB_RCOMP

A

1

Y
3

2

USB30_SMI#

PAD T29
PAD T30
PAD T31
<23> GATEA20
<23> KB_RST#
@2 R390
1EC_SMI# <23> EC_SCI#
0_0402_5%
<23> EC_SMI#
<25> USB30_SMI#
PAD T24
<19,20,25> FCH_PCIE_WAKE#

USBCLK/14M_25M_48M_OSC

USB 1.1

R389
10K_0402_5%
@

D

USB MISC

+3VS

PCI_PME_L/GEVENT4_L
RI_L/GEVENT22_L
SPI_CS3_L/GBE_STAT1/GEVENT21_L
SLP_S3_L
SLP_S5_L
PWR_BTN_L
PWR_GOOD
SUS_STAT_L
TEST0
TEST1/TMS
TEST2
GA20IN/GEVENT0_L
KBRST_L/GEVENT1_L
LPC_PME_L/GEVENT3_L
LPC_SMI_L/GEVENT23_L
GEVENT5_L
SYS_RESET_L/GEVENT19_L
WAKE_L/GEVENT8_L
IR_RX1/GEVENT20_L
THRMTRIP_L/SMBALERT_L/GEVENT2_L
NB_PWRGD

ACPI/WAKE UP EVENTS

<23> FCH_SLP_S3#
<23> FCH_SLP_S5#
<23> PBTN_OUT#

J2
K1
D3
F1
H1
F2
FCH_PWROK
H5
G6
B3
C4
F6
AD21
AE21
K2
EC_SMI#
J29
H2
2 R388
1 0_0402_5%
USB3.0@
J1
H6
F3
J6
NB_PWRGD
AC19

EC_FCH_PWROK
VGATE

<23>

<23,35>

NC7SZ08P5X_NL_SC70-5
U10 @

21807-A11-HUDSON-M1_FCBGA605

A

A

2009/02/04

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet

Friday, May 06, 2011
1

15

of

36

5

4

+3VS
D

3

+3VS_SB

0_0603_5%

2
22U_0805_6.3V6M

2
2
0.1U_0402_16V4Z

2

+3VS

220次_0.2A
DCR:0.2次

+3VS_PCIE_VDDPL

L22 1
2
FBMA-L11-160808-221LMT_2P
C209
2.2U_0402_6.3VM

0.1U_0402_16V4Z
1
C211

1

220次_0.2A
DCR:0.2次

2
1U_0402_6.3V6K

2

2

+3VS_SATA_VDDPL

15.5mA

L24 1
2
FBMA-L11-160808-221LMT_2P
C217
2.2U_0402_6.3VM

1

AD14

VDDPL_33_SATA

1

0.1U_0402_16V4Z AJ20
AF18
AH20
2
2
AG19
120次_5A
+1.1VS
+1.1VS_SATA
AE18
1354.2mA
DCR:0.02次
AD18
1U_0402_6.3V6K 0.1U_0402_16V4Z
L25 1
AE16
2
FBMA-L11-201209-121LMA50
1
1
1
1
1
C222
C223
C224
C225
C226
22U_0805_6.3V6M
0.1U_0402_16V4Z

+3VALW

220次_3A
DCR:0.04次

+3VALW_USB_AVDD

C229
10U_0603_6.3V6M

2
2
1U_0402_6.3V6K

2

534.5mA

1U_0402_6.3V6K
0.1U_0402_16V4Z
1
1
1
1
C231
C232
C233

1
C230

+1.1VALW

2

2
1U_0402_6.3V6K

2

+1.1VALW_USB_VDDAN

L28 1
2
FBMA-L11-160808-221LMT_2P

220次_0.2A
DCR:0.2次

C237
2.2U_0402_6.3VM

88.6mA
1

2

1

2

C238
0.1U_0402_16V4Z

2
2
0.1U_0402_16V4Z

2
1U_0402_6.3V6K

2

2

A18
A19
A20
B18
B19
B20
C18
C20
D18
D19
D20
E19

VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12

C11
D11

VDDAN_11_USB_S_1
VDDAN_11_USB_S_2

1

+1.1VS

10U_0603_6.3V6M

C208

1

2
2
0.1U_0402_16V4Z

2
1U_0402_6.3V6K

1 0_0603_5%

VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2

L7
L9

2 R215

1 0_0603_5%

VDDIO_GBE_S_1
VDDIO_GBE_S_2

M6
P8

2 R216

1 0_0603_5%

2

2

0.1U_0402_16V4Z 1
C219
2

58mA

M21

VDDPL_11_SYS_S

L22

VDDPL_33_USB_S

F19

VDDXL_33_S

+3VALW

1

C221

1

0_0603_5%

1

2
2.2U_0402_6.3VM

2
+1.1VALW
2 R218

C246

1

C227

1

C228

1U_0402_6.3V6K
2

16.1mA
11.4mA
5.0mA

2
1U_0402_6.3V6K

+1.1VALW_USB_VDDCR

2

C236
0.1U_0402_16V4Z

+3VS_VDDPL

1 0_0603_5%

1

+VDDIO_AZ

65.3mA

D6

C220

0.1U_0402_16V4Z

46.5mA

VDDAN_33_HWM_S

+1.1VALW_VDDP

+1.1VALW

1

2

+3VALW_USB_AVDD

C235

1

C234

2
0.1U_0402_16V4Z

L27 1
2
FBMA-L11-160808-221LMT_2P

1

2

10U_0603_6.3V6M

220次_0.2A
DCR:0.2次
B

+3VALW

L20

21807-A11-HUDSON-M1_FCBGA605

220次_0.2A
DCR:0.2次

+3VS_VDDXL

C240
0.1U_0402_16V4Z

1

1

2

2

+3VS

L29 1
2
FBMA-L11-160808-221LMT_2P

+VDDIO_AZ

C239
2.2U_0402_6.3VM
C241
330P_0402_50V8J

220次_0.2A +3VS
DCR:0.2次

+3VS_VDDPL

C242
2.2U_0402_6.3VM

1

2

L32 1
2
FBMA-L11-160808-221LMT_2P
1
C243
2

2

2.2U_0402_6.3VM

15.3mA

VDDPL_33_SYS

+

C

2 R217

F26
G26

A11
B11

1
C186
@

ESR:9ohm(MAX)

+3VALW_VDDIO

165.2mA

VDDCR_11_USB_S_1
VDDCR_11_USB_S_2

+

2
22U_0805_6.3V6M

49.5mA

A21
D21
B21
K10
L10
J9
T6
T8

M8

1
C185

1 0_0603_5%

VDDIO_AZ_S

+1.1VS

DCR:0.02次

2 R214

VDDCR_11_S_1
VDDCR_11_S_2

+1.1VS

1U_0402_6.3V6K
L34 1
2
1
1 FBMA-L11-201209-121LMA50
C205
C204

2 R213

VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8

D

R211 2
0_0805_5%

+1.1VS_CLK 120次_5A
0.1U_0402_16V4Z
1
1
C207
C206

M10

PLL

2
2
10U_0603_6.3V6M

1

+1.1VALW_VDDCR

USB I/O

L26 1
2
FBMA-L11-201209-221LMA30T_0805

B

2

VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7

CORE S5

2

C218

VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8

3.3V_S5 I/O

2

U26
V22
V26
V27
V28
V29
W22
W26

GBE LAN

1115.6mA

1U_0402_6.3V6K
0.1U_0402_16V4Z
1
1
1
1
C213
C214
C215
C216
@

VDDPL_33_PCIE

C203

0.1U_0402_16V4Z
1U_0402_6.3V6K
1
1
1
1
C202
C201
C200
C199

V1

VDDRF_GBE_S

SERIAL ATA

1

2

+3VS

AE28

0.1U_0402_16V4Z

C212
22U_0805_6.3V6M

C

2

+1.1VS_PCIE

VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8

K28
K29
J28
K26
J21
J20
K21
J22

VDDIO_33_GBE_S

PCI EXPRESS

120次_5A
DCR:0.02次

L23 1
2
FBMA-L11-201209-121LMA50

VDDIO_18_FC_1
VDDIO_18_FC_2
VDDIO_18_FC_3
VDDIO_18_FC_4

N13
R15
N17
U13
U17
V12
V18
W12
W18

382.9mA

22.5mA
2

+1.1VS

AF22
AE25
AF24
AC22

FLASH I/O

0.16mA

979.4mA

VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9

330U_D2_2.5VY_R9M

1

+1.1VS_VDDCR

POWER

VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10
VDDIO_33_PCIGP_11
VDDIO_33_PCIGP_12

1

330U_D2_2.5VY_R9M

2 0_0402_5%

AH1
V6
Y19
AE5
AC21
AA2
AB4
AC8
AA7
AA9
AF7
AA19

CLKGEN I/O

R212

U6C

42mA

PCI/GPIO I/O

0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
C195
C196
C197
C198

1

CORE S0

2 R210

2

0.1U_0402_16V4Z

+1.1VALW_VDDP

C244
2.2U_0402_6.3VM

1

2

1

2

2

R219 2
R220 2
@
C1004
2.2U_0402_6.3VM

1 0_0603_5%
1 0_0603_5%

+3VALW
+1.5V

+3VALW

220次_0.2A +1.1VALW
DCR:0.2次

L30 1
2
FBMA-L11-160808-221LMT_2P
1
C245
2

1

1

2

0.1U_0402_16V4Z

C247

close pin D6

0.1U_0402_16V4Z

A

A

2009/02/04

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet

Friday, May 06, 2011
1

16

of

36

5

4

3

2

1

U6D

1

FCH_SPI_DO

2

For EMI close U59

D

U20 FROM@

<13>
<13>
<13>
<13>
+3VS
+3VALW

FCH_SPI_DO
FCH_SPI_CS1#
FCH_SPI_CLK
FCH_SPI_DI
R1557 FROM@ 2
R1558
@ 2

1
1

0_0402_5%
0_0402_5%
1

2

1
4
10
13

1OE#
2OE#
3OE#
4OE#

2
5
9
12

1A
2A
3A
4A

14

VCC

FCH_SPI_DO_R

FCH_SPI_DI_R

3
6
8
11

1B
2B
3B
4B

FCH_SPI_CLK_R
FCH_SPI_CS1#_R

+3V_SPI

7

GND

SN74CBT3125PWRG4_TSSOP14
C595
0.1U_0402_16V4Z
FROM@

1
U21
FCH_SPI_CS1#_R
FCH_SPI_DO_R

U22
<23,24,30>

EC_ON

1
4
10
13

1OE#
2OE#
3OE#
4OE#

KSI3
KSI7
KSI6
KSI5

2
5
9
12

1A
2A
3A
4A

14

VCC

<23,24>
<23,24>
<23,24>
<23,24>

+3V_SPI
1

+3V_SPI

FROM@

1
2
3
4

CS#
VCC
DO(IO1) HOLD#(IO3)
WP#(IO2)
CLK
GND
DI(IO0)

FCH_SPI_CLK_R
FCH_SPI_DI_R

W25Q16BVSSIG_SO8

3
6
8
11

1B
2B
3B
4B

C

7

GND

SN74CBT3125PWRG4_TSSOP14

2

M20
+3VS

H23
H26
AA21
AA23
AB23
AD23
AA26
AC26
Y20
W21
W20
AE26
L21
K20

2

R1549 ROM@
1

+3V_SPI

2

+3VALW

0_0402_5%

R1556 @
1

+3V_SPI

0_0402_5%
+5VALW

+5VALW
C436 FROM@
2

1
R420
1

+5VALW

2
100K_0402_5%
FROM@

EC_ON

3

+

2

-

R416 FROM@
10K_0402_5%

0.1U_0402_16V4Z
U142A FROM@
O

R418 FROM@
100K_0402_5%

1
C435

LM393DG_SO8

1

0.1U_0402_16V4Z

+5VALW

*

LM393DG_SO8

2
1

C434 FROM@
0.1U_0402_16V4Z

D

S

Q28 FROM@
AO3416_SOT23-3

2
G

+3V_SPI
R417 FROM@
100K_0402_5%

2
1

1 : Use internal PLL-generated PLL CLK

-

U142B
FROM@
O 7

B

D6 FROM@
RB715F_SOT323-3
2
1
3

1

FROM@
R421
10K_0402_5%

+

6

+3VALW

FROM@

2

FROM@

0 : Bypass internal PLL clock

5

FROM@
R419
10K_0402_5%

G

+5VALW

1 10K_0402_5%
2

Description

SUSP#

R422 2

4

<23,25,27,31,34>

P

8

+5VALW

1

2

2
B

PCI_AD27

8
7
6
5

C593
0.1U_0402_16V4Z

2

C594
0.1U_0402_16V4Z
FROM@

21807-A11-HUDSON-M1_FCBGA605

Net Name

2MB

1

VSSIO_PCIECLK_14
VSSIO_PCIECLK_15
VSSIO_PCIECLK_16
VSSIO_PCIECLK_17
VSSIO_PCIECLK_18
VSSIO_PCIECLK_19
VSSIO_PCIECLK_20
VSSIO_PCIECLK_21
VSSIO_PCIECLK_22
VSSIO_PCIECLK_23
VSSIO_PCIECLK_24
VSSIO_PCIECLK_25
VSSIO_PCIECLK_26
VSSIO_PCIECLK_27

FCH_SPI_CS1#
@
C928
10P_0402_50V8J

3

VSSIO_PCIECLK_1
VSSIO_PCIECLK_2
VSSIO_PCIECLK_3
VSSIO_PCIECLK_4
VSSIO_PCIECLK_5
VSSIO_PCIECLK_6
VSSIO_PCIECLK_7
VSSIO_PCIECLK_8
VSSIO_PCIECLK_9
VSSIO_PCIECLK_10
VSSIO_PCIECLK_11
VSSIO_PCIECLK_12
VSSIO_PCIECLK_13

1 0_0402_5%
ROM@
1 0_0402_5%
ROM@
2 R1552 1 0_0402_5%
ROM@
2 R1553 1 0_0402_5%
ROM@

2

P21
P20
M22
M24
M26
P22
P24
P26
T20
T22
T24
V20
J23

VSSPL_SYS

2 R1551

1

VSSXL

2 R1550

FCH_SPI_CLK

8

VSSAN_HWM

M19

FCH_SPI_DI

P

EFUSE

@
FCH_SPI_CLK 1
2
R1455
0_0402_5%

G

Y4
D8

AJ2
A28
A2
E5
D23
E25
E6
F24
N15
R13
R17
T10
P10
V11
U15
M18
V19
M11
L12
L18
J7
P3
V4
AD6
AD4
AB7
AC9
V8
W9
W10
AJ28
B29
U4
Y18
Y10
Y12
Y11
AA11
AA12
G4
J4
G8
G9
M12
AF25
H7
AH29
V10
P6
N4
L4
L8

4

VSSIO_USB_1
VSSIO_USB_2
VSSIO_USB_3
VSSIO_USB_4
VSSIO_USB_5
VSSIO_USB_6
VSSIO_USB_7
VSSIO_USB_8
VSSIO_USB_9
VSSIO_USB_10
VSSIO_USB_11
VSSIO_USB_12
VSSIO_USB_13
VSSIO_USB_14
VSSIO_USB_15
VSSIO_USB_16
VSSIO_USB_17
VSSIO_USB_18
VSSIO_USB_19
VSSIO_USB_20
VSSIO_USB_21
VSSIO_USB_22
VSSIO_USB_23
VSSIO_USB_24
VSSIO_USB_25
VSSIO_USB_26
VSSIO_USB_27
VSSIO_USB_28

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52

GND

C

A9
B10
K11
B9
D10
D12
D14
D17
E9
F9
F12
F14
F16
C9
G11
F18
D9
H12
H14
H16
H18
J11
J19
K12
K14
K16
K18
H19

VSSIO_SATA_1
VSSIO_SATA_2
VSSIO_SATA_3
VSSIO_SATA_4
VSSIO_SATA_5
VSSIO_SATA_6
VSSIO_SATA_7
VSSIO_SATA_8
VSSIO_SATA_9
VSSIO_SATA_10
VSSIO_SATA_11
VSSIO_SATA_12
VSSIO_SATA_13
VSSIO_SATA_14
VSSIO_SATA_15
VSSIO_SATA_16
VSSIO_SATA_17
VSSIO_SATA_18
VSSIO_SATA_19

1

D

Y14
Y16
AB16
AC14
AE12
AE14
AF9
AF11
AF13
AF16
AG8
AH7
AH11
AH13
AH16
AJ7
AJ11
AJ13
AJ16

0 : ILA auto run enable
PCI_AD26

1 : ILA auto run disable

*

0 : Bypass internal FC Clk
PCI_AD25

1 : Use internal PLL FC Clk

*

NEED CHECK

<14>

PCI_AD23

<14>

PCI_AD24

<14>

PCI_AD25

<14>

PCI_AD26

<14>

PCI_AD27

@

R334

2

1

2.2K_0402_5%

@

R335

2

1

2.2K_0402_5%

@

R336

2

1

2.2K_0402_5%

@

R337

2

1

2.2K_0402_5%

@

R338

2

1

2.2K_0402_5%

0 : Getting the value from I2C EPROM

A

PCI_AD24

1 : Disable I2C ROM

*

A

NEED CHECK

0 : Reserved

PCI_AD23

*

2009/02/04

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

1 : Required setting (use ROMTYPE straps to
determine the ROM type)

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet

Friday, May 06, 2011
1

17

of

36

A

B

C

ODD
10U_0805_10V4Z

1

C355
@

1
C404

2

0.1U_0402_16V4Z
1

C383

2

2

2

10U_0805_10V4Z

1
C402
@

0.1U_0402_16V4Z
C397

10U_0805_10V4Z
1

E

F

G

H

JODD

+5VS_ODD

1

D

1
C401

2

2

1U_0402_6.3V4Z
15
14

Place components close to ODD CONN.

GND
GND

GND
A+
AGND
BB+
GND

1
2
3
4
5
6
7

DP
+5V
+5V
MD
GND
GND

8
9
10
11
12
13

SATA_ITX_C_DRX_P1
SATA_ITX_C_DRX_N1

USB20_N3_R

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_DTX_C_IRX_N1

<13>

SATA_DTX_C_IRX_P1

<13>

0_0402_5% 2

1

SC@
R360

USB20_N3_Q

0_0402_5% 2

1

SC@
R359

USB20_P3_Q

+5VS_ODD
USB20_P3_R

HDD

SATA_ITX_C_DRX_P1 <13>
SATA_ITX_C_DRX_N1 <13>

SATA_DTX_IRX_N1 C406 1
SATA_DTX_IRX_P1 C407 1

JHDD

<13>
<13>
<13>
<13>

SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0
C248
C249

SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0

1

+5VS_ODD

2

+5VS

PAD-OPEN 3x3m
J11
+3VS

1

+5VS_HDD

2

+3VS_HDD

PAD-OPEN 3x3m

+VSB
+5VS

J12

USB20_P3_Q
1

2

+5VS_HDD

1

1

3

+5VS

R396
470K_0402_5%
SC@

V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12

GND
GND

24
23

C-H_13-22202201CP_22P
CONN@

USB20_P3

<15>

2

4

1

PAD-OPEN 3x3m

Q214B 2N7002DW-T/R7_SOT363-6
SC@

5

2

R398 SC@
10K_0402_5%

GND
A+
AGND
BB+
GND

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

+3VS_HDD

J13
SANTA_203601-1
CONN@

SATA_DTX_IRX_N0
SATA_DTX_IRX_P0

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

1
1

1
2
3
4
5
6
7

SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

2

C445
SC@

+3VS
0.1U_0402_16V4Z

USB20_N3

2

10U_0805_10V4Z

<15>
1

2N7002DW-T/R7_SOT363-6
Q215A SC@

2

ODD_EN#

+5VS

C250
1000P_0402_50V7K

1

1
C251

2

2

1
C252

2

1
C253

1
C254

2

C255
0.1U_0402_16V4Z
2 @

2

1

1

<15>

2N7002DW-T/R7_SOT363-6
Q214A SC@

2
1

4

6

2

0.1U_0402_16V4Z

R397
1.5M_0402_5%1
SC@

1

Q215B
SC@

5

2

6

3

USB20_N3_Q

2N7002DW-T/R7_SOT363-6

1U_0603_10V4Z

10U_0805_10V4Z

2

SC@ R395
100K_0402_5%

SD,MMC,MS muti-function pin define

+VCC_3IN1

+VCC_OUT

1

MDIO
PIN Name
SP1

40mil

R229
2

0_0603_5%

1

3

1
C263

0.1U_0402_16V4Z 2

SD Card
PIN Name
SP1

MMC Card
PIN Name

MS Card
PIN Name
SP1

SP2

C265
2 0.1U_0402_16V4Z

3

SP3
SP4
SP5
SP6

+VCC_3IN1

SP7

USB20_N2
USB20_P2

2

2

C259
4.7U_0805_10V4Z

1

C261
SD_WP/MS_CLK
MS_INS#
SDDAT1
SDDAT0
MSD3

2

U11
1

REFE

2
3

DM
DP

4
5
6

3V3_IN
CARD_3V3
V18

7

XD_CD#

8
9
10
11
12

SP1
SP2
SP3
SP4
SP5

25

2

C260
0.1U_0402_16V4Z

1U_0603_10V4Z

0_0603_5%

+VCC_OUT

1

1

1 R226

1 C258 @ 100P_0402_50V8J
6.19K_0402_1%
2

+3VS_CR_VCC <15>
<15>

40mil
+3VS

2

EPAD

R225 1

4

2 0_0402_5%
2 0_0402_5%

SD_CLK/MSD2_R
SD_WP/MS_CLK_R

R222
10_0402_5%

10P_0402_50V8J

CLK_IN

24

XD_D7

23

SP14
SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6

22
21
20
19
18
16
15
14
13

1

C257
10P_0402_50V8J

2

CLK_SD_48M

SD_WP/MS_CLK_R
SDDAT1
SDDAT0
<14>

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21

MS_BS
SD_CLK/MSD2_R
SDDAT3/MSD1
MSD0

MS_BS
SDDAT2
SDDAT3/MSD1

SD_CLK/MSD2_R

SD_CMD
MSD0
SD_CLK/MSD2

MS_INS#
MSD3
SD_CMD
SD_WP/MS_CLK_R

SD_CD#
SDDAT3/MSD1

RTS5138-GR_QFN24_4X4
SDDAT2
SD_CD#

C262

1

R221
10_0402_5%

C256

17

CLK_48MR361 2
15P_0402_50V8J

1

Issued Date

SD-WP
SD-DAT1
SD-DAT0
SD-GND
MS-GND
MS-BS
SD-CLK
MS-DAT1
MS-DAT0
SD-VCC
MS-DAT2
SD-GND
MS-INS
MS-DAT3
SD-CMD
MS-SCLK
MS-VCC
SD-DAT3
MS-GND
SD-DAT2 GND1
SD-CD
GND2

SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
22
23

Compal Electronics, Inc.

Compal Secret Data
2009/02/04

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

B

C

Rev
B

4019D2

Friday, May 06, 2011

Date:

A

4

SP19

TAITW_R009-025-LR_NR

CLK_SD_48M

1

SP8

CONN@

0_0402_5%

Security Classification

2

1 R223
1 R224

2

SD_CLK/MSD2
SD_WP/MS_CLK

GPIO0

SD_CLK/MSD2
1

SD_WP/MS_CLK

JREAD

AV_PLL 20mil (+1.8V internal regulator)

D

E

F

G

Sheet

18
H

of

36

5

4

3

2

1

J2

U12 8105E@
C266 1

2 0.1U_0402_16V7K

PCIE_PTX_IRX_P2

22

HSOP

<6>

PCIE_PTX_C_IRX_N2

C267 1

2 0.1U_0402_16V7K

PCIE_PTX_IRX_N2

23

HSON

<6>
<6>

PCIE_ITX_C_PRX_P2
PCIE_ITX_C_PRX_N2

17
18

HSIP
HSIN

LED3/EEDO
LED1/EESK
LED0

31
37
40

EECS/SCL
EEDI/SDA

30
32

@
1 1

R230 1
R231 1

2 10K_0402_5%
2 10K_0402_5%

Q16 AP2301GN_SOT23-3
@
3
1

+3VALW
1

+3VALW

D

<14>
<14>

16

CLKREQB

25

PERSTB

19
20

REFCLK_P
REFCLK_N

LAN_X1

43

CKXTAL1

LAN_X2

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

CLK_PCIE_LAN
CLK_PCIE_LAN#

R235 @
1

+3V_LAN
<15,20,25>

2 0_0402_5%

PLT_RST_BUF#

10K_0402_5%
2

FCH_PCIE_WAKE#
ISOLATEB

+3VS

8111E@
R240 1
1
R236

+3V_LAN

14
2 10K_0402_5% 15
38
2
1K_0402_5%

2

ENSWREG
R252
10K_0402_5%
@

+LAN_VDDREG

1

R237
1

2.49K_0402_1%
2

LAN_CLKREQ0#

ENSWREG

34
35

VDDREG
VDDREG

46

RSET

24
49

GND
GND

13
29
41

+LAN_VDD10

DVDD33
DVDD33

27
39

+3V_LAN

AVDD33
AVDD33
AVDD33
AVDD33

12
42
47
48

+3V_LAN

EVDD10

21

+LAN_EVDD10

AVDD10
AVDD10
AVDD10
AVDD10

3
6
9
45

+LAN_VDD10

REGOUT

36

1

Pin14

NC

Pin15

NC

Pin38

1K ohm Pull-high

2

2

LAN_MDI2LAN_MDI2+

4
5
6

B

TCT1
TD1+
TD1TCT2
TD2+
TD2-

MCT1
MX1+
MX1-

24
23
22

R282

MCT2
MX2+
MX2-

21
20
19

R283

1 8111E@ 2 0_0402_5%

RJ45_MIDI3RJ45_MIDI3+

1 8111E@ 2 0_0402_5%

RJ45_MIDI2RJ45_MIDI2+

LAN_MDI1LAN_MDI1+

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

18
17
16

RJ45_MIDI1RJ45_MIDI1+

LAN_MDI0LAN_MDI0+

10
11
12

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

15
14
13

RJ45_MIDI0RJ45_MIDI0+

8

RJ45_MIDI3+

7

PR4+

RJ45_MIDI1-

6

PR2-

5

PR3-

RJ45_MIDI2+

4

PR3+

RJ45_MIDI1+

3

PR2+

RJ45_MIDI0-

2

PR1-

1

SHLD4

12

SHLD3

11

PR4-

RJ45_MIDI2-

C287 1000P_0402_50V7K
RJ45_GND
2
1
1
2
R1000
75_0402_1%

0.1U_0603_25V7K

2

1 0.1U_0402_16V4Z

C273

2

1 0.1U_0402_16V4Z

C274

2

1 0.1U_0402_16V4Z

C275

2

1 0.1U_0402_16V4Z

C386
2
8111E@

1 0.1U_0402_16V4Z

22U_0805_6.3V6M

2

+LAN_VDD10
C277
0.1U_0402_16V4Z
C

C278

2

1 0.1U_0402_16V4Z

C279

2

1 0.1U_0402_16V4Z

C282

2

1 0.1U_0402_16V4Z

C284

2

1 0.1U_0402_16V4Z

C283

2

1 0.1U_0402_16V4Z 8111E@

C290

2

1 0.1U_0402_16V4Z 8111E@

C385

2

1 0.1U_0402_16V4Z 8111E@

1

+LAN_VDD10

R244
2 1U_0402_6.3V4Z
0_0603_5%

Close to Pin 21

SHLD2

10

SHLD1

9

PR1+

1

+3V_LAN

1
C1000

2 1000P_1808_3KV7K
1

2

1

2

2

C285

R245
2
0_0603_5%

C286
0.1U_0402_16V4Z

4.7U_0603_6.3V6K

Close to Pin 34 and 35

SANTA_130451-Y

+LAN_EVDD10

1

1

B

+LAN_VDDREG

1
C291

2

2

C292
0.1U_0402_16V4Z

LANGND
1

C1001
150P_0402_50V8J

2

C1002 @
4.7U_0603_6.3V6K

2

2

3

U12

3

LANGND

For P/N and footprint
Please place them to ISPD page

D32
@

AZC199-02S.R7G C/C SOT23

D33
AZC199-02S.R7G C/C SOT23

1

R341 @
2
0_0603_5%

1

R358 @
2
0_0603_5%

A

1

1

8111E 10/100M/1000M
8111E@
T27

C272

CONN@

RJ45_MIDI3-

RJ45_GND

A

D

+LAN_VDD10

C281
33P_0402_50V8J

X'FORM_ NS892404

C289

2

Close to pin3, pin13, pin 29
and pin45.

RJ45_MIDI0+

2

2

8105E@

7
8
9

1

2

2

@
C271
4.7U_0805_10V4Z

NC

1
C280
33P_0402_50V8J

1

4.7UH_1008HC-472EJFS-A_5%_1008
2
1
1
C276

10K ohm PD

JLAN
1
2
3

L33
1

L6 must be within 200mil to
Pin36, C276, C277must be
within 200mil to L6;
+LAN_REGOUT: Width=60mil

+3V_LAN

NC

1
@C270
@
C270

+3V_LAN

+3V_LAN

Close to Pin27,39,47 and 48.

RTL8111E

Pin12

C269

47K_0402_5%

1

1

2
T27
LAN_MDI3LAN_MDI3+

1

EN_WOL#

1U_0402_6.3V4Z

0.01U_0402_25V7K

@
2

25MHZ_20PF_7A25000012

R243 @
0_0402_5%

2

R242
15K_0402_5%

@
1

LAN_X2

2

2

2

<23>

RTL8105E

Y2
LAN_X1

ENSWREG

1

ISOLATEB

R234

+LAN_REGOUT

1
R239
0_0402_5%

R238
1K_0402_1%

2
0.1U_0402_16V7K

R233 @

+LAN_REGOUT

USE SA00003PO00 footprint
06-30

+3VS
1

DVDD10
DVDD10
DVDD10

@
C268

100K_0402_5%

RTL8105E-VC-GR_QFN48_6X6

+3V_LAN

C

1
2
4
5
7
8
10
11

SMBCLK(NC)
SMBDATA(NC)
GPO/SMBALERT

33

LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-

MDIP0
MDIN0
MDIP1
MDIN1
MDIP2(NC)
MDIN2(NC)
MDIP3(NC)
MDIN3(NC)

RTL8105E/8111E

1

R232 1

LAN_CLKREQ0#

2

<15>
<14,20,22,23,25>

JUMP_43X79
2 2

2

PCIE_PTX_C_IRX_P2

<6>

Compal Secret Data

Security Classification
10/100M/1000M transformer
8111E@

2009/02/04

Issued Date

2010/02/04

Deciphered Date

Title

Compal Electronics, Inc.
SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet
1

19

of

36

5

4

3

2

1

+3V_WLAN

WLAN&BT

+3V_WLAN

2 WLAN_CLKREQ1#
10K_0402_5%

1
R246
@

R247

0_0805_5%

+3VS

+1.5VS
JWLAN
<15,19,25>

D

C736
2

R249 1

FCH_PCIE_WAKE#
<15>

<23> BT_PWR
WLAN_CLKREQ1#

<14>
<14>

CLK_PCIE_WLAN#
CLK_PCIE_WLAN

2 0_0402_5% WLAN_WAKE#

R357

1

2

33P_0402_50V8J 33_0402_5%
@
@

R253
1

2

R251

<14,19,20,22,23,25> PLT_RST_BUF#
CLK_PCI_DB
<14> CLK_PCI_DB

1

<6>
<6>

PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3

<6>
<6>

PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3

0_0402_5%

EC_TX_P80_DATA
+3V_WLAN

100K_0402_5%

<23>
<23>

+3V_WLAN

EC_TX_P80_DATA
EC_RX_P80_CLK

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

GND1

CONN@
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

D

LPC_FRAME# <14,22,23>
LPC_AD3 <14,22,23>
LPC_AD2 <14,22,23>
LPC_AD1 <14,22,23>
LPC_AD0 <14,22,23>
WL_OFF# <23>
PLT_RST_BUF#

R339 1
R340 1

2 0_0402_5%
2 0_0402_5%
USB20_N7
USB20_P7

<14,19,20,22,23,25>

SMB_FCH_CK1 <15>
SMB_FCH_DA1 <15>
<15>
<15>

+3VS

C294
+3V_WLAN

0.1U_0402_16V4Z

1

2

ACES_88910-5204

+1.5VS

1
C301
47P_0402_50V8J
@

2

1
2

0.1U_0402_16V7K

1

C300

2

C298
C299
47P_0402_50V8J
@

0.1U_0402_16V7K

1
2

1
2

4.7U_0603_6.3V6K

1

C297

2

C296

2

C295

0.1U_0402_16V7K

1

C

0.1U_0402_16V7K

C

Screw Hole
H2

H3

H4

H5

H6

H7

H8

H9

H10
H11

1

1

1

1

1

1

1

1

@

@

@

@

@

@

@

@

@

H_3P0

H_3P0

H_3P0

H_3P0

H_3P0

H_3P0

H_3P0

H_3P0

H_3P0

B

@

JWLAN
H15

1

H14

1

1

H13

1

H12

B

H_3P0X3P5N

@ H_3P0N

H16

1

CPU

1

1

1

H1

NPTH

@
H_4P5
@

H_4P5
@

H_4P5

H_4P5

@

H_3P3

@

PCB Fedical Mark PAD
FD3

1

@

FD4
A

@
1

FD1
@

1

@

1

FD2
A

2009/02/04

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet
1

20

of

36

A

B

C

D

+PVDD1

E

1

0.1U_0402_16V4Z

1

+DVDD_IO

1
C303

2

2 10U_0805_10V4Z

2

1

+1.5VS

1
0_0603_5%

0.1U_0402_16V4Z
1
C306

1
C309

R257@
2
0_0603_5%

1

1
C310
0.1U_0402_16V4Z

+3VS_DVDD

10U_0805_10V4Z

23
24

C558 @1
5
EC_MUTE#

2

IN2

P

IN1

O
3

<23>

1

4

R355 1

<15>

2 0_0402_5%

25

38
AVDD2

AVDD1

46

21
22

MIC1_L
MIC1_R

HP_OUT_L
HP_OUT_R

32
33

MIC2_L_C
MIC2_R_C

16
17

MIC2_L
MIC2_R

4
11

2 100P_0402_50V8J

MONO_IN
SENSE_A

C323 1

39

MIC1_L_C
MIC1_R_C

PD#

1

PVDD2

45
44

HDA_RST#
@
C322

DVDD_IO

SPK_OUT_R+
SPK_OUT_R-

3

2 2.2U_0603_6.3V4Z

MIC1_VREFO_L

3

12
13

2

2
10U_0805_10V4Z

PD#

Place close to chip

2
0.1U_0402_16V4Z

SENSE B

36

CBP

MIC1_R_C C317

SPKR+ <22>
SPKR- <22>
R261 1
R262 1

2 75_0402_1%
2 75_0402_1%

MIC1_L_C C318

SDATA_OUT
SDATA_IN

8

R265 1

2 33_0402_5%

HDA_SDIN0

R266 1

2 0_0402_5%

EAPD

1

2 0_0402_5%

1
C735

2

EAPD

47

SPDIFO

48

MONO_OUT

20

MIC2_VREFO

29

MIC2_VREFO

MIC1_VREFO_R
LDO_CAP

30
28

MIC1_VREFO_R

MIC2_L_C C430

<15>

HDA_BITCLK

MIC2_R_C C429

<15>

22P_0402_50V8J
HDA_SDOUT

2 4.7K_0402_5% MIC1_VREFO_R

1

2 1K_0402_1%

MIC1_R

<26>

R347 1

2 1K_0402_1%

MIC1_L

<26>

4.7U_0805_10V4Z
MIC2_L_R R350 1
1
2

2 1K_0402_1%

MIC2_R_R R351 1

2 1K_0402_1%

1

2

MIC1_L_R

R349 1

HDA_SYNC
R353

4.7U_0805_10V4Z
1
2 MIC1_R_R R346

4.7U_0805_10V4Z

HP_L <26>
HP_R <26>

5

SENSE A

18

SPKL+ <22>
SPKL- <22>

10

PCBEEP

43
42
49
7

2

6

RESET#

31

1
C316

C315

BCLK

GPIO1/DMIC_CLK

CBN

2

1

SYNC
GPIO0/DMIC_DATA

35

R259 REAL@
1
2 +5VS
0_0603_5%

R348 1

LINE2_L
LINE2_R

2

C314

2

14
15

SN74AHC1G08DCKR_SC70-5

1

10U_0805_10V4Z

40
41

PD#

C319

REAL@

SPK_OUT_L+
SPK_OUT_L-

G

HDA_RST#

2
0.1U_0402_16V4Z

U26 @

1

2 0.1U_0402_16V4Z
+5VS
0_0603_5%
1
1
@ C308
C311
@

0.1U_0402_16V4Z

U13

LINE1_L
LINE1_R

+3VS

2

PVDD1

2

DVDD

2 10U_0805_10V4Z

1

9

C312

1

1

0_0603_5%

2
10U_0805_10V4Z

+AVDD

0.1U_0402_16V4Z
1
C313

1

2

2 10U_0805_10V4Z

2

R258
2

+3VS

1
@C307
@
C307

2
2 10U_0805_10V4Z

H

@R256
@
R256

+PVDD2

R310
+3VS

G

R255
2 0.1U_0402_16V4Z
+5VS
0_0603_5%
1
1
C304
C305

1
C302

2

2

1

J1
JUMP_43X39
@

1

F

1

2

2

2 4.7K_0402_5% MIC1_VREFO_L

INT_MIC

<22>

4.7U_0805_10V4Z
<15>

R352 1

2 4.7K_0402_5% MIC2_VREFO

<15>

<23>

For P/N and footprint
Please place them to ISPD page
U13 VIA@

VREF

27

MIC1_VREFO_L

JDREF

19

R267 1 REAL@ 2 20K_0402_1%

PVSS2
PVSS1
DVSS2
DVSS1

CPVEE

34

C325 1

AVSS1
AVSS2

26
37

REAL@
1 C324

2

0.1U_0402_16V4Z

1
C326

R267 VIA@

2

2 2.2U_0603_6.3V4Z
2

S IC VT1802P QFN 48P CODEC

10U_0805_10V4Z

1

C327
2.2U_0603_6.3V4Z
3

5.1K_0402_1%

ALC259-GR_QFN48_7X7

<26>
<26>

HP_PLUG#

R269 1

2 39.2K_0402_1%

MIC_PLUG#

R268 1

2 20K_0402_1%

Sense Pin

Impredance

SENSE_A

USE SA00003QR00 footprint

Codec Signals

Function

R280

2

1 0_0603_5%

@ R286

2

1 0_0603_5%

R270

2

1 0_0603_5%

<23>

EC_BEEP#

R260 1

2 47K_0402_5%

<15>

FCH_SPK

R263 1

2 47K_0402_5%

C320

20K

Headphone out
EXT.MIC

PORT-I (PIN 21,22)

1

SENSE A
@C331
@
C331

10K

1

2

MONO_IN

2

0.1U_0402_16V4Z
1

PORT-I (PIN 32,33)

39.2K

2

R264
10K_0402_5%

0.1U_0603_50V7K

C321
0.1U_0402_16V4Z

2

1

5.1K
39.2K

4

SENSE B

4

20K
10K

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

5.1K

2009/02/04

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

A

B

C

D

E

F

Friday, May 06, 2011

G

Sheet

21
H

of

36

A

B

C

D

E

PACDN042Y3R_SOT23-3
2
1

R342
<21>

SPKL+

SPKL+

3

SPK_L+

10U_0805_10V4Z
1

2 0_0603_5%

1

D16

C332

@
2

1 @
C333
1U_0402_6.3V4Z
2

1

@1

ACES_87213-0400G
SPK_L+
SPK_LSPK_R+
SPK_R-

C334
R343
<21>

SPKL-

SPKL-

2 10U_0805_10V4Z

2 0_0603_5%

1

@

1
2
3
4

SPK_L-

1

1
2
3 GND 5
4 GND 6
JSPK CONN@

PACDN042Y3R_SOT23-3
2
1

R344
SPKR+

SPKR+

3

SPK_R+

10U_0805_10V4Z
1

2 0_0603_5%

1

D17

@

C335

@
2

1 @
C336
1U_0402_6.3V4Z
2

@1

1

<21>

C337
SPKR-

SPKR-

2 10U_0805_10V4Z

2 0_0603_5%

1

D18
PACDN042Y3R_SOT23-3
@

SPK_R2

<21>

<21>

2

3

R345

INT_MIC

JMIC1
1
2

1
2

3
4

GND
GND

2

ACES_88231-02001
CONN@

TPM 1.2

+3VS

C437
0.1U_0402_16V4Z
IN_TPM@

5

28
9
8

XTALO
XTALI
TPM
SLB 9635 TT 1.1
LCLK
LFRAME#
GPIO2
LRESET#
GPIO
SERIRQ
CLKRUN#
PP
NC
NC
NC

14
13

TPM_PD#_R
TPM_TEST1
TPM_XTALO
TPM_XTALI

R374 1
@
R373 1

0_0402_5%
2

+3VS

2 0_0402_5%
IN_TPM@

TPM_XTALI
1

2 R376
4.7K_0402_5%

+3VS

IN_TPM@

@
2
6

4

OSC
OSC

NC

2

NC

3

IN_TPM@

32.768KHZ_12.5PF_Q13MC14610002

C433
IN_TPM@
15P_0402_50V8J

1
3
12

+3VS

R241 @
100K_0402_5%
1
2

Q15@
2N7002W-T/R7_SOT323-3

1

1
3

2

S

Q17@
2N7002W-T/R7_SOT323-3

2
G

FCH_PWROK

1

<15,35>

3

2

2
G
D

TPM_PD#

D

D

3

SLB-9635-TT-1.2_TSSOP28
IN_TPM@

R378
@ 10_0402_5%

1

X4
1

TPM_XTALO

CLK_PCI_TPM

4

3

C425
IN_TPM@
15P_0402_50V8J

TPM_PD#

1

2
1

21
22
16
27
15
7

0 = 02Eh
* 1 = 04Eh

R375

CLK_PCI_TPM
<14> CLK_PCI_TPM
LPC_FRAME#
<14,20,23> LPC_FRAME#
PLT_RST_BUF#
<14,19,20,23,25> PLT_RST_BUF#
SERIRQ
<14,23> SERIRQ
PM_CLKRUN#
<14,22> PM_CLKRUN#
1
2
+3VS
R370
4.7K_0402_5%
IN_TPM@
R372
0_0402_5%
@

LPCPD#
TESTB1/BADD
TEST1

LAD0
LAD1
LAD2
LAD3

2

C438
1U_0402_6.3V4Z
IN_TPM@

2
1
4.7K_0402_5%

26
23
20
17

2

Base I/O Address

close pin 10

IN_TPM@
R371 1
2 10K_0402_5%

GND
GND
GND
GND

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

4
11
18
25

<14,20,23>
<14,20,23>
<14,20,23>
<14,20,23>

1

VSB

VDD
VDD
VDD

24
19
10

U17
3

1

IN_TPM@
R377
10M_0402_5%
2
1

close pin 24

+3VALW
+3VS

S

S

Q23@
2N7002W-T/R7_SOT323-3

2
G

C398
@ 15P_0402_50V8J

<14,22>

PM_CLKRUN#

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/05/06

Issued Date

4

Title

Deciphered Date

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

Document Number

Rev
B

4019D2
Sheet

Friday, May 06, 2011
E

22

of

36

5

4

3

2

1

Board ID / SKU ID Table for AD channel
+EC_AVCC
FBM-11-160808-601-T_0603
1
2
L40

2

C342

C350
2
1

1
R275
22P_0402_50V8J
<14>

2
1
D20
@
RB751V-40_SOD323-2

2
0_0402_5%

<15>
<14,22>
<14,20,22>
<14,20,22>
<14,20,22>
<14,20,22>
<14,20,22>

GATEA20

GATEA20

SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_EC

CLK_PCI_EC
+3VALW

<14,19,20,22,25>

R276 1
2
47K_0402_5%
C351
0.1U_0402_16V4Z

PLT_RST_BUF#

<15>

1

EC_RST#
EC_SCI#

EC_SCI#

2
<24>
<17,24>

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

KSO[0..15]

KSO[0..15]

KSI[0..7]

KSI[0..7]

C

+3VALW

1
+3VALW

1

1
R287
1
R288

KSO1
2
47K_0402_5%
KSO2
2
47K_0402_5%

R284
R285

EC_SMB_CK1
2.2K_0402_5%
EC_SMB_DA1
2
2.2K_0402_5%
2

+3VS
1
R289
1
R290

EC_SMB_CK2
2.2K_0402_5%
EC_SMB_DA2
2
2.2K_0402_5%
1
C356
@
100P_0402_50V8J
2
2

1

2

C357
@
100P_0402_50V8J

<28>
<28>
<5>
<5>

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

1
2
3
4
5
7
8
10
12
13
37
20
38

GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC

EC_BEEP#

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

77
78
79
80

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

EC_BEEP#
ACOFF
C352 1
2
0.01U_0402_16V7K

BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43

63
64
65
66
75
76

DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F

68
70
71
72

EN_FAN1
IREF
CHGVADJ

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F

83
84
85
86
87
88

EC_MUTE#
USB2_ON
BT_PWR
APU_PROCHOT_EC
TP_CLK
TP_DATA

DA Output
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

8.2K_5%

0.216V

0.250V

0.289V

18K_5%

0.436V

0.503V

0.538V

3
4

33K_5%

0.712V

0.819V

56K_5%

1.036V

1.185V

0.875V
1.264V

5

100K_5%

1.453V

1.650V

1.759V

6

200K_5%

2.200V

2.341V

7

NC

1.935V
2.500V

3.300V

3.300V

ECAGND
21
23
26
27

PWM Output

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

1
2

1

67
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13

AD

0

PS2 Interface

SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0

97
98
99
109

ADP_I

<21>

VAD_BRD min VAD_BRD typ VAD_BRD max
0V
0V
0V

ADP_I

<29>
BATT_TEMP <28>
<29>

+3VALW

MB_ID

MB_ID
C353
@

EC_MUTE# <21>
USB2_ON <26>
BT_PWR <20>
APU_PROCHOT_EC#
TP_CLK <24>
TP_DATA <24>

1

2

<5>

R279
33K_0402_5%

Rb

VGATE <15,35>
EN_WOL# <19>
+1.1VS_ON <27>

SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#

119
120
126
128

FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#

CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59

73
74
89
90
91
92
93
95
121
127

FSTCHG
BATT_FULL_LED#
CAPS_LED#
CHARGE_LOW_LED#
PWR_ON_LED#
SYSON
VR_ON_EC
ACIN_D

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11

100
101
102
103
104
105
106
107
108

PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

110
112
114
115
116
117
118

V18R

124

GPIO
SM Bus

FRD#SPI_SO

<24>

FSTCHG <29>
BATT_FULL_LED# <26>
CAPS_LED# <26>
CHARGE_LOW_LED# <26>
PWR_ON_LED# <24,26>
SYSON <25,32>
VR_ON_EC <35>
+3VALW

SUSCLK

R326

XCLKI
2 XCLKO
0_0402_5%

1

122
123

<24>

SPI_SI

SPI_CS#

1
R297
SPI_CLK_R
1
R298
SPI_SI
1
R300

FSEL#SPICS#
2
0_0402_5%
SPI_CLK
2
0_0402_5%
FWR#SPI_SI
2
0_0402_5%

KB926QFD3 LQFP 128P

EC_FCH_PWROK
BKOFF#

EC_ENBKL

2
C363

4.7U_0805_10V4Z 1

2

1

<15>

R299
XCLKO 1
2 XCLKI
20M_0603_5%
@

R291 1

2 4.7K_0402_5%

TP_DATA R292 1

2 4.7K_0402_5%

SUSP#

C358
@ 1
2 100P_0402_50V8J

BATT_TEMP

C359
@ 1
2 100P_0402_50V8J

FSTCHG

C360
@ 1
2 100P_0402_50V8J

EC_ENBKL

C362
@ 1
2 100P_0402_50V8J

1

1

<20>

R296
100K_0402_5%
@

B

150K_0402_5%
2
D23

ACIN_D

2

1

<29>

SUSP# <17,25,27,31,34>
PBTN_OUT# <15>

LID SWITCH
+3VALW

@
C364

1 0.1U_0402_16V4Z

Signal

L41
2

EC_REV

2

KB926 D3 KB926 E0

1

1

EC_REV_SEL

1

0

VDD

VOUT

LID_SW#

3

1

C439
0.1U_0402_16V4Z

2

C440
0.1U_0402_16V4Z

OSC
NC

1

OSC
NC

2

A

Compal Secret Data

Security Classification
2009/02/04

Issued Date

Deciphered Date

2010/02/04

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Friday, May 06, 2011
Date:

SCHEMATIC MB A7491
Rev
B

4019D2

X2@

Sheet

32.768KHZ_12.5PF_9H03200413
5

ACIN

RB751V-40_SOD323-2

C367 @
27P_0402_50V8J

2

3

2

C

C365
1
2 100P_0402_50V8J

1
4

1

TP_CLK

ACIN_D

2

@ C366
27P_0402_50V8J

2 100K_0402_5%

U24
APX9132ATI-TRL_SOT23-3

FBM-11-160808-601-T_0603

A

+3VALW

R118 1

R1555

EC_ENBKL <12>
EAPD <21>

SUSP#
PBTN_OUT#

3

R293
100K_0402_5%

+3VALW
WL_OFF#

2

PreMP
LID_SW#

2

EC_FCH_PWROK
BKOFF# <12>

EC_REV_SEL
WL_OFF#

1

PVT

1

SPI_CLK_R

ECAGND

SPI_CS#

<24>

EC_RSMRST# <15>
EC_LID_OUT# <15>
EC_ON <17,24,30>

2

<24>

R330
100K_0402_5%

GPI

XCLK1
XCLK0

1

<14>

EC_TX_P80_DATA
EC_RX_P80_CLK
ON/OFF_BTN#

EC_TX_P80_DATA
EC_RX_P80_CLK
ON/OFF_BTN#

EC_RSMRST#
EC_LID_OUT#
EC_ON

0

DVT

2

<20>
<20>
<24>

AGND

EC_INVT_PWM
FAN_SPEED1

69

WL_BT_LED#

<12> EC_INVT_PWM
<5> FAN_SPEED1

GND
GND
GND
GND
GND

<26>

B

WL_BT_LED#

11
24
35
94
113

FCH_SLP_S3#
FCH_SLP_S5#
EC_SMI#

<15> FCH_SLP_S3#
<15> FCH_SLP_S5#
<15> EC_SMI#

EVT

+5VS

SPI Device Interface
SPI Flash ROM

MB_ID

R278
100K_0402_5%

Ra
EN_FAN1 <5>
IREF <29>
CHGVADJ <29>

EN_WOL#
+1.1VS_ON
LID_SW#

D

ECAGND

GND

KB_RST#

KB_RST#

Rb / Rd

0

1

<15>

2
0_0402_5%

Board ID

3.3V

2

1
R277

2

VCC
VCC
VCC
VCC
VCC
VCC

U14

0.1U_0402_16V4Z

100K_5%

AVCC

2

1

9
22
33
96
111
125

2

1

C347
1000P_0402_50V7K

2

1

C346
1000P_0402_50V7K

2

1

C349
0.1U_0402_16V4Z

2

1

C345
0.1U_0402_16V4Z

D

C344
0.1U_0402_16V4Z

C348
0.1U_0402_16V4Z

1

Vcc
Ra

1

0_0805_5%

2

+EC_DVCC

R354

0.1U_0402_16V4Z

+3VALW

4

3

2

1

23

of

36

4

3

KSI[0..7]

INT_KBD Conn.

KSI[0..7]

KSO[0..15]

2

1

<17,23>

KSO[0..15]

<23>

C414
1

1
1
1
1

2
2
2
2

KSO6
KSO3
KSO12
KSO13

C369
C371
C373
C375

1
1
1
1

2
2
2
2

100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
7
8

KSI6
KSI0
KSI1
KSO9

C376
C378
C380
C384

1
1
1
1

2
2
2
2

100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J

1
1
1
1

2
2
2
2

100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J

KSI4
KSO5
KSO1
KSI7

@

C396
1
2 100P_0402_50V8J

C377
C379
C381
C382

1
1
1
1

2
2
2
2

100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J

1
1
1
1

2
2
2
2

100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J

LEFT_BTN#
RIGHT_BTN#

1
2
3
4
5
6

TP_CLK <23>
TP_DATA <23>

LEFT_BTN#
RIGHT_BTN#

1

1

@

2

ACES_85201-0605N
CONN@

2

3

100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J

TP_DATA

D19
PJDLC05C_SOT23-3

@

D

1

C368
C370
C372
C374

C391
1
2 100P_0402_50V8J

C424
100P_0402_50V8J
TP_CLK

C388
C390
C393
C395

LEFT_BTN#

3

SW1
SMT1-05-A_4P
1

4

2

RIGHT_BTN#

3

SW2
SMT1-05-A_4P
1

4

2

2

KSO14
KSO11
KSO10
KSO15

D21
PJDLC05C_SOT23-3

1

5
6

C387
C389
C392
C394

3

TP_DATA
KSO2
KSO4
KSO7
KSO8

5
6

27
28

KSI3
KSI2
KSO0
KSI5

1
2
3
4
5
6
GND
GND

C415
100P_0402_50V8J

D

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

@

2

0.1U_0402_16V4Z

JTP
JKB CONN@
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
GND 25 25
GND 26 26

TP_CLK
+5VS

2

5

ACES_88514-02601-071

C

C

Power BTN Board Conn
JPWR

EC ROM
SPI_CLK_R
1
0_0402_5%

2

@
R304

2 C400 @
22P_0402_50V8J

1

7
8

+3VALW

1
2
3
4
5
6
GND
GND

1
2
3
4
5
6

+5VALW
PWR_ON_LED#

<23,26>

ON/OFFBTN#

ACES_85201-0605N
CONN@

1

1M-Bit
2

U15
8
7
6
5

+3VALW
SPI_CLK_R
SPI_SI

SPI_CLK_R <23>
SPI_SI <23>

MX25L1005AMC-12G_SO8

TOP SIDE

1

100K_0402_5%

2

0_0603_5%

D31

BOT SIDE

2

ON/OFFBTN#

R322 @
1

B

R308

R311 @

ON/OFF_BTN#

ON/OFF_BTN#

1
3

2

51_ON#

<23>

<28>

BAV70W_SOT323-3

0_0603_5%
Q19
2N7002W-T/R7_SOT323-3
EC_ON

EC_ON

D

S

2
G
2

<17,23,30>

1

VCC
HOLD#
SCLK
SI

2
C708
@
1000P_0402_50V7K
1

D30 @
RLZ20A_LL34
2

CS#
SO
WP#
GND

2

B

1
2
3
4

1

1

1

SPI_CS#
2SPI_SO
R303
0_0402_5%

SPI_CS#
FRD#SPI_SO

3

<23>
<23>

C399
0.1U_0402_16V4Z

1

R309
10K_0402_5%

A

A

2009/02/04

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

5

4

3

2

Sheet

Friday, May 06, 2011
1

24

of

36

5

4

+1.5V to +1.05V Transfer

2

1 RU1
2
4.7K_0402_5%

+5VALW

UU1

+3V

8

USB3.0@

Close to U102.D7

3
4
2

2

EN

1

RU2
10K_0402_1%

GND

Close to U102.P13

+3VA

1

2

Vout=0.8(1+10K/32.4K)
1.042 ~ 1.0469 ~ 1.0519V
Spec: 0.9975 ~ 1.05
~ 1.1025

+3VA

1

USB3.0@
RU3
32.4K_0402_1%
USB3.0@

APL5930KAI-TRG_SO8

D

+1.05V

1A

VIN
VOUT
VIN
VOUT
VCNTL
POK
FB

CU9 USB3.0@
10U_0603_6.3V6M

USB30_POK

5
9
6
7

1

USB30_POK

USB3.0@

+1.5V

2

2

8P_0402_50V8D
CU5
1 @

1
1
0.1U_0402_16V7K
CU3
USB3.0@
2
CU4 2
0.01U_0402_25V7K
USB3.0@

2

8P_0402_50V8D
CU8
1 @

1
1
0.1U_0402_16V7K
CU6
USB3.0@
2
CU7 2
0.01U_0402_25V7K
USB3.0@

PJDLC05_SOT23-3

2

+3VALW

3

USB20_R_P0

2

1

R305
R306

USB20_N0
USB20_P0

+3VS

Follow Vendor recommend.

+3VALW

1

+3VA

USB3.0@
LU4
1
2
BLM18AG601SN1D_2P

C

USB3.0@
CU18
10U_0805_6.3V6K

+3VS

PCIE_PRX_C_USB30TX_P4
PCIE_PRX_C_USB30TX_N4

<6>
<6>

PCIE_PTX_C_USB30RX_P4
PCIE_PTX_C_USB30RX_N4

USB3.0@
CU16 2
CU17 2
USB3.0@

<14,19,20,22,23> PLT_RST_BUF#
<15,19,20> FCH_PCIE_WAKE#
<15> USB30_CLKREQ2#

2

3

+3V

<15>
USB3.0@
USB3.0@

USB30_SMI#

+3V

1SS355TE-17_SOD323-2
1 1 2 2
DU3
USB3.0@

For UPD720200:
SMI high active

D

1

QU3
@

PETXP
PETXN

F2
F1

PERXP
PERXN

1

2
@
2 USB30_SMI_R
RU24
0_0402_5%

2
1
G
S 2N7002_SOT23-3
@
1
2 USB30_SMI#_R
RU25
0_0402_5%

SPI_CLK_USB
SPI_CS_USB#
SPI_SI_USB
SPI_SO_USB

H2
K1
K2

PERSTB
PEWAKEB
PECREQB

J2
J1
H1
P4

AUXDET
PSEL
SMI
SMIB

P5

PONRSTB

M2
N2
N1
M1
K13
K14
J13

SPISCK
SPISCB
SPISI
SPISO
GND
GND
GND

USB3.0@USB3.0@

C14

D7

U3TXDP2

B6

U3TXDN2
U2DM2

A6
N8

U2DP2
U3RXDP2

P8
B8

U3RXDN2

A8

N14
M14

1

15P_0402_50V8J

@

P6

CU34
USB3.0@
CT6
USB3.0@
15P_0402_50V8J

RU331
2
0_0402_5%

24MHZ_12PF_X5H024000DC1H

USB3.0@

OCL2#
USB30_OCL1#

PPON2
PPON1

H14
J14

USB30PWRON

U3TXDP1

B10

U3TXDN1
U2DM1

A10
N10

U2DP1
U3RXDP1

P10
B12

U2D_DP1_R
U3RXDP1_R

U3RXDN1

A12

U3RXDN1_R

RU20 USB3.0@
2 10K_0402_5% +3V
2 10K_0402_5% +3V
RU21 USB3.0@
OCL1#
2
1
DU4
RB751V-40_SOD323-2
1
1

USB3.0@

RU47

U3TXDP1

RU48

3

PAD T12

1

2

2

4

1 0.1U_0402_16V4Z
1 0.1U_0402_16V4Z

WCM-2012-121T_0805
@
1
2 0_0402_5% U2DN2_L

1

@

PAD T14

U3RXDP2_R_L

2 0_0402_5%

PAD T19

WCM-2012-121T_0805
4
3 3
1
2 2
LU6 USB3.0@
@
1
2 0_0402_5% U3RXDN2_R_L

C

PAD T21

@ 2 0_0402_5% U3TXDP2_L

1

PAD T22

LU7 USB3.0@
1

U3TXDP1
U3TXDN1

RU49

U3TXDN1

1

2

2

4

3

3

WCM-2012-121T_0805
@
1
2 0_0402_5% U3TXDN2_L

PAD T23

JUSB2 CONN@

RREF
U2AVSS

USB3.0@
RU26
P12
N12

U2PVSS

N11

U3AVSS

D6

+USB_VCCB

1
2
3
4
5
6
7
8

USB20_R_N0
USB20_R_P0

2 1.6K_0402_1%

1

1
2
3
4
GND
GND
GND
GND
ACON_UAR4E-4K1920

CSEL

CSEL=0：24MHz XTAL
CSEL=1：48MHz Clock

+5VALW
B

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

P14
P11
P9
P7
P2
P1
N13
N9
N7
N3
M13
M12
M11
M10
M9
M8
M7
M6
M5
M4
M3
L12
L11
L7
L6

DU5
U3RXDN2_R_L
U3RXDP2_R_L
U3TXDN2_L
U3TXDP2_L

VCC
HOLD#
SCK
SI

8
7
6
5

CU37 USB3.0@
USB3.0@
1
2 0.1U_0402_16V7K
1 RU40
210K_0402_5%
SPI_CLK_USB
1 RU41
20_0402_5%
SPI_SI_USB
USB3.0@

RR+
TT+

VCC
GND
DD+

8
7
6
5

U2DN2_L
U2DP2_L

+USB_VCCB
C175
1

C427

2.5A

1

+5VALW

@
U16

W=60mils
C403 1

2

<26>

USB2_ON#

1
2
3
4

W=60mils

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

8
7
6
5

AP2301SG-13 SO

OC#
2

1
1 @
RU23
1
RU27

1

1000P_0402_50V7K

2
0.1U_0402_16V7K

2
150U_D2_6.3VY_R15M

C1003
2

RU43 1

USB30@
2 0_0402_5% OCL1#

R76

2 0_0402_5%

1

USB_OC#0

<15>

C164 @
4.7U_0805_10V4Z

2
0_0402_5%
2
0_0402_5%

1 RU39
2
0_0402_5%
@

35mA

1
2
3
4

LXES4XBAA6-027_MSOP8
@

C12
C13
D3
D4
D11
D12
D13
D14
E1
E2
E13
E14
F4
F6
F7
F8
F9
F11
F12
G1
G2
G6
G7
G8
G9
G11
G12
G13
H6
H7
H8
H9
H12
J3
J4
J6
J7
J8
J9
J11
J12
K3
K4
L1
L2
L3
L4
2

3

must to close to JUSB30

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

A1
A2
A3
A4
A5
A7
A9
A11
A13
A14
B3
B4
B5
B7
B9
B11
B13
B14
C1
C2
C3
C10
C11

1

CS#
SO
WP#
GND

2 0_0402_5% U2DP2_L

@

XT1
XT2

SPI_CLK_USB

2

1

RU38
10K_0402_5%
USB3.0@

1
2
3
4

RU46

USB3.0@
USB3.0@
U3TX_C_DP1 CU19
2
USB3.0@
U3TX_C_DN1 CU20
2
U2D_DN1_R

USB30PWRON

SPI_CS_USB#
SPI_SO_USB

U3RXDP1_R

1

G14
H13

UPD720200AF1-DAP-SSA-A

UU5

RU45

U3RXDN1_R

+3V

RU37
47K_0402_5%
USB3.0@

U2D_DN1_R

4

OCI2B
OCI1B

GND

2

USB3.0@
YU1
1
2

Place as close as possibile to
UU2.N14 and UU2.M14

A

1

4

1
RU30 USB3.0@
100_0402_5%

USB3.0@

1

2

2

2

RU34
0_0402_5%

USB3.0@

1

1

CU33 0.01U_0402_25V7K

1

2

CU32 0.1U_0402_16V7K

1

2

CU31 0.01U_0402_25V7K

2

CLK_48M_USB

USB3.0@

CU30 0.01U_0402_25V7K

0.01U_0402_25V7K

1

CU29 0.01U_0402_25V7K

CT5

2

USB3.0@
B

P13

H11
K11
K12
L8
VDD10
VDD10
VDD10
VDD10

E11
E12

H3
H4
L5
VDD10
VDD10
VDD10

VDD10
VDD10

E3
E4

+1.05V:800mA

VDD10
VDD10

C8
C9
D8
D9
VDD10
VDD10
VDD10
VDD10

C4
C5
C6
C7
D5
VDD10
VDD10
VDD10
VDD10
VDD10

N4
N5
N6
P3
VDD33
VDD33
VDD33
VDD33

L9
L10

L13
L14
VDD33
VDD33

VDD33
VDD33

+3V:200mA

+3V
USB3.0@

RU44

1

U2AVDD10

D2
D1

U3AVDO33

PECLKP
PECLKN

3

1

2

USB30_SMI#

UPD720200A:
SMIB Low active

CT4 USB3.0@
1U_0603_10V6K

1

2

USB3.0@
CU27 0.01U_0402_25V7K

2

CU26 0.01U_0402_25V7K

2

CU25 0.01U_0402_25V7K

1

1

0.1U_0402_16V7K

USB3.0@

1

2

CT3

2

2

CU24 0.01U_0402_25V7K

1

CU23 0.01U_0402_25V7K

1

CU22 0.1U_0402_16V7K

0.1U_0402_16V7K

2

CU21 0.01U_0402_25V7K

CT2
USB3.0@

2

USB3.0@

1

+1.05V

1

VDD33
VDD33
VDD33

1
2 USB30_WAKE#
RU19
0_0402_5%
USB3.0@ RU15
USB3.0@RU15
1
2 10K_0402_5%
RU16
@1
2 100_0402_1%
USB3.0@RU17
USB3.0@
RU17
1
2 10K_0402_5%
+3V
USB30_SMI_R
USB3.0@
0_0402_5% 1 RU18
2 USB30_SMI#_R
USB3.0@
RU22 1
2 10K_0402_5%
USB3.0@

@

USB3.0@

1 0.1U_0402_16V7K PCIE_PRX_USBTX_P4
1 0.1U_0402_16V7K PCIE_PRX_USBTX_N4

B2
B1

F3
G3
G4

UU2

1

2 USB30_CLKREQ2#
10K_0402_5%

1
R387

<6>
<6>

3

3

USB3.0@
+3V

0.1U_0402_16V7K

+3V

CLK_PCIE_USB30
CLK_PCIE_USB30#

4
L42 USB30@

LU5 USB3.0@

+3V & +1.05V has power sequence timing:
0.1*VDD(+3V) ~ 0.9*VDD(+1.05V) < 100ms
<14>
<14>

WCM2012F2SF-121T04_0805
1
2 2

4

VDD33
VDD33
VDD33

2
G
QU2
USB3.0@

1

1

1 0_0402_5%

U2D_DP1_R
QU1
AO3413_SOT23
USB3.0@

USB20_R_N0
USB20_R_P0

2 0_0402_5%
2 0_0402_5%

+3VA

D10
F13
F14

@

2

1
2
2
RU10 47K_0402_5%
2
USB3.0@
CU12
0.01U_0402_25V7K
USB3.0@
1
S 2N7002_SOT23-3
D

+1.05V

@

1
1

2

1
RU29

3

SUSP#

1 0_0402_5%

G

<17,23,27,31,34>

USB3.0@
RU28
2

D

SYSON

S

<23,32>

+3V

USB3.0@
CU11
0.1U_0402_16V4Z @ JP2
PAD-OPEN 2x2m
1

2

4
2
RU8
USB3.0@
100K_0402_5%
CU10
0.1U_0402_16V7K
1

USB3.0@

D

D27

<15>
<15>

+3VALW to +3V Transfer

USB20_R_N0

+

1

+5VALW

CU1 USB3.0@
10U_0603_6.3V6M

USB3.0@

2

CU2
1U_0603_10V6K

1

+1.5V

1

+5VALW

3

A

2

Close to UU2.6
1

CU38
0.1U_0402_16V7K
@

AT25F512AN-10SU-2.7_SO8~D
USB3.0@

Compal Secret Data

Security Classification
Issued Date

2010/05/27

Deciphered Date

2011/03/04

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Compal Electronics, Inc.
SCHEMATIC MB A7491
Document Number

Rev
B

4019D2
Friday, May 06, 2011

Sheet
1

25

of

36

A

B

C

D

E

1

1

USB/B Conn

<15>
<15>

R391
R392

USB20_N9
USB20_P9

2

2 0_0402_5%
2 0_0402_5%

1
1

USB20_R_N9
USB20_R_P9

Power on LED

LEDs

L43 USB20@
1

1

2

2

2

4

4

3

3

D35

300_0402_5%
1
2
R778

+5VALW

PWR_ON_LED#

2
1
3
HT-110NBQA_BULE_1204

PWR_ON_LED#

<23,24>

WCM2012F2SF-121T04_0805

JUSB

80mils
USB20_R_N9
USB20_R_P9
USB20_R_N8
USB20_R_P8

<21>
<21>

3

HP_L
HP_R

<21> MIC1_L
<21> MIC1_R
<21> HP_PLUG#
<21> MIC_PLUG#

MIC1_L
MIC1_R
HP_PLUG#
MIC_PLUG#

G
G
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

<15>
<15>

R393
R394

USB20_N8
USB20_P8

2 0_0402_5%
2 0_0402_5%

1
1

WL&BT LED

USB20_R_N8
USB20_R_P8

1
4

1

2

2

4

3

3

D24

220_0402_5%
1
2
R780

+5VS

L44 USB20@

2

1

WL_BT_LED#

<23>

HT-110UD_1204

WCM2012F2SF-121T04_0805

SATA_LED#

SATA_LED#

<13>

2

22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

@

HDD LED
+5VS

R382
2
1
10K_0402_5%

+3VS

220_0402_5%
1
2
R383

ACES_85201-2005N
CONN@

D25
2
1
3
HT-110NBQA_BULE_1204

Q213A

@

@

2N7002DW-T/R7_SOT363-6
1

6
5

+USB_VCCA

3

3

4
Q213B 2N7002DW-T/R7_SOT363-6
R379 1

2 0_0402_5%

+USB_VCCA
+5VALW

U19

1

1
2
3
4

8
7
6
5

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

AP2301SG-13 SO
R77
0_0402_5%

USB2_ON#

1

4

1
3

<23>

S

2
G

USB2_ON

+5VS

Q18

<15>

2

BLUE

CHARGE_LOW_LED#

<23>

1
R384

2
220_0402_5%

BATT_FULL_LED#

<23>

1
R380

2
220_0402_5%

2

1

CAPS_LED#

CAPS_LED#

<23>

4

D34
LED 19-213A/T1D-CP2Q2HY/3T 0603 WHITE

4.7U_0805_10V4Z

2N7002W-T/R7_SOT323-3

Compal Electronics, Inc.

Compal Secret Data
2009/02/04

Issued Date
USB2_ON#

2

2
220_0402_5%

CAP LOCK LED

2

Security Classification
@
C405

NB

1
R381

2

C163

USB_OC#7
D

AMB

HT-210UD/NB_AMB/BLUE

10K_0402_5%
@

<25>

3

1

R307

UD

1

+5VALW

2

2

0.1U_0402_16V7K

80 mils
C432 1

D26

BATT LED

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 100P_0402_50V8J

Rev
B

4019D2

Date:

A

B

C

D

Friday, May 06, 2011

Sheet
E

26

of

36

B

C

E

+3VALW TO +3VS

+1.5V TO +1.5VS
+1.5V

2

Q4B
SUSP
2
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6

2

C420
1.5V@

2

2

R320
820K_0402_5%
1.5V@

1

1.5V@
2 R315
1
+VSB
100K_0402_5%

3 1

1U_0402_6.3V4Z
+1.5VS_GATE
1

1.5V@
R314
470_0603_5%

2

1

2

6

C421
1.5V@

C413

Q8A 1.5V@
SUSP
2
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6

Q8B
1.5V@
4

Q4A

1

1.5V@

1.5V@

1
2
3
4

0.1U_0603_25V7K

R319

1 R317
2
+VSB
220K_0402_5%

3 1

C419

S
S
S
G

AO4468_SO8

6

1

D
D
D
D

1

1

1U_0402_6.3V4Z
+3VS_GATE

R313
470_0603_5%
4.7U_0805_10V4Z

2

8
7
6
5

C412

4

C418

2

1

2
Q5B

1

Q22 1.5V@

1
4.7U_0805_10V4Z
2

2

AO4468_SO8

Q5A
SUSP
2
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6

S
S
S
G

C411

1

2

1 R316
2
+VSB
220K_0402_5%

D
D
D
D

C410
1
2
3
4

4.7U_0805_10V4Z

1

2

1
C417

R312
470_0603_5%
4.7U_0805_10V4Z

2

1

+5VS_GATE
R318

2

4

C416

2

1

0.01U_0402_25V7K

4.7U_0805_10V4Z

AO4468_SO8

2

+1.5VS

+3VS

Q21
8
7
6
5

3 1

1U_0402_6.3V4Z

1

S
S
S
G

820K_0402_5%

1

D
D
D
D

C408
1
2
3
4

4.7U_0805_10V4Z
1
C409

1

6

Q20
8
7
6
5

+3VALW

820K_0402_5%

+5VS

0.022U_0402_25V7K

+5VALW

1

+5VALW TO +5VS

D

2

A

+1.1VALW TO +1.1VS
+1.1VALW

+1.1VS

+5VALW

+5VALW

U18

1

R321

R356 @
100K_0402_5%

R323
100K_0402_5%
1

1

470_0603_5%
+1.1VS_ON#

SUSP

SUSP

<34>

6

2
1U_0603_10V4Z

2

2
C422

4

IRF8113PBF_SO8

2

1
2
3

1

8
7
6
5

2

1

1
<17,23,25,31,34>

D

3

2N7002DW-T/R7_SOT363-6

Q29 @
S 2N7002W-T/R7_SOT323-3

Q30
S 2N7002W-T/R7_SOT323-3

2
G

SUSP#
1

C423

1

2
1

D

2
G

@R362
@
R362

R327

10K_0402_5%

10K_0402_5%

0.1U_0603_25V7K
2

2
4

+1.1VSON
+1.1VSON#

2

Q6B
+1.1VSON# 5
2N7002DW-T/R7_SOT363-6

R325
820K_0402_5%

1

+1.1VS_GATE
3

1 R324
2
220K_0402_5%

1

2

Q6A
+VSB

3

2

DISCHARGE

3

3

@R250
@
R250 2

5

R332
470_0603_5%

1

1

D

1

D

4

B

2

+1.1VS_ON

<23>

A

1

+1.8VS_PG

<31>

Y

2
G

Q24

SUSP

2
G

Q26

SUSP

3

S

3

S

2N7002W-T/R7_SOT323-3

NC7SZ08P5X_NL_SC70-5
U23 @

2N7002W-T/R7_SOT323-3

2
G

Q27

SUSP

@

1
R328

2
0_0402_5%

S

3

D

1

3

1
1

+1.1VSON

P

R331
470_0603_5%

G

R329
470_0603_5%

+3VS
@
C361 0.1U_0402_16V7K
1
2

2

+1.8VS

2

+0.75VS

2

+1.0VS

1 0_0402_5%

2N7002W-T/R7_SOT323-3

+1.1VSON#
1
@R295
@
R295

+1.1VS_ON#
2
0_0402_5%

+1.1VSON#

2
0_0402_5%

1
R301

SUSP

4

4

2009/02/04

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/02/04

Deciphered Date

Title

SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

A

B

C

D

Friday, May 06, 2011

Sheet
E

27

of

36

A

B

C

PL1
HCB2012KF-121T50_0805
1
2

1
2

X7R type

PU1
VCC TMSNS1

8

2

GND RHYST1

7

3

OT1 TMSNS2

6

OT2 RHYST2

5

1

OTP_N_001
OTP_N_002

2

1
PR2

9.53K_0402_1%

4

G718TM1U_SOT23-8

PH1
100K_0402_1%_NCP15WF104F03RC
2

OTP_N_003

1

1

PR1
21K_0402_1%

1
PC5
0.1U_0603_16V7K

2

1

PC4
100P_0402_50V8J

2

1
2

1

VL
PC3
1000P_0402_50V7K

@ SINGA_4TRJWT-R2513

PC2
100P_0402_50V8J

4
3
2
1

2

4
3
2
1

2

1

PC1
1000P_0402_50V7K

PJPDC1

1

PH1 under CPU botten side :
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

VIN

PL2
HCB2012KF-121T50_0805
1
2

ADPIN

D

2

1

EN0

<29>

VS_ON

<29>

PR3 @ 0_0402_5%

need confirm: ME give us battery
connector P/N is DC040006H00

2
BATT_1

PL3
HCB2012KF-121T50_0805
1
2

PJP1

If EC use 3VL and can not detect VGATE,
must connect EN0

0_0402_5%

VMB
PL4
HCB2012KF-121T50_0805
1
2

GND

Install when EC use +3VL
and SUSP was Pull high to +3VL.

BATT+

@PR6
@
PR6

2

2

2

1

1

VL

1

PR16
0_0402_5%
2VSB_N_002 2
G

2

3

S

1
2

3

Reserve when EC use +3VL.
Install when EC use +3VALW.

2

VIN

D

PQ1
TP0610K-T1-E3_SOT23-3

VSB_N_001

PQ2
SSM3K7002FU_SC70-3

PC10
0.1U_0402_16V7K

1
1

<29,32> POK

1VSB_N_003

PR13
100K_0402_1%

EC_SMB_CK1 <23>

PR12
22K_0402_1%
1
2

3

2

EC_SMB_DA1 <23>

1

2
1
PR10
100K_0402_1%

1

2

BATT_TEMP <23>

+VSBP

1
PC9
0.1U_0603_25V7K

3

B+

2

@
PJSOT24CW_SOT323-3

2

+3VALW

PC8
0.22U_0603_25V7K

1

PD2

1

2

PR9
6.49K_0402_1%

PR11
1K_0402_1%

2

3

1

EC_SMB_DA1_1
2

PR14
100_0402_1%

PJ1

PC7
0.01U_0402_25V7K

JUMP_43X39

2

@

1

PD1

100_0402_1%

1

SUYIN_200275MR009G10PZR

PR7
1K_0402_1%

PR15

GND

PC6
1000P_0402_50V7K

2

Reserve when EC use +3VALW.

1

+3VALW

100K_0402_1%

2

2

1

1

2

BATT_P4
TS_A

EC_SMB_CK1_1

11
10
9
8
7
6
5
4
3
2
1

PJSOT24CW_SOT323-3
2
1
3

GND
GND
9
8
7
6
5
4
3
2
1

2

1
PR4

PD3
RLS4148_LL34-2
VS_N_001
1

1

1

+VSB

(120mA,40mils ,Via NO.= 1)

2

PR18
68_1206_5%

1

VS

<24>

1

2
PR22
22K_0402_1%

51_ON#

4

1

PC12
0.1U_0603_25V7K

2

2

PC11
0.22U_0603_25V7K

2

PR21
100K_0402_1%

2

1

1

3

2

JUMP_43X39

PQ3
PR17
TP0610K-T1-E3_SOT23-3 68_1206_5%
N1

2

1

1

1

PD4
RLS4148_LL34-2

2

2

BATT+

PJ2
+VSBP

VS_N_002
4

Reserve when EC use +3VL.
Install when EC use +3VALW.

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2009/01/23

Deciphered Date

2010/01/23

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

SCHEMATIC MB A7491
Document Number

Rev
B

4019D2
Friday, May 06, 2011

Sheet

D

27

of

35

B

C

D

PL403
1.2UH +-30% 1231AS-H-1R2N=P3 2.9A
1
2

3

ICM

PHASE

18

8

VREF

UGATE

17

9

CHLIM

BOOT

16

226K_0402_1%
PR128
20K_0402_1%

4

PC106
2200P_0402_25V7K

1

2

2

PC105
0.1U_0402_25V6
2
1

PC104
4.7U_0805_25V6-K
2
1

VDDP

PQ110

2

PC121
0.1U_0603_25V7K
BST_CHGA 2
1

6251VDDP

15

11

VADJ

LGATE

14

12

GND

PGND

13

DL_CHG

4

PD106
RB751V-40_SOD323-2
1

26251VDD

AON7406L_DFN8-5

2

PL101
PR102
10U_LF919AS-100M-P3_5.3A_20%
0.02_1206_1%
CHG
1
2
1
4

5
ACLIM

DH_CHG
PR126
0_0603_5%
BST_CHG 1

1

2
3

5

PR122
2.2_0603_1%

LX_CHG

2ACPRN
G
PQ109 @
SSM3K7002FU_SC70-3

PR129
4.7_0603_5%
PC123
4.7U_0805_6.3V6K

ISL6251AHAZ-T_QSOP24

3

1

2

1

2

1

PR105
18.2K_0402_1%
1
2

2

BATT+
10U_0805_25V6K
PC102

19

S

10U_0805_25V6K
PC101

CSIP

CHG_N_001
4

D

3

VCOMP

7

@ PC114
2
1

6

PR130
100K_0402_1%
1

20

1

CSIN

PQ108
AON7408L_DFN8-5

PR125
4.7_1206_5%

ICOMP

10

2

@

5

CSOP

3
2
1

21

VIN

1CHG_N_008
1

1

PR111
14.3K_0402_1%

1

2
DCIN

CSOP

CSON

CHG_SNUB 2

6251aclim

2

2

PD101

CELLS

2

6251VREF 1
Rtop PR127

<23> CHGVADJ

4

PR118
20_0603_5%
CHG_CSON 1
2
PC113
0.047U_0603_16V7K
CHG_CSOP 1
2
PR119
20_0603_5%
CHG_CSIN
2
1
PC118
PR120
0.1U_0603_25V7K
20_0603_5%
CHG_CSIP
1
2

1

PR104
140K_0402_1%

22

PQ106
DTC115EUA_SC70-3

ACPRN

2

PQ111
DTC115EUA_SC70-3

2

EN

CSON

PR110
200K_0402_1%
1
2

PC124
@ 680P_0603_50V7K

ACOFF

3

1

CHG_N_005

3
2
1

ACOFF

2

<23>

23

2

IREF

ADP_I

1

1

<23>

PR103
<23>
150K_0402_1%
2
1

PC122
0.01U_0402_25V7K
2
1

PC120 must close EC pin.

CHG_VCOMP

PR123 47K_0402_1%
1
2CHG_ICM
PC119 @ 100P_0402_50V8J
1
2
6251VREF
PC120
0.1U_0402_16V7K
CHG_CHLIM
1

ACSET ACPRN

2

0.01U_0402_25V7K

2

PC112
1U_0603_25V6K
1
2

1

PR124
22K_0402_5%
PACIN 1
2

6.81K_0402_1%
2

24

1

4

5

6800P_0402_25V7K
CHG_ICOMP
2

DCIN

1

2
PC116
1
PC117
PR121
1
2CHG_VCOMP1 1

2

CHG_N_009

6251_EN

@PC115
@
PC115
680P_0402_50V7K
1
2

10_1206_5%

VDD

2

2
PQ107B
SSM6N7002FU-2N_SOT363-6

2

CSON

PU101
1

8
7
6
5

PR112
47K_0402_1%

1

2

2

2

1

PD104
@ GLZ27D_LL34-2
1
2

PR113

1

2

ACSETIN

PC110
1000P_0402_25V8J

1

ACSETIN

@PC111
@
PC111
0.1U_0402_16V7K

3CHG_N_002

1

SSM6N7002FU-2N_SOT363-6

RB751V-40_SOD323-2
CHG_VIN 1
2

PR114
10K_0402_1%
2
1
1

<23> FSTCHG
PR116
150K_0402_1%

6

PC109
2.2U_0603_6.3V6K
2
1

@PD103
@
PD103
1SS355_SOD323-2
1
2

PQ107A
2

PR108
191K_0402_1%
1
2

6251VDD

1

PQ105
DTC115EUA_SC70-3
3

CHG_N_001

2

1

VIN

@

CHG_N_003

PQ103
AO4435L_SO8
1
2
3

CSIN

3

CHG_VADJ

2

1
2

2

B+
CHG_B+

@PL102
@
PL102
HCB2012KF-121T50_0805
1
2

CSIP

PR107
200K_0402_1%

PC108
0.1U_0603_25V7K

2

2

1

PR109
47K_0402_1%

1CHG_N_010

1

PQ104
DTA144EUA_SC70-3

8
7
6
5

1

3

1

B+

PR101
0.02_1206_1%
1
4

10U_0805_25V6K
PC103

1
2
3

PC107
5600P_0402_25V7K
1
2

1
2
3

4

8
7
6
5

P3

4

VIN

PQ102
AO4409_SO8

PR117
100K_0402_1%

P2

PQ101
AO4435L_SO8

0.1U_0603_25V7K

A

PR106
31.6K_0402_1%

3

6251VDD

1

1

2

3

PR131
47K_0402_1%

ACIN

<23>

PACIN

2

2

PR132
10K_0402_1%

PR133
10K_0402_1%
1
2

C

ACPRN

Iada=0~3.421A(65W);CP=2.91A;

PQ112

2
B

1

1

CP= 85%*Iada;
PR136
20K_0402_1%

Add

2

3

E
MMBT3904W_SOT323-3

CP mode
Vaclim=VREF*(Rbot//Rinternal/(Rtop//Rinternal+Rbot//Rinternal))
65W Vaclim=2.39*(20K//152K/(20K//152K+226K//152K))=0.38914V
Iinput=(1/Racdet)*((0.05*Vaclim/VREF+0.05))
65W,Iinput=(1/0.02)*(0.05*0.38914/2.39+0.05)=2.92A

4

4

CC=0.25A~3A

CHGVADJ=(Vcell-4)/0.10627

IREF=1.016*Icharge

Vcell

IREF=0.254V~3.048V

4V

VCHLIM need over 95mV

4.2V

CHGVADJ
Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

0V
1.882V

2009/01/23

Deciphered Date

2010/01/23

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

SCHEMATIC MB A7491
Document Number

Rev
B

4019D2
Friday, May 06, 2011

Sheet
D

28

of

35

A

B

C

D

E

PC308
1U_0603_16V6K
2
1

2VREF_51125

1

PR301
13.7K_0402_1%
1

PL301
HCB2012KF-121T50_0805

FB_3V

FB_5V

1

PR305
30.9K_0402_1%
2

1

PR306
20K_0402_1%
2

B++

ENTRIP2

21

UG_5V

LL1

20

LX_5V

DRVL1

19

LG_5V

5
3
2
1

PR313
4.7_1206_5%
2
1

1
PC305
220U_6.3V_M

+
2

PC317
680P_0603_50V7K

1

SNUB_5V

5
6
7
8
3
2
1

2

1

1
2

PC318
4.7U_0805_10V6K

+5VALWP

+5VALWP
Imax=4A
Ipeak=5.2A
Iocp(minimum)=6.5A

3

3

2

PC307
10U_0805_25V6K

1

S IC RT8205LZQW WQFN 24P PWM

VL

2VREF_51125

4

<27,32>

EN0

B++

2

PL305
4.7UH_PCMC063T-4R7MN_5.5A_20%
2
1

PQ306

18

17

16

2

4
PR309
PC315
2.2_0402_5%
0.1U_0402_10V7K
BST_5V 1
2 BST1_5V 1
2

POK

PC320
1U_0603_10V6K

PQ305
AON7408L_DFN8-5

IRF8707GTRPBF_SO8

EN0

2

VCLK

DRVL2
VREG5

12

VIN

LL2

GND

11

@ PC306
4.7U_0805_25V6-K

ENTRIP1

22

DRVH1

PC312
2200P_0402_50V7K
2
1

1

2

3
VREF

VBST1

DRVH2

PC319
0.1U_0603_25V7K

6ENTRIP1

TONSEL

VBST2

3

PQ307A

PQ307B
N_3_5V_001

2

5
4

SSM6N7002FU-2N_SOT363-6

1

SSM6N7002FU-2N_SOT363-6

PJP305
1

+5VALWP
1

2

PR317
100K_0402_5%

1

@PR318
@
PR318
100K_0402_1%
1
2

<17,23,24> EC_ON

VFB1

4

6

23

1

1

<27>

5

24

PR314
499K_0402_1%
2

2

1
2
3

AO4468L_SO8

VFB2

VO1

VREG3

13

1

PR311
100K_0402_1%
2
1

2

B++

PR307
110K_0402_1%
2

PGOOD

VO2

15

8
7
6
5

1

4

1

2

LG_3V

2

+

SNUB_3V

1
PC303
220U_6.3V_M

LX_3V
PQ304

PC316
@ 680P_0603_50V7K

+3VALWP

PR312
@ 4.7_1206_5%

PL303
4.7UH_PCMC063T-4R7MN_5.5A_20%
2
1

PC311
0.1U_0402_25V6
2
1

ENTRIP2

1
2
3

PC314
8
PR308
0.1U_0402_10V7K
BST1_3V 1
1
2
2BST_3V 9
0_0402_5%
UG_3V
10

SKIPSEL

7

2

+3VALWP
Imax=3A
Ipeak=3.8A
Iocp(minimum)=5A

P PAD

2

25

ENTRIP2

PU301

1

PC313
10U_0805_6.3V6M

1

14

5

1
2

PC304
4.7U_0805_25V6-K

PC310
2200P_0402_50V7K
2
1

PR303
102K_0402_1%
1
2

PQ303
AON7408L_DFN8-5

4

ENTRIP1

+3VLP

2
PC309
0.1U_0402_25V6
2
1

1

2

PR302
20K_0402_1%
1
2

B++

B+

1

2

+5VALW

(4A,160mils ,Via NO.= 8)

+3VALW

(3A,120mils ,Via NO.= 6)

PAD-OPEN 4x4m
PJP303

VL
1

+3VALWP

2
PAD-OPEN 4x4m

PQ308
DTC115EUA_SC70-3

VS_ON
2

2

PR319
100K_0402_1%

4

+3VL

+3VLP
1

2

PJP302
2

3

2
1
PR320
42.2K_0402_1%

1

PC321
2.2U_0603_10V6K

<27>

VS

1
PAD-OPEN 2x2m
4

EC:+3VL, reserve PR319, install PR318, PR320 100K
EC:+3VALW, reserve PR318, install PR319, PR320 40.2K

Compal Secret Data

Security Classification
2007/08/02

Issued Date

2008/08/02

Deciphered Date

Title

Compal Electronics, Inc.
SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
B

4019D2

Date:

A

B

C

D

Sheet

Friday, May 06, 2011
E

29

of

35

A

B

C

D

1

1

2

+3VALW

1

PR406
100K_0402_1%

+1.8VS_PG <26>

 VFB=0.6V
Vo=VFB*(1+PR401/PR402)=0.6*(1+20K/10K)=1.8V

1
PR402
10K_0402_1%

1
2

2

1

2

PC402
22U_0805_6.3VAM

1

PC401
22U_0805_6.3VAM

1

68P_0402_50V8J
PC404

+1.8VSP

2

2

SY8033BDBC_DFN10_3X3

PR401
20K_0402_1%
2

1
1.8VSP_FB

PR403
4.7_1206_5%

NC

TP

FB

6

1

1

3

2

@

7

EN_1.8VSP

2

2

47K_0402_1%
PR405
1M_0402_5%

PC405
2200P_0402_25V7K

1
PR404

2

<17,23,26,33> SUSP#

1

2

EN

11

5

LX

2

SVIN

SNUB_1.8VSP

PVIN

8

1.8VSP_LX

PC406
680P_0603_50V7K

9

LX

NC

PVIN

2

1

10

2

PC403
22U_0805_6.3VAM

PL401
1UH_MMD-06CZ-1R0M-V1_11A_20%
1
2

4

PU401
1.8VSP_VIN

PG

PL402
HCB2012KF-121T50_0805
2
1

1

+5VALW

PJP401
+1.8VSP

1

2

+1.8VS

(2A, 80mils, Via NO.= 4)

PAD-OPEN 3x3m
3

3

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2009/01/23

Deciphered Date

2010/01/23

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

SCHEMATIC MB A7491
Document Number

Rev
B

4019D2
Friday, May 06, 2011

Sheet
D

30

of

35

5

4

3

2

1

1.5V_B+

6

PGOOD

14

3
2
1
UG_1.5V

PHASE

12

LX_1.5V

CS

11

TRIP_1.5V 1

VDDP

10

1
@ PR517

LGATE

9

100K_0402_1%

15K_0402_1%
2

PQ502
IRF8707GTRPBF_SO8

+5VALW
PC510
4.7U_0805_10V6K

PR501

1

PC507
0.1U_0402_25V6

1
2

2200P_0402_50V7K
PC506

1

PR509
4.7_1206_5%

4

S IC RT8209MGQW WQFN 14P PWM

+

2

PC511
680P_0603_50V7K

C

2

+1.5VP_PWRGD

1

10U_0805_25V6K
PC503

PL501
2.2UH_MMD-06CZ-2R2M-V1_8A_20%
1
2

3
2
1

7

C

PR508
+5VALW
LG_1.5V

PQ501
AON7408L_DFN8-5

+1.5VP

2

2

2

PC501
220U_D2_2VY_R15M

FB

BOOT

15

1

5

4

1

D

1

VDD

PGND

+3VALW

B+

5
6
7
8

VOUT

4

2

1

3

13

UGATE

8

PC509
4.7U_0603_6.3V6M

TON

GND

PR507
100_0603_1%

2
0_0402_5%
V5FILT_1.5V

2

1

PC508
0.1U_0402_10V7K

1

2

2

1
PR505

+1.5VP
+5VALW 1

VOUT_1.5V

NC

PR506
255K_0402_1%
1
2TON_1.5V

EN/DEM

PU501

+5VALW

@ PC504
4.7U_0805_25V6-K

5

2

PR504
2.2_0603_5%
BST_1.5V 2
1BST1_1.5V

1

PC505
@ 0.1U_0402_10V7K

1

0_0402_5%

PL502
HCB2012KF-121T50_0805
2
1

EN_1.5V

1

2

2

SYSON

1SNUB_1.5V
2

<23>

2

PR503
D

2

2.21K_0402_1%

2
1
2
1

1
2

1.35V@ PR512
100K_0402_1%

1

1.35V@ PC512
0.01U_0402_25V7K

2

1

DDR_VID

<13>
B

1.35V@PR513
10K_0402_5%
1.35V@ PR514
100K_0402_1%

2

+1.5VP
Imax=6.5A
Ipeak=9A
Iocp(minimum)=10.2A

+3VALW

2
3

1
2

B

1.35V@PR511
4.7K_0402_5%
2
1
1.35V@ PC502
0.1U_0402_16V7K

3

S

1.35V@ PQ504
2N7002W-T/R7_SOT323-3

2
G

1

1
1

2

D

1.35V@ PQ503
PMBT2222A_SOT23-3

1
PR502
2.15K_0402_1%

1.35V@ PR515
180K_0402_1%

2

+3VALW
PR516 1.35V@
162K_0402_1%

PJP501

1

+1.5VP

2

+1.5V

(6.5A,260mils ,Via NO.= 13)

PAD-OPEN 4x4m

Voltage Select
DDR_VID

DDR voltage

0

+1.5V

1

+1.35V

A

A

Compal Secret Data

Security Classification
2007/05/29

Issued Date

Deciphered Date

2008/05/29

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Compal Electronics, Inc.
SCHEMATIC MB A7491
Document Number

Rev
B

4019D2
Friday, May 06, 2011

Sheet
1

31

of

35

5

4

3

2

1

D

D

1.1V_B+

6

PR702
10K_0402_1%

14

3
2
1

NC

BOOT

15

1

PGOOD

UG_1.1V

PHASE

LX_1.1V
TRIP_1.1V 1

CS

11

VDDP

10

LGATE

9

PR708
+5VALW
LG_1.1V

1

PC706
0.1U_0402_25V6

PC703
@4.7U_0805_25V6-K
2
1

10U_0805_25V6K
PC702

15K_0402_1%
2
+5VALW

+

FDS6690AS-G_SO8

4

S IC RT8209MGQW WQFN 14P PWM

C

1

PR709
@ 4.7_1206_5%

PQ702

PC709
4.7U_0805_10V6K

3
2
1

2
2
PR710
100K_0402_1%

+1.1VALWP

PL701
1UH_MMD-06CZ-1R0M-V1_11A_20%
1
2

+3VALW 1

+1.1VALWP
Imax=7A
Ipeak=9.93A
Iocp(minimum)=11.3A

PC710
@ 680P_0603_50V7K

@

2

+1.1VAlwP_PWRGD

2

PC701
220U_D2_2VY_R15M

FB_1.1V

13
12

1SNUB_1.1V 2

FB

UGATE

PQ701
AON7408L_DFN8-5

5
6
7
8

VDD

5

4

1

4.64K_0402_1%

4

2

PC707
0.1U_0402_10V7K

2

2

PGND

+1.1VALWP

PR701

VOUT

8

TON

3

7

PC708
4.7U_0603_6.3V6M

1

1

2

PR707
100_0603_1%

1

+5VALW 1

+5VALW

2

+1.1VALWP

VOUT_1.1V

2
0_0402_5%
V5FILT_1.1V

EN/DEM

2

C

GND

PR705
255K_0402_1%
1
2TON_1.1V

2

1

1

PR704
0_0402_5%
BST_1.1V 1
2BST1_1.1V

1
PR706

1

5

2

1

PC704 @
0.1U_0402_10V7K

PU701

B+

PL702
HCB2012KF-121T50_0805
2
1

1

1

0_0402_5%

2

2

POK

2200P_0402_50V7K
PC705

<27,29>

EN_1.1V

2

PR703

B

B

PJP701
+1.1VALWP

1

2

+1.1VALW

(7A,280mils ,Via NO.=14)

PAD-OPEN 4x4m

A

A

Compal Secret Data

Security Classification
2007/05/29

Issued Date

Deciphered Date

2008/05/29

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Compal Electronics, Inc.
SCHEMATIC MB A7491
Document Number

Rev
B

4019D2
Friday, May 06, 2011

Sheet
1

32

of

35

5

4

3

2

1

+1.5V

VCNTL

6

GND

NC

5

3

VREF

NC

7

4

VOUT

NC

8

TP

9

+3VALW

1

+1.1VALW

2

4
1

+VSB

1

D

PR605
330K_0402_5%

double check sequence

PQ603
2
G

SUSP

S

3

2

2

PC606
0.1U_0402_10V7K

PC608
4.7U_0603_6.3V6K

PR603
1
2
47K_0402_5%

2

1

2

PC609
4.7U_0603_6.3V6K

1

PC602
1U_0402_6.3V6K

1
PC605
10U_0805_6.3V6M

2

1
2
3

1

8
7
6
5

+0.75VSP

2

PR602
1K_0402_1%

2
1
PC604
0.1U_0402_16V7K

1
S

2

1
3

SUSP

1

<26>

D

D

+1.0VSP

PQ601
IRF8707GTRPBF_SO8

G2992F1U_SO8
VREF_G2992
PQ602
SSM3K7002FU_SC70-3
PR604
10K_0402_1%
1
20.75VS_N_002
2
G

Follow HW request 1.0V change to 1.05V 0824

+1.1VALW TO +1.0VSP
PC603
1U_0603_10V6K

1

2

2

PR601
1K_0402_1%

PC607
0.1U_0402_25V6

2

PC601
4.7U_0805_6.3V6K

D

VIN

2
1

1

PU601

1

SSM3K7002FU_SC70-3

PJP601

1

+0.75VSP

C

2

+0.75VS

PJP602

(2A,80mils ,Via NO.= 4)
1

+1.0VSP
PAD-OPEN 3x3m

2

+1.0VS

C

(5A,200mils ,Via NO.= 10)

PAD-OPEN 4x4m

Follow HW request 1.0V change to 1.05V 0824

+5VALW
+5VALW

Reserve 1.0VSP backup solution

For low power DDR 1.35V, WLAN need 1.5V support

@
APL5930KAI-TRG_SO8

1

<17,23,26,30> SUSP#

1
2
@ PR615
0_0402_5%

+3VS

1

2

1.5VS_FB

@

2
1.0VSP_POK

@ PR617
10K_0402_5%

2

2

PR614

1

PC618
@22U_0805_6.3V6M

@ PR616
31.6K_0402_1%

@ PR612
39.2K_0402_1%

+3VS

@

1

FB

APL5916KAI-TRL_SO8

B

+1.0VP
2

3
4
PC622
2
1

VOUT
VOUT

PR611
10K_0402_1%
2
1

GND

EN
POK

2

@ PC621
0.1U_0402_10V7K

VCNTL
VIN
VIN

8
7

1

PC617 @
22U_0805_6.3V6M

1

2

1
2

1.5VSP_EN

6
5
9

33P_0402_50V8J

@

@ PC619
10U_0805_10V6K

1

1
2
@ PR613
0_0402_5%

1.5VS_FB

PC616
2
1

2

1

FB

+1.5VSP
@ 47P_0402_50V8J

1

EN
POK

3
4

1

<17,23,26,30> SUSP#

8
7

2

@ PC615
0.1U_0402_10V7K

VOUT
VOUT

PR610
10K_0402_1%
2
1

1

1.5VSP_EN

2

@ PC614
10U_0805_10V6K

VCNTL
VIN
VIN

1

PU603

6
5
9

GND

B

FB=0.8V
PU604 @

2

1

@ PC613
1U_0603_10V6K

2

+1.8VSP

+1.1VALW @ PC620
1U_0603_10V6K

2

1.5VS_POK

@ 10K_0402_5%
PJP604
+1.0VP

1

PJP603
+1.5VSP

1

2

+1.0VS

(5A,200mils ,Via NO.= 10)

PAD-OPEN 4x4m

2

+1.5VS

(2A,120mils ,Via NO.= 4)

PAD-OPEN 3x3m
A

A

Compal Secret Data

Security Classification
Issued Date

2006/11/23

Deciphered Date

2007/11/23

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Compal Electronics, Inc.
SCHEMATIC MB A7491
Document Number

Rev
B

4019D2
Friday, May 06, 2011

Sheet
1

33

of

35

A

B

C

PC235
68P_0402_50V8J
1
2

D

PR226
100_0402_5%
2
1

PC236
470P_0402_50V8J
1
2

2

2

PR234
0_0402_5%
2
1

1

PC238 @
68P_0402_50V8J

1

@ PC237
68P_0402_50V8J

1

1

2

@ PC239
68P_0402_50V8J

+CPU_CORE 7
VDDCR_APU_SENSE_H
<5>

1

PR230
0_0402_5%

2

COMP

+5VS

PR232
10K_0402_1%
1
2

2

PR231
47K_0402_1%
1
2

PR252
10K_0402_1%

E

1

VDDCR_APU_SENSE_L
<5>

2
1
PR236
100_0402_5%

1

FB
RGND

CPU_B+
2
PVCC

26

6

PGOOD

LGATE0

25

7

VFIX/DRPSEL

PGND0

24

8

OCSET_NB

PHASE0

23

PHASE0

9

VCC

UGATE0

22

UGATE0

BOOT0

21

5

1SNUB_CPU
2
2

PQ205
3
2
1
BOOT0

@68U_25V_M_R0.44

(14A, 560mils, via no = 28)
2

PR242
2.43K_0402_1%
1
2
PR244
2.43K_0402_1%
1
2

1

+CPU_CORE
Imax=7.7A
Ipeak=11A
Iocp(minimum)=13.2A
DCR=4.2mohm
Rdson = 7mohm

2

PC242
0.1U_0402_25V6

ISN0

1
2
1

2
0_0402_5%

10uF_0603 * 7
1uF_0402 * 4
0.1uF_0402 * 5
180P_0402 * 2
390uF * 3
Reserve 330uF * 2

PC241
0.1U_0402_25V6

CPU_B+

BOOT_NB 2

PC211
2200P_0402_50V7K

2

PC206
0.1U_0402_25V6
2
1

1

PC204
@4.7U_0805_25V6-K
2
1

PC215
0.1U_0402_25V6
1
2
1

PR206
2.2_0603_5%

PQ202
AON7408L_DFN8-5

1 2

2
1
130K_0402_1%

2

TON_NB

5

PR205

PC205
10U_0805_25V6K
2
1

PR207
1_0402_5%

1

PC203
1U_0603_10V6K

3

4

PC216
0.22U_0603_10V7K

(10A, 400mils, via no = 20)
3
2
1

UGATE_NB

PL202
5
6
7
8
PQ203
AO4468L_SO8
LGATE_NB

4

FB_NB
PC228 @
68P_0402_50V8J
RGND_NB

+CPU_CORE_NB

1
2
1UH_MMD-06CZ-1R0M-V1_11A_20%

+
PR213
2K_0402_1%
2
1
PR251
8.2K_0402_1%
1
2

PC218

2
220U_D2_2VY_R15M

PC222
1

2

0.1U_0402_25V6

2

10uF_0603 * 6
1uF_0402 * 5
0.1uF_0402 * 4
180P_0402 * 2
390uF * 1
Reserve 390uF

PR217
ISN_NB

2
PC223
0.1U_0402_25V6

1

0_0402_5%

1

2

100_0402_5%

+CPU_CORE_NB
Imax=7A
Ipeak=10A
Iocp(minimum)=12A
DCR=10mohm
Rdson = 22mohm

1

ISP_NB

PR225
1

PC227 @
68P_0402_50V8J

3
2
1

1

2
VDDCR_NB_SENSE_L
<5>

1

PR224
0_0402_5%
1
2

PC229 @
68P_0402_50V8J

COMP_NB

PR210
1SNUB_NB
2
1
@ 4.7_1206_5%
PC220
@ 680P_0603_50V7K

PR223
47K_0402_1%
1
2

2

PR222
10K_0402_1%
1
2

PHASE_NB

2

PR220
0_0402_5%
1
2

VDDCR_NB_SENSE_H
<5>

PC226
68P_0402_50V8J
1
2

2

PC225
470P_0402_50V8J
1
2

1

PR219
100_0402_5%
1
2

7 +CPU_CORE_NB

PC249
2200P_0402_50V7K
2
1

PC248

PC247

PC243
2200P_0402_50V7K
2
1

PC245
0.1U_0402_25V6
2
1

10U_0805_25V6K
PC244

@68U_25V_M_R0.44

+CPU_CORE

PR249 @

ISP0

2
PC231
1
2

2

PR246

PC232
0.01U_0402_25V7K

1

0.01U_0402_25V7K
1
2

2

2
1

3

+

2

4.7_1206_5%

4

LGATE0

1

+

1

2

PR202
2_0603_5%

OCSET_NB

PR240
22K_0402_1%

2

LGATE0

1

PL204
0.47UH_MMD-06CZ-R47M-V1_17.5A_20%
1
2

AON6788_DFN8-5

1

PVCC

2

PC252
1U_0603_10V6K

BOOT_NB

PHASE_NB

20

15
RGND_NB

19

14
ISN_NB

18

13
ISP_NB

BOOT_NB

12
TON_NB

UGATE_NB

COMP_NB
11
COMP_NB

FB_NB

1

UGATE_NB

RT8870AZQW_WQFN40_5X5

FB_NB

B+

+3VS

VFIX/DRPSEL

PR239
5.1K_0402_1%

1

UGATE0

1

PWORK

2

4

@ 680P_0603_50V7K
PC251

5

PR221
0_0402_5%
1
2

1

PHASE0

2

27

PC250
PR248
0.1U_0402_25V6
2.2_0603_5%
2
1
2
1
PC240
0.22U_0603_10V7K

PQ206
AON7408L_DFN8-5

3
2
1

1

32

31
BOOT1

33
ISP1

ISN1

34
RGND

35
ISN0

36
ISP0

38

37
TON

28

LGATE1

2
1
2
PR229
33K_0402_1%

COMP

PGND1

SVD

LGATE_NB

OCSET_NB
VCC

1

PR228
10K_0402_1%

39

40

SVC

4

0_0402_5%

+5VS

FB

41

3

17

PGOOD
VFIX/DRPSEL

PR255
10K_0402_1%

2

29

10

+5VS

1

PHASE1

PHASE_NB

<15,23> VGATE

EN

PGND_NB

PR235

2

16

<14> APU_PWRGD_CORE

30

LGATE_NB

<15> FCH_PWROK

UGATE1

RGND_NB

1
2
0_0402_5% PR238
1
2
0_0402_5%
1
2
@ PR233 0_0402_5%
1
2

<5> APU_SVD

BOOT0
PR250
2_0603_5%

RBIAS

ISN_NB

ENABLE

PR227
<5> APU_SVC

+5VS

1

ISP_NB

+1.5V

RBIAS

TON_NB

PR208
100K_0402_1%
1
2

PR237
@ 51_0402_1%
1
2
PR241 @ 51_0402_1%
1
2

2

OCSET

PC234
0.01U_0402_25V7K

1

2

GND

PU201
<23> VR_ON_EC

PR245
110K_0402_1%
1
2

TON

2

2
1

ISN0

ISP0

TON

OCSET

2

PC230
0.1U_0402_25V6

1

@ PR254
10K_0402_1%

@ PC246
4.7U_0805_25V6-K
2
1

PR247
1_0402_5%

ISN1

5

ISP1

1

+3VS

PL205
HCB2012KF-121T50_0805
2
1

PR256
10K_0402_1%
1

PC253
0.01U_0402_25V7K

1

PR253
7.15K_0402_1%

1

2

2

+5VS

4

4

Compal Secret Data

Security Classification
Issued Date

2008/9/25

Deciphered Date

2009/9/25

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

Compal Electronics, Inc.
SCHEMATIC MB A7491
Document Number

Rev
B

4019D2
Sheet

Friday, May 06, 2011
E

34

of

34

5

4

3

2

1

Version Change List ( P. I. R. List ) for Power Circuit
Item Page#

Reason for change

D

phase

Description

modify

Rev.
D

1

31

Follow EMI request to add PR54, PR59, PC511
for EMI issue.

add PR54, PR59, PC511

PVT

2

34

Follow ME request change PQ205 for height issue

Change PQ205 from AO4726L AON6788

3

28

For common desgin

Delete PC107

Pre-MP

Remove PC107

4

28

For common desgin

PR110 from 47K change to 200K

Pre-MP

PR110 from 47K change to 200K

5

28

For common desgin

PR112 from 10K change to 47K

Pre-MP

PR110 from 10K change to 47K

add PR54, PR59, PC511
Change PQ205 from AO4726L AON6788

PVT

6
7
8
C

C

9
10
11
12
13
14
15
16
B

B

17
18
19
20
21
22
24
A

A

25

Security Classification
Issued Date

Compal Secret Data
Title

Deciphered Date

Compal Electronics, Inc.
SCHEMATIC MB A7491

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
B

4019CQ
Sheet

Friday, May 06, 2011
1

35

of

35



---

Source Exif Data:

File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.5
Linearized                      : Yes
Author                          : Owner
Create Date                     : 2011:05:06 09:41:06+08:00
Modify Date                     : 2012:10:18 10:36:20+03:00
XMP Toolkit                     : Adobe XMP Core 5.2-c001 63.139439, 2010/09/27-13:37:26
Producer                        : Acrobat Distiller 6.0 (Windows)
Metadata Date                   : 2012:10:18 10:36:20+03:00
Document ID                     : uuid:302ffa58-ea43-44e6-8632-1480b148457d
Instance ID                     : uuid:16ed7cbb-f9c7-40eb-9e3b-cfdba1723adf
Format                          : application/pdf
Title                           : LA-7491P PCW20 Rev: 1.0
Creator                         : Owner
Page Count                      : 36

EXIF Metadata provided by EXIF.tools