LS 5588 NAW20 R0.3 Compal 5588P

User Manual:

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Page Count: 35

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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS-5588
0.3
Cover Sheet
Custom
1 35Wednesday, July 01, 2009
2009/04/20 2010/04/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS-5588
0.3
Cover Sheet
Custom
1 35Wednesday, July 01, 2009
2009/04/20 2010/04/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS-5588
0.3
Cover Sheet
Custom
1 35Wednesday, July 01, 2009
2009/04/20 2010/04/30
Compal Electronics, Inc.
Compal confidential
Schematics Document
Mobile Penryn uFCPGA with Intel
Cantiga_GM+ICH9-M SFF core logic
ULV core logic HDI board
DISCRETE VGA M92 2009-06-19 V.03
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Block Diagram
Custom
2 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Block Diagram
Custom
2 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Block Diagram
Custom
2 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Golden finger
page 14,15
BANK 0, 1, 2, 3
DDR3-SO-DIMM X 2
DDR3 1066MHz 1.5V
Dual Channel
HDI to I/O board
Thermal Sensor Clock Generator
ICS9LPRS387BKLFT
MLF 72P
Mobile Peryn
uFCPGA-956 CPU - SFF
FSB
667/800/1066MHz 1.05V
H_A#(3..35)
H_D#(0..63)
FCBGA 1363 - SFF
Intel Cantiga GS
WBMMAP-569 - SFF
Intel ICH9-M
ULV
page 16
page 8,9,10,11,12,13
page 4
page 4,5,6,7
CK505
DMI X4
LV/ULV Dual Core
SATA x3
USB x9
PCIE*3
LPC
Single Channel
HDA
CRT
LVDS
HDMI
RGB
ODD
HDD
ESATA
SATA USB*2
CardReader
BT
CMOS
miniPCIE
*2
miniPCIE*1
LAN
EC AUDIO
ATI M92 S2
DISCRETE VGA HDI BRD
USB
PCIE
LPC HDA
VRAM DDR3
512MB(64Mx16)
600MHz
Model Name : NAW20
File Name : LS-5588P
Compal confidential
I/O BRD PORTION
page 26
page 17,18,19,20,21
page 22,23,24,25
ZZZ
PCB-MB
ZZZ
PCB-MB
A
A
1 1
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Notes List
Custom
3 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Notes List
Custom
3 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Notes List
Custom
3 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
( O MEANS ON X MEANS OFF )
Voltage Rails
O
O
X
+0.75VS
S3
+3VS
X
X
+3VALW
+5VS
S1
O
+CPU_CORE
OO
OO
X
X X
+VCCP
power
plane
O
O
O
O
O
X
S5 S4/ Battery only
X X X
+B
State
+1.5VS
+1.5V
S5 S4/AC & Battery
don't exist
S5 S4/AC
+5VALW
S0
O
O
Symbol Note :
: means Digital Ground
: means Analog Ground
@ : means just reserve , no build
V V V
V
SERIAL SENSOR
(CPU)
SMB_EC_CK2
SOURCE
KB926
INVERTERBATTEEPROM THERMAL SODIMMCLK CHIP
SMBUS Control Table
SMB_CK_CLK1
SMB_CK_DAT1ICH9
MINI CARD
SMB_EC_DA2
SMB_EC_CK1
SMB_EC_DA1
KB926
LCD_CLK
LCD_DAT Cantiga
LCD
X
X
X
XX
X
XX
X
XX
X
XX
X
X X
X
X
X
X
XX
X
X
VV
V
I2C / SMBUS ADDRESSING
1 0 1 0 0 0 0 0
D2
A0
CLOCK GENERATOR (EXT.)
HEX ADDRESS
DDR SO-DIMM 0 1 1 0 1 0 0 1 0
DEVICE
+3VL
ME@ : means ME part.
45@ : means install after SMT.
+1.1VS
+1.8VS
+VGA_CORE
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_THERMDC
H_THERMTRIP#
H_THERMDA
H_THERMDC_R
H_A#32
H_A#34
H_A#35
H_A#33
H_A#3
H_A#18
H_A#10
H_A#30
H_A#27
H_A#26
H_A#13
H_A#21
H_A#11
H_A#17
H_A#7
H_A#9
H_A#16
H_A#20
H_A#6
H_A#25
H_A#8
H_A#12
H_A#28
H_A#29
H_A#19
H_A#23
H_A#24
H_A#15
H_A#5
H_A#14
H_A#22
H_A#4
H_A#31
XDP_TDI
XDP_TMS
XDP_TRST#
XDP_TCK
XDP_TMS
XDP_TDO
XDP_TDI
XDP_DBRESET#
H_THERMDA_R
H_PROCHOT#
H_RESET#
H_THERMDA
H_THERMDC
THERM#
SMB_EC_CK2
SMB_EC_DA2
XDP_TDO
XDP_TCK
XDP_TRST#
H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_STPCLK#
H_INTR
H_NMI
H_SMI#
XDP_TMS
XDP_TDI
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TCK
XDP_BPM#5_R
XDP_BPM#5
XDP_BPM#5
XDP_BPM#5
H_PROCHOT#
H_ADS# [8]
H_BNR# [8]
H_BPRI# [8]
H_THERMTRIP# [8,23]
CLK_CPU_BCLK [16]
CLK_CPU_BCLK# [16]
H_A#[3..16][8]
H_ADSTB#0[8]
H_REQ#0[8] H_REQ#1[8] H_REQ#2[8]
H_A#[17..35][8]
H_ADSTB#1[8]
H_A20M#[23] H_FERR#[23] H_IGNNE#[23]
H_STPCLK#[23] H_INTR[23] H_NMI[23] H_SMI#[23]
H_REQ#4[8]
H_DEFER# [8]
H_DRDY# [8]
H_DBSY# [8]
H_BR0# [8]
H_INIT# [23]
H_LOCK# [8]
H_RESET# [8]
H_RS#0 [8]
H_RS#1 [8]
H_RS#2 [8]
H_TRDY# [8]
H_HIT# [8]
H_HITM# [8]
XDP_DBRESET# [24]
H_REQ#3[8]
H_PROCHOT# [31]
EC_SMB_CK2 [17,26]
EC_SMB_DA2 [17,26]
+VCCP
+VCCP
+VCCP
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(1/3)-AGTL+/ITP-XDP
Custom
4 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(1/3)-AGTL+/ITP-XDP
Custom
4 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(1/3)-AGTL+/ITP-XDP
Custom
4 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
This shall place near CPU
H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil
Place close to U1.
9/20
Place Close to U1.
Address:100_1100
For EMI
For ESD 4/21
For ESD
Add 0 ohm per EMI request.
10/17
0518/'09
R03
R03
R03
R03
R4 54.9_0402_1%R4 54.9_0402_1%
1 2
R305 10K_0402_5%
R305 10K_0402_5%
1 2
C1043
0.1U_0402_16V4Z
@
C1043
0.1U_0402_16V4Z
@
1
2
R306
10K_0402_5%
R306
10K_0402_5%
1 2
R25 0_0402_5%
R25 0_0402_5%
1 2
R24 0_0402_5%R24 0_0402_5%
1 2
R2 54.9_0402_1%R2 54.9_0402_1%
1 2
C1038
0.1U_0402_16V4Z
@
C1038
0.1U_0402_16V4Z
@
1
2
C1042
0.1U_0402_16V4Z
@
C1042
0.1U_0402_16V4Z
@
1
2
R6 51_0402_1%
R6 51_0402_1%
1 2
D11
PJDLC05_SOT23-3
@
D11
PJDLC05_SOT23-3
@
2
3
1
D12
PJDLC05_SOT23-3
@
D12
PJDLC05_SOT23-3
@
2
3
1
C1251
0.1U_0402_16V4Z
@
C1251
0.1U_0402_16V4Z
@
1
2
C1037
0.1U_0402_16V4Z
@
C1037
0.1U_0402_16V4Z
@
1
2
C1041
0.1U_0402_16V4Z
@
C1041
0.1U_0402_16V4Z
@
1
2
R10
51_0402_1%
R10
51_0402_1%
1 2
C1036
0.1U_0402_16V4Z
@
C1036
0.1U_0402_16V4Z
@
1
2
D10
PJDLC05_SOT23-3
@
D10
PJDLC05_SOT23-3
@
2
3
1
R9
56_0402_5%
R9
56_0402_5%
1 2
C1034
0.1U_0402_16V4Z
C1034
0.1U_0402_16V4Z
1
2
C1039
0.1U_0402_16V4Z
@
C1039
0.1U_0402_16V4Z
@
1
2
ADDR GROUP 0 ADDR GROUP 1
CONTROL
XDP/ITP SIGNALS
H CLK
THERMAL
RESERVED
ICH
U1A
PENRYN SFF_UFCBGA956
ADDR GROUP 0 ADDR GROUP 1
CONTROL
XDP/ITP SIGNALS
H CLK
THERMAL
RESERVED
ICH
U1A
PENRYN SFF_UFCBGA956
A[10]#
AC5
A[11]#
AD2
A[12]#
AD4
A[13]#
AA5
A[14]#
AE5
A[15]#
AB2
A[16]#
AC1
A[17]#
AN1
A[18]#
AK4
A[19]#
AG1
A[20]#
AT4
A[21]#
AK2
A[22]#
AT2
A[23]#
AH2
A[24]#
AF4
A[25]#
AJ5
A[26]#
AH4
A[27]#
AM4
A[28]#
AP4
A[29]#
AR5
A[3]#
P2
A[30]#
AJ1
A[31]#
AL1
RSVD01
V2
RSVD02
Y2
RSVD03
AG5
RSVD04
AL5
RSVD05
J9
A[4]#
V4
A[5]#
W1
A[6]#
T4
A[7]#
AA1
A[8]#
AB4
A[9]#
T2
A20M#
C7
ADS# M4
ADSTB[0]#
Y4
ADSTB[1]#
AN5
RSVD06
F4
BCLK[0] A35
BCLK[1] C35
BNR# J5
BPM[0]# AY8
BPM[1]# BA7
BPM[2]# BA5
BPM[3]# AY2
BPRI# L5
BR0# M2
DBR# J7
DBSY# J1
DEFER# N5
DRDY# F38
FERR#
D4
HIT# H2
HITM# F2
IERR# B40
IGNNE#
F10
INIT# D8
LINT0
C9
LINT1
C5
LOCK# N1
PRDY# AV10
PREQ# AV2
PROCHOT# D38
REQ[0]#
R1
REQ[1]#
R5
REQ[2]#
U1
REQ[3]#
P4
REQ[4]#
W5
RESET# G5
RS[0]# K2
RS[1]# H4
RS[2]# K4
SMI#
E5
STPCLK#
F8
TCK AV4
TDI AW7
TDO AU1
THERMTRIP# B10
THERMDA BB34
THERMDC BD34
TMS AW5
TRDY# L1
TRST# AV8
A[32]#
AM2
A[33]#
AU5
A[34]#
AP2
A[35]#
AR1
RSVD07
H8
C1040
0.1U_0402_16V4Z
@
C1040
0.1U_0402_16V4Z
@
1
2
R3 54.9_0402_1%R3 54.9_0402_1%
1 2
U7
EMC1402-1-ACZL-TR_MSOP8
U7
EMC1402-1-ACZL-TR_MSOP8
DN
3
DP
2
VDD
1
ALERT# 6
SMCLK 8
THERM#
4GND 5
SMDATA 7
D9
PJDLC05_SOT23-3
@
D9
PJDLC05_SOT23-3
@
2
3
1
R23 0_0402_5%R23 0_0402_5%
1 2
C1045
0.1U_0402_16V4Z
@
C1045
0.1U_0402_16V4Z
@
1
2
R22 68_0402_5%
R22 68_0402_5%
1 2
R1 54.9_0402_1%R1 54.9_0402_1%
1 2
R7 54.9_0402_1%R7 54.9_0402_1%
1 2
C1035
2200P_0402_50V7K
C1035
2200P_0402_50V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSSENSE
VCCSENSE
VSSSENSE
VCCSENSE
H_D#48
H_D#30
H_D#21
H_D#45
H_D#41
H_D#25
H_D#0
COMP2
H_D#53
H_D#18
H_D#13
H_DSTBN#2
H_DINV#3
H_D#50
H_D#37
H_D#32
H_D#3
H_D#28
TEST2
V_CPU_GTLREF
H_DSTBN#0
H_D#54
H_D#46
COMP3
H_DSTBP#3
H_D#43
H_D#36
H_D#29
H_D#11
COMP1
H_D#16
H_D#9
H_D#8
H_D#63
H_D#60
H_D#58
H_D#5
H_D#42
H_D#40
H_D#38
H_D#10
H_DSTBP#0 H_DINV#2
H_D#57
H_D#33
H_D#7
H_D#4
H_D#19
TEST6
H_D#56
H_D#27
H_D#20
H_DSTBP#2
H_D#62
H_D#61
H_D#59
H_D#34H_D#2
H_D#1
COMP0
H_PSI#
H_DSTBN#1
H_DINV#1
H_D#49
H_D#47
H_D#35
H_D#26
H_DINV#0
H_D#23
H_D#14
H_D#44
H_D#31
H_D#24
H_D#15
V_CPU_GTLREF
TEST5
H_D#6
H_D#55
H_D#52
H_D#39
H_D#22
H_D#12
H_DSTBP#1 H_DSTBN#3
H_D#51
H_D#17
VCCSENSE [31]
VSSSENSE [31]
H_D#[0..15][8]
H_DSTBN#0[8] H_DSTBP#0[8] H_DINV#0[8]
H_DSTBN#1[8] H_DSTBP#1[8] H_DINV#1[8]
CPU_BSEL0[16] CPU_BSEL1[16] CPU_BSEL2[16]
H_D#[32..47] [8]
H_D#[48..63] [8]
CPU_VID0 [31]
CPU_VID1 [31]
CPU_VID2 [31]
CPU_VID3 [31]
CPU_VID4 [31]
CPU_VID5 [31]
CPU_VID6 [31]
H_DSTBN#2 [8]
H_DPSLP# [23]
H_DSTBN#3 [8]
H_PWRGOOD [23]
H_DINV#3 [8]
H_DINV#2 [8]
H_DPRSTP# [8,23,31]
H_DPWR# [8]
H_DSTBP#3 [8]
H_DSTBP#2 [8]
H_D#[16..31][8]
H_CPUSLP# [8]
+VCCP
+VCCP
+1.5VS
+VCC_CORE +VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(2/3)-AGTL+/ITP-XDP
Custom
5 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(2/3)-AGTL+/ITP-XDP
Custom
5 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(2/3)-AGTL+/ITP-XDP
Custom
5 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Close to CPU pin AW43
within 500mils.
CPU_BSEL CPU_BSEL2 CPU_BSEL1
166
200
0 1
0
1
CPU_BSEL0
1
0
Resistor placed within
0.5" of CPU pin.Trace
should be at least 25
mils away from any other
toggling signal.
COMP[0,2] trace width is
18 mils. COMP[1,3] trace
width is 4 mils. Length match within 25 mils.
The trace width/space/other is
20/7/25.
Close to CPU pin
within 500mils.
Near pin B34
layout note: Route TEST3 & TEST5 traces on
ground referenced layer to the TPs
266 0 0 0
Near pin D34
Cause CPU core power change to
1 phase, and not need support
the pin, leave it as TP. 10/02
Change to 330u_R9,
casue high
limitation. 12/14
Z=55 ohm
T10T10
R34
100_0402_1%
R34
100_0402_1%
1 2
T11T11
R35
100_0402_1%
R35
100_0402_1%
1 2
T9T9
R29 0_0402_5% R29 0_0402_5%
1 2
R37
2K_0402_1%
R37
2K_0402_1%
12
C7
10U_0805_6.3V6M
C7
10U_0805_6.3V6M
1
2
R31
27.4_0402_1%
R31
27.4_0402_1%
12
R36
1K_0402_1%
R36
1K_0402_1%
12
DATA GROUP 0 DATA GROUP 1
DATA GROUP 2DATA GROUP 3
MISC
U1B
PENRYN SFF_UFCBGA956
DATA GROUP 0 DATA GROUP 1
DATA GROUP 2DATA GROUP 3
MISC
U1B
PENRYN SFF_UFCBGA956
COMP[0] AE43
COMP[1] AD44
COMP[2] AE1
COMP[3] AF2
D[0]#
F40
D[1]#
G43
D[10]#
N41
D[11]#
T40
D[12]#
M40
D[13]#
G41
D[14]#
M44
D[15]#
L43
D[16]#
P44
D[17]#
V40
D[18]#
V44
D[19]#
AB44
D[2]#
E43
D[20]#
R41
D[21]#
W41
D[22]#
N43
D[23]#
U41
D[24]#
AA41
D[25]#
AB40
D[26]#
AD40
D[27]#
AC41
D[28]#
AA43
D[29]#
Y40
D[3]#
J43
D[30]#
Y44
D[31]#
T44
D[32]# AP44
D[33]# AR43
D[34]# AH40
D[35]# AF40
D[36]# AJ43
D[37]# AG41
D[38]# AF44
D[39]# AH44
D[4]#
H40
D[40]# AM44
D[41]# AN43
D[42]# AM40
D[43]# AK40
D[44]# AG43
D[45]# AP40
D[46]# AN41
D[47]# AL41
D[48]# AV38
D[49]# AT44
D[5]#
H44
D[50]# AV40
D[51]# AU41
D[52]# AW41
D[53]# AR41
D[54]# BA37
D[55]# BB38
D[56]# AY36
D[57]# AT40
D[58]# BC35
D[59]# BC39
D[6]#
G39
D[60]# BA41
D[61]# BB40
D[62]# BA35
D[63]# AU43
D[7]#
E41
D[8]#
L41
D[9]#
K44
TEST5
AY10
DINV[0]#
P40
DINV[1]#
R43
DINV[2]# AJ41
DINV[3]# BC37
DPRSTP# G7
DPSLP# B8
DPWR# C41
DSTBN[0]#
K40
DSTBN[1]#
U43
DSTBN[2]# AK44
DSTBN[3]# AY40
DSTBP[0]#
J41
DSTBP[1]#
W43
DSTBP[2]# AL43
DSTBP[3]# AY38
GTLREF
AW43
PSI# BD10
PWRGOOD E7
SLP# D10
TEST3
C43
BSEL[0]
A37
BSEL[1]
C37
BSEL[2]
B38
TEST2
D40
TEST4
AE41
TEST6
AC43
TEST1
E37
R32
54.9_0402_1%
R32
54.9_0402_1%
12
R33
27.4_0402_1%
R33
27.4_0402_1%
12
C6
0.01U_0402_16V7K
C6
0.01U_0402_16V7K
1
2
R28 0_0402_5% R28 0_0402_5%
1 2
R27 0_0402_5%R27 0_0402_5%
1 2
T8T8
+
C5
330U_D2E_2.5VM_R9M
+
C5
330U_D2E_2.5VM_R9M
1
2
R30
54.9_0402_1%
R30
54.9_0402_1%
12
U1C
PENRYN SFF_UFCBGA956
U1C
PENRYN SFF_UFCBGA956
VCC[001]
F32
VCC[002]
G33
VCC[003]
H32
VCC[004]
J33
VCC[005]
K32
VCC[006]
L33
VCC[007]
M32
VCC[008]
N33
VCC[009]
P32
VCC[010]
R33
VCC[011]
T32
VCC[012]
U33
VCC[013]
V32
VCC[014]
W33
VCC[015]
Y32
VCC[016]
AA33
VCC[017]
AB32
VCC[018]
AC33
VCC[019]
AD32
VCC[020]
AE33
VCC[021]
AF32
VCC[022]
AG33
VCC[023]
AH32
VCC[024]
AJ33
VCC[025]
AK32
VCC[026]
AL33
VCC[027]
AM32
VCC[028]
AN33
VCC[029]
AP32
VCC[030]
AR33
VCC[031]
AT34
VCC[032]
AT32
VCC[033]
AU33
VCC[034]
AV32
VCC[035]
AY32
VCC[036]
BB32
VCC[037]
BD32
VCC[038]
B28
VCC[039]
B30
VCC[040]
B26
VCC[041]
D28
VCC[042]
D30
VCC[043]
F30
VCC[044]
F28
VCC[045]
H30
VCC[046]
H28
VCC[047]
D26
VCC[048]
F26
VCC[049]
H26
VCC[050]
K30
VCC[051]
K28
VCC[052]
M30
VCC[053]
M28
VCC[054]
K26
VCC[055]
M26
VCC[056]
P30
VCC[057]
P28
VCC[058]
T30
VCC[059]
T28
VCC[060]
V30
VCC[061]
V28
VCC[062]
P26
VCC[063]
T26
VCC[064]
V26
VCC[065]
Y30
VCC[066]
Y28
VCC[067]
AB30
VCC[068] AB28
VCC[069] AD30
VCC[070] AD28
VCC[071] Y26
VCC[072] AB26
VCC[073] AD26
VCC[074] AF30
VCC[075] AF28
VCC[076] AH30
VCC[077] AH28
VCC[078] AF26
VCC[079] AH26
VCC[080] AK30
VCC[081] AK28
VCC[082] AM30
VCC[083] AM28
VCC[084] AP30
VCC[085] AP28
VCC[086] AK26
VCC[087] AM26
VCC[088] AP26
VCC[089] AT30
VCC[090] AT28
VCC[091] AV30
VCC[092] AV28
VCC[093] AY30
VCC[094] AY28
VCC[095] AT26
VCC[096] AV26
VCC[097] AY26
VCC[098] BB30
VCC[099] BB28
VCC[100] BD30
VCCA[01] B34
VCCP_004 J37
VCCP_005 K38
VCCP_006 L37
VCCP_007 N37
VCCP_008 P38
VCCP_009 R37
VCCP_010 U37
VCCP_011 V38
VCCP_012 W37
VCCP_013 AA37
VCCP_014 AB38
VCCP_015 AC37
VCCP_016 AE37
VCCSENSE BD12
VID[0] BD8
VID[1] BC7
VID[2] BB10
VID[3] BB8
VID[4] BC5
VID[5] BB4
VID[6] AY4
VSSSENSE BC13
VCCA[02] D34
VCCP_001 J11
VCCP_002 E11
VCCP_003 G11
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CORE +VCCP
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(3/3)-Power
Custom
6 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(3/3)-Power
Custom
6 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(3/3)-Power
Custom
6 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
U1F
PENRYN SFF_UFCBGA956
U1F
PENRYN SFF_UFCBGA956
VCC_101
BD28
VCC_102
BB26
VCC_103
BD26
VCC_104
B22
VCC_105
B24
VCC_106
D22
VCC_107
D24
VCC_108
F24
VCC_109
F22
VCC_110
H24
VCC_111
H22
VCC_112
K24
VCC_113
K22
VCC_114
M24
VCC_115
M22
VCC_116
P24
VCC_117
P22
VCC_118
T24
VCC_119
T22
VCC_120
V24
VCC_121
V22
VCC_122
Y24
VCC_123
Y22
VCC_124
AB24
VCC_125
AB22
VCC_126
AD24
VCC_127
AD22
VCC_128
AF24
VCC_129
AF22
VCC_130
AH24
VCC_131
AH22
VCC_132
AK24
VCC_133
AK22
VCC_134
AM24
VCC_135
AM22
VCC_136
AP24
VCC_137
AP22
VCC_138
AT24
VCC_139
AT22
VCC_140
AV24
VCC_141
AV22
VCC_142
AY24
VCC_143
AY22
VCC_144
BB24
VCC_145
BB22
VCC_146
BD24
VCC_147
BD22
VCC_148
B16
VCC_149
B18
VCC_150
B20
VCC_151
D16
VCC_152
D18
VCC_153
F18
VCC_154
F16
VCC_155
H18
VCC_156
H16
VCC_157
D20
VCC_158
F20
VCC_159
H20
VCC_160
K18
VCC_161
K16
VCC_162
M18
VCC_163
M16
VCC_164
K20
VCC_165
M20
VCC_166
P18
VCC_167
P16
VCC_168
T18
VCC_169
T16
VCC_170
V18
VCC_171
V16
VCC_172
P20
VCC_173
T20
VCC_174
V20
VCC_175
Y18
VCC_176
Y16
VCC_177
AB18
VCC_178
AB16
VCC_179
AD18
VCC_180
AD16
VCC_181
Y20
VCC_182
AB20
VCC_183
AD20
VCC_184
AF18
VCC_185
AF16
VCC_186
AH18
VCC_187
AH16
VCC_188
AF20
VCC_189
AH20
VCC_190
AK18
VCC_191
AK16
VCC_192
AM18
VCC_193
AM16
VCC_194
AP18
VCC_195
AP16
VCC_196
AK20
VCC_197
AM20
VCC_198
AP20
VCC_199
AT18
VCC_200
AT16
VCC_201
AV18
VCC_202
AV16
VCC_203
AY18
VCC_204
AY16
VCC_205
AT20
VCC_206
AV20
VCC_207
AY20
VCC_208
BB18
VCC_209
BB16
VCC_210
BD18
VCC_211
BD16
VCC_212
BB20
VCC_213
BD20
VCC_214
AM14
VCC_215
AP14
VCC_216
AT14
VCC_217
AV14
VCC_218
AY14
VCC_219
BB14
VCC_220
BD14
VCCP_020
AK38
VCCP_021 AL37
VCCP_022 AN37
VCCP_023 AP38
VCCP_024 B32
VCCP_025 C33
VCCP_026 D32
VCCP_027 E35
VCCP_028 E33
VCCP_029 F34
VCCP_030 G35
VCCP_031 F36
VCCP_032 H36
VCCP_033 J35
VCCP_034 L35
VCCP_035 N35
VCCP_036 K36
VCCP_037 R35
VCCP_038 U35
VCCP_039 P36
VCCP_040 V36
VCCP_041 W35
VCCP_042 AA35
VCCP_043 AC35
VCCP_044 AB36
VCCP_045 AE35
VCCP_046 AG35
VCCP_047 AJ35
VCCP_048 AF36
VCCP_049 AL35
VCCP_050 AN35
VCCP_051 AK36
VCCP_052 AP36
VCCP_053 B12
VCCP_054 B14
VCCP_055 C13
VCCP_056 D12
VCCP_057 D14
VCCP_058 E13
VCCP_059 F14
VCCP_060 F12
VCCP_061 G13
VCCP_062 H14
VCCP_063 H12
VCCP_064 J13
VCCP_065 K14
VCCP_066 K12
VCCP_067 L13
VCCP_068 L11
VCCP_069 M14
VCCP_070 N13
VCCP_071 N11
VCCP_072 K10
VCCP_073 P14
VCCP_074 P12
VCCP_075 R13
VCCP_076 R11
VCCP_077 T14
VCCP_078 U13
VCCP_079 U11
VCCP_080 V14
VCCP_081 V12
VCCP_082 W13
VCCP_083 W11
VCCP_084 P10
VCCP_085 V10
VCCP_086 Y14
VCCP_087 AA13
VCCP_088 AA11
VCCP_089 AB14
VCCP_090 AB12
VCCP_091 AC13
VCCP_092 AC11
VCCP_093 AD14
VCCP_094 AB10
VCCP_095 AE13
VCCP_096 AE11
VCCP_097 AF14
VCCP_098 AF12
VCCP_099 AG13
VCCP_100 AG11
VCCP_101 AH14
VCCP_102 AJ13
VCCP_103 AJ11
VCCP_104 AF10
VCCP_105 AK14
VCCP_106 AK12
VCCP_107 AL13
VCCP_108 AL11
VCCP_109 AN13
VCCP_110 AN11
VCCP_111 AP12
VCCP_112 AR13
VCCP_113 AR11
VCCP_114 AK10
VCCP_115 AP10
VCCP_116 AU13
VCCP_117 AU11
VCCP_118 L9
VCCP_119 L7
VCCP_120 N9
VCCP_121 N7
VCCP_122 R9
VCCP_123 R7
VCCP_124 U9
VCCP_125 U7
VCCP_126 W9
VCCP_127 W7
VCCP_128 AA9
VCCP_129 AA7
VCCP_130 AC9
VCCP_131 AC7
VCCP_132 AE9
VCCP_133 AE7
VCCP_134 AG9
VCCP_135 AG7
VCCP_136 AJ9
VCCP_137 AJ7
VCCP_138 AL9
VCCP_139 AL7
VCCP_140 AN9
VCCP_141 AN7
VCCP_142 AR9
VCCP_143 AR7
VCCP_144 A33
VCCP_145 A13
VCCP_018
AG37
VCCP_019
AJ37
VCCP_017
AF38
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(3/3)-GND/Bypass
Custom
7 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(3/3)-GND/Bypass
Custom
7 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Penryn(3/3)-GND/Bypass
Custom
7 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
ESR <= 1.5m ohm
Near CPU CORE regulator
Del C37 to improve power plan. 6/14
Mid Frequence Decoupling
High Frequence Decoupling
6/14 :Replace 12pcs 10uF_0805 to 24 pcs 1uF_0402 for CPU transient fail issue.
C9
10U_0603_6.3V6M
C9
10U_0603_6.3V6M
1
2
C48
1U_0402_6.3V6K
C48
1U_0402_6.3V6K
1
2
U1E
PENRYN SFF_UFCBGA956
U1E
PENRYN SFF_UFCBGA956
VSS_164
G25
VSS_165
G23
VSS_166
G21
VSS_167
J25
VSS_168
J23
VSS_169
J21
VSS_170
L25
VSS_171
L23
VSS_172
L21
VSS_173
N25
VSS_174
N23
VSS_175
N21
VSS_176
R25
VSS_177
R23
VSS_178
R21
VSS_179
U25
VSS_180
U23
VSS_181
U21
VSS_182
W25
VSS_183
W23
VSS_184
W21
VSS_185
AA25
VSS_186
AA23
VSS_187
AA21
VSS_188
AC25
VSS_189
AC23
VSS_190
AC21
VSS_191
AE25
VSS_192
AE23
VSS_193
AE21
VSS_194
AG25
VSS_195
AG23
VSS_196
AG21
VSS_197
AJ25
VSS_198
AJ23
VSS_199
AJ21
VSS_200
AL25
VSS_201
AL23
VSS_202
AL21
VSS_203
AN25
VSS_204
AN23
VSS_205
AN21
VSS_206
AR25
VSS_207
AR23
VSS_208
AR21
VSS_209
AU25
VSS_210
AU23
VSS_211
AU21
VSS_212
AW25
VSS_213
AW23
VSS_214
AW21
VSS_215
BA25
VSS_216
BA23
VSS_217
BA21
VSS_218
BC25
VSS_219
BC23
VSS_220
BC21
VSS_221
C17
VSS_222
C19
VSS_223
E19
VSS_224
E17
VSS_225
G19
VSS_226
G17
VSS_227
J19
VSS_228
J17
VSS_229
L19
VSS_230
L17
VSS_231
N19
VSS_232
N17
VSS_233
R19
VSS_234
R17
VSS_235
U19
VSS_236
U17
VSS_237
W19
VSS_238
W17
VSS_239
AA19
VSS_240
AA17
VSS_241
AC19
VSS_242
AC17
VSS_243
AE19
VSS_244
AE17
VSS_245
AG19
VSS_246
AG17
VSS_247
AJ19
VSS_248
AJ17
VSS_249
AL19
VSS_250
AL17
VSS_251
AN19
VSS_252
AN17
VSS_253
AR19
VSS_254
AR17
VSS_255
AU19
VSS_256
AU17
VSS_257
AW19
VSS_258
AW17
VSS_259
BA19
VSS_260
BA17
VSS_261
BC19
VSS_262
BC17
VSS_263
C11
VSS_264
C15
VSS_265
E15
VSS_266
G15
VSS_267
H10
VSS_268
M12
VSS_269
J15
VSS_270
L15
VSS_271
N15
VSS_272
M10
VSS_273
T12
VSS_274
R15
VSS_275
U15
VSS_276
W15
VSS_277
T10
VSS_278
Y12
VSS_280 AA15
VSS_281 AC15
VSS_282 Y10
VSS_283 AD10
VSS_284 AH12
VSS_285 AE15
VSS_286 AG15
VSS_287 AJ15
VSS_288 AH10
VSS_289 AM12
VSS_290 AL15
VSS_291 AN15
VSS_292 AR15
VSS_293 AM10
VSS_294 AT12
VSS_295 AV12
VSS_296 AW13
VSS_297 AW11
VSS_298 AY12
VSS_299 AU15
VSS_300 AW15
VSS_301 AT10
VSS_302 BA13
VSS_303 BA11
VSS_304 BB12
VSS_305 BC11
VSS_306 BA15
VSS_307 BC15
VSS_308 B6
VSS_309 D6
VSS_310 E9
VSS_311 F6
VSS_312 G9
VSS_313 H6
VSS_314 K8
VSS_315 K6
VSS_316 M8
VSS_317 M6
VSS_318 P8
VSS_319 P6
VSS_320 T8
VSS_321 T6
VSS_322 V8
VSS_323 V6
VSS_324 U5
VSS_325 Y8
VSS_326 Y6
VSS_327 AB8
VSS_328 AB6
VSS_329 AD8
VSS_330 AD6
VSS_331 AF8
VSS_332 AF6
VSS_333 AH8
VSS_334 AH6
VSS_335 AK8
VSS_336 AK6
VSS_337 AM8
VSS_338 AM6
VSS_339 AP8
VSS_340 AP6
VSS_341 AT8
VSS_342 AT6
VSS_343 AU9
VSS_344 AV6
VSS_345 AU7
VSS_346 AW9
VSS_347 AY6
VSS_348 BA9
VSS_349 BB6
VSS_350 BC9
VSS_351 BD6
VSS_352 B4
VSS_353 C3
VSS_354 E3
VSS_355 G3
VSS_356 J3
VSS_357 L3
VSS_358 N3
VSS_359 R3
VSS_360 U3
VSS_361 W3
VSS_362 AA3
VSS_363 AC3
VSS_364 AE3
VSS_365 AG3
VSS_366 AJ3
VSS_367 AL3
VSS_368 AN3
VSS_369 AR3
VSS_370 AU3
VSS_371 AW3
VSS_372 BA3
VSS_373 BC3
VSS_374 D2
VSS_375 E1
VSS_376 G1
VSS_377 AW1
VSS_378 BA1
VSS_379 BB2
VSS_380 A41
VSS_381 A39
VSS_382 A29
VSS_383 A27
VSS_384 A31
VSS_385 A25
VSS_386 A23
VSS_387 A21
VSS_388 A19
VSS_389 A17
VSS_390 A11
VSS_391 A15
VSS_392 A7
VSS_393 A5
VSS_394 A9
VSS_279
AD12 VSS_395 BD4
C66
1U_0402_6.3V6K
C66
1U_0402_6.3V6K
1
2
C70
1U_0402_6.3V6K
C70
1U_0402_6.3V6K
1
2
C16
10U_0603_6.3V6M
C16
10U_0603_6.3V6M
1
2
C64
1U_0402_6.3V6K
C64
1U_0402_6.3V6K
1
2
C27
10U_0603_6.3V6M
C27
10U_0603_6.3V6M
1
2
C54
1U_0402_6.3V6K
C54
1U_0402_6.3V6K
1
2
C17
10U_0603_6.3V6M
C17
10U_0603_6.3V6M
1
2
+
C57
220U_D2_2VK_R9
+
C57
220U_D2_2VK_R9
1
2
C38
1U_0402_6.3V6K
C38
1U_0402_6.3V6K
1
2
C41
1U_0402_6.3V6K
C41
1U_0402_6.3V6K
1
2
C30
10U_0603_6.3V6M
C30
10U_0603_6.3V6M
1
2
C37
1U_0402_6.3V6K
C37
1U_0402_6.3V6K
1
2
C46
1U_0402_6.3V6K
C46
1U_0402_6.3V6K
1
2
U1D
PENRYN SFF_UFCBGA956
U1D
PENRYN SFF_UFCBGA956
VSS[082] AM36
VSS[148] AW29
VSS[002]
F44
VSS[003]
D44
VSS[004]
D42
VSS[005]
F42
VSS[006]
H42
VSS[007]
K42
VSS[008]
M42
VSS[009]
P42
VSS[010]
T42
VSS[011]
V42
VSS[012]
Y42
VSS[013]
AB42
VSS[014]
AD42
VSS[015]
AF42
VSS[016]
AH42
VSS[017]
AK42
VSS[018]
AM42
VSS[019]
AP42
VSS[020]
AY44
VSS[021]
AV44
VSS[022]
AT42
VSS[023]
AV42
VSS[024]
AY42
VSS[025]
BA43
VSS[026]
BB42
VSS[027]
C39
VSS[028]
E39
VSS[029]
G37
VSS[030]
H38
VSS[031]
J39
VSS[032]
L39
VSS[033]
M38
VSS[034]
N39
VSS[035]
R39
VSS[036]
T38
VSS[037]
U39
VSS[038]
W39
VSS[039]
Y38
VSS[040]
AA39
VSS[041]
AC39
VSS[042]
AD38
VSS[043]
AE39
VSS[044]
AG39
VSS[045]
AH38
VSS[046]
AJ39
VSS[047]
AL39
VSS[048]
AM38
VSS[049]
AN39
VSS[050]
AR39
VSS[051]
AR37
VSS[052]
AT38
VSS[053]
AU39
VSS[054]
AU37
VSS[055]
AW39
VSS[056]
AW37
VSS[057]
BA39
VSS[058]
BC41
VSS[059]
BD40
VSS[060]
BD38
VSS[061]
B36
VSS[062]
H34
VSS[063]
D36
VSS[064]
K34
VSS[065]
M34
VSS[066]
M36
VSS[067]
P34
VSS[068]
T34
VSS[069]
V34
VSS[070]
T36
VSS[071]
Y34
VSS[072]
AB34
VSS[073]
AD34
VSS[074]
Y36
VSS[075]
AD36
VSS[076]
AF34
VSS[077]
AH34
VSS[078]
AH36
VSS[079]
AK34
VSS[080]
AM34
VSS[081]
AP34 VSS[162] E23
VSS[161] E25
VSS[160] C25
VSS[159] C23
VSS[158] C21
VSS[157] BC31
VSS[156] BA31
VSS[155] BC27
VSS[154] BC29
VSS[153] BA27
VSS[152] BA29
VSS[151] AW31
VSS[083] AR35
VSS[084] AU35
VSS[085] AV34
VSS[086] AW35
VSS[087] AW33
VSS[088] AY34
VSS[089] AT36
VSS[090] AV36
VSS[091] BA33
VSS[092] BC33
VSS[093] BB36
VSS[094] BD36
VSS[095] C27
VSS[096] C29
VSS[097] C31
VSS[098] E29
VSS[099] E27
VSS[100] G29
VSS[101] G27
VSS[102] E31
VSS[103] G31
VSS[104] J29
VSS[105] J27
VSS[107] L27
VSS[108] N29
VSS[109] N27
VSS[110] J31
VSS[111] L31
VSS[112] N31
VSS[113] R29
VSS[114] R27
VSS[115] U29
VSS[116] U27
VSS[117] R31
VSS[118] U31
VSS[119] W29
VSS[120] W27
VSS[121] W31
VSS[122] AA29
VSS[123] AA27
VSS[124] AC29
VSS[125] AC27
VSS[126] AA31
VSS[127] AC31
VSS[128] AE29
VSS[129] AE27
VSS[130] AG29
VSS[131] AG27
VSS[132] AJ29
VSS[133] AJ27
VSS[134] AE31
VSS[135] AG31
VSS[136] AJ31
VSS[137] AL29
VSS[138] AL27
VSS[139] AN29
VSS[140] AN27
VSS[141] AL31
VSS[142] AN31
VSS[143] AR29
VSS[144] AR27
VSS[145] AR31
VSS[146] AU29
VSS[106] L29
VSS[001]
B42
VSS[149] AW27
VSS[150] AU31
VSS[147] AU27
VSS[163] E21
C35
1U_0402_6.3V6K
C35
1U_0402_6.3V6K
1
2
C47
1U_0402_6.3V6K
C47
1U_0402_6.3V6K
1
2
C33
1U_0402_6.3V6K
C33
1U_0402_6.3V6K
1
2
+
C56
220U_D2_2VK_R9
+
C56
220U_D2_2VK_R9
1
2
C45
1U_0402_6.3V6K
C45
1U_0402_6.3V6K
1
2
C31
10U_0603_6.3V6M
C31
10U_0603_6.3V6M
1
2
C25
10U_0603_6.3V6M
C25
10U_0603_6.3V6M
1
2
C39
1U_0402_6.3V6K
C39
1U_0402_6.3V6K
1
2
C68
1U_0402_6.3V6K
C68
1U_0402_6.3V6K
1
2
C42
1U_0402_6.3V6K
C42
1U_0402_6.3V6K
1
2
C34
1U_0402_6.3V6K
C34
1U_0402_6.3V6K
1
2
C8
10U_0603_6.3V6M
C8
10U_0603_6.3V6M
1
2
C21
10U_0603_6.3V6M
C21
10U_0603_6.3V6M
1
2
C22
10U_0603_6.3V6M
C22
10U_0603_6.3V6M
1
2
C69
1U_0402_6.3V6K
C69
1U_0402_6.3V6K
1
2
C11
10U_0603_6.3V6M
C11
10U_0603_6.3V6M
1
2
C51
1U_0402_6.3V6K
C51
1U_0402_6.3V6K
1
2
C55
1U_0402_6.3V6K
C55
1U_0402_6.3V6K
1
2
C14
10U_0603_6.3V6M
C14
10U_0603_6.3V6M
1
2
C67
1U_0402_6.3V6K
C67
1U_0402_6.3V6K
1
2
C15
10U_0603_6.3V6M
C15
10U_0603_6.3V6M
1
2
C13
10U_0603_6.3V6M
C13
10U_0603_6.3V6M
1
2
C63
1U_0402_6.3V6K
C63
1U_0402_6.3V6K
1
2
C65
1U_0402_6.3V6K
C65
1U_0402_6.3V6K
1
2
C40
1U_0402_6.3V6K
C40
1U_0402_6.3V6K
1
2
C12
10U_0603_6.3V6M
C12
10U_0603_6.3V6M
1
2
C60
1U_0402_6.3V6K
C60
1U_0402_6.3V6K
1
2
C19
10U_0603_6.3V6M
C19
10U_0603_6.3V6M
1
2
C59
1U_0402_6.3V6K
C59
1U_0402_6.3V6K
1
2
C18
10U_0603_6.3V6M
C18
10U_0603_6.3V6M
1
2
+
C58
220U_D2_2VK_R9
+
C58
220U_D2_2VK_R9
1
2
C61
1U_0402_6.3V6K
C61
1U_0402_6.3V6K
1
2
C53
1U_0402_6.3V6K
C53
1U_0402_6.3V6K
1
2
C28
10U_0603_6.3V6M
C28
10U_0603_6.3V6M
1
2
C24
10U_0603_6.3V6M
C24
10U_0603_6.3V6M
1
2
C52
1U_0402_6.3V6K
C52
1U_0402_6.3V6K
1
2
C49
1U_0402_6.3V6K
C49
1U_0402_6.3V6K
1
2
C44
1U_0402_6.3V6K
C44
1U_0402_6.3V6K
1
2
C36
1U_0402_6.3V6K
C36
1U_0402_6.3V6K
1
2
C50
1U_0402_6.3V6K
C50
1U_0402_6.3V6K
1
2
C32
1U_0402_6.3V6K
C32
1U_0402_6.3V6K
1
2
C23
10U_0603_6.3V6M
C23
10U_0603_6.3V6M
1
2
C29
10U_0603_6.3V6M
C29
10U_0603_6.3V6M
1
2
C43
1U_0402_6.3V6K
C43
1U_0402_6.3V6K
1
2
C26
10U_0603_6.3V6M
C26
10U_0603_6.3V6M
1
2
C20
10U_0603_6.3V6M
C20
10U_0603_6.3V6M
1
2
C62
1U_0402_6.3V6K
C62
1U_0402_6.3V6K
1
2
C10
10U_0603_6.3V6M
C10
10U_0603_6.3V6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_EXTTS#0
PM_EXTTS#1
SMRCOMP_VOH
SMRCOMP_VOL
SMRCOMP#
SMRCOMP
DDR3_NB_REF
H_RCOMP
H_SWNG
H_D#32
H_D#24
H_D#19
H_D#59
H_D#42
H_D#36
H_D#3
H_D#40
H_RCOMP
H_D#55
H_D#4
H_D#60
H_D#30
H_D#34
H_D#27
H_D#1
H_D#23
H_D#51
H_D#48
H_D#46
H_D#44
H_D#39
H_D#22
H_D#15
H_D#14
H_D#9
H_D#56
H_D#54
H_D#8
H_D#37
H_D#35
H_D#28
H_D#25
H_D#12
H_D#38
H_D#26
H_D#11
H_D#7
H_D#53
H_D#52
H_D#41
H_D#18
H_D#10
H_VREF
H_D#57
H_D#33
H_D#29
H_SWNG
H_D#6
H_D#45
H_D#43
H_D#20
H_D#61
H_D#17
H_D#63
H_D#58
H_D#21
H_D#16
H_D#50
H_D#62
H_D#5
H_D#49
H_D#31
H_D#2
H_D#47
H_D#13
H_D#0
PM_EXTTS#1
PM_EXTTS#0
CL_VREF
TSATN#
H_A#7
H_A#12
H_A#32
H_A#24
H_A#3
H_A#18
H_A#21
H_A#16
H_A#19
H_A#31
H_A#27
H_A#5
H_A#30
H_A#9
H_A#26
H_A#14
H_A#11
H_A#22
H_A#23
H_A#34
H_A#20
H_A#8
H_A#15
H_A#6
H_A#25
H_A#17
H_A#4
H_A#13
H_A#33
H_A#29
H_A#28
H_A#10
H_A#35
H_VREF
SM_DRAMRST#
SM_REXT
DDR3_NB_REF
TCK
TMS
TDI
TDO
SMRCOMP_VOL
SMRCOMP_VOH
SM_PWROK
H_D#[0..63][5]
H_CPUSLP#[5]
DDR_CKE0_DIMMA [14]
DDR_CKE1_DIMMA [14]
DDR_CS0_DIMMA# [14]
DDR_CS1_DIMMA# [14]
M_CLK_DDR0 [14]
M_CLK_DDR1 [14]
M_CLK_DDR#0 [14]
M_CLK_DDR#1 [14]
M_ODT0 [14]
M_ODT1 [14]
DMI_TXP0 [24]
DMI_RXN0 [24]
DMI_RXP0 [24]
DMI_TXN0 [24]
CLKREQ#_B [16]
MCH_ICH_SYNC# [24]
CL_CLK0 [24]
CL_DATA0 [24]
M_PWROK [24]
H_RESET#[4]
DMI_TXN1 [24]
DMI_TXN2 [24]
DMI_TXN3 [24]
DMI_TXP1 [24]
DMI_TXP2 [24]
DMI_TXP3 [24]
DMI_RXN1 [24]
DMI_RXN2 [24]
DMI_RXN3 [24]
DMI_RXP1 [24]
DMI_RXP2 [24]
DMI_RXP3 [24]
PM_BMBUSY#[24]
PM_DPRSLPVR[24,31]
H_DPRSTP#[5,23,31] PM_EXTTS#0[14]
H_THERMTRIP#[4,23]
CFG5[10]
CFG9[10] CFG10[10]
CFG6[10] CFG7[10]
CFG13[10] CFG12[10]
CFG16[10]
CFG20[10] CFG19[10]
MCH_CLKSEL0[16] MCH_CLKSEL1[16] MCH_CLKSEL2[16]
PLT_RST#[17,22,26]
CL_RST# [24]
CLK_MCH_3GPLL [16]
CLK_MCH_3GPLL# [16]
H_A#[3..35] [4]
H_ADS# [4]
H_ADSTB#1 [4]
H_ADSTB#0 [4]
H_BPRI# [4]
H_BNR# [4]
H_DEFER# [4]
H_BR0# [4]
H_DBSY# [4]
CLK_MCH_BCLK# [16]
H_DPWR# [5]
CLK_MCH_BCLK [16]
H_DRDY# [4]
H_HIT# [4]
H_HITM# [4]
H_LOCK# [4]
H_TRDY# [4]
H_DSTBN#0 [5]
H_DSTBN#1 [5]
H_DSTBN#2 [5]
H_DSTBN#3 [5]
H_REQ#3 [4]
H_REQ#2 [4]
H_REQ#1 [4]
H_REQ#4 [4]
H_REQ#0 [4]
H_DINV#0 [5]
H_DINV#1 [5]
H_DINV#2 [5]
H_DINV#3 [5]
H_DSTBP#0 [5]
H_DSTBP#1 [5]
H_DSTBP#2 [5]
H_DSTBP#3 [5]
H_RS#2 [4]
H_RS#1 [4]
H_RS#0 [4]
M_CLK_DDR2 [15]
M_CLK_DDR3 [15]
M_CLK_DDR#2 [15]
M_CLK_DDR#3 [15]
DDR_CKE2_DIMMB [15]
DDR_CKE3_DIMMB [15]
DDR_CS2_DIMMB# [15]
DDR_CS3_DIMMB# [15]
M_ODT2 [15]
M_ODT3 [15]
PM_PWROK[24,26,31]
SM_DRAMRST# [14,15]
1.5V_PGOOD [28]
PM_EXTTS#1[15]
+VCCP
+VCCP
+3VS
+1.5V
+1.5V
+VCCP
+VCCP
+3VS
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(1/6)-AGTL/DMI/DDR
Custom
8 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(1/6)-AGTL/DMI/DDR
Custom
8 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(1/6)-AGTL/DMI/DDR
Custom
8 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
Layout Note: V_DDR_MCH_REF trace
width and spacing is 20/20.
Near B6 pin
within 100 mils from NB
layout note:
Route H_SCOMP and H_SCOMP# with trace width,
spacing and impedance (55 ohm) same as FSB data
traces
Trace < = 500mils
layout note:
Place them close to U4 pin BC51.
Modify in 9/26
Add R428 in 9/26
Del R48. 9/27
Add them for Boundary Scan. 10/23
T19T19
T34T34
C78
0.1U_0402_16V4Z
@
C78
0.1U_0402_16V4Z
@
1
2
C77
0.1U_0402_16V4Z
C77
0.1U_0402_16V4Z
1
2
R56
221_0603_1%
R56
221_0603_1%
12
T21T21
R53
499_0402_1%
R53
499_0402_1%
12
T25T25
T14T14
T26T26
C71
2.2U_0603_6.3V4Z
C71
2.2U_0603_6.3V4Z
1
2
R57
10K_0402_1%
R57
10K_0402_1%
12
R60
24.9_0402_1%
R60
24.9_0402_1%
12
R48
1K_0402_1%
R48
1K_0402_1%
12
C76
0.1U_0402_16V4Z
C76
0.1U_0402_16V4Z
1
2
R38 1K_0402_5%@R38 1K_0402_5%@
1 2
R47 499_0402_1%R47 499_0402_1%
1 2
R40 4.7K_0402_5%@R40 4.7K_0402_5%@
1 2
T20T20
R592K_0402_1%
<BOM Structure>
R592K_0402_1%
<BOM Structure>
12
C79
0.1U_0402_16V4Z
C79
0.1U_0402_16V4Z
1
2
R62 10K_0402_5%
R62 10K_0402_5%
1 2
R63 10K_0402_5%R63 10K_0402_5%
1 2
T16T16
T36T36
T37T37
C73
2.2U_0603_6.3V4Z
C73
2.2U_0603_6.3V4Z
1
2
R50 100_0402_1% R50 100_0402_1%
1 2
T28T28
T33T33
T17T17
R43 80.6_0402_1%
R43 80.6_0402_1%
1 2
R429 0_0402_5%R429 0_0402_5%
1 2
R44 80.6_0402_1%R44 80.6_0402_1%
1 2
R52
1K_0402_1%
R52
1K_0402_1%
12
R41 1K_0402_5%@R41 1K_0402_5%@
1 2
R49 0_0402_5%R49 0_0402_5%
1 2
R46 10K_0402_1%@R46 10K_0402_1%@
1 2
HOST
U3A
CANTIGA GMCH SFF_FCBGA1363
HOST
U3A
CANTIGA GMCH SFF_FCBGA1363
H_A#_10 J15
H_A#_11 D16
H_A#_12 C17
H_A#_13 D14
H_A#_14 K16
H_A#_15 F16
H_A#_16 B16
H_A#_17 C21
H_A#_18 D18
H_A#_19 J19
H_A#_20 J21
H_A#_21 B18
H_A#_22 D22
H_A#_23 G19
H_A#_24 J17
H_A#_25 L21
H_A#_26 L19
H_A#_27 G21
H_A#_28 D20
H_A#_29 K22
H_A#_3 L15
H_A#_30 F18
H_A#_31 K20
H_A#_4 B14
H_A#_5 C15
H_A#_6 D12
H_A#_7 F14
H_A#_8 G17
H_A#_9 B12
H_ADS# F10
H_ADSTB#_0 A15
H_ADSTB#_1 C19
H_BNR# C9
H_BPRI# B8
H_BREQ# C11
HPLL_CLK# AJ11
H_CPURST#
J11
HPLL_CLK AH10
H_D#_0
J7
H_REQ#_2 C13
H_REQ#_3 G13
H_D#_1
H6
H_D#_10
M6
H_D#_20
P10
H_D#_30
W11
H_D#_40
AC3
H_D#_50
AD2
H_D#_60
AF12
H_D#_8
L1
H_D#_9
M10
H_DBSY# D6
H_D#_11
N11
H_D#_12
L7
H_D#_13
K6
H_D#_14
M4
H_D#_15
K4
H_D#_16
P6
H_D#_17
W9
H_D#_18
V6
H_D#_19
V2
H_D#_2
L11
H_D#_21
W7
H_D#_22
N9
H_D#_23
P4
H_D#_24
U9
H_D#_25
V4
H_D#_26
U1
H_D#_27
W3
H_D#_28
V10
H_D#_29
U7
H_D#_3
J3
H_D#_31
U11
H_D#_32
AC11
H_D#_33
AC9
H_D#_34
Y4
H_D#_35
Y10
H_D#_36
AB6
H_D#_37
AA9
H_D#_38
AB10
H_D#_39
AA1
H_D#_4
H4
H_D#_41
AC7
H_D#_42
AD12
H_D#_43
AB4
H_D#_44
Y6
H_D#_45
AD10
H_D#_46
AA11
H_D#_47
AB2
H_D#_48
AD4
H_D#_49
AE7
H_D#_5
G3
H_D#_51
AD6
H_D#_52
AE3
H_D#_53
AG9
H_D#_54
AG7
H_D#_55
AE11
H_D#_56
AK6
H_D#_57
AF6
H_D#_58
AJ9
H_D#_59
AH6
H_D#_6
K10
H_D#_61
AH4
H_D#_62
AJ7
H_D#_63
AE9
H_D#_7
K12
H_DEFER# E5
H_DINV#_0 L9
H_DINV#_1 N7
H_DINV#_2 AA7
H_DINV#_3 AG3
H_DPWR# G11
H_DRDY# H2
H_DSTBN#_0 K2
H_DSTBN#_1 N3
H_DSTBN#_2 AA3
H_DSTBN#_3 AF4
H_DSTBP#_0 L3
H_DSTBP#_1 M2
H_DSTBP#_2 Y2
H_DSTBP#_3 AF2
H_AVREF
L17
H_DVREF
K18
H_TRDY# D8
H_HIT# C7
H_HITM# F8
H_LOCK# A11
H_REQ#_0 J13
H_REQ#_1 L13
H_REQ#_4 G15
H_A#_32 F20
H_A#_33 F22
H_A#_34 B20
H_A#_35 A19
H_SWING
B6
H_CPUSLP#
G9
H_RCOMP
D4
H_RS#_0 F4
H_RS#_1 F2
H_RS#_2 G7
T38T38
T31T31
T30T30
R58 54.9_0402_1%R58 54.9_0402_1%
1 2
R55
1K_0402_1%
R55
1K_0402_1%
12
C74
0.01U_0402_25V7K
C74
0.01U_0402_25V7K
1
2
T15T15
C750.1U_0402_16V4Z@C750.1U_0402_16V4Z@
1
2
R39 4.7K_0402_5%@R39 4.7K_0402_5%@
1 2
T18T18
PM
MISC
NC
CLK
DMI
CFGRSVD
GRAPHICS VID
ME
HDA DDR CLK/ CONTROL/COMPENSATION
U3B
CANTIGA GMCH SFF_FCBGA1363
PM
MISC
NC
CLK
DMI
CFGRSVD
GRAPHICS VID
ME
HDA DDR CLK/ CONTROL/COMPENSATION
U3B
CANTIGA GMCH SFF_FCBGA1363
SA_CK_0 BB32
SA_CK_1 BA25
SB_CK_0 BA33
SA_CK#_0 BA31
SA_CK#_1 BC25
SB_CK#_0 BC33
SA_CKE_0 BC35
SA_CKE_1 BE33
SB_CKE_0 BE37
SB_CKE_1 BC37
SA_CS#_0 BK18
SA_CS#_1 BK16
SB_CS#_0 BE23
SB_CS#_1 BC19
SA_ODT_0 BJ17
SA_ODT_1 BJ19
SB_ODT_0 BC17
SB_ODT_1 BE17
SM_RCOMP BL25
SM_RCOMP# BK26
SM_VREF BC51
CFG_2
G25
CFG_0
K26
CFG_1
G23
CFG_3
J25
CFG_4
L25
CFG_5
L27
CFG_6
F24
CFG_7
D24
CFG_8
D26
CFG_9
J23
CFG_10
B26
CFG_11
A23
CFG_12
C23
CFG_13
B24
CFG_14
B22
CFG_15
K24
CFG_16
C25
CFG_17
L23
PM_SYNC#
J35
PM_EXT_TS#_0
J39
PM_EXT_TS#_1
L39
PWROK
AY39
RSTIN#
BB18
DPLL_REF_CLK B42
DPLL_REF_CLK# D42
DPLL_REF_SSCLK B50
DPLL_REF_SSCLK# D50
DMI_RXN_0 AG55
DMI_RXN_1 AL49
DMI_RXN_2 AH54
DMI_RXN_3 AL47
DMI_RXP_0 AG53
DMI_RXP_1 AK50
DMI_RXP_2 AH52
DMI_RXP_3 AL45
DMI_TXN_0 AG49
DMI_TXN_1 AJ49
DMI_TXN_2 AJ47
DMI_TXN_3 AG47
DMI_TXP_0 AF50
DMI_TXP_1 AH50
DMI_TXP_2 AJ45
DMI_TXP_3 AG45
RSVD10
AN45
RSVD12
AT44 RSVD11
AP44
RSVD13
AN47
PM_DPRSTP#
F6
SB_CK_1 BA23
SB_CK#_1 BB24
RSVD5
AN11
RSVD6
AM10
RSVD7
AK10
RSVD8
AL11
RSVD1
J43
RSVD2
L43
RSVD3
J41
RSVD4
L41
GFX_VID_0 G33
GFX_VID_1 G37
GFX_VID_2 F38
GFX_VID_3 F36
GFX_VR_EN G39
SM_RCOMP_VOH BK32
SM_RCOMP_VOL BL31
THERMTRIP#
K28
DPRSLPVR
K36
RSVD9
F12
CL_CLK AK52
CL_DATA AK54
CL_PWROK AW40
CL_RST# AL53
CL_VREF AL55
NC_1
A7
NC_2
A49
NC_3
A52
NC_4
A54
NC_5
B54
NC_6
D55
NC_7
G55
NC_8
BE55
NC_9
BH55
NC_10
BK55
NC_11
BK54
NC_12
BL54
NC_13
BL52
NC_14
BL49
NC_15
BL7
SDVO_CTRLCLK B38
SDVO_CTRLDATA A37
CLKREQ# C31
RSVD14
C27
ICH_SYNC# K42
PEG_CLK# P50
PEG_CLK R49
TSATN# D10
NC_16
BL4
GFX_VID_4 G35
NC_17
BL2
NC_18
BK2
NC_19
BK1
NC_20
BH1
NC_21
BE1
NC_22
G1
DDPC_CTRLDATA F32
DDPC_CTRLCLK F34
HDA_BCLK C29
HDA_RST# B30
HDA_SDI D28
HDA_SDO A27
HDA_SYNC B28
CFG_18
L33
CFG_19
K32
CFG_20
K34
SM_PWROK AY37
SM_REXT BH20
SM_DRAMRST# BA37
RSVD15
D30
RSVD17
J9
RSVD20
AW42
RSVD22
BB20
RSVD23
BE19
RSVD24
BF20
RSVD25
BF18
T32T32
C72
0.01U_0402_25V7K
C72
0.01U_0402_25V7K
1
2
T39T39
T27T27
T24T24
R61
100_0402_1%
R61
100_0402_1%
12
T12T12
T22T22
R42
1K_0402_1%
R42
1K_0402_1%
12
R45
3.01K_0402_1%
R45
3.01K_0402_1%
12
T23T23
T13T13
R54
10K_0402_1%
R54
10K_0402_1%
12
R51 0_0402_5%R51 0_0402_5%
1 2
T35T35
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D63
DDR_A_D62
DDR_A_D8
DDR_A_D3
DDR_A_D4
DDR_A_D7
DDR_A_D5
DDR_A_D6
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D47
DDR_A_D46
DDR_A_D42
DDR_A_D43
DDR_A_D34
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_D35
DDR_A_D41
DDR_A_D40
DDR_A_D38
DDR_A_D36
DDR_A_D37
DDR_A_D32
DDR_A_D33
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#3
DDR_A_DQS#1
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DM7
DDR_A_DM2
DDR_A_DM5
DDR_A_DM4
DDR_A_DM1
DDR_A_DM6
DDR_A_DM3
DDR_A_DM0
DDR_A_D61
DDR_A_D60
DDR_A_D2
DDR_A_D1
DDR_A_D0
DDR_A_D55
DDR_A_D54
DDR_A_D51
DDR_A_D48
DDR_A_D50
DDR_A_D49
DDR_A_D52
DDR_A_D53
DDR_A_MA14
DDR_A_MA0
DDR_A_MA2
DDR_A_MA1
DDR_A_MA4
DDR_A_MA5
DDR_A_MA3
DDR_A_MA12
DDR_A_MA7
DDR_A_MA6
DDR_A_MA9
DDR_A_MA8
DDR_A_MA13
DDR_A_MA10
DDR_A_MA11
DDR_A_DQS0
DDR_A_D31
DDR_A_DQS2
DDR_A_DQS1
DDR_A_DQS6
DDR_A_DQS5
DDR_A_DQS4
DDR_A_DQS3
DDR_A_DQS7
DDR_A_D14
DDR_A_D15
DDR_A_D25
DDR_A_D24
DDR_A_D26
DDR_A_D27
DDR_A_D30
DDR_A_D9
DDR_A_D13
DDR_A_D12
DDR_A_D10
DDR_A_D11
DDR_A_D29
DDR_A_D28
DDR_A_D19
DDR_A_D20
DDR_A_D16
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D23
DDR_A_DQS#7
DDR_B_D11
DDR_B_D57
DDR_B_D46
DDR_B_D7
DDR_B_D0
DDR_B_D44
DDR_B_D40
DDR_B_D30
DDR_B_D27
DDR_B_D15
DDR_B_D3
DDR_B_D35
DDR_B_D25
DDR_B_D23
DDR_B_D49
DDR_B_D37
DDR_B_D19
DDR_B_D48
DDR_B_D47
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D62
DDR_B_D60
DDR_B_D9
DDR_B_D2
DDR_B_D52
DDR_B_D50
DDR_B_D22
DDR_B_D56
DDR_B_D51
DDR_B_D39
DDR_B_D28
DDR_B_D17
DDR_B_D45
DDR_B_D6
DDR_B_D61
DDR_B_D58
DDR_B_D1
DDR_B_D54
DDR_B_D41
DDR_B_D31
DDR_B_D12
DDR_B_D5
DDR_B_D38
DDR_B_D32
DDR_B_D20
DDR_B_D16
DDR_B_D14
DDR_B_D33
DDR_B_D63
DDR_B_D59
DDR_B_D42
DDR_B_D55
DDR_B_D53
DDR_B_D43
DDR_B_D29
DDR_B_D26
DDR_B_D13
DDR_B_D4
DDR_B_D34
DDR_B_D24
DDR_B_D21
DDR_B_D10
DDR_B_DQS7
DDR_B_MA9
DDR_B_MA0
DDR_B_MA7
DDR_B_DQS0
DDR_B_DM3
DDR_B_DQS1
DDR_B_DM1
DDR_B_DQS5
DDR_B_DM0
DDR_B_DQS#1
DDR_B_MA2
DDR_B_MA13
DDR_B_DM5
DDR_B_MA4
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DM6
DDR_B_DQS4
DDR_B_MA5
DDR_B_MA3
DDR_B_MA11
DDR_B_MA6
DDR_B_DQS3
DDR_B_MA8
DDR_B_MA10
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DM7
DDR_B_MA12
DDR_B_DM4
DDR_B_MA1
DDR_B_DQS2
DDR_B_DQS6
DDR_B_DM2
DDR_B_DQS#6
DDR_B_DQS#2
DDR_B_MA14
DDR_A_BS1 [14]
DDR_A_BS0 [14]
DDR_A_BS2 [14]
DDR_A_D[0..63][14]
DDR_A_DQS#[0..7] [14]
DDR_A_WE# [14]
DDR_A_DM[0..7] [14]
DDR_A_RAS# [14]
DDR_A_MA[0..14] [14]
DDR_A_DQS[0..7] [14]
DDR_A_CAS# [14]
DDR_B_D[0..63][15]
DDR_B_BS0 [15]
DDR_B_BS1 [15]
DDR_B_BS2 [15]
DDR_B_RAS# [15]
DDR_B_CAS# [15]
DDR_B_WE# [15]
DDR_B_DM[0..7] [15]
DDR_B_DQS[0..7] [15]
DDR_B_DQS#[0..7] [15]
DDR_B_MA[0..14] [15]
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(2/6)-DDR2 A/B CH
Custom
9 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(2/6)-DDR2 A/B CH
Custom
9 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(2/6)-DDR2 A/B CH
Custom
9 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
DDR SYSTEM MEMORY A
U3D
CANTIGA GMCH SFF_FCBGA1363
DDR SYSTEM MEMORY A
U3D
CANTIGA GMCH SFF_FCBGA1363
SA_DQ_0
AP46
SA_DQ_1
AU47
SA_DQ_10
AW49
SA_DQ_11
BA49
SA_DQ_12
BC49
SA_DQ_13
AV46
SA_DQ_14
BA47
SA_DQ_15
AY50
SA_DQ_16
BF46
SA_DQ_17
BC47
SA_DQ_18
BF50
SA_DQ_19
BF48
SA_DQ_2
AT46
SA_DQ_20
BC43
SA_DQ_21
BE49
SA_DQ_22
BA43
SA_DQ_23
BE47
SA_DQ_24
BF42
SA_DQ_25
BC39
SA_DQ_26
BF44
SA_DQ_27
BF40
SA_DQ_28
BB40
SA_DQ_29
BE43
SA_DQ_3
AU49
SA_DQ_30
BF38
SA_DQ_31
BE41
SA_DQ_32
BA15
SA_DQ_33
BE11
SA_DQ_34
BE15
SA_DQ_35
BF14
SA_DQ_36
BB14
SA_DQ_37
BC15
SA_DQ_38
BE13
SA_DQ_39
BF16
SA_DQ_4
AR45
SA_DQ_40
BF10
SA_DQ_41
BC11
SA_DQ_42
BF8
SA_DQ_43
BG7
SA_DQ_44
BC7
SA_DQ_45
BC9
SA_DQ_46
BD6
SA_DQ_47
BF12
SA_DQ_48
AV6
SA_DQ_49
BB6
SA_DQ_5
AN49
SA_DQ_50
AW7
SA_DQ_51
AY6
SA_DQ_52
AT10
SA_DQ_53
AW11
SA_DQ_54
AU11
SA_DQ_55
AW9
SA_DQ_56
AR11
SA_DQ_57
AT6
SA_DQ_58
AP6
SA_DQ_59
AL7
SA_DQ_6
AV50
SA_DQ_60
AR7
SA_DQ_61
AT12
SA_DQ_62
AM6
SA_DQ_63
AU7
SA_DQ_7
AP50
SA_DQ_8
AW47
SA_DQ_9
BD50
SA_BS_0 BC21
SA_BS_1 BJ21
SA_BS_2 BJ41
SA_CAS# BK20
SA_MA_0 BC23
SA_MA_1 BF22
SA_MA_2 BE31
SA_MA_3 BC31
SA_MA_4 BH26
SA_MA_5 BJ35
SA_MA_6 BB34
SA_MA_7 BH32
SA_MA_8 BB26
SA_MA_9 BF32
SA_MA_10 BA21
SA_MA_11 BG25
SA_MA_12 BH34
SA_MA_13 BH18
SA_MA_14 BE25
SA_DQS_0 AR47
SA_DQS_1 BA45
SA_DQS_2 BE45
SA_DQS_3 BC41
SA_DQS_4 BC13
SA_DQS_5 BB10
SA_DQS_6 BA7
SA_DQS_7 AN7
SA_DQS#_0 AR49
SA_DQS#_1 AW45
SA_DQS#_2 BC45
SA_DQS#_3 BA41
SA_DQS#_4 BA13
SA_DQS#_5 BA11
SA_DQS#_6 BA9
SA_DQS#_7 AN9
SA_DM_0 AT50
SA_DM_1 BB50
SA_DM_2 BB46
SA_DM_3 BE39
SA_DM_4 BB12
SA_DM_5 BE7
SA_DM_6 AV10
SA_DM_7 AR9
SA_RAS# BH22
SA_WE# BL15
DDR SYSTEM MEMORY B
U3E
CANTIGA GMCH SFF_FCBGA1363
DDR SYSTEM MEMORY B
U3E
CANTIGA GMCH SFF_FCBGA1363
SB_DQ_0
AP54
SB_DQ_1
AM52
SB_DQ_10
BB52
SB_DQ_11
BC53
SB_DQ_12
AV52
SB_DQ_13
AW55
SB_DQ_14
BD52
SB_DQ_15
BC55
SB_DQ_16
BF54
SB_DQ_17
BE51
SB_DQ_18
BH48
SB_DQ_19
BK48
SB_DQ_2
AR55
SB_DQ_20
BE53
SB_DQ_21
BH52
SB_DQ_22
BK46
SB_DQ_23
BJ47
SB_DQ_24
BL45
SB_DQ_25
BJ45
SB_DQ_26
BL41
SB_DQ_27
BH44
SB_DQ_28
BH46
SB_DQ_29
BK44
SB_DQ_3
AV54
SB_DQ_30
BK40
SB_DQ_31
BJ39
SB_DQ_32
BK10
SB_DQ_33
BH10
SB_DQ_34
BK6
SB_DQ_35
BH6
SB_DQ_36
BJ9
SB_DQ_37
BL11
SB_DQ_38
BG5
SB_DQ_39
BJ5
SB_DQ_4
AM54
SB_DQ_40
BG3
SB_DQ_41
BF4
SB_DQ_42
BD4
SB_DQ_43
BA3
SB_DQ_44
BE5
SB_DQ_45
BF2
SB_DQ_46
BB4
SB_DQ_47
AY4
SB_DQ_48
BA1
SB_DQ_49
AP2
SB_DQ_5
AN53
SB_DQ_50
AU1
SB_DQ_51
AT2
SB_DQ_52
AT4
SB_DQ_53
AV4
SB_DQ_54
AU3
SB_DQ_55
AR3
SB_DQ_56
AN1
SB_DQ_57
AP4
SB_DQ_58
AL3
SB_DQ_59
AJ1
SB_DQ_6
AT52
SB_DQ_60
AK4
SB_DQ_61
AM4
SB_DQ_62
AH2
SB_DQ_63
AK2
SB_DQ_7
AU53
SB_DQ_8
AW53
SB_DQ_9
AY52
SB_BS_0 BJ13
SB_BS_1 BK12
SB_BS_2 BK38
SB_CAS# BH14
SB_DM_0 AP52
SB_DM_1 AY54
SB_DM_2 BJ49
SB_DM_3 BJ43
SB_DM_4 BH12
SB_DM_5 BD2
SB_DM_6 AY2
SB_DM_7 AJ3
SB_DQS_0 AR53
SB_DQS_1 BA53
SB_DQS_2 BH50
SB_DQS_3 BK42
SB_DQS_4 BH8
SB_DQS_5 BB2
SB_DQS_6 AV2
SB_DQS_7 AM2
SB_DQS#_0 AT54
SB_DQS#_1 BB54
SB_DQS#_2 BJ51
SB_DQS#_3 BH42
SB_DQS#_4 BK8
SB_DQS#_5 BC3
SB_DQS#_6 AW3
SB_DQS#_7 AN3
SB_MA_0 BJ15
SB_MA_1 BJ33
SB_MA_10 BH16
SB_MA_11 BK36
SB_MA_12 BH38
SB_MA_13 BJ11
SB_MA_2 BH24
SB_MA_3 BA17
SB_MA_4 BF36
SB_MA_5 BH36
SB_MA_6 BF34
SB_MA_7 BK34
SB_MA_8 BJ37
SB_MA_9 BH40
SB_MA_14 BL37
SB_RAS# BE21
SB_WE# BK14
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N2
PEGCOMP
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N7
CFG10[8]
CFG13[8]
CFG12[8]
CFG20[8]
CFG19[8]
CFG7[8]
CFG9[8]
CFG6[8]
CFG5[8]
CFG16[8]
PCIE_MTX_C_GRX_N0 [17]
PCIE_MTX_C_GRX_P0 [17]
PCIE_GTX_C_MRX_N0 [17]
PCIE_GTX_C_MRX_P0 [17]
PCIE_GTX_C_MRX_N1 [17]
PCIE_GTX_C_MRX_N2 [17]
PCIE_GTX_C_MRX_N3 [17]
PCIE_GTX_C_MRX_N4 [17]
PCIE_GTX_C_MRX_N5 [17]
PCIE_GTX_C_MRX_N6 [17]
PCIE_GTX_C_MRX_N7 [17]
PCIE_GTX_C_MRX_N8 [17]
PCIE_GTX_C_MRX_N9 [17]
PCIE_GTX_C_MRX_N10 [17]
PCIE_GTX_C_MRX_N11 [17]
PCIE_GTX_C_MRX_N12 [17]
PCIE_GTX_C_MRX_N13 [17]
PCIE_GTX_C_MRX_N14 [17]
PCIE_GTX_C_MRX_N15 [17]
PCIE_GTX_C_MRX_P1 [17]
PCIE_GTX_C_MRX_P2 [17]
PCIE_GTX_C_MRX_P3 [17]
PCIE_GTX_C_MRX_P4 [17]
PCIE_GTX_C_MRX_P5 [17]
PCIE_GTX_C_MRX_P6 [17]
PCIE_GTX_C_MRX_P7 [17]
PCIE_GTX_C_MRX_P8 [17]
PCIE_GTX_C_MRX_P9 [17]
PCIE_GTX_C_MRX_P10 [17]
PCIE_GTX_C_MRX_P11 [17]
PCIE_GTX_C_MRX_P12 [17]
PCIE_GTX_C_MRX_P13 [17]
PCIE_GTX_C_MRX_P14 [17]
PCIE_GTX_C_MRX_P15 [17]
PCIE_MTX_C_GRX_N1 [17]
PCIE_MTX_C_GRX_N2 [17]
PCIE_MTX_C_GRX_N3 [17]
PCIE_MTX_C_GRX_N4 [17]
PCIE_MTX_C_GRX_N5 [17]
PCIE_MTX_C_GRX_N6 [17]
PCIE_MTX_C_GRX_N7 [17]
PCIE_MTX_C_GRX_N8 [17]
PCIE_MTX_C_GRX_N9 [17]
PCIE_MTX_C_GRX_N10 [17]
PCIE_MTX_C_GRX_N11 [17]
PCIE_MTX_C_GRX_N12 [17]
PCIE_MTX_C_GRX_N13 [17]
PCIE_MTX_C_GRX_N14 [17]
PCIE_MTX_C_GRX_N15 [17]
PCIE_MTX_C_GRX_P1 [17]
PCIE_MTX_C_GRX_P2 [17]
PCIE_MTX_C_GRX_P3 [17]
PCIE_MTX_C_GRX_P4 [17]
PCIE_MTX_C_GRX_P5 [17]
PCIE_MTX_C_GRX_P6 [17]
PCIE_MTX_C_GRX_P7 [17]
PCIE_MTX_C_GRX_P8 [17]
PCIE_MTX_C_GRX_P9 [17]
PCIE_MTX_C_GRX_P10 [17]
PCIE_MTX_C_GRX_P11 [17]
PCIE_MTX_C_GRX_P12 [17]
PCIE_MTX_C_GRX_P13 [17]
PCIE_MTX_C_GRX_P14 [17]
PCIE_MTX_C_GRX_P15 [17]
+3VS
+VCC_PEG
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(3/6)-VGA/LVDS/TV
Custom
10 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(3/6)-VGA/LVDS/TV
Custom
10 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(3/6)-VGA/LVDS/TV
Custom
10 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
000 = FSB 1066MHz
CFG[4:3] Reserved
CFG6 0 = The iTPM Host Interface is enable
1 = The iTPM Host Interface is disable *
Reserved
CFG10 (PCIE Lookback enable)
(Default)11 = Normal Operation
10 = All Z Mode Enabled
00 = Reserved
01 = XOR Mode Enabled
*
0 = Enable
1 = Disable *
CFG9
(PCIE Graphics Lane Reversal)
CFG[2:0] FSB Freq select
Reserved
ReservedCFG[15:14]
Strap Pin Table
ReservedCFG[18:17]
(Lane number in Order)
Others = Reserved
011 = FSB 667MHz
010 = FSB 800MHz
*
1 = Reverse Lane
0 = Reverse Lane,15->0, 14->1
1 = Enabled
0 = Normal Operation
0 = Disabled
*
0 = DMI x 2
*
*
*
1 = PCIE/SDVO are operating simu.
0 = Only PCIE or SDVO is operational.
*
1 = Normal Operation,Lane Number in order
1 = DMI x 4
0 =(TLS)chiper suite with no confidentiality
1 =(TLS)chiper suite with confidentiality
CFG5 (DMI select)
CFG19 (DMI Lane Reversal)
CFG16 (FSB Dynamic ODT)
CFG6
CFG7 (Intel Management
Engine Crypto strap)
CFG20 (PCIE/SDVO concurrent)
CFG11
CFG[13:12] (XOR/ALLZ)
CFG8
PEGCOMP trace width
and spacing is 20/25 mils.
Tie to GND. 9/28
R68 75_0402_5%R68 75_0402_5%
1 2
C514 0.1U_0402_16V7KC514 0.1U_0402_16V7K
1 2
R70 75_0402_5%R70 75_0402_5%
1 2
C527 0.1U_0402_16V7KC527 0.1U_0402_16V7K
1 2
C511 0.1U_0402_16V7KC511 0.1U_0402_16V7K
1 2
R78 2.21K_0402_1%@R78 2.21K_0402_1%@
1 2
C524 0.1U_0402_16V7KC524 0.1U_0402_16V7K
1 2
R83 4.02K_0402_1%@R83 4.02K_0402_1%@
1 2
C508 0.1U_0402_16V7KC508 0.1U_0402_16V7K
1 2
R80 2.21K_0402_1%@R80 2.21K_0402_1%@
1 2
R75 2.21K_0402_1%@R75 2.21K_0402_1%@
1 2
C509 0.1U_0402_16V7KC509 0.1U_0402_16V7K
1 2
C521 0.1U_0402_16V7KC521 0.1U_0402_16V7K
1 2
C506 0.1U_0402_16V7KC506 0.1U_0402_16V7K
1 2
C502 0.1U_0402_16V7KC502 0.1U_0402_16V7K
1 2
C522 0.1U_0402_16V7KC522 0.1U_0402_16V7K
1 2
C505 0.1U_0402_16V7KC505 0.1U_0402_16V7K
1 2
R82 4.02K_0402_1%@ R82 4.02K_0402_1%@
1 2
R74 2.21K_0402_1%@R74 2.21K_0402_1%@
1 2
C503 0.1U_0402_16V7KC503 0.1U_0402_16V7K
1 2
LVDS
PCI-EXPRESS GRAPHICS
TV
VGA
U3C
CANTIGA GMCH SFF_FCBGA1363
LVDS
PCI-EXPRESS GRAPHICS
TV
VGA
U3C
CANTIGA GMCH SFF_FCBGA1363
PEG_COMPI U45
PEG_COMPO T44
PEG_RX#_0 D52
PEG_RX#_1 G49
PEG_RX#_2 K54
PEG_RX#_3 H50
PEG_RX#_4 M52
PEG_RX#_5 N49
PEG_RX#_6 P54
PEG_RX#_7 V46
PEG_RX#_8 Y50
PEG_RX#_9 V52
PEG_RX#_10 W49
PEG_RX#_11 AB54
PEG_RX#_12 AD46
PEG_RX#_13 AC55
PEG_RX#_14 AE49
PEG_RX#_15 AF54
PEG_RX_0 E51
PEG_RX_1 F48
PEG_RX_2 J55
PEG_RX_3 J49
PEG_RX_4 M54
PEG_RX_5 M50
PEG_RX_6 P52
PEG_RX_7 U47
PEG_RX_8 AA49
PEG_RX_9 V54
PEG_RX_10 V50
PEG_RX_11 AB52
PEG_RX_12 AC47
PEG_RX_13 AC53
PEG_RX_14 AD50
PEG_RX_15 AF52
PEG_TX#_0 L47
PEG_TX#_10 AB46
PEG_TX#_3 H54
PEG_TX#_4 L55
PEG_TX#_5 T46
PEG_TX#_7 U49
PEG_TX#_8 T54
PEG_TX#_9 Y46
PEG_TX#_1 F52
PEG_TX#_11 W53
PEG_TX#_12 Y54
PEG_TX#_13 AC49
PEG_TX#_14 AF46
PEG_TX#_15 AD54
PEG_TX#_2 P46
PEG_TX_0 J47
PEG_TX_1 F54
PEG_TX_2 N47
PEG_TX_3 H52
PEG_TX_4 L53
PEG_TX_5 R47
PEG_TX_6 R55
PEG_TX_7 T50
PEG_TX_8 T52
PEG_TX_9 W47
PEG_TX_10 AA47
PEG_TX_11 W55
PEG_TX_12 Y52
PEG_TX_13 AB50
PEG_TX_14 AE47
PEG_TX_15 AD52
L_CTRL_CLK
K38
L_CTRL_DATA
L37
L_DDC_CLK
J37
L_DDC_DATA
L35
L_VDD_EN
B36
LVDS_IBG
F50
LVDS_VBG
H46
LVDS_VREFH
P44
LVDS_VREFL
K46
LVDSA_CLK#
D46
LVDSA_CLK
B46
LVDSA_DATA#_0
G45
LVDSA_DATA#_1
F46
LVDSA_DATA#_2
G41
LVDSA_DATA_1
G47
LVDSA_DATA_2
F40
LVDSB_CLK#
D44
LVDSB_CLK
B44
LVDSB_DATA#_0
B40
LVDSB_DATA#_1
A41
LVDSB_DATA#_2
F42
LVDSB_DATA_1
C41
LVDSB_DATA_2
G43
L_BKLT_EN
C37
TVA_DAC
J27
TVB_DAC
E27
TVC_DAC
G27
TVA_RTN
F26
CRT_BLUE
J29
CRT_DDC_CLK
D36
CRT_DDC_DATA
C35
CRT_GREEN
G29
CRT_HSYNC
J33
CRT_TVO_IREF
D32
CRT_RED
F30
CRT_IRTN
E29
CRT_VSYNC
G31
LVDSA_DATA_0
F44
LVDSB_DATA_0
D40
L_BKLT_CTRL
D38
TV_DCONSEL_0
B34
TV_DCONSEL_1
D34
PEG_TX#_6 R53
LVDSA_DATA#_3
C45
LVDSA_DATA_3
A45
LVDSB_DATA#_3
D48
LVDSB_DATA_3
B48
C519 0.1U_0402_16V7KC519 0.1U_0402_16V7K
1 2
R77 2.21K_0402_1%@R77 2.21K_0402_1%@
1 2
C516 0.1U_0402_16V7KC516 0.1U_0402_16V7K
1 2
C513 0.1U_0402_16V7KC513 0.1U_0402_16V7K
1 2
C500 0.1U_0402_16V7KC500 0.1U_0402_16V7K
1 2
C515 0.1U_0402_16V7KC515 0.1U_0402_16V7K
1 2
C529 0.1U_0402_16V7KC529 0.1U_0402_16V7K
1 2
C526 0.1U_0402_16V7KC526 0.1U_0402_16V7K
1 2
R79 2.21K_0402_1%@R79 2.21K_0402_1%@
1 2
C528 0.1U_0402_16V7KC528 0.1U_0402_16V7K
1 2
R72 2.21K_0402_1%@R72 2.21K_0402_1%@
1 2
C510 0.1U_0402_16V7KC510 0.1U_0402_16V7K
1 2
R69 75_0402_5%R69 75_0402_5%
1 2
C512 0.1U_0402_16V7KC512 0.1U_0402_16V7K
1 2
C518 0.1U_0402_16V7KC518 0.1U_0402_16V7K
1 2
C523 0.1U_0402_16V7KC523 0.1U_0402_16V7K
1 2
C525 0.1U_0402_16V7KC525 0.1U_0402_16V7K
1 2
C531 0.1U_0402_16V7KC531 0.1U_0402_16V7K
1 2
C507 0.1U_0402_16V7KC507 0.1U_0402_16V7K
1 2
C520 0.1U_0402_16V7KC520 0.1U_0402_16V7K
1 2
R81 2.21K_0402_1%@R81 2.21K_0402_1%@
1 2
C504 0.1U_0402_16V7KC504 0.1U_0402_16V7K
1 2
C517 0.1U_0402_16V7KC517 0.1U_0402_16V7K
1 2
C501 0.1U_0402_16V7KC501 0.1U_0402_16V7K
1 2
C530 0.1U_0402_16V7KC530 0.1U_0402_16V7K
1 2
R64 49.9_0402_1%R64 49.9_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VM_A_SM
+1.05VM_PEGPLL
+1.05VM_HPLL
+1.05VM_HPLL
+1.05VM_MPLL
+VCCP
+1.05VM_PEGPLL
+V1.05VM_AXF
+VCCP
+1.05VM_DMI
+1.5V
+1.5V_SM_CK
+VCC_PEG
+VCCP
+1.5V_SM_CK
+3VS_HV
+VCC_PEG
+1.5VS
+1.5VS_QDAC
+1.05VM_DMI
+1.05VM_MPLL
+1.05VM_HPLL
+1.5VS_PEG_BG
+1.5VS
+1.05VM_PEGPLL
+V1.05VM_AXF
+VCCP
+3VS
+VCCP_D
+3VS_HV
+1.5VS_QDAC
+1.05VM_A_SM_CK
+VCCP
+VCCP
+VCCP
+VCCP
+VCCP
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(4/6)-PWR
Custom
11 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(4/6)-PWR
Custom
11 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(4/6)-PWR
Custom
11 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Change to 330u_R9,
casue high
limitation. 12/14
change 0.1U to 22U for wavy issue. 5/20
install 0.1U & 10U for wavy issue. 7/29
For ESD
For disable
internal graphics.
For disable
internal graphics.
For HDMI Disable.
4.7UF issues probabiliy.
It can be "no-stuff".
D1 CH751H-40_SC76
D1 CH751H-40_SC76
2 1
C124
0.1U_0402_16V4Z
C124
0.1U_0402_16V4Z
1
2
C99
10U_0805_6.3V6M
C99
10U_0805_6.3V6M
1
2
C117
4.7U_0805_10V4Z
C117
4.7U_0805_10V4Z
1
2
+
C84
330U_D2E_2.5VM_R9M
+
C84
330U_D2E_2.5VM_R9M
1
2
C107
10U_0805_6.3V6M
C107
10U_0805_6.3V6M
1
2
C86
2.2U_0805_16V4Z
C86
2.2U_0805_16V4Z
1
2
C118
10U_0805_6.3V6M
C118
10U_0805_6.3V6M
1
2
R101 0_0603_5% R101 0_0603_5%
1 2
C130
0.47U_0603_10V7K
C130
0.47U_0603_10V7K
1
2
C98
10U_0805_6.3V6M
C98
10U_0805_6.3V6M
1
2
R94 0_0603_5% R94 0_0603_5%
1 2
R105
BLM18PG181SN1D_0603
R105
BLM18PG181SN1D_0603
1 2
C83
1U_0603_10V4Z
C83
1U_0603_10V4Z
1
2
R104 0_0402_5% R104 0_0402_5%
1 2
R99 0_0805_5%R99 0_0805_5%
1 2
R97 0_0805_5% R97 0_0805_5%
1 2
R95
BLM18PG181SN1D_0603
R95
BLM18PG181SN1D_0603
1 2
R89 0_0805_5%
R89 0_0805_5%
1 2
C97
0.1U_0402_16V4Z
C97
0.1U_0402_16V4Z
1
2
R100 0_0603_5%
R100 0_0603_5%
1 2
C131
0.022U_0402_16V7K
C131
0.022U_0402_16V7K
1
2
R90
0_0603_5%
R90
0_0603_5%
1 2
C125
0.1U_0402_16V4Z
C125
0.1U_0402_16V4Z
1
2
C132
0.1U_0402_16V4Z
C132
0.1U_0402_16V4Z
1
2
C87
4.7U_0805_10V4Z
C87
4.7U_0805_10V4Z
1
2
C128
0.47U_0603_10V7K
C128
0.47U_0603_10V7K
1
2
C1258
0.1U_0402_16V4Z
@
C1258
0.1U_0402_16V4Z
@
1
2
C88
4.7U_0805_10V4Z
C88
4.7U_0805_10V4Z
1
2
R93
BLM18PG181SN1D_0603
R93
BLM18PG181SN1D_0603
1 2
C82
10U_0805_10V4Z
C82
10U_0805_10V4Z
1
2
C120
0.1U_0402_16V4Z
C120
0.1U_0402_16V4Z
1
2
C133
10U_0603_6.3V6M
C133
10U_0603_6.3V6M
1
2
C106
0.1U_0402_16V4Z
C106
0.1U_0402_16V4Z
1
2
C104
4.7U_0805_10V4Z
C104
4.7U_0805_10V4Z
1
2
C111
10U_0805_6.3V6M
C111
10U_0805_6.3V6M
1
2
C105
0.1U_0402_16V4Z
C105
0.1U_0402_16V4Z
1
2
C103
0.1U_0402_16V4Z
C103
0.1U_0402_16V4Z
1
2
R103 10_0402_5% R103 10_0402_5%
1 2
C119
10U_0805_6.3V6M
C119
10U_0805_6.3V6M
1
2
C112
4.7U_0805_10V4Z
C112
4.7U_0805_10V4Z
1
2
C129
0.47U_0603_10V7K
C129
0.47U_0603_10V7K
1
2
C126
0.1U_0402_16V4Z
C126
0.1U_0402_16V4Z
1
2
R92
0_0402_5%
R92
0_0402_5%
1 2
L1
BLM18PG121SN1D_0603
L1
BLM18PG121SN1D_0603
1 2
R85 0_0603_5%
R85 0_0603_5%
1 2
+
C110
100U_D2_6.3VM
+
C110
100U_D2_6.3VM
1
2
C85
0.47U_0603_10V7K
C85
0.47U_0603_10V7K
1
2
C113
1U_0603_10V4Z
C113
1U_0603_10V4Z
1
2
+
C116
220U_D2_4VM_R15
+
C116
220U_D2_4VM_R15
1
2
C123
10U_0805_10V4Z
C123
10U_0805_10V4Z
1
2
C122
0.1U_0402_16V4Z
C122
0.1U_0402_16V4Z
1
2
POWER
CRTPLLA PEGA SM
TVD TV/CRT
LVDS
VTTLF PEG SM CK AXF
VTT
DMI
HV
A LVDS
HDA
U3H
CANTIGA GMCH SFF_FCBGA1363
POWER
CRTPLLA PEGA SM
TVD TV/CRT
LVDS
VTTLF PEG SM CK AXF
VTT
DMI
HV
A LVDS
HDA
U3H
CANTIGA GMCH SFF_FCBGA1363
VCCA_CRT_DAC
J31
VCCA_DPLLA
J45
VCCA_DPLLB
L49
VCCA_HPLL
AF10
VCCA_MPLL
AE1 VCCA_TV_DAC K30
VCCD_PEG_PLL
AE43
VTT_12 T2
VTT_13 R1
VCCD_HPLL
AH12
VTT_1 R13
VTT_2 T12
VTT_4 T10
VTT_5 R9
VTT_6 T8
VTT_7 R7
VTT_8 T6
VTT_9 R5
VTT_10 T4
VTT_11 R3
VTT_3 R11
VCCA_DAC_BG
L31
VCCD_TVDAC N32
VTTLF1 K14
VTTLF2 Y12
VTTLF3 P2
VCC_DMI_1 AM44
VCC_DMI_2 AN43
VCC_SM_CK_1 BK24
VCC_SM_CK_2 BL23
VCC_SM_CK_3 BJ23
VCC_SM_CK_4 BK22
VCCD_LVDS_1
M46
VCCD_QDAC N34
VCC_AXF_1 M25
VCC_AXF_2 N24
VCC_AXF_3 M23
VCC_TX_LVDS T41
VCC_HV_1 C33
VCC_HV_2 A33
VCC_PEG_1 AB44
VCCD_LVDS_2
L45
VCC_PEG_2 Y44
VCC_PEG_3 AC43
VCC_PEG_4 AA43
VCC_DMI_3 AL43
VSSA_DAC_BG
M33
VCC_HDA A31
VCCA_SM_CK_1
AU31 VCCA_SM_CK_2
AU29 VCCA_SM_CK_3
AU28 VCCA_SM_CK_4
AU27
VCCA_SM_1
AW24
VCCA_SM_2
AU24
VCCA_SM_3
AW22
VCCA_SM_4
AU22
VCCA_SM_5
AU21
VCCA_SM_6
AW20
VCCA_SM_7
AU19
VCCA_SM_8
AW18
VCCA_SM_9
AU18
VCCA_SM_10
AW16
VCCA_SM_11
AU16
VCCA_SM_12
AT16
VCCA_SM_13
AR16
VCCA_SM_14
AU15
VCCA_SM_15
AT15
VCCA_SM_16
AR15
VCCA_SM_17
AW14
VCCA_PEG_BG
AJ43
VCCA_PEG_PLL
AG43
VCCA_LVDS1
U43
VCCA_LVDS2
U41
VSSA_LVDS
V44
VCCA_SM_CK_NCTF_1
AT31
VCCA_SM_CK_NCTF_2
AR31
VCCA_SM_CK_NCTF_3
AT29
VCCA_SM_CK_NCTF_4
AR29
VCCA_SM_CK_NCTF_5
AT28
VCCA_SM_CK_NCTF_6
AR28
VCCA_SM_CK_NCTF_7
AT27
VCCA_SM_CK_NCTF_8
AR27
VCCA_SM_NCTF_1
AT24
VCCA_SM_NCTF_2
AR24
VCCA_SM_NCTF_3
AT22
VCCA_SM_NCTF_4
AR22
VCCA_SM_NCTF_5
AT21
VCCA_SM_NCTF_6
AR21
VCCA_SM_NCTF_7
AT19
VCCA_SM_NCTF_8
AR19
VCCA_SM_NCTF_9
AT18
VCCA_SM_NCTF_10
AR18
C121
0.1U_0402_16V4Z
C121
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSM_LF2
VCCSM_LF3
VCCSM_LF1
VCCSM_LF6
VCCSM_LF7
VCCSM_LF4
VCCSM_LF5
+VCCP
+VCCP
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(5/6)-PWR/GND
Custom
12 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(5/6)-PWR/GND
Custom
12 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(5/6)-PWR/GND
Custom
12 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
3000mA
6326.84mA
Extnal Graphic: 1210.34mA
integrated Graphic: 1930.4mA
For disable internal
graphics VCC_AXG to GND.
For disable internal graphics
VCC_AXG_NCTFto GND.
C142
10U_0805_6.3V6M
C142
10U_0805_6.3V6M
1
2
C156 0.1U_0402_16V4Z
C156 0.1U_0402_16V4Z
1
2
C153 0.47U_0402_6.3V6KC153 0.47U_0402_6.3V6K
1
2
C155 1U_0603_10V4Z
C155 1U_0603_10V4Z
1
2
POWER
VCC SMVCC GFX
VCC GFX NCTF
VCC SM LF
VCC GFX
U3G
CANTIGA GMCH SFF_FCBGA1363
POWER
VCC SMVCC GFX
VCC GFX NCTF
VCC SM LF
VCC GFX
U3G
CANTIGA GMCH SFF_FCBGA1363
VCC_SM_10
AW30
VCC_SM_20
BF28
VCC_SM_30
AW26
VCC_SM_6
BH30
VCC_SM_7
BF30
VCC_SM_8
BD30
VCC_SM_9
BB30
VCC_SM_11
BL29
VCC_SM_12
BJ29
VCC_SM_13
BG29
VCC_SM_14
BE29
VCC_SM_15
BC29
VCC_SM_16
BA29
VCC_SM_17
AY29
VCC_SM_18
BK28
VCC_SM_19
BH28
VCC_SM_2
BE35
VCC_SM_21
BD28
VCC_SM_22
BB28
VCC_SM_23
BL27
VCC_SM_24
BJ27
VCC_SM_25
BG27
VCC_SM_26
BE27
VCC_SM_27
BC27
VCC_SM_28
BA27
VCC_SM_29
AY27
VCC_SM_3
AW34
VCC_SM_31
BF24
VCC_SM_33
BB16
VCC_AXG_NCTF_11 R27
VCC_AXG_NCTF_12 U25
VCC_AXG_NCTF_13 T25
VCC_AXG_NCTF_14 R25
VCC_AXG_NCTF_15 U24
VCC_AXG_NCTF_16 U22
VCC_AXG_NCTF_17 T22
VCC_AXG_NCTF_18 R22
VCC_AXG_NCTF_19 U21
VCC_AXG_NCTF_20 T21
VCC_AXG_NCTF_3 T31
VCC_AXG_NCTF_21 R21
VCC_AXG_NCTF_30 U19
VCC_AXG_NCTF_29 W19
VCC_AXG_NCTF_28 AC19
VCC_AXG_NCTF_27 AD19
VCC_AXG_NCTF_26 AE19
VCC_AXG_NCTF_25 AG19
VCC_AXG_NCTF_24 AH19
VCC_AXG_NCTF_23 AL19
VCC_AXG_NCTF_4 R31
VCC_AXG_NCTF_42 U18
VCC_AXG_NCTF_43 T18
VCC_AXG_NCTF_44 R18
VCC_AXG_NCTF_41 W18
VCC_AXG_NCTF_40 Y18
VCC_AXG_NCTF_39 AA18
VCC_AXG_NCTF_38 AC18
VCC_AXG_NCTF_37 AD18
VCC_AXG_NCTF_36 AE18
VCC_AXG_NCTF_35 AG18
VCC_AXG_NCTF_5 U29
VCC_AXG_NCTF_34 AH18
VCC_AXG_NCTF_33 AJ18
VCC_AXG_NCTF_32 AL18
VCC_AXG_NCTF_22 AM19
VCC_AXG_NCTF_31 AM18
VCC_AXG_62 AJ16
VCC_AXG_NCTF_6 T29
VCC_AXG_NCTF_7 R29
VCC_AXG_NCTF_8 U28
VCC_AXG_NCTF_9 U27
VCC_AXG_NCTF_10 T27
VCC_SM_4
AW32
VCC_SM_5
BK30
VCC_AXG_NCTF_2 U31
VCC_SM_1
BB36
VCC_AXG_22
AG27
VCC_AXG_24
AD27
VCC_AXG_25
AC27
VCC_AXG_27
Y27
VCC_AXG_28
W27
VCC_SM_LF1 AU45
VCC_SM_LF2 BF52
VCC_SM_LF3 BB38
VCC_SM_LF4 BA19
VCC_SM_LF5 BE9
VCC_SM_LF6 AU9
VCC_SM_LF7 AL9
VCC_AXG_26
AA27
VCC_AXG_55
AD21
VCC_AXG_56
AC21
VCC_AXG_57
AA21
VCC_AXG_29
AH25
VCC_AXG_30
AD25
VCC_AXG_31
AC25
VCC_AXG_32
W25
VCC_AXG_58
Y21
VCC_AXG_23
AE27
VCC_AXG_50
AA22
VCC_AXG_7
Y31
VCC_AXG_20
AA28
VCC_AXG_3
AE31
VCC_AXG_54
AH21
VCC_AXG_15
Y29
VCC_AXG_53
AJ21
VCC_AXG_49
AC22
VCC_AXG_6
AA31
VCC_AXG_13
AC29
VCC_AXG_10
AG29
VCC_AXG_52
AL21
VCC_AXG_5
AC31
VCC_AXG_2
AG31
VCC_AXG_19
AE28
VCC_AXG_12
AD29
VCC_AXG_51
AM21
VCC_AXG_9
AH29
VCC_AXG_21
AH27
VCC_AXG_14
AA29
VCC_AXG_4
AD31
VCC_AXG_18
AG28 VCC_AXG_17
AH28
VCC_AXG_11
AE29
VCC_AXG_16
W29
VCC_AXG_8
W31
VCC_AXG_59
W21
VCC_AXG_60
AM16
VCC_AXG_33
AJ24
VCC_AXG_34
AH24
VCC_AXG_35
AG24
VCC_AXG_36
AE24
VCC_AXG_37
AD24
VCC_AXG_38
AC24
VCC_AXG_39
AA24
VCC_AXG_40
Y24
VCC_AXG_41
W24
VCC_AXG_61
AL16
VSS_AXG_SENSE
AE13 VCC_AXG_SENSE
AG13
VCC_AXG_42
AM22
VCC_AXG_43
AL22
VCC_AXG_44
AJ22
VCC_AXG_45
AH22
VCC_AXG_46
AG22
VCC_AXG_47
AE22
VCC_AXG_63 AH16
VCC_AXG_64 AD16
VCC_AXG_65 AC16
VCC_AXG_66 AA16
VCC_AXG_67 U16
VCC_AXG_68 T16
VCC_AXG_69 R16
VCC_AXG_70 AM15
VCC_AXG_71 AL15
VCC_AXG_72 AJ15
VCC_AXG_73 AH15
VCC_AXG_74 AG15
VCC_AXG_75 AE15
VCC_AXG_76 AA15
VCC_AXG_77 Y15
VCC_AXG_78 W15
VCC_AXG_79 U15
VCC_AXG_80 T15
VCC_SM_32
BL19
VCC_AXG_1
W32
VCC_AXG_48
AD22
VCC_AXG_NCTF_1 T32
C157 0.1U_0402_16V4Z
C157 0.1U_0402_16V4Z
1
2
T43PAD T43PAD
C154 1U_0603_10V4Z
C154 1U_0603_10V4Z
1
2
+
C137
330U_D2E_2.5VM_R9
+
C137
330U_D2E_2.5VM_R9
1
2
C145
0.1U_0402_16V4Z
C145
0.1U_0402_16V4Z
1
2
C143
0.22U_0402_10V4Z
C143
0.22U_0402_10V4Z
1
2
C139
10U_0805_6.3V6M
C139
10U_0805_6.3V6M
1
2
C140
0.01U_0402_16V7K
C140
0.01U_0402_16V7K
1
2
C144
0.22U_0402_10V4Z
C144
0.22U_0402_10V4Z
1
2
+
C141
220U_D2_4VM_R15
+
C141
220U_D2_4VM_R15
1
2
POWER
VCC NCTF
VCC CORE
U3F
CANTIGA GMCH SFF_FCBGA1363
POWER
VCC NCTF
VCC CORE
U3F
CANTIGA GMCH SFF_FCBGA1363
VCC_NCTF_1 AT38
VCC_NCTF_20 AH37
VCC_NCTF_29 T37
VCC_NCTF_9 Y38
VCC_NCTF_10 W38
VCC_NCTF_11 U38
VCC_NCTF_12 T38
VCC_NCTF_13 R38
VCC_NCTF_14 AT37
VCC_NCTF_15 AR37
VCC_NCTF_17 AM37
VCC_NCTF_18 AL37
VCC_NCTF_19 AJ37
VCC_NCTF_2 AR38
VCC_NCTF_24 AC37
VCC_NCTF_25 AA37
VCC_NCTF_3 AN38
VCC_NCTF_30 R37
VCC_NCTF_31 AT35
VCC_NCTF_32 AR35
VCC_NCTF_38 R34
VCC_NCTF_4 AM38
VCC_NCTF_5 AL38
VCC_NCTF_6 AG38
VCC_NCTF_7 AE38
VCC_NCTF_8 AA38
VCC_NCTF_33 U35
VCC_NCTF_34 AT34
VCC_NCTF_35 AR34
VCC_NCTF_36 U34
VCC_NCTF_37 T34
VCC_NCTF_26 Y37
VCC_NCTF_27 W37
VCC_NCTF_28 U37
VCC_NCTF_16 AN37
VCC_NCTF_21 AG37
VCC_NCTF_22 AE37
VCC_NCTF_23 AD37
VCC_1
AT41
VCC_2
AR41
VCC_3
AN41
VCC_4
AJ41
VCC_5
AH41
VCC_6
AD41
VCC_7
AC41
VCC_8
Y41
VCC_9
W41
VCC_10
AT40
VCC_11
AM40
VCC_12
AL40
VCC_13
AJ40
VCC_14
AH40
VCC_15
AG40
VCC_16
AE40
VCC_17
AD40
VCC_18
AC40
VCC_19
AA40
VCC_20
Y40
VCC_21
AN35
VCC_22
AM35
VCC_23
AJ35
VCC_24
AH35
VCC_25
AD35
VCC_26
AC35
VCC_27
W35
VCC_28
AM34
VCC_29
AL34
VCC_30
AJ34
VCC_31
AH34
VCC_32
AG34
VCC_33
AE34
VCC_34
AD34
VCC_35
AC34
VCC_36
AA34
VCC_37
Y34
VCC_38
W34
VCC_39
AM32
VCC_40
AL32
VCC_41
AJ32
VCC_42
AH32
VCC_46
AM31
VCC_47
AL31
VCC_48
AJ31
VCC_50
AM29
VCC_51
AL29
VCC_52
AM28
VCC_53
AL28
VCC_55
AM27
VCC_56
AL27
VCC_57
AM25
VCC_58
AL25
VCC_61
N36
VCC_43
AE32
VCC_44
AD32
VCC_45
AA32
VCC_49
AH31
VCC_54
AJ28
VCC_59
AJ25
VCC_60
AM24
C138
10U_0805_6.3V6M
C138
10U_0805_6.3V6M
1
2
C151 0.22U_0603_10V7K
C151 0.22U_0603_10V7K
1
2
C152 0.22U_0603_10V7K
C152 0.22U_0603_10V7K
1
2
T44PAD T44PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(6/6)-PWR/GND
Custom
13 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(6/6)-PWR/GND
Custom
13 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Cantiga(6/6)-PWR/GND
Custom
13 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
VSS
VSS NCTF
VSS SCB
U3J
CANTIGA GMCH SFF_FCBGA1363
VSS
VSS NCTF
VSS SCB
U3J
CANTIGA GMCH SFF_FCBGA1363
VSS_199
AN25
VSS_200
AG25
VSS_201
AE25
VSS_202
AA25
VSS_203
Y25
VSS_204
E25
VSS_205
A25
VSS_206
BD24
VSS_207
AN24
VSS_208
AL24
VSS_210
BG23
VSS_212
E23
VSS_213
BD22
VSS_214
BB22
VSS_215
AN22
VSS_216
Y22
VSS_217
W22
VSS_218
H22
VSS_220
BG21
VSS_221
AY21
VSS_222
AN21
VSS_223
AG21
VSS_224
AE21
VSS_225
M21
VSS_226
E21
VSS_227
A21
VSS_230
BG19
VSS_231
AY19
VSS_232
M19
VSS_233
E19
VSS_234
BD18
VSS_235
N18
VSS_236
H18
VSS_237
BL17
VSS_238
BG17
VSS_239
AY17
VSS_240
M17
VSS_241
E17
VSS_243
BD16
VSS_244
AN16
VSS_245
AG16
VSS_246
AE16
VSS_247
Y16
VSS_248
W16
VSS_249
N16
VSS_250
H16
VSS_251
BG15
VSS_252
AY15
VSS_261
BL13 VSS_260
H14 VSS_259
BD14 VSS_258
E15 VSS_257
M15 VSS_256
R15 VSS_255
AC15
VSS_253
AN15
VSS_254
AD15
VSS_219
BL21
VSS_NCTF_1 AJ38
VSS_NCTF_2 AH38
VSS_NCTF_3 AD38
VSS_NCTF_4 AC38
VSS_NCTF_5 T35
VSS_NCTF_6 R35
VSS_NCTF_7 AT32
VSS_NCTF_8 AR32
VSS_NCTF_9 U32
VSS_NCTF_10 R32
VSS_NCTF_11 T28
VSS_NCTF_12 R28
VSS_NCTF_13 AT25
VSS_NCTF_14 AR25
VSS_NCTF_15 T24
VSS_SCB_1 BL55
VSS_SCB_2 BL1
VSS_SCB_3 A55
VSS_SCB_4 D1
VSS_SCB_5 B55
VSS_SCB_6 B2
VSS_347 AU43
VSS_348 BB42
VSS_349 AW38
VSS_350 BA35
VSS_351 L29
VSS_352 N28
VSS_353 N22
VSS_354 N20
VSS_355 N14
VSS_262
BG13
VSS_263
AY13
VSS_264
AU13
VSS_209
H24
VSS_211
AY23
VSS_242
A17
VSS_265
AR13
VSS_266
AJ13
VSS_267
AC13
VSS_268
AA13
VSS_269
W13
VSS_270
U13
VSS_NCTF_16 R24
VSS_NCTF_17 AN19
VSS_NCTF_18 AJ19
VSS_NCTF_19 AA19
VSS_NCTF_20 Y19
VSS_NCTF_21 T19
VSS_NCTF_22 R19
VSS_NCTF_23 AN18
VSS_333 C5
VSS_334 BH4
VSS_335 BE3
VSS_336 U3
VSS_337 E3
VSS_338 BC1
VSS_339 AW1
VSS_340 AR1
VSS_341 AL1
VSS_342 AG1
VSS_343 AC1
VSS_344 W1
VSS_345 N1
VSS_346 J1
VSS_359 N42
VSS_360 N40
VSS_361 N38
VSS_362 M39
VSS_228
BD20
VSS_229
H20
VSS_SCB_7 A4
VSS_271
M13
VSS_272
E13
VSS_273
A13
VSS_274
BD12
VSS_275
AV12
VSS_276
AP12
VSS_277
AM12
VSS_278
AK12
VSS_279
AB12
VSS_280
V12
VSS_281
P12
VSS_282
H12
VSS_283
BG11
VSS_284
AG11
VSS_285
E11
VSS_286
BD10
VSS_287
AY10
VSS_288
AP10
VSS_289
H10
VSS_290
BL9
VSS_291
BG9
VSS_292
E9
VSS_293
A9
VSS_294
BD8
VSS_295
BB8
VSS_296
AY8
VSS_297
AV8
VSS_298
AT8
VSS_299
AP8
VSS_300 AM8
VSS_301 AK8
VSS_326 AA5
VSS_327 W5
VSS_328 U5
VSS_329 N5
VSS_330 L5
VSS_331 J5
VSS_332 G5
VSS_302 AH8
VSS_303 AF8
VSS_304 AD8
VSS_305 AB8
VSS_306 Y8
VSS_307 V8
VSS_308 P8
VSS_309 M8
VSS_310 K8
VSS_311 H8
VSS_312 BJ7
VSS_313 E7
VSS_314 BF6
VSS_315 BC5
VSS_316 BA5
VSS_317 AW5
VSS_318 AU5
VSS_319 AR5
VSS_320 AN5
VSS_321 AL5
VSS_322 AJ5
VSS_323 AG5
VSS_324 AE5
VSS_325 AC5
VSS_356 AL13
VSS_357 B10
VSS_358 AN13
VSS
U3I
CANTIGA GMCH SFF_FCBGA1363
VSS
U3I
CANTIGA GMCH SFF_FCBGA1363
VSS_1
BA55
VSS_182 AN28
VSS_2
AU55
VSS_3
AN55
VSS_4
AJ55
VSS_5
AE55
VSS_6
AA55
VSS_7
U55
VSS_8
N55
VSS_9
BD54
VSS_10
BG53
VSS_11
AJ53
VSS_12
AE53
VSS_13
AA53
VSS_14
U53
VSS_15
N53
VSS_16
J53
VSS_17
G53
VSS_19
K52
VSS_20
BG51
VSS_21
BA51
VSS_22
AW51
VSS_23
AU51
VSS_24
AR51
VSS_25
AN51
VSS_26
AL51
VSS_27
AJ51
VSS_28
AG51
VSS_29
AE51
VSS_30
AC51
VSS_31
AA51
VSS_32
W51
VSS_33
U51
VSS_34
R51
VSS_35
N51
VSS_36
L51
VSS_37
J51
VSS_38
G51
VSS_39
C51
VSS_40
BK50
VSS_41
AM50
VSS_42
K50
VSS_43
BG49
VSS_44
E49
VSS_45
C49
VSS_46
BD48
VSS_47
BB48
VSS_48
AY48
VSS_49
AV48
VSS_50
AT48
VSS_51
AP48
VSS_52
AM48
VSS_53
AK48
VSS_54
AH48
VSS_55
AF48
VSS_56
AD48
VSS_57
AB48
VSS_58
Y48
VSS_59
V48
VSS_60
T48
VSS_61
P48
VSS_62
M48
VSS_63
K48
VSS_64
H48
VSS_65
BL47
VSS_66
BG47
VSS_67
E47
VSS_68
C47
VSS_69
A47
VSS_70
BD46
VSS_71
AY46
VSS_72
AM46
VSS_73
AK46
VSS_74
AH46
VSS_75
BG45
VSS_76
AE45
VSS_77
AC45
VSS_78
AA45
VSS_79
W45
VSS_80
R45
VSS_81
N45
VSS_82
E45
VSS_83
BD44
VSS_84
BB44
VSS_85
AV44
VSS_86
AK44
VSS_87
AH44
VSS_97
R43
VSS_100 C43
VSS_101 A43
VSS_102 BD42
VSS_103 H42
VSS_104 BG41
VSS_105 AY41
VSS_106 AU41
VSS_107 AM41
VSS_108 AL41
VSS_109 AG41
VSS_110 AE41
VSS_111 AA41
VSS_112 R41
VSS_113 M41
VSS_114 E41
VSS_115 BD40
VSS_116 AU40
VSS_117 AR40
VSS_118 AN40
VSS_119 W40
VSS_120 U40
VSS_121 T40
VSS_122 R40
VSS_123 K40
VSS_124 H40
VSS_125 BL39
VSS_126 BG39
VSS_127 BA39
VSS_128 E39
VSS_129 C39
VSS_130 A39
VSS_131 BD38
VSS_132 AU38
VSS_133 H38
VSS_134 BG37
VSS_135 AU37
VSS_136 M37
VSS_137 E37
VSS_138 BD36
VSS_139 AW36
VSS_140 H36
VSS_141 BL35
VSS_142 BG35
VSS_143 AY35
VSS_144 AU35
VSS_145 AL35
VSS_146 AG35
VSS_147 AE35
VSS_148 AA35
VSS_149 Y35
VSS_150 M35
VSS_151 E35
VSS_152 A35
VSS_153 BD34
VSS_154 AU34
VSS_155 AN34
VSS_156 H34
VSS_157 BL33
VSS_158 BG33
VSS_159 AY33
VSS_160 E33
VSS_161 BD32
VSS_162 AU32
VSS_163 AN32
VSS_164 AG32
VSS_165 AC32
VSS_166 Y32
VSS_88
AF44
VSS_89
AD44
VSS_90
K44
VSS_91
H44
VSS_92
BL43
VSS_93
BG43
VSS_94
AY43
VSS_95
AR43
VSS_96
W43
VSS_99
E43
VSS_168 B32
VSS_170 BG31
VSS_172 AN31
VSS_18
E53
VSS_175 N30
VSS_177 AN29
VSS_179 M29
VSS_181 AW28
VSS_167 H32
VSS_169 BJ31
VSS_171 AY31
VSS_174 E31
VSS_176 H30
VSS_178 AJ29
VSS_180 A29
VSS_98
M43
VSS_183 AD28
VSS_184 AC28
VSS_185 Y28
VSS_186 W28
VSS_187 H28
VSS_188 F28
VSS_189 AN27
VSS_190 AJ27
VSS_191 M27
VSS_192 BF26
VSS_193 BD26
VSS_194 N26
VSS_173 M31
VSS_195 H26
VSS_196 BJ25
VSS_197 AY25
VSS_198 AU25
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V_DDR3_DIMM_REF
DDR_A_D63
DDR_A_D26
DDR_A_D36
DDR_A_DQS6
DDR_A_D25
DDR_A_D22
DDR_A_D5
DDR_A_D2
DDR_A_DQS#0
DDR_A_MA12
DDR_A_D14
DDR_A_D35
DDR_A_D42
DDR_A_DM6
DDR_A_DQS4
DDR_CKE1_DIMMA
PM_EXTTS#0
DDR_A_D31
DDR_CKE0_DIMMA
DDR_A_D12
DDR_A_D59
CLK_SMBCLK
DDR_A_MA3
DDR_A_D6
DDR_A_BS1
DDR_A_D39
DDR_CS1_DIMMA#
DDR_A_MA7
DDR_A_WE#
DDR_A_DQS0
DDR_A_MA0
DDR_A_DM2
DDR_A_DQS7
DDR_A_DM1
DDR_A_D28
DDR_A_D46
DDR_A_D57
DDR_A_D0
DDR_A_DM0
DDR_A_D51
DDR_A_DQS#5
DDR_A_D19
DDR_A_DM4
DDR_A_D4
DDR_A_DQS2
DDR_A_D30
DDR_A_RAS#
DDR_A_D44
DDR_A_DM5
DDR_A_D58
DDR_A_D33
DDR_A_DQS3
DDR_A_MA8
DDR_CS0_DIMMA#
DDR_A_D10
DDR_A_MA10
SM_DRAMRST#
DDR_A_D3
DDR_A_D27
DDR_A_MA6
DDR_A_DQS#6
DDR_A_D1
DDR_A_DQS#7
DDR_A_D29
DDR_A_D16
DDR_A_MA9
DDR_A_D40
+0.75VS
DDR_A_DM3
DDR_A_D52
DDR_A_DQS#4
DDR_A_D49
DDR_A_D54
DDR_A_DQS5
DDR_A_D9
DDR_A_D45
DDR_A_BS2
DDR_A_D20
DDR_A_D13
DDR_A_MA1
DDR_A_D7
DDR_A_DM7
DDR_A_BS0
DDR_A_D60
DDR_A_CAS# M_ODT0
DDR_A_D37
DDR_A_DQS#1
DDR_A_MA5
DDR_A_D55
DDR_A_MA14
DDR_A_D21
DDR_A_MA4
DDR_A_D15
DDR_A_D24
DDR_A_D62
DDR_A_D56
DDR_A_D23
DDR_A_D47
DDR_A_D53
M_ODT1
DDR_A_D18
DDR_A_D43
M_CLK_DDR#1
M_CLK_DDR1
DDR_A_D34
CLK_SMBDATA
DDR_A_D48
DDR_A_D11
DDR_A_DQS#2
M_CLK_DDR#0
M_CLK_DDR0
DDR_A_D38
DDR_A_D32
DDR_A_DQS#3
DDR_A_D50
DDR_A_MA11
DDR_A_MA13
DDR_A_DQS1
DDR_A_D8
DDR_A_D17
DDR_A_D41
DDR_A_MA2
DDR_A_D61
DDR_VREF_CA_DIMMA
DDR_A_DQS#[0..7][9]
DDR_A_DQS[0..7][9]
DDR_A_D[0..63][9]
DDR_A_DM[0..7][9]
DDR_A_MA[0..14][9]
+V_DDR3_DIMM_REF[15]
DDR_CS1_DIMMA#[8]
DDR_CKE0_DIMMA[8]
DDR_A_RAS# [9]
DDR_A_WE#[9] DDR_CS0_DIMMA# [8]
SM_DRAMRST# [8,15]
M_ODT0 [8]DDR_A_CAS#[9]
M_CLK_DDR#1 [8]
M_ODT1 [8]
M_CLK_DDR1 [8]
M_CLK_DDR0[8]
DDR_CKE1_DIMMA [8]
M_CLK_DDR#0[8]
DDR_A_BS2[9]
DDR_A_BS0[9]
ICH_SMBCLK [15,16,24,26]
ICH_SMBDATA [15,16,24,26]
PM_EXTTS#0 [8]
DDR_A_BS1 [9]
+1.5V
+1.5V
+0.75VS
+V_DDR3_DIMM_REF
+0.75VS
+1.5V +1.5V
+V_DDR3_DIMM_REF
+V_DDR3_DIMM_REF
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
DDR3-SODIMM SLOT1
Custom
14 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
DDR3-SODIMM SLOT1
Custom
14 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
DDR3-SODIMM SLOT1
Custom
14 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Layout Note:
Place near JP4
Standard 4.2mm
DDR3 SO-DIMM A
Layout Note:
Place near JP4.203 & JP4.204
Layout Note: Place these 4 Caps near Command
and Control signals of DIMMA
+
C601
470U_D2_2.5VM_R15
@
+
C601
470U_D2_2.5VM_R15
@
1
2
C611
0.1U_0402_16V4Z
C611
0.1U_0402_16V4Z
1
2
C604
10U_0805_6.3V6M
C604
10U_0805_6.3V6M
1
2
C609
0.1U_0402_16V4Z
C609
0.1U_0402_16V4Z
1
2
C618
10U_0805_6.3V6M
C618
10U_0805_6.3V6M
1
2
JP3
FOX_AS0A626-U4SN-7F
ME@
JP3
FOX_AS0A626-U4SN-7F
ME@
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
C613
0.1U_0402_16V4Z
C613
0.1U_0402_16V4Z
1
2
R435
10K_0402_5%
R435
10K_0402_5%
12
C600
0.1U_0402_16V4Z
C600
0.1U_0402_16V4Z 1
2
C620
0.1U_0402_16V4Z
C620
0.1U_0402_16V4Z
1
2
C602
10U_0805_6.3V6M
C602
10U_0805_6.3V6M
1
2
C612
2.2U_0805_16V4Z
C612
2.2U_0805_16V4Z
1
2
C607
10U_0805_6.3V6M
C607
10U_0805_6.3V6M
1
2
R431
100_0402_1%
R431
100_0402_1%
12
C606
10U_0805_6.3V6M
C606
10U_0805_6.3V6M
1
2
C614
1U_0603_10V4Z
C614
1U_0603_10V4Z
1
2
R432
100_0402_1%
R432
100_0402_1%
12
C615
1U_0603_10V4Z
C615
1U_0603_10V4Z
1
2
C610
0.1U_0402_16V4Z
C610
0.1U_0402_16V4Z
1
2
C605
10U_0805_6.3V6M
C605
10U_0805_6.3V6M
1
2
C603
10U_0805_6.3V6M
C603
10U_0805_6.3V6M
1
2
C616
1U_0603_10V4Z
C616
1U_0603_10V4Z
1
2
C617
1U_0603_10V4Z
C617
1U_0603_10V4Z
1
2
C608
0.1U_0402_16V4Z
C608
0.1U_0402_16V4Z
1
2
R433
0_0402_5%
R433
0_0402_5%
1 2
C619
2.2U_0603_6.3V4Z
C619
2.2U_0603_6.3V4Z
1
2
R434
10K_0402_5%
R434
10K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_D63
DDR_B_DQS6
DDR_B_D35
DDR_B_MA12
DDR_B_DQS4
DDR_B_DM6
DDR_B_D42
DDR_CKE3_DIMMBDDR_CKE2_DIMMB
DDR_B_D59
CLK_SMBCLK
DDR_CS3_DIMMB#
DDR_B_MA3
DDR_B_D39
DDR_B_WE#
DDR_B_BS1
DDR_B_MA7
DDR_B_MA0
DDR_B_D57
DDR_B_DQS7
DDR_B_D46
DDR_B_DQS#5
DDR_B_D51
DDR_B_DM4
DDR_B_D44
DDR_B_RAS#
DDR_B_DM5
DDR_B_D58
DDR_B_D33
DDR_B_MA8
DDR_CS2_DIMMB#
DDR_B_D36
DDR_B_MA10
DDR_B_MA6
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_MA9
DDR_B_D40
DDR_B_D52
+0.75VS
DDR_B_DQS#4
DDR_B_D54
DDR_B_DQS5
DDR_B_BS2
DDR_B_D49
DDR_B_D45
DDR_B_DM7
DDR_B_MA1
DDR_B_BS0
DDR_B_D60
M_ODT2
DDR_VREF_CA_DIMMB
DDR_B_CAS#
DDR_B_D37
DDR_B_MA5
DDR_B_MA14
DDR_B_D55
DDR_B_MA4
DDR_B_D62
DDR_B_D47
DDR_B_D53
DDR_B_D56
M_ODT3
DDR_B_D43
M_CLK_DDR3
DDR_B_D34
M_CLK_DDR#3
CLK_SMBDATA
DDR_B_D48
DDR_B_D38
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_D32
DDR_B_MA11
DDR_B_D50
DDR_B_MA13
DDR_B_D41
DDR_B_MA2
DDR_B_D61
PM_EXTTS#1
DDR_B_D27
DDR_B_D2
DDR_B_D26
DDR_B_D25
DDR_B_D0
DDR_B_DM0
DDR_B_D19
DDR_B_DQS2
DDR_B_D10
DDR_B_D3
DDR_B_D1
DDR_B_D16
DDR_B_DM3
DDR_B_D9
DDR_B_DQS#1
DDR_B_D24
DDR_B_D18
DDR_B_D11
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_D8
DDR_B_D17
DDR_B_D5
DDR_B_D22
DDR_B_D14
DDR_B_DQS#0
DDR_B_D31
DDR_B_D12
DDR_B_D6
DDR_B_DQS0
DDR_B_DM1
DDR_B_DM2
DDR_B_D28
DDR_B_D4
DDR_B_D30
DDR_B_DQS3
SM_DRAMRST#
DDR_B_D29
DDR_B_D13
DDR_B_D20
DDR_B_D7
DDR_B_D21
DDR_B_D23
DDR_B_D15
DDR_B_DQS#3
DDR_B_DQS#[0..7][9]
DDR_B_DQS[0..7][9]
DDR_B_D[0..63][9]
DDR_B_MA[0..14][9]
DDR_B_DM[0..7][9]
DDR_CS3_DIMMB#[8]
DDR_CKE2_DIMMB[8]
DDR_B_WE#[9]
M_CLK_DDR2[8]
DDR_B_CAS#[9]
M_CLK_DDR#2[8]
DDR_CS2_DIMMB# [8]
M_ODT3 [8]
DDR_B_RAS# [9]
DDR_CKE3_DIMMB [8]
M_CLK_DDR3 [8]
M_ODT2 [8]
M_CLK_DDR#3 [8]
SM_DRAMRST# [8,14]
+V_DDR3_DIMM_REF[14]
DDR_B_BS2[9]
DDR_B_BS0[9]
ICH_SMBCLK [14,16,24,26]
ICH_SMBDATA [14,16,24,26]
PM_EXTTS#1 [8]
DDR_B_BS1 [9]
+1.5V
+0.75VS
+0.75VS
+1.5V +1.5V
+V_DDR3_DIMM_REF
+V_DDR3_DIMM_REF
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
DDR3-SODIMM SLOT2
15 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
DDR3-SODIMM SLOT2
15 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
DDR3-SODIMM SLOT2
15 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
DDR3 SO-DIMM B
Reverse 4.0mm
Layout Note:
Place near JP5
Layout Note:
Place near JP5.203 & JP5.204
Layout Note: Place these 4 Caps near Command
and Control signals of DIMMA
R437
10K_0402_5%
R437
10K_0402_5%
1 2
R438
10K_0402_5%
R438
10K_0402_5%
1 2
C638
2.2U_0805_16V4Z
C638
2.2U_0805_16V4Z
1
2
+
C621
470U_D2_2.5VM_R15
@
+
C621
470U_D2_2.5VM_R15
@
1
2
C636
10U_0805_6.3V6M
C636
10U_0805_6.3V6M
1
2
C626
10U_0805_6.3V6M
C626
10U_0805_6.3V6M
1
2
C631
0.1U_0402_16V4Z
C631
0.1U_0402_16V4Z
1
2
C635
1U_0603_10V4Z
C635
1U_0603_10V4Z
1
2
C622
10U_0805_6.3V6M
C622
10U_0805_6.3V6M
1
2
C628
0.1U_0402_16V4Z
C628
0.1U_0402_16V4Z
1
2
C624
10U_0805_6.3V6M
C624
10U_0805_6.3V6M
1
2
JP4
FOX_AS0A626-U4RN-7F
ME@
JP4
FOX_AS0A626-U4RN-7F
ME@
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
C629
0.1U_0402_16V4Z
C629
0.1U_0402_16V4Z
1
2
C632
1U_0603_10V4Z
C632
1U_0603_10V4Z
1
2
C639
0.1U_0402_16V4Z
C639
0.1U_0402_16V4Z
1
2
C634
1U_0603_10V4Z
C634
1U_0603_10V4Z
1
2
C637
0.1U_0402_16V4Z
C637
0.1U_0402_16V4Z
1
2
R436 0_0402_5%R436 0_0402_5%
1 2
C623
10U_0805_6.3V6M
C623
10U_0805_6.3V6M
1
2
C633
1U_0603_10V4Z
C633
1U_0603_10V4Z
1
2
C627
10U_0805_6.3V6M
C627
10U_0805_6.3V6M
1
2
C630
0.1U_0402_16V4Z
C630
0.1U_0402_16V4Z
1
2
C625
10U_0805_6.3V6M
C625
10U_0805_6.3V6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSC
FSB
FSA
CLK_48M_ICH
CLK_14M_ICH FSC
CLK_XTAL_IN
CLK_XTAL_OUT
CLK_XTAL_IN
CLK_XTAL_OUT
FSB
27_SELITP_EN
ITP_EN
PCI2_TME
CLK_48M_ICH
CLK_14M_ICH
CLK_PCI_ICH
CLK_PCI_EC
CLK_PCI_ICH
CLKREQ#_B_R
R_PCIE_ICH
R_PCIE_ICH#
CLKREQ#_B_R
CLKREQ_WLAN#_R
CLKSATAREQ#_R
CLKSATAREQ#_R
PCI2_TME
CLKREQG_WWAN#_R
CLKREQG_WWAN#_R
CLKREQ_WLAN#_R
27_SEL
FSA
CLK_PCI_EC PCI_CLK1 VGA_CLK_REQ#
CPU_BSEL0[5]
MCH_CLKSEL0 [8]
CLK_14M_ICH[24]
CLK_48M_ICH[24]
CPU_BSEL2[5]
MCH_CLKSEL2 [8]
CPU_BSEL1[5]
CLK_PCI_ICH[22]
CLKREQ#_B [8]
H_STP_PCI# [24]
H_STP_CPU# [24]
ICH_SMBCLK [14,15,24,26]
CLK_CPU_BCLK# [4]
CLK_CPU_BCLK [4]
CLK_MCH_BCLK# [8]
CLK_MCH_BCLK [8]
ICH_SMBDATA [14,15,24,26]
CLK_PCIE_SATA [23]
CLK_PCIE_SATA# [23]
CK_PWRGD [24]
CLK_MCH_3GPLL [8]
CLK_MCH_3GPLL# [8]
CLKREQA# [26]
CLKREQG_WWAN# [26] CLKREQ_WLAN# [26]
CLKSATAREQ# [24]
CLK_PCIE_MCARD# [26]
CLK_PCIE_MCARD [26]
CLK_PCIE_WAN [26]
CLK_PCIE_WAN# [26]
CLK_PCIE_LAN [26]
CLK_PCIE_LAN# [26]
27M_NSSC [18]
27M_SSC [18]
CLK_PCIE_ICH [24]
CLK_PCIE_ICH# [24]
MCH_CLKSEL1 [8]
CLK_48M_CR[26]
CLK_PCI_EC[26]
CLK_PCIE_VGA [17]
CLK_PCIE_VGA# [17]
VGA_CLK_REQ# [18]
+VCCP
+3VS
+3VM_CK505
+3VS +3VM_CK505
+1.05VM_CK505
+3VS +3VS
+VCCP
+3VS
+3VS +3VS
+3VS
+1.05VM_CK505+VCCP
+1.05VM_CK505
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
CLOCK GENERATOR
16 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
CLOCK GENERATOR
16 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
CLOCK GENERATOR
16 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
1
1000
CLKSEL1
100
1
PCI
MHz
200
0
SRC
MHz
33.3
CPU
MHz
CLKSEL2
33.30
FSLA
CLKSEL0
166
FSLC
1
FSLB
Place close to U5
01000 2660 33.3
9/20
FSB
MHz
1066
800
667
9/14
Install. 11/06
Modify PN directly, from SA00001YJ20(HP)
to SA000020H10(General)
R122 0_1206_5%
R122 0_1206_5%
1 2
C218
0.1U_0402_16V4Z
C218
0.1U_0402_16V4Z
1
2
R146 10K_0402_5%
R146 10K_0402_5%
12
C234
22P_0402_50V8J
C234
22P_0402_50V8J
1
2
C213 12P_0402_50V8J@
C213 12P_0402_50V8J@
1 2
R127 475_0402_1%
R127 475_0402_1%
12
R154
10K_0402_5%
R154
10K_0402_5%
1 2
C212 5P_0402_50V8C@
C212 5P_0402_50V8C@
12
C220
0.1U_0402_16V4Z
C220
0.1U_0402_16V4Z
1
2
R156
10K_0402_5%
@
R156
10K_0402_5%
@
1 2
R17715_0402_1% R17715_0402_1% 1 2
R135
1K_0402_5%@
R135
1K_0402_5%@
12
R128 475_0402_1% R128 475_0402_1% 12
R157
10K_0402_5%
@R157
10K_0402_5%
@
1 2
C224
0.1U_0402_16V4Z
C224
0.1U_0402_16V4Z
1
2
R15133_0402_1% R15133_0402_1%
1 2
R124 10K_0402_5% R124 10K_0402_5%
1 2
R153
10K_0402_5%
R153
10K_0402_5%
1 2
C227
0.1U_0402_16V4Z
C227
0.1U_0402_16V4Z
1
2
C226
10U_0805_10V4Z
C226
10U_0805_10V4Z
1
2
C225
0.1U_0402_16V4Z
C225
0.1U_0402_16V4Z
1
2
R14233_0402_1% R14233_0402_1%
1 2
U4
ICS9LPRS387BKLFT MLF 72P
U4
ICS9LPRS387BKLFT MLF 72P
X1
5
X2
4
USB_48MHz/FSLA
20
GND
30
VDDPLL3
27
PCI2/TME
14
FSLB/TEST_MODE
2
VDDSRC_IO
52
SDATA 9
GND48
22
VDD48
19
PCI3
15
SRCC4_LPR 40
SRCT9_LPR 44
PCI_STOP# 54
GNDSRC
34
GNDCPU
69
SRCC9_LPR 45
SRCC11_LPR 47
SRCC7_LPR 60
SRCT7_LPR 61
SRCT6_LPR 57
CPUT0_LPR_F 71
PCI
13
PCI4/27_Select
16
VDDSRC_IO
38 VDDPLL3_IO
31
VDD96_IO
23
VDDPCI
12
GNDSRC
59
GND
26
SCLK 10
NC 11
GNDPCI
18
CPU_STOP# 53
PCI_F5/ITP_EN
17
SRCT11_LPR 48
CPUC1_LPR_F 67
SRCT10_LPR 50
SRCC10_LPR 51
FSLC/TEST_SEL/REF0
7
CPUC0_LPR_F 70
CPUT1_LPR_F 68
VDDREF
6
GNDREF
3
VDDSRC_IO
62
SRCC6_LPR 56
VDDCPU_IO
66
SRCC3_LPR 36
CR#4 41
CR#11 46
CR#9 43
VDDCPU
72
GNDSRC
42
CR#3 37
CR#A 21
CR#6 58
CR10# 49
SRCT4_LPR 39
SRCT3_LPR 35
VDDSRC
55
REF1 8
CR7# 65
CPUT2_ITP_LPR/SRCT8_LPR 64
CPUC2_ITP_LPR/SRCC8_LPR 63
SRCT2_LPR/SATAT_LPR 32
SRCC2_LPR/SATAC_LPR 33
SRCT0_LPR/DOTT_96_LPR 24
SRCC0_LPR/DOTC_96_LPR 25
27MHz_NonSS/SRCT1_LPR/SE1 28
27MHz_SS/SRCC1_LPR/SE2 29
CK_PWRGD/PD# 1
T_PAD 73
R126 475_0402_1%
R126 475_0402_1%
12
R150
0_0402_5%
R150
0_0402_5%
12
R138
0_0402_5%
R138
0_0402_5%
1 2
R131 1K_0402_5%
R131 1K_0402_5%
1 2
R136
1K_0402_5%@
R136
1K_0402_5%@
1 2
R125 10K_0402_5%
R125 10K_0402_5%
1 2
C219
0.1U_0402_16V4Z
C219
0.1U_0402_16V4Z
1
2
R14533_0402_1% R14533_0402_1%
1 2
R158
10K_0402_5%
@
R158
10K_0402_5%
@
1 2
R133 10K_0402_5% R133 10K_0402_5%
1 2
R148 0_0402_5%R148 0_0402_5%
1 2
C233
22P_0402_50V8J
C233
22P_0402_50V8J 1
2
C217
0.1U_0402_16V4Z
C217
0.1U_0402_16V4Z
1
2
C229 4.7P_0402_50V8C@
C229 4.7P_0402_50V8C@
12
R121 0_1206_5%
R121 0_1206_5%
1 2
R141
0_0402_5%@
R141
0_0402_5%@
12
C223
10U_0805_10V4Z
C223
10U_0805_10V4Z
1
2
C214 4.7P_0402_50V8C@
C214 4.7P_0402_50V8C@
12
R134 0_0402_5%R134 0_0402_5%
1 2
R123
56_0402_5%@
R123
56_0402_5%@
1 2
R147 1K_0402_5% R147 1K_0402_5%
1 2
R137
1K_0402_5%
R137
1K_0402_5%
1 2
Y1
14.31818MHZ_20P_1BX14318BE1A
Y1
14.31818MHZ_20P_1BX14318BE1A
12
R14915_0402_1% R14915_0402_1% 1 2
C228
0.1U_0402_16V4Z
C228
0.1U_0402_16V4Z
1
2
R130 2.2K_0402_5%
R130 2.2K_0402_5%
12
C222
0.1U_0402_16V4Z
C222
0.1U_0402_16V4Z
1
2
R132 10K_0402_5%
R132 10K_0402_5%
1 2
C221
0.1U_0402_16V4Z
C221
0.1U_0402_16V4Z
1
2
C216
10U_0805_10V4Z
C216
10U_0805_10V4Z
1
2
R129 475_0402_1% R129 475_0402_1% 12
RP28 0_0404_4P2R_5%RP28 0_0404_4P2R_5%
1 4
2 3
R155
10K_0402_5%
R155
10K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GPU_GPIO9
GPU_GPIO13
GPU_GPIO12
GPU_GPIO0
GPU_GPIO2
GPU_GPIO1
GPU_GPIO11
SOUT_GPIO8
EC_SMB_DA2_PX
EC_SMB_CK2_PX
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P15PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N15
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P8
PCIE_GTX_C_MRX_N2
PCIE_GTX_MRX_P2
PCIE_GTX_MRX_N2 PCIE_GTX_C_MRX_P2
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4PCIE_GTX_MRX_N4
PCIE_GTX_MRX_P4
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P6
PCIE_GTX_MRX_N6
PCIE_GTX_MRX_P6
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_MRX_P8
PCIE_GTX_MRX_N8
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P10
PCIE_GTX_MRX_N10
PCIE_GTX_MRX_P10
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P12
PCIE_GTX_MRX_N12
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P14PCIE_GTX_MRX_P14
PCIE_GTX_MRX_N14
PCIE_GTX_MRX_P12
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
CLK_PCIE_VGA#
CLK_PCIE_VGA
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_MRX_P0
PCIE_GTX_MRX_N0
PCIE_GTX_MRX_N1
PCIE_GTX_MRX_P1 PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P1
PCIE_GTX_MRX_P3
PCIE_GTX_MRX_N3
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P4
PCIE_GTX_MRX_P5
PCIE_GTX_MRX_N5
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
EC_SMB_CK2_PX
EC_SMB_DA2_PX
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10
PCIE_GTX_MRX_N7
PCIE_GTX_MRX_P7 PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_MRX_P9
PCIE_GTX_MRX_N9
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_MRX_P11
PCIE_GTX_MRX_N11
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_MRX_P13
PCIE_GTX_MRX_N13
PLT_RST#
GPU_GPIO0[18] GPU_GPIO1[18] GPU_GPIO2[18]
SOUT_GPIO8[18]
GPU_GPIO9[18] GPU_GPIO11[18]
GPU_GPIO12[18] GPU_GPIO13[18]
VSYNC_DAC2[18] HSYNC_DAC2[18]
CRT_HSYNC[18,26] CRT_VSYNC[18,26]
EC_SMB_DA2 [4,26]
EC_SMB_CK2 [4,26]
PLT_RST#[8,22,26]
CLK_PCIE_VGA[16]
CLK_PCIE_VGA#[16]
PCIE_MTX_C_GRX_N[0..15][10]
PCIE_MTX_C_GRX_P[0..15][10]
PCIE_GTX_C_MRX_N[0..15][10]
PCIE_GTX_C_MRX_P[0..15][10]
GPU_THERMAL_D+[18]
GPU_THERMAL_D-[18]
THM_ALERT# [18]
+3.3V_DELAY
+3VS
+3.3V_DELAY
+1.1VS
+3.3V_DELAY
+3.3V_DELAY
+3.3V_DELAY
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
M92-S2 PCIE,STRAP
Custom
17 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
M92-S2 PCIE,STRAP
Custom
17 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
M92-S2 PCIE,STRAP
Custom
17 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Vendor Part Number#STRAPS
VRAM_ID[2:0]
256MB(X2)
512MB(x4)
Project
JM51_PU
PIN
DVPDATA
3.2.1
Samsung 64Mx16x4 DDR3
VRAM_ID 2,1,0
1 0 0
1 0 1
M92 S2-XT
512MB(x4)
Samsung 64Mx16x2 DDR3
Hynix 64Mx16x4 DDR3
Hynix 64Mx16x2 DDR3
GPU VRAM size
0 0 0
0 1 0
Compal Part Number#
STRAPS
GPIO5_AC_BATT TEST
VSYNC_DAC1 and HSYNC_DAC1
pull up to HDMI & DISPLAYPORT
AUDIO funciton
JM51_PU
JM51_PU
JM51_PU
SA000035700
SA000032400
For Future ASIC Pin
N10 need pull down
VGA Thermal Sensor ADM1032ARMZ-2
Closed to GPU
RECOMMENDED SETTINGS
00
BIF_RX_PLL_CALIB_BP
AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
0
HSYNC X X
AUD[1]
1
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB
ENABLE EXTERNAL BIOS ROM
GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED
1
0
0
1
GPIO9 VGA ENABLEDBIF_VGA DIS
VIP_DEVICE_STRAP_ENA V2SYNC
IGNORE VIP DEVICE STRAPS
GPIO_22_ROMCSB
GPIO2
STRAPS
PCIE GNE2 ENABLEDBIF_GEN2_EN_A
DESCRIPTION OF DEFAULT SETTINGSPIN
GPIO[13:11]ROMIDCFG(2:0)
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
CONFIGURATION STRAPS
BIOS_ROM_EN
1
VSYNCAUD[0]
H2SYNC
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
GENERICC
GPIO21_BB_ENGPIO_28_TDO
AMD RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
H2SYNC
0
SMS_EN_HARD
GENERICC 0CCBYPASS
BIF_CLK_PM_EN GPIO8 BIF_CLK_PM_EN 0
GPIO21
BIF_RX_PLL_CALIB_BP
256MB(X2)
NOTE:
Change part number directly,
from SA00002ZM10 to SA000030O20
M92XT -> LP, 2009/05/20
R950 4.7K_0402_5%R950 4.7K_0402_5%
1 2
C10640.1U_0402_16V7K C10640.1U_0402_16V7K 12
R937 10K_0402_5%
@
R937 10K_0402_5%
@
12
C10710.1U_0402_16V7K C10710.1U_0402_16V7K 12
U69
ADM1032ARMZ REEL_MSOP8
U69
ADM1032ARMZ REEL_MSOP8
VDD
1
ALERT# 6
THERM#
4GND 5
D+
2
D-
3
SCLK 8
SDATA 7
R943 10K_0402_5%
@
R943 10K_0402_5%
@
12
C10770.1U_0402_16V7K C10770.1U_0402_16V7K 12
C10570.1U_0402_16V7K C10570.1U_0402_16V7K 12
R939 10K_0402_5%
@
R939 10K_0402_5%
@
12
R951 4.7K_0402_5%R951 4.7K_0402_5%
1 2
R938 10K_0402_5%
@
R938 10K_0402_5%
@
12
C10610.1U_0402_16V7K C10610.1U_0402_16V7K 12
C10480.1U_0402_16V7K C10480.1U_0402_16V7K 12
C10690.1U_0402_16V7K C10690.1U_0402_16V7K 12
R347 10K_0402_5%
@
R347 10K_0402_5%
@
1 2
C10500.1U_0402_16V7K C10500.1U_0402_16V7K 12
C1371
2200P_0402_50V7K
C1371
2200P_0402_50V7K
1 2
C10670.1U_0402_16V7K C10670.1U_0402_16V7K 12
C10780.1U_0402_16V7K C10780.1U_0402_16V7K 12
C10720.1U_0402_16V7K C10720.1U_0402_16V7K 12
C10760.1U_0402_16V7K C10760.1U_0402_16V7K 12
C10460.1U_0402_16V7K C10460.1U_0402_16V7K 12
C10580.1U_0402_16V7K C10580.1U_0402_16V7K 12
T77 PAD
T77 PAD
C10530.1U_0402_16V7K C10530.1U_0402_16V7K 12
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
U64A
216-0728002 A11 M92-S2_FCBGA631
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
U64A
216-0728002 A11 M92-S2_FCBGA631
NC#1
L9
NC#2
N9
NC_PWRGOOD
N10 PCIE_CALRN AA22
PCIE_CALRP Y22
PCIE_REFCLKN
AK32 PCIE_REFCLKP
AK30
PCIE_RX0N
AE31 PCIE_RX0P
AF30
PCIE_RX10N
R31 PCIE_RX10P
T30
PCIE_RX11N
P28 PCIE_RX11P
R29
PCIE_RX12N
N31 PCIE_RX12P
P30
PCIE_RX13N
M28 PCIE_RX13P
N29
PCIE_RX14N
L31 PCIE_RX14P
M30
PCIE_RX15N
K30 PCIE_RX15P
L29
PCIE_RX1N
AD28 PCIE_RX1P
AE29
PCIE_RX2N
AC31 PCIE_RX2P
AD30
PCIE_RX3N
AB28 PCIE_RX3P
AC29
PCIE_RX4N
AA31 PCIE_RX4P
AB30
PCIE_RX5N
Y28 PCIE_RX5P
AA29
PCIE_RX6N
W31 PCIE_RX6P
Y30
PCIE_RX7N
V28 PCIE_RX7P
W29
PCIE_RX8N
U31 PCIE_RX8P
V30
PCIE_RX9N
T28 PCIE_RX9P
U29
PERSTB
AL27
PCIE_TX0N AG31
PCIE_TX0P AH30
PCIE_TX10N U23
PCIE_TX10P U24
PCIE_TX11N T27
PCIE_TX11P T26
PCIE_TX12N T23
PCIE_TX12P T24
PCIE_TX13N P26
PCIE_TX13P P27
PCIE_TX14N P23
PCIE_TX14P P24
PCIE_TX15N N26
PCIE_TX15P M27
PCIE_TX1N AF28
PCIE_TX1P AG29
PCIE_TX2N AF26
PCIE_TX2P AF27
PCIE_TX3N AD26
PCIE_TX3P AD27
PCIE_TX4N AB25
PCIE_TX4P AC25
PCIE_TX5N Y24
PCIE_TX5P Y23
PCIE_TX6N AB26
PCIE_TX6P AB27
PCIE_TX7N Y26
PCIE_TX7P Y27
PCIE_TX8N W23
PCIE_TX8P W24
PCIE_TX9N U26
PCIE_TX9P V27
C10730.1U_0402_16V7K C10730.1U_0402_16V7K 12
C10650.1U_0402_16V7K C10650.1U_0402_16V7K 12
C10600.1U_0402_16V7K C10600.1U_0402_16V7K 12
R946 10K_0402_5%
@
R946 10K_0402_5%
@
12
C10490.1U_0402_16V7K C10490.1U_0402_16V7K 12
R892
0_0402_5%
R892
0_0402_5%
1 2
Q75A
2N7002DW-T/R7_SOT363-6
Q75A
2N7002DW-T/R7_SOT363-6
6 1
2
R945 10K_0402_5%R945 10K_0402_5%
12
R949
10K_0402_5%
R949
10K_0402_5%
12
C10550.1U_0402_16V7K C10550.1U_0402_16V7K 12
C10540.1U_0402_16V7K C10540.1U_0402_16V7K 12
C10510.1U_0402_16V7K C10510.1U_0402_16V7K 12
C10700.1U_0402_16V7K C10700.1U_0402_16V7K 12
R936 10K_0402_5%
@
R936 10K_0402_5%
@
12
R947 10K_0402_5%
@
R947 10K_0402_5%
@
12
R864 1.27K_0402_1%R864 1.27K_0402_1%
1 2
C10620.1U_0402_16V7K C10620.1U_0402_16V7K 12
R865 2K_0402_1%R865 2K_0402_1%
1 2
C10590.1U_0402_16V7K C10590.1U_0402_16V7K 12
R948
10K_0402_5%
R948
10K_0402_5%
12
R944 10K_0402_5%R944 10K_0402_5%
12
R940 10K_0402_5%
@
R940 10K_0402_5%
@
12
R941 10K_0402_5%R941 10K_0402_5%
12
C10560.1U_0402_16V7K C10560.1U_0402_16V7K 12
C10520.1U_0402_16V7K C10520.1U_0402_16V7K 12
R942 10K_0402_5%
@
R942 10K_0402_5%
@
12
Q75B
2N7002DW-T/R7_SOT363-6
Q75B
2N7002DW-T/R7_SOT363-6
3
5
4
C10740.1U_0402_16V7K C10740.1U_0402_16V7K 12
C10660.1U_0402_16V7K C10660.1U_0402_16V7K 12
C10750.1U_0402_16V7K C10750.1U_0402_16V7K 12
C10470.1U_0402_16V7K C10470.1U_0402_16V7K 12
C1372
0.1U_0402_16V4Z
C1372
0.1U_0402_16V4Z 1
2
C10630.1U_0402_16V7K C10630.1U_0402_16V7K 12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDC2_DATA
+DPLL_PVDD
+A2VDD
D_RED
D_BLUE
D_GREEN
+VDD2DI
ENABLT
HDMI_SDA
CRT_DDC_DATA
CRT_DDC_CLK
HDMI_SCL
GPU_GPIO9
GPU_GPIO12
GPU_GPIO2
GPU_GPIO0
GPU_GPIO1
TESTEN
BB_EN
GPIO24_TRSTB
GPU_CTF
SOUT_GPIO8
R_27M_SSC
+DPLL_VDDC
XTALOUT
+VDD1DI
+A2VDDQ
VGA_PWRSEL0
GPU_GPIO13
27MCLK
GPIO23_CLKREQB
VGA_PWRSEL0
+AVDD
LCDI2C_CLK
GPU_GPIO11
DDC2_CLK
XTALOUT_XTL
27MCLK_XTL
ENAVDD
+DPLL_PVDD +DPLL_VDDC
VRAM_ID0
VRAM_ID1
VRAM_ID2
HDMI_SDA
CRT_DDC_DATA
CRT_DDC_CLK
HDMI_SCL
VGA_PWRSEL1
GPIO23_CLKREQB
GPIO24_TRSTB
TESTEN
GPIO24_TRSTB
ENABLT
ENAVDD
CLK_GPIO10
ROMSE_GPIO22
SOUT_GPIO8GPU_GPIO9
R_CLK_GPIO10
ROMSE_GPIO22
BB_EN
LCDI2C_DAT
ROMSE_GPIO22
VRAM_ID0
VRAM_ID1
VRAM_ID2
CLK_GPIO10
CLK_GPIO10 R_CLK_GPIO10
27MCLK_SSIC
R_27M_SSC
27M_NSSC_R
27MCLK_SSIC
27M_NSSC_R
27M_NSSC_R
27MCLK
XTALOUTXTALOUT_XTL
27MCLK_XTL
XTALOUT_XTL
TX0D- [26]
TX2D- [26]
TX0D+ [26]
TX1D+ [26]
TX2D+ [26]
TX1D- [26]
TXCD+ [26]
TXCD- [26]
GPU_GPIO0[17] GPU_GPIO1[17] GPU_GPIO2[17]
SOUT_GPIO8[17]
GPU_GPIO11[17] GPU_GPIO12[17] GPU_GPIO13[17]
GPU_GPIO9[17]
GPU_THERMAL_D+[17] GPU_THERMAL_D-[17]
CRT_DDC_DATA [26]
CRT_DDC_CLK [26]
VGA_PWRSEL0[33]
VSYNC_DAC2 [17]
HSYNC_DAC2 [17]
27M_NSSC[16]
27M_SSC[16]
ENABLT[26]
HDMI_HPD#[26]
THM_ALERT#[17]
VGA_HDMI_SCL [26]
VGA_HDMI_SDA [26]
CRT_VSYNC [17,26]
D_RED [26]
D_GREEN [26]
D_BLUE [26]
CRT_HSYNC [17,26]
ENAVDD [26]
TXCLK_L+ [26]
TXCLK_L- [26]
TXOUT_L0+ [26]
TXOUT_L0- [26]
TXOUT_L2+ [26]
TXOUT_L1+ [26]
TXOUT_L2- [26]
TXOUT_L1- [26]
BB_EN[20]
DDC2_CLK[26] DDC2_DATA[26]
VGA_CLK_REQ#[16]
+1.8VS +1.1VS
+3.3V_DELAY
+1.8VS +AVDD
+VDD1DI
+1.8VS
+1.8VS
+1.8VS
+VDD1DI
+3.3V_DELAY
+3.3V_DELAY
+3.3V_DELAY
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
M92-S2 LVDS,CRT,HDMI
Custom
18 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
M92-S2 LVDS,CRT,HDMI
Custom
18 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
M92-S2 LVDS,CRT,HDMI
Custom
18 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
LCD
(1.8V@1mA A2VDDQ)
(1.8V@70mA AVDD)
(1.8V@45mA VDD1DI)
1.8V
HDMI
CRT
Close to M92
(1.8V@20mA TSVDD)
(1.8V@120mA +DPLL_PVDD) (1.1V@300mA +DPLL_VDDC)
STRAP
Internal pull low
FLASH ROM
TYPE 1
EMI
EMI
Spread Spectrum For EMI
04/22
EMI
R03
R03
R03
R952 10K_0402_5%@R952 10K_0402_5%@
1 2
L105
BLM18PG121SN1D_0603
L105
BLM18PG121SN1D_0603
12
R877 0_0402_5%@R877 0_0402_5%@
1 2
R895 10K_0402_5%@R895 10K_0402_5%@12
T42PADT42PAD
R872 150_0402_1%R872 150_0402_1%
1 2
R870 150_0402_1%R870 150_0402_1%
1 2
C1116
0.1U_0402_10V6K
C1116
0.1U_0402_10V6K
1
2
R882 10K_0402_5%@R882 10K_0402_5%@12
R894 4.7K_0402_5%R894 4.7K_0402_5%
1 2
R954 10K_0402_5%@R954 10K_0402_5%@
1 2
R874 150_0402_1%R874 150_0402_1%
1 2
Y6
27MHz_16PF_6P27000126
@Y6
27MHz_16PF_6P27000126
@
GND
4
IN
1
OUT 3
GND 2
R873 4.7K_0402_5%R873 4.7K_0402_5%
1 2
T6 PADT6 PAD
R960 10K_0402_5%@R960 10K_0402_5%@12
C1102
1U_0402_6.3V4Z
C1102
1U_0402_6.3V4Z
1
2
R901 0_0402_5%R901 0_0402_5%
1 2
R881
0_0402_5%
R881
0_0402_5%
1 2
T4PAD T4PAD
R1001
0_0402_5%
@
R1001
0_0402_5%
@
R871 4.7K_0402_5%R871 4.7K_0402_5%
1 2
R896
1M_0402_5%
@R896
1M_0402_5%
@
12
R1002
0_0402_5%
R1002
0_0402_5%
L104
BLM18PG121SN1D_0603
L104
BLM18PG121SN1D_0603
12
R900 4.7K_0402_5%R900 4.7K_0402_5%
1 2
L109
BLM18PG121SN1D_0603
L109
BLM18PG121SN1D_0603
12
R953 10K_0402_5%@R953 10K_0402_5%@
1 2
R885
715_0402_1%
R885
715_0402_1%
1 2
R959
0_0402_5%
R959
0_0402_5%
1 2
C1117
22P_0402_50V8J
@
C1117
22P_0402_50V8J
@
1
2
T7 PADT7 PAD
C1101
10U_0603_6.3V
C1101
10U_0603_6.3V
1
2
LVTMDP
LVDS CONTROL
U64F
216-0728002 A11 M92-S2_FCBGA631
LVTMDP
LVDS CONTROL
U64F
216-0728002 A11 M92-S2_FCBGA631
DIGON AB12
TXCLK_LN_DPE3N AK14
TXCLK_LP_DPE3P AL15
TXCLK_UN_DPF3N AJ19
TXCLK_UP_DPF3P AH20
TXOUT_L0N_DPE2N AJ15
TXOUT_L0P_DPE2P AH16
TXOUT_L1N_DPE1N AK16
TXOUT_L1P_DPE1P AL17
TXOUT_L2N_DPE0N AJ17
TXOUT_L2P_DPE0P AH18
TXOUT_L3N AK18
TXOUT_L3P AL19
TXOUT_U0N_DPF2N AK20
TXOUT_U0P_DPF2P AL21
TXOUT_U1N_DPF1N AJ21
TXOUT_U1P_DPF1P AH22
TXOUT_U2N_DPF0N AK22
TXOUT_U2P_DPF0P AL23
TXOUT_U3N AJ23
TXOUT_U3P AK24
VARY_BL AB11
C1098
10U_0603_6.3V
C1098
10U_0603_6.3V
1
2
L102
MCK1608471YZF 0603
L102
MCK1608471YZF 0603
1 2
C1094
0.1U_0402_10V6K
C1094
0.1U_0402_10V6K
1
2
C1104
1U_0402_6.3V4Z
@
C1104
1U_0402_6.3V4Z
@
1
2
C1118
22P_0402_50V8J
@
C1118
22P_0402_50V8J
@
1
2
T29PAD T29PAD
R955 0_0402_5%R955 0_0402_5%
1 2
C1390
0.1U_0402_16V7K
C1390
0.1U_0402_16V7K
R1005 0_0402_5%
@
R1005 0_0402_5%
@
R883 10K_0402_5%@R883 10K_0402_5%@12
C1110
0.1U_0402_10V6K
C1110
0.1U_0402_10V6K
1
2
R956 0_0402_5%R956 0_0402_5%
1 2
R893 4.7K_0402_5%R893 4.7K_0402_5%
1 2
C1115
1U_0402_6.3V4Z
C1115
1U_0402_6.3V4Z
1
2
T41PAD T41PAD
U70
M25P10-AVMN6P
@U70
M25P10-AVMN6P
@
S
1
VCC
8
Q2
HOLD
7
VSS 4
D
5
C
6
W
3
DPA
DPB
MUTI GFX
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
U64B
216-0728002 A11 M92-S2_FCBGA631
DPA
DPB
MUTI GFX
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
U64B
216-0728002 A11 M92-S2_FCBGA631
DMINUS
T2
DPLL_PVDD
AF14
DPLL_PVSS
AE14
DPLL_VDDC
AD14
DPLUS
T4
DVPCLK
U1
DVPCNTL_0
AC7
DVPCNTL_1
Y2
DVPCNTL_2
U5
DVPCNTL_MVP_0
AA1
DVPCNTL_MVP_1
Y4
DVPDATA_0
Y7
DVPDATA_1
V2
DVPDATA_10
AC6
DVPDATA_11
W6
DVPDATA_12
AD7
DVPDATA_13
AA3
DVPDATA_14
AC8
DVPDATA_15
AA5
DVPDATA_16
AE8
DVPDATA_17
AA6
DVPDATA_18
AE9
DVPDATA_19
AB4
DVPDATA_2
Y8
DVPDATA_20
AD9
DVPDATA_21
AB2
DVPDATA_22
AC10
DVPDATA_23
AC5
DVPDATA_3
V4
DVPDATA_4
AB7
DVPDATA_5
W1
DVPDATA_6
AB8
DVPDATA_7
W3
DVPDATA_8
AB9
DVPDATA_9
W5
GENERICA
AB13
GENERICB
W8
GENERICC
W9
GENERICD
W7
GENERICE_HPD4
AD10
GPIO_0
U6
GPIO_1
U10
GPIO_10_ROMSCK
P2
GPIO_11
N6
GPIO_12
N5
GPIO_13
N3
GPIO_14_HPD2
Y9
GPIO_15_PWRCNTL_0
N1
GPIO_16_SSIN
M4
GPIO_17_THERMAL_INT
R6
GPIO_18_HPD3
W10
GPIO_19_CTF
M2
GPIO_2
T10
GPIO_20_PWRCNTL_1
P8
GPIO_21_BB_EN
P7
GPIO_22_ROMCSB
N8
GPIO_23_CLKREQB
N7
GPIO_3_SMBDATA
U8
GPIO_4_SMBCLK
U7
GPIO_5_AC_BATT
T9
GPIO_6
T8
GPIO_7_BLON
T7
GPIO_8_ROMSO
P10
GPIO_9_ROMSI
P4
H2SYNC AL13
HPD1
AC14
HSYNC AH26
JTAG_TCK
L3 JTAG_TDI
L5
JTAG_TDO
K4 JTAG_TMS
L1
JTAG_TRSTB
L6
NC_DDCAUX7N AC20
NC_DDCAUX7P AD20
TS_FDO
R5
TSVDD
AD17
TSVSS
AC17
VREFG
AC16
VSS1DI AD23
VSS2DI AC19
XTALIN
AM28
XTALOUT
AK28
A2VDD AE20
A2VDDQ AE17
A2VSSQ AE19
AUX1N AD4
AUX1P AD2
AUX2N AD11
AUX2P AD13
AVDD AG24
AVSSQ AE22
BAH24
B2 AK10
B2B AL9
BB AG25
CAH12
COMP AJ9
DDC1CLK AE6
DDC1DATA AE5
DDC2CLK AC11
DDC2DATA AC13
DDC6CLK AC1
DDC6DATA AC3
DDCAUX5N AD16
DDCAUX5P AE16
GAL25
G2 AL11
G2B AJ11
GB AJ25
RAM26
R2 AM12
R2B AK12
R2SET AG13
RB AK26
RSET AD22
SCL
R1
SDA
R3
TX0M_DPA2N AG5
TX0P_DPA2P AG3
TX1M_DPA1N AH1
TX1P_DPA1P AH3
TX2M_DPA0N AK1
TX2P_DPA0P AK3
TX3M_DPB2N AM5
TX3P_DPB2P AK6
TX4M_DPB1N AH6
TX4P_DPB1P AJ7
TX5M_DPB0N AL7
TX5P_DPB0P AK8
TXCAM_DPA3N AF4
TXCAP_DPA3P AF2
TXCBM_DPB3N AM3
TXCBP_DPB3P AK5
V2SYNC AJ13
VDD1DI AE23
VDD2DI AD19
VSYNC AJ27
YAM10
GPIO_29_DRM_0
T11
GPIO_30_DRM_1
R11
NC1 AB22
NC2 AC22
TESTEN
AF24
R905 10K_0402_5%@R905 10K_0402_5%@12
C1093
1U_0402_6.3V4Z
C1093
1U_0402_6.3V4Z
1
2
C1103
0.1U_0402_10V6K
C1103
0.1U_0402_10V6K
1
2
L103
MCK1608471YZF 0603
L103
MCK1608471YZF 0603
1 2
R878 4.7K_0402_5%R878 4.7K_0402_5%
1 2
C1209
22P_0402_50V8J
@
C1209
22P_0402_50V8J
@
1
2
R884
499_0402_1%
R884
499_0402_1%
12
R888
100_0402_5%
R888
100_0402_5%
1 2
R143
33_0402_1%
@R143
33_0402_1%
@
1 2
R1004 0_0402_5%R1004 0_0402_5%
C1100
0.1U_0402_10V6K
C1100
0.1U_0402_10V6K
1
2
T3PAD T3PAD
R1003
0_0402_5%
@
R1003
0_0402_5%
@
R876
499_0402_1%
R876
499_0402_1%
1 2 C1105
0.1U_0402_10V6K
@
C1105
0.1U_0402_10V6K
@
1
2
T5 PADT5 PAD C1099
1U_0402_6.3V4Z
C1099
1U_0402_6.3V4Z
1
2
C1092
10U_0603_6.3V6M C1092
10U_0603_6.3V6M
1
2
R880 10K_0402_5%
@
R880 10K_0402_5%
@
1 2
R875 10K_0402_5%R875 10K_0402_5%
12
R886
249_0402_1%
R886
249_0402_1%
12
C1095
10U_0603_6.3V6M C1095
10U_0603_6.3V6M
1
2
T76PADT76PAD
R903 0_0402_5%R903 0_0402_5%
1 2
T40PAD T40PAD
R887
75_0402_1%
R887
75_0402_1%
1 2
R879 0_0402_5%@R879 0_0402_5%@
1 2
T45PADT45PAD
R144
33_0402_1% @
R144
33_0402_1% @
1 2
U71
ASM3P2872AF-06OR_TSOT-23-6@
U71
ASM3P2872AF-06OR_TSOT-23-6@
XIN/CLKIN
3
VSS 6
MODOUT 5
VDD 4
REFOUT
1
XOUT
2
R957 0_0402_5%R957 0_0402_5%
1 2
R890 10K_0402_5%@R890 10K_0402_5%@
1 2
R889 1K_0402_5%R889 1K_0402_5%
12
R1000
0_0402_5%
R1000
0_0402_5%
T2PAD T2PAD
R1006 0_0402_5%
@
R1006 0_0402_5%
@
R891 10K_0402_5%R891 10K_0402_5%
12
C1096
1U_0402_6.3V4Z
C1096
1U_0402_6.3V4Z
1
2
C1097
0.1U_0402_10V6K
C1097
0.1U_0402_10V6K
1
2
C1114
10U_0603_6.3V
C1114
10U_0603_6.3V
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DPA_VDD18
+DPA_VDD10+DPA_VDD10
+DPA_VDD18
MDA[0..63]
DRAM_RST#
DRAM_RST#
+VDD_MEM15_REF1
CLKA1
CLKA1#
WEA#0
CLKA0#
RASA#1
CASA#1
WEA#1
+VDD_MEM15_REFD
+VDD_MEM15_REFD
MDA50
+VDD_MEM15_REF1
MDA59
MDA16
MDA47
MDA22
MDA24
MDA40
MDA18
MDA11
MDA7
MDA30
MDA46
MDA55
MDA17
MDA1
MDA58
MDA53
MDA26
MDA14
MDA49
MDA52
MDA45
MDA21
MDA43
MDA23
MDA3
MDA5
MDA15
MDA25
MDA60
MDA61
MDA41
MDA4
MDA2
MDA56
MDA57
MDA13
MDA6
MDA44
MDA33
MDA54
MDA32
MDA20
MDA27
MDA36
MDA10
MDA51
MDA19
MDA38
MDA9
MDA48
MDA12
MDA34
MDA28
MDA62
MDA8
MDA37
MDA63
MDA31
MDA35
MDA29
MDA0
MDA42
MDA39
BA[2..0]
QSA#4
QSA#5
QSA#6
QSA#7
MAA[12..0]
DQMA#4
MAA0
MAA2
MAA8
MAA4
MAA1
MAA3
MAA7
MAA10
MAA6
MAA5
MAA11
MAA9
DQMA#0
DQMA#1
DQMA#2
DQMA#3
QSA#2
QSA0
QSA1
QSA#1
QSA3
QSA2
QSA#0
QSA#3
DQMA#5
DQMA#6
DQMA#7
QSA4
QSA5
QSA6
QSA7
BA0
BA1
MAA12
BA2
ODTA0
CASA#0
CSA0#
RASA#0
CKEA0
CLKA0
CSA1#
CKEA1
ODTA1
+DPB_PVDD
+DPA_PVDD
QSA[7..0] [21]
QSA#[7..0] [21]
BA[2..0] [21]
DQMA#[7..0] [21]
MAA[12..0] [21]
CLKA0 [21]
CLKA1 [21]
CLKA1# [21]
CKEA0 [21]
RASA#0 [21]
CASA#0 [21]
WEA#0 [21]
CSA0# [21]
CLKA0# [21]
RASA#1 [21]
CSA1# [21]
CKEA1 [21]
WEA#1 [21]
ODTA0 [21]
ODTA1 [21]
CASA#1 [21]
DRAM_RST#[21]
+1.5VS +1.5VS
+1.8VS +DPE_VDD18
+DPF_VDD18
+1.8VS +1.8VS
+1.8VS
+1.1VS
+DPE_PVDD
+DPE_PVDD
+DPF_VDD10
+DPF_VDD10
+1.8VS
+DPE_VDD18
+1.1VS
+1.8VS
+1.5VS
MDA[0..63] [21]
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
M92-S2 MEMORY
Custom
19 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
M92-S2 MEMORY
Custom
19 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
M92-S2 MEMORY
Custom
19 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
(1.8V@200mA +DPE_VDD18)
(1.1V@170mA +DPF_VDD10)
(1.8V@20mA +DPE_PVDD)
(1.1V@200mA +DPA_VDD10)
(1.8V@20mA +DPA_PVDD)
(1.8V@20mA +DPB_PVDD)
(1.8V@120mA +DPLL_PVDD)
Close to K26 Close to J26
(For future use only)
R907
100_0402_1%
R907
100_0402_1%
12
T80PADT80PAD
R3174.7K_0402_5%
@
R3174.7K_0402_5%
@
1 2
L126
MCK1608471YZF 0603@
L126
MCK1608471YZF 0603@
1 2
T75PAD T75PAD
C1261
0.1U_0402_10V6K
@
C1261
0.1U_0402_10V6K
@
1
2
C1260
1U_0402_6.3V4Z
@
C1260
1U_0402_6.3V4Z
@
1
2
C1138
1U_0402_6.3V4Z
C1138
1U_0402_6.3V4Z
1
2
C113410U_0603_6.3V C113410U_0603_6.3V 1
2
C337
1U_0402_6.3V4Z
C337
1U_0402_6.3V4Z
1
2
L2
BLM18PG121SN1D_0603
L2
BLM18PG121SN1D_0603 12
C1259
10U_0603_6.3V6M
@
C1259
10U_0603_6.3V6M
@
1
2
R906
100_0402_1%
R906
100_0402_1%
12
C1125
10U_0603_6.3V
C1125
10U_0603_6.3V
1
2
R321
4.7K_0402_5%
R321
4.7K_0402_5%
12
C1135
1U_0402_6.3V4Z
C1135
1U_0402_6.3V4Z
1
2
DP PLL POWER
DP A/B POWERDP E/F POWER
U64G
216-0728002 A11 M92-S2_FCBGA631
DP PLL POWER
DP A/B POWERDP E/F POWER
U64G
216-0728002 A11 M92-S2_FCBGA631
DPA_PVDD AG8
DPA_PVSS AG7
DPA_VDD10#1 AF6
DPA_VDD10#2 AF7
NC_DPA_VDD18#1 AE11
NC_DPA_VDD18#2 AF11
DPA_VSSR#1 AE1
DPA_VSSR#2 AE3
DPA_VSSR#3 AG1
DPA_VSSR#4 AG6
DPA_VSSR#5 AH5
DPAB_CALR AE10
DPB_PVDD AG10
DPB_PVSS AG11
DPB_VDD10#1 AF8
DPB_VDD10#2 AF9
DPB_VSSR#1 AF10
DPB_VSSR#2 AG9
DPB_VSSR#3 AH8
DPB_VSSR#4 AM6
DPB_VSSR#5 AM8
NC_DPB_VDD18#1 AE13
NC_DPB_VDD18#2 AF13
DPE_PVDD
AG18
DPE_PVSS
AF19
DPE_VDD10#1
AG20
DPE_VDD10#2
AG21
DPE_VDD18#1
AG15
DPE_VDD18#2
AG16
DPE_VSSR#1
AG14
DPE_VSSR#2
AH14
DPE_VSSR#3
AM14
DPE_VSSR#4
AM16
DPE_VSSR#5
AM18
DPEF_CALR
AF17
NC_DPF_PVDD
AG19
NC_DPF_PVSS
AF20
DPF_VDD10#1
AF22
DPF_VDD10#2
AG22
DPF_VDD18#1
AF16
DPF_VDD18#2
AG17
DPF_VSSR#1
AF23
DPF_VSSR#2
AG23
DPF_VSSR#3
AM20
DPF_VSSR#4
AM22
DPF_VSSR#5
AM24
C1136
0.1U_0402_10V6K
C1136
0.1U_0402_10V6K
1
2
C1141
0.1U_0402_16V4Z
C1141
0.1U_0402_16V4Z
1
2
C1126
1U_0402_6.3V4Z
C1126
1U_0402_6.3V4Z
1
2
L111
BLM18PG121SN1D_0603
L111
BLM18PG121SN1D_0603
12
L112
BLM18PG121SN1D_0603
@
L112
BLM18PG121SN1D_0603
@
12
C1137
10U_0603_6.3V
C1137
10U_0603_6.3V
1
2
C1140
0.1U_0402_16V4Z
C1140
0.1U_0402_16V4Z
1
2
R908
100_0402_1%
R908
100_0402_1%
12
C1124
0.1U_0402_10V6K
C1124
0.1U_0402_10V6K
1
2
C1119
10U_0603_6.3V
C1119
10U_0603_6.3V
1
2
C1120
1U_0402_6.3V4Z
C1120
1U_0402_6.3V4Z
1
2
C1129
1U_0402_6.3V4Z
C1129
1U_0402_6.3V4Z
1
2
L110
BLM18PG121SN1D_0603
L110
BLM18PG121SN1D_0603
12
R322
4.7K_0402_5%
R322
4.7K_0402_5%
12
L113
BLM18PG121SN1D_0603
L113
BLM18PG121SN1D_0603 12
R897 0_0402_5%
R897 0_0402_5%
1 2
T74PAD T74PAD
R899
150_0402_1%
R899
150_0402_1%
1 2
T71PAD T71PAD
C1130
0.1U_0402_10V6K
C1130
0.1U_0402_10V6K
1
2
C1139
0.1U_0402_10V6K
C1139
0.1U_0402_10V6K
1
2
T78PADT78PAD
C1122
10U_0603_6.3V
C1122
10U_0603_6.3V
1
2
C1121
0.1U_0402_10V6K
C1121
0.1U_0402_10V6K
1
2
L114
BLM18PG121SN1D_0603
L114
BLM18PG121SN1D_0603
12
MEMORY INTERFACE
U64C
216-0728002 A11 M92-S2_FCBGA631
MEMORY INTERFACE
U64C
216-0728002 A11 M92-S2_FCBGA631
DQA_0
K27
DQA_1
J29
DQA_10
A28
DQA_11
C28
DQA_12
E27
DQA_13
G26
DQA_14
D26
DQA_15
F25
DQA_16
A25
DQA_17
C25
DQA_18
E25
DQA_19
D24
DQA_2
H30
DQA_20
E23
DQA_21
F23
DQA_22
D22
DQA_23
F21
DQA_24
E21
DQA_25
D20
DQA_26
F19
DQA_27
A19
DQA_28
D18
DQA_29
F17
DQA_3
H32
DQA_30
A17
DQA_31
C17
DQA_32
E17
DQA_33
D16
DQA_34
F15
DQA_35
A15
DQA_36
D14
DQA_37
F13
DQA_38
A13
DQA_39
C13
DQA_4
G29
DQA_40
E11
DQA_41
A11
DQA_42
C11
DQA_43
F11
DQA_44
A9
DQA_45
C9
DQA_46
F9
DQA_47
D8
DQA_48
E7
DQA_49
A7
DQA_5
F28
DQA_50
C7
DQA_51
F7
DQA_52
A5
DQA_53
E5
DQA_54
C3
DQA_55
E1
DQA_56
G7
DQA_57
G6
DQA_58
G1
DQA_59
G3
DQA_6
F32
DQA_60
J6
DQA_61
J1
DQA_62
J3
DQA_63
J5
DQA_7
F30
DQA_8
C30
DQA_9
F27
MEM_CALRP1
J8
MVREFDA
K26
MVREFSA
J26
NC_MEM_CALRN0
J25
NC_MEM_CALRN1
K7
NC_MEM_CALRP0
K25
CASA0B G19
CASA1B G16
CKEA0 K20
CKEA1 J17
CLKA0 H26
CLKA0B H25
CLKA1 G9
CLKA1B H9
CSA0B_0 H22
CSA0B_1 J22
CSA1B_0 G13
CSA1B_1 K13
DQMA_0 E32
DQMA_1 E30
DQMA_2 A21
DQMA_3 C21
DQMA_4 E13
DQMA_5 D12
DQMA_6 E3
DQMA_7 F4
MAA_0 K17
MAA_1 J20
MAA_10 J11
MAA_11 J13
MAA_12 H11
MAA_13/BA2 G11
MAA_14/BA0 J16
MAA_15/BA1 L15
MAA_2 H23
MAA_3 G23
MAA_4 G24
MAA_5 H24
MAA_6 J19
MAA_7 K19
MAA_8 J14
MAA_9 K14
ODTA0 L18
ODTA1 K16
RASA0B G22
RASA1B G17
RDQSA_0 H28
RDQSA_1 C27
RDQSA_2 A23
RDQSA_3 E19
RDQSA_4 E15
RDQSA_5 D10
RDQSA_6 D6
RDQSA_7 G5
RSVD#1 AB16
RSVD#2 G14
RSVD#3 G20
WDQSA_0 H27
WDQSA_1 A27
WDQSA_2 C23
WDQSA_3 C19
WDQSA_4 C15
WDQSA_5 E9
WDQSA_6 C5
WDQSA_7 H4
WEA0B G25
WEA1B H10
DRAM_RST
L10
CLKTESTA
K8
CLKTESTB
L7
C1127
0.1U_0402_10V6K
C1127
0.1U_0402_10V6K
1
2
C1132
1U_0402_6.3V4Z
C1132
1U_0402_6.3V4Z
1
2
C1131
10U_0603_6.3V
C1131
10U_0603_6.3V
1
2
R909
100_0402_1%
R909
100_0402_1%
12
L115
BLM18PG121SN1D_0603
L115
BLM18PG121SN1D_0603
12
C1123
1U_0402_6.3V4Z
C1123
1U_0402_6.3V4Z
1
2
T79PADT79PAD
R898
150_0402_1%
R898
150_0402_1%
1 2
R902243_0402_1% R902243_0402_1%1 2
C1128
10U_0603_6.3V
C1128
10U_0603_6.3V
1
2
C1133
0.1U_0402_10V6K
C1133
0.1U_0402_10V6K
1
2
R316
4.7K_0402_5%
R316
4.7K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VDDR4
+VDDR4
+PCIE_VDDC
+PCIE_PVDD
LV_TRANS1.8
+SPV10
+PCIE_GDDR
+VDDCI
VDD_RHA1.5
+VDDR5
+VDDR5
+VGASENSE
BB_EN[18]
+VGASENSE[33]
SUSP#
+VDDC_CT
+1.8VS
+1.8VS
+1.5VS
+1.8VS
+VGA_CORE
+1.8VS
+1.8VS
+VGA_CORE
+3.3V_DELAY
+3VS
+BBP
+1.1VS
+3.3V_DELAY
+1.5VS
+1.8VS
+BBP
+5VS
+VGA_CORE
+VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
M92-S2 PWR,GND
B
20 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
M92-S2 PWR,GND
B
20 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
M92-S2 PWR,GND
B
20 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
(1.1V@2000mA +PCIE_VDDC)
(1.8V@500mA +PCIE_GDDR)
(1.5V@2200mA)
(+VGA_CORE@2000mA +VDDCI)
(1.8V@110mA +VDDC_CT) (+VGA_CORE@9000mA +VDDC)
For S3: Install L127 and DO
not Install L124
For S2: Install L124 and DO
not Install L127
BB_EN=0V,for Back Biasing Disabled,
Q2004=OFF,Q2005=OFF and Q2006=ON,
+BBP=+GPU_CORE
BB_EN=+3.3V,for Back Biasing Enabled,
Q2004=ON,Q2005=ON and Q2006=OFF,
+BBP=+1.8VSDGPU
Back Biasing VGA_CORE sense for Power
Termination of VGA_CORE
R03
C1144
1U_0402_6.3V4Z
C1144
1U_0402_6.3V4Z
1
2
C1186
10U_0603_6.3V
C1186
10U_0603_6.3V
1
2
C1280
1U_0402_6.3V4Z
C1280
1U_0402_6.3V4Z
1
2
C1376
1U_0402_6.3V4Z
C1376
1U_0402_6.3V4Z
1
2
C1205
0.1U_0402_10V6K
C1205
0.1U_0402_10V6K
1
2
L119
BLM18PG121SN1D_0603
L119
BLM18PG121SN1D_0603
12
C1174
1U_0402_6.3V4Z
C1174
1U_0402_6.3V4Z
1
2
C1175
1U_0402_6.3V4Z
C1175
1U_0402_6.3V4Z
1
2
G
D
S
Q4
SSM3K7002FU_SC70-3
G
D
S
Q4
SSM3K7002FU_SC70-3
2
13
C1207
0.1U_0402_10V6K
C1207
0.1U_0402_10V6K
1
2
C1177
10U_0603_6.3V
C1177
10U_0603_6.3V
1
2
GND
U64E
216-0728002 A11 M92-S2_FCBGA631
GND
U64E
216-0728002 A11 M92-S2_FCBGA631
PCIE_VSS#1
AA27
PCIE_VSS#10
AF32
PCIE_VSS#11
AG27
PCIE_VSS#12
AH32
PCIE_VSS#13
K28
PCIE_VSS#14
K32
PCIE_VSS#15
L27
PCIE_VSS#16
M32
PCIE_VSS#17
N25
PCIE_VSS#18
N27
PCIE_VSS#19
P25
PCIE_VSS#2
AB24
PCIE_VSS#20
P32
PCIE_VSS#21
R27
PCIE_VSS#22
T25
PCIE_VSS#23
T32
PCIE_VSS#24
U25
PCIE_VSS#25
U27
PCIE_VSS#26
V32
PCIE_VSS#27
W25
PCIE_VSS#28
W26
PCIE_VSS#29
W27
PCIE_VSS#3
AB32
PCIE_VSS#30
Y25
PCIE_VSS#31
Y32
PCIE_VSS#4
AC24
PCIE_VSS#5
AC26
PCIE_VSS#6
AC27
PCIE_VSS#7
AD25
PCIE_VSS#8
AD32
PCIE_VSS#9
AE27
VSS_MECH#1 A32
VSS_MECH#2 AM1
VSS_MECH#3 AM32
GND#1 A3
GND#10 AD8
GND#11 AE7
GND#12 AG12
GND#13 AH10
GND#14 AH28
GND#15 B10
GND#16 B12
GND#17 B14
GND#18 B16
GND#19 B18
GND#2 A30
GND#20 B20
GND#21 B22
GND#22 B24
GND#23 B26
GND#24 B6
GND#25 B8
GND#26 C1
GND#27 C32
GND#28 E28
GND#29 F10
GND#3 AA13
GND#30 F12
GND#31 F14
GND#32 F16
GND#33 F18
GND#34 F2
GND#35 F20
GND#36 F22
GND#37 F24
GND#38 F26
GND#39 F6
GND#4 AA16
GND#40 F8
GND#41 G10
GND#42 G27
GND#43 G31
GND#44 G8
GND#45 H14
GND#46 H17
GND#47 H2
GND#48 H20
GND#49 H6
GND#5 AB10
GND#50 J27
GND#51 J31
GND#52 K11
GND#53 K2
GND#54 K22
GND#55 K6
GND#56
M6
GND#57
N11
GND#58
N12
GND#59
N13
GND#6 AB15
GND#60
N16
GND#61
N18
GND#62
N21
GND#63
P6
GND#64
P9
GND#65
R12
GND#66
R15
GND#67
R17
GND#68
R20
GND#69
T13
GND#7 AB6
GND#70
T16
GND#71
T18
GND#72
T21
GND#73
T6
GND#74
U15
GND#75
U17
GND#76
U20
GND#77
U3
GND#78
U9
GND#79
V13
GND#8 AC9
GND#80
V16
GND#81
V18
GND#82
V6
GND#83
Y10
GND#84
Y15
GND#85
Y17
GND#86
Y20
GND#87
Y6
GND#9 AD6
C1167
1U_0402_6.3V4Z
C1167
1U_0402_6.3V4Z
1
2
C1200
1U_0402_6.3V4Z
C1200
1U_0402_6.3V4Z
1
2
L130
BLM18PG121SN1D_0603
L130
BLM18PG121SN1D_0603
12
C1180
1U_0402_6.3V4Z
C1180
1U_0402_6.3V4Z
1
2
C1157
1U_0402_6.3V4Z
C1157
1U_0402_6.3V4Z
1
2
C1152
10U_0603_6.3V
C1152
10U_0603_6.3V
1
2
C1178
1U_0402_6.3V4Z
C1178
1U_0402_6.3V4Z
1
2
C1303
0.1U_0402_10V6K
C1303
0.1U_0402_10V6K
1
2
C1380
1U_0402_6.3V4Z
C1380
1U_0402_6.3V4Z
1
2
L117
BLM18PG121SN1D_0603
L117
BLM18PG121SN1D_0603
12
C1197
1U_0402_6.3V4Z
C1197
1U_0402_6.3V4Z
1
2
R444
0_0402_5%
R444
0_0402_5%
1 2
L128
BLM18PG121SN1D_0603
L128
BLM18PG121SN1D_0603
12
C1145
0.1U_0402_10V6K
C1145
0.1U_0402_10V6K
1
2
G
D
S
Q3
SI2301BDS_SOT23
G
D
S
Q3
SI2301BDS_SOT23
2
13
C1189
1U_0402_6.3V4Z
C1189
1U_0402_6.3V4Z
1
2
C1292
1U_0402_6.3V4Z
C1292
1U_0402_6.3V4Z
1
2
C1156
10U_0603_6.3V
C1156
10U_0603_6.3V
1
2
G
D
S
Q73
SI2301BDS_SOT23
G
D
S
Q73
SI2301BDS_SOT23
2
1 3
L122
MCK1608471YZF 0603
L122
MCK1608471YZF 0603
1 2
C1150
1U_0402_6.3V4Z
C1150
1U_0402_6.3V4Z
1
2
C1187
10U_0603_6.3V
C1187
10U_0603_6.3V
1
2
C1196
10U_0603_6.3V
C1196
10U_0603_6.3V
1
2
C1170
1U_0402_6.3V4Z
C1170
1U_0402_6.3V4Z
1
2
C1191
1U_0402_6.3V4Z
C1191
1U_0402_6.3V4Z
1
2
C1381
1U_0402_6.3V4Z
C1381
1U_0402_6.3V4Z
1
2
C1190
1U_0402_6.3V4Z
C1190
1U_0402_6.3V4Z
1
2
C1368
0.1U_0402_10V6K
C1368
0.1U_0402_10V6K
1
2
C1173
1U_0402_6.3V4Z
C1173
1U_0402_6.3V4Z
1
2
C1153
10U_0603_6.3V
C1153
10U_0603_6.3V
1
2
+
C1176
330U_D2E_2.5VM_R9M
+
C1176
330U_D2E_2.5VM_R9M
1
2
C1278
0.1U_0402_10V6K
C1278
0.1U_0402_10V6K
1
2
C1391
1U_0402_6.3V4Z
C1391
1U_0402_6.3V4Z
1
2
C1248
1U_0402_6.3V4Z
C1248
1U_0402_6.3V4Z
1
2
D7
CH751H-40_SC76
D7
CH751H-40_SC76
21
C1171
1U_0402_6.3V4Z
C1171
1U_0402_6.3V4Z
1
2
C1151
1U_0402_6.3V4Z
C1151
1U_0402_6.3V4Z
1
2
C1203
10U_0603_6.3V
C1203
10U_0603_6.3V
1
2
C1299
1U_0402_6.3V4Z
C1299
1U_0402_6.3V4Z
1
2
L123
BLM18PG121SN1D_0603
L123
BLM18PG121SN1D_0603
12
C1192
1U_0402_6.3V4Z
C1192
1U_0402_6.3V4Z
1
2
L116
MCK2012221YZF 0805
L116
MCK2012221YZF 0805
1 2
C1158
1U_0402_6.3V4Z
C1158
1U_0402_6.3V4Z
1
2
C1162
10U_0603_6.3V
C1162
10U_0603_6.3V
1
2
G
D
S
Q2
SSM3K7002FU_SC70-3
G
D
S
Q2
SSM3K7002FU_SC70-3
2
1 3
C1146
1U_0402_6.3V4Z
C1146
1U_0402_6.3V4Z
1
2
C1301
1U_0402_6.3V4Z
C1301
1U_0402_6.3V4Z
1
2
C1149
1U_0402_6.3V4Z
C1149
1U_0402_6.3V4Z
1
2
POWER
PLL
PCIE
CORE
MEM I/O
MEM CLK
I/O
BACK BIAS
LEVEL
TRANSLATION
ISOLATED
CORE I/O
U64D
216-0728002 A11 M92-S2_FCBGA631
POWER
PLL
PCIE
CORE
MEM I/O
MEM CLK
I/O
BACK BIAS
LEVEL
TRANSLATION
ISOLATED
CORE I/O
U64D
216-0728002 A11 M92-S2_FCBGA631
PCIE_PVDD
AM30
NC_MPV18
L8
NC_SPV18
H7
PCIE_VDDC#1 L23
PCIE_VDDC#10 T22
PCIE_VDDC#11 U22
PCIE_VDDC#12 V22
PCIE_VDDC#2 L24
PCIE_VDDC#3 L25
PCIE_VDDC#4 L26
PCIE_VDDC#5 M22
PCIE_VDDC#6 N22
PCIE_VDDC#7 N23
PCIE_VDDC#8 N24
PCIE_VDDC#9 R22
PCIE_VDDR#1 AB23
PCIE_VDDR#2 AC23
PCIE_VDDR#3 AD24
PCIE_VDDR#4 AE24
PCIE_VDDR#5 AE25
PCIE_VDDR#6 AE26
PCIE_VDDR#7 AF25
PCIE_VDDR#8 AG26
SPV10
H8
SPVSS
J7
VDDR1#1
H13
VDDR1#10
K24
VDDR1#11
K9
VDDR1#12
L11
VDDR1#13
L12
VDDR1#14
L13
VDDR1#15
L20
VDDR1#16
L21
VDDR1#17
L22
VDDR1#2
H16
VDDR1#3
H19
VDDR1#4
J10
VDDR1#5
J23
VDDR1#6
J24
VDDR1#7
J9
VDDR1#8
K10
VDDR1#9
K23
VDDR3#1
AA17
VDDR3#2
AA18
VDDR3#3
AB17
VDDR3#4
AB18
VDDR5#1
U11
VDDR5#2
U12
VDDR5#3
V11
VDDR5#4
V12
VDDR4#1
AA11
VDDR4#2
AA12
VDDR4#3
Y11
VDDR4#4
Y12
VDDRHA
L17
VSSRHA
L16
VDD_CT#1
AA20
VDD_CT#2
AA21
VDD_CT#3
AB20
VDD_CT#4
AB21 VDDC#1 AA15
VDDC#10 T17
VDDC#11 T20
VDDC#12 U13
VDDC#13 U16
VDDC#14 U18
VDDC#15 U21
VDDC#16 V15
VDDC#17 V17
VDDC#18 V20
VDDC#19 V21
VDDC#2 N15
VDDC#20 Y13
VDDC#21 Y16
VDDC#22 Y18
VDDC#23 Y21
VDDC#3 N17
VDDC#4 R13
VDDC#5 R16
VDDC#6 R18
VDDC#7 R21
VDDC#8 T12
VDDC#9 T15
VDDCI#1 M13
VDDCI#2 M15
VDDCI#3 M16
VDDCI#4 M17
BBP#1
M11
BBP#2
M12
VDDCI#5 M18
VDDCI#7 M21
VDDCI#6 M20
VDDCI#8 N20
C1169
1U_0402_6.3V4Z
C1169
1U_0402_6.3V4Z
1
2
C1161
1U_0402_6.3V4Z
C1161
1U_0402_6.3V4Z
1
2
C1164
1U_0402_6.3V4Z
C1164
1U_0402_6.3V4Z
1
2
C1143
1U_0402_6.3V4Z
C1143
1U_0402_6.3V4Z
1
2
R2128
100K_0402_5%
R2128
100K_0402_5%
12
C1194
1U_0402_6.3V4Z
C1194
1U_0402_6.3V4Z
1
2
C1188
1U_0402_6.3V4Z
C1188
1U_0402_6.3V4Z
1
2
C1160
1U_0402_6.3V4Z
C1160
1U_0402_6.3V4Z
1
2
G
D
S
Q74
2N7002_SOT23
G
D
S
Q74
2N7002_SOT23
2
13
C1377
1U_0402_6.3V4Z
C1377
1U_0402_6.3V4Z
1
2
C1147
1U_0402_6.3V4Z
C1147
1U_0402_6.3V4Z
1
2
C1198
0.1U_0402_10V6K
C1198
0.1U_0402_10V6K
1
2
C1195
1U_0402_6.3V4Z
C1195
1U_0402_6.3V4Z
1
2
C1185
10U_0603_6.3V
C1185
10U_0603_6.3V
1
2
C1277
10U_0603_6.3V
C1277
10U_0603_6.3V
1
2
C1179
1U_0402_6.3V4Z
C1179
1U_0402_6.3V4Z
1
2
C1204
1U_0402_6.3V4Z
C1204
1U_0402_6.3V4Z
1
2
C1148
1U_0402_6.3V4Z
C1148
1U_0402_6.3V4Z
1
2
C1199
1U_0402_6.3V4Z
C1199
1U_0402_6.3V4Z
1
2
L121
BLM18PG121SN1D_0603
L121
BLM18PG121SN1D_0603
12
C1281
1U_0402_6.3V4Z
C1281
1U_0402_6.3V4Z
1
2
C1201
1U_0402_6.3V4Z
C1201
1U_0402_6.3V4Z
1
2
C1305
10U_0603_6.3V
C1305
10U_0603_6.3V
1
2
C1159
1U_0402_6.3V4Z
C1159
1U_0402_6.3V4Z
1
2
C1379
1U_0402_6.3V4Z
C1379
1U_0402_6.3V4Z
1
2
R2129
10K_0402_5%
R2129
10K_0402_5%
1 2
C1172
1U_0402_6.3V4Z
C1172
1U_0402_6.3V4Z
1
2
C1166
1U_0402_6.3V4Z
C1166
1U_0402_6.3V4Z
1
2
C1375
1U_0402_6.3V4Z
C1375
1U_0402_6.3V4Z
1
2
C1142
1U_0402_6.3V4Z
C1142
1U_0402_6.3V4Z
1
2
C1206
1U_0402_6.3V4Z
C1206
1U_0402_6.3V4Z
1
2
C1165
0.1U_0402_10V6K
C1165
0.1U_0402_10V6K
1
2
C1366
0.1U_0402_10V6K
C1366
0.1U_0402_10V6K
1
2
C1163
10U_0603_6.3V
C1163
10U_0603_6.3V
1
2
C1298
10U_0603_6.3V
C1298
10U_0603_6.3V
1
2
L120
MCK2012221YZF 0805
L120
MCK2012221YZF 0805
1 2
C1365
0.1U_0402_10V6K
C1365
0.1U_0402_10V6K
1
2
C1168
1U_0402_6.3V4Z
C1168
1U_0402_6.3V4Z
1
2
R911 100K_0402_5%R911 100K_0402_5%
1 2
C1374
1U_0402_6.3V4Z
C1374
1U_0402_6.3V4Z
1
2
C1370
0.1U_0402_10V6K
C1370
0.1U_0402_10V6K
1
2
R910
100K_0402_5%
R910
100K_0402_5%
1 2
C1304
10U_0603_6.3V
C1304
10U_0603_6.3V
1
2
C1208
0.1U_0402_10V6K
C1208
0.1U_0402_10V6K
1
2
C1154
10U_0603_6.3V
C1154
10U_0603_6.3V
1
2
C1202
10U_0603_6.3V
C1202
10U_0603_6.3V
1
2
C1155
10U_0603_6.3V
C1155
10U_0603_6.3V
1
2
C1300
1U_0402_6.3V4Z
C1300
1U_0402_6.3V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DQMA#5
DQMA#4
MDA47
QSA7
MDA32
MDA63
MDA50
VREFC_A1
CLKA0#
CLKA0
CLKA1#
CLKA1
VREFD_Q1
QSA2
MDA41
QSA6
MDA33
MDA38
MDA62
MDA42
MDA55
DQMA#1
DQMA#3
QSA0
MDA58
QSA5
QSA4
MDA45
QSA#5
QSA#4
MDA43
QSA#6
MDA46
MDA48
MDA53
QSA#7
MDA37
MDA57
DQMA#0
DQMA#2
MDA36
MDA34
MDA44
DQMA#7
MDA61
MDA56
MDA35
MDA60
MDA51
QSA#1
QSA#3
MDA54
MDA49
MDA30
MDA26
MDA8
MDA27
MDA12
MDA25
MDA10
MDA15
MDA31
MDA9
MDA29
MDA11
MDA24
MDA14
MDA28
MDA13
MDA3
MDA16
MDA22
MDA2
MDA17
MDA23
MDA21
MDA19
MDA1
MDA0
MDA18
MDA7
MDA6
MDA5
MDA4
MDA20
MDA40
DQMA#6
VREFC_A2 VREFD_Q2 VREFD_Q3VREFC_A3
QSA3
QSA1
VREFC_A4 VREFD_Q4
BA0
BA1
ODTA0
CLKA0#
WEA#0
CKEA0
RASA#0
CASA#0
CSA0#
CLKA0
MAA11
MAA9
MAA10
MAA8
MAA7
MAA6
MAA3
MAA4
MAA5
MAA1
MAA2
MAA0
DRAM_RST#
VREFD_Q2
VREFC_A2
MAA12
BA2
BA0
BA2
BA1 BA0
BA2
BA1
MAA11
MAA9
MAA7
MAA8
MAA10
MAA6
MAA5
MAA4
MAA0
MAA3
MAA1
MAA2
VREFD_Q3
MDA39
VREFC_A3
MAA12
DRAM_RST# DRAM_RST#
MDA59
ODTA1
CASA#1
CLKA1#
MDA52
RASA#1
CKEA1
CSA1#
WEA#1
CLKA1
MAA11
MAA9
MAA6
MAA7
MAA8
MAA10
MAA3
MAA1
MAA0
MAA5
MAA2
MAA4
VREFD_Q4
VREFC_A4
MAA12
MAA1
VREFC_A1
MAA4
MAA7
VREFD_Q1
MAA0
MAA10
MAA3
MAA5
MAA2
MAA9
MAA6
MAA11
MDA[0..63]
MAA12
MAA8
DQMA#[7..0]
QSA[7..0]
MAA[12..0]
QSA#[7..0]
QSA#2
QSA#0
QSA#[7..0][19]
QSA[7..0][19]
DQMA#[7..0][19]
MAA[12..0][19]
CLKA0[19]
CASA#0[19]
CKEA1[19]
RASA#1[19]
BA2[19]
ODTA0[19]
RASA#0[19]
CLKA1#[19]
CKEA0[19]
CSA0#[19]
CLKA1[19]
WEA#1[19]
BA1[19]
CSA1#[19]
DRAM_RST#[19]
CLKA0#[19]
WEA#0[19]
ODTA1[19]
CASA#1[19]
BA0[19]
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS+1.5VS
+1.5VS +1.5VS
+1.5VS+1.5VS +1.5VS+1.5VS +1.5VS+1.5VS
+1.5VS
MDA[0..63][19]
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
VRAM DDR3
C
21 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
VRAM DDR3
C
21 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
VRAM DDR3
C
21 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LS-5588
R920
4.99K_0402_1%
R920
4.99K_0402_1%
12
C1221
10U_0603_6.3V6M
C1221
10U_0603_6.3V6M
1
2
C1224
10U_0603_6.3V6M
C1224
10U_0603_6.3V6M
1
2
R928
4.99K_0402_1%
R928
4.99K_0402_1%
12
C1218
0.1U_0402_10V6K
C1218
0.1U_0402_10V6K
1
2
C1225
1U_0402_6.3V4Z
C1225
1U_0402_6.3V4Z
1
2
R927
4.99K_0402_1%
R927
4.99K_0402_1%
12
R912
240_0402_1%
R912
240_0402_1%
12
C1289
10U_0603_6.3V6M
C1289
10U_0603_6.3V6M
1
2
C1236
1U_0402_6.3V4Z
C1236
1U_0402_6.3V4Z
1
2
R917
4.99K_0402_1%
R917
4.99K_0402_1%
12
96-BALL
SDRAM DDR3
U65
K4W1G1646E-HC12_FBGA96
96-BALL
SDRAM DDR3
U65
K4W1G1646E-HC12_FBGA96
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
R934 56_0402_1%R934 56_0402_1%
1 2
R916
4.99K_0402_1%
R916
4.99K_0402_1%
12
R922
4.99K_0402_1%
R922
4.99K_0402_1%
12
C1222
10U_0603_6.3V6M
C1222
10U_0603_6.3V6M
1
2
C1244
1U_0402_6.3V4Z
C1244
1U_0402_6.3V4Z
1
2
C1328
10U_0603_6.3V6M
C1328
10U_0603_6.3V6M
1
2
C1385
1U_0402_6.3V4Z
C1385
1U_0402_6.3V4Z
1
2
R921
4.99K_0402_1%
R921
4.99K_0402_1%
12
C1226
1U_0402_6.3V4Z
C1226
1U_0402_6.3V4Z
1
2
C1234
1U_0402_6.3V4Z
C1234
1U_0402_6.3V4Z
1
2
C1240
1U_0402_6.3V4Z
C1240
1U_0402_6.3V4Z
1
2
96-BALL
SDRAM DDR3
U68
K4W1G1646E-HC12_FBGA96
96-BALL
SDRAM DDR3
U68
K4W1G1646E-HC12_FBGA96
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
C1216
0.1U_0402_10V6K
C1216
0.1U_0402_10V6K
1
2
C1386
1U_0402_6.3V4Z
C1386
1U_0402_6.3V4Z
1
2
C1384
1U_0402_6.3V4Z
C1384
1U_0402_6.3V4Z
1
2
C1243
1U_0402_6.3V4Z
C1243
1U_0402_6.3V4Z
1
2
C1246
0.01U_0402_25V7K
C1246
0.01U_0402_25V7K
1
2
C1247
0.01U_0402_25V7K
C1247
0.01U_0402_25V7K
1
2
C1232
1U_0402_6.3V4Z
C1232
1U_0402_6.3V4Z
1
2
R931
4.99K_0402_1%
R931
4.99K_0402_1%
12
R915
240_0402_1%
R915
240_0402_1%
12
R913
240_0402_1%
R913
240_0402_1%
12
R914
240_0402_1%
R914
240_0402_1%
12
C1388
1U_0402_6.3V4Z
C1388
1U_0402_6.3V4Z
1
2
R935 56_0402_1%R935 56_0402_1%
1 2
R923
4.99K_0402_1%
R923
4.99K_0402_1%
12
R929
4.99K_0402_1%
R929
4.99K_0402_1%
12
C1230
1U_0402_6.3V4Z
C1230
1U_0402_6.3V4Z
1
2
C1231
1U_0402_6.3V4Z
C1231
1U_0402_6.3V4Z
1
2
R926
4.99K_0402_1%
R926
4.99K_0402_1%
12
C1233
1U_0402_6.3V4Z
C1233
1U_0402_6.3V4Z
1
2
R930
4.99K_0402_1%
R930
4.99K_0402_1%
12
C1228
1U_0402_6.3V4Z
C1228
1U_0402_6.3V4Z
1
2
C1229
1U_0402_6.3V4Z
C1229
1U_0402_6.3V4Z
1
2
C1223
10U_0603_6.3V6M
C1223
10U_0603_6.3V6M
1
2
C1383
1U_0402_6.3V4Z
C1383
1U_0402_6.3V4Z
1
2
96-BALL
SDRAM DDR3
U67
K4W1G1646E-HC12_FBGA96
96-BALL
SDRAM DDR3
U67
K4W1G1646E-HC12_FBGA96
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
C1387
1U_0402_6.3V4Z
C1387
1U_0402_6.3V4Z
1
2
R932 56_0402_1%R932 56_0402_1%
1 2
R933 56_0402_1%R933 56_0402_1%
1 2
C1212
0.1U_0402_10V6K
C1212
0.1U_0402_10V6K
1
2
C1227
1U_0402_6.3V4Z
C1227
1U_0402_6.3V4Z
1
2
C1215
0.1U_0402_10V6K
C1215
0.1U_0402_10V6K
1
2
R918
4.99K_0402_1%
R918
4.99K_0402_1%
12
C1213
0.1U_0402_10V6K
C1213
0.1U_0402_10V6K
1
2
C1214
0.1U_0402_10V6K
C1214
0.1U_0402_10V6K
1
2
C1245
1U_0402_6.3V4Z
C1245
1U_0402_6.3V4Z
1
2
R925
4.99K_0402_1%
R925
4.99K_0402_1%
12
C1237
10U_0603_6.3V6M
C1237
10U_0603_6.3V6M
1
2
R924
4.99K_0402_1%
R924
4.99K_0402_1%
12
96-BALL
SDRAM DDR3
U66
K4W1G1646E-HC12_FBGA96
96-BALL
SDRAM DDR3
U66
K4W1G1646E-HC12_FBGA96
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
C1217
0.1U_0402_10V6K
C1217
0.1U_0402_10V6K
1
2
C1241
1U_0402_6.3V4Z
C1241
1U_0402_6.3V4Z
1
2
C1235
1U_0402_6.3V4Z
C1235
1U_0402_6.3V4Z
1
2
C1219
0.1U_0402_10V6K
C1219
0.1U_0402_10V6K
1
2
R919
4.99K_0402_1%
R919
4.99K_0402_1%
12
C1242
1U_0402_6.3V4Z
C1242
1U_0402_6.3V4Z
1
2
C1220
10U_0603_6.3V6M
C1220
10U_0603_6.3V6M
1
2
C1239
1U_0402_6.3V4Z
C1239
1U_0402_6.3V4Z
1
2
C1238
1U_0402_6.3V4Z
C1238
1U_0402_6.3V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_ICH
PCI_GNT3#
PLT_RST#
CLK_PCI_ICH
PCI_SERR#
PCI_REQ3#
PCI_REQ1#
PCI_REQ2#
PCI_FRAME#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_IRDY#
PCI_PERR#
PCI_PLOCK#
PCI_GNT0#
PCI_REQ0#
PCI_PIRQE#
PCI_PIRQG#
PCI_PIRQH#
PCI_REQ2#
PCI_REQ3#
PCI_PIRQD#
PCI_DEVSEL#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#
PCI_PLOCK#
PCI_IRDY#
PCI_PERR#
PCI_SERR#
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQB#
PCI_REQ0#
PCI_REQ1#
PCI_PIRQF# PCI_PME#
PCI_GNT0#
PCI_PIRQG#
PCI_PIRQF#
PCI_PIRQE#
PCI_PIRQH#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQC#
PCI_GNT3#
CLK_PCI_ICH [16]
PLT_RST# [8,17,26]
PCI_PME# [26]
KBC_SPI_CS1#[24]
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(1/4)-PCI/INT
22 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(1/4)-PCI/INT
22 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(1/4)-PCI/INT
22 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
0
1
1
Boot BIOS Location
PCI
PCI_GNT0# SPI_CS#1
0
1
Boot BIOS Strap
*
LPC
SPI
Place closely pin B10
A16 swap override Strap
PCI_GNT3#
Low= A16 swap override Enble
High= Default*
1
DEL J3. 9/29
C235
8.2P_0402_50V
@
C235
8.2P_0402_50V
@
1
2
R164 8.2K_0402_5%
R164 8.2K_0402_5%
1 2
R178 8.2K_0402_5%R178 8.2K_0402_5%
1 2
R175 8.2K_0402_5%
R175 8.2K_0402_5%
1 2
R165 8.2K_0402_5%
R165 8.2K_0402_5%
1 2
R171 8.2K_0402_5%
R171 8.2K_0402_5%
1 2
R162 8.2K_0402_5%
R162 8.2K_0402_5%
1 2
R170 8.2K_0402_5%
R170 8.2K_0402_5%
1 2
R179 8.2K_0402_5%
R179 8.2K_0402_5%
1 2
R182
1K_0402_5%
@
R182
1K_0402_5%
@
12
R163 8.2K_0402_5%
R163 8.2K_0402_5%
1 2
R168 8.2K_0402_5%
R168 8.2K_0402_5%
1 2
R167 8.2K_0402_5%
R167 8.2K_0402_5%
1 2
PCI
Interrupt I/F
U5B
ICH9-M SFF ES_FCBGA569
PCI
Interrupt I/F
U5B
ICH9-M SFF ES_FCBGA569
AD0
A11
AD1
B12
AD2
A10
AD3
C12
AD4
A8
AD5
A12
AD6
E10
AD7
C11
AD8
B9
AD9
D8
AD10
A4
AD11
E8
AD12
A3
AD13
D9
AD14
C8
AD15
C2
AD16
D7
AD17
B3
AD18
D11
AD19
B6
AD20
D5
AD21
D3
AD22
F4
AD23
E3
AD24
E4
AD25
B2
AD26
C4
AD27
C1
AD28
D1
AD29
E2
AD30
J4
AD31
H2
REQ0# G4
GNT0# E1
REQ1#/GPIO50 A9
GNT1#/GPIO51 E12
REQ2#/GPIO52 B11
GNT2#/GPIO53 C10
REQ3#/GPIO54 D6
GNT3#/GPIO55 C6
C/BE0# D10
C/BE1# A5
C/BE2# E6
C/BE3# C9
IRDY# C3
PAR B1
PCIRST# T3
DEVSEL# A7
PERR# D4
PLOCK# C5
SERR# H5
STOP# A6
TRDY# A2
FRAME# B8
PLTRST# A21
PCICLK B5
PME# T1
PIRQA#
F1
PIRQB#
F5
PIRQC#
F2
PIRQD#
C7 PIRQH#/GPIO5 H4
PIRQG#/GPIO4 F3
PIRQF#/GPIO3 G1
PIRQE#/GPIO2 G3
R180
10_0402_5%
@
R180
10_0402_5%
@
12
R161 8.2K_0402_5%
R161 8.2K_0402_5%
1 2
R159 8.2K_0402_5%
R159 8.2K_0402_5%
1 2
R174 8.2K_0402_5%
R174 8.2K_0402_5%
12
R169 8.2K_0402_5%
R169 8.2K_0402_5%
1 2
R172 47K_0402_5%R172 47K_0402_5%
1 2
R173 8.2K_0402_5%
R173 8.2K_0402_5%
1 2
R181
1K_0402_5%@
R181
1K_0402_5%@
12
R183
1K_0402_5%@
R183
1K_0402_5%@
12
R166 8.2K_0402_5%
R166 8.2K_0402_5%
1 2
R176 8.2K_0402_5%
R176 8.2K_0402_5%
1 2
R160 8.2K_0402_5%
R160 8.2K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KB_RST#
GATEA20
SATA_TXP0_CR
HDA_SDOUT
SM_INTRUDER#
ICH_SRTCRST#
LAN100_SLP
ICH_INTVRMEN
GLAN_COMP
ICH_RTCX2
HDA_RST#
H_FERR#
ICH_RTCX2
CLK_PCIE_SATA#
SATA_TXP0_R
SM_INTRUDER#
GATEA20
SATA_RXP0_C
LPC_AD3
ICH_RTCX1
CLK_PCIE_SATA
KB_RST#
SATA_RXN0_C
H_STPCLK#
SATA_TXP1_R
SATA_RXP1_C
SATA_TXN0_R
HDA_SYNC
LPC_AD0
LAN100_SLP
H_FERR#_R
LPC_AD1
HDA_SDOUT
ICH_SRTCRST#
H_DPRSTP_R#
H_SMI#
THRMTRIP_ICH#
ICH_INTVRMEN
ICH_RTCX1
SATA_RXN1_C
LPC_AD2
HDA_BITCLK
ICH_RSVD
SATA_TXN1_CR
SATA_TXN0_CR
SATA_TXN1_R
SATA_TXP1_CR
SATA_TXN2_R
SATA_TXP2_R SATA_TXN2_CR
SATA_TXP2_CR
SATA_RXP2_C
SATA_RXN2_C
HDA_SDIN2
ICH_RTCRST#
H_DPSLP# [5] H_DPRSTP# [5,8,31]
H_FERR# [4]
H_PWRGOOD [5]
H_IGNNE# [4]
H_INIT# [4]
H_NMI [4]
H_SMI# [4]
H_STPCLK# [4]
H_THERMTRIP# [4,8]
LPC_AD[0..3] [26]
LPC_FRAME# [26]
H_A20M# [4]
GATEA20 [26]
H_INTR [4]
KB_RST# [26]
HDA_SYNC[26]
HDA_RST#[26]
HDA_SDOUT[26]
IDE_LED#[26]
CLK_PCIE_SATA# [16]
CLK_PCIE_SATA [16]
ICH_RSVD [24]
HDA_SDIN1[26]
ICH_RTCRST#[26]
SATA_RXN0_C[26] SATA_RXP0_C[26] SATA_TXN0_CR[26] SATA_TXP0_CR[26]
SATA_RXN1_C[26] SATA_RXP1_C[26] SATA_TXN1_CR[26] SATA_TXP1_CR[26]
SATA_RXN2_C [26]
SATA_RXP2_C [26]
SATA_TXN2_CR [26]
SATA_TXP2_CR [26]
HDA_BITCLK[26]
HDA_SDIN0[26]
+3VS
+3VS
+VCCP
+RTCVCC
+VCCP
+1.5VS
+3VS
+RTCVCC
+RTCVCC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(2/4)_LAN,HD,IDE,LPC
Custom
23 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(2/4)_LAN,HD,IDE,LPC
Custom
23 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(2/4)_LAN,HD,IDE,LPC
Custom
23 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
XOR CHAIN ENTRANCE STRAP:RSVD
0 0
00
1
1
1 1
ICH_RSVDHDA_SDOUT_CODEC
placed within 2" from
ICH9M
Within 500 mils
Place Close to U8.
Description
RV
XOR
Normal(D)
PCIE Bit1 9/27Del PU R203~R204
for H_DPRSTP# &
H_DPSLP#.
9/27
Change from 180K to 20K
& 0.1u to 1u. 9/29
Add C599 ~ C602 to solve WWAN noise issue. 1/23
Remove R227 & C199
C1079 0.01U_0402_16V7KC1079 0.01U_0402_16V7K
1 2
C1081 0.01U_0402_16V7KC1081 0.01U_0402_16V7K
1 2
Y2
32.768KHZ_12.5P_MC-146
Y2
32.768KHZ_12.5P_MC-146
1 4
2 3
R201
56_0402_5%
R201
56_0402_5%
12
T48 PADT48 PAD
T49PAD T49PAD
C24615P_0402_50V8J C24615P_0402_50V8J
1
2
R209 10K_0402_5% R209 10K_0402_5% 12
R189
0_0402_5%
@
R189
0_0402_5%
@
1 2
R197 10K_0402_5%R197 10K_0402_5%
1 2
T47PAD T47PAD
R1007 0_0402_5%R1007 0_0402_5%
C1250
2.2U_0603_6.3V4Z
C1250
2.2U_0603_6.3V4Z
1
2
R192
56_0402_5%
R192
56_0402_5%
1 2
R187 20K_0402_5%
R187 20K_0402_5%
1 2
R195 56_0402_5%R195 56_0402_5%
1 2
R198 24.9_0402_1% R198 24.9_0402_1%
1 2
R188
0_0402_5%
@
R188
0_0402_5%
@
1 2
R193 1K_0402_5%@R193 1K_0402_5%@
1 2
R184 330K_0402_1%
R184 330K_0402_1%
1 2
C24715P_0402_50V8J C24715P_0402_50V8J
1
2
R206 54.9_0402_1%R206 54.9_0402_1%
1 2
C236
1U_0603_10V4Z
C236
1U_0603_10V4Z
1
2
R196 10K_0402_5%R196 10K_0402_5%
1 2
R212 24.9_0402_1%
R212 24.9_0402_1%
1 2
R185 1M_0402_5%R185 1M_0402_5%
1 2
R318
20K_0402_5%
R318
20K_0402_5%
1 2
CLRP1
SHORT PADS
CLRP1
SHORT PADS
12
R191 1K_0402_5%@R191 1K_0402_5%@
1 2
C1083
0.01U_0402_16V7K
C1083
0.01U_0402_16V7K
1 2
R194 0_0402_5% R194 0_0402_5% 1 2
T46PADT46PAD
C1080 0.01U_0402_16V7KC1080 0.01U_0402_16V7K
1 2
C1082 0.01U_0402_16V7KC1082 0.01U_0402_16V7K
1 2
R186 330K_0402_1%R186 330K_0402_1%
1 2
R215
10M_0402_5%
R215
10M_0402_5%
1 2
C1084
0.01U_0402_16V7K
C1084
0.01U_0402_16V7K
1 2
RTCLAN / GLANIHDASATA
LPCCPU
U5A
ICH9-M SFF ES_FCBGA569
RTCLAN / GLANIHDASATA
LPCCPU
U5A
ICH9-M SFF ES_FCBGA569
RTCX1
F25
RTCX2
G25
INTVRMEN
E25
INTRUDER#
C23
GLAN_CLK
G22
LAN_RSTSYNC
D14
LAN_RXD0
A14
LAN_RXD1
D12
LAN_RXD2
B14
LAN_TXD0
D13
LAN_TXD1
C13
LAN_TXD2
A13
HDA_BIT_CLK
AE7
HDA_SYNC
AB7
HDA_RST#
AA7
HDA_SDIN0
AB6
HDA_SDIN1
AE6
HDA_SDIN2
AC6
HDA_SDOUT
AC7
SATALED#
AC9
SATA0RXN
AE14
SATA0RXP
AD14
SATA0TXN
AC15
SATA0TXP
AD15
SATA1RXN
AD13
SATA1RXP
AC13
SATA1TXN
AA14
SATA1TXP
AB14
SATA_CLKN AC16
SATA_CLKP AB16
SATARBIAS# AD10
SATARBIAS AE10
FWH0/LAD0 H3
FWH1/LAD1 J3
FWH2/LAD2 K5
FWH3/LAD3 L3
LDRQ0# H1
LDRQ1#/GPIO23 J1
FWH4/LFRAME# J2
A20GATE N3
A20M# AB23
DPRSTP# AE23
DPSLP# AE24
FERR# AD25
CPUPWRGD AE22
IGNNE# AD23
INIT# AE21
INTR AD24
RCIN# L1
SMI# AC21
NMI AD21
STPCLK# AC25
THRMTRIP# AC23
RTCRST#
G24
GPIO56
D15
GLAN_COMPO
H21 GLAN_COMPI
H22
HDA_SDIN3
AA5
SATA4TXN AB12
SATA4RXN AD12
SATA4TXP AA12
SATA4RXP AE12
TP11 AC22
HDA_DOCK_EN#/GPIO33
AD8
HDA_DOCK_RST#/GPIO34
AB8
LAN100_SLP
D25
SATA5RXN AC11
SATA5RXP AD11
SATA5TXN AB10
SATA5TXP AA10
SRTCRST#
C24
C1044
1U_0603_10V4Z
C1044
1U_0603_10V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SIRQ
LINKALERT#
EC_SWI#
PM_CLKRUN#
USB_OC#7
THERM_SCI#
PCIE_WAKE#
GPIO22
S4_STATE#
XDP_DBRESET#
GPIO24
M_PWROK
ICH_SUSCLK
SB_SPKR
SLP_S4#
ICH_SMB_DATA
CL_DATA0
LAN_RST
CLK_14M_ICH
ME__EC_CLK1
XDP_DBRESET#
GPIO38
GPIO22
S4_STATE#
CK_PWRGD_R
DPRSLPVR
NPCI_RST#
SIRQ
CL_RST#
CL_CLK0
SLP_S3#
GPIO1
R_STP_CPU#
THERM_SCI#
GPIO21
LINKALERT#
CL_VREF0_ICH
EC_SWI#
SLP_S5#
PCIE_WAKE#
PM_CLKRUN#
ME__EC_DATA1 GPIO37
PM_BMBUSY#
CLK_48M_ICH
ICH_SMB_CLK
ICH_LOW_BAT#
MCH_ICH_SYNC#
AC_IN
NPCI_RST#
ICH_SMB_DATA
ICH_SMB_CLKICH_SMBCLK
ICH_SMBDATA
ME__EC_DATA1
ME__EC_CLK1
VRMPWRGD
CLK_14M_ICHCLK_48M_ICH
USB_OC#0
GPIO42
USB_OC#1
USB_OC#6
GPIO44
USB_OC#2
LID_SW#
GPIO48
GPIO57
GPIO17
GPIO37
HDD_HALTLED
ICH_LOW_BAT#
GPIO1
USB_OC#4
USB_OC#5
GPIO18
GPIO57
LID_SW#
GPIO48
M_PWROKPM_PWROK
ICH_RSVD
GPIO42
PCIE_C_TXN2
USB_OC#4
DMI_RXN3
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXN0
USB_OC#2
DMI_TXP3
USB_OC#7
DMI_RXN1
PCIE_C_TXP4
PCIE_RXN4
PCIE_RXN2
DMI_RXN2
USB_OC#6
DMI_RXP3
DMI_IRCOMP
USB_OC#1
DMI_TXP2
USBRBIAS
PCIE_RXP4
USB_OC#0
CLK_PCIE_ICH
PCIE_C_TXN4
DMI_RXP2
PCIE_RXP2
DMI_TXP1
DMI_RXP0
USB_OC#5
CLK_PCIE_ICH#
DMI_RXP1
DMI_TXP0
DMI_RXN0
PCIE_C_TXP2
GPIO44
GPIO6
GPIO18
GPIO17
GPIO39
AC_IN
LAN_RST
GPIO24
H_STP_PCI#_R
GLAN_RXP
GLAN_TXP_C
GLAN_TXN_C
GLAN_RXN
WOL_EN
WOL_EN
USB_OC#11
USB_OC#9
USB_OC#10
USB_OC#11
USB_OC#9
USB_OC#10
HDD_HALTLED
GPIO39
GPIO21
GPIO38
GPIO38
HDD_HALTLED
GPIO39
GPIO21
EC_RSMRST#R
EC_RSMRST#R
H_STP_PCI#[16] H_STP_CPU#[16]
SB_SPKR[26]
PCIE_TXN2[26] PCIE_RXP2[26] PCIE_RXN2[26]
PCIE_TXP2[26]
CK_PWRGD [16]
SIRQ[26] THERM_SCI#[26]
VGATE[26,31]
CLK_48M_ICH [16]
CLK_14M_ICH [16]
SLP_S3# [26]
SLP_S5# [26]
SLP_S4# [26]
PM_DPRSLPVR [8,31]
CLKSATAREQ#[16]
CL_DATA0 [8]
CL_RST# [8]
XDP_DBRESET#[4]
CL_CLK0 [8]
M_PWROK [8]
MCH_ICH_SYNC#[8]
PM_BMBUSY#[8]
PCIE_TXN4[26] PCIE_RXP4[26] PCIE_RXN4[26]
PCIE_TXP4[26]
ON/OFFBTN# [26]
PCIE_WAKE#[26]
ICH_SMBCLK[14,15,16,26]
ICH_SMBDATA[14,15,16,26]
USB_OC#1[26] USB_OC#2[26]
LID_SW#[26]
PM_PWROK [8,26,31]
USB20_P1 [26]
DMI_RXN0 [8]
DMI_TXP3 [8]
USB20_P8 [26]
USB20_P3 [26]
DMI_TXP1 [8]
USB_OC#0[26]
ICH_RSVD[23]
DMI_RXN3 [8]
DMI_TXP2 [8]
USB20_N6 [26]
USB20_N1 [26]
DMI_RXP0 [8]
USB20_N8 [26]
USB20_P4 [26]
USB20_N3 [26]
USB20_P0 [26]
CLK_PCIE_ICH# [16]
DMI_RXN1 [8]
DMI_RXN2 [8]
USB20_P5 [26]
USB20_N0 [26]
DMI_TXN0 [8]
USB20_P7 [26]
USB20_N2 [26]
DMI_RXP1 [8]
DMI_RXP2 [8]
DMI_RXP3 [8]
USB20_N5 [26]
KBC_SPI_CS1#[22]
USB20_N4 [26]
DMI_TXP0 [8]
DMI_TXN3 [8]
USB20_N7 [26]
USB20_P2 [26]
CLK_PCIE_ICH [16]
DMI_TXN1 [8]
DMI_TXN2 [8]
USB20_P6 [26]
GPIO42[26]
GPIO44[26]
GPIO6[26] GPIO1[26]
GPIO48[26]
EC_SWI#[26]
AC_IN [26]
GPIO24 [26]
EC_SCI#[26] EC_SMI#[26]
GLAN_RXN[26] GLAN_RXP[26] GLAN_TXN[26] GLAN_TXP[26]
EC_RSMRST#[26]
+3VALW
+3VALW
+3VALW
+3VS
+3VS
+1.5VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(3/4)_DMI,USB,GPIO,PCIE
Custom
24 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(3/4)_DMI,USB,GPIO,PCIE
Custom
24 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(3/4)_DMI,USB,GPIO,PCIE
Custom
24 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Within 500 mils
WLAN
GLAN
Within 500 mils
EXP
WWAN
Place closely pin H1Place closely pin AF3
9/21
Add R321 in 10/03.
Add WOL_EN back. 10/10
Add R621 in 12/03.
RSMRST circuit
0518/'09
R03
R03
R281 10K_0402_5%@R281 10K_0402_5%@1 2
C272 0.1U_0402_10V7K C272 0.1U_0402_10V7K
1 2
R264 1K_0402_5%@R264 1K_0402_5%@
1 2
R256 10K_0402_5%R256 10K_0402_5%
1 2
T54PAD T54PAD
R280 10K_0402_5%R280 10K_0402_5%
1 2
R227 8.2K_0402_5%@ R227 8.2K_0402_5%@
1 2
R457
2.2K_0402_5%
R457
2.2K_0402_5%
1 2
R278 10K_0402_5%R278 10K_0402_5%
1 2
R455 4.7K_0402_5%R455 4.7K_0402_5%
1 2
T65
PAD T65
PAD
R275
2.2K_0402_5%
R275
2.2K_0402_5%
12
RP30
10K_1206_8P4R_5%
RP30
10K_1206_8P4R_5%
18 27 36 45
T52PAD T52PAD
R237 8.2K_0402_5%
R237 8.2K_0402_5%
1 2
T53PAD T53PAD
C263
0.1U_0402_16V4Z
C263
0.1U_0402_16V4Z
1
2
D13B
BAV99DW-7_SOT363
D13B
BAV99DW-7_SOT363
4
5
3
C270 0.1U_0402_10V7K
C270 0.1U_0402_10V7K
1 2
T50 PADT50 PAD
R271 10K_0402_5%R271 10K_0402_5%
1 2
R270 10K_0402_5%R270 10K_0402_5%
1 2
C269 0.1U_0402_10V7K
C269 0.1U_0402_10V7K
1 2
R255 8.2K_0402_5%R255 8.2K_0402_5%
1 2
R245 10K_0402_5%
R245 10K_0402_5%
1 2
G
D
S
Q9
RHU002N06_SOT323
G
D
S
Q9
RHU002N06_SOT323
2
13
R246 10K_0402_5%
R246 10K_0402_5%
1 2
R233 8.2K_0402_5%@ R233 8.2K_0402_5%@
1 2
T51
PAD T51
PAD
R251 10K_0402_5%R251 10K_0402_5%
1 2
PCI-Express
Direct Media Interface
USB
SPI
U5D
ICH9-M SFF ES_FCBGA569
PCI-Express
Direct Media Interface
USB
SPI
U5D
ICH9-M SFF ES_FCBGA569
PERN1
T25
PERP1
T24
PETN1
R24
PETP1
R23
PERN2
P25
PERP2
P24
PETN2
P21
PETP2
P22
PERN3
N23
PERP3
N24
PETN3
M21
PETP3
M22
PERN4
M25
PERP4
M24
PETN4
L24
PETP4
L23
PERN5
K24
PERP5
K25
PETN5
K21
PETP5
K22
PERN6/GLAN_RXN
H24
PERP6/GLAN_RXP
H25
PETN6/GLAN_TXN
J24
PETP6/GLAN_TXP
J23
DMI0RXN V25
DMI0RXP V24
DMI0TXN U24
DMI0TXP U23
DMI1RXN W23
DMI1RXP W24
DMI1TXN V21
DMI1TXP V22
DMI2RXN Y24
DMI2RXP Y25
DMI2TXN Y21
DMI2TXP Y22
DMI3RXN AB24
DMI3RXP AB25
DMI3TXN AA23
DMI3TXP AA24
DMI_CLKN T21
DMI_CLKP T22
DMI_ZCOMP AB21
DMI_IRCOMP AB22
OC0#/GPIO59
P4
OC1#/GPIO40
N4
OC2#/GPIO41
N1
OC3#/GPIO42
P5
OC4#/GPIO43
P1
OC5#/GPIO29
P2
OC6#/GPIO30
M3
OC7#/GPIO31
M2
USBP0N AE2
USBP0P AD1
USBP1N AD3
USBP1P AD4
USBP2N AC2
USBP2P AC3
USBP3N AC5
USBP3P AB4
USBP4N AB2
USBP4P AB1
USBP5N AA3
USBP5P AA2
USBP6N Y1
USBP6P Y2
USBP7N W2
USBP7P W3
USBRBIAS#
AD5 USBRBIAS
AE5
SPI_CLK
E24
SPI_CS0#
E23
SPI_CS1#/GPIO58/CLGPIO6
F23
SPI_MOSI
F22
SPI_MISO
G23
OC8#/GPIO44
P3
OC9#/GPIO45
R1
USBP8P V2
USBP8N V1
USBP9N Y5
USBP9P Y4
USBP10N U3
USBP11N V4
USBP10P U2
USBP11P V5
OC10#/GPIO46
R4
OC11#/GPIO47
R2
SATA
SMBSYS GPIO
GPIO
GPIO
Clocks
Power MGTController Link
MISC
U5C
ICH9-M SFF ES_FCBGA569
SATA
SMBSYS GPIO
GPIO
GPIO
Clocks
Power MGTController Link
MISC
U5C
ICH9-M SFF ES_FCBGA569
SATA0GP/GPIO21 AE19
SATA1GP/GPIO19 AA18
SATA4GP/GPIO36 AE20
SATA5GP/GPIO37 AA20
SMBCLK
C18
SMBDATA
C15
LINKALERT#/GPIO60/CLGPIO4
B21
SMLINK0
E18
SMLINK1
A24
SUS_STAT#/LPCPD#
T5
SYS_RESET#
C25
PMSYNC#/GPIO0
L2
GPIO1
AE16
GPIO6
AE18
GPIO7
AD18
GPIO8
B25
GPIO12
C14
SMBALERT#/GPIO11
A23
GPIO17
AE17
GPIO18
K3
SCLOCK/GPIO22
AC19
SATACLKREQ#/GPIO35
M4
STP_PCI#/GPIO15
B15
STP_CPU#/GPIO25
A20
SLOAD/GPIO38
AB18
SDATAOUT0/GPIO39
AC18
CLKRUN#/GPIO32
M5
SDATAOUT1/GPIO48
AB19
WAKE#
C21
SERIRQ
L4
THRM#
AD20
VRMPWRGD
B24
CLK14 K1
CLK48 AB5
SUSCLK R3
SLP_S3# D18
SLP_S4# B20
SLP_S5# D16
PWROK D23
DPRSLPVR/GPIO16 M1
BATLOW# C16
PWRBTN# U4
LAN_RST# D22
RSMRST# D19
RI#
C20
S4_STATE#/GPIO26 E14
GPIO27
D17
GPIO28
E20
TP12
A19
CK_PWRGD U1
CLPWROK T4
SLP_M# B23
GPIO20
AC8
CL_CLK0 C22
CL_CLK1 A18
CL_DATA0 E22
CL_DATA1 B18
CL_VREF0 F21
CL_VREF1 A17
CL_RST0# C17
GPIO10/SUS_PWR_ACK E16
WOL_EN/GPIO9 D21
GPIO14/AC_PRESENT A15
MEM_LED/GPIO24 A22
SPKR
K4
TP3
C19
CL_RST1# B17
GPIO49
AC20
GPIO13
D20
GPIO57/CLGPIO5
A16
TP10
AD17
TP8
AB17
MCH_SYNC#
AB20
TP9
AC17
R236
10K_0402_5%@
R236
10K_0402_5%@
12
R284
10_0402_5%
@
R284
10_0402_5%
@
12
R454
0_0402_5%
@R454
0_0402_5%
@
1 2
R277 10K_0402_5%R277 10K_0402_5%
1 2
R456
2.2K_0402_5%
@
R456
2.2K_0402_5%
@
1 2
C273
4.7P_0402_50V8C
@
C273
4.7P_0402_50V8C
@
1
2
R276 24.9_0402_1% R276 24.9_0402_1%
1 2
C271 0.1U_0402_10V7K C271 0.1U_0402_10V7K
1 2
D13A
BAV99DW-7_SOT363
D13A
BAV99DW-7_SOT363
1
2
6
R241 100K_0402_5% R241 100K_0402_5%
1 2
R244 10K_0402_5%R244 10K_0402_5%
1 2
R240 0_0402_5%R240 0_0402_5%
1 2
R224
2.2K_0402_5%
R224
2.2K_0402_5%
12
T55PAD T55PAD
R282 10K_0402_5%@R282 10K_0402_5%@1 2
R223
2.2K_0402_5%
R223
2.2K_0402_5%
12
R254 10K_0402_5%
R254 10K_0402_5%
1 2
C266 0.1U_0402_10V7K
C266 0.1U_0402_10V7K
1 2
R283
10_0402_5%
@
R283
10_0402_5%
@
12
R222 10K_0402_5%
R222 10K_0402_5%
1 2
C274
4.7P_0402_50V8C
@
C274
4.7P_0402_50V8C
@
1
2
R225 8.2K_0402_5%
R225 8.2K_0402_5%
1 2
T59PAD T59PAD
C
B
E
Q26
MMBT3906_SOT23-3
C
B
E
Q26
MMBT3906_SOT23-3
1
2
3
G
D
S
Q8
RHU002N06_SOT323
G
D
S
Q8
RHU002N06_SOT323
2
13
R221 0_0402_5%R221 0_0402_5%
1 2
R238 10K_0402_5%
R238 10K_0402_5%
1 2
R269 10K_0402_5%R269 10K_0402_5%
1 2
R274
2.2K_0402_5%
R274
2.2K_0402_5%
12
R248 100K_0402_5% R248 100K_0402_5%
1 2
R247 0_0402_5% R247 0_0402_5%
1 2
R249 8.2K_0402_5%@R249 8.2K_0402_5%@
1 2
R257
3.24K_0402_1%
R257
3.24K_0402_1%
1 2
R220 10K_0402_5%
R220 10K_0402_5%
1 2
R232 10K_0402_5%
R232 10K_0402_5%
1 2
R262 8.2K_0402_5% R262 8.2K_0402_5%
1 2
R239 10K_0402_5%@ R239 10K_0402_5%@
1 2
R253 0_0402_5%R253 0_0402_5%
1 2
R261 10K_0402_5%R261 10K_0402_5%
1 2
R235
10K_0402_5%@R235
10K_0402_5%@
12
R285 10K_0402_5%@R285 10K_0402_5%@1 2
R259 10K_0402_5%R259 10K_0402_5%
1 2
C265 0.1U_0402_10V7K
C265 0.1U_0402_10V7K
1 2
R230 47K_0402_5%R230 47K_0402_5%
1 2
R258 100K_0402_5%@R258 100K_0402_5%@
1 2
R231 8.2K_0402_5%
R231 8.2K_0402_5%
1 2
R242 47K_0402_5%@R242 47K_0402_5%@1 2
R287
22.6_0402_1%
R287
22.6_0402_1%
12
R243 0_0402_5%R243 0_0402_5%
1 2
R445 0_0402_5%R445 0_0402_5%
1 2
R27310K_0402_5% R27310K_0402_5% 12
R260
453_0402_1%
R260
453_0402_1%
12
RP29
10K_1206_8P4R_5%
RP29
10K_1206_8P4R_5%
18 27 36 45
R250 1K_0402_5%R250 1K_0402_5%
1 2
R252 10K_0402_5%@R252 10K_0402_5%@
1 2
R279 10K_0402_5%R279 10K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC_DMI
ICH_V5REF_SUS
ICH_V5REF_SUS
+1.5VS_GLAN
VCCSUS1_05_ICH_2
+1.5VS_DMIPLL
ICH_V5REF_RUN
VCCSUS1_5_ICH_2
VCCSUS1_5_ICH_1
VCCSUS1_05_ICH_1
VCC_LAN1_05_INT_ICH
ICH_V5REF_RUN
VCCCL1_05_ICH
+VCCP
+RTCVCC
+1.5VS
+3VS
+3VS
+1.5VS
+1.5VS
+5VS +3VS +3VALW+5VALW
+3VS
+3VALW
+3VALW
+VCCP
+1.5VS_PCIE_ICH
+1.5VS
VCC_DMI
+1.5VS_VCCSATAPLL
+1.5VS
+1.5VS_PCIE_ICH
+1.5VS_USBPLL
+VCCP
+1.5VS
+3VS
+3VS
+1.5VS
+3VS
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(4/4)_POWER&GND
Custom
25 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(4/4)_POWER&GND
Custom
25 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
ICH9(4/4)_POWER&GND
Custom
25 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
(DMI)
40 mils
20 mils
20 mils
20 mils
9/19
9/21
9/21
9/29
9/29
9/29
+1.5VALW
R03
R325 0_0603_5%R325 0_0603_5%
1 2
C308
0.1U_0402_16V4Z
C308
0.1U_0402_16V4Z
12
C283
0.01U_0402_16V7K
C283
0.01U_0402_16V7K
1
2
C290
0.1U_0402_16V4Z
C290
0.1U_0402_16V4Z
1
2
C303
0.1U_0402_16V4Z
C303
0.1U_0402_16V4Z
1
2
R289
BLM18PG181SN1D_0603
R289
BLM18PG181SN1D_0603
1 2
C289
0.1U_0402_16V4Z
C289
0.1U_0402_16V4Z
1
2
C297
10U_0603_6.3V6M
C297
10U_0603_6.3V6M
1
2
C304
0.1U_0402_16V4Z
C304
0.1U_0402_16V4Z
1 2
D6
CH751H-40_SC76
D6
CH751H-40_SC76
21
C285
1U_0603_10V4Z
C285
1U_0603_10V4Z
1
2
R298
MBK1608301YZF 0603
R298
MBK1608301YZF 0603
1 2
C291
1U_0402_6.3V6K
C291
1U_0402_6.3V6K
1
2
C311
10U_0603_6.3V6M
C311
10U_0603_6.3V6M
1
2
+
C282
220U_D2_4VM_R15
+
C282
220U_D2_4VM_R15
1
2
C275
0.1U_0402_16V4Z
C275
0.1U_0402_16V4Z
1
2
R293
100_0402_5%
R293
100_0402_5%
12
C293
0.1U_0402_16V4Z
C293
0.1U_0402_16V4Z
1
2
C307
0.1U_0402_16V4Z
C307
0.1U_0402_16V4Z
1
2
C276
0.1U_0402_16V4Z
C276
0.1U_0402_16V4Z
1
2
C279
10U_0603_6.3V6M
C279
10U_0603_6.3V6M
1
2
C295
0.1U_0402_16V4Z
C295
0.1U_0402_16V4Z
1
2
C287
4.7U_0603_6.3V6K
C287
4.7U_0603_6.3V6K
1
2
C305 1U_0402_6.3V6K
C305 1U_0402_6.3V6K
1 2
C300
0.1U_0402_16V4Z
C300
0.1U_0402_16V4Z
1
2
C278
0.1U_0402_16V4Z
C278
0.1U_0402_16V4Z
1
2
U5E
ICH9-M SFF ES_FCBGA569
U5E
ICH9-M SFF ES_FCBGA569
VSS[001]
B4
VSS[002]
B7
VSS[003]
B10
VSS[004]
B13
VSS[005]
B16
VSS[006]
B19
VSS[007]
B22
VSS[008]
D2
VSS[009]
D24
VSS[010]
E5
VSS[011]
E7
VSS[012]
E9
VSS[013]
E11
VSS[014]
E13
VSS[015]
E15
VSS[016]
E17
VSS[017]
E19
VSS[018]
E21
VSS[019]
F24
VSS[020]
G2
VSS[021]
G5
VSS[022]
G10
VSS[023]
G13
VSS[024]
G16
VSS[025]
G19
VSS[026]
G21
VSS[027]
H10
VSS[028]
H12
VSS[029]
H18
VSS[030]
H23
VSS[031]
J5
VSS[032]
J9
VSS[033]
J10
VSS[034]
J11
VSS[035]
J12
VSS[036]
J13
VSS[037]
J15
VSS[038]
J21
VSS[039]
J22
VSS[040]
J25
VSS[041]
K2
VSS[042]
K9
VSS[043]
K10
VSS[044]
K11
VSS[045]
K12
VSS[046]
K13
VSS[047]
K15
VSS[048]
K17
VSS[049]
K23
VSS[050]
L5
VSS[051]
L9
VSS[052]
L10
VSS[053]
L16
VSS[054]
L17
VSS[055]
L21
VSS[056]
L22
VSS[057]
L25
VSS[058]
M9
VSS[059]
M10
VSS[060]
M12
VSS[061]
M13
VSS[062]
M14
VSS[063]
M16
VSS[064]
M17
VSS[065]
M23
VSS[066]
N2
VSS[067]
N5
VSS[068]
N9
VSS[069]
N10
VSS[070]
N12
VSS[071]
N13
VSS[072]
N14
VSS[073]
N16
VSS[074]
N17
VSS[075]
N21
VSS[076]
N22
VSS[077]
N25
VSS[078]
P9
VSS[079]
P10
VSS[080]
P12
VSS[081]
P13
VSS[082]
P14
VSS[083]
P16
VSS[084]
P17
VSS[085]
P23
VSS[086]
R5
VSS[087]
R7
VSS[088]
R8
VSS[089]
R9
VSS[090]
R10
VSS[091]
R16
VSS[092]
R17
VSS[093]
R19
VSS[094]
R21
VSS[095]
R22
VSS[096]
R25
VSS[097]
T2
VSS[099]
T10
VSS[100]
T11
VSS[101]
T12
VSS[102]
T13
VSS[103]
T14
VSS[104]
T15
VSS[105]
T16
VSS[106]
T23
VSS[107] U5
VSS[108] U10
VSS[109] W11
VSS[110] U14
VSS[111] W16
VSS[112] U21
VSS[113] U22
VSS[114] U25
VSS[115] V3
VSS[116] V8
VSS[117] V19
VSS[118] V23
VSS[119] W1
VSS[120] W4
VSS[121] W5
VSS[122] W7
VSS[123] W9
VSS[124] W15
VSS[125] W19
VSS[126] W21
VSS[127] W22
VSS[128] W25
VSS[129] Y3
VSS[130] Y23
VSS[131] AA1
VSS[132] AA4
VSS[133] AA6
VSS[134] AA8
VSS[135] AA11
VSS[136] AA13
VSS[137] AA15
VSS[138] AA16
VSS[139] AA17
VSS[140] AA19
VSS[141] AA21
VSS[142] AA22
VSS[143] AA25
VSS[144] AB3
VSS[145] AB9
VSS[146] AB11
VSS[147] AB13
VSS[148] AB15
VSS[149] AC24
VSS[150] AC1
VSS[151] AC4
VSS[152] AC10
VSS[153] AC12
VSS[154] AC14
VSS[155] AD2
VSS[156] AD6
VSS[157] AD9
VSS[158] AD16
VSS[159] AD19
VSS[160] AD22
VSS[161] AE3
VSS[162] AE4
VSS[163] AE11
VSS[164] AE13
VSS[165] AE15
VSS_NCTF[01] A1
VSS_NCTF[02] A25
VSS_NCTF[03] AE1
VSS_NCTF[04] AE25
VSS[098]
T8
VSS[166] V17
VSS[167] AE8
VSS[168] V9
VSS[169] J16
C292
0.1U_0402_16V4Z
C292
0.1U_0402_16V4Z
1
2
R303
MBK1608301YZF 0603
R303
MBK1608301YZF 0603
1 2
T63T63
C309
0.1U_0402_16V4Z
C309
0.1U_0402_16V4Z
1
2
C288
0.1U_0402_16V4Z
C288
0.1U_0402_16V4Z
1
2
C286
0.1U_0402_16V4Z
C286
0.1U_0402_16V4Z
1
2
R296
MBK1608301YZF 0603
R296
MBK1608301YZF 0603
1 2
C281
2.2U_0402_6.3V6M
C281
2.2U_0402_6.3V6M
1
2R290
MBK1608301YZF 0603
R290
MBK1608301YZF 0603
1 2
R319 180_0402_1%@R319 180_0402_1%@
1 2
C306
0.1U_0402_16V4Z
C306
0.1U_0402_16V4Z
1
2
C302
4.7U_0603_6.3V6K
C302
4.7U_0603_6.3V6K
1
2
T60T60
R324 0_0603_5%@R324 0_0603_5%@1 2
T62T62
C301
0.1U_0402_16V4Z
C301
0.1U_0402_16V4Z
1
2
C277
0.1U_0402_16V4Z
C277
0.1U_0402_16V4Z
1
2
C296
1U_0402_6.3V6K
C296
1U_0402_6.3V6K
1
2
R304
MBK1608301YZF 0603
R304
MBK1608301YZF 0603
1 2
C299
1U_0603_10V4Z
C299
1U_0603_10V4Z
1
2
T61T61
C310
10U_0603_6.3V6M
C310
10U_0603_6.3V6M
1
2
C284
1U_0603_10V4Z
C284
1U_0603_10V4Z
1
2
R320
150_0402_1%
@
R320
150_0402_1%
@
12
R294
100_0402_5%
R294
100_0402_5%
12
C298
1U_0603_10V4Z
C298
1U_0603_10V4Z
1
2
R292
MBK1608301YZF 0603
R292
MBK1608301YZF 0603
1 2
CORE
VCCA3GP ATXARX USB CORE
PCI
GLAN POWER
VCCP_CORE
VCCPSUSVCCPUSB
U5F
ICH9-M SFF ES_FCBGA569
CORE
VCCA3GP ATXARX USB CORE
PCI
GLAN POWER
VCCP_CORE
VCCPSUSVCCPUSB
U5F
ICH9-M SFF ES_FCBGA569
V5REF
G7
V5REF_SUS
U7
VCC1_5_B[01]
J19
VCC1_5_B[02]
K18
VCC1_5_B[03]
K19
VCC1_5_B[04]
L18
VCC1_5_B[05]
L19
VCC1_5_B[06]
M18
VCC1_5_B[07]
M19
VCC1_5_B[08]
N18
VCC1_5_B[09]
N19
VCC1_5_B[10]
P18
VCC1_5_B[11]
R18
VCC1_5_B[12]
T18
VCC1_5_B[13]
T19
VCC1_5_B[14]
U18
VCC1_5_B[15]
U19
VCC3_3[01] V18
VCCDMIPLL P19
VCC1_5_A[01]
U13
VCC1_5_A[02]
V13
VCC1_5_A[03]
W13
VCCSATAPLL
W17
VCC3_3[02] AE9
VCC1_5_A[04]
U12
VCC1_5_A[05]
V12
VCCUSBPLL
U8
VCCLAN1_05[1]
G11
VCCLAN1_05[2]
H11
VCC1_05[01] L11
VCC1_05[02] L12
VCC1_05[03] L13
VCC1_05[04] L14
VCC1_05[05] L15
VCC1_05[06] M11
VCC1_05[07] M15
VCC1_05[08] N11
VCC1_05[09] N15
VCC1_05[10] P11
VCC1_05[11] P15
VCC1_05[12] R11
VCC1_05[13] R12
VCC1_05[14] R13
VCC1_05[15] R14
VCC1_05[16] R15
VCCLAN3_3[1]
G12
VCCLAN3_3[2]
H13
VCCHDA AD7
VCCSUSHDA V10
V_CPU_IO[1] V16
V_CPU_IO[2] U16
VCC3_3[07] H7
VCC3_3[08] H8
VCCRTC
G17
VCCSUS3_3[01] G14
VCCSUS3_3[02] G15
VCCSUS3_3[03] H14
VCCSUS3_3[05] J7
VCCSUS3_3[06] J8
VCCSUS3_3[07] K7
VCCSUS3_3[08] K8
VCCSUS3_3[09] L7
VCCSUS3_3[10] L8
VCCSUS3_3[11] M7
VCCSUS3_3[12] M8
VCCSUS3_3[13] N7
VCCSUS3_3[14] N8
VCCSUS3_3[15] P7
VCCSUS3_3[16] P8
VCCSUS1_05[1] T7
VCCSUS1_05[2] H15
VCC1_5_A[12]
H9
VCC1_5_A[13]
V11
VCC1_5_A[14]
U11
VCCSUS3_3[04] W8
VCC3_3[06] G8
VCCGLAN1_5[2]
J18 VCCGLAN1_5[1]
H19
VCCGLAN3_3
K16
VCCGLANPLL
J17
VCC3_3[03] AA9
VCCSUS1_5[1] H16
VCCSUS1_5[2] V7
VCC_DMI[2] U17
VCC_DMI[1] T17
VCCCL1_05 G18
VCCCL3_3[2] K14
VCCCL3_3[1] J14
VCCCL1_5 H17
VCC1_5_A[06]
W12
VCC3_3[04] V14
VCC3_3[05] W14
VCC1_5_A[10]
W18
VCC1_5_A[11]
G9
VCC1_5_A[09]
V15 VCC1_5_A[08]
U15
VCC1_5_A[07]
W10
VCC1_5_A[15]
T9
VCC1_5_A[16]
U9
C280
10U_0603_6.3V6M
C280
10U_0603_6.3V6M
1
2
R323 0_0603_5%R323 0_0603_5%
1 2
C294
0.1U_0402_16V4Z
C294
0.1U_0402_16V4Z
1
2
D5
CH751H-40_SC76
D5
CH751H-40_SC76
21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGATE[24,31]
EC_RSMRST#[24]
SLP_S4#[24]
PLT_RST#[8,17,22]
LPC_FRAME#[23]
LPC_AD0[23]
SLP_S5#[24]ON/OFFBTN#[24] USB_OC#0[24] USB_OC#1[24] USB_OC#2[24]
LPC_AD1[23] LPC_AD2[23]
EC_SWI#[24]
EC_SCI#[24]
MAINPWON[31]
PM_PWROK[8,24,31]
GATEA20[23]
SIRQ[24] KB_RST#[23]
LID_SW#[24]
LPC_AD3[23]
SYSON[27,28]
ICH_SMBCLK[14,15,16,24] ICH_SMBDATA[14,15,16,24]
PCI_PME#[22]
CLK_PCIE_LAN[16] CLK_PCIE_LAN#[16]
CLKREQG_WWAN#[16]
PCIE_TXP4[24] PCIE_TXN4[24]
PCIE_RXN4[24] PCIE_RXP4[24]
TXCD+[18] TXCD-[18]
TX0D+[18] TX0D-[18]
TX1D+[18] TX1D-[18]
TX2D+[18] TX2D-[18]
VGA_HDMI_SDA[18] VGA_HDMI_SCL[18]
HDMI_HPD#[18]
EC_SMB_DA2[4,17]
EC_SMB_CK2[4,17]
PCIE_TXP2[24] PCIE_TXN2[24]
PCIE_RXN2[24] PCIE_RXP2[24]
GLAN_RXN[24] GLAN_RXP[24]
GLAN_TXN[24] GLAN_TXP[24]
CLK_PCIE_WAN[16] CLK_PCIE_WAN#[16]
CLK_PCIE_MCARD[16] CLK_PCIE_MCARD#[16]
THERM_SCI# [24]
PCIE_WAKE#[24]
CLKREQ_WLAN#[16]
CLKREQA#[16]
CLK_PCI_EC[16]
CLK_48M_CR[16]
GPIO24[24]
GPIO48[24] GPIO6[24]
GPIO1[24]
SUSP#[20] AC_IN[24]
HDA_RST# [23]
ENABLT [18]
ENAVDD [18]
HDA_SDOUT [23]
HDA_SYNC [23]
HDA_BITCLK [23]
HDA_SDIN0 [23]
HDA_SDIN1 [23]
IDE_LED# [23]
SATA_TXP1_CR [23]
SATA_TXN1_CR [23]
SATA_TXP0_CR [23]
SATA_TXN0_CR [23]
SATA_RXP2_C [23]
SATA_RXN2_C [23]
DDC2_CLK [18]
DDC2_DATA [18]
VR_ON [31]
SB_SPKR [24]
USB20_N3 [24]
USB20_P3 [24]
USB20_P4 [24]
USB20_N4 [24]
USB20_N5 [24]
USB20_P5 [24]
USB20_N7 [24]
USB20_P7 [24]
USB20_P2 [24]
USB20_N2 [24]
D_BLUE [18]
D_GREEN [18]
D_RED [18]
CRT_DDC_CLK [18]
CRT_DDC_DATA [18]
CRT_VSYNC [17,18]
CRT_HSYNC [17,18]
TXCLK_L+ [18]
TXCLK_L- [18]
USB20_N0 [24]
USB20_P0 [24]
USB20_N1 [24]
USB20_P1 [24]
SATA_RXP0_C [23]
SATA_RXN0_C [23]
TXOUT_L2+ [18]
TXOUT_L2- [18]
SATA_TXP2_CR [23]
SATA_TXN2_CR [23]
SATA_RXP1_C [23]
SATA_RXN1_C [23]
USB20_N6 [24]
USB20_P6 [24]
USB20_N8 [24]
USB20_P8 [24]
GPIO42 [24]
GPIO44 [24]
TXOUT_L1+ [18]
TXOUT_L1- [18]
TXOUT_L0+ [18]
TXOUT_L0- [18]
EC_SMI#[24]
SLP_S3#[24]
ICH_RTCRST#[23]
B+
+RTCVCC
+5VS
+3VS
+3VALW
+5VALW
+1.5VS
VS
VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Golden finger
26 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Golden finger
26 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
Golden finger
26 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
LAN_CLK
WLAN_CLK
WWAN_CLK
WLAN
WWAN
LAN
GPIO
HDMI
HDI_B_DET
HDI_B_DET
GPIO
LVDS
USB
SATA
HDA
C1033
0.1U_0603_50V4Z
C1033
0.1U_0603_50V4Z
1
2
JP6
FPC_O0P45X2P35
JP6
FPC_O0P45X2P35
B+
1
B+
3
B+
5
B+
7
B+
9
B+
11
B+
13
RESERVED
15
GND
17
GND
19
GND
21
B+_BIAS
23
+RTCVCC
25
ICH_RTCRST#
27
GPIO1
29
EC_SMB_DA2
31
EC_SMB_CK2
33
GPIO6
35
GPIO48
37
EC_SMI#
39
+5VS 2
+5VALW 4
+VL 6
+3VALW 8
+3VS 10
+3VS 12
+3VS 14
VR_ON 16
HDI_B_DET/GND 18
GND 20
GND 22
GND 24
PC Beep 26
HDA_RST 28
HDA_SDOUT 30
HDA_SYNC 32
HDA_BIT_CLK 34
HDA_SDIN0 36
HDA_SDIN1 38
SATA_ACT# 40
NC
41
PCIE_ITX_EXPRX_P2
43
PCIE_ITX_EXPRX_N2
45
GND
47
PCIE_IRX_EXPTX_P2
49
PCIE_IRX_EXPTX_N2
51
GND
53
PCIE_ITX_WLANRX_P1
55
PCIE_ITX_WLANRX_N1
57
GND
59
PCIE_IRX_WLANTX_P1
61
PCIE_IRX_WLANTX_N1
63
GND
65
PCIE_ITX_LANRX_N0
67
PCIE_ITX_LANRX_P0
69
GND
71
PCIE_IRX_LANTX_N0
73
PCIE_IRX_LANTX_P0
75
GND
77
PM_SLP_S4#
79
VGATE
81
EC_RSMRST#
83
EC_LID_OUT#
85
GPIO24
87
PWRGD
89
PWRBTN#
103
EC_SWI#
91
AC_IN
95
EC_USB_OC3#
97
EC_USB_OC2#
99
EC_USB_OC1#
101
SUSP#
93
PM_SLP_S5#
105
PM_SLP_S3#
107
EC_SCI#
109
PLT_RST#
111
SYSON
113
LPC_AD0
115
LPC_AD1
117
LPC_AD2
119
LPC_AD3
121
LPC_FRAME#
123
SIRQ
125
EC_KBRST#
127
EC_GA20
129
EXP_REQ#
131
RESERVED
133
HDMI_HP
135
LPC_CLK0
137
GND
139
HDMI_SDA
141
HDMI_SCL
143
GND
145
TX2D+
147
TX2D-
149
GND
151
TX1D+
153
TX1D-
155
GND
157
TX0D+
159
TX0D-
161
GND
163
TXCD+
165
TXCD-
167
GND
169
WLAN_REQ#
171
WLAN_SMDATA
173
WLAN_SMCLK
175
PCIE_WAKE#
177
PCIE_PME
179
CLK_48M_CR
181
LAN_REQ#
183
CLK_PCIE_EXP
185
CLK_PCIE_EXP#
187
GND
189
CLK_PCIE_MINI
191
CLK_PCIE_MINI#
193
HDI_B_DET/GND
195
CLK_PCIE_LAN#
197
CLK_PCIE_LAN
199
PSATA_ITX_DRX_P0 42
PSATA_ITX_DRX_N0 44
GND 46
EC_THERM# 48
GPIO42 50
GND 52
PSATA_ITX_DRX_P1 54
PSATA_ITX_DRX_N1 56
GND 58
1.5VS 60
1.5VS 62
GND 64
PSATA_ITX_DRX_P2 66
PSATA_ITX_DRX_N2 68
GND 70
PSATA_IRX_DTX_P2_C 72
PSATA_IRX_DTX_N2_C 74
GND 76
PSATA_IRX_DTX_P0_C 78
PSATA_IRX_DTX_N0_C 80
GND 82
USB20_P7 84
USB20_N7 86
GND 88
PSATA_IRX_DTX_P1_C 90
PSATA_IRX_DTX_N1_C 92
GND 94
USB20_P5 96
USB20_N5 98
GND 100
USB20_P4 102
USB20_N4 104
GND 106
USB20_P3 108
USB20_N3 110
GND 112
GPIO44 114
GND 116
USB20_P8 118
USB20_N8 120
GND 122
USB20_P6 124
USB20_N6 126
GND 128
USB20_P1 130
USB20_N1 132
GND 134
USB20_P2 136
USB20_N2 138
GND 140
USB20_P0 142
USB20_N0 144
GND 146
PANEL_BKEN_MCH 148
ENVDD 150
LDDC_DATA_MCH 152
LDDC_CLK_MCH 154
CRT_VSYNC 156
CRT_HSYNC 158
GND 160
G_DAT_DDC2 162
G_CLK_DDC2 164
GND 166
CRT_RED 168
GND 170
CRT_GRN 172
GND 174
CRT_BLU 176
GND 178
LCD_A1+_MCH 180
LCD_A1-_MCH 182
GND 184
LCD_A0+_MCH 186
LCD_A0-_MCH 188
GND 190
LCD_A2+_MCH 192
LCD_A2-_MCH 194
GND 196
LCD_ACLK+_MCH 198
LCD_ACLK-_MCH 200
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SUSP#
SUSP SUSPSYSON#SUSP SYSON
SYSON# SUSP
SUSP
+1.5VS_GATE
SUSPSUSP SUSP
SUSP#
SYSON[26,28] SUSP# [20]
+1.8VSPEN [32]
+5VALW+5VALW
+1.5V
+1.8VS +0.75VS+VCCP
+1.5V
B+
+1.5VS
+1.5VS +1.1VS +3.3V_DELAY
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
DC/DC Interface
Custom
27 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
DC/DC Interface
Custom
27 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
DC/DC Interface
Custom
27 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
+1.5V to +1.5VS
H_1P8N
H_3P2
H_4P2
R03
R396
100K_0402_5%
R396
100K_0402_5%
FM3FM3
1
Q17A
2N7002DW-7-F_SOT363-6
Q17A
2N7002DW-7-F_SOT363-6
61
2
R443
0_0402_5%
@
R443
0_0402_5%
@
1 2
G
D
S
Q77
2N7002_SOT23
G
D
S
Q77
2N7002_SOT23
2
13
FM2FM2
1
H1
HOLEA
H1
HOLEA
1
C1182
0.1U_0603_25V7K
C1182
0.1U_0603_25V7K
1
2
H6
HOLEA
H6
HOLEA
1
R313
470_0402_5%
R313
470_0402_5%
12
Q19A
2N7002DW-7-F_SOT363-6
Q19A
2N7002DW-7-F_SOT363-6
61
2
Q20B
2N7002DW-7-F_SOT363-6
Q20B
2N7002DW-7-F_SOT363-6
3
5
4
U13
SI4800BDY-T1-E3_SO8
U13
SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
R312
470_0402_5%
R312
470_0402_5%
12
H5
HOLEA
H5
HOLEA
1
H10
HOLEA
H10
HOLEA
1
H3
HOLEA
H3
HOLEA
1
H7
HOLEA
H7
HOLEA
1
H8
HOLEA
H8
HOLEA
1
H2
HOLEA
H2
HOLEA
1
R326
470_0402_5%
R326
470_0402_5%
1 2
H9
HOLEA
H9
HOLEA
1
Q17B
2N7002DW-7-F_SOT363-6
Q17B
2N7002DW-7-F_SOT363-6
3
5
4
R309
470_0402_5%
R309
470_0402_5%
12
Q18B
2N7002DW-7-F_SOT363-6
Q18B
2N7002DW-7-F_SOT363-6
3
5
4
FM4FM4
1
D8
CH751H-40_SC76
D8
CH751H-40_SC76
21
FM1FM1
1
C1181
1U_0603_10V4Z
C1181
1U_0603_10V4Z
1
2
Q20A
2N7002DW-7-F_SOT363-6
Q20A
2N7002DW-7-F_SOT363-6
61
2
R314
470_0402_5%
R314
470_0402_5%
12
C1184
0.1U_0603_25V7K
@
C1184
0.1U_0603_25V7K
@
1
2
H11
HOLEA
H11
HOLEA
1
Q19B
2N7002DW-7-F_SOT363-6
Q19B
2N7002DW-7-F_SOT363-6
3
5
4
C1183
10U_0805_10V4Z
C1183
10U_0805_10V4Z
1
2
R315
470_0402_5%
R315
470_0402_5%
12
R307
100K_0402_5%
R307
100K_0402_5%
12
R310
470_0402_5%
R310
470_0402_5%
12
C1193
10U_0805_10V4Z
C1193
10U_0805_10V4Z
1
2
R308
100K_0402_5%
R308
100K_0402_5%
12
G
D
S
Q25
2N7002_SOT23
G
D
S
Q25
2N7002_SOT23
2
13
R311
470_0402_5%
R311
470_0402_5%
12
H4
HOLEA
H4
HOLEA
1
Q18A
2N7002DW-7-F_SOT363-6
Q18A
2N7002DW-7-F_SOT363-6
61
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
1.5V_VOUT
1.5V_VFB
1.5V_VF5FILT+5VALW
BST_1.5V-1BST_1.5V
UG1_1.5V
LG_1.5V
1.5V_TRIP
+5VALW
LX_1.5V
UG_1.5V
1.5V_EN
SYSON[26,27]
1.5V_PGOOD[8]
+1.5VP
+1.5VP
B+
+5VALW
+1.5VP
+1.5V_B+
+1.5VP +1.5V
+1.5VP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS5588P
0.3
1.5VP
28 35Wednesday, July 01, 2009
2008/10/31 2009/10/31 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS5588P
0.3
1.5VP
28 35Wednesday, July 01, 2009
2008/10/31 2009/10/31 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS5588P
0.3
1.5VP
28 35Wednesday, July 01, 2009
2008/10/31 2009/10/31 Compal Electronics, Inc.
(8A,320mils ,Via NO.= 16)
PJP400
JUMP_43X118@
PJP400
JUMP_43X118@
11
2
2
PC400
@0.1U_0402_16V7K
PC400
@0.1U_0402_16V7K
12
PL400
HCB1608KF-121T30_0603
PL400
HCB1608KF-121T30_0603
1 2
PC409
4.7U_0805_6.3V6K
PC409
4.7U_0805_6.3V6K
12
PR407 10K_0402_1%
PR407 10K_0402_1%
1 2
+
PC410
220U_B2_2.5VM_R25M
+
PC410
220U_B2_2.5VM_R25M
1
2
PQ401
NTMFS4946NT1G_SO8FL-5
PQ401
NTMFS4946NT1G_SO8FL-5
3 5
2
4
1
PC411
680P_0603_50V8J
PC411
680P_0603_50V8J
12
PR404 0_0402_5%PR404 0_0402_5%
1 2
PC406
4.7U_0805_6.3V6K
PC406
4.7U_0805_6.3V6K
12
PR406 10.7K_0402_1%
PR406 10.7K_0402_1%
1 2
PR410
100K_0402_1%
PR410
100K_0402_1%
1 2
PR402
255K_0402_1%
PR402
255K_0402_1%
1 2
PC401
2200P_0402_50V7K
PC401
2200P_0402_50V7K
12
PR400
0_0402_5%
PR400
0_0402_5%
1 2
PL401
1UH_PCMB103E-1R0MS_20A_20%
PL401
1UH_PCMB103E-1R0MS_20A_20%
1 2
PC407
4.7U_0805_10V6K
PC407
4.7U_0805_10V6K
12
PC405
0.1U_0402_10V7K
PC405
0.1U_0402_10V7K
1 2
PR405
100_0402_1%
PR405
100_0402_1%
1 2
PC404
4.7U_0805_25V6M
PC404
4.7U_0805_25V6M
12
PR408
4.7_1206_5%
PR408
4.7_1206_5%
12
PU400
TPS51117RGYR_QFN14_3.5x3.5
PU400
TPS51117RGYR_QFN14_3.5x3.5
VOUT
3
V5FILT
4
EN_PSV 1
TON
2
VFB
5
PGOOD
6DRVL 9
DRVH 13
LL 12
GND
7
PGND
8
TRIP 11
V5DRV 10
VBST 14
TP 15
PR401
0_0402_5%
PR401
0_0402_5%
1 2
PC413
0.47U_0402_6.3V6K@PC413
0.47U_0402_6.3V6K@
12
PC402
0.1U_0402_25V6
PC402
0.1U_0402_25V6
12
PC408
@10P_0402_50V8J
PC408
@10P_0402_50V8J
1 2
PR409
10K_0402_1%
PR409
10K_0402_1%
12
PC403
4.7U_0805_25V6-K
PC403
4.7U_0805_25V6-K
12
PQ400
NTMS4816NR2G_SO8
PQ400
NTMS4816NR2G_SO8
4
1
2
3 6
7
5
8
PC412
@22P_0402_50V8J
PC412
@22P_0402_50V8J
1 2
PR403
0_0402_5%
PR403
0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+5VALW
LX_VCCP
LG_VCCP
UG_VCCP
+5VALW
UG1_VCCP
BST_VCCP
SUSP#[20]
+1.05VCCP +VCCP
+1.05VCCP
+1.05VCCP
B+
+5VALW
+1.05VCCP
VCCP_B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS5588P
0.3
1.05VCCP
29 35Wednesday, July 01, 2009
2006/11/23 2007/11/23 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS5588P
0.3
1.05VCCP
29 35Wednesday, July 01, 2009
2006/11/23 2007/11/23 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS5588P
0.3
1.05VCCP
29 35Wednesday, July 01, 2009
2006/11/23 2007/11/23 Compal Electronics, Inc.
(8A,120mils ,Via NO.= 6)
PC506
4.7U_0805_25V6-K
PC506
4.7U_0805_25V6-K
12
PQ504
AO4710_SO8
PQ504
AO4710_SO8
4
7
8
6
5
1
2
3
PC526
@10P_0402_50V8J
PC526
@10P_0402_50V8J
1 2
PL503
2.2UH_PCMC063T-2R2MN_8A_20%
PL503
2.2UH_PCMC063T-2R2MN_8A_20%
1 2
PR524
255K_0402_1%
PR524
255K_0402_1%
1 2
PR513
4.7_1206_5%
PR513
4.7_1206_5%
12
PR509
0_0402_5%
PR509
0_0402_5%
1 2
PR519 0_0402_5%PR519 0_0402_5%
1 2
PL501
HCB1608KF-121T30_0603
PL501
HCB1608KF-121T30_0603
1 2
PC521
4.7U_0805_10V6K
PC521
4.7U_0805_10V6K
12
PC511
0.1U_0402_10V7K
PC511
0.1U_0402_10V7K
1 2
PR504
10K_0402_1%
PR504
10K_0402_1%
12
PR518
100_0402_1%
PR518
100_0402_1%
1 2
PC514
4.7U_0805_6.3V6K
PC514
4.7U_0805_6.3V6K
12
PC517
680P_0603_50V8J
PC517
680P_0603_50V8J
12
PC507
4.7U_0805_25V6-K
PC507
4.7U_0805_25V6-K
12
PC504
2200P_0402_50V7K
PC504
2200P_0402_50V7K
12
+
PC515
220U_B2_2.5VM_R25M
+
PC515
220U_B2_2.5VM_R25M
1
2
PC505
0.1U_0402_25V6
PC505
0.1U_0402_25V6
12
PC520
4.7U_0805_6.3V6K
PC520
4.7U_0805_6.3V6K
12
PR516
0_0402_5%
PR516
0_0402_5%
12
PQ502
AO4466_SO8
PQ502
AO4466_SO8
3 6
5
7
8
2
4
1
PC519
@1000P_0402_50V7K
PC519
@1000P_0402_50V7K
12
PR517 13.7K_0402_1%
PR517 13.7K_0402_1%
1 2
PR503
4.12K_0402_1%
PR503
4.12K_0402_1%
1 2
PJP500
PAD-OPEN 4x4m
PJP500
PAD-OPEN 4x4m
1 2
PR511
0_0402_5%
PR511
0_0402_5%
1 2
PU501
TPS51117RGYR_QFN14_3.5x3.5
PU501
TPS51117RGYR_QFN14_3.5x3.5
VOUT
3
V5FILT
4
EN_PSV 1
TON
2
VFB
5
PGOOD
6DRVL 9
DRVH 13
LL 12
GND
7
PGND
8
TRIP 11
V5DRV 10
VBST 14
TP 15
PC527
@22P_0402_50V8J
PC527
@22P_0402_50V8J
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
SUSP#[20]
+0.75VSP
+5VALW
+5VALW
+1.5V
+0.75VS
+0.75VSP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS5588P
0.3
0.75VSP
30 35Wednesday, July 01, 2009
2008/09/15 2009/09/15 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS5588P
0.3
0.75VSP
30 35Wednesday, July 01, 2009
2008/09/15 2009/09/15 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS5588P
0.3
0.75VSP
30 35Wednesday, July 01, 2009
2008/09/15 2009/09/15 Compal Electronics, Inc.
(2A,80mils ,Via NO.= 4)
PR602
1K_0402_1%
PR602
1K_0402_1%
12
PC601
10U_0805_10V4Z
PC601
10U_0805_10V4Z
12
PC603
0.1U_0402_10V7K
PC603
0.1U_0402_10V7K
12
PR601
10K_0402_5%
PR601
10K_0402_5%
12
PC604
10U_0805_6.3V6M
PC604
10U_0805_6.3V6M
12
G
D
S
PQ601
RHU002N06_SOT323-3
G
D
S
PQ601
RHU002N06_SOT323-3
2
13
PC600
10U_0805_6.3V6M
PC600
10U_0805_6.3V6M
12
PJP600
PAD-OPEN 3x3m
PJP600
PAD-OPEN 3x3m
1 2
PR600
1K_0402_1%
PR600
1K_0402_1%
12
G
D
S
PQ600
RHU002N06_SOT323-3
G
D
S
PQ600
RHU002N06_SOT323-3
2
13
PR603
0_0402_5%
PR603
0_0402_5%
1 2
PC602
1U_0603_10V6K
PC602
1U_0603_10V6K
12
PU600
G2992F1U_SO8
PU600
G2992F1U_SO8
VOUT
4
NC 5
GND
2
VREF
3
VIN
1VCNTL 6
NC 7
NC 8
TP 9
PC605
@0.1U_0402_16V7K
PC605
@0.1U_0402_16V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSUM
BOOT_CPU1
H_PROCHOT#
PHASE_CPU1
VSUM
+VCC_CORE
UGATE_CPU1
H_PROCHOT#
LGATE_CPU1
PH
TM_REF1
TM-2
TM-3
CPU_VID2
[5]
VGATE[24,26]
PM_PWROK[8,24,26]
CPU_VID5
[5]
H_DPRSTP#[5,8,23]
CPU_VID6
[5]
VSSSENSE[5]
CPU_VID3
[5]
PM_DPRSLPVR[8,24]
CPU_VID0
[5]
VCCSENSE[5]
CPU_VID4
[5]
CPU_VID1
[5]
VR_ON
[26]
H_PROCHOT#[4]
MAINPWON [26]
VR_ON[26]
+VCC_CORE
+5VALW
+5VALW
+CPU_B+
B+
+3VALW
+CPU_B+
+VCCP
VL
VL
VL
VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
IAX00 0.3
CPU_CORE
Custom
31 35
Wednesday, July 01, 2009
2005/06/23 2006/10/22 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
IAX00 0.3
CPU_CORE
Custom
31 35
Wednesday, July 01, 2009
2005/06/23 2006/10/22 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
IAX00 0.3
CPU_CORE
Custom
31 35
Wednesday, July 01, 2009
2005/06/23 2006/10/22 Compal Electronics, Inc.
2008-07-17
Recovery at 45 degree C
CPU thermal protection at 85 degree C
PH3 under CPU botten side :
PR226 4.53K_0402_1%
PR226 4.53K_0402_1%
12
PC224 0.1U_0402_10V7KPC224 0.1U_0402_10V7K
1 2
PC222
330P_0402_50V7K
PC222
330P_0402_50V7K
12
PR204
1_0603_5%
PR204
1_0603_5%
1 2
PR208 0_0402_5%
PR208 0_0402_5%
12
PC205
4.7U_0805_25V6-K
PC205
4.7U_0805_25V6-K
12
PC212 0.015U_0603_25V7K
PC212 0.015U_0603_25V7K
1 2
PC208
1U_0603_6.3V6M
PC208
1U_0603_6.3V6M
12
PR227
1K_0402_1%
PR227
1K_0402_1%
1 2
PC217
1U_0603_10V6K
PC217
1U_0603_10V6K
12
PR30
13.7K_0402_1%
PR30
13.7K_0402_1%
1 2
PR213
4.7_1206_5%
PR213
4.7_1206_5%
12
PR225
0_0402_5%
PR225
0_0402_5%
1 2
PR210 @40.2K_0402_1%
PR210 @40.2K_0402_1%
1 2
PR211147K_0402_1%PR211147K_0402_1%
1 2
PC213
680P_0603_50V8J
PC213
680P_0603_50V8J
12
PC218
390P_0402_50V7K
PC218
390P_0402_50V7K
1 2
PR216
14.7K_0402_1%
PR216
14.7K_0402_1%
1 2
PR205
0_0402_5%
PR205
0_0402_5%
1 2
PQ201
NTMFS4946NT1G_SO8FL-5
PQ201
NTMFS4946NT1G_SO8FL-5
3 5
2
4
1
PR28
47K_0402_1%
PR28
47K_0402_1%
1 2
PH200
10KB_0603_5%_ERTJ1VR103J
PH200
10KB_0603_5%_ERTJ1VR103J
1 2
PC220 1000P_0603_50V7KPC220 1000P_0603_50V7K
1 2
PR222
2.21K_0402_1%
PR222
2.21K_0402_1%
1 2
PC210
1U_0603_10V6K
PC210
1U_0603_10V6K
12
PC221
1000P_0402_50V7K
PC221
1000P_0402_50V7K
12
PR29
47K_0402_1%
PR29
47K_0402_1%
1 2
PC214
1000P_0402_50V7K
PC214
1000P_0402_50V7K
1 2
PR228
11K_0402_1%
PR228
11K_0402_1%
1 2
PC19
1000P_0402_50V7K
PC19
1000P_0402_50V7K
12
PU200
ISL6261ACRZ-T_QFN40_6X6
PU200
ISL6261ACRZ-T_QFN40_6X6
RBIAS
3
VR_TT#
4
FDE
1
PMON
2
NTC
5
SOFT
6
VW
8
VSS
19
VSUM
17
DFB
15
BOOT 22
VO
16
DROOP
14
VSEN
12
VDIFF
11
OCSET
7
FB
10 NC 21
UGATE 23
VDD
20
VIN
18
COMP
9
PHASE 24
RTN
13
VSSP 25
LGATE 26
VCCP 27
VID0 28
VID1 29
VID2 30
VID3 31
VID4 32
VID5 33
VID6 34
VR_ON 35
DPRSLPVR 36
DPRSTP# 37
CLK_EN 38
3V3 39
PGOOD 40
GND PAD 41
PC211
0.22U_0603_10V7K
PC211
0.22U_0603_10V7K
1 2
PR212
0_0603_5%
PR212
0_0603_5%
1 2
PR224
3.57K_0402_1%
PR224
3.57K_0402_1%
12
PC201
0.1U_0603_50V7K
PC201
0.1U_0603_50V7K
12
PR219
10_0603_5%
PR219
10_0603_5%
1 2
PR200
68_0402_5%
@PR200
68_0402_5%
@
1 2
G
D
S
PQ4
2N7002KW_SOT323-3
G
D
S
PQ4
2N7002KW_SOT323-3
2
13
PR209
0_0402_5%
@PR209
0_0402_5%
@
12
PR223
0_0402_5%
PR223
0_0402_5%
1 2
PC226
0.22U_0603_10V7K
PC226
0.22U_0603_10V7K
1 2
PR203
0_0402_5%
PR203
0_0402_5%
1 2
PC202
2200P_0402_50V7K
PC202
2200P_0402_50V7K
12
PL200
HCB2012KF-121T50_0805
PL200
HCB2012KF-121T50_0805
1 2
PR220
10_0603_5%
PR220
10_0603_5%
1 2
PC223330P_0402_50V7KPC223330P_0402_50V7K
1 2
PR207
1.91K_0402_1%
PR207
1.91K_0402_1%
12
PR218464K_0402_1%PR218464K_0402_1%
1 2
PC215 150P_0402_50V8J
PC215 150P_0402_50V8J
12
PR35
100K_0402_1%
PR35
100K_0402_1%
12
PR217
6.81K_0402_1%
PR217
6.81K_0402_1%
1 2
PC18
0.22U_0402_6.3V6K
PC18
0.22U_0402_6.3V6K
12
PH201 @100K_0603_1%_TH11-4H104FT
PH201 @100K_0603_1%_TH11-4H104FT
1 2
PC200
@0.1U_0402_16V7K
PC200
@0.1U_0402_16V7K
12
PU7A
LM393DG_SO8
PU7A
LM393DG_SO8
+
3
-
2O1
P8
G
4
PC206
4.7U_0805_25V6-K
PC206
4.7U_0805_25V6-K
12
PQ200
NTMS4816NR2G_SO8
PQ200
NTMS4816NR2G_SO8
4
1
2
3 6
7
5
8
PC209
0.01U_0402_16V7K
PC209
0.01U_0402_16V7K
12
PC216 47P_0402_50V8JPC216 47P_0402_50V8J
1 2
PC64
0.01U_0402_25V7K
PC64
0.01U_0402_25V7K
12
PU7B
LM393DG_SO8
PU7B
LM393DG_SO8
+
5
-
6O7
P8
G
4
PC204
4.7U_0805_25V6-K
PC204
4.7U_0805_25V6-K
12
PR215
@4.22K_0402_1%
PR215
@4.22K_0402_1%
1 2
PC219
0.22U_0603_25V7K
PC219
0.22U_0603_25V7K
12
PR221
330_0402_1%
PR221
330_0402_1%
1 2
PR214
7.68K_0805_1%
PR214
7.68K_0805_1%
12
PR229
0_0402_5%
@PR229
0_0402_5%
@
12
PR202
0_0402_5%
PR202
0_0402_5%
1 2
PR33
21.5K_0402_1%
PR33
21.5K_0402_1%
12
PH1
100K_0603_1%_TH11-4H104FT
PH1
100K_0603_1%_TH11-4H104FT
12
PC225 0.1U_0402_10V7K
PC225 0.1U_0402_10V7K
12
PR34
100K_0402_1%
PR34
100K_0402_1%
12
PL201
0.45UH_ETQP4LR45XFC_25A_-25+20%
PL201
0.45UH_ETQP4LR45XFC_25A_-25+20%
1 2
ABC
C
D
D
1 1
2 2
3 3
4 4
+1.8VSPEN
SUSP#[20]
+1.8VSPEN[27]
+1.8VSP +1.8VS
+3VS
+1.8VSP
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS5588P
0.3
1.8VSP
32 35Wednesday, July 01, 2009
2008/10/31 2009/10/31 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS5588P
0.3
1.8VSP
32 35Wednesday, July 01, 2009
2008/10/31 2009/10/31 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LS5588P
0.3
1.8VSP
32 35Wednesday, July 01, 2009
2008/10/31 2009/10/31 Compal Electronics, Inc.
R03
PR702
4.64K_0402_1%
PR702
4.64K_0402_1%
12
PC701
10U_0805_6.3V6M
PC701
10U_0805_6.3V6M
12
PC703
0.47U_0402_6.3V6K
PC703
0.47U_0402_6.3V6K
12
PU701
APL5913-KAC-TRL_SO8
PU701
APL5913-KAC-TRL_SO8
VIN
9
EN
8
VCNTL
6
VIN
5
POK
7
GND
1
FB 2
VOUT 4
VOUT 3
PC704
0.01U_0402_25V7K
PC704
0.01U_0402_25V7K
12
PJP701
PAD-OPEN 4x4m
PJP701
PAD-OPEN 4x4m
1 2
PR701
100K_0402_5%
PR701
100K_0402_5%
1 2
PR703
3.65K_0402_1%
PR703
3.65K_0402_1%
12
PC705
10U_0805_6.3V6M
PC705
10U_0805_6.3V6M
12
PC702
1U_0402_6.3V6K
PC702
1U_0402_6.3V6K
12
543
3
2
2
1
1
D D
C C
B B
A A
VGA_FB
VGA_TON
SW_VGA
VGA_V5FILT
UG_VGA
VGA_EN BST_VGA
VGA_TRIP
VGA_SNB
VGA_IN
VGA_FB1
LG_VGA
BST_VGA-1
VGA_VOUT+VGA_COREP
GVID1-1
GVID1-2
SUSP#[20]
+VGASENSE [20]
SUSP#[20]
DGPU_PWR_EN
DGPU_PWR_EN
DGPU_RUN_PWROK
VGA_PWRSEL0[18]
+5VALW
+VGA_COREP
+5VALW
B+
+VGA_COREP +VGA_CORE
+5VS
+1.1VSP +1.1VS
+1.5VS
+1.1VSP
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
VGA_CORE/1.1V
33 35Wednesday, July 01, 2009
Compal Electronics, Inc.
2008/11/122007/11/12 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
VGA_CORE/1.1V
33 35Wednesday, July 01, 2009
Compal Electronics, Inc.
2008/11/122007/11/12 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
VGA_CORE/1.1V
33 35Wednesday, July 01, 2009
Compal Electronics, Inc.
2008/11/122007/11/12
VGA_PWRSEL0 VGA_CORE
1
01V
0.95V
PC812
47P_0402_50V8J@PC812
47P_0402_50V8J@
1 2
PU801
TPS51117RGYR_QFN14_3.5x3.5
PU801
TPS51117RGYR_QFN14_3.5x3.5
VOUT
3
V5FILT
4
EN_PSV 1
TON
2
VFB
5
PGOOD
6DRVL 9
DRVH 13
LL 12
GND
7
PGND
8
TRIP 11
V5DRV 10
VBST 14
TP 15
PJP803
JUMP_43X118@
PJP803
JUMP_43X118@
11
2
2
PR816
10K_0402_1%
PR816
10K_0402_1%
12
PQ802
SI4634DY-T1-E3_SO8
PQ802
SI4634DY-T1-E3_SO8
4
7
8
6
5
1
2
3
PJP702
PAD-OPEN 4x4m
PJP702
PAD-OPEN 4x4m
1 2
PC801
10U_1206_25V6M
PC801
10U_1206_25V6M
12
PR802
0_0402_5%
PR802
0_0402_5%
1 2
PC807
10U_0805_6.3V6M
PC807
10U_0805_6.3V6M
12
PR808
10_0402_5%
PR808
10_0402_5%
12
PR801
205K_0402_1%
PR801
205K_0402_1%
1 2
PR815
0_0402_5% @
PR815
0_0402_5% @
1 2
PR805
4.7_1206_5%
PR805
4.7_1206_5%
12
PC804
0.1U_0402_16V7K
@PC804
0.1U_0402_16V7K
@
12
PR705
0_0402_5%
PR705
0_0402_5%
1 2
G
D
S
PQ804
SSM3K7002FU_SC70-3
G
D
S
PQ804
SSM3K7002FU_SC70-3
2
13
PL801
HCB1608KF-121T30_0603
PL801
HCB1608KF-121T30_0603
1 2
PR813
36.5K_0402_1%
PR813
36.5K_0402_1%
1 2
PC802
10U_1206_25V6M
PC802
10U_1206_25V6M
12
PR807
9.1K_0402_1%
PR807
9.1K_0402_1%
1 2
PR803
0_0402_5%
PR803
0_0402_5%
1 2
PR812
115K_0402_1%
PR812
115K_0402_1%
1 2
PR806
100_0402_1%
PR806
100_0402_1%
1 2
PQ801
SI4686DY-T1-E3_SO8
PQ801
SI4686DY-T1-E3_SO8
3 6
5
7
8
2
4
1
PC813
0.022U_0402_16V7K
PC813
0.022U_0402_16V7K
12
PC803
0.1U_0603_25V7K
PC803
0.1U_0603_25V7K
1 2
PL802
1UH_PCMB103E-1R0MS_20A_20%
PL802
1UH_PCMB103E-1R0MS_20A_20%
1 2
PQ803
SI4634DY-T1-E3_SO8
PQ803
SI4634DY-T1-E3_SO8
4
7
8
6
5
1
2
3
PJP802
JUMP_43X118@
PJP802
JUMP_43X118@
11
2
2
PC706
0.47U_0402_6.3V6K PC706
0.47U_0402_6.3V6K
12
PR804
0_0402_5%
PR804
0_0402_5%
12
PC710
1U_0402_6.3V6K
PC710
1U_0402_6.3V6K
12
PU702
APL5913-KAC-TRL_SO8
PU702
APL5913-KAC-TRL_SO8
VIN
9
EN
8
VCNTL
6
VIN
5
POK
7
GND
1
FB 2
VOUT 4
VOUT 3
PR707
0_0402_5%@PR707
0_0402_5%@
1 2
PR704
3.65K_0402_1%
PR704
3.65K_0402_1%
12
PR809
0_0402_5%
@PR809
0_0402_5%
@
12
PC811
680P_0603_50V7K
PC811
680P_0603_50V7K
12
PC707
10U_0805_6.3V6M
PC707
10U_0805_6.3V6M
12
PC810
4.7U_0805_6.3V6K
PC810
4.7U_0805_6.3V6K
12
PR811
0_0402_5%
PR811
0_0402_5%
12
PC709
10U_0805_6.3V6M
PC709
10U_0805_6.3V6M
12
PC806
10U_0805_6.3V6M
PC806
10U_0805_6.3V6M
12
+
PC805
330U_D2_2.5VY_R15M
+
PC805
330U_D2_2.5VY_R15M
1
2
PR706
1.43K_0402_1%
PR706
1.43K_0402_1%
12
PD801
1SS355_SOD323-2
PD801
1SS355_SOD323-2
1 2
PC809
4.7U_0805_6.3V6K
PC809
4.7U_0805_6.3V6K
12
PC808
10U_0805_6.3V6M
PC808
10U_0805_6.3V6M
12
PR814
10K_0402_1%
PR814
10K_0402_1%
12
PR810
10K_0402_1%
PR810
10K_0402_1%
1 2
PC708
0.01U_0402_25V7K
PC708
0.01U_0402_25V7K
12
G
D
S
PQ805
SSM3K7002FU_SC70-3
G
D
S
PQ805
SSM3K7002FU_SC70-3
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
<Doc>
0.3
PIR (PWR)
Custom
34 35Wednesday, July 01, 2009
2007/09/20 2008/09/20
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
<Doc>
0.3
PIR (PWR)
Custom
34 35Wednesday, July 01, 2009
2007/09/20 2008/09/20
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
<Doc>
0.3
PIR (PWR)
Custom
34 35Wednesday, July 01, 2009
2007/09/20 2008/09/20
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 1 for PWR
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
HW Changed-List History-1
35 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
HW Changed-List History-1
35 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LS-5588
0.3
HW Changed-List History-1
35 35Wednesday, July 01, 2009
2009/04/20 2010/04/30 Compal Electronics, Inc.
Rev.Fixed Issue
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Reason for change PG# Modify ListItem
1
2
3
4
5
6
Change OVT Circuit 1.0 add
PU7,PH1,PC18,PC19,PC64,PR33,PR30,PR34,PR35,PR29,PR28,PQ4
Date Phase

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