ENRICO14_AMD_A00_0421 DELL M4040 DV14 AMD Brazos 4IU01 10265 1

DELL M4040 DV14 AMD Brazos 4IU01 10265-1

User Manual:

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Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Cover Page
A3
1 109Friday, April 22, 2011
<Variant Name>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Cover Page
A3
1 109Friday, April 22, 2011
<Variant Name>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Cover Page
A3
1 109Friday, April 22, 2011
<Variant Name>
AMD GPU Seymour XT
FCH HUDSON M1
2010-04-21
REV : A00
Enrico 14
Muxless Discrete/UMA Schematics Document
AMD Ontario CPU FT1
PCB :10265
DY :None Installed
UMA:UMA and Muxless platform installed
DIS_PX:DIS and Muxless platform installed
PSL:10mW internal schematic
10mW: 10mW schematic installed
Surge: Surege schematic installed
GIGA: GIGA schematic installed
10/100: 10/100 schematic installed
ROB: ROBOSON GPU installed
www.bblianmeng.com
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2
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1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Block Diagram
2 109Friday, April 22, 2011
<Core Design>
A3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Block Diagram
2 109Friday, April 22, 2011
<Core Design>
A3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Block Diagram
2 109Friday, April 22, 2011
<Core Design>
A3
DCBATOUT
DCBATOUT
TPS51218
DCBATOUT
26
31
30
28,29
27
33
1D1V_S5
APU VDDR/VDDP
DCBATOUT
DCBATOUT
AMD APU/FCH CORE Power
OUTPUTSINPUTS
TPS51218
1V_S0
46
1D5V_S3
44
3D3V_AUX_S5
5V_AUX_S5
5V_S5
3D3V_S5
TPS51216RUKR
OUTPUTS
DCBATOUT
SYSTEM DC/DC
INPUTS
TPS51125A
APU Core/NB Power
OUTPUTS
APU_VDD
APU_VDDNB
INPUTS
42, 43
41
ISL6265CHRTZ-T
OUTPUTS
OUTPUTS
INPUTS
BQ24707
CHARGER
46
BT+
40
INPUTS
DCBATOUT
AD+
28
DDRIII SUS
INPUTS OUTPUTS
44
OUTPUTS
DDRIII VTT
INPUTS
0D75V_S0
INPUTS
RT8208BGQW
92
OUTPUTS
AMD GPU CORE
VGA_CORE
L2: VCC
L3: Signal
L4: Signal
L1: Top
L6: Bottom
PCB LAYER
L5: GND
TPS51216RGER
DCBATOUT
28
KBC
ThermalInt.
KB
LPC Bus
2MB
Flash ROM
AMD Brazos UMA/Discrete Block Diagram
x4 UMI(Gen 1)
DIMM1
DIMM2
DDR III 1333
ODD
SATA II
56 56
SATA II
Right Side:
USB x3
HDD
USB 2.0 x 3
Realtek
RTS5138
CardReader
32
CAMERA
(Option)
49
USB 2.0 x 1
SD/MMC/MS
USB 2.0
802.11a/b/g
74
Mini-Card/Bluetooth
PCIE x 1
USB 2.0 x 1
Realtek
RJ45
CONN
RTL8105
USB2.0
31
59
10/100
Azalia
CODEC
PCIE x 1
65
61
AMD dGPU
AZALIA
&
OP AMP
2CH SPEAKER
MIC IN
HP OUT
Internal Analog MIC
28
CRT
RGB CRT
AMD APU-Ontario
(FT1 BGA 413-Ball)
NPCE795P
NUVOTON
VRAM
gDDR3
64M*16b*4(512MB)/128M*16b*4(1024MB)
Hudson-M1
INT CLK GEN
USB 2.0 (14 parts)
USB 1.1 (2 parts)
SATA III(6 parts), 6Gb/s
HW MONITOR
ACPI 1.1
FCH
PCIe x 4 Gen 2(Muxless)
DDRIII
1066MHZ
DDRIII
1066MHZ
PCIe GPPs (4 parts)
DP0 (DP/HDMI/DVI/LVDS)
DP1 (DP/HDMI/DVI) DP0
LVDS
Fan
58
69
27
60 69 25
Touch
PAD
Project code : 91.4IU01.001
PCB P/N :
Revision : 10265-1
IDT 92HD87B1
P2800
Seymour-XT
49
14,15
14,15
4,5,6,7,8
17,18,19,20,21,22
83,84,85,86,87
29
50
51
DP1
HDMI
P2793
SPI
3D3V_S5
26
INPUTS
RT8015B
47
OUTPUTS
AMD GPU CORE
1D8V_S0
www.bblianmeng.com
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4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Table of Content
A3
3 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Table of Content
A3
3 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Table of Content
A3
3 109Friday, April 22, 2011
<Core Design>
LANE2
LANE1
WLAN
WWAN
LANE3 CardReader
USB Table PCIe Routing
LAN
LANE0
APU
USB 2.0 EXT.Port1
USB 2.0 EXT.Port1
NC
NC
NC
NC
13
USB 2.0 EXT.Port1
12
Mini Card1 (WLAN)
10
0
11
NC
Pair
4
USB
5
2
3
1
Device
6
7
8
9
CCD Camera
Card Reader
NEWCARD
NC
NC
TYPE
ENABLED
SPI ROM
Reserved
EC_PWM3EC_PWM2
2.2-kohm 5% pull-down
Not connected.
LPC ROM
Reserved
2.2-kohm 5% pull-down
2.2-kohm 5% pull-down
2.2-kohm 5% pull-down Not connected.
Not connected.Not connected.
Note: EC_PWM2, EC_PWM3 default have internal 10kohm PU.
LPC_CLK2
Enable
boot timer
function
Disable boot
fail timer
function
DEFAULT
AZ_SDOUT
LOW POWER
MODE
PERFORMANCE
MODE
DEFAULT
REQUIRED SYSTEM STRAPS
LPC_CLK0
DEFAULT
PULL
LOW
PULL
HIGH
LPC_CLK1
CLKGEN
ENABLED
CLKGEN
DISABLED
ENABLE EC
DISABLE EC
DEFAULT
IGNORE
DEBUG
STRAPS
USE
DEBUG
STRAPS
PCI_CLK4CLK_PCI_LPC
(Use External)
(Use Internal)
non_Fusion
CLOCK mode
DEFAULT
Fusion
CLOCK mode
PCI_CLK1
Allow
PCIE GEN2
DEFAULT
Force
PCIE GEN1
DEFAULT
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1
D D
C C
B B
A A
UMI_TX2N_C
UMI_TX2P_C
UMI_TX3N_C
UMI_TX3P_C
P_ZVSSP_ZVDDP
UMI_TX1P_C
UMI_TX1N_C
UMI_TX0N_C
UMI_TX0P_C
PEG_C_TXP1
PEG_C_TXN1
PEG_C_TXP3
PEG_C_TXN3
PEG_C_TXP0
PEG_C_TXN0
PEG_C_TXP2
PEG_C_TXN2
1V_S0
UMI_FCH_APU_RX0N17 UMI_FCH_APU_RX0P17
UMI_FCH_APU_RX1P17 UMI_FCH_APU_RX1N17
UMI_FCH_APU_RX2P17 UMI_FCH_APU_RX2N17
UMI_FCH_APU_RX3P17 UMI_FCH_APU_RX3N17
UMI_APU_FCH_TX0P 17
UMI_APU_FCH_TX0N 17
UMI_APU_FCH_TX1P 17
UMI_APU_FCH_TX1N 17
UMI_APU_FCH_TX2P 17
UMI_APU_FCH_TX2N 17
UMI_APU_FCH_TX3P 17
UMI_APU_FCH_TX3N 17
PEG_TXP1 83
PEG_TXN1 83
PEG_TXP3 83
PEG_TXN3 83
PEG_RXP183 PEG_RXN183
PEG_RXP383 PEG_RXN383
PEG_RXP083 PEG_RXN083
PEG_RXP283 PEG_RXN283
PEG_TXP0 83
PEG_TXN0 83
PEG_TXP2 83
PEG_TXN2 83
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_PCIE(1/5)
A3
4 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_PCIE(1/5)
A3
4 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_PCIE(1/5)
A3
4 109Friday, April 22, 2011
<Core Design>
SSID = CPU
1 2
C404 SCD1U10V2KX-5GP
DIS_PX
C404 SCD1U10V2KX-5GP
DIS_PX
1 2
R401
2KR2F-3-GP
R401
2KR2F-3-GP
1 2
C401 SCD1U10V2KX-5GP
DIS_PX
C401 SCD1U10V2KX-5GP
DIS_PX
1 2
C407 SCD1U10V2KX-5GP
DIS_PX
C407 SCD1U10V2KX-5GP
DIS_PX
1 2
C412 SCD1U10V2KX-5GPC412 SCD1U10V2KX-5GP
1 2
R402
1K27R2F-L-GP
R402
1K27R2F-L-GP
1 2
C408 SCD1U10V2KX-5GP
DIS_PX
C408 SCD1U10V2KX-5GP
DIS_PX
1 2
C416 SCD1U10V2KX-5GPC416 SCD1U10V2KX-5GP
1 2
C409 SCD1U10V2KX-5GPC409 SCD1U10V2KX-5GP
1 2
C413 SCD1U10V2KX-5GPC413 SCD1U10V2KX-5GP
1 2
C402 SCD1U10V2KX-5GP
DIS_PX
C402 SCD1U10V2KX-5GP
DIS_PX
1 2
C410 SCD1U10V2KX-5GPC410 SCD1U10V2KX-5GP
1 2
C405 SCD1U10V2KX-5GP
DIS_PX
C405 SCD1U10V2KX-5GP
DIS_PX
1 2
C414 SCD1U10V2KX-5GPC414 SCD1U10V2KX-5GP
1 2
C403 SCD1U10V2KX-5GP
DIS_PX
C403 SCD1U10V2KX-5GP
DIS_PX
1 2
C411 SCD1U10V2KX-5GPC411 SCD1U10V2KX-5GP
P_UMI_RXN3
AB7 P_UMI_RXP3
AC7
P_UMI_RXN2
AC10 P_UMI_RXP2
AB10
P_UMI_RXN1
Y10 P_UMI_RXP1
AA10
P_UMI_RXN0
Y12 P_UMI_RXP0
AA12
P_ZVDD_10
Y14
P_GPP_RXN3
Y3 P_GPP_RXP3
Y4
P_GPP_RXN2
AA2 P_GPP_RXP2
AA1
P_GPP_RXN1
AC4 P_GPP_RXP1
AB4
P_GPP_RXN0
Y6 P_GPP_RXP0
AA6
P_UMI_TXN3 AC8
P_UMI_TXP3 AB8
P_UMI_TXN2 Y8
P_UMI_TXP2 AA8
P_UMI_TXN1 AB11
P_UMI_TXP1 AC11
P_UMI_TXN0 AC12
P_UMI_TXP0 AB12
P_ZVSS AA14
P_GPP_TXN3 V4
P_GPP_TXP3 V3
P_GPP_TXN2 Y2
P_GPP_TXP2 Y1
P_GPP_TXN1 AC3
P_GPP_TXP1 AB3
P_GPP_TXN0 AC6
P_GPP_TXP0 AB6
1 OF 5
UMI I/F PCIE I/F
ONTARIO_FT1
APU1A
ONTARIO-FT1-GP
1 OF 5
UMI I/F PCIE I/F
ONTARIO_FT1
APU1A
ONTARIO-FT1-GP
1 2
C406 SCD1U10V2KX-5GP
DIS_PX
C406 SCD1U10V2KX-5GP
DIS_PX
1 2
C415 SCD1U10V2KX-5GPC415 SCD1U10V2KX-5GP
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5
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4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_VREF_APU
M_EVENT#
M_EVENT#
M_VREF_APU
M_ZVDDIO_MEM_S
DDR_VREF_S3 1D5V_S3
1D5V_S3
M_DQ0 14,15M_A014,15
M_BS214,15 M_BS114,15 M_BS014,15
M_DM014,15 M_DM114,15
M_DQS#014,15 M_DQS014,15
M_DIM0_CLK_DDR#014 M_DIM0_CLK_DDR014
M_RST#14,15
M_DIM0_CKE114,15 M_DIM0_CKE014,15
M_A_DIM0_ODT014 M_A_DIM0_ODT114 M_B_DIM0_ODT015 M_B_DIM0_ODT115
M_A_DIM0_CS#014 M_A_DIM0_CS#114 M_B_DIM0_CS#015 M_B_DIM0_CS#115
M_CAS#14,15 M_RAS#14,15
M_WE#14,15
M_A114,15 M_A214,15 M_A314,15 M_A414,15 M_A514,15 M_A614,15 M_A714,15 M_A814,15 M_A914,15 M_A1014,15 M_A1114,15 M_A1214,15 M_A1314,15 M_A1414,15 M_A1514,15
M_DM214,15 M_DM314,15 M_DM414,15 M_DM514,15 M_DM614,15 M_DM714,15
M_DQS114,15 M_DQS#114,15 M_DQS214,15 M_DQS#214,15 M_DQS314,15 M_DQS#314,15
M_DQS#414,15 M_DQS414,15
M_DQS514,15 M_DQS#514,15
M_DQS#614,15 M_DQS614,15
M_DQS714,15 M_DQS#714,15
M_DIM0_CLK_DDR114 M_DIM0_CLK_DDR#114
M_DIM0_CLK_DDR#215 M_DIM0_CLK_DDR215
M_DIM0_CLK_DDR315 M_DIM0_CLK_DDR#315
M_DQ1 14,15
M_DQ2 14,15
M_DQ3 14,15
M_DQ4 14,15
M_DQ5 14,15
M_DQ6 14,15
M_DQ7 14,15
M_DQ8 14,15
M_DQ9 14,15
M_DQ10 14,15
M_DQ11 14,15
M_DQ12 14,15
M_DQ13 14,15
M_DQ14 14,15
M_DQ15 14,15
M_DQ16 14,15
M_DQ17 14,15
M_DQ18 14,15
M_DQ19 14,15
M_DQ20 14,15
M_DQ21 14,15
M_DQ22 14,15
M_DQ23 14,15
M_DQ24 14,15
M_DQ25 14,15
M_DQ26 14,15
M_DQ27 14,15
M_DQ28 14,15
M_DQ29 14,15
M_DQ30 14,15
M_DQ31 14,15
M_DQ32 14,15
M_DQ33 14,15
M_DQ34 14,15
M_DQ35 14,15
M_DQ36 14,15
M_DQ37 14,15
M_DQ38 14,15
M_DQ39 14,15
M_DQ40 14,15
M_DQ41 14,15
M_DQ42 14,15
M_DQ43 14,15
M_DQ44 14,15
M_DQ45 14,15
M_DQ46 14,15
M_DQ47 14,15
M_DQ48 14,15
M_DQ49 14,15
M_DQ50 14,15
M_DQ51 14,15
M_DQ52 14,15
M_DQ53 14,15
M_DQ54 14,15
M_DQ55 14,15
M_DQ56 14,15
M_DQ57 14,15
M_DQ58 14,15
M_DQ59 14,15
M_DQ60 14,15
M_DQ61 14,15
M_DQ62 14,15
M_DQ63 14,15
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_DDR(2/5)
A3
5 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_DDR(2/5)
A3
5 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_DDR(2/5)
A3
5 109Friday, April 22, 2011
<Core Design>
LAYOUT: place them close to APU
APU_VREF
AMD Confirm: PU Needed even if not used
SSID = CPU
12
C502
SCD1U10V2KX-5GP
C502
SCD1U10V2KX-5GP
1 2
R501 0R0402-PADR501 0R0402-PAD
12
C501
SC1KP50V2KX-1GP
C501
SC1KP50V2KX-1GP
12
R502
39R2F-GP
R502
39R2F-GP
M_WE#
V17 M_CAS#
V19 M_RAS#
U18
M1_CS#1
V16 M1_CS#0
U17 M0_CS#1
W16 M0_CS#0
T17
M1_ODT1
W15 M1_ODT0
U19 M0_ODT1
V15 M0_ODT0
W19
M_CKE1
E15 M_CKE0
F15
M_EVENT#
N17
M_CLK_L3
L17 M_CLK_H3
L18 M_CLK_L2
N19 M_CLK_H2
N18 M_CLK_L1
M18 M_CLK_H1
M19 M_CLK_L0
M16 M_CLK_H0
M17
M_DQS_L7
AC16 M_DQS_H7
AB16 M_DQS_L6
AC21 M_DQS_H6
AC20 M_DQS_L5
V22 M_DQS_H5
W22 M_DQS_L4
P22 M_DQS_H4
R22 M_DQS_L3
J23 M_DQS_H3
J22 M_DQS_L2
E22 M_DQS_H2
E23 M_DQS_L1
A20 M_DQS_H1
B20 M_DQS_L0
B16 M_DQS_H0
A16
M_DM7
AA16 M_DM6
AB20 M_DM5
V23 M_DM4
P23 M_DM3
H22 M_DM2
D21 M_DM1
B19 M_DM0
D15
M_BANK2
F16 M_BANK1
T18 M_BANK0
R18
M_ADD15
G15 M_ADD14
E16 M_ADD13
W17 M_ADD12
E18 M_ADD11
F17 M_ADD10
T19 M_ADD9
E19 M_ADD8
F19 M_ADD7
G18 M_ADD6
H15 M_ADD5
G17 M_ADD4
H17 M_ADD3
H18 M_ADD2
J17 M_ADD1
H19 M_ADD0
R17
M_ZVDDIO_MEM_S M22
M_VREF M23
M_DATA63 AC15
M_DATA62 AB15
M_DATA61 AB18
M_DATA60 AC18
M_DATA59 AC14
M_DATA58 AB14
M_DATA57 Y16
M_DATA56 AC17
M_DATA55 Y18
M_DATA54 AB19
M_DATA53 AA20
M_DATA52 AA23
M_DATA51 AA18
M_DATA50 AC19
M_DATA49 AB22
M_DATA48 Y20
M_DATA47 Y21
M_DATA46 W23
M_DATA45 U23
M_DATA44 T21
M_DATA43 Y22
M_DATA42 Y23
M_DATA41 V21
M_DATA40 V20
M_DATA39 T22
M_DATA38 R23
M_DATA37 P20
M_DATA36 M20
M_DATA35 T23
M_DATA34 T20
M_DATA33 P21
M_DATA32 N23
M_DATA31 K23
M_DATA30 K20
M_DATA29 H20
M_DATA28 G23
M_DATA27 K21
M_DATA26 K22
M_DATA25 H23
M_DATA24 H21
M_DATA23 F21
M_DATA22 F20
M_DATA21 D22
M_DATA20 C22
M_DATA19 F22
M_DATA18 F23
M_DATA17 D23
M_DATA16 C23
M_DATA15 C20
M_DATA14 A21
M_DATA13 B18
M_DATA12 A18
M_DATA11 D20
M_DATA10 B21
M_DATA9 A19
M_DATA8 C18
M_DATA7 D16
M_DATA6 C16
M_DATA5 C14
M_DATA4 A14
M_DATA3 D18
M_DATA2 A17
M_DATA1 A15
M_DATA0 B14
M_RESET#
L23
5 OF 5
MEMORY
I/F
ONTARIO_FT1
APU1E
ONTARIO-FT1-GP
5 OF 5
MEMORY
I/F
ONTARIO_FT1
APU1E
ONTARIO-FT1-GP
12
R503
1KR2J-1-GP
R503
1KR2J-1-GP
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
APU_TEST18_PLLTEST1
APU_TEST19_PLLTEST0
APU_TEST25_H_BYPASSCLK_H
APU_TEST25_L_BYPASSCLK_L
APU_TEST35
ALLOW_STOP
APU_SIC
APU_SID
APU_ALERT#
APU_PWRGD_R
APU_THERMTRIP#_VDDIO
H_CPUPWRGD APU_RST#_R
APU_RUN_FB_L
APU_VDDIO_SUS_FB_H
DP_ZVSS
APU_TEST38
APU_SVD_R
APU_SVC_R
APU_DBREQ#
APU_TRST#
APU_THERMTRIP#_VDDIO
APU_TCK
H_PROCHOT#
APU_SID
APU_ALERT#
APU_TDI
APU_TMS
APU_SIC
L_BKLT_EN_R
LVDS_VDD_EN_R
L_BKLT_CTRL_R
APU_THERMDC
APU_TEST34_H_TSTCLKIN_H
APU_TEST34_L_TSTCLKIN_L
APU_TEST35
APU_THERMDA
APU_TEST6_DIRECRACKMON
APU_TEST25_H_BYPASSCLK_H
APU_TEST25_L_BYPASSCLK_L
APU_TEST16_BP2
APU_TEST17_BP3
APU_BP0_TSTCLK_USCLK0
APU_BP0_TSTCLK_USCLK1
APU_TEST18_PLLTEST1
APU_TEST19_PLLTEST0
APU_TEST28_L_PLLCHARZ
APU_TEST28_H_PLLCHARZ
APU_TEST31_MEM_TEST
APU_TEST33_H_M_CLKTST_H
APU_TEST33_L_M_CLKTST_L
APU_TEST33_H_M_CLKTST_H
APU_TEST33_L_M_CLKTST_L
APU_TEST36_GIO_TSTDTM0_SERIALCLK
APU_TEST37_GIO_TSTDTM0_CLKINIT
APU_TEST37_GIO_TSTDTM0_CLKINIT
APU_TEST36_GIO_TSTDTM0_SERIALCLK
APU_BP0_TSTCLK_USCLK1
DAC_ZVSS
GTXN3
GTXP3
GTXN1
GTXP1
DP1_HPD
DP2_HPD
APU_ALERT#
GTXN2
GTXP2
GTXN0
GTXP0
APU_RST#
H_CPUPWRGD
APU_THERMTRIP#_VDDIO_Q
APU_THERMTRIP#_VDDIO
DP2_HPD
APU_SID
APU_SIC
APU_RST#
H_CPUPWRGD
1D8V_S0
1D8V_S0
1D8V_S0
1D8V_S0
1D8V_S0
3D3V_S0
1D8V_S0
3D3V_S0
1D8V_S0
3D3V_S0
3D3V_S5
3D3V_S0
5V_S0
APU_CLKP17 APU_CLKN17
DISP_CLKP17 DISP_CLKN17
SCLK318 SDATA318
APU_SVD_R42 APU_SVC_R42
APU_RST#17,83 H_CPUPWRGD17,36,42,71
APU_RST_L_BUF71
APU_PROCHOT#_VDDIO17
H_PROCHOT#27,40
APU_TDI71 APU_TDO71 APU_TCK71 APU_TMS71
APU_TRST#71
APU_DBRDY71 APU_DBREQ#71
APU_VDD_RUN_FB_L42
APU_VDDNB_RUN_FB_L42
APU_VDDNB_RUN_FB_H42 APU_VDD_RUN_FB_H42
LVDSA_DATA149 LVDSA_DATA1#49
APU_ALERT#_FCH 19
LVDSA_CLK49 LVDSA_CLK#49
APU_TEST18_PLLTEST1 71
APU_TEST19_PLLTEST0 71
L_BKLT_EN 27
LVDS_VDD_EN 49
L_BKLT_CTRL 49
CRT_RED 50
CRT_GREEN 50
CRT_BLUE 50
CRT_HSYNC 50
CRT_VSYNC 50
DDCCLK 50
DDCDATA 50
ALLOW_STOP 17
APU_HDMI_DATA151 APU_HDMI_DATA1#51
APU_HDMI_CLK51 APU_HDMI_CLK#51
PCH_HDMI_DATA_R 51
PCH_HDMI_CLK_R 51
DP1_HPD 51
APU_HDMI_DATA2#51 APU_HDMI_DATA251
APU_HDMI_DATA051 APU_HDMI_DATA0#51
LVDSA_DATA249 LVDSA_DATA2#49
LVDSA_DATA049 LVDSA_DATA0#49
LVDS_DDC_CLK 49
LVDS_DDC_DATA 49
LVDS_DDC_DATA49
LVDS_DDC_CLK49
H_THERMTRIP# 18,36
SML1_DATA 27,85
SML1_CLK 27,85
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_COntrol&Debug(3/5)
Custom
6 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_COntrol&Debug(3/5)
Custom
6 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_COntrol&Debug(3/5)
Custom
6 109Friday, April 22, 2011
<Core Design>
1
SVC SVD Boot Voltage
(VCC/GND)
Boot Voltage
(open)
0
1
1.1
1.0
0.9
0.8
1.1
1.2
1.1
0.9
0
0
1 0
1
LVDS
Panel
LVDS
HDMI
HDMI
Brazos:
DP1 --> HDMI
Sabine:
DP0 --> LVDS
DP1 --> CRT
DP2 --> HDMI
100MHz
100MHz
0721
0802 Change to H_PROCHOT#
0809 Change to 1k
0811 Remove level shifter
0811 AMD Nick change
0819
CPU exceeds to 125℃
Thripthrip# add integrated PU 10K
X01
X01
X01
X01
X01
X02
SSID = CPU
1 2 C609 SCD1U16V2KX-3GPC609 SCD1U16V2KX-3GP
1 2
R619 1KR2J-1-GPR619 1KR2J-1-GP
1TP605 TPAD14TP605 TPAD14
1TP611 TPAD14TP611 TPAD14
1 2 R6310R0402-PAD R6310R0402-PAD
1 2 C601 SCD1U16V2KX-3GPC601 SCD1U16V2KX-3GP
12
R664
100KR2J-1-GP
R664
100KR2J-1-GP
1TP606 TPAD14TP606 TPAD14
1TP609 TPAD14TP609 TPAD14
1TP602 TPAD14TP602 TPAD14
1 2
R613 1KR2J-1-GPR613 1KR2J-1-GP
1TP607 TPAD14TP607 TPAD14
1 2 C610 SCD1U16V2KX-3GPC610 SCD1U16V2KX-3GP
1TP608 TPAD14TP608 TPAD14
1 2
R620 1KR2J-1-GP
DY
R620 1KR2J-1-GP
DY
1 2 C607 SCD1U16V2KX-3GPC607 SCD1U16V2KX-3GP
C
B
E
Q601
MMBT3904-4-GP
84.T3904.C11
2ND = 84.03904.P11
3rd = 84.03904.L06
Q601
MMBT3904-4-GP
84.T3904.C11
2ND = 84.03904.P11
3rd = 84.03904.L06
1 2 R6260R0402-PAD R6260R0402-PAD
1 2 R643
0R0402-PAD
R643
0R0402-PAD
12 R622 499R2F-2-GPR622 499R2F-2-GP
1 2
R623 1KR2J-1-GP
DY
R623 1KR2J-1-GP
DY
1TP613 TPAD14TP613 TPAD14
1TP604 TPAD14TP604 TPAD14
1
2 3
4
RN607
SRN1KJ-7-GP
RN607
SRN1KJ-7-GP
1 2
R603 51R2F-2-GPR603 51R2F-2-GP
1 2
R607 0R0402-PADR607 0R0402-PAD
1TP616 TPAD14TP616 TPAD14
RSVD#V5
V5 RSVD#W11
W11 RSVD#B4
B4
VSS_SENSE
F1
VDDIO_MEM_S_SENSE
F3 VDDCR_CPU_SENSE
G1 VDDCR_NB_SENSE
F4
DBREQ#
M1 DBRDY
M3 TRST#
M4 TMS
P2 TCK
P1 TDO
N1 TDI
N2
ALERT#
T2 THERMTRIP#
U2 PROCHOT#
U1
PWROK
T4 RESET#
T3
SID
P4 SIC
P3
SVD
J2 SVC
J1
DISP_CLKIN_L
D1 DISP_CLKIN_H
D2
CLKIN_L
V1 CLKIN_H
V2
LTDP0_TXN3
C8 LTDP0_TXP3
D8
LTDP0_TXN2
B6 LTDP0_TXP2
A6
LTDP0_TXN1
C6 LTDP0_TXP1
D6
LTDP0_TXN0
A5 LTDP0_TXP0
B5
TDP1_TXN3
B10 TDP1_TXP3
A10
TDP1_TXN2
C10 TDP1_TXP2
D10
TDP1_TXN1
A9 TDP1_TXP1
B9
TDP1_TXN0
B8 TDP1_TXP0
A8
DMAACTIVE# T1
TEST38 K3
TEST37 R5
TEST36 N5
TEST35 H4
TEST34_L T15
TEST34_H U15
TEST33_L J19
TEST33_H J18
TEST31 M21
TEST28_L M5
TEST28_H L5
TEST25_L K2
TEST25_H K1
TEST19 M2
TEST18 L2
TEST17 L1
TEST16 K4
TEST15 E4
TEST14 T5
TEST6 R6
TEST5 R2
TEST4 R1
DAC_ZVSS D12
DAC_SDA D4
DAC_SCL F2
DAC_VSYNC E2
DAC_HSYNC E1
DAC_BLUE# B13
DAC_BLUE A13
DAC_GREEN# B12
DAC_GREEN A12
DAC_RED# D13
DAC_RED C12
LTDP0_HPD D3
LTDP0_AUXN B3
LTDP0_AUXP A3
TDP1_HPD C1
TDP1_AUXN C2
TDP1_AUXP B2
DP_VARY_BL H1
DP_DIGON H2
DP_BLON G2
DP_ZVSS H3
2 OF 5
CLK
DP MISC
DISPLAYPORT
0
DISPLAYPORT
1
TEST VGA
DAC
JTAG CTRL SER
ANALOG/DISPLAY/MISC
ONTARIO_FT1
APU1B
ONTARIO-FT1-GP
2 OF 5
CLK
DP MISC
DISPLAYPORT
0
DISPLAYPORT
1
TEST VGA
DAC
JTAG CTRL SER
ANALOG/DISPLAY/MISC
ONTARIO_FT1
APU1B
ONTARIO-FT1-GP
1 2
R609 150R2F-1-GPR609 150R2F-1-GP
1
2 3
4
RN602 SRN0J-6-GP
DY
RN602 SRN0J-6-GP
DY
12
R646
10KR2J-3-GP
DY
R646
10KR2J-3-GP
DY
1 2
R617 150R2F-1-GPR617 150R2F-1-GP
1 2 R6250R0402-PAD R6250R0402-PAD
1 2
R604 510R2F-L-GPR604 510R2F-L-GP
1 2 C608 SCD1U16V2KX-3GPC608 SCD1U16V2KX-3GP
1 2
R632
1KR2J-1-GP
DY
R632
1KR2J-1-GP
DY
1 2
C631 SC10P50V2JN-4GP
DY
C631 SC10P50V2JN-4GP
DY
1 2
C632 SC10P50V2JN-4GP
DY
C632 SC10P50V2JN-4GP
DY
1TP615 TPAD14TP615 TPAD14
12
R647
100KR2J-1-GP
DY
R647
100KR2J-1-GP
DY
1 2
R601
0R2J-2-GP
DY
R601
0R2J-2-GP
DY
12
R635
10KR2J-3-GP
R635
10KR2J-3-GP
1 2 C605 SCD1U16V2KX-3GPC605 SCD1U16V2KX-3GP
1 2
R641
1KR2J-1-GP
R641
1KR2J-1-GP
1 2
R602 51R2F-2-GPR602 51R2F-2-GP
12 R606 1KR2J-1-GPR606 1KR2J-1-GP
1 2
R624 1KR2J-1-GP
DY
R624 1KR2J-1-GP
DY
1
2
3
45
6
7
8
RN608
SRN1KJ-4-GP
RN608
SRN1KJ-4-GP
1 2 R6300R0402-PAD R6300R0402-PAD
1 2
R621 1KR2J-1-GP
DY
R621 1KR2J-1-GP
DY
1 2 C606 SCD1U16V2KX-3GPC606 SCD1U16V2KX-3GP
12 R605 1KR2J-1-GPR605 1KR2J-1-GP
1 2
R640
300R2J-4-GP
R640
300R2J-4-GP
1 2 C604 SCD1U16V2KX-3GPC604 SCD1U16V2KX-3GP
1TP610 TPAD14TP610 TPAD14
1 2
R611 510R2F-L-GPR611 510R2F-L-GP
1 2
R610 0R0402-PADR610 0R0402-PAD
1 2
R608 0R0402-PADR608 0R0402-PAD
1
TP614TPAD14 TP614TPAD14
1 2
C603SCD1U10V2KX-5GP C603SCD1U10V2KX-5GP
1 2
R629
1KR2J-1-GP
R629
1KR2J-1-GP
1
23
4
RN605
SRN300J-3-GP
RN605
SRN300J-3-GP
1
23
4
RN634
SRN1KJ-7-GP
RN634
SRN1KJ-7-GP
1 2
R627
1KR2J-1-GP
R627
1KR2J-1-GP
1
2
3
45
6
7
8
RN601
SRN1KJ-4-GP
RN601
SRN1KJ-4-GP
1 2 R6280R0402-PAD R6280R0402-PAD
1 2
C602SCD1U10V2KX-5GP C602SCD1U10V2KX-5GP
1TP603 TPAD14TP603 TPAD14
1 2
R612 150R2F-1-GPR612 150R2F-1-GP
1
2 3
4
RN
0R4P2R-PADRN635
RN
0R4P2R-PADRN635
1TP612 TPAD14TP612 TPAD14
1 2
R615 150R2F-1-GPR615 150R2F-1-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1D8V_S0
1D8V_S0
1V_S0
3D3V_S0
1V_S0VDDPL_10
APU_VDD
APU_VDDNB
1D5V_S3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_Power(4/5)
A3
7 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_Power(4/5)
A3
7 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_Power(4/5)
A3
7 109Friday, April 22, 2011
<Core Design>
VDDCR_CPU:
10uF X 7 1uF X 4
0.1uF X 5 180pF X 2
VDDCR_NB:
10uF X 5 1uF X 5
0.1uF X 4 180pF X 2
VDDIO_MEN_S:
10uF X 2 1uF X 4
0.1uF X 3 180pF X 2
VDD_10:
10uF X 2 1uF X 2
0.1uF X 2 180pF X 1
VDD_18:
10uF X 1 1uF X 4
0.1uF X 1 180pF X 1
VDDPL_10:
10uF X 1 1uF X 1
0.1uF X 1 180pF X 1
VDD_18_DAC:
10uF X 1 1uF X 1
180pF X 1
VDD_33:
1uF X 1
0.1uF X 1
11A for 18W
4.5A for 9W
10A for 18W
8A for 9W
2A for 18W
2A for 9W
0.15A for 18W
0.15A for 9W
0.2A for 18W
0.2A for 9W
5.5A for 18W
5.5A for 9W
0.5A for 18W
0.5A for 9W
2A for 18W
2A for 9W
220 ohm 2A
SSID = CPU
12
C746
SCD1U10V2KX-5GP
DY
C746
SCD1U10V2KX-5GP
DY
12
C765
SC1U6D3V2KX-GP
DY
C765
SC1U6D3V2KX-GP
DY
12
C762
SCD1U10V2KX-5GP
C762
SCD1U10V2KX-5GP
12
C761
SC1U6D3V2KX-GP
C761
SC1U6D3V2KX-GP
12
C735
SC180P50V2JN-1GP
C735
SC180P50V2JN-1GP
12
C766
SCD1U10V2KX-5GP
C766
SCD1U10V2KX-5GP
VDDIO_MEM_S
U16 VDDIO_MEM_S
W18 VDDIO_MEM_S
R19 VDDIO_MEM_S
R16 VDDIO_MEM_S
N16 VDDIO_MEM_S
L19 VDDIO_MEM_S
L16 VDDIO_MEM_S
J16 VDDIO_MEM_S
E17 VDDIO_MEM_S
G19 VDDIO_MEM_S
G16
VDDCR_NB
P13 VDDCR_NB
P11 VDDCR_NB
N14 VDDCR_NB
N12 VDDCR_NB
N10 VDDCR_NB
M13 VDDCR_NB
M12 VDDCR_NB
M11 VDDCR_NB
L14 VDDCR_NB
L12 VDDCR_NB
L10 VDDCR_NB
K13 VDDCR_NB
K11 VDDCR_NB
H12 VDDCR_NB
H9 VDDCR_NB
G13 VDDCR_NB
G11 VDDCR_NB
F12 VDDCR_NB
F9 VDDCR_NB
E13 VDDCR_NB
E11 VDDCR_NB
E8
VDDCR_CPU
R8 VDDCR_CPU
N7 VDDCR_CPU
M8 VDDCR_CPU
M6 VDDCR_CPU
L7 VDDCR_CPU
J8 VDDCR_CPU
J6 VDDCR_CPU
H7 VDDCR_CPU
H5 VDDCR_CPU
G8 VDDCR_CPU
G6 VDDCR_CPU
F7 VDDCR_CPU
F5 VDDCR_CPU
E6 VDDCR_CPU
E5
VDD_33 A4
VDD_10 T12
VDD_10 V12
VDD_10 W13
VDD_10 U13
VDDPL_10 U11
VDD_18_DAC W9
VDD_18 V7
VDD_18 T7
VDD_18 W6
VDD_18 U9
VDD_18 U6
VDD_18 W8
VDD_18 U8
3 OF 5
POWER
ONTARIO_FT1
APU1C
ONTARIO-FT1-GP
3 OF 5
POWER
ONTARIO_FT1
APU1C
ONTARIO-FT1-GP
12
C772
SC1U6D3V2KX-GP
C772
SC1U6D3V2KX-GP
12
C737
SCD1U10V2KX-5GP
C737
SCD1U10V2KX-5GP
12
C744
SC4D7U6D3V5KX-3GP
DY
C744
SC4D7U6D3V5KX-3GP
DY
12
C745
SC180P50V2JN-1GP
C745
SC180P50V2JN-1GP
12
C739
SC1U6D3V2KX-GP
DY
C739
SC1U6D3V2KX-GP
DY
12
C712
SC180P50V2JN-1GP
DY
C712
SC180P50V2JN-1GP
DY
12
C754
SC10U6D3V5KX-1GP
DY
C754
SC10U6D3V5KX-1GP
DY
12
C701
SC1U6D3V2KX-GP
DY
C701
SC1U6D3V2KX-GP
DY
12
C717
SCD1U10V2KX-5GP
DY
C717
SCD1U10V2KX-5GP
DY
1 2
L701
PBY160808T-221Y-N-GP
L701
PBY160808T-221Y-N-GP
12
C748
SC10U6D3V5KX-1GP
C748
SC10U6D3V5KX-1GP
12
C714
SC10U6D3V5KX-1GP
C714
SC10U6D3V5KX-1GP
12
C709
SC1U6D3V2KX-GP
DY
C709
SC1U6D3V2KX-GP
DY
12
C740
SC180P50V2JN-1GP
DY
C740
SC180P50V2JN-1GP
DY
12
C769
SCD1U10V2KX-5GP
C769
SCD1U10V2KX-5GP
12
C726
SC10U6D3V5KX-1GP
C726
SC10U6D3V5KX-1GP
12
C767
SC1U6D3V2KX-GP
C767
SC1U6D3V2KX-GP
12
C720
SCD1U10V2KX-5GP
C720
SCD1U10V2KX-5GP
12
C770
SCD1U10V2KX-5GP
C770
SCD1U10V2KX-5GP
12
C706
SC10U6D3V5KX-1GP
DY
C706
SC10U6D3V5KX-1GP
DY
12
C724
SCD1U10V2KX-5GP
C724
SCD1U10V2KX-5GP
12
C741
SC1U6D3V2KX-GP
C741
SC1U6D3V2KX-GP
12
C705
SC10U6D3V5KX-1GP
C705
SC10U6D3V5KX-1GP
12
C743
SC1U6D3V2KX-GP
C743
SC1U6D3V2KX-GP
12
C713
SC4D7U6D3V5KX-3GP
C713
SC4D7U6D3V5KX-3GP
12
C734
SC180P50V2JN-1GP
DY
C734
SC180P50V2JN-1GP
DY
12
C747
SC1U6D3V2KX-GP
C747
SC1U6D3V2KX-GP
12
C755
SC10U6D3V5KX-1GP
C755
SC10U6D3V5KX-1GP
12
C708
SC1U6D3V2KX-GP
DY
C708
SC1U6D3V2KX-GP
DY
12
C723
SC1U6D3V2KX-GP
DY
C723
SC1U6D3V2KX-GP
DY
12
C752
SC1U6D3V2KX-GP
DY
C752
SC1U6D3V2KX-GP
DY
12
C719
SC180P50V2JN-1GP
DY
C719
SC180P50V2JN-1GP
DY
12
C753
SC1U6D3V2KX-GP
C753
SC1U6D3V2KX-GP
12
C763
SC1U6D3V2KX-GP
C763
SC1U6D3V2KX-GP
12
C760
SCD1U10V2KX-5GP
C760
SCD1U10V2KX-5GP
12
C750
SCD1U10V2KX-5GP
DY
C750
SCD1U10V2KX-5GP
DY
12
C715
SCD1U10V2KX-5GP
DY
C715
SCD1U10V2KX-5GP
DY
12
C733
SCD1U10V2KX-5GP
C733
SCD1U10V2KX-5GP
12
C768
SCD1U10V2KX-5GP
DY
C768
SCD1U10V2KX-5GP
DY
12
C729
SC10U6D3V5KX-1GP
C729
SC10U6D3V5KX-1GP
12
C718
SC1U6D3V2KX-GP
C718
SC1U6D3V2KX-GP
12
C716
SC1U6D3V2KX-GP
C716
SC1U6D3V2KX-GP
12
C751
SCD1U10V2KX-5GP
C751
SCD1U10V2KX-5GP
12
C757
SC10U6D3V5KX-1GP
DY
C757
SC10U6D3V5KX-1GP
DY
12
C730
SC4D7U6D3V5KX-3GP
DY
C730
SC4D7U6D3V5KX-3GP
DY
12
C725
SC1U6D3V2KX-GP
DY
C725
SC1U6D3V2KX-GP
DY
12
C738
SC1U6D3V2KX-GP
C738
SC1U6D3V2KX-GP
12
C742
SC180P50V2JN-1GP
C742
SC180P50V2JN-1GP
12
C721
SCD1U10V2KX-5GP
C721
SCD1U10V2KX-5GP
12
C731
SC4D7U6D3V5KX-3GP
C731
SC4D7U6D3V5KX-3GP
12
C756
SC10U6D3V5KX-1GP
DY
C756
SC10U6D3V5KX-1GP
DY
12
C749
SC180P50V2JN-1GP
C749
SC180P50V2JN-1GP
12
C711
SCD1U10V2KX-5GP
DY
C711
SCD1U10V2KX-5GP
DY
12
C771
SCD1U10V2KX-5GP
C771
SCD1U10V2KX-5GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_VSS(5/5)
A3
8 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_VSS(5/5)
A3
8 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
APU_VSS(5/5)
A3
8 109Friday, April 22, 2011
<Core Design>
SSID = CPU
VSS
N11 VSS
N8 VSS
N6 VSS
N4 VSS
M7 VSS
L22 VSS
L20 VSS
L13 VSS
L11 VSS
L8 VSS
L6 VSS
L4 VSS
K14 VSS
K10 VSS
J20 VSS
J7 VSS
J5 VSS
J4 VSS
H13 VSS
H11 VSS
H6 VSS
G22 VSS
G20 VSS
G12 VSS
G9 VSS
G7 VSS
G5 VSS
G4 VSS
F13 VSS
F11 VSS
F8 VSS
E20 VSS
E12 VSS
E9 VSS
E7 VSS
D19 VSS
D17 VSS
B15 VSS
D14 VSS
D11 VSS
D9 VSS
D7 VSS
D5 VSS
C4 VSS
B22 VSS
B17 VSS
B11 VSS
B7 VSS
A7
VSSBG_DAC A11
VSS AC13
VSS AC9
VSS AC5
VSS AB21
VSS AB17
VSS AB13
VSS AB9
VSS AB5
VSS AB2
VSS AA22
VSS AA4
VSS Y19
VSS Y17
VSS Y15
VSS Y13
VSS Y11
VSS Y9
VSS Y7
VSS Y5
VSS W20
VSS W12
VSS W7
VSS W5
VSS W4
VSS W2
VSS W1
VSS V13
VSS V11
VSS V9
VSS V8
VSS U22
VSS U20
VSS U12
VSS U7
VSS U5
VSS U4
VSS T13
VSS T11
VSS T9
VSS T6
VSS R20
VSS R7
VSS R4
VSS P14
VSS P10
VSS N22
VSS N20
VSS N13
4 OF 5
GROUND
ONTARIO_FT1
APU1D
ONTARIO-FT1-GP
4 OF 5
GROUND
ONTARIO_FT1
APU1D
ONTARIO-FT1-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
TRAVIS
A3
9 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
TRAVIS
A3
9 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
TRAVIS
A3
9 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
10 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
10 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
10 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
11 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
11 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
11 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
12 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
12 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
12 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
13 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
13 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
13 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_SMBDATA
PCH_SMBCLK
PCH_SMBDATA
PCH_SMBCLK
SA0_DIM0
SA1_DIM0
SA0_DIM0
SA1_DIM0
M_RST#
1D5V_S3
1D5V_S3
3D3V_S0
0D75V_S0
0D75V_S0
DDR_VREF_S3
0D75V_S0
DDR_VREF_S3
PCH_SMBCLK 15,65
SMB_CLK 18
SMB_DATA 18
M_DM0 5,15
M_DM1 5,15
M_DM2 5,15
M_DM3 5,15
M_DM4 5,15
M_DM5 5,15
M_DM6 5,15
M_DM7 5,15
PCH_SMBDATA 15,65
M_DQ05,15
M_DQS#05,15
M_DQS05,15
M_A05,15 M_A15,15 M_A25,15 M_A35,15 M_A45,15 M_A55,15 M_A65,15 M_A75,15 M_A85,15 M_A95,15 M_A105,15 M_A115,15 M_A125,15 M_A135,15 M_A145,15 M_A155,15
M_DQ15,15 M_DQ25,15 M_DQ35,15 M_DQ45,15 M_DQ55,15 M_DQ65,15 M_DQ75,15 M_DQ85,15 M_DQ95,15 M_DQ105,15 M_DQ115,15 M_DQ125,15 M_DQ135,15 M_DQ145,15 M_DQ155,15 M_DQ165,15 M_DQ175,15 M_DQ185,15 M_DQ195,15 M_DQ205,15 M_DQ215,15 M_DQ225,15 M_DQ235,15 M_DQ245,15 M_DQ255,15 M_DQ265,15 M_DQ275,15 M_DQ285,15 M_DQ295,15 M_DQ305,15 M_DQ315,15 M_DQ325,15 M_DQ335,15 M_DQ345,15 M_DQ355,15 M_DQ365,15 M_DQ375,15 M_DQ385,15 M_DQ395,15 M_DQ405,15 M_DQ415,15 M_DQ425,15 M_DQ435,15 M_DQ445,15 M_DQ455,15 M_DQ465,15 M_DQ475,15 M_DQ485,15 M_DQ495,15 M_DQ505,15 M_DQ515,15 M_DQ525,15 M_DQ535,15 M_DQ545,15 M_DQ555,15 M_DQ565,15 M_DQ575,15 M_DQ585,15 M_DQ595,15 M_DQ605,15 M_DQ615,15 M_DQ625,15 M_DQ635,15
M_DQS#15,15 M_DQS#25,15 M_DQS#35,15 M_DQS#45,15 M_DQS#55,15 M_DQS#65,15 M_DQS#75,15
M_DQS15,15 M_DQS25,15 M_DQS35,15 M_DQS45,15 M_DQS55,15 M_DQS65,15 M_DQS75,15
M_BS25,15
M_BS05,15 M_BS15,15
M_A_DIM0_ODT05 M_A_DIM0_ODT15
M_RST#5,15
M_RAS# 5,15
M_WE# 5,15
M_CAS# 5,15
M_A_DIM0_CS#0 5
M_A_DIM0_CS#1 5
M_DIM0_CKE0 5,15
M_DIM0_CKE1 5,15
M_DIM0_CLK_DDR0 5
M_DIM0_CLK_DDR#0 5
M_DIM0_CLK_DDR1 5
M_DIM0_CLK_DDR#1 5
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DDR3-SODIMM1
14 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DDR3-SODIMM1
14 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DDR3-SODIMM1
14 109Friday, April 22, 2011
<Core Design>
SSID = MEMORY
Intel HR DM tied to GND
AMD still following previous design
Place these caps
close to VTT1 and
VTT2.
SODIMM A DECOUPLING
Layout Note:
Place these Caps near
SO-DIMMA.
62.10017.K11
H=5.2mm
X01
0721: Reserve Cap
X01
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS 2
NP1 NP1
NP2 NP2
RAS# 110
WE# 113
CAS# 115
CS0# 114
CS1# 121
CKE0 73
CKE1 74
CK0 101
CK0# 103
CK1 102
CK1# 104
DM0 11
DM1 28
DM2 46
DM3 63
DM4 136
DM5 153
DM6 170
DM7 187
SDA 200
SCL 202
VDDSPD 199
SA0 197
SA1 201
VREF_CA
126
VDD18 124
NC#1 77
NC#2 122
NC#/TEST 125
VDD3 81
VDD4 82
VDD5 87
VDD6 88
VDD7 93
VDD8 94
VDD9 99
VDD10 100
VDD13 111
VDD14 112
VDD15 117
VDD16 118
VSS 3
VSS 8
VSS 9
VSS 13
VSS 14
VSS 19
VSS 20
VSS 25
VSS 26
VSS 31
VSS 32
VSS 37
VSS 38
VSS 43
VSS 44
VSS 48
VSS 49
VSS 54
VSS 55
VSS 60
VSS 61
VDD1 75
VSS 65
VSS 66
VSS 71
VSS 72
VDD2 76
VDD11 105
VDD12 106
VDD17 123
VSS 127
VSS 128
VSS 134
VSS 133
VSS 138
VSS 139
VSS 144
VSS 145
VSS 151
VSS 150
VSS 155
VSS 156
VSS 161
VSS 162
VSS 167
VSS 168
VSS 173
VSS 172
VSS 179
VSS 178
VSS 185
VSS 184
VSS 189
VSS 190
VSS 195
VSS 196
RESET#
30
EVENT# 198
VSS 205
VSS 206
VTT1
203
VTT2
204
DM1
DDR3-204P-25-GP
DM1
DDR3-204P-25-GP
1 2
R1402
0R0402-PAD
R1402
0R0402-PAD
12
C1415
SCD1U10V2KX-5GP
C1415
SCD1U10V2KX-5GP
1 2
R1401
0R0402-PAD
R1401
0R0402-PAD
12
C1418
SC10U6D3V5KX-1GP
DY
C1418
SC10U6D3V5KX-1GP
DY
12
C1402
SC2D2U6D3V3KX-GP
DY
C1402
SC2D2U6D3V3KX-GP
DY
12
C1406
SC10U6D3V5KX-1GP
C1406
SC10U6D3V5KX-1GP
12
C1411
SC1KP50V2KX-1GP
C1411
SC1KP50V2KX-1GP
12
C1425
SCD1U10V2KX-5GP
DY
C1425
SCD1U10V2KX-5GP
DY
12
C1410
SC10U6D3V5KX-1GP
DY
C1410
SC10U6D3V5KX-1GP
DY
12
C1420
SC1U6D3V2KX-GP
DY
C1420
SC1U6D3V2KX-GP
DY
12
C1416
SCD1U10V2KX-5GP
C1416
SCD1U10V2KX-5GP
1 2
C1423 SC10P50V2JN-4GPC1423 SC10P50V2JN-4GP
12
C1414
SCD1U10V2KX-5GP
C1414
SCD1U10V2KX-5GP
12
TC1401
SE220U2VDM-8GP
TC1401
SE220U2VDM-8GP
12
C1407
SC4D7U6D3V5KX-3GP
C1407
SC4D7U6D3V5KX-3GP
12
C1419
SC1U6D3V2KX-GP
C1419
SC1U6D3V2KX-GP
12
C1404
SC4D7U6D3V5KX-3GP
C1404
SC4D7U6D3V5KX-3GP
12
C1403
SC4D7U6D3V5KX-3GP
C1403
SC4D7U6D3V5KX-3GP
1 2
C1424 SC10P50V2JN-4GPC1424 SC10P50V2JN-4GP
12
C1408
SC10U10V5ZY-1GP
DY
C1408
SC10U10V5ZY-1GP
DY
12
C1405
SC10U10V5ZY-1GP
DY
C1405
SC10U10V5ZY-1GP
DY
12
C1401
SCD1U10V2KX-5GP
C1401
SCD1U10V2KX-5GP
1
2 3
4
RN1401
SRN22-3-GP
RN1401
SRN22-3-GP
12
C1412
SC2D2U6D3V3KX-GP
DY
C1412
SC2D2U6D3V3KX-GP
DY
12
C1409
SC10U6D3V5KX-1GP
DY
C1409
SC10U6D3V5KX-1GP
DY
12
C1421
SC1U6D3V2KX-GP
C1421
SC1U6D3V2KX-GP
12
C1413
SC1KP50V2KX-1GP
C1413
SC1KP50V2KX-1GP
12
C1422
SC1U6D3V2KX-GP
DY
C1422
SC1U6D3V2KX-GP
DY
12
C1417
SCD1U10V2KX-5GP
C1417
SCD1U10V2KX-5GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SA0_DIM1
SA1_DIM1
SA0_DIM1
SA1_DIM1
M_DIM0_CKE0
M_DIM0_CKE1
0D75V_S0
3D3V_S0
1D5V_S3
1D5V_S3
0D75V_S0
DDR_VREF_S3
DDR_VREF_S3
3D3V_S0
M_DM0 5,14
M_DM1 5,14
M_DM2 5,14
M_DM3 5,14
M_DM4 5,14
M_DM5 5,14
M_DM6 5,14
M_DM7 5,14
PCH_SMBCLK 14,65
PCH_SMBDATA 14,65
M_BS05,14
M_BS25,14
M_BS15,14
M_A05,14
M_DQ05,14
M_DQS#05,14
M_DQS05,14
M_A15,14 M_A25,14 M_A35,14 M_A45,14 M_A55,14 M_A65,14 M_A75,14 M_A85,14 M_A95,14 M_A105,14 M_A115,14 M_A125,14 M_A135,14 M_A145,14 M_A155,14
M_DQ15,14 M_DQ25,14 M_DQ35,14 M_DQ45,14 M_DQ55,14 M_DQ65,14 M_DQ75,14 M_DQ85,14 M_DQ95,14 M_DQ105,14 M_DQ115,14 M_DQ125,14 M_DQ135,14 M_DQ145,14 M_DQ155,14 M_DQ165,14 M_DQ175,14 M_DQ185,14 M_DQ195,14 M_DQ205,14 M_DQ215,14 M_DQ225,14 M_DQ235,14 M_DQ245,14 M_DQ255,14 M_DQ265,14 M_DQ275,14 M_DQ285,14 M_DQ295,14 M_DQ305,14 M_DQ315,14 M_DQ325,14 M_DQ335,14 M_DQ345,14 M_DQ355,14 M_DQ365,14 M_DQ375,14 M_DQ385,14 M_DQ395,14 M_DQ405,14 M_DQ415,14 M_DQ425,14 M_DQ435,14 M_DQ445,14 M_DQ455,14 M_DQ465,14 M_DQ475,14 M_DQ485,14 M_DQ495,14 M_DQ505,14 M_DQ515,14 M_DQ525,14 M_DQ535,14 M_DQ545,14 M_DQ555,14 M_DQ565,14 M_DQ575,14 M_DQ585,14 M_DQ595,14 M_DQ605,14 M_DQ615,14 M_DQ625,14 M_DQ635,14
M_DQS#15,14 M_DQS#25,14 M_DQS#35,14 M_DQS#45,14 M_DQS#55,14 M_DQS#65,14 M_DQS#75,14
M_DQS15,14 M_DQS25,14 M_DQS35,14 M_DQS45,14 M_DQS55,14 M_DQS65,14 M_DQS75,14
M_B_DIM0_ODT05 M_B_DIM0_ODT15
M_RST#5,14
M_DIM0_CLK_DDR#3 5
M_RAS# 5,14
M_WE# 5,14
M_CAS# 5,14
M_B_DIM0_CS#0 5
M_B_DIM0_CS#1 5
M_DIM0_CKE0 5,14
M_DIM0_CKE1 5,14
M_DIM0_CLK_DDR2 5
M_DIM0_CLK_DDR#2 5
M_DIM0_CLK_DDR3 5
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DDR3-SODIMM2
15 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DDR3-SODIMM2
15 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DDR3-SODIMM2
15 109Friday, April 22, 2011
<Core Design>
SSID = MEMORY
Intel HR B channel address is 01
AMD B channel address is 10
SODIMM B DECOUPLING
Layout Note:
Place these Caps near
SO-DIMMB.
SO-DIMMB is placed farther from
the Processor than SO-DIMMA
Place these caps
close to VTT1 and
VTT2.
Intel HR DM tied to GND
AMD still following previous design
0721 change 4k7 to 10k
62.10017.K01
H=9.2mm
X01
12
R1501
10KR2J-3-GP
R1501
10KR2J-3-GP
12
C1516
SC2D2U6D3V3KX-GP
DY
C1516
SC2D2U6D3V3KX-GP
DY
12
R1531
69D8R2F-GP
DY
R1531
69D8R2F-GP
DY
12
C1520
SC1U6D3V2KX-GP
DY
C1520
SC1U6D3V2KX-GP
DY
12
C1513
SCD1U10V2KX-5GP
C1513
SCD1U10V2KX-5GP
12
R1532
69D8R2F-GP
DY
R1532
69D8R2F-GP
DY
12
C1506
SC10U6D3V5KX-1GP
C1506
SC10U6D3V5KX-1GP
12
C1521
SC1U6D3V2KX-GP
C1521
SC1U6D3V2KX-GP
12
C1503
SC10U10V5ZY-1GP
DY
C1503
SC10U10V5ZY-1GP
DY
12
C1501
SCD1U10V2KX-5GP
C1501
SCD1U10V2KX-5GP
12
C1504
SC10U10V5ZY-1GP
DY
C1504
SC10U10V5ZY-1GP
DY
12
C1515
SCD1U10V2KX-5GP
C1515
SCD1U10V2KX-5GP
12
C1519
SC1U6D3V2KX-GP
C1519
SC1U6D3V2KX-GP
12
C1510
SC10U6D3V5KX-1GP
DY
C1510
SC10U6D3V5KX-1GP
DY
12
C1511
SC1U6D3V2KX-GP
C1511
SC1U6D3V2KX-GP
12
C1509
SC10U6D3V5KX-1GP
C1509
SC10U6D3V5KX-1GP
12
C1508
SC10U10V5ZY-1GP
DY
C1508
SC10U10V5ZY-1GP
DY
12
C1512
SCD1U10V2KX-5GP
C1512
SCD1U10V2KX-5GP
12
C1507
SC4D7U6D3V5KX-3GP
C1507
SC4D7U6D3V5KX-3GP
12
C1514
SCD1U10V2KX-5GP
C1514
SCD1U10V2KX-5GP
1 2
R1502
0R0402-PAD
R1502
0R0402-PAD
12
C1505
SC4D7U6D3V5KX-3GP
C1505
SC4D7U6D3V5KX-3GP
12
C1518
SC1U6D3V2KX-GP
DY
C1518
SC1U6D3V2KX-GP
DY
12
C1502
SC2D2U6D3V3KX-GP
DY
C1502
SC2D2U6D3V3KX-GP
DY
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS 2
NP1 NP1
NP2 NP2
RAS# 110
WE# 113
CAS# 115
CS0# 114
CS1# 121
CKE0 73
CKE1 74
CK0 101
CK0# 103
CK1 102
CK1# 104
DM0 11
DM1 28
DM2 46
DM3 63
DM4 136
DM5 153
DM6 170
DM7 187
SDA 200
SCL 202
VDDSPD 199
SA0 197
SA1 201
VREF_CA
126
VDD18 124
NC#1 77
NC#2 122
NC#/TEST 125
VDD3 81
VDD4 82
VDD5 87
VDD6 88
VDD7 93
VDD8 94
VDD9 99
VDD10 100
VDD13 111
VDD14 112
VDD15 117
VDD16 118
VSS 3
VSS 8
VSS 9
VSS 13
VSS 14
VSS 19
VSS 20
VSS 25
VSS 26
VSS 31
VSS 32
VSS 37
VSS 38
VSS 43
VSS 44
VSS 48
VSS 49
VSS 54
VSS 55
VSS 60
VSS 61
VDD1 75
VSS 65
VSS 66
VSS 71
VSS 72
VDD2 76
VDD11 105
VDD12 106
VDD17 123
VSS 127
VSS 128
VSS 134
VSS 133
VSS 138
VSS 139
VSS 144
VSS 145
VSS 151
VSS 150
VSS 155
VSS 156
VSS 161
VSS 162
VSS 167
VSS 168
VSS 173
VSS 172
VSS 179
VSS 178
VSS 185
VSS 184
VSS 189
VSS 190
VSS 195
VSS 196
RESET#
30
EVENT# 198
VSS 205
VSS 206
VTT1
203
VTT2
204
DM2
DDR3-204P-24-GP
DM2
DDR3-204P-24-GP
12
C1517
SCD1U10V2KX-5GP
C1517
SCD1U10V2KX-5GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
16 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
16 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
16 109Friday, April 22, 2011
<Core Design>
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
APU_STOP#
32K_X1
32K_X2
dGPU_PRSNT#
PCIE_RST#_C
INT_SERIRQ
PCIE_RST#_C
A_RST#_R
A_RX1P_C
A_RX2N_C
A_RX0P_C
A_RX3N_C
A_RX0N_C
A_RX3P_C
A_RX2P_C
A_RX1N_C
PCIE_CALRN_R
PCIE_CALRP_R
FCHDISP_CLKP_R
FCHDISP_CLKN_R
NB_HT_CLKP
NB_HT_CLKN
FCHAPU_CLKP_R
FCHAPU_CLKN_R
CLK_MINI1_R
CLK_MINI1#_R
LAN_CLK_R
LAN_CLK#_R
48M_OSC
25M_X1
25M_X2
25M_X2
25M_X1
PCIE_TXP0_C
PCIE_TXN0_C
PCIE_TXP2_C
PCIE_TXN2_C
dGPU_PRSNT#
INT_SERIRQ
LPCCLK1_R
LPCCLK0_R
PCI_CLK1_R
GPIO46
PCI_CLK0_R
PCI_CLK3_R
PCI_CLK2_R
PCI_CLK4_R
APU_STOP#
PCI_RST#
32K_X1
32K_X2
GPIO42
INTRUDER_ALERT#
PCI_CLK3_R
LPC_AD0_R
LPC_AD1_R
LPC_AD2_R
LPC_AD3_R
FCHGFX_CLKP_R
FCHGFX_CLKN_R
1D8V_S0
3D3V_S0
3D3V_S0
1D1V_PCIE_S0
3D3V_S0
RTC_AUX_S5
3D3V_S0
PLT_RST# 31,65,71,83
A_RST#27,36
UMI_FCH_APU_RX2P4 UMI_FCH_APU_RX2N4 UMI_FCH_APU_RX3P4 UMI_FCH_APU_RX3N4
UMI_FCH_APU_RX0P4 UMI_FCH_APU_RX0N4 UMI_FCH_APU_RX1P4 UMI_FCH_APU_RX1N4
UMI_APU_FCH_TX3P4 UMI_APU_FCH_TX3N4
UMI_APU_FCH_TX0P4 UMI_APU_FCH_TX0N4 UMI_APU_FCH_TX1P4 UMI_APU_FCH_TX1N4 UMI_APU_FCH_TX2P4 UMI_APU_FCH_TX2N4
DISP_CLKP6 DISP_CLKN6
APU_CLKP6 APU_CLKN6
CLK_PCIE_VGA83 CLK_PCIE_VGA#83
CLK_PCIE_WLAN65 CLK_PCIE_WLAN#65
CLK_PCIE_LAN31 CLK_PCIE_LAN#31
CLK_PCH_48M32
PCIE_RXN031 PCIE_RXP031
PCIE_RXP265 PCIE_RXN265
PCIE_TXP031 PCIE_TXN031
PCIE_TXP265 PCIE_TXN265
PCI_AD23 21
PCI_AD24 21
PCI_AD25 21
PCI_AD26 21
PCI_AD27 21
LPC_CLK1 21
LPC_AD0 27,71
LPC_AD1 27,71
LPC_AD2 27,71
LPC_AD3 27,71
INT_SERIRQ 27
LPC_CLK0 21,27
LPC_FRAME# 27,71
PCI_CLK1 21
CLK_PCI_LPC 21,71
PCI_CLK4 21
PM_CLKRUN# 27
APU_PROCHOT#_VDDIO 6
ALLOW_STOP 6
APU_RST# 6,83
H_CPUPW RGD 6,36,42,71
SATA_ODD_DA# 56
PE_GPIO1 92,93
PCH_SUSCLK_KBC 27
PE_GPIO0 83
PCI_CLK2 21
1D5V_VGA_PWOK 83,86
RTC_SENSE 60
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M1_ACPI/PCI/CLK(1/6)
A2
17 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M1_ACPI/PCI/CLK(1/6)
A2
17 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M1_ACPI/PCI/CLK(1/6)
A2
17 109Friday, April 22, 2011
<Core Design>
KBC
folloiwng Intel HR netname
integrated PU
LDT_STP# connection is just
for chipset automation purpose.
It is an automatic test for
AMD validation team only
EXT clock_Gen
LAN
WLAN
if LAN support Wake on S5,
do not use clock from FCH,
have use X'tal
CLKREQ#
Use 48Mhz CLK For 5138
GPP CLK port
0
1
2
3
4
5
6
7
8
2
Device
0
LAN
WLAN
New Card
WWAN
X
X
X
X
X
1
3
LAN
WLAN
LAN
WLAN
Debug Strap
PE_GPIO0 ->VGA_RESET
PE_GPIO1 ->VGA_PowerEnable
Muxless support
checklist:No PU Res
Integrated Resistor PU10K
PM_CLKRUN#
0709
100MHZ
100MHZ
33MHZ
0712
0721 Change CAP 10V to 16V
0806
0811 EMI
0811 EMI
0819
X01
X01
X01
X01
X01
X01
X02
X02
X02
SSID = FCH
1
2 3
4
RN
0R4P2R-PAD
RN1706
RN
0R4P2R-PAD
RN1706
1 2
C1719
SC18P50V2JN-1-GP
C1719
SC18P50V2JN-1-GP
1 2
C1715 SC18P50V2JN-1-GPC1715 SC18P50V2JN-1-GP
25M_X2
L27
25M_X1
L26
14M_25M_48M_OSC
L25
GPP_CLK8N
T28 GPP_CLK8P
T29
GPP_CLK7N
N27 GPP_CLK7P
N26
GPP_CLK6N
P28 GPP_CLK6P
P29
GPP_CLK5N
M25 GPP_CLK5P
P25
GPP_CLK4N
L23 GPP_CLK4P
L24
GPP_CLK3N
V25 GPP_CLK3P
T25
GPP_CLK2N
M28 GPP_CLK2P
M29
GPP_CLK1N
N28 GPP_CLK1P
N29
GPP_CLK0N
L28 GPP_CLK0P
L29
SLT_GFX_CLKN
T23 SLT_GFX_CLKP
V23
CPU_HT_CLKN
T21 CPU_HT_CLKP
V21
NB_HT_CLKN
T27 NB_HT_CLKP
T26
NB_DISP_CLKN
U28 NB_DISP_CLKP
U29
PCIE_RCLKN_NB_LNK_CLKN
P23 PCIE_RCLKP_NB_LNK_CLKP
M23
GPP_RX3N
W25 GPP_RX3P
W24 GPP_RX2N
V24 GPP_RX2P
W23 GPP_RX1N
AA24 GPP_RX1P
AA25 GPP_RX0N
Y21 GPP_RX0P
AA22
GPP_TX3N
W29 GPP_TX3P
W28 GPP_TX2N
Y27 GPP_TX2P
Y26 GPP_TX1N
Y28 GPP_TX1P
Y29 GPP_TX0N
AA29 GPP_TX0P
AA28
PCIE_CALRN
AD28 PCIE_CALRP
AD29
UMI_RX3N
AB24 UMI_RX3P
AB25 UMI_RX2N
AC25 UMI_RX2P
AC24 UMI_RX1N
AD24 UMI_RX1P
AD25 UMI_RX0N
AE23 UMI_RX0P
AE24
UMI_TX3N
AB27 UMI_TX3P
AB26 UMI_TX2N
AB28 UMI_TX2P
AB29 UMI_TX1N
AC29 UMI_TX1P
AC28 UMI_TX0N
AD27 UMI_TX0P
AD26
A_RST#
L1 PCIE_RST#
P1
VDDBT_RTC_G B1
INTRUDER_ALERT# B2
RTCCLK D2
32K_X2 C2
32K_X1 C1
LDT_RST# J24
LDT_STP# G22
LDT_PG K19
PROCHOT# H21
ALLOW_LDTSTP_DMA_ACTIVE# G21
SERIRQ_GPIO48 AB19
LDRQ1#_CLK_REQ6#_GPIO49 AA18
LDRQ0# J25
LFRAME# G28
LAD3 H28
LAD2 H29
LAD1 J26
LAD0 J27
LPCCLK1 H25
LPCCLK0 H24
INTH#_GPIO35 AJ4
INTG#_GPIO34 AG4
INTF#_GPIO33 AG6
INTE#_GPIO32 AJ6
LOCK# AD7
CLKRUN# AB11
GNT3#_CLK_REQ7#_GPIO46 AB12
GNT2#_GPO45 AH6
GNT1#_GPO44 AJ5
GNT0# AD12
REQ3#_CLK_REQ5#_GPIO42 AC12
REQ2#_CLK_REQ8#_GPIO41 AH4
REQ1#_GPIO40 AH5
REQ0# AE11
SERR# AE4
PERR# AE6
STOP# AF5
PAR AC5
TRDY# AE7
IRDY# AJ3
DEVSEL# AB9
FRAME# AE8
CBE3# AA10
CBE2# AD8
CBE1# AD5
CBE0# AA8
AD31_GPIO31 AH3
AD30_GPIO30 AG2
AD29_GPIO29 AH2
AD28_GPIO28 AF3
AD27_GPIO27 AF4
AD26_GPIO26 AF6
AD25_GPIO25 AC11
AD24_GPIO24 AD9
AD23_GPIO23 AE9
AD22_GPIO22 AF2
AD21_GPIO21 AG1
AD20_GPIO20 AF1
AD19_GPIO19 AE3
AD18_GPIO18 AF8
AD17_GPIO17 AE1
AD16_GPIO16 AE2
AD15_GPIO15 AC6
AD14_GPIO14 AD2
AD13_GPIO13 AD1
AD12_GPIO12 AC1
AD11_GPIO11 AC4
AD10_GPIO10 AC3
AD9_GPIO9 AC2
AD8_GPIO8 AA6
AD7_GPIO7 AB5
AD6_GPIO6 AB6
AD5_GPIO5 AB2
AD4_GPIO4 AA5
AD3_GPIO3 AB1
AD2_GPIO2 AA3
AD1_GPIO1 AA4
AD0_GPIO0 AA1
PCIRST# V2
PCICLK4_14M_OSC_GPO39 Y1
PCICLK3_GPO38 W4
PCICLK2_GPO37 W3
PCICLK1_GPO36 W1
PCICLK0 W2
HUDSON-1
1 OF 5
PCI I/F
PCI EXPRESS I/F
PCI CLKS
LPC
RTC
CLOCK GENERATOR
CPU
FCH1A
HUDSON-M1-1-GP
HUDSON-1
1 OF 5
PCI I/F
PCI EXPRESS I/F
PCI CLKS
LPC
RTC
CLOCK GENERATOR
CPU
FCH1A
HUDSON-M1-1-GP
1
2 3
4
RN
0R4P2R-PAD
RN1705
RN
0R4P2R-PAD
RN1705
1 2
R1720 0R0402-PADR1720 0R0402-PAD
12
R1766
1KR2J-1-GP
R1766
1KR2J-1-GP
1 2
R1719 22R2J-2-GPR1719 22R2J-2-GP
1
TP1702TPAD14TP1702TPAD14
1 2
R1712
10KR2J-3-GP
DY
R1712
10KR2J-3-GP
DY
1
2 3
4
RN
0R4P2R-PAD
RN1707
RN
0R4P2R-PAD
RN1707
1 2
C1716
SC10P50V2JN-4GP
C1716
SC10P50V2JN-4GP
1 2
C1707 SCD1U10V2KX-5GPC1707 SCD1U10V2KX-5GP
41
2 3
X1702
XTAL-25MHZ-155-GP
X1702
XTAL-25MHZ-155-GP
12
R1714
10KR2J-3-GP
DY
R1714
10KR2J-3-GP
DY
1 2
R1703
10KR2J-3-GP
DIS_PX
R1703
10KR2J-3-GP
DIS_PX
1
2 3
4
RN
0R4P2R-PAD
RN1702
RN
0R4P2R-PAD
RN1702
1
TP1708 TPAD14TP1708 TPAD14
1 2
R1711
10KR2J-3-GP
DY
R1711
10KR2J-3-GP
DY
12
C1721
SC10P50V2JN-4GP
DY
C1721
SC10P50V2JN-4GP
DY
1 2
C1708 SCD1U10V2KX-5GPC1708 SCD1U10V2KX-5GP
1
TP1707 TPAD14TP1707 TPAD14
1 2
R1709 590R2F-GPR1709 590R2F-GP
1 2
R1705 0R0402-PADR1705 0R0402-PAD
1 2
R1707 0R0402-PADR1707 0R0402-PAD
1 2
C1706 SCD1U10V2KX-5GPC1706 SCD1U10V2KX-5GP
1 2
R1721
0R2J-2-GP
DY
R1721
0R2J-2-GP
DY
1 2
R1717 1MR2J-1-GP
R1717 1MR2J-1-GP
1 2
R1706 0R0402-PADR1706 0R0402-PAD
1 2
C1705 SCD1U10V2KX-5GPC1705 SCD1U10V2KX-5GP
1
TP1703TPAD14TP1703TPAD14
1 2
33R2J-2-GPR1704 33R2J-2-GPR1704
1 2
C1703 SCD1U10V2KX-5GPC1703 SCD1U10V2KX-5GP
12
C1718
SC1U6D3V2KX-GP
C1718
SC1U6D3V2KX-GP
1 4
32
X1701
X-32D768KHZ-67-GP
X1701
X-32D768KHZ-67-GP
1 2
C1713 SCD1U10V2KX-5GPC1713 SCD1U10V2KX-5GP
1 2
C1714 SCD1U10V2KX-5GPC1714 SCD1U10V2KX-5GP
1 2
R1701 0R0402-PADR1701 0R0402-PAD
1
2 3
4
RN1701
SRN22-3-GP
RN1701
SRN22-3-GP
1 2
R1702
10KR2J-3-GP
UMA
R1702
10KR2J-3-GP
UMA
1
TP1701TPAD14TP1701TPAD14
1 2
R1713
1KR2J-1-GP
DY
R1713
1KR2J-1-GP
DY
12
R1715
20MR3-GP
R1715
20MR3-GP
12
C1711
SC150P50V2KX-GP
C1711
SC150P50V2KX-GP
1 2
C1704 SCD1U10V2KX-5GPC1704 SCD1U10V2KX-5GP
1
TP1705TPAD14-GP TP1705TPAD14-GP
1 2
C1717 SC18P50V2JN-1-GPC1717 SC18P50V2JN-1-GP
1 2
33R2J-2-GPR1708 33R2J-2-GPR1708
1
2 3
4
RN1703
SRN22-3-GP
RN1703
SRN22-3-GP
1 2
C1701 SCD1U10V2KX-5GPC1701 SCD1U10V2KX-5GP
1 2
C1710 SCD1U10V2KX-5GPC1710 SCD1U10V2KX-5GP
12
C1722
SC10P50V2JN-4GP
DY
C1722
SC10P50V2JN-4GP
DY
1 2
C1712 SCD1U10V2KX-5GPC1712 SCD1U10V2KX-5GP
1 2
C1709 SCD1U10V2KX-5GPC1709 SCD1U10V2KX-5GP
1 2
R1718 0R0402-PADR1718 0R0402-PAD
1
2 3
4
RN
0R4P2R-PAD
RN1704
RN
0R4P2R-PAD
RN1704
12
C1720
SC18P50V2JN-1-GP
C1720
SC18P50V2JN-1-GP
1 2
R1716
22R2J-2-GP
R1716
22R2J-2-GP
1
TP1706TPAD14-GP TP1706TPAD14-GP
12
C1702
SC150P50V2KX-GP
C1702
SC150P50V2KX-GP
1 2
R1710
2KR2F-3-GP
R1710
2KR2F-3-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FCH_TEST0
SMB_CLK
SMB_DATA
SCLK1
SDATA1
HDA_CODEC_RST#
HDA_SDIN0
RSMRST#_KBC
EC_SCI#
H_A20GATE
H_RCIN#
EC_SW I#
EC_SMI#
HDA_CODEC_BITCLK
FCH_TEST1
FCH_TEST2
PM_PWRBTN#
PM_PWRBTN#_R
FCH_TEST0
FCH_TEST1
FCH_TEST2
EC_SCI#
EC_KB_RST#_R
EC_A20M#_R
EC_SMI#_R
PCIE_WAKE#_R
NB_PW RGD
RSMRST#_R
HDA_SPKR_R
SCLK1
SDATA1
CLK_PCIE_WLAN_REQ#_R
CLKREQG#
USB_OC7#
EC_SW I#
SATA_ODD_PRSNT#_R
HDA_SDIN0
HDA_SDOUT
HDA_BITCLK
HDA_RST#
HDA_SYNC
GBE_CRS
GBE_MDIO
GBE_RXERR
GBE_PHY_INTR
GBE_COL
SPI_CS2#
TP_DEBUG_DAT
TP_DEBUG_CLK
GPO160
USB_OC#2
USB_OC#1
USB_RCOMP
SDAT2
SCL2
SCLK3
SDATA3
SCL2
SDAT2
USB_OC5#
SCLK3
SDATA3
3D3V_S5
3D3V_S0
3D3V_S0
3D3V_S5
3D3V_S5
PM_PWRBTN#27
PM_SLP_S3#27,36,44,46,47 PM_SLP_S5#27,44
FCH_PWRGD36
H_RCIN#27 EC_SCI#27 EC_SMI#27
H_A20GATE27
PCIE_WAKE#27,31
H_THERMTRIP#6,36
HDA_SPKR29
SMB_DATA14 SMB_CLK14
CLK_PCIE_WLAN_REQ#65
PEG_CLKREQ#85
EC_SW I#27
HDA_CODEC_RST#29
HDA_CODEC_SDOUT29
HDA_CODEC_SYNC29
HDA_CODEC_BITCLK29
HDA_SDIN029
USB_OC#261 USB_OC#161
SATA_ODD_PRSNT#56
EC_PW M2 21
SCLK3 6
SDATA3 6
USB_PP6 82
USB_PN6 82
USB_PN9 32
USB_PP9 32
USB_PN1 65
USB_PP1 65
USB_PP7 49
USB_PN7 49
USB_PP2 82
USB_PN2 82
RSMRST#_KBC27
USB_PP0 61
USB_PN0 61
ODD_DA_Q56
PCIE_CLK_LAN_RQ1#31
EC_PW M3 21
PCH_WAKE#27
HDA_SDOUT21
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M2(2/6)
18 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M2(2/6)
18 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M2(2/6)
18 109Friday, April 22, 2011
<Core Design>
integrated PU
integrated PU
integrated PU
0720 POP
13
USB 2.0 EXT.Port1
12
Mini Card1 (WLAN)
10
0
11
NC
Pair
4
USB
5
2
3
1
Device
6
7
8
9
CCD Camera
Card Reader
NEWCARD
NC
NC
if not used SMBUS or GPIO ,PD 10K
0719 AMD Confirm
Rename 0712
Integrated PU is not
supported when the pin is
configured for USB over
current function.
Confirm with SW, RSMRST# from KBC is push-pull.
It can be drived high by SW.
0720: Change From 2.2K and POP
AMD recommand external PU
0812
USB 2.0 EXT.Port1
USB 2.0 EXT.Port1
NC
NC
NC
NC
0817 Add
A00
SSID = FCH
1 2
R1826 0R2J-2-GP
DY
R1826 0R2J-2-GP
DY
1 2
R1810 0R0402-PADR1810 0R0402-PAD
1
2 3
4
RN1809
SRN2K2J-1-GP
RN1809
SRN2K2J-1-GP
PS2M_CLK_GPIO192
E27 PS2M_DAT_GPIO191
F29 PS2KB_CLK_GPIO190
F28 PS2KB_DAT_GPIO189
D27
FC_RST#_GPO160
G29 SPI_CS2#_GBE_STAT2_GPIO166
F21 PS2_CLK_SCL4_GPIO188
E24 PS2_DAT_SDA4_GPIO187
E23
GBE_PHY_INTR
V7 GBE_PHY_RST#
M9 GBE_PHY_PD
P4 GBE_TXCTL_TXEN
M7 GBE_TXD0
P7 GBE_TXD1
T7 GBE_TXD2
P9 GBE_TXD3
M5 GBE_TXCLK
P5 GBE_RXERR
V5 GBE_RXCTL_RXDV
T5 GBE_RXD0
U2 GBE_RXD1
T2 GBE_RXD2
U3 GBE_RXD3
U1 GBE_RXCLK
T9 GBE_MDIO
L5 GBE_MDCK
L6 GBE_CRS
T4 GBE_COL
T1
AZ_RST#
P2 AZ_SYNC
N2 AZ_SDIN3_GPIO170
M4 AZ_SDIN2_GPIO169
M1 AZ_SDIN1_GPIO168
M2 AZ_SDIN0_GPIO167
L2 AZ_SDOUT
N1 AZ_BITCLK
M3
USB_OC0#_TRST#_GEVENT12#
F8 USB_OC1#_TDI_GEVENT13#
E7 USB_OC2#_TCK_GEVENT14#
F7 USB_OC3#_AC_PRES_TDO_GEVENT15#
E8 USB_OC4#_IR_RX0_GEVENT16#
D4 USB_OC5#_IR_TX0_GEVENT17#
E4 USB_OC6#_IR_TX1_GEVENT6#
D1 BLINK_USB_OC7#_GEVENT18#
H3
CLK_REQG#_GPIO65_OSCIN
AA20 GBE_STAT0_GEVENT11#
K3 GBE_LED2_GEVENT10#
G5 GBE_LED1_GEVENT9#
D7 GBE_LED0_GPIO183
D5 DDR3_RST#_GEVENT7#
H4 SMARTVOLT2_SHUTDOWN#_GPIO51
AJ21 IR_LED#_LLB#_GPIO184
E1 CLK_REQ1#_FANOUT4_GPIO61
AB18 CLK_REQ2#_FANIN4_GPIO62
AH21 SDA1_GPIO228
F4 SCL1_GPIO227
F5 SDA0_GPIO47
AE22 SCL0_GPIO43
AD22 SPKR_GPIO66
AF19 SATA_IS5#_FANIN3_GPIO59
AE19 SATA_IS4#_FANOUT3_GPIO55
AF20 CLK_REQ0#_SATA_IS3#_GPIO60
AC18 SMARTVOLT1_SATA_IS2#_GPIO50
AB21 CLK_REQ3#_SATA_IS1#_GPIO63
AA16 CLK_REQ4#_SATA_IS0#_GPIO64
AD19
RSMRST#
G1
NB_PWRGD
AC19 THRMTRIP#_SMBALERT#_GEVENT2#
J6 IR_RX1_GEVENT20#
F3 WAKE#_GEVENT8#
H6 SYS_RESET#_GEVENT19#
J1 GEVENT5#
H2 LPC_SMI#_GEVENT23#
J29 LPC_PME#_GEVENT3#
K2 KBRST#_GEVENT1#
AE21 GA20IN_GEVENT0#
AD21 TEST2
F6 TEST1_TMS
C4 TEST0
B3 SUS_STAT#
G6 PWR_GOOD
H5 PWR_BTN#
F2 SLP_S5#
H1 SLP_S3#
F1 SPI_CS3#_GBE_STAT1_GEVENT21#
D3 RI#_GEVENT22#
K1 PCI_PME#_GEVENT4#
J2
KSO_17_GPIO226 B22
KSO_16_GPIO225 A22
KSO_15_GPIO224 C22
KSO_14_GPIO223 D22
KSO_13_GPIO222 A23
KSO_12_GPIO221 B23
KSO_11_GPIO220 C24
KSO_10_GPIO219 B24
KSO_9_GPIO218 D24
KSO_8_GPIO217 A25
KSO_7_GPIO216 B25
KSO_6_GPIO215 A24
KSO_5_GPIO214 C26
KSO_4_GPIO213 A26
KSO_3_GPIO212 D26
KSO_2_GPIO211 B27
KSO_1_GPIO210 A27
KSO_0_GPIO209 B28
KSI_7_GPIO208 C28
KSI_6_GPIO207 C29
KSI_5_GPIO206 D28
KSI_4_GPIO205 D29
KSI_3_GPIO204 E29
KSI_2_GPIO203 E28
KSI_1_GPIO202 G25
KSI_0_GPIO201 G24
EC_PWM3_EC_TIMER3_GPIO200 E21
EC_PWM2_EC_TIMER2_GPIO199 F22
EC_PWM1_EC_TIMER1_GPIO198 E22
EC_PWM0_EC_TIMER0_GPIO197 F25
SDA3_LV_GPIO196 E26
SCL3_LV_GPIO195 B26
SDA2_GPIO194 F23
SCL2_GPIO193 D25
USB_HSD0N B16
USB_HSD0P A16
USB_HSD1N A17
USB_HSD1P B17
USB_HSD2N J18
USB_HSD2P J16
USB_HSD3N E16
USB_HSD3P E18
USB_HSD4N A14
USB_HSD4P B14
USB_HSD5N C16
USB_HSD5P D16
USB_HSD6N G18
USB_HSD6P G16
USB_HSD7N G14
USB_HSD7P G12
USB_HSD8N C13
USB_HSD8P D13
USB_HSD9N B13
USB_HSD9P A13
USB_HSD10N J14
USB_HSD10P J12
USB_HSD11N E12
USB_HSD11P E14
USB_HSD12N E11
USB_HSD12P F11
USB_HSD13N A12
USB_HSD13P B12
USB_FSD0N J8
USB_FSD0P_GPIO185 H9
USB_FSD1N H11
USB_FSD1P_GPIO186 J10
USB_RCOMP G19
USBCLK_14M_25M_48M_OSC A10
HUDSON-1
USB OC
ACPI/WAKE UP EVENTS
USB MISC
USB 1.1
USB 2.0
GBE LAN
GPIO
EMBEDDED CTRL
HD AUDIO
4 OF 5
FCH1D
HUDSON-M1-1-GP
HUDSON-1
USB OC
ACPI/WAKE UP EVENTS
USB MISC
USB 1.1
USB 2.0
GBE LAN
GPIO
EMBEDDED CTRL
HD AUDIO
4 OF 5
FCH1D
HUDSON-M1-1-GP
1 2
33R2J-2-GPR1822 33R2J-2-GPR1822
1 2
R1806 10KR2J-3-GPR1806 10KR2J-3-GP
1 2
33R2J-2-GPR1821 33R2J-2-GPR1821
1
TP1803TPAD14-GP TP1803TPAD14-GP
1
TP1804TPAD14-GP TP1804TPAD14-GP
1 2
R1809 10KR2J-3-GPR1809 10KR2J-3-GP
12
R1823
10KR2J-3-GP
R1823
10KR2J-3-GP
1
2 3
4
RN1807
SRN10KJ-5-GP
RN1807
SRN10KJ-5-GP
12
R1824
100KR2J-1-GP
R1824
100KR2J-1-GP
1
2 3
4
RN1801
SRN10KJ-5-GP
RN1801
SRN10KJ-5-GP
1 2
33R2J-2-GPR1819 33R2J-2-GPR1819
1
2 3
4
RN1808
SRN10KJ-5-GP
RN1808
SRN10KJ-5-GP
1 2
R1801 0R0402-PADR1801 0R0402-PAD
1
2 3
4
RN1806
SRN10KJ-5-GP
RN1806
SRN10KJ-5-GP
1 2
R1812 10KR2J-3-GP
DY
R1812 10KR2J-3-GP
DY
1 2
R1825 0R0402-PADR1825 0R0402-PAD
1
2 3
4
RN1802
SRN10KJ-5-GP
RN1802
SRN10KJ-5-GP
1 2
R1803 10KR2J-3-GP
DY
R1803 10KR2J-3-GP
DY
1
TP1805TPAD14-GP TP1805TPAD14-GP
1 2
R1808 0R0402-PADR1808 0R0402-PAD
1
TP1801TPAD14-GP TP1801TPAD14-GP
1 2
R1813 10KR2J-3-GP
DY
R1813 10KR2J-3-GP
DY
1 2
R1816 0R0402-PAD
R1816 0R0402-PAD
1 2
R1817 0R0402-PADR1817 0R0402-PAD
1 2
R1804 0R0402-PADR1804 0R0402-PAD
1 2
R1814 10KR2J-3-GP
DY
R1814 10KR2J-3-GP
DY
12
R1811
11K8R2F-GP
R1811
11K8R2F-GP
12
EC1802
SC180P50V2JN-1GP
DY
EC1802
SC180P50V2JN-1GP
DY
1
TP1806TPAD14-GP TP1806TPAD14-GP
1 2
R1807 0R0402-PADR1807 0R0402-PAD
1
2
3
4 5
6
7
8
RN1803
SRN2K2J-2-GP
DY
RN1803
SRN2K2J-2-GP
DY
1 2
R1805 10KR2J-3-GP
DY
R1805 10KR2J-3-GP
DY
12
C1801
SCD1U10V2KX-5GP
DY
C1801
SCD1U10V2KX-5GP
DY
1 2
33R2J-2-GPR1820 33R2J-2-GPR1820
1 2
EC1801
SC22P50V2JN-4GP
EC1801
SC22P50V2JN-4GP
1 2
R1815 0R0402-PADR1815 0R0402-PAD
1
TP1802TPAD14-GP TP1802TPAD14-GP
1
2
3
45
6
7
8
RN1805
SRN10KJ-6-GP
DY
RN1805
SRN10KJ-6-GP
DY
1
2 3
4
RN1804
SRN2K2J-1-GP
RN1804
SRN2K2J-1-GP
1 2
R1818 0R2J-2-GP
DY
R1818 0R2J-2-GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_TXN1_C
SATA_TXN0_C
SATA_TXP0_C
SATA_TXP1_C
SATA_CALN
SATA_CALP
MEM_1V5
GPIO182
VIN_VDDR
GPIO171
VIN_VDDIO
PSW_CLR#
FCH_USB3.0PORT_EN#
MB_THRMDA_FCH
MEM_1V35
VRAM_SIZE1
VRAM_SIZE2
FCH_PROCHOT#_C
APU_TALERT#
GPIO171
FCH_USB3.0PORT_EN#
MB_THRMDA_FCH
VIN_VDDIO
VIN_VDDR
VRAM_SIZE1
GPIO182
MEM_1V5
VRAM_SIZE2
PSW_CLR#
MEM_1V35
FCH_SPI_WP#
FCH_SPI_SI
FCH_SPI_CLK
FCH_SPI_CS0#
FCH_SPI_DI
1D1V_SATA_S0
3D3V_S5
SATA_TXP156 SATA_TXN156
SATA_RXP1_C56 SATA_RXN1_C56
SATA_TXP056 SATA_TXN056
SATA_RXP0_C56 SATA_RXN0_C56
SATA_LED#68 APU_ALERT#_FCH 6
SATA_ODD_PWRGT 56
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M1 SATA/HWM/SPI(3/6)
19 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M1 SATA/HWM/SPI(3/6)
19 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M1 SATA/HWM/SPI(3/6)
19 109Friday, April 22, 2011
<Core Design>
SATA HDD
SATA ODD
PLACE SATA AC DECOUPLING
CAPS CLOSE TO FCH
[checklist]:integrated Clock Mode=>Left unconnected
XTAL
1'nd 82.30020.851
2'nd 82.30020.791
if not used HWM or GPIO ,PD 10K
[VRAM_SIZE1:VRAM_SIZE2]
LL=512M / HL=1G / LH=2G
support ODD Zero power
GPIOD[150:128] are open drain GPIO pins
where as GPO160 is an open drain GPO pin.
These pins are not programmed to GPIO mode by default.
If use as GPIO, need to pull up to 1.8V_RUN
H
VDDIO
1.5V
1.35V
MEM_1V5 MEM_1V35
H Don't Care
L
0721 Change CAP to 10n
SSID = FCH
TP617TPAD14-GP TP617TPAD14-GP
1 2
C1901 SCD01U16V2KX-3GPC1901 SCD01U16V2KX-3GP
1
2
3
4 5
6
7
8
RN1901
SRN10KJ-6-GP
RN1901
SRN10KJ-6-GP
TP621TPAD14-GP TP621TPAD14-GP
12
R1908
10KR2J-3-GP
1G
R1908
10KR2J-3-GP
1G
12
R1909
10KR2J-3-GP
R1909
10KR2J-3-GP
1 2
R1903 931R2F-1-GP
R1903 931R2F-1-GP
TP620TPAD14-GP TP620TPAD14-GP
1 2
R1911 10KR2J-3-GP
R1911 10KR2J-3-GP
1 2
R1904 0R0402-PADR1904 0R0402-PAD
TP619TPAD14-GP TP619TPAD14-GP
1 2
C1904 SCD01U16V2KX-3GPC1904 SCD01U16V2KX-3GP
1 2
C1902 SCD01U16V2KX-3GPC1902 SCD01U16V2KX-3GP
1 2
R1902 1KR2F-3-GP
R1902 1KR2F-3-GP
ROM_RST#_GPIO161
G2 SPI_CS1#_GPIO165
K9 SPI_CLK_GPIO162
K4 SPI_DO_GPIO163
E2 SPI_DI_GPIO164
J5
SATA_X2
AC16
SATA_X1
AD16
SATA_ACT#_GPIO67
AD11
SATA_CALRN
AA14 SATA_CALRP
AB14
SATA_RX5P
AJ19 SATA_RX5N
AH19
SATA_TX5N
AH18 SATA_TX5P
AJ18
SATA_RX4P
AH17 SATA_RX4N
AJ17
SATA_TX4N
AF17 SATA_TX4P
AG17
SATA_RX3P
AF14 SATA_RX3N
AG14
SATA_TX3N
AJ14 SATA_TX3P
AH14
SATA_RX2P
AH12 SATA_RX2N
AJ12
SATA_TX2N
AF12 SATA_TX2P
AG12
SATA_RX1P
AF10 SATA_RX1N
AG10
SATA_TX1N
AJ10 SATA_TX1P
AH10
SATA_RX0P
AH8 SATA_RX0N
AJ8
SATA_TX0N
AJ9 SATA_TX0P
AH9
NC#Y2 Y2
NC#G27 G27
VIN7_GBE_LED3_GPIO182 A8
VIN6_GBE_STAT3_GPIO181 B8
VIN5_GPIO180 B7
VIN4_GPIO179 A7
VIN3_GPIO178 C5
VIN2_GPIO177 A4
VIN1_GPIO176 B4
VIN0_GPIO175 A3
TEMP_COMM C7
TEMPIN3_TALERT#_GPIO174 B5
TEMPIN2_GPIO173 A5
TEMPIN1_GPIO172 A6
TEMPIN0_GPIO171 B6
FANIN2_GPIO58 W8
FANIN1_GPIO57 V9
FANIN0_GPIO56 W7
FANOUT2_GPIO54 Y9
FANOUT1_GPIO53 W6
FANOUT0_GPIO52 W5
FC_ADQ15_GPIOD143 AH26
FC_ADQ14_GPIOD142 AG25
FC_ADQ13_GPIOD141 AJ25
FC_ADQ12_GPIOD140 AJ24
FC_ADQ11_GPIOD139 AF23
FC_ADQ10_GPIOD138 AJ23
FC_ADQ9_GPIOD137 AH22
FC_ADQ8_GPIOD136 AF21
FC_ADQ7_GPIOD135 AG21
FC_ADQ6_GPIOD134 AJ22
FC_ADQ5_GPIOD133 AH23
FC_ADQ4_GPIOD132 AG23
FC_ADQ3_GPIOD131 AH24
FC_ADQ2_GPIOD130 AH25
FC_ADQ1_GPIOD129 AJ26
FC_ADQ0_GPIOD128 AJ27
FC_INT2_GPIOD147 AH27
FC_INT1_GPIOD144 AF29
FC_CE2#_GPIOD150 AE29
FC_CE1#_GPIOD149 AF27
FC_WE#_GPIOD148 AG26
FC_AVD#_GPIOD146 AG29
FC_OE#_GPIOD145 AF28
FC_FBCLKIN AF26
FC_FBCLKOUT AG28
FC_CLK AH28
HUDSON-1
2 OF 5
SPI ROM
GPIOD
SERIAL ATA
HW MONITOR
FCH1B
HUDSON-M1-1-GP
HUDSON-1
2 OF 5
SPI ROM
GPIOD
SERIAL ATA
HW MONITOR
FCH1B
HUDSON-M1-1-GP
1 2
C1903 SCD01U16V2KX-3GPC1903 SCD01U16V2KX-3GP
1
TP1902TP1902
TP618TPAD14-GP TP618TPAD14-GP
12
R1910
10KR2J-3-GP
512M
R1910
10KR2J-3-GP
512M
1
2
3
4 5
6
7
8
RN1902
SRN10KJ-6-GP
RN1902
SRN10KJ-6-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDDPL_3.3V_PCIE
VDDPL_3.3V_SATA
VDDAN_1.1V_USB
VDDCR_11_USB_S
VDDCR_11_S
VDDRF_GBE_S
VDDXL_3.3V
VDDIO_18_FC
1D1V_S0 1D1V_PCIE_S0
1D8V_S0
3D3V_S0
3D3V_S0 3D3V_FCH_VDDIO_S0
3D3V_S0
1D1V_SATA_S01D1V_S0
3D3V_USB_S53D3V_S5
1D1V_S5
1D1V_S5 1D1V_VPPL_SYS_S5
3D3V_S5 3D3V_VDDAN_HW M_S5
3D3V_S5 VDDIO_AZ
3D3V_S0 3D3V_VPPL_SYS_S0
VDDIO_AZ
1D1V_VPPL_SYS_S5
1D1V_S5
3D3V_VDDAN_HW M_S5
3D3V_VPPL_SYS_S0
1D1V_VDDCR_S0 1D1V_S0
3D3V_S5
3D3V_S5
1D1V_S5
1D1V_CKVDD_S0 1D1V_S0
3D3V_USB_S5
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M1 Power(4/6)
A2
20 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M1 Power(4/6)
A2
20 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON-M1 Power(4/6)
A2
20 109Friday, April 22, 2011
<Core Design>
33 ohm 3A
220 ohm 300mA
220 ohm 300mA
33 ohm 3A
220 ohm 3A
220 ohm 300mA
TBD
658mA
567mA
93mA
600mA
43mA
HW Montior Not implemented
or HW Montior balls not used GPIO
=> Decoupled cap not used
HW Montior Not implemented
or HW Montior balls used as GPIO
=> Bead not used
220 ohm 300mA
220 ohm 300mA
If support USB 3.0 or LAN wake-up, tie to 1.1V_S5
otherwise, tie to 1.1V_S0
Codec power use3.3V,VDDIO_AZ have to tied to 3.3V
Codec power use1.5V,VDDIO_AZ have to tied to 1.5V
If use 1.5V_S5 power,have to add LDO for it extra
Del reservaton 1D5V_S5
220 ohm 300mA
131mA
71mA
197mA
62mA
47mA
17mA
5mA
510mA
TBD
32mA
220 ohm 300mA
If support USB 3.0 or LAN wake-up, pls tie to 3.3V_S5
otherwise, tie to 3.3V_S0
113mA
145mA
2mA
63mA
33 ohm 3A
TBD
TBD
TBD
X01
X01
A00
SSID = FCH
1 2
L2012
BLM15AG221SS1D-GP
68.00084.E21
L2012
BLM15AG221SS1D-GP
68.00084.E21
12
C2019
SC1U6D3V2KX-GP
DY
C2019
SC1U6D3V2KX-GP
DY
12
C2042
SC1U6D3V2KX-GP
C2042
SC1U6D3V2KX-GP
12
C2016
SC1U6D3V2KX-GP
C2016
SC1U6D3V2KX-GP
12
C2012
SC2D2U6D3V3KX-GP
C2012
SC2D2U6D3V3KX-GP
12
C2027
SC2D2U6D3V3KX-GP
C2027
SC2D2U6D3V3KX-GP
12
C2053
SCD1U10V2KX-5GP
C2053
SCD1U10V2KX-5GP
12
C2024
SCD1U10V2KX-5GP
C2024
SCD1U10V2KX-5GP
12
C2031
SC1U6D3V2KX-GP
C2031
SC1U6D3V2KX-GP
12
C2054
SC2D2U6D3V3KX-GP
C2054
SC2D2U6D3V3KX-GP
12
C2034
SC1U6D3V2KX-GP
DY
C2034
SC1U6D3V2KX-GP
DY
12
C2039
SCD1U10V2KX-5GP
DY
C2039
SCD1U10V2KX-5GP
DY
1 2
L2010
BLM15AG221SS1D-GP
68.00084.E21
L2010
BLM15AG221SS1D-GP
68.00084.E21
12
C2050
SC2D2U6D3V3KX-GP
C2050
SC2D2U6D3V3KX-GP
12
C2018
SCD1U10V2KX-5GP
C2018
SCD1U10V2KX-5GP
12
C2044
SC10U6D3V5KX-1GP
C2044
SC10U6D3V5KX-1GP
12
C2056
SC2D2U6D3V3KX-GP
C2056
SC2D2U6D3V3KX-GP
12
C2006
SCD1U10V2KX-5GP
DY
C2006
SCD1U10V2KX-5GP
DY
12
C2014
SC1U6D3V2KX-GP
DY
C2014
SC1U6D3V2KX-GP
DY
12
C2004
SCD1U10V2KX-5GP
C2004
SCD1U10V2KX-5GP
12
C2022
SC1U6D3V2KX-GP
C2022
SC1U6D3V2KX-GP
12
C2040
SCD1U10V2KX-5GP
C2040
SCD1U10V2KX-5GP
12
C2005
SC4D7U6D3V5KX-3GP
DY
C2005
SC4D7U6D3V5KX-3GP
DY
1 2
L2008
HCB2012KF-221T30-GP
68.00216.161
2ND = 68.00206.121
L2008
HCB2012KF-221T30-GP
68.00216.161
2ND = 68.00206.121
12
C2008
SCD1U10V2KX-5GP
DY
C2008
SCD1U10V2KX-5GP
DY
1 2
L2005
BLM15AG221SS1D-GP
68.00084.E21
L2005
BLM15AG221SS1D-GP
68.00084.E21
1 2
R2030
0R0402-PAD-2-GP
R2030
0R0402-PAD-2-GP
12
C2032
SC1U6D3V2KX-GP
C2032
SC1U6D3V2KX-GP
12
C2020
SC10U6D3V5KX-1GP
C2020
SC10U6D3V5KX-1GP
12
C2025
SC1U6D3V2KX-GP
DY
C2025
SC1U6D3V2KX-GP
DY
1 2
R2002 0R0402-PADR2002 0R0402-PAD
12
C2007
SCD1U10V2KX-5GP
DY
C2007
SCD1U10V2KX-5GP
DY
12
C2048
SC2D2U6D3V3KX-GP
C2048
SC2D2U6D3V3KX-GP
12
C2003
SCD1U10V2KX-5GP
C2003
SCD1U10V2KX-5GP
1 2
R2005
0R0402-PAD
R2005
0R0402-PAD
12
C2017
SCD1U10V2KX-5GP
C2017
SCD1U10V2KX-5GP
1 2
L2011
BLM15AG221SS1D-GP
68.00084.E21
L2011
BLM15AG221SS1D-GP
68.00084.E21
12
C2030
SCD1U10V2KX-5GP
DY
C2030
SCD1U10V2KX-5GP
DY
1 2
R2004 0R0603-PADR2004 0R0603-PAD
1 2
L2006
PBY160808T-330Y-N-GP
68.00206.141
L2006
PBY160808T-330Y-N-GP
68.00206.141
12
C2038
SC10U6D3V5KX-1GP
C2038
SC10U6D3V5KX-1GP
1 2
L2007
BLM15AG221SS1D-GP
L2007
BLM15AG221SS1D-GP
12
C2009
SC1U6D3V2KX-GP
C2009
SC1U6D3V2KX-GP
12
C2035
SCD1U10V2KX-5GP
C2035
SCD1U10V2KX-5GP
12
C2041
SC1U6D3V2KX-GP
DY
C2041
SC1U6D3V2KX-GP
DY
VDDAN_11_USB_S
D11 VDDAN_11_USB_S
C11
VDDAN_33_USB_S
E19 VDDAN_33_USB_S
D20 VDDAN_33_USB_S
D19 VDDAN_33_USB_S
D18 VDDAN_33_USB_S
C20 VDDAN_33_USB_S
C18 VDDAN_33_USB_S
B20 VDDAN_33_USB_S
B19 VDDAN_33_USB_S
B18 VDDAN_33_USB_S
A20 VDDAN_33_USB_S
A19 VDDAN_33_USB_S
A18
VDDAN_11_SATA
AE16 VDDAN_11_SATA
AD18 VDDAN_11_SATA
AE18 VDDAN_11_SATA
AG19 VDDAN_11_SATA
AH20 VDDAN_11_SATA
AF18 VDDAN_11_SATA
AJ20
VDDPL_33_SATA
AD14
VDDAN_11_PCIE
W26 VDDAN_11_PCIE
W22 VDDAN_11_PCIE
V29 VDDAN_11_PCIE
V28 VDDAN_11_PCIE
V27 VDDAN_11_PCIE
V26 VDDAN_11_PCIE
V22 VDDAN_11_PCIE
U26
VDDPL_33_PCIE
AE28
VDDIO_18_FC
AC22 VDDIO_18_FC
AF24 VDDIO_18_FC
AE25 VDDIO_18_FC
AF22
VDDIO_33_PCIGP
AA19 VDDIO_33_PCIGP
AF7 VDDIO_33_PCIGP
AA9 VDDIO_33_PCIGP
AA7 VDDIO_33_PCIGP
AC8 VDDIO_33_PCIGP
AB4 VDDIO_33_PCIGP
AA2 VDDIO_33_PCIGP
AC21 VDDIO_33_PCIGP
AE5 VDDIO_33_PCIGP
Y19 VDDIO_33_PCIGP
V6 VDDIO_33_PCIGP
AH1
VDDXL_33_S L20
VDDAN_33_HWM_S D6
VDDPL_33_USB_S F19
VDDPL_11_SYS_S L22
VDDPL_33_SYS M21
VDDCR_11_USB_S B11
VDDCR_11_USB_S A11
VDDIO_AZ_S M8
VDDCR_11_S G26
VDDCR_11_S F26
VDDIO_33_S T8
VDDIO_33_S T6
VDDIO_33_S J9
VDDIO_33_S L10
VDDIO_33_S K10
VDDIO_33_S B21
VDDIO_33_S D21
VDDIO_33_S A21
VDDIO_GBE_S P8
VDDIO_GBE_S M6
VDDCR_11_GBE_S L9
VDDCR_11_GBE_S L7
VDDIO_33_GBE_S M10
VDDRF_GBE_S V1
VDDAN_11_CLK J22
VDDAN_11_CLK K21
VDDAN_11_CLK J20
VDDAN_11_CLK J21
VDDAN_11_CLK K26
VDDAN_11_CLK J28
VDDAN_11_CLK K29
VDDAN_11_CLK K28
VDDCR_11 W18
VDDCR_11 W12
VDDCR_11 V18
VDDCR_11 V12
VDDCR_11 U17
VDDCR_11 U13
VDDCR_11 N17
VDDCR_11 R15
VDDCR_11 N13
HUDSON-1
PCI/GPIO I/O
PCI EXPRESS
GBE LAN
FLASH I/O
CORE S5
CORE S0
CLKGEN I/O
3.3V_S5 I/O
SERIAL ATA
POWER
PLL
USB I/O
3 OF 5
FCH1C
HUDSON-M1-1-GP
HUDSON-1
PCI/GPIO I/O
PCI EXPRESS
GBE LAN
FLASH I/O
CORE S5
CORE S0
CLKGEN I/O
3.3V_S5 I/O
SERIAL ATA
POWER
PLL
USB I/O
3 OF 5
FCH1C
HUDSON-M1-1-GP
12
C2052
SC2D2U6D3V3KX-GP
C2052
SC2D2U6D3V3KX-GP
12
C2023
SCD1U10V2KX-5GP
C2023
SCD1U10V2KX-5GP
1 2
L2009
BLM15AG221SS1D-GP
68.00084.E21
L2009
BLM15AG221SS1D-GP
68.00084.E21
1 2
L2004
PBY160808T-330Y-N-GP
68.00206.141
L2004
PBY160808T-330Y-N-GP
68.00206.141
1 2
L2002
BLM15AG221SS1D-GP
68.00084.E21
L2002
BLM15AG221SS1D-GP
68.00084.E21
12
C2045
SCD1U10V2KX-5GP
C2045
SCD1U10V2KX-5GP
12
C2010
SC10U6D3V5KX-1GP
C2010
SC10U6D3V5KX-1GP
12
C2033
SC10U6D3V5KX-1GP
C2033
SC10U6D3V5KX-1GP
12
C2028
SC2D2U6D3V3KX-GP
C2028
SC2D2U6D3V3KX-GP
12
C2051
SCD1U10V2KX-5GP
C2051
SCD1U10V2KX-5GP
12
C2055
SCD1U10V2KX-5GP
C2055
SCD1U10V2KX-5GP
12
C2001
SCD1U10V2KX-5GP
C2001
SCD1U10V2KX-5GP
12
C2002
SC4D7U6D3V5KX-3GP
C2002
SC4D7U6D3V5KX-3GP
12
C2015
SCD1U10V2KX-5GP
DY
C2015
SCD1U10V2KX-5GP
DY
12
C2047
SC2D2U6D3V3KX-GP
C2047
SC2D2U6D3V3KX-GP
1 2
R2006 0R0402-PADR2006 0R0402-PAD
12
C2043
SC10U6D3V5KX-1GP
DY
C2043
SC10U6D3V5KX-1GP
DY
12
C2021
SC10U6D3V5KX-1GP
C2021
SC10U6D3V5KX-1GP
12
C2013
SCD1U10V2KX-5GP
DY
C2013
SCD1U10V2KX-5GP
DY
12
C2029
SC2D2U6D3V3KX-GP
C2029
SC2D2U6D3V3KX-GP
12
C2036
SCD1U10V2KX-5GP
C2036
SCD1U10V2KX-5GP
1 2
R2001 0R0402-PADR2001 0R0402-PAD
12
C2037
SC1U6D3V2KX-GP
DY
C2037
SC1U6D3V2KX-GP
DY
12
C2026
SCD1U10V2KX-5GP
DY
C2026
SCD1U10V2KX-5GP
DY
1 2
L2001
BLM15AG221SS1D-GP
68.00084.E21
L2001
BLM15AG221SS1D-GP
68.00084.E21
1 2
R2003
0R2J-2-GP
DY
R2003
0R2J-2-GP
DY
1 2
L2003
PBY160808T-330Y-N-GP
68.00206.141
L2003
PBY160808T-330Y-N-GP
68.00206.141
12
C2011
SCD1U10V2KX-5GP
C2011
SCD1U10V2KX-5GP
12
C2046
SCD1U10V2KX-5GP
DY
C2046
SCD1U10V2KX-5GP
DY
12
C2049
SCD1U10V2KX-5GP
C2049
SCD1U10V2KX-5GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3D3V_S0 3D3V_S5VDDIO_AZ
PCI_AD25 17
PCI_AD24 17
PCI_AD23 17
PCI_AD27 17
PCI_AD26 17
PCI_CLK117 CLK_PCI_LPC17,71 PCI_CLK417
LPC_CLK017,27
EC_PWM218
LPC_CLK117
HDA_SDOUT18
EC_PWM318
PCI_CLK217
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON_STRAPPING_(5/6)
A3
21 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON_STRAPPING_(5/6)
A3
21 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HUDSON_STRAPPING_(5/6)
A3
21 109Friday, April 22, 2011
<Core Design>
PCI_AD25 PCI_AD23
Note: FCH has 15K internal PU FOR PCI_AD[27:23]
Enable ILA
AUTORUN
USE DEFAULT
PCIE STRAPS
USE EEPROM
PCIE STRAPS
PCI_AD24
BYPASS FC
PLL
USE PCI
PLL USE FC
PLL
Disable ILA
AUTORUN
PCI_AD26PCI_AD27
BYPASS
PCI PLL
PULL
HIGH
PULL
LOW
(DEFAULT)(DEFAULT)(DEFAULT)(DEFAULT)(DEFAULT)
Enable PCI
MEM BOOT
Disable PCI
MEM BOOT
DEBUG STRAPS
SSID = FCH
REQUIRED SYSTEM STRAPS
REQUIRED STRAPS
0816
TYPE
ENABLED
SPI ROM
Reserved
EC_PWM3EC_PWM2
2.2-kohm 5% pull-down
Not connected.
LPC ROM
Reserved
2.2-kohm 5% pull-down
2.2-kohm 5% pull-down
2.2-kohm 5% pull-down Not connected.
Not connected.Not connected.
Note: EC_PWM2, EC_PWM3 default have internal 10kohm PU.
Disable boot
fail timer
function
Enable
boot timer
function
LPC_CLK2
DEFAULT
PERFORMANCE
MODE
LOW POWER
MODE
AZ_SDOUT
DEFAULT
PULL
LOW
DEFAULT
LPC_CLK0
CLKGEN
ENABLED
LPC_CLK1
PULL
HIGH
USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
DEFAULT
DISABLE EC
ENABLE EC
CLKGEN
DISABLED
non_Fusion
CLOCK mode
(Use Internal)
(Use External)
CLK_PCI_LPC PCI_CLK4
DEFAULT
Allow
PCIE GEN2
PCI_CLK1
Fusion
CLOCK mode
DEFAULT
Force
PCIE GEN1
DEFAULT
12
R21162K2R2J-2-GP
DY
R21162K2R2J-2-GP
DY
12
R2106
10KR2J-3-GP
DY
R2106
10KR2J-3-GP
DY
12
R210310KR2J-3-GP R210310KR2J-3-GP
12
R2113
10KR2J-3-GP
DY
R2113
10KR2J-3-GP
DY
12
R2104
10KR2J-3-GP
DY
R2104
10KR2J-3-GP
DY
12
R2121
10KR2J-3-GP R2121
10KR2J-3-GP
12
R2114
2K2R2F-GP
DY
R2114
2K2R2F-GP
DY
12
R2102
10KR2J-3-GP
DY
R2102
10KR2J-3-GP
DY
12
R2110
10KR2J-3-GP R2110
10KR2J-3-GP
12
R2111
10KR2J-3-GP R2111
10KR2J-3-GP
12
R2109
10KR2J-3-GP
DY
R2109
10KR2J-3-GP
DY
12
R2105
10KR2J-3-GP
DY
R2105
10KR2J-3-GP
DY
12
R21012K2R2J-2-GP
DY
R21012K2R2J-2-GP
DY
12
R21182K2R2J-2-GP
DY
R21182K2R2J-2-GP
DY
12
R21172K2R2J-2-GP
DY
R21172K2R2J-2-GP
DY
12
R210710KR2J-3-GP R210710KR2J-3-GP
12
R2108
10KR2J-3-GP
R2108
10KR2J-3-GP
12
R2120
10KR2J-3-GP
DY
R2120
10KR2J-3-GP
DY
12
R21152K2R2J-2-GP
DY
R21152K2R2J-2-GP
DY
12
R2112
10KR2J-3-GP
R2112
10KR2J-3-GP
12
R2119
2K2R2F-GP
R2119
2K2R2F-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
22 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
22 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
22 109Friday, April 22, 2011
<Core Design>
SSID = FCH
VSSIO_PCIECLK
J23 VSSIO_PCIECLK
V20 VSSIO_PCIECLK
T24 VSSIO_PCIECLK
T22 VSSIO_PCIECLK
T20 VSSIO_PCIECLK
P26 VSSIO_PCIECLK
P24 VSSIO_PCIECLK
P22 VSSIO_PCIECLK
M26 VSSIO_PCIECLK
M24 VSSIO_PCIECLK
M22 VSSIO_PCIECLK
P20 VSSIO_PCIECLK
P21
VSSXL
M19
VSSAN_HWM
D8
EFUSE
Y4
VSSIO_USB
H19 VSSIO_USB
K18 VSSIO_USB
K16 VSSIO_USB
K14 VSSIO_USB
K12 VSSIO_USB
J19 VSSIO_USB
J11 VSSIO_USB
H18 VSSIO_USB
H16 VSSIO_USB
H14 VSSIO_USB
H12 VSSIO_USB
D9 VSSIO_USB
F18 VSSIO_USB
G11 VSSIO_USB
C9 VSSIO_USB
F16 VSSIO_USB
F14 VSSIO_USB
F12 VSSIO_USB
F9 VSSIO_USB
E9 VSSIO_USB
D17 VSSIO_USB
D14 VSSIO_USB
D12 VSSIO_USB
D10 VSSIO_USB
B9 VSSIO_USB
K11 VSSIO_USB
B10 VSSIO_USB
A9
VSSIO_SATA
AJ16 VSSIO_SATA
AJ13 VSSIO_SATA
AJ11 VSSIO_SATA
AJ7 VSSIO_SATA
AH16 VSSIO_SATA
AH13 VSSIO_SATA
AH11 VSSIO_SATA
AH7 VSSIO_SATA
AG8 VSSIO_SATA
AF16 VSSIO_SATA
AF13 VSSIO_SATA
AF11 VSSIO_SATA
AF9 VSSIO_SATA
AE14 VSSIO_SATA
AE12 VSSIO_SATA
AC14 VSSIO_SATA
AB16 VSSIO_SATA
Y16 VSSIO_SATA
Y14
VSSIO_PCIECLK K20
VSSIO_PCIECLK L21
VSSIO_PCIECLK AE26
VSSIO_PCIECLK W20
VSSIO_PCIECLK W21
VSSIO_PCIECLK Y20
VSSIO_PCIECLK AC26
VSSIO_PCIECLK AA26
VSSIO_PCIECLK AD23
VSSIO_PCIECLK AB23
VSSIO_PCIECLK AA23
VSSIO_PCIECLK AA21
VSSIO_PCIECLK H26
VSSIO_PCIECLK H23
VSSPL_SYS M20
VSS L8
VSS L4
VSS N4
VSS P6
VSS V10
VSS AH29
VSS H7
VSS AF25
VSS M12
VSS G9
VSS G8
VSS J4
VSS G4
VSS AA12
VSS AA11
VSS Y11
VSS Y12
VSS Y10
VSS Y18
VSS U4
VSS B29
VSS AJ28
VSS W10
VSS W9
VSS V8
VSS AC9
VSS AB7
VSS AD4
VSS AD6
VSS V4
VSS P3
VSS J7
VSS L18
VSS L12
VSS M11
VSS V19
VSS M18
VSS U15
VSS V11
VSS P10
VSS T10
VSS R17
VSS R13
VSS N15
VSS F24
VSS E6
VSS E25
VSS D23
VSS E5
VSS A2
VSS A28
VSS AJ2
HUDSON-1
5 OF 5
GROUND
FCH1E
HUDSON-M1-1-GP
HUDSON-1
5 OF 5
GROUND
FCH1E
HUDSON-M1-1-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
23 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
23 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
23 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
24 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
24 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
24 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
25 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
25 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
25 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
26 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
26 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
26 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FAN_TACH1
E51_RxD
BAT_SCL
BAT_SDA
AC_IN#_KBC
BAT_IN#
S5_ENABLE
PCB_VER_AD
ECRST#
ECSW I#_KBC
KCOL0
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KROW0
KROW1
KCOL1
KROW2
KCOL2
KROW3
KCOL3
KCOL4
KROW4
KROW5
KCOL5
KCOL6
KROW6
KROW7
KCOL7
KCOL8
KBC_ON#_R
RTC_POW ER
KBC_ON#
PSL_IN2
AC_IN#_KBC
EC_AGND
VBAT
PROCHOT_EC
3D3V_AUX_KBC_VCC
ECSMI#_KBC
KB_DET#
KBC_ON#
PSL_OUT
RTC_POW ER
AC_IN#_KBC
KBC_ON#_R
PSL_IN1
KBC_ON#_RKBC_ON#
EC_ENABLE#_1
PSL_IN1
RTC_POW ER
PSL_IN1
PSL_OUT
PSL_IN1
ECSMI#_KBC
PSL_IN2
VCORF
VBKUP
PCB_VER_AD
EC_SPI_DI_R
EC_SPI_CS#_R
PROCHOT_EC
EC_ENABLE#_1
EC_SPI_DO_R
EC_SPI_CLK_R
EC_GPIO10
ECSCI#_KBC
ECSW I#_KBC
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
PLT_RST#_EC
ECRST#
BLUETOOTH_EN
L_BKLT_EN
AC_OK
SERIES_ID
SERIES_ID
VGA_THRM
SYS_THRM
CPU_THRM
S5_ENABLE
KBC_ON#_GATE
ECRST#
EC_ENABLE#_1
MODEL_ID_DET
MODEL_ID_DET
H_PROCHOT#_EC
ECSCI#_KBC
3D3V_AUX_KBC
3D3V_S0
3D3V_AUX_S5 3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_AUX_KBC3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_AUX_KBC
3D3V_S0
3D3V_AUX_KBC
EC_AGND
3D3V_AUX_KBC 3D3V_AUX_KBC
EC_AGND
EC_AGND
3D3V_AUX_KBC
EC_AGND
3D3V_AUX_KBC
EC_AGND
EC_AGND
RTC_AUX_S5
KCOL[0..16] 69
KROW[0..7] 69
USB_PWR_EN#61
RCID38
S5_ENABLE36
FAN1_DAC28
LID_CLOSE#70,82
PM_SLP_S5#18,44
PSID_EC38
AD_IA40
VGA_THRM28 SYS_THRM28
RSMRST#_KBC18
LCD_TST49
BAT_IN#39
WIFI_RF_EN65 BLUETOOTH_EN65
CPU_THRM28
1D1V_S5_PWRGD36,46
BATT_WHITE_LED#68
INT_SERIRQ 17
PM_CLKRUN# 17
L_BKLT_EN 6
PM_LAN_ENABLE 31
A_RST# 17,36
H_A20GATE 18
EC_SPI_CLK 60
EC_SPI_DO 60
EC_SPI_DI 60
EC_SPI_CS# 60
H_RCIN# 18
BAT_SDA 39,40
BAT_SCL 39,40
LPC_AD3 17,71
SML1_DATA 6,85
SML1_CLK 6,85
LPC_AD2 17,71
LPC_AD1 17,71
LPC_AD0 17,71
BLON_OUT 49
LPC_CLK0 17,21
KB_DET# 69
LCD_TST_EN 49
LPC_FRAME# 17,71
TPDATA 69
TPCLK 69
PM_SLP_S3#18,36,44,46,47
PWRLED#68
FAN_TACH128 PM_PWRBTN#18
E51_RxD65 E51_TxD65
CHG_AMBER_LED#68 KBC_BEEP29
AMP_MUTE#29
PCH_SUSCLK_KBC17
EC_SW I#18
EC_SCI#18
H_PROCHOT# 6,40
PURE_HW _SHUTDOWN#28,36,85
PWR_CHG_ACOK40
AC_IN# 40
KBC_PWRBTN#68
EC_SMI#18
EC_SPI_WP#60
PCIE_WAKE#18,31
AD_IA_HW40
PCH_WAKE# 18
IMVP_PWRGD36
WLAN_LED#68
AD_IA_HW2 40
PCIE_RST#85
CAP_LED#69
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
KBC Nuvoton NPCE795PA0DX
A2
27 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
KBC Nuvoton NPCE795PA0DX
A2
27 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
KBC Nuvoton NPCE795PA0DX
A2
27 109Friday, April 22, 2011
<Core Design>
EC GPIO standard PH/PL
Reserved
47.0K
1.65VReserved
64.9K
76.8
SSID = KBC
100.0K
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR
EC_GPIO47 High Active
PULL-HIGH RESISTOR VOLTAGE
100.0KSA
0702 Modify:
Rename EC_GPIO70 to PSL_IN1
SB
3.0V
2.75V
SC
100.0K
2.48V
A00
100.0K
100.0K
100.0K
100.0K
100.0K
10.0K
2.24V
Reserved
20.0K
2.0V
0702 Modify:
Rename EC_GPIO71 to PSL_OUT
33.0K
1.87V
PSL SOLUTION
PSL_IN1
PSL_OUT
10mW SOLUTION
VBACKUP
0630 Modify:
Removed LID_CLOSE#
PH 10K on RN2705.
<------AMD Dont Have BL Keyboard
<------ CPU -Temp / eDP(Reserved)
<------ BATTERY / CHARGER
NOTE:
Connect GND and AGND planes via either
0R resistor or one point layout connection.
NOTE:
Locate resistors R2719 and R2722 close
to the NPCE791L.
<------ TP
0729 Add from page94 to here
MODEL_ID_DET(GPIO07)
100.0K 143.0K
174.0K
1.358V
1.65V
47.0K
100.0K
100.0K
76.8K
64.9K
100.0K
VOLTAGEPULL-HIGH RESISTORPULL-LOW RESISTOR
DV14_DIS
2.75V
3.0V
2.48V
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
2.0V
20.0K
2.24V
10.0K
215.0K100.0K
Reserved
1.204V
1.87V
33.0K
1.048V
Reserved
DV15_UMA
Reserved
Reserved
Reserved
0804 Add short pad separate
0810 Add
0816
0816
0817 Vendorrecommand Add 10 nF-0.1uF close to pin
0817
0817
20100906 X01 Modify:
Add C2722 0.1uF between Q2703 G&S pin for
fixed leakage voltage to 3D3V_AUX_KBC under
DC mode.
20100917 X01:
Add Q2706 2N7002 to avoid leakage loop from
3D3V_S5 to 3D3V_AUX_KBC issue when 10mW
latched fail timing. Un-stuff C2713 to follow the standard schematics.
X01
X01
X01
X01
X01
X01
X01
X01
X01
84.2N702.J31
2nd = 84.07002.I31
84.2N702.J31
2nd = 84.07002.I31
84.2N702.J31
2nd = 84.07002.I31
X01
X01
X01
Reserved
Reserved
Reserved
X02
X02
A00
1 2
R2734 0R2J-2-GP
10mW
R2734 0R2J-2-GP
10mW
12
R2727
100KR2J-1-GP
Vostro
R2727
100KR2J-1-GP
Vostro
1 2
C2721 SCD1U10V2KX-5GP
DY
C2721 SCD1U10V2KX-5GP
DY
12
R2732
100KR2J-1-GP
DY
R2732
100KR2J-1-GP
DY
1
2
3
D2705
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
DY
D2705
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
DY
G
S
D
Q2706
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
DY
Q2706
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
DY
12
C2706
SCD1U10V2KX-5GP
C2706
SCD1U10V2KX-5GP
1 2
R2709 10KR2J-3-GPR2709 10KR2J-3-GP
12
R2769
100KR2J-1-GP
DY
R2769
100KR2J-1-GP
DY
1
23
4
RN2703
SRN100KJ-6-GP
RN2703
SRN100KJ-6-GP
1 2
R2702 0R0603-PADR2702 0R0603-PAD
12
C2701
SC2D2U10V3KX-1GP
C2701
SC2D2U10V3KX-1GP
1 2
C2722
SCD1U10V2KX-5GP
C2722
SCD1U10V2KX-5GP
12
R2711
0R0402-PAD
R2711
0R0402-PAD
12
33R2J-2-GPR2719 33R2J-2-GPR2719
12
C2703
SC2D2U10V3KX-1GP
C2703
SC2D2U10V3KX-1GP
12
C2704
SCD1U10V2KX-5GP
C2704
SCD1U10V2KX-5GP
1 2
R27810R0402-PAD R27810R0402-PAD
1
TP2701 TPAD14TP2701 TPAD14
12
R2737 0R0402-PADR2737 0R0402-PAD
12
C2707
SCD1U10V2KX-5GP
C2707
SCD1U10V2KX-5GP
1 2
R2766 0R2J-2-GP
10mW
R2766 0R2J-2-GP
10mW
1 2
R2763 0R2J-2-GP
10mW
R2763 0R2J-2-GP
10mW
1 2
R2780 0R0402-PADR2780 0R0402-PAD
12
R2778 0R0402-PAD
PSL
R2778 0R0402-PAD
PSL
1
23
4
RN2706
SRN10KJ-5-GP
RN2706
SRN10KJ-5-GP
1 2
R2708 10KR2J-3-GP
DY
R2708 10KR2J-3-GP
DY
12
R2726
100KR2F-L1-GP
R2726
100KR2F-L1-GP
1 2
C2720 SCD1U10V2KX-5GP
DY
C2720 SCD1U10V2KX-5GP
DY
12
R2728
100KR2J-1-GP
Inspiron
R2728
100KR2J-1-GP
Inspiron
VREF
104
GPIO90/AD0
97
GPIO91/AD1
98
GPIO92/AD2
99
GPIO93/AD3
100
GPIO94/DA0
101
GPIO95/DA1
105
GPIO96/DA2
106
GPIO2
79
GPIO3/AD6
95
GPIO4/AD5
96
GPIO5/AD4
108
PSL_IN2#_GPIO6
93
GPIO7/AD7
94
GPIO16
114
GPIO24
6
GPIO30
109
GPIO34/CIRRXL
14
GPIO41
80
GPIO42/TCK
17
GPIO43/TMS
20
GPIO44/TDI
21
GPIO46/CIRRXM/TRST#
23
GPIO51
26
PSL_IN1_GPIO70
73
PSL_OUT_GPIO71
74
VBKUP
75
GPIO75
82
GPO76/SHBM
83
GPIO77
84
GPIO81
91
GPO82/IOX_LDSH/TEST#
110
GPIO84/IOX_SCLK/XORTR#
112
GPIO97
107
GPIO36
15
VCORF
44
GND
18
GND
45
GND
78
GND
89
GND
116
GND
5
AGND
103
GPIO11/CLKRUN# 8
LAD3 1
LAD2 128
LAD1 127
LAD0 126
LFRAME# 3
LCLK 2
LRESET# 7
SERIRQ 125
GPIO85/GA20 121
KBRST#/GPIO86 122
ECSCI#/GPIO54 29
GPIO65/SMI# 9
GPIO10/LPCPD# 124
GPIO67/PWUREQ# 123
GPIO37/PSCLK1 72
GPIO26/PSCLK2 10
GPIO35/PSDAT1 71
GPIO27/PSDAT2 11
GPIO50/PSCLK3/TDO 25
GPIO52/PSDAT3/RDY# 27
GPIO17/SCL1 70
GPIO73/SCL2 67
GPIO23/SCL3 119
GPIO22/SDA1 69
GPIO74/SDA2 68
GPIO31/SDA3 120
GPIO47/SCL4 24
GPIO53/SDA4 28
F_SDI/F_SDIO1 86
F_SDIO/F_SDIO0 87
F_SCK 92
F_CS0# 90
VCC 19
VCC 46
VCC 76
VCC 88
VCC 115
AVCC 102
VDD 4
1 OF 2
U2701A
NPCE795PA0DX-GP-U
1 OF 2
U2701A
NPCE795PA0DX-GP-U
12
R2733
0R0402-PAD
R2733
0R0402-PAD
1 2
R2712
10KR2J-3-GP
R2712
10KR2J-3-GP
12
R2756
0R0402-PAD
PSL
R2756
0R0402-PAD
PSL
12
R2722 33R2J-2-GPR2722 33R2J-2-GP
1
23
4
RN2705
SRN10KJ-5-GP
DY
RN2705
SRN10KJ-5-GP
DY
GPIO56/TA1
31
GPIO20/TA2
117
GPIO14/TB1
63
GPIO01/TB2
64
GPIO15/A_PWM
32
GPIO21/B_PWM
118
GPIO13/C_PWM
62
GPIO32/D_PWM
65
GPIO66/G_PWM
81
GPIO33/H_PWM
66
GPIO45/E_PWM
22
GPIO40/F_PWM
16
VCC_POR#
85
GPIO83/SOUT_CR/TRIST#
111 GPIO87/CIRRXM/SIN_CR
113
GPIO00/EXTCLK
77 GPIO55/CLKOUT/IOX_DIN_DIO
30
PECI
13
VTT
12
KBSOUT0/JENK# 53
KBSOUT1/TCK 52
KBSOUT2/TMS 51
KBSOUT3/TDI 50
KBSOUT4/JEN0# 49
KBSOUT5/TDO 48
KBSOUT6/RDY# 47
KBSOUT7 43
KBSOUT8 42
KBSOUT9/SDP_VIS# 41
KBSOUT10/P80_CLK 40
KBSOUT11/P80_DAT 39
KBSOUT12/GPIO64 38
KBSOUT13/GPIO63 37
KBSOUT14/GPIO62 36
KBSOUT15/GPIO61/XOR_OUT 35
GPIO60/KBSOUT16 34
GPIO57/KBSOUT17 33
KBSIN0 54
KBSIN1 55
KBSIN2 56
KBSIN3 57
KBSIN4 58
KBSIN5 59
KBSIN6 60
KBSIN7 61
2 OF 2
U2701B
NPCE795PA0DX-GP-U
2 OF 2
U2701B
NPCE795PA0DX-GP-U
1 2
R2770
100KR2J-1-GP
R2770
100KR2J-1-GP
1
2
3
D2701
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
DY
D2701
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
DY
12
R2773
100KR2J-1-GP
R2773
100KR2J-1-GP
12
R2768
0R0402-PAD
PSL
R2768
0R0402-PAD
PSL
12
C2715
SC1U6D3V2KX-GP
DY
C2715
SC1U6D3V2KX-GP
DY
12
R2735
0R0402-PAD R2735
0R0402-PAD
1 2
R2771
2D2R3-1-U-GP
R2771
2D2R3-1-U-GP
12
33R2J-2-GPR2736 33R2J-2-GPR2736
1 2
C2711 SC220P50V2KX-3GP
DY
C2711 SC220P50V2KX-3GP
DY
12
C2712
SC1U10V3ZY-6GP
C2712
SC1U10V3ZY-6GP
1 2
R2774
100KR2J-1-GP
R2774
100KR2J-1-GP
G
S
D
Q2705
2N7002K-2-GP
PSL
Q2705
2N7002K-2-GP
PSL
3
1
2
Q2701
PMBS3906-GP
Q2701
PMBS3906-GP
1 2
R2767 0R2J-2-GP
DY
R2767 0R2J-2-GP
DY
12
C2705
SCD1U10V2KX-5GP
DY
C2705
SCD1U10V2KX-5GP
DY
12
R2739
100KR2F-L1-GP
R2739
100KR2F-L1-GP
1 2
C2718
SCD1U10V2KX-5GP
C2718
SCD1U10V2KX-5GP
1 2
C2719 SCD1U10V2KX-5GP
DY
C2719 SCD1U10V2KX-5GP
DY
12
C2708
SCD1U10V2KX-5GP
C2708
SCD1U10V2KX-5GP
1 2
R2713 10KR2J-3-GPR2713 10KR2J-3-GP
G
S
D
Q2704
2N7002K-2-GP
10mW
Q2704
2N7002K-2-GP
10mW
12
C2710
SCD1U10V2KX-5GP
C2710
SCD1U10V2KX-5GP
1
2
3
D2703
BAT54CPT-GP
2ND = 83.00054.Q81
83.R2003.E81
10mW
D2703
BAT54CPT-GP
2ND = 83.00054.Q81
83.R2003.E81
10mW
S
D
G
G
D
Q2703
DMP2130L-7-GP
2ND = 84.03413.A31
84.02130.031
G
D
Q2703
DMP2130L-7-GP
2ND = 84.03413.A31
84.02130.031
12
R2705
10KR2J-3-GP
R2705
10KR2J-3-GP
1 2
R27830R0402-PAD R27830R0402-PAD
12
C2702
SCD1U10V2KX-5GP
C2702
SCD1U10V2KX-5GP
12
C2713
SCD1U10V2KX-5GP
DY
C2713
SCD1U10V2KX-5GP
DY
G
S
D
Q2702
2N7002K-2-GP
DY
Q2702
2N7002K-2-GP
DY
1 2
R2775
0R0402-PAD
R2775
0R0402-PAD
1 2
C2714 SCD1U10V2KX-5GP
DY
C2714 SCD1U10V2KX-5GP
DY
1 2
R2704
330KR2J-L1-GP
R2704
330KR2J-L1-GP
1 2
R2710
10KR2F-2-GP
MODELID
R2710
10KR2F-2-GP
MODELID
1
2
3
D2704
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
DY
D2704
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
DY
1
23
4
RN2701
SRN4K7J-8-GP
RN2701
SRN4K7J-8-GP
12
R2772 0R0402-PADR2772 0R0402-PAD
12
R2724
47KR2F-GP
R2724
47KR2F-GP
1
2
3
D2702
BAT54CPT-GP
2ND = 83.00054.Q81
83.R2003.E81
10mW
D2702
BAT54CPT-GP
2ND = 83.00054.Q81
83.R2003.E81
10mW
1 2
R27820R0402-PAD R27820R0402-PAD
12
C2709
SC2D2U10V3KX-1GP
C2709
SC2D2U10V3KX-1GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FAN_VCC
P2800_DXP
3D3V_S0_thermal
3D3V_S0_thermal
T8_P2800
THERM_SYS_SHDN#
ADJ
P2800_DXN
ADJ
FAN_VCC
FAN_VCC
P2800_VGA_DXP
3D3V_VGA_S0_thermal
3D3V_VGA_S0_thermal
P2800_VGA_DXN
FAN_VCC
FAN_TACH1_C
THERM_SYS_SHDN# T8_G709
ADJ_G709
THERM_SYS_SHDN#
3D3V_S0
3D3V_AUX_S5
5V_S0
5V_S0
3D3V_S0
3D3V_AUX_KBC
3D3V_S0
5V_S0
3D3V_S0
3D3V_S0
3D3V_S0
PURE_HW_SHUTDOWN#27,36,85
CPU_THRM 27
SYS_THRM 27
FAN1_DAC27
VGA_THRM 27
P2800_VGA_DXP85
P2800_VGA_DXN85
FAN_TACH127
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Thermal/Fan Controllor EMC2102
A3
28 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Thermal/Fan Controllor EMC2102
A3
28 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Thermal/Fan Controllor EMC2102
A3
28 109Friday, April 22, 2011
<Core Design>
Layout notice :
Both DXN and DXP routing 10 mil
trace width and 10 mil spacing.
1.H/W T8 Shutdown
2.System Sensor, Put on palm rest
Fan controller P2793
*Layout* 15 mil
Layout notice :
Both DXN and DXP routing 10 mil
trace width and 10 mil spacing.
VGA Thermal sensor P2800
20.D0210.103
0721 Pull-down: full speed, R2830 dummy.
0806 Rename
0806 Rename
0809 Vendor review and pop
X01
X01
11/4 Vendor recommand
R(KΩ)= 0.0012*T^2- 0.9308T+ 96.147
86.9 ℃
℃℃
℃
X01
84.2N702.J31
2nd = 84.07002.I31
ADJ floating : OTZ shutdown temperature=85°C
ADJ pull-down : OTZ shutdown temperature=90°C
ADJ pull-up : OTZ shutdown temperature=95°C
74.02800.B71
74.02800.B71
X02
X02
X02
X02
X02
SSID = Thermal
VCC
5
DXP
6
DXN
7
OTZ
8GND 2
ADJ 1
TDL 3
TDR 4
U2803
P2800EB0-GP
DY
U2803
P2800EB0-GP
DY
FON#
1
VIN
2
VOUT
3
VSET
4GND 5
GND 6
GND 7
GND 8
U2802
P2793AB0-GP
U2802
P2793AB0-GP
1
AFTP2802
AFTE14P-GP
AFTP2802
AFTE14P-GP
1
2
3
D2801
BAT54PT-GP
2ND = 83.BAT54.D81
83.00054.T81
DY
3rd = 83.BAT54.S81
D2801
BAT54PT-GP
2ND = 83.BAT54.D81
83.00054.T81
DY
3rd = 83.BAT54.S81
1 2
R2832
0R2J-2-GP
DY
R2832
0R2J-2-GP
DY
1 2
R2810 0R0402-PADR2810 0R0402-PAD
1 2
R2829
0R0402-PAD
R2829
0R0402-PAD
12
R2831
100KR2J-1-GP
R2831
100KR2J-1-GP
1 2
R2819
0R2J-2-GP
DY
R2819
0R2J-2-GP
DY
SET
1
GND
2
OUT#
3HYST 4
VCC 5
U2805
G709T1UF-GP
DY
U2805
G709T1UF-GP
DY
12
R2812
24K3R2F-1-GP
DY
R2812
24K3R2F-1-GP
DY
12
C2832
SCD1U10V2KX-5GP
C2832
SCD1U10V2KX-5GP
12
C2808
SCD1U10V2KX-5GP
DY
C2808
SCD1U10V2KX-5GP
DY
1 2
R2828
0R0402-PAD
R2828
0R0402-PAD
12
C2811
SCD1U10V2KX-5GP
DY
C2811
SCD1U10V2KX-5GP
DY
12
C2828
SC2200P50V2KX-2GP
C2828
SC2200P50V2KX-2GP
1
AFTP2803
AFTE14P-GP
AFTP2803
AFTE14P-GP
G
S
D
Q2805
2N7002K-2-GP
Q2805
2N7002K-2-GP
12
C2827
SCD1U10V2KX-5GP
C2827
SCD1U10V2KX-5GP
1 2
R2811 0R2J-2-GP
DY
R2811 0R2J-2-GP
DY
12
C2814
SCD1U10V2KX-5GP
DY
C2814
SCD1U10V2KX-5GP
DY
1 2
R2830
0R2J-2-GP
DY
R2830
0R2J-2-GP
DY
21
D2802
CH551H-30PT-GP
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
83.R5003.C8F
DY
D2802
CH551H-30PT-GP
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
83.R5003.C8F
DY
12
C2816
SC4D7U6D3V3KX-GP
DY
C2816
SC4D7U6D3V3KX-GP
DY
12
R2818
10KR2J-3-GP
DY
R2818
10KR2J-3-GP
DY
1 2
R2813 470KR2J-2-GP
DY
R2813 470KR2J-2-GP
DY
4
1
2
3
5
FAN1
FOX-CON3-6-GP-U
FAN1
FOX-CON3-6-GP-U
1 2
R2823 0R0402-PAD
R2823 0R0402-PAD
12
C2815
SCD1U16V2KX-3GP
C2815
SCD1U16V2KX-3GP
12
C2813
SC10U6D3V5KX-1GP
DY
C2813
SC10U6D3V5KX-1GP
DY
VCC
5
DXP
6
DXN
7
OTZ
8GND 2
ADJ 1
TDL 3
TDR 4
U2801
P2800EB0-GP
U2801
P2800EB0-GP
12
R2816
107KR2F-GP
DY
R2816
107KR2F-GP
DY
3
1
2
Q2808
PMBS3904-1-GP
84.03904.L06
2ND = 84.03904.P11
Q2808
PMBS3904-1-GP
84.03904.L06
2ND = 84.03904.P11
1
AFTP2801
AFTE14P-GP
AFTP2801
AFTE14P-GP
12
R2815
100KR2J-1-GP
DY
R2815
100KR2J-1-GP
DY
1 2
R2861
0R2J-2-GP
DY
R2861
0R2J-2-GP
DY
1 2
R2814 0R2J-2-GP
DY
R2814 0R2J-2-GP
DY
12
R2805
150R2F-1-GP
DY
R2805
150R2F-1-GP
DY
12
R2820
10KR2J-3-GP
DY
R2820
10KR2J-3-GP
DY
12
R2802
NTC-100K-8-GP
DY
R2802
NTC-100K-8-GP
DY
12
C2812
SC2200P50V2KX-2GP
DY
C2812
SC2200P50V2KX-2GP
DY
12
C2817
SC2200P50V2KX-2GP
DY
C2817
SC2200P50V2KX-2GP
DY
12
C2829
SC390P50V3JN-GP
C2829
SC390P50V3JN-GP
12
C2818
SC4D7U6D3V3KX-GP
DY
C2818
SC4D7U6D3V3KX-GP
DY
12
C2830
SC10U6D3V5KX-1GP
C2830
SC10U6D3V5KX-1GP
12
R2817
0R2J-2-GP
R2817
0R2J-2-GP
12
C2831
SCD1U10V2KX-5GP
DY
C2831
SCD1U10V2KX-5GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDA_CODEC_SDIN0
AUD_DVDDCORE
HDA_CODEC_BITCLK
HDA_CODEC_BITCLK
AUD_HP1_JACK_R
PUMP_CAPN
AUD_SENSE_A
PUMP_CAPP
AMP_MUTE#
KBC_BEEP_R
SB_SPKR_RAUD_PC_BEEP
AUD_V_B
AUD_SENSE_B
AUD_VREG
AUD_SPK_L+
AUD_SPK_L-
AUD_EXT_MIC_R
AUD_HP1_JACK_L
AUD_EXT_MIC_L
AUD_VREFOUT_B
PCH_AZ_CODEC_SDOUT1
HDA_CODEC_SDOUT
AUD_VREFFLT
HDA_CODEC_SYNC
HDA_CODEC_RST#
HDA_CODEC_SDOUT
AUD_CAP2
AUD_PC_BEEP
AUD_SENSE_A
AUD_SENSE_B
AUD_PC_BEEP
AUD_CAP2
AUD_VREFFLT
AUD_VREFOUT_B
AUD_VREFOUT_B
AUD_V_B
AUD_VREG
AUD_SPK_R-
AUD_SPK_R+
AUD_VREFOUT_B
INT_MIC_L_R
AMP_MUTE#
3D3V_S0
+AVDD
+AVDD
5V_S05V_S0 +PVDD
+AVDD
AUD_AGND AUD_AGND
AUD_AGND AUD_AGND AUD_AGND AUD_AGND
AUD_AGND AUD_AGND
+AVDD
AUD_AGND
+AVDD
AUD_AGND
+PVDD
AUD_AGND
3D3V_S0
HDA_CODEC_SYNC18 HDA_CODEC_RST#18
HDA_SDIN018 HDA_CODEC_BITCLK18 HDA_CODEC_SDOUT18
AUD_HP1_JD# 82
EXT_MIC_JD# 82
AUD_SPK_L+ 58
AUD_SPK_L- 58
AMP_MUTE#27
HDA_SPKR 18
KBC_BEEP 27
AUD_HP1_JACK_L2 82
AUD_HP1_JACK_R2 82
MIC_IN_L 82
MIC_IN_R 82
AUD_SPK_R- 58
AUD_SPK_R+ 58
MIC_IN_L82
MIC_IN_R82
INT_MIC_L_R 58,82
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Audio Codec 92HD87B1
A3
29 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Audio Codec 92HD87B1
A3
29 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Audio Codec 92HD87B1
A3
29 109Friday, April 22, 2011
<Core Design>
Close to codec
Close to Pin14
From SB
From EC
SSID = AUDIO
Close to Pin13
Azalia I/F EMI
Close to codec
AUD_PC_BEEP
Trace width>15 mils
Close to codec
2010/06/30 Change to 92HD87 (71.92H87.A03)
Put C2921 and C2922 close to codec
0625 Modify:
AUD_DMIC_CLK&AUD_DMIC_IN0 connector
to LVDS pin define.
CLOSE TO CODEC
0707 Modify:
Change R2911,R2914,R2917 change
to 0ohm 0603 from short pad.
0707 Modify:
updated U2901 part number from data base.
MIC IN
0719 Modify:
Move RN2901 to closed AUDIO CODEC from speaker connector.
0809 Vendor recommand
0730 Add internal MIC
1
23
4
RN2901
SRN4K7J-8-GP
RN2901
SRN4K7J-8-GP
12
C2923
SC1U10V2KX-1GP
C2923
SC1U10V2KX-1GP
12
C2915
SC10U6D3V5MX-3GP
C2915
SC10U6D3V5MX-3GP
12
R2915
2K49R2F-GP
R2915
2K49R2F-GP
12
R2918
20KR2F-L-GP
R2918
20KR2F-L-GP
1 2
R2905 60D4R2F-GPR2905 60D4R2F-GP
1 2
C2905
SCD1U10V2KX-5GP
C2905
SCD1U10V2KX-5GP
1 2
R2904 0R0603-PADR2904 0R0603-PAD
12
C2921 SC1U10V3KX-3GPC2921 SC1U10V3KX-3GP
12
C2918
SC10U6D3V5MX-3GP
C2918
SC10U6D3V5MX-3GP
12
C2912 SCD1U10V2KX-5GPC2912 SCD1U10V2KX-5GP
1 2
33R2J-2-GP
R2901
33R2J-2-GP
R2901
1 2
R2914 0R0603-PADR2914 0R0603-PAD
12
C2919
SC1000P50V3JN-GP-U
C2919
SC1000P50V3JN-GP-U
1 2
C2902
SCD1U10V2KX-5GP
C2902
SCD1U10V2KX-5GP
12
C2917
SC4D7U6D3V3KX-GP
C2917
SC4D7U6D3V3KX-GP
1 2
C2914
SC2D2U10V3KX-1GP
C2914
SC2D2U10V3KX-1GP
12
C2903
SC1U6D3V2KX-GP
C2903
SC1U6D3V2KX-GP
12
R2908
10KR2J-3-GP
R2908
10KR2J-3-GP
12
C2924
SC1U10V3KX-3GP
C2924
SC1U10V3KX-3GP
1 2
R2906 60D4R2F-GPR2906 60D4R2F-GP
12
R2916
2K49R2F-GP
R2916
2K49R2F-GP
1 2
R2902 0R0603-PADR2902 0R0603-PAD
1 2
C2908
SCD1U10V2KX-5GP
C2908
SCD1U10V2KX-5GP
1 2
R2917 0R0603-PADR2917 0R0603-PAD
1 2
R2910 470KR2J-2-GPR2910 470KR2J-2-GP
1 2
R2920
2K2R2J-2-GP
R2920
2K2R2J-2-GP
12
C2909
SC1U10V2KX-1GP
C2909
SC1U10V2KX-1GP
1 2
R2903 0R0603-PADR2903 0R0603-PAD
12
C2906
SC1U10V2KX-1GP
C2906
SC1U10V2KX-1GP
DVDD_LV
1
DMIC_CLK/GPIO_1
2
DMIC_0/GPIO_2
3
SDATA_OUT
4
BITCLK
5
SDATA_IN
6
DVDD
7
SYNC
8
RESET#
9
PCBEEP
10
SENSE_A
11
SENSE_B
12
PORTF_L
13
PORTF_R
14
PORTC_L
15
PORTC_R
16
VREFFILT
17
CAP2
18
VREFOUT_A
19
VREFOUT_C
20
AVDD1 21
PORTA_L 22
PORTA_R 23
AVSS2 24
PORTB_L 25
PORTB_R 26
AVSS2 27
V- 28
CAP- 29
CAP+ 30
VREG/+2_5V 31
AVDD2 32
PVDD 33
PORTD_+L 34
PORTD_-L 35
PVSS 36
PORTD_-R 37
PORTD_+R 38
PVDD 39
EAPD 40
THERMAL_PAD 41
U2901
92HD87B1A5NDGXTBX8-GP
71.92H87.A03
U2901
92HD87B1A5NDGXTBX8-GP
71.92H87.A03
12
C2916
SC1U6D3V2KX-GP
C2916
SC1U6D3V2KX-GP
12
C2910
SC10U6D3V5MX-3GP
C2910
SC10U6D3V5MX-3GP
1 2
C2904
SCD1U10V2KX-5GP
C2904
SCD1U10V2KX-5GP
12
R2919
39K2R2F-L-GP
R2919
39K2R2F-L-GP
1 2
R2911 0R0603-PADR2911 0R0603-PAD
1 2
R2909
120KR2J-L-GP
R2909
120KR2J-L-GP
12
C2907
SC4D7P50V2CN-1GP
DY
C2907
SC4D7P50V2CN-1GP
DY
12
R2912
47R2J-2-GP
DY
R2912
47R2J-2-GP
DY
12
C2920
SCD1U10V2KX-5GP
DY
C2920
SCD1U10V2KX-5GP
DY
12
C2901
SC10U6D3V5MX-3GP
C2901
SC10U6D3V5MX-3GP
12
C2913 SCD1U10V2KX-5GPC2913 SCD1U10V2KX-5GP
12
C2922 SC1U10V3KX-3GPC2922 SC1U10V3KX-3GP
1 2
R2913
20KR2F-L-GP
R2913
20KR2F-L-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
AMP
A3
30 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
AMP
A3
30 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
AMP
A3
30 109Friday, April 22, 2011
<Core Design>
www.bblianmeng.com
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
ISOLATE#
DVDD10
DVDD10
PLT_RST#_LAN
AVDD33_REG
CLK_PCIE_LAN#
PCIE_TXP0
3D3V_LAN_S5
3D3V_LAN_S5
PCIE_RXN0_C
EVDD10
DVDD10
LANXOUT
DVDD10
LANOUP_1.05S
PCIE_TXN0
3D3V_LAN_S5
3D3V_LAN_S5
ENSWREG
DVDD10LANOUP_1.05S CTRL10A_R
PCIE_TXN0
PCIE_RXP0_C
PCIE_RXN0_C
PCIE_TXP0
LANXIN
GPO
DVDD10
DVDD10
DVDD10
CLK_LAN_REQ#_R
AVDD33_REG
CLK_PCIE_LAN
LANXIN
LANXOUT
3D3V_LAN_S5
EEDI/SDA
3D3V_LAN_S5
PCIE_RXP0_C
EEDI/SDA
GPO
LAN_ENABLE_R_C
PCIE_WAKE#
CLK_LAN_REQ#_EN
CLK_LAN_REQ#_R
PM_LAN_ENABLE_R
PLT_RST#_LAN
3D3V_S0
DVDD10
EVDD10
AVDD33_REG
3D3V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_S5
3D3V_S0
3D3V_S5
3D3V_LAN_S5
3D3V_LAN_S5
3D3V_S0
3D3V_LAN_S5
3D3V_LAN_S5
LAN_MDI0P59
LAN_MDI1P59 LAN_MDI1N59
LAN_MDI0N59
PCIE_TXN0 17
PCIE_RXP0 17
PCIE_RXN0 17
PCIE_TXP0 17
PCIE_WAKE# 18,27
CLK_PCIE_LAN 17
CLK_PCIE_LAN# 17
PM_LAN_ENABLE27
PCIE_CLK_LAN_RQ1# 18
PLT_RST#17,65,71,83 Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LOM
A3
31 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LOM
A3
31 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LOM
A3
31 109Friday, April 22, 2011
<Core Design>
For Switch Regulator enable
40 mils
0721
0720
X5R
X5R
60 mils
LAN CHIP
main: 84.00102.031
2nd: 84.03403.031
X01
X01
X01
X01
11/18 change L3101 to slime type
RTL8111E-Stuff
RTL8105E-DY
X01
X02
X02
X02
X02
X02
SSID = LOM
12
R3110
1KR2J-1-GP
R3110
1KR2J-1-GP
1 2
R3118
1KR2J-1-GP
R3118
1KR2J-1-GP
1 2
C3105 SCD1U10V2KX-5GPC3105 SCD1U10V2KX-5GP
1 2
R3104 0R0603-PADR3104 0R0603-PAD
12
C3114
SCD1U16V2ZY-2GP
C3114
SCD1U16V2ZY-2GP
12
C3106
SC1U10V3ZY-6GP
C3106
SC1U10V3ZY-6GP
1 2
R3107 10KR2J-3-GPR3107 10KR2J-3-GP
12
C3125
SC1U10V2KX-1GP
C3125
SC1U10V2KX-1GP
12
R312210KR2J-3-GP
DY
R312210KR2J-3-GP
DY
1 2
C3104 SCD1U10V2KX-5GPC3104 SCD1U10V2KX-5GP
12
C3101
SC4D7U6D3V3KX-GP
C3101
SC4D7U6D3V3KX-GP
G
S
D
Q3102
2N7002K-2-GP
Q3102
2N7002K-2-GP
1 2
C3102 SC18P50V2JN-1-GPC3102 SC18P50V2JN-1-GP
12
R3109
15KR2F-GP
R3109
15KR2F-GP
12
C3118
SCD1U16V2ZY-2GP
C3118
SCD1U16V2ZY-2GP
12
C3129
SCD1U10V2KX-4GP
C3129
SCD1U10V2KX-4GP
12
C3130
SCD1U10V2KX-4GP
C3130
SCD1U10V2KX-4GP
1 2
L3101
IND-4D7UH-192-GP
L3101
IND-4D7UH-192-GP
1 2
C3131
SCD1U10V2KX-4GP
C3131
SCD1U10V2KX-4GP
1 2
R3120
0R3J-0-U-GP
DY
R3120
0R3J-0-U-GP
DY
1 2
R3105
0R0402-PAD
R3105
0R0402-PAD
12
C3117
SCD1U16V2ZY-2GP
C3117
SCD1U16V2ZY-2GP
1 2
R3115 0R0603-PAD
R3115 0R0603-PAD
12
C3115
SC4D7U6D3V3KX-GP
C3115
SC4D7U6D3V3KX-GP
1
23
4
RN3101
SRN10KJ-5-GP
RN3101
SRN10KJ-5-GP
1 2
C3103 SC18P50V2JN-1-GPC3103 SC18P50V2JN-1-GP
12
C3120
SCD1U16V2ZY-2GP
C3120
SCD1U16V2ZY-2GP
1 2
R3134
100KR2J-1-GP
R3134
100KR2J-1-GP
3
1
2
Q3101
PMBS3904-1-GP
84.03904.L06
2ND = 84.03904.P11
DY
Q3101
PMBS3904-1-GP
84.03904.L06
2ND = 84.03904.P11
DY
12
R3102
10KR2J-3-GP
DY
R3102
10KR2J-3-GP
DY
3
1
2
Q3104
PMBS3904-1-GP
Q3104
PMBS3904-1-GP
12
C3113
SCD1U16V2ZY-2GP
C3113
SCD1U16V2ZY-2GP
1 2
R3106
0R2J-2-GP
DY
R3106
0R2J-2-GP
DY
12
C3121
SCD1U16V2ZY-2GP
C3121
SCD1U16V2ZY-2GP
12
R3121
10KR2J-3-GP
R3121
10KR2J-3-GP
1 2
R3119
0R3J-0-U-GP
DY
R3119
0R3J-0-U-GP
DY
1 2
R3117 0R0603-PAD
R3117 0R0603-PAD
12
R3108 0R2J-2-GP
DY
R3108 0R2J-2-GP
DY
1 2
R3103 1KR2J-1-GP
DY
R3103 1KR2J-1-GP
DY
1 2
R3133
0R2J-2-GP
DY
R3133
0R2J-2-GP
DY
12
C3109
SCD1U16V2ZY-2GP
C3109
SCD1U16V2ZY-2GP
1 2
R3114
10KR2J-3-GP
R3114
10KR2J-3-GP
41
2 3
X3101
XTAL-25MHZ-155-GP
X3101
XTAL-25MHZ-155-GP
12
C3119
SCD1U16V2ZY-2GP
C3119
SCD1U16V2ZY-2GP
1 2
R3113
2K49R2F-GP
R3113
2K49R2F-GP
1
TP3101TPAD14-GP TP3101TPAD14-GP
12
R3101
10KR2J-3-GP
DY
R3101
10KR2J-3-GP
DY
G
DS
Q3103
PA102FMG-GP-U
Q3103
PA102FMG-GP-U
DVDD10
13
GND
24
HSIP
17
HSIN
18
REFCLK_P
19
REFCLK_N
20
EVDD10
21
HSOP
22
HSON
23
NC#14
14
NC#15
15
CLKREQ#
16
AVDD10
3
MDIP0
1
MDIN0
2
NC#6
6
MDIP1
4
MDIN1
5
NC#9
9
NC#7
7
NC#8
8
NC#12
12
NC#10
10
NC#11
11
REGOUT 36
VDDREG 35
VDDREG 34
ENSWREG 33
EEDI 32
LED3/EEDO 31
EECS 30
DVDD10 29
DVDD33 27
ISOLATE# 26
PERST# 25
LANWAKE# 28
AVDD33 48
AVDD33 47
RSET 46
AVDD10 45
CKXTAL2 44
CKXTAL1 43
AVDD33 42
NC#41 41
LED0 40
DVDD3 39
GPO 38
LED1/EESK 37
GND
49
U3101
RTL8105E-VC-GRT-GP
U3101
RTL8105E-VC-GRT-GP
12
C3111
SCD1U16V2ZY-2GP
C3111
SCD1U16V2ZY-2GP
12
C3128
SCD1U10V2KX-4GP
C3128
SCD1U10V2KX-4GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_PP9_R
USB_PN9_R
V18
XD_D6/MS_BS
USB_PP9_R
USB_PN9_R
XD_D5/SD_D2/MS_D5
XD_WE#/SD_CD#
XD_WP/SD_D6/MS_D6
XD_D0/SD_CLK/MS_D2
XD_D1/SD_D5/MS_D0
XD_D2/SD_CMD
CR_GPIO0
RREF
XD_D4/SD_D3/MS_D1
XD_D3/SD_D4/MS_D4
XD_D7
XD_CD#
XD_ALE/SD_D7/MS_D3
XD_CLE/SD_D0/MS_D7
XD_CE#/SD_D1
XD_RE#/MS_INS#
XD_RDY/SD_WP/MS_CLK_R
CLK_PCH_48M
3D3V_CARD_S0
3D3V_S0
3D3V_CARD_S0
USB_PP9 18
XD_WE#/SD_CD# 74
XD_D2/SD_CMD 74
XD_D0/SD_CLK/MS_D2 74
XD_D4/SD_D3/MS_D1 74
XD_CE#/SD_D1 74
XD_ALE/SD_D7/MS_D3 74
XD_D1/SD_D5/MS_D0 74
XD_CLE/SD_D0/MS_D7 74
XD_RDY/SD_WP/MS_CLK 74
XD_RE#/MS_INS# 74
XD_D5/SD_D2/MS_D5 74
XD_D6/MS_BS 74
USB_PN9 18
CLK_PCH_48M17
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
32 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
32 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
32 109Friday, April 22, 2011
<Core Design>
Close to chip
SSID = SDIO
43mA
250mA
71.05138.003
0809 Vendor recommand
0809 Vendor recommand
0809 Vendor recommand
X01 EMI 12/13
A00
1
TP3203 TPAD14-GPTP3203 TPAD14-GP
1
TP3204 TPAD14-GPTP3204 TPAD14-GP
12
C3203
SCD1U10V2KX-5GP
C3203
SCD1U10V2KX-5GP
1 2
C3209
SC100P50V2JN-3GP
C3209
SC100P50V2JN-3GP
12
C3204
SC4D7U6D3V3KX-GP
C3204
SC4D7U6D3V3KX-GP
CLK_IN 24
RREF
1
DM
2
DP
3
3V3_IN
4
CARD_3V3
5
V18
6
XD_CD#
7
SP1
8
SP2
9
SP3
10
SP4
11
SP5
12
SP6 13
SP7 14
SP8 15
SP9 16
GPIO0 17
SP10 18
SP11 19
SP12 20
SP13 21
SP14 22
XD_D7 23
GND
25
U3201
RTS5138-GR-GP
U3201
RTS5138-GR-GP
1 2
R3201
6K2R2F-GP
R3201
6K2R2F-GP
1 2
R3206 0R0603-PADR3206 0R0603-PAD
1
TP3205 TPAD14-GPTP3205 TPAD14-GP
1
TP3201 TPAD14-GPTP3201 TPAD14-GP
1 2
R3207 0R0603-PADR3207 0R0603-PAD
12
EC3201
SC10P50V2JN-4GP
DY
EC3201
SC10P50V2JN-4GP
DY
1
TP3206 TPAD14-GPTP3206 TPAD14-GP
12
C3207
SC4D7U6D3V3KX-GP
C3207
SC4D7U6D3V3KX-GP
12
C3206
SCD1U10V2KX-4GP
C3206
SCD1U10V2KX-4GP
12
R3208
22R2J-2-GP
R3208
22R2J-2-GP
12
C3208
SC1U6D3V2KX-GP
C3208
SC1U6D3V2KX-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
33 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
33 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
33 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
34 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
34 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
34 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
35 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
35 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
35 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCORE_EN_R
1.5V_RUN_ENABLE
PS_S3CNTRL
5V_RUN_ENABLE
1.1V_RUN_ENABLE
3.3V_RUN_ENABLE
H_PW RGD_R
RUNPWROK_D
3D3V_S5
3D3V_S5
RUN_ENABLE
1D5V_S3 1D5V_S0
15V_S5
5V_S5 5V_S0
3D3V_S5 3D3V_S0
3D3V_AUX_S5
1D1V_S5 1D1V_S0
1D1V_S0 1V_PWR
PM_SLP_S3#18,27,44,46,47
1D8V_S0_PWRGD47
PM_SLP_S3#18,27,44,46,47
VCORE_EN 42
PM_SLP_S3#18,27,44,46,47
1D1V_S5_PWRGD27,46
1D5V_S3_PWRGD44
FCH_PWRGD 18
H_CPUPW RGD6,17,42,71
H_THERMTRIP# 6,18
PURE_HW _SHUTDOWN# 27,28,85
S5_ENABLE 27
3V_5V_EN41
A_RST#17,27
VRM_VDD_PWRGD42
IMVP_PWRGD 27
1V_S0_PW RGD46
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Power On Logic
A2
36 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Power On Logic
A2
36 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Power On Logic
A2
36 109Friday, April 22, 2011
<Core Design>
Power Sequence
1.5V_RUN for VGA Comsumption
Peak current 7.39A
+1.5V_RUN_CPU Comsumption
Peak current 3A
+1.5V_RUN for Mini-Card Comsumption
Peak current 1A
Total= 500mA
+1.5V_RUN
DIS uses 84.08039.037 TPCA8039-H Peak current=34A
UMA uses 84.07686.037 SI7686DP Peak current=35A
+3.3V_RUN Comsumption
Peak current 8.14A
+5V_RUN Comsumption
Peak current 7.73A
+5V_RUN
+3.3V_RUN
ROSA Run Power
G
GD
D
S
S
AO4468 MAX 11.6A
Rds(on) = 11~14mOhm
VGS=+/-20V
83.00056.Q11
AO4468 MAX 11.6A
Rds(on) = 11~14mOhm
VGS=+/-20V
AO4468 MAX 11.6A
Rds(on) = 28~42mOhm
VGS=+/-20V
0816
0816
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
84.03404.B31
2nd = 84.03400.B37
X01
X01
X01
1 2
R3607
10KR2J-3-GP
R3607
10KR2J-3-GP
1 2
R3601
1KR2J-1-GP
DY
R3601
1KR2J-1-GP
DY
12
R3602
200KR2J-L1-GP
DY
R3602
200KR2J-L1-GP
DY
1 2
R3674
0R2J-2-GP
DY
R3674
0R2J-2-GP
DY
12
C3609
SC10U6D3V5KX-1GP
DY
C3609
SC10U6D3V5KX-1GP
DY
1 2
R3630 10KR2J-3-GP
R3630 10KR2J-3-GP
1
2
3
D3605
BAW56-5-GP
83.00056.Q11
2ND = 83.00056.G11
3RD = 83.00056.K11
D3605
BAW56-5-GP
83.00056.Q11
2ND = 83.00056.G11
3RD = 83.00056.K11
1 2
R3628 0R0402-PADR3628 0R0402-PAD
12
R3605
0R0402-PAD
R3605
0R0402-PAD
1 2
R3667 0R0805-PADR3667 0R0805-PAD
3
1
2
Q3601
PMBS3904-1-GP
DY
Q3601
PMBS3904-1-GP
DY
1 2
R3626 0R0402-PADR3626 0R0402-PAD
12
C3614
SC10U6D3V5KX-1GP
C3614
SC10U6D3V5KX-1GP
1 2
R3673 0R0402-PADR3673 0R0402-PAD
1
2
3
D3603
BAW56-5-GP
83.00056.Q11
2ND = 83.00056.G11
3RD = 83.00056.K11
D3603
BAW56-5-GP
83.00056.Q11
2ND = 83.00056.G11
3RD = 83.00056.K11
1 2
R3668 0R0805-PADR3668 0R0805-PAD
1
2
3
45
6
7
8
S
S
S
GD
D
D
D
U3611
AO4468-GP
84.04468.037
2nd = 84.08882.037
S
S
S
GD
D
D
D
U3611
AO4468-GP
84.04468.037
2nd = 84.08882.037
1 2
R3669 0R0805-PADR3669 0R0805-PAD
12
C3633
SCD015U25V2KX-GP
DY
C3633
SCD015U25V2KX-GP
DY
12
C3608
SC6800P25V2KX-1GP
DY
C3608
SC6800P25V2KX-1GP
DY
1 2
R3670 0R0805-PADR3670 0R0805-PAD
1
2
3
D3601
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
D3601
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
1
2
3
D3604
BAW56-5-GP
83.00056.Q11
2ND = 83.00056.G11
3RD = 83.00056.K11
D3604
BAW56-5-GP
83.00056.Q11
2ND = 83.00056.G11
3RD = 83.00056.K11
1
2
3 4
5
6
Q3602
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q3602
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
12
R3624
10KR2J-3-GP
R3624
10KR2J-3-GP
1 2
R3633
33KR2F-GP
R3633
33KR2F-GP
1 2
R3671 0R0805-PADR3671 0R0805-PAD
1 2
R3666 0R0805-PADR3666 0R0805-PAD
G
D S
U3606
AO3404A-GP
U3606
AO3404A-GP
12
C3604
SC10U6D3V5KX-1GP
C3604
SC10U6D3V5KX-1GP
12
R3604
33KR2F-GP
R3604
33KR2F-GP
1 2
R3622 1KR2J-1-GP
DY
R3622 1KR2J-1-GP
DY
12
C3615
SCD033U25V2KX-GP
C3615
SCD033U25V2KX-GP
12
C3605
SCD015U25V2KX-GP
C3605
SCD015U25V2KX-GP
12
C3610
SCD01U50V2KX-1GP
DY
C3610
SCD01U50V2KX-1GP
DY
1 2
R3625 0R0402-PADR3625 0R0402-PAD
1 2
R3629 0R0402-PADR3629 0R0402-PAD
1
2
3
45
6
7
8
S
S
S
G D
D
D
D
U3601
AO4468-GP
84.04468.037
2nd = 84.08882.037
S
S
S
G D
D
D
D
U3601
AO4468-GP
84.04468.037
2nd = 84.08882.037
1 2
R3634 0R0402-PADR3634 0R0402-PAD
12
C3602
SCD1U10V2KX-5GP
DY
C3602
SCD1U10V2KX-5GP
DY
1
2
3
45
6
7
8
S
S
S
G D
D
D
D
U3602
AO4468-GP
84.04468.037
2nd = 84.08882.037
S
S
S
G D
D
D
D
U3602
AO4468-GP
84.04468.037
2nd = 84.08882.037
12
C3603
SC10U10V5ZY-1GP
C3603
SC10U10V5ZY-1GP
1 2
R3603
1KR2J-1-GP
R3603
1KR2J-1-GP
12
R3627
10KR2J-3-GP
R3627
10KR2J-3-GP
1 2
R3606 100KR2J-1-GP
R3606 100KR2J-1-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Power Plane Enable
A3
37 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Power Plane Enable
A3
37 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Power Plane Enable
A3
37 109Friday, April 22, 2011
<Core Design>
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PS_ID_R
PSID_DISABLE#_R_C
PS_IDPS_ID_R2
AD_OFF_R
AD_OFF_L
PS_ID_R
+DC_IN
GND
+DC_IN AD+
3D3V_S5 3D3V_S5
5V_S5
RCID27
PSID_EC 27
PWR_CHG_AD_OFF40
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DCIN_JACK
Custom
38 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DCIN_JACK
Custom
38 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DCIN_JACK
Custom
38 109Friday, April 22, 2011
<Core Design>
This cap should be used
only as last resort for
EMI suppression.
Id= -10A
Qg= -22nC
Rdson=14~13mohm
DCin CONN
SSID = PWR.Support
0721 Remove PSID schematic
20.F1498.007
X01
1128-SB
X01
12
PC3801
SC1U25V5KX-1GP
PC3801
SC1U25V5KX-1GP
12
PC3803
SCD01U50V2KX-1GP
DY
PC3803
SCD01U50V2KX-1GP
DY
12
PC3802
SCD1U50V3KX-GP
DY
PC3802
SCD1U50V3KX-GP
DY
3
1
2
PQ3802
PMBS3904-1-GP
PQ3802
PMBS3904-1-GP
1 2
PR3811
100KR2J-1-GP
PR3811
100KR2J-1-GP
12
PR3809
240KR3-GP
PR3809
240KR3-GP
E
BC
R1
R2
PQ3805
PDTA124EU-1-GP
DY
R1
R2
PQ3805
PDTA124EU-1-GP
DY
12
PR3806
2K2R2J-2-GP
PR3806
2K2R2J-2-GP
1
AFTP3812AFTP3812
12
PC3806
SC10U25V5KX-GP
PC3806
SC10U25V5KX-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU3801
SI4835DDY-T1-GE3-GP
S
S
S
G D
D
D
D
PU3801
SI4835DDY-T1-GE3-GP
A K
PD3801
P6SBMJ27APT-GP
PD3801
P6SBMJ27APT-GP
1 2
PR3801
0R0603-PAD
PR3801
0R0603-PAD
12
PC3804
SCD01U50V2KX-1GP
DY
PC3804
SCD01U50V2KX-1GP
DY
1
AFTP3814AFTP3814
E
BC
R1
R2
PQ3804
PDTC124EU-1-GP
DY
R1
R2
PQ3804
PDTC124EU-1-GP
DY
1
AFTP3813AFTP3813
12
PR3803
10KR2J-3-GP
PR3803
10KR2J-3-GP
12
PC3805
SCD01U50V2KX-1GP
PC3805
SCD01U50V2KX-1GP
1 2
PR3802
15KR2J-1-GP
PR3802
15KR2J-1-GP
12
3
PD3803
BAV99-8-GP
PD3803
BAV99-8-GP
1 2
PR3810
47KR3J-L-GP
PR3810
47KR3J-L-GP
1 2
PR3807
33R2J-2-GP
PR3807
33R2J-2-GP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DCIN1
ACES-CONN14G-GP
DCIN1
ACES-CONN14G-GP
G
SD
D
PQ3801
FDV301N-NL-GP
D
PQ3801
FDV301N-NL-GP
1 2
PR3812
100KR2J-1-GP
DY
PR3812
100KR2J-1-GP
DY
1 2
PR3808
33R2J-2-GP
DY
PR3808
33R2J-2-GP
DY
2 1
PD3804
B240A-13-GP
DY
PD3804
B240A-13-GP
DY
G
S
D
.
.
.
. .
PQ3803
2N7002E-1-GP
84.2N702.D31
DY
.
.
.
. .
PQ3803
2N7002E-1-GP
84.2N702.D31
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BAT_SCL
BT+
PBAT_PRES1#
PBAT_SMBCLK1
PBAT_SMBDAT1
BAT_SDA
BAT_IN#
BAT_ALERT
PBAT_PRES1#
PBAT_SMBDAT1
PBAT_SMBCLK1
3D3V_AUX_KBC
BT+
BAT_IN#27
BAT_SCL27,40
BAT_SDA27,40
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
BATT CONN
A3
39 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
BATT CONN
A3
39 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
BATT CONN
A3
39 109Friday, April 22, 2011
<Core Design>
SSID = BATT CONN
Close to Batt Connector
For actual location, need to be swap all pin
Batt Connecter
20.81507.009
X01
X01
1128-SB
2nd = 83.00099.K11
3rd = 83.00099.T11 2nd = 83.00099.K11 2nd = 83.00099.K11
3rd = 83.00099.T11 3rd = 83.00099.T11
12
C3901
SC2200P50V2KX-2GP
C3901
SC2200P50V2KX-2GP
1
2
3
4
5
6
7
8
9
10
11
BATT1
ALP-CON9-4-GP
BATT1
ALP-CON9-4-GP
1 2
3
D3903
BAV99-8-GP
83.BAV99.D11
D3903
BAV99-8-GP
83.BAV99.D11
1
AFTP3903AFTP3903
1 2
R3904 100R2J-2-GPR3904 100R2J-2-GP
1 2
3
D3902
BAV99-8-GP
83.BAV99.D11
D3902
BAV99-8-GP
83.BAV99.D11
12
EC3901
SC10P50V2JN-4GP
DY
EC3901
SC10P50V2JN-4GP
DY
1
AFTP3906AFTP3906
1
AFTP3905AFTP3905
12
C3902
SCD1U50V3KX-GP
C3902
SCD1U50V3KX-GP
1 2
R3902 100R2J-2-GPR3902 100R2J-2-GP
A K
PD3902
SMF18AT1G-GP
DY
PD3902
SMF18AT1G-GP
DY
1
AFTP3904AFTP3904
1 2
3
D3901
BAV99-8-GP
83.BAV99.D11
D3901
BAV99-8-GP
83.BAV99.D11
1 2
R3903 100R2J-2-GPR3903 100R2J-2-GP
1
AFTP3902AFTP3902
12
EC3902
SC10P50V2JN-4GP
DY
EC3902
SC10P50V2JN-4GP
DY
1
AFTP3901AFTP3901
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_CHG_BAT_SCL
PWR_CHG_BAT_SDA
PWR_CHG_PHASE BT+_R
PWR_CHG_CSOP_1
PWR_CHG_IFAULT
PWR_CHG_ACP
PWR_CHG_ACN
PWR_CHG_BTST
PWR_CHG_ILIM
PWR_CHG_ACDET
PWR_CHG_ACOK
AD+_G_2
PWR_CHG_CMPIN
PWR_CHG_IOUT
DC_IN_D
AD+_G_1
PWR_CHG_SRN
PWR_CHG_IOUT
PWR_CHG_HIDRV
PWR_CHG_VCC
PWR_CHG_LODRV
PWR_CHG_CMPOUT
PWR_CHG_CMPIN
PWR_CHG_CMPOUT
PWR_CHG_CMPOUT
AC_IN#
PWR_CHG_CMPIN PWR_CHG_SRP
PWR_DCBATOUT_CHG
3D3V_AUX_S5
CHG_AGND
DCBATOUT
AD+
AD+_TO_SYS
CHG_AGND
CHG_AGND
CHG_AGND CHG_AGND
CHG_AGND
CHG_AGND
CHG_AGND
AD+
BT+
BT+
AD+
CHG_AGND
CHG_AGND
CHG_AGND
CHG_AGND
CHG_AGND
3D3V_AUX_S5
CHG_AGND
PWR_CHG_REGN
PWR_CHG_REGN
PWR_CHG_REGN
PWR_CHG_REGN
3D3V_AUX_S5
3D3V_AUX_S5
CHG_AGND
3D3V_AUX_S5
PWR_CHG_REGN
AD+
BAT_SDA27,39
BAT_SCL27,39
PWR_CHG_AD_OFF38
AD_IA 27
H_PROCHOT#6,27
AD_IA_HW 27
AC_IN#27
PWR_CHG_ACOK27
AD_IA_HW2 27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
CHARGER BQ24707
Custom
40 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
CHARGER BQ24707
Custom
40 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
CHARGER BQ24707
Custom
40 109Friday, April 22, 2011
<Core Design>
Charger Current=1.4~3.6A
SSID = Charger
0802 Rename H_PROCHOT#
EE need pull high and net name
please help to check
which net connect it
Id= -10A
Qg= -22nC
Rdson=14~13mohm
Id= -10A
Qg= -22nC
Rdson=14~13mohm
X01
2010/11/10 X01
2010/11/10 X01
2010/11/10 X01
2010/11/10 X01
2010/11/10 X01
DELETE PR4015 X01
DELETE PC4014 X01
2010/11/10 X01
2010/11/10 X01
2010/11/10 X01 2010/11/10 X01
01
AD_IA_HW
ROSA
H_PROCHOT#
10
0
90W
65W
AD_IA_HW2
130W
EC code only BQ24707
0
PR4023
65W
Adapter Type
59K
24K
130W
90W 33.2K
1128-SB
X01
X01
X01
X01
12
PG4008 GAP-CLOSE-PWR-3-GPPG4008 GAP-CLOSE-PWR-3-GP
G
S
D
.
.
...
PQ4003
2N7002E-1-GP
.
.
...
PQ4003
2N7002E-1-GP
12
PR403149K9R2F-L-GP PR403149K9R2F-L-GP
12
PC4018
SC10U25V5KX-GP
DY
PC4018
SC10U25V5KX-GP
DY
1 2
PC4002
SCD1U25V2KX-GP
PC4002
SCD1U25V2KX-GP
12
PR4003
100KR2J-1-GP
PR4003
100KR2J-1-GP
1 2
PG4009
GAP-CLOSE-PWR-3-GP
PG4009
GAP-CLOSE-PWR-3-GP
1 2
PG4001
GAP-CLOSE-PWR-3-GP
PG4001
GAP-CLOSE-PWR-3-GP
1
2
3
4
5
6
7
8
S
S
S
G
D
D
D
D
PU4004
SI4178DY-T1-GE3-GP
S
S
S
G
D
D
D
D
PU4004
SI4178DY-T1-GE3-GP
1 2
PR4020 7D5R2F-GPPR4020 7D5R2F-GP
12
PC4001
SCD1U25V3KX-GP
DY
PC4001
SCD1U25V3KX-GP
DY
1 2
PR4010 20R5J-GPPR4010 20R5J-GP
12
EC4002
SCD1U25V2ZY-1GP
DY
EC4002
SCD1U25V2ZY-1GP
DY
12
PR4034
100KR2J-1-GP
PR4034
100KR2J-1-GP
12
PR4026
100KR2J-1-GP
DY
PR4026
100KR2J-1-GP
DY
12
PR4028
15KR2F-GP
DY
PR4028
15KR2F-GP
DY
12
PR4023
59KR2F-GP
PR4023
59KR2F-GP
12
PC4012
SCD01U50V2KX-1GP
PC4012
SCD01U50V2KX-1GP
ILIM
10
VCC
20
GND
14
SCL
9
SDA
8
ACDET
6
IOUT 7
ACOK#
5
ACP 2
ACN 1
BTST 17
REGN 16
HIDRV 18
PHASE 19
LODRV 15
CMPIN
4
SRN 12
CMPOUT
3
SRP 13
GND
21
IFAULT#
11
PU4005
BQ24707ARGRR-GP
PU4005
BQ24707ARGRR-GP
12
PC4023
SCD1U25V2KX-GP
PC4023
SCD1U25V2KX-GP
G
S D
PQ4004
2N7002A-7-GP
DY
PQ4004
2N7002A-7-GP
DY
1
2
3
4
5
6
7
8
S
S
S
G
D
D
D
D
PU4001
SI4178DY-T1-GE3-GP
S
S
S
G
D
D
D
D
PU4001
SI4178DY-T1-GE3-GP
12
PC4019
SCD1U50V3KX-GP
PC4019
SCD1U50V3KX-GP
12
PR4061
100KR2J-1-GP
PR4061
100KR2J-1-GP
12
PR4014
3D3MR2J-GP
PR4014
3D3MR2J-GP
12
PR4032
120KR2F-L-GP
DY
PR4032
120KR2F-L-GP
DY
1 2
PC4007
SC1U25V3KX-1-GP
PC4007
SC1U25V3KX-1-GP
1 2
PL4001
IND-5D6UH-52-GP
PL4001
IND-5D6UH-52-GP
12
PG4003
GAP-CLOSE-PWR-3-GP
PG4003
GAP-CLOSE-PWR-3-GP
12
PR4011
19K1R2F-GP
PR4011
19K1R2F-GP
12
PR4007
316KR2F-GP
PR4007
316KR2F-GP
12
PR4027
100KR2J-1-GP
DY
PR4027
100KR2J-1-GP
DY
1 2
PG4011
GAP-CLOSE-PWR
PG4011
GAP-CLOSE-PWR
12
PC4003
SC1U25V3KX-1-GP
DY
PC4003
SC1U25V3KX-1-GP
DY
12
PR4005
470KR2J-2-GP
PR4005
470KR2J-2-GP
12
PR4025
100KR2J-1-GP
DY
PR4025
100KR2J-1-GP
DY
G
S D
PQ4005
2N7002A-7-GP
DY
PQ4005
2N7002A-7-GP
DY
1 2
PG4010
GAP-CLOSE-PWR-3-GP
PG4010
GAP-CLOSE-PWR-3-GP
1 2
PR4016
D01R2512F-4-GP
PR4016
D01R2512F-4-GP
12
PC4016
SC10U25V5KX-GP
PC4016
SC10U25V5KX-GP
12
PC4009
SCD1U50V3KX-GP
PC4009
SCD1U50V3KX-GP
12
PR4017
100KR2J-1-GP
PR4017
100KR2J-1-GP
12
PR4013
100KR2F-L1-GP
PR4013
100KR2F-L1-GP
12
PR4029
30K9R2F-GP
DY
PR4029
30K9R2F-GP
DY
12
PG4007 GAP-CLOSE-PWR-3-GPPG4007 GAP-CLOSE-PWR-3-GP
1
2
3
45
6
7
8
S
S
S
GD
D
D
D
PU4002
SI4835DDY-T1-GE3-GP
S
S
S
GD
D
D
D
PU4002
SI4835DDY-T1-GE3-GP
12
PC4008
SC10U25V5KX-GP
PC4008
SC10U25V5KX-GP
G
S D
PQ4007
2N7002A-7-GP
DY
PQ4007
2N7002A-7-GP
DY
12
PC4022
SC220P50V2JN-3GP
PC4022
SC220P50V2JN-3GP
12
PC4006
SC10U25V5KX-GP
PC4006
SC10U25V5KX-GP
1 2
PR4021 10R2F-L-GPPR4021 10R2F-L-GP
12
PC4011
SCD047U25V2KX-GP
PC4011
SCD047U25V2KX-GP
1 2
PR4022
0R0402-PAD
PR4022
0R0402-PAD
12
PC4010
SCD47U25V3KX-2GP
PC4010
SCD47U25V3KX-2GP
12
PR4006
0R2J-2-GP
DY
PR4006
0R2J-2-GP
DY
12
PR4018
0R2J-2-GP
DY
PR4018
0R2J-2-GP
DY
1 2
PR4035
10KR2F-2-GP
DY
PR4035
10KR2F-2-GP
DY
1 2
PR4012
316KR2F-GP
DY
PR4012
316KR2F-GP
DY
1 2
PR4009
0R3J-0-U-GP
PR4009
0R3J-0-U-GP
12
PC4004
SCD1U50V3KX-GP
PC4004
SCD1U50V3KX-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU4003
SI4835DDY-T1-GE3-GP
S
S
S
G D
D
D
D
PU4003
SI4835DDY-T1-GE3-GP
K A
PD4001
SD103AWS-1-GP
PD4001
SD103AWS-1-GP
1 2
PR4008
20R5J-GP
PR4008
20R5J-GP
12
PR4024
8K45R2F-2-GP
DY
PR4024
8K45R2F-2-GP
DY
G
S D
PQ4001
2N7002A-7-GP
DY
PQ4001
2N7002A-7-GP
DY
12
PR4037
49K9R2F-L-GP
DY
PR4037
49K9R2F-L-GP
DY
12
PR4030
100KR2J-1-GP
DY
PR4030
100KR2J-1-GP
DY
1 2
PG4004
GAP-CLOSE-PWR-3-GP
PG4004
GAP-CLOSE-PWR-3-GP
12
PR4033
120KR2F-L-GP
DY
PR4033
120KR2F-L-GP
DY
12
PR4036
120KR2F-L-GP
DY
PR4036
120KR2F-L-GP
DY
1 2
PR4001
10KR2F-2-GP
PR4001
10KR2F-2-GP
12
PC4024
SCD1U50V3KX-GP
PC4024
SCD1U50V3KX-GP
1 2
PG4006
GAP-CLOSE-PWR-3-GP
PG4006
GAP-CLOSE-PWR-3-GP
12
EC4001
SC2200P50V2KX-2GP
DY
EC4001
SC2200P50V2KX-2GP
DY
1 2
PC4013
SC3300P50V3KX-1GP
DY
PC4013
SC3300P50V3KX-1GP
DY
G
S D
PQ4006
2N7002A-7-GP
DY
PQ4006
2N7002A-7-GP
DY
12
PC4015
SC10U25V5KX-GP
DY
PC4015
SC10U25V5KX-GP
DY
1 2
PR4004
10KR2J-3-GP
PR4004
10KR2J-3-GP
1 2
PR4002
D01R2512F-4-GP
PR4002
D01R2512F-4-GP
12
PR4062
100KR2J-1-GP
PR4062
100KR2J-1-GP
12
PG4002
GAP-CLOSE-PWR-3-GP
PG4002
GAP-CLOSE-PWR-3-GP
12
PC4020
SCD1U25V2KX-GP
DY
PC4020
SCD1U25V2KX-GP
DY
1 2
PG4005
GAP-CLOSE-PWR-3-GP
PG4005
GAP-CLOSE-PWR-3-GP
1
2
3 4
5
6
PQ4002
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
PQ4002
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
12
PC4017
SC10U25V5KX-GP
PC4017
SC10U25V5KX-GP
12
PC4021
SCD1U25V2KX-GP
PC4021
SCD1U25V2KX-GP
www.bblianmeng.com
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PWR_3D3V_FB2
PWR_5V3V_TONSEL
3D3V_AUX_S5_5_51125
PWR_3D3V_DRVL2
PWR_5V_FB1
PWR_5V_LL1
PWR_3D3V_VBST2_1 PWR_5V_VBST1_1
PWR_5V3V_SKIPSEL
PWR_3D3V_VBST2
3V_5V_POK
PWR_5V_DRVH1
PWR_5V_ENTRIP1
PWR_5V_DRVL1
PWR_3D3V_DRH2
PWR_5V_VO1
PWR_3D3V_LL2
PWR_5V_VBST1
PWR_3D3V_VO2
PWR_5V_FB1_R
PWR_3D3V_EN
PWR_3D3V5V_ENTRIP
PWR_3D3V_ENTRIP2
51125_FB2_R
PWR_5V_ENTRIP1
PWR_3D3V_ENTRIP2
PWR_3D3V_EN
ALW_ON_1
PWR_5V3D3V_VLK
PWR_5V3D3V_VLK
5V_PWR15V_S5
51125_VREF
3D3V_PWR_2
3D3V_PWR_2
3D3V_PWR 5V_PWR
51125_VREF
PWR_5V_DCBATOUT
3D3V_PWR_2
51125_VREF
5V_AUX_S5 3D3V_PWR_2
3D3V_PWR_2
PWR_5V_DCBATOUT
PWR_3D3V_DCBATOUT
DCBATOUT PWR_3D3V_DCBATOUT
5V_PWR 5V_S5
3D3V_AUX_S53D3V_PWR_2
15V_PWR
3D3V_S5 3D3V_PW R
PWR_5V_DCBATOUT
DCBATOUT
3V_5V_POK 46
3V_5V_EN36
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
TPS51125_5V/3D3V
A2
41 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
TPS51125_5V/3D3V
A2
41 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
TPS51125_5V/3D3V
A2
41 109Friday, April 22, 2011
<Core Design>
Close to VFB Pin (pin5)
Close to VFB Pin (pin2)
PWM only
VREF(2V)
Operating
Mode OOA Auto Skip Auto Skip
SKIPSEL GNDVREG3 or VREG5
enable both
LDOs, VCLK on
and ready to
turn on
switcher
channels
OpenEN0 820kΩ to GND
Operating
Mode enable both LDOs,
VCLK off and
ready to turn on
switcher channels
GND
disable all
circuit
D
S G
G
D
S
G
D
D
SG
S
PR4108
TPS51125 RT8205B
DY ASM
PR4110
TPS51125 RT8205B
0R3J 4R7
PR4109
TPS51125 RT8205B
0R3J 4R7
DYPR4118
TPS51125 RT8205B
DY
ASM
PR4121 ASM
460kHz
375kHz
CH1 CH2
VREF
TONSEL
300kHz
200kHz
VREG5
VREG3
250kHz
365kHz
TPS51125:
RT8205B:
305kHz
460kHz
375kHz
CH2CH1
365kHz 460kHz
VREF
GND
TONSEL
245kHz
200kHz
VREG5
VREG3
365kHz
300kHz
265kHz
GND
SSID = PWR.Plane.Regulator_3p3v5v
Design Current =8.32A
13.07A<OCP<15.45A
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081
H/S: TPC8061-H / 21mohm/30mOhm@4.5Vgs/ 84.08061.037
L/S: TPCA8065-H / 12mohm/15mOhm@4.5Vgs/ 84.08065.037
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
H/S: TPC8061-H / 21mohm/30mOhm@4.5Vgs/ 84.08061.037
L/S: TPCA8065-H / 12mohm/15mOhm@4.5Vgs/ 84.08065.037
Design Current =7.1A
11.14A<OCP<13.17A
1116:84.07716.037
0826
2011/03/16 X02
2010/11/10 X01
2010/11/10 X01
1116:84.07716.037
1116:84.00412.037
1116:84.00412.037
1128-SB
1128-SB
1128-SB
X01
X01
X02
X02
12
PC4102
SC1KP50V2KX-1GP
PC4102
SC1KP50V2KX-1GP
1 2
PG4114
GAP-CLOSE-PWR-3-GP
PG4114
GAP-CLOSE-PWR-3-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU4102
SIS412DN-T1-GE3-GP
S
S
S
G D
D
D
D
PU4102
SIS412DN-T1-GE3-GP
1 2
PG4123
GAP-CLOSE-PWR-3-GP
PG4123
GAP-CLOSE-PWR-3-GP
12
PC4124
SC18P50V2JN-1-GP
DY
PC4124
SC18P50V2JN-1-GP
DY
12
PC4116
SC10U25V5KX-GP
PC4116
SC10U25V5KX-GP
12
PC4104
SCD1U25V3KX-GP
PC4104
SCD1U25V3KX-GP
12
PC4113
SCD1U25V3KX-GP
PC4113
SCD1U25V3KX-GP
1 2
PG4129
GAP-CLOSE-PWR-3-GP
PG4129
GAP-CLOSE-PWR-3-GP
12
PC4114
SC10U25V5KX-GP
DY
PC4114
SC10U25V5KX-GP
DY
12
PR4117
10KR2F-2-GP
PR4117
10KR2F-2-GP
1 2
PG4105
GAP-CLOSE-PWR-3-GP
PG4105
GAP-CLOSE-PWR-3-GP
1 2
PG4128
GAP-CLOSE-PWR-3-GP
PG4128
GAP-CLOSE-PWR-3-GP
12
PR4113
6K65R2F-GP
PR4113
6K65R2F-GP
12
PC4107
SCD1U10V2KX-5GP
PC4107
SCD1U10V2KX-5GP
12
PC4105
SC18P50V2JN-1-GP
DY
PC4105
SC18P50V2JN-1-GP
DY
1
2
3
PD4101
BAT54S-5-GP
PD4101
BAT54S-5-GP
12
PR4123
0R2J-2-GP
DY
PR4123
0R2J-2-GP
DY
VBST2
9
DRVH2
10
LL2
11
DRVL2
12
VO2
7
VFB2
5
EN0
13
ENTRIP2
6
VREF
3
TONSEL
4
VREG3
8
VIN 16
VBST1 22
DRVH1 21
LL1 20
DRVL1 19
VO1 24
VFB1 2
PGOOD 23
ENTRIP1 1
GND 15
VREG5
17
GND 25
VCLK 18
SKIPSEL
14
PU4101
TPS51125ARGER-GP
PU4101
TPS51125ARGER-GP
1 2
PG4104
GAP-CLOSE-PWR-3-GP
PG4104
GAP-CLOSE-PWR-3-GP
12
PR4112
2D2R5F-2-GP
DY
PR4112
2D2R5F-2-GP
DY
1 2
PG4111
GAP-CLOSE-PWR-3-GP
PG4111
GAP-CLOSE-PWR-3-GP
A K
PD4103
BZT52C15S-GP
PD4103
BZT52C15S-GP
1 2
PG4125
GAP-CLOSE-PWR-3-GP
PG4125
GAP-CLOSE-PWR-3-GP
1 2
PG4110
GAP-CLOSE-PWR-3-GP
PG4110
GAP-CLOSE-PWR-3-GP
1 2
PG4118
GAP-CLOSE-PWR-3-GP
PG4118
GAP-CLOSE-PWR-3-GP
1 2
PG4109
GAP-CLOSE-PWR-3-GP
PG4109
GAP-CLOSE-PWR-3-GP
1 2
PG4117
GAP-CLOSE-PWR-3-GP
PG4117
GAP-CLOSE-PWR-3-GP
12
PR4116
33KR2F-GP
PR4116
33KR2F-GP
12
PC4125
SC18P50V2JN-1-GP
DY
PC4125
SC18P50V2JN-1-GP
DY
1 2
PC4118
SCD1U25V3KX-GP
PC4118
SCD1U25V3KX-GP
1 2
PR4110
0R3J-0-U-GP
PR4110
0R3J-0-U-GP
12
PC4106
SC1U25V3KX-1-GP
PC4106
SC1U25V3KX-1-GP
1 2
PR4104
0R0402-PAD
PR4104
0R0402-PAD
12
PC4103
SCD1U25V3KX-GP
PC4103
SCD1U25V3KX-GP
12
PR4115
0R2J-2-GP
DY
PR4115
0R2J-2-GP
DY
12
PC4110
SC10U25V5KX-GP
PC4110
SC10U25V5KX-GP
1 2
PL4101
IND-2D2UH-46-GP-U
PL4101
IND-2D2UH-46-GP-U
12
PT4101
ST220U6D3VDM-15GP
PT4101
ST220U6D3VDM-15GP
12
PC4115
SCD01U50V2KX-1GP
PC4115
SCD01U50V2KX-1GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4103
SIS412DN-T1-GE3-GP
S
S
S
GD
D
D
D
PU4103
SIS412DN-T1-GE3-GP
12
PR4111
2D2R5F-2-GP
DY
PR4111
2D2R5F-2-GP
DY
12
PT4103
ST220U6D3VDM-15GP
PT4103
ST220U6D3VDM-15GP
12
PC4127
SC10U10V5KX-2GP
PC4127
SC10U10V5KX-2GP
1 2
PG4122
GAP-CLOSE-PWR-3-GP
PG4122
GAP-CLOSE-PWR-3-GP
1
2
3 4
5
6
PQ4102
DMN66D0LDW-7-GP
PQ4102
DMN66D0LDW-7-GP
12
PR4107
169KR2F-1-GP
PR4107
169KR2F-1-GP
12
PC4120
SCD1U10V2KX-4GP
DY
PC4120
SCD1U10V2KX-4GP
DY
G
S
D
.
.
.
. .
PQ4101
2N7002E-1-GP
.
.
.
. .
PQ4101
2N7002E-1-GP
1 2
PG4108
GAP-CLOSE-PWR-3-GP
PG4108
GAP-CLOSE-PWR-3-GP
1 2
PG4112
GAP-CLOSE-PWR-3-GP
PG4112
GAP-CLOSE-PWR-3-GP
1
2
3
PD4102
BAT54S-5-GP
PD4102
BAT54S-5-GP
12
PC4101
SCD1U25V3KX-GP
PC4101
SCD1U25V3KX-GP
1 2
PG4103
GAP-CLOSE-PWR-3-GP
PG4103
GAP-CLOSE-PWR-3-GP
1 2
PG4116
GAP-CLOSE-PWR-3-GP
PG4116
GAP-CLOSE-PWR-3-GP
12
PC4122
SC560P50V-GP
DY
PC4122
SC560P50V-GP
DY
12
PC4111
SC10U25V5KX-GP
DY
PC4111
SC10U25V5KX-GP
DY
12
PG4130
GAP-CLOSE-PWR-3-GP
PG4130
GAP-CLOSE-PWR-3-GP
1 2
PL4102
IND-2D2UH-46-GP-U
PL4102
IND-2D2UH-46-GP-U
1 2
PG4119
GAP-CLOSE-PWR-3-GP
PG4119
GAP-CLOSE-PWR-3-GP
12
PR4102
100KR2J-1-GP
PR4102
100KR2J-1-GP
1 2
PG4124
GAP-CLOSE-PWR-3-GP
PG4124
GAP-CLOSE-PWR-3-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4105
SI7716ADN-T1-GE3-GP
S
S
S
GD
D
D
D
PU4105
SI7716ADN-T1-GE3-GP
12
PC4123
SCD22U10V2KX-1GP
PC4123
SCD22U10V2KX-1GP
1 2
PG4127
GAP-CLOSE-PWR-3-GP
PG4127
GAP-CLOSE-PWR-3-GP
1 2
PG4115
GAP-CLOSE-PWR-3-GP
PG4115
GAP-CLOSE-PWR-3-GP
12
PR4120
21K5R2F-GP
PR4120
21K5R2F-GP
1 2
PR4121
0R0402-PAD
PR4121
0R0402-PAD
1 2
PG4106
GAP-CLOSE-PWR-3-GP
PG4106
GAP-CLOSE-PWR-3-GP
12
PC4112
SCD1U50V3KX-GP
PC4112
SCD1U50V3KX-GP
1 2
PG4107
GAP-CLOSE-PWR-3-GP
PG4107
GAP-CLOSE-PWR-3-GP
12
PC4108
SC18P50V2JN-1-GP
DY
PC4108
SC18P50V2JN-1-GP
DY
12
PR4118
0R2J-2-GP
DY
PR4118
0R2J-2-GP
DY
12
PC4126
SC4D7U6D3V5KX-3GP
PC4126
SC4D7U6D3V5KX-3GP
12
PG4121
GAP-CLOSE-PWR-3-GP
PG4121
GAP-CLOSE-PWR-3-GP
1 2
PG4126
GAP-CLOSE-PWR-3-GP
PG4126
GAP-CLOSE-PWR-3-GP
1 2
PG4102
GAP-CLOSE-PWR-3-GP
PG4102
GAP-CLOSE-PWR-3-GP
1 2
PR4125
0R0402-PAD
PR4125
0R0402-PAD
12
PR4106
200KR2J-L1-GP
PR4106
200KR2J-L1-GP
1 2
PR4103
143KR2F-GP
PR4103
143KR2F-GP
12
PR4119
100KR2J-1-GP
PR4119
100KR2J-1-GP
1 2
PR4109
2D2R3J-2-GP
PR4109
2D2R3J-2-GP
1 2
PG4101
GAP-CLOSE-PWR-3-GP
PG4101
GAP-CLOSE-PWR-3-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU4104
SI7716ADN-T1-GE3-GP
S
S
S
G D
D
D
D
PU4104
SI7716ADN-T1-GE3-GP
12
PC4109
SCD01U50V2KX-1GP
PC4109
SCD01U50V2KX-1GP
1 2
PR4101 820KR2F-GP
DY
PR4101 820KR2F-GP
DY
12
PC4121
SC330P50V2KX-3GP
DY
PC4121
SC330P50V2KX-3GP
DY
1 2
PR4108
820KR3J-GP
DY
PR4108
820KR3J-GP
DY
1 2
PG4113
GAP-CLOSE-PWR-3-GP
PG4113
GAP-CLOSE-PWR-3-GP
12
PC4117
SC10U25V5KX-GP
PC4117
SC10U25V5KX-GP
12
PC4119
SCD1U10V2KX-5GP
PC4119
SCD1U10V2KX-5GP
12
PR4124
0R2J-2-GP
DY
PR4124
0R2J-2-GP
DY
1 2
PR4122
0R0402-PAD
PR4122
0R0402-PAD
12
PR4114
0R2J-2-GP
DY
PR4114
0R2J-2-GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
6265_ENABLE
ISP0_R
6265_FB0_R
6265_FB0_C
6265_VIN
ISP0
ISN0
6265_COMP_NB
6265_FB_NB
6265_FB0
6265_OCSET_NB
6265_VW0
6265_SVC
6265_OCSET
6265_SVD
LGATE0
LGATE0
BOOT0_R
6265_FSET_NB
UGATE0
6265_RBIAS
BOOT0
UGATE0
PHASE0 PHASE0
ISP0
ISN0
ISN0
6265_OFS/VFIXEN
6265_COMP0
6265_VCC6265_VCC6265_VCC6265_VCC6265_VCC6265_VCC6265_VCC6265_VCC6265_VCC6265_VCC
6265_VDIFF0
6265_FB_NB_R
ISP0
BOOT0
1D8V_S0
3D3V_S0
GNDA_VCORE
5V_S5 3D3V_S5
GNDA_VCORE
GNDA_VCORE
5V_S5
GNDA_VCORE
GNDA_VCORE
5V_S5
DCBATOUT
GNDA_VCORE
DCBATOUT
GNDA_VCORE
APU_VDD
APU_VDD
3D3V_S5
DCBATOUT
APU_VDDNB
VRM_VDD_PWRGD36 H_CPUPWRGD6,17,36,71
APU_SVD_R6 APU_SVC_R6 VCORE_EN36
APU_VDD_RUN_FB_H6 APU_VDD_RUN_FB_L6
APU_VDDNB_RUN_FB_L 6
APU_VDDNB_RUN_FB_H 6
PHASE_NB 43
LGATE_NB 43
PHASE_NB 43
UGATE_NB 43
BOOT_NB 43
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
VREG : +VCC_CORE&+VDDNB
A3
42 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
VREG : +VCC_CORE&+VDDNB
A3
42 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
VREG : +VCC_CORE&+VDDNB
A3
42 109Friday, April 22, 2011
<Core Design>
PR4208 close
to PL4201
Parallel
Close to
CPU socket
Parts
close to
PWM IC
Close to
CPU socket
Peak Current=11
Design Current =7.7A
16.5A<OCP<18.7A
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: 1uH PCMC063T-1R0MN Cyntec 9mohm/10mohm Isat =22Arms 68.1R01A.20B
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3Arms Panasonic/79.33719.L01
O/P cap: 330U 2V EEFSX0D331XE 6mOhm 3,5Arms Panasonic/79.33719.20L
H/S: SIR712DP/ POWERPAK/10.3mOhm/12.4mOhm@4.5Vgs/ 84.00172.037
L/S: SiR460DP/ POWERPAK/ 4.9mOhm/ 6.1mohm@4.5Vgs/ 84.00460.037
Pleae help to check
the net whether can
change to 3D3V_S5
0825
0825
2010/11/10 X01
2010/11/10 X01
1128-SB
1128-SB
X01
SSID = PWR.Plane.CORE.REG
12
PR4212
0R2J-2-GP
DY
PR4212
0R2J-2-GP
DY
1 2
PC4217
SC180P50V2JN-1GP
DY
PC4217
SC180P50V2JN-1GP
DY
1 2
PC4208
SC1KP50V2JN-2GP
PC4208
SC1KP50V2JN-2GP
1 2
PC4224
SC220P50V2JN-3GP
PC4224
SC220P50V2JN-3GP
1 2
EC4270
SC33P50V2JN-3GP
DY
EC4270
SC33P50V2JN-3GP
DY
1 2
PR4217
1KR2F-3-GP
PR4217
1KR2F-3-GP
12
PR4219
10R2J-2-GP
PR4219
10R2J-2-GP
1 2
PC4221 SC1KP50V2JN-2GPPC4221 SC1KP50V2JN-2GP
1 2
PR4201
0R0402-PAD
PR4201
0R0402-PAD
1 2
PR4222
2R3J-GP
PR4222
2R3J-GP
12
PR4229
10KR2F-2-GP
DY
PR4229
10KR2F-2-GP
DY
12
PG4216
GAP-CLOSE-PWR-3-GP
PG4216
GAP-CLOSE-PWR-3-GP
1 2
PR4207
249R2F-GP
PR4207
249R2F-GP
1 2
PC4220
SCD22U10V3KX-2GP
PC4220
SCD22U10V3KX-2GP
12
PC4209
SC1U10V3KX-4GP
PC4209
SC1U10V3KX-4GP
1 2
PG4217
GAP-CLOSE-PWR-3-GP
PG4217
GAP-CLOSE-PWR-3-GP
1 2
PC4216 SCD1U25V2KX-GPPC4216 SCD1U25V2KX-GP
1 2
PR4208
NTC-10K-9-GP
DY
PR4208
NTC-10K-9-GP
DY
12
PT4204
SE330U2VDM-L-GP
PT4204
SE330U2VDM-L-GP
1 2
PR4226
6K81R2F-1-GP
PR4226
6K81R2F-1-GP
1 2
PL4201
COIL-1UH-34-GP-U
PL4201
COIL-1UH-34-GP-U
1 2
PC4210 SC47P50V2JN-3GPPC4210 SC47P50V2JN-3GP
12
PC4207
SC2D2U10V3KX-1GP
PC4207
SC2D2U10V3KX-1GP
1 2
PC4218
SC1KP50V2JN-2GP
PC4218
SC1KP50V2JN-2GP
12
PC4225
SC560P50V-GP
DY
PC4225
SC560P50V-GP
DY
1 2
PR4211
8K2R2F-1-GP
PR4211
8K2R2F-1-GP
1 2
PR4233
0R3J-0-U-GP
PR4233
0R3J-0-U-GP
12
PT4206
SE330U2VDM-L-GP
DY
PT4206
SE330U2VDM-L-GP
DY
12
PC4223
SC10U25V5KX-GP
PC4223
SC10U25V5KX-GP
12
PC4202
SCD1U25V3KX-GP
PC4202
SCD1U25V3KX-GP
1 2
PR4216 16K9R2F-GPPR4216 16K9R2F-GP
12
TC4207
SE100U25VM-10GP
DY
TC4207
SE100U25VM-10GP
DY
12
PR4203 0R0402-PADPR4203 0R0402-PAD
12
PT4203
SE330U2VDM-L-GP
DY
PT4203
SE330U2VDM-L-GP
DY
12
PR4205 0R0402-PADPR4205 0R0402-PAD
12
PC4204
SC10U25V5KX-GP
PC4204
SC10U25V5KX-GP
1 2
PC4214 SC180P50V2JN-1GPPC4214 SC180P50V2JN-1GP
12
PR4224
0R2J-2-GP
DY
PR4224
0R2J-2-GP
DY
1 2
PR4231
10R2J-2-GP
PR4231
10R2J-2-GP
12
PC4206
SCD1U25V3KX-GP
PC4206
SCD1U25V3KX-GP
12
PR4206
10R2J-2-GP
PR4206
10R2J-2-GP
12
PR4204
910KR2J-GP
DY
PR4204
910KR2J-GP
DY
1 2
PR4228
22KR2F-GP
PR4228
22KR2F-GP
1 2
PR4209
2R3J-GP
PR4209
2R3J-GP
1 2
PR4227
33KR2F-GP
PR4227
33KR2F-GP
12
PT4208
ST330U2VDM-4-GP
PT4208
ST330U2VDM-4-GP
OFS/VFIXEN
1
PGOOD
2
PWROK
3
SVD
4
SVC
5
ENABLE
6
RBIAS
7
OCSET
8
VDIFF0
9
FB0
10
COMP0
11
VW0
12
ISP0
13
ISN0
14
VSEN0
15
RTN0
16
RTN1
17
VSEN1
18
VDIFF1
19
FB1
20
COMP1
21
VW1
22
ISP1
23
ISN1
24
VIN 48
VCC 47
FB_NB 46
COMP_NB 45
FSET_NB 44
VSEN_NB 43
RTN_NB 42
OCSET_NB 41
PGND_NB 40
LGATE_NB 39
PHASE_NB 38
UGATE_NB 37
GND 49
BOOT_NB 36
BOOT0 35
UGATE0 34
PHASE0 33
PGND0 32
LGATE0 31
PVCC 30
LGATE1 29
PGND1 28
PHASE1 27
UGATE1 26
BOOT1 25
PU4201
ISL6265CHRTZ-T-GP
PU4201
ISL6265CHRTZ-T-GP
1 2
PR4223 100KR2F-L1-GPPR4223 100KR2F-L1-GP
12
PR4221
6K49R2F-1-GP
PR4221
6K49R2F-1-GP
1 2
PC4222SC180P50V2JN-1GP
DY
PC4222SC180P50V2JN-1GP
DY
12
PR4210 0R0402-PADPR4210 0R0402-PAD
1 2
PR4213
1K4R2F-1-GP
PR4213
1K4R2F-1-GP
1 2
PC4201
SC1KP50V2JN-2GP
PC4201
SC1KP50V2JN-2GP
1 2
PR4225
54K9R2F-L-GP
PR4225
54K9R2F-L-GP
12
PR4214
10KR2J-3-GP
DY
PR4214
10KR2J-3-GP
DY
12
PC4203
SC10U25V5KX-GP
DY
PC4203
SC10U25V5KX-GP
DY
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
PU4203
SIR460DP-T1-GE3-GP
S
S
S
D
D
D
D
G
PU4203
SIR460DP-T1-GE3-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4202
SIR172DP-T1-GE3-GP
S
S
S
GD
D
D
D
PU4202
SIR172DP-T1-GE3-GP
1 2
PC4212
SC2200P50V2KX-2GP
PC4212
SC2200P50V2KX-2GP
1 2
PR4218
10R2F-L-GP
DY
PR4218
10R2F-L-GP
DY
12
PR4230
2D2R5F-2-GP
DY
PR4230
2D2R5F-2-GP
DY
12
PR4215
0R2J-2-GP
DY
PR4215
0R2J-2-GP
DY
1 2
PR4202
0R0402-PAD
PR4202
0R0402-PAD
1 2
PR4220
10R2J-2-GP
PR4220
10R2J-2-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BOOT_NB_R
APU_VDDNB
DCBATOUT
UGATE_NB42
LGATE_NB42
PHASE_NB42
BOOT_NB42
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
TPS51218_VDDNB
A3
43 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
TPS51218_VDDNB
A3
43 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
TPS51218_VDDNB
A3
43 109Friday, April 22, 2011
<Core Design>
Peak Current=10
Design Current =7A
15A<OCP<17A
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: 1uH PCMC063T-1R0MN Cyntec 9mohm/10mohm Isat =22Arms 68.1R01A.20B
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3Arms Panasonic/79.33719.L01
H/S: SIR712DP/ POWERPAK/10.3mOhm/12.4mOhm@4.5Vgs/ 84.00172.037
L/S: SiR460DP/ POWERPAK/ 4.9mOhm/ 6.1mohm@4.5Vgs/ 84.00460.037
1128-SB
1128-SB
SSID = PWR.Plane.VDDNB.REG
12
PT4301
SE330U2VDM-L-GP
PT4301
SE330U2VDM-L-GP
12
PT4304
SE330U2VDM-L-GP
DY
PT4304
SE330U2VDM-L-GP
DY
1 2
PL4301
COIL-1UH-34-GP-U
PL4301
COIL-1UH-34-GP-U
12
PC4301
SC10U25V5KX-GP
PC4301
SC10U25V5KX-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4302
SIR172DP-T1-GE3-GP
S
S
S
GD
D
D
D
PU4302
SIR172DP-T1-GE3-GP
12
PC4302
SC10U25V5KX-GP
DY
PC4302
SC10U25V5KX-GP
DY
12
PC4304
SC10U25V5KX-GP
PC4304
SC10U25V5KX-GP
12
PC4306
SC560P50V-GP
DY
PC4306
SC560P50V-GP
DY
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
PU4301
SIR460DP-T1-GE3-GP
S
S
S
D
D
D
D
G
PU4301
SIR460DP-T1-GE3-GP
1 2
PR4302
0R3J-0-U-GP
PR4302
0R3J-0-U-GP
12
PT4302
SE330U2VDM-L-GP
PT4302
SE330U2VDM-L-GP
1 2
PC4305
SCD22U10V3KX-2GP
PC4305
SCD22U10V3KX-2GP
12
PC4303
SCD1U25V3KX-GP
PC4303
SCD1U25V3KX-GP
12
PR4301
2D2R5F-2-GP
DY
PR4301
2D2R5F-2-GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_1D5V_VDDQS
PWR_1D5V_SW
PWR_1D5V_EN
PWR_1D5V_VTTREF
PWR_1D5V_REFIN
TPS51216_PHS_SET
PWR_1D5V_TRIP
PWR_1D5V_MODE
TPS51216_DRVL
PWR_1D5V_VDDQS
PWR_1D5V_VTTREF
PWR_0D75V_EN
PWR_1D5V_VREF
PWR_1D5V_VBST
PWR_1D5V_DRVH
PWR_1D5V_EN
PWR_0D75V_EN
DDR_VREF_S3
PWR_DCBATOUT_1D5V
1D5V_PWR
PWR_DCBATOUT_1D5V
0D75V_PWR
DCBATOUT
3D3V_S5
5V_S5
1D5V_S31D5V_PWR
1D5V_PWR
0D75V_PWR 0D75V_S0
1D5V_S3_PWRGD36
PM_SLP_S5#18,27
PM_SLP_S3#18,27,36,46,47
PM_SLP_S5#18,27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RT8207_1D5V_S3
Custom
44 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RT8207_1D5V_S3
Custom
44 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RT8207_1D5V_S3
Custom
44 109Friday, April 22, 2011
<Core Design>
68k ohm
47k ohm 400kHz
0630 Modify:
ADD PC4604 1uF0603 on PWR_1D5V_VTTIN.
PR4406
300kHz
200k ohm 400kHz
300kHz Tracking Discharge
0702 Modify:
Add PR4611 0ohm 0603 pad
on PWR_1D5V_VTTREF.
Non-tracking Discharge
Frequency Discharge Mode
State S3 S5 VDDR VTTREF VTT
Hi
S4/S5
S3
S0
LoLo
Lo Hi
Hi On
On
On
OffOff
On
On Off(Hi-Z)
Off
SSID = PWR.Plane.Regulator_1p5v0p75v
MODE
0630 modify
100k ohm
Change To SLP_S5
Intel Sequence, Remove
1125-1
Add For Sequence
Rename RUNPWROK to 1D5V_S3_PWRGD
Design Current =10.32A
16.21A<OCP<19.16A
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: 1.5uH PCMC104T-1R5MH Cyntec 3.8mohm/4.2mohm Isat =33Arms 68.1R510.20I
O/P cap: 220U 2V EEFCX0D221R 15mOhm 2.7Arms Panasonic/79.22719.20L
H/S: SIR712DP/ POWERPAK/10.3mOhm/12.4mOhm@4.5Vgs/ 84.00172.037
L/S: SiR460DP/ POWERPAK/ 4.9mOhm/ 6.1mohm@4.5Vgs/ 84.00460.037
0728
0816
2011/03/16 X02
1128-SB
1128-SB
1 2
PR4411 0R2J-2-GP
DY
PR4411 0R2J-2-GP
DY
1 2
PG4412
GAP-CLOSE-PWR-3-GP
PG4412
GAP-CLOSE-PWR-3-GP
1 2
PG4404
GAP-CLOSE-PWR-3-GP
PG4404
GAP-CLOSE-PWR-3-GP
12
PC4405
SC10U25V5KX-GP
DY
PC4405
SC10U25V5KX-GP
DY
12
PC4414
SCD22U6D3V2KX-1GP
PC4414
SCD22U6D3V2KX-1GP
1 2
PG4410
GAP-CLOSE-PWR-3-GP
PG4410
GAP-CLOSE-PWR-3-GP
1 2
PG4402
GAP-CLOSE-PWR-3-GP
PG4402
GAP-CLOSE-PWR-3-GP
12
PC4411
SCD1U10V2KX-4GP
PC4411
SCD1U10V2KX-4GP
1 2
PG4407
GAP-CLOSE-PWR-3-GP
PG4407
GAP-CLOSE-PWR-3-GP
1 2
PG4415
GAP-CLOSE-PWR-3-GP
PG4415
GAP-CLOSE-PWR-3-GP
1 2
PR4402
20KR2F-L-GP
DY
PR4402
20KR2F-L-GP
DY
12
PC4417
SC10U6D3V5MX-3GP
DY
PC4417
SC10U6D3V5MX-3GP
DY
1 2
PR4406
200KR2F-L-GP
PR4406
200KR2F-L-GP
12
PC4415
SCD1U10V2KX-4GP
PC4415
SCD1U10V2KX-4GP
12
PR4405
54K9R2F-L-GP
PR4405
54K9R2F-L-GP
12
PC4402
SC1U10V3KX-3GP
PC4402
SC1U10V3KX-3GP
12
PR4412 0R0402-PADPR4412 0R0402-PAD
12
PR4409
0R3J-0-U-GP
PR4409
0R3J-0-U-GP
12
PC4412
SCD01U16V2KX-3GP
PC4412
SCD01U16V2KX-3GP
1 2
PC4408
SCD1U25V3KX-GP
PC4408
SCD1U25V3KX-GP
12
PC4407
SC4D7U25V5KX-GP
PC4407
SC4D7U25V5KX-GP
1 2
PG4418
GAP-CLOSE-PWR-3-GP
PG4418
GAP-CLOSE-PWR-3-GP
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
PU4403
SIR460DP-T1-GE3-GP
S
S
S
D
D
D
D
G
PU4403
SIR460DP-T1-GE3-GP
VTT 3
VREF
6
VTTS 1
V5IN 12
VTTIN 2
PGND 10
PGOOD
20
VDDQS 9
MODE
19
VTTGND 4
VBST 15
DRVH 14
SW 13
DRVL 11
GND
7
GND
21
EN/PSV
16
VTTEN
17
REFIN
8
TRIP
18
VTTREF
5
PU4401
TPS51216RUKR-GP
PU4401
TPS51216RUKR-GP
1 2
PG4420
GAP-CLOSE-PWR-3-GP
PG4420
GAP-CLOSE-PWR-3-GP
1 2
PG4416
GAP-CLOSE-PWR-3-GP
PG4416
GAP-CLOSE-PWR-3-GP
1 2
PC4409
SCD1U25V3KX-GP
PC4409
SCD1U25V3KX-GP
1 2
PG4413
GAP-CLOSE-PWR-3-GP
PG4413
GAP-CLOSE-PWR-3-GP
1 2
PR4401
2D2R3J-2-GP
PR4401
2D2R3J-2-GP
1 2
PG4406
GAP-CLOSE-PWR-3-GP
PG4406
GAP-CLOSE-PWR-3-GP
1 2
PG4411
GAP-CLOSE-PWR-3-GP
PG4411
GAP-CLOSE-PWR-3-GP
1 2
PG4403
GAP-CLOSE-PWR-3-GP
PG4403
GAP-CLOSE-PWR-3-GP
12
PC4403
SC10U25V5KX-GP
PC4403
SC10U25V5KX-GP
12
PC4413
SC330P50V2KX-3GP
DY
PC4413
SC330P50V2KX-3GP
DY
12
PC4410
SC4D7U6D3V5KX-3GP
PC4410
SC4D7U6D3V5KX-3GP
1 2
PG4401
GAP-CLOSE-PWR-3-GP
PG4401
GAP-CLOSE-PWR-3-GP
1 2
PG4409
GAP-CLOSE-PWR-3-GP
PG4409
GAP-CLOSE-PWR-3-GP
12
PT4402
SE220U2VDM-8GP
PT4402
SE220U2VDM-8GP
12
PC4419
SCD1U10V2KX-5GP
DY
PC4419
SCD1U10V2KX-5GP
DY
1 2
PG4405
GAP-CLOSE-PWR-3-GP
PG4405
GAP-CLOSE-PWR-3-GP
12
PT4401
SE220U2VDM-8GP
DY
PT4401
SE220U2VDM-8GP
DY
12
PC4416
SC10U6D3V5MX-3GP
PC4416
SC10U6D3V5MX-3GP
12
PR4404
2D2R5F-2-GP
DY
PR4404
2D2R5F-2-GP
DY
1 2
PL4401
COIL-1UH-51-GP-U
PL4401
COIL-1UH-51-GP-U
1 2
PC4406
SCD1U50V3KX-GP
PC4406
SCD1U50V3KX-GP
1 2
PG4419
GAP-CLOSE-PWR-3-GP
PG4419
GAP-CLOSE-PWR-3-GP
12
PC4404
SC10U25V5KX-GP
PC4404
SC10U25V5KX-GP
12
PC4418
SCD1U10V2KX-4GP
PC4418
SCD1U10V2KX-4GP
1 2
PG4417
GAP-CLOSE-PWR-3-GP
PG4417
GAP-CLOSE-PWR-3-GP
12
PC4401
SC1U10V3KX-3GP
PC4401
SC1U10V3KX-3GP
1 2
PG4421
GAP-CLOSE-PWR-3-GP
PG4421
GAP-CLOSE-PWR-3-GP
12
PR4403
11K3R2F-2-GP
PR4403
11K3R2F-2-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4402
SIR172DP-T1-GE3-GP
S
S
S
GD
D
D
D
PU4402
SIR172DP-T1-GE3-GP
1 2
PG4408
GAP-CLOSE-PWR-3-GP
PG4408
GAP-CLOSE-PWR-3-GP
1 2
PG4414
GAP-CLOSE-PWR-3-GP
PG4414
GAP-CLOSE-PWR-3-GP
1 2
PR4410 2D2R2J-GPPR4410 2D2R2J-GP
12
PR4408
66K5R2F-GP
PR4408
66K5R2F-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
VDDR & VDDP
A3
45 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
VDDR & VDDP
A3
45 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
VDDR & VDDP
A3
45 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PWR_1V_FB
PWR_1V_PWR
PWR_1V_CCM
PWR_1V_PWRGD PWR_1V_BOOT_R
PWR_1V_LGATE
PWR_1V_UGATE
PWR_1V_BOOT
PWR_1V_FB
PWR_1V_EN
51218_SW_GND_VTT_1V
PWR_1V_PHASE
PWR_1V_TRIP
PWR_1D1V_FB
PWR_1D1V_PWR
PWR_1D1V_CCM
PWR_1D1V_BOOT_R
PWR_1D1V_LGATE
PWR_1D1V_UGATE
PWR_1D1V_BOOT
PWR_1D1V_FB
PWR_1D1V_EN
51218_SW_GND_VTT_1D1V
PWR_1D1V_PWRGD
PWR_1D1V_PHASE
PWR_1D1V_TRIP
PWR_DCBATOUT_1VDCBATOUT
1V_PWR_1
5V_S5
PWR_DCBATOUT_1V
3D3V_S5
1D1V_S51D1V_PWR
1D1V_PWR
5V_S5
DCBATOUT
3D3V_S5
1V_PWR1V_PWR_1 1V_S0
1V_PWR
PM_SLP_S3#18,27,36,44,47
1V_S0_PW RGD36
3V_5V_POK41
1D1V_S5_PWRGD27,36
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
1.1V
A2
46 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
1.1V
A2
46 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
1.1V
A2
46 109Friday, April 22, 2011
<Core Design>
Vout=0.704V*(R1+R2)/R2
0728
0823
Design Current =4A
6.27A<OCP<7.41A
0823
I/P cap: 4.7U 25V K0805 X5R/ 78.47522.51L
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P cap: 220U 2V EEFCX0D221ER 15mOhm 3.87Arms PANASONIC/79.22719.20L
H/S: SIS412DN/ 24mohm/30mOhm@4.5Vgs/ 84.00412.037
L/S: SIS412DN/ 24mohm/30mOhm@4.5Vgs/ 84.00412.037
SSID = PWR.Plane.1V1REG
2010/11/10 X01
Design Current =7A
11A<OCP<13A
0728
Vout=0.704V*(R1+R2)/R2
2010/11/10 X01
0824
2010/11/10 X01
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P cap: 220U 2V EEFCX0D221ER 15mOhm 3.87Arms PANASONIC/79.22719.20L
H/S: SIS412DN/ 24mohm/30mOhm@4.5Vgs/ 84.00412.037
L/S: SIS412DN/ 24mohm/30mOhm@4.5Vgs/ 84.00412.037
1128-SB
1126-SB
1128-SB
X01
X01
SSID = PWR.Plane.1VREG
1 2
PG4620
GAP-CLOSE-PWR
PG4620
GAP-CLOSE-PWR
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4603
SI7716ADN-T1-GE3-GP
S
S
S
GD
D
D
D
PU4603
SI7716ADN-T1-GE3-GP
12
PR4607
470KR2F-GP
PR4607
470KR2F-GP
1 2
PG4618
GAP-OPEN-PWR
PG4618
GAP-OPEN-PWR
12
PC4612
SC1U10V2KX-1GP
DY
PC4612
SC1U10V2KX-1GP
DY
1 2
PR4605
100KR2J-1-GP
PR4605
100KR2J-1-GP
12
PR4603 0R0402-PADPR4603 0R0402-PAD
1 2
PG4607
GAP-CLOSE-PWR-3-GP
PG4607
GAP-CLOSE-PWR-3-GP
1 2
PG4628
GAP-CLOSE-PWR-3-GP
PG4628
GAP-CLOSE-PWR-3-GP
12
PC4617
SC18P50V2JN-1-GP
DY
PC4617
SC18P50V2JN-1-GP
DY
1 2
PG4610
GAP-CLOSE-PWR-3-GP
PG4610
GAP-CLOSE-PWR-3-GP
1 2
PG4606
GAP-CLOSE-PWR-3-GP
PG4606
GAP-CLOSE-PWR-3-GP
1 2
PL4601
IND-2D2UH-46-GP-U
PL4601
IND-2D2UH-46-GP-U
12
PG4621
GAP-CLOSE-PWR-3-GP
PG4621
GAP-CLOSE-PWR-3-GP
1 2
PG4626
GAP-CLOSE-PWR-3-GP
PG4626
GAP-CLOSE-PWR-3-GP
12
PR4608
6K49R2F-1-GP
PR4608
6K49R2F-1-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4602
SIS412DN-T1-GE3-GP
S
S
S
GD
D
D
D
PU4602
SIS412DN-T1-GE3-GP
12
PC4610
SC18P50V2JN-1-GP
DY
PC4610
SC18P50V2JN-1-GP
DY
1 2
PG4624
GAP-CLOSE-PWR
PG4624
GAP-CLOSE-PWR
12
PR4609
11K5R2F-GP
PR4609
11K5R2F-GP
1 2
PG4605
GAP-CLOSE-PWR-3-GP
PG4605
GAP-CLOSE-PWR-3-GP
12
PR4606 2D2R5J-1-GP
DY
PR4606 2D2R5J-1-GP
DY
12
PR4617 2D2R5J-1-GP
DY
PR4617 2D2R5J-1-GP
DY
12
PR4610
10K5R2F-GP
DY
PR4610
10K5R2F-GP
DY
1 2
PG4622
GAP-CLOSE-PWR
PG4622
GAP-CLOSE-PWR
1 2
PL4602
COIL-2D2UH-27-GP
DY
PL4602
COIL-2D2UH-27-GP
DY
12
PC4619
SCD1U25V3KX-GP
DY
PC4619
SCD1U25V3KX-GP
DY
12
PC4611
SC330P50V2KX-3GP
DY
PC4611
SC330P50V2KX-3GP
DY
12
PT4602
SE220U2VDM-8GP
DY
PT4602
SE220U2VDM-8GP
DY
1 2
PR4616
2D2R3J-2-GP
DY
PR4616
2D2R3J-2-GP
DY
12
PR4615
470KR2F-GP
DY
PR4615
470KR2F-GP
DY
DRVL 6
V5IN 7
SW 8
DRVH 9
VBST 10
GND 11
PGOOD
1
TRIP
2
EN
3
VFB
4
CCM
5
PU4601
TPS51218DSCR-GP-U1
PU4601
TPS51218DSCR-GP-U1
1 2
PG4614
GAP-OPEN-PWR
PG4614
GAP-OPEN-PWR
12
PR4614
10KR2J-3-GP
DY
PR4614
10KR2J-3-GP
DY
1 2
PC4616
SCD1U50V3KX-GP
DY
PC4616
SCD1U50V3KX-GP
DY
12
PC4602
SC10U25V5KX-GP
DY
PC4602
SC10U25V5KX-GP
DY
12
PC4618
SC10U25V5KX-GP
DY
PC4618
SC10U25V5KX-GP
DY
12
PT4603
SE390U2D5VM-7GP
DY
PT4603
SE390U2D5VM-7GP
DY
DRVL 6
V5IN 7
SW 8
DRVH 9
VBST 10
GND 11
PGOOD
1
TRIP
2
EN
3
VFB
4
CCM
5
PU4605
TPS51218DSCR-GP-U1
DY
PU4605
TPS51218DSCR-GP-U1
DY
1 2
PG4615
GAP-OPEN-PWR
PG4615
GAP-OPEN-PWR
12
PR4611
0R2J-2-GP
DY
PR4611
0R2J-2-GP
DY
1 2
PG4619
GAP-OPEN-PWR
PG4619
GAP-OPEN-PWR
12
PC4620
SCD1U10V2KX-4GP
DY
PC4620
SCD1U10V2KX-4GP
DY
1 2
PG4604
GAP-CLOSE-PWR-3-GP
PG4604
GAP-CLOSE-PWR-3-GP
K A
PD4602
SDMK0340L-7-F-GP
DY
PD4602
SDMK0340L-7-F-GP
DY
1 2
PR4613
130KR2F-GP
DY
PR4613
130KR2F-GP
DY
12
PR4602
10KR2J-3-GP
PR4602
10KR2J-3-GP
1 2
PG4627
GAP-CLOSE-PWR-3-GP
PG4627
GAP-CLOSE-PWR-3-GP
12
PR4612
5K23R2F-GP
DY
PR4612
5K23R2F-GP
DY
12
PC4614
SC10U25V5KX-GP
DY
PC4614
SC10U25V5KX-GP
DY
12
PC4601
SC1KP50V2KX-1GP
PC4601
SC1KP50V2KX-1GP
1 2
PG4609
GAP-CLOSE-PWR-3-GP
PG4609
GAP-CLOSE-PWR-3-GP
1 2
PG4625
GAP-CLOSE-PWR-3-GP
PG4625
GAP-CLOSE-PWR-3-GP
12
PC4607
SC1U10V2KX-1GP
PC4607
SC1U10V2KX-1GP
1 2
PC4605
SCD1U50V3KX-GP
PC4605
SCD1U50V3KX-GP
1 2
PG4603
GAP-CLOSE-PWR-3-GP
PG4603
GAP-CLOSE-PWR-3-GP
1 2
PR4604
120KR2F-L-GP
PR4604
120KR2F-L-GP
12
PC4608
SCD1U10V2KX-4GP
PC4608
SCD1U10V2KX-4GP
1 2
PG4617
GAP-CLOSE-PWR
PG4617
GAP-CLOSE-PWR
12
PC4609
SC330P50V2KX-3GP
DY
PC4609
SC330P50V2KX-3GP
DY
12
PT4601
SE220U2VDM-8GP
PT4601
SE220U2VDM-8GP
1 2
PG4611
GAP-CLOSE-PWR
PG4611
GAP-CLOSE-PWR
12
PC4615
SC1KP50V2KX-1GP
DY
PC4615
SC1KP50V2KX-1GP
DY
1 2
PG4623
GAP-CLOSE-PWR-3-GP
PG4623
GAP-CLOSE-PWR-3-GP
K A
PD4601
SDMK0340L-7-F-GP
PD4601
SDMK0340L-7-F-GP
1 2
PR4618
100KR2J-1-GP
DY
PR4618
100KR2J-1-GP
DY
12
PC4606
SCD1U25V3KX-GP
PC4606
SCD1U25V3KX-GP
1 2
PG4616
GAP-OPEN-PWR
PG4616
GAP-OPEN-PWR
12
PG4608
GAP-CLOSE-PWR-3-GP
PG4608
GAP-CLOSE-PWR-3-GP
1 2
PR4601
2D2R3J-2-GP
PR4601
2D2R3J-2-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4604
SIS412DN-T1-GE3-GP
DY
S
S
S
GD
D
D
D
PU4604
SIS412DN-T1-GE3-GP
DY
12
PC4604
SC10U25V5KX-GP
PC4604
SC10U25V5KX-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4606
SIS412DN-T1-GE3-GP
DY
S
S
S
GD
D
D
D
PU4606
SIS412DN-T1-GE3-GP
DY
1 2
PG4613
GAP-OPEN-PWR
PG4613
GAP-OPEN-PWR
12
PC4603
SC10U25V5KX-GP
PC4603
SC10U25V5KX-GP
12
PC4621
SCD1U10V2KX-4GP
DY
PC4621
SCD1U10V2KX-4GP
DY
1 2
PG4612
GAP-OPEN-PWR
PG4612
GAP-OPEN-PWR
12
PC4613
SC10U25V5KX-GP
DY
PC4613
SC10U25V5KX-GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_1D8V_RT
PWR_1D8V_RT_R
PWR_1D8V_LX
PWR_1D8V_COMP_R
PWR_1D8V_FB
PWR_1D8V_COMP
PWR_1D8V_FB
1D8V_S0
3D3V_S5
1D8V_PWR
1D8V_PWR
3D3V_S5
1D8V_S0_PWRGD36
PM_SLP_S3#18,27,36,44,46
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RT8015B_1D8V_S0
A3
47 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RT8015B_1D8V_S0
A3
47 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RT8015B_1D8V_S0
A3
47 109Friday, April 22, 2011
<Core Design>
Vo=0.8*(1+(R1/R2))
Design Current =3A
APW7153B for 1D8V_S0
I/P cap: 4.7U 25V K0805 X5R/ 78.47522.51L
O/P cap: 22U 25V M0805 X5R/ 78.22610.51L
Inductor: 3.3uH PCMC063T-3R3MN Cyntec 28mohm/30mohm Isat =13.5Arms 68.3R310.20A
X01
SSID = PWR.Plane.1V8REG
12
PC4710
SCD1U10V2KX-5GP
DY
PC4710
SCD1U10V2KX-5GP
DY
12
PR4704
1MR2J-1-GP
PR4704
1MR2J-1-GP
12
PC4714
SC22U6D3V5MX-2GP
PC4714
SC22U6D3V5MX-2GP
1 2
PC4712
SC47P50V2JN-3GP
DY
PC4712
SC47P50V2JN-3GP
DY
12
PR4711
0R0402-PAD
PR4711
0R0402-PAD
12
PR4708
20KR2F-L-GP
PR4708
20KR2F-L-GP
1 2
PG4706
GAP-CLOSE-PWR-3-GP
PG4706
GAP-CLOSE-PWR-3-GP
12
PC4716
SC22U6D3V5MX-2GP
PC4716
SC22U6D3V5MX-2GP
SHDN/RT 1
GND 2
LX#3 3
LX#4 4
PGND 5
PVDD
6
VDD
7
POK
8
FB
9
COMP
10
GND
11
PU4702
APW7153BQBI-TRG-GP
74.07153.A73
PU4702
APW7153BQBI-TRG-GP
74.07153.A73
12
PC4711
SC10U6D3V3MX-GP
PC4711
SC10U6D3V3MX-GP
12
PC4713
SC100P50V2JN-3GP
PC4713
SC100P50V2JN-3GP
12
PC4715
SC10U6D3V3MX-GP
PC4715
SC10U6D3V3MX-GP
12
PR4707
16KR2F-GP
PR4707
16KR2F-GP
1 2
PG4704
GAP-CLOSE-PWR-3-GP
PG4704
GAP-CLOSE-PWR-3-GP
1 2
PR4709
10KR2F-2-GP
DY
PR4709
10KR2F-2-GP
DY
1 2
PC4709
SC100P50V2JN-3GP
PC4709
SC100P50V2JN-3GP
12
PC4708
SCD1U10V2KX-5GP
PC4708
SCD1U10V2KX-5GP
12
PR4706
820KR2F-GP
PR4706
820KR2F-GP
1 2
PR4710
20KR2F-L-GP
PR4710
20KR2F-L-GP
12
PR4705
2D2R2F-GP
PR4705
2D2R2F-GP
12
PC4707
SCD1U10V2KX-4GP
DY
PC4707
SCD1U10V2KX-4GP
DY
G
S
D
PQ4702
2N7002K-2-GP
84.2N702.J31
PQ4702
2N7002K-2-GP
84.2N702.J31
1 2
PG4705
GAP-CLOSE-PWR-3-GP
PG4705
GAP-CLOSE-PWR-3-GP
1 2
PL4702
IND-1D5UH-23-GP
PL4702
IND-1D5UH-23-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
48 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
48 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
48 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCDVCC_EN FPVCC_CTL3
FPVCC_CTL1
LCDVDD_1
LVDSA_CLK
LCD_TST_C
LCD_BRIGHTNESS
LVDSA_CLK#
BLON_OUT_C
LCD_BRIGHTNESS
USB_CAMERA#
USB_CAMERA
LCD_TST_C
BLON_OUT_C
LCD_TST_C
LCD_BRIGHTNESS
USB_CAMERA#
USB_CAMERA
15V_S5
3D3V_S0 LCDVDD
5V_S5
DCBATOUT_LCDDCBATOUT
3D3V_CAMERA_S03D3V_S0
DCBATOUT_LCD
3D3V_CAMERA_S0
3D3V_S0
LCDVDD
LCD_TST_EN27
LVDS_VDD_EN6
LVDS_DDC_DATA6 LVDS_DDC_CLK6 LVDSA_CLK6 LVDSA_CLK#6 LVDSA_DATA26 LVDSA_DATA2#6 LVDSA_DATA16 LVDSA_DATA1#6 LVDSA_DATA06 LVDSA_DATA0#6
L_BKLT_CTRL 6
LCD_TST 27
BLON_OUT 27
USB_PN7 18
USB_PP7 18
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LCD/Inverter Connector
Custom
49 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LCD/Inverter Connector
Custom
49 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LCD/Inverter Connector
Custom
49 109Friday, April 22, 2011
<Core Design>
INVERTER POWER
Camera Power
For EMI request
Close to LVDS connector
LVDS CONNECTOR
X01
83.R2003.E81
2nd = 83.00054.Q81
3rd = 83.BAT54.081
A00
A00
SSID = VIDEO
1 2
R4912 100KR2J-1-GP
R4912 100KR2J-1-GP
1 2
R4904 0R0603-PADR4904 0R0603-PAD
12
EC4902
SC33P50V2JN-3GP
DY
EC4902
SC33P50V2JN-3GP
DY
12
R4913
150R3J-L-GP
R4913
150R3J-L-GP
1 2
C4905
SCD1U50V3KX-GP
C4905
SCD1U50V3KX-GP
12
EC4906
SC5D6P50V2CN-1GP
DY
EC4906
SC5D6P50V2CN-1GP
DY
12
C4904
SC1KP50V2KX-1GP
C4904
SC1KP50V2KX-1GP
1
2
34
5
6
Q4902
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q4902
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1
2
3 4
5
6
D
D
G
D
D
S
Q4901
AO6402A-GP
2nd = 84.03456.D3D
84.06402.B3D
D
D
G
D
D
S
Q4901
AO6402A-GP
2nd = 84.03456.D3D
84.06402.B3D
1TP4903TPAD14-GPTP4903TPAD14-GP
12
C4903
SC10U6D3V5MX-3GP
C4903
SC10U6D3V5MX-3GP
1 2
R4910 330KR2J-L1-GPR4910 330KR2J-L1-GP
1 2
R4903 0R0603-PADR4903 0R0603-PAD
1AFTP4907AFTP4907
1 2
F4901 POLYSW-1D1A24V-GP-U
2nd = 69.50007.A41
69.50007.A31
F4901 POLYSW-1D1A24V-GP-U
2nd = 69.50007.A41
69.50007.A31
12
R4906 0R3J-0-U-GPR4906 0R3J-0-U-GP
12
EC4905
SC5D6P50V2CN-1GP
DY
EC4905
SC5D6P50V2CN-1GP
DY
12
EC4901
SC33P50V2JN-3GP
DY
EC4901
SC33P50V2JN-3GP
DY
12
EC4903
SCD1U10V2KX-5GP
DY
EC4903
SCD1U10V2KX-5GP
DY
1 2
C4906 SCD1U25V2KX-GPC4906 SCD1U25V2KX-GP
1AFTP4906AFTP4906
1
2
3
4 5
6
7
8
RN4901
SRN100J-4-GP
RN4901
SRN100J-4-GP
1 2
R4907
100KR2J-1-GP
R4907
100KR2J-1-GP
12
C4901
SCD1U10V2KX-5GP
C4901
SCD1U10V2KX-5GP
1
2
3
D4901
BAT54CPT-GP
D4901
BAT54CPT-GP
12 R4905
100KR2J-1-GP
DY
R4905
100KR2J-1-GP
DY
1
3
5
7
9
11
13
15 17
19
31
2
4
6
8
10
12
14 16
18
20
30
29
28
27
26
25
24
23
22
21
32
NP1
NP2
LCD1
ETY-CONN30E-2-GP-U2
LCD1
ETY-CONN30E-2-GP-U2
1 2
C4902
SC1U6D3V2KX-GP
C4902
SC1U6D3V2KX-GP
2
13
R1
R2
Q4903
PDTC144EU-1-GP
R1
R2
Q4903
PDTC144EU-1-GP
12 R4908
0R3J-0-U-GP
R4908
0R3J-0-U-GP
1TP4904TPAD14-GPTP4904TPAD14-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CRT_DDCCLK_CON
CRT_VSYNC_CON
CRT_DDCDATA_CON
CRT_HSYNC_CON
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT_B
CRT_R
CRT_G
CRT_HSYNC_CON
CRT_VSYNC_CON
5V_CRT_S0
CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_B
CRT_R
CRT_G
CRT_R
CRT_GCRT_GREEN_R
CRT_B
CRT_RED_R
CRT_BLUE_R
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT_R
CRT_B
CRT_G
CRT_HSYNC_CON
CRT_VSYNC_CON
CRT_RED_R
CRT_GREEN_R
CRT_BLUE_R
CRT_DDCDATA_CON
CRT_DDCCLK_CON
SYNCOE#
CRT_HSYNC_CONCRT_HSYNC1_1
CRT_VSYNC_CONCRT_VSYNC1_1
5V_CRT_S0
5V_CRT_S0
5V_CRT_S0_R 5V_S0
5V_CRT_S0_R
5V_CRT_S0
5V_CRT_S0
5V_CRT_S0
VGA_CRT_RED85 VGA_CRT_GREEN85 VGA_CRT_BLUE85
CRT_RED6 CRT_GREEN6 CRT_BLUE6
VGA_CRT_DDCDATA85 VGA_CRT_DDCCLK85
DDCDATA6 DDCCLK6
CRT_VSYNC6
CRT_HSYNC6
VGA_CRT_HSYNC83,85
VGA_CRT_VSYNC83,85
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DCIN
A3
50 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DCIN
A3
50 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DCIN
A3
50 109Friday, April 22, 2011
<Core Design>
SSID = VIDEO
Layout Note:
*Pi-filter & 150 Ohm pull-down
resistors should be as close
as to CRT CONN.
* RGB signal will hit 75 Ohm
first, then pi-filter, finally
CRT CONN.
For UMA CRT
CRT Hsync & Vsync level shift
CRT RGB
20.20948.015
For DIS CRT
68.00119.231
X01
500mA
X01
X01
For UMA CRT
For DIS CRT
X02
OE#
1
A
2
GND
3Y4
VCC 5
U5002
74AHCT1G125GW-1-GP
U5002
74AHCT1G125GW-1-GP
1
2 3
4
RN5002
SRN4K7J-8-GP
RN5002
SRN4K7J-8-GP
1
2
3
D5002
BAV99PT-GP-U
DY
D5002
BAV99PT-GP-U
DY
12
C5006
SC10P50V2JN-4GP
C5006
SC10P50V2JN-4GP
1 2
R5004
10R2J-2-GP
R5004
10R2J-2-GP
1 2
R5008 0R0402-PADR5008 0R0402-PAD
1 2
R5001
10R2J-2-GP
R5001
10R2J-2-GP
1
AFTP501AFTP501
2 1
D5004
CH551H-30PT-GP
D5004
CH551H-30PT-GP
12
C5005
SC10P50V2JN-4GP
C5005
SC10P50V2JN-4GP
CRT_RED
1
CRT_GREEN
2
CRT_BLUE
3
NC#4 4
VCC_CRT
9
NC#11 11
DDCDATA_ID1
12
DDCCLK_ID3
15
VSYNC
14
HSYNC
13
GND 5
GND 6
GND 7
GND 8
GND 10
CHASSIS#16 16
CHASSIS#17 17
CRT1
D-SUB-15-129-GP
CRT1
D-SUB-15-129-GP
1 2
R5010 0R0402-PADR5010 0R0402-PAD
1 2
L5003
SBK160808T-300Y-N-GP
L5003
SBK160808T-300Y-N-GP
12
C5012
SC100P50V2JN-3GP
DY
C5012
SC100P50V2JN-3GP
DY
1 2
R5007 0R2J-2-GP
DY
R5007 0R2J-2-GP
DY
1
2
3
4 5
6
7
8
RN5003
SRN0J-7-GP
DY
RN5003
SRN0J-7-GP
DY
12
C5015
SC100P50V2JN-3GP
DY
C5015
SC100P50V2JN-3GP
DY
12
C5003
SC8P250V2CC-GP
C5003
SC8P250V2CC-GP
12
C5004
SC8P250V2CC-GP
C5004
SC8P250V2CC-GP
1
2 3
4
RN
0R4P2R-PAD
RN5006
RN
0R4P2R-PAD
RN5006
1
AFTP503AFTP503
1 2
L5001
SBK160808T-300Y-N-GP
L5001
SBK160808T-300Y-N-GP
12
C5014
SC18P50V2JN-1-GP
DY
C5014
SC18P50V2JN-1-GP
DY
1
AFTP504AFTP504
12
C5013
SC18P50V2JN-1-GP
DY
C5013
SC18P50V2JN-1-GP
DY
1
AFTP509AFTP509
1
AFTP508AFTP508
1
AFTP506AFTP506
1
2 3
4
RN5005
SRN0J-6-GP
DY
RN5005
SRN0J-6-GP
DY
OE#
1
A
2
GND
3Y4
VCC 5
U5001
74AHCT1G125GW-1-GP
U5001
74AHCT1G125GW-1-GP
1
AFTP505AFTP505
1 2
L5002
SBK160808T-300Y-N-GP
L5002
SBK160808T-300Y-N-GP
12
C5002
SC8P250V2CC-GP
C5002
SC8P250V2CC-GP
12
C5009
SC22P50V2JN-4GP
DY
C5009
SC22P50V2JN-4GP
DY
1
AFTP507AFTP507
1 2
R5009 0R2J-2-GP
DY
R5009 0R2J-2-GP
DY
1 2
R5031 0R0402-PADR5031 0R0402-PAD
1
2
3
D5003
BAV99PT-GP-U
DY
D5003
BAV99PT-GP-U
DY
1 2
C5011
SC33P50V2JN-3GP
DY
C5011
SC33P50V2JN-3GP
DY
12
C5008
SC22P50V2JN-4GP
DY
C5008
SC22P50V2JN-4GP
DY
1
AFTP502AFTP502
1 2
F5001
FUSE-1D1A6V-4GP-U
69.50007.691
2nd = 69.50007.771
F5001
FUSE-1D1A6V-4GP-U
69.50007.691
2nd = 69.50007.771
1
2
3
4 5
6
7
8
RN5001
SRN150F-1-GP
RN5001
SRN150F-1-GP
12
C5001
SC33P50V2JN-3GP
DY
C5001
SC33P50V2JN-3GP
DY
1
2
3
4 5
6
7
8
RN
0R8P4R-PAD-1-GP
RN5004
RN
0R8P4R-PAD-1-GP
RN5004
12
C5007
SC10P50V2JN-4GP
C5007
SC10P50V2JN-4GP
1
2
3
D5001
BAV99PT-GP-U
DY
D5001
BAV99PT-GP-U
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDC_DATA_HDMI
DDC_CLK_HDMI
DDC_DATA_HDMI
DDC_CLK_HDMIAPU_HDMI_DATA1#
APU_HDMI_DATA1
APU_HDMI_DATA2#
APU_HDMI_DATA2
APU_HDMI_CLK#
APU_HDMI_CLK
APU_HDMI_DATA0#
APU_HDMI_DATA0
HDMI_PLL_GND
HPD_HDMI_CON
5V_CRT_S0_R
5V_S0
5V_S0
PCH_HDMI_CLK_R6PCH_HDMI_DATA_R6
APU_HDMI_DATA2 6
APU_HDMI_DATA2# 6
APU_HDMI_DATA1 6
APU_HDMI_DATA1# 6
APU_HDMI_DATA0 6
APU_HDMI_DATA0# 6
APU_HDMI_CLK 6
APU_HDMI_CLK# 6
DP1_HPD 6
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HDMI Level Shifter/Connector
A3
51 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HDMI Level Shifter/Connector
A3
51 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HDMI Level Shifter/Connector
A3
51 109Friday, April 22, 2011
<Core Design>
HDMI Level Shifter & CONNECTOR
Impedance:100 ohm
HDMI CONN
checklist:
suggestion to stuff 604-ohm for UMA and PX
22.10296.171
0819
X01
84.2N702.J31
2nd = 84.07002.I31
SSID = VIDEO
12
R5121 499R2F-2-GPR5121 499R2F-2-GP
12
R5118 499R2F-2-GPR5118 499R2F-2-GP
12
R5120 499R2F-2-GPR5120 499R2F-2-GP
12
R5117 499R2F-2-GPR5117 499R2F-2-GP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
2021
2223
HDMI1
SKT-HDMI19P-63-GP-U
HDMI1
SKT-HDMI19P-63-GP-U
1
2 3
4
RN5101
SRN2K2J-1-GP
RN5101
SRN2K2J-1-GP
1 2
R51300R0402-PAD R51300R0402-PAD
12
R5116 499R2F-2-GPR5116 499R2F-2-GP
12
R5132
2K2R2J-2-GP
DY
R5132
2K2R2J-2-GP
DY
1 2
R51290R0402-PAD R51290R0402-PAD
12
R5114 499R2F-2-GPR5114 499R2F-2-GP
1 2
R5131
1KR2J-1-GP
R5131
1KR2J-1-GP
G
S
D
Q5103
2N7002K-2-GP
Q5103
2N7002K-2-GP
12
R5115 499R2F-2-GPR5115 499R2F-2-GP
12
C5102
SCD1U10V2KX-5GP
C5102
SCD1U10V2KX-5GP
12
R5119 499R2F-2-GPR5119 499R2F-2-GP
12
R5113
100KR2J-1-GP
DY
R5113
100KR2J-1-GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
eDP
A3
52 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
eDP
A3
52 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
eDP
A3
52 109Friday, April 22, 2011
<Core Design>
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
53 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
53 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
53 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
54 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
54 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
54 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
ITP
A3
55 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
ITP
A3
55 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
ITP
A3
55 109Friday, April 22, 2011
<Core Design>
SSID = User.Interface
ITP Connector
CPU
TCK(PIN AC5)
FBO(PIN 11)
TCK(PIN 5)
ITP Connector
H_CPURST# use pull-up Resistor close
ITP connector 500 mil ( max ),
others place near CPU side.
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_ODD_DA#_C
SATA_ODD_PWRGT
ODD_PWRGT# SATA_ODD_DA#
ODD_PWR_5V
SATA_ODD_DA#_C
SATA_RX1-_C
SATA_RX1+_C
SATA_RXP0
SATA_RXN0
HDD1_21
HDD1_22
HDD1_20
5V_S0
3D3V_S0
3D3V_S03D3V_S0
ODD_PWR_5V
5V_S0
3D3V_S0
5V_S0
3D3V_S0
5V_S0
SATA_ODD_PWRGT19
SATA_ODD_DA# 17
ODD_DA_Q 18
SATA_ODD_PRSNT#18
SATA_TXP119 SATA_TXN119
SATA_RXN1_C19 SATA_RXP1_C19
SATA_TXP019 SATA_TXN019
SATA_RXN0_C19 SATA_RXP0_C19
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HDD/ODD
A3
56 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HDD/ODD
A3
56 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
HDD/ODD
A3
56 109Friday, April 22, 2011
<Core Design>
SSID = SATA
SATA_RX- and SATA_RX+ Trace
Length match within 20 mil
SATA HDD Connector
ODD Connector
integrated PU
Current limit
Active High
typ =>2A
100 mil
22.10300.201
0712
0720: Modify Zero ODD Circuit
When the drive is powered on, the FET to the MD/DA pin drive is OFF.
When the drive is powered off, the FET to the MD/DA pin is ON
0721 Remove ODD_DA PU
0720: Modify Zero ODD Circuit
62.10065.H71
X01
X01
12
C5606
SCD1U10V2KX-5GP
C5606
SCD1U10V2KX-5GP
12
R5607 0R2J-2-GP
DY
R5607 0R2J-2-GP
DY
G
S
D
Q5601
2N7002K-2-GP
84.2N702.J31
DY
Q5601
2N7002K-2-GP
84.2N702.J31
DY
12
C5604
SCD1U10V2KX-5GP
DY
C5604
SCD1U10V2KX-5GP
DY
12
R5604
0R2J-2-GP
R5604
0R2J-2-GP
GND
1IN#2
2IN#3
3EN/EN#
4OC# 5
OUT#6 6
OUT#7 7
OUT#8 8
U5601
G547F1P81U-GP
2ND =
74.00547.C79
DY
U5601
G547F1P81U-GP
2ND =
74.00547.C79
DY
12
C5605
SC10U10V5ZY-1GP
C5605
SC10U10V5ZY-1GP
1
AFTP5608AFTP5608
12
C5608SCD01U16V2KX-3GP C5608SCD01U16V2KX-3GP
12
R5611
10KR2J-3-GP
DY
R5611
10KR2J-3-GP
DY
12
R5606
10KR2J-3-GP
DY
R5606
10KR2J-3-GP
DY
G
S
D
Q5602
2N7002K-2-GP
84.2N702.J31
DY
Q5602
2N7002K-2-GP
84.2N702.J31
DY
12
C5607SCD01U16V2KX-3GP C5607SCD01U16V2KX-3GP
1 2
C5603 SCD01U16V2KX-3GPC5603 SCD01U16V2KX-3GP
12
C5601
SC10U6D3V5KX-1GP
DY
C5601
SC10U6D3V5KX-1GP
DY
GND S1
GND S4
GND S7
V33
P1
V33
P2
V33
P3
GND P4
GND P5
GND P6
V5
P7
V5
P8
V5
P9
GND P10
DAS/DSS P11
GND P12
V12
P13
V12
P14
V12
P15
NP1 NP1
NP2 NP2
A+
S2
A-
S3
B+
S6
B-
S5
16 16
17 17
HDD1
SKT-SATA7P-15P-80-GP
HDD1
SKT-SATA7P-15P-80-GP
1
AFTP5609AFTP5609
12
R5603
0R5J-5-GP
R5603
0R5J-5-GP
1 2
C5602 SCD01U16V2KX-3GPC5602 SCD01U16V2KX-3GP
12
TC5604
SC10U10V5ZY-1GP
DY
TC5604
SC10U10V5ZY-1GP
DY
12
TC5603
SC10U10V5ZY-1GP
TC5603
SC10U10V5ZY-1GP
GND S1
A+
S2 A-
S3
GND S4
B-
S5
B+
S6
GND S7
DP
P1
+5V
P2
+5V
P3
MD
P4 GND P5
GND P6
GND 8
GND 9
ODD1
SKT-SATA7P+6P-26-GP-U
ODD1
SKT-SATA7P+6P-26-GP-U
12
R5613 0R0402-PAD
R5613 0R0402-PAD
1 2
R5612
10KR2J-3-GP
DY
R5612
10KR2J-3-GP
DY
12
R5608
0R2J-2-GP
DY
R5608
0R2J-2-GP
DY
1
AFTP5607AFTP5607
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
ESATA/USB Charger
A3
57 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
ESATA/USB Charger
A3
57 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
ESATA/USB Charger
A3
57 109Friday, April 22, 2011
<Core Design>
(Blanking)
SSID = ESATA
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_SPK_L-
AUD_SPK_L+
AUD_SPK_R-
AUD_SPK_R+
AUD_AGND
AUD_AGND
AUD_SPK_L-29
AUD_SPK_L+29 AUD_SPK_R-29 AUD_SPK_R+29
INT_MIC_L_R29,82
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Audio Jack
A3
58 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Audio Jack
A3
58 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Audio Jack
A3
58 109Friday, April 22, 2011
<Core Design>
SSID = AUDIO
Speaker
Connector
FOR EMI
0804 Change to AGND
20.F0765.004
12
EC5804
MLVG0402220NV05BP-GP-U
DY
EC5804
MLVG0402220NV05BP-GP-U
DY
1
AFTP5808AFTP5808
1 2
EC5812 SCD1U10V2KX-5GPEC5812 SCD1U10V2KX-5GP
1 2
EC5810 SCD1U10V2KX-5GP
DY
EC5810 SCD1U10V2KX-5GP
DY
1 2
EC5815 SCD1U10V2KX-5GP
DY
EC5815 SCD1U10V2KX-5GP
DY
1
AFTP5809AFTP5809
1 2
EC5811 SCD1U10V2KX-5GPEC5811 SCD1U10V2KX-5GP
12
EC5803
MLVG0402220NV05BP-GP-U
DY
EC5803
MLVG0402220NV05BP-GP-U
DY
4
3
2
1
56
SPK1
ACES-CON4-4-GP
SPK1
ACES-CON4-4-GP
1 2
EC5814 SCD1U10V2KX-5GP
DY
EC5814 SCD1U10V2KX-5GP
DY
1
2
3
4
MIC2
ACES-CON2-19-GP
DY
MIC2
ACES-CON2-19-GP
DY
1
AFTP5803AFTP5803
1 2
EC5813 SCD1U10V2KX-5GP
DY
EC5813 SCD1U10V2KX-5GP
DY
12
EC5801
MLVG0402220NV05BP-GP-U
DY
EC5801
MLVG0402220NV05BP-GP-U
DY
12
EC5802
MLVG0402220NV05BP-GP-U
DY
EC5802
MLVG0402220NV05BP-GP-U
DY
1
AFTP5801AFTP5801
1
AFTP5804AFTP5804
1
AFTP5805AFTP5805
1
AFTP5802AFTP5802
www.bblianmeng.com
LAN_MDI0P
LAN_MDI0N
LAN_MDI1P
LAN_MDI1N
MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+
MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+
MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-
MDO1-MDO1-MDO1-
MDO0+
MDO0-
MDO2-
MDO1-
MDO3+
MDO3-
MDO1-MDO1-MDO1-MDO1-MDO1-MDO1-
MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+
MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-
MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+
MDO2+
MDO2- MDO3+
MDO3-
MDO0+
MDO0-
MDO3+
MDO1+
MDO3-
MDO2+
MDO2-
MDO1-
MDO2+
MDO1+
LAN_MDI0P31
LAN_MDI1N31
LAN_MDI1P31
LAN_MDI0N31
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LAN
A3
59 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LAN
A3
59 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LAN
A3
59 109Friday, April 22, 2011
<Core Design>
LAN TransFormer
RJ45
22.10177.J61
X01
X01
X01
X02
SSID = LOM
12
C5911SC1KP2KV6KX-GP
Non-Surge
C5911SC1KP2KV6KX-GP
Non-Surge
12
R5901
75R5F-1-GP
R5901
75R5F-1-GP
12
R5902
75R5F-1-GP
R5902
75R5F-1-GP
1
2
3
6
7
89
10
11
14
15
16
1CT:1CT
1CT:1CT
Tx Side
Rx Side
XF5901
XFORM-12P-36-GP
1CT:1CT
1CT:1CT
Tx Side
Rx Side
XF5901
XFORM-12P-36-GP
1
AFTP5908AFTP5908
1 2
R5904 0R3J-0-U-GP
Non-Surge
R5904 0R3J-0-U-GP
Non-Surge
1
AFTP5907AFTP5907
1
AFTP5904AFTP5904
1
AFTP5903AFTP5903
1
AFTP5901AFTP5901
12
C5902 SC1KP3KV8KX-GP-U
Surge
C5902 SC1KP3KV8KX-GP-U
Surge
12
C5903
SC1KP3KV8KX-GP-U
Surge
C5903
SC1KP3KV8KX-GP-U
Surge
1
2
3
4
5
6
EU5901
TVLST2304AD0-GP
Surge
EU5901
TVLST2304AD0-GP
Surge
12
C5901 SC1KP3KV8KX-GP-U
Surge
C5901 SC1KP3KV8KX-GP-U
Surge
1
AFTP5905AFTP5905
1 2
R5903 0R3J-0-U-GP
Non-Surge
R5903 0R3J-0-U-GP
Non-Surge
1
2 3
4
RN5901
SRN75J-2-GP-U
RN5901
SRN75J-2-GP-U
1 2
ES5902
GT1206150ASMD-GP
Surge
ES5902
GT1206150ASMD-GP
Surge
12
C5904
SCD01U16V2KX-3GP
C5904
SCD01U16V2KX-3GP
1 2
ES5901
GT1206150ASMD-GP
Surge
ES5901
GT1206150ASMD-GP
Surge
1
AFTP5902AFTP5902
1
AFTP5906AFTP5906
1
2
3
4
5
6
7
8
9
10
NP1
NP2
RJ45
RJ45-8P-76-GP
RJ45
RJ45-8P-76-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPI_SO SPI_VCC
SPI_HOLD_0#
SPI_POWR
EC_SPI_WP#_R
SPI_VCC
RTC_PWR
3D3V_S5 3D3V_AUX_KBC
3D3V_AUX_KBC3D3V_S5
RTC_AUX_S5 3D3V_AUX_S5
+RTC_VCC
3D3V_S0
EC_SPI_CS#27
EC_SPI_WP#27 EC_SPI_DI27 EC_SPI_CLK 27
EC_SPI_DO 27
RTC_SENSE 17
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Flash/RTC
A3
60 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Flash/RTC
A3
60 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Flash/RTC
A3
60 109Friday, April 22, 2011
<Core Design>
SSID = Flash.ROM
SPI FLASH ROM (2M byte) for KBC
SSID = RBATT
Reserved 795 use LPC ROM or 791 LPC ROM used
Reserved 795 use LPC ROM or 791 LPC ROM used
Reserved 795 use LPC ROM or 791 LPC ROM used
62.70001.061
72.25Q16.001
2nd: 72.25Q16.001
3rd: 72.25F16.00P
4th: 72.02516.A01
X01
Width=20mils
12
EC6003
SC4D7P50V2CN-1GP
DY
EC6003
SC4D7P50V2CN-1GP
DY
1 2
R6001
10KR2J-3-GP
DY
R6001
10KR2J-3-GP
DY
12
C6002
SCD1U10V2KX-5GP
C6002
SCD1U10V2KX-5GP
1 2
R6009
0R0402-PAD
R6009
0R0402-PAD
PWR
1
GND
2
NP1
NP1
NP2
NP2
RTC1
BAT-AAA-BAT-054-P04-GP-U
RTC1
BAT-AAA-BAT-054-P04-GP-U
1 2
R6003 33R2J-2-GPR6003 33R2J-2-GP
1 2
R6007
0R0402-PAD
R6007
0R0402-PAD
1 2
R6005
0R2J-2-GP
DY
R6005
0R2J-2-GP
DY
CS#
1
DO/IO1
2
WP#/IO2
3
GND
4
VCC 8
HOLD#/IO3 7
CLK 6
DI/IO0 5
U6001
W25Q16BVSSIG-GP
U6001
W25Q16BVSSIG-GP
12
C6001
SC10U6D3V5KX-1GP
DY
C6001
SC10U6D3V5KX-1GP
DY
1 2
R6032
10KR2J-3-GP
DY
R6032
10KR2J-3-GP
DY
1
2 3
4
RN6002
SRN100KJ-6-GP
RN6002
SRN100KJ-6-GP
1 2
C6005
SC1U6D3V2KX-GP
C6005
SC1U6D3V2KX-GP
12
R6002
100KR2J-1-GP
R6002
100KR2J-1-GP
G
S
D
Q6001
2N7002K-2-GP
84.2N702.J31
Q6001
2N7002K-2-GP
84.2N702.J31
2
1
3
U6003
CH715FPT-GP
2nd = 83.00040.E81
83.R0304.B81
U6003
CH715FPT-GP
2nd = 83.00040.E81
83.R0304.B81
1 2
R6006
510R2J-1-GP
R6006
510R2J-1-GP
12
R6031
10MR2J-L-GP
R6031
10MR2J-L-GP
12
R6004 0R2J-2-GP
DY
R6004 0R2J-2-GP
DY
1 2
R6008
0R2J-2-GP
DY
R6008
0R2J-2-GP
DY
12
EC6001
SC4D7P50V2CN-1GP
DY
EC6001
SC4D7P50V2CN-1GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
U6102_EN USB_PN0_R
USB_PP0_R
USB_PN0_R USB_PP0_R
USB20_VCCA
USB_PN0_R
USB_PP0_R
U6102_EN
USB_PP0_R
USB_PN0_R
5V_S5 USB20_VCCA USB20_VCCA
5V_S5
5V_S5 USB20_VCCB
USB_PWR_EN#27
USB_OC#1 18
USB_PN0 18
USB_PP0 18
USB_PWR_EN#27
USB_OC#2 18
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
USB Power SW
61 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
USB Power SW
61 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
USB Power SW
61 109Friday, April 22, 2011
<Core Design>
SSID = USB
100 mil
LOW ACTIVE TYPE!!
22.10321.S01
74.00547.A79
X01
X01
100 mil
LOW ACTIVE TYPE!!
X01
X01
X02
1
AFTP6103AFTP6103
12
C6103
SCD1U16V2KX-3GP
C6103
SCD1U16V2KX-3GP
GND
1
IN#2
2
IN#3
3
EN/EN#
4
OUT#8 8
OUT#7 7
OUT#6 6
OC# 5
U6102
G547F2P81U-GP
U6102
G547F2P81U-GP
1 2
R6101
0R0402-PAD
R6101
0R0402-PAD
1 2
R6102 0R0603-PAD
R6102 0R0603-PAD
12
C6104
SC10U10V5ZY-1GP
DY
C6104
SC10U10V5ZY-1GP
DY
5
1
2
3
4
6
USB2
SKT-USB6-16-GP
USB2
SKT-USB6-16-GP
1
AFTP6104AFTP6104
1
AFTP6101AFTP6101
12
TC6102
ST220U6D3VDM-15GP
DY
TC6102
ST220U6D3VDM-15GP
DY
12
TC6103
ST100U6D3VBML1GP
TC6103
ST100U6D3VBML1GP
12
C6105
SC6D8P50V2DN-GP
C6105
SC6D8P50V2DN-GP
12
C6107
SCD1U16V2KX-3GP
C6107
SCD1U16V2KX-3GP
12
C6101
SC1U10V3ZY-6GP
C6101
SC1U10V3ZY-6GP
12
C6102
SC1U10V3ZY-6GP
C6102
SC1U10V3ZY-6GP
12
C6108
SC10U10V5ZY-1GP
DY
C6108
SC10U10V5ZY-1GP
DY
1 2
R6103 0R0603-PAD
R6103 0R0603-PAD
1 2
R6104
0R0402-PAD
R6104
0R0402-PAD
1
AFTP6102AFTP6102
12
C6106
SC6D8P50V2DN-GP
C6106
SC6D8P50V2DN-GP
GND
1
IN#2
2
IN#3
3
EN/EN#
4
OUT#8 8
OUT#7 7
OUT#6 6
OC# 5
U6101
G547F2P81U-GP
U6101
G547F2P81U-GP
12
TC6101
ST220U6D3VDM-15GP
DY
TC6101
ST220U6D3VDM-15GP
DY
ESD I/O1
1
GND
2
ESD I/O2
3VP 5
ESD I/O3 4
ESD I/O4 6
U6105
IP4220CZ6-GP
DY
U6105
IP4220CZ6-GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
USB 3.0
A3
62 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
USB 3.0
A3
62 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
USB 3.0
A3
62 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Bluetooth
A3
63 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Bluetooth
A3
63 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Bluetooth
A3
63 109Friday, April 22, 2011
<Core Design>
SSID = User.Interface
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
F/P
A3
64 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
F/P
A3
64 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
F/P
A3
64 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
WLAN_ACT
USB_P1+
USB_P1-
USB_P1-
USB_P1+
WLAN_ACT
+5V_MINI_DEBUG
LED_WLAN#
LED_WPAN#
BT_ACT
3D3V_S0 1D5V_S0
5V_S5
3D3V_S0
1D5V_S0
3D3V_S0
1D5V_S0
1D5V_S0
3D3V_S0
3D3V_S0
5V_S5
USB_PP118
USB_PN118
PLT_RST# 17,31,71,83
WIFI_RF_EN 27
PCH_SMBDATA 14,15
PCH_SMBCLK 14,15
CLK_PCIE_WLAN_REQ#18
CLK_PCIE_WLAN#17 CLK_PCIE_WLAN17
E51_RXD27 E51_TXD27
PCIE_RXN217 PCIE_RXP217
PCIE_TXN217 PCIE_TXP217
BLUETOOTH_EN27 LED_WLAN# 68
LED_WPAN# 68
BLUETOOTH_EN27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
MINICARD(WLAN)/ITP CONN
A3
65 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
MINICARD(WLAN)/ITP CONN
A3
65 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
MINICARD(WLAN)/ITP CONN
A3
65 109Friday, April 22, 2011
<Core Design>
SSID = Wireless
Mini Card Connector(802.11a/b/g/n)
05/19 Add Common Mode Choke
2010/07/16 Change CMC L6401 to smaller 69.10118.001 (the same same as other CMCs on MB) and rename L6401 to TR6501.
Change R6406,R6405 to 0R 0402 size
X01
X01
0726
X01
2010/07/09 Pop R6510 for Wifi/BT combo module
X01
X01
X01
X02
12
C6510
SC6D8P50V2DN-GP
C6510
SC6D8P50V2DN-GP
12
C6509
SC6D8P50V2DN-GP
C6509
SC6D8P50V2DN-GP
12
C6503
SC10U6D3V5KX-1GP
C6503
SC10U6D3V5KX-1GP
12
C6502
SCD1U16V2KX-3GP
C6502
SCD1U16V2KX-3GP
1 2
R6406
0R0402-PAD
R6406
0R0402-PAD
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
53
54
NP1
NP2
WLAN1
SKT-MINI52P-41-GP
WLAN1
SKT-MINI52P-41-GP
1 2
R6503 0R3J-0-U-GP
DY
R6503 0R3J-0-U-GP
DY
1 2
R6510 0R3J-0-U-GP
R6510 0R3J-0-U-GP
12
C6505
SC10U6D3V5KX-1GP
DY
C6505
SC10U6D3V5KX-1GP
DY
12
C6504
SCD1U16V2KX-3GP
C6504
SCD1U16V2KX-3GP
12
C6506
SCD1U16V2KX-3GP
C6506
SCD1U16V2KX-3GP
12
C6508
SC220P50V2KX-3GP
DY
C6508
SC220P50V2KX-3GP
DY
1 2
R6535 0R2J-2-GP
DY
R6535 0R2J-2-GP
DY
1 2
R6405
0R0402-PAD
R6405
0R0402-PAD
12
C6501
SCD1U16V2KX-3GP
DY
C6501
SCD1U16V2KX-3GP
DY
1
AFTP6505AFTP6505
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
WWAN
A3
66 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
WWAN
A3
66 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
WWAN
A3
66 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
67 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
67 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
67 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDD_LED_A
LED_PWR
SATA_LED_R
SATA_LED_R
WHITE_LED_BAT# BAT_WHITE#
AMBER_LED_BAT# BAT_AMBER#
AMBER_LED_BAT#
WHITE_LED_BAT#
FPOWER_LED_ALED_PWR
WLAN_LED#_R WLAN_LED_BWLAN_LED_RW LAN_LED_R
KBC_PWRBTN#_C
5V_S0
5V_S5
5V_S5
5V_S0
PWRLED#27
BATT_WHITE_LED#27 CHG_AMBER_LED#27
SATA_LED#19
WLAN_LED#27
LED_WLAN#65
LED_WPAN#65
KBC_PWRBTN#27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LED Bard/Power Button
A3
68 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LED Bard/Power Button
A3
68 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LED Bard/Power Button
A3
68 109Friday, April 22, 2011
<Core Design>
Power button
20.K0464.004
WHITE
AMBER
FRONT POWER LED
SATA HDD LED(White)
Battery LED2(WHITE_LED)
Battery LED1(AMBER_LED)
84.00124.H1K
84.00124.H1K
83.00326.G70
83.01221.R70
83.01221.R70
Wireless LED
X01
X01
SSID = User.Interface
12
R6803
499R2F-2-GP
R6803
499R2F-2-GP
1 2
R6839 0R2J-2-GP
DY
R6839 0R2J-2-GP
DY
1 2
EC6809 SC220P50V2KX-3GP
DY
EC6809 SC220P50V2KX-3GP
DY
1 2
R6835
0R0402-PAD
R6835
0R0402-PAD
1 2
EC6810 SC220P50V2KX-3GP
DY
EC6810 SC220P50V2KX-3GP
DY
1 2
EC6807 SC220P50V2KX-3GP
DY
EC6807 SC220P50V2KX-3GP
DY
1 2
R6833
330R2J-3-GP
R6833
330R2J-3-GP
1 2
3
A K
HDLED1
LED-W-27-GP
A K
HDLED1
LED-W-27-GP
1
AFTP6802AFTP6802
1
AFTP6801AFTP6801
5
1B
2B
3B
4B
1A
2A
3A
4A 6
PWRBT1
ACES-CONN8G-GP
PWRBT1
ACES-CONN8G-GP
12
3
A K
PLED1
LED-W-27-GP
A K
PLED1
LED-W-27-GP
1 2
3
AK
WLED1
LED-W-27-GP
83.01221.R70
AK
WLED1
LED-W-27-GP
83.01221.R70
1 2
R6806
330R2J-3-GP
R6806
330R2J-3-GP
E
BC
R1
R2
Q6805
PDTA143ET-GP
84.00143.M11
R1
R2
Q6805
PDTA143ET-GP
84.00143.M11
1
3
2
CHLED1
LED-OW-3-GP
CHLED1
LED-OW-3-GP
1
2
3
D6831
BAW56-2-GP
D6831
BAW56-2-GP
1 2
R6812
330R2J-3-GP
R6812
330R2J-3-GP
E
BC
R1
R2
Q6807
PDTC124EU-1-GP
DY
R1
R2
Q6807
PDTC124EU-1-GP
DY
1 2
R6802
100R2J-2-GP
R6802
100R2J-2-GP
E
BC
R1
R2
Q6808
PDTC124EU-1-GP
DY
R1
R2
Q6808
PDTC124EU-1-GP
DY
1 2
R6836
0R0402-PAD
R6836
0R0402-PAD
12
EC6832
SC220P50V2KX-3GP
DY
EC6832
SC220P50V2KX-3GP
DY
1 2
R6801
330R2J-3-GP
R6801
330R2J-3-GP
E
BC
R1
R2
Q6801
PDTC124EU-1-GP
DY
R1
R2
Q6801
PDTC124EU-1-GP
DY
1 2
EC6801 SC220P50V2KX-3GP
DY
EC6801 SC220P50V2KX-3GP
DY
1 2
R6834
0R0402-PAD
R6834
0R0402-PAD
E
BC
R1
R2
Q6831
PDTA144VT-GP
84.00144.P11
R1
R2
Q6831
PDTA144VT-GP
84.00144.P11
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPDATA
5V_S0
TPCLK
KCOL13
KCOL4
KROW7
KCOL10
KCOL3
KROW5
KCOL12
KCOL5
KCOL11
KCOL8
KROW2
KCOL0
KROW0
KCOL9
KCOL6
KROW4
KCOL2
KROW3
KCOL15
KCOL14
KCOL7
KROW6
KCOL1
KROW1
KCOL16
CAP_LED_R
CAP_LED_RCAP_LED_Q
CAP_LED_1
5V_S0
CAP_LED_R
CAP_LED_R
5V_S5
5V_S0
KROW[0..7] 27
KCOL[0..16] 27
KB_DET# 27
CAP_LED#27
TPCLK27 TPDATA27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Key Board/Touch Pad
A3
69 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Key Board/Touch Pad
A3
69 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Key Board/Touch Pad
A3
69 109Friday, April 22, 2011
<Core Design>
TouchPad Connector
20.K0464.004
SSID = KBC
X01
20101116 X02 Modify:
Change R6906 to 1K from 390ohm for
fine tune LED illumination.
20101118 X02:
Dell recommand: change all white LEDs resistor to 620 ohm.
20101202 X02:
Dell recommand: change all white LEDs resistor to 604 ohm.
CAP_LED:(X01 Low actived)
Connect to KB driving internal LED directly.(MAX 25mA)
1
AFTP6919AFTP6919
1
AFTP6930AFTP6930
1
AFTP6917AFTP6917
1
AFTP6929AFTP6929
1
AFTP6915AFTP6915
1 2
R6905
15KR2J-1-GP
R6905
15KR2J-1-GP
1 2
R6906
604R2F-2-GP
R6906
604R2F-2-GP
1
AFTP6913AFTP6913
1
AFTP6901AFTP6901
1
AFTP6911AFTP6911
12
C6903
SC33P50V2JN-3GP
DY
C6903
SC33P50V2JN-3GP
DY
1
AFTP6957AFTP6957
1
23
4
RN6901
SRN10KJ-5-GP
RN6901
SRN10KJ-5-GP
1
AFTP6909AFTP6909
1
AFTP6926AFTP6926
1
AFTP6907AFTP6907
1
AFTP6924AFTP6924
1
AFTP6927AFTP6927
1
AFTP6905AFTP6905
1
AFTP6922AFTP6922
1
AFTP6920AFTP6920
1
AFTP6972AFTP6972
1
AFTP6918AFTP6918
1 2
R6907 100R2J-2-GP
DY
R6907 100R2J-2-GP
DY
1
AFTP6916AFTP6916
1
AFTP6902AFTP6902
E
BC
R1
R2
Q6902
PDTA143ET-GP
84.00143.M11
2nd = 84.02143.011
3rd = 84.00143.N11
R1
R2
Q6902
PDTA143ET-GP
84.00143.M11
2nd = 84.02143.011
3rd = 84.00143.N11
1
AFTP6931AFTP6931
1
AFTP6914AFTP6914
1
AFTP6912AFTP6912
12
C6902
SC33P50V2JN-3GP
DY
C6902
SC33P50V2JN-3GP
DY
1
AFTP6903AFTP6903
1
AFTP6910AFTP6910
5
1B
2B
3B
4B
1A
2A
3A
4A 6
TPAD1
ACES-CONN8G-GP
TPAD1
ACES-CONN8G-GP
1
AFTP6908AFTP6908
1
AFTP6925AFTP6925
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
KB1
JAE-CON30-7-GP
20.K0565.030
KB1
JAE-CON30-7-GP
20.K0565.030
1
AFTP6923AFTP6923
12
C6901
SCD1U10V2KX-5GP
C6901
SCD1U10V2KX-5GP
1
AFTP6906AFTP6906
1
AFTP6904AFTP6904
1
AFTP6921AFTP6921
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3D3V_S5
3D3V_S5
LID_CLOSE# 27,82
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Hall Effect Sensor
A4
70 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Hall Effect Sensor
A4
70 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Hall Effect Sensor
A4
70 109Friday, April 22, 2011
<Core Design>
SSID = Hall.Sensor
-1_0623
12
C6904
SCD047U16V2KX-1-GP
DY
C6904
SCD047U16V2KX-1-GP
DY
1
2
3
4
5 6
7
8
9
10
NP1
NP2
HALL1
ACES-CONN10C-2-GP
20.F1513.010
DY
HALL1
ACES-CONN10C-2-GP
20.F1513.010
DY
12
R6901
100KR2J-1-GP
DY
R6901
100KR2J-1-GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LPC_AD2_R_DB1
LPC_AD1_R_DB1
LPC_AD0_R_DB1
LPC_FRAME#_R
DBRDY3
APU_TEST19_PLLTEST0_R
APU_TRST#_R
DBRDY2
APU_TEST18_PLLTEST1_R
DBRDY1
DBRDY3
DBRDY2
DBRDY1
LPC_AD3_R_DB1
LPC_AD3_R_DB1
LPC_AD0_R_DB1
LPC_AD2_R_DB1
LPC_AD1_R_DB1 3D3V_S0
1D8V_S0
APU_TRST#6 APU_TDO 6
APU_TEST19_PLLTEST0 6
APU_TEST18_PLLTEST1 6
H_CPUPWRGD 6,17,36,42
APU_RST_L_BUF 6
APU_TCK 6
APU_TMS 6
APU_TDI 6
APU_DBREQ# 6
APU_DBRDY 6
PLT_RST#17,31,65,83
LPC_FRAME#17,27
LPC_AD217,27 LPC_AD317,27
LPC_AD017,27 LPC_AD117,27
CLK_PCI_LPC17,21
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Dubug connector
A4
71 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Dubug connector
A4
71 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Dubug connector
A4
71 109Friday, April 22, 2011
<Core Design>
SSID = Debug
20.D0183.110
HDT+ Connectors
CRB:placed 0-ohm
checklist:if both SCAN and HDT+ header are implement
placed 15-ohm
DY HDT+
X01
X02
Layout close to SB
PCB Footprint = PAD-10P-177042
1TP7106 TPAD14TP7106 TPAD14
1TP7103 TPAD14TP7103 TPAD14 1
TP7111TPAD14 TP7111TPAD14
1
TP7113TPAD14 TP7113TPAD14
1
TP7114TPAD14 TP7114TPAD14
1 2
R7107
0R2J-2-GP
DY
R7107
0R2J-2-GP
DY
1 2 R7106 0R2J-2-GP
DY
R7106 0R2J-2-GP
DY
1 2
R7102 0R2J-2-GP
DY
R7102 0R2J-2-GP
DY
1
TP7117TPAD14 TP7117TPAD14
1TP7107 TPAD14TP7107 TPAD14
1TP7104 TPAD14TP7104 TPAD14
1TP7102 TPAD14TP7102 TPAD14
1TP7101 TPAD14TP7101 TPAD14
1
2
3
4
5
6
7
8
9
10
11
12
DB1
MLX-CON10-7-GP
DY
DB1
MLX-CON10-7-GP
DY
1
2
3
4 5
6
7
8
RN7102
SRN0J-7-GP
DY
RN7102
SRN0J-7-GP
DY
1
TP7110TPAD14 TP7110TPAD14
1TP7105 TPAD14TP7105 TPAD14
1
TP7109TPAD14 TP7109TPAD14
1
2
3
45
6
7
8
RN7101
SRN10KJ-6-GP
DY
RN7101
SRN10KJ-6-GP
DY
1
TP7112TPAD14 TP7112TPAD14
1
TP7108TPAD14 TP7108TPAD14
1
TP7115TPAD14 TP7115TPAD14
1
TP7116TPAD14 TP7116TPAD14 1 2 R7105 0R2J-2-GP
DY
R7105 0R2J-2-GP
DY
1 2
R71010R2J-2-GP
DY
R71010R2J-2-GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RESERVED
A3
72 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RESERVED
A3
72 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RESERVED
A3
72 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
73 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
73 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
73 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XD_D1/SD_D5/MS_D0
XD_D0/SD_CLK/MS_D2_R
XD_RDY/SD_WP/MS_CLK
XD_WE#/SD_CD#
XD_D2/SD_CMD
XD_CLE/SD_D0/MS_D7
XD_D4/SD_D3/MS_D1
XD_D5/SD_D2/MS_D5
XD_CE#/SD_D1
XD_ALE/SD_D7/MS_D3
XD_D0/SD_CLK/MS_D2_R
XD_D0/SD_CLK/MS_D2_R
3D3V_CARD_S0
3D3V_CARD_S0
XD_D2/SD_CMD32
XD_WE#/SD_CD#32
XD_RDY/SD_WP/MS_CLK32
XD_CLE/SD_D0/MS_D732
XD_D4/SD_D3/MS_D132
XD_D5/SD_D2/MS_D532 XD_CE#/SD_D132
XD_RE#/MS_INS# 32
XD_D6/MS_BS 32
XD_D1/SD_D5/MS_D0 32
XD_D4/SD_D3/MS_D1 32
XD_ALE/SD_D7/MS_D3 32
XD_RDY/SD_WP/MS_CLK 32
XD_D0/SD_CLK/MS_D232
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
CARD Reader Connector
A3
74 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
CARD Reader Connector
A3
74 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
CARD Reader Connector
A3
74 109Friday, April 22, 2011
<Core Design>
For EMI
SSID = SDIO
SD/XD/MS Card Reader
0810 Vendor Recommand
For EMI
SD_DAT2
1
MS_VSS 2
SD_CD/DAT3/MMC_RSV
3
MS_VCC
4
MS_SCLK 5
SD_CMD/MMC_CMD
6
MS_DATA3 7
MS_INS 8
SD_VSS/MMC_VSS1 9
MS_DATA2 10
SD_VDD/MMC_VDD
11 MS_DATA0 12
MS_DATA1 13
SD_CLK/MMC_CLK
14
MS_BS 15
MS_VSS 16
SD_VSS/MMC_VSS2 17
SD_DAT0/MMC_DAT
18
SD_DAT1
19
SD_CD
20
SD_GND 21
SD_WP/SW
22
GND 23
GND 24
NP1
NP1
NP2
NP2
CARD1
CARD-PUSH-22P-GP
20.I0110.021
CARD1
CARD-PUSH-22P-GP
20.I0110.021
12
EC7409
SC6D8P50V2DN-GP
EC7409
SC6D8P50V2DN-GP
12
C7403
SCD1U10V2KX-5GP
DY
C7403
SCD1U10V2KX-5GP
DY
12
C7402
SCD1U10V2KX-5GP
DY
C7402
SCD1U10V2KX-5GP
DY
12
EC7402
SC6D8P50V2DN-GP
EC7402
SC6D8P50V2DN-GP
12
C7401
SCD1U10V2KX-5GP
DY
C7401
SCD1U10V2KX-5GP
DY
12
C7404
SCD1U10V2KX-5GP
C7404
SCD1U10V2KX-5GP
12
R7407 33R2J-2-GPR7407 33R2J-2-GP
12
EC7403
SC4D7P50V2CN-1GP
EC7403
SC4D7P50V2CN-1GP
12
EC7408
SC6D8P50V2DN-GP
EC7408
SC6D8P50V2DN-GP
12
EC7407
SC6D8P50V2DN-GP
EC7407
SC6D8P50V2DN-GP
12
EC7410
SC6D8P50V2DN-GP
EC7410
SC6D8P50V2DN-GP
12
EC7405
SC6D8P50V2DN-GP
EC7405
SC6D8P50V2DN-GP
12
C7405
SC2D2U6D3V3KX-GP
C7405
SC2D2U6D3V3KX-GP
12
EC7406
SC6D8P50V2DN-GP
EC7406
SC6D8P50V2DN-GP
12
EC7404
SC6D8P50V2DN-GP
EC7404
SC6D8P50V2DN-GP
12
EC7401
SC6D8P50V2DN-GP
EC7401
SC6D8P50V2DN-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Express Card
A3
75 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Express Card
A3
75 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Express Card
A3
75 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
76 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
76 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
76 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
77 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
77 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
77 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A4
78 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A4
78 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A4
78 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
79 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
79 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
79 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
80 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
80 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Reserved
A3
80 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
UNUSED PARTS/EMI Capacitors
A3
81 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
UNUSED PARTS/EMI Capacitors
A3
81 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
UNUSED PARTS/EMI Capacitors
A3
81 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_PP2_R
USB_PN2_R
USB_PP6_R
USB_PN6_R
USB_PP2_R
USB_PN2_R
USB_PN6_R
USB_PP6_R
USB20_VCCB
3D3V_S5
AUD_AGND
USB_PN2 18
USB_PP2 18
USB_PN6 18
USB_PP6 18
MIC_IN_L29
AUD_HP1_JACK_R229
INT_MIC_L_R29,58
AUD_HP1_JACK_L229
EXT_MIC_JD#29 AUD_HP1_JD#29
MIC_IN_R29
LID_CLOSE#27,70
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
IO Board Connector
A3
82 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
IO Board Connector
A3
82 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
IO Board Connector
A3
82 109Friday, April 22, 2011
<Core Design>
X01
X02
X02
SSID = USB
SSID = AUDIO
1 2
R8202 0R0603-PADR8202 0R0603-PAD
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
18
IOBD2
PTWO-CON16-1-GP
20.K0429.016
IOBD2
PTWO-CON16-1-GP
20.K0429.016
1 2
R8204 0R0603-PADR8204 0R0603-PAD
1 2
R8203 0R0603-PADR8203 0R0603-PAD
1 2
R8201 0R0603-PADR8201 0R0603-PAD
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
18
IOBD1
PTWO-CON16-1-GP
20.K0429.016
IOBD1
PTWO-CON16-1-GP
20.K0429.016
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_CALRP
PWRGOOD PCIE_CALRN
PEG_C_RXP1
PEG_C_RXN1
PEG_C_RXP3
PEG_C_RXN3
PEG_TXP1
PEG_TXN1
PEG_TXP3
PEG_TXN3
PEG_TXP0
PEG_TXN0
PEG_TXP2
PEG_TXN2
PEG_C_RXP0
PEG_C_RXN0
PEG_C_RXP2
PEG_C_RXN2
ATI_RST#
U8302_Y
ATI_RST#
ATI_RST#PLT_RST#
VGA_RST#
1V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
CLK_PCIE_VGA17 CLK_PCIE_VGA#17
PEG_RXP1 4
PEG_RXN1 4
PEG_RXP3 4
PEG_RXN3 4
PEG_RXP0 4
PEG_RXN0 4
PEG_RXP2 4
PEG_RXN2 4
PEG_TXP24 PEG_TXN24
PEG_TXP04 PEG_TXN04
PEG_TXP14 PEG_TXN14
PEG_TXP34 PEG_TXN34
PE_GPIO017
1D8V_S0_VGA_PG93
GPIO5_AC_BATT85
VGA_CRT_VSYNC50,85
VGA_CRT_HSYNC50,85
BIOS_ROM_EN85
TX_PWRS_ENB85
TX_DEEMPH_EN85
BIF_GEN2_EN_A85
GPIO8_ROMSO85
VGA_DIS85
CONFIG085
CONFIG185
CONFIG285
GPIO21_BB_EN85
JTAG_TRST#_VGA85
JTAG_TCK_VGA85
JTAG_TMS_VGA85
TESTEN84
ATI_RST# 85
1D5V_VGA_PWOK17,86
APU_RST#6,17
PLT_RST#17,31,65,71
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU_PEG/STRAPPING(1/5)
A3
83 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU_PEG/STRAPPING(1/5)
A3
83 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU_PEG/STRAPPING(1/5)
A3
83 109Friday, April 22, 2011
<Core Design>
0
0
?
1
1
1
RESERVED
0
GPIO8_ROMSO
HSYNC XAUD[1]
X
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
0:Disable external BIOS ROM device
1:Enable external BIOS ROM device
Transmitter Power Savings Enable
0: 50% Tx output swing 1: Full Tx output swing
TX_PWRS_ENB
GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED
0:Tx de-emphasis disabled 1:Tx de-emphasis enabled
X XX
X
0GPIO9 0:VGA Controller capacity enabled
1:The device won't be recognized as the system's VGA controller
VGA_DIS
VIP_DEVICE_STRAP_EN
VIP Device Strap Enable indicates to the software driver that it sense
whether or not a VIP device is connected on the VIP Host interface.
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 3K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
GPIO_22_ROMCSB
STRAPS
DESCRIPTION OF DEFAULT SETTINGS
PIN
GPIO[13:11]ROMIDCFG[2:0]
BIOS_ROM_EN=1, Config[2:0] defines the ROM type
BIOS_ROM_EN=0, Config[2:0] defines the primary memory aperture size
CONFIGURATION STRAPS
BIOS_ROM_EN
X
VSYNC XAUD[0]
H2SYNC 0
0:Advertises the PCIe device as 2.5GT/s capable at power on.
1:Advertises the PCIe device as 5.0GT/s capable at power on.
RSVD
GPIO21_BB_EN
GENERICC 0RSVD
GPIO8 RESERVED 0
GPIO21 RESERVED
GPIO2BIF_GEN2_EN_A 0
RECOMMEND PLATFORM
SETTING
GPIO5GPIO5_AC_BATT optional input allow the system to request a fast
power reduction by setting GPIO5 to low. 0
0
0
0
AUD[1:0]:11-Audio for both DisplayPort and HDMI
0
0
1
GPIO0
V2SYNC
0
0 0 1
(256MB)
RESERVED
X
NC
NC
pilot run
mode
NC
"0"(PD)
Debug
mode
Normal
mode
Signal
CLK
"1"(PU)TESTEN "1"(PU)
"0"(PD) "1"(PU)JTAG_TRST#
JTAG_TCK
JTAG_TMS
"1"(PU)
"1"(PU)"1"(PU)
JTAG SIGNAL OPTION
2010/06/10
Move CAPs close to CPU
H
dGPU mode
IGPU
IGPU with BACO
PE_GPIO0
H
L
71.ROBSO.M01
2010/06/11
2010/07/13 Stuff for 5.0GT/S
2010/06/11
Need to check
PIN STRAPS
0820
X01
Colay with Seymour-XT-S3
(71.SEYMR.M01)
SSID = VIDEO
1 2
C8306 SCD1U10V2KX-5GP
DIS_PX
C8306 SCD1U10V2KX-5GP
DIS_PX
1 2
R8325 10KR2J-3-GP
DY
R8325 10KR2J-3-GP
DY
1 2
R8326 10KR2J-3-GP
DY
R8326 10KR2J-3-GP
DY
B
1
A
2
GND
3Y4
VCC 5
U8302
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
DIS_PX
U8302
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
DIS_PX
1 2
R8318 10KR2J-3-GP
DY
R8318 10KR2J-3-GP
DY
1 2
R8304 10KR2J-3-GP
DY
R8304 10KR2J-3-GP
DY
1 2
R8327 5K11R2F-L1-GP
DIS_PX
R8327 5K11R2F-L1-GP
DIS_PX
12
R8328 10KR2J-3-GP
DY
R8328 10KR2J-3-GP
DY
1 2
C8309 SCD1U10V2KX-5GP
DIS_PX
C8309 SCD1U10V2KX-5GP
DIS_PX
12
R8330
0R2J-2-GP
DY
R8330
0R2J-2-GP
DY
1 2
C8303 SCD1U10V2KX-5GP
DIS_PX
C8303 SCD1U10V2KX-5GP
DIS_PX
12
C8311
SCD1U10V2KX-4GP
DY
C8311
SCD1U10V2KX-4GP
DY
1 2
R8309 10KR2J-3-GP
DY
R8309 10KR2J-3-GP
DY
1 2
R8324
0R0402-PAD
DIS_PX
R8324
0R0402-PAD
DIS_PX
1 2
R8301 3KR2J-2-GP
DIS_PX
R8301 3KR2J-2-GP
DIS_PX
12
R8323
0R2J-2-GP
DY
R8323
0R2J-2-GP
DY
1 2
C8310 SCD1U10V2KX-5GP
DIS_PX
C8310 SCD1U10V2KX-5GP
DIS_PX
1 2
R8306 10KR2J-3-GP
DIS_PX
R8306 10KR2J-3-GP
DIS_PX
1 2
R8329 10KR2J-3-GP
DY
R8329 10KR2J-3-GP
DY
1 2
R8314 10KR2F-2-GP
DIS_PX
R8314 10KR2F-2-GP
DIS_PX
1 2
R8307 10KR2J-3-GP
DY
R8307 10KR2J-3-GP
DY
1 2
R8305 10KR2J-3-GP
DY
R8305 10KR2J-3-GP
DY
1 2
R8317 10KR2J-3-GP
DY
R8317 10KR2J-3-GP
DY
12
R8322 0R2J-2-GP
DY
R8322 0R2J-2-GP
DY
1 2
R8303 10KR2J-3-GP
DIS_PX
R8303 10KR2J-3-GP
DIS_PX
1 2
R8313 10KR2J-3-GP
DY
R8313 10KR2J-3-GP
DY
1 2
R8308 10KR2J-3-GP
DY
R8308 10KR2J-3-GP
DY
1 2
C8307 SCD1U10V2KX-5GP
DIS_PX
C8307 SCD1U10V2KX-5GP
DIS_PX
1 2
R8315 2KR2F-3-GP
DIS_PX
R8315 2KR2F-3-GP
DIS_PX
1 2
C8308 SCD1U10V2KX-5GP
DIS_PX
C8308 SCD1U10V2KX-5GP
DIS_PX
1 2
R8310 10KR2J-3-GP
DY
R8310 10KR2J-3-GP
DY
12
C8312
SC47P50V2JN-3GP
DY
C8312
SC47P50V2JN-3GP
DY
1 2
R8316
0R0402-PAD
DIS_PX
R8316
0R0402-PAD
DIS_PX
1 2
R8331 0R0402-PAD
DIS_PX
R8331 0R0402-PAD
DIS_PX
1 2
R8321 1K27R2F-L-GP
DIS_PX
R8321 1K27R2F-L-GP
DIS_PX
1 2
C8305 SCD1U10V2KX-5GP
DIS_PX
C8305 SCD1U10V2KX-5GP
DIS_PX
1 2
R8302 3KR2J-2-GP
DIS_PX
R8302 3KR2J-2-GP
DIS_PX
PWRGOOD
N10 PCIE_CALRN AA22
PCIE_CALRP Y22
PCIE_REFCLKN
AK32 PCIE_REFCLKP
AK30
PCIE_RX0N
AE31 PCIE_RX0P
AF30
PCIE_RX10N
R31 PCIE_RX10P
T30
PCIE_RX11N
P28 PCIE_RX11P
R29
PCIE_RX12N
N31 PCIE_RX12P
P30
PCIE_RX13N
M28 PCIE_RX13P
N29
PCIE_RX14N
L31 PCIE_RX14P
M30
PCIE_RX15N
K30 PCIE_RX15P
L29
PCIE_RX1N
AD28 PCIE_RX1P
AE29
PCIE_RX2N
AC31 PCIE_RX2P
AD30
PCIE_RX3N
AB28 PCIE_RX3P
AC29
PCIE_RX4N
AA31 PCIE_RX4P
AB30
PCIE_RX5N
Y28 PCIE_RX5P
AA29
PCIE_RX6N
W31 PCIE_RX6P
Y30
PCIE_RX7N
V28 PCIE_RX7P
W29
PCIE_RX8N
U31 PCIE_RX8P
V30
PCIE_RX9N
T28 PCIE_RX9P
U29
PERST#
AL27
PCIE_TX0N AG31
PCIE_TX0P AH30
PCIE_TX10N U23
PCIE_TX10P U24
PCIE_TX11N T27
PCIE_TX11P T26
PCIE_TX12N T23
PCIE_TX12P T24
PCIE_TX13N P26
PCIE_TX13P P27
PCIE_TX14N P23
PCIE_TX14P P24
PCIE_TX15N N26
PCIE_TX15P M27
PCIE_TX1N AF28
PCIE_TX1P AG29
PCIE_TX2N AF26
PCIE_TX2P AF27
PCIE_TX3N AD26
PCIE_TX3P AD27
PCIE_TX4N AB25
PCIE_TX4P AC25
PCIE_TX5N Y24
PCIE_TX5P Y23
PCIE_TX6N AB26
PCIE_TX6P AB27
PCIE_TX7N Y26
PCIE_TX7P Y27
PCIE_TX8N W23
PCIE_TX8P W24
PCIE_TX9N U26
PCIE_TX9P V27
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
1 OF 7
VGA1A
ROBSON-GP-U
DIS_PX
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
1 OF 7
VGA1A
ROBSON-GP-U
DIS_PX
B
1
A
2
GND
3Y4
VCC 5
U8301
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
DIS_PX
U8301
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
DIS_PX
1 2
C8304 SCD1U10V2KX-5GP
DIS_PX
C8304 SCD1U10V2KX-5GP
DIS_PX
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDA12
MDA45
MDA28
MDA11
MDA52
MDA30
MDA34
MDA38
MDA40
MDA35
MDA31
MDA51
MDA47
MDA57
MDA54
MDA0
MDA59
MDA25
MDA1
MDA55
MDA44
MDA15
MDA49
MDA36
MDA37
MDA21
MDA18
MDA4
MDA23
MDA48
MDA20
MDA46
MDA9
MDA27
MDA13
MDA61
MDA53
MDA8
MDA62
MDA29
MDA22
MDA5
MDA41
MDA39
MDA24
MDA19
MDA14
MDA50
MDA42
MDA17
MDA60
MDA56
MDA33
MDA26
MDA2
MDA43
MDA58
MDA6
MDA3
MDA7
MDA10
MDA16
MDA32
MDA63
MVREFDA
MVREFDA
MVREFSA
MVREFSA
DRAM_RST
MEM_CALRP0
MEM_CALRN0
DRAM_RST_1
MEM_CALRP0
MEM_CALRN0
CLKTESTA
CLKTESTB
TESTEN
MEM_CALRP1/DPC_CALR
CLKTESTB
CLKTESTA
PX_EN_R
1D5V_VGA_S0 1D5V_VGA_S0
1D5V_VGA_S0
MDA[32..63]89
MDA[0..31]88
A_BA0 88,89
A_BA1 88,89
MAA0 88,89
MAA1 88,89
MAA2 88,89
MAA3 88,89
MAA4 88,89
MAA5 88,89
MAA6 88,89
MAA7 88,89
MAA8 88,89
MAA9 88,89
MAA10 88,89
MAA11 88,89
MAA12 88,89
MEM_RST88,89
TESTEN83
A_BA2 88,89
MAA13 88,89
PX_EN 86
ODTA1 89
ODTA0 88
DQMA0 88
DQMA1 88
DQMA2 88
DQMA3 88
DQMA4 89
DQMA5 89
DQMA6 89
DQMA7 89
QSAP_0 88
QSAN_0 88
QSAP_1 88
QSAN_1 88
QSAP_2 88
QSAN_2 88
QSAN_3 88
QSAP_3 88
QSAN_4 89
QSAP_4 89
QSAP_5 89
QSAN_5 89
QSAP_6 89
QSAN_6 89
QSAN_7 89
QSAP_7 89
CLKA0# 88
CLKA0 88
CLKA1 89
CLKA1# 89
RASA0# 88
RASA1# 89
CASA1# 89
CASA0# 88
CSA0#_0 88
CSA1#_0 89
CKEA0 88
CKEA1 89
WEA1# 89
WEA0# 88
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU Memory(2/5)
A3
84 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU Memory(2/5)
A3
84 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU Memory(2/5)
A3
84 109Friday, April 22, 2011
<Core Design>
10R
50R
5K
120pF
For SEYMOUR
R_MEM_1
R_MEM_2
R_MEM_3
C_MEM
Designator
**
This basic topology should be used for DRAM_RST for
DDR3/GDDR3/GDDR5.These Capacitors and Resistor values
are an example only. The Series R and || Cap values
will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board
to pass Reset Signal Spec.
DDR3/GDDR3 Memory Stuff Option (ROBSON-S3/SEYMOUR-XT-S3)
DDR3
Rb
Ra
Ra
Rb
40.2R
MVDDQ
100R
PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC
For Robson
Ra
Rb
C_MEM
R_MEM_2 R_MEM_1
R_MEM_3
Place all these components very close to GPU
(Within 25mm) and keep all component close
to each Other (within 5mm) except R_MEM_2
DPC_CALR (Park/Robson-S3):
Analog calibration.
Connect DPxx_CALR to GND through a 150-Ω (1%) resistor.
1.5V/1.8V
DDR5
1.5V
40.2R
100R
10R
50R
5K
120pF
For normal GPU operation, these signals can be left
floating (do not populate the capacitors and resistors).
71.ROBSO.M01
2010/07/06
Schematics check list:
A pull-down resistor is required.
Colay with Seymour-XT-S3
(71.SEYMR.M01)
SSID = VIDEO
1 2
C8406
SCD1U10V2KX-5GP
DY
C8406
SCD1U10V2KX-5GP
DY
12
R8410
40D2R2F-GP
DIS_PX
R8410
40D2R2F-GP
DIS_PX
12
R8419
51R2J-2-GP
DY
R8419
51R2J-2-GP
DY
12
C8403
SCD1U10V2KX-5GP
DIS_PX
C8403
SCD1U10V2KX-5GP
DIS_PX
12
C8402
SCD1U10V2KX-5GP
DIS_PX
C8402
SCD1U10V2KX-5GP
DIS_PX
1 2
R8403 243R2F-2-GP
DIS_PX
R8403 243R2F-2-GP
DIS_PX
12
R8409
5K1R2F-2-GP
DIS_PX
R8409
5K1R2F-2-GP
DIS_PX
12
R8414
100R2F-L1-GP-U
DIS_PX
R8414
100R2F-L1-GP-U
DIS_PX
1 2
R8408 243R2F-2-GP
DIS_PX
R8408 243R2F-2-GP
DIS_PX
DQA_0
K27
DQA_1
J29
DQA_10
A28
DQA_11
C28
DQA_12
E27
DQA_13
G26
DQA_14
D26
DQA_15
F25
DQA_16
A25
DQA_17
C25
DQA_18
E25
DQA_19
D24
DQA_2
H30
DQA_20
E23
DQA_21
F23
DQA_22
D22
DQA_23
F21
DQA_24
E21
DQA_25
D20
DQA_26
F19
DQA_27
A19
DQA_28
D18
DQA_29
F17
DQA_3
H32
DQA_30
A17
DQA_31
C17
DQA_32
E17
DQA_33
D16
DQA_34
F15
DQA_35
A15
DQA_36
D14
DQA_37
F13
DQA_38
A13
DQA_39
C13
DQA_4
G29
DQA_40
E11
DQA_41
A11
DQA_42
C11
DQA_43
F11
DQA_44
A9
DQA_45
C9
DQA_46
F9
DQA_47
D8
DQA_48
E7
DQA_49
A7
DQA_5
F28
DQA_50
C7
DQA_51
F7
DQA_52
A5
DQA_53
E5
DQA_54
C3
DQA_55
E1
DQA_56
G7
DQA_57
G6
DQA_58
G1
DQA_59
G3
DQA_6
F32
DQA_60
J6
DQA_61
J1
DQA_62
J3
DQA_63
J5
DQA_7
F30
DQA_8
C30
DQA_9
F27
MEM_CALRP1/DPC_CALR
J8
MVREFDA
K26
MVREFSA
J26
MEM_CALRN0
J25
TESTEN
K7
MEM_CALRP0
K25
CASA0# G19
CASA1# G16
CKEA0 K20
CKEA1 J17
CLKA0 H26
CLKA0# H25
CLKA1 G9
CLKA1# H9
CSA0#_0 H22
CSA0#_1 J22
CSA1#_0 G13
CSA1#_1 K13
DQMA_0 E32
DQMA_1 E30
DQMA_2 A21
DQMA_3 C21
DQMA_4 E13
DQMA_5 D12
DQMA_6 E3
DQMA_7 F4
MAA_0 K17
MAA_1 J20
MAA_10 J11
MAA_11 J13
MAA_12 H11
MAA_BA2 G11
MAA_14/BA0 J16
MAA_15/BA1 L15
MAA_2 H23
MAA_3 G23
MAA_4 G24
MAA_5 H24
MAA_6 J19
MAA_7 K19
MAA_8 J14
MAA_9 K14
ODTA0 L18
ODTA1 K16
RASA0# G22
RASA1# G17
RDQSA_0 H28
RDQSA_1 C27
RDQSA_2 A23
RDQSA_3 E19
RDQSA_4 E15
RDQSA_5 D10
RDQSA_6 D6
RDQSA_7 G5
PX_EN AB16
RSVD#G14 G14
MAA_13 G20
WDQSA_0 H27
WDQSA_1 A27
WDQSA_2 C23
WDQSA_3 C19
WDQSA_4 C15
WDQSA_5 E9
WDQSA_6 C5
WDQSA_7 H4
WEA0# G25
WEA1# H10
DRAM_RST
L10
CLKTESTA
K8
CLKTESTB
L7
MEMORY INTERFACE
3 OF 7
ROBSON-GP-U
VGA1C
DIS_PX
MEMORY INTERFACE
3 OF 7
ROBSON-GP-U
VGA1C
DIS_PX
1
TP8402TPAD14 TP8402TPAD14
1 2
R8405
51R2J-2-GP
DIS_PX
R8405
51R2J-2-GP
DIS_PX
1 2
R8402
10R2F-L-GP
DIS_PX
R8402
10R2F-L-GP
DIS_PX
1 2
R8421
10KR2J-3-GP
DIS_PX
R8421
10KR2J-3-GP
DIS_PX
12
R8415
100R2F-L1-GP-U
DIS_PX
R8415
100R2F-L1-GP-U
DIS_PX
1
TP8401TPAD14 TP8401TPAD14
1 2
R8407
150R2F-1-GP
DIS_PX
R8407
150R2F-1-GP
DIS_PX
1 2
C8407
SCD1U10V2KX-5GP
DY
C8407
SCD1U10V2KX-5GP
DY
1 2
R8420
0R0402-PAD
DIS_PX
R8420
0R0402-PAD
DIS_PX
1 2
C8401
SC120P50V2JN-1GP
DIS_PX
C8401
SC120P50V2JN-1GP
DIS_PX
12
R8411
40D2R2F-GP
DIS_PX
R8411
40D2R2F-GP
DIS_PX
12
R8418
51R2J-2-GP
DY
R8418
51R2J-2-GP
DY
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GPIO17_VGA
FAN_PWM_C
NC#AC22/XO_IN
NC#AB22/XO_IN2
MEM_ID1
MEM_ID0
GPIO16_SSIN
XTALIN
JTAG_TDO_VGA
XTALOUT
GPU_VREFG
THERMTRIP_VGA
GENERICE_HPD4
GEN_B
GPIO6_VGA
GPIO18_VGA
GEN_A
GPIO17_VGA
VGA_BLEN
R2SET
DPC_VDD10
GPU_RSET
Q5801_2
THERMTRIP_R
THERMTRIP_VGA
RSVD
XTALIN
MEM_ID2
MEM_ID3
GPIO_VGA_04_CLK
GPIO_VGA_03_DATA
GPIO_VGA_03_DATA
GPIO_VGA_04_CLK
PWRCNTL_0
PWRCNTL_1
XTALOUT
AC19_GND
A2VDDQ_GPU
VDD2DI_GPU
A2VDD_GPU
1D8V_VGA_S0
DPLL_VDDC
1D8V_VGA_S0
1V_VGA_S0
DPLL_PVDD
AVDD_A2VDDQ
AVDD_A2VDDQ
3D3V_VGA_S0
AVDD_A2VDDQ
AVDD_A2VDDQ
AVDD_A2VDDQ
AVSSQ
3D3V_VGA_S0
A2VDD
AVDD_A2VDDQ
1D8V_VGA_S0 TSVDD
1D8V_VGA_S0
1D8V_VGA_S0
1V_VGA_S0
AVSSQAVSSQ
3D3V_VGA_S0
AVSSQ
AVDD_A2VDDQ
A2VDD
AVDD_A2VDDQ
1D8V_VGA_S0
GPIO21_BB_EN83
GPIO5_AC_BATT83
TX_PW RS_ENB83
BIOS_ROM_EN83
VGA_DIS83
GPIO8_ROMSO83
BIF_GEN2_EN_A83 TX_DEEMPH_EN83
CONFIG283 CONFIG183 CONFIG083
PEG_CLKREQ#18
JTAG_TRST#_VGA83
JTAG_TMS_VGA83 JTAG_TCK_VGA83
P2800_VGA_DXP28
P2800_VGA_DXN28
VGA_CRT_VSYNC 50,83
VGA_CRT_HSYNC 50,83
PWRCNTL_092
PWRCNTL_192
PURE_HW _SHUTDOWN#27,28,36
ATI_RST#83
PCIE_RST#27
SML1_DATA 6,27
SML1_CLK 6,27
VGA_CRT_RED 50
VGA_CRT_GREEN 50
VGA_CRT_BLUE 50
VGA_CRT_DDCCLK 50
VGA_CRT_DDCDATA 50
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU_DP/LVDS/CRT/GPIO(3/5)
A2
85 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU_DP/LVDS/CRT/GPIO(3/5)
A2
85 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU_DP/LVDS/CRT/GPIO(3/5)
A2
85 109Friday, April 22, 2011
<Core Design>
PLACE VREFG DIVIDER AND CAP
CLOSE TO ASIC
(1.8V@65mA AVDD)
(1.8V@100mA VDD1DI)
(3.3V@130mA A2VDD)
Clock Input Configuraiton -GDDR3/DDR3
a) 27MHz crystal connected to XTALIN or XTALOUT or
b) 27MHz (1.8V) oscillator connected to XTALIN or
c) 27MHz (3.3V) oscillator connected to XO_IN (Park, Madison, and Broadway only)
LVDS Interface
(1.8V@20mA TSVDD)
(1.0V@125mA DPLL_VDDC)
(1.8V@75mA DPLL_PVDD)
DVPDATA[0:3] Default: Internal Pull down
MEM_ID Control
2010/06/11
For Seymour,
DPC_PVDD is DPC_VDD18
DPC_PVSS and all DPC_VSSR are DP_VSSR
2010/06/11
GPIO_6,GPIO_15_PWRCNTL_0,GPIO_16_SSIN,GPIO_20_PWRCNTL_1:
Voltage control signals for the core (VDDC and VDDCI).
At Reset, these signals will be inputs with weak internal pull-down resistors.
VBIOS can define all voltage control signals to be either 3.3-V or open drain outputs (all signals
must be the same type). The output state (high/low) of these signals is programmable for each PowerPlay state.
(1.0V@110mA DPC_VDD10)
2010/07/07 Remove TP8517,TP8518,TP8506,TP8519,TP8512
71.ROBSO.M01
71.ROBSO.M01
2010/07/15 Modify:
Q8501 change to dual 2n7002.
Add R8512,R8521,C8529 for Q8501 pin2
turn on timming control.
2010/07/07
Change to RSVD based
on DS v3.05
2010/07/06
Schematics check list:
A 1-M ohm resistor must be connected
between XTALIN and XTALOUT when a crystal is used.
2010/07/06
Memory ID Table
DVPDATA[0:3]
0000
0001
Description
DDR3 SAMSUNG-K4W1G1646G-BC11(900MHz)64M*16
DDR3 Hynix-H5TQ1G63DFR-11C (900MHz) 64M*16
DDR3 SAMSUNG K4W2G1646C-HC11 (900MHz) 128M*16
DDR3 Hynix-H5TQ2G63BFR-11C (900MHz) 128M*16
0010
0804 Modify for DV14 Config
AUXP PD 100K
AUXN PU 100K
Draw on EDP circuit page
0723 Add SMBUS
0723 Add SMBUS
(1.8V@100mA VDD2DI)
(1.8V@2mA A2VDDQ)
0820
0820
X01
X01
0011
X01
80.30034.641
2nd 80.30034.651
3rd 80.30034.681
130 mA
1.5 mA
50 mA
Colay with Seymour-XT-S3
(71.SEYMR.M01)
X02
SSID = VIDEO
12
C8517
SC4D7U6D3V3KX-GP
DY
C8517
SC4D7U6D3V3KX-GP
DY
12
C8506
SC1U6D3V2KX-GP
DY
C8506
SC1U6D3V2KX-GP
DY
1 2
R8501
715R2F-GP
ROB
R8501
715R2F-GP
ROB
12
C8511
SC1U6D3V2KX-GP
DY
C8511
SC1U6D3V2KX-GP
DY
1 2
C8525 SC12P50V2JN-3GP
DIS_PX
C8525 SC12P50V2JN-3GP
DIS_PX
1 2
R8507
0R0402-PAD
DIS_PX
R8507
0R0402-PAD
DIS_PX
12
C8528
SCD1U10V2KX-5GP
DIS_PX
C8528
SCD1U10V2KX-5GP
DIS_PX
1
TP8504TPAD14 TP8504TPAD14
1
TP8503TPAD14 TP8503TPAD14
1 2
R8511 0R2J-2-GP
DY
R8511 0R2J-2-GP
DY
12
R8515
499R2F-2-GP
DIS_PX
R8515
499R2F-2-GP
DIS_PX
1 2
L8504
BLM15BD121SS1D-GP
DIS_PX
L8504
BLM15BD121SS1D-GP
DIS_PX
1 2
R8502
1MR2F-GP
DIS_PX
R8502
1MR2F-GP
DIS_PX
DMINUS
T2
DPLL_PVDD
AF14
DPLL_PVSS
AE14
DPLL_VDDC
AD14
DPLUS
T4
DPC_VSSR#1/DVPCLK
U1
DVDATA_7/DVPCNTL_0
AC7
DVPCNTL_1/TX2M_DPC0N Y2
DVPCNTL_2/TXCCM_DPC3N U5
DPC_VSSR#5/DVPCNTL_MV0
AA1
DVPCNTL_MV1/TX1P_DPC1P Y4
DVDATA_0/DVPDATA_0
Y7
DVPDATA_1/TX0M_DPC2N V2
DPC_VDD18#1/DVPDAT10
AC6
DPC_PVDD/DVPDATA_11
W6
DVDATA_9/DVPDATA_12
AD7
DVPDATA_13/TX2P_DPC0P AA3
DVDATA_8/DVPDATA_14
AC8
DPC_VDD10#1/DVPDAT15
AA5
DVDATA_12/DVPDATA_16
AE8
DPC_VDD10#2/DVPDAT17
AA6
DVCNTL_0/DVPDATA_18
AE9
DVDATA_3/DVPDATA_19
AB4
DVDATA_1/DVPDATA_2
Y8
DVDATA_11/DVPDATA_20
AD9
DVDATA_2/DVPDATA_21
AB2
DVDATA_10/DVPDATA_22
AC10
DPC_VDD18#2/DVPDAT23
AC5
DVPDATA_3/TXCCP_DPC3P V4
DVDATA_4DVPDATA_4
AB7
DPC_VSSR#2/DVPDAT5
W1
DVDATA_5/DVPDATA_6
AB8
DVPDATA_7/TX0P_DPC2P W3
DVDATA_6/DVPDATA_8
AB9
DVPDATA_9/TX1M_DPC1N W5
GENERICA
AB13
GENERICB
W8
GENERICC
W9
GENERICD
W7
GENERICE_HPD4
AD10
GPIO_0
U6
GPIO_1
U10
GPIO_10_ROMSCK
P2
GPIO_11
N6
GPIO_12
N5
GPIO_13
N3
GPIO_14_HPD2
Y9
GPIO_15_PWRCNTL_0
N1
GPIO_16_SSIN
M4
GPIO_17_THERMAL_INT
R6
GPIO_18_HPD3
W10
GPIO_19_CTF
M2
GPIO_2
T10
GPIO_20_PWRCNTL_1
P8
GPIO_21_BB_EN
P7
GPIO_22_ROMCSB
N8
GPIO_23_CLKREQB
N7
GPIO_3_SMBDATA
U8
GPIO_4_SMBCLK
U7
GPIO_5_AC_BATT
T9
GPIO_6
T8
GPIO_7_BLON
T7
GPIO_8_ROMSO
P10
GPIO_9_ROMSI
P4
H2SYNC AL13
HPD1
AC14
HSYNC AH26
JTAG_TCK
L3 JTAG_TDI
L5
JTAG_TDO
K4 JTAG_TMS
L1
JTAG_TRST#
L6
NC#AC20/DDCDATA_AUX3N AC20
NC#AD20/DDCCLK_AUX3P AD20
TS_FDO
R5
TSVDD
AD17
TSVSS
AC17
VREFG
AC16
VSS1DI AD23
VSS2DI/NC#AC19 AC19
XTALIN
AM28
XTALOUT
AK28
A2VDD/NC#AE20 AE20
A2VDDQ/NC#AE17 AE17
A2VSSQ AE19
AUX1N AD4
AUX1P AD2
AUX2N AD11
AUX2P AD13
AVDD AG24
AVSSQ AE22
BAH24
B2/NC#AK10 AK10
B2#/NC#AL9 AL9
B# AG25
C/NC#AH12 AH12
COMP/NC#AJ9 AJ9
DDC1CLK AE6
DDC1DATA AE5
DDC2CLK AC11
DDC2DATA AC13
DDC6CLK AC1
DDC6DATA AC3
DDCDATA_AUX5N AD16
DDCCLK_AUX5P AE16
GAL25
G2/NC#AL11 AL11
G2#/NC#AJ11 AJ11
G# AJ25
RAM26
R2/NC#AM12 AM12
R2#/NC#AK12 AK12
R2SET/NC#AG13 AG13
R# AK26
RSET AD22
SCL
R1
SDA
R3
TX0M_DPA2N AG5
TX0P_DPA2P AG3
TX1M_DPA1N AH1
TX1P_DPA1P AH3
TX2M_DPA0N AK1
TX2P_DPA0P AK3
TX3M_DPB2N AM5
TX3P_DPB2P AK6
TX4M_DPB1N AH6
TX4P_DPB1P AJ7
TX5M_DPB0N AL7
TX5P_DPB0P AK8
TXCAM_DPA3N AF4
TXCAP_DPA3P AF2
TXCBM_DPB3N AM3
TXCBP_DPB3P AK5
V2SYNC AJ13
VDD1DI AE23
VDD2DI/NC#AD19 AD19
VSYNC AJ27
Y/NC#AM10 AM10
NC#AB22/XO_IN2
AB22 NC#AC22/XO_IN
AC22
RSVD#AF24
AF24
NC#AA12 AA12
DVCNTL_2/TESTEN#2
N9
DPC_VSSR#3/GND
U3
DPC_PVSS/GND
V6
DPC_VSSR#4/GND
Y6
DVCNTL_1/NC#L9
L9
DPA
DPB
DVO
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
DPC
M92-S2/M93-S3
M92-S2/M93-S3
M93-S3/M92-S2
M93-S3/M92-S2
M92-S2/M93-S3M92-S2/M93-S3
2 OF 7
ROBSON-GP-U
VGA1B
DIS_PX
DPA
DPB
DVO
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
DPC
M92-S2/M93-S3
M92-S2/M93-S3
M93-S3/M92-S2
M93-S3/M92-S2
M92-S2/M93-S3M92-S2/M93-S3
2 OF 7
ROBSON-GP-U
VGA1B
DIS_PX
1 2
R8519 10KR2J-3-GP
1G
R8519 10KR2J-3-GP
1G
1
TP8512TPAD14 TP8512TPAD14
1
TP8502TPAD14-GP TP8502TPAD14-GP
12
C8503
SCD1U10V2KX-5GP
DY
C8503
SCD1U10V2KX-5GP
DY
12
C8505
SC4D7U6D3V3KX-GP
DY
C8505
SC4D7U6D3V3KX-GP
DY
1
TP8505TPAD14 TP8505TPAD14
12
C8518
SC1U6D3V2KX-GP
DIS_PX
C8518
SC1U6D3V2KX-GP
DIS_PX
12
C8510
SCD1U10V2KX-5GP
DY
C8510
SCD1U10V2KX-5GP
DY
12
R8503
10KR2J-3-GP
DIS_PX
R8503
10KR2J-3-GP
DIS_PX
1 2
R8521 3KR2J-2-GP
DY
R8521 3KR2J-2-GP
DY
1 2
R8522 10KR2J-3-GP
DY
R8522 10KR2J-3-GP
DY
12
C8509
SC1U6D3V2KX-GP
DY
C8509
SC1U6D3V2KX-GP
DY
1
2
3 4
5
6
Q8501
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DY
Q8501
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DY
12
C8502
SC4D7U6D3V3KX-GP
DY
C8502
SC4D7U6D3V3KX-GP
DY
1 2
R8517
0R0402-PAD
DIS_PX
R8517
0R0402-PAD
DIS_PX
1 2
L8501
BLM18PG471SN1D-GP
DIS_PX
L8501
BLM18PG471SN1D-GP
DIS_PX
12
C8519
SCD1U10V2KX-5GP
DIS_PX
C8519
SCD1U10V2KX-5GP
DIS_PX
12
R8525
0R2J-2-GP
DY
R8525
0R2J-2-GP
DY
12
C8520
SC4D7U6D3V3KX-GP
DY
C8520
SC4D7U6D3V3KX-GP
DY
12
R8504 0R2J-2-GP
ROB
R8504 0R2J-2-GP
ROB
1 2
R8520 3KR2J-2-GP
DY
R8520 3KR2J-2-GP
DY
1
TP8506TPAD14-GP TP8506TPAD14-GP
1 2
R8509
0R0402-PAD
DIS_PX
R8509
0R0402-PAD
DIS_PX
12
C8501
SC4D7U6D3V3KX-GP
DY
C8501
SC4D7U6D3V3KX-GP
DY
12
C8523
SC2200P50V2KX-2GP
DIS_PX
C8523
SC2200P50V2KX-2GP
DIS_PX
12
C8512
SC1U6D3V2KX-GP
DY
C8512
SC1U6D3V2KX-GP
DY
1 2
R8527 10KR2J-3-GP
DY
R8527 10KR2J-3-GP
DY
1 2
R8524
10KR2J-3-GP
DIS_PX
R8524
10KR2J-3-GP
DIS_PX
12
C8504
SC1U6D3V2KX-GP
DY
C8504
SC1U6D3V2KX-GP
DY
12
C8526
SC10U6D3V5KX-1GP
DIS_PX
C8526
SC10U6D3V5KX-1GP
DIS_PX
1
TP8508TPAD14 TP8508TPAD14
1
TP8510TPAD14 TP8510TPAD14
1 2
C8524 SC12P50V2JN-3GP
DIS_PX
C8524 SC12P50V2JN-3GP
DIS_PX
12
C8507
SCD1U10V2KX-5GP
DY
C8507
SCD1U10V2KX-5GP
DY
12
C8508
SCD1U10V2KX-5GP
DY
C8508
SCD1U10V2KX-5GP
DY
12
R8526
10KR2J-3-GP
DY
R8526
10KR2J-3-GP
DY
12
C8513
SCD1U10V2KX-5GP
DY
C8513
SCD1U10V2KX-5GP
DY
1 2
R8510 0R2J-2-GP
DY
R8510 0R2J-2-GP
DY
12
C8527
SC1U6D3V2KX-GP
DIS_PX
C8527
SC1U6D3V2KX-GP
DIS_PX
1
2
3 4
5
6
Q8503
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DIS_PX
Q8503
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DIS_PX
1 2
R8514 499R2F-2-GP
DIS_PX
R8514 499R2F-2-GP
DIS_PX
12
R8505 0R2J-2-GP
ROB
R8505 0R2J-2-GP
ROB
41
2 3
X8501
XTAL-27MHZ-85-GP
DIS_PX
X8501
XTAL-27MHZ-85-GP
DIS_PX
12
R8508 0R2J-2-GP
ROB
R8508 0R2J-2-GP
ROB
12
C8529
SCD1U10V2KX-4GP
DY
C8529
SCD1U10V2KX-4GP
DY
12
C8522
SCD1U10V2KX-5GP
DIS_PX
C8522
SCD1U10V2KX-5GP
DIS_PX
1
TP8509TPAD14 TP8509TPAD14
1
2 3
4
RN8501
SRN4K7J-8-GP
DIS_PX
RN8501
SRN4K7J-8-GP
DIS_PX
1 2
L8507
BLM15BD121SS1D-GP
DIS_PX
L8507
BLM15BD121SS1D-GP
DIS_PX
1 2
R8523 0R2J-2-GP
ROB
R8523 0R2J-2-GP
ROB
DIGON AB12
TXCLK_LN_DPE3N AK14
TXCLK_LP_DPE3P AL15
TXCLK_UN_DPF3N AJ19
TXCLK_UP_DPF3P AH20
TXOUT_L0N_DPE2N AJ15
TXOUT_L0P_DPE2P AH16
TXOUT_L1N_DPE1N AK16
TXOUT_L1P_DPE1P AL17
TXOUT_L2N_DPE0N AJ17
TXOUT_L2P_DPE0P AH18
TXOUT_L3N AK18
TXOUT_L3P AL19
TXOUT_U0N_DPF2N AK20
TXOUT_U0P_DPF2P AL21
TXOUT_U1N_DPF1N AJ21
TXOUT_U1P_DPF1P AH22
TXOUT_U2N_DPF0N AK22
TXOUT_U2P_DPF0P AL23
TXOUT_U3N AJ23
TXOUT_U3P AK24
VARY_BL AB11
LVTMDP
LVDS CONTROL
6 OF 7
ROBSON-GP-U
VGA1F
DIS_PX
LVTMDP
LVDS CONTROL
6 OF 7
ROBSON-GP-U
VGA1F
DIS_PX
12
C8515
SC1U6D3V2KX-GP
DIS_PX
C8515
SC1U6D3V2KX-GP
DIS_PX
1
TP8511TPAD14 TP8511TPAD14
12
R8512
0R2J-2-GP
DY
R8512
0R2J-2-GP
DY
1 2
L8506 BLM18PG471SN1D-GP
DIS_PX
L8506 BLM18PG471SN1D-GP
DIS_PX
12
C8516
SCD1U10V2KX-5GP
DIS_PX
C8516
SCD1U10V2KX-5GP
DIS_PX
12
C8521
SC1U6D3V2KX-GP
DIS_PX
C8521
SC1U6D3V2KX-GP
DIS_PX
1 2
R8518 10KR2J-3-GP
Hynix
R8518 10KR2J-3-GP
Hynix
12
R8516
249R2F-GP
DIS_PX
R8516
249R2F-GP
DIS_PX
12
C8514
SCD1U10V2KX-5GP
DIS_PX
C8514
SCD1U10V2KX-5GP
DIS_PX
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPV10
BIF_VDDC_CORE
PX_EN##
PX_EN## PX_EN#
BIF_VDDC_1V
1D5V_VGA_PWOK
PX_EN#1D5V_VGA_PWOK_R
1D5V_VGA_PWOK_R
1D5V_VGA_PWOK
M11_M12
Q8604_B
Q8603_G
1V_VGA_S0
MPV18
1D8V_VGA_S0
1D5V_VGA_S0
VGA_CORE
1D8V_VGA_S0
VGA_CORE
SPV18
VDDC_CT
3D3V_VGA_S0
1V_VGA_S0
MPV18
SPV18
MPV18
BIF_VDDC
1V_VGA_S0BIF_VDDCBIF_VDDC VGA_CORE
3D3V_VGA_S0
VGA_CORE
1D5V_VGA_S0
3D3V_VGA_S03D3V_S5
PCIE_PVDD
BIF_VDDC
3D3V_VGA_S0 5V_S0 3D3V_VGA_S0 5V_S0
8209A_EN/DEM_VGA92
PX_EN84
1D5V_VGA_PWOK 17,83
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU_POWER(4/5)
A2
86 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU_POWER(4/5)
A2
86 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU_POWER(4/5)
A2
86 109Friday, April 22, 2011
<Core Design>
(1.8V@110mA VDD_CT)
(GDDR3/DDR3 1.12V@4A VDDCI)
(1.8V@504mA PCIE_VDDR)
(1.8V@75mA SPV18)
(1.0V@1920mA PCIE_VDDC)
(Park: 1.8V@75mA MPV18)
2010/06/17_1
1 00 1
PX_EN# = High, BIF_VDDC = 1V_VGA_S0
PX_EN## = High, BIF_VDDC = VGA_CORE
8209A_EN/DEM_VGA
0
Non-BACO= HIGH
BACO = LOW
0 1BACO
PX_EN 1D5V_VGA_PWOK_R PX_EN# PX_EN##
Non-BACO
01
1
2010/07/08
0629 Modify
0629 Modify
1D5V_VGA_PWOK
71.ROBSO.M01
2010/07/13 Modify:
Add C8601 for BIF_VDDC
(120mA SPV10)
Rds(on) = 1ow
VGS=0.7~1.5V
AO4468 MAX 3.1A
Rds(on) = 101~155mOhm
VGS=+/-12V
84.03400.B37 84.03400.B37
X01
20100920 X01:
Reserve R8605 0402 0R for VDDC_CT.
55mA in BACO mode
Colay with Seymour-XT-S3
(71.SEYMR.M01)
84.2N702.J31
2nd = 84.07002.I31
84.2N702.J31
2nd = 84.07002.I31
A00
SSID = VIDEO
G
S
D
Q8603
2N7002K-2-GP
DIS_PX
Q8603
2N7002K-2-GP
DIS_PX
12
C8624
SCD1U10V2KX-5GP
DIS_PX
C8624
SCD1U10V2KX-5GP
DIS_PX
1 2
L8605
BLM15BD121SS1D-GP
DIS_PX
2ND = 68.00217.701
68.00084.F81
L8605
BLM15BD121SS1D-GP
DIS_PX
2ND = 68.00217.701
68.00084.F81
12
C8634
SC4D7U6D3V3KX-GP
DIS_PX
C8634
SC4D7U6D3V3KX-GP
DIS_PX
12
C8627
SC1U6D3V2KX-GP
DIS_PX
C8627
SC1U6D3V2KX-GP
DIS_PX
1 2
R8605
0R0402-PAD
DIS_PX
R8605
0R0402-PAD
DIS_PX
12
C8667
SC1U6D3V2KX-GP
DIS_PX
C8667
SC1U6D3V2KX-GP
DIS_PX
12
C8676
SC1U6D3V2KX-GP
DIS_PX
C8676
SC1U6D3V2KX-GP
DIS_PX
12
C8616
SC1U6D3V2KX-GP
DIS_PX
C8616
SC1U6D3V2KX-GP
DIS_PX
12
C8628
SC1U6D3V2KX-GP
DIS_PX
C8628
SC1U6D3V2KX-GP
DIS_PX
12
C8646
SC1U6D3V2KX-GP
DIS_PX
C8646
SC1U6D3V2KX-GP
DIS_PX
12
C8690
SCD1U10V2KX-5GP
DIS_PX
C8690
SCD1U10V2KX-5GP
DIS_PX
12
C8655
SCD1U10V2KX-5GP
DIS_PX
C8655
SCD1U10V2KX-5GP
DIS_PX
12
C8673
SC1U6D3V2KX-GP
DIS_PX
C8673
SC1U6D3V2KX-GP
DIS_PX
12
C8605
SC4D7U6D3V3KX-GP
DIS_PX
C8605
SC4D7U6D3V3KX-GP
DIS_PX
12
C8660
SC1U6D3V2KX-GP
DIS_PX
C8660
SC1U6D3V2KX-GP
DIS_PX
12
C8601
SC4D7U6D3V3KX-GP
DIS_PX
C8601
SC4D7U6D3V3KX-GP
DIS_PX
12
R8606
10KR2J-3-GP
DIS_PX
R8606
10KR2J-3-GP
DIS_PX
12
C8615
SC1U6D3V2KX-GP
DIS_PX
C8615
SC1U6D3V2KX-GP
DIS_PX
G
DS
U8601
AO3400A-GP
DIS_PX
U8601
AO3400A-GP
DIS_PX
12
C8666
SC1U6D3V2KX-GP
DIS_PX
C8666
SC1U6D3V2KX-GP
DIS_PX
12
C8665
SC1U6D3V2KX-GP
DIS_PX
C8665
SC1U6D3V2KX-GP
DIS_PX
12
C8652
SC1U6D3V2KX-GP
DIS_PX
C8652
SC1U6D3V2KX-GP
DIS_PX
12
C8604
SC4D7U6D3V3KX-GP
DIS_PX
C8604
SC4D7U6D3V3KX-GP
DIS_PX
12
C8637
SC4D7U6D3V3KX-GP
DIS_PX
C8637
SC4D7U6D3V3KX-GP
DIS_PX
12
C8635
SC1U6D3V2KX-GP
DIS_PX
C8635
SC1U6D3V2KX-GP
DIS_PX
1 2
L8707
HCB2012KF-221T30-GP
DIS_PX
L8707
HCB2012KF-221T30-GP
DIS_PX
1 2
L8606
BLM15BD121SS1D-GP
DIS_PX
2ND = 68.00217.701
68.00084.F81
L8606
BLM15BD121SS1D-GP
DIS_PX
2ND = 68.00217.701
68.00084.F81
12
C8692
SC1U6D3V2KX-GP
DIS_PX
C8692
SC1U6D3V2KX-GP
DIS_PX
12
C8697
SC10U6D3V5KX-1GP
DIS_PX
C8697
SC10U6D3V5KX-1GP
DIS_PX
12
C8680
SCD1U10V2KX-5GP
DIS_PX
C8680
SCD1U10V2KX-5GP
DIS_PX
12
C8610
SC1U6D3V2KX-GP
DIS_PX
C8610
SC1U6D3V2KX-GP
DIS_PX
12
C8674
SCD1U10V2KX-5GP
DIS_PX
C8674
SCD1U10V2KX-5GP
DIS_PX
12
C8670
SC1U6D3V2KX-GP
DIS_PX
C8670
SC1U6D3V2KX-GP
DIS_PX
1 2
R8608
2K2R2J-2-GP
DIS_PX
R8608
2K2R2J-2-GP
DIS_PX
12
R8609
1KR2J-1-GP
DIS_PX
R8609
1KR2J-1-GP
DIS_PX
12
C8672
SCD1U10V2KX-5GP
DIS_PX
C8672
SCD1U10V2KX-5GP
DIS_PX
12
C8698
SC10U6D3V5KX-1GP
DIS_PX
C8698
SC10U6D3V5KX-1GP
DIS_PX
G
S
D
Q8601
2N7002K-2-GP
DIS_PX
Q8601
2N7002K-2-GP
DIS_PX
1 2
L8604
BLM15BD121SS1D-GP
DIS_PX
2ND = 68.00217.701
68.00084.F81
L8604
BLM15BD121SS1D-GP
DIS_PX
2ND = 68.00217.701
68.00084.F81
C
B
E
Q8604
MMBT3904-4-GP
84.T3904.C11
2ND = 84.03904.P11
3rd = 84.03904.L06
DIS_PX
Q8604
MMBT3904-4-GP
84.T3904.C11
2ND = 84.03904.P11
3rd = 84.03904.L06
DIS_PX
12
C8629
SC1U6D3V2KX-GP
DIS_PX
C8629
SC1U6D3V2KX-GP
DIS_PX
12
C8611
SC1U6D3V2KX-GP
DIS_PX
C8611
SC1U6D3V2KX-GP
DIS_PX
12
C8617
SC10U6D3V5KX-1GP
DIS_PX
C8617
SC10U6D3V5KX-1GP
DIS_PX
12
C8693
SCD1U10V2KX-5GP
DY
C8693
SCD1U10V2KX-5GP
DY
12
R8604
1KR2J-1-GP
DY
R8604
1KR2J-1-GP
DY
G
DS
U8606
AO3418-GP
84.03418.031
DIS_PX
U8606
AO3418-GP
84.03418.031
DIS_PX
12
C8659
SCD1U10V2KX-5GP
DIS_PX
C8659
SCD1U10V2KX-5GP
DIS_PX
G
D S
U8604
AO3418-GP
84.03418.031
DIS_PX
U8604
AO3418-GP
84.03418.031
DIS_PX
12
C8679
SC1U6D3V2KX-GP
DIS_PX
C8679
SC1U6D3V2KX-GP
DIS_PX
12
C8675
SC1U6D3V2KX-GP
DIS_PX
C8675
SC1U6D3V2KX-GP
DIS_PX
12
R8610
1KR2J-1-GP
DIS_PX
R8610
1KR2J-1-GP
DIS_PX
12
C8632
SC1U6D3V2KX-GP
DIS_PX
C8632
SC1U6D3V2KX-GP
DIS_PX
12
C8625
SC1U6D3V2KX-GP
DIS_PX
C8625
SC1U6D3V2KX-GP
DIS_PX
1 2
R8602 0R2J-2-GP
ROB
R8602 0R2J-2-GP
ROB
12
C8694
SCD1U10V2KX-5GP
DIS_PX
C8694
SCD1U10V2KX-5GP
DIS_PX
12
C8677
SC1U6D3V2KX-GP
DIS_PX
C8677
SC1U6D3V2KX-GP
DIS_PX
1 2
R8601
0R2J-2-GP
DY
R8601
0R2J-2-GP
DY
12
C8671
SCD1U10V2KX-5GP
DIS_PX
C8671
SCD1U10V2KX-5GP
DIS_PX
12
C8613
SCD1U10V2KX-5GP
DIS_PX
C8613
SCD1U10V2KX-5GP
DIS_PX
12
C8669
SC1U6D3V2KX-GP
DIS_PX
C8669
SC1U6D3V2KX-GP
DIS_PX
12
C8651
SC4D7U6D3V5KX-3GP
DY
C8651
SC4D7U6D3V5KX-3GP
DY
12
C8630
SC1U6D3V2KX-GP
DIS_PX
C8630
SC1U6D3V2KX-GP
DIS_PX
12
C8648
SC1U6D3V2KX-GP
DIS_PX
C8648
SC1U6D3V2KX-GP
DIS_PX
PCIE_PVDD
AM30
MPV18
L8
SPV18
H7
PCIE_VDDC L23
PCIE_VDDC T22
PCIE_VDDC U22
PCIE_VDDC V22
PCIE_VDDC L24
PCIE_VDDC L25
PCIE_VDDC L26
PCIE_VDDC M22
PCIE_VDDC N22
PCIE_VDDC N23
PCIE_VDDC N24
PCIE_VDDC R22
PCIE_VDDR AB23
PCIE_VDDR AC23
PCIE_VDDR AD24
PCIE_VDDR AE24
PCIE_VDDR AE25
PCIE_VDDR AE26
PCIE_VDDR AF25
PCIE_VDDR AG26
SPV10
H8
SPVSS
J7
VDDR1
H13
VDDR1
K24
VDDR1
K9
VDDR1
L11
VDDR1
L12
VDDR1
L13
VDDR1
L20
VDDR1
L21
VDDR1
L22
VDDR1
H16
VDDR1
H19
VDDR1
J10
VDDR1
J23
VDDR1
J24
VDDR1
J9
VDDR1
K10
VDDR1
K23
VDDR3
AA17
VDDR3
AA18
VDDR3
AB17
VDDR3
AB18
VDDR4/VDDR5
V12
VDDR4
Y12
VDDRHA
L17
VSSRHA
L16
VDD_CT
AA20
VDD_CT
AA21
VDD_CT
AB20
VDD_CT
AB21 VDDC AA15
VDDC T17
VDDC T20
VDDC U13
VDDC U16
VDDC U18
VDDC V21
VDDC V15
VDDC V17
VDDC V20
VDDC/BIF_VDDC U21
VDDC N15
VDDC Y13
VDDC Y16
VDDC Y18
VDDC/BIF_VDDC R21
VDDC N17
VDDC R13
VDDC R16
VDDC R18
VDDC Y21
VDDC T12
VDDC T15
VDDCI M13
VDDCI M15
VDDCI M16
VDDCI M17
BBP#1
M11
BBP#2
M12
VDDCI M18
VDDCI M21
VDDCI M20
VDDCI N20
NC#AA11/VDDR4
AA11
DVCLK/VDDR4
Y11
NC#V11/VDDR5
V11
NC#U11
U11
VDDR4/VDDR5
U12
POWER
PLL
PCIE
CORE
MEM I/O
MEM CLK
I/O
BACK BIAS
LEVEL
TRANSLATION
ISOLATED
CORE I/O
M93-S3/M92-S2
4 OF 7
ROBSON-GP-U
VGA1D
DIS_PX
POWER
PLL
PCIE
CORE
MEM I/O
MEM CLK
I/O
BACK BIAS
LEVEL
TRANSLATION
ISOLATED
CORE I/O
M93-S3/M92-S2
4 OF 7
ROBSON-GP-U
VGA1D
DIS_PX
12
R8607
10KR2J-3-GP
DIS_PX
R8607
10KR2J-3-GP
DIS_PX
12
C8626
SC1U6D3V2KX-GP
DIS_PX
C8626
SC1U6D3V2KX-GP
DIS_PX
12
C8654
SC10U6D3V5KX-1GP
DIS_PX
C8654
SC10U6D3V5KX-1GP
DIS_PX
12
C8656
SC1U6D3V2KX-GP
DIS_PX
C8656
SC1U6D3V2KX-GP
DIS_PX
12
C8649
SC1U6D3V2KX-GP
DIS_PX
C8649
SC1U6D3V2KX-GP
DIS_PX
G
D S
U8603
AO3400A-GP
DIS_PX
U8603
AO3400A-GP
DIS_PX
12
C8612
SC1U6D3V2KX-GP
DIS_PX
C8612
SC1U6D3V2KX-GP
DIS_PX
12
C8647
SCD1U10V2KX-5GP
DIS_PX
C8647
SCD1U10V2KX-5GP
DIS_PX
12
C8636
SCD1U10V2KX-5GP
DIS_PX
C8636
SCD1U10V2KX-5GP
DIS_PX
12
C8653
SCD1U10V2KX-5GP
DIS_PX
C8653
SCD1U10V2KX-5GP
DIS_PX
12
C8699
SC4D7U6D3V3KX-GP
DIS_PX
C8699
SC4D7U6D3V3KX-GP
DIS_PX
12
C8603
SC1U6D3V2KX-GP
DIS_PX
C8603
SC1U6D3V2KX-GP
DIS_PX
B
1
A
2
GND
3Y4
VCC 5
U8605
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
DIS_PX
U8605
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
DIS_PX
12
C8695
SC10U6D3V5KX-1GP
DY
C8695
SC10U6D3V5KX-1GP
DY
12
R8603
1KR2J-1-GP
DY
R8603
1KR2J-1-GP
DY
12
C8657
SC1U6D3V2KX-GP
DIS_PX
C8657
SC1U6D3V2KX-GP
DIS_PX
12
C8645
SC1U6D3V2KX-GP
DIS_PX
C8645
SC1U6D3V2KX-GP
DIS_PX
12
C8631
SC1U6D3V2KX-GP
DIS_PX
C8631
SC1U6D3V2KX-GP
DIS_PX
12
C8609
SCD1U10V2KX-5GP
DIS_PX
C8609
SCD1U10V2KX-5GP
DIS_PX
1
2
34
5
6
Q8602
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DIS_PX
Q8602
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DIS_PX
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DPCD_CALR DPAB_CALR
VSS_MECH2
VSS_MECH3
VSS_MECH1
N11_GND
N12_GND
N11_GND
N12_GND
DPAB_VDD18
1V_VGA_S0
DPAB_VDD10
DPAB_VDD18
DPAB_VDD10
DPAB_VDD18
DPAB_VDD18
1D8V_VGA_S0
DPEF_VDD18
DPEF_VDD10
1D8V_VGA_S0 DPEF_VDD18
DPEF_VDD10
1V_VGA_S0
DPEF_VDD18
DPEF_VDD18
1D8V_VGA_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU_DPPWR/GND(5/5)
A3
87 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU_DPPWR/GND(5/5)
A3
87 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU_DPPWR/GND(5/5)
A3
87 109Friday, April 22, 2011
<Core Design>
(1.0V@220mA DPAB_VDD10)
(1.8V@300mA DPAB_VDD18)
71.ROBSO.M01
71.ROBSO.M01
2010/07/09 N11 and N12: in Seymour is NC
(1.8V@150mA DPB_VDD18)
Colay with Seymour-XT-S3
(71.SEYMR.M01)
SSID = VIDEO
12
C8720
SC1U6D3V2KX-GP
DY
C8720
SC1U6D3V2KX-GP
DY
1 2
R8706 0R0603-PAD
DIS_PX
R8706 0R0603-PAD
DIS_PX
1 2
R8701 150R2F-1-GP
DIS_PX
R8701 150R2F-1-GP
DIS_PX
12
C8705
SC10U6D3V5KX-1GP
DY
C8705
SC10U6D3V5KX-1GP
DY
12
C8721
SC4D7U6D3V3KX-GP
DY
C8721
SC4D7U6D3V3KX-GP
DY
PCIE_VSS
AA27
PCIE_VSS
AF32
PCIE_VSS
AG27
PCIE_VSS
AH32
PCIE_VSS
K28
PCIE_VSS
K32
PCIE_VSS
L27
PCIE_VSS
M32
PCIE_VSS
N25
PCIE_VSS
N27
PCIE_VSS
P25
PCIE_VSS
AB24
PCIE_VSS
P32
PCIE_VSS
R27
PCIE_VSS
T25
PCIE_VSS
T32
PCIE_VSS
U25
PCIE_VSS
U27
PCIE_VSS
V32
PCIE_VSS
W25
PCIE_VSS
W26
PCIE_VSS
W27
PCIE_VSS
AB32
PCIE_VSS
Y25
PCIE_VSS
Y32
PCIE_VSS
AC24
PCIE_VSS
AC26
PCIE_VSS
AC27
PCIE_VSS
AD25
PCIE_VSS
AD32
PCIE_VSS
AE27
VSS_MECH A32
VSS_MECH AM1
VSS_MECH AM32
GND A3
GND AD8
GND AE7
GND AG12
GND AH10
GND AH28
GND B10
GND B12
GND B14
GND B16
GND B18
GND A30
GND B20
GND B22
GND B24
GND B26
GND B6
GND B8
GND C1
GND C32
GND E28
GND F10
GND/EVDDQ AA13
GND F12
GND F14
GND F16
GND F18
GND F2
GND F20
GND F22
GND F24
GND F26
GND F6
GND AA16
GND F8
GND G10
GND G27
GND G31
GND G8
GND H14
GND H17
GND H2
GND H20
GND H6
GND AB10
GND J27
GND J31
GND K11
GND K2
GND K22
GND K6
GND
M6
GND
N11
GND
N12
GND
N13
GND/EVDDQ AB15
GND
N16
GND
N18
GND
N21
GND
P6
GND
P9
GND
R12
GND
R15
GND
R17
GND
R20
GND
T13
GND AB6
GND
T16
GND
T18
GND
T21
GND
T6
GND
U15
GND
U17
GND
U20
GND
U9
GND
V13
GND AC9
GND
V16
GND
V18
GND
Y10
GND
Y15
GND
Y17
GND
Y20
GND AD6
GND T11
GND R11
GND
5 OF 7
ROBSON-GP-U
VGA1E
DIS_PX
GND
5 OF 7
ROBSON-GP-U
VGA1E
DIS_PX
12
C8717
SC4D7U6D3V3KX-GP
DY
C8717
SC4D7U6D3V3KX-GP
DY
1 2
R8707 0R0603-PAD
DIS_PX
R8707 0R0603-PAD
DIS_PX
1 2
R8702 0R2J-2-GP
ROB
R8702 0R2J-2-GP
ROB
DPA_PVDD AG8
DPA_PVSS AG7
DPA_VDD10 AF6
DPA_VDD10 AF7
DPA_VDD18 AE11
DPA_VDD18 AF11
DPA_VSSR AE1
DPA_VSSR AE3
DPA_VSSR AG1
DPA_VSSR AG6
DPA_VSSR AH5
DPAB_CALR AE10
DPB_PVDD AG10
DPB_PVSS AG11
DPB_VDD10 AF8
DPB_VDD10 AF9
DPB_VSSR AF10
DPB_VSSR AG9
DPB_VSSR AH8
DPB_VSSR AM6
DPB_VSSR AM8
DPB_VDD18 AE13
DPB_VDD18 AF13
DPE_PVDD
AG18
DPE_PVSS
AF19
DPE_VDD10
AG20
DPE_VDD10
AG21
DPE_VDD18
AG15
DPE_VDD18
AG16
DPE_VSSR
AG14
DPE_VSSR
AH14
DPE_VSSR
AM14
DPE_VSSR
AM16
DPE_VSSR
AM18
DPEF_CALR
AF17
DPF_PVDD
AG19
DPF_PVSS
AF20
DPF_VDD10
AF22
DPF_VDD10
AG22
DPF_VDD18
AF16
DPF_VDD18
AG17
DPF_VSSR
AF23
DPF_VSSR
AG23
DPF_VSSR
AM20
DPF_VSSR
AM22
DPF_VSSR
AM24
DP PLL POWER
DP A/B POWERDP E/F POWER
7 OF 7
ROBSON-GP-U
VGA1G
DIS_PX
DP PLL POWER
DP A/B POWERDP E/F POWER
7 OF 7
ROBSON-GP-U
VGA1G
DIS_PX
12
C8725
SCD1U10V2KX-5GP
DY
C8725
SCD1U10V2KX-5GP
DY
12
C8711
SCD1U10V2KX-5GP
DY
C8711
SCD1U10V2KX-5GP
DY
1 2
R8703
150R2F-1-GP
DIS_PX
R8703
150R2F-1-GP
DIS_PX
12
C8703
SC1U6D3V2KX-GP
DY
C8703
SC1U6D3V2KX-GP
DY
1
TP8701TPAD14TP8701TPAD14
12
C8709
SC4D7U6D3V3KX-GP
DY
C8709
SC4D7U6D3V3KX-GP
DY
1 2
R8708 0R0603-PAD
DIS_PX
R8708 0R0603-PAD
DIS_PX
12
C8713
SC4D7U6D3V3KX-GP
DY
C8713
SC4D7U6D3V3KX-GP
DY
12
C8712
SC1U6D3V2KX-GP
DY
C8712
SC1U6D3V2KX-GP
DY
12
C8714
SCD1U10V2KX-5GP
DY
C8714
SCD1U10V2KX-5GP
DY
1
TP8702TPAD14TP8702TPAD14
1 2
R8705 0R0603-PAD
DIS_PX
R8705 0R0603-PAD
DIS_PX
12
C8710
SC1U6D3V2KX-GP
DY
C8710
SC1U6D3V2KX-GP
DY
1 2
R8704 0R2J-2-GP
ROB
R8704 0R2J-2-GP
ROB
12
C8719
SCD1U10V2KX-5GP
DY
C8719
SCD1U10V2KX-5GP
DY
1
TP8703TPAD14TP8703TPAD14
12
C8718
SC1U6D3V2KX-GP
DY
C8718
SC1U6D3V2KX-GP
DY
12
C8702
SCD1U10V2KX-5GP
DY
C8702
SCD1U10V2KX-5GP
DY
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VRAM_ZQ1 VRAM_ZQ2
GPU_CLKA0_T
VRAM1_VREF VRAM2_VREF
MDA0
MDA3
MDA18 MDA11
MDA23 MDA10
MDA14
MDA19
MDA28
MDA1
MDA2
MDA5
MDA7
MDA24
MDA27
MDA29
MDA31
MDA30
MDA25
MDA26
MDA12
MDA8
MDA15
MDA22
MDA21
MDA20
MDA17
MDA16
MDA4
MDA6
MDA13
MDA9
VRAM1_VREF
VRAM2_VREF VRAM1_VREF
VRAM2_VREF
1D5V_VGA_S0 1D5V_VGA_S0
1D5V_VGA_S0 1D5V_VGA_S0
MAA084,89 MAA184,89 MAA284,89 MAA384,89 MAA484,89 MAA584,89 MAA684,89 MAA784,89 MAA884,89 MAA984,89 MAA1084,89 MAA1184,89 MAA1284,89 MAA1384,89
RASA0#84 CASA0#84 WEA0#84
CSA0#_0 84
A_BA084,89 A_BA184,89 A_BA284,89
CKEA084
CLKA084 CLKA0#84
MEM_RST 84,89
ODTA0 84
QSAP_0 84
QSAN_0 84
MDA[0..31] 84
CASA0#84 WEA0#84
MDA[0..31] 84
CSA0#_0 84
MEM_RST 84,89
CKEA084
ODTA0 84
RASA0#84
A_BA084,89 A_BA184,89 A_BA284,89
MAA084,89 MAA184,89 MAA284,89 MAA384,89 MAA484,89 MAA584,89 MAA684,89 MAA784,89 MAA884,89 MAA984,89 MAA1084,89 MAA1184,89 MAA1284,89 MAA1384,89
CLKA0#84 CLKA084
QSAP_3 84
QSAN_3 84
QSAP_2 84
QSAN_2 84 QSAP_1 84
QSAN_1 84
DQMA384
DQMA284 DQMA184
DQMA084
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU-VRAM1,2 (1/4)
A3
88 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU-VRAM1,2 (1/4)
A3
88 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
GPU-VRAM1,2 (1/4)
A3
88 109Friday, April 22, 2011
<Core Design>
SSID = VIDEO
1 2
R8802 243R2F-2-GP
DIS_PX
R8802 243R2F-2-GP
DIS_PX
12
C8806
SC1000P50V3JN-GP-U
DIS_PX
C8806
SC1000P50V3JN-GP-U
DIS_PX
1 2
R8801 243R2F-2-GP
DIS_PX
R8801 243R2F-2-GP
DIS_PX
DMU
D3
DML
E7
DQSU C7
A7
R2
CS# L2
CK#
K7
DQSU# B7
CKE
K9
A8
T8
WE#
L3
VREFDQ
H1
VREFCA
M8
VSSQ G9
DQSL F3
VSS A9
DQSL# G3
VSS E1
VSS B3
VSSQ G1
VSSQ F9
VSSQ B9
VSSQ B1
VSS T9
VSS T1
VSS P9
VSS P1
VSS M9
VSS M1
VSS J8
VSS J2
VSS G8
ODT K1
RAS#
J3
A1
P7 A0
N3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
A2
P3
A5
P2
A6
R8
A9
R3
BA1
N8 BA0
M2
BA2
M3
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
A3
N2
A4
P8
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
CK
J7
RESET# T2
CAS#
K3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VRAM2
K4W1G1646E-HC12-GP
DIS_PX
VRAM2
K4W1G1646E-HC12-GP
DIS_PX
12
R8805
2K1R2F-GP
DIS_PX
R8805
2K1R2F-GP
DIS_PX
12
R8808
2K1R2F-GP
DIS_PX
R8808
2K1R2F-GP
DIS_PX
12
C8807
SC1000P50V3JN-GP-U
DIS_PX
C8807
SC1000P50V3JN-GP-U
DIS_PX
12
C8802
SCD01U16V2KX-3GP
DIS_PX
C8802
SCD01U16V2KX-3GP
DIS_PX
12
R8803
56R2F-1-GP
DIS_PX
R8803
56R2F-1-GP
DIS_PX
12
R8806
2K1R2F-GP
DIS_PX
R8806
2K1R2F-GP
DIS_PX
12
C8805
SCD1U10V2KX-5GP
DIS_PX
C8805
SCD1U10V2KX-5GP
DIS_PX
DMU
D3
DML
E7
DQSU C7
A7
R2
CS# L2
CK#
K7
DQSU# B7
CKE
K9
A8
T8
WE#
L3
VREFDQ
H1
VREFCA
M8
VSSQ G9
DQSL F3
VSS A9
DQSL# G3
VSS E1
VSS B3
VSSQ G1
VSSQ F9
VSSQ B9
VSSQ B1
VSS T9
VSS T1
VSS P9
VSS P1
VSS M9
VSS M1
VSS J8
VSS J2
VSS G8
ODT K1
RAS#
J3
A1
P7 A0
N3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
A2
P3
A5
P2
A6
R8
A9
R3
BA1
N8 BA0
M2
BA2
M3
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
A3
N2
A4
P8
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
CK
J7
RESET# T2
CAS#
K3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VRAM1
K4W1G1646E-HC12-GP
DIS_PX
VRAM1
K4W1G1646E-HC12-GP
DIS_PX
12
R8807
2K1R2F-GP
DIS_PX
R8807
2K1R2F-GP
DIS_PX
12
C8803
SCD1U10V2KX-5GP
DIS_PX
C8803
SCD1U10V2KX-5GP
DIS_PX
12
R8804
56R2F-1-GP
DIS_PX
R8804
56R2F-1-GP
DIS_PX
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VRAM_ZQ3 VRAM_ZQ4
MDA44
GPU_CLKA1_T
VRAM3_VREF VRAM4_VREF
MDA39
MDA47
MDA46
MDA45
MDA48
MDA49
MDA58
MDA55
MDA50
MDA56
MDA53
MDA51
MDA60
MDA54
MDA61
MDA52
MDA59
MDA42
MDA63
MDA35
MDA38
MDA36
MDA33
MDA32
MDA41
MDA40
MDA43
MDA62
MDA57
MDA37
MDA34
VRAM3_VREF
VRAM4_VREF VRAM3_VREF
VRAM4_VREF
1D5V_VGA_S01D5V_VGA_S0
1D5V_VGA_S0 1D5V_VGA_S0
CASA1#84
CLKA1#84
WEA1#84
MDA[32..63] 84
CSA1#_0 84
MEM_RST 84,88
CKEA184
CASA1#84
ODTA1 84
RASA1#84
WEA1#84
DQMA584
MDA[32..63] 84
DQMA484
CSA1#_0 84
QSAP_5 84
QSAN_5 84
MEM_RST 84,88
CKEA184
ODTA1 84
CLKA184
RASA1#84
QSAP_4 84
QSAN_4 84
MAA384,88 MAA284,88 MAA184,88
MAA684,88 MAA584,88 MAA484,88
MAA984,88 MAA884,88 MAA784,88
MAA1284,88 MAA1184,88 MAA1084,88
MAA1384,88
A_BA284,88 A_BA184,88 A_BA084,88
MAA084,88
MAA384,88 MAA284,88 MAA184,88
MAA684,88 MAA584,88 MAA484,88
MAA984,88 MAA884,88 MAA784,88
MAA1284,88 MAA1184,88 MAA1084,88
MAA1384,88
A_BA284,88 A_BA184,88 A_BA084,88
MAA084,88
CLKA1#84 CLKA184
QSAN_7 84
QSAN_6 84
QSAP_7 84
QSAP_6 84
DQMA784 DQMA684
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU-VRAM3,4 (2/4)
A3
89 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU-VRAM3,4 (2/4)
A3
89 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU-VRAM3,4 (2/4)
A3
89 109Friday, April 22, 2011
<Core Design>
SSID = VIDEO
12
C8916
SC10U6D3V5KX-1GP
DIS_PX
C8916
SC10U6D3V5KX-1GP
DIS_PX
1 2
R8903 243R2F-2-GP
DIS_PX
R8903 243R2F-2-GP
DIS_PX
12
C8907
SC10U6D3V5KX-1GP
DIS_PX
C8907
SC10U6D3V5KX-1GP
DIS_PX
DMU
D3
DML
E7
DQSU C7
A7
R2
CS# L2
CK#
K7
DQSU# B7
CKE
K9
A8
T8
WE#
L3
VREFDQ
H1
VREFCA
M8
VSSQ G9
DQSL F3
VSS A9
DQSL# G3
VSS E1
VSS B3
VSSQ G1
VSSQ F9
VSSQ B9
VSSQ B1
VSS T9
VSS T1
VSS P9
VSS P1
VSS M9
VSS M1
VSS J8
VSS J2
VSS G8
ODT K1
RAS#
J3
A1
P7 A0
N3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
A2
P3
A5
P2
A6
R8
A9
R3
BA1
N8 BA0
M2
BA2
M3
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
A3
N2
A4
P8
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
CK
J7
RESET# T2
CAS#
K3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VRAM3
K4W1G1646E-HC12-GP
DIS_PX
VRAM3
K4W1G1646E-HC12-GP
DIS_PX
12
C8917
SC1U6D3V2KX-GP
DIS_PX
C8917
SC1U6D3V2KX-GP
DIS_PX
12
C8913
SCD1U10V2KX-5GP
DIS_PX
C8913
SCD1U10V2KX-5GP
DIS_PX
12
R8905
2K1R2F-GP
DIS_PX
R8905
2K1R2F-GP
DIS_PX
12
R8902
2K1R2F-GP
DIS_PX
R8902
2K1R2F-GP
DIS_PX
12
C8923
SCD1U10V2KX-5GP
DIS_PX
C8923
SCD1U10V2KX-5GP
DIS_PX
12
C8906
SC1U6D3V2KX-GP
DIS_PX
C8906
SC1U6D3V2KX-GP
DIS_PX
12
C8903
SCD01U16V2KX-3GP
DIS_PX
C8903
SCD01U16V2KX-3GP
DIS_PX
12
R8908
56R2F-1-GP
DIS_PX
R8908
56R2F-1-GP
DIS_PX
DMU
D3
DML
E7
DQSU C7
A7
R2
CS# L2
CK#
K7
DQSU# B7
CKE
K9
A8
T8
WE#
L3
VREFDQ
H1
VREFCA
M8
VSSQ G9
DQSL F3
VSS A9
DQSL# G3
VSS E1
VSS B3
VSSQ G1
VSSQ F9
VSSQ B9
VSSQ B1
VSS T9
VSS T1
VSS P9
VSS P1
VSS M9
VSS M1
VSS J8
VSS J2
VSS G8
ODT K1
RAS#
J3
A1
P7 A0
N3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
A2
P3
A5
P2
A6
R8
A9
R3
BA1
N8 BA0
M2
BA2
M3
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
A3
N2
A4
P8
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
CK
J7
RESET# T2
CAS#
K3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VRAM4
K4W1G1646E-HC12-GP
DIS_PX
VRAM4
K4W1G1646E-HC12-GP
DIS_PX
12
C8919
SCD1U10V2KX-5GP
DIS_PX
C8919
SCD1U10V2KX-5GP
DIS_PX
12
C8918
SC10U6D3V5KX-1GP
DIS_PX
C8918
SC10U6D3V5KX-1GP
DIS_PX
12
R8901
2K1R2F-GP
DIS_PX
R8901
2K1R2F-GP
DIS_PX
12
C8908
SCD1U10V2KX-5GP
DIS_PX
C8908
SCD1U10V2KX-5GP
DIS_PX
12
C8920
SCD1U10V2KX-5GP
DIS_PX
C8920
SCD1U10V2KX-5GP
DIS_PX
12
C8914
SC1U6D3V2KX-GP
DIS_PX
C8914
SC1U6D3V2KX-GP
DIS_PX
12
C8909
SC1U6D3V2KX-GP
DIS_PX
C8909
SC1U6D3V2KX-GP
DIS_PX
12
C8905
SC10U6D3V5KX-1GP
DIS_PX
C8905
SC10U6D3V5KX-1GP
DIS_PX
12
C8924
SC1000P50V3JN-GP-U
DIS_PX
C8924
SC1000P50V3JN-GP-U
DIS_PX
12
C8904
SCD1U10V2KX-5GP
DIS_PX
C8904
SCD1U10V2KX-5GP
DIS_PX
12
C8901
SCD1U10V2KX-5GP
DIS_PX
C8901
SCD1U10V2KX-5GP
DIS_PX
12
C8910
SCD1U10V2KX-5GP
DIS_PX
C8910
SCD1U10V2KX-5GP
DIS_PX
12
C8915
SCD1U10V2KX-5GP
DIS_PX
C8915
SCD1U10V2KX-5GP
DIS_PX
12
R8906
2K1R2F-GP
DIS_PX
R8906
2K1R2F-GP
DIS_PX
12
C8902
SC1U6D3V2KX-GP
DIS_PX
C8902
SC1U6D3V2KX-GP
DIS_PX
12
C8911
SC1U6D3V2KX-GP
DIS_PX
C8911
SC1U6D3V2KX-GP
DIS_PX
12
C8912
SC1U6D3V2KX-GP
DIS_PX
C8912
SC1U6D3V2KX-GP
DIS_PX
12
C8925
SC1000P50V3JN-GP-U
DIS_PX
C8925
SC1000P50V3JN-GP-U
DIS_PX
12
R8907
56R2F-1-GP
DIS_PX
R8907
56R2F-1-GP
DIS_PX
1 2
R8904 243R2F-2-GP
DIS_PX
R8904 243R2F-2-GP
DIS_PX
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU-VRAM5,6 (3/4)
A3
90 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU-VRAM5,6 (3/4)
A3
90 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU-VRAM5,6 (3/4)
A3
90 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU-VRAM7,8 (4/4)
A3
91 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU-VRAM7,8 (4/4)
A3
91 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
GPU-VRAM7,8 (4/4)
A3
91 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_VGA_CORE_PGOOD
PWR_VGA_CORE_VDD
PWR_VGA_CORE_BOOT
8209A_EN/DEM_VGA
GND_SENSE_1
PWR_VGA_CORE_D1
PWR_VGA_CORE_TON
PWR_VGA_CORE_D0
PWR_VGA_CORE_D1
PWR_VGA_CORE_PGOOD
PWR_VGA_CORE_UGATE
PWR_VGA_CORE_FBPWR_VGA_CORE_CS
8209A_EN/DEM_VGA
PWR_VGA_CORE_FB
PWR_VGA_CORE_PHASE
PWR_VGA_CORE_VOUT
PWR_VGA_CORE_LGATE
PWR_VGA_CORE_BOOT_C
PWR_VGA_CORE_VOUT
PWR_VGA_CORE_D0
DCBATOUT PWR_DCBATOUT_VGA_CORE
PWR_DCBATOUT_VGA_CORE
5V_S5
3D3V_VGA_S0
VGA_CORE_PWR
VGA_CORE VGA_CORE_PWR VGA_CORE
3D3V_VGA_S0
PWRCNTL_0 85
PE_GPIO117,93
PWRCNTL_1 85
8209A_EN/DEM_VGA 86 DGPU_PWROK 93
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RT8208B_+VGA_CORE
A2
92 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RT8208B_+VGA_CORE
A2
92 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
RT8208B_+VGA_CORE
A2
92 109Friday, April 22, 2011
<Core Design>
0.9V
N/A
L
VGA_CORE_PWR
1.12V
H
L
H
PWR_VGA_CORE_D1
Robson-XT
Vout=0.75V*(R1+R2)/R2
H
L
PWR_VGA_CORE_D0
SSID = PWR.Plane.Regulator_VGACORE
0723 Delete sense function
Design Current =12.9A
19.03A<OCP<22.5A
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: 0.82uH PCMC063T-R82MN Cyntec 6.7mohm/8.0mohm Isat =24Arms 68.R8210.10V
O/P cap: 220U 2V EEFCX0D221R 15mOhm 2.7Arms Panasonic/79.22719.20L
H/S: SIR712DP/ POWERPAK/10.3mOhm/12.4mOhm@4.5Vgs/ 84.00172.037
L/S: SiR460DP/ POWERPAK/ 4.9mOhm/ 6.1mohm@4.5Vgs/ 84.00460.037
0824
0825
0825
X01
L H
0.95V H
L
PWR_VGA_CORE_D0
L H
N/A
0.9V
1V
L
VGA_CORE_PWR
1.05V
H
L
H
PWR_VGA_CORE_D1
Seymour-XT
1128-SB
0316-SC
1128-SB
1128-SB
1128-SB
For ROBSON
PR9210=44.2K(64.44225.6DL)
PR9211=150K(64.15035.6DL)
For Seymour
PR9210=150K(64.15035.6DL)
PR9211=75K(64.75025.6DL)
Vout=0.75V*(R1+R2)/R2
12
PT9203
SE330U2VDM-L-GP
DY
PT9203
SE330U2VDM-L-GP
DY
12
PR9216
10R2J-2-GP
DIS_PX
PR9216
10R2J-2-GP
DIS_PX
12
PC9210
SC10P50V2JN-4GP
DY
PC9210
SC10P50V2JN-4GP
DY
12
PR9209
10KR2J-3-GP
DIS_PX
PR9209
10KR2J-3-GP
DIS_PX
1 2
PG9202
GAP-CLOSE-PWR
PG9202
GAP-CLOSE-PWR
1 2
PR9218
10KR2F-2-GP
DIS_PX
PR9218
10KR2F-2-GP
DIS_PX
1 2
PG9206
GAP-CLOSE-PWR
PG9206
GAP-CLOSE-PWR
1 2
PG9214
GAP-CLOSE-PWR
PG9214
GAP-CLOSE-PWR
12
PC9212
SC100P50V2JN-3GP
DIS_PX
PC9212
SC100P50V2JN-3GP
DIS_PX
1 2
PG9213
GAP-CLOSE-PWR
PG9213
GAP-CLOSE-PWR
1 2
PC9201
SCD1U25V3KX-GP
DIS_PX
PC9201
SCD1U25V3KX-GP
DIS_PX
12
PT9201
SE330U2VDM-L-GP
DIS_PX
PT9201
SE330U2VDM-L-GP
DIS_PX
1 2
PG9210
GAP-CLOSE-PWR
PG9210
GAP-CLOSE-PWR
12
PC9207
SCD1U10V2KX-4GP
DIS_PX
PC9207
SCD1U10V2KX-4GP
DIS_PX
1 2
PR9202
200KR2F-L-2-GP
DIS_PX
PR9202
200KR2F-L-2-GP
DIS_PX
1 2
PR9208 10KR2F-2-GP
DIS_PX
PR9208 10KR2F-2-GP
DIS_PX
2 1
PD9201
CH551H-30PT-GP
DY
PD9201
CH551H-30PT-GP
DY
12
PC9206
SC1U10V2KX-1GP
DIS_PX
PC9206
SC1U10V2KX-1GP
DIS_PX
1 2
PG9205
GAP-CLOSE-PWR
PG9205
GAP-CLOSE-PWR
12
PG9221
GAP-CLOSE-PWR-3-GP
PG9221
GAP-CLOSE-PWR-3-GP
12
PC9204
SC10U25V5KX-GP
DIS_PX
PC9204
SC10U25V5KX-GP
DIS_PX
1 2
PG9209
GAP-CLOSE-PWR
PG9209
GAP-CLOSE-PWR
1 2
PG9217
GAP-CLOSE-PWR
PG9217
GAP-CLOSE-PWR
1 2
PG9201
GAP-CLOSE-PWR
PG9201
GAP-CLOSE-PWR
12
PR9201
10R2J-2-GP
DIS_PX
PR9201
10R2J-2-GP
DIS_PX
12
PC9213
SC560P50V-GP
DY
PC9213
SC560P50V-GP
DY
1 2
PG9203
GAP-CLOSE-PWR
PG9203
GAP-CLOSE-PWR
12
PR9211
75KR2F-GP
DIS_PX
PR9211
75KR2F-GP
DIS_PX
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
PU9203
SIR460DP-T1-GE3-GP
DIS_PX
S
S
S
D
D
D
D
G
PU9203
SIR460DP-T1-GE3-GP
DIS_PX
1 2
PG9220
GAP-CLOSE-PWR
PG9220
GAP-CLOSE-PWR
1 2
PG9211
GAP-CLOSE-PWR
PG9211
GAP-CLOSE-PWR
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU9202
SIR172DP-T1-GE3-GP
DIS_PX
S
S
S
GD
D
D
D
PU9202
SIR172DP-T1-GE3-GP
DIS_PX
1 2
PG9208
GAP-CLOSE-PWR
PG9208
GAP-CLOSE-PWR
1 2
PG9204
GAP-CLOSE-PWR
PG9204
GAP-CLOSE-PWR
VOUT 1
VDD
2
FB 3
PGOOD
4
D1 5
D0 6
G0 7
LGATE 8
VDDP
9
CS
10
PHASE 11
UGATE 12
BOOT 13
G1 14
EM/DEM
15
TON
16
GND
17
PU9201
RT8208BGQW -GP
DIS_PX
PU9201
RT8208BGQW -GP
DIS_PX
12
PR9212
0R0402-PAD
PR9212
0R0402-PAD
1 2
PC9205
SCD1U25V2KX-GP
DY
PC9205
SCD1U25V2KX-GP
DY
12
PC9208
SC1U10V2KX-1GP
DIS_PX
PC9208
SC1U10V2KX-1GP
DIS_PX
12
PR9206
2D2R5F-2-GP
DY
PR9206
2D2R5F-2-GP
DY
12
PC9202
SC10U25V5KX-GP
DIS_PX
PC9202
SC10U25V5KX-GP
DIS_PX
1 2
PG9212
GAP-CLOSE-PWR
PG9212
GAP-CLOSE-PWR
1 2
PG9218
GAP-CLOSE-PWR
PG9218
GAP-CLOSE-PWR
1 2
PG9216
GAP-CLOSE-PWR
PG9216
GAP-CLOSE-PWR
12
PC9203
SC10U25V5KX-GP
DIS_PX
PC9203
SC10U25V5KX-GP
DIS_PX
12
PC9211
SCD1U10V2KX-4GP
DY
PC9211
SCD1U10V2KX-4GP
DY
1 2
PL9201
COIL-D82UH-2-GP
DIS_PX
PL9201
COIL-D82UH-2-GP
DIS_PX
12
PT9202
SE330U2VDM-L-GP
DIS_PX
PT9202
SE330U2VDM-L-GP
DIS_PX
12
PR9204
10R2F-L-GP
DIS_PX
PR9204
10R2F-L-GP
DIS_PX
1 2
PG9215
GAP-CLOSE-PWR
PG9215
GAP-CLOSE-PWR
12
PR9203
2D2R3-1-U-GP
DIS_PX
PR9203
2D2R3-1-U-GP
DIS_PX
12
PC9209
SC10P50V2JN-4GP
DY
PC9209
SC10P50V2JN-4GP
DY
12
PR9205
11K3R2F-2-GP
DIS_PX
PR9205
11K3R2F-2-GP
DIS_PX
1 2
PG9219
GAP-CLOSE-PWR
PG9219
GAP-CLOSE-PWR
1 2
PG9207
GAP-CLOSE-PWR
PG9207
GAP-CLOSE-PWR
12
PR9213
49K9R2F-L-GP
DIS_PX
PR9213
49K9R2F-L-GP
DIS_PX
12
PR9210
150KR2F-L-GP
DIS_PX
PR9210
150KR2F-L-GP
DIS_PX
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
9025_PWRGD_VGA_1V
1D5V_ENABLE
3.3V_RUN_VGA_1
3.3V_ALW _1
PWR_1V_VGA_PW RGD
PWR_1V_ADJ
PWR_1V_VGA_VDD
PWR_1V_VGA_EN
DIS_1D5V_VGA_S0
1D5V_VGA_EN#
1D5V_VGA_EN
1D5V_VGA_EN#
1D5V_ENABLE_RC
1D8V_VGA_EN# 1D8V_ENABLE_RC
1D8V_ENABLE
PWR_1D8V_VGA_EN9025_PWRGD_VGA_1V
PQ9310_B
PQ9310_C
3D3V_S0
3D3V_VGA_S0
1V_VGA_PWR 1V_VGA_S0
1D5V_S3
5V_S5
3D3V_VGA_S0 3D3V_AUX_S5
1D5V_S3 1D5V_VGA_S0
1D5V_VGA_S0
3D3V_VGA_S0 15V_S5
3D3V_AUX_S5
1D8V_S0 1D8V_VGA_S0
15V_S5
1D8V_VGA_S0
3D3V_VGA_S03D3V_S5
PE_GPIO117,92
PE_GPIO117,92
PE_GPIO117,92
DGPU_PWROK92
PE_GPIO117,92
1D8V_S0_VGA_PG 83
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DISCRETE VGA POWER
A2
93 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DISCRETE VGA POWER
A2
93 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
DISCRETE VGA POWER
A2
93 109Friday, April 22, 2011
<Core Design>
0629 Modify:
Reserved PD9302 connect DGPU_PWR_EN to
PWR_1V_EN for power down sequence.
Different To Intel, AMD Is High Active
0504 chaomin
+3VS to 3.3V_DELAY Transfer
VGA_Coreshould ramp-up before 1V_VGA_S0
1V_VGA_S0 should ramp up before 1D8V_VGA_S0
RT9025 for 1V_VGA_S0
Vo(cal.)=1V
Iomax>1.2A
so 1V_VGA_S0 EN have to fine tune RC delay
after VGA_Core
3D3V_VGA_S0 should ramp-up before VGA_Core
0603
3D3V_VGA discharge
H
dGPU mode
IGPU
IGPU with BACO
PE_GPIO0
H
L
PE_GPIO1
H
Park_Madison Does Not Support BACO, So follow Old Sequence
Seymour_Whistler_Robson Support BACO, So Change Sequence
L
Discharge Circuit
0628 Modify:
Simplify 1D5V_ENABLE control circuit.
Rmoved PQ9305,PR9327,PR9328 PQ9306.
H
Park_Madison Does Not Support BACO, So follow Old Sequence
Seymour_Whistler_Robson Support BACO, So Change Sequence
G
GD
D
S
S
0629 Modify:
Reserved PD9301 connect DGPU_PWR_EN to
PWR_1D5V_EN for power down sequence.
0628 Modify:
Change PU9305 part number to 84.04468.037 same as U3601&U3602.
1D5V_VGA_S0
change low Rds(on) MOSFET
0629 Modify:
Add PC9332 10uF 0603.
0721
1D8V_VGA_S0
G
GD
D
S
S
1D8V_VGA_S0_PG
0629 Modify
0629 Modify
0802 Rename to 1D5V_VGA_EN
0802 Rename to 1D5V_VGA_EN
0802 Rename to 1D5V_VGA_EN
AO4468 MAX 11.6A
Rds(on) = 11~14mOhm
VGS=+/-20V
AO4468 MAX 11.6A
Rds(on) = 11~14mOhm
VGS=+/-20V
0825
X01
84.2N702.J31
2nd = 84.07002.I31
84.2N702.J31
2nd = 84.07002.I31
1
2
3
45
6
7
8
S
S
S
GD
D
D
D
PU9306
AO4468-GP
84.04468.037
2nd = 84.08882.037
DIS_PX
S
S
S
GD
D
D
D
PU9306
AO4468-GP
84.04468.037
2nd = 84.08882.037
DIS_PX
1 2
PG9303
GAP-CLOSE-PWR
PG9303
GAP-CLOSE-PWR
12
PC9308
SC10U6D3V5MX-3GP
DIS_PX
PC9308
SC10U6D3V5MX-3GP
DIS_PX
12
PC9331
SC10U6D3V3MX-GP
DIS_PX
PC9331
SC10U6D3V3MX-GP
DIS_PX
SD
G
G
D
PQ9302
DMP2130L-7-GP
2ND = 84.03413.A31
DIS_PX
84.02130.031
G
D
PQ9302
DMP2130L-7-GP
2ND = 84.03413.A31
DIS_PX
84.02130.031
12
PC9310
SCD1U10V2KX-5GP
DY
PC9310
SCD1U10V2KX-5GP
DY
12
PR9303
100KR2J-1-GP
DIS_PX
PR9303
100KR2J-1-GP
DIS_PX
12
PC9329
SCD01U50V2KX-1GP
DIS_PX
PC9329
SCD01U50V2KX-1GP
DIS_PX
2 1
PD9301
CH551H-30PT-GP
DY
PD9301
CH551H-30PT-GP
DY
12
PC9311
SC100P50V2JN-3GP
DY
PC9311
SC100P50V2JN-3GP
DY
12
PR9312
2K2R2J-2-GP
DIS_PX
PR9312
2K2R2J-2-GP
DIS_PX
1 2
PR9310
0R0402-PAD
DIS_PX
PR9310
0R0402-PAD
DIS_PX
12
PC9315
SCD01U50V2KX-1GP
DIS_PX
PC9315
SCD01U50V2KX-1GP
DIS_PX
1 2
PR9334 100KR2J-1-GP
DIS_PX
PR9334 100KR2J-1-GP
DIS_PX
12
PC9313
SC10U6D3V5MX-3GP
DY
PC9313
SC10U6D3V5MX-3GP
DY
1 2
PR9315
20KR2F-L-GP
DIS_PX
PR9315
20KR2F-L-GP
DIS_PX
12
PC9314
SC10U6D3V3MX-GP
DIS_PX
PC9314
SC10U6D3V3MX-GP
DIS_PX
PGOOD
1EN
2VIN
3VDD
4NC#5 5
VOUT 6
ADJ 7
GND 8
GND 9
PU9302
RT9025-25ZSP-GP
DIS_PX
PU9302
RT9025-25ZSP-GP
DIS_PX
12
PC9323
SCD1U10V2KX-5GP
DY
PC9323
SCD1U10V2KX-5GP
DY
1 2
PR9316 100KR2J-1-GP
DIS_PX
PR9316 100KR2J-1-GP
DIS_PX
12
PR9317
470R2J-2-GP
DIS_PX
PR9317
470R2J-2-GP
DIS_PX
G
S
D
PQ9301
2N7002K-2-GP
DIS_PX
PQ9301
2N7002K-2-GP
DIS_PX
C
B
E
PQ9310
MMBT3904-4-GP
84.T3904.C11
2ND = 84.03904.P11
3rd = 84.03904.L06
DIS_PX
PQ9310
MMBT3904-4-GP
84.T3904.C11
2ND = 84.03904.P11
3rd = 84.03904.L06
DIS_PX
1 2
PR9318
0R0402-PAD
DIS_PX
PR9318
0R0402-PAD
DIS_PX
1
2
3 4
5
6
PQ9304
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DIS_PX
PQ9304
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DIS_PX
1 2
PR9335
100KR2J-1-GP
DIS_PX
PR9335
100KR2J-1-GP
DIS_PX
1 2
PR9313
0R0402-PAD
DIS_PX
PR9313
0R0402-PAD
DIS_PX
1 2
PR9319
100KR2J-1-GP
DIS_PX
PR9319
100KR2J-1-GP
DIS_PX
1 2
PR9301
0R2J-2-GP
DY
PR9301
0R2J-2-GP
DY
1 2
PG9304
GAP-CLOSE-PWR
PG9304
GAP-CLOSE-PWR
12
PC9302
SCD1U10V2KX-5GP
DY
PC9302
SCD1U10V2KX-5GP
DY
1
2
3 4
5
6
PQ9303
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DIS_PX
PQ9303
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DIS_PX
12
PC9309
SC1U6D3V2KX-GP
DIS_PX
PC9309
SC1U6D3V2KX-GP
DIS_PX
1 2
PR9340
2K2R2J-2-GP
DIS_PX
PR9340
2K2R2J-2-GP
DIS_PX
1
2
3 4
5
6
PQ9306
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DIS_PX
PQ9306
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DIS_PX
12
PR9311
10KR2F-2-GP
DIS_PX
PR9311
10KR2F-2-GP
DIS_PX
1 2
PR9305
470R2J-2-GP
DIS_PX
PR9305
470R2J-2-GP
DIS_PX
2 1
PD9304
CH551H-30PT-GP
DY
PD9304
CH551H-30PT-GP
DY
G
S
D
PQ9309
2N7002K-2-GP
DIS_PX
PQ9309
2N7002K-2-GP
DIS_PX
12
PR9339
10KR2J-3-GP
DIS_PX
PR9339
10KR2J-3-GP
DIS_PX
12
PC9301
SC10U6D3V3MX-GP
DIS_PX
PC9301
SC10U6D3V3MX-GP
DIS_PX
12
PR9314
39KR2F-GP
DIS_PX
PR9314
39KR2F-GP
DIS_PX
12
PR9309
0R0402-PAD
DIS_PX
PR9309
0R0402-PAD
DIS_PX
12
PR9333
20KR2F-L-GP
DIS_PX
PR9333
20KR2F-L-GP
DIS_PX
2 1
PD9303
CH551H-30PT-GP
DY
PD9303
CH551H-30PT-GP
DY
1 2
PR9320
0R0402-PAD
DIS_PX
PR9320
0R0402-PAD
DIS_PX
12
PC9312
SC10U6D3V5MX-3GP
DIS_PX
PC9312
SC10U6D3V5MX-3GP
DIS_PX
12
PR9338
10KR2J-3-GP
DIS_PX
PR9338
10KR2J-3-GP
DIS_PX
12
PC9330
SC10U6D3V3MX-GP
DIS_PX
PC9330
SC10U6D3V3MX-GP
DIS_PX
1
2
3
45
6
7
8
S
S
S
GD
D
D
D
PU9303
AO4468-GP
84.04468.037
2nd = 84.08882.037
DIS_PX
S
S
S
GD
D
D
D
PU9303
AO4468-GP
84.04468.037
2nd = 84.08882.037
DIS_PX
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LVDS_Switch
94 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LVDS_Switch
94 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
LVDS_Switch
94 109Friday, April 22, 2011
<Core Design>
SSID = VIDEO
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Docu men t Num ber Rev
Date : Sh eet of
Wistron Corporation
21F, 88 , Sec.1, Hs in Tai Wu Rd., Hs ichih ,
Taip ei Hs ien 22 1, Taiwa n, R.O.C.
Enrico 14 AMD
A00
Reserved
A0
95 109Frid ay, April 22, 2 011
<Cor e Des ign>
Title
Size Docu men t Num ber Rev
Date : Sh eet of
Wistron Corporation
21F, 88 , Sec.1, Hs in Tai Wu Rd., Hs ichih ,
Taip ei Hs ien 22 1, Taiwa n, R.O.C.
Enrico 14 AMD
A00
Reserved
A0
95 109Frid ay, April 22, 2 011
<Cor e Des ign>
Title
Size Docu men t Num ber Rev
Date : Sh eet of
Wistron Corporation
21F, 88 , Sec.1, Hs in Tai Wu Rd., Hs ichih ,
Taip ei Hs ien 22 1, Taiwa n, R.O.C.
Enrico 14 AMD
A00
Reserved
A0
95 109Frid ay, April 22, 2 011
<Cor e Des ign>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Touch Panel
A3
96 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Touch Panel
A3
96 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Touch Panel
A3
96 109Friday, April 22, 2011
<Core Design>
(Blanking)
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_CORE 5V_S5 5V_S0
DCBATOUT
3D3V_S0
1D5V_S3
1D5V_VGA_S0
DCBATOUT 3D3V_S0
ODD_PWR_5V 1D1V_S0
DCBATOUT 5V_S5
DCBATOUT 3D3V_S5
1D5V_S3 3D3V_S5
+DC_IN 5V_S5
PWR_3D3V_DCBATOUT
3D3V_S5
1D5V_S3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
UNUSED PARTS/CAP
A3
97 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
UNUSED PARTS/CAP
A3
97 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
UNUSED PARTS/CAP
A3
97 109Friday, April 22, 2011
<Core Design>
0824 EMI Request
X01 EMI 12/13
X01 EMI 12/13
X01 EMI 12/13
X01 EMI 12/13
X01 EMI 12/16
CPU BRACKET Stand Off
X02
X02
A00
12
EC9740
SCD1U25V2KX-GP
DY
EC9740
SCD1U25V2KX-GP
DY
12
EC9730
SCD1U25V2KX-GP
DY
EC9730
SCD1U25V2KX-GP
DY
12
EC9721
SCD1U25V2KX-GP
DY
EC9721
SCD1U25V2KX-GP
DY
1 2
EC9752 SCD1U25V2KX-GP
DY
EC9752 SCD1U25V2KX-GP
DY
1
H2
HOLE256R115-GP
H2
HOLE256R115-GP
12
EC9761
SCD1U25V2KX-GP
DY
EC9761
SCD1U25V2KX-GP
DY
12
EC9724
SCD1U25V2KX-GP
DY
EC9724
SCD1U25V2KX-GP
DY
12
EC9742
SCD1U25V2KX-GP
EC9742
SCD1U25V2KX-GP
12
EC9779
SC47P50V2JN-3GP
EC9779
SC47P50V2JN-3GP
1 2
EC9722 SCD1U25V2KX-GP
DY
EC9722 SCD1U25V2KX-GP
DY
12
EC9784
SC47P50V2JN-3GP
EC9784
SC47P50V2JN-3GP
1
H1
HT85BE85R29-U-5-GP
H1
HT85BE85R29-U-5-GP
1
H6
HT85BE85R29-U-5-GP
H6
HT85BE85R29-U-5-GP
12
EC9763
SCD1U25V2KX-GP
DY
EC9763
SCD1U25V2KX-GP
DY
1 2
EC9757 SCD1U25V2KX-GP
DY
EC9757 SCD1U25V2KX-GP
DY
12
EC9701
SCD1U25V2KX-GP
DY
EC9701
SCD1U25V2KX-GP
DY
12
EC9704
SCD1U25V2KX-GP
DY
EC9704
SCD1U25V2KX-GP
DY
1 2
EC9754 SCD1U25V2KX-GP
DY
EC9754 SCD1U25V2KX-GP
DY
1
H11
STF237R117H83-1-GP
H11
STF237R117H83-1-GP
12
EC9765
SCD1U25V2KX-GP
DY
EC9765
SCD1U25V2KX-GP
DY
12
EC9744
SCD1U25V2KX-GP
DY
EC9744
SCD1U25V2KX-GP
DY
12
EC9708
SCD1U25V2KX-GP
DY
EC9708
SCD1U25V2KX-GP
DY
12
EC9705
SCD1U25V2KX-GP
DY
EC9705
SCD1U25V2KX-GP
DY
12
EC9733
SCD1U25V2KX-GP
EC9733
SCD1U25V2KX-GP
12
EC9769
SCD1U25V2KX-GP
DY
EC9769
SCD1U25V2KX-GP
DY
12
EC9746
SCD1U25V2KX-GP
EC9746
SCD1U25V2KX-GP
12
EC9772
SCD1U25V2KX-GP
DY
EC9772
SCD1U25V2KX-GP
DY
12
EC9717
SCD1U25V2KX-GP
DY
EC9717
SCD1U25V2KX-GP
DY
12
EC9780
SC47P50V2JN-3GP
EC9780
SC47P50V2JN-3GP
12
EC9714
SCD1U25V2KX-GP
DY
EC9714
SCD1U25V2KX-GP
DY
12
EC9735
SCD1U25V2KX-GP
EC9735
SCD1U25V2KX-GP
12
EC9774
SCD1U25V2KX-GP
DY
EC9774
SCD1U25V2KX-GP
DY
12
EC9748
SCD1U25V2KX-GP
EC9748
SCD1U25V2KX-GP
12
EC9782
SCD1U25V2KX-GP
DY
EC9782
SCD1U25V2KX-GP
DY
12
EC9737
SCD1U25V2KX-GP
DY
EC9737
SCD1U25V2KX-GP
DY
12
EC9776
SCD1U25V2KX-GP
DY
EC9776
SCD1U25V2KX-GP
DY
12
EC9719
SC47P50V2JN-3GP
EC9719
SC47P50V2JN-3GP
12
EC9726
SCD1U25V2KX-GP
DY
EC9726
SCD1U25V2KX-GP
DY
12
EC9781
SC47P50V2JN-3GP
EC9781
SC47P50V2JN-3GP
1
SPR3
SPRING-62-GP
SPR3
SPRING-62-GP
12
EC9739
SCD1U25V2KX-GP
EC9739
SCD1U25V2KX-GP
12
EC9725
SCD1U25V2KX-GP
DY
EC9725
SCD1U25V2KX-GP
DY
12
EC9727
SCD1U25V2KX-GP
DY
EC9727
SCD1U25V2KX-GP
DY
1
H4
HT85BE85R29-U-5-GP
H4
HT85BE85R29-U-5-GP
1
H10
HOLE256R126-1-GP
H10
HOLE256R126-1-GP
1 2
EC9723 SCD1U25V2KX-GP
DY
EC9723 SCD1U25V2KX-GP
DY
12
EC9778
SCD1U25V2KX-GP
DY
EC9778
SCD1U25V2KX-GP
DY
12
EC9760
SCD1U25V2KX-GP
DY
EC9760
SCD1U25V2KX-GP
DY
1 2
EC9756 SCD1U25V2KX-GP
DY
EC9756 SCD1U25V2KX-GP
DY
12
EC9729
SCD1U25V2KX-GP
DY
EC9729
SCD1U25V2KX-GP
DY
12
EC9713
SCD1U25V2KX-GP
DY
EC9713
SCD1U25V2KX-GP
DY
12
EC9741
SCD1U25V2KX-GP
EC9741
SCD1U25V2KX-GP
12
EC9731
SCD1U25V2KX-GP
DY
EC9731
SCD1U25V2KX-GP
DY
12
EC9711
SCD1U25V2KX-GP
DY
EC9711
SCD1U25V2KX-GP
DY
1 2
EC9753 SCD1U25V2KX-GPEC9753 SCD1U25V2KX-GP
12
EC9718
SC47P50V2JN-3GP
EC9718
SC47P50V2JN-3GP
12
EC9706
SCD1U25V2KX-GP
DY
EC9706
SCD1U25V2KX-GP
DY
1
SPR1
SPRING-58-GP
SPR1
SPRING-58-GP
12
EC9762
SCD1U25V2KX-GP
DY
EC9762
SCD1U25V2KX-GP
DY
12
EC9743
SCD1U25V2KX-GP
EC9743
SCD1U25V2KX-GP
12
EC9715
SCD1U25V2KX-GP
DY
EC9715
SCD1U25V2KX-GP
DY
12
EC9707
SCD1U25V2KX-GP
EC9707
SCD1U25V2KX-GP
1 2
EC9751 SCD1U25V2KX-GP
DY
EC9751 SCD1U25V2KX-GP
DY
12
EC9764
SCD1U25V2KX-GP
DY
EC9764
SCD1U25V2KX-GP
DY
12
EC9712
SCD1U25V2KX-GP
DY
EC9712
SCD1U25V2KX-GP
DY
12
EC9709
SCD1U25V2KX-GP
DY
EC9709
SCD1U25V2KX-GP
DY
1 2
EC9755 SCD1U25V2KX-GPEC9755 SCD1U25V2KX-GP
12
EC9732
SCD1U25V2KX-GP
EC9732
SCD1U25V2KX-GP
12
EC9767
SCD1U25V2KX-GP
DY
EC9767
SCD1U25V2KX-GP
DY
12
EC9766
SCD1U25V2KX-GP
DY
EC9766
SCD1U25V2KX-GP
DY
12
EC9745
SCD1U25V2KX-GP
DY
EC9745
SCD1U25V2KX-GP
DY
12
EC9734
SCD1U25V2KX-GP
EC9734
SCD1U25V2KX-GP
12
EC9783
SC47P50V2JN-3GP
EC9783
SC47P50V2JN-3GP
12
EC9770
SCD1U25V2KX-GP
DY
EC9770
SCD1U25V2KX-GP
DY
12
EC9716
SC47P50V2JN-3GP
EC9716
SC47P50V2JN-3GP
1
H8
HOLE256R142-GP
H8
HOLE256R142-GP
12
EC9771
SCD1U25V2KX-GP
DY
EC9771
SCD1U25V2KX-GP
DY
12
EC9702
SCD1U25V2KX-GP
DY
EC9702
SCD1U25V2KX-GP
DY
12
EC9747
SCD1U25V2KX-GP
DY
EC9747
SCD1U25V2KX-GP
DY
1
H12
STF217R113H162-GP
H12
STF217R113H162-GP
12
EC9773
SCD1U25V2KX-GP
DY
EC9773
SCD1U25V2KX-GP
DY
12
EC9703
SCD1U25V2KX-GP
DY
EC9703
SCD1U25V2KX-GP
DY
12
EC9736
SCD1U25V2KX-GP
EC9736
SCD1U25V2KX-GP
12
EC9775
SCD1U25V2KX-GP
DY
EC9775
SCD1U25V2KX-GP
DY
12
EC9749
SCD1U25V2KX-GP
EC9749
SCD1U25V2KX-GP
12
EC9758
SCD1U25V2KX-GP
DY
EC9758
SCD1U25V2KX-GP
DY
12
EC9738
SCD1U25V2KX-GP
EC9738
SCD1U25V2KX-GP
1
SPR4
SPRING-58-GP
SPR4
SPRING-58-GP
1 2
EC9768
SCD1U25V2KX-GP
DY
EC9768
SCD1U25V2KX-GP
DY
1
H5
HT85BE85R29-U-5-GP
H5
HT85BE85R29-U-5-GP
1
H7
HT85B95X975R29-S-GP
H7
HT85B95X975R29-S-GP
12
EC9710
SCD1U25V2KX-GP
EC9710
SCD1U25V2KX-GP
1
SPR2
SPRING-58-GP
SPR2
SPRING-58-GP
12
EC9777
SCD1U25V2KX-GP
DY
EC9777
SCD1U25V2KX-GP
DY
12
EC9759
SCD1U25V2KX-GP
DY
EC9759
SCD1U25V2KX-GP
DY
1
H3
HT85BE85R29-U-5-GP
H3
HT85BE85R29-U-5-GP
12
EC9728
SCD1U25V2KX-GP
DY
EC9728
SCD1U25V2KX-GP
DY
1 2
EC9750 SCD1U25V2KX-GP
DY
EC9750 SCD1U25V2KX-GP
DY
12
EC9720
SCD1U25V2KX-GP
DY
EC9720
SCD1U25V2KX-GP
DY
1
H9
HOLE256R142-GP
H9
HOLE256R142-GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
THERMAL/AUDIO BLOCK DIAGRAM
A3
98 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
THERMAL/AUDIO BLOCK DIAGRAM
A3
98 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
THERMAL/AUDIO BLOCK DIAGRAM
A3
98 109Friday, April 22, 2011
<Core Design>
Thermal Block Diagram Audio Block Diagram
THERM_SYS_SHDN#
2N7002
OTZ
PURE_HW_SHUTDOWN#
IMVP_PWRGD
S PGOD EN
3V/5V
VR
VIN
PAGE28
FAN CONTROL
T8
VOUT
5V
GPIO94
VSET
TACH
VIN
FAN
P2793
FAN_TACH1
GPIO56
D
P2800_DXN
P2800_DXP
Put under CPU(T8 HW shutdown)
FAN1_DAC
G
MMBT3904-3-GP
TDL
TDR
Place near CPU
PWM CORE
GPIO92
GPIO5
KBC
NPCE795P
PAGE27
PAGE28
GPIO4
CPU_THRM
SYS_THRM
MMBT3904-3-GP
DXN
DXP
P2800
UMA
Thermal
SC2200P50V2KX-2GP
Analog
MIC
DMIC_CLK/GPIO1
DMIC0/GPIO2
Codec
92HD87B1 HP
OUT
MIC
IN
SPEAKER
HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT_A_OR_F
HP1_PORT_B_L
HP1_PORT_B_R
SPKR_PORT_D_L-
SPKR_PORT_D_R+
PORTC_L
PORTC_R
VREFOUT_C
OTZ PH
THRMDC
THRMDA
VGA
MMBT3904-3-GP
TDR
VGA_THRM
PAGE28
Place near GPU(DISCRETE only).
VGA
Thermal
P2800
DXP
DXN
P2800_VGA_DXP
P2800_VGA_DXN
SC2200P50V2KX-2GPSC2200P50V2KX-2GP
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
POWER SEQUENCE
A3
99 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
POWER SEQUENCE
A3
99 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
POWER SEQUENCE
A3
99 109Friday, April 22, 2011
<Core Design>
3D3V_AUX_S5
DCBATOUT
RTC_AUX_S5
S0_ROM_STRAPS
KBC_ROM_STRAPS
S5_ENABLE
5V_S5
3D3V_S5
S5_ROM_STRAPS
1D1V_S5
RSMRST#(KBC_RSMRST#)
PWR_BTN#(PM_PWRBTN#)
PM_SLP_S3#/PM_SLP_S5#
1D5V_S3
0D75V_S0
POWER SEQUENCE
5V_S0
1D8V_S0
1D5V_S0
FCH_PWRGD
T1
T2
T13
1V_S0
3D3V_S0
1D1V_S0
VCORE_EN
APU_VDD
APU_VDDNB
H_CPUPWRGD
T7
A_RST#
APU_RST#
T9A T8C
Min Max Description
T1
T2
T7
T8C
T9A
T13
- -
10 ms -
+3.3V_S5 to +1.1V_S5
+3.3V_S5 to resume reset (RSMRST#).
FCH PWRGOOD assertion to LDT_PG assertion delay.
PCIRST# to LDT_RST#.
FCH PWR_GOOD to A_RST#.
PwrButton to SLP_S3# / SLP_S5# de-assertion
98 ms 150 ms
1.0 ms 2.3 ms
101 ms 113 ms
8 ns -
www.bblianmeng.com
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
APU_VDDNB 7,42,43
VDDIO_AZ 20,21
RTC_AUX_S5 17,27,60
DCBATOUT 40,41,42,43,44,46,49,92,97
DDR_VREF_S3 5,14,15,44
BT+ 39,40
AD+ 38,40
1D8V_S0 6,7,17,20,42,47,71,93
3D3V_S5 6,18,19,20,21,31,36,38,41,42,44,46,47,60,70,82,86,93,97
3D3V_AUX_KBC 27,28,39,60
5V_S5 36,38,41,42,44,46,49,61,65,68,69,92,93,97
3D3V_S0 6,7,14,15,17,18,20,21,27,28,29,31,32,36,42,49,56,60,65,71,93,97
1V_S0 4,7,46
1D1V_S0 20,36,97
1D5V_S3 5,7,14,15,36,44,93,97
3D3V_CARD_S0 32,74
5V_S0 6,28,29,36,50,51,56,68,69,86,97
1D5V_S0 36,65
1D1V_SATA_S0 19,20
3D3V_AUX_S5 27,28,36,40,41,60,93
1D1V_S5 20,36,46
1D1V_PCIE_S0 17,20
15V_S5 36,41,49,93
0D75V_S0 14,15,44
APU_VDD 7,42
0D75V_S0
15V_S5
1D1V_PCIE_S0
1D1V_S0
1D1V_S5
1D1V_SATA_S0
1D5V_S0
1D5V_S3
1D8V_S0
1V_S0
3D3V_AUX_KBC
3D3V_AUX_S5
3D3V_CARD_S0
3D3V_S0
3D3V_S5
5V_S0
5V_S5
AD+
APU_VDDNB
BT+
DCBATOUT
DDR_VREF_S3
RTC_AUX_S5
VDDIO_AZ
APU_VDD
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Power Block Diagram
A3
100 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Power Block Diagram
A3
100 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Power Block Diagram
A3
100 109Friday, April 22, 2011
<Core Design>
RT8015B
48
PA102FMG
3D3V_LAN_S5
BT+
AD+
Adapter
Battery
TPS51125A
Regulator LDO Switch
5V_S5
3D3V_PWR_2
AO4468
5V_S0USB20_VCCA
1D1V_S5
46
TPS51218
3D3V_S0
ISL6265C
APU_VDD
AO6402A
LCDVDD
Charger
BQ24707
DCBATOUT
36
0D75V_S0
A04468
36
AO4468
DDR_VREF_S3
15V_S5
1D5V_S0
1D5V_S3
Power Shape
UP7534BRA8
AO4407A
RTL8105E-VB
1D05V_LOM
36
49
1D8V_S0
TPS51216
44
1V_S0
3D3V_AUX_S5
APU_VDD_NB
42,43
5V_AUX_S5
40
40
5V_PWR
41
3D3V_S5
36
AO4468
1D1V_S0
61
46
TPS51218
3D3V_PWR
31
31
USB20_VCCA
UP7534BRA8
61
Power Delivery Block Diagram
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
SMBUS BLOCK DIAGRAM
A2
101 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
SMBUS BLOCK DIAGRAM
A2
101 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
SMBUS BLOCK DIAGRAM
A2
101 109Friday, April 22, 2011
<Core Design>
202
200
202
200
B3
A3
10K
SCLK1
SDATA1
32
30
WLAN
PCH_SMBCLK
PCH_SMBDATASMB_DATA
SMB_CLK
DY
10K
SCLK2
SDATA2
D25
F23
SCLK3
SDATA3
E26
B26
DY
P3
P4
APU_SIC
APU_SID
SMB Addr=[XX]
13
11
SMB Addr=[XX]
(LVDS Type)
LCD Panel
LVDS_DDC_CLK
LVDS_DDC_DATA
15
16
SMB Addr=[XX]
HDMI
PCH_HDMI_CLK_R
PCH_HDMI_DATA_R
B2
C2
DDC_CLK_HDMI
DDC_DATA_HDMI
APU
APU_SIC
APU_SID
0 OHM
0 OHM
2.2K
3D3V_S5
2.2K 5V_HDMI_S0
DY DY
BAT_SCL
BAT_SDA
PWR_CHG_BAT_SCL
PWR_CHG_BAT_SDA
short pad
SMB Addr=[XX]
SMB Addr=[XX]
100 ohm
100 ohm
3
4
Battery
BQ24707RGRRG4
Charger
9
8
connector
PBAT_SMBCLK1
PBAT_SMBDAT1
4.7K
3D3V_AUX_KBC
SML1_CLK
SML1_DATA
APU_SIC
APU_SID
DY
68
67
12
15
SMB Addr=[XX]
CRT
DDCCLK
DDCDATA
D4
F2 CRT_DDCCLK_CON
CRT_DDCDATA_CON
DY DY
4.7K 5V_CRT_S0
50
49
51
39
40
65
14
15
F5
F4
EC
AE22
AD22
3D3V_S5
2.2K
3D3V_S0
FCH
NPCE795PA0DX
SMB Addr=[XX]
SMB Addr=[XX]
DIMMA(DM1)
DIMMB(DM2)
70
69
0 OHM
1K
3D3V_S0
0 OHM
33 OHM
2.2K 3D3V_S0
0 OHM
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Change notes
A3
102 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Change notes
A3
102 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD
A00
Change notes
A3
102 109Friday, April 22, 2011
<Core Design>
Change notes -
EE9/23
Page OWNERDATE VERSON Modify ListDATE
Delete F5001, Share Fuse with HDMI
DUMMY Debug Port DB1,RN7102, R7107 EE
Change R2724 value to 20K, X01 Version EE
Change BATT1,ODD1,HDD1 Connector
ME
Add C2722 0.1uF between Q2703 G&S pin for fixed leakage voltage to 3D3V_AUX_KBC under DC mode. EE
Add Q2706 2N7002 to avoid leakage loop from 3D3V_S5 to 3D3V_AUX_KBC issue when 10mW latched fail
timing. Un-stuff C2713 to follow the standard schematics.
50
71
27
39,56
27
27 EE
28 Change U2801, U2803 to 74.02800.A71 EE
61 EE
Change U6102 to 74.07534.079
Change L5001,L5002,L5003 bead to 0402 size:68.00217.991
50 EE
38,59,69,
82 Change DCIN1,RJ45,TPAD1,IOBD1 Connector ME
82 Change IOBD1 Pin define EE
6 Dummy APU_SIC, APU_SID level shifter, pop R644,R645 EE
6Add level shifter for H_Thermtrip# EE
36 DUMMY Q3601,R3622 for reserved
Change R2816,R2822 to 107KR,R2817 ,R2821to 226KR for new version P2800 chip
EE
EE
28
Delete R3901 for double pull high
39 EE
Delete R4902 for double resister EE
49
27 Change PURE_HW_SHUTDOWN#(R2705) power rail to 3D3V_AUX_KBC EE
9/29
10/13
X01
X01
X01
10/20 92 Change PR9213 to 75K, PR9211 to 150K for VGA_CORE (Robson-LP)Output Power
27,36 Add GPIO97 for IMVP_PWRGD control ,Change D3605.2 to 1V_S0_PWRGD,Delete D3606,
Change D3603.1 to VRM_VDD_PWRGD for sequence EE
86 Modify 1D5V_VGA_PWRGD to 1D5V_VGA_PWOK EE
31 Dummy R3101,R3102,Q3101,R3108 for leakage EE
36,47 Change R3607 to 10K,C3605 to 15n,PR4711 to 0ohm, PC4710 DY, C3610 DY, R3633 to 33K, C3615 to 33n,R3604 to33K
for sequence EE
X01
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
103 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
103 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
103 109Friday, April 22, 2011
<Core Design>
X01
Change notes -
EE10/20
Page OWNERDATE VERSON Modify ListDATE
Change R2004 to 0603 size for current tolerance20
93 Change PR9311 to 10K for 1V_VGA Voltage
61,65 Add C6105,C6106,C6509,C6510 to 6.8p for solve SIV USB fail
27 Change RN2705 8P4R to 4P2R and R2715, RN2705 DY
40 Add PR4061 PR4062 100KR, empty other parts for fine tune sequence for leakage
10/27 85,17 Modify C8524,C8525=12p, C1715,C1717=18p for crystal frequence match
68 Add LED for WLAN
Power
EE
EE
EE
EE
EE
14 Change RN1401 to 22 ohm and pop C1423,C1424 for solved SMBus SIV Fail EE
11/10 38 Change DCIN CONN pin define EE
31 EE
Solved leakage issue follow DV15
68 EEModify Wireless LED schematic
85 EEChange L8502,L8503,L8507,L8505,L8513 to short pad for power
17,31 Modify C1720=15p, C3102=15p for crystal frequence match
28 Add G709 for thermal solution
EE
EE
68 EEDelete RN6802,RN6801
83~89 Change GPU from Robson LP to Seymour XT EE
11/17 46 DY 1V to merge 1D1V EE
27 Add two model ID for config EE
58 EE
Delete MIC2 and move mic1 to IO Board
92 Update Seymour and Robson power plan setting(PR9219,PR9210,PR9214,PR9211) EE
87 Pop R8421 for check list request EE
68 Modify power LED schematic and charger LEDs EE
Power
Merge with power schematic
27 Add LID_CLOSE# pull high EE
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
104 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
104 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
104 109Friday, April 22, 2011
<Core Design>
X01
Change notes -
EE
11/24
Page OWNERDATE VERSON Modify ListDATE
50,51 Modift CRT,HDMI share fuse schematic
31 Change L3101 to slime type and add R3101 GIGA mark for 10/100 internal PU EE
27 Change R2726, R2710 to F tolerance for accurate level to KBC EE
27,65,68 Change WLAN LED design to meet on/off behavior SPEC
Change RTC_POWER from RTC_AUX_S5 to 3D3V_AUX_S5 for saving RCT power and no influence on PSL27
EE
EE
6 Pull up LTDP0_HPD to 5V from AMD SCL 1.04 EE
6 Change RN634 to 2K2R follow AMD SCL 1.03 EE
6Add level shifter for LVDS SMBus follow AMD SCL 1.04 EE
59 Rename part reference for Lan ESD EMI
31 Set R3101 BOM option for 8105E DY EE
31 Add RTC sense schematic EE
12/2 27 Reserved R2778 for EC power switch logic circuit. EE
27 EESet R2769 empty, Duplicated function in page 40.
Reserve R2861 for hysteresis EE28
Reserve C3633 for power up sequence tunning EE
EE
36
49 Modify TP4906,TP4907 to AFTP
17,31 Change 25MHZ, 32.768K to small size by source recommand Sourcer
2 Modify Block Diagram EE
36 Change U3606 P/N EE
59 Modify Transformer schenatic from GIGA to 10/100 for latest config
6Remove level shifter for LVDS SMBus(AMD confirm)
EE
EE
40
EMI
Reserve snuber 2.2ohm+560p for EMI solution
50 Change L5001,L5002 and L5003 from 220hm to 30ohm for EMI Solution
EMI
50 Change 2N7002E to 2N7002K for EOL Sourcer
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
105 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
105 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
105 109Friday, April 22, 2011
<Core Design>
27
Change notes -
EE
Page OWNERDATE VERSON Modify ListDATE
Modify R2776 to 64.9K
59 Modify R5903,R5904 to 0603 size EE
27 Change R2739 to 1% tolerance EE
6 Change RN634 form 2.2KR to 1KR by AMD suggestion EE
65,68 Change WLAN LED indicator for reserve EC and module circuit EE
60 Change Q6001.G from +RTC_VCC to RTC_PWR EE
15 Reserve R1531 and R1532 69.8R for memory glitch issue EE
36,46 Stuff 0R and change to open-gap for merge power rail EE
47 Change PQ4701 to ESD 2KV for Vendor EOL EE
38,39 PD3801 change to P6SMBJ58A,PD3902 change to SMF18AT1G Power
40 Add PQ4007 PR4012 and PR4037 to improve AC_IN# delay issue Power
All Change reference from PTCxx to PTxx for meet SMT Process Power
41,42,44,
46,92 Change PC4111,PC4116,PC4117,PC4204,PC4223,PC4203,PC4301,PC4302,PC4304,PC4403,PC4404,PC4405,PC4602,PC4603,
PC4604,PC4613,PC4614,PC4618,PC9202,PC9203,PC9204 to 10u 0805 size Power
92 PR9205 change to 13 Kohm for OCP setting
6 Remove SIC,SID level shifter
Power
EE
12/7 36
38
86
28
36
49
17
Reserve 1V_S0_PWRGD link for 1V_S0 power rail
Change PD3801: 83.P6SMB.DAG(YS) change to 83.P6SBM.DAG(CHENMKO).
Change U8601.U8603,U8604,U8606 pin G to 5v_S0
Remove R2822,R2821,C2819 and NC U2803 OTZ pin
Dummy C3609
Change R4903,R4904 to 0603 size
Add RTC detect pin on REQ1#_GPIO40
61,65
61
Move C6105,C6106,C6509,C6510 to Connector side
Pop TC6102 and DY on IO Board side
EE
Power
EE
EE
EE
EE
EE
EE
EE
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
106 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
106 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
106 109Friday, April 22, 2011
<Core Design>
74
71
Change notes -
EE
Page OWNERDATE VERSON Modify ListDATE
Pop DB1,RN7102,R7107 for debug
DY EC7401,EC7403 for reserve
36,46 Add PC4621 and PT4603 1V_PWR and change 1V_S0 to 1V_PWR
14,59 Rename C59011 to C5901 and Change TC4101 to 79.22719.20L
Dummy 1V power generator foe back up solution46
EE
EE
EE
EE
40 Add PR4063,PC4025 for EMI Snaber solution EMC
12/7_1 17 Reserve damping resistor R1766 for crystal drive level adjustment EE
65 Reserve BT_ACT for future module extension EE
69 Change KB connector EE
12/8 69 Add Caps led schematic and change AD_IA_HW2 to GPIO50, PCIE_RST# to GPIO36, CAP_LED change to GPIO30 EE
12/10 27 Add R2780 and DY R2732,Q2702 for EC "PROCHOT_EC" pin from PP to OD type EE
12/13 68,82 Change IOBD2 and PWBTN1 pin define EE
38,40,41 PC3806 PC4006 PC4008 PC4110 and PC4114 change to 10uF 25V 0805 size (78.10622.51L) Power
28 Change U2801,U2803 to B version(74.02800.B71) EE
97 EMIAdd EMI Solution
12/14 40 Change PC4004 and PC4024 from 1uF to 0.1uF (78.10424.2BL) Power
28 DY R2816,R2817,C2831 for set ADJ floating EE
61 DY TC6102 for reserve on IO board EE
12/15 82 Change IOBD2 pin define and connector EE, ME
20 Chnage R2004 to 0402 size EE
17 Change R1766 location and change to 1KR for Put Rd at chip output side and suppress amplitude. EE
12/17 6,65 Swap RN605,TR6501 for Layout EE
97 Add EMI Solution EMI
36 Change C3615 tolerance from 16V to 25V for component derating high voltage tolerance EE
www.bblianmeng.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
107 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
107 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
107 109Friday, April 22, 2011
<Core Design>
36
Change notes -
EE
Page OWNERDATE VERSON Modify ListDATE
Delete R2779 for LID_Close# double pull high
59 Change C5904 to 0.01u from vendor recommand EE
12/21
50 Modify CRT Hsync & Vsync level shift follow DV15 EE
46 Modify 1V_S0 Schematic EE
42 DY PR4214,PR4402 for pull up on R3624 EE12/21_1
61 DY C6104,C6108 EE12/22
56 Change HDD1 CONN to 62.10065.H71 ME
DY TC6101, Stuff TC610361 EE
12/22_1
20 Change to 10u 0805 size EE12/23
Implement OPI Solution EE12/23_1
12/27 Crooect VGA setting, PR9210:150K, PR9211:75K EE
03/03X02 Change PR4104 to 0 ohm,PR4106 to 200K EE
DY R8309,R8310 to solve device error EE
41
83
31 Move C3125 to Q3101.S ,R3134 to 100k to solve unnecessary pulse EE
Change C3102,C3103 to 18P from vendor recommand EE
17 Change RN1701 to 22 ohm for solve SIV solution EE
50 Change RN5001 to 150 ohm for solve SIV solution EE
EE
Stuff C5002,C5003,C5004
97 Add SPR3,SPR4 ME
59 Add RN5901 for nonuse Giga lan EE
ME50,59,97 Change CRT ,TPAD1,RJ45 CONN, H10 Hole and add SPR3,SPR4
Change VGA P/N to 71.ROBSO.M0183~87 EE
85 DY R8525,R8526 and Q8501 for nonuse EE
03/07
28 DY R2813,R2805,R2832,C2808,U2805,R2812,R2811, Stuff R2823 for P2800 EE
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
108 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
108 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
108 109Friday, April 22, 2011
<Core Design>
28,85
Change notes -
EE
Page OWNERVERSON Modify ListDATE
DY U2803,R2815,R2812,R2814,C2813,C2814. stuff RN8501,Q8503 for GPU temperature by SMBus
03/09 27 DY D2701,D2704 and D2705, Add R2781,R2782 and R2783 for connect directly EE
97 Change SPR3 to 34.39S07.003 EE
38,39 Rename AFPP3811,3812,3813,3814,3901,3902,3903,3904 to AFTP EE
03/10 38,60 Delete AFTP6001,AFTP6002,AFTP3811 EE
17 EE
Change C1719,C1720 to 18p for vendor recommand
EE
Delete PR4063 and PC4025 for EMI Solution40
71 Add R7102 to reserved EE
27 Change R2724 to 33k for SC PCB version EE
31 Add RN3101,Q3104 and R3108 to solve Lan leakage issue EE
03/10_1
03/11 41,42,47 Change power gap P/N
Change 0 ohm to short pad
EE
EE
61,65,82 Delete TR6101,TR6501,TR8202,TR8201 CMC EE
03/16 Power41
44
92
47
46
Change PR4103 from 150Kohm to 143Kohm for 5V OCP setting
Change PR4408 from 75Kohm to 66.5Kohm for 1.5V OCP setting
Change PR9205 from 13Kohm to 11 Kohm for VGA OCP setting
Change PC4709 from 1.5KpF to 100pF for comp
Dummy PC4602 and POP PC4604.
03/17 DY C2818,D2802,C2816 and Stuff C281528 EE
Power
Power
Power
Power
03/22 40 DY PQ4007,PR4037,PR4012 for new version IC EE
04/07 49 EE
Add 0 ohm at Q4901.4 for reserved to avoid module leakage
71 EE
Change DB1 foorprint to PAD-10P-177042 for factory request
EE
Change R1818 to 0 ohm for reserved non-zero power ODD18
1804/11 EE
Change R2724 to 47K for X-build version
A00
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
109 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
109 109Friday, April 22, 2011
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Enrico 14 AMD A00
Change notes
A3
109 109Friday, April 22, 2011
<Core Design>
Change notes -
Page OWNERVERSON Modify ListDATE
DY PR4029,PR4028,PQ4004 and PQ4006 for nouse because just use 65W adapter40 EE
40 Change C8617 to 10u for CRB to avoid voltage drop EE
DY C2005,C2007, and add R2030 for nonuse20 EE
ME
97 Change H12,H13 to 34.4HL17.001 for ME asked
4/12
ME
Delete H13 for ME asked97
EMC
Change EC1801 to 22p for EMI solution18
4/12_1
4/13 EE
Change R6806,R6812,R6801,R6833 to 330 ohm for brightness68
4/15 EE
DY R5612, Pop Q5602 for modify Zero power ODD56
EE
Chnage RN5004 to ZZ.0R08P.ZHH to modify layout symbol is short pad51
4/17 EE
Change R2817 to 0 ohm for setting T8 temperature from 85 to 90 degree to pass reliability test28
4/21 EE
DY U5601,TC5604,R5606,Q5601,R1818,R5612, Stuff R5604,R5603 for remove Zero power ODD56
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