Description GM8136 Hardware Design User Guide V0.1

• GM8136/GM8136S/GM8135S
• Hardware Design
• Revision History
• Table of Contents
• List of Tables
• List of Figures
• Chapter 1 Schematic Design Recommendations
  • 1.1 SoC External Circuit Requirements
    • 1.1.1 Clock Circuit
      • 1.1.1.1 Main Clock Circuit for GM8136/GM8136S/GM8135S
      • 1.1.1.2 RTC Clock Circuit for GM8136/GM8136S/GM8135S
    • 1.1.2 Reset Circuit
    • 1.1.3 JTAG Debug Circuit
    • 1.1.4 Test Mode Circuit
    • 1.1.5 Jumper Setting Circuit
    • 1.1.6 Power Supply Circuit for GM8136/GM8136S/GM8135S
      • 1.1.6.1 Core Power for GM8136/GM8136S/GM8135S
      • 1.1.6.2 DDR I/O Power for GM8136/GM8136S/GM8135S
      • 1.1.6.3 VCC3IO I/O Power for GM8136/GM8136S/GM8135S
      • 1.1.6.4 PLL Power for GM8136/GM8136/GM8135S
    • 1.1.7 Power-On Sequence for GM8136/GM8136S/GM8135S
    • 1.1.8 Ground Plane
  • 1.2 Design for Typical Interface Circuits of GM8136
    • 1.2.1 DDR3 Interface
      • 1.2.1.1 Introduction
      • 1.2.1.2 External DDR3-SDRAM Vref
      • 1.2.1.3 DDR Topology for GM8136
      • 1.2.1.4 Bidirectional Signals DQ, DQS, and DQM
      • 1.2.1.5 Differential Clock
      • 1.2.1.6 Address Signal and Control Signal
    • 1.2.2 MAC Port
    • 1.2.3 Flash Interface
      • 1.2.3.1 SPI Flash Interface
    • 1.2.4 I2S Interface
    • 1.2.5 I2C Interface
    • 1.2.6 USB Interface
      • 1.2.6.1 USB Power
      • 1.2.6.2 USB Firmware Upgrade
    • 1.2.7 CVBS DAC Interface Design
      • 1.2.7.1 CVBS DAC COMP
    • 1.2.8 Audio ADDA Interface Design
      • 1.2.8.1 Audio ADDA Power
      • 1.2.8.2 Audio ADDA VCM
    • 1.2.9 Video Input Interface
• Chapter 2 Recommendation
  • 2.1 Package of GM8136/GM8136S/GM8135S
  • 2.2 DDR3-SDRAM Interface Layout
    • 2.2.1.1 Routing
    • 2.2.1.2 Trace Impedance
  • 2.3 Ethernet Interface Layout
    • 2.3.1.1 Routing
    • 2.3.1.2 Trace Impedance
  • 2.4 USB Interface Layout
    • 2.4.1.1 Routing
    • 2.4.1.2 Trace Impedance
  • 2.5 1-CH DAC Interface Layout
  • 2.6 MIC in Interface Layout
  • 2.7 Speaker Interface Layout
  • 2.8 MIPI/sub-LVDS Interface Layout
    • 2.8.1.1 Routing
    • 2.8.1.2 Trace Impedance
  • 2.9 Video Input Port (Capture)
    • 2.9.1.1 Routing
    • 2.9.1.2 Trace Impedance
• Chapter 3 PCB Unused Pin Setting
  • 3.1 GM8136/GM8136S/GM8135S Unused Pin Setting