HC08LN56GRS, MC68HC08LN56, MC68HC708LN56, General Release Specification Data Sheet HC08LN56GRS

User Manual: HC08LN56GRS

Open the PDF directly: View PDF .
Page Count: 246 [warning: Documents this large are best viewed by clicking the View PDF Link!]

Scroll down to view the document on your mobile browser.

Revision History
List of Chapters
Table of Contents
Chapter 1 General Description
- 1.1 Introduction
- 1.2 Features
- 1.3 Block Diagram
- 1.4 Pin Assignment
- 1.5 LCD Driver Power Supply Pins (CPFLT, VLL7:VLL1, VLL, VLLH, and VCP4:VCP1)
- 1.6 Clock Distribution
Chapter 2 Memory
- 2.1 Introduction
- 2.2 I/O Section
Chapter 3 Central Processing Unit (CPU)
- 3.1 Introduction
- 3.2 Features
- 3.3 CPU Registers
- 3.4 Arithmetic/Logic Unit
- 3.5 CPU During Break Interrupts
Chapter 4 Clock Generator Module (CGMB)
- 4.1 Introduction
- 4.2 Features
- 4.3 Functional Description
- 4.4 I/O Signals
- 4.5 CGMB Registers
- 4.6 Interrupts
- 4.7 Special Modes
  - 4.7.1 Wait Mode
  - 4.7.2 CGMB During Break Interrupts
- 4.8 Acquisition/Lock Time Specifications
- 4.9 Numerical Electrical Specifications
- 4.10 Acquisition/Lock Time Specifications
Chapter 5 System Integration Module (SIM)
- 5.1 Introduction
- 5.2 SIM Bus Clock Control and Generation
- 5.3 Reset and System Initialization
  - 5.3.1 External Pin Reset
  - 5.3.2 Active Resets from Internal Sources
- 5.4 SIM Counter
- 5.5 Exception Control
- 5.6 Low-Power Modes
  - 5.6.1 Wait Mode
  - 5.6.2 Stop Mode
- 5.7 SIM Registers
Chapter 6 Random-Access Memory (RAM)
- 6.1 Introduction
- 6.2 Functional Description
Chapter 7 Low-Voltage Inhibit (LVI)
- 7.1 Introduction
- 7.2 Features
- 7.3 Functional Description
  - 7.3.1 Polled LVI Operation
  - 7.3.2 Forced Reset Operation
- 7.4 LVI Status Register (LVISR)
- 7.5 LVI Interrupts
- 7.6 Low-Power Modes
  - 7.6.1 Wait Mode
  - 7.6.2 Stop Mode
Chapter 8 External Interrupt Module (IRQ)
- 8.1 Introduction
- 8.2 Features
- 8.3 Functional Description
  - 8.3.1 IRQ1/Vpp Pin
  - 8.3.2 IRQ2 Pin
- 8.4 IRQ Module During Break Interrupts
- 8.5 IRQ Status and Control Register
Chapter 9 Keyboard Module (KB)
- 9.1 Introduction
- 9.2 Features
- 9.3 Functional Description
- 9.4 Keyboard Initialization
- 9.5 I/O Registers
  - 9.5.1 Keyboard Status and Control Register (KBSCR)
  - 9.5.2 Keyboard Interrupt Enable Register (KBIER)
- 9.6 Keyboard Module During Break Interrupts
Chapter 10 Timer Interface Module (TIM)
- 10.1 Introduction
- 10.2 Features
- 10.3 Functional Description
- 10.4 Interrupts
- 10.5 Low-Power Modes
  - 10.5.1 Wait Mode
  - 10.5.2 Stop Mode
- 10.6 TIM During Break Interrupts
- 10.7 I/O Signals
  - 10.7.1 TIM Clock Pin (PTE4/TCLK)
  - 10.7.2 TIM Channel I/O Pins (PTE0/TCH0:PTE3/TCH3)
- 10.8 I/O Registers
Chapter 11 Serial Peripheral Interface Module (SPI)
- 11.1 Introduction
- 11.2 Features
- 11.3 Pin Name Conventions and I/O Register Addresses
- 11.4 Functional Description
  - 11.4.1 Master Mode
  - 11.4.2 Slave Mode
- 11.5 Transmission Formats
- 11.6 Queuing Transmission Data
- 11.7 Error Conditions
  - 11.7.1 Overflow Error
  - 11.7.2 Mode Fault Error
- 11.8 Interrupts
- 11.9 Resetting the SPI
- 11.10 Low-Power Modes
  - 11.10.1 Wait Mode
  - 11.10.2 Stop Mode
- 11.11 SPI During Break Interrupts
- 11.12 I/O Signals
- 11.13 I/O Registers
Chapter 12 Serial Communications Interface Module (SCI)
- 12.1 Introduction
- 12.2 Features
- 12.3 Pin Name Conventions
- 12.4 Functional Description
- 12.5 Low-Power Modes
  - 12.5.1 Wait Mode
  - 12.5.2 Stop Mode
- 12.6 SCI During Break Module Interrupts
- 12.7 I/O Signals
  - 12.7.1 PTE5/TxD (Transmit Data)
  - 12.7.2 PTE6/RxD (Receive Data)
- 12.8 I/O Registers
Chapter 13 I/O Ports
- 13.1 Introduction
- 13.2 Port A
  - 13.2.1 Port A Data Register
  - 13.2.2 Data Direction Register A
- 13.3 Port B
  - 13.3.1 Port B Data Register
  - 13.3.2 Data Direction Register B
- 13.4 Port C
  - 13.4.1 Port C Data Register
  - 13.4.2 Data Direction Register C
- 13.5 Port D
  - 13.5.1 Port D Data Register
  - 13.5.2 Data Direction Register D
- 13.6 Port E
  - 13.6.1 Port E Data Register
  - 13.6.2 Data Direction Register E
- 13.7 Port F
  - 13.7.1 Port F Data Register
  - 13.7.2 Data Direction Register F
Chapter 14 Analog-to-Digital Converter (ADC)
- 14.1 Introduction
- 14.2 Features
- 14.3 Functional Description
- 14.4 Interrupts
- 14.5 Low-Power Modes
  - 14.5.1 Wait mode
  - 14.5.2 Stop Mode
- 14.6 I/O Signals
- 14.7 I/O Registers
Chapter 15 Liquid Crystal Display Driver (LCD)
- 15.1 Introduction
- 15.2 Features
- 15.3 Functional Description
- 15.4 LCD RAM
  - 15.4.1 LCD RAM Organization
  - 15.4.2 LCD RAM Memory Map
- 15.5 LCD Operation
- 15.6 LCD Waveforms
- 15.7 LCD Voltage Generation
  - 15.7.1 LCD Contrast Control
- 15.8 LCD Register Programming
- 15.9 Programming the LCD
- 15.10 LCD Registers
- 15.11 Interrupts
- 15.12 Low-Power Modes
  - 15.12.1 Wait Mode
  - 15.12.2 Stop Mode
Chapter 16 Computer Operating Properly Module (COP)
- 16.1 Introduction
- 16.2 Functional Description
- 16.3 I/O Signals
- 16.4 COP Control Register (COPCTL)
- 16.5 Interrupts
- 16.6 Monitor Mode
- 16.7 Low-Power Modes
  - 16.7.1 Wait Mode
  - 16.7.2 Stop Mode
- 16.8 COP Module During Break Interrupts
Chapter 17 Break Module (BREAK)
- 17.1 Introduction
- 17.2 Features
- 17.3 Functional Description
- 17.4 Break Module Registers
  - 17.4.1 Break Status and Control Register
  - 17.4.2 Break Address Registers
- 17.5 Low-Power Modes
  - 17.5.1 Wait Mode
  - 17.5.2 Stop Mode
Chapter 18 EPROM/OTPROM
- 18.1 Introduction
- 18.2 Functional Description
- 18.3 EPROM/OTPROM Control Registers (EPMCR1, EPMCR2)
- 18.4 EPROM/OTPROM Programming
Chapter 19 Configuration Register (CONFIG)
- 19.1 Introduction
- 19.2 Functional Description
Chapter 20 Time Base Module (TBM)
- 20.1 Introduction
- 20.2 Features
- 20.3 Functional Description
- 20.4 Time Base Register Description
- 20.5 Interrupts
- 20.6 Low-Power Modes
  - 20.6.1 Wait Mode
  - 20.6.2 Stop Mode
Chapter 21 Monitor ROM (MON)
- 21.1 Introduction
- 21.2 Features
- 21.3 Functional Description
Chapter 22 Preliminary Electrical Specifications
- 22.1 Introduction
- 22.2 Absolute Maximum Ratings
- 22.3 Functional Operating Range
- 22.4 Thermal Characteristics
- 22.5 DC Electrical Characteristics
- 22.6 Control Timing
- 22.7 Serial Peripheral Interface Characteristics
- 22.8 TImer Interface Module Characteristics
- 22.9 Clock Generation Module Electrical Characteristics
- 22.10 Analog-to-Digital Converter (ADC) Characteristics
- 22.11 Memory Characteristics
- 22.12 Liquid Crystal Display Driver Characteristics

Navigation menu