La 4102p_dis_1008 HP DV4 CQ40 CQ45 INTEL DISCRETE COMPAL 4102P REV 0.1

1HP DV4 CQ40 CQ45 - INTEL DISCRETE - COMPAL LA-4102P - REV 0.1

HP DV4 CQ40 CQ45 - INTEL DISCRETE - COMPAL LA-4102P - REV 0.1

User Manual:

Open the PDF directly: View PDF .
Page Count: 51

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer discrete

0.1

Cover Sheet

Custom

1 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer discrete

0.1

Cover Sheet

Custom

1 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer discrete

0.1

Cover Sheet

Custom

1 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Mobile Penryn uFCPGA with Intel

Cantiga_PM+ICH9-M core logic

2007-09-16

Compal confidential

Schematics Document

hexainf@hotmail.com

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Block Diagram

Custom

2 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Block Diagram

Custom

2 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Block Diagram

Custom

2 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Compal confidential

Thermal Sensor

EMC1402

Fan conn

Mobile Penryn

uFCPGA-478 CPU

FSB

667/800/1066 MHz 1.05V

H_A#(3..35)

H_D#(0..63)

FCBGA 1329

Intel Cantiga MCH

DMI X4

BANK 0, 1, 2, 3

DDR2 SO-DIMM X2

DDR2 667MHz 1.8V

Dual Channel

Mini-Card*2

Power On/Off CKT.

LPC BUS

DC/DC Interface CKT.

RTC CKT.

mBGA-676

Intel ICH9-M

Touch Pad CONN. Int.KBD

ENE

Mavell

88E8072(Gbe)

RJ45/11 CONN

PCI-E BUS*5

LED

SATA HDD Connector

SATA Master-1

SATA Slave

C-Link

Codec_IDT9271B7

Audio CKT AMP & Audio Jack

TPA6017A2

USB conn x3

USB2.0 X12

Azalia

BT Conn

KB926

P6,7, 8

P9, 10, 11, 12, 13, 14

P15, 16

P25,26,27,28

P29

P30

P30

P26

P31

P33 P35

P36

P39

P38

P38

P41

P6

P6

Montevina Consumer Discrete

SPI

Clock Generator

SLG8SP553V

P17

CK505

72QFN

P29

e-SATA Connector

New Card

P31

WLAN & Robson

P36

USB Camera

MDC

FPR Conn

Touch Screen Conn

CIR Conn

Dock

Capsense switch Conn

SATA ODD Connector

P35

P19

P34

P29

P37

SPI ROM

25LF080A

Support V1.3

Discrete

P19

CRT

LVDS Panel

Interface

P18

Nvidia

NB9M-GE

P20,21,22

VRAM DDR2

page 23,24

HDMI

P42

128/512MB

64bits

Dock connecter

SATA Slave

Flash Memory Card

Controller

JMB385

5 in1 Slot

P32

P32

P39

With 3'th USB

TV out

CRT

P40

P39

P40

A

A

1 1

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Notes List

Custom

3 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Notes List

Custom

3 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Notes List

Custom

3 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

O MEANS ON

X MEANS

OFF

Voltage Rails

+0.9V

S3

+3VS

X

+3VALW

+5VS

S1

+2.5VS

+CPU_CORE

+VCCP

power

plane

O

S5 S4/ Battery only

+B

State

+1.5VS

+1.8V

S5 S4/AC & Battery

don't exist

S5 S4/AC

+5VALW

S0

SERIAL

EEPROM

SMB_EC_CK2

SOURCE

KB926

INVERTER BATT Thermal

Sensor SODIMM CLK CHIP

SMBUS Control Table

SMB_CK_CLK1

SMB_CK_DAT1 ICH9

MINI CARD

SMB_EC_DA2

SMB_EC_CK1

SMB_EC_DA1

DDC2_CLK

DDC2_DATA

NB9M

XV

1 0 1 0 0 1 0 0A4

I2C / SMBUS ADDRESSING

1 0 1 0 0 0 0 0

D2

A0

CLOCK GENERATOR (EXT.)

HEX

DDR SO-DIMM 1

ADDRESS

DDR SO-DIMM 0

1 1 0 1 0 0 1 0

DEVICE

+1.8VS

O

O

O

O

O

O

O

O

O

O

O

O

O

X

X

X

X

X

X

X

XX

V

V

VVV

VX

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

KB926

+NVVDD

+PCIE

Sensor board

Symbol Note :

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build

DEBUG@ : means just reserve for

debug.

USB-4 Camera

USB-5 WLAN

USB-6 Bluetooth

USB-8 MiniCard(WWAN/TV)

USB-1 Right side

USB-7 Finger Printer

USB-3 Dock

USB-9 Express card

USB-10 X

USB-2 Left side(with ESATA)

USB-0 Right side

USB-11 X

USB assignment:

PCIe-2 X

PCIe-1 TV tuner/WWAN/Robeson

PCIe assignment:

PCIe-3 WLAN

PCIe-4 New Card

PCIe-5 Card reader

PCIe-6 GLAN (Marvell)

NB9M

NB9M

Thermal

Sensor

X

V

X

V

X

X

SOURCE LVDS CRT

X

X

NB9M SMBUS Control Table

3VDDCDA

3VDDCCL

HDMIDAT_VGA

HDMICLK_VGA

NB9M

NB9M

HDMI

X X

X

X

V

V

V

hexainf@hotmail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Montevina Consumer UMA

0.1

Power delivery

C

4 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Montevina Consumer UMA

0.1

Power delivery

C

4 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Montevina Consumer UMA

0.1

Power delivery

C

4 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

VIN

AC

DC BATT

B+

INVPWR_B+

B++

B+++

1.05V_B+

+NVVDDP +NVVDD

LVDS CON

+3VALW

+5VALW

ICH9

+3VAUX_BT

SPI ROM

+3VALW_EC

+3VS

Finger printer

PC Camera

MDC 1.5

New card

ICH9

0.3A

278mA

300mA

60mA

20mA

10mA

+1.8V

0.27A

NB9M (VGA)

2.725A

LAN

+3VS_DVDD

ALC268

25mA

+5VS +VDDA

IDT 9271B7

35mA

50mA

1A

177mA

35mA

+LCDVDD

1.5A

+3VS_CK505

250mA

+5VAMP

10mA

ODD

1.8A

SATA

700mA

MCH

3.7A

DDR2 800Mhz 4G x2

8 A

+0.9V

50mA

+VCCP

ICH9

MCH

1.26A

CPU

2.3A

1.17A

LVDS CON

50mA

5.39A5.89A

3.7 X 3=11.1V

1.7A

2A

1.3A0.58A

12.11A1.9A

4.7A

7A

+V_BATTERY Dock con

1A

+1.5VS

ICH_VCC1_5

ICH9

657mA

ICH9

1.56A

2.2A0.3A

Muti Bay

1.8A

JMB385

550mA

CPU_B+ +VCC_CORE

10mA2A

CPU

34A/1.025V

NB9M (VGA)

360mA

NB9M (VGA)

390mA

+1.1V_PCIE +PCIE

0.19A

NB9M (VGA)

2A/1.1V

Mini card (WLAN)

1A

Mini card (TV tu/WWAN/Robeson)

1A

A

A

1 1

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer UMA

0.1

Notes List

Custom

5 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer UMA

0.1

Notes List

Custom

5 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer UMA

0.1

Notes List

Custom

5 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

hexainf@hotmail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_THERMDA

H_THERMDC

THERM#

SMB_EC_DA2

SMB_EC_CK2

H_PROCHOT# OCP#

H_PROCHOT#

H_THERMDC

H_THERMTRIP#

H_THERMDAH_THERMDA_R

H_THERMDC_R

H_HITM#

H_HIT#

H_RESET#

H_TRDY#

H_RS#1

H_RS#2

H_RS#0

H_LOCK#

XDP_HOOK1

XDP_HOOK1

XDP_BPM#3

XDP_DBRESET#_R

XDP_BPM#0

XDP_BPM#1

XDP_BPM#2

XDP_PRE

XDP_DBRESET#XDP_DBRESET#_R

XDP_TDI

XDP_TMS

XDP_TCK

XDP_TRST#

XDP_TCK

XDP_TDO

H_RESET#

XDP_TRST#

XDP_TMS

XDP_TDO

XDP_TDI

H_PWRGOOD_R

H_RESET#_R

XDP_BPM#5

CLK_CPU_XDP#

CLK_CPU_XDP

XDP_BPM#4

XDP_BPM#5

H_IERR#

H_A#3

H_A#10

H_A#13

H_A#11

H_ADSTB#0

H_A#7

H_A#9

H_A#16

H_A#6

H_A#8

H_A#12

H_A#15

H_A#5

H_A#14

H_A#4

H_REQ#2

H_REQ#4

H_REQ#1

H_REQ#3

H_A#32

H_A#34

H_A#35

H_A#33

H_A#18

H_A#30

H_A#27

H_A#26

H_A#21

H_A#17

H_A#20

H_A#25

H_REQ#0

H_ADSTB#1

H_A#28

H_A#29

H_A#19

H_A#23

H_A#24

H_A#22

H_A#31

H_SMI#

H_STPCLK#

H_INTR

H_IGNNE#

H_A20M#

H_FERR#

H_NMI CLK_CPU_BCLK#

CLK_CPU_BCLK

XDP_BPM#0

XDP_BPM#2

XDP_BPM#3

XDP_TRST#

XDP_BPM#1

XDP_TCK

XDP_TMS

XDP_TDO

XDP_TDI

XDP_DBRESET#

XDP_BPM#5

XDP_BPM#4

H_BNR#

H_ADS#

H_BPRI#

H_DEFER#

H_DBSY#

H_DRDY#

H_BR0#

H_INIT#

H_IERR#

+FAN

OCP# 27

H_THERMTRIP# 9,26

H_HIT# 9

H_HITM# 9

H_RESET# 9

H_RS#0 9

H_RS#1 9

H_RS#2 9

H_TRDY# 9

H_LOCK# 9

FAN_PWM38

H_PWRGOOD7,26 CLK_CPU_XDP 17

CLK_CPU_XDP# 17

H_A#[3..16]9

H_ADSTB#09

H_REQ#09 H_REQ#19 H_REQ#29

H_A#[17..35]9

H_ADSTB#19

H_REQ#49 H_REQ#39

H_A20M#26 H_FERR#26 H_IGNNE#26

H_STPCLK#26 H_INTR26 H_NMI26 H_SMI#26 CLK_CPU_BCLK 17

CLK_CPU_BCLK# 17

XDP_DBRESET# 27

H_ADS# 9

H_BNR# 9

H_BPRI# 9

H_DEFER# 9

H_DRDY# 9

H_DBSY# 9

H_BR0# 9

H_INIT# 26

SMB_EC_CK2 21,38

SMB_EC_DA2 21,38

+3VS

+3VS

+VCCP

+VCCP

+5VS

+3VS

+VCCP+VCCP

+VCCP

+VCCP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Penryn(1/3)-AGTL+/ITP-XDP

Custom

6 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Penryn(1/3)-AGTL+/ITP-XDP

Custom

6 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Penryn(1/3)-AGTL+/ITP-XDP

Custom

6 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Address:100_1100

H_THERMDA, H_THERMDC routing together,

Trace width / Spacing = 10 / 10 mil

For Merom, R1798 and R1799 are 0ohm

For Penryn, R1798 and R1799 are 100ohm.

PWM Fan Control circuit

Place R191 within 200ps (~1") to CPU

This shall place near CPU

ITP-XDP Connector

Change value in 5/02

Removed at 5/30.(Follow

Chimay)

Place TP with a

GND 0.1" away

C2

0.1U_0402_16V4Z

C2

0.1U_0402_16V4Z

1

2

R18

56_0402_5%

R18

56_0402_5%

1 2

R8 54.9_0402_1%R8 54.9_0402_1%

1 2

R11 200_0402_1%R11 200_0402_1%

12

T1T1

D1

RB751V_SOD323

D1

RB751V_SOD323

2 1

R12

0_0402_5%

R12

0_0402_5%

1 2

R16

10K_0402_5%

R16

10K_0402_5%

1 2

R4 54.9_0402_1%R4 54.9_0402_1%

1 2

U1

EMC1402-1-ACZL-TR_MSOP8

U1

EMC1402-1-ACZL-TR_MSOP8

DN

3

DP

2

VDD

1

ALERT# 6

SMCLK 8

THERM#

4GND 5

SMDATA 7

C3

2200P_0402_50V7K

C3

2200P_0402_50V7K

1 2

R6 54.9_0402_1%@ R6 54.9_0402_1%@

1 2

S

GD

Q2

SI3456BDV-T1-E3_TSOP6

S

GD

Q2

SI3456BDV-T1-E3_TSOP6

3

6

2

4 5

1

R1 1K_0402_5%

@R1 1K_0402_5%

@

1 2

R15 100_0402_5%R15 100_0402_5%

1 2

R17

56_0402_5%

@

R17

56_0402_5%

@

12

C1 0.1U_0402_16V4ZC1 0.1U_0402_16V4Z

12

R10 1K_0402_1%R10 1K_0402_1%

1 2

C4

4.7U_0805_10V4Z

C4

4.7U_0805_10V4Z

1

2

JP2

ACES_85204-02001

JP2

ACES_85204-02001

1

1

2

2

G1

3

G2

4

ZZZ1

PCB

ZZZ1

PCB

C5

0.1U_0402_16V4Z

C5

0.1U_0402_16V4Z

1

2

D2

RLZ5.1B_LL34

@D2

RLZ5.1B_LL34

@

12

ADDR GROUP_0 ADDR GROUP_1

CONTROL

XDP/ITP SIGNALS

H CLK

THERMAL

RESERVED

ICH

JCPU1A

Penryn

ADDR GROUP_0 ADDR GROUP_1

CONTROL

XDP/ITP SIGNALS

H CLK

THERMAL

RESERVED

ICH

JCPU1A

Penryn

A[10]#

N3

A[11]#

P5

A[12]#

P2

A[13]#

L2

A[14]#

P4

A[15]#

P1

A[16]#

R1

A[17]#

Y2

A[18]#

U5

A[19]#

R3

A[20]#

W6

A[21]#

U4

A[22]#

Y5

A[23]#

U1

A[24]#

R4

A[25]#

T5

A[26]#

T3

A[27]#

W2

A[28]#

W5

A[29]#

Y4

A[3]#

J4

A[30]#

U2

A[31]#

V4

RSVD[01]

M4

RSVD[02]

N5

RSVD[03]

T2

RSVD[04]

V3

RSVD[05]

B2

RSVD[06]

D2

RSVD[07]

D22

A[4]#

L5

A[5]#

L4

A[6]#

K5

A[7]#

M3

A[8]#

N2

A[9]#

J1

A20M#

A6

ADS# H1

ADSTB[0]#

M1

ADSTB[1]#

V1

RSVD[08]

D3

BCLK[0] A22

BCLK[1] A21

BNR# E2

BPM[0]# AD4

BPM[1]# AD3

BPM[2]# AD1

BPM[3]# AC4

BPRI# G5

BR0# F1

DBR# C20

DBSY# E1

DEFER# H5

DRDY# F21

FERR#

A5

HIT# G6

HITM# E4

IERR# D20

IGNNE#

C4

INIT# B3

LINT0

C6

LINT1

B4

LOCK# H4

PRDY# AC2

PREQ# AC1

PROCHOT# D21

REQ[0]#

K3

REQ[1]#

H2

REQ[2]#

K2

REQ[3]#

J3

REQ[4]#

L1

RESET# C1

RS[0]# F3

RS[1]# F4

RS[2]# G3

SMI#

A3

STPCLK#

D5

TCK AC5

TDI AA6

TDO AB3

THERMTRIP# C7

THERMDA A24

THERMDC B25

TMS AB5

TRDY# G2

TRST# AB6

A[32]#

W3

A[33]#

AA4

A[34]#

AB2

A[35]#

AA3

RSVD[09]

F6

JP1

SAMTE_BSH-030-01-L-D-A

CONN@

JP1

SAMTE_BSH-030-01-L-D-A

CONN@

GND0

1

OBSFN_A0

3

OBSFN_A1

5

GND2

7

OBSDATA_A0

9

OBSDATA_A1

11

GND4

13

OBSDATA_A2

15

OBSDATA_A3

17

GND6

19

OBSFN_B0

21

OBSFN_B1

23

GND8

25

OBSDATA_B0

27

OBSDATA_B1

29

GND10

31

OBSDATA_B2

33

OBSDATA_B3

35

GND12

37

PWRGOOD/HOOK0

39

HOOK1

41

VCC_OBS_AB

43

HOOK2

45

HOOK3

47

GND14

49

SDA

51

SCL

53

TCK1

55

TCK0

57

GND16

59

GND1 2

OBSFN_C0 4

OBSFN_C1 6

GND3 8

OBSDATA_C0 10

OBSDATA_C1 12

GND5 14

OBSDATA_C2 16

OBSDATA_C3 18

GND7 20

OBSFN_D0 22

OBSFN_D1 24

GND9 26

OBSDATA_D0 28

OBSDATA_D1 30

GND11 32

OBSDATA_D2 34

OBSDATA_D3 36

GND13 38

ITPCLK/HOOK4 40

ITPCLK#/HOOK5 42

VCC_OBS_CD 44

RESET#/HOOK6 46

DBR#/HOOK7 48

GND15 50

TD0 52

TRST# 54

TDI 56

TMS 58

GND17 60

E

B

C

Q1

MMBT3904_NL_SOT23-3

@

E

B

C

Q1

MMBT3904_NL_SOT23-3

@

2

3 1

R5 54.9_0402_1%R5 54.9_0402_1%

1 2

R14 100_0402_5%R14 100_0402_5%

1 2

R13 49.9_0402_1%R13 49.9_0402_1%

1 2

R7 54.9_0402_1%R7 54.9_0402_1%

1 2

R2 54.9_0402_1%R2 54.9_0402_1%

1 2

R9

1K_0402_5%

R9

1K_0402_5%

12

R3 54.9_0402_1%R3 54.9_0402_1%

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+V_CPU_GTLREF

H_D#4

H_D#14

H_D#10

H_D#9

H_D#3

H_D#13

H_D#6

H_D#2

H_D#8

H_D#12

H_D#1

H_D#5

H_D#7

H_D#11

H_D#0

H_D#15

H_D#27

H_D#25

H_D#31

H_D#24

H_D#20

H_D#30

H_D#23

H_D#19

H_D#29

H_D#16

H_D#18

H_D#22

H_D#26

H_D#28

H_D#17

H_D#21

H_DINV#0

H_DINV#1

H_DSTBP#1

H_DSTBN#1

H_DSTBP#0

H_DSTBN#0

+VCCPA

+VCCPB

VSSSENSE

VCCSENSE

VSSSENSE

VCCSENSE

+V_CPU_GTLREF

TEST4

CPU_BSEL2

CPU_BSEL1

CPU_BSEL0

TEST1

TEST2

TEST3

TEST5

TEST6

TEST7

H_D#35

H_D#46

H_D#47

H_D#37

H_D#34

H_D#41

H_D#45

H_D#43

H_D#33

H_D#39

H_D#40

H_D#44

H_D#32

H_D#42

H_D#38

H_D#36

H_DINV#2

H_DSTBN#2

H_DSTBP#2

H_DINV#3

H_DSTBN#3

H_DSTBP#3

H_D#48

H_D#56

H_D#52

H_D#59

H_D#63

H_D#55

H_D#51

H_D#62

H_D#58

H_D#54

H_D#50

H_D#57

H_D#61

H_D#53

H_D#49

H_D#60

COMP0

COMP2

COMP3

COMP1

H_PWRGOOD

H_CPUSLP#

H_DPSLP#

H_DPRSTP#

H_PSI#

H_DPWR#

VCCSENSE 49

VSSSENSE 49

H_D#[0..15]9

H_DSTBN#09 H_DSTBP#09 H_DINV#09 H_D#[16..31]9

H_DSTBN#19 H_DSTBP#19 H_DINV#19

CPU_VID0 49

CPU_VID1 49

CPU_VID2 49

CPU_VID3 49

CPU_VID4 49

CPU_VID5 49

CPU_VID6 49

CPU_BSEL017 CPU_BSEL117 CPU_BSEL217

H_D#[32..47] 9

H_DSTBN#2 9

H_DSTBP#2 9

H_DINV#2 9

H_D#[48..63] 9

H_DSTBN#3 9

H_DSTBP#3 9

H_DINV#3 9

H_DPRSTP# 9,26,49

H_DPSLP# 26

H_CPUSLP# 9

H_DPWR# 9

H_PWRGOOD 6,26

H_PSI# 49

+VCCP

+VCCP

+1.5VS

+VCC_CORE +VCC_CORE

+VCC_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Penryn(2/3)-AGTL+/ITP-XDP

Custom

7 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Penryn(2/3)-AGTL+/ITP-XDP

Custom

7 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Penryn(2/3)-AGTL+/ITP-XDP

Custom

7 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Close to CPU pin AD26

within 500mils.

CPU_BSEL CPU_BSEL2 CPU_BSEL1

166

200

0 1

CPU_BSEL0

Resistor placed within 0.5"

of CPU pin.Trace should be

at least 25 mils away from

any other toggling signal.

COMP[0,2] trace width is 18

mils. COMP[1,3] trace width

is 4 mils.

Length match within 25 mils.

The trace width/space/other is 20/7/25.

Close to CPU pin within

500mils.

Near pin B26

* Route the TEST3 and TEST5 signals through

a ground referenced Zo = 55-ohm trace that

ends in a via that is near a GND via and is

accessible through an oscilloscope

connection.

266

1

10

0 0

0

0

T2T2

R19 0_0402_5%

R19 0_0402_5%

1 2

R26

27.4_0402_1%

R26

27.4_0402_1%

12

C7

10U_0805_6.3V6M

C7

10U_0805_6.3V6M

1

2

R21 1K_0402_5%@R21 1K_0402_5%@

1 2

C8

0.01U_0402_16V7K

C8

0.01U_0402_16V7K

1

2

JCPU1C

Penryn

.

JCPU1C

Penryn

.

VCC[001]

A7

VCC[002]

A9

VCC[003]

A10

VCC[004]

A12

VCC[005]

A13

VCC[006]

A15

VCC[007]

A17

VCC[008]

A18

VCC[009]

A20

VCC[010]

B7

VCC[011]

B9

VCC[012]

B10

VCC[013]

B12

VCC[014]

B14

VCC[015]

B15

VCC[016]

B17

VCC[017]

B18

VCC[018]

B20

VCC[019]

C9

VCC[020]

C10

VCC[021]

C12

VCC[022]

C13

VCC[023]

C15

VCC[024]

C17

VCC[025]

C18

VCC[026]

D9

VCC[027]

D10

VCC[028]

D12

VCC[029]

D14

VCC[030]

D15

VCC[031]

D17

VCC[032]

D18

VCC[033]

E7

VCC[034]

E9

VCC[035]

E10

VCC[036]

E12

VCC[037]

E13

VCC[038]

E15

VCC[039]

E17

VCC[040]

E18

VCC[041]

E20

VCC[042]

F7

VCC[043]

F9

VCC[044]

F10

VCC[045]

F12

VCC[046]

F14

VCC[047]

F15

VCC[048]

F17

VCC[049]

F18

VCC[050]

F20

VCC[051]

AA7

VCC[052]

AA9

VCC[053]

AA10

VCC[054]

AA12

VCC[055]

AA13

VCC[056]

AA15

VCC[057]

AA17

VCC[058]

AA18

VCC[059]

AA20

VCC[060]

AB9

VCC[061]

AC10

VCC[062]

AB10

VCC[063]

AB12

VCC[064]

AB14

VCC[065]

AB15

VCC[066]

AB17

VCC[067]

AB18

VCC[068] AB20

VCC[069] AB7

VCC[070] AC7

VCC[071] AC9

VCC[072] AC12

VCC[073] AC13

VCC[074] AC15

VCC[075] AC17

VCC[076] AC18

VCC[077] AD7

VCC[078] AD9

VCC[079] AD10

VCC[080] AD12

VCC[081] AD14

VCC[082] AD15

VCC[083] AD17

VCC[084] AD18

VCC[085] AE9

VCC[086] AE10

VCC[087] AE12

VCC[088] AE13

VCC[089] AE15

VCC[090] AE17

VCC[091] AE18

VCC[092] AE20

VCC[093] AF9

VCC[094] AF10

VCC[095] AF12

VCC[096] AF14

VCC[097] AF15

VCC[098] AF17

VCC[099] AF18

VCC[100] AF20

VCCA[01] B26

VCCP[03] J6

VCCP[04] K6

VCCP[05] M6

VCCP[06] J21

VCCP[07] K21

VCCP[08] M21

VCCP[09] N21

VCCP[10] N6

VCCP[11] R21

VCCP[12] R6

VCCP[13] T21

VCCP[14] T6

VCCP[15] V21

VCCP[16] W21

VCCSENSE AF7

VID[0] AD6

VID[1] AF5

VID[2] AE5

VID[3] AF4

VID[4] AE3

VID[5] AF3

VID[6] AE2

VSSSENSE AE7

VCCA[02] C26

VCCP[01] G21

VCCP[02] V6

R24

27.4_0402_1%

R24

27.4_0402_1%

12

R30 100_0402_1%R30 100_0402_1%

1 2

R22 1K_0402_5%@R22 1K_0402_5%@

1 2

T6T6

R28 100_0402_1%R28 100_0402_1%

1 2

DATA GRP 0 DATA GRP 1

DATA GRP 2DATA GRP 3

MISC

JCPU1B

Penryn

DATA GRP 0 DATA GRP 1

DATA GRP 2DATA GRP 3

MISC

JCPU1B

Penryn

COMP[0] R26

COMP[1] U26

COMP[2] AA1

COMP[3] Y1

D[0]#

E22

D[1]#

F24

D[10]#

J24

D[11]#

J23

D[12]#

H22

D[13]#

F26

D[14]#

K22

D[15]#

H23

D[16]#

N22

D[17]#

K25

D[18]#

P26

D[19]#

R23

D[2]#

E26

D[20]#

L23

D[21]#

M24

D[22]#

L22

D[23]#

M23

D[24]#

P25

D[25]#

P23

D[26]#

P22

D[27]#

T24

D[28]#

R24

D[29]#

L25

D[3]#

G22

D[30]#

T25

D[31]#

N25

D[32]# Y22

D[33]# AB24

D[34]# V24

D[35]# V26

D[36]# V23

D[37]# T22

D[38]# U25

D[39]# U23

D[4]#

F23

D[40]# Y25

D[41]# W22

D[42]# Y23

D[43]# W24

D[44]# W25

D[45]# AA23

D[46]# AA24

D[47]# AB25

D[48]# AE24

D[49]# AD24

D[5]#

G25

D[50]# AA21

D[51]# AB22

D[52]# AB21

D[53]# AC26

D[54]# AD20

D[55]# AE22

D[56]# AF23

D[57]# AC25

D[58]# AE21

D[59]# AD21

D[6]#

E25

D[60]# AC22

D[61]# AD23

D[62]# AF22

D[63]# AC23

D[7]#

E23

D[8]#

K24

D[9]#

G24

TEST5

AF1

DINV[0]#

H25

DINV[1]#

N24

DINV[2]# U22

DINV[3]# AC20

DPRSTP# E5

DPSLP# B5

DPWR# D24

DSTBN[0]#

J26

DSTBN[1]#

L26

DSTBN[2]# Y26

DSTBN[3]# AE25

DSTBP[0]#

H26

DSTBP[1]#

M26

DSTBP[2]# AA26

DSTBP[3]# AF24

GTLREF

AD26

PSI# AE6

PWRGOOD D6

SLP# D7

TEST3

C24

BSEL[0]

B22

BSEL[1]

B23

BSEL[2]

C21

TEST2

D25

TEST4

AF26

TEST6

A26

TEST1

C23

TEST7

C3

T4T4

T5T5

R20 0_0402_5%

R20 0_0402_5%

1 2

R23

54.9_0402_1%

R23

54.9_0402_1%

12

R29

2K_0402_1%

R29

2K_0402_1%

12

R27

1K_0402_1%

R27

1K_0402_1%

12

R25

54.9_0402_1%

R25

54.9_0402_1%

12

+

C6

330U_D2E_2.5VM_R7

+

C6

330U_D2E_2.5VM_R7

1

2

T3T3

hexainf@hotmail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCCP

+VCC_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Penryn(3/3)-AGTL+/ITP-XDP

Custom

8 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Penryn(3/3)-AGTL+/ITP-XDP

Custom

8 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Penryn(3/3)-AGTL+/ITP-XDP

Custom

8 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Inside CPU center cavity in 2 rows

Mid Frequence Decoupling

Place these capacitors on

L8 (North side,Secondary

Layer)

ESR <= 1.5m ohm

Capacitor > 1980uF

Near CPU CORE regulator

5

5

5

5

5

Place these capacitors on

L8 (North side,Secondary

Layer)

Place these capacitors on

L8 (North side,Secondary

Layer)

Place these capacitors on

L8 (North side,Secondary

Layer)

C30

10U_0805_6.3V6M

C30

10U_0805_6.3V6M

1

2

+

C44

330U_D2E_2.5VM_R7

+

C44

330U_D2E_2.5VM_R7

1

2

C18

10U_0805_6.3V6M

C18

10U_0805_6.3V6M

1

2

C50

0.1U_0402_10V6K

C50

0.1U_0402_10V6K

1

2

C38

10U_0805_6.3V6M

C38

10U_0805_6.3V6M

1

2

C34

10U_0805_6.3V6M

C34

10U_0805_6.3V6M

1

2

C48

0.1U_0402_10V6K

C48

0.1U_0402_10V6K

1

2

C45

0.1U_0402_10V6K

C45

0.1U_0402_10V6K

1

2

C39

10U_0805_6.3V6M

C39

10U_0805_6.3V6M

1

2

C31

10U_0805_6.3V6M

C31

10U_0805_6.3V6M

1

2

C20

10U_0805_6.3V6M

C20

10U_0805_6.3V6M

1

2

C25

10U_0805_6.3V6M

C25

10U_0805_6.3V6M

1

2

C19

10U_0805_6.3V6M

C19

10U_0805_6.3V6M

1

2

C29

10U_0805_6.3V6M

C29

10U_0805_6.3V6M

1

2

C17

10U_0805_6.3V6M

C17

10U_0805_6.3V6M

1

2

C24

10U_0805_6.3V6M

C24

10U_0805_6.3V6M

1

2

C47

0.1U_0402_10V6K

C47

0.1U_0402_10V6K

1

2

C23

10U_0805_6.3V6M

C23

10U_0805_6.3V6M

1

2

C28

10U_0805_6.3V6M

C28

10U_0805_6.3V6M

1

2

C10

10U_0805_6.3V6M

C10

10U_0805_6.3V6M

1

2

C46

0.1U_0402_10V6K

C46

0.1U_0402_10V6K

1

2

C36

10U_0805_6.3V6M

C36

10U_0805_6.3V6M

1

2

C33

10U_0805_6.3V6M

C33

10U_0805_6.3V6M

1

2

C21

10U_0805_6.3V6M

C21

10U_0805_6.3V6M

1

2

C22

10U_0805_6.3V6M

C22

10U_0805_6.3V6M

1

2

C27

10U_0805_6.3V6M

C27

10U_0805_6.3V6M

1

2

C49

0.1U_0402_10V6K

C49

0.1U_0402_10V6K

1

2

+

C43

330U_D2E_2.5VM_R7

@

+

C43

330U_D2E_2.5VM_R7

@

1

2

C37

10U_0805_6.3V6M

C37

10U_0805_6.3V6M

1

2

JCPU1D

Penryn

.

JCPU1D

Penryn

.

VSS[082] P6

VSS[148] AE11

VSS[002]

A8

VSS[003]

A11

VSS[004]

A14

VSS[005]

A16

VSS[006]

A19

VSS[007]

A23

VSS[008]

AF2

VSS[009]

B6

VSS[010]

B8

VSS[011]

B11

VSS[012]

B13

VSS[013]

B16

VSS[014]

B19

VSS[015]

B21

VSS[016]

B24

VSS[017]

C5

VSS[018]

C8

VSS[019]

C11

VSS[020]

C14

VSS[021]

C16

VSS[022]

C19

VSS[023]

C2

VSS[024]

C22

VSS[025]

C25

VSS[026]

D1

VSS[027]

D4

VSS[028]

D8

VSS[029]

D11

VSS[030]

D13

VSS[031]

D16

VSS[032]

D19

VSS[033]

D23

VSS[034]

D26

VSS[035]

E3

VSS[036]

E6

VSS[037]

E8

VSS[038]

E11

VSS[039]

E14

VSS[040]

E16

VSS[041]

E19

VSS[042]

E21

VSS[043]

E24

VSS[044]

F5

VSS[045]

F8

VSS[046]

F11

VSS[047]

F13

VSS[048]

F16

VSS[049]

F19

VSS[050]

F2

VSS[051]

F22

VSS[052]

F25

VSS[053]

G4

VSS[054]

G1

VSS[055]

G23

VSS[056]

G26

VSS[057]

H3

VSS[058]

H6

VSS[059]

H21

VSS[060]

H24

VSS[061]

J2

VSS[062]

J5

VSS[063]

J22

VSS[064]

J25

VSS[065]

K1

VSS[066]

K4

VSS[067]

K23

VSS[068]

K26

VSS[069]

L3

VSS[070]

L6

VSS[071]

L21

VSS[072]

L24

VSS[073]

M2

VSS[074]

M5

VSS[075]

M22

VSS[076]

M25

VSS[077]

N1

VSS[078]

N4

VSS[079]

N23

VSS[080]

N26

VSS[081]

P3 VSS[162] A25

VSS[161] AF21

VSS[160] AF19

VSS[159] AF16

VSS[158] AF13

VSS[157] AF11

VSS[156] AF8

VSS[155] AF6

VSS[154] A2

VSS[153] AE26

VSS[152] AE23

VSS[151] AE19

VSS[083] P21

VSS[084] P24

VSS[085] R2

VSS[086] R5

VSS[087] R22

VSS[088] R25

VSS[089] T1

VSS[090] T4

VSS[091] T23

VSS[092] T26

VSS[093] U3

VSS[094] U6

VSS[095] U21

VSS[096] U24

VSS[097] V2

VSS[098] V5

VSS[099] V22

VSS[100] V25

VSS[101] W1

VSS[102] W4

VSS[103] W23

VSS[104] W26

VSS[105] Y3

VSS[107] Y21

VSS[108] Y24

VSS[109] AA2

VSS[110] AA5

VSS[111] AA8

VSS[112] AA11

VSS[113] AA14

VSS[114] AA16

VSS[115] AA19

VSS[116] AA22

VSS[117] AA25

VSS[118] AB1

VSS[119] AB4

VSS[120] AB8

VSS[121] AB11

VSS[122] AB13

VSS[123] AB16

VSS[124] AB19

VSS[125] AB23

VSS[126] AB26

VSS[127] AC3

VSS[128] AC6

VSS[129] AC8

VSS[130] AC11

VSS[131] AC14

VSS[132] AC16

VSS[133] AC19

VSS[134] AC21

VSS[135] AC24

VSS[136] AD2

VSS[137] AD5

VSS[138] AD8

VSS[139] AD11

VSS[140] AD13

VSS[141] AD16

VSS[142] AD19

VSS[143] AD22

VSS[144] AD25

VSS[145] AE1

VSS[146] AE4

VSS[106] Y6

VSS[001]

A4

VSS[149] AE14

VSS[150] AE16

VSS[147] AE8

VSS[163] AF25

C9

10U_0805_6.3V6M

C9

10U_0805_6.3V6M

1

2

C40

10U_0805_6.3V6M

C40

10U_0805_6.3V6M

1

2

C15

10U_0805_6.3V6M

C15

10U_0805_6.3V6M

1

2

C16

10U_0805_6.3V6M

C16

10U_0805_6.3V6M

1

2

+

C41

330U_D2E_2.5VM_R7

+

C41

330U_D2E_2.5VM_R7

1

2

C35

10U_0805_6.3V6M

C35

10U_0805_6.3V6M

1

2

C14

10U_0805_6.3V6M

C14

10U_0805_6.3V6M

1

2

C12

10U_0805_6.3V6M

C12

10U_0805_6.3V6M

1

2

C11

10U_0805_6.3V6M

C11

10U_0805_6.3V6M

1

2

C13

10U_0805_6.3V6M

C13

10U_0805_6.3V6M

1

2

C32

10U_0805_6.3V6M

C32

10U_0805_6.3V6M

1

2

C26

10U_0805_6.3V6M

C26

10U_0805_6.3V6M

1

2

+

C42

330U_D2E_2.5VM_R7

+

C42

330U_D2E_2.5VM_R7

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PM_EXTTS#0

V_DDR_MCH_REF

H_RCOMP

CLKREQ#_7

+H_SWNG

H_D#32

H_D#24

H_D#19

H_D#59

H_D#42

H_D#36

H_D#3

H_D#40

H_RCOMP

H_D#55

H_D#4

H_D#60

H_D#30

H_D#34

H_D#27

H_D#1

H_D#23

H_D#51

H_D#48

H_D#46

H_D#44

H_D#39

H_D#22

H_D#15

H_D#14

H_D#9

H_D#56

H_D#54

H_D#8

H_RESET#

H_D#37

H_D#35

H_D#28

H_D#25

H_D#12

H_D#38

H_D#26

H_D#11

H_D#7

H_D#53

H_D#52

H_D#41

H_D#18

H_D#10

+H_VREF

H_D#57

H_D#33

H_D#29

+H_SWNG

H_D#6

H_D#45

H_D#43

H_D#20

H_D#61

H_D#17

H_D#63

H_D#58

H_D#21

H_D#16

H_D#50

H_CPUSLP#

H_D#62

H_D#5

H_D#49

H_D#31

H_D#2

H_D#47

H_D#13

H_D#0

H_A#7

H_A#12

H_A#32

H_A#24

H_A#3

H_A#18

H_A#21

H_A#16

H_A#19

H_A#31

H_A#27

H_A#5

H_A#30

H_A#9

H_A#26

H_A#14

H_A#11

H_A#22

H_A#23

H_A#34

H_A#20

H_A#8

H_A#15

H_A#6

H_A#25

H_A#17

H_A#4

H_A#13

H_A#33

H_A#29

H_A#28

H_A#10

H_A#35

CLK_MCH_BCLK#

H_LOCK#

CLK_MCH_BCLK

H_ADSTB#1

H_DEFER#

H_HITM#

H_ADS#

H_BR0#

H_DBSY#

H_HIT#

H_BPRI#

H_DRDY#

H_BNR#

H_DPWR#

H_ADSTB#0

H_TRDY#

+H_VREF

H_DINV#0

H_DINV#3

H_DINV#1

H_DINV#2

H_DSTBN#1

H_DSTBN#3

H_DSTBN#0

H_DSTBN#2

H_DSTBP#2

H_DSTBP#0

H_DSTBP#3

H_DSTBP#1

H_REQ#0

H_REQ#3

H_REQ#1

H_REQ#4

H_REQ#2

H_RS#1

H_RS#0

H_RS#2

MCH_CLKSEL0

SMRCOMP_VOL

+CL_VREF

TSATN#

MCH_ICH_SYNC#

CLKREQ#_7

CL_CLK0

CL_DATA0

CL_RST#

M_PWROK

DMI_TXN0

DMI_TXN1

DMI_TXN2

DMI_TXN3

DMI_TXP0

DMI_TXP1

DMI_TXP2

DMI_TXP3

DMI_RXN0

DMI_RXN1

DMI_RXN2

DMI_RXN3

DMI_RXP0

DMI_RXP1

DMI_RXP2

DMI_RXP3

CLK_MCH_3GPLL#

CLK_MCH_3GPLL

SM_PWROK

TP_SM_DRAMRST#

SM_REXT

V_DDR_MCH_REF

M_CLK_DDR3

M_CLK_DDR#0

M_CLK_DDR#1

M_CLK_DDR#2

M_CLK_DDR#3

M_CLK_DDR2

M_CLK_DDR0

M_CLK_DDR1

SMRCOMP_VOH

SMRCOMP_VOL

M_ODT1

SMRCOMP#

M_ODT3

M_ODT0

M_ODT2

SMRCOMP

DDR_CKE0_DIMMA

DDR_CKE1_DIMMA

DDR_CKE3_DIMMB

DDR_CS1_DIMMA#

DDR_CKE2_DIMMB

DDR_CS0_DIMMA#

DDR_CS3_DIMMB#

DDR_CS2_DIMMB#

MCH_CLKSEL1

MCH_CLKSEL2

CFG11

CFG9

CFG7

CFG10

CFG6

CFG14

CFG16

CFG15

CFG17

CFG8

CFG5

CFG13

CFG18

CFG19

CFG12

CFG20

H_DPRSTP#

THERMTRIP#

PM_PWROK

PM_EXTTS#1

PM_EXTTS#0

PM_BMBUSY#

DPRSLPVR

SMRCOMP_VOH

PLT_RST#

PM_EXTTS#1

V_DDR_MCH_REF15,16

H_D#[0..63]7

H_CPUSLP#7 H_RESET#6

H_A#[3..35] 6

H_ADS# 6

H_ADSTB#1 6

H_ADSTB#0 6

H_BPRI# 6

H_BNR# 6

H_DEFER# 6

H_BR0# 6

H_DBSY# 6

CLK_MCH_BCLK 17

CLK_MCH_BCLK# 17

H_DPWR# 7

H_DRDY# 6

H_HIT# 6

H_HITM# 6

H_LOCK# 6

H_TRDY# 6

H_DINV#0 7

H_DINV#1 7

H_DINV#2 7

H_DINV#3 7

H_DSTBN#0 7

H_DSTBN#1 7

H_DSTBN#2 7

H_DSTBN#3 7

H_DSTBP#0 7

H_DSTBP#1 7

H_DSTBP#2 7

H_DSTBP#3 7

H_REQ#3 6

H_REQ#2 6

H_REQ#1 6

H_REQ#4 6

H_REQ#0 6

H_RS#2 6

H_RS#1 6

H_RS#0 6

MCH_CLKSEL017 MCH_CLKSEL117 MCH_CLKSEL217

TSATN# 38

MCH_ICH_SYNC# 27

CL_CLK0 27

CL_DATA0 27

M_PWROK 27,38

CL_RST# 27

DMI_TXP0 27

DMI_RXN0 27

DMI_RXP0 27

DMI_TXN0 27

DMI_TXN1 27

DMI_TXN2 27

DMI_TXN3 27

DMI_TXP1 27

DMI_TXP2 27

DMI_TXP3 27

DMI_RXN1 27

DMI_RXN2 27

DMI_RXN3 27

DMI_RXP1 27

DMI_RXP2 27

DMI_RXP3 27

CLK_MCH_3GPLL 17

CLK_MCH_3GPLL# 17

DDR_CKE0_DIMMA 15

DDR_CKE1_DIMMA 15

DDR_CKE2_DIMMB 16

DDR_CKE3_DIMMB 16

DDR_CS0_DIMMA# 15

DDR_CS1_DIMMA# 15

DDR_CS2_DIMMB# 16

DDR_CS3_DIMMB# 16

M_CLK_DDR0 15

M_CLK_DDR1 15

M_CLK_DDR2 16

M_CLK_DDR3 16

M_CLK_DDR#0 15

M_CLK_DDR#1 15

M_CLK_DDR#2 16

M_CLK_DDR#3 16

M_ODT0 15

M_ODT1 15

M_ODT2 16

M_ODT3 16

CLKREQ#_7 17

CFG511

CFG911

CFG1111 CFG1011

CFG611 CFG711

CFG1311 CFG1211

CFG1611

CFG1811

CFG2011 CFG1911

CFG811

CFG1411 CFG1511

CFG1711

PM_BMBUSY#27 H_DPRSTP#7,26,49 PM_EXTTS#015

DPRSLPVR27,49

PM_EXTTS#116 PM_PWROK27,38

H_THERMTRIP#6,26 PLT_RST#20,25,30,31,32

+VCCP

+VCCP

+3VS

+1.8V

+1.8V

+VCCP

+1.8V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(1/6)-AGTL/DMI/DDR

Custom

9 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(1/6)-AGTL/DMI/DDR

Custom

9 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(1/6)-AGTL/DMI/DDR

Custom

9 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Layout Note:

H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20

Layout Note: V_DDR_MCH_REF

trace width and spacing is 20/20.

Near B3 pinwithin 100 mils from NB

Layout note:

Route H_SCOMP and H_SCOMP# with trace

width, spacing and impedance (55 ohm) same as

FSB data traces

0621 add CLK and DAT for DVI

*R37*Follow Intel

feedback

Follow Design Guide

For Cantiga: 80.6ohm

80% of 1.8V VCC_SM

20% of 1.8V VCC_SM

T18T18

R48

1K_0402_1%

R48

1K_0402_1%

12

T24T24

T29 PADT29 PAD

T9T9

T10T10

R35 80.6_0402_1%R35 80.6_0402_1%

1 2

R47

221_0603_1%

R47

221_0603_1%

12

C53

2.2U_0603_6.3V4Z

C53

2.2U_0603_6.3V4Z

1

2

T27T27

R45

1K_0402_1%

R45

1K_0402_1%

12

HOST

U2A

CANTIGA ES_FCBGA1329

HOST

U2A

CANTIGA ES_FCBGA1329

H_A#_10 P16

H_A#_11 R16

H_A#_12 N17

H_A#_13 M13

H_A#_14 E17

H_A#_15 P17

H_A#_16 F17

H_A#_17 G20

H_A#_18 B19

H_A#_19 J16

H_A#_20 E20

H_A#_21 H16

H_A#_22 J20

H_A#_23 L17

H_A#_24 A17

H_A#_25 B17

H_A#_26 L16

H_A#_27 C21

H_A#_28 J17

H_A#_29 H20

H_A#_3 A14

H_A#_30 B18

H_A#_31 K17

H_A#_4 C15

H_A#_5 F16

H_A#_6 H13

H_A#_7 C18

H_A#_8 M16

H_A#_9 J13

H_ADS# H12

H_ADSTB#_0 B16

H_ADSTB#_1 G17

H_BNR# A9

H_BPRI# F11

H_BREQ# G12

HPLL_CLK# AH6

H_CPURST#

C12

HPLL_CLK AH7

H_D#_0

F2

H_REQ#_2 F13

H_REQ#_3 B13

H_D#_1

G8

H_D#_10

M9

H_D#_20

L6

H_D#_30

N10

H_D#_40

AA8

H_D#_50

AA2

H_D#_60

AE11

H_D#_8

D4

H_D#_9

H3

H_DBSY# B10

H_D#_11

M11

H_D#_12

J1

H_D#_13

J2

H_D#_14

N12

H_D#_15

J6

H_D#_16

P2

H_D#_17

L2

H_D#_18

R2

H_D#_19

N9

H_D#_2

F8

H_D#_21

M5

H_D#_22

J3

H_D#_23

N2

H_D#_24

R1

H_D#_25

N5

H_D#_26

N6

H_D#_27

P13

H_D#_28

N8

H_D#_29

L7

H_D#_3

E6

H_D#_31

M3

H_D#_32

Y3

H_D#_33

AD14

H_D#_34

Y6

H_D#_35

Y10

H_D#_36

Y12

H_D#_37

Y14

H_D#_38

Y7

H_D#_39

W2

H_D#_4

G2

H_D#_41

Y9

H_D#_42

AA13

H_D#_43

AA9

H_D#_44

AA11

H_D#_45

AD11

H_D#_46

AD10

H_D#_47

AD13

H_D#_48

AE12

H_D#_49

AE9

H_D#_5

H6

H_D#_51

AD8

H_D#_52

AA3

H_D#_53

AD3

H_D#_54

AD7

H_D#_55

AE14

H_D#_56

AF3

H_D#_57

AC1

H_D#_58

AE3

H_D#_59

AC3

H_D#_6

H2

H_D#_61

AE8

H_D#_62

AG2

H_D#_63

AD6

H_D#_7

F6

H_DEFER# E9

H_DINV#_0 J8

H_DINV#_1 L3

H_DINV#_2 Y13

H_DINV#_3 Y1

H_DPWR# J11

H_DRDY# F9

H_DSTBN#_0 L10

H_DSTBN#_1 M7

H_DSTBN#_2 AA5

H_DSTBN#_3 AE6

H_DSTBP#_0 L9

H_DSTBP#_1 M8

H_DSTBP#_2 AA6

H_DSTBP#_3 AE5

H_AVREF

A11

H_DVREF

B11

H_TRDY# C9

H_HIT# H9

H_HITM# E12

H_LOCK# H11

H_REQ#_0 B15

H_REQ#_1 K13

H_REQ#_4 B14

H_A#_32 B20

H_A#_33 F21

H_A#_34 K21

H_A#_35 L20

H_SWING

C5

H_CPUSLP#

E11

H_RCOMP

E3

H_RS#_0 B6

H_RS#_1 F12

H_RS#_2 C8

C56

0.1U_0402_16V4Z

C56

0.1U_0402_16V4Z

1

2

T26T26

T16T16

C52

0.01U_0402_25V7K

C52

0.01U_0402_25V7K

1

2

R34 80.6_0402_1%

R34 80.6_0402_1%

1 2

T7T7

R37 499_0402_1%R37 499_0402_1%

1 2

C59

0.1U_0402_16V4Z

C59

0.1U_0402_16V4Z

1

2

T23T23

T33T33

R44

499_0402_1%

R44

499_0402_1%

12

C55

0.1U_0402_16V4Z

@

C55

0.1U_0402_16V4Z

@

1

2

T22T22

R33

1K_0402_1%

R33

1K_0402_1%

12

T13T13

R32

3.01K_0402_1%

R32

3.01K_0402_1%

12

T35T35

T30T30

T11T11

T31T31

C54

0.01U_0402_25V7K

C54

0.01U_0402_25V7K

1

2

R40 10K_0402_5%R40 10K_0402_5%

1 2

T37T37

T8T8

R39 10K_0402_5%R39 10K_0402_5%

1 2

R46

1K_0402_1%

R46

1K_0402_1%

12

C57

0.1U_0402_16V4Z

C57

0.1U_0402_16V4Z

1

2

T21T21

R55

100_0402_1%

R55

100_0402_1%

12

T14T14

T20T20

T34T34

T12T12

T19T19

R52

2K_0402_1%

R52

2K_0402_1%

12

R41 100_0402_5%

R41 100_0402_5%

1 2

R31

1K_0402_1%

R31

1K_0402_1%

12

R43

1K_0402_1%

R43

1K_0402_1%

12

T28T28

T25T25

C58

0.1U_0402_16V4Z

C58

0.1U_0402_16V4Z

1

2

R38 10K_0402_5%

R38 10K_0402_5%

1 2

R54

24.9_0402_1%

R54

24.9_0402_1%

12

T36T36

T32T32

T15T15

T17T17

R36 0_0402_5%R36 0_0402_5%

1 2

R42 0_0402_5%

R42 0_0402_5%

1 2

PM

MISC

NC

DDR CLK/ CONTROL/COMPENSATIONCLK

DMI

CFG

RSVD

GRAPHICS VIDMEHDA

U2B

CANTIGA ES_FCBGA1329

PM

MISC

NC

DDR CLK/ CONTROL/COMPENSATIONCLK

DMI

CFG

RSVD

GRAPHICS VIDMEHDA

U2B

CANTIGA ES_FCBGA1329

SA_CK_0 AP24

SA_CK_1 AT21

SB_CK_0 AV24

SA_CK#_0 AR24

SA_CK#_1 AR21

SB_CK#_0 AU24

SA_CKE_0 BC28

SA_CKE_1 AY28

SB_CKE_0 AY36

SB_CKE_1 BB36

SA_CS#_0 BA17

SA_CS#_1 AY16

SB_CS#_0 AV16

SB_CS#_1 AR13

SM_DRAMRST# BC36

SA_ODT_0 BD17

SA_ODT_1 AY17

SB_ODT_0 BF15

SB_ODT_1 AY13

SM_RCOMP BG22

SM_RCOMP# BH21

CFG_18

P29

CFG_19

R28

CFG_2

P25

CFG_0

T25

CFG_1

R25

CFG_20

T28

CFG_3

P20

CFG_4

P24

CFG_5

C25

CFG_6

N24

CFG_7

M24

CFG_8

E21

CFG_9

C23

CFG_10

C24

CFG_11

N21

CFG_12

P21

CFG_13

T21

CFG_14

R20

CFG_15

M20

CFG_16

L21

CFG_17

H21

PM_SYNC#

R29

PM_EXT_TS#_0

N33

PM_EXT_TS#_1

P32

PWROK

AT40

RSTIN#

AT11

DPLL_REF_CLK B38

DPLL_REF_CLK# A38

DPLL_REF_SSCLK E41

DPLL_REF_SSCLK# F41

DMI_RXN_0 AE41

DMI_RXN_1 AE37

DMI_RXN_2 AE47

DMI_RXN_3 AH39

DMI_RXP_0 AE40

DMI_RXP_1 AE38

DMI_RXP_2 AE48

DMI_RXP_3 AH40

DMI_TXN_0 AE35

DMI_TXN_1 AE43

DMI_TXN_2 AE46

DMI_TXN_3 AH42

DMI_TXP_0 AD35

DMI_TXP_1 AE44

DMI_TXP_2 AF46

DMI_TXP_3 AH43

RESERVED

AL34

RESERVED

AN35 RESERVED

AK34

RESERVED

AM35

RESERVED

BG23

RESERVED

BF23

RESERVED

BH18

RESERVED

BF18

PM_DPRSTP#

B7

SB_CK_1 AU20

SB_CK#_1 AV20

RESERVED

AY21

RESERVED

AH9

RESERVED

AH10

RESERVED

AH12

RESERVED

AH13

RESERVED

M36

RESERVED

N36

RESERVED

R33

RESERVED

T33

GFX_VID_0 B33

GFX_VID_1 B32

GFX_VID_2 G33

GFX_VID_3 F33

GFX_VR_EN C34

SM_RCOMP_VOH BF28

SM_RCOMP_VOL BH28

THERMTRIP#

T20

DPRSLPVR

R32

RESERVED

K12

CL_CLK AH37

CL_DATA AH36

CL_PWROK AN36

CL_RST# AJ35

CL_VREF AH34

NC

A47

NC

BG48

NC

BF48

NC

BD48

NC

BC48

NC

BH47

NC

BG47

NC

BE47

NC

BH46

NC

BF46

NC

BG45

NC

BH44

NC

BH43

NC

BH6

NC

BH5

NC

BG4

SDVO_CTRLCLK G36

SDVO_CTRLDATA E36

CLKREQ# K36

RESERVED

T24

ICH_SYNC# H36

TSATN# B12

PEG_CLK# E43

PEG_CLK F43

NC

BH3

GFX_VID_4 E33

RESERVED

B31

DDPC_CTRLCLK N28

NC

BF3

NC

BH2

NC

BG2

NC

BE2

NC

BG1

NC

BF1

NC

BD1

NC

BC1

NC

F1

SM_VREF AV42

SM_PWROK AR36

SM_REXT BF17

RESERVED

M1

HDA_BCLK B28

HDA_RST# B30

HDA_SDI B29

HDA_SDO C29

HDA_SYNC A28

DDPC_CTRLDATA M28

RESERVED

B2

C51

2.2U_0603_6.3V4Z

C51

2.2U_0603_6.3V4Z

1

2

hexainf@hotmail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_BS0

DDR_A_BS1

DDR_A_BS2

DDR_A_MA0

DDR_A_MA1

DDR_A_MA4

DDR_A_MA2

DDR_A_MA3

DDR_A_MA5

DDR_A_MA6

DDR_A_MA7

DDR_A_MA8

DDR_A_MA9

DDR_A_MA12

DDR_A_MA13

DDR_A_MA11

DDR_A_MA10

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#3

DDR_A_DQS#2

DDR_A_DQS#5

DDR_A_DQS#4

DDR_A_DQS#6

DDR_A_DQS#7

DDR_A_DQS0

DDR_A_DQS1

DDR_A_DQS2

DDR_A_DQS3

DDR_A_DQS4

DDR_A_DQS5

DDR_A_DQS6

DDR_A_DQS7

DDR_A_DM7

DDR_A_DM5

DDR_A_DM2

DDR_A_DM1

DDR_A_DM6

DDR_A_DM4

DDR_A_DM0

DDR_A_DM3

DDR_A_CAS#

DDR_A_RAS#

DDR_A_WE#

DDR_A_D63

DDR_A_D62

DDR_A_D61

DDR_A_D60

DDR_A_D59

DDR_A_D58

DDR_A_D57

DDR_A_D56

DDR_A_D55

DDR_A_D54

DDR_A_D51

DDR_A_D50

DDR_A_D49

DDR_A_D48

DDR_A_D53

DDR_A_D52

DDR_A_D47

DDR_A_D46

DDR_A_D43

DDR_A_D42

DDR_A_D41

DDR_A_D40

DDR_A_D45

DDR_A_D44

DDR_A_D39

DDR_A_D38

DDR_A_D35

DDR_A_D34

DDR_A_D33

DDR_A_D32

DDR_A_D37

DDR_A_D36

DDR_A_D31

DDR_A_D30

DDR_A_D27

DDR_A_D26

DDR_A_D25

DDR_A_D24

DDR_A_D15

DDR_A_D14

DDR_A_D11

DDR_A_D10

DDR_A_D9

DDR_A_D13

DDR_A_D12

DDR_A_D29

DDR_A_D28

DDR_A_D23

DDR_A_D22

DDR_A_D19

DDR_A_D18

DDR_A_D17

DDR_A_D16

DDR_A_D21

DDR_A_D20

DDR_A_D8

DDR_A_D5

DDR_A_D4

DDR_A_D3

DDR_A_D7

DDR_A_D6

DDR_A_D2

DDR_A_D1

DDR_A_D0

DDR_A_MA14

DDR_B_RAS#

DDR_B_MA14

DDR_B_MA10

DDR_B_DQS#7

DDR_B_DQS#2

DDR_B_DQS7

DDR_B_DQS2

DDR_B_DM3

DDR_B_D51

DDR_B_D39

DDR_B_D18

DDR_B_MA7

DDR_B_DQS0

DDR_B_D7

DDR_B_D54

DDR_B_D4

DDR_B_D36

DDR_B_D21

DDR_B_MA4

DDR_B_DM0

DDR_B_D62

DDR_B_D34

DDR_B_D19

DDR_B_D13

DDR_B_MA5

DDR_B_MA11

DDR_B_BS2

DDR_B_D42

DDR_B_D35

DDR_B_D31

DDR_B_D24

DDR_B_D15

DDR_B_MA3

DDR_B_DQS#6

DDR_B_DM7

DDR_B_D50

DDR_B_D38

DDR_B_D32

DDR_B_D23

DDR_B_MA6

DDR_B_D6

DDR_B_D53

DDR_B_D33

DDR_B_D3

DDR_B_D20

DDR_B_DQS#5

DDR_B_BS1

DDR_B_D61

DDR_B_D59

DDR_B_D46

DDR_B_D12

DDR_B_DQS3

DDR_B_D47

DDR_B_D30

DDR_B_D14

DDR_B_MA0

DDR_B_DQS#0

DDR_B_DM6

DDR_B_DM4

DDR_B_D55

DDR_B_D44

DDR_B_D29

DDR_B_D27

DDR_B_D22

DDR_B_MA13

DDR_B_MA1

DDR_B_D57

DDR_B_D52

DDR_B_D2

DDR_B_D17

DDR_B_DQS#1

DDR_B_DQS1

DDR_B_D9

DDR_B_D60

DDR_B_D58

DDR_B_D45

DDR_B_DQS4

DDR_B_MA9

DDR_B_DQS#4

DDR_B_DM5

DDR_B_DM2

DDR_B_D49

DDR_B_D41

DDR_B_D28

DDR_B_D11

DDR_B_WE#

DDR_B_MA12

DDR_B_D56

DDR_B_D48

DDR_B_D16

DDR_B_D1

DDR_B_MA2

DDR_B_DQS5

DDR_B_D8

DDR_B_D63

DDR_B_D37

DDR_B_D0

DDR_B_BS0

DDR_B_D5

DDR_B_MA8

DDR_B_DQS#3

DDR_B_DQS6

DDR_B_DM1

DDR_B_CAS#

DDR_B_D43

DDR_B_D40

DDR_B_D26

DDR_B_D25

DDR_B_D10

DDR_A_BS0 15

DDR_A_BS1 15

DDR_A_BS2 15

DDR_A_D[0..63]15

DDR_A_MA[0..14] 15

DDR_A_DQS#[0..7] 15

DDR_A_DQS[0..7] 15

DDR_A_DM[0..7] 15

DDR_A_CAS# 15

DDR_A_RAS# 15

DDR_A_WE# 15

DDR_B_D[0..63]16

DDR_B_BS0 16

DDR_B_BS1 16

DDR_B_BS2 16

DDR_B_CAS# 16

DDR_B_RAS# 16

DDR_B_WE# 16

DDR_B_DM[0..7] 16

DDR_B_DQS[0..7] 16

DDR_B_DQS#[0..7] 16

DDR_B_MA[0..14] 16

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(2/6)-DDR2 A/B CH

Custom

10 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(2/6)-DDR2 A/B CH

Custom

10 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(2/6)-DDR2 A/B CH

Custom

10 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

DDR SYSTEM MEMORY B

U2E

CANTIGA ES_FCBGA1329

DDR SYSTEM MEMORY B

U2E

CANTIGA ES_FCBGA1329

SB_DQ_0

AK47

SB_DQ_1

AH46

SB_DQ_10

BA48

SB_DQ_11

AY48

SB_DQ_12

AT47

SB_DQ_13

AR47

SB_DQ_14

BA47

SB_DQ_15

BC47

SB_DQ_16

BC46

SB_DQ_17

BC44

SB_DQ_18

BG43

SB_DQ_19

BF43

SB_DQ_2

AP47

SB_DQ_20

BE45

SB_DQ_21

BC41

SB_DQ_22

BF40

SB_DQ_23

BF41

SB_DQ_24

BG38

SB_DQ_25

BF38

SB_DQ_26

BH35

SB_DQ_27

BG35

SB_DQ_28

BH40

SB_DQ_29

BG39

SB_DQ_3

AP46

SB_DQ_30

BG34

SB_DQ_31

BH34

SB_DQ_32

BH14

SB_DQ_33

BG12

SB_DQ_34

BH11

SB_DQ_35

BG8

SB_DQ_36

BH12

SB_DQ_37

BF11

SB_DQ_38

BF8

SB_DQ_39

BG7

SB_DQ_4

AJ46

SB_DQ_40

BC5

SB_DQ_41

BC6

SB_DQ_42

AY3

SB_DQ_43

AY1

SB_DQ_44

BF6

SB_DQ_45

BF5

SB_DQ_46

BA1

SB_DQ_47

BD3

SB_DQ_48

AV2

SB_DQ_49

AU3

SB_DQ_5

AJ48

SB_DQ_50

AR3

SB_DQ_51

AN2

SB_DQ_52

AY2

SB_DQ_53

AV1

SB_DQ_54

AP3

SB_DQ_55

AR1

SB_DQ_56

AL1

SB_DQ_57

AL2

SB_DQ_58

AJ1

SB_DQ_59

AH1

SB_DQ_6

AM48

SB_DQ_60

AM2

SB_DQ_61

AM3

SB_DQ_62

AH3

SB_DQ_63

AJ3

SB_DQ_7

AP48

SB_DQ_8

AU47

SB_DQ_9

AU46

SB_BS_0 BC16

SB_BS_1 BB17

SB_BS_2 BB33

SB_CAS# BG16

SB_DM_0 AM47

SB_DM_1 AY47

SB_DM_2 BD40

SB_DM_3 BF35

SB_DM_4 BG11

SB_DM_5 BA3

SB_DM_6 AP1

SB_DM_7 AK2

SB_DQS_0 AL47

SB_DQS_1 AV48

SB_DQS_2 BG41

SB_DQS_3 BG37

SB_DQS_4 BH9

SB_DQS_5 BB2

SB_DQS_6 AU1

SB_DQS_7 AN6

SB_DQS#_0 AL46

SB_DQS#_1 AV47

SB_DQS#_2 BH41

SB_DQS#_3 BH37

SB_DQS#_4 BG9

SB_DQS#_5 BC2

SB_DQS#_6 AT2

SB_DQS#_7 AN5

SB_MA_0 AV17

SB_MA_1 BA25

SB_MA_10 BB16

SB_MA_11 AW33

SB_MA_12 AY33

SB_MA_13 BH15

SB_MA_2 BC25

SB_MA_3 AU25

SB_MA_4 AW25

SB_MA_5 BB28

SB_MA_6 AU28

SB_MA_7 AW28

SB_MA_8 AT33

SB_MA_9 BD33

SB_MA_14 AU33

SB_RAS# AU17

SB_WE# BF14

DDR SYSTEM MEMORY A

U2D

CANTIGA ES_FCBGA1329

DDR SYSTEM MEMORY A

U2D

CANTIGA ES_FCBGA1329

SA_DQ_0

AJ38

SA_DQ_1

AJ41

SA_DQ_10

AU40

SA_DQ_11

AT38

SA_DQ_12

AN41

SA_DQ_13

AN39

SA_DQ_14

AU44

SA_DQ_15

AU42

SA_DQ_16

AV39

SA_DQ_17

AY44

SA_DQ_18

BA40

SA_DQ_19

BD43

SA_DQ_2

AN38

SA_DQ_20

AV41

SA_DQ_21

AY43

SA_DQ_22

BB41

SA_DQ_23

BC40

SA_DQ_24

AY37

SA_DQ_25

BD38

SA_DQ_26

AV37

SA_DQ_27

AT36

SA_DQ_28

AY38

SA_DQ_29

BB38

SA_DQ_3

AM38

SA_DQ_30

AV36

SA_DQ_31

AW36

SA_DQ_32

BD13

SA_DQ_33

AU11

SA_DQ_34

BC11

SA_DQ_35

BA12

SA_DQ_36

AU13

SA_DQ_37

AV13

SA_DQ_38

BD12

SA_DQ_39

BC12

SA_DQ_4

AJ36

SA_DQ_40

BB9

SA_DQ_41

BA9

SA_DQ_42

AU10

SA_DQ_43

AV9

SA_DQ_44

BA11

SA_DQ_45

BD9

SA_DQ_46

AY8

SA_DQ_47

BA6

SA_DQ_48

AV5

SA_DQ_49

AV7

SA_DQ_5

AJ40

SA_DQ_50

AT9

SA_DQ_51

AN8

SA_DQ_52

AU5

SA_DQ_53

AU6

SA_DQ_54

AT5

SA_DQ_55

AN10

SA_DQ_56

AM11

SA_DQ_57

AM5

SA_DQ_58

AJ9

SA_DQ_59

AJ8

SA_DQ_6

AM44

SA_DQ_60

AN12

SA_DQ_61

AM13

SA_DQ_62

AJ11

SA_DQ_63

AJ12

SA_DQ_7

AM42

SA_DQ_8

AN43

SA_DQ_9

AN44

SA_BS_0 BD21

SA_BS_1 BG18

SA_BS_2 AT25

SA_CAS# BD20

SA_DM_0 AM37

SA_DM_1 AT41

SA_DM_2 AY41

SA_DM_3 AU39

SA_DM_4 BB12

SA_DM_5 AY6

SA_DM_6 AT7

SA_DQS_0 AJ44

SA_DQS_1 AT44

SA_DQS_2 BA43

SA_DQS_3 BC37

SA_DQS_4 AW12

SA_DQS_5 BC8

SA_DQS_6 AU8

SA_DQS_7 AM7

SA_DM_7 AJ5

SA_DQS#_0 AJ43

SA_DQS#_1 AT43

SA_DQS#_2 BA44

SA_DQS#_3 BD37

SA_DQS#_4 AY12

SA_DQS#_5 BD8

SA_DQS#_6 AU9

SA_DQS#_7 AM8

SA_MA_0 BA21

SA_MA_1 BC24

SA_MA_10 BC21

SA_MA_11 BG26

SA_MA_12 BH26

SA_MA_13 BH17

SA_MA_2 BG24

SA_MA_3 BH24

SA_MA_4 BG25

SA_MA_5 BA24

SA_MA_6 BD24

SA_MA_7 BG27

SA_MA_8 BF25

SA_MA_9 AW24

SA_RAS# BB20

SA_WE# AY20

SA_MA_14 AY25

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CFG5

PEG_RXN4

PEG_TXN5

PEG_RXN7

PEG_RXN6

PEG_RXN5

PEG_TXN7

PEG_RXP4

PEG_RXP7

PEG_RXP6

PEG_RXP5

PEG_RXP14

PEG_RXP12

PEG_RXP3

PEG_RXP2

PEG_RXP0

PEG_RXP13

PEG_RXP15

PEG_RXP10

PEG_RXP8

PEG_RXP1

PEG_RXP9

PEG_RXP11

PEG_TXN13

PEG_TXN14

PEG_TXN15

PEG_TXN12

PEG_RXN0

PEG_RXN12

PEG_RXN3

PEG_RXN2

PEG_RXN10

PEG_RXN8

PEG_RXN13

PEG_RXN15

PEG_RXN14

PEG_TXN9

PEG_RXN9

PEG_RXN11

PEG_TXN6

PEG_TXN10

PEG_TXN11

PEG_TXN8

PEG_TXP13

PEG_TXP7

PEG_TXN4

PEG_TXP5

PEG_TXP6

PEG_TXP12

PEG_TXP14

PEG_TXP15

PEG_TXP11

PEG_TXP9

PEG_TXP8

PEG_TXP10

PEG_TXP4

PEG_TXP1

PEG_TXP0

PEG_TXP2

PEG_TXN0

PEG_TXP3

PEG_TXN1

PEG_RXN1

PEG_TXN3

PEG_TXN2

CFG59

CFG69

CFG79

CFG89

CFG99

CFG109

CFG119

CFG129

CFG139

CFG149

CFG159

CFG179

CFG189

CFG169

CFG199

CFG209

PEG_M_TXN3 20

PEG_M_TXN2 20

PEG_M_TXN1 20

PEG_M_TXN0 20

PEG_M_TXP2 20

PEG_M_TXP3 20

PEG_M_TXP1 20

PEG_M_TXP0 20

PEG_RXN3 20

PEG_RXN2 20

PEG_RXN1 20

PEG_RXN0 20

PEG_RXN5 20

PEG_RXN7 20

PEG_RXN6 20

PEG_RXN4 20

PEG_RXN13 20

PEG_RXN15 20

PEG_RXN14 20

PEG_RXN12 20

PEG_RXN9 20

PEG_RXN11 20

PEG_RXN10 20

PEG_RXN8 20

PEG_RXP5 20

PEG_RXP7 20

PEG_RXP6 20

PEG_RXP4 20

PEG_RXP12 20

PEG_RXP3 20

PEG_RXP2 20

PEG_RXP0 20

PEG_RXP8 20

PEG_RXP13 20

PEG_RXP15 20

PEG_RXP14 20

PEG_RXP1 20

PEG_RXP9 20

PEG_RXP11 20

PEG_RXP10 20

PEG_M_TXN7 20

PEG_M_TXN6 20

PEG_M_TXN5 20

PEG_M_TXN4 20

PEG_M_TXN10 20

PEG_M_TXN9 20

PEG_M_TXN8 20

PEG_M_TXN14 20

PEG_M_TXN13 20

PEG_M_TXN12 20

PEG_M_TXN11 20

PEG_M_TXP6 20

PEG_M_TXP5 20

PEG_M_TXP4 20

PEG_M_TXN15 20

PEG_M_TXP10 20

PEG_M_TXP9 20

PEG_M_TXP8 20

PEG_M_TXP7 20

PEG_M_TXP13 20

PEG_M_TXP12 20

PEG_M_TXP11 20

PEG_M_TXP15 20

PEG_M_TXP14 20

+VCC_PEG

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(3/6)-VGA/LVDS/TV

Custom

11 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(3/6)-VGA/LVDS/TV

Custom

11 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(3/6)-VGA/LVDS/TV

Custom

11 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

PEGCOMP trace width

and spacing is 20/25 mils.

000 = FSB 1066MHz

CFG[4:3]

Reserved

CFG6

0 = The iTPM Host Interface is enable

1 = The iTPM Host Interface is disable

*

Reserved

CFG10

(Default)11 = Normal Operation

10 = All Z Mode Enabled

00 = Reserved

01 = XOR Mode Enabled

*

0 = Enable

1 = Disable

*

CFG9 (PCIE Graphics

Lane Reversal)

CFG[2:0] FSB Freq

select

Reserved

Reserved

CFG[15:14]

Strap Pin Table

Reserved

CFG[18:17]

(Lane number in Order)

Others = Reserved

011 = FSB 667MHz

010 = FSB 800MHz

*

1 = Reverse Lane

0 = Reverse Lane,15->0, 14->1

1 = Enabled

0 = Normal Operation

0 = Disabled

*

0 = DMI x 2

*

*

*

1 = PCIE/SDVO are operating simu.

0 = Only PCIE or SDVO is operational.

*

1 = Normal Operation,Lane Number in

order

1 = DMI x 4

0 =(TLS)chiper suite with no confidentiality

1 =(TLS)chiper suite with confidentiality

CFG5 (DMI select)

CFG19 (DMI Lane Reversal)

CFG16 (FSB Dynamic ODT)

CFG7

CFG20

CFG11

CFG[13:12] (XOR/ALLZ)

CFG8

(Intel Management

Engine Crypto strap)

(PCIE

Lookback

enable)

(PCIE/SDVO

concurrent)

R71

4.02K_0402_1%

R71

4.02K_0402_1%

12

C1315 0.1U_0402_16V4ZC1315 0.1U_0402_16V4Z

1 2

R81 2.21K_0402_1%

R81 2.21K_0402_1%

1 2

C1303 0.1U_0402_16V4ZC1303 0.1U_0402_16V4Z

1 2

R77 2.21K_0402_1%

R77 2.21K_0402_1%

1 2

R73 4.02K_0402_1%

@ R73 4.02K_0402_1%

@

1 2

C1295 0.1U_0402_16V4ZC1295 0.1U_0402_16V4Z

1 2

C1293 0.1U_0402_16V4ZC1293 0.1U_0402_16V4Z

1 2

C1313 0.1U_0402_16V4ZC1313 0.1U_0402_16V4Z

1 2

C1304 0.1U_0402_16V4ZC1304 0.1U_0402_16V4Z

1 2

R74

2.21K_0402_1%

@

R74

2.21K_0402_1%

@

12

C1296 0.1U_0402_16V4ZC1296 0.1U_0402_16V4Z

1 2

R72 4.02K_0402_1%

R72 4.02K_0402_1%

1 2

R82 2.21K_0402_1%

@R82 2.21K_0402_1%

@

1 2

C1292 0.1U_0402_16V4ZC1292 0.1U_0402_16V4Z

1 2

C1294 0.1U_0402_16V4ZC1294 0.1U_0402_16V4Z

1 2

C1310 0.1U_0402_16V4ZC1310 0.1U_0402_16V4Z

1 2

R75 4.02K_0402_1%

@R75 4.02K_0402_1%

@

1 2

C1309 0.1U_0402_16V4ZC1309 0.1U_0402_16V4Z

1 2

C1298 0.1U_0402_16V4ZC1298 0.1U_0402_16V4Z

1 2

C1300 0.1U_0402_16V4ZC1300 0.1U_0402_16V4Z

1 2

C1297 0.1U_0402_16V4ZC1297 0.1U_0402_16V4Z

1 2

C1314 0.1U_0402_16V4ZC1314 0.1U_0402_16V4Z

1 2

R84 2.21K_0402_1%

@R84 2.21K_0402_1%

@

1 2

C1316 0.1U_0402_16V4ZC1316 0.1U_0402_16V4Z

1 2

C1305 0.1U_0402_16V4ZC1305 0.1U_0402_16V4Z

1 2

C1320 0.1U_0402_16V4ZC1320 0.1U_0402_16V4Z

1 2

C1312 0.1U_0402_16V4ZC1312 0.1U_0402_16V4Z

1 2

R76 2.21K_0402_1%

@R76 2.21K_0402_1%

@

1 2

C1319 0.1U_0402_16V4ZC1319 0.1U_0402_16V4Z

1 2

C1289 0.1U_0402_16V4ZC1289 0.1U_0402_16V4Z

1 2

R85 2.21K_0402_1%

@R85 2.21K_0402_1%

@

1 2

C1306 0.1U_0402_16V4ZC1306 0.1U_0402_16V4Z

1 2

C1317 0.1U_0402_16V4ZC1317 0.1U_0402_16V4Z

1 2

C1302 0.1U_0402_16V4ZC1302 0.1U_0402_16V4Z

1 2

C1299 0.1U_0402_16V4ZC1299 0.1U_0402_16V4Z

1 2

R83 2.21K_0402_1%

@R83 2.21K_0402_1%

@

1 2

C1307 0.1U_0402_16V4ZC1307 0.1U_0402_16V4Z

1 2

R79 2.21K_0402_1%

@R79 2.21K_0402_1%

@

1 2

C1318 0.1U_0402_16V4ZC1318 0.1U_0402_16V4Z

1 2

C1291 0.1U_0402_16V4ZC1291 0.1U_0402_16V4Z

1 2

R87 2.21K_0402_1%

@R87 2.21K_0402_1%

@

1 2

C1308 0.1U_0402_16V4ZC1308 0.1U_0402_16V4Z

1 2

R57

49.9_0402_1%

R57

49.9_0402_1%

1 2

R78 2.21K_0402_1%

R78 2.21K_0402_1%

1 2

C1301 0.1U_0402_16V4ZC1301 0.1U_0402_16V4Z

1 2

LVDS

PCI-EXPRESS GRAPHICS

TV VGA

U2C

CANTIGA ES_FCBGA1329

LVDS

PCI-EXPRESS GRAPHICS

TV VGA

U2C

CANTIGA ES_FCBGA1329

PEG_COMPI T37

PEG_COMPO T36

PEG_RX#_0 H44

PEG_RX#_1 J46

PEG_RX#_2 L44

PEG_RX#_3 L40

PEG_RX#_4 N41

PEG_RX#_5 P48

PEG_RX#_6 N44

PEG_RX#_7 T43

PEG_RX#_8 U43

PEG_RX#_9 Y43

PEG_RX#_10 Y48

PEG_RX#_11 Y36

PEG_RX#_12 AA43

PEG_RX#_13 AD37

PEG_RX#_14 AC47

PEG_RX#_15 AD39

PEG_RX_0 H43

PEG_RX_1 J44

PEG_RX_2 L43

PEG_RX_3 L41

PEG_RX_4 N40

PEG_RX_5 P47

PEG_RX_6 N43

PEG_RX_7 T42

PEG_RX_8 U42

PEG_RX_9 Y42

PEG_RX_10 W47

PEG_RX_11 Y37

PEG_RX_12 AA42

PEG_RX_13 AD36

PEG_RX_14 AC48

PEG_RX_15 AD40

PEG_TX#_0 J41

PEG_TX#_10 Y40

PEG_TX#_3 M40

PEG_TX#_4 M42

PEG_TX#_5 R48

PEG_TX#_6 N38

PEG_TX#_7 T40

PEG_TX#_8 U37

PEG_TX#_9 U40

PEG_TX#_1 M46

PEG_TX#_11 AA46

PEG_TX#_12 AA37

PEG_TX#_13 AA40

PEG_TX#_14 AD43

PEG_TX#_15 AC46

PEG_TX#_2 M47

PEG_TX_0 J42

PEG_TX_1 L46

PEG_TX_2 M48

PEG_TX_3 M39

PEG_TX_4 M43

PEG_TX_5 R47

PEG_TX_6 N37

PEG_TX_7 T39

PEG_TX_8 U36

PEG_TX_9 U39

PEG_TX_10 Y39

PEG_TX_11 Y46

PEG_TX_12 AA36

PEG_TX_13 AA39

PEG_TX_14 AD42

PEG_TX_15 AD46

L_CTRL_CLK

M32

L_CTRL_DATA

M33

L_DDC_CLK

K33

L_DDC_DATA

J33

L_VDD_EN

M29

LVDS_IBG

C44

LVDS_VBG

B43

LVDS_VREFH

E37

LVDS_VREFL

E38

LVDSA_CLK#

C41

LVDSA_CLK

C40

LVDSA_DATA#_0

H47

LVDSA_DATA#_1

E46

LVDSA_DATA#_2

G40

LVDSA_DATA_1

D45

LVDSA_DATA_2

F40

LVDSB_CLK#

B37

LVDSB_CLK

A37

LVDSB_DATA#_0

A41

LVDSB_DATA#_1

H38

LVDSB_DATA#_2

G37

LVDSB_DATA_1

G38

LVDSB_DATA_2

F37

L_BKLT_EN

G32

TVA_DAC

F25

TVB_DAC

H25

TVC_DAC

K25

TV_RTN

H24

CRT_BLUE

E28

CRT_DDC_CLK

H32

CRT_DDC_DATA

J32

CRT_GREEN

G28

CRT_HSYNC

J29

CRT_TVO_IREF

E29

CRT_RED

J28

CRT_IRTN

G29

CRT_VSYNC

L29

LVDSA_DATA_0

H48

LVDSB_DATA_0

B42

L_BKLT_CTRL

L32

TV_DCONSEL_0

C31

TV_DCONSEL_1

E32

LVDSA_DATA#_3

A40

LVDSA_DATA_3

B40

LVDSB_DATA#_3

J37

LVDSB_DATA_3

K37

R80 2.21K_0402_1%

@R80 2.21K_0402_1%

@

1 2

C1311 0.1U_0402_16V4ZC1311 0.1U_0402_16V4Z

1 2

C1290 0.1U_0402_16V4ZC1290 0.1U_0402_16V4Z

1 2

R86 2.21K_0402_1%

@R86 2.21K_0402_1%

@

1 2

hexainf@hotmail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.05VS_A_SM

+1.05VS_A_SM_CK

+1.05VS_HPLL

+1.05VS_MPLL

+VCCP

+1.05VS_PEGPLL +VCCP

+VCCP

+V1.05VS_AXF

+VCCP

+1.05VS_DMI

+1.8V

+1.8V_SM_CK

+1.5VS

+1.5VS_TVDAC

+VCC_PEG

+VCCP

+1.5VS_PEG_BG

+1.5VS

+1.05VS_PEGPLL

+VCCP

+VCCP

+VCCP

+3VS

+VCCP_D

+3VS_HV

+VCCP

+3VS

+1.05VS_DMI

+VCC_PEG

+3VS_HV

+1.8V_SM_CK

+V1.05VS_AXF

+1.05VS_MPLL

+1.05VS_HPLL

+1.5VS

+1.5VS_TVDAC

+1.05VS_PEGPLL

+1.05VS_HPLL

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(4/6)-PWR

Custom

12 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(4/6)-PWR

Custom

12 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(4/6)-PWR

Custom

12 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

73mA

2.68mA

852mA

64.8mA

720mA

24mA

139.2mA

50mA

414uA

13.2mA

64.8mA

26mA

321.35mA

118.8mA

124mA

105.3mA

1732mA

456mA

TVA 24.15mA

TVB 39.48mA

TVX 24.15mA

26mA

50mA

58.67mA

48.363mA

157.2mA

50mA

60.31mA

C80

0.47U_0603_10V7K

C80

0.47U_0603_10V7K

1

2

D3

CH751H-40PT_SOD323-2

D3

CH751H-40PT_SOD323-2

2 1

C83

10U_0805_10V4Z

@

C83

10U_0805_10V4Z

@

1

2

C79

1U_0603_10V4Z

C79

1U_0603_10V4Z

1

2

R97

0_0603_5%

R97

0_0603_5%

1 2

R96

0_0603_5%

@ R96

0_0603_5%

@

1 2

C104

1U_0603_10V4Z

C104

1U_0603_10V4Z

1

2

C103

10U_0805_10V4Z

C103

10U_0805_10V4Z

1

2

R105

10_0402_5%

R105

10_0402_5%

1 2

C93

0.1U_0402_16V4Z

C93

0.1U_0402_16V4Z

1

2

C96

4.7U_0805_10V4Z

C96

4.7U_0805_10V4Z

1

2

R93

0_0603_5%

R93

0_0603_5%

1 2

C109

0.1U_0402_16V4Z

C109

0.1U_0402_16V4Z

1

2

C100

10U_0805_10V4Z

C100

10U_0805_10V4Z

1

2

C84

10U_0805_10V4Z

C84

10U_0805_10V4Z

1

2

C102

1U_0603_10V4Z

C102

1U_0603_10V4Z

1

2

C99

0.1U_0402_16V4Z

C99

0.1U_0402_16V4Z

1

2

R101

MBK2012121YZF_0805

R101

MBK2012121YZF_0805

1 2

C112

0.47U_0603_10V7K

C112

0.47U_0603_10V7K

1

2

+

C94

220U_D2_4VM

<BOM Structure>

+

C94

220U_D2_4VM

<BOM Structure>

1

2

C108

10U_0805_10V4Z

C108

10U_0805_10V4Z

1

2

C106

0.1U_0402_16V4Z

C106

0.1U_0402_16V4Z

1

2

R104

0_0603_5%

R104

0_0603_5%

1 2

C85

0.1U_0402_16V4Z

C85

0.1U_0402_16V4Z

1

2

+

C98

220U_D2_4VM

+

C98

220U_D2_4VM

1

2

L1

BLM18PG121SN1D_0603

L1

BLM18PG121SN1D_0603

1 2

C107

0.1U_0402_16V4Z

C107

0.1U_0402_16V4Z

1

2

C89

0.1U_0402_16V4Z

C89

0.1U_0402_16V4Z

1

2

C81

4.7U_0805_10V4Z

C81

4.7U_0805_10V4Z

1

2

R106

0_0402_5%

R106

0_0402_5%

1 2

C95

10U_0805_10V4Z

C95

10U_0805_10V4Z

1

2

R100

0_0805_5%

R100

0_0805_5%

1 2

C105

0.1U_0402_16V4Z

C105

0.1U_0402_16V4Z

1

2

C110

0.47U_0603_10V7K

C110

0.47U_0603_10V7K

1

2

C78

10U_0805_10V4Z

C78

10U_0805_10V4Z

1

2

C82

2.2U_0805_16V4Z

C82

2.2U_0805_16V4Z

1

2

C91

10U_0805_10V4Z

C91

10U_0805_10V4Z

1

2

C90

0.1U_0402_16V4Z

C90

0.1U_0402_16V4Z

1

2

C92

0.022U_0402_16V7K

C92

0.022U_0402_16V7K

1

2

+

C71

220U_D2_4VM

+

C71

220U_D2_4VM

1

2

C72

4.7U_0805_10V4Z

C72

4.7U_0805_10V4Z

1

2

C101

10U_0805_10V4Z

C101

10U_0805_10V4Z

1

2

R102

0_0805_5%

R102

0_0805_5%

1 2

C97

1U_0603_10V4Z

C97

1U_0603_10V4Z

1

2

POWER

CRTPLLA PEGA SMTV

D TV/CRT

LVDS

VTTLF PEG SM CK AXF

VTT

DMI

HV

A CK

A LVDSHDA

U2H

CANTIGA ES_FCBGA1329

POWER

CRTPLLA PEGA SMTV

D TV/CRT

LVDS

VTTLF PEG SM CK AXF

VTT

DMI

HV

A CK

A LVDSHDA

U2H

CANTIGA ES_FCBGA1329

VTT V3

VTT U3

VTT V2

VTT U2

VCCA_PEG_BG

AD48

VCCA_PEG_PLL

AA48

VCCA_CRT_DAC

B27

VCCA_CRT_DAC

A26

VCCA_DPLLA

F47

VCCA_DPLLB

L48

VCCA_HPLL

AD1

VCCA_LVDS

J48

VCCA_MPLL

AE1

VCCA_TV_DAC

B24

VCCA_TV_DAC

A24

VCCD_PEG_PLL

AA47

VTT U6

VTT T6

VTT U5

VTT T5

VTT T8

VTT U7

VTT T7

VCCD_HPLL

AF1

VTT U13

VTT T13

VTT T12

VTT U11

VTT T11

VTT U10

VTT T10

VTT U9

VTT T9

VTT U8

VTT U12

VCCA_SM_CK

AP28

VCCA_SM_CK

AN28

VCCA_DAC_BG

A25

VCCD_TVDAC

M25

VTTLF A8

VTTLF L1

VTTLF AB2

VCC_DMI AH48

VCC_DMI AF48

VCC_SM_CK BF21

VCC_SM_CK BH20

VCC_SM_CK BG20

VCC_SM_CK BF20

VCCD_LVDS

M38

VCCD_QDAC

L28

VCC_AXF B22

VCC_AXF B21

VCC_AXF A21

VCCA_SM

AR20

VCCA_SM

AP20

VCCA_SM

AN20

VCCA_SM

AR17

VCCA_SM

AP17

VCCA_SM

AT16

VCCA_SM

AR16

VCCA_SM

AP16

VCC_TX_LVDS K47

VSSA_LVDS

J47

VCC_HV C35

VCC_HV B35

VCC_PEG V48

VCCD_LVDS

L37

VCC_PEG U48

VCC_PEG V47

VCC_PEG U47

VCC_PEG U46

VCCA_SM

AN17

VCCA_SM_CK

AP25

VCCA_SM_CK

AN25

VCCA_SM_CK

AN24

VCCA_SM_CK_NCTF

AM28

VCCA_SM_CK_NCTF

AM26

VCCA_SM_CK_NCTF

AM25

VCCA_SM_CK_NCTF

AL25

VCCA_SM_CK_NCTF

AM24

VCCA_SM_CK_NCTF

AL24

VCCA_SM_CK_NCTF

AM23

VTT T2

VTT V1

VTT U1

VCC_HV A35

VCC_DMI AH47

VCC_DMI AG47

VSSA_DAC_BG

B25

VCCA_SM_CK_NCTF

AL23

VCC_HDA

A32

R98

MBK2012121YZF_0805

R98

MBK2012121YZF_0805

1 2

C111

0.47U_0603_10V7K

C111

0.47U_0603_10V7K

1

2

R103

0_0603_5%

R103

0_0603_5%

1 2

R99

0_0805_5%

R99

0_0805_5%

1 2

R95

0_0805_5%

R95

0_0805_5%

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCSM_LF2

VCCSM_LF3

VCCSM_LF1

VCCSM_LF6

VCCSM_LF7

VCCSM_LF4

VCCSM_LF5

+VCCP

+VCCP

+1.8V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(5/6)-PWR/GND

Custom

13 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(5/6)-PWR/GND

Custom

13 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(5/6)-PWR/GND

Custom

13 51Monday, October 08, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

3000mA

6326.84mA

Extnal Graphic: 1210.34mA

integrated Graphic: 1930.4mA

0317 change value

+

C126

330U_D2E_2.5VM_R7

+

C126

330U_D2E_2.5VM_R7

1

2

C125

0.1U_0402_16V4Z

C125

0.1U_0402_16V4Z

1

2

POWER

VCC NCTF

VCC CORE

U2F

CANTIGA ES_FCBGA1329

POWER

VCC NCTF

VCC CORE

U2F

CANTIGA ES_FCBGA1329

VCC_NCTF AM32

VCC_NCTF AC30

VCC_NCTF AJ29

VCC_NCTF AK25

VCC_NCTF AA32

VCC_NCTF Y32

VCC_NCTF W32

VCC_NCTF U32

VCC_NCTF AM30

VCC_NCTF AL30

VCC_NCTF AK30

VCC_NCTF AG30

VCC_NCTF AF30

VCC_NCTF AE30

VCC_NCTF AL32

VCC_NCTF W30

VCC_NCTF V30

VCC_NCTF AK32

VCC_NCTF AH29

VCC_NCTF AG29

VCC_NCTF AE29

VCC_NCTF AL28

VCC_NCTF AK28

VCC_NCTF AL26

VCC_NCTF AK26

VCC_NCTF AJ32

VCC_NCTF AK24

VCC_NCTF AH32

VCC_NCTF AG32

VCC_NCTF AE32

VCC_NCTF AC32

VCC_NCTF AC29

VCC_NCTF AA29

VCC_NCTF Y29

VCC_NCTF W29

VCC_NCTF V29

VCC_NCTF U30

VCC_NCTF AL29

VCC_NCTF AK29

VCC_NCTF AH30

VCC_NCTF AB30

VCC_NCTF AA30

VCC_NCTF Y30

VCC

AG34

VCC

AC34

VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

AG33

VCC

AF33

VCC

AE33

VCC

AC33

VCC

AA33

VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC

AH28

VCC

AF28

VCC

AC28

VCC

AA28

VCC

AJ26

VCC

AG26

VCC

AE26

VCC

AC26

VCC

AH25

VCC

AG25

VCC

AF25

VCC

AG24

VCC

AJ23

VCC

AH23

VCC

AF23

VCC

T32

VCC_NCTF AK23

C143 0.47U_0402_6.3V6KC143 0.47U_0402_6.3V6K

1

2

C133

0.22U_0402_10V4Z

C133

0.22U_0402_10V4Z

1

2

T43PAD T43PAD

C145 1U_0603_10V4ZC145 1U_0603_10V4Z

1

2

+

C131

220U_D2_4VM

+

C131

220U_D2_4VM

1

2

C132

0.22U_0402_10V4Z

C132

0.22U_0402_10V4Z

1

2

C123

0.01U_0402_16V7K

C123

0.01U_0402_16V7K

1

2

C140 0.1U_0402_16V4ZC140 0.1U_0402_16V4Z

1

2

C124

10U_0805_10V4Z

C124

10U_0805_10V4Z

1

2

C141 0.22U_0603_10V7KC141 0.22U_0603_10V7K

1

2

C122

10U_0805_10V4Z

C122

10U_0805_10V4Z

1

2

C144 1U_0603_10V4ZC144 1U_0603_10V4Z

1

2

C142 0.22U_0603_10V7KC142 0.22U_0603_10V7K

1

2

C130

10U_0805_10V4Z

C130

10U_0805_10V4Z

1

2

T42PAD T42PAD

C139 0.1U_0402_16V4ZC139 0.1U_0402_16V4Z

1

2

POWER

VCC SMVCC GFX

VCC GFX NCTF

VCC SM LF

U2G

CANTIGA ES_FCBGA1329

POWER

VCC SMVCC GFX

VCC GFX NCTF

VCC SM LF

U2G

CANTIGA ES_FCBGA1329

VCC_SM

AY32

VCC_SM

BF31

VCC_SM

AW29

VCC_SM

BD32

VCC_SM

BC32

VCC_SM

BB32

VCC_SM

BA32

VCC_SM

AW32

VCC_SM

AV32

VCC_SM

AU32

VCC_SM

AT32

VCC_SM

AR32

VCC_SM

AP32

VCC_SM

AN32

VCC_SM

BH31

VCC_SM

BG31

VCC_SM

AN33

VCC_SM

BG30

VCC_SM

BH29

VCC_SM

BG29

VCC_SM

BF29

VCC_SM

BD29

VCC_SM

BC29

VCC_SM

BB29

VCC_SM

BA29

VCC_SM

AY29

VCC_SM

BH32

VCC_SM

AV29

VCC_SM

AU29

VCC_SM

AT29

VCC_SM

AR29

VCC_AXG_NCTF V23

VCC_AXG_NCTF AM21

VCC_AXG_NCTF AL21

VCC_AXG_NCTF AK21

VCC_AXG_NCTF W21

VCC_AXG_NCTF V21

VCC_AXG_NCTF U21

VCC_AXG_NCTF AM20

VCC_AXG_NCTF AK20

VCC_AXG_NCTF W20

VCC_AXG_NCTF V28

VCC_AXG_NCTF U20

VCC_AXG_NCTF AM19

VCC_AXG_NCTF AL19

VCC_AXG_NCTF AK19

VCC_AXG_NCTF AJ19

VCC_AXG_NCTF AH19

VCC_AXG_NCTF AG19

VCC_AXG_NCTF AF19

VCC_AXG_NCTF AE19

VCC_AXG_NCTF AB19

VCC_AXG_NCTF W26

VCC_AXG_NCTF AA19

VCC_AXG_NCTF Y19

VCC_AXG_NCTF W19

VCC_AXG_NCTF V19

VCC_AXG_NCTF U19

VCC_AXG_NCTF AM17

VCC_AXG_NCTF AK17

VCC_AXG_NCTF AH17

VCC_AXG_NCTF AG17

VCC_AXG_NCTF AF17

VCC_AXG_NCTF V26

VCC_AXG_NCTF AE17

VCC_AXG_NCTF AC17

VCC_AXG_NCTF AB17

VCC_AXG_NCTF Y17

VCC_AXG_NCTF W17

VCC_AXG_NCTF V17

VCC_AXG_NCTF AM16

VCC_AXG_NCTF AL16

VCC_AXG_NCTF AK16

VCC_AXG_NCTF AJ16

VCC_AXG_NCTF W25

VCC_AXG_NCTF AH16

VCC_AXG_NCTF AG16

VCC_AXG_NCTF AF16

VCC_AXG_NCTF AE16

VCC_AXG_NCTF AC16

VCC_AXG_NCTF AB16

VCC_AXG_NCTF AA16

VCC_AXG_NCTF V25

VCC_AXG_NCTF W24

VCC_AXG_NCTF V24

VCC_AXG_NCTF W23

VCC_SM

AP29

VCC_SM

BG32

VCC_SM

BF32

VCC_AXG_NCTF W28

VCC_SM

AP33

VCC_AXG

Y26

VCC_AXG

AE25

VCC_AXG

AB25

VCC_AXG

AA25

VCC_AXG

AE24

VCC_AXG

AC24

VCC_AXG

AA24

VCC_AXG

Y24

VCC_AXG

AE23

VCC_AXG

AC23

VCC_AXG

AB23

VCC_AXG

AA23

VCC_AXG

AJ21

VCC_AXG

AG21

VCC_AXG

AE21

VCC_AXG

AC21

VCC_AXG

AA21

VCC_AXG

Y21

VCC_AXG

AH20

VCC_AXG

AF20

VCC_AXG

AE20

VCC_AXG

AC20

VCC_AXG

AB20

VCC_AXG

AA20

VCC_AXG

T17

VCC_AXG

AM15

VCC_AXG

AL15

VCC_AXG

AJ15

VCC_AXG

AH15

VCC_AXG

AF15

VCC_AXG

AB15

VCC_SM_LF AV44

VCC_SM_LF BA37

VCC_SM_LF AM40

VCC_SM_LF AV21

VCC_SM_LF AY5

VCC_SM_LF AM10

VCC_SM_LF BB13

VCC_AXG

T16

VCC_AXG

AG15

VCC_AXG

AA15

VCC_AXG

Y15

VCC_AXG

V15

VCC_AXG

U15

VCC_AXG

AN14

VCC_AXG

AM14

VCC_AXG

U14

VCC_AXG

T14

VCC_AXG_SENSE

AJ14

VSS_AXG_SENSE

AH14

VCC_AXG_NCTF Y16

VCC_AXG_NCTF W16

VCC_AXG_NCTF V16

VCC_AXG_NCTF U16

VCC_SM/NC

BA36

VCC_SM/NC

BB24

VCC_SM/NC

BD16

VCC_SM/NC

BB21

VCC_SM/NC

AW16

VCC_SM/NC

AW13

VCC_SM/NC

AT13

VCC_AXG

AE15

hexainf@hotmail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(6/6)-PWR/GND

Custom

14 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(6/6)-PWR/GND

Custom

14 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Montevina Consumer Discrete

0.1

Cantiga(6/6)-PWR/GND

Custom

14 51Friday, October 05, 2007

2007/09/26 2007/09/26

Compal Electronics, Inc.

VSS

U2I

CANTIGA ES_FCBGA1329

VSS

U2I

CANTIGA ES_FCBGA1329

VSS

AU48

VSS A23

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

AF47

VSS

AD47

VSS

AB47

VSS

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BD36

VSS AM36

VSS AE36

VSS P36

VSS L36

VSS J36

VSS F36

VSS B36

VSS AH35

VSS AA35

VSS Y35

VSS U35

VSS T35

VSS BF34

VSS AM34

VSS AJ34

VSS AF34

VSS AE34

VSS W34

VSS B34

VSS A34

VSS BG33

VSS BC33

VSS BA33

VSS AV33

VSS AR33

VSS AL33

VSS AH33

VSS AB33

VSS P33

VSS L33

VSS H33

VSS N32

VSS K32

VSS F32

VSS C32

VSS A31

VSS AN29

VSS T29

VSS N29

VSS K29

VSS H29

VSS F29

VSS A29

VSS BG28

VSS BD28

VSS BA28

VSS AV28

VSS AT28

VSS AR28

VSS AJ28

VSS AG28

VSS AE28

VSS AB28

VSS Y28

VSS P28

VSS K28

VSS H28

VSS F28

VSS C28

VSS BF26

VSS AH26

VSS AF26

VSS AB26

VSS AA26

VSS C26

VSS B26

VSS BH25

VSS BD25

VSS BB25

VSS AV25

VSS AR25

VSS AJ25

VSS AC25

VSS Y25

VSS N25

VSS L25

VSS J25

VSS G25

VSS E25

VSS BF24

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

AU36

VSS AT24

VSS AH24

VSS AB24

VSS L24

VSS

AY46

VSS G24

VSS E24

VSS AG23

VSS B23

VSS AY24

VSS AJ24

VSS AF24

VSS R24

VSS K24

VSS J24

VSS F24

VSS BH23

VSS Y23

VSS

AK15

VSS AD12

VSS AJ6

VSS

VSS NCTF

VSS SCB

NC

U2J

CANTIGA ES_FCBGA1329

VSS

VSS NCTF

VSS SCB

NC

U2J

CANTIGA ES_FCBGA1329

VSS

BG21

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17

VSS

M17

VSS

H17

VSS

C17

VSS

BA16

VSS

AU16

VSS

AN16

VSS

N16

VSS

K16

VSS

G16

VSS

E16

VSS

BG15

VSS

W15

VSS

A15

VSS

BG14

VSS

AA14

VSS

C14

VSS

BG13

VSS

BC13

VSS

BA13

VSS

AN13

VSS

AJ13

VSS

AE13

VSS

N13

VSS

L13

VSS

G13

VSS

E13

VSS

BF12

VSS

AV12

VSS

AT12

VSS

AM12

VSS

AA12

VSS

J12

VSS

A12

VSS

BD11

VSS

BB11

VSS

AY11

VSS

AN11

VSS

AH11

VSS

Y11

VSS

N11

VSS

G11

VSS

C11

VSS

BG10

VSS

AV10

VSS

AT10

VSS

AJ10

VSS

AE10

VSS

AA10

VSS

BH8 VSS

B9 VSS

G9 VSS

AD9 VSS

AM9 VSS

AN9 VSS

BC9

VSS

M10

VSS

BF9

VSS AH8

VSS Y8

VSS L8

VSS E8

VSS B8

VSS AY7

VSS AU7

VSS AN7

VSS AJ7

VSS AE7

VSS AA7

VSS N7

VSS J7

VSS BG6

VSS BD6

VSS AV6

VSS AT6

VSS

AC15

VSS AM6

VSS M6

VSS C6

VSS BA5

VSS AH5

VSS AD5

VSS Y5

VSS L5

VSS J5

VSS H5

VSS F5

VSS BE4

VSS BC3

VSS AV3

VSS AL3

VSS_NCTF AF32

VSS_NCTF AB32

VSS_NCTF V32

VSS_NCTF AJ30

VSS_NCTF AM29

VSS_NCTF AF29

VSS_NCTF AB29

VSS_NCTF U26

VSS_NCTF U23

VSS_NCTF AL20

VSS_NCTF V20

VSS_NCTF AC19

VSS_NCTF AL17

VSS_NCTF AJ17

VSS_NCTF AA17

VSS_NCTF U17

VSS_SCB BH48

VSS_SCB BH1

VSS_SCB A48

VSS_SCB C1

VSS_SCB A3

NC E1

NC D2

NC C3

NC B4

NC A5

NC A6

NC A43

NC A44

NC B45

NC C46

NC D47

NC B47

NC A46

NC F48

NC E48

NC C48

NC B48

VSS R3

VSS P3

VSS BA2

VSS AR2

VSS AU2

VSS AP2

VSS F3

VSS AW2

VSS AE2

VSS AF2

VSS AH2

VSS AJ2

VSS AD2

VSS AC2

VSS Y2

VSS M2

VSS K2

VSS AM1

VSS AA1

VSS P1

VSS H1

VSS

BB8

VSS

AV8

VSS

AT8

VSS U24

VSS U28

VSS U25

VSS U29

VSS

L12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

V_DDR_MCH_REF

M_CLK_DDR0

M_CLK_DDR1

M_CLK_DDR#0

M_CLK_DDR#1

DDR_CKE1_DIMMA

DDR_CS0_DIMMA#

CLK_SMBCLK

DDR_A_MA1

DDR_A_MA10

DDR_A_MA3

DDR_A_MA9 DDR_A_MA7

DDR_A_MA12

DDR_A_MA5

DDR_A_WE#

DDR_A_D8

DDR_A_D17

DDR_A_D16

DDR_A_D27

DDR_A_D26

DDR_A_DQS1

DDR_A_DQS0

DDR_A_DQS2

DDR_A_DM3

DDR_A_DM1

DDR_A_DM2

DDR_A_DM0

DDR_A_DQS4

DDR_A_DQS6

DDR_A_DQS7

CLK_SMBDATA

DDR_CKE0_DIMMA

DDR_A_MA8

DDR_CS1_DIMMA#

DDR_A_MA11

DDR_A_MA2

DDR_A_MA0

DDR_A_MA4

DDR_A_MA6

DDR_A_CAS#

DDR_A_BS1

DDR_A_RAS#

DDR_A_D20

DDR_A_D21

DDR_A_D53

DDR_A_D52

DDR_A_D55

DDR_A_DM6

DDR_A_DM4

DDR_A_DM5

DDR_A_DM7

DDR_A_MA13

DDR_A_DQS5

DDR_A_BS0

DDR_A_BS2

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#2

DDR_A_DQS3

DDR_A_DQS#3

DDR_A_DQS#4

DDR_A_DQS#5

DDR_A_DQS#6

DDR_A_DQS#7

M_ODT1

M_ODT0

DDR_A_D51DDR_A_D54

DDR_A_D50

DDR_A_D49

DDR_A_D48

DDR_A_D42

DDR_A_D39

DDR_A_D22

DDR_A_D23

DDR_A_D12

DDR_A_D13

DDR_A_D10 DDR_A_D14

DDR_A_D11 DDR_A_D15

DDR_A_D9

DDR_A_D0

DDR_A_D1

DDR_A_D3

DDR_A_D2

DDR_A_D4

DDR_A_D6

DDR_A_D5

DDR_A_D7

DDR_A_D18

DDR_A_D19

DDR_A_D31

DDR_A_D30

DDR_A_D28DDR_A_D29 DDR_A_D25DDR_A_D24

DDR_A_D36

DDR_A_D38

DDR_A_D37

DDR_A_D35

DDR_A_D32

DDR_A_D33

DDR_A_D34

DDR_A_D44

DDR_A_D45 DDR_A_D40

DDR_A_D41

DDR_A_D46

DDR_A_D60

DDR_A_D61 DDR_A_D57

DDR_A_D56

DDR_A_D58 DDR_A_D63

DDR_A_D59 DDR_A_D62

DDR_A_MA14

DDR_CKE1_DIMMA

DDR_A_MA0

DDR_A_MA4

DDR_A_BS2

DDR_A_BS1

DDR_A_MA6

DDR_CKE0_DIMMA

DDR_A_MA2

DDR_A_MA1

DDR_A_CAS#

DDR_A_RAS#

DDR_A_BS0

DDR_A_MA3

DDR_A_MA10

DDR_CS0_DIMMA#

M_ODT1

DDR_CS1_DIMMA#

DDR_A_WE#

M_ODT0

DDR_A_MA13

DDR_A_MA7

DDR_A_MA14

DDR_A_MA11

DDR_A_D47 DDR_A_D43

DDR_A_MA8

DDR_A_MA5

DDR_A_MA9

DDR_A_MA12

DDR_A_D[0..63]10

DDR_CKE0_DIMMA9

DDR_A_BS210

DDR_A_BS010 DDR_A_WE#10

DDR_A_CAS#10

M_ODT19

DDR_CS1_DIMMA#9

M_CLK_DDR0 9

M_CLK_DDR#0 9

DDR_CKE1_DIMMA 9

DDR_A_BS1 10

DDR_A_RAS# 10

DDR_CS0_DIMMA# 9

M_CLK_DDR#1 9

M_ODT0 9

V_DDR_MCH_REF 9,16

M_CLK_DDR1 9

PM_EXTTS#0 9

CLK_SMBDATA16,17 CLK_SMBCLK16,17

DDR_A_DQS#[0..7]10

DDR_A_DM[0..7]10

DDR_A_DQS[0..7]10

DDR_A_MA[0..14]10

+1.8V

+3VS

+1.8V

+1.8V

+0.9V

+0.9V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMEN