Kinetis SDK V.2.0 API Reference Manual

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Kinetis SDK v.2.0 API Reference Manual

Freescale Semiconductor, Inc.

Document Number: KSDK20APIRM
Rev. 0
Jan 2016

Contents
Chapter

Introduction

Chapter

Driver errors status

Chapter

Architectural Overview

Chapter

Trademarks

Chapter

ADC16: 16-bit SAR Analog-to-Digital Converter Driver

5.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.2
5.2.1
5.2.2

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Polling Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Interrupt Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.3
5.3.1
5.3.2
5.3.3

Data Structure Documentation . . . . . . .
struct adc16_config_t . . . . . . . . . . .
struct adc16_hardware_compare_config_t
struct adc16_channel_config_t . . . . . . .

5.4
5.4.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
FSL_ADC16_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.5
5.5.1
5.5.2
5.5.3
5.5.4
5.5.5
5.5.6
5.5.7
5.5.8

Enumeration Type Documentation .
_adc16_channel_status_flags . . .
_adc16_status_flags . . . . . . . .
adc16_clock_divider_t . . . . . . .
adc16_resolution_t . . . . . . . . .
adc16_clock_source_t . . . . . . .
adc16_long_sample_mode_t . . . .
adc16_reference_voltage_source_t
adc16_hardware_compare_mode_t

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16
16
16
16
17
17
17
17
18

5.6
5.6.1
5.6.2
5.6.3

Function Documentation . .
ADC16_Init . . . . . . . .
ADC16_Deinit . . . . . . .
ADC16_GetDefaultConfig .

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18

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14
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15
16

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

iii

Section
Number
5.6.4
5.6.5
5.6.6
5.6.7
5.6.8
5.6.9
5.6.10
Chapter

Contents
Title
ADC16_EnableHardwareTrigger . .
ADC16_SetHardwareCompareConfig
ADC16_GetStatusFlags . . . . . . .
ADC16_ClearStatusFlags . . . . . .
ADC16_SetChannelConfig . . . . .
ADC16_GetChannelConversionValue
ADC16_GetChannelStatusFlags . . .

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Page
Number
. . . 19
. . . 19
. . . 19
. . . 19
. . . 20
. . . 20
. . . 21

Clock Driver

6.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

6.2

Get frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

6.3

External clock frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.4.5
6.4.6
6.4.7

Multipurpose Clock Generator Lite (MCGLITE)
Overview . . . . . . . . . . . . . . . . . . . . . .
Function description . . . . . . . . . . . . . . . .
Data Structure Documentation . . . . . . . . . . .
Macro Definition Documentation . . . . . . . . .
Enumeration Type Documentation . . . . . . . .
Function Documentation . . . . . . . . . . . . . .
Variable Documentation . . . . . . . . . . . . . .

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24
24
24
29
31
35
37
45

CMP: Analog Comparator Driver

7.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

7.2
7.2.1
7.2.2

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Polling Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Interrupt Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

7.3
7.3.1
7.3.2
7.3.3

Data Structure Documentation
struct cmp_config_t . . . . .
struct cmp_filter_config_t . .
struct cmp_dac_config_t . . .

7.4
7.4.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
FSL_CMP_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 52

7.5
7.5.1
7.5.2
7.5.3
7.5.4

Enumeration Type Documentation
_cmp_interrupt_enable . . . . .
_cmp_status_flags . . . . . . . .
cmp_hysteresis_mode_t . . . . .
cmp_reference_voltage_source_t

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50
50
51
51

52
52
52
52
52

Kinetis SDK v.2.0 API Reference Manual
iv

Freescale Semiconductor

Section
Number
7.6
7.6.1
7.6.2
7.6.3
7.6.4
7.6.5
7.6.6
7.6.7
7.6.8
7.6.9
7.6.10
7.6.11
Chapter

Contents
Function Documentation
CMP_Init . . . . . . . .
CMP_Deinit . . . . . .
CMP_Enable . . . . . .
CMP_GetDefaultConfig
CMP_SetInputChannels
CMP_SetFilterConfig .
CMP_SetDACConfig .
CMP_EnableInterrupts
CMP_DisableInterrupts
CMP_GetStatusFlags .
CMP_ClearStatusFlags

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Title
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Page
Number
. . . 53
. . . 53
. . . 53
. . . 53
. . . 54
. . . 54
. . . 54
. . . 55
. . . 55
. . . 55
. . . 55
. . . 56

CMT: Carrier Modulator Transmitter Driver

8.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

8.2

Clock formulas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

8.3

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

8.4
8.4.1
8.4.2

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
struct cmt_modulate_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
struct cmt_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

8.5
8.5.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
FSL_CMT_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 61

8.6
8.6.1
8.6.2
8.6.3
8.6.4
8.6.5
8.6.6

Enumeration Type Documentation
cmt_mode_t . . . . . . . . . . .
cmt_primary_clkdiv_t . . . . . .
cmt_second_clkdiv_t . . . . . .
cmt_infrared_output_polarity_t .
cmt_infrared_output_state_t . . .
_cmt_interrupt_enable . . . . . .

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61
61
62
62
63
63
63

8.7
8.7.1
8.7.2
8.7.3
8.7.4
8.7.5
8.7.6
8.7.7
8.7.8
8.7.9

Function Documentation . . . . . .
CMT_GetDefaultConfig . . . . . .
CMT_Init . . . . . . . . . . . . .
CMT_Deinit . . . . . . . . . . . .
CMT_SetMode . . . . . . . . . .
CMT_GetMode . . . . . . . . . .
CMT_GetCMTFrequency . . . . .
CMT_SetCarrirGenerateCountOne
CMT_SetCarrirGenerateCountTwo
CMT_SetModulateMarkSpace . .

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63
63
64
64
64
65
66
66
67

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

v

Section
Number
8.7.10
8.7.11
8.7.12
8.7.13
8.7.14
Chapter

Contents
CMT_EnableExtendedSpace
CMT_SetIroState . . . . . .
CMT_EnableInterrupts . . .
CMT_DisableInterrupts . . .
CMT_GetStatusFlags . . . .

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COP: Watchdog Driver

9.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

9.2
9.2.1

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
struct cop_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

9.3
9.3.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
FSL_COP_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 72

9.4
9.4.1
9.4.2

Enumeration Type Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . 72
cop_clock_source_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
cop_timeout_cycles_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

9.5
9.5.1
9.5.2
9.5.3
9.5.4

Function Documentation
COP_GetDefaultConfig
COP_Init . . . . . . . .
COP_Disable . . . . . .
COP_Refresh . . . . .

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73
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74

CRC: Cyclic Redundancy Check Driver

10.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

10.2

CRC Driver Initialization and Configuration . . . . . . . . . . . . . . . . . . . . 75

10.3

CRC Write Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

10.4

CRC Get Checksum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

10.5

Comments about API usage in RTOS . . . . . . . . . . . . . . . . . . . . . . . . 76

10.6

Comments about API usage in interrupt handler . . . . . . . . . . . . . . . . . . 76

10.7

CRC Driver Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

10.8
10.8.1

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
struct crc_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

10.9
10.9.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
FSL_CRC_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Kinetis SDK v.2.0 API Reference Manual

vi

Freescale Semiconductor

Section
Number
10.9.2

Contents

Page
Title
Number
CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT . . . . . . . . . . 81

10.10
10.10.1
10.10.2

Enumeration Type Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . 81
crc_bits_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
crc_result_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

10.11
10.11.1
10.11.2
10.11.3
10.11.4
10.11.5
10.11.6

Function Documentation
CRC_Init . . . . . . . .
CRC_Deinit . . . . . .
CRC_GetDefaultConfig
CRC_WriteData . . . .
CRC_Get32bitResult .
CRC_Get16bitResult .

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82
83

DAC: Digital-to-Analog Converter Driver

11.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

11.2
11.2.1
11.2.2

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
struct dac_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
struct dac_buffer_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

11.3
11.3.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
FSL_DAC_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 89

11.4
11.4.1
11.4.2
11.4.3
11.4.4
11.4.5

Enumeration Type Documentation
_dac_buffer_status_flags . . . . .
_dac_buffer_interrupt_enable . .
dac_reference_voltage_source_t .
dac_buffer_trigger_mode_t . . .
dac_buffer_work_mode_t . . . .

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90

11.5
11.5.1
11.5.2
11.5.3
11.5.4
11.5.5
11.5.6
11.5.7
11.5.8
11.5.9
11.5.10
11.5.11
11.5.12
11.5.13

Function Documentation . . . . .
DAC_Init . . . . . . . . . . . . .
DAC_Deinit . . . . . . . . . . .
DAC_GetDefaultConfig . . . . .
DAC_Enable . . . . . . . . . . .
DAC_EnableBuffer . . . . . . .
DAC_SetBufferConfig . . . . . .
DAC_GetDefaultBufferConfig .
DAC_EnableBufferDMA . . . .
DAC_SetBufferValue . . . . . .
DAC_DoSoftwareTriggerBuffer .
DAC_GetBufferReadPointer . .
DAC_SetBufferReadPointer . . .
DAC_EnableBufferInterrupts . .

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93

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

vii

Section
Number
11.5.14
11.5.15
11.5.16
Chapter

Contents
Title
DAC_DisableBufferInterrupts . . . .
DAC_GetBufferStatusFlags . . . . .
DAC_ClearBufferStatusFlags . . . .

Page
Number
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. . . . . . . . . . . . . . . . . . . . . . . . 93
. . . . . . . . . . . . . . . . . . . . . . . . 94

Debug Console

12.1
12.1.1
12.1.2

Function groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Advanced Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

12.2

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Chapter

DMA: Direct Memory Access Controller Driver

13.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

13.2
13.2.1

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
DMA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

13.3
13.3.1
13.3.2
13.3.3

Data Structure Documentation . .
struct dma_transfer_config_t . .
struct dma_channel_link_config_t
struct dma_handle_t . . . . . . .

13.4
13.4.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
FSL_DMA_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 106

13.5
13.5.1

Typedef Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
dma_callback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

13.6
13.6.1
13.6.2
13.6.3
13.6.4
13.6.5
13.6.6

Enumeration Type Documentation
_dma_channel_status_flags . . .
dma_transfer_size_t . . . . . . .
dma_modulo_t . . . . . . . . . .
dma_channel_link_type_t . . . .
dma_transfer_type_t . . . . . . .
dma_transfer_options_t . . . . .

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106
106
107
107
107
108

13.7
13.7.1
13.7.2
13.7.3
13.7.4
13.7.5
13.7.6
13.7.7

Function Documentation . . .
DMA_Init . . . . . . . . . .
DMA_Deinit . . . . . . . . .
DMA_ResetChannel . . . . .
DMA_SetTransferConfig . .
DMA_SetChannelLinkConfig
DMA_SetSourceAddress . .
DMA_SetDestinationAddress

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108
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110

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104
104
105
105

Kinetis SDK v.2.0 API Reference Manual
viii

Freescale Semiconductor

Section
Number
13.7.8
13.7.9
13.7.10
13.7.11
13.7.12
13.7.13
13.7.14
13.7.15
13.7.16
13.7.17
13.7.18
13.7.19
13.7.20
13.7.21
13.7.22
13.7.23
13.7.24
13.7.25
13.7.26
13.7.27
13.7.28
Chapter

Contents
Title
DMA_SetTransferSize . . . . . . . .
DMA_SetModulo . . . . . . . . . .
DMA_EnableCycleSteal . . . . . . .
DMA_EnableAutoAlign . . . . . . .
DMA_EnableAsyncRequest . . . . .
DMA_EnableInterrupts . . . . . . .
DMA_DisableInterrupts . . . . . . .
DMA_EnableChannelRequest . . . .
DMA_DisableChannelRequest . . .
DMA_TriggerChannelStart . . . . .
DMA_GetRemainingBytes . . . . .
DMA_GetChannelStatusFlags . . . .
DMA_ClearChannelStatusFlags . . .
DMA_CreateHandle . . . . . . . . .
DMA_SetCallback . . . . . . . . . .
DMA_PrepareTransfer . . . . . . . .
DMA_SubmitTransfer . . . . . . . .
DMA_StartTransfer . . . . . . . . .
DMA_StopTransfer . . . . . . . . .
DMA_AbortTransfer . . . . . . . . .
DMA_HandleIRQ . . . . . . . . . .

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Page
Number
. . . 110
. . . 110
. . . 111
. . . 111
. . . 111
. . . 112
. . . 112
. . . 112
. . . 112
. . . 113
. . . 113
. . . 113
. . . 114
. . . 114
. . . 114
. . . 115
. . . 115
. . . 116
. . . 116
. . . 116
. . . 117

DMAMUX: Direct Memory Access Multiplexer Driver

14.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

14.2
14.2.1

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
DMAMUX Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

14.3
14.3.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
FSL_DMAMUX_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . 120

14.4
14.4.1
14.4.2
14.4.3
14.4.4
14.4.5

Function Documentation . . .
DMAMUX_Init . . . . . . .
DMAMUX_Deinit . . . . . .
DMAMUX_EnableChannel .
DMAMUX_DisableChannel
DMAMUX_SetSource . . . .

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120
120
121
121
121
122

DSPI: Serial Peripheral Interface Driver

15.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

15.2
15.2.1

DSPI Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Kinetis SDK v.2.0 API Reference Manual

Freescale Semiconductor

ix

Section
Number
15.2.2
15.2.3
15.2.4
15.2.5
15.2.6
15.2.7

Contents
Title
Typical use case . . . . . . . . . . .
Data Structure Documentation . . . .
Macro Definition Documentation . .
Typedef Documentation . . . . . . .
Enumeration Type Documentation .
Function Documentation . . . . . . .

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Page
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. . . 124
. . . 131
. . . 139
. . . 139
. . . 140
. . . 144

15.3
15.3.1
15.3.2
15.3.3
15.3.4

DSPI DMA Driver . . . . . . .
Overview . . . . . . . . . . .
Data Structure Documentation
Typedef Documentation . . .
Function Documentation . . .

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164
164
165
168
169

15.4
15.4.1
15.4.2
15.4.3
15.4.4

DSPI eDMA Driver . . . . . .
Overview . . . . . . . . . . .
Data Structure Documentation
Typedef Documentation . . .
Function Documentation . . .

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174
174
175
178
179

15.5
15.5.1
15.5.2
15.5.3
15.5.4

DSPI FreeRTOS Driver . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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184
184
184
185
185

15.6
15.6.1
15.6.2
15.6.3
15.6.4

DSPI µCOS/II Driver . . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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187
187
187
188
188

15.7
15.7.1
15.7.2
15.7.3
15.7.4

DSPI µCOS/III Driver . . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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190
190
190
191
191

Chapter

eDMA: Enhanced Direct Memory Access Controller Driver

16.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193

16.2
16.2.1

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
eDMA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193

16.3
16.3.1

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
struct edma_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
Kinetis SDK v.2.0 API Reference Manual

x

Freescale Semiconductor

Section
Number
16.3.2
16.3.3
16.3.4
16.3.5
16.3.6

Contents
Title
struct edma_transfer_config_t . . . . . . .
struct edma_channel_Preemption_config_t
struct edma_minor_offset_config_t . . . .
struct edma_tcd_t . . . . . . . . . . . . .
struct edma_handle_t . . . . . . . . . . .

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Page
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. . . 200
. . . 201
. . . 201
. . . 202

16.4
16.4.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
FSL_EDMA_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . 203

16.5
16.5.1

Typedef Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
edma_callback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203

16.6
16.6.1
16.6.2
16.6.3
16.6.4
16.6.5
16.6.6
16.6.7
16.6.8
16.6.9

Enumeration Type Documentation
edma_transfer_size_t . . . . . .
edma_modulo_t . . . . . . . . .
edma_bandwidth_t . . . . . . . .
edma_channel_link_type_t . . .
_edma_channel_status_flags . . .
_edma_error_status_flags . . . .
edma_interrupt_enable_t . . . . .
edma_transfer_type_t . . . . . .
_edma_transfer_status . . . . . .

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203
203
204
204
205
205
205
205
206
206

16.7
16.7.1
16.7.2
16.7.3
16.7.4
16.7.5
16.7.6
16.7.7
16.7.8
16.7.9
16.7.10
16.7.11
16.7.12
16.7.13
16.7.14
16.7.15
16.7.16
16.7.17
16.7.18
16.7.19
16.7.20
16.7.21

Function Documentation . . . . . . . .
EDMA_Init . . . . . . . . . . . . . .
EDMA_Deinit . . . . . . . . . . . . .
EDMA_GetDefaultConfig . . . . . . .
EDMA_ResetChannel . . . . . . . . .
EDMA_SetTransferConfig . . . . . .
EDMA_SetMinorOffsetConfig . . . .
EDMA_SetChannelPreemptionConfig
EDMA_SetChannelLink . . . . . . . .
EDMA_SetBandWidth . . . . . . . .
EDMA_SetModulo . . . . . . . . . .
EDMA_EnableAutoStopRequest . . .
EDMA_EnableChannelInterrupts . . .
EDMA_DisableChannelInterrupts . . .
EDMA_TcdReset . . . . . . . . . . .
EDMA_TcdSetTransferConfig . . . .
EDMA_TcdSetMinorOffsetConfig . .
EDMA_TcdSetChannelLink . . . . . .
EDMA_TcdSetBandWidth . . . . . .
EDMA_TcdSetModulo . . . . . . . .
EDMA_TcdEnableAutoStopRequest .
EDMA_TcdEnableInterrupts . . . . .

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206
206
206
206
207
207
208
208
209
209
210
210
210
211
211
211
213
213
214
214
215
215

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Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xi

Section
Number
16.7.22
16.7.23
16.7.24
16.7.25
16.7.26
16.7.27
16.7.28
16.7.29
16.7.30
16.7.31
16.7.32
16.7.33
16.7.34
16.7.35
16.7.36
16.7.37
16.7.38
Chapter

Contents
Title
EDMA_TcdDisableInterrupts . . . .
EDMA_EnableChannelRequest . . .
EDMA_DisableChannelRequest . .
EDMA_TriggerChannelStart . . . .
EDMA_GetRemainingBytes . . . .
EDMA_GetErrorStatusFlags . . . .
EDMA_GetChannelStatusFlags . . .
EDMA_ClearChannelStatusFlags . .
EDMA_CreateHandle . . . . . . . .
EDMA_InstallTCDMemory . . . . .
EDMA_SetCallback . . . . . . . . .
EDMA_PrepareTransfer . . . . . . .
EDMA_SubmitTransfer . . . . . . .
EDMA_StartTransfer . . . . . . . .
EDMA_StopTransfer . . . . . . . .
EDMA_AbortTransfer . . . . . . . .
EDMA_HandleIRQ . . . . . . . . .

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Page
Number
. . . 215
. . . 215
. . . 216
. . . 216
. . . 216
. . . 217
. . . 217
. . . 217
. . . 218
. . . 218
. . . 218
. . . 219
. . . 219
. . . 220
. . . 220
. . . 220
. . . 221

ENET: Ethernet MAC Driver

17.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223

17.2
17.2.1

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
ENET Initialization, receive, and transmit operation . . . . . . . . . . . . . . . . 223

17.3
17.3.1
17.3.2
17.3.3
17.3.4
17.3.5
17.3.6

Data Structure Documentation
struct enet_rx_bd_struct_t . .
struct enet_tx_bd_struct_t . .
struct enet_data_error_stats_t
struct enet_buffer_config_t .
struct enet_config_t . . . . .
struct _enet_handle . . . . .

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231
231
231
232
232
233
235

17.4
17.4.1
17.4.2
17.4.3
17.4.4
17.4.5
17.4.6
17.4.7
17.4.8
17.4.9
17.4.10
17.4.11

Macro Definition Documentation . . . . . . . . . . . . . . . .
FSL_ENET_DRIVER_VERSION . . . . . . . . . . . . . .
ENET_BUFFDESCRIPTOR_RX_EMPTY_MASK . . . . .
ENET_BUFFDESCRIPTOR_RX_SOFTOWNER1_MASK .
ENET_BUFFDESCRIPTOR_RX_WRAP_MASK . . . . . .
ENET_BUFFDESCRIPTOR_RX_SOFTOWNER2_Mask . .
ENET_BUFFDESCRIPTOR_RX_LAST_MASK . . . . . .
ENET_BUFFDESCRIPTOR_RX_MISS_MASK . . . . . .
ENET_BUFFDESCRIPTOR_RX_BROADCAST_MASK . .
ENET_BUFFDESCRIPTOR_RX_MULTICAST_MASK . .
ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK
ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK . . .

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236
236
238
238
238
238
238
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238
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238
238

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Kinetis SDK v.2.0 API Reference Manual
xii

Freescale Semiconductor

Section
Number
17.4.12
17.4.13
17.4.14
17.4.15
17.4.16
17.4.17
17.4.18
17.4.19
17.4.20
17.4.21
17.4.22
17.4.23
17.4.24
17.4.25
17.4.26
17.4.27

Contents
Title
ENET_BUFFDESCRIPTOR_RX_CRC_MASK . . . . . . .
ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK . . .
ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK . . . . .
ENET_BUFFDESCRIPTOR_TX_READY_MASK . . . . .
ENET_BUFFDESCRIPTOR_TX_SOFTOWENER1_MASK
ENET_BUFFDESCRIPTOR_TX_WRAP_MASK . . . . . .
ENET_BUFFDESCRIPTOR_TX_SOFTOWENER2_MASK
ENET_BUFFDESCRIPTOR_TX_LAST_MASK . . . . . .
ENET_BUFFDESCRIPTOR_TX_TRANMITCRC_MASK .
ENET_BUFFDESCRIPTOR_RX_ERR_MASK . . . . . . .
ENET_FRAME_MAX_FRAMELEN . . . . . . . . . . . . .
ENET_FRAME_MAX_VALNFRAMELEN . . . . . . . . .
ENET_FIFO_MIN_RX_FULL . . . . . . . . . . . . . . . .
ENET_RX_MIN_BUFFERSIZE . . . . . . . . . . . . . . .
ENET_BUFF_ALIGNMENT . . . . . . . . . . . . . . . . .
ENET_PHY_MAXADDRESS . . . . . . . . . . . . . . . .

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Page
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. . . 238
. . . 238
. . . 238
. . . 238
. . . 238
. . . 238
. . . 239
. . . 239
. . . 239
. . . 239
. . . 239
. . . 239

17.5
17.5.1

Typedef Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
enet_callback_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239

17.6
17.6.1
17.6.2
17.6.3
17.6.4
17.6.5
17.6.6
17.6.7
17.6.8
17.6.9
17.6.10
17.6.11

Enumeration Type Documentation
_enet_status . . . . . . . . . . .
enet_mii_mode_t . . . . . . . . .
enet_mii_speed_t . . . . . . . .
enet_mii_duplex_t . . . . . . . .
enet_mii_write_t . . . . . . . . .
enet_mii_read_t . . . . . . . . .
enet_special_control_flag_t . . .
enet_interrupt_enable_t . . . . .
enet_event_t . . . . . . . . . . .
enet_tx_accelerator_t . . . . . .
enet_rx_accelerator_t . . . . . .

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239
239
239
240
240
240
240
240
241
241
242
242

17.7
17.7.1
17.7.2
17.7.3
17.7.4
17.7.5
17.7.6
17.7.7
17.7.8
17.7.9
17.7.10
17.7.11

Function Documentation .
ENET_GetDefaultConfig
ENET_Init . . . . . . . .
ENET_Deinit . . . . . .
ENET_Reset . . . . . . .
ENET_SetMII . . . . . .
ENET_SetSMI . . . . . .
ENET_GetSMI . . . . .
ENET_ReadSMIData . .
ENET_StartSMIRead . .
ENET_StartSMIWrite . .
ENET_SetMacAddr . . .

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245

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Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xiii

Section
Number
17.7.12
17.7.13
17.7.14
17.7.15
17.7.16
17.7.17
17.7.18
17.7.19
17.7.20
17.7.21
17.7.22
17.7.23
17.7.24
17.7.25
17.7.26
17.7.27
17.7.28
17.7.29
Chapter

Contents
Title
ENET_GetMacAddr . . . . . . . . .
ENET_AddMulticastGroup . . . . .
ENET_LeaveMulticastGroup . . . .
ENET_ActiveRead . . . . . . . . . .
ENET_EnableSleepMode . . . . . .
ENET_GetAccelFunction . . . . . .
ENET_EnableInterrupts . . . . . . .
ENET_DisableInterrupts . . . . . . .
ENET_GetInterruptStatus . . . . . .
ENET_ClearInterruptStatus . . . . .
ENET_SetCallback . . . . . . . . .
ENET_GetRxErrBeforeReadFrame .
ENET_GetRxFrameSize . . . . . . .
ENET_ReadFrame . . . . . . . . . .
ENET_SendFrame . . . . . . . . . .
ENET_TransmitIRQHandler . . . .
ENET_ReceiveIRQHandler . . . . .
ENET_ErrorIRQHandler . . . . . .

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Page
Number
. . . 246
. . . 246
. . . 246
. . . 246
. . . 247
. . . 247
. . . 247
. . . 248
. . . 248
. . . 248
. . . 249
. . . 249
. . . 250
. . . 250
. . . 251
. . . 251
. . . 252
. . . 252

EWM: External Watchdog Monitor Driver

18.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253

18.2
18.2.1

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254
struct ewm_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254

18.3
18.3.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 254
FSL_EWM_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 254

18.4
18.4.1
18.4.2

Enumeration Type Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . 254
_ewm_interrupt_enable_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254
_ewm_status_flags_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255

18.5
18.5.1
18.5.2
18.5.3
18.5.4
18.5.5
18.5.6
18.5.7

Function Documentation .
EWM_Init . . . . . . . .
EWM_Deinit . . . . . . .
EWM_GetDefaultConfig
EWM_EnableInterrupts .
EWM_DisableInterrupts .
EWM_GetStatusFlags . .
EWM_Refresh . . . . . .

Chapter
19.1

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255
255
255
255
256
256
256
257

C90TFS Flash Driver
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259
Kinetis SDK v.2.0 API Reference Manual

xiv

Freescale Semiconductor

Contents

Section
Number
19.2
19.2.1
19.2.2
19.2.3
19.2.4
19.2.5

Title
Data Structure Documentation . . . . . . . . .
struct flash_execute_in_ram_function_config_t
struct flash_swap_state_config_t . . . . . . . .
struct flash_swap_ifr_field_config_t . . . . . .
struct flash_operation_config_t . . . . . . . .
struct flash_config_t . . . . . . . . . . . . . .

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Page
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. . . 266
. . . 266
. . . 267
. . . 267
. . . 268
. . . 269

19.3
19.3.1
19.3.2
19.3.3
19.3.4
19.3.5
19.3.6
19.3.7
19.3.8

Macro Definition Documentation . . . . . . . . . . . . . . . .
MAKE_VERSION . . . . . . . . . . . . . . . . . . . . . .
FSL_FLASH_DRIVER_VERSION . . . . . . . . . . . . . .
FLASH_SSD_CONFIG_ENABLE_FLEXNVM_SUPPORT
FLASH_DRIVER_IS_FLASH_RESIDENT . . . . . . . . .
FLASH_DRIVER_IS_EXPORTED . . . . . . . . . . . . . .
kStatusGroupGeneric . . . . . . . . . . . . . . . . . . . . .
MAKE_STATUS . . . . . . . . . . . . . . . . . . . . . . .
FOUR_CHAR_CODE . . . . . . . . . . . . . . . . . . . . .

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270
270
270
270
270
270
271
271
271

19.4
19.4.1
19.4.2
19.4.3
19.4.4
19.4.5
19.4.6
19.4.7
19.4.8
19.4.9
19.4.10
19.4.11
19.4.12
19.4.13
19.4.14
19.4.15
19.4.16
19.4.17

Enumeration Type Documentation . . . . .
_flash_driver_version_constants . . . . . .
_flash_status . . . . . . . . . . . . . . . .
_flash_driver_api_keys . . . . . . . . . . .
flash_margin_value_t . . . . . . . . . . .
flash_security_state_t . . . . . . . . . . .
flash_protection_state_t . . . . . . . . . .
flash_execute_only_access_state_t . . . .
flash_property_tag_t . . . . . . . . . . . .
_flash_execute_in_ram_function_constants
flash_read_resource_option_t . . . . . . .
_flash_read_resource_range . . . . . . . .
flash_flexram_function_option_t . . . . .
flash_swap_function_option_t . . . . . . .
flash_swap_control_option_t . . . . . . .
flash_swap_state_t . . . . . . . . . . . . .
flash_swap_block_status_t . . . . . . . . .
flash_partition_flexram_load_option_t . .

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271
271
271
272
272
272
272
272
273
273
273
274
274
274
274
275
275
275

19.5
19.5.1
19.5.2
19.5.3
19.5.4
19.5.5
19.5.6
19.5.7
19.5.8

Function Documentation . . . . . . . . .
FLASH_Init . . . . . . . . . . . . . . .
FLASH_SetCallback . . . . . . . . . . .
FLASH_PrepareExecuteInRamFunctions
FLASH_EraseAll . . . . . . . . . . . .
FLASH_Erase . . . . . . . . . . . . . .
FLASH_EraseAllExecuteOnlySegments
FLASH_Program . . . . . . . . . . . .
FLASH_ProgramOnce . . . . . . . . . .

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275
275
276
276
277
277
278
280
281

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Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xv

Section
Number
19.5.9
19.5.10
19.5.11
19.5.12
19.5.13
19.5.14
19.5.15
19.5.16
19.5.17
19.5.18
19.5.19
19.5.20
Chapter

Contents
Title
FLASH_ReadOnce . . . . . . . . . . . . . .
FLASH_GetSecurityState . . . . . . . . . . .
FLASH_SecurityBypass . . . . . . . . . . . .
FLASH_VerifyEraseAll . . . . . . . . . . . .
FLASH_VerifyErase . . . . . . . . . . . . . .
FLASH_VerifyProgram . . . . . . . . . . . .
FLASH_VerifyEraseAllExecuteOnlySegments
FLASH_IsProtected . . . . . . . . . . . . . .
FLASH_IsExecuteOnly . . . . . . . . . . . .
FLASH_GetProperty . . . . . . . . . . . . .
FLASH_PflashSetProtection . . . . . . . . . .
FLASH_PflashGetProtection . . . . . . . . .

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Page
Number
. . . 282
. . . 283
. . . 284
. . . 284
. . . 285
. . . 286
. . . 287
. . . 288
. . . 289
. . . 289
. . . 290
. . . 290

FlexBus: External Bus Interface Driver

20.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293

20.2

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293

20.3

FlexBus functional operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293

20.4

Typical use case and example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293

20.5
20.5.1

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 295
struct flexbus_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 295

20.6
20.6.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
FSL_FLEXBUS_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . 296

20.7
20.7.1
20.7.2
20.7.3
20.7.4
20.7.5
20.7.6
20.7.7
20.7.8
20.7.9
20.7.10

Enumeration Type Documentation
flexbus_port_size_t . . . . . . .
flexbus_write_address_hold_t . .
flexbus_read_address_hold_t . .
flexbus_address_setup_t . . . . .
flexbus_bytelane_shift_t . . . . .
flexbus_multiplex_group1_t . . .
flexbus_multiplex_group2_t . . .
flexbus_multiplex_group3_t . . .
flexbus_multiplex_group4_t . . .
flexbus_multiplex_group5_t . . .

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298

20.8
20.8.1
20.8.2
20.8.3

Function Documentation . . .
FLEXBUS_Init . . . . . . .
FLEXBUS_Deinit . . . . . .
FLEXBUS_GetDefaultConfig

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298
299
299

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Kinetis SDK v.2.0 API Reference Manual
xvi

Freescale Semiconductor

Contents

Section
Number
Title
Chapter FlexCAN: Flex Controller Area Network Driver

Page
Number

21.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 301

21.2
21.2.1
21.2.2
21.2.3
21.2.4
21.2.5
21.2.6
21.2.7

FlexCAN Driver . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Typical use case . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Typedef Documentation . . . . . .
Enumeration Type Documentation
Function Documentation . . . . . .

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302
302
310
314
319
319
322

21.3
21.3.1
21.3.2
21.3.3
21.3.4

FlexCAN eDMA Driver . . . .
Overview . . . . . . . . . . .
Data Structure Documentation
Typedef Documentation . . .
Function Documentation . . .

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335
336
336

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FlexIO: FlexIO Driver

22.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 339

22.2
22.2.1
22.2.2
22.2.3
22.2.4
22.2.5
22.2.6

FlexIO Driver . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Typedef Documentation . . . . . .
Enumeration Type Documentation
Function Documentation . . . . . .

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340
344
347
347
347
351

22.3
22.3.1
22.3.2
22.3.3
22.3.4
22.3.5
22.3.6
22.3.7
22.3.8
22.3.9
22.3.10
22.3.11
22.3.12
22.3.13

FlexIO Camera Driver . . . . . . .
Overview . . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Typical use case . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Enumeration Type Documentation
Function Documentation . . . . . .
FlexIO DMA I2S Driver . . . . . .
FlexIO DMA SPI Driver . . . . . .
FlexIO DMA UART Driver . . . .
FlexIO eDMA Camera Driver . . .
FlexIO eDMA I2S Driver . . . . .
FlexIO eDMA SPI Driver . . . . .

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362
362
362
362
365
367
367
367
371
377
383
388
392
399

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xvii

Section
Number
22.3.14

Contents

Page
Title
Number
FlexIO eDMA UART Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405

22.4
22.4.1
22.4.2
22.4.3
22.4.4
22.4.5
22.4.6
22.4.7
22.4.8

FlexIO I2C Master Driver . . . . . .
Overview . . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Typical use case . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Typedef Documentation . . . . . .
Enumeration Type Documentation
Function Documentation . . . . . .

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410
410
410
410
414
417
417
417
418

22.5
22.5.1
22.5.2
22.5.3
22.5.4
22.5.5
22.5.6
22.5.7

FlexIO I2S Driver . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Typical use case . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Enumeration Type Documentation
Function Documentation . . . . . .

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428
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428
434
435
435
437

22.6
22.6.1
22.6.2
22.6.3
22.6.4
22.6.5
22.6.6
22.6.7
22.6.8

FlexIO SPI Driver . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Typical use case . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Typedef Documentation . . . . . .
Enumeration Type Documentation
Function Documentation . . . . . .

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448
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448
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454
459
459
459
461

22.7
22.7.1
22.7.2
22.7.3
22.7.4
22.7.5
22.7.6
22.7.7
22.7.8

FlexIO UART Driver . . . . . . . .
Overview . . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Typical use case . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Typedef Documentation . . . . . .
Enumeration Type Documentation
Function Documentation . . . . . .

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475
475
475
476
483
486
486
486
487

Chapter
23.1

FTM: FlexTimer Driver
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 499

Kinetis SDK v.2.0 API Reference Manual
xviii

Freescale Semiconductor

Contents

Section
Number
23.2
23.2.1
23.2.2
23.2.3
23.2.4
23.2.5
23.2.6

Title
Function groups . . . . . . . . . . . .
Initialization and deinitialization . .
PWM Operations . . . . . . . . . .
Input capture operations . . . . . . .
Output compare operations . . . . .
Quad decode . . . . . . . . . . . . .
Fault operation . . . . . . . . . . . .

23.3

Register Update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500

23.4
23.4.1

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 501
PWM output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 501

23.5
23.5.1
23.5.2
23.5.3
23.5.4
23.5.5

Data Structure Documentation . . . . .
struct ftm_chnl_pwm_signal_param_t .
struct ftm_dual_edge_capture_param_t
struct ftm_phase_params_t . . . . . .
struct ftm_fault_param_t . . . . . . . .
struct ftm_config_t . . . . . . . . . . .

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507
507
508
508
508
508

23.6
23.6.1
23.6.2
23.6.3
23.6.4
23.6.5
23.6.6
23.6.7
23.6.8
23.6.9
23.6.10
23.6.11
23.6.12
23.6.13
23.6.14
23.6.15
23.6.16
23.6.17
23.6.18
23.6.19

Enumeration Type Documentation
ftm_chnl_t . . . . . . . . . . . .
ftm_fault_input_t . . . . . . . .
ftm_pwm_mode_t . . . . . . . .
ftm_pwm_level_select_t . . . . .
ftm_output_compare_mode_t . .
ftm_input_capture_edge_t . . . .
ftm_dual_edge_capture_mode_t .
ftm_quad_decode_mode_t . . . .
ftm_phase_polarity_t . . . . . .
ftm_deadtime_prescale_t . . . .
ftm_clock_source_t . . . . . . .
ftm_clock_prescale_t . . . . . .
ftm_bdm_mode_t . . . . . . . .
ftm_fault_mode_t . . . . . . . .
ftm_external_trigger_t . . . . . .
ftm_pwm_sync_method_t . . . .
ftm_reload_point_t . . . . . . . .
ftm_interrupt_enable_t . . . . . .
ftm_status_flags_t . . . . . . . .

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509
509
510
510
510
511
511
511
511
511
512
512
512
512
513
513
513
513
514
514

23.7
23.7.1
23.7.2
23.7.3

Function Documentation
FTM_Init . . . . . . . .
FTM_Deinit . . . . . .
FTM_GetDefaultConfig

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515
515
515
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Page
Number
. . . 499
. . . 499
. . . 499
. . . 499
. . . 500
. . . 500
. . . 500

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xix

Section
Number
23.7.4
23.7.5
23.7.6
23.7.7
23.7.8
23.7.9
23.7.10
23.7.11
23.7.12
23.7.13
23.7.14
23.7.15
23.7.16
23.7.17
23.7.18
23.7.19
23.7.20
23.7.21
23.7.22
23.7.23
23.7.24
23.7.25
23.7.26
23.7.27
23.7.28
Chapter

Contents
Title
FTM_SetupPwm . . . . . . . . . . . . .
FTM_UpdatePwmDutycycle . . . . . .
FTM_UpdateChnlEdgeLevelSelect . . .
FTM_SetupInputCapture . . . . . . . .
FTM_SetupOutputCompare . . . . . . .
FTM_SetupDualEdgeCapture . . . . . .
FTM_SetupQuadDecode . . . . . . . .
FTM_SetupFault . . . . . . . . . . . . .
FTM_EnableInterrupts . . . . . . . . . .
FTM_DisableInterrupts . . . . . . . . .
FTM_GetEnabledInterrupts . . . . . . .
FTM_GetStatusFlags . . . . . . . . . .
FTM_ClearStatusFlags . . . . . . . . .
FTM_StartTimer . . . . . . . . . . . . .
FTM_StopTimer . . . . . . . . . . . . .
FTM_SetSoftwareCtrlEnable . . . . . .
FTM_SetSoftwareCtrlVal . . . . . . . .
FTM_SetGlobalTimeBaseOutputEnable
FTM_SetOutputMask . . . . . . . . . .
FTM_SetFaultControlEnable . . . . . .
FTM_SetDeadTimeEnable . . . . . . .
FTM_SetComplementaryEnable . . . .
FTM_SetInvertEnable . . . . . . . . . .
FTM_SetSoftwareTrigger . . . . . . . .
FTM_SetWriteProtection . . . . . . . .

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Page
Number
. . . 516
. . . 517
. . . 517
. . . 517
. . . 518
. . . 518
. . . 519
. . . 519
. . . 519
. . . 519
. . . 520
. . . 520
. . . 520
. . . 520
. . . 521
. . . 521
. . . 521
. . . 521
. . . 522
. . . 522
. . . 522
. . . 523
. . . 524
. . . 524
. . . 524

GPIO: General-Purpose Input/Output Driver

24.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 525

24.2
24.2.1

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 525
struct gpio_pin_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 525

24.3
24.3.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 526
FSL_GPIO_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 526

24.4
24.4.1

Enumeration Type Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . 526
gpio_pin_direction_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526

24.5
24.5.1
24.5.2
24.5.3

GPIO Driver . . . . . . .
Overview . . . . . . . .
Typical use case . . . .
Function Documentation

24.6

FGPIO Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531

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527
527
527
528

Kinetis SDK v.2.0 API Reference Manual
xx

Freescale Semiconductor

Section
Number
24.6.1
Chapter

Contents

Page
Title
Number
Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531
I2C: Inter-Integrated Circuit Driver

25.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 533

25.2
25.2.1
25.2.2
25.2.3
25.2.4
25.2.5
25.2.6
25.2.7
25.2.8

I2C Driver . . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Typical use case . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Typedef Documentation . . . . . .
Enumeration Type Documentation
Function Documentation . . . . . .

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534
534
534
534
541
545
545
545
547

25.3
25.3.1
25.3.2
25.3.3
25.3.4

I2C DMA Driver . . . . . . . .
Overview . . . . . . . . . . .
Data Structure Documentation
Typedef Documentation . . .
Function Documentation . . .

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561
561
561
562
562

25.4
25.4.1
25.4.2
25.4.3
25.4.4

I2C eDMA Driver . . . . . . .
Overview . . . . . . . . . . .
Data Structure Documentation
Typedef Documentation . . .
Function Documentation . . .

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565
565
565
566
566

25.5
25.5.1
25.5.2
25.5.3
25.5.4

I2C FreeRTOS Driver . . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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569
569
569
570
570

25.6
25.6.1
25.6.2
25.6.3
25.6.4

I2C µCOS/II Driver . . . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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572
572
572
573
573

25.7

I2C µCOS/III Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 575

Chapter
26.1

LLWU: Low-Leakage Wakeup Unit Driver
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xxi

Contents

Section
Number
26.2

Page
Title
Number
External wakeup pins configurations . . . . . . . . . . . . . . . . . . . . . . . . . 577

26.3

Internal wakeup modules configurations . . . . . . . . . . . . . . . . . . . . . . . 577

26.4

Digital pin filter for external wakeup pin configurations . . . . . . . . . . . . . . 577

26.5
26.5.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 578
FSL_LLWU_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . 578

26.6
26.6.1
26.6.2

Enumeration Type Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . 578
llwu_external_pin_mode_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 578
llwu_pin_filter_mode_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 578

Chapter

LMEM: Local Memory Controller Cache Control Driver

27.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 579

27.2

Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 579

27.3
27.3.1
27.3.2

Function groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 579
Local Memory Processor Code Bus Cache Control . . . . . . . . . . . . . . . . . 579
Local Memory Processor System Bus Cache Control . . . . . . . . . . . . . . . . 580

27.4
27.4.1
27.4.2
27.4.3

Macro Definition Documentation . .
FSL_LMEM_DRIVER_VERSION
LMEM_CACHE_LINE_SIZE . .
LMEM_CACHE_SIZE_ONEWAY

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583
583
583
583

27.5
27.5.1
27.5.2
27.5.3

Enumeration Type Documentation
lmem_cache_mode_t . . . . . .
lmem_cache_region_t . . . . . .
lmem_cache_line_command_t .

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583
583
583
584

27.6
27.6.1
27.6.2
27.6.3
27.6.4
27.6.5
27.6.6
27.6.7
27.6.8
27.6.9
27.6.10
27.6.11

Function Documentation . . . . . . . . .
LMEM_EnableCodeCache . . . . . . .
LMEM_CodeCacheInvalidateAll . . . .
LMEM_CodeCachePushAll . . . . . . .
LMEM_CodeCacheClearAll . . . . . .
LMEM_CodeCacheInvalidateLine . . .
LMEM_CodeCacheInvalidateMultiLines
LMEM_CodeCachePushLine . . . . . .
LMEM_CodeCachePushMultiLines . . .
LMEM_CodeCacheClearLine . . . . . .
LMEM_CodeCacheClearMultiLines . .
LMEM_CodeCacheDemoteRegion . . .

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584
584
584
584
585
585
585
586
586
587
587
587

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Kinetis SDK v.2.0 API Reference Manual
xxii

Freescale Semiconductor

Section
Number
Chapter LPI2C: Low Power I2C Driver

Contents

Page
Number

Title

28.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 589

28.2
28.2.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 589
FSL_LPI2C_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . 589

28.3
28.3.1

Enumeration Type Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . 590
_lpi2c_status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 590

28.4
28.4.1
28.4.2
28.4.3
28.4.4

LPI2C FreeRTOS Driver . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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591
591
591
592
592

28.5
28.5.1
28.5.2
28.5.3
28.5.4
28.5.5

LPI2C Master Driver . . . . . . . .
Overview . . . . . . . . . . . . . .
Data Structure Documentation . . .
Typedef Documentation . . . . . .
Enumeration Type Documentation
Function Documentation . . . . . .

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594
594
597
601
601
604

28.6
28.6.1
28.6.2
28.6.3
28.6.4

LPI2C Master DMA Driver . .
Overview . . . . . . . . . . .
Data Structure Documentation
Typedef Documentation . . .
Function Documentation . . .

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616
616
616
617
618

28.7
28.7.1
28.7.2
28.7.3
28.7.4
28.7.5

LPI2C Slave Driver . . . . . . . . .
Overview . . . . . . . . . . . . . .
Data Structure Documentation . . .
Typedef Documentation . . . . . .
Enumeration Type Documentation
Function Documentation . . . . . .

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621
621
623
627
628
629

28.8

LPI2C Slave DMA Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 638

28.9
28.9.1
28.9.2
28.9.3
28.9.4

LPI2C µCOS/II Driver . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

28.10
28.10.1

LPI2C µCOS/III Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 642
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 642

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639
639
639
640
640

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xxiii

Section
Number
28.10.2
28.10.3
28.10.4
Chapter

Contents
Title
Data Structure Documentation . . . .
Macro Definition Documentation . .
Function Documentation . . . . . . .

Page
Number
. . . . . . . . . . . . . . . . . . . . . . . . 642
. . . . . . . . . . . . . . . . . . . . . . . . 643
. . . . . . . . . . . . . . . . . . . . . . . . 643

LPTMR: LPTMR Driver

29.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 645

29.2
29.2.1

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 647
struct lptmr_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 647

29.3
29.3.1
29.3.2
29.3.3
29.3.4
29.3.5
29.3.6
29.3.7

Enumeration Type Documentation
lptmr_pin_select_t . . . . . . . .
lptmr_pin_polarity_t . . . . . . .
lptmr_timer_mode_t . . . . . . .
lptmr_prescaler_glitch_value_t .
lptmr_prescaler_clock_select_t .
lptmr_interrupt_enable_t . . . . .
lptmr_status_flags_t . . . . . . .

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648
648
648
648
648
649
649
649

29.4
29.4.1
29.4.2
29.4.3
29.4.4
29.4.5
29.4.6
29.4.7
29.4.8
29.4.9
29.4.10
29.4.11
29.4.12

Function Documentation . . . . .
LPTMR_Init . . . . . . . . . . .
LPTMR_Deinit . . . . . . . . .
LPTMR_GetDefaultConfig . . .
LPTMR_EnableInterrupts . . . .
LPTMR_DisableInterrupts . . .
LPTMR_GetEnabledInterrupts .
LPTMR_GetStatusFlags . . . . .
LPTMR_ClearStatusFlags . . . .
LPTMR_SetTimerPeriod . . . .
LPTMR_GetCurrentTimerCount
LPTMR_StartTimer . . . . . . .
LPTMR_StopTimer . . . . . . .

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649
649
650
650
650
650
651
651
651
652
652
652
653

Chapter

LPUART: Low Power UART Driver

30.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 655

30.2
30.2.1
30.2.2
30.2.3
30.2.4
30.2.5
30.2.6

LPUART Driver . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Typedef Documentation . . . . . .
Enumeration Type Documentation
Function Documentation . . . . . .

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656
656
660
662
662
662
664

Kinetis SDK v.2.0 API Reference Manual
xxiv

Freescale Semiconductor

Section
Number
30.2.7
30.2.8

Contents

Page
Title
Number
LPUART DMA Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 677
LPUART eDMA Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 682

30.3
30.3.1
30.3.2
30.3.3

LPUART FreeRTOS Driver . . .
Overview . . . . . . . . . . . . .
Macro Definition Documentation
Function Documentation . . . . .

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687
687
687
687

30.4
30.4.1
30.4.2
30.4.3

LPUART µCOS/II Driver . . . . .
Overview . . . . . . . . . . . . .
Macro Definition Documentation
Function Documentation . . . . .

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690
690
690
690

30.5
30.5.1
30.5.2
30.5.3

LPUART µCOS/III Driver . . . .
Overview . . . . . . . . . . . . .
Macro Definition Documentation
Function Documentation . . . . .

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693
693
693
693

Chapter

LTC: LP Trusted Cryptography

31.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 697

31.2

LTC Driver Initialization and Configuration . . . . . . . . . . . . . . . . . . . . 697

31.3

Comments about API usage in RTOS . . . . . . . . . . . . . . . . . . . . . . . . 697

31.4

Comments about API usage in interrupt handler . . . . . . . . . . . . . . . . . . 697

31.5

LTC Driver Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 698

31.6
31.6.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 700
FSL_LTC_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 700

31.7
31.7.1
31.7.2
31.7.3

Function Documentation
LTC_Init . . . . . . . .
LTC_Deinit . . . . . .
LTC_SetDpaMaskSeed

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700
700
701
701

31.8
31.8.1
31.8.2
31.8.3
31.8.4
31.8.5

LTC Blocking APIs
Overview . . . . .
LTC AES driver .
LTC DES driver .
LTC HASH driver
LTC PKHA driver

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702
702
703
713
730
734

31.9
31.9.1

LTC Non-blocking eDMA APIs . . . . . . . . . . . . . . . . . . . . . . . . . . . 749
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 749

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Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xxv

Section
Number
31.9.2
31.9.3
31.9.4
31.9.5
31.9.6
Chapter

Contents
Data Structure Documentation
Typedef Documentation . . .
Function Documentation . . .
LTC eDMA AES driver . . .
LTC eDMA DES driver . . .

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Page
Number
. . . 749
. . . 751
. . . 752
. . . 754
. . . 760

MPU: Memory Protection Unit

32.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 781

32.2

Initialization and Deinitialize . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 781

32.3

Basic Control Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 782

32.4
32.4.1
32.4.2
32.4.3
32.4.4
32.4.5
32.4.6

Data Structure Documentation . . . . . .
struct mpu_hardware_info_t . . . . . . .
struct mpu_access_err_info_t . . . . . .
struct mpu_low_masters_access_rights_t
struct mpu_high_masters_access_rights_t
struct mpu_region_config_t . . . . . . .
struct mpu_config_t . . . . . . . . . . .

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785
785
785
786
786
787
788

32.5
32.5.1
32.5.2
32.5.3
32.5.4
32.5.5
32.5.6
32.5.7
32.5.8
32.5.9
32.5.10
32.5.11
32.5.12
32.5.13

Macro Definition Documentation . . . . . .
FSL_MPU_DRIVER_VERSION . . . . .
MPU_WORD_LOW_MASTER_SHIFT .
MPU_WORD_LOW_MASTER_MASK .
MPU_WORD_LOW_MASTER_WIDTH
MPU_WORD_LOW_MASTER . . . . .
MPU_LOW_MASTER_PE_SHIFT . . . .
MPU_LOW_MASTER_PE_MASK . . .
MPU_WORD_MASTER_PE_WIDTH . .
MPU_WORD_MASTER_PE . . . . . . .
MPU_WORD_HIGH_MASTER_SHIFT .
MPU_WORD_HIGH_MASTER_MASK .
MPU_WORD_HIGH_MASTER_WIDTH
MPU_WORD_HIGH_MASTER . . . . .

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789
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789
789

32.6
32.6.1
32.6.2
32.6.3
32.6.4
32.6.5
32.6.6
32.6.7

Enumeration Type Documentation
mpu_region_num_t . . . . . . .
mpu_master_t . . . . . . . . . .
mpu_region_total_num_t . . . .
mpu_slave_t . . . . . . . . . . .
mpu_err_access_control_t . . . .
mpu_err_access_type_t . . . . .
mpu_err_attributes_t . . . . . . .

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Kinetis SDK v.2.0 API Reference Manual
xxvi

Freescale Semiconductor

Section
Number
32.6.8
32.6.9
32.7
32.7.1
32.7.2
32.7.3
32.7.4
32.7.5
32.7.6
32.7.7
32.7.8
32.7.9
32.7.10
32.7.11
Chapter

Contents

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Title
Number
mpu_supervisor_access_rights_t . . . . . . . . . . . . . . . . . . . . . . . . . . 791
mpu_user_access_rights_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 791
Function Documentation . . . . . . . . . .
MPU_Init . . . . . . . . . . . . . . . . .
MPU_Deinit . . . . . . . . . . . . . . . .
MPU_Enable . . . . . . . . . . . . . . . .
MPU_RegionEnable . . . . . . . . . . . .
MPU_GetHardwareInfo . . . . . . . . . .
MPU_SetRegionConfig . . . . . . . . . .
MPU_SetRegionAddr . . . . . . . . . . .
MPU_SetRegionLowMasterAccessRights
MPU_SetRegionHighMasterAccessRights
MPU_GetSlavePortErrorStatus . . . . . .
MPU_GetDetailErrorAccessInfo . . . . .

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Notification Framework

33.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 797

33.2

Notifier Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 797

33.3
33.3.1
33.3.2
33.3.3

Data Structure Documentation . . .
struct notifier_notification_block_t
struct notifier_callback_config_t . .
struct notifier_handle_t . . . . . .

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33.4
33.4.1
33.4.2
33.4.3

Typedef Documentation .
notifier_user_config_t .
notifier_user_function_t
notifier_callback_t . . .

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802
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33.5
33.5.1
33.5.2
33.5.3
33.5.4

Enumeration Type Documentation
_notifier_status . . . . . . . . . .
notifier_policy_t . . . . . . . . .
notifier_notification_type_t . . .
notifier_callback_type_t . . . . .

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33.6
33.6.1
33.6.2
33.6.3

Function Documentation . . . . . .
NOTIFIER_CreateHandle . . . . .
NOTIFIER_SwitchConfig . . . . .
NOTIFIER_GetErrorCallbackIndex

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804
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805
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Chapter
34.1

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PDB: Programmable Delay Block
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 807
Kinetis SDK v.2.0 API Reference Manual

Freescale Semiconductor

xxvii

Contents

Section
Number
34.2
34.2.1
34.2.2
34.2.3

Title
Data Structure Documentation . . . .
struct pdb_config_t . . . . . . . . . .
struct pdb_adc_pretrigger_config_t .
struct pdb_dac_trigger_config_t . . .

34.3
34.3.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 814
FSL_PDB_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 814

34.4
34.4.1
34.4.2
34.4.3
34.4.4
34.4.5
34.4.6
34.4.7

Enumeration Type Documentation . .
_pdb_status_flags . . . . . . . . . .
_pdb_adc_pretrigger_flags . . . . . .
_pdb_interrupt_enable . . . . . . . .
pdb_load_value_mode_t . . . . . . .
pdb_prescaler_divider_t . . . . . . .
pdb_divider_multiplication_factor_t .
pdb_trigger_input_source_t . . . . .

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814
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814
814
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815
815

34.5
34.5.1
34.5.2
34.5.3
34.5.4
34.5.5
34.5.6
34.5.7
34.5.8
34.5.9
34.5.10
34.5.11
34.5.12
34.5.13
34.5.14
34.5.15
34.5.16
34.5.17
34.5.18
34.5.19
34.5.20

Function Documentation . . . . . . . .
PDB_Init . . . . . . . . . . . . . . . .
PDB_Deinit . . . . . . . . . . . . . .
PDB_GetDefaultConfig . . . . . . . .
PDB_Enable . . . . . . . . . . . . . .
PDB_DoSoftwareTrigger . . . . . . .
PDB_DoLoadValues . . . . . . . . . .
PDB_EnableDMA . . . . . . . . . . .
PDB_EnableInterrupts . . . . . . . . .
PDB_DisableInterrupts . . . . . . . .
PDB_GetStatusFlags . . . . . . . . . .
PDB_ClearStatusFlags . . . . . . . . .
PDB_SetModulusValue . . . . . . . .
PDB_GetCounterValue . . . . . . . .
PDB_SetCounterDelayValue . . . . .
PDB_SetADCPreTriggerConfig . . . .
PDB_SetADCPreTriggerDelayValue .
PDB_GetADCPreTriggerStatusFlags .
PDB_ClearADCPreTriggerStatusFlags
PDB_EnablePulseOutTrigger . . . . .
PDB_SetPulseOutTriggerDelayValue .

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817
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819
819
819
819
820
820
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821
821

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Page
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. . . 812
. . . 813
. . . 813

PIT: Periodic Interrupt Timer Driver

35.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 823

35.2
35.2.1

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 824
struct pit_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 824
Kinetis SDK v.2.0 API Reference Manual

xxviii

Freescale Semiconductor

Contents

Section
Number
35.3
35.3.1
35.3.2
35.3.3

Title
Enumeration Type Documentation . .
pit_chnl_t . . . . . . . . . . . . . .
pit_interrupt_enable_t . . . . . . . .
pit_status_flags_t . . . . . . . . . . .

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35.4
35.4.1
35.4.2
35.4.3
35.4.4
35.4.5
35.4.6
35.4.7
35.4.8
35.4.9
35.4.10
35.4.11
35.4.12

Function Documentation . .
PIT_Init . . . . . . . . . .
PIT_Deinit . . . . . . . . .
PIT_GetDefaultConfig . . .
PIT_EnableInterrupts . . .
PIT_DisableInterrupts . . .
PIT_GetEnabledInterrupts .
PIT_GetStatusFlags . . . .
PIT_ClearStatusFlags . . .
PIT_SetTimerPeriod . . . .
PIT_GetCurrentTimerCount
PIT_StartTimer . . . . . .
PIT_StopTimer . . . . . . .

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825
825
825
826
826
826
827
827
827
828
828
829
829

PMC: Power Management Controller

36.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 831

36.2
36.2.1
36.2.2

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 832
struct pmc_low_volt_detect_config_t . . . . . . . . . . . . . . . . . . . . . . . . 832
struct pmc_low_volt_warning_config_t . . . . . . . . . . . . . . . . . . . . . . . 832

36.3
36.3.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 832
FSL_PMC_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 832

36.4
36.4.1
36.4.2
36.4.3
36.4.4
36.4.5
36.4.6

Function Documentation . . . . .
PMC_ConfigureLowVoltDetect .
PMC_GetLowVoltDetectFlag . .
PMC_ClearLowVoltDetectFlag .
PMC_ConfigureLowVoltWarning
PMC_GetLowVoltWarningFlag .
PMC_ClearLowVoltWarningFlag

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832
832
832
833
833
833
834

PORT: Port Control and Interrupts

37.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 835

37.2
37.2.1
37.2.2

Typical configuration case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 835
Input PORT Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 835
I2C PORT Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 835

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xxix

Contents

Section
Number
37.3
37.3.1

Page
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Number
Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 837
struct port_pin_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 837

37.4
37.4.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 837
FSL_PORT_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . 837

37.5
37.5.1
37.5.2
37.5.3
37.5.4
37.5.5
37.5.6

Enumeration Type Documentation
_port_pull . . . . . . . . . . . .
_port_slew_rate . . . . . . . . .
_port_passive_filter_enable . . .
_port_drive_strength . . . . . . .
port_mux_t . . . . . . . . . . . .
port_interrupt_t . . . . . . . . .

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837
837
838
838
838
838
838

37.6
37.6.1
37.6.2
37.6.3
37.6.4
37.6.5
37.6.6

Function Documentation . . . .
PORT_SetPinConfig . . . . . .
PORT_SetMultiplePinsConfig .
PORT_SetPinMux . . . . . . .
PORT_SetPinInterruptConfig .
PORT_GetPinsInterruptFlags .
PORT_ClearPinsInterruptFlags

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839
839
839
840
841
841
842

Chapter

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QSPI: Quad Serial Peripheral Interface Driver

38.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 843

38.2

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 843

38.3
38.3.1
38.3.2
38.3.3
38.3.4
38.3.5

Data Structure Documentation
struct qspi_dqs_config_t . . .
struct qspi_flash_timing_t . .
struct qspi_config_t . . . . .
struct qspi_flash_config_t . .
struct qspi_transfer_t . . . . .

38.4
38.4.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 850
FSL_QSPI_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 850

38.5
38.5.1
38.5.2
38.5.3
38.5.4
38.5.5
38.5.6
38.5.7

Enumeration Type Documentation
_status_t . . . . . . . . . . . . .
qspi_read_area_t . . . . . . . . .
qspi_command_seq_t . . . . . .
qspi_fifo_t . . . . . . . . . . . .
qspi_endianness_t . . . . . . . .
_qspi_error_flags . . . . . . . . .
_qspi_flags . . . . . . . . . . . .

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848
848
848
848
849
850

850
850
850
850
851
851
851
851

Kinetis SDK v.2.0 API Reference Manual
xxx

Freescale Semiconductor

Section
Number
38.5.8
38.5.9
38.5.10

Contents
Title
_qspi_interrupt_enable . . . . . . . .
_qspi_dma_enable . . . . . . . . . .
qspi_dqs_phrase_shift_t . . . . . . .

Page
Number
. . . . . . . . . . . . . . . . . . . . . . . . 852
. . . . . . . . . . . . . . . . . . . . . . . . 853
. . . . . . . . . . . . . . . . . . . . . . . . 853

38.6
38.6.1
38.6.2
38.6.3
38.6.4
38.6.5
38.6.6
38.6.7
38.6.8
38.6.9
38.6.10
38.6.11
38.6.12
38.6.13
38.6.14
38.6.15
38.6.16
38.6.17
38.6.18
38.6.19
38.6.20
38.6.21
38.6.22
38.6.23
38.6.24
38.6.25
38.6.26
38.6.27
38.6.28
38.6.29

Function Documentation . . . . . .
QSPI_Init . . . . . . . . . . . . .
QSPI_GetDefaultQspiConfig . . .
QSPI_Deinit . . . . . . . . . . . .
QSPI_SetFlashConfig . . . . . . .
QSPI_SoftwareReset . . . . . . . .
QSPI_Enable . . . . . . . . . . . .
QSPI_GetStatusFlags . . . . . . .
QSPI_GetErrorStatusFlags . . . .
QSPI_ClearErrorFlag . . . . . . .
QSPI_EnableInterrupts . . . . . .
QSPI_DisableInterrupts . . . . . .
QSPI_EnableDMA . . . . . . . .
QSPI_GetTxDataRegisterAddress .
QSPI_GetRxDataRegisterAddress .
QSPI_SetIPCommandAddress . .
QSPI_SetIPCommandSize . . . . .
QSPI_ExecuteIPCommand . . . .
QSPI_ExecuteAHBCommand . . .
QSPI_EnableIPParallelMode . . .
QSPI_EnableAHBParallelMode . .
QSPI_UpdateLUT . . . . . . . . .
QSPI_ClearFifo . . . . . . . . . .
QSPI_ClearCommandSequence . .
QSPI_WriteBlocking . . . . . . .
QSPI_WriteData . . . . . . . . . .
QSPI_ReadBlocking . . . . . . . .
QSPI_ReadData . . . . . . . . . .
QSPI_TransferSendBlocking . . .
QSPI_TransferReceiveBlocking . .

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853
853
853
854
854
854
854
855
855
855
856
856
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856
857
857
857
858
858
858
858
859
859
859
859
860
860
860
861
861

38.7
38.7.1
38.7.2
38.7.3

QSPI eDMA Driver . . . . . .
Overview . . . . . . . . . . .
Data Structure Documentation
Function Documentation . . .

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862
862
863
863

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RCM: Reset Control Module Driver

39.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 867

39.2

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 868
Kinetis SDK v.2.0 API Reference Manual

Freescale Semiconductor

xxxi

Section
Number
39.2.1

Contents

Page
Title
Number
struct rcm_reset_pin_filter_config_t . . . . . . . . . . . . . . . . . . . . . . . . . 868

39.3
39.3.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 868
FSL_RCM_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 868

39.4
39.4.1
39.4.2

Enumeration Type Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . 868
rcm_reset_source_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 868
rcm_run_wait_filter_mode_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 868

39.5
39.5.1
39.5.2

Function Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 869
RCM_GetPreviousResetSources . . . . . . . . . . . . . . . . . . . . . . . . . . 869
RCM_ConfigureResetPinFilter . . . . . . . . . . . . . . . . . . . . . . . . . . . 869

Chapter

RNGA: Random Number Generator Accelerator Driver

40.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 871

40.2

RNGA Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 871

40.3

Get random data from RNGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . 871

40.4

RNGA Set/Get Working Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 871

40.5

Seed RNGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 871

40.6
40.6.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 873
FSL_RNGA_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . 873

40.7
40.7.1

Enumeration Type Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . 873
rnga_mode_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 873

40.8
40.8.1
40.8.2
40.8.3
40.8.4
40.8.5
40.8.6

Function Documentation .
RNGA_Init . . . . . . . .
RNGA_Deinit . . . . . .
RNGA_GetRandomData
RNGA_Seed . . . . . . .
RNGA_SetMode . . . . .
RNGA_GetMode . . . .

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873
873
873
874
874
874
875

RTC: Real Time Clock Driver

41.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 877

41.2
41.2.1
41.2.2

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 879
struct rtc_datetime_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 879
struct rtc_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 879

Kinetis SDK v.2.0 API Reference Manual
xxxii

Freescale Semiconductor

Contents

Section
Number
41.3
41.3.1
41.3.2
41.3.3

Title
Enumeration Type Documentation . .
rtc_interrupt_enable_t . . . . . . . .
rtc_status_flags_t . . . . . . . . . . .
rtc_osc_cap_load_t . . . . . . . . .

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Page
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. . . 880
. . . 880
. . . 880
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41.4
41.4.1
41.4.2
41.4.3
41.4.4
41.4.5
41.4.6
41.4.7
41.4.8
41.4.9
41.4.10
41.4.11
41.4.12
41.4.13
41.4.14
41.4.15
41.4.16

Function Documentation . .
RTC_Init . . . . . . . . . .
RTC_Deinit . . . . . . . .
RTC_GetDefaultConfig . .
RTC_SetDatetime . . . . .
RTC_GetDatetime . . . . .
RTC_SetAlarm . . . . . .
RTC_GetAlarm . . . . . .
RTC_EnableInterrupts . . .
RTC_DisableInterrupts . .
RTC_GetEnabledInterrupts
RTC_GetStatusFlags . . . .
RTC_ClearStatusFlags . . .
RTC_StartTimer . . . . . .
RTC_StopTimer . . . . . .
RTC_SetOscCapLoad . . .
RTC_Reset . . . . . . . . .

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880
880
881
881
881
882
883
883
883
884
885
885
885
886
887
887
887

SAI: Serial Audio Interface

42.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 889

42.2

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 889

42.3
42.3.1
42.3.2

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 889
SAI Send/Receive using an interrupt method . . . . . . . . . . . . . . . . . . . . 889
SAI Send/receive using a DMA method . . . . . . . . . . . . . . . . . . . . . . . 890

42.4
42.4.1
42.4.2
42.4.3
42.4.4

Data Structure Documentation
struct sai_config_t . . . . . .
struct sai_transfer_format_t .
struct sai_transfer_t . . . . .
struct _sai_handle . . . . . .

42.5
42.5.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 897
SAI_XFER_QUEUE_SIZE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 897

42.6
42.6.1
42.6.2
42.6.3

Enumeration Type Documentation
_sai_status_t . . . . . . . . . . .
sai_protocol_t . . . . . . . . . .
sai_master_slave_t . . . . . . . .

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896
896
896
897

897
897
898
898

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xxxiii

Section
Number
42.6.4
42.6.5
42.6.6
42.6.7
42.6.8
42.6.9
42.6.10
42.6.11
42.6.12
42.6.13
42.7
42.7.1
42.7.2
42.7.3
42.7.4
42.7.5
42.7.6
42.7.7
42.7.8
42.7.9
42.7.10
42.7.11
42.7.12
42.7.13
42.7.14
42.7.15
42.7.16
42.7.17
42.7.18
42.7.19
42.7.20
42.7.21
42.7.22
42.7.23
42.7.24
42.7.25
42.7.26
42.7.27
42.7.28
42.7.29
42.7.30
42.7.31
42.7.32
42.7.33

Contents
sai_mono_stereo_t . . .
sai_sync_mode_t . . . .
sai_mclk_source_t . . .
sai_bclk_source_t . . .
_sai_interrupt_enable_t
_sai_dma_enable_t . . .
_sai_flags . . . . . . . .
sai_reset_type_t . . . .
sai_sample_rate_t . . .
sai_word_width_t . . .

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Title
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. . .

Function Documentation . . . . . .
SAI_TxInit . . . . . . . . . . . . .
SAI_RxInit . . . . . . . . . . . . .
SAI_TxGetDefaultConfig . . . . .
SAI_RxGetDefaultConfig . . . . .
SAI_Deinit . . . . . . . . . . . . .
SAI_TxReset . . . . . . . . . . . .
SAI_RxReset . . . . . . . . . . . .
SAI_TxEnable . . . . . . . . . . .
SAI_RxEnable . . . . . . . . . . .
SAI_TxGetStatusFlag . . . . . . .
SAI_TxClearStatusFlags . . . . . .
SAI_RxGetStatusFlag . . . . . . .
SAI_RxClearStatusFlags . . . . .
SAI_TxEnableInterrupts . . . . . .
SAI_RxEnableInterrupts . . . . . .
SAI_TxDisableInterrupts . . . . .
SAI_RxDisableInterrupts . . . . .
SAI_TxEnableDMA . . . . . . . .
SAI_RxEnableDMA . . . . . . . .
SAI_TxGetDataRegisterAddress .
SAI_RxGetDataRegisterAddress .
SAI_TxSetFormat . . . . . . . . .
SAI_RxSetFormat . . . . . . . . .
SAI_WriteBlocking . . . . . . . .
SAI_WriteData . . . . . . . . . .
SAI_ReadBlocking . . . . . . . .
SAI_ReadData . . . . . . . . . . .
SAI_TransferTxCreateHandle . . .
SAI_TransferRxCreateHandle . . .
SAI_TransferTxSetFormat . . . . .
SAI_TransferRxSetFormat . . . .
SAI_TransferSendNonBlocking . .
SAI_TransferReceiveNonBlocking

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Page
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. . . 899
. . . 899
. . . 899
. . . 899
. . . 900
. . . 900

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900
900
901
901
901
902
902
902
902
903
903
903
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904
904
904
905
906
906
906
907
908
908
909
909
909
910
910
910
911
911
912
912
913

Kinetis SDK v.2.0 API Reference Manual
xxxiv

Freescale Semiconductor

Section
Number
42.7.34
42.7.35
42.7.36
42.7.37
42.7.38
42.7.39

Contents
SAI_TransferGetSendCount . .
SAI_TransferGetReceiveCount
SAI_TransferAbortSend . . . .
SAI_TransferAbortReceive . .
SAI_TransferTxHandleIRQ . .
SAI_TransferRxHandleIRQ . .

Title
. . .
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Page
Number
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. . . 914
. . . 914
. . . 915
. . . 915
. . . 915

42.8
42.8.1
42.8.2
42.8.3

SAI DMA Driver . . . . . . . .
Overview . . . . . . . . . . .
Data Structure Documentation
Function Documentation . . .

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916
916
917
917

42.9
42.9.1
42.9.2
42.9.3

SAI eDMA Driver . . . . . . .
Overview . . . . . . . . . . .
Data Structure Documentation
Function Documentation . . .

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923
923
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925

Chapter

SDHC: Secured Digital Host Controller Driver

43.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 931

43.2
43.2.1
43.2.2
43.2.3
43.2.4
43.2.5
43.2.6
43.2.7
43.2.8
43.2.9
43.2.10
43.2.11

Data Structure Documentation .
struct sdhc_adma2_descriptor_t
struct sdhc_capability_t . . . .
struct sdhc_transfer_config_t .
struct sdhc_boot_config_t . . .
struct sdhc_config_t . . . . . .
struct sdhc_data_t . . . . . . .
struct sdhc_command_t . . . .
struct sdhc_transfer_t . . . . .
struct sdhc_transfer_callback_t
struct _sdhc_handle . . . . . .
struct sdhc_host_t . . . . . . .

43.3
43.3.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 943
FSL_SDHC_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . 943

43.4
43.4.1
43.4.2

Typedef Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 944
sdhc_adma1_descriptor_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 944
sdhc_transfer_function_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 944

43.5
43.5.1
43.5.2
43.5.3
43.5.4

Enumeration Type Documentation
_sdhc_status . . . . . . . . . . .
_sdhc_capability_flag . . . . . .
_sdhc_wakeup_event . . . . . .
_sdhc_reset . . . . . . . . . . . .

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939
939
940
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941
941
942
942
942
943
943

944
944
944
944
944

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xxxv

Contents

Section
Number
43.5.5
43.5.6
43.5.7
43.5.8
43.5.9
43.5.10
43.5.11
43.5.12
43.5.13
43.5.14
43.5.15
43.5.16
43.5.17
43.5.18
43.5.19
43.5.20

Title
_sdhc_transfer_flag . . . . . . . . . . . .
_sdhc_present_status_flag . . . . . . . . .
_sdhc_interrupt_status_flag . . . . . . . .
_sdhc_auto_command12_error_status_flag
_sdhc_adma_error_status_flag . . . . . . .
sdhc_adma_error_state_t . . . . . . . . .
_sdhc_force_event . . . . . . . . . . . . .
sdhc_data_bus_width_t . . . . . . . . . .
sdhc_endian_mode_t . . . . . . . . . . . .
sdhc_dma_mode_t . . . . . . . . . . . . .
_sdhc_sdio_control_flag . . . . . . . . . .
sdhc_boot_mode_t . . . . . . . . . . . . .
sdhc_command_type_t . . . . . . . . . .
sdhc_response_type_t . . . . . . . . . . .
_sdhc_adma1_descriptor_flag . . . . . . .
_sdhc_adma2_descriptor_flag . . . . . . .

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Page
Number
. . . 945
. . . 945
. . . 946
. . . 946
. . . 947
. . . 947
. . . 947
. . . 948
. . . 948
. . . 948
. . . 948
. . . 948
. . . 949
. . . 949
. . . 949
. . . 950

43.6
43.6.1
43.6.2
43.6.3
43.6.4
43.6.5
43.6.6
43.6.7
43.6.8
43.6.9
43.6.10
43.6.11
43.6.12
43.6.13
43.6.14
43.6.15
43.6.16
43.6.17
43.6.18
43.6.19
43.6.20
43.6.21
43.6.22
43.6.23
43.6.24
43.6.25
43.6.26
43.6.27

Function Documentation . . . . . . . . . . . .
SDHC_Init . . . . . . . . . . . . . . . . . . .
SDHC_Deinit . . . . . . . . . . . . . . . . .
SDHC_Reset . . . . . . . . . . . . . . . . . .
SDHC_SetAdmaTableConfig . . . . . . . . .
SDHC_EnableInterruptStatus . . . . . . . . .
SDHC_DisableInterruptStatus . . . . . . . . .
SDHC_EnableInterruptSignal . . . . . . . . .
SDHC_DisableInterruptSignal . . . . . . . .
SDHC_GetInterruptStatusFlags . . . . . . . .
SDHC_ClearInterruptStatusFlags . . . . . . .
SDHC_GetAutoCommand12ErrorStatusFlags
SDHC_GetAdmaErrorStatusFlags . . . . . .
SDHC_GetPresentStatusFlags . . . . . . . . .
SDHC_GetCapability . . . . . . . . . . . . .
SDHC_EnableSdClock . . . . . . . . . . . .
SDHC_SetSdClock . . . . . . . . . . . . . .
SDHC_SetCardActive . . . . . . . . . . . . .
SDHC_SetDataBusWidth . . . . . . . . . . .
SDHC_SetTransferConfig . . . . . . . . . . .
SDHC_GetCommandResponse . . . . . . . .
SDHC_WriteData . . . . . . . . . . . . . . .
SDHC_ReadData . . . . . . . . . . . . . . .
SDHC_EnableWakeupEvent . . . . . . . . . .
SDHC_EnableCardDetectTest . . . . . . . . .
SDHC_SetCardDetectTestLevel . . . . . . . .
SDHC_EnableSdioControl . . . . . . . . . .
SDHC_SetContinueRequest . . . . . . . . . .

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950
950
950
951
951
952
952
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953
953
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954
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955
955
955
956
956
957
958
958
958
959
959
959

Kinetis SDK v.2.0 API Reference Manual
xxxvi

Freescale Semiconductor

Section
Number
43.6.28
43.6.29
43.6.30
43.6.31
43.6.32
43.6.33
Chapter

Contents
SDHC_SetMmcBootConfig .
SDHC_SetForceEvent . . . .
SDHC_TransferBlocking . .
SDHC_TransferCreateHandle
SDHC_TransferNonBlocking
SDHC_TransferHandleIRQ .

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Title
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Page
Number
. . . 959
. . . 960
. . . 960
. . . 961
. . . 961
. . . 962

SDRAMC: Synchronous DRAM Controller Driver

44.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 963

44.2

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 963

44.3
44.3.1
44.3.2
44.3.3

Data Structure Documentation .
struct sdramc_blockctl_config_t
struct sdramc_refresh_config_t
struct sdramc_config_t . . . . .

44.4
44.4.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 967
FSL_SDRAMC_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . 967

44.5
44.5.1
44.5.2
44.5.3
44.5.4
44.5.5
44.5.6

Enumeration Type Documentation
sdramc_refresh_time_t . . . . . .
sdramc_latency_t . . . . . . . .
sdramc_command_bit_location_t
sdramc_command_t . . . . . . .
sdramc_port_size_t . . . . . . .
sdramc_block_selection_t . . . .

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967
967
968
968
968
969
969

44.6
44.6.1
44.6.2
44.6.3
44.6.4
44.6.5

Function Documentation . . . .
SDRAMC_Init . . . . . . . . .
SDRAMC_Deinit . . . . . . .
SDRAMC_SendCommand . .
SDRAMC_EnableWriteProtect
SDRAMC_EnableOperateValid

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969
969
970
970
971
972

Chapter

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966
966
966
967

SIM: System Integration Module Driver

45.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 973

45.2
45.2.1

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 973
struct sim_uid_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 973

45.3
45.3.1

Enumeration Type Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . 974
_sim_flash_mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 974

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xxxvii

Section
Number
45.4
45.4.1
45.4.2
Chapter

Contents
Title
Function Documentation . . . . . . .
SIM_GetUniqueId . . . . . . . . . .
SIM_SetFlashMode . . . . . . . . .

Page
Number
. . . . . . . . . . . . . . . . . . . . . . . . 974
. . . . . . . . . . . . . . . . . . . . . . . . 974
. . . . . . . . . . . . . . . . . . . . . . . . 974

SLCD: Segment LCD Driver

46.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 975

46.2
46.2.1

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 975
SLCD Initialization operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 975

46.3
46.3.1
46.3.2
46.3.3

Data Structure Documentation . .
struct slcd_fault_detect_config_t
struct slcd_clock_config_t . . . .
struct slcd_config_t . . . . . . .

46.4
46.4.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 983
FSL_SLCD_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . 983

46.5
46.5.1
46.5.2
46.5.3
46.5.4
46.5.5
46.5.6
46.5.7
46.5.8
46.5.9
46.5.10
46.5.11
46.5.12
46.5.13
46.5.14
46.5.15
46.5.16

Enumeration Type Documentation . . . . .
slcd_power_supply_option_t . . . . . . .
slcd_regulated_voltage_trim_t . . . . . . .
slcd_load_adjust_t . . . . . . . . . . . . .
slcd_clock_src_t . . . . . . . . . . . . . .
slcd_alt_clock_div_t . . . . . . . . . . . .
slcd_clock_prescaler_t . . . . . . . . . . .
slcd_duty_cycle_t . . . . . . . . . . . . .
slcd_phase_type_t . . . . . . . . . . . . .
slcd_phase_index_t . . . . . . . . . . . .
slcd_display_mode_t . . . . . . . . . . . .
slcd_blink_mode_t . . . . . . . . . . . . .
slcd_blink_rate_t . . . . . . . . . . . . . .
slcd_fault_detect_clock_prescaler_t . . . .
slcd_fault_detect_sample_window_width_t
slcd_interrupt_enable_t . . . . . . . . . .
slcd_lowpower_behavior . . . . . . . . .

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983
983
983
983
984
984
984
985
985
985
986
986
986
986
987
987
987

46.6
46.6.1
46.6.2
46.6.3
46.6.4
46.6.5
46.6.6
46.6.7

Function Documentation .
SLCD_Init . . . . . . . .
SLCD_Deinit . . . . . .
SLCD_GetDefaultConfig
SLCD_StartDisplay . . .
SLCD_StopDisplay . . .
SLCD_StartBlinkMode .
SLCD_StopBlinkMode .

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980
980
981
981

Kinetis SDK v.2.0 API Reference Manual
xxxviii

Freescale Semiconductor

Section
Number
46.6.8
46.6.9
46.6.10
46.6.11
46.6.12
46.6.13
46.6.14
46.6.15
Chapter

Contents
SLCD_SetBackPlanePhase . .
SLCD_SetFrontPlaneSegments
SLCD_SetFrontPlaneOnePhase
SLCD_GetFaultDetectCounter
SLCD_EnableInterrupts . . . .
SLCD_DisableInterrupts . . . .
SLCD_GetInterruptStatus . . .
SLCD_ClearInterruptStatus . .

Title
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Page
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. . . 991
. . . 992
. . . 992
. . . 992

SMC: System Mode Controller Driver

47.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 993

47.2
47.2.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 994
FSL_SMC_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . . . 994

47.3
47.3.1
47.3.2
47.3.3
47.3.4
47.3.5
47.3.6

Enumeration Type Documentation
smc_power_mode_protection_t .
smc_power_state_t . . . . . . . .
smc_run_mode_t . . . . . . . . .
smc_stop_mode_t . . . . . . . .
smc_partial_stop_option_t . . . .
_smc_status . . . . . . . . . . .

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47.4
47.4.1
47.4.2
47.4.3
47.4.4
47.4.5
47.4.6
47.4.7
47.4.8

Function Documentation . . . .
SMC_SetPowerModeProtection
SMC_GetPowerModeState . .
SMC_SetPowerModeRun . . .
SMC_SetPowerModeWait . . .
SMC_SetPowerModeStop . . .
SMC_SetPowerModeVlpr . . .
SMC_SetPowerModeVlpw . .
SMC_SetPowerModeVlps . . .

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995
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SPI: Serial Peripheral Interface Driver

48.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 999

48.2

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 999

48.3
48.3.1
48.3.2
48.3.3
48.3.4

SPI Driver . . . . . . . . . . .
Overview . . . . . . . . . . .
Overview . . . . . . . . . . .
Typical use case . . . . . . .
Data Structure Documentation

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.1000
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Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xxxix

Section
Number
48.3.5
48.3.6
48.3.7
48.3.8

Contents
Title
Macro Definition Documentation . .
Enumeration Type Documentation .
Function Documentation . . . . . . .
SPI DMA Driver . . . . . . . . . . .

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Page
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. . .1009
. . .1019

48.4
48.4.1
48.4.2
48.4.3
48.4.4

SPI FreeRTOS driver . . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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48.5
48.5.1
48.5.2
48.5.3
48.5.4

SPI µCOS/II driver . . . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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.1027
.1027
.1027
.1028
.1028

48.6
48.6.1
48.6.2
48.6.3
48.6.4

SPI µCOS/III driver . . . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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.1030
.1030
.1030
.1031
.1031

Chapter

Smart Card

49.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1033

49.2

SmartCard Driver Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . .1033

49.3

SmartCard Call diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1033

49.4
49.4.1
49.4.2
49.4.3
49.4.4
49.4.5

Data Structure Documentation . . .
struct smartcard_card_params_t . .
struct smartcard_timers_state_t . .
struct smartcard_interface_config_t
struct smartcard_xfer_t . . . . . .
struct smartcard_context_t . . . . .

49.5
49.5.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . .1040
FSL_SMARTCARD_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . .1040

49.6
49.6.1
49.6.2
49.6.3

Enumeration Type Documentation
smartcard_status_t . . . . . . . .
smartcard_control_t . . . . . . .
smartcard_direction_t . . . . . .

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.1035
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Kinetis SDK v.2.0 API Reference Manual
xl

Freescale Semiconductor

Contents

Section
Number
49.7
49.7.1
49.7.2
49.7.3

Title
Smart Card EMVSIM Driver . . . . .
Overview . . . . . . . . . . . . . . .
Enumeration Type Documentation .
Function Documentation . . . . . . .

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Page
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. . .1041
. . .1042
. . .1043

49.8
49.8.1
49.8.2
49.8.3
49.8.4

Smart Card FreeRTOS Driver . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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49.9
49.9.1
49.9.2

Smart Card PHY EMVSIM Driver . . . . . . . . . . . . . . . . . . . . . . . . .1052
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1052
Function Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1053

49.10
49.10.1
49.10.2

Smart Card PHY GPIO Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . .1057
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1057
Function Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1058

49.11
49.11.1
49.11.2
49.11.3

Smart Card PHY NCN8025 Driver .
Overview . . . . . . . . . . . . . .
Macro Definition Documentation .
Function Documentation . . . . . .

49.12
49.12.1
49.12.2

Smart Card UART Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1066
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1066
Function Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1067

49.13
49.13.1
49.13.2
49.13.3
49.13.4

Smart Card µCOS/II Driver . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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.1072
.1072
.1073
.1074
.1074

49.14
49.14.1
49.14.2
49.14.3
49.14.4

Smart Card µCOS/III Driver . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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.1047
.1047
.1048
.1048
.1049

.1062
.1062
.1063
.1063

TPM: Timer PWM Module

50.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1085

50.2
50.2.1

Typical use case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1086
PWM output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1086
Kinetis SDK v.2.0 API Reference Manual

Freescale Semiconductor

xli

Contents

Section
Number
50.3
50.3.1
50.3.2

Page
Title
Number
Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . .1090
struct tpm_chnl_pwm_signal_param_t . . . . . . . . . . . . . . . . . . . . . . .1090
struct tpm_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1090

50.4
50.4.1
50.4.2
50.4.3
50.4.4
50.4.5
50.4.6
50.4.7
50.4.8
50.4.9
50.4.10

Enumeration Type Documentation
tpm_chnl_t . . . . . . . . . . . .
tpm_pwm_mode_t . . . . . . . .
tpm_pwm_level_select_t . . . . .
tpm_trigger_select_t . . . . . . .
tpm_output_compare_mode_t . .
tpm_input_capture_edge_t . . . .
tpm_clock_source_t . . . . . . .
tpm_clock_prescale_t . . . . . .
tpm_interrupt_enable_t . . . . .
tpm_status_flags_t . . . . . . . .

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.1091
.1091
.1091
.1091
.1092
.1092
.1092
.1092
.1092
.1093
.1093

50.5
50.5.1
50.5.2
50.5.3
50.5.4
50.5.5
50.5.6
50.5.7
50.5.8
50.5.9
50.5.10
50.5.11
50.5.12
50.5.13
50.5.14
50.5.15

Function Documentation . . . . . .
TPM_Init . . . . . . . . . . . . . .
TPM_Deinit . . . . . . . . . . . .
TPM_GetDefaultConfig . . . . . .
TPM_SetupPwm . . . . . . . . . .
TPM_UpdatePwmDutycycle . . .
TPM_UpdateChnlEdgeLevelSelect
TPM_SetupInputCapture . . . . .
TPM_SetupOutputCompare . . . .
TPM_EnableInterrupts . . . . . . .
TPM_DisableInterrupts . . . . . .
TPM_GetEnabledInterrupts . . . .
TPM_GetStatusFlags . . . . . . .
TPM_ClearStatusFlags . . . . . .
TPM_StartTimer . . . . . . . . . .
TPM_StopTimer . . . . . . . . . .

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.1094
.1095
.1095
.1096
.1096
.1096
.1097
.1097
.1097
.1097
.1098
.1098

Chapter

TRNG: True Random Number Generator

51.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1099

51.2

TRNG Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1099

51.3

Get random data from TRNG . . . . . . . . . . . . . . . . . . . . . . . . . . . .1099

51.4
51.4.1
51.4.2

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . .1101
struct trng_statistical_check_limit_t . . . . . . . . . . . . . . . . . . . . . . . . .1101
struct trng_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1101

51.5

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . .1103
Kinetis SDK v.2.0 API Reference Manual

xlii

Freescale Semiconductor

Section
Number
51.5.1

Contents

Page
Title
Number
FSL_TRNG_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . .1103

51.6
51.6.1
51.6.2
51.6.3

Enumeration Type Documentation
trng_sample_mode_t . . . . . . .
trng_clock_mode_t . . . . . . .
trng_ring_osc_div_t . . . . . . .

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.1103
.1104
.1104

51.7
51.7.1
51.7.2
51.7.3
51.7.4

Function Documentation .
TRNG_GetDefaultConfig
TRNG_Init . . . . . . . .
TRNG_Deinit . . . . . .
TRNG_GetRandomData .

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TSI: Touch Sensing Input

52.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1107

52.2
52.2.1
52.2.2
52.2.3
52.2.4
52.2.5

TSIv2 Driver . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Enumeration Type Documentation
Function Documentation . . . . . .

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.1108
.1108
.1115
.1116
.1116
.1122

52.3
52.3.1
52.3.2
52.3.3
52.3.4
52.3.5

TSIv4 Driver . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Enumeration Type Documentation
Function Documentation . . . . . .

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.1137
.1137
.1143
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.1145
.1150

Chapter

UART: Universal Asynchronous Receiver/Transmitter Driver

53.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1163

53.2
53.2.1
53.2.2
53.2.3
53.2.4
53.2.5
53.2.6
53.2.7
53.2.8
53.2.9

UART Driver . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . .
Typical use case . . . . . . . . . .
Data Structure Documentation . . .
Macro Definition Documentation .
Typedef Documentation . . . . . .
Enumeration Type Documentation
Function Documentation . . . . . .
UART DMA Driver . . . . . . . .
UART eDMA Driver . . . . . . .

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.1164
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.1196

Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xliii

Contents

Section
Number
53.3
53.3.1
53.3.2
53.3.3
53.3.4

Title
UART FreeRTOS Driver . . . . . . .
Overview . . . . . . . . . . . . . . .
Data Structure Documentation . . . .
Macro Definition Documentation . .
Function Documentation . . . . . . .

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. . .1201
. . .1201
. . .1203
. . .1203

53.4
53.4.1
53.4.2
53.4.3
53.4.4

UART µCOS/II Driver . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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.1206
.1206
.1206
.1208
.1208

53.5
53.5.1
53.5.2
53.5.3
53.5.4

UART µCOS/III Driver . . . . . .
Overview . . . . . . . . . . . . .
Data Structure Documentation . .
Macro Definition Documentation
Function Documentation . . . . .

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.1211
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.1211
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Chapter

VREF: Voltage Reference Driver

54.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1217

54.2
54.2.1

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1217
VREF functional Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1217

54.3

Typical use case and example . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1217

54.4
54.4.1

Data Structure Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . .1218
struct vref_config_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1218

54.5
54.5.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . .1218
FSL_VREF_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . .1218

54.6
54.6.1

Enumeration Type Documentation . . . . . . . . . . . . . . . . . . . . . . . . . .1218
vref_buffer_mode_t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1218

54.7
54.7.1
54.7.2
54.7.3
54.7.4
54.7.5

Function Documentation .
VREF_Init . . . . . . . .
VREF_Deinit . . . . . .
VREF_GetDefaultConfig
VREF_SetTrimVal . . . .
VREF_GetTrimVal . . .

Chapter
55.1

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.1220

WDOG: Watchdog Timer Driver
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1221
Kinetis SDK v.2.0 API Reference Manual

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Freescale Semiconductor

Contents

Section
Number
55.2
55.2.1
55.2.2
55.2.3

Data Structure Documentation
struct wdog_work_mode_t . .
struct wdog_config_t . . . . .
struct wdog_test_config_t . .

55.3
55.3.1

Macro Definition Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . .1224
FSL_WDOG_DRIVER_VERSION . . . . . . . . . . . . . . . . . . . . . . . . .1224

55.4
55.4.1
55.4.2
55.4.3
55.4.4
55.4.5
55.4.6

Enumeration Type Documentation
wdog_clock_source_t . . . . . .
wdog_clock_prescaler_t . . . . .
wdog_test_mode_t . . . . . . . .
wdog_tested_byte_t . . . . . . .
_wdog_interrupt_enable_t . . . .
_wdog_status_flags_t . . . . . .

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.1224
.1224
.1224
.1225
.1225
.1225
.1225

55.5
55.5.1
55.5.2
55.5.3
55.5.4
55.5.5
55.5.6
55.5.7
55.5.8
55.5.9
55.5.10
55.5.11
55.5.12
55.5.13
55.5.14
55.5.15
55.5.16

Function Documentation . . .
WDOG_GetDefaultConfig . .
WDOG_Init . . . . . . . . .
WDOG_Deinit . . . . . . . .
WDOG_SetTestModeConfig
WDOG_Enable . . . . . . .
WDOG_Disable . . . . . . .
WDOG_EnableInterrupts . .
WDOG_DisableInterrupts . .
WDOG_GetStatusFlags . . .
WDOG_ClearStatusFlags . .
WDOG_SetTimeoutValue . .
WDOG_SetWindowValue . .
WDOG_Unlock . . . . . . .
WDOG_Refresh . . . . . . .
WDOG_GetResetCount . . .
WDOG_ClearResetCount . .

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.1231

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Page
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. . .1223
. . .1223
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Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

xlv

Chapter 1
Introduction
The Kinetis Software Development Kit (KSDK) 2.0 is a collection of software enablement, for NXP
Kinetis Microcontrollers, that includes peripheral drivers, high level stacks including USB and LWIP,
integration with WolfSSL and mbed TLS cryptography libraries, other middleware packages (multicore
support, fatfs), and integrated RTOS support for FreeRTOS, µC/OS-II, and µC/OS-III. In addition to the
base enablement, the KSDK is augmented with demo applications, driver example projects, and API
documentation to help users quickly leverage the support of the Kinetis SDK. The Kinetis Expert (KEx)
Web UI is available to provide access to all Kinetis SDK packages. See the Kinetis SDK v.2.0.0 Release
Notes (document KSDK200RN) and the supported Devices section at www.nxp.com/ksdk for details.
The Kinetis SDK is built with the following runtime software components:
• ARM® and DSP standard libraries, and CMSIS-compliant device header files which provide direct
access to the peripheral registers.
• Open-source peripheral drivers that provide stateless, high performance, ease-of-use APIs. Communication drivers provide higher level transactional APIs for a higher performance option.
• Open-source RTOS wrapper driver built on on top of KSDK peripheral drivers and leverage native
RTOS services to better comply to the RTOS cases.
• Real time operation systems (RTOS) including FreeRTOS OS, µC/OS-II, and µC/OS-III.
• Stacks and middleware in source or object formats including:
– A USB device, host, and OTG stack with comprehensive USB class support.
– CMSIS-DSP, a suite of common signal processing functions.
– FatFs, a FAT file system for small embedded systems.
– Encryption software utilizing the mmCAU hardware acceleration.
– SDMMC, a software component supporting SD Cards and eMMC.
– mbedTLS, cryptographic SSL/TLS libraries.
– lwIP, a light-weight TCP/IP stack.
– WolfSSL, a cryptography and SSL/TLS library.
– EMV L1 that complies to EMV-v4.3_Book_1 specification.
– DMA Manager, a software component used for managing on-chip DMA channel resources.
– The Kinetis SDK comes complete with software examples demonstrating the usage of the
peripheral drivers, RTOS wrapper drivers, middleware and RTOSes.
All demo applications and driver examples are provided with projects for the following toolchains:
– Atollic TrueSTUDIO
– GNU toolchain for ARM® Cortex® -M with Cmake build system
– IAR Embedded Workbench
– Keil MDK
– Kinetis Design Studio
The peripheral drivers and RTOS driver wrappers can be used across multiple devices within the Kinetis
product family without modification. The configuration items for each driver are encapsulated into C
Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

1

language data structures. Kinetis device specific configuration information is provided as part of the KSDK and need not be modified by the user. If necessary, the user is able to modify the peripheral driver and
RTOS wrapper driver configuration during runtime. The driver examples demonstrate how to configure
the drivers by passing the proper configuration data to the APIs. The Kinetis SDK folder structure is
organized to reduce the total number of includes required to compile a project.

Table 2: KSDK Folder Structure
The rest of this document describes the API references in detail for the peripheral drivers and RTOS
wrapper drivers. For the latest version of this and other Kinetis SDK documents, see the kex.nxp.com/apidoc.

Kinetis SDK v.2.0 API Reference Manual
2

Freescale Semiconductor

Chapter 2
Driver errors status
•
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kStatus_DMA_Busy = 5000
kStatus_DSPI_Error = 601
kStatus_EDMA_QueueFull = 5100
kStatus_EDMA_Busy = 5101
kStatus_ENET_RxFrameError = 4000
kStatus_ENET_RxFrameFail = 4001
kStatus_ENET_RxFrameEmpty = 4002
kStatus_ENET_TxFrameBusy = 4003
kStatus_ENET_TxFrameFail = 4004
kStatus_ENET_PtpTsRingFull = 4005
kStatus_ENET_PtpTsRingEmpty = 4006
kStatus_FLEXIO_I2S_Idle = 2300
kStatus_FLEXIO_I2S_TxBusy = 2301
kStatus_FLEXIO_I2S_RxBusy = 2302
kStatus_FLEXIO_I2S_Error = 2303
kStatus_FLEXIO_I2S_QueueFull = 2304
kStatus_QSPI_Idle = 4500
kStatus_QSPI_Busy = 4501
kStatus_QSPI_Error = 4502
kStatus_SAI_TxBusy = 1900
kStatus_SAI_RxBusy = 1901
kStatus_SAI_TxError = 1902
kStatus_SAI_RxError = 1903
kStatus_SAI_QueueFull = 1904
kStatus_SAI_TxIdle = 1905
kStatus_SAI_RxIdle = 1906
kStatus_SMARTCARD_Success = 4300
kStatus_SMARTCARD_TxBusy = 4301
kStatus_SMARTCARD_RxBusy = 4302
kStatus_SMARTCARD_NoTransferInProgress = 4303
kStatus_SMARTCARD_Timeout = 4304
kStatus_SMARTCARD_Initialized = 4305
kStatus_SMARTCARD_PhyInitialized = 4306
kStatus_SMARTCARD_CardNotActivated = 4307
kStatus_SMARTCARD_InvalidInput = 4308
kStatus_SMARTCARD_OtherError = 4309
kStatus_SMC_StopAbort = 3900
kStatus_SPI_Busy = 1400
Kinetis SDK v.2.0 API Reference Manual

Freescale Semiconductor

3

•
•
•
•
•

kStatus_SPI_Idle = 1401
kStatus_SPI_Error = 1402
kStatus_TRGMUX_Locked = 4200
kStatus_NOTIFIER_ErrorNotificationBefore = 9800
kStatus_NOTIFIER_ErrorNotificationAfter = 9801

Kinetis SDK v.2.0 API Reference Manual
4

Freescale Semiconductor

Chapter 3
Architectural Overview
This chapter provides the architectural overview for the Kinetis Software Development Kit (KSDK). It
describes each layer within the architecture and its associated components.
Overview
The Kinetis SDK architecture consists of five key components listed below.
1. The ARM Cortex Microcontroller Software Interface Standard (CMSIS) CORE compliance device
specific header files, SOC Header, and CMSIS math/DSP libraries.
2. Peripheral Drivers
3. Real-time Operating Systems (RTOS)
4. Stacks and Middleware that integrate with the Kinetis SDK
5. Demo Applications based on the Kinetis SDK

Figure 1: KSDK Block Diagram

Kinetis MCU header files
Each supported Kinetis MCU device in the KSDK has an overall System-on- Chip (SoC) memory-mapped
Kinetis SDK v.2.0 API Reference Manual
Freescale Semiconductor

5

header file. This header file contains the memory map and register base address for each peripheral and
the IRQ vector table with associated vector numbers. The overall SoC header file provides a access to the
peripheral registers through pointers and predefined bit masks. In addition to the overall SoC memorymapped header file, the KSDK includes a feature header file for each device. The feature header file allows
NXP to deliver a single software driver for a given peripheral. The feature file will ensure that the driver
is properly compiled for the target SOC.
CMSIS Support
Along with the SoC header files and peripheral extension header files, the KSDK also includes common
CMSIS header files for the ARM Cortex-M core and the math and DSP libraries from the latest CMSIS
release. The CMSIS DSP library source code is also included for reference.
KSDK Peripheral Drivers
The KSDK peripheral drivers mainly consist of low-level functional APIs for the Kinetis MCU product
family on-chip peripherals and also of high-level transactional APIs for some bus drivers/DMA driver/eDMA driver to quickly enable the peripherals and perform transfers.
All KSDK peripheral drivers only depend on the CMSIS headers, device feature files, fsl_common.h, and
fsl_clock.h files so that users can easily pull selected drivers and their dependencies into projects. With the
exception of the clock/power-relevant peripherals, each peripheral has its own driver. Peripheral drivers
handle the peripheral clock gating/ungating inside the drivers during initialization and deinit respectively.
Low-level functional APIs provide common peripheral functionality, abstracting the hardware peripheral
register accesses into a set of stateless basic functional operations. These APIs primarily focus on the
control, configuration, and function of basic peripheral operations. The APIs hide the register access
details and various MCU peripheral instantiation differences so that the application can be abstracted from
the low-level hardware details. The API prototypes are intentionally similar to help ensure easy portability
across supported KSDK devices.
Transactional APIs provide a quick method for customers to utilize higher level functionality of the peripherals. The transactional APIs will utilize interrupts and perform asynchronous operations without user
intervention. Transactional APIs operate on high-level logic that requires data storage for internal operation context handling. However, the Peripheral Drivers do not allocate this memory space. Rather, the user
passes in the memory to the driver for internal driver operation. Transactional APIs ensure the NVIC is
enabled properly inside the drivers. The transactional APIs will not meet all customer needs, but provide
a baseline for development of custom user APIs.
Note that the transactional drivers will never disable an NVIC after use. This is due to the shared nature of
interrupt vectors on Kinetis devices. It’s up to the user to ensure that NVIC interrupts are properly disabled
after usage is complete.
Interrupt handling for transactional APIs
A double weak mechanism is introduced for drivers with transactional API. The double weak indicates
two levels of weak vector entries. See the examples below:
PUBWEAK
PUBWEAK
SPI0_IRQHandler
LDR
BX

SPI0_IRQHandler
SPI0_DriverIRQHandler
R0, =SPI0_DriverIRQHandler
R0

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The first level of the weak implementation are the functions defined in the vector table. In the devices///startup_.s/.S file, the implementation of the
first layer weak function calls the second layer of weak function. The implementation of the second layer
weak function (ex. SPI0_DriverIRQHandler) jumps to itself (B .). The KSDK drivers with transactional
APIs provide the reimplementation of the second layer function inside of the peripheral driver. If the
KSDK drivers with transactional APIs are linked into the image, the SPI0_DriverIRQHandler is replaced
with the function implemented in the KSDK SPI driver.
The reason for implementing the double weak functions is to provide a better user experience when using
the transactional APIs. For drivers with a transactional function, call the transactional APIs and the drivers
complete the interrupt-driven flow. Users are not required to redefine the vector entries out of the box.
At the same time, if users are not satisfied by the second layer weak function implemented in the KSDK drivers, users can redefine the first layer weak function and implement their own interrupt handler
functions to suit their implementation.
The limitation of the double weak mechanism is that it cannot be used for peripherals that share the same
vector entry. For this use case, redefine the first layer weak function to enable the desired peripheral
interrupt functionality. For example, if the MCU’s UART0 and UART1 share the same vector entry,
redefine the UART0_UART1_IRQHandler according to the use case requirements.
Feature Header Files
The peripheral drivers are designed to be reusable regardless of the peripheral functional differences from
one Kinetis MCU device to another. An overall Peripheral Feature Header File is provided for the KSDK-supported MCU device to define the features or configuration differences for each Kinetis sub-family
device.
Application
See the Getting Started with Kinetis SDK (KSDK) v2.0 document (KSDK20GSUG).

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Chapter 4
Trademarks
Information in this document is provided solely to enable system and software implementers to use
Freescale products. There are no express or implied copyright licenses granted hereunder to design or
fabricate any integrated circuits based on the information in this document.
How to Reach Us:
Home Page: nxp.com
Web Support: nxp.com/support
Freescale reserves the right to make changes without further notice to any products herein. Freescale
makes no warranty, representation, or guarantee regarding the suitability of its products for any particular
purpose, nor does Freescale assume any liability arising out of the application or use of any product or
circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications
can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical
experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale
sells products pursuant to standard terms and conditions of sale, which can be found at the following
address: freescale.com/SalesTermsandConditions
Freescale, the Freescale logo, Kinetis, and Processor Expert are trademarks of Freescale Semiconductor,
Inc., Reg. U.S. Pat. & Tm. Off. Tower is a trademark of Freescale Semiconductor, Inc. All other product
or service names are the property of their respective owners. ARM, ARM powered logo, Keil, and Cortex
are registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. All rights
reserved.
© 2016 Freescale Semiconductors, Inc.

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Chapter 5
ADC16: 16-bit SAR Analog-to-Digital Converter Driver
5.1

Overview

The KSDK provides a Peripheral driver for the 16-bit SAR Analog-to-Digital Converter (ADC16) module
of Kinetis devices.

5.2

Typical use case

5.2.1

Polling Configuration

adc16_config_t adc16ConfigStruct;
adc16_channel_config_t adc16ChannelConfigStruct;
ADC16_Init(DEMO_ADC16_INSTANCE);
ADC16_GetDefaultConfig(&adc16ConfigStruct);
ADC16_Configure(DEMO_ADC16_INSTANCE, &adc16ConfigStruct);
ADC16_EnableHardwareTrigger(DEMO_ADC16_INSTANCE, false);
#if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) && FSL_FEATURE_ADC16_HAS_CALIBRATION
if (kStatus_Success == ADC16_DoAutoCalibration(DEMO_ADC16_INSTANCE))
{
PRINTF("ADC16_DoAutoCalibration() Done.\r\n");
}
else
{
PRINTF("ADC16_DoAutoCalibration() Failed.\r\n");
}
#endif // FSL_FEATURE_ADC16_HAS_CALIBRATION
adc16ChannelConfigStruct.channelNumber = DEMO_ADC16_USER_CHANNEL;
adc16ChannelConfigStruct.enableInterruptOnConversionCompleted =
false;
#if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) && FSL_FEATURE_ADC16_HAS_DIFF_MODE
adc16ChannelConfigStruct.enableDifferentialConversion = false;
#endif // FSL_FEATURE_ADC16_HAS_DIFF_MODE
while(1)
{
GETCHAR(); // Input any key in terminal console.
ADC16_ChannelConfigure(DEMO_ADC16_INSTANCE, DEMO_ADC16_CHANNEL_GROUP, &adc16ChannelConfigStruct);
while (kADC16_ChannelConversionDoneFlag !=
ADC16_ChannelGetStatusFlags(DEMO_ADC16_INSTANCE, DEMO_ADC16_CHANNEL_GROUP))
{
}
PRINTF("ADC Value: %d\r\n", ADC16_ChannelGetConversionValue(DEMO_ADC16_INSTANCE,
DEMO_ADC16_CHANNEL_GROUP));
}

5.2.2

Interrupt Configuration

volatile bool g_Adc16ConversionDoneFlag = false;
volatile uint32_t g_Adc16ConversionValue;
volatile uint32_t g_Adc16InterruptCount = 0U;

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Typical use case
// ...
adc16_config_t adc16ConfigStruct;
adc16_channel_config_t adc16ChannelConfigStruct;
ADC16_Init(DEMO_ADC16_INSTANCE);
ADC16_GetDefaultConfig(&adc16ConfigStruct);
ADC16_Configure(DEMO_ADC16_INSTANCE, &adc16ConfigStruct);
ADC16_EnableHardwareTrigger(DEMO_ADC16_INSTANCE, false);
#if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) && FSL_FEATURE_ADC16_HAS_CALIBRATION
if (ADC16_DoAutoCalibration(DEMO_ADC16_INSTANCE))
{
PRINTF("ADC16_DoAutoCalibration() Done.\r\n");
}
else
{
PRINTF("ADC16_DoAutoCalibration() Failed.\r\n");
}
#endif // FSL_FEATURE_ADC16_HAS_CALIBRATION
adc16ChannelConfigStruct.channelNumber = DEMO_ADC16_USER_CHANNEL;
adc16ChannelConfigStruct.enableInterruptOnConversionCompleted =
true; // Enable the interrupt.
#if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) && FSL_FEATURE_ADC16_HAS_DIFF_MODE
adc16ChannelConfigStruct.enableDifferentialConversion = false;
#endif // FSL_FEATURE_ADC16_HAS_DIFF_MODE
while(1)
{
GETCHAR(); // Input any key in terminal console.
g_Adc16ConversionDoneFlag = false;
ADC16_ChannelConfigure(DEMO_ADC16_INSTANCE, DEMO_ADC16_CHANNEL_GROUP, &adc16ChannelConfigStruct);
while (!g_Adc16ConversionDoneFlag)
{
}
PRINTF("ADC Value: %d\r\n", g_Adc16ConversionValue);
PRINTF("ADC Interrupt Count: %d\r\n", g_Adc16InterruptCount);
}
// ...
void DEMO_ADC16_IRQHandler(void)
{
g_Adc16ConversionDoneFlag = true;
// Read conversion result to clear the conversion completed flag.
g_Adc16ConversionValue = ADC16_ChannelConversionValue(DEMO_ADC16_INSTANCE, DEMO_ADC16_CHANNEL_GROUP
);
g_Adc16InterruptCount++;
}

Files
• file fsl_adc16.h

Data Structures
• struct adc16_config_t
ADC16 converter configuration . More...

• struct adc16_hardware_compare_config_t
ADC16 Hardware compare configuration. More...

• struct adc16_channel_config_t
ADC16 channel conversion configuration. More...

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Typical use case

Enumerations
• enum _adc16_channel_status_flags { kADC16_ChannelConversionDoneFlag = ADC_SC1_COCO_MASK }
Channel status flags.

• enum _adc16_status_flags { kADC16_ActiveFlag = ADC_SC2_ADACT_MASK }
Converter status flags.

• enum adc16_clock_divider_t {
kADC16_ClockDivider1 = 0U,
kADC16_ClockDivider2 = 1U,
kADC16_ClockDivider4 = 2U,
kADC16_ClockDivider8 = 3U }
Clock divider for the converter.

• enum adc16_resolution_t {
kADC16_Resolution8or9Bit = 0U,
kADC16_Resolution12or13Bit = 1U,
kADC16_Resolution10or11Bit = 2U,
kADC16_ResolutionSE8Bit = kADC16_Resolution8or9Bit,
kADC16_ResolutionSE12Bit = kADC16_Resolution12or13Bit,
kADC16_ResolutionSE10Bit = kADC16_Resolution10or11Bit }
Converter’s resolution.

• enum adc16_clock_source_t {
kADC16_ClockSourceAlt0 = 0U,
kADC16_ClockSourceAlt1 = 1U,
kADC16_ClockSourceAlt2 = 2U,
kADC16_ClockSourceAlt3 = 3U,
kADC16_ClockSourceAsynchronousClock = kADC16_ClockSourceAlt3 }
Clock source.

• enum adc16_long_sample_mode_t {
kADC16_LongSampleCycle24 = 0U,
kADC16_LongSampleCycle16 = 1U,
kADC16_LongSampleCycle10 = 2U,
kADC16_LongSampleCycle6 = 3U,
kADC16_LongSampleDisabled = 4U }
Long sample mode.

• enum adc16_reference_voltage_source_t {
kADC16_ReferenceVoltageSourceVref = 0U,
kADC16_ReferenceVoltageSourceValt = 1U }
Reference voltage source.

• enum adc16_hardware_compare_mode_t {
kADC16_HardwareCompareMode0 = 0U,
kADC16_HardwareCompareMode1 = 1U,
kADC16_HardwareCompareMode2 = 2U,
kADC16_HardwareCompareMode3 = 3U }
Hardware compare mode.

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Data Structure Documentation

Driver version
• #define FSL_ADC16_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
ADC16 driver version 2.0.0.

Initialization
• void ADC16_Init (ADC_Type ∗base, const adc16_config_t ∗config)
Initializes the ADC16 module.

• void ADC16_Deinit (ADC_Type ∗base)
De-initializes the ADC16 module.

• void ADC16_GetDefaultConfig (adc16_config_t ∗config)
Gets an available pre-defined settings for converter’s configuration.

Advanced Feature
• static void ADC16_EnableHardwareTrigger (ADC_Type ∗base, bool enable)
Enables the hardware trigger mode.

• void ADC16_SetHardwareCompareConfig (ADC_Type ∗base, const adc16_hardware_compare_config_t ∗config)
Configures the hardware compare mode.

• uint32_t ADC16_GetStatusFlags (ADC_Type ∗base)
Gets the status flags of the converter.

• void ADC16_ClearStatusFlags (ADC_Type ∗base, uint32_t mask)
Clears the status flags of the converter.

Conversion Channel
• void ADC16_SetChannelConfig (ADC_Type ∗base, uint32_t channelGroup, const adc16_channel_config_t ∗config)
Configures the conversion channel.

• static uint32_t ADC16_GetChannelConversionValue (ADC_Type ∗base, uint32_t channelGroup)
Gets the conversion value.

• uint32_t ADC16_GetChannelStatusFlags (ADC_Type ∗base, uint32_t channelGroup)
Gets the status flags of channel.

5.3

Data Structure Documentation

5.3.1

struct adc16_config_t

Data Fields
• adc16_reference_voltage_source_t referenceVoltageSource
Select the reference voltage source.

• adc16_clock_source_t clockSource
Select the input clock source to converter.

• bool enableAsynchronousClock
Enable the asynchronous clock output.

• adc16_clock_divider_t clockDivider
Select the divider of input clock source.

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Data Structure Documentation
• adc16_resolution_t resolution
Select the sample resolution mode.

• adc16_long_sample_mode_t longSampleMode
Select the long sample mode.

• bool enableHighSpeed
Enable the high-speed mode.

• bool enableLowPower
Enable low power.

• bool enableContinuousConversion
Enable continuous conversion mode.
5.3.1.0.0.1

Field Documentation

5.3.1.0.0.1.1 adc16_reference_voltage_source_t adc16_config_t::referenceVoltageSource
5.3.1.0.0.1.2 adc16_clock_source_t adc16_config_t::clockSource
5.3.1.0.0.1.3

bool adc16_config_t::enableAsynchronousClock

5.3.1.0.0.1.4 adc16_clock_divider_t adc16_config_t::clockDivider
5.3.1.0.0.1.5 adc16_resolution_t adc16_config_t::resolution
5.3.1.0.0.1.6 adc16_long_sample_mode_t adc16_config_t::longSampleMode
5.3.1.0.0.1.7

bool adc16_config_t::enableHighSpeed

5.3.1.0.0.1.8

bool adc16_config_t::enableLowPower

5.3.1.0.0.1.9

bool adc16_config_t::enableContinuousConversion

5.3.2

struct adc16_hardware_compare_config_t

Data Fields
• adc16_hardware_compare_mode_t hardwareCompareMode
Select the hardware compare mode.

• int16_t value1
Setting value1 for hardware compare mode.

• int16_t value2
Setting value2 for hardware compare mode.
5.3.2.0.0.2

Field Documentation

5.3.2.0.0.2.1 adc16_hardware_compare_mode_t adc16_hardware_compare_config_t::hardwareCompareMode

See "adc16_hardware_compare_mode_t".

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Enumeration Type Documentation
5.3.2.0.0.2.2

int16_t adc16_hardware_compare_config_t::value1

5.3.2.0.0.2.3

int16_t adc16_hardware_compare_config_t::value2

5.3.3

struct adc16_channel_config_t

Data Fields
• uint32_t channelNumber
Setting the conversion channel number.

• bool enableInterruptOnConversionCompleted
Generate a interrupt request once the conversion is completed.
5.3.3.0.0.3
5.3.3.0.0.3.1

Field Documentation
uint32_t adc16_channel_config_t::channelNumber

The available range is 0-31. See channel connection information for each chip in Reference Manual
document.
5.3.3.0.0.3.2

5.4

bool adc16_channel_config_t::enableInterruptOnConversionCompleted

Macro Definition Documentation

5.4.1

5.5

#define FSL_ADC16_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Enumeration Type Documentation

5.5.1

enum _adc16_channel_status_flags

Enumerator
kADC16_ChannelConversionDoneFlag Conversion done.

5.5.2

enum _adc16_status_flags

Enumerator
kADC16_ActiveFlag Converter is active.

5.5.3

enum adc16_clock_divider_t

Enumerator
kADC16_ClockDivider1 For divider 1 from the input clock to the module.
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Enumeration Type Documentation
kADC16_ClockDivider2 For divider 2 from the input clock to the module.
kADC16_ClockDivider4 For divider 4 from the input clock to the module.
kADC16_ClockDivider8 For divider 8 from the input clock to the module.

5.5.4

enum adc16_resolution_t

Enumerator
kADC16_Resolution8or9Bit Single End 8-bit or Differential Sample 9-bit.
kADC16_Resolution12or13Bit Single End 12-bit or Differential Sample 13-bit.
kADC16_Resolution10or11Bit Single End 10-bit or Differential Sample 11-bit.
kADC16_ResolutionSE8Bit Single End 8-bit.
kADC16_ResolutionSE12Bit Single End 12-bit.
kADC16_ResolutionSE10Bit Single End 10-bit.

5.5.5

enum adc16_clock_source_t

Enumerator
kADC16_ClockSourceAlt0 Selection 0 of the clock source.
kADC16_ClockSourceAlt1 Selection 1 of the clock source.
kADC16_ClockSourceAlt2 Selection 2 of the clock source.
kADC16_ClockSourceAlt3 Selection 3 of the clock source.
kADC16_ClockSourceAsynchronousClock Using internal asynchronous clock.

5.5.6

enum adc16_long_sample_mode_t

Enumerator
kADC16_LongSampleCycle24 20 extra ADCK cycles, 24 ADCK cycles total.
kADC16_LongSampleCycle16 12 extra ADCK cycles, 16 ADCK cycles total.
kADC16_LongSampleCycle10 6 extra ADCK cycles, 10 ADCK cycles total.
kADC16_LongSampleCycle6 2 extra ADCK cycles, 6 ADCK cycles total.
kADC16_LongSampleDisabled Disable the long sample feature.

5.5.7

enum adc16_reference_voltage_source_t

Enumerator
kADC16_ReferenceVoltageSourceVref For external pins pair of VrefH and VrefL.
kADC16_ReferenceVoltageSourceValt For alternate reference pair of ValtH and ValtL.
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Function Documentation

5.5.8

enum adc16_hardware_compare_mode_t

Enumerator
kADC16_HardwareCompareMode0
kADC16_HardwareCompareMode1
kADC16_HardwareCompareMode2
value1 > x > value2.
kADC16_HardwareCompareMode3
value1 || x <= value2.

5.6
5.6.1

x < value1.
x > value1.
if value1 <= value2, then x < value1 || x > value2; else,
if value1 <= value2, then value1 <= x <= value2; else x >=

Function Documentation
void ADC16_Init ( ADC_Type ∗ base, const adc16_config_t ∗ config )

Parameters
base
config

5.6.2

ADC16 peripheral base address.
Pointer to configuration structure. See "adc16_config_t".

void ADC16_Deinit ( ADC_Type ∗ base )

Parameters
base

5.6.3

ADC16 peripheral base address.

void ADC16_GetDefaultConfig ( adc16_config_t ∗ config )

This function initializes the converter configuration structure with an available settings. The default values
are:
config->referenceVoltageSource
config->clockSource
;
config->enableAsynchronousClock
config->clockDivider
config->resolution
config->longSampleMode
config->enableHighSpeed
config->enableLowPower
config->enableContinuousConversion

= kADC16_ReferenceVoltageSourceVref;
= kADC16_ClockSourceAsynchronousClock
=
=
=
=
=
=
=

true;
kADC16_ClockDivider8;
kADC16_ResolutionSE12Bit;
kADC16_LongSampleDisabled;
false;
false;
false;

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Function Documentation
Parameters
config

5.6.4

Pointer to configuration structure.

static void ADC16_EnableHardwareTrigger ( ADC_Type ∗ base, bool enable )
[inline], [static]

Parameters
base
enable

5.6.5

ADC16 peripheral base address.
Switcher of hardware trigger feature. "true" means to enable, "false" means not.

void ADC16_SetHardwareCompareConfig ( ADC_Type ∗ base, const
adc16_hardware_compare_config_t ∗ config )

The hardware compare mode provides a way to process the conversion result automatically by hardware.
Only the result in compare range is available. To compare the range, see "adc16_hardware_compare_mode_t", or the reference manual document for more detailed information.
Parameters
base
config

5.6.6

ADC16 peripheral base address.
Pointer to "adc16_hardware_compare_config_t" structure. Passing "NULL" is to disable the feature.

uint32_t ADC16_GetStatusFlags ( ADC_Type ∗ base )

Parameters
base

ADC16 peripheral base address.

Returns
Flags’ mask if indicated flags are asserted. See "_adc16_status_flags".

5.6.7

void ADC16_ClearStatusFlags ( ADC_Type ∗ base, uint32_t mask )

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Function Documentation
Parameters

5.6.8

base

ADC16 peripheral base address.

mask

Mask value for the cleared flags. See "_adc16_status_flags".

void ADC16_SetChannelConfig ( ADC_Type ∗ base, uint32_t channelGroup,
const adc16_channel_config_t ∗ config )

This operation triggers the conversion if in software trigger mode. When in hardware trigger mode, this
API configures the channel while the external trigger source helps to trigger the conversion.
Note that the "Channel Group" has a detailed description. To allow sequential conversions of the ADC to
be triggered by internal peripherals, the ADC can have more than one group of status and control register,
one for each conversion. The channel group parameter indicates which group of registers are used channel
group 0 is for Group A registers and channel group 1 is for Group B registers. The channel groups are used
in a "ping-pong" approach to control the ADC operation. At any point, only one of the channel groups
is actively controlling ADC conversions. Channel group 0 is used for both software and hardware trigger
modes of operation. Channel groups 1 and greater indicate potentially multiple channel group registers
for use only in hardware trigger mode. See the chip configuration information in the MCU reference
manual about the number of SC1n registers (channel groups) specific to this device. None of the channel
groups 1 or greater are used for software trigger operation and therefore writes to these channel groups
do not initiate a new conversion. Updating channel group 0 while a different channel group is actively
controlling a conversion is allowed and vice versa. Writing any of the channel group registers while that
specific channel group is actively controlling a conversion aborts the current conversion.
Parameters
base
channelGroup
config

5.6.9

ADC16 peripheral base address.
Channel group index.
Pointer to "adc16_channel_config_t" structure for conversion channel.

static uint32_t ADC16_GetChannelConversionValue ( ADC_Type ∗ base,
uint32_t channelGroup ) [inline], [static]

Parameters

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Function Documentation
base
channelGroup

ADC16 peripheral base address.
Channel group index.

Returns
Conversion value.

5.6.10

uint32_t ADC16_GetChannelStatusFlags ( ADC_Type ∗ base, uint32_t
channelGroup )

Parameters
base
channelGroup

ADC16 peripheral base address.
Channel group index.

Returns
Flags’ mask if indicated flags are asserted. See "_adc16_channel_status_flags".

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Function Documentation

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Chapter 6
Clock Driver
6.1

Overview

The KSDK provides APIs for Kinetis devices clock operation.

6.2

Get frequency

There is a centralized function CLOCK_GetFreq to get different types of clock frequency by passing in
clock name, for example, pass in kCLOCK_CoreSysClk to get core clock, pass in kCLOCK_BusClk to
get bus clock. Beside, there are also separate functions to get frequency, for example, use CLOCK_GetCoreSysClkFreq to get core clock frequency, use CLOCK_GetBusClkFreq to get bus clock frequency, use
these separate functions could reduce image size.

6.3

External clock frequency

The external clock EXTAL0/EXTAL1/EXTAL32 are decided by board level design. Clock driver uses
variables g_xtal0Freq/g_xtal1Freq/g_xtal32Freq to save these clock frequency. Correspondingly, the APIs CLOCK_SetXtal0Freq, CLOCK_SetXtal1Freq and CLOCK_SetXtal32Freq are used to set these variables.
Upper layer must set these values correctly, for example, after OSC0(SYSOSC) is initialized using CLOCK_InitOsc0 or CLOCK_InitSysOsc, upper layer should call CLOCK_SetXtal0Freq too. Otherwise, the
clock frequency get functions may not get valid value. This is useful for multi-core platforms, only one
core calls CLOCK_InitOsc0 to initialize OSC0, other cores only need to call CLOCK_SetXtal0Freq.
The next section shows the MCG_Lite based APIs, the MCG based APIs are similar, will not explain in
this document.

Modules
• Multipurpose Clock Generator Lite (MCGLITE)

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Multipurpose Clock Generator Lite (MCGLITE)

6.4

Multipurpose Clock Generator Lite (MCGLITE)

6.4.1

Overview

The KSDK provides a peripheral driver for the MCG_Lite module of Kinetis devices.

6.4.2

Function description

The MCG_Lite driver provides three kinds of APIs:
1. APIs to get the MCG_Lite frequency.
2. APIs for MCG_Lite mode.
3. APIs for OSC setup.
6.4.2.1

MCG_Lite clock frequency

The CLOCK_GetOutClkFreq(), CLOCK_GetInternalRefClkFreq() and CLOCK_GetPeriphClkFreq()
functions are used to get the frequency of MCGOUTCLK, MCGIRCLK, and MCGPCLK based on the
current hardware setting.
6.4.2.2

MCG_Lite mode

The function CLOCK_GetMode() gets the current MCG_Lite mode.
The function CLOCK_SetMcgliteConfig() sets the MCG_Lite to a desired configuration. The MCG_Lite
can’t switch between the LIRC2M and LIRC8M. Instead, the function switches to the HIRC mode first
and then switches to the target mode.
6.4.2.3

OSC configuration

To enable the OSC clock, the MCG_Lite is needed together with the OSC module. The function CLOCK_InitOsc0() uses the MCG_Lite and the OSC to initialize the OSC. The OSC should be configured based
on the board design.

Data Structures
• struct sim_clock_config_t
SIM configuration structure for clock setting. More...

• struct oscer_config_t
OSC configuration for OSCERCLK. More...

• struct osc_config_t
OSC Initialization Configuration Structure. More...

• struct mcglite_config_t
MCG_Lite configure structure for mode change. More...

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Multipurpose Clock Generator Lite (MCGLITE)

Macros
• #define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
Clock driver version.

• #define DMAMUX_CLOCKS
Clock ip name array for DMAMUX.

• #define RTC_CLOCKS
Clock ip name array for RTC.

• #define SAI_CLOCKS
Clock ip name array for SAI.

• #define SPI_CLOCKS
Clock ip name array for SPI.

• #define SLCD_CLOCKS
Clock ip name array for SLCD.

• #define PIT_CLOCKS
Clock ip name array for PIT.

• #define PORT_CLOCKS
Clock ip name array for PORT.

• #define LPUART_CLOCKS
Clock ip name array for LPUART.

• #define DAC_CLOCKS
Clock ip name array for DAC.

• #define LPTMR_CLOCKS
Clock ip name array for LPTMR.

• #define ADC16_CLOCKS
Clock ip name array for ADC16.

• #define FLEXIO_CLOCKS
Clock ip name array for FLEXIO.

• #define VREF_CLOCKS
Clock ip name array for VREF.

• #define DMA_CLOCKS
Clock ip name array for DMA.

• #define UART_CLOCKS
Clock ip name array for UART.

• #define TPM_CLOCKS
Clock ip name array for TPM.

• #define I2C_CLOCKS
Clock ip name array for I2C.

• #define FTF_CLOCKS
Clock ip name array for FTF.

• #define CMP_CLOCKS
Clock ip name array for CMP.

• #define LPO_CLK_FREQ 1000U
LPO clock frequency.

• #define SYS_CLK kCLOCK_CoreSysClk
Peripherals clock source definition.

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Enumerations
• enum clock_name_t {
kCLOCK_CoreSysClk,
kCLOCK_PlatClk,
kCLOCK_BusClk,
kCLOCK_FlexBusClk,
kCLOCK_FlashClk,
kCLOCK_FastPeriphClk,
kCLOCK_PllFllSelClk,
kCLOCK_Er32kClk,
kCLOCK_Osc0ErClk,
kCLOCK_Osc1ErClk,
kCLOCK_Osc0ErClkUndiv,
kCLOCK_McgFixedFreqClk,
kCLOCK_McgInternalRefClk,
kCLOCK_McgFllClk,
kCLOCK_McgPll0Clk,
kCLOCK_McgPll1Clk,
kCLOCK_McgExtPllClk,
kCLOCK_McgPeriphClk,
kCLOCK_McgIrc48MClk,
kCLOCK_LpoClk }
Clock name used to get clock frequency.

• enum clock_usb_src_t {
kCLOCK_UsbSrcIrc48M = SIM_SOPT2_USBSRC(1U),
kCLOCK_UsbSrcExt = SIM_SOPT2_USBSRC(0U) }
USB clock source definition.

• enum clock_ip_name_t
Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

• enum _osc_cap_load {
kOSC_Cap2P = OSC_CR_SC2P_MASK,
kOSC_Cap4P = OSC_CR_SC4P_MASK,
kOSC_Cap8P = OSC_CR_SC8P_MASK,
kOSC_Cap16P = OSC_CR_SC16P_MASK }
Oscillator capacitor load setting.

• enum _oscer_enable_mode {
kOSC_ErClkEnable = OSC_CR_ERCLKEN_MASK,
kOSC_ErClkEnableInStop = OSC_CR_EREFSTEN_MASK }
OSCERCLK enable mode.

• enum osc_mode_t {
kOSC_ModeExt = 0U,
kOSC_ModeOscLowPower = MCG_C2_EREFS0_MASK,
kOSC_ModeOscHighGain = MCG_C2_EREFS0_MASK | MCG_C2_HGO0_MASK }
OSC work mode.

• enum mcglite_clkout_src_t {

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kMCGLITE_ClkSrcHirc,
kMCGLITE_ClkSrcLirc,
kMCGLITE_ClkSrcExt }
MCG_Lite clock source selection.

• enum mcglite_lirc_mode_t {
kMCGLITE_Lirc2M,
kMCGLITE_Lirc8M }
MCG_Lite LIRC select.

• enum mcglite_lirc_div_t {
kMCGLITE_LircDivBy1 = 0U,
kMCGLITE_LircDivBy2,
kMCGLITE_LircDivBy4,
kMCGLITE_LircDivBy8,
kMCGLITE_LircDivBy16,
kMCGLITE_LircDivBy32,
kMCGLITE_LircDivBy64,
kMCGLITE_LircDivBy128 }
MCG_Lite divider factor selection for clock source.

• enum mcglite_mode_t {
kMCGLITE_ModeHirc48M,
kMCGLITE_ModeLirc8M,
kMCGLITE_ModeLirc2M,
kMCGLITE_ModeExt,
kMCGLITE_ModeError }
MCG_Lite clock mode definitions.

• enum _mcglite_irclk_enable_mode {
kMCGLITE_IrclkEnable = MCG_C1_IRCLKEN_MASK,
kMCGLITE_IrclkEnableInStop = MCG_C1_IREFSTEN_MASK }
MCG internal reference clock (MCGIRCLK) enable mode definition.

Functions
• static void CLOCK_SetXtal0Freq (uint32_t freq)
Set the XTAL0 frequency based on board setting.

• static void CLOCK_SetXtal32Freq (uint32_t freq)
Set the XTAL32/RTC_CLKIN frequency based on board setting.

• static void CLOCK_EnableClock (clock_ip_name_t name)
Enable the clock for specific IP.

• static void CLOCK_DisableClock (clock_ip_name_t name)
Disable the clock for specific IP.

• static void CLOCK_SetEr32kClock (uint32_t src)
Set ERCLK32K source.

• static void CLOCK_SetLpuart0Clock (uint32_t src)
Set LPUART0 clock source.

• static void CLOCK_SetLpuart1Clock (uint32_t src)
Set LPUART1 clock source.

• static void CLOCK_SetTpmClock (uint32_t src)
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Set TPM clock source.

• static void CLOCK_SetFlexio0Clock (uint32_t src)
Set FLEXIO clock source.

• bool CLOCK_EnableUsbfs0Clock (clock_usb_src_t src, uint32_t freq)
Enable USB FS clock.

• static void CLOCK_DisableUsbfs0Clock (void)
Disable USB FS clock.

• static void CLOCK_SetClkOutClock (uint32_t src)
Set CLKOUT source.

• static void CLOCK_SetRtcClkOutClock (uint32_t src)
Set RTC_CLKOUT source.

• static void CLOCK_SetOutDiv (uint32_t outdiv1, uint32_t outdiv4)
System clock divider.

• uint32_t CLOCK_GetFreq (clock_name_t clockName)
Gets the clock frequency for a specific clock name.

• uint32_t CLOCK_GetCoreSysClkFreq (void)
Get the core clock or system clock frequency.

• uint32_t CLOCK_GetPlatClkFreq (void)
Get the platform clock frequency.

• uint32_t CLOCK_GetBusClkFreq (void)
Get the bus clock frequency.

• uint32_t CLOCK_GetFlashClkFreq (void)
Get the flash clock frequency.

• uint32_t CLOCK_GetEr32kClkFreq (void)
Get the external reference 32K clock frequency (ERCLK32K).

• uint32_t CLOCK_GetOsc0ErClkFreq (void)
Get the OSC0 external reference clock frequency (OSC0ERCLK).

• void CLOCK_SetSimConfig (sim_clock_config_t const ∗config)
Set the clock configure in SIM module.

• static void CLOCK_SetSimSafeDivs (void)
Set the system clock dividers in SIM to safe value.

Variables
• uint32_t g_xtal0Freq
External XTAL0 (OSC0) clock frequency.

• uint32_t g_xtal32Freq
External XTAL32/EXTAL32/RTC_CLKIN clock frequency.

MCG_Lite clock frequency
• uint32_t CLOCK_GetOutClkFreq (void)
Gets the MCG_Lite output clock (MCGOUTCLK) frequency.

• uint32_t CLOCK_GetInternalRefClkFreq (void)
Gets the MCG internal reference clock (MCGIRCLK) frequency.

• uint32_t CLOCK_GetPeriphClkFreq (void)
Gets the current MCGPCLK frequency.

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MCG_Lite mode.
• mcglite_mode_t CLOCK_GetMode (void)
Gets the current MCG_Lite mode.

• status_t CLOCK_SetMcgliteConfig (mcglite_config_t const ∗targetConfig)
Sets the MCG_Lite configuration.

OSC configuration
• static void OSC_SetExtRefClkConfig (OSC_Type ∗base, oscer_config_t const ∗config)
Configures the OSC external reference clock (OSCERCLK).

• static void OSC_SetCapLoad (OSC_Type ∗base, uint8_t capLoad)
Sets the capacitor load configuration for the oscillator.

• void CLOCK_InitOsc0 (osc_config_t const ∗config)
Initialize OSC0.

• void CLOCK_DeinitOsc0 (void)
Deinitializes the OSC0.

6.4.3
6.4.3.1

Data Structure Documentation
struct sim_clock_config_t

Data Fields

• uint8_t er32kSrc
ERCLK32K source selection.

• uint32_t clkdiv1
SIM_CLKDIV1.
6.4.3.1.0.4

Field Documentation

6.4.3.1.0.4.1

uint8_t sim_clock_config_t::er32kSrc

6.4.3.1.0.4.2

uint32_t sim_clock_config_t::clkdiv1

6.4.3.2

struct oscer_config_t

Data Fields

• uint8_t enableMode
OSCERCLK enable mode.
6.4.3.2.0.5
6.4.3.2.0.5.1

Field Documentation
uint8_t oscer_config_t::enableMode

OR’ed value of _oscer_enable_mode.
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6.4.3.3

struct osc_config_t

Defines the configuration data structure to initialize the OSC. When porting to a new board, set the following members according to board settings:
1. freq: The external frequency.
2. workMode: The OSC module mode.
Data Fields

• uint32_t freq
External clock frequency.

• uint8_t capLoad
Capacitor load setting.

• osc_mode_t workMode
OSC work mode setting.

• oscer_config_t oscerConfig
Configuration for OSCERCLK.
6.4.3.3.0.6

Field Documentation

6.4.3.3.0.6.1

uint32_t osc_config_t::freq

6.4.3.3.0.6.2

uint8_t osc_config_t::capLoad

6.4.3.3.0.6.3 osc_mode_t osc_config_t::workMode
6.4.3.3.0.6.4 oscer_config_t osc_config_t::oscerConfig

6.4.3.4

struct mcglite_config_t

Data Fields

• mcglite_clkout_src_t outSrc
MCGOUT clock select.

• uint8_t irclkEnableMode
MCGIRCLK enable mode, OR’ed value of _mcglite_irclk_enable_mode.

• mcglite_lirc_mode_t ircs
MCG_C2[IRCS].

• mcglite_lirc_div_t fcrdiv
MCG_SC[FCRDIV].

• mcglite_lirc_div_t lircDiv2
MCG_MC[LIRC_DIV2].

• bool hircEnableInNotHircMode
HIRC enable when not in HIRC mode.

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6.4.3.4.0.7

Field Documentation

6.4.3.4.0.7.1 mcglite_clkout_src_t mcglite_config_t::outSrc
6.4.3.4.0.7.2

uint8_t mcglite_config_t::irclkEnableMode

6.4.3.4.0.7.3 mcglite_lirc_mode_t mcglite_config_t::ircs
6.4.3.4.0.7.4 mcglite_lirc_div_t mcglite_config_t::fcrdiv
6.4.3.4.0.7.5 mcglite_lirc_div_t mcglite_config_t::lircDiv2
6.4.3.4.0.7.6

6.4.4
6.4.4.1

bool mcglite_config_t::hircEnableInNotHircMode

Macro Definition Documentation
#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

Version 2.1.0.
6.4.4.2

#define DMAMUX_CLOCKS

Value:
\
kCLOCK_Dmamux0 \

{
}

6.4.4.3

#define RTC_CLOCKS

Value:
\
kCLOCK_Rtc0 \

{
}

6.4.4.4

#define SAI_CLOCKS

Value:
\
kCLOCK_Sai0 \

{
}

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6.4.4.5

#define SPI_CLOCKS

Value:
\
kCLOCK_Spi0, kCLOCK_Spi1 \

{
}

6.4.4.6

#define SLCD_CLOCKS

Value:
\
kCLOCK_Slcd0 \

{
}

6.4.4.7

#define PIT_CLOCKS

Value:
\
kCLOCK_Pit0 \

{
}

6.4.4.8

#define PORT_CLOCKS

Value:
\
kCLOCK_PortA, kCLOCK_PortB, kCLOCK_PortC, kCLOCK_PortD, kCLOCK_PortE \

{
}

6.4.4.9

#define LPUART_CLOCKS

Value:
\
kCLOCK_Lpuart0, kCLOCK_Lpuart1 \

{
}

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6.4.4.10

#define DAC_CLOCKS

Value:
\
kCLOCK_Dac0 \

{
}

6.4.4.11

#define LPTMR_CLOCKS

Value:
\
kCLOCK_Lptmr0 \

{
}

6.4.4.12

#define ADC16_CLOCKS

Value:
\
kCLOCK_Adc0

{

\

}

6.4.4.13

#define FLEXIO_CLOCKS

Value:
\
kCLOCK_Flexio0 \

{
}

6.4.4.14

#define VREF_CLOCKS

Value:
\
kCLOCK_Vref0 \

{
}

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6.4.4.15

#define DMA_CLOCKS

Value:
\
kCLOCK_Dma0 \

{
}

6.4.4.16

#define UART_CLOCKS

Value:
\
kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_Uart2 \

{
}

6.4.4.17

#define TPM_CLOCKS

Value:
\
kCLOCK_Tpm0, kCLOCK_Tpm1, kCLOCK_Tpm2 \

{
}

6.4.4.18

#define I2C_CLOCKS

Value:
\
kCLOCK_I2c0, kCLOCK_I2c1 \

{
}

6.4.4.19

#define FTF_CLOCKS

Value:
\
kCLOCK_Ftf0 \

{
}

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6.4.4.20

#define CMP_CLOCKS

Value:
\
kCLOCK_Cmp0, kCLOCK_Cmp1, kCLOCK_Cmp2 \

{
}

#define SYS_CLK kCLOCK_CoreSysClk

6.4.4.21

6.4.5
6.4.5.1

Enumeration Type Documentation
enum clock_name_t

Enumerator
kCLOCK_CoreSysClk Core/system clock.
kCLOCK_PlatClk Platform clock.
kCLOCK_BusClk Bus clock.
kCLOCK_FlexBusClk FlexBus clock.
kCLOCK_FlashClk Flash clock.
kCLOCK_FastPeriphClk Fast peripheral clock.
kCLOCK_PllFllSelClk The clock after SIM[PLLFLLSEL].
kCLOCK_Er32kClk External reference 32K clock (ERCLK32K)
kCLOCK_Osc0ErClk OSC0 external reference clock (OSC0ERCLK)
kCLOCK_Osc1ErClk OSC1 external reference clock (OSC1ERCLK)
kCLOCK_Osc0ErClkUndiv OSC0 external reference undivided clock(OSC0ERCLK_UNDIV).
kCLOCK_McgFixedFreqClk MCG fixed frequency clock (MCGFFCLK)
kCLOCK_McgInternalRefClk MCG internal reference clock (MCGIRCLK)
kCLOCK_McgFllClk MCGFLLCLK.
kCLOCK_McgPll0Clk MCGPLL0CLK.
kCLOCK_McgPll1Clk MCGPLL1CLK.
kCLOCK_McgExtPllClk EXT_PLLCLK.
kCLOCK_McgPeriphClk MCG peripheral clock (MCGPCLK)
kCLOCK_McgIrc48MClk MCG IRC48M clock.
kCLOCK_LpoClk LPO clock.

6.4.5.2

enum clock_usb_src_t

Enumerator
kCLOCK_UsbSrcIrc48M Use IRC48M.
kCLOCK_UsbSrcExt Use USB_CLKIN.

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6.4.5.3

enum clock_ip_name_t

6.4.5.4

enum _osc_cap_load

Enumerator
kOSC_Cap2P 2 pF capacitor load
kOSC_Cap4P 4 pF capacitor load
kOSC_Cap8P 8 pF capacitor load
kOSC_Cap16P 16 pF capacitor load

6.4.5.5

enum _oscer_enable_mode

Enumerator
kOSC_ErClkEnable Enable.
kOSC_ErClkEnableInStop Enable in stop mode.

6.4.5.6

enum osc_mode_t

Enumerator
kOSC_ModeExt Use external clock.
kOSC_ModeOscLowPower Oscillator low power.
kOSC_ModeOscHighGain Oscillator high gain.

6.4.5.7

enum mcglite_clkout_src_t

Enumerator
kMCGLITE_ClkSrcHirc MCGOUTCLK source is HIRC.
kMCGLITE_ClkSrcLirc MCGOUTCLK source is LIRC.
kMCGLITE_ClkSrcExt MCGOUTCLK source is external clock source.

6.4.5.8

enum mcglite_lirc_mode_t

Enumerator
kMCGLITE_Lirc2M Slow internal reference(LIRC) 2MHz clock selected.
kMCGLITE_Lirc8M Slow internal reference(LIRC) 8MHz clock selected.

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enum mcglite_lirc_div_t

6.4.5.9

Enumerator
kMCGLITE_LircDivBy1 Divider is 1.
kMCGLITE_LircDivBy2 Divider is 2.
kMCGLITE_LircDivBy4 Divider is 4.
kMCGLITE_LircDivBy8 Divider is 8.
kMCGLITE_LircDivBy16 Divider is 16.
kMCGLITE_LircDivBy32 Divider is 32.
kMCGLITE_LircDivBy64 Divider is 64.
kMCGLITE_LircDivBy128 Divider is 128.

enum mcglite_mode_t

6.4.5.10

Enumerator
kMCGLITE_ModeHirc48M Clock mode is HIRC 48 M.
kMCGLITE_ModeLirc8M Clock mode is LIRC 8 M.
kMCGLITE_ModeLirc2M Clock mode is LIRC 2 M.
kMCGLITE_ModeExt Clock mode is EXT.
kMCGLITE_ModeError Unknown mode.

enum _mcglite_irclk_enable_mode

6.4.5.11

Enumerator
kMCGLITE_IrclkEnable MCGIRCLK enable.
kMCGLITE_IrclkEnableInStop MCGIRCLK enable in stop mode.

6.4.6
6.4.6.1

Function Documentation
static void CLOCK_SetXtal0Freq ( uint32_t freq ) [inline], [static]

Parameters
freq

6.4.6.2

The XTAL0/EXTAL0 input clock frequency in Hz.

static void CLOCK_SetXtal32Freq ( uint32_t freq ) [inline], [static]

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Parameters
freq

6.4.6.3

The XTAL32/EXTAL32/RTC_CLKIN input clock frequency in Hz.

static void CLOCK_EnableClock ( clock_ip_name_t name ) [inline],

[static]
Parameters
name

6.4.6.4

Which clock to enable, see clock_ip_name_t.

static void CLOCK_DisableClock ( clock_ip_name_t name ) [inline],

[static]
Parameters
name

6.4.6.5

Which clock to disable, see clock_ip_name_t.

static void CLOCK_SetEr32kClock ( uint32_t src ) [inline], [static]

Parameters
src

6.4.6.6

The value to set ERCLK32K clock source.

static void CLOCK_SetLpuart0Clock ( uint32_t src ) [inline], [static]

Parameters
src

6.4.6.7

The value to set LPUART0 clock source.

static void CLOCK_SetLpuart1Clock ( uint32_t src ) [inline], [static]

Parameters

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src

6.4.6.8

The value to set LPUART1 clock source.

static void CLOCK_SetTpmClock ( uint32_t src ) [inline], [static]

Parameters
src

6.4.6.9

The value to set TPM clock source.

static void CLOCK_SetFlexio0Clock ( uint32_t src ) [inline], [static]

Parameters
src

6.4.6.10

The value to set FLEXIO clock source.

bool CLOCK_EnableUsbfs0Clock ( clock_usb_src_t src, uint32_t freq )

Parameters
src
freq

USB FS clock source.
The frequency specified by src.

Return values

6.4.6.11

true

The clock is set successfully.

false

The clock source is invalid to get proper USB FS clock.

static void CLOCK_DisableUsbfs0Clock ( void ) [inline], [static]

Disable USB FS clock.
6.4.6.12

static void CLOCK_SetClkOutClock ( uint32_t src ) [inline], [static]

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Parameters
src

6.4.6.13

The value to set CLKOUT source.

static void CLOCK_SetRtcClkOutClock ( uint32_t src ) [inline], [static]

Parameters
src

6.4.6.14

The value to set RTC_CLKOUT source.

static void CLOCK_SetOutDiv ( uint32_t outdiv1, uint32_t outdiv4 ) [inline],

[static]
Set the SIM_CLKDIV1[OUTDIV1], SIM_CLKDIV1[OUTDIV4].
Parameters
outdiv1

Clock 1 output divider value.

outdiv4

Clock 4 output divider value.

6.4.6.15

uint32_t CLOCK_GetFreq ( clock_name_t clockName )

This function checks the current clock configurations and then calculates the clock frequency for a specific
clock name defined in clock_name_t. The MCG must be properly configured before using this function.
Parameters
clockName

Clock names defined in clock_name_t

Returns
Clock frequency value in Hertz

6.4.6.16

uint32_t CLOCK_GetCoreSysClkFreq ( void )

Returns
Clock frequency in Hz.

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6.4.6.17

uint32_t CLOCK_GetPlatClkFreq ( void )

Returns
Clock frequency in Hz.

6.4.6.18

uint32_t CLOCK_GetBusClkFreq ( void )

Returns
Clock frequency in Hz.

6.4.6.19

uint32_t CLOCK_GetFlashClkFreq ( void )

Returns
Clock frequency in Hz.

6.4.6.20

uint32_t CLOCK_GetEr32kClkFreq ( void )

Returns
Clock frequency in Hz.

6.4.6.21

uint32_t CLOCK_GetOsc0ErClkFreq ( void )

Returns
Clock frequency in Hz.

void CLOCK_SetSimConfig ( sim_clock_config_t const ∗ config )

6.4.6.22

This function sets system layer clock settings in SIM module.
Parameters
config

Pointer to the configure structure.

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6.4.6.23

static void CLOCK_SetSimSafeDivs ( void ) [inline], [static]

The system level clocks (core clock, bus clock, flexbus clock and flash clock) must be in allowed ranges.
During MCG clock mode switch, the MCG output clock changes then the system level clocks may be out
of range. This function could be used before MCG mode change, to make sure system level clocks are in
allowed range.

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Multipurpose Clock Generator Lite (MCGLITE)
Parameters
config

6.4.6.24

Pointer to the configure structure.

uint32_t CLOCK_GetOutClkFreq ( void )

This function gets the MCG_Lite output clock frequency (Hz) based on the current MCG_Lite register
value.
Returns
The frequency of MCGOUTCLK.

6.4.6.25

uint32_t CLOCK_GetInternalRefClkFreq ( void )

This function gets the MCG_Lite internal reference clock frequency (Hz) based on the current MCG
register value.
Returns
The frequency of MCGIRCLK.

6.4.6.26

uint32_t CLOCK_GetPeriphClkFreq ( void )

This function gets the MCGPCLK frequency (Hertz) based on the current MCG_Lite register settings.
Returns
The frequency of MCGPCLK.

6.4.6.27 mcglite_mode_t CLOCK_GetMode ( void )

This function checks the MCG_Lite registers and determines the current MCG_Lite mode.
Returns
Current MCG_Lite mode or error code.

6.4.6.28

status_t CLOCK_SetMcgliteConfig ( mcglite_config_t const ∗ targetConfig )

This function configures the MCG_Lite, include output clock source, MCGIRCLK setting, HIRC setting
and so on, see mcglite_config_t for details.
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Multipurpose Clock Generator Lite (MCGLITE)
Parameters
targetConfig

Pointer to the target MCG_Lite mode configuration structure.

Returns
Error code.

static void OSC_SetExtRefClkConfig ( OSC_Type ∗ base, oscer_config_t const ∗
config ) [inline], [static]

6.4.6.29

This function configures the OSC external reference clock (OSCERCLK). For example, to enable the
OSCERCLK in normal mode and stop mode, and also set the output divider to 1, as follows:
oscer_config_t config =
{
.enableMode = kOSC_ErClkEnable |
kOSC_ErClkEnableInStop,
.erclkDiv
= 1U,
};
OSC_SetExtRefClkConfig(OSC, &config);

Parameters
base
config

6.4.6.30

OSC peripheral address.
Pointer to the configuration structure.

static void OSC_SetCapLoad ( OSC_Type ∗ base, uint8_t capLoad )

[inline], [static]
This function sets the specified capacitors configuration for the oscillator. This should be done in the early
system level initialization function call based on the system configuration.
Parameters
base
capLoad

OSC peripheral address.
OR’ed value for the capacitor load option, see _osc_cap_load.

Example:
// To enable only 2 pF and 8 pF capacitor load, please use like this.
OSC_SetCapLoad(OSC, kOSC_Cap2P | kOSC_Cap8P);

6.4.6.31

void CLOCK_InitOsc0 ( osc_config_t const ∗ config )

This function initializes the OSC0 according to the board configuration.
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Multipurpose Clock Generator Lite (MCGLITE)
Parameters
config

6.4.6.32

Pointer to the OSC0 configuration structure.

void CLOCK_DeinitOsc0 ( void )

This function deinitializes the OSC0.

6.4.7
6.4.7.1

Variable Documentation
uint32_t g_xtal0Freq

The XTAL0/EXTAL0 (OSC0) clock frequency in Hz, when the clock is setup, use the function CLOCK_SetXtal0Freq to set the value in to clock driver. For example, if XTAL0 is 8MHz,
CLOCK_InitOsc0(...); // Setup the OSC0
CLOCK_SetXtal0Freq(80000000); // Set the XTAL0 value to clock driver.

This is important for the multicore platforms, only one core needs to setup OSC0 using CLOCK_InitOsc0,
all other cores need to call CLOCK_SetXtal0Freq to get valid clock frequency.
6.4.7.2

uint32_t g_xtal32Freq

The XTAL32/EXTAL32/RTC_CLKIN clock frequency in Hz, when the clock is setup, use the function
CLOCK_SetXtal32Freq to set the value in to clock driver.
This is important for the multicore platforms, only one core needs to setup the clock, all other cores need
to call CLOCK_SetXtal32Freq to get valid clock frequency.

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Multipurpose Clock Generator Lite (MCGLITE)

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Chapter 7
CMP: Analog Comparator Driver
7.1

Overview

The KSDK provides a peripheral driver for the Analog Comparator (CMP) module of Kinetis devices.

Overview
The CMP driver is a basic comparator with advanced features. The APIs for the basic comparator enable
the CMP as a general comparator, which compares the two voltage of the two input channels and creates
the output of the comparator result. The APIs for advanced features can be used as the plug-in function
based on the basic comparator. They can process the comparator’s output with hardware support.

7.2

Typical use case

7.2.1

Polling Configuration

int main(void)
{
cmp_config_t mCmpConfigStruct;
cmp_dac_config_t mCmpDacConfigStruct;
// ...
// Configures the comparator.
CMP_Init(DEMO_CMP_INSTANCE);
CMP_GetDefaultConfig(&mCmpConfigStruct);
CMP_Configure(DEMO_CMP_INSTANCE, &mCmpConfigStruct);
// Configures the DAC channel.
mCmpDacConfigStruct.referenceVoltageSource =
kCMP_VrefSourceVin2; // VCC.
mCmpDacConfigStruct.DACValue = 32U; // Half voltage of logic high level.
CMP_SetDACConfig(DEMO_CMP_INSTANCE, &mCmpDacConfigStruct);
CMP_SetInputChannels(DEMO_CMP_INSTANCE, DEMO_CMP_USER_CHANNEL, DEMO_CMP_DAC_CHANNEL
);
while (1)
{
if (0U != (kCMP_OutputAssertEventFlag &
CMP_GetStatusFlags(DEMO_CMP_INSTANCE)))
{
// Do something.
}
else
{
// Do something.
}
}
}

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Typical use case

7.2.2

Interrupt Configuration

volatile uint32_t g_CmpFlags = 0U;
// ...
void DEMO_CMP_IRQ_HANDLER_FUNC(void)
{
g_CmpFlags = CMP_GetStatusFlags(DEMO_CMP_INSTANCE);
CMP_ClearStatusFlags(DEMO_CMP_INSTANCE, kCMP_OutputRisingEventFlag |
kCMP_OutputFallingEventFlag);
if (0U != (g_CmpFlags & kCMP_OutputRisingEventFlag))
{
// Do something.
}
else if (0U != (g_CmpFlags & kCMP_OutputFallingEventFlag))
{
// Do something.
}
}
int main(void)
{
cmp_config_t mCmpConfigStruct;
cmp_dac_config_t mCmpDacConfigStruct;
// ...
EnableIRQ(DEMO_CMP_IRQ_ID);
// ...
// Configures the comparator.
CMP_Init(DEMO_CMP_INSTANCE);
CMP_GetDefaultConfig(&mCmpConfigStruct);
CMP_Configure(DEMO_CMP_INSTANCE, &mCmpConfigStruct);
// Configures the DAC channel.
mCmpDacConfigStruct.referenceVoltageSource =
kCMP_VrefSourceVin2; // VCC.
mCmpDacConfigStruct.DACValue = 32U; // Half voltage of logic high level.
CMP_SetDACConfig(DEMO_CMP_INSTANCE, &mCmpDacConfigStruct);
CMP_SetInputChannels(DEMO_CMP_INSTANCE, DEMO_CMP_USER_CHANNEL, DEMO_CMP_DAC_CHANNEL
);
// Enables the output rising and falling interrupts.
CMP_EnableInterrupts(DEMO_CMP_INSTANCE,
kCMP_OutputRisingInterruptEnable |
kCMP_OutputFallingInterruptEnable);
while (1)
{
}
}

Files
• file fsl_cmp.h

Data Structures
• struct cmp_config_t
Configure the comparator. More...

• struct cmp_filter_config_t
Configure the filter. More...

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Typical use case
• struct cmp_dac_config_t
Configure the internal DAC. More...

Enumerations
• enum _cmp_interrupt_enable {
kCMP_OutputRisingInterruptEnable = CMP_SCR_IER_MASK,
kCMP_OutputFallingInterruptEnable = CMP_SCR_IEF_MASK }
Interrupt enable/disable mask.

• enum _cmp_status_flags {
kCMP_OutputRisingEventFlag = CMP_SCR_CFR_MASK,
kCMP_OutputFallingEventFlag = CMP_SCR_CFF_MASK,
kCMP_OutputAssertEventFlag = CMP_SCR_COUT_MASK }
Status flags’ mask.

• enum cmp_hysteresis_mode_t {
kCMP_HysteresisLevel0 = 0U,
kCMP_HysteresisLevel1 = 1U,
kCMP_HysteresisLevel2 = 2U,
kCMP_HysteresisLevel3 = 3U }
CMP Hysteresis mode.

• enum cmp_reference_voltage_source_t {
kCMP_VrefSourceVin1 = 0U,
kCMP_VrefSourceVin2 = 1U }
CMP Voltage Reference source.

Driver version
• #define FSL_CMP_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
CMP driver version 2.0.0.

Initialization
• void CMP_Init (CMP_Type ∗base, const cmp_config_t ∗config)
Initializes the CMP.

• void CMP_Deinit (CMP_Type ∗base)
De-initializes the CMP module.

• static void CMP_Enable (CMP_Type ∗base, bool enable)
Enables/disables the CMP module.

• void CMP_GetDefaultConfig (cmp_config_t ∗config)
Initializes the CMP user configuration structure.

• void CMP_SetInputChannels (CMP_Type ∗base, uint8_t positiveChannel, uint8_t negativeChannel)
Sets the input channels for the comparator.

Advanced Features
• void CMP_SetFilterConfig (CMP_Type ∗base, const cmp_filter_config_t ∗config)
Configures the filter.

• void CMP_SetDACConfig (CMP_Type ∗base, const cmp_dac_config_t ∗config)
Configures the internal DAC.

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Data Structure Documentation
• void CMP_EnableInterrupts (CMP_Type ∗base, uint32_t mask)
Enables the interrupts.

• void CMP_DisableInterrupts (CMP_Type ∗base, uint32_t mask)
Disables the interrupts.

Results
• uint32_t CMP_GetStatusFlags (CMP_Type ∗base)
Gets the status flags.

• void CMP_ClearStatusFlags (CMP_Type ∗base, uint32_t mask)
Clears the status flags.

7.3

Data Structure Documentation

7.3.1

struct cmp_config_t

Data Fields
• bool enableCmp
Enable the CMP module.

• cmp_hysteresis_mode_t hysteresisMode
CMP Hysteresis mode.

• bool enableHighSpeed
Enable High Speed (HS) comparison mode.

• bool enableInvertOutput
Enable inverted comparator output.

• bool useUnfilteredOutput
Set compare output(COUT) to equal COUTA(true) or COUT(false).

• bool enablePinOut
The comparator output is available on the associated pin.

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Data Structure Documentation
7.3.1.0.0.8

Field Documentation

7.3.1.0.0.8.1

bool cmp_config_t::enableCmp

7.3.1.0.0.8.2 cmp_hysteresis_mode_t cmp_config_t::hysteresisMode
7.3.1.0.0.8.3

bool cmp_config_t::enableHighSpeed

7.3.1.0.0.8.4

bool cmp_config_t::enableInvertOutput

7.3.1.0.0.8.5

bool cmp_config_t::useUnfilteredOutput

7.3.1.0.0.8.6

bool cmp_config_t::enablePinOut

7.3.2

struct cmp_filter_config_t

Data Fields
• uint8_t filterCount
Filter Sample Count.

• uint8_t filterPeriod
Filter Sample Period.
7.3.2.0.0.9

Field Documentation

7.3.2.0.0.9.1

uint8_t cmp_filter_config_t::filterCount

Available range is 1-7, 0 would cause the filter disabled.
7.3.2.0.0.9.2

uint8_t cmp_filter_config_t::filterPeriod

The divider to bus clock. Available range is 0-255.

7.3.3

struct cmp_dac_config_t

Data Fields
• cmp_reference_voltage_source_t referenceVoltageSource
Supply voltage reference source.

• uint8_t DACValue
Value for DAC Output Voltage.

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Enumeration Type Documentation
7.3.3.0.0.10

Field Documentation

7.3.3.0.0.10.1 cmp_reference_voltage_source_t cmp_dac_config_t::referenceVoltageSource
7.3.3.0.0.10.2

uint8_t cmp_dac_config_t::DACValue

Available range is 0-63.

7.4

Macro Definition Documentation

7.4.1

7.5

#define FSL_CMP_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Enumeration Type Documentation

7.5.1

enum _cmp_interrupt_enable

Enumerator
kCMP_OutputRisingInterruptEnable Comparator interrupt enable rising.
kCMP_OutputFallingInterruptEnable Comparator interrupt enable falling.

7.5.2

enum _cmp_status_flags

Enumerator
kCMP_OutputRisingEventFlag Rising-edge on compare output has occurred.
kCMP_OutputFallingEventFlag Falling-edge on compare output has occurred.
kCMP_OutputAssertEventFlag Return the current value of the analog comparator output.

7.5.3

enum cmp_hysteresis_mode_t

Enumerator
kCMP_HysteresisLevel0
kCMP_HysteresisLevel1
kCMP_HysteresisLevel2
kCMP_HysteresisLevel3

7.5.4

Hysteresis level 0.
Hysteresis level 1.
Hysteresis level 2.
Hysteresis level 3.

enum cmp_reference_voltage_source_t

Enumerator
kCMP_VrefSourceVin1 Vin1 is selected as resistor ladder network supply reference Vin.
kCMP_VrefSourceVin2 Vin2 is selected as resistor ladder network supply reference Vin.
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Function Documentation

7.6

Function Documentation

7.6.1

void CMP_Init ( CMP_Type ∗ base, const cmp_config_t ∗ config )

This function initializes the CMP module. The operations included are:
• Enabling the clock for CMP module.
• Configuring the comparator.
• Enabling the CMP module. Note: For some devices, multiple CMP instance share the same clock
gate. In this case, to enable the clock for any instance enables all the CMPs. Check the chip reference
manual for the clock assignment of the CMP.
Parameters
base
config

7.6.2

CMP peripheral base address.
Pointer to configuration structure.

void CMP_Deinit ( CMP_Type ∗ base )

This function de-initializes the CMP module. The operations included are:
• Disabling the CMP module.
• Disabling the clock for CMP module.
This function disables the clock for the CMP. Note: For some devices, multiple CMP instance shares the
same clock gate. In this case, before disabling the clock for the CMP, ensure that all the CMP instances
are not used.
Parameters
base

7.6.3

CMP peripheral base address.

static void CMP_Enable ( CMP_Type ∗ base, bool enable ) [inline],

[static]
Parameters
base

CMP peripheral base address.

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Function Documentation
enable

7.6.4

Enable the module or not.

void CMP_GetDefaultConfig ( cmp_config_t ∗ config )

This function initializes the user configure structure to these default values:
config->enableCmp
config->hysteresisMode
config->enableHighSpeed
config->enableInvertOutput
config->useUnfilteredOutput
config->enablePinOut
config->enableTriggerMode

=
=
=
=
=
=
=

true;
kCMP_HysteresisLevel0;
false;
false;
false;
false;
false;

Parameters
config

7.6.5

Pointer to the configuration structure.

void CMP_SetInputChannels ( CMP_Type ∗ base, uint8_t positiveChannel,
uint8_t negativeChannel )

This function sets the input channels for the comparator. Note that two input channels cannot be set as
same in the application. When the user selects the same input from the analog mux to the positive and
negative port, the comparator is disabled automatically.
Parameters
base

7.6.6

CMP peripheral base address.

positiveChannel

Positive side input channel number. Available range is 0-7.

negativeChannel

Negative side input channel number. Available range is 0-7.

void CMP_SetFilterConfig ( CMP_Type ∗ base, const cmp_filter_config_t ∗
config )

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Function Documentation
Parameters
base
config

7.6.7

CMP peripheral base address.
Pointer to configuration structure.

void CMP_SetDACConfig ( CMP_Type ∗ base, const cmp_dac_config_t ∗
config )

Parameters
base
config

7.6.8

CMP peripheral base address.
Pointer to configuration structure. "NULL" is for disabling the feature.

void CMP_EnableInterrupts ( CMP_Type ∗ base, uint32_t mask )

Parameters

7.6.9

base

CMP peripheral base address.

mask

Mask value for interrupts. See "_cmp_interrupt_enable".

void CMP_DisableInterrupts ( CMP_Type ∗ base, uint32_t mask )

Parameters

7.6.10

base

CMP peripheral base address.

mask

Mask value for interrupts. See "_cmp_interrupt_enable".

uint32_t CMP_GetStatusFlags ( CMP_Type ∗ base )

Parameters

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Function Documentation
base

CMP peripheral base address.

Returns
Mask value for the asserted flags. See "_cmp_status_flags".

7.6.11

void CMP_ClearStatusFlags ( CMP_Type ∗ base, uint32_t mask )

Parameters
base

CMP peripheral base address.

mask

Mask value for the flags. See "_cmp_status_flags".

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Chapter 8
CMT: Carrier Modulator Transmitter Driver
8.1

Overview

The carrier modulator transmitter (CMT) module provides the means to generate the protocol timing and
carrier signals for a side variety of encoding schemes. The CMT incorporates hardware to off-load the
critical and/or lengthy timing requirements associated with signal generation from the CPU. The KSDK
provides a driver for the CMT module of the Kinetis devices.

8.2

Clock formulas

The CMT module has internal clock dividers. It was originally designed to be based on an 8 MHZ bus
clock that could be divided by 1, 2, 4, or 8 according to the specification. To be compatible with higher
bus frequency, the primary prescaler (PPS) was developed to receive a higher frequency and generate a
clock enable signal called an intermediate frequency (IF). The IF must be approximately equal to 8MHz
and works as a clock enable to the secondary prescaler. For the PPS, the prescaler is selected according
to the bus clock to generate an intermediate clock approximately to 8 MHz and is selected as (bus_clock_hz/8000000). The secondary prescaler is the "cmtDivider". The clocks for the CMT module are listed
below:
1. CMT clock frequency = bus_clock_Hz / (bus_clock_Hz / 8000000) / cmtDivider
2. CMT carrier and generator frequency = CMT clock frequency / (highCount1 + lowCount1)
(In FSK mode, the second frequency = CMT clock frequency / (highCount2 + lowCount2))
3. CMT infrared output signal frequency
a. In Time and Baseband mode
CMT IRO signal mark time = (markCount + 1) / (CMT clock frequency / 8)
CMT IRO signal space time = spaceCount / (CMT clock frequency / 8)
b. In FSK mode
CMT IRO signal mark time = (markCount + 1) / CMT carrier and generator frequency
CMT IRO signal space time = spaceCount / CMT carrier and generator frequency

8.3

Typical use case

This is an example code to initialize the data:
cmt_config_t config;
cmt_modulate_config_t modulateConfig;
uint32_t busClock;
// Gets the bus clock for the CMT module.
busClock = CLOCK_GetFreq(kCLOCK_BusClk);
CMT_GetDefaultConfig(&config);
// Interrupts is enabled to change the modulate mark and space count.
config.isInterruptEnabled = true;

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Typical use case
CMT_Init(CMT, &config, busClock);
// Prepares the modulate configuration for a user case.
modulateConfig->highCount1 = ...;
modulateConfig->lowCount1 = ...;
modulateConfig->markCount = ...;
modulateConfig->spaceCount = ...;
// Sets the time mode.
CMT_SetMode(CMT, kCMT_TimeMode, &modulateConfig);

This is an example IRQ handler to change the mark and space count to complete the data modulation:
// The data length has been transmitted.
uint32_t g_CmtDataBitLen;
void CMT_IRQHandler(void)
{
if (CMT_GetStatusFlags(CMT))
{
if (g_CmtDataBitLen <= CMT_TEST_DATA_BITS)
{
// LSB.
if (data & ((uint32_t)0x01 << g_CmtDataBitLen))
{
CMT_SetModulateMarkSpace(CMT, g_CmtModDataOneMarkCount,
g_CmtModDataOneSpaceCount);
}
else
{
CMT_SetModulateMarkSpace(CMT, g_CmtModDataZeroMarkCount,
g_CmtModDataZeroSpaceCount);
}
}
}
}

Files
• file fsl_cmt.h

Data Structures
• struct cmt_modulate_config_t
CMT carrier generator and modulator configure structure. More...

• struct cmt_config_t
CMT basic configuration structure. More...

Enumerations
• enum cmt_mode_t {
kCMT_DirectIROCtl = 0x00U,
kCMT_TimeMode = 0x01U,
kCMT_FSKMode = 0x05U,
kCMT_BasebandMode = 0x09U }
The modes of CMT.

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Typical use case
• enum cmt_primary_clkdiv_t {
kCMT_PrimaryClkDiv1 = 0U,
kCMT_PrimaryClkDiv2 = 1U,
kCMT_PrimaryClkDiv3 = 2U,
kCMT_PrimaryClkDiv4 = 3U,
kCMT_PrimaryClkDiv5 = 4U,
kCMT_PrimaryClkDiv6 = 5U,
kCMT_PrimaryClkDiv7 = 6U,
kCMT_PrimaryClkDiv8 = 7U,
kCMT_PrimaryClkDiv9 = 8U,
kCMT_PrimaryClkDiv10 = 9U,
kCMT_PrimaryClkDiv11 = 10U,
kCMT_PrimaryClkDiv12 = 11U,
kCMT_PrimaryClkDiv13 = 12U,
kCMT_PrimaryClkDiv14 = 13U,
kCMT_PrimaryClkDiv15 = 14U,
kCMT_PrimaryClkDiv16 = 15U }
The CMT clock divide primary prescaler.

• enum cmt_second_clkdiv_t {
kCMT_SecondClkDiv1 = 0U,
kCMT_SecondClkDiv2 = 1U,
kCMT_SecondClkDiv4 = 2U,
kCMT_SecondClkDiv8 = 3U }
The CMT clock divide secondary prescaler.

• enum cmt_infrared_output_polarity_t {
kCMT_IROActiveLow = 0U,
kCMT_IROActiveHigh = 1U }
The CMT infrared output polarity.

• enum cmt_infrared_output_state_t {
kCMT_IROCtlLow = 0U,
kCMT_IROCtlHigh = 1U }
The CMT infrared output signal state control.

• enum _cmt_interrupt_enable { kCMT_EndOfCycleInterruptEnable = CMT_MSC_EOCIE_MASK
}
CMT interrupt configuration structure, default settings all disabled.

Driver version
• #define FSL_CMT_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
CMT driver version 2.0.0.

Initialization and deinitialization
• void CMT_GetDefaultConfig (cmt_config_t ∗config)
Gets the CMT default configuration structure.

• void CMT_Init (CMT_Type ∗base, const cmt_config_t ∗config, uint32_t busClock_Hz)
Initializes the CMT module.

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Data Structure Documentation
• void CMT_Deinit (CMT_Type ∗base)
Disables the CMT module and gate control.

Basic Control Operations
• void CMT_SetMode (CMT_Type ∗base, cmt_mode_t mode, cmt_modulate_config_t ∗modulateConfig)
Selects the mode for CMT.

• cmt_mode_t CMT_GetMode (CMT_Type ∗base)
Gets the mode of the CMT module.

• uint32_t CMT_GetCMTFrequency (CMT_Type ∗base, uint32_t busClock_Hz)
Gets the actual CMT clock frequency.

• static void CMT_SetCarrirGenerateCountOne (CMT_Type ∗base, uint32_t highCount, uint32_t lowCount)
Sets the primary data set for the CMT carrier generator counter.

• static void CMT_SetCarrirGenerateCountTwo (CMT_Type ∗base, uint32_t highCount, uint32_t
lowCount)
Sets the secondary data set for the CMT carrier generator counter.

• void CMT_SetModulateMarkSpace (CMT_Type ∗base, uint32_t markCount, uint32_t spaceCount)
Sets the modulation mark and space time period for the CMT modulator.

• static void CMT_EnableExtendedSpace (CMT_Type ∗base, bool enable)
Enables or disables the extended space operation.

• void CMT_SetIroState (CMT_Type ∗base, cmt_infrared_output_state_t state)
Sets IRO - infrared output signal state.

• static void CMT_EnableInterrupts (CMT_Type ∗base, uint32_t mask)
Enables the CMT interrupt.

• static void CMT_DisableInterrupts (CMT_Type ∗base, uint32_t mask)
Disables the CMT interrupt.

• static uint32_t CMT_GetStatusFlags (CMT_Type ∗base)
Gets the end of the cycle status flag.

8.4

Data Structure Documentation

8.4.1

struct cmt_modulate_config_t

Data Fields
• uint8_t highCount1
The high time for carrier generator first register.

• uint8_t lowCount1
The low time for carrier generator first register.

• uint8_t highCount2
The high time for carrier generator second register for FSK mode.

• uint8_t lowCount2
The low time for carrier generator second register for FSK mode.

• uint16_t markCount
The mark time for the modulator gate.

• uint16_t spaceCount
The space time for the modulator gate.

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Enumeration Type Documentation
8.4.1.0.0.11

Field Documentation

8.4.1.0.0.11.1

uint8_t cmt_modulate_config_t::highCount1

8.4.1.0.0.11.2

uint8_t cmt_modulate_config_t::lowCount1

8.4.1.0.0.11.3

uint8_t cmt_modulate_config_t::highCount2

8.4.1.0.0.11.4

uint8_t cmt_modulate_config_t::lowCount2

8.4.1.0.0.11.5

uint16_t cmt_modulate_config_t::markCount

8.4.1.0.0.11.6

uint16_t cmt_modulate_config_t::spaceCount

8.4.2

struct cmt_config_t

Data Fields
• bool isInterruptEnabled
Timer interrupt 0-disable, 1-enable.

• bool isIroEnabled
The IRO output 0-disabled, 1-enabled.

• cmt_infrared_output_polarity_t iroPolarity
The IRO polarity.

• cmt_second_clkdiv_t divider
The CMT clock divide prescaler.
8.4.2.0.0.12

Field Documentation

8.4.2.0.0.12.1

bool cmt_config_t::isInterruptEnabled

8.4.2.0.0.12.2

bool cmt_config_t::isIroEnabled

8.4.2.0.0.12.3 cmt_infrared_output_polarity_t cmt_config_t::iroPolarity
8.4.2.0.0.12.4 cmt_second_clkdiv_t cmt_config_t::divider

8.5

Macro Definition Documentation

8.5.1

8.6

#define FSL_CMT_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Enumeration Type Documentation

8.6.1

enum cmt_mode_t

Enumerator
kCMT_DirectIROCtl Carrier modulator is disabled and the IRO signal is directly in software control.
kCMT_TimeMode Carrier modulator is enabled in time mode.
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kCMT_FSKMode Carrier modulator is enabled in FSK mode.
kCMT_BasebandMode Carrier modulator is enabled in baseband mode.

8.6.2

enum cmt_primary_clkdiv_t

The primary clock divider is used to divider the bus clock to get the intermediate frequency to approximately equal to 8 MHZ. When the bus clock is 8 MHZ, set primary prescaler to "kCMT_PrimaryClkDiv1".
Enumerator
kCMT_PrimaryClkDiv1 The intermediate frequency is the bus clock divided by 1.
kCMT_PrimaryClkDiv2 The intermediate frequency is the bus clock divided by 2.
kCMT_PrimaryClkDiv3 The intermediate frequency is the bus clock divided by 3.
kCMT_PrimaryClkDiv4 The intermediate frequency is the bus clock divided by 4.
kCMT_PrimaryClkDiv5 The intermediate frequency is the bus clock divided by 5.
kCMT_PrimaryClkDiv6 The intermediate frequency is the bus clock divided by 6.
kCMT_PrimaryClkDiv7 The intermediate frequency is the bus clock divided by 7.
kCMT_PrimaryClkDiv8 The intermediate frequency is the bus clock divided by 8.
kCMT_PrimaryClkDiv9 The intermediate frequency is the bus clock divided by 9.
kCMT_PrimaryClkDiv10 The intermediate frequency is the bus clock divided by 10.
kCMT_PrimaryClkDiv11 The intermediate frequency is the bus clock divided by 11.
kCMT_PrimaryClkDiv12 The intermediate frequency is the bus clock divided by 12.
kCMT_PrimaryClkDiv13 The intermediate frequency is the bus clock divided by 13.
kCMT_PrimaryClkDiv14 The intermediate frequency is the bus clock divided by 14.
kCMT_PrimaryClkDiv15 The intermediate frequency is the bus clock divided by 15.
kCMT_PrimaryClkDiv16 The intermediate frequency is the bus clock divided by 16.

8.6.3

enum cmt_second_clkdiv_t

The second prescaler can be used to divide the 8 MHZ CMT clock by 1, 2, 4, or 8 according to the
specification.
Enumerator
kCMT_SecondClkDiv1
kCMT_SecondClkDiv2
kCMT_SecondClkDiv4
kCMT_SecondClkDiv8

The CMT clock is the intermediate frequency frequency divided by 1.
The CMT clock is the intermediate frequency frequency divided by 2.
The CMT clock is the intermediate frequency frequency divided by 4.
The CMT clock is the intermediate frequency frequency divided by 8.

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Function Documentation

8.6.4

enum cmt_infrared_output_polarity_t

Enumerator
kCMT_IROActiveLow The CMT infrared output signal polarity is active-low.
kCMT_IROActiveHigh The CMT infrared output signal polarity is active-high.

8.6.5

enum cmt_infrared_output_state_t

Enumerator
kCMT_IROCtlLow The CMT Infrared output signal state is controlled to low.
kCMT_IROCtlHigh The CMT Infrared output signal state is controlled to high.

8.6.6

enum _cmt_interrupt_enable

This structure contains the settings for all of the CMT interrupt configurations.
Enumerator
kCMT_EndOfCycleInterruptEnable CMT end of cycle interrupt.

8.7
8.7.1

Function Documentation
void CMT_GetDefaultConfig ( cmt_config_t ∗ config )

The purpose of this API is to get the default configuration structure for the CMT_Init(). Use the initialized
structure unchanged in CMT_Init(), or modify some fields of the structure before calling the CMT_Init().
Parameters
config

8.7.2

The CMT configuration structure pointer.

void CMT_Init ( CMT_Type ∗ base, const cmt_config_t ∗ config, uint32_t
busClock_Hz )

This function ungates the module clock and sets the CMT internal clock, interrupt, and infrared output
signal for the CMT module.

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Parameters
base
config
busClock_Hz

CMT peripheral base address.
The CMT basic configuration structure.
The CMT module input clock - bus clock frequency.

void CMT_Deinit ( CMT_Type ∗ base )

8.7.3

This function disables CMT modulator, interrupts, and gates the CMT clock control. CMT_Init must be
called to use the CMT again.
Parameters
base

CMT peripheral base address.

void CMT_SetMode ( CMT_Type ∗ base, cmt_mode_t mode,
cmt_modulate_config_t ∗ modulateConfig )

8.7.4

Parameters
base
mode
modulateConfig

CMT peripheral base address.
The CMT feature mode enumeration. See "cmt_mode_t".
The carrier generation and modulator configuration.

8.7.5 cmt_mode_t CMT_GetMode ( CMT_Type ∗ base )
Parameters
base

CMT peripheral base address.

Returns
The CMT mode. kCMT_DirectIROCtl Carrier modulator is disabled, the IRO signal is directly in
software control. kCMT_TimeMode Carrier modulator is enabled in time mode. kCMT_FSKMode
Carrier modulator is enabled in FSK mode. kCMT_BasebandMode Carrier modulator is enabled in
baseband mode.

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8.7.6

uint32_t CMT_GetCMTFrequency ( CMT_Type ∗ base, uint32_t busClock_Hz
)

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Parameters
base
busClock_Hz

CMT peripheral base address.
CMT module input clock - bus clock frequency.

Returns
The CMT clock frequency.

8.7.7

static void CMT_SetCarrirGenerateCountOne ( CMT_Type ∗ base, uint32_t
highCount, uint32_t lowCount ) [inline], [static]

This function sets the high time and low time of the primary data set for the CMT carrier generator counter
to control the period and the duty cycle of the output carrier signal. If the CMT clock period is Tcmt, The
period of the carrier generator signal equals (highCount + lowCount) ∗ Tcmt. The duty cycle equals
highCount / (highCount + lowCount).
Parameters
base

8.7.8

CMT peripheral base address.

highCount

The number of CMT clocks for carrier generator signal high time, integer in the range
of 1 ∼ 0xFF.

lowCount

The number of CMT clocks for carrier generator signal low time, integer in the range
of 1 ∼ 0xFF.

static void CMT_SetCarrirGenerateCountTwo ( CMT_Type ∗ base, uint32_t
highCount, uint32_t lowCount ) [inline], [static]

This function is used for FSK mode setting the high time and low time of the secondary data set CMT
carrier generator counter to control the period and the duty cycle of the output carrier signal. If the CMT
clock period is Tcmt, The period of the carrier generator signal equals (highCount + lowCount) ∗ Tcmt.
The duty cycle equals highCount / (highCount + lowCount).
Parameters
base

CMT peripheral base address.

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Function Documentation
highCount

The number of CMT clocks for carrier generator signal high time, integer in the range
of 1 ∼ 0xFF.

lowCount

The number of CMT clocks for carrier generator signal low time, integer in the range
of 1 ∼ 0xFF.

void CMT_SetModulateMarkSpace ( CMT_Type ∗ base, uint32_t markCount,
uint32_t spaceCount )

8.7.9

This function sets the mark time period of the CMT modulator counter to control the mark time of the
output modulated signal from the carrier generator output signal. If the CMT clock frequency is Fcmt and
the carrier out signal frequency is fcg:
• In Time and Baseband mode: The mark period of the generated signal equals (markCount + 1) /
(Fcmt/8). The space period of the generated signal equals spaceCount / (Fcmt/8).
• In FSK mode: The mark period of the generated signal equals (markCount + 1)/fcg. The space
period of the generated signal equals spaceCount / fcg.
Parameters
base

Base address for current CMT instance.

markCount

The number of clock period for CMT modulator signal mark period, in the range of
0 ∼ 0xFFFF.

spaceCount

The number of clock period for CMT modulator signal space period, in the range of
the 0 ∼ 0xFFFF.

8.7.10

static void CMT_EnableExtendedSpace ( CMT_Type ∗ base, bool enable )
[inline], [static]

This function is used to make the space period longer for time, baseband, and FSK modes.
Parameters
base
enable

CMT peripheral base address.
True enable the extended space, false disable the extended space.

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8.7.11

void CMT_SetIroState ( CMT_Type ∗ base, cmt_infrared_output_state_t
state )

Changes the states of the IRO signal when the kCMT_DirectIROMode mode is set and the IRO signal is
enabled.

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Function Documentation
Parameters

8.7.12

base

CMT peripheral base address.

state

The control of the IRO signal. See "cmt_infrared_output_state_t"

static void CMT_EnableInterrupts ( CMT_Type ∗ base, uint32_t mask )
[inline], [static]

This function enables the CMT interrupts according to the provided maskIf enabled. The CMT only has
the end of the cycle interrupt - an interrupt occurs at the end of the modulator cycle. This interrupt provides
a means for the user to reload the new mark/space values into the CMT modulator data registers and verify
the modulator mark and space. For example, to enable the end of cycle, do the following:
CMT_EnableInterrupts(CMT, kCMT_EndOfCycleInterruptEnable)
;

Parameters

8.7.13

base

CMT peripheral base address.

mask

The interrupts to enable. Logical OR of _cmt_interrupt_enable.

static void CMT_DisableInterrupts ( CMT_Type ∗ base, uint32_t mask )
[inline], [static]

This function disables the CMT interrupts according to the provided maskIf enabled. The CMT only has
the end of the cycle interrupt. For example, to disable the end of cycle, do the following:
CMT_DisableInterrupts(CMT, kCMT_EndOfCycleInterruptEnable
);

Parameters

8.7.14

base

CMT peripheral base address.

mask

The interrupts to enable. Logical OR of _cmt_interrupt_enable.

static uint32_t CMT_GetStatusFlags ( CMT_Type ∗ base ) [inline],

[static]
The flag is set:
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• When the modulator is not currently active and carrier and modulator are set to start the initial CMT
transmission.
• At the end of each modulation cycle when the counter is reloaded and the carrier and modulator are
enabled.
Parameters
base

CMT peripheral base address.

Returns
Current status of the end of cycle status flag
– non-zero: End-of-cycle has occurred.
– zero: End-of-cycle has not yet occurred since the flag last cleared.

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Chapter 9
COP: Watchdog Driver
9.1

Overview

The KSDK provides a peripheral driver for the COP module (COP) of Kinetis devices.

Typical use case
cop_config_t config;
COP_GetDefaultConfig(&config);
config.timeoutCycles = kCOP_2Power8CyclesOr2Power16Cycles;
COP_Init(sim_base,&config);

Files
• file fsl_cop.h

Data Structures
• struct cop_config_t
Describes COP configuration structure. More...

Enumerations
• enum cop_clock_source_t {
kCOP_LpoClock = 0U,
kCOP_BusClock = 3U }
COP clock source selection.

• enum cop_timeout_cycles_t {
kCOP_2Power5CyclesOr2Power13Cycles = 1U,
kCOP_2Power8CyclesOr2Power16Cycles = 2U,
kCOP_2Power10CyclesOr2Power18Cycles = 3U }
Define the COP timeout cycles.

Driver version
• #define FSL_COP_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
COP driver version 2.0.0.

COP refresh sequence.
• #define COP_FIRST_BYTE_OF_REFRESH (0x55U)
First byte of refresh sequence.

• #define COP_SECOND_BYTE_OF_REFRESH (0xAAU)
Second byte of refresh sequence.

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COP Functional Operation
• void COP_GetDefaultConfig (cop_config_t ∗config)
Initializes the COP configuration structure.

• void COP_Init (SIM_Type ∗base, const cop_config_t ∗config)
Initializes the COP module.

• static void COP_Disable (SIM_Type ∗base)
De-initializes the COP module.

• void COP_Refresh (SIM_Type ∗base)
Refreshes the COP timer.

9.2

Data Structure Documentation

9.2.1

struct cop_config_t

Data Fields
• bool enableWindowMode
COP run mode: window mode or normal mode.

• cop_clock_source_t clockSource
Set COP clock source.

• cop_timeout_cycles_t timeoutCycles
Set COP timeout value.

9.3

Macro Definition Documentation

9.3.1

9.4

#define FSL_COP_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Enumeration Type Documentation

9.4.1

enum cop_clock_source_t

Enumerator
kCOP_LpoClock COP clock sourced from LPO.
kCOP_BusClock COP clock sourced from Bus clock.

9.4.2

enum cop_timeout_cycles_t

Enumerator
kCOP_2Power5CyclesOr2Power13Cycles 2∧ 5 or 2∧ 13 clock cycles
kCOP_2Power8CyclesOr2Power16Cycles 2∧ 8 or 2∧ 16 clock cycles
kCOP_2Power10CyclesOr2Power18Cycles 2∧ 10 or 2∧ 18 clock cycles

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9.5

Function Documentation

9.5.1

void COP_GetDefaultConfig ( cop_config_t ∗ config )

This function initializes the COP configuration structure to default values. The default values are:
copConfig->enableWindowMode = false;
copConfig->timeoutMode = kCOP_LongTimeoutMode;
copConfig->enableStop = false;
copConfig->enableDebug = false;
copConfig->clockSource = kCOP_LpoClock;
copConfig->timeoutCycles = kCOP_2Power10CyclesOr2Power18Cycles;

Parameters
config

Pointer to the COP configuration structure.

See Also
cop_config_t

9.5.2

void COP_Init ( SIM_Type ∗ base, const cop_config_t ∗ config )

This function configures the COP. After it is called, the COP starts running according to the configuration. Because all COP control registers are write-once only, the COP_Init function and the COP_Disable
function can be called only once. A second call has no effect.
Example:
cop_config_t config;
COP_GetDefaultConfig(&config);
config.timeoutCycles = kCOP_2Power8CyclesOr2Power16Cycles;
COP_Init(sim_base,&config);

Parameters
base
config

9.5.3

SIM peripheral base address.
The configuration of COP.

static void COP_Disable ( SIM_Type ∗ base ) [inline], [static]

This dedicated function is not provided. Instead, the COP_Disable function can be used to disable the
COP.
Disables the COP module.
This function disables the COP Watchdog. Note: The COP configuration register is a write-once after
reset. To disable the COP Watchdog, call this function first.
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Parameters
base

9.5.4

SIM peripheral base address.

void COP_Refresh ( SIM_Type ∗ base )

This function feeds the COP.
Parameters
base

SIM peripheral base address.

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Chapter 10
CRC: Cyclic Redundancy Check Driver
10.1

Overview

The Kinetis SDK provides the Peripheral driver for the Cyclic Redundancy Check (CRC) module of
Kinetis devices.
The cyclic redundancy check (CRC) module generates 16/32-bit CRC code for error detection. The CRC
module provides a programmable polynomial, seed, and other parameters required to implement a 16-bit
or 32-bit CRC standard.

10.2

CRC Driver Initialization and Configuration

CRC_Init() function enables the clock gate for the CRC module in the Kinetis SIM module and fully (re)configures the CRC module according to configuration structure. The seed member of the configuration
structure is the initial checksum for which new data can be added to. When starting new checksum
computation, the seed shall be set to the initial checksum per the CRC protocol specification. For continued
checksum operation, the seed shall be set to the intermediate checksum value as obtained from previous
calls to CRC_Get16bitResult() or CRC_Get32bitResult() function. After CRC_Init(), one or multiple CRC_WriteData() calls follow to update checksum with data, then CRC_Get16bitResult() or CRC_Get32bitResult() follows to read the result. The crcResult member of configuration structure determines if CRC_Get16bitResult() or CRC_Get32bitResult() return value is final checksum or intermediate checksum.
CRC_Init() can be called as many times as required, thus, allows for runtime changes of CRC protocol.
CRC_GetDefaultConfig() function can be used to set the module configuration structure with parameters
for CRC-16/CCIT-FALSE protocol.

10.3

CRC Write Data

The CRC_WriteData() function is used to add data to actual CRC. Internally it tries to use 32-bit reads
and writes for all aligned data in the user buffer and it uses 8-bit reads and writes for all unaligned data
in the user buffer. This function can update CRC with user supplied data chunks of arbitrary size, so one
can update CRC byte by byte or with all bytes at once. Prior call CRC configuration function CRC_Init()
fully specifies the CRC module configuration for CRC_WriteData() call.

10.4

CRC Get Checksum

The CRC_Get16bitResult() or CRC_Get32bitResult() function is used to read the CRC module data register. Depending on prior CRC module usage the return value is either intermediate checksum or final
checksum. Example: for 16-bit CRCs the following call sequences can be used:
CRC_Init() / CRC_WriteData() / CRC_Get16bitResult() to get final checksum.
CRC_Init() / CRC_WriteData() / ... / CRC_WriteData() / CRC_Get16bitResult() to get final checksum.
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CRC_Init() / CRC_WriteData() / CRC_Get16bitResult() to get intermediate checksum.
CRC_Init() / CRC_WriteData() / ... / CRC_WriteData() / CRC_Get16bitResult() to get intermediate
checksum.

10.5

Comments about API usage in RTOS

If multiple RTOS tasks will share the CRC module to compute checksums with different data and/or
protocols, the following shall be implemented by user:
The triplets
CRC_Init() / CRC_WriteData() / CRC_Get16bitResult() or CRC_Get32bitResult()
shall be protected by RTOS mutex to protect CRC module against concurrent accesses from different
tasks. Example:
CRC_Module_RTOS_Mutex_Lock;
CRC_Init();
CRC_WriteData();
CRC_Get16bitResult();
CRC_Module_RTOS_Mutex_Unlock;

10.6

Comments about API usage in interrupt handler

All APIs can be used from interrupt handler although execution time shall be considered (interrupt latency
of equal and lower priority interrupts increases). Protection against concurrent accesses from different
interrupt handlers and/or tasks shall be assured by the user.

10.7

CRC Driver Examples

Simple examples
Simple example with default CRC-16/CCIT-FALSE protocol
crc_config_t config;
CRC_Type *base;
uint8_t data[] = {0x00, 0x01, 0x02, 0x03, 0x04};
uint16_t checksum;
base = CRC0;
CRC_GetDefaultConfig(base, &config); /* default gives CRC-16/CCIT-FALSE */
CRC_Init(base, &config);
CRC_WriteData(base, data, sizeof(data));
checksum = CRC_Get16bitResult(base);

Simple example with CRC-32 protocol configuration
crc_config_t config;
uint32_t checksum;
config.polynomial = 0x04C11DB7u;
config.seed = 0xFFFFFFFFu;
config.crcBits = kCrcBits32;
config.reflectIn = true;

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CRC Driver Examples
config.reflectOut = true;
config.complementChecksum = true;
config.crcResult = kCrcFinalChecksum;
CRC_Init(base, &config);
/* example: update by 1 byte at time */
while (dataSize)
{
uint8_t c = GetCharacter();
CRC_WriteData(base, &c, 1);
dataSize--;
}
checksum = CRC_Get32bitResult(base);

Advanced examples
Per-partes data updates with context switch between. Assuming we have 3 tasks/threads, each using CRC
module to compute checksums of different protocol, with context switches.
Firstly, we prepare 3 CRC module init functions for 3 different protocols: CRC-16 (ARC), CRC-16/CCIT-FALSE and CRC-32. Table below lists the individual protocol specifications. See also: http://reveng.sourceforge.net/crc-catalogue/
CRC-16/CCIT-FALSE

CRC-16

CRC-32

Width

16 bits

16 bits

32 bits

Polynomial

0x1021

0x8005

0x04C11DB7

Initial seed

0xFFFF

0x0000

0xFFFFFFFF

No

No

Yes

Reflect In

No

Yes

Yes

Reflect Out

No

Yes

Yes

Complement
sum

check-

Corresponding init functions:
void InitCrc16_CCIT(CRC_Type *base, uint32_t seed, bool isLast)
{
crc_config_t config;
config.polynomial = 0x1021;
config.seed = seed;
config.reflectIn = false;
config.reflectOut = false;
config.complementChecksum = false;
config.crcBits = kCrcBits16;
config.crcResult = isLast?kCrcFinalChecksum:
kCrcIntermediateChecksum;
CRC_Init(base, &config);
}
void InitCrc16(CRC_Type *base, uint32_t seed, bool isLast)
{
crc_config_t config;

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config.polynomial = 0x8005;
config.seed = seed;
config.reflectIn = true;
config.reflectOut = true;
config.complementChecksum = false;
config.crcBits = kCrcBits16;
config.crcResult = isLast?kCrcFinalChecksum:
kCrcIntermediateChecksum;
CRC_Init(base, &config);
}
void InitCrc32(CRC_Type *base, uint32_t seed, bool isLast)
{
crc_config_t config;
config.polynomial = 0x04C11DB7U;
config.seed = seed;
config.reflectIn = true;
config.reflectOut = true;
config.complementChecksum = true;
config.crcBits = kCrcBits32;
config.crcResult = isLast?kCrcFinalChecksum:
kCrcIntermediateChecksum;
CRC_Init(base, &config);
}

The following context switches show possible API usage:
uint16_t checksumCrc16;
uint32_t checksumCrc32;
uint16_t checksumCrc16Ccit;
checksumCrc16 = 0x0;
checksumCrc32 = 0xFFFFFFFFU;
checksumCrc16Ccit = 0xFFFFU;
/* Task A bytes[0-3] */
InitCrc16(base, checksumCrc16, false);
CRC_WriteData(base, &data[0], 4);
checksumCrc16 = CRC_Get16bitResult(base);
/* Task B bytes[0-3] */
InitCrc16_CCIT(base, checksumCrc16Ccit, false);
CRC_WriteData(base, &data[0], 4);
checksumCrc16Ccit = CRC_Get16bitResult(base);
/* Task C 4 bytes[0-3] */
InitCrc32(base, checksumCrc32, false);
CRC_WriteData(base, &data[0], 4);
checksumCrc32 = CRC_Get32bitResult(base);
/* Task B add final 5 bytes[4-8] */
InitCrc16_CCIT(base, checksumCrc16Ccit, true);
CRC_WriteData(base, &data[4], 5);
checksumCrc16Ccit = CRC_Get16bitResult(base);
/* Task C 3 bytes[4-6] */
InitCrc32(base, checksumCrc32, false);
CRC_WriteData(base, &data[4], 3);
checksumCrc32 = CRC_Get32bitResult(base);
/* Task A 3 bytes[4-6] */
InitCrc16(base, checksumCrc16, false);

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CRC Driver Examples
CRC_WriteData(base, &data[4], 3);
checksumCrc16 = CRC_Get16bitResult(base);
/* Task C add final 2 bytes[7-8] */
InitCrc32(base, checksumCrc32, true);
CRC_WriteData(base, &data[7], 2);
checksumCrc32 = CRC_Get32bitResult(base);
/* Task A add final 2 bytes[7-8] */
InitCrc16(base, checksumCrc16, true);
CRC_WriteData(base, &data[7], 2);
checksumCrc16 = CRC_Get16bitResult(base);

Files
• file fsl_crc.h

Data Structures
• struct crc_config_t
CRC protocol configuration. More...

Macros
• #define CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT 1
Default configuration structure filled by CRC_GetDefaultConfig().

Enumerations
• enum crc_bits_t {
kCrcBits16 = 0U,
kCrcBits32 = 1U }
CRC bit width.

• enum crc_result_t {
kCrcFinalChecksum = 0U,
kCrcIntermediateChecksum = 1U }
CRC result type.

Functions
• void CRC_Init (CRC_Type ∗base, const crc_config_t ∗config)
Enables and configures the CRC peripheral module.

• static void CRC_Deinit (CRC_Type ∗base)
Disables the CRC peripheral module.

• void CRC_GetDefaultConfig (crc_config_t ∗config)
Loads default values to CRC protocol configuration structure.

• void CRC_WriteData (CRC_Type ∗base, const uint8_t ∗data, size_t dataSize)
Writes data to the CRC module.

• static uint32_t CRC_Get32bitResult (CRC_Type ∗base)
Reads 32-bit checksum from the CRC module.

• uint16_t CRC_Get16bitResult (CRC_Type ∗base)
Reads 16-bit checksum from the CRC module.

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Driver version
• #define FSL_CRC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
CRC driver version.

10.8
10.8.1

Data Structure Documentation
struct crc_config_t

This structure holds the configuration for the CRC protocol.

Data Fields
• uint32_t polynomial
CRC Polynomial, MSBit first.

• uint32_t seed
Starting checksum value.

• bool reflectIn
Reflect bits on input.

• bool reflectOut
Reflect bits on output.

• bool complementChecksum
True if the result shall be complement of the actual checksum.

• crc_bits_t crcBits
Selects 16- or 32- bit CRC protocol.

• crc_result_t crcResult
Selects final or intermediate checksum return from CRC_Get16bitResult() or CRC_Get32bitResult()
10.8.1.0.0.13
10.8.1.0.0.13.1

Field Documentation
uint32_t crc_config_t::polynomial

Example polynomial: 0x1021 = 1_0000_0010_0001 = x∧ 12+x∧ 5+1
10.8.1.0.0.13.2

bool crc_config_t::reflectIn

10.8.1.0.0.13.3

bool crc_config_t::reflectOut

10.8.1.0.0.13.4

bool crc_config_t::complementChecksum

10.8.1.0.0.13.5 crc_bits_t crc_config_t::crcBits

10.9
10.9.1

Macro Definition Documentation
#define FSL_CRC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Version 2.0.0.

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Function Documentation

10.9.2

#define CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT 1

Use CRC16-CCIT-FALSE as defeault.

10.10

Enumeration Type Documentation
enum crc_bits_t

10.10.1
Enumerator

kCrcBits16 Generate 16-bit CRC code.
kCrcBits32 Generate 32-bit CRC code.

enum crc_result_t

10.10.2
Enumerator

kCrcFinalChecksum CRC data register read value is the final checksum. Reflect out and final xor
protocol features are applied.
kCrcIntermediateChecksum CRC data register read value is intermediate checksum (raw value).
Reflect out and final xor protocol feature are not applied. Intermediate checksum can be used as
a seed for CRC_Init() to continue adding data to this checksum.

10.11

Function Documentation
void CRC_Init ( CRC_Type ∗ base, const crc_config_t ∗ config )

10.11.1

This functions enables the clock gate in the Kinetis SIM module for the CRC peripheral. It also configures
the CRC module and starts checksum computation by writing the seed.
Parameters
base
config

10.11.2

CRC peripheral address.
CRC module configuration structure

static void CRC_Deinit ( CRC_Type ∗ base ) [inline], [static]

This functions disables the clock gate in the Kinetis SIM module for the CRC peripheral.

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Function Documentation
Parameters
base

CRC peripheral address.

void CRC_GetDefaultConfig ( crc_config_t ∗ config )

10.11.3

Loads default values to CRC protocol configuration structure. The default values are:
config->polynomial = 0x1021;
config->seed = 0xFFFF;
config->reflectIn = false;
config->reflectOut = false;
config->complementChecksum = false;
config->crcBits = kCrcBits16;
config->crcResult = kCrcFinalChecksum;

Parameters
config

10.11.4

CRC protocol configuration structure

void CRC_WriteData ( CRC_Type ∗ base, const uint8_t ∗ data, size_t
dataSize )

Writes input data buffer bytes to CRC data register. The configured type of transpose is applied.
Parameters
base

CRC peripheral address.

data

Input data stream, MSByte in data[0].

dataSize

10.11.5

Size in bytes of the input data buffer.

static uint32_t CRC_Get32bitResult ( CRC_Type ∗ base ) [inline],

[static]
Reads CRC data register (intermediate or final checksum). The configured type of transpose and complement are applied.

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Function Documentation
Parameters
base

CRC peripheral address.

Returns
intermediate or final 32-bit checksum, after configured transpose and complement operations.

10.11.6

uint16_t CRC_Get16bitResult ( CRC_Type ∗ base )

Reads CRC data register (intermediate or final checksum). The configured type of transpose and complement are applied.
Parameters
base

CRC peripheral address.

Returns
intermediate or final 16-bit checksum, after configured transpose and complement operations.

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Function Documentation

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Chapter 11
DAC: Digital-to-Analog Converter Driver
11.1

Overview

The KSDK provides a peripheral driver for the Digital-to-Analog Converter (DAC) module of Kinetis
devices.
#Overview
The DAC driver includes a basic DAC module (converter) and DAC buffer.
The basic DAC module supports operations unique to the DAC converter in each DAC instance. The APIs
in this part are used in the initialization phase, which is necessary for enabling the DAC module in the
application. The APIs enable/disable the clock, enable/disable the module, and configure the converter.
Call the initial APIs to prepare the DAC module for the application.
The DAC buffer operates the DAC hardware buffer. The DAC module supports a hardware buffer to keep a
group of DAC values to be converted. This feature supports updating the DAC output value automatically
by triggering the buffer read pointer to move in the buffer. Use the APIs to configure the hardware buffer’s
trigger mode, watermark, work mode, and use size. Additionally, the APIs operate the DMA, interrupts,
flags, the pointer (index of buffer), item values, and so on.
The DAC buffer plays a major part when using the DAC module, as the most functional features are
designed for the DAC hardware buffer.

Typical use case
Working as a basic DAC without the hardware buffer feature.
// ...
// Configures the DAC.
DAC_GetDefaultConfig(&dacConfigStruct);
DAC_Init(DEMO_DAC_INSTANCE, &dacConfigStruct);
DAC_SetBufferReadPointer(DEMO_DAC_INSTANCE, 0U);
// ...
DAC_SetBufferValue(DEMO_DAC_INSTANCE, 0U, dacValue);

Working with the hardware buffer.
// ...
EnableIRQ(DEMO_DAC_IRQ_ID);
// ...
// Configures the DAC.

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Overview
DAC_GetDefaultConfig(&dacConfigStruct);
DAC_Init(DEMO_DAC_INSTANCE, &dacConfigStruct);
// Configures the DAC buffer.
DAC_GetDefaultBufferConfig(&dacBufferConfigStruct);
DAC_SetBufferConfig(DEMO_DAC_INSTANCE, &dacBufferConfigStruct);
DAC_SetBufferReadPointer(DEMO_DAC_INSTANCE, 0U); // Make sure the read pointer
to the start.
for (index = 0U, dacValue = 0; index < DEMO_DAC_USED_BUFFER_SIZE; index++, dacValue += (0xFFFU /
DEMO_DAC_USED_BUFFER_SIZE))
{
DAC_SetBufferValue(DEMO_DAC_INSTANCE, index, dacValue);
}
// Clears flags.
#if defined(FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION) && FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION
g_DacBufferWatermarkInterruptFlag = false;
#endif // FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION
g_DacBufferReadPointerTopPositionInterruptFlag = false;
g_DacBufferReadPointerBottomPositionInterruptFlag = false;
// Enables interrupts.
mask = 0U;
#if defined(FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION) && FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION
mask |= kDAC_BufferWatermarkInterruptEnable;
#endif // FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION
mask |= kDAC_BufferReadPointerTopInterruptEnable |
kDAC_BufferReadPointerBottomInterruptEnable;
DAC_EnableBuffer(DEMO_DAC_INSTANCE, true);
DAC_EnableBufferInterrupts(DEMO_DAC_INSTANCE, mask);
// ISR for the DAC interrupt.
void DEMO_DAC_IRQ_HANDLER_FUNC(void)
{
uint32_t flags = DAC_GetBufferStatusFlags(DEMO_DAC_INSTANCE);
#if defined(FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION) && FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION
if (kDAC_BufferWatermarkFlag == (kDAC_BufferWatermarkFlag & flags))
{
g_DacBufferWatermarkInterruptFlag = true;
}
#endif // FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION
if (kDAC_BufferReadPointerTopPositionFlag == (
kDAC_BufferReadPointerTopPositionFlag & flags))
{
g_DacBufferReadPointerTopPositionInterruptFlag = true;
}
if (kDAC_BufferReadPointerBottomPositionFlag == (
kDAC_BufferReadPointerBottomPositionFlag & flags))
{
g_DacBufferReadPointerBottomPositionInterruptFlag = true;
}
DAC_ClearBufferStatusFlags(DEMO_DAC_INSTANCE, flags); /* Clear flags.
}

Files
• file fsl_dac.h

Data Structures
• struct dac_config_t
DAC module configuration. More...

• struct dac_buffer_config_t
DAC buffer configuration. More...

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Overview

Enumerations
• enum _dac_buffer_status_flags {
kDAC_BufferReadPointerTopPositionFlag = DAC_SR_DACBFRPTF_MASK,
kDAC_BufferReadPointerBottomPositionFlag = DAC_SR_DACBFRPBF_MASK }
DAC buffer flags.

• enum _dac_buffer_interrupt_enable {
kDAC_BufferReadPointerTopInterruptEnable = DAC_C0_DACBTIEN_MASK,
kDAC_BufferReadPointerBottomInterruptEnable = DAC_C0_DACBBIEN_MASK }
DAC buffer interrupts.

• enum dac_reference_voltage_source_t {
kDAC_ReferenceVoltageSourceVref1 = 0U,
kDAC_ReferenceVoltageSourceVref2 = 1U }
DAC reference voltage source.

• enum dac_buffer_trigger_mode_t {
kDAC_BufferTriggerByHardwareMode = 0U,
kDAC_BufferTriggerBySoftwareMode = 1U }
DAC buffer trigger mode.

• enum dac_buffer_work_mode_t {
kDAC_BufferWorkAsNormalMode = 0U,
kDAC_BufferWorkAsOneTimeScanMode }
DAC buffer work mode.

Driver version
• #define FSL_DAC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
DAC driver version 2.0.0.

Initialization
• void DAC_Init (DAC_Type ∗base, const dac_config_t ∗config)
Initializes the DAC module.

• void DAC_Deinit (DAC_Type ∗base)
De-initializes the DAC module.

• void DAC_GetDefaultConfig (dac_config_t ∗config)
Initializes the DAC user configuration structure.

• static void DAC_Enable (DAC_Type ∗base, bool enable)
Enables the DAC module.

Buffer
• static void DAC_EnableBuffer (DAC_Type ∗base, bool enable)
Enables the DAC buffer.

• void DAC_SetBufferConfig (DAC_Type ∗base, const dac_buffer_config_t ∗config)
Configures the CMP buffer.

• void DAC_GetDefaultBufferConfig (dac_buffer_config_t ∗config)
Initializes the DAC buffer configuration structure.

• static void DAC_EnableBufferDMA (DAC_Type ∗base, bool enable)
Enables the DMA for DAC buffer.

• void DAC_SetBufferValue (DAC_Type ∗base, uint8_t index, uint16_t value)
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Data Structure Documentation
Sets the value for items in the buffer.

• static void DAC_DoSoftwareTriggerBuffer (DAC_Type ∗base)
Triggers the buffer by software and updates the read pointer of the DAC buffer.

• static uint8_t DAC_GetBufferReadPointer (DAC_Type ∗base)
Gets the current read pointer of the DAC buffer.

• void DAC_SetBufferReadPointer (DAC_Type ∗base, uint8_t index)
Sets the current read pointer of the DAC buffer.

• void DAC_EnableBufferInterrupts (DAC_Type ∗base, uint32_t mask)
Enables interrupts for the DAC buffer.

• void DAC_DisableBufferInterrupts (DAC_Type ∗base, uint32_t mask)
Disables interrupts for the DAC buffer.

• uint32_t DAC_GetBufferStatusFlags (DAC_Type ∗base)
Gets the flags of events for the DAC buffer.

• void DAC_ClearBufferStatusFlags (DAC_Type ∗base, uint32_t mask)
Clears the flags of events for the DAC buffer.

11.2
11.2.1

Data Structure Documentation
struct dac_config_t

Data Fields
• dac_reference_voltage_source_t referenceVoltageSource
Select the DAC reference voltage source.

• bool enableLowPowerMode
Enable the low power mode.
11.2.1.0.0.14

Field Documentation

11.2.1.0.0.14.1 dac_reference_voltage_source_t dac_config_t::referenceVoltageSource
11.2.1.0.0.14.2

11.2.2

bool dac_config_t::enableLowPowerMode

struct dac_buffer_config_t

Data Fields
• dac_buffer_trigger_mode_t triggerMode
Select the buffer’s trigger mode.

• dac_buffer_work_mode_t workMode
Select the buffer’s work mode.

• uint8_t upperLimit
Set the upper limit for buffer index.

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Enumeration Type Documentation
11.2.2.0.0.15

Field Documentation

11.2.2.0.0.15.1 dac_buffer_trigger_mode_t dac_buffer_config_t::triggerMode
11.2.2.0.0.15.2 dac_buffer_work_mode_t dac_buffer_config_t::workMode
11.2.2.0.0.15.3

uint8_t dac_buffer_config_t::upperLimit

Normally, 0-15 is available for buffer with 16 item.

11.3
11.3.1

11.4
11.4.1

Macro Definition Documentation
#define FSL_DAC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Enumeration Type Documentation
enum _dac_buffer_status_flags

Enumerator
kDAC_BufferReadPointerTopPositionFlag DAC Buffer Read Pointer Top Position Flag.
kDAC_BufferReadPointerBottomPositionFlag DAC Buffer Read Pointer Bottom Position Flag.

11.4.2

enum _dac_buffer_interrupt_enable

Enumerator
kDAC_BufferReadPointerTopInterruptEnable DAC Buffer Read Pointer Top Flag Interrupt Enable.
kDAC_BufferReadPointerBottomInterruptEnable DAC Buffer Read Pointer Bottom Flag Interrupt Enable.

11.4.3

enum dac_reference_voltage_source_t

Enumerator
kDAC_ReferenceVoltageSourceVref1 The DAC selects DACREF_1 as the reference voltage.
kDAC_ReferenceVoltageSourceVref2 The DAC selects DACREF_2 as the reference voltage.

11.4.4

enum dac_buffer_trigger_mode_t

Enumerator
kDAC_BufferTriggerByHardwareMode The DAC hardware trigger is selected.
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Function Documentation
kDAC_BufferTriggerBySoftwareMode The DAC software trigger is selected.

11.4.5

enum dac_buffer_work_mode_t

Enumerator
kDAC_BufferWorkAsNormalMode Normal mode.
kDAC_BufferWorkAsOneTimeScanMode One-Time Scan mode.

11.5
11.5.1

Function Documentation
void DAC_Init ( DAC_Type ∗ base, const dac_config_t ∗ config )

This function initializes the DAC module, including:
• Enabling the clock for DAC module.
• Configuring the DAC converter with a user configuration.
• Enabling the DAC module.
Parameters
base
config

11.5.2

DAC peripheral base address.
Pointer to the configuration structure. See "dac_config_t".

void DAC_Deinit ( DAC_Type ∗ base )

This function de-initializes the DAC module, including:
• Disabling the DAC module.
• Disabling the clock for the DAC module.
Parameters
base

11.5.3

DAC peripheral base address.

void DAC_GetDefaultConfig ( dac_config_t ∗ config )

This function initializes the user configuration structure to a default value. The default values are:
config->referenceVoltageSource = kDAC_ReferenceVoltageSourceVref2;
config->enableLowPowerMode = false;

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Function Documentation
Parameters
config

11.5.4

Pointer to the configuration structure. See "dac_config_t".

static void DAC_Enable ( DAC_Type ∗ base, bool enable ) [inline],

[static]
Parameters
base
enable

11.5.5

DAC peripheral base address.
Enables the feature or not.

static void DAC_EnableBuffer ( DAC_Type ∗ base, bool enable )
[inline], [static]

Parameters
base
enable

11.5.6

DAC peripheral base address.
Enables the feature or not.

void DAC_SetBufferConfig ( DAC_Type ∗ base, const dac_buffer_config_t ∗
config )

Parameters
base
config

11.5.7

DAC peripheral base address.
Pointer to the configuration structure. See "dac_buffer_config_t".

void DAC_GetDefaultBufferConfig ( dac_buffer_config_t ∗ config )

This function initializes the DAC buffer configuration structure to a default value. The default values are:
config->triggerMode
config->watermark
config->workMode
config->upperLimit

=
=
=
=

kDAC_BufferTriggerBySoftwareMode;
kDAC_BufferWatermark1Word;
kDAC_BufferWorkAsNormalMode;
DAC_DATL_COUNT - 1U;

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Function Documentation
Parameters
config

11.5.8

Pointer to the configuration structure. See "dac_buffer_config_t".

static void DAC_EnableBufferDMA ( DAC_Type ∗ base, bool enable )
[inline], [static]

Parameters
base
enable

11.5.9

DAC peripheral base address.
Enables the feature or not.

void DAC_SetBufferValue ( DAC_Type ∗ base, uint8_t index, uint16_t value
)

Parameters
base

11.5.10

DAC peripheral base address.

index

Setting index for items in the buffer. The available index should not exceed the size
of the DAC buffer.

value

Setting value for items in the buffer. 12-bits are available.

static void DAC_DoSoftwareTriggerBuffer ( DAC_Type ∗ base )
[inline], [static]

This function triggers the function by software. The read pointer of the DAC buffer is updated with one
step after this function is called. Changing the read pointer depends on the buffer’s work mode.
Parameters
base

11.5.11

DAC peripheral base address.

static uint8_t DAC_GetBufferReadPointer ( DAC_Type ∗ base )
[inline], [static]

This function gets the current read pointer of the DAC buffer. The current output value depends on the
item indexed by the read pointer. It is updated by software trigger or hardware trigger.
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Function Documentation
Parameters
base

DAC peripheral base address.

Returns
Current read pointer of DAC buffer.

11.5.12

void DAC_SetBufferReadPointer ( DAC_Type ∗ base, uint8_t index )

This function sets the current read pointer of the DAC buffer. The current output value depends on the
item indexed by the read pointer. It is updated by software trigger or hardware trigger. After the read
pointer changes, the DAC output value also changes.
Parameters
base
index

11.5.13

DAC peripheral base address.
Setting index value for the pointer.

void DAC_EnableBufferInterrupts ( DAC_Type ∗ base, uint32_t mask )

Parameters

11.5.14

base

DAC peripheral base address.

mask

Mask value for interrupts. See "_dac_buffer_interrupt_enable".

void DAC_DisableBufferInterrupts ( DAC_Type ∗ base, uint32_t mask )

Parameters

11.5.15

base

DAC peripheral base address.

mask

Mask value for interrupts. See "_dac_buffer_interrupt_enable".

uint32_t DAC_GetBufferStatusFlags ( DAC_Type ∗ base )

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Function Documentation
Parameters
base

DAC peripheral base address.

Returns
Mask value for the asserted flags. See "_dac_buffer_status_flags".

11.5.16

void DAC_ClearBufferStatusFlags ( DAC_Type ∗ base, uint32_t mask )

Parameters
base

DAC peripheral base address.

mask

Mask value for flags. See "_dac_buffer_status_flags_t".

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Chapter 12
Debug Console
Initializes the the peripheral used to debug messages.
This part describes the programming interface of the debug console driver. The debug console enables
debug log messages to be output via the specified peripheral with frequency of the peripheral source clock
and base address at the specified baud rate. Additionally, it provides input and output functions to scan
and print formatted data.

12.1
12.1.1

Function groups
Initialization

To initialize the debug console, call the DbgConsole_Init() function with these parameters. This function
automatically enables the module and the clock.
/*
*
*
*
*
*
*
*
*

* @param baseAddr
@param baudRate
@param device

@param clkSrcFreq

* @return

Indicates which address of the peripheral is used to send debug messages.
The desired baud rate in bits per second.
Low level device type for the debug console, can be one of:
@arg DEBUG_CONSOLE_DEVICE_TYPE_UART,
@arg DEBUG_CONSOLE_DEVICE_TYPE_LPUART,
@arg DEBUG_CONSOLE_DEVICE_TYPE_LPSCI,
@arg DEBUG_CONSOLE_DEVICE_TYPE_USBCDC.
Frequency of peripheral source clock.
Whether initialization was successful or not.

status_t DbgConsole_Init(uint32_t baseAddr, uint32_t baudRate, uint8_t device, uint32_t clkSrcFreq)

Selects the supported debug console hardware device type, such as
DEBUG_CONSOLE_DEVICE_TYPE_NONE

After the initialization is successful, stdout and stdin are connected to the selected peripheral. The debug
console state is stored in the debug_console_state_t structure, such as shown here:
typedef struct DebugConsoleState
{
uint8_t
type;

This example shows how to call the DbgConsole_Init() given the user configuration structure:
uint32_t uartClkSrcFreq = CLOCK_GetFreq(BOARD_DEBUG_UART_CLKSRC);
DbgConsole_Init(BOARD_DEBUG_UART_BASEADDR, BOARD_DEBUG_UART_BAUDRATE, DEBUG_CONSOLE_DEVICE_TYPE_UART,
uartClkSrcFreq);

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Function groups

12.1.2

Advanced Feature

The debug console provides input and output functions to scan and print formatted data.
• Support a format specifier for PRINTF following this prototype " %[flags][width]
[.precision][length]specifier", which is explained below
flags

Description

-

Left-justified within the given field width. Rightjustified is the default.

+

Forces to precede the result with a plus or minus
sign (+ or -) even for positive numbers. By default,
only negative numbers are preceded with a - sign.

(space)

If no sign is going to be written, a blank space is
inserted before the value.

#

Used with o, x, or X specifiers the value is preceded with 0, 0x, or 0X respectively for values
other than zero. Used with e, E and f, it forces
the written output to contain a decimal point even
if no digits would follow. By default, if no digits
follow, no decimal point is written. Used with g or
G the result is the same as with e or E but trailing
zeros are not removed.

0

Left-pads the number with zeroes (0) instead of
spaces, where padding is specified (see width subspecifier).

Width

Description

(number)

A minimum number of characters to be printed. If
the value to be printed is shorter than this number,
the result is padded with blank spaces. The value
is not truncated even if the result is larger.

∗

The width is not specified in the format string, but
as an additional integer value argument preceding
the argument that has to be formatted.

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Function groups
.precision

Description

.number

For integer specifiers (d, i, o, u, x, X) precision
specifies the minimum number of digits to be written. If the value to be written is shorter than this
number, the result is padded with leading zeros.
The value is not truncated even if the result is
longer. A precision of 0 means that no character
is written for the value 0. For e, E, and f specifiers this is the number of digits to be printed after
the decimal point. For g and G specifiers This
is the maximum number of significant digits to be
printed. For s this is the maximum number of
characters to be printed. By default, all characters
are printed until the ending null character is encountered. For c type it has no effect. When no
precision is specified, the default is 1. If the period
is specified without an explicit value for precision,
0 is assumed.

.∗

The precision is not specified in the format string,
but as an additional integer value argument preceding the argument that has to be formatted.

length

Description

Do not support

specifier

Description

d or i

Signed decimal integer

f

Decimal floating point

F

Decimal floating point capital letters

x

Unsigned hexadecimal integer

X

Unsigned hexadecimal integer capital letters

o

Signed octal

b

Binary value

p

Pointer address

u

Unsigned decimal integer

c

Character

s

String of characters

n

Nothing printed
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Function groups
• Support a format specifier for SCANF following this prototype " %[∗][width][length]specifier",
which is explained below
∗

Description

An optional starting asterisk indicates that the data is to be read from the stream but ignored, i.e., it is
not stored in the corresponding argument.

width

Description

This specifies the maximum number of characters to be read in the current reading operation.

length

Description

hh

The argument is interpreted as a signed character or unsigned character (only applies to integer
specifiers: i, d, o, u, x, and X).

h

The argument is interpreted as a short integer
or unsigned short integer (only applies to integer
specifiers: i, d, o, u, x, and X).

l

The argument is interpreted as a long integer or
unsigned long integer for integer specifiers (i, d,
o, u, x, and X), and as a wide character or wide
character string for specifiers c and s.

ll

The argument is interpreted as a long long integer
or unsigned long long integer for integer specifiers
(i, d, o, u, x, and X), and as a wide character or
wide character string for specifiers c and s.

L

The argument is interpreted as a long double (only
applies to floating point specifiers: e, E, f, g, and
G).

j or z or t

Not supported

specifier
c

Qualifying Input
Single character: Reads the next
character. If a width different
from 1 is specified, the function
reads width characters and stores
them in the successive locations
of the array passed as argument.
No null character is appended at
the end.

Type of argument
char ∗

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Typical use case
specifier

Qualifying Input

Type of argument

i

Integer: : Number optionally
preceded with a + or - sign

int ∗

d

Decimal integer: Number optionally preceded with a + or sign

int ∗

a, A, e, E, f, F, g, G

Floating point: Decimal number
containing a decimal point, optionally preceded by a + or - sign
and optionally followed by the
e or E character and a decimal
number. Two examples of valid
entries are -732.103 and 7.12e4

float ∗

o

Octal Integer:

int ∗

s

String of characters. This reads
subsequent characters until a
white space is found (white
space characters are considered
to be blank, newline, and tab).

char ∗

u

Unsigned decimal integer.

unsigned int ∗

The debug console has its own printf/scanf/putchar/getchar functions which are defined in the header file:
int DbgConsole_Printf(const char *fmt_s, ...);

This utility supports selecting toolchain’s printf/scanf or the KSDK printf/scanf:
#if SDK_DEBUGCONSOLE
/* Select printf, scanf, putchar, getchar of SDK version.
#define PRINTF
DbgConsole_Printf
#define SCANF
DbgConsole_Scanf
#define PUTCHAR
DbgConsole_Putchar
#define GETCHAR
DbgConsole_Getchar
#else
/* Select printf, scanf, putchar, getchar of toolchain.
#define PRINTF
printf
#define SCANF
scanf
#define PUTCHAR
putchar
#define GETCHAR
getchar
#endif /* SDK_DEBUGCONSOLE

12.2

Typical use case

Some examples use the PUTCHAR & GETCHAR function
ch = GETCHAR();
PUTCHAR(ch);

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Typical use case

Some examples use the PRINTF function
Statement prints the string format.
PRINTF("%s %s\r\n", "Hello", "world!");

Statement prints the hexadecimal format/
PRINTF("0x%02X hexadecimal number equivalents 255", 255);

Statement prints the decimal floating point and unsigned decimal.
PRINTF("Execution timer: %s\n\rTime: %u ticks %2.5f milliseconds\n\rDONE\n\r", "1 day", 86400, 86.4);

Some examples use the SCANF function
PRINTF("Enter a decimal number: ");
SCANF("%d", &i);
PRINTF("\r\nYou have entered %d.\r\n", i, i);
PRINTF("Enter a hexadecimal number: ");
SCANF("%x", &i);
PRINTF("\r\nYou have entered 0x%X (%d).\r\n", i, i);

Print out failure messages using KSDK __assert_func:
void __assert_func(const char *file, int line, const char *func, const char *failedExpr)
{
PRINTF("ASSERT ERROR \" %s \": file \"%s\" Line \"%d\" function name \"%s\" \n", failedExpr, file ,
line, func);
for (;;)
{}
}

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Chapter 13
DMA: Direct Memory Access Controller Driver
13.1

Overview

The KSDK provides a peripheral driver for the Direct Memory Access (DMA) of Kinetis devices.

13.2
13.2.1

Typical use case
DMA Operation

dma_transfer_config_t transferConfig;
uint32_t transferDone = false;
DMA_Init(DMA0);
DMA_CreateHandle(&g_DMA_Handle, DMA0, channel);
DMA_InstallCallback(&g_DMA_Handle, DMA_Callback, &transferDone);
DMA_PrepareTransfer(&transferConfig, srcAddr, srcWidth, destAddr, destWidth,
transferBytes,
kDMA_MemoryToMemory);
DMA_SubmitTransfer(&g_DMA_Handle, &transferConfig, true);
DMA_StartTransfer(&g_DMA_Handle);
/* Wait for DMA transfer finish
while (transferDone != true);

Files
• file fsl_dma.h

Data Structures
• struct dma_transfer_config_t
DMA transfer configuration structure. More...

• struct dma_channel_link_config_t
DMA transfer configuration structure. More...

• struct dma_handle_t
DMA DMA handle structure. More...

Typedefs
• typedef void(∗ dma_callback )(struct _dma_handle ∗handle, void ∗userData)
Callback function prototype for the DMA driver.

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Enumerations
• enum _dma_channel_status_flags {
kDMA_TransactionsBCRFlag = DMA_DSR_BCR_BCR_MASK,
kDMA_TransactionsDoneFlag = DMA_DSR_BCR_DONE_MASK,
kDMA_TransactionsBusyFlag = DMA_DSR_BCR_BSY_MASK,
kDMA_TransactionsRequestFlag = DMA_DSR_BCR_REQ_MASK,
kDMA_BusErrorOnDestinationFlag = DMA_DSR_BCR_BED_MASK,
kDMA_BusErrorOnSourceFlag = DMA_DSR_BCR_BES_MASK,
kDMA_ConfigurationErrorFlag = DMA_DSR_BCR_CE_MASK }
status flag for the DMA driver.

• enum dma_transfer_size_t {
kDMA_Transfersize32bits = 0x0U,
kDMA_Transfersize8bits,
kDMA_Transfersize16bits }
DMA transfer size type.

• enum dma_modulo_t {
kDMA_ModuloDisable = 0x0U,
kDMA_Modulo16Bytes,
kDMA_Modulo32Bytes,
kDMA_Modulo64Bytes,
kDMA_Modulo128Bytes,
kDMA_Modulo256Bytes,
kDMA_Modulo512Bytes,
kDMA_Modulo1KBytes,
kDMA_Modulo2KBytes,
kDMA_Modulo4KBytes,
kDMA_Modulo8KBytes,
kDMA_Modulo16KBytes,
kDMA_Modulo32KBytes,
kDMA_Modulo64KBytes,
kDMA_Modulo128KBytes,
kDMA_Modulo256KBytes }
Configuration type for the DMA modulo.

• enum dma_channel_link_type_t {
kDMA_ChannelLinkDisable = 0x0U,
kDMA_ChannelLinkChannel1AndChannel2,
kDMA_ChannelLinkChannel1,
kDMA_ChannelLinkChannel1AfterBCR0 }
DMA channel link type.

• enum dma_transfer_type_t {
kDMA_MemoryToMemory = 0x0U,
kDMA_PeripheralToMemory,
kDMA_MemoryToPeripheral }
DMA transfer type.

• enum dma_transfer_options_t {
kDMA_NoOptions = 0x0U,
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Typical use case
kDMA_EnableInterrupt }
DMA transfer options.

• enum _dma_transfer_status
DMA transfer status.

Driver version
• #define FSL_DMA_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
DMA driver version 2.0.0.

DMA Initialization and De-initialization
• void DMA_Init (DMA_Type ∗base)
Initializes the DMA peripheral.

• void DMA_Deinit (DMA_Type ∗base)
Deinitializes the DMA peripheral.

DMA Channel Operation
• void DMA_ResetChannel (DMA_Type ∗base, uint32_t channel)
Resets the DMA channel.

• void DMA_SetTransferConfig (DMA_Type ∗base, uint32_t channel, const dma_transfer_config_t
∗config)
Configures the DMA transfer attribute.

• void DMA_SetChannelLinkConfig (DMA_Type ∗base, uint32_t channel, const dma_channel_link_config_t ∗config)
Configures the DMA channel link feature.

• static void DMA_SetSourceAddress (DMA_Type ∗base, uint32_t channel, uint32_t srcAddr)
Sets the DMA source address for the DMA transfer.

• static void DMA_SetDestinationAddress (DMA_Type ∗base, uint32_t channel, uint32_t destAddr)
Sets the DMA destination address for the DMA transfer.

• static void DMA_SetTransferSize (DMA_Type ∗base, uint32_t channel, uint32_t size)
Sets the DMA transfer size for the DMA transfer.

• void DMA_SetModulo (DMA_Type ∗base, uint32_t channel, dma_modulo_t srcModulo, dma_modulo_t destModulo)
Sets the DMA modulo for the DMA transfer.

• static void DMA_EnableCycleSteal (DMA_Type ∗base, uint32_t channel, bool enable)
Enables the DMA cycle steal for the DMA transfer.

• static void DMA_EnableAutoAlign (DMA_Type ∗base, uint32_t channel, bool enable)
Enables the DMA auto align for the DMA transfer.

• static void DMA_EnableAsyncRequest (DMA_Type ∗base, uint32_t channel, bool enable)
Enables the DMA async request for the DMA transfer.

• static void DMA_EnableInterrupts (DMA_Type ∗base, uint32_t channel)
Enables an interrupt for the DMA transfer.

• static void DMA_DisableInterrupts (DMA_Type ∗base, uint32_t channel)
Disables an interrupt for the DMA transfer.

DMA Channel Transfer Operation
• static void DMA_EnableChannelRequest (DMA_Type ∗base, uint32_t channel)
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Enables the DMA hardware channel request.

• static void DMA_DisableChannelRequest (DMA_Type ∗base, uint32_t channel)
Disables the DMA hardware channel request.

• static void DMA_TriggerChannelStart (DMA_Type ∗base, uint32_t channel)
Starts the DMA transfer with a software trigger.

DMA Channel Status Operation
• static uint32_t DMA_GetRemainingBytes (DMA_Type ∗base, uint32_t channel)
Gets the remaining bytes of the current DMA transfer.

• static uint32_t DMA_GetChannelStatusFlags (DMA_Type ∗base, uint32_t channel)
Gets the DMA channel status flags.

• static void DMA_ClearChannelStatusFlags (DMA_Type ∗base, uint32_t channel, uint32_t mask)
Clears the DMA channel status flags.

DMA Channel Transactional Operation
• void DMA_CreateHandle (dma_handle_t ∗handle, DMA_Type ∗base, uint32_t channel)
Creates the DMA handle.

• void DMA_SetCallback (dma_handle_t ∗handle, dma_callback callback, void ∗userData)
Sets the DMA callback function.

• void DMA_PrepareTransfer (dma_transfer_config_t ∗config, void ∗srcAddr, uint32_t srcWidth,
void ∗destAddr, uint32_t destWidth, uint32_t transferBytes, dma_transfer_type_t type)
Prepares the DMA transfer configuration structure.

• status_t DMA_SubmitTransfer (dma_handle_t ∗handle, const dma_transfer_config_t ∗config,
uint32_t options)
Submits the DMA transfer request.

• static void DMA_StartTransfer (dma_handle_t ∗handle)
DMA starts a transfer.

• static void DMA_StopTransfer (dma_handle_t ∗handle)
DMA stops a transfer.

• void DMA_AbortTransfer (dma_handle_t ∗handle)
DMA aborts a transfer.

• void DMA_HandleIRQ (dma_handle_t ∗handle)
DMA IRQ handler for current transfer complete.

13.3
13.3.1

Data Structure Documentation
struct dma_transfer_config_t

Data Fields
• uint32_t srcAddr
DMA transfer source address.

• uint32_t destAddr
DMA destination address.

• bool enableSrcIncrement
Source address increase after each transfer.

• dma_transfer_size_t srcSize
Source transfer size unit.

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Data Structure Documentation
• bool enableDestIncrement
Destination address increase after each transfer.

• dma_transfer_size_t destSize
Destination transfer unit.

• uint32_t transferSize
The number of bytes to be transferred.
13.3.1.0.0.16

Field Documentation

13.3.1.0.0.16.1

uint32_t dma_transfer_config_t::srcAddr

13.3.1.0.0.16.2

uint32_t dma_transfer_config_t::destAddr

13.3.1.0.0.16.3

bool dma_transfer_config_t::enableSrcIncrement

13.3.1.0.0.16.4 dma_transfer_size_t dma_transfer_config_t::srcSize
13.3.1.0.0.16.5

bool dma_transfer_config_t::enableDestIncrement

13.3.1.0.0.16.6 dma_transfer_size_t dma_transfer_config_t::destSize
13.3.1.0.0.16.7

13.3.2

uint32_t dma_transfer_config_t::transferSize

struct dma_channel_link_config_t

Data Fields
• dma_channel_link_type_t linkType
Channel link type.

• uint32_t channel1
The index of channel 1.

• uint32_t channel2
The index of channel 2.
13.3.2.0.0.17

Field Documentation

13.3.2.0.0.17.1 dma_channel_link_type_t dma_channel_link_config_t::linkType
13.3.2.0.0.17.2

uint32_t dma_channel_link_config_t::channel1

13.3.2.0.0.17.3

uint32_t dma_channel_link_config_t::channel2

13.3.3

struct dma_handle_t

Data Fields
• DMA_Type ∗ base
DMA peripheral address.

• uint8_t channel
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Enumeration Type Documentation
DMA channel used.

• dma_callback callback
DMA callback function.

• void ∗ userData
Callback parameter.
13.3.3.0.0.18

Field Documentation

13.3.3.0.0.18.1

DMA_Type∗ dma_handle_t::base

13.3.3.0.0.18.2

uint8_t dma_handle_t::channel

13.3.3.0.0.18.3 dma_callback dma_handle_t::callback
13.3.3.0.0.18.4

13.4
13.4.1

13.5
13.5.1

13.6
13.6.1

void∗ dma_handle_t::userData

Macro Definition Documentation
#define FSL_DMA_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Typedef Documentation
typedef void(∗ dma_callback)(struct _dma_handle ∗handle, void ∗userData)

Enumeration Type Documentation
enum _dma_channel_status_flags

Enumerator
kDMA_TransactionsBCRFlag Contains the number of bytes yet to be transferred for a given block.
kDMA_TransactionsDoneFlag Transactions Done.
kDMA_TransactionsBusyFlag Transactions Busy.
kDMA_TransactionsRequestFlag Transactions Request.
kDMA_BusErrorOnDestinationFlag Bus Error on Destination.
kDMA_BusErrorOnSourceFlag Bus Error on Source.
kDMA_ConfigurationErrorFlag Configuration Error.

13.6.2

enum dma_transfer_size_t

Enumerator
kDMA_Transfersize32bits 32 bits are transferred for every read/write
kDMA_Transfersize8bits 8 bits are transferred for every read/write
kDMA_Transfersize16bits 16b its are transferred for every read/write

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Enumeration Type Documentation

13.6.3

enum dma_modulo_t

Enumerator
kDMA_ModuloDisable Buffer disabled.
kDMA_Modulo16Bytes Circular buffer size is 16 bytes.
kDMA_Modulo32Bytes Circular buffer size is 32 bytes.
kDMA_Modulo64Bytes Circular buffer size is 64 bytes.
kDMA_Modulo128Bytes Circular buffer size is 128 bytes.
kDMA_Modulo256Bytes Circular buffer size is 256 bytes.
kDMA_Modulo512Bytes Circular buffer size is 512 bytes.
kDMA_Modulo1KBytes Circular buffer size is 1 KB.
kDMA_Modulo2KBytes Circular buffer size is 2 KB.
kDMA_Modulo4KBytes Circular buffer size is 4 KB.
kDMA_Modulo8KBytes Circular buffer size is 8 KB.
kDMA_Modulo16KBytes Circular buffer size is 16 KB.
kDMA_Modulo32KBytes Circular buffer size is 32 KB.
kDMA_Modulo64KBytes Circular buffer size is 64 KB.
kDMA_Modulo128KBytes Circular buffer size is 128 KB.
kDMA_Modulo256KBytes Circular buffer size is 256 KB.

13.6.4

enum dma_channel_link_type_t

Enumerator
kDMA_ChannelLinkDisable No channel link.
kDMA_ChannelLinkChannel1AndChannel2 Perform a link to channel LCH1 after each cyclesteal transfer. followed by a link to LCH2 after the BCR decrements to 0.
kDMA_ChannelLinkChannel1 Perform a link to LCH1 after each cycle-steal transfer.
kDMA_ChannelLinkChannel1AfterBCR0 Perform a link to LCH1 after the BCR decrements.

13.6.5

enum dma_transfer_type_t

Enumerator
kDMA_MemoryToMemory Memory to Memory transfer.
kDMA_PeripheralToMemory Peripheral to Memory transfer.
kDMA_MemoryToPeripheral Memory to Peripheral transfer.

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13.6.6

enum dma_transfer_options_t

Enumerator
kDMA_NoOptions Transfer without options.
kDMA_EnableInterrupt Enable interrupt while transfer complete.

13.7
13.7.1

Function Documentation
void DMA_Init ( DMA_Type ∗ base )

This function ungates the DMA clock.
Parameters
base

13.7.2

DMA peripheral base address.

void DMA_Deinit ( DMA_Type ∗ base )

This function gates the DMA clock.
Parameters
base

13.7.3

DMA peripheral base address.

void DMA_ResetChannel ( DMA_Type ∗ base, uint32_t channel )

Sets all register values to reset values and enables the cycle steal and auto stop channel request features.
Parameters
base
channel

13.7.4

DMA peripheral base address.
DMA channel number.

void DMA_SetTransferConfig ( DMA_Type ∗ base, uint32_t channel, const
dma_transfer_config_t ∗ config )

This function configures the transfer attribute including the source address, destination address, transfer
size, and so on. This example shows how to set up the the dma_transfer_config_t parameters and how to
call the DMA_ConfigBasicTransfer function.

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Function Documentation
dma_transfer_config_t transferConfig;
memset(&transferConfig, 0, sizeof(transferConfig));
transferConfig.srcAddr = (uint32_t)srcAddr;
transferConfig.destAddr = (uint32_t)destAddr;
transferConfig.enbaleSrcIncrement = true;
transferConfig.enableDestIncrement = true;
transferConfig.srcSize = kDMA_Transfersize32bits;
transferConfig.destSize = kDMA_Transfersize32bits;
transferConfig.transferSize = sizeof(uint32_t) * BUFF_LENGTH;
DMA_SetTransferConfig(DMA0, 0, &transferConfig);

Parameters
base
channel
config

13.7.5

DMA peripheral base address.
DMA channel number.
Pointer to the DMA transfer configuration structure.

void DMA_SetChannelLinkConfig ( DMA_Type ∗ base, uint32_t channel,
const dma_channel_link_config_t ∗ config )

This function allows DMA channels to have their transfers linked. The current DMA channel triggers a
DMA request to the linked channels (LCH1 or LCH2) depending on the channel link type. Perform a link
to channel LCH1 after each cycle-steal transfer followed by a link to LCH2 after the BCR decrements to 0
if the type is kDMA_ChannelLinkChannel1AndChannel2. Perform a link to LCH1 after each cycle-steal
transfer if the type is kDMA_ChannelLinkChannel1. Perform a link to LCH1 after the BCR decrements
to 0 if the type is kDMA_ChannelLinkChannel1AfterBCR0.
Parameters
base
channel
config

13.7.6

DMA peripheral base address.
DMA channel number.
Pointer to the channel link configuration structure.

static void DMA_SetSourceAddress ( DMA_Type ∗ base, uint32_t channel,
uint32_t srcAddr ) [inline], [static]

Parameters

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Function Documentation
base

13.7.7

DMA peripheral base address.

channel

DMA channel number.

srcAddr

DMA source address.

static void DMA_SetDestinationAddress ( DMA_Type ∗ base, uint32_t
channel, uint32_t destAddr ) [inline], [static]

Parameters
base
channel
destAddr

13.7.8

DMA peripheral base address.
DMA channel number.
DMA destination address.

static void DMA_SetTransferSize ( DMA_Type ∗ base, uint32_t channel,
uint32_t size ) [inline], [static]

Parameters
base
channel
size

13.7.9

DMA peripheral base address.
DMA channel number.
The number of bytes to be transferred.

void DMA_SetModulo ( DMA_Type ∗ base, uint32_t channel, dma_modulo_t
srcModulo, dma_modulo_t destModulo )

This function defines a specific address range specified to be the value after (SAR + SSIZE)/(DAR + DSIZE) calculation is performed or the original register value. It provides the ability to implement a circular
data queue easily.
Parameters
base

DMA peripheral base address.

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Function Documentation
channel

DMA channel number.

srcModulo

source address modulo.

destModulo

destination address modulo.

static void DMA_EnableCycleSteal ( DMA_Type ∗ base, uint32_t channel,
bool enable ) [inline], [static]

13.7.10

If the cycle steal feature is enabled (true), the DMA controller forces a single read/write transfer per
request, or it continuously makes read/write transfers until the BCR decrements to 0.
Parameters
base
channel
enable

DMA peripheral base address.
DMA channel number.
The command for enable (true) or disable (false).

static void DMA_EnableAutoAlign ( DMA_Type ∗ base, uint32_t channel,
bool enable ) [inline], [static]

13.7.11

If the auto align feature is enabled (true), the appropriate address register increments, regardless of DINC
or SINC.
Parameters
base
channel
enable

13.7.12

DMA peripheral base address.
DMA channel number.
The command for enable (true) or disable (false).

static void DMA_EnableAsyncRequest ( DMA_Type ∗ base, uint32_t
channel, bool enable ) [inline], [static]

If the async request feature is enabled (true), the DMA supports asynchronous DREQs while the MCU is
in stop mode.

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Parameters
base
channel
enable

DMA peripheral base address.
DMA channel number.
The command for enable (true) or disable (false).

static void DMA_EnableInterrupts ( DMA_Type ∗ base, uint32_t channel )
[inline], [static]

13.7.13

Parameters
base
channel

DMA peripheral base address.
DMA channel number.

static void DMA_DisableInterrupts ( DMA_Type ∗ base, uint32_t channel )
[inline], [static]

13.7.14

Parameters
base
channel

DMA peripheral base address.
DMA channel number.

static void DMA_EnableChannelRequest ( DMA_Type ∗ base, uint32_t
channel ) [inline], [static]

13.7.15

Parameters
base
channel

13.7.16

DMA peripheral base address.
The DMA channel number.

static void DMA_DisableChannelRequest ( DMA_Type ∗ base, uint32_t
channel ) [inline], [static]

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Function Documentation
Parameters
base
channel

DMA peripheral base address.
DMA channel number.

static void DMA_TriggerChannelStart ( DMA_Type ∗ base, uint32_t
channel ) [inline], [static]

13.7.17

This function starts only one read/write iteration.
Parameters
base
channel

DMA peripheral base address.
The DMA channel number.

static uint32_t DMA_GetRemainingBytes ( DMA_Type ∗ base, uint32_t
channel ) [inline], [static]

13.7.18

Parameters
base
channel

DMA peripheral base address.
DMA channel number.

Returns
The number of bytes which have not been transferred yet.

13.7.19

static uint32_t DMA_GetChannelStatusFlags ( DMA_Type ∗ base, uint32_t
channel ) [inline], [static]

Parameters
base

DMA peripheral base address.

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channel

DMA channel number.

Returns
The mask of the channel status. Use the _dma_channel_status_flags type to decode the return 32 bit
variables.

static void DMA_ClearChannelStatusFlags ( DMA_Type ∗ base, uint32_t
channel, uint32_t mask ) [inline], [static]

13.7.20

Parameters
base
channel
mask

DMA peripheral base address.
DMA channel number.
The mask of the channel status to be cleared. Use the defined _dma_channel_status_flags type.

void DMA_CreateHandle ( dma_handle_t ∗ handle, DMA_Type ∗ base,
uint32_t channel )

13.7.21

This function is called first if using the transactional API for the DMA. This function initializes the internal
state of the DMA handle.
Parameters
handle
base
channel

13.7.22

DMA handle pointer. The DMA handle stores callback function and parameters.
DMA peripheral base address.
DMA channel number.

void DMA_SetCallback ( dma_handle_t ∗ handle, dma_callback callback,
void ∗ userData )

This callback is called in the DMA IRQ handler. Use the callback to do something after the current transfer
complete.

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Function Documentation
Parameters
handle
callback
userData

DMA handle pointer.
DMA callback function pointer.
Parameter for callback function. If it is not needed, just set to NULL.

void DMA_PrepareTransfer ( dma_transfer_config_t ∗ config, void ∗
srcAddr, uint32_t srcWidth, void ∗ destAddr, uint32_t destWidth, uint32_t
transferBytes, dma_transfer_type_t type )

13.7.23

This function prepares the transfer configuration structure according to the user input.
Parameters
config
srcAddr

Pointer to the user configuration structure of type dma_transfer_config_t.
DMA transfer source address.

srcWidth

DMA transfer source address width (byte).

destAddr

DMA transfer destination address.

destWidth
transferBytes
type

DMA transfer destination address width (byte).
DMA transfer bytes to be transferred.
DMA transfer type.

status_t DMA_SubmitTransfer ( dma_handle_t ∗ handle, const
dma_transfer_config_t ∗ config, uint32_t options )

13.7.24

This function submits the DMA transfer request according to the transfer configuration structure.
Parameters
handle

DMA handle pointer.

config

Pointer to DMA transfer configuration structure.

options

Additional configurations for transfer. Use the defined dma_transfer_options_t type.

Return values

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kStatus_DMA_Success
kStatus_DMA_Busy

It indicates that the DMA submit transfer request succeeded.
It indicates that the DMA is busy. Submit transfer request is not allowed.

Note
This function can’t process multi transfer request.

static void DMA_StartTransfer ( dma_handle_t ∗ handle ) [inline],

13.7.25

[static]
This function enables the channel request. Call this function after submitting a transfer request.
Parameters
handle

DMA handle pointer.

Return values
kStatus_DMA_Success

It indicates that the DMA start transfer succeed.

kStatus_DMA_Busy

It indicates that the DMA has started a transfer.

static void DMA_StopTransfer ( dma_handle_t ∗ handle ) [inline],

13.7.26

[static]
This function disables the channel request to stop a DMA transfer. The transfer can be resumed by calling
the DMA_StartTransfer.
Parameters
handle

13.7.27

DMA handle pointer.

void DMA_AbortTransfer ( dma_handle_t ∗ handle )

This function disables the channel request and clears all status bits. Submit another transfer after calling
this API.

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Function Documentation
Parameters
handle

DMA handle pointer.

void DMA_HandleIRQ ( dma_handle_t ∗ handle )

13.7.28

This function clears the channel interrupt flag and calls the callback function if it is not NULL.
Parameters
handle

DMA handle pointer.

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Chapter 14
DMAMUX: Direct Memory Access Multiplexer Driver
14.1

Overview

The KSDK provides a peripheral driver for the Direct Memory Access Multiplexer(DMAMUX) of Kinetis
devices.

14.2
14.2.1

Typical use case
DMAMUX Operation

DMAMUX_Init(DMAMUX0);
DMAMUX_SetSource(DMAMUX0, channel, source);
DMAMUX_EnableChannel(DMAMUX0, channel);
...
DMAMUX_DisableChannel(DMAMUX, channel);
DMAMUX_Deinit(DMAMUX0);

Files
• file fsl_dmamux.h

Driver version
• #define FSL_DMAMUX_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
DMAMUX driver version 2.0.0.

DMAMUX Initialize and De-initialize
• void DMAMUX_Init (DMAMUX_Type ∗base)
Initializes DMAMUX peripheral.

• void DMAMUX_Deinit (DMAMUX_Type ∗base)
Deinitializes DMAMUX peripheral.

DMAMUX Channel Operation
• static void DMAMUX_EnableChannel (DMAMUX_Type ∗base, uint32_t channel)
Enable DMAMUX channel.

• static void DMAMUX_DisableChannel (DMAMUX_Type ∗base, uint32_t channel)
Disable DMAMUX channel.

• static void DMAMUX_SetSource (DMAMUX_Type ∗base, uint32_t channel, uint8_t source)
Configure DMAMUX channel source.

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14.3
14.3.1

14.4
14.4.1

Macro Definition Documentation
#define FSL_DMAMUX_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Function Documentation
void DMAMUX_Init ( DMAMUX_Type ∗ base )

This function ungate the DMAMUX clock.

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Function Documentation
Parameters
base

14.4.2

DMAMUX peripheral base address.

void DMAMUX_Deinit ( DMAMUX_Type ∗ base )

This function gate the DMAMUX clock.
Parameters
base

14.4.3

DMAMUX peripheral base address.

static void DMAMUX_EnableChannel ( DMAMUX_Type ∗ base, uint32_t
channel ) [inline], [static]

This function enable DMAMUX channel to work.
Parameters
base
channel

14.4.4

DMAMUX peripheral base address.
DMAMUX channel number.

static void DMAMUX_DisableChannel ( DMAMUX_Type ∗ base, uint32_t
channel ) [inline], [static]

This function disable DMAMUX channel.
Note
User must disable DMAMUX channel before configure it.
Parameters
base

DMAMUX peripheral base address.

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Function Documentation
channel

14.4.5

DMAMUX channel number.

static void DMAMUX_SetSource ( DMAMUX_Type ∗ base, uint32_t channel,
uint8_t source ) [inline], [static]

Parameters
base
channel
source

DMAMUX peripheral base address.
DMAMUX channel number.
Channel source which is used to trigger DMA transfer.

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Chapter 15
DSPI: Serial Peripheral Interface Driver
15.1

Overview

The KSDK provides a peripheral driver for the Serial Peripheral Interface (SPI) module of Kinetis devices.

Modules
•
•
•
•
•
•

DSPI DMA Driver
DSPI Driver
DSPI FreeRTOS Driver
DSPI eDMA Driver
DSPI µCOS/II Driver
DSPI µCOS/III Driver

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DSPI Driver

15.2

DSPI Driver

15.2.1

Overview

This section describes the programming interface of the DSPI Peripheral driver. The DSPI driver configures DSPI module, provides the functional and transactional interfaces to build the DSPI application.

15.2.2
15.2.2.1

Typical use case
Master Operation

dspi_master_handle_t g_m_handle; //global variable
dspi_master_config_t masterConfig;
masterConfig.whichCtar
masterConfig.ctarConfig.baudRate
masterConfig.ctarConfig.bitsPerFrame
masterConfig.ctarConfig.cpol
kDSPI_ClockPolarityActiveHigh;
masterConfig.ctarConfig.cpha
kDSPI_ClockPhaseFirstEdge;
masterConfig.ctarConfig.direction
kDSPI_MsbFirst;
masterConfig.ctarConfig.pcsToSckDelayInNanoSec
baudrate ;
masterConfig.ctarConfig.lastSckToPcsDelayInNanoSec
baudrate ;
masterConfig.ctarConfig.betweenTransferDelayInNanoSec
baudrate ;
masterConfig.whichPcs
masterConfig.pcsActiveHighOrLow
kDSPI_PcsActiveLow;
masterConfig.enableContinuousSCK
masterConfig.enableRxFifoOverWrite
masterConfig.enableModifiedTimingFormat
masterConfig.samplePoint
kDSPI_SckToSin0Clock;
DSPI_MasterInit(base, &masterConfig, srcClock_Hz);

= kDSPI_Ctar0;
= baudrate;
= 8;
=
=
=
= 1000000000 /
= 1000000000 /
= 1000000000 /
= kDSPI_Pcs0;
=
= false;
= false;
= false;
=

//srcClock_Hz = CLOCK_GetFreq(xxx);
DSPI_MasterInit(base, &masterConfig, srcClock_Hz);
DSPI_MasterTransferCreateHandle(base, &g_m_handle, NULL, NULL);
masterXfer.txData
= masterSendBuffer;
masterXfer.rxData
= masterReceiveBuffer;
masterXfer.dataSize
= transfer_dataSize;
masterXfer.configFlags = kDSPI_MasterCtar0 | kDSPI_MasterPcs0 ;
DSPI_MasterTransferBlocking(base, &g_m_handle, &masterXfer);

15.2.2.2

Slave Operation

dspi_slave_handle_t g_s_handle;//global variable
/*Slave config
slaveConfig.whichCtar
= kDSPI_Ctar0;
slaveConfig.ctarConfig.bitsPerFrame
= 8;
slaveConfig.ctarConfig.cpol
= kDSPI_ClockPolarityActiveHigh;
slaveConfig.ctarConfig.cpha
= kDSPI_ClockPhaseFirstEdge;
slaveConfig.enableContinuousSCK
= false;
slaveConfig.enableRxFifoOverWrite
= false;

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DSPI Driver
slaveConfig.enableModifiedTimingFormat = false;
slaveConfig.samplePoint
= kDSPI_SckToSin0Clock;
DSPI_SlaveInit(base, &slaveConfig);
slaveXfer.txData
slaveXfer.rxData
slaveXfer.dataSize
slaveXfer.configFlags

=
=
=
=

slaveSendBuffer0;
slaveReceiveBuffer0;
transfer_dataSize;
kDSPI_SlaveCtar0;

bool isTransferCompleted = false;
DSPI_SlaveTransferCreateHandle(base, &g_s_handle, DSPI_SlaveUserCallback, &isTransferCompleted);
DSPI_SlaveTransferNonBlocking(&g_s_handle, &slaveXfer);

//void DSPI_SlaveUserCallback(SPI_Type *base, dspi_slave_handle_t *handle, status_t status, void *
isTransferCompleted)
//{
//
if (status == kStatus_Success)
//
{
//
__NOP();
//
}
//
else if (status == kStatus_DSPI_Error)
//
{
//
__NOP();
//
}
//
//
*((bool *)isTransferCompleted) = true;
//
//
PRINTF("This is DSPI slave call back . \r\n");
//}

Files
• file fsl_dspi.h

Data Structures
• struct dspi_command_data_config_t
DSPI master command date configuration used for SPIx_PUSHR. More...

• struct dspi_master_ctar_config_t
DSPI master ctar configuration structure. More...

• struct dspi_master_config_t
DSPI master configuration structure. More...

• struct dspi_slave_ctar_config_t
DSPI slave ctar configuration structure. More...

• struct dspi_slave_config_t
DSPI slave configuration structure. More...

• struct dspi_transfer_t
DSPI master/slave transfer structure. More...

• struct dspi_master_handle_t
DSPI master transfer handle structure used for transactional API. More...

• struct dspi_slave_handle_t
DSPI slave transfer handle structure used for transactional API. More...

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Macros
• #define DSPI_MASTER_CTAR_SHIFT (0U)
DSPI master CTAR shift macro , internal used.

• #define DSPI_MASTER_CTAR_MASK (0x0FU)
DSPI master CTAR mask macro , internal used.

• #define DSPI_MASTER_PCS_SHIFT (4U)
DSPI master PCS shift macro , internal used.

• #define DSPI_MASTER_PCS_MASK (0xF0U)
DSPI master PCS mask macro , internal used.

• #define DSPI_SLAVE_CTAR_SHIFT (0U)
DSPI slave CTAR shift macro , internal used.

• #define DSPI_SLAVE_CTAR_MASK (0x07U)
DSPI slave CTAR mask macro , internal used.

Typedefs
• typedef void(∗ dspi_master_transfer_callback_t )(SPI_Type ∗base, dspi_master_handle_t ∗handle,
status_t status, void ∗userData)
Completion callback function pointer type.

• typedef void(∗ dspi_slave_transfer_callback_t )(SPI_Type ∗base, dspi_slave_handle_t ∗handle,
status_t status, void ∗userData)
Completion callback function pointer type.

Enumerations
• enum _dspi_status {
kStatus_DSPI_Busy = MAKE_STATUS(kStatusGroup_DSPI, 0),
kStatus_DSPI_Error = MAKE_STATUS(kStatusGroup_DSPI, 1),
kStatus_DSPI_Idle = MAKE_STATUS(kStatusGroup_DSPI, 2),
kStatus_DSPI_OutOfRange = MAKE_STATUS(kStatusGroup_DSPI, 3) }
Status for the DSPI driver.

• enum _dspi_flags {
kDSPI_TxCompleteFlag = SPI_SR_TCF_MASK,
kDSPI_EndOfQueueFlag = SPI_SR_EOQF_MASK,
kDSPI_TxFifoUnderflowFlag = SPI_SR_TFUF_MASK,
kDSPI_TxFifoFillRequestFlag = SPI_SR_TFFF_MASK,
kDSPI_RxFifoOverflowFlag = SPI_SR_RFOF_MASK,
kDSPI_RxFifoDrainRequestFlag = SPI_SR_RFDF_MASK,
kDSPI_TxAndRxStatusFlag = SPI_SR_TXRXS_MASK,
kDSPI_AllStatusFlag }
DSPI status flags in SPIx_SR register.

• enum _dspi_interrupt_enable {

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DSPI Driver
kDSPI_TxCompleteInterruptEnable = SPI_RSER_TCF_RE_MASK,
kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK,
kDSPI_TxFifoUnderflowInterruptEnable = SPI_RSER_TFUF_RE_MASK,
kDSPI_TxFifoFillRequestInterruptEnable = SPI_RSER_TFFF_RE_MASK,
kDSPI_RxFifoOverflowInterruptEnable = SPI_RSER_RFOF_RE_MASK,
kDSPI_RxFifoDrainRequestInterruptEnable = SPI_RSER_RFDF_RE_MASK,
kDSPI_AllInterruptEnable }
DSPI interrupt source.

• enum _dspi_dma_enable {
kDSPI_TxDmaEnable = (SPI_RSER_TFFF_RE_MASK | SPI_RSER_TFFF_DIRS_MASK),
kDSPI_RxDmaEnable = (SPI_RSER_RFDF_RE_MASK | SPI_RSER_RFDF_DIRS_MASK) }
DSPI DMA source.

• enum dspi_master_slave_mode_t {
kDSPI_Master = 1U,
kDSPI_Slave = 0U }
DSPI master or slave mode configuration.

• enum dspi_master_sample_point_t {
kDSPI_SckToSin0Clock = 0U,
kDSPI_SckToSin1Clock = 1U,
kDSPI_SckToSin2Clock = 2U }
DSPI Sample Point: Controls when the DSPI master samples SIN in Modified Transfer Format.

• enum dspi_which_pcs_t {
kDSPI_Pcs0 = 1U << 0,
kDSPI_Pcs1 = 1U << 1,
kDSPI_Pcs2 = 1U << 2,
kDSPI_Pcs3 = 1U << 3,
kDSPI_Pcs4 = 1U << 4,
kDSPI_Pcs5 = 1U << 5 }
DSPI Peripheral Chip Select (Pcs) configuration (which Pcs to configure).

• enum dspi_pcs_polarity_config_t {
kDSPI_PcsActiveHigh = 0U,
kDSPI_PcsActiveLow = 1U }
DSPI Peripheral Chip Select (Pcs) Polarity configuration.

• enum _dspi_pcs_polarity {
kDSPI_Pcs0ActiveLow = 1U << 0,
kDSPI_Pcs1ActiveLow = 1U << 1,
kDSPI_Pcs2ActiveLow = 1U << 2,
kDSPI_Pcs3ActiveLow = 1U << 3,
kDSPI_Pcs4ActiveLow = 1U << 4,
kDSPI_Pcs5ActiveLow = 1U << 5,
kDSPI_PcsAllActiveLow = 0xFFU }
DSPI Peripheral Chip Select (Pcs) Polarity.

• enum dspi_clock_polarity_t {
kDSPI_ClockPolarityActiveHigh = 0U,
kDSPI_ClockPolarityActiveLow = 1U }
DSPI clock polarity configuration for a given CTAR.

• enum dspi_clock_phase_t {
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DSPI Driver
kDSPI_ClockPhaseFirstEdge = 0U,
kDSPI_ClockPhaseSecondEdge = 1U }
DSPI clock phase configuration for a given CTAR.

• enum dspi_shift_direction_t {
kDSPI_MsbFirst = 0U,
kDSPI_LsbFirst = 1U }
DSPI data shifter direction options for a given CTAR.

• enum dspi_delay_type_t {
kDSPI_PcsToSck = 1U,
kDSPI_LastSckToPcs,
kDSPI_BetweenTransfer }
DSPI delay type selection.

• enum dspi_ctar_selection_t {
kDSPI_Ctar0 = 0U,
kDSPI_Ctar1 = 1U,
kDSPI_Ctar2 = 2U,
kDSPI_Ctar3 = 3U,
kDSPI_Ctar4 = 4U,
kDSPI_Ctar5 = 5U,
kDSPI_Ctar6 = 6U,
kDSPI_Ctar7 = 7U }
DSPI Clock and Transfer Attributes Register (CTAR) selection.

• enum _dspi_transfer_config_flag_for_master {
kDSPI_MasterCtar0 = 0U << DSPI_MASTER_CTAR_SHIFT,
kDSPI_MasterCtar1 = 1U << DSPI_MASTER_CTAR_SHIFT,
kDSPI_MasterCtar2 = 2U << DSPI_MASTER_CTAR_SHIFT,
kDSPI_MasterCtar3 = 3U << DSPI_MASTER_CTAR_SHIFT,
kDSPI_MasterCtar4 = 4U << DSPI_MASTER_CTAR_SHIFT,
kDSPI_MasterCtar5 = 5U << DSPI_MASTER_CTAR_SHIFT,
kDSPI_MasterCtar6 = 6U << DSPI_MASTER_CTAR_SHIFT,
kDSPI_MasterCtar7 = 7U << DSPI_MASTER_CTAR_SHIFT,
kDSPI_MasterPcs0 = 0U << DSPI_MASTER_PCS_SHIFT,
kDSPI_MasterPcs1 = 1U << DSPI_MASTER_PCS_SHIFT,
kDSPI_MasterPcs2 = 2U << DSPI_MASTER_PCS_SHIFT,
kDSPI_MasterPcs3 = 3U << DSPI_MASTER_PCS_SHIFT,
kDSPI_MasterPcs4 = 4U << DSPI_MASTER_PCS_SHIFT,
kDSPI_MasterPcs5 = 5U << DSPI_MASTER_PCS_SHIFT,
kDSPI_MasterPcsContinuous = 1U << 20,
kDSPI_MasterActiveAfterTransfer = 1U << 21 }
Can use this enumeration for DSPI master transfer configFlags.

• enum _dspi_transfer_config_flag_for_slave { kDSPI_SlaveCtar0 = 0U << DSPI_SLAVE_CTAR_SHIFT }
Can use this enum for DSPI slave transfer configFlags.

• enum _dspi_transfer_state {
kDSPI_Idle = 0x0U,
kDSPI_Busy,
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DSPI Driver
kDSPI_Error }
DSPI transfer state, which is used for DSPI transactional APIs’ state machine.

Driver version
• #define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
DSPI driver version 2.1.0.

Dummy data
• #define DSPI_MASTER_DUMMY_DATA (0x00U)
Master dummy data used for tx if there is not txData.

• #define DSPI_SLAVE_DUMMY_DATA (0x00U)
Slave dummy data used for tx if there is not txData.

Initialization and deinitialization
• void DSPI_MasterInit (SPI_Type ∗base, const dspi_master_config_t ∗masterConfig, uint32_t srcClock_Hz)
Initializes the DSPI master.

• void DSPI_MasterGetDefaultConfig (dspi_master_config_t ∗masterConfig)
Sets the dspi_master_config_t structure to default values.

• void DSPI_SlaveInit (SPI_Type ∗base, const dspi_slave_config_t ∗slaveConfig)
DSPI slave configuration.

• void DSPI_SlaveGetDefaultConfig (dspi_slave_config_t ∗slaveConfig)
Sets the dspi_slave_config_t structure to default values.

• void DSPI_Deinit (SPI_Type ∗base)
De-initializes the DSPI peripheral.

• static void DSPI_Enable (SPI_Type ∗base, bool enable)
Enables the DSPI peripheral and sets the MCR MDIS to 0.

Status
• static uint32_t DSPI_GetStatusFlags (SPI_Type ∗base)
Gets the DSPI status flag state.

• static void DSPI_ClearStatusFlags (SPI_Type ∗base, uint32_t statusFlags)
Clears the DSPI status flag.

Interrupts
• void DSPI_EnableInterrupts (SPI_Type ∗base, uint32_t mask)
Enables the DSPI interrupts.

• static void DSPI_DisableInterrupts (SPI_Type ∗base, uint32_t mask)
Disables the DSPI interrupts.

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DMA Control
• static void DSPI_EnableDMA (SPI_Type ∗base, uint32_t mask)
Enables the DSPI DMA request.

• static void DSPI_DisableDMA (SPI_Type ∗base, uint32_t mask)
Disables the DSPI DMA request.

• static uint32_t DSPI_MasterGetTxRegisterAddress (SPI_Type ∗base)
Gets the DSPI master PUSHR data register address for the DMA operation.

• static uint32_t DSPI_SlaveGetTxRegisterAddress (SPI_Type ∗base)
Gets the DSPI slave PUSHR data register address for the DMA operation.

• static uint32_t DSPI_GetRxRegisterAddress (SPI_Type ∗base)
Gets the DSPI POPR data register address for the DMA operation.

Bus Operations
• static void DSPI_SetMasterSlaveMode (SPI_Type ∗base, dspi_master_slave_mode_t mode)
Configures the DSPI for master or slave.

• static bool DSPI_IsMaster (SPI_Type ∗base)
Returns whether the DSPI module is in master mode.

• static void DSPI_StartTransfer (SPI_Type ∗base)
Starts the DSPI transfers and clears HALT bit in MCR.

• static void DSPI_StopTransfer (SPI_Type ∗base)
Stops (halts) DSPI transfers and sets HALT bit in MCR.

• static void DSPI_SetFifoEnable (SPI_Type ∗base, bool enableTxFifo, bool enableRxFifo)
Enables (or disables) the DSPI FIFOs.

• static void DSPI_FlushFifo (SPI_Type ∗base, bool flushTxFifo, bool flushRxFifo)
Flushes the DSPI FIFOs.

• static void DSPI_SetAllPcsPolarity (SPI_Type ∗base, uint32_t mask)
Configures the DSPI peripheral chip select polarity simultaneously.

• uint32_t DSPI_MasterSetBaudRate (SPI_Type ∗base, dspi_ctar_selection_t whichCtar, uint32_t baudRate_Bps, uint32_t srcClock_Hz)
Sets the DSPI baud rate in bits per second.

• void DSPI_MasterSetDelayScaler (SPI_Type ∗base, dspi_ctar_selection_t whichCtar, uint32_t prescaler, uint32_t scaler, dspi_delay_type_t whichDelay)
Manually configures the delay prescaler and scaler for a particular CTAR.

• uint32_t DSPI_MasterSetDelayTimes (SPI_Type ∗base, dspi_ctar_selection_t whichCtar, dspi_delay_type_t whichDelay, uint32_t srcClock_Hz, uint32_t delayTimeInNanoSec)
Calculates the delay prescaler and scaler based on the desired delay input in nanoseconds.

• static void DSPI_MasterWriteData (SPI_Type ∗base, dspi_command_data_config_t ∗command,
uint16_t data)
Writes data into the data buffer for master mode.

• void DSPI_GetDefaultDataCommandConfig (dspi_command_data_config_t ∗command)
Sets the dspi_command_data_config_t structure to default values.

• void DSPI_MasterWriteDataBlocking (SPI_Type ∗base, dspi_command_data_config_t ∗command,
uint16_t data)
Writes data into the data buffer master mode and waits till complete to return.

• static uint32_t DSPI_MasterGetFormattedCommand (dspi_command_data_config_t ∗command)
Returns the DSPI command word formatted to the PUSHR data register bit field.

• void DSPI_MasterWriteCommandDataBlocking (SPI_Type ∗base, uint32_t data)
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DSPI Driver
Writes a 32-bit data word (16-bit command appended with 16-bit data) into the data buffer, master mode
and waits till complete to return.

• static void DSPI_SlaveWriteData (SPI_Type ∗base, uint32_t data)
Writes data into the data buffer in slave mode.

• void DSPI_SlaveWriteDataBlocking (SPI_Type ∗base, uint32_t data)
Writes data into the data buffer in slave mode, waits till data was transmitted, and returns.

• static uint32_t DSPI_ReadData (SPI_Type ∗base)
Reads data from the data buffer.

Transactional
• void DSPI_MasterTransferCreateHandle (SPI_Type ∗base, dspi_master_handle_t ∗handle, dspi_master_transfer_callback_t callback, void ∗userData)
Initializes the DSPI master handle.

• status_t DSPI_MasterTransferBlocking (SPI_Type ∗base, dspi_transfer_t ∗transfer)
DSPI master transfer data using polling.

• status_t DSPI_MasterTransferNonBlocking (SPI_Type ∗base, dspi_master_handle_t ∗handle, dspi_transfer_t ∗transfer)
DSPI master transfer data using interrupts.

• status_t DSPI_MasterTransferGetCount (SPI_Type ∗base, dspi_master_handle_t ∗handle, size_t ∗count)
Gets the master transfer count.

• void DSPI_MasterTransferAbort (SPI_Type ∗base, dspi_master_handle_t ∗handle)
DSPI master aborts transfer using an interrupt.

• void DSPI_MasterTransferHandleIRQ (SPI_Type ∗base, dspi_master_handle_t ∗handle)
DSPI Master IRQ handler function.

• void DSPI_SlaveTransferCreateHandle (SPI_Type ∗base, dspi_slave_handle_t ∗handle, dspi_slave_transfer_callback_t callback, void ∗userData)
Initializes the DSPI slave handle.

• status_t DSPI_SlaveTransferNonBlocking (SPI_Type ∗base, dspi_slave_handle_t ∗handle, dspi_transfer_t ∗transfer)
DSPI slave transfers data using an interrupt.

• status_t DSPI_SlaveTransferGetCount (SPI_Type ∗base, dspi_slave_handle_t ∗handle, size_t
∗count)
Gets the slave transfer count.

• void DSPI_SlaveTransferAbort (SPI_Type ∗base, dspi_slave_handle_t ∗handle)
DSPI slave aborts a transfer using an interrupt.

• void DSPI_SlaveTransferHandleIRQ (SPI_Type ∗base, dspi_slave_handle_t ∗handle)
DSPI Master IRQ handler function.

15.2.3
15.2.3.1

Data Structure Documentation
struct dspi_command_data_config_t

Data Fields

• bool isPcsContinuous
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DSPI Driver
Option to enable the continuous assertion of chip select between transfers.

• dspi_ctar_selection_t whichCtar
The desired Clock and Transfer Attributes Register (CTAR) to use for CTAS.

• dspi_which_pcs_t whichPcs
The desired PCS signal to use for the data transfer.

• bool isEndOfQueue
Signals that the current transfer is the last in the queue.

• bool clearTransferCount
Clears SPI Transfer Counter (SPI_TCNT) before transmission starts.
15.2.3.1.0.19
15.2.3.1.0.19.1

Field Documentation
bool dspi_command_data_config_t::isPcsContinuous

15.2.3.1.0.19.2 dspi_ctar_selection_t dspi_command_data_config_t::whichCtar
15.2.3.1.0.19.3 dspi_which_pcs_t dspi_command_data_config_t::whichPcs
15.2.3.1.0.19.4

bool dspi_command_data_config_t::isEndOfQueue

15.2.3.1.0.19.5

bool dspi_command_data_config_t::clearTransferCount

15.2.3.2

struct dspi_master_ctar_config_t

Data Fields

• uint32_t baudRate
Baud Rate for DSPI.

• uint32_t bitsPerFrame
Bits per frame, minimum 4, maximum 16.

• dspi_clock_polarity_t cpol
Clock polarity.

• dspi_clock_phase_t cpha
Clock phase.

• dspi_shift_direction_t direction
MSB or LSB data shift direction.

• uint32_t pcsToSckDelayInNanoSec
PCS to SCK delay time with nanosecond , set to 0 sets the minimum delay.

• uint32_t lastSckToPcsDelayInNanoSec
Last SCK to PCS delay time with nanosecond , set to 0 sets the minimum delay.It sets the boundary value
if out of range that can be set.

• uint32_t betweenTransferDelayInNanoSec
After SCK delay time with nanosecond , set to 0 sets the minimum delay.It sets the boundary value if out
of range that can be set.

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15.2.3.2.0.20

Field Documentation

15.2.3.2.0.20.1

uint32_t dspi_master_ctar_config_t::baudRate

15.2.3.2.0.20.2

uint32_t dspi_master_ctar_config_t::bitsPerFrame

15.2.3.2.0.20.3 dspi_clock_polarity_t dspi_master_ctar_config_t::cpol
15.2.3.2.0.20.4 dspi_clock_phase_t dspi_master_ctar_config_t::cpha
15.2.3.2.0.20.5 dspi_shift_direction_t dspi_master_ctar_config_t::direction
15.2.3.2.0.20.6

uint32_t dspi_master_ctar_config_t::pcsToSckDelayInNanoSec

It sets the boundary value if out of range that can be set.
15.2.3.2.0.20.7

uint32_t dspi_master_ctar_config_t::lastSckToPcsDelayInNanoSec

15.2.3.2.0.20.8

uint32_t dspi_master_ctar_config_t::betweenTransferDelayInNanoSec

15.2.3.3

struct dspi_master_config_t

Data Fields

• dspi_ctar_selection_t whichCtar
Desired CTAR to use.

• dspi_master_ctar_config_t ctarConfig
Set the ctarConfig to the desired CTAR.

• dspi_which_pcs_t whichPcs
Desired Peripheral Chip Select (pcs).

• dspi_pcs_polarity_config_t pcsActiveHighOrLow
Desired PCS active high or low.

• bool enableContinuousSCK
CONT_SCKE, continuous SCK enable .

• bool enableRxFifoOverWrite
ROOE, Receive FIFO overflow overwrite enable.

• bool enableModifiedTimingFormat
Enables a modified transfer format to be used if it’s true.

• dspi_master_sample_point_t samplePoint
Controls when the module master samples SIN in Modified Transfer Format.

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15.2.3.3.0.21

Field Documentation

15.2.3.3.0.21.1 dspi_ctar_selection_t dspi_master_config_t::whichCtar
15.2.3.3.0.21.2 dspi_master_ctar_config_t dspi_master_config_t::ctarConfig
15.2.3.3.0.21.3 dspi_which_pcs_t dspi_master_config_t::whichPcs
15.2.3.3.0.21.4 dspi_pcs_polarity_config_t dspi_master_config_t::pcsActiveHighOrLow
15.2.3.3.0.21.5

bool dspi_master_config_t::enableContinuousSCK

Note that continuous SCK is only supported for CPHA = 1.
15.2.3.3.0.21.6

bool dspi_master_config_t::enableRxFifoOverWrite

ROOE = 0, the incoming data is ignored, the data from the transfer that generated the overflow is either
ignored. ROOE = 1, the incoming data is shifted in to the shift to the shift register.
15.2.3.3.0.21.7

bool dspi_master_config_t::enableModifiedTimingFormat

15.2.3.3.0.21.8 dspi_master_sample_point_t dspi_master_config_t::samplePoint

It’s valid only when CPHA=0.
15.2.3.4

struct dspi_slave_ctar_config_t

Data Fields

• uint32_t bitsPerFrame
Bits per frame, minimum 4, maximum 16.

• dspi_clock_polarity_t cpol
Clock polarity.

• dspi_clock_phase_t cpha
Clock phase.
15.2.3.4.0.22
15.2.3.4.0.22.1

Field Documentation
uint32_t dspi_slave_ctar_config_t::bitsPerFrame

15.2.3.4.0.22.2 dspi_clock_polarity_t dspi_slave_ctar_config_t::cpol
15.2.3.4.0.22.3 dspi_clock_phase_t dspi_slave_ctar_config_t::cpha

Slave only supports MSB , does not support LSB.

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DSPI Driver
15.2.3.5

struct dspi_slave_config_t

Data Fields

• dspi_ctar_selection_t whichCtar
Desired CTAR to use.

• dspi_slave_ctar_config_t ctarConfig
Set the ctarConfig to the desired CTAR.

• bool enableContinuousSCK
CONT_SCKE, continuous SCK enable.

• bool enableRxFifoOverWrite
ROOE, Receive FIFO overflow overwrite enable.

• bool enableModifiedTimingFormat
Enables a modified transfer format to be used if it’s true.

• dspi_master_sample_point_t samplePoint
Controls when the module master samples SIN in Modified Transfer Format.
15.2.3.5.0.23

Field Documentation

15.2.3.5.0.23.1 dspi_ctar_selection_t dspi_slave_config_t::whichCtar
15.2.3.5.0.23.2 dspi_slave_ctar_config_t dspi_slave_config_t::ctarConfig
15.2.3.5.0.23.3

bool dspi_slave_config_t::enableContinuousSCK

Note that continuous SCK is only supported for CPHA = 1.
15.2.3.5.0.23.4

bool dspi_slave_config_t::enableRxFifoOverWrite

ROOE = 0, the incoming data is ignored, the data from the transfer that generated the overflow is either
ignored. ROOE = 1, the incoming data is shifted in to the shift to the shift register.
15.2.3.5.0.23.5

bool dspi_slave_config_t::enableModifiedTimingFormat

15.2.3.5.0.23.6 dspi_master_sample_point_t dspi_slave_config_t::samplePoint

It’s valid only when CPHA=0.
15.2.3.6

struct dspi_transfer_t

Data Fields

• uint8_t ∗ txData
Send buffer.

• uint8_t ∗ rxData
Receive buffer.

• volatile size_t dataSize
Transfer bytes.

• uint32_t configFlags
Transfer transfer configuration flags , set from _dspi_transfer_config_flag_for_master if the transfer is

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used for master or _dspi_transfer_config_flag_for_slave enumeration if the transfer is used for slave.
15.2.3.6.0.24

Field Documentation

15.2.3.6.0.24.1

uint8_t∗ dspi_transfer_t::txData

15.2.3.6.0.24.2

uint8_t∗ dspi_transfer_t::rxData

15.2.3.6.0.24.3

volatile size_t dspi_transfer_t::dataSize

15.2.3.6.0.24.4

uint32_t dspi_transfer_t::configFlags

15.2.3.7

struct _dspi_master_handle

Forward declaration of the _dspi_master_handle typedefs.
Data Fields

• uint32_t bitsPerFrame
Desired number of bits per frame.

• volatile uint32_t command
Desired data command.

• volatile uint32_t lastCommand
Desired last data command.

• uint8_t fifoSize
FIFO dataSize.

• volatile bool isPcsActiveAfterTransfer
Is PCS signal keep active after the last frame transfer.

• volatile bool isThereExtraByte
Is there extra byte.

• uint8_t ∗volatile txData
Send buffer.

• uint8_t ∗volatile rxData
Receive buffer.

• volatile size_t remainingSendByteCount
Number of bytes remaining to send.

• volatile size_t remainingReceiveByteCount
Number of bytes remaining to receive.

• size_t totalByteCount
Number of transfer bytes.

• volatile uint8_t state
DSPI transfer state , _dspi_transfer_state.

• dspi_master_transfer_callback_t callback
Completion callback.

• void ∗ userData
Callback user data.

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DSPI Driver
15.2.3.7.0.25

Field Documentation

15.2.3.7.0.25.1

uint32_t dspi_master_handle_t::bitsPerFrame

15.2.3.7.0.25.2

volatile uint32_t dspi_master_handle_t::command

15.2.3.7.0.25.3

volatile uint32_t dspi_master_handle_t::lastCommand

15.2.3.7.0.25.4

uint8_t dspi_master_handle_t::fifoSize

15.2.3.7.0.25.5

volatile bool dspi_master_handle_t::isPcsActiveAfterTransfer

15.2.3.7.0.25.6

volatile bool dspi_master_handle_t::isThereExtraByte

15.2.3.7.0.25.7

uint8_t∗ volatile dspi_master_handle_t::txData

15.2.3.7.0.25.8

uint8_t∗ volatile dspi_master_handle_t::rxData

15.2.3.7.0.25.9

volatile size_t dspi_master_handle_t::remainingSendByteCount

15.2.3.7.0.25.10

volatile size_t dspi_master_handle_t::remainingReceiveByteCount

15.2.3.7.0.25.11

volatile uint8_t dspi_master_handle_t::state

15.2.3.7.0.25.12 dspi_master_transfer_callback_t dspi_master_handle_t::callback
15.2.3.7.0.25.13

15.2.3.8

void∗ dspi_master_handle_t::userData

struct _dspi_slave_handle

Forward declaration of the _dspi_slave_handle typedefs.
Data Fields

• uint32_t bitsPerFrame
Desired number of bits per frame.

• volatile bool isThereExtraByte
Is there extra byte.

• uint8_t ∗volatile txData
Send buffer.

• uint8_t ∗volatile rxData
Receive buffer.

• volatile size_t remainingSendByteCount
Number of bytes remaining to send.

• volatile size_t remainingReceiveByteCount
Number of bytes remaining to receive.

• size_t totalByteCount
Number of transfer bytes.

• volatile uint8_t state
DSPI transfer state.

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DSPI Driver
• volatile uint32_t errorCount
Error count for slave transfer.

• dspi_slave_transfer_callback_t callback
Completion callback.

• void ∗ userData
Callback user data.

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DSPI Driver
15.2.3.8.0.26

Field Documentation

15.2.3.8.0.26.1

uint32_t dspi_slave_handle_t::bitsPerFrame

15.2.3.8.0.26.2

volatile bool dspi_slave_handle_t::isThereExtraByte

15.2.3.8.0.26.3

uint8_t∗ volatile dspi_slave_handle_t::txData

15.2.3.8.0.26.4

uint8_t∗ volatile dspi_slave_handle_t::rxData

15.2.3.8.0.26.5

volatile size_t dspi_slave_handle_t::remainingSendByteCount

15.2.3.8.0.26.6

volatile size_t dspi_slave_handle_t::remainingReceiveByteCount

15.2.3.8.0.26.7

volatile uint8_t dspi_slave_handle_t::state

15.2.3.8.0.26.8

volatile uint32_t dspi_slave_handle_t::errorCount

15.2.3.8.0.26.9 dspi_slave_transfer_callback_t dspi_slave_handle_t::callback
15.2.3.8.0.26.10

15.2.4

void∗ dspi_slave_handle_t::userData

Macro Definition Documentation

15.2.4.1

#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

15.2.4.2

#define DSPI_MASTER_DUMMY_DATA (0x00U)

15.2.4.3

#define DSPI_SLAVE_DUMMY_DATA (0x00U)

15.2.4.4

#define DSPI_MASTER_CTAR_SHIFT (0U)

15.2.4.5

#define DSPI_MASTER_CTAR_MASK (0x0FU)

15.2.4.6

#define DSPI_MASTER_PCS_SHIFT (4U)

15.2.4.7

#define DSPI_MASTER_PCS_MASK (0xF0U)

15.2.4.8

#define DSPI_SLAVE_CTAR_SHIFT (0U)

15.2.4.9

#define DSPI_SLAVE_CTAR_MASK (0x07U)

15.2.5
15.2.5.1

Typedef Documentation
typedef void(∗ dspi_master_transfer_callback_t)(SPI_Type ∗base,
dspi_master_handle_t ∗handle, status_t status, void ∗userData)

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Parameters
base
handle
status
userData

DSPI peripheral address.
Pointer to the handle for the DSPI master.
Success or error code describing whether the transfer completed.
Arbitrary pointer-dataSized value passed from the application.

typedef void(∗ dspi_slave_transfer_callback_t)(SPI_Type ∗base,
dspi_slave_handle_t ∗handle, status_t status, void ∗userData)

15.2.5.2

Parameters
base
handle
status
userData

15.2.6

DSPI peripheral address.
Pointer to the handle for the DSPI slave.
Success or error code describing whether the transfer completed.
Arbitrary pointer-dataSized value passed from the application.

Enumeration Type Documentation

15.2.6.1

enum _dspi_status

Enumerator
kStatus_DSPI_Busy DSPI transfer is busy.
kStatus_DSPI_Error DSPI driver error.
kStatus_DSPI_Idle DSPI is idle.
kStatus_DSPI_OutOfRange DSPI transfer out Of range.

15.2.6.2

enum _dspi_flags

Enumerator
kDSPI_TxCompleteFlag Transfer Complete Flag.
kDSPI_EndOfQueueFlag End of Queue Flag.
kDSPI_TxFifoUnderflowFlag Transmit FIFO Underflow Flag.
kDSPI_TxFifoFillRequestFlag Transmit FIFO Fill Flag.
kDSPI_RxFifoOverflowFlag Receive FIFO Overflow Flag.
kDSPI_RxFifoDrainRequestFlag Receive FIFO Drain Flag.
kDSPI_TxAndRxStatusFlag The module is in Stopped/Running state.
kDSPI_AllStatusFlag All status above.

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DSPI Driver
15.2.6.3

enum _dspi_interrupt_enable

Enumerator
kDSPI_TxCompleteInterruptEnable TCF interrupt enable.
kDSPI_EndOfQueueInterruptEnable EOQF interrupt enable.
kDSPI_TxFifoUnderflowInterruptEnable TFUF interrupt enable.
kDSPI_TxFifoFillRequestInterruptEnable TFFF interrupt enable, DMA disable.
kDSPI_RxFifoOverflowInterruptEnable RFOF interrupt enable.
kDSPI_RxFifoDrainRequestInterruptEnable RFDF interrupt enable, DMA disable.
kDSPI_AllInterruptEnable All above interrupts enable.

15.2.6.4

enum _dspi_dma_enable

Enumerator
kDSPI_TxDmaEnable TFFF flag generates DMA requests. No Tx interrupt request.
kDSPI_RxDmaEnable RFDF flag generates DMA requests. No Rx interrupt request.

15.2.6.5

enum dspi_master_slave_mode_t

Enumerator
kDSPI_Master DSPI peripheral operates in master mode.
kDSPI_Slave DSPI peripheral operates in slave mode.

15.2.6.6

enum dspi_master_sample_point_t

This field is valid only when CPHA bit in CTAR register is 0.
Enumerator
kDSPI_SckToSin0Clock 0 system clocks between SCK edge and SIN sample.
kDSPI_SckToSin1Clock 1 system clock between SCK edge and SIN sample.
kDSPI_SckToSin2Clock 2 system clocks between SCK edge and SIN sample.

15.2.6.7

enum dspi_which_pcs_t

Enumerator
kDSPI_Pcs0 Pcs[0].
kDSPI_Pcs1 Pcs[1].
kDSPI_Pcs2 Pcs[2].
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kDSPI_Pcs3 Pcs[3].
kDSPI_Pcs4 Pcs[4].
kDSPI_Pcs5 Pcs[5].

15.2.6.8

enum dspi_pcs_polarity_config_t

Enumerator
kDSPI_PcsActiveHigh Pcs Active High (idles low).
kDSPI_PcsActiveLow Pcs Active Low (idles high).

15.2.6.9

enum _dspi_pcs_polarity

Enumerator
kDSPI_Pcs0ActiveLow Pcs0 Active Low (idles high).
kDSPI_Pcs1ActiveLow Pcs1 Active Low (idles high).
kDSPI_Pcs2ActiveLow Pcs2 Active Low (idles high).
kDSPI_Pcs3ActiveLow Pcs3 Active Low (idles high).
kDSPI_Pcs4ActiveLow Pcs4 Active Low (idles high).
kDSPI_Pcs5ActiveLow Pcs5 Active Low (idles high).
kDSPI_PcsAllActiveLow Pcs0 to Pcs5 Active Low (idles high).

15.2.6.10

enum dspi_clock_polarity_t

Enumerator
kDSPI_ClockPolarityActiveHigh CPOL=0. Active-high DSPI clock (idles low).
kDSPI_ClockPolarityActiveLow CPOL=1. Active-low DSPI clock (idles high).

15.2.6.11

enum dspi_clock_phase_t

Enumerator
kDSPI_ClockPhaseFirstEdge CPHA=0. Data is captured on the leading edge of the SCK and
changed on the following edge.
kDSPI_ClockPhaseSecondEdge CPHA=1. Data is changed on the leading edge of the SCK and
captured on the following edge.

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DSPI Driver
15.2.6.12

enum dspi_shift_direction_t

Enumerator
kDSPI_MsbFirst Data transfers start with most significant bit.
kDSPI_LsbFirst Data transfers start with least significant bit.

15.2.6.13

enum dspi_delay_type_t

Enumerator
kDSPI_PcsToSck Pcs-to-SCK delay.
kDSPI_LastSckToPcs Last SCK edge to Pcs delay.
kDSPI_BetweenTransfer Delay between transfers.

15.2.6.14

enum dspi_ctar_selection_t

Enumerator
kDSPI_Ctar0 CTAR0 selection option for master or slave mode, note that CTAR0 and CTAR0_SLAVE are the same register address.
kDSPI_Ctar1 CTAR1 selection option for master mode only.
kDSPI_Ctar2 CTAR2 selection option for master mode only , note that some device do not support
CTAR2.
kDSPI_Ctar3 CTAR3 selection option for master mode only , note that some device do not support
CTAR3.
kDSPI_Ctar4 CTAR4 selection option for master mode only , note that some device do not support
CTAR4.
kDSPI_Ctar5 CTAR5 selection option for master mode only , note that some device do not support
CTAR5.
kDSPI_Ctar6 CTAR6 selection option for master mode only , note that some device do not support
CTAR6.
kDSPI_Ctar7 CTAR7 selection option for master mode only , note that some device do not support
CTAR7.

15.2.6.15

enum _dspi_transfer_config_flag_for_master

Enumerator
kDSPI_MasterCtar0
kDSPI_MasterCtar1
kDSPI_MasterCtar2
kDSPI_MasterCtar3

DSPI master transfer use CTAR0 setting.
DSPI master transfer use CTAR1 setting.
DSPI master transfer use CTAR2 setting.
DSPI master transfer use CTAR3 setting.
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kDSPI_MasterCtar4 DSPI master transfer use CTAR4 setting.
kDSPI_MasterCtar5 DSPI master transfer use CTAR5 setting.
kDSPI_MasterCtar6 DSPI master transfer use CTAR6 setting.
kDSPI_MasterCtar7 DSPI master transfer use CTAR7 setting.
kDSPI_MasterPcs0 DSPI master transfer use PCS0 signal.
kDSPI_MasterPcs1 DSPI master transfer use PCS1 signal.
kDSPI_MasterPcs2 DSPI master transfer use PCS2 signal.
kDSPI_MasterPcs3 DSPI master transfer use PCS3 signal.
kDSPI_MasterPcs4 DSPI master transfer use PCS4 signal.
kDSPI_MasterPcs5 DSPI master transfer use PCS5 signal.
kDSPI_MasterPcsContinuous Is PCS signal continuous.
kDSPI_MasterActiveAfterTransfer Is PCS signal active after last frame transfer.

15.2.6.16

enum _dspi_transfer_config_flag_for_slave

Enumerator
kDSPI_SlaveCtar0 DSPI slave transfer use CTAR0 setting. DSPI slave can only use PCS0.

15.2.6.17

enum _dspi_transfer_state

Enumerator
kDSPI_Idle Nothing in the transmitter/receiver.
kDSPI_Busy Transfer queue is not finished.
kDSPI_Error Transfer error.

15.2.7
15.2.7.1

Function Documentation
void DSPI_MasterInit ( SPI_Type ∗ base, const dspi_master_config_t ∗
masterConfig, uint32_t srcClock_Hz )

This function initializes the DSPI master configuration. An example use case is as follows:
dspi_master_config_t masterConfig;
masterConfig.whichCtar
masterConfig.ctarConfig.baudRate
masterConfig.ctarConfig.bitsPerFrame
masterConfig.ctarConfig.cpol
kDSPI_ClockPolarityActiveHigh;
masterConfig.ctarConfig.cpha
kDSPI_ClockPhaseFirstEdge;
masterConfig.ctarConfig.direction
kDSPI_MsbFirst;
masterConfig.ctarConfig.pcsToSckDelayInNanoSec
masterConfig.ctarConfig.baudRate ;

= kDSPI_Ctar0;
= 500000000;
= 8;
=
=
=
= 1000000000 /

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DSPI Driver
masterConfig.ctarConfig.lastSckToPcsDelayInNanoSec
masterConfig.ctarConfig.baudRate ;
masterConfig.ctarConfig.betweenTransferDelayInNanoSec
masterConfig.ctarConfig.baudRate ;
masterConfig.whichPcs
masterConfig.pcsActiveHighOrLow
kDSPI_PcsActiveLow;
masterConfig.enableContinuousSCK
masterConfig.enableRxFifoOverWrite
masterConfig.enableModifiedTimingFormat
masterConfig.samplePoint
kDSPI_SckToSin0Clock;
DSPI_MasterInit(base, &masterConfig, srcClock_Hz);

= 1000000000 /
= 1000000000 /
= kDSPI_Pcs0;
=
= false;
= false;
= false;
=

Parameters
base

DSPI peripheral address.

masterConfig

Pointer to structure dspi_master_config_t.

srcClock_Hz

Module source input clock in Hertz

15.2.7.2

void DSPI_MasterGetDefaultConfig ( dspi_master_config_t ∗ masterConfig )

The purpose of this API is to get the configuration structure initialized for the DSPI_MasterInit(). User
may use the initialized structure unchanged in DSPI_MasterInit() or modify the structure before calling
DSPI_MasterInit(). Example:
dspi_master_config_t masterConfig;
DSPI_MasterGetDefaultConfig(&masterConfig);

Parameters
masterConfig

15.2.7.3

pointer to dspi_master_config_t structure

void DSPI_SlaveInit ( SPI_Type ∗ base, const dspi_slave_config_t ∗ slaveConfig )

This function initializes the DSPI slave configuration. An example use case is as follows:
dspi_slave_config_t slaveConfig;
slaveConfig->whichCtar
slaveConfig->ctarConfig.bitsPerFrame
slaveConfig->ctarConfig.cpol
kDSPI_ClockPolarityActiveHigh;
slaveConfig->ctarConfig.cpha
kDSPI_ClockPhaseFirstEdge;
slaveConfig->enableContinuousSCK
slaveConfig->enableRxFifoOverWrite
slaveConfig->enableModifiedTimingFormat
slaveConfig->samplePoint
DSPI_SlaveInit(base, &slaveConfig);

= kDSPI_Ctar0;
= 8;
=
=
=
=
=
=

false;
false;
false;
kDSPI_SckToSin0Clock;

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Parameters
base
slaveConfig

DSPI peripheral address.
Pointer to structure dspi_master_config_t.

void DSPI_SlaveGetDefaultConfig ( dspi_slave_config_t ∗ slaveConfig )

15.2.7.4

The purpose of this API is to get the configuration structure initialized for the DSPI_SlaveInit(). User
may use the initialized structure unchanged in DSPI_SlaveInit(), or modify the structure before calling
DSPI_SlaveInit(). Example:
dspi_slave_config_t slaveConfig;
DSPI_SlaveGetDefaultConfig(&slaveConfig);

Parameters
slaveConfig

pointer to dspi_slave_config_t structure.

void DSPI_Deinit ( SPI_Type ∗ base )

15.2.7.5

Call this API to disable the DSPI clock.
Parameters
base

DSPI peripheral address.

static void DSPI_Enable ( SPI_Type ∗ base, bool enable ) [inline],

15.2.7.6

[static]
Parameters
base
enable

15.2.7.7

DSPI peripheral address.
pass true to enable module, false to disable module.

static uint32_t DSPI_GetStatusFlags ( SPI_Type ∗ base ) [inline],

[static]

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DSPI Driver
Parameters
base

DSPI peripheral address.

Returns
The DSPI status(in SR register).

15.2.7.8

static void DSPI_ClearStatusFlags ( SPI_Type ∗ base, uint32_t statusFlags )
[inline], [static]

This function clears the desired status bit by using a write-1-to-clear. The user passes in the base and the
desired status bit to clear. The list of status bits is defined in the dspi_status_and_interrupt_request_t. The
function uses these bit positions in its algorithm to clear the desired flag state. Example usage:
DSPI_ClearStatusFlags(base, kDSPI_TxCompleteFlag|
kDSPI_EndOfQueueFlag);

Parameters
base
statusFlags

DSPI peripheral address.
The status flag , used from type dspi_flags.

< The status flags are cleared by writing 1 (w1c).
15.2.7.9

void DSPI_EnableInterrupts ( SPI_Type ∗ base, uint32_t mask )

This function configures the various interrupt masks of the DSPI. The parameters are base and an interrupt
mask. Note, for Tx Fill and Rx FIFO drain requests, enable the interrupt request and disable the DMA
request.
DSPI_EnableInterrupts(base, kDSPI_TxCompleteInterruptEnable
| kDSPI_EndOfQueueInterruptEnable );

Parameters
base

DSPI peripheral address.

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mask

15.2.7.10

The interrupt mask, can use the enum _dspi_interrupt_enable.

static void DSPI_DisableInterrupts ( SPI_Type ∗ base, uint32_t mask )

[inline], [static]
DSPI_DisableInterrupts(base,
kDSPI_TxCompleteInterruptEnable |
kDSPI_EndOfQueueInterruptEnable );

Parameters

15.2.7.11

base

DSPI peripheral address.

mask

The interrupt mask, can use the enum _dspi_interrupt_enable.

static void DSPI_EnableDMA ( SPI_Type ∗ base, uint32_t mask ) [inline],

[static]
This function configures the Rx and Tx DMA mask of the DSPI. The parameters are base and a DMA
mask.
DSPI_EnableDMA(base, kDSPI_TxDmaEnable |
kDSPI_RxDmaEnable);

Parameters

15.2.7.12

base

DSPI peripheral address.

mask

The interrupt mask can use the enum dspi_dma_enable.

static void DSPI_DisableDMA ( SPI_Type ∗ base, uint32_t mask ) [inline],

[static]
This function configures the Rx and Tx DMA mask of the DSPI. The parameters are base and a DMA
mask.
SPI_DisableDMA(base, kDSPI_TxDmaEnable | kDSPI_RxDmaEnable);

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DSPI Driver
Parameters

15.2.7.13

base

DSPI peripheral address.

mask

The interrupt mask can use the enum dspi_dma_enable.

static uint32_t DSPI_MasterGetTxRegisterAddress ( SPI_Type ∗ base )
[inline], [static]

This function gets the DSPI master PUSHR data register address because this value is needed for the DMA
operation.
Parameters
base

DSPI peripheral address.

Returns
The DSPI master PUSHR data register address.

15.2.7.14

static uint32_t DSPI_SlaveGetTxRegisterAddress ( SPI_Type ∗ base )
[inline], [static]

This function gets the DSPI slave PUSHR data register address as this value is needed for the DMA
operation.
Parameters
base

DSPI peripheral address.

Returns
The DSPI slave PUSHR data register address.

15.2.7.15

static uint32_t DSPI_GetRxRegisterAddress ( SPI_Type ∗ base ) [inline],

[static]
This function gets the DSPI POPR data register address as this value is needed for the DMA operation.

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Parameters
base

DSPI peripheral address.

Returns
The DSPI POPR data register address.

15.2.7.16

static void DSPI_SetMasterSlaveMode ( SPI_Type ∗ base,
dspi_master_slave_mode_t mode ) [inline], [static]

Parameters
base
mode

15.2.7.17

DSPI peripheral address.
Mode setting (master or slave) of type dspi_master_slave_mode_t.

static bool DSPI_IsMaster ( SPI_Type ∗ base ) [inline], [static]

Parameters
base

DSPI peripheral address.

Returns
Returns true if the module is in master mode or false if the module is in slave mode.

15.2.7.18

static void DSPI_StartTransfer ( SPI_Type ∗ base ) [inline], [static]

This function sets the module to begin data transfer in either master or slave mode.
Parameters
base

15.2.7.19

DSPI peripheral address.

static void DSPI_StopTransfer ( SPI_Type ∗ base ) [inline], [static]

This function stops data transfers in either master or slave mode.

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DSPI Driver
Parameters
base

15.2.7.20

DSPI peripheral address.

static void DSPI_SetFifoEnable ( SPI_Type ∗ base, bool enableTxFifo, bool
enableRxFifo ) [inline], [static]

This function allows the caller to disable/enable the Tx and Rx FIFOs (independently). Note that to
disable, the caller must pass in a logic 0 (false) for the particular FIFO configuration. To enable, the caller
must pass in a logic 1 (true).
Parameters
base

DSPI peripheral address.

enableTxFifo

Disables (false) the TX FIFO, else enables (true) the TX FIFO

enableRxFifo

Disables (false) the RX FIFO, else enables (true) the RX FIFO

15.2.7.21

static void DSPI_FlushFifo ( SPI_Type ∗ base, bool flushTxFifo, bool
flushRxFifo ) [inline], [static]

Parameters
base

DSPI peripheral address.

flushTxFifo

Flushes (true) the Tx FIFO, else do not flush (false) the Tx FIFO

flushRxFifo

Flushes (true) the Rx FIFO, else do not flush (false) the Rx FIFO

15.2.7.22

static void DSPI_SetAllPcsPolarity ( SPI_Type ∗ base, uint32_t mask )
[inline], [static]

For example, PCS0 and PCS1 set to active low and other PCS set to active high. Note that the number of
PCSs is specific to the device.
DSPI_SetAllPcsPolarity(base, kDSPI_Pcs0ActiveLow |
kDSPI_Pcs1ActiveLow);

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Parameters

15.2.7.23

base

DSPI peripheral address.

mask

The PCS polarity mask , can use the enum _dspi_pcs_polarity.

uint32_t DSPI_MasterSetBaudRate ( SPI_Type ∗ base, dspi_ctar_selection_t
whichCtar, uint32_t baudRate_Bps, uint32_t srcClock_Hz )

This function takes in the desired baudRate_Bps (baud rate) and calculates the nearest possible baud rate
without exceeding the desired baud rate, and returns the calculated baud rate in bits-per-second. It requires
that the caller also provide the frequency of the module source clock (in Hertz).
Parameters
base
whichCtar
baudRate_Bps
srcClock_Hz

DSPI peripheral address.
The desired Clock and Transfer Attributes Register (CTAR) of the type dspi_ctar_selection_t
The desired baud rate in bits per second
Module source input clock in Hertz

Returns
The actual calculated baud rate

15.2.7.24

void DSPI_MasterSetDelayScaler ( SPI_Type ∗ base, dspi_ctar_selection_t
whichCtar, uint32_t prescaler, uint32_t scaler, dspi_delay_type_t whichDelay )

This function configures the PCS to SCK delay pre-scalar (PcsSCK) and scalar (CSSCK), after SCK delay
pre-scalar (PASC) and scalar (ASC), and the delay after transfer pre-scalar (PDT)and scalar (DT).
These delay names are available in type dspi_delay_type_t.
The user passes the delay to configure along with the prescaler and scaler value. This allows the user to
directly set the prescaler/scaler values if they have pre-calculated them or if they simply wish to manually
increment either value.
Parameters

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base
whichCtar
prescaler
scaler
whichDelay

15.2.7.25

DSPI peripheral address.
The desired Clock and Transfer Attributes Register (CTAR) of type dspi_ctar_selection_t.
The prescaler delay value (can be an integer 0, 1, 2, or 3).
The scaler delay value (can be any integer between 0 to 15).
The desired delay to configure, must be of type dspi_delay_type_t

uint32_t DSPI_MasterSetDelayTimes ( SPI_Type ∗ base, dspi_ctar_selection_t
whichCtar, dspi_delay_type_t whichDelay, uint32_t srcClock_Hz, uint32_t
delayTimeInNanoSec )

This function calculates the values for: PCS to SCK delay pre-scalar (PCSSCK) and scalar (CSSCK), or
After SCK delay pre-scalar (PASC) and scalar (ASC), or Delay after transfer pre-scalar (PDT)and scalar
(DT).
These delay names are available in type dspi_delay_type_t.
The user passes which delay they want to configure along with the desired delay value in nanoseconds.
The function calculates the values needed for the prescaler and scaler and returning the actual calculated
delay as an exact delay match may not be possible. In this case, the closest match is calculated without
going below the desired delay value input. It is possible to input a very large delay value that exceeds the
capability of the part, in which case the maximum supported delay is returned. The higher level peripheral
driver alerts the user of an out of range delay input.
Parameters
base
whichCtar
whichDelay

DSPI peripheral address.
The desired Clock and Transfer Attributes Register (CTAR) of type dspi_ctar_selection_t.
The desired delay to configure, must be of type dspi_delay_type_t

srcClock_Hz

Module source input clock in Hertz

delayTimeInNanoSec

The desired delay value in nanoseconds.

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Returns
The actual calculated delay value.

15.2.7.26

static void DSPI_MasterWriteData ( SPI_Type ∗ base, dspi_command_data_config_t ∗ command, uint16_t data ) [inline],

[static]
In master mode, the 16-bit data is appended to the 16-bit command info. The command portion provides
characteristics of the data such as the optional continuous chip select operation between transfers, the
desired Clock and Transfer Attributes register to use for the associated SPI frame, the desired PCS signal
to use for the data transfer, whether the current transfer is the last in the queue, and whether to clear the
transfer count (normally needed when sending the first frame of a data packet). This is an example:
dspi_command_data_config_t commandConfig;
commandConfig.isPcsContinuous = true;
commandConfig.whichCtar = kDSPICtar0;
commandConfig.whichPcs = kDSPIPcs0;
commandConfig.clearTransferCount = false;
commandConfig.isEndOfQueue = false;
DSPI_MasterWriteData(base, &commandConfig, dataWord);

Parameters
base
command
data

15.2.7.27

DSPI peripheral address.
Pointer to command structure.
The data word to be sent.

void DSPI_GetDefaultDataCommandConfig ( dspi_command_data_config_t ∗
command )

The purpose of this API is to get the configuration structure initialized for use in the DSPI_MasterWrite_xx(). User may use the initialized structure unchanged in DSPI_MasterWrite_xx() or modify the structure
before calling DSPI_MasterWrite_xx(). Example:
dspi_command_data_config_t command;
DSPI_GetDefaultDataCommandConfig(&command);

Parameters

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command

15.2.7.28

pointer to dspi_command_data_config_t structure.

void DSPI_MasterWriteDataBlocking ( SPI_Type ∗ base,
dspi_command_data_config_t ∗ command, uint16_t data )

In master mode, the 16-bit data is appended to the 16-bit command info. The command portion provides
characteristics of the data such as the optional continuous chip select operation between transfers, the
desired Clock and Transfer Attributes register to use for the associated SPI frame, the desired PCS signal
to use for the data transfer, whether the current transfer is the last in the queue, and whether to clear the
transfer count (normally needed when sending the first frame of a data packet). This is an example:
dspi_command_config_t commandConfig;
commandConfig.isPcsContinuous = true;
commandConfig.whichCtar = kDSPICtar0;
commandConfig.whichPcs = kDSPIPcs1;
commandConfig.clearTransferCount = false;
commandConfig.isEndOfQueue = false;
DSPI_MasterWriteDataBlocking(base, &commandConfig, dataWord);

Note that this function does not return until after the transmit is complete. Also note that the DSPI must
be enabled and running to transmit data (MCR[MDIS] & [HALT] = 0). Because the SPI is a synchronous
protocol, receive data is available when transmit completes.
Parameters
base
command
data

15.2.7.29

DSPI peripheral address.
Pointer to command structure.
The data word to be sent.

static uint32_t DSPI_MasterGetFormattedCommand ( dspi_command_data_-

config_t ∗ command ) [inline], [static]
This function allows the caller to pass in the data command structure and returns the command word formatted according to the DSPI PUSHR register bit field placement. The user can then "OR" the returned
command word with the desired data to send and use the function DSPI_HAL_WriteCommandDataMastermode or DSPI_HAL_WriteCommandDataMastermodeBlocking to write the entire 32-bit command data word to the PUSHR. This helps improve performance in cases where the command structure
is constant. For example, the user calls this function before starting a transfer to generate the command
word. When they are ready to transmit the data, they OR this formatted command word with the desired
data to transmit. This process increases transmit performance when compared to calling send functions
such as DSPI_HAL_WriteDataMastermode which format the command word each time a data word is to
be sent.

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Parameters
command

Pointer to command structure.

Returns
The command word formatted to the PUSHR data register bit field.

15.2.7.30

void DSPI_MasterWriteCommandDataBlocking ( SPI_Type ∗ base, uint32_t
data )

In this function, the user must append the 16-bit data to the 16-bit command info then provide the total 32bit word as the data to send. The command portion provides characteristics of the data such as the optional
continuous chip select operation between transfers, the desired Clock and Transfer Attributes register to
use for the associated SPI frame, the desired PCS signal to use for the data transfer, whether the current
transfer is the last in the queue, and whether to clear the transfer count (normally needed when sending the
first frame of a data packet). The user is responsible for appending this command with the data to send.
This is an example:
dataWord = <16-bit command> | <16-bit data>;
DSPI_HAL_WriteCommandDataMastermodeBlocking(base, dataWord);

Note that this function does not return until after the transmit is complete. Also note that the DSPI must
be enabled and running to transmit data (MCR[MDIS] & [HALT] = 0). Because the SPI is a synchronous
protocol, the receive data is available when transmit completes.
For a blocking polling transfer, see methods below. Option 1: uint32_t command_to_send = DSPI_MasterGetFormattedCommand(&command); uint32_t data0 = command_to_send | data_need_to_send_0; uint32_t data1 = command_to_send | data_need_to_send_1; uint32_t data2 = command_to_send |
data_need_to_send_2;
DSPI_MasterWriteCommandDataBlocking(base,data0); DSPI_MasterWriteCommandDataBlocking(base,data1);
DSPI_MasterWriteCommandDataBlocking(base,data2);

Option 2: DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_0); DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_1); DSPI_MasterWriteDataBlocking(base,&command,data
_need_to_send_2);
Parameters

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15.2.7.31

base

DSPI peripheral address.

data

The data word (command and data combined) to be sent

static void DSPI_SlaveWriteData ( SPI_Type ∗ base, uint32_t data )
[inline], [static]

In slave mode, up to 16-bit words may be written.
Parameters

15.2.7.32

base

DSPI peripheral address.

data

The data to send.

void DSPI_SlaveWriteDataBlocking ( SPI_Type ∗ base, uint32_t data )

In slave mode, up to 16-bit words may be written. The function first clears the transmit complete flag,
writes data into data register, and finally waits until the data is transmitted.
Parameters

15.2.7.33

base

DSPI peripheral address.

data

The data to send.

static uint32_t DSPI_ReadData ( SPI_Type ∗ base ) [inline], [static]

Parameters
base

DSPI peripheral address.

Returns
The data from the read data buffer.

15.2.7.34

void DSPI_MasterTransferCreateHandle ( SPI_Type ∗ base, dspi_master_handle_t ∗ handle, dspi_master_transfer_callback_t callback, void ∗ userData
)

This function initializes the DSPI handle which can be used for other DSPI transactional APIs. Usually,
for a specified DSPI instance, call this API once to get the initialized handle.
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Parameters
base
handle
callback
userData

DSPI peripheral base address.
DSPI handle pointer to dspi_master_handle_t.
dspi callback.
callback function parameter.

status_t DSPI_MasterTransferBlocking ( SPI_Type ∗ base, dspi_transfer_t ∗
transfer )

15.2.7.35

This function transfers data with polling. This is a blocking function, which does not return until all
transfers have been completed.
Parameters
base
transfer

DSPI peripheral base address.
pointer to dspi_transfer_t structure.

Returns
status of status_t.

status_t DSPI_MasterTransferNonBlocking ( SPI_Type ∗ base,
dspi_master_handle_t ∗ handle, dspi_transfer_t ∗ transfer )

15.2.7.36

This function transfers data using interrupts. This is a non-blocking function, which returns right away.
When all data have been transferred, the callback function is called.
Parameters
base
handle
transfer

DSPI peripheral base address.
pointer to dspi_master_handle_t structure which stores the transfer state.
pointer to dspi_transfer_t structure.

Returns
status of status_t.

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15.2.7.37

status_t DSPI_MasterTransferGetCount ( SPI_Type ∗ base,
dspi_master_handle_t ∗ handle, size_t ∗ count )

This function gets the master transfer count.

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Parameters
base
handle
count

DSPI peripheral base address.
pointer to dspi_master_handle_t structure which stores the transfer state.
Number of bytes transferred so far by the non-blocking transaction.

Returns
status of status_t.

void DSPI_MasterTransferAbort ( SPI_Type ∗ base, dspi_master_handle_t ∗
handle )

15.2.7.38

This function aborts a transfer using an interrupt.
Parameters
base
handle

DSPI peripheral base address.
pointer to dspi_master_handle_t structure which stores the transfer state.

void DSPI_MasterTransferHandleIRQ ( SPI_Type ∗ base, dspi_master_handle_t
∗ handle )

15.2.7.39

This function processes the DSPI transmit and receive IRQ.
Parameters
base
handle

15.2.7.40

DSPI peripheral base address.
pointer to dspi_master_handle_t structure which stores the transfer state.

void DSPI_SlaveTransferCreateHandle ( SPI_Type ∗ base, dspi_slave_handle_t
∗ handle, dspi_slave_transfer_callback_t callback, void ∗ userData )

This function initializes the DSPI handle, which can be used for other DSPI transactional APIs. Usually,
for a specified DSPI instance, call this API once to get the initialized handle.

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Parameters
handle
base
callback
userData

DSPI handle pointer to dspi_slave_handle_t.
DSPI peripheral base address.
DSPI callback.
callback function parameter.

status_t DSPI_SlaveTransferNonBlocking ( SPI_Type ∗ base,
dspi_slave_handle_t ∗ handle, dspi_transfer_t ∗ transfer )

15.2.7.41

This function transfers data using an interrupt. This is a non-blocking function, which returns right away.
When all data have been transferred, the callback function is called.
Parameters
base
handle
transfer

DSPI peripheral base address.
pointer to dspi_slave_handle_t structure which stores the transfer state.
pointer to dspi_transfer_t structure.

Returns
status of status_t.

status_t DSPI_SlaveTransferGetCount ( SPI_Type ∗ base, dspi_slave_handle_t
∗ handle, size_t ∗ count )

15.2.7.42

This function gets the slave transfer count.
Parameters
base
handle
count

DSPI peripheral base address.
pointer to dspi_master_handle_t structure which stores the transfer state.
Number of bytes transferred so far by the non-blocking transaction.

Returns
status of status_t.

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15.2.7.43

void DSPI_SlaveTransferAbort ( SPI_Type ∗ base, dspi_slave_handle_t ∗
handle )

This function aborts transfer using an interrupt.

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Parameters
base
handle

DSPI peripheral base address.
pointer to dspi_slave_handle_t structure which stores the transfer state.

void DSPI_SlaveTransferHandleIRQ ( SPI_Type ∗ base, dspi_slave_handle_t ∗
handle )

15.2.7.44

This function processes the DSPI transmit and receive IRQ.
Parameters
base
handle

DSPI peripheral base address.
pointer to dspi_slave_handle_t structure which stores the transfer state.

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15.3
15.3.1

DSPI DMA Driver
Overview

This section describes the programming interface of the DSPI Peripheral driver. The DSPI driver configures DSPI module, provides the functional and transactional interfaces to build the DSPI application.

Files
• file fsl_dspi_dma.h

Data Structures
• struct dspi_master_dma_handle_t
DSPI master DMA transfer handle structure used for transactional API. More...

• struct dspi_slave_dma_handle_t
DSPI slave DMA transfer handle structure used for transactional API. More...

Typedefs
• typedef void(∗ dspi_master_dma_transfer_callback_t )(SPI_Type ∗base, dspi_master_dma_handle_t ∗handle, status_t status, void ∗userData)
Completion callback function pointer type.

• typedef void(∗ dspi_slave_dma_transfer_callback_t )(SPI_Type ∗base, dspi_slave_dma_handle_t ∗handle, status_t status, void ∗userData)
Completion callback function pointer type.

Functions
• void DSPI_MasterTransferCreateHandleDMA (SPI_Type ∗base, dspi_master_dma_handle_t
∗handle, dspi_master_dma_transfer_callback_t callback, void ∗userData, dma_handle_t ∗dmaRxRegToRxDataHandle, dma_handle_t ∗dmaTxDataToIntermediaryHandle, dma_handle_t ∗dmaIntermediaryToTxRegHandle)
Initializes the DSPI master DMA handle.

• status_t DSPI_MasterTransferDMA (SPI_Type ∗base, dspi_master_dma_handle_t ∗handle, dspi_transfer_t ∗transfer)
DSPI master transfers data using DMA.

• void DSPI_MasterTransferAbortDMA (SPI_Type ∗base, dspi_master_dma_handle_t ∗handle)
DSPI master aborts a transfer which is using DMA.

• status_t DSPI_MasterTransferGetCountDMA (SPI_Type ∗base,
t ∗handle, size_t ∗count)

dspi_master_dma_handle_-

Gets the master DMA transfer remaining bytes.

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• void DSPI_SlaveTransferCreateHandleDMA (SPI_Type ∗base, dspi_slave_dma_handle_t ∗handle,
dspi_slave_dma_transfer_callback_t callback, void ∗userData, dma_handle_t ∗dmaRxRegToRxDataHandle, dma_handle_t ∗dmaTxDataToTxRegHandle)
Initializes the DSPI slave DMA handle.

• status_t DSPI_SlaveTransferDMA (SPI_Type ∗base, dspi_slave_dma_handle_t ∗handle, dspi_transfer_t ∗transfer)
DSPI slave transfers data using DMA.

• void DSPI_SlaveTransferAbortDMA (SPI_Type ∗base, dspi_slave_dma_handle_t ∗handle)
DSPI slave aborts a transfer which is using DMA.

• status_t DSPI_SlaveTransferGetCountDMA (SPI_Type ∗base, dspi_slave_dma_handle_t ∗handle,
size_t ∗count)
Gets the slave DMA transfer remaining bytes.

15.3.2
15.3.2.1

Data Structure Documentation
struct _dspi_master_dma_handle

Forward declaration of the DSPI DMA master handle typedefs.
Data Fields

• uint32_t bitsPerFrame
Desired number of bits per frame.

• volatile uint32_t command
Desired data command.

• volatile uint32_t lastCommand
Desired last data command.

• uint8_t fifoSize
FIFO dataSize.

• volatile bool isPcsActiveAfterTransfer
Is PCS signal keep active after the last frame transfer.

• volatile bool isThereExtraByte
Is there extra byte.

• uint8_t ∗volatile txData
Send buffer.

• uint8_t ∗volatile rxData
Receive buffer.

• volatile size_t remainingSendByteCount
Number of bytes remaining to send.

• volatile size_t remainingReceiveByteCount
Number of bytes remaining to receive.

• size_t totalByteCount
Number of transfer bytes.

• uint32_t rxBuffIfNull
Used if there is not rxData for DMA purpose.

• uint32_t txBuffIfNull
Used if there is not txData for DMA purpose.

• volatile uint8_t state
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DSPI transfer state , _dspi_transfer_state.

• dspi_master_dma_transfer_callback_t callback
Completion callback.

• void ∗ userData
Callback user data.

• dma_handle_t ∗ dmaRxRegToRxDataHandle
dma_handle_t handle point used for RxReg to RxData buff

• dma_handle_t ∗ dmaTxDataToIntermediaryHandle
dma_handle_t handle point used for TxData to Intermediary

• dma_handle_t ∗ dmaIntermediaryToTxRegHandle
dma_handle_t handle point used for Intermediary to TxReg
15.3.2.1.0.27

Field Documentation

15.3.2.1.0.27.1

uint32_t dspi_master_dma_handle_t::bitsPerFrame

15.3.2.1.0.27.2

volatile uint32_t dspi_master_dma_handle_t::command

15.3.2.1.0.27.3

volatile uint32_t dspi_master_dma_handle_t::lastCommand

15.3.2.1.0.27.4

uint8_t dspi_master_dma_handle_t::fifoSize

15.3.2.1.0.27.5

volatile bool dspi_master_dma_handle_t::isPcsActiveAfterTransfer

15.3.2.1.0.27.6

volatile bool dspi_master_dma_handle_t::isThereExtraByte

15.3.2.1.0.27.7

uint8_t∗ volatile dspi_master_dma_handle_t::txData

15.3.2.1.0.27.8

uint8_t∗ volatile dspi_master_dma_handle_t::rxData

15.3.2.1.0.27.9

volatile size_t dspi_master_dma_handle_t::remainingSendByteCount

15.3.2.1.0.27.10

volatile size_t dspi_master_dma_handle_t::remainingReceiveByteCount

15.3.2.1.0.27.11

uint32_t dspi_master_dma_handle_t::rxBuffIfNull

15.3.2.1.0.27.12

uint32_t dspi_master_dma_handle_t::txBuffIfNull

15.3.2.1.0.27.13

volatile uint8_t dspi_master_dma_handle_t::state

15.3.2.1.0.27.14 dspi_master_dma_transfer_callback_t dspi_master_dma_handle_t::callback
15.3.2.1.0.27.15

15.3.2.2

void∗ dspi_master_dma_handle_t::userData

struct _dspi_slave_dma_handle

Forward declaration of the DSPI DMA slave handle typedefs.

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Data Fields

• uint32_t bitsPerFrame
Desired number of bits per frame.

• volatile bool isThereExtraByte
Is there extra byte.

• uint8_t ∗volatile txData
Send buffer.

• uint8_t ∗volatile rxData
Receive buffer.

• volatile size_t remainingSendByteCount
Number of bytes remaining to send.

• volatile size_t remainingReceiveByteCount
Number of bytes remaining to receive.

• size_t totalByteCount
Number of transfer bytes.

• uint32_t rxBuffIfNull
Used if there is not rxData for DMA purpose.

• uint32_t txBuffIfNull
Used if there is not txData for DMA purpose.

• uint32_t txLastData
Used if there is an extra byte when 16 bits per frame for DMA purpose.

• volatile uint8_t state
DSPI transfer state.

• uint32_t errorCount
Error count for slave transfer.

• dspi_slave_dma_transfer_callback_t callback
Completion callback.

• void ∗ userData
Callback user data.

• dma_handle_t ∗ dmaRxRegToRxDataHandle
dma_handle_t handle point used for RxReg to RxData buff

• dma_handle_t ∗ dmaTxDataToTxRegHandle
dma_handle_t handle point used for TxData to TxReg

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15.3.2.2.0.28

Field Documentation

15.3.2.2.0.28.1

uint32_t dspi_slave_dma_handle_t::bitsPerFrame

15.3.2.2.0.28.2

volatile bool dspi_slave_dma_handle_t::isThereExtraByte

15.3.2.2.0.28.3

uint8_t∗ volatile dspi_slave_dma_handle_t::txData

15.3.2.2.0.28.4

uint8_t∗ volatile dspi_slave_dma_handle_t::rxData

15.3.2.2.0.28.5

volatile size_t dspi_slave_dma_handle_t::remainingSendByteCount

15.3.2.2.0.28.6

volatile size_t dspi_slave_dma_handle_t::remainingReceiveByteCount

15.3.2.2.0.28.7

uint32_t dspi_slave_dma_handle_t::rxBuffIfNull

15.3.2.2.0.28.8

uint32_t dspi_slave_dma_handle_t::txBuffIfNull

15.3.2.2.0.28.9

uint32_t dspi_slave_dma_handle_t::txLastData

15.3.2.2.0.28.10

volatile uint8_t dspi_slave_dma_handle_t::state

15.3.2.2.0.28.11

uint32_t dspi_slave_dma_handle_t::errorCount

15.3.2.2.0.28.12 dspi_slave_dma_transfer_callback_t dspi_slave_dma_handle_t::callback
15.3.2.2.0.28.13

15.3.3
15.3.3.1

void∗ dspi_slave_dma_handle_t::userData

Typedef Documentation
typedef void(∗ dspi_master_dma_transfer_callback_t)(SPI_Type ∗base,
dspi_master_dma_handle_t ∗handle, status_t status, void ∗userData)

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Parameters
base
handle
status
userData

DSPI peripheral base address.
Pointer to the handle for the DSPI master.
Success or error code describing whether the transfer completed.
Arbitrary pointer-dataSized value passed from the application.

typedef void(∗ dspi_slave_dma_transfer_callback_t)(SPI_Type ∗base,
dspi_slave_dma_handle_t ∗handle, status_t status, void ∗userData)

15.3.3.2

Parameters
base
handle
status
userData

15.3.4

DSPI peripheral base address.
Pointer to the handle for the DSPI slave.
Success or error code describing whether the transfer completed.
Arbitrary pointer-dataSized value passed from the application.

Function Documentation

15.3.4.1

void DSPI_MasterTransferCreateHandleDMA ( SPI_Type ∗ base,
dspi_master_dma_handle_t ∗ handle, dspi_master_dma_transfer_callback_t
callback, void ∗ userData, dma_handle_t ∗ dmaRxRegToRxDataHandle,
dma_handle_t ∗ dmaTxDataToIntermediaryHandle, dma_handle_t ∗
dmaIntermediaryToTxRegHandle )

This function initializes the DSPI DMA handle which can be used for other DSPI transactional APIs.
Usually, for a specified DSPI instance, call this API once to get the initialized handle.
Note that DSPI DMA has a separated (Rx and Tx as two sources) or shared (Rx and Tx is the same source)
DMA request source. (1) For a separated DMA request source, enable and set the Rx DMAMUX source
for dmaRxRegToRxDataHandle and Tx DMAMUX source for dmaIntermediaryToTxRegHandle. (2) For
a shared DMA request source, enable and set the Rx/Rx DMAMUX source for dmaRxRegToRxDataHandle.
Parameters

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base
handle
callback
userData

DSPI peripheral base address.
DSPI handle pointer to dspi_master_dma_handle_t.
DSPI callback.
callback function parameter.

dmaRxRegToRxDataHandle

dmaRxRegToRxDataHandle pointer to dma_handle_t.

dmaTxDataToIntermediaryHandle

dmaTxDataToIntermediaryHandle pointer to dma_handle_t.

dmaIntermediaryToTxRegHandle

dmaIntermediaryToTxRegHandle pointer to dma_handle_t.

status_t DSPI_MasterTransferDMA ( SPI_Type ∗ base, dspi_master_dma_handle_t ∗ handle, dspi_transfer_t ∗ transfer )

15.3.4.2

This function transfers data using DMA. This is a non-blocking function, which returns right away. When
all data is transferred, the callback function is called.
Note that master DMA transfer cannot support the transfer_size of 1 when the bitsPerFrame is greater than
8.
Parameters
base
handle
transfer

DSPI peripheral base address.
pointer to dspi_master_dma_handle_t structure which stores the transfer state.
pointer to dspi_transfer_t structure.

Returns
status of status_t.

15.3.4.3

void DSPI_MasterTransferAbortDMA ( SPI_Type ∗ base,
dspi_master_dma_handle_t ∗ handle )

This function aborts a transfer which is using DMA.

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Parameters
base
handle

DSPI peripheral base address.
pointer to dspi_master_dma_handle_t structure which stores the transfer state.

status_t DSPI_MasterTransferGetCountDMA ( SPI_Type ∗ base,
dspi_master_dma_handle_t ∗ handle, size_t ∗ count )

15.3.4.4

This function gets the master DMA transfer remaining bytes.
Parameters
base
handle
count

DSPI peripheral base address.
pointer to dspi_master_dma_handle_t structure which stores the transfer state.
number point of bytes transferred so far by the non-blocking transaction.

Returns
status of status_t.

15.3.4.5

void DSPI_SlaveTransferCreateHandleDMA ( SPI_Type ∗ base,
dspi_slave_dma_handle_t ∗ handle, dspi_slave_dma_transfer_callback_t
callback, void ∗ userData, dma_handle_t ∗ dmaRxRegToRxDataHandle,
dma_handle_t ∗ dmaTxDataToTxRegHandle )

This function initializes the DSPI DMA handle which can be used for other DSPI transactional APIs.
Usually, for a specified DSPI instance, call this API one time to get the initialized handle.
Note that DSPI DMA has a separated (Rx and Tx as two sources) or shared (Rx and Tx is the same
source) DMA request source. (1) For a separated DMA request source, enable and set the Rx DMAMUX
source for dmaRxRegToRxDataHandle and Tx DMAMUX source for dmaTxDataToTxRegHandle. (2)
For a shared DMA request source, enable and set the Rx/Rx DMAMUX source for dmaRxRegToRxDataHandle.
Parameters
base

DSPI peripheral base address.

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handle
callback
userData

DSPI handle pointer to dspi_slave_dma_handle_t.
DSPI callback.
callback function parameter.

dmaRxRegToRxDataHandle

dmaRxRegToRxDataHandle pointer to dma_handle_t.

dmaTxDataToTxRegHandle

dmaTxDataToTxRegHandle pointer to dma_handle_t.

status_t DSPI_SlaveTransferDMA ( SPI_Type ∗ base, dspi_slave_dma_handle_t
∗ handle, dspi_transfer_t ∗ transfer )

15.3.4.6

This function transfers data using DMA. This is a non-blocking function, which returns right away. When
all data is transferred, the callback function is called.
Note that the slave DMA transfer cannot support the transfer_size of 1 when the bitsPerFrame is greater
than 8.
Parameters
base
handle
transfer

DSPI peripheral base address.
pointer to dspi_slave_dma_handle_t structure which stores the transfer state.
pointer to dspi_transfer_t structure.

Returns
status of status_t.

void DSPI_SlaveTransferAbortDMA ( SPI_Type ∗ base, dspi_slave_dma_handle_t
∗ handle )

15.3.4.7

This function aborts a transfer which is using DMA.
Parameters
base
handle

15.3.4.8

DSPI peripheral base address.
pointer to dspi_slave_dma_handle_t structure which stores the transfer state.

status_t DSPI_SlaveTransferGetCountDMA ( SPI_Type ∗ base,
dspi_slave_dma_handle_t ∗ handle, size_t ∗ count )

This function gets the slave DMA transfer remaining bytes.
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DSPI DMA Driver
Parameters
base
handle
count

DSPI peripheral base address.
pointer to dspi_slave_dma_handle_t structure which stores the transfer state.
number point of bytes transferred so far by the non-blocking transaction.

Returns
status of status_t.

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DSPI eDMA Driver

15.4
15.4.1

DSPI eDMA Driver
Overview

This section describes the programming interface of the DSPI Peripheral driver. The DSPI driver configures DSPI module, provides the functional and transactional interfaces to build the DSPI application.

Files
• file fsl_dspi_edma.h

Data Structures
• struct dspi_master_edma_handle_t
DSPI master eDMA transfer handle structure used for transactional API. More...

• struct dspi_slave_edma_handle_t
DSPI slave eDMA transfer handle structure used for transactional API. More...

Typedefs
• typedef void(∗ dspi_master_edma_transfer_callback_t )(SPI_Type ∗base, dspi_master_edma_handle_t ∗handle, status_t status, void ∗userData)
Completion callback function pointer type.

• typedef void(∗ dspi_slave_edma_transfer_callback_t )(SPI_Type ∗base, dspi_slave_edma_handle_t
∗handle, status_t status, void ∗userData)
Completion callback function pointer type.

Functions
• void DSPI_MasterTransferCreateHandleEDMA (SPI_Type ∗base, dspi_master_edma_handle_t
∗handle, dspi_master_edma_transfer_callback_t callback, void ∗userData, edma_handle_t ∗edmaRxRegToRxDataHandle, edma_handle_t ∗edmaTxDataToIntermediaryHandle, edma_handle_t
∗edmaIntermediaryToTxRegHandle)
Initializes the DSPI master eDMA handle.

• status_t DSPI_MasterTransferEDMA (SPI_Type ∗base, dspi_master_edma_handle_t ∗handle, dspi_transfer_t ∗transfer)
DSPI master transfer data using eDMA.

• void DSPI_MasterTransferAbortEDMA (SPI_Type ∗base, dspi_master_edma_handle_t ∗handle)
DSPI master aborts a transfer which using eDMA.

• status_t DSPI_MasterTransferGetCountEDMA (SPI_Type ∗base, dspi_master_edma_handle_t
∗handle, size_t ∗count)
Gets the master eDMA transfer count.

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DSPI eDMA Driver
• void DSPI_SlaveTransferCreateHandleEDMA (SPI_Type ∗base, dspi_slave_edma_handle_t
∗handle, dspi_slave_edma_transfer_callback_t callback, void ∗userData, edma_handle_t ∗edmaRxRegToRxDataHandle, edma_handle_t ∗edmaTxDataToTxRegHandle)
Initializes the DSPI slave eDMA handle.

• status_t DSPI_SlaveTransferEDMA (SPI_Type ∗base, dspi_slave_edma_handle_t ∗handle, dspi_transfer_t ∗transfer)
DSPI slave transfer data using eDMA.

• void DSPI_SlaveTransferAbortEDMA (SPI_Type ∗base, dspi_slave_edma_handle_t ∗handle)
DSPI slave aborts a transfer which using eDMA.

• status_t DSPI_SlaveTransferGetCountEDMA (SPI_Type ∗base,
t ∗handle, size_t ∗count)

dspi_slave_edma_handle_-

Gets the slave eDMA transfer count.

15.4.2
15.4.2.1

Data Structure Documentation
struct _dspi_master_edma_handle

Forward declaration of the DSPI eDMA master handle typedefs.
Data Fields

• uint32_t bitsPerFrame
Desired number of bits per frame.

• volatile uint32_t command
Desired data command.

• volatile uint32_t lastCommand
Desired last data command.

• uint8_t fifoSize
FIFO dataSize.

• volatile bool isPcsActiveAfterTransfer
Is PCS signal keep active after the last frame transfer.

• volatile bool isThereExtraByte
Is there extra byte.

• uint8_t ∗volatile txData
Send buffer.

• uint8_t ∗volatile rxData
Receive buffer.

• volatile size_t remainingSendByteCount
Number of bytes remaining to send.

• volatile size_t remainingReceiveByteCount
Number of bytes remaining to receive.

• size_t totalByteCount
Number of transfer bytes.

• uint32_t rxBuffIfNull
Used if there is not rxData for DMA purpose.

• uint32_t txBuffIfNull
Used if there is not txData for DMA purpose.

• volatile uint8_t state
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DSPI transfer state , _dspi_transfer_state.

• dspi_master_edma_transfer_callback_t callback
Completion callback.

• void ∗ userData
Callback user data.

• edma_handle_t ∗ edmaRxRegToRxDataHandle
edma_handle_t handle point used for RxReg to RxData buff

• edma_handle_t ∗ edmaTxDataToIntermediaryHandle
edma_handle_t handle point used for TxData to Intermediary

• edma_handle_t ∗ edmaIntermediaryToTxRegHandle
edma_handle_t handle point used for Intermediary to TxReg

• edma_tcd_t dspiSoftwareTCD [2]
SoftwareTCD , internal used.
15.4.2.1.0.29

Field Documentation

15.4.2.1.0.29.1

uint32_t dspi_master_edma_handle_t::bitsPerFrame

15.4.2.1.0.29.2

volatile uint32_t dspi_master_edma_handle_t::command

15.4.2.1.0.29.3

volatile uint32_t dspi_master_edma_handle_t::lastCommand

15.4.2.1.0.29.4

uint8_t dspi_master_edma_handle_t::fifoSize

15.4.2.1.0.29.5

volatile bool dspi_master_edma_handle_t::isPcsActiveAfterTransfer

15.4.2.1.0.29.6

volatile bool dspi_master_edma_handle_t::isThereExtraByte

15.4.2.1.0.29.7

uint8_t∗ volatile dspi_master_edma_handle_t::txData

15.4.2.1.0.29.8

uint8_t∗ volatile dspi_master_edma_handle_t::rxData

15.4.2.1.0.29.9

volatile size_t dspi_master_edma_handle_t::remainingSendByteCount

15.4.2.1.0.29.10

volatile size_t dspi_master_edma_handle_t::remainingReceiveByteCount

15.4.2.1.0.29.11

uint32_t dspi_master_edma_handle_t::rxBuffIfNull

15.4.2.1.0.29.12

uint32_t dspi_master_edma_handle_t::txBuffIfNull

15.4.2.1.0.29.13

volatile uint8_t dspi_master_edma_handle_t::state

15.4.2.1.0.29.14 dspi_master_edma_transfer_callback_t dspi_master_edma_handle_t::callback
15.4.2.1.0.29.15

15.4.2.2

void∗ dspi_master_edma_handle_t::userData

struct _dspi_slave_edma_handle

Forward declaration of the DSPI eDMA slave handle typedefs.

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DSPI eDMA Driver
Data Fields

• uint32_t bitsPerFrame
Desired number of bits per frame.

• volatile bool isThereExtraByte
Is there extra byte.

• uint8_t ∗volatile txData
Send buffer.

• uint8_t ∗volatile rxData
Receive buffer.

• volatile size_t remainingSendByteCount
Number of bytes remaining to send.

• volatile size_t remainingReceiveByteCount
Number of bytes remaining to receive.

• size_t totalByteCount
Number of transfer bytes.

• uint32_t rxBuffIfNull
Used if there is not rxData for DMA purpose.

• uint32_t txBuffIfNull
Used if there is not txData for DMA purpose.

• uint32_t txLastData
Used if there is an extra byte when 16bits per frame for DMA purpose.

• volatile uint8_t state
DSPI transfer state.

• uint32_t errorCount
Error count for slave transfer.

• dspi_slave_edma_transfer_callback_t callback
Completion callback.

• void ∗ userData
Callback user data.

• edma_handle_t ∗ edmaRxRegToRxDataHandle
edma_handle_t handle point used for RxReg to RxData buff

• edma_handle_t ∗ edmaTxDataToTxRegHandle
edma_handle_t handle point used for TxData to TxReg

• edma_tcd_t dspiSoftwareTCD [2]
SoftwareTCD , internal used.

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15.4.2.2.0.30

Field Documentation

15.4.2.2.0.30.1

uint32_t dspi_slave_edma_handle_t::bitsPerFrame

15.4.2.2.0.30.2

volatile bool dspi_slave_edma_handle_t::isThereExtraByte

15.4.2.2.0.30.3

uint8_t∗ volatile dspi_slave_edma_handle_t::txData

15.4.2.2.0.30.4

uint8_t∗ volatile dspi_slave_edma_handle_t::rxData

15.4.2.2.0.30.5

volatile size_t dspi_slave_edma_handle_t::remainingSendByteCount

15.4.2.2.0.30.6

volatile size_t dspi_slave_edma_handle_t::remainingReceiveByteCount

15.4.2.2.0.30.7

uint32_t dspi_slave_edma_handle_t::rxBuffIfNull

15.4.2.2.0.30.8

uint32_t dspi_slave_edma_handle_t::txBuffIfNull

15.4.2.2.0.30.9

uint32_t dspi_slave_edma_handle_t::txLastData

15.4.2.2.0.30.10

volatile uint8_t dspi_slave_edma_handle_t::state

15.4.2.2.0.30.11

uint32_t dspi_slave_edma_handle_t::errorCount

15.4.2.2.0.30.12 dspi_slave_edma_transfer_callback_t dspi_slave_edma_handle_t::callback
15.4.2.2.0.30.13

15.4.3
15.4.3.1

void∗ dspi_slave_edma_handle_t::userData

Typedef Documentation
typedef void(∗ dspi_master_edma_transfer_callback_t)(SPI_Type ∗base,
dspi_master_edma_handle_t ∗handle, status_t status, void ∗userData)

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DSPI eDMA Driver
Parameters
base
handle
status
userData

DSPI peripheral base address.
Pointer to the handle for the DSPI master.
Success or error code describing whether the transfer completed.
Arbitrary pointer-dataSized value passed from the application.

typedef void(∗ dspi_slave_edma_transfer_callback_t)(SPI_Type ∗base,
dspi_slave_edma_handle_t ∗handle, status_t status, void ∗userData)

15.4.3.2

Parameters
base
handle
status
userData

15.4.4

DSPI peripheral base address.
Pointer to the handle for the DSPI slave.
Success or error code describing whether the transfer completed.
Arbitrary pointer-dataSized value passed from the application.

Function Documentation

15.4.4.1

void DSPI_MasterTransferCreateHandleEDMA ( SPI_Type ∗ base,
dspi_master_edma_handle_t ∗ handle, dspi_master_edma_transfer_callback_t
callback, void ∗ userData, edma_handle_t ∗ edmaRxRegToRxDataHandle,
edma_handle_t ∗ edmaTxDataToIntermediaryHandle, edma_handle_t ∗
edmaIntermediaryToTxRegHandle )

This function initializes the DSPI eDMA handle which can be used for other DSPI transactional APIs.
Usually, for a specified DSPI instance, user need only call this API once to get the initialized handle.
Note that DSPI eDMA has separated (RX and TX as two sources) or shared (RX and TX are the same
source) DMA request source. (1)For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and TX DMAMUX source for edmaIntermediaryToTxRegHandle. (2)For the shared DMA request source, enable and set the RX/RX DMAMUX source for the
edmaRxRegToRxDataHandle.
Parameters

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base
handle
callback
userData
edmaRxRegToRxDataHandle

DSPI peripheral base address.
DSPI handle pointer to dspi_master_edma_handle_t.
DSPI callback.
callback function parameter.
edmaRxRegToRxDataHandle pointer to edma_handle_t.

edmaTxDataToIntermediaryHandle

edmaTxDataToIntermediaryHandle pointer to edma_handle_t.

edmaIntermediaryToTxRegHandle

edmaIntermediaryToTxRegHandle pointer to edma_handle_t.

status_t DSPI_MasterTransferEDMA ( SPI_Type ∗ base, dspi_master_edma_handle_t ∗ handle, dspi_transfer_t ∗ transfer
)

15.4.4.2

This function transfer data using eDMA. This is non-blocking function, which returns right away. When
all data have been transfer, the callback function is called.
Parameters
base
handle
transfer

DSPI peripheral base address.
pointer to dspi_master_edma_handle_t structure which stores the transfer state.
pointer to dspi_transfer_t structure.

Returns
status of status_t.

15.4.4.3

void DSPI_MasterTransferAbortEDMA ( SPI_Type ∗ base,
dspi_master_edma_handle_t ∗ handle )

This function aborts a transfer which using eDMA.

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DSPI eDMA Driver
Parameters
base
handle

DSPI peripheral base address.
pointer to dspi_master_edma_handle_t structure which stores the transfer state.

status_t DSPI_MasterTransferGetCountEDMA ( SPI_Type ∗ base,
dspi_master_edma_handle_t ∗ handle, size_t ∗ count )

15.4.4.4

This function get the master eDMA transfer count.
Parameters
base
handle
count

DSPI peripheral base address.
pointer to dspi_master_edma_handle_t structure which stores the transfer state.
Number of bytes transferred so far by the non-blocking transaction.

Returns
status of status_t.

15.4.4.5

void DSPI_SlaveTransferCreateHandleEDMA ( SPI_Type ∗ base,
dspi_slave_edma_handle_t ∗ handle, dspi_slave_edma_transfer_callback_t
callback, void ∗ userData, edma_handle_t ∗ edmaRxRegToRxDataHandle,
edma_handle_t ∗ edmaTxDataToTxRegHandle )

This function initializes the DSPI eDMA handle which can be used for other DSPI transactional APIs.
Usually, for a specified DSPI instance, call this API once to get the initialized handle.
Note that DSPI eDMA has separated (RN and TX in 2 sources) or shared (RX and TX are the same source)
DMA request source. (1)For the separated DMA request source, enable and set the RX DMAMUX source
for edmaRxRegToRxDataHandle and TX DMAMUX source for edmaTxDataToTxRegHandle. (2)For the
shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
Parameters
base

DSPI peripheral base address.

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DSPI eDMA Driver
handle
callback
userData

DSPI handle pointer to dspi_slave_edma_handle_t.
DSPI callback.
callback function parameter.

edmaRxRegToRxDataHandle

edmaRxRegToRxDataHandle pointer to edma_handle_t.

edmaTxDataToTxRegHandle

edmaTxDataToTxRegHandle pointer to edma_handle_t.

status_t DSPI_SlaveTransferEDMA ( SPI_Type ∗ base, dspi_slave_edma_handle_t ∗ handle, dspi_transfer_t ∗ transfer )

15.4.4.6

This function transfer data using eDMA. This is non-blocking function, which returns right away. When
all data have been transfer, the callback function is called. Note that slave EDMA transfer cannot support
the situation that transfer_size is 1 when the bitsPerFrame is greater than 8 .
Parameters
base
handle
transfer

DSPI peripheral base address.
pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
pointer to dspi_transfer_t structure.

Returns
status of status_t.

void DSPI_SlaveTransferAbortEDMA ( SPI_Type ∗ base,
dspi_slave_edma_handle_t ∗ handle )

15.4.4.7

This function aborts a transfer which using eDMA.
Parameters
base
handle

15.4.4.8

DSPI peripheral base address.
pointer to dspi_slave_edma_handle_t structure which stores the transfer state.

status_t DSPI_SlaveTransferGetCountEDMA ( SPI_Type ∗ base,
dspi_slave_edma_handle_t ∗ handle, size_t ∗ count )

This function gets the slave eDMA transfer count.
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DSPI eDMA Driver
Parameters
base
handle
count

DSPI peripheral base address.
pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
Number of bytes transferred so far by the non-blocking transaction.

Returns
status of status_t.

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DSPI FreeRTOS Driver

15.5

DSPI FreeRTOS Driver

15.5.1

Overview

Files
• file fsl_dspi_freertos.h

Data Structures
• struct dspi_rtos_handle_t
DSPI FreeRTOS handle. More...

Driver version
• #define FSL_DSPI_FREERTOS_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
DSPI FreeRTOS driver version 2.0.0.

DSPI RTOS Operation
• status_t DSPI_RTOS_Init (dspi_rtos_handle_t ∗handle, SPI_Type ∗base, const dspi_master_config_t ∗masterConfig, uint32_t srcClock_Hz)
Initializes DSPI.

• status_t DSPI_RTOS_Deinit (dspi_rtos_handle_t ∗handle)
Deinitializes the DSPI.

• status_t DSPI_RTOS_Transfer (dspi_rtos_handle_t ∗handle, dspi_transfer_t ∗transfer)
Performs SPI transfer.

15.5.2
15.5.2.1

Data Structure Documentation
struct dspi_rtos_handle_t

DSPI FreeRTOS handle.

Data Fields

• SPI_Type ∗ base
DSPI base address.

• dspi_master_handle_t drv_handle
Handle of the underlying driver, treated as opaque by the RTOS layer.

• SemaphoreHandle_t mutex
Mutex to lock the handle during a transfer.

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DSPI FreeRTOS Driver
• SemaphoreHandle_t event
Semaphore to notify and unblock task when transfer ends.

• OS_EVENT ∗ mutex
Mutex to lock the handle during a transfer.

• OS_FLAG_GRP ∗ event
Semaphore to notify and unblock task when transfer ends.

• OS_SEM mutex
Mutex to lock the handle during a transfer.

• OS_FLAG_GRP event
Semaphore to notify and unblock task when transfer ends.

15.5.3

Macro Definition Documentation
#define FSL_DSPI_FREERTOS_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

15.5.3.1

15.5.4

Function Documentation
status_t DSPI_RTOS_Init ( dspi_rtos_handle_t ∗ handle, SPI_Type ∗ base, const
dspi_master_config_t ∗ masterConfig, uint32_t srcClock_Hz )

15.5.4.1

This function initializes the DSPI module and related RTOS context.
Parameters
handle
base

The RTOS DSPI handle, the pointer to an allocated space for RTOS context.
The pointer base address of the DSPI instance to initialize.

masterConfig

Configuration structure to set-up DSPI in master mode.

srcClock_Hz

Frequency of input clock of the DSPI module.

Returns
status of the operation.

15.5.4.2

status_t DSPI_RTOS_Deinit ( dspi_rtos_handle_t ∗ handle )

This function deinitializes the DSPI module and related RTOS context.
Parameters

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DSPI FreeRTOS Driver
handle

The RTOS DSPI handle.

status_t DSPI_RTOS_Transfer ( dspi_rtos_handle_t ∗ handle, dspi_transfer_t ∗
transfer )

15.5.4.3

This function performs an SPI transfer according to data given in the transfer structure.
Parameters
handle
transfer

The RTOS DSPI handle.
Structure specifying the transfer parameters.

Returns
status of the operation.

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DSPI µCOS/II Driver

15.6

DSPI µCOS/II Driver

15.6.1

Overview

Files
• file fsl_dspi_ucosii.h

Data Structures
• struct dspi_rtos_handle_t
DSPI µC/OS-II handle. More...

Driver version
• #define FSL_DSPI_UCOSII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
DSPI µC/OS-II driver version 2.0.0.

DSPI RTOS Operation
• status_t DSPI_RTOS_Init (dspi_rtos_handle_t ∗handle, SPI_Type ∗base, const dspi_master_config_t ∗masterConfig, uint32_t srcClock_Hz)
Initializes DSPI.

• status_t DSPI_RTOS_Deinit (dspi_rtos_handle_t ∗handle)
Deinitializes the DSPI.

• status_t DSPI_RTOS_Transfer (dspi_rtos_handle_t ∗handle, dspi_transfer_t ∗transfer)
Performs SPI transfer.

15.6.2
15.6.2.1

Data Structure Documentation
struct dspi_rtos_handle_t

DSPI µC/OS-II handle.

Data Fields

• SPI_Type ∗ base
DSPI base address.

• dspi_master_handle_t drv_handle
Handle of the underlying driver, treated as opaque by the RTOS layer.

• SemaphoreHandle_t mutex
Mutex to lock the handle during a transfer.

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DSPI µCOS/II Driver
• SemaphoreHandle_t event
Semaphore to notify and unblock task when transfer ends.

• OS_EVENT ∗ mutex
Mutex to lock the handle during a transfer.

• OS_FLAG_GRP ∗ event
Semaphore to notify and unblock task when transfer ends.

• OS_SEM mutex
Mutex to lock the handle during a transfer.

• OS_FLAG_GRP event
Semaphore to notify and unblock task when transfer ends.

15.6.3

Macro Definition Documentation
#define FSL_DSPI_UCOSII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

15.6.3.1

15.6.4

Function Documentation
status_t DSPI_RTOS_Init ( dspi_rtos_handle_t ∗ handle, SPI_Type ∗ base, const
dspi_master_config_t ∗ masterConfig, uint32_t srcClock_Hz )

15.6.4.1

This function initializes the DSPI module and related RTOS context.
Parameters
handle
base

The RTOS DSPI handle, the pointer to an allocated space for RTOS context.
The pointer base address of the DSPI instance to initialize.

masterConfig

Configuration structure to set-up DSPI in master mode.

srcClock_Hz

Frequency of input clock of the DSPI module.

Returns
status of the operation.

15.6.4.2

status_t DSPI_RTOS_Deinit ( dspi_rtos_handle_t ∗ handle )

This function deinitializes the DSPI module and related RTOS context.
Parameters

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DSPI µCOS/II Driver
handle

The RTOS DSPI handle.

status_t DSPI_RTOS_Transfer ( dspi_rtos_handle_t ∗ handle, dspi_transfer_t ∗
transfer )

15.6.4.3

This function performs an SPI transfer according to data given in the transfer structure.
Parameters
handle
transfer

The RTOS DSPI handle.
Structure specifying the transfer parameters.

Returns
status of the operation.

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DSPI µCOS/III Driver

15.7

DSPI µCOS/III Driver

15.7.1

Overview

Files
• file fsl_dspi_ucosiii.h

Data Structures
• struct dspi_rtos_handle_t
DSPI µC/OS-III handle. More...

Driver version
• #define FSL_DSPI_UCOSIII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
DSPI µC/OS-III driver version 2.0.0.

DSPI RTOS Operation
• status_t DSPI_RTOS_Init (dspi_rtos_handle_t ∗handle, SPI_Type ∗base, const dspi_master_config_t ∗masterConfig, uint32_t srcClock_Hz)
Initializes DSPI.

• status_t DSPI_RTOS_Deinit (dspi_rtos_handle_t ∗handle)
Deinitializes the DSPI.

• status_t DSPI_RTOS_Transfer (dspi_rtos_handle_t ∗handle, dspi_transfer_t ∗transfer)
Performs SPI transfer.

15.7.2
15.7.2.1

Data Structure Documentation
struct dspi_rtos_handle_t

DSPI µC/OS-III handle.

Data Fields

• SPI_Type ∗ base
DSPI base address.

• dspi_master_handle_t drv_handle
Handle of the underlying driver, treated as opaque by the RTOS layer.

• SemaphoreHandle_t mutex
Mutex to lock the handle during a transfer.

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DSPI µCOS/III Driver
• SemaphoreHandle_t event
Semaphore to notify and unblock task when transfer ends.

• OS_EVENT ∗ mutex
Mutex to lock the handle during a transfer.

• OS_FLAG_GRP ∗ event
Semaphore to notify and unblock task when transfer ends.

• OS_SEM mutex
Mutex to lock the handle during a transfer.

• OS_FLAG_GRP event
Semaphore to notify and unblock task when transfer ends.

15.7.3

Macro Definition Documentation
#define FSL_DSPI_UCOSIII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

15.7.3.1

15.7.4

Function Documentation
status_t DSPI_RTOS_Init ( dspi_rtos_handle_t ∗ handle, SPI_Type ∗ base, const
dspi_master_config_t ∗ masterConfig, uint32_t srcClock_Hz )

15.7.4.1

This function initializes the DSPI module and related RTOS context.
Parameters
handle
base

The RTOS DSPI handle, the pointer to an allocated space for RTOS context.
The pointer base address of the DSPI instance to initialize.

masterConfig

Configuration structure to set-up DSPI in master mode.

srcClock_Hz

Frequency of input clock of the DSPI module.

Returns
status of the operation.

15.7.4.2

status_t DSPI_RTOS_Deinit ( dspi_rtos_handle_t ∗ handle )

This function deinitializes the DSPI module and related RTOS context.
Parameters

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DSPI µCOS/III Driver
handle

The RTOS DSPI handle.

status_t DSPI_RTOS_Transfer ( dspi_rtos_handle_t ∗ handle, dspi_transfer_t ∗
transfer )

15.7.4.3

This function performs an SPI transfer according to data given in the transfer structure.
Parameters
handle
transfer

The RTOS DSPI handle.
Structure specifying the transfer parameters.

Returns
status of the operation.

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Chapter 16
eDMA: Enhanced Direct Memory Access Controller Driver
16.1

Overview

The KSDK provides a peripheral driver for the enhanced Direct Memory Access of Kinetis devices.

16.2

Typical use case

16.2.1

eDMA Operation

edma_transfer_config_t transferConfig;
edma_config_t userConfig;
uint32_t transferDone = false;
EDMA_GetDefaultConfig(&userConfig);
EDMA_Init(DMA0, &userConfig);
EDMA_CreateHandle(&g_EDMA_Handle, DMA0, channel);
EDMA_SetCallback(&g_EDMA_Handle, EDMA_Callback, &transferDone);
EDMA_PrepareTransfer(&transferConfig, srcAddr, srcWidth, destAddr, destWidth,
bytesEachRequest, transferBytes, kEDMA_MemoryToMemory);
EDMA_SubmitTransfer(&g_EDMA_Handle, &transferConfig, true);
EDMA_StartTransfer(&g_EDMA_Handle);
/* Wait for EDMA transfer finish
while (transferDone != true);

Files
• file fsl_edma.h

Data Structures
• struct edma_config_t
eDMA global configuration structure. More...

• struct edma_transfer_config_t
eDMA transfer configuration More...

• struct edma_channel_Preemption_config_t
eDMA channel priority configuration More...

• struct edma_minor_offset_config_t
eDMA minor offset configuration More...

• struct edma_tcd_t
eDMA TCD. More...

• struct edma_handle_t
eDMA transfer handle structure More...

Macros
• #define DMA_DCHPRI_INDEX(channel) (((channel) & ∼0x03U) | (3 - ((channel)&0x03U)))
Compute the offset unit from DCHPRI3.

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Typical use case
• #define DMA_DCHPRIn(base, channel) ((volatile uint8_t ∗)&(base->DCHPRI3))[DMA_DCHPRI_INDEX(channel)]
Get the pointer of DCHPRIn.

Typedefs
• typedef void(∗ edma_callback )(struct _edma_handle ∗handle, void ∗userData, bool transferDone,
uint32_t tcds)
Define Callback function for eDMA.

Enumerations
• enum edma_transfer_size_t {
kEDMA_TransferSize1Bytes = 0x0U,
kEDMA_TransferSize2Bytes = 0x1U,
kEDMA_TransferSize4Bytes = 0x2U,
kEDMA_TransferSize16Bytes = 0x4U,
kEDMA_TransferSize32Bytes = 0x5U }
eDMA transfer configuration

• enum edma_modulo_t {

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Typical use case
kEDMA_ModuloDisable = 0x0U,
kEDMA_Modulo2bytes,
kEDMA_Modulo4bytes,
kEDMA_Modulo8bytes,
kEDMA_Modulo16bytes,
kEDMA_Modulo32bytes,
kEDMA_Modulo64bytes,
kEDMA_Modulo128bytes,
kEDMA_Modulo256bytes,
kEDMA_Modulo512bytes,
kEDMA_Modulo1Kbytes,
kEDMA_Modulo2Kbytes,
kEDMA_Modulo4Kbytes,
kEDMA_Modulo8Kbytes,
kEDMA_Modulo16Kbytes,
kEDMA_Modulo32Kbytes,
kEDMA_Modulo64Kbytes,
kEDMA_Modulo128Kbytes,
kEDMA_Modulo256Kbytes,
kEDMA_Modulo512Kbytes,
kEDMA_Modulo1Mbytes,
kEDMA_Modulo2Mbytes,
kEDMA_Modulo4Mbytes,
kEDMA_Modulo8Mbytes,
kEDMA_Modulo16Mbytes,
kEDMA_Modulo32Mbytes,
kEDMA_Modulo64Mbytes,
kEDMA_Modulo128Mbytes,
kEDMA_Modulo256Mbytes,
kEDMA_Modulo512Mbytes,
kEDMA_Modulo1Gbytes,
kEDMA_Modulo2Gbytes }
eDMA modulo configuration

• enum edma_bandwidth_t {
kEDMA_BandwidthStallNone = 0x0U,
kEDMA_BandwidthStall4Cycle = 0x2U,
kEDMA_BandwidthStall8Cycle = 0x3U }
Bandwidth control.

• enum edma_channel_link_type_t {
kEDMA_LinkNone = 0x0U,
kEDMA_MinorLink,
kEDMA_MajorLink }
Channel link type.

• enum _edma_channel_status_flags {

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Typical use case
kEDMA_DoneFlag = 0x1U,
kEDMA_ErrorFlag = 0x2U,
kEDMA_InterruptFlag = 0x4U }
eDMA channel status flags.

• enum _edma_error_status_flags {
kEDMA_DestinationBusErrorFlag = DMA_ES_DBE_MASK,
kEDMA_SourceBusErrorFlag = DMA_ES_SBE_MASK,
kEDMA_ScatterGatherErrorFlag = DMA_ES_SGE_MASK,
kEDMA_NbytesErrorFlag = DMA_ES_NCE_MASK,
kEDMA_DestinationOffsetErrorFlag = DMA_ES_DOE_MASK,
kEDMA_DestinationAddressErrorFlag = DMA_ES_DAE_MASK,
kEDMA_SourceOffsetErrorFlag = DMA_ES_SOE_MASK,
kEDMA_SourceAddressErrorFlag = DMA_ES_SAE_MASK,
kEDMA_ErrorChannelFlag = DMA_ES_ERRCHN_MASK,
kEDMA_ChannelPriorityErrorFlag = DMA_ES_CPE_MASK,
kEDMA_TransferCanceledFlag = DMA_ES_ECX_MASK,
kEDMA_ValidFlag = DMA_ES_VLD_MASK }
eDMA channel error status flags.

• enum edma_interrupt_enable_t {
kEDMA_ErrorInterruptEnable = 0x1U,
kEDMA_MajorInterruptEnable = DMA_CSR_INTMAJOR_MASK,
kEDMA_HalfInterruptEnable = DMA_CSR_INTHALF_MASK }
eDMA interrupt source

• enum edma_transfer_type_t {
kEDMA_MemoryToMemory = 0x0U,
kEDMA_PeripheralToMemory,
kEDMA_MemoryToPeripheral }
eDMA transfer type

• enum _edma_transfer_status {
kStatus_EDMA_QueueFull = MAKE_STATUS(kStatusGroup_EDMA, 0),
kStatus_EDMA_Busy = MAKE_STATUS(kStatusGroup_EDMA, 1) }
eDMA transfer status

Driver version
• #define FSL_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
eDMA driver version

eDMA initialization and De-initialization
• void EDMA_Init (DMA_Type ∗base, const edma_config_t ∗config)
Initializes eDMA peripheral.

• void EDMA_Deinit (DMA_Type ∗base)
Deinitializes eDMA peripheral.

• void EDMA_GetDefaultConfig (edma_config_t ∗config)
Gets the eDMA default configuration structure.

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Typical use case

eDMA Channel Operation
• void EDMA_ResetChannel (DMA_Type ∗base, uint32_t channel)
Sets all TCD registers to a default value.

• void EDMA_SetTransferConfig (DMA_Type ∗base, uint32_t channel, const edma_transfer_config_t ∗config, edma_tcd_t ∗nextTcd)
Configures the eDMA transfer attribute.

• void EDMA_SetMinorOffsetConfig (DMA_Type ∗base, uint32_t channel, const edma_minor_offset_config_t ∗config)
Configures the eDMA minor offset feature.

• static void EDMA_SetChannelPreemptionConfig (DMA_Type ∗base, uint32_t channel, const
edma_channel_Preemption_config_t ∗config)
Configures the eDMA channel preemption feature.

• void EDMA_SetChannelLink (DMA_Type ∗base, uint32_t channel, edma_channel_link_type_t type, uint32_t linkedChannel)
Sets the channel link for the eDMA transfer.

• void EDMA_SetBandWidth (DMA_Type ∗base, uint32_t channel, edma_bandwidth_t bandWidth)
Sets the bandwidth for the eDMA transfer.

• void EDMA_SetModulo (DMA_Type ∗base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo)
Sets the source modulo and destination modulo for eDMA transfer.

• static void EDMA_EnableAutoStopRequest (DMA_Type ∗base, uint32_t channel, bool enable)
Enables an auto stop request for the eDMA transfer.

• void EDMA_EnableChannelInterrupts (DMA_Type ∗base, uint32_t channel, uint32_t mask)
Enables the interrupt source for the eDMA transfer.

• void EDMA_DisableChannelInterrupts (DMA_Type ∗base, uint32_t channel, uint32_t mask)
Disables the interrupt source for the eDMA transfer.

eDMA TCD Operation
• void EDMA_TcdReset (edma_tcd_t ∗tcd)
Sets all fields to default values for the TCD structure.

• void EDMA_TcdSetTransferConfig (edma_tcd_t ∗tcd, const edma_transfer_config_t ∗config,
edma_tcd_t ∗nextTcd)
Configures the eDMA TCD transfer attribute.

• void EDMA_TcdSetMinorOffsetConfig (edma_tcd_t ∗tcd, const edma_minor_offset_config_t ∗config)
Configures the eDMA TCD minor offset feature.

• void EDMA_TcdSetChannelLink (edma_tcd_t ∗tcd, edma_channel_link_type_t type, uint32_t linkedChannel)
Sets the channel link for eDMA TCD.

• static void EDMA_TcdSetBandWidth (edma_tcd_t ∗tcd, edma_bandwidth_t bandWidth)
Sets the bandwidth for the eDMA TCD.

• void EDMA_TcdSetModulo (edma_tcd_t ∗tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo)
Sets the source modulo and destination modulo for eDMA TCD.

• static void EDMA_TcdEnableAutoStopRequest (edma_tcd_t ∗tcd, bool enable)
Sets the auto stop request for the eDMA TCD.

• void EDMA_TcdEnableInterrupts (edma_tcd_t ∗tcd, uint32_t mask)
Enables the interrupt source for the eDMA TCD.

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Typical use case
• void EDMA_TcdDisableInterrupts (edma_tcd_t ∗tcd, uint32_t mask)
Disables the interrupt source for the eDMA TCD.

eDMA Channel Transfer Operation
• static void EDMA_EnableChannelRequest (DMA_Type ∗base, uint32_t channel)
Enables the eDMA hardware channel request.

• static void EDMA_DisableChannelRequest (DMA_Type ∗base, uint32_t channel)
Disables the eDMA hardware channel request.

• static void EDMA_TriggerChannelStart (DMA_Type ∗base, uint32_t channel)
Starts the eDMA transfer by software trigger.

eDMA Channel Status Operation
• uint32_t EDMA_GetRemainingBytes (DMA_Type ∗base, uint32_t channel)
Gets the Remaining bytes from the eDMA current channel TCD.

• static uint32_t EDMA_GetErrorStatusFlags (DMA_Type ∗base)
Gets the eDMA channel error status flags.

• uint32_t EDMA_GetChannelStatusFlags (DMA_Type ∗base, uint32_t channel)
Gets the eDMA channel status flags.

• void EDMA_ClearChannelStatusFlags (DMA_Type ∗base, uint32_t channel, uint32_t mask)
Clears the eDMA channel status flags.

eDMA Transactional Operation
• void EDMA_CreateHandle (edma_handle_t ∗handle, DMA_Type ∗base, uint32_t channel)
Creates the eDMA handle.

• void EDMA_InstallTCDMemory (edma_handle_t ∗handle, edma_tcd_t ∗tcdPool, uint32_t tcdSize)
Installs the TCDs memory pool into eDMA handle.

• void EDMA_SetCallback (edma_handle_t ∗handle, edma_callback callback, void ∗userData)
Installs a callback function for the eDMA transfer.

• void EDMA_PrepareTransfer (edma_transfer_config_t ∗config, void ∗srcAddr, uint32_t srcWidth,
void ∗destAddr, uint32_t destWidth, uint32_t bytesEachRequest, uint32_t transferBytes, edma_transfer_type_t type)
Prepares the eDMA transfer structure.

• status_t EDMA_SubmitTransfer (edma_handle_t ∗handle, const edma_transfer_config_t ∗config)
Submits the eDMA transfer request.

• void EDMA_StartTransfer (edma_handle_t ∗handle)
eDMA start transfer.

• void EDMA_StopTransfer (edma_handle_t ∗handle)
eDMA stop transfer.

• void EDMA_AbortTransfer (edma_handle_t ∗handle)
eDMA abort transfer.

• void EDMA_HandleIRQ (edma_handle_t ∗handle)
eDMA IRQ handler for current major loop transfer complete.

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Data Structure Documentation

16.3
16.3.1

Data Structure Documentation
struct edma_config_t

Data Fields
• bool enableContinuousLinkMode
Enable (true) continuous link mode.

• bool enableHaltOnError
Enable (true) transfer halt on error.

• bool enableRoundRobinArbitration
Enable (true) round robin channel arbitration method, or fixed priority arbitration is used for channel
selection.

• bool enableDebugMode
Enable(true) eDMA debug mode.
16.3.1.0.0.31
16.3.1.0.0.31.1

Field Documentation
bool edma_config_t::enableContinuousLinkMode

Upon minor loop completion, the channel activates again if that channel has a minor loop channel link
enabled and the link channel is itself.
16.3.1.0.0.31.2

bool edma_config_t::enableHaltOnError

Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is
cleared.
16.3.1.0.0.31.3

bool edma_config_t::enableDebugMode

When in debug mode, the eDMA stalls the start of a new channel. Executing channels are allowed to
complete.

16.3.2

struct edma_transfer_config_t

This structure configures the source/destination transfer attribute. This figure shows the eDMA’s transfer
model:
| Transfer Size | | Minor Loop |_______________| Major loop Count 1 | Bytes | Transfer Size | | ____________|_______________|____________________|–> Minor loop complete
| | | |_______________| Major Loop Count 2 | | | | |_______________|____________________|–> Minor
loop Complete
------------------------------------------------------—> Transfer complete

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Data Structure Documentation

Data Fields
• uint32_t srcAddr
Source data address.

• uint32_t destAddr
Destination data address.

• edma_transfer_size_t srcTransferSize
Source data transfer size.

• edma_transfer_size_t destTransferSize
Destination data transfer size.

• int16_t srcOffset
Sign-extended offset applied to the current source address to form the next-state value as each source read
is completed.

• int16_t destOffset
Sign-extended offset applied to the current destination address to form the next-state value as each destination write is completed.

• uint16_t minorLoopBytes
Bytes to transfer in a minor loop.

• uint32_t majorLoopCounts
Major loop iteration count.
16.3.2.0.0.32

Field Documentation

16.3.2.0.0.32.1

uint32_t edma_transfer_config_t::srcAddr

16.3.2.0.0.32.2

uint32_t edma_transfer_config_t::destAddr

16.3.2.0.0.32.3 edma_transfer_size_t edma_transfer_config_t::srcTransferSize
16.3.2.0.0.32.4 edma_transfer_size_t edma_transfer_config_t::destTransferSize
16.3.2.0.0.32.5

int16_t edma_transfer_config_t::srcOffset

16.3.2.0.0.32.6

int16_t edma_transfer_config_t::destOffset

16.3.2.0.0.32.7

uint32_t edma_transfer_config_t::majorLoopCounts

16.3.3

struct edma_channel_Preemption_config_t

Data Fields
• bool enableChannelPreemption
If true: channel can be suspended by other channel with higher priority.

• bool enablePreemptAbility
If true: channel can suspend other channel with low priority.

• uint8_t channelPriority
Channel priority.

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Data Structure Documentation

16.3.4

struct edma_minor_offset_config_t

Data Fields
• bool enableSrcMinorOffset
Enable(true) or Disable(false) source minor loop offset.

• bool enableDestMinorOffset
Enable(true) or Disable(false) destination minor loop offset.

• uint32_t minorOffset
Offset for minor loop mapping.
16.3.4.0.0.33

Field Documentation

16.3.4.0.0.33.1

bool edma_minor_offset_config_t::enableSrcMinorOffset

16.3.4.0.0.33.2

bool edma_minor_offset_config_t::enableDestMinorOffset

16.3.4.0.0.33.3

uint32_t edma_minor_offset_config_t::minorOffset

16.3.5

struct edma_tcd_t

This structure is same as TCD register which is described in reference manual, and is used to configure
scatter/gather feature as a next hardware TCD.

Data Fields
• __IO uint32_t SADDR
SADDR register, used to save source address.

• __IO uint16_t SOFF
SOFF register, save offset bytes every transfer.

• __IO uint16_t ATTR
ATTR register, source/destination transfer size and modulo.

• __IO uint32_t NBYTES
Nbytes register, minor loop length in bytes.

• __IO uint32_t SLAST
SLAST register.

• __IO uint32_t DADDR
DADDR register, used for destination address.

• __IO uint16_t DOFF
DOFF register, used for destination offset.

• __IO uint16_t CITER
CITER register, current minor loop numbers, for unfinished minor loop.

• __IO uint32_t DLAST_SGA
DLASTSGA register, next stcd address used in scatter-gather mode.

• __IO uint16_t CSR
CSR register, for TCD control status.

• __IO uint16_t BITER
BITER register, begin minor loop count.

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Data Structure Documentation
16.3.5.0.0.34

Field Documentation

16.3.5.0.0.34.1

__IO uint16_t edma_tcd_t::CITER

16.3.5.0.0.34.2

__IO uint16_t edma_tcd_t::BITER

16.3.6

struct edma_handle_t

Data Fields
• edma_callback callback
Callback function for major count exhausted.

• void ∗ userData
Callback function parameter.

• DMA_Type ∗ base
eDMA peripheral base address.

• edma_tcd_t ∗ tcdPool
Pointer to memory stored TCDs.

• uint8_t channel
eDMA channel number.

• volatile int8_t header
The first TCD index.

• volatile int8_t tail
The last TCD index.

• volatile int8_t tcdUsed
The number of used TCD slots.

• volatile int8_t tcdSize
The total number of TCD slots in the queue.

• uint8_t flags
The status of the current channel.

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Enumeration Type Documentation
16.3.6.0.0.35

Field Documentation

16.3.6.0.0.35.1 edma_callback edma_handle_t::callback
16.3.6.0.0.35.2

void∗ edma_handle_t::userData

16.3.6.0.0.35.3

DMA_Type∗ edma_handle_t::base

16.3.6.0.0.35.4 edma_tcd_t∗ edma_handle_t::tcdPool
16.3.6.0.0.35.5

uint8_t edma_handle_t::channel

16.3.6.0.0.35.6

volatile int8_t edma_handle_t::header

16.3.6.0.0.35.7

volatile int8_t edma_handle_t::tail

16.3.6.0.0.35.8

volatile int8_t edma_handle_t::tcdUsed

16.3.6.0.0.35.9

volatile int8_t edma_handle_t::tcdSize

16.3.6.0.0.35.10

16.4
16.4.1

uint8_t edma_handle_t::flags

Macro Definition Documentation
#define FSL_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Version 2.0.0.

16.5
16.5.1

16.6
16.6.1

Typedef Documentation
typedef void(∗ edma_callback)(struct _edma_handle ∗handle, void
∗userData, bool transferDone, uint32_t tcds)

Enumeration Type Documentation
enum edma_transfer_size_t

Enumerator
kEDMA_TransferSize1Bytes Source/Destination data transfer size is 1 byte every time.
kEDMA_TransferSize2Bytes Source/Destination data transfer size is 2 bytes every time.
kEDMA_TransferSize4Bytes Source/Destination data transfer size is 4 bytes every time.
kEDMA_TransferSize16Bytes Source/Destination data transfer size is 16 bytes every time.
kEDMA_TransferSize32Bytes Source/Destination data transfer size is 32 bytes every time.

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Enumeration Type Documentation

16.6.2

enum edma_modulo_t

Enumerator
kEDMA_ModuloDisable Disable modulo.
kEDMA_Modulo2bytes Circular buffer size is 2 bytes.
kEDMA_Modulo4bytes Circular buffer size is 4 bytes.
kEDMA_Modulo8bytes Circular buffer size is 8 bytes.
kEDMA_Modulo16bytes Circular buffer size is 16 bytes.
kEDMA_Modulo32bytes Circular buffer size is 32 bytes.
kEDMA_Modulo64bytes Circular buffer size is 64 bytes.
kEDMA_Modulo128bytes Circular buffer size is 128 bytes.
kEDMA_Modulo256bytes Circular buffer size is 256 bytes.
kEDMA_Modulo512bytes Circular buffer size is 512 bytes.
kEDMA_Modulo1Kbytes Circular buffer size is 1K bytes.
kEDMA_Modulo2Kbytes Circular buffer size is 2K bytes.
kEDMA_Modulo4Kbytes Circular buffer size is 4K bytes.
kEDMA_Modulo8Kbytes Circular buffer size is 8K bytes.
kEDMA_Modulo16Kbytes Circular buffer size is 16K bytes.
kEDMA_Modulo32Kbytes Circular buffer size is 32K bytes.
kEDMA_Modulo64Kbytes Circular buffer size is 64K bytes.
kEDMA_Modulo128Kbytes Circular buffer size is 128K bytes.
kEDMA_Modulo256Kbytes Circular buffer size is 256K bytes.
kEDMA_Modulo512Kbytes Circular buffer size is 512K bytes.
kEDMA_Modulo1Mbytes Circular buffer size is 1M bytes.
kEDMA_Modulo2Mbytes Circular buffer size is 2M bytes.
kEDMA_Modulo4Mbytes Circular buffer size is 4M bytes.
kEDMA_Modulo8Mbytes Circular buffer size is 8M bytes.
kEDMA_Modulo16Mbytes Circular buffer size is 16M bytes.
kEDMA_Modulo32Mbytes Circular buffer size is 32M bytes.
kEDMA_Modulo64Mbytes Circular buffer size is 64M bytes.
kEDMA_Modulo128Mbytes Circular buffer size is 128M bytes.
kEDMA_Modulo256Mbytes Circular buffer size is 256M bytes.
kEDMA_Modulo512Mbytes Circular buffer size is 512M bytes.
kEDMA_Modulo1Gbytes Circular buffer size is 1G bytes.
kEDMA_Modulo2Gbytes Circular buffer size is 2G bytes.

16.6.3

enum edma_bandwidth_t

Enumerator
kEDMA_BandwidthStallNone No eDMA engine stalls.
kEDMA_BandwidthStall4Cycle eDMA engine stalls for 4 cycles after each read/write.
kEDMA_BandwidthStall8Cycle eDMA engine stalls for 8 cycles after each read/write.
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16.6.4

enum edma_channel_link_type_t

Enumerator
kEDMA_LinkNone No channel link.
kEDMA_MinorLink Channel link after each minor loop.
kEDMA_MajorLink Channel link while major loop count exhausted.

16.6.5

enum _edma_channel_status_flags

Enumerator
kEDMA_DoneFlag DONE flag, set while transfer finished, CITER value exhausted.
kEDMA_ErrorFlag eDMA error flag, an error occurred in a transfer
kEDMA_InterruptFlag eDMA interrupt flag, set while an interrupt occurred of this channel

16.6.6

enum _edma_error_status_flags

Enumerator
kEDMA_DestinationBusErrorFlag Bus error on destination address.
kEDMA_SourceBusErrorFlag Bus error on the source address.
kEDMA_ScatterGatherErrorFlag Error on the Scatter/Gather address, not 32byte aligned.
kEDMA_NbytesErrorFlag NBYTES/CITER configuration error.
kEDMA_DestinationOffsetErrorFlag Destination offset not aligned with destination size.
kEDMA_DestinationAddressErrorFlag Destination address not aligned with destination size.
kEDMA_SourceOffsetErrorFlag Source offset not aligned with source size.
kEDMA_SourceAddressErrorFlag Source address not aligned with source size.
kEDMA_ErrorChannelFlag Error channel number of the cancelled channel number.
kEDMA_ChannelPriorityErrorFlag Channel priority is not unique.
kEDMA_TransferCanceledFlag Transfer cancelled.
kEDMA_ValidFlag No error occurred, this bit will be 0, otherwise be 1.

16.6.7

enum edma_interrupt_enable_t

Enumerator
kEDMA_ErrorInterruptEnable Enable interrupt while channel error occurs.
kEDMA_MajorInterruptEnable Enable interrupt while major count exhausted.
kEDMA_HalfInterruptEnable Enable interrupt while major count to half value.

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16.6.8

enum edma_transfer_type_t

Enumerator
kEDMA_MemoryToMemory Transfer from memory to memory.
kEDMA_PeripheralToMemory Transfer from peripheral to memory.
kEDMA_MemoryToPeripheral Transfer from memory to peripheral.

16.6.9

enum _edma_transfer_status

Enumerator
kStatus_EDMA_QueueFull TCD queue is full.
kStatus_EDMA_Busy Channel is busy and can’t handle the transfer request.

16.7

Function Documentation

16.7.1

void EDMA_Init ( DMA_Type ∗ base, const edma_config_t ∗ config )

This function ungates the eDMA clock and configure eDMA peripheral according to the configuration
structure.
Parameters
base
config

eDMA peripheral base address.
Pointer to configuration structure, see "edma_config_t".

Note
This function enable the minor loop map feature.

16.7.2

void EDMA_Deinit ( DMA_Type ∗ base )

This function gates the eDMA clock.
Parameters
base

16.7.3

eDMA peripheral base address.

void EDMA_GetDefaultConfig ( edma_config_t ∗ config )

This function sets the configuration structure to a default value. The default configuration is set to the
following value:
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config.enableContinuousLinkMode = false;
config.enableHaltOnError = true;
config.enableRoundRobinArbitration = false;
config.enableDebugMode = false;

Parameters
config

16.7.4

Pointer to eDMA configuration structure.

void EDMA_ResetChannel ( DMA_Type ∗ base, uint32_t channel )

This function sets TCD registers for this channel to default value.
Parameters
base
channel

eDMA peripheral base address.
eDMA channel number.

Note
This function must not be called while the channel transfer is on-going, or it will case unpredicated
results.
This function will enable auto stop request feature.

16.7.5

void EDMA_SetTransferConfig ( DMA_Type ∗ base, uint32_t channel, const
edma_transfer_config_t ∗ config, edma_tcd_t ∗ nextTcd )

This function configure the transfer attribute, including source address, destination address, transfer size,
address offset, and so on. It also configures the scatter gather feature if the user supplies the TCD address.
Example:
edma_transfer_t config;
edma_tcd_t tcd;
config.srcAddr = ..;
config.destAddr = ..;
...
EDMA_SetTransferConfig(DMA0, channel, &config, &stcd);

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Function Documentation
Parameters
base
channel
config
nextTcd

eDMA peripheral base address.
eDMA channel number.
Pointer to eDMA transfer configuration structure.
Point to TCD structure. It can be NULL if user do not want to enable scatter/gather
feature.

Note
If nextTcd is not NULL, it means scatter gather feature will be enabled. And DREQ bit will be
cleared in the previous transfer configuration which will be set in eDMA_ResetChannel.

16.7.6

void EDMA_SetMinorOffsetConfig ( DMA_Type ∗ base, uint32_t channel,
const edma_minor_offset_config_t ∗ config )

Minor offset means signed-extended value added to source address or destination address after each minor
loop.
Parameters
base
channel
config

16.7.7

eDMA peripheral base address.
eDMA channel number.
Pointer to Minor offset configuration structure.

static void EDMA_SetChannelPreemptionConfig ( DMA_Type ∗ base,
uint32_t channel, const edma_channel_Preemption_config_t ∗ config )
[inline], [static]

This function configures the channel preemption attribute and the priority of the channel.
Parameters
base

eDMA peripheral base address.

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channel
config

16.7.8

eDMA channel number
Pointer to channel preemption configuration structure.

void EDMA_SetChannelLink ( DMA_Type ∗ base, uint32_t channel,
edma_channel_link_type_t type, uint32_t linkedChannel )

This function configures minor link or major link mode. The minor link means that the channel link is
triggered every time CITER decreases by 1. The major link means that the channel link is triggered when
the CITER is exhausted.
Parameters
base
channel
type

linkedChannel

eDMA peripheral base address.
eDMA channel number.
Channel link type, it can be one of:
• kEDMA_LinkNone
• kEDMA_MinorLink
• kEDMA_MajorLink
The linked channel number.

Note
User should ensure that DONE flag is cleared before call this interface, or the configuration will be
invalid.

16.7.9

void EDMA_SetBandWidth ( DMA_Type ∗ base, uint32_t channel,
edma_bandwidth_t bandWidth )

In general, because the eDMA processes the minor loop, it continuously generates read/write sequences
until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each
read/write access to control the bus request bandwidth seen by the crossbar switch.
Parameters

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base
channel
bandWidth

eDMA peripheral base address.
eDMA channel number.
Bandwidth setting, it can be one of:
• kEDMABandwidthStallNone
• kEDMABandwidthStall4Cycle
• kEDMABandwidthStall8Cycle

void EDMA_SetModulo ( DMA_Type ∗ base, uint32_t channel,
edma_modulo_t srcModulo, edma_modulo_t destModulo )

16.7.10

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR
+ DOFF) calculation is performed or the original register value. It provides the ability to implement a
circular data queue easily.
Parameters
base
channel
srcModulo
destModulo

eDMA peripheral base address.
eDMA channel number.
Source modulo value.
Destination modulo value.

static void EDMA_EnableAutoStopRequest ( DMA_Type ∗ base, uint32_t
channel, bool enable ) [inline], [static]

16.7.11

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.
Parameters
base
channel
enable

16.7.12

eDMA peripheral base address.
eDMA channel number.
The command for enable (true) or disable (false).

void EDMA_EnableChannelInterrupts ( DMA_Type ∗ base, uint32_t
channel, uint32_t mask )

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Parameters
base
channel
mask

eDMA peripheral base address.
eDMA channel number.
The mask of interrupt source to be set. User need to use the defined edma_interrupt_enable_t type.

void EDMA_DisableChannelInterrupts ( DMA_Type ∗ base, uint32_t
channel, uint32_t mask )

16.7.13

Parameters
base
channel
mask

16.7.14

eDMA peripheral base address.
eDMA channel number.
The mask of interrupt source to be set. Use the defined edma_interrupt_enable_t type.

void EDMA_TcdReset ( edma_tcd_t ∗ tcd )

This function sets all fields for this TCD structure to default value.
Parameters
tcd

Pointer to the TCD structure.

Note
This function will enable auto stop request feature.

16.7.15

void EDMA_TcdSetTransferConfig ( edma_tcd_t ∗ tcd, const
edma_transfer_config_t ∗ config, edma_tcd_t ∗ nextTcd )

TCD is a transfer control descriptor. The content of the TCD is the same as hardware TCD registers. STCD is used in scatter-gather mode. This function configures the TCD transfer attribute, including source
address, destination address, transfer size, address offset, and so on. It also configures the scatter gather
feature if the user supplies the next TCD address. Example:
edma_transfer_t config = {
...
}
edma_tcd_t tcd __aligned(32);

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edma_tcd_t nextTcd __aligned(32);
EDMA_TcdSetTransferConfig(&tcd, &config, &nextTcd);

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Parameters
tcd
config
nextTcd

Pointer to the TCD structure.
Pointer to eDMA transfer configuration structure.
Pointer to the next TCD structure. It can be NULL if user do not want to enable
scatter/gather feature.

Note
TCD address should be 32 bytes aligned, or it will cause eDMA error.
If nextTcd is not NULL, it means scatter gather feature will be enabled. And DREQ bit will be
cleared in the previous transfer configuration which will be set in EDMA_TcdReset.

void EDMA_TcdSetMinorOffsetConfig ( edma_tcd_t ∗ tcd, const
edma_minor_offset_config_t ∗ config )

16.7.16

Minor offset is a signed-extended value added to the source address or destination address after each minor
loop.
Parameters
tcd
config

16.7.17

Point to the TCD structure.
Pointer to Minor offset configuration structure.

void EDMA_TcdSetChannelLink ( edma_tcd_t ∗ tcd,
edma_channel_link_type_t type, uint32_t linkedChannel )

This function configures either a minor link or a major link. The minor link means the channel link is
triggered every time CITER decreases by 1. The major link means that the channel link is triggered when
the CITER is exhausted.
Note
User should ensure that DONE flag is cleared before call this interface, or the configuration will be
invalid.

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Function Documentation
Parameters
tcd
type

linkedChannel

16.7.18

Point to the TCD structure.
Channel link type, it can be one of:
• kEDMA_LinkNone
• kEDMA_MinorLink
• kEDMA_MajorLink
The linked channel number.

static void EDMA_TcdSetBandWidth ( edma_tcd_t ∗ tcd,
edma_bandwidth_t bandWidth ) [inline], [static]

In general, because the eDMA processes the minor loop, it continuously generates read/write sequences
until the minor count is exhausted. Bandwidth forces the eDMA to stall after the completion of each
read/write access to control the bus request bandwidth seen by the crossbar switch.
Parameters
tcd
bandWidth

16.7.19

Point to the TCD structure.
Bandwidth setting, it can be one of:
• kEDMABandwidthStallNone
• kEDMABandwidthStall4Cycle
• kEDMABandwidthStall8Cycle

void EDMA_TcdSetModulo ( edma_tcd_t ∗ tcd, edma_modulo_t
srcModulo, edma_modulo_t destModulo )

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR
+ DOFF) calculation is performed or the original register value. It provides the ability to implement a
circular data queue easily.
Parameters
tcd

Point to the TCD structure.

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srcModulo
destModulo

Source modulo value.
Destination modulo value.

static void EDMA_TcdEnableAutoStopRequest ( edma_tcd_t ∗ tcd, bool
enable ) [inline], [static]

16.7.20

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.
Parameters
tcd
enable

16.7.21

Point to the TCD structure.
The command for enable(ture) or disable(false).

void EDMA_TcdEnableInterrupts ( edma_tcd_t ∗ tcd, uint32_t mask )

Parameters
tcd
mask

16.7.22

Point to the TCD structure.
The mask of interrupt source to be set. User need to use the defined edma_interrupt_enable_t type.

void EDMA_TcdDisableInterrupts ( edma_tcd_t ∗ tcd, uint32_t mask )

Parameters
tcd
mask

16.7.23

Point to the TCD structure.
The mask of interrupt source to be set. User need to use the defined edma_interrupt_enable_t type.

static void EDMA_EnableChannelRequest ( DMA_Type ∗ base, uint32_t
channel ) [inline], [static]

This function enables the hardware channel request.

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Function Documentation
Parameters
base
channel

eDMA peripheral base address.
eDMA channel number.

static void EDMA_DisableChannelRequest ( DMA_Type ∗ base, uint32_t
channel ) [inline], [static]

16.7.24

This function disables the hardware channel request.
Parameters
base
channel

eDMA peripheral base address.
eDMA channel number.

static void EDMA_TriggerChannelStart ( DMA_Type ∗ base, uint32_t
channel ) [inline], [static]

16.7.25

This function starts a minor loop transfer.
Parameters
base
channel

16.7.26

eDMA peripheral base address.
eDMA channel number.

uint32_t EDMA_GetRemainingBytes ( DMA_Type ∗ base, uint32_t channel
)

This function checks the TCD (Task Control Descriptor) status for a specified eDMA channel and returns
the the number of bytes that have not finished.
Parameters
base

eDMA peripheral base address.

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channel

eDMA channel number.

Returns
Bytes have not been transferred yet for the current TCD.
Note
This function can only be used to get unfinished bytes of transfer without the next TCD, or it might
be inaccuracy.

static uint32_t EDMA_GetErrorStatusFlags ( DMA_Type ∗ base )
[inline], [static]

16.7.27

Parameters
base

eDMA peripheral base address.

Returns
The mask of error status flags. User need to use the _edma_error_status_flags type to decode the
return variables.

uint32_t EDMA_GetChannelStatusFlags ( DMA_Type ∗ base, uint32_t
channel )

16.7.28

Parameters
base
channel

eDMA peripheral base address.
eDMA channel number.

Returns
The mask of channel status flags. User need to use the _edma_channel_status_flags type to decode
the return variables.

16.7.29

void EDMA_ClearChannelStatusFlags ( DMA_Type ∗ base, uint32_t
channel, uint32_t mask )

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Function Documentation
Parameters
base
channel
mask

eDMA peripheral base address.
eDMA channel number.
The mask of channel status to be cleared. User need to use the defined _edma_channel_status_flags type.

void EDMA_CreateHandle ( edma_handle_t ∗ handle, DMA_Type ∗ base,
uint32_t channel )

16.7.30

This function is called if using transaction API for eDMA. This function initializes the internal state of
eDMA handle.
Parameters
handle
base
channel

eDMA handle pointer. The eDMA handle stores callback function and parameters.
eDMA peripheral base address.
eDMA channel number.

void EDMA_InstallTCDMemory ( edma_handle_t ∗ handle, edma_tcd_t ∗
tcdPool, uint32_t tcdSize )

16.7.31

This function is called after the EDMA_CreateHandle to use scatter/gather feature.
Parameters
handle

16.7.32

eDMA handle pointer.

tcdPool

Memory pool to store TCDs. It must be 32 bytes aligned.

tcdSize

The number of TCD slots.

void EDMA_SetCallback ( edma_handle_t ∗ handle, edma_callback
callback, void ∗ userData )

This callback is called in eDMA IRQ handler. Use the callback to do something after the current major
loop transfer completes.

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Parameters
handle

eDMA handle pointer.

callback

eDMA callback function pointer.

userData

Parameter for callback function.

void EDMA_PrepareTransfer ( edma_transfer_config_t ∗ config, void ∗
srcAddr, uint32_t srcWidth, void ∗ destAddr, uint32_t destWidth, uint32_t
bytesEachRequest, uint32_t transferBytes, edma_transfer_type_t type )

16.7.33

This function prepares the transfer configuration structure according to the user input.
Parameters
config
srcAddr

The user configuration structure of type edma_transfer_t.
eDMA transfer source address.

srcWidth

eDMA transfer source address width(bytes).

destAddr

eDMA transfer destination address.

destWidth
bytesEachRequest
transferBytes
type

eDMA transfer destination address width(bytes).
eDMA transfer bytes per channel request.
eDMA transfer bytes to be transferred.
eDMA transfer type.

Note
The data address and the data width must be consistent. For example, if the SRC is 4 bytes, so the
source address must be 4 bytes aligned, or it shall result in source address error(SAE).

16.7.34

status_t EDMA_SubmitTransfer ( edma_handle_t ∗ handle, const
edma_transfer_config_t ∗ config )

This function submits the eDMA transfer request according to the transfer configuration structure. If the
user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and
enables scatter/gather feature to process it in the next time.

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Function Documentation
Parameters
handle

eDMA handle pointer.

config

Pointer to eDMA transfer configuration structure.

Return values
kStatus_EDMA_Success

It means submit transfer request succeed.

kStatus_EDMA_QueueFull

It means TCD queue is full. Submit transfer request is not allowed.

kStatus_EDMA_Busy

It means the given channel is busy, need to submit request later.

void EDMA_StartTransfer ( edma_handle_t ∗ handle )

16.7.35

This function enables the channel request. User can call this function after submitting the transfer request
or before submitting the transfer request.
Parameters
handle

eDMA handle pointer.

void EDMA_StopTransfer ( edma_handle_t ∗ handle )

16.7.36

This function disables the channel request to pause the transfer. User can call EDMA_StartTransfer()
again to resume the transfer.
Parameters
handle

16.7.37

eDMA handle pointer.

void EDMA_AbortTransfer ( edma_handle_t ∗ handle )

This function disables the channel request and clear transfer status bits. User can submit another transfer
after calling this API.

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Parameters
handle

DMA handle pointer.

void EDMA_HandleIRQ ( edma_handle_t ∗ handle )

16.7.38

This function clears the channel major interrupt flag and call the callback function if it is not NULL.
Parameters
handle

eDMA handle pointer.

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Chapter 17
ENET: Ethernet MAC Driver
17.1

Overview

The KSDK provides a peripheral driver for the 10/100 Mbps Ethernet MAC (ENET) module of Kinetis
devices.
The MII interface is the interface connected with MAC and PHY. the Serial management interface - MII
management interface should be set firstly before any access to external PHY chip register. So call ENET_SetSMI() to initialize MII management interface. Use ENET_StartSMIRead(), ENET_StartSMIWrite()
and ENET_ReadSMIData() to read/write phy registers. This function group sets up the MII and serial
management SMI interface, gets data from the SMI interface, and starts the SMI read and write command.
Use ENET_SetMII() to configure the MII before successfully get the data from the external PHY.
This group sets/gets the ENET mac address, setting the multicast group address filter. ENET_AddMulticastGroup() should be called to add the ENET MAC to multicast group. It is important for 1588
feature to receive the PTP message.
For ENET receive side, ENET_GetRxFrameSize() must be called firstly used to get the received data size,
then call ENET_ReadFrame() to get the received data. If the received error happen, call ENET_GetRxErrBeforeReadFrame() after ENET_GetRxFrameSize() and before ENET_ReadFrame() to get the detail
error informations.
For ENET transmit side, simply call ENET_SendFrame() to send the data out. The transmit data error
information only accessible for 1588 enhanced buffer descriptor mode. So when ENET_ENHANCEDBUFFERDESCRIPTOR_MODE is defined the ENET_GetTxErrAfterSendFrame() can be used to get the
detail transmit error information. The transmit error information only be updated by uDMA after the
data is transmit. So ENET_GetTxErrAfterSendFrame() is recommended to be called on transmit interrupt
handler.
This function group configures the PTP 1588 feature, starts/stops/gets/sets/adjusts the PTP IEEE 1588
timer, gets the receive/transmit frame timestamp, and PTP IEEE 1588 timer channel feature setting.
ENET_Ptp1588Configure() must be called when ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
is defined and the 1588 feature is required. The ENET_GetRxFrameTime() and ENET_GetTxFrameTime() are called by PTP stack to get the timestamp captured by ENET driver.

17.2
17.2.1

Typical use case
ENET Initialization, receive, and transmit operation

For ENET_ENHANCEDBUFFERDESCRIPTOR_MODE not defined use case, use the legacy type buffer
descriptor transmit/receive the frame:
enet_config_t config;

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Typical use case
uint32_t length = 0;
uint32_t sysClock;
uint32_t phyAddr = 0;
bool link = false;
phy_speed_t speed;
phy_duplex_t duplex;
enet_status_t result;
enet_data_error_stats_t eErrorStatic;
// Prepares the buffer configuration.
enet_buffer_config_t buffCfg =
{
ENET_RXBD_NUM,
ENET_TXBD_NUM,
ENET_BuffSizeAlign(ENET_RXBUFF_SIZE),
ENET_BuffSizeAlign(ENET_TXBUFF_SIZE),
&RxBuffDescrip[0], // Prepare buffers
&TxBuffDescrip[0], // Prepare buffers
&RxDataBuff[0][0], // Prepare buffers
&TxDataBuff[0][0], // Prepare buffers
};
sysClock = CLOCK_GetFreq(kCLOCK_CoreSysClk);
// Gets the default configuration.
ENET_GetDefaultConfig(&config);
PHY_Init(EXAMPLE_ENET, 0, sysClock);
// Changes the link status to PHY auto-negotiated link status.
PHY_GetLinkStatus(EXAMPLE_ENET, phyAddr, &link);
if (link)
{
PHY_GetLinkSpeedDuplex(EXAMPLE_ENET, phyAddr, &speed, &duplex);
config.miiSpeed = (enet_mii_speed_t)speed;
config.miiDuplex = (enet_mii_duplex_t)duplex;
}
ENET_Init(EXAMPLE_ENET, &handle, &config, &buffCfg, &macAddr[0], sysClock);
ENET_ActiveRead(EXAMPLE_ENET);
while (1)
{
// Gets the frame size.
result = ENET_GetRxFrameSize(&handle, &length);
// Calls the ENET_ReadFrame when there is a received frame.
if (length != 0)
{
// Receives a valid frame and delivers the receive buffer with the size equal to length.
uint8_t *data = (uint8_t *)malloc(length);
ENET_ReadFrame(EXAMPLE_ENET, &handle, data, length);
// Delivers the data to the upper layer.
.........
free(data);
}
else if (result == kStatus_ENET_RxFrameErr)
{
// Updates the received buffer when an error occurs.
ENET_GetRxErrBeforeReadFrame(&handle, &eErrStatic);
// Updates the receive buffer.
ENET_ReadFrame(EXAMPLE_ENET, &handle, NULL, 0);
}
// Sends a multicast frame when the PHY is linked up.
if(kStatus_Success == PHY_GetLinkStatus(EXAMPLE_ENET, phyAddr, &link))
{
if(link)
{
ENET_SendFrame(EXAMPLE_ENET, &handle, &frame[0], ENET_DATA_LENGTH);
}
}
}

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Typical use case
For ENET_ENHANCEDBUFFERDESCRIPTOR_MODE defined case, add the PTP IEEE 1588 configuration to enable the PTP IEEE 1588 feature. The initialization occurs as follows:
enet_config_t config;
uint32_t length = 0;
uint32_t sysClock;
uint32_t phyAddr = 0;
bool link = false;
phy_speed_t speed;
phy_duplex_t duplex;
enet_status_t result;
enet_data_err_stats_t eErrStatic;
enet_buffer_config_t buffCfg =
{
ENET_RXBD_NUM,
ENET_TXBD_NUM,
ENET_BuffSizeAlign(ENET_RXBUFF_SIZE),
ENET_BuffSizeAlign(ENET_TXBUFF_SIZE),
&RxBuffDescrip[0],
&TxBuffDescrip[0],
&RxDataBuff[0][0],
&TxDataBuff[0][0],
};
sysClock = CLOCK_GetFreq(kCLOCK_CoreSysClk);
// Sets the PTP 1588 source.
CLOCK_SetEnetTime0Clock(2);
ptpClock = CLOCK_GetFreq(kCLOCK_Osc0ErClk);
// Prepares the PTP configuration.
enet_ptp_config_t ptpConfig =
{
ENET_RXBD_NUM,
ENET_TXBD_NUM,
&g_rxPtpTsBuff[0],
&g_txPtpTsBuff[0],
kENET_PtpTimerChannel1,
ptpClock,
};
// Gets the default configuration.
ENET_GetDefaultConfig(&config);
PHY_Init(EXAMPLE_ENET, 0, sysClock);
// Changes the link status to PHY auto-negotiated link status.
PHY_GetLinkStatus(EXAMPLE_ENET, phyAddr, &link);
if (link)
{
PHY_GetLinkSpeedDuplex(EXAMPLE_ENET, phyAddr, &speed, &duplex);
config.miiSpeed = (enet_mii_speed_t)speed;
config.miiDuplex = (enet_mii_duplex_t)duplex;
}
ENET_Init(EXAMPLE_ENET, &handle, &config, &buffCfg, &macAddr[0], sysClock);
// Configures the PTP 1588 feature.
ENET_Ptp1588Configure(EXAMPLE_ENET, &handle, &ptpConfig);
// Adds the device to the PTP multicast group.
ENET_AddMulticastGroup(EXAMPLE_ENET, &mGAddr[0]);
ENET_ActiveRead(EXAMPLE_ENET);

Files
• file fsl_enet.h
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Typical use case

Data Structures
• struct enet_rx_bd_struct_t
Defines the receive buffer descriptor structure for the little endian system. More...

• struct enet_tx_bd_struct_t
Defines the enhanced transmit buffer descriptor structure for the little endian system. More...

• struct enet_data_error_stats_t
Defines the ENET data error statistic structure. More...

• struct enet_buffer_config_t
Defines the receive buffer descriptor configure structure. More...

• struct enet_config_t
Defines the basic configuration structure for the ENET device. More...

• struct enet_handle_t
Defines the ENET handler structure. More...

Macros
• #define ENET_BUFFDESCRIPTOR_RX_ERR_MASK
Defines the receive error status flag mask.

• #define ENET_FIFO_MIN_RX_FULL 5U
ENET minimum receive FIFO full.

• #define ENET_RX_MIN_BUFFERSIZE 256U
ENET minimum buffer size.

• #define ENET_BUFF_ALIGNMENT 16U
Ethernet buffer alignment.

• #define ENET_PHY_MAXADDRESS (ENET_MMFR_PA_MASK >> ENET_MMFR_PA_SHIFT)
Defines the PHY address scope for the ENET.

Typedefs
• typedef void(∗ enet_callback_t )(ENET_Type ∗base, enet_handle_t ∗handle, enet_event_t event,
void ∗userData)
ENET callback function.

Enumerations
• enum _enet_status {
kStatus_ENET_RxFrameError = MAKE_STATUS(kStatusGroup_ENET, 0U),
kStatus_ENET_RxFrameFail = MAKE_STATUS(kStatusGroup_ENET, 1U),
kStatus_ENET_RxFrameEmpty = MAKE_STATUS(kStatusGroup_ENET, 2U),
kStatus_ENET_TxFrameBusy,
kStatus_ENET_TxFrameFail = MAKE_STATUS(kStatusGroup_ENET, 4U) }
Defines the status return codes for transaction.

• enum enet_mii_mode_t {
kENET_MiiMode = 0U,
kENET_RmiiMode }
Defines the RMII or MII mode for data interface between the MAC and the PHY.

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• enum enet_mii_speed_t {
kENET_MiiSpeed10M = 0U,
kENET_MiiSpeed100M }
Defines the 10 Mbps or 100 Mbps speed for the MII data interface.

• enum enet_mii_duplex_t {
kENET_MiiHalfDuplex = 0U,
kENET_MiiFullDuplex }
Defines the half or full duplex for the MII data interface.

• enum enet_mii_write_t {
kENET_MiiWriteNoCompliant = 0U,
kENET_MiiWriteValidFrame }
Defines the write operation for the MII management frame.

• enum enet_mii_read_t {
kENET_MiiReadValidFrame = 2U,
kENET_MiiReadNoCompliant = 3U }
Defines the read operation for the MII management frame.

• enum enet_special_control_flag_t {
kENET_ControlFlowControlEnable = 0x0001U,
kENET_ControlRxPayloadCheckEnable = 0x0002U,
kENET_ControlRxPadRemoveEnable = 0x0004U,
kENET_ControlRxBroadCastRejectEnable = 0x0008U,
kENET_ControlMacAddrInsert = 0x0010U,
kENET_ControlStoreAndFwdDisable = 0x0020U,
kENET_ControlSMIPreambleDisable = 0x0040U,
kENET_ControlPromiscuousEnable = 0x0080U,
kENET_ControlMIILoopEnable = 0x0100U,
kENET_ControlVLANTagEnable = 0x0200U }
Defines a special configuration for ENET MAC controller.

• enum enet_interrupt_enable_t {
kENET_BabrInterrupt = ENET_EIR_BABR_MASK,
kENET_BabtInterrupt = ENET_EIR_BABT_MASK,
kENET_GraceStopInterrupt = ENET_EIR_GRA_MASK,
kENET_TxFrameInterrupt = ENET_EIR_TXF_MASK,
kENET_TxByteInterrupt = ENET_EIR_TXB_MASK,
kENET_RxFrameInterrupt = ENET_EIR_RXF_MASK,
kENET_RxByteInterrupt = ENET_EIR_RXB_MASK,
kENET_MiiInterrupt = ENET_EIR_MII_MASK,
kENET_EBusERInterrupt = ENET_EIR_EBERR_MASK,
kENET_LateCollisionInterrupt = ENET_EIR_LC_MASK,
kENET_RetryLimitInterrupt = ENET_EIR_RL_MASK,
kENET_UnderrunInterrupt = ENET_EIR_UN_MASK,
kENET_PayloadRxInterrupt = ENET_EIR_PLR_MASK,
kENET_WakeupInterrupt = ENET_EIR_WAKEUP_MASK }
List of interrupts supported by the peripheral.

• enum enet_event_t {

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kENET_RxEvent,
kENET_TxEvent,
kENET_ErrEvent,
kENET_WakeUpEvent }
Defines the common interrupt event for callback use.

• enum enet_tx_accelerator_t {
kENET_TxAccelIsShift16Enabled = ENET_TACC_SHIFT16_MASK,
kENET_TxAccelIpCheckEnabled = ENET_TACC_IPCHK_MASK,
kENET_TxAccelProtoCheckEnabled = ENET_TACC_PROCHK_MASK }
Defines the transmit accelerator configuration.

• enum enet_rx_accelerator_t {
kENET_RxAccelPadRemoveEnabled = ENET_RACC_PADREM_MASK,
kENET_RxAccelIpCheckEnabled = ENET_RACC_IPDIS_MASK,
kENET_RxAccelProtoCheckEnabled = ENET_RACC_PRODIS_MASK,
kENET_RxAccelMacCheckEnabled = ENET_RACC_LINEDIS_MASK,
kENET_RxAccelisShift16Enabled = ENET_RACC_SHIFT16_MASK }
Defines the receive accelerator configuration.

Driver version
• #define FSL_ENET_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
Defines the driver version.

Control and status region bit masks of the receive buffer descriptor.
• #define ENET_BUFFDESCRIPTOR_RX_EMPTY_MASK 0x8000U
Empty bit mask.

• #define ENET_BUFFDESCRIPTOR_RX_SOFTOWNER1_MASK 0x4000U
Software owner one mask.

• #define ENET_BUFFDESCRIPTOR_RX_WRAP_MASK 0x2000U
Next buffer descriptor is the start address.

• #define ENET_BUFFDESCRIPTOR_RX_SOFTOWNER2_Mask 0x1000U
Software owner two mask.

• #define ENET_BUFFDESCRIPTOR_RX_LAST_MASK 0x0800U
Last BD of the frame mask.

• #define ENET_BUFFDESCRIPTOR_RX_MISS_MASK 0x0100U
Received because of the promiscuous mode.

• #define ENET_BUFFDESCRIPTOR_RX_BROADCAST_MASK 0x0080U
Broadcast packet mask.

• #define ENET_BUFFDESCRIPTOR_RX_MULTICAST_MASK 0x0040U
Multicast packet mask.

• #define ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK 0x0020U
Length violation mask.

• #define ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK 0x0010U
Non-octet aligned frame mask.

• #define ENET_BUFFDESCRIPTOR_RX_CRC_MASK 0x0004U
CRC error mask.

• #define ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK 0x0002U
FIFO overrun mask.

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• #define ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK 0x0001U
Frame is truncated mask.

Control and status bit masks of the transmit buffer descriptor.
• #define ENET_BUFFDESCRIPTOR_TX_READY_MASK 0x8000U
Ready bit mask.

• #define ENET_BUFFDESCRIPTOR_TX_SOFTOWENER1_MASK 0x4000U
Software owner one mask.

• #define ENET_BUFFDESCRIPTOR_TX_WRAP_MASK 0x2000U
Wrap buffer descriptor mask.

• #define ENET_BUFFDESCRIPTOR_TX_SOFTOWENER2_MASK 0x1000U
Software owner two mask.

• #define ENET_BUFFDESCRIPTOR_TX_LAST_MASK 0x0800U
Last BD of the frame mask.

• #define ENET_BUFFDESCRIPTOR_TX_TRANMITCRC_MASK 0x0400U
Transmit CRC mask.

Defines the maximum Ethernet frame size.
• #define ENET_FRAME_MAX_FRAMELEN 1518U
Maximum Ethernet frame size.

• #define ENET_FRAME_MAX_VALNFRAMELEN 1522U
Maximum VLAN frame size.

Initialization and De-initialization
• void ENET_GetDefaultConfig (enet_config_t ∗config)
Gets the ENET default configuration structure.

• void ENET_Init (ENET_Type ∗base, enet_handle_t ∗handle, const enet_config_t ∗config, const
enet_buffer_config_t ∗bufferConfig, uint8_t ∗macAddr, uint32_t srcClock_Hz)
Initializes the ENET module.

• void ENET_Deinit (ENET_Type ∗base)
Deinitializes the ENET module.

• static void ENET_Reset (ENET_Type ∗base)
Resets the ENET module.

MII interface operation
• void ENET_SetMII (ENET_Type ∗base, enet_mii_speed_t speed, enet_mii_duplex_t duplex)
Sets the ENET MII speed and duplex.

• void ENET_SetSMI (ENET_Type ∗base, uint32_t srcClock_Hz, bool isPreambleDisabled)
Sets the ENET SMI(serial management interface)- MII management interface.

• static bool ENET_GetSMI (ENET_Type ∗base)
Gets the ENET SMI- MII management interface configuration.

• static uint32_t ENET_ReadSMIData (ENET_Type ∗base)
Reads data from the PHY register through SMI interface.

• void ENET_StartSMIRead (ENET_Type ∗base, uint32_t phyAddr, uint32_t phyReg, enet_mii_read_t operation)
Starts an SMI (Serial Management Interface) read command.

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• void ENET_StartSMIWrite (ENET_Type ∗base, uint32_t phyAddr, uint32_t phyReg, enet_mii_write_t operation, uint32_t data)
Starts a SMI write command.

MAC Address Filter
• void ENET_SetMacAddr (ENET_Type ∗base, uint8_t ∗macAddr)
Sets the ENET module Mac address.

• void ENET_GetMacAddr (ENET_Type ∗base, uint8_t ∗macAddr)
Gets the ENET module Mac address.

• void ENET_AddMulticastGroup (ENET_Type ∗base, uint8_t ∗address)
Adds the ENET device to a multicast group.

• void ENET_LeaveMulticastGroup (ENET_Type ∗base, uint8_t ∗address)
Moves the ENET device from a multicast group.

Other basic operation
• static void ENET_ActiveRead (ENET_Type ∗base)
Activates ENET read or receive.

• static void ENET_EnableSleepMode (ENET_Type ∗base, bool enable)
Enables/disables the MAC to enter sleep mode.

• static void ENET_GetAccelFunction (ENET_Type ∗base, uint32_t ∗txAccelOption, uint32_t ∗rxAccelOption)
Gets ENET transmit and receive accelerator functions from MAC controller.

Interrupts.
• static void ENET_EnableInterrupts (ENET_Type ∗base, uint32_t mask)
Enables the ENET interrupt.

• static void ENET_DisableInterrupts (ENET_Type ∗base, uint32_t mask)
Disables the ENET interrupt.

• static uint32_t ENET_GetInterruptStatus (ENET_Type ∗base)
Gets the ENET interrupt status flag.

• static void ENET_ClearInterruptStatus (ENET_Type ∗base, uint32_t mask)
Clears the ENET interrupt events status flag.

Transactional operation
• void ENET_SetCallback (enet_handle_t ∗handle, enet_callback_t callback, void ∗userData)
Set the callback function.

• void ENET_GetRxErrBeforeReadFrame (enet_handle_t ∗handle, enet_data_error_stats_t ∗eErrorStatic)
Gets the ENET the error statistics of a received frame.

• status_t ENET_GetRxFrameSize (enet_handle_t ∗handle, uint32_t ∗length)
Gets the size of the read frame.

• status_t ENET_ReadFrame (ENET_Type ∗base, enet_handle_t ∗handle, uint8_t ∗data, uint32_t
length)
Reads a frame from the ENET device.

• status_t ENET_SendFrame (ENET_Type ∗base, enet_handle_t ∗handle, uint8_t ∗data, uint32_t
length)
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Transmits an ENET frame.

• void ENET_TransmitIRQHandler (ENET_Type ∗base, enet_handle_t ∗handle)
The transmit IRQ handler.

• void ENET_ReceiveIRQHandler (ENET_Type ∗base, enet_handle_t ∗handle)
The receive IRQ handler.

• void ENET_ErrorIRQHandler (ENET_Type ∗base, enet_handle_t ∗handle)
The error IRQ handler.

17.3
17.3.1

Data Structure Documentation
struct enet_rx_bd_struct_t

Data Fields
• uint16_t length
Buffer descriptor data length.

• uint16_t control
Buffer descriptor control and status.

• uint8_t ∗ buffer
Data buffer pointer.
17.3.1.0.0.36

Field Documentation

17.3.1.0.0.36.1

uint16_t enet_rx_bd_struct_t::length

17.3.1.0.0.36.2

uint16_t enet_rx_bd_struct_t::control

17.3.1.0.0.36.3

uint8_t∗ enet_rx_bd_struct_t::buffer

17.3.2

struct enet_tx_bd_struct_t

Data Fields
• uint16_t length
Buffer descriptor data length.

• uint16_t control
Buffer descriptor control and status.

• uint8_t ∗ buffer
Data buffer pointer.

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17.3.2.0.0.37

Field Documentation

17.3.2.0.0.37.1

uint16_t enet_tx_bd_struct_t::length

17.3.2.0.0.37.2

uint16_t enet_tx_bd_struct_t::control

17.3.2.0.0.37.3

uint8_t∗ enet_tx_bd_struct_t::buffer

17.3.3

struct enet_data_error_stats_t

Data Fields
• uint32_t statsRxLenGreaterErr
Receive length greater than RCR[MAX_FL].

• uint32_t statsRxAlignErr
Receive non-octet alignment/.

• uint32_t statsRxFcsErr
Receive CRC error.

• uint32_t statsRxOverRunErr
Receive over run.

• uint32_t statsRxTruncateErr
Receive truncate.
17.3.3.0.0.38

Field Documentation

17.3.3.0.0.38.1

uint32_t enet_data_error_stats_t::statsRxLenGreaterErr

17.3.3.0.0.38.2

uint32_t enet_data_error_stats_t::statsRxFcsErr

17.3.3.0.0.38.3

uint32_t enet_data_error_stats_t::statsRxOverRunErr

17.3.3.0.0.38.4

uint32_t enet_data_error_stats_t::statsRxTruncateErr

17.3.4

struct enet_buffer_config_t

Note: For the internal DMA requirements, the buffers have a corresponding alignment requirement:
1. The aligned receive and transmit buffer size must be evenly divisible by 16.
2. The aligned transmit and receive buffer descriptor start address must be at least 64 bit aligned.
However, it’s recommended to be evenly divisible by 16.
3. The aligned transmit and receive buffer start address must be evenly divisible by 16. Receive buffers
should be continuous with the total size equal to "rxBdNumber ∗ rxBuffSizeAlign". Transmit buffers
should be continuous with the total size equal to "txBdNumber ∗ txBuffSizeAlign".

Data Fields
• uint16_t rxBdNumber
Receive buffer descriptor number.

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• uint16_t txBdNumber
Transmit buffer descriptor number.

• uint32_t rxBuffSizeAlign
Aligned receive data buffer size.

• uint32_t txBuffSizeAlign
Aligned transmit data buffer size.

• volatile enet_rx_bd_struct_t ∗ rxBdStartAddrAlign
Aligned receive buffer descriptor start address.

• volatile enet_tx_bd_struct_t ∗ txBdStartAddrAlign
Aligned transmit buffer descriptor start address.

• uint8_t ∗ rxBufferAlign
Receive data buffer start address.

• uint8_t ∗ txBufferAlign
Transmit data buffer start address.
17.3.4.0.0.39

Field Documentation

17.3.4.0.0.39.1

uint16_t enet_buffer_config_t::rxBdNumber

17.3.4.0.0.39.2

uint16_t enet_buffer_config_t::txBdNumber

17.3.4.0.0.39.3

uint32_t enet_buffer_config_t::rxBuffSizeAlign

17.3.4.0.0.39.4

uint32_t enet_buffer_config_t::txBuffSizeAlign

17.3.4.0.0.39.5

volatile enet_rx_bd_struct_t∗ enet_buffer_config_t::rxBdStartAddrAlign

17.3.4.0.0.39.6

volatile enet_tx_bd_struct_t∗ enet_buffer_config_t::txBdStartAddrAlign

17.3.4.0.0.39.7

uint8_t∗ enet_buffer_config_t::rxBufferAlign

17.3.4.0.0.39.8

uint8_t∗ enet_buffer_config_t::txBufferAlign

17.3.5

struct enet_config_t

Note:
1. macSpecialConfig is used for a special control configuration, A logical OR of "enet_special_control_flag_t". For a special configuration for MAC, set this parameter to 0.
2. txWatermark is used for a cut-through operation. It is in steps of 64 bytes: 0/1 - 64 bytes written to
TX FIFO before transmission of a frame begins. 2 - 128 bytes written to TX FIFO .... 3 - 192 bytes
written to TX FIFO .... The maximum of txWatermark is 0x2F - 4032 bytes written to TX FIFO ....
txWatermark allows minimizing the transmit latency to set the txWatermark to 0 or 1 or for larger
bus access latency 3 or larger due to contention for the system bus.
3. rxFifoFullThreshold is similar to the txWatermark for cut-through operation in RX. It is in 64-bit
words. The minimum is ENET_FIFO_MIN_RX_FULL and the maximum is 0xFF. If the end of
the frame is stored in FIFO and the frame size if smaller than the txWatermark, the frame is still
transmitted. The rule is the same for rxFifoFullThreshold in the receive direction.
4. When "kENET_ControlFlowControlEnable" is set in the macSpecialConfig, ensure that the pauseKinetis SDK v.2.0 API Reference Manual
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Duration, rxFifoEmptyThreshold, and rxFifoStatEmptyThreshold are set for flow control enabled
case.
5. When "kENET_ControlStoreAndFwdDisabled" is set in the macSpecialConfig, ensure that the rxFifoFullThreshold and txFifoWatermark are set for store and forward disable.
6. The rxAccelerConfig and txAccelerConfig default setting with 0 - accelerator are disabled. The
"enet_tx_accelerator_t" and "enet_rx_accelerator_t" are recommended to be used to enable the
transmit and receive accelerator. After the accelerators are enabled, the store and forward feature
should be enabled. As a result, kENET_ControlStoreAndFwdDisabled should not be set.

Data Fields
• uint32_t macSpecialConfig
Mac special configuration.

• uint32_t interrupt
Mac interrupt source.

• uint16_t rxMaxFrameLen
Receive maximum frame length.

• enet_mii_mode_t miiMode
MII mode.

• enet_mii_speed_t miiSpeed
MII Speed.

• enet_mii_duplex_t miiDuplex
MII duplex.

• uint8_t rxAccelerConfig
Receive accelerator, A logical OR of "enet_rx_accelerator_t".

• uint8_t txAccelerConfig
Transmit accelerator, A logical OR of "enet_rx_accelerator_t".

• uint16_t pauseDuration
For flow control enabled case: Pause duration.

• uint8_t rxFifoEmptyThreshold
For flow control enabled case: when RX FIFO level reaches this value, it makes MAC generate XOFF
pause frame.

• uint8_t rxFifoFullThreshold
For store and forward disable case, the data required in RX FIFO to notify the MAC receive ready status.

• uint8_t txFifoWatermark
For store and forward disable case, the data required in TX FIFO before a frame transmit start.
17.3.5.0.0.40
17.3.5.0.0.40.1

Field Documentation
uint32_t enet_config_t::macSpecialConfig

A logical OR of "enet_special_control_flag_t".
17.3.5.0.0.40.2

uint32_t enet_config_t::interrupt

A logical OR of "enet_interrupt_enable_t".

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17.3.5.0.0.40.3

uint16_t enet_config_t::rxMaxFrameLen

17.3.5.0.0.40.4 enet_mii_mode_t enet_config_t::miiMode
17.3.5.0.0.40.5 enet_mii_speed_t enet_config_t::miiSpeed
17.3.5.0.0.40.6 enet_mii_duplex_t enet_config_t::miiDuplex
17.3.5.0.0.40.7

uint8_t enet_config_t::rxAccelerConfig

17.3.5.0.0.40.8

uint8_t enet_config_t::txAccelerConfig

17.3.5.0.0.40.9

uint16_t enet_config_t::pauseDuration

17.3.5.0.0.40.10

uint8_t enet_config_t::rxFifoEmptyThreshold

17.3.5.0.0.40.11

uint8_t enet_config_t::rxFifoFullThreshold

17.3.5.0.0.40.12

uint8_t enet_config_t::txFifoWatermark

17.3.6

struct _enet_handle

Data Fields
• volatile enet_rx_bd_struct_t ∗ rxBdBase
Receive buffer descriptor base address pointer.

• volatile enet_rx_bd_struct_t ∗ rxBdCurrent
The current available receive buffer descriptor pointer.

• volatile enet_rx_bd_struct_t ∗ rxBdDirty
The dirty receive buffer descriptor needed to be updated from.

• volatile enet_tx_bd_struct_t ∗ txBdBase
Transmit buffer descriptor base address pointer.

• volatile enet_tx_bd_struct_t ∗ txBdCurrent
The current available transmit buffer descriptor pointer.

• uint32_t rxBuffSizeAlign
Receive buffer size alignment.

• uint32_t txBuffSizeAlign
Transmit buffer size alignment.

• enet_callback_t callback
Callback function.

• void ∗ userData
Callback function parameter.

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17.3.6.0.0.41

Field Documentation

17.3.6.0.0.41.1

volatile enet_rx_bd_struct_t∗ enet_handle_t::rxBdBase

17.3.6.0.0.41.2

volatile enet_rx_bd_struct_t∗ enet_handle_t::rxBdCurrent

17.3.6.0.0.41.3

volatile enet_rx_bd_struct_t∗ enet_handle_t::rxBdDirty

17.3.6.0.0.41.4

volatile enet_tx_bd_struct_t∗ enet_handle_t::txBdBase

17.3.6.0.0.41.5

volatile enet_tx_bd_struct_t∗ enet_handle_t::txBdCurrent

17.3.6.0.0.41.6

uint32_t enet_handle_t::rxBuffSizeAlign

17.3.6.0.0.41.7

uint32_t enet_handle_t::txBuffSizeAlign

17.3.6.0.0.41.8 enet_callback_t enet_handle_t::callback
17.3.6.0.0.41.9

17.4
17.4.1

void∗ enet_handle_t::userData

Macro Definition Documentation
#define FSL_ENET_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Version 2.0.0.

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17.4.2

#define ENET_BUFFDESCRIPTOR_RX_EMPTY_MASK 0x8000U

17.4.3

#define ENET_BUFFDESCRIPTOR_RX_SOFTOWNER1_MASK 0x4000U

17.4.4

#define ENET_BUFFDESCRIPTOR_RX_WRAP_MASK 0x2000U

17.4.5

#define ENET_BUFFDESCRIPTOR_RX_SOFTOWNER2_Mask 0x1000U

17.4.6

#define ENET_BUFFDESCRIPTOR_RX_LAST_MASK 0x0800U

17.4.7

#define ENET_BUFFDESCRIPTOR_RX_MISS_MASK 0x0100U

17.4.8

#define ENET_BUFFDESCRIPTOR_RX_BROADCAST_MASK 0x0080U

17.4.9

#define ENET_BUFFDESCRIPTOR_RX_MULTICAST_MASK 0x0040U

17.4.10

#define ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK 0x0020U

17.4.11

#define ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK 0x0010U

17.4.12

#define ENET_BUFFDESCRIPTOR_RX_CRC_MASK 0x0004U

17.4.13

#define ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK 0x0002U

17.4.14

#define ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK 0x0001U

17.4.15

#define ENET_BUFFDESCRIPTOR_TX_READY_MASK 0x8000U

17.4.16

#define ENET_BUFFDESCRIPTOR_TX_SOFTOWENER1_MASK 0x4000U

17.4.17

#define ENET_BUFFDESCRIPTOR_TX_WRAP_MASK 0x2000U

17.4.18

#define ENET_BUFFDESCRIPTOR_TX_SOFTOWENER2_MASK 0x1000U

17.4.19

#define ENET_BUFFDESCRIPTOR_TX_LAST_MASK 0x0800U

17.4.20

#define ENET_BUFFDESCRIPTOR_TX_TRANMITCRC_MASK 0x0400U

17.4.21

#define ENET_BUFFDESCRIPTOR_RX_ERR_MASK
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Enumeration Type Documentation
(ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK |
ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK | \
ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK |
ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK |
ENET_BUFFDESCRIPTOR_RX_CRC_MASK)

17.4.22

#define ENET_FRAME_MAX_FRAMELEN 1518U

17.4.23

#define ENET_FRAME_MAX_VALNFRAMELEN 1522U

17.4.24

#define ENET_FIFO_MIN_RX_FULL 5U

17.4.25

#define ENET_RX_MIN_BUFFERSIZE 256U

17.4.26

#define ENET_BUFF_ALIGNMENT 16U

17.4.27

#define ENET_PHY_MAXADDRESS (ENET_MMFR_PA_MASK >>
ENET_MMFR_PA_SHIFT)

17.5
17.5.1

17.6
17.6.1

Typedef Documentation
typedef void(∗ enet_callback_t)(ENET_Type ∗base, enet_handle_t ∗handle,
enet_event_t event, void ∗userData)

Enumeration Type Documentation
enum _enet_status

Enumerator
kStatus_ENET_RxFrameError A frame received but data error happen.
kStatus_ENET_RxFrameFail Failed to receive a frame.
kStatus_ENET_RxFrameEmpty No frame arrive.
kStatus_ENET_TxFrameBusy Transmit buffer descriptors are under process.
kStatus_ENET_TxFrameFail Transmit frame fail.

17.6.2

enum enet_mii_mode_t

Enumerator
kENET_MiiMode MII mode for data interface.
kENET_RmiiMode RMII mode for data interface.

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17.6.3

enum enet_mii_speed_t

Enumerator
kENET_MiiSpeed10M Speed 10 Mbps.
kENET_MiiSpeed100M Speed 100 Mbps.

17.6.4

enum enet_mii_duplex_t

Enumerator
kENET_MiiHalfDuplex Half duplex mode.
kENET_MiiFullDuplex Full duplex mode.

17.6.5

enum enet_mii_write_t

Enumerator
kENET_MiiWriteNoCompliant Write frame operation, but not MII-compliant.
kENET_MiiWriteValidFrame Write frame operation for a valid MII management frame.

17.6.6

enum enet_mii_read_t

Enumerator
kENET_MiiReadValidFrame Read frame operation for a valid MII management frame.
kENET_MiiReadNoCompliant Read frame operation, but not MII-compliant.

17.6.7

enum enet_special_control_flag_t

These control flags are provided for special user requirements. Normally, these control flags are unused
for ENET initialization. For special requirements, set the flags to macSpecialConfig in the enet_config_t.
The kENET_ControlStoreAndFwdDisable is used to disable the FIFO store and forward. FIFO store and
forward means that the FIFO read/send is started when a complete frame is stored in TX/RX FIFO. If this
flag is set, configure rxFifoFullThreshold and txFifoWatermark in the enet_config_t.
Enumerator
kENET_ControlFlowControlEnable Enable ENET flow control: pause frame.
kENET_ControlRxPayloadCheckEnable Enable ENET receive payload length check.
kENET_ControlRxPadRemoveEnable Padding is removed from received frames.
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Enumeration Type Documentation
kENET_ControlRxBroadCastRejectEnable Enable broadcast frame reject.
kENET_ControlMacAddrInsert Enable MAC address insert.
kENET_ControlStoreAndFwdDisable Enable FIFO store and forward.
kENET_ControlSMIPreambleDisable Enable SMI preamble.
kENET_ControlPromiscuousEnable Enable promiscuous mode.
kENET_ControlMIILoopEnable Enable ENET MII loop back.
kENET_ControlVLANTagEnable Enable VLAN tag frame.

17.6.8

enum enet_interrupt_enable_t

This enumeration uses one-bot encoding to allow a logical OR of multiple members. Members usually
map to interrupt enable bits in one or more peripheral registers.
Enumerator
kENET_BabrInterrupt Babbling receive error interrupt source.
kENET_BabtInterrupt Babbling transmit error interrupt source.
kENET_GraceStopInterrupt Graceful stop complete interrupt source.
kENET_TxFrameInterrupt TX FRAME interrupt source.
kENET_TxByteInterrupt TX BYTE interrupt source.
kENET_RxFrameInterrupt RX FRAME interrupt source.
kENET_RxByteInterrupt RX BYTE interrupt source.
kENET_MiiInterrupt MII interrupt source.
kENET_EBusERInterrupt Ethernet bus error interrupt source.
kENET_LateCollisionInterrupt Late collision interrupt source.
kENET_RetryLimitInterrupt Collision Retry Limit interrupt source.
kENET_UnderrunInterrupt Transmit FIFO underrun interrupt source.
kENET_PayloadRxInterrupt Payload Receive interrupt source.
kENET_WakeupInterrupt WAKEUP interrupt source.

17.6.9

enum enet_event_t

Enumerator
kENET_RxEvent Receive event.
kENET_TxEvent Transmit event.
kENET_ErrEvent Error event: BABR/BABT/EBERR/LC/RL/UN/PLR .
kENET_WakeUpEvent Wake up from sleep mode event.

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enum enet_tx_accelerator_t

17.6.10
Enumerator

kENET_TxAccelIsShift16Enabled Transmit FIFO shift-16.
kENET_TxAccelIpCheckEnabled Insert IP header checksum.
kENET_TxAccelProtoCheckEnabled Insert protocol checksum.

enum enet_rx_accelerator_t

17.6.11
Enumerator

kENET_RxAccelPadRemoveEnabled Padding removal for short IP frames.
kENET_RxAccelIpCheckEnabled Discard with wrong IP header checksum.
kENET_RxAccelProtoCheckEnabled Discard with wrong protocol checksum.
kENET_RxAccelMacCheckEnabled Discard with Mac layer errors.
kENET_RxAccelisShift16Enabled Receive FIFO shift-16.

17.7
17.7.1

Function Documentation
void ENET_GetDefaultConfig ( enet_config_t ∗ config )

The purpose of this API is to get the default ENET MAC controller configure structure for ENET_Init().
User may use the initialized structure unchanged in ENET_Init(), or modify some fields of the structure
before calling ENET_Init(). Example:
enet_config_t config;
ENET_GetDefaultConfig(&config);

Parameters
config

17.7.2

The ENET mac controller configuration structure pointer.

void ENET_Init ( ENET_Type ∗ base, enet_handle_t ∗ handle, const
enet_config_t ∗ config, const enet_buffer_config_t ∗ bufferConfig, uint8_t ∗
macAddr, uint32_t srcClock_Hz )

This function ungates the module clock and initializes it with the ENET configuration.

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Function Documentation
Parameters
base

ENET peripheral base address.

handle

ENET handler pointer.

config

ENET mac configuration structure pointer. The "enet_config_t" type mac configuration return from ENET_GetDefaultConfig can be used directly. It is also possible to
verify the Mac configuration using other methods.

bufferConfig

ENET buffer configuration structure pointer. The buffer configuration should be prepared for ENET Initialization.

macAddr
srcClock_Hz

ENET mac address of Ethernet device. This MAC address should be provided.
The internal module clock source for MII clock.

Note
ENET has two buffer descriptors: legacy buffer descriptors and enhanced 1588 buffer descriptors.
The legacy descriptor is used by default. To use 1588 feature, use the enhanced 1588 buffer descriptor by defining "ENET_ENHANCEDBUFFERDESCRIPTOR_MODE" and calling ENET_Ptp1588Configure() to configure the 1588 feature and related buffers after calling ENET_Init().

17.7.3

void ENET_Deinit ( ENET_Type ∗ base )

This function gates the module clock, clears ENET interrupts, and disables the ENET module.
Parameters
base

17.7.4

ENET peripheral base address.

static void ENET_Reset ( ENET_Type ∗ base ) [inline], [static]

This function restores the ENET module to reset state. Note that this function sets all registers to reset
state. As a result, the ENET module can’t work after calling this function.
Parameters
base

17.7.5

ENET peripheral base address.

void ENET_SetMII ( ENET_Type ∗ base, enet_mii_speed_t speed,
enet_mii_duplex_t duplex )

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Parameters

17.7.6

base

ENET peripheral base address.

speed

The speed of the RMII mode.

duplex

The duplex of the RMII mode.

void ENET_SetSMI ( ENET_Type ∗ base, uint32_t srcClock_Hz, bool
isPreambleDisabled )

Parameters
base

ENET peripheral base address.

srcClock_Hz

This is the ENET module clock frequency. Normally it’s the system clock. See clock
distribution.

isPreambleDisabled

The preamble disable flag.
• true Enables the preamble.
• false Disables the preamble.

17.7.7

static bool ENET_GetSMI ( ENET_Type ∗ base ) [inline], [static]

This API is used to get the SMI configuration to check if the MII management interface has been set.
Parameters
base

ENET peripheral base address.

Returns
The SMI setup status true or false.

17.7.8

static uint32_t ENET_ReadSMIData ( ENET_Type ∗ base ) [inline],

[static]

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Function Documentation
Parameters
base

ENET peripheral base address.

Returns
The data read from PHY

void ENET_StartSMIRead ( ENET_Type ∗ base, uint32_t phyAddr, uint32_t
phyReg, enet_mii_read_t operation )

17.7.9

Parameters
base

ENET peripheral base address.

phyAddr

The PHY address.

phyReg

The PHY register.

operation

The read operation.

void ENET_StartSMIWrite ( ENET_Type ∗ base, uint32_t phyAddr, uint32_t
phyReg, enet_mii_write_t operation, uint32_t data )

17.7.10

Parameters
base

ENET peripheral base address.

phyAddr

The PHY address.

phyReg

The PHY register.

operation
data

17.7.11

The write operation.
The data written to PHY.

void ENET_SetMacAddr ( ENET_Type ∗ base, uint8_t ∗ macAddr )

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Parameters
base
macAddr

ENET peripheral base address.
The six-byte Mac address pointer. The pointer is allocated by application and input
into the API.

void ENET_GetMacAddr ( ENET_Type ∗ base, uint8_t ∗ macAddr )

17.7.12
Parameters

base
macAddr

ENET peripheral base address.
The six-byte Mac address pointer. The pointer is allocated by application and input
into the API.

void ENET_AddMulticastGroup ( ENET_Type ∗ base, uint8_t ∗ address )

17.7.13
Parameters

base
address

ENET peripheral base address.
The six-byte multicast group address which is provided by application.

void ENET_LeaveMulticastGroup ( ENET_Type ∗ base, uint8_t ∗ address )

17.7.14
Parameters

base
address

17.7.15

ENET peripheral base address.
The six-byte multicast group address which is provided by application.

static void ENET_ActiveRead ( ENET_Type ∗ base ) [inline],

[static]

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Function Documentation
Parameters
base

ENET peripheral base address.

Note
This must be called after the MAC configuration and state are ready. It must be called after the ENET_Init() and ENET_Ptp1588Configure(). This should be called when the ENET receive required.

static void ENET_EnableSleepMode ( ENET_Type ∗ base, bool enable )
[inline], [static]

17.7.16

This function is used to set the MAC enter sleep mode. When entering sleep mode, the magic frame
wakeup interrupt should be enabled to wake up MAC from the sleep mode and reset it to normal mode.
Parameters
base
enable

17.7.17

ENET peripheral base address.
True enable sleep mode, false disable sleep mode.

static void ENET_GetAccelFunction ( ENET_Type ∗ base, uint32_t ∗
txAccelOption, uint32_t ∗ rxAccelOption ) [inline], [static]

Parameters
base

ENET peripheral base address.

txAccelOption

The transmit accelerator option. The "enet_tx_accelerator_t" is recommended to be
used to as the mask to get the exact the accelerator option.

rxAccelOption

The receive accelerator option. The "enet_rx_accelerator_t" is recommended to be
used to as the mask to get the exact the accelerator option.

17.7.18

static void ENET_EnableInterrupts ( ENET_Type ∗ base, uint32_t mask )
[inline], [static]

This function enables the ENET interrupt according to the provided mask. The mask is a logical OR of
enumeration members. See enet_interrupt_enable_t. For example, to enable the TX frame interrupt and
RX frame interrupt, do this:
ENET_EnableInterrupts(ENET, kENET_TxFrameInterrupt |
kENET_RxFrameInterrupt);

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Function Documentation
Parameters

17.7.19

base

ENET peripheral base address.

mask

ENET interrupts to enable. This is a logical OR of the enumeration :: enet_interrupt_enable_t.

static void ENET_DisableInterrupts ( ENET_Type ∗ base, uint32_t mask )
[inline], [static]

This function disables the ENET interrupts according to the provided mask. The mask is a logical OR of
enumeration members. See enet_interrupt_enable_t. For example, to disable the TX frame interrupt and
RX frame interrupt, do this:
ENET_DisableInterrupts(ENET, kENET_TxFrameInterrupt |
kENET_RxFrameInterrupt);

Parameters

17.7.20

base

ENET peripheral base address.

mask

ENET interrupts to disable. This is a logical OR of the enumeration :: enet_interrupt_enable_t.

static uint32_t ENET_GetInterruptStatus ( ENET_Type ∗ base )
[inline], [static]

Parameters
base

ENET peripheral base address.

Returns
The event status of the interrupt source. This is the logical OR of members of the enumeration ::
enet_interrupt_enable_t.

17.7.21

static void ENET_ClearInterruptStatus ( ENET_Type ∗ base, uint32_t mask
) [inline], [static]

This function clears enabled ENET interrupts according to the provided mask. The mask is a logical OR
of enumeration members. See the enet_interrupt_enable_t. For example, to clear the TX frame interrupt
and RX frame interrupt, do this:
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Function Documentation
ENET_ClearInterruptStatus(ENET, kENET_TxFrameInterrupt |
kENET_RxFrameInterrupt);

Parameters
base

ENET peripheral base address.

mask

ENET interrupt source to be cleared. This is the logical OR of members of the enumeration :: enet_interrupt_enable_t.

void ENET_SetCallback ( enet_handle_t ∗ handle, enet_callback_t
callback, void ∗ userData )

17.7.22

This API is provided for application callback required case when ENET interrupt is enabled. This API
should be called after calling ENET_Init.
Parameters
handle
callback
userData

17.7.23

ENET handler pointer. Should be provided by application.
The ENET callback function.
The callback function parameter.

void ENET_GetRxErrBeforeReadFrame ( enet_handle_t ∗ handle,
enet_data_error_stats_t ∗ eErrorStatic )

This API must be called after the ENET_GetRxFrameSize and before the ENET_ReadFrame(). If the
ENET_GetRxFrameSize returns kStatus_ENET_RxFrameError, the ENET_GetRxErrBeforeReadFrame
can be used to get the exact error statistics. For example:
status = ENET_GetRxFrameSize(&g_handle, &length);
if (status == kStatus_ENET_RxFrameError)
{
// Get the error information of the received frame.
ENET_GetRxErrBeforeReadFrame(&g_handle, &eErrStatic);
// update the receive buffer.
ENET_ReadFrame(EXAMPLE_ENET, &g_handle, NULL, 0);
}

Parameters

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Function Documentation
handle
eErrorStatic

The ENET handler structure pointer. This is the same handler pointer used in the
ENET_Init.
The error statistics structure pointer.

status_t ENET_GetRxFrameSize ( enet_handle_t ∗ handle, uint32_t ∗
length )

17.7.24

This function reads a received frame size from the ENET buffer descriptors.
Note
The FCS of the frame is removed by MAC controller and the size is the length without the FCS.
After calling ENET_GetRxFrameSize, ENET_ReadFrame() should be called to update the receive
buffers If the result is not "kStatus_ENET_RxFrameEmpty".
Parameters
handle

The ENET handler structure. This is the same handler pointer used in the ENET_Init.

length

The length of the valid frame received.

Return values
kStatus_ENET_RxFrameEmpty

No frame received. Should not call ENET_ReadFrame to read frame.

kStatus_ENET_RxFrameError

Data error happens. ENET_ReadFrame should be called with NULL data
and NULL length to update the receive buffers.

kStatus_Success

Receive a frame Successfully then the ENET_ReadFrame should be called
with the right data buffer and the captured data length input.

17.7.25

status_t ENET_ReadFrame ( ENET_Type ∗ base, enet_handle_t ∗ handle,
uint8_t ∗ data, uint32_t length )

This function reads a frame (both the data and the length) from the ENET buffer descriptors. The ENET_GetRxFrameSize should be used to get the size of the prepared data buffer.
Note
The FCS of the frame is removed by MAC controller and is not delivered to the application.

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Function Documentation
Parameters
base

ENET peripheral base address.

handle

The ENET handler structure. This is the same handler pointer used in the ENET_Init.

data

The data buffer provided by user to store the frame which memory size should be at
least "length".

length

The size of the data buffer which is still the length of the received frame.

Returns
The execute status, successful or failure.

status_t ENET_SendFrame ( ENET_Type ∗ base, enet_handle_t ∗ handle,
uint8_t ∗ data, uint32_t length )

17.7.26

Note
The CRC is automatically appended to the data. Input the data to send without the CRC.
Parameters
base
handle
data
length

ENET peripheral base address.
The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
The data buffer provided by user to be send.
The length of the data to be send.

Return values
kStatus_Success

Send frame succeed.

kStatus_ENET_TxFrameBusy

Transmit buffer descriptor is busy under transmit.

kStatus_ENET_TxFrameFail

Transmit frame fail.

17.7.27

void ENET_TransmitIRQHandler ( ENET_Type ∗ base, enet_handle_t ∗
handle )

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Parameters
base
handle

ENET peripheral base address.
The ENET handler pointer.

void ENET_ReceiveIRQHandler ( ENET_Type ∗ base, enet_handle_t ∗
handle )

17.7.28

Parameters
base
handle

ENET peripheral base address.
The ENET handler pointer.

void ENET_ErrorIRQHandler ( ENET_Type ∗ base, enet_handle_t ∗ handle
)

17.7.29

Parameters
base
handle

ENET peripheral base address.
The ENET handler pointer.

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Chapter 18
EWM: External Watchdog Monitor Driver
18.1

Overview

The KSDK provides a peripheral driver for the EWM module of Kinetis devices.

Typical use case
ewm_config_t config;
EWM_GetDefaultConfig(&config);
config.enableInterrupt = true;
config.compareLowValue = 0U;
config.compareHighValue = 0xAAU;
NVIC_EnableIRQ(WDOG_EWM_IRQn);
EWM_Init(base, &config);

Files
• file fsl_ewm.h

Data Structures
• struct ewm_config_t
Describes ewm clock source. More...

Enumerations
• enum _ewm_interrupt_enable_t { kEWM_InterruptEnable = EWM_CTRL_INTEN_MASK }
EWM interrupt configuration structure, default settings all disabled.

• enum _ewm_status_flags_t { kEWM_RunningFlag = EWM_CTRL_EWMEN_MASK }
EWM status flags.

Driver version
• #define FSL_EWM_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
EWM driver version 2.0.1.

EWM Initialization and De-initialization
• void EWM_Init (EWM_Type ∗base, const ewm_config_t ∗config)
Initializes the EWM peripheral.

• void EWM_Deinit (EWM_Type ∗base)
Deinitializes the EWM peripheral.

• void EWM_GetDefaultConfig (ewm_config_t ∗config)
Initializes the EWM configuration structure.

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EWM functional Operation
• static void EWM_EnableInterrupts (EWM_Type ∗base, uint32_t mask)
Enables the EWM interrupt.

• static void EWM_DisableInterrupts (EWM_Type ∗base, uint32_t mask)
Disables the EWM interrupt.

• static uint32_t EWM_GetStatusFlags (EWM_Type ∗base)
Gets EWM all status flags.

• void EWM_Refresh (EWM_Type ∗base)
Service EWM.

18.2
18.2.1

Data Structure Documentation
struct ewm_config_t

Data structure for EWM configuration.
This structure is used to configure the EWM.

Data Fields
• bool enableEwm
Enable EWM module.

• bool enableEwmInput
Enable EWM_in input.

• bool setInputAssertLogic
EWM_in signal assertion state.

• bool enableInterrupt
Enable EWM interrupt.

• uint8_t compareLowValue
Compare low register value.

• uint8_t compareHighValue
Compare high register value.

18.3
18.3.1

18.4
18.4.1

Macro Definition Documentation
#define FSL_EWM_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))

Enumeration Type Documentation
enum _ewm_interrupt_enable_t

This structure contains the settings for all of the EWM interrupt configurations.
Enumerator
kEWM_InterruptEnable Enable EWM to generate an interrupt.

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Function Documentation

enum _ewm_status_flags_t

18.4.2

This structure contains the constants for the EWM status flags for use in the EWM functions.
Enumerator
kEWM_RunningFlag Running flag, set when ewm is enabled.

18.5

Function Documentation

18.5.1

void EWM_Init ( EWM_Type ∗ base, const ewm_config_t ∗ config )

This function is used to initialize the EWM. After calling, the EWM runs immediately according to the
configuration. Note that except for interrupt enable control bit, other control bits and registers are write
once after a CPU reset. Modifying them more than once generates a bus transfer error.
Example:
ewm_config_t config;
EWM_GetDefaultConfig(&config);
config.compareHighValue = 0xAAU;
EWM_Init(ewm_base,&config);

Parameters
base
config

18.5.2

EWM peripheral base address
The configuration of EWM

void EWM_Deinit ( EWM_Type ∗ base )

This function is used to shut down the EWM.
Parameters
base

18.5.3

EWM peripheral base address

void EWM_GetDefaultConfig ( ewm_config_t ∗ config )

This function initializes the EWM configure structure to default values. The default values are:
ewmConfig->enableEwm = true;
ewmConfig->enableEwmInput = false;
ewmConfig->setInputAssertLogic = false;
ewmConfig->enableInterrupt = false;
ewmConfig->ewm_lpo_clock_source_t = kEWM_LpoClockSource0;
ewmConfig->prescaler = 0;
ewmConfig->compareLowValue = 0;
ewmConfig->compareHighValue = 0xFEU;

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Parameters
config

Pointer to EWM configuration structure.

See Also
ewm_config_t

18.5.4

static void EWM_EnableInterrupts ( EWM_Type ∗ base, uint32_t mask )
[inline], [static]

This function enables the EWM interrupt.
Parameters

18.5.5

base

EWM peripheral base address

mask

The interrupts to enable The parameter can be combination of the following source if
defined:
• kEWM_InterruptEnable

static void EWM_DisableInterrupts ( EWM_Type ∗ base, uint32_t mask )
[inline], [static]

This function enables the EWM interrupt.
Parameters

18.5.6

base

EWM peripheral base address

mask

The interrupts to disable The parameter can be combination of the following source
if defined:
• kEWM_InterruptEnable

static uint32_t EWM_GetStatusFlags ( EWM_Type ∗ base ) [inline],

[static]
This function gets all status flags.
Example for getting Running Flag:
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uint32_t status;
status = EWM_GetStatusFlags(ewm_base) & kEWM_RunningFlag;

Parameters
base

EWM peripheral base address

Returns
State of the status flag: asserted (true) or not-asserted (false).

See Also
_ewm_status_flags_t
• true: related status flag has been set.
• false: related status flag is not set.

18.5.7

void EWM_Refresh ( EWM_Type ∗ base )

This function reset EWM counter to zero.
Parameters
base

EWM peripheral base address

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Chapter 19
C90TFS Flash Driver
19.1

Overview

The flash provides the C90TFS Flash driver of Kinetis devices with the C90TFS Flash module inside. The
flash provides general APIs to handle specific operations on C90TFS/FTFx Flash module. The user can
use those APIs directly in the application. In addition, it provides internal functions called by the driver.
Although these functions are not meant to be called from the user’s application directly, the APIs can still
be used.

Data Structures
• struct flash_execute_in_ram_function_config_t
Flash execute-in-ram function information. More...

• struct flash_swap_state_config_t
Flash Swap information. More...

• struct flash_swap_ifr_field_config_t
Flash Swap IFR fileds. More...

• struct flash_operation_config_t
Active flash information for current operation. More...

• struct flash_config_t
Flash driver state information. More...

Typedefs
• typedef void(∗ flash_callback_t )(void)
callback type used for pflash block

Enumerations
• enum flash_margin_value_t {
kFLASH_marginValueNormal,
kFLASH_marginValueUser,
kFLASH_marginValueFactory,
kFLASH_marginValueInvalid }
Enumeration for supported flash margin levels.

• enum flash_security_state_t {
kFLASH_securityStateNotSecure,
kFLASH_securityStateBackdoorEnabled,
kFLASH_securityStateBackdoorDisabled }
Enumeration for the three possible flash security states.

• enum flash_protection_state_t {
kFLASH_protectionStateUnprotected,
kFLASH_protectionStateProtected,
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kFLASH_protectionStateMixed }
Enumeration for the three possible flash protection levels.

• enum flash_execute_only_access_state_t {
kFLASH_accessStateUnLimited,
kFLASH_accessStateExecuteOnly,
kFLASH_accessStateMixed }
Enumeration for the three possible flash execute access levels.

• enum flash_property_tag_t {
kFLASH_propertyPflashSectorSize = 0x00U,
kFLASH_propertyPflashTotalSize = 0x01U,
kFLASH_propertyPflashBlockSize = 0x02U,
kFLASH_propertyPflashBlockCount = 0x03U,
kFLASH_propertyPflashBlockBaseAddr = 0x04U,
kFLASH_propertyPflashFacSupport = 0x05U,
kFLASH_propertyPflashAccessSegmentSize = 0x06U,
kFLASH_propertyPflashAccessSegmentCount = 0x07U,
kFLASH_propertyFlexRamBlockBaseAddr = 0x08U,
kFLASH_propertyFlexRamTotalSize = 0x09U,
kFLASH_propertyDflashSectorSize = 0x10U,
kFLASH_propertyDflashTotalSize = 0x11U,
kFLASH_propertyDflashBlockSize = 0x12U,
kFLASH_propertyDflashBlockCount = 0x13U,
kFLASH_propertyDflashBlockBaseAddr = 0x14U }
Enumeration for various flash properties.

• enum _flash_execute_in_ram_function_constants {
kFLASH_executeInRamFunctionMaxSize = 64U,
kFLASH_executeInRamFunctionTotalNum = 2U }
Constants for execute-in-ram flash function.

• enum flash_read_resource_option_t {
kFLASH_resourceOptionFlashIfr,
kFLASH_resourceOptionVersionId = 0x01U }
Enumeration for the two possible options of flash read resource command.

• enum _flash_read_resource_range {
kFLASH_resourceRangePflashIfrSizeInBytes = 256U,
kFLASH_resourceRangeVersionIdSizeInBytes = 8U,
kFLASH_resourceRangeVersionIdStart = 0x00U,
kFLASH_resourceRangeVersionIdEnd = 0x07U,
kFLASH_resourceRangePflashSwapIfrStart = 0x40000U,
kFLASH_resourceRangePflashSwapIfrEnd = 0x403FFU,
kFLASH_resourceRangeDflashIfrStart = 0x800000U,
kFLASH_resourceRangeDflashIfrEnd = 0x8003FFU }
Enumeration for the range of special-purpose flash resource.

• enum flash_flexram_function_option_t {
kFLASH_flexramFunctionOptionAvailableAsRam = 0xFFU,
kFLASH_flexramFunctionOptionAvailableForEeprom = 0x00U }
Enumeration for the two possilbe options of set flexram function command.

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• enum flash_swap_function_option_t {
kFLASH_swapFunctionOptionEnable = 0x00U,
kFLASH_swapFunctionOptionDisable = 0x01U }
Enumeration for the possible options of Swap function.

• enum flash_swap_control_option_t {
kFLASH_swapControlOptionIntializeSystem = 0x01U,
kFLASH_swapControlOptionSetInUpdateState = 0x02U,
kFLASH_swapControlOptionSetInCompleteState = 0x04U,
kFLASH_swapControlOptionReportStatus = 0x08U,
kFLASH_swapControlOptionDisableSystem = 0x10U }
Enumeration for the possible options of Swap Control commands.

• enum flash_swap_state_t {
kFLASH_swapStateUninitialized = 0x00U,
kFLASH_swapStateReady = 0x01U,
kFLASH_swapStateUpdate = 0x02U,
kFLASH_swapStateUpdateErased = 0x03U,
kFLASH_swapStateComplete = 0x04U,
kFLASH_swapStateDisabled = 0x05U }
Enumeration for the possible flash swap status.

• enum flash_swap_block_status_t {
kFLASH_swapBlockStatusLowerHalfProgramBlocksAtZero,
kFLASH_swapBlockStatusUpperHalfProgramBlocksAtZero }
Enumeration for the possible flash swap block status

• enum flash_partition_flexram_load_option_t {
kFLASH_partitionFlexramLoadOptionLoadedWithValidEepromData,
kFLASH_partitionFlexramLoadOptionNotLoaded = 0x01U }
Enumeration for FlexRAM load during reset option.

Flash version
• enum _flash_driver_version_constants {
kFLASH_driverVersionName = ’F’,
kFLASH_driverVersionMajor = 2,
kFLASH_driverVersionMinor = 1,
kFLASH_driverVersionBugfix = 0 }
FLASH driver version for ROM.

• #define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix))
Construct the version number for drivers.

• #define FSL_FLASH_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
FLASH driver version for SDK.

Flash configuration
• #define FLASH_SSD_CONFIG_ENABLE_FLEXNVM_SUPPORT 1
Whether to support FlexNVM in flash driver.

• #define FLASH_SSD_IS_FLEXNVM_ENABLED (FLASH_SSD_CONFIG_ENABLE_FLEXNVM_SUPPORT && FSL_FEATURE_FLASH_HAS_FLEX_NVM)
Whether the FlexNVM is enabled in flash driver.

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• #define FLASH_DRIVER_IS_FLASH_RESIDENT 1
Flash driver location.

• #define FLASH_DRIVER_IS_EXPORTED 0
Flash Driver Export option.

Flash status
• enum _flash_status {
kStatus_FLASH_Success = MAKE_STATUS(kStatusGroupGeneric, 0),
kStatus_FLASH_InvalidArgument = MAKE_STATUS(kStatusGroupGeneric, 4),
kStatus_FLASH_SizeError = MAKE_STATUS(kStatusGroupFlashDriver, 0),
kStatus_FLASH_AlignmentError,
kStatus_FLASH_AddressError = MAKE_STATUS(kStatusGroupFlashDriver, 2),
kStatus_FLASH_AccessError,
kStatus_FLASH_ProtectionViolation,
kStatus_FLASH_CommandFailure,
kStatus_FLASH_UnknownProperty = MAKE_STATUS(kStatusGroupFlashDriver, 6),
kStatus_FLASH_EraseKeyError = MAKE_STATUS(kStatusGroupFlashDriver, 7),
kStatus_FLASH_RegionExecuteOnly = MAKE_STATUS(kStatusGroupFlashDriver, 8),
kStatus_FLASH_ExecuteInRamFunctionNotReady,
kStatus_FLASH_PartitionStatusUpdateFailure,
kStatus_FLASH_SetFlexramAsEepromError,
kStatus_FLASH_RecoverFlexramAsRamError,
kStatus_FLASH_SetFlexramAsRamError = MAKE_STATUS(kStatusGroupFlashDriver, 13),
kStatus_FLASH_RecoverFlexramAsEepromError,
kStatus_FLASH_CommandNotSupported = MAKE_STATUS(kStatusGroupFlashDriver, 15),
kStatus_FLASH_SwapSystemNotInUninitialized,
kStatus_FLASH_SwapIndicatorAddressError }
Flash driver status codes.

• #define kStatusGroupGeneric 0
Flash driver status group.

• #define kStatusGroupFlashDriver 1
• #define MAKE_STATUS(group, code) ((((group)∗100) + (code)))
Construct a status code value from a group and code number.

Flash API key
• enum _flash_driver_api_keys { kFLASH_apiEraseKey = FOUR_CHAR_CODE(’k’, ’f’, ’e’, ’k’) }
Enumeration for flash driver API keys.

• #define FOUR_CHAR_CODE(a, b, c, d) (((d) << 24) | ((c) << 16) | ((b) << 8) | ((a)))
Construct the four char code for flash driver API key.

Initialization
• status_t FLASH_Init (flash_config_t ∗config)
Initializes global flash properties structure members.

• status_t FLASH_SetCallback (flash_config_t ∗config, flash_callback_t callback)
Set the desired flash callback function.

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• status_t FLASH_PrepareExecuteInRamFunctions (flash_config_t ∗config)
Prepare flash execute-in-ram functions.

Erasing
• status_t FLASH_EraseAll (flash_config_t ∗config, uint32_t key)
Erases entire flash.

• status_t FLASH_Erase (flash_config_t ∗config, uint32_t start, uint32_t lengthInBytes, uint32_t key)
Erases flash sectors encompassed by parameters passed into function.

• status_t FLASH_EraseAllExecuteOnlySegments (flash_config_t ∗config, uint32_t key)
Erases entire flash, including protected sectors.

Programming
• status_t FLASH_Program (flash_config_t ∗config, uint32_t start, uint32_t ∗src, uint32_t lengthInBytes)
Programs flash with data at locations passed in through parameters.

• status_t FLASH_ProgramOnce (flash_config_t ∗config, uint32_t index, uint32_t ∗src, uint32_t lengthInBytes)
Programs Program Once Field through parameters.

Reading
Programs flash with data at locations passed in through parameters via Program Section command
This function programs the flash memory with desired data for a given flash area as determined by the
start address and length.
Parameters
config
start
src
lengthInBytes

Pointer to storage for the driver runtime state.
The start address of the desired flash memory to be programmed. Must be wordaligned.
Pointer to the source buffer of data that is to be programmed into the flash.
The length, given in bytes (not words or long-words) to be programmed. Must be
word-aligned.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

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kStatus_FLASH_AlignmentError
kStatus_FLASH_AddressError
kStatus_FLASH_SetFlexramAsRamError
kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure
kStatus_FLASH_RecoverFlexramAsEepromError

Parameter is not aligned with specified baseline.
Address is out of range.
Failed to set flexram as ram
Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.
Failed to recover flexram as eeprom

Programs EEPROM with data at locations passed in through parameters
This function programs the Emulated EEPROM with desired data for a given flash area as determined by
the start address and length.
Parameters
config
start
src
lengthInBytes

Pointer to storage for the driver runtime state.
The start address of the desired flash memory to be programmed. Must be wordaligned.
Pointer to the source buffer of data that is to be programmed into the flash.
The length, given in bytes (not words or long-words) to be programmed. Must be
word-aligned.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

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kStatus_FLASH_AddressError
kStatus_FLASH_SetFlexramAsEepromError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_RecoverFlexramAsRamError

Address is out of range.
Failed to set flexram as eeprom.
The program/erase operation is requested to execute on protected areas.
Failed to recover flexram as ram

• status_t FLASH_ReadOnce (flash_config_t ∗config, uint32_t index, uint32_t ∗dst, uint32_t lengthInBytes)
Read resource with data at locations passed in through parameters.

Security
• status_t FLASH_GetSecurityState (flash_config_t ∗config, flash_security_state_t ∗state)
Returns the security state via the pointer passed into the function.

• status_t FLASH_SecurityBypass (flash_config_t ∗config, const uint8_t ∗backdoorKey)
Allows user to bypass security with a backdoor key.

Verification
• status_t FLASH_VerifyEraseAll (flash_config_t ∗config, flash_margin_value_t margin)
Verifies erasure of entire flash at specified margin level.

• status_t FLASH_VerifyErase (flash_config_t ∗config, uint32_t start, uint32_t lengthInBytes, flash_margin_value_t margin)
Verifies erasure of desired flash area at specified margin level.

• status_t FLASH_VerifyProgram (flash_config_t ∗config, uint32_t start, uint32_t lengthInBytes,
const uint32_t ∗expectedData, flash_margin_value_t margin, uint32_t ∗failedAddress, uint32_t ∗failedData)
Verifies programming of desired flash area at specified margin level.

• status_t FLASH_VerifyEraseAllExecuteOnlySegments (flash_config_t ∗config, flash_margin_value_t margin)
Verifies if the program flash executeonly segments have been erased to the specified read margin level.

Protection
• status_t FLASH_IsProtected (flash_config_t ∗config, uint32_t start, uint32_t lengthInBytes, flash_protection_state_t ∗protection_state)
Returns the protection state of desired flash area via the pointer passed into the function.

• status_t FLASH_IsExecuteOnly (flash_config_t ∗config, uint32_t start, uint32_t lengthInBytes,
flash_execute_only_access_state_t ∗access_state)
Returns the access state of desired flash area via the pointer passed into the function.

Properties
• status_t FLASH_GetProperty (flash_config_t ∗config, flash_property_tag_t whichProperty, uint32_t ∗value)
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Returns the desired flash property.

Flash Protection Utilities
Prepares the FlexNVM block for use as data flash, EEPROM backup, or a combination of both and initializes the FlexRAM.
Parameters
config

Pointer to storage for the driver runtime state.

option

The option used to set FlexRAM load behavior during reset.

eepromDataSizeCode

Determines the amount of FlexRAM used in each of the available EEPROM subsystems.

flexnvmPartitionCode

Specifies how to split the FlexNVM block between data flash memory and EEPROM
backup memory supporting EEPROM functions.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

• status_t FLASH_PflashSetProtection (flash_config_t ∗config, uint32_t protectStatus)
Set PFLASH Protection to the intended protection status.

• status_t FLASH_PflashGetProtection (flash_config_t ∗config, uint32_t ∗protectStatus)
Get PFLASH Protection Status.

19.2
19.2.1

Data Structure Documentation
struct flash_execute_in_ram_function_config_t

Data Fields
• uint32_t activeFunctionCount
Number of available execute-in-ram functions.

• uint8_t ∗ flashRunCommand
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execute-in-ram function: flash_run_command.

• uint8_t ∗ flashCacheClearCommand
execute-in-ram function: flash_cache_clear_command.
19.2.1.0.0.42

Field Documentation

19.2.1.0.0.42.1

uint32_t flash_execute_in_ram_function_config_t::activeFunctionCount

19.2.1.0.0.42.2

uint8_t∗ flash_execute_in_ram_function_config_t::flashRunCommand

19.2.1.0.0.42.3

uint8_t∗ flash_execute_in_ram_function_config_t::flashCacheClearCommand

19.2.2

struct flash_swap_state_config_t

Data Fields
• flash_swap_state_t flashSwapState
Current swap system status.

• flash_swap_block_status_t currentSwapBlockStatus
Current swap block status.

• flash_swap_block_status_t nextSwapBlockStatus
Next swap block status.
19.2.2.0.0.43

Field Documentation

19.2.2.0.0.43.1 flash_swap_state_t flash_swap_state_config_t::flashSwapState
19.2.2.0.0.43.2 flash_swap_block_status_t flash_swap_state_config_t::currentSwapBlockStatus
19.2.2.0.0.43.3 flash_swap_block_status_t flash_swap_state_config_t::nextSwapBlockStatus

19.2.3

struct flash_swap_ifr_field_config_t

Data Fields
• uint16_t swapIndicatorAddress
Swap indicator address field.

• uint16_t swapEnableWord
Swap enable word field.

• uint8_t reserved0 [6]
Reserved field.

• uint16_t swapDisableWord
Swap disable word field.

• uint8_t reserved1 [4]
Reserved field.

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19.2.3.0.0.44

Field Documentation

19.2.3.0.0.44.1

uint16_t flash_swap_ifr_field_config_t::swapIndicatorAddress

19.2.3.0.0.44.2

uint16_t flash_swap_ifr_field_config_t::swapEnableWord

19.2.3.0.0.44.3

uint8_t flash_swap_ifr_field_config_t::reserved0[6]

19.2.3.0.0.44.4

uint16_t flash_swap_ifr_field_config_t::swapDisableWord

19.2.3.0.0.44.5

uint8_t flash_swap_ifr_field_config_t::reserved1[4]

19.2.4

struct flash_operation_config_t

Data Fields
• uint32_t convertedAddress
Converted address for current flash type.

• uint32_t activeSectorSize
Sector size of current flash type.

• uint32_t activeBlockSize
Block size of current flash type.

• uint32_t blockWriteUnitSize
write unit size.

• uint32_t sectorCmdAddressAligment
Erase sector command address alignment.

• uint32_t partCmdAddressAligment
Program/Verify part command address alignment.

• 32_t resourceCmdAddressAligment
Read resource command address alignment.

• uint32_t checkCmdAddressAligment
Program check command address alignment.

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19.2.4.0.0.45

Field Documentation

19.2.4.0.0.45.1

uint32_t flash_operation_config_t::convertedAddress

19.2.4.0.0.45.2

uint32_t flash_operation_config_t::activeSectorSize

19.2.4.0.0.45.3

uint32_t flash_operation_config_t::activeBlockSize

19.2.4.0.0.45.4

uint32_t flash_operation_config_t::blockWriteUnitSize

19.2.4.0.0.45.5

uint32_t flash_operation_config_t::sectorCmdAddressAligment

19.2.4.0.0.45.6

uint32_t flash_operation_config_t::partCmdAddressAligment

19.2.4.0.0.45.7

uint32_t flash_operation_config_t::resourceCmdAddressAligment

19.2.4.0.0.45.8

uint32_t flash_operation_config_t::checkCmdAddressAligment

19.2.5

struct flash_config_t

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver
APIs.

Data Fields
• uint32_t PFlashBlockBase
Base address of the first PFlash block.

• uint32_t PFlashTotalSize
Size of all combined PFlash block.

• uint32_t PFlashBlockCount
Number of PFlash blocks.

• uint32_t PFlashSectorSize
Size in bytes of a sector of PFlash.

• flash_callback_t PFlashCallback
Callback function for flash API.

• uint32_t PFlashAccessSegmentSize
Size in bytes of a access segment of PFlash.

• uint32_t PFlashAccessSegmentCount
Number of PFlash access segments.

• uint32_t ∗ flashExecuteInRamFunctionInfo
Info struct of flash execute-in-ram function.

• uint32_t FlexRAMBlockBase
For FlexNVM device, this is the base address of FlexRAM For non-FlexNVM device, this is the base
address of acceleration RAM memory.

• uint32_t FlexRAMTotalSize
For FlexNVM device, this is the size of FlexRAM For non-FlexNVM device, this is the size of acceleration
RAM memory.

• uint32_t DFlashBlockBase
For FlexNVM device, this is the base address of D-Flash memory (FlexNVM memory); For non-FlexNVM

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device, this field is unused.

• uint32_t DFlashTotalSize
For FlexNVM device, this is total size of the FlexNVM memory; For non-FlexNVM device, this field is
unused.

• uint32_t EEpromTotalSize
For FlexNVM device, this is the size in byte of EEPROM area which was partitioned from FlexRAM; For
non-FlexNVM device, this field is unused.
19.2.5.0.0.46

Field Documentation

19.2.5.0.0.46.1

uint32_t flash_config_t::PFlashTotalSize

19.2.5.0.0.46.2

uint32_t flash_config_t::PFlashBlockCount

19.2.5.0.0.46.3

uint32_t flash_config_t::PFlashSectorSize

19.2.5.0.0.46.4 flash_callback_t flash_config_t::PFlashCallback
19.2.5.0.0.46.5

uint32_t flash_config_t::PFlashAccessSegmentSize

19.2.5.0.0.46.6

uint32_t flash_config_t::PFlashAccessSegmentCount

19.2.5.0.0.46.7

uint32_t∗ flash_config_t::flashExecuteInRamFunctionInfo

19.3

Macro Definition Documentation

19.3.1

#define MAKE_VERSION( major, minor, bugfix ) (((major) << 16) |
((minor) << 8) | (bugfix))

19.3.2

#define FSL_FLASH_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

Version 2.1.0.

19.3.3

#define FLASH_SSD_CONFIG_ENABLE_FLEXNVM_SUPPORT 1

Enable FlexNVM support by default.

19.3.4

#define FLASH_DRIVER_IS_FLASH_RESIDENT 1

Used for flash resident application.

19.3.5

#define FLASH_DRIVER_IS_EXPORTED 0

Used for SDK application.
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19.3.6

#define kStatusGroupGeneric 0

19.3.7

#define MAKE_STATUS( group, code ) ((((group)∗100) + (code)))

19.3.8

#define FOUR_CHAR_CODE( a, b, c, d ) (((d) << 24) | ((c) << 16) | ((b)
<< 8) | ((a)))

19.4
19.4.1

Enumeration Type Documentation
enum _flash_driver_version_constants

Enumerator
kFLASH_driverVersionName
kFLASH_driverVersionMajor
kFLASH_driverVersionMinor
kFLASH_driverVersionBugfix

19.4.2

Flash driver version name.
Major flash driver version.
Minor flash driver version.
Bugfix for flash driver version.

enum _flash_status

Enumerator
kStatus_FLASH_Success Api is executed successfully.
kStatus_FLASH_InvalidArgument Invalid argument.
kStatus_FLASH_SizeError Error size.
kStatus_FLASH_AlignmentError Parameter is not aligned with specified baseline.
kStatus_FLASH_AddressError Address is out of range.
kStatus_FLASH_AccessError Invalid instruction codes and out-of bounds addresses.
kStatus_FLASH_ProtectionViolation The program/erase operation is requested to execute on protected areas.
kStatus_FLASH_CommandFailure Run-time error during command execution.
kStatus_FLASH_UnknownProperty Unknown property.
kStatus_FLASH_EraseKeyError Api erase key is invalid.
kStatus_FLASH_RegionExecuteOnly Current region is execute only.
kStatus_FLASH_ExecuteInRamFunctionNotReady Execute-in-ram function is not available.
kStatus_FLASH_PartitionStatusUpdateFailure Failed to update partition status.
kStatus_FLASH_SetFlexramAsEepromError Failed to set flexram as eeprom.
kStatus_FLASH_RecoverFlexramAsRamError Failed to recover flexram as ram.
kStatus_FLASH_SetFlexramAsRamError Failed to set flexram as ram.
kStatus_FLASH_RecoverFlexramAsEepromError Failed to recover flexram as eeprom.
kStatus_FLASH_CommandNotSupported Flash api is not supported.
kStatus_FLASH_SwapSystemNotInUninitialized Swap system is not in uninitialzed state.
kStatus_FLASH_SwapIndicatorAddressError Swap indicator address is invalid.

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19.4.3

enum _flash_driver_api_keys

Note
The resulting value is built with a byte order such that the string being readable in expected order
when viewed in a hex editor, if the value is treated as a 32-bit little endian value.
Enumerator
kFLASH_apiEraseKey Key value used to validate all flash erase APIs.

19.4.4

enum flash_margin_value_t

Enumerator
kFLASH_marginValueNormal Use the ’normal’ read level for 1s.
kFLASH_marginValueUser Apply the ’User’ margin to the normal read-1 level.
kFLASH_marginValueFactory Apply the ’Factory’ margin to the normal read-1 level.
kFLASH_marginValueInvalid Not real margin level, Used to determine the range of valid margin
level.

19.4.5

enum flash_security_state_t

Enumerator
kFLASH_securityStateNotSecure Flash is not secure.
kFLASH_securityStateBackdoorEnabled Flash backdoor is enabled.
kFLASH_securityStateBackdoorDisabled Flash backdoor is disabled.

19.4.6

enum flash_protection_state_t

Enumerator
kFLASH_protectionStateUnprotected Flash region is not protected.
kFLASH_protectionStateProtected Flash region is protected.
kFLASH_protectionStateMixed Flash is mixed with protected and unprotected region.

19.4.7

enum flash_execute_only_access_state_t

Enumerator
kFLASH_accessStateUnLimited Flash region is unLimited.
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kFLASH_accessStateExecuteOnly Flash region is execute only.
kFLASH_accessStateMixed Flash is mixed with unLimited and execute only region.

19.4.8

enum flash_property_tag_t

Enumerator
kFLASH_propertyPflashSectorSize Pflash sector size property.
kFLASH_propertyPflashTotalSize Pflash total size property.
kFLASH_propertyPflashBlockSize Pflash block size property.
kFLASH_propertyPflashBlockCount Pflash block count property.
kFLASH_propertyPflashBlockBaseAddr Pflash block base address property.
kFLASH_propertyPflashFacSupport Pflash fac support property.
kFLASH_propertyPflashAccessSegmentSize Pflash access segment size property.
kFLASH_propertyPflashAccessSegmentCount Pflash access segment count property.
kFLASH_propertyFlexRamBlockBaseAddr FlexRam block base address property.
kFLASH_propertyFlexRamTotalSize FlexRam total size property.
kFLASH_propertyDflashSectorSize Dflash sector size property.
kFLASH_propertyDflashTotalSize Dflash total size property.
kFLASH_propertyDflashBlockSize Dflash block count property.
kFLASH_propertyDflashBlockCount Dflash block base address property.
kFLASH_propertyDflashBlockBaseAddr Eeprom total size property.

19.4.9

enum _flash_execute_in_ram_function_constants

Enumerator
kFLASH_executeInRamFunctionMaxSize Max size of execute-in-ram function.
kFLASH_executeInRamFunctionTotalNum Total number of execute-in-ram functions.

19.4.10

enum flash_read_resource_option_t

Enumerator
kFLASH_resourceOptionFlashIfr Select code for Program flash 0 IFR, Program flash swap 0 IFR,
Data flash 0 IFR.
kFLASH_resourceOptionVersionId Select code for Version ID.

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19.4.11

enum _flash_read_resource_range

Enumerator
kFLASH_resourceRangePflashIfrSizeInBytes Pflash IFR size in byte.
kFLASH_resourceRangeVersionIdSizeInBytes Version ID IFR size in byte.
kFLASH_resourceRangeVersionIdStart Version ID IFR start address.
kFLASH_resourceRangeVersionIdEnd Version ID IFR end address.
kFLASH_resourceRangePflashSwapIfrStart Pflash swap IFR start address.
kFLASH_resourceRangePflashSwapIfrEnd Pflash swap IFR end address.
kFLASH_resourceRangeDflashIfrStart Dflash IFR start address.
kFLASH_resourceRangeDflashIfrEnd Dflash IFR end address.

19.4.12

enum flash_flexram_function_option_t

Enumerator
kFLASH_flexramFunctionOptionAvailableAsRam Option used to make FlexRAM available as RAM.
kFLASH_flexramFunctionOptionAvailableForEeprom Option used to make FlexRAM available
for EEPROM.

19.4.13

enum flash_swap_function_option_t

Enumerator
kFLASH_swapFunctionOptionEnable Option used to enable Swap function.
kFLASH_swapFunctionOptionDisable Option used to Disable Swap function.

19.4.14

enum flash_swap_control_option_t

Enumerator
kFLASH_swapControlOptionIntializeSystem Option used to Intialize Swap System.
kFLASH_swapControlOptionSetInUpdateState Option used to Set Swap in Update State.
kFLASH_swapControlOptionSetInCompleteState Option used to Set Swap in Complete State.
kFLASH_swapControlOptionReportStatus Option used to Report Swap Status.
kFLASH_swapControlOptionDisableSystem Option used to Disable Swap Status.

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enum flash_swap_state_t

19.4.15
Enumerator

kFLASH_swapStateUninitialized Flash swap system is in uninitialized state.
kFLASH_swapStateReady Flash swap system is in ready state.
kFLASH_swapStateUpdate Flash swap system is in update state.
kFLASH_swapStateUpdateErased Flash swap system is in updateErased state.
kFLASH_swapStateComplete Flash swap system is in complete state.
kFLASH_swapStateDisabled Flash swap system is in disabled state.

enum flash_swap_block_status_t

19.4.16
Enumerator

kFLASH_swapBlockStatusLowerHalfProgramBlocksAtZero Swap block status is that lower half
program block at zero.
kFLASH_swapBlockStatusUpperHalfProgramBlocksAtZero Swap block status is that upper half
program block at zero.

enum flash_partition_flexram_load_option_t

19.4.17
Enumerator

kFLASH_partitionFlexramLoadOptionLoadedWithValidEepromData FlexRAM is loaded with
valid EEPROM data during reset sequence.
kFLASH_partitionFlexramLoadOptionNotLoaded FlexRAM is not loaded during reset sequence.

19.5
19.5.1

Function Documentation
status_t FLASH_Init ( flash_config_t ∗ config )

This function checks and initializes Flash module for the other Flash APIs.
Parameters
config

Pointer to storage for the driver runtime state.

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Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_PartitionStatusUpdateFailure

19.5.2

Execute-in-ram function is not available.
Failed to update partition status.

status_t FLASH_SetCallback ( flash_config_t ∗ config, flash_callback_t
callback )

Parameters
config
callback

Pointer to storage for the driver runtime state.
callback function to be stored in driver

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

19.5.3

status_t FLASH_PrepareExecuteInRamFunctions ( flash_config_t ∗ config )

Parameters
config

Pointer to storage for the driver runtime state.

Return values
kStatus_FLASH_Success

Api was executed successfully.

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kStatus_FLASH_InvalidArgument

19.5.4

Invalid argument is provided.

status_t FLASH_EraseAll ( flash_config_t ∗ config, uint32_t key )

Parameters
config
key

Pointer to storage for the driver runtime state.
value used to validate all flash erase APIs.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_EraseKeyError
kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure
kStatus_FLASH_PartitionStatusUpdateFailure

19.5.5

Api erase key is invalid.
Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.
Failed to update partition status

status_t FLASH_Erase ( flash_config_t ∗ config, uint32_t start, uint32_t
lengthInBytes, uint32_t key )

This function erases the appropriate number of flash sectors based on the desired start address and length.

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Parameters
config

Pointer to storage for the driver runtime state.

start

The start address of the desired flash memory to be erased. The start address does not
need to be sector aligned but must be word-aligned.

lengthInBytes

The length, given in bytes (not words or long-words) to be erased. Must be word
aligned.

key

value used to validate all flash erase APIs.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_AlignmentError

Parameter is not aligned with specified baseline.

kStatus_FLASH_AddressError

Address is out of range.

kStatus_FLASH_EraseKeyError

Api erase key is invalid.

kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

19.5.6

Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

status_t FLASH_EraseAllExecuteOnlySegments ( flash_config_t ∗ config,
uint32_t key )

Parameters

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config
key

Pointer to storage for the driver runtime state.
value used to validate all flash erase APIs.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_EraseKeyError
kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure
kStatus_FLASH_PartitionStatusUpdateFailure

Api erase key is invalid.
Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.
Failed to update partition status

Erases all program flash execute-only segments defined by the FXACC registers.
Parameters
config
key

Pointer to storage for the driver runtime state.
value used to validate all flash erase APIs.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_EraseKeyError

Api erase key is invalid.

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kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

19.5.7

Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

status_t FLASH_Program ( flash_config_t ∗ config, uint32_t start, uint32_t
∗ src, uint32_t lengthInBytes )

This function programs the flash memory with desired data for a given flash area as determined by the
start address and length.
Parameters
config
start
src
lengthInBytes

Pointer to storage for the driver runtime state.
The start address of the desired flash memory to be programmed. Must be wordaligned.
Pointer to the source buffer of data that is to be programmed into the flash.
The length, given in bytes (not words or long-words) to be programmed. Must be
word-aligned.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_AlignmentError
kStatus_FLASH_AddressError

Parameter is not aligned with specified baseline.
Address is out of range.

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kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

19.5.8

Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

status_t FLASH_ProgramOnce ( flash_config_t ∗ config, uint32_t index,
uint32_t ∗ src, uint32_t lengthInBytes )

This function programs the Program Once Field with desired data for a given flash area as determined by
the index and length.
Parameters
config

Pointer to storage for the driver runtime state.

index

The index indicating which area of Program Once Field to be programmed.

src

Pointer to the source buffer of data that is to be programmed into the Program Once
Field.

lengthInBytes

The length, given in bytes (not words or long-words) to be programmed. Must be
word-aligned.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError

Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.

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kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

19.5.9

The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

status_t FLASH_ReadOnce ( flash_config_t ∗ config, uint32_t index,
uint32_t ∗ dst, uint32_t lengthInBytes )

This function reads the flash memory with desired location for a given flash area as determined by the start
address and length.
Parameters
config
start
dst
lengthInBytes
option

Pointer to storage for the driver runtime state.
The start address of the desired flash memory to be programmed. Must be wordaligned.
Pointer to the destination buffer of data that is used to store data to be read.
The length, given in bytes (not words or long-words) to be read. Must be wordaligned.
The resource option which indicates which area should be read back.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_AlignmentError
kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation

Parameter is not aligned with specified baseline.
Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.

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kStatus_FLASH_CommandFailure

Run-time error during command execution.

Read Program Once Field through parameters
This function reads the read once feild with given index and length
Parameters
config

Pointer to storage for the driver runtime state.

index

The index indicating the area of program once field to be read.

dst
lengthInBytes

Pointer to the destination buffer of data that is used to store data to be read.
The length, given in bytes (not words or long-words) to be programmed. Must be
word-aligned.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

19.5.10

Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

status_t FLASH_GetSecurityState ( flash_config_t ∗ config,
flash_security_state_t ∗ state )

This function retrieves the current Flash security status, including the security enabling state and the
backdoor key enabling state.
Parameters

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config
state

Pointer to storage for the driver runtime state.
Pointer to the value returned for the current security status code:

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

status_t FLASH_SecurityBypass ( flash_config_t ∗ config, const uint8_t ∗
backdoorKey )

19.5.11

If the MCU is in secured state, this function will unsecure the MCU by comparing the provided backdoor
key with ones in the Flash Configuration Field.
Parameters
config
backdoorKey

Pointer to storage for the driver runtime state.
Pointer to the user buffer containing the backdoor key.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

19.5.12

Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

status_t FLASH_VerifyEraseAll ( flash_config_t ∗ config,
flash_margin_value_t margin )

This function will check to see if the flash have been erased to the specified read margin level.

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Parameters
config
margin

Pointer to storage for the driver runtime state.
Read margin choice

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

status_t FLASH_VerifyErase ( flash_config_t ∗ config, uint32_t start,
uint32_t lengthInBytes, flash_margin_value_t margin )

19.5.13

This function will check the appropriate number of flash sectors based on the desired start address and
length to see if the flash have been erased to the specified read margin level.
Parameters
config

Pointer to storage for the driver runtime state.

start

The start address of the desired flash memory to be verified. The start address does
not need to be sector aligned but must be word-aligned.

lengthInBytes

The length, given in bytes (not words or long-words) to be verified. Must be wordaligned.

margin

Read margin choice

Return values

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kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_AlignmentError

Parameter is not aligned with specified baseline.

kStatus_FLASH_AddressError

Address is out of range.

kStatus_FLASH_ExecuteInRamFunctionNotReady

Execute-in-ram function is not available.

kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

status_t FLASH_VerifyProgram ( flash_config_t ∗ config, uint32_t
start, uint32_t lengthInBytes, const uint32_t ∗ expectedData,
flash_margin_value_t margin, uint32_t ∗ failedAddress, uint32_t ∗
failedData )

19.5.14

This function verifies the data programed in the flash memory using the Flash Program Check Command
and compares it with expected data for a given flash area as determined by the start address and length.
Parameters
config
start

Pointer to storage for the driver runtime state.
The start address of the desired flash memory to be verified. Must be word-aligned.

lengthInBytes

The length, given in bytes (not words or long-words) to be verified. Must be wordaligned.

expectedData

Pointer to the expected data that is to be verified against.

margin
failedAddress

Read margin choice
Pointer to returned failing address.

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failedData

Pointer to returned failing data. Some derivitives do not included failed data as part
of the FCCOBx registers. In this case, zeros are returned upon failure.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_AlignmentError

Parameter is not aligned with specified baseline.

kStatus_FLASH_AddressError

Address is out of range.

kStatus_FLASH_ExecuteInRamFunctionNotReady

Execute-in-ram function is not available.

kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

status_t FLASH_VerifyEraseAllExecuteOnlySegments ( flash_config_t ∗
config, flash_margin_value_t margin )

19.5.15

Parameters
config
margin

Pointer to storage for the driver runtime state.
Read margin choice

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

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kStatus_FLASH_ExecuteInRamFunctionNotReady
kStatus_FLASH_AccessError
kStatus_FLASH_ProtectionViolation
kStatus_FLASH_CommandFailure

Execute-in-ram function is not available.
Invalid instruction codes and out-of bounds addresses.
The program/erase operation is requested to execute on protected areas.
Run-time error during command execution.

status_t FLASH_IsProtected ( flash_config_t ∗ config, uint32_t start,
uint32_t lengthInBytes, flash_protection_state_t ∗ protection_state )

19.5.16

This function retrieves the current Flash protect status for a given flash area as determined by the start
address and length.
Parameters
config
start

Pointer to storage for the driver runtime state.
The start address of the desired flash memory to be checked. Must be word-aligned.

lengthInBytes

The length, given in bytes (not words or long-words) to be checked. Must be wordaligned.

protection_state

Pointer to the value returned for the current protection status code for the desired flash
area.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_AlignmentError
kStatus_FLASH_AddressError

Parameter is not aligned with specified baseline.
Address is out of range.

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status_t FLASH_IsExecuteOnly ( flash_config_t ∗ config, uint32_t start,
uint32_t lengthInBytes, flash_execute_only_access_state_t ∗ access_state )

19.5.17

This function retrieves the current Flash access status for a given flash area as determined by the start
address and length.
Parameters
config
start

Pointer to storage for the driver runtime state.
The start address of the desired flash memory to be checked. Must be word-aligned.

lengthInBytes

The length, given in bytes (not words or long-words) to be checked. Must be wordaligned.

access_state

Pointer to the value returned for the current access status code for the desired flash
area.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_AlignmentError
kStatus_FLASH_AddressError

Parameter is not aligned with specified baseline.
Address is out of range.

status_t FLASH_GetProperty ( flash_config_t ∗ config,
flash_property_tag_t whichProperty, uint32_t ∗ value )

19.5.18

Parameters
config
whichProperty

Pointer to storage for the driver runtime state.
The desired property from the list of properties in enum flash_property_tag_t

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value

Pointer to the value returned for the desired flash property

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_UnknownProperty

unknown property tag

status_t FLASH_PflashSetProtection ( flash_config_t ∗ config, uint32_t
protectStatus )

19.5.19

Parameters
config
protectStatus

Pointer to storage for the driver runtime state.
The expected protect status user wants to set to PFlash protection register. Each bit
is corresponding to protection of 1/32 of the total PFlash. The least significant bit
is corresponding to the lowest address area of P-Flash. The most significant bit is
corresponding to the highest address area of PFlash. There are two possible cases as
shown below: 0: this area is protected. 1: this area is unprotected.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

kStatus_FLASH_CommandFailure

Run-time error during command execution.

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status_t FLASH_PflashGetProtection ( flash_config_t ∗ config, uint32_t ∗
protectStatus )

19.5.20

Parameters
config
protectStatus

Pointer to storage for the driver runtime state.
Protect status returned by PFlash IP. Each bit is corresponding to protection of 1/32
of the total PFlash. The least significant bit is corresponding to the lowest address
area of PFlash. The most significant bit is corresponding to the highest address area
of PFlash. Thee are two possible cases as below: 0: this area is protected. 1: this area
is unprotected.

Return values
kStatus_FLASH_Success

Api was executed successfully.

kStatus_FLASH_InvalidArgument

Invalid argument is provided.

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Chapter 20
FlexBus: External Bus Interface Driver
20.1

Overview

The KSDK provides a peripheral driver for the Crossbar External Bus Interface (FlexBus) block of Kinetis
devices.

20.2

Overview

A multifunction external bus interface is provided on the device with a basic functionality to interface to
slave-only devices. It can be directly connected to the following asynchronous or synchronous devices
with little or no additional circuitry:
•
•
•
•

External ROMs
Flash memories
Programmable logic devices
Other simple target (slave) devices

For asynchronous devices, a simple chip-select based interface can be used. The FlexBus interface has
up to six general purpose chip-selects, FB_CS[5:0]. The actual number of chip selects available depends
upon the device and its pin configuration.

20.3

FlexBus functional operation

To configure the FlexBus driver, use on of the two ways to configure the flexbus_config_t structure.
1. Using the FLEXBUS_GetDefaultConfig() function.
2. Set parameters in the flexbus_config_t structure.
To initialize and configure the FlexBus driver, call the FLEXBUS_Init() function and pass a pointer to the
flexbus_config_t structure.
To De-initialize the FlexBus driver, call the FLEXBUS_Deinit() function.

20.4

Typical use case and example

This example shows how to write/read to external memory (MRAM) by using the FlexBus module.
flexbus_config_t flexbusUserConfig;
FLEXBUS_GetDefaultConfig(&flexbusUserConfig); /* Gets the default configuration.
/* Configure some parameters when using MRAM
flexbusUserConfig.waitStates
= 2U;
/* Wait 2 states
flexbusUserConfig.chipBaseAddress
= MRAM_START_ADDRESS; /* MRAM address for using FlexBus
flexbusUserConfig.chipBaseAddressMask
= 7U;
/* 512 kilobytes memory size
FLEXBUS_Init(FB, &flexbusUserConfig); /* Initializes and configures the FlexBus module
/* Do something
FLEXBUS_Deinit(FB);

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Files
• file fsl_flexbus.h

Data Structures
• struct flexbus_config_t
Configuration structure that the user needs to set. More...

Enumerations
• enum flexbus_port_size_t {
kFLEXBUS_4Bytes = 0x00U,
kFLEXBUS_1Byte = 0x01U,
kFLEXBUS_2Bytes = 0x02U }
Defines port size for FlexBus peripheral.

• enum flexbus_write_address_hold_t {
kFLEXBUS_Hold1Cycle = 0x00U,
kFLEXBUS_Hold2Cycles = 0x01U,
kFLEXBUS_Hold3Cycles = 0x02U,
kFLEXBUS_Hold4Cycles = 0x03U }
Defines number of cycles to hold address and attributes for FlexBus peripheral.

• enum flexbus_read_address_hold_t {
kFLEXBUS_Hold1Or0Cycles = 0x00U,
kFLEXBUS_Hold2Or1Cycles = 0x01U,
kFLEXBUS_Hold3Or2Cycle = 0x02U,
kFLEXBUS_Hold4Or3Cycle = 0x03U }
Defines number of cycles to hold address and attributes for FlexBus peripheral.

• enum flexbus_address_setup_t {
kFLEXBUS_FirstRisingEdge = 0x00U,
kFLEXBUS_SecondRisingEdge = 0x01U,
kFLEXBUS_ThirdRisingEdge = 0x02U,
kFLEXBUS_FourthRisingEdge = 0x03U }
Address setup for FlexBus peripheral.

• enum flexbus_bytelane_shift_t {
kFLEXBUS_NotShifted = 0x00U,
kFLEXBUS_Shifted = 0x01U }
Defines byte-lane shift for FlexBus peripheral.

• enum flexbus_multiplex_group1_t {
kFLEXBUS_MultiplexGroup1_FB_ALE = 0x00U,
kFLEXBUS_MultiplexGroup1_FB_CS1 = 0x01U,
kFLEXBUS_MultiplexGroup1_FB_TS = 0x02U }
Defines multiplex group1 valid signals.

• enum flexbus_multiplex_group2_t {
kFLEXBUS_MultiplexGroup2_FB_CS4 = 0x00U,
kFLEXBUS_MultiplexGroup2_FB_TSIZ0 = 0x01U,
kFLEXBUS_MultiplexGroup2_FB_BE_31_24 = 0x02U }
Defines multiplex group2 valid signals.

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Data Structure Documentation
• enum flexbus_multiplex_group3_t {
kFLEXBUS_MultiplexGroup3_FB_CS5 = 0x00U,
kFLEXBUS_MultiplexGroup3_FB_TSIZ1 = 0x01U,
kFLEXBUS_MultiplexGroup3_FB_BE_23_16 = 0x02U }
Defines multiplex group3 valid signals.

• enum flexbus_multiplex_group4_t {
kFLEXBUS_MultiplexGroup4_FB_TBST = 0x00U,
kFLEXBUS_MultiplexGroup4_FB_CS2 = 0x01U,
kFLEXBUS_MultiplexGroup4_FB_BE_15_8 = 0x02U }
Defines multiplex group4 valid signals.

• enum flexbus_multiplex_group5_t {
kFLEXBUS_MultiplexGroup5_FB_TA = 0x00U,
kFLEXBUS_MultiplexGroup5_FB_CS3 = 0x01U,
kFLEXBUS_MultiplexGroup5_FB_BE_7_0 = 0x02U }
Defines multiplex group5 valid signals.

Driver version
• #define FSL_FLEXBUS_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
Version 2.0.0.

FlexBus functional operation
• void FLEXBUS_Init (FB_Type ∗base, const flexbus_config_t ∗config)
Initializes and configures the FlexBus module.

• void FLEXBUS_Deinit (FB_Type ∗base)
De-initializes a FlexBus instance.

• void FLEXBUS_GetDefaultConfig (flexbus_config_t ∗config)
Initializes the FlexBus configuration structure.

20.5
20.5.1

Data Structure Documentation
struct flexbus_config_t

Data Fields
• uint8_t chip
Chip FlexBus for validation.

• uint8_t waitStates
Value of wait states.

• uint32_t chipBaseAddress
Chip base address for using FlexBus.

• uint32_t chipBaseAddressMask
Chip base address mask.

• bool writeProtect
Write protected.

• bool burstWrite
Burst-Write enable.

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Enumeration Type Documentation
• bool burstRead
Burst-Read enable.

• bool byteEnableMode
Byte-enable mode support.

• bool autoAcknowledge
Auto acknowledge setting.

• bool extendTransferAddress
Extend transfer start/extend address latch enable.

• bool secondaryWaitStates
Secondary wait states number.

• flexbus_port_size_t portSize
Port size of transfer.

• flexbus_bytelane_shift_t byteLaneShift
Byte-lane shift enable.

• flexbus_write_address_hold_t writeAddressHold
Write address hold or deselect option.

• flexbus_read_address_hold_t readAddressHold
Read address hold or deselect option.

• flexbus_address_setup_t addressSetup
Address setup setting.

• flexbus_multiplex_group1_t group1MultiplexControl
FlexBus Signal Group 1 Multiplex control.

• flexbus_multiplex_group2_t group2MultiplexControl
FlexBus Signal Group 2 Multiplex control.

• flexbus_multiplex_group3_t group3MultiplexControl
FlexBus Signal Group 3 Multiplex control.

• flexbus_multiplex_group4_t group4MultiplexControl
FlexBus Signal Group 4 Multiplex control.

• flexbus_multiplex_group5_t group5MultiplexControl
FlexBus Signal Group 5 Multiplex control.

20.6
20.6.1

20.7
20.7.1

Macro Definition Documentation
#define FSL_FLEXBUS_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Enumeration Type Documentation
enum flexbus_port_size_t

Enumerator
kFLEXBUS_4Bytes 32-bit port size
kFLEXBUS_1Byte 8-bit port size
kFLEXBUS_2Bytes 16-bit port size

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Enumeration Type Documentation

20.7.2

enum flexbus_write_address_hold_t

Enumerator
kFLEXBUS_Hold1Cycle Hold address and attributes one cycles after FB_CSn negates on writes.
kFLEXBUS_Hold2Cycles Hold address and attributes two cycles after FB_CSn negates on writes.
kFLEXBUS_Hold3Cycles Hold address and attributes three cycles after FB_CSn negates on writes.
kFLEXBUS_Hold4Cycles Hold address and attributes four cycles after FB_CSn negates on writes.

20.7.3

enum flexbus_read_address_hold_t

Enumerator
kFLEXBUS_Hold1Or0Cycles
kFLEXBUS_Hold2Or1Cycles
kFLEXBUS_Hold3Or2Cycle
kFLEXBUS_Hold4Or3Cycle

20.7.4

Hold address and attributes 1 or 0 cycles on reads.
Hold address and attributes 2 or 1 cycles on reads.
Hold address and attributes 3 or 2 cycles on reads.
Hold address and attributes 4 or 3 cycles on reads.

enum flexbus_address_setup_t

Enumerator
kFLEXBUS_FirstRisingEdge Assert FB_CSn on first rising clock edge after address is asserted.
kFLEXBUS_SecondRisingEdge Assert FB_CSn on second rising clock edge after address is asserted.
kFLEXBUS_ThirdRisingEdge Assert FB_CSn on third rising clock edge after address is asserted.
kFLEXBUS_FourthRisingEdge Assert FB_CSn on fourth rising clock edge after address is asserted.

20.7.5

enum flexbus_bytelane_shift_t

Enumerator
kFLEXBUS_NotShifted Not shifted. Data is left-justified on FB_AD
kFLEXBUS_Shifted Shifted. Data is right justified on FB_AD

20.7.6

enum flexbus_multiplex_group1_t

Enumerator
kFLEXBUS_MultiplexGroup1_FB_ALE FB_ALE.
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Function Documentation
kFLEXBUS_MultiplexGroup1_FB_CS1 FB_CS1.
kFLEXBUS_MultiplexGroup1_FB_TS FB_TS.

20.7.7

enum flexbus_multiplex_group2_t

Enumerator
kFLEXBUS_MultiplexGroup2_FB_CS4 FB_CS4.
kFLEXBUS_MultiplexGroup2_FB_TSIZ0 FB_TSIZ0.
kFLEXBUS_MultiplexGroup2_FB_BE_31_24 FB_BE_31_24.

20.7.8

enum flexbus_multiplex_group3_t

Enumerator
kFLEXBUS_MultiplexGroup3_FB_CS5 FB_CS5.
kFLEXBUS_MultiplexGroup3_FB_TSIZ1 FB_TSIZ1.
kFLEXBUS_MultiplexGroup3_FB_BE_23_16 FB_BE_23_16.

20.7.9

enum flexbus_multiplex_group4_t

Enumerator
kFLEXBUS_MultiplexGroup4_FB_TBST FB_TBST.
kFLEXBUS_MultiplexGroup4_FB_CS2 FB_CS2.
kFLEXBUS_MultiplexGroup4_FB_BE_15_8 FB_BE_15_8.

enum flexbus_multiplex_group5_t

20.7.10
Enumerator

kFLEXBUS_MultiplexGroup5_FB_TA FB_TA.
kFLEXBUS_MultiplexGroup5_FB_CS3 FB_CS3.
kFLEXBUS_MultiplexGroup5_FB_BE_7_0 FB_BE_7_0.

20.8
20.8.1

Function Documentation
void FLEXBUS_Init ( FB_Type ∗ base, const flexbus_config_t ∗ config )

This function enables the clock gate for FlexBus module. Only chip 0 is validated and set to known values.
Other chips are disabled. NOTE: In this function, certain parameters, depending on external memories,
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Function Documentation
must be set before using FLEXBUS_Init() function. This example shows how to set up the uart_state_t and the flexbus_config_t parameters and how to call the FLEXBUS_Init function by passing in these
parameters:
flexbus_config_t flexbusConfig;
FLEXBUS_GetDefaultConfig(&flexbusConfig);
flexbusConfig.waitStates
= 2U;
flexbusConfig.chipBaseAddress
= 0x60000000U;
flexbusConfig.chipBaseAddressMask
= 7U;
FLEXBUS_Init(FB, &flexbusConfig);

Parameters
base
config

20.8.2

FlexBus peripheral address.
Pointer to the configure structure

void FLEXBUS_Deinit ( FB_Type ∗ base )

This function disables the clock gate of the FlexBus module clock.
Parameters
base

20.8.3

FlexBus peripheral address.

void FLEXBUS_GetDefaultConfig ( flexbus_config_t ∗ config )

This function initializes the FlexBus configuration structure to default value. The default values are:
fbConfig->chip
fbConfig->writeProtect
fbConfig->burstWrite
fbConfig->burstRead
fbConfig->byteEnableMode
fbConfig->autoAcknowledge
fbConfig->extendTransferAddress
fbConfig->secondaryWaitStates
fbConfig->byteLaneShift
fbConfig->writeAddressHold
fbConfig->readAddressHold
fbConfig->addressSetup
fbConfig->portSize
fbConfig->group1MultiplexControl
fbConfig->group2MultiplexControl
fbConfig->group3MultiplexControl
fbConfig->group4MultiplexControl
fbConfig->group5MultiplexControl

=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=

0;
0;
0;
0;
0;
true;
0;
0;
kFLEXBUS_NotShifted;
kFLEXBUS_Hold1Cycle;
kFLEXBUS_Hold1Or0Cycles;
kFLEXBUS_FirstRisingEdge;
kFLEXBUS_1Byte;
kFLEXBUS_MultiplexGroup1_FB_ALE;
kFLEXBUS_MultiplexGroup2_FB_CS4 ;
kFLEXBUS_MultiplexGroup3_FB_CS5;
kFLEXBUS_MultiplexGroup4_FB_TBST;
kFLEXBUS_MultiplexGroup5_FB_TA;

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Function Documentation
Parameters
config

Pointer to the initialization structure.

See Also
FLEXBUS_Init

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Chapter 21
FlexCAN: Flex Controller Area Network Driver
21.1

Overview

The KSDK provides a peripheral driver for the Flex Controller Area Network (FlexCAN) module of
Kinetis devices.

Modules
• FlexCAN Driver
• FlexCAN eDMA Driver

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FlexCAN Driver

21.2

FlexCAN Driver

21.2.1

Overview

This section describes the programming interface of the FlexCAN driver. The FlexCAN driver configures
FlexCAN module, provides a functional and transactional interfaces to build the FlexCAN application.

21.2.2
21.2.2.1

Typical use case
Message Buffer Send Operation

flexcan_config_t flexcanConfig;
flexcan_frame_t txFrame;
/* Init FlexCAN module.
FLEXCAN_GetDefaultConfig(&flexcanConfig);
FLEXCAN_Init(EXAMPLE_CAN, &flexcanConfig);
/* Enable FlexCAN module.
FLEXCAN_Enable(EXAMPLE_CAN, true);
/* Sets up the transmit message buffer.
FLEXCAN_SetTxMbConfig(EXAMPLE_CAN, TX_MESSAGE_BUFFER_INDEX, true);
/* Prepares the transmit frame for sending.
txFrame.format = KFLEXCAN_FrameFormatStandard;
txFrame.type
= KFLEXCAN_FrameTypeData;
txFrame.id
= FLEXCAN_ID_STD(0x123);
txFrame.length = 8;
txFrame.dataWord0 = CAN_WORD0_DATA_BYTE_0(0x11) |
CAN_WORD0_DATA_BYTE_1(0x22) |
CAN_WORD0_DATA_BYTE_2(0x33) |
CAN_WORD0_DATA_BYTE_3(0x44);
txFrame.dataWord1 = CAN_WORD1_DATA_BYTE_4(0x55) |
CAN_WORD1_DATA_BYTE_5(0x66) |
CAN_WORD1_DATA_BYTE_6(0x77) |
CAN_WORD1_DATA_BYTE_7(0x88);
/* Writes a transmit message buffer to send a CAN Message.
FLEXCAN_WriteTxMb(EXAMPLE_CAN, TX_MESSAGE_BUFFER_INDEX, &txFrame);
/* Waits until the transmit message buffer is empty.
while (!FLEXCAN_GetMbStatusFlags(EXAMPLE_CAN, 1 << TX_MESSAGE_BUFFER_INDEX));
/* Cleans the transmit message buffer empty status.
FLEXCAN_ClearMbStatusFlags(EXAMPLE_CAN, 1 << TX_MESSAGE_BUFFER_INDEX);

21.2.2.2

Message Buffer Receive Operation

flexcan_config_t flexcanConfig;
flexcan_frame_t rxFrame;
/* Initializes the FlexCAN module.
FLEXCAN_GetDefaultConfig(&flexcanConfig);
FLEXCAN_Init(EXAMPLE_CAN, &flexcanConfig);
/* Enables the FlexCAN module.
FLEXCAN_Enable(EXAMPLE_CAN, true);
/* Sets up the receive message buffer.

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FlexCAN Driver
mbConfig.format
= KFLEXCAN_FrameFormatStandard;
mbConfig.type
= KFLEXCAN_FrameTypeData;
mbConfig.id
= FLEXCAN_ID_STD(0x123);
FLEXCAN_SetRxMbConfig(EXAMPLE_CAN, RX_MESSAGE_BUFFER_INDEX, &mbConfig, true);
/* Waits until the receive message buffer is full.
while (!FLEXCAN_GetMbStatusFlags(EXAMPLE_CAN, 1 << RX_MESSAGE_BUFFER_INDEX));
/* Reads the received message from the receive message buffer.
FLEXCAN_ReadRxMb(EXAMPLE_CAN, RX_MESSAGE_BUFFER_INDEX, &rxFrame);
/* Cleans the receive message buffer full status.
FLEXCAN_ClearMbStatusFlags(EXAMPLE_CAN, 1 << RX_MESSAGE_BUFFER_INDEX);

21.2.2.3

Receive FIFO Operation

uint32_t rxFifoFilter[] = {FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(0x321,
FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(0x321,
FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(0x123,
FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(0x123,
;

0,
1,
0,
1,

0),
0),
0),
0)}

flexcan_config_t flexcanConfig;
flexcan_frame_t rxFrame;
/* Initializes the FlexCAN module.
FLEXCAN_GetDefaultConfig(&flexcanConfig);
FLEXCAN_Init(EXAMPLE_CAN, &flexcanConfig);
/* Enables the FlexCAN module.
FLEXCAN_Enable(EXAMPLE_CAN, true);
/* Sets up the receive FIFO.
rxFifoConfig.idFilterTable = rxFifoFilter;
rxFifoConfig.idFilterType = KFLEXCAN_RxFifoFilterTypeA;
rxFifoConfig.idFilterNum
= sizeof(rxFifoFilter) / sizeof(rxFifoFilter[0]);
rxFifoConfig.priority
= KFLEXCAN_RxFifoPrioHigh;
FlEXCAN_SetRxFifoConfig(EXAMPLE_CAN, &rxFifoConfig, true);
/* Waits until the receive FIFO becomes available.
while (!FLEXCAN_GetMbStatusFlags(EXAMPLE_CAN, KFLEXCAN_RxFifoFrameAvlFlag));
/* Reads the message from the receive FIFO.
FlEXCAN_ReadRxFifo(EXAMPLE_CAN, &rxFrame);
/* Cleans the receive FIFO available status.
FLEXCAN_ClearMbStatusFlags(EXAMPLE_CAN, KFLEXCAN_RxFifoFrameAvlFlag);

Files
• file fsl_flexcan.h

Data Structures
• struct flexcan_frame_t
FlexCAN message frame structure. More...

• struct flexcan_config_t
FlexCAN module configuration structure. More...

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FlexCAN Driver
• struct flexcan_timing_config_t
FlexCAN protocol timing characteristic configuration structure. More...

• struct flexcan_rx_mb_config_t
FlexCAN Receive Message Buffer configuration structure. More...

• struct flexcan_rx_fifo_config_t
FlexCAN Rx FIFO configure structure. More...

• struct flexcan_mb_transfer_t
FlexCAN Message Buffer transfer. More...

• struct flexcan_fifo_transfer_t
FlexCAN Rx FIFO transfer. More...

• struct flexcan_handle_t
FlexCAN handle structure. More...

Macros
• #define FLEXCAN_ID_STD(id) (((uint32_t)(((uint32_t)(id)) << CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK)
FlexCAN Frame ID helper macro.

• #define FLEXCAN_ID_EXT(id)
Extend Frame ID helper macro.

• #define FLEXCAN_RX_MB_STD_MASK(id, rtr, ide)
FlexCAN Rx Message Buffer Mask helper macro.

• #define FLEXCAN_RX_MB_EXT_MASK(id, rtr, ide)
Extend Rx Message Buffer Mask helper macro.

• #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide)
FlexCAN Rx FIFO Mask helper macro.

• #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH(id, rtr, ide)
Standard Rx FIFO Mask helper macro Type B upper part helper macro.

• #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW(id, rtr, ide)
Standard Rx FIFO Mask helper macro Type B lower part helper macro.

• #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(id) ((FLEXCAN_ID_STD(id) &
0x7F8) << 21)
Standard Rx FIFO Mask helper macro Type C upper part helper macro.

• #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(id) ((FLEXCAN_ID_STD(id) & 0x7F8) << 13)
Standard Rx FIFO Mask helper macro Type C mid-upper part helper macro.

• #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(id)
D(id) & 0x7F8) << 5)

((FLEXCAN_ID_ST-

Standard Rx FIFO Mask helper macro Type C mid-lower part helper macro.

• #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id) ((FLEXCAN_ID_STD(id) &
0x7F8) >> 3)
Standard Rx FIFO Mask helper macro Type C lower part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide)
Extend Rx FIFO Mask helper macro Type A helper macro.

• #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH(id, rtr, ide)
Extend Rx FIFO Mask helper macro Type B upper part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW(id, rtr, ide)
Extend Rx FIFO Mask helper macro Type B lower part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id) ((FLEXCAN_ID_EXT(id) &
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FlexCAN Driver
0x1FE00000) << 3)
Extend Rx FIFO Mask helper macro Type C upper part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH(id)
Extend Rx FIFO Mask helper macro Type C mid-upper part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW(id)
Extend Rx FIFO Mask helper macro Type C mid-lower part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id) ((FLEXCAN_ID_EXT(id) &
0x1FE00000) >> 21)
Extend Rx FIFO Mask helper macro Type C lower part helper macro.

• #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(id, rtr, ide) FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide)
FlexCAN Rx FIFO Filter helper macro.

• #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_HIGH(id, rtr, ide)
Standard Rx FIFO Filter helper macro Type B upper part helper macro.

• #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_LOW(id, rtr, ide)
Standard Rx FIFO Filter helper macro Type B lower part helper macro.

• #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_HIGH(id)
Standard Rx FIFO Filter helper macro Type C upper part helper macro.

• #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_HIGH(id)
Standard Rx FIFO Filter helper macro Type C mid-upper part helper macro.

• #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_LOW(id)
Standard Rx FIFO Filter helper macro Type C mid-lower part helper macro.

• #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_LOW(id) FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id)
Standard Rx FIFO Filter helper macro Type C lower part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_A(id, rtr, ide) FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide)
Extend Rx FIFO Filter helper macro Type A helper macro.

• #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_HIGH(id, rtr, ide)
Extend Rx FIFO Filter helper macro Type B upper part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_LOW(id, rtr, ide)
Extend Rx FIFO Filter helper macro Type B lower part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_HIGH(id) FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id)
Extend Rx FIFO Filter helper macro Type C upper part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_HIGH(id)
Extend Rx FIFO Filter helper macro Type C mid-upper part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_LOW(id)
Extend Rx FIFO Filter helper macro Type C mid-lower part helper macro.

• #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_LOW(id) FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id)
Extend Rx FIFO Filter helper macro Type C lower part helper macro.

Typedefs
• typedef void(∗ flexcan_transfer_callback_t )(CAN_Type ∗base, flexcan_handle_t ∗handle, status_t
status, uint32_t result, void ∗userData)
FlexCAN transfer callback function.

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FlexCAN Driver

Enumerations
• enum _flexcan_status {
kStatus_FLEXCAN_TxBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 0),
kStatus_FLEXCAN_TxIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 1),
kStatus_FLEXCAN_TxSwitchToRx,
kStatus_FLEXCAN_RxBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 3),
kStatus_FLEXCAN_RxIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 4),
kStatus_FLEXCAN_RxOverflow = MAKE_STATUS(kStatusGroup_FLEXCAN, 5),
kStatus_FLEXCAN_RxFifoBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 6),
kStatus_FLEXCAN_RxFifoIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 7),
kStatus_FLEXCAN_RxFifoOverflow = MAKE_STATUS(kStatusGroup_FLEXCAN, 8),
kStatus_FLEXCAN_RxFifoWarning = MAKE_STATUS(kStatusGroup_FLEXCAN, 0),
kStatus_FLEXCAN_ErrorStatus = MAKE_STATUS(kStatusGroup_FLEXCAN, 10),
kStatus_FLEXCAN_UnHandled = MAKE_STATUS(kStatusGroup_FLEXCAN, 11) }
FlexCAN transfer status.

• enum flexcan_frame_format_t {
kFLEXCAN_FrameFormatStandard = 0x0U,
kFLEXCAN_FrameFormatExtend = 0x1U }
FlexCAN frame format.

• enum flexcan_frame_type_t {
kFLEXCAN_FrameTypeData = 0x0U,
kFLEXCAN_FrameTypeRemote = 0x1U }
FlexCAN frame type.

• enum flexcan_clock_source_t {
kFLEXCAN_ClkSrcOsc = 0x0U,
kFLEXCAN_ClkSrcPeri = 0x1U }
FlexCAN clock source.

• enum flexcan_rx_fifo_filter_type_t {
kFLEXCAN_RxFifoFilterTypeA = 0x0U,
kFLEXCAN_RxFifoFilterTypeB,
kFLEXCAN_RxFifoFilterTypeC,
kFLEXCAN_RxFifoFilterTypeD = 0x3U }
FlexCAN Rx Fifo Filter type.

• enum flexcan_rx_fifo_priority_t {
kFLEXCAN_RxFifoPrioLow = 0x0U,
kFLEXCAN_RxFifoPrioHigh = 0x1U }
FlexCAN Rx FIFO priority.

• enum _flexcan_interrupt_enable {
kFLEXCAN_BusOffInterruptEnable = CAN_CTRL1_BOFFMSK_MASK,
kFLEXCAN_ErrorInterruptEnable = CAN_CTRL1_ERRMSK_MASK,
kFLEXCAN_RxWarningInterruptEnable = CAN_CTRL1_RWRNMSK_MASK,
kFLEXCAN_TxWarningInterruptEnable = CAN_CTRL1_TWRNMSK_MASK,
kFLEXCAN_WakeUpInterruptEnable = CAN_MCR_WAKMSK_MASK }
FlexCAN interrupt configuration structure, default settings all disabled.

• enum _flexcan_flags {

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FlexCAN Driver
kFLEXCAN_SynchFlag = CAN_ESR1_SYNCH_MASK,
kFLEXCAN_TxWarningIntFlag = CAN_ESR1_TWRNINT_MASK,
kFLEXCAN_RxWarningIntFlag = CAN_ESR1_RWRNINT_MASK,
kFLEXCAN_TxErrorWarningFlag = CAN_ESR1_TXWRN_MASK,
kFLEXCAN_RxErrorWarningFlag = CAN_ESR1_RXWRN_MASK,
kFLEXCAN_IdleFlag = CAN_ESR1_IDLE_MASK,
kFLEXCAN_FaultConfinementFlag = CAN_ESR1_FLTCONF_MASK,
kFLEXCAN_TransmittingFlag = CAN_ESR1_TX_MASK,
kFLEXCAN_ReceivingFlag = CAN_ESR1_RX_MASK,
kFLEXCAN_BusOffIntFlag = CAN_ESR1_BOFFINT_MASK,
kFLEXCAN_ErrorIntFlag = CAN_ESR1_ERRINT_MASK,
kFLEXCAN_WakeUpIntFlag = CAN_ESR1_WAKINT_MASK,
kFLEXCAN_ErrorFlag }
FlexCAN status flags.

• enum _flexcan_error_flags {
kFLEXCAN_StuffingError = CAN_ESR1_STFERR_MASK,
kFLEXCAN_FormError = CAN_ESR1_FRMERR_MASK,
kFLEXCAN_CrcError = CAN_ESR1_CRCERR_MASK,
kFLEXCAN_AckError = CAN_ESR1_ACKERR_MASK,
kFLEXCAN_Bit0Error = CAN_ESR1_BIT0ERR_MASK,
kFLEXCAN_Bit1Error = CAN_ESR1_BIT1ERR_MASK }
FlexCAN error status flags.

• enum _flexcan_rx_fifo_flags {
kFLEXCAN_RxFifoOverflowFlag = CAN_IFLAG1_BUF7I_MASK,
kFLEXCAN_RxFifoWarningFlag = CAN_IFLAG1_BUF6I_MASK,
kFLEXCAN_RxFifoFrameAvlFlag = CAN_IFLAG1_BUF5I_MASK }
FlexCAN Rx FIFO status flags.

Driver version
• #define FLEXCAN_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
FlexCAN driver version 2.1.0.

Initialization and deinitialization
• void FLEXCAN_Init (CAN_Type ∗base, const flexcan_config_t ∗config, uint32_t sourceClock_Hz)
Initializes a FlexCAN instance.

• void FLEXCAN_Deinit (CAN_Type ∗base)
De-initializes a FlexCAN instance.

• void FLEXCAN_GetDefaultConfig (flexcan_config_t ∗config)
Get the default configuration structure.

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FlexCAN Driver

Configuration.
• void FLEXCAN_SetTimingConfig (CAN_Type ∗base, const flexcan_timing_config_t ∗config)
Sets the FlexCAN protocol timing characteristic.

• void FlEXCAN_SetRxMbGlobalMask (CAN_Type ∗base, uint32_t mask)
Sets the FlexCAN receive message buffer global mask.

• void FlEXCAN_SetRxFifoGlobalMask (CAN_Type ∗base, uint32_t mask)
Sets the FlexCAN receive FIFO global mask.

• void FlEXCAN_SetRxIndividualMask (CAN_Type ∗base, uint8_t maskIdx, uint32_t mask)
Sets the FlexCAN receive individual mask.

• void FLEXCAN_SetTxMbConfig (CAN_Type ∗base, uint8_t mbIdx, bool enable)
Configures a FlexCAN transmit message buffer.

• void FLEXCAN_SetRxMbConfig (CAN_Type ∗base, uint8_t mbIdx, const flexcan_rx_mb_config_t ∗config, bool enable)
Configures a FlexCAN Receive Message Buffer.

• void FlEXCAN_SetRxFifoConfig (CAN_Type ∗base, const flexcan_rx_fifo_config_t ∗config, bool
enable)
Configures the FlexCAN Rx FIFO.

Status
• static uint32_t FLEXCAN_GetStatusFlags (CAN_Type ∗base)
Gets the FlexCAN module interrupt flags.

• static void FLEXCAN_ClearStatusFlags (CAN_Type ∗base, uint32_t mask)
Clears status flags with the provided mask.

• static void FlEXCAN_GetBusErrCount (CAN_Type ∗base, uint8_t ∗txErrBuf, uint8_t ∗rxErrBuf)
Gets the FlexCAN Bus Error Counter value.

• static uint32_t FLEXCAN_GetMbStatusFlags (CAN_Type ∗base, uint32_t mask)
Gets the FlexCAN Message Buffer interrupt flags.

• static void FLEXCAN_ClearMbStatusFlags (CAN_Type ∗base, uint32_t mask)
Clears the FlexCAN Message Buffer interrupt flags.

Interrupts
• static void FLEXCAN_EnableInterrupts (CAN_Type ∗base, uint32_t mask)
Enables FlexCAN interrupts according to provided mask.

• static void FLEXCAN_DisableInterrupts (CAN_Type ∗base, uint32_t mask)
Disables FlexCAN interrupts according to provided mask.

• static void FLEXCAN_EnableMbInterrupts (CAN_Type ∗base, uint32_t mask)
Enables FlexCAN Message Buffer interrupts.

• static void FLEXCAN_DisableMbInterrupts (CAN_Type ∗base, uint32_t mask)
Disables FlexCAN Message Buffer interrupts.

Bus Operations
• static void FLEXCAN_Enable (CAN_Type ∗base, bool enable)
Enables or disables the FlexCAN module operation.

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FlexCAN Driver
• status_t FLEXCAN_WriteTxMb (CAN_Type ∗base, uint8_t mbIdx, const flexcan_frame_t ∗txFrame)
Writes a FlexCAN Message to Transmit Message Buffer.

• status_t FLEXCAN_ReadRxMb (CAN_Type ∗base, uint8_t mbIdx, flexcan_frame_t ∗rxFrame)
Reads a FlexCAN Message from Receive Message Buffer.

• status_t FlEXCAN_ReadRxFifo (CAN_Type ∗base, flexcan_frame_t ∗rxFrame)
Reads a FlexCAN Message from Rx FIFO.

Transactional
• status_t FlEXCAN_TransferSendBlocking (CAN_Type ∗base, uint8_t mbIdx, flexcan_frame_t ∗txFrame)
Performs a polling send transaction on the CAN bus.

• status_t FlEXCAN_TransferReceiveBlocking (CAN_Type ∗base, uint8_t mbIdx, flexcan_frame_t
∗rxFrame)
Performs a polling receive transaction on the CAN bus.

• status_t FlEXCAN_TransferReceiveFifoBlocking (CAN_Type ∗base, flexcan_frame_t ∗rxFrame)
Performs a polling receive transaction from Rx FIFO on the CAN bus.

• void FLEXCAN_TransferCreateHandle (CAN_Type ∗base, flexcan_handle_t ∗handle, flexcan_transfer_callback_t callback, void ∗userData)
Initializes the FlexCAN handle.

• status_t FLEXCAN_TransferSendNonBlocking (CAN_Type ∗base, flexcan_handle_t ∗handle,
flexcan_mb_transfer_t ∗xfer)
Sends a message using IRQ.

• status_t FLEXCAN_TransferReceiveNonBlocking (CAN_Type ∗base, flexcan_handle_t ∗handle,
flexcan_mb_transfer_t ∗xfer)
Receives a message using IRQ.

• status_t FLEXCAN_TransferReceiveFifoNonBlocking (CAN_Type ∗base,
t ∗handle, flexcan_fifo_transfer_t ∗xfer)

flexcan_handle_-

Receives a message from Rx FIFO using IRQ.

• void FLEXCAN_TransferAbortSend (CAN_Type ∗base, flexcan_handle_t ∗handle, uint8_t mbIdx)
Aborts the interrupt driven message send process.

• void FLEXCAN_TransferAbortReceive (CAN_Type ∗base, flexcan_handle_t ∗handle, uint8_t mbIdx)
Aborts the interrupt driven message receive process.

• void FLEXCAN_TransferAbortReceiveFifo (CAN_Type ∗base, flexcan_handle_t ∗handle)
Aborts the interrupt driven message receive from Rx FIFO process.

• void FLEXCAN_TransferHandleIRQ (CAN_Type ∗base, flexcan_handle_t ∗handle)
FlexCAN IRQ handle function.

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FlexCAN Driver

21.2.3
21.2.3.1

Data Structure Documentation
struct flexcan_frame_t

21.2.3.1.0.47

Field Documentation

21.2.3.1.0.47.1

uint32_t flexcan_frame_t::timestamp

21.2.3.1.0.47.2

uint32_t flexcan_frame_t::length

21.2.3.1.0.47.3

uint32_t flexcan_frame_t::type

21.2.3.1.0.47.4

uint32_t flexcan_frame_t::format

21.2.3.1.0.47.5

uint32_t flexcan_frame_t::reserve1

21.2.3.1.0.47.6

uint32_t flexcan_frame_t::idhit

21.2.3.1.0.47.7

uint32_t flexcan_frame_t::id

21.2.3.1.0.47.8

uint32_t flexcan_frame_t::reserve2

21.2.3.1.0.47.9

uint32_t flexcan_frame_t::dataWord0

21.2.3.1.0.47.10

uint32_t flexcan_frame_t::dataWord1

21.2.3.1.0.47.11

uint8_t flexcan_frame_t::dataByte3

21.2.3.1.0.47.12

uint8_t flexcan_frame_t::dataByte2

21.2.3.1.0.47.13

uint8_t flexcan_frame_t::dataByte1

21.2.3.1.0.47.14

uint8_t flexcan_frame_t::dataByte0

21.2.3.1.0.47.15

uint8_t flexcan_frame_t::dataByte7

21.2.3.1.0.47.16

uint8_t flexcan_frame_t::dataByte6

21.2.3.1.0.47.17

uint8_t flexcan_frame_t::dataByte5

21.2.3.1.0.47.18

uint8_t flexcan_frame_t::dataByte4

21.2.3.2

struct flexcan_config_t

Data Fields

• uint32_t baudRate
FlexCAN baud rate in bps.

• flexcan_clock_source_t clkSrc
Clock source for FlexCAN Protocol Engine.

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FlexCAN Driver
• uint8_t maxMbNum
The maximum number of Message Buffers used by user.

• bool enableLoopBack
Enable or Disable Loop Back Self Test Mode.

• bool enableSelfWakeup
Enable or Disable Self Wakeup Mode.

• bool enableIndividMask
Enable or Disable Rx Individual Mask.
21.2.3.2.0.48
21.2.3.2.0.48.1

Field Documentation
uint32_t flexcan_config_t::baudRate

21.2.3.2.0.48.2 flexcan_clock_source_t flexcan_config_t::clkSrc
21.2.3.2.0.48.3

uint8_t flexcan_config_t::maxMbNum

21.2.3.2.0.48.4

bool flexcan_config_t::enableLoopBack

21.2.3.2.0.48.5

bool flexcan_config_t::enableSelfWakeup

21.2.3.2.0.48.6

bool flexcan_config_t::enableIndividMask

21.2.3.3

struct flexcan_timing_config_t

Data Fields

• uint8_t preDivider
Clock Pre-scaler Division Factor.

• uint8_t rJumpwidth
Re-sync Jump Width.

• uint8_t phaseSeg1
Phase Segment 1.

• uint8_t phaseSeg2
Phase Segment 2.

• uint8_t propSeg
Propagation Segment.

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FlexCAN Driver
21.2.3.3.0.49

Field Documentation

21.2.3.3.0.49.1

uint8_t flexcan_timing_config_t::preDivider

21.2.3.3.0.49.2

uint8_t flexcan_timing_config_t::rJumpwidth

21.2.3.3.0.49.3

uint8_t flexcan_timing_config_t::phaseSeg1

21.2.3.3.0.49.4

uint8_t flexcan_timing_config_t::phaseSeg2

21.2.3.3.0.49.5

uint8_t flexcan_timing_config_t::propSeg

21.2.3.4

struct flexcan_rx_mb_config_t

This structure is used as the parameter of FLEXCAN_SetRxMbConfig() function. The FLEXCAN_SetRxMbConfig() function is used to configure FlexCAN Receive Message Buffer. The function abort
previous receiving process, clean the Message Buffer and activate the Rx Message Buffer using given
Message Buffer setting.
Data Fields

• uint32_t id
CAN Message Buffer Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD()
macro.

• flexcan_frame_format_t format
CAN Frame Identifier format(Standard of Extend).

• flexcan_frame_type_t type
CAN Frame Type(Data or Remote).
21.2.3.4.0.50
21.2.3.4.0.50.1

Field Documentation
uint32_t flexcan_rx_mb_config_t::id

21.2.3.4.0.50.2 flexcan_frame_format_t flexcan_rx_mb_config_t::format
21.2.3.4.0.50.3 flexcan_frame_type_t flexcan_rx_mb_config_t::type

21.2.3.5

struct flexcan_rx_fifo_config_t

Data Fields

• uint32_t ∗ idFilterTable
Pointer to FlexCAN Rx FIFO identifier filter table.

• uint8_t idFilterNum
The quantity of filter elements.

• flexcan_rx_fifo_filter_type_t idFilterType
The FlexCAN Rx FIFO Filter type.

• flexcan_rx_fifo_priority_t priority
The FlexCAN Rx FIFO receive priority.

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FlexCAN Driver
21.2.3.5.0.51

Field Documentation

21.2.3.5.0.51.1

uint32_t∗ flexcan_rx_fifo_config_t::idFilterTable

21.2.3.5.0.51.2

uint8_t flexcan_rx_fifo_config_t::idFilterNum

21.2.3.5.0.51.3 flexcan_rx_fifo_filter_type_t flexcan_rx_fifo_config_t::idFilterType
21.2.3.5.0.51.4 flexcan_rx_fifo_priority_t flexcan_rx_fifo_config_t::priority

21.2.3.6

struct flexcan_mb_transfer_t

Data Fields

• flexcan_frame_t ∗ frame
The buffer of CAN Message to be transfer.

• uint8_t mbIdx
The index of Message buffer used to transfer Message.
21.2.3.6.0.52

Field Documentation

21.2.3.6.0.52.1 flexcan_frame_t∗ flexcan_mb_transfer_t::frame
21.2.3.6.0.52.2

21.2.3.7

uint8_t flexcan_mb_transfer_t::mbIdx

struct flexcan_fifo_transfer_t

Data Fields

• flexcan_frame_t ∗ frame
The buffer of CAN Message to be received from Rx FIFO.
21.2.3.7.0.53

Field Documentation

21.2.3.7.0.53.1 flexcan_frame_t∗ flexcan_fifo_transfer_t::frame

21.2.3.8

struct _flexcan_handle

FlexCAN handle structure definition.
Data Fields

• flexcan_transfer_callback_t callback
Callback function.

• void ∗ userData
FlexCAN callback function parameter.

• flexcan_frame_t ∗volatile mbFrameBuf [CAN_WORD1_COUNT]
The buffer for received data from Message Buffers.

• flexcan_frame_t ∗volatile rxFifoFrameBuf
The buffer for received data from Rx FIFO.

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FlexCAN Driver
• volatile uint8_t mbState [CAN_WORD1_COUNT]
Message Buffer transfer state.

• volatile uint8_t rxFifoState
Rx FIFO transfer state.
21.2.3.8.0.54

Field Documentation

21.2.3.8.0.54.1 flexcan_transfer_callback_t flexcan_handle_t::callback
21.2.3.8.0.54.2

void∗ flexcan_handle_t::userData

21.2.3.8.0.54.3 flexcan_frame_t∗ volatile flexcan_handle_t::mbFrameBuf[CAN_WORD1_COUNT]
21.2.3.8.0.54.4 flexcan_frame_t∗ volatile flexcan_handle_t::rxFifoFrameBuf
21.2.3.8.0.54.5

volatile uint8_t flexcan_handle_t::mbState[CAN_WORD1_COUNT]

21.2.3.8.0.54.6

volatile uint8_t flexcan_handle_t::rxFifoState

21.2.4

Macro Definition Documentation

21.2.4.1

#define FLEXCAN_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

21.2.4.2

#define FLEXCAN_ID_STD( id ) (((uint32_t)(((uint32_t)(id)) <<
CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK)

Standard Frame ID helper macro.
21.2.4.3

#define FLEXCAN_ID_EXT( id )

Value:
(((uint32_t)(((uint32_t)(id)) << CAN_ID_EXT_SHIFT)) & \
(CAN_ID_EXT_MASK | CAN_ID_STD_MASK))

21.2.4.4

#define FLEXCAN_RX_MB_STD_MASK( id, rtr, ide )

Value:
(((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
FLEXCAN_ID_STD(id))

Standard Rx Message Buffer Mask helper macro.

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FlexCAN Driver
21.2.4.5

#define FLEXCAN_RX_MB_EXT_MASK( id, rtr, ide )

Value:
(((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
FLEXCAN_ID_EXT(id))

21.2.4.6

#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_A( id, rtr, ide )

Value:
(((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
(FLEXCAN_ID_STD(id) << 1))

Standard Rx FIFO Mask helper macro Type A helper macro.
21.2.4.7

#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH( id, rtr, ide )

Value:
(((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
(FLEXCAN_ID_STD(id) << 16))

21.2.4.8

#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW( id, rtr, ide )

Value:
(((uint32_t)((uint32_t)(rtr) << 15) | (uint32_t)((uint32_t)(ide) << 14)) | \
FLEXCAN_ID_STD(id))

21.2.4.9

21.2.4.10

#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(
) ((FLEXCAN_ID_STD(id) & 0x7F8) << 21)

id

#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(
) ((FLEXCAN_ID_STD(id) & 0x7F8) << 13)

id

\

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FlexCAN Driver
21.2.4.11

#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(
) ((FLEXCAN_ID_STD(id) & 0x7F8) << 5)

id

21.2.4.12

#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(
) ((FLEXCAN_ID_STD(id) & 0x7F8) >> 3)

21.2.4.13

#define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A( id, rtr, ide )

id

Value:
(((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
(FLEXCAN_ID_EXT(id) << 1))

21.2.4.14

#define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH( id, rtr, ide )

Value:
(

\
((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
((FLEXCAN_ID_EXT(id) & 0x1FFF8000)
\
<< 1))

21.2.4.15

#define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW( id, rtr, ide )

Value:
(((uint32_t)((uint32_t)(rtr) << 15) | (uint32_t)((uint32_t)(ide) << 14)) | \
((FLEXCAN_ID_EXT(id) & 0x1FFF8000) >>
15))

\

21.2.4.16

#define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(
) ((FLEXCAN_ID_EXT(id) & 0x1FE00000) << 3)

id

21.2.4.17

#define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH( id )

Value:
((FLEXCAN_ID_EXT(id) & 0x1FE00000) >>
5)

\

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FlexCAN Driver
21.2.4.18

#define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW( id )

Value:
\

((FLEXCAN_ID_EXT(id) & 0x1FE00000) >>
13)

21.2.4.19

#define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(
) ((FLEXCAN_ID_EXT(id) & 0x1FE00000) >> 21)

id

21.2.4.20

#define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A( id, rtr,
) FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide)

ide

Standard Rx FIFO Filter helper macro Type A helper macro.
21.2.4.21

#define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_HIGH( id, rtr, ide )

Value:
\

FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH(
id, rtr, ide)

21.2.4.22

#define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_LOW( id, rtr, ide )

Value:
\

FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW(
id, rtr, ide)

21.2.4.23

#define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_HIGH( id )

Value:
FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(
id)

21.2.4.24

\

#define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_HIGH( id )

Value:
FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(
id)

\

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FlexCAN Driver
21.2.4.25

#define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_LOW( id )

Value:
FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(
id)

21.2.4.26

\

#define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_LOW(
) FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id)

id

\
21.2.4.27

#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_A( id, rtr,
) FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide)

ide

21.2.4.28

#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_HIGH( id, rtr, ide )

Value:
\

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH(
id, rtr, ide)

21.2.4.29

#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_LOW( id, rtr, ide )

Value:
\

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW(
id, rtr, ide)

21.2.4.30

#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_HIGH( id
) FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id)

\
21.2.4.31

#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_HIGH( id )

Value:
FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH(
id)

\

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FlexCAN Driver
21.2.4.32

#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_LOW( id )

Value:
FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW(
id)

21.2.4.33

21.2.5

\

#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_LOW(
) FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id)

id

Typedef Documentation
typedef void(∗ flexcan_transfer_callback_t)(CAN_Type ∗base, flexcan_handle_t
∗handle, status_t status, uint32_t result, void ∗userData)

21.2.5.1

The FlexCAN transfer callback returns a value from the underlying layer. If the status equals to kStatus_FLEXCAN_ErrorStatus, the result parameter is the Content of FlexCAN status register which can be
used to get the working status(or error status) of FlexCAN module. If the status equals to other FlexCAN
Message Buffer transfer status, the result is the index of Message Buffer that generate transfer event. If
the status equals to other FlexCAN Message Buffer transfer status, the result is meaningless and should
be Ignored.

21.2.6

Enumeration Type Documentation

21.2.6.1

enum _flexcan_status

Enumerator
kStatus_FLEXCAN_TxBusy Tx Message Buffer is Busy.
kStatus_FLEXCAN_TxIdle Tx Message Buffer is Idle.
kStatus_FLEXCAN_TxSwitchToRx Remote Message is send out and Message buffer changed to
Receive one.
kStatus_FLEXCAN_RxBusy Rx Message Buffer is Busy.
kStatus_FLEXCAN_RxIdle Rx Message Buffer is Idle.
kStatus_FLEXCAN_RxOverflow Rx Message Buffer is Overflowed.
kStatus_FLEXCAN_RxFifoBusy Rx Message FIFO is Busy.
kStatus_FLEXCAN_RxFifoIdle Rx Message FIFO is Idle.
kStatus_FLEXCAN_RxFifoOverflow Rx Message FIFO is overflowed.
kStatus_FLEXCAN_RxFifoWarning Rx Message FIFO is almost overflowed.
kStatus_FLEXCAN_ErrorStatus FlexCAN Module Error and Status.
kStatus_FLEXCAN_UnHandled UnHadled Interrupt asserted.

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FlexCAN Driver
21.2.6.2

enum flexcan_frame_format_t

Enumerator
kFLEXCAN_FrameFormatStandard Standard frame format attribute.
kFLEXCAN_FrameFormatExtend Extend frame format attribute.

21.2.6.3

enum flexcan_frame_type_t

Enumerator
kFLEXCAN_FrameTypeData Data frame type attribute.
kFLEXCAN_FrameTypeRemote Remote frame type attribute.

21.2.6.4

enum flexcan_clock_source_t

Enumerator
kFLEXCAN_ClkSrcOsc FlexCAN Protocol Engine clock from Oscillator.
kFLEXCAN_ClkSrcPeri FlexCAN Protocol Engine clock from Peripheral Clock.

21.2.6.5

enum flexcan_rx_fifo_filter_type_t

Enumerator
kFLEXCAN_RxFifoFilterTypeA
kFLEXCAN_RxFifoFilterTypeB
Table element.
kFLEXCAN_RxFifoFilterTypeC
ble element.
kFLEXCAN_RxFifoFilterTypeD

21.2.6.6

One full ID (standard and extended) per ID Filter element.
Two full standard IDs or two partial 14-bit ID slices per ID Filter
Four partial 8-bit Standard or extended ID slices per ID Filter TaAll frames rejected.

enum flexcan_rx_fifo_priority_t

The matching process starts from the Rx MB(or Rx FIFO) with higher priority. If no MB(or Rx FIFO
filter) is satisfied, the matching process goes on with the Rx FIFO(or Rx MB) with lower priority.
Enumerator
kFLEXCAN_RxFifoPrioLow Matching process start from Rx Message Buffer first.
kFLEXCAN_RxFifoPrioHigh Matching process start from Rx FIFO first.

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FlexCAN Driver
21.2.6.7

enum _flexcan_interrupt_enable

This structure contains the settings for all of the FlexCAN Module interrupt configurations. Note: FlexCAN Message Buffers and Rx FIFO have their own interrupts.
Enumerator
kFLEXCAN_BusOffInterruptEnable Bus Off interrupt.
kFLEXCAN_ErrorInterruptEnable Error interrupt.
kFLEXCAN_RxWarningInterruptEnable Rx Warning interrupt.
kFLEXCAN_TxWarningInterruptEnable Tx Warning interrupt.
kFLEXCAN_WakeUpInterruptEnable Wake Up interrupt.

21.2.6.8

enum _flexcan_flags

This provides constants for the FlexCAN status flags for use in the FlexCAN functions. Note: The CPU
read action clears FlEXCAN_ErrorFlag, therefore user need to read FlEXCAN_ErrorFlag and distinguish
which error is occur using _flexcan_error_flags enumerations.
Enumerator
kFLEXCAN_SynchFlag CAN Synchronization Status.
kFLEXCAN_TxWarningIntFlag Tx Warning Interrupt Flag.
kFLEXCAN_RxWarningIntFlag Rx Warning Interrupt Flag.
kFLEXCAN_TxErrorWarningFlag Tx Error Warning Status.
kFLEXCAN_RxErrorWarningFlag Rx Error Warning Status.
kFLEXCAN_IdleFlag CAN IDLE Status Flag.
kFLEXCAN_FaultConfinementFlag Fault Confinement State Flag.
kFLEXCAN_TransmittingFlag FlexCAN In Transmission Status.
kFLEXCAN_ReceivingFlag FlexCAN In Reception Status.
kFLEXCAN_BusOffIntFlag Bus Off Interrupt Flag.
kFLEXCAN_ErrorIntFlag Error Interrupt Flag.
kFLEXCAN_WakeUpIntFlag Wake-Up Interrupt Flag.
kFLEXCAN_ErrorFlag All FlexCAN Error Status.

21.2.6.9

enum _flexcan_error_flags

The FlexCAN Error Status enumerations is used to report current error of the FlexCAN bus. This enumerations should be used with KFLEXCAN_ErrorFlag in _flexcan_flags enumerations to ditermine which
error is generated.
Enumerator
kFLEXCAN_StuffingError Stuffing Error.
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kFLEXCAN_FormError Form Error.
kFLEXCAN_CrcError Cyclic Redundancy Check Error.
kFLEXCAN_AckError Received no ACK on transmission.
kFLEXCAN_Bit0Error Unable to send dominant bit.
kFLEXCAN_Bit1Error Unable to send recessive bit.

21.2.6.10

enum _flexcan_rx_fifo_flags

The FlexCAN Rx FIFO Status enumerations are used to determine the status of the Rx FIFO. Because Rx
FIFO occupy the MB0 ∼ MB7 (Rx Fifo filter also occupies more Message Buffer space), Rx FIFO status
flags are mapped to the corresponding Message Buffer status flags.
Enumerator
kFLEXCAN_RxFifoOverflowFlag Rx FIFO overflow flag.
kFLEXCAN_RxFifoWarningFlag Rx FIFO almost full flag.
kFLEXCAN_RxFifoFrameAvlFlag Frames available in Rx FIFO flag.

21.2.7

Function Documentation

21.2.7.1

void FLEXCAN_Init ( CAN_Type ∗ base, const flexcan_config_t ∗ config, uint32_t
sourceClock_Hz )

This function initializes the FlexCAN module with user-defined settings. This example shows how to
set up the flexcan_config_t parameters and how to call the FLEXCAN_Init function by passing in these
parameters:
flexcan_config_t flexcanConfig;
flexcanConfig.clkSrc
= KFLEXCAN_ClkSrcOsc;
flexcanConfig.baudRate
= 125000U;
flexcanConfig.maxMbNum
= 16;
flexcanConfig.enableLoopBack
= false;
flexcanConfig.enableSelfWakeup = false;
flexcanConfig.enableIndividMask = false;
flexcanConfig.enableDoze
= false;
FLEXCAN_Init(CAN0, &flexcanConfig, 8000000UL);

Parameters
base

FlexCAN peripheral base address.

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config
sourceClock_Hz

Pointer to user-defined configuration structure.
FlexCAN Protocol Engine clock source frequency in Hz.

void FLEXCAN_Deinit ( CAN_Type ∗ base )

21.2.7.2

This function disable the FlexCAN module clock and set all register value to reset value.
Parameters
base

FlexCAN peripheral base address.

void FLEXCAN_GetDefaultConfig ( flexcan_config_t ∗ config )

21.2.7.3

This function initializes the FlexCAN configure structure to default value. The default value are: flexcanConfig->clkSrc = KFLEXCAN_ClkSrcOsc; flexcanConfig->baudRate = 125000U; flexcanConfig>maxMbNum = 16; flexcanConfig->enableLoopBack = false; flexcanConfig->enableSelfWakeup =
false; flexcanConfig->enableIndividMask = false; flexcanConfig->enableDoze = false;
Parameters
config

Pointer to FlexCAN configuration structure.

void FLEXCAN_SetTimingConfig ( CAN_Type ∗ base, const
flexcan_timing_config_t ∗ config )

21.2.7.4

This function gives user settings to CAN bus timing characteristic. The function is for an experienced
user. For less experienced users, call the FLEXCAN_Init() and fill the baud rate field with a desired value.
This provides the default timing characteristics to the module.
Note that calling FLEXCAN_SetTimingConfig() overrides the baud rate set in FLEXCAN_Init().
Parameters
base
config

21.2.7.5

FlexCAN peripheral base address.
Pointer to the timing configuration structure.

void FlEXCAN_SetRxMbGlobalMask ( CAN_Type ∗ base, uint32_t mask )

This function sets the global mask for FlexCAN message buffer in a matching process. The configuration
is only effective when the Rx individual mask is disabled in the FLEXCAN_Init().
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Parameters
base

FlexCAN peripheral base address.

mask

Rx Message Buffer Global Mask value.

void FlEXCAN_SetRxFifoGlobalMask ( CAN_Type ∗ base, uint32_t mask )

21.2.7.6

This function sets the global mask for FlexCAN FIFO in a matching process.
Parameters
base

FlexCAN peripheral base address.

mask

Rx Fifo Global Mask value.

void FlEXCAN_SetRxIndividualMask ( CAN_Type ∗ base, uint8_t maskIdx,
uint32_t mask )

21.2.7.7

This function sets the individual mask for FlexCAN matching process. The configuration is only effective
when the Rx individual mask is enabled in FLEXCAN_Init(). If Rx FIFO is disabled, the individual mask
is applied to the corresponding Message Buffer. If Rx FIFO is enabled, the individual mask for Rx FIFO
occupied Message Buffer is applied to the Rx Filter with same index. What calls for special attention is
that only the first 32 individual masks can be used as Rx FIFO filter mask.
Parameters
base
maskIdx
mask

21.2.7.8

FlexCAN peripheral base address.
The Index of individual Mask.
Rx Individual Mask value.

void FLEXCAN_SetTxMbConfig ( CAN_Type ∗ base, uint8_t mbIdx, bool enable
)

This function aborts the previous transmission, cleans the Message Buffer, and configures it as a Transmit
Message Buffer.
Parameters

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FlexCAN Driver
base

FlexCAN peripheral base address.

mbIdx

The Message Buffer index.

enable

Enable/Disable Tx Message Buffer.
• true: Enable Tx Message Buffer.
• false: Disable Tx Message Buffer.

void FLEXCAN_SetRxMbConfig ( CAN_Type ∗ base, uint8_t mbIdx, const
flexcan_rx_mb_config_t ∗ config, bool enable )

21.2.7.9

This function cleans a FlexCAN build-in Message Buffer and configures it as a Receive Message Buffer.
Parameters
base

FlexCAN peripheral base address.

mbIdx

The Message Buffer index.

config

Pointer to FlexCAN Message Buffer configuration structure.

enable

Enable/Disable Rx Message Buffer.
• true: Enable Rx Message Buffer.
• false: Disable Rx Message Buffer.

void FlEXCAN_SetRxFifoConfig ( CAN_Type ∗ base, const
flexcan_rx_fifo_config_t ∗ config, bool enable )

21.2.7.10

This function configures the Rx FIFO with given Rx FIFO configuration.
Parameters
base

FlexCAN peripheral base address.

config

Pointer to FlexCAN Rx FIFO configuration structure.

enable

Enable/Disable Rx FIFO.
• true: Enable Rx FIFO.
• false: Disable Rx FIFO.

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21.2.7.11

static uint32_t FLEXCAN_GetStatusFlags ( CAN_Type ∗ base ) [inline],

[static]
This function gets all FlexCAN status flags. The flags are returned as the logical OR value of the enumerators _flexcan_flags. To check the specific status, compare the return value with enumerators in _flexcan_flags.
Parameters
base

FlexCAN peripheral base address.

Returns
FlexCAN status flags which are ORed by the enumerators in the _flexcan_flags.

21.2.7.12

static void FLEXCAN_ClearStatusFlags ( CAN_Type ∗ base, uint32_t mask )
[inline], [static]

This function clears the FlexCAN status flags with a provided mask. An automatically cleared flag can’t
be cleared by this function.
Parameters

21.2.7.13

base

FlexCAN peripheral base address.

mask

The status flags to be cleared, it is logical OR value of _flexcan_flags.

static void FlEXCAN_GetBusErrCount ( CAN_Type ∗ base, uint8_t ∗ txErrBuf,
uint8_t ∗ rxErrBuf ) [inline], [static]

This function gets the FlexCAN Bus Error Counter value for both Tx and Rx direction. These values may
be needed in the upper layer error handling.
Parameters
base

FlexCAN peripheral base address.

txErrBuf

Buffer to store Tx Error Counter value.

rxErrBuf

Buffer to store Rx Error Counter value.

21.2.7.14

static uint32_t FLEXCAN_GetMbStatusFlags ( CAN_Type ∗ base, uint32_t mask
) [inline], [static]

This function gets the interrupt flags of a given Message Buffers.
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FlexCAN Driver
Parameters
base

FlexCAN peripheral base address.

mask

The ORed FlexCAN Message Buffer mask.

Returns
The status of given Message Buffers.

21.2.7.15

static void FLEXCAN_ClearMbStatusFlags ( CAN_Type ∗ base, uint32_t mask )
[inline], [static]

This function clears the interrupt flags of a given Message Buffers.
Parameters

21.2.7.16

base

FlexCAN peripheral base address.

mask

The ORed FlexCAN Message Buffer mask.

static void FLEXCAN_EnableInterrupts ( CAN_Type ∗ base, uint32_t mask )
[inline], [static]

This function enables the FlexCAN interrupts according to provided mask. The mask is a logical OR of
enumeration members, see _flexcan_interrupt_enable.
Parameters

21.2.7.17

base

FlexCAN peripheral base address.

mask

The interrupts to enable. Logical OR of _flexcan_interrupt_enable.

static void FLEXCAN_DisableInterrupts ( CAN_Type ∗ base, uint32_t mask )
[inline], [static]

This function disables the FlexCAN interrupts according to provided mask. The mask is a logical OR of
enumeration members, see _flexcan_interrupt_enable.

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Parameters
base

FlexCAN peripheral base address.

mask

The interrupts to disable. Logical OR of _flexcan_interrupt_enable.

static void FLEXCAN_EnableMbInterrupts ( CAN_Type ∗ base, uint32_t mask )
[inline], [static]

21.2.7.18

This function enables the interrupts of given Message Buffers
Parameters
base

FlexCAN peripheral base address.

mask

The ORed FlexCAN Message Buffer mask.

static void FLEXCAN_DisableMbInterrupts ( CAN_Type ∗ base, uint32_t mask )
[inline], [static]

21.2.7.19

This function disables the interrupts of given Message Buffers
Parameters
base

FlexCAN peripheral base address.

mask

The ORed FlexCAN Message Buffer mask.

static void FLEXCAN_Enable ( CAN_Type ∗ base, bool enable ) [inline],

21.2.7.20

[static]
This function enables or disables the FlexCAN module.
Parameters
base
enable

21.2.7.21

FlexCAN base pointer.
true to enable, false to disable.

status_t FLEXCAN_WriteTxMb ( CAN_Type ∗ base, uint8_t mbIdx, const

flexcan_frame_t ∗ txFrame )
This function writes a CAN Message to the specified Transmit Message Buffer and changes the Message
Buffer state to start CAN Message transmit. After that the function returns immediately.
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FlexCAN Driver
Parameters
base
mbIdx
txFrame

FlexCAN peripheral base address.
The FlexCAN Message Buffer index.
Pointer to CAN message frame to be sent.

Return values
kStatus_Success
kStatus_Fail

- Write Tx Message Buffer Successfully.
- Tx Message Buffer is currently in use.

status_t FLEXCAN_ReadRxMb ( CAN_Type ∗ base, uint8_t mbIdx,

21.2.7.22

flexcan_frame_t ∗ rxFrame )
This function reads a CAN message from a specified Receive Message Buffer. The function fills a receive
CAN message frame structure with just received data and activates the Message Buffer again. The function
returns immediately.
Parameters
base
mbIdx
rxFrame

FlexCAN peripheral base address.
The FlexCAN Message Buffer index.
Pointer to CAN message frame structure for reception.

Return values
kStatus_Success
kStatus_FLEXCAN_RxOverflow
kStatus_Fail

21.2.7.23

- Rx Message Buffer is full and has been read successfully.
- Rx Message Buffer is already overflowed and has been read successfully.
- Rx Message Buffer is empty.

status_t FlEXCAN_ReadRxFifo ( CAN_Type ∗ base, flexcan_frame_t ∗ rxFrame
)

This function reads a CAN message from the FlexCAN build-in Rx FIFO.

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Parameters
base
rxFrame

FlexCAN peripheral base address.
Pointer to CAN message frame structure for reception.

Return values
kStatus_Success
kStatus_Fail

- Read Message from Rx FIFO successfully.
- Rx FIFO is not enabled.

status_t FlEXCAN_TransferSendBlocking ( CAN_Type ∗ base, uint8_t mbIdx,
flexcan_frame_t ∗ txFrame )

21.2.7.24

Note that a transfer handle does not need to be created before calling this API.
Parameters
base
mbIdx
txFrame

FlexCAN peripheral base pointer.
The FlexCAN Message Buffer index.
Pointer to CAN message frame to be sent.

Return values
kStatus_Success
kStatus_Fail

- Write Tx Message Buffer Successfully.
- Tx Message Buffer is currently in use.

status_t FlEXCAN_TransferReceiveBlocking ( CAN_Type ∗ base, uint8_t mbIdx,
flexcan_frame_t ∗ rxFrame )

21.2.7.25

Note that a transfer handle does not need to be created before calling this API.
Parameters
base
mbIdx

FlexCAN peripheral base pointer.
The FlexCAN Message Buffer index.

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FlexCAN Driver
rxFrame

Pointer to CAN message frame structure for reception.

Return values
kStatus_Success
kStatus_FLEXCAN_RxOverflow
kStatus_Fail

- Rx Message Buffer is full and has been read successfully.
- Rx Message Buffer is already overflowed and has been read successfully.
- Rx Message Buffer is empty.

status_t FlEXCAN_TransferReceiveFifoBlocking ( CAN_Type ∗ base,
flexcan_frame_t ∗ rxFrame )

21.2.7.26

Note that a transfer handle does not need to be created before calling this API.
Parameters
base
rxFrame

FlexCAN peripheral base pointer.
Pointer to CAN message frame structure for reception.

Return values
kStatus_Success
kStatus_Fail

- Read Message from Rx FIFO successfully.
- Rx FIFO is not enabled.

void FLEXCAN_TransferCreateHandle ( CAN_Type ∗ base, flexcan_handle_t ∗
handle, flexcan_transfer_callback_t callback, void ∗ userData )

21.2.7.27

This function initializes the FlexCAN handle which can be used for other FlexCAN transactional APIs.
Usually, for a specified FlexCAN instance, call this API once to get the initialized handle.
Parameters
base
handle
callback
userData

FlexCAN peripheral base address.
FlexCAN handle pointer.
The callback function.
The parameter of the callback function.

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21.2.7.28

status_t FLEXCAN_TransferSendNonBlocking ( CAN_Type ∗ base,
flexcan_handle_t ∗ handle, flexcan_mb_transfer_t ∗ xfer )

This function sends a message using IRQ. This is a non-blocking function, which returns right away.
When messages have been sent out, the send callback function is called.

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FlexCAN Driver
Parameters
base
handle
xfer

FlexCAN peripheral base address.
FlexCAN handle pointer.
FlexCAN Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values
kStatus_Success
kStatus_Fail
kStatus_FLEXCAN_TxBusy

Start Tx Message Buffer sending process successfully.
Write Tx Message Buffer failed.
Tx Message Buffer is in use.

status_t FLEXCAN_TransferReceiveNonBlocking ( CAN_Type ∗ base,
flexcan_handle_t ∗ handle, flexcan_mb_transfer_t ∗ xfer )

21.2.7.29

This function receives a message using IRQ. This is non-blocking function, which returns right away.
When the message has been received, the receive callback function is called.
Parameters
base
handle
xfer

FlexCAN peripheral base address.
FlexCAN handle pointer.
FlexCAN Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values
kStatus_Success
kStatus_FLEXCAN_RxBusy

21.2.7.30

- Start Rx Message Buffer receiving process successfully.
- Rx Message Buffer is in use.

status_t FLEXCAN_TransferReceiveFifoNonBlocking ( CAN_Type ∗ base,
flexcan_handle_t ∗ handle, flexcan_fifo_transfer_t ∗ xfer )

This function receives a message using IRQ. This is a non-blocking function, which returns right away.
When all messages have been received, the receive callback function is called.

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Parameters
base
handle
xfer

FlexCAN peripheral base address.
FlexCAN handle pointer.
FlexCAN Rx FIFO transfer structure. See the flexcan_fifo_transfer_t.

Return values
kStatus_Success
kStatus_FLEXCAN_RxFifoBusy

- Start Rx FIFO receiving process successfully.
- Rx FIFO is currently in use.

void FLEXCAN_TransferAbortSend ( CAN_Type ∗ base, flexcan_handle_t ∗
handle, uint8_t mbIdx )

21.2.7.31

This function aborts the interrupt driven message send process.
Parameters
base

FlexCAN peripheral base address.

handle

FlexCAN handle pointer.

mbIdx

The FlexCAN Message Buffer index.

void FLEXCAN_TransferAbortReceive ( CAN_Type ∗ base, flexcan_handle_t ∗
handle, uint8_t mbIdx )

21.2.7.32

This function aborts the interrupt driven message receive process.
Parameters
base

21.2.7.33

FlexCAN peripheral base address.

handle

FlexCAN handle pointer.

mbIdx

The FlexCAN Message Buffer index.

void FLEXCAN_TransferAbortReceiveFifo ( CAN_Type ∗ base, flexcan_handle_t
∗ handle )

This function aborts the interrupt driven message receive from Rx FIFO process.

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FlexCAN Driver
Parameters
base
handle

FlexCAN peripheral base address.
FlexCAN handle pointer.

void FLEXCAN_TransferHandleIRQ ( CAN_Type ∗ base, flexcan_handle_t ∗
handle )

21.2.7.34

This function handles the FlexCAN Error, the Message Buffer, and the Rx FIFO IRQ request.
Parameters
base
handle

FlexCAN peripheral base address.
FlexCAN handle pointer.

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FlexCAN eDMA Driver

21.3

FlexCAN eDMA Driver

21.3.1

Overview

Files
• file fsl_flexcan_edma.h

Data Structures
• struct flexcan_edma_handle_t
FlexCAN eDMA handle. More...

Typedefs
• typedef void(∗ flexcan_edma_transfer_callback_t )(CAN_Type ∗base, flexcan_edma_handle_t
∗handle, status_t status, void ∗userData)
FlexCAN transfer callback function.

eDMA transactional
• void FLEXCAN_TransferCreateHandleEDMA (CAN_Type ∗base, flexcan_edma_handle_t ∗handle, flexcan_edma_transfer_callback_t callback, void ∗userData, edma_handle_t ∗rxFifoEdmaHandle)
Initializes the FlexCAN handle, which is used in transactional functions.

• status_t FLEXCAN_TransferReceiveFifoEDMA (CAN_Type ∗base, flexcan_edma_handle_t
∗handle, flexcan_fifo_transfer_t ∗xfer)
Receives the CAN Message from the Rx FIFO using eDMA.

• void FLEXCAN_TransferAbortReceiveFifoEDMA (CAN_Type ∗base, flexcan_edma_handle_t
∗handle)
Aborts the receive process which used eDMA.

21.3.2
21.3.2.1

Data Structure Documentation
struct _flexcan_edma_handle

Data Fields

• flexcan_edma_transfer_callback_t callback
Callback function.

• void ∗ userData
FlexCAN callback function parameter.

• edma_handle_t ∗ rxFifoEdmaHandle
The EDMA Rx FIFO channel used.

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FlexCAN eDMA Driver
• volatile uint8_t rxFifoState
Rx FIFO transfer state.
21.3.2.1.0.55

Field Documentation

21.3.2.1.0.55.1 flexcan_edma_transfer_callback_t flexcan_edma_handle_t::callback
21.3.2.1.0.55.2

void∗ flexcan_edma_handle_t::userData

21.3.2.1.0.55.3 edma_handle_t∗ flexcan_edma_handle_t::rxFifoEdmaHandle
21.3.2.1.0.55.4

21.3.3

volatile uint8_t flexcan_edma_handle_t::rxFifoState

Typedef Documentation
typedef void(∗ flexcan_edma_transfer_callback_t)(CAN_Type ∗base,
flexcan_edma_handle_t ∗handle, status_t status, void ∗userData)

21.3.3.1

21.3.4

Function Documentation
void FLEXCAN_TransferCreateHandleEDMA ( CAN_Type ∗ base,
flexcan_edma_handle_t ∗ handle, flexcan_edma_transfer_callback_t callback,
void ∗ userData, edma_handle_t ∗ rxFifoEdmaHandle )

21.3.4.1

Parameters
base
handle
callback
userData
rxFifoEdmaHandle

21.3.4.2

FlexCAN peripheral base address.
Pointer to flexcan_edma_handle_t structure.
The callback function.
The parameter of the callback function.
User-requested DMA handle for Rx FIFO DMA transfer.

status_t FLEXCAN_TransferReceiveFifoEDMA ( CAN_Type ∗ base,
flexcan_edma_handle_t ∗ handle, flexcan_fifo_transfer_t ∗ xfer )

This function receives the CAN Message using eDMA. This is a non-blocking function, which returns
right away. After the CAN Message is received, the receive callback function is called.

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FlexCAN eDMA Driver
Parameters
base
handle
xfer

FlexCAN peripheral base address.
Pointer to flexcan_edma_handle_t structure.
FlexCAN Rx FIFO EDMA transfer structure, see flexcan_fifo_transfer_t.

Return values
kStatus_Success
kStatus_FLEXCAN_RxFifoBusy

if succeed, others failed.
Previous transfer ongoing.

void FLEXCAN_TransferAbortReceiveFifoEDMA ( CAN_Type ∗ base,
flexcan_edma_handle_t ∗ handle )

21.3.4.3

This function aborts the receive process which used eDMA.
Parameters
base
handle

FlexCAN peripheral base address.
Pointer to flexcan_edma_handle_t structure.

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Chapter 22
FlexIO: FlexIO Driver
22.1

Overview

The KSDK provides a generic driver for the FlexIO module of Kinetis devices, as well as multiple
protocol-specific FlexIO drivers.

Modules
•
•
•
•
•
•

FlexIO Camera Driver
FlexIO Driver
FlexIO I2C Master Driver
FlexIO I2S Driver
FlexIO SPI Driver
FlexIO UART Driver

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FlexIO Driver

22.2

FlexIO Driver

22.2.1

Overview

Files
• file fsl_flexio.h

Data Structures
• struct flexio_config_t
Define FlexIO user configuration structure. More...

• struct flexio_timer_config_t
Define FlexIO timer configuration structure. More...

• struct flexio_shifter_config_t
Define FlexIO shifter configuration structure. More...

Macros
• #define FLEXIO_TIMER_TRIGGER_SEL_PININPUT(x) ((uint32_t)(x) << 1U)
Calculate FlexIO timer trigger.

Typedefs
• typedef void(∗ flexio_isr_t )(void ∗base, void ∗handle)
typedef for FlexIO simulated driver interrupt handler.

Enumerations
• enum flexio_timer_trigger_polarity_t {
kFLEXIO_TimerTriggerPolarityActiveHigh = 0x0U,
kFLEXIO_TimerTriggerPolarityActiveLow = 0x1U }
Define time of timer trigger polarity.

• enum flexio_timer_trigger_source_t {
kFLEXIO_TimerTriggerSourceExternal = 0x0U,
kFLEXIO_TimerTriggerSourceInternal = 0x1U }
Define type of timer trigger source.

• enum flexio_pin_config_t {
kFLEXIO_PinConfigOutputDisabled = 0x0U,
kFLEXIO_PinConfigOpenDrainOrBidirection = 0x1U,
kFLEXIO_PinConfigBidirectionOutputData = 0x2U,
kFLEXIO_PinConfigOutput = 0x3U }
Define type of timer/shifter pin configuration.

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FlexIO Driver
• enum flexio_pin_polarity_t {
kFLEXIO_PinActiveHigh = 0x0U,
kFLEXIO_PinActiveLow = 0x1U }
Definition of pin polarity.

• enum flexio_timer_mode_t {
kFLEXIO_TimerModeDisabled = 0x0U,
kFLEXIO_TimerModeDual8BitBaudBit = 0x1U,
kFLEXIO_TimerModeDual8BitPWM = 0x2U,
kFLEXIO_TimerModeSingle16Bit = 0x3U }
Define type of timer work mode.

• enum flexio_timer_output_t {
kFLEXIO_TimerOutputOneNotAffectedByReset = 0x0U,
kFLEXIO_TimerOutputZeroNotAffectedByReset = 0x1U,
kFLEXIO_TimerOutputOneAffectedByReset = 0x2U,
kFLEXIO_TimerOutputZeroAffectedByReset = 0x3U }
Define type of timer initial output or timer reset condition.

• enum flexio_timer_decrement_source_t {
kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput = 0x0U,
kFLEXIO_TimerDecSrcOnTriggerInputShiftTimerOutput = 0x1U,
kFLEXIO_TimerDecSrcOnPinInputShiftPinInput = 0x2U,
kFLEXIO_TimerDecSrcOnTriggerInputShiftTriggerInput = 0x3U }
Define type of timer decrement.

• enum flexio_timer_reset_condition_t {
kFLEXIO_TimerResetNever = 0x0U,
kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput = 0x2U,
kFLEXIO_TimerResetOnTimerTriggerEqualToTimerOutput = 0x3U,
kFLEXIO_TimerResetOnTimerPinRisingEdge = 0x4U,
kFLEXIO_TimerResetOnTimerTriggerRisingEdge = 0x6U,
kFLEXIO_TimerResetOnTimerTriggerBothEdge = 0x7U }
Define type of timer reset condition.

• enum flexio_timer_disable_condition_t {
kFLEXIO_TimerDisableNever = 0x0U,
kFLEXIO_TimerDisableOnPreTimerDisable = 0x1U,
kFLEXIO_TimerDisableOnTimerCompare = 0x2U,
kFLEXIO_TimerDisableOnTimerCompareTriggerLow = 0x3U,
kFLEXIO_TimerDisableOnPinBothEdge = 0x4U,
kFLEXIO_TimerDisableOnPinBothEdgeTriggerHigh = 0x5U,
kFLEXIO_TimerDisableOnTriggerFallingEdge = 0x6U }
Define type of timer disable condition.

• enum flexio_timer_enable_condition_t {

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FlexIO Driver
kFLEXIO_TimerEnabledAlways = 0x0U,
kFLEXIO_TimerEnableOnPrevTimerEnable = 0x1U,
kFLEXIO_TimerEnableOnTriggerHigh = 0x2U,
kFLEXIO_TimerEnableOnTriggerHighPinHigh = 0x3U,
kFLEXIO_TimerEnableOnPinRisingEdge = 0x4U,
kFLEXIO_TimerEnableOnPinRisingEdgeTriggerHigh = 0x5U,
kFLEXIO_TimerEnableOnTriggerRisingEdge = 0x6U,
kFLEXIO_TimerEnableOnTriggerBothEdge = 0x7U }
Define type of timer enable condition.

• enum flexio_timer_stop_bit_condition_t {
kFLEXIO_TimerStopBitDisabled = 0x0U,
kFLEXIO_TimerStopBitEnableOnTimerCompare = 0x1U,
kFLEXIO_TimerStopBitEnableOnTimerDisable = 0x2U,
kFLEXIO_TimerStopBitEnableOnTimerCompareDisable = 0x3U }
Define type of timer stop bit generate condition.

• enum flexio_timer_start_bit_condition_t {
kFLEXIO_TimerStartBitDisabled = 0x0U,
kFLEXIO_TimerStartBitEnabled = 0x1U }
Define type of timer start bit generate condition.

• enum flexio_shifter_timer_polarity_t
Define type of timer polarity for shifter control.

• enum flexio_shifter_mode_t {
kFLEXIO_ShifterDisabled = 0x0U,
kFLEXIO_ShifterModeReceive = 0x1U,
kFLEXIO_ShifterModeTransmit = 0x2U,
kFLEXIO_ShifterModeMatchStore = 0x4U,
kFLEXIO_ShifterModeMatchContinuous = 0x5U }
Define type of shifter working mode.

• enum flexio_shifter_input_source_t {
kFLEXIO_ShifterInputFromPin = 0x0U,
kFLEXIO_ShifterInputFromNextShifterOutput = 0x1U }
Define type of shifter input source.

• enum flexio_shifter_stop_bit_t {
kFLEXIO_ShifterStopBitDisable = 0x0U,
kFLEXIO_ShifterStopBitLow = 0x2U,
kFLEXIO_ShifterStopBitHigh = 0x3U }
Define of STOP bit configuration.

• enum flexio_shifter_start_bit_t {
kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable = 0x0U,
kFLEXIO_ShifterStartBitDisabledLoadDataOnShift = 0x1U,
kFLEXIO_ShifterStartBitLow = 0x2U,
kFLEXIO_ShifterStartBitHigh = 0x3U }
Define type of START bit configuration.

• enum flexio_shifter_buffer_type_t {
kFLEXIO_ShifterBuffer = 0x0U,
kFLEXIO_ShifterBufferBitSwapped = 0x1U,
kFLEXIO_ShifterBufferByteSwapped = 0x2U,
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kFLEXIO_ShifterBufferBitByteSwapped = 0x3U }
Define FlexIO shifter buffer type.

Driver version
• #define FSL_FLEXIO_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
FlexIO driver version 2.0.0.

FlexIO Initialization and De-initialization
• void FLEXIO_GetDefaultConfig (flexio_config_t ∗userConfig)
Gets the default configuration to configure FlexIO module.

• void FLEXIO_Init (FLEXIO_Type ∗base, const flexio_config_t ∗userConfig)
Configures the FlexIO with FlexIO configuration.

• void FLEXIO_Deinit (FLEXIO_Type ∗base)
Gates the FlexIO clock.

FlexIO Basic Operation
• void FLEXIO_Reset (FLEXIO_Type ∗base)
Resets the FlexIO module.

• static void FLEXIO_Enable (FLEXIO_Type ∗base, bool enable)
Enables the FlexIO module operation.

• void FLEXIO_SetShifterConfig (FLEXIO_Type ∗base, uint8_t index, const flexio_shifter_config_t
∗shifterConfig)
Configures the shifter with shifter configuration.

• void FLEXIO_SetTimerConfig (FLEXIO_Type ∗base, uint8_t index, const flexio_timer_config_t
∗timerConfig)
Configures the timer with the timer configuration.

FlexIO Interrupt Operation
• static void FLEXIO_EnableShifterStatusInterrupts (FLEXIO_Type ∗base, uint32_t mask)
Enables the shifter status interrupt.

• static void FLEXIO_DisableShifterStatusInterrupts (FLEXIO_Type ∗base, uint32_t mask)
Disables the shifter status interrupt.

• static void FLEXIO_EnableShifterErrorInterrupts (FLEXIO_Type ∗base, uint32_t mask)
Enables the shifter error interrupt.

• static void FLEXIO_DisableShifterErrorInterrupts (FLEXIO_Type ∗base, uint32_t mask)
Disables the shifter error interrupt.

• static void FLEXIO_EnableTimerStatusInterrupts (FLEXIO_Type ∗base, uint32_t mask)
Enables the timer status interrupt.

• static void FLEXIO_DisableTimerStatusInterrupts (FLEXIO_Type ∗base, uint32_t mask)
Disables the timer status interrupt.

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FlexIO Status Operation
• static uint32_t FLEXIO_GetShifterStatusFlags (FLEXIO_Type ∗base)
Gets the shifter status flags.

• static void FLEXIO_ClearShifterStatusFlags (FLEXIO_Type ∗base, uint32_t mask)
Clears the shifter status flags.

• static uint32_t FLEXIO_GetShifterErrorFlags (FLEXIO_Type ∗base)
Gets the shifter error flags.

• static void FLEXIO_ClearShifterErrorFlags (FLEXIO_Type ∗base, uint32_t mask)
Clears the shifter error flags.

• static uint32_t FLEXIO_GetTimerStatusFlags (FLEXIO_Type ∗base)
Gets the timer status flags.

• static void FLEXIO_ClearTimerStatusFlags (FLEXIO_Type ∗base, uint32_t mask)
Clears the timer status flags.

FlexIO DMA Operation
• static void FLEXIO_EnableShifterStatusDMA (FLEXIO_Type ∗base, uint32_t mask, bool enable)
Enables/disables the shifter status DMA.

• uint32_t FLEXIO_GetShifterBufferAddress (FLEXIO_Type ∗base, flexio_shifter_buffer_type_t type, uint8_t index)
Gets the shifter buffer address for the DMA transfer usage.

• status_t FLEXIO_RegisterHandleIRQ (void ∗base, void ∗handle, flexio_isr_t isr)
Registers the handle and the interrupt handler for the FlexIO-simulated peripheral.

• status_t FLEXIO_UnregisterHandleIRQ (void ∗base)
Unregisters the handle and the interrupt handler for the FlexIO-simulated peripheral.

22.2.2
22.2.2.1

Data Structure Documentation
struct flexio_config_t

Data Fields

• bool enableFlexio
Enable/disable FlexIO module.

• bool enableInDoze
Enable/disable FlexIO operation in doze mode.

• bool enableInDebug
Enable/disable FlexIO operation in debug mode.

• bool enableFastAccess
Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice
the frequency of the bus clock.

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22.2.2.1.0.56
22.2.2.1.0.56.1

22.2.2.2

Field Documentation
bool flexio_config_t::enableFastAccess

struct flexio_timer_config_t

Data Fields

• uint32_t triggerSelect
The internal trigger selection number using MACROs.

• flexio_timer_trigger_polarity_t triggerPolarity
Trigger Polarity.

• flexio_timer_trigger_source_t triggerSource
Trigger Source, internal (see ’trgsel’) or external.

• flexio_pin_config_t pinConfig
Timer Pin Configuration.

• uint32_t pinSelect
Timer Pin number Select.

• flexio_pin_polarity_t pinPolarity
Timer Pin Polarity.

• flexio_timer_mode_t timerMode
Timer work Mode.

• flexio_timer_output_t timerOutput
Configures the initial state of the Timer Output and whether it is affected by the Timer reset.

• flexio_timer_decrement_source_t timerDecrement
Configures the source of the Timer decrement and the source of the Shift clock.

• flexio_timer_reset_condition_t timerReset
Configures the condition that causes the timer counter (and optionally the timer output) to be reset.

• flexio_timer_disable_condition_t timerDisable
Configures the condition that causes the Timer to be disabled and stop decrementing.

• flexio_timer_enable_condition_t timerEnable
Configures the condition that causes the Timer to be enabled and start decrementing.

• flexio_timer_stop_bit_condition_t timerStop
Timer STOP Bit generation.

• flexio_timer_start_bit_condition_t timerStart
Timer STRAT Bit generation.

• uint32_t timerCompare
Value for Timer Compare N Register.

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22.2.2.2.0.57

Field Documentation

22.2.2.2.0.57.1

uint32_t flexio_timer_config_t::triggerSelect

22.2.2.2.0.57.2 flexio_timer_trigger_polarity_t flexio_timer_config_t::triggerPolarity
22.2.2.2.0.57.3 flexio_timer_trigger_source_t flexio_timer_config_t::triggerSource
22.2.2.2.0.57.4 flexio_pin_config_t flexio_timer_config_t::pinConfig
22.2.2.2.0.57.5

uint32_t flexio_timer_config_t::pinSelect

22.2.2.2.0.57.6 flexio_pin_polarity_t flexio_timer_config_t::pinPolarity
22.2.2.2.0.57.7 flexio_timer_mode_t flexio_timer_config_t::timerMode
22.2.2.2.0.57.8 flexio_timer_output_t flexio_timer_config_t::timerOutput
22.2.2.2.0.57.9 flexio_timer_decrement_source_t flexio_timer_config_t::timerDecrement
22.2.2.2.0.57.10 flexio_timer_reset_condition_t flexio_timer_config_t::timerReset
22.2.2.2.0.57.11 flexio_timer_disable_condition_t flexio_timer_config_t::timerDisable
22.2.2.2.0.57.12 flexio_timer_enable_condition_t flexio_timer_config_t::timerEnable
22.2.2.2.0.57.13 flexio_timer_stop_bit_condition_t flexio_timer_config_t::timerStop
22.2.2.2.0.57.14 flexio_timer_start_bit_condition_t flexio_timer_config_t::timerStart
22.2.2.2.0.57.15

22.2.2.3

uint32_t flexio_timer_config_t::timerCompare

struct flexio_shifter_config_t

Data Fields

• uint32_t timerSelect
Selects which Timer is used for controlling the logic/shift register and generating the Shift clock.

• flexio_shifter_timer_polarity_t timerPolarity
Timer Polarity.

• flexio_pin_config_t pinConfig
Shifter Pin Configuration.

• uint32_t pinSelect
Shifter Pin number Select.

• flexio_pin_polarity_t pinPolarity
Shifter Pin Polarity.

• flexio_shifter_mode_t shifterMode
Configures the mode of the Shifter.

• flexio_shifter_input_source_t inputSource
Selects the input source for the shifter.

• flexio_shifter_stop_bit_t shifterStop
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Shifter STOP bit.

• flexio_shifter_start_bit_t shifterStart
Shifter START bit.
22.2.2.3.0.58
22.2.2.3.0.58.1

Field Documentation
uint32_t flexio_shifter_config_t::timerSelect

22.2.2.3.0.58.2 flexio_shifter_timer_polarity_t flexio_shifter_config_t::timerPolarity
22.2.2.3.0.58.3 flexio_pin_config_t flexio_shifter_config_t::pinConfig
22.2.2.3.0.58.4

uint32_t flexio_shifter_config_t::pinSelect

22.2.2.3.0.58.5 flexio_pin_polarity_t flexio_shifter_config_t::pinPolarity
22.2.2.3.0.58.6 flexio_shifter_mode_t flexio_shifter_config_t::shifterMode
22.2.2.3.0.58.7 flexio_shifter_input_source_t flexio_shifter_config_t::inputSource
22.2.2.3.0.58.8 flexio_shifter_stop_bit_t flexio_shifter_config_t::shifterStop
22.2.2.3.0.58.9 flexio_shifter_start_bit_t flexio_shifter_config_t::shifterStart

22.2.3

Macro Definition Documentation

22.2.3.1

#define FSL_FLEXIO_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

22.2.3.2

#define FLEXIO_TIMER_TRIGGER_SEL_PININPUT( x ) ((uint32_t)(x) << 1U)

22.2.4

Typedef Documentation
typedef void(∗ flexio_isr_t)(void ∗base, void ∗handle)

22.2.4.1

22.2.5

Enumeration Type Documentation

22.2.5.1

enum flexio_timer_trigger_polarity_t

Enumerator
kFLEXIO_TimerTriggerPolarityActiveHigh Active high.
kFLEXIO_TimerTriggerPolarityActiveLow Active low.

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22.2.5.2

enum flexio_timer_trigger_source_t

Enumerator
kFLEXIO_TimerTriggerSourceExternal External trigger selected.
kFLEXIO_TimerTriggerSourceInternal Internal trigger selected.

22.2.5.3

enum flexio_pin_config_t

Enumerator
kFLEXIO_PinConfigOutputDisabled Pin output disabled.
kFLEXIO_PinConfigOpenDrainOrBidirection Pin open drain or bidirectional output enable.
kFLEXIO_PinConfigBidirectionOutputData Pin bidirectional output data.
kFLEXIO_PinConfigOutput Pin output.

22.2.5.4

enum flexio_pin_polarity_t

Enumerator
kFLEXIO_PinActiveHigh Active high.
kFLEXIO_PinActiveLow Active low.

22.2.5.5

enum flexio_timer_mode_t

Enumerator
kFLEXIO_TimerModeDisabled Timer Disabled.
kFLEXIO_TimerModeDual8BitBaudBit Dual 8-bit counters baud/bit mode.
kFLEXIO_TimerModeDual8BitPWM Dual 8-bit counters PWM mode.
kFLEXIO_TimerModeSingle16Bit Single 16-bit counter mode.

22.2.5.6

enum flexio_timer_output_t

Enumerator
kFLEXIO_TimerOutputOneNotAffectedByReset Logic one when enabled and is not affected by
timer reset.
kFLEXIO_TimerOutputZeroNotAffectedByReset Logic zero when enabled and is not affected by
timer reset.
kFLEXIO_TimerOutputOneAffectedByReset Logic one when enabled and on timer reset.
kFLEXIO_TimerOutputZeroAffectedByReset Logic zero when enabled and on timer reset.

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22.2.5.7

enum flexio_timer_decrement_source_t

Enumerator
kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput Decrement
Shift clock equals Timer output.
kFLEXIO_TimerDecSrcOnTriggerInputShiftTimerOutput Decrement
(both edges), Shift clock equals Timer output.
kFLEXIO_TimerDecSrcOnPinInputShiftPinInput Decrement counter
Shift clock equals Pin input.
kFLEXIO_TimerDecSrcOnTriggerInputShiftTriggerInput Decrement
(both edges), Shift clock equals Trigger input.

22.2.5.8

counter on FlexIO clock,
counter on Trigger input
on Pin input (both edges),
counter on Trigger input

enum flexio_timer_reset_condition_t

Enumerator
kFLEXIO_TimerResetNever Timer never reset.
kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput Timer reset on Timer Pin equal to Timer
Output.
kFLEXIO_TimerResetOnTimerTriggerEqualToTimerOutput Timer reset on Timer Trigger equal
to Timer Output.
kFLEXIO_TimerResetOnTimerPinRisingEdge Timer reset on Timer Pin rising edge.
kFLEXIO_TimerResetOnTimerTriggerRisingEdge Timer reset on Trigger rising edge.
kFLEXIO_TimerResetOnTimerTriggerBothEdge Timer reset on Trigger rising or falling edge.

22.2.5.9

enum flexio_timer_disable_condition_t

Enumerator
kFLEXIO_TimerDisableNever Timer never disabled.
kFLEXIO_TimerDisableOnPreTimerDisable Timer disabled on Timer N-1 disable.
kFLEXIO_TimerDisableOnTimerCompare Timer disabled on Timer compare.
kFLEXIO_TimerDisableOnTimerCompareTriggerLow Timer disabled on Timer compare and
Trigger Low.
kFLEXIO_TimerDisableOnPinBothEdge Timer disabled on Pin rising or falling edge.
kFLEXIO_TimerDisableOnPinBothEdgeTriggerHigh Timer disabled on Pin rising or falling edge
provided Trigger is high.
kFLEXIO_TimerDisableOnTriggerFallingEdge Timer disabled on Trigger falling edge.

22.2.5.10

enum flexio_timer_enable_condition_t

Enumerator
kFLEXIO_TimerEnabledAlways Timer always enabled.
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kFLEXIO_TimerEnableOnPrevTimerEnable Timer enabled on Timer N-1 enable.
kFLEXIO_TimerEnableOnTriggerHigh Timer enabled on Trigger high.
kFLEXIO_TimerEnableOnTriggerHighPinHigh Timer enabled on Trigger high and Pin high.
kFLEXIO_TimerEnableOnPinRisingEdge Timer enabled on Pin rising edge.
kFLEXIO_TimerEnableOnPinRisingEdgeTriggerHigh Timer enabled on Pin rising edge and Trigger high.
kFLEXIO_TimerEnableOnTriggerRisingEdge Timer enabled on Trigger rising edge.
kFLEXIO_TimerEnableOnTriggerBothEdge Timer enabled on Trigger rising or falling edge.

22.2.5.11

enum flexio_timer_stop_bit_condition_t

Enumerator
kFLEXIO_TimerStopBitDisabled Stop bit disabled.
kFLEXIO_TimerStopBitEnableOnTimerCompare Stop bit is enabled on timer compare.
kFLEXIO_TimerStopBitEnableOnTimerDisable Stop bit is enabled on timer disable.
kFLEXIO_TimerStopBitEnableOnTimerCompareDisable Stop bit is enabled on timer compare
and timer disable.

22.2.5.12

enum flexio_timer_start_bit_condition_t

Enumerator
kFLEXIO_TimerStartBitDisabled Start bit disabled.
kFLEXIO_TimerStartBitEnabled Start bit enabled.

22.2.5.13

enum flexio_shifter_timer_polarity_t

22.2.5.14

enum flexio_shifter_mode_t

Enumerator
kFLEXIO_ShifterDisabled Shifter is disabled.
kFLEXIO_ShifterModeReceive Receive mode.
kFLEXIO_ShifterModeTransmit Transmit mode.
kFLEXIO_ShifterModeMatchStore Match store mode.
kFLEXIO_ShifterModeMatchContinuous Match continuous mode.

22.2.5.15

enum flexio_shifter_input_source_t

Enumerator
kFLEXIO_ShifterInputFromPin Shifter input from pin.
kFLEXIO_ShifterInputFromNextShifterOutput Shifter input from Shifter N+1.
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22.2.5.16

enum flexio_shifter_stop_bit_t

Enumerator
kFLEXIO_ShifterStopBitDisable Disable shifter stop bit.
kFLEXIO_ShifterStopBitLow Set shifter stop bit to logic low level.
kFLEXIO_ShifterStopBitHigh Set shifter stop bit to logic high level.

22.2.5.17

enum flexio_shifter_start_bit_t

Enumerator
kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable Disable shifter start bit, transmitter loads
data on enable.
kFLEXIO_ShifterStartBitDisabledLoadDataOnShift Disable shifter start bit, transmitter loads
data on first shift.
kFLEXIO_ShifterStartBitLow Set shifter start bit to logic low level.
kFLEXIO_ShifterStartBitHigh Set shifter start bit to logic high level.

22.2.5.18

enum flexio_shifter_buffer_type_t

Enumerator
kFLEXIO_ShifterBuffer Shifter Buffer N Register.
kFLEXIO_ShifterBufferBitSwapped Shifter Buffer N Bit Byte Swapped Register.
kFLEXIO_ShifterBufferByteSwapped Shifter Buffer N Byte Swapped Register.
kFLEXIO_ShifterBufferBitByteSwapped Shifter Buffer N Bit Swapped Register.

22.2.6
22.2.6.1

Function Documentation
void FLEXIO_GetDefaultConfig ( flexio_config_t ∗ userConfig )

The configuration can used directly for calling FLEXIO_Configure().
Example:
flexio_config_t config;
FLEXIO_GetDefaultConfig(&config);

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Parameters
userConfig

22.2.6.2

pointer to flexio_config_t structure

void FLEXIO_Init ( FLEXIO_Type ∗ base, const flexio_config_t ∗ userConfig )

The configuration structure can be filled by the user, or be set with default values by FLEXIO_GetDefaultConfig().
Example
flexio_config_t config = {
.enableFlexio = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false
};
FLEXIO_Configure(base, &config);

Parameters
base
userConfig

22.2.6.3

FlexIO peripheral base address
pointer to flexio_config_t structure

void FLEXIO_Deinit ( FLEXIO_Type ∗ base )

Call this API to stop the FlexIO clock.
Note
After calling this API, call the FLEXO_Init to use the FlexIO module.
Parameters
base

22.2.6.4

FlexIO peripheral base address

void FLEXIO_Reset ( FLEXIO_Type ∗ base )

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Parameters
base

FlexIO peripheral base address

static void FLEXIO_Enable ( FLEXIO_Type ∗ base, bool enable ) [inline],

22.2.6.5

[static]
Parameters
base

FlexIO peripheral base address

enable

true to enable, false to disable.

22.2.6.6

void FLEXIO_SetShifterConfig ( FLEXIO_Type ∗ base, uint8_t index, const
flexio_shifter_config_t ∗ shifterConfig )

The configuration structure covers both the SHIFTCTL and SHIFTCFG registers. To configure the shifter
to the proper mode, select which timer controls the shifter to shift, whether to generate start bit/stop bit,
and the polarity of start bit and stop bit.
Example
flexio_shifter_config_t config = {
.timerSelect = 0,
.timerPolarity = kFLEXIO_ShifterTimerPolarityOnPositive,
.pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
.pinPolarity = kFLEXIO_PinActiveLow,
.shifterMode = kFLEXIO_ShifterModeTransmit,
.inputSource = kFLEXIO_ShifterInputFromPin,
.shifterStop = kFLEXIO_ShifterStopBitHigh,
.shifterStart = kFLEXIO_ShifterStartBitLow
};
FLEXIO_SetShifterConfig(base, &config);

Parameters
base
index
shifterConfig

22.2.6.7

FlexIO peripheral base address
shifter index
pointer to flexio_shifter_config_t structure

void FLEXIO_SetTimerConfig ( FLEXIO_Type ∗ base, uint8_t index, const
flexio_timer_config_t ∗ timerConfig )

The configuration structure covers both the TIMCTL and TIMCFG registers. To configure the timer to the
proper mode, select trigger source for timer and the timer pin output and the timing for timer.
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Example
flexio_timer_config_t config = {
.triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0),
.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow,
.triggerSource = kFLEXIO_TimerTriggerSourceInternal,
.pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
.pinSelect = 0,
.pinPolarity = kFLEXIO_PinActiveHigh,
.timerMode = kFLEXIO_TimerModeDual8BitBaudBit,
.timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset,
.timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput
,
.timerReset = kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput,
.timerDisable = kFLEXIO_TimerDisableOnTimerCompare,
.timerEnable = kFLEXIO_TimerEnableOnTriggerHigh,
.timerStop = kFLEXIO_TimerStopBitEnableOnTimerDisable,
.timerStart = kFLEXIO_TimerStartBitEnabled
};
FLEXIO_SetTimerConfig(base, &config);

Parameters
base
index
timerConfig

22.2.6.8

FlexIO peripheral base address
timer index
pointer to flexio_timer_config_t structure

static void FLEXIO_EnableShifterStatusInterrupts ( FLEXIO_Type ∗ base,
uint32_t mask ) [inline], [static]

The interrupt generates when the corresponding SSF is set.
Parameters
base

FlexIO peripheral base address

mask

the shifter status mask which could be calculated by (1 << shifter index)

Note
for multiple shifter status interrupt enable, for example, two shifter status enable, could calculate the
mask by using ((1 << shifter index0) | (1 << shifter index1))

22.2.6.9

static void FLEXIO_DisableShifterStatusInterrupts ( FLEXIO_Type ∗ base,
uint32_t mask ) [inline], [static]

The interrupt won’t generate when the corresponding SSF is set.

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Parameters
base

FlexIO peripheral base address

mask

the shifter status mask which could be calculated by (1 << shifter index)

Note
for multiple shifter status interrupt enable, for example, two shifter status enable, could calculate the
mask by using ((1 << shifter index0) | (1 << shifter index1))

22.2.6.10

static void FLEXIO_EnableShifterErrorInterrupts ( FLEXIO_Type ∗ base,
uint32_t mask ) [inline], [static]

The interrupt generates when the corresponding SEF is set.
Parameters
base

FlexIO peripheral base address

mask

the shifter error mask which could be calculated by (1 << shifter index)

Note
for multiple shifter error interrupt enable, for example, two shifter error enable, could calculate the
mask by using ((1 << shifter index0) | (1 << shifter index1))

22.2.6.11

static void FLEXIO_DisableShifterErrorInterrupts ( FLEXIO_Type ∗ base,
uint32_t mask ) [inline], [static]

The interrupt won’t generate when the corresponding SEF is set.
Parameters
base

FlexIO peripheral base address

mask

the shifter error mask which could be calculated by (1 << shifter index)

Note
for multiple shifter error interrupt enable, for example, two shifter error enable, could calculate the
mask by using ((1 << shifter index0) | (1 << shifter index1))

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22.2.6.12

static void FLEXIO_EnableTimerStatusInterrupts ( FLEXIO_Type ∗ base,
uint32_t mask ) [inline], [static]

The interrupt generates when the corresponding SSF is set.

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Parameters
base

FlexIO peripheral base address

mask

the timer status mask which could be calculated by (1 << timer index)

Note
for multiple timer status interrupt enable, for example, two timer status enable, could calculate the
mask by using ((1 << timer index0) | (1 << timer index1))

22.2.6.13

static void FLEXIO_DisableTimerStatusInterrupts ( FLEXIO_Type ∗ base,
uint32_t mask ) [inline], [static]

The interrupt won’t generate when the corresponding SSF is set.
Parameters
base

FlexIO peripheral base address

mask

the timer status mask which could be calculated by (1 << timer index)

Note
for multiple timer status interrupt enable, for example, two timer status enable, could calculate the
mask by using ((1 << timer index0) | (1 << timer index1))

22.2.6.14

static uint32_t FLEXIO_GetShifterStatusFlags ( FLEXIO_Type ∗ base )
[inline], [static]

Parameters
base

FlexIO peripheral base address

Returns
shifter status flags

22.2.6.15

static void FLEXIO_ClearShifterStatusFlags ( FLEXIO_Type ∗ base, uint32_t
mask ) [inline], [static]

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Parameters
base

FlexIO peripheral base address

mask

the shifter status mask which could be calculated by (1 << shifter index)

Note
for clearing multiple shifter status flags, for example, two shifter status flags, could calculate the
mask by using ((1 << shifter index0) | (1 << shifter index1))

22.2.6.16

static uint32_t FLEXIO_GetShifterErrorFlags ( FLEXIO_Type ∗ base )

[inline], [static]
Parameters
base

FlexIO peripheral base address

Returns
shifter error flags

22.2.6.17

static void FLEXIO_ClearShifterErrorFlags ( FLEXIO_Type ∗ base, uint32_t
mask ) [inline], [static]

Parameters
base

FlexIO peripheral base address

mask

the shifter error mask which could be calculated by (1 << shifter index)

Note
for clearing multiple shifter error flags, for example, two shifter error flags, could calculate the mask
by using ((1 << shifter index0) | (1 << shifter index1))

22.2.6.18

static uint32_t FLEXIO_GetTimerStatusFlags ( FLEXIO_Type ∗ base )
[inline], [static]

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FlexIO Driver
Parameters
base

FlexIO peripheral base address

Returns
timer status flags

22.2.6.19

static void FLEXIO_ClearTimerStatusFlags ( FLEXIO_Type ∗ base, uint32_t
mask ) [inline], [static]

Parameters
base

FlexIO peripheral base address

mask

the timer status mask which could be calculated by (1 << timer index)

Note
for clearing multiple timer status flags, for example, two timer status flags, could calculate the mask
by using ((1 << timer index0) | (1 << timer index1))

22.2.6.20

static void FLEXIO_EnableShifterStatusDMA ( FLEXIO_Type ∗ base, uint32_t
mask, bool enable ) [inline], [static]

The DMA request generates when the corresponding SSF is set.
Note
For multiple shifter status DMA enables, for example, calculate the mask by using ((1 << shifter
index0) | (1 << shifter index1))
Parameters
base

FlexIO peripheral base address

mask

the shifter status mask which could be calculated by (1 << shifter index)

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enable

True to enable, false to disable.

uint32_t FLEXIO_GetShifterBufferAddress ( FLEXIO_Type ∗ base,

22.2.6.21

flexio_shifter_buffer_type_t type, uint8_t index )
Parameters
base

FlexIO peripheral base address

type

shifter type of flexio_shifter_buffer_type_t

index

shifter index

Returns
corresponding shifter buffer index

status_t FLEXIO_RegisterHandleIRQ ( void ∗ base, void ∗ handle, flexio_isr_t
isr )

22.2.6.22

Parameters
base
handle
isr

pointer to FlexIO simulated peripheral type.
pointer to handler for FlexIO simulated peripheral.
FlexIO simulated peripheral interrupt handler.

Return values
kStatus_Success
kStatus_OutOfRange

22.2.6.23

Successfully create the handle.
The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_UnregisterHandleIRQ ( void ∗ base )

Parameters

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base

pointer to FlexIO simulated peripheral type.

Return values
kStatus_Success
kStatus_OutOfRange

Successfully create the handle.
The FlexIO type/handle/ISR table out of range.

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22.3

FlexIO Camera Driver

22.3.1

Overview

The KSDK provides driver for the camera function using Flexible I/O.

22.3.2

Overview

FlexIO CAMERA driver includes 2 parts: functional APIs and EDMA transactional APIs. Functional
APIs are feature/property target low level APIs. User can use functional APIs for FLEXIO CAMERA
initialization/configuration/operation purpose. Using the functional API require user get knowledge of
the FLEXIO CAMERA peripheral and know how to organize functional APIs to meet the requirement
of application. All functional API use the FLEXIO_CAMERA_Type ∗ as the first parameter. FLEXIO
CAMERA functional operation groups provide the functional APIs set.
EDMA transactional APIs are transaction target high level APIs. User can use the transactional API to
enable the peripheral quickly and can also use in the application if the code size and performance of
transactional APIs can satisfy requirement. If the code size and performance are critical requirement, user
can refer to the transactional API implementation and write their own code. All transactional APIs use the
flexio_camera_edma_handle_t as the second parameter and user need to initialize the handle by calling
FLEXIO_CAMERA_TransferCreateHandleEDMA() API.
EDMA transactional APIs support asynchronized receive. It means, the functions FLEXIO_CAMERA_TransferReceiveEDMA() setup interrupt for data receive, when the receive complete, upper layer is
notified through callback function with status kStatus_FLEXIO_CAMERA_RxIdle.

22.3.3
22.3.3.1

Typical use case
FLEXIO CAMERA Receive in EDMA way

volatile uint32_t isEDMAGetOnePictureFinish = false;
edma_handle_t g_edmaHandle;
flexio_camera_edma_handle_t g_cameraEdmaHandle;
edma_config_t edmaConfig;
FLEXIO_CAMERA_Type g_FlexioCameraDevice = {.flexioBase = FLEXIO0,
.datPinStartIdx = 24U, /* fxio_pin 24 -31 are used.
.pclkPinIdx = 1U,
/* fxio_pin 1 is used as pclk pin.
.hrefPinIdx = 18U,
/* flexio_pin 18 is used as href pin.
.shifterStartIdx = 0U, /* Shifter 0 = 7 are used.
.shifterCount = 8U,
.timerIdx = 0U};
flexio_camera_config_t cameraConfig;
/* Configure DMAMUX
DMAMUX_Init(DMAMUX0);
/* Configure DMA
EDMA_GetDefaultConfig(&edmaConfig);
EDMA_Init(DMA0, &edmaConfig);
DMAMUX_SetSource(DMAMUX0, DMA_CHN_FLEXIO_TO_FRAMEBUFF, (g_FlexioCameraDevice.shifterStartIdx + 1U));
DMAMUX_EnableChannel(DMAMUX0, DMA_CHN_FLEXIO_TO_FRAMEBUFF);
EDMA_CreateHandle(&g_edmaHandle, DMA0, DMA_CHN_FLEXIO_TO_FRAMEBUFF);

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FLEXIO_CAMERA_GetDefaultConfig(&cameraConfig);
FLEXIO_CAMERA_Init(&g_FlexioCameraDevice, &cameraConfig);
/* Clear all the flag.
FLEXIO_CAMERA_ClearStatusFlags(&g_FlexioCameraDevice,
kFLEXIO_CAMERA_RxDataRegFullFlag | kFLEXIO_CAMERA_RxErrorFlag);
FLEXIO_ClearTimerStatusFlags(FLEXIO0, 0xFF);
FLEXIO_CAMERA_TransferCreateHandleEDMA(&g_FlexioCameraDevice, &g_cameraEdmaHandle,
FLEXIO_CAMERA_UserCallback, NULL,
&g_edmaHandle);
cameraTransfer.dataAddress = (uint32_t)u16CameraFrameBuffer;
cameraTransfer.dataNum = sizeof(u16CameraFrameBuffer);
FLEXIO_CAMERA_TransferReceiveEDMA(&g_FlexioCameraDevice, &g_cameraEdmaHandle, &cameraTransfer);
while (!(isEDMAGetOnePictureFinish))
{
;
}
/* A callback function is also needed
void FLEXIO_CAMERA_UserCallback(FLEXIO_CAMERA_Type *base,
flexio_camera_edma_handle_t *handle,
status_t status,
void *userData)
{
userData = userData;
/* EDMA Transfer finished
if (kStatus_FLEXIO_CAMERA_RxIdle == status)
{
isEDMAGetOnePictureFinish = true;
}
}

Modules
• FlexIO eDMA Camera Driver

Files
• file fsl_flexio_camera.h

Data Structures
• struct FLEXIO_CAMERA_Type
Define structure of configuring the FlexIO camera device. More...

• struct flexio_camera_config_t
Define FLEXIO camera user configuration structure. More...

• struct flexio_camera_transfer_t
Define FLEXIO CAMERA transfer structure. More...

Macros
• #define FLEXIO_CAMERA_PARALLEL_DATA_WIDTH (8U)
Define the camera CPI interface is constantly 8-bit width.

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Enumerations
• enum _flexio_camera_status {
kStatus_FLEXIO_CAMERA_RxBusy = MAKE_STATUS(kStatusGroup_FLEXIO_CAMERA,
0),
kStatus_FLEXIO_CAMERA_RxIdle = MAKE_STATUS(kStatusGroup_FLEXIO_CAMERA, 1)
}
Error codes for the CAMERA driver.

• enum _flexio_camera_status_flags {
kFLEXIO_CAMERA_RxDataRegFullFlag = 0x1U,
kFLEXIO_CAMERA_RxErrorFlag = 0x2U }
Define FlexIO CAMERA status mask.

Driver version
• #define FSL_FLEXIO_CAMERA_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
FlexIO camera driver version 2.1.0.

Initialize and configuration
• void FLEXIO_CAMERA_Init (FLEXIO_CAMERA_Type ∗base, const flexio_camera_config_t ∗config)
Ungates the FlexIO clock, reset the FlexIO module and do FlexIO CAMERA hardware configuration.

• void FLEXIO_CAMERA_Deinit (FLEXIO_CAMERA_Type ∗base)
Disables the FlexIO CAMERA and gate the FlexIO clock.

• void FLEXIO_CAMERA_GetDefaultConfig (flexio_camera_config_t ∗config)
Get the default configuration to configure FLEXIO CAMERA.

• static void FLEXIO_CAMERA_Enable (FLEXIO_CAMERA_Type ∗base, bool enable)
Enables/disables the FlexIO CAMERA module operation.

Status
• uint32_t FLEXIO_CAMERA_GetStatusFlags (FLEXIO_CAMERA_Type ∗base)
Gets the FlexIO CAMERA status flags.

• void FLEXIO_CAMERA_ClearStatusFlags (FLEXIO_CAMERA_Type ∗base, uint32_t mask)
Clears the receive buffer full flag manually.

Interrupts
• void FLEXIO_CAMERA_EnableInterrupt (FLEXIO_CAMERA_Type ∗base)
Switches on the interrupt for receive buffer full event.

• void FLEXIO_CAMERA_DisableInterrupt (FLEXIO_CAMERA_Type ∗base)
Switches off the interrupt for receive buffer full event.

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DMA support
• static void FLEXIO_CAMERA_EnableRxDMA (FLEXIO_CAMERA_Type ∗base, bool enable)
Enables/disables the FlexIO CAMERA receive DMA.

• static uint32_t FLEXIO_CAMERA_GetRxBufferAddress (FLEXIO_CAMERA_Type ∗base)
Gets the data from the receive buffer.

22.3.4
22.3.4.1

Data Structure Documentation
struct FLEXIO_CAMERA_Type

Data Fields

• FLEXIO_Type ∗ flexioBase
FlexIO module base address.

• uint32_t datPinStartIdx
First data pin (D0) index for flexio_camera.

• uint32_t pclkPinIdx
Pixel clock pin (PCLK) index for flexio_camera.

• uint32_t hrefPinIdx
Horizontal sync pin (HREF) index for flexio_camera.

• uint32_t shifterStartIdx
First shifter index used for flexio_camera data FIFO.

• uint32_t shifterCount
The count of shifters that are used as flexio_camera data FIFO.

• uint32_t timerIdx
Timer index used for flexio_camera in FlexIO.
22.3.4.1.0.59

Field Documentation

22.3.4.1.0.59.1

FLEXIO_Type∗ FLEXIO_CAMERA_Type::flexioBase

22.3.4.1.0.59.2

uint32_t FLEXIO_CAMERA_Type::datPinStartIdx

Then the successive following FLEXIO_CAMERA_DATA_WIDTH-1 pins would be used as D1-D7.

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22.3.4.1.0.59.3

uint32_t FLEXIO_CAMERA_Type::pclkPinIdx

22.3.4.1.0.59.4

uint32_t FLEXIO_CAMERA_Type::hrefPinIdx

22.3.4.1.0.59.5

uint32_t FLEXIO_CAMERA_Type::shifterStartIdx

22.3.4.1.0.59.6

uint32_t FLEXIO_CAMERA_Type::shifterCount

22.3.4.1.0.59.7

uint32_t FLEXIO_CAMERA_Type::timerIdx

22.3.4.2

struct flexio_camera_config_t

Data Fields

• bool enablecamera
Enable/disable FLEXIO camera TX & RX.

• bool enableInDoze
Enable/disable FLEXIO operation in doze mode.

• bool enableInDebug
Enable/disable FLEXIO operation in debug mode.

• bool enableFastAccess
Enable/disable fast access to FLEXIO registers, fast access requires the FLEXIO clock to be at least twice
the frequency of the bus clock.
22.3.4.2.0.60

Field Documentation

22.3.4.2.0.60.1

bool flexio_camera_config_t::enablecamera

22.3.4.2.0.60.2

bool flexio_camera_config_t::enableFastAccess

22.3.4.3

struct flexio_camera_transfer_t

Data Fields

• uint32_t dataAddress
Transfer buffer.

• uint32_t dataNum
Transfer num.

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22.3.5

Macro Definition Documentation

22.3.5.1

#define FSL_FLEXIO_CAMERA_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

22.3.5.2

#define FLEXIO_CAMERA_PARALLEL_DATA_WIDTH (8U)

22.3.6

Enumeration Type Documentation
enum _flexio_camera_status

22.3.6.1

Enumerator
kStatus_FLEXIO_CAMERA_RxBusy Receiver is busy.
kStatus_FLEXIO_CAMERA_RxIdle CAMERA receiver is idle.

enum _flexio_camera_status_flags

22.3.6.2

Enumerator
kFLEXIO_CAMERA_RxDataRegFullFlag Receive buffer full flag.
kFLEXIO_CAMERA_RxErrorFlag Receive buffer error flag.

22.3.7

Function Documentation
void FLEXIO_CAMERA_Init ( FLEXIO_CAMERA_Type ∗ base, const
flexio_camera_config_t ∗ config )

22.3.7.1

Parameters
base
config

22.3.7.2

pointer to FLEXIO_CAMERA_Type structure
pointer to flexio_camera_config_t structure

void FLEXIO_CAMERA_Deinit ( FLEXIO_CAMERA_Type ∗ base )

Note
After calling this API, user need to call FLEXO_CAMERA_Init to use the FlexIO CAMERA module.

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Parameters
base

pointer to FLEXIO_CAMERA_Type structure

void FLEXIO_CAMERA_GetDefaultConfig ( flexio_camera_config_t ∗ config )

22.3.7.3

The configuration could be used directly for calling FLEXIO_CAMERA_Init(). Example:
flexio_camera_config_t config;
FLEXIO_CAMERA_GetDefaultConfig(&userConfig);

Parameters
config

pointer to flexio_camera_config_t structure

static void FLEXIO_CAMERA_Enable ( FLEXIO_CAMERA_Type ∗ base, bool
enable ) [inline], [static]

22.3.7.4

Parameters
base
enable

22.3.7.5

pointer to FLEXIO_CAMERA_Type
True to enable, false to disable.

uint32_t FLEXIO_CAMERA_GetStatusFlags ( FLEXIO_CAMERA_Type ∗ base )

Parameters
base

pointer to FLEXIO_CAMERA_Type structure

Returns
FlexIO shifter status flags
• FLEXIO_SHIFTSTAT_SSF_MASK
• 0

22.3.7.6

void FLEXIO_CAMERA_ClearStatusFlags ( FLEXIO_CAMERA_Type ∗ base,
uint32_t mask )

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Parameters
base

pointer to the device.

mask

status flag The parameter could be any combination of the following values:
• kFLEXIO_CAMERA_RxDataRegFullFlag
• kFLEXIO_CAMERA_RxErrorFlag

void FLEXIO_CAMERA_EnableInterrupt ( FLEXIO_CAMERA_Type ∗ base )

22.3.7.7

Parameters
base

pointer to the device.

void FLEXIO_CAMERA_DisableInterrupt ( FLEXIO_CAMERA_Type ∗ base )

22.3.7.8

Parameters
base

pointer to the device.

static void FLEXIO_CAMERA_EnableRxDMA ( FLEXIO_CAMERA_Type ∗ base,
bool enable ) [inline], [static]

22.3.7.9

Parameters
base
enable

pointer to FLEXIO_CAMERA_Type structure
True to enable, false to disable.

The FlexIO camera mode can’t work without the DMA or EDMA support, Usually, it needs at least two
DMA or EDMA channel, one for transferring data from camera, such as 0V7670 to FlexIO buffer, another
is for transferring data from FlexIO buffer to LCD.
22.3.7.10

static uint32_t FLEXIO_CAMERA_GetRxBufferAddress (
FLEXIO_CAMERA_Type ∗ base ) [inline], [static]

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Parameters
base

pointer to the device.

Returns
data pointer to the buffer that would keep the data with count of base->shifterCount .

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22.3.8

FlexIO DMA I2S Driver

22.3.8.1

Overview

Files

• file fsl_flexio_i2s_dma.h
Data Structures

• struct flexio_i2s_dma_handle_t
FlexIO I2S DMA transfer handle, users should not touch the content of the handle. More...

Typedefs

• typedef void(∗ flexio_i2s_dma_callback_t )(FLEXIO_I2S_Type ∗base, flexio_i2s_dma_handle_t ∗handle, status_t status, void ∗userData)
FlexIO I2S DMA transfer callback function for finish and error.

DMA Transactional

• void FLEXIO_I2S_TransferTxCreateHandleDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_dma_handle_t ∗handle, flexio_i2s_dma_callback_t callback, void ∗userData, dma_handle_t ∗dmaHandle)
Initializes the FlexIO I2S DMA handle.

• void FLEXIO_I2S_TransferRxCreateHandleDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_dma_handle_t ∗handle, flexio_i2s_dma_callback_t callback, void ∗userData, dma_handle_t ∗dmaHandle)
Initializes the FlexIO I2S Rx DMA handle.

• void FLEXIO_I2S_TransferSetFormatDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_dma_handle_t
∗handle, flexio_i2s_format_t ∗format, uint32_t srcClock_Hz)
Configures the FlexIO I2S Tx audio format.

• status_t FLEXIO_I2S_TransferSendDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_dma_handle_t ∗handle, flexio_i2s_transfer_t ∗xfer)
Performs a non-blocking FlexIO I2S transfer using DMA.

• status_t FLEXIO_I2S_TransferReceiveDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_dma_handle_t
∗handle, flexio_i2s_transfer_t ∗xfer)
Performs a non-blocking FlexIO I2S receive using DMA.

• void FLEXIO_I2S_TransferAbortSendDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_dma_handle_t
∗handle)
Aborts a FlexIO I2S transfer using DMA.

• void FLEXIO_I2S_TransferAbortReceiveDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_dma_handle_t ∗handle)
Aborts a FlexIO I2S receive using DMA.

• status_t FLEXIO_I2S_TransferGetSendCountDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_dma_handle_t ∗handle, size_t ∗count)
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Gets the remaining bytes to be sent.

• status_t FLEXIO_I2S_TransferGetReceiveCountDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_dma_handle_t ∗handle, size_t ∗count)
Gets the remaining bytes to be received.

22.3.8.2

Data Structure Documentation

22.3.8.2.1

struct _flexio_i2s_dma_handle

Data Fields

• dma_handle_t ∗ dmaHandle
DMA handler for FlexIO I2S send.

• uint8_t bytesPerFrame
Bytes in a frame.

• uint32_t state
Internal state for FlexIO I2S DMA transfer.

• flexio_i2s_dma_callback_t callback
Callback for users while transfer finish or error occurred.

• void ∗ userData
User callback parameter.

• flexio_i2s_transfer_t queue [FLEXIO_I2S_XFER_QUEUE_SIZE]
Transfer queue storing queued transfer.

• size_t transferSize [FLEXIO_I2S_XFER_QUEUE_SIZE]
Data bytes need to transfer.

• volatile uint8_t queueUser
Index for user to queue transfer.

• volatile uint8_t queueDriver
Index for driver to get the transfer data and size.
22.3.8.2.1.1

Field Documentation

22.3.8.2.1.1.1 flexio_i2s_transfer_t flexio_i2s_dma_handle_t::queue[FLEXIO_I2S_XFER_QUEUE_SIZE]
22.3.8.2.1.1.2

22.3.8.3
22.3.8.3.1

volatile uint8_t flexio_i2s_dma_handle_t::queueUser

Function Documentation
void FLEXIO_I2S_TransferTxCreateHandleDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_dma_handle_t ∗ handle, flexio_i2s_dma_callback_t callback, void ∗
userData, dma_handle_t ∗ dmaHandle )

This function initializes the FlexIO I2S master DMA handle which can be used for other FlexIO I2S
master transactional APIs. Usually, for a specified FlexIO I2S instance, user need only call this API once
to get the initialized handle.

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Parameters
base
handle
callback
userData
dmaHandle

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.
FlexIO I2S DMA callback function called while finished a block.
User parameter for callback.
DMA handle for FlexIO I2S. This handle shall be a static value allocated by users.

void FLEXIO_I2S_TransferRxCreateHandleDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_dma_handle_t ∗ handle, flexio_i2s_dma_callback_t callback, void ∗
userData, dma_handle_t ∗ dmaHandle )

22.3.8.3.2

This function initializes the FlexIO I2S slave DMA handle which can be used for other FlexIO I2S master
transactional APIs. Usually, for a specified FlexIO I2S instance, user need only call this API once to get
the initialized handle.
Parameters
base
handle
callback
userData
dmaHandle

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.
FlexIO I2S DMA callback function called while finished a block.
User parameter for callback.
DMA handle for FlexIO I2S. This handle shall be a static value allocated by users.

void FLEXIO_I2S_TransferSetFormatDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_dma_handle_t ∗ handle, flexio_i2s_format_t ∗ format, uint32_t srcClock_Hz
)

22.3.8.3.3

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and
audio data format to be transferred. This function also sets DMA parameter according to format.
Parameters
base
handle

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer

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format
srcClock_Hz

Pointer to FlexIO I2S audio data format structure.
FlexIO I2S clock source frequency in Hz. It should be 0 while in slave mode.

Return values
kStatus_Success

Audio format set successfully.

kStatus_InvalidArgument

The input arguments is invalid.

status_t FLEXIO_I2S_TransferSendDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_dma_handle_t ∗ handle, flexio_i2s_transfer_t ∗ xfer )

22.3.8.3.4

Note
This interface returns immediately after transfer initiates. Call FLEXIO_I2S_GetTransferStatus to
poll the transfer status and check whether FLEXIO I2S transfer finished.
Parameters
base
handle
xfer

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.
Pointer to DMA transfer structure.

Return values
kStatus_Success
kStatus_InvalidArgument
kStatus_TxBusy

22.3.8.3.5

Start a FlexIO I2S DMA send successfully.
The input arguments is invalid.
FlexIO I2S is busy sending data.

status_t FLEXIO_I2S_TransferReceiveDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_dma_handle_t ∗ handle, flexio_i2s_transfer_t ∗ xfer )

Note
This interface returns immediately after transfer initiates. Call FLEXIO_I2S_GetReceiveRemainingBytes to poll the transfer status to check whether the FlexIO I2S transfer is finished.

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Parameters
base
handle
xfer

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.
Pointer to DMA transfer structure.

Return values
kStatus_Success
kStatus_InvalidArgument
kStatus_RxBusy

Start a FlexIO I2S DMA receive successfully.
The input arguments is invalid.
FlexIO I2S is busy receiving data.

void FLEXIO_I2S_TransferAbortSendDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_dma_handle_t ∗ handle )

22.3.8.3.6

Parameters
base
handle

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.

void FLEXIO_I2S_TransferAbortReceiveDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_dma_handle_t ∗ handle )

22.3.8.3.7

Parameters
base
handle

22.3.8.3.8

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.

status_t FLEXIO_I2S_TransferGetSendCountDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_dma_handle_t ∗ handle, size_t ∗ count )

Parameters
base

FlexIO I2S peripheral base address.

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handle
count

FlexIO I2S DMA handle pointer.
Bytes sent.

Return values
kStatus_Success
kStatus_NoTransferInProgress

Succeed get the transfer count.
There is not a non-blocking transaction currently in progress.

status_t FLEXIO_I2S_TransferGetReceiveCountDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_dma_handle_t ∗ handle, size_t ∗ count )

22.3.8.3.9

Parameters
base
handle
count

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.
Bytes received.

Return values
kStatus_Success
kStatus_NoTransferInProgress

Succeed get the transfer count.
There is not a non-blocking transaction currently in progress.

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22.3.9

FlexIO DMA SPI Driver

22.3.9.1

Overview

Files

• file fsl_flexio_spi_dma.h
Data Structures

• struct flexio_spi_master_dma_handle_t
FlexIO SPI DMA transfer handle, users should not touch the content of the handle. More...

Typedefs

• typedef
flexio_spi_master_dma_handle_t flexio_spi_slave_dma_handle_t
Slave handle is the same with master handle.

• typedef void(∗ flexio_spi_master_dma_transfer_callback_t )(FLEXIO_SPI_Type ∗base, flexio_spi_master_dma_handle_t ∗handle, status_t status, void ∗userData)
FlexIO SPI master callback for finished transmit.

• typedef void(∗ flexio_spi_slave_dma_transfer_callback_t )(FLEXIO_SPI_Type ∗base, flexio_spi_slave_dma_handle_t ∗handle, status_t status, void ∗userData)
FlexIO SPI slave callback for finished transmit.

DMA Transactional

• status_t FLEXIO_SPI_MasterTransferCreateHandleDMA (FLEXIO_SPI_Type ∗base, flexio_spi_master_dma_handle_t ∗handle, flexio_spi_master_dma_transfer_callback_t callback, void ∗userData, dma_handle_t ∗txHandle, dma_handle_t ∗rxHandle)
Initializes the FLEXO SPI master DMA handle.

• status_t FLEXIO_SPI_MasterTransferDMA (FLEXIO_SPI_Type ∗base, flexio_spi_master_dma_handle_t ∗handle, flexio_spi_transfer_t ∗xfer)
Performs a non-blocking FlexIO SPI transfer using DMA.

• void FLEXIO_SPI_MasterTransferAbortDMA (FLEXIO_SPI_Type ∗base, flexio_spi_master_dma_handle_t ∗handle)
Aborts a FlexIO SPI transfer using DMA.

• status_t FLEXIO_SPI_MasterTransferGetCountDMA (FLEXIO_SPI_Type ∗base, flexio_spi_master_dma_handle_t ∗handle, size_t ∗count)
Gets the remaining bytes for FlexIO SPI DMA transfer.

• static void FLEXIO_SPI_SlaveTransferCreateHandleDMA (FLEXIO_SPI_Type ∗base, flexio_spi_slave_dma_handle_t ∗handle, flexio_spi_slave_dma_transfer_callback_t callback, void ∗userData,
dma_handle_t ∗txHandle, dma_handle_t ∗rxHandle)
Initializes the FlexIO SPI slave DMA handle.

• status_t FLEXIO_SPI_SlaveTransferDMA (FLEXIO_SPI_Type ∗base, flexio_spi_slave_dma_handle_t ∗handle, flexio_spi_transfer_t ∗xfer)
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Performs a non-blocking FlexIO SPI transfer using DMA.

• static void FLEXIO_SPI_SlaveTransferAbortDMA (FLEXIO_SPI_Type ∗base, flexio_spi_slave_dma_handle_t ∗handle)
Aborts a FlexIO SPI transfer using DMA.

• static status_t FLEXIO_SPI_SlaveTransferGetCountDMA (FLEXIO_SPI_Type ∗base, flexio_spi_slave_dma_handle_t ∗handle, size_t ∗count)
Gets the remaining bytes to be transferred for FlexIO SPI DMA.

22.3.9.2

Data Structure Documentation

22.3.9.2.1

struct _flexio_spi_master_dma_handle

typedef for flexio_spi_master_dma_handle_t in advance.
Data Fields

• size_t transferSize
Total bytes to be transferred.

• bool txInProgress
Send transfer in progress.

• bool rxInProgress
Receive transfer in progress.

• dma_handle_t ∗ txHandle
DMA handler for SPI send.

• dma_handle_t ∗ rxHandle
DMA handler for SPI receive.

• flexio_spi_master_dma_transfer_callback_t callback
Callback for SPI DMA transfer.

• void ∗ userData
User Data for SPI DMA callback.

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22.3.9.2.1.1

Field Documentation

22.3.9.2.1.1.1

22.3.9.3

size_t flexio_spi_master_dma_handle_t::transferSize

Typedef Documentation
typedef flexio_spi_master_dma_handle_t flexio_spi_slave_dma_handle_t

22.3.9.3.1

22.3.9.4

Function Documentation
status_t FLEXIO_SPI_MasterTransferCreateHandleDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_dma_handle_t ∗ handle, flexio_spi_master_dma_transfer_callback_t callback, void ∗ userData, dma_handle_t ∗ txHandle, dma_handle_t ∗ rxHandle
)

22.3.9.4.1

This function initializes the FLEXO SPI master DMA handle which can be used for other FLEXO SPI
master transactional APIs. Usually, for a specified FLEXO SPI instance, user need only call this API once
to get the initialized handle.
Parameters
base
handle
callback

pointer to FLEXIO_SPI_Type structure.
pointer to flexio_spi_master_dma_handle_t structure to store the transfer state.
SPI callback, NULL means no callback.

userData

callback function parameter.

txHandle

User requested DMA handle for FlexIO SPI RX DMA transfer.

rxHandle

User requested DMA handle for FlexIO SPI TX DMA transfer.

Return values
kStatus_Success
kStatus_OutOfRange

22.3.9.4.2

Successfully create the handle.
The FlexIO SPI DMA type/handle table out of range.

status_t FLEXIO_SPI_MasterTransferDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_dma_handle_t ∗ handle, flexio_spi_transfer_t ∗ xfer )

Note
This interface returned immediately after transfer initiates, users could call FLEXIO_SPI_MasterGetTransferCountDMA to poll the transfer status to check whether FlexIO SPI transfer finished.

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Parameters
base
handle
xfer

pointer to FLEXIO_SPI_Type structure.
pointer to flexio_spi_master_dma_handle_t structure to store the transfer state.
Pointer to FlexIO SPI transfer structure.

Return values
kStatus_Success
kStatus_InvalidArgument
kStatus_FLEXIO_SPI_Busy

Successfully start a transfer.
Input argument is invalid.
FlexIO SPI is not idle, is running another transfer.

void FLEXIO_SPI_MasterTransferAbortDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_dma_handle_t ∗ handle )

22.3.9.4.3

Parameters
base
handle

pointer to FLEXIO_SPI_Type structure.
FlexIO SPI DMA handle pointer.

status_t FLEXIO_SPI_MasterTransferGetCountDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_dma_handle_t ∗ handle, size_t ∗ count )

22.3.9.4.4

Parameters
base
handle
count

22.3.9.4.5

pointer to FLEXIO_SPI_Type structure.
FlexIO SPI DMA handle pointer.
Number of bytes transferred so far by the non-blocking transaction.

static void FLEXIO_SPI_SlaveTransferCreateHandleDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_slave_dma_handle_t ∗ handle, flexio_spi_slave_dma_transfer_callback_t
callback, void ∗ userData, dma_handle_t ∗ txHandle, dma_handle_t ∗ rxHandle )
[inline], [static]

This function initializes the FlexIO SPI slave DMA handle.

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Parameters
base
handle
callback

pointer to FLEXIO_SPI_Type structure.
pointer to flexio_spi_slave_dma_handle_t structure to store the transfer state.
SPI callback, NULL means no callback.

userData

callback function parameter.

txHandle

User requested DMA handle for FlexIO SPI TX DMA transfer.

rxHandle

User requested DMA handle for FlexIO SPI RX DMA transfer.

status_t FLEXIO_SPI_SlaveTransferDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_slave_dma_handle_t ∗ handle, flexio_spi_transfer_t ∗ xfer )

22.3.9.4.6

Note
This interface returned immediately after transfer initiates, users could call FLEXIO_SPI_SlaveGetTransferCountDMA to poll the transfer status to check whether FlexIO SPI transfer finished.
Parameters
base
handle
xfer

pointer to FLEXIO_SPI_Type structure.
pointer to flexio_spi_slave_dma_handle_t structure to store the transfer state.
Pointer to FlexIO SPI transfer structure.

Return values
kStatus_Success
kStatus_InvalidArgument
kStatus_FLEXIO_SPI_Busy

22.3.9.4.7

Successfully start a transfer.
Input argument is invalid.
FlexIO SPI is not idle, is running another transfer.

static void FLEXIO_SPI_SlaveTransferAbortDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_slave_dma_handle_t ∗ handle ) [inline], [static]

Parameters

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base
handle

pointer to FLEXIO_SPI_Type structure.
pointer to flexio_spi_slave_dma_handle_t structure to store the transfer state.

static status_t FLEXIO_SPI_SlaveTransferGetCountDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_slave_dma_handle_t ∗ handle, size_t ∗ count ) [inline], [static]

22.3.9.4.8

Parameters
base
handle
count

pointer to FLEXIO_SPI_Type structure.
FlexIO SPI DMA handle pointer.
Number of bytes transferred so far by the non-blocking transaction.

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22.3.10

FlexIO DMA UART Driver

22.3.10.1

Overview

Files

• file fsl_flexio_uart_dma.h
Data Structures

• struct flexio_uart_dma_handle_t
UART DMA handle. More...

Typedefs

• typedef void(∗ flexio_uart_dma_transfer_callback_t )(FLEXIO_UART_Type ∗base, flexio_uart_dma_handle_t ∗handle, status_t status, void ∗userData)
UART transfer callback function.

eDMA transactional

• status_t FLEXIO_UART_TransferCreateHandleDMA (FLEXIO_UART_Type ∗base, flexio_uart_dma_handle_t ∗handle, flexio_uart_dma_transfer_callback_t callback, void ∗userData, dma_handle_t ∗txDmaHandle, dma_handle_t ∗rxDmaHandle)
Initializes the FLEXIO_UART handle which is used in transactional functions.

• status_t FLEXIO_UART_TransferSendDMA (FLEXIO_UART_Type ∗base, flexio_uart_dma_handle_t ∗handle, flexio_uart_transfer_t ∗xfer)
Sends data using DMA.

• status_t FLEXIO_UART_TransferReceiveDMA (FLEXIO_UART_Type ∗base, flexio_uart_dma_handle_t ∗handle, flexio_uart_transfer_t ∗xfer)
Receives data using DMA.

• void FLEXIO_UART_TransferAbortSendDMA (FLEXIO_UART_Type ∗base, flexio_uart_dma_handle_t ∗handle)
Aborts the sent data which using DMA.

• void FLEXIO_UART_TransferAbortReceiveDMA (FLEXIO_UART_Type ∗base, flexio_uart_dma_handle_t ∗handle)
Aborts the receive data which using DMA.

• status_t FLEXIO_UART_TransferGetSendCountDMA (FLEXIO_UART_Type ∗base, flexio_uart_dma_handle_t ∗handle, size_t ∗count)
Gets the number of bytes still not sent out.

• status_t FLEXIO_UART_TransferGetReceiveCountDMA (FLEXIO_UART_Type ∗base, flexio_uart_dma_handle_t ∗handle, size_t ∗count)
Gets the number of bytes still not received.

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22.3.10.2

Data Structure Documentation

22.3.10.2.1

struct _flexio_uart_dma_handle

Data Fields

• flexio_uart_dma_transfer_callback_t callback
Callback function.

• void ∗ userData
UART callback function parameter.

• size_t txSize
Total bytes to be sent.

• size_t rxSize
Total bytes to be received.

• dma_handle_t ∗ txDmaHandle
The DMA TX channel used.

• dma_handle_t ∗ rxDmaHandle
The DMA RX channel used.

• volatile uint8_t txState
TX transfer state.

• volatile uint8_t rxState
RX transfer state.
22.3.10.2.1.1

Field Documentation

22.3.10.2.1.1.1 flexio_uart_dma_transfer_callback_t flexio_uart_dma_handle_t::callback
22.3.10.2.1.1.2

void∗ flexio_uart_dma_handle_t::userData

22.3.10.2.1.1.3

size_t flexio_uart_dma_handle_t::txSize

22.3.10.2.1.1.4

size_t flexio_uart_dma_handle_t::rxSize

22.3.10.2.1.1.5 dma_handle_t∗ flexio_uart_dma_handle_t::txDmaHandle
22.3.10.2.1.1.6 dma_handle_t∗ flexio_uart_dma_handle_t::rxDmaHandle
22.3.10.2.1.1.7

22.3.10.3
22.3.10.3.1

22.3.10.4
22.3.10.4.1

volatile uint8_t flexio_uart_dma_handle_t::txState

Typedef Documentation
typedef void(∗ flexio_uart_dma_transfer_callback_t)(FLEXIO_UART_Type ∗base,
flexio_uart_dma_handle_t ∗handle, status_t status, void ∗userData)

Function Documentation
status_t FLEXIO_UART_TransferCreateHandleDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_dma_handle_t ∗ handle, flexio_uart_dma_transfer_callback_t callback,
void ∗ userData, dma_handle_t ∗ txDmaHandle, dma_handle_t ∗ rxDmaHandle )

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Parameters
base
handle
callback
userData

Pointer to FLEXIO_UART_Type structure.
Pointer to flexio_uart_dma_handle_t structure.
FlexIO UART callback, NULL means no callback.
User callback function data.

txDmaHandle

User requested DMA handle for TX DMA transfer.

rxDmaHandle

User requested DMA handle for RX DMA transfer.

Return values
kStatus_Success
kStatus_OutOfRange

22.3.10.4.2

Successfully create the handle.
The FlexIO UART DMA type/handle table out of range.

status_t FLEXIO_UART_TransferSendDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_dma_handle_t ∗ handle, flexio_uart_transfer_t ∗ xfer )

This function send data using DMA, this is non-blocking function, which return right away. When all data
have been sent out, the send callback function is called.
Parameters
base
handle
xfer

Pointer to FLEXIO_UART_Type structure
Pointer to flexio_uart_dma_handle_t structure
FLEXIO_UART DMA transfer structure, refer to flexio_uart_transfer_t.

Return values
kStatus_Success
kStatus_FLEXIO_UART_TxBusy

22.3.10.4.3

if succeed, others failed.
Previous transfer on going.

status_t FLEXIO_UART_TransferReceiveDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_dma_handle_t ∗ handle, flexio_uart_transfer_t ∗ xfer )

This function receives data using DMA. This is non-blocking function, which returns right away. When
all data have been received, the receive callback function is called.

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Parameters
base
handle
xfer

Pointer to FLEXIO_UART_Type structure
Pointer to flexio_uart_dma_handle_t structure
FLEXIO_UART DMA transfer sturcture, refer to flexio_uart_transfer_t.

Return values
kStatus_Success
kStatus_FLEXIO_UART_RxBusy

22.3.10.4.4

if succeed, others failed.
Previous transfer on going.

void FLEXIO_UART_TransferAbortSendDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_dma_handle_t ∗ handle )

This function aborts the sent data which using DMA.
Parameters
base
handle

22.3.10.4.5

Pointer to FLEXIO_UART_Type structure
Pointer to flexio_uart_dma_handle_t structure

void FLEXIO_UART_TransferAbortReceiveDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_dma_handle_t ∗ handle )

This function aborts the receive data which using DMA.
Parameters
base
handle

22.3.10.4.6

Pointer to FLEXIO_UART_Type structure
Pointer to flexio_uart_dma_handle_t structure

status_t FLEXIO_UART_TransferGetSendCountDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_dma_handle_t ∗ handle, size_t ∗ count )

This function gets the number of bytes still not sent out.

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Parameters
base
handle
count

22.3.10.4.7

Pointer to FLEXIO_UART_Type structure
Pointer to flexio_uart_dma_handle_t structure
Number of bytes sent so far by the non-blocking transaction.

status_t FLEXIO_UART_TransferGetReceiveCountDMA ( FLEXIO_UART_Type ∗
base, flexio_uart_dma_handle_t ∗ handle, size_t ∗ count )

This function gets the number of bytes still not received.
Parameters
base
handle
count

Pointer to FLEXIO_UART_Type structure
Pointer to flexio_uart_dma_handle_t structure
Number of bytes received so far by the non-blocking transaction.

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22.3.11

FlexIO eDMA Camera Driver

22.3.11.1

Overview

Files

• file fsl_flexio_camera_edma.h
Data Structures

• struct flexio_camera_edma_handle_t
CAMERA eDMA handle. More...

Typedefs

• typedef void(∗ flexio_camera_edma_transfer_callback_t )(FLEXIO_CAMERA_Type ∗base, flexio_camera_edma_handle_t ∗handle, status_t status, void ∗userData)
CAMERA transfer callback function.

eDMA transactional

• status_t FLEXIO_CAMERA_TransferCreateHandleEDMA (FLEXIO_CAMERA_Type ∗base,
flexio_camera_edma_handle_t ∗handle, flexio_camera_edma_transfer_callback_t callback, void
∗userData, edma_handle_t ∗rxEdmaHandle)
Initializes the camera handle, which is used in transactional functions.

• status_t FLEXIO_CAMERA_TransferReceiveEDMA (FLEXIO_CAMERA_Type ∗base, flexio_camera_edma_handle_t ∗handle, flexio_camera_transfer_t ∗xfer)
Receives data using eDMA.

• void FLEXIO_CAMERA_TransferAbortReceiveEDMA (FLEXIO_CAMERA_Type ∗base, flexio_camera_edma_handle_t ∗handle)
Aborts the receive data which used the eDMA.

• status_t FLEXIO_CAMERA_TransferGetReceiveCountEDMA (FLEXIO_CAMERA_Type ∗base,
flexio_camera_edma_handle_t ∗handle, size_t ∗count)
Gets the remaining bytes to be received.

22.3.11.2
22.3.11.2.1

Data Structure Documentation
struct _flexio_camera_edma_handle

Forward declaration of the handle typedef.
Data Fields

• flexio_camera_edma_transfer_callback_t callback
Callback function.

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• void ∗ userData
CAMERA callback function parameter.

• size_t rxSize
Total bytes to be received.

• edma_handle_t ∗ rxEdmaHandle
The eDMA RX channel used.

• volatile uint8_t rxState
RX transfer state.
22.3.11.2.1.1

Field Documentation

22.3.11.2.1.1.1 flexio_camera_edma_transfer_callback_t flexio_camera_edma_handle_t::callback
22.3.11.2.1.1.2

void∗ flexio_camera_edma_handle_t::userData

22.3.11.2.1.1.3

size_t flexio_camera_edma_handle_t::rxSize

22.3.11.2.1.1.4 edma_handle_t∗ flexio_camera_edma_handle_t::rxEdmaHandle

22.3.11.3

Typedef Documentation

22.3.11.3.1

22.3.11.4

typedef void(∗ flexio_camera_edma_transfer_callback_t)(FLEXIO_CAMERA_Type
∗base, flexio_camera_edma_handle_t ∗handle, status_t status, void ∗userData)

Function Documentation

22.3.11.4.1

status_t FLEXIO_CAMERA_TransferCreateHandleEDMA ( FLEXIO_CAMERA_Type
∗ base, flexio_camera_edma_handle_t ∗ handle, flexio_camera_edma_transfer_callback_t callback, void ∗ userData, edma_handle_t ∗ rxEdmaHandle
)

Parameters
base
handle
callback
userData
rxEdmaHandle

pointer to FLEXIO_CAMERA_Type.
Pointer to flexio_camera_edma_handle_t structure.
The callback function.
The parameter of the callback function.
User requested DMA handle for RX DMA transfer.

Return values

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kStatus_Success
kStatus_OutOfRange

22.3.11.4.2

Successfully create the handle.
The FlexIO camera eDMA type/handle table out of range.

status_t FLEXIO_CAMERA_TransferReceiveEDMA ( FLEXIO_CAMERA_Type ∗
base, flexio_camera_edma_handle_t ∗ handle, flexio_camera_transfer_t ∗ xfer )

This function receives data using eDMA. This is a non-blocking function, which returns right away. When
all data is received, the receive callback function is called.
Parameters
base
handle
xfer

Pointer to the FLEXIO_CAMERA_Type.
Pointer to the flexio_camera_edma_handle_t structure.
CAMERA eDMA transfer structure, see flexio_camera_transfer_t.

Return values
kStatus_Success

if succeeded, others failed.

kStatus_CAMERA_RxBusy

Previous transfer on going.

22.3.11.4.3

void FLEXIO_CAMERA_TransferAbortReceiveEDMA ( FLEXIO_CAMERA_Type ∗
base, flexio_camera_edma_handle_t ∗ handle )

This function aborts the receive data which used the eDMA.
Parameters
base
handle

22.3.11.4.4

Pointer to the FLEXIO_CAMERA_Type.
Pointer to the flexio_camera_edma_handle_t structure.

status_t FLEXIO_CAMERA_TransferGetReceiveCountEDMA ( FLEXIO_CAMERA_Type ∗ base, flexio_camera_edma_handle_t ∗ handle, size_t ∗ count
)

This function gets the number of bytes still not received.

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Parameters
base
handle
count

Pointer to the FLEXIO_CAMERA_Type.
Pointer to the flexio_camera_edma_handle_t structure.
Number of bytes sent so far by the non-blocking transaction.

Return values
kStatus_Success

Succeed get the transfer count.

kStatus_InvalidArgument

The count parameter is invalid.

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22.3.12

FlexIO eDMA I2S Driver

22.3.12.1

Overview

Files

• file fsl_flexio_i2s_edma.h
Data Structures

• struct flexio_i2s_edma_handle_t
FlexIO I2S DMA transfer handle, users should not touch the content of the handle. More...

Typedefs

• typedef void(∗ flexio_i2s_edma_callback_t )(FLEXIO_I2S_Type ∗base, flexio_i2s_edma_handle_t
∗handle, status_t status, void ∗userData)
FlexIO I2S eDMA transfer callback function for finish and error.

eDMA Transactional

• void FLEXIO_I2S_TransferTxCreateHandleEDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_edma_handle_t ∗handle, flexio_i2s_edma_callback_t callback, void ∗userData, edma_handle_t ∗dmaHandle)
Initializes the FlexIO I2S eDMA handle.

• void FLEXIO_I2S_TransferRxCreateHandleEDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_edma_handle_t ∗handle, flexio_i2s_edma_callback_t callback, void ∗userData, edma_handle_t ∗dmaHandle)
Initializes the FlexIO I2S Rx eDMA handle.

• void FLEXIO_I2S_TransferSetFormatEDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_edma_handle_t ∗handle, flexio_i2s_format_t ∗format, uint32_t srcClock_Hz)
Configures the FlexIO I2S Tx audio format.

• status_t FLEXIO_I2S_TransferSendEDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_edma_handle_t
∗handle, flexio_i2s_transfer_t ∗xfer)
Performs a non-blocking FlexIO I2S transfer using DMA.

• status_t FLEXIO_I2S_TransferReceiveEDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_edma_handle_t ∗handle, flexio_i2s_transfer_t ∗xfer)
Performs a non-blocking FlexIO I2S receive using eDMA.

• void FLEXIO_I2S_TransferAbortSendEDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_edma_handle_t ∗handle)
Aborts a FlexIO I2S transfer using eDMA.

• void FLEXIO_I2S_TransferAbortReceiveEDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_edma_handle_t ∗handle)
Aborts a FlexIO I2S receive using eDMA.

• status_t FLEXIO_I2S_TransferGetSendCountEDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_edma_handle_t ∗handle, size_t ∗count)
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Gets the remaining bytes to be sent.

• status_t FLEXIO_I2S_TransferGetReceiveCountEDMA (FLEXIO_I2S_Type ∗base, flexio_i2s_edma_handle_t ∗handle, size_t ∗count)
Get the remaining bytes to be received.

22.3.12.2

Data Structure Documentation

22.3.12.2.1

struct _flexio_i2s_edma_handle

Data Fields

• edma_handle_t ∗ dmaHandle
DMA handler for FlexIO I2S send.

• uint8_t bytesPerFrame
Bytes in a frame.

• uint32_t state
Internal state for FlexIO I2S eDMA transfer.

• flexio_i2s_edma_callback_t callback
Callback for users while transfer finish or error occurred.

• void ∗ userData
User callback parameter.

• edma_tcd_t tcd [FLEXIO_I2S_XFER_QUEUE_SIZE+1U]
TCD pool for eDMA transfer.

• flexio_i2s_transfer_t queue [FLEXIO_I2S_XFER_QUEUE_SIZE]
Transfer queue storing queued transfer.

• size_t transferSize [FLEXIO_I2S_XFER_QUEUE_SIZE]
Data bytes need to transfer.

• volatile uint8_t queueUser
Index for user to queue transfer.

• volatile uint8_t queueDriver
Index for driver to get the transfer data and size.

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22.3.12.2.1.1

Field Documentation

22.3.12.2.1.1.1 edma_tcd_t flexio_i2s_edma_handle_t::tcd[FLEXIO_I2S_XFER_QUEUE_SIZE+1U]
22.3.12.2.1.1.2 flexio_i2s_transfer_t flexio_i2s_edma_handle_t::queue[FLEXIO_I2S_XFER_QUEUE_SIZE]
22.3.12.2.1.1.3

22.3.12.3

volatile uint8_t flexio_i2s_edma_handle_t::queueUser

Function Documentation

22.3.12.3.1

void FLEXIO_I2S_TransferTxCreateHandleEDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_edma_handle_t ∗ handle, flexio_i2s_edma_callback_t callback, void ∗
userData, edma_handle_t ∗ dmaHandle )

This function initializes the FlexIO I2S master DMA handle which can be used for other FlexIO I2S
master transactional APIs. Usually, for a specified FlexIO I2S instance, user need only call this API once
to get the initialized handle.
Parameters
base
handle
callback
userData
dmaHandle

22.3.12.3.2

FlexIO I2S peripheral base address.
FlexIO I2S eDMA handle pointer.
FlexIO I2S eDMA callback function called while finished a block.
User parameter for callback.
eDMA handle for FlexIO I2S. This handle shall be a static value allocated by users.

void FLEXIO_I2S_TransferRxCreateHandleEDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_edma_handle_t ∗ handle, flexio_i2s_edma_callback_t callback, void ∗
userData, edma_handle_t ∗ dmaHandle )

This function initializes the FlexIO I2S slave DMA handle which can be used for other FlexIO I2S master
transactional APIs. Usually, for a specified FlexIO I2S instance, user need only call this API once to get
the initialized handle.
Parameters
base

FlexIO I2S peripheral base address.

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handle
callback
userData
dmaHandle

22.3.12.3.3

FlexIO I2S eDMA handle pointer.
FlexIO I2S eDMA callback function called while finished a block.
User parameter for callback.
eDMA handle for FlexIO I2S. This handle shall be a static value allocated by users.

void FLEXIO_I2S_TransferSetFormatEDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_edma_handle_t ∗ handle, flexio_i2s_format_t ∗ format, uint32_t
srcClock_Hz )

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and
audio data format to be transferred. This function also sets eDMA parameter according to format.
Parameters
base

FlexIO I2S peripheral base address.

handle

FlexIO I2S eDMA handle pointer

format

Pointer to FlexIO I2S audio data format structure.

srcClock_Hz

FlexIO I2S clock source frequency in Hz, it should be 0 while in slave mode.

Return values
kStatus_Success

Audio format set successfully.

kStatus_InvalidArgument

The input arguments is invalid.

22.3.12.3.4

status_t FLEXIO_I2S_TransferSendEDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_edma_handle_t ∗ handle, flexio_i2s_transfer_t ∗ xfer )

Note
This interface returned immediately after transfer initiates, users should call FLEXIO_I2S_GetTransferStatus to poll the transfer status to check whether FlexIO I2S transfer finished.
Parameters
base

FlexIO I2S peripheral base address.

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handle
xfer

FlexIO I2S DMA handle pointer.
Pointer to DMA transfer structure.

Return values
kStatus_Success
kStatus_InvalidArgument
kStatus_TxBusy

22.3.12.3.5

Start a FlexIO I2S eDMA send successfully.
The input arguments is invalid.
FlexIO I2S is busy sending data.

status_t FLEXIO_I2S_TransferReceiveEDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_edma_handle_t ∗ handle, flexio_i2s_transfer_t ∗ xfer )

Note
This interface returned immediately after transfer initiates, users should call FLEXIO_I2S_GetReceiveRemainingBytes to poll the transfer status to check whether FlexIO I2S transfer finished.
Parameters
base
handle
xfer

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.
Pointer to DMA transfer structure.

Return values
kStatus_Success
kStatus_InvalidArgument
kStatus_RxBusy

22.3.12.3.6

Start a FlexIO I2S eDMA receive successfully.
The input arguments is invalid.
FlexIO I2S is busy receiving data.

void FLEXIO_I2S_TransferAbortSendEDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_edma_handle_t ∗ handle )

Parameters
base

FlexIO I2S peripheral base address.

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handle

22.3.12.3.7

FlexIO I2S DMA handle pointer.

void FLEXIO_I2S_TransferAbortReceiveEDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_edma_handle_t ∗ handle )

Parameters
base
handle

22.3.12.3.8

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.

status_t FLEXIO_I2S_TransferGetSendCountEDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_edma_handle_t ∗ handle, size_t ∗ count )

Parameters
base
handle
count

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.
Bytes sent.

Return values
kStatus_Success
kStatus_NoTransferInProgress

22.3.12.3.9

Succeed get the transfer count.
There is not a non-blocking transaction currently in progress.

status_t FLEXIO_I2S_TransferGetReceiveCountEDMA ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_edma_handle_t ∗ handle, size_t ∗ count )

Parameters
base
handle
count

FlexIO I2S peripheral base address.
FlexIO I2S DMA handle pointer.
Bytes received.

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Return values
kStatus_Success
kStatus_NoTransferInProgress

Succeed get the transfer count.
There is not a non-blocking transaction currently in progress.

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22.3.13

FlexIO eDMA SPI Driver

22.3.13.1

Overview

Files

• file fsl_flexio_spi_edma.h
Data Structures

• struct flexio_spi_master_edma_handle_t
FlexIO SPI eDMA transfer handle, users should not touch the content of the handle. More...

Typedefs

• typedef
flexio_spi_master_edma_handle_t flexio_spi_slave_edma_handle_t
Slave handle is the same with master handle.

• typedef void(∗ flexio_spi_master_edma_transfer_callback_t )(FLEXIO_SPI_Type ∗base, flexio_spi_master_edma_handle_t ∗handle, status_t status, void ∗userData)
FlexIO SPI master callback for finished transmit.

• typedef void(∗ flexio_spi_slave_edma_transfer_callback_t )(FLEXIO_SPI_Type ∗base, flexio_spi_slave_edma_handle_t ∗handle, status_t status, void ∗userData)
FlexIO SPI slave callback for finished transmit.

eDMA Transactional

• status_t FLEXIO_SPI_MasterTransferCreateHandleEDMA (FLEXIO_SPI_Type ∗base, flexio_spi_master_edma_handle_t ∗handle, flexio_spi_master_edma_transfer_callback_t callback, void
∗userData, edma_handle_t ∗txHandle, edma_handle_t ∗rxHandle)
Initializes the FLEXO SPI master eDMA handle.

• status_t FLEXIO_SPI_MasterTransferEDMA (FLEXIO_SPI_Type ∗base, flexio_spi_master_edma_handle_t ∗handle, flexio_spi_transfer_t ∗xfer)
Performs a non-blocking FlexIO SPI transfer using eDMA.

• void FLEXIO_SPI_MasterTransferAbortEDMA (FLEXIO_SPI_Type ∗base, flexio_spi_master_edma_handle_t ∗handle)
Aborts a FlexIO SPI transfer using eDMA.

• status_t FLEXIO_SPI_MasterTransferGetCountEDMA (FLEXIO_SPI_Type ∗base, flexio_spi_master_edma_handle_t ∗handle, size_t ∗count)
Gets the remaining bytes for FlexIO SPI eDMA transfer.

• static void FLEXIO_SPI_SlaveTransferCreateHandleEDMA (FLEXIO_SPI_Type ∗base, flexio_spi_slave_edma_handle_t ∗handle, flexio_spi_slave_edma_transfer_callback_t callback, void
∗userData, edma_handle_t ∗txHandle, edma_handle_t ∗rxHandle)
Initializes the FlexIO SPI slave eDMA handle.

• status_t FLEXIO_SPI_SlaveTransferEDMA (FLEXIO_SPI_Type ∗base, flexio_spi_slave_edma_handle_t ∗handle, flexio_spi_transfer_t ∗xfer)
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Performs a non-blocking FlexIO SPI transfer using eDMA.

• static void FLEXIO_SPI_SlaveTransferAbortEDMA (FLEXIO_SPI_Type ∗base, flexio_spi_slave_edma_handle_t ∗handle)
Aborts a FlexIO SPI transfer using eDMA.

• static status_t FLEXIO_SPI_SlaveTransferGetCountEDMA (FLEXIO_SPI_Type ∗base, flexio_spi_slave_edma_handle_t ∗handle, size_t ∗count)
Gets the remaining bytes to be transferred for FlexIO SPI eDMA.

22.3.13.2
22.3.13.2.1

Data Structure Documentation
struct _flexio_spi_master_edma_handle

typedef for flexio_spi_master_edma_handle_t in advance.
Data Fields

• size_t transferSize
Total bytes to be transferred.

• bool txInProgress
Send transfer in progress.

• bool rxInProgress
Receive transfer in progress.

• edma_handle_t ∗ txHandle
DMA handler for SPI send.

• edma_handle_t ∗ rxHandle
DMA handler for SPI receive.

• flexio_spi_master_edma_transfer_callback_t callback
Callback for SPI DMA transfer.

• void ∗ userData
User Data for SPI DMA callback.

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22.3.13.2.1.1

Field Documentation

22.3.13.2.1.1.1

22.3.13.3

size_t flexio_spi_master_edma_handle_t::transferSize

Typedef Documentation

22.3.13.3.1

22.3.13.4

typedef flexio_spi_master_edma_handle_t flexio_spi_slave_edma_handle_t

Function Documentation

22.3.13.4.1

status_t FLEXIO_SPI_MasterTransferCreateHandleEDMA ( FLEXIO_SPI_Type ∗
base, flexio_spi_master_edma_handle_t ∗ handle, flexio_spi_master_edma_transfer_callback_t callback, void ∗ userData, edma_handle_t ∗ txHandle, edma_handle_t ∗
rxHandle )

This function initializes the FLEXO SPI master eDMA handle which can be used for other FLEXO SPI
master transactional APIs. For a specified FLEXO SPI instance, call this API once to get the initialized
handle.
Parameters
base
handle
callback

pointer to FLEXIO_SPI_Type structure.
pointer to flexio_spi_master_edma_handle_t structure to store the transfer state.
SPI callback, NULL means no callback.

userData

callback function parameter.

txHandle

User requested eDMA handle for FlexIO SPI RX eDMA transfer.

rxHandle

User requested eDMA handle for FlexIO SPI TX eDMA transfer.

Return values
kStatus_Success
kStatus_OutOfRange

22.3.13.4.2

Successfully create the handle.
The FlexIO SPI eDMA type/handle table out of range.

status_t FLEXIO_SPI_MasterTransferEDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_edma_handle_t ∗ handle, flexio_spi_transfer_t ∗ xfer )

Note
This interface returns immediately after transfer initiates. Call FLEXIO_SPI_MasterGetTransferCountEDMA to poll the transfer status to check whether FlexIO SPI transfer finished.

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Parameters
base
handle
xfer

pointer to FLEXIO_SPI_Type structure.
pointer to flexio_spi_master_edma_handle_t structure to store the transfer state.
Pointer to FlexIO SPI transfer structure.

Return values
kStatus_Success
kStatus_InvalidArgument
kStatus_FLEXIO_SPI_Busy

22.3.13.4.3

Successfully start a transfer.
Input argument is invalid.
FlexIO SPI is not idle, is running another transfer.

void FLEXIO_SPI_MasterTransferAbortEDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_edma_handle_t ∗ handle )

Parameters
base
handle

22.3.13.4.4

pointer to FLEXIO_SPI_Type structure.
FlexIO SPI eDMA handle pointer.

status_t FLEXIO_SPI_MasterTransferGetCountEDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_edma_handle_t ∗ handle, size_t ∗ count )

Parameters
base
handle
count

22.3.13.4.5

pointer to FLEXIO_SPI_Type structure.
FlexIO SPI eDMA handle pointer.
Number of bytes transferred so far by the non-blocking transaction.

static void FLEXIO_SPI_SlaveTransferCreateHandleEDMA ( FLEXIO_SPI_Type ∗
base, flexio_spi_slave_edma_handle_t ∗ handle, flexio_spi_slave_edma_transfer_callback_t callback, void ∗ userData, edma_handle_t ∗ txHandle, edma_handle_t ∗
rxHandle ) [inline], [static]

This function initializes the FlexIO SPI slave eDMA handle.

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Parameters
base
handle
callback

pointer to FLEXIO_SPI_Type structure.
pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.
SPI callback, NULL means no callback.

userData

callback function parameter.

txHandle

User requested eDMA handle for FlexIO SPI TX eDMA transfer.

rxHandle

User requested eDMA handle for FlexIO SPI RX eDMA transfer.

22.3.13.4.6

status_t FLEXIO_SPI_SlaveTransferEDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_slave_edma_handle_t ∗ handle, flexio_spi_transfer_t ∗ xfer )

Note
This interface returns immediately after transfer initiates. Call FLEXIO_SPI_SlaveGetTransferCountEDMA to poll the transfer status to check whether FlexIO SPI transfer finished.
Parameters
base
handle
xfer

pointer to FLEXIO_SPI_Type structure.
pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.
Pointer to FlexIO SPI transfer structure.

Return values
kStatus_Success
kStatus_InvalidArgument
kStatus_FLEXIO_SPI_Busy

22.3.13.4.7

Successfully start a transfer.
Input argument is invalid.
FlexIO SPI is not idle, is running another transfer.

static void FLEXIO_SPI_SlaveTransferAbortEDMA ( FLEXIO_SPI_Type ∗ base,
flexio_spi_slave_edma_handle_t ∗ handle ) [inline], [static]

Parameters

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base
handle

22.3.13.4.8

pointer to FLEXIO_SPI_Type structure.
pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.

static status_t FLEXIO_SPI_SlaveTransferGetCountEDMA ( FLEXIO_SPI_Type ∗
base, flexio_spi_slave_edma_handle_t ∗ handle, size_t ∗ count ) [inline],

[static]
Parameters
base
handle
count

pointer to FLEXIO_SPI_Type structure.
FlexIO SPI eDMA handle pointer.
Number of bytes transferred so far by the non-blocking transaction.

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22.3.14

FlexIO eDMA UART Driver

22.3.14.1

Overview

Files

• file fsl_flexio_uart_edma.h
Data Structures

• struct flexio_uart_edma_handle_t
UART eDMA handle. More...

Typedefs

• typedef void(∗ flexio_uart_edma_transfer_callback_t )(FLEXIO_UART_Type ∗base, flexio_uart_edma_handle_t ∗handle, status_t status, void ∗userData)
UART transfer callback function.

eDMA transactional

• status_t FLEXIO_UART_TransferCreateHandleEDMA (FLEXIO_UART_Type ∗base, flexio_uart_edma_handle_t ∗handle, flexio_uart_edma_transfer_callback_t callback, void ∗userData, edma_handle_t ∗txEdmaHandle, edma_handle_t ∗rxEdmaHandle)
Initializes the UART handle which is used in transactional functions.

• status_t FLEXIO_UART_TransferSendEDMA (FLEXIO_UART_Type ∗base, flexio_uart_edma_handle_t ∗handle, flexio_uart_transfer_t ∗xfer)
Sends data using eDMA.

• status_t FLEXIO_UART_TransferReceiveEDMA (FLEXIO_UART_Type ∗base, flexio_uart_edma_handle_t ∗handle, flexio_uart_transfer_t ∗xfer)
Receives data using eDMA.

• void FLEXIO_UART_TransferAbortSendEDMA (FLEXIO_UART_Type ∗base, flexio_uart_edma_handle_t ∗handle)
Aborts the sent data which using eDMA.

• void FLEXIO_UART_TransferAbortReceiveEDMA (FLEXIO_UART_Type ∗base, flexio_uart_edma_handle_t ∗handle)
Aborts the receive data which using eDMA.

• status_t FLEXIO_UART_TransferGetSendCountEDMA (FLEXIO_UART_Type ∗base, flexio_uart_edma_handle_t ∗handle, size_t ∗count)
Gets the number of bytes still not sent out.

• status_t FLEXIO_UART_TransferGetReceiveCountEDMA (FLEXIO_UART_Type ∗base, flexio_uart_edma_handle_t ∗handle, size_t ∗count)
Gets the number of bytes still not received.

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22.3.14.2

Data Structure Documentation

22.3.14.2.1

struct _flexio_uart_edma_handle

Data Fields

• flexio_uart_edma_transfer_callback_t callback
Callback function.

• void ∗ userData
UART callback function parameter.

• size_t txSize
Total bytes to be sent.

• size_t rxSize
Total bytes to be received.

• edma_handle_t ∗ txEdmaHandle
The eDMA TX channel used.

• edma_handle_t ∗ rxEdmaHandle
The eDMA RX channel used.

• volatile uint8_t txState
TX transfer state.

• volatile uint8_t rxState
RX transfer state.
22.3.14.2.1.1

Field Documentation

22.3.14.2.1.1.1 flexio_uart_edma_transfer_callback_t flexio_uart_edma_handle_t::callback
22.3.14.2.1.1.2

void∗ flexio_uart_edma_handle_t::userData

22.3.14.2.1.1.3

size_t flexio_uart_edma_handle_t::txSize

22.3.14.2.1.1.4

size_t flexio_uart_edma_handle_t::rxSize

22.3.14.2.1.1.5 edma_handle_t∗ flexio_uart_edma_handle_t::txEdmaHandle
22.3.14.2.1.1.6 edma_handle_t∗ flexio_uart_edma_handle_t::rxEdmaHandle
22.3.14.2.1.1.7

22.3.14.3
22.3.14.3.1

22.3.14.4
22.3.14.4.1

volatile uint8_t flexio_uart_edma_handle_t::txState

Typedef Documentation
typedef void(∗ flexio_uart_edma_transfer_callback_t)(FLEXIO_UART_Type ∗base,
flexio_uart_edma_handle_t ∗handle, status_t status, void ∗userData)

Function Documentation
status_t FLEXIO_UART_TransferCreateHandleEDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_edma_handle_t ∗ handle, flexio_uart_edma_transfer_callback_t callback,
void ∗ userData, edma_handle_t ∗ txEdmaHandle, edma_handle_t ∗ rxEdmaHandle )

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Parameters
base
handle
callback
userData

pointer to FLEXIO_UART_Type.
Pointer to flexio_uart_edma_handle_t structure.
The callback function.
The parameter of the callback function.

rxEdmaHandle

User requested DMA handle for RX DMA transfer.

txEdmaHandle

User requested DMA handle for TX DMA transfer.

Return values
kStatus_Success
kStatus_OutOfRange

22.3.14.4.2

Successfully create the handle.
The flexIO SPI eDMA type/handle table out of range.

status_t FLEXIO_UART_TransferSendEDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_edma_handle_t ∗ handle, flexio_uart_transfer_t ∗ xfer )

This function sends data using eDMA. This is a non-blocking function, which returns right away. When
all data have been sent out, the send callback function is called.
Parameters
base
handle
xfer

pointer to FLEXIO_UART_Type
UART handle pointer.
UART EDMA transfer structure, refer to flexio_uart_transfer_t.

Return values
kStatus_Success
kStatus_FLEXIO_UART_TxBusy

22.3.14.4.3

if succeed, others failed.
Previous transfer on going.

status_t FLEXIO_UART_TransferReceiveEDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_edma_handle_t ∗ handle, flexio_uart_transfer_t ∗ xfer )

This function receives data using eDMA. This is a non-blocking function, which returns right away. When
all data have been received, the receive callback function is called.

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Parameters
base
handle
xfer

pointer to FLEXIO_UART_Type
Pointer to flexio_uart_edma_handle_t structure
UART eDMA transfer structure, refer to flexio_uart_transfer_t.

Return values
kStatus_Success
kStatus_UART_RxBusy

22.3.14.4.4

if succeed, others failed.
Previous transfer on going.

void FLEXIO_UART_TransferAbortSendEDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_edma_handle_t ∗ handle )

This function aborts sent data which using eDMA.
Parameters
base
handle

22.3.14.4.5

pointer to FLEXIO_UART_Type
Pointer to flexio_uart_edma_handle_t structure

void FLEXIO_UART_TransferAbortReceiveEDMA ( FLEXIO_UART_Type ∗ base,
flexio_uart_edma_handle_t ∗ handle )

This function aborts the receive data which using eDMA.
Parameters
base
handle

22.3.14.4.6

pointer to FLEXIO_UART_Type
Pointer to flexio_uart_edma_handle_t structure

status_t FLEXIO_UART_TransferGetSendCountEDMA ( FLEXIO_UART_Type ∗
base, flexio_uart_edma_handle_t ∗ handle, size_t ∗ count )

This function gets the number of bytes still not sent out.

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Parameters
base
handle
count

22.3.14.4.7

pointer to FLEXIO_UART_Type
Pointer to flexio_uart_edma_handle_t structure
Number of bytes sent so far by the non-blocking transaction.

status_t FLEXIO_UART_TransferGetReceiveCountEDMA ( FLEXIO_UART_Type ∗
base, flexio_uart_edma_handle_t ∗ handle, size_t ∗ count )

This function gets the number of bytes still not received.
Parameters
base
handle
count

pointer to FLEXIO_UART_Type
Pointer to flexio_uart_edma_handle_t structure
Number of bytes sent so far by the non-blocking transaction.

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22.4

FlexIO I2C Master Driver

22.4.1

Overview

The KSDK provides a peripheral driver for I2C master function using Flexible I/O module of Kinetis
devices.

22.4.2

Overview

The FlexIO I2C master driver includes functional APIs and transactional APIs.
Functional APIs are feature/property target low level APIs. Functional APIs can be used for the FlexIO I2C
master initialization/configuration/operation for optimization/customization purpose. Using the functional
APIs requires the knowledge of the FlexIO I2C master peripheral and how to organize functional APIs
to meet the application requirements. The FlexIO I2C master functional operation groups provide the
functional APIs set.
Transactional APIs are transaction target high level APIs. The transactional APIs can be used to enable
the peripheral quickly and also in the application if the code size and performance of transactional APIs
satisfy the requirements. If the code size and performance are critical requirements, see the transactional
API implementation and write custom code using the functional APIs or accessing the hardware registers.
Transactional APIs support asynchronous transfer. This means that the functions FLEXIO_I2C_MasterTransferNonBlocking() set up the interrupt non-blocking transfer. When the transfer completes, the upper
layer is notified through a callback function with the kStatus_Success status.

22.4.3
22.4.3.1

Typical use case
FlexIO I2C master transfer using an interrupt method

flexio_i2c_master_handle_t g_m_handle;
flexio_i2c_master_config_t masterConfig;
flexio_i2c_master_transfer_t masterXfer;
volatile bool completionFlag = false;
const uint8_t sendData[] = [......];
FLEXIO_I2C_Type i2cDev;
void FLEXIO_I2C_MasterCallback(FLEXIO_I2C_Type *base, status_t status, void *userData)
{
userData = userData;
if (kStatus_Success == status)
{
completionFlag = true;
}
}
void main(void)
{
//...
FLEXIO_I2C_MasterGetDefaultConfig(&masterConfig);

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FlexIO I2C Master Driver
FLEXIO_I2C_MasterInit(&i2cDev, &user_config);
FLEXIO_I2C_MasterTransferCreateHandle(&i2cDev, &g_m_handle,
FLEXIO_I2C_MasterCallback, NULL);
// Prepares to send.
masterXfer.slaveAddress = g_accel_address[0];
masterXfer.direction = kI2C_Read;
masterXfer.subaddress = &who_am_i_reg;
masterXfer.subaddressSize = 1;
masterXfer.data = &who_am_i_value;
masterXfer.dataSize = 1;
masterXfer.flags = kI2C_TransferDefaultFlag;
// Sends out.
FLEXIO_I2C_MasterTransferNonBlocking(&i2cDev, &g_m_handle, &
masterXfer);
// Wait for sending is complete.
while (!completionFlag)
{
}
// ...
}

Files
• file fsl_flexio_i2c_master.h

Data Structures
• struct FLEXIO_I2C_Type
Define FlexIO I2C master access structure typedef. More...

• struct flexio_i2c_master_config_t
Define FlexIO I2C master user configuration structure. More...

• struct flexio_i2c_master_transfer_t
Define FlexIO I2C master transfer structure. More...

• struct flexio_i2c_master_handle_t
Define FlexIO I2C master handle structure. More...

Typedefs
• typedef void(∗ flexio_i2c_master_transfer_callback_t )(FLEXIO_I2C_Type ∗base, flexio_i2c_master_handle_t ∗handle, status_t status, void ∗userData)
FlexIO I2C master transfer callback typedef.

Enumerations
• enum _flexio_i2c_status {
kStatus_FLEXIO_I2C_Busy = MAKE_STATUS(kStatusGroup_FLEXIO_I2C, 0),
kStatus_FLEXIO_I2C_Idle = MAKE_STATUS(kStatusGroup_FLEXIO_I2C, 1),
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kStatus_FLEXIO_I2C_Nak = MAKE_STATUS(kStatusGroup_FLEXIO_I2C, 2) }
FlexIO I2C transfer status.

• enum _flexio_i2c_master_interrupt {
kFLEXIO_I2C_TxEmptyInterruptEnable = 0x1U,
kFLEXIO_I2C_RxFullInterruptEnable = 0x2U }
Define FlexIO I2C master interrupt mask.

• enum _flexio_i2c_master_status_flags {
kFLEXIO_I2C_TxEmptyFlag = 0x1U,
kFLEXIO_I2C_RxFullFlag = 0x2U,
kFLEXIO_I2C_ReceiveNakFlag = 0x4U }
Define FlexIO I2C master status mask.

• enum flexio_i2c_direction_t {
kFLEXIO_I2C_Write = 0x0U,
kFLEXIO_I2C_Read = 0x1U }
Direction of master transfer.

Driver version
• #define FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
FlexIO I2C master driver version 2.1.0.

Initialization and deinitialization
• void FLEXIO_I2C_MasterInit (FLEXIO_I2C_Type ∗base, flexio_i2c_master_config_t ∗masterConfig, uint32_t srcClock_Hz)
Ungates the FlexIO clock, resets the FlexIO module, and configures the FlexIO I2C hardware configuration.

• void FLEXIO_I2C_MasterDeinit (FLEXIO_I2C_Type ∗base)
De-initializes the FlexIO I2C master peripheral.

• void FLEXIO_I2C_MasterGetDefaultConfig (flexio_i2c_master_config_t ∗masterConfig)
Gets the default configuration to configure the FlexIO module.

• static void FLEXIO_I2C_MasterEnable (FLEXIO_I2C_Type ∗base, bool enable)
Enables/disables the FlexIO module operation.

Status
• uint32_t FLEXIO_I2C_MasterGetStatusFlags (FLEXIO_I2C_Type ∗base)
Gets the FlexIO I2C master status flags.

• void FLEXIO_I2C_MasterClearStatusFlags (FLEXIO_I2C_Type ∗base, uint32_t mask)
Clears the FlexIO I2C master status flags.

Interrupts
• void FLEXIO_I2C_MasterEnableInterrupts (FLEXIO_I2C_Type ∗base, uint32_t mask)
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Enables the FlexIO i2c master interrupt requests.

• void FLEXIO_I2C_MasterDisableInterrupts (FLEXIO_I2C_Type ∗base, uint32_t mask)
Disables the FlexIO I2C master interrupt requests.

Bus Operations
• void FLEXIO_I2C_MasterSetBaudRate (FLEXIO_I2C_Type ∗base, uint32_t baudRate_Bps,
uint32_t srcClock_Hz)
Sets the FlexIO I2C master transfer baudrate.

• void FLEXIO_I2C_MasterStart (FLEXIO_I2C_Type ∗base, uint8_t address, flexio_i2c_direction_t
direction)
Sends START + 7-bit address to the bus.

• void FLEXIO_I2C_MasterStop (FLEXIO_I2C_Type ∗base)
Sends the stop signal on the bus.

• void FLEXIO_I2C_MasterRepeatedStart (FLEXIO_I2C_Type ∗base)
Sends the repeated start signal on the bus.

• void FLEXIO_I2C_MasterAbortStop (FLEXIO_I2C_Type ∗base)
Sends the stop signal when transfer is still on-going.

• void FLEXIO_I2C_MasterEnableAck (FLEXIO_I2C_Type ∗base, bool enable)
Configures the sent ACK/NAK for the following byte.

• status_t FLEXIO_I2C_MasterSetTransferCount (FLEXIO_I2C_Type ∗base, uint8_t count)
Sets the number of bytes to be transferred from a start signal to a stop signal.

• static void FLEXIO_I2C_MasterWriteByte (FLEXIO_I2C_Type ∗base, uint32_t data)
Writes one byte of data to the I2C bus.

• static uint8_t FLEXIO_I2C_MasterReadByte (FLEXIO_I2C_Type ∗base)
Reads one byte of data from the I2C bus.

• status_t FLEXIO_I2C_MasterWriteBlocking (FLEXIO_I2C_Type ∗base, const uint8_t ∗txBuff,
uint8_t txSize)
Sends a buffer of data in bytes.

• void FLEXIO_I2C_MasterReadBlocking (FLEXIO_I2C_Type ∗base, uint8_t ∗rxBuff, uint8_t rxSize)
Receives a buffer of bytes.

• status_t FLEXIO_I2C_MasterTransferBlocking (FLEXIO_I2C_Type ∗base, flexio_i2c_master_handle_t ∗handle, flexio_i2c_master_transfer_t ∗xfer)
Performs a master polling transfer on the I2C bus.

Transactional
• status_t FLEXIO_I2C_MasterTransferCreateHandle (FLEXIO_I2C_Type ∗base, flexio_i2c_master_handle_t ∗handle, flexio_i2c_master_transfer_callback_t callback, void ∗userData)
Initializes the I2C handle which is used in transactional functions.

• status_t FLEXIO_I2C_MasterTransferNonBlocking (FLEXIO_I2C_Type ∗base, flexio_i2c_master_handle_t ∗handle, flexio_i2c_master_transfer_t ∗xfer)
Performs a master interrupt non-blocking transfer on the I2C bus.

• status_t FLEXIO_I2C_MasterTransferGetCount (FLEXIO_I2C_Type ∗base, flexio_i2c_master_handle_t ∗handle, size_t ∗count)
Gets the master transfer status during a interrupt non-blocking transfer.

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• void FLEXIO_I2C_MasterTransferAbort (FLEXIO_I2C_Type ∗base, flexio_i2c_master_handle_t
∗handle)
Aborts an interrupt non-blocking transfer early.

• void FLEXIO_I2C_MasterTransferHandleIRQ (void ∗i2cType, void ∗i2cHandle)
Master interrupt handler.

22.4.4
22.4.4.1

Data Structure Documentation
struct FLEXIO_I2C_Type

Data Fields

• FLEXIO_Type ∗ flexioBase
FlexIO base pointer.

• uint8_t SDAPinIndex
Pin select for I2C SDA.

• uint8_t SCLPinIndex
Pin select for I2C SCL.

• uint8_t shifterIndex [2]
Shifter index used in FlexIO I2C.

• uint8_t timerIndex [2]
Timer index used in FlexIO I2C.
22.4.4.1.0.1

Field Documentation

22.4.4.1.0.1.1

FLEXIO_Type∗ FLEXIO_I2C_Type::flexioBase

22.4.4.1.0.1.2

uint8_t FLEXIO_I2C_Type::SDAPinIndex

22.4.4.1.0.1.3

uint8_t FLEXIO_I2C_Type::SCLPinIndex

22.4.4.1.0.1.4

uint8_t FLEXIO_I2C_Type::shifterIndex[2]

22.4.4.1.0.1.5

uint8_t FLEXIO_I2C_Type::timerIndex[2]

22.4.4.2

struct flexio_i2c_master_config_t

Data Fields

• bool enableMaster
Enables the FLEXIO I2C peripheral at initialization time.

• bool enableInDoze
Enable/disable FlexIO operation in doze mode.

• bool enableInDebug
Enable/disable FlexIO operation in debug mode.

• bool enableFastAccess
Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice
the frequency of the bus clock.

• uint32_t baudRate_Bps
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Baud rate in Bps.
22.4.4.2.0.2

Field Documentation

22.4.4.2.0.2.1

bool flexio_i2c_master_config_t::enableMaster

22.4.4.2.0.2.2

bool flexio_i2c_master_config_t::enableInDoze

22.4.4.2.0.2.3

bool flexio_i2c_master_config_t::enableInDebug

22.4.4.2.0.2.4

bool flexio_i2c_master_config_t::enableFastAccess

22.4.4.2.0.2.5

uint32_t flexio_i2c_master_config_t::baudRate_Bps

22.4.4.3

struct flexio_i2c_master_transfer_t

Data Fields

• uint32_t flags
Transfer flag which controls the transfer, reserved for flexio i2c.

• uint8_t slaveAddress
7-bit slave address.

• flexio_i2c_direction_t direction
Transfer direction, read or write.

• uint32_t subaddress
Sub address.

• uint8_t subaddressSize
Size of command buffer.

• uint8_t volatile ∗ data
Transfer buffer.

• volatile size_t dataSize
Transfer size.
22.4.4.3.0.3

Field Documentation

22.4.4.3.0.3.1

uint32_t flexio_i2c_master_transfer_t::flags

22.4.4.3.0.3.2

uint8_t flexio_i2c_master_transfer_t::slaveAddress

22.4.4.3.0.3.3 flexio_i2c_direction_t flexio_i2c_master_transfer_t::direction
22.4.4.3.0.3.4

uint32_t flexio_i2c_master_transfer_t::subaddress

Transferred MSB first.

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22.4.4.3.0.3.5

uint8_t flexio_i2c_master_transfer_t::subaddressSize

22.4.4.3.0.3.6

uint8_t volatile∗ flexio_i2c_master_transfer_t::data

22.4.4.3.0.3.7

volatile size_t flexio_i2c_master_transfer_t::dataSize

22.4.4.4

struct _flexio_i2c_master_handle

FlexIO I2C master handle typedef.
Data Fields

• flexio_i2c_master_transfer_t transfer
FlexIO I2C master transfer copy.

• size_t transferSize
Total bytes to be transferred.

• uint8_t state
Transfer state maintained during transfer.

• flexio_i2c_master_transfer_callback_t completionCallback
Callback function called at transfer event.

• void ∗ userData
Callback parameter passed to callback function.
22.4.4.4.0.4

Field Documentation

22.4.4.4.0.4.1 flexio_i2c_master_transfer_t flexio_i2c_master_handle_t::transfer
22.4.4.4.0.4.2

size_t flexio_i2c_master_handle_t::transferSize

22.4.4.4.0.4.3

uint8_t flexio_i2c_master_handle_t::state

22.4.4.4.0.4.4 flexio_i2c_master_transfer_callback_t flexio_i2c_master_handle_t::completionCallback

Callback function called at transfer event.

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22.4.4.4.0.4.5

22.4.5

Macro Definition Documentation
#define FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION (MAKE_VERSION(2, 1,
0))

22.4.5.1

22.4.6

Typedef Documentation
typedef void(∗ flexio_i2c_master_transfer_callback_t)(FLEXIO_I2C_Type ∗base,
flexio_i2c_master_handle_t ∗handle, status_t status, void ∗userData)

22.4.6.1

22.4.7

void∗ flexio_i2c_master_handle_t::userData

Enumeration Type Documentation

22.4.7.1

enum _flexio_i2c_status

Enumerator
kStatus_FLEXIO_I2C_Busy I2C is busy doing transfer.
kStatus_FLEXIO_I2C_Idle I2C is busy doing transfer.
kStatus_FLEXIO_I2C_Nak NAK received during transfer.

22.4.7.2

enum _flexio_i2c_master_interrupt

Enumerator
kFLEXIO_I2C_TxEmptyInterruptEnable Tx buffer empty interrupt enable.
kFLEXIO_I2C_RxFullInterruptEnable Rx buffer full interrupt enable.

22.4.7.3

enum _flexio_i2c_master_status_flags

Enumerator
kFLEXIO_I2C_TxEmptyFlag Tx shifter empty flag.
kFLEXIO_I2C_RxFullFlag Rx shifter full/Transfer complete flag.
kFLEXIO_I2C_ReceiveNakFlag Receive NAK flag.

22.4.7.4

enum flexio_i2c_direction_t

Enumerator
kFLEXIO_I2C_Write Master send to slave.
kFLEXIO_I2C_Read Master receive from slave.
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22.4.8

Function Documentation

22.4.8.1

void FLEXIO_I2C_MasterInit ( FLEXIO_I2C_Type ∗ base,
flexio_i2c_master_config_t ∗ masterConfig, uint32_t srcClock_Hz )

Example
FLEXIO_I2C_Type base = {
.flexioBase = FLEXIO,
.SDAPinIndex = 0,
.SCLPinIndex = 1,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_i2c_master_config_t config = {
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 100000
};
FLEXIO_I2C_MasterInit(base, &config, srcClock_Hz);

Parameters
base

pointer to FLEXIO_I2C_Type structure.

masterConfig

pointer to flexio_i2c_master_config_t structure.

srcClock_Hz

FlexIO source clock in Hz.

22.4.8.2

void FLEXIO_I2C_MasterDeinit ( FLEXIO_I2C_Type ∗ base )

Calling this API gates the FlexIO clock, so the FlexIO I2C master module can’t work unless call FLEXIO_I2C_MasterInit.
Parameters
base

22.4.8.3

pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterGetDefaultConfig ( flexio_i2c_master_config_t ∗
masterConfig )

The configuration can be used directly for calling FLEXIO_I2C_MasterInit().
Example:
flexio_i2c_master_config_t config;
FLEXIO_I2C_MasterGetDefaultConfig(&config);

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Parameters
masterConfig

pointer to flexio_i2c_master_config_t structure.

static void FLEXIO_I2C_MasterEnable ( FLEXIO_I2C_Type ∗ base, bool enable
) [inline], [static]

22.4.8.4

Parameters
base
enable

22.4.8.5

pointer to FLEXIO_I2C_Type structure.
pass true to enable module, false to disable module.

uint32_t FLEXIO_I2C_MasterGetStatusFlags ( FLEXIO_I2C_Type ∗ base )

Parameters
base

pointer to FLEXIO_I2C_Type structure

Returns
status flag, use status flag to AND _flexio_i2c_master_status_flags could get the related status.

22.4.8.6

void FLEXIO_I2C_MasterClearStatusFlags ( FLEXIO_I2C_Type ∗ base, uint32_t
mask )

Parameters

22.4.8.7

base

pointer to FLEXIO_I2C_Type structure.

mask

status flag. The parameter could be any combination of the following values:
• kFLEXIO_I2C_RxFullFlag
• kFLEXIO_I2C_ReceiveNakFlag

void FLEXIO_I2C_MasterEnableInterrupts ( FLEXIO_I2C_Type ∗ base, uint32_t
mask )

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Parameters

22.4.8.8

base

pointer to FLEXIO_I2C_Type structure.

mask

interrupt source. Currently only one interrupt request source:
• kFLEXIO_I2C_TransferCompleteInterruptEnable

void FLEXIO_I2C_MasterDisableInterrupts ( FLEXIO_I2C_Type ∗ base, uint32_t
mask )

Parameters

22.4.8.9

base

pointer to FLEXIO_I2C_Type structure.

mask

interrupt source.

void FLEXIO_I2C_MasterSetBaudRate ( FLEXIO_I2C_Type ∗ base, uint32_t
baudRate_Bps, uint32_t srcClock_Hz )

Parameters
base
baudRate_Bps
srcClock_Hz

22.4.8.10

pointer to FLEXIO_I2C_Type structure
the baud rate value in HZ
source clock in HZ

void FLEXIO_I2C_MasterStart ( FLEXIO_I2C_Type ∗ base, uint8_t address,
flexio_i2c_direction_t direction )

Note
This is API should be called when transfer configuration is ready to send a START signal and 7-bit
address to the bus. This is a non-blocking API, which returns directly after the address is put into the
data register but not address transfer finished on the bus. Ensure that the kFLEXIO_I2C_RxFullFlag
status is asserted before calling this API.

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FlexIO I2C Master Driver
Parameters
base
address
direction

pointer to FLEXIO_I2C_Type structure.
7-bit address.
transfer direction. This parameter is one of the values in flexio_i2c_direction_t:
• kFLEXIO_I2C_Write: Transmit
• kFLEXIO_I2C_Read: Receive

void FLEXIO_I2C_MasterStop ( FLEXIO_I2C_Type ∗ base )

22.4.8.11

Parameters
base

pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterRepeatedStart ( FLEXIO_I2C_Type ∗ base )

22.4.8.12

Parameters
base

pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterAbortStop ( FLEXIO_I2C_Type ∗ base )

22.4.8.13

Parameters
base

pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterEnableAck ( FLEXIO_I2C_Type ∗ base, bool enable )

22.4.8.14

Parameters
base
enable

22.4.8.15

pointer to FLEXIO_I2C_Type structure.
true to configure send ACK, false configure to send NAK.

status_t FLEXIO_I2C_MasterSetTransferCount ( FLEXIO_I2C_Type ∗ base,
uint8_t count )

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FlexIO I2C Master Driver
Note
Call this API before a transfer begins because the timer generates a number of clocks according to
the number of bytes that need to be transferred.
Parameters
base
count

pointer to FLEXIO_I2C_Type structure.
number of bytes need to be transferred from a start signal to a re-start/stop signal

Return values
kStatus_Success
kStatus_InvalidArgument

22.4.8.16

Successfully configured the count.
Input argument is invalid.

static void FLEXIO_I2C_MasterWriteByte ( FLEXIO_I2C_Type ∗ base, uint32_t
data ) [inline], [static]

Note
This is a non-blocking API, which returns directly after the data is put into the data register but not
data transfer finished on the bus. Ensure that the TxEmptyFlag is asserted before calling this API.
Parameters

22.4.8.17

base

pointer to FLEXIO_I2C_Type structure.

data

a byte of data.

static uint8_t FLEXIO_I2C_MasterReadByte ( FLEXIO_I2C_Type ∗ base )
[inline], [static]

Note
This is a non-blocking API, which returns directly after the data is read from the data register. Ensure
that the data is ready in the register.
Parameters

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FlexIO I2C Master Driver
base

pointer to FLEXIO_I2C_Type structure.

Returns
data byte read.

status_t FLEXIO_I2C_MasterWriteBlocking ( FLEXIO_I2C_Type ∗ base, const
uint8_t ∗ txBuff, uint8_t txSize )

22.4.8.18

Note
This function blocks via polling until all bytes have been sent.
Parameters
base

pointer to FLEXIO_I2C_Type structure.

txBuff

The data bytes to send.

txSize

The number of data bytes to send.

Return values
kStatus_Success
kStatus_FLEXIO_I2C_Nak

Successfully write data.
Receive NAK during writing data.

void FLEXIO_I2C_MasterReadBlocking ( FLEXIO_I2C_Type ∗ base, uint8_t ∗
rxBuff, uint8_t rxSize )

22.4.8.19

Note
This function blocks via polling until all bytes have been received.
Parameters
base

pointer to FLEXIO_I2C_Type structure.

rxBuff

The buffer to store the received bytes.

rxSize

The number of data bytes to be received.

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FlexIO I2C Master Driver
status_t FLEXIO_I2C_MasterTransferBlocking ( FLEXIO_I2C_Type ∗ base,
flexio_i2c_master_handle_t ∗ handle, flexio_i2c_master_transfer_t ∗ xfer )

22.4.8.20

Note
The API does not return until the transfer succeeds or fails due to receiving NAK.
Parameters
base
handle
xfer

pointer to FLEXIO_I2C_Type structure.
pointer to flexio_i2c_master_handle_t structure which stores the transfer state.
pointer to flexio_i2c_master_transfer_t structure.

Returns
status of status_t.

status_t FLEXIO_I2C_MasterTransferCreateHandle ( FLEXIO_I2C_Type ∗ base,
flexio_i2c_master_handle_t ∗ handle, flexio_i2c_master_transfer_callback_t
callback, void ∗ userData )

22.4.8.21

Parameters
base
handle
callback
userData

pointer to FLEXIO_I2C_Type structure.
pointer to flexio_i2c_master_handle_t structure to store the transfer state.
pointer to user callback function.
user param passed to the callback function.

Return values
kStatus_Success
kStatus_OutOfRange

22.4.8.22

Successfully create the handle.
The FlexIO type/handle/isr table out of range.

status_t FLEXIO_I2C_MasterTransferNonBlocking ( FLEXIO_I2C_Type ∗ base,
flexio_i2c_master_handle_t ∗ handle, flexio_i2c_master_transfer_t ∗ xfer )

Note
The API returns immediately after the transfer initiates. Call FLEXIO_I2C_MasterGetTransferCount to poll the transfer status to check whether the transfer is finished. If the return status is not
kStatus_FLEXIO_I2C_Busy, the transfer is finished.

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FlexIO I2C Master Driver
Parameters
base
handle
xfer

pointer to FLEXIO_I2C_Type structure
pointer to flexio_i2c_master_handle_t structure which stores the transfer state
pointer to flexio_i2c_master_transfer_t structure

Return values
kStatus_Success
kStatus_FLEXIO_I2C_Busy

Successfully start a transfer.
FLEXIO I2C is not idle, is running another transfer.

status_t FLEXIO_I2C_MasterTransferGetCount ( FLEXIO_I2C_Type ∗ base,
flexio_i2c_master_handle_t ∗ handle, size_t ∗ count )

22.4.8.23

Parameters
base
handle
count

pointer to FLEXIO_I2C_Type structure.
pointer to flexio_i2c_master_handle_t structure which stores the transfer state.
Number of bytes transferred so far by the non-blocking transaction.

Return values
kStatus_InvalidArgument
kStatus_Success

22.4.8.24

count is Invalid.
Successfully return the count.

void FLEXIO_I2C_MasterTransferAbort ( FLEXIO_I2C_Type ∗ base,
flexio_i2c_master_handle_t ∗ handle )

Note
This API can be called at any time when an interrupt non-blocking transfer initiates to abort the
transfer early.
Parameters

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base
handle

22.4.8.25

pointer to FLEXIO_I2C_Type structure
pointer to flexio_i2c_master_handle_t structure which stores the transfer state

void FLEXIO_I2C_MasterTransferHandleIRQ ( void ∗ i2cType, void ∗ i2cHandle
)

Parameters
i2cType
i2cHandle

pointer to FLEXIO_I2C_Type structure
pointer to flexio_i2c_master_transfer_t structure

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FlexIO I2S Driver

22.5

FlexIO I2S Driver

22.5.1

Overview

The KSDK provides a peripheral driver for I2S function using Flexible I/O module of Kinetis devices.

22.5.2

Overview

The FlexIO I2S driver includes functional APIs and transactional APIs.
Functional APIs are feature/property target low level APIs. Functional APIs can be used for FlexIO I2S
initialization/configuration/operation for optimization/customization purpose. Using the functional API
requires the knowledge of the FlexIO I2S peripheral and how to organize functional APIs to meet the
application requirements. All functional API use the peripheral base address as the first parameter. FlexIO
I2S functional operation groups provide the functional APIs set.
Transactional APIs are transaction target high level APIs. The transactional APIs can be used to enable
the peripheral and also in the application if the code size and performance of transactional APIs can
satisfy requirements. If the code size and performance are critical requirements, see the transactional
API implementation and write custom code. All transactional APIs use the the sai_handle_t as the first
parameter. Initialize the handle by calling the FlexIO_I2S_TransferTxCreateHandle() or FlexIO_I2S_TransferRxCreateHandle() API.
Transactional APIs support asynchronous transfer. This means that the functions FLEXIO_I2S_TransferSendNonBlocking() and FLEXIO_I2S_TransferReceiveNonBlocking() set up an interrupt for data transfer. When the transfer completes, the upper layer is notified through a callback function with the kStatus_FLEXIO_I2S_TxIdle and kStatus_FLEXIO_I2S_RxIdle status.

22.5.3
22.5.3.1

Typical use case
FlexIO I2S send/receive using an interrupt method

sai_handle_t g_saiTxHandle;
sai_config_t user_config;
sai_transfer_t sendXfer;
volatile bool txFinished;
volatile bool rxFinished;
const uint8_t sendData[] = [......];
void FLEXIO_I2S_UserCallback(sai_handle_t *handle, status_t status, void *userData)
{
userData = userData;
if (kStatus_FLEXIO_I2S_TxIdle == status)
{
txFinished = true;
}
}
void main(void)
{
//...

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FlexIO I2S Driver

FLEXIO_I2S_TxGetDefaultConfig(&user_config);
FLEXIO_I2S_TxInit(FLEXIO I2S0, &user_config);
FLEXIO_I2S_TransferTxCreateHandle(FLEXIO I2S0, &g_saiHandle,
FLEXIO_I2S_UserCallback, NULL);
//Configures the SAI format.
FLEXIO_I2S_TransferTxSetTransferFormat(FLEXIO I2S0, &g_saiHandle, mclkSource, mclk);
// Prepares to send.
sendXfer.data = sendData
sendXfer.dataSize = sizeof(sendData)/sizeof(sendData[0]);
txFinished = false;
// Sends out.
FLEXIO_I2S_TransferSendNonBlocking(FLEXIO I2S0, &g_saiHandle, &
sendXfer);
// Waiting to send is finished.
while (!txFinished)
{
}
// ...
}

22.5.3.2

FLEXIO_I2S send/receive using a DMA method

sai_handle_t g_saiHandle;
dma_handle_t g_saiTxDmaHandle;
dma_handle_t g_saiRxDmaHandle;
sai_config_t user_config;
sai_transfer_t sendXfer;
volatile bool txFinished;
uint8_t sendData[] = ...;
void FLEXIO_I2S_UserCallback(sai_handle_t *handle, status_t status, void *userData)
{
userData = userData;
if (kStatus_FLEXIO_I2S_TxIdle == status)
{
txFinished = true;
}
}
void main(void)
{
//...
FLEXIO_I2S_TxGetDefaultConfig(&user_config);
FLEXIO_I2S_TxInit(FLEXIO I2S0, &user_config);
// Sets up the DMA.
DMAMUX_Init(DMAMUX0);
DMAMUX_SetSource(DMAMUX0, FLEXIO_I2S_TX_DMA_CHANNEL, FLEXIO_I2S_TX_DMA_REQUEST);
DMAMUX_EnableChannel(DMAMUX0, FLEXIO_I2S_TX_DMA_CHANNEL);
DMA_Init(DMA0);
/* Creates the DMA handle.
DMA_TransferTxCreateHandle(&g_saiTxDmaHandle, DMA0, FLEXIO_I2S_TX_DMA_CHANNEL);
FLEXIO_I2S_TransferTxCreateHandleDMA(FLEXIO I2S0, &g_saiTxDmaHandle, FLEXIO_I2S_UserCallback, NULL);

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FlexIO I2S Driver

// Prepares to send.
sendXfer.data = sendData
sendXfer.dataSize = sizeof(sendData)/sizeof(sendData[0]);
txFinished = false;
// Sends out.
FLEXIO_I2S_TransferSendDMA(&g_saiHandle, &sendXfer);
// Waiting to send is finished.
while (!txFinished)
{
}
// ...
}

Modules
• FlexIO DMA I2S Driver
• FlexIO eDMA I2S Driver

Files
• file fsl_flexio_i2s.h

Data Structures
• struct FLEXIO_I2S_Type
Define FlexIO I2S access structure typedef. More...

• struct flexio_i2s_config_t
FlexIO I2S configure structure. More...

• struct flexio_i2s_format_t
FlexIO I2S audio format, FlexIO I2S only support the same format in Tx and Rx. More...

• struct flexio_i2s_transfer_t
Define FlexIO I2S transfer structure. More...

• struct flexio_i2s_handle_t
Define FlexIO I2S handle structure. More...

Macros
• #define FLEXIO_I2S_XFER_QUEUE_SIZE (4)
FlexIO I2S transfer queue size, user can refine it according to use case.

Typedefs
• typedef void(∗ flexio_i2s_callback_t )(FLEXIO_I2S_Type ∗base, flexio_i2s_handle_t ∗handle,
status_t status, void ∗userData)
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FlexIO I2S xfer callback prototype.

Enumerations
• enum _flexio_i2s_status {
kStatus_FLEXIO_I2S_Idle = MAKE_STATUS(kStatusGroup_FLEXIO_I2S, 0),
kStatus_FLEXIO_I2S_TxBusy = MAKE_STATUS(kStatusGroup_FLEXIO_I2S, 1),
kStatus_FLEXIO_I2S_RxBusy = MAKE_STATUS(kStatusGroup_FLEXIO_I2S, 2),
kStatus_FLEXIO_I2S_Error = MAKE_STATUS(kStatusGroup_FLEXIO_I2S, 3),
kStatus_FLEXIO_I2S_QueueFull = MAKE_STATUS(kStatusGroup_FLEXIO_I2S, 4) }
FlexIO I2S transfer status.

• enum flexio_i2s_master_slave_t {
kFLEXIO_I2S_Master = 0x0U,
kFLEXIO_I2S_Slave = 0x1U }
Master or slave mode.

• enum _flexio_i2s_interrupt_enable {
kFLEXIO_I2S_TxDataRegEmptyInterruptEnable = 0x1U,
kFLEXIO_I2S_RxDataRegFullInterruptEnable = 0x2U }
Define FlexIO FlexIO I2S interrupt mask.

• enum _flexio_i2s_status_flags {
kFLEXIO_I2S_TxDataRegEmptyFlag = 0x1U,
kFLEXIO_I2S_RxDataRegFullFlag = 0x2U }
Define FlexIO FlexIO I2S status mask.

• enum flexio_i2s_sample_rate_t {
kFLEXIO_I2S_SampleRate8KHz = 8000U,
kFLEXIO_I2S_SampleRate11025Hz = 11025U,
kFLEXIO_I2S_SampleRate12KHz = 12000U,
kFLEXIO_I2S_SampleRate16KHz = 16000U,
kFLEXIO_I2S_SampleRate22050Hz = 22050U,
kFLEXIO_I2S_SampleRate24KHz = 24000U,
kFLEXIO_I2S_SampleRate32KHz = 32000U,
kFLEXIO_I2S_SampleRate44100Hz = 44100U,
kFLEXIO_I2S_SampleRate48KHz = 48000U,
kFLEXIO_I2S_SampleRate96KHz = 96000U }
Audio sample rate.

• enum flexio_i2s_word_width_t {
kFLEXIO_I2S_WordWidth8bits = 8U,
kFLEXIO_I2S_WordWidth16bits = 16U,
kFLEXIO_I2S_WordWidth24bits = 24U,
kFLEXIO_I2S_WordWidth32bits = 32U }
Audio word width.

Driver version
• #define FSL_FLEXIO_I2S_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
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FlexIO I2S Driver
FlexIO I2S driver version 2.1.0.

Initialization and deinitialization
• void FLEXIO_I2S_Init (FLEXIO_I2S_Type ∗base, const flexio_i2s_config_t ∗config)
Initializes the FlexIO I2S.

• void FLEXIO_I2S_GetDefaultConfig (flexio_i2s_config_t ∗config)
Sets the FlexIO I2S configuration structure to default values.

• void FLEXIO_I2S_Deinit (FLEXIO_I2S_Type ∗base)
De-initializes the FlexIO I2S.

• static void FLEXIO_I2S_Enable (FLEXIO_I2S_Type ∗base, bool enable)
Enables/disables the FlexIO I2S module operation.

Status
• uint32_t FLEXIO_I2S_GetStatusFlags (FLEXIO_I2S_Type ∗base)
Gets the FlexIO I2S status flags.

Interrupts
• void FLEXIO_I2S_EnableInterrupts (FLEXIO_I2S_Type ∗base, uint32_t mask)
Enables the FlexIO I2S interrupt.

• void FLEXIO_I2S_DisableInterrupts (FLEXIO_I2S_Type ∗base, uint32_t mask)
Disables the FlexIO I2S interrupt.

DMA Control
• static void FLEXIO_I2S_TxEnableDMA (FLEXIO_I2S_Type ∗base, bool enable)
Enables/disables the FlexIO I2S Tx DMA requests.

• static void FLEXIO_I2S_RxEnableDMA (FLEXIO_I2S_Type ∗base, bool enable)
Enables/disables the FlexIO I2S Rx DMA requests.

• static uint32_t FLEXIO_I2S_TxGetDataRegisterAddress (FLEXIO_I2S_Type ∗base)
Gets the FlexIO I2S send data register address.

• static uint32_t FLEXIO_I2S_RxGetDataRegisterAddress (FLEXIO_I2S_Type ∗base)
Gets the FlexIO I2S receive data register address.

Bus Operations
• void FLEXIO_I2S_MasterSetFormat (FLEXIO_I2S_Type ∗base, flexio_i2s_format_t ∗format,
uint32_t srcClock_Hz)
Configures the FlexIO I2S audio format in master mode.

• void FLEXIO_I2S_SlaveSetFormat (FLEXIO_I2S_Type ∗base, flexio_i2s_format_t ∗format)
Configures the FlexIO I2S audio format in slave mode.

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FlexIO I2S Driver
• void FLEXIO_I2S_WriteBlocking (FLEXIO_I2S_Type ∗base, uint8_t bitWidth, uint8_t ∗txData,
size_t size)
Sends a piece of data using a blocking method.

• static void FLEXIO_I2S_WriteData (FLEXIO_I2S_Type ∗base, uint8_t bitWidth, uint32_t data)
Writes a data into data register.

• void FLEXIO_I2S_ReadBlocking (FLEXIO_I2S_Type ∗base, uint8_t bitWidth, uint8_t ∗rxData,
size_t size)
Receives a piece of data using a blocking method.

• static uint32_t FLEXIO_I2S_ReadData (FLEXIO_I2S_Type ∗base)
Reads a data from the data register.

Transactional
• void FLEXIO_I2S_TransferTxCreateHandle (FLEXIO_I2S_Type ∗base, flexio_i2s_handle_t
∗handle, flexio_i2s_callback_t callback, void ∗userData)
Initializes the FlexIO I2S handle.

• void FLEXIO_I2S_TransferSetFormat (FLEXIO_I2S_Type ∗base, flexio_i2s_handle_t ∗handle,
flexio_i2s_format_t ∗format, uint32_t srcClock_Hz)
Configures the FlexIO I2S audio format.

• void FLEXIO_I2S_TransferRxCreateHandle (FLEXIO_I2S_Type ∗base, flexio_i2s_handle_t
∗handle, flexio_i2s_callback_t callback, void ∗userData)
Initializes the FlexIO I2S receive handle.

• status_t FLEXIO_I2S_TransferSendNonBlocking (FLEXIO_I2S_Type ∗base, flexio_i2s_handle_t
∗handle, flexio_i2s_transfer_t ∗xfer)
Performs an interrupt non-blocking send transfer on FlexIO I2S.

• status_t FLEXIO_I2S_TransferReceiveNonBlocking (FLEXIO_I2S_Type ∗base, flexio_i2s_handle_t ∗handle, flexio_i2s_transfer_t ∗xfer)
Performs an interrupt non-blocking receive transfer on FlexIO I2S.

• void FLEXIO_I2S_TransferAbortSend (FLEXIO_I2S_Type ∗base, flexio_i2s_handle_t ∗handle)
Aborts the current send.

• void FLEXIO_I2S_TransferAbortReceive (FLEXIO_I2S_Type ∗base, flexio_i2s_handle_t ∗handle)
Aborts the current receive.

• status_t FLEXIO_I2S_TransferGetSendCount (FLEXIO_I2S_Type ∗base, flexio_i2s_handle_t
∗handle, size_t ∗count)
Gets the remaining bytes to be sent.

• status_t FLEXIO_I2S_TransferGetReceiveCount (FLEXIO_I2S_Type ∗base, flexio_i2s_handle_t
∗handle, size_t ∗count)
Gets the remaining bytes to be received.

• void FLEXIO_I2S_TransferTxHandleIRQ (void ∗i2sBase, void ∗i2sHandle)
Tx interrupt handler.

• void FLEXIO_I2S_TransferRxHandleIRQ (void ∗i2sBase, void ∗i2sHandle)
Rx interrupt handler.

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FlexIO I2S Driver

22.5.4
22.5.4.1

Data Structure Documentation
struct FLEXIO_I2S_Type

Data Fields

• FLEXIO_Type ∗ flexioBase
FlexIO base pointer.

• uint8_t txPinIndex
Tx data pin index in FlexIO pins.

• uint8_t rxPinIndex
Rx data pin index.

• uint8_t bclkPinIndex
Bit clock pin index.

• uint8_t fsPinIndex
Frame sync pin index.

• uint8_t txShifterIndex
Tx data shifter index.

• uint8_t rxShifterIndex
Rx data shifter index.

• uint8_t bclkTimerIndex
Bit clock timer index.

• uint8_t fsTimerIndex
Frame sync timer index.

22.5.4.2

struct flexio_i2s_config_t

Data Fields

• bool enableI2S
Enable FlexIO I2S.

• flexio_i2s_master_slave_t masterSlave
Master or slave.

22.5.4.3

struct flexio_i2s_format_t

Data Fields

• uint8_t bitWidth
Bit width of audio data, always 8/16/24/32 bits.

• uint32_t sampleRate_Hz
Sample rate of the audio data.

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FlexIO I2S Driver
22.5.4.4

struct flexio_i2s_transfer_t

Data Fields

• uint8_t ∗ data
Data buffer start pointer.

• size_t dataSize
Bytes to be transferred.
22.5.4.4.0.5
22.5.4.4.0.5.1

22.5.4.5

Field Documentation
size_t flexio_i2s_transfer_t::dataSize

struct _flexio_i2s_handle

Data Fields

• uint32_t state
Internal state.

• flexio_i2s_callback_t callback
Callback function called at transfer event.

• void ∗ userData
Callback parameter passed to callback function.

• uint8_t bitWidth
Bit width for transfer, 8/16/24/32bits.

• flexio_i2s_transfer_t queue [FLEXIO_I2S_XFER_QUEUE_SIZE]
Transfer queue storing queued transfer.

• size_t transferSize [FLEXIO_I2S_XFER_QUEUE_SIZE]
Data bytes need to transfer.

• volatile uint8_t queueUser
Index for user to queue transfer.

• volatile uint8_t queueDriver
Index for driver to get the transfer data and size.

22.5.5

Macro Definition Documentation

22.5.5.1

#define FSL_FLEXIO_I2S_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

22.5.5.2

#define FLEXIO_I2S_XFER_QUEUE_SIZE (4)

22.5.6

Enumeration Type Documentation

22.5.6.1

enum _flexio_i2s_status

Enumerator
kStatus_FLEXIO_I2S_Idle FlexIO I2S is in idle state.
kStatus_FLEXIO_I2S_TxBusy FlexIO I2S Tx is busy.
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FlexIO I2S Driver
kStatus_FLEXIO_I2S_RxBusy FlexIO I2S Tx is busy.
kStatus_FLEXIO_I2S_Error FlexIO I2S error occurred.
kStatus_FLEXIO_I2S_QueueFull FlexIO I2S transfer queue is full.

22.5.6.2

enum flexio_i2s_master_slave_t

Enumerator
kFLEXIO_I2S_Master Master mode.
kFLEXIO_I2S_Slave Slave mode.

22.5.6.3

enum _flexio_i2s_interrupt_enable

Enumerator
kFLEXIO_I2S_TxDataRegEmptyInterruptEnable Transmit buffer empty interrupt enable.
kFLEXIO_I2S_RxDataRegFullInterruptEnable Receive buffer full interrupt enable.

22.5.6.4

enum _flexio_i2s_status_flags

Enumerator
kFLEXIO_I2S_TxDataRegEmptyFlag Transmit buffer empty flag.
kFLEXIO_I2S_RxDataRegFullFlag Receive buffer full flag.

22.5.6.5

enum flexio_i2s_sample_rate_t

Enumerator
kFLEXIO_I2S_SampleRate8KHz Sample rate 8000Hz.
kFLEXIO_I2S_SampleRate11025Hz Sample rate 11025Hz.
kFLEXIO_I2S_SampleRate12KHz Sample rate 12000Hz.
kFLEXIO_I2S_SampleRate16KHz Sample rate 16000Hz.
kFLEXIO_I2S_SampleRate22050Hz Sample rate 22050Hz.
kFLEXIO_I2S_SampleRate24KHz Sample rate 24000Hz.
kFLEXIO_I2S_SampleRate32KHz Sample rate 32000Hz.
kFLEXIO_I2S_SampleRate44100Hz Sample rate 44100Hz.
kFLEXIO_I2S_SampleRate48KHz Sample rate 48000Hz.
kFLEXIO_I2S_SampleRate96KHz Sample rate 96000Hz.

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FlexIO I2S Driver
enum flexio_i2s_word_width_t

22.5.6.6

Enumerator
kFLEXIO_I2S_WordWidth8bits Audio data width 8 bits.
kFLEXIO_I2S_WordWidth16bits Audio data width 16 bits.
kFLEXIO_I2S_WordWidth24bits Audio data width 24 bits.
kFLEXIO_I2S_WordWidth32bits Audio data width 32 bits.

22.5.7

Function Documentation
void FLEXIO_I2S_Init ( FLEXIO_I2S_Type ∗ base, const flexio_i2s_config_t ∗
config )

22.5.7.1

This API configures FlexIO pins and shifter to I2S and configure FlexIO I2S with configuration structure.
The configuration structure can be filled by the user, or be set with default values by FLEXIO_I2S_GetDefaultConfig().
Note
This API should be called at the beginning of the application to use the FlexIO I2S driver, or any
access to the FlexIO I2S module could cause hard fault because clock is not enabled.
Parameters
base
config

FlexIO I2S base pointer
FlexIO I2S configure structure.

void FLEXIO_I2S_GetDefaultConfig ( flexio_i2s_config_t ∗ config )

22.5.7.2

The purpose of this API is to get the configuration structure initialized for use in FLEXIO_I2S_Init(). User
may use the initialized structure unchanged in FLEXIO_I2S_Init(), or modify some fields of the structure
before calling FLEXIO_I2S_Init().
Parameters
config

22.5.7.3

pointer to master configuration structure

void FLEXIO_I2S_Deinit ( FLEXIO_I2S_Type ∗ base )

Calling this API gates the FlexIO i2s clock. After calling this API, call the FLEXO_I2S_Init to use the
FlexIO I2S module.
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FlexIO I2S Driver
Parameters
base

FlexIO I2S base pointer

static void FLEXIO_I2S_Enable ( FLEXIO_I2S_Type ∗ base, bool enable )
[inline], [static]

22.5.7.4

Parameters
base
enable

22.5.7.5

pointer to FLEXIO_I2S_Type
True to enable, false to disable.

uint32_t FLEXIO_I2S_GetStatusFlags ( FLEXIO_I2S_Type ∗ base )

Parameters
base

pointer to FLEXIO_I2S_Type structure

Returns
Status flag, which are ORed by the enumerators in the _flexio_i2s_status_flags.

22.5.7.6

void FLEXIO_I2S_EnableInterrupts ( FLEXIO_I2S_Type ∗ base, uint32_t mask )

This function enables the FlexIO UART interrupt.
Parameters

22.5.7.7

base

pointer to FLEXIO_I2S_Type structure

mask

interrupt source

void FLEXIO_I2S_DisableInterrupts ( FLEXIO_I2S_Type ∗ base, uint32_t mask
)

This function enables the FlexIO UART interrupt.

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FlexIO I2S Driver
Parameters
base

pointer to FLEXIO_I2S_Type structure

mask

interrupt source

static void FLEXIO_I2S_TxEnableDMA ( FLEXIO_I2S_Type ∗ base, bool enable
) [inline], [static]

22.5.7.8

Parameters
base
enable

FlexIO I2S base pointer
True means enable DMA, false means disable DMA.

static void FLEXIO_I2S_RxEnableDMA ( FLEXIO_I2S_Type ∗ base, bool enable
) [inline], [static]

22.5.7.9

Parameters
base
enable

22.5.7.10

FlexIO I2S base pointer
True means enable DMA, false means disable DMA.

static uint32_t FLEXIO_I2S_TxGetDataRegisterAddress ( FLEXIO_I2S_Type ∗
base ) [inline], [static]

This function returns the I2S data register address, mainly used by DMA/eDMA.
Parameters
base

pointer to FLEXIO_I2S_Type structure

Returns
FlexIO i2s send data register address.

22.5.7.11

static uint32_t FLEXIO_I2S_RxGetDataRegisterAddress ( FLEXIO_I2S_Type ∗
base ) [inline], [static]

This function returns the I2S data register address, mainly used by DMA/eDMA.

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FlexIO I2S Driver
Parameters
base

pointer to FLEXIO_I2S_Type structure

Returns
FlexIO i2s receive data register address.

void FLEXIO_I2S_MasterSetFormat ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_format_t ∗ format, uint32_t srcClock_Hz )

22.5.7.12

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and
audio data format to be transferred.
Parameters
base
format
srcClock_Hz

pointer to FLEXIO_I2S_Type structure
Pointer to FlexIO I2S audio data format structure.
I2S master clock source frequency in Hz.

void FLEXIO_I2S_SlaveSetFormat ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_format_t ∗ format )

22.5.7.13

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and
audio data format to be transferred.
Parameters
base
format

22.5.7.14

pointer to FLEXIO_I2S_Type structure
Pointer to FlexIO I2S audio data format structure.

void FLEXIO_I2S_WriteBlocking ( FLEXIO_I2S_Type ∗ base, uint8_t bitWidth,
uint8_t ∗ txData, size_t size )

Note
This function blocks via polling until data is ready to be sent.

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FlexIO I2S Driver
Parameters
base
bitWidth
txData
size

22.5.7.15

FlexIO I2S base pointer.
How many bits in a audio word, usually 8/16/24/32 bits.
Pointer to the data to be written.
Bytes to be written.

static void FLEXIO_I2S_WriteData ( FLEXIO_I2S_Type ∗ base, uint8_t
bitWidth, uint32_t data ) [inline], [static]

Parameters
base
bitWidth
data

22.5.7.16

FlexIO I2S base pointer.
How many bits in a audio word, usually 8/16/24/32 bits.
Data to be written.

void FLEXIO_I2S_ReadBlocking ( FLEXIO_I2S_Type ∗ base, uint8_t bitWidth,
uint8_t ∗ rxData, size_t size )

Note
This function blocks via polling until data is ready to be sent.
Parameters
base
bitWidth
rxData
size

22.5.7.17

FlexIO I2S base pointer
How many bits in a audio word, usually 8/16/24/32 bits.
Pointer to the data to be read.
Bytes to be read.

static uint32_t FLEXIO_I2S_ReadData ( FLEXIO_I2S_Type ∗ base )
[inline], [static]

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FlexIO I2S Driver
Parameters
base

FlexIO I2S base pointer

Returns
Data read from data register.

void FLEXIO_I2S_TransferTxCreateHandle ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_handle_t ∗ handle, flexio_i2s_callback_t callback, void ∗ userData )

22.5.7.18

This function initializes the FlexIO I2S handle which can be used for other FlexIO I2S transactional APIs.
Call this API once to get the initialized handle.
Parameters
base
handle
callback
userData

pointer to FLEXIO_I2S_Type structure
pointer to flexio_i2s_handle_t structure to store the transfer state.
FlexIO I2S callback function, which is called while finished a block.
User parameter for the FlexIO I2S callback.

void FLEXIO_I2S_TransferSetFormat ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_handle_t ∗ handle, flexio_i2s_format_t ∗ format, uint32_t
srcClock_Hz )

22.5.7.19

Audio format can be changed in run-time of FlexIO i2s. This function configures the sample rate and
audio data format to be transferred.
Parameters
base
handle

FlexIO I2S handle pointer.

format

Pointer to audio data format structure.

srcClock_Hz

22.5.7.20

pointer to FLEXIO_I2S_Type structure.

FlexIO I2S bit clock source frequency in Hz. This parameter should be 0 while in
slave mode.

void FLEXIO_I2S_TransferRxCreateHandle ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_handle_t ∗ handle, flexio_i2s_callback_t callback, void ∗ userData )

This function initializes the FlexIO I2S handle which can be used for other FlexIO I2S transactional APIs.
Usually, user only need to call this API once to get the initialized handle.
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FlexIO I2S Driver
Parameters
base
handle
callback
userData

pointer to FLEXIO_I2S_Type structure.
pointer to flexio_i2s_handle_t structure to store the transfer state.
FlexIO I2S callback function, which is called while finished a block.
User parameter for the FlexIO I2S callback.

status_t FLEXIO_I2S_TransferSendNonBlocking ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_handle_t ∗ handle, flexio_i2s_transfer_t ∗ xfer )

22.5.7.21

Note
Calling the API returns immediately after transfer initiates. Call FLEXIO_I2S_GetRemainingBytes
to poll the transfer status and check whether the transfer is finished. If the return status is 0, the
transfer is finished.
Parameters
base
handle
xfer

pointer to FLEXIO_I2S_Type structure.
pointer to flexio_i2s_handle_t structure which stores the transfer state
pointer to flexio_i2s_transfer_t structure

Return values
kStatus_Success
kStatus_FLEXIO_I2S_TxBusy
kStatus_InvalidArgument

22.5.7.22

Successfully start the data transmission.
Previous transmission still not finished, data not all written to TX register
yet.
The input parameter is invalid.

status_t FLEXIO_I2S_TransferReceiveNonBlocking ( FLEXIO_I2S_Type ∗
base, flexio_i2s_handle_t ∗ handle, flexio_i2s_transfer_t ∗ xfer )

Note
The API returns immediately after transfer initiates. Call FLEXIO_I2S_GetRemainingBytes to poll
the transfer status to check whether the transfer is finished. If the return status is 0, the transfer is
finished.

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FlexIO I2S Driver
Parameters
base
handle
xfer

pointer to FLEXIO_I2S_Type structure.
pointer to flexio_i2s_handle_t structure which stores the transfer state
pointer to flexio_i2s_transfer_t structure

Return values
kStatus_Success

Successfully start the data receive.

kStatus_FLEXIO_I2S_RxBusy

Previous receive still not finished.

kStatus_InvalidArgument

The input parameter is invalid.

void FLEXIO_I2S_TransferAbortSend ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_handle_t ∗ handle )

22.5.7.23

Note
This API can be called at any time when interrupt non-blocking transfer initiates to abort the transfer
in a early time.
Parameters
base
handle

22.5.7.24

pointer to FLEXIO_I2S_Type structure.
pointer to flexio_i2s_handle_t structure which stores the transfer state

void FLEXIO_I2S_TransferAbortReceive ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_handle_t ∗ handle )

Note
This API can be called at any time when interrupt non-blocking transfer initiates to abort the transfer
in a early time.
Parameters

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FlexIO I2S Driver
base
handle

pointer to FLEXIO_I2S_Type structure.
pointer to flexio_i2s_handle_t structure which stores the transfer state

status_t FLEXIO_I2S_TransferGetSendCount ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_handle_t ∗ handle, size_t ∗ count )

22.5.7.25

Parameters
base
handle
count

pointer to FLEXIO_I2S_Type structure.
pointer to flexio_i2s_handle_t structure which stores the transfer state
Bytes sent.

Return values
kStatus_Success
kStatus_NoTransferInProgress

Succeed get the transfer count.
There is not a non-blocking transaction currently in progress.

status_t FLEXIO_I2S_TransferGetReceiveCount ( FLEXIO_I2S_Type ∗ base,
flexio_i2s_handle_t ∗ handle, size_t ∗ count )

22.5.7.26

Parameters
base
handle

pointer to FLEXIO_I2S_Type structure.
pointer to flexio_i2s_handle_t structure which stores the transfer state

Returns
count Bytes received.
Return values
kStatus_Success
kStatus_NoTransferInProgress

22.5.7.27

Succeed get the transfer count.
There is not a non-blocking transaction currently in progress.

void FLEXIO_I2S_TransferTxHandleIRQ ( void ∗ i2sBase, void ∗ i2sHandle )

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FlexIO I2S Driver
Parameters
i2sBase

pointer to FLEXIO_I2S_Type structure.

i2sHandle

pointer to flexio_i2s_handle_t structure

22.5.7.28

void FLEXIO_I2S_TransferRxHandleIRQ ( void ∗ i2sBase, void ∗ i2sHandle )

Parameters
i2sBase

pointer to FLEXIO_I2S_Type structure.

i2sHandle

pointer to flexio_i2s_handle_t structure

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FlexIO SPI Driver

22.6

FlexIO SPI Driver

22.6.1

Overview

The KSDK provides a peripheral driver for an SPI function using the Flexible I/O module of Kinetis
devices.

22.6.2

Overview

FlexIO SPI driver includes functional APIs and transactional APIs.
Functional APIs are feature/property target low level APIs. Functional APIs can be used for FlexIO SPI
initialization/configuration/operation for optimization/customization purpose. Using the functional API
requires the knowledge of the FlexIO SPI peripheral and how to organize functional APIs to meet the
application requirements. All functional API use the FLEXIO_SPI_Type ∗base as the first parameter.
FlexIO SPI functional operation groups provide the functional API set.
Transactional APIs are transaction target high level APIs. Transactional APIs can be used to enable the
peripheral and also in the application if the code size and performance of transactional APIs can satisfy requirements. If the code size and performance are critical requirements, see the transactional API
implementation and write custom code. All transactional APIs use the flexio_spi_master_handle_t/flexio_spi_slave_handle_t as the second parameter. Initialize the handle by calling the FLEXIO_SPI_MasterTransferCreateHandle() or FLEXIO_SPI_SlaveTransferCreateHandle() API.
Transactional APIs support asynchronous transfer. This means that the functions FLEXIO_SPI_MasterTransferNonBlocking()/FLEXIO_SPI_SlaveTransferNonBlocking() set up an interrupt for data transfer.
When the transfer is complete, the upper layer is notified through a callback function with the kStatus_FLEXIO_SPI_Idle status. Please notice that FLEXIO SPI slave driver only support discontinuous PCS
access, this is a limitation. The FLEXIO SPI slave driver could support continuous PCS, but the slave
can’t adapt discontinuous and continuous PCS automatically. User could change the timer disable mode in
FLEXIO_SPI_SlaveInit manually, from kFLEXIO_TimerDisableOnTimerCompare to kFLEXIO_TimerDisableNever to enable discontinuous PCS access, only support CPHA = 0.

22.6.3
22.6.3.1

Typical use case
FlexIO SPI send/receive using an interrupt method

flexio_spi_master_handle_t g_spiHandle;
FLEXIO_SPI_Type spiDev;
volatile bool txFinished;
static uint8_t srcBuff[BUFFER_SIZE];
static uint8_t destBuff[BUFFER_SIZE];
void FLEXIO_SPI_MasterUserCallback(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle
, status_t status, void *userData)
{
userData = userData;
if (kStatus_FLEXIO_SPI_Idle == status)

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FlexIO SPI Driver
{
txFinished = true;
}
}
void main(void)
{
//...
flexio_spi_transfer_t xfer = {0};
flexio_spi_master_config_t userConfig;
FLEXIO_SPI_MasterGetDefaultConfig(&userConfig);
userConfig.baudRate_Bps = 500000U;
spiDev.flexioBase = BOARD_FLEXIO_BASE;
spiDev.SDOPinIndex = FLEXIO_SPI_MOSI_PIN;
spiDev.SDIPinIndex = FLEXIO_SPI_MISO_PIN;
spiDev.SCKPinIndex = FLEXIO_SPI_SCK_PIN;
spiDev.CSnPinIndex = FLEXIO_SPI_CSn_PIN;
spiDev.shifterIndex[0] = 0U;
spiDev.shifterIndex[1] = 1U;
spiDev.timerIndex[0] = 0U;
spiDev.timerIndex[1] = 1U;
FLEXIO_SPI_MasterInit(&spiDev, &userConfig, FLEXIO_CLOCK_FREQUENCY);
xfer.txData = srcBuff;
xfer.rxData = destBuff;
xfer.dataSize = BUFFER_SIZE;
xfer.flags = kFLEXIO_SPI_8bitMsb;
FLEXIO_SPI_MasterTransferCreateHandle(&spiDev, &g_spiHandle,
FLEXIO_SPI_MasterUserCallback, NULL);
FLEXIO_SPI_MasterTransferNonBlocking(&spiDev, &g_spiHandle, &xfer);
// Send finished.
while (!txFinished)
{
}
// ...
}

22.6.3.2

FlexIO_SPI Send/Receive in DMA way

dma_handle_t g_spiTxDmaHandle;
dma_handle_t g_spiRxDmaHandle;
flexio_spi_master_handle_t g_spiHandle;
FLEXIO_SPI_Type spiDev;
volatile bool txFinished;
static uint8_t srcBuff[BUFFER_SIZE];
static uint8_t destBuff[BUFFER_SIZE];
void FLEXIO_SPI_MasterUserCallback(FLEXIO_SPI_Type *base, flexio_spi_master_dma_handle_t *
handle, status_t status, void *userData)
{
userData = userData;
if (kStatus_FLEXIO_SPI_Idle == status)
{
txFinished = true;
}
}
void main(void)
{
flexio_spi_transfer_t xfer = {0};

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FlexIO SPI Driver
flexio_spi_master_config_t userConfig;
FLEXIO_SPI_MasterGetDefaultConfig(&userConfig);
userConfig.baudRate_Bps = 500000U;
spiDev.flexioBase = BOARD_FLEXIO_BASE;
spiDev.SDOPinIndex = FLEXIO_SPI_MOSI_PIN;
spiDev.SDIPinIndex = FLEXIO_SPI_MISO_PIN;
spiDev.SCKPinIndex = FLEXIO_SPI_SCK_PIN;
spiDev.CSnPinIndex = FLEXIO_SPI_CSn_PIN;
spiDev.shifterIndex[0] = 0U;
spiDev.shifterIndex[1] = 1U;
spiDev.timerIndex[0] = 0U;
spiDev.timerIndex[1] = 1U;
/*Initializes the DMA for the example.
DMAMGR_Init();
dma_request_source_tx = (dma_request_source_t)(FLEXIO_DMA_REQUEST_BASE + spiDev.shifterIndex[0]);
dma_request_source_rx = (dma_request_source_t)(FLEXIO_DMA_REQUEST_BASE + spiDev.shifterIndex[1]);
/* Requests DMA channels for transmit and receive.
DMAMGR_RequestChannel((dma_request_source_t)dma_request_source_tx, 0, &txHandle);
DMAMGR_RequestChannel((dma_request_source_t)dma_request_source_rx, 1, &rxHandle);
FLEXIO_SPI_MasterInit(&spiDev, &userConfig, FLEXIO_CLOCK_FREQUENCY);
/* Initializes the buffer.
for (i = 0; i < BUFFER_SIZE; i++)
{
srcBuff[i] = i;
}
/* Sends to the slave.
xfer.txData = srcBuff;
xfer.rxData = destBuff;
xfer.dataSize = BUFFER_SIZE;
xfer.flags = kFLEXIO_SPI_8bitMsb;
FLEXIO_SPI_MasterTransferCreateHandleDMA(&spiDev, &g_spiHandle, FLEXIO_SPI_MasterUserCallback, NULL,
&g_spiTxDmaHandle, &g_spiRxDmaHandle);
FLEXIO_SPI_MasterTransferDMA(&spiDev, &g_spiHandle, &xfer);
// Send finished.
while (!txFinished)
{
}
// ...
}

Modules
• FlexIO DMA SPI Driver
• FlexIO eDMA SPI Driver

Files
• file fsl_flexio_spi.h

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FlexIO SPI Driver

Data Structures
• struct FLEXIO_SPI_Type
Define FlexIO SPI access structure typedef. More...

• struct flexio_spi_master_config_t
Define FlexIO SPI master configuration structure. More...

• struct flexio_spi_slave_config_t
Define FlexIO SPI slave configuration structure. More...

• struct flexio_spi_transfer_t
Define FlexIO SPI transfer structure. More...

• struct flexio_spi_master_handle_t
Define FlexIO SPI handle structure. More...

Macros
• #define FLEXIO_SPI_DUMMYDATA (0xFFFFU)
FlexIO SPI dummy transfer data, the data is sent while txData is NULL.

Typedefs
• typedef flexio_spi_master_handle_t flexio_spi_slave_handle_t
Slave handle is the same with master handle.

• typedef void(∗ flexio_spi_master_transfer_callback_t )(FLEXIO_SPI_Type ∗base, flexio_spi_master_handle_t ∗handle, status_t status, void ∗userData)
FlexIO SPI master callback for finished transmit.

• typedef void(∗ flexio_spi_slave_transfer_callback_t )(FLEXIO_SPI_Type ∗base, flexio_spi_slave_handle_t ∗handle, status_t status, void ∗userData)
FlexIO SPI slave callback for finished transmit.

Enumerations
• enum _flexio_spi_status {
kStatus_FLEXIO_SPI_Busy = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 1),
kStatus_FLEXIO_SPI_Idle = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 2),
kStatus_FLEXIO_SPI_Error = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 3) }
Error codes for the FlexIO SPI driver.

• enum flexio_spi_clock_phase_t {
kFLEXIO_SPI_ClockPhaseFirstEdge = 0x0U,
kFLEXIO_SPI_ClockPhaseSecondEdge = 0x1U }
FlexIO SPI clock phase configuration.

• enum flexio_spi_shift_direction_t {
kFLEXIO_SPI_MsbFirst = 0,
kFLEXIO_SPI_LsbFirst = 1 }
FlexIO SPI data shifter direction options.

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FlexIO SPI Driver
• enum flexio_spi_data_bitcount_mode_t {
kFLEXIO_SPI_8BitMode = 0x08U,
kFLEXIO_SPI_16BitMode = 0x10U }
FlexIO SPI data length mode options.

• enum _flexio_spi_interrupt_enable {
kFLEXIO_SPI_TxEmptyInterruptEnable = 0x1U,
kFLEXIO_SPI_RxFullInterruptEnable = 0x2U }
Define FlexIO SPI interrupt mask.

• enum _flexio_spi_status_flags {
kFLEXIO_SPI_TxBufferEmptyFlag = 0x1U,
kFLEXIO_SPI_RxBufferFullFlag = 0x2U }
Define FlexIO SPI status mask.

• enum _flexio_spi_dma_enable {
kFLEXIO_SPI_TxDmaEnable = 0x1U,
kFLEXIO_SPI_RxDmaEnable = 0x2U,
kFLEXIO_SPI_DmaAllEnable = 0x3U }
Define FlexIO SPI DMA mask.

• enum _flexio_spi_transfer_flags {
kFLEXIO_SPI_8bitMsb = 0x1U,
kFLEXIO_SPI_8bitLsb = 0x2U,
kFLEXIO_SPI_16bitMsb = 0x9U,
kFLEXIO_SPI_16bitLsb = 0xaU }
Define FlexIO SPI transfer flags.

Driver version
• #define FSL_FLEXIO_SPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
FlexIO SPI driver version 2.1.0.

FlexIO SPI Configuration
• void FLEXIO_SPI_MasterInit (FLEXIO_SPI_Type ∗base, flexio_spi_master_config_t ∗masterConfig, uint32_t srcClock_Hz)
Ungates the FlexIO clock, resets the FlexIO module and configures the FlexIO SPI master hardware, and
configures the FlexIO SPI with FlexIO SPI master configuration.

• void FLEXIO_SPI_MasterDeinit (FLEXIO_SPI_Type ∗base)
Gates the FlexIO clock.

• void FLEXIO_SPI_MasterGetDefaultConfig (flexio_spi_master_config_t ∗masterConfig)
Gets the default configuration to configure the FlexIO SPI master.

• void FLEXIO_SPI_SlaveInit (FLEXIO_SPI_Type ∗base, flexio_spi_slave_config_t ∗slaveConfig)
Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI slave hardware configuration, and configures the FlexIO SPI with FlexIO SPI slave configuration.

• void FLEXIO_SPI_SlaveDeinit (FLEXIO_SPI_Type ∗base)
Gates the FlexIO clock.

• void FLEXIO_SPI_SlaveGetDefaultConfig (flexio_spi_slave_config_t ∗slaveConfig)
Gets the default configuration to configure the FlexIO SPI slave.

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FlexIO SPI Driver

Status
• uint32_t FLEXIO_SPI_GetStatusFlags (FLEXIO_SPI_Type ∗base)
Gets FlexIO SPI status flags.

• void FLEXIO_SPI_ClearStatusFlags (FLEXIO_SPI_Type ∗base, uint32_t mask)
Clears FlexIO SPI status flags.

Interrupts
• void FLEXIO_SPI_EnableInterrupts (FLEXIO_SPI_Type ∗base, uint32_t mask)
Enables the FlexIO SPI interrupt.

• void FLEXIO_SPI_DisableInterrupts (FLEXIO_SPI_Type ∗base, uint32_t mask)
Disables the FlexIO SPI interrupt.

DMA Control
• void FLEXIO_SPI_EnableDMA (FLEXIO_SPI_Type ∗base, uint32_t mask, bool enable)
Enables/disables the FlexIO SPI transmit DMA.

• static uint32_t FLEXIO_SPI_GetTxDataRegisterAddress (FLEXIO_SPI_Type ∗base, flexio_spi_shift_direction_t direction)
Gets the FlexIO SPI transmit data register address for MSB first transfer.

• static uint32_t FLEXIO_SPI_GetRxDataRegisterAddress (FLEXIO_SPI_Type ∗base, flexio_spi_shift_direction_t direction)
Gets the FlexIO SPI receive data register address for the MSB first transfer.

Bus Operations
• static void FLEXIO_SPI_Enable (FLEXIO_SPI_Type ∗base, bool enable)
Enables/disables the FlexIO SPI module operation.

• void FLEXIO_SPI_MasterSetBaudRate (FLEXIO_SPI_Type ∗base, uint32_t baudRate_Bps,
uint32_t srcClockHz)
Sets baud rate for the FlexIO SPI transfer, which is only used for the master.

• static void FLEXIO_SPI_WriteData (FLEXIO_SPI_Type ∗base, flexio_spi_shift_direction_t direction, uint16_t data)
Writes one byte of data, which is sent using the MSB method.

• static uint16_t FLEXIO_SPI_ReadData (FLEXIO_SPI_Type ∗base, flexio_spi_shift_direction_t direction)
Reads 8 bit/16 bit data.

• void FLEXIO_SPI_WriteBlocking (FLEXIO_SPI_Type ∗base, flexio_spi_shift_direction_t direction, const uint8_t ∗buffer, size_t size)
Sends a buffer of data bytes.

• void FLEXIO_SPI_ReadBlocking (FLEXIO_SPI_Type ∗base, flexio_spi_shift_direction_t direction, uint8_t ∗buffer, size_t size)
Receives a buffer of bytes.

• void FLEXIO_SPI_MasterTransferBlocking (FLEXIO_SPI_Type ∗base, flexio_spi_transfer_t
∗xfer)
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FlexIO SPI Driver
Receives a buffer of bytes.

Transactional
• status_t FLEXIO_SPI_MasterTransferCreateHandle (FLEXIO_SPI_Type ∗base, flexio_spi_master_handle_t ∗handle, flexio_spi_master_transfer_callback_t callback, void ∗userData)
Initializes the FlexIO SPI Master handle, which is used in transactional functions.

• status_t FLEXIO_SPI_MasterTransferNonBlocking (FLEXIO_SPI_Type ∗base, flexio_spi_master_handle_t ∗handle, flexio_spi_transfer_t ∗xfer)
Master transfer data using IRQ.

• void FLEXIO_SPI_MasterTransferAbort (FLEXIO_SPI_Type ∗base, flexio_spi_master_handle_t
∗handle)
Aborts the master data transfer, which used IRQ.

• status_t FLEXIO_SPI_MasterTransferGetCount (FLEXIO_SPI_Type ∗base, flexio_spi_master_handle_t ∗handle, size_t ∗count)
Gets the data transfer status which used IRQ.

• void FLEXIO_SPI_MasterTransferHandleIRQ (void ∗spiType, void ∗spiHandle)
FlexIO SPI master IRQ handler function.

• status_t FLEXIO_SPI_SlaveTransferCreateHandle (FLEXIO_SPI_Type ∗base, flexio_spi_slave_handle_t ∗handle, flexio_spi_slave_transfer_callback_t callback, void ∗userData)
Initializes the FlexIO SPI Slave handle, which is used in transactional functions.

• status_t FLEXIO_SPI_SlaveTransferNonBlocking (FLEXIO_SPI_Type ∗base, flexio_spi_slave_handle_t ∗handle, flexio_spi_transfer_t ∗xfer)
Slave transfer data using IRQ.

• static void FLEXIO_SPI_SlaveTransferAbort (FLEXIO_SPI_Type ∗base, flexio_spi_slave_handle_t ∗handle)
Aborts the slave data transfer which used IRQ, share same API with master.

• static status_t FLEXIO_SPI_SlaveTransferGetCount (FLEXIO_SPI_Type ∗base, flexio_spi_slave_handle_t ∗handle, size_t ∗count)
Gets the data transfer status which used IRQ, share same API with master.

• void FLEXIO_SPI_SlaveTransferHandleIRQ (void ∗spiType, void ∗spiHandle)
FlexIO SPI slave IRQ handler function.

22.6.4
22.6.4.1

Data Structure Documentation
struct FLEXIO_SPI_Type

Data Fields

• FLEXIO_Type ∗ flexioBase
FlexIO base pointer.

• uint8_t SDOPinIndex
Pin select for data output.

• uint8_t SDIPinIndex
Pin select for data input.

• uint8_t SCKPinIndex
Pin select for clock.

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FlexIO SPI Driver
• uint8_t CSnPinIndex
Pin select for enable.

• uint8_t shifterIndex [2]
Shifter index used in FlexIO SPI.

• uint8_t timerIndex [2]
Timer index used in FlexIO SPI.
22.6.4.1.0.6

Field Documentation

22.6.4.1.0.6.1

FLEXIO_Type∗ FLEXIO_SPI_Type::flexioBase

22.6.4.1.0.6.2

uint8_t FLEXIO_SPI_Type::SDOPinIndex

22.6.4.1.0.6.3

uint8_t FLEXIO_SPI_Type::SDIPinIndex

22.6.4.1.0.6.4

uint8_t FLEXIO_SPI_Type::SCKPinIndex

22.6.4.1.0.6.5

uint8_t FLEXIO_SPI_Type::CSnPinIndex

22.6.4.1.0.6.6

uint8_t FLEXIO_SPI_Type::shifterIndex[2]

22.6.4.1.0.6.7

uint8_t FLEXIO_SPI_Type::timerIndex[2]

22.6.4.2

struct flexio_spi_master_config_t

Data Fields

• bool enableMaster
Enable/disable FlexIO SPI master after configuration.

• bool enableInDoze
Enable/disable FlexIO operation in doze mode.

• bool enableInDebug
Enable/disable FlexIO operation in debug mode.

• bool enableFastAccess
Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice
the frequency of the bus clock.

• uint32_t baudRate_Bps
Baud rate in Bps.

• flexio_spi_clock_phase_t phase
Clock phase.

• flexio_spi_data_bitcount_mode_t dataMode
8bit or 16bit mode.

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FlexIO SPI Driver
22.6.4.2.0.7

Field Documentation

22.6.4.2.0.7.1

bool flexio_spi_master_config_t::enableMaster

22.6.4.2.0.7.2

bool flexio_spi_master_config_t::enableInDoze

22.6.4.2.0.7.3

bool flexio_spi_master_config_t::enableInDebug

22.6.4.2.0.7.4

bool flexio_spi_master_config_t::enableFastAccess

22.6.4.2.0.7.5

uint32_t flexio_spi_master_config_t::baudRate_Bps

22.6.4.2.0.7.6 flexio_spi_clock_phase_t flexio_spi_master_config_t::phase
22.6.4.2.0.7.7 flexio_spi_data_bitcount_mode_t flexio_spi_master_config_t::dataMode

22.6.4.3

struct flexio_spi_slave_config_t

Data Fields

• bool enableSlave
Enable/disable FlexIO SPI slave after configuration.

• bool enableInDoze
Enable/disable FlexIO operation in doze mode.

• bool enableInDebug
Enable/disable FlexIO operation in debug mode.

• bool enableFastAccess
Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice
the frequency of the bus clock.

• flexio_spi_clock_phase_t phase
Clock phase.

• flexio_spi_data_bitcount_mode_t dataMode
8bit or 16bit mode.

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FlexIO SPI Driver
22.6.4.3.0.8

Field Documentation

22.6.4.3.0.8.1

bool flexio_spi_slave_config_t::enableSlave

22.6.4.3.0.8.2

bool flexio_spi_slave_config_t::enableInDoze

22.6.4.3.0.8.3

bool flexio_spi_slave_config_t::enableInDebug

22.6.4.3.0.8.4

bool flexio_spi_slave_config_t::enableFastAccess

22.6.4.3.0.8.5 flexio_spi_clock_phase_t flexio_spi_slave_config_t::phase
22.6.4.3.0.8.6 flexio_spi_data_bitcount_mode_t flexio_spi_slave_config_t::dataMode

22.6.4.4

struct flexio_spi_transfer_t

Data Fields

• uint8_t ∗ txData
Send buffer.

• uint8_t ∗ rxData
Receive buffer.

• size_t dataSize
Transfer bytes.

• uint8_t flags
FlexIO SPI control flag, MSB first or LSB first.
22.6.4.4.0.9

Field Documentation

22.6.4.4.0.9.1

uint8_t∗ flexio_spi_transfer_t::txData

22.6.4.4.0.9.2

uint8_t∗ flexio_spi_transfer_t::rxData

22.6.4.4.0.9.3

size_t flexio_spi_transfer_t::dataSize

22.6.4.4.0.9.4

uint8_t flexio_spi_transfer_t::flags

22.6.4.5

struct _flexio_spi_master_handle

typedef for flexio_spi_master_handle_t in advance.
Data Fields

• uint8_t ∗ txData
Transfer buffer.

• uint8_t ∗ rxData
Receive buffer.

• size_t transferSize
Total bytes to be transferred.

• volatile size_t txRemainingBytes
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Send data remaining in bytes.

• volatile size_t rxRemainingBytes
Receive data remaining in bytes.

• volatile uint32_t state
FlexIO SPI internal state.

• uint8_t bytePerFrame
SPI mode, 2bytes or 1byte in a frame.

• flexio_spi_shift_direction_t direction
Shift direction.

• flexio_spi_master_transfer_callback_t callback
FlexIO SPI callback.

• void ∗ userData
Callback parameter.

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22.6.4.5.0.10

Field Documentation

22.6.4.5.0.10.1

uint8_t∗ flexio_spi_master_handle_t::txData

22.6.4.5.0.10.2

uint8_t∗ flexio_spi_master_handle_t::rxData

22.6.4.5.0.10.3

size_t flexio_spi_master_handle_t::transferSize

22.6.4.5.0.10.4

volatile size_t flexio_spi_master_handle_t::txRemainingBytes

22.6.4.5.0.10.5

volatile size_t flexio_spi_master_handle_t::rxRemainingBytes

22.6.4.5.0.10.6

volatile uint32_t flexio_spi_master_handle_t::state

22.6.4.5.0.10.7 flexio_spi_shift_direction_t flexio_spi_master_handle_t::direction
22.6.4.5.0.10.8 flexio_spi_master_transfer_callback_t flexio_spi_master_handle_t::callback
22.6.4.5.0.10.9

22.6.5

void∗ flexio_spi_master_handle_t::userData

Macro Definition Documentation

22.6.5.1

#define FSL_FLEXIO_SPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

22.6.5.2

#define FLEXIO_SPI_DUMMYDATA (0xFFFFU)

22.6.6

Typedef Documentation
typedef flexio_spi_master_handle_t flexio_spi_slave_handle_t

22.6.6.1

22.6.7

Enumeration Type Documentation

22.6.7.1

enum _flexio_spi_status

Enumerator
kStatus_FLEXIO_SPI_Busy FlexIO SPI is busy.
kStatus_FLEXIO_SPI_Idle SPI is idle.
kStatus_FLEXIO_SPI_Error FlexIO SPI error.

22.6.7.2

enum flexio_spi_clock_phase_t

Enumerator
kFLEXIO_SPI_ClockPhaseFirstEdge First edge on SPSCK occurs at the middle of the first cycle
of a data transfer.
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kFLEXIO_SPI_ClockPhaseSecondEdge First edge on SPSCK occurs at the start of the first cycle
of a data transfer.

22.6.7.3

enum flexio_spi_shift_direction_t

Enumerator
kFLEXIO_SPI_MsbFirst Data transfers start with most significant bit.
kFLEXIO_SPI_LsbFirst Data transfers start with least significant bit.

22.6.7.4

enum flexio_spi_data_bitcount_mode_t

Enumerator
kFLEXIO_SPI_8BitMode 8-bit data transmission mode.
kFLEXIO_SPI_16BitMode 16-bit data transmission mode.

22.6.7.5

enum _flexio_spi_interrupt_enable

Enumerator
kFLEXIO_SPI_TxEmptyInterruptEnable Transmit buffer empty interrupt enable.
kFLEXIO_SPI_RxFullInterruptEnable Receive buffer full interrupt enable.

22.6.7.6

enum _flexio_spi_status_flags

Enumerator
kFLEXIO_SPI_TxBufferEmptyFlag Transmit buffer empty flag.
kFLEXIO_SPI_RxBufferFullFlag Receive buffer full flag.

22.6.7.7

enum _flexio_spi_dma_enable

Enumerator
kFLEXIO_SPI_TxDmaEnable Tx DMA request source.
kFLEXIO_SPI_RxDmaEnable Rx DMA request source.
kFLEXIO_SPI_DmaAllEnable All DMA request source.

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enum _flexio_spi_transfer_flags

22.6.7.8

Enumerator
kFLEXIO_SPI_8bitMsb FlexIO SPI 8-bit MSB first.
kFLEXIO_SPI_8bitLsb FlexIO SPI 8-bit LSB first.
kFLEXIO_SPI_16bitMsb FlexIO SPI 16-bit MSB first.
kFLEXIO_SPI_16bitLsb FlexIO SPI 16-bit LSB first.

22.6.8

Function Documentation

22.6.8.1

void FLEXIO_SPI_MasterInit ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_config_t ∗ masterConfig, uint32_t srcClock_Hz )

The configuration structure can be filled by the user, or be set with default values by the FLEXIO_SPI_MasterGetDefaultConfig().
Note
FlexIO SPI master only support CPOL = 0, which means clock inactive low.
Example
FLEXIO_SPI_Type spiDev = {
.flexioBase = FLEXIO,
.SDOPinIndex = 0,
.SDIPinIndex = 1,
.SCKPinIndex = 2,
.CSnPinIndex = 3,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_spi_master_config_t config = {
.enableMaster = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 500000,
.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
.direction = kFLEXIO_SPI_MsbFirst,
.dataMode = kFLEXIO_SPI_8BitMode
};
FLEXIO_SPI_MasterInit(&spiDev, &config, srcClock_Hz);

Parameters

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base

Pointer to the FLEXIO_SPI_Type structure.

masterConfig

Pointer to the flexio_spi_master_config_t structure.

srcClock_Hz

FlexIO source clock in Hz.

22.6.8.2

void FLEXIO_SPI_MasterDeinit ( FLEXIO_SPI_Type ∗ base )

Parameters
base

22.6.8.3

Pointer to the FLEXIO_SPI_Type.

void FLEXIO_SPI_MasterGetDefaultConfig ( flexio_spi_master_config_t ∗
masterConfig )

The configuration can be used directly by calling the FLEXIO_SPI_MasterConfigure(). Example:
flexio_spi_master_config_t masterConfig;
FLEXIO_SPI_MasterGetDefaultConfig(&masterConfig);

Parameters
masterConfig

22.6.8.4

Pointer to the flexio_spi_master_config_t structure.

void FLEXIO_SPI_SlaveInit ( FLEXIO_SPI_Type ∗ base,
flexio_spi_slave_config_t ∗ slaveConfig )

The configuration structure can be filled by the user, or be set with default values by the FLEXIO_SPI_SlaveGetDefaultConfig().
Note
Only one timer is needed in the FlexIO SPI slave. As a result, the second timer index is ignored.
FlexIO SPI slave only support CPOL = 0, which means clock inactive low. Example
FLEXIO_SPI_Type spiDev = {
.flexioBase = FLEXIO,
.SDOPinIndex = 0,
.SDIPinIndex = 1,
.SCKPinIndex = 2,
.CSnPinIndex = 3,
.shifterIndex = {0,1},
.timerIndex = {0}
};
flexio_spi_slave_config_t config = {
.enableSlave = true,
.enableInDoze = false,

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.enableInDebug = true,
.enableFastAccess = false,
.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
.direction = kFLEXIO_SPI_MsbFirst,
.dataMode = kFLEXIO_SPI_8BitMode
};
FLEXIO_SPI_SlaveInit(&spiDev, &config);

Parameters
base
slaveConfig

22.6.8.5

Pointer to the FLEXIO_SPI_Type structure.
Pointer to the flexio_spi_slave_config_t structure.

void FLEXIO_SPI_SlaveDeinit ( FLEXIO_SPI_Type ∗ base )

Parameters
base

22.6.8.6

Pointer to the FLEXIO_SPI_Type.

void FLEXIO_SPI_SlaveGetDefaultConfig ( flexio_spi_slave_config_t ∗
slaveConfig )

The configuration can be used directly for calling the FLEXIO_SPI_SlaveConfigure(). Example:
flexio_spi_slave_config_t slaveConfig;
FLEXIO_SPI_SlaveGetDefaultConfig(&slaveConfig);

Parameters
slaveConfig

22.6.8.7

Pointer to the flexio_spi_slave_config_t structure.

uint32_t FLEXIO_SPI_GetStatusFlags ( FLEXIO_SPI_Type ∗ base )

Parameters
base

Pointer to the FLEXIO_SPI_Type structure.

Returns
status flag; Use the status flag to AND the following flag mask and get the status.
• kFLEXIO_SPI_TxEmptyFlag
• kFLEXIO_SPI_RxEmptyFlag

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22.6.8.8

void FLEXIO_SPI_ClearStatusFlags ( FLEXIO_SPI_Type ∗ base, uint32_t mask
)

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Parameters

22.6.8.9

base

Pointer to the FLEXIO_SPI_Type structure.

mask

status flag The parameter can be any combination of the following values:
• kFLEXIO_SPI_TxEmptyFlag
• kFLEXIO_SPI_RxEmptyFlag

void FLEXIO_SPI_EnableInterrupts ( FLEXIO_SPI_Type ∗ base, uint32_t mask
)

This function enables the FlexIO SPI interrupt.
Parameters

22.6.8.10

base

Pointer to the FLEXIO_SPI_Type structure.

mask

interrupt source. The parameter can be any combination of the following values:
• kFLEXIO_SPI_RxFullInterruptEnable
• kFLEXIO_SPI_TxEmptyInterruptEnable

void FLEXIO_SPI_DisableInterrupts ( FLEXIO_SPI_Type ∗ base, uint32_t
mask )

This function disables the FlexIO SPI interrupt.
Parameters

22.6.8.11

base

Pointer to the FLEXIO_SPI_Type structure.

mask

interrupt source The parameter can be any combination of the following values:
• kFLEXIO_SPI_RxFullInterruptEnable
• kFLEXIO_SPI_TxEmptyInterruptEnable

void FLEXIO_SPI_EnableDMA ( FLEXIO_SPI_Type ∗ base, uint32_t mask,
bool enable )

This function enables/disables the FlexIO SPI Tx DMA, which means that asserting the kFLEXIO_SPI_TxEmptyFlag does/doesn’t trigger the DMA request.

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FlexIO SPI Driver
Parameters
base

Pointer to the FLEXIO_SPI_Type structure.

mask

SPI DMA source.

enable

22.6.8.12

True means enable DMA, false means disable DMA.

static uint32_t FLEXIO_SPI_GetTxDataRegisterAddress ( FLEXIO_SPI_Type ∗
base, flexio_spi_shift_direction_t direction ) [inline], [static]

This function returns the SPI data register address, which is mainly used by DMA/eDMA.
Parameters
base
direction

Pointer to the FLEXIO_SPI_Type structure.
Shift direction of MSB first or LSB first.

Returns
FlexIO SPI transmit data register address.

22.6.8.13

static uint32_t FLEXIO_SPI_GetRxDataRegisterAddress ( FLEXIO_SPI_Type ∗
base, flexio_spi_shift_direction_t direction ) [inline], [static]

This function returns the SPI data register address, which is mainly used by DMA/eDMA.
Parameters
base
direction

Pointer to the FLEXIO_SPI_Type structure.
Shift direction of MSB first or LSB first.

Returns
FlexIO SPI receive data register address.

22.6.8.14

static void FLEXIO_SPI_Enable ( FLEXIO_SPI_Type ∗ base, bool enable )

[inline], [static]

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FlexIO SPI Driver
Parameters
base
enable

22.6.8.15

Pointer to the FLEXIO_SPI_Type.
True to enable, false to disable.

void FLEXIO_SPI_MasterSetBaudRate ( FLEXIO_SPI_Type ∗ base, uint32_t
baudRate_Bps, uint32_t srcClockHz )

Parameters
base
baudRate_Bps
srcClockHz

22.6.8.16

Pointer to the FLEXIO_SPI_Type structure.
Baud Rate needed in Hz.
SPI source clock frequency in Hz.

static void FLEXIO_SPI_WriteData ( FLEXIO_SPI_Type ∗ base,
flexio_spi_shift_direction_t direction, uint16_t data ) [inline], [static]

Note
This is a non-blocking API, which returns directly after the data is put into the data register but the
data transfer is not finished on the bus. Ensure that the TxEmptyFlag is asserted before calling this
API.
Parameters
base
direction
data

22.6.8.17

Pointer to the FLEXIO_SPI_Type structure.
Shift direction of MSB first or LSB first.
8 bit/16 bit data.

static uint16_t FLEXIO_SPI_ReadData ( FLEXIO_SPI_Type ∗ base,
flexio_spi_shift_direction_t direction ) [inline], [static]

Note
This is a non-blocking API, which returns directly after the data is read from the data register. Ensure
that the RxFullFlag is asserted before calling this API.

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Parameters
base
direction

Pointer to the FLEXIO_SPI_Type structure.
Shift direction of MSB first or LSB first.

Returns
8 bit/16 bit data received.

22.6.8.18

void FLEXIO_SPI_WriteBlocking ( FLEXIO_SPI_Type ∗ base,
flexio_spi_shift_direction_t direction, const uint8_t ∗ buffer, size_t size )

Note
This function blocks using the polling method until all bytes have been sent.
Parameters
base
direction
buffer
size

22.6.8.19

Pointer to the FLEXIO_SPI_Type structure.
Shift direction of MSB first or LSB first.
The data bytes to send.
The number of data bytes to send.

void FLEXIO_SPI_ReadBlocking ( FLEXIO_SPI_Type ∗ base,
flexio_spi_shift_direction_t direction, uint8_t ∗ buffer, size_t size )

Note
This function blocks using the polling method until all bytes have been received.
Parameters
base
direction
buffer

Pointer to the FLEXIO_SPI_Type structure.
Shift direction of MSB first or LSB first.
The buffer to store the received bytes.

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FlexIO SPI Driver
size

The number of data bytes to be received.

direction

Shift direction of MSB first or LSB first.

void FLEXIO_SPI_MasterTransferBlocking ( FLEXIO_SPI_Type ∗ base,
flexio_spi_transfer_t ∗ xfer )

22.6.8.20

Note
This function blocks via polling until all bytes have been received.
Parameters
base

pointer to FLEXIO_SPI_Type structure

xfer

FlexIO SPI transfer structure, see flexio_spi_transfer_t.

status_t FLEXIO_SPI_MasterTransferCreateHandle ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_handle_t ∗ handle, flexio_spi_master_transfer_callback_t
callback, void ∗ userData )

22.6.8.21

Parameters
base
handle
callback
userData

Pointer to the FLEXIO_SPI_Type structure.
Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
The callback function.
The parameter of the callback function.

Return values
kStatus_Success
kStatus_OutOfRange

22.6.8.22

Successfully create the handle.
The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_SPI_MasterTransferNonBlocking ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_handle_t ∗ handle, flexio_spi_transfer_t ∗ xfer )

This function sends data using IRQ. This is a non-blocking function, which returns right away. When all
data is sent out/received, the callback function is called.

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FlexIO SPI Driver
Parameters
base
handle
xfer

Pointer to the FLEXIO_SPI_Type structure.
Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
FlexIO SPI transfer structure. See flexio_spi_transfer_t.

Return values
kStatus_Success
kStatus_InvalidArgument
kStatus_FLEXIO_SPI_Busy

Successfully start a transfer.
Input argument is invalid.
SPI is not idle, is running another transfer.

void FLEXIO_SPI_MasterTransferAbort ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_handle_t ∗ handle )

22.6.8.23

Parameters
base
handle

Pointer to the FLEXIO_SPI_Type structure.
Pointer to the flexio_spi_master_handle_t structure to store the transfer state.

status_t FLEXIO_SPI_MasterTransferGetCount ( FLEXIO_SPI_Type ∗ base,
flexio_spi_master_handle_t ∗ handle, size_t ∗ count )

22.6.8.24

Parameters
base
handle
count

Pointer to the FLEXIO_SPI_Type structure.
Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
Number of bytes transferred so far by the non-blocking transaction.

Return values
kStatus_InvalidArgument
kStatus_Success

22.6.8.25

count is Invalid.
Successfully return the count.

void FLEXIO_SPI_MasterTransferHandleIRQ ( void ∗ spiType, void ∗ spiHandle
)

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FlexIO SPI Driver
Parameters
spiType
spiHandle

Pointer to the FLEXIO_SPI_Type structure.
Pointer to the flexio_spi_master_handle_t structure to store the transfer state.

status_t FLEXIO_SPI_SlaveTransferCreateHandle ( FLEXIO_SPI_Type ∗ base,
flexio_spi_slave_handle_t ∗ handle, flexio_spi_slave_transfer_callback_t
callback, void ∗ userData )

22.6.8.26

Parameters
base
handle
callback
userData

Pointer to the FLEXIO_SPI_Type structure.
Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
The callback function.
The parameter of the callback function.

Return values
kStatus_Success
kStatus_OutOfRange

Successfully create the handle.
The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_SPI_SlaveTransferNonBlocking ( FLEXIO_SPI_Type ∗ base,
flexio_spi_slave_handle_t ∗ handle, flexio_spi_transfer_t ∗ xfer )

22.6.8.27

This function sends data using IRQ. This is a non-blocking function, which returns right away. When all
data is sent out/received, the callback function is called.
Parameters
handle

Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

base

Pointer to the FLEXIO_SPI_Type structure.

xfer

FlexIO SPI transfer structure. See flexio_spi_transfer_t.

Return values
kStatus_Success
kStatus_InvalidArgument
kStatus_FLEXIO_SPI_Busy

Successfully start a transfer.
Input argument is invalid.
SPI is not idle; it is running another transfer.

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FlexIO SPI Driver
22.6.8.28

static void FLEXIO_SPI_SlaveTransferAbort ( FLEXIO_SPI_Type ∗ base,
flexio_spi_slave_handle_t ∗ handle ) [inline], [static]

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FlexIO SPI Driver
Parameters
base
handle

Pointer to the FLEXIO_SPI_Type structure.
Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

static status_t FLEXIO_SPI_SlaveTransferGetCount ( FLEXIO_SPI_Type
∗ base, flexio_spi_slave_handle_t ∗ handle, size_t ∗ count ) [inline],

22.6.8.29

[static]
Parameters
base
handle
count

Pointer to the FLEXIO_SPI_Type structure.
Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
Number of bytes transferred so far by the non-blocking transaction.

Return values
kStatus_InvalidArgument
kStatus_Success

22.6.8.30

count is Invalid.
Successfully return the count.

void FLEXIO_SPI_SlaveTransferHandleIRQ ( void ∗ spiType, void ∗ spiHandle )

Parameters
spiType
spiHandle

Pointer to the FLEXIO_SPI_Type structure.
Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

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FlexIO UART Driver

22.7
22.7.1

FlexIO UART Driver
Overview

The KSDK provides a peripheral driver for the Universal Asynchronous Receiver/Transmitter (UART)
function using the Flexible I/O.

22.7.2

Overview

FlexIO UART driver includes 2 parts: functional APIs and transactional APIs. Functional APIs are
feature/property target low level APIs. Functional APIs can be used for the FlexIO UART initialization/configuration/operation for optimization/customization purpose. Using the functional APIs requires
the knowledge of the FlexIO UART peripheral and how to organize functional APIs to meet the application requirements. All functional API use the FLEXIO_UART_Type ∗ as the first parameter. FlexIO
UART functional operation groups provide the functional APIs set.
Transactional APIs are transaction target high level APIs. Transactional APIs can be used to enable the
peripheral and also in the application if the code size and performance of transactional APIs can satisfy
requirements. If the code size and performance are critical requirements, see the transactional API implementation and write custom code. All transactional APIs use the flexio_uart_handle_t as the second
parameter. Initialize the handle by calling the FLEXIO_UART_TransferCreateHandle() API.
Transactional APIs support asynchronous transfer. This means that the functions FLEXIO_UART_SendNonBlocking() and FLEXIO_UART_ReceiveNonBlocking() set up an interrupt for data transfer. When
the transfer is complete, the upper layer is notified through a callback function with the kStatus_FLEXIO_UART_TxIdle and kStatus_FLEXIO_UART_RxIdle status.
Transactional receive APIs support the ring buffer. Prepare the memory for the ring buffer and pass in the
start address and size through calling the FLEXIO_UART_InstallRingBuffer(). When the ring buffer is
enabled, the received data is saved to the ring buffer in the background. The function FLEXIO_UART_ReceiveNonBlocking() first gets data the from the ring buffer. If ring buffer does not have enough data,
the function returns the data to the ring buffer and saves the received data to user memory. When all data is
received, the upper layer is informed through a callback with the statuskStatus_FLEXIO_UART_RxIdle
status.
If the receive ring buffer is full, the upper layer is informed through a callback with status kStatus_FLEXIO_UART_RxRingBufferOverrun. In the callback function, the upper layer reads data from the ring
buffer. If not, the oldest data is overwritten by the new data.
The ring buffer size is specified when calling the FLEXIO_UART_InstallRingBuffer. Note that one byte
is reserved for the ring buffer maintenance. Create a handle as follows:
FLEXIO_UART_InstallRingBuffer(&uartDev, &handle, &ringBuffer, 32);

In this example, the buffer size is 32. However, only 31 bytes are used for saving data.

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22.7.3
22.7.3.1

Typical use case
FlexIO UART send/receive using a polling method

uint8_t ch;
FLEXIO_UART_Type uartDev;
flexio_uart_user_config user_config;
FLEXIO_UART_GetDefaultConfig(&user_config);
user_config.baudRate_Bps = 115200U;
user_config.enableUart = true;
uartDev.flexioBase = BOARD_FLEXIO_BASE;
uartDev.TxPinIndex = FLEXIO_UART_TX_PIN;
uartDev.RxPinIndex = FLEXIO_UART_RX_PIN;
uartDev.shifterIndex[0] = 0U;
uartDev.shifterIndex[1] = 1U;
uartDev.timerIndex[0] = 0U;
uartDev.timerIndex[1] = 1U;
FLEXIO_UART_Init(&uartDev, &user_config, 48000000U);
FLEXIO_UART_WriteBlocking(&uartDev, txbuff, sizeof(txbuff));
while(1)
{
FLEXIO_UART_ReadBlocking(&uartDev, &ch, 1);
FLEXIO_UART_WriteBlocking(&uartDev, &ch, 1);
}

22.7.3.2

FlexIO UART send/receive using an interrupt method

FLEXIO_UART_Type uartDev;
flexio_uart_handle_t g_uartHandle;
flexio_uart_config_t user_config;
flexio_uart_transfer_t sendXfer;
flexio_uart_transfer_t receiveXfer;
volatile bool txFinished;
volatile bool rxFinished;
uint8_t sendData[] = [’H’, ’e’, ’l’, ’l’, ’o’];
uint8_t receiveData[32];
void FLEXIO_UART_UserCallback(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle,
status_t status, void *userData)
{
userData = userData;
if (kStatus_FLEXIO_UART_TxIdle == status)
{
txFinished = true;
}
if (kStatus_FLEXIO_UART_RxIdle == status)
{
rxFinished = true;
}
}
void main(void)
{
//...
FLEXIO_UART_GetDefaultConfig(&user_config);
user_config.baudRate_Bps = 115200U;

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user_config.enableUart = true;
uartDev.flexioBase = BOARD_FLEXIO_BASE;
uartDev.TxPinIndex = FLEXIO_UART_TX_PIN;
uartDev.RxPinIndex = FLEXIO_UART_RX_PIN;
uartDev.shifterIndex[0] = 0U;
uartDev.shifterIndex[1] = 1U;
uartDev.timerIndex[0] = 0U;
uartDev.timerIndex[1] = 1U;
FLEXIO_UART_Init(&uartDev, &user_config, 120000000U);
FLEXIO_UART_TransferCreateHandle(&uartDev, &g_uartHandle,
FLEXIO_UART_UserCallback, NULL);
// Prepares to send.
sendXfer.data = sendData;
sendXfer.dataSize = sizeof(sendData)/sizeof(sendData[0]);
txFinished = false;
// Sends out.
FLEXIO_UART_SendNonBlocking(&uartDev, &g_uartHandle, &sendXfer);
// Send finished.
while (!txFinished)
{
}
// Prepares to receive.
receiveXfer.data = receiveData;
receiveXfer.dataSize = sizeof(receiveData)/sizeof(receiveData[0]);
rxFinished = false;
// Receives.
FLEXIO_UART_ReceiveNonBlocking(&uartDev, &g_uartHandle, &receiveXfer, NULL);
// Receive finished.
while (!rxFinished)
{
}
// ...
}

22.7.3.3

FlexIO UART receive using the ringbuffer feature

#define RING_BUFFER_SIZE 64
#define RX_DATA_SIZE
32
FLEXIO_UART_Type uartDev;
flexio_uart_handle_t g_uartHandle;
flexio_uart_config_t user_config;
flexio_uart_transfer_t sendXfer;
flexio_uart_transfer_t receiveXfer;
volatile bool txFinished;
volatile bool rxFinished;
uint8_t receiveData[RX_DATA_SIZE];
uint8_t ringBuffer[RING_BUFFER_SIZE];
void FLEXIO_UART_UserCallback(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle,
status_t status, void *userData)
{
userData = userData;
if (kStatus_FLEXIO_UART_RxIdle == status)
{

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FlexIO UART Driver
rxFinished = true;
}
}
void main(void)
{
size_t bytesRead;
//...
FLEXIO_UART_GetDefaultConfig(&user_config);
user_config.baudRate_Bps = 115200U;
user_config.enableUart = true;
uartDev.flexioBase = BOARD_FLEXIO_BASE;
uartDev.TxPinIndex = FLEXIO_UART_TX_PIN;
uartDev.RxPinIndex = FLEXIO_UART_RX_PIN;
uartDev.shifterIndex[0] = 0U;
uartDev.shifterIndex[1] = 1U;
uartDev.timerIndex[0] = 0U;
uartDev.timerIndex[1] = 1U;
FLEXIO_UART_Init(&uartDev, &user_config, 48000000U);
FLEXIO_UART_TransferCreateHandle(&uartDev, &g_uartHandle,
FLEXIO_UART_UserCallback, NULL);
FLEXIO_UART_InstallRingBuffer(&uartDev, &g_uartHandle, ringBuffer, RING_BUFFER_SIZE);
// Receive is working in the background to the ring buffer.
// Prepares to receive.
receiveXfer.data = receiveData;
receiveXfer.dataSize = RX_DATA_SIZE;
rxFinished = false;
// Receives.
FLEXIO_UART_ReceiveNonBlocking(&uartDev, &g_uartHandle, &receiveXfer, &bytesRead);
if (bytesRead = RX_DATA_SIZE) /* Have read enough data.
{
;
}
else
{
if (bytesRead) /* Received some data, process first.
{
;
}
// Receive finished.
while (!rxFinished)
{
}
}
// ...
}

22.7.3.4

FlexIO UART send/receive using a DMA method

FLEXIO_UART_Type uartDev;
flexio_uart_handle_t g_uartHandle;
dma_handle_t g_uartTxDmaHandle;
dma_handle_t g_uartRxDmaHandle;
flexio_uart_config_t user_config;
flexio_uart_transfer_t sendXfer;
flexio_uart_transfer_t receiveXfer;

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volatile bool txFinished;
volatile bool rxFinished;
uint8_t sendData[] = [’H’, ’e’, ’l’, ’l’, ’o’];
uint8_t receiveData[32];
void FLEXIO_UART_UserCallback(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle,
status_t status, void *userData)
{
userData = userData;
if (kStatus_FLEXIO_UART_TxIdle == status)
{
txFinished = true;
}
if (kStatus_FLEXIO_UART_RxIdle == status)
{
rxFinished = true;
}
}
void main(void)
{
//...
FLEXIO_UART_GetDefaultConfig(&user_config);
user_config.baudRate_Bps = 115200U;
user_config.enableUart = true;
uartDev.flexioBase = BOARD_FLEXIO_BASE;
uartDev.TxPinIndex = FLEXIO_UART_TX_PIN;
uartDev.RxPinIndex = FLEXIO_UART_RX_PIN;
uartDev.shifterIndex[0] = 0U;
uartDev.shifterIndex[1] = 1U;
uartDev.timerIndex[0] = 0U;
uartDev.timerIndex[1] = 1U;
FLEXIO_UART_Init(&uartDev, &user_config, 48000000U);
/*Initializes the DMA for the example
DMAMGR_Init();
dma_request_source_tx = (dma_request_source_t)(FLEXIO_DMA_REQUEST_BASE + uartDev.shifterIndex[0]);
dma_request_source_rx = (dma_request_source_t)(FLEXIO_DMA_REQUEST_BASE + uartDev.shifterIndex[1]);
/* Requests DMA channels for transmit and receive.
DMAMGR_RequestChannel((dma_request_source_t)dma_request_source_tx, 0, &g_uartTxDmaHandle);
DMAMGR_RequestChannel((dma_request_source_t)dma_request_source_rx, 1, &g_uartRxDmaHandle);
FLEXIO_UART_TransferCreateHandleDMA(&uartDev, &g_uartHandle, FLEXIO_UART_UserCallback, NULL,
&g_uartTxDmaHandle, &g_uartRxDmaHandle);
// Prepares to send.
sendXfer.data = sendData
sendXfer.dataSize = sizeof(sendData)/sizeof(sendData[0]);
txFinished = false;
// Sends out.
FLEXIO_UART_SendDMA(&uartDev, &g_uartHandle, &sendXfer);
// Send finished.
while (!txFinished)
{
}
// Prepares to receive.
receiveXfer.data = receiveData;
receiveXfer.dataSize = sizeof(receiveData)/sizeof(receiveData[0]);
rxFinished = false;

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// Receives.
FLEXIO_UART_ReceiveDMA(&uartDev, &g_uartHandle, &receiveXfer, NULL);
// Receive finished.
while (!rxFinished)
{
}
// ...
}

Modules
• FlexIO DMA UART Driver
• FlexIO eDMA UART Driver

Files
• file fsl_flexio_uart.h

Data Structures
• struct FLEXIO_UART_Type
Define FlexIO UART access structure typedef. More...

• struct flexio_uart_config_t
Define FlexIO UART user configuration structure. More...

• struct flexio_uart_transfer_t
Define FlexIO UART transfer structure. More...

• struct flexio_uart_handle_t
Define FLEXIO UART handle structure. More...

Typedefs
• typedef void(∗ flexio_uart_transfer_callback_t )(FLEXIO_UART_Type ∗base, flexio_uart_handle_t ∗handle, status_t status, void ∗userData)
FlexIO UART transfer callback function.

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Enumerations
• enum _flexio_uart_status {
kStatus_FLEXIO_UART_TxBusy = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 0),
kStatus_FLEXIO_UART_RxBusy = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 1),
kStatus_FLEXIO_UART_TxIdle = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 2),
kStatus_FLEXIO_UART_RxIdle = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 3),
kStatus_FLEXIO_UART_ERROR = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 4),
kStatus_FLEXIO_UART_RxRingBufferOverrun,
kStatus_FLEXIO_UART_RxHardwareOverrun = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 6) }
Error codes for the UART driver.

• enum flexio_uart_bit_count_per_char_t {
kFLEXIO_UART_7BitsPerChar = 7U,
kFLEXIO_UART_8BitsPerChar = 8U,
kFLEXIO_UART_9BitsPerChar = 9U }
FlexIO UART bit count per char.

• enum _flexio_uart_interrupt_enable {
kFLEXIO_UART_TxDataRegEmptyInterruptEnable = 0x1U,
kFLEXIO_UART_RxDataRegFullInterruptEnable = 0x2U }
Define FlexIO UART interrupt mask.

• enum _flexio_uart_status_flags {
kFLEXIO_UART_TxDataRegEmptyFlag = 0x1U,
kFLEXIO_UART_RxDataRegFullFlag = 0x2U,
kFLEXIO_UART_RxOverRunFlag = 0x4U }
Define FlexIO UART status mask.

Driver version
• #define FSL_FLEXIO_UART_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
FlexIO UART driver version 2.1.0.

Initialization and deinitialization
• void FLEXIO_UART_Init (FLEXIO_UART_Type ∗base, const flexio_uart_config_t ∗userConfig,
uint32_t srcClock_Hz)
Ungates the FlexIO clock, resets the FlexIO module, configures FlexIO UART hardware, and configures
the FlexIO UART with FlexIO UART configuration.

• void FLEXIO_UART_Deinit (FLEXIO_UART_Type ∗base)
Disables the FlexIO UART and gates the FlexIO clock.

• void FLEXIO_UART_GetDefaultConfig (flexio_uart_config_t ∗userConfig)
Gets the default configuration to configure the FlexIO UART.

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Status
• uint32_t FLEXIO_UART_GetStatusFlags (FLEXIO_UART_Type ∗base)
Gets the FlexIO UART status flags.

• void FLEXIO_UART_ClearStatusFlags (FLEXIO_UART_Type ∗base, uint32_t mask)
Gets the FlexIO UART status flags.

Interrupts
• void FLEXIO_UART_EnableInterrupts (FLEXIO_UART_Type ∗base, uint32_t mask)
Enables the FlexIO UART interrupt.

• void FLEXIO_UART_DisableInterrupts (FLEXIO_UART_Type ∗base, uint32_t mask)
Disables the FlexIO UART interrupt.

DMA Control
• static uint32_t FLEXIO_UART_GetTxDataRegisterAddress (FLEXIO_UART_Type ∗base)
Gets the FlexIO UARt transmit data register address.

• static uint32_t FLEXIO_UART_GetRxDataRegisterAddress (FLEXIO_UART_Type ∗base)
Gets the FlexIO UART receive data register address.

• static void FLEXIO_UART_EnableTxDMA (FLEXIO_UART_Type ∗base, bool enable)
Enables/disables the FlexIO UART transmit DMA.

• static void FLEXIO_UART_EnableRxDMA (FLEXIO_UART_Type ∗base, bool enable)
Enables/disables the FlexIO UART receive DMA.

Bus Operations
• static void FLEXIO_UART_Enable (FLEXIO_UART_Type ∗base, bool enable)
Enables/disables the FlexIO UART module operation.

• static void FLEXIO_UART_WriteByte (FLEXIO_UART_Type ∗base, const uint8_t ∗buffer)
Writes one byte of data.

• static void FLEXIO_UART_ReadByte (FLEXIO_UART_Type ∗base, uint8_t ∗buffer)
Reads one byte of data.

• void FLEXIO_UART_WriteBlocking (FLEXIO_UART_Type ∗base, const uint8_t ∗txData, size_t
txSize)
Sends a buffer of data bytes.

• void FLEXIO_UART_ReadBlocking (FLEXIO_UART_Type ∗base, uint8_t ∗rxData, size_t rxSize)
Receives a buffer of bytes.

Transactional
• status_t FLEXIO_UART_TransferCreateHandle (FLEXIO_UART_Type ∗base, flexio_uart_handle_t ∗handle, flexio_uart_transfer_callback_t callback, void ∗userData)
Initializes the UART handle.

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• void FLEXIO_UART_TransferStartRingBuffer (FLEXIO_UART_Type ∗base, flexio_uart_handle_t ∗handle, uint8_t ∗ringBuffer, size_t ringBufferSize)
Sets up the RX ring buffer.

• void FLEXIO_UART_StopRingBuffer (FLEXIO_UART_Type ∗base,
t ∗handle)

flexio_uart_handle_-

Aborts the background transfer and uninstalls the ring buffer.

• status_t FLEXIO_UART_TransferSendNonBlocking (FLEXIO_UART_Type ∗base, flexio_uart_handle_t ∗handle, flexio_uart_transfer_t ∗xfer)
Transmits a buffer of data using the interrupt method.

• void FLEXIO_UART_TransferAbortSend (FLEXIO_UART_Type ∗base, flexio_uart_handle_t
∗handle)
Aborts the interrupt-driven data transmit.

• status_t FLEXIO_UART_TransferGetSendCount (FLEXIO_UART_Type ∗base, flexio_uart_handle_t ∗handle, size_t ∗count)
Gets the number of remaining bytes not sent.

• status_t FLEXIO_UART_TransferReceiveNonBlocking (FLEXIO_UART_Type ∗base, flexio_uart_handle_t ∗handle, flexio_uart_transfer_t ∗xfer, size_t ∗receivedBytes)
Receives a buffer of data using the interrupt method.

• void FLEXIO_UART_TransferAbortReceive (FLEXIO_UART_Type ∗base, flexio_uart_handle_t
∗handle)
Aborts the receive data which was using IRQ.

• status_t FLEXIO_UART_TransferGetReceiveCount (FLEXIO_UART_Type ∗base, flexio_uart_handle_t ∗handle, size_t ∗count)
Gets the number of remaining bytes not received.

• void FLEXIO_UART_TransferHandleIRQ (void ∗uartType, void ∗uartHandle)
FlexIO UART IRQ handler function.

22.7.4
22.7.4.1

Data Structure Documentation
struct FLEXIO_UART_Type

Data Fields

• FLEXIO_Type ∗ flexioBase
FlexIO base pointer.

• uint8_t TxPinIndex
Pin select for UART_Tx.

• uint8_t RxPinIndex
Pin select for UART_Rx.

• uint8_t shifterIndex [2]
Shifter index used in FlexIO UART.

• uint8_t timerIndex [2]
Timer index used in FlexIO UART.

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22.7.4.1.0.11

Field Documentation

22.7.4.1.0.11.1

FLEXIO_Type∗ FLEXIO_UART_Type::flexioBase

22.7.4.1.0.11.2

uint8_t FLEXIO_UART_Type::TxPinIndex

22.7.4.1.0.11.3

uint8_t FLEXIO_UART_Type::RxPinIndex

22.7.4.1.0.11.4

uint8_t FLEXIO_UART_Type::shifterIndex[2]

22.7.4.1.0.11.5

uint8_t FLEXIO_UART_Type::timerIndex[2]

22.7.4.2

struct flexio_uart_config_t

Data Fields

• bool enableUart
Enable/disable FlexIO UART TX & RX.

• bool enableInDoze
Enable/disable FlexIO operation in doze mode.

• bool enableInDebug
Enable/disable FlexIO operation in debug mode.

• bool enableFastAccess
Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice
the frequency of the bus clock.

• uint32_t baudRate_Bps
Baud rate in Bps.

• flexio_uart_bit_count_per_char_t bitCountPerChar
number of bits, 7/8/9 -bit
22.7.4.2.0.12

Field Documentation

22.7.4.2.0.12.1

bool flexio_uart_config_t::enableUart

22.7.4.2.0.12.2

bool flexio_uart_config_t::enableFastAccess

22.7.4.2.0.12.3

uint32_t flexio_uart_config_t::baudRate_Bps

22.7.4.3

struct flexio_uart_transfer_t

Data Fields

• uint8_t ∗ data
Transfer buffer.

• size_t dataSize
Transfer size.

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22.7.4.4

struct _flexio_uart_handle

Data Fields

• uint8_t ∗volatile txData
Address of remaining data to send.

• volatile size_t txDataSize
Size of the remaining data to send.

• uint8_t ∗volatile rxData
Address of remaining data to receive.

• volatile size_t rxDataSize
Size of the remaining data to receive.

• size_t txSize
Total bytes to be sent.

• size_t rxSize
Total bytes to be received.

• uint8_t ∗ rxRingBuffer
Start address of the receiver ring buffer.

• size_t rxRingBufferSize
Size of the ring buffer.

• volatile uint16_t rxRingBufferHead
Index for the driver to store received data into ring buffer.

• volatile uint16_t rxRingBufferTail
Index for the user to get data from the ring buffer.

• flexio_uart_transfer_callback_t callback
Callback function.

• void ∗ userData
UART callback function parameter.

• volatile uint8_t txState
TX transfer state.

• volatile uint8_t rxState
RX transfer state.

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FlexIO UART Driver
22.7.4.4.0.13

Field Documentation

22.7.4.4.0.13.1

uint8_t∗ volatile flexio_uart_handle_t::txData

22.7.4.4.0.13.2

volatile size_t flexio_uart_handle_t::txDataSize

22.7.4.4.0.13.3

uint8_t∗ volatile flexio_uart_handle_t::rxData

22.7.4.4.0.13.4

volatile size_t flexio_uart_handle_t::rxDataSize

22.7.4.4.0.13.5

size_t flexio_uart_handle_t::txSize

22.7.4.4.0.13.6

size_t flexio_uart_handle_t::rxSize

22.7.4.4.0.13.7

uint8_t∗ flexio_uart_handle_t::rxRingBuffer

22.7.4.4.0.13.8

size_t flexio_uart_handle_t::rxRingBufferSize

22.7.4.4.0.13.9

volatile uint16_t flexio_uart_handle_t::rxRingBufferHead

22.7.4.4.0.13.10

volatile uint16_t flexio_uart_handle_t::rxRingBufferTail

22.7.4.4.0.13.11 flexio_uart_transfer_callback_t flexio_uart_handle_t::callback
22.7.4.4.0.13.12

void∗ flexio_uart_handle_t::userData

22.7.4.4.0.13.13

volatile uint8_t flexio_uart_handle_t::txState

22.7.5

Macro Definition Documentation
#define FSL_FLEXIO_UART_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

22.7.5.1

22.7.6

Typedef Documentation
typedef void(∗ flexio_uart_transfer_callback_t)(FLEXIO_UART_Type ∗base,
flexio_uart_handle_t ∗handle, status_t status, void ∗userData)

22.7.6.1

22.7.7

Enumeration Type Documentation

22.7.7.1

enum _flexio_uart_status

Enumerator
kStatus_FLEXIO_UART_TxBusy Transmitter is busy.
kStatus_FLEXIO_UART_RxBusy Receiver is busy.
kStatus_FLEXIO_UART_TxIdle UART transmitter is idle.
kStatus_FLEXIO_UART_RxIdle UART receiver is idle.
kStatus_FLEXIO_UART_ERROR ERROR happens on UART.
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kStatus_FLEXIO_UART_RxRingBufferOverrun UART RX software ring buffer overrun.
kStatus_FLEXIO_UART_RxHardwareOverrun UART RX receiver overrun.

enum flexio_uart_bit_count_per_char_t

22.7.7.2

Enumerator
kFLEXIO_UART_7BitsPerChar 7-bit data characters
kFLEXIO_UART_8BitsPerChar 8-bit data characters
kFLEXIO_UART_9BitsPerChar 9-bit data characters

enum _flexio_uart_interrupt_enable

22.7.7.3

Enumerator
kFLEXIO_UART_TxDataRegEmptyInterruptEnable Transmit buffer empty interrupt enable.
kFLEXIO_UART_RxDataRegFullInterruptEnable Receive buffer full interrupt enable.

enum _flexio_uart_status_flags

22.7.7.4

Enumerator
kFLEXIO_UART_TxDataRegEmptyFlag Transmit buffer empty flag.
kFLEXIO_UART_RxDataRegFullFlag Receive buffer full flag.
kFLEXIO_UART_RxOverRunFlag Receive buffer over run flag.

22.7.8
22.7.8.1

Function Documentation
void FLEXIO_UART_Init ( FLEXIO_UART_Type ∗ base, const
flexio_uart_config_t ∗ userConfig, uint32_t srcClock_Hz )

The configuration structure can be filled by the user, or be set with default values by FLEXIO_UART_GetDefaultConfig().
Example
FLEXIO_UART_Type base = {
.flexioBase = FLEXIO,
.TxPinIndex = 0,
.RxPinIndex = 1,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_uart_config_t config = {
.enableInDoze = false,

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.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 115200U,
.bitCountPerChar = 8
};
FLEXIO_UART_Init(base, &config, srcClock_Hz);

Parameters
base
userConfig
srcClock_Hz

22.7.8.2

Pointer to the FLEXIO_UART_Type structure.
Pointer to the flexio_uart_config_t structure.
FlexIO source clock in Hz.

void FLEXIO_UART_Deinit ( FLEXIO_UART_Type ∗ base )

Note
After calling this API, call the FLEXO_UART_Init to use the FlexIO UART module.
Parameters
base

22.7.8.3

pointer to FLEXIO_UART_Type structure

void FLEXIO_UART_GetDefaultConfig ( flexio_uart_config_t ∗ userConfig )

The configuration can be used directly for calling the FLEXIO_UART_Init(). Example:
flexio_uart_config_t config;
FLEXIO_UART_GetDefaultConfig(&userConfig);

Parameters
userConfig

22.7.8.4

Pointer to the flexio_uart_config_t structure.

uint32_t FLEXIO_UART_GetStatusFlags ( FLEXIO_UART_Type ∗ base )

Parameters

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base

Pointer to the FLEXIO_UART_Type structure.

Returns
FlexIO UART status flags.

22.7.8.5

void FLEXIO_UART_ClearStatusFlags ( FLEXIO_UART_Type ∗ base, uint32_t
mask )

Parameters

22.7.8.6

base

Pointer to the FLEXIO_UART_Type structure.

mask

Status flag. The parameter can be any combination of the following values:
• kFLEXIO_UART_TxDataRegEmptyFlag
• kFLEXIO_UART_RxEmptyFlag
• kFLEXIO_UART_RxOverRunFlag

void FLEXIO_UART_EnableInterrupts ( FLEXIO_UART_Type ∗ base, uint32_t
mask )

This function enables the FlexIO UART interrupt.
Parameters

22.7.8.7

base

Pointer to the FLEXIO_UART_Type structure.

mask

Interrupt source.

void FLEXIO_UART_DisableInterrupts ( FLEXIO_UART_Type ∗ base, uint32_t
mask )

This function disables the FlexIO UART interrupt.
Parameters

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22.7.8.8

base

Pointer to the FLEXIO_UART_Type structure.

mask

Interrupt source.

static uint32_t FLEXIO_UART_GetTxDataRegisterAddress (
FLEXIO_UART_Type ∗ base ) [inline], [static]

This function returns the UART data register address, which is mainly used by DMA/eDMA.
Parameters
base

Pointer to the FLEXIO_UART_Type structure.

Returns
FlexIO UART transmit data register address.

22.7.8.9

static uint32_t FLEXIO_UART_GetRxDataRegisterAddress (
FLEXIO_UART_Type ∗ base ) [inline], [static]

This function returns the UART data register address, which is mainly used by DMA/eDMA.
Parameters
base

Pointer to the FLEXIO_UART_Type structure.

Returns
FlexIO UART receive data register address.

22.7.8.10

static void FLEXIO_UART_EnableTxDMA ( FLEXIO_UART_Type ∗ base, bool
enable ) [inline], [static]

This function enables/disables the FlexIO UART Tx DMA, which means asserting the kFLEXIO_UART_TxDataRegEmptyFlag does/doesn’t trigger the DMA request.
Parameters

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base
enable

Pointer to the FLEXIO_UART_Type structure.
True to enable, false to disable.

static void FLEXIO_UART_EnableRxDMA ( FLEXIO_UART_Type ∗ base, bool
enable ) [inline], [static]

22.7.8.11

This function enables/disables the FlexIO UART Rx DMA, which means asserting kFLEXIO_UART_RxDataRegFullFlag does/doesn’t trigger the DMA request.
Parameters
base
enable

Pointer to the FLEXIO_UART_Type structure.
True to enable, false to disable.

static void FLEXIO_UART_Enable ( FLEXIO_UART_Type ∗ base, bool enable
) [inline], [static]

22.7.8.12

Parameters
base
enable

22.7.8.13

Pointer to the FLEXIO_UART_Type.
True to enable, false to disable.

static void FLEXIO_UART_WriteByte ( FLEXIO_UART_Type ∗ base, const
uint8_t ∗ buffer ) [inline], [static]

Note
This is a non-blocking API, which returns directly after the data is put into the data register. Ensure
that the TxEmptyFlag is asserted before calling this API.
Parameters
base
buffer

22.7.8.14

Pointer to the FLEXIO_UART_Type structure.
The data bytes to send.

static void FLEXIO_UART_ReadByte ( FLEXIO_UART_Type ∗ base, uint8_t ∗
buffer ) [inline], [static]

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FlexIO UART Driver
Note
This is a non-blocking API, which returns directly after the data is read from the data register. Ensure
that the RxFullFlag is asserted before calling this API.
Parameters
base
buffer

Pointer to the FLEXIO_UART_Type structure.
The buffer to store the received bytes.

void FLEXIO_UART_WriteBlocking ( FLEXIO_UART_Type ∗ base, const
uint8_t ∗ txData, size_t txSize )

22.7.8.15

Note
This function blocks using the polling method until all bytes have been sent.
Parameters
base
txData
txSize

Pointer to the FLEXIO_UART_Type structure.
The data bytes to send.
The number of data bytes to send.

void FLEXIO_UART_ReadBlocking ( FLEXIO_UART_Type ∗ base, uint8_t ∗
rxData, size_t rxSize )

22.7.8.16

Note
This function blocks using the polling method until all bytes have been received.
Parameters
base
rxData
rxSize

22.7.8.17

Pointer to the FLEXIO_UART_Type structure.
The buffer to store the received bytes.
The number of data bytes to be received.

status_t FLEXIO_UART_TransferCreateHandle ( FLEXIO_UART_Type ∗ base,
flexio_uart_handle_t ∗ handle, flexio_uart_transfer_callback_t callback, void ∗
userData )

This function initializes the FlexIO UART handle, which can be used for other FlexIO UART transactional
APIs. Call this API once to get the initialized handle.
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The UART driver supports the "background" receiving, which means that user can set up a RX ring buffer
optionally. Data received is stored into the ring buffer even when the user doesn’t call the FLEXIO_UART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, user can get the
received data from the ring buffer directly. The ring buffer is disabled if passing NULL as ringBuffer.
Parameters
base
handle
callback
userData

to FLEXIO_UART_Type structure.
Pointer to the flexio_uart_handle_t structure to store the transfer state.
The callback function.
The parameter of the callback function.

Return values
kStatus_Success
kStatus_OutOfRange

Successfully create the handle.
The FlexIO type/handle/ISR table out of range.

void FLEXIO_UART_TransferStartRingBuffer ( FLEXIO_UART_Type ∗ base,
flexio_uart_handle_t ∗ handle, uint8_t ∗ ringBuffer, size_t ringBufferSize )

22.7.8.18

This function sets up the RX ring buffer to a specific UART handle.
When the RX ring buffer is used, data received is stored into the ring buffer even when the user doesn’t
call the UART_ReceiveNonBlocking() API. If there are already data received in the ring buffer, user can
get the received data from the ring buffer directly.
Note
When using the RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, only 31 bytes are used for saving data.
Parameters
base
handle
ringBuffer
ringBufferSize

Pointer to the FLEXIO_UART_Type structure.
Pointer to the flexio_uart_handle_t structure to store the transfer state.
Start address of ring buffer for background receiving. Pass NULL to disable the ring
buffer.
Size of the ring buffer.

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22.7.8.19

void FLEXIO_UART_StopRingBuffer ( FLEXIO_UART_Type ∗ base,
flexio_uart_handle_t ∗ handle )

This function aborts the background transfer and uninstalls the ring buffer.

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Parameters
base
handle

Pointer to the FLEXIO_UART_Type structure.
Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferSendNonBlocking ( FLEXIO_UART_Type ∗
base, flexio_uart_handle_t ∗ handle, flexio_uart_transfer_t ∗ xfer )

22.7.8.20

This function sends data using an interrupt method. This is a non-blocking function, which returns directly
without waiting for all data to be written to the TX register. When all data are written to TX register in
ISR, the FlexIO UART driver calls the callback function and passes the kStatus_FLEXIO_UART_TxIdle
as status parameter.
Note
The kStatus_FLEXIO_UART_TxIdle is passed to the upper layer when all data is written to the TX
register. However, it does not ensure that all data is sent out.
Parameters
base
handle
xfer

Pointer to the FLEXIO_UART_Type structure.
Pointer to the flexio_uart_handle_t structure to store the transfer state.
FlexIO UART transfer structure. See flexio_uart_transfer_t.

Return values
kStatus_Success
kStatus_UART_TxBusy

Successfully starts the data transmission.
Previous transmission still not finished, data not written to the TX register.

void FLEXIO_UART_TransferAbortSend ( FLEXIO_UART_Type ∗ base,
flexio_uart_handle_t ∗ handle )

22.7.8.21

This function aborts the interrupt-driven data sending. Get the remainBytes to know how many bytes are
still not sent out.
Parameters
base
handle

Pointer to the FLEXIO_UART_Type structure.
Pointer to the flexio_uart_handle_t structure to store the transfer state.

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22.7.8.22

status_t FLEXIO_UART_TransferGetSendCount ( FLEXIO_UART_Type ∗
base, flexio_uart_handle_t ∗ handle, size_t ∗ count )

This function gets the number of remaining bytes not sent driven by interrupt.

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Parameters
base
handle
count

Pointer to the FLEXIO_UART_Type structure.
Pointer to the flexio_uart_handle_t structure to store the transfer state.
Number of bytes sent so far by the non-blocking transaction.

Return values
kStatus_InvalidArgument
kStatus_Success

count is Invalid.
Successfully return the count.

status_t FLEXIO_UART_TransferReceiveNonBlocking ( FLEXIO_UART_Type
∗ base, flexio_uart_handle_t ∗ handle, flexio_uart_transfer_t ∗ xfer, size_t ∗

22.7.8.23

receivedBytes )

This function receives data using the interrupt method. This is a non-blocking function, which returns
without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in ring
buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring
buffer. After copying, if the data in ring buffer is not enough to read, the receive request is saved by the
UART driver. When new data arrives, the receive request is serviced first. When all data is received, the
UART driver notifies the upper layer through a callback function and passes the status parameter kStatus_UART_RxIdle. For example, if the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer,
the 5 bytes are copied to xfer->data. This function returns with the parameter receivedBytes set to
5. For the last 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the
UART driver notifies upper layer. If the RX ring buffer is not enabled, this function enables the RX and
RX interrupt to receive data to xfer->data. When all data is received, the upper layer is notified.
Parameters
base
handle
xfer
receivedBytes

Pointer to the FLEXIO_UART_Type structure.
Pointer to the flexio_uart_handle_t structure to store the transfer state.
UART transfer structure. See flexio_uart_transfer_t.
Bytes received from the ring buffer directly.

Return values
kStatus_Success
kStatus_FLEXIO_UART_RxBusy

Successfully queue the transfer into the transmit queue.
Previous receive request is not finished.

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22.7.8.24

void FLEXIO_UART_TransferAbortReceive ( FLEXIO_UART_Type ∗ base,
flexio_uart_handle_t ∗ handle )

This function aborts the receive data which was using IRQ.

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Parameters
base
handle

Pointer to the FLEXIO_UART_Type structure.
Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferGetReceiveCount ( FLEXIO_UART_Type ∗
base, flexio_uart_handle_t ∗ handle, size_t ∗ count )

22.7.8.25

This function gets the number of remaining bytes not received driven by interrupt.
Parameters
base
handle
count

Pointer to the FLEXIO_UART_Type structure.
Pointer to the flexio_uart_handle_t structure to store the transfer state.
Number of bytes received so far by the non-blocking transaction.

Return values
kStatus_InvalidArgument
kStatus_Success

22.7.8.26

count is Invalid.
Successfully return the count.

void FLEXIO_UART_TransferHandleIRQ ( void ∗ uartType, void ∗ uartHandle )

This function processes the FlexIO UART transmit and receives the IRQ request.
Parameters
uartType
uartHandle

Pointer to the FLEXIO_UART_Type structure.
Pointer to the flexio_uart_handle_t structure to store the transfer state.

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Chapter 23
FTM: FlexTimer Driver
23.1

Overview

The KSDK provides a driver for the FlexTimer Module (FTM) of Kinetis devices.

23.2

Function groups

The FTM driver supports the generation of PWM signals, input capture, dual edge capture, output compare, and quadrature decoder modes. The driver also supports configuring each of the FTM fault inputs.

23.2.1

Initialization and deinitialization

The function FTM_Init() initializes the FTM with specified configurations. The function FTM_GetDefaultConfig() gets the default configurations. The initialization function configures the FTM for the
requested register update mode for registers with buffers. It also sets up the FTM’s fault operation mode
and FTM behavior in BDM mode.

23.2.2

PWM Operations

The function FTM_SetupPwm() sets up FTM channels for PWM output. The function can set up the PWM signal properties for multiple channels. Each channel has its own duty cycle and level-mode specified.
However, the same PWM period and PWM mode is applied to all channels requesting the PWM output.
The signal duty cycle is provided as a percentage of the PWM period. Its value should be between 0 and
100 0=inactive signal(0% duty cycle) and 100=always active signal (100% duty cycle).
The function FTM_UpdatePwmDutycycle() updates the PWM signal duty cycle of a particular FTM channel.
The function FTM_UpdateChnlEdgeLevelSelect() updates the level select bits of a particular FTM channel. This can be used to disable the PWM output when making changes to the PWM signal.

23.2.3

Input capture operations

The function FTM_SetupInputCapture() sets up an FTM channel for input capture. The user can specify
the capture edge and a filter value to be used when processing the input signal.
The function FTM_SetupDualEdgeCapture() can be used to measure the pulse width of a signal. A channel
pair is used during capture with the input signal coming through a channel n. The user can specify whether

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to use one-shot or continuous capture, the capture edge for each channel, and any filter value to be used
when processing the input signal.

23.2.4

Output compare operations

The function FTM_SetupOutputCompare() sets up an FTM channel for output compare. The user can
specify the channel output on a successful comparison and a comparison value.

23.2.5

Quad decode

The function FTM_SetupQuadDecode() sets up FTM channels 0 and 1 for quad decoding. The user can
specify the quad decoding mode, polarity, and filter properties for each input signal.

23.2.6

Fault operation

The function FTM_SetupFault() sets up the properties for each fault. The user can specify the fault polarity
and whether to use a filter on a fault input. The overall fault filter value and fault control mode are set up
during initialization.

23.3

Register Update

Some of the FTM registers have buffers. The driver support various methods to update these registers with
the content of the register buffer. The registers can be updated using the PWM synchronized loading or an
intermediate point loading. The update mechanism for register with buffers can be specified through the
following fields available in the configuration structure.
uint32_t pwmSyncMode;
uint32_t reloadPoints;

Multiple PWM synchronization update modes can be used by providing an OR’ed list of options available
in the enumeration ftm_pwm_sync_method_t to the pwmSyncMode field.
When using an intermediate reload points, the PWM synchnronization is not required. Multiple reload
points can be used by providing an OR’ed list of options available in the enumeration ftm_reload_point_t
to the reloadPoints field.
The driver initialization function sets up the appropriate bits in the FTM module based on the register
update options selected.
If software PWM synchronization is used, the below function can be used to initiate a software trigger
FTM_SetSoftwareTrigger(FTM0, true)

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23.4

Typical use case

23.4.1

PWM output

Output a PWM signal on 2 FTM channels with different duty cycles. Periodically update the PWM signal
duty cycle.
int main(void)
{
bool brightnessUp = true; /* Indicates whether LEDs are brighter or dimmer.
ftm_config_t ftmInfo;
uint8_t updatedDutycycle = 0U;
ftm_chnl_pwm_signal_param_t ftmParam[2];
/* Configure ftm params with frequency 24kHZ
ftmParam[0].chnlNumber = (ftm_chnl_t)BOARD_FIRST_FTM_CHANNEL;
ftmParam[0].level = kFTM_LowTrue;
ftmParam[0].dutyCyclePercent = 0U;
ftmParam[0].firstEdgeDelayPercent = 0U;
ftmParam[1].chnlNumber = (ftm_chnl_t)BOARD_SECOND_FTM_CHANNEL;
ftmParam[1].level = kFTM_LowTrue;
ftmParam[1].dutyCyclePercent = 0U;
ftmParam[1].firstEdgeDelayPercent = 0U;
FTM_GetDefaultConfig(&ftmInfo);
/* Initializes the FTM module.
FTM_Init(BOARD_FTM_BASEADDR, &ftmInfo);
FTM_SetupPwm(BOARD_FTM_BASEADDR, ftmParam, 2U, kFTM_EdgeAlignedPwm, 24000U, FTM_SOURCE_CLOCK);
FTM_StartTimer(BOARD_FTM_BASEADDR, kFTM_SystemClock);
while (1)
{
/* Delays to see the change of LEDs brightness.
delay();
if (brightnessUp)
{
/* Increases the duty cycle until it reaches a limited value.
if (++updatedDutycycle == 100U)
{
brightnessUp = false;
}
}
else
{
/* Decreases the duty cycle until it reaches a limited value.
if (--updatedDutycycle == 0U)
{
brightnessUp = true;
}
}
/* Starts the PWM mode with an updated duty cycle.
FTM_UpdatePwmDutycycle(BOARD_FTM_BASEADDR, (ftm_chnl_t)BOARD_FIRST_FTM_CHANNEL,
kFTM_EdgeAlignedPwm,
updatedDutycycle);
FTM_UpdatePwmDutycycle(BOARD_FTM_BASEADDR, (ftm_chnl_t)BOARD_SECOND_FTM_CHANNEL,
kFTM_EdgeAlignedPwm,
updatedDutycycle);
/* Software trigger to update registers.
FTM_SetSoftwareTrigger(BOARD_FTM_BASEADDR, true);
}
}

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Files
• file fsl_ftm.h

Data Structures
• struct ftm_chnl_pwm_signal_param_t
Options to configure a FTM channel’s PWM signal. More...

• struct ftm_dual_edge_capture_param_t
FlexTimer dual edge capture parameters. More...

• struct ftm_phase_params_t
FlexTimer quadrature decode phase parameters. More...

• struct ftm_fault_param_t
Structure is used to hold the parameters to configure a FTM fault. More...

• struct ftm_config_t
FTM configuration structure. More...

Enumerations
• enum ftm_chnl_t {
kFTM_Chnl_0 = 0U,
kFTM_Chnl_1,
kFTM_Chnl_2,
kFTM_Chnl_3,
kFTM_Chnl_4,
kFTM_Chnl_5,
kFTM_Chnl_6,
kFTM_Chnl_7 }
List of FTM channels.

• enum ftm_fault_input_t {
kFTM_Fault_0 = 0U,
kFTM_Fault_1,
kFTM_Fault_2,
kFTM_Fault_3 }
List of FTM faults.

• enum ftm_pwm_mode_t {
kFTM_EdgeAlignedPwm = 0U,
kFTM_CenterAlignedPwm,
kFTM_CombinedPwm }
FTM PWM operation modes.

• enum ftm_pwm_level_select_t {
kFTM_NoPwmSignal = 0U,
kFTM_LowTrue,
kFTM_HighTrue }
FTM PWM output pulse mode: high-true, low-true or no output.

• enum ftm_output_compare_mode_t {
kFTM_NoOutputSignal = (1U << FTM_CnSC_MSA_SHIFT),
kFTM_ToggleOnMatch = ((1U << FTM_CnSC_MSA_SHIFT) | (1U << FTM_CnSC_ELSA_SKinetis SDK v.2.0 API Reference Manual
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HIFT)),
kFTM_ClearOnMatch = ((1U << FTM_CnSC_MSA_SHIFT) | (2U << FTM_CnSC_ELSA_SHIFT)),
kFTM_SetOnMatch = ((1U << FTM_CnSC_MSA_SHIFT) | (3U << FTM_CnSC_ELSA_SHIFT)) }
FlexTimer output compare mode.

• enum ftm_input_capture_edge_t {
kFTM_RisingEdge = (1U << FTM_CnSC_ELSA_SHIFT),
kFTM_FallingEdge = (2U << FTM_CnSC_ELSA_SHIFT),
kFTM_RiseAndFallEdge = (3U << FTM_CnSC_ELSA_SHIFT) }
FlexTimer input capture edge.

• enum ftm_dual_edge_capture_mode_t {
kFTM_OneShot = 0U,
kFTM_Continuous = (1U << FTM_CnSC_MSA_SHIFT) }
FlexTimer dual edge capture modes.

• enum ftm_quad_decode_mode_t {
kFTM_QuadPhaseEncode = 0U,
kFTM_QuadCountAndDir }
FlexTimer quadrature decode modes.

• enum ftm_phase_polarity_t {
kFTM_QuadPhaseNormal = 0U,
kFTM_QuadPhaseInvert }
FlexTimer quadrature phase polarities.

• enum ftm_deadtime_prescale_t {
kFTM_Deadtime_Prescale_1 = 1U,
kFTM_Deadtime_Prescale_4,
kFTM_Deadtime_Prescale_16 }
FlexTimer pre-scaler factor for the dead time insertion.

• enum ftm_clock_source_t {
kFTM_SystemClock = 1U,
kFTM_FixedClock,
kFTM_ExternalClock }
FlexTimer clock source selection.

• enum ftm_clock_prescale_t {
kFTM_Prescale_Divide_1 = 0U,
kFTM_Prescale_Divide_2,
kFTM_Prescale_Divide_4,
kFTM_Prescale_Divide_8,
kFTM_Prescale_Divide_16,
kFTM_Prescale_Divide_32,
kFTM_Prescale_Divide_64,
kFTM_Prescale_Divide_128 }
FlexTimer pre-scaler factor selection for the clock source.

• enum ftm_bdm_mode_t {
kFTM_BdmMode_0 = 0U,
kFTM_BdmMode_1,
kFTM_BdmMode_2,
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kFTM_BdmMode_3 }
Options for the FlexTimer behaviour in BDM Mode.

• enum ftm_fault_mode_t {
kFTM_Fault_Disable = 0U,
kFTM_Fault_EvenChnls,
kFTM_Fault_AllChnlsMan,
kFTM_Fault_AllChnlsAuto }
Options for the FTM fault control mode.

• enum ftm_external_trigger_t {
kFTM_Chnl0Trigger = (1U << 4),
kFTM_Chnl1Trigger = (1U << 5),
kFTM_Chnl2Trigger = (1U << 0),
kFTM_Chnl3Trigger = (1U << 1),
kFTM_Chnl4Trigger = (1U << 2),
kFTM_Chnl5Trigger = (1U << 3),
kFTM_Chnl6Trigger,
kFTM_Chnl7Trigger,
kFTM_InitTrigger = (1U << 6),
kFTM_ReloadInitTrigger = (1U << 7) }
FTM external trigger options.

• enum ftm_pwm_sync_method_t {
kFTM_SoftwareTrigger = FTM_SYNC_SWSYNC_MASK,
kFTM_HardwareTrigger_0 = FTM_SYNC_TRIG0_MASK,
kFTM_HardwareTrigger_1 = FTM_SYNC_TRIG1_MASK,
kFTM_HardwareTrigger_2 = FTM_SYNC_TRIG2_MASK }
FlexTimer PWM sync options to update registers with buffer.

• enum ftm_reload_point_t {
kFTM_Chnl0Match = (1U << 0),
kFTM_Chnl1Match = (1U << 1),
kFTM_Chnl2Match = (1U << 2),
kFTM_Chnl3Match = (1U << 3),
kFTM_Chnl4Match = (1U << 4),
kFTM_Chnl5Match = (1U << 5),
kFTM_Chnl6Match = (1U << 6),
kFTM_Chnl7Match = (1U << 7),
kFTM_CntMax = (1U << 8),
kFTM_CntMin = (1U << 9),
kFTM_HalfCycMatch = (1U << 10) }
FTM options available as loading point for register reload.

• enum ftm_interrupt_enable_t {

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kFTM_Chnl0InterruptEnable = (1U << 0),
kFTM_Chnl1InterruptEnable = (1U << 1),
kFTM_Chnl2InterruptEnable = (1U << 2),
kFTM_Chnl3InterruptEnable = (1U << 3),
kFTM_Chnl4InterruptEnable = (1U << 4),
kFTM_Chnl5InterruptEnable = (1U << 5),
kFTM_Chnl6InterruptEnable = (1U << 6),
kFTM_Chnl7InterruptEnable = (1U << 7),
kFTM_FaultInterruptEnable = (1U << 8),
kFTM_TimeOverflowInterruptEnable = (1U << 9),
kFTM_ReloadInterruptEnable = (1U << 10) }
List of FTM interrupts.

• enum ftm_status_flags_t {
kFTM_Chnl0Flag = (1U << 0),
kFTM_Chnl1Flag = (1U << 1),
kFTM_Chnl2Flag = (1U << 2),
kFTM_Chnl3Flag = (1U << 3),
kFTM_Chnl4Flag = (1U << 4),
kFTM_Chnl5Flag = (1U << 5),
kFTM_Chnl6Flag = (1U << 6),
kFTM_Chnl7Flag = (1U << 7),
kFTM_FaultFlag = (1U << 8),
kFTM_TimeOverflowFlag = (1U << 9),
kFTM_ChnlTriggerFlag = (1U << 10),
kFTM_ReloadFlag = (1U << 11) }
List of FTM flags.

Functions
• void FTM_SetupQuadDecode (FTM_Type ∗base, const ftm_phase_params_t ∗phaseAParams,
const ftm_phase_params_t ∗phaseBParams, ftm_quad_decode_mode_t quadMode)
Configures the parameters and activates the quadrature decoder mode.

• void FTM_SetupFault (FTM_Type ∗base, ftm_fault_input_t faultNumber, const ftm_fault_param_t
∗faultParams)
Sets up the working of the FTM fault protection.

• static void FTM_SetGlobalTimeBaseOutputEnable (FTM_Type ∗base, bool enable)
Enables or disables the FTM global time base signal generation to other FTMs.

• static void FTM_SetOutputMask (FTM_Type ∗base, ftm_chnl_t chnlNumber, bool mask)
Sets the FTM peripheral timer channel output mask.

• static void FTM_SetSoftwareTrigger (FTM_Type ∗base, bool enable)
Enables or disables the FTM software trigger for PWM synchronization.

• static void FTM_SetWriteProtection (FTM_Type ∗base, bool enable)
Enables or disables the FTM write protection.

Driver version
• #define FSL_FTM_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
Version 2.0.0.

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Initialization and deinitialization
• status_t FTM_Init (FTM_Type ∗base, const ftm_config_t ∗config)
Ungates the FTM clock and configures the peripheral for basic operation.

• void FTM_Deinit (FTM_Type ∗base)
Gates the FTM clock.

• void FTM_GetDefaultConfig (ftm_config_t ∗config)
Fills in the FTM configuration structure with the default settings.

Channel mode operations
• status_t FTM_SetupPwm (FTM_Type ∗base, const ftm_chnl_pwm_signal_param_t ∗chnlParams,
uint8_t numOfChnls, ftm_pwm_mode_t mode, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz)
Configures the PWM signal parameters.

• void FTM_UpdatePwmDutycycle (FTM_Type ∗base, ftm_chnl_t chnlNumber, ftm_pwm_mode_t
currentPwmMode, uint8_t dutyCyclePercent)
Updates the duty cycle of an active PWM signal.

• void FTM_UpdateChnlEdgeLevelSelect (FTM_Type ∗base, ftm_chnl_t chnlNumber, uint8_t level)
Updates the edge level selection for a channel.

• void FTM_SetupInputCapture (FTM_Type ∗base, ftm_chnl_t chnlNumber, ftm_input_capture_edge_t captureMode, uint32_t filterValue)
Enables capturing an input signal on the channel using the function parameters.

• void FTM_SetupOutputCompare (FTM_Type ∗base, ftm_chnl_t chnlNumber, ftm_output_compare_mode_t compareMode, uint32_t compareValue)
Configures the FTM to generate timed pulses.

• void FTM_SetupDualEdgeCapture (FTM_Type ∗base, ftm_chnl_t chnlPairNumber, const ftm_dual_edge_capture_param_t ∗edgeParam, uint32_t filterValue)
Configures the dual edge capture mode of the FTM.

Interrupt Interface
• void FTM_EnableInterrupts (FTM_Type ∗base, uint32_t mask)
Enables the selected FTM interrupts.

• void FTM_DisableInterrupts (FTM_Type ∗base, uint32_t mask)
Disables the selected FTM interrupts.

• uint32_t FTM_GetEnabledInterrupts (FTM_Type ∗base)
Gets the enabled FTM interrupts.

Status Interface
• uint32_t FTM_GetStatusFlags (FTM_Type ∗base)
Gets the FTM status flags.

• void FTM_ClearStatusFlags (FTM_Type ∗base, uint32_t mask)
Clears the FTM status flags.

Timer Start and Stop
• static void FTM_StartTimer (FTM_Type ∗base, ftm_clock_source_t clockSource)
Starts the FTM counter.

• static void FTM_StopTimer (FTM_Type ∗base)
Stops the FTM counter.

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Software output control
• static void FTM_SetSoftwareCtrlEnable (FTM_Type ∗base, ftm_chnl_t chnlNumber, bool value)
Enables or disables the channel software output control.

• static void FTM_SetSoftwareCtrlVal (FTM_Type ∗base, ftm_chnl_t chnlNumber, bool value)
Sets the channel software output control value.

Channel pair operations
• static void FTM_SetFaultControlEnable (FTM_Type ∗base, ftm_chnl_t chnlPairNumber, bool
value)
This function enables/disables the fault control in a channel pair.

• static void FTM_SetDeadTimeEnable (FTM_Type ∗base, ftm_chnl_t chnlPairNumber, bool value)
This function enables/disables the dead time insertion in a channel pair.

• static void FTM_SetComplementaryEnable (FTM_Type ∗base, ftm_chnl_t chnlPairNumber, bool
value)
This function enables/disables complementary mode in a channel pair.

• static void FTM_SetInvertEnable (FTM_Type ∗base, ftm_chnl_t chnlPairNumber, bool value)
This function enables/disables inverting control in a channel pair.

23.5
23.5.1

Data Structure Documentation
struct ftm_chnl_pwm_signal_param_t

Data Fields
• ftm_chnl_t chnlNumber
The channel/channel pair number.

• ftm_pwm_level_select_t level
PWM output active level select.

• uint8_t dutyCyclePercent
PWM pulse width, value should be between 0 to 100 0 = inactive signal(0% duty cycle)...

• uint8_t firstEdgeDelayPercent
Used only in combined PWM mode to generate an asymmetrical PWM.
23.5.1.0.0.14

Field Documentation

23.5.1.0.0.14.1 ftm_chnl_t ftm_chnl_pwm_signal_param_t::chnlNumber

In combined mode, this represents the channel pair number.
23.5.1.0.0.14.2 ftm_pwm_level_select_t ftm_chnl_pwm_signal_param_t::level
23.5.1.0.0.14.3

uint8_t ftm_chnl_pwm_signal_param_t::dutyCyclePercent

100 = always active signal (100% duty cycle).

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23.5.1.0.0.14.4

uint8_t ftm_chnl_pwm_signal_param_t::firstEdgeDelayPercent

Specifies the delay to the first edge in a PWM period. If unsure leave as 0; Should be specified as a
percentage of the PWM period

23.5.2

struct ftm_dual_edge_capture_param_t

Data Fields
• ftm_dual_edge_capture_mode_t mode
Dual Edge Capture mode.

• ftm_input_capture_edge_t currChanEdgeMode
Input capture edge select for channel n.

• ftm_input_capture_edge_t nextChanEdgeMode
Input capture edge select for channel n+1.

23.5.3

struct ftm_phase_params_t

Data Fields
• bool enablePhaseFilter
True: enable phase filter; false: disable filter.

• uint32_t phaseFilterVal
Filter value, used only if phase filter is enabled.

• ftm_phase_polarity_t phasePolarity
Phase polarity.

23.5.4

struct ftm_fault_param_t

Data Fields
• bool enableFaultInput
True: Fault input is enabled; false: Fault input is disabled.

• bool faultLevel
True: Fault polarity is active low i.e ’0’ indicates a fault; False: Fault polarity is active high.

• bool useFaultFilter
True: Use the filtered fault signal; False: Use the direct path from fault input.

23.5.5

struct ftm_config_t

This structure holds the configuration settings for the FTM peripheral. To initialize this structure to reasonable defaults, call the FTM_GetDefaultConfig() function and pass a pointer to the configuration structure
instance.
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The configuration structure can be made constant so as to reside in flash.

Data Fields
• ftm_clock_prescale_t prescale
FTM clock prescale value.

• ftm_bdm_mode_t bdmMode
FTM behavior in BDM mode.

• uint32_t pwmSyncMode
Synchronization methods to use to update buffered registers; Multiple update modes can be used by providing an OR’ed list of options available in enumeration ftm_pwm_sync_method_t.

• uint32_t reloadPoints
FTM reload points; When using this, the PWM synchronization is not required.

• ftm_fault_mode_t faultMode
FTM fault control mode.

• uint8_t faultFilterValue
Fault input filter value.

• ftm_deadtime_prescale_t deadTimePrescale
The dead time prescalar value.

• uint8_t deadTimeValue
The dead time value.

• uint32_t extTriggers
External triggers to enable.

• uint8_t chnlInitState
Defines the initialization value of the channels in OUTINT register.

• uint8_t chnlPolarity
Defines the output polarity of the channels in POL register.

• bool useGlobalTimeBase
True: Use of an external global time base is enabled; False: disabled.
23.5.5.0.0.15

Field Documentation

23.5.5.0.0.15.1

uint32_t ftm_config_t::pwmSyncMode

23.5.5.0.0.15.2

uint32_t ftm_config_t::reloadPoints

Multiple reload points can be used by providing an OR’ed list of options available in enumeration ftm_reload_point_t.
23.5.5.0.0.15.3

uint32_t ftm_config_t::extTriggers

Multiple trigger sources can be enabled by providing an OR’ed list of options available in enumeration
ftm_external_trigger_t.

23.6
23.6.1

Enumeration Type Documentation
enum ftm_chnl_t

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Note
Actual number of available channels is SoC dependent
Enumerator
kFTM_Chnl_0
kFTM_Chnl_1
kFTM_Chnl_2
kFTM_Chnl_3
kFTM_Chnl_4
kFTM_Chnl_5
kFTM_Chnl_6
kFTM_Chnl_7

23.6.2

FTM channel number 0.
FTM channel number 1.
FTM channel number 2.
FTM channel number 3.
FTM channel number 4.
FTM channel number 5.
FTM channel number 6.
FTM channel number 7.

enum ftm_fault_input_t

Enumerator
kFTM_Fault_0
kFTM_Fault_1
kFTM_Fault_2
kFTM_Fault_3

23.6.3

FTM fault 0 input pin.
FTM fault 1 input pin.
FTM fault 2 input pin.
FTM fault 3 input pin.

enum ftm_pwm_mode_t

Enumerator
kFTM_EdgeAlignedPwm Edge-aligned PWM.
kFTM_CenterAlignedPwm Center-aligned PWM.
kFTM_CombinedPwm Combined PWM.

23.6.4

enum ftm_pwm_level_select_t

Enumerator
kFTM_NoPwmSignal No PWM output on pin.
kFTM_LowTrue Low true pulses.
kFTM_HighTrue High true pulses.

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23.6.5

enum ftm_output_compare_mode_t

Enumerator
kFTM_NoOutputSignal No channel output when counter reaches CnV.
kFTM_ToggleOnMatch Toggle output.
kFTM_ClearOnMatch Clear output.
kFTM_SetOnMatch Set output.

23.6.6

enum ftm_input_capture_edge_t

Enumerator
kFTM_RisingEdge Capture on rising edge only.
kFTM_FallingEdge Capture on falling edge only.
kFTM_RiseAndFallEdge Capture on rising or falling edge.

23.6.7

enum ftm_dual_edge_capture_mode_t

Enumerator
kFTM_OneShot One-shot capture mode.
kFTM_Continuous Continuous capture mode.

23.6.8

enum ftm_quad_decode_mode_t

Enumerator
kFTM_QuadPhaseEncode Phase A and Phase B encoding mode.
kFTM_QuadCountAndDir Count and direction encoding mode.

23.6.9

enum ftm_phase_polarity_t

Enumerator
kFTM_QuadPhaseNormal Phase input signal is not inverted.
kFTM_QuadPhaseInvert Phase input signal is inverted.

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23.6.10

enum ftm_deadtime_prescale_t

Enumerator
kFTM_Deadtime_Prescale_1 Divide by 1.
kFTM_Deadtime_Prescale_4 Divide by 4.
kFTM_Deadtime_Prescale_16 Divide by 16.

23.6.11

enum ftm_clock_source_t

Enumerator
kFTM_SystemClock System clock selected.
kFTM_FixedClock Fixed frequency clock.
kFTM_ExternalClock External clock.

23.6.12

enum ftm_clock_prescale_t

Enumerator
kFTM_Prescale_Divide_1 Divide by 1.
kFTM_Prescale_Divide_2 Divide by 2.
kFTM_Prescale_Divide_4 Divide by 4.
kFTM_Prescale_Divide_8 Divide by 8.
kFTM_Prescale_Divide_16 Divide by 16.
kFTM_Prescale_Divide_32 Divide by 32.
kFTM_Prescale_Divide_64 Divide by 64.
kFTM_Prescale_Divide_128 Divide by 128.

23.6.13

enum ftm_bdm_mode_t

Enumerator
kFTM_BdmMode_0 FTM counter stopped, CH(n)F bit can be set, FTM channels in functional
mode, writes to MOD,CNTIN and C(n)V registers bypass the register buffers.
kFTM_BdmMode_1 FTM counter stopped, CH(n)F bit is not set, FTM channels outputs are forced
to their safe value , writes to MOD,CNTIN and C(n)V registers bypass the register buffers.
kFTM_BdmMode_2 FTM counter stopped, CH(n)F bit is not set, FTM channels outputs are frozen
when chip enters in BDM mode, writes to MOD,CNTIN and C(n)V registers bypass the register
buffers.
kFTM_BdmMode_3 FTM counter in functional mode, CH(n)F bit can be set, FTM channels in
functional mode, writes to MOD,CNTIN and C(n)V registers is in fully functional mode.

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23.6.14

enum ftm_fault_mode_t

Enumerator
kFTM_Fault_Disable Fault control is disabled for all channels.
kFTM_Fault_EvenChnls Enabled for even channels only(0,2,4,6) with manual fault clearing.
kFTM_Fault_AllChnlsMan Enabled for all channels with manual fault clearing.
kFTM_Fault_AllChnlsAuto Enabled for all channels with automatic fault clearing.

23.6.15

enum ftm_external_trigger_t

Note
Actual available external trigger sources are SoC-specific
Enumerator
kFTM_Chnl0Trigger Generate trigger when counter equals chnl 0 CnV reg.
kFTM_Chnl1Trigger Generate trigger when counter equals chnl 1 CnV reg.
kFTM_Chnl2Trigger Generate trigger when counter equals chnl 2 CnV reg.
kFTM_Chnl3Trigger Generate trigger when counter equals chnl 3 CnV reg.
kFTM_Chnl4Trigger Generate trigger when counter equals chnl 4 CnV reg.
kFTM_Chnl5Trigger Generate trigger when counter equals chnl 5 CnV reg.
kFTM_Chnl6Trigger Available on certain SoC’s, generate trigger when counter equals chnl 6 CnV
reg.
kFTM_Chnl7Trigger Available on certain SoC’s, generate trigger when counter equals chnl 7 CnV
reg.
kFTM_InitTrigger Generate Trigger when counter is updated with CNTIN.
kFTM_ReloadInitTrigger Available on certain SoC’s, trigger on reload point.

23.6.16

enum ftm_pwm_sync_method_t

Enumerator
kFTM_SoftwareTrigger Software triggers PWM sync.
kFTM_HardwareTrigger_0 Hardware trigger 0 causes PWM sync.
kFTM_HardwareTrigger_1 Hardware trigger 1 causes PWM sync.
kFTM_HardwareTrigger_2 Hardware trigger 2 causes PWM sync.

23.6.17

enum ftm_reload_point_t

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Note
Actual available reload points are SoC-specific
Enumerator
kFTM_Chnl0Match Channel 0 match included as a reload point.
kFTM_Chnl1Match Channel 1 match included as a reload point.
kFTM_Chnl2Match Channel 2 match included as a reload point.
kFTM_Chnl3Match Channel 3 match included as a reload point.
kFTM_Chnl4Match Channel 4 match included as a reload point.
kFTM_Chnl5Match Channel 5 match included as a reload point.
kFTM_Chnl6Match Channel 6 match included as a reload point.
kFTM_Chnl7Match Channel 7 match included as a reload point.
kFTM_CntMax Use in up-down count mode only, reload when counter reaches the maximum value.
kFTM_CntMin Use in up-down count mode only, reload when counter reaches the minimum value.
kFTM_HalfCycMatch Available on certain SoC’s, half cycle match reload point.

23.6.18

enum ftm_interrupt_enable_t

Note
Actual available interrupts are SoC-specific
Enumerator
kFTM_Chnl0InterruptEnable Channel 0 interrupt.
kFTM_Chnl1InterruptEnable Channel 1 interrupt.
kFTM_Chnl2InterruptEnable Channel 2 interrupt.
kFTM_Chnl3InterruptEnable Channel 3 interrupt.
kFTM_Chnl4InterruptEnable Channel 4 interrupt.
kFTM_Chnl5InterruptEnable Channel 5 interrupt.
kFTM_Chnl6InterruptEnable Channel 6 interrupt.
kFTM_Chnl7InterruptEnable Channel 7 interrupt.
kFTM_FaultInterruptEnable Fault interrupt.
kFTM_TimeOverflowInterruptEnable Time overflow interrupt.
kFTM_ReloadInterruptEnable Reload interrupt; Available only on certain SoC’s.

23.6.19

enum ftm_status_flags_t

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Note
Actual available flags are SoC-specific
Enumerator
kFTM_Chnl0Flag Channel 0 Flag.
kFTM_Chnl1Flag Channel 1 Flag.
kFTM_Chnl2Flag Channel 2 Flag.
kFTM_Chnl3Flag Channel 3 Flag.
kFTM_Chnl4Flag Channel 4 Flag.
kFTM_Chnl5Flag Channel 5 Flag.
kFTM_Chnl6Flag Channel 6 Flag.
kFTM_Chnl7Flag Channel 7 Flag.
kFTM_FaultFlag Fault Flag.
kFTM_TimeOverflowFlag Time overflow Flag.
kFTM_ChnlTriggerFlag Channel trigger Flag.
kFTM_ReloadFlag Reload Flag; Available only on certain SoC’s.

23.7

Function Documentation

23.7.1

status_t FTM_Init ( FTM_Type ∗ base, const ftm_config_t ∗ config )

Note
This API should be called at the beginning of the application using the FTM driver.
Parameters
base
config

FTM peripheral base address
Pointer to the user configuration structure.

Returns
kStatus_Success indicates success; Else indicates failure.

23.7.2

void FTM_Deinit ( FTM_Type ∗ base )

Parameters

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base

23.7.3

FTM peripheral base address

void FTM_GetDefaultConfig ( ftm_config_t ∗ config )

The default values are:
config->prescale = kFTM_Prescale_Divide_1;
config->bdmMode = kFTM_BdmMode_0;
config->pwmSyncMode = kFTM_SoftwareTrigger;
config->reloadPoints = 0;
config->faultMode = kFTM_Fault_Disable;
config->faultFilterValue = 0;
config->deadTimePrescale = kFTM_Deadtime_Prescale_1;
config->deadTimeValue = 0;
config->extTriggers = 0;
config->chnlInitState = 0;
config->chnlPolarity = 0;
config->useGlobalTimeBase = false;

Parameters
config

23.7.4

Pointer to the user configuration structure.

status_t FTM_SetupPwm ( FTM_Type ∗ base, const ftm_chnl_pwm_signal_param_t ∗ chnlParams, uint8_t numOfChnls, ftm_pwm_mode_t mode,
uint32_t pwmFreq_Hz, uint32_t srcClock_Hz )

Call this function to configure the PWM signal period, mode, duty cycle, and edge. Use this function to
configure all FTM channels that are used to output a PWM signal.
Parameters
base
chnlParams
numOfChnls
mode
pwmFreq_Hz

FTM peripheral base address
Array of PWM channel parameters to configure the channel(s)
Number of channels to configure; This should be the size of the array passed in
PWM operation mode, options available in enumeration ftm_pwm_mode_t
PWM signal frequency in Hz

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srcClock_Hz

FTM counter clock in Hz

Returns
kStatus_Success if the PWM setup was successful kStatus_Error on failure

23.7.5

void FTM_UpdatePwmDutycycle ( FTM_Type ∗ base, ftm_chnl_t
chnlNumber, ftm_pwm_mode_t currentPwmMode, uint8_t
dutyCyclePercent )

Parameters
base
chnlNumber
currentPwmMode
dutyCyclePercent

23.7.6

FTM peripheral base address
The channel/channel pair number. In combined mode, this represents the channel pair
number
The current PWM mode set during PWM setup
New PWM pulse width; The value should be between 0 to 100 0=inactive signal(0%
duty cycle)... 100=active signal (100% duty cycle)

void FTM_UpdateChnlEdgeLevelSelect ( FTM_Type ∗ base, ftm_chnl_t
chnlNumber, uint8_t level )

Parameters
base
chnlNumber
level

23.7.7

FTM peripheral base address
The channel number
The level to be set to the ELSnB:ELSnA field; Valid values are 00, 01, 10, 11. See
the Kinetis SoC reference manual for details about this field.

void FTM_SetupInputCapture ( FTM_Type ∗ base, ftm_chnl_t chnlNumber,
ftm_input_capture_edge_t captureMode, uint32_t filterValue )

When the edge specified in the captureMode argument occurs on the channel, the FTM counter is captured
into the CnV register. The user has to read the CnV register separately to get this value. The filter function
is disabled if the filterVal argument passed in is 0. The filter function is available only for channels 0, 1, 2,
3.
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Parameters
base
chnlNumber
captureMode
filterValue

23.7.8

FTM peripheral base address
The channel number
Specifies which edge to capture
Filter value, specify 0 to disable filter. Available only for channels 0-3.

void FTM_SetupOutputCompare ( FTM_Type ∗ base, ftm_chnl_t
chnlNumber, ftm_output_compare_mode_t compareMode, uint32_t
compareValue )

When the FTM counter matches the value of compareVal argument (this is written into CnV reg), the
channel output is changed based on what is specified in the compareMode argument.
Parameters
base
chnlNumber

FTM peripheral base address
The channel number

compareMode

Action to take on the channel output when the compare condition is met

compareValue

Value to be programmed in the CnV register.

23.7.9

void FTM_SetupDualEdgeCapture ( FTM_Type ∗ base, ftm_chnl_t
chnlPairNumber, const ftm_dual_edge_capture_param_t ∗ edgeParam,
uint32_t filterValue )

This function sets up the dual edge capture mode on a channel pair. The capture edge for the channel pair
and the capture mode (one-shot or continuous) is specified in the parameter argument. The filter function
is disabled if the filterVal argument passed is zero. The filter function is available only on channels 0 and
2. The user has to read the channel CnV registers separately to get the capture values.
Parameters
base
chnlPairNumber

FTM peripheral base address
The FTM channel pair number; options are 0, 1, 2, 3

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edgeParam
filterValue

23.7.10

Sets up the dual edge capture function
Filter value, specify 0 to disable filter. Available only for channel pair 0 and 1.

void FTM_SetupQuadDecode ( FTM_Type ∗ base, const
ftm_phase_params_t ∗ phaseAParams, const ftm_phase_params_t ∗
phaseBParams, ftm_quad_decode_mode_t quadMode )

Parameters
base

FTM peripheral base address

phaseAParams

Phase A configuration parameters

phaseBParams

Phase B configuration parameters

quadMode

23.7.11

Selects encoding mode used in quadrature decoder mode

void FTM_SetupFault ( FTM_Type ∗ base, ftm_fault_input_t faultNumber,
const ftm_fault_param_t ∗ faultParams )

FTM can have up to 4 fault inputs. This function sets up fault parameters, fault level, and a filter.
Parameters
base

FTM peripheral base address

faultNumber

FTM fault to configure.

faultParams

Parameters passed in to set up the fault

23.7.12

void FTM_EnableInterrupts ( FTM_Type ∗ base, uint32_t mask )

Parameters

23.7.13

base

FTM peripheral base address

mask

The interrupts to enable. This is a logical OR of members of the enumeration ftm_interrupt_enable_t

void FTM_DisableInterrupts ( FTM_Type ∗ base, uint32_t mask )

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Parameters

23.7.14

base

FTM peripheral base address

mask

The interrupts to enable. This is a logical OR of members of the enumeration ftm_interrupt_enable_t

uint32_t FTM_GetEnabledInterrupts ( FTM_Type ∗ base )

Parameters
base

FTM peripheral base address

Returns
The enabled interrupts. This is the logical OR of members of the enumeration ftm_interrupt_enable_t

23.7.15

uint32_t FTM_GetStatusFlags ( FTM_Type ∗ base )

Parameters
base

FTM peripheral base address

Returns
The status flags. This is the logical OR of members of the enumeration ftm_status_flags_t

23.7.16

void FTM_ClearStatusFlags ( FTM_Type ∗ base, uint32_t mask )

Parameters
base

FTM peripheral base address

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mask

23.7.17

The status flags to clear. This is a logical OR of members of the enumeration ftm_status_flags_t

static void FTM_StartTimer ( FTM_Type ∗ base, ftm_clock_source_t
clockSource ) [inline], [static]

Parameters
base
clockSource

23.7.18

FTM peripheral base address
FTM clock source; After the clock source is set, the counter starts running.

static void FTM_StopTimer ( FTM_Type ∗ base ) [inline], [static]

Parameters
base

23.7.19

FTM peripheral base address

static void FTM_SetSoftwareCtrlEnable ( FTM_Type ∗ base, ftm_chnl_t
chnlNumber, bool value ) [inline], [static]

Parameters
base
chnlNumber
value

23.7.20

FTM peripheral base address
Channel to be enabled or disabled
true: channel output is affected by software output control false: channel output is
unaffected by software output control

static void FTM_SetSoftwareCtrlVal ( FTM_Type ∗ base, ftm_chnl_t
chnlNumber, bool value ) [inline], [static]

Parameters
base

FTM peripheral base address.

chnlNumber

Channel to be configured

value

true to set 1, false to set 0

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23.7.21

static void FTM_SetGlobalTimeBaseOutputEnable ( FTM_Type ∗ base,
bool enable ) [inline], [static]

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Parameters
base

FTM peripheral base address

enable

true to enable, false to disable

23.7.22

static void FTM_SetOutputMask ( FTM_Type ∗ base, ftm_chnl_t
chnlNumber, bool mask ) [inline], [static]

Parameters
base
chnlNumber
mask

23.7.23

FTM peripheral base address
Channel to be configured
true: masked, channel is forced to its inactive state; false: unmasked

static void FTM_SetFaultControlEnable ( FTM_Type ∗ base, ftm_chnl_t
chnlPairNumber, bool value ) [inline], [static]

Parameters
base
chnlPairNumber
value

23.7.24

FTM peripheral base address
The FTM channel pair number; options are 0, 1, 2, 3
true: Enable fault control for this channel pair; false: No fault control

static void FTM_SetDeadTimeEnable ( FTM_Type ∗ base, ftm_chnl_t
chnlPairNumber, bool value ) [inline], [static]

Parameters
base
chnlPairNumber

FTM peripheral base address
The FTM channel pair number; options are 0, 1, 2, 3

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value

true: Insert dead time in this channel pair; false: No dead time inserted

static void FTM_SetComplementaryEnable ( FTM_Type ∗ base, ftm_chnl_t
chnlPairNumber, bool value ) [inline], [static]

23.7.25

Parameters
base
chnlPairNumber
value

FTM peripheral base address
The FTM channel pair number; options are 0, 1, 2, 3
true: enable complementary mode; false: disable complementary mode

static void FTM_SetInvertEnable ( FTM_Type ∗ base, ftm_chnl_t
chnlPairNumber, bool value ) [inline], [static]

23.7.26

Parameters
base
chnlPairNumber
value

FTM peripheral base address
The FTM channel pair number; options are 0, 1, 2, 3
true: enable inverting; false: disable inverting

static void FTM_SetSoftwareTrigger ( FTM_Type ∗ base, bool enable )
[inline], [static]

23.7.27

Parameters
base
enable

23.7.28

FTM peripheral base address
true: software trigger is selected, false: software trigger is not selected

static void FTM_SetWriteProtection ( FTM_Type ∗ base, bool enable )
[inline], [static]

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Parameters
base
enable

FTM peripheral base address
true: Write-protection is enabled, false: Write-protection is disabled

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Chapter 24
GPIO: General-Purpose Input/Output Driver
24.1 Overview
Modules
• FGPIO Driver
• GPIO Driver

Files
• file fsl_gpio.h

Data Structures
• struct gpio_pin_config_t
The GPIO pin configuration structure. More...

Enumerations
• enum gpio_pin_direction_t {
kGPIO_DigitalInput = 0U,
kGPIO_DigitalOutput = 1U }
GPIO direction definition.

Driver version
• #define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
GPIO driver version 2.1.0.

24.2
24.2.1

Data Structure Documentation
struct gpio_pin_config_t

Every pin can only be configured as either output pin or input pin at a time. If configured as a input
pin, then leave the outputConfig unused Note : In some cases, the corresponding port property should be
configured in advance with the PORT_SetPinConfig()

Data Fields
• gpio_pin_direction_t pinDirection
gpio direction, input or output

• uint8_t outputLogic
Set default output logic, no use in input.

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24.3
24.3.1

24.4
24.4.1

Macro Definition Documentation
#define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

Enumeration Type Documentation
enum gpio_pin_direction_t

Enumerator
kGPIO_DigitalInput Set current pin as digital input.
kGPIO_DigitalOutput Set current pin as digital output.

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GPIO Driver

24.5

GPIO Driver

24.5.1

Overview

The KSDK provides a peripheral driver for the General-Purpose Input/Output (GPIO) module of Kinetis
devices.

24.5.2
24.5.2.1

Typical use case
Output Operation

/* Output pin configuration
gpio_pin_config_t led_config =
{
kGpioDigitalOutput,
1,
};
/* Sets the configuration
GPIO_PinInit(GPIO_LED, LED_PINNUM, &led_config);

24.5.2.2

Input Operation

/* Input pin configuration
PORT_SetPinInterruptConfig(BOARD_SW2_PORT, BOARD_SW2_GPIO_PIN, kPORT_InterruptFallingEdge);
NVIC_EnableIRQ(BOARD_SW2_IRQ);
gpio_pin_config_t sw1_config =
{
kGpioDigitalInput,
0,
};
/* Sets the input pin configuration
GPIO_PinInit(GPIO_SW1, SW1_PINNUM, &sw1_config);

GPIO Configuration
• void GPIO_PinInit (GPIO_Type ∗base, uint32_t pin, const gpio_pin_config_t ∗config)
Initializes a GPIO pin used by the board.

GPIO Output Operations
• static void GPIO_WritePinOutput (GPIO_Type ∗base, uint32_t pin, uint8_t output)
Sets the output level of one GPIO pin to the logic 1 or 0.

• static void GPIO_SetPinsOutput (GPIO_Type ∗base, uint32_t mask)
Sets the output level of the multiple GPIO pins to the logic 1.

• static void GPIO_ClearPinsOutput (GPIO_Type ∗base, uint32_t mask)
Sets the output level of the multiple GPIO pins to the logic 0.

• static void GPIO_TogglePinsOutput (GPIO_Type ∗base, uint32_t mask)
Reverses current output logic of the multiple GPIO pins.

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GPIO Input Operations
• static uint32_t GPIO_ReadPinInput (GPIO_Type ∗base, uint32_t pin)
Reads the current input value of the specified GPIO pin.

GPIO Interrupt
• uint32_t GPIO_GetPinsInterruptFlags (GPIO_Type ∗base)
Reads whole GPIO port interrupt status flag.

• void GPIO_ClearPinsInterruptFlags (GPIO_Type ∗base, uint32_t mask)
Clears multiple GPIO pins’ interrupt status flag.

24.5.3

Function Documentation
void GPIO_PinInit ( GPIO_Type ∗ base, uint32_t pin, const gpio_pin_config_t ∗
config )

24.5.3.1

To initialize the GPIO, define a pin configuration, either input or output, in the user file. Then, call the
GPIO_PinInit() function.
This is an example to define an input pin or output pin configuration:
// Define a digital input pin configuration,
gpio_pin_config_t config =
{
kGPIO_DigitalInput,
0,
}
//Define a digital output pin configuration,
gpio_pin_config_t config =
{
kGPIO_DigitalOutput,
0,
}

Parameters
base
pin
config

24.5.3.2

GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
GPIO port pin number
GPIO pin configuration pointer

static void GPIO_WritePinOutput ( GPIO_Type ∗ base, uint32_t pin, uint8_t
output ) [inline], [static]

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Parameters
base
pin
output

24.5.3.3

GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
GPIO pin’s number
GPIO pin output logic level.
• 0: corresponding pin output low logic level.
• 1: corresponding pin output high logic level.

static void GPIO_SetPinsOutput ( GPIO_Type ∗ base, uint32_t mask )
[inline], [static]

Parameters

24.5.3.4

base

GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)

mask

GPIO pins’ numbers macro

static void GPIO_ClearPinsOutput ( GPIO_Type ∗ base, uint32_t mask )
[inline], [static]

Parameters

24.5.3.5

base

GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)

mask

GPIO pins’ numbers macro

static void GPIO_TogglePinsOutput ( GPIO_Type ∗ base, uint32_t mask )
[inline], [static]

Parameters

24.5.3.6

base

GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)

mask

GPIO pins’ numbers macro

static uint32_t GPIO_ReadPinInput ( GPIO_Type ∗ base, uint32_t pin )
[inline], [static]

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Parameters
base
pin

GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
GPIO pin’s number

Return values
GPIO

24.5.3.7

port input value
• 0: corresponding pin input low logic level.
• 1: corresponding pin input high logic level.

uint32_t GPIO_GetPinsInterruptFlags ( GPIO_Type ∗ base )

If a pin is configured to generate the DMA request, the corresponding flag is cleared automatically at the
completion of the requested DMA transfer. Otherwise, the flag remains set until a logic one is written to
that flag. If configured for a level sensitive interrupt that remains asserted, the flag is set again immediately.
Parameters
base

GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)

Return values
Current

24.5.3.8

GPIO port interrupt status flag, for example, 0x00010001 means the pin 0
and 17 have the interrupt.

void GPIO_ClearPinsInterruptFlags ( GPIO_Type ∗ base, uint32_t mask )

Parameters
base

GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)

mask

GPIO pins’ numbers macro

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24.6

FGPIO Driver

This chapter describes the programming interface of the FGPIO driver. The FGPIO driver configures the
FGPIO module and provides a functional interface to build the GPIO application.
Note
FGPIO (Fast GPIO) is only available in a few MCUs. FGPIO and GPIO share the same peripheral
but use different registers. FGPIO is closer to the core than the regular GPIO and it’s faster to read
and write.

24.6.1
24.6.1.1

Typical use case
Output Operation

/* Output pin configuration
gpio_pin_config_t led_config =
{
kGpioDigitalOutput,
1,
};
/* Sets the configuration
FGPIO_PinInit(FGPIO_LED, LED_PINNUM, &led_config);

24.6.1.2

Input Operation

/* Input pin configuration
PORT_SetPinInterruptConfig(BOARD_SW2_PORT, BOARD_SW2_FGPIO_PIN, kPORT_InterruptFallingEdge);
NVIC_EnableIRQ(BOARD_SW2_IRQ);
gpio_pin_config_t sw1_config =
{
kGpioDigitalInput,
0,
};
/* Sets the input pin configuration
FGPIO_PinInit(FGPIO_SW1, SW1_PINNUM, &sw1_config);

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Chapter 25
I2C: Inter-Integrated Circuit Driver
25.1

Overview

Modules
•
•
•
•
•
•

I2C DMA Driver
I2C Driver
I2C FreeRTOS Driver
I2C eDMA Driver
I2C µCOS/II Driver
I2C µCOS/III Driver

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25.2

I2C Driver

25.2.1

Overview

The KSDK provides a peripheral driver for the Inter-Integrated Circuit (I2C) module of Kinetis devices.

25.2.2

Overview

The I2C driver includes functional APIs and transactional APIs.
Functional APIs are feature/property target low level APIs. Functional APIs can be used for the I2C master/slave initialization/configuration/operation for optimization/customization purpose. Using the
functional APIs requires the knowledge of the I2C master peripheral and how to organize functional APIs
to meet the application requirements. The I2C functional operation groups provide the functional APIs
set.
Transactional APIs are transaction target high level APIs. The transactional APIs can be used to enable
the peripheral quickly and also in the application if the code size and performance of transactional APIs
satisfy the requirements. If the code size and performance are critical requirements, see the transactional
API implementation and write custom code using the functional APIs or accessing the hardware registers.
Transactional APIs support asynchronous transfer. This means that the functions I2C_MasterTransferNonBlocking() set up the interrupt non-blocking transfer. When the transfer completes, the upper layer is
notified through a callback function with the status.

25.2.3
25.2.3.1

Typical use case
Master Operation in functional method

i2c_master_config_t masterConfig;
uint8_t status;
status_t result = kStatus_Success;
uint8_t txBuff[BUFFER_SIZE];
/* Get default configuration for master.
I2C_MasterGetDefaultConfig(&masterConfig);
/* Init I2C master.
I2C_MasterInit(EXAMPLE_I2C_MASTER_BASEADDR, &masterConfig, I2C_MASTER_CLK);
/* Send start and slave address.
I2C_MasterStart(EXAMPLE_I2C_MASTER_BASEADDR, 7-bit slave address, kI2C_Write/kI2C_Read);
/* Wait address sent out.
while(!((status = I2C_GetStatusFlag(EXAMPLE_I2C_MASTER_BASEADDR)) & kI2C_IntPendingFlag))
{
}
if(status & kI2C_ReceiveNakFlag)
{
return kStatus_I2C_Nak;
}

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result = I2C_MasterWriteBlocking(EXAMPLE_I2C_MASTER_BASEADDR, txBuff, BUFFER_SIZE);
if(result)
{
/* If error occours, send STOP.
I2C_MasterStop(EXAMPLE_I2C_MASTER_BASEADDR, kI2CStop);
return result;
}
while(!(I2C_GetStatusFlag(EXAMPLE_I2C_MASTER_BASEADDR) & kI2C_IntPendingFlag))
{
}
/* Wait all data sent out, send STOP.
I2C_MasterStop(EXAMPLE_I2C_MASTER_BASEADDR, kI2CStop);

25.2.3.2

Master Operation in interrupt transactional method

i2c_master_handle_t g_m_handle;
volatile bool g_MasterCompletionFlag = false;
i2c_master_config_t masterConfig;
uint8_t status;
status_t result = kStatus_Success;
uint8_t txBuff[BUFFER_SIZE];
i2c_master_transfer_t masterXfer;
static void i2c_master_callback(I2C_Type *base, i2c_master_handle_t *handle, status_t status, void *
userData)
{
/* Signal transfer success when received success status.
if (status == kStatus_Success)
{
g_MasterCompletionFlag = true;
}
}
/* Get default configuration for master.
I2C_MasterGetDefaultConfig(&masterConfig);
/* Init I2C master.
I2C_MasterInit(EXAMPLE_I2C_MASTER_BASEADDR, &masterConfig, I2C_MASTER_CLK);
masterXfer.slaveAddress = I2C_MASTER_SLAVE_ADDR_7BIT;
masterXfer.direction = kI2C_Write;
masterXfer.subaddress = NULL;
masterXfer.subaddressSize = 0;
masterXfer.data = txBuff;
masterXfer.dataSize = BUFFER_SIZE;
masterXfer.flags = kI2C_TransferDefaultFlag;
I2C_MasterTransferCreateHandle(EXAMPLE_I2C_MASTER_BASEADDR, &g_m_handle, i2c_master_callback, NULL);
I2C_MasterTransferNonBlocking(EXAMPLE_I2C_MASTER_BASEADDR, &g_m_handle, &masterXfer);
/* Wait for transfer completed.
while (!g_MasterCompletionFlag)
{
}
g_MasterCompletionFlag = false;

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25.2.3.3

Master Operation in DMA transactional method

i2c_master_dma_handle_t g_m_dma_handle;
dma_handle_t dmaHandle;
volatile bool g_MasterCompletionFlag = false;
i2c_master_config_t masterConfig;
uint8_t txBuff[BUFFER_SIZE];
i2c_master_transfer_t masterXfer;
static void i2c_master_callback(I2C_Type *base, i2c_master_dma_handle_t *handle, status_t status, void *
userData)
{
/* Signal transfer success when received success status.
if (status == kStatus_Success)
{
g_MasterCompletionFlag = true;
}
}
/* Get default configuration for master.
I2C_MasterGetDefaultConfig(&masterConfig);
/* Init I2C master.
I2C_MasterInit(EXAMPLE_I2C_MASTER_BASEADDR, &masterConfig, I2C_MASTER_CLK);
masterXfer.slaveAddress = I2C_MASTER_SLAVE_ADDR_7BIT;
masterXfer.direction = kI2C_Write;
masterXfer.subaddress = NULL;
masterXfer.subaddressSize = 0;
masterXfer.data = txBuff;
masterXfer.dataSize = BUFFER_SIZE;
masterXfer.flags = kI2C_TransferDefaultFlag;
DMAMGR_RequestChannel((dma_request_source_t)DMA_REQUEST_SRC, 0, &dmaHandle);
I2C_MasterTransferCreateHandleDMA(EXAMPLE_I2C_MASTER_BASEADDR, &g_m_dma_handle, i2c_master_callback, NULL,
&dmaHandle);
I2C_MasterTransferDMA(EXAMPLE_I2C_MASTER_BASEADDR, &g_m_dma_handle, &masterXfer);
/* Wait for transfer completed.
while (!g_MasterCompletionFlag)
{
}
g_MasterCompletionFlag = false;

25.2.3.4

Slave Operation in functional method

i2c_slave_config_t slaveConfig;
uint8_t status;
status_t result = kStatus_Success;
I2C_SlaveGetDefaultConfig(&slaveConfig); /*default configuration 7-bit addressing
mode
slaveConfig.slaveAddr = 7-bit address
slaveConfig.addressingMode = kI2C_Address7bit/kI2C_RangeMatch;
I2C_SlaveInit(EXAMPLE_I2C_SLAVE_BASEADDR, &slaveConfig);
/* Wait address match.
while(!((status = I2C_GetStatusFlag(EXAMPLE_I2C_SLAVE_BASEADDR)) & kI2C_AddressMatchFlag))
{
}
/* Slave transmit, master reading from slave.
if (status & kI2C_TransferDirectionFlag)

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I2C Driver
{
result = I2C_SlaveWriteBlocking(EXAMPLE_I2C_SLAVE_BASEADDR);
}
else
{
I2C_SlaveReadBlocking(EXAMPLE_I2C_SLAVE_BASEADDR);
}
return result;

25.2.3.5

Slave Operation in interrupt transactional method

i2c_slave_config_t slaveConfig;
i2c_slave_handle_t g_s_handle;
volatile bool g_SlaveCompletionFlag = false;
static void i2c_slave_callback(I2C_Type *base, i2c_slave_transfer_t *xfer, void *
userData)
{
switch (xfer->event)
{
/* Transmit request
case kI2C_SlaveTransmitEvent:
/* Update information for transmit process
xfer->data = g_slave_buff;
xfer->dataSize = I2C_DATA_LENGTH;
break;
/* Receive request
case kI2C_SlaveReceiveEvent:
/* Update information for received process
xfer->data = g_slave_buff;
xfer->dataSize = I2C_DATA_LENGTH;
break;
/* Transfer done
case kI2C_SlaveCompletionEvent:
g_SlaveCompletionFlag = true;
break;
default:
g_SlaveCompletionFlag = true;
break;
}
}
I2C_SlaveGetDefaultConfig(&slaveConfig); /*default configuration 7-bit addressing mode
slaveConfig.slaveAddr = 7-bit address
slaveConfig.addressingMode = kI2C_Address7bit/kI2C_RangeMatch;
I2C_SlaveInit(EXAMPLE_I2C_SLAVE_BASEADDR, &slaveConfig);
I2C_SlaveTransferCreateHandle(EXAMPLE_I2C_SLAVE_BASEADDR, &g_s_handle, i2c_slave_callback, NULL);
I2C_SlaveTransferNonBlocking(EXAMPLE_I2C_SLAVE_BASEADDR, &g_s_handle, kI2C_SlaveCompletionEvent);
/* Wait for transfer completed.
while (!g_SlaveCompletionFlag)
{
}
g_SlaveCompletionFlag = false;

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Files
• file fsl_i2c.h

Data Structures
• struct i2c_master_config_t
I2C master user configuration. More...

• struct i2c_slave_config_t
I2C slave user configuration. More...

• struct i2c_master_transfer_t
I2C master transfer structure. More...

• struct i2c_master_handle_t
I2C master handle structure. More...

• struct i2c_slave_transfer_t
I2C slave transfer structure. More...

• struct i2c_slave_handle_t
I2C slave handle structure. More...

Typedefs
• typedef void(∗ i2c_master_transfer_callback_t )(I2C_Type ∗base, i2c_master_handle_t ∗handle,
status_t status, void ∗userData)
I2C master transfer callback typedef.

• typedef void(∗ i2c_slave_transfer_callback_t )(I2C_Type ∗base, i2c_slave_transfer_t ∗xfer, void
∗userData)
I2C slave transfer callback typedef.

Enumerations
• enum _i2c_status {
kStatus_I2C_Busy = MAKE_STATUS(kStatusGroup_I2C, 0),
kStatus_I2C_Idle = MAKE_STATUS(kStatusGroup_I2C, 1),
kStatus_I2C_Nak = MAKE_STATUS(kStatusGroup_I2C, 2),
kStatus_I2C_ArbitrationLost = MAKE_STATUS(kStatusGroup_I2C, 3),
kStatus_I2C_Timeout = MAKE_STATUS(kStatusGroup_I2C, 4) }
I2C status return codes.

• enum _i2c_flags {
kI2C_ReceiveNakFlag = I2C_S_RXAK_MASK,
kI2C_IntPendingFlag = I2C_S_IICIF_MASK,
kI2C_TransferDirectionFlag = I2C_S_SRW_MASK,
kI2C_RangeAddressMatchFlag = I2C_S_RAM_MASK,
kI2C_ArbitrationLostFlag = I2C_S_ARBL_MASK,
kI2C_BusBusyFlag = I2C_S_BUSY_MASK,
kI2C_AddressMatchFlag = I2C_S_IAAS_MASK,
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I2C Driver
kI2C_TransferCompleteFlag = I2C_S_TCF_MASK }
I2C peripheral flags.

• enum _i2c_interrupt_enable { kI2C_GlobalInterruptEnable = I2C_C1_IICIE_MASK }
I2C feature interrupt source.

• enum i2c_direction_t {
kI2C_Write = 0x0U,
kI2C_Read = 0x1U }
Direction of master and slave transfers.

• enum i2c_slave_address_mode_t {
kI2C_Address7bit = 0x0U,
kI2C_RangeMatch = 0X2U }
Addressing mode.

• enum _i2c_master_transfer_flags {
kI2C_TransferDefaultFlag = 0x0U,
kI2C_TransferNoStartFlag = 0x1U,
kI2C_TransferRepeatedStartFlag = 0x2U,
kI2C_TransferNoStopFlag = 0x4U }
I2C transfer control flag.

• enum i2c_slave_transfer_event_t {
kI2C_SlaveAddressMatchEvent = 0x01U,
kI2C_SlaveTransmitEvent = 0x02U,
kI2C_SlaveReceiveEvent = 0x04U,
kI2C_SlaveTransmitAckEvent = 0x08U,
kI2C_SlaveCompletionEvent = 0x20U,
kI2C_SlaveAllEvents }
Set of events sent to the callback for nonblocking slave transfers.

Driver version
• #define FSL_I2C_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
I2C driver version 2.0.0.

Initialization and deinitialization
• void I2C_MasterInit (I2C_Type ∗base, const i2c_master_config_t ∗masterConfig, uint32_t srcClock_Hz)
Initializes the I2C peripheral.

• void I2C_SlaveInit (I2C_Type ∗base, const i2c_slave_config_t ∗slaveConfig)
Initializes the I2C peripheral.

• void I2C_MasterDeinit (I2C_Type ∗base)
De-initializes the I2C master peripheral.

• void I2C_SlaveDeinit (I2C_Type ∗base)
De-initializes the I2C slave peripheral.

• void I2C_MasterGetDefaultConfig (i2c_master_config_t ∗masterConfig)
Sets the I2C master configuration structure to default values.

• void I2C_SlaveGetDefaultConfig (i2c_slave_config_t ∗slaveConfig)
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Sets the I2C slave configuration structure to default values.

• static void I2C_Enable (I2C_Type ∗base, bool enable)
Enables or disabless the I2C peripheral operation.

Status
• uint32_t I2C_MasterGetStatusFlags (I2C_Type ∗base)
Gets the I2C status flags.

• static uint32_t I2C_SlaveGetStatusFlags (I2C_Type ∗base)
Gets the I2C status flags.

• static void I2C_MasterClearStatusFlags (I2C_Type ∗base, uint32_t statusMask)
Clears the I2C status flag state.

• static void I2C_SlaveClearStatusFlags (I2C_Type ∗base, uint32_t statusMask)
Clears the I2C status flag state.

Interrupts
• void I2C_EnableInterrupts (I2C_Type ∗base, uint32_t mask)
Enables I2C interrupt requests.

• void I2C_DisableInterrupts (I2C_Type ∗base, uint32_t mask)
Disables I2C interrupt requests.

DMA Control
• static uint32_t I2C_GetDataRegAddr (I2C_Type ∗base)
Gets the I2C tx/rx data register address.

Bus Operations
• void I2C_MasterSetBaudRate (I2C_Type ∗base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)
Sets the I2C master transfer baud rate.

• status_t I2C_MasterStart (I2C_Type ∗base, uint8_t address, i2c_direction_t direction)
Sends a START on the I2C bus.

• status_t I2C_MasterStop (I2C_Type ∗base)
Sends a STOP signal on the I2C bus.

• status_t I2C_MasterRepeatedStart (I2C_Type ∗base, uint8_t address, i2c_direction_t direction)
Sends a REPEATED START on the I2C bus.

• status_t I2C_MasterWriteBlocking (I2C_Type ∗base, const uint8_t ∗txBuff, size_t txSize)
Performs a polling send transaction on the I2C bus without a STOP signal.

• status_t I2C_MasterReadBlocking (I2C_Type ∗base, uint8_t ∗rxBuff, size_t rxSize)
Performs a polling receive transaction on the I2C bus with a STOP signal.

• status_t I2C_SlaveWriteBlocking (I2C_Type ∗base, const uint8_t ∗txBuff, size_t txSize)
Performs a polling send transaction on the I2C bus.

• void I2C_SlaveReadBlocking (I2C_Type ∗base, uint8_t ∗rxBuff, size_t rxSize)
Performs a polling receive transaction on the I2C bus.

• status_t I2C_MasterTransferBlocking (I2C_Type ∗base, i2c_master_transfer_t ∗xfer)
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Performs a master polling transfer on the I2C bus.

Transactional
• void I2C_MasterTransferCreateHandle (I2C_Type ∗base, i2c_master_handle_t ∗handle, i2c_master_transfer_callback_t callback, void ∗userData)
Initializes the I2C handle which is used in transactional functions.

• status_t I2C_MasterTransferNonBlocking (I2C_Type ∗base, i2c_master_handle_t ∗handle, i2c_master_transfer_t ∗xfer)
Performs a master interrupt non-blocking transfer on the I2C bus.

• status_t I2C_MasterTransferGetCount (I2C_Type ∗base, i2c_master_handle_t ∗handle, size_t
∗count)
Gets the master transfer status during a interrupt non-blocking transfer.

• void I2C_MasterTransferAbort (I2C_Type ∗base, i2c_master_handle_t ∗handle)
Aborts an interrupt non-blocking transfer early.

• void I2C_MasterTransferHandleIRQ (I2C_Type ∗base, void ∗i2cHandle)
Master interrupt handler.

• void I2C_SlaveTransferCreateHandle (I2C_Type ∗base, i2c_slave_handle_t ∗handle, i2c_slave_transfer_callback_t callback, void ∗userData)
Initializes the I2C handle which is used in transactional functions.

• status_t I2C_SlaveTransferNonBlocking (I2C_Type ∗base, i2c_slave_handle_t ∗handle, uint32_t
eventMask)
Starts accepting slave transfers.

• void I2C_SlaveTransferAbort (I2C_Type ∗base, i2c_slave_handle_t ∗handle)
Aborts the slave transfer.

• status_t I2C_SlaveTransferGetCount (I2C_Type ∗base, i2c_slave_handle_t ∗handle, size_t ∗count)
Gets the slave transfer remaining bytes during a interrupt non-blocking transfer.

• void I2C_SlaveTransferHandleIRQ (I2C_Type ∗base, void ∗i2cHandle)
Slave interrupt handler.

25.2.4
25.2.4.1

Data Structure Documentation
struct i2c_master_config_t

Data Fields

• bool enableMaster
Enables the I2C peripheral at initialization time.

• uint32_t baudRate_Bps
Baud rate configuration of I2C peripheral.

• uint8_t glitchFilterWidth
Controls the width of the glitch.

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25.2.4.1.0.16

Field Documentation

25.2.4.1.0.16.1

bool i2c_master_config_t::enableMaster

25.2.4.1.0.16.2

uint32_t i2c_master_config_t::baudRate_Bps

25.2.4.1.0.16.3

uint8_t i2c_master_config_t::glitchFilterWidth

25.2.4.2

struct i2c_slave_config_t

Data Fields

• bool enableSlave
Enables the I2C peripheral at initialization time.

• bool enableGeneralCall
Enable general call addressing mode.

• bool enableWakeUp
Enables/disables waking up MCU from low power mode.

• bool enableBaudRateCtl
Enables/disables independent slave baud rate on SCL in very fast I2C modes.

• uint16_t slaveAddress
Slave address configuration.

• uint16_t upperAddress
Maximum boundary slave address used in range matching mode.

• i2c_slave_address_mode_t addressingMode
Addressing mode configuration of i2c_slave_address_mode_config_t.
25.2.4.2.0.17

Field Documentation

25.2.4.2.0.17.1

bool i2c_slave_config_t::enableSlave

25.2.4.2.0.17.2

bool i2c_slave_config_t::enableGeneralCall

25.2.4.2.0.17.3

bool i2c_slave_config_t::enableWakeUp

25.2.4.2.0.17.4

bool i2c_slave_config_t::enableBaudRateCtl

25.2.4.2.0.17.5

uint16_t i2c_slave_config_t::slaveAddress

25.2.4.2.0.17.6

uint16_t i2c_slave_config_t::upperAddress

25.2.4.2.0.17.7 i2c_slave_address_mode_t i2c_slave_config_t::addressingMode

25.2.4.3

struct i2c_master_transfer_t

Data Fields

• uint32_t flags
Transfer flag which controls the transfer.

• uint8_t slaveAddress
7-bit slave address.

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• i2c_direction_t direction
Transfer direction, read or write.

• uint32_t subaddress
Sub address.

• uint8_t subaddressSize
Size of command buffer.

• uint8_t ∗volatile data
Transfer buffer.

• volatile size_t dataSize
Transfer size.
25.2.4.3.0.18

Field Documentation

25.2.4.3.0.18.1

uint32_t i2c_master_transfer_t::flags

25.2.4.3.0.18.2

uint8_t i2c_master_transfer_t::slaveAddress

25.2.4.3.0.18.3 i2c_direction_t i2c_master_transfer_t::direction
25.2.4.3.0.18.4

uint32_t i2c_master_transfer_t::subaddress

Transferred MSB first.
25.2.4.3.0.18.5

uint8_t i2c_master_transfer_t::subaddressSize

25.2.4.3.0.18.6

uint8_t∗ volatile i2c_master_transfer_t::data

25.2.4.3.0.18.7

volatile size_t i2c_master_transfer_t::dataSize

25.2.4.4

struct _i2c_master_handle

I2C master handle typedef.
Data Fields

• i2c_master_transfer_t transfer
I2C master transfer copy.

• size_t transferSize
Total bytes to be transferred.

• uint8_t state
Transfer state maintained during transfer.

• i2c_master_transfer_callback_t completionCallback
Callback function called when transfer finished.

• void ∗ userData
Callback parameter passed to callback function.

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25.2.4.4.0.19

Field Documentation

25.2.4.4.0.19.1 i2c_master_transfer_t i2c_master_handle_t::transfer
25.2.4.4.0.19.2

size_t i2c_master_handle_t::transferSize

25.2.4.4.0.19.3

uint8_t i2c_master_handle_t::state

25.2.4.4.0.19.4 i2c_master_transfer_callback_t i2c_master_handle_t::completionCallback
25.2.4.4.0.19.5

25.2.4.5

void∗ i2c_master_handle_t::userData

struct i2c_slave_transfer_t

Data Fields

• i2c_slave_transfer_event_t event
Reason the callback is being invoked.

• uint8_t ∗volatile data
Transfer buffer.

• volatile size_t dataSize
Transfer size.

• status_t completionStatus
Success or error code describing how the transfer completed.

• size_t transferredCount
Number of bytes actually transferred since start or last repeated start.
25.2.4.5.0.20

Field Documentation

25.2.4.5.0.20.1 i2c_slave_transfer_event_t i2c_slave_transfer_t::event
25.2.4.5.0.20.2

uint8_t∗ volatile i2c_slave_transfer_t::data

25.2.4.5.0.20.3

volatile size_t i2c_slave_transfer_t::dataSize

25.2.4.5.0.20.4

status_t i2c_slave_transfer_t::completionStatus

Only applies for kI2C_SlaveCompletionEvent.
25.2.4.5.0.20.5

25.2.4.6

size_t i2c_slave_transfer_t::transferredCount

struct _i2c_slave_handle

I2C slave handle typedef.
Data Fields

• bool isBusy
Whether transfer is busy.

• i2c_slave_transfer_t transfer
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I2C slave transfer copy.

• uint32_t eventMask
Mask of enabled events.

• i2c_slave_transfer_callback_t callback
Callback function called at transfer event.

• void ∗ userData
Callback parameter passed to callback.
25.2.4.6.0.21
25.2.4.6.0.21.1

Field Documentation
bool i2c_slave_handle_t::isBusy

25.2.4.6.0.21.2 i2c_slave_transfer_t i2c_slave_handle_t::transfer
25.2.4.6.0.21.3

uint32_t i2c_slave_handle_t::eventMask

25.2.4.6.0.21.4 i2c_slave_transfer_callback_t i2c_slave_handle_t::callback
25.2.4.6.0.21.5

25.2.5

Macro Definition Documentation
#define FSL_I2C_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

25.2.5.1

25.2.6

void∗ i2c_slave_handle_t::userData

Typedef Documentation

25.2.6.1

typedef void(∗ i2c_master_transfer_callback_t)(I2C_Type ∗base,
i2c_master_handle_t ∗handle, status_t status, void ∗userData)

25.2.6.2

typedef void(∗ i2c_slave_transfer_callback_t)(I2C_Type ∗base,
i2c_slave_transfer_t ∗xfer, void ∗userData)

25.2.7

Enumeration Type Documentation

25.2.7.1

enum _i2c_status

Enumerator
kStatus_I2C_Busy I2C is busy with current transfer.
kStatus_I2C_Idle Bus is Idle.
kStatus_I2C_Nak NAK received during transfer.
kStatus_I2C_ArbitrationLost Arbitration lost during transfer.
kStatus_I2C_Timeout Wait event timeout.

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25.2.7.2

enum _i2c_flags

The following status register flags can be cleared:
•
•
•
•

kI2C_ArbitrationLostFlag
kI2C_IntPendingFlag
#kI2C_StartDetectFlag
#kI2C_StopDetectFlag

Note
These enumerations are meant to be OR’d together to form a bit mask.
Enumerator
kI2C_ReceiveNakFlag I2C receive NAK flag.
kI2C_IntPendingFlag I2C interrupt pending flag.
kI2C_TransferDirectionFlag I2C transfer direction flag.
kI2C_RangeAddressMatchFlag I2C range address match flag.
kI2C_ArbitrationLostFlag I2C arbitration lost flag.
kI2C_BusBusyFlag I2C bus busy flag.
kI2C_AddressMatchFlag I2C address match flag.
kI2C_TransferCompleteFlag I2C transfer complete flag.

25.2.7.3

enum _i2c_interrupt_enable

Enumerator
kI2C_GlobalInterruptEnable I2C global interrupt.

25.2.7.4

enum i2c_direction_t

Enumerator
kI2C_Write Master transmit to slave.
kI2C_Read Master receive from slave.

25.2.7.5

enum i2c_slave_address_mode_t

Enumerator
kI2C_Address7bit 7-bit addressing mode.
kI2C_RangeMatch Range address match addressing mode.

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enum _i2c_master_transfer_flags

25.2.7.6

Enumerator
kI2C_TransferDefaultFlag Transfer starts with a start signal, stops with a stop signal.
kI2C_TransferNoStartFlag Transfer starts without a start signal.
kI2C_TransferRepeatedStartFlag Transfer starts with a repeated start signal.
kI2C_TransferNoStopFlag Transfer ends without a stop signal.

enum i2c_slave_transfer_event_t

25.2.7.7

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together
events is passed to I2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then,
when the slave callback is invoked, it is passed the current event through its transfer parameter.
Note
These enumerations are meant to be OR’d together to form a bit mask of events.
Enumerator
kI2C_SlaveAddressMatchEvent Received the slave address after a start or repeated start.
kI2C_SlaveTransmitEvent Callback is requested to provide data to transmit (slave-transmitter role).
kI2C_SlaveReceiveEvent Callback is requested to provide a buffer in which to place received data
(slave-receiver role).
kI2C_SlaveTransmitAckEvent Callback needs to either transmit an ACK or NACK.
kI2C_SlaveCompletionEvent A stop was detected or finished transfer, completing the transfer.
kI2C_SlaveAllEvents Bit mask of all available events.

25.2.8
25.2.8.1

Function Documentation
void I2C_MasterInit ( I2C_Type ∗ base, const i2c_master_config_t ∗
masterConfig, uint32_t srcClock_Hz )

Call this API to ungate the I2C clock and configure the I2C with master configuration.
Note
This API should be called at the beginning of the application to use the I2C driver, or any operation
to the I2C module could cause hard fault because clock is not enabled. The configuration structure
can be filled by user from scratch, or be set with default values by I2C_MasterGetDefaultConfig().
After calling this API, the master is ready to transfer. Example:

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I2C Driver
i2c_master_config_t config = {
.enableMaster = true,
.enableStopHold = false,
.highDrive = false,
.baudRate_Bps = 100000,
.glitchFilterWidth = 0
};
I2C_MasterInit(I2C0, &config, 12000000U);

Parameters
base

I2C base pointer

masterConfig

pointer to master configuration structure

srcClock_Hz

I2C peripheral clock frequency in Hz

25.2.8.2

void I2C_SlaveInit ( I2C_Type ∗ base, const i2c_slave_config_t ∗ slaveConfig )

Call this API to ungate the I2C clock and initializes the I2C with slave configuration.
Note
This API should be called at the beginning of the application to use the I2C driver, or any operation to
the I2C module can cause a hard fault because the clock is not enabled. The configuration structure
can partly be set with default values by I2C_SlaveGetDefaultConfig(), or can be filled by the user.
Example
i2c_slave_config_t config = {
.enableSlave = true,
.enableGeneralCall = false,
.addressingMode = kI2C_Address7bit,
.slaveAddress = 0x1DU,
.enableWakeUp = false,
.enablehighDrive = false,
.enableBaudRateCtl = false
};
I2C_SlaveInit(I2C0, &config);

Parameters
base
slaveConfig

25.2.8.3

I2C base pointer
pointer to slave configuration structure

void I2C_MasterDeinit ( I2C_Type ∗ base )

Call this API to gate the I2C clock. The I2C master module can’t work unless the I2C_MasterInit is called.

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Parameters
base

25.2.8.4

I2C base pointer

void I2C_SlaveDeinit ( I2C_Type ∗ base )

Calling this API gates the I2C clock. The I2C slave module can’t work unless the I2C_SlaveInit is called
to enable the clock.
Parameters
base

25.2.8.5

I2C base pointer

void I2C_MasterGetDefaultConfig ( i2c_master_config_t ∗ masterConfig )

The purpose of this API is to get the configuration structure initialized for use in the I2C_MasterConfigure(). Use the initialized structure unchanged in I2C_MasterConfigure(), or modify some fields
of the structure before calling I2C_MasterConfigure(). Example:
i2c_master_config_t config;
I2C_MasterGetDefaultConfig(&config);

Parameters
masterConfig

25.2.8.6

Pointer to the master configuration structure.

void I2C_SlaveGetDefaultConfig ( i2c_slave_config_t ∗ slaveConfig )

The purpose of this API is to get the configuration structure initialized for use in I2C_SlaveConfigure().
Modify fields of the structure before calling the I2C_SlaveConfigure(). Example:
i2c_slave_config_t config;
I2C_SlaveGetDefaultConfig(&config);

Parameters

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slaveConfig

Pointer to the slave configuration structure.

static void I2C_Enable ( I2C_Type ∗ base, bool enable ) [inline], [static]

25.2.8.7

Parameters
base
enable

25.2.8.8

I2C base pointer
pass true to enable module, false to disable module

uint32_t I2C_MasterGetStatusFlags ( I2C_Type ∗ base )

Parameters
base

I2C base pointer

Returns
status flag, use status flag to AND _i2c_flags could get the related status.

25.2.8.9

static uint32_t I2C_SlaveGetStatusFlags ( I2C_Type ∗ base ) [inline],

[static]
Parameters
base

I2C base pointer

Returns
status flag, use status flag to AND _i2c_flags could get the related status.

25.2.8.10

static void I2C_MasterClearStatusFlags ( I2C_Type ∗ base, uint32_t statusMask
) [inline], [static]

The following status register flags can be cleared: kI2C_ArbitrationLostFlag and kI2C_IntPendingFlag

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Parameters
base
statusMask

25.2.8.11

I2C base pointer
The status flag mask, defined in type i2c_status_flag_t. The parameter could be any
combination of the following values:
• kI2C_StartDetectFlag (if available)
• kI2C_StopDetectFlag (if available)
• kI2C_ArbitrationLostFlag
• kI2C_IntPendingFlagFlag

static void I2C_SlaveClearStatusFlags ( I2C_Type ∗ base, uint32_t statusMask
) [inline], [static]

The following status register flags can be cleared: kI2C_ArbitrationLostFlag and kI2C_IntPendingFlag
Parameters
base
statusMask

25.2.8.12

I2C base pointer
The status flag mask, defined in type i2c_status_flag_t. The parameter could be any
combination of the following values:
• kI2C_StartDetectFlag (if available)
• kI2C_StopDetectFlag (if available)
• kI2C_ArbitrationLostFlag
• kI2C_IntPendingFlagFlag

void I2C_EnableInterrupts ( I2C_Type ∗ base, uint32_t mask )

Parameters

25.2.8.13

base

I2C base pointer

mask

interrupt source The parameter can be combination of the following source if defined:
• kI2C_GlobalInterruptEnable
• kI2C_StopDetectInterruptEnable/kI2C_StartDetectInterruptEnable
• kI2C_SdaTimeoutInterruptEnable

void I2C_DisableInterrupts ( I2C_Type ∗ base, uint32_t mask )

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I2C Driver
Parameters

25.2.8.14

base

I2C base pointer

mask

interrupt source The parameter can be combination of the following source if defined:
• kI2C_GlobalInterruptEnable
• kI2C_StopDetectInterruptEnable/kI2C_StartDetectInterruptEnable
• kI2C_SdaTimeoutInterruptEnable

static uint32_t I2C_GetDataRegAddr ( I2C_Type ∗ base ) [inline],

[static]
This API is used to provide a transfer address for I2C DMA transfer configuration.
Parameters
base

I2C base pointer

Returns
data register address

25.2.8.15

void I2C_MasterSetBaudRate ( I2C_Type ∗ base, uint32_t baudRate_Bps,
uint32_t srcClock_Hz )

Parameters
base
baudRate_Bps
srcClock_Hz

25.2.8.16

I2C base pointer
the baud rate value in bps
Source clock

status_t I2C_MasterStart ( I2C_Type ∗ base, uint8_t address, i2c_direction_t
direction )

This function is used to initiate a new master mode transfer by sending the START signal. The slave
address is sent following the I2C START signal.

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Parameters
base
address
direction

I2C peripheral base pointer
7-bit slave device address.
Master transfer directions(transmit/receive).

Return values
kStatus_Success
kStatus_I2C_Busy

25.2.8.17

Successfully send the start signal.
Current bus is busy.

status_t I2C_MasterStop ( I2C_Type ∗ base )

Return values
kStatus_Success
kStatus_I2C_Timeout

25.2.8.18

Successfully send the stop signal.
Send stop signal failed, timeout.

status_t I2C_MasterRepeatedStart ( I2C_Type ∗ base, uint8_t address,
i2c_direction_t direction )

Parameters
base
address
direction

I2C peripheral base pointer
7-bit slave device address.
Master transfer directions(transmit/receive).

Return values
kStatus_Success
kStatus_I2C_Busy

25.2.8.19

Successfully send the start signal.
Current bus is busy but not occupied by current I2C master.

status_t I2C_MasterWriteBlocking ( I2C_Type ∗ base, const uint8_t ∗ txBuff,
size_t txSize )

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I2C Driver
Parameters
base

The I2C peripheral base pointer.

txBuff

The pointer to the data to be transferred.

txSize

The length in bytes of the data to be transferred.

Return values
kStatus_Success
kStatus_I2C_ArbitrationLost
kStataus_I2C_Nak

Successfully complete the data transmission.
Transfer error, arbitration lost.
Transfer error, receive NAK during transfer.

status_t I2C_MasterReadBlocking ( I2C_Type ∗ base, uint8_t ∗ rxBuff, size_t
rxSize )

25.2.8.20

Note
The I2C_MasterReadBlocking function stops the bus before reading the final byte. Without stopping
the bus prior for the final read, the bus issues another read, resulting in garbage data being read into
the data register.
Parameters
base

I2C peripheral base pointer.

rxBuff

The pointer to the data to store the received data.

rxSize

The length in bytes of the data to be received.

Return values
kStatus_Success
kStatus_I2C_Timeout

25.2.8.21

Successfully complete the data transmission.
Send stop signal failed, timeout.

status_t I2C_SlaveWriteBlocking ( I2C_Type ∗ base, const uint8_t ∗ txBuff,
size_t txSize )

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Parameters
base

The I2C peripheral base pointer.

txBuff

The pointer to the data to be transferred.

txSize

The length in bytes of the data to be transferred.

Return values
kStatus_Success
kStatus_I2C_ArbitrationLost
kStataus_I2C_Nak

Successfully complete the data transmission.
Transfer error, arbitration lost.
Transfer error, receive NAK during transfer.

void I2C_SlaveReadBlocking ( I2C_Type ∗ base, uint8_t ∗ rxBuff, size_t rxSize
)

25.2.8.22

Parameters
base

I2C peripheral base pointer.

rxBuff

The pointer to the data to store the received data.

rxSize

The length in bytes of the data to be received.

25.2.8.23

status_t I2C_MasterTransferBlocking ( I2C_Type ∗ base, i2c_master_transfer_t
∗ xfer )

Note
The API does not return until the transfer succeeds or fails due to arbitration lost or receiving a NAK.
Parameters
base

I2C peripheral base address.

xfer

Pointer to the transfer structure.

Return values

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kStatus_Success
kStatus_I2C_Busy
kStatus_I2C_Timeout
kStatus_I2C_ArbitrationLost
kStataus_I2C_Nak

Successfully complete the data transmission.
Previous transmission still not finished.
Transfer error, wait signal timeout.
Transfer error, arbitration lost.
Transfer error, receive NAK during transfer.

void I2C_MasterTransferCreateHandle ( I2C_Type ∗ base, i2c_master_handle_t
∗ handle, i2c_master_transfer_callback_t callback, void ∗ userData )

25.2.8.24

Parameters
base
handle
callback
userData

I2C base pointer.
pointer to i2c_master_handle_t structure to store the transfer state.
pointer to user callback function.
user paramater passed to the callback function.

status_t I2C_MasterTransferNonBlocking ( I2C_Type ∗ base,
i2c_master_handle_t ∗ handle, i2c_master_transfer_t ∗ xfer )

25.2.8.25

Note
Calling the API will return immediately after transfer initiates, user needs to call I2C_MasterGetTransferCount to poll the transfer status to check whether the transfer is finished, if the return status
is not kStatus_I2C_Busy, the transfer is finished.
Parameters
base
handle
xfer

I2C base pointer.
pointer to i2c_master_handle_t structure which stores the transfer state.
pointer to i2c_master_transfer_t structure.

Return values
kStatus_Success
kStatus_I2C_Busy
kStatus_I2C_Timeout

Sucessully start the data transmission.
Previous transmission still not finished.
Transfer error, wait signal timeout.

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25.2.8.26

status_t I2C_MasterTransferGetCount ( I2C_Type ∗ base, i2c_master_handle_t

∗ handle, size_t ∗ count )

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Parameters
base
handle
count

I2C base pointer.
pointer to i2c_master_handle_t structure which stores the transfer state.
Number of bytes transferred so far by the non-blocking transaction.

Return values
kStatus_InvalidArgument
kStatus_Success

count is Invalid.
Successfully return the count.

void I2C_MasterTransferAbort ( I2C_Type ∗ base, i2c_master_handle_t ∗
handle )

25.2.8.27

Note
This API can be called at any time when an interrupt non-blocking transfer initiates to abort the
transfer early.
Parameters
base
handle

25.2.8.28

I2C base pointer.
pointer to i2c_master_handle_t structure which stores the transfer state

void I2C_MasterTransferHandleIRQ ( I2C_Type ∗ base, void ∗ i2cHandle )

Parameters
base
i2cHandle

25.2.8.29

I2C base pointer.
pointer to i2c_master_handle_t structure.

void I2C_SlaveTransferCreateHandle ( I2C_Type ∗ base, i2c_slave_handle_t ∗
handle, i2c_slave_transfer_callback_t callback, void ∗ userData )

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Parameters
base
handle
callback
userData

I2C base pointer.
pointer to i2c_slave_handle_t structure to store the transfer state.
pointer to user callback function.
user parameter passed to the callback function.

status_t I2C_SlaveTransferNonBlocking ( I2C_Type ∗ base, i2c_slave_handle_t
∗ handle, uint32_t eventMask )

25.2.8.30

Call this API after calling the I2C_SlaveInit() and I2C_SlaveTransferCreateHandle() to start processing
transactions driven by an I2C master. The slave monitors the I2C bus and passes events to the callback
that was passed into the call to I2C_SlaveTransferCreateHandle(). The callback is always invoked from
the interrupt context.
The set of events received by the callback is customizable. To do so, set the eventMask parameter to the
OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kLPI2C_SlaveReceiveEvent events are always enabled and do not need to
be included in the mask. Alternatively, pass 0 to get a default set of only the transmit and receive events
that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way
to enable all events.
Parameters
base
handle
eventMask

The I2C peripheral base address.
Pointer to #i2c_slave_handle_t structure which stores the transfer state.
Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default
set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all
events.

Return values
#kStatus_Success
kStatus_I2C_Busy

25.2.8.31

Slave transfers were successfully started.
Slave transfers have already been started on this handle.

void I2C_SlaveTransferAbort ( I2C_Type ∗ base, i2c_slave_handle_t ∗ handle )

Note
This API can be called at any time to stop slave for handling the bus events.

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I2C Driver
Parameters
base
handle

I2C base pointer.
pointer to i2c_slave_handle_t structure which stores the transfer state.

status_t I2C_SlaveTransferGetCount ( I2C_Type ∗ base, i2c_slave_handle_t ∗
handle, size_t ∗ count )

25.2.8.32

Parameters
base
handle
count

I2C base pointer.
pointer to i2c_slave_handle_t structure.
Number of bytes transferred so far by the non-blocking transaction.

Return values
kStatus_InvalidArgument
kStatus_Success

25.2.8.33

count is Invalid.
Successfully return the count.

void I2C_SlaveTransferHandleIRQ ( I2C_Type ∗ base, void ∗ i2cHandle )

Parameters
base
i2cHandle

I2C base pointer.
pointer to i2c_slave_handle_t structure which stores the transfer state

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I2C DMA Driver

25.3

I2C DMA Driver

25.3.1

Overview

Files
• file fsl_i2c_dma.h

Data Structures
• struct i2c_master_dma_handle_t
I2C master dma transfer structure. More...

Typedefs
• typedef void(∗ i2c_master_dma_transfer_callback_t )(I2C_Type ∗base, i2c_master_dma_handle_t
∗handle, status_t status, void ∗userData)
I2C master dma transfer callback typedef.

I2C Block DMA Transfer Operation
• void I2C_MasterTransferCreateHandleDMA (I2C_Type ∗base, i2c_master_dma_handle_t ∗handle,
i2c_master_dma_transfer_callback_t callback, void ∗userData, dma_handle_t ∗dmaHandle)
Init the I2C handle which is used in transcational functions.

• status_t I2C_MasterTransferDMA (I2C_Type ∗base, i2c_master_dma_handle_t ∗handle, i2c_master_transfer_t ∗xfer)
Performs a master dma non-blocking transfer on the I2C bus.

• status_t I2C_MasterTransferGetCountDMA (I2C_Type ∗base, i2c_master_dma_handle_t ∗handle,
size_t ∗count)
Get master transfer status during a dma non-blocking transfer.

• void I2C_MasterTransferAbortDMA (I2C_Type ∗base, i2c_master_dma_handle_t ∗handle)
Abort a master dma non-blocking transfer in a early time.

25.3.2
25.3.2.1

Data Structure Documentation
struct _i2c_master_dma_handle

I2C master dma handle typedef.
Data Fields

• i2c_master_transfer_t transfer
I2C master transfer struct.

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I2C DMA Driver
• size_t transferSize
Total bytes to be transferred.

• uint8_t state
I2C master transfer status.

• dma_handle_t ∗ dmaHandle
The DMA handler used.

• i2c_master_dma_transfer_callback_t completionCallback
Callback function called after dma transfer finished.

• void ∗ userData
Callback parameter passed to callback function.
25.3.2.1.0.22

Field Documentation

25.3.2.1.0.22.1 i2c_master_transfer_t i2c_master_dma_handle_t::transfer
25.3.2.1.0.22.2

size_t i2c_master_dma_handle_t::transferSize

25.3.2.1.0.22.3

uint8_t i2c_master_dma_handle_t::state

25.3.2.1.0.22.4 dma_handle_t∗ i2c_master_dma_handle_t::dmaHandle
25.3.2.1.0.22.5 i2c_master_dma_transfer_callback_t i2c_master_dma_handle_t::completionCallback
25.3.2.1.0.22.6

25.3.3

Typedef Documentation
typedef void(∗ i2c_master_dma_transfer_callback_t)(I2C_Type ∗base,
i2c_master_dma_handle_t ∗handle, status_t status, void ∗userData)

25.3.3.1

25.3.4

void∗ i2c_master_dma_handle_t::userData

Function Documentation
void I2C_MasterTransferCreateHandleDMA ( I2C_Type ∗ base,
i2c_master_dma_handle_t ∗ handle, i2c_master_dma_transfer_callback_t
callback, void ∗ userData, dma_handle_t ∗ dmaHandle )

25.3.4.1

Parameters
base
handle

I2C peripheral base address
pointer to i2c_master_dma_handle_t structure

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I2C DMA Driver
callback
userData
dmaHandle

pointer to user callback function
user param passed to the callback function
DMA handle pointer

status_t I2C_MasterTransferDMA ( I2C_Type ∗ base, i2c_master_dma_handle_t

25.3.4.2

∗ handle, i2c_master_transfer_t ∗ xfer )
Parameters
base
handle
xfer

I2C peripheral base address
pointer to i2c_master_dma_handle_t structure
pointer to transfer structure of i2c_master_transfer_t

Return values
kStatus_Success
kStatus_I2C_Busy
kStatus_I2C_Timeout
kStatus_I2C_ArbitrationLost
kStataus_I2C_Nak

Sucessully complete the data transmission.
Previous transmission still not finished.
Transfer error, wait signal timeout.
Transfer error, arbitration lost.
Transfer error, receive Nak during transfer.

status_t I2C_MasterTransferGetCountDMA ( I2C_Type ∗ base,
i2c_master_dma_handle_t ∗ handle, size_t ∗ count )

25.3.4.3

Parameters
base
handle
count

25.3.4.4

I2C peripheral base address
pointer to i2c_master_dma_handle_t structure
Number of bytes transferred so far by the non-blocking transaction.

void I2C_MasterTransferAbortDMA ( I2C_Type ∗ base, i2c_master_dma_handle_t
∗ handle )

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I2C DMA Driver
Parameters
base
handle

I2C peripheral base address
pointer to i2c_master_dma_handle_t structure

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I2C eDMA Driver

25.4

I2C eDMA Driver

25.4.1

Overview

Files
• file fsl_i2c_edma.h

Data Structures
• struct i2c_master_edma_handle_t
I2C master edma transfer structure. More...

Typedefs
• typedef void(∗ i2c_master_edma_transfer_callback_t )(I2C_Type ∗base, i2c_master_edma_handle_t ∗handle, status_t status, void ∗userData)
I2C master edma transfer callback typedef.

I2C Block EDMA Transfer Operation
• void I2C_MasterCreateEDMAHandle (I2C_Type ∗base, i2c_master_edma_handle_t ∗handle, i2c_master_edma_transfer_callback_t callback, void ∗userData, edma_handle_t ∗edmaHandle)
Init the I2C handle which is used in transcational functions.

• status_t I2C_MasterTransferEDMA (I2C_Type ∗base, i2c_master_edma_handle_t ∗handle, i2c_master_transfer_t ∗xfer)
Performs a master edma non-blocking transfer on the I2C bus.

• status_t I2C_MasterTransferGetCountEDMA (I2C_Type ∗base,
t ∗handle, size_t ∗count)

i2c_master_edma_handle_-

Get master transfer status during a edma non-blocking transfer.

• void I2C_MasterTransferAbortEDMA (I2C_Type ∗base, i2c_master_edma_handle_t ∗handle)
Abort a master edma non-blocking transfer in a early time.

25.4.2
25.4.2.1

Data Structure Documentation
struct _i2c_master_edma_handle

I2C master edma handle typedef.
Data Fields

• i2c_master_transfer_t transfer
I2C master transfer struct.

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I2C eDMA Driver
• size_t transferSize
Total bytes to be transferred.

• uint8_t state
I2C master transfer status.

• edma_handle_t ∗ dmaHandle
The eDMA handler used.

• i2c_master_edma_transfer_callback_t completionCallback
Callback function called after edma transfer finished.

• void ∗ userData
Callback parameter passed to callback function.
25.4.2.1.0.23

Field Documentation

25.4.2.1.0.23.1 i2c_master_transfer_t i2c_master_edma_handle_t::transfer
25.4.2.1.0.23.2

size_t i2c_master_edma_handle_t::transferSize

25.4.2.1.0.23.3

uint8_t i2c_master_edma_handle_t::state

25.4.2.1.0.23.4 edma_handle_t∗ i2c_master_edma_handle_t::dmaHandle
25.4.2.1.0.23.5 i2c_master_edma_transfer_callback_t i2c_master_edma_handle_t::completionCallback
25.4.2.1.0.23.6

25.4.3

Typedef Documentation
typedef void(∗ i2c_master_edma_transfer_callback_t)(I2C_Type ∗base,
i2c_master_edma_handle_t ∗handle, status_t status, void ∗userData)

25.4.3.1

25.4.4

void∗ i2c_master_edma_handle_t::userData

Function Documentation
void I2C_MasterCreateEDMAHandle ( I2C_Type ∗ base, i2c_master_edma_handle_t ∗ handle, i2c_master_edma_transfer_callback_t callback, void ∗
userData, edma_handle_t ∗ edmaHandle )

25.4.4.1

Parameters
base
handle

I2C peripheral base address.
pointer to i2c_master_edma_handle_t structure.

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I2C eDMA Driver
callback
userData
edmaHandle

pointer to user callback function.
user param passed to the callback function.
EDMA handle pointer.

status_t I2C_MasterTransferEDMA ( I2C_Type ∗ base, i2c_master_edma_handle_t ∗ handle, i2c_master_transfer_t ∗ xfer
)

25.4.4.2

Parameters
base
handle
xfer

I2C peripheral base address.
pointer to i2c_master_edma_handle_t structure.
pointer to transfer structure of i2c_master_transfer_t.

Return values
kStatus_Success
kStatus_I2C_Busy
kStatus_I2C_Timeout
kStatus_I2C_ArbitrationLost
kStataus_I2C_Nak

Sucessully complete the data transmission.
Previous transmission still not finished.
Transfer error, wait signal timeout.
Transfer error, arbitration lost.
Transfer error, receive Nak during transfer.

status_t I2C_MasterTransferGetCountEDMA ( I2C_Type ∗ base,
i2c_master_edma_handle_t ∗ handle, size_t ∗ count )

25.4.4.3

Parameters
base
handle
count

25.4.4.4

I2C peripheral base address.
pointer to i2c_master_edma_handle_t structure.
Number of bytes transferred so far by the non-blocking transaction.

void I2C_MasterTransferAbortEDMA ( I2C_Type ∗ base, i2c_master_edma_handle_t ∗ handle )

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I2C eDMA Driver
Parameters
base
handle

I2C peripheral base address.
pointer to i2c_master_edma_handle_t structure.

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I2C FreeRTOS Driver

25.5

I2C FreeRTOS Driver

25.5.1

Overview

Files
• file fsl_i2c_freertos.h

Data Structures
• struct i2c_rtos_handle_t
I2C FreeRTOS handle. More...

Driver version
• #define FSL_I2C_FREERTOS_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
I2C FreeRTOS driver version 2.0.0.

I2C RTOS Operation
• status_t I2C_RTOS_Init (i2c_rtos_handle_t ∗handle, I2C_Type ∗base, const i2c_master_config_t
∗masterConfig, uint32_t srcClock_Hz)
Initializes I2C.

• status_t I2C_RTOS_Deinit (i2c_rtos_handle_t ∗handle)
Deinitializes the I2C.

• status_t I2C_RTOS_Transfer (i2c_rtos_handle_t ∗handle, i2c_master_transfer_t ∗transfer)
Performs I2C transfer.

25.5.2
25.5.2.1

Data Structure Documentation
struct i2c_rtos_handle_t

Data Fields

• I2C_Type ∗ base
I2C base address.

• i2c_master_handle_t drv_handle
Handle of the underlying driver, treated as opaque by the RTOS layer.

• SemaphoreHandle_t mutex
Mutex to lock the handle during a trasfer.

• SemaphoreHandle_t sem
Semaphore to notify and unblock task when transfer ends.

• OS_EVENT ∗ mutex
Mutex to lock the handle during a trasfer.

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I2C FreeRTOS Driver
• OS_FLAG_GRP ∗ event
Semaphore to notify and unblock task when transfer ends.

• OS_SEM mutex
Mutex to lock the handle during a trasfer.

• OS_FLAG_GRP event
Semaphore to notify and unblock task when transfer ends.

25.5.3

Macro Definition Documentation
#define FSL_I2C_FREERTOS_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

25.5.3.1

25.5.4

Function Documentation
status_t I2C_RTOS_Init ( i2c_rtos_handle_t ∗ handle, I2C_Type ∗ base, const
i2c_master_config_t ∗ masterConfig, uint32_t srcClock_Hz )

25.5.4.1

This function initializes the I2C module and related RTOS context.
Parameters
handle
base

The RTOS I2C handle, the pointer to an allocated space for RTOS context.
The pointer base address of the I2C instance to initialize.

masterConfig

Configuration structure to set-up I2C in master mode.

srcClock_Hz

Frequency of input clock of the I2C module.

Returns
status of the operation.

status_t I2C_RTOS_Deinit ( i2c_rtos_handle_t ∗ handle )

25.5.4.2

This function deinitializes the I2C module and related RTOS context.
Parameters
handle

25.5.4.3

The RTOS I2C handle.

status_t I2C_RTOS_Transfer ( i2c_rtos_handle_t ∗ handle, i2c_master_transfer_t
∗ transfer )

This function performs an I2C transfer according to data given in the transfer structure.

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I2C FreeRTOS Driver
Parameters
handle
transfer

The RTOS I2C handle.
Structure specifying the transfer parameters.

Returns
status of the operation.

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I2C µCOS/II Driver

25.6

I2C µCOS/II Driver

25.6.1

Overview

Files
• file fsl_i2c_ucosii.h
• file fsl_i2c_ucosiii.h

Data Structures
• struct i2c_rtos_handle_t
I2C FreeRTOS handle. More...

Driver version
• #define FSL_I2C_UCOSII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
I2C uCOS II driver version 2.0.0.

I2C RTOS Operation
• status_t I2C_RTOS_Init (i2c_rtos_handle_t ∗handle, I2C_Type ∗base, const i2c_master_config_t
∗masterConfig, uint32_t srcClock_Hz)
Initializes I2C.

• status_t I2C_RTOS_Deinit (i2c_rtos_handle_t ∗handle)
Deinitializes the I2C.

• status_t I2C_RTOS_Transfer (i2c_rtos_handle_t ∗handle, i2c_master_transfer_t ∗transfer)
Performs I2C transfer.

Driver version
• #define FSL_I2C_UCOSIII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
I2C uCOS III driver version 2.0.0.

25.6.2
25.6.2.1

Data Structure Documentation
struct i2c_rtos_handle_t

Data Fields

• I2C_Type ∗ base
I2C base address.

• i2c_master_handle_t drv_handle
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I2C µCOS/II Driver
Handle of the underlying driver, treated as opaque by the RTOS layer.

• SemaphoreHandle_t mutex
Mutex to lock the handle during a trasfer.

• SemaphoreHandle_t sem
Semaphore to notify and unblock task when transfer ends.

• OS_EVENT ∗ mutex
Mutex to lock the handle during a trasfer.

• OS_FLAG_GRP ∗ event
Semaphore to notify and unblock task when transfer ends.

• OS_SEM mutex
Mutex to lock the handle during a trasfer.

• OS_FLAG_GRP event
Semaphore to notify and unblock task when transfer ends.

25.6.3

Macro Definition Documentation

25.6.3.1

#define FSL_I2C_UCOSII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

25.6.3.2

#define FSL_I2C_UCOSIII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

25.6.4

Function Documentation
status_t I2C_RTOS_Init ( i2c_rtos_handle_t ∗ handle, I2C_Type ∗ base, const
i2c_master_config_t ∗ masterConfig, uint32_t srcClock_Hz )

25.6.4.1

This function initializes the I2C module and related RTOS context.
Parameters
handle
base

The RTOS I2C handle, the pointer to an allocated space for RTOS context.
The pointer base address of the I2C instance to initialize.

masterConfig

Configuration structure to set-up I2C in master mode.

srcClock_Hz

Frequency of input clock of the I2C module.

Returns
status of the operation.

25.6.4.2

status_t I2C_RTOS_Deinit ( i2c_rtos_handle_t ∗ handle )

This function deinitializes the I2C module and related RTOS context.

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I2C µCOS/II Driver
Parameters
handle

The RTOS I2C handle.

status_t I2C_RTOS_Transfer ( i2c_rtos_handle_t ∗ handle, i2c_master_transfer_t
∗ transfer )

25.6.4.3

This function performs an I2C transfer according to data given in the transfer structure.
Parameters
handle
transfer

The RTOS I2C handle.
Structure specifying the transfer parameters.

Returns
status of the operation.

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I2C µCOS/III Driver

25.7

I2C µCOS/III Driver

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I2C µCOS/III Driver

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Chapter 26
LLWU: Low-Leakage Wakeup Unit Driver
26.1

Overview

The KSDK provides a Peripheral driver for the Low-Leakage Wakeup Unit (LLWU) module of Kinetis
devices. The LLWU module allows the user to select external pin sources and internal modules as a
wake-up source from low-leakage power modes.

26.2

External wakeup pins configurations

Configures the external wakeup pins’ working modes, gets and clears the wake pin flags. External wakeup
pins are accessed by pinIndex which is started from 1. Numbers of external pins depend on the SoC
configuration.

26.3

Internal wakeup modules configurations

Enables/disables the internal wakeup modules, and gets the modules flags. Internal modules are accessed
by moduleIndex which is started from 1. Numbers of external pins depend the on SoC configuration.

26.4

Digital pin filter for external wakeup pin configurations

Configures the digital pin filter of the external wakeup pins’ working modes, gets and clears the pin filter
flags. Digital pins filters are accessed by filterIndex which is started from 1. Numbers of external
pins depends on the SoC configuration.

Files
• file fsl_llwu.h

Enumerations
• enum llwu_external_pin_mode_t {
kLLWU_ExternalPinDisable = 0U,
kLLWU_ExternalPinRisingEdge = 1U,
kLLWU_ExternalPinFallingEdge = 2U,
kLLWU_ExternalPinAnyEdge = 3U }
External input pin control modes.

• enum llwu_pin_filter_mode_t {
kLLWU_PinFilterDisable = 0U,
kLLWU_PinFilterRisingEdge = 1U,
kLLWU_PinFilterFallingEdge = 2U,
kLLWU_PinFilterAnyEdge = 3U }
Digital filter control modes.

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Enumeration Type Documentation

Driver version
• #define FSL_LLWU_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
LLWU driver version 2.0.1.

26.5
26.5.1

26.6
26.6.1

Macro Definition Documentation
#define FSL_LLWU_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))

Enumeration Type Documentation
enum llwu_external_pin_mode_t

Enumerator
kLLWU_ExternalPinDisable Pin disabled as wakeup input.
kLLWU_ExternalPinRisingEdge Pin enabled with rising edge detection.
kLLWU_ExternalPinFallingEdge Pin enabled with falling edge detection.
kLLWU_ExternalPinAnyEdge Pin enabled with any change detection.

26.6.2

enum llwu_pin_filter_mode_t

Enumerator
kLLWU_PinFilterDisable Filter disabled.
kLLWU_PinFilterRisingEdge Filter positive edge detection.
kLLWU_PinFilterFallingEdge Filter negative edge detection.
kLLWU_PinFilterAnyEdge Filter any edge detection.

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Chapter 27
LMEM: Local Memory Controller Cache Control Driver
27.1

Overview

The KSDK provides a peripheral driver for the Local Memory Controller Cache Controller module of
Kinetis devices.

27.2

Descriptions

The LMEM Cache peripheral driver allows the user to enable/disable the cache and to perform cache maintenance operations such as invalidate, push, and clear. These maintenance operations may be performed
on the Processor Code (PC) bus or Both Processor Code (PC) and Processor System (PS) bus.
The Kinetis devices contain a Processor Code (PC) bus and a Processor System (PS) bus: The Processor
Code (PC) bus - a 32-bit address space bus with low-order addresses (0x0000_0000 through 0x1FFF_FFFF) used normally for code access. The Processor System (PS) bus - a 32-bit address space bus with
high-order addresses (0x2000_0000 through 0xFFFF_FFFF) used normally for data accesses.
Some Kinetic MCU devices have caches available for the PC bus and PS bus, others may only have a PC
bus cache, while some do not have PC or PS caches at all. See the appropriate Kinetis reference manual
for cache availability.
Cache maintenance operations:
Command
Invalidate

Description
Unconditionally clear valid and modify bits of a cache entry.

Push

Push a cache entry if it is valid and modified, then
clear the modififcation
Push a cache entry if it is valid

Clear

The above cache maintenance operations may be performed on the entire cache or on a line-basis. The
peripheral driver API names distinguish between the two using the terms "All" or Line".

27.3
27.3.1

Function groups
Local Memory Processor Code Bus Cache Control

The invalidate command can be performed on the entire cache, one line and multiple lines by calling LMEM_CodeCacheInvalidateAll(), LMEM_CodeCacheInvalidateLine(), and LMEM_CodeCacheInvalidateMultiLines().
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Function groups
The push command can be performed on the entire cache, one line and multiple lines by calling LMEM_CodeCachePushAll(), LMEM_CodeCachePushLine(), and LMEM_CodeCachePushMultiLines().
The clear command can be performed on the entire cache, one line and multiple lines by calling LMEM_CodeCacheClearAll(), LMEM_CodeCacheClearLine(), and LMEM_CodeCacheClearMultiLines().
Note that the parameter "address" must be supplied which indicates the physical address of the line you
wish to perform the one line cache maintenance operation. In addition, the length the number of bytes
should be supplied for multiple lines operation. The function determines if the length meets or exceeds
1/2 the cache size because the cache contains 2 WAYs, half of the cache is in WAY0 and the other half in
WAY1 and if so, performs a cache maintenance "all" operation which is faster than performing the cache
maintenance on a line-basis.
Cache Demotion: Cache region demotion - Demoting the cache mode reduces the cache function applied
to a memory region from write-back to write-through to non-cacheable. The cache region demote function
checks to see if the requested cache mode is higher than or equal to the current cache mode, and if so,
returns an error. After a region is demoted, its cache mode can only be raised by a reset, which returns it
to its default state. To demote a cache region, call the LMEM_CodeCacheDemoteRegion().
Note that the address region assignment of the 16 subregions is device-specific and is detailed in the Chip
Configuration part of the SoC Kinetis reference manual. The LMEM provides typedef enums for each
of the 16 regions, starting with "kLMEM_CacheRegion0" and ending with "kLMEM_CacheRegion15".
The parameter cacheMode is of type lmem_cache_mode_t. This provides typedef enums for each of the
cache modes, such as "kLMEM_CacheNonCacheable", "kLMEM_CacheWriteThrough", and "kLMEM_CacheWriteBack". Cache Enable and Disable: The cache enable function enables the PC bus cache and
the write buffer. However, before enabling these, the function first performs an invalidate all. The user
should call LMEM_EnableCodeCache() to enable a particular bus cache.

27.3.2

Local Memory Processor System Bus Cache Control

The invalidate command can be performed on the entire cache, one line and multiple lines by calling
LMEM_SystemCacheInvalidateAll(), LMEM_SystemCacheInvalidateLine(), and LMEM_SystemCacheInvalidateMultiLines().
The push command can be performed on the entire cache, one line and multiple lines by calling LMEM_SystemCachePushAll(), LMEM_SystemCachePushLine(), and LMEM_SystemCachePushMultiLines().
The clear command can be performed on the entire cache, one line and multiple lines by calling LMEM_SystemCacheClearAll(), LMEM_SystemCacheClearLine(), and LMEM_SystemCacheClearMultiLines().
Note that the parameter "address" must be supplied, which indicates the physical address of the line you
wish to perform the one line cache maintenance operation. In addition, the length the number of bytes
should be supplied for multiple lines operation. The function determines if the length meets or exceeds
1/2 the cache size because the cache contains 2 WAYs, half of the cache is in WAY0 and the other half in
WAY1 and if so, performs a cache maintenance "all" operation which is faster than performing the cache
maintenance on a line-basis.

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Function groups
Cache Demotion: Cache region demotion - Demoting the cache mode reduces the cache function applied
to a memory region from write-back to write-through to non-cacheable. The cache region demote function
checks to see if the requested cache mode is higher than or equal to the current cache mode, and if so,
returns an error. After a region is demoted, its cache mode can only be raised by a reset, which returns it
to its default state. To demote a cache region, call the LMEM_SystemCacheDemoteRegion().
Note that the address region assignment of the 16 subregions is device-specific and is detailed in the Chip
Configuration part of the Kinetis SoC reference manual. The LMEM provides typedef enums for each
of the 16 regions, starting with "kLMEM_CacheRegion0" and ending with "kLMEM_CacheRegion15".
The parameter cacheMode is of type lmem_cache_mode_t. This provides typedef enums for each of the
cache modes, such as "kLMEM_CacheNonCacheable", "kLMEM_CacheWriteThrough", and "kLMEM_CacheWriteBack". Cache Enable and Disable: The cache enable function enables the PS bus cache and
the write buffer. However, before enabling these, the function first performs an invalidate all. The user
should call LMEM_EnableSystemCache() to enable a particular bus cache.

Files
• file fsl_lmem_cache.h

Macros
• #define LMEM_CACHE_LINE_SIZE (0x10U)
Cache line is 16-bytes.

• #define LMEM_CACHE_SIZE_ONEWAY (4096U)
Cache size is 4K-bytes one way.

Enumerations
• enum lmem_cache_mode_t {
kLMEM_NonCacheable = 0x0U,
kLMEM_CacheWriteThrough = 0x2U,
kLMEM_CacheWriteBack = 0x3U }
LMEM cache mode options.

• enum lmem_cache_region_t {

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Function groups
kLMEM_CacheRegion15 = 0U,
kLMEM_CacheRegion14,
kLMEM_CacheRegion13,
kLMEM_CacheRegion12,
kLMEM_CacheRegion11,
kLMEM_CacheRegion10,
kLMEM_CacheRegion9,
kLMEM_CacheRegion8,
kLMEM_CacheRegion7,
kLMEM_CacheRegion6,
kLMEM_CacheRegion5,
kLMEM_CacheRegion4,
kLMEM_CacheRegion3,
kLMEM_CacheRegion2,
kLMEM_CacheRegion1,
kLMEM_CacheRegion0 }
LMEM cache regions.

• enum lmem_cache_line_command_t {
kLMEM_CacheLineSearchReadOrWrite = 0U,
kLMEM_CacheLineInvalidate,
kLMEM_CacheLinePush,
kLMEM_CacheLineClear }
LMEM cache line command.

Driver version
• #define FSL_LMEM_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
LMEM controller driver version 2.0.0.

Local Memory Processor Code Bus Cache Control
• void LMEM_EnableCodeCache (LMEM_Type ∗base, bool enable)
Enables/disables the processor code bus cache.

• void LMEM_CodeCacheInvalidateAll (LMEM_Type ∗base)
Invalidates the processor code bus cache.

• void LMEM_CodeCachePushAll (LMEM_Type ∗base)
Pushes all modified lines in the processor code bus cache.

• void LMEM_CodeCacheClearAll (LMEM_Type ∗base)
Clears the processor code bus cache.

• void LMEM_CodeCacheInvalidateLine (LMEM_Type ∗base, uint32_t address)
Invalidates a specific line in the processor code bus cache.

• void LMEM_CodeCacheInvalidateMultiLines (LMEM_Type ∗base, uint32_t address, uint32_t length)
Invalidates multiple lines in the processor code bus cache.

• void LMEM_CodeCachePushLine (LMEM_Type ∗base, uint32_t address)
Pushes a specific modified line in the processor code bus cache.

• void LMEM_CodeCachePushMultiLines (LMEM_Type ∗base, uint32_t address, uint32_t length)
Pushes multiple modified lines in the processor code bus cache.

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• void LMEM_CodeCacheClearLine (LMEM_Type ∗base, uint32_t address)
Clears a specific line in the processor code bus cache.

• void LMEM_CodeCacheClearMultiLines (LMEM_Type ∗base, uint32_t address, uint32_t length)
Clears multiple lines in the processor code bus cache.

• status_t LMEM_CodeCacheDemoteRegion (LMEM_Type ∗base, lmem_cache_region_t region,
lmem_cache_mode_t cacheMode)
Demotes the cache mode of a region in processor code bus cache.

27.4

Macro Definition Documentation

27.4.1

#define FSL_LMEM_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

27.4.2

#define LMEM_CACHE_LINE_SIZE (0x10U)

27.4.3

#define LMEM_CACHE_SIZE_ONEWAY (4096U)

27.5
27.5.1

Enumeration Type Documentation
enum lmem_cache_mode_t

Enumerator
kLMEM_NonCacheable CACHE mode: non-cacheable.
kLMEM_CacheWriteThrough CACHE mode: write-through.
kLMEM_CacheWriteBack CACHE mode: write-back.

27.5.2

enum lmem_cache_region_t

Enumerator
kLMEM_CacheRegion15 Cache Region 15.
kLMEM_CacheRegion14 Cache Region 14.
kLMEM_CacheRegion13 Cache Region 13.
kLMEM_CacheRegion12 Cache Region 12.
kLMEM_CacheRegion11 Cache Region 11.
kLMEM_CacheRegion10 Cache Region 10.
kLMEM_CacheRegion9 Cache Region 9.
kLMEM_CacheRegion8 Cache Region 8.
kLMEM_CacheRegion7 Cache Region 7.
kLMEM_CacheRegion6 Cache Region 6.
kLMEM_CacheRegion5 Cache Region 5.
kLMEM_CacheRegion4 Cache Region 4.
kLMEM_CacheRegion3 Cache Region 3.
kLMEM_CacheRegion2 Cache Region 2.
kLMEM_CacheRegion1 Cache Region 1.
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kLMEM_CacheRegion0 Cache Region 0.

27.5.3

enum lmem_cache_line_command_t

Enumerator
kLMEM_CacheLineSearchReadOrWrite Cache line search and read or write.
kLMEM_CacheLineInvalidate Cache line invalidate.
kLMEM_CacheLinePush Cache line push.
kLMEM_CacheLineClear Cache line clear.

27.6
27.6.1

Function Documentation
void LMEM_EnableCodeCache ( LMEM_Type ∗ base, bool enable )

This function enables/disables the cache. The function first invalidates the entire cache and then enables/disable both the cache and write buffers.
Parameters
base
enable

27.6.2

LMEM peripheral base address.
The enable or disable flag. true - enable the code cache. false - disable the code cache.

void LMEM_CodeCacheInvalidateAll ( LMEM_Type ∗ base )

This function invalidates the cache both ways, which means that it unconditionally clears valid bits and
modifies bits of a cache entry.
Parameters
base

27.6.3

LMEM peripheral base address.

void LMEM_CodeCachePushAll ( LMEM_Type ∗ base )

This function pushes all modified lines in both ways in the entire cache. It pushes a cache entry if it is
valid and modified and clears the modified bit. If the entry is not valid or not modified, leave as is. This
action does not clear the valid bit. A cache push is synonymous with a cache flush.

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Function Documentation
Parameters
base

27.6.4

LMEM peripheral base address.

void LMEM_CodeCacheClearAll ( LMEM_Type ∗ base )

This function clears the entire cache and pushes (flushes) and invalidates the operation. Clear - Pushes a
cache entry if it is valid and modified, then clears the valid and modified bits. If the entry is not valid or
not modified, clear the valid bit.
Parameters
base

27.6.5

LMEM peripheral base address.

void LMEM_CodeCacheInvalidateLine ( LMEM_Type ∗ base, uint32_t
address )

This function invalidates a specific line in the cache based on the physical address passed in by the user.
Invalidate - Unconditionally clears valid and modified bits of a cache entry.
Parameters
base
address

27.6.6

LMEM peripheral base address.
The physical address of the cache line. Should be 16-byte aligned address. If not, it
is changed to the 16-byte aligned memory address.

void LMEM_CodeCacheInvalidateMultiLines ( LMEM_Type ∗ base, uint32_t
address, uint32_t length )

This function invalidates multiple lines in the cache based on the physical address and length in bytes
passed in by the user. If the function detects that the length meets or exceeds half the cache. Then the
function performs an entire cache invalidate function, which is more efficient than invalidating the cache
line-by-line. The need to check half the total amount of cache is due to the fact that the cache consists
of two ways and that line commands based on the physical address searches both ways. Invalidate Unconditionally clear valid and modified bits of a cache entry.

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Parameters
base
address
length

27.6.7

LMEM peripheral base address.
The physical address of the cache line. Should be 16-byte aligned address. If not, it
is changed to the 16-byte aligned memory address.
The length in bytes of the total amount of cache lines.

void LMEM_CodeCachePushLine ( LMEM_Type ∗ base, uint32_t address )

This function pushes a specific modified line based on the physical address passed in by the user. Push Push a cache entry if it is valid and modified, then clear the modified bit. If the entry is not valid or not
modified, leave as is. This action does not clear the valid bit. A cache push is synonymous with a cache
flush.
Parameters
base
address

27.6.8

LMEM peripheral base address.
The physical address of the cache line. Should be 16-byte aligned address. If not, it
is changed to the 16-byte aligned memory address.

void LMEM_CodeCachePushMultiLines ( LMEM_Type ∗ base, uint32_t
address, uint32_t length )

This function pushes multiple modified lines in the cache based on the physical address and length in
bytes passed in by the user. If the function detects that the length meets or exceeds half of the cache,
the function performs an cache push function, which is more efficient than pushing the modified lines in
the cache line-by-line. The need to check half the total amount of cache is due to the fact that the cache
consists of two ways and that line commands based on the physical address searches both ways. Push Push a cache entry if it is valid and modified, then clear the modified bit. If the entry is not valid or not
modified, leave as is. This action does not clear the valid bit. A cache push is synonymous with a cache
flush.
Parameters
base
address

LMEM peripheral base address.
The physical address of the cache line. Should be 16-byte aligned address. If not, it
is changed to the 16-byte aligned memory address.

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length

27.6.9

The length in bytes of the total amount of cache lines.

void LMEM_CodeCacheClearLine ( LMEM_Type ∗ base, uint32_t address )

This function clears a specific line based on the physical address passed in by the user. Clear - Push a cache
entry if it is valid and modified, then clear the valid and modify bits. If entry not valid or not modified,
clear the valid bit.
Parameters
base
address

LMEM peripheral base address.
The physical address of the cache line. Should be 16-byte aligned address. If not, it
is changed to the 16-byte aligned memory address.

void LMEM_CodeCacheClearMultiLines ( LMEM_Type ∗ base, uint32_t
address, uint32_t length )

27.6.10

This function clears multiple lines in the cache based on the physical address and length in bytes passed
in by the user. If the function detects that the length meets or exceeds half the total amount of cache,
the function performs a cache clear function which is more efficient than clearing the lines in the cache
line-by-line. The need to check half the total amount of cache is due to the fact that the cache consists of
two ways and that line commands based on the physical address searches both ways. Clear - Push a cache
entry if it is valid and modified, then clear the valid and modify bits. If entry not valid or not modified,
clear the valid bit.
Parameters
base
address
length

27.6.11

LMEM peripheral base address.
The physical address of the cache line. Should be 16-byte aligned address. If not, it
is changed to the 16-byte aligned memory address.
The length in bytes of the total amount of cache lines.

status_t LMEM_CodeCacheDemoteRegion ( LMEM_Type ∗ base,
lmem_cache_region_t region, lmem_cache_mode_t cacheMode )

This function allows the user to demote the cache mode of a region within the device’s memory map.
Demoting the cache mode reduces the cache function applied to a memory region from write-back to
write-through to non-cacheable. The function checks to see if the requested cache mode is higher than
or equal to the current cache mode, and if so, returns an error. After a region is demoted, its cache mode
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can only be raised by a reset, which returns it to its default state which is the highest cache configure for
each region. To maintain cache coherency, changes to the cache mode should be completed while the
address space being changed is not being accessed or the cache is disabled. Before a cache mode change,
this function completes a cache clear all command to push and invalidate any cache entries that may have
changed.
Parameters
base
region
cacheMode

LMEM peripheral base address.
The desired region to demote of type lmem_cache_region_t.
The new, demoted cache mode of type lmem_cache_mode_t.

Returns
The execution result. kStatus_Success The cache demote operation is successful. kStatus_Fail The
cache demote operation is failure.

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Chapter 28
LPI2C: Low Power I2C Driver
28.1

Overview

Modules
•
•
•
•
•
•
•

LPI2C FreeRTOS Driver
LPI2C Master DMA Driver
LPI2C Master Driver
LPI2C Slave DMA Driver
LPI2C Slave Driver
LPI2C µCOS/II Driver
LPI2C µCOS/III Driver

Files
• file fsl_lpi2c.h

Enumerations
• enum _lpi2c_status {
kStatus_LPI2C_Busy = MAKE_STATUS(kStatusGroup_LPI2C, 0),
kStatus_LPI2C_Idle = MAKE_STATUS(kStatusGroup_LPI2C, 1),
kStatus_LPI2C_Nak = MAKE_STATUS(kStatusGroup_LPI2C, 2),
kStatus_LPI2C_FifoError = MAKE_STATUS(kStatusGroup_LPI2C, 3),
kStatus_LPI2C_BitError = MAKE_STATUS(kStatusGroup_LPI2C, 4),
kStatus_LPI2C_ArbitrationLost = MAKE_STATUS(kStatusGroup_LPI2C, 5),
kStatus_LPI2C_PinLowTimeout,
kStatus_LPI2C_NoTransferInProgress,
kStatus_LPI2C_DmaRequestFail = MAKE_STATUS(kStatusGroup_LPI2C, 7) }
LPI2C status return codes.

Driver version
• #define FSL_LPI2C_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
LPI2C driver version 2.1.0.

28.2
28.2.1

Macro Definition Documentation
#define FSL_LPI2C_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

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28.3
28.3.1

Enumeration Type Documentation
enum _lpi2c_status

Enumerator
kStatus_LPI2C_Busy The master is already performing a transfer.
kStatus_LPI2C_Idle The slave driver is idle.
kStatus_LPI2C_Nak The slave device sent a NAK in response to a byte.
kStatus_LPI2C_FifoError FIFO under run or overrun.
kStatus_LPI2C_BitError Transferred bit was not seen on the bus.
kStatus_LPI2C_ArbitrationLost Arbitration lost error.
kStatus_LPI2C_PinLowTimeout SCL or SDA were held low longer than the timeout.
kStatus_LPI2C_NoTransferInProgress Attempt to abort a transfer when one is not in progress.
kStatus_LPI2C_DmaRequestFail DMA request failed.

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LPI2C FreeRTOS Driver

28.4

LPI2C FreeRTOS Driver

28.4.1

Overview

Files
• file fsl_lpi2c_freertos.h

Data Structures
• struct lpi2c_rtos_handle_t
LPI2C FreeRTOS handle. More...

Driver version
• #define FSL_LPI2C_FREERTOS_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
LPI2C FreeRTOS driver version 2.0.0.

LPI2C RTOS Operation
• status_t LPI2C_RTOS_Init (lpi2c_rtos_handle_t ∗handle, LPI2C_Type ∗base, const lpi2c_master_config_t ∗masterConfig, uint32_t srcClock_Hz)
Initializes LPI2C.

• status_t LPI2C_RTOS_Deinit (lpi2c_rtos_handle_t ∗handle)
Deinitializes the LPI2C.

• status_t LPI2C_RTOS_Transfer (lpi2c_rtos_handle_t ∗handle, lpi2c_master_transfer_t ∗transfer)
Performs I2C transfer.

28.4.2
28.4.2.1

Data Structure Documentation
struct lpi2c_rtos_handle_t

LPI2C uCOS III handle.
LPI2C uCOS II handle.
Data Fields

• LPI2C_Type ∗ base
LPI2C base address.

• lpi2c_master_handle_t drv_handle
Handle of the underlying driver, treated as opaque by the RTOS layer.

• SemaphoreHandle_t mutex
Mutex to lock the handle during a trasfer.

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• SemaphoreHandle_t sem
Semaphore to notify and unblock task when transfer ends.

• OS_EVENT ∗ mutex
Mutex to lock the handle during a trasfer.

• OS_FLAG_GRP ∗ event
Semaphore to notify and unblock task when transfer ends.

• OS_SEM mutex
Mutex to lock the handle during a trasfer.

• OS_FLAG_GRP event
Semaphore to notify and unblock task when transfer ends.

28.4.3

Macro Definition Documentation
#define FSL_LPI2C_FREERTOS_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

28.4.3.1

28.4.4

Function Documentation
status_t LPI2C_RTOS_Init ( lpi2c_rtos_handle_t ∗ handle, LPI2C_Type ∗ base,
const lpi2c_master_config_t ∗ masterConfig, uint32_t srcClock_Hz )

28.4.4.1

This function initializes the LPI2C module and related RTOS context.
Parameters
handle
base

The RTOS LPI2C handle, the pointer to an allocated space for RTOS context.
The pointer base address of the LPI2C instance to initialize.

masterConfig

Configuration structure to set-up LPI2C in master mode.

srcClock_Hz

Frequency of input clock of the LPI2C module.

Returns
status of the operation.

28.4.4.2

status_t LPI2C_RTOS_Deinit ( lpi2c_rtos_handle_t ∗ handle )

This function deinitializes the LPI2C module and related RTOS context.
Parameters

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LPI2C FreeRTOS Driver
handle

The RTOS LPI2C handle.

status_t LPI2C_RTOS_Transfer ( lpi2c_rtos_handle_t ∗ handle,
lpi2c_master_transfer_t ∗ transfer )

28.4.4.3

This function performs an I2C transfer using LPI2C module according to data given in the transfer structure.
Parameters
handle
transfer

The RTOS LPI2C handle.
Structure specifying the transfer parameters.

Returns
status of the operation.

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28.5
28.5.1

LPI2C Master Driver
Overview

Data Structures
• struct lpi2c_master_config_t
Structure with settings to initialize the LPI2C master module. More...

• struct lpi2c_data_match_config_t
LPI2C master data match configuration structure. More...

• struct lpi2c_master_transfer_t
Non-blocking transfer descriptor structure. More...

• struct lpi2c_master_handle_t
Driver handle for master non-blocking APIs. More...

Typedefs
• typedef void(∗ lpi2c_master_transfer_callback_t )(LPI2C_Type ∗base, lpi2c_master_handle_t
∗handle, status_t completionStatus, void ∗userData)
Master completion callback function pointer type.

Enumerations
• enum _lpi2c_master_flags {
kLPI2C_MasterTxReadyFlag = LPI2C_MSR_TDF_MASK,
kLPI2C_MasterRxReadyFlag = LPI2C_MSR_RDF_MASK,
kLPI2C_MasterEndOfPacketFlag = LPI2C_MSR_EPF_MASK,
kLPI2C_MasterStopDetectFlag = LPI2C_MSR_SDF_MASK,
kLPI2C_MasterNackDetectFlag = LPI2C_MSR_NDF_MASK,
kLPI2C_MasterArbitrationLostFlag = LPI2C_MSR_ALF_MASK,
kLPI2C_MasterFifoErrFlag = LPI2C_MSR_FEF_MASK,
kLPI2C_MasterPinLowTimeoutFlag = LPI2C_MSR_PLTF_MASK,
kLPI2C_MasterDataMatchFlag = LPI2C_MSR_DMF_MASK,
kLPI2C_MasterBusyFlag = LPI2C_MSR_MBF_MASK,
kLPI2C_MasterBusBusyFlag = LPI2C_MSR_BBF_MASK }
LPI2C master peripheral flags.

• enum lpi2c_direction_t {
kLPI2C_Write = 0U,
kLPI2C_Read = 1U }
Direction of master and slave transfers.

• enum lpi2c_master_pin_config_t {

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LPI2C Master Driver
kLPI2C_2PinOpenDrain = 0x0U,
kLPI2C_2PinOutputOnly = 0x1U,
kLPI2C_2PinPushPull = 0x2U,
kLPI2C_4PinPushPull = 0x3U,
kLPI2C_2PinOpenDrainWithSeparateSlave,
kLPI2C_2PinOutputOnlyWithSeparateSlave,
kLPI2C_2PinPushPullWithSeparateSlave,
kLPI2C_4PinPushPullWithInvertedOutput = 0x7U }
LPI2C pin configuration.

• enum lpi2c_host_request_source_t {
kLPI2C_HostRequestExternalPin = 0x0U,
kLPI2C_HostRequestInputTrigger = 0x1U }
LPI2C master host request selection.

• enum lpi2c_host_request_polarity_t {
kLPI2C_HostRequestPinActiveLow = 0x0U,
kLPI2C_HostRequestPinActiveHigh = 0x1U }
LPI2C master host request pin polarity configuration.

• enum lpi2c_data_match_config_mode_t {
kLPI2C_MatchDisabled = 0x0U,
kLPI2C_1stWordEqualsM0OrM1 = 0x2U,
kLPI2C_AnyWordEqualsM0OrM1 = 0x3U,
kLPI2C_1stWordEqualsM0And2ndWordEqualsM1,
kLPI2C_AnyWordEqualsM0AndNextWordEqualsM1,
kLPI2C_1stWordAndM1EqualsM0AndM1,
kLPI2C_AnyWordAndM1EqualsM0AndM1 }
LPI2C master data match configuration modes.

• enum _lpi2c_master_transfer_flags {
kLPI2C_TransferDefaultFlag = 0x00U,
kLPI2C_TransferNoStartFlag = 0x01U,
kLPI2C_TransferRepeatedStartFlag = 0x02U,
kLPI2C_TransferNoStopFlag = 0x04U }
Transfer option flags.

Initialization and deinitialization
• void LPI2C_MasterGetDefaultConfig (lpi2c_master_config_t ∗masterConfig)
Provides a default configuration for the LPI2C master peripheral.

• void LPI2C_MasterInit (LPI2C_Type ∗base, const lpi2c_master_config_t ∗masterConfig, uint32_t
sourceClock_Hz)
Initializes the LPI2C master peripheral.

• void LPI2C_MasterDeinit (LPI2C_Type ∗base)
Deinitializes the LPI2C master peripheral.

• void LPI2C_MasterConfigureDataMatch (LPI2C_Type ∗base, const lpi2c_data_match_config_t ∗config)
Configures LPI2C master data match feature.

• static void LPI2C_MasterReset (LPI2C_Type ∗base)
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Performs a software reset.

• static void LPI2C_MasterEnable (LPI2C_Type ∗base, bool enable)
Enables or disables the LPI2C module as master.

Status
• static uint32_t LPI2C_MasterGetStatusFlags (LPI2C_Type ∗base)
Gets the LPI2C master status flags.

• static void LPI2C_MasterClearStatusFlags (LPI2C_Type ∗base, uint32_t statusMask)
Clears the LPI2C master status flag state.

Interrupts
• static void LPI2C_MasterEnableInterrupts (LPI2C_Type ∗base, uint32_t interruptMask)
Enables the LPI2C master interrupt requests.

• static void LPI2C_MasterDisableInterrupts (LPI2C_Type ∗base, uint32_t interruptMask)
Disables the LPI2C master interrupt requests.

• static uint32_t LPI2C_MasterGetEnabledInterrupts (LPI2C_Type ∗base)
Returns the set of currently enabled LPI2C master interrupt requests.

DMA control
• static void LPI2C_MasterEnableDMA (LPI2C_Type ∗base, bool enableTx, bool enableRx)
Enables or disables LPI2C master DMA requests.

• static uint32_t LPI2C_MasterGetTxFifoAddress (LPI2C_Type ∗base)
Gets LPI2C master transmit data register address for DMA transfer.

• static uint32_t LPI2C_MasterGetRxFifoAddress (LPI2C_Type ∗base)
Gets LPI2C master receive data register address for DMA transfer.

FIFO control
• static void LPI2C_MasterSetWatermarks (LPI2C_Type ∗base, size_t txWords, size_t rxWords)
Sets the watermarks for LPI2C master FIFOs.

• static void LPI2C_MasterGetFifoCounts (LPI2C_Type ∗base, size_t ∗rxCount, size_t ∗txCount)
Gets the current number of words in the LPI2C master FIFOs.

Bus operations
• void LPI2C_MasterSetBaudRate (LPI2C_Type ∗base, uint32_t sourceClock_Hz, uint32_t baudRate_Hz)
Sets the I2C bus frequency for master transactions.

• static bool LPI2C_MasterGetBusIdleState (LPI2C_Type ∗base)
Returns whether the bus is idle.

• status_t LPI2C_MasterStart (LPI2C_Type ∗base, uint8_t address, lpi2c_direction_t dir)
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Sends a START signal and slave address on the I2C bus.

• static status_t LPI2C_MasterRepeatedStart (LPI2C_Type ∗base, uint8_t address, lpi2c_direction_t
dir)
Sends a repeated START signal and slave address on the I2C bus.

• status_t LPI2C_MasterSend (LPI2C_Type ∗base, const void ∗txBuff, size_t txSize)
Performs a polling send transfer on the I2C bus.

• status_t LPI2C_MasterReceive (LPI2C_Type ∗base, void ∗rxBuff, size_t rxSize)
Performs a polling receive transfer on the I2C bus.

• status_t LPI2C_MasterStop (LPI2C_Type ∗base)
Sends a STOP signal on the I2C bus.

Non-blocking
• void LPI2C_MasterTransferCreateHandle (LPI2C_Type ∗base, lpi2c_master_handle_t ∗handle,
lpi2c_master_transfer_callback_t callback, void ∗userData)
Creates a new handle for the LPI2C master non-blocking APIs.

• status_t LPI2C_MasterTransferNonBlocking (LPI2C_Type ∗base, lpi2c_master_handle_t ∗handle,
lpi2c_master_transfer_t ∗transfer)
Performs a non-blocking transaction on the I2C bus.

• status_t LPI2C_MasterTransferGetCount (LPI2C_Type ∗base, lpi2c_master_handle_t ∗handle,
size_t ∗count)
Returns number of bytes transferred so far.

• void LPI2C_MasterTransferAbort (LPI2C_Type ∗base, lpi2c_master_handle_t ∗handle)
Terminates a non-blocking LPI2C master transmission early.

IRQ handler
• void LPI2C_MasterTransferHandleIRQ (LPI2C_Type ∗base, lpi2c_master_handle_t ∗handle)
Reusable routine to handle master interrupts.

28.5.2
28.5.2.1

Data Structure Documentation
struct lpi2c_master_config_t

This structure holds configuration settings for the LPI2C peripheral. To initialize this structure to reasonable defaults, call the LPI2C_MasterGetDefaultConfig() function and pass a pointer to your configuration
structure instance.
The configuration structure can be made constant so it resides in flash.
Data Fields

• bool enableMaster
Whether to enable master mode.

• bool enableDoze
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Whether master is enabled in doze mode.

• bool debugEnable
Enable transfers to continue when halted in debug mode.

• bool ignoreAck
Whether to ignore ACK/NACK.

• lpi2c_master_pin_config_t pinConfig
The pin configuration option.

• uint32_t baudRate_Hz
Desired baud rate in Hertz.

• uint32_t busIdleTimeout_ns
Bus idle timeout in nanoseconds.

• uint32_t pinLowTimeout_ns
Pin low timeout in nanoseconds.

• uint8_t sdaGlitchFilterWidth_ns
Width in nanoseconds of glitch filter on SDA pin.

• uint8_t sclGlitchFilterWidth_ns
Width in nanoseconds of glitch filter on SCL pin.

• struct {
bool enable
Enable host request.
lpi2c_host_request_source_t source
Host request source.
lpi2c_host_request_polarity_t polarity
Host request pin polarity.
} hostRequest
Host request options.
28.5.2.1.0.24

Field Documentation

28.5.2.1.0.24.1

bool lpi2c_master_config_t::enableMaster

28.5.2.1.0.24.2

bool lpi2c_master_config_t::enableDoze

28.5.2.1.0.24.3

bool lpi2c_master_config_t::debugEnable

28.5.2.1.0.24.4

bool lpi2c_master_config_t::ignoreAck

28.5.2.1.0.24.5 lpi2c_master_pin_config_t lpi2c_master_config_t::pinConfig
28.5.2.1.0.24.6

uint32_t lpi2c_master_config_t::baudRate_Hz

28.5.2.1.0.24.7

uint32_t lpi2c_master_config_t::busIdleTimeout_ns

Set to 0 to disable.
28.5.2.1.0.24.8

uint32_t lpi2c_master_config_t::pinLowTimeout_ns

Set to 0 to disable.

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28.5.2.1.0.24.9

uint8_t lpi2c_master_config_t::sdaGlitchFilterWidth_ns

Set to 0 to disable.
28.5.2.1.0.24.10

uint8_t lpi2c_master_config_t::sclGlitchFilterWidth_ns

Set to 0 to disable.
28.5.2.1.0.24.11

bool lpi2c_master_config_t::enable

28.5.2.1.0.24.12 lpi2c_host_request_source_t lpi2c_master_config_t::source
28.5.2.1.0.24.13 lpi2c_host_request_polarity_t lpi2c_master_config_t::polarity
28.5.2.1.0.24.14

28.5.2.2

struct { ... } lpi2c_master_config_t::hostRequest

struct lpi2c_data_match_config_t

Data Fields

• lpi2c_data_match_config_mode_t matchMode
Data match configuration setting.

• bool rxDataMatchOnly
When set to true, received data is ignored until a successful match.

• uint32_t match0
Match value 0.

• uint32_t match1
Match value 1.
28.5.2.2.0.25

Field Documentation

28.5.2.2.0.25.1 lpi2c_data_match_config_mode_t lpi2c_data_match_config_t::matchMode
28.5.2.2.0.25.2

bool lpi2c_data_match_config_t::rxDataMatchOnly

28.5.2.2.0.25.3

uint32_t lpi2c_data_match_config_t::match0

28.5.2.2.0.25.4

uint32_t lpi2c_data_match_config_t::match1

28.5.2.3

struct _lpi2c_master_transfer

This structure is used to pass transaction parameters to the LPI2C_MasterTransferNonBlocking() API.
Data Fields

• uint32_t flags
Bit mask of options for the transfer.

• uint16_t slaveAddress
The 7-bit slave address.

• lpi2c_direction_t direction
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Either kLPI2C_Read or kLPI2C_Write.

• uint32_t subaddress
Sub address.

• size_t subaddressSize
Length of sub address to send in bytes.

• void ∗ data
Pointer to data to transfer.

• size_t dataSize
Number of bytes to transfer.
28.5.2.3.0.26
28.5.2.3.0.26.1

Field Documentation
uint32_t lpi2c_master_transfer_t::flags

See enumeration _lpi2c_master_transfer_flags for available options. Set to 0 or kLPI2C_TransferDefaultFlag for normal transfers.
28.5.2.3.0.26.2

uint16_t lpi2c_master_transfer_t::slaveAddress

28.5.2.3.0.26.3 lpi2c_direction_t lpi2c_master_transfer_t::direction
28.5.2.3.0.26.4

uint32_t lpi2c_master_transfer_t::subaddress

Transferred MSB first.
28.5.2.3.0.26.5

size_t lpi2c_master_transfer_t::subaddressSize

Maximum size is 4 bytes.
28.5.2.3.0.26.6

void∗ lpi2c_master_transfer_t::data

28.5.2.3.0.26.7

size_t lpi2c_master_transfer_t::dataSize

28.5.2.4

struct _lpi2c_master_handle

Note
The contents of this structure are private and subject to change.
Data Fields

• uint8_t state
Transfer state machine current state.

• uint16_t remainingBytes
Remaining byte count in current state.

• uint8_t ∗ buf
Buffer pointer for current state.

• uint16_t commandBuffer [7]
LPI2C command sequence.

• lpi2c_master_transfer_t transfer

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Copy of the current transfer info.

• lpi2c_master_transfer_callback_t completionCallback
Callback function pointer.

• void ∗ userData
Application data passed to callback.
28.5.2.4.0.27

Field Documentation

28.5.2.4.0.27.1

uint8_t lpi2c_master_handle_t::state

28.5.2.4.0.27.2

uint16_t lpi2c_master_handle_t::remainingBytes

28.5.2.4.0.27.3

uint8_t∗ lpi2c_master_handle_t::buf

28.5.2.4.0.27.4

uint16_t lpi2c_master_handle_t::commandBuffer[7]

28.5.2.4.0.27.5

lpi2c_master_transfer_t lpi2c_master_handle_t::transfer

28.5.2.4.0.27.6 lpi2c_master_transfer_callback_t lpi2c_master_handle_t::completionCallback
28.5.2.4.0.27.7

28.5.3

void∗ lpi2c_master_handle_t::userData

Typedef Documentation
typedef void(∗ lpi2c_master_transfer_callback_t)(LPI2C_Type ∗base,
lpi2c_master_handle_t ∗handle, status_t completionStatus, void ∗userData)

28.5.3.1

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use
in the call to LPI2C_MasterTransferCreateHandle().
Parameters
base
completionStatus
userData

28.5.4
28.5.4.1

The LPI2C peripheral base address.
Either #kStatus_Success or an error code describing how the transfer completed.
Arbitrary pointer-sized value passed from the application.

Enumeration Type Documentation
enum _lpi2c_master_flags

The following status register flags can be cleared:
• kLPI2C_MasterEndOfPacketFlag
• kLPI2C_MasterStopDetectFlag
• kLPI2C_MasterNackDetectFlag

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LPI2C Master Driver
•
•
•
•

kLPI2C_MasterArbitrationLostFlag
kLPI2C_MasterFifoErrFlag
kLPI2C_MasterPinLowTimeoutFlag
kLPI2C_MasterDataMatchFlag

All flags except kLPI2C_MasterBusyFlag and kLPI2C_MasterBusBusyFlag can be enabled as interrupts.
Note
These enums are meant to be OR’d together to form a bit mask.
Enumerator
kLPI2C_MasterTxReadyFlag Transmit data flag.
kLPI2C_MasterRxReadyFlag Receive data flag.
kLPI2C_MasterEndOfPacketFlag End Packet flag.
kLPI2C_MasterStopDetectFlag Stop detect flag.
kLPI2C_MasterNackDetectFlag NACK detect flag.
kLPI2C_MasterArbitrationLostFlag Arbitration lost flag.
kLPI2C_MasterFifoErrFlag FIFO error flag.
kLPI2C_MasterPinLowTimeoutFlag Pin low timeout flag.
kLPI2C_MasterDataMatchFlag Data match flag.
kLPI2C_MasterBusyFlag Master busy flag.
kLPI2C_MasterBusBusyFlag Bus busy flag.

28.5.4.2

enum lpi2c_direction_t

Enumerator
kLPI2C_Write Master transmit.
kLPI2C_Read Master receive.

28.5.4.3

enum lpi2c_master_pin_config_t

Enumerator
kLPI2C_2PinOpenDrain LPI2C Configured for 2-pin open drain mode.
kLPI2C_2PinOutputOnly LPI2C Configured for 2-pin output only mode (ultra-fast mode)
kLPI2C_2PinPushPull LPI2C Configured for 2-pin push-pull mode.
kLPI2C_4PinPushPull LPI2C Configured for 4-pin push-pull mode.
kLPI2C_2PinOpenDrainWithSeparateSlave LPI2C Configured for 2-pin open drain mode with
separate LPI2C slave.
kLPI2C_2PinOutputOnlyWithSeparateSlave LPI2C Configured for 2-pin output only mode(ultrafast mode) with separate LPI2C slave.

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kLPI2C_2PinPushPullWithSeparateSlave LPI2C Configured for 2-pin push-pull mode with separate LPI2C slave.
kLPI2C_4PinPushPullWithInvertedOutput LPI2C Configured for 4-pin push-pull mode(inverted
outputs)

28.5.4.4

enum lpi2c_host_request_source_t

Enumerator
kLPI2C_HostRequestExternalPin Select the LPI2C_HREQ pin as the host request input.
kLPI2C_HostRequestInputTrigger Select the input trigger as the host request input.

28.5.4.5

enum lpi2c_host_request_polarity_t

Enumerator
kLPI2C_HostRequestPinActiveLow Configure the LPI2C_HREQ pin active low.
kLPI2C_HostRequestPinActiveHigh Configure the LPI2C_HREQ pin active high.

28.5.4.6

enum lpi2c_data_match_config_mode_t

Enumerator
kLPI2C_MatchDisabled LPI2C Match Disabled.
kLPI2C_1stWordEqualsM0OrM1 LPI2C Match Enabled and 1st data word equals MATCH0 OR
MATCH1.
kLPI2C_AnyWordEqualsM0OrM1 LPI2C Match Enabled and any data word equals MATCH0 OR
MATCH1.
kLPI2C_1stWordEqualsM0And2ndWordEqualsM1 LPI2C Match Enabled and 1st data word
equals MATCH0, 2nd data equals MATCH1.
kLPI2C_AnyWordEqualsM0AndNextWordEqualsM1 LPI2C Match Enabled and any data word
equals MATCH0, next data equals MATCH1.
kLPI2C_1stWordAndM1EqualsM0AndM1 LPI2C Match Enabled and 1st data word and MATCH0
equals MATCH0 and MATCH1.
kLPI2C_AnyWordAndM1EqualsM0AndM1 LPI2C Match Enabled and any data word and MATCH0 equals MATCH0 and MATCH1.

28.5.4.7

enum _lpi2c_master_transfer_flags

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Note
These enumerations are intended to be OR’d together to form a bit mask of options for the _lpi2c_master_transfer::flags field.
Enumerator
kLPI2C_TransferDefaultFlag Transfer starts with a start signal, stops with a stop signal.
kLPI2C_TransferNoStartFlag Don’t send a start condition, address, and sub address.
kLPI2C_TransferRepeatedStartFlag Send a repeated start condition.
kLPI2C_TransferNoStopFlag Don’t send a stop condition.

28.5.5

Function Documentation

28.5.5.1

void LPI2C_MasterGetDefaultConfig ( lpi2c_master_config_t ∗ masterConfig )

This function provides the following default configuration for the LPI2C master peripheral:
masterConfig->enableMaster
masterConfig->debugEnable
masterConfig->ignoreAck
masterConfig->pinConfig
masterConfig->baudRate_Hz
masterConfig->busIdleTimeout_ns
masterConfig->pinLowTimeout_ns
masterConfig->sdaGlitchFilterWidth_ns
masterConfig->sclGlitchFilterWidth_ns
masterConfig->hostRequest.enable
masterConfig->hostRequest.source
masterConfig->hostRequest.polarity

=
=
=
=
=
=
=
=
=
=
=
=

true;
false;
false;
kLPI2C_2PinOpenDrain;
100000U;
0;
0;
0;
0;
false;
kLPI2C_HostRequestExternalPin;
kLPI2C_HostRequestPinActiveHigh;

After calling this function, you can override any settings in order to customize the configuration, prior to
initializing the master driver with LPI2C_MasterInit().
Parameters
out

28.5.5.2

masterConfig

User provided configuration structure for default values. Refer to lpi2c_master_config_t.

void LPI2C_MasterInit ( LPI2C_Type ∗ base, const lpi2c_master_config_t ∗
masterConfig, uint32_t sourceClock_Hz )

This function enables the peripheral clock and initializes the LPI2C master peripheral as described by the
user provided configuration. A software reset is performed prior to configuration.

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LPI2C Master Driver
Parameters
base

The LPI2C peripheral base address.

masterConfig

User provided peripheral configuration. Use LPI2C_MasterGetDefaultConfig() to get
a set of defaults that you can override.

sourceClock_Hz

Frequency in Hertz of the LPI2C functional clock. Used to calculate the baud rate
divisors, filter widths, and timeout periods.

void LPI2C_MasterDeinit ( LPI2C_Type ∗ base )

28.5.5.3

This function disables the LPI2C master peripheral and gates the clock. It also performs a software reset
to restore the peripheral to reset conditions.
Parameters
base

The LPI2C peripheral base address.

void LPI2C_MasterConfigureDataMatch ( LPI2C_Type ∗ base, const
lpi2c_data_match_config_t ∗ config )

28.5.5.4

Parameters
base
config

28.5.5.5

The LPI2C peripheral base address.
Settings for the data match feature.

static void LPI2C_MasterReset ( LPI2C_Type ∗ base ) [inline], [static]

Restores the LPI2C master peripheral to reset conditions.
Parameters
base

28.5.5.6

The LPI2C peripheral base address.

static void LPI2C_MasterEnable ( LPI2C_Type ∗ base, bool enable ) [inline],

[static]

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Parameters
base
enable

28.5.5.7

The LPI2C peripheral base address.
Pass true to enable or false to disable the specified LPI2C as master.

static uint32_t LPI2C_MasterGetStatusFlags ( LPI2C_Type ∗ base ) [inline],

[static]
A bit mask with the state of all LPI2C master status flags is returned. For each flag, the corresponding bit
in the return value is set if the flag is asserted.
Parameters
base

The LPI2C peripheral base address.

Returns
State of the status flags:
• 1: related status flag is set.
• 0: related status flag is not set.

See Also
_lpi2c_master_flags

28.5.5.8

static void LPI2C_MasterClearStatusFlags ( LPI2C_Type ∗ base, uint32_t
statusMask ) [inline], [static]

The following status register flags can be cleared:
•
•
•
•
•
•
•

kLPI2C_MasterEndOfPacketFlag
kLPI2C_MasterStopDetectFlag
kLPI2C_MasterNackDetectFlag
kLPI2C_MasterArbitrationLostFlag
kLPI2C_MasterFifoErrFlag
kLPI2C_MasterPinLowTimeoutFlag
kLPI2C_MasterDataMatchFlag

Attempts to clear other flags has no effect.

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LPI2C Master Driver
Parameters
base
statusMask

The LPI2C peripheral base address.
A bitmask of status flags that are to be cleared. The mask is composed of _lpi2c_master_flags enumerators OR’d together. You may pass the result of a previous call
to LPI2C_MasterGetStatusFlags().

See Also
_lpi2c_master_flags.

28.5.5.9

static void LPI2C_MasterEnableInterrupts ( LPI2C_Type ∗ base, uint32_t
interruptMask ) [inline], [static]

All flags except kLPI2C_MasterBusyFlag and kLPI2C_MasterBusBusyFlag can be enabled as interrupts.
Parameters
base
interruptMask

28.5.5.10

The LPI2C peripheral base address.
Bit mask of interrupts to enable. See _lpi2c_master_flags for the set of constants that
should be OR’d together to form the bit mask.

static void LPI2C_MasterDisableInterrupts ( LPI2C_Type ∗ base, uint32_t
interruptMask ) [inline], [static]

All flags except kLPI2C_MasterBusyFlag and kLPI2C_MasterBusBusyFlag can be enabled as interrupts.
Parameters
base
interruptMask

28.5.5.11

The LPI2C peripheral base address.
Bit mask of interrupts to disable. See _lpi2c_master_flags for the set of constants that
should be OR’d together to form the bit mask.

static uint32_t LPI2C_MasterGetEnabledInterrupts ( LPI2C_Type ∗ base )
[inline], [static]

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Parameters
base

The LPI2C peripheral base address.

Returns
A bitmask composed of _lpi2c_master_flags enumerators OR’d together to indicate the set of enabled interrupts.

28.5.5.12

static void LPI2C_MasterEnableDMA ( LPI2C_Type ∗ base, bool enableTx, bool
enableRx ) [inline], [static]

Parameters
base

The LPI2C peripheral base address.

enableTx

Enable flag for transmit DMA request. Pass true for enable, false for disable.

enableRx

Enable flag for receive DMA request. Pass true for enable, false for disable.

28.5.5.13

static uint32_t LPI2C_MasterGetTxFifoAddress ( LPI2C_Type ∗ base )
[inline], [static]

Parameters
base

The LPI2C peripheral base address.

Returns
The LPI2C Master Transmit Data Register address.

28.5.5.14

static uint32_t LPI2C_MasterGetRxFifoAddress ( LPI2C_Type ∗ base )
[inline], [static]

Parameters

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LPI2C Master Driver
base

The LPI2C peripheral base address.

Returns
The LPI2C Master Receive Data Register address.

28.5.5.15

static void LPI2C_MasterSetWatermarks ( LPI2C_Type ∗ base, size_t txWords,
size_t rxWords ) [inline], [static]

Parameters
base

The LPI2C peripheral base address.

txWords

Transmit FIFO watermark value in words. The kLPI2C_MasterTxReadyFlag flag is
set whenever the number of words in the transmit FIFO is equal or less than txWords.
Writing a value equal or greater than the FIFO size is truncated.

rxWords

Receive FIFO watermark value in words. The kLPI2C_MasterRxReadyFlag flag is
set whenever the number of words in the receive FIFO is greater than rxWords. Writing a value equal or greater than the FIFO size is truncated.

28.5.5.16

static void LPI2C_MasterGetFifoCounts ( LPI2C_Type ∗ base, size_t ∗ rxCount,
size_t ∗ txCount ) [inline], [static]

Parameters
base

The LPI2C peripheral base address.

out

txCount

Pointer through which the current number of words in the transmit FIFO
is returned. Pass NULL if this value is not required.

out

rxCount

Pointer through which the current number of words in the receive FIFO
is returned. Pass NULL if this value is not required.

28.5.5.17

void LPI2C_MasterSetBaudRate ( LPI2C_Type ∗ base, uint32_t sourceClock_Hz,
uint32_t baudRate_Hz )

The LPI2C master is automatically disabled and re-enabled as necessary to configure the baud rate. Do
not call this function during a transfer, or the transfer is aborted.

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Parameters
base
sourceClock_Hz
baudRate_Hz

28.5.5.18

The LPI2C peripheral base address.
LPI2C functional clock frequency in Hertz.
Requested bus frequency in Hertz.

static bool LPI2C_MasterGetBusIdleState ( LPI2C_Type ∗ base ) [inline],

[static]
Requires the master mode to be enabled.
Parameters
base

The LPI2C peripheral base address.

Return values

28.5.5.19

true

Bus is busy.

false

Bus is idle.

status_t LPI2C_MasterStart ( LPI2C_Type ∗ base, uint8_t address,

lpi2c_direction_t dir )
This function is used to initiate a new master mode transfer. First, the bus state is checked to ensure
that another master is not occupying the bus. Then a START signal is transmitted, followed by the 7-bit
address specified in the address parameter. Note that this function does not actually wait until the START
and address are successfully sent on the bus before returning.
Parameters
base
address
dir

The LPI2C peripheral base address.
7-bit slave device address, in bits [6:0].
Master transfer direction, either kLPI2C_Read or kLPI2C_Write. This parameter is
used to set the R/w bit (bit 0) in the transmitted slave address.

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LPI2C Master Driver
Return values
#kStatus_Success
kStatus_LPI2C_Busy

START signal and address were successfully enqueued in the transmit FIFO.
Another master is currently utilizing the bus.

static status_t LPI2C_MasterRepeatedStart ( LPI2C_Type ∗ base, uint8_t
address, lpi2c_direction_t dir ) [inline], [static]

28.5.5.20

This function is used to send a Repeated START signal when a transfer is already in progress. Like
LPI2C_MasterStart(), it also sends the specified 7-bit address.
Note
This function exists primarily to maintain compatible APIs between LPI2C and I2C drivers, as well
as to better document the intent of code that uses these APIs.
Parameters
base
address
dir

The LPI2C peripheral base address.
7-bit slave device address, in bits [6:0].
Master transfer direction, either kLPI2C_Read or kLPI2C_Write. This parameter is
used to set the R/w bit (bit 0) in the transmitted slave address.

Return values
#kStatus_Success
kStatus_LPI2C_Busy

28.5.5.21

Repeated START signal and address were successfully enqueued in the
transmit FIFO.
Another master is currently utilizing the bus.

status_t LPI2C_MasterSend ( LPI2C_Type ∗ base, const void ∗ txBuff, size_t
txSize )

Sends up to txSize number of bytes to the previously addressed slave device. The slave may reply with a
NAK to any byte in order to terminate the transfer early. If this happens, this function returns kStatus_LPI2C_Nak.

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LPI2C Master Driver
Parameters
base

The LPI2C peripheral base address.

txBuff

The pointer to the data to be transferred.

txSize

The length in bytes of the data to be transferred.

Return values
#kStatus_Success
kStatus_LPI2C_Busy
kStatus_LPI2C_Nak
kStatus_LPI2C_FifoError
kStatus_LPI2C_ArbitrationLost
kStatus_LPI2C_PinLowTimeout

Data was sent successfully.
Another master is currently utilizing the bus.
The slave device sent a NAK in response to a byte.
FIFO under run or over run.
Arbitration lost error.
SCL or SDA were held low longer than the timeout.

status_t LPI2C_MasterReceive ( LPI2C_Type ∗ base, void ∗ rxBuff, size_t
rxSize )

28.5.5.22

Parameters
base

The LPI2C peripheral base address.

rxBuff

The pointer to the data to be transferred.

rxSize

The length in bytes of the data to be transferred.

Return values
#kStatus_Success
kStatus_LPI2C_Busy
kStatus_LPI2C_Nak
kStatus_LPI2C_FifoError
kStatus_LPI2C_ArbitrationLost

Data was received successfully.
Another master is currently utilizing the bus.
The slave device sent a NAK in response to a byte.
FIFO under run or overrun.
Arbitration lost error.

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LPI2C Master Driver
kStatus_LPI2C_PinLowTimeout

SCL or SDA were held low longer than the timeout.

status_t LPI2C_MasterStop ( LPI2C_Type ∗ base )

28.5.5.23

This function does not return until the STOP signal is seen on the bus, or an error occurs.
Parameters
base

The LPI2C peripheral base address.

Return values
#kStatus_Success
kStatus_LPI2C_Busy
kStatus_LPI2C_Nak
kStatus_LPI2C_FifoError
kStatus_LPI2C_ArbitrationLost
kStatus_LPI2C_PinLowTimeout

28.5.5.24

The STOP signal was successfully sent on the bus and the transaction terminated.
Another master is currently utilizing the bus.
The slave device sent a NAK in response to a byte.
FIFO under run or overrun.
Arbitration lost error.
SCL or SDA were held low longer than the timeout.

void LPI2C_MasterTransferCreateHandle ( LPI2C_Type ∗ base,
lpi2c_master_handle_t ∗ handle, lpi2c_master_transfer_callback_t callback,
void ∗ userData )

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a
corresponding destroy handle. If the user wants to terminate a transfer, the LPI2C_MasterTransferAbort()
API shall be called.
Parameters
base
out

handle

The LPI2C peripheral base address.
Pointer to the LPI2C master driver handle.

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LPI2C Master Driver
callback
userData

User provided pointer to the asynchronous callback function.
User provided pointer to the application callback data.

status_t LPI2C_MasterTransferNonBlocking ( LPI2C_Type ∗ base,
lpi2c_master_handle_t ∗ handle, lpi2c_master_transfer_t ∗ transfer )

28.5.5.25

Parameters
base
handle
transfer

The LPI2C peripheral base address.
Pointer to the LPI2C master driver handle.
The pointer to the transfer descriptor.

Return values
#kStatus_Success
kStatus_LPI2C_Busy

The transaction was started successfully.
Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress.

status_t LPI2C_MasterTransferGetCount ( LPI2C_Type ∗ base,
lpi2c_master_handle_t ∗ handle, size_t ∗ count )

28.5.5.26

Parameters
The LPI2C peripheral base address.

base
handle
count

out

Pointer to the LPI2C master driver handle.
Number of bytes transferred so far by the non-blocking transaction.

Return values
#kStatus_Success
#kStatus_NoTransferInProgress

28.5.5.27

There is not a non-blocking transaction currently in progress.

void LPI2C_MasterTransferAbort ( LPI2C_Type ∗ base, lpi2c_master_handle_t
∗ handle )

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LPI2C Master Driver
Note
It is not safe to call this function from an IRQ handler that has a higher priority than the LPI2C
peripheral’s IRQ priority.
Parameters
base
handle

The LPI2C peripheral base address.
Pointer to the LPI2C master driver handle.

Return values
#kStatus_Success
kStatus_LPI2C_Idle

A transaction was successfully aborted.
There is not a non-blocking transaction currently in progress.

void LPI2C_MasterTransferHandleIRQ ( LPI2C_Type ∗ base,
lpi2c_master_handle_t ∗ handle )

28.5.5.28

Note
This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality.
Parameters
base
handle

The LPI2C peripheral base address.
Pointer to the LPI2C master driver handle.

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LPI2C Master DMA Driver

28.6

LPI2C Master DMA Driver

28.6.1

Overview

Data Structures
• struct lpi2c_master_edma_handle_t
Driver handle for master DMA APIs. More...

Typedefs
• typedef void(∗ lpi2c_master_edma_transfer_callback_t )(LPI2C_Type ∗base, lpi2c_master_edma_handle_t ∗handle, status_t completionStatus, void ∗userData)
Master DMA completion callback function pointer type.

Master DMA
• void LPI2C_MasterCreateEDMAHandle (LPI2C_Type ∗base, lpi2c_master_edma_handle_t
∗handle, edma_handle_t ∗rxDmaHandle, edma_handle_t ∗txDmaHandle, lpi2c_master_edma_transfer_callback_t callback, void ∗userData)
Create a new handle for the LPI2C master DMA APIs.

• status_t LPI2C_MasterTransferEDMA (LPI2C_Type ∗base, lpi2c_master_edma_handle_t ∗handle,
lpi2c_master_transfer_t ∗transfer)
Performs a non-blocking DMA-based transaction on the I2C bus.

• status_t LPI2C_MasterTransferGetCountEDMA (LPI2C_Type ∗base, lpi2c_master_edma_handle_t ∗handle, size_t ∗count)
Returns number of bytes transferred so far.

• status_t LPI2C_MasterTransferAbortEDMA (LPI2C_Type ∗base, lpi2c_master_edma_handle_t ∗handle)
Terminates a non-blocking LPI2C master transmission early.

28.6.2
28.6.2.1

Data Structure Documentation
struct _lpi2c_master_edma_handle

Note
The contents of this structure are private and subject to change.
Data Fields

• LPI2C_Type ∗ base
LPI2C base pointer.

• bool isBusy

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LPI2C Master DMA Driver
Transfer state machine current state.

• uint16_t commandBuffer [7]
LPI2C command sequence.

• lpi2c_master_transfer_t transfer
Copy of the current transfer info.

• lpi2c_master_edma_transfer_callback_t completionCallback
Callback function pointer.

• void ∗ userData
Application data passed to callback.

• edma_handle_t ∗ rx
Handle for receive DMA channel.

• edma_handle_t ∗ tx
Handle for transmit DMA channel.

• edma_tcd_t tcds [2]
Software TCD.
28.6.2.1.0.28

Field Documentation

28.6.2.1.0.28.1

LPI2C_Type∗ lpi2c_master_edma_handle_t::base

28.6.2.1.0.28.2

bool lpi2c_master_edma_handle_t::isBusy

28.6.2.1.0.28.3

uint16_t lpi2c_master_edma_handle_t::commandBuffer[7]

28.6.2.1.0.28.4

lpi2c_master_transfer_t lpi2c_master_edma_handle_t::transfer

28.6.2.1.0.28.5 lpi2c_master_edma_transfer_callback_t lpi2c_master_edma_handle_t::completionCallback
28.6.2.1.0.28.6

void∗ lpi2c_master_edma_handle_t::userData

28.6.2.1.0.28.7 edma_handle_t∗ lpi2c_master_edma_handle_t::rx
28.6.2.1.0.28.8 edma_handle_t∗ lpi2c_master_edma_handle_t::tx
28.6.2.1.0.28.9 edma_tcd_t lpi2c_master_edma_handle_t::tcds[2]

Two are allocated to provide enough room to align to 32-bytes.

28.6.3
28.6.3.1

Typedef Documentation
typedef void(∗ lpi2c_master_edma_transfer_callback_t)(LPI2C_Type ∗base,
lpi2c_master_edma_handle_t ∗handle, status_t completionStatus, void
∗userData)

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use
in the call to LPI2C_MasterCreateEDMAHandle().

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LPI2C Master DMA Driver
Parameters
base
handle
completionStatus
userData

28.6.4

The LPI2C peripheral base address.
Handle associated with the completed transfer.
Either #kStatus_Success or an error code describing how the transfer completed.
Arbitrary pointer-sized value passed from the application.

Function Documentation

28.6.4.1

void LPI2C_MasterCreateEDMAHandle ( LPI2C_Type ∗ base, lpi2c_master_edma_handle_t ∗ handle, edma_handle_t ∗ rxDmaHandle, edma_handle_t
∗ txDmaHandle, lpi2c_master_edma_transfer_callback_t callback, void ∗
userData )

The creation of a handle is for use with the DMA APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the LPI2C_MasterTransferAbortEDMA() API
shall be called.
For devices where the LPI2C send and receive DMA requests are OR’d together, the txDmaHandle parameter is ignored and may be set to NULL.
Parameters
base
out

handle

Pointer to the LPI2C master driver handle.

rxDmaHandle

Handle for the eDMA receive channel. Created by the user prior to
calling this function.

txDmaHandle

Handle for the eDMA transmit channel. Created by the user prior to
calling this function.

callback
userData

28.6.4.2

The LPI2C peripheral base address.

User provided pointer to the asynchronous callback function.
User provided pointer to the application callback data.

status_t LPI2C_MasterTransferEDMA ( LPI2C_Type ∗ base, lpi2c_master_edma_handle_t ∗ handle, lpi2c_master_transfer_t ∗ transfer
)

The callback specified when the handle was created is invoked when the transaction has completed.

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LPI2C Master DMA Driver
Parameters
base
handle
transfer

The LPI2C peripheral base address.
Pointer to the LPI2C master driver handle.
The pointer to the transfer descriptor.

Return values
#kStatus_Success
kStatus_LPI2C_Busy

The transaction was started successfully.
Either another master is currently utilizing the bus, or another DMA transaction is already in progress.

status_t LPI2C_MasterTransferGetCountEDMA ( LPI2C_Type ∗ base,
lpi2c_master_edma_handle_t ∗ handle, size_t ∗ count )

28.6.4.3

Parameters
The LPI2C peripheral base address.

base
handle
count

out

Pointer to the LPI2C master driver handle.
Number of bytes transferred so far by the non-blocking transaction.

Return values
#kStatus_Success
#kStatus_NoTransferInProgress

28.6.4.4

There is not a DMA transaction currently in progress.

status_t LPI2C_MasterTransferAbortEDMA ( LPI2C_Type ∗ base,
lpi2c_master_edma_handle_t ∗ handle )

Note
It is not safe to call this function from an IRQ handler that has a higher priority than the eDMA
peripheral’s IRQ priority.

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LPI2C Master DMA Driver
Parameters
base
handle

The LPI2C peripheral base address.
Pointer to the LPI2C master driver handle.

Return values
#kStatus_Success
kStatus_LPI2C_Idle

A transaction was successfully aborted.
There is not a DMA transaction currently in progress.

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LPI2C Slave Driver

28.7
28.7.1

LPI2C Slave Driver
Overview

Data Structures
• struct lpi2c_slave_config_t
Structure with settings to initialize the LPI2C slave module. More...

• struct lpi2c_slave_transfer_t
LPI2C slave transfer structure. More...

• struct lpi2c_slave_handle_t
LPI2C slave handle structure. More...

Typedefs
• typedef void(∗ lpi2c_slave_transfer_callback_t )(LPI2C_Type ∗base, lpi2c_slave_transfer_t ∗transfer, void ∗userData)
Slave event callback function pointer type.

Enumerations
• enum _lpi2c_slave_flags {
kLPI2C_SlaveTxReadyFlag = LPI2C_SSR_TDF_MASK,
kLPI2C_SlaveRxReadyFlag = LPI2C_SSR_RDF_MASK,
kLPI2C_SlaveAddressValidFlag = LPI2C_SSR_AVF_MASK,
kLPI2C_SlaveTransmitAckFlag = LPI2C_SSR_TAF_MASK,
kLPI2C_SlaveRepeatedStartDetectFlag = LPI2C_SSR_RSF_MASK,
kLPI2C_SlaveStopDetectFlag = LPI2C_SSR_SDF_MASK,
kLPI2C_SlaveBitErrFlag = LPI2C_SSR_BEF_MASK,
kLPI2C_SlaveFifoErrFlag = LPI2C_SSR_FEF_MASK,
kLPI2C_SlaveAddressMatch0Flag = LPI2C_SSR_AM0F_MASK,
kLPI2C_SlaveAddressMatch1Flag = LPI2C_SSR_AM1F_MASK,
kLPI2C_SlaveGeneralCallFlag = LPI2C_SSR_GCF_MASK,
kLPI2C_SlaveBusyFlag = LPI2C_SSR_SBF_MASK,
kLPI2C_SlaveBusBusyFlag = LPI2C_SSR_BBF_MASK }
LPI2C slave peripheral flags.

• enum lpi2c_slave_address_match_t {
kLPI2C_MatchAddress0 = 0U,
kLPI2C_MatchAddress0OrAddress1 = 2U,
kLPI2C_MatchAddress0ThroughAddress1 = 6U }
LPI2C slave address match options.

• enum lpi2c_slave_transfer_event_t {

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LPI2C Slave Driver
kLPI2C_SlaveAddressMatchEvent = 0x01U,
kLPI2C_SlaveTransmitEvent = 0x02U,
kLPI2C_SlaveReceiveEvent = 0x04U,
kLPI2C_SlaveTransmitAckEvent = 0x08U,
kLPI2C_SlaveRepeatedStartEvent = 0x10U,
kLPI2C_SlaveCompletionEvent = 0x20U,
kLPI2C_SlaveAllEvents }
Set of events sent to the callback for non blocking slave transfers.

Slave initialization and deinitialization
• void LPI2C_SlaveGetDefaultConfig (lpi2c_slave_config_t ∗slaveConfig)
Provides a default configuration for the LPI2C slave peripheral.

• void LPI2C_SlaveInit (LPI2C_Type ∗base, const lpi2c_slave_config_t ∗slaveConfig, uint32_t sourceClock_Hz)
Initializes the LPI2C slave peripheral.

• void LPI2C_SlaveDeinit (LPI2C_Type ∗base)
Deinitializes the LPI2C slave peripheral.

• static void LPI2C_SlaveReset (LPI2C_Type ∗base)
Performs a software reset of the LPI2C slave peripheral.

• static void LPI2C_SlaveEnable (LPI2C_Type ∗base, bool enable)
Enables or disables the LPI2C module as slave.

Slave status
• static uint32_t LPI2C_SlaveGetStatusFlags (LPI2C_Type ∗base)
Gets the LPI2C slave status flags.

• static void LPI2C_SlaveClearStatusFlags (LPI2C_Type ∗base, uint32_t statusMask)
Clears the LPI2C status flag state.

Slave interrupts
• static void LPI2C_SlaveEnableInterrupts (LPI2C_Type ∗base, uint32_t interruptMask)
Enables the LPI2C slave interrupt requests.

• static void LPI2C_SlaveDisableInterrupts (LPI2C_Type ∗base, uint32_t interruptMask)
Disables the LPI2C slave interrupt requests.

• static uint32_t LPI2C_SlaveGetEnabledInterrupts (LPI2C_Type ∗base)
Returns the set of currently enabled LPI2C slave interrupt requests.

Slave DMA control
• static void LPI2C_SlaveEnableDMA (LPI2C_Type ∗base, bool enableAddressValid, bool enableRx, bool enableTx)
Enables or disables the LPI2C slave peripheral DMA requests.

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LPI2C Slave Driver

Slave bus operations
• static bool LPI2C_SlaveGetBusIdleState (LPI2C_Type ∗base)
Returns whether the bus is idle.

• static void LPI2C_SlaveTransmitAck (LPI2C_Type ∗base, bool ackOrNack)
Transmits either an ACK or NAK on the I2C bus in response to a byte from the master.

• static uint32_t LPI2C_SlaveGetReceivedAddress (LPI2C_Type ∗base)
Returns the slave address sent by the I2C master.

• status_t LPI2C_SlaveSend (LPI2C_Type ∗base, const void ∗txBuff, size_t txSize, size_t ∗actualTxSize)
Performs a polling send transfer on the I2C bus.

• status_t LPI2C_SlaveReceive (LPI2C_Type ∗base, void ∗rxBuff, size_t rxSize, size_t ∗actualRxSize)
Performs a polling receive transfer on the I2C bus.

Slave non-blocking
• void LPI2C_SlaveTransferCreateHandle (LPI2C_Type ∗base, lpi2c_slave_handle_t ∗handle, lpi2c_slave_transfer_callback_t callback, void ∗userData)
Creates a new handle for the LPI2C slave non-blocking APIs.

• status_t LPI2C_SlaveTransferNonBlocking (LPI2C_Type ∗base, lpi2c_slave_handle_t ∗handle,
uint32_t eventMask)
Starts accepting slave transfers.

• status_t LPI2C_SlaveTransferGetCount (LPI2C_Type ∗base, lpi2c_slave_handle_t ∗handle, size_t
∗count)
Gets the slave transfer status during a non-blocking transfer.

• void LPI2C_SlaveTransferAbort (LPI2C_Type ∗base, lpi2c_slave_handle_t ∗handle)
Aborts the slave non-blocking transfers.

Slave IRQ handler
• void LPI2C_SlaveTransferHandleIRQ (LPI2C_Type ∗base, lpi2c_slave_handle_t ∗handle)
Reusable routine to handle slave interrupts.

28.7.2
28.7.2.1

Data Structure Documentation
struct lpi2c_slave_config_t

This structure holds configuration settings for the LPI2C slave peripheral. To initialize this structure to
reasonable defaults, call the LPI2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash.

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LPI2C Slave Driver
Data Fields

• bool enableSlave
Enable slave mode.

• uint8_t address0
Slave’s 7-bit address.

• uint8_t address1
Alternate slave 7-bit address.

• lpi2c_slave_address_match_t addressMatchMode
Address matching options.

• bool filterDozeEnable
Enable digital glitch filter in doze mode.

• bool filterEnable
Enable digital glitch filter.

• bool enableGeneralCall
Enable general call address matching.

• bool ignoreAck
Continue transfers after a NACK is detected.

• bool enableReceivedAddressRead
Enable reading the address received address as the first byte of data.

• uint32_t sdaGlitchFilterWidth_ns
Width in nanoseconds of the digital filter on the SDA signal.

• uint32_t sclGlitchFilterWidth_ns
Width in nanoseconds of the digital filter on the SCL signal.

• uint32_t dataValidDelay_ns
Width in nanoseconds of the data valid delay.

• uint32_t clockHoldTime_ns
Width in nanoseconds of the clock hold time.

• bool enableAck
Enables SCL clock stretching during slave-transmit address byte(s) and slave-receiver address and data
byte(s) to allow software to write the Transmit ACK Register before the ACK or NACK is transmitted.

• bool enableTx
Enables SCL clock stretching when the transmit data flag is set during a slave-transmit transfer.

• bool enableRx
Enables SCL clock stretching when receive data flag is set during a slave-receive transfer.

• bool enableAddress
Enables SCL clock stretching when the address valid flag is asserted.

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LPI2C Slave Driver
28.7.2.1.0.29

Field Documentation

28.7.2.1.0.29.1

bool lpi2c_slave_config_t::enableSlave

28.7.2.1.0.29.2

uint8_t lpi2c_slave_config_t::address0

28.7.2.1.0.29.3

uint8_t lpi2c_slave_config_t::address1

28.7.2.1.0.29.4 lpi2c_slave_address_match_t lpi2c_slave_config_t::addressMatchMode
28.7.2.1.0.29.5

bool lpi2c_slave_config_t::filterDozeEnable

28.7.2.1.0.29.6

bool lpi2c_slave_config_t::filterEnable

28.7.2.1.0.29.7

bool lpi2c_slave_config_t::enableGeneralCall

28.7.2.1.0.29.8

bool lpi2c_slave_config_t::enableAck

Clock stretching occurs when transmitting the 9th bit. When enableAckSCLStall is enabled, there is no
need to set either enableRxDataSCLStall or enableAddressSCLStall.
28.7.2.1.0.29.9

bool lpi2c_slave_config_t::enableTx

28.7.2.1.0.29.10

bool lpi2c_slave_config_t::enableRx

28.7.2.1.0.29.11

bool lpi2c_slave_config_t::enableAddress

28.7.2.1.0.29.12

bool lpi2c_slave_config_t::ignoreAck

28.7.2.1.0.29.13

bool lpi2c_slave_config_t::enableReceivedAddressRead

28.7.2.1.0.29.14

uint32_t lpi2c_slave_config_t::sdaGlitchFilterWidth_ns

28.7.2.1.0.29.15

uint32_t lpi2c_slave_config_t::sclGlitchFilterWidth_ns

28.7.2.1.0.29.16

uint32_t lpi2c_slave_config_t::dataValidDelay_ns

28.7.2.1.0.29.17

uint32_t lpi2c_slave_config_t::clockHoldTime_ns

28.7.2.2

struct lpi2c_slave_transfer_t

Data Fields

• lpi2c_slave_transfer_event_t event
Reason the callback is being invoked.

• uint8_t receivedAddress
Matching address send by master.

• uint8_t ∗ data
Transfer buffer.

• size_t dataSize
Transfer size.

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LPI2C Slave Driver
• status_t completionStatus
Success or error code describing how the transfer completed.

• size_t transferredCount
Number of bytes actually transferred since start or last repeated start.
28.7.2.2.0.30

Field Documentation

28.7.2.2.0.30.1 lpi2c_slave_transfer_event_t lpi2c_slave_transfer_t::event
28.7.2.2.0.30.2

uint8_t lpi2c_slave_transfer_t::receivedAddress

28.7.2.2.0.30.3

status_t lpi2c_slave_transfer_t::completionStatus

Only applies for kLPI2C_SlaveCompletionEvent.
28.7.2.2.0.30.4

28.7.2.3

size_t lpi2c_slave_transfer_t::transferredCount

struct _lpi2c_slave_handle

Note
The contents of this structure are private and subject to change.
Data Fields

• lpi2c_slave_transfer_t transfer
LPI2C slave transfer copy.

• bool isBusy
Whether transfer is busy.

• bool wasTransmit
Whether the last transfer was a transmit.

• uint32_t eventMask
Mask of enabled events.

• uint32_t transferredCount
Count of bytes transferred.

• lpi2c_slave_transfer_callback_t callback
Callback function called at transfer event.

• void ∗ userData
Callback parameter passed to callback.

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LPI2C Slave Driver
28.7.2.3.0.31

Field Documentation

28.7.2.3.0.31.1 lpi2c_slave_transfer_t lpi2c_slave_handle_t::transfer
28.7.2.3.0.31.2

bool lpi2c_slave_handle_t::isBusy

28.7.2.3.0.31.3

bool lpi2c_slave_handle_t::wasTransmit

28.7.2.3.0.31.4

uint32_t lpi2c_slave_handle_t::eventMask

28.7.2.3.0.31.5

uint32_t lpi2c_slave_handle_t::transferredCount

28.7.2.3.0.31.6 lpi2c_slave_transfer_callback_t lpi2c_slave_handle_t::callback
28.7.2.3.0.31.7

28.7.3
28.7.3.1

void∗ lpi2c_slave_handle_t::userData

Typedef Documentation
typedef void(∗ lpi2c_slave_transfer_callback_t)(LPI2C_Type ∗base,
lpi2c_slave_transfer_t ∗transfer, void ∗userData)

This callback is used only for the slave non-blocking transfer API. To install a callback, use the LPI2C_SlaveSetCallback() function after you have created a handle.

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LPI2C Slave Driver
Parameters
base
transfer
userData

28.7.4

Base address for the LPI2C instance on which the event occurred.
Pointer to transfer descriptor containing values passed to and/or from the callback.
Arbitrary pointer-sized value passed from the application.

Enumeration Type Documentation

28.7.4.1

enum _lpi2c_slave_flags

The following status register flags can be cleared:
•
•
•
•

kLPI2C_SlaveRepeatedStartDetectFlag
kLPI2C_SlaveStopDetectFlag
kLPI2C_SlaveBitErrFlag
kLPI2C_SlaveFifoErrFlag

All flags except kLPI2C_SlaveBusyFlag and kLPI2C_SlaveBusBusyFlag can be enabled as interrupts.
Note
These enumerations are meant to be OR’d together to form a bit mask.
Enumerator
kLPI2C_SlaveTxReadyFlag Transmit data flag.
kLPI2C_SlaveRxReadyFlag Receive data flag.
kLPI2C_SlaveAddressValidFlag Address valid flag.
kLPI2C_SlaveTransmitAckFlag Transmit ACK flag.
kLPI2C_SlaveRepeatedStartDetectFlag Repeated start detect flag.
kLPI2C_SlaveStopDetectFlag Stop detect flag.
kLPI2C_SlaveBitErrFlag Bit error flag.
kLPI2C_SlaveFifoErrFlag FIFO error flag.
kLPI2C_SlaveAddressMatch0Flag Address match 0 flag.
kLPI2C_SlaveAddressMatch1Flag Address match 1 flag.
kLPI2C_SlaveGeneralCallFlag General call flag.
kLPI2C_SlaveBusyFlag Master busy flag.
kLPI2C_SlaveBusBusyFlag Bus busy flag.

28.7.4.2

enum lpi2c_slave_address_match_t

Enumerator
kLPI2C_MatchAddress0 Match only address 0.
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LPI2C Slave Driver
kLPI2C_MatchAddress0OrAddress1 Match either address 0 or address 1.
kLPI2C_MatchAddress0ThroughAddress1 Match a range of slave addresses from address 0
through address 1.

enum lpi2c_slave_transfer_event_t

28.7.4.3

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together
events is passed to LPI2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then,
when the slave callback is invoked, it is passed the current event through its transfer parameter.
Note
These enumerations are meant to be OR’d together to form a bit mask of events.
Enumerator
kLPI2C_SlaveAddressMatchEvent Received the slave address after a start or repeated start.
kLPI2C_SlaveTransmitEvent Callback is requested to provide data to transmit (slave-transmitter
role).
kLPI2C_SlaveReceiveEvent Callback is requested to provide a buffer in which to place received
data (slave-receiver role).
kLPI2C_SlaveTransmitAckEvent Callback needs to either transmit an ACK or NACK.
kLPI2C_SlaveRepeatedStartEvent A repeated start was detected.
kLPI2C_SlaveCompletionEvent A stop was detected, completing the transfer.
kLPI2C_SlaveAllEvents Bit mask of all available events.

28.7.5
28.7.5.1

Function Documentation
void LPI2C_SlaveGetDefaultConfig ( lpi2c_slave_config_t ∗ slaveConfig )

This function provides the following default configuration for the LPI2C slave peripheral:
slaveConfig->enableSlave
slaveConfig->address0
slaveConfig->address1
slaveConfig->addressMatchMode
slaveConfig->filterDozeEnable
slaveConfig->filterEnable
slaveConfig->enableGeneralCall
slaveConfig->sclStall.enableAck
slaveConfig->sclStall.enableTx
slaveConfig->sclStall.enableRx
slaveConfig->sclStall.enableAddress
slaveConfig->ignoreAck
slaveConfig->enableReceivedAddressRead
slaveConfig->sdaGlitchFilterWidth_ns
slaveConfig->sclGlitchFilterWidth_ns
slaveConfig->dataValidDelay_ns
slaveConfig->clockHoldTime_ns

=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=

true;
0U;
0U;
kLPI2C_MatchAddress0;
true;
true;
false;
false;
true;
true;
true;
false;
false;
0; // TODO determine default width values
0;
0;
0;

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LPI2C Slave Driver
After calling this function, override any settings to customize the configuration, prior to initializing the
master driver with LPI2C_SlaveInit(). Be sure to override at least the address0 member of the configuration structure with the desired slave address.
Parameters
slaveConfig

out

28.7.5.2

User provided configuration structure that is set to default values. Refer
to lpi2c_slave_config_t.

void LPI2C_SlaveInit ( LPI2C_Type ∗ base, const lpi2c_slave_config_t ∗
slaveConfig, uint32_t sourceClock_Hz )

This function enables the peripheral clock and initializes the LPI2C slave peripheral as described by the
user provided configuration.
Parameters
base

The LPI2C peripheral base address.

slaveConfig

User provided peripheral configuration. Use LPI2C_SlaveGetDefaultConfig() to get
a set of defaults that you can override.

sourceClock_Hz

Frequency in Hertz of the LPI2C functional clock. Used to calculate the filter widths,
data valid delay, and clock hold time.

28.7.5.3

void LPI2C_SlaveDeinit ( LPI2C_Type ∗ base )

This function disables the LPI2C slave peripheral and gates the clock. It also performs a software reset to
restore the peripheral to reset conditions.
Parameters
base

28.7.5.4

The LPI2C peripheral base address.

static void LPI2C_SlaveReset ( LPI2C_Type ∗ base ) [inline], [static]

Parameters

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LPI2C Slave Driver
base

The LPI2C peripheral base address.

static void LPI2C_SlaveEnable ( LPI2C_Type ∗ base, bool enable ) [inline],

28.7.5.5

[static]
Parameters
base
enable

28.7.5.6

The LPI2C peripheral base address.
Pass true to enable or false to disable the specified LPI2C as slave.

static uint32_t LPI2C_SlaveGetStatusFlags ( LPI2C_Type ∗ base ) [inline],

[static]
A bit mask with the state of all LPI2C slave status flags is returned. For each flag, the corresponding bit
in the return value is set if the flag is asserted.
Parameters
base

The LPI2C peripheral base address.

Returns
State of the status flags:
• 1: related status flag is set.
• 0: related status flag is not set.

See Also
_lpi2c_slave_flags

28.7.5.7

static void LPI2C_SlaveClearStatusFlags ( LPI2C_Type ∗ base, uint32_t
statusMask ) [inline], [static]

The following status register flags can be cleared:
•
•
•
•

kLPI2C_SlaveRepeatedStartDetectFlag
kLPI2C_SlaveStopDetectFlag
kLPI2C_SlaveBitErrFlag
kLPI2C_SlaveFifoErrFlag

Attempts to clear other flags has no effect.
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LPI2C Slave Driver
Parameters
base
statusMask

The LPI2C peripheral base address.
A bitmask of status flags that are to be cleared. The mask is composed of _lpi2c_slave_flags enumerators OR’d together. You may pass the result of a previous call to
LPI2C_SlaveGetStatusFlags().

See Also
_lpi2c_slave_flags.

28.7.5.8

static void LPI2C_SlaveEnableInterrupts ( LPI2C_Type ∗ base, uint32_t
interruptMask ) [inline], [static]

All flags except kLPI2C_SlaveBusyFlag and kLPI2C_SlaveBusBusyFlag can be enabled as interrupts.
Parameters
base
interruptMask

28.7.5.9

The LPI2C peripheral base address.
Bit mask of interrupts to enable. See _lpi2c_slave_flags for the set of constants that
should be OR’d together to form the bit mask.

static void LPI2C_SlaveDisableInterrupts ( LPI2C_Type ∗ base, uint32_t
interruptMask ) [inline], [static]

All flags except kLPI2C_SlaveBusyFlag and kLPI2C_SlaveBusBusyFlag can be enabled as interrupts.
Parameters
base
interruptMask

28.7.5.10

The LPI2C peripheral base address.
Bit mask of interrupts to disable. See _lpi2c_slave_flags for the set of constants that
should be OR’d together to form the bit mask.

static uint32_t LPI2C_SlaveGetEnabledInterrupts ( LPI2C_Type ∗ base )
[inline], [static]

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LPI2C Slave Driver
Parameters
base

The LPI2C peripheral base address.

Returns
A bitmask composed of _lpi2c_slave_flags enumerators OR’d together to indicate the set of enabled
interrupts.

28.7.5.11

static void LPI2C_SlaveEnableDMA ( LPI2C_Type ∗ base, bool
enableAddressValid, bool enableRx, bool enableTx ) [inline], [static]

Parameters
base

The LPI2C peripheral base address.

enableAddressValid

Enable flag for the address valid DMA request. Pass true for enable, false for disable.
The address valid DMA request is shared with the receive data DMA request.

enableRx

Enable flag for the receive data DMA request. Pass true for enable, false for disable.

enableTx

Enable flag for the transmit data DMA request. Pass true for enable, false for disable.

28.7.5.12

static bool LPI2C_SlaveGetBusIdleState ( LPI2C_Type ∗ base ) [inline],

[static]
Requires the slave mode to be enabled.
Parameters
base

The LPI2C peripheral base address.

Return values

28.7.5.13

true

Bus is busy.

false

Bus is idle.

static void LPI2C_SlaveTransmitAck ( LPI2C_Type ∗ base, bool ackOrNack )
[inline], [static]

Use this function to send an ACK or NAK when the kLPI2C_SlaveTransmitAckFlag is asserted. This
only happens if you enable the sclStall.enableAck field of the lpi2c_slave_config_t configuration structure
used to initialize the slave peripheral.
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LPI2C Slave Driver
Parameters
base
ackOrNack

28.7.5.14

The LPI2C peripheral base address.
Pass true for an ACK or false for a NAK.

static uint32_t LPI2C_SlaveGetReceivedAddress ( LPI2C_Type ∗ base )
[inline], [static]

This function should only be called if the kLPI2C_SlaveAddressValidFlag is asserted.
Parameters
base

The LPI2C peripheral base address.

Returns
The 8-bit address matched by the LPI2C slave. Bit 0 contains the R/w direction bit, and the 7-bit
slave address is in the upper 7 bits.

28.7.5.15

status_t LPI2C_SlaveSend ( LPI2C_Type ∗ base, const void ∗ txBuff, size_t
txSize, size_t ∗ actualTxSize )

Parameters
base

out

The LPI2C peripheral base address.

txBuff

The pointer to the data to be transferred.

txSize

The length in bytes of the data to be transferred.

actualTxSize

Returns
Error or success status returned by API.

28.7.5.16

status_t LPI2C_SlaveReceive ( LPI2C_Type ∗ base, void ∗ rxBuff, size_t rxSize,
size_t ∗ actualRxSize )

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LPI2C Slave Driver
Parameters
base

out

The LPI2C peripheral base address.

rxBuff

The pointer to the data to be transferred.

rxSize

The length in bytes of the data to be transferred.

actualRxSize

Returns
Error or success status returned by API.

28.7.5.17

void LPI2C_SlaveTransferCreateHandle ( LPI2C_Type ∗ base,
lpi2c_slave_handle_t ∗ handle, lpi2c_slave_transfer_callback_t callback, void ∗
userData )

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a
corresponding destroy handle. If the user wants to terminate a transfer, the LPI2C_SlaveTransferAbort()
API shall be called.
Parameters
base
out

handle
callback
userData

28.7.5.18

The LPI2C peripheral base address.
Pointer to the LPI2C slave driver handle.
User provided pointer to the asynchronous callback function.
User provided pointer to the application callback data.

status_t LPI2C_SlaveTransferNonBlocking ( LPI2C_Type ∗ base,
lpi2c_slave_handle_t ∗ handle, uint32_t eventMask )

Call this API after calling I2C_SlaveInit() and LPI2C_SlaveTransferCreateHandle() to start processing
transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the callback that
was passed into the call to LPI2C_SlaveTransferCreateHandle(). The callback is always invoked from the
interrupt context.
The set of events received by the callback is customizable. To do so, set the eventMask parameter to the
OR’d combination of lpi2c_slave_transfer_event_t enumerators for the events you wish to receive. The
kLPI2C_SlaveTransmitEvent and kLPI2C_SlaveReceiveEvent events are always enabled and do not need
to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and
receive events that are always enabled. In addition, the kLPI2C_SlaveAllEvents constant is provided as a
convenient way to enable all events.

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LPI2C Slave Driver
Parameters
base
handle
eventMask

The LPI2C peripheral base address.
Pointer to #lpi2c_slave_handle_t structure which stores the transfer state.
Bit mask formed by OR’ing together lpi2c_slave_transfer_event_t enumerators to
specify which events to send to the callback. Other accepted values are 0 to get a
default set of only the transmit and receive events, and kLPI2C_SlaveAllEvents to
enable all events.

Return values
#kStatus_Success
kStatus_LPI2C_Busy

Slave transfers were successfully started.
Slave transfers have already been started on this handle.

status_t LPI2C_SlaveTransferGetCount ( LPI2C_Type ∗ base,
lpi2c_slave_handle_t ∗ handle, size_t ∗ count )

28.7.5.19

Parameters
base
handle
count

out

The LPI2C peripheral base address.
Pointer to i2c_slave_handle_t structure.
Pointer to a value to hold the number of bytes transferred. May be NULL if the count is not required.

Return values
#kStatus_Success
#kStatus_NoTransferInProgress

28.7.5.20

void LPI2C_SlaveTransferAbort ( LPI2C_Type ∗ base, lpi2c_slave_handle_t ∗
handle )

Note
This API could be called at any time to stop slave for handling the bus events.

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LPI2C Slave Driver
Parameters
base
handle

The LPI2C peripheral base address.
Pointer to #lpi2c_slave_handle_t structure which stores the transfer state.

Return values
#kStatus_Success
kStatus_LPI2C_Idle

void LPI2C_SlaveTransferHandleIRQ ( LPI2C_Type ∗ base, lpi2c_slave_handle_t
∗ handle )

28.7.5.21

Note
This function does not need to be called unless you are reimplementing the non blocking API’s
interrupt handler routines to add special functionality.
Parameters
base
handle

The LPI2C peripheral base address.
Pointer to #lpi2c_slave_handle_t structure which stores the transfer state.

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LPI2C Slave DMA Driver

28.8

LPI2C Slave DMA Driver

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LPI2C µCOS/II Driver

28.9

LPI2C µCOS/II Driver

28.9.1

Overview

Files
• file fsl_lpi2c_ucosii.h

Data Structures
• struct lpi2c_rtos_handle_t
LPI2C FreeRTOS handle. More...

Driver version
• #define FSL_LPI2C_UCOSII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
LPI2C uCOS II driver version 2.0.0.

LPI2C RTOS Operation
• status_t LPI2C_RTOS_Init (lpi2c_rtos_handle_t ∗handle, LPI2C_Type ∗base, const lpi2c_master_config_t ∗masterConfig, uint32_t srcClock_Hz)
Initializes LPI2C.

• status_t LPI2C_RTOS_Deinit (lpi2c_rtos_handle_t ∗handle)
Deinitializes the LPI2C.

• status_t LPI2C_RTOS_Transfer (lpi2c_rtos_handle_t ∗handle, lpi2c_master_transfer_t ∗transfer)
Performs I2C transfer.

28.9.2
28.9.2.1

Data Structure Documentation
struct lpi2c_rtos_handle_t

LPI2C uCOS III handle.
LPI2C uCOS II handle.
Data Fields

• LPI2C_Type ∗ base
LPI2C base address.

• lpi2c_master_handle_t drv_handle
Handle of the underlying driver, treated as opaque by the RTOS layer.

• SemaphoreHandle_t mutex
Mutex to lock the handle during a trasfer.

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LPI2C µCOS/II Driver
• SemaphoreHandle_t sem
Semaphore to notify and unblock task when transfer ends.

• OS_EVENT ∗ mutex
Mutex to lock the handle during a trasfer.

• OS_FLAG_GRP ∗ event
Semaphore to notify and unblock task when transfer ends.

• OS_SEM mutex
Mutex to lock the handle during a trasfer.

• OS_FLAG_GRP event
Semaphore to notify and unblock task when transfer ends.

28.9.3

Macro Definition Documentation
#define FSL_LPI2C_UCOSII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

28.9.3.1

28.9.4

Function Documentation
status_t LPI2C_RTOS_Init ( lpi2c_rtos_handle_t ∗ handle, LPI2C_Type ∗ base,
const lpi2c_master_config_t ∗ masterConfig, uint32_t srcClock_Hz )

28.9.4.1

This function initializes the LPI2C module and related RTOS context.
Parameters
handle
base

The RTOS LPI2C handle, the pointer to an allocated space for RTOS context.
The pointer base address of the LPI2C instance to initialize.

masterConfig

Configuration structure to set-up LPI2C in master mode.

srcClock_Hz

Frequency of input clock of the LPI2C module.

Returns
status of the operation.

28.9.4.2

status_t LPI2C_RTOS_Deinit ( lpi2c_rtos_handle_t ∗ handle )

This function deinitializes the LPI2C module and related RTOS context.
Parameters

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LPI2C µCOS/II Driver
handle

The RTOS LPI2C handle.

status_t LPI2C_RTOS_Transfer ( lpi2c_rtos_handle_t ∗ handle,
lpi2c_master_transfer_t ∗ transfer )

28.9.4.3

This function performs an I2C transfer using LPI2C module according to data given in the transfer structure.
Parameters
handle
transfer

The RTOS LPI2C handle.
Structure specifying the transfer parameters.

Returns
status of the operation.

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LPI2C µCOS/III Driver

28.10

LPI2C µCOS/III Driver

28.10.1

Overview

Files
• file fsl_lpi2c_ucosiii.h

Data Structures
• struct lpi2c_rtos_handle_t
LPI2C FreeRTOS handle. More...

Driver version
• #define FSL_LPI2C_UCOSIII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
LPI2C uCOS III driver version 2.0.0.

LPI2C RTOS Operation
• status_t LPI2C_RTOS_Init (lpi2c_rtos_handle_t ∗handle, LPI2C_Type ∗base, const lpi2c_master_config_t ∗masterConfig, uint32_t srcClock_Hz)
Initializes LPI2C.

• status_t LPI2C_RTOS_Deinit (lpi2c_rtos_handle_t ∗handle)
Deinitializes the LPI2C.

• status_t LPI2C_RTOS_Transfer (lpi2c_rtos_handle_t ∗handle, lpi2c_master_transfer_t ∗transfer)
Performs I2C transfer.

28.10.2

Data Structure Documentation

28.10.2.1

struct lpi2c_rtos_handle_t

LPI2C uCOS III handle.
LPI2C uCOS II handle.
Data Fields

• LPI2C_Type ∗ base
LPI2C base address.

• lpi2c_master_handle_t drv_handle
Handle of the underlying driver, treated as opaque by the RTOS layer.

• SemaphoreHandle_t mutex
Mutex to lock the handle during a trasfer.

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LPI2C µCOS/III Driver
• SemaphoreHandle_t sem
Semaphore to notify and unblock task when transfer ends.

• OS_EVENT ∗ mutex
Mutex to lock the handle during a trasfer.

• OS_FLAG_GRP ∗ event
Semaphore to notify and unblock task when transfer ends.

• OS_SEM mutex
Mutex to lock the handle during a trasfer.

• OS_FLAG_GRP event
Semaphore to notify and unblock task when transfer ends.

28.10.3

Macro Definition Documentation
#define FSL_LPI2C_UCOSIII_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

28.10.3.1

28.10.4

Function Documentation
status_t LPI2C_RTOS_Init ( lpi2c_rtos_handle_t ∗ handle, LPI2C_Type ∗ base,
const lpi2c_master_config_t ∗ masterConfig, uint32_t srcClock_Hz )

28.10.4.1

This function initializes the LPI2C module and related RTOS context.
Parameters
handle
base

The RTOS LPI2C handle, the pointer to an allocated space for RTOS context.
The pointer base address of the LPI2C instance to initialize.

masterConfig

Configuration structure to set-up LPI2C in master mode.

srcClock_Hz

Frequency of input clock of the LPI2C module.

Returns
status of the operation.

28.10.4.2

status_t LPI2C_RTOS_Deinit ( lpi2c_rtos_handle_t ∗ handle )

This function deinitializes the LPI2C module and related RTOS context.
Parameters

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LPI2C µCOS/III Driver
handle

The RTOS LPI2C handle.

status_t LPI2C_RTOS_Transfer ( lpi2c_rtos_handle_t ∗ handle,
lpi2c_master_transfer_t ∗ transfer )

28.10.4.3

This function performs an I2C transfer using LPI2C module according to data given in the transfer structure.
Parameters
handle
transfer

The RTOS LPI2C handle.
Structure specifying the transfer parameters.

Returns
status of the operation.

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Chapter 29
LPTMR: LPTMR Driver
29.1

Overview

The KSDK provides a driver for the LPTMR module of Kinetis devices.

Files
• file fsl_lptmr.h

Data Structures
• struct lptmr_config_t
LPTMR config structure. More...

Enumerations
• enum lptmr_pin_select_t {
kLPTMR_PinSelectInput_0 = 0x0U,
kLPTMR_PinSelectInput_1 = 0x1U,
kLPTMR_PinSelectInput_2 = 0x2U,
kLPTMR_PinSelectInput_3 = 0x3U }
LPTMR pin selection, used in pulse counter mode.

• enum lptmr_pin_polarity_t {
kLPTMR_PinPolarityActiveHigh = 0x0U,
kLPTMR_PinPolarityActiveLow = 0x1U }
LPTMR pin polarity, used in pulse counter mode.

• enum lptmr_timer_mode_t {
kLPTMR_TimerModeTimeCounter = 0x0U,
kLPTMR_TimerModePulseCounter = 0x1U }
LPTMR timer mode selection.

• enum lptmr_prescaler_glitch_value_t {

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Overview
kLPTMR_Prescale_Glitch_0 = 0x0U,
kLPTMR_Prescale_Glitch_1 = 0x1U,
kLPTMR_Prescale_Glitch_2 = 0x2U,
kLPTMR_Prescale_Glitch_3 = 0x3U,
kLPTMR_Prescale_Glitch_4 = 0x4U,
kLPTMR_Prescale_Glitch_5 = 0x5U,
kLPTMR_Prescale_Glitch_6 = 0x6U,
kLPTMR_Prescale_Glitch_7 = 0x7U,
kLPTMR_Prescale_Glitch_8 = 0x8U,
kLPTMR_Prescale_Glitch_9 = 0x9U,
kLPTMR_Prescale_Glitch_10 = 0xAU,
kLPTMR_Prescale_Glitch_11 = 0xBU,
kLPTMR_Prescale_Glitch_12 = 0xCU,
kLPTMR_Prescale_Glitch_13 = 0xDU,
kLPTMR_Prescale_Glitch_14 = 0xEU,
kLPTMR_Prescale_Glitch_15 = 0xFU }
LPTMR prescaler/glitch filter values.

• enum lptmr_prescaler_clock_select_t {
kLPTMR_PrescalerClock_0 = 0x0U,
kLPTMR_PrescalerClock_1 = 0x1U,
kLPTMR_PrescalerClock_2 = 0x2U,
kLPTMR_PrescalerClock_3 = 0x3U }
LPTMR prescaler/glitch filter clock select.

• enum lptmr_interrupt_enable_t { kLPTMR_TimerInterruptEnable = LPTMR_CSR_TIE_MASK }
List of LPTMR interrupts.

• enum lptmr_status_flags_t { kLPTMR_TimerCompareFlag = LPTMR_CSR_TCF_MASK }
List of LPTMR status flags.

Driver version
• #define FSL_LPTMR_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
Version 2.0.0.

Initialization and deinitialization
• void LPTMR_Init (LPTMR_Type ∗base, const lptmr_config_t ∗config)
Ungate the LPTMR clock and configures the peripheral for basic operation.

• void LPTMR_Deinit (LPTMR_Type ∗base)
Gate the LPTMR clock.

• void LPTMR_GetDefaultConfig (lptmr_config_t ∗config)
Fill in the LPTMR config struct with the default settings.

Interrupt Interface
• static void LPTMR_EnableInterrupts (LPTMR_Type ∗base, uint32_t mask)
Enables the selected LPTMR interrupts.

• static void LPTMR_DisableInterrupts (LPTMR_Type ∗base, uint32_t mask)
Disables the selected LPTMR interrupts.

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Data Structure Documentation
• static uint32_t LPTMR_GetEnabledInterrupts (LPTMR_Type ∗base)
Gets the enabled LPTMR interrupts.

Status Interface
• static uint32_t LPTMR_GetStatusFlags (LPTMR_Type ∗base)
Gets the LPTMR status flags.

• static void LPTMR_ClearStatusFlags (LPTMR_Type ∗base, uint32_t mask)
Clears the LPTMR status flags.

Read and Write the timer period
• static void LPTMR_SetTimerPeriod (LPTMR_Type ∗base, uint16_t ticks)
Sets the timer period in units of count.

• static uint16_t LPTMR_GetCurrentTimerCount (LPTMR_Type ∗base)
Reads the current timer counting value.

Timer Start and Stop
• static void LPTMR_StartTimer (LPTMR_Type ∗base)
Starts the timer counting.

• static void LPTMR_StopTimer (LPTMR_Type ∗base)
Stops the timer counting.

29.2
29.2.1

Data Structure Documentation
struct lptmr_config_t

This structure holds the configuration settings for the LPTMR peripheral. To initialize this structure to reasonable defaults, call the LPTMR_GetDefaultConfig() function and pass a pointer to your config structure
instance.
The config struct can be made const so it resides in flash

Data Fields
• lptmr_timer_mode_t timerMode
Time counter mode or pulse counter mode.

• lptmr_pin_select_t pinSelect
LPTMR pulse input pin select; used only in pulse counter mode.

• lptmr_pin_polarity_t pinPolarity
LPTMR pulse input pin polarity; used only in pulse counter mode.

• bool enableFreeRunning
true: enable free running, counter is reset on overflow false: counter is reset when the compare flag is set

• bool bypassPrescaler
true: bypass prescaler; false: use clock from prescaler

• lptmr_prescaler_clock_select_t prescalerClockSource
LPTMR clock source.

• lptmr_prescaler_glitch_value_t value
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Enumeration Type Documentation
Prescaler or glitch filter value.

29.3
29.3.1

Enumeration Type Documentation
enum lptmr_pin_select_t

Enumerator
kLPTMR_PinSelectInput_0
kLPTMR_PinSelectInput_1
kLPTMR_PinSelectInput_2
kLPTMR_PinSelectInput_3

29.3.2

Pulse cou