LA 2451
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A B C D E 1 1 LongBeach 100 LA-2451 REV 0.4 Schematic 2 2 Desktop LGA-775 Package 3 3 RXC400M(RU400M)+SB400+ATI M22P/M24P(64/128MB VRAM) 2004-11-08 4 4 Title Compal Electronics, Inc. Cover Page THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number Custom Date: R ev 0.1 星期一, 十一月 08, 2004 Sheet E 1 of 53 A B C D E EAQ11 LA-2451 FUNCTION BLOCK DIAGRAM 4 Desktop Prescott LGA-775 775 pin CRT Conn. page 20 LCD Conn 1 ADM1032ARM PAGE 4,5,6 LCD Conn 2 page 19 Thermal Sensor 4 Clock Generator ICS951411AGT PAGE 5 CPU VID PAGE 13 FSB PCLK page 14,15,18 2.5GHz(1.2V) Bandwidth 4GB CB PWR SW 480MHz(5V) Primary ATA-100 (5V) PAGE 30 ATI-SB400 PCI BUS 33MHz (3.3V) TI-PCI7411 PAGE 30 SO-DIMM x 2(DDR) BANK 0,1,2,3 USB 2.0 Port *3 0,2,4 PAGE 36 IDE HDD Secondary ATA-100 (5V) PAGE 28 BATT CONN/OTP PAGE 44 CHARGER PAGE 45 3V/5V/12V PAGE 46 DDR_2.5V/1.25VEP PAGE 47 1.8V/VGA_CORE/1.25V PAGE 48 LPC BUS 33MHz (3.3V) PAGE 49 2 IDE ODD PAGE 35 AC-LINK 24.576MHz(3.3V) PAGE 29 PAGE 43 1.5V/PROCHOT PAGE 21,22,23,24,25 1394-Port 3 DCIN&DETECTOR PAGE 35 564 pin BGA PAGE 27,28 5in1 Socket TAITW PAGE 10,11,12 PAGE 7,8,9 USB Port 5-480MHz(5V) CARDBUS TPS2220ADBR Memory Bus A-Link Express x 4 PAGE 30 266/333/400MHz (2.5V) VGA M10P Embeded 703 pin BGA VGA DDR CHB 4M32/8M32-1.8V page 17 x2 New Card Cardbus Connecter TPS2231PWPR 2 PCI-Express x 16 PCI-E Port 2 NC PWR SW PAGE 42 PAGE 39 (ATI-RU400M) ATI-RC400M 2.5GHz(1.2V) Bandwidth 500MB VGA DDR CHA 4M32/8M32-1.8V page 16 x2 DC/DC Interface LID/Kill Switch Power Buttom W/INT VGA ATI-M22P/M24P PAGE 21 PAGE 13 page 19 3 RTC Battery ICS960011 LVDS & TV-OUT Conn. W/EXT VGA CHIP PAGE 41 PAGE 5 page 19 400/533/800MHz FANController AC97 CODEC ALC 250 CPU_CORE PAGE 50,51,52 Audio Amplifier APA2121 PAGE 34 PAGE 33 Audio Amplifier APA2121 5 in 1 PWR SW G528 RJ-45 PAGE 26 MDC Connector PAGE 30 LAN RTL8100CL Embedded Controller Embedded Controller ENE KB910 ENE KB910L PAGE 37 TP Board Connector PAGE 34 (LS-2371) PAGE 39 PAGE 41 CIR PAGE 53 PAGE 26 1 1 Mini PCI FOR WLAN PAGE 31 BIOS(1M) & I/O PORT Mini PCI Int. TV TunerPAGE 32 PAGE 38 Scan KB CIR Controller PAGE 37 Title Size Document Number Custom Date: A B C Compal Electronics, Inc. Block Digram PAGE 39 D R ev 0.1 星期六, 十一月 06, 2004 Sheet E 2 of 53 A B C D E Voltage Rails 1 2 Power Plane Description S1 S3 S5 VIN Adapter power supply (19V) ON ON ON B+ AC or battery power rail for power circuit. ON ON ON +CPU_CORE Core voltage for CPU ON OFF OFF +CPUVID 1.2V switched power rail for CPU AGTL Bus ON OFF OFF +VGA_CORE 1.0V/1.2V switched power rail for VGA chip ON OFF OFF +1.2VS 1.2VS for PCI-Express ON OFF OFF +1.25VS 1.25V switched power rail ON OFF OFF +1.5VS AGP 8X ON OFF OFF +1.8VS 1.8VS switched power rail ON OFF OFF +1.8VALW 1.8V always on power rail ON ON ON* +2.5V 2.5V power rail ON ON OFF OFF +2.5VS 2.5V switched power rail ON OFF +3VALW 3.3V always on power rail ON ON ON* +3VS 3.3V switched power rail ON OFF OFF +5VALW 5V always on power rail ON ON ON* +5VS 5V switched power rail ON OFF OFF +12VALW 12V always on power rail ON ON ON* +RTCVCC RTC power ON ON ON AD20 2 PIRQE/PIRQF/PIRQG/PIRQH AD22 1 PIRQG/PIRQC LAN REQ#/GNT# Mini-PCI(WLAN) AD18 3 PIRQF:PIRQG/PIRQC:PIRQD AD23 4 PIRQH:PIRQE/PIRQD:PIRQA 0 1 2 3 4 5 6 7 EC SM Bus2 address Device Address Device Address Smart Battery 0001 011X b ADM1032 1001 110X b EEPROM(24C16/02) 1010 000X b ICS960011 1101 110X b (24C04) Clock HIGH ON ON ON ON HIGH ON ON ON LOW S3 (Suspend to RAM) LOW HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW ON OFF OFF OFF 3.3V +/- 5% 100K +/- 5% Rb 0 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% NC 2 V AD_BID min 0 V 0.216 V 0.436 V 0.712 V 1.036 V 1.453 V 1.935 V 2.500 V Board ID 0 1 2 3 4 5 6 7 3 EC SM Bus1 address +VS HIGH Vcc Ra Interrupts Mini-PCI(TV-Tuner) +V Board ID Table for AD channel External PCI Devices IDSEL# +VALW 1 Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. CardBus(PCI7411) SLP_S3# SLP_S5# HIGH Full ON S1(Power On Suspend) Board ID Device SIGNAL STATE 1011 000Xb V AD_BID max 0 V 0.289 V 0.538 V 0.875 V 1.264 V 1.759 V 2.341 V 3.300 V V AD_BID typ 0 V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V PCB Revision 0.1 3 SB400 SM Bus address Device Address Clock Generator (ICS951411BGLFT) 1101 001Xb DDR DIMM0 1010 000Xb DDR DIMM2 1010 001Xb 4 4 Compal Electronics, Inc. Title Notes Size Document Number Custom R ev 0.1 Longbeach 100Date: A B C D 星期六, 十一月 06, 2004 Sheet E 3 of 53 A B C D E +CPU_CORE 7 H_A#[3..31] 1 +VTT_OUT_LEFT 2 62_0402_5% R179 H_BR0# 2 7 H_REQ#[0..4] H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 7 H_ADS# R598 1 +V_FSB_VTT 2 62_0402_5% H_IERR# H_BR0# 7 H_BPRI# 7 H_BNR# 7 H_LOCK# 13 CLK_BCLK 13 CLK_BCLK# 3 2 @1K_0402_5% 2 @1K_0402_5% H_BOOTSELECT LL_ID0 LL_ID1 A03# A04# A05# A06# A07# A08# A09# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# K4 J5 M6 K6 J6 D2 REQ0# REQ1# REQ2# REQ3# REQ4# ADS# U2 U3 AD3 AB2 AP0# AP1# BINIT# IERR# F3 G8 C2 C3 BR0# BPRI# BNR# LOCK# F28 G28 BCLK0 BCLK1 D4 E4 G7 7 H_HIT# 7 H_HITM# 7 H_DEFER# R5961 R5971 L5 P6 M5 L4 M4 R4 T5 U6 T4 U5 U4 V5 V4 W5 AB6 W6 Y6 Y4 AA4 AD6 AA5 AB5 AC5 AB4 AF5 AF4 AG6 AG4 AG5 AH4 AH5 AJ5 AJ6 Y1 V2 AA2 HIT# HITM# DEFER# BOOTSELECT LL_ID0 LL_ID1 1 U25 Y8 AJ12 AD27 U23 M23 AG29 N27 AM22 U28 K28 U8 AK18 AD8 K24 AH28 AH21 AK12 AH22 T29 AM14 AM25 AE9 Y29 AK25 AK19 AG15 J22 T24 AG21 AM21 J25 U30 AL21 AG25 AJ18 J19 AH30 J15 AG12 AJ22 J20 AH18 AH26 W27 AL25 AN8 AH14 U27 T23 R8 AK22 AN29 AG11 AK26 J10 AJ15 AG26 AN9 AH15 AF18 AL15 J26 J18 J21 AG27 AK15 AF11 AD23 AM15 AF8 AK21 AG30 Reserve for Testability +VTT_OUT_RIGHT LGA-775 (1/4) VCCP76 VCCP77 VCCP78 VCCP79 VCCP80 VCCP81 VCCP82 VCCP83 VCCP84 VCCP85 VCCP86 VCCP87 VCCP88 VCCP89 VCCP90 VCCP91 VCCP92 VCCP93 VCCP94 VCCP95 VCCP96 VCCP97 VCCP98 VCCP99 VCCP100 VCCP101 VCCP102 VCCP103 VCCP104 VCCP105 VCCP106 VCCP107 VCCP108 VCCP109 VCCP110 VCCP111 VCCP112 VCCP113 VCCP114 VCCP115 VCCP116 VCCP117 VCCP118 VCCP119 VCCP120 VCCP121 VCCP122 VCCP123 VCCP124 VCCP125 VCCP126 VCCP127 VCCP128 VCCP129 VCCP130 VCCP131 VCCP132 VCCP133 VCCP134 VCCP135 VCCP136 VCCP137 VCCP138 VCCP139 VCCP140 VCCP141 VCCP142 VCCP143 VCCP144 VCCP145 VCCP146 VCCP147 VCCP148 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 2 H_BOOTSELECT R587 @1K_0402_5% 1 AG22 K29 AM26 AL8 AE12 AE11 W23 W24 W25 T25 Y28 AL18 AC25 W30 Y30 AN14 AD28 Y26 AC29 M29 U24 J23 AC27 AM18 AM19 AB8 AC26 J8 J28 T30 AM9 AF15 AC8 AE14 N23 W29 U29 AC24 AC23 Y23 AN26 AN25 AN11 AN18 Y27 Y25 AD24 AE23 AE22 AN19 V8 K8 AE21 AM30 AE19 AC30 AE15 M30 K27 M24 AN21 T8 AC28 N25 AE18 W26 AD25 M8 N30 AD26 AJ26 AM29 M25 M26 L8 JP21A VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 VCCP25 VCCP26 VCCP27 VCCP28 VCCP29 VCCP30 VCCP31 VCCP32 VCCP33 VCCP34 VCCP35 VCCP36 VCCP37 VCCP38 VCCP39 VCCP40 VCCP41 VCCP42 VCCP43 VCCP44 VCCP45 VCCP46 VCCP47 VCCP48 VCCP49 VCCP50 VCCP51 VCCP52 VCCP53 VCCP54 VCCP55 VCCP56 VCCP57 VCCP58 VCCP59 VCCP60 VCCP61 VCCP62 VCCP63 VCCP64 VCCP65 VCCP66 VCCP67 VCCP68 VCCP69 VCCP70 VCCP71 VCCP72 VCCP73 VCCP74 VCCP75 1 H_D#[0..63] 7 D00# D01# D02# D03# D04# D05# D06# D07# D08# D09# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# B4 C5 A4 C6 A5 B6 B7 A7 A10 A11 B10 C11 D8 B12 C12 D11 G9 F8 F9 E9 D7 E10 D10 F11 F12 D13 E13 G13 F14 G14 F15 G15 G16 E15 E16 G18 G17 F17 F18 E18 E19 F20 E21 F21 G21 E22 D22 G22 D20 D17 A14 C15 C14 B15 C18 B16 A17 B18 C21 B21 B19 A19 A22 B22 H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 2 3 FOX_PE077507-0741-01 Reserve for Stability. +CPU_CORE 4 In Intel CPU datasheet: LL_ID[1:0], VTT_SEL, GTLREF_SEL and VID_SELECT are signals that are implement on the processor package. That is they are either connected directly to Vss or open lands. 4 Compal Electronics, Inc. Title LGA-775(1/3) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet E 4 of 53 D E AJ21 AM11 AL11 AJ11 K30 AL14 AN30 AH25 AL12 AJ9 AK11 AG14 N29 AL30 AJ25 AH9 J29 J11 K25 P8 K23 AL19 AM8 T26 N28 AH12 AL22 AN15 AJ8 U26 AJ19 T27 AK8 AN12 AG9 N26 AF9 AF22 AH11 AJ14 AH19 AH29 AH27 AG28 AL26 AM12 J24 J13 T28 W28 J12 J27 AG19 AL9 AD30 AF21 Y24 AK14 J9 M27 AF14 J30 AG18 AA8 AG8 AL29 AD29 W8 AH8 N24 AN22 J14 K26 AF19 N8 AF12 M28 AK9 2 C989 @1000P_0402_50V7K 1 +VTT_OUT_RIGHT ** R606 EDRDY#,H_PCREQ# is not a feature of the Pentium 4 processor in the 775-land package. Width : Space 10 :15(mil) 2.H_VCCIOPLL,HVCCA,HVSSA trace wide 12 mils( min) ITP_TCK ITP_TDI ITP_TMS ITP_TRST# AE1 AD1 AF1 AC1 AG1 H_VCCA C23 A23 2 1 LQG21F4R7N00_0805 H_VCCSENSE H_VSSSENSE 2 C680 33U_D2_8M_R35 1.Place cap within 600 mils of the VCCA and VSSA pins. R525 R586 R592 R585 +V_FSB_VTT H_ VSSA AK3 AJ3 15mil 2 2 2 2 1 1 1 1 AN5 AN6 AN3 AN4 B23 60.4_0402_1% 60.4_0402_1% 100_0402_1% 100_0402_1% COMP0 COMP1 COMP2 COMP3 A13 T1 G2 R1 DBSY# DRDY# BSEL0 BSEL1 BSEL2 LGA-775 (2/4) THERMDA THERMDC THERMTRIP# BPM0# BPM1# BPM2# BPM3# BPM4# BPM5# DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3# TCK TDI TDO TMS TRST# ADSTB0# ADSTB1# VCCIOPLL VCCA DBI0# DBI1# DBI2# DBI3# VCC_MB_REGULATION VSS_MB_REGULATION VCCSENSE VSSSENSE VSSA DBR# PROCHOT# ITP_CLK0 ITP_OUT1 MS_ID0 MS_ID1 COMP0 COMP1 COMP2 COMP3 MCERR# N4 P5 AC4 AE4 D23 AM5 D1 E5 F29 AK6 G6 AH2 N5 AE6 C9 G10 D16 A20 E23 E24 F23 H2 J2 J3 D14 F6 T2 Y3 AE3 E6 E7 B13 Note: Please change to 10uH, DC current of 120mA parts and close to cap DC Voltage drop from VTT to VCCA should be < 70mV +V_FSB_VTT 2 1 U37 2 H_THERMDC 2 3 33,37,53 EC_SMB_CK2 8 33,37,53 EC_SMB_DA2 7 D+ VDD1 D- ALERT# SCLK SDATA THERM# GND 1 6 4 2 1 C638 2 1 C650 2 +V_FSB_VTT +VTT_OUT_LEFT H_TESTHI2_7 R59 1 2 62_0402_5% +V_FSB_VTT H_TESTHI8 H_TESTHI9 H_TESTHI10 H_TESTHI11 H_TESTHI12 R192 R185 R191 R177 R176 1 1 1 1 1 2 2 2 2 2 B9 E12 G19 C17 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 7 7 7 7 R6 AD5 H_ADSTB#0 7 H_ADSTB#1 7 A8 G11 D19 C20 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 62_0402_5% 62_0402_5% 62_0402_5% 62_0402_5% 62_0402_5% +VTT_OUT_LEFT 2 7 7 7 7 1 2 R590 +V_FSB_VTT @62_0402_5% AC2 AL2 H_PROCHOT# 49 MS_ID[0:1] are provided to indicate the Market Segment for the processor and may be used for future processor compatibility. W1 V1 AB3 H_CPUSLP# L2 H_CPUSLP# 21 H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 50 50 50 50 50 50 3 +VTT_OUT_RIGHT H_VID0 H_VID1 H_VID3 H_VID4 H_VID5 H_VID2 1 R58 1 C658 2 2 2 62_0402_5% 2 62_0402_5% 7 7 7 7 680_0402_5% 680_0402_5% 2 R588 2 R174 1 1 5 6 7 8 680_1206_8P4R_5% 4 3 2 1 RP27 1 R51 2 1 R40 2 +3VS 1K_0402_5% 1K_0402_5% 1 R52 2 560_0402_5% Q6 H_CPU_CLKSEL0 3 1 CPU_CLKSEL0 8,13 MMBT3904_SOT23 +V_FSB_VTT C296 1 2 180P_0402_50V8J H_INIT# R149 1 2 200_0402_5% C294 1 2 180P_0402_50V8J H_A20M# R153 1 2 200_0402_5% C293 1 2 180P_0402_50V8J H_CPUSLP# R147 1 2 200_0402_5% C292 1 2 180P_0402_50V8J H_INTR R152 1 2 200_0402_5% C290 1 2 680P_0402_50V7K H_ NMI R154 1 2 200_0402_5% C295 1 2 180P_0402_50V8J H_SMI# R148 1 2 200_0402_5% C297 1 2 180P_0402_50V8J H_STPCLK# R151 1 2 200_0402_5% C289 1 2 180P_0402_50V8J H_IGNNE# R150 1 2 200_0402_5% C355 1 2 180P_0402_50V8J H_PW RGD R184 1 2 100_0402_1% 1 R55 2 1 R47 2 +3VS 1K_0402_5% 1K_0402_5% 1 R56 2 560_0402_5% Q7 H_CPU_CLKSEL1 3 1 CPU_CLKSEL1 8,13 MMBT3904_SOT23 +V_FSB_VTT 1 R44 2 1 R39 2 +3VS 1K_0402_5% 1K_0402_5% 1 R45 2 560_0402_5% Q4 H_CPU_CLKSEL2 3 1 CPU_CLKSEL2 8,13 MMBT3904_SOT23 +V_FSB_VTT +VTT_OUT_LEFT Compal Electronics, Inc. Title 5 LGA-775(2/3) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. ADM1032ARM_RM8 A R60 1 R175 1 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 R589 2 @10K_0402_5% 1 C788 C789 H_TESTHI0 H_TESTHI1 C8 G12 G20 A16 +V_FSB_VTT 2 0.1U_0402_16V4Z H_THERMDA 4 1 C340 F26 W3 F25 G25 G27 G26 G24 F24 G3 G4 H5 P1 W2 +3VS Thermal Sensor 2200P_0402_50V7K 1 C622 B 1 180P_0402_50V8J 1 2 AE8 10U_0805_10V4Z 1 C609 ITP_TMS 5 ITP_TDI 6 ITP_TCK 7 ITP_TRST# 8 1K_1206_8P4R_5% 4 3 2 1 RP26 +GTLREF H1 H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 VID_PW RGD +VTT_OUT_RIGHT +VTT_OUT_LEFT 2 @1K_0402_5% J16 H15 H16 J17 Reserve for Testability Un-used JTAG Pins, Place Close to the CPU +VTT_OUT_RIGHT 1 FOX_PE077507-0741-01 +V_FSB_VTT 6,50 VID_PW RGD +VTT_OUT_RIGHT +VTT_OUT_LEFT 10U_0805_10V4Z C793 Reserve for Testability 10U_0805_10V4Z 2 SLP# 2 @1K_0402_5% +V_FSB_VTT 10U_0805_10V4Z 1 3 1 1 R593 1 2 R188 @62_0402_5% +VTT_OUT_LEFT 10U_0805_10V4Z 3 MAINPWON 43,44,46 2 0.1U_0402_16V4Z Q47 1 2 2 R583 300_0402_5% Q46 MMBT3904_SOT23 2 R584 1 62_0402_5% H_THERMTRIP# 1 R608 2 1 100K_0805_5% MMBT3904_SOT23 3 H_PCREQ# 7 2 L49 AJ2 AJ1 AD2 AG2 AF2 AG3 LQG21F4R7N00_0805 2 1 M2 ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 C794 2 L48 1 + +V_FSB_VTT 62_0402_5% 62_0402_5% 62_0402_5% 62_0402_5% 62_0402_5% 62_0402_5% 2 2 2 2 2 2 H_ E DRDY# 7 2 2 1 1 1 1 1 1 2 0_0402_5% 2 0_0402_5% VID5 VID4 VID3 VID2 VID1 VID0 H_THERMTRIP# R602 R603 R599 R601 R600 R178 AL1 AK1 TESTHI00 TESTHI01 TESTHI02 TESTHI03 TESTHI04 TESTHI05 TESTHI06 TESTHI07 TESTHI08 TESTHI09 TESTHI10 TESTHI11 TESTHI12 VTT_SEL H_THERMDA H_THERMDC +VTT_OUT_RIGHT G5 AL4 AK4 AL6 AM3 AL5 AM2 7 H_DBSY# 7 H_ DR DY# SKTOCC# VTT_OUT1 VTT_OUT2 B2 C1 H_CPU_CLKSEL0 G29 H_CPU_CLKSEL1 H30 H_CPU_CLKSEL2 G30 LINT0 LINT1 INIT# RESET# F27 1 2 R595CPU_RESET# 62_0402_5% K1 L1 P3 G23 GTLREF VTTPWRGD 21 H_INTR 21 H_NMI 21 H_INIT# 1 R591 1 R186 F2 2 DP0# DP1# DP2# DP3# A20M# FERR#/PBE# IGNNE# SMI# PWRGOOD STPCLK# AA1 J1 +VTT_OUT_LEFT H_INTR H_ NMI H_INIT# CPU_RESET# K3 R3 N2 P2 N1 M3 PCREQ# AM6 H_A20M# H_FERR# H_IGNNE# H_SMI# H_PW RGD H_STPCLK# 21 H_A20M# 21 H_FERR# 21 H_IGNNE# 21 H_SMI# 21 H_PW RGD 21 H_STPCLK# EDRDY# RS0# RS1# RS2# RSP# TRDY# VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 7 H _TRDY# B3 F5 A3 H4 E3 A29 B25 B29 B30 C29 A26 B27 C28 A25 A28 A27 C30 A30 C25 C26 C27 B26 D27 D28 D25 D26 B28 D29 D30 H_ RS#0 H_ RS#1 H_ RS#2 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 7 H_RS#[0..2] 1U_0603_10V4Z +GTLREF 1 R605 1 JP21B CPU_RESET# 2 0_0402_5% 2 @0_0402_5% 100_0402_1% 7 H_RESET# VCCP149 VCCP150 VCCP151 VCCP152 VCCP153 VCCP154 VCCP155 VCCP156 VCCP157 VCCP158 VCCP159 VCCP160 VCCP161 VCCP162 VCCP163 VCCP164 VCCP165 VCCP166 VCCP167 VCCP168 VCCP169 VCCP170 VCCP171 VCCP172 VCCP173 VCCP174 VCCP175 VCCP176 VCCP177 VCCP178 VCCP179 VCCP180 VCCP181 VCCP182 VCCP183 VCCP184 VCCP185 VCCP186 VCCP187 VCCP188 VCCP189 VCCP190 VCCP191 VCCP192 VCCP193 VCCP194 VCCP195 VCCP196 VCCP197 VCCP198 VCCP199 VCCP200 VCCP201 VCCP202 VCCP203 VCCP204 VCCP205 VCCP206 VCCP207 VCCP208 VCCP209 VCCP210 VCCP211 VCCP212 VCCP213 VCCP214 VCCP215 VCCP216 VCCP217 VCCP218 VCCP219 VCCP220 VCCP221 VCCP222 VCCP223 VCCP224 VCCP225 VCCP226 1 R604 1 R582 21 LDT_RST# GTLREF Voltage should be 0.63*VTT=0.75V 2 C 1 B +CPU_CORE 169_0402_1% A C D Size Document Number C ustomLongbeach 100 D ate: Rev 0.1 星期六 , 十一月 06, 2004 Sheet E 5 of 53 4 A B C D E Place all 10U_0805_6.3V6M of 8 pcs inside CPU socket cavity all 10U_0805_6.3V6M of 8 pcs on another sideof CPU socket cavity +CPU_CORE Place 1 H29This pin in CPU is GTLREF_SEL, but not VSS. C260 1 1 C267 1 C274 1 C282 1 C259 C266 1 1 C273 C281 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 2 2 2 2 2 2 2 2 1 1 +CPU_CORE JP21C A12 A15 A18 A2 A21 A24 A6 A9 AA23 AA24 AA25 AA26 AA27 AA28 AA29 AA3 AA30 AA6 AA7 AB1 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30 AB7 AC3 AC6 AC7 AD4 AD7 AE10 AE13 AE16 AE17 AE2 AE20 AE24 AE25 AE26 AE27 AE28 AE29 AE30 AE5 AE7 AF10 AF13 AF16 AF17 AF20 AF23 AF24 AF25 AF26 AF27 AF28 AF29 AF3 AF30 AF6 AF7 AG10 AG13 AG16 AG17 2 3 JP21D LGA-775 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 (3/4) AG20 AG23 AG24 AG7 AH1 AH10 AH13 AH16 AH17 AH20 AH23 AH24 AH3 AH6 AH7 AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ24 AJ27 AJ28 AJ29 AJ30 AJ4 AJ7 AK10 AK13 AK16 AK17 AK2 AK20 AK23 AK24 AK27 AK28 AK29 AK30 AK5 AK7 AL10 AL13 AL16 AL17 AL20 AL23 AL24 AL27 AL28 AL3 AL7 AM1 AM10 AM13 AM16 AM17 AM20 AM23 AM24 AM27 AM28 AM4 AM7 AN1 AN10 AN13 AN16 LGA-775 AN17 AN2 AN20 AN23 AN24 AN27 AN28 AN7 B1 B11 B14 B17 B20 B24 B5 B8 C10 C13 C16 C19 C22 C24 C4 C7 D12 D15 D18 D21 D24 D3 D5 D6 D9 E11 E14 E17 E2 E20 E25 E26 E27 E28 E29 E8 F10 F13 F16 F19 F22 F4 F7 G1 H10 H11 H12 H13 H14 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 (4/4) VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 1 H29 H3 H6 H7 H8 H9 J4 J7 K2 K5 K7 L23 L24 L25 L26 L27 L28 L29 L3 L30 L6 L7 M1 M7 N3 N6 N7 P23 P24 P25 P26 P27 P28 P29 P30 P4 P7 R2 R23 R24 R25 R26 R27 R28 R29 R30 R5 R7 T3 T6 T7 U1 U7 V23 V24 V25 V26 V27 V28 V29 V3 V30 V6 V7 W4 W7 Y2 Y5 Y7 1 R57 2 @1K_0402_5% Reserve for Testability P4 Processor output GTLREF_SEL = 0 C719 1 C238 A 1 C741 C746 1 C252 1 C276 1 C285 1 C747 C710 1 1 C703 C709 1 C702 1 1 C226 1 C227 1 C283 1 C284 C701 1 1 C700 C748 2 +CPU_CORE 1 C231 1 1 C232 1 C245 C246 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 2 2 2 2 SANYO OS-CON 820uF _ERS7m ohm* 6 SANYO OS-CON 220uF _ERS13m ohm* 8 820U_E9_2.5V_M_R7 (P/N:CB8200WM000) +CPU_CORE 820U_E9_2_5V_M_R7 1 820U_E9_2_5V_M_R7 1 + C688 2 1 + C726 1 + C753 2 2 820U_E9_2_5V_M_R7 1 + C599 3 + C585 2 2 820U_E9_2_5V_M_R7 820U_E9_2_5V_M_R7 +CPU_CORE 220U_C6_6.3V_M_R15 1 220U_C6_6.3V_M_R15 1 1 + C675 1 + C598 1 + C597 + C596 2 2 2 2 2 220U_C6_6.3V_M_R15 220U_C6_6.3V_M_R15 +CPU_CORE 1 14 2 220U_C6_6.3V_M_R15 I VID_PW RGD 5,50 1 O 12 D Q15 2 G S 2N7002_SOT23 Decoupling Reference Document: Grantsdale Chipset Platform Design guide Rev1.2 (15434)Page263 7 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 2 220U_C6_6.3V_M_R15 1 1 + C594 + C595 2 4 2 220U_C6_6.3V_M_R15 3 13 G 10 VID_PW RGD + C593 U39F P U39E O G I 7 1 MMBT3904_SOT23 1 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 2 2 2 2 2 2 2 2 1 2 Q68 2 1 220U_C6_6.3V_M_R15 3 1 1U_0603_10V6K C992 C730 680_0402_5% P 14 2 1 10K_0402_5% 2 1 R723 20K_0402_1% 1 C720 FOX_PE077507-0741-01 +3VALW 11 2 4 R722 1 R721 2.4K_0402_5% 1 C745 +CPU_CORE R195 +3VALW 1 C740 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 2 2 2 2 2 2 2 2 +VTT_OUT_LEFT +V_FSB_VTT 1 C729 +CPU_CORE + C762 FOX_PE077507-0741-01 1 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 2 2 2 2 2 2 2 2 Decoupling Reference Requirement: 560uF Polymer, ESR:6m ohm(each) * 10 22uF X5R * 8 10uF X5R * 10 Compal Electronics, Inc. Title LGA-775(3/3) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B C D Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet E 6 of 53 A B C H_D#[0..63] 4 H_DINV#[0..3] 5 H_DSTBN#[0..3] 5 H_DSTBP#[0..3] 5 4 H_A#[3..31] 4 H_REQ#[0..4] 5 H_RS#[0..2] D H_ADS# H_BNR# H_BPRI# H_DEFER# H_D RDY# H_DBSY# 4 H_LOCK# F25 F24 E23 E25 G24 F23 CPU_ADS# CPU_BNR# CPU_BPRI# CPU_DEFER# CPU_DRDY# CPU_DBSY# E27 CPU_LOCK# C11 H_RS#2 D23 H_RS#1 G23 H_RS#0 E26 5 H_RESET# F22 D26 E24 5 H_TRDY# 4 H_HIT# 4 H_HITM# CPU_CPURSET# CPU_RS2# CPU_RS1# CPU_RS0# CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36# CPU_D37# CPU_D38# CPU_D39# CPU_D40# CPU_D41# CPU_D42# CPU_D43# CPU_D44# CPU_D45# CPU_D46# CPU_D47# CPU_DBI2# CPU_DSTBN2# CPU_DSTBP2# C18 H_D#32 F19 H_D#33 E19 H_D#34 A18 H_D#35 D19 H_D#36 B18 H_D#37 C17 H_D#38 B17 H_D#39 E17 H_D#40 B16 H_D#41 C15 H_D#42 A15 H_D#43 B15 H_D#44 F16 H_D#45 G18 H_D#46 F18 H_D#47 C16 H_DINV#2 D18 H_DSTBN#2 E18 H_DSTBP#2 CPU_COMP_N HRCOMP B11 CPU_COMP_P CPU_VREF 1 C170 180P_0402_50V8J H22 D25 E11 G22 2 Place C close to Ball H22 CPU_VREF RESERVED0 RESERVED1 RESERVED2 DATA GROUP 3 3 HSCOMP D11 MISC. *** CPU_D48# CPU_D49# CPU_D50# CPU_D51# CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59# CPU_D60# CPU_D61# CPU_D62# CPU_D63# CPU_DBI3# CPU_DSTBN3# CPU_DSTBP3# E16 H_D#48 D16 H_D#49 C14 H_D#50 B14 H_D#51 E15 H_D#52 D15 H_D#53 C13 H_D#54 E14 H_D#55 F13 H_D#56 B13 H_D#57 A12 H_D#58 C12 H_D#59 E12 H_D#60 D13 H_D#61 D12 H_D#62 B12 H_D#63 E13 H_DINV#3 F15 H_DSTBN#3 G15 H_DSTBP#3 L4 K4 GFX_RX1N GFX_RX1P NBGFX_RXN2 NBGFX_RXP2 L5 L6 GFX_RX2N GFX_RX2P +1.2VS 2 2 2 2 SB_A_RXN0 C718 SB_A_RXP0 1 C714 SB_A_RXN1 C711 SB_A_RXP1 1 NB_A_RXN0 C708 NB_A_RXP0 NB_A_RXN1 NB_A_RXP1 1 1 1 1 N2 N1 NBGFX_TXN0 NBGFX_TXP0 GFX_TX1N GFX_TX1P R2 P2 NBGFX_TXN1 NBGFX_TXP1 GFX_TX2N GFX_TX2P T1 R1 NBGFX_TXN2 NBGFX_TXP2 GFX_TX3N GFX_TX3P U2 T2 NBGFX_TXN3 NBGFX_TXP3 GFX_TX0N GFX_TX0P NBGFX_RXN3 NBGFX_RXP3 M4 M5 GFX_RX3N GFX_RX3P NBGFX_RXN4 NBGFX_RXP4 P4 N4 GFX_RX4N GFX_RX4P GFX_TX4N GFX_TX4P V1 V2 NBGFX_TXN4 NBGFX_TXP4 NBGFX_RXN5 NBGFX_RXP5 P5 P6 GFX_RX5N GFX_RX5P GFX_TX5N GFX_TX5P W2 W1 NBGFX_TXN5 NBGFX_TXP5 NBGFX_RXN6 NBGFX_RXP6 R4 R5 GFX_RX6N GFX_RX6P GFX_TX6N GFX_TX6P AA2 Y2 NBGFX_TXN6 NBGFX_TXP6 NBGFX_RXN7 NBGFX_RXP7 T3 T4 GFX_RX7N GFX_RX7P GFX_TX7N GFX_TX7P AB1 AA1 NBGFX_TXN7 NBGFX_TXP7 NBGFX_RXN8 NBGFX_RXP8 U5 U6 GFX_RX8N GFX_RX8P GFX_TX8N GFX_TX8P AC2 AB2 NBGFX_TXN8 NBGFX_TXP8 NBGFX_RXN9 NBGFX_RXP9 V4 V5 GFX_RX9N GFX_RX9P GFX_TX9N GFX_TX9P AD1 AD2 NBGFX_TXN9 NBGFX_TXP9 NBGFX_RXN10 NBGFX_RXP10 W3 W4 GFX_RX10N GFX_RX10P GFX_TX10N GFX_TX10P AE2 AE1 NBGFX_TXN10 NBGFX_TXP10 NBGFX_RXN11 NBGFX_RXP11 Y5 Y6 GFX_RX11N GFX_RX11P GFX_TX11N GFX_TX11P AG2 NBGFX_TXN11 AF2 NBGFX_TXP11 NBGFX_RXN12 NBGFX_RXP12 AA4 AA5 GFX_RX12N GFX_RX12P GFX_TX12N GFX_TX12P AH1 NBGFX_TXN12 AG1 NBGFX_TXP12 NBGFX_RXN13 NBGFX_RXP13 AB3 AB4 GFX_RX13N GFX_RX13P GFX_TX13N GFX_TX13P AJ2 AH2 NBGFX_TXN13 NBGFX_TXP13 NBGFX_RXN14 NBGFX_RXP14 AC5 AC6 GFX_RX14N GFX_RX14P GFX_TX14N GFX_TX14P AJ4 AJ3 NBGFX_TXN14 NBGFX_TXP14 NBGFX_RXN15 NBGFX_RXP15 AD4 AD5 GFX_RX15N GFX_RX15P GFX_TX15N GFX_TX15P AJ5 AK4 NBGFX_TXN15 NBGFX_TXP15 GFX_CLKN GFX_CLKP M1 M2 Place R Close to Ball 10K_0402_1% 10K_0402_1% 100_0402_1% 150_0402_1% GFX_RX0N GFX_RX0P PART 3 OF 6 J4 J5 NBGFX_RXN1 NBGFX_RXP1 R519 PCE_RXISET R520 PCE_TXISET R115PCE_NCAL R124 PCE_PCAL 10 10 10 10 mils mils mils mils NB_A_TXN0 1 2 0.1U_0402_10V6K NB_A_TXP0 2 NB_A_TXN1 0.1U_0402_10V6K NB_A_TXP1 1 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 13 CLK_PCIE_MCH-ICH# 13 CLK_PCIE_MCH-ICH AJ12 AK13 AG12 AH12 PCE_ISET PCE_TXISET PCE_NCAL PCE_PCAL AJ11 AJ10 AK10 AK9 SB_TX0N SB_TX0P SB_TX1N SB_TX1P AG10 AG9 AF10 AE9 SB_RX0N SB_RX0P SB_RX1N SB_RX1P L2 K2 SB_CLKN SB_CLKP PCI EXPRESS I/F C19 H_D#16 C23 H_D#17 C20 H_D#18 C22 H_D#19 B22 H_D#20 B23 H_D#21 C21 H_D#22 B24 H_D#23 E21 H_D#24 B21 H_D#25 B20 H_D#26 G19 H_D#27 F21 H_D#28 B19 H_D#29 E20 H_D#30 D21 H_D#31 A21 H_DINV#1 D22 H_DSTBN#1 E22 H_DSTBP#1 NBGFX_RXN0 NBGFX_RXP0 PCI EXPRESS I/F DATA GROUP 0 DATA GROUP 1 ADDR. GROUP 0 CPU_TRDY# CPU_HIT# CPU_HITM# CPU_D16# CPU_D17# CPU_D18# CPU_D19# CPU_D20# CPU_D21# CPU_D22# CPU_D23# CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28# CPU_D29# CPU_D30# CPU_D31# CPU_DBI1# CPU_DSTBN1# CPU_DSTBP1# +V_FSB_VTT 2 1R94 27.4_0402_1% 2 1R484 47_0402_1% Place AC capacitors close to transmiter In this case, these caps should place close to NB ASIC RC400M 4 4 4 4 5 5 CPU_D0# CPU_D1# CPU_D2# CPU_D3# CPU_D4# CPU_D5# CPU_D6# CPU_D7# CPU_D8# CPU_D9# CPU_D10# CPU_D11# CPU_D12# CPU_D13# CPU_D14# CPU_D15# CPU_DBI0# CPU_DSTBN0# CPU_DSTBP0# H_D#0 E28 H_D#1 D28 H_D#2 D29 H_D#3 C29 H_D#4 D30 H_D#5 C30 H_D#6 B29 H_D#7 C28 H_D#8 C26 H_D#9 B25 H_D#10 B27 C25 H_D#11 A27 H_D#12 C24 H_D#13 A24 H_D#14 B26 H_D#15 C27 H_DINV#0 A28 H_DSTBN#0 B28 H_DSTBP#0 A-LINK EXPRESS I/F 5 H_ADSTB#1 CPU_A17# CPU_A18# CPU_A19# CPU_A20# CPU_A21# CPU_A22# CPU_A23# CPU_A24# CPU_A25# CPU_A26# CPU_A27# CPU_A28# CPU_A29# CPU_A30# CPU_A31# CPU_ADSTB1# DATA GROUP 2 2 M28 K29 K30 J26 L28 L29 M30 K27 M29 K26 N28 L26 N25 L25 N24 L27 RC400MCPU I/F H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 ADDR. GROUP 1 5 H_ADSTB#0 CPU_A3# CPU_A4# CPU_A5# CPU_A6# CPU_A7# CPU_A8# CPU_A9# CPU_A10# CPU_A11# CPU_A12# CPU_A13# CPU_A14# CPU_A15# CPU_A16# CPU_REQ0# CPU_REQ1# CPU_REQ2# CPU_REQ3# CPU_REQ4# CPU_ADSTB0# VGA_PCIE_RXN[0..15] 14 VGA_PCIE_RXP[0..15] 14 U33C CONTROL 1 G28 H26 G27 G30 G29 G26 H28 J28 H25 K28 H29 J29 K24 K25 F29 G25 F26 F28 E29 H27 PART 1 OF 6 U33A H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 E 14 NBGFX_RXN[0..15] 14 NBGFX_RXP[0..15] GPP_TX0N/SB_TX2N GPP_TX0P/SB_TX2P GPP_TX1N/SB_TX3N GPP_TX1P/SB_TX3P GPP_TX2N GPP_TX2P GPP_TX3N GPP_TX3P GPP_RX0N/SB_RX2N GPP_RX0P/SB_RX2P GPP_RX1N/SB_RX3N GPP_RX1P/SB_RX3P GPP_RX2N GPP_RX2P GPP_RX3N GPP_RX3P 1 C607 1 C620 1 C617 1 C635 1 C637 1 C648 1 C644 1 C660 1 C656 1 C667 1 C664 1 C670 1 C669 1 C677 1 C676 1 C683 1 2 2C604 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C626 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C621 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C640 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C634 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C653 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C651 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C662 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C661 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C665 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C666 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C672 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C671 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C679 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C678 0.1U_0402_10V6K 0.1U_0402_10V6K 1 2 2C684 0.1U_0402_10V6K 0.1U_0402_10V6K VGA_PCIE_RXN0 VGA_PCIE_RXP0 VGA_PCIE_RXN1 VGA_PCIE_RXP1 VGA_PCIE_RXN2 VGA_PCIE_RXP2 1 VGA_PCIE_RXN3 VGA_PCIE_RXP3 VGA_PCIE_RXN4 VGA_PCIE_RXP4 VGA_PCIE_RXN5 VGA_PCIE_RXP5 VGA_PCIE_RXN6 VGA_PCIE_RXP6 VGA_PCIE_RXN7 VGA_PCIE_RXP7 VGA_PCIE_RXN8 VGA_PCIE_RXP8 VGA_PCIE_RXN9 VGA_PCIE_RXP9 VGA_PCIE_RXN10 VGA_PCIE_RXP10 VGA_PCIE_RXN11 VGA_PCIE_RXP11 VGA_PCIE_RXN12 VGA_PCIE_RXP12 2 VGA_PCIE_RXN13 VGA_PCIE_RXP13 VGA_PCIE_RXN14 VGA_PCIE_RXP14 VGA_PCIE_RXN15 VGA_PCIE_RXP15 CLK_PCIE_MCH-VGA# 13 CLK_PCIE_MCH-VGA 13 AJ9 AJ8 AF6 AE6 AK6 AJ6 AF4 AE4 AG8 AF8 AG7 AG6 AJ7 AK7 AH4 AG4 NB_A_TXN2 NB_A_TXP2 C704 NB_A_TXN3 C697 NB_A_TXP3 C216 NB_PCIEC_TXN0 C209 NB_PCIEC_TXP0 C690 C687 1 1 1 1 1 1 2 2 2 2 2 2 SB_A_RXN2 SB_A_RXP2 SB_A_RXN3 SB_A_RXP3 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K PCIEC_RXN0 30 PCIEC_RXP0 30 NB_A_RXN2 NB_A_RXP2 NB_A_RXN3 NB_A_RXP3 NB_PCIEC_RXN0 30 NB_PCIEC_RXP0 30 3 SB_A_RXN[0..3] 21 SB_A_RXP[0..3] 21 NB_A_RXN[0..3] 21 NB_A_RXP[0..3] 21 To SB A-PCIE Link 5 H_PCREQ# 216CPP4AKA21HK_BGA707 5 H _EDRDY# 216CPP4AKA21HK_BGA707 1 +V_FSB_VTT CPU_VREF Trace=12Mil Space=15Mil 2 R100 49.9_0402_1% CPU_VREF 4 R102 100_0402_1% 2 2 1 *** 1 C179 1U_0603_10V4Z 4 Compal Electronics, Inc. Title RC400M-FSB,PCIE,A-PCIE(1/3) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet E 7 of 53 A B C D E D9 C E9 COMP 1 2 C243 1 2 DDR_SCS#0 DDR_SCS#1 DDR_SCS#2 DDR_SCS#3 0.1U_0402_10V6K R119 0.1U_0402_10V6K 1K_0603_1% 2 1 1K_0603_1% 2 1 +2.5V R114 1 2 DDR_SCKE0 DDR_SCKE1 DDR_SCKE2 DDR_SCKE3 AH29 AG29 AH28 AF29 AG30 AE28 AC30 MEM_VMODE: 0V:DDR Y30 R5351 2 1K_0402_5% AD28 MEM_CAP1 10mil AJ14 MEM_CAP2 10mil N30 MEM_COMPP 10mil AJ15 MEM_COMPN 10mil AE29 +DDR_VREF 20mil AB27 DD R_DQS0 AH17 AJ18 MEM_DQS0N MEM_DQS0P DD R_DQS1 AF15 AE14 MEM_DQS1N MEM_DQS1P DD R_DQS2 AE22 AF22 MEM_DQS2N MEM_DQS2P DD R_DQS3 AF26 AE25 MEM_DQS3N MEM_DQS3P C235 +DDR_VREF 1 2 C236 DD R_DQS4 W26 W27 MEM_DQS4N MEM_DQS4P DD R_DQS5 AB30 AB29 MEM_DQS5N MEM_DQS5P DD R_DQS6 R25 P25 MEM_DQS6N MEM_DQS6P DD R_DQS7 R30 R29 PART 2 OF 6 ADDRESS MEM_CS#0 MEM_CS#1 MEM_CS#2 MEM_CS#3 MEM_ODT0 MEM_ODT1 MEM_ODT2/RSV2 MEM_ODT3/RSV3 MEM_VMODE MEM_CAP1 MEM_CAP2 MEM_COMPP MEM_COMPN MEM_VREF G1 OSCIN 1 R466 F1 OSCOUT 2 G2 10K_0402_5% TVCLKIN J1 CPU_CLKP K1 CPU_CLKN 13 CLK_NB_BCLK 13 CLK_NB_BCLK# N B_EDID_CLK NB_EDID_DATA NB_DVI_DDCDATA STRP_DATA TESTMODE 19 NB_EDID_CLK 19 NB_EDID_DATA R469 D2 C1 H3 D1 C4 AH13 AJ13 LVDS_BLON LVDS_DIGON LVDS_BLEN G3 E2 F2 LVDS_ENBKL 1 R743 2 @4.7K_0402_5% LVDS_ENVDD 1 2 @4.7K_0402_5% R744 R1251 2 @4.7K_0402_5% 1 2 R1231 2 2.2K_0402_5% R786 5.6K_0402_5% +3VS MEM_DM0 MEM_DM1 MEM_DM2 MEM_DM3 MEM_DM4 MEM_DM5 MEM_DM6 MEM_DM7 I2C_CLK I2C_DATA DDC_DATA STRP_DATA TESTMODE THERMALDIODE_P THERMALDIODE_N NB_PWRGD BMREQ# H2 BM_REQ# TMDS_HPD J2 DDR_SCS#[0..3] D DR_SMA[0..13] +1.8VS +2.5V NB_RST# 14,21,30 NB_SUS_STAT# 22 NB_PWRGD 23 BM_REQ# 21 +3VS C997 1 R772 14 ENBKLS NB_EDID_DATA 1 R456 2 4.7K_0402_5% LVDS_ENBKL 1 R773 1 R476 2 4.7K_0402_5% 2 0_0402_5% 2 1 @0_0402_5% NB_PWRGD 2 B A 0.1U_0402_16V4Z U50 Y 4 ENBKL 37,53 TC7SH08FU_SSOP5 +3VS 2 C995 @0.1U_0402_10V6K 1 2 3 4 NC A1 A2 VSS VCC WP SCL SDA *** R727 @1K_0402_5% 1 U49 8 7 6 5 3 +3VS C998 N B_EDID_CLK STRP_DATA 1 ** DDR_DM0 DDR_DM1 DDR_DM2 DDR_DM3 DDR_DM4 DDR_DM5 DDR_DM6 DDR_DM7 LVDS_ENVDD 1 R776 1 R777 14 ENVDDS 2 2 @0_0402_5% B U51 Y A 4 0.1U_0402_16V4Z 1 R774 1 R775 2 0_0402_5% 2 @0_0402_5% ENVDD 19 NB_ENVDD 19 TC7SH08FU_SSOP5 2 0_0402_5% NB STRAPING PINS N B_DDC_CLK DDR_D M[0..7] NB_TXCLK- 19 NB_TXCLK+ 19 R471 10K_0402_5% 2 4.7K_0402_5% 2 4.7K_0402_5% 2 4.7K_0402_5% CPU_CLKSEL2 5,13 CPU_CLKSEL1 5,13 CPU_CLKSEL0 5,13 216CPP4AKA21HK_BGA707 DDR_DQ[0..63] 19 19 19 19 19 19 2 N B_EDID_CLK NB_DVI_DDCDATA 1 R470 2 @4.7K_0402_5% MEM_DQS7N MEM_DQS7P DDR_DQS[0..7] 1 ** 216CPP4AKA21HK_BGA707 BM_REQ# R467 1 NB_CR T_HSYNC R468 1 NB_CRT_VSYNC R460 1 4 NB_TXCLKNB_TXCLK+ A3 AH14 E3 SYSRESET# SUS_STAT# POWERGOOD @AT24C04N-10SI-2.7_SO8~D AJ17 AG15 AE20 AF25 Y27 AB28 R26 R28 NB_TXOUT0NB_TXOUT0+ NB_TXOUT1NB_TXOUT1+ NB_TXOUT2NB_TXOUT2+ *** Low: Normal Mode(Fixed) High: Test Mode 1 R450 2 4.7K_0402_5% NB_TZCLK- 19 NB_TZCLK+ 19 1 MEM_CK5N MEM_CK5P MEM_CKE0 MEM_CKE1 MEM_CKE2 MEM_CKE3 *** 10,11 10,11 11 11 DATA C731 13 NB_PCLK 19 19 19 19 19 19 2 W29 W28 AH20 AJ20 AE24 AE21 13 CLK_NB_14M 5 MEM_CK4N MEM_CK4P *** DACSCL DACSDA 2 NB_TXOUT0NB_TXOUT0+ NB_TXOUT1NB_TXOUT1+ NB_TXOUT2NB_TXOUT2+ P AG17 AF17 1C125 @15P_0402_50V8D 2 1 R459 10_0402_5% 2 1 R462 @10_0402_5% RSET B2 C2 E5 F5 D5 C5 E6 D6 E7 E8 G6 F6 G MEM_CK3N MEM_CK3P 11 DDR_CLK4# 11 DDR_CLK4 RC400M MEMORY I/F R526 0.47U_0603_10V7K MEM_COMPN MEM_COMPP MEM_CAP1 MEM_CAP2 B10 15mil TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXOUT_L3N TXOUT_L3P TXCLK_LN TXCLK_LP 3 11 DDR_CLK3# 11 DDR_CLK3 AC24 AC23 RSET 1 2 R480 715_0402_1% 20 NB_DDC_CLK 20 NB_DDC_DATA DACHSYNC DACVSYNC 5 MEM_CK2N MEM_CK2P C3 B3 P V29 V30 20 NB_CRT_HSYNC 20 NB_CRT_VSYNC NB_TZOUT0NB_TZOUT0+ NB_TZOUT1NB_TZOUT1+ NB_TZOUT2NB_TZOUT2+ NB_TZCLKNB_TZCLK+ G MEM_CK1N MEM_CK1P BLUE NB_TZOUT0NB_TZOUT0+ NB_TZOUT1NB_TZOUT1+ NB_TZOUT2NB_TZOUT2+ 3 AF16 AE16 20 NB_CRT_B B4 A4 B5 C6 B6 A6 B7 A7 F7 F8 1 10 DDR_CLK1# 10 DDR_CLK1 GREEN D10 TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXOUT_U3N TXOUT_U3P TXCLK_UN TXCLK_UP 2 MEM_CK0N MEM_CK0P E10 2 AC26 AC25 AJ16 AH16 AJ19 AH19 AH15 AK16 AH18 AK19 AF13 AF14 AE19 AF19 AE13 AG13 AF18 AE17 AF20 AF21 AG23 AF24 AG19 AG20 AG22 AF23 AD25 AG25 AE27 AD27 AE23 AD24 AE26 AD26 AA25 Y26 W24 U25 AA26 Y25 V26 W25 AC28 AC29 AA29 Y29 AD30 AD29 AA30 Y28 U27 T27 N26 M27 U26 T26 P27 P26 U29 T29 P29 N29 U28 T28 P28 N27 RED 20 NB_CRT_G 1 10 DDR_CLK0# 10 DDR_CLK0 MEM_RAS# MEM_CAS# MEM_WE# MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8 MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_DQ16 MEM_DQ17 MEM_DQ18 MEM_DQ19 MEM_DQ20 MEM_DQ21 MEM_DQ22 MEM_DQ23 MEM_DQ24 MEM_DQ25 MEM_DQ26 MEM_DQ27 MEM_DQ28 MEM_DQ29 MEM_DQ30 MEM_DQ31 MEM_DQ32 MEM_DQ33 MEM_DQ34 MEM_DQ35 MEM_DQ36 MEM_DQ37 MEM_DQ38 MEM_DQ39 MEM_DQ40 MEM_DQ41 MEM_DQ42 MEM_DQ43 MEM_DQ44 MEM_DQ45 MEM_DQ46 MEM_DQ47 MEM_DQ48 MEM_DQ49 MEM_DQ50 MEM_DQ51 MEM_DQ52 MEM_DQ53 MEM_DQ54 MEM_DQ55 MEM_DQ56 MEM_DQ57 MEM_DQ58 MEM_DQ59 MEM_DQ60 MEM_DQ61 MEM_DQ62 MEM_DQ63 DDR _DQ0 DDR _DQ1 DDR _DQ2 DDR _DQ3 DDR _DQ4 DDR _DQ5 DDR _DQ6 DDR _DQ7 DDR _DQ8 DDR _DQ9 DD R_DQ10 DD R_DQ11 DD R_DQ12 DD R_DQ13 DD R_DQ14 DD R_DQ15 DD R_DQ16 DD R_DQ17 DD R_DQ18 DD R_DQ19 DD R_DQ20 DD R_DQ21 DD R_DQ22 DD R_DQ23 DD R_DQ24 DD R_DQ25 DD R_DQ26 DD R_DQ27 DD R_DQ28 DD R_DQ29 DD R_DQ30 DD R_DQ31 DD R_DQ32 DD R_DQ33 DD R_DQ34 DD R_DQ35 DD R_DQ36 DD R_DQ37 DD R_DQ38 DD R_DQ39 DD R_DQ40 DD R_DQ41 DD R_DQ42 DD R_DQ43 DD R_DQ44 DD R_DQ45 DD R_DQ46 DD R_DQ47 DD R_DQ48 DD R_DQ49 DD R_DQ50 DD R_DQ51 DD R_DQ52 DD R_DQ53 DD R_DQ54 DD R_DQ55 DD R_DQ56 DD R_DQ57 DD R_DQ58 DD R_DQ59 DD R_DQ60 DD R_DQ61 DD R_DQ62 DD R_DQ63 F10 4.7K_0402_5% AJ29 AG28 AH30 CLK *** Place these R and C close to relative Ball. 3 10,11 DDR_SRAS# 10,11 DDR_SCAS# 10,11 DDR_SWE# R539 0.47U_0603_10V7K 61.9_0603_1% 2 1 2 61.9_0603_1% 2 1 +2.5V MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13 MEM_A14 MEM_A15 MEM_A16 MEM_A17 MISC 10,11 DDR_SBS0 10,11 DDR_SBS1 AK27 AJ27 AH26 AJ26 AH25 AJ25 AH24 AH23 AJ24 AJ23 AH27 AH22 AJ22 AF28 AJ21 AG27 AJ28 AH21 DATA DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 DDR_SMA13 1 20 NB_CRT_R RC400M U33B NB_COMPS 2 75_0402_5% CLK. GEN. 1 R95 LVDS Y 19 NB_CRMA CRT & TV I/F F9 PART 4 OF 6 U33D 19 NB_LUMA R4631 2 10K_0402_5% +3VS 2 4.7K_0402_5% 2 @4.7K_0402_5% +3VS DDR_DQ[0..63] 10 STRP_DATA DDR_DQS[0..7] 10 R457 1 R455 1 DDR_DM[0..7] 10 BM_REQ#/HSYNC/VSYNC: FSB CLK SPEED DEFAULT: 010 (200MHZ) OTHERS COMBINATION ARE SHOWED AT CLK PAGE NB_DDC_CLK: CPU VCC SEL DEFAULT: 1 1: DESKTOP CPU 0: MOBILE CPU STRP_DATA: DEBUG STRAP DEFAULT: 1 0: MEMORY CHANNEL STRAPING 1: E2PROM STRAPING 4 DDR_SCS#[0..3] 10,11 DDR_SMA[0..13] 10,11 Compal Electronics, Inc. Title RC400M-DDR,DISP,MISC(2/3) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number C u stomLongbeach 100 D ate: R ev 0.1 星期六, 十一月 06, 2004 Sheet E 8 of 53 A B C D E +1.2VS A10 F11 F12 F17 G11 G12 G13 G14 G16 G17 G20 H11 H12 H13 H14 H16 H17 H19 H23 H24 L23 L24 N23 P23 P24 ### 0.1U_0402_16V4Z 2 2 C1131 2 1 C608+CPVDD +MPVDD B8 D8 AVDDQ AVDDDI H21 AB26 CPVDD MPVDD 2 +3VS 1 C629 0.1U_0402_16V4Z 1 C583 1U_0603_10V4Z 2 2 C127 0.1U_0402_16V4Z C1129 C1134 1 1 C654 A L44 1 2 C603 10U_0805_10V4Z 2 1 0.1U_0402_16V4Z 2 1 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 +AVDD +LPVDD +PLLVDD +1.2VS 1 C1074 1 C1075 1 C1076 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z *** 1 1 C643 +1.8VS +1.8VS ### 1 C659 2 L46 1 2 CHB1608U301_0603 1 1 C655 C1128 0.1U_0402_16V4Z 2 2 ** 1 C1127 2 Place L close to Ball AB26 Place C between Ball AB26,AA27 +LPVDD C1133 4 2 G4 G5 J8 C7 H7 H8 H10 2 0.1U_0402_16V4Z 2 1U_0603_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 10U_0805_10V4Z +CPVDD 2 CHB2012U170_0805 ### 1 C133 1 C619 1 C728 1 C156 1 C161 1 C162 1 C155 1 C734 ### 2 1 C128 1 C186 1 C185 1 C143 1 C134 1 C135 1 C142 1 C148 1 C152 1 C174 1 C178 1 C176 1 C1030 1 C1031 +1.8VS Place L close to Ball H21 Place C between Ball H21,H20 1 10U_0805_10V4Z 2 1 C577 U33F 216CPP4AKA21HK_BGA707 L39 1 C624 1 1 0.1A +AVDD 1 1 C581 1U_0603_10V4Z 1 *** +AVDDQ 1 C582 *** AB8 AC10 AC9 AD10 AE11 AF11 AG11 U7 U8 Y7 Y8 VDDR3 VDDR3 LPVDD LVDDR18D LVDDR18A LVDDR18A PLLVDD AVDD C576 C587 10U_0805_10V4Z L9 1 2 CHB1608U301_0603 1 C149 C9 +AVDD +MPVDD 2 +1.8VS CHB2012U170_0805 C749 1U_0603_10V4Z 2 1 2 B +1.8VS 1 2 C744 2 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS R13 R15 R17 R19 R23 R24 R27 T12 T14 T16 T18 T30 U13 U15 U17 U19 U23 U24 V12 V14 V16 V18 V27 V28 W13 W15 W17 W19 W23 W30 VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA AA3 AA7 AA8 AB5 AB6 AC3 AD3 AD7 AD8 AE8 AF3 AF5 AF7 AF9 AG5 AH10 AH3 AH5 AH6 AH7 AH8 AH9 K5 L3 M3 N5 N6 N7 N8 P3 R3 R7 R8 T5 T6 U3 V3 V7 V8 W5 W6 Y3 AVSSN AVSSQ AVSSDI LPVSS LVSSR LVSSR LVSSR PLLVSS CPVSS MPVSS C10 B9 C8 J7 G7 G8 G9 H9 H20 AA27 1 2 3 216CPP4AKA21HK_BGA707 Place C between H10,H9 Place L after C +PLLVDD C642 C1130 0.1U_0402_16V4Z C1046 2 150U_D3_4VM_R18 0.1U_0402_16V4Z +1.8VS L40 1 2 1 CHB1608U301_0603 1 C1132 C625 *** ***L46 1 2 CHB1608U301_0603 1 1 + A13 A16 A19 A2 A22 A25 A29 A9 AA23 AA24 AA28 AC11 AC12 AC14 AC15 AC17 AC18 AC20 AC27 AD11 AD12 AD14 AD15 AD17 AD18 AD20 AE30 AF12 AF27 AG14 AG16 AG18 AG21 AG24 AG26 AH11 AJ1 AJ30 AK12 AK15 AK18 AK2 AK22 AK25 AK29 B1 B30 D14 D17 D20 D24 D27 D3 D4 F27 F3 F30 F4 G10 H15 H18 J23 J24 J27 J3 J30 K23 K8 M12 M14 M16 M18 M23 M24 M26 N13 N15 N17 N19 P12 P14 P16 P18 PART 6 OF 6 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 1U_0603_10V4Z 2 1U_0603_10V4Z 2 1U_0603_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 470U_D2_2.5VM 2 470U_D2_2.5VM 1 C586 0.75A VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 1 C578 *** 1U_0603_10V4Z +1.8VS Place C between Ball D8,C8 1U_0603_10V4Z 3 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 1U_0603_10V4Z 1 C137 1 C147 1 C151 1 C145 1 C146 VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU 2.25A 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z + 5A AB7 AC7 AC8 AD9 H4 H5 J6 K6 L7 L8 M7 M8 P7 P8 T7 T8 W7 W8 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 +1.8VS 1 C139 1 C180 1 C187 1 C256 1 C1064 1 C1065 +1.2VS 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z + +V_FSB_VTT AB22 AB9 J22 J9 1U_0603_10V4Z 2 1 C222 1 C228 1 C200 1 C192 1 C191 1 C213 1 C205 1 C212 *** 0.1A VDD_18 VDD_18 VDD_18 VDD_18 10U_0805_10V4Z 1 C164 2A AB23 AB24 AC13 AC16 AC19 AC21 AC22 AD13 AD16 AD19 AD21 AD22 AD23 AK21 AK24 AK28 T23 T24 V23 V24 Y23 Y24 VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM 10U_0805_10V4Z C153 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE PART 5 OF 6 M13 M15 M17 M19 N12 N14 N16 N18 P13 P15 P17 P19 R12 R14 R16 R18 T13 T15 T17 T19 U12 U14 U16 U18 V13 V15 V17 V19 W12 W14 W16 W18 MEM I/F PWR 5A U33E 1 C752 1 C739 1 C742 1 C750 1 C239 1 C240 1 C229 1 C230 1 C208 1 C257 1 C255 1 C215 1 C201 1 C234 1 C254 1 C244 1 C248 1 C249 1 C241 +1.2VS GOUND +2.5V +1.2VS +V_FSB_VTT 1 ** 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z RC400M 1 C1055 1 C1056 1 C1057 CPU I/F PWR 1 1 C160 1 C165 1 C166 1 C171 1 C172 1 C181 1 C182 1 C194 1 C198 1 C206 1 C197 1 C193 1 C203 1 C207 1 C211 1 C210 +2.5V 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z RC400M POWER 1 C190 CORE PWR 1 C175 1 1 2 1U_0603_10V4Z 2 C636 10U_0805_10V4Z 2 4 10U_0805_10V4Z 2 Compal Electronics, Inc. Title RC400M-PWR,GND(3/3) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C D Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet E 9 of 53 C D 1 DD R_DQ14 DD R_DQ11 DDR _DQ4 DDR _DQ1 0_0804_8P4R_5% RP102 8 1 7 2 6 3 5 4 DDR _DQ0 DDR _DQ5 D DR_DM0 DD R_DQS0 0_0804_8P4R_5% RP103 8 1 7 2 6 3 5 4 0_0804_8P4R_5% RP104 8 1 7 2 6 3 5 4 DDR _DQ3 DDR _DQ6 DDR _DQ2 DDR _DQ7 DDR_DQ12_D0 11 DDR_DQ8_D0 11 DDR_DQ9_D0 11 DDR_DQ13_D0 11 +2.5V JP24 D DR_DQ12_D0 DD R_DQ9_D0 DD R_DQS1_D0 DDR_DM1_D0 D DR_DQ15_D0 D DR_DQ10_D0 DDR_DQS1_D0 11 DDR_DM1_D0 11 DDR_DQ15_D0 11 DDR_DQ10_D0 11 D DR_DQ14_D0 D DR_DQ11_D0 DD R_DQ4_D0 DD R_DQ1_D0 DD R_DQS1_D0 D DR_DQ15_D0 D DR_DQ14_D0 DD R_DQ4_D0 DD R_DQ0_D0 DD R_DQS0_D0 DDR_DQ14_D0 11 DDR_DQ11_D0 11 DDR_DQ4_D0 11 DDR_DQ1_D0 11 DD R_DQ0_D0 DD R_DQ5_D0 DDR_DM0_D0 DD R_DQS0_D0 DDR_DQ0_D0 11 DDR_DQ5_D0 11 DDR_DM0_D0 11 DDR_DQS0_D0 11 DD R_DQ3_D0 DD R_DQ6_D0 DD R_DQ2_D0 DD R_DQ7_D0 DDR_DQ3_D0 DDR_DQ6_D0 DDR_DQ2_D0 DDR_DQ7_D0 11 11 11 11 DD R_DQ3_D0 DD R_DQ2_D0 8 DDR_CLK1 8 DDR_CLK1# D DR_DQ16_D0 D DR_DQ21_D0 DD R_DQS2_D0 D DR_DQ22_D0 D DR_DQ18_D0 D DR_DQ28_D0 0_0804_8P4R_5% D DR_DQ29_D0 DD R_DQS3_D0 D DR_DQ30_D0 D DR_DQ26_D0 2 DDR_DQ [0..63] DDR_DQ[0..63] 8 DD R_CKE1 DDR_DQS [0..7] DDR_DQS[0..7] 8 DDR_D M[0..7] DDR_SMAA12 D DR_SMAA9 DDR_DM[0..7] 8 DDR _SMA[0..13] D DR_SMAA7 D DR_SMAA5 D DR_SMAA3 D DR_SMAA1 DDR_SMA[0..13] 8,11 DDR_SMAA10 D DR_BS0 D DR_W E# DD R_CS#0 DDR_SMAA13 D DR_DQ40_D0 D DR_DQ45_D0 DD R_DQS5_D0 D DR_DQ42_D0 D DR_DQ47_D0 D DR_DQ32_D0 RP105 3 DD R_DQ16 DD R_DQ20 DD R_DQ21 DD R_DQ17 8 7 6 5 1 2 3 4 D DR_DM2 DD R_DQS2 DD R_DQ22 DD R_DQ23 0_0804_8P4R_5% RP106 8 1 7 2 6 3 5 4 DD R_DQ18 DD R_DQ19 DD R_DQ28 DD R_DQ25 0_0804_8P4R_5% RP107 8 1 7 2 6 3 5 4 DD R_DQ29 DD R_DQ24 DD R_DQS3 D DR_DM3 0_0804_8P4R_5% RP108 8 1 7 2 6 3 5 4 D DR_DQ16_D0 D DR_DQ20_D0 D DR_DQ21_D0 D DR_DQ17_D0 DDR_DQ16_D0 DDR_DQ20_D0 DDR_DQ21_D0 DDR_DQ17_D0 DDR_DM2_D0 DD R_DQS2_D0 D DR_DQ22_D0 D DR_DQ23_D0 11 11 11 11 DDR_DM2_D0 11 DDR_DQS2_D0 11 DDR_DQ22_D0 11 DDR_DQ23_D0 11 D DR_DQ18_D0 D DR_DQ19_D0 D DR_DQ28_D0 D DR_DQ25_D0 DDR_DQ18_D0 DDR_DQ19_D0 DDR_DQ28_D0 DDR_DQ25_D0 11 11 11 11 D DR_DQ37_D0 DD R_DQS4_D0 D DR_DQ34_D0 D DR_DQ38_D0 D DR_DQ48_D0 D DR_DQ49_D0 DD R_DQS6_D0 D DR_DQ50_D0 D DR_DQ55_D0 D DR_DQ62_D0 D DR_DQ60_D0 DD R_DQS7_D0 D DR_DQ29_D0 D DR_DQ24_D0 DD R_DQS3_D0 DDR_DM3_D0 DDR_DQ29_D0 11 DDR_DQ24_D0 11 DDR_DQS3_D0 11 DDR_DM3_D0 11 D DR_DQ59_D0 D DR_DQ61_D0 11,13,22,30 SB_SMDATA 11,13,22,30 SB_SMCLK 0_0804_8P4R_5% +3VS RP109 4 DD R_DQ30 DD R_DQ31 DD R_DQ26 DD R_DQ27 8 7 6 5 1 2 3 4 D DR_DQ30_D0 D DR_DQ31_D0 D DR_DQ26_D0 D DR_DQ27_D0 DDR_DQ30_D0 DDR_DQ31_D0 DDR_DQ26_D0 DDR_DQ27_D0 11 11 11 11 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 VREF VSS DQ0 DQ1 VDD DQS0 DQ2 VSS DQ3 DQ8 VDD DQ9 DQS1 VSS DQ10 DQ11 VDD CK0 CK0# VSS DQ16 DQ17 VDD DQS2 DQ18 VSS DQ19 DQ24 VDD DQ25 DQS3 VSS DQ26 DQ27 VDD CB0 CB1 VSS DQS8 CB2 VDD CB3 DU VSS CK2 CK2# VDD CKE1 DU/A13 A12 A9 VSS A7 A5 A3 A1 VDD A10/AP BA0 WE# S0# DU VSS DQ32 DQ33 VDD DQS4 DQ34 VSS DQ35 DQ40 VDD DQ41 DQS5 VSS DQ42 DQ43 VDD VDD VSS VSS DQ48 DQ49 VDD DQS6 DQ50 VSS DQ51 DQ56 VDD DQ57 DQS7 VSS DQ58 DQ59 VDD SDA SCL VDD_SPD VDD_ID 2 VREF VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7 DQ12 VDD DQ13 DM1 VSS DQ14 DQ15 VDD VDD VSS VSS DQ20 DQ21 VDD DM2 DQ22 VSS DQ23 DQ28 VDD DQ29 DM3 VSS DQ30 DQ31 VDD CB4 CB5 VSS DM8 CB6 VDD CB7 DU/RESET# VSS VSS VDD VDD CKE0 DU/BA2 A11 A8 VSS A6 A4 A2 A0 VDD BA1 RAS# CAS# S1# DU VSS DQ36 DQ37 VDD DM4 DQ38 VSS DQ39 DQ44 VDD DQ45 DM5 VSS DQ46 DQ47 VDD CK1# CK1 VSS DQ52 DQ53 VDD DM6 DQ54 VSS DQ55 DQ60 VDD DQ61 DM7 VSS DQ62 DQ63 VDD SA0 SA1 SA2 DU 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 G H +2.5V 1 1 2 3 4 0_0804_8P4R_5% RP101 8 1 7 2 6 3 5 4 DD R_DQS1 D DR_DM1 DD R_DQ15 DD R_DQ10 F +2.5V DD R_DQ8_D0 D DR_DQ13_D0 C311 0.1U_0402_10V6K 1K_0603_1% 1 DDRA_VREF DDR_DM1_D0 D DR_DQ10_D0 D DR_DQ11_D0 DD R_DQ1_D0 2 C337 0.1U_0402_10V6K R172 1K_0603_1% 1 DD R_DQ5_D0 DDR_DM0_D0 DD R_DQ6_D0 DD R_DQ7_D0 RP98 R160 11 11 11 11 DDR_DQ40_D0 DDR_DQ41_D0 DDR_DQ45_D0 DDR_DQ44_D0 11 11 11 11 DDR_DM5_D0 DDR_DQS5_D0 DDR_DQ42_D0 DDR_DQ46_D0 D DR_DQ40_D0 D DR_DQ41_D0 D DR_DQ45_D0 D DR_DQ44_D0 1 2 3 4 DDRA_VREF trace width of 20mils and space 20mils(min) L 11 11 11 11 DDR_DQ47_D0 DDR_DQ43_D0 DDR_DQ32_D0 DDR_DQ36_D0 0_0804_8P4R_5% RP99 1 8 2 7 3 6 4 5 D DR_DM5 DD R_DQS5 DD R_DQ42 DD R_DQ46 D DR_DQ47_D0 D DR_DQ43_D0 D DR_DQ32_D0 D DR_DQ36_D0 0_0804_8P4R_5% RP110 1 8 2 7 3 6 4 5 DD R_DQ47 DD R_DQ43 DD R_DQ32 DD R_DQ36 11 11 11 11 DDR_DQ37_D0 DDR_DQ33_D0 DDR_DQS4_D0 DDR_DM4_D0 D DR_DQ37_D0 D DR_DQ33_D0 DD R_DQS4_D0 DDR_DM4_D0 0_0804_8P4R_5% RP111 1 8 2 7 3 6 4 5 DD R_DQ37 DD R_DQ33 DD R_DQS4 D DR_DM4 11 11 11 11 DDR_DQ34_D0 DDR_DQ39_D0 DDR_DQ38_D0 DDR_DQ35_D0 D DR_DQ34_D0 D DR_DQ39_D0 D DR_DQ38_D0 D DR_DQ35_D0 0_0804_8P4R_5% RP112 1 8 2 7 3 6 4 5 DD R_DQ34 DD R_DQ39 DD R_DQ38 DD R_DQ35 11 11 11 11 DDR_DQ48_D0 DDR_DQ52_D0 DDR_DQ49_D0 DDR_DQ53_D0 D DR_DQ48_D0 D DR_DQ52_D0 D DR_DQ49_D0 D DR_DQ53_D0 0_0804_8P4R_5% RP113 1 8 2 7 3 6 4 5 DD R_DQ48 DD R_DQ52 DD R_DQ49 DD R_DQ53 11 11 11 11 DDR_DM6_D0 DDR_DQS6_D0 DDR_DQ55_D0 DDR_DQ50_D0 DDR_DM6_D0 DD R_DQS6_D0 D DR_DQ55_D0 D DR_DQ50_D0 0_0804_8P4R_5% RP114 1 8 2 7 3 6 4 5 D DR_DM6 DD R_DQS6 DD R_DQ55 DD R_DQ50 DDR_SCS#1 8,11 DDR_SCAS# 8,11 DDR_SRAS# 8,11 DDR_SBS1 8,11 11 11 11 11 DDR_DQ54_D0 DDR_DQ51_D0 DDR_DQ62_D0 DDR_DQ56_D0 D DR_DQ54_D0 D DR_DQ51_D0 D DR_DQ62_D0 D DR_DQ56_D0 0_0804_8P4R_5% RP115 1 8 2 7 3 6 4 5 DD R_DQ54 DD R_DQ51 DD R_DQ62 DD R_DQ56 DDR_SBS0 8,11 DDR_SW E# 8,11 DDR_SCS#0 8,11 11 DDR_DQ60_D0 11 DDR_DQ63_D0 11 DDR_DQS7_D0 11 DDR_DM7_D0 D DR_DQ60_D0 D DR_DQ63_D0 DD R_DQS7_D0 DDR_DM7_D0 0_0804_8P4R_5% RP116 1 8 2 7 3 6 4 5 DD R_DQ60 DD R_DQ63 DD R_DQS7 D DR_DM7 D DR_DQ59_D0 D DR_DQ57_D0 D DR_DQ61_D0 D DR_DQ58_D0 0_0804_8P4R_5% RP117 1 8 2 7 3 6 4 5 DD R_DQ59 DD R_DQ57 DD R_DQ61 DD R_DQ58 0_0804_8P4R_5% D DR_SMAA8 DDR_SMAA11 DD R_CKE0 D DR_DQ20_D0 D DR_DQ17_D0 DDR_DM2_D0 D DR_DQ23_D0 D DR_DQ19_D0 D DR_DQ25_D0 DD R_CKE1 DDR_SMAA12 D DR_SMAA9 D DR_SMAA7 D DR_DQ24_D0 DDR_DM3_D0 4 3 2 1 5 6 7 8 RP95 0_0804_8P4R_5% 4 5 3 6 2 7 1 8 DDR_SMA8 DDR_SMA11 DDR_SCKE0 8,11 DDR_SCKE1 8,11 DDR_SMA12 DDR_SMA9 DDR_SMA7 RP19 0_0804_8P4R_5% D DR_DQ31_D0 D DR_DQ27_D0 D DR_SMAA0 D DR_SMAA2 D DR_SMAA4 D DR_SMAA6 D DR_SMAA5 D DR_SMAA3 D DR_SMAA1 DDR_SMAA10 4 3 2 1 5 6 7 8 RP96 0_0804_8P4R_5% 4 5 3 6 2 7 1 8 DDR_SMA0 DDR_SMA2 DDR_SMA4 DDR_SMA6 DDR_SMA5 DDR_SMA3 DDR_SMA1 DDR_SMA10 RP18 0_0804_8P4R_5% DD R_CKE0 DD R_CS#1 DDR _CAS# DDR _RAS# D DR_BS1 DDR_SMAA11 D DR_SMAA8 D DR_SMAA6 D DR_SMAA4 D DR_SMAA2 D DR_SMAA0 D DR_BS0 D DR_W E# DD R_CS#0 DDR_SMAA13 D DR_BS1 DDR _RAS# DDR _CAS# DD R_CS#1 5 6 7 8 D DR_SCS#1 DDR _SCAS# DDR _SRAS# D DR_SBS1 RP97 0_0804_8P4R_5% 4 5 3 6 2 7 1 8 D DR_SBS0 D DR_SW E# D DR_SCS#0 DDR_SMA13 4 3 2 1 RP17 11 11 11 11 D DR_DQ41_D0 D DR_DQ44_D0 DDR_DQ59_D0 DDR_DQ57_D0 DDR_DQ61_D0 DDR_DQ58_D0 DD R_DQ40 DD R_DQ41 DD R_DQ45 DD R_DQ44 8 7 6 5 DDR_DM5_D0 DD R_DQS5_D0 D DR_DQ42_D0 D DR_DQ46_D0 1 8 7 6 5 E +2.5V D DR_DQ12_D0 DD R_DQ8_D0 DD R_DQ9_D0 D DR_DQ13_D0 2 B RP100 2 A DD R_DQ12 DDR _DQ8 DDR _DQ9 DD R_DQ13 DDR_DM5_D0 D DR_DQ46_D0 1 2 0_0804_8P4R_5% D DR_DQ43_D0 D DR_DQ36_D0 System Memory Layout Topology DATA/DQS/DM D DR_DQ33_D0 DDR_DM4_D0 3 +VTT D DR_DQ39_D0 D DR_DQ35_D0 NB DDR_CLK0# 8 DDR_CLK0 8 Rt Rs 10R D DR_DQ52_D0 D DR_DQ53_D0 56R DIMM0 DIMM1 DDR_DM6_D0 D DR_DQ54_D0 D DR_DQ51_D0 D DR_DQ56_D0 ADD/CONTROL +VTT D DR_DQ63_D0 DDR_DM7_D0 Rt NB D DR_DQ57_D0 D DR_DQ58_D0 33R Rs Rs QTC_C106A-110RFP31-01 4 DIMM0 0_0804_8P4R_5% Layout note Place Add/Command resisotrs Close to Pin, max L = 300 mils DIMM1 Compal Electronics, Inc. Title DDR-SODIMM SLOT0 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: A B C D E F G Document Number R ev 0.1 Longbeach 100 星期六 , 十一月 06, 2 004 Sheet 10 H of 53 A B C +1.25VS 1 2 3 4 4 3 2 1 56_0804_8P4R_5% 8 7 6 5 1 2 3 4 4 3 2 1 10 DDR_D Q0_D0 10 DDR_ DQS0_D0 DDR_D Q11_D0 DDR_DQ 1_D0 DDR_DQ 5_D0 DDR_ DM0_D0 5 6 7 8 10 DDR_DQ 3_D0 10 DDR_D Q2_D0 10 DDR_D Q16_D0 10 DDR_D Q21_D0 56_0804_8P4R_5% 1 2 3 4 4 3 2 1 56_0804_8P4R_5% DDR_DQ 6_D0 DDR_DQ 7_D0 DDR_D Q20_D0 DDR_D Q17_D0 5 6 7 8 10 DDR_ DQS2_D0 10 DDR_D Q22_D0 10 DDR_D Q18_D0 10 DDR_D Q28_D0 R P47 10 DDR_D Q29_D0 10 DDR_ DQS3_D0 RP123 DDR_D QS2_D0 DDR_D Q22_D0 DDR_D Q18_D0 DDR_D Q28_D0 8 7 6 5 10 DDR_D Q30_D0 10 DDR_D Q26_D0 56_0804_8P4R_5% 1 2 3 4 4 3 2 1 56_0804_8P4R_5% DDR_D Q12_D0 DDR_DQ 9_D0 DDR_D QS1_D0 DDR_D Q15_D0 DDR_D Q14_D0 DDR_DQ 4_D0 DDR_DQ 0_D0 DDR_D QS0_D0 DDR_DQ 3_D0 DDR_DQ 2_D0 8 DDR_ CLK4 8 DDR_ CLK4# R P48 RP122 8 7 6 5 10 DDR_ DQS1_D0 10 DDR_D Q15_D0 56_0804_8P4R_5% 56_0804_8P4R_5% DDR_DQ 3_D0 DDR_DQ 2_D0 DDR_D Q16_D0 DDR_D Q21_D0 10 DDR_D Q12_D0 10 DDR_D Q9_D0 10 DDR_D Q14_D0 10 DDR_D Q4_D0 RP121 DDR_D Q14_D0 DDR_DQ 4_D0 DDR_DQ 0_D0 DDR_D QS0_D0 DDR_ DM2_D0 DDR_D Q23_D0 DDR_D Q19_D0 DDR_D Q25_D0 5 6 7 8 DDR_D Q16_D0 DDR_D Q21_D0 DDR_D QS2_D0 DDR_D Q22_D0 DDR_D Q18_D0 DDR_D Q28_D0 DDR_D Q29_D0 DDR_D QS3_D0 DDR_D Q30_D0 DDR_D Q26_D0 R P46 2 RP124 DDR_D Q29_D0 DDR_D QS3_D0 DDR_D Q30_D0 DDR_D Q26_D0 8 7 6 5 4 3 2 1 56_0804_8P4R_5% DDR _SCS#3 1 R 219 DDR _SCS#2 68_0402_5% 1 68_0402_5% R 218 DDR _SCKE2 1 R 796 DDR _SCKE368_0402_5% 1 68_0402_5% R 797 SCK E3 56_0804_8P4R_5% 1 2 3 4 DDR_D Q24_D0 DDR_ DM3_D0 DDR_D Q31_D0 DDR_D Q27_D0 5 6 7 8 SMA12 SMA9 SMA7 SMA5 SMA3 SMA1 R P45 R1 82 1 1 R 181 2 2 1 R8 00 68_0402_5% 1 R8 01 68_0402_5% 2 2 ### 2 2 68_0402_5% 68_0402_5% 2 2 DDR _SCKE0 DDR _SCKE1 SMA10 S BS0 SWE# SCS#2 SMA13 DDR_ SCS#0 8 ,10 DDR_ SCS#1 8 ,10 DDR _SCKE0 8 ,10 DDR _SCKE1 8 ,10 10 DDR_D Q40_D0 10 DDR_D Q45_D0 10 DDR_ DQS5_D0 10 DDR_D Q42_D0 ### R P43 DDR_SMA7 DDR_SMA9 DDR_SMA 12 8 7 6 5 1 R8 02 68_0402_5% 1 R8 03 68_0402_5% 1 2 3 4 2 2 10 DDR_D Q47_D0 10 DDR_D Q32_D0 DDR_SMA8 DDR_SMA 11 10 DDR_D Q37_D0 10 DDR_ DQS4_D0 68_0804_8P4R_5% 10 DDR_D Q34_D0 10 DDR_D Q38_D0 DDR_D Q40_D0 DDR_D Q45_D0 DDR_D QS5_D0 DDR_D Q42_D0 DDR_D Q47_D0 DDR_D Q32_D0 DDR_D Q37_D0 DDR_D QS4_D0 DDR_D Q34_D0 DDR_D Q38_D0 3 R P39 DDR _SCAS# DDR _SRAS# DD R_SBS1 8 7 6 5 R P42 1 2 3 4 1 2 3 4 68_0804_8P4R_5% 8 7 6 5 DDR_SMA 10 DDR_SMA1 DDR_SMA3 DDR_SMA5 10 DDR_D Q48_D0 10 DDR_D Q49_D0 10 DDR_ DQS6_D0 10 DDR_D Q50_D0 68_0804_8P4R_5% 10 DDR_D Q55_D0 10 DDR_D Q62_D0 R P40 DDR_SMA 13 DDR_ SWE# DD R_SBS0 8 7 6 5 68_0804_8P4R_5% 10 DDR_D Q60_D0 10 DDR_ DQS7_D0 R P41 1 2 3 4 1 2 3 4 8 7 6 5 +2.5V DDR_SMA0 DDR_SMA2 DDR_SMA4 DDR_SMA6 10 DDR_D Q59_D0 10 DDR_D Q61_D0 DDR_D Q48_D0 DDR_D Q49_D0 DDR_D QS6_D0 DDR_D Q50_D0 DDR_D Q55_D0 DDR_D Q62_D0 DDR_D Q60_D0 DDR_D QS7_D0 DDR_D Q59_D0 DDR_D Q61_D0 10,13,22,30 SB_SMDATA 10,13,22,30 SB_SMCLK 68_0804_8P4R_5% +3VS 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 1 DDR_DQ 8_D0 DDR_D Q13_D0 DDR_ DM1_D0 DDR_D Q10_D0 5 6 7 8 R P49 1 +2.5V JP26 VREF VSS DQ0 DQ1 VDD DQS0 DQ2 VSS DQ3 DQ8 VDD DQ9 DQS1 VSS DQ10 DQ11 VDD CK0 CK0# VSS VREF VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7 DQ12 VDD DQ13 DM1 VSS DQ14 DQ15 VDD VDD VSS VSS DQ16 DQ17 VDD DQS2 DQ18 VSS DQ19 DQ24 VDD DQ25 DQS3 VSS DQ26 DQ27 VDD CB0 CB1 VSS DQS8 CB2 VDD CB3 DU VSS CK2 CK2# VDD CKE1 DU/A13 A12 A9 VSS A7 A5 A3 A1 VDD A10/AP BA0 WE# S0# DU VSS DQ32 DQ33 VDD DQS4 DQ34 VSS DQ35 DQ40 VDD DQ41 DQS5 VSS DQ42 DQ43 VDD VDD VSS VSS DQ48 DQ49 VDD DQS6 DQ50 VSS DQ51 DQ56 VDD DQ57 DQS7 VSS DQ58 DQ59 VDD SDA SCL VDD_SPD VDD_ID DQ20 DQ21 VDD DM2 DQ22 VSS DQ23 DQ28 VDD DQ29 DM3 VSS DQ30 DQ31 VDD CB4 CB5 VSS DM8 CB6 VDD CB7 DU/RESET# VSS VSS VDD VDD CKE0 DU/BA2 A11 A8 VSS A6 A4 A2 A0 VDD BA1 RAS# CAS# S1# DU VSS DQ36 DQ37 VDD DM4 DQ38 VSS DQ39 DQ44 VDD DQ45 DM5 VSS DQ46 DQ47 VDD CK1# CK1 VSS DQ52 DQ53 VDD DM6 DQ54 VSS DQ55 DQ60 VDD DQ61 DM7 VSS DQ62 DQ63 VDD SA0 SA1 SA2 DU 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 2 DDR_DQ 8_D0 DDR_D Q13_D0 DDR_ DM1_D0 DDR_D Q10_D0 DDR_D Q11_D0 DDR_DQ 1_D0 DDR_DQ 5_D0 DDR_ DM0_D0 DDR_DQ 6_D0 DDR_DQ 7_D0 DDR_D Q8_D0 10 DDR_D Q13_D0 10 1 DDRB _VREF DDR _DM1_D0 10 DDR_D Q10_D0 10 2 DDR_D Q11_D0 10 DDR_D Q1_D0 10 1 DDR_D Q5_D0 10 DDR _DM0_D0 10 L DDR_DQ 6_D0 10 DDR_D Q7_D0 10 D DR_SMA[0..13] 8,10 R2 02 C3 78 0.1U_0402_10V6K 1K_0603_1% 1 DDRB_VREF trace width of 20mils and space 20mils(min) +1.25VS RP125 DDR_D Q20_D0 DDR_D Q17_D0 DDR_ DM2_D0 DDR_D Q23_D0 DDR_D Q19_D0 DDR_D Q25_D0 DDR_D Q24_D0 DDR_ DM3_D0 DDR_D Q31_D0 DDR_D Q27_D0 DDR_D Q40_D0 DDR_D Q45_D0 DDR_D QS5_D0 DDR_D Q42_D0 DDR_D Q20_D0 10 DDR_D Q17_D0 10 8 7 6 5 56_0804_8P4R_5% 1 2 3 4 4 3 2 1 56_0804_8P4R_5% DDR _DM2_D0 10 DDR_D Q23_D0 10 DDR_D Q19_D0 10 DDR_D Q25_D0 10 DDR_D Q47_D0 DDR_D Q32_D0 DDR_D Q37_D0 DDR_D QS4_D0 DDR_D Q31_D0 10 DDR_D Q27_D0 10 8 7 6 5 56_0804_8P4R_5% 1 2 3 4 4 3 2 1 56_0804_8P4R_5% SCK E2 8 7 6 5 DDR_D Q43_D0 DDR_D Q36_D0 DDR_D Q33_D0 DDR_ DM4_D0 5 6 7 8 R P37 RP127 DDR_D Q34_D0 DDR_D Q38_D0 DDR_D Q48_D0 DDR_D Q49_D0 DDR_D Q41_D0 DDR_D Q44_D0 DDR_ DM5_D0 DDR_D Q46_D0 5 6 7 8 R P38 RP126 DDR_D Q24_D0 10 DDR _DM3_D0 10 56_0804_8P4R_5% 1 2 3 4 4 3 2 1 56_0804_8P4R_5% DDR_D Q39_D0 DDR_D Q35_D0 DDR_D Q52_D0 DDR_D Q53_D0 5 6 7 8 SMA6 SMA4 SMA2 SMA0 R P36 RP128 DDR_D QS6_D0 DDR_D Q50_D0 DDR_D Q55_D0 DDR_D Q62_D0 S BS1 SRA S# SCA S# SCS#3 DDR_D Q41_D0 DDR_D Q44_D0 DDR_ DM5_D0 DDR_D Q46_D0 DDR_D Q43_D0 DDR_D Q36_D0 DDR_D Q33_D0 DDR_ DM4_D0 DDR_D Q39_D0 DDR_D Q35_D0 DDR_D Q41_D0 10 DDR_D Q44_D0 10 DDR_ DM6_D0 DDR_D Q54_D0 DDR_D Q51_D0 DDR_D Q56_D0 DDR_D Q63_D0 DDR_ DM7_D0 DDR_D Q57_D0 DDR_D Q58_D0 56_0804_8P4R_5% 1 2 3 4 4 3 2 1 DDR_D Q60_D0 DDR_D QS7_D0 DDR_D Q59_D0 DDR_D Q61_D0 DDR_D Q43_D0 10 DDR_D Q36_D0 10 8 7 6 5 56_0804_8P4R_5% 1 2 3 4 4 3 2 1 56_0804_8P4R_5% DDR_D Q33_D0 10 DDR _DM4_D0 10 DDR_D Q39_D0 10 DDR_D Q35_D0 10 DDR_ DM6_D0 DDR_D Q54_D0 DDR_D Q51_D0 DDR_D Q56_D0 5 6 7 8 R P35 RP129 DDR _DM5_D0 10 DDR_D Q46_D0 10 DDR_D Q63_D0 DDR_ DM7_D0 DDR_D Q57_D0 DDR_D Q58_D0 5 6 7 8 R P34 0_0804_8P4R_5% SCK E3 SMA11 SMA8 DDR_ CLK3# 8 DDR_ CLK3 8 DDR_D Q52_D0 DDR_D Q53_D0 8 7 6 5 56_0804_8P4R_5% DDR_D Q52_D0 10 DDR_D Q53_D0 10 4 3 2 1 5 6 7 8 DDR _SCKE3 8 DDR_SMA 11 DDR_SMA8 3 R P22 0_0804_8P4R_5% SCK E2 SMA12 SMA9 SMA7 DDR _DM6_D0 10 DDR_D Q54_D0 10 DDR_D Q51_D0 10 DDR_D Q56_D0 10 DDR_D Q63_D0 10 DDR _DM7_D0 10 DDR_D Q57_D0 10 DDR_D Q58_D0 10 4 3 2 1 5 6 7 8 DDR _SCKE2 8 DDR_SMA 12 DDR_SMA9 DDR_SMA7 SMA6 SMA4 SMA2 SMA0 R P25 0_0804_8P4R_5% 4 5 3 6 2 7 1 8 DDR_SMA6 DDR_SMA4 DDR_SMA2 DDR_SMA0 SMA5 SMA3 SMA1 SMA10 R P21 0_0804_8P4R_5% 4 5 3 6 2 7 1 8 DDR_SMA5 DDR_SMA3 DDR_SMA1 DDR_SMA 10 S BS1 SRA S# SCA S# SCS#3 R P24 0_0804_8P4R_5% 4 5 3 6 2 7 1 8 DD R_SBS1 DDR _SRAS# DDR _SCAS# DDR _SCS#3 S BS0 SWE# SMA13 SCS#2 R P20 0_0804_8P4R_5% 4 5 3 6 2 7 1 8 DD R_SBS0 DDR_ SWE# DDR_SMA 13 DDR _SCS#2 +3VS Layout note 4 D DR_SBS1 8 ,10 DDR _SRAS# 8 ,10 DDR _SCAS# 8 ,10 DDR _SCS#3 8 D DR_SBS0 8 ,10 DDR_ SWE# 8 ,10 4 DDR _SCS#2 8 R P23 Compal Electronics, Inc. Title DDR-SODIMM SLOT1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C 2 SMA11 SMA8 Place these resistor close by DIMM1, all trace length Max=0.8" TYCO_1470488-1 D DR_SMA[0..13] R1 80 C3 42 0.1U_0402_10V6K 1K_0603_1% 2 8 7 6 5 +2.5V +2.5V 56_0804_8P4R_5% 1 DDR_D Q12_D0 DDR_DQ 9_D0 DDR_D QS1_D0 DDR_D Q15_D0 E 2 RP120 D D Size D ocument Number Rev 0 .1 Longbeach 100 Dat e: 星期六 , Q 一月 06, 2004 Sheet E 11 of 53 A B C D Layout note : Layout note : Distribute as close as possible to DDR-SODIMM0. Distribute as close as possible to DDR-SODIMM1. +2.5V E +2.5V 0.1U_0402_10V6K 1 1 1 + 2 1 C324 150U_D3_4VM_R182 1 C312 0.1U_0402_10V6K 2 1 C326 0.1U_0402_10V6K 2 1 C314 0.1U_0402_10V6K 2 1 C327 0.1U_0402_10V6K 2 1 C315 0.1U_0402_10V6K 2 1 C329 0.1U_0402_10V6K 2 1 C316 0.1U_0402_10V6K 2 + C330 0.1U_0402_10V6K 2 1 C356 150U_D3_4VM_R182 1 C343 0.1U_0402_10V6K 2 1 C365 0.1U_0402_10V6K 2 1 C345 0.1U_0402_10V6K 2 1 C360 0.1U_0402_10V6K 2 1 C346 0.1U_0402_10V6K 2 1 C361 0.1U_0402_10V6K 2 1 C347 0.1U_0402_10V6K C368 1 2 0.1U_0402_10V6K 1 2 1 C317 0.1U_0402_10V6K 2 1 + 2 1 C331 0.1U_0402_10V6K 2 1 C319 0.1U_0402_10V6K 2 1 C333 0.1U_0402_10V6K 2 1 C321 0.1U_0402_10V6K 2 1 C320 0.1U_0402_10V6K 2 1 C325 0.1U_0402_10V6K 2 1 C332 0.1U_0402_10V6K 2 1 C334 0.1U_0402_10V6K + 150U_D3_4VM_R18 2 1 C362 0.1U_0402_10V6K 2 1 C350 0.1U_0402_10V6K 2 1 C363 0.1U_0402_10V6K 2 1 C352 0.1U_0402_10V6K 2 1 C371 0.1U_0402_10V6K 2 1 C364 0.1U_0402_10V6K 2 1 C370 0.1U_0402_10V6K C351 2 Layout note : 1 C357 2 1 C348 0.1U_0402_10V6K C776 150U_D3_4VM_R18 for EMI solution 2 +2.5V 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K Layout note : Place one cap close to every 2 pull up resistors termination to +1.25VS 2 C313 +1.25VS 1 2 1000P_0402_50V7K 1 C824 0.1U_0402_10V6K 2 1 C823 0.1U_0402_10V6K 2 1 C389 0.1U_0402_10V6K 2 1 C388 0.1U_0402_10V6K 2 1 C822 0.1U_0402_10V6K 2 1 C821 0.1U_0402_10V6K 2 1 C391 0.1U_0402_10V6K 2 1 C390 0.1U_0402_10V6K 2 2 2 C328 1 C318 2 1000P_0402_50V7K 1 C393 0.1U_0402_10V6K 1 1 C335 2 1 2 1000P_0402_50V7K C344 1 C366 2 1 C367 2 1 C349 2 1 C369 2 1 2 2 1000P_0402_50V7K C392 0.1U_0402_10V6K 1000P_0402_50V7K +1.25VS 1 2 1 C820 0.1U_0402_10V6K 2 1 C819 0.1U_0402_10V6K 2 1 C818 0.1U_0402_10V6K 2 1 C817 0.1U_0402_10V6K 2 1 C395 0.1U_0402_10V6K 2 1 C394 0.1U_0402_10V6K 2 1 C816 0.1U_0402_10V6K 2 1 C815 0.1U_0402_10V6K 2 1 C397 0.1U_0402_10V6K 2 C396 0.1U_0402_10V6K +1.25VS 1 3 2 1 C399 0.1U_0402_10V6K 2 1 C398 0.1U_0402_10V6K 2 1 C401 0.1U_0402_10V6K 2 1 C400 0.1U_0402_10V6K 2 1 C407 0.1U_0402_10V6K 2 C406 0.1U_0402_10V6K 3 +1.25VS 1 2 1 C403 0.1U_0402_10V6K 2 1 C402 0.1U_0402_10V6K 2 1 C410 0.1U_0402_10V6K 2 1 C411 0.1U_0402_10V6K 2 1 C405 0.1U_0402_10V6K 2 1 C404 0.1U_0402_10V6K 2 1 C408 0.1U_0402_10V6K 2 1 C409 0.1U_0402_10V6K 2 1 C412 0.1U_0402_10V6K 2 C814 0.1U_0402_10V6K +1.25VS 1 2 4 1 C813 0.1U_0402_10V6K 2 1 C812 0.1U_0402_10V6K 2 1 C811 0.1U_0402_10V6K 2 1 C413 0.1U_0402_10V6K 2 1 C415 0.1U_0402_10V6K 2 1 C414 0.1U_0402_10V6K 2 1 C809 0.1U_0402_10V6K 2 1 C808 0.1U_0402_10V6K 2 1 C807 0.1U_0402_10V6K 2 C417 0.1U_0402_10V6K +1.25VS 1 2 4 1 C416 0.1U_0402_10V6K 2 1 C419 0.1U_0402_10V6K 2 1 C418 0.1U_0402_10V6K 2 1 C806 0.1U_0402_10V6K 2 1 C805 0.1U_0402_10V6K 2 C810 0.1U_0402_10V6K Compal Electronics, Inc. Title DDR SODIMM Decoupling THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number R ev 0.1 Longbeach 100 Date: 星期六, 十一月 06, 2004 Sheet E 12 of 53 A B C Clock Generator D E 1- PLACE ALL THE SERIES TERMINATION RESISTORS AS CLOSE TO CLOCK GEN AS POSSIBLE 2- ROUTE ALL CPUCLK/#, NBCLK/#, ITPCLK/# AND SCR/# ,AS DIFFERENT PAIR RULE 2 22,23 CLK_OK 1 R304 2 10K_0402_5% 1 +CLK_VDD1 D Y2 C380 R234 R235 R236 R237 R295 R296 R293 R294 R291 R292 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% CLKREQA# CLKREQB# 10 11 CK410#/PCICLK0 50 GNDCPU GNDPCI GNDATI GNDSRC GNDSRC GNDSRC GNDSRC GND GND GNDA 1 XIN 2 XOUT 2 @1M_0402_5% XTALOUT_CLK 2 14.31818MHZ_20P_6X1430004201 2 R229 +CLK_VDD1 Q17 SRCCLKT0 SRCCLKC0 ATIGCLKT0 ATIGCLKC0 ATIGCLKT1 ATIGCLKC1 SRCCLKT3 SRCCLKC3 SRCCLKT4 SRCCLKC4 R330 2 1 C445 1 XTALIN_CLK 2 *** 33P_0402_50V8J 2 1 34 33 30 29 27 28 24 25 22 23 18 19 16 17 12 13 6 1 48 4.7K_0402_5% VTT_PWRGD#/PD CPU_STOP# 2 G S 2N7002_SOT23 7 8 3 10,11,22,30 SB_SMCLK 10,11,22,30 SB_SMDATA 1 2 475_0402_1% FS_C FS_B/REF1 FS_A/REF0 TEST_SEL/REF2 SCLK SDATA 37 R203 USB_48MHZ 2 R290 R629 1 1 R305 R288 1 4 USB_48MHZ FS_C R228 1 FS_B/REF1 FS_A/REF0 R227 1 TEST_SEL/REF2 R209 1 9 53 54 52 1 R212 1 2 49.9_0402_1% R211 1 2 49.9_0402_1% R213 1 2 49.9_0402_1% Connect to New Card CLKREQ# +CLK_VDD1 CLK_EXT_SD48 28 R289 1 R208 1 R207 1 2 33_0402_5% 2 33_0402_5% 2 33_0402_5% PCIEC_CLKREQ# 30 +CLK_VDD1 10K_0402_5% 2 4.7K_0402_5% 2 @4.7K_0402_5% 2 33_0402_5% CLK_PCIE_ICH 21 CLK_PCIE_ICH# 21 CLK_PCIE_VGA 14 CLK_PCIE_VGA# 14 CLK_PCIE_MCH-VGA 7 CLK_PCIE_MCH-VGA# 7 CLK_PCIE_MCH-ICH 7 CLK_PCIE_MCH-ICH# 7 CLK_PCIE_CARD 30 CLK_PCIE_CARD# 30 R214 2 1 49.9_0402_1% 1 C444 2 C386 2 @0_0402_5% SRCCLKT0 SRCCLKC0 ATIGCLKT0 ATIGCLKC0 ATIGCLKT1 ATIGCLKC1 SRCCLKT3 SRCCLKC3 SRCCLKT4 SRCCLKC4 SRCCLKT5 SRCCLKC5 SRCCLKT6 SRCCLKC6 SRCCLKT7 SRCCLKC7 R215 2 1 49.9_0402_1% 33P_0402_50V8J 1 R329 44 49 31 36 26 20 15 5 55 38 R216 2 1 49.9_0402_1% SYS_CLK CHB1608U301_0603 1 CLK_NB_BCLK 8 CLK_NB_BCLK# 8 CLK_BCLK 4 CLK_BCLK# 4 R217 2 1 49.9_0402_1% 2 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% R318 2 1 49.9_0402_1% 2 2 2 2 2 2 R319 2 1 49.9_0402_1% C870 4.7U_0805_10V4Z 1 L18 +3VS C841 1 1 1 1 R316 2 1 49.9_0402_1% 1 2 CHB1608U301_0603 2 0.1U_0402_16V4Z 1 1 C441 C877 2 2 R230 R231 R232 R233 R317 2 1 49.9_0402_1% +3VS 2 0.1U_0402_16V4Z 2 1 2 0.1U_0402_16V4Z CPUCLKT0 CPUCLKC0 CPUCLKT1 CPUCLKC1 CPUCLKT0 CPUCLKC0 CPUCLKT1 CPUCLKC1 CPUCLKT2_ITP CPUCLKC2_ITP R314 2 1 49.9_0402_1% L62 2 47 46 43 42 41 40 VDDCPU VDDPCI VDDATI VDDSRC VDDSRC VDDSRC VDD48 VDDREF VDDA R315 2 1 49.9_0402_1% 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 C850 C842 10U_0805_10V4Z 2 45 51 32 35 14 21 3 56 39 0.1U_0402_16V4Z L59 1 2 CHB1608U301_0603 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 1 C839 C840 1 10U_0805_10V4Z +3VS U18 0.1U_0402_16V4Z 1 1 C878 C838 10U_0805_10V4Z +CLK_VDD1 L61 1 2 +3VS KC FBM-L11-201209-221LMAT_0805 1 C869 1 1 R210 1 2 49.9_0402_1% 3- PUT DECOUPLING CAPS CLOSE TO CLOCK GEN POWER PIN 2 10K_0402_5% 2 10K_0402_5% 2 10K_0402_5% IREF ICS951411YGLFT_TSSOP56 2 CPU_CLKSEL2 5,8 CPU_CLKSEL1 5,8 CPU_CLKSEL0 5,8 CLK_SB_14M 22 CLK_14M 39 CLK_NB_14M 8 FS_C FS_B FS_A CPU SRC PCI 0 266.66100.0033.33 0 1 133.33100.0033.33 0 0 200.00100.0033.33 1 1 166.66100.0033.33 1 100.00100.0033.33 0 0 400.00100.0033.33 1 1 RESERVED 1 ICS951411 AND CY28RS400 ARE FULLY PIN COMPATIBLE AND CAN BE INTERCHANGED WITHOUT ANY HARDWARE MODIFICATION. REF USB 14.31848.000 14.31848.000 14.31848.000 14.31848.000 14.31848.000 14.31848.000 14.31848.000 CLOCK OF IC 3 3 @10P_0402_50V8J PTALIN 2 1 C422 1 X3 U16 2 2 @10_0402_5% 2 8 NB_PCLK SYS_CLK R242 1 1 R239 1 2 @33_0402_5% C421 @14.31818MHZ_20P PTALOUT 2 @10P_0402_50V8J +CLK_VDD1 2 1 @0.1U_0402_16V4Z C423 @10K_0402_5%2 1 R636 @10K_0402_5%2 1 R635 @10_0402_5% 2 1 R247 +CLK_VDD1 22 SB_PCLK 14 EXT_SSIN 1 @33_0402_5% 2 8 5 6 4 13 24.576MHz X2 VDD GND REF1 VDD GND INPUT_SEL/REF0 CLKIN CLK0 CLK1 CLK2 VDD VDD GND CLK3 10 9 11 1 15 19 17 21 27 26 SCLK SDATA VDD GND 20 22 28 14 1 12 AVDD VDD GND GND CLK4 24 C854 @0.1U_0402_16V4Z 2 C435 @0.1U_0402_16V4Z VDD GND @ICS960011AG-T_TSSOP28 R246 1 1 C438 @10_0402_5% 2 AUDIO_XCLK 33 +CLK_VDD1 2 @0.1U_0402_16V4Z 16 18 +CLK_VDD1 1 4 7 VGA_PCLK PCLK_SSIN 2 R245 ** 3 X1 25 23 1 2 +CLK_VDD1 C437 @0.1U_0402_16V4Z VGA_PCLK 1 2 2 2 1 @10_0402_5%R645 VGA_XCLK VGA_XCLK 14 +CLK_VDD1 C440 @0.1U_0402_16V4Z 2 1 @10_0402_5%R282 1 *27 1394_XCLK 28 +CLK_VDD1 C439 @0.1U_0402_16V4Z 4 Compal Electronics, Inc. Title CLOCK GENERATOR ICS951411 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number CustomLongbeach 100 Date: Rev 0.1 星期六 , 十一月 06, 2004 Sheet E 13 of 53 C D VGA_GPIO0 U31A 1 C27 1 C29 1 C31 1 C37 1 C35 1 C33 CLK_PCIE_VGA AF27 CLK_PCIE_VGA# AE27 13 CLK_PCIE_VGA 13 CLK_PCIE_VGA# +3VS 2 Y A 3 8,21,30 NB_RST# 2 @10K_0402_5% AE25 PCIE_TESTIN 4 1 4.7K_0402_5% 1 4.7K_0402_5% 1 R36 2 R35 2 1K_0402_5% 1 715_0402_1% LUMA 19 LUMA CRMA 19 CRMA VGA_COMPS 1 2 R433 75_0402_5% SMBCLK SMBDATA 2 3 OSC_OUT 1 R29 1 2 121_0603_1% 2 GND 1 R769 2 R440 1 OE 1 R443 1 R762 R28 27MHZ_15P 13 VGA_XCLK 1 0_0402_5% C47 0.1U_0402_16V4Z X1 4 VDD OUT 1 R30 R25 2DVI_SSOUT 2 10K_0402_5% @10K_0402_5% XTALIN 2 @10K_0402_5% PWRGD PWRGD_MASK AH21 R2SET AK21 AJ22 AK22 Y_G C_R_PR COMP_B_PB AJ24 AK24 H2SYNC V2SYNC AG22 AG23 DDC3CLK DDC3DATA AJ23 AH24 SSIN SSOUT AH28 AJ29 XTALIN XTALOUT 1 1K_0402_5% AH27 E8 B6 AF25 TESTEN TEST_YCLK TEST_MCLK PLLTEST 1 10K_0402_5% AH25 71.5_0402_1% 2 @0_0402_5% AD25 AD24 2 1 1K_0402_5% 2 R23 +3VS @TC7SH08FU_SSOP5 R437 2 R438 2 1 PCIE_CALRP PCIE_CALRN PCIE_CALI 2 R38 *** AC23 AB24 AB23 U4 1 +3VS 2 150_0402_1% 2 100_0402_1% 1 10K_0402_1% P 22 PERST# @0.1U_0402_16V4Z 1 B G 3 +1.2VS 1 1 2 5 C88 VREFG PCIE_REFCLKP PCIE_REFCLKN R37 R26 R32 2 R27 STEREOSYNC M24P_BGA708 +3VS Voltage divider Reduce Voltage from 3.3V to 1.2V *** C1 1 R78 100_0402_1% XIN MODOUT 4 8 XOUT NC 3 PD# 6 2 VSS A GPIO6 Reduced PLL bandwidth DEFAULT : 0 AK10 AJ10 4 3 2 1 +VREFG 5 6 7 8 TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXOUT_L3N TXOUT_L3P TXCLK_LN TXCLK_LP TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXOUT_U3N TXOUT_U3P TXCLK_UN TXCLK_UP DIGON BLON AE12 AG12 ENVDD ENBKL TX0M TX0P TX1M TX1P TX2M TX2P TXCM TXCP AK13 AJ13 AJ14 AJ15 AK15 AK16 AJ12 AK12 DDC2CLK DDC2DATA HPD1 AE13 AE14 AF12 R G B HSYNC VSYNC AK27 AJ27 AJ26 AJ25 AK25 RSET DDC1DATA DDC1CLK GPIO_AUXWIN AH26 AG25 AF24 AG24 DPLUS DMINUS AF11 AE11 TXOUT0TXOUT0+ TXOUT1TXOUT1+ TXOUT2TXOUT2+ TXCLKTXCLK+ TZOUT0TZOUT0+ TZOUT1TZOUT1+ TZOUT2TZOUT2+ MCLK_SPREAD 1 2 R489 22_0402_5% 10K_0402_5% 1 2 R9 1 2 +3VS R1 10K_0402_5% 2 @10K_0402_5% MEM_ID2 R477 1 2 10K_0402_5% 2 10K_0402_5% 1 Vedio Memory Config. R83 C126 2 +3VS (VGA Internal PD) MEM_ID1 Size Vendor 4Mx32 Samsung 0 0 Default 64MB 0 1 64MB 4Mx32 1 0 128MB 8Mx32 Samsung 1 1 128MB 8Mx32 Hynix Hynix 2 MEM_ID2 0 1 2.5V MEM Voltage 1.8V 19 19 19 19 19 19 TZCLK- 19 TZCLK+ 19 ENVDDS 8 1 R48 2 10K_0402_5% R50 1 2 10K_0402_5% R G B DAC1_HSYNC DAC1_VSYNC R 20 G 20 B 20 DAC1_HSYNC 20 DAC1_VSYNC 20 R4281 2 499_0402_1% DDC_DATA 20 DDC_CLK 20 DPLUS DMINUS R34 ENBKLS 8 3 +3VS +3VS VGA Thermal Monitor IC 1 DPLUS 10K_0402_5% R430 1 @0.1U_0402_16V4Z 2 U30 C579 2 2 D+ DMINUS 3 SMBCLK 8 SCLK SMBDATA 7 SDATA D- VDD1 1 ALERT# 6 THERM# 4 GND 5 R435 C580 R451 HEAT_ALERT# R434 @10K_0402_5% HEAT_ALERT D S Q25 @2N7002_SOT23 2 G 4 If GPIO_AUXWIN not used, Un-pop R and Q @ADM1032ARM_RM8 If GPIO_AUXWIN not used, pulled it to GND. Compal Electronics, Inc. DAC1_VSYNC Title M24-P PCIE,DISP,GPIO THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B C 1 TXCLK- 19 TXCLK+ 19 TZOUT0- 19 TZOUT0+ 19 TZOUT1- 19 TZOUT1+ 19 TZOUT2- 19 TZOUT2+ 19 TZCLKTZCLK+ DAC_RSET DDC_DATA DDC_CLK HEAT_ALERT R475 1 MEM_ID0 10K_0804_8P4R_5% TXOUT0TXOUT0+ TXOUT1TXOUT1+ TXOUT2TXOUT2+ R71 MEM_ID1 2 1 1 AJ10 AK10 1 MEM_ID0 @10K_0402_5% 5 ASM3P1819-SR_SO8 DEFAULT : 0 +VREFG EDID_DATA 19 EDID_CLK 19 +3VS 1 1 REF Force chip to go to compliance state quickly for test purposes *** +3VS +3VS (15mils) 2 OSC_OUT VDD GPIO5 Place +VREFG divider Res and decoupling Cap close to Ball AG4 4.7K_0402_5% R74 2 1 4.7K_0402_5% R64 R67 2 1 +3VS U1 7 DEFAULT : 1 VGA SPREAD SPECTRUM (Fixed Down-Spread 1.25%) RESRRVED FOR M24 TEST AH15 AH16 AJ16 AJ17 AJ18 AK18 AJ20 AJ21 AK19 AJ19 AG16 AG17 AF16 AF17 AE18 AE19 AF19 AF20 AG19 AG20 2 0.1U_0402_16V4Z 1 Transmitter Extra Current PCI-E Lane Reversal Enable EXT_SSIN 13 RP82 AG4 GPIO4 *** 1 4 AJ10 AK10 AJ11 AH11 1 2 R488 @10_0402_5% 00: PCI Express 1.0A mode DEFAULT : 00 01: Kyrene-compatible mode 10: PCI Express 1.0 mode 11: PCI Express 1.0A mode and short-circuit internal loopback mode (Rx connected directly to Tx of PHY) 1 1 C25 DVPCNTL_0 DVPCNTL_1 DVPCNTL_2 DVPCNTL_3 MEM_ID0 MEM_ID1 MEM_ID2 GPIO(3:2) 2 1 C23 AH6 AJ6 AK6 AH7 AK7 AJ7 AH8 AJ8 AH9 AJ9 AK9 AH10 AE6 AG6 AF6 AE7 AF7 AE8 AG8 AF8 AE9 AF9 AG10 AF10 DEFAULT : 1 1 1 C21 DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8 DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DPVDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23 Transmitter De-emphasis Enable 3 1 C19 MCLK_SPREAD AE10 DEFAULT : 1 GPIO1 1 C17 POWER_SEL(High 3.3V):VDDC=1.05V (Low 0V ):VDDC=1.20V POW ER_SEL 48 0:Disable, 1:Enable Full Transmitter Output Swing Power @10K_0402_5% 2 1 General Straping (VGA Internal PD) GPIO0 2 1 @10K_0402_5% 1 C15 VGA_GPIO6 2 C46 PCIE_TX0P PCIE_TX0N PCIE_TX1P PCIE_TX1N PCIE_TX2P PCIE_TX2N PCIE_TX3P PCIE_TX3N PCIE_TX4P PCIE_TX4N PCIE_TX5P PCIE_TX5N PCIE_TX6P PCIE_TX6N PCIE_TX7P PCIE_TX7N PCIE_TX8P PCIE_TX8N PCIE_TX9P PCIE_TX9N PCIE_TX10P PCIE_TX10N PCIE_TX11P PCIE_TX11N PCIE_TX12P PCIE_TX12N PCIE_TX13P PCIE_TX13N PCIE_TX14P PCIE_TX14N PCIE_TX15P PCIE_TX15N VGA_GPIO4 +3VS 100_0402_1% 1 AF26 AE26 AC25 AB25 AC27 AB27 AC26 AB26 Y25 W25 Y27 W27 Y26 W26 U25 T25 U27 T27 U26 T26 P25 N25 P27 N27 P26 N26 L25 K25 L27 K27 L26 K26 VGA_GPIO3 ** E 2 10K_0402_5% 2 10K_0402_5% 2 @10K_0402_5% 2 @10K_0402_5% 2 10K_0402_5% 2 @10K_0402_5% 2 @10K_0402_5% VGA to others device connection 2 1 C44 VGA_PCIE_TXP15 VGA_PCIE_TXN15 VGA_PCIE_TXP14 VGA_PCIE_TXN14 VGA_PCIE_TXP13 VGA_PCIE_TXN13 VGA_PCIE_TXP12 VGA_PCIE_TXN12 VGA_PCIE_TXP11 VGA_PCIE_TXN11 VGA_PCIE_TXP10 VGA_PCIE_TXN10 VGA_PCIE_TXP9 VGA_PCIE_TXN9 VGA_PCIE_TXP8 VGA_PCIE_TXN8 VGA_PCIE_TXP7 VGA_PCIE_TXN7 VGA_PCIE_TXP6 VGA_PCIE_TXN6 VGA_PCIE_TXP5 VGA_PCIE_TXN5 VGA_PCIE_TXP4 VGA_PCIE_TXN4 VGA_PCIE_TXP3 VGA_PCIE_TXN3 VGA_PCIE_TXP2 VGA_PCIE_TXN2 VGA_PCIE_TXP1 VGA_PCIE_TXN1 VGA_PCIE_TXP0 VGA_PCIE_TXN0 2 C55 2 C48 2 C40 2 C45 2 C16 2 C18 2 C20 2 C22 2 C24 2 C26 2 C28 2 C30 2 C32 2 C38 2 C36 2 C34 VGA_GPIO2 VGA_GPIO5 @10K_0402_5% 1 C51 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 0.1U_0402_10V6K VGA_GPIO1 2 2 1 C58 DVO / EXT TMDS / GPIO NBGFX_RXP15 NBGFX_RXN15 NBGFX_RXP14 NBGFX_RXN14 NBGFX_RXP13 NBGFX_RXN13 NBGFX_RXP12 NBGFX_RXN12 NBGFX_RXP11 NBGFX_RXN11 NBGFX_RXP10 NBGFX_RXN10 NBGFX_RXP9 NBGFX_RXN9 NBGFX_RXP8 NBGFX_RXN8 NBGFX_RXP7 NBGFX_RXN7 NBGFX_RXP6 NBGFX_RXN6 NBGFX_RXP5 NBGFX_RXN5 NBGFX_RXP4 NBGFX_RXN4 NBGFX_RXP3 NBGFX_RXN3 NBGFX_RXP2 NBGFX_RXN2 NBGFX_RXP1 NBGFX_RXN1 NBGFX_RXP0 NBGFX_RXN0 PCI EXPRESS Place AC capacitors close to transmiter In this case, these caps should place close to VGA ASIC LVDS 7 VGA_PCIE_RXP[0..15] VGA_GPIO0 VGA_GPIO1 VGA_GPIO2 VGA_GPIO3 VGA_GPIO4 VGA_GPIO5 VGA_GPIO6 AJ5 AH5 AJ4 AK4 AH4 AF4 AJ3 AK3 AH3 AJ2 AH2 AH1 AG3 AG1 AG2 AF3 AF2 DVOMODE TMDS 7 NBGFX_RXP[0..15] 7 VGA_PCIE_RXN[0..15] GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO_PWRCNTL GPIO_MEMSSIN Part 1 of 5 DAC2 7 NBGFX_RXN[0..15] PCIE_RX0P PCIE_RX0N PCIE_RX1P PCIE_RX1N PCIE_RX2P PCIE_RX2N PCIE_RX3P PCIE_RX3N PCIE_RX4P PCIE_RX4N PCIE_RX5P PCIE_RX5N PCIE_RX6P PCIE_RX6N PCIE_RX7P PCIE_RX7N PCIE_RX8P PCIE_RX8N PCIE_RX9P PCIE_RX9N PCIE_RX10P PCIE_RX10N PCIE_RX11P PCIE_RX11N PCIE_RX12P PCIE_RX12N PCIE_RX13P PCIE_RX13N PCIE_RX14P PCIE_RX14N PCIE_RX15P PCIE_RX15N CLK SS VGA to others device connection 1 AH30 AG30 AG29 AF29 AE29 AE30 AD30 AD29 AC29 AB29 AB30 AA30 AA29 Y29 W29 W30 V30 V29 U29 T29 T30 R30 R29 P29 N29 N30 M30 M29 L29 K29 K30 J30 THERM DAC1 VGA_PCIE_RXP15 VGA_PCIE_RXN15 VGA_PCIE_RXP14 VGA_PCIE_RXN14 VGA_PCIE_RXP13 VGA_PCIE_RXN13 VGA_PCIE_RXP12 VGA_PCIE_RXN12 VGA_PCIE_RXP11 VGA_PCIE_RXN11 VGA_PCIE_RXP10 VGA_PCIE_RXN10 VGA_PCIE_RXP9 VGA_PCIE_RXN9 VGA_PCIE_RXP8 VGA_PCIE_RXN8 VGA_PCIE_RXP7 VGA_PCIE_RXN7 VGA_PCIE_RXP6 VGA_PCIE_RXN6 VGA_PCIE_RXP5 VGA_PCIE_RXN5 VGA_PCIE_RXP4 VGA_PCIE_RXN4 VGA_PCIE_RXP3 VGA_PCIE_RXN3 VGA_PCIE_RXP2 VGA_PCIE_RXN2 VGA_PCIE_RXP1 VGA_PCIE_RXN1 VGA_PCIE_RXP0 VGA_PCIE_RXN0 1 R481 1 R479 1 R482 1 R486 1 R82 1 R86 1 R487 0.1U_0402_16V4Z B @2200P_0402_50V7K A D Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet E 14 of 53 A B MDA[0..63] C D MDB[0..63] MDA[0..63] 16 DQ SA[0..7] DQMA#[0..7] DQSB[0..7] 17 DQMB#[0..7] DQMA#[0..7] 16 MAA[0..13] MDB[0..63] 17 DQ SB[0..7] DQSA[0..7] 16 DQMB#[0..7] 17 MAB[0..13] MAA[0..13] 16 E MAB[0..13] 17 1 1 U31B 3 DQA0 DQA1 DQA2 DQA3 DQA4 DQA5 DQA6 DQA7 DQA8 DQA9 DQA10 DQA11 DQA12 DQA13 DQA14 DQA15 DQA16 DQA17 DQA18 DQA19 DQA20 DQA21 DQA22 DQA23 DQA24 DQA25 DQA26 DQA27 DQA28 DQA29 DQA30 DQA31 DQA32 DQA33 DQA34 DQA35 DQA36 DQA37 DQA38 DQA39 DQA40 DQA41 DQA42 DQA43 DQA44 DQA45 DQA46 DQA47 DQA48 DQA49 DQA50 DQA51 DQA52 DQA53 DQA54 DQA55 DQA56 DQA57 DQA58 DQA59 DQA60 DQA61 DQA62 DQA63 Part 2 of 5 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MAA14 E22 B22 B23 B24 C23 C22 F22 F21 C21 A24 C24 A25 E21 B20 C19 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7 J25 F29 E25 A27 F15 C15 C11 E11 DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7 QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7 J27 F30 F24 B27 E16 B16 B11 F10 DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7 U31C RASA# A19 MRASA# MRASA# 16 CASA# E18 MCASA# MCASA# 16 WEA# E19 MWEA# MWEA# 16 CSA0# E20 MCSA# MCSA# 16 CSA1# F20 CKEA B19 MCKEA MCKEA 16 CLKA0 CLKA0# B21 MCLKA0_N R31 1 C20 MCLKA0#_N R33 1 2 10_0402_5% 2 10_0402_5% CLKA1 CLKA1# C18 MCLKA1_N R49 1 A18 MCLKA1#_N R53 1 2 10_0402_5% 2 10_0402_5% MVREFD MVREFS DIMA_0 DIMA_1 MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63 B7 +MVREFD (15mils) B8 +MVREFS (15mils) NMCLKA0 16 NMCLKA0# 16 NMCLKA1 16 NMCLKA1# 16 D30 B13 M24P_BGA708 +VRAM_VDD 1 DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8 DQB9 DQB10 DQB11 DQB12 DQB13 DQB14 DQB15 DQB16 DQB17 DQB18 DQB19 DQB20 DQB21 DQB22 DQB23 DQB24 DQB25 DQB26 DQB27 DQB28 DQB29 DQB30 DQB31 DQB32 DQB33 DQB34 DQB35 DQB36 DQB37 DQB38 DQB39 DQB40 DQB41 DQB42 DQB43 DQB44 DQB45 DQB46 DQB47 DQB48 DQB49 DQB50 DQB51 DQB52 DQB53 DQB54 DQB55 DQB56 DQB57 DQB58 DQB59 DQB60 DQB61 DQB62 DQB63 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 MAB14 Part 3 of 5 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 N5 M1 M3 L3 L2 M2 M5 P6 N3 K2 K3 J2 P5 P3 P2 DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7 E6 B2 J5 G3 W6 W2 AC6 AD2 DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7 QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7 F6 B3 K6 G1 V5 W1 AC5 AD1 DQSB0 DQSB1 DQSB2 DQSB3 DQSB4 DQSB5 DQSB6 DQSB7 2 RASB# R2 MRASB# CASB# T5 MCASB# WEB# T6 MWEB# CSB0# R5 MCSB# CSB1# R6 2 1 R3 MCKEB N1 N2 MCLKB0_N MCLKB0#_N R496 1 R495 1 2 10_0402_5% 2 10_0402_5% NMCLKB0 17 NMCLKB0# 17 CLKB1 CLKB1# T2 T3 MCLKB1_N MCLKB1#_N R108 1 R107 1 2 10_0402_5% 2 10_0402_5% NMCLKB1 17 NMCLKB1# 17 DIMB_0 DIMB_1 E3 AA3 ROMCS# MEMTEST R79 R75 R80 M24(2.5V VRAM) POP UNPOP UNPOP POP M24(1.8V VRAM) UNPOP POP POP UNPOP MEMVMODE[1..0]=0 1 =>VRAM=2.5VDDR AF5 C6 C7 MEMVMODE0 MEMVMODE1 C8 MEMTEST (15mil) +MVREFD (15mils) 1 1 2 R478 100_0402_1% C115 0.1U_0402_16V4Z 2 R62 100_0402_1% M26(1.8V VRAM) UNPOP UNPOP UNPOP UNPOP 1 2 1 4.7K_0402_5% R79 2 MEMVMODE0 +1.8VS @4.7K_0402_5% 1 2 1 @4.7K_0402_5% R75 2 MEMVMODE1 4.7K_0402_5% 1 2 For Uni-directional signals, series resistors should be placed close to the VGA ASIC. Such as MDQMB[0..7] ,MBA[0..13],MRASB#,MCASB#, MWEB#,MCSB#[0..1] ** PJ24 2 3 R72 1 47_0402_1% R76 JUMP_43X118 2 MCKEB 17 R76 2 R474 100_0402_1% 1 C611 0.1U_0402_16V4Z PJ23 R54 100_0402_1% 1 +MVREFS (15mils) JUMP_43X118 2 MCSB# 17 CKEB MEMVMODE_0 MEMVMODE_1 2 @JUMP_43X118 PJ22 2 1 1 2 2 MWEB# 17 R80 1 +VRAM_VDD 1 +1.8VS 2 1 2 2 MCASB# 17 CLKB0 CLKB0# PJ21 +2.5VS MRASB# 17 M24P_BGA708 1 +VRAM_VDD (6A,240mils ,Via NO.= 12) D7 F7 E7 G6 G5 F5 E5 C4 B5 C5 A4 B4 C2 D3 D1 D2 G4 H6 H5 J6 K5 K4 L6 L5 G2 F3 H2 E2 F2 J3 F1 H3 U6 U5 U3 V6 W5 W4 Y6 Y5 U2 V2 V1 V3 W3 Y2 Y3 AA2 AA6 AA5 AB6 AB5 AD6 AD5 AE5 AE4 AB2 AB3 AC2 AC3 AD3 AE1 AE2 AE3 MEMORY INTERFACE B H28 H29 J28 J29 J26 H25 H26 G26 G30 D29 D28 E28 E29 G29 G28 F28 G25 F26 E26 F25 E24 F23 E23 D22 B29 C29 C25 C27 B28 B25 C26 B26 F17 E17 D16 F16 E15 F14 E14 F13 C17 B18 B17 B15 C13 B14 C14 C16 A13 A12 C12 B12 C10 C9 B9 B10 E13 E12 E10 F12 F11 E9 F9 F8 MEMORY INTERFACE A 2 MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 1 JUMP_43X118 4 For Bi-directional signals, series resistors should be placed close to the memory. Such as MDB[0..63] and MDQSB[0..7] (6A,240mils ,Via NO.= 12) For Uni-directional signals, series resistors should be placed close to the VGA ASIC. Such as MDQMA[0..7] ,MAA[0..13],MRASA#,MCASA#, MWEA#,MCSA#[0..1] 4 Compal Electronics, Inc. Title For Bi-directional signals, series resistors should be placed close to the memory. Such as MDA[0..63] and MDQSA[0..7] A M24-P VRAM INTERFACE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B C D Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet E 15 of 53 A B C D As close as possible to related pin +VRAM_VDD 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 C65 1 C49 C54 1 1 C60 C52 1 C53 1 1 C59 1 C67 1 C57 1 1 C627 C75 2 2 2 2 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 2 2 2 0.1U_0402_16V4Z 2 2 0.1U_0402_16V4Z 1 1 C614 C606 C623 1 1 0.1U_0402_16V4Z C613 1 C630 1 C631 1 C632 C56 2 2 0.1U_0402_16V4Z 10U_0805_10V4Z 1 1 E +VRAM_VDD 2 2 2 2 2 2 2 2 C601 0.1U_0402_16V4Z DQMA#[0..7] 15 DQMA#[0..7] 10U_0805_10V4Z 2 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z MAA[0..13] 15 MAA[0..13] +VRAM_VDD 10U_0805_10V4Z MDA[0..63] 15 MDA[0..63] 1 1 DQ SA[0..7] 15 DQSA[0..7] 1 1 C641 C600 2 2 NC NC NC NC NC NC NC NC NC E7 E8 E10 K6 K7 K8 K9 L5 L10 E5 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ 0.1U_0402_16V4Z 1 C1103 1K_0402_1% 2 1 D7 D8 E4 E11 L4 L7 L8 L11 2 VDD VDD VDD VDD VDD VDD VDD VDD 2 B2 H13 H2 B13 DQS0 DQS1 DQS2 DQS3 VR_VREF_2 N13 M13 L9 M10 VREF MCL RFU1 RFU2 MRASA# MCASA# MWEA# MCSA# M2 L2 L3 N2 RAS# CAS# WE# CS# MCKEA N12 CKE M11 M12 CK CK# C4 C11 H4 H11 L12 L13 M3 M4 N3 NC NC NC NC NC NC NC NC NC E7 E8 E10 K6 K7 K8 K9 L5 L10 E5 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 15 NMCLKA1 15 NMCLKA1# +VRAM_VDD 1 DQSA4 DQSA6 DQSA5 DQSA7 1 2 C1104 1 2 C1105 1 2 C1106 1 1 R465 2 1 1 C592 R472 @470P_0402_50V7K C1107 2 K4D263238E-GC36_FBGA144 2 @56_0402_1% 2 @56_0402_1% VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11 VDD VDD VDD VDD VDD VDD VDD VDD D7 D8 E4 E11 L4 L7 L8 L11 2 +VRAM_VDD 1 C1108 2 1 C1109 1 C1110 2 1 C1111 2 1 C1112 3 0.1U_0402_16V4Z C4 C11 H4 H11 L12 L13 M3 M4 N3 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ DM0 DM1 DM2 DM3 MDA37 MDA39 MDA36 MDA38 MDA35 MDA32 MDA33 MDA34 MDA48 MDA50 MDA51 MDA49 MDA52 MDA55 MDA53 MDA54 MDA44 MDA46 MDA45 MDA43 MDA42 MDA47 MDA40 MDA41 MDA61 MDA58 MDA63 MDA62 MDA60 MDA59 MDA57 MDA56 0.1U_0402_16V4Z CK CK# 2 B3 H12 H3 B12 B7 C6 B6 B5 C2 D3 D2 E2 K13 K12 J13 J12 G13 G12 F13 F12 F3 F2 G3 G2 J3 J2 K2 K3 E13 D13 D12 C13 B10 B9 C9 B8 0.1U_0402_16V4Z CKE 1 DQMA#4 DQMA#6 DQMA#5 DQMA#7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 0.1U_0402_16V4Z N12 M11 M12 C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11 1K_0402_1% RAS# CAS# WE# CS# F6 F7 F8 F9 G6 G7 G8 G9 H6 H7 H8 H9 J6 J7 J8 J9 3 M2 L2 L3 N2 C104 A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1 0.1U_0402_16V4Z 2 @56_0402_1% 2 @56_0402_1% VREF MCL RFU1 RFU2 R46 (25mil) N5 N6 M6 N7 N8 M9 N9 N10 N11 M8 L6 M7 N4 M5 2 2 VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH MCKEA 15 MCKEA N13 M13 L9 M10 R41 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 F6 F7 F8 F9 G6 G7 G8 G9 H6 H7 H8 H9 J6 J7 J8 J9 MRASA# MCASA# MWEA# MCSA# DQS0 DQS1 DQS2 DQS3 +VRAM_VDD 0.1U_0402_16V4Z VR_VREF_1 B2 H13 H2 B13 MDA24 MDA28 MDA25 MDA27 MDA31 MDA30 MDA26 MDA29 MDA6 MDA5 MDA4 MDA7 MDA1 MDA2 MDA0 MDA3 MDA17 MDA18 MDA19 MDA20 MDA16 MDA22 MDA23 MDA21 MDA9 MDA10 MDA12 MDA11 MDA14 MDA13 MDA15 MDA8 0.1U_0402_16V4Z DM0 DM1 DM2 DM3 DQSA3 DQSA0 DQSA2 DQSA1 MRASA# MCASA# MWEA# MCSA# 15 NMCLKA0 15 NMCLKA0# C76 1 R441 2 1 1 @470P_0402_50V7K R442 B3 H12 H3 B12 B7 C6 B6 B5 C2 D3 D2 E2 K13 K12 J13 J12 G13 G12 F13 F12 F3 F2 G3 G2 J3 J2 K2 K3 E13 D13 D12 C13 B10 B9 C9 B8 0.1U_0402_16V4Z 2 DQMA#3 DQMA#0 DQMA#2 DQMA#1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 0.1U_0402_16V4Z 1 A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1 0.1U_0402_16V4Z 15 15 15 15 C573 N5 N6 M6 N7 N8 M9 N9 N10 N11 M8 L6 M7 N4 M5 VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH 2 R446 (25mil) 0.1U_0402_16V4Z 1 1 2 R448 1K_0402_1% 2 1K_0402_1% +VRAM_VDD MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10 U5 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ U29 B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10 10U_0805_10V4Z K4D263238E-GC36_FBGA144 4 4 Compal Electronics, Inc. Title VRAM DDR CHANNEL A THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet E 16 of 53 A B C D As close as possible to related pin 0.1U_0402_16V4Z 10U_0805_10V4Z 1 1 C237 2 2 C258 2 1 2 C224 2 0.1U_0402_16V4Z 10U_0805_10V4Z 1 C262 0.1U_0402_16V4Z 1 2 C225 1 1 C251 2 C242 2 1 2 C693 C250 0.1U_0402_16V4Z DQ SB[0..7] 15 DQSB[0..7] 15 MDB[0..63] 0.1U_0402_16V4Z +VRAM_VDD 10U_0805_10V4Z 1 C732 2 MDB[0..63] 2 1 C699 2 10U_0805_10V4Z 1 C698 2 C722 2 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 1 C712 2 1 C707 2 0.1U_0402_16V4Z 1 C713 2 2 C265 +VRAM_VDD 10U_0805_10V4Z MAB[0..13] 15 MAB[0..13] C217 N12 CKE M11 M12 15 NMCLKB0 15 NMCLKB0# 1 R110 1 C189 R111 @470P_0402_50V7K 2 1 2 @56_0402_1% 2 @56_0402_1% 3 C4 C11 H4 H11 L12 L13 M3 M4 N3 NC NC NC NC NC NC NC NC NC VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11 VDD VDD VDD VDD VDD VDD VDD VDD D7 D8 E4 E11 L4 L7 L8 L11 F6 F7 F8 F9 G6 G7 G8 G9 H6 H7 H8 H9 J6 J7 J8 J9 E7 E8 E10 K6 K7 K8 K9 L5 L10 E5 CK CK# VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ 2 B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10 A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1 DQMB#7 DQMB#4 DQMB#5 DQMB#6 B3 H12 H3 B12 DM0 DM1 DM2 DM3 DQSB7 DQSB4 DQSB5 DQSB6 B2 H13 H2 B13 DQS0 DQS1 DQS2 DQS3 VR_VREF_4 N13 M13 L9 M10 VREF MCL RFU1 RFU2 M2 L2 L3 N2 RAS# CAS# WE# CS# MRASB# MCASB# MWEB# MCSB# MCKEB 15 NMCLKB1 15 NMCLKB1# 1 R498 2 1 1 C686 R499 @470P_0402_50V7K +VRAM_VDD 1 C1118 2 1 C1119 2 1 C1120 2 1 C1121 2 1 C1122 2 2 @56_0402_1% 2 @56_0402_1% N12 CKE M11 M12 CK CK# C4 C11 H4 H11 L12 L13 M3 M4 N3 NC NC NC NC NC NC NC NC NC E7 E8 E10 K6 K7 K8 K9 L5 L10 E5 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 B7 C6 B6 B5 C2 D3 D2 E2 K13 K12 J13 J12 G13 G12 F13 F12 F3 F2 G3 G2 J3 J2 K2 K3 E13 D13 D12 C13 B10 B9 C9 B8 1 1 1 C727 C705 2 2 2 10U_0805_10V4Z VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11 VDD VDD VDD VDD VDD VDD VDD VDD K4D263238E-GC36_FBGA144 MDB61 MDB62 MDB60 MDB63 MDB58 MDB56 MDB57 MDB59 MDB32 MDB33 MDB34 MDB35 MDB37 MDB36 MDB39 MDB38 MDB46 MDB47 MDB44 MDB45 MDB42 MDB40 MDB43 MDB41 MDB49 MDB48 MDB51 MDB50 MDB55 MDB53 MDB54 MDB52 2 +VRAM_VDD 3 1 D7 D8 E4 E11 L4 L7 L8 L11 C1113 0.1U_0402_16V4Z MCKEB 1 N5 N6 M6 N7 N8 M9 N9 N10 N11 M8 L6 M7 N4 M5 2 VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH RAS# CAS# WE# CS# C188 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 F6 F7 F8 F9 G6 G7 G8 G9 H6 H7 H8 H9 J6 J7 J8 J9 M2 L2 L3 N2 (25mil) 0.1U_0402_16V4Z MRASB# MCASB# MWEB# MCSB# 1 VREF MCL RFU1 RFU2 2 N13 M13 L9 M10 R113 1K_0402_1% VR_VREF_3 1 DQS0 DQS1 DQS2 DQS3 2 B2 H13 H2 B13 R109 1K_0402_1% DQSB1 DQSB2 DQSB3 DQSB0 +VRAM_VDD 0.1U_0402_16V4Z DM0 DM1 DM2 DM3 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB22 MDB23 MDB20 MDB21 MDB19 MDB16 MDB18 MDB17 MDB27 MDB25 MDB30 MDB28 MDB26 MDB24 MDB29 MDB31 MDB7 MDB1 MDB2 MDB0 MDB6 MDB3 MDB5 MDB4 0.1U_0402_16V4Z 15 MCKEB B3 H12 H3 B12 B7 C6 B6 B5 C2 D3 D2 E2 K13 K12 J13 J12 G13 G12 F13 F12 F3 F2 G3 G2 J3 J2 K2 K3 E13 D13 D12 C13 B10 B9 C9 B8 0.1U_0402_16V4Z MRASB# MCASB# MWEB# MCSB# DQMB#1 DQMB#2 DQMB#3 DQMB#0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 0.1U_0402_16V4Z 2 A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 BA0 BA1 0.1U_0402_16V4Z 1 N5 N6 M6 N7 N8 M9 N9 N10 N11 M8 L6 M7 N4 M5 VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH VSS TH 15 15 15 15 C685 0.1U_0402_16V4Z 1 2 1 2 R501 (25mil) 1K_0402_1% R497 2 1K_0402_1% +VRAM_VDD MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 1 + C751 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ U9 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ U34 B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10 2 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2 C717 DQMB#[0..7] 15 DQMB#[0..7] 1 1 1 C1114 1 C1115 2 1 C1116 2 1 C1117 0.1U_0402_16V4Z 1 C268 1 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 150U_D3_4VM_R18 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z +VRAM_VDD E +VRAM_VDD 2 2 K4D263238E-GC36_FBGA144 4 4 Compal Electronics, Inc. Title VRAM DDR CHANNEL B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet E 17 of 53 1000P_0402_50V7K C68 1 2 C78 1 2 10U_0805_10V4Z 1000P_0402_50V7K C117 1 2 1000P_0402_50V7K C118 1 2 1 1 2 10U_0805_10V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K C119 1 2 C82 C66 0.1U_0402_16V4Z C120 1 2 0.1U_0402_16V4Z C121 1 2 +MPVDD1.8 0.1U_0402_16V4Z C122 1 2 1 2 CHB1608U301_0603 1 C628 2 C1125 0.1U_0402_16V4Z C114 1 2 1 0.1U_0402_16V4Z C109 1 2 0.1U_0402_16V4Z +VDD_PLL1.8 VDD15_0 VDD15_1 VDD15_2 VDD15_3 VDD15_4 VDD15_5 VDD15_6 VDD15_7 2 C541 10U_0805_10V4Z 2 1 1 1 1 C70 2 C551 2 1 200mA C101+VDD_PNLIO2.5 2 6 0mA +VDD_PNLIO1.8 0.1U_0402_16V4Z 0.1U_0402_16V4Z C549 10U_0805_10V4Z AE16 AE17 AF15 AE15 AH19 AH13 1 5mA +VDD_PLL1.8 AF13 AF14 +VDD_PNLIO1.8 +1.8VS L35 1 2 CHB1608U301_0603 2 C572 10U_0805_10V4Z 2 1 1 1 1 C83 2 C100 2 1 F18 N6 120mA C97 +VDD_DAC2.5 AF21 AE20 5 mA 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 7 0mA +VDD_PLL1.8 C575 10U_0805_10V4Z 3 400mA +VRAM_VDD 0.1U_0402_16V4Z ATi suggestion: Using filter is acceptable (Default) Using liner regulator is optimal. (Reserve) 3 0mA +VDD_PLL1.8 VDDRH0 VDDRH1 AVDD A7 PCIE_VDDR_12_0 PCIE_VDDR_12_1 PCIE_VDDR_12_2 PCIE_VDDR_12_3 PCIE_VDDR_12_4 A2VDD_0 A2VDD_1 A2VDDQ 1 0mA +MPVDD1.8 VDDR4_0 VDDR4_1 VDDR4_2 VDDR4_3 VDDR4_4 TXVDDR_0 TXVDDR_1 AF23 AK28 VDDR3_0 VDDR3_1 VDDR3_2 VDDR3_3 VDDR3_4 VDDR3_5 VDDR3_6 LPVDD TPVDD AH23 AE23 AE22 1 0mA +VDD_PNLIO1.8 LVDDR_25_0 LVDDR_25_1 LVDDR_18_0 LVDDR_18_1 PCIE_PVDD_12_0 PCIE_PVDD_12_1 PCIE_PVDD_12_2 VDD1DI VDD2DI PCIE_PVDD_18_0 PCIE_PVDD_18_1 PCIE_PVDD_18_2 PCIE_PVDD_18_3 PVDD 2 W16 500mA M15 R19 T12 1 *** 1 C1081 1 2 2 0.1U_0402_16V4Z 2 C1080 1 2 10U_0805_10V4Z 5 0mA AD7 AD19 AD21 AC22 AC8 AC21 AC19 2 C570 AG7 AD9 AC9 AC10 AD10 0.1U_0402_16V4Z 1000P_0402_50V7K 1 C123 1 1 C73 1 10U_0805_10V4Z 2 2 C80 2 1 +1.5VS 1 C1094 2 C1095 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 C113 1 C116 2 1000P_0402_50V7K 10U_0805_10V4Z 2 C112 C574 2 2 0.1U_0402_16V4Z +3VS 2 C571 1 1 10U_0805_10V4Z +1.2VS C560 1100mA AG26 AK29 AJ30 AG28 AG27 0.1U_0402_16V4Z 1 1 C559 C558 1 2 100mA 1 2 2 2 C562 C561 2 2 1 1 1 1 1 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K L32 2 1 2 0_0603_1% 0.1U_0402_16V4Z 1 2 C64 C542 C63 2 2 1000P_0402_50V7K U23 T23 V23 W23 2 C552 C553 +PCIE_PVDD1.2 N24 N23 P23 2 1 1 10U_0805_10V4Z 1 + C555 10U_0805_10V4Z C1032 150U_D3_4VM_R18 2 ** MPVDD 500mA 2 (20 mil) 1 C62 2 0.1U_0402_16V4Z PCIE_VSS_0 PCIE_VSS_1 PCIE_VSS_2 PCIE_VSS_3 PCIE_VSS_4 PCIE_VSS_5 PCIE_VSS_6 PCIE_VSS_7 PCIE_VSS_8 PCIE_VSS_9 PCIE_VSS_10 PCIE_VSS_11 PCIE_VSS_12 PCIE_VSS_13 PCIE_VSS_14 PCIE_VSS_15 PCIE_VSS_16 PCIE_VSS_17 PCIE_VSS_18 PCIE_VSS_19 PCIE_VSS_20 PCIE_VSS_21 PCIE_VSS_22 PCIE_VSS_23 PCIE_VSS_24 PCIE_VSS_25 PCIE_VSS_26 PCIE_VSS_27 PCIE_VSS_28 PCIE_VSS_29 PCIE_VSS_30 PCIE_VSS_31 PCIE_VSS_32 PCIE_VSS_33 PCIE_VSS_34 PCIE_VSS_35 PCIE_VSS_36 PCIE_VSS_37 PCIE_VSS_38 PCIE_VSS_39 Part 5 of 5 NC_0 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 K28 L28 M27 M26 M24 M25 M28 P28 N28 R25 R23 R24 R26 R27 R28 T28 T24 U28 V24 V26 V27 V25 V28 Y28 W24 W28 AA26 AA27 AA23 AA24 AA25 AA28 AB28 AC28 AD28 AD26 AD27 AE28 AF28 AH29 1 D9 D13 D19 D25 E4 T4 AB4 2 AVSSQ AD22 LVSSR_0 LVSSR_1 LVSSR_2 LVSSR_3 AF18 AH17 AG15 AG18 LPVSS TPVSS TXVSSR_0 TXVSSR_1 TXVSSR_2 VSSRH0 VSSRH1 A2VSSN_0 A2VSSN_1 A2VSSQ AVSSN VSS1DI VSS2DI AH18 AH12 AH14 AG13 AG14 F19 M6 AH20 AG21 AF22 AH22 AE24 AE21 3 PVSS MPVSS AJ28 A6 +1.8VS 2 C61 0.1U_0402_16V4Z VSS_0 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 M24P_BGA708 ### 2 2 C543 10U_0805_10V4Z 1 1 10U_0805_10V4Z 1 C1037 2 1 C1038 2 1 C1039 ** +VRAM_VDD 2 C1068 1 2 C1069 1 2 C1070 1 2 C1071 1 2 1 C1072 C1078 + 1 2 1 C1079 + 2 ### 2 1 C1092 2 1 1 C1093 C1084 22U_1206_10V4Z SA052050010(MIC5205-2.8BM5), max:150mA 1 2 0.1U_0402_16V4Z MIC5205-2.8BM5_SOT23-5~D 2 C1067 22U_1206_10V4Z 2 150U_D3_4VM_R18 *** 150U_D3_4VM_R18 GND 5 10U_0805_10V4Z 2 0.1U_0402_16V4Z 10U_0805_10V4Z C563 10U_0805_10V4Z C91 0.1U_0402_16V4Z VOUT 1 1 C99 2 C77 + 2 ### ### 1 1 C694 0.1U_0402_16V4Z 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z C105 1 1 1 1 C1083 C1090 C1091 C1082 2 C72 C110 ### 0.1U_0402_16V4Z 1 1 2 0.1U_0402_16V4Z 10U_0805_10V4Z 2 C107 0.1U_0402_16V4Z 2 1 1 2 22U_1206_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 2 10U_0805_10V4Z 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z EN 1 0.1U_0402_16V4Z 4 2 PG 3 10U_0805_10V4Z 1 C545 C87 + C682 1 A2 A10 A16 A22 A29 C1 C3 C28 C30 D27 D24 D21 D18 D15 D12 D10 D6 D4 F27 G9 G12 G16 G18 G21 G24 H27 H23 H21 H18 H16 H14 H12 H9 H8 H4 J23 J24 AD12 AG5 AG9 AG11 R7 P4 M7 M8 L4 K1 K7 K8 R8 T1 U4 U8 W7 W8 Y4 AB8 AB7 AB1 AC4 AC12 AC14 AD16 AC16 AC18 AD18 AK2 AJ1 M16 N16 N15 P15 P16 R18 R17 R16 R15 R14 R13 R12 T13 T14 T15 W15 V16 V15 U15 U16 T19 T18 T17 T16 2 C89 1 +VDD_PNLIO2.5 0.1U_0402_16V4Z C540 470P_0402_50V7K 4 1 2 C1124 0.1U_0402_16V4Z 2 1 2 0.1U_0402_16V4Z 1 VIN 2 C1123 1 M24P_BGA708 C544 0.1U_0402_16V4Z 1 2 C556 U27 +3VS 2 0.1U_0402_16V4Z 1 2 C86 2 0.1U_0402_16V4Z 5 0mA P8 Y8 AC11 AC20 H20 H11 M23 Y23 +VDD_PNLIO2.5 2 C79 C95 1 *** L31 1 2 CHB1608U301_0603 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z +VDD_PNLIO2.5 +2.5VS C85 0.1U_0402_16V4Z 1 C668 1 2 C1085 1 2 C1086 1 2 1 C1087 C1088 2 1 2 2 2 2 2 2 2 2 C1089 C1096 C1097 C1098 C1099 C1100 C1101 C1102 1 1 1 1 1 1000P_0402_50V7K +1.8VS 0.1U_0402_16V4Z 1 2 CHB1608U301_0603 POWER L29 1 C96 C657 1 1000P_0402_50V7K 2 2 0.1U_0402_16V4Z C639 0.1U_0402_16V4Z 1 2 1 1000P_0402_50V7K 1 2 1000P_0402_50V7K 1 2 0.1U_0402_16V4Z 1000P_0402_50V7K 2 1 VDDC1_0 VDDC1_1 VDDC1_2 VDDC1_3 2 2 1000P_0402_50V7K C103 C140 1000P_0402_50V7K 2 1000P_0402_50V7K C649 10U_0805_10V4Z 10U_0805_10V4Z +1.8VS 1 C84 1000P_0402_50V7K L47 C74 10U_0805_10V4Z 2 1 C93 0.1U_0402_16V4Z 1 2 1 C71 1 1000P_0402_50V7K 1000P_0402_50V7K 2 2 C1126 C94 0.1U_0402_16V4Z 2 150U_D3_4VM_R18 ** 1 C41 + 1000P_0402_50V7K 1 C1040 + 150U_D3_4VM_R18 +VRAM_VDD 1 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z C130 1 2 470U_D2_2.5VM 1 C564 C102 1 2 10U_0805_10V4Z 2 C150 1000P_0402_50V7K 0.1U_0402_16V4Z 2 C565 10U_0805_10V4Z C663 1 2 470U_D2_2.5VM L34 1 2 CHB1608U301_0603 +2.5VS C108 1 2 10U_0805_10V4Z 1 1000P_0402_50V7K C81 1 2 1 2 10U_0805_10V4Z +VDD_DAC2.5 2 10U_0805_10V4Z 1000P_0402_50V7K C90 1 2 C92 ### 2 10U_0805_10V4Z 0.1U_0402_16V4Z ### 0.1U_0402_16V4Z 1 2 10U_0805_10V4Z AC13 AD13 AD15 AC15 AC17 P17 P18 P19 U12 U13 U14 U17 U18 U19 V19 V18 V17 V14 V13 V12 N18 N17 N14 W17 W18 W12 W13 W14 N13 N19 M19 M18 M12 N12 M13 M14 P12 P13 P14 M17 W19 0.1U_0402_16V4Z 1 2 10U_0805_10V4Z C98 1 2 VDDC_0 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32 VDDC_33 VDDC_34 VDDC_35 VDDC_36 VDDC_37 VDDC_38 VDDC_39 VDDC_40 Part 4 of 5 22U_1206_10V4Z C1061 2 10U_0805_10V4Z C69 C548 7500mA VDDR1_0 VDDR1_1 VDDR1_2 VDDR1_3 VDDR1_4 VDDR1_5 VDDR1_6 VDDR1_7 VDDR1_8 VDDR1_9 VDDR1_10 VDDR1_11 VDDR1_12 VDDR1_13 VDDR1_14 VDDR1_15 VDDR1_16 VDDR1_17 VDDR1_18 VDDR1_19 VDDR1_20 VDDR1_21 VDDR1_22 VDDR1_23 VDDR1_24 VDDR1_25 VDDR1_26 VDDR1_27 VDDR1_28 VDDR1_29 VDDR1_30 VDDR1_31 VDDR1_32 VDDR1_33 VDDR1_34 VDDR1_35 VDDR1_36 VDDR1_37 VDDR1_38 VDDR1_39 VDDR1_40 VDDR1_41 VDDR1_42 VDDR1_43 VDDR1_44 VDDR1_45 VDDR1_46 VDDR1_47 VDDR1_48 VDDR1_49 VDDR1_50 VDDR1_51 VDDR1_52 VDDR1_53 10U_0805_10V4Z 1 T7 R4 R1 N8 N7 M4 L8 K23 K24 N4 J8 J7 J4 J1 H10 H13 H15 H17 T8 V4 V7 V8 AA1 AA4 AA7 AA8 A3 A9 A15 A21 A28 B1 B30 D26 D23 D20 D17 D14 D11 D8 D5 E27 F4 G7 G10 G13 G15 G19 G22 G27 H22 H19 AD4 L23 10U_0805_10V4Z 2 E U31E 10U_0805_10V4Z C50 1 2 C547 10U_0805_10V4Z U31D 400mA 2 22U_1206_10V4Z 22U_1206_10V4Z 1 2 CHB1608U301_0603 +1.8VS C131 1 D +VGA_CORE 22U_1206_10V4Z L28 C +VRAM_VDD GND B +VRAM_VDD C141 1 2 +VDD_PLL1.8 22U_1206_10V4Z 10U_0805_10V4Z A 1 1 1. Note: Power plane power budget reference document: ATi reference schematic:105--REF112-00B.PDF ATi Power Estimate: PM_M24_A1.pdf Compal Electronics, Inc. Title M24-P POWER THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number CustomLongbeach 100 Date: Rev 0.1 星期六 , 十一月 06, 2004 Sheet E 18 of 53 4 B C D TV-OUT CONNECTOR PANEL +LCDVDD CTRL CKT Reduce LUMA_1 and CRMA_1 length As short as possible 1 R403 100P_0402_50V8J 1 2 1 2 100P_0402_50V8J 1 C534 2 100P_0402_50V8J 2 1 2 3 4 C10 ground ground (luminance+sync) (crominance) ENVDD 8 ENVDD D 2 G Q29 S 2N7002_SOT23 SUYIN_030008FR004T100ZL 2 C590 4.7U_0805_10V4Z Q30 AOS 3401_SOT23 +LCDVDD 2 2 1 Y C Y C 1 1. 2. 3. 4. 3 2 1 2 3 2 3 1 C2 1 2 3 4 LUMA_2 CRMA_2 1 2 L25 CHB1608B121_0603 C531 3 2N7002_SOT23 S 10K_0402_5% 1 2 R454 2 G Q28 JP15 @22P_0402_50V8J C535 1 2 2 0_0402_5% D @DAN217_SOT23 1 2 L1 CHB1608B121_0603 1 80mil 0.01U_0402_16V7K 75_0603_1% R402 2 1 100K_0402_5% 3 14 CRMA 2 0_0402_5% R7 1 R458 +3VS D24 GND GND 1 75_0603_1% R6 2 1 @22P_0402_50V8J 1 2 5 6 C11 14 LUMA R473 300_0402_5% 2 75_0603_1% R400 2 1 2 @0_0402_5% +3VS 1 D1 @DAN217_SOT23 1 8 NB_CRMA 1 1 1 R401 CRMA_1 +5VALW +LCDVDD 1 LUMA_1 2 @0_0402_5% G 1 1 R5 75_0603_1% R2 2 D 8 NB_LUMA E S A 1 C588 80mil 1 1 2 R453 10K_0402_5% 2 1 C605 0.1U_0402_16V4Z 2 C602 4.7U_0805_10V4Z 100P_0402_50V8J +LCDVDD Width: 40mils Place below parts between JP6 and JP7 2 2 1 R485 LCD CONNECTOR +LCDVDD 2 C615 4.7U_0805_10V4Z 1 L43 @CHB2012U170_0805 IB+ 1 2 1 2 L42 @CHB2012U170_0805 B+ 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 KC FBM-L11-201209-221LMAT_0805 L45 B+ 2 1 DAC_BRIG 37,53 INVT_PWM 37,53 EDID_CLK +3VS EDID_CLK 14 1 TZOUT1+ 14 TZOUT1- 14 TXOUT0- 14 TXOUT0+ 14 TZOUT0- 14 TZOUT0+ 14 TXOUT1- 14 TXOUT1+ 14 0.1U_0402_16V4Z KC FBM-L11-201209-221LMAT_0805 L41 JP3 2 1 1 1 DISPOFF# 2 2 3 3 4 4 5 5 EDID_DATA 6 6 14 EDID_DATA 7 7 14 TZOUT28 8 14 TZOUT2+ 9 9 14 TXOUT210 14 TXOUT2+ 10 11 11 12 12 14 TXCLK+ 13 13 14 TXCLK14 14 14 TZCLK15 15 14 TZCLK+ B+ 1 R483 +3VS 2 10K_0402_5% 1 37,53 BKOFF# C645 2 100K_0402_5% 2 C633 DISPOFF# D29 CH751H-40_SC76 1 2 220P_0402_50V7K 2 ACES_88107-3000 3 3 R755 +5VALW +3VS 1 R756 @100K_0402_5% 2 C616 @4.7U_0805_10V4Z 1 8 8 8 8 8 8 8 NB_EDID_CLK NB_TZOUT1+ NB_TZOUT1NB_TZOUT0NB_TZOUT0+ NB_TXOUT0NB_TXOUT0+ 8 NB_TXCLK+ 8 NB_TXCLK- 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 IB+ DAC_BRIG INVT_PWM @ACES_88107-3000 NB_EDID_CLK 1 C618 2 @47P_0402_50V8J NB_EDID_DATA 1 C652 2 @47P_0402_50V8J 4 @2N7002_SOT23S +3VS NB_EDID_DATA 8 NB_TZOUT2- 8 NB_TZOUT2+ 8 NB_TXOUT1- 8 NB_TXOUT1+ 8 NB_TZCLK- 8 NB_TZCLK+ 8 NB_TXOUT2- 8 NB_TXOUT2+ 8 2 1 8 NB_ENVDD D NB_ENVDD 2 G Q72 S @2N7002_SOT23 C646 1 2 R758 @10K_0402_5% 3 @10K_0402_5% 1 2 R757 2 G Q70 1 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 3 +NB_LCDVDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 @0.1U_0402_16V4Z DISPOFF# @0.01U_0402_16V7K 1 2 D JP2 IB+ 80mil 1 2 @300_0402_5% LVDS from NB ** 2 C1033 @4.7U_0805_10V4Z Q71 @AOS 3401_SOT23 +NB_LCDVDD 2 2 1 C1034 1 2 @47P_0402_50V8J 1 1 C612 +NB_LCDVDD G 2 @47P_0402_50V8J D EDID_DATA 1 C647 S EDID_CLK 80mil 1 2 1 C1035 @0.1U_0402_16V4Z 2 C1036 @4.7U_0805_10V4Z 4 Compal Electronics, Inc. Title CRT,TV-OUT,LVDS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet E 19 of 53 5 4 +R_CRT_VCC 1 2 CRT Conn. CH491D_SC59 1 1A_6VDC_MINISMDC110 C3 0.1U_0402_16V4Z 3 2 +CRT_VCC F1 1 JP14 SUYIN_7849S-15G2T-HC 2 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5 L24 2 2 C536 2 8 N B _CRT_VSYNC C5 2 1 C6 2 L26 1 CHB1608B121_0603 2 L2 1 CHB1608B121_0603 2 1 1 C8 1 2 C9 R3 R4 +3VS R415 2 +CRT_VCC 1 2 R 11 1K_0402_5% 2 C7 @68P_0402_50V8K A R419 2 Q1 1 2N7002_SOT23 D VI _H SYNC D VI _ VSYNC 3 1 1 C4 1 @68P_0402_50V8K 3 R 13 1 R416 1 2 0_0402_5% 2 0_0402_5% DDC_DATA 14 D D C _CLK 14 R 12 1 R414 1 2 @0_0402_5% 2 @0_0402_5% NB_DDC_DATA 8 N B _DDC_CLK 8 C532 C 533 2 Q24 1 2N7002_SOT23 2 2 5 1 1 C 12 0.1U_0402_16V4Z 2 P OE# 4 G Y R 14 +3VS 220P_0402_50V7K 220P_0402_50V7K 4 Y U2 SN74AHCT1G125GW_SOT353-5 3 1 R408 1 R8 2 0_0402_5% 2 @0_0402_5% 2 @0_0402_5% A G 2 P OE# 5 1 R 10 8 N B_ CRT_HSYNC 2 0_0402_5% U 26 SN74AHCT1G125GW_SOT353-5 1 6P_0402_50V8K 1 +3VS 220P_0402_50V7K 3 14 D AC 1 _VSYNC 1 R409 C537 2 0.1U_0402_16V4Z 14 D AC 1_ HSYNC 1 +CRT_VCC 2 G 1 +CRT_VCC S +CRT_VCC 1 C539 DVI_B D C538 1 2 0_0402_5% D VI_G S 1 R418 1 R423 D V I_R 1 2 FCM2012C-800_0805 L23 1 2 FCM2012C-800_0805 L27 1 2 FCM2012C-800_0805 D 2 75_0603_1% 2 0_0402_5% 6P_0402_50V8K 1 R410 2 0_0402_5% 1 R404 6P_0402_50V8K 2 75_0603_1% 14 B 1 R407 6P_0402_50V8K 1 R413 6P_0402_50V8K 2 75_0603_1% 14 G 6P_0402_50V8K 14 R D 10K_0402_5% 1 2 +3VS 2 @0_0402_5% 3 1 R417 R422 1 1 10K_0402_5% 1 2 D3 2.2K_0402_5% 2 1 2 G +5VS 2.2K_0402_5% 1 2 D4 D2 D5 @DAN217_SOT23 @DAN217_SOT23 @DAN217_SOT23 2 75_0603_1% 2 2 @0_0402_5% 2 8 NB_CRT_B D 1 R405 2.2K_0402_5% 1 2 R411 1 2 CRT CONNECTOR 2 75_0603_1% 2 2 @0_0402_5% 1 8 NB_CRT_G 1 R406 1 R412 1 3 75_0603_1% 2 1 8 NB_CRT_R 3 C C B B A A Compal Electronics, Inc. Title CRT,DVI/SII1362 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Size C Date: Document Number R ev 0.1 Longbeach 100 星期 ? 十一月 06, 2004 Sheet 1 20 of 53 5 4 3 2 1 PC I_AD[0..31] 25,26,28,31,32,42 PCI_AD[0..31] +3VS H28 F29 H29 H26 F27 G29 L29 J26 L28 J27 N27 M26 K27 P29 P30 PCIE_VSS_1 PCIE_VSS_2 PCIE_VSS_3 PCIE_VSS_4 PCIE_VSS_5 PCIE_VSS_6 PCIE_VSS_7 PCIE_VSS_8 PCIE_VSS_9 PCIE_VSS_10 PCIE_VSS_11 PCIE_VSS_12 PCIE_VSS_13 PCIE_VSS_14 PCIE_VSS_15 8.2K_1206_8P4R_5% RP33 1 2 3 4 R2001 R1941 8 7 6 5 PCI_REQ#4 PCI_GNT#4 PCI_REQ#5 PCI_GNT#5 8.2K_1206_8P4R_5% 2 8.2K_0402_5% PCI_REQ#6 2 8.2K_0402_5% PCI_GNT#6 +1.8VS C1063 + 1 2 2 28,32 28 26,28,31 28,31,32 28,32 28,31 26,28,31 28,32 AJ8 AK7 AG5 AH5 AJ5 AH6 AJ6 AK6 AG7 AH7 PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH# PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH# CPU_STP#/DPSLP# PCI_STP# INTA# INTB# INTC# INTD# INTE#/GPIO33 INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36 150U_D3_4VM_R18 1 L65 CHB2012U170_0805 C906 C892 C911 C895 C907 C916 C924 C936 C929 C923 C904 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z SB_32KHI B2 SB_32KH0 B1 +PCIE_VDDR H_PWRGD 5 H_PWRGD 5 H_INTR 5 H_NMI 5 H_INIT# 5 H_SMI# 5 H_CPUSLP# 5 H_IGNNE# 5 H_A20M# 5 H_FERR# 5 H_STPCLK# H_A20M# R6781 2 10K_0402_5% 1 R339 2 @20M_0603_5% 2 1 C458 *** 2 CPU_PG/LDT_PG INTR/LINT0 NMI/LINT1 INIT# SMI# SLP#/LDT_STP# IGNNE# A20M# FERR# STPCLK#/ALLOW_LDTSTP LDT_PG/SSMUXSEL/GPIO0 DPRSLPVR BMREQ# LDT_RST# CHS-215SB400-02_BGA564 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1# SERIRQ RTCCLK RTC_IRQ#/ACPWR_STRAP VBAT RTC_GND C372 @0.1U_0402_10V6K NC A1 A2 VSS VCC WP SCL SDA AK27 SERIRQ C2 F3 A2 A1 14 P 14 P G 7 2 33_0402_5% 8 7 6 5 2 8.2K_0402_5% SB_PCI_RST# 35 SERIRQ Share some PCIRST# to here LPC_DRQ0# LPC_DRQ1# 4 3 2 1 RP29 5 6 7 8 10K_1206_8P4R_5% 4 3 2 1 RP30 5 6 7 8 100K_1206_8P4R_5% C LPC_AD3 LPC_AD0 LPC_AD1 LPC_AD2 PCI_FRAME# PCI_DEVSEL# PCI_IR DY# PC I_TRDY# PCI_PAR PCI_STOP# PCI_PERR# PCI_SERR# PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 PCI_REQ#5 PCI_REQ#6 PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4 PCI_GNT#5 PCI_GNT#6 PM_CLKRUN# LOCK# PM_CLKRUN# PCI_C/BE#0 26,28,31,32,42 PCI_C/BE#1 26,28,31,32,42 PCI_C/BE#2 26,28,31,32,42 PCI_C/BE#3 26,28,31,32,42 PCI_FRAME# 26,28,31,32,42 PCI_DEVSEL# 26,28,31,32 PCI_IRDY# 26,28,31,32 PCI_TRDY# 26,28,31,32,42 PCI_PAR 26,28,31,32 PCI_STOP# 26,28,31,32 PCI_PERR# 26,28,31,32 PCI_SERR# 26,28,31,32 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 26 28 31 32 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4 26 28 31 32 H_FERR# 5 I U39C O 6 9 I SN74LVC14APWLE_TSSOP14 R6832 1 62_0402_5% +V_FSB_VTT U39D R189 1 2 33_0402_5% 8 O NB_RST# 8,14,30 SN74LVC14APWLE_TSSOP14 B RTC Battery LPC_AD0 37,39,53 LPC_AD1 37,39,53 LPC_AD2 37,39,53 LPC_AD3 37,39,53 LPC_FRAME# 37,39,53 - + BATT1 2 1 +RTCBATT +RTCBATT LPC_DRQ1# 39 RTCBATT D19 Place J1 close to DDR-SODIMM RTC_CLK 25,37 AUTO_ON# 25 +SB_VBAT 2 4.7K_0402_5% Connect VGA,PCIE Card AND NB SERIRQ 28,37,39,53 RTC_CLK 1 R223 +3VALW A_RST# BAS40-04_SOT23 +RTCVCC +SB_VBAT Consider --connect RTC_CLK to EC R375 2 1 470_0805_5% C481 R201 @1K_0402_5% 1 U15 1 2 3 4 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ0# LPC_DRQ1# PCI_PERR# R251 1 R613 1 1 2 AG25 AH25 AJ25 AH24 AG24 AH26 AG26 +3VS 1 W=20mils R376 2 1 470_0805_5% 1 No short JOPEN1 2 2 +CHGRTC C475 0.1U_0402_16V4Z A 2 15P_0402_50V8D 4 1 IN OUT Y3 NC NC 2 1 C456 C29 A28 C28 B29 D29 E4 B30 F28 E28 E29 D25 E27 D27 D28 +3VS SB_32KHI 3 15P_0402_50V8D A X2 Pull-high on CPU side 8 BM_REQ# 5 LDT_RST# SB_32KH0 X1 XTAL *** B SN74LVC14APWLE_TSSOP14 1 PCI_PAR PCI_SERR# LOCK# PCI_DEVSEL# PCIRST# 26,28,31,32,37,39,42,53 SN74LVC14APWLE_TSSOP14 2 0.1U_0402_10V6K 8 7 6 5 2 33_0402_5% 3 *** 2 RP51 1 2 3 4 R611 1 4 O 14 C1062 1 I P 2 10U_0805_10V4Z 3 G C857 1 8.2K_1206_8P4R_5% 2 7 1 10U_0805_10V4Z PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7 PCIE_VDDR_8 PCIE_VDDR_9 O 2 PCI_STOP# PC I_TRDY# PCI_FRAME# PCI_IR DY# PCIE_PVDD F26 R29 G26 P26 K26 L26 P28 N26 P27 I 0.1U_0402_16V4Z U39B 1 8 7 6 5 2 PCIE_CALI U39A 14 1 2 3 4 *** +PCIE_VDDR PCIE_CALRP PCIE_CALRN C375 R612 8.2K_0402_5% 1 D 2 @100P_0402_50V8J P C867 1 80mA 2 150_0402_1% R6652 1 G27 R6592 1 H27 150_0402_1% 1 2 G28 R680 4.12K_0603_1% PCIE_PVDD R30 SB_PCIRST# PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 CLK_PCI_MINI 31 CLK_PCI_CB 28 CLK_PCI_MINI2 25,32,42 CLK_PCI3 25 CLK_PCI_LAN 25,26 CLK_PCI_LPC 25,37,53 CLK_PCI6 25 CLK_PCI7 25 CLK_PCI8 25,39 39_0603_1% 39_0603_1% 39_0603_1% 39_0603_1% 39_0603_1% 39_0603_1% 39_0603_1% 39_0603_1% G 1U_0603_10V4Z PCIE_RX0P PCIE_RX0N PCIE_RX1P PCIE_RX1N PCIE_RX2P PCIE_RX2N PCIE_RX3P PCIE_RX3N C436 1 +3VALW AJ7 W3 Y2 W4 Y3 V1 Y4 V2 W2 AA4 V4 AA3 U1 AA2 U2 AA1 U3 T4 AC1 R2 AD4 R3 AD3 R4 AD2 P2 AE3 P3 AE2 P4 AF2 N1 AF1 V3 AB4 AC2 AE4 T3 AC4 AC3 T2 U4 T1 AB2 AB3 AF4 AF3 AG2 AG3 AH1 AH2 AH3 AJ2 AK2 AJ3 AK3 AG4 AH4 AJ4 AG1 AB1 2 2 2 2 2 2 2 2 7 C883 1 RP28 +PCIE_VDDR M29 N29 M28 N28 J29 K29 J28 K28 PCIRST# AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11 AD8/ROMA9 AD9/ROMA8 AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 CBE0#/ROMA10 CBE1#/ROMA1 CBE2#/ROMWE# CBE3# FRAME# DEVSEL#/ROMA0 IRDY# TRDY#/ROMOE# PAR/ROMA19 STOP# PERR# SERR# REQ0# REQ1# REQ2# REQ3#/PDMA_REQ0# REQ4#/PLL_BP33/PDMA_REQ1# REQ5#/GPIO13 REQ6#/GPIO31 GNT0# GNT1# GNT2# GNT3#/PLL_BP66/PDMA_GNT0# GNT4#/PLL_BP50/PDMA_GNT1# GNT5#/GPIO14 GNT6#/GPIO32 CLKRUN# LOCK# 2 22_0402_5% 2 22_0402_5% 1U_0603_10V4Z L60 8.2K_1206_8P4R_5% 4 PCI_GNT#0 3 PCI_GNT#1 2 PCI_GNT#2 1 PCI_GNT#3 RP52 C 2 *** SB_A_RXP0 SB_A_RXN0 SB_A_RXP1 SB_A_RXN1 SB_A_RXP2 SB_A_RXN2 SB_A_RXP3 SB_A_RXN3 PCIE_TX0P PCIE_TX0N PCIE_TX1P PCIE_TX1N PCIE_TX2P PCIE_TX2N PCIE_TX3P PCIE_TX3N 1 R3211 R3121 R3111 R3081 R2701 R2751 R2781 R284 G +1.8VS 8.2K_1206_8P4R_5% 5 6 7 8 7 7 7 7 7 7 7 7 M30 N30 K30 L30 H30 J30 F30 G30 PCI_CLK0_R PCI_CLK1_R PCI_CLK2_R PCI_CLK3_R PCI_CLK4_R PCI_CLK5_R PCI_CLK6_R PCI_CLK7_R PCI_CLK8_R R261 1 PCICLK9_R R281 1 PCICLKFB 7 PCI_REQ#1 PCI_REQ#0 PCI_REQ#2 PCI_REQ#3 CHB2012U170_0805 8 7 6 5 SB_A_TXP0 SB_A_TXN0 SB_A_TXP1 SB_A_TXN1 SB_A_TXP2 SB_A_TXN2 SB_A_TXP3 SB_A_TXN3 C447 C446 C451 C450 C453 C452 C455 C454 L4 L3 L2 L1 M4 M3 M2 M1 N4 N3 N2 1 RP50 2 2 2 2 2 2 2 2 PC I CLKS 1 0.1U_0402_10V6K 1 0.1U_0402_10V6K 1 0.1U_0402_10V6K 1 0.1U_0402_10V6K 1 0.1U_0402_10V6K 1 0.1U_0402_10V6K 1 0.1U_0402_10V6K 1 0.1U_0402_10V6K NB_A_RXP0 NB_A_RXN0 NB_A_RXP1 NB_A_RXN1 NB_A_RXP2 NB_A_RXN2 NB_A_RXP3 NB_A_RXN3 PCIE_RCLKP PCIE_RCLKN PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7 PCICLK8 PCICLK9 PCICLK_FB 2 RP31 13 CLK_PCIE_ICH 13 CLK_PCIE_ICH# SB400 A_RST# L PC 7 7 7 7 7 7 7 7 8.2K_1206_8P4R_5% PCI_PIRQF# 5 4 PCI_PIRQE# 6 3 PCI_PIRQH# 7 2 PCI_PIRQG# 8 1 L27 M27 PCI INTERFACE *** D AH8 C PU RP32 1 2 3 4 2 8.2K_0402_5% U19A A_RST# RTC R610 1 PCI EXPRESS INTERFACE 8.2K_1206_8P4R_5% PCI_PIRQA# 5 4 PCI_PIRQB# 6 3 PCI_PIRQC# 7 2 PCI_PIRQD# 8 1 PCI_GNT#5 PCI_REQ#5 @AT24C04N-10SI-2.7_SO8~D Compal Electronics, Inc. Title 32.768KHZ_12.5P_1TJS125DJ2A073 5 Note:Reserved for A11 version 4 MuTIOL/CPU/PM/RTC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3 2 Size Document Number R ev 0.1 Longbeach 100 Date: 星期六, 十一 ?06, 2004 Sheet 1 21 of 53 5 4 3 2 1 +3VALW 1 R356 2 OSCL IN 0_0402_5% U19B RP63 GEVENT5# PM_SLP_S3# PCIE_PME# PM_SLP_S5# 8 7 6 5 30 PCIE_PME# 4.7K_1206_8P4R_5% R674 1 R673 1 2 4.7K_0402_5% 2 4.7K_0402_5% EC_FLASH# EC_SW I# 13 CLK_SB_14M SB_RSMRST# ** R370 2 1 10_0402_5% 13 SB_PCLK 2 1 R354 @10_0402_5% D1 14M_X1/OSC B23 14M_X2 AK24 @15P_0402_50V8D C473 1 2 14 PERST# 35 SIDERST# 13,23 CLK_OK AGP_STP# AG P_BUSY# +3VS 35 PIDERST# 34 SPKR 10,11,13,30 SB_SMCLK 10,11,13,30 SB_SMDATA C ** R672 1 R677 1 2 10K_0402_5% 2 10K_0402_5% AG P_BUSY# AGP_STP# R684 1 R621 1 2 10K_0402_5% 2 10K_0402_5% EXTEVENT1# SB_GA20 R622 1 2 10K_0402_5% SB_KBRST# R371 1 2 2.2K_0402_5% R363 1 2 2.2K_0402_5% B SIO_CLK ROM_CS#/GPIO1 GHI#/GPIO6 VGATE/GPIO7 AGP_STP#/GPIO4 AGP_BUSY#/GPIO5 FANOUT0/GPIO3 SPKR/GPIO2 SCL0/GPOC0# SDA0/GPOC1# DDC1_SCL/GPIO9 DDC1_SDA/GPIO8 DDC2_SCL/GPIO11 DDC2_SDA/GPIO12 NC1 NC4 NC3 NC2 SB_SMCLK SB_SMDATA 33,41 AC_BITCLK 25,33,41 AC_SDOUT 33 AC_SDIN0 41 AC_SDIN1 AC_BITCLK 8 AC_S DIN1 7 AC_S DIN2 6 AC_S DIN0 5 10K_1206_8P4R_5% 1 R764 B25 C25 C23 D24 D23 A27 C24 A26 B26 B27 C26 C27 D26 J2 K3 J3 K2 RP56 1 2 3 4 SPKR SB_SMCLK SB_SMDATA G PIO9 G PIO8 GPIO11 GPIO12 RSMRST# A23 2 1K_0402_5% 33,41 A C _SYNC 33,41 AC_RST# 25 SPDIF_OUT AC_BITCLK AC_SDOUT AC_S DIN0 AC_S DIN1 AC_S DIN2 A C _SYNC AC_RST# S PDIF_OUT 1 R326 1 R322 1 R355 33_0402_5% 2 33_0402_5% 2 33_0402_5% 2 G1 G2 H4 G3 G4 H1 H3 H2 USB INTERFACE 1 2 3 4 30 EXP_CPPE# AC_BITCLK AC_SDOUT AC_SDIN0 AC_SDIN1 AC_SDIN2 AC_SYNC AC_RST# SPDIF_OUT +1.8VALW ** 10K_1206_8P4R_5% 4 5 3 6 2 7 1 8 R740 1 R741 1 R3641 2 @10K_0402_5% 2 @10K_0402_5% 2 11.8K_0603_1% ** +3VALW USB_OC0# USB_OC1# USB_OC2# EC_LID_OUT# USB_OC4# EC_ SCI# USB_OC6# EC_SMI# G PIO9 G PIO8 GPIO11 GPIO12 RP60 D34 2 1CH751H-40_SC76 GATEA20 GATEA20 37,53 SB_KBRST# D35 2 1CH751H-40_SC76 KBRST# KBRST# 37,53 USBP6+ USBP6- USB_HSDP5+ USB_HSDM5- A14 B14 USBP5+ USBP5- USBP5+ 30 USBP5- 30 USB_HSDP4+ USB_HSDM4- A13 B13 USBP4+ USBP4- USBP4+ 36 USBP4- 36 USB_HSDP3+ USB_HSDM3- A18 B18 USBP3+ USBP3- USB_HSDP2+ USB_HSDM2- A17 B17 USBP2+ USBP2- USB_HSDP1+ USB_HSDM1- A21 B21 USBP1+ USBP1- USB_HSDP0+ USB_HSDM0- A20 B20 USBP0+ USBP0- AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 C21 C18 D13 D10 D20 D17 C14 C11 AVDDTX AVDDC A16 AVDDC AVSSC B16 AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8 AVSS_USB_9 AVSS_USB_10 AVSS_USB_11 AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24 A9 A12 A19 A22 B9 B12 B19 B22 C9 C10 C12 C13 C17 C19 C20 C22 D9 D11 D12 D14 D18 D19 D21 D22 2 4 3 2 1 @15K_1206_8P4R_5% USBP6+ USBP6USBP7+ USBP7- 5 6 7 8 USBP2+ 36 USBP2- 36 4 3 2 1 RP62 @15K_1206_8P4R_5% USBP4+ USBP4USBP5+ USBP5- USBP0+ 36 USBP0- 36 5 6 7 8 4 3 2 1 C @15K_1206_8P4R_5% USBP2+ USBP2USBP3+ USBP3- 5 6 7 8 4 3 2 1 RP66 @15K_1206_8P4R_5% USBP0+ USBP0USBP1+ USBP1- 5 6 7 8 4 3 2 1 RP61 L63 FBM-10-201209-260-T_0805 2 1 AVDDTX C921 1 2 10U_0805_10V4Z C934 1 2 1U_0603_10V4Z C951 1 C941 1 C942 1 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z L64 1 AVDDRX FBM-10-201209-260-T_0805 2 C922 1 2 10U_0805_10V4Z C935 1 2 1U_0603_10V4Z C953 1 C952 1 C954 1 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 1 B +3VALW FBM-10-201209-260-T_0805 2 C461 1 2 10U_0805_10V4Z C468 1 2 1U_0603_10V4Z C955 1 2 0.1U_0402_16V4Z SB_RSMRST# 1 OE GND Control by EC Delay 50ms after +3VALW ready OSCL IN A 47K_0402_5% 2 2 48MHZ_4P_FN4800002 OUT 3 VDD C504 0.1U_0402_10V6K 5 6 7 8 RP69 AVDDRX 1 1 2 1 X7 EC_SMI# USB_OC6# EC_ SCI# USB_OC4# R338 4 1 10K_1206_8P4R_5% L20 37,40,53 EC_RSMRST# R392 10K_0402_5% D RP68 EC_SMI# 37,53 A10 B10 AVDDC R394 0_0603_5% EC_SCI# 37,53 USBP7+ USBP7- +3VALW A ** EC_LID_OUT# 37,53 A11 B11 CHS-215SB400-02_BGA564 SB_GA20 10K_1206_8P4R_5% EC_LID_OUT# 5 4 USB_OC2# 6 3 USB_OC0# 7 2 USB_OC1# 8 1 RP67 USB PWR RP65 R331 1 R333 1 ACPI/WAKE UP EVENTS 8 NB_SUS_STAT# A15 B15 C15 D16 C16 D15 B8 C8 C7 B7 B6 A6 B5 A5 CLK / RST 8 GEVENT2# 7 EXTEVENT0# 6 PBTN_OUT# 5 10K_1206_8P4R_5% SB400 48M_X1/USBCLK TALERT#/TEMP_ALERT#/GPIO10 48M_X2 BLINK/GPM6# USB_RCOMP PCI_PME#/GEVENT4# USB_VREFOUT RI#/EXTEVNT0# USB_ATEST1 SLP_S3# USB_ATEST0 SLP_S5# USB_OC0#/GPM0# PWR_BTN# USB_OC1#/GPM1# PWR_GOOD USB_OC2#/FANOUT1/GPM2# SUS_STAT# USB_OC3#/GPM3# TEST1 USB_OC4#/GPM4# TEST0 USB_OC5#/GPM5# GA20IN USB_OC6#/FAN_ALERT#/GEVENT6# KBRST# USB_OC7#/CASE_ALERT#/GEVENT7# SMBALERT#/THRMTRIP#/GEVENT2# LPC_PME#/GEVENT3# USB_HSDP7+ LPC_SMI#/EXTEVNT1# USB_HSDM7VOLT_ALERT#/S3_STATE/GEVENT5# SYS_RESET#/GPM7# USB_HSDP6+ WAKE#/GEVENT8# USB_HSDM6- GPIO 1 2 3 4 C6 D5 C4 D3 B4 E3 B3 C3 D4 F2 2 10K_0402_5% E2 2 10K_0402_5% SB_GA20 AJ26 SB_KBRST# AJ27 GEVENT2# D6 EXP_CPPE# C5 EXTEVENT1# A25 GEVENT5# D8 MASTER_RST# D7 PCIE_PME# D2 EC_SW I# EXTEVENT0# PM_SLP_S3# PM_SLP_S5# PBTN_OUT# (N OT USED) 37,53 PM_SLP_S3# 37,53 PM_SLP_S5# 37,53 PBTN_OUT# 23 SB_PW RGD SUS_STAT# 1 2 R724 0_0402_5% RP64 D EC_THRM# 37,53 EC_THRM# 38 EC_FLASH# 37,53 EC_SW I# A C97 MASTER_RST# 8 EC_THRM# 7 EXP_CPPE# 6 AC_RST# 5 10K_1206_8P4R_5% 1 2 3 4 Compal Electronics, Inc. 2 Title USB/LPC/AC97/MAC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Size Document Number R ev 0.1 Longbeach 100 D ate: ¬P 期六, 十一月 06, 2004 Sheet 1 22 of 53 5 4 3 2 1 U19C AK14 AJ14 D AK13 AJ13 AK11 AJ11 @0.01U_0402_25V8K C799 1 2 AK10 AJ10 SATA_TX1+ SATA_TX1SATA_RX1SATA_RX1+ SATA_TX2+ SATA_TX2SATA_RX2SATA_RX2+ SATA_TX3+ SATA_TX3SATA_RX3SATA_RX3+ R618 1 2 @1K_0402_1%AJ15 SATA_CAL R620 1 2 10K_0402_5% AJ16 SATA_X1 R619 1 2 @10K_0402_5% AK16 SATA_X2 AK8 +1.8VS R642 200mA 2 @0_0805_1% 1 R799 2 0_0805_5% 1 ### C PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7 PIDE_D8 PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15 PRIMARY ATA 66/100 AK18 AJ18 PIDE_IORDY PIDE_IRQ PIDE_A0 PIDE_A1 PIDE_A2 PIDE_DACK# PIDE_DRQ PIDE_IOR# PIDE_IOW# PIDE_CS1# PIDE_CS3# SATA_RX0SATA_RX0+ SATA_ACT# AH15 PLLVDD_SATA AH16 XTLVDD_SATA AG10 AG14 AH12 AG12 AG18 AG21 AH18 AG20 AVDD_SATA_1 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_4 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7 AVDD_SATA_8 AG9 AF10 AF11 AF12 AF13 AF14 AF15 AF16 AF17 AF18 AF19 AF20 AF21 AF22 AH9 AG11 AG15 AG17 AG19 AG22 AG23 AF9 AH17 AH23 AH13 AH20 AK9 AJ12 AK17 AK23 AH10 AJ23 AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20 AVSS_SATA_21 AVSS_SATA_22 AVSS_SATA_23 AVSS_SATA_24 AVSS_SATA_25 AVSS_SATA_26 AVSS_SATA_27 AVSS_SATA_28 AVSS_SATA_29 AVSS_SATA_30 AVSS_SATA_31 AVSS_SATA_32 SIDE_IORDY SIDE_IRQ SIDE_A0 SIDE_A1 SIDE_A2 SIDE_DACK# SIDE_DRQ SIDE_IOR# SIDE_IOW# SIDE_CS1# SIDE_CS3# SECONDARY ATA 66/100 AK19 AJ19 SB400 SATA_TX0+ SATA_TX0- SERIAL ATA AK21 AJ21 SERIAL ATA POWER AK22 AJ22 SIDE_D0/GPIO15 SIDE_D1/GPIO16 SIDE_D2/GPIO17 SIDE_D3/GPIO18 SIDE_D4/GPIO19 SIDE_D5/GPIO20 SIDE_D6/GPIO21 SIDE_D7/GPIO22 SIDE_D8/GPIO23 SIDE_D9/GPIO24 SIDE_D10/GPIO25 SIDE_D11/GPIO26 SIDE_D12/GPIO27 SIDE_D13/GPIO28 SIDE_D14/GPIO29 SIDE_D15/GPIO30 AVSS_SATA_33 AVSS_SATA_34 AVSS_SATA_35 AVSS_SATA_36 AVSS_SATA_37 AVSS_SATA_38 AVSS_SATA_39 AVSS_SATA_40 AVSS_SATA_41 AVSS_SATA_42 AVSS_SATA_43 AVSS_SATA_44 AVSS_SATA_45 AD30 AE28 AD27 AC27 AD28 AD29 AE27 AE30 AE29 AC28 AC29 IDE_PDIORDY INT_IRQ14 IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_PDDACK# IDE_PDDREQ IDE_PDIOR# IDE_PDIOW# IDE_PDCS1# IDE_PDCS3# AF29 AF27 AG29 AH30 AH28 AK29 AK28 AH27 AG27 AJ28 AJ29 AH29 AG28 AG30 AF30 AF28 IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15 V29 T27 T28 U29 T29 V30 U28 W29 W30 R27 R28 IDE_SDIORDY INT_IRQ15 IDE_SDA0 IDE_SDA1 IDE_SDA2 IDE_SDDACK# IDE_SDDREQ IDE_SDIOR# IDE_SDIOW# IDE_SDCS1# IDE_SDCS3# V28 W28 Y30 AA30 Y28 AA28 AB28 AB27 AB29 AA27 Y27 AA29 W27 Y29 V27 U27 IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15 IDE_PDIORDY 35 INT_IRQ14 35 IDE_PDA0 35 IDE_PDA1 35 IDE_PDA2 35 IDE_PDDACK# 25,35 IDE_PDDREQ 35 IDE_PDIOR# 35 IDE_PDIOW# 35 IDE_PDCS1# 35 IDE_PDCS3# 35 D IDE_PDD[0..15] 35 IDE_SDIORDY 35 INT_IRQ15 35 IDE_SDA0 35 IDE_SDA1 35 IDE_SDA2 35 IDE_SDDACK# 35 IDE_SDDREQ 35 IDE_SDIOR# 35 IDE_SDIOW# 35 IDE_SDCS1# 35 IDE_SDCS3# 35 IDE_SDD[0..15] 35 C AG13 AH22 AK12 AH11 AJ17 AH14 AH19 AJ20 AH21 AJ9 AG16 AK15 AK20 CHS-215SB400-02_BGA564 B B U33-->please close to SB400(U16) 1 +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW R379 C477 0.1U_0402_16V4Z C827 0.1U_0402_16V4Z 2 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 CLK_OK 1 2 330K_0402_5% 0.47U_0603_10V7K5 U21B C502 1 I P O 6 9 I U21C O 8 U21D CLK_OK 1 B P 4 2 A G O G I P P U21A 3 2 U23 Y 3 0.1U_0402_10V6K 1M_0402_5% 1 2 7 C476 O G U21F I 7 1 G 1 2 330K_0402_5% 7 12 5 R384 P O G I 7 R385 13 G U21E 7 1 10 7 O G I P P R374 11 50 VCORE_PWRGD 14 14 14 14 14 2 14 10K_0402_5% 4 SB_PWRGD 22 TC7SH08FU_SSOP5 2 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 CLK_OK 13,22 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 NB_PWRGD 8 A A Compal Electronics, Inc. Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 IDE/SATA Size Document Number Custom Rev 0.1 Longbeach 100 Date: 星期六 , 十一月 06, 2004 Sheet 1 23 of 53 +3VS U19D 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z A30 D30 E24 E25 J5 K1 K5 N5 P5 R1 U5 U26 U30 V5 V26 Y1 Y26 AA5 AA26 AB5 AC30 AD5 AD26 AE1 AE5 AE26 AF6 AF7 AF24 AF25 AK1 AK4 AK26 AK30 +1.8VS C876 C875 C873 C874 C862 C871 C864 C889 C903 C886 C900 C872 C888 C902 C887 C901 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C919 C932 C928 C943 C937 C957 C958 1 1 1 1 1 1 1 2 2 2 2 2 2 2 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 220mA M12 M13 M18 M19 N12 N13 N18 N19 V12 V13 V18 V19 W12 W13 W18 W19 +3VALW A3 A7 E6 E7 E1 F5 +1.8VALW C931 C930 C944 C925 1 1 1 1 2 2 2 2 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C945 C946 C947 C948 1 1 1 1 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z E9 E10 E20 E21 0.1U_0402_16V4Z C950 1 2 E13 E14 E16 E17 C30 +V_FSB_VTT AG6 AVDD_CK +3VS R638 1 2 2 1K_0402_5% ** 2 @1K_0402_5% 2 C845 1U_0603_10V4Z 1 1 +1.8VS V5_VREF *** 2 1 C829 0.1U_0402_16V4Z 1 +5VS R639 1 R656 0_0805_1% 2 +5VCD CH751H-40_SC76 D37 C486 1 2 10U_0805_10V4Z C482 1 2 1U_0603_10V4Z C956 1 2 0.1U_0402_16V4Z A24 B24 A4 A8 A29 B28 C1 E5 E8 E11 E12 E15 E18 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20 VDDQ_21 VDDQ_22 VDDQ_23 VDDQ_24 VDDQ_25 VDDQ_26 VDDQ_27 VDDQ_28 VDDQ_29 VDDQ_30 VDDQ_31 VDDQ_32 VDDQ_33 VDDQ_34 SB400 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 POWER C847 C913 C860 C865 C898 C912 C830 C797 C803 C880 C832 C851 C959 C938 C831 C852 C855 C863 C879 S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_1.8V_1 S5_1.8V_2 S5_1.8V_3 S5_1.8V_4 USB_PHY_1.8V_1 USB_PHY_1.8V_2 USB_PHY_1.8V_3 USB_PHY_1.8V_4 CPU_PWR V5_VREF AVDDCK AVSSCK VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 E19 E22 E23 E26 E30 F1 F4 G5 H5 J1 J4 K4 L5 M5 P1 R5 R26 T5 T26 T30 W1 W5 W26 Y5 AB26 AB30 AC5 AC26 AD1 AF5 AF8 AF23 AF26 AG8 AJ1 AJ24 AJ30 AK5 AK25 M14 M15 M16 M17 N14 N15 N16 N17 P12 P13 P14 P15 P16 P17 P18 P19 R12 R13 R14 R15 R16 R17 R18 R19 T12 T13 T14 T15 T16 T17 T18 T19 U12 U13 U14 U15 U16 U17 U18 U19 V14 V15 V16 V17 W14 W15 W16 W17 CHS-215SB400-02_BGA564 Compal Electronics, Inc. Title Power/GND THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Size Document Number R ev 0.1 Longbeach 100 Date: 星期六, 十一 ?06, 2004 Sheet 24 of 53 5 4 +3VALW +3VS 3 +3VALW +3VS +3VS +3VS 2 +3VS +3VS +3VS 1 +3VS 1 1 1 R285 10K_0402_5% R262 R668 @10K_0402_5% 10K_0402_5% 2 2 @10K_0402_5% 2 1 1 R279 2 2 1 R309 R271 R276 @10K_0402_5% @10K_0402_5% 10K_0402_5% 2 R323 @10K_0402_5% 2 2 2 1 1 R681 10K_0402_5% 2 R327 @10K_0402_5% 2 R670 10K_0402_5% 1 1 1 +3VS ** 21 AUTO_ON# 22,33,41 AC_SDOUT 21,37 RTC_CLK 22 SPDIF_OUT 21 CLK_PCI3 21,26 CLK_PCI_LAN 21,37,53 CLK_PCI_LPC 21 CLK_PCI6 21 CLK_PCI7 21,39 CLK_PCI8 ** ** D 1 1 R286 R263 @10K_0402_5% 10K_0402_5% R660 @10K_0402_5% 2 2 10K_0402_5% 2 2 R280 Selects type of 48MHz clock pad 2 R277 @10K_0402_5% 1 1 1 R272 10K_0402_5% 2 R310 10K_0402_5% 2 10K_0402_5% 2 R324 10K_0402_5% 2 R328 1 1 1 21,32,42 CLK_PCI_MINI2 1 D REQUIRED STRAPS ACPWRON PULL HIGH C AUTO_ON# AC97_SDOUT RTC_CLK SPDIF_OUT CLK_PCI3 MANUAL PWR ON INTERNAL RTC SIO 24MHz USB PHY PWRDOWN DISABLE USE DEBUG STRAPS DEFAULT CLK_PCI_LANCLK_PCI_LPC PCI_CLK6 Internal PLL DEFAULT 14MHz OSC MODE CPU I/F = K8 PCI_CLK7 PCI_CLK8 CLK_PCI_MINI2 ROM TYPE C lock input buffer H,H = PCI ROM DEFAULT C DEFAULT H,L = LPC ROM I 2 L,L = FWH ROM R225 +3VS 1 1 +3VS 1 +3VS 1 +3VS R252 R240 R258 R243 @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% @10K_0402_5% 2 R248 10K_0402_5% 10K_0402_5% 2 2 R220 +3VS Crytsal Pad L,H = LPC ROM II DEFAULT 2 R299 10K_0402_5% 10K_0402_5% 2 +3VS CPU I/F = P4 DEFAULT 2 R205 DEFAULT 14MHz XTAL MODE DEFAULT 2 R634 @10K_0402_5% +3VS External Clo ck USB PHY PWRDOWN ENABLE 1 +3VS SIO 48MHz 1 +3VS 1 1 +3VS 1 DEFAULT EXTERNAL RTC (NOT SUPPORTED W/ IT8712 ) 2 IGNORE DEBUG STRAPS 1 AUTO PWR ON 2 PULL LOW ** 23,35 IDE_PDDACK# 21,26,28,31,32 PCI_AD31 21,26,28,31,32 PCI_AD30 21,26,28,31,32 PCI_AD29 21,26,28,31,32 PCI_AD28 21,26,28,31,32 PCI_AD27 21,26,28,31,32 PCI_AD26 21,26,28,31,32 PCI_AD25 21,26,28,31,32 PCI_AD24 21,26,28,31,32 PCI_AD23 R241 1 1 R253 10K_0402_5% 1 1 R259 10K_0402_5% R244 @10K_0402_5% 2 2 10K_0402_5% 2 1 R249 R226 @10K_0402_5% 10K_0402_5% 2 @10K_0402_5% 2 2 2 R221 2 R300 @10K_0402_5% 1 1 1 R206 @10K_0402_5% 2 R641 @10K_0402_5% 2 Pop R634 when debug . 1 B 1 B DEBUG STRAPS IDE_PDDACK# PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PLL CHARGE PUMP CTRL BIT 0 HI P LL VCO CTRL BIT 1 HI P LL VCO CTRL BIT 0 HI DEFAULT DEFAULT DEFAULT DEFAULT PLL CHARGE PUMP CTRL BIT 1 LO PLL CHARGE PUMP CTRL BIT 0 LO P LL VCO CTRL BIT 1 LO P LL VCO CTRL BIT 0 LO PULL HIGH USE LONG RESET PLL CHARGE PUMP CTRL BIT 1 HI DEFAULT PULL LOW USE SHORT RESET A PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 BYPASS PCI PLL BYPASS ACPI BCLK BYPASS IDE PLL USE EEPROM PCIE STRAPS USE PCI PLL USE ACPI BCLK USE IDE PLL USE DEFAULT PCIE STRAPS DEFAULT DEFAULT DEFAULT DEFAULT A Compal Electronics, Inc. Title Hardware Trap THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Size Document Number R ev 0.1 Longbeach 100 Date: 星期六, 十一 ?06, 2004 Sheet 1 25 of 53 C D E F G Q3 DTA114YKA_SOT23 1 1 2 R20 300_0402_5% JP16 10mil B 10K C 47K 3 +3VALW H 12 Amber LED+ 11 Amber LED- 7 ACTIVITY# R70 21,28,31,32 PCI_PERR# 21,28,31,32 PCI_SERR# 30 29 LAN_PIRQC# 25 31 31,37,53 LAN_PME# 27 21,28,31,32,37,39,42,53 PCIRST# 21,25 CLK_PCI_LAN REQ# GNT# NC/HSDAC+ GND GND NC/LV2 11 123 124 126 NC/GND NC/GND NC/GND NC/GND NC/GND NC/GND 1 2 R132 1K_0402_5% 28 65 CTRL25 PME# RTT3/CRTL18 RST# VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 CLK CLKRUN# R126 @10_0402_5% 1 21 38 51 66 81 91 101 119 1 2 35 52 80 100 GND/VSS GND/VSS GND/VSS GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND GND GND GND 10 10mil 1 B 10K C 47K 1 R16 2 2 1 R117 1K_0402_5% R116 1 15K_0402_5% 1 5.6K_0603_1% 14 SHLD2 PR1+ 13 SHLD1 Green LEDGreen LED+ 2 75_0402_5% C39 1 Termination plane should be coupled to chassis ground +3VS PR1- R15 75_0402_5% 2 2 2 9 PR2+ @0.1U_0402_16V4Z LANGND 1 1 2 1000P_1206_2KV7K C13 2 2 C14 4.7U_0805_10V4Z R85 2 +3VALW E 1 R87 +LAN_DVDD 2 @0_0805_5% CTRL25 Q31 2SB1197K_SOT23 2 B Layout Note TS6121 pls close to conn. 40mil +2.5V_LAN 9 13 C673 10U_0805_10V4Z 22 48 62 73 112 118 1 1 2 2 C674 0.1U_0402_16V4Z U28 LAN_TD+ LAN_TD- CTRL25 8 Y1 LAN_X1 2 1 125 26 41 56 71 84 94 107 +3VALW C136 27P_0402_50V8J LAN_X2 1 LAN_RD+ LAN_RDR96 49.9_0402_1% R93 49.9_0402_1% 1 3 2 4 5 7 6 8 TD+ TDCT NC NC CT RD+ RD- R97 49.9_0402_1% 25MHZ_20P 1 C129 27P_0402_50V8J 1 2 1 C144 0.1U_0402_16V4Z RJ45_TX+ RJ45_TX- 16 14 15 13 12 10 11 9 RJ45_RX+ RJ45_RX- 0.5u_TS6121C R98 49.9_0402_1% R17 75_0402_5% 2 2 TX+ TXCT NC NC CT RX+ RX- 1 2 C157 2 C567 R18 75_0402_5% 0.1U_0402_16V4Z 3 0.1U_0402_16V4Z L13 AVDD33/AVDDL AVDD33/AVDDL AVDD33/AVDDL NC/AVDDL +LAN_AVDDL 3 7 20 16 40mil 1 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 AVDD25/HSDAC- 32 54 78 99 1 C195 2 +3VALW Closed to RTL8100CL Closed to RTL8100CL KC FBM-L11-201209-221LMAT_0805 C168 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z L8 +LAN_DVDD 40mil 2 24 45 64 110 116 1 12 20mil RTL8100CL_LQFP128 C183 0.1U_0402_16V4Z 1 1 C202 RJ45_PR 2 Power 2 4 17 128 RJ45_TX+ RJ45_PR C NC/VSS NC/VSS 2 1 E 10 120 3 RJ45_TX- 1 PR3+ TYCO_1566203-1 LAN_X1 LAN_X2 105 23 10mil 127 72 10mil 74 NC/AVDDH NC/HV RJ45_RX+ Q2 DTA114YKA_SOT23 1 1 2 R19 300_0402_5% LINK_10_100# 121 122 88 INTA# 3 C233 @15P_0402_50V8D 14 15 18 19 NC/M66EN 3 +3VALW 1 21 PCI_REQ#1 21 PCI_GNT#1 PERR# SERR# AT93C46-10SI-2.7_SO8 +3VALW LAN_TD+ LAN_TDLAN_RD+ LAN_RD- 1 2 5 6 IDSEL PAR FRAME# IRDY# TRDY# DEVSEL# STOP# C111 1 0.1U_0402_16V4Z PR3- 1 70 75 C/BE#0 C/BE#1 C/BE#2 C/BE#3 4 2 1 21,28,31,32 PCI_PAR 21,28,31,32,42 PCI_FRAME# 21,28,31,32 PCI_IRDY# 21,28,31,32,42 PCI_TRDY# 21,28,31,32 PCI_DEVSEL# 21,28,31,32 PCI_STOP# LWAKE ISOLATE# RTSET NC/SMBCLK NC/SMBDATA 5 6 7 8 GND NC NC VCC PR2- 2 76 61 63 67 68 69 X1 X2 DO DI SK CS 15 PR4+ 1 46 NC/MDI2+ NC/MDI2NC/MDI3+ NC/MDI3- 117 115 114 113 ACTIVITY# LINK_10_100# 4 3 2 1 2 2100_0402_1% TXD+/MDI0+ TXD-/MDI0RXIN+/MDI1+ RXIN-/MDI1- EEDO EEDI EESK EECS 1 R138 1 92 77 60 44 LED0 LED1 LED2 NC/LED3 108 109 111 106 2 PCI_AD22 PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 EEDO AUX/EEDI EESK EECS 1 PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 2 21,28,31,32,42 21,28,31,32,42 21,28,31,32,42 21,28,31,32,42 104 103 102 98 97 96 95 93 90 89 87 86 85 83 82 79 59 58 57 55 53 50 49 47 43 42 40 39 37 36 34 33 2 2 PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 16 SHLD3 3 1 R121 2 0_0402_5% +3VALW 6 U6 1 21,28,31 PCI_PIRQG# LAN_PIRQC# U7 LAN I/F 21,28,31 PCI_PIRQC# 1 R120 2 @0_0402_5% RJ45_RX- 5 PC I_AD[0..31] 21,25,28,31,32,42 PCI_AD[0..31] PCI I/F 1 1 4.7K_0402_5% 2 SHLD4 PR4- 2 8 2 B E A 1 2 1 2 C221 C154 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 +2.5V_LAN_VDD 1 L11 2 1 CHB2012U170_0805 2 1 C275 2 +2.5V_LAN KC FBM-L11-201209-221LMAT_0805 0.1U_0402_16V4Z +3VALW +2.5V_LAN *** 0.1U_0402_16V4Z 1 1 1 C177 2 0.1U_0402_16V4Z C272 2 2 0.1U_0402_16V4Z C271 0.1U_0402_16V4Z 1 1 C247 C199 2 2 0.1U_0402_16V4Z 1 C169 2 2 0.1U_0402_16V4Z C138 0.1U_0402_16V4Z 4 4 Compal Electronics, Inc. Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D E F Ethernet RTL8100CL Size Document Number 星期六, 十一 ?06, 2004 Date: G R ev 0.1 Sheet 26 H of 53 5 4 3 +S1_VCC 2 1 +3VS D D 30 S1_IOW R# 30 S1_IORD# 30 S1_OE# 30 S1_CE2# C S1_REG# S1_A12 S1_A8 S1_CE1# 30 S1_REG# 30 S1_CE1# 30 S1_WAIT# 30 S1_INPACK# 30 S1_WE# 30 S1_BVD1 30 S1_WP S1_A16 2 R269 30 S1_RDY# 30 S1_RST B S1_A13 S1_A23 S1_A22 S1_A15 S1_A20 S1_A21 S1_A19 S1_A14 S1_WAIT# S1_INPACK# S1_WE# S1_BVD1 S1_WP A16_CLK 1 33_0402_5% S1_RDY# S1_RST 30 S1_BVD2 30 S1_CD1# 30 S1_CD2# 30 S1_VS1 30 S1_VS2 R260 R266 2 2 C5 F9 B10 G12 A_CC/BE3#/A_REG# A_CC/BE2#/A_A12 A_CC/BE1#/A_A8 A_CC/BE0#/A_CE1# G10 C8 A8 B8 A9 C9 E10 F10 B3 E7 B9 B2 C3 E9 C4 A_CPAR/A_A13 A_CFRAME#/A_A23 A_CTRDY#/A_A22 A_CIRDY#/A_A15 A_CSTOP#/A_A20 A_CDEVSEL#/A_A21 A_CBLOCK#/A_A19 A_CPERR#/A_A14 A_CSERR#/A_WAIT# A_CREQ#/A_INPACK# A_CGNT#/A_WE# A_CSTSCHG/A_BVD1(STSCHG/RI) A_CCLKRUN#/A_WP(IOIS16) A_CCLK/A_A16 A_CINT#/A_READY(IREQ) D19 K19 DATA CLOCK LATCH PCI 7411 A_CRST#/A_RESET S1_BVD2 A2 A_CAUDIO/A_BVD2(SPKR#) S1_CD1# S1_CD2# S1_VS1 S1_VS2 C15 E5 A3 E8 A_CCD1#/A_CD1# A_CCD2#/A_CD2# A_CVS1/A_VS1# A_CVS2/A_VS2# S1_D14 S1_D2 S1_A18 B13 D2 C10 A_CRSVD/A_D14 A_CRSVD/A_D2 A_CRSVD/A_A18 E2 E1 RSVD RSVD A_CAD31/A_D10 A_CAD30/A_D9 A_CAD29/A_D1 A_CAD28/A_D8 A_CAD27/A_D0 A_CAD26/A_A0 A_CAD25/A_A1 A_CAD24/A_A2 A_CAD23/A_A3 A_CAD22/A_A4 A_CAD21/A_A5 A_CAD20/A_A6 A_CAD19/A_A25 A_CAD18/A_A7 A_CAD17/A_A24 A_CAD16/A_A17 A_CAD15/A_IOWR# A_CAD14/A_A9 A_CAD13/A_IORD# A_CAD12/A_A11 A_CAD11/A_OE# A_CAD10/A_CE2# A_CAD9/A_A10 A_CAD8/A_D15 A_CAD7/A_D7 A_CAD6/A_D13 A_CAD5/A_D6 A_CAD4/A_D12 A_CAD3/A_D5 A_CAD2/A_D11 A_CAD1/A_D4 A_CAD0/A_D3 A6 1 @10K_0402_5% 1 @10K_0402_5% H8 H9 H10 H11 H12 J8 M7 J12 M9 M10 M12 K8 K12 N7 D1 C1 D3 C2 B1 B4 A4 E6 B5 C6 B6 G9 C7 B7 A7 A10 E11 G11 C11 B11 C12 B12 A12 E12 C13 F12 A13 C14 E13 A14 B14 E14 A_USB_EN# B_USB_EN# RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD N1 L6 N2 B15 A16 B16 A17 C16 D17 C19 D18 E17 E19 G15 F18 H14 H15 G17 K17 L13 K18 L15 L17 L18 L19 M17 M14 M15 N19 N18 N15 M13 P18 P17 P19 F15 G18 K14 M18 K13 G19 H17 J13 J17 H19 J19 J18 B18 E18 J15 F14 A18 H18 B19 F17 C17 N13 B17 C18 F19 N17 A15 K15 DATA_CB 30 CLOCK_CB 30 LATCH_CB 30 +3VS C 1U_0603_10V4Z 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 1 1 C497 2 C491 2 2 C484 2 0.1U_0402_16V4Z 2 C479 C501 1 0.1U_0402_16V4Z 1 +3VS 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 1 1 C498 2 C492 1 C485 2 0.1U_0402_16V4Z 2 1 C500 C480 2 0.1U_0402_16V4Z 2 10U_0805_10V4Z +S1_VCC 1 1 C430 0.1U_0402_16V4Z 2 2 1 C429 0.1U_0402_16V4Z 2 1 C431 0.1U_0402_16V4Z 2 C428 0.1U_0402_16V4Z B G7 G8 G13 H13 J9 J10 J11 K9 K10 K11 L8 L9 L10 L11 L12 M8 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND +3VS VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC U20A S1_D10 S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17 S1_IOW R# S1_A9 S1_IORD# S1_A11 S1_OE# S1_CE2# S1_A10 S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3 VCCA VCCA S1_D[0..15] 30 S1_D[0..15] A5 A11 S1_A[0..25] 30 S1_A[0..25] PCI7411GHK_PBGA288 A A Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 PCI7411-1 Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet 1 27 of 53 5 4 3 2 1 +3VS 21,32 PCI_PIRQA# 1 R728 2 @0_0402_5% 21,32 PCI_PIRQE# 1 R729 2 0_0402_5% 1 1 0.1U_0402_16V4Z 1 C523 10U_0805_10V4Z 1 R730 2 @0_0402_5% 21 PCI_PIRQB# 0.01U_0402_16V7K 7411_PIRQA# C526 1 C519 2 2 1 C513 2 0.01U_0402_16V7K C507 2 Place C1301 near T17 and T18 1 2 0.1U_0402_16V4Z C470 2 0.1U_0402_16V4Z 7411_PIRQB# D 1 R731 2 0_0402_5% 2 0.1U_0402_16V4Z 2 1 C517 2 0.01U_0402_16V7K 1 C527 C521 2 2 10U_0805_10V4Z U20B 7411_PIRQD# AVDD AVDD AVDD 1 R734 2 @0_0402_5% 21,31,32 PCI_PIRQD# 1 R735 2 0_0402_5% 21,32 PCI_PIRQH# MC_PWR_CTRL_0 1 2 R256 @0_0402_5% S DCD# MSCD# SMCD# 29 MC_PWR_CTRL_0 29 S DCD# 29 MSCD# 29 SMCD# R265 33_0402_5% 2 SMALE SMD4 SMD5 SMD6 SMD7 SDWP_SMCE# 1 29 SMRE# 29 SMALE 29 SMD4 29 SMD5 29 SMD6 29 SMD7 29 SDWP_SMCE# +3VS MC_PWR_CTRL_0 MC_PWR_CTRL_1 E3 F5 F6 SD_CD# MS_CD# SM_CD# R257 33_0402_5% 1 2 G5 MSBS_SDCMD_SMWE2 F3 MSDATA3_SDDAT3_SMD3 H5 MSDATA2_SDDAT2_SMD2 G3 MSDATA1_SDDAT1_SMD1 G2 MSDATA0_SDDAT0_SMD0 G1 29 MSCLK_SDCLK_SMELWP# 29 MSBS_SDCMD_SMWE2 29 MSDATA3_SDDAT3_SMD3 29 MSDATA2_SDDAT2_SMD2 29 MSDATA1_SDDATA1_SMD1 29 MSDATA0_SDDAT0_SMD0 C F1 F2 J5 J3 H3 J6 J1 J2 H7 SMCLE SMRB# SM_PHYS_WP# J7 K1 K2 2 MS_CLK/SD_CLK/SM_EL_WP# MS_BS/SD_CMD/SM_WE# MS_DATA3/SD_DAT3/SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_DATA1/SD_DAT1/SM_D1 MS_SDIO(DATA0)/SD_DAT0/SM_D0 SD_CLK/SM_RE#/SC_GPIO1 SD_CMD/SM_ALE/SC_GPIO2 SD_DAT0/SM_D4/SC_GPIO6 SD_DAT1/SM_D5/SC_GPIO5 SD_DAT2/SM_D6/SC_GPIO4 SD_DAT3/SM_D7/SC_GPIO3 SD_WP/SM_CE# SM_CLE/SC_GPIO0 SM_R/B SM_PHYS_WP#/SC_FCB 1 2 @48MHZ_4P_FN4800002 VDD OUT 3 1 OE C499 @0.1U_0402_10V6K GND SD_OSCLIN 1 R352 CLK_EXT_SD48 R349 1 +3VS R353 1 6.34K_0402_1% 2 TPBIAS0 TPA0+ TPA0TPB0+ TPB0- 2 2 4 3 2 1 1 2 220P_0402_50V7K CPS, CNA dont use 2 18P_0402_50V8J P12 W17 T19 M1 R17 U18 U19 U15 V15 W15 V14 W14 U17 V18 W18 V16 W16 M11 P15 R19 R18 R12 U13 V13 RSVD RSVD RSVD RSVD RSVD RSVD RSVD PCI7411 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 C/BE3# C/BE2# C/BE1# C/BE0# PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL PERR# SERR# REQ# GNT# TEST0 NC RSVD CLK_48 PHY_TEST_MA PCICLK PCIRST# GRST# RI_OUT#/PME# R0 R1 TPBIAS0 TPA0P TPA0N TPB0P TPB0N TPBIAS1 TPA1P TPA1N TPB1P TPB1N CPS CNA XO XI PC0(TEST1) PC1(TEST2) PC2(TEST3) SUSPEND# SPKROUT MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6 C459 X5 24.576MHz_16P_3XG-24576-43E1 P14 T17 N12 U14 U16 2 1 AVDD_7411 2 R344 1 C474 5.11K_0603_1% R372 2 1 C483 1U_0603_10V4Z 2 1K_0402_5% 2 1K_0402_5% 1 2 R369 1K_0402_5% 1 4.7K_0402_5% 1 R366 1 R373 56.2_0603_1% R347 1 56.2_0603_1% R361 2 1K_0402_5% SD_OSCLIN 1 2 R378 0_0402_5% 4.7K_0402_5% 2 1 JP20 4 3 2 1 FOX_UV31413-T1 56.2_0603_1% R348 1 56.2_0603_1% 2 R362 2 2 1 C471 1U_0603_10V4Z L2 K5 K3 K7 L1 L3 L5 2 13 CLK_EXT_SD48 B 1 10K_0402_5% VSSPLL VSSPLL 2 X6 4 2 R360 +3VS AGND AGND AGND R388 @10K_0402_5% SCL SDA VR_EN# U2 V1 V2 U3 W2 V3 U4 V4 V5 U5 R6 P6 W6 V6 U6 R7 V9 U9 R9 N9 V10 U10 R10 N10 V11 U11 R11 W12 V12 U12 N11 W13 R387 2 2 2 C522 C529 2 0.01U_0402_16V7K C PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0 P9 V7 R8 U7 W8 N8 W5 V8 U8 U1 T2 PCI_PAR 21,26,31,32 PCI_FRAME# 21,26,31,32,42 PCI_TRDY# 21,26,31,32,42 P CI_IRDY# 21,26,31,32 PCI_STOP# 21,26,31,32 PCI_DEVSEL# 21,26,31,32 PCM_ID 2 100_0402_1% 1 R351 21,26,31,32,42 21,26,31,32,42 21,26,31,32,42 21,26,31,32,42 PCI _AD20 PCI_PERR# 21,26,31,32 PCI_SERR# 21,26,31,32 PCI_REQ#2 21 PCI_GNT#2 21 B CLK_PCI_CB P5 R3 T1 T3 PCIRST# PCIRST# 21,26,31,32,37,39,42,53 R2 1 R346 CLK_PCI_CB 21 C509 R390 2 1 @10_0402_5% 2 +3VS 4.7K_0402_5% 1 2 @15P_0402_50V8D PCM_SPK# L7 PCM_SPK# 34 7411_PIRQA# 7411_PIRQB# 7411_PIRQC# N3 M5 P1 P2 P3 N5 R1 M3 M2 1 PCI_AD[0..31] 21,25,26,31,32,42 W4 W7 W9 W11 7411_PIRQD# 5IN1_LED 1 1 R345 R359 R368 33K_0603_1% SERIRQ 21,37,39,53 5IN1_LED 29,39 2 2 300_0402_5% 300_0402_5% 2 R367 1 @10K_0402_5% 2 R350 1 10K_0402_5% +3VS H2 PCI7411GHK_PBGA288 1 1394_XCLK 13 @10_0402_5% 1 C518 PCI_AD[0..31] R264 1K_0402_5% 1 *** 2 0.1U_0402_16V4Z C425 0.1U_0402_16V4Z 2 1 C460 1 C512 PCI _AD31 PCI _AD30 PCI _AD29 PCI _AD28 PCI _AD27 PCI _AD26 PCI _AD25 PCI _AD24 PCI _AD23 PCI _AD22 PCI _AD21 PCI _AD20 PCI _AD19 PCI _AD18 PCI _AD17 PCI _AD16 PCI _AD15 PCI _AD14 PCI _AD13 PCI _AD12 PCI _AD11 PCI _AD10 PCI _AD9 PCI _AD8 PCI _AD7 PCI _AD6 PCI _AD5 PCI _AD4 PCI _AD3 PCI _AD2 PCI _AD1 PCI _AD0 1 18P_0402_50V8J 1 C506 1 29 SMCLE 29 SMRB# 29 SM_PHYS_WP# 1 2 1 C511 1U_0603_10V4Z 1 1 C505 0.01U_0402_16V7K 2 1 1U_0603_10V4Z L22 +3VS 0.1U_0402_16V4Z W10 W3 1 7411_PIRQC# VCCP VCCP 1 R733 2 0_0402_5% 0.01U_0402_16V7K VR_PORT VR_PORT 21,26,31 PCI_PIRQG# 2 C426 0.1U_0402_16V4Z V19 T18 21,26,31 PCI_PIRQC# 1 R732 2 @0_0402_5% AVDD_7411 CHB1608U301_0603 2 1 M19 H1 +3VS VDPLL_33 VDPLL_15 21,31 PCI_PIRQF# R13 R14 V17 D VDPLL_33 L21 CHB1608U301_0603 1 2 ** A A Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 PCI7411-2 Size Document Number CustomLongbeach 100 Date: Rev 0.1 星期六 , 十一月 06, 2004 Sheet 1 28 of 53 5 4 3 2 1 ** +VCC_5IN1 +3VS +3VS +3VS JP9 2 2 2 R222 @10K_0402_5% R268 @10K_0402_5% R198 @10K_0402_5% 1 *** 1 2.2K_0402_5% 2 R788 1 1 D SDCD# 28 MSDATA0_SDDAT0_SMD0 28 MSDATA1_SDDATA1_SMD1 28 MSDATA2_SDDAT2_SMD2 28 MSDATA3_SDDAT3_SMD3 28 SMD4 28 SMD5 28 SMD6 28 SMD7 1 R791 2 @0_0805_1% 28 SM_PHYS_WP# MSCD# 28 MSBS_SDCMD_SMWE2 28 SMALE MSDATA0_SDDAT0_SMD0 MSDATA1_SDDAT1_SMD1 MSDATA2_SDDAT2_SMD2 MSDATA3_SDDAT3_SMD3 SMD4 SMD5 SMD6 SMD7 34 33 32 31 21 22 23 24 SM_WP-IN SM_PHYS_WPS# MSBS_SDCMD_SMWE2 SMALE 35 43 36 37 SMCD# 28 SMCD# +VCC_5IN1 28 SMRB# 28 SMRE# 28 SDW P_SMCE# SMRB# ### 28 SMCLE 25 3 29 26 27 28 30 2 38 SMCD# SMRB# SMRE# SDW P_SMCE# SMCD# 2 @0_0402_5% SMCLE 1 R725 SM-D0 / XD-D0 SM-D1 / XD-D1 SM-D2 / XD-D2 SM-D3 / XD-D3 SM-D4 / XD-D4 SM-D5 / XD-D5 SM-D6 / XD-D6 SM-D7 / XD-D7 SD-DAT3 SD-DAT2 SD-DAT1 5 IN 1 CONN SD-DAT0 SD-WP-SW SD-CMD SD_CLK SD-VCC N/C SM_WP-IN / XD_WP-IN SD-CD-SW SM-WP-SW SD-CD-COM #SM_-WE / XD_-WE #SM-ALE / XD-ALE MS-DATA0 MS-DATA1 SM-LVD MS-DATA2 SM-CD-SW MS-DATA3 SM_-VCC / XD_-VCC MS-SCLK #SM_R/-B / XD_R/-B MS-INS #SM_-RE / XD_-RE MS-BS #SM_-CE / XD_-CE MS-VCC #SM_-CD SM-CD-COM XD-VCC SM-CLE / XD-CLE XD-CD GND GND 11 12 6 7 5 10 8 9 4 42 41 MSDATA3_SDDAT3_SMD3 MSDATA2_SDDAT2_SMD2 MSDATA1_SDDAT1_SMD1 MSDATA0_SDDAT0_SMD0 SDW P_SMCE# MSBS_SDCMD_SMWE2 MSCLK_SDCLK_SMELWP# 15 14 16 18 19 17 13 20 MSDATA0_SDDAT0_SMD0 MSDATA1_SDDAT1_SMD1 MSDATA2_SDDAT2_SMD2 MSDATA3_SDDAT3_SMD3 MSCLK_SDCLK_SMELWP# MSCD# MSBS_SDCMD_SMWE2 *** D 1 R787 2 @43K_0603_5% +VCC_5IN1 SDCD# SDCD# 28 MSCD# 28 +VCC_5IN1 40 39 1 44 SMCD# TAITW _R007-010-N3 +3VS +3VS *** C 2 C C1077 R795 10K_0402_5% 1 B 2 A U53 P SM_PHYS_WPS# MSCLK_SDCLK_SMELWP# 4 SM_WP-IN G Y TC7SH08FU_SSOP5 3 28 MSCLK_SDCLK_SMELWP# 5 1 0.1U_0402_16V4Z SD/XD/MS/SM PWR SWITCH +3VS +VCC_5IN1 B 2 1 B R793 100_0402_1% R267 10K_0402_5% C1073 *** 1 R386 10K_0402_5% D 0_0603_5% 2 G Q20 S 2N7002_SOT23 2 OUT OUT OUT FLG ### 8 7 6 5 1 GND IN IN EN# G528_SO8 1 3 2 28,39 5IN1_LED @1U_0603_10V6K 1 28 MC_PW R_CTRL_0 2 D 0.1U_0402_16V4Z 1 1U_0603_10V4Z C379 C382 1 S 2 2 C359 3 1 2 3 4 1 1 R794 2 U22 2 SMCD# G Q78 2N7002_SOT23 4.7U_0805_10V4Z A A Title CardBus & PCI-E Socket ,5IN 1 CON THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 R ev 0.1 星期六, 十一月 06, 2004 Sheet 1 29 of 53 5 4 3 2 1 Power Switch for PCMCIA +3VALW CardBus & PCI-E Socket 1 S1_A[0..25] 27 S1_A[0..25] S1_D[0..15] 27 S1_D[0..15] R633 100K_0402_5% JP31 27 LATCH_CB 33,37,38,42,47,53 SUSP# 2 1 R398 10K_0402_5% +3VS 1 R397 47K_0402_5% 20mil 8 19 +S1_VPP 2 1 0.01U_0402_16V7K 12V 12V NC3 3.3V AVPP NC0 NC4 5V 5V +S1_VCC C516 9 10 2 2 1U_0603_10V4Z 1 40mil 17 18 C508 1 C514 DATA CLOCK LATCH RESET# OC# SHDN# AVCC AVCC GND NC1 NC2 NC5 NC6 NC7 NC8 10U_0805_10V4Z2 20 7 14 13 24 2 1 C524 +3VALW 4.7U_0805_10V4Z C510 0.1U_0402_16V4Z C503 +5VALW 4.7U_0805_10V4Z 2 1 R395 @0_1206_5% 2 1 R399 @0_1206_5% 11 C528 0.1U_0402_16V4Z C530 4.7U_0805_10V4Z 27 S1_CE1# 27 S1_CE2# 27 S1_VS1 27 S1_OE# 27 S1_IORD# 23 22 16 6 27 S1_IOWR# 27 S1_WE# +S1_VPP Close to CardBus Conn. Near to Express Card slot. +S1_VCC +3VS_PEC +3V_PEC C882 10U_0805_10V4Z 1 2 1 C897 0.1U_0402_16V4Z 2 1 C905 0.1U_0402_16V4Z 1 1 2 2 C866 0.1U_0402_10V6K 1 2 C853 C858 4.7U_0805_10V4Z 2 4.7U_0805_10V4Z 27 S1_VS2 27 S1_RST +S1_VPP C918 4.7U_0805_10V4Z 2 2 C910 1 0.01U_0402_16V7K 1 27 S1_WAIT# +1.5VS_PEC 1 2 S1_A10 S1_VS1 S1_OE# S1_IORD# S1_A11 S1_IOWR# S1_A9 S1_A17 S1_A8 S1_A18 S1_A13 S1_A19 S1_A14 S1_A20 TPS2220ADBR_SSOP24 27 S1_RDY# +S1_VCC C S1_D13 S1_D6 S1_D14 S1_D7 S1_D15 S1_CE1# S1_CE2# C833 0.1U_0402_10V6K 1 2 27 S1_INPACK# S1_WE# S1_A21 S1_RDY# S1_A16 S1_A22 S1_A15 S1_A23 S1_A12 S1_A24 S1_A7 S1_A25 S1_A6 S1_VS2 S1_A5 S1_RST S1_A4 S1_WAIT# S1_A3 S1_INPACK# S1_A2 C834 27 S1_REG# 4.7U_0805_10V4Z 27 S1_BVD2 27 S1_BVD1 27 S1_WP 27 S1_CD2# S1_REG# S1_A1 S1_BVD2 S1_A0 S1_BVD1 S1_D0 S1_D8 S1_D1 S1_D9 S1_D2 S1_D10 S1_WP S1_CD2# B 2 USBP5- 22 USBP5+ 22 CPUSB# D @0_0402_5% 2 2 @0_0402_5% 1 R626 1 R627 SB_SMCLK 10,11,13,22 SB_SMDATA 10,11,13,22 +1.5VS_PEC PCIE_PME# 22 +3V_PEC PERST# +3VS_PEC CLKREQ# CPPE# 1 2 R763 *** EXP_CPPE# 22 0_0402_5% CLK_PCIE_CARD# 13 CLK_PCIE_CARD 13 R746 R747 1 1 2 2 0_0402_5% 0_0402_5% NB_PCIEC_RXN0 7 NB_PCIEC_RXP0 7 ** R748 R749 1 1 2 2 0_0402_5% 0_0402_5% PCIEC_RXN0 7 PCIEC_RXP0 7 +1.5VS_PEC 1 2 C1058 C +3VS_PEC 1 2 C1059 1 2 C1060 1 2 C1061 @10U_0805_10V4Z 3 4 5 12 15 21 27 DATA_CB 27 CLOCK_CB 0.1U_0402_16V4Z GND GND GND GND S1_CD1# USB_DS1_D3 USB_D+ S1_D11 GND S1_D4 CPUSB# S1_D12 RSV S1_D5 RSV GND GND S1_D13 RSV S1_D6 SMB_CLK S1_D14 SMB_DATA S1_D7 +1.5V S1_D15 +1.5V S1_CE1# +1.5V S1_CE2# WAKE# GND GND S1_A10 +3.3VAUX S1_VS1 +3.3VAUX S1_OE# PERST# S1_IORD# +3.3V S1_A11 +3.3V S1_IOWR# +3.3V S1_A9 +3.3V GND GND S1_A17 CLKREQ# S1_A8 CPPE# S1_A18 GND S1_A13 GND S1_A19 GND S1_A14 REFCLKS1_A20 REFCLK+ GND GND S1_WE# PERn0 S1_A21 PERp0 S1_RDY# GND S1_VCC GND S1_VCC GND S1_VPP GND S1_A16 GND S1_A22 PETn0 S1_A15 PETp0 GND GND S1_A23 NC S1_A12 NC S1_A24 NC S1_A7 NC S1_A25 NC S1_A6 NC S1_VS2 NC GND GND S1_A5 NC S1_RST NC S1_A4 NC S1_WAIT# NC S1_A3 NC S1_INPACK# NC S1_A2 NC GND GND S1_REG# NC S1_A1 NC S1_BVD2 NC S1_A0 NC S1_BVD1 NC S1_D0 NC S1_D8 NC GND GND S1_D1 NC S1_D9 NC S1_D2 NC S1_D10 NC S1_WP NC S1_CD2# NC GND GND GND GND @10U_0805_10V4Z D C520 S1_CD1# S1_D3 S1_D11 S1_D4 S1_D12 S1_D5 @10U_0805_10V4Z 27 S1_CD1# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 @10U_0805_10V4Z +12VALW U25 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 B TYCO_1376045-1_BL Power Switch for PCI-E +3VS +3VS +3VS 7 8 +3VS_PEC R193 1 1 4.7U_0805_10V4Z 2 C385 18 19 1 3.3Vaux_in Aux_out 20 1.5Vout1 1.5Vout2 CPUSB# 2 0_0402_5% 1 R798 CPPE# 1 16 17 OC# 23 RCLKEN PERST# 22 9 U52 INB O 4 1 R199 1 1 1 C420 C381 10U_0805_10V4Z C387 10U_0805_10V4Z 2 2 2 2 @0_0402_5% PCIEC_CLKREQ PCIEC_CLKREQ PERST# 4.7U_0805_10V4Z TC7SH32FU_SSOP5~D D S R646 1 Q16 2N7002_SOT23 2 G @0_0402_5% 2 A TPS2231PWPR_PWP24 ### Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 PCIEC_CLKREQ# 13 INA +1.5VS_PEC NC1 NC2 NC3 NC4 NC5 GND CPUSB# CPPE# STBY# SHDN# SYSRST# 1 10 12 13 24 14 15 4 3 2 33,37,38,42,47,53 SUSP# 36,37,40,47,53 SYSON 8,14,21 NB_RST# CLKREQ# 2 1.5Vin1 1.5Vin2 11 A *** +3V_PEC 100K_0402_5% CPUSB# CPPE# 10K_0402_5% 1 21 2 R250 2 R254 100K_0402_5% 2 C374 +1.5VS C1002 2 0.1U_0402_16V4Z 1 +3VALW 10U_0805_10V4Z 1 R754 10K_0402_5% 5 3.3Vout1 3.3Vout2 P 3.3Vin1 3.3Vin2 G 5 6 3 C383 1 1 1 4.7U_0805_10V4Z 2 +3VALW 3 +3VALW 2 U14 2 +3VS 4 3 2 PCMCIA Socket Size Document Number CustomLongbeach 100 Date: Rev 0.1 星期六 , 十一月 06, 2004 Sheet 1 30 of 53 MINI_PCI 1 SOCKET FOR WLAN (BOTTOM) +3VALW 37,53 W L_OFF# 12 A 37,39,53 KILL_SW# 13 B PCI_AD[0..31] 21,25,26,28,32,42 U41D P 14 PCI_AD[0..31] 11 7 G O SN74LVC08APW_TSSOP14 W LAN_PIRQC# JP29 TIP 1 2 1 3 LAN RESERVED 5 7 9 D21 11 1 2 13 15 W LAN_PIRQD# CH751H-40_SC76 17 W=40mils 19 +3VS 21 23 CLK_PCI_MINI 25 21 CLK_PCI_MINI 27 29 21 PCI_REQ#3 31 PCI_AD31 33 PCI_AD29 35 37 PCI_AD27 39 PCI_AD25 41 43 45 21,26,28,32,42 PCI_C/BE#3 PCI_AD23 47 49 PCI_AD21 51 PCI_AD19 53 55 PCI_AD17 57 59 21,26,28,32,42 PCI_C/BE#2 61 21,26,28,32 PC I_IRDY# 63 R380 1 2 65 1K_0402_5% 67 21,26,28,32 PCI_SERR# 69 71 21,26,28,32 PCI_PERR# 73 21,26,28,32,42 PCI_C/BE#1 PCI_AD14 75 77 PCI_AD12 79 PCI_AD10 81 83 PCI_AD8 85 CLK_PCI_MINI PCI_AD7 87 89 PCI_AD5 91 R381 93 10_0402_5% PCI_AD3 95 W=30mils 97 +5VS PCI_AD1 99 101 103 1 105 C496 107 10P_0402_50V8J 109 2 111 113 115 117 119 121 W=30mils 123 +5VS 1 KEY 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 2 KEY 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 2 2 R357 1 @0_0402_5% RING 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 QTC_C102A-155P31-02 2 R358 1 0_0402_5% LAN RESERVED W LAN_PIRQD# W=30mils W LAN_PIRQC# W=40mils PCIRST# 2 R382 1 @0_0402_5% 2 R383 1 0_0402_5% +5VS PCI_PIRQC# 21,26,28 PCI_PIRQF# 21,28 PCI_PIRQD# 21,28,32 PCI_PIRQG# 21,26,28 +3VALW PCIRST# 21,26,28,32,37,39,42,53 W=40mils +3VS PCI_GNT#3 21 WLANPME# 26,37,53 PCI_AD30 PCI_AD28 PCI_AD26 PCI_AD24 MINI_IDSEL1 R365 PCI_AD22 PCI_AD20 2 PCI_AD18 100_0402_1% IDSEL : PCI_AD18 PCI_PAR 21,26,28,32 PCI_AD18 PCI_AD16 PCI_FRAME# 21,26,28,32,42 PCI_TRDY# 21,26,28,32,42 PCI_STOP# 21,26,28,32 PCI_DEVSEL# 21,26,28,32 PCI_AD15 PCI_AD13 PCI_AD11 +5VS 1 2 2 C494 1000P_0402_50V7K 1 2 C495 0.1U_0402_16V4Z 1 C463 1 0.1U_0402_16V4Z 2 1 C493 10U_0805_10V4Z 2 C466 10U_0805_10V4Z PCI_AD9 PCI_C/BE#0 21,26,28,32,42 PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0 +3VS 2 1 W=20mils 2 1 C462 0.1U_0402_16V4Z 2 1 C489 0.1U_0402_16V4Z 2 1 C465 0.1U_0402_16V4Z 2 1 C488 0.1U_0402_16V4Z 2 1 1 C490 0.1U_0402_16V4Z 2 C467 10U_0805_10V4Z +3VALW C464 0.1U_0402_16V4Z Compal Electronics, Inc. Title MINI_PCI-WLAN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet 31 of 53 TV-Tuner AV IN JP17 MINI_PCI 2 1 2 6 3 4 5 7 AUDIO_INL SOCKET FOR TV TURNER (TOP) CVBS_IN AUDIO_INR FOX_JA6343L-1R0-FR TV_PIRQA# PCI_AD[0..31] PCI_AD[0..31] 21,25,26,28,31,42 2 R705 1 @0_0402_5% PCI_PIRQA# 21,28 TV_PIRQA# W=40mils +3VS CLK_PCI_MINI2 21,25,42 CLK_PCI_MINI2 21 PCI_REQ#4 PCI_AD31 PCI_AD29 +5VS 21,26,28,31,42 PCI_C/BE#3 PCI_AD27 PCI_AD25 2 1 R689 0_0805_5% PCI_AD23 PCI_AD21 PCI_AD19 PCI_AD17 21,26,28,31,42 PCI_C/BE#2 21,26,28,31 PC I_IRDY# 1 21,26,28,31 PCI_SERR# 21,26,28,31 PCI_PERR# 21,26,28,31,42 PCI_C/BE#1 R667 2 1K_0402_5% PCI_AD14 PCI_AD12 PCI_AD10 PCI_AD8 PCI_AD7 R700 @10_0402_5% PCI_AD5 CVBS_IN PCI_AD3 1 CLK_PCI_MINI2 2 +5VS W=30mils PCI_AD1 1 2 C972 @15P_0402_50V8J AUDIO_INL +5VS W=30mils 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 2 1 3 2 4 3 ANTENNA 1 ANTENNA 1 PCI_PIRQH# 21,28 RING SINGA_2SJ-A403-002 HRS_U.FL-R-SMT(10) 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 RF GND 1 LAN RESERVED 1 PCI_PIRQD# 21,28,31 LAN RESERVED R726 @0_1206_5% W=30mils TV_PIRQD# W=40mils PCIRST# *** 2 TIP 2 R702 1 0_0402_5% JP19 JP1 2 JP11 2 R706 1 @0_0402_5% 2 TV_PIRQD# RF PCI_PIRQE# 21,28 3 2 R704 1 0_0402_5% +5VS +3VALW PCIRST# 21,26,28,31,37,39,42,53 W=40mils +3VS PCI_GNT#4 21 PCI_AD30 PCI_AD28 PCI_AD26 PCI_AD24 1 R682 PCI_AD22 PCI_AD20 PCI_AD18 PCI_AD16 2 PCI_AD23 100_0402_1% IDSEL : PCI_AD23 PCI_PAR 21,26,28,31 PCI_FRAME# 21,26,28,31,42 PCI_TRDY# 21,26,28,31,42 PCI_STOP# 21,26,28,31 PCI_DEVSEL# 21,26,28,31 PCI_AD15 PCI_AD13 PCI_AD11 +5VS 1 2 2 C798 1000P_0402_50V7K 1 2 C804 0.1U_0402_16V4Z 1 C861 1 0.1U_0402_16V4Z 2 C856 10U_0805_10V4Z PCI_AD9 PCI_C/BE#0 21,26,28,31,42 PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0 +3VS 2 1 C891 0.1U_0402_16V4Z 2 1 C914 0.1U_0402_16V4Z 2 1 C890 0.1U_0402_16V4Z 2 1 C926 0.1U_0402_16V4Z 1 2 1 C969 10U_0805_10V4Z 2 C962 10U_0805_10V4Z AUDIO_INR W=20mils 2 QTC_C102A-040B31-4 1 +3VALW C802 0.1U_0402_16V4Z Compal Electronics, Inc. Title MINI_PCI-TV Tuner THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet 32 of 53 3 2 1 +5VALW POWER ON PATH +5VALW U8B P P R500 @1M_0402_5% @0.1U_0402_16V4Z 14 14 R156 24K _0402_1% B 2 2 1 R506 @1M_0402_5% +VDDA 11 C @SN74HCT4066PW_TSSOP14 A B G A AMP_LEFT 1 1 G 1 @1M_0402_5% 7 R505 @1M_0402_5% AMP_LEFT 10 AMP_LEFT 34 @SN74HCT4066PW_TSSOP14 D 2 2 +5VALW 2 +VDDA 1 8 R515 @1M_0402_5% R514 @1M_0402_5% B AMP_RIGHT 9 AMP_RIGHT 34 @SN74HCT4066PW_TSSOP14 2 @SN74HCT4066PW_TSSOP14 A C AMP_RIGHT 3 C G B 2 R516 @1M_0402_5% 7 @1M_0402_5% U 8D P U 8C A G 4 1 AC97_R 1 1 DEFAULT (WITH 4066) U0 R0 R7 R8 R9 R10 R11 R12 R13 R14 C1 C2 C3 POP Q1 Q2 R1 R2 R3 R4 R5 R6 DEPOP +5VALW P R507 2 +VDDA 5 *** C204 @1U_0603_10V4Z 1 2 14 INT_CD_R 14 2 10K_0402_5% 7 SD SI9182DH-AD_MSOP8 2 +VDDA 13 GND 3 8 R541 69.8K_0603_1% 1 1 AC97_L 2 CNOISE *** U8A C756 ERROR 4.7U_0805_10V4Z 2 7 C288 1 6 R502 1 DELAY SENSE or ADJ 0.1U_0402_16V4Z C755 2 2 @0_0402_5% 1 R760 +3VALW VOUT C291 1 R759 35,37,53 CD_PLAY 0.1U_0402_16V4Z 4.7U_0805_10V4Z D VIN +VDDA 5 C +VDDA U11 4 7 Adjustable Output +5VALW DIRECT PLAY PATH C681 C196 @1U_0603_10V4Z INT_CD_L1 2 12 4 6 5 S3 (WITHOUT 4066) Q1 Q2 R1 R2 R3 R4 R5 R6 POP U1 R0 R7 R8 R9 R10 R11 R12 R13 R14 C1 C2 C3 DEPOP 30,37,38,42,47,53 SUSP# 42,48,49 SUSP C C 2 R536 R146 @0_0402_5% MIC1 22 MIC2 13 PHONE 12 PC_BEEP 11 RESET# 5 2 1 R134 @1M_0402_5% 3 AFILT1 C264 1000P_0402_50V7K AFILT2 30 C269 1000P_0402_50V7K VREFOUT 28 VREF 27 DCVOL 32 NC VREFOUT2 VAUX DISABLE# SCK 31 33 34 43 44 NC AVSS1 AVSS2 40 26 42 SYNC 2 @0_0402_5% X2 24.576MHz_16P_3XG-24576-43E1 1 2 1 C279 2 SDA XTLSEL 47 SPDIFI/EAPD 48 SPDIFO DVSS1 DVSS2 2 1 22P_0402_50V8J 2 2 2 2 1 AUDIO_XCLK 13 Place very close to U30.2 20K_0402_1% CD_GNA 1 *** C278 R509 R511 0_0402_5% 6.8K_0402_5% +AUD_VREF Analog Reference V R718 22P_0402_50V8J ** @1M_0402_5% +AUD_VREF C725 0.1U_0402_16V4Z C715 R136 1 SMB_CLK 1 R143 2 0_0402_5% 0_0603_5% 2 +AVDD_AC97 EC_IDERST 35,37,53 AG ND 2 R144 +3VS @10K_0402_5% 1 2 1 2 1 2 DGND To AGND Bypass A 1 ALC250-VD_LQFP48 1 B +AVDD_AC97 SDATA_OUT 45 46 2 2 1 G 1 R155 29 R510 2 35 CD_AGND AC_SDIN0 22 R139 XTL_OUT S 2 2 22_0402_5% @2N7002_SOT23 2 0_0402_5% 1 8 XTL_IN CD_GND 21 10 SDATA_IN Q32 1 R542 CD_AGND To CD_GNA Bypass SMB_DATA 3 2 CD_R 19 1 5,37,53 EC_SMB_DA2 2 AC_BITCLK 22,41 22_0402_5% 1 2 R522 @10K_0402_5% 1 CD_L 20 6 @4.7K_0402_5% 2 18 BIT_CLK @1K_0402_5% 1 LINE_IN_R R544 2 24 1 R527 R512 6.8K_0402_5% R537 3.3K_0402_5% 1 9 41 AMP_RIGHT 1 2 C270 27P_0402_50V8J D DVDD1 39 HP_OUT_R 4 7 A DVDD2 1 38 25 HP_OUT_L LINE_IN_L 2 34 EAPD JD1 23 R543 1U_0603_10V4Z 22,25,41 AC_SDOUT 17 AMP_LEFT R513 6.8K_0402_5% C716 22,41 AC_SYNC R128 2 1 22_0402_5% R130 1 2 22_0402_5% R140 1 2 22_0402_5% SMB_DATA LINER AC97_L 1 2 R531 0_0603_5% AC97_R 1 2 R532 0_0603_5% 0.1U_0402_16V4Z 22,41 AC_RST# 36 37 @1000P_0402_50V7K 2 1U_0603_10V4Z 2 1U_0603_10V4Z @2N7002_SOT23 2 0_0402_5% C721 34 MONO_IN LINE_OUT_R MONO_OUT/VREFOUT3 1 C736 1 C737 1U_0603_10V4Z 34 MIC CD_GNA 1 2 C691 1U_0603_10V4Z C_MIC 1 2 C692 1U_0603_10V4Z 1 2 C993 @1U_0603_10V4Z 1 2 C220 0.1U_0402_16V4Z JD2 LINEL 0.01U_0402_16V7K C D_R AUX_R 16 35 LINE_OUT_L @1000P_0402_50V7K C724 B 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z CD_L 15 C733 SMB_CLK 3 Q33 1 R538 2 1 C214 1 C689 AUX_L 1 5,37,53 EC_SMB_CK2 2 34 NBA_PLUG 14 C738 1 1 2 C219 1U_0603_10V4Z 1 2 C218 1U_0603_10V4Z AVDD2 AVDD1 U10 CD_L 1 2 C695 1U_0603_10V4Z C D_R 1 2 C696 1U_0603_10V4Z 1 20K_0402_1% 1 20K_0402_1% 1 C263 10U_0805_10V4Z 35 INT_CD_R S 2 2 D 0.1U_0402_16V4Z @4.7K_0402_5% 2 1 G 1 C277 C723 1 C286 @0_0402_5% C261 0.1U_0402_16V4Z 2 R503 2 R504 35 INT_CD_L R145 @1K_0402_5% 4.7U_0805_10V4Z 2 0_0805_1% 1 +VDDA 1 R529 10U_0805_10V4Z CHB2012U170_0805 2 Audio Signal Bias Circuit *** R137 L15 1 +3VALW 2 @0_0805_5% 1 +3VS 1 R530 1 +AVDD_AC97 AC97 Codec DGND AGND Compal Electronics, Inc. WITH 14.318MHz : Rxxx POP WITH 24.576MHz : Rxxx DEPOP 5 DGND AGND Title AC97 Codec THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE CustomLongbeach 100 USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 星期六, 十一月 06, 2004 Date: 4 3 2 1 R ev 0.1 Sheet 33 of 53 A B C D +5VAMP Left Speaker Connector 1 +5VAMP Audio Amplifier R549 JP13 0.1U_0402_16V4Z W=40Mil 1 2 2 SHUTDOW N# C301 10U_0805_10V4Z 2 1 100K_0402_5% R804 1 1 C304 D Q12 S 2N7002_SOT23 R161,R557 2 AMP-->1 Ohm 1 AMP-->0 Ohm EAPD 33 Right Speaker Connector 1 U12 7 18 19 1 0_0805_5% 0_1206_5% 2 2 3 4 21 5 23 6 20 ** 2 0_0603_5% 2 0_0603_5% 2 C309 1U_0603_10V6K 2 C322 1U_0603_10V6K 1 1 *** 2 HP_L 2 HP_R NBA_PLUG C298 0.1U_0402_16V4Z 2 R559 R557 1 INTSPK_L2 1 0_0805_5% 0_1206_5% 2 ACES_85205-0200 INTSPK_R2 HEADPHONE OUT JACK +5VAMP C302 2 4.7U_0805_10V4Z R523 100K_0402_5% 1 +5VAMP R167 @6.8K_0402_5% For discharge 1 2 +5VAMP W=40Mil R528 1K_0402_5% 1 2 NBA_PLUG 33 NBA_PLUG 2 2 1 2 C299 0.047U_0402_16V4Z 1 R165 @6.8K_0402_5% 4 JP12 INTSPK_R1 INTSPK_R2 ** 1 12 13 24 APA2121PI-TR_TSSOP24 1 AMP_LEFT C305 1 0.01U_0402_16V7K AMP_RIGHT C308 1 0.01U_0402_16V7K 17 22 15 14 11 9 16 10 8 PVDD SHUTDOWN# PVDD SE/BTL# VDD PC-BEEP BYPASS HP/LINE# LOUTVOLUME ROUTLOUT+ LBYPASS ROUT+ RBYPASS LLINEIN RLINEIN GND LHPIN GND RHPIN GND GND CLK R547 10K_0402_5% 2 INTSPK_L1 2 R163 R161 INTSPK_R1 1 1 R790 fo=1/(2*3.14*R*C)=225Hz R=1.5K / C=0.47U ACES_85205-0200 1 33 AMP_RIGHT AMP_RIGHT 1 2 EC_EAPD 37 NBA_PLUG VOL_AMP R789 1 AMP_LEFT 0_0402_5% 2EAPD INTSPK_L1 INTSPK_L2 2 33 AMP_LEFT @0_0402_5% 2 R548 1 2 G 3 4 E 2 1 R545 @100K_0603_5% C735 1U_0603_10V4Z JP5 5 INTSPK_R1 2 R158 2 1 1 2 2 3 4 21 5 23 6 20 1 @0_0805_5% AMP_LEFT C768 1 @0.01U_0402_16V7K AMP_RIGHT C303 1 @0.01U_0402_16V7K R546 2 17 22 15 14 11 9 16 10 8 C775 2 R556 1 12 13 24 3 6 2 1 R719 @1K_0402_1% INTSPK_L2 FOX_JA6033L-5S1-TR R720 @1K_0402_1% INTSPK_R2 1 @0_0805_5% MICROPHONE IN JACK 2 @APA2121PI-TR_TSSOP24 2 SHUTDOW N# NBA_PLUG @0.1U_0402_16V4Z R157 @1_1206_5% 1 2 1 2 INTSPK_R1-3 L54 CHB2012U170_0805 1 2 INTSPK_L1-3 L14 CHB2012U170_0805 2 INTSPK_L1 ** PVDD SHUTDOWN# PVDD SE/BTL# VDD PC-BEEP BYPASS HP/LINE# LOUTVOLUME ROUTLOUT+ LBYPASS ROUT+ RBYPASS LLINEIN RLINEIN GND LHPIN GND RHPIN GND GND CLK JP4 C774 5 4 1 @4.7U_0805_10V4Z C772 @0.047U_0402_16V4Z R508 2.2K_0402_5% 1 2 +AUD_VREF @6.8K_0402_5% MIC-1 1 2 L50 CHB2012U170_0805 33 MIC 2 2 R550 @6.8K_0402_5% @1_1206_5% 2 2 C765 @1U_0603_10V6K 2 C760 @1U_0603_10V6K 1 1 AMP_LEFT C758 1 @0.47U_0603_16V4Z AMP_RIGHT C300 1 @0.47U_0603_16V4Z U35 7 18 19 2INTSPK_R1-2 220U_6.3V_M 2INTSPK_L1-2 220U_6.3V_M 1 NBA_PLUG VOL_AMP R553 INTSPK_L1 1 1 C754 1 C287 2 2 INTSPK_R1 C766 @10U_0805_10V4Z 1 2 3 4 1 + 1 C770 @0.1U_0402_16V4Z + 3 C706 1 3 6 2 1 FOX_JA6033L-5S1-TR 220P_0402_50V7K 2 2 2 EC Beep 1 +AVDD_AC97 System Beep To AC97' Codec R131 10K_0402_5% 1 R561 @0.1U_0402_16V4Z C253 10U_0805_10V4Z 1 2 R112 560_0402_5% 2 M ONO_IN MONO_IN 33 0.01W _10KC_EVUTV2B19C14 +5VAMP R551 1 R127 2.4K_0402_5% R560 100K_0402_5% D S 22 SPKR R555 5.76K_0603_1% BTL MODE R522//R525=0.419K Vmax=0.201V , GAINmax=18db Vmin=5V, GAINmin=-80db 1 SE MODE Vmax=1.53V , GAINmax=-6db Vmin=5V, GAINmin=-80db S 2N7002_SOT23 1 2 R99 560_0402_5% R101 10K_0402_5% D14 Compal Electronics, Inc. Title PROPRIETARY NOTE 2 CH751H-40_SC76 2 A Q40 3 1 1 1U_0603_10V4Z 1 C163 1 2 *** Q41 2N7002_SOT23 2 G D NBA_PLUG 2 G 1 2 576_0603_1% 1 1 PCI Beep 3 1U_0603_10V4Z 1 1U_0603_10V4Z Q11 MMBT3904_SOT23 3 28 PCM_SPK# 2 C184 1 2 VR1 5 2 2 2 1 CardBus Beep 1 VOL_AMP C223 1 2 +5VAMP 4 1 R129 10K_0402_5% 2 1 R104 560_0402_5% C173 1U_0603_10V4Z C773 2 3 1 2 2 1 1 37,53 BEEP# 2 2.61K_0603_1% *** 2 1 2 Reserve for noise. B AMP & Audio Jack THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE CustomLongbeach 100 USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 星期六, 十一月 06, 2004 Date: C D E R ev 0.1 Sheet 34 of 53 14 O B IDE_SDD8 2 0_0402_5% INT_IRQ15 1 R303 2 SD_IRQ15 0_0402_5% 1 2 R283 100K_0402_5% +5VCD R274 INT _CD_R 1 R342 2 @0_0402_5% SD_D8 SD_D9 SD_D10 SD_D11 SD_D12 SD_D13 SD_D14 SD_D15 SD_SDDREQ SD_SDIOR# 1 2 C433 0.1U_0402_10V6K 4 2 3 CD_PLAY CD_PLAY 33,37,53 Q51 DTC124EK_SC59 Placea caps. near HDD CONN. 1 U44A O 3 2 1 C971 10U_0805_10V4Z 2 1 C974 10U_0805_10V4Z 2 C970 C963 1U_0603_10V4Z 0.1U_0402_16V4Z SW _IDE_SDCS1# G I 1 1000P_0402_50V7K 2 14 1 P 2 1 +5VCD +5VALW SN74LVC125APW LE_TSSOP14 7 2 W=80mils C434 1000P_0402_50V7K 12 1 2 C432 4.7U_0805_10V4Z 1 2 C884 C899 1U_0603_10V4Z 1 I R332 10K_0402_5% U44D O 11 2 13 SD_SDCS3# OE# 1 3 C994 10U_0805_10V4Z +5VAMP 2 R337 10K_0402_5% G_PCI_RST# 1 2 0.1U_0402_16V4Z 2 C443 4.7U_0805_10V4Z 1 2 C885 10U_0805_10V4Z 1 C896 1U_0603_10V4Z Place component's closely MODULE CONNECTOR. SW _IDE_SDCS3# ***U32 Close to CD-ROM Side 2 +3VS 2 PD_PDIORDY R325 4.7K_0402_5% 1 1 1 Q49 +5VCD C965 OE# SD_SDCS1# 23 IDE_SDIORDY 1 R320 2 0_0402_5% 1 R343 2 R653 10K_0402_5% 1 1U_0603_10V4Z +5VCD R662 4.7K_0402_5% 1 R623 R664 2 2 AOS 3401_SOT23 2 C917 1 2 +5VCD +3VALW 2N7002_SOT23 Q53 2 0_0402_5% +5VALWP SI3443BDV_TSOP6 1 2 R657 330K_0402_5% +5VALW G_PCI_RST# +3VS 1 R661 C920 0.1U_0402_16V4Z SUYIN_800180MB050S109ZL SN74LVC125APW LE_TSSOP14 23 IDE_PDIORDY C915 10U_0805_10V4Z +5VCD S 2 +5VCD G_PCI_RST# 2 G 1 6 5 2 1 4 1 SD_SDDACK# R287 100K_0402_5% 1 2 SD_SDA2 SW _IDE_SDCS3# Q50 80mil +5VALW R690 10K_0402_5% SB_PCI_RST# R666 10K_0402_5% INT_CD_R 33 1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 0.1U_0402_16V4Z C457 D SIDE_RST# 6 +5VCD 3 +5VCD 1 2 R313 8.2K_0402_5% +3VALW O Short when not support SWDJ +5VS 23 INT_IRQ15 I Net width should be 60mil wide SD_SDIOW # SD_SDIORDY SD_IRQ15 SD_SDA1 SD_SDA0 SW _IDE_SDCS1# SHDD_LED# SD_D8 1 R340 5 *27 SN74LVC08APW_TSSOP14 SN74LVC125APW LE_TSSOP14 JP28 2 SD_D9 8 SD_D10 7 SD_SDCS1# 6 SD_SDCS3# 5 0_1206_8P4R_5% SD_D11 8 SD_D12 7 SD_D13 6 SD_D14 5 0_1206_8P4R_5% SD_D15 8 SD_SDDREQ 7 SD_SDIOR# 6 SD_SDDACK# 5 0_1206_8P4R_5% 1 2 3 4 RP58 IDE_SDD11 1 IDE_SDD12 2 IDE_SDD13 3 IDE_SDD14 4 RP55 IDE_SDD15 1 IDE_SDDREQ 2 IDE_SDIOR# 3 IDE_SDDACK# 4 RP53 8 U44B 1 A 10 22 SIDERST# IDE_SDD[0..15] INT_CD_L CD_AGND SIDE_RST# SD_D7 SD_D6 SD_D5 SD_D4 SD_D3 SD_D2 SD_D1 SD_D0 33 INT_CD_L 33 CD_AGND 470_0805_5% 23 IDE_SDDREQ 23 IDE_SDIOR# 23 IDE_SDDACK# IDE_SDD9 IDE_SDD10 IDE_SDCS1# IDE_SDCS3# U41C G 23 IDE_SDCS1# 23 IDE_SDCS3# IDE_SDIOW # IDE_SDA1 IDE_SDA0 IDE_SDA2 P 7 9 S 23 IDE_SDIOW # 23 IDE_SDA1 23 IDE_SDA0 23 IDE_SDA2 G 14 7 PCMRST# 37,53 R617 @0_0402_5% +5VS D IDE_SDD3 IDE_SDD2 IDE_SDD1 IDE_SDD0 PIDE_RST# 2 0_0402_5% SN74LVC08APW_TSSOP14 +5VCD SD_D7 8 SD_D6 7 SD_D5 6 SD_D4 5 0_1206_8P4R_5% SD_D3 8 SD_D2 7 SD_D1 6 SD_D0 5 0_1206_8P4R_5% SD_SDIOW # 8 SD_SDA1 7 SD_SDA0 6 SD_SDA2 5 0_1206_8P4R_5% 1 2 3 4 RP59 1 2 3 4 RP57 1 2 3 4 RP54 R616 6 1 SN74LVC08APW_TSSOP14 R615 10K_0402_5% 1 IDE_SDD7 IDE_SDD6 IDE_SDD5 IDE_SDD4 B SB_PCI_RST# PD_PDA2 PD_PDCS3# 1 2 R676 8.2K_0402_5% 23 IDE_SDD[0..15] U41B O PCSEL 1 R669 2 470_0805_5% 2 PD_IRQ14 0_0402_5% 1 R675 P B 7 INT_IRQ14 O 2 A 22 PIDERST# ALLTOP_C17826-14401 23 INT_IRQ14 5 G R624 @0_0402_5% 4 3 OE# +5VS 2 100K_0402_5% PD_D8 PD_D9 PD_D10 PD_D11 PD_D12 PD_D13 PD_D14 PD_D15 U41A 2 +5VS 1 R691 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 A 1 37 PHDD_LED# 1 14 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 PD_PDDREQ PD_PDIOW # PD_PDIOR# PD_PDIORDY PD_PDDACK# PD_IRQ14 PD_PDA1 PD_PDA0 PD_PDCS1# SB_PCI_RST# 21 SB_PCI_RST# JP30 PIDE_RST# PD_D7 PD_D6 PD_D5 PD_D4 PD_D3 PD_D2 PD_D1 PD_D0 1 PD_PDCS3# 2 0_0402_5% 1 R685 23 IDE_PDD[0..15] 2 IDE_PDCS3# C825 +3VALW 0.1U_0402_16V4Z IDE_PDD[0..15] P 23 IDE_PDCS3# 33,37,53 EC_IDERST HDD CONNECTOR G 23 IDE_PDA1 23 IDE_PDA0 23 IDE_PDA2 23 IDE_PDCS1# PD_D7 5 PD_D8 6 PD_D6 7 PD_D9 8 0_1206_8P4R_5% PD_D5 5 PD_D10 6 PD_D4 7 PD_D11 8 0_1206_8P4R_5% PD_D3 5 PD_D12 6 PD_D2 7 PD_D13 8 0_1206_8P4R_5% PD_D1 5 PD_D14 6 PD_D0 7 PD_D15 8 0_1206_8P4R_5% PD_PDDREQ 5 PD_PDIOW # 6 PD_PDIOR# 7 PD_PDDACK# 8 0_1206_8P4R_5% PD_PDA1 5 PD_PDA0 6 PD_PDA2 7 PD_PDCS1# 8 0_1206_8P4R_5% 1 23 IDE_PDDREQ 23 IDE_PDIOW # 23 IDE_PDIOR# 23,25 IDE_PDDACK# 4 3 2 1 RP130 IDE_PDD5 4 IDE_PDD10 3 IDE_PDD4 2 IDE_PDD11 1 RP131 IDE_PDD3 4 IDE_PDD12 3 IDE_PDD2 2 IDE_PDD13 1 RP133 IDE_PDD1 4 IDE_PDD14 3 IDE_PDD0 2 IDE_PDD15 1 RP134 IDE_PDDREQ 4 IDE_PDIOW # 3 IDE_PDIOR# 2 IDE_PDDACK# 1 RP135 IDE_PDA1 4 IDE_PDA0 3 IDE_PDA2 2 IDE_PDCS1# 1 RP136 2 IDE_PDD7 IDE_PDD8 IDE_PDD6 IDE_PDD9 PD_D7 2 10K_0402_1% 2 R307 2 10K_0402_1% 1 5.6K_0603_1% SD_SDIORDY SD_D7 Compal Electronics, Inc. SD_SDDREQ Title PD_PDDREQ 1 5.6K_0603_1% IDE/ FDD MODULE CONN. Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六 , 十一月 06, 2004 Sheet 35 of 53 Keep 20 mils minimum spacing between USB signals and others signals +5VALW +USB_AS=60 mils USB CONNECTOR +USB_AS JP32 60 mils 1 + C525 @150U_D2_6.3VM 2 1 2 3 4 SYSON# 1 C515 0.1U_0402_16V4Z 2 +USB_AS U24 GND IN IN EN# 8 7 6 5 OUT OUT OUT FLG + 1 2 3 4 1 + C976 220U_6.3V_M 2 G528_SO8 ** 1 2 C982 C978 @150U_D2_6.3VM 0.1U_0402_16V4Z 1 2 3 4 TYCO_1470712-1 ** 1.4A 22 USBP0- USBP0- +5VALW 2 C977 @2.2P_0402_50V8C 1 1 R742 10K_0402_5% SYSON# D Q69 2N7002_SOT23 3 2 G 30,37,40,47,53 SYSON SYSON# ** 22 USBP0+ S USBP0+ C975 @2.2P_0402_50V8C +5VALW USB CONNECTOR +USB_BS=60 mils +USB_BS JP18 +USB_BS + + 2 G528_SO8 C566 220U_6.3V_M 2 C554 C557 @150U_D2_6.3VM 1 2 3 4 5 6 7 8 USBP4USBP4+ 22 USBP422 USBP4+ ** 0.1U_0402_16V4Z SUYIN_2553A-08G1T-D_8P C569 1.4A C568 @2.2P_0402_50V8C H9 H_C236D138 C546 H28 H_C236D138 H12 H_C236D138 H8 H_C236D138 H22 H_C236D138 @2.2P_0402_50V8C H19 H_C236D138 @2.2P_0402_50V8C H7 H_C236D138 1 H38 H_S315D157 H39 H_S315D157 H41 H_S315D157 H10 H_S315D157 1 1 H34 H_S315D157 1 1 H40 H_S315D157 1 1 H2 H_S315D157 1 1 H25 H_S315D157 1 1 H42 H_S315D157 1 1 H17 H_S315D157 1 1 1 H4 H_S315D157 H1 H_C276D142 H20 H_S315D157 1 1 H30 H_C94D94N H21 H_C94D94N H6 H_C94D94N 1 1 H27 H16 H15 H26 H13 H31 H_C197D197N H_C197D197N H_C197D197N H_C197D197N H_O142x63D142x63N H_O142x63D142x63N 1 1 H11 H_C94D94N 1 1 1 CF13 SMD40M80 1 H33 H_C236D236N 1 1 1 1 H35 H_C276D142 H3 H_C276D146 H23 H_C315D169 H32 H_C315D169 H18 H_C276D146 1 1 1 H36 H_C244D157 1 1 H24 H_C276D142 1 H14 H5 H_O362x244D276x157 H_O362x244D276x157 1 CF7 SMD40M80 1 CF10 SMD40M80 H29 H_C236D138 @2.2P_0402_50V8C CF8 SMD40M80 1 1 1 CF18 SMD40M80 1 1 1 CF15 SMD40M80 CF22 SMD40M80 H37 H_C94D94N H43 H_C40D40N H44 H_C40D40N 1 H45 H_C87D87N H46 H_C87D87N 1 1 1 FD6 FIDUCAL 1 FD3 FIDUCAL CF21 SMD40M80 1 1 1 CF2 SMD40M80 CF24 SMD40M80 1 FD5 FIDUCAL CF16 SMD40M80 1 1 1 CF1 SMD40M80 CF5 SMD40M80 1 FD2 FIDUCAL CF17 SMD40M80 1 1 1 CF20 SMD40M80 1 1 1 FD4 FIDUCAL CF23 SMD40M80 CF3 SMD40M80 1 1 FD1 FIDUCAL CF4 SMD40M80 CF14 SMD40M80 1 1 CF6 SMD40M80 CF11 SMD40M80 1 1 CF12 SMD40M80 CF19 SMD40M80 1 1 CF9 SMD40M80 C550 0.1U_0402_16V4Z 1 2 ** 8 7 6 5 1 2 SYSON# C591 OUT OUT OUT FLG 1 1 GND IN IN EN# USBP2USBP2+ 22 USBP222 USBP2+ 1 1 1 2 3 4 1 1 60 mils + C589 @150U_D2_6.3VM 1 U32 Compal Electronics, Inc. Title USB Conn. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一 ?06, 2004 Sheet 36 of 53 5 4 3 2 1 +3VALW +3VALW 2 For EC Tools 0.1U_0402_16V4Z 1 2 2 R650 150 151 173 152 138 139 140 141 144 145 146 147 124 125 126 127 128 131 132 133 143 142 135 134 130 129 121 120 113 112 104 103 108 105 21,28,39,53 SERIRQ 1 @33_0402_5% 38,53 FRD# 38,53 FW R# 38,53 FSEL# 2 +3VALW 1 R614 10K_0402_5% D36 1 40 RCIRRX EC_RCIRRX 2 CH751H-40_SC76 +3VALW 2 C 1 R644 10K_0402_5% 26,31,53 WLANPME# EC_PME# 26,31,53 LAN_PME# EC_PME# 26,31,53 +3VALW +3VALW 2 R576 RP118 8 PSCLK1 7 PSDATA1 6 PSCLK2 5 PSDATA2 10K_1206_8P4R_5% 1 2 3 4 38,53 TP_CLK 38,53 TP_DATA +3VALW RP119 1 2 3 4 38,44,53 38,44,53 5,33,53 5,33,53 MODE# 8 FR D# 7 SELIO# 6 FSEL# 5 100K_1206_8P4R_5% 1 R750 1 R751 EC_SMB_CK1 2 4.7K_0402_5% EC_SMB_DA1 2 4.7K_0402_5% ** 1 R752 1 R753 B EC_SMB_CK2 2 1.5K_0402_1% EC_SMB_DA2 2 1.5K_0402_1% C1000 @100P_0402_50V8J 1 1 2 2 C1001 @100P_0402_50V8J C909 2 2 ENBKL 100K_0402_5% 1 R655 0.1U_0402_16V4Z 1 2 R651 EC_SCI# EC_URXD EC_UTXD ENBKL BKOFF# FSTCHG EC_SMI# LID_SW# MODE# SYS ON SUSP# VR_ON EC_USCLK PBTN_OUT# PADS_LED# CAPS_LED# NUM_LED# 53 PADS_LED# 53 CAPS_LED# 53 NUM_LED# 35 PHDD_LED# 1 47K_0402_5% 22,53 GATEA20 22,53 KBRST# 110 111 114 115 116 117 163 164 169 170 8 20 21 22 27 28 48 62 63 69 70 75 109 118 119 148 149 155 156 162 168 55 54 23 41 19 5 6 31 PSCLK1 PSDAT1 PSCLK2 PSDAT2 PS2 PSCLK3 PSDAT3 SCL1 SDA1 SCL2 SDA2 GPIO04 GPIO07 GPIO08 GPIO09 GPIO0D GPIO0E GPIO10 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO2A GPIO2B GPIO2D Interface GPOK0/KSO0 GPOK1/KSO1 GPOK2/KSO2 GPOK3/KSO3 GPOK4/KSO4 GPOK5/KSO5 GPOK6/KSO6 GPOK7/KSO7 GPOK8/KSO8 GPOK9/KSO9 GPOK10/KSO10 GPOK11/KSO11 GPOK12/KSO12 GPOK13/KSO13 GPOK14/KSO14 GPOK15/KSO15 GPOK16/KSO16 GPOK17/KSO17 GPIK0/KSI0 GPIK1/KSI1 GPIK2/KSI2 GPIK3/KSI3 GPIK4/KSI4 GPIK5/KSI5 GPIK6/KSI6 GPIK7/KSI7 GPOW0/PWM0 GPOW1/PWM1 FAN2PWM/GPOW2/PWM2 GPOW3/PWM3 Width GPOW4/PWM4 GPOW5/PWM5 GPOW6/PWM6 FAN1PWM/GPOW7/PWM7 Pulse Wake Up GPWU0 GPWU1 GPWU2 GPWU3 Pin GPWU4 GPWU5 TIN1/GPWU6 TIN2/FANFB2/GPWU7 SMBus Digital To Analog GPIAD0/AD0 GPIAD1/AD1 GPIAD2/AD2 GPIAD3/AD3 GPIAD4/AD4 GPIAD5/AD5 GPIAD6/AD6 GPIAD7/AD7 GPODA0/DA0 GPODA1/DA1 GPODA2/DA2 GPODA3/DA3 GPODA4/DA4 GPODA5/DA5 GPODA6/DA6 GPODA7/DA7 * GPIO18/XIO8CS# * GPIO19/XIO9CS# * GPIO1A/XIOACS# * GPIO1B/XIOBCS# Expanded I/O * GPIO1C/XIOCCS# * GPIO1D/XIODCS# * GPIO1E/XIOECS# * GPIO1F/XIOFCS# GPIO2E/TOUT1/FANFB1 DPLL_TP/GPIO06/FANFB3 FANTEST_TP/GPIO05/FAN3PWM Timer Pin TOUT2/GPIO2F FnLock#/GPIO12 * CapLock#/GPIO011 * NumLock#/GPIO0A * ScrollLock#/GPIO0F * MISC ECRST# GA20/GPIO02 KBRST#/GPIO03 ECSCI# 2 C859 1U_0603_10V4Z E51IT0/GPIO00 E51IT1/GPIO01 E51RXD/GPIO21/ISPCLK E51TXD/GPIO22/ISPDAT XCLKI XCLKO 49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68 153 154 71 72 73 74 77 78 79 80 32 33 36 37 38 39 40 43 2 26 29 30 44 76 172 176 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 INVT_PWM BEEP# PW R_SUSP_LED ACOFF EC_ON EC_LID_OUT# C RY1 1 R628 2 C RY2 @20M_0603_5% 2 1 R578 TP_DATA 1 R577 R567 100K_0402_5% X8 2 10P_0402_50V8J 1 4 OUT IN 1 C837 NC 2 NC 2 1 3 1 Rb 10P_0402_50V8J R570 0.1U_0402_16V4Z 2 AD_BID0 1 C785 2 C826 1 Ra 0_0402_5% A INVT_PWM 19,53 BEEP# 34,53 PW R_SUSP_LED 38,39,53 ACOFF 45,53 KBA4 KBA5 1 R581 1 R580 1 R579 D EC_RCIRRX EC_PME# FAN_SPEED2 BATT_TEMP 99 100 101 102 1 42 47 174 DAC_BRIG EN_DFAN2# I REF EN_DFAN1# CD _PLAY BATT_OVP ALI/MH# AD_BID0 PW R_LED# HDD_LED# BATT_LOW_LED# BATT_CHGI_LED# NUM_LED# PADS_LED# CAPS_LED# 1 C1003 1 C1004 1 C1005 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J KSO15 KSO14 KSO10 KSO11 1 C1006 1 C1007 1 C1008 1 C1009 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J KSO8 KSO9 KSO13 KSI7 1 C1010 1 C1011 1 C1012 1 C1013 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J KSO3 KSO7 KSO12 KSI4 1 C1014 1 C1015 1 C1016 1 C1017 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J KSI6 KSI5 KSO6 KSO5 1 C1018 1 C1019 1 C1020 1 C1021 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J KSI3 KSI0 KSO0 KSO1 1 C1022 1 C1023 1 C1024 1 C1025 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J KSI1 KSI2 KSO2 KSO4 1 C1026 1 C1027 1 C1028 1 C1029 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J 2 100P_0402_50V8J +3VALW R652 10K_0402_5% EC_ON 39,40,53 EC_LID_OUT# 22,53 D38 2 KILL_SW# 31,39,53 PM_SLP_S3# 22,53 PM_SLP_S5# 22,53 1 A CIN 38,43 E CAGND 2 1 C796 0.01U_0402_16V7K BATT_TEMPA 44,53 BATT_OVP 45,53 ALI/MH# 44,53 AD_BID0 53 1 R565 DAC_BRIG 19,53 EN_DFAN2 41,53 IREF 45,53 EN_DFAN1 41,53 CD_PLAY 33,35,53 EC_RCRST# 40 EC_RCVEN 40 CIR_GATING# 40 2 100K_0402_5% 1 2 C783 0.22U_0603_16V4Z ADP_I 45,49,53 PW R_LED# 38,39,53 WL_BT_LED# 39 HDD_LED# 39 BATT_LOW_LED# 38,53 BATT_CHGI_LED# 38,53 SW DJ_LED# 39 B (ACES_85201-2405_24P) KEYBOARD CONN. JP10 171 12 11 175 3 4 106 107 158 160 FAN_SPEED1 FAN_SPEED1 41,53 1 2 R649 1K_0402_5% 1 2 R648 1K_0402_5% EC_THRM# EC_THRM# 22,53 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 EC_RSMRST# 22,40,53 E51_RXD E51_TXD C RY2 R625 1 C RY1 C CH751H-40_SC76 ACINL 53 FAN_SPEED2 41,53 E51_RXD 53 E51_TXD 53 2 @0_0402_5% RTC_CLK RTC_CLK 21,25 KB910Q B4_LQFP176 2 4.7K_0402_5% 2 4.7K_0402_5% +3VALW KBA1 E51_RXD E51_TXD 38,53 38,53 38,53 38,53 53 53 53 53 +5VS TP_CLK +3VALW KSO17 38,53 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 ON/OFF 39,53 KILL_SW# 81 82 83 84 87 88 89 90 85 86 91 92 93 94 97 98 KSO0 53 KSO1 53 KSO2 53 KSO3 53 KSO4 53 KSO5 53 KSO6 53 KSO7 53 KSO8 53 KSO9 53 KSO10 53 KSO11 53 KSO12 53 KSO13 53 KSO14 53 KSO15 53 Analog Board ID definition, Please see page 3. +3VALW 1 2 3 4 5 6 7 8 9 10 @96212-1011S Analog To Digital GPIO 1 2 159 95 0.1U_0402_16V4Z 17 35 46 122 137 167 +3VALW EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 34 EC_EAPD 22,53 EC_SCI# 40 EC_URXD 40 EC_UTXD 8,53 ENBKL 19,53 BKOFF# 45,53 FSTCHG 22,53 EC_SMI# 33,35,53 EC_IDERST 31,53 W L_OFF# 22,53 EC_SW I# 40 S4_LATCH 40 S4_SATA 39,53 LID_SW# 38,53 MODE# 30,36,40,47,53 SYSON 30,33,38,42,47,53 SUSP# 50,53 VR_ON 35,53 PCMRST# 40 EC_USCLK 22,53 PBTN_OUT# +5VALW 1 100K_0402_5% PSCLK1 PSDATA1 PSCLK2 PSDATA2 TP_CLK TP_DATA RD# WR# MEMCS# IOCS# D0 D1 D2 D3 D4 D5 D6 D7 A0 A1/XIOP_TP A2 A3 A4/DMRP_TP A5/EMWB_TP A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20/GPIO23 E51CS#/GPIO20/ISPEN 1 0.1U_0402_16V4Z 1 1 C908 @22P_0402_25V8K ENE-KB910-B4 FR D# F W R# FSEL# SELIO# ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19 21,25,53 CLK_PCI_LPC 2 LAD0 LAD1 LAD2 LAD3 LFRAME# LPC Interface LRST#/GPIO2C LCLK SERIRQ CLKRUN#/GPIO0C * LPCPD#/GPIO0B * C846 2 GND GND GND GND GND GND 15 14 13 10 9 165 18 7 25 24 X-BUS Interface LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 VCC VCC VCC VCC VCC VCC VCC U40 21,39,53 LPC_AD0 21,39,53 LPC_AD1 21,39,53 LPC_AD2 21,39,53 LPC_AD3 21,39,53 LPC_FRAME# 21,26,28,31,32,39,42,53 PCIRST# VCCA 16 34 45 123 136 157 166 D 1 2 3 4 5 6 7 8 9 10 1 C786 FBM-L11-160808-800LMT_0603 BATGND 2 2 0.1U_0402_16V4Z JP23 1 C795 1000P_0402_50V7K Internal Keyboard 2 2 0.1U_0402_16V4Z E CAGND 2 C800 1000P_0402_50V7K 1 1 ECA GND L56 1 C894 161 C893 1 2 2 FBM-L11-160808-800LMT_0603 96 0.1U_0402_16V4Z 1 1 C868 1 C787 ADB[0..7] 38,53 VCCBAT ADB [0..7] R643 0_0805_5% L57 2 KBA[0..19] 38,53 AGND KBA[0..19] +3VS NUM_LED# PADS_LED# CAPS_LED# R334 300_0402_5% 1 2 KSO15 KSO14 KSO10 KSO11 KSO8 KSO9 KSO13 KSI7 KSO3 KSO7 KSO12 KSI4 KSI6 KSI5 KSO6 KSO5 KSI3 KSI0 KSO0 KSO1 KSI1 KSI2 KSO2 KSO4 R336 300_0402_5% 1 2 +3VS A R335 1 300_0402_5% 2 +3VS 6278-34P-KBCON 2 1K_0402_5% 2 1K_0402_5% 2 1K_0402_5% Compal Electronics, Inc. Title PROPRIETARY NOTE 32.768KHZ_12.5P_1TJS125DJ2A073 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. ENE-KB910 Size Document Number Custom 5 4 3 2 R ev 0.1 Longbeach 100 Date: 星期六 , 十一月 06, 2004 Sheet 1 37 of 53 Direct CD button +5VALW C801 0.1U_0402_16V4Z 2 1 SUSP# 30,33,37,42,47,53 5 INB 1 2 O INA TC7SH32FU_SSOP5~D AT24C16AN-10SI-2.7_SO8 1 3 EC_FLASH# 22 Q43 2N7002_SOT23 1 4 S FWE# 2 2 1 2 3 4 A0 A1 A2 GND D VCC WP SCL SDA 3 8 7 6 5 37,44,53 EC_SMB_CK1 37,44,53 EC_SMB_DA1 U38 P 100K_0402_5% U42 R609 100K_0402_5% 2 G R647 G C881 2 0.1U_0402_16V4Z 1 1 1 +5VALW +3VALW +3VALW D10 1 FW R# 37,53 2 R658 @V-PORT-0603-220 M-V05_0603 2 100K_0402_5% D12 2 1 3 51ON# 39,43 2 MODE# 37,53 1 3 5 4 CHN202U_SC70 SW2 TC010-PS11CET_5P Touch Pad Connector ** JP7 TP_CLK TP_DATA AC IN PW R_LED# PW R_SUSP_LED BATT_CHGI_LED# BATT_LOW_LED# CP8 1 2 3 4 100P_1206_8P4C_50V8 8 7 6 5 CP9 RCIRRX_E 1 BATT_LOW_LED# 2 BATT_CHGI_LED# 3 PW R_SUSP_LED 4 100P_1206_8P4C_50V8 8 7 6 5 PW R_LED# AC IN TP_DATA TP_CLK 12 11 10 9 8 7 6 5 4 3 2 1 +5VALW 1 C836 0.1U_0402_16V4Z 2 +5V_CIR 1 2 1000P_0402_50V7K C849 1000P_0402_50V7K C844 1 2 REV BTN +5VS 2 37,53 KSO17 ACES_85201-1205 C835 1 2 1 4 2 KSI2 3 1 5 1000P_0402_50V7K KSO17 C848 0.1U_0402_16V4Z SW8 TC010-PS11CET_5P KSI2 37,53 D15 2 1 3 @PSOT24C_SOT23 FRD BTN 1 4 3 5 2 KSI3 KSI3 37,53 SW7 TC010-PS11CET_5P 1MB Flash ROM KBA[0..19] ADB[0..7] 37,53 KBA[0..19] 37,53 ADB[0..7] +3VALW U45 PLAY BTN 1MB BIOS Connector 2 21 20 19 18 17 16 15 14 8 7 36 6 5 4 3 2 1 40 13 37 A0 VCC0 A1 VCC1 A2 A3 A4 D0 A5 D1 A6 D2 A7 D3 A8 D4 A9 D5 A10 D6 A11 D7 A12 A13 A14 RP# A15 NC A16 READY/BUSY# A17 NC0 A18 NC1 A19 FSEL# FR D# FWE# 22 24 9 CE# OE# WE# GND0 GND1 SST39VF080-70_TSOP40 31 30 25 26 27 28 32 33 34 35 10 11 12 29 38 23 39 1 ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 1 2 R679 100K_0402_5% 2 ** C949 JP27 0.1U_0402_16V4Z KBA16 KBA15 KBA14 KBA13 KBA12 KBA11 KBA9 KBA8 FWE# +3VALW KBA18 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 1 4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 KSI0 3 5 KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19 KBA17 KSI0 37,53 SW5 TC010-PS11CET_5P D13 KBA19 KBA10 ADB7 ADB6 ADB5 ADB4 2 1 3 1 ADB3 ADB2 ADB1 ADB0 FR D# FSEL# KBA0 @PSOT24C_SOT23 STOP BTN 2 +3VALW 2 C828 0.1U_0402_16V4Z 1 4 KSI1 3 5 37,53 TP_CLK 37,53 TP_DATA +5VS +5VALW +3VALW 37,43 A CIN 37,39,53 PW R_LED# 37,39,53 PW R_SUSP_LED 37,53 BATT_CHGI_LED# 37,53 BATT_LOW_LED# KSI1 37,53 SW6 TC010-PS11CET_5P F RD# 37,53 FSEL# 37,53 @SUYIN_80065AR-040G2T Compal Electronics, Inc. Title BIOS & EXT. I/O PORT THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet 38 of 53 5 4 3 2 1 SWDJ LED HDD LED Wireless LED +5VALW SD LED +5VS R445 C780 300_0402_5% 0.01U_0402_16V7K 2 2 D D31 HT-110UYG-CT_YEL/GRN 2 HT-191UYG-DT_GRN_0603 D17 SW DJ_LED# D S Q39 2N7002_SOT23 2 G 28,29 5IN1_LED W L_BT_LED# 37 W L_BT_LED# 1 37 SW DJ_LED# 2 HDD_LED# 37 HDD_LED# 3 1 1 HT-110UD_1204 D28 1 1 HT-191UYG-DT_GRN_0603 D16 300_0402_5% 2 300_0402_5% 2 2 1 1 300_0402_5% D R569 1 2 R159 R162 1 2 1 +5VS 2 +5VS 1 R568 10K_0402_5% POWER LED +5VALW 1 +5VALW LPC Debug Port 1 R43 +3VALW 300_0402_5% 2 SW4 3 3 2 2 1 1 R73 100K_0402_5% JP8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 KILL_SW# 31,37,53 1 1 3 1 1 HT-191UD_AMBER_0603 S 1BS003-1211L_3P Q5 2N7002_SOT23 2 G 37,38,53 PW R_SUSP_LED C CLK_PCI8 D7 HT-191NB_BLUE_0603 D +3VALW PW R_LED# *** PW R_LED# 37,38,53 2 D6 +5VALW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 R630 @22_0402_5% CLK_SIO_14M_ 1 LPC_AD0 R632 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ1# PCIRST# CLK_PCI_SIO_33M SERIRQ 1 22 2 2 C Kill SWITCH 300_0402_5% 2 CLK_14M 13 @0_0402_5% LPC_AD0 21,37,53 LPC_AD1 21,37,53 LPC_AD2 21,37,53 LPC_AD3 21,37,53 LPC_FRAME# 21,37,53 LPC_DRQ1# 21 PCIRST# 21,26,28,31,32,37,42,53 1 SERIRQ 21,28,37,53 C843 1 2 2 R631 @0_0402_5% @10P_0402_50V8J R42 CLK_PCI8 21,25 @ACES_85201-2005 Power Button ON/OFFBTN# 40 B B D8 2 RTCVREF 1 LID Switch R77 100K_0402_5% 2 2 3 RTCVREF R84 @100K_0402_5% +3VALW 3 1 51ON# 38,43 37,53 LID_SW # CHN202U_SC70 SW3 TC010-PS11CET_5P 1000P_0402_50V7K LID_SW # CHN202U_SC70 D25 40 S4_LID_SW# 3 4 ESE11MV9_4P D27 1@CH751H-40_SC76 2 37,40,53 EC_ON EC_ON 1 A 1 2 *** R92 4.7K_0402_5% 2 2 2 2 1 3 D11 MMGZ5248B_LL34 SW1 1 D26 2 1 C124 +3VALW R420 100K_0402_5% 40 CIR_LID_SW # 1 5 2 51ON# 2 R421 @100K_0402_5% 2 4 ON/OFF 37,53 1 2 @0_0402_5% D9 3 1 1 1 R68 2 1 1 @PSOT24C_SOT23 1 +3VALW @V-PORT-0603-220 M-V05_0603 A 1 R81 2 2 33K_0603_1% 1 2N7002_SOT23 Q9 DTC124EK_SC59 3 Q8 D Compal Electronics, Inc. 2 G Title Switchs & Connectors 3 S THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet 1 39 of 53 5 4 3 2 1 Q55 @AOS 3401_SOT23 3 +5V_CIR 1 +5VALW 2 2 1 2 C973 @1U_0603_10V4Z 1 2 R699 @100K_0402_5% R692 1 R695 P2 D 1 1 2 R694 @100K_0402_5% 2 22,37,53 EC_RSMRST# G 1 3 D IN FB TAP ERR# P2 Q61 @2N7002_SOT23 S Q60 @2N7002_SOT23 3 2 @10K_0402_5% OUT SNS SHDN GND 8 7 6 5 @MIC2951_SO8 D 2 G P2 @2N7002_SOT23 1 2 3 4 2 @100K_0402_5% 39 CIR_LID_SW# CIR_UTXD 1 S 1 R393 +3VALW @10K_0402_5% 3 3 Q54 2 @10K_0402_5% U46 1 EC_UTXD 37 EC_UTXD @10K_0402_5% R701 1 2 2 2 @10K_0402_5% G 1 R688 +3VALW 1 R698 Q58 @DTC124EK_SC59 D 2 D C961 @1U_0603_10V4Z 2 @1U_0603_10V4Z +5V_CIR 1 +3VALW EC_ON 37,39,53 1 C964 2 1 S D23 CIR_URXD @CH751H-40_SC76 2 @10P_0402_50V8K D22 3 @4MHZ_30PF_6W04000042 CIR_USCLK 1 @CH751H-40_SC76 1 C984 2 @10P_0402_50V8K @0.1U_0402_16V4Z 1 R709 2 @0_0402_5% CIR_RCRST# C980 RCIRRX 37 RCIRRX 2 20 19 18 17 P10 P11 P12/CNTR P13/INT 16 15 14 13 CIR_UTXD D0 D1 12 11 CIR_URXD CIR_USCLK 1 R708 @1M_0603_5% C 1 1 R716 2 @0_0402_5% 2 1 R715 @10K_0402_5% C IR_RCVEN CIR_UTXD P00 P01 P02 P03 XIN +5V_CIR ON/OFFBTN# 39 2 2 3 R710 2 EC_USCLK 37 EC_USCLK 2 +5V_CIR @10K_0402_5% +5V_CIR 1 XOUT 6 RESET# 7 8 P21/AIN1 P20/AIN0 9 10 D3/K D2/C CNVSS 5 1 VDD VSS 2 RC_ON/OFFBTN D S Q63 @2N7002_SOT23 2 G C +5V_CIR 2 @0_0402_5% C988 @M34506M4-XXXFP_SOP20 1 2 @0.1U_0402_16V4Z Q66 @DTC124EK_SC59 2 1 2 C987 4 1 X9 1 R717 U48 1 1 C985 2 @10K_0402_5% 1 1 R391 +3VALW 3 1 1 37 EC_URXD 2 @1U_0603_10V4Z EC_URXD 3 R713 @47K_0402_5% 2 Battery mode Hibernation *** R693 R696 1 D40 C967 1 R697 ON/OFFBTN# 39 RP137 3 S 1 A 4 1 2 R703 @10K_0402_5% @NC7SZ14M5X_SOT23-5 S Q57 @2N7002_SOT23 CIR_GATING# D R671 1 2 @10K_0402_5% 2 1 2 A 37 S4_SATA 1 2 R663 100K_0402_1% C940 @1U_0603_10V6K CD1# D1 CP1 SD1# Q1 Q1# GND VCC CD2# D2 CP2 SD2# Q2 Q2# 14 13 12 11 10 09 08 RTCVREF @0.1U_0402_10V6K 1 2 C966 3 Q22 R389 R396 @10K_0402_5% @10K_0402_5% 1 CIR_RCRST# 37 EC_RCVEN @MMBT3904_SOT23 3 Q23 1 C IR_RCVEN @MMBT3904_SOT23 A @74LCX74MTC_TSSOP14 Q52 D39 2 37 EC_RCRST# 1 D_SET_S4 @CH751H-40_SC76 2 G @2N7002_SOT23 1 1 R686 @10K_0402_5% U43 D 1 3 37 S4_LATCH RTCVREF 1 2 C939 @1U_0603_10V4Z 1 2 3 4 5 6 7 CIR_GATING# 2 2 1 2 R687 @10K_0402_5% 2 2 3 Q59 S @2N7002_SOT23 RTCVREF 37 CIR_GATING# 1 2 G 30,36,37,47,53 SYSON 1 1 2 G +3VALW B Q56 @2N7002_SOT23 2 G Y 3 1 D D P 2 G 2 U47 3 5 2 2 @1N4148_SOT23 1 C968 @1U_0603_10V6K 39 S4_LID_SW# @0.1U_0402_10V6K 2 +5V_CIR @10K_1206_8P4R_5% C IR_RCVEN 5 4 CIR_RCRST# 6 3 CIR_URXD 7 2 CIR_USCLK 8 1 @100K_0402_5% @680K_0402_5% 2 @100K_0402_5% 2 B RTCVREF 1 RTCVREF 1 1 RTCVREF S 2 C960 @220P_0402_50V7K Compal Electronics, Inc. Title CIR & MDC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Size Document Number CustomLongbeach 100 Date: R ev 0.1 星期六, 十一月 06, 2004 Sheet 1 40 of 53 B C +12VALW 8 C791 0.1U_0402_16V4Z 1 2 U36A 1 2 -IN C OUT 1 EN_FAN1 1 2 R563100_0402_1% 2 LM358A_SO8 1 C778 FAN1 0.1U_0402_16V4Z 1 1N4148_SOT23 +3VS 1 R552 +12VALW FAN CONN. 2 2 10K_0402_5% 2 0_0402_5% 37,53 FAN_SPEED1 1 2 3 ACES_85205-0300 1000P_0402_50V7K 2 1 R562 C790 0.1U_0402_16V4Z JP22 C764 2 1000P_0402_50V7K 1 C761 2 2 8.2K_0402_5% +5VALW U36B 1 6 -IN C OUT R574 10K_0402_5% 7 EN_FAN2 1 2 R575100_0402_1% 2 LM358A_SO8 FMMT619_SOT23D18 C769 FAN2 1 D32 1N4148_SOT23 2 8.2K_0402_5% 2 1 R571 37,53 FAN_SPEED2 MDC CONN. 2 10K_0402_5% 2 0_0402_5% 2 1 R170 1 2 3 ACES_85205-0300 C336 1000P_0402_50V7K JP6 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 3 +3VALWR558 1 +3VS 22,25,33 AC_SDOUT 22,33 AC_RST# 1 R169 JP25 C339 2 1000P_0402_50V7K 1 +3VS 2 CH355_SC76 E 0.1U_0402_16V4Z C341 10U_0805_10V4Z 2 Q36 1 1 2 B 1 +IN 2 5 2 1 1 EN_DFAN2 3 37,53 EN_DFAN2 2 1 CH355_SC76 E D30 1 R594 C781 10U_0805_10V4Z 2 Q38 1 4 R572 10K_0402_5% 2 B FMMT619_SOT23D33 3 1 +IN G 2 3 1 P EN_DFAN1 37,53 EN_DFAN1 1 E +5VALW 1 FAN CONN. 1 D 2 A 2 +3V_MDC 0_0402_5% 1 R564 2 MDC_SDOUT 122_0402_5% 2 MDC_RST# R566 22_0402_5% 1 L55 2 +3VS_MDC CHB1608B121_0603 MONO_OUT/PC_BEEP AUDIO_PWDN AGND MONO_PHONE AUXA_RIGHT RESERVED AUXA_LEFT GND CD_GND +5V CD_RIGHT RESERVED CD_LEFT RESERVED GND RESERVED 3.3Vaux RESERVED GND RESERVED 3.3Vmain AC97_SYNC AC97_SDATA_OUT AC97_SDATA_IN1 AC97_RESET# AC97_SDATA_IN0 GND GND AC97_MSTRCLK AC97_BITCLK 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 3 +5VS_MDC L16 1 2 CHB1608B121_0603 2 R164 1 10K_0402_5% MDC_SYNC 1 2 R168 0_0402_5% MDC_SDIN1 MDC_BITCLK QTC_C104A-030F030P28 1 2 +5VS +3VS 1 R166 2 22_0402_5% 1 2 C306 220P_0402_50V7K AC_SYNC 22,33 1 R171 2 22_0402_5% AC_SDIN1 22 1 R173 2 22_0402_5% AC_BITCLK 22,33 +3VS_MDC +3V_MDC 1 2 +5VS_MDC 1 C771 1U_0603_10V4Z 2 1 C777 1U_0603_10V4Z 2 C310 1U_0603_10V4Z C338 @15P_0402_50V8J 4 4 Compal Electronics, Inc. Title FAN & MDC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Size Document Number R ev 0.1 Longbeach 100 Date: 星期六, 十一月 06, 2004 Sheet E 41 of 53 A B +1.8VALW TO +1.8VS C D E +2.5V TO +2.5VS ** +2.5V +2.5VS Port 80 Debug Card Connector 4.7U_0805_10V4Z SUSP 2 G Q45 2N7002_SOT23 2 G Q44 S CLK_PCI_MINI2 1 S 2N7002_SOT23 2 1 1 D 3 S 2 G Q37 R745 @33_0402 +5VALW TO +5VS 21,25,32 CLK_PCI_MINI2 +5VS 21,26,28,31,32,37,39,53 PCIRST# 21,26,28,31,32 PCI_FRAME# 21,26,28,31,32 PCI_TRDY# 21,26,28,31,32 PCI_AD9 2 D SUSP 2 G Q35 2N7002_SOT23 C763 +5VALW +5VS C999 4.7U_0805_10V4Z Q64 2 1 2 R711 1U_0603_10V4Z 1 R707 2 +12VALW 6.8K_0402_5% D 2 SUSP 2 G Q62 2N7002_SOT23 C979 S CLK_PCI_MINI2 PCIRST# @10PF_0402 2 2 1 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 @ HEADER 20 1 1 C986 C983 3 S S S G SI4800BDY_SO8 1 4.7U_0805_10V4Z 2 D D D D 1 2 3 4 0.1U_0402_16V7K 8 7 6 5 1 C981 JP33 2 G Q65 D S 2N7002_SOT23 S +12VALW D 2 ** 21,26,28,31,32 PCI_C/BE#0 21,26,28,31,32 PCI_AD6 21,26,28,31,32 PCI_AD4 21,26,28,31,32 PCI_AD2 21,26,28,31,32 PCI_AD0 21,26,28,31,32 PCI_AD1 21,26,28,31,32 PCI_AD3 21,26,28,31,32 PCI_AD5 21,26,28,31,32 PCI_AD7 21,26,28,31,32 PCI_AD8 21,26,28,31,32 PCI_C/BE#1 21,26,28,31,32 PCI_C/BE#2 21,26,28,31,32 PCI_C/BE#3 470_0805_5% C784 2 2 100K_0402_1% R540 1 D 1 2 1U_0603_10V4Z 1 R554 2 +12VALW 100K_0402_1% 1 1 1 1U_0603_10V4Z R573 1 R607 1 2 2 1 C792 C779 2 3 SI4800BDY_SO8 1 C782 2 1 2 3 4 S S S G 0.1U_0402_16V7K 4.7U_0805_10V4Z D D D D C767 2 C757 2 3 Q42 8 7 6 5 1 470_0805_5% 1 1 2 3 4 1 4.7U_0805_10V4Z @SI4800BDY_SO8 C759 S S S G SI4800BDY_SO8 1 4.7U_0805_10V4Z 1 2 3 4 S S S G 3 D D D D 2N7002_SOT23 8 7 6 5 1 D D D D 1 470_0805_5% Q34 8 7 6 5 1 3 +1.8VS ### Q79 0.1U_0402_16V7K +1.8VALW 2 +3VALW TO +3VS +3VALW 2 +5VALWP +3VS 4.7U_0805_10V4Z 1 D C478 S SUSP 2 G Q21 2N7002_SOT23 2 G Q18 3 2 D S 1 1 SUSP 33,48,49 SUSP D 3 1 +12VALW 1 S Q67 2N7002_SOT23 2 G 30,33,37,38,47,53 SUSP# 2 1U_0603_10V4Z 1 R377 2 68K_0402_1% R341 R712 10K_0402_5% 1 2 2 1 C487 2 2 3 SI4800BDY_SO8 1 C469 470_0805_5% C472 1 2 3 4 S S S G 0.1U_0402_16V7K 4.7U_0805_10V4Z 3 D D D D R714 10K_0402_5% 1 2N7002_SOT23 Q19 8 7 6 5 1 3 +1.5VS ** S 1 C1044 2 1 C1045 10U_0805_10V4Z 2 10U_0805_10V4Z 10U_0805_10V4Z 1 C1043 2 10U_0805_10V4Z 2 2 SUSP G Q10 2N7002_SOT23 1 D 2 SUSP G Q48 1 C1042 1 S 470_0805_5% 2 D 2 R432 470_0805_5% 1 1 R103 D S 3 3 S SUSP 2 G Q27 R637 3 D 3 1 R444 1 1 @470_0805_5% 1 2 +1.25VS @2N7002_SOT23 4 2N7002_SOT23 470_0805_5% 1 2 +1.2VS C1041 10U_0805_10V4Z 2 +VGA_CORE 4 2 SUSP G Q26 2N7002_SOT23 Compal Electronics, Inc. Title POWER CONTROL CKT PROPRIETARY NOTE A B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND Size Document Number TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D CustomLongbeach 100 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 星期六, 十一月 06, 2004 Date: C D R ev 0.1 Sheet E 42 of 53 A B C D VS V IN PR1 1M_0402_1% 1 2 V IN VS PR2 84.5K_0402_1% 2 8 + 2 - 1 P ACIN 1 4 LM393M_SO8 PC6 0.1U_0402_16V7K P ACIN 45,46 PR7 10K_0402_5% 2 2 PD2 RLZ4.3B_LL34 2 1 PR8 10K_0402_5% Vin Detector RTCVREF 3.3V High 18.384 Low 17.728 2 V IN A C IN 37,38 PU1A O 1 PR6 20K_0402_1% 2 1 PC5 1000P_0402_50V7K 2 SINGA_2DC-G213-B20 3 1 PR5 22K_0402_1% 1 2 PC4 100P_0402_50V8J P PC3 1000P_0402_50V7K PR4 1K_0402_5% 1 2 G 1 2 PR3 5.6K_0402_5% 1 PC2 100P_0402_50V8J 2 PC1 1000P_0402_50V7K 1 1 2 1 2 2 G G G G 2 6 5 4 3 1 2 1 1 1 DC_IN_S2 2 15A_65VDC_451015 PJP1 2 1 1 PF1 DC_IN_S1 1 PL1 C8B BPH 853025_2P 1 2 17.901 17.835 17.25 16.976 PD3 1N4148_SOD80 1 N1 3 2 1 2 1 PC7 0.22U_1206_25V7K VIN PC8 0.1U_0603_25V7K PR12 1K_1206_5% 1 2 N3 1 38,39 51ON# 2 1 PR14 22K_0402_1% PR16 200_0603_5% VL N2 2 PC13 1000P_0402_50V7K 1 PR23 499K_0402_1% PR24 66.5K_0402_1% PC11 1000P_0402_50V7K 3 2 2 3 - PR22 34K_0402_1% 2 1 VL 2 PC12 1000P_0402_50V7K 5 6 2 LM393M_SO8 RB715F_SOT323 + O 1 45 ACON 3 PU1B 7 1 1 2 1 PD7 5,44,46 MAINPWON 8 PD6 RLZ16B_LL34 PC9 1U_0805_25V4Z 2 1 2 GND 2 2 PC10 10U_0805_10V4Z P 2 G IN 4 OUT 1 3 1 PR19 499K_0402_1% 2 3.3V PR18 2.2M_0402_5% 2 1 1 PR21 200_0603_5% 1 2 1 PR20 200_0603_5% 1 2 PR17 100K_0402_5% 1 2 1 PU2 S-812C33AUA-C2N-T2_SOT89 1 RTCVREF +CHGRTC B+ PR15 1K_1206_5% 1 2 2 2 PR13 100K_0402_5% PD5 1N4148_SOD80 2 1 2 1 G 1 PR10 1K_1206_5% 1 2 VS PR9 33_1206_5% D S PR11 200_0603_5% 1 2 CH GRTCP 2 PQ1 TP0610T_SOT23 2 BATT+ 1 PD4 RB751V_SOD323 2 1 PJ2 1 1 +3VALW +1.8VALWP 2 JUMP_43X118 1 +5VALW +VCC_VIDP 2 +V_FSB_VTT JUMP_43X79 (5A,200mils ,Via NO.= 10) (3A,120mils ,Via NO.= 6) 2 PJ6 1 1 +12VALW +1.5VSP 2 2 1 1 Precharge detector 15.97V/14.84V FOR ADAPTOR 2 G +1.5VS 2 +2.5V +5VALWP (500mA,40mils ,Via NO.= 2) PJ8 1 1 +VGA_COREP JUMP_43X118 PJ9 2 2 1 1 2 2 1 P ACIN S JUMP_43X39 PJ7 2 2 PQ2 SN7002N_SOT23 PQ3 DTC115EUA_SC70 3 2 (120mA,40mils ,Via NO.= 2) 4 1 1 JUMP_43X118 JUMP_43X39 +2.5VP 2 PR26 47K_0402_5% 2 1 D PJ4 1 PJ5 +12VALWP PR25 191K_0402_1% +1.8VALW 1 2 1 JUMP_43X118 PJ3 +5VALWP 1 (5A,200mils ,Via NO.= 6) (5A,200mils ,Via NO.= 10) 2 2 1 2 3 2 2 PJ1 +3VALWP 1 +VGA_CORE JUMP_43X118 (6A,240mils ,Via NO.= 12) 4 JUMP_43X118 (8A,320mils ,Via NO.= 16) PJ10 +1.25VSP 2 2 PJ11 1 1 +1.25VS +1.2VEP 2 2 1 1 +1.2VS JUMP_43X79 JUMP_43X118 (3A,120mils ,Via NO.= 6) (6A,240mils ,Via NO.= 12) A B THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, D ate: IN C . C Compal Electronics, Inc. DCIN & DETECTOR Document Number R ev 0.1 Longbeach100 ¬P 期六, 十一月 06, 2004 Sheet D 43 of 53 A B C D PH1 under CPU botten side : CPU thermal protection at 84 degree C Recovery at 45 degree C VL VS VL 1 1 1 2 3 TM_REF1 2 - 1 1 MAINPW ON 5,43,46 PD9 1SS355_SOD323 2 1 2 PU3A O 1 PQ4 DTC115EUA_SC70 LM393M_SO8 4 2 + P 8 PR32 16.9K_0402_1% 1 2 PR30 47K_0402_1% 1 2 G PC16 0.01U_0402_25V7Z 3 PR34 100_0402_5% PR27 47K_0402_1% 2 1 1 PC15 1000P_0402_50V7K 1 PR35 3.32K_0402_1% PR36 100K_0402_1% 2 1 2 1 PC17 0.22U_0805_16V7K_V2 2 ALI/MH# 37,53 PC18 1000P_0402_50V7K +3VALWP VL 1 1 2 PR37 6.49K_0402_1% 2 1 1 1 1 3 @ BAS40-04_SOT23 1 PR33 100_0402_5% PC14 0.1U_0603_25V7K PH1 10KB_0603_1%_TH11-3H103FT 2 1 +3VALWP PD8 PR31 1K_0402_5% SUYIN_200275MR009G153ZL_RV BATT+ 2 BATT_S1 ALI/N IMH# A B/I TS_A EC_SMDA EC_SMCA 2 GND GND 1 2 3 4 5 6 7 8 9 2 10 11 BATT+ BATT+ ID B/I TS SMD SMC GNDGND- 2 PJP2 PL2 C8B BPH 853025_2P 1 2 1 PF2 15A_65VDC_451015 1 2 PR29 47K_0402_5% 1 PR28 2 1K_0402_5% 1 2 2 VMB PR38 1K_0402_5% 2 PR39 100K_0402_1% PD10 3 2 2 2 1 2 @ BAS40-04_SOT23 BATT_TEMPA 37,53 EC_SMB_DA1 37,38,53 PH2 near main Battery CONN : BAT. thermal protection at 79 degree C Recovery at 45 degree C 1 1 EC_SMB_CK1 37,38,53 PD11 @ BAS40-04_SOT23 PD12 @ BAS40-04_SOT23 VL 2 1 3 2 2 3 VL 2 5 TM_REF2 PU3B O - 7 PD13 1SS355_SOD323 2 1 LM393M_SO8 PR43 3.48K_0402_1% PR44 100K_0402_1% 2 1 1 VL PR45 100K_0402_1% 2 PC20 1000P_0402_50V7K 2 1 2 2 PC19 0.22U_0805_16V7K_V2 1 1 4 6 + P 8 PR42 14.7K_0402_1% 1 2 3 G +5VALWP PR40 47K_0402_1% PR41 47K_0402_1% 1 2 1 PH2 10KB_0603_1%_TH11-3H103FT 3 4 4 THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, D ate: IN C . A B C Compal Electronics, Inc. BATTERY CONN / OTP Document Number R ev 0.1 Longbeach100 ¬P 期六, 十一月 06, 2004 Sheet D 44 of 53 A B 1 2 3 B+ PR46 0.01_2512_1%(1W) 2 1 8 7 6 5 PC21 4.7U_1206_25V6K PC22 4.7U_1206_25V6K PC23 4.7U_1206_25V6K 1 2 3 8 7 6 5 4 1 CS 1 2 3 2 1 3 +INE2 CS 22 4 -INE2 VCC(o) 21 1 5 FB2 OUT 20 PC26 0.1U_0603_25V7K VH 19 VCC 18 N18 4 AC OFF# PR51 10K_0402_5% PD15 1SS355_SOD323 PR62 10K_0402_5% 2 1 VREF 7 FB1 8 -INE1 RT 17 9 +INE1 -INE3 16 10 OUTC1 FB3 15 11 OUTD CTL 14 12 -INC1 +INC1 13 1 5 6 7 8 LXCHRG 1 2 PC29 0.1U_0603_25V7K 1 2 PC32 0.1U_0603_25V7K 2 ACOFF 37,53 CC=0.5~2.5A CV=16.8V(12 CELLS LI-ION) 1 PR58 68K_0402_5% 2 PL3 PR61 22UH_SPC-1204P-220_2.9A_20% 0.02_2512_1% 1 2 1 2 PR63 PC33 47K_0402_5% 1500P_0402_50V7K 1 2 1 2 BATT+ PC35 4.7U_1206_25V6K EC31QS04 1 2 IREF=1.31*Icharge IREF=0.73~3.05V PC37 4.7U_1206_25V6K PC36 4.7U_1206_25V6K 2 PD18 1 2 AC ON 2 PC34 0.1U_0402_16V7K 2 PR64 100K_0402_1% AC ON 6 2 PD16 1SS355_SOD323 1 S PQ16 SN7002N_SOT23 1 2 37,53 IR E F PR59 205K_0402_1% 1 2 2 PQ14 DTC115EUA_SC70 1 D 2 G 3 2 PR60 3K_0402_1% 1 PC31 1000P_0402_50V7K 1 1 P ACIN 1 PR57 1K_0402_5% 2 1 2 2 1 1 PC30 0.1U_0402_16V7K 2 2 PD17 1SS355_SOD323 43 ACON PQ12 AO4407_SO8 PC25 0.022U_0402_16V7K 1 2 3 2 2 PR55 10K_0402_5% 2 43,46 P ACIN 23 V IN PD14 RLZ22B_LL34 1 1 1 PR53 PC28 23.7K_0402_1% 4700P_0402_25V7K 1 2 1 2 PQ15 SN7002N_SOT23 2 PR56 150K_0402_1% 2 3 PR54 10K_0402_1% 1 3 1 PC27 0.1U_0402_16V7K D AC OFF#1 OUTC2 GND PR50 0_0402_5% 1 1 PR52 100K_0402_5% PQ13 DTC115EUA_SC70 S 24 1 2 2 2 2 G +INC2 2 PC24 0.1U_0603_25V7K 1 1 2 47K PU4 1 -INC2 37,49,53 ADP_I 2 1 2 2 PR49 47K_0402_5% 1 2 1 3 PQ11 DTA144EUA_SC70 47K PR48 200K_0402_1% 2 2 4 1 PR47 47K_0402_5% 1 PQ8 AO4407_SO8 4 1 2 3 4 1 1 1 1 2 JUMP_43X118 2 1 2 3 8 7 6 5 PJ12 2 PQ10 AO4407_SO8 8 7 6 5 1 P3 2 PQ9 AO4407_SO8 D PQ7 AO4407_SO8 B++ Iadp=0~7.4A 8 7 6 5 4 V IN 1 2 3 C 2 1 2 3 4 8 7 6 5 PQ6 @ AO4407_SO8 1 P2 PQ5 @ AO4407_SO8 MB3887_SSOP24 +3VALWP PR65 95.3K_0603_0.1% 2 1 2 PR67 47K_0402_5% 1 1 CS PR68 95.3K_0603_0.1% 2 1 PQ17 DTC115EUA_SC70 2 3 3 1 3 PR66 143K_0603_0.1% 2 1 4.2V 2 VMB PQ18 DTC115EUA_SC70 1 3 37,53 FSTCHG 2 PR69 340K_0402_1% 1 OVP voltage : LI 4S2P : 17.4V--> BATT_OVP= 1.935V +12VALWP PR70 499K_0402_1% 8 P 3 - 2 PU5B LM358A_SO8 7 0 + 5 - 6 4 + G PU5A LM358A_SO8 1 0 37,53 BATT_OVP 2 (BAT_OVP=0.1111 *VMB) 4 1 PR72 105K_0402_1% A PC39 0.01U_0402_25V7Z 2 PR71 2.2K_0402_5% 2 2 2 PC38 @ 0.1U_0402_16V7K 1 1 1 4 THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, D ate: IN C . B C Compal Electronics, Inc. CHARGER Document Number R ev 0.1 Longbeach100 ¬P 期六, 十一月 06, 2004 Sheet D 45 of 53 5 4 3 2 1 PC40 4.7U_1206_25V6K 1 2 2 1 N4 2 2 1 2 +5VALWP 1 8 PR84 1.82K_0402_1% PR87 10.2K_0402_1% 2 PC59 100P_0402_50V8J 1 + PC60 470U_6.3V_M 1 PC61 @ 0.047U_0603_50V4Z PC57 4.7U_0805_6.3V6K 2 10K_0402_1% PC54 0.47U_0603_16V7K 1 2 GND 1 MAX1902EAI_SSOP28 1 PR88 1 PC58 1000P_0402_50V7K 2 VS PR86 47K_0402_5% 1 2 1 4 3 2 1 2.5VREF 1 RUN/ON3 CS H5 PD23 SKUL30-02AT_SMA 2 TIME/ON5 G S S S 21 VL 22 7 28 PDL5 CSL5 2 PC56 100P_0402_50V8J CSH3 CSL3 FB3 SKIP# SHDN# 2 2 5 6 7 8 D D D D 1 2 PR83 10K_0402_5% 43,45 PACIN 1 1 2 3 10 23 PLX5 PR81 0_0402_5% 2 1 1 PR82 1.24K_0402_1% CS H3 CSL3 2 1 C PR78 2M_0402_1% 2 LX3 DL3 PQ22 SI4810BDY-T1_SO8 4 5 18 16 17 19 20 14 13 12 15 9 6 11 2 DH3 26 24 12OUT VDD BST5 DH5 LX5 DL5 PGND CSH5 CSL5 FB5 SEQ REF SYNC RST# 1 PR80 0_0402_5% PR85 3.32K_0402_1% PC52 47P_0402_50V8J 2 27 V+ BST3 1 1 2 2 PD22 SKUL30-02AT_SMA 25 1 + 2 2 1 1 1 PC55 470U_6.3V_M PU6 PC53 0.47U_0603_16V7K 1 PR79 1M_0402_1% 2 2 PR77 3.74K_0402_1% 1 C 2 2 1 PR76 1.87K_0402_1% PR75 0_0402_5% 1 2 PD H5 2 +3VALWP PR74 1.27K_0402_1% 2 PC50 4.7U_1206_25V6K PQ20 SI4800BDY_SO8 1 D D D D 1 PC47 4.7U_1206_25V6K 2 PDL3 PC46 4.7U_1206_25V6K 1 2 1 2 S S S G 1 2 3 4 1 1 PC49 0.1U_0603_25V7K PDH3 PL4 10UH_SPC-1205P-100_4.5A_20% PC51 47P_0402_50V8J PC48 4.7U_0805_6.3V6K 4 3 2 1 1 D D D D 1 1 8 7 6 5 +12VALWP PQ21 SI4810BDY-T1_SO8 PT1 10uH_SDT-1205P-100-118_5A_20% B+++ 5 6 7 8 VL 2 2 PC45 1 2 1 2 3 4 1 0.1U_0603_25V7K PD21 1SS355_SOD323 D 3 PD20 DAP202U_SOT323 S S S G VS PLX3 1 PR73 22_1206_5% G S S S PQ19 SI4800BDY_SO8 FLYBACK 2 4 8 7 6 5 D D D D 1 PC44 4.7U_1206_25V6K 2 1 2 PC43 4.7U_1206_25V6K PD19 EC11FS2_SOD106 1 S NB 1 2 1 JUMP_43X118 2 2 PC41 470P_0805_100V7K 2 2 BST51 3 B+ BST31 1 PC42 0.1U_0603_25V7K 1 2 B+++ PJ13 D 2 PR89 10K_0402_1% B 1 PR90 220K_0402_5% B VL 2 2 2 1 MAINPW ON 5,43,44 PC62 0.47U_0603_16V7K A A THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN C . D ate: 5 4 3 2 Compal Electronics, Inc. 3V/5V/12V Document Number R ev 0.1 Longbeach100 ¬P 期六, 十一月 06, 2004 Sheet 1 46 of 53 A B C D PJ14 1 2 +5VALWP 1 PC63 4.7U_1206_25V6K PR91 0_1206_5% PC66 4.7U_1206_25V6K 2 2 2 PC65 4.7U_1206_25V6K 2 1 1 1 2 2 1 B+ 1 JUMP_43X118 PC64 4.7U_1206_25V6K 1 PC67 0.1U_0603_25V7K 1 PD24 PC68 2.2U_0805_10V6K 3 D D D D 8 7 6 5 2 2 DAP202U_SOT323 1 1 PR92 2.2_0603_5% 2 1 2 1 D D D D 5 6 7 8 28 25 ISEN2 22 LGATE1 LGATE2 27 3 PGND1 PGND2 26 9 10 8 15 VOUT1 VSEN1 EN1 PG1 VOUT2 VSEN2 EN2 PG2/REF 20 19 21 16 OCSET2 18 1 PR97 1.96K_0402_1% 1 2 2 1 PQ26 SI4810BDY-T1_SO8 PC76 0.01U_0402_25V7Z + PC75 220U_6.3V_M PR98 18.2K_0402_1% 2 2 1 S YSON 30,36,37,40,53 PR101 PC77 0.1U_0402_16V7K 10K_0402_1% 2 1 1 13 ISL6227CA-T_SSOP28 2 PR100 0_0402_5% PR104 107K_0402_1% 2 2 1 1 OCSET1 PR103 107K_0402_1% 2 2 PC78 0.1U_0402_16V7K 11 1 1 PR102 10K_0402_1% 1 2 2 PR99 100K_0402_1% DDR 1 30,33,37,38,42,53 SUSP# GND 4 3 2 1 G S S S 2 +2.5VP PL6 2.2UH_SPC-1205P-2R2B_13A_30% 2 1 24 PHASE2 1 UGATE2 PHASE1 PQ24 SI4800BDY_SO8 G S S S PC72 0.1U_0603_25V7K 2 1 4 3 2 1 VCC UGATE1 4 ISEN1 2 PR94 0_0603_5% 5 7 1 2 S S S G 1 2 3 4 BOOT2 23 PC70 0.01U_0402_25V7Z 2 1 2 2 PR95 3.65K_0402_1% PR96 1.96K_0402_1% 1 2 BOOT1 17 5 6 7 8 PR93 0_0603_5% PQ25 SI4810BDY-T1_SO8 PC74 0.01U_0402_25V7Z 6 SOFT2 D D D D 2 D D D D + 2 1 220U_6.3V_M 1 PC73 2 1 8 7 6 5 1 PC71 0.1U_0603_25V7K 2 1 VIN PC69 0.01U_0402_25V7Z PU7 12 SOFT1 2 1 S S S G PL5 2.2UH_SPC-1205P-2R2B_13A_30% 1 2 1 2 3 4 +1.2VEP 14 PQ23 SI4800BDY_SO8 3 3 +1.2VEP TO +VCC_VIDP +1.2VEP PQ27 @ SI4800DY-T1_SO8 D D D D S S S G 1 2 3 4 +VCC_VIDP PR105 @ 10K_0402_5% 1 2 PC79 @ 4.7U_0805_6.3V6K +12VALW 4 1 2 4 PC80 @ 0.1U_0402_16V7K 1 2 1 8 7 6 5 D 3 S 2 G PQ28 @ SN7002N_SOT23 VR_ON# 50 THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, D ate: IN C . A B C Compal Electronics, Inc. DDR_2.5V/1.2VEP Document Number R ev 0.1 Longbeach100 ¬P 期六, 十一月 06, 2004 Sheet D 47 of 53 A B C PR106 10_0603_5% 1 2 PJ15 1 2 2 +5VALWP JUMP_43X79 1 2 PD25 1N4148_SOD80 PC82 4.7U_0805_6.3V6K 5 6 7 8 1 1 6 FB 4 3 2 1 OCSET G S S S PC84 1 0.1U_0402_16V7K BOOT 7 PQ29 SI4800BDY_SO8 1 VCC D D D D PU8 2 2 PC83 470P_0603_50V7K 1 1 PC81 1U_0603_6.3V6M 2 1 2 1 5 1 2 PR107 10.5K_0402_1% D 2 PHASE 8 LGATE 4 PL7 2.2UH_SPC-1205P-2R2B_13A_30% 2 1 D D D D 1 GND G S S S 3 +1.8VALWP 5 6 7 8 UGATE PC85 470U_6.3V_M 2 4 3 2 1 APW 7057KC-TR_SOP8 + PQ30 SI4810BDY-T1_SO8 2 PR108 16.2K_0402_1% 1 2 1 PR109 11.5K_0402_1% 2 2 PC86 0.1U_0402_16V7K 1 2 PR110 10_0603_5% 1 2 PJ16 1 2 5 6 7 8 1 2 + PC87 220U_6.3V_M D D D D 2 PHASE 8 LGATE 4 G S S S UGATE PC91 0.1U_0402_16V7K 2 BOOT 1 4 3 2 1 OCSET D PQ32 SN7002N_SOT23 6 2 G 3 S PL8 2.2UH_SPC-1205P-2R2B_13A_30% 2 1 FB GND G S S S 3 + PC93 220U_6.3V_M PQ33 SI4810BDY-T1_SO8 2 4 3 2 1 APW 7057KC-TR_SOP8 3 +VGA_COREP 1 D D D D PC92 0.1U_0402_16V7K PC89 4.7U_0805_6.3V6K 1 5 6 7 8 1 PR112 100K_0402_1% 1 2 2 33,42,49 SUSP +5VALW 2 1 3 2 PQ31 SI4800BDY_SO8 1 VCC 1 PU9 7 PD26 1N4148_SOD80 2 PC90 470P_0603_50V7K 2 PR111 10.5K_0402_1% PC88 1U_0603_6.3V6M 1 JUMP_43X79 5 1 2 1 2 1 PR113 5.36K_0402_1% 1 2 M24/1.2V 2 +5VALWP 1 1 PR114 10K_0402_1% 5.36K 3.92K PR114 10K 8.87K PR116 7.15K 6.81K PR113 PC94 0.1U_0402_16V7K D PQ34 SN7002N_SOT23 2 G PR116 7.15K_0402_1% PQ35 SN7002N_SOT23 1 S THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, D ate: IN C . 2 PR117 10K_0402_5% A 4 S 2 G 3 14 POW ER_SEL 1 3 1 4 D 2 1 2 1 PR115 10K_0402_5% M22/1.15V 2 B C Compal Electronics, Inc. 1.8V/VGA Document Number R ev 0.1 Longbeach100 ¬P 期六, 十一月 06, 2004 Sheet D 48 of 53 5 4 3 2 PR118 @ 2M_0402_1% 1 2 1 VL VS D H_PROCHOT# 5 8 1 PR120 @ 100K_0402_1% 1 P - 1 O PU10A @ LM393M_SO8 S 2 PC97 @ 1000P_0402_50V7K PC98 @ 10P_0402_50V8J 2 2 PR123 @ 100K_0402_1% 3 PU10B @ LM393M_SO8 + 2 1 4 - PQ36 @ SN7002N_SOT23 2 G 3 4 O 7 D G P 1 8 6 + G 5 2 PR122 @ 196K_0402_1% 2 2 PR121 @ 124K_0402_1% 1 2 1 1 VL PC95 @ 0.1U_0603_25V7K 2 PC96 @ 0.01U_0402_25V7Z 1 37,45,53 ADP_I D 1 PR119 @ 10.2K_0402_1% 2 1 C C +2.5VP 2 2 PJ17 JUMP_43X79 PJ18 JUMP_43X79 3 VREF NC 7 4 VOUT NC 8 TP 9 2 B PC100 1U_0603_6.3V6M PC101 10U_1206_6.3V7K PR125 1K_0402_1% 6 NC 5 3 VREF NC 7 4 VOUT NC 8 TP 9 +3VALWP PC102 1U_0603_6.3V6M B 1 PC104 0.1U_0402_16V7K +1.25VSP 1 2 1 1 PR129 1K_0402_1% 2 2 PC107 @ 0.1U_0402_16V7K PQ38 S SN7002N_SOT23 2 2 PC106 10U_1206_6.3V7K D 2 G 1 33,42,48 SUSP 3 +1.5VSP PR128 0_0402_5% 1 2 1 2 2 PQ37 SN7002N_SOT23 PC103 0.1U_0402_16V7K VCNTL GND APL5331KAC-TR_SO8 1 1 3 S PR127 1.5K_0402_1% 2 PC105 0.1U_0402_16V7K D 2 G 1 33,42,48 SUSP 1 APL5331KAC-TR_SO8 PR126 150K_0402_1% 1 2 VIN 2 2 5 1 NC 1 1 GND 1 2 2 PU12 +5VALWP 1 6 1 VCNTL 2 PR124 1K_0402_1% 2 PC99 10U_1206_6.3V7K VIN 1 1 PU11 1 2 1 1 1 2 2 +2.5V PC108 10U_1206_6.3V7K A A THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN C . D ate: 5 4 3 2 Compal Electronics, Inc. 1.5V/1.25V/PROCHOT Document Number R ev 0.1 Longbeach100 ¬P 期六, 十一月 06, 2004 Sheet 1 49 of 53 B+ 2 +5VS 2 PR130 10_0603_5% 1 PR131 80.6K_0402_1% 1 +5VCPUVCC PC109 1U_0603_6.3V6M 2 1 5 5 5 5 5 5 PU13 H_VID4 H_VID3 H_VID2 H_VID1 H_VID0 H_VID5 PR133 0_0402_5% 1 2 5,6 VID_PW RGD 1 +5VCPUVCC 2 32 VCC RAMPADJ 1 2 3 4 5 6 VID4 VID3 VID2 VID1 VID0 VID5 PGOOD 39 PWM1 25 24 23 34 ISEN1+ ISEN1- ENLL 33 DRSEN PWM2 26 35 DSEN# ISEN2+ ISEN2- 27 28 10 OCSET PR134 0_0402_5% 1 PC110 0.047U_0603_16V7K 2 1 11 1 9 20 21 22 DSV PWM4 31 ISEN4+ ISEN4- 30 29 PR132 10K_0402_5% 2 1 VCORE_PW RGD 23 36 FS COMP 15 37 DRSV FB 13 38 NC NC 14 VDIFF VSEN VRTN 16 17 18 1 PWM1 51 PR170 0_0402_5% 2 1 ISEN1+ 51 ISEN1- 51 PWM2 51 PR171 0_0402_5% 2 1 ISEN2+ 51 ISEN2- 51 PWM3 52 PR172 0_0402_5% 2 1 ISEN3+ 52 ISEN3- 52 PWM4 52 PR173 0_0402_5% 2 1 ISEN4+ 52 ISEN4- 52 PC111 2200P_0402_50V7K 2 1 Frequency Select 2 2 1 PR136 22.6K_0402_1% 2 PC112 100P_0402_50V8J PWM3 ISEN3+ ISEN3SOFT 2 PR135 0_0402_5% 7 Battery Feed Forward NC 12 GND PR142 118K _0402_1% GND OFS 8 2 19 ISL6248ACR-T_QFN40 PC115 1 2 1 2 PR143 681K_0402_1% 2 6 3 GND NC 5 VREF NC 4 7 VOUT NC 8 TP 9 +3VALWP 2 1 Remote Sensing Place near +VCC_CORE output capacitor 1 VCNTL +CPU_CORE PC118 1U_0603_6.3V6M 1 PQ39 SN7002N_SOT23 PC119 0.1U_0402_16V7K 2 S 2 PQ40 S SN7002N_SOT23 2 G PR151 1.5K_0402_1% 2 D 3 1 2 G +VCC_VIDP 1 1 D 2 1 APL5331KAC-TR_SO8 3 1 PR153 10K_0402_5% 2 1 PR145 0_0402_5% PC120 10U_1206_6.3V7K 2 37,53 VR_ON PR152 0_0402_5% 1 2 VIN 2 PR149 1.65K_0402_1% PR150 10K_0402_5% 47 VR_ON# 1 1 1 1 +5VALWP 2 PR147 0_0402_5% 2 1 1 2 PJ19 JUMP_43X79 PU14 2 PC117 10U_1206_6.3V7K 4.7K_0603_3%_ERTJ0ET472H Place close to IC 1 PC116 0.1U_0402_16V7K 1U_0603_6.3V6M 2 +5VCPUVCC +2.5VP PR139 @ 0_0402_5% 2 1 PR140 PR141 3.4K_0402_1% 1.24K_0402_1% 1 2 1 2 PR144 1.65K_0402_1% PH3 1 2 1 2 1 40 1 PC113 22P_0402_50V8J PC114 @ 1000P_0402_50V7K 2 1 2 PR138 0_0402_5% PR137 20K_0402_1% 1 2 THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN C . Compal Electronics, Inc. Title CPU_CORE (1) Size Document Number R ev 0.1 Longbeach100 D ate: ¬P 期六, 十一月 06, 2004 Sheet 50 of 53 CPU_B+ PC121 0.22U_0805_16V7K_V2 2 1 1 PQ41 SI7392DP_SO8 4 PC125 4.7U_1206_25V6K 1 1 2 PC124 4.7U_1206_25V6K PC147 2200P_0402_50V7K PC126 4.7U_1206_25V6K 2 2 5 2 PR154 3_0603_5% 1 +5VS 5 2 1 1 + PC122 220U_25V_M 2 PL9 FBM-L18-453215-900LMA90T_1812 1 2 1 + B+ PC123 220U_25V_M 2 PQ42 SI7392DP_SO8 4 PU15 8 GND 5 N5 3 2 1 DELAYPHASE 5 2 3 2 1 1 7 BOOT 5 PWM UGATE 4 PL10 0.5U_MPC1250LR50_35A_20% 1 2 PHASE1 PR156 28.7K_0402_1% LGATE ISL6209CB-T_SO8 PQ44 SI7886DP_SO8 4 1 PQ43 SI7886DP_SO8 2 1 PC127 1U_0805_16V7K VCC 3 1 2 50 PWM1 6 4 3 2 1 3 2 1 2 PD27 SSM14_SMA PR157 56.2K _0402_1% 2 1 PC128 0.01U_0402_25V7Z 2 1 Local Transistor Swtich Decoupling N6 PH4 820_0402_5% 2 1 50 ISEN150 ISEN1+ 4 1 PC131 4.7U_1206_25V6K PC132 4.7U_1206_25V6K 2 1 PC130 4.7U_1206_25V6K 2 PC148 2200P_0402_50V7K 2 1 2 5 5 2 PQ45 SI7392DP_SO8 PQ46 SI7392DP_SO8 1 PR158 3_0603_5% 1 CPU_B+ PC129 0.22U_0805_16V7K_V2 1 2 4 PU16 1 7 DELAYPHASE 8 4 GND 5 BOOT 2 N7 3 2 1 PWM UGATE 3 2 1 VCC 3 PL11 0.5U_MPC1250LR50_35A_20% 1 2 PHASE2 +CPU_CORE 1 5 5 ISL6209CB-T_SO8 PQ48 SI7886DP_SO8 4 4 3 2 1 3 2 1 2 PD29 SSM14_SMA PR161 56.2K _0402_1% 2 1 PD28 EC31QS04 PC134 0.01U_0402_25V7Z 2 1 2 PQ47 SI7886DP_SO8 1 PR160 28.7K_0402_1% LGATE 2 1 PC133 1U_0805_16V7K 1 2 50 PWM2 6 Local Transistor Swtich Decoupling N8 50 ISEN250 ISEN2+ PH5 820_0402_5% 2 1 THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN C . Compal Electronics, Inc. Title CPU_CORE (1) Size Document Number R ev 0.1 Longbeach100 D ate: ¬P 期六, 十一月 06, 2004 Sheet 51 of 53 5 4 3 2 1 CPU_B+ 1 PC138 4.7U_1206_25V6K D 2 1 PC137 4.7U_1206_25V6K 2 PC136 4.7U_1206_25V6K PC149 2200P_0402_50V7K PQ50 SI7392DP_SO8 1 4 1 1 5 PQ49 SI7392DP_SO8 2 PR162 3_0603_5% D 2 +5VS 5 2 PC135 0.22U_0805_16V7K_V2 1 2 4 PU17 DELAYPHASE 8 GND 5 N9 3 2 1 2 5 1 7 PL12 0.5U_MPC1250LR50_35A_20% 1 2 PHASE3 2 BOOT 3 2 1 PWM UGATE 5 VCC 3 4 PR164 28.7K_0402_1% LGATE ISL6209CB-T_SO8 PQ52 SI7886DP_SO8 1 PQ51 SI7886DP_SO8 1 1 PC139 1U_0805_16V7K 2 50 PWM3 6 4 4 PR165 56.2K _0402_1% 2 1 PC140 0.01U_0402_25V7Z 2 1 Local Transistor Swtich Decoupling 3 2 1 3 2 1 2 PD30 SSM14_SMA N10 PH6 866_0402_1% 2 1 50 ISEN350 ISEN3+ 1 2 PC142 4.7U_1206_25V6K PC150 2200P_0402_50V7K PC143 4.7U_1206_25V6K 1 1 2 1 2 PQ53 SI7392DP_SO8 4 1 5 5 2 PR166 3_0603_5% C CPU_B+ PC141 0.22U_0805_16V7K_V2 1 2 PC144 4.7U_1206_25V6K 2 C PQ54 SI7392DP_SO8 4 PU18 PWM UGATE 1 7 DELAYPHASE 8 4 GND 5 BOOT 2 N11 3 2 1 VCC 3 3 2 1 6 PL13 0.5U_MPC1250LR50_35A_20% 1 2 PHASE4 +CPU_CORE 5 5 LGATE PQ55 SI7886DP_SO8 PQ56 SI7886DP_SO8 4 1 ISL6209CB-T_SO8 1 PC145 1U_0805_16V7K PR168 28.7K_0402_1% 1 2 2 50 PWM4 4 PD31 SSM14_SMA PC146 0.01U_0402_25V7Z 2 1 B 3 2 1 3 2 1 2 B PR169 56.2K _0402_1% 2 1 Local Transistor Swtich Decoupling N12 PH7 732_0402_1% 2 1 50 ISEN450 ISEN4+ A A THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS Size AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, D ate: IN C . 5 4 3 2 Compal Electronics, Inc. CPU_CORE (2) Document Number R ev 0.1 Longbeach100 ¬P 期六, 十一月 06, 2004 Sheet 1 52 of 53 5 +3VALW RTCVREF 4 2 1 R273 @0_0805_5% 2 1 R301 @0_0805_5% 1 3 2 1 +3VALW_EC L17 1 2 @MURATA BLM11A20PT_0603 2 C377 +3VALW_EC 1 C427 1 C354 1 C384 1 C424 910L_AVCC C442 21,26,28,31,32,37,39,42 PCIRST# 22,37 EC_SCI# KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 37 KSO0 37 KSO1 37 KSO2 37 KSO3 37 KSO4 37 KSO5 37 KSO6 37 KSO7 37 KSO8 37 KSO9 37 KSO10 37 KSO11 37 KSO12 37 KSO13 37 KSO14 37 KSO15 37,38 KSO17 63 64 65 66 67 68 69 70 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 89 90 KSO17 75 11 26 37 105 127 141 EC_AVCC / AVCC 76 78 79 80 DAC_BRIG 19,37 EN_DFAN1 37,41 IREF 37,45 EN_DFAN2 37,41 INVT_PWM/GPIO0F/PWM1 BEEP#/GPIO10/PWM2 OUT BEEP/GPIO12/PWM3 ACOFF/GPIO18/PWM4 FAN SPEED1/GPIO14/FANFB1 FAN SPEED2/GPIO15/FANFB2 25 27 30 31 32 33 INVT_PWM 19,37 BEEP# 34,37 PWR_SUSP_LED 37,38,39 AC OFF 37,45 FAN_SPEED1 37,41 FAN_SPEED2 37,41 PSCLK1 PSDAT1 PSCLK2 PSDAT2 PSCLK3 PSDAT3 91 92 93 94 95 96 KILL_SW# 31,37,39 EC_IDERST 33,35,37 MODE# 37,38 C D_PLAY 33,35,37 TP_CLK 37,38 TP_DATA 37,38 key Matrix scan KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F EC URXD/KSO16/GPIO48 EC UTXD/KSO17/GPIO49 88 87 86 85 EC_SMB_DA2 EC_SMB_CK2 EC_SMB_DA1 EC_SMB_CK1 34 35 38 40 99 101 100 102 104 22,37,40 EC_RSMRST# 19,37 BKOFF# 22,37 PM_SLP_S3# 22,37 EC_LID_OUT# 22,37 PM_SLP_S5# 22,37 EC_SMI# 22,37 EC_SWI# 37,39 LID_SW# 30,33,37,38,42,47 SUSP# 22,37 PBTN_OUT# 26,31,37 EC_PME# 4 7 8 16 17 18 19 20 21 22 23 C R Y3 C R Y4 1 R302 2 C R Y4 @20M_0603_5% KSI0/GPIO30 KSI1/GPIO31 KSI2/GPI032 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPI035 KSI6/GPIO36 KSI7/GPIO37 EC SMD2/ GPIO47/SDA2 EC SMC2/GPIO46/SCL2 EC SMD1/GPIO44/SDA1 EC SMC1/GPIO44/SCL1 PS2 interface Data BUS Address BUS SM BUS PCM_SPK#/EMAIL_LED#/ GPIO16 SB_SPKR/PWR_SUSP_LED#/ GPIO17 PWRLED#/ GPIO19 NUMLED#/ GPIO1A BATT CHGI LED#/ E51CS# BATT LOW LED#/ E51MR0 CAPS LED#/ E51TMR1 ARROW LED#/ E51 INT0 SYSON/GPIO56/ E51 INT1 EC_RSMRST#/ GPIO02 BKOFF#/GPIO03 PM SLP S3#/GPIO04 EC LID OUT#/GPIO06 PM SLP S05#/ GPIO07 EC SMI#/GPIO08 EC SWI#/GPIO09 LID SW#/ GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC PME#/GPIO0D 140 138 XCLKO XCLKI 2 C R Y3 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 37 E51_TXD 37 E51_RXD 37,38,39 PWR_LED# 37 NUM_LED# 37,38 BATT_CHGI_LED# 37,38 BATT_LOW_LED# 37 CAPS_LED# 37 PADS_LED# 30,36,37,40,47 SYSON B DAC_BRIG/DA0/GPIO3D EN DFAN1/DA1/GPIO3D IREF2/DA2 EN DFAN2/DA3/ GPIO3F DA output or GPO R306 @KB910L_LQFP144 ADB0/D0 ADB1/D1 ADB2/D2 ADB3/ D3 ADB4/D4 ADB5/D5 ADB6/D6 ADB7/D7 KBA0/A0 KBA1/A1 KBA2/A2 KBA3/A3 KBA4/A4 KBA5/A5 KBA6/A6 KBA7/A7 KBA8/A8 KBA9/A9 KBA10/A10 KBA11/A11 KBA12/A12 KBA13/A13 KBA14/A14 KBA15/A15 KBA16/A16 KBA17/A17 KBA18/A18 KBA19/A19 125 126 128 130 131 132 133 134 111 112 113 114 115 116 117 118 119 120 121 122 123 124 110 109 108 107 106 98 SELIO2#/ GPIO43 SELIO#/ GPIO50 FRD#/RD# FWR#/WR# FSEL#/SELMEM# 84 97 135 136 144 EC ON/ GPIO1B AC IN/ GPIO1C ECTHERM#/GPIO11 ONOFF/GPIO18 PCMRST#/GPIO1E WL OFF#/GPIO1F AGND 37,38 37,38 37,38 37,38 37 37 37 37 5,33,37 5,33,37 37,38,44 37,38,44 D BATT_TEMPA 37,44 BATT_OVP 37,45 ADP_I 37,45,49 AD_BID0 37 ADP_I AD_BID0 FAN/PWM 910LRST# 1 @47K_0402_5% C 71 72 73 74 ALI/MH#/GPIO40 FSTCHG/GPIO41 VR ON/ GPIO42 GPIO57/GPIO57 GPIO58/GPIO58 GPIO59/GPIO59 ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19 R224 R255 ADB[0..7] KBA[0..19] 1 1 C ADB[0..7] 37,38 KBA[0..19] 37,38 B 2 2 @10K_0402_5% @10K_0402_5% FR D# 37,38 FW R# 37,38 FSEL# 37,38 41 43 29 36 45 46 EC_ON 37,39,40 AC INL 37 EC_THRM# 22,37 O N/OFF 37,39 PCMRST# 35,37 W L_OFF# 31,37 81 82 83 137 142 143 ALI/MH# 37,44 FSTCHG 37,45 VR_ON 37,50 ENBKL 8,37 R297 R298 1 1 2 2 @10K_0402_5% @10K_0402_5% 77 +3VALW_EC @0.1U_0402_16V4Z 1 2 R183 BATTEMP/AD0/GPIO38 BATT OVP/AD1/GPIO39 ADP_I/AD2/GPIO3A AD BID0/AD3/GPIO3B AD INtput or GPI PWR GND GND GND GND GND GND C353 2 GA20/ GPIO00/GA20 KBRST#/GPIO01/KBRST# SERIRQ LPC_FRAME# / LFRAME# LPC AD3/LAD3 LPC AD2/LAD2 Host LPC AD1/LAD1 INTERFACE LPC AD0/LAD0 CLK_PCI_EC/PCICLK PCIRST# EC RST#/ ECRST# EC SCI#/SCI#/GPIO0E PM_CLKRUN#/ CLKRUN# 139 129 103 13 28 39 21,25,37 CLK_PCI_LPC 1 2 3 5 6 9 10 12 R654 14 15 910LRST# 42 24 44 VCC/ EC VCC VCC / EC VCC VCC / EC VCC VCC / EC VCC VCC VCC U17 22,37 GATEA20 22,37 KBRST# 21,28,37,39 SERIRQ 21,37,39 LPC_FRAME# 21,37,39 LPC_AD3 21,37,39 LPC_AD2 21,37,39 LPC_AD1 21,37,39 LPC_AD0 @10_0402_5% 2 1 C373 @0.1U_0402_16V4Z @ @1000P_0402_50V7K 1 2 L19 1 910L_AGND 2 @MURATA BLM11A20PT_0603 @4.7U_0805_6.3V6K @0.1U_0402_16V4Z @0.1U_0402_16V4Z 2 2 2 2 2 @0.1U_0402_16V4Z @0.01U_0402_16V7K D 910L_AVCC 1 1 @0_0402_5% 2 A @10P_0402_50V8J 4 1 IN OUT X4 NC NC 910L_AGND 1 C448 3 2 2 @10P_0402_50V8J C449 A 1 Compal Electronics, Inc. Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE Size Document Number USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C ustom ENE-KB910L @32.768KHZ_12.5P_1TJS125DJ2A073 Rev 0.1 Longbeach 100 Date: 5 4 3 2 星期六, 十一月 06, 2004 Sheet 1 53 of 53
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File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.3 Linearized : Yes Create Date : 2004:11:08 11:54:16+08:00 Modify Date : 2004:11:08 11:54:16+08:00 Page Count : 53 Creation Date : 2004:11:08 03:54:16Z Mod Date : 2004:11:08 03:54:16Z Producer : Acrobat Distiller 5.0 (Windows) Metadata Date : 2004:11:08 03:54:16ZEXIF Metadata provided by EXIF.tools