Layout And Cuircit Design XOR2 Instructions

• Introduction
  • Submission
  • An Overview of VLSI CAD Tools
  • Design Flow
  • Getting Started with Cadence Virtuoso
• Schematic of an XOR2
  • Create symbol
  • Create Test Circuit
• Schematic Simulation
  • Plot the output
    • Using the calculator
    • Using the Output Editor
  • Parametric sweep
  • Corner simulations
    • TTSS Corner
    • TTFF Corner
  • Higher load (FO4)
  • Power Estimation
    • Static dissipation
    • Dynamic
    • Short Circuit
  • Sizing
  • Buffer insertion
• Layout
  • Placement
  • DRC
  • Routing
  • Layout vs Sechamtic (LVS)
• Hierarchical Design
  • Routing
  • RC Extraction
  • Extracted Layout Simulation