Introduction To The AT89LP51RC2 Microcontroller Lecture AT89 Instructions

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University of British Columbia
Electrical and Computer Engineering
ELEC291/ELEC292

Introduction to the
AT89LP51RC2 Microcontroller
Dr. Jesús Calviño-Fraga P.Eng.
Department of Electrical and Computer Engineering, UBC
Office: KAIS 3024
E-mail: jesusc@ece.ubc.ca
Phone: (604)-827-5387

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Objectives
• Introduction to the AT89LP51RC2
microcontroller.
• Introduction to the 8051 instruction set.
• Understand how an assembler compiler is used
and the files it generates.
• Calculate machine code execution time.
• Assemble a bread boarded AT89LP51RC2
microcontroller with LCD.
• Write, compile, download, and run programs into
the AT89LP51RC2/LCD microcontroller system.
Introduction to the AT89LP51RC2

2

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

1

AT89LP51RC2

Introduction to the AT89LP51RC2

3

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

AT89LP51RC2

Introduction to the AT89LP51RC2

4

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

2

AT89LP51RC2

Somewhere in the Datasheet it says that it can run
at up to 24 MHz, that is why I selected a
22.1184MHz crystal.
Introduction to the AT89LP51RC2

5

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

AT89LP51RC2 Features
• Industry standard. The 8051 is still a very common
processor.
• Very similar to original 8051/8052 from the 1980’s. Uses
the well know 8051 instruction set. Can be made
backward compatible.
• DIP! Easy to breadboard.
• 34 I/O pins. Also lots of useful peripherals.
• External memory interface. Rare nowadays.
• Lots of tools and resources.
• Not too complicated. User manual is “only” 254 pages.
• 1.7732 CA$ each in quantities of 100.
Introduction to the AT89LP51RC2

6

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

3

AT89LP51RC2 Draw Backs
• The built-in ADC (Analog to Digital
Converter) is atrocious! Useless for
ELEC291/292. We will be using an
external ADC.
• 8-bit processor. Well, this is an advantage
sometimes!

Introduction to the AT89LP51RC2

7

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

AT89LP51RC2 Pin Out

Introduction to the AT89LP51RC2

8

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

4

AT89LP51RC2 block diagram
Warning: it uses
different
instructions to
access the different
memory spaces!

Figure taken from
AT89LP51RC2 user
manual

Introduction to the AT89LP51RC2

9

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Assembling the AT89LP51RC2 Basic
System. Using Boot Loader only.
5V
5V

5V

0.1µF

VCC (40)

TXD
RXD

GND

(10) RXD
(11) TXD

Reset

AT89LP51RC2

USB

BO230XS

VCC Out
Boot
P4.5 (29)
XTAL2 (18)
XTAL1 (19)

(9) RST#

22.1148MHz

5V

POL (31)
GND (20)

5V
Advantages: Fewer wires, more I/O,
works on Windows, Linux, and Macs
Introduction to the AT89LP51RC2

330Ω
0.1µF

10

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

5

Assembling the AT89LP51RC2 ISP
System. Using SPI or Boot Loader.
5V
5V

5V

0.1µF

VCC (40)

USB

(10)
(11)
(6)
(7)
(8)
(5)

TXD
RXD

RTS
CTS
CBUS3
GND

RXD
TXD
MOSI
MISO
SCK
SS

Reset

AT89LP51RC2

BO230XS

VCC Out
Boot
P4.5 (29)
XTAL2 (18)
XTAL1 (19)

(9) RST#

Note: CBUS3 is pin
6 of J3 in BO230XS

22.1148MHz

5V

POL (31)
GND (20)
330Ω

5V

SPI-ISP Advantages: Faster programming
times, fast mode configuration, NO need to
press buttons to start programming.

0.1µF

Introduction to the AT89LP51RC2

11

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

BO230XS J3 and J1 Pins
J1

J3
PIN

Name

PIN

Name

1

VCC

1

VCC

2

CBUS2

2

CTS

3

GND

3

GND

4

CBUS1

4

RXD

5

CBUS0

5

TXD

6

CBUS3

6

RTS

Introduction to the AT89LP51RC2

12

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

6

BOM (Bill of Materials)
Quantity

Description

2

0.1uF capacitors

1

330Ω resistor

1

LED 5MM GREEN

1

22.1184MHZ Crystal

1

BO230XS serial USB adapter

1

AT89LP51RC2 IC 80C51 MCU 32K
FLASH 40-DIP

2

Push button switch

Introduction to the AT89LP51RC2

13

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Assembling the AT89LP51RC2
System

Wire length: 4
means 4 x 0.1
inches. 0.1
inches is the
distance
between
adjacent holes in
the breadboard.

Introduction to the AT89LP51RC2

14

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

7

Assembling the AT89LP51RC2
System

It should take about 30 minutes!
Introduction to the AT89LP51RC2

15

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Assembling the AT89LP51RC2
System

Introduction to the AT89LP51RC2

16

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

8

BO230XS
• Very simple circuit that allows to connect to
many different types of microcontrollers.
• Adds serial port connection to computer via
USB.
• Allows for In System Programming (ISP) for
many microcontrollers. Some examples: The
whole AT89LP family from Atmel/Microchip, The
C8051/EFM8 family from Silabs, Some STM32F
ARMs from ST Microelectronics, the LPC824
ARM from NXP, all PIC32MX from Microchip,
the ATMega328 (and other members of the
family) from Atmel/Microchip, and some
MSP430 from Texas Instruments.
Introduction to the AT89LP51RC2

17

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Add LED/Resistor to P3.7
LED turns-on
with logic zero.
VCC=5V
AT89LP51RC2

LED voltage drop
@ 10mA (approx):
IR=1.4V
Red=1.8V
Yellow=1.9V
Green=2.0V
Blue=2.9V

330Ω
P3.7

I LED =

5V − 1.8V
≈ 10mA
330Ω

Introduction to the AT89LP51RC2

18

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

9

Blinky
; Blinky.asm: toggles an LED attached to pin 17 (P3.7)
$MODLP51
org 0000H
ljmp myprogram
; When using a 22.1184MHz crystal in fast mode
; one cycle takes 1.0/22.1184MHz = 45.21123 ns
WaitHalfSec:
mov R2, #89
L3: mov R1, #250
L2: mov R0, #166
L1: djnz R0, L1 ; 3 cycles->3*45.21123ns*166=22.51519us
djnz R1, L2 ; 22.51519us*250=5.629ms
djnz R2, L3 ; 5.629ms*89=0.5s (approximately)
ret
myprogram:
mov SP, #7FH
M0:
cpl P3.7
lcall WaitHalfSec
sjmp M0
END

Introduction to the AT89LP51RC2

19

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Compile “Blinky.asm” and flash
“Blinky.hex”.
• Download and install CrossIDE from the course
web page.
• Start CrossIDE and create a new assembly file.
copy and paste the code from previous slides.
Save as “Blinky.asm”.
• Click Build->ASM51. Click the “Browse” button
beside “Complete path of assembler” and select
a51.exe from the “Call51\bin” folder where you
installed CrossIDE. Then press “Ok”.
Introduction to the AT89LP51RC2

20

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

10

Flash and run into the AT89LP51RC2
using Boot Loader
• While pressing button “BOOT”, press and
release button “RESET”.
• On Crosside, click “fLash”->”Atmel 89LP
Bootloader”. Make sure the file “Blinky.hex” is
selected. Also make sure that the “Port” box is
set to the USB port # assigned to the BO230XS.
Click the “Flash” button and wait until it finishes.
• Press and release “RESET”. The program starts
running!
Introduction to the AT89LP51RC2

21

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Flash and run into the
AT89LP51RC2 using SPI-ISP
• On Crosside, click “fLash”->”Atmel 89LP
Using SPI”. Make sure the file
“Blinky.hex” is selected. Click the “Flash”
button and wait until it finishes. Done!
(Works only on Windows)

Introduction to the AT89LP51RC2

22

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

11

Summary: Blinky
•

To run “Blinky” in the AT89LP51RC2 we
need to complete the following steps:
1. Assemble the AT89LP51RC2
Microcontroller system in a bread board.
Attach LED to P3.7. (Or any other available
pin, just change the code!)
2. Edit and Compile “Blinky.asm”.
3. Flash and run “Blinky.hex” into the
AT89LP51RC2 processor.
Introduction to the AT89LP51RC2

23

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

8051 Instruction Set
1.
2.
3.
4.
5.

Arithmetic Operations
Logical Operations
Data Transfer
Boolean Variable Manipulation
Program Branching and Machine Control
WARNING: I did my best to change the number of cycles per instruction
to the actual values for the AT89LP51RC2, but there may be errors. The
ultimate reference is the AT89LP51RC2 user manual!
Note: not showing AT89LP51RC2 extended instructions.
Introduction to the AT89LP51RC2

24

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

12

Arithmetic Operations (ADD)
Mnemonic

Opcode

B C

Function

ADD A, Rn

28H-2FH

1

1

(A) = (A) + (Rn)

ADD A, direct

25H

2

2

(A) = (A) + (direct)

ADD A, @Ri

26H-27H

1

2

(A) = (A) + ((Ri))

ADD A, #data

24H

2

2

(A) = (A) + #data

ADDC A, Rn

38H-3FH

1

1

(A) = (A) + (C) + (Rn)

ADDC A, direct

35H

2

2

(A) = (A) + (C) + (direct)

ADDC A, @Ri

36H-37H

1

2

(A) = (A) + (C) + ((Ri))

ADDC A,#data

34H

2

2

(A) = (A) + (C) + #data

Introduction to the AT89LP51RC2

25

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Arithmetic Operations (SUB)
Mnemonic

Opcode

B C

Function

SUBB A, Rn

98H-9FH

1

1

(A) = (A) - (C) - (Rn)

SUBB A, direct

95H

2

2

(A) = (A) - (C) - (direct)

SUBB A, @Ri

96H-97H

1

2

(A) = (A) - (C) - ((Ri))

SUBB A, #data

94H

2

2

(A) = (A) - (C) - #data

Introduction to the AT89LP51RC2

26

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

13

Arithmetic Operations (INC)
Mnemonic

Opcode

B C

Function

INC A

04H

1

1

(A) = (A) + 1

INC Rn

08H-0FH

1

1

(Rn) = (Rn) + 1

INC direct

05H

2

2

(direct) = (direct) + 1

INC @Ri

06H-07H

1

2

((Ri)) = ((Ri)) + 1

INC DPTR

A3H

1

2

(DPTR) = (DPTR) + 1

Introduction to the AT89LP51RC2

27

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Arithmetic Operations (DEC)
Mnemonic

Opcode

B C

Function

DEC A

14H

1

1

(A) = (A) - 1

DEC Rn

18H-1FH

1

1

(Rn) = (Rn) - 1

DEC direct

15H

2

2

(direct) = (direct) -1

DEC @Ri

16H-17H

1

2

((Ri)) = ((Ri)) - 1

Introduction to the AT89LP51RC2

28

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

14

Arithmetic Operations (Other)
Mnemonic

Opcode

B C

Function

MUL AB

A4H

1

2

(B15–8 ), (A7–0 ) = (A) x (B)

DIV AB

84H

1

4

(B15–8 ), (A7–0 ) = (A) / (B)

DA A

D4H

1

1

Converts (A) to BCD

Introduction to the AT89LP51RC2

29

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Logic Operations (AND)
Mnemonic

Opcode

B C

Function

ANL A, Rn

58H-5FH

1

1

(A) = (A) AND (Rn)

ANL A, direct

55H

2

2

(A) = (A) AND (direct)

ANL A, @Ri

56H-57H

1

2

(A) = (A) AND ((Ri))

ANL A, #data

54H

2

2

(A) = (A) AND #data

ANL direct, A

52H

2

2

(direct) = (direct) AND A

ANL direct,
#data

53H

3

3

(direct) = (direct) AND #data

Introduction to the AT89LP51RC2

30

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

15

Logic Operations (OR)
Mnemonic

Opcode

B C

Function

ORL A, Rn

48H-4FH

1

1

(A) = (A) OR (Rn)

ORL A, direct

45H

2

2

(A) = (A) OR (direct)

ORL A, @Ri

46H-47H

1

2

(A) = (A) OR ((Ri))

ORL A, #data

44H

2

2

(A) = (A) OR #data

ORL direct, A

42H

2

2

(direct) = (direct) OR (A)

ORL direct,
#data

43H

3

3

(direct) = (direct) OR #data

Introduction to the AT89LP51RC2

31

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Logic Operations (XOR)
Mnemonic

Opcode

B C

Function

XRL A, Rn

68H-6FH

1

1

(A) = (A) XOR (Rn)

XRL A, direct

65H

2

2

(A) = (A) XOR (direct)

XRL A, @ Ri

66H-67H

1

2

(A) = (A) XOR ((Ri))

XRL A, #data

64H

2

2

(direct) = (A) XOR #data

XRL direct, A

62H

2

2

(direct) = (direct) XOR (A)

XRL direct,
#data

63H

3

3

(direct) = (direct) XOR #data

Introduction to the AT89LP51RC2

32

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

16

Logic Operations (Other)
Mnemonic

Opcode

B C

Function

CLR A

E4H

1

1

(A) = 0

CPL A

F4H

1

1

(A) = (A’)

RL A

23H

1

1

Rotate (A) Left

RLC A

33H

1

1

Rotate (A) Left Through Carry

RR A

03H

1

1

Rotate (A) Right

RRC A

13H

1

1

Rotate (A) Right Through Carry

SWAP A

C4H

1

1

(A3-0 ) ↔ (A7-4 )

Introduction to the AT89LP51RC2

33

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Data Transfer (MOV 1 of 3)
Mnemonic

Opcode

B C

Function

MOV A, Rn

E8H-EFH

1

1

(A) = (Rn)

MOV A, direct

E5H

2

2

(A) = (direct)

MOV A, @Ri

E6H-E7H

1

1

(A) = ((Ri))

MOV A, #data

74H

2

2

(A) = #data

MOV Rn, A

F8H-FFH

1

1

(Rn) = (A)

MOV Rn, direct

A8H-AFH

2

2

(Rn) = (direct)

MOV Rn, #data

78H-7FH

2

2

(Rn) = #data

MOV direct, A

F5H

2

2

(direct) = (A)

MOV direct, Rn

88H-8FH

2

2

(direct) = (Rn)

Introduction to the AT89LP51RC2

34

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

17

Data Transfer (MOV 2 of 3)
Mnemonic

Opcode

B C

Function

MOV direct1,
direct2

85H

3

3

(direct1) = (direct2) (source)
(destination)

MOV direct, @Ri 86H-87H

2

2

(direct) = ((Ri))

MOV direct,
#data

75H

3

3

(direct) = #data

MOV @Ri, A

F6H-F7H

1

1

((Ri)) = A

MOV @Ri, direct A6H-A7H

2

2

((Ri)) = (direct)

MOV @Ri, #data 76H-77H

2

2

((Ri)) = #data

MOV DPTR,
#data16

90H

3

3

(DPTR) = #data15-0 (DPH) =
#data15-8 (DPL) = #data7-0

MOVC A, @A +
DPTR

93H

1

3

(A) = ((A) + (DPTR))

Introduction to the AT89LP51RC2

35

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Data Transfer (MOV 3 of 3)
Mnemonic

Opcode

B C

Function

MOVC A, @A +
PC

83H

1

4

(A) = ((A) + (PC))

MOVX A, @Ri

E2H-E3H

1

2

(A) = ((Ri))

MOVX A,
@DPTR

E0H

1

2

(A) = ((DPTR))

MOVX @Ri, A

F2H-F3H

1

1

((Ri)) = (A)

MOVX
@DPTR,A

F0H

1

1

((DPTR)) = (A)

Introduction to the AT89LP51RC2

36

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

18

Data Transfer (Other)
Mnemonic

Opcode

B C

Function

PUSH direct

C0H

2

2

(SP) = (SP) + 1 ((SP)) = (direct)

POP direct

D0H

2

2

(direct) = ((SP)) (SP) = (SP) - 1

XCHA, Rn

C8H-CFH

1

1

(A) = (Rn)

XCHA, direct

C5H

2

2

(A) = (direct)

XCHA, @Ri

C6H-C7H

1

2

(A) = ((Ri))

XCHD A, @Ri

D6H-D7H

1

2

(A3-0) = ((Ri3-0 ))

Introduction to the AT89LP51RC2

37

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Boolean Variable Manipulation
Mnemonic

Opcode

B C

Function

CLR C

C3H

1

1

(C) = 0

CLR bit

C2H

2

2

(bit) = 0

SETB C

D3H

1

1

(C) = 1

SETB bit

D2H

2

2

(bit) = 1

CPL C

B3H

1

1

(C) = (C)

CPL bit

B2H

2

2

(bit) = (bit)

ANL C, bit

82H

2

2

(C) = (C) AND (bit)

ANL C, bit’

B0H

2

2

(C) = (C) AND (bit’)

ORL C, bit

72H

2

2

(C) = (C) OR (bit)

ORL C, bit’

A0H

2

2

(C) = (C) OR (bit’)

MOV C, bit

A2H

2

2

(C) = (bit)

MOV bit, C

92H

2

2

(bit) = (C)

Introduction to the AT89LP51RC2

38

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

19

Program Branching (1 of 3)
Mnemonic

Opcode

B C

Function

ACALL addr 11

AAA10001

2

3

(PC) = (PC) + 2 (PC10-0 ) =
page address

LCALL addr 16

12H

3

4

(PC) = addr15-0

RET

22H

1

4

Return from ACALL/CALL

RETI

32H

1

4

Return from interrupt

AJMP addr 11

AAA00001

2

3

(PC) = (PC) + 2 (PC10-0 ) =
page address

LJMP addr 16

02H

3

4

(PC) = addr15-0

SJMP rel

80H

2

3

(PC) = (PC) + 2 (PC) = (PC) +
rel

JMP @A +
DPTR

73H

1

2

(PC) = (A) + (DPTR)

Introduction to the AT89LP51RC2

39

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Program Branching (2 of 3)
Mnemonic

Opcode B

C

Function

JZ rel

60H

2

2/3

(PC) = (PC) + 2 IF (A) = 0 THEN
(PC) = (PC) + rel

JNZ rel

70H

2

2/3

(PC) = (PC) + 2 IF (A) ≠ 0 THEN
(PC) = (PC) + rel

JC rel

40H

2

2/3

(PC) = (PC) + 2 IF (C) = 1 THEN
(PC) = (PC) + rel

JNC rel

50H

2

2/3

(PC) = (PC) + 2 IF (C) ≠0 THEN
(PC) = (PC) + rel

JB bit, rel

20H

3

3/4

(PC) = (PC) + 3 IF (bit) = 1
THEN (PC) = (PC) + rel

JNB bit, rel

30H

3

3/4

(PC) = (PC) + 3 IF (bit) = 0
THEN (PC) = (PC) + rel

JBC bit, rel

10H

3

3/4

(PC) = (PC) + 3 IF (bit) = 1 THEN
(bit) = 0 and (PC) = (PC) + rel

Introduction to the AT89LP51RC2

40

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

20

Program Branching (3 of 3)
Mnemonic

Opcode B C

Function

CJNE A, direct,
rel

B5H

3

4

Compare and jump if not equal
rel

CJNE A, #data,
rel

B4H

3

4

Compare and jump if not equal
rel

CJNE Rn, #data, B8H-BFH
rel

3

4

Compare and jump if not equal
rel

CJNE @Ri,
#data, rel

B6H-B7H

3

4

Compare and jump if not equal
rel

DJNZ Rn, rel

D8H-DFH

3

3

Decrement and Jump if not zero

DJNZ direct,rel

D5H

3

4

Decrement and Jump if not zero

NOP

00H

1

1

(PC) = (PC) + 1

Introduction to the AT89LP51RC2

41

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

The 8051 Assembly Language
Instruction
• An Assembly language instruction consists of four
fields:
[label : ]

mnemonic [operands]

[;comment]

• Examples:
L1:

MOV A, #’*’ ; Load Acc with ASCII for ‘*’
NOP
; We can just have comments!
L3: ; We can also place labels anywhere
DJNZ R0, L3
Introduction to the AT89LP51RC2

42

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

21

Writing and compiling an 8051
assembly language program
EDITOR
myfile.asm

ASSEMBLER
myfile.lst
myfile.hex

Microcontroller chip
or soft-processor

Introduction to the AT89LP51RC2

43

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

AT89LP51RC2 Block Diagram
Interrupt
Control

MOVC
32k FLASH
ROM

MOV

MOVX

256 bytes
RAM

1152 bytes
XRAM

Timer 2
Timer 1

8-bit bus

Internal
Interrupts

External
Interrupts

Timer 0

CPU

Oscillator

(Simplified)

BUS
CONTROL

5 I/O
PORTS

SERIAL
PORT

TXD

RXD

Notice the different
instructions to
access the different
memory spaces!

P0 P1 P2 P3 P4
Introduction to the AT89LP51RC2

44

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

22

Adding an LCD
5V

VSS (1)
VDD (2)
V0 (3)

(2)

P1.1

(3)

P1.2

(4)

P1.3

2k

RS (4)
RW (5)
E (6)
D0 (7)

AT89LP51RC2

(12)

P3.2

(13) P3.3
(14)
(15)

P3.4
P3.5

D1 (8)
D2 (9) LCD
D3 (10)
D4 (11)
D5 (12)
D6 (13)
D7 (14)
A (15)
K (16)

• Example configures
LCD in 4-bit mode.
Saves pins and wires!
• Standard Hitachi
HD44780 controller
• Pin assignments
arbitrary, but source
code must match
wiring
•Pins 7, 8, 9, 10, 15,
16 not connected.

Introduction to the AT89LP51RC2

45

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Soldering Wires to LCD

Introduction to the AT89LP51RC2

46

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

23

AT89LP51RC2/LCD

Introduction to the AT89LP51RC2

47

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Lab 1 Demo
• ‘LCD_test_4bit.asm’: this a test program for the
AT89LP51RC2/LCD with the pins as shown in
previous slides. Test program prints ‘A’ in
column 1 of row 1, and ‘B’ in column 3 of row 2.
• Write your name (or a short version of it!) on row
1. Write your student number in row 2.
• Add extra functionality/features for extra marks.
• This lab could take you a long time to complete.
Start early!
• Be as neat as possible. You’ll be using the
AT89LP51RC2/LCD system for the next three
weeks!
Introduction to the AT89LP51RC2

48

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

24

Save your ICs!
• Integrated circuits (ICs) are delicate
devices that can be damaged easily by:
– Applying an inappropriate voltage.
– Connecting live signals to the IC when not
power up.
– Electrostatic discharges. This happens
frequently!

Introduction to the AT89LP51RC2

49

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

Chairs Available in labs

Introduction to the AT89LP51RC2

50

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

25

Electrostatic Discharges and The
Blue/Gray Chairs of Death!
• Some of the chairs in MCLD labs are blue/gray.
• The blue/gray chairs are NOT really designed
for an electronics lab use: they don’t dissipate
electrostatic charge. The black foamy chairs
are designed for lab use: they dissipate
electrostatic charge.
• If you are wearing a sweater, the air is dry, and
you are seating in a blue chair you will likely get
charged. If you discharge through your circuit it
may permanently damage the ICs. Solution:
before touching your circuit, touch the grounded
metal rack in the work bench.
Introduction to the AT89LP51RC2

51

© Jesús Calviño-Fraga, 2009-2019. Not to be copied, used, or revised without
explicit written permission from the copyright owner.

26



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