MP00615_VT72_Volume_2 MP00615 VT72 Volume 2

MP00615_VT72_Volume_2 MP00615_VT72_Volume_2

User Manual: MP00615_VT72_Volume_2

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~----------------------------------~---------------------.----------------------------~----------------------------'--------------------------------~
''THE MATERIAL HEREIN IS FOR INFORMATION PURPOSES ONLY
''THIS DRAWING AND SPECIFICATIONS, HEREIN, ARE THE PROPERTY OF DIOITAL EQUIPMENT CORPORATION
ANO IS SUBJECT TO CHANGE WITHOUT NOTICE. DIGITAL EQUIPMENT
COHPORATION ASSUMES 1110 RESPONSIBILITY FOR ANY ERRORS
WHICH MAY APPEAR HEREIN."

AND SHALL NOT BE REPRODUCED OR COPIED OR USED IN WHOLE OR IN r'ART AS THE BASIS FOR THE MANU.
FACTURE OR SALE OF ITEMS WITHOUT WRITTEN PERMISSION, COPYRIGHT ©19~/8
,DIGITAL EQUIPMENT
CORPORATION,"

(

1

VT72T FIELD MAINTENANCE PRINT SET

B-TC-VT72T-,0'-2

VT72T UNI'f ASSY

A-PL-VT72T-,0'-,0'

16K 16 BIT DYNAMIC F.EAD/WRITE MEMORY

A-PL-MSVl1-DC-~

32K 16 BIT MOS MEr.'

D-CS-M8,0'44-,0'-1

32K 16 BIT MOS MEM

D-UA-M8,0'44-,0'-,0'

ASYN LINE INTERFACE

A-PL-DLV11-F-,0'

ASYN LINE INTERFACE

D-CS-M8,0'28-,0'-1

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UNIT VARIATIONS
COVERED BY THIS
PRINT SET

VT72T-A.2\
VT72T-AB
VT72T-BA
VT72T-BB

VT72T/VOL 2

1----

ASYN LINE INTERFACE

D-UA-M8,0'28-,0'-,0'

Fi0!d Msintenance

PACKAGING INSTRUC'l'IONS VT72/T DISPLAY

A-SP-3700364-0-0

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QUANTITY VARIATION

MAYNARD, MASSACHUSETTS
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ENG

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7 MAR 78

DATE

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NO.

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DESCRIPTION

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MSV11-D!E BLOCK DIAGRAM
MSVll-D/E FLOW DIAGRAM
MSVll-D SYSTEM SPECIFICATION
MSV11-D!E TIMING DIAGRAM
MSV11-D SHIPPING LIST

i

!REF
IREF
IREF
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,

•
TITLE

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LDEC fORM
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MSV11-D (32K - 16) MOS
MEMORY SYSTEM

ASSYft;o.

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1
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MAVNARD MACSACHUSETTS

INSTA PlCI DI"LAY

YO 71"*

PACI{AGING INSTRUCTION

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iITL.!!:

IN:lm PltG D I !j t' LA V VT. 'I 21<::

TOPPOAIIMD

MATERIAL REQUIREMENTS
Quantity

l'luduloe SpecillCltion No.
Regular Slolled Carton (with
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Carton SeaUn. Tapa

9906261
7ft

9905729

j .

PACKAGING INSTRutTlONS
Step

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VT1211

I'IocedIft

I.

O""n Reglliar Siolled Clrton (9906261). Remove top fuam pad. top corrupted pad. front .pacer and
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.

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Place corrupted IIddle on workbench.

3.

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4.

Place keyboa,d un f,ont space, with fe.t placed Into hoi... (Spacer bar face. away from foam.)

5.

Slide front spacer and keyboard Into slot In foam on IIdelie.

6.

Using hand-holes. pick up IIddl. and slid. Into foam~lned carton.

7.

Ruute wires and cable. behind termlnollnd along top curved portion of tesmlnol cover.

8.

Place tOp pad on top of terminal. (Foam block is positioned to tho rear.)

9.

Place top foam pad on top of terminal.

10.

"

..•.~~....-.._ _ _ _ _ IIEGULM 1ID\'TI1)_

IWITH INTERIOR PMI'II
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"THE MATERIAL HEREIN IS FOA INFORMATION PURPOSES ONLY
AND IS SUBJECT TO CHANGE WITHOUT NOTICE. DIGITAL EQUIPMENT
CORPORATION ASSUMI:S NO RESPOII:SIBILITY FOR ANY ERRORS
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AND SHALL NOT BE FlEPRODUCED OR COPIED OR USSD IN WHOLE OR IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT WRITTEN PERMISSION. COPYRIGHT
,DIGITAL EQUIPMENT
CORPORATION."

;

C>1978

,

li~O:l.ts @~ ©@~J1i~!;'JiJQ·
VT72 FIELD MAINTENANCE PRINT SET
VT72 BASIC ASSY
VT72 BASIC ASSY (PL)
PRODUCT SPEC.
LK¢5 INTERFACE
LK¢5 INTERFACE
LK¢5 INTERFACE (PL)
KYBD INTERFACE
LK¢5 TO LSI-II BUS INTERFACE
VT7I CONTROL SECTION
VT7I CONTROL SECTION
VT71. CONTROL SECTION (PL)
VT7I CONTROL SECTION
CONTROL MODULE
VT7I VIDEO
VT7I VIDEO
VT7I VIDEO (PL)
VT7I VIDEO
VIDEO MODULE
VT7I BUS GRANT BOARD
VT7I BUS GR~NT BOARD
VT7I BUS GRANT BOARD (PL)
VT7I BUS GRANT BOARD
P.S. UNIT ASSY
BOOTSWITCH & BRIGHTNESS CONTROL
BOOTS WITCH & BRIGHTNESS CONTROL
BOOTSWITCH & BRIGHTNESS CONTROL (PL)
BOOTSVlITCH & BRIGHTNESS CONTROL
MODULE ECO HISTORY
H78¢ POw~R SUPPLY
ASSY/DRILLING HOLE LAYOUT
PROCESSOR
MODULE ECO HISTORY
PROCESSOR
HARNESS, A.C. POWER
HARNESS, D.C. POWER
TRANSFORMER ASSY
HARNESS, SPEAKER
CABLE, VT72 KEYBOARD
CABLE, BRIGHTNESS POT
LOGIC ASSY
VT72 BACKPLANE
,

B-TC..,VT72-¢-7
·E-UA-VT72-¢-¢
A-P:G-VT72-¢-¢
A'-SP-VT72-¢-2

C-IA·70I2576-o-0
A-SP-VT72-0-5

B~MH-M8656..,¢-6

D-UA-M8656-¢-¢
B-PL-M8656-fd-¢
D-CS-M8656-¢-1
A-SP-M8656-¢-8
B-MH-M8657-YA-6
D-UA-M8657-YA-¢
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D-UA-M8659-¢-¢
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UNIT VARIATIONS
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pmC'JTS~T

VT72.-AA
VT 71.. -Af"

V1r12/VOl2
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D-CS-54II776-0-I
D-AH-54II776-o-5
A-PL-KDII-HA
B-:-MH-M7270-o-6
D-CS-:17270-0-I
E-IA-70I5568-o-0
D-IA-7015543-0-0
D-IA-70I55I7-0-0
C-TA-70J2279-0-0
D-IA-70I46n'7-05
C- IA-7012l}46-0-0
D-AD-70I4609-0-0
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DIGITAL EQUIPMENT CORPORATION

N~~,(J~PORATION
MAYNARD, ~SS~~AUSETTS

DIGITAL

QUANTITY VARIATION

MAYNARD, MASSACHUSETTS

PARTS LIST

MADEBY R. ROBICHAUD
DATE
ENG
DATE

24 PEB 7B

ITEM
NO.

DWG NO./PART NO.

MADEBY R. ROBICHAUD

1
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3

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50
51

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13

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14

1210299-00

15
16

9008423-00
9006023-01

17

9006633-00

18
19

D-MO-7419542-0-0
9006021-01

SCREEN
SCR, PHL PAN HD 6-32 X .31

1
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1
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20

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4

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2
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1

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54

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8

8

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4

4

B-MO-7415829-0-0

SPACER

4

4

1

1

57

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9006071-03

DATE
PROD
DATE

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CHECKED A{.(,

MADEBV R. ROBICHAUD
24 PEB 78
DATE
ENG
DATE

D-UA-M8656-IIl-lf

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DATE

27

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MADEBY R. ROBICHAUD

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TITLE

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TAG SERIAL

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C-IA-7420604-0-0

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DATE
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24 FEB 78

NO.

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TITLE
VT72 BASIC ASSEMBLY

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DEC FORM

"DRAnO

OF

4

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pl.1

NUMBER

VT72-,,-fII

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ENGINEERING SPECIFICATION

.,,

DIGITAL EQUIPMENT CORPORATION
MAYNARD, MASSACHUSETTS

TITLE

,.-

ENGINEERING SPECIFICATION
TITLE

DATE 2/28/78

VT72 PRODUCT SPECIFICATIONS

REV

~

...

CONTINUATION SHEET

Section 0 - OVERALL DESCRIPTION

.'}

The VT72 is an LSI-Il based upper/lower case intelligent terminal
programmed to perform complex editing tasks by interaction
between the user, the keyboard and a rast~r scan display.

.~

REVISIONS
IcHG NO

DESCRIPTION

~.~

VT72 HARDWARE SPECIFICATIONS

•

APPD BY

DATE

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Most of the features of this terminal will be defined by software.
These features will be listed in the section under "OVERALL
EDITING FEATURES", but will only describe the hardware necessary
to interact with the software to make an editing terminal. A
separate document will describe the software and detailed
features of the VT72 as an editing terminal_
The VT72 is a table-top unit with monitor, keyboard, power supply,
logic, fans, etc., in the one enclosure. Quad or half-quad
modules plug into a double system unit wired assembly. There
is room in the wired assembly for expansion to 28K of memory
and/or expansion of other Q bus controllers. See the appendix
for the layout of the wired assembly_
As shown in the block diagram in the appendix, the VT72 is a
standard LSI-ll with the addition of two special modules to
drive the display, and one special module to read the keyboard
and drive the keyboard lights. All other modules are standard
LSI-ll modules •
The basic VT72 does not contain mass storage although room for
expansion of the Q bus to include a floppy disk control is
available in the basic VT72_ The VT72 without mass storage is
loaded from a host computer via the DLVII-F serial asynchronous
line interface module.

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VT72 HARDWARE SPECIFICATIONS

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ENGINEERING SPECIFICATION

CONTINUATION SHEET

TITLE

VT72 HARDWARE SPECIFICATIONS

~-.

General

- 15" Alphanumeric Display

.-

- 24 Rows of Characters

r

- 80 Characters per Row

These are the general specifications of the hardware but do point
out features possible when software is added. If the feature is
performed by software, this fact is noted in the feature description •
1.0.1

The displayable screen area is 240 horizontal
sweep lines, each line made up of 800 dot positions.
A character is made up of a 10 X 10 dot matrix.
The screen is therefore made up of 24 character
rows, and each row contains 80 chara~ters.

1.0.2

Individual characters can be displayed in normal,
reverse video, bold and underline modes. These
modes are additive, ie., bold reverse video.
Under program control, ir.dividual characters can
also be made to blink. They can be made halfintensity by displaying the character on alternate
sweeps. The only limitation to cr~racter display
modes is that there should not be more than 20
changes in display mode per character roW. For
example, 10 non-contiguous reverse video (or bold
or blink or underline) blocks of characters can be
displayed in the same row as 10 non-contiguous
blocks of ·characters. If the limitation. is exceeded,
the screen will flicker.

- 256 Code Extended Character Set
- 4 Special Display Modes

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- Blink

i

- Bold

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- Half Reverse Video

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- DEC Standard Main Keyboard

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- On/Line or Off/Line Operation

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An alternate method of programming is available for
applications that require extensive character mode
changes. The programmable character set of 256
characters can be used to describe characters of
different display modes. For example, the first
128 characters could be normal while the second
126 characters could be the same characters except
in reverse video.

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CONTINUATION SHEET

Section 1 - SPECIFICATIONS
1.0

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VT72 User Specifications summary

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NUMBER

VT72-~-2

SHEET _2_ OF .2L

DEC fORM NO EN·DI022,l6-N37D-(3,1)

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ENGINEERING SPECIFICATION
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ENGINEERING SPECIFICATION
TITLE

VT72 HARDWARE SPECIFICATIONS

1.1

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ENGINEERING SPECIFICATION

CONTINUATION SHEET

. TITLE

Display Monitor

1.3

1.2

The method of accessing text in memory is similar to the 3-cycle
data break of the PDP-8. In the VT72, a wired address contains
a pointer of address to a list of parameter words and text
.
address. This list is called a DISPLAY TABLE. A 16 bit parameter
word and a 16 bit text address define a block of text to be
displayed on the sc'reen. These two words are .in consecutive
memory locations.

Keyboard (LK05 Var. -01)

The PARAMETER WORD is a 16 bit word. The least significant 11
bits of the parameter word are the number of characters to be
displayed. Another 4 bits in this 16 bit word define whether
the text is to be blank, bold, underline or reverse video.
The most significant bit (if a one) connects the parameter
word to a JUMP instruction so that the contents of the next
memory location are jammed into the word address.. This fe~ture
and the bit assignment of these two 16 bit words is detailed
in the section on programming.

There are two function pads, each containing 18 keys. The
right most function pad has 6 lights down each side of the pad.
The distance between the two pads is ~ a key width so 1.5 wide
key caps can be used to fill the space between the two pads.
In this case, the left most lights must be removed.
1.2.1

Unique Features

Some function pad keys produce one code when depressed
and another code when released. This allows the software
to carry out a function at an arbitrary speed which is
pleasing to, the human operator (ie., scroll) but start
and stop this function when the operator interacts with
the key. These keys are: the last 3 rows of the left
fUnction pad, the last 2 rows of the right function pad,
one key in the upper left corner of the right function
pad, and the repeat key on the main keyboard.

!
I

1. 2.2

The 16 bit text address word, also called a TEXT POINTER, is the
current address of the text being loaded into the display
controller shift register.
DISPLAY SEQUENCE - The display control reads text for the first
character row while a blank row above the normal screen area is
being displayed. The display control first reads the contents
of the wired address (INITIAL DISPLAY TABLE POINTER) and uses
it as an address to read the first par.ameter word and the
associated text pointer word into hardware registers in the
display control. The parameter word is used to determine the
display mode and to count the number of text characters to be
taken from memory. The display control used the text pointer
to address memory, increments the hardware register containing
this address and used hardware to count the number of characters
read from memory equals the number of characters that.were
previously read from the least significant 11 bits of the
parameter word.

Keycaps

This whole keyboard can be depopulated to tailor the
keyboard to a particular application. In addition, all
keycaps are removeable: keycaps can be ordered with clear
plastic tops with a user-changeable insert for legend.
See the LK05 purchase specifications for more information
on this keyboard. PS-30-l2538, var. -01.

, f

DEC FORM NO
DRA 108

I·I'

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EN-OI022-16-N37C)..(381)

"'-".' ,

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NUMBER
VT72-~-2

I

SHEET _5_ OF

-

VT72 HARDWARE SPECIFICATIONS

21

CONTINUATION SHEET

1.5

Characters are displayed ina 10 X 10 dot matrix. The whole
screen is comprised of contiguous 10 X 10 dots squares, 80 to
a line, in 24 lines, a total of 800 horizontal, 240 vertical dots.
Because spaces must be left between characters and between lines,
the actual character is usually displayed in a 8 X 8 matrix.
The 9th horizontal scan line in the 10 X 10 matrix is underline.
The 10th horizontal scan line is usually left blank as a space
between character lines. The VT72 character layout is shown in
the appendix. Computer convention shows numbering from 0 to 9
instead of 1 to 10.

SHEET _7_ OF

.

• .;o,,: .,:.t ~

"<"-:',_C'7':r'iO'~:._~"~

•

CONTINUATION SHEET

It is possible to change 1 or 256 characters in the character
generator since the software has control of memory contents and
therefore the starting address of the table, the length of the
table and the data describing the displayed character to be
associated with each ASCII code. Details of loading the
character generator is contained in the programming section.

The character generator is capable of displaying 256 unique
character codes. The c~aracter generator is loaded under
program con'trol when the terminal is first initialized. This
means that changing characters does not involve hardware changes,
only changes to a list in memory. This feature is known as a
"programmable character set".

SIZEICODEf
NUMBER
SP
VT72-~-2

VT72 HARDWARE SPECIFICATIONS

SHEET _6_ OF ~
;,';.~ ~-r: "".>;:,~~,,:,:..;.:-,-,.;.:;

The software starts this loading sequence by setting Bit 15. of
the Command and Status register. When the display controller
is finished displaying the current frame, it then reads the
contents of a jumper selectable address, the character list
pointer. The contents of this address is the starting address
of a table containing the character generator information.
These contents are read into a register that can be incremented
and used by the display controller as an address to do DMA's
from memory to the character generator RAM.

Character Generator

DEC FORM NO EN-OI022-16·N37<).(381)
ORA 108

ENGINEERING SPECIFICATION

"',- -: .,.~':'''::

TREV

The character generator is loaded from memory by the display
controller. This information contains 20 words for each ASCII
character plus the ASCII charaoter. These words are 16 bits
long.

There can be a large number of parameter word and text pointer
pairs to define BLOCKS OF TEXT. A block of text can be as
large as 2048 characters or as small as 1 character. For
example, the cursor isusuall~defined as a one character block.
Each contiguous piece of text not in the same display mode must
be a separate block. For example, if 3 words were displayed,
the first word normal video, the middle word reverse video and
the last word normal video, three blocks would define this
video presentation. Text, of course, can be contiguous in
memory or scattered in blocks throughout memory.

TA

...
~:;

NUMBER
VT72-11-2

The 10 horizontal and 10 vertical dots which define a character
are generated by 10 "words", each 10 bits long. There is one
10 bit word for each of 10 horizontal scan lines which make up
a character. Each 10 bit word therefore defines one horizontal
scan line of a character.

If the number of characters specified in the parameter word
have been read from memory by the display control, the display
control will pick up another parameter word and text pointer.
It will read the contents of the wired address, increment it
by two and write the incremented information back into the
memory. This incremented information will then be used as the
address of the second text address/parameter word/text pointer
pairs. The cycle then continues as before.

~
\',
/

DEC FORM NO EN.OI022-16-N37D-(38l)
ORA 108

TITLE

If EOT is detected, the display controller stops access from
memory until the whole display cycle is repeated.

1.4

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ENGINEERING SPECIFICATION
TITLE

I

Interface to LSI-Il

Text packed 2 characters to a 16 bit word is taken directly from
memory (DMA) into the display controller. The controller has two
shift registers that can store 80 cha~,~ct"rs each. One shift
register dl!ives the clisplay while the other is loaded from
memory. After a row of characters has been displayed, the
functions of the two shift re'gisters are reversed.

The parallel keyboard produces unique codes for each key. The
main keyboard is a DEC standard keyboard with the addition of
16 keys above the normal top row of keys.

r,

-

The monitor is a standard 15 inch CRT. There are 80 characters
per row, 24 rows: normal, blink, bold, underline and halfint~nsity reverse video.
Half-intensity by software of normal,
underline, and half-intensity reverse video is possible by
turning off selected portions of the display on alternate sweeps.
Blink rate is controlled by the software.

The sculptured keyboar" "..

i

I REV

COD~--' NUMBER

VT72 HARDWARE SPECIFICATION

-t~··

NUMBER
VT72-/II-2
..

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ENGINEERING SPECIFICATION

CONTINUATION SHEET

TITLE

VT72 SPECIFICATIONS

APPENDIX
VT72 Module Utilization

2.0

* Optional
~~

16K
using
MSVll-DC
MaS Kem

1
4
5
8
9
12
13
5

Not Used

LSI-ll
MSV11-DC 16K
DLVll-F Ser\
Display

28K.
using
MSVll-DC
MOS Mem

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LSI-11
L~ MSvll-DC IlGK
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16K
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Grant Board
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4
5
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Control
Control
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video

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DEC FORM NO ENoOI022-1WU7o-1311J
DRA 101

...-

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CONnNUAnON SHEET

Processor

The VT72 Display Processor consists of a 1".8657-YA and M8658-YA
module. It is a microcontrolled device with DMA control over
the LSI-II bus. As such its operation is separate from the
LSI-II once its parameters have been set-up. The display will
continue even if the LSI-II has halted program execution. The
VT72 has a writable character store Which also operates as a
DMil function. The character set is totally in volatile memory
and must be rewritten at every power-up time. In addition,
the display has the ability to smooth scroll (pan) and detect
end of line (EOL) and end of screen (EOS).
The display processor generates a raster scanned video presentation composed of 240 scan lines made up of 800 dot positions.
A character is made up of a 10 X 10 dot matrix. The raster is
therefore made up of 24 character rows each containing 80
characters. See Purchase Spec. 30-12537 for a timing diagram
of the video information.
3.0

ProqraGUDing

3.1

VT72 Command And Status Register 177670 !Standardl

Pan Offset

10

..
;}

11

i¥

~

Enable Character Detection

.,

14

Enable Display'

1i
.,.

._.

nable Character Modification

"

li

2
3
6
7
10
H·
14

Note: If no
MRVll-vc in Conf.
substitute grant
board in slot.

SHEET

-!!..

It is very important to remember that register is not a hardware
register. It is a window into the microcontroller. The controller
will only look at these bits at the correct time in relationship
to raster on the screen. However, this does allow the unique
ability of being able to redefine any single character Whils
displaying. The microcontroller will use the vertical fly-back
time to do this, and the screen will never flicker. The
programming concepts will be discussed later. However. the

I REV

IS~E /CODE/
NUMBER
SP
VT72-fl-2

"'-I ..1I

DRA 101

REV

SHEET~OF~

..c.

-

ENGINEERING· SPECIFICATION

<:>

TITlE

VT72 SPECIFICATIONS

TITLE

VT72 SPECIFICATIONS

o

ASCII Character

& 200
1 & 201
2 & 202
3 & 203

individual bits will be identified now.
3.1.1

Pan Offset: ~itr3.~

1

2
3
4
5
6
7
8
9

I
i

j

3.1.3

I
I·

I

11

12
13
14
15
16
17

I

1.

ENGINEERING SPECIFICATION
VT72 BPBCIFICATIONS

.11.

III.
IV.
V.
2.

A.

A

random pattern. of lines and characters
will be displayed while writing. Finally
before the display is· enabled a. strange.
pattern may be left on the screen.

B.

While the CLP will contain the last loaded
address after writing the CLP will contain
a random address once the enable bit is
turned on.

I SI~E IC.O. DEI
...LAi SP

11-

,.; _......

CONTINUATION SHEET

TUlE

3.2

VT72 SPECIFIcATIONS

360
362
364
366
370

XXO

XXlO

.3.2.1

3.2.2

Write the character set and read display
on (MOV #100146, @ #177670).

.If the micro con'::roller is displaying:

COnly one Character may be written at a time or the
display may flicker.
.

C.

If, however, it is desirable to·write the entire
character set as·· long as the last 2 lines of text
are blank the display will go blank for the 'write
time.
'

CONTINUATION SHEET

Vector Pair
PC';]
PS
CLP - Character List Pointer
DTP - Display Table Pointer
IDTP - Initial Display Table Pointer

Vector Pair:

Character List Pointer:

Should contain the first address of the character list
before the enable character modification bit is set. The
location may be used to determine whell the micro controller
is done since it returns the last loaded address to the
CLP when done.

micro-controller is ready to display.

B.

--2l-

Standard PDPII interrupt v ~tor pair micro controller
interrupts here every vsync time.

(Be sure bit has

The last loaded address will be returned to the CLP
and won't change because the display is already on.

OF

Hardware Vectors (POinters)

XX2
XX4
XX6

on display (screen should be
blank because EOS has not been defined).

A.

-!!...

VT71

TUrn

The

-

ENGINEERING SPECIFICATION

Set 'up IDTP (Section 3.2.4) to point
to EOS (Section 3.1.2) character.

Wait l/~O of a ·second.
been seen).

SHEET

~"'w ,~:;,;-.~u.,,,.4'..w-:;~+i~:.•L . .r...__ :

I REV

NUIIBER

VT72-~-2

DEC FORM NO EN-ol02z..16-N31~Ul1
DRA 108

Both the Enable Display and the Enable Character
Modification bits may· not be set if the micro is
not already displaying. This is due to the fact
that the micro-controller may see the Enable
Display bit before the Enable Character Modification
bit and destroy the contents of the CLP. (See
preceding Section Bl. Correct sequence of operation
would be as follows:
I..

Bit 15

If the micro controller is not displaying:

I REV

NUMBER
VT72-f6-2
SHEET 11- 01'

"'.....-.._~.~.._-,-........._"':.,

-

DRA 108

C.

Enable Character Modification:

Enable Character Detection: <;Bit ~

DEC fORM NO .N-0.0 ••-......71>1 ..,1

Bit 6

The list is terminated by a zero in the low order byte.
When the micro controller is done loading, the terminating
address "'ill be deposited in the ~LP. It is important
to note that several precautions are necessary here.

This bit enables the action of the special characters
for END OF LINE and END OF SCREEN. When bit 5 is a zero,
these characters are treated as any other characters.

ICODEI
ISIZE
A SP

END OF LINE
END OF LINE

This bit when set will initiate the writing of characters
at an address pointed to by ~LP (Character List Pointer).
Whenever this bit is set the pan value must be set to 6
or the characters will be offset. The enable display and
enable character detection bits may be on at this time.
However, only one character may be written without screen
flicker.

When scrolling the pan register may only be changed once
per vSYnc (discussed· later) and must be ·changed not less
than once every other ·vsync or the screen will flicker.
However, it may be incremented in an accelerating manner
to as much as a whole row per vsync and still look smooth.

TITLE

Enable Display

3.1.4

Ex: When the pan register equals 10, 8 scans of Row ~ are
displayed, 10 scans of Rows 1-23 and 2 scans of Row 24.
It is important to note that although only 24 rows of
text are displayed on the screen 25 rows are always loaded
by the micro controller. To scroll up start the pan
register at 6 and increment to 17 - to scroll down start
at 17 and decrement to 6.

3.1.2

END OF TEXT

END OF LINE

This is a write only bit that when set enables the terminal
to display. While displaying the microcontroller will
give an interrupt every vsync time. Vsync is defined
to be the time just after the microcontroller has loaded
from the pan register and after it has picked up the
initial address of the display list from the IDTP (Initial
Display Table Pointer). At this point either of these
values may be changed.

Pan Off..et
6
7
10

1

CONTINUATION SHEEt

These ("odes are detected byha.rdware but since the character
generator is programmable; the codes will be displayed.

This is a write only register which gives the display the
capability o£ smooth scrolling. The register has a legal
value range from 6 to 17. The value of 6 is the normal
pan offset. The pan bits must always have ~ value
whenever the register ilO lo.aded. Each increment of the
pan register offsets the screen by one scan:
Scan Line
0

-

ENGINEERING SPECIFICATION

CONTINUATION SHEET

3.2.3

Diselay Table Pointer:

This is the micro controller's correct Display Table
Address. Whenever the current display table's byte count
overflows the micro controller goes to the next display
adder by incrementing the address in this position by 4.•
3.2.4

Initial

Disela~

Table Pointer:

The micro controller loads the DTP from this address just
prior to vsync time.
3.3

Text

~'ormat 15

I

HIGH BYTE

87

0

I

LOW

I

BYTE

Text can start or stop on a high byte or low byte. The full
8 bits are decoded to form a character. The appendix lists
the standard 256 characters.

I

CODE I
NUMBER
I SIZE
A SP
V'l'72-f6-2
SHEET ~ OF

DEC FORM NO EN·010U-16-N37G-C381.
DRA 108

I REV

IS'l.E IC~~E I

E:.-

DEC FORtI NO EN-01Q22..16-N37G-(38U
DRA 108

NUIIBER
VT72-fl-2

1

REV

SHEET~ OF.~

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ENGINEERING SPECIFICATION
VT72 SPECIFICATIONS

TITLE

3.4

TITLE

L

9 sDf:6
5
3

2 1 0

EN-01022·16-N37G-{381j

ORA 108
?l!n'!~E!

..

I

NUMBER
VT72-fiJ-2

Scan I'

2

Scan

CONTINUATION SHEET

Bit 5

=

First

Ha~f

X

3

Scan 1

4

Scan 1

5

Scan 2

Scan 2

S

Scan 3

9

Scan 4

10

Scan 4

11

Scan 5

12

Scan 5

13

Scan 6

14

Scar.. 0

15

Scan 7

16

Scan 7

17

Scan S

IS

Scan 8

19

Scan 9

20

Scan 9

X
I

X
X

X
X
X
X
X
X

VT72 SPECIFICATIONS

I

X

I

I
I

X

X

I 1

X

X

X

I

SHEET ~ OF

EN-OI022-16-N37o-(381)

TiTlE

~~~NN~~~~~~~~~~~~~~~~~~~~~~~~~~~~wwro
~WN~~~OO~~~~wN~~~ro~~~~WN~~~ro~~~~wN~O~

I

X

ENGINEERING SPECIFICATION

~~~~~~~~~~~~~~~~~~~~~~~~~

;

,

I SIZE CODEI
NUMBER
A SP
VT72-f6-2

21

CONTINUATION SHEET

X

I

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ENGINEERING SPECIFICATION

X
X

REV

SHEET ~ OF

Bit 5 = 1'1
S .. cond Half

1

1'1

Scan 3

7 - 6 = 1 TO CONTINUE DEFINITION

I I

1

7

ITS FOR 1 SCAN LINE

SIZE CODEI
A
SP

Raster Scan

6

FIRST OR SECOND HALF OF THE SCAN

TITlE

..

VT72 SPECIFICATIONS

Word

I

Character Definition Word

ASCII ADDRESS

DEC FORM _NO

t~,

THE CHARACTER DEFINITION WORD FORMAT

The VT72 uses a 10 by 10 dot character matrix.
To c~lpletely
describe all the dots in the matrix requires 20 sequential
memory locations.
Each location contributes its low order 5
bits to the 10 X 10 matrix.
The first word describes the first
5 bits of Line 1'1, the second word the last 5 bits of Line 1'1.
However, the 5 bits in each word of the description appear in
reverse (mirror image) order. The hibyte of each word is the
ASCII Address (0-377) of the character being defined.
Bits
6 and 7 of the lobyte must always be a one (as zccos they
terminate the definition).
Bit 5 is set to a one in the first
half of a scan line, zero in the second half.

15 14 13 12 11 10

'"

ENGINEERING SPECIFICATION

CONTINUATION SHEET

Character Data Format

3.4.1

It

~

/

;

3.5

VT72 SPECIFICATIONS

-

REY

21

CONTINUATION SHEET

Display Table

The display table consists of one or more entries (Display
Blocks) each containing two elements. The parameter word
~hich contains the display information and the byte count.
Secondly the byte address where the display list begins.
The maximum total display blocks per line is 20.

-. -. -. -. -. .. -. -. -. .. .. -, .. .. .. .. .. -. -, .. -. .. .. .. .. .. .. .. .. .. .. -.
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................ '& ................ '&
/--' I--' I-' I--' I--' I--' I--' I--' I--' I--'

I--' t-' t-' I--' I--' I--' I--' to. I--' I--'

........ '&'&'& ................ ....
'& .... '& .................... "' ....
1-'1--'1-'1--'1--'1--'1-'1--'1--'1--'

1--'1-'1-'1--'1-'1-'1--'1--'1--'1--'
1--'1--'1--'1--'1-'1--'1--'1-'1--'1--'

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Display "Modes

~

~------------Blank

t'l:-3""~

Two's complement of the desired number of bytes to be
displayed using .this parameter word. Once the byte value
has overflowed the microcontroller will conti~ue on to
the next sequential parameter word and address pair. The
byte counts overflows at 3777 rather than ~ due to certain
hardware constraints. If Be = 3777 is loaded the micro
processor "ill go immediately to the next display block.

l'll'l~
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3.5.3

Xt'lOt'l
. tJ :-3'"

:-3
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1·2:..1

SHEET ~o,

I REV
OF.21_

I

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S'l.E

DEC FORM NO EN·OI022-16-Nl7o-,31l)
ORA 108

NUMBER
VT72-"- 2
SHEET

...2.2..

TREY
OF

21

ENGINEERING SPECIFICATION
TITLE

VT72 SPECIFICATIONS

...

CONTIi'4UATIONSHEET

NOTE:

When the display processor is heavily used 14-20
display units per line 30-45% of all processor
time will be devoted to D~m accessory for display.

3.5.4

Display Modes

These modes are tied to the particular block. The mode
will continue through the block until the. byte count
overflows
Then the next modes are loaded with the new
byte counto The microcontroller treats the blank bit
the same as the others so the display list for that block
must be valid (not EOL or EOS characters unless desired) •
0

3.5.5

Reverse Video:

Rever.ses the intensification of the character matrix.
3•5•6

Under line:

Turns on the 9th scan line.
3.5.7

Bold:

Intensified by two t:he character: matrix.
3.5.8

Blank:

Turns off the display during that display block. This
would generally be used to make the display blink.

·
I

;
.

-.!

ISA

IZE ICsOpDEI

DEC FORM NO
DRA 108

EN-01022-16-N37G-(381)

c

NUMBER

VT72-f,1-2
SHEET

-22:.

OF

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D-CS-M8656-0-1

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SWITCH

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1300195

RESISTOR 3) OHMS

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1300229

RESISTOR 100 OHMS l/4W

1/2~1

.:!: 5%

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RESISTOR 390 OHMS l/4W +5%

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RESISTOR 10 OHMS l/4W

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ISSUED ...."' •• ¥ ..
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~----.------

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PART NO.

DRAWING NO.

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CHL:cI<"I::OT. SflE'rAAWSKI
...... 2-23-76
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MADE BY J. WILLIAMS
9-15-75
DATE

NOTES:

QUANTITY / VARIATION

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'THIS DRAWING AND SPECIFICATIONS. HEREIN. ARE THE PROPERTY OF DIGITAL EQUIPMENl;
CORPORATION AND SHALL NOT BE REPRODUCED OR COPIED OR USED IN WHOLE OR IN
PART AS THE BASIS FOR THE. ~NUFACTURE OR SALE OF ITEMS WITHOUT WRITTEN
PERMISSION
COPYRIGHT C 1976
. DIGITAL EQUIPIoIENT CORPORATION"
IN-O I 14UA-16-R27613251
ORb 125

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D-vW- M86.56-c6 ~

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INSERTION PARTS LIST DATA BASE REV

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NOTES:

QUANTITY I VAnIATIO"

PA,rfrrS l~ST
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9-15-75
DATE

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R10-R21

12

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RESISTOR 270 OHMS 1!4W:,: 5%

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RESISTOR 6.8K

24

1309143-12

RESISTOR 25K POT

25

1.300365

RESISTOR 1K

1305346.

RESISTOR 27K 1/4W :': 5%

1

R30

27

1905547

IC 7474

4

E1.1, E33, E24, E32

28

1905575

IC 7400

1

E3

1905576

IC 7410

1

E13

30

1905578

IC 7430

1

31

1909686

IC 7404

2

29

1!4W:,: 5%

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1

R23

1

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2

R34, R35

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-

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(>.,

CHeCK!:!) T. SHETRAWSKI
DAT".... 2-23-76

-

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34

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35

1910436

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1

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36

1910655

IC 74157

2

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37

1910656

IC 74155

1

38

1911116

Ie 8837

2

39

1911579

IC 8641

40

1911911

n
33

41
42

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1912395
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.

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IC MH0026C

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"THIS DRAWING AND SPECIFICATIONS. HEREIN. ARE THE PROPERTY OF DIGITAL EQUIPMENt
CORPORATION AND SHALL NOT BE REPRODUCED OR Ci32OI
DRB 12.

flTLE

ASSY'lO.
LK05 INTERFACE

1/·d-9-"'.f86S6~t:/;> -:¢

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DIGITAL EQUIPMENT CORPORATION'

PARTS laST

MADE BY J. WILT,IAMS
DATE
9-15-75
.
eNG
IDA'
ITEM

NO.

EiI:r'•.....
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NOTES:

QUANTITY /VARIATION

.-

. CHECKED T, SHETRI\WSKI
IDATE
2-23-76
PROD, _ " . ,," '_.
DATE - ,. '''.- -, C -7(;,

5 E:CTION

1

IS!iiUJ:D.:n::1,i I

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.

DESCRIPTION

PART NO.

DRAWING NO.

----------------- --

REF DESIGNATION
1

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43

9008337-06

44

12-12204-00

45

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46

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47

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IC 74175

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PART AS THE BASIS FOR T"E, ~FACTURE OR SAL£,OF ITEMS WITHOUJ WRITT£N ' .
PERMISSION
COPYRIGHT
976
- DIGITAL EOUIPMENT CORPORATION"

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DIGITAL EQUIPMENT CORPORATION

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MAYNARD. MASSACHUSETTS

!U'u

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!!S

ENGINEERING SPECIFICATION

~i~
l! 0

TITLE

!ig

..

~

!i~

REV

J i~

•.DATE 2/27/76

M8656 LK05 TO LSI-II BUS INTERFACE
REVISIONS
~HG NO
DESCRIPTION

,5itll

ENGINEERING SPECIFICATION
TITLE

DATE

ORIG

APPD BY

M8656 LK05 to LSI-11 Bus Interface

.-

,

CONTINUATION SHEET

1.1

The M8656 is an interface betw

-id

A jumper enables the insertion of Halt on the LSI-II bus.
This level is asserted when an 8 bit delete 377/8 is transmitted
by the keyboard.

.'

;

An 8 bit switch selectable ID·code is available as the
high byte of the Keyboard Data Buffer. the low byte being
the keyboard ~ata.
3.0

PROGRAMMING

3.1

All software control of the M8656 is via 4 device addresses.
The addresses are consecutive and start at O. Bits 3-12· are
switch selectable.

i

~'I.#~ I~,. UL..~~
ORA l07A
••• u

¥':

......

'~-. • _-~

-.~.-:.o-:.~.~

ENGINEERING SPECIFICATION
TITLE M8656

A

...

r

flEe UH39ZI·1079A-R873

SIZE ICODE
SP

ISA

NUMBER
I REV
M8656-¢-8
SHEET --.l- OF ..2.-

ENGINEERING SPECIFICATION
TITLE

LK05 to LSI-11 Bus Interface

1

3.7
3.2 Keyboard Status Register

3.3

I
3.4

Not Used

Bit 7

Character Available - Read Only - set to J.
by keyboard strobe indicating a character has
been transmitted from the keyboard. Cleared by
addressing KBUF or INIT.

Bit 6

Keyboard Interrupt ENA - Read/Write - clea'.:ed
by INIT. If bit 6 is set an.d bit 7 is set. aa
interrupl: occurs.

Bit 5-0

Not Used

Keyboard Data Buffer

SHEET _2_ OF _5_

CONTINUATION SHEET

Address and Vector Assignments

Bit 7-0

Keyboard Data bits.

Vector
60/1'4

in which case it will interface with the ODT in -the LSi-II.
However. addresses starting at.76~ and all vectors up to
374 are possible.
3.8

SWitch Setable ID number

Halt Character
When enabled by a jumper. if 377/8 is transmitted from the
keyboard the Halt line on the LSI-II bus is·asserted for 1 MS.
This forces the processor into ODT.
.

4.0

40 Pin Pinning

LCSR

A - Keyboard Data
C

0
1

E

2

Bit 15-8

Not Used

Bit 7

Led Ready - Read Only - Set by INIT. Cleured when
LBUF is loaded. set after adjustable time :ielay.

H 3
K
4
M
Strobe

Bit 6

rnterru. ~ Enable. If bit 6 is set and bit 7 gets
set an interrupt occurs.

p

S

S

6

Not Used

U - Keyboard Data
X.W.Y +5
Z.BB.DD +5
-12
AA
-12
CC
.Led S
HH
Led 9
JJ
Led 4
KK
Led 9
JJ
Led 4
KK
Led 10
LL
Led 3
MM
Led 11
NN
Led 8
PP
Led{6
RR

7

Bit 5-0

LBUF

Bit lS-13

Not Used

Bit 12

Causes an audible click when set to a 1.

. Bit 11-0

TREV

LK05 to LSI-II Bus Interface

Address
177560
62
64
66

KBUF

Bit 15-8

Led Status Register

NUMBER
M8656-0"-8

The address and vector assignments may be set· to the standard
console, ie:

Bit 15-8

3.S Led Data Buffer

3.6

KBSR

M8656

I~~DET

..

DEC FORM NO OEC 16-(381)-1022"-N370
DRA 108
.

CONTINUATION SHEET

E

Causes individual leds to light.

Interrupts - Tw;:, interrupts. one for keyboard and one for Leds.
They operate independently except the keyboard has priority.

IS'l-E
DEC FORM NO DEC 16-{HII-I022-N370

]C~~EI

NUMBER

M8656-~-8

DEC FORM NO

-2_

7
1
6.
2

All other pins are

ISIZEICODEI
A I sp-

JREV

SHEET _3_ OF

DllAl08

Led
Led
Led
Led

SS
TT
UU
VV

qr~und.

NUMBER

M86S6-~-8

1

REV

SHEET _4_ OF _5_ .

DEC 16-(311)-1022-N370

DRA 108

t:',,:£:,,:,:,,"~~"';':;Zi.~=-----

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ENGINEERING SPECIFICATION
TITLE

LK05 to LSI-ll Bus Interface

H8656

5.0

CONTINUATION SHEET

Finger Pinnirig
AA2

+5

BIRQL

AL2

BRPLY L

AF2

BA2

•

+12

L
L
L
L
L
L
L

AD2
BD2
AP2
AU2
AV2
BE2
BF2
BH2
BJ2
BK2

BDAL .7 L
BDAL 8 L
BDAL 9 L,
BDAL l~ L

BBS7
BDAL
BDAL
BDA'L
BDAL
BDAL
BDAL
BDAL

53
1
2
3
4
5
6

A.J2
GND
GND

AC2
ATl

BL2

GND

BM2
BN2
BP2

BDC OK H

BC2
BA1

BDAL 11 L

BR2

UNUSED

AKI

BDAL 12 L
BDAL 13 L
BDAL 14 L
BDAL15 L
BDIN L
BDOUT L
BHALT L
BIAK I L*
BIAK 0 L*
BINIT L
BDHGILJ
BDMGOL

". BS2
BT2
BU2
BV2

AH2
AE2
API
AM2

BTL

ALL
UNUSED

BKl
BLl

UNUSED
UNUSED
UNUSED
UNUSED
UNUSED

Bcl
BDl
BEL

BFl
BHl

AN2

AT2
AR2
AS2

*These signals are not b\lss~d -. they are da:.sy chained.

C

These signals are connected together on the M8656.

NUMBER
M8656-0'-8 '
DEC FORM NO DEC 16-(381)-1022-N370
DRA 1CI'I

SHEET _ 5 OF __
5 _

--

--_

..... _-'---'-'-

•.. --~

fJ

~~~--~~'----------

•

8

T

7

I

6

5

I

4

3
COMPONENT SlOE. VIEW

't

1-5

RNORK INSTRUCTIONS:

o

'F
o

ECO "1
'WIRE ADDS SIDE 1:
1-1. AT Fl:ED-TJ.IRU ABOVE E24-15 TO PIN E2~-8
1-2. E2'3-a TO E25-5
I-a AT F"EED-TI-IRU A80VE AND CONNECTED
TO E4€H2 TO E2'3-Co
1-4.E49-11 TO E.23-9
1-5.E2'3-10 TO E2:!.-4
H .. E23-4 TO FINGER AK2 ON SIDE. 2. (SEE !5-7).
1-7. TO ACCOMPLISH NOTE 5-<:, A HOLE IS
NEE.DED TO PAc;,s THE WIRE mOM E23-4
ONTO SIDE 2. iHlS IS. TO BE DONE 8Y
REMOVING THE SOLDER AT THE. FEEDHOLE
ABOVE FINGER AL 1 (MAKING SURE THE HOLE
IS STILL PLATED). PASS THE INSULATED
WIRE THROUGH iHE CREAiED HOLE AND
SOLDER TO PIN AK2 (SEE SHEEr 5). THE L'CNC>TH
01=" WIRE ON SlOE 2 IS NOT TO EXCEED 1/2':
MAKE CERTAIN THE SIC,NAL CARRIED ElY THE.
'WIRE IS Nor SHORTED TO THE. SIGNAL
CARRIED BY THE FEED THRU.

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.lATIOH AND StiAU. NOT BE REPRODUCED OR COf'IEO OR USEE) IN VI-IOtE OR '" '.

,..;r.mn .

PAI.;, AS 1')0(1 tic.] ~ THE aNUFACTURE OH SALE OF lTr:.u;.wm;ouT
HRMISSIOH
COPYRIGIfT
1976
DfGrrAL ~!2~~ OY.~AT"N·
EN'01l40-16-N1075-(325)

'- 58 .'

..

DR. 124

-TITLE

-

'~SSY

VT71 CONTROL SECTION
~ft_

SHEET
~

SIZE CODE

NO.

D-U\-M8657-YA-~

.-

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2

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DIGITAL EQUIPMENT CORPORATION

(

,MADE BY K. GLEEZEN
2/19/76
DATE

I~~~c l
ITEM

NO

;,1; tj~f~~~'~"

PAHI~

LIST

CHECKEDK.GLEEZEN
I DATE . '"')
.
PROD ,j(1~'''~'-;'.u..4 l ......--.
DATE
'2:,- 2 ~ -7L.

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NOTE S:

QUANTITY / VARIATION

1

~
I

ISSUED ::iI:CTlON

1,

~

t!.

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1.0

DRAWING NO.

PART NO.

DESCRIPTION

ro
~

42

9006732

EYELET GS4-7

8

43

1211164-04

SWITCH D. 1. P.

2

REF. DESIGNATION

El, E9

Ii

(

0.
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DIGITAL EQUIPMENT CORPORATION

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MAYNARD. MASSACHUSETTS

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ENGINEERING SPECIFICATION
TITLE

~&i

1-'
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DATE 1/12/76

REV

DESCRIPTION

~]

REVISIONS
CHG NO

ORIG

DATE

APPD BY

.~.

..

ENGINEERING SPECIFICATION
TITLE

M86S7 CONTROL MODULE

CONTINUAnON SHEET

I;

M86S7 CONTROL MODULE

~

~~
S5

..

.~

DATE

1.1

The M86S7 is a control processor interface between the VT2l
Video Module(M86581 and the L~I-ll Bus. It is bo~ a DMA
and INT. device •

1.2

The M86S7 receives. from the M86S8. all status information

required to control the raster

~~:

~car. display.
It transmits
~r.~ data. control and

to the M8658. 16 bits of address

timing.

g:~

Ilii
• ·"l

1.3

!!Ia

POWER REQUIREMENTS:
+SVDC AT

i:sl

o!!e: a.

!r:i
ii!~
;:-Q.~

2.1

The module has switch selectable vector and device address.
There are three other addresses which will be called pointer
addresses. They are consecutive and will follow the selected
vector address.

3.0

DEVICE. VECTOR AND POINTER ADDRESS

8~!S

~g:~
i~i~

4.1 A MAX./3.0 A TYP.

-lE'
~olE>

Switch Off

l/On

U!!!

Device

Vector

177670

360

~i~i

~~i!

4.0

~

Pointer 1

BTl
CC2 - :
CJl
CMl
CTl
DC2
OJl
DM!
DTl
AE2
AF2
AH2
AJ2
AL2
AM2
AN2
AP2

,-GrID

BA2
CA2
DA2

Etlf-i 'IAI.J/~ .l1.' A/'~r

DRA l01A

SIZE /CODE

A

SP

NUMBER
M86S7-~-8

SHEET _1_

+12VDC

AD2
BD2
CD2
DD2

GND

AC2
AJI
AM!
ATI
BC2
BJ1
BM1

B
B
B
B
B
B
B
B

DOUT L
RPLY L
DIN L
SYNC L
IRQ L
IAK I L*
IAK 0 L*
BS7 L

/ REV

I SA E

-

OF _-_

~l&2

366

370

FINGER PINNING

I---+5VDC
_._--_._-AA2

;:;'T... • _ . ___ . ________

Pointer 2

364

DEC FORM NO

BDMGIL*
BDHGOL*
B INIT L

AR2
AS2
AT2
AU2
AV2
BE2
BF2
BH2
BJ2
BK2
BL2
BH2
BN2
BP2
BR2
BS2
BT2

BDAL~L

B DAL 1 L
BDAL2L
B DAL 3 L
B DAL 4 L
B DAL S L
BDAL6L
B DAL 7 L
BDALBL
B DAL 9 L
B DAL l~L
B DAL IlL
B DAL 12L
B ilAL 13L

I~~DEI

NUMBER

I REV

MB657-~-8

DEC 1.6-(J81)-1022-N370

SHEET _2_ OF _3_

ORA 108

ENGINEERING SPECifiCATION

~

CONTINUAnON SHEET

TITLE M8657 CONTROL MODULE

B DAL l4L
B DAL 1SL
SP CHAR. FLAG
LB,7 H
LB~6 H
LB~5 H
LB!64 H
LBJijJ rl
LB~2 H
LB!61 H
LB!6~ H
DIS. SCAN ~
SRL ~lH
DIS.ROW ~ COL20
DIS. ROW 25 H
~ FLAG
TIME 1 H
TIME 2 H
CLK 3
BLANK
!!OLD
CLK VSR
RC OVF
SCAN {I FLAG
TEXT ROW {I
COL 20 FLAG

~

BU2
BV2

CE2
CF2
CH2
CJ2
CK2
CL2
CM2
CN2
CP2
CR2
CS2
CT2
CU2
CV2
DE2
DF2
DH2
OJ2
DK2
DL2
DMZ
DN2
DP2
DR2

TEXT ROW 25
UNDERLINE
REV. VIDEO

COL 99 FLAG
DM OVF
CTP OVF 4
CTP OVF 3
B DMR L
CTP OVF 2
CTP 1
CLK 1 L
BOCOK H
IB DCOK H
CC OVF
CTP OVF 1
CTP OVF S
CTP OVF 6
B SACK L
Be OVP
Me WRITE RAM L
SRL {IS H
+3V-cTP
HB

HB

{l7 H
{l6 B

BB {IS H
BB {14 H

DS2
DT2
DU2
DV2
AEI
AFI
AHI
AN!
AR2
ASI
AVl
BAl
Bel
BIll
BEl
BFl
BHl
BNl
DRl
851
801
BYl
CAl
CBl
CCl
COl

HB {l3 H
CEI
HB ~2 H
CFl
HB {II H
CHI
HB {I~ H
CKl
CLK 4
CLI
PAN ~{I
CN!
PAN ~1
CPl
PAN {l2
CRI
PAN {l3
CSl
WRITE RAM(l1 L CUI
SRL {I{I H
cVl
Me SRL LO BYTE~ L DA1
MC SRL CLK
DB1
Me 400tSRL L
DCl
MC T.VID OFF L 001
Me CLK RC L
DEI
SRL {l7 ({II L
DFI
Me LOAD SR
DHI
Me TSC CLK L
DKl
Me TSC LOAD L
DLl
MCT. VID ON L
DN!
Me CLR 99 FLAG L DPI
Me CLR 20 FLAG DRl
eLK {I
DSl
Me REFRESH L
DUI
r.c PAN -9TSC L
DUL

R()'l'l;:.!

* These signals are not bussed - They are daisy chained.

{,

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NOTB:1.
All unlisted pins are unused LSI-II bus lines and _ t
not be used.

~.

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NUMBER
11865'1-1-8
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cml;:'ONE.NT DE:L-E.-S3 S IDE. 1 :
1-1. DE.LETE r.9" lOO0PF (P/N 1000(42)
1'2. DELE.TE C9S, lal00t:: i PIN 1000042)
1·:'lDEL.ETER39, 12.~.1. (PIN 1300247)
1'4- DELETE R4¢, 33011. (piN 1300295)
'COMPOt-lENT ..\')DS SID£ 1:
1'5. ADL) C9i", 12,£\lIlPF'(P/N 1002424)
l·Io.A,)D e98, l~PF' (PIN 7002424)
I-I,AOD R39, 1~1. (PIN 1300250)
. 1'8. ADD R4l2I) 22¢fL (PiN 1300271)

£CO"2
COMPONENT DELeTES SIDE1:
c-I.DELETE R,,~/2.Z0t1
IJoo2.71)
2·2.OELH£ D 7, IN'ID(J4(1YN//O~790)
2-3.D£L£Tf. RZ~331l (pIN 130(147)
COMPONENT IIDDS S/~ 1:
2·4. ,1100 R4(), 330S2 (1'/N1300l.95)

(m

2·5,qDD WH• .TIJMP£R(RNfIOO9/85)

c

2-CoI9OD Ii'Z '5, KJn.(1jII1.J()1311)

ECO"'3
COMPONENT DELETE SI DE 1 :

3;"1 DELETE R39, 150ft. (Io/N 1300250)
3-2 DflETE Wl4, JUMPER(WN 9009185)
COMPONENT ADDS SI DE I:

+

3-3 liDO R39.120 n. (PIN 1;X'247)
3-'1 ADD R43, 33.n.(P/N 1300197)

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NUIIBER :,""IR~,!~~
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PANEL SIZE
8.S QUAD
PANEL DATA DWC •• D-MO'760s619
PANEL IIAT'l
.052 T1-IK.
OTY. OF lAYERS
2
COPPER THICKNESS
1 OZ!
PTH. v" PRINT AND ETCH
1iD.1.£ INSERTED lIiIlII TII£S [R ~

DRILL SIZE

8

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DIGITAL EQUIP~'oI1IU.JT CORPORATION

PAmSJJST
J. WILLIAMS

CHECKE~

MADE BY
J. WILl,IAMS
DATE
11-10-75

tDATE,

1

2-24-76

ISSUED
ITEM
NO.

NOTES:

QUANTITY I VARIATION

1

DESCRIPTION

PART NO.

DRAWING NO.

".E;" I.un

REF DESIGNATION

1

- ----.,-----. -.---.---+-----Ir----------'-.,-.------+-.,--t---r--t---'r--t--II-:-+-II-:--+--I--I-----~-----------_I
2

.

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3

~~-----------r-------+-------.------------~--;r~~;-_+-+--r~r-~~-;-_+--+_~~----------------------------~
ETCHED CIRCUIT BOARD
5
5011896
t--+--,---------+-----f------------~--+-1---+---+-~~-+-+--I--+--+-+---l~'-+--t-----'-----------'- ..· - - - C93
6
1009678
CAP .047 Uf 16V
7

1001610-00

CAP.01 Uf·

65

9

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CAP

~47

20

C1-C7. C17.CIOO, C42-C51,C53-C59.C61-C7
C80-CS7. C10. c12. C14. C16. C26. C34-36 .
C29. C37-C41 ..

--'. _.._---_..... -.....

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CS. e9. C11. C13. C15. CIS. C19. C7S.
C79. C95. C96. C32. C27. C21-C25. C30.
C31

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10
11

1000042

1

C52

1100114

4

D1. D2. D3. D5

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--- --_
DIODE IN4742
1
..D6
1109502

12
13

-

14

1110994
1300195

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-

RES. 33 OHMS 1!2W

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15

>

RES. 120. OHMS 1!2W

16

....

17

1

R-"2

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1300243
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C97. c9S
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1300309
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20

1300447

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DIGITAL EQUIPMENT CORPORATION

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DATE 2/24/76

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!lU-

'TITLEM8658YA Video Module

.H

REV

S!i

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Ma658 SPECIFICATION

-.

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2124/ 6

A

M865aYA SPECIFICATION

I

JLW

2/3/7

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REVISIONS
CHG Ne

DESCRIPTION

ORIG

Me658YA Video Module

TITLE

ENGINEERING SPECIFICATION

!~Il

ENGINEERING SPECIFICATION

DATE

APPD BY

CONTINUATION SHEET

1.1

The e658YA is a video control interface between the VT7l
Display Monitor and the M8567YA Control Module.

1..2

The 8658YA receives, from the M8657YA, 16 bits of address
and data, control and timing. It transmits all reauired
status information to the M8657~., it also controls all
timing and video data for the VT7l Display Monitor.

DATE
1.3

POWER REQUI REMENTS :
+5VDC AT 3.2A ~X/2.0A TYP.
+12VDC AT 0.6A MAX/0.4A TYP •

• =.!!

jii
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2.1

The module has jumper selectable timing for 50 HZ or
60H, it is also jumper selectable for either a Motorola
or Ball Brothers Display Monitor.

3.0

JUMPER SELECTION:

11=

i-I
.~
I'd .5

pl;

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1/!osi

1
2
3
4
.5
6
7

F-=.5

4.0

1
2
3
4
5
6
7

= IN
= OUT
= IN
= OUT
= IN
= OUT
= IN

AA2
BA2
CA2
DA2

+12VDC

AD2
BD2
CO2

GND

A('~

AJl
AMl

n~,..

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tdn

DRA 107.\

ENGINEERING SPECIFICATION
M8658YA Video Module

TITLE

VTP OVF 7
FIRST ROW TEXT
VTP OVF'l
SP. CHAR. FLAG
LB ~7H
LB~6H
LB ~5H
LB ~4H
LB ~3H
LB ~2H
LB ~lH
LB !1l~H

SPL ~IH
DIS. ROW ~
DIS. ROW 25H
I' FLAG
TIME I H
TIME 2 H
CLK3
BLANK
BOLD

CLK VSR
RC OVF
TEXT ROW!1l

BN2
BR2
BT2
CE2
CF2
CH2
CJ2
CK2
CL2
CM2
CN2"
CP2
CR2
CS2
CT2
CU2
CV2
DE2
DF2
DH2
DJ2
DK2
DL2
DM2
DN2
DP2

-

COL 20 FLAG
TEXT ROW 25
UNDERLINE
REV. VIDEO
COL 99 FLAG
VTP 1
VTP VSR 11
VTP VSR 1!1l
VTP VSR ~9
VTP VSR !1l8
'rrp VSR 1'7
VTP VSR ~6
VTP VSR ~5
VTP VSR !1l4
VTP VSR !1l3
'.ITP 'JSR 1'2
VIDEO DATA
CLK I L
IB DCOK H
VTP VID. ENABLE
MC WRITE RAM L
SRL !1l5 H
+3V TP
HB !1l7H
HB !1l6H
HB !1l5H

DR2
OS2
DT2
DU2
DV2
ABl
ACI
ADI
AEI
AFI
AHl
AKl
ALI
ANI
API
ARl
AUI
AVI
BCI
BKI
BSl
BUl
BV1
CAl
CBl
CCl

NUMBER
M8658YA-8

I ~EV

SHEET _1_ OF _5_

= OUT
= IN
= OUT
= IN

ATl
BC2
BJl
BMI
BTl
CC2
CJl
CMl
CTl
DC2
DJI
DMl
DTl

GND

002

SIZE ICODE
A SP

10
11
12
13

DRA 108

COl
CEI
CFl
CHI
CKI
CLI
CNI
CPl
CRI
CSI
CUI
CVI
DAI
OBI
DCl
001
DEI
DFI
DHI
DKI
DLI
DNl
DPl
DRI
OS1
DUl
DVI

5.0

--- --_.-

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NUMBER
M86S8YA-8

AL2
BE2
BF2
BH2
BJ2
BK2
BL2

~.

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1S~E I'§~DEI

AJ2
AK2

SHEET _2_ OF _5_

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AH2

TIMING DIAGRAMS

j :;M.

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0
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D-(31U

TITLE M8658YA Video Module
HB ~4H
HB ~3H
HB !1l2H
HB ~IH
HB ~~H
CLK 4
PAN !1l~ H
PAN ~lH'
PAN ~2H
PAN i1l3H
WRITE RAM(l) L
SRL !1l~H
MC SRL LOBYTE L
MC SRL eLK
MC 40.,sRI, I,
MC T. VW.OPF L
MC CLK RC L
SRL 1'7(0) L
MC LOAD SR
MC TSC CLK
MC TSC LOAD
MC T. VID.ON L
MC CLR 99 PLAG
MC CLR 20 FLAG
CLK !1l
MC REFRESH L
MC PAN~SC 1

I

= IN
M = OUT

B

VTP RAnD EIEI
VTP RAnD Ell
VTP RAnD 02
VTP RAnD 03
VTP RAnD El4
VTP RAnD 05
VTP OVF 2
COL 99
DIS. SCAN 9
VTP OVF 3
VTP OVF 4
VTP OVF 5
VTP OVF 6

IS~ElcgfEI

--- --_ .... -

ENGINEERING SPECIFICATION

CONTINUATION SHEET

BaJ..l

B = OUT
M = IN

FINGER PINNING:
+5VDC

~_(J~ 1~!.,tJ~

i Mot:orO.la

!:>U HZ

10 = IN
11 = OUT
12 .. IN
13 = OUT

= OUT
= IN
= OUT
= IN
= OUT
= IN
= OUT

"' ...

to!;!:

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0

REV

A

SHEET _4_ OF _5_

DEC FORM NO EN..oIOZ2-16-N37o-(311)
DRA 108

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1.

F/p= FRONT PORCH on H SYNc./v SYNC. DELAY.

z
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2.

B/p = BACK PORCH on H SCAN

3.

HP = HORIZONTAL PERIOD = (64.1 USEC.)

&IJ
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SCAN DELAY.

i=

4.

COL = CHARACTER TIME. = (641

o

5.

H SYNC=HORIZONTAL SYNC. SIG. = (5.1 USEC).

6.

V SYNC = VERTICAL SYNC. SIG. = (320 USEC).

7.

HORIZONTAL B/p = (5. 1 USE·C.)

8.

VERTICAL B/p = (769.2 USEC)

9.

HORIZONTAL Flp = (2.6 USEC).

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10.

VERTICAL Flp 60 HZ. = (192.3 USEC.).

11.

VERTICAL Flp 50 Hz. = (192.3 USEC. + 52 HP's = 3.3 MSEC).

12.

INVERT VSYNC FOR BALL BROS.

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OR IN PART AS n-fE HA:,'S FOR THE MANUFACTU~E OR SALE
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REFERENCE [IESIGNATORS

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-------------------------------------------------------------------------------------------------------------------------~--~---~--

REVISION HISTORY !!VARIATIONS
FOR THIS
ASSY.!!FIRST USED ON:
____________________
_______________
_________
!
DIGITAL EQUIPMENT CORPORATION
CHK
ECO NO , REV'
! ____________________________________________ !
MAYNARD, MASSACHUSETTS
00,01
!
!
! -_.---_._-------------------------------------!-----!
!MADE ~Y:
V.PARECHANIAN !DATE: 28-FE~-78 ! TITLE
00003
H
KIT
PARTS LIST
!--------------------------!-----------------!
~

!

!

R .KOPPENOL
!DATE: 28-FE~-78
'CHECKED:
!--------------------------!-----------------!

(00 VARIATION)
!
!
[lATE:
28-FEB-78
!DSH.ENG.:
R.CARNELIO
! ___________________________________________ SIZE!CODE!
DOCUMENT NUMBER

! REV

!

1

!PROD.:

!

BOOTSW!TCH & ~RIGHTNESS CTRL.

,

J.RISKO

DATE:

28-FE~-78

DATE:

28-FE~-78

,

K! PL!

5411990-0-D~P

!H

!------------------------------------------ ----!--------------------------!----!
!EDITII
!RESP.ENG.: R.CARNELIO

ASSY.NO.: D-UA-5411990-0-0

!

81

-------------------------!--------------------------------------------------------!-----!
!!--------------------THIS DRAWING AND
SPECIFICATIONS HEREIN, ARE THE PROPERTY OF DIGITAL ----------------EQUIPMENT CORPORATION
AND SHALL NOT BE REPRODUCED
OR COPIED OR USED IN WHOLE OR IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT WRITTEN PERMISSION.
COPYRIGHT
1979. DIGITAL EQUIPMENT CORPORATION •

!-----------------------------------~-----------------------------------------------------------------------------~---------------!

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ENGINEERING SPECIFICATION

CONTINUATION SHEET

TITLE

Reference Documents

2.2

VT72/t Print Set.

2.3

Mast phase 1 Check Off List.

2.4

workmanship Manual:

2.5

Finish and Color Standard:

(DEC STD 116).

5.2

(DEC STD 092).
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5.4.1

Run ESC, D DLVll Host Loopback.
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Instruction

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