Sim PE User's Manual
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- Bookcase
- Table of Contents
- List of Examples
- List of Figures
- List of Tables
- Chapter 1 Introduction
- Operational Structure and Flow
- Simulation Task Overview
- Basic Steps for Simulation
- Modes of Operation
- Definition of an Object
- Standards Supported
- Assumptions
- Text Conventions
- Installation Directory Pathnames
- Where to Find ModelSim Documentation
- Mentor Graphics Support
- Deprecated Features, Commands, and Variables
- Chapter 2 Graphical User Interface
- Design Object Icons and Their Meaning
- Using the Find and Filter Functions
- User-Defined Radices
- Saving and Reloading Formats and Content
- Active Time Label
- Main Window
- Navigating in the Main Window
- Main Window Menu Bar
- Main Window Toolbar
- Analysis Toolbar
- Column Layout Toolbar
- Compile Toolbar
- Coverage Toolbar
- Dataflow Toolbar
- FSM Toolbar
- Help Toolbar
- Layout Toolbar
- Memory Toolbar
- Mode Toolbar
- Objectfilter Toolbar
- Process Toolbar
- Profile Toolbar
- Schematic Toolbar
- Simulate Toolbar
- Source Toolbar
- Standard Toolbar
- Wave Toolbar
- Wave Bookmark Toolbar
- Wave Compare Toolbar
- Wave Cursor Toolbar
- Wave Edit Toolbar
- Wave Expand Time Toolbar
- Zoom Toolbar
- Call Stack Window
- Capacity Window
- Class Graph Window
- Class Tree Window
- Code Coverage Analysis Window
- Coverage Details Window
- Dataflow Window
- Files Window
- FSM List Window
- FSM Viewer Window
- Instance Coverage Window
- Library Window
- List Window
- Locals Window
- Memory List Window
- Memory Data Window
- Message Viewer Window
- Objects Window
- Processes Window
- Profiling Windows
- Source Window
- Opening Source Files
- Displaying Multiple Source Files
- Dragging and Dropping Objects into the Wave and List Windows
- Setting your Context by Navigating Source Files
- Coverage Data in the Source Window
- Debugging with Source Annotation
- Using Language Templates
- Setting File-Line Breakpoints with the GUI
- Adding File-Line Breakpoints with the bp Command
- Editing File-Line Breakpoints
- Setting Conditional Breakpoints
- Checking Object Values and Descriptions
- Marking Lines with Bookmarks
- Performing Incremental Search for Specific Code
- Customizing the Source Window
- Structure Window
- Verification Management Browser Window
- Transcript Window
- Watch Window
- Wave Window
- Chapter 3 Protecting Your Source Code
- Creating Encryption Envelopes
- Compiling with +protect
- The Runtime Encryption Model
- Language-Specific Usage Models
- Proprietary Source Code Encryption Tools
- Encryption Reference
- Using the Mentor Graphics Public Encryption Key
- Chapter 4 Projects
- What are Projects?
- Getting Started with Projects
- The Project Window
- Creating a Simulation Configuration
- Organizing Projects with Folders
- Specifying File Properties and Project Settings
- Accessing Projects from the Command Line
- Chapter 5 Design Libraries
- Chapter 6 VHDL Simulation
- Basic VHDL Usage
- Compilation and Simulation of VHDL
- Using the TextIO Package
- Syntax for File Declaration
- Using STD_INPUT and STD_OUTPUT Within ModelSim
- TextIO Implementation Issues
- Writing Strings and Aggregates
- Reading and Writing Hexadecimal Numbers
- Dangling Pointers
- The ENDLINE Function
- The ENDFILE Function
- Using Alternative Input/Output Files
- Flushing the TEXTIO Buffer
- Providing Stimulus
- VITAL Usage and Compliance
- VHDL Utilities Package (util)
- Modeling Memory
- Chapter 7 Verilog and SystemVerilog Simulation
- Standards, Nomenclature, and Conventions
- Basic Verilog Usage
- Verilog Compilation
- Creating a Working Library
- Invoking the Verilog Compiler
- Initializing enum Variables
- Incremental Compilation
- Library Usage
- SystemVerilog Multi-File Compilation
- Verilog-XL Compatible Compiler Arguments
- Verilog-XL uselib Compiler Directive
- Verilog Configurations
- Verilog Generate Statements
- Initializing Registers and Memories
- Verilog Simulation
- Cell Libraries
- System Tasks and Functions
- Compiler Directives
- Verilog PLI/VPI and SystemVerilog DPI
- Chapter 8 SystemC Simulation
- Supported Platforms and Compiler Versions
- Usage Flow for SystemC-Only Designs
- Creating Shared Object Files for SystemC Code
- Binding to Verilog or SystemVerilog Designs
- Compiling SystemC Files
- Creating a Design Library for SystemC
- Invoking the SystemC Compiler
- Compiling Optimized and/or Debug Code
- Specifying an Alternate g++ Installation
- Maintaining Portability Between OSCI and the Simulator
- Using sccom in Addition to the Raw C++ Compiler
- Compiling Changed Files Only (Incremental Compilation)
- Issues with C++ Templates
- Linking the Compiled Source
- Simulating SystemC Designs
- Debugging the Design
- SystemC Object and Type Display
- Modifying SystemC Source Code
- Differences Between the Simulator and OSCI
- OSCI 2.2 Feature Implementation Details
- Troubleshooting SystemC Errors
- Chapter 9 Mixed-Language Simulation
- Basic Mixed-Language Flow
- Separate Compilers with Common Design Libraries
- Using SystemVerilog bind Construct in Mixed- Language Designs
- Simulator Resolution Limit
- Runtime Modeling Semantics
- Mapping Data Types
- Verilog and SystemVerilog to VHDL Mappings
- VHDL To Verilog and SystemVerilog Mappings
- Verilog or SystemVerilog and SystemC Signal Interaction And Mappings
- VHDL and SystemC Signal Interaction And Mappings
- VHDL Instantiating Verilog or SystemVerilog
- Verilog or SystemVerilog Instantiating VHDL
- Sharing User-Defined Types
- SystemC Instantiating Verilog or SystemVerilog
- Verilog or SystemVerilog Instantiating SystemC
- SystemC Instantiating VHDL
- VHDL Instantiating SystemC
- SystemC Procedural Interface to SystemVerilog
- Chapter 10 Recording and Viewing Transactions
- Transaction Background
- Viewing Transactions in the GUI
- Debugging with Tcl
- Transaction Recording Flow
- Transaction Recording Guidelines
- Transaction Recording Procedures
- CLI Debugging Command Reference
- Verilog and VHDL API System Task Reference
- Chapter 11 Recording Simulation Results With Datasets
- Chapter 12 Waveform Analysis
- Objects You Can View
- Wave Window Overview
- List Window Overview
- Adding Objects to the Wave or List Window
- Working with Cursors
- Setting Time Markers in the List Window
- Expanded Time in the Wave and List Windows
- Zooming the Wave Window Display
- Searching in the Wave and List Windows
- Filtering the Wave Window Display
- Formatting the Wave Window
- Wave Groups
- Composite Signals or Buses
- Formatting the List Window
- Saving the Window Format
- Exporting Waveforms from the Wave window
- Saving List Window Data to a File
- Viewing SystemVerilog Class Objects
- Combining Objects into Buses
- Creating a Virtual Signal
- Configuring New Line Triggering in the List Window
- Miscellaneous Tasks
- Creating and Managing Breakpoints
- Waveform Compare
- Mixed-Language Waveform Compare Support
- Three Options for Setting up a Comparison
- Setting Up a Comparison with the GUI
- Starting a Waveform Comparison
- Adding Signals, Regions, and Clocks
- Specifying the Comparison Method
- Setting Compare Options
- Viewing Differences in the Wave Window
- Viewing Differences in the List Window
- Viewing Differences in Textual Format
- Saving and Reloading Comparison Results
- Comparing Hierarchical and Flattened Designs
- Chapter 13 Debugging with the Dataflow Window
- Dataflow Window Overview
- Dataflow Usage Flow
- Common Tasks for Dataflow Debugging
- Dataflow Concepts
- Dataflow Window Graphic Interface Reference
- Chapter 14 Source Window
- Creating and Editing Source Files
- Data and Objects in the Source Window
- Breakpoints
- Bookmarks
- Setting Source Window Preferences.
- Chapter 15 Code Coverage
- Overview of Code Coverage Types
- Usage Flow for Code Coverage Collection
- Code Coverage in the UCDB
- Code Coverage in the Graphic Interface
- Code Coverage Types
- Statement Coverage
- Branch Coverage
- Condition and Expression Coverage
- Toggle Coverage
- Finite State Machine Coverage
- Coverage Exclusions
- What Objects can be Excluded?
- Auto Exclusions
- Methods for Excluding Objects
- Toggle Exclusion Management
- Exclude Nodes from Toggle Coverage
- FSM Coverage Exclusions
- Saving and Recalling Exclusions
- Coverage Reports
- Notes on Coverage and Optimization
- Chapter 16 Finite State Machines
- Chapter 17 Coverage and Verification Management in the UCDB
- Coverage and Verification Overview
- Running Tests and Collecting Data
- Managing Test Data in UCDBs
- Viewing and Analyzing Verification Data
- Chapter 18 C Debug
- Supported Platforms and gdb Versions
- Setting Up C Debug
- Setting Breakpoints
- Stepping in C Debug
- Quitting C Debug
- Finding Function Entry Points with Auto Find bp
- Identifying All Registered Function Calls
- Debugging Functions During Elaboration
- Debugging Functions when Quitting Simulation
- C Debug Command Reference
- Chapter 19 Profiling Performance and Memory Use
- Introducing Performance and Memory Profiling
- Getting Started with the Profiler
- Interpreting Profiler Data
- Viewing Profiler Results
- Viewing Profile Details
- Integration with Source Windows
- Analyzing C Code Performance
- In addition, the Verilog PLI/VPI requires maintenance of the simulator’s internal data structures as well as the PLI/VPI data structures for portability. Searching Profiler Results
- Reporting Profiler Results
- Capacity Analysis
- Chapter 20 Signal Spy
- Chapter 21 Generating Stimulus with Waveform Editor
- Getting Started with the Waveform Editor
- Creating Waveforms from Patterns
- Creating Waveforms with Wave Create Command
- Editing Waveforms
- Simulating Directly from Waveform Editor
- Exporting Waveforms to a Stimulus File
- Driving Simulation with the Saved Stimulus File
- Using Waveform Compare with Created Waveforms
- Saving the Waveform Editor Commands
- Chapter 22 Standard Delay Format (SDF) Timing Annotation
- Chapter 23 Value Change Dump (VCD) Files
- Chapter 24 Tcl and Macros (DO Files)
- Appendix A modelsim.ini Variables
- Organization of the modelsim.ini File
- Making Changes to the modelsim.ini File
- Variables
- AmsStandard
- AssertFile
- AutoExclusionsDisable
- BindAtCompile
- BreakOnAssertion
- CheckPlusargs
- CheckpointCompressMode
- CheckSynthesis
- CodeCoverage
- CommandHistory
- CompilerTempDir
- ConcurrentFileLimit
- Coverage
- CoverCells
- CoverClkOptBuiltins
- CoverCountAll
- CoverExcludeDefault
- CoverFEC
- CoverMaxFECRows
- CoverMaxUDPRows
- CoverOpt
- CoverRespectHandL
- CoverReportCancelled
- CoverShortCircuit
- CoverSub
- CoverUDP
- CppOptions
- CppPath
- DatasetSeparator
- DefaultForceKind
- DefaultRadix
- DefaultRestartOptions
- DelayFileOpen
- displaymsgmode
- DpiCppPath
- DpiOutOfTheBlue
- DumpportsCollapse
- EnumBaseInit
- error
- ErrorFile
- Explicit
- ExtendedToggleMode
- fatal
- floatfixlib
- ForceSigNextIter
- ForceUnsignedIntegerToVHDLInteger
- FsmImplicitTrans
- FsmResetTrans
- FsmSingle
- FsmXAssign
- GenerateFormat
- GenerateLoopIterationMax
- GenerateRecursionDepthMax
- GenerousIdentifierParsing
- GlobalSharedObjectsList
- Hazard
- ieee
- IgnoreError
- IgnoreFailure
- IgnoreNote
- ignoreStandardRealVector
- IgnoreVitalErrors
- IgnoreWarning
- ImmediateContinuousAssign
- InitOutCompositeParam
- IncludeRecursionDepthMax
- IterationLimit
- LibrarySearchPath
- License
- MaxReportRhsCrossProducts
- MessageFormat
- MessageFormatBreak
- MessageFormatBreakLine
- MessageFormatError
- MessageFormatFail
- MessageFormatFatal
- MessageFormatNote
- MessageFormatWarning
- MixedAnsiPorts
- modelsim_lib
- msgmode
- mtiAvm
- mtiOvm
- MultiFileCompilationUnit
- NoCaseStaticError
- NoDebug
- NoDeferSubpgmCheck
- NoIndexCheck
- NoOthersStaticError
- NoRangeCheck
- note
- NoVital
- NoVitalCheck
- NumericStdNoWarnings
- OldVHDLConfigurationVisibility
- OldVhdlForGenNames
- OnFinish
- Optimize_1164
- PathSeparator
- PedanticErrors
- PliCompatDefault
- PreserveCase
- PrintSimStats
- Protect
- Quiet
- RequireConfigForAllDefaultBinding
- Resolution
- RunLength
- SccomLogfile
- SccomVerbose
- ScEnableScSignalWriteCheck
- ScMainFinishOnQuit
- ScMainStackSize
- ScShowIeeeDeprecationWarnings
- ScTimeUnit
- ScvPhaseRelationName
- SeparateConfigLibrary
- Show_BadOptionWarning
- Show_Lint
- Show_source
- Show_VitalChecksWarnings
- Show_Warning1
- Show_Warning2
- Show_Warning3
- Show_Warning4
- Show_Warning5
- ShowFunctions
- ShowUnassociatedScNameWarning
- ShowUndebuggableScTypeWarning
- ShutdownFile
- SignalSpyPathSeparator
- Startup
- std
- std_developerskit
- StdArithNoWarnings
- suppress
- sv_std
- SVFileExtensions
- Svlog
- synopsys
- SyncCompilerFiles
- SynthPrefix
- ToggleCountLimit
- ToggleFixedSizeArray
- ToggleMaxFixedSizeArray
- ToggleMaxIntValues
- ToggleMaxRealValues
- ToggleNoIntegers
- TogglePackedAsVec
- TogglePortsOnly
- ToggleVlogEnumBits
- ToggleVlogIntegers
- ToggleVlogReal
- ToggleWidthLimit
- TranscriptFile
- UCDBFilename
- UCDBTestStatusMessageFilter
- UnbufferedOutput
- UserTimeUnit
- UseScv
- verilog
- Veriuser
- VHDL93
- VhdlVariableLogging
- vital2000
- vlog95compat
- WarnConstantChange
- warning
- WaveSignalNameWidth
- WLFCacheSize
- WLFCollapseMode
- WLFCompress
- WLFDeleteOnQuit
- WLFFileLock
- WLFFilename
- WLFOptimize
- WLFSaveAllRegions
- WLFSimCacheSize
- WLFSizeLimit
- WLFTimeLimit
- WLFUseThreads
- Commonly Used modelsim.ini Variables
- Appendix B Location Mapping
- Appendix C Error and Warning Messages
- Appendix D Verilog Interfaces to C
- Implementation Information
- GCC Compiler Support for use with C Interfaces
- Registering PLI Applications
- Registering VPI Applications
- Registering DPI Applications
- DPI Use Flow
- DPI and the vlog Command
- When Your DPI Export Function is Not Getting Called
- Troubleshooting a Missing DPI Import Function
- Simplified Import of Library Functions
- Optimizing DPI Import Call Performance
- Making Verilog Function Calls from non-DPI C Models
- Calling C/C++ Functions Defined in PLI Shared Objects from DPI Code
- Compiling and Linking C Applications for Interfaces
- Compiling and Linking C++ Applications for Interfaces
- Specifying Application Files to Load
- PLI Example
- VPI Example
- DPI Example
- The PLI Callback reason Argument
- The sizetf Callback Function
- PLI Object Handles
- Third Party PLI Applications
- Support for VHDL Objects
- IEEE Std 1364 ACC Routines
- IEEE Std 1364 TF Routines
- SystemVerilog DPI Access Routines
- Verilog-XL Compatible Routines
- 64-bit Support for PLI
- PLI/VPI Tracing
- Debugging Interface Application Code
- Appendix E Command and Keyboard Shortcuts
- Appendix F Setting GUI Preferences
- Appendix G System Initialization
- Files Accessed During Startup
- Initialization Sequence
- Environment Variables
- Environment Variable Expansion
- Setting Environment Variables
- DOPATH
- DP_INIFILE
- EDITOR
- HOME
- ITCL_LIBRARY
- ITK_LIBRARY
- LD_LIBRARY_PATH
- LD_LIBRARY_PATH_32
- LD_LIBRARY_PATH_64
- LM_LICENSE_FILE
- MGC_AMS_HOME
- MGC_HOME
- MGC_LOCATION_MAP
- MGC_WD
- MODEL_TECH
- MODEL_TECH_OVERRIDE
- MODEL_TECH_TCL
- MODELSIM
- MODELSIM_PREFERENCES
- MODELSIM_TCL
- MTI_COSIM_TRACE
- MTI_LIB_DIR
- MTI_TF_LIMIT
- MTI_RELEASE_ON_SUSPEND
- MTI_USELIB_DIR
- NOMMAP
- PLIOBJS
- STDOUT
- TCL_LIBRARY
- TK_LIBRARY
- TMP
- TMPDIR
- VSIM_LIBRARY
- Creating Environment Variables in Windows
- Referencing Environment Variables
- Removing Temp Files (VSOUT)
- Appendix H Third-Party Model Support
- Index
- Third-Party Information
- End-User License Agreement
- Documentation Feedback