PIC32MX1XX/2XX 28/36/44 Pin Family Data Sheet PIC32Family Guide

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TABLE 1: PIC32MX1XX 28/36/44-Pin General Purpose Family Features
TABLE 2: PIC32MX2XX 28/36/44-pin USB Family Features
TABLE 3: Pin Names for 28-pin General Purpose Devices
TABLE 4: Pin Names for 28-pin USB Devices
TABLE 5: Pin Names for 28-Pin General Purpose Devices
TABLE 6: Pin Names for 28-Pin USB Devices
TABLE 7: Pin Names for 36-Pin General Purpose Devices
TABLE 8: Pin Names for 36-Pin USB Devices
TABLE 9: Pin Names for 44-Pin General Purpose Devices
TABLE 10: Pin Names for 44-Pin USB Devices
TABLE 11: Pin Names for 44-Pin General Purpose Devices
TABLE 12: Pin Names for 44-Pin USB Devices
TABLE 13: Pin Names for 44-Pin General Purpose Devices
TABLE 14: Pin Names for 44-Pin USB Devices
1.0 Device Overview
- FIGURE 1-1: Block Diagram
- TABLE 1-1: Pinout I/O Descriptions (Continued)
2.0 Guidelines for Getting Started with 32-bit MCUs
- 2.1 Basic Connection Requirements
- 2.2 Decoupling Capacitors
  - FIGURE 2-1: Recommended Minimum Connection
- 2.3 Capacitor on Internal Voltage Regulator (Vcap)
- 2.4 Master Clear (MCLR) Pin
  - FIGURE 2-2: Example of MCLR Pin Connections
- 2.5 ICSP Pins
- 2.6 JTAG
- 2.7 External Oscillator Pins
  - FIGURE 2-3: Suggested Oscillator Circuit Placement
- 2.8 Unused I/Os
  - EXAMPLE 2-1: Crystal Load Capacitor Calculation
  - FIGURE 2-4: Primary crystal oscillator circuit recommendations
- 2.9 Typical Application Connection Examples
  - FIGURE 2-5: Capacitive Touch Sensing With Graphics Application
  - FIGURE 2-6: Audio Playback Application
- 2.10 Considerations When Interfacing To Remotely Powered Circuits
3.0 CPU
- 3.1 Features
  - FIGURE 3-1: MIPS32® M4K® Processor Core Block Diagram
- 3.2 Architecture Overview
- 3.3 Power Management
- 3.4 EJTAG Debug Support
4.0 Memory Organization
- 4.1 PIC32MX1XX/2XX 28/36/44-pin Family Memory Layout
- 4.2 Bus Matrix Control Registers
5.0 Flash Program Memory
- 5.1 Flash Controller Control Registers
6.0 Resets
- FIGURE 6-1: System Reset Block Diagram
- 6.1 Reset Control Registers
7.0 Interrupt Controller
- FIGURE 7-1: Interrupt Controller Module Block Diagram
- Table 7-1: Interrupt IRQ, Vector and Bit Location (Continued)
- 7.1 Interrupt Control Registers
8.0 Oscillator Configuration
- FIGURE 8-1: Oscillator Diagram
- 8.1 Oscillator Control Regiters
9.0 Direct Memory Access (DMA) Controller
- FIGURE 9-1: DMA Block Diagram
- 9.1 DMA Control Registers
10.0 USB On-The-Go (OTG)
- FIGURE 10-1: PIC32MX1XX/2XX 28/36/44-pin Family Family USB Interface Diagram
- 10.1 USB Control Registers
11.0 I/O Ports
- FIGURE 11-1: Block Diagram of a Typical Multiplexed Port Structure
- 11.1 Parallel I/O (PIO) Ports
- 11.2 CLR, SET and INV Registers
- 11.3 Peripheral Pin Select
- 11.4 Ports Control Registers
12.0 Timer1
- 12.1 Additional Supported Features
  - FIGURE 12-1: Timer1 Block Diagram
- 12.2 Timer1 Control Registers
  - TABLE 12-1: Timer1 Register Map
  - Register 12-1: T1CON: Type A Timer Control Register (Continued)
13.0 Timer2/3, Timer4/5
- 13.1 Additional Supported Features
  - FIGURE 13-1: Timer2-Timer5 Block Diagram (16-bit)
  - FIGURE 13-2: Timer2/3, Timer4/5 Block Diagram (32-bit)
- 13.2 Timer Control Registers
  - TABLE 13-1: Timer2-Timer5 Register Map
  - Register 13-1: TxCON: Type B Timer Control Register (Continued)
14.0 Watchdog Timer (WDT)
- Figure 14-1: Watchdog TIMER and Power-Up Timer Block Diagram
- 14.1 Watchdog Timer Control Registers
  - TABLE 14-1: Watchdog Timer Control Register Map
  - Register 14-1: WDTCON: Watchdog Timer Control Register
15.0 Input Capture
- FIGURE 15-1: Input Capture Block Diagram
- 15.1 Input Capture Control Registers
  - TABLE 15-1: Input Capture 1-Input Capture 5 Register Map
  - Register 15-1: ICxCON: Input Capture ‘x’ Control Register (Continued)
16.0 Output Compare
- FIGURE 16-1: Output Compare Module Block Diagram
- 16.1 Output Compare Control Registers
  - TABLE 16-1: Output Compare 1-Output Compare 5 Register Map
  - Register 16-1: OCxCON: Output Compare ‘x’ Control Register
17.0 Serial Peripheral Interface (SPI)
- FIGURE 17-1: SPI Module Block Diagram
- 17.1 SPI Control Registers
18.0 Inter-Integrated Circuit (I2C)
- FIGURE 18-1: I2C Block Diagram
- 18.1 I2C Control Registers
19.0 Universal Asynchronous Receiver Transmitter (UART)
- FIGURE 19-1: UART Simplified Block Diagram
- 19.1 UART Control Registers
20.0 Parallel Master Port (PMP)
- FIGURE 20-1: PMP Module Pinout and Connections to External Devices
- 20.1 PMP Control Registers
21.0 Real-Time Clock and Calendar (RTCC)
- FIGURE 21-1: RTCC Block Diagram
- 21.1 RTCC Control Registers
22.0 10-bit Analog-to-Digital Converter (ADC)
- FIGURE 22-1: ADC1 Module Block Diagram
- FIGURE 22-2: ADC Conversion Clock Period Block Diagram
- 22.1 ADC Control Registers
23.0 Comparator
- FIGURE 23-1: Comparator Block Diagram
- 23.1 Comparator Control Registers
24.0 Comparator Voltage Reference (CVref)
- FIGURE 24-1: Comparator Voltage Reference Block Diagram
- 24.1 Comparator Voltage Reference Control Register
  - TABLE 24-1: Comparator Voltage Reference Register Map
  - Register 24-1: CVRCON: Comparator Voltage Reference Control Register
25.0 Charge Time Measurement Unit (CTMU)
- FIGURE 25-1: CTMU Block Diagram
- 25.1 CTMU Control Registers
  - TABLE 25-1: CTMU Register Map
  - Register 25-1: CTMUCON: CTMU Control Register (Continued)
26.0 Power-Saving Features
- 26.1 Power Saving with CPU Running
- 26.2 CPU Halted Methods
- 26.3 Power-Saving Operation
- 26.4 Peripheral Module Disable
  - Table 26-1: Peripheral Module Disable Bits and Locations
  - TABLE 26-2: Peripheral Module Disable Register Map
27.0 Special Features
- 27.1 Configuration Bits
- 27.2 Configuration Registers
- 27.3 On-Chip Voltage Regulator
  - Figure 27-1: Connections for the On-Chip Regulator
- 27.4 Programming and Diagnostics
  - Figure 27-2: Block Diagram of Programming, Debugging and Trace Ports
28.0 Instruction Set
29.0 Development Support
- 29.1 MPLAB X Integrated Development Environment Software
- 29.2 MPLAB XC Compilers
- 29.3 MPASM Assembler
- 29.4 MPLINK Object Linker/ MPLIB Object Librarian
- 29.5 MPLAB Assembler, Linker and Librarian for Various Device Families
- 29.6 MPLAB X SIM Software Simulator
- 29.7 MPLAB REAL ICE In-Circuit Emulator System
- 29.8 MPLAB ICD 3 In-Circuit Debugger System
- 29.9 PICkit 3 In-Circuit Debugger/ Programmer
- 29.10 MPLAB PM3 Device Programmer
- 29.11 Demonstration/Development Boards, Evaluation Kits, and Starter Kits
- 29.12 Third-Party Development Tools
30.0 Electrical Characteristics
- 30.1 DC Characteristics
- 30.2 AC Characteristics and Timing Parameters
31.0 50 MHz Electrical Characteristics
- 31.1 DC Characteristics
32.0 DC and AC Device Characteristics Graphs
- FIGURE 32-1: I/O Output Voltage High (Voh)
- FIGURE 32-2: I/O Output Voltage Low (Vol)
- FIGURE 32-3: Typical Ipd Current @ Vdd = 3.3V
- FIGURE 32-4: Typical Idd Current @ Vdd = 3.3V
- FIGURE 32-5: Typical Iidle Current @ Vdd = 3.3V
- FIGURE 32-6: Typical FRC Frequency @ Vdd = 3.3V
- FIGURE 32-7: Typical LPRC Frequency @ Vdd = 3.3V
- FIGURE 32-8: Typical CTMU Temperature DIODE Forward Voltage
33.0 Packaging Information
- 33.1 Package Marking Information
- 33.1 Package Marking Information (Continued)
- 33.2 Package Details
Appendix A: Revision History
- TABLE A-1: Major Section Updates (Continued)
- TABLE A-2: Major Section Updates
- TABLE A-3: Major Section Updates
- TABLE A-4: Major Section Updates
- TABLE A-5: Major Section Updates
- TABLE A-6: Major Section Updates
- TABLE A-7: Major Section Updates
- TABLE A-8: Major Section Updates
- TABLE A-9: Major Section Updates
INDEX
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