QM_Spartan 7 User_Manual QM Spartan User Manual
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XILINX SPARTAN-7 CORE BOARD USER MANUAL Preface The QMTech® Spartan-7 Core Board uses Xilinx XC7S15 device to demonstrate the newest addition to the Cost-Optimized Portfolio, offer the best in class performance per watt, along with small form factor packaging to meet the most stringent requirements. These devices feature a MicroBlaze™ soft processor running over 200 DMIPs with 800Mb/s DDR3 support built on 28nm technology. Additionally, Spartan-7 devices offer an integrated ADC, dedicated security features, and Q-grade (-40 to +125°C) on all commercial devices. These devices are ideally suited for industrial, consumer, and automotive applications including any-to-any connectivity, sensor fusion, and embedded vision. QM_Spartan-7 Development Board User Manual V01 Table of Contents 1. INTRODUCTION .................................................................................. 3 1.1 1.2 2. DOCUMENT SCOPE ..................................................................... 3 KIT OVERVIEW........................................................................... 3 GETTING STARTED .............................................................................. 4 2.1 2.2 INSTALL DEVELOPMENT TOOLS ...................................................... 4 QM_SPARTAN-7 HARDWARE DESIGN ............................................ 7 2.2.1 QM_Spartan-7 Power Supply ..................................... 7 2.2.1 QM_Spartan-7 3.3V Power Supply ............................. 8 2.2.2 QM_Spartan-7 SPI Boot ............................................. 9 2.2.3 QM_Spartan-7 System Clock .................................... 10 2.2.4 QM_Spartan-7 JTAG Port ......................................... 10 2.2.5 QM_Spartan-7 User LED .......................................... 10 2.2.6 QM_Spartan-7 Extension IO ..................................... 11 2.2.7 QM_Spartan-7 User Key .......................................... 12 2.2.8 QM_Spartan-7 UART Port ........................................ 13 3. REFERENCE........................................................................................ 14 4. REVISION .......................................................................................... 15 QM_Spartan-7 Development Board User Manual V01 1. Introduction 1.1 Document Scope This demo user manual introduces the QM_Spartan-7 development board and describes how to setup the development board running with application software Xilinx Vivado 2018.2. Users may employee the on board rich logic resource FPGA XC7S15-1FTGB196C to implement various applications. The development board has 88 non-multiplexed FPGA IOs for extending customized modules, such as UART module, CMOS/CCD camera module, LCD/HDMI/VGA display module etc. 1.2 Kit Overview Below section lists the parameters of the QM_Spartan-7 development board: On-Board FPGA: XC7S15-1FTGB196C; On-Board FPGA external crystal frequency: 50MHz; XC7S15-1FTGB196C has rich block RAM resource up to 360Kb; XC7S15-1FTGB196C has 12,800 logic cells; On-Board N25Q064 SPI Flash, 8M bytes for user configuration code; On-Board 3.3V power supply for FPGA by using MP2359 wide input range DC/DC; QM_Spartan-7 development board has two 50p, 2.54mm pitch headers for extending user IOs. All IOs are precisely designed with length matching; QM_Spartan-7 development board has 3 user switches; QM_Spartan-7 development board has 4 user LEDs; QM_Spartan-7 development board has JTAG interface, by using 6p, 2.54mm pitch header; QM_Spartan-7 development board has USB to UART Serial Port, by using Silicon Labs’ CP2102GMR chip. QM_Spartan-7 development board PCB size is: 6.6cm x 5.7cm; Default power source for board is from Mini USB: 1A@5V DC; Figure 1-1. QM_Spartan-7 Development Board Overview QM_Spartan-7 Development Board User Manual V01 2. Getting Started Below image shows the dimension of the QM_Spartan-7 development board: 6.6cm x 5.7cm. The unit in below image is millimeter(mm). Figure 2-1. QM_Spartan-7 Development Board Dimension 2.1 Install Development Tools The QM_Spartan-7 development board tool chain consists of Xilinx Vivado 2018.2, Xilinx USB platform cable, Mini USB cable for power supply. Below image shows the Xilinx Vivado 2018.2 development environment which could be downloaded from Xilinx office website: Figure 2-2. Vivado 2018.2 QM_Spartan-7 Development Board User Manual V01 Below image shows the JTAG connection between Xilinx USB platform cable and QM_Spartan-7 development board: TMS (Green) TDI (Purple) TDO (White) TCK (Yellow) GND (Black) VREF (Red) 5V DC Figure 2-3. JTAG Connection and Power Supply Once the FPGA test program is correctly 【Synthesized】, 【Implemented】 and 【Generated with Bitstream】, users may click the 【Open Target】 option to connect the XC7S15 FPGA. Step1 Step2 Step3 Step4 Figure 2-4. Vivado to Connect FPGA QM_Spartan-7 Development Board User Manual V01 Chip info like xc7s15_0(1) is shown in Hardware Manager as below image. Users then could right click the device to choose 【Program Device】to load the Bitstream *.bit into FPGA or to choose【Add Configuration Memory Device】to program the *.mcs file into on-board SPI flash. Figure 2-5. Program FPGA Users could convert the *.bit file into the *.mcs file by using the Vivado tool. Choose the 【Tools】on the menu bar and then select 【Generate Memory Configuration File】, and then configure the parameters shown in below image: Figure 2-6. Generate *.mcs File QM_Spartan-7 Development Board User Manual V01 2.2 QM_Spartan-7 Hardware Design 2.2.1 QM_Spartan-7 Power Supply The development board needs 5V DC input as power supply which could be directly injected from JP1/JP2 header or the Mini USB connector. Users may refer to the hardware schematic for the detailed design. The on board LED D5 indicates the 3.3V supply, it will be turned on when the 5V power supply is active. In default status, all the FPGA banks IO power level is 3.3V because bank power supply is 3.3V. Detailed design refer to hardware schematic. Note: FPGA core supply 1.0V is regulated by On-Semi DC/DC chip NCP1529 which could output maximum 1A current. U1E GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 A1 A6 A9 A11 A14 B4 B7 B9 C2 C6 C7 C8 C9 C13 D5 D7 D9 D11 E1 E3 E6 E8 E10 E14 F5 F9 G3 G6 G10 G12 H5 H9 J6 J10 K1 K5 K7 K9 K14 L4 L6 L8 L10 L11 N3 N5 N9 N12 P1 P14 3V3 N6 N8 G13 K13 N13 G2 K2 N2 1V0 E5 G5 J5 U1D VCCO_0_1 VCCO_0_2 VCCO_14_1 VCCO_14_2 VCCO_14_3 VCCO_14_4 VCCO_14_5 VCCO_14_6 VCCBRAM_1 VCCBRAM_2 VCCBRAM_3 VCCAUX_1 VCCAUX_2 VCCAUX_3 VCCAUX_4 VCCINT_1 VCCINT_2 VCCINT_3 VCCINT_4 VCCINT_5 VCCINT_6 VCCINT_7 VCCINT_8 VCCINT_9 VCCINT_10 F10 H10 K10 L9 D6 D8 E7 E9 F6 G9 H6 J9 K6 K8 1V8 1V0 XC7S15-1FTGB196 XC7S15-1FTGB196 Figure 2-7. Power Supply for the FPGA QM_Spartan-7 Development Board User Manual V01 QM_Spartan-7 3.3V Power Supply The development board’s 3.3V power supply is using high efficiency DC/DC chip MP2359 provided by MPS Inc. The MP2359 supports wide voltage input range from 4.5V to 24V. In normal use case, 5V DC power supply is suggested to be applied on the board. Below image shows the MP2359 hardware design: 3V3 L1 10nF 2 C1 4.7uH D1 IN5819 U2 1 R1 100K 2 3 BST SW GND VIN FB 6 C2 C3 4.7uF 4.7uF 1 USB_5V 5 4 EN R2 100K C4 MP2359 C5 4.7uF 100nF R3 33K Figure 2-8. MP2359 Hardware Design 1V0 1V 4.7uH M L3 3V3 4 U5 VIN SW C12 C17 3 4.7uF4.7uF R7 100K C11 22pF C13 4.7uF 1 EN GND 2 FB 5 NCP1529 R8 150K Figure 2-9. 1.0V Core Voltage DC/DC 1V8 L2 1V8 4.7uH M 2.2.1 3V3 4 U4 VIN SW 3 C8 C16 4.7uF4.7uF R5 53.6K C7 22pF C9 4.7uF 1 EN GND 2 FB 5 NCP1529 QM_Spartan-7 Development Board R6 27K User Manual V01 Figure 2-10. 1.8V AUX Voltage DC/DC QM_Spartan-7 SPI Boot In default, XC7S15 boots from external SPI Flash, detailed hardware design is shown in below figure. The SPI flash is using N25Q064 manufactured by Micron, with 64Mbit memory storage. 3V3 3V3 R13 FPGA_DQ2 3 nCE VDD SO/SIO1 SIO3 SIO2 4 VSS SCK SI/SIO0 8 7 FPGA_DQ3 4.7K 6 5 R12 C14 4.7K FPGA_DQ1 2 FPGA_CCLK 100nF R10 FPGA_CSO_B 1 4.7K U6 FPGA_DQ0 N25Q064A13ESE40F Figure 2-11. SPI Flash The FPGA boot sequence setting M0:M1:M2 is configured as 1:0:0 which indicates FPGA will boot from SPI Flash after power on. In default, the jumper J3 is under open status. U1A TMS TDI TDO TCK M6 P7 P6 A7 J7 J8 F7 F8 B8 G7 G8 H7 H8 3V3 N7 TMS_0 TDI_0 TDO_0 TCK_0 DXN_0 DXP_0 CCLK_0 DONE_0 PROGRAM_B_0 INIT_B_0 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 M0_0 M1_0 M2_0 CFGBVS_0 A8 P9 L7 P8 M7 M8 M9 FPGA_CCLK FPGA_DONE PROG_B R21 4.7K 3V3 R22 1K 3V3 R23 J3 1K 3V3 XC7S15-1FTGB196 Figure 2-12. M0:M1 Hardware Settings The LED D2 will be turned on after the FPGA successfully loading configuration file from SPI Flash during power on stage. In this case, LED D2 could be used as FPGA loading status indicator. 3V3 R14 1K 1 FPGA_DONE D2 Red 2 2.2.2 R20 1K QM_Spartan-7 Development Board User Manual V01 Figure 2-13. FPGA_DONE Status Indicator 2.2.3 QM_Spartan-7 System Clock FPGA chip XC7S15-1FTGB196C has system clock frequency 50MHz which is directly provided by external crystal. The crystal is designed with high accuracy and stability with low temperature drift 10ppm/°c. Below image shows the detailed hardware design: 3V3 R11 1 OE 4.7K VDD 4 C15 100NF 50 MHz 2 VSS OUT 3 CLK_50M SG-8002JC-50.0000M-PCB Y1 Figure 2-14. 50MHz System Clock 2.2.4 QM_Spartan-7 JTAG Port The on board JTAG port uses 6P 2.54mm pitch header which could be easily connected to Xilinx USB platform cable. Below image shows the hardware design of the JTAG port: 3V3 J2 1 2 3 4 5 6 TCK TDO TDI TMS JTAG Figure 2-15. JTAG Port 2.2.5 QM_Spartan-7 User LED Below image shows two user LEDs and one LED for 3.3V power supply indicator: QM_Spartan-7 Development Board User Manual V01 R18 R19 R24 1K 1K 1K 3V3 3V3 3V3 1 D4 2 1 D3 2 1 D5 2 LED_D4 LED_D3 Figure 2-16. LEDs 2.2.6 QM_Spartan-7 Extension IO The development board has two 50P 2.54mm pitch headers which are used for extending user modules, such as ADC/DAC module, audio/video module, ethernet module, etc. QM_Spartan-7 Development Board User Manual V01 USB_5V 3V3 JP1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 IO_P4 IO_P2 IO_M5 IO_M3 IO_M1 IO_L3 IO_K4 IO_J4 IO_J2 IO_H3 IO_H1 IO_F4 IO_F3 IO_F1 IO_C1 IO_D2 IO_B2 IO_D4 IO_B3 IO_A4 IO_C3 IO_A5 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 IO_P3 IO_N1 IO_M4 IO_M2 IO_L1 IO_L2 IO_K3 IO_J3 IO_J1 IO_H4 IO_H2 IO_G4 IO_F2 IO_G1 IO_D1 IO_E2 IO_B1 IO_E4 IO_A2 IO_A3 IO_D3 IO_B5 HDR_25X2 USB_5V 3V3 JP2 IO_H12 IO_P11 IO_N11 IO_M12 IO_P13 IO_L12 IO_L14 IO_M14 IO_K12 IO_J11 IO_J13 IO_H13 IO_G11 IO_G14 IO_F13 IO_F12 IO_D14 IO_D13 IO_B14 IO_A13 IO_A10 IO_C12 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 IO_M10 IO_P10 IO_N10 IO_M11 IO_P12 IO_L13 IO_M13 IO_N14 IO_K11 IO_J12 IO_J14 IO_H14 IO_F11 IO_F14 IO_E13 IO_E12 IO_C14 IO_D12 IO_B13 IO_A12 IO_B10 IO_E11 HDR_25X2 Figure 2-17. Extension IO 2.2.7 QM_Spartan-7 User Key Below image shows the PROGRAM_B key and two user keys: QM_Spartan-7 Development Board User Manual V01 3V3 3V3 3V3 R15 4.7k R16 4.7k R17 4.7K KEY 0 2 2 SW1 PROG_B nRESET 2 SW2 1 SW3 1 1 Figure 2-18. Keys QM_Spartan-7 UART Port The CP2102-GMR is a USB 2.0 to serial port bridge chip designed by Silicon Labs. The CP2102-GMR includes a USB 2.0 full-speed function controller, USB transceiver, oscillator, UART and eliminates the need for other external USB components are required for development. Below figure shows the hardware design of CP2102GMR on the QM_Spartan-7. R4 22 21 20 19 18 NC11 NC10 NC9 NC8 NC7 U3 6 4.7K VDD C6 RST 9 100nF 3 29 8 7 6 G4 Vcc DD+ G2 ID GND G1 G3 MINI_USB C10 4.7uF 1 2 3 4 5 USB_5V 8 7 5 4 VBUS REGIN DD+ CTS RTS TXD RXD DTR SUSPEND SUSPEND RI DCD DSR NC1 NC2 NC3 NC4 NC5 NC6 J1 9 GND GND_TP 10 13 14 15 16 17 2.2.8 23 24 26 25 PIN_TX PIN_RX 28 12 11 2 1 27 CP2102-GM Figure 2-19. UART Port QM_Spartan-7 Development Board User Manual V01 3. Reference [1] [2] [3] [4] [5] [6] ug470_7Series_Config.pdf ds181_Artix_7_Data_Sheet.pdf ug475_7Series_Pkg_Pinout.pdf n25q_64a_3v_65nm.pdf MP2359.pdf NCP1529-D.PDF QM_Spartan-7 Development Board User Manual V01 4. Revision Doc. Rev. Date Comments 0.1 05/12/2018 Initial Version. 1.0 05/12/2018 V1.0 Formal Release. QM_Spartan-7 Development Board User Manual V01
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