QMTECH_CycloneIV_EP4CE15_User_Manual(CoreBoard) V01 QMTECH Cyclone IV EP4CE15 User Manual(Core Board)
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CYCLONE IV EP4CE15 CORE BOARD USER MANUAL Preface The QMTech® Cyclone IV SDRAM Development Board uses Intel(Altera) EP4CE15F23 device to demonstrate Intel’s leadership in offering power-efficient FPGAs. With enhanced architecture and silicon, advanced semiconductor process technology, and power management tools, power consumption for Cyclone IV FPGAs has been reduced by up to 25 percent compared to Cyclone® III FPGAs. The result is the lowest power consumption of any comparable FPGA. Cyclone IV EP4CE15 Core Board-User Manual(Hardware) Table of Contents 1. INTRODUCTION .................................................................................. 3 1.1 1.2 1.3 2. DOCUMENT SCOPE ..................................................................... 3 KIT OVERVIEW........................................................................... 3 KIT TOP VIEW ........................................................................... 3 GETTING STARTED .............................................................................. 4 2.2 CYCLONE IV EP4CE15 HARDWARE DESIGN ..................................... 5 2.2.1 Cyclone IV EP4CE15 Power Supply .............................. 5 2.2.2 Cyclone IV EP4CE15 SDRAM Memory ......................... 6 2.2.3 Cyclone IV EP4CE15 SPI Boot ...................................... 6 2.2.4 Cyclone IV EP4CE15 System Clock .............................. 7 2.2.1 Cyclone IV EP4CE15 JTAG Port ................................... 8 2.2.2 Cyclone IV EP4CE15 Power Supply .............................. 8 2.2.3 Cyclone IV EP4CE15 Extension IO ............................... 9 2.2.4 Cyclone IV EP4CE15 User LED ................................... 11 2.2.5 Cyclone IV EP4CE15 User Key ................................... 11 3. REFERENCE........................................................................................ 12 4. REVISION .......................................................................................... 13 Cyclone IV EP4CE15 Core Board User Manual-V01 1. Introduction 1.1 Document Scope This demo user manual introduces the Cyclone IV EP4CE15 core board and describes how to setup the core board running with application software Altera Quartus II 15.1. Users may employee the on board rich logic resource FPGA EP4CE15F23C8N and large SDRAM memory MT48LC16M16 to implement various applications. The core board also has 108 non-multiplexed FPGA IOs for extending customized modules, such as UART module, CMOS/CCD camera module, LCD/HDMI/VGA display module etc. 1.2 Kit Overview Below section lists the parameters of the Cyclone IV EP4CE15: On-Board FPGA: EP4CE15F23C8N; On-Board FPGA external crystal frequency: 50MHz; EP4CE15F23C8N has rich block RAM resource up to 504Kb; EP4CE15F23C8N has 15K Logic elements; On-Board N25Q064 SPI Flash, 8M bytes for user configuration code; On-Board 32MB Micron SDRAM, MT48LC16M16A2; On-Board 3.3V power supply for FPGA by using MP2315 wide input range DC/DC; EP4CE15 core board has two 64p, 2.54mm pitch headers for extending user IOs. All IOs are precisely designed with length matching; EP4CE15 core board has 3 user switches; EP4CE15 core board has 2 user LEDs; EP4CE15 core board has JTAG interface, by using 10p, 2.54mm pitch header; EP4CE15 core board PCB size is: 6.7cm x 8.4cm; Default power source for core board is: 1A@5V DC, the DC header type: DC-050, 5.5mmx2.1mm; 1.3 Kit Top View Figure 1-1. Cyclone IV EP4CE15 Top View Cyclone IV EP4CE15 Core Board User Manual-V01 2. Getting Started Below image shows the dimension of the Cyclone IV EP4CE15 core board: 67.1mm x 84.1mm. The unit in below image is millimeter(mm). Figure 2-1. Cyclone IV EP4CE15 Dimension The Cyclone IV EP4CE15 core board tool chain consists of Altera Quartus II 15.1, Altera USB Blaster cable, EP4CE15 core board and 5V DC power supply. Below image shows the Altera Quartus II 15.1 development environment which could be downloaded from Altera(Intel) office website: Cyclone IV EP4CE15 Core Board User Manual-V01 2.2 Cyclone IV EP4CE15 Hardware Design 2.2.1 Cyclone IV EP4CE15 Power Supply The core board needs 5V DC input as power supply which could be directly injected from power header or the 64P header U7/U8. Users may refer to the hardware schematic for the detailed design. The on board LED D4 indicates the 3.3V supply, it will be turned on when the 5V power supply is active. In default status, all the FPGA banks IO power level is 3.3V because bank power supply is 3.3V. Note: FPGA core supply 1.2V is regulated by On-Semi DC/DC chip NCP1529 which could output maximum 1A current. 3V3 L10 L11 M10 M11 L12 L13 M12 M13 N11 K11 N12 K12 K13 N13 N10 K10 J9 D7 J5 H8 A1 C5 C9 C11 G2 AA2 AA22 U5 E18 F5 V18 U12I GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND49 GND50 GND51 GND25 GND26 GND27 GND28 GND29 GND30 GND31 GND32 GND33 GND34 GND35 GND36 GND37 GND38 GND39 GND40 GND41 GND42 GND43 GND44 GND45 GND46 GND47 GND48 GND52 GND53 GND54 GND55 GND56 GND57 GND58 GND59 C12 C14 C16 A22 E20 G20 L20 P19 V20 Y 20 AB22 Y 18 Y 16 Y 12 Y 11 Y9 Y5 AB1 N3 U3 W3 D3 F3 K3 H3 R3 AB6 Y 15 T20 J19 C18 D8 N4 U4 W4 R4 AB2 W5 W9 W11 AA6 AB21 W12 W16 W18 Y 14 P18 V19 Y 19 T19 E19 G19 L19 J20 A21 D12 D14 D16 D18 GNDA1 GNDA2 GNDA3 GNDA4 A2 D5 D9 D11 E8 EP4CE15F23 1V2 U12J D4 F4 K4 H4 VCCIO1_1 VCCIO1_2 VCCIO1_3 VCCIO1_4 VCCIO2_1 VCCIO2_2 VCCIO2_3 VCCIO2_4 VCCIO3_1 VCCIO3_2 VCCIO3_3 VCCIO3_4 VCCIO3_5 VCCIO4_1 VCCIO4_2 VCCIO4_3 VCCIO4_4 VCCIO4_5 VCCINT21 VCCINT20 VCCINT19 VCCINT18 VCCINT17 VCCINT16 VCCINT15 VCCINT14 VCCINT13 VCCINT12 VCCINT11 VCCINT10 VCCINT9 VCCINT8 VCCINT7 VCCINT6 VCCINT5 VCCINT4 VCCINT3 VCCINT2 VCCINT1 J8 T13 U17 U16 P13 P10 P9 N9 K9 J10 K14 J14 J13 M9 L9 P12 P11 M14 L14 J12 J11 VCCIO5_1 VCCIO5_2 VCCIO5_3 VCCIO5_4 VCCIO6_1 VCCIO6_2 VCCIO6_3 VCCIO6_4 2V5 VCCA4 VCCA3 VCCA2 VCCA1 U18 G6 F18 T6 VCCIO7_1 VCCIO7_2 VCCIO7_3 VCCIO7_4 VCCIO7_5 VCCIO8_1 VCCIO8_2 VCCIO8_3 VCCIO8_4 VCCIO8_5 1V2 VCCD_PLL4 VCCD_PLL3 VCCD_PLL2 VCCD_PLL1 V17 F6 E17 U6 EP4CE15F23 Figure 2-2. Power Supply for the FPGA Cyclone IV EP4CE15 Core Board User Manual-V01 2.2.2 Cyclone IV EP4CE15 SDRAM Memory Cyclone IV EP4CE15 has on board 16bit width data bus, 32MB memory size MT48LC16M16 SDRAM provided by Micron. Below image shows the detailed hardware design: 4.7K 4.7K 4.7K 4.7K 4.7K R254 R253 R252 R251 R250 3V3 SDCKE0 CAS RAS SDWE SD_NCS0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 23 24 25 26 29 30 31 32 33 34 22 35 A13 A14 20 21 A12 36 40 SDCKE0 37 SDCLK0 38 DQML DQMH 15 39 CAS RAS 17 18 16 SDWE SD_NCS0 19 MN1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 MT48LC16M16A2 BA0 BA1 A12 N.C VDD VDD VDD VDDQ VDDQ VDDQ VDDQ CKE CLK DQML DQMH VSS VSS VSS VSSQ VSSQ VSSQ VSSQ CAS RAS WE CS 2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53 1 14 27 3 9 43 49 28 41 54 6 12 46 52 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 3V3 C9 C3 C88 C87 100NF 100NF 100NF 100NF C4 C6 100NF 100NF 256 M bit s Figure 2-3. SDRAM 2.2.3 Cyclone IV EP4CE15 SPI Boot Cyclone IV EP4CE15 boots from external SPI Flash, detailed hardware design is shown in below figure. The SPI flash is using N25Q064 manufactured by Micron, with 64Mbit memory storage. Note: The SPI Flash is designed with x1 mode. 3V3 R248 FPGA_NCSO 1 FPGA_DATA0 2 R249 1K 3 4 U6 nCE VDD SO HOLD WP SCK VSS SI 1K 8 7 6 FPGA_DCLK 5 FPGA_ASDO N25Q064A13ESE40F Figure 2-4. SPI Flash Cyclone IV EP4CE15 Core Board User Manual-V01 Below image shows the hardware configuration of MSEL[3:0]: 0010, in which way will make the FPGA boot from Active Serial (x1 or x4) Standard Mode: IO_B2 IO_B1 LED0 IO_C2 IO_C1 IO_D2 IO_E1 IO_F2 IO_F1 IO_H2 IO_H1 IO_J2 IO_J1 H5 B2 B1 G5 E4 E3 C2 C1 D2 H7 H6 J6 E1 F2 F1 G4 G3 L8 K8 J7 K7 J4 H2 H1 J3 J2 J1 U12A IO_H5 TDI IO,DIFFIO_L1P TDO IO,DIFFIO_L1N TCK IO_G5 TMS IO,DIFFIO_L2P,nRESET IO,DIFFIO_L2N IO,DIFFIO_L3P MSEL0 IO,DIFFIO_L3N MSEL1 IO,DIFFIO_L4P MSEL2 IO,VREFB1N0 MSEL3 IO,DIFFIO_L5P IO,DIFFIO_L5N IO,DIFFIO_L6N NCE IO,DIFFIO_L7P IO,DIFFIO_L7N IO,DIFFIO_L8P IO,DIFFIO_L8N CONF_DONE IO,DIFFIO_L9P NCONFIG IO,DIFFIO_L9N NSTATUS IO,DIFFIO_L10P IO,DIFFIO_L10N IO_J4 IO,DIFFIO_L11P IO,DIFFIO_L4N,DATA1,ASDO IO,DIFFIO_L11N IO,DATA0 IO,VREFB1N1 IO,DIFFIO_L6P,FLASH_nCE,nCSO IO,DIFFIO_L12P DCLK IO,DIFFIO_L12N CLK15,DIFFCLK_6P CLK14,DIFFCLK_6N CLK13,DIFFCLK_7P CLK12,DIFFCLK_7N CLK11,DIFFCLK_4P CLK10,DIFFCLK_4N CLK9,DIFFCLK_5P CLK8,DIFFCLK_5N CLK7,DIFFCLK_3N CLK6,DIFFCLK_3P CLK5,DIFFCLK_2N CLK4,DIFFCLK_2P CLK3,DIFFCLK_1N CLK2,DIFFCLK_1P CLK1,DIFFCLK_0N L5 L4 L2 L1 JTAG_TDI 10K JTAG_TDO JTAG_TCK 1K JTAG_TMS 10K M17 L18 L17 K20 R246 2V5 R245 R247 2V5 2V5 L3 M18 K5 K6 10K nCONFIG 10K 10K D1 K1 E2 K2 FPGA_ASDO FPGA_DATA0 FPGA_NCSO FPGA_DCLK AA11 AB11 AA12 AB12 B11 A11 B12 A12 T22 T21 G22 G21 T1 T2 G1 R242 3V3 R244 3V3 R243 3V3 CLK_50M EP4CE15F23 Figure 2-5. MSEL Settings 2.2.4 Cyclone IV EP4CE15 System Clock The Cyclone IV EP4CE15 has system clock frequency 50MHz which is directly provided by external crystal. The crystal is designed with high accuracy and stability with low temperature drift 10ppm/°c. Below image shows the detailed hardware design: 3V3 R9 1 OE 4.7K VDD 4 C42 100NF 50 MHz 2 VSS OUT 3 CLK_50M SG-8002JC-50.0000M-PCB Y1 Figure 2-6. 50MHz System Clock Cyclone IV EP4CE15 Core Board User Manual-V01 2.2.1 Cyclone IV EP4CE15 JTAG Port The on board JTAG port uses 10P 2.54mm pitch header which could be easily connected to Altera USB blaster cable. Below image shows the hardware design of the JTAG port: 1 3 5 7 9 JTAG_TCK JTAG_TDO JTAG_TMS JTAG_TDI J2 2 4 6 8 10 2V5 CONA_10P Figure 2-7. JTAG Port Cyclone IV EP4CE15 Power Supply The core board’s 3.3V power supply is using high efficiency DC/DC chip MP2315 provided by MPS Inc. The MP2315 supports wide voltage input range from 4.5V to 24V. In normal use case, 5V DC power supply is suggested to be applied on the board. Below image shows the MP2315 hardware design: REG ULATED 5V O NLY 3V3 C5 100nF R238 20R VIN U11 5 BST IN 2 4 3 2 1 4.7uH 3 SW EN/SY NC VCC R239 8 FB 4 33K GND 22pF 47uF100nF 100K C81 C82 C7 + L6 R235 AAM 6 R10 100K + 7 C80 1 R237 100nF C58 47uF C68 100nF JP5 Power_Header_SMT 75K MP2315 R236 33K Figure 2-8. MP2315 Hardware Design The core board’s 2.5V and 1.2V FPGA core voltage power supply is using high efficiency DC/DC chip NCP1529 provided by On-Semi Inc. 2V5 L7 2V5 4.7uH M 2.2.2 3V3 4 U10 VIN SW 3 C71 4.7uF R226 75K C73 22pF C72 4.7uF 1 EN GND 2 FB 5 NCP1529 Cyclone IV EP4CE15 Core Board R227 23.7K User Manual-V01 1V2 1V2 4.7uH M L3 3V3 4 U5 VIN SW 3 C56 4.7uF R21 100K C46 22pF C47 4.7uF 1 EN GND 2 FB 5 NCP1529 R26 100K Figure 2-9. NCP1529 Hardware Design 2.2.3 Cyclone IV EP4CE15 Extension IO The core board has two 64P 2.54mm pitch female headers which are used for extending user modules, such as ADC/DAC module, audio/video module, ethernet module, etc. Cyclone IV EP4CE15 Core Board User Manual-V01 U8 3V3 IO_AA13 IO_AA14 IO_AA15 IO_AA16 IO_AA17 IO_AA18 IO_AA19 IO_AA20 IO_Y 22 IO_W22 IO_V22 IO_U22 IO_R22 IO_P22 IO_N22 IO_M22 IO_L22 IO_K22 IO_J22 IO_H22 IO_F22 IO_E22 IO_D22 IO_C22 IO_B22 IO_N20 IO_M20 VIN Connected to VIN power header. 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 3V3 IO_AB13 IO_AB14 IO_AB15 IO_AB16 IO_AB17 IO_AB18 IO_AB19 IO_AB20 IO_Y 21 IO_W21 IO_V21 IO_U21 IO_R21 IO_P21 IO_N21 IO_M21 IO_L21 IO_K21 IO_J21 IO_H21 IO_F21 IO_E21 IO_D21 IO_C21 IO_B21 IO_N19 IO_M19 VIN HDR_32X2 U7 3V3 IO_R1 IO_P1 IO_N1 IO_M1 IO_J1 IO_H1 IO_F1 IO_E1 IO_C1 IO_B1 VIN Connected to VIN power header. IO_B3 IO_B4 IO_C4 IO_B5 IO_B6 IO_B7 IO_B8 IO_B9 IO_B10 IO_B13 IO_B14 IO_B15 IO_B16 IO_B17 IO_B18 IO_B19 IO_B20 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 3V3 IO_A3 IO_A4 IO_C3 IO_A5 IO_A6 IO_A7 IO_A8 IO_A9 IO_A10 IO_A13 IO_A14 IO_A15 IO_A16 IO_A17 IO_A18 IO_A19 IO_A20 IO_R2 IO_P2 IO_N2 IO_M2 IO_J2 IO_H2 IO_F2 IO_D2 IO_C2 IO_B2 VIN HDR_32X2 Figure 2-10. Extension IO Cyclone IV EP4CE15 Core Board User Manual-V01 2.2.4 Cyclone IV EP4CE15 User LED Below image shows one user LED and 3.3V power supply indicator: R131 R255 1K 1K 3V3 3V3 1 D5 2 1 D4 2 LED0 Figure 2-11. User LEDs 2.2.5 Cyclone IV EP4CE15 User Key Below image shows the nCONFIG key and two user keys: 3V3 3V3 R228 4.7k KEY 0 R221 4.7K 2 SW1 KEY 1 KEY 0 2 SW2 1 nCONFIG KEY 1 2 SW3 1 1 Figure 2-12. User Keys Cyclone IV EP4CE15 Core Board User Manual-V01 3. Reference [1] [2] [3] [4] [5] [6] [7] ep4ce15f23-sdram.pdf an592.pdf an592_ch.pdf cyiv-5v1.pdf cyiv-5v2.pdf cyiv-5v3.pdf pcg-01008.pdf Cyclone IV EP4CE15 Core Board User Manual-V01 4. Revision Doc. Rev. Date Comments 0.1 10/21/2018 Initial Version. 1.0 10/28/2018 V1.0 Formal Release. Cyclone IV EP4CE15 Core Board User Manual-V01
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