SCR1100_D02_Datasheet SCR1100 D02 Datasheet V2 1

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Data Sheet

SCR1100-D02 SINGLE AXIS GYROSCOPE WITH DIGITAL SPI INTERFACE
Features
•
•
•
•
•
•
•
•
•
•

±100 º/s angular rate measurement range
Angular rate measurement around X axis
Angular rate sensor exceptionally insensitive to
mechanical vibrations and shocks
Superior bias instability for MEMS gyroscopes
(<1º/h)
Digital SPI interfacing
Enhanced self diagnostics features
Small size 8.5 x 18.7 x 4.5 mm (w x l x h)
RoHS compliant robust packaging suitable for
lead free soldering process and SMD mounting
Proven capacitive 3D-MEMS technology
Temperature range -40 °C...+125 °C

Applications
SCR1100-D02 is targeted to applications with high
stability and tough environmental requirements. Typical
applications are:
•
Inertial Measurement Units (IMUs) for highly
demanding environments
•
Platform stabilization and control
•
Motion analysis and control
•
Roll over detection
•
Robotic control systems
•
Guidance systems
•
Navigation systems

General Description
SCR1100-D02 is a single axis high performance gyroscope. It is part of Murata's high performance gyro family and it has
the same gyro section as the combined gyro acceleration product SCC1300-D02. The sensor is based on Murata's
proven capacitive 3D-MEMS technology and it has highly sophisticated signal conditioning ASIC with digital SPI
interface. Small robust packaging guarantees reliable operation over product lifetime. The housing is suitable for SMD
mounting and the component is compatible with RoHS and ELV directives.
SCR1100-D02 is designed, manufactured and tested against high stability, reliability and quality requirements. The
angular rate sensor provides highly stable output over wide ranges of temperature and mechanical noise. The bias
stability is in the elite of MEMS gyros and the component has several advanced self diagnostics features.

SCR1100-D02

TABLE OF CONTENTS

SCR1100-D02 Single axis Gyroscope with digital SPI interface ......................1
Features............................................................................................................................................... 1
Applications ........................................................................................................................................ 1
General Description ............................................................................................................................ 1

1 General Description ........................................................................................4
1.1

Introduction ............................................................................................................................... 4

1.2 General Product Description .................................................................................................... 4
1.2.1 Factory Calibration ............................................................................................................. 5
1.3

Abbreviations ............................................................................................................................ 5

2 Specifications..................................................................................................6
2.1

Performance Specifications for Gyroscope ............................................................................ 6

2.2

Absolute Maximum Ratings ..................................................................................................... 7

2.3

Digital I/O Specification ............................................................................................................ 7

2.4

SPI AC Characteristics ............................................................................................................. 8

3 Reset and Power Up .......................................................................................9
3.1

Power-up Sequence .................................................................................................................. 9

3.2

Reset .......................................................................................................................................... 9

4 Component Interfacing ...................................................................................9
4.1 SPI Interfaces ............................................................................................................................ 9
4.1.1 SPI Transfer ........................................................................................................................ 9
4.1.2 SPI Transfer Parity Mode ................................................................................................. 11
4.2 ASIC Addressing Space ......................................................................................................... 12
4.2.1 Register Definition ............................................................................................................ 12
4.2.2 Data Register Block .......................................................................................................... 12
4.2.3 Temperature Output Registers ........................................................................................ 13

5 Application Information ................................................................................ 14
5.1

Pin Description ........................................................................................................................ 14

5.2 Application Circuitry and External Component Characteristics .......................................... 15
5.2.1 Separate Analog and Digital Ground Layers with Long Power Supply Lines .............. 16
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5.3 Boost Regulator and Power Supply Decoupling in Layout .................................................. 16
5.3.1 Layout Example ................................................................................................................ 17
5.3.2 Thermal Connection ......................................................................................................... 18
5.4

Measurement Axis and Directions ......................................................................................... 19

5.5 Package Characteristics ......................................................................................................... 20
5.5.1 Package Outline Drawing ................................................................................................. 20
5.5.2 PCB Footprint ................................................................................................................... 21
5.6

Assembly instructions ............................................................................................................ 21

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SCR1100-D02

1
1.1

General Description
Introduction
This document contains essential technical information for SCR1100 sensor. Specifications, SPI
interface descriptions, user accessible register details, electrical properties and application
information etc. This document should be used as a reference when designing in SCR1100
component.

1.2

General Product Description
The SCR1100 sensor consists of silicon based MEMS angular rate sensing element and
Application Specific Integrated Circuits (ASIC) used to sense and control sensing element. Figure 1
represents an upper level block diagram of the component. ASIC have digital SPI interfaces to
control and read the gyroscope.

Figure 1. SCR1100 component block diagram.
The angular rate sensing element is manufactured using Murata proprietary High Aspect Ratio
(HAR) 3D-MEMS process, which enables making robust, extremely stable and low noise capacitive
sensors.

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SCR1100-D02

The angular rate sensing element consists of moving masses that are purposely exited to in-plane
drive motion. Rotation in sensitive direction causes out-of-plane movement that can be measured
as capacitance change with the signal conditioning ASIC.

1.2.1

Factory Calibration
SCR1100 sensor is factory calibrated. No separate calibration is required in the application.
Trimmed parameters during production include sensitivities and offsets over temperature, and
frequency responses. However it should be noted that assembly can cause minor offset/bias errors
to the sensor output. If best possible offset/bias accuracy is required, system level offset/bias
calibration (zeroing) after assembly is recommended.
Calibration parameters are stored during manufacturing inside non-volatile memory. The
parameters are read automatically from the internal non-volatile memory during the start-up.

1.3

Abbreviations
ASIC
SPI
RT
STC
STS
Avdd
Dvdd

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Application Specific Integrated Circuit
Serial Peripheral Interface
Room Temperature
Self Test Continuous (continuous self testing of accelerometer element)
Self Test Static (gravitational based self test of accelerometer element)
Analog supply voltage
Digital supply voltage

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Rev. 2.1

SCR1100-D02

Specifications

2.1

Performance Specifications for Gyroscope

Table 1. Gyroscope performance specifications (Avdd = 5 V, Dvdd = 3.3 V and ambient temperature unless
otherwise specified).
Parameter
Analog supply voltage
Analog supply current
Digital supply voltage
Digital supply current
Operating range
B)
Offset error
Offset over temperature

Min
4.75
24
3.0
16
-100
-1
-0.6
-0.3
-0.3

Temperature range -40 ... +125 °C
Temperature range -40 ... +125 °C
Measurement axis X

Offset drift velocity
C)
Offset short term instability
C)
Angular random walk (ARW)
Sensitivity
Sensitivity over temperature
B)
Total sensitivity error
Nonlinearity
Noise (RMS)
Noise Density
D)
Cross-axis sensitivity
G-sensitivity
Shock sensitivity
Shock recovery time
Amplitude response
Power on setup time
Output data rate
Output load
SPI clock rate
A)

Condition

Temperature range -40 ... +125 °C
Temperature range -10 … +60 °C
Temperature gradient ≤ 2.5 K/min

Typ
5
26
3.3
20

Max
5.25
29.5
3.6
24
100
1
0.6
0.3
0.3

<1
0.45
50
Temperature range -40 ... +125 °C

-1
-2
-0.5

Temperature range -40 ... +125 °C

0.06
0.0085

Units
V
mA
V
mA
°/s
°/s
°/s
°/s
(°/s)/min
°/h
º/ h

1
2
0.5
0.1

LSB/(°/s)
%
%
°/s
°/s
(º/s)/ Hz

1.7
0.1
2.0
50.0

-0.1
50g, 6ms
-3dB frequency

%
(°/s)/g
°/s
ms
Hz
s
kHz
pF
MHz

50
0.8
2
200
8

0.1

MIN/MAX values are ±3 sigma variation limits from validation test population.
Including calibration error and drift over lifetime.
Typical, constant temperature, Allan Variance curve Figure 2 b).
Cross-axis sensitivity is the maximum sensitivity in the plane perpendicular to the measuring direction relative to the
sensitivity in the measuring direction. The specified limit must not be exceeded by either axis.

B)
C)
D)

SCR1100-D02 Allan Variance Curve

SCR1100-D02 Gyro Offset over Temperature
100

0.6

Offset [º/s]

0.2
0
-40

-20

100

120

+3sigma
AVG
-3sigma

-0.2

Allan deviation [º/h]

0.4

10
+3 sigma
Average
1

-0.4
-0.6
0.1

-0.8

0.1

Temperature [ºC]

100

1000

10000

100000

tau [s]

Figure 2 a) SCR1100-D02 Gyroscope offset over full temperature range, b) Allan variance curve

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SCR1100-D02

2.2

Absolute Maximum Ratings

Table 2. Absolute maximum ratings of the SCR1100 sensor.
Parameter
Analog supply voltage, AVDD_G
Digital supply voltage, DVDD_G
Maximum voltage at analog input/output pins
Maximum voltage at digital input/output pins
Operating temperature
Storage temperature

Condition

Min
-0.5
-0.3
-0.3
-0.3
-40
-40
-40

Max 96h
Maximum junction temperature during
lifetime. Note: device has to be functional,
but not in full spec.
Mechanical Shock
ESD
Ultrasonic Cleaning

2.3

Typ

Max
7
3.6
AVDD_G + 0.3V
DVDD_G + 0.3
125
125
150
155

Units
V
V
V
°C
°C
°C
°C

3000
HBM
CDM
Prohibited

g
kV
V

2
500

Digital I/O Specification
Table 3 below describe the DC characteristics of SCR1100 sensor digital I/O pins. Supply voltage
is 3.3 V unless otherwise noted. Current flowing into the circuit has positive values.

Table 3. Absolute maximum ratings of the SCR1100 gyroscope SPI interface.
Parameter
Input terminal CSN_G
Pull up current
Input high voltage
Input low voltage
Hysteresis
VIN
Input terminal SCK_G
Input high voltage
Input low voltage
Hysteresis
Input leakage current
Output terminal MOSI_G
Input high voltage
Input low voltage
Hysteresis
Input current source (pull-down)
VIN
Output terminal MISO_G (Tri-state)
Output high voltage

Output low voltage
Capacitive load

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Conditions

Symbol

Min

VIN = 0 V
DVDD_G = 3.3 V
DVDD_G = 3.3 V
DVDD_G = 3.3 V
Open circuit

IPU
VIH
VIL
VHYST
VIN

10
2

DVDD_G = 3.3 V
DVDD_G = 3.3 V
DVDD_G = 3.3 V
0 < VMISO < 3.3 V

VIH
VIL
VHYST
ILEAK

DVDD_G = 3.3 V
DVDD_G = 3.3 V
DVDD_G = 3.3 V
VIN = VDVDD_G
Open circuit

VIH
VIL
VHYST
ILEAK
VIN

IOUT = -1mA

VOH

IOUT = -50µA
0 ≤ VMISO ≤ 3.3 V

VOL

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Typ

Max

Unit

50
DVDD_G
0.8

µA
V
V
V
V

DVDD_G
0.8

V
V
V
uA

0.3
2
2
0.3
-1
2
0.3
10

1
DVDD_G
0.8
50
0.3

DVDD_G -0.5V

V
V
V
uA
V
V

DVDD_G -0.2V
0.5
200

V
V
pF

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Rev. 2.1

SCR1100-D02

2.4

SPI AC Characteristics
The AC characteristics of SCR1100 are defined in Figure 3 and Table 4.

TLS1

TCH

TCL

TLS2

TLH

CSN_G, CSB_A
SCK_G, SCK
THOL
MOSI_G, MOSI_A
TVAL1
MISO_G, MISO_A

TSET
DATA in

MSB in

LSB in

TVAL2
MSB out

TLZ
DATA out

LSB out

Figure 3. Timing diagram of SPI communication
Table 4. Timing Characteristics of SPI Communication.
Parameter
FSPI
TSPI
TCH
TCL
TLS1
TVAL1
TSET
THOL

Condition

TVAL2
TLS2

Delay SCK_G -> MISO_G
CSN_G hold time

TLZ
TRISE
TFALL
TLH

Tri-state delay time
Rise time of the SCK_G
Fall time of the SCK_G
Time between SPI cycles

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Min

Typ

Max
8

Units
MHz

1/ FSPI
SCK_G high time
SCK_G low time
CSN_G setup time
Delay CSN_G -> MISO_G
MOSI_G setup time
MOSI_G data hold time

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TSPI /2
TSPI /2
TSPI /2
TSPI /4
TSPI /4
TSPI /4
1.3 * TSPI /4

ns
ns

TSPI /4
10
10

ns
ns
ns
ns

TSPI /2

TSPI

ns
ns
ns
ns
ns
ns

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Rev. 2.1

SCR1100-D02

Reset and Power Up
After the start-up the angular rate and acceleration data is immediately available through SPI
registers. There is no need to initialize the gyroscope or accelerometer before starting to use it. If
the application requires monitoring operation correctness there are several options available to
monitor the status.

3.1

Power-up Sequence
To ensure correct ASIC start up please connect the digital supply voltage VDVDD_G (3.3V) before the
analog supply voltage VAVDD_G (5.0V) to the gyro ASIC. After power up please read Status register
twice to clear error flags. Angular rate data is available immediately so no start up command
sequence is required if error flags are not used.

Table 5. SCR1100 gyroscope power-up sequence.
Procedure
Set VDVDD_G V=3.0...3.6V
Wait 10ms
Set VAVDD_G V=4.75...5.25V
Wait 800 ms
Read Status register (08h) two times

3.2

Functions

Check

Acknowledge error flags after start up

Reset
SCR1100 can be reset by writing 0x04 in to IC Identification register (address 07h) or with external
active low reset pin (EXTRESN_G). Power supplies should be within the specified range before the
reset pin can be released.

Component Interfacing

4.1

SPI Interfaces
SCR1100 sensor SPI interface is a digital 4 wire interface where SCR1100 always operate as
slave devices in the master-slave operation mode.
SCR1100 Angular rate sensor ASIC SPI interface:
MOSI_G
MISO_G
SCK_G
CSN_G

4.1.1

master out slave in
master in slave out
serial clock
chip select (low active)

µP → ASIC
ASIC → µP
µP → ASIC
µP → ASIC

SPI Transfer
The SPI transfer is based on a 16-bit protocol. Figure 4 shows an example of a single 16-bit data
transmission. Each output data/status-bits are shifted out on the falling edge of SCK (MISO line).
Each bit is sampled on the rising edge of SCK (MOSI line).

Figure 4. SCR1100 angular rate sensor 16-bit data transmission

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SCR1100-D02

After the falling edge of CSN_G the device interprets the first 16-bit word is an address transfer
having a bit coding scheme below.
Address Transfer:
D15

D14

D13

D12

D11

D10

ADR6

ADR5

ADR4

ADR3

ADR2

ADR1

ADR0

Par
odd

ADR[6:0] :
RW :
par odd :

Register address
RW=1 : Write access
RW=0 : Read access
odd parity bit.
par odd = 0 : the number of ones in the data word (D15:D1) is odd.
par odd = 1 : the number of ones in the data word (D15:D1) is even.

The address selects an internal register of the device; the RW bit selects the access mode.
RW = ‘0'
The master performs a read access on the selected register. During the
transmission of the next word, the slave sends the requested register value to MISO_G. The slave
interprets the next word at MOSI_G as an address transfer.
RW = ‘1'
The master performs a write access on the selected register. The slave stores the
next transmitted word in the selected device register of MOSI_G and sends the actual register
value in response to MOSI_G. The transmission goes on with an address transfer to MOSI_G and
the address mode flags to MISO_G.
If the device is addressed by a nonexistent address it will respond with ´0´.
The next table shows the encoding scheme of a data value for a write access.
Data Transfer:
D15
Dat14

D14
Dat13

D13
Dat12

dat[14:0] :
par odd :

D12
Dat11

D11
Dat10

D10
Dat9

D9
Dat8

D8
Dat7

D7
Dat6

D6
Dat5

D5
Dat4

D4
Dat3

D3
Dat2

D2
Dat1

D1
Dat0

D0
Par
odd

data value for write access (15 Bit)
see Address Transfer

It is possible to combine the two access modes (write and read access) during one communication.
The communication can be finished after last transmitted word of mixed access communication
frame with CSN_G='1'. CSN_G must be '0' during mixed access communication frame.
SPI result values on MISO_G
Within SPI communication SCR1100 gyro ASIC sends Status Flags (Status/Config register value)
and register result values on MISO_G. The following two tables show the encoding scheme:
Status Flags:
D15

D14

D13

D12

D11

D10

D1
s_ok

D0
par odd

S_OK is generated out of the monitoring flags in the status register (08h).

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SCR1100-D02

D14
reg 13

D13
reg 12

reg[14:0] :
par odd :

D12
reg11

D11
reg 10

D10
reg9

D9
reg8

D8
reg7

D7
reg6

D6
reg5

D5
reg4

D4
reg3

D3
reg2

D2
reg1

D1
reg0

D0
par
odd

value of the internal register. All bits, which are not used, are set to zero.
see Address Transfer

Figure 5 shows an example of communication sequence:

Figure 5. Communication example
Each communication frame in the figure 6 contain 16 SCK cycles. After communication start
(CSN_G falling edge) the master sends ADR1 and performs a read access. In parallel the slave
sends Status Flags. During the transmission of the next data word (ADR2) the slave sends the
register value of ADR1 (Result_1). On ADR2 the master performs a write access (RW='1'). The
slave stores Data_2 in the register of ADR2 and sends the current register value of ADR2 to
MISO_G. After the transmission of data value during a write access the slave always sends Status
Flags. To receive Result_5 of the last read access the Master has to send an additional word ('Zero
Vector').
Example of how to read out Rate output
The MCU begins by sending the address frame followed by a zero vector (with correct parity). The
zero vector is necessary for the sensor to be able to reply to the MCU during the last 16-bit frame.
The sensor replies by sending first the status bits followed by the rate data.
MOSI: 0x0001 0x0001
MISO: 0x3FFE 0x0008

4.1.2

SPI Transfer Parity Mode
SCR1100 gyro ASIC is able to support parity check during SPI Transfer. This functionality is
controlled by the IC Identification Register. The internal parity status is reported in Status/Config
Register.
With parity enable bit set the SCR1100 gyro ASIC is expecting an additional parity bit after the
transmission of each 16 bit data word. This additional parity bit requires an additional SCK cycle,
i.e. the SPI frame consists of 17 SCK cycles instead of the normal 16 SCK cycles. Detecting a
wrong parity bit has the following consequences:
During read access:
The Parity Error Flag in the Status/Config Register is set. The SCR1100 reports the contents of the
received register address.
During write access:
The Parity Error Flag in the Status/Config Register is set. The SPI Write Access is cancelled.
These actions are performed either if the parity failure is detected in the address word or the data
word.
Due to the additional parity bit a single SPI Transfer is using now 17 Bit as shown in the Figure 6.

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SCR1100-D02

Figure 6. Communication in parity mode.
At the end of the data word the SPI master and the SPI slave have to add an additional parity bit.
Both devices have to check the received parity according to the selected parity mode odd or even.

4.2
4.2.1

ASIC Addressing Space
Register Definition
The ASIC has multiple register and EEPROM blocks. The EEPROM blocks holding the calibration
data will be programmed via SPI during manufacturing process. User only needs to access the
Data Register Block at addresses 00h and 07h - 0Ah (addresses 01h-06h are reserved). The
content of this register block is described below.

4.2.2

Data Register Block

Table 6. Register map of data register block.
Address
Dec (hex)

Number of
Bits

Read/
Write/
Factory

Data Format

Description

00(00)

Rate_X[0]

00(00)

Rate_X[1]
(S_OK Flag)

odd Parity bit of Rate_X[14,1]
S_OK =0 Rate_X failed
S_OK =1 Rate_X valid (ok)
S_OK is generated out of the monitoring flags in the
status register (08h).
If either one of the flags in register 08h [15:2] is 0,
S_OK will be 0. Only if all flags in register 08h[15:2]
are 1 S_OK is set to 1

Rate_X[15:2]
IC Identification
[14, 11:4, 2, 1]
IC Identification []

14
13

R
F

S
-

Sensor output data format two's complement
Reserved

IC Identification[12]
HWParEn
IC Identification[13]
HWParSel

Status/Config
[14:10, 8:1]
Status/Config[9]
(Parity_OK)

09(09)

Reserved

This bit is set as soon as the SPI logic is detecting a
wrong parity bit received from the µC. This bit is
automatically cleared during read access to this
register.
Bit = 0 : Parity error
Bit = 1 : Parity check ok.
Reserved

10(0A)

Temp[0]

odd Parity bit of TEMP[14,1]

10(0A)

Temp[1] (S_OK Flag)

S_OK =0 Rate_X failed

00(00)
07(07)
07(07)
07(07)
07(07)

08(08)
08(08)

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Soft Reset bit
Writing '1' to this register bit will reset the device
Setting this bit to ‘1’ is enabling the Parity functionality
This bit is selecting an even or an odd parity mode.
Bit = 0: Even Parity mode means that the number of
ones in the data word including the parity bit is even.
Bit = 1: Odd Parity mode means that the number of
ones in the data word including the parity bit is odd.
Reserved

12/21
Rev. 2.1

SCR1100-D02
S_OK =1 Rate_X valid
10(0A)

Temp[15,2]

Temperature sensor output

The offset of temperature data is factory calibrated but sensitivity of the temperature data varies
from part to part. Note: Registers marked with F are reserved for factory use only and not to be
written to.

4.2.3

Temperature Output Registers
The offset of temperature sensor is factory calibrated but sensitivity of the temperature data varies
from part to part. The temperature doesn't reflect absolute ambient temperature.
Temperature data is in 2's complement format in 14 bits (15:2) of Temp register. To use the
temperature sensor as an absolute temperature sensor or for additional system level
compensations, the offset and sensitivity of the sensor should be measured and calibrated on
system level
Temperature registers’ typical output at +23 °C is -1755 counts and 1 °C change in temperature
typically corresponds to 65 count change in temperature sensor output. Temperature information
can be converted from decimals to [°C] as follows

Temp[º C ] = (Temp[LSB ] + 3250 ) / 65 ,
where Temp[°C] is temperature in Celsius and Temp[LSB] is temperature from TEMP registers in
decimal format,
Temperature sensor offset calibration error at 25°C: ≤ ±15 °C
Temperature sensor sensitivity calibration error: ≤ 5%

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SCR1100-D02

Application Information

5.1

Pin Description
The pin out for SCR1100 is presented in Figure 7 (pin descriptions can be found from Table 7).

Figure 7. SCR1100 pinout diagram.
Table 7. SCR1100 pin descriptions.
pin #
1
2

Name
HEAT
REFGND_G

Type 1)
A1
AI

PD/PU/HV 3)

VREFP_G

EXTRESN_G

5
6
7
8
9
10
11
12
13
14
14
15
16
17
18
19
19
20
21
22
23

RESERVED
AHVVDDS_G
LHV
DVDD_G
DVSS_G
MISO_G
NC
NC
NC
NC
NC
NC
HEAT
HEAT
NC
NC
NC
NC
NC
NC
MOSI_G

R
AO
AI
AI
AI
DOZ
NC
NC
NC
NC
NC
NC
A1
A1
NC
NC
NC
NC
NC
NC
DI

SCK_G

CSN_G

RESERVED

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PU
HV (~30V)

Description
Heatsink connection, externally connected to AVSS_G.
Analog reference ground should be connected external to AVSS_G
External C for positive reference voltage and output pin for use as supply
for external load. Max load current is 5mA. Note this voltage can only be
used as supply for analog circuits. Circuits that produce high current spikes
due to switching circuit can not be driven by this node.
External Reset, 3.3V level Schmitt-trigger input with internal pull-up, High
low transition cause system restart
Factory used only, leave floating
External C for high voltage analog supply, high voltage pad ≈30V
Connection for inductor for high voltage generation, high voltage pad ≈30V
Digital Supply Voltage
Digital Supply Return, external connected to AVSS_G
Data Out of SPI Interface, 3.3V level, Level definition see SPI-section
Not connected, connect to GND or leave floating.
Not connected, connect to GND or leave floating.
Not connected, connect to GND or leave floating.
Not connected, connect to GND or leave floating.
Not connected, connect to GND or leave floating.
Not connected, connect to GND or leave floating.
Heatsink connection, externally connected to AVSS_G.
Heatsink connection, externally connected to AVSS_G.
Not connected, connect to GND or leave floating.
Not connected, connect to GND or leave floating.
Not connected, connect to GND or leave floating.
Not connected, connect to GND or leave floating.
Not connected, connect to GND or leave floating.
Not connected, connect to GND or leave floating.
Data In of SPI Interface, 3.3V level Schmitt-trigger input
Clk Signal of SPI Interface, 3.3V level Schmitt-trigger input, Input Clock
range 2 to 8MHz. Level definition see SPI-section
Chip Select of SPI Interface, 3.3V level Schmitt-trigger input, Input Clock
range 2 to 8MHz. Level definition see SPI-section
Factory used only, leave floating

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Rev. 2.1

SCR1100-D02
pin #
27
28
29
30
31
32

Name
RESERVED
AVDD_G
SUB
RESERVED
RESERVED
HEAT

Type 1)
R
AI
AI
R
R
A1

PD/PU/HV 3)

Description
Factory used only, leave floating
Analog Supply voltage
Connected external to AVSS_G
Factory used only, leave floating
Factory used only, leave floating
Heat sink connection, externally connected to AVSS_G.

Notes:
1) A=Analog, D=Digital, I=Input, O=Output, Z=Tristate Output, R = Reserved
3) PU=internal pullup, PD=internal pulldown, HV = high voltage

5.2

Application Circuitry and External Component Characteristics
See recommended schematics in Figure 8. Component characteristics are presented in Table 8.

Figure 8. SCR1100 recommended circuit diagram.

Optional filtering recommendations for better PSRR (Power Supply Rejection Ratio) is presented in
Figure 9. Please note that PSSR filtering is optional and not required if the 3.3V power supply is
already stabile enough. RC filtering (R1 & C7 without L2) could also be sufficient for most cases.

Figure 9. Optional filtering recommendation to improve PSRR if required.

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Doc.Nr. 82 1130 00

15/21
Rev. 2.1

SCR1100-D02

5.2.1

Separate Analog and Digital Ground Layers with Long Power Supply Lines
If power supply routings/cablings are long separate ground cabling, routing and layers for analog
and digital supply voltages should be used to avoid excessive power supply ripple.
In the recommended circuit diagram Figure 8 and layout Figure 11 joint ground is used as it is the
simplest solution and is adequate as long as the supply voltage lines are not long (when
connecting the SCR1100 directly to µC on the same PCB).

Table 8. SCR1100 external components.
Component
C1, C3, C5

C39

C6
Optional for better PSRR:
R1
C7
L2

5.3

Parameter
Capacitance
ESR @ 1 MHz
Voltage rating
Capacitance
ESR @ 1 MHz
Voltage rating
Inductance
ESR L=47 µH
Voltage rating
Capacitance
ESR @ 1 MHz

Min
70

Typ
100

Max
130
100

7
376

470

564
100

30
37

57
5

30
0.7

1.3
100

Resistance
Capacitance
Impedance

10
4.7
1k

Units
nF
mΩ
V
nF
mΩ
V
µH
Ω
V
µF
mΩ
Ω
µF
Ω

Boost Regulator and Power Supply Decoupling in Layout

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Rev. 2.1

SCR1100-D02

Recommended layout for DVDD_G/LHV pin decoupling is shown in Figure 10.

Figure 10. Layout recommendations for DVDD_G/LHV pin decoupling.

5.3.1

Layout Example

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Rev. 2.1

SCR1100-D02

Figure 11. Example layout for SCR1100.

5.3.2

Thermal Connection
The component includes heat sink pins to transfer the internally generated heat from the package
to outside. The thermal resistance to ambient should be low enough not to self heat the device. If
the internal junction temperature gets too high compared to ambient, that may lead to out of
specification behaviour.

Table 9. Thermal resistance.
Component
Thermal resistance ΘJA

Murata Electronics Oy
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Parameter
Total resistance from junction to ambient

Subject to changes
Doc.Nr. 82 1130 00

Min

Typ

Max
50

Units
°C/W

18/21
Rev. 2.1

SCR1100-D02

5.4

Measurement Axis and Directions
The SCR1100 angular rate measurement direction is shown below in Figure 12.

Figure 12. SCR1100 angular rate measurement direction.

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Doc.Nr. 82 1130 00

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Rev. 2.1

SCR1100-D02

5.5
5.5.1

Package Characteristics
Package Outline Drawing
The SCR1100 package outline and dimensions are presented in Figure 13 and Table 10.

Figure 13. SCR1100 package outline and dimensions.
Limits for linear measures (ISO2768-f)
Tollerance class
f (fine)

Limits in mm for nominal size in mm
Above 3 to 6
Above 6 to 30
±0.05
±0.1

0.5 to 3
±0.05

Above 30 to 120
±0.15

Table 10. SCR1100 package dimensions.
Component
Length
Width
Width
Height

Parameter
Without leads
Without leads
With leads
With leads
(including stand-off and EMC lead)

Lead pitch

Murata Electronics Oy
www.murata.com

Min

Typ
19.71
8.5
12.1
4.60
1.0

Subject to changes
Doc.Nr. 82 1130 00

Max

Units
mm
mm
mm
mm
mm

20/21
Rev. 2.1

SCR1100-D02

5.5.2

PCB Footprint
SCR1100 footprint dimensions are presented in Figure 14 and Table 11.

Figure 14. SCR1100 footprint.

Table 11. SCR1100 footprint dimensions.
Component
Footprint length
Footprint width
Footprint lead pitch
Footprint lead length
Footprint lead width

5.6

Parameter
Without lead footprints
Without lead footprints
Long side leads
Long side leads

Min

Typ
15.7
13.0
1.0
2.20
0.7

Max

Units
mm
mm
mm
mm
mm

Assembly instructions
Usage of PCB coating materials may affect component performance. The coating material and
coating process used should be validated. For additional assembly related details please refer to
“Technical Note 82” for assembly instructions.

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Rev. 2.1

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