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System 3 Manual Copyright © 2000-2011 Tucker-Davis Technologies, Inc. (TDT). All rights reserved. No part of this manual may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, for any purpose without the express written permission of TDT. Tucker-Davis Technologies 11930 Research Circle Alachua, FL 32615 USA Phone: 386.462.9622 Fax: 386.462.5365 Notices The information contained in this document is provided “as is,” and is subject to being changed, without notice. TDT shall not be liable for errors or damages in connection with the furnishing, use, or performance of this document or of any information contained herein. The latest versions of TDT documents are always online at www.tdt.com/support.htm. A CAUTION informs users when failure to take or avoid a specified action could result in damage to the product or loss of data. A WARNING calls attention to an operating procedure or practice that, if not correctly performed or adhered to, could result in personal injury or death. Do not proceed beyond a WARNING notice until the indicated conditions are fully understood and met. Licenses and Trademarks ZIF-Clip® is a registered trademark of Tucker-Davis Technologies. Updated: 11/18/2011 9:56 AM Warranty TDT System 3 hardware* carries a five-year warranty on parts and labor. Contact TDT to obtain an RMA (return merchandise authorization) number before returning any hardware. Repairs are usually completed within one week of receipt. Package the hardware carefully and label the outside of the box with the RMA number. Ship to: TDT 11930 Research Circle Alachua, FL 32615 * Custom hardware carries a one-year warranty on parts and labor. ES1 and EC1 carry a two year warranty. Table of Contents PART 1 RZ Z-SERIES PROCESSORS ........................................................1-1 RZ2 BioAmp Processor............................................................................................................................. 1-3 RZ5 BioAmp Processor........................................................................................................................... 1-14 RZ5D BioAmp Processor........................................................................................................................ 1-25 RZ6 Multi I/O Processor......................................................................................................................... 1-35 RZ-UDP RZ Communications Interface ............................................................................................... 1-49 PART 2 DATA STREAMERS........................................................................2-1 RS4 Data Streamer.................................................................................................................................... 2-3 PO8e Interface for the RZ ...................................................................................................................... 2-22 PART 3 RX PROCESSORS..........................................................................3-1 RX5 Pentusa Base Station......................................................................................................................... 3-3 RX6 Piranha Multifunction Processor .................................................................................................. 3-13 RX7 Stimulator Base Station.................................................................................................................. 3-25 RX8 Multi I/O.......................................................................................................................................... 3-35 PART 4 RP PROCESSORS..........................................................................4-1 RA16 Medusa Base Station....................................................................................................................... 4-3 RP2.1 Real-Time Processor ...................................................................................................................... 4-7 RV8 Barracuda........................................................................................................................................ 4-12 PART 5 RM MOBILE PROCESSORS ..........................................................5-1 RM Mobile Processors .............................................................................................................................. 5-3 PART 6 PREAMPLIFIERS ............................................................................6-1 PZ2 Preamplifier ....................................................................................................................................... 6-3 PZ3 Low Impedance Amplifier ................................................................................................................ 6-9 PZ-BAT External Battery Pack for PZ Amplifiers .............................................................................. 6-20 System 3 Manual ii PZ4 Digital Headstage Manifold ............................................................................................................ 6-21 Medusa Preamplifiers ............................................................................................................................. 6-25 Adjustable Gain Preamp ........................................................................................................................ 6-30 TB32 32-Channel Digitizer ..................................................................................................................... 6-34 Headstage Connection Guide ................................................................................................................. 6-38 PART 7 STIMULUS ISOLATOR ...................................................................7-1 MS4/MS16 Stimulus Isolator.................................................................................................................... 7-3 IZ2 Stimulator ......................................................................................................................................... 7-23 PART 8 VIDEO PROCESSORS....................................................................8-1 RV2 Video Processor................................................................................................................................. 8-3 RVMap Software ..................................................................................................................................... 8-18 PART 9 MICROELECTRODE ARRAY INTERFACE....................................9-1 MZ60 - MicroElectrode Array Interface................................................................................................. 9-3 HC10 - Temperature Controller ............................................................................................................ 9-10 PART 10 HIGH IMPEDANCE HEADSTAGES...........................................10-1 ZIF-Clip® Headstages ............................................................................................................................. 10-3 RA16AC - 16 Channel Acute Headstage ............................................................................................. 10-15 NN64AC - 64 Channel Acute Headstage ............................................................................................. 10-17 NN32AC - 32 Channel Acute Headstage ............................................................................................. 10-19 RA16CH/LP16CH - 16 Channel Chronic Headstage ......................................................................... 10-22 RA4AC - Four Channel Headstage...................................................................................................... 10-24 SH16 - 16 Channel Switchable Acute Headstage................................................................................ 10-26 SH16-Z - 16 Channel Switchable Acute Headstage............................................................................ 10-35 PART 11 LOW IMPEDANCE HEADSTAGES ...........................................11-1 RA4LI - Four Channel Headstage ......................................................................................................... 11-3 RA16LI - 16 Channel Headstage............................................................................................................ 11-5 System 3 Manual RZ Z-Series Processors iii RA16LI-D - 16 Channel Headstage with Differential .......................................................................... 11-7 PART 12 ADAPTERS AND CONNECTORS .............................................12-1 Probe Adapters ........................................................................................................................................ 12-3 ZIF-Clip® Headstage Adapters .............................................................................................................. 12-9 Preamplifier Adapters........................................................................................................................... 12-17 Connectors ............................................................................................................................................. 12-20 Splitters .................................................................................................................................................. 12-21 PART 13 MICROWIRE ARRAYS...............................................................13-1 ZIF-Clip® Based Microwire Arrays....................................................................................................... 13-3 Omnetics Based Microwire Arrays........................................................................................................ 13-6 Suggestions for Microwire Insertion...................................................................................................... 13-8 PART 14 ATTENUATOR ...........................................................................14-1 PA5 Programmable Attenuator ............................................................................................................. 14-3 PART 15 COMMUTATORS .......................................................................15-1 ACx Motorized Commutators................................................................................................................ 15-3 PART 16 TRANSDUCERS AND AMPLIFIERS .........................................16-1 MF1 Multi-Field Magnetic Speakers ..................................................................................................... 16-3 CF1/FF1 Magnetic Speakers .................................................................................................................. 16-7 EC1/ES1 Electrostatic Speaker ............................................................................................................ 16-11 ED1 Electrostatic Speaker Driver........................................................................................................ 16-16 FLYSYS FlashLamp System ................................................................................................................ 16-18 HB7 Headphone Buffer......................................................................................................................... 16-21 MA3: Microphone Amplifier................................................................................................................ 16-24 MS2 Monitor Speaker........................................................................................................................... 16-27 SA1 Stereo Amplifier ............................................................................................................................ 16-28 SA8 Eight Channel Power Amplifier................................................................................................... 16-30 System 3 Manual iv PART 17 SUBJECT INTERFACES ...........................................................17-1 BBOX Button Box ................................................................................................................................... 17-3 RBOX Response Box............................................................................................................................. 17-12 HTI3 Head Tracker Interface .............................................................................................................. 17-17 PART 18 SIGNAL HANDLING...................................................................18-1 PM2Relay ................................................................................................................................................. 18-3 SM5 Signal Mixer .................................................................................................................................... 18-9 PP16 Patch Panel................................................................................................................................... 18-12 PP24 Patch Panel................................................................................................................................... 18-17 ETM1 Experiment Test Module .......................................................................................................... 18-22 PART 19 PC INTERFACES .......................................................................19-1 Interface Transfer Rates......................................................................................................................... 19-3 Optibit Interface ...................................................................................................................................... 19-5 Gigabit Interface...................................................................................................................................... 19-7 UZ2 USB 2.0 Interface ............................................................................................................................ 19-9 ExpressCard to zBus Interface............................................................................................................. 19-11 PART 20 THE ZBUS AND POWER SUPPLY............................................20-1 ZB1PS Chassis - Powered zBUS Device Chassis................................................................................... 20-3 ZB1 Device Caddie and PS25F Power Supply ...................................................................................... 20-8 PART 21 SYSTEM 3 UTILITIES ................................................................21-1 zBUSmon – Bus/Interface Test Utility................................................................................................... 21-3 RPProg - Microcode Update Utility....................................................................................................... 21-5 System 3 Manual Part 1 RZ Z-Series Processors System 3 Manual 1-2 RZ Z-Series Processors ~ System 3 Manual RZ Z-Series Processors 1-3 RZ2 BioAmp Processor Overview The RZ2 BioAmp Processor has been designed for high channel count neurophysiological recording and signal processing. The RZ2 features two (RZ2-2), four (RZ2-4), or eight (RZ2-8) Sharc digital signal processors networked on a multiprocessor architecture that features efficient onboard communication and memory access. The highly optimized multi-bus architecture realizes a device with up to nearly 20 gigaflops of processing power and four dedicated data buses to eliminate data flow bottlenecks— all transparent to the user. This architecture yields an extremely powerful system capable of sophisticated real-time processing and simultaneous acquisition on all 256 channels at sampling rates up to ~25 kHz and 128 channels at sampling rates up to ~50 kHz. The RZ2 is typically used with a Z-Series Amplifier (such as the PZ2 or PZ3). High bandwidth data is streamed from the amplifier to the RZ2 over a lossless fast fiber optic connection. The RZ2 also features 16 channels of analog I/O, 24 bits of digital I/O, two Legacy optical inputs for Medusa PreAmps, and an onboard LCD for system status display. Power and Communication The RZ2's Optibit optical interface ensures fast and reliable data transfer from the RZ2 to the PC and is integrated into the device. Connectors are provided on the back panel and are color coded for correct wiring. The RZ2’s power supply is also integrated into the device and is shipped from the factory configured for the desired voltage setting (110 V or 220V). If you need to change the voltage setting, please contact TDT support at 386.462.9622 or email support@tdt.com. The RZ2 is UL compliant, see the RZ2 Operations Manual for power and safety information. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see MultiProcessor Circuit Design and Multi-Channel Circuit Design in the RPvdsEx Manual. System 3 Manual 1-4 RZ Z-Series Processors RZ2 Architecture The RZ2 processor utilizes a highly optimized multi-bus architecture and offers four dedicated, data buses for fast, efficient data handling. While the operation of the system architecture is largely transparent to the user, a general understanding is important when developing circuits in RPvdsEx. As shown in the diagram above, the RZ2 architecture consists of three functional blocks: The DSPs Each DSP in the DSP Block is connected to 64 MB SDRAM and a local interface to the four data buses: two buses that connect each DSP to the other functional blocks and two that handle data transfer between the DSPs (as described further in Distributing Data Across DSPs below). This architecture facilitates fast DSP-to-off-chip data handling. Because each DSP has its own associated memory, access is very fast and efficient. However, large and complex circuits should be designed to balance memory needs (such as data buffers and filter coefficients) System 3 Manual RZ Z-Series Processors 1-5 across processors. Memory use can be monitored on the RZ2 front panel display. When designing circuits also note that the maximum number of components for each RZ2 DSP is 768. The zBus Interface The zBus Interface provides a connection to the PC. Data and host PC control commands are transferred to and from the DSP Block through the zBus Interface Bus, allowing for large high-speed data reads and writes without interfering with other system processing. The I/O Interface The I/O Interface serves as a connection to outside signal sources or output devices. It is used primarily to input data from a PZ amplifier via the high speed optical port, but also serves the Legacy amplifier inputs and digital and analog channels. The I/O Interface Bus provides a direct connection to each DSP and the Data Pipe Bus. Distributing Data Across DSPs To reap the benefits of added power made possible by multi-DSP modules, processing tasks must be efficiently distributed across the available DSPs. That means transferring data across DSPs. The RZ2 architecture provides two data buses for this type of data handling. The Data Pipe Bus The Data Pipe Bus is optimized for handling high count multi-channel data streams and efficiently transfers up to 256 channels of data between DSPs. The Data Pipe Bus also interconnects to the I/O Interface Bus allowing direct access to data from the PZ amplifiers. In RPvdsEx data can be transferred across the Data Pipe Bus using DataPipe components. PipeSource Pipe[A]=DSP-1, Chan[1..128] Pipe[B]=DSP-1, Chan[1..128] MCPipeIn nChan=16 ChanSel=1 PipeSource and MCPipeIn components are used to select a data source (another DSP or the PZ amplifier) and feed data to a DSP circuit. MCPipeOut nChan=16 ChanSel=1 MCPipeOut feeds data off the DSP to the DataPipe Bus. The RZ2_Input_MC macro also transfers inputs from the I/O interface to the PipeBus and DSPs. System 3 Manual 1-6 RZ Z-Series Processors The zHop Bus The zHop Bus is useful for transferring single or low channel count signals, such as timing and control signals. [1:3,0] MCzHopPick ChanNo=1 zHopOut zHopIn In RPvdsEx data is transferred across the zHop Bus using paired zHop Components, including zHopIn, zHopOut, MCzHopIn, MCzHopOut, and MCzHopPick. Up to 126 pairs can be used in a single RPvdsEx circuit. The zHopBus is less efficient than the Data Pipe Bus, so it is not recommended for multi-channel signals. Bus Related Delays Standard delays are associated with the zHop and Data Pipe Bus. The zHop Bus introduces a single sample delay and the Data Pipe Bus adds a two sample delay. However, these delays are taken care of for the user in OpenEx when Timing and Data Saving macros are used. 50 kHz Sampling Rate Acquisition with the PZ Amplifier The RZ2 and PZ amplifier support sample rates from ~6 kHz to ~50 kHz. When sampling at a rate of ~50 kHz, there are several important considerations: Only the first 128 PZ amplifier channels will be available. All DataPipes will have a max of 128 channels instead of 256. Both halves (A and B) of the PipeSource component must be selecting the desired source. For example, when acquiring data from a PZ amplifier, Pipe[A] and Pipe[B] both need to be set to Amp. Chan[1..128]. Data Transfer Rate As with other devices, your expected sustained RZ-to-Host PC data rate should not exceed 1/2 to 2/3 of the rated data transfer speed. For the RZ2 device this is 160 Mbits/second (Mbps) so your designs should have a sustained data rate of no more than ~100 Mbps. When the RZ2 is processing, the current data transfer rate (Mbps) is displayed in the top right corner of the LCD Screen. This maximum rate may be further limited by your PC’s ability to store the data to disk. This equates to streaming a maximum of 160 channels at a sampling rate of ~25 kHz or 90 channels at a sampling rate of ~50 kHz. See Calculating Data Transfer Rates in the OpenEx Manual for more information. RZ2 Features LCD Screen The LCD screen shows information about each DSP, the optical PC interface, the PZ preamplifier and system I/O. A selection knob allows the user to highlight a section of the screen to display more detailed information. Rotate the selection knob to select a system component. Once the selection has been made, push the knob and expand the information view. System 3 Manual Interface I/O Amplifier Status DSP Information RZ Z-Series Processors 1-7 Selection Available Information DSPs Component usage, memory usage and pipe source statistics for that processor A stacked histogram shows cycle usage for each DSP with the bottom section (blue) showing the cycle usage taken up by circuit operation and the top section (pink) showing the cycle usage required for data transfer If the cycle usage surpasses 100%, a bar is drawn above the 100% line in the cycle use histogram and will persist until the RZ2 is rebooted Interface Firmware version, MB data received/sent and transfer errors Amp Amp model, number of channels and firmware version of connected PZ series amplifier I/O Virtual indicator lights [A], [B], and [C]: Digital I/O LED will light for an input bit or it will show the logic level for an output bit [D] and [E]: Analog I/O 16 lights will indicate the signal level, green when a signal is present and red to warn that the signal is approaching the maximum voltage (at which point clipping would occur) Legacy Optical: Amp Light For The Legacy Preamplifier Sync Flash when no amp is connected and will be light light blue when the amplifier is correctly connected Amplifier and Onboard Analog I/O The RZ2 is equipped with both optical port amplifier input and onboard analog I/O capabilities. The high speed fiber optic ports (located on the RZ2 back panel) and Legacy fiber optic ports (shown left) allow a direct connection to Z-Series or Medusa Preamplifiers. Physiological signals are digitized on the preamplifier and transferred across noiseless fiber optics. The RZ2 also includes onboard D/A for stimulus generation and experiment control, and A/D for input of signals from a variety of other analog sources. System 3 Manual 1-8 RZ Z-Series Processors The RZ2_Input_MC macro provides a universal solution for analog input via the RZ2, automatically selecting the correct components, applying any scale factors or channel offsets, and performing data type conversion needed based on information the user provides about the input source. The table below provides a quick overview of these I/O features and how they must be accessed during circuit design. When the RZ2_Input_MC macro is not used, reference the table and be sure to use the appropriate component, channel offset, scale factor and so forth. Further detail can be found below the table. Also, see the RPvdsEx Manual for more information. Analog I/O Description Components Channels Notes Port D Analog Input AdcIn 1-8 Standard Configuration (may vary) Accessed through Port D BNCs or Analog I/O labeled DB25 Port E Analog Output DacOut 9-16 Standard Configuration (may vary) Accessed through Port E BNCs or Analog I/O labeled DB25 High Speed Fiber Optic Port Z-Series BioAmp Input MCPipeIn 1-256 When the RZ2_Input_MC is NOT USED, use MCInt2Float or Int2Float with a scale factor of 1e-9 (located on RZ back panel) recommended MCAdcIn 1-256 No scale required. PipeIn Legacy Amp-A Medusa PreAmp Input AdcIn 17-32 When the RZ2_Input_MC is NOT USED, apply a scale factor of .000833 Legacy Amp-B Medusa PreAmp Input AdcIn 33-48 When the RZ2_Input_MC is NOT USED, apply a scale factor of .000833 Onboard Analog I/O The RZ2 is equipped with eight channels of 16-bit PCM D/A and eight channels of 16-bit PCM A/D. All 16 channels can be accessed via front panel BNCs marked Port D and Port E or via a 25pin analog I/O connector. See RZ2 Technical Specifications, page 1-11, for the DB25 pinout. PZ Amplifier Fiber Optic Port The RZ2's primary amplifier input, a high-speed fiber optic port is located on the back panel. The connectors on the fiber optic pair used for PZ amplifier communication are color coded for correct wiring. When designing circuits in RPvdsEx, the PZ Amplifier input channels are accessed using the Pipe components. When the DataPipe is used to feed signals from the Amplifier a MCInt2Float or Int2Float must be used with a scale factor of 1e-9. The Amplifier inputs can also be accessed using the RPvdsEx MCAdcIn component starting at channel 1; however, this access method is less efficient and not recommended for high channel count applications. Unlike the System 3 Manual RZ Z-Series Processors 1-9 Legacy Port, this high speed port can input up to 256 channels at a maximum sampling rate of 25 kHz or 128 channels at a maximum sampling rate of 50 kHz. Legacy Fiber Optic Ports The base station can also acquire digitized signals from the Medusa preamplifier, RA8GA, or other legacy enabled device over a fiber optic cable using the Legacy ports. Two Legacy fiber optic ports labeled -A- and -B- are provided to support simultaneous acquisition from up to two Medusa preamplifiers. Each port can input up to 16 channels at a maximum sampling rate of 25 kHz. The Legacy fiber optic ports can be used with any of the Medusa preamplifiers including, the RA16PA and the RA4PA, or the RA8GA. The channel numbers for each port begin at a fixed offset regardless of the number of channels available on the connected device. Digital I/O The digital I/O ports include 24 bits of programmable I/O. The digital I/O is divided into three ports (A, B, and C) as described in the chart below. All digital I/O lines are accessed via the 25-pin connector on the front of the RZ2 and ports A and C are available through BNC connectors on the front panel. See RZ2 Technical Specifications, page 1-11, for the DB25 pinout and BNC channel mapping. See the Digital I/O Circuit Design section of the RPvdsEx Manual for more information on programming the digital I/O. Digital I/O Description DB25 BNCs Notes Port A bits 0 - 7 Yes Yes byte addressable Port B bits 0 - 7 Yes No byte addressable Port C bits 0 - 7 Yes Yes bit addressable Configuration Note: For more information on addressing and Digital I/O see the RPvdsEx Manual. The data direction for the Digital I/O is configured using the RZ2_Control macro in RPvdsEx. Double-click the macro to access the settings on the Digital I/O tab. The RZ2_Control macro also offers a Direction Control Mode parameter that enables the macro inputs and allows the user to control data direction dynamically. For more information on using the RZ2_Control macro see the help provided in the macro's properties dialog box. The RZ digital I/O ports have different voltage outputs and logic thresholds depending on the type. Below is a table depicting the different voltage outputs and thresholds for both types. System 3 Manual 1-10 RZ Z-Series Processors Digital I/O Type Voltage Output Voltage Input logic high logic low logic high logic low byte addressable 5V 0V ≥ 2.5 V 0 - 2.45 V bit addressable 3.3 V 0V ≥ 1.5 V 0 - 1.4 V UDP Ethernet Interface (Optional) The RZ UDP Ethernet interface is designed to transfer data to or from a PC. RZ devices equipped with a UDP interface contain an additional port located on the back panel. See UDP User Interface, page 1-49, for more information. Specialized DSP/Optical Interface Boards (Optional) The RZ Standard DSP Boards can be replaced with specialized DSP Boards which include an optical interface for communication and control of RZ compatible devices, such as the IZ2 Stimulator and RS2 Data Streamer. RZ devices equipped with one or more specialized DSP boards include an optical port for each card. The ports are located on the back panel and labeled for easy identification. RZDSP-I This board supports the IZ2 Stimulator, allowing the RZ device to function as a controller or base station. See the IZ2 Stimulator section, page 7-23, for more information on using and designing circuits for the stimulator. RZDSP-S This board supports the RS2 Data Streamer, allowing the RZ device to stream data directly to the RS2’s storage arrays. See the RS2 Data Streamer section, page 2-1, for more information on using and designing circuits for the streamer. RZDSP-U This board supports the PO8e interface card, allowing the RZ device to stream data directly to storage arrays on a PC or other device. See the PO8e documentation for more information. RZDSP-P This board supports PZ amplifier input, providing an alternate method for acquiring data from a PZ amplifier. It can be used to expand the number of channels that can be acquired on any RZ processor. Access to this input can be enabled in the PZ control macro. RZDSP-V This board supports the RV2 Video Tracking System, allowing the RZ device to function as a controller or base station. See the RV2 Video Processor section, page 8-1, for more information on using and designing circuits for the RV2. System 3 Manual RZ Z-Series Processors 1-11 Technical Specifications Specifications for the RZ2 Z-Series Base Station. Note: Technical Specifications for amplifier A/D converters are found under the preamplifier's technical specifications. DSP 400 MHz DSPs, 2.4 GFLOPS peak per DSP Two, Four, or Eight Memory 64 MB SDRAM per DSP D/A 8 channels, 16-bit PCM Sample Rate Up to 48828.125 Hz Frequency Response DC-Nyquist (~1/2 sample rate) Voltage Out +/- 10.0 Volts S/N (typical) 82 dB (20 Hz - 20 kHz at 9.9 V) A/D 8 channels, 16-bit PCM Sample Rate Up to 48828.125 Hz Frequency Response DC - 7.5 kHz (3 dB corner, 2nd order, 12 dB per octave) Voltage In +/- 10.0 Volts S/N (typical) 82 dB (20 Hz - 20 kHz at 9.9 V) Fiber Optic Ports Z-Series One 256-channel input* Legacy (Medusa) Two 16-channel inputs Digital I/O 24 bits programmable * The maximum sample rate is 48828.125 Hz when recording up to 128 channels or 24414.0625 Hz when recording 129 - 256 channels). BNC Channel Mapping Please note channel numbering begins at the top right block of BNCs for each port and is printed on the face of the device to minimize miswiring. The figure below represents the standard configuration and may vary depending on customer request. System 3 Manual 1-12 RZ Z-Series Processors DB25 Analog I/O Pinout Pin Name 1 NA Description Pin Name Description Not Used 14 2 15 3 16 4 17 NA Not Used 5 AGND Analog Ground 18 A1 ADC 6 A2 ADC 19 A3 7 A4 Analog Input Channels (Port D) Analog Input Channels (Port D) 20 A5 8 A6 21 A7 9 A8 22 A9 DAC 23 A11 Analog Output Channels (Port E) 24 A13 25 A15 10 A10 DAC 11 A12 12 A14 13 A16 System 3 Manual Analog Output Channels (Port E) RZ Z-Series Processors 1-13 DB25 Digital I/O Pinout Pin Name Description Pin Name Description 1 C0 Port C 14 C1 Port C 2 C2 Bit Addressable digital I/O 15 C3 Bit Addressable digital I/O 3 C4 Bits 0, 2, 4, and 6 16 C5 Bits 1, 3, 5, and 7 4 C6 17 C7 5 GND Digital I/O Ground 18 A0 Port A 6 A1 Port A 19 A2 7 A3 Word addressable digital I/O Word addressable digital I/O 20 A4 Bits 0, 2, 4, and 6 8 A5 Bits 1, 3, 5, and 7 21 A6 9 A7 22 B0 Port B 10 B1 23 B2 Word addressable digital I/O 24 B4 Bits 0, 2, 4, and 6 25 B6 11 B3 12 B5 Port B Word addressable digital I/O Bits 1, 3, 5, and 7 13 B7 System 3 Manual 1-14 RZ Z-Series Processors RZ5 BioAmp Processor Overview The RZ5 BioAmp Processor is available with either one or two 400 MHz Sharc digital signal processors networked on a multiprocessor architecture that features efficient onboard communication and memory access. The optimized multi-DSP architecture provides nearly five gigaflops of processing power, making the RZ5 a versatile solution for real-time processing and simultaneous acquisition. The RZ5 acquires and processes up to 32 channels of neurophysiological signals in real-time. Data can be input from two Medusa preamplifiers at a sampling rate of ~25 kHz. The RZ5 also supports microstimulation applications. The RZ5 can be used with one of TDT's stimulus isolators (MS16 or MS4) and switching headstage (SH16) to comprise a complete microstimulation system. For more information see MS4/MS16 Stimulus Isolator, page 7-3. The RZ5 also features eight channels of analog I/O, 24 bits of digital I/O and an onboard monitor speaker with volume control. Power and Communication The RZ5's Optibit optical interface ensures fast and reliable data transfer from the RZ5 to the PC and is integrated into the device. Connectors are provided on the back panel and are color coded for correct wiring. The RZ5’s power supply is also integrated into the device and is shipped from the factory configured for the desired voltage setting (110 V or 220V). If you need to change the voltage setting, please contact TDT support at 386.462.9622 or email support@tdt.com. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see MultiProcessor Circuit Design and Multi-Channel Circuit Design in the RPvdsEx Manual. System 3 Manual RZ Z-Series Processors 1-15 RZ5 Architecture The RZ5 processor utilizes a multi-bus architecture and offers three dedicated, data buses for fast, efficient data handling. While the operation of the system architecture is largely transparent to the user, a general understanding is important when developing circuits in RPvdsEx. As shown in the diagram above, the RZ5 architecture consists of three functional blocks: The DSPs Each DSP in the DSP Block is connected to 64 MB SDRAM and a local interface to the three data buses: two buses that connect each DSP to the other functional blocks and one that handles data transfer between the DSPs (as described further in Distributing Data Across DSPs below). This architecture facilitates fast DSP-to-off-chip data handling. Because each DSP has its own associated memory, access is very fast and efficient. However, large and complex circuits should be designed to balance memory needs (such as data buffers and filter coefficients) across processors. When designing circuits also note that the maximum number of components for each RZ5 DSP is 768. The zBus Interface The zBus Interface provides a connection to the PC. Data and host PC control commands are transferred to and from the DSP Block through the zBus Interface Bus, allowing for large high-speed data reads and writes without interfering with other system processing. The I/O Interface The I/O Interface serves as a connection to outside signal sources or output devices. It is used to input data from the preamplifier inputs and digital and analog channels. The I/O Interface Bus provides a direct connection to each DSP. System 3 Manual 1-16 RZ Z-Series Processors Distributing Data Across DSPs To reap the benefits of added power made possible by multi-DSP modules, processing tasks must be efficiently distributed across the available DSPs. That means transferring data across DSPs. The RZ5 architecture provides the zHop Bus for this type of data handling. The zHop Bus The zHop Bus allows the transfer of single or multi-channel signals between each DSP in the RZ5. [1:3,0] MCzHopPick ChanNo=1 zHopOut MCzHopOut nChan=16 zHopIn MCzHopIn nChan=16 ChanSel=1 In RPvdsEx data is transferred across the zHop Bus using paired zHop Components, including zHopIn, zHopOut, MCzHopIn, MCzHopOut, and MCzHopPick. Up to 126 pairs can be used in a single RPvdsEx circuit. Bus Related Delays The zHop Bus introduces a single sample delay. However, this delay is taken care of for the user in OpenEx when Timing and Data Saving macros are used. RZ5 Features DSP Status Displays The RZ5 include status lights and a VFD (Vacuum Fluorescent Display) screen to report the status of the individual processors. Status Lights Processors 1 2 Two LEDs report the status of the multiprocessor's individual DSPs and will be lit solid green when the corresponding DSP is installed and running. The corresponding LED will be lit dim green if the cycle usage on a DSP is 0%. If the demands on a DSP exceed 99% of its capacity on any given cycle, the corresponding LED will flash red (~1 time per second). System 3 Manual RZ Z-Series Processors 1-17 Front Panel VFD Screen The front panel VFD screen reports detailed information about the status of the system. The display includes two lines. The top line reports the system mode, Run!, Idle, or Reset, and displays heading labels for the second line. The second line reports the user’s choice of status indicators for each DSP followed by an aggregate value. The user can cycle through the various status indicators using the Mode button to the bottom right of the display. Push and release the button to change the display or push and hold the button for one second then release to automatically cycle through each of the display options. The VFD screen may also report system status such as booting status (Reset). Note: When burning new microcode or if the firmware on the RZ5 is blank, the VFD screen will report a cycle usage of 99% and the processor status lights will flash red. Status Indicators Cyc: cycle usage Bus%: percentage of internal device's bus capacity used I/O%: percentage of data transfer capacity used Opt: Connection (sync) status of amplifiers A and B Important Note!: The status lights flash when a DSP goes over the cycle usage limit, even if only for a particular cycle. This helps identify periodic overages caused by components in time slices. Amplifier and Onboard Analog I/O The RZ5 is equipped with both amplifier input and onboard analog I/O capabilities. The fiber optic ports allow a direct connection to Medusa Preamplifiers. Physiological signals are digitized on the preamplifier and transferred across noiseless fiber optics. The RZ5_AmpIn_MC and RZ5_AmpIn macros automatically apply the necessary scale factors and channel offsets for configuring the preamplifier fiber optic ports. The following table provides a quick overview of the amplifier and analog I/O features and how they must be accessed during circuit design. When the RZ5_AmpIn_MC and RZ5_AmpIn macros are not used, reference the table and be sure to use the appropriate component, channel offset, scale factor and so forth. Also, see the RPvdsEx Manual for more information on circuit design. System 3 Manual 1-18 RZ Z-Series Processors Analog I/O Description Components Channels Notes ADC Analog Input AdcIn 1-4 Accessed through ADC Input BNCs or Analog I/O labeled DB25 Analog Output DacOut 9 - 12 Accessed through DAC Output BNCs or Analog I/O labeled DB25 Optical Amp-A Medusa PreAmp Input AdcIn 17 - 32 When the RZ5_AmpIn_MC or RZ5_AmpIn is NOT USED, apply a scale factor of .000833 Optical Amp-B Medusa PreAmp Input AdcIn 33 - 48 When the RZ5_AmpIn_MC or RZ5_AmpIn is NOT USED, apply a scale factor of .000833 Inputs DAC Outputs Onboard Analog I/O The RZ5 is equipped with four channels of 16-bit PCM D/A and four channels of 16-bit PCM A/D. All 8 channels can be accessed via front panel BNCs marked ADC and DAC or via a 25-pin analog I/O connector. See RZ5 Technical Specifications, page 1-11 for the DB25 pinout. Fiber Optic Preamplifier Ports The RZ5 acquires digitized signals from a Medusa preamplifier over a fiber optic cable. This provides loss-less signal acquisition between the amplifier(s) and the base station. Two fiber optic ports are provided to support simultaneous acquisition from up to two preamplifiers. Each port can input up to 16 channels at a maximum sampling rate of ~25 kHz. The fiber optic ports can be used with any of the Medusa preamplifiers including the RA16PA, RA4PA, or RA8GA. The channel numbers for each port begin at a fixed offset regardless of the number of channels available on the connected device. Channels are numbered as follows: Amp-A 17 – 32 Amp-B 33 – 48 Note: When using the RZ5_AmpIn_MC and RZ5_AmpIn macros, the necessary scale factors and channel offsets for configuring the fiber optic ports are automatically applied. Fiber Oversampling (acquisition only) The fiber optic cable that carries the signals to the fiber optic input ports on the RZ5 has a transfer rate limitation of 6.25 Mbits/s. With 16 channels of data and 16 bits per sample, this limitation translates to a maximum sampling rate of ~25 kHz. However, the need may arise to run a circuit at a higher sampling rate while still acquiring data via a fiber optic port. The two fiber optic ports on the RZ5 can oversample the digitized signals that have already been sampled up to 2X or ~50 kHz. This will allow the RZ5 to run a DSP chain at ~50 kHz and still sample data acquired through an optically connected preamplifier that digitized the incoming data stream at its maximum rate of ~25 kHz. Oversampling is performed on the base station. The signals being acquired will still be sampled at ~25 kHz on the preamplifier. This means that, even with oversampling, signals acquired by an System 3 Manual RZ Z-Series Processors 1-19 optically connected preamplifier are still governed by the bandwidth and frequency response of the preamplifier. Fiber Optic Output (Stimulator) Port The output port, labeled Stimulator, can be used to transfer microstimulation waveforms to the Stimulus Isolator and/or to control its digital output. Important Note: This fiber optic port is disabled if the sampling rate of the system is set to a value greater than ~25 kHz. Monitor Speaker The RZ5 is equipped with an onboard speaker. To use the speaker feed the desired signal to output channel 9 using a DacOut component. The speaker is provided primarily for audio monitoring of a single channel of electrophysiological potentials during recording. Digital I/O 24 bits of programmable digital I/O is divided into three bytes (A, B, and C) as described in the chart below. All digital I/O lines are accessed via the 25-pin connector on the front of the RZ5 and bits 0 - 3 of byte C are available through BNC connectors on the front panel labeled Digital. See RZ5 Technical Specifications, page 1-11, for the DB25 pinout and BNC channel mapping. See the Digital I/O Circuit Design section of the RPvdsEx Manual for more information on programming the digital I/O. Digital I/O Description DB25 BNCs Notes Byte A bits 0 - 7 Yes No byte addressable Byte B bits 0 - 7 Yes No byte addressable Byte C bits 0 – 7 Yes Yes* bit addressable *Note: Byte C Bits 0 - 3 are available via front panel BNCs Configuration Note: For more information on addressing and Digital I/O see the RPvdsEx Manual. The data direction for the digital I/O is configured using the RZ5_Control macro in RPvdsEx. Double-click the macro to access the settings on the Digital I/O tab. The RZ5_Control macro also offers a Direction Control Mode parameter that enables the macro inputs and allows the user to control data direction dynamically. For more information on using the RZ5_Control macro see the help provided in the macro's properties dialog box. System 3 Manual 1-20 RZ Z-Series Processors Note: By default, all digital I/O are configured as inputs. The RZ digital I/O ports have different voltage outputs and logic thresholds depending on the type. Below is a table depicting the different voltage outputs and thresholds for both types. Digital I/O Type Voltage Output Voltage Input logic high logic low logic high logic low byte addressable 5V 0V ≥ 2.5 V 0 - 2.45 V bit addressable 3.3 V 0V ≥ 1.5 V 0 - 1.4 V LED Indicators The RZ5 contains 16 LED indicators for the analog and digital I/O. These indicators are located directly below the VFD and DSP status LEDs and display information relative to the various analog and digital I/O contained on the RZ5. The following tables illustrate the possible display options and their associated descriptions. Digital I/O - Byte C 8-bit, bit addressable byte C LED indicators are located to the bottom left of the RZ5 front panel. Light Pattern Description Dim Green Bit is configured for output and is currently a logical low (0) Solid Green Bit is configured for output and is currently a logical high (1) Dim Red Bit is configured for input and is currently a logical low (0) Solid Red Bit is configured for input and is currently a logical high (1) Analog I/O - ADC Inputs and DAC Outputs ADC and DAC LED indicators are labeled and located to the right of the byte C LED indicators. Light Pattern Description Off Analog I/O channel signal voltage is less than +/-100 mV Dim Green Analog I/O channel signal voltage is less than +/-5 V Solid Green Analog I/O channel signal voltage is between +/-5 V to +/-9 V Solid Red Analog I/O channel clip warning (voltage greater than +/-9 V) UDP Ethernet Interface (Optional) The RZ UDP Ethernet interface is designed to transfer data to or from a PC. RZ devices equipped with a UDP interface contain an additional port located on the back panel. See UDP User Interface, page 1-49, for more information. System 3 Manual RZ Z-Series Processors 1-21 Specialized DSP/Optical Interface Boards (Optional) The RZ Standard DSP Boards can be replaced with specialized DSP Boards which include an optical interface for communication and control of RZ compatible devices, such as the IZ2 Stimulator and RV2 Video Processor. RZ devices equipped with one or more specialized DSP boards include an optical port for each card. The ports are located on the back panel and labeled for easy identification. RZDSP-I This board supports the IZ2 Stimulator, allowing the RZ device to function as a controller or base station. See the IZ2 Stimulator section, page 7-23, for more information on using and designing circuits for the stimulator. RZDSP-P This board supports PZ amplifier input, providing an alternate method for acquiring data from a PZ amplifier. It can be used to expand the number of channels that can be acquired on any RZ processor. Access to this input can be enabled in the PZ control macro. RZDSP-V This board supports the RV2 Video Tracking System, allowing the RZ device to function as a controller or base station. See the RV2 Video Processor section, page 8-1, for more information on using and designing circuits for the RV2. System 3 Manual 1-22 RZ Z-Series Processors Technical Specifications Specifications for the RZ5 BioAmp Processor. Note: Technical Specifications for amplifier A/D converters are found under the preamplifier's technical specifications. 400 MHz DSPs, 2.4 GFLOPS peak per DSP DSP One or Two Memory 64 MB SDRAM per DSP D/A 4 channels, 16-bit PCM Sample Rate Up to 48828.125 Hz* Frequency Response DC-Nyquist (~1/2 sample rate) Voltage Out +/- 10.0 Volts S/N (typical) 82 dB (20 Hz - 20 kHz at 9.9 V) A/D 4 channels, 16-bit PCM Sample Rate Up to 48828.125 Hz * Frequency Response DC - 7.5 kHz (3 dB corner, 2nd order, 12 dB per octave) Voltage In +/- 10.0 Volts S/N (typical) 82 dB (20 Hz - 20 kHz at 9.9 V) Fiber Optic Ports Stimulator (MS16) One output for MS16 Stimulus Isolator* Preamplifier (Medusa) Two 16-channel inputs Digital I/O 24 bits programmable Note: When used with the Stimulus Isolator, the sampling rate is limited to 24.414 kHz. System 3 Manual RZ Z-Series Processors 1-23 BNC Channel Mapping Please note channel numbering begins at the top left block of BNCs for both analog and digital I/O and is printed on the face of the device to minimize miswiring. Maps to Ch 1-4 on Analog I/O DB25 Maps to Ch 9-12 on Analog I/O DB25 Maps to Port C Bits 0-3 on Digital I/O DB25 DB25 Analog I/O Pinout Pin Name 1 NA Description Pin Name Description Not Used 14 2 15 3 16 4 17 NA Not Used ADC Analog Input Channels (ADC Inputs) 5 AGND Analog Ground 18 A1 6 A2 19 A3 7 A4 ADC Analog Input Channels (ADC Inputs) 20 NA Not Used 8 NA Not Used 21 22 A9 DAC Analog Output DAC Analog Output Channels (DAC Outputs) 23 A11 24 NA Not Used 25 9 10 A10 11 A12 12 NA Channels (DAC Outputs) Not Used 13 System 3 Manual 1-24 RZ Z-Series Processors DB25 Digital I/O Pinout Pin Name Description Pin Name Description 1 C0 Byte C 14 C1 Byte C 2 C2 Bit Addressable digital I/O 15 C3 Bit Addressable digital I/O 3 C4 Bits 0, 2, 4, and 6 16 C5 Bits 1, 3, 5, and 7 4 C6 17 C7 5 GND Digital I/O Ground 18 A0 Byte A 6 A1 Byte A 19 A2 7 A3 Word addressable digital I/O Word addressable digital I/O 20 A4 Bits 0, 2, 4, and 6 8 A5 Bits 1, 3, 5, and 7 21 A6 9 A7 22 B0 Byte B 10 B1 23 B2 Word addressable digital I/O 24 B4 Bits 0, 2, 4, and 6 25 B6 11 B3 12 B5 13 B7 System 3 Manual Byte B Word addressable digital I/O Bits 1, 3, 5, and 7 RZ Z-Series Processors 1-25 RZ5D BioAmp Processor Overview The RZ5D BioAmp Processor is available with either three or four 400 MHz Sharc digital signal processors networked on a multiprocessor architecture that features efficient onboard communication and memory access. The RZ5D is a versatile solution for real-time processing and simultaneous acquisition and stimulation. The RZ5D acquires and processes up to 32 channels of neurophysiological signals in real-time. Data can be input from a PZ amplifier or digital headstage manifold at a sampling rate of up to ~50 kHz. The RZ5D also supports microstimulation applications. The RZ5D can be used with TDT’s IZ2 stimulus isolator for up to 128 channels of stimulation and switching headstages (SH16-Z) to comprise a complete microstimulation system. For more information see IZ2 Stimulator, page 7-23. The RZ5D also features eight channels of analog I/O, 24 bits of digital I/O and an onboard monitor speaker with volume control. Power and Communication The RZ5D's integrated Optibit optical interface ensures fast and reliable data transfer from the RZ5D to the PC. Connectors are provided on the back panel and are color coded for correct wiring. The RZ5D’s integrated power supply is shipped from the factory configured for the desired voltage setting (110 V or 220V). If you need to change the voltage setting, please contact TDT support at 386.462.9622 or email support@tdt.com. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see the RPvdsEx Manual. System 3 Manual 1-26 RZ Z-Series Processors RZ5D Architecture The RZ5D processor utilizes a multi-bus architecture and offers three dedicated, data buses for fast, efficient data handling. While the operation of the system architecture is largely transparent to the user, a general understanding is important when developing circuits in RPvdsEx. As shown in the diagram above, the RZ5D architecture consists of three functional blocks: The DSPs Each DSP in the DSP Block is connected to 64 MB SDRAM and a local interface to the three data buses: two buses that connect each DSP to the other functional blocks and one that handles data transfer between the DSPs (as described further in Distributing Data Across DSPs below). This architecture facilitates fast DSP-to-off-chip data handling. Because each DSP has its own associated memory, access is very fast and efficient. However, large and complex circuits should be designed to balance memory needs (such as data buffers and filter coefficients) across processors. When designing circuits also note that the maximum number of components for each RZ5D DSP is 768. DSP-2 and DSP-3 are special optical DSPs. These DSPs have a direct fiber optic connection to the IZ and PZ interface port, respectively. The zBus Interface The zBus Interface provides a connection to the PC. Data and host PC control commands are transferred to and from the DSP Block through the zBus Interface Bus, allowing for large high-speed data reads and writes without interfering with other system processing. The I/O Interface The I/O Interface serves as a connection to outside signal sources or output devices. It is used to input data from the digital and analog System 3 Manual RZ Z-Series Processors 1-27 channels. The I/O Interface Bus provides a direct connection to each DSP. Distributing Data Across DSPs To reap the benefits of added power made possible by multi-DSP modules, processing tasks must be efficiently distributed across the available DSPs. That means transferring data across DSPs. The RZ5D architecture provides the zHop Bus for this type of data handling. The zHop Bus The zHop Bus allows the transfer of single or multi-channel signals between each DSP in the RZ5D. [1:3,0] MCzHopPick ChanNo=1 zHopOut MCzHopOut nChan=16 zHopIn MCzHopIn nChan=16 ChanSel=1 In RPvdsEx data is transferred across the zHop Bus using paired zHop Components, including zHopIn, zHopOut, MCzHopIn, MCzHopOut, and MCzHopPick. Up to 126 pairs can be used in a single RPvdsEx circuit. Bus Related Delays The zHop Bus introduces a single sample delay. However, this delay is taken care of for the user in OpenEx when Timing and Data Saving macros are used. RZ5D Features DSP Status Displays The RZ5D include status lights and a VFD (Vacuum Fluorescent Display) screen to report the status of the individual processors. Status Lights Two LEDs report the status of the multiprocessor's individual DSPs and will be lit solid green when the corresponding DSP is installed and running. The corresponding LED will be lit dim green if the cycle usage on a DSP is 0%. If the demands on a DSP exceed 99% of its capacity on any given cycle, the corresponding LED will flash red (~1 time per second). System 3 Manual 1-28 RZ Z-Series Processors Front Panel VFD Screen The front panel VFD screen reports detailed information about the status of the system. The display includes two lines. The top line reports the system mode (Run!, Idle, or Reset) and displays heading labels for each processor. The bottom line reports the current status indicator for each DSP followed by an aggregate value. The user can cycle through the various status indicators using the Mode button to the bottom right of the display. Push and release the button to change the display or push and hold the button for one second then release to continuously cycle through each of the display options. The VFD screen may also report booting status (Reset). Note: When burning new microcode or if the firmware on the RZ5D is blank, the VFD screen will report a cycle usage of 99% and the processor status lights will flash red. Status Indicators Cyc: cycle usage Bus%: percentage of internal device's bus capacity used I/O%: percentage of data transfer capacity used Important Note!: The status lights flash when a DSP goes over the cycle usage limit, even if only for a particular cycle. This helps identify periodic overages caused by components in time slices. PZ Preamplifier Port The RZ5D acquires digitized signals from a PZ preamplifier over a fiber optic cable through the port labeled ‘PZ’ on the front panel. This port can input up to 32 channels at a maximum sampling rate of ~50 kHz. The PZ port can be used with any of the PZ preamplifiers including the PZ2 and PZ3 or the PZ4 digital headstage manifold. The PZn_Control macro is used to access neurophysiological data in the processing chain. Important!: The PZn_Control macro must be placed on DSP-3 in the RPvdsEx circuit and must have the Direct Input option enabled. See the internal macro help for more details. IZ Stimulator Port The output port labeled IZ can be used to transfer microstimulation waveforms to the IZ2 Stimulator and/or to control an attached SH16-Z switching headstage. This port can output up to System 3 Manual RZ Z-Series Processors 1-29 128 channels of stimulator at a maximum sampling rate of ~50 kHz. The IZ2_Control macro is used to send stimulation waveforms, control an optional SH16-Z and receive monitor information from the IZ2. Important!: The IZ2_Control macro must be placed on DSP-2 in the RPvdsEx circuit. See the internal macro help for more details. Onboard Analog I/O The RZ5D is equipped with four channels of 16-bit PCM D/A and four channels of 16-bit PCM A/D. All 8 channels can be accessed via front panel BNCs marked ADC and DAC or via a 25-pin analog I/O connector. See RZ5D Technical Specifications on page 1-33 for the DB25 pinout. The following table provides a quick overview of the analog I/O features and how they must be accessed during circuit design. See the RPvdsEx Manual for more information on circuit design. Analog I/O Description Components Channels Notes ADC Analog Input AdcIn 1-4 Accessed through ADC Input BNCs or Analog I/O labeled DB25 Analog Output DacOut 9 - 12 Accessed through DAC Output BNCs or Analog I/O labeled DB25 Inputs DAC Outputs Monitor Speaker The RZ5D is equipped with an onboard speaker. To use the speaker, feed the desired signal to output channel 9 using a DacOut component. The speaker is provided primarily for audio monitoring of a single channel of electrophysiological potentials during recording. Digital I/O The digital I/O includes 24 bits of programmable I/O. The digital I/O is divided into three bytes (A, B, and C) as described in the chart below. All digital I/O lines are accessed via the 25-pin connector on the front of the RZ5D and bits 0 - 3 of byte C are available through BNC connectors on the front panel labeled Digital. See RZ5D Technical Specifications, page 1-33, for the DB25 pinout and BNC channel mapping. See the Digital I/O Circuit Design section of the RPvdsEx Manual for more information on programming the digital I/O. System 3 Manual 1-30 RZ Z-Series Processors Digital I/O Description DB25 BNCs Notes Byte A bits 0 - 7 Yes No byte addressable Byte B bits 0 - 7 Yes No byte addressable Byte C bits 0 – 7 Yes Yes* bit addressable *Note: Byte C Bits 0 - 3 are available via front panel BNCs By default, all digital I/O are configured as inputs. The data direction for the digital I/O is configured using the RZ5_Control macro in RPvdsEx. Double-click the macro to access the settings on the Digital I/O tab. The RZ5_Control macro also offers a Direction Control Mode parameter that enables the macro inputs and allows the user to control data direction dynamically. For more information on using the RZ5_Control macro see the help provided in the macro's properties dialog box. The RZ5D digital I/O ports have different voltage outputs and logic thresholds depending on the type of I/O. The table below specifies the different voltage outputs and thresholds for both types. Digital I/O Type Voltage Output Voltage Input logic high logic low logic high logic low byte addressable 5V 0V ≥ 2.5 V 0 - 2.45 V bit addressable 3.3 V 0V ≥ 1.5 V 0 - 1.4 V LED Indicators The RZ5D has 16 LED indicators for the analog and digital I/O. These indicators are located directly below the VFD and DSP status LEDs. They display information about the state of the analog and digital I/O. The following tables illustrate the possible display options and their associated descriptions. System 3 Manual RZ Z-Series Processors 1-31 Digital I/O These LEDs indicate the state of the 8 bit-addressable I/O of byte C. Light Pattern Description Dim Green Bit is configured for output and is currently a logical low (0) Solid Green Bit is configured for output and is currently a logical high (1) Dim Red Bit is configured for input and is currently a logical low (0) Solid Red Bit is configured for input and is currently a logical high (1) Analog I/O These LEDs indicate the state of the four ADC and four DAC channels. Light Pattern Description Off Analog I/O channel signal voltage is less than +/-100 mV Dim Green Analog I/O channel signal voltage is less than +/-5 V Solid Green Analog I/O channel signal voltage is between +/-5 V to +/-9 V Solid Red Analog I/O channel clip warning (voltage greater than +/-9 V) UDP Ethernet Interface (Optional) The RZ UDP Ethernet interface is designed to transfer data to or from a PC. RZ devices equipped with a UDP interface contain an additional port located on the back panel. See UDP User Interface, page 1-49, for more information. System 3 Manual 1-32 RZ Z-Series Processors Technical Specifications Specifications for the RZ5D BioAmp Processor. Note: Technical Specifications for amplifier A/D converters are found under the preamplifier or digital headstage technical specifications. DSP 400 MHz DSPs, 2.4 GFLOPS peak per DSP Three or Four Memory 64 MB SDRAM per DSP D/A 4 channels, 16-bit PCM Sample Rate Up to 48828.125 Hz* Frequency Response DC-Nyquist (~1/2 sample rate) Voltage Out +/- 10.0 Volts S/N (typical) 82 dB (20 Hz - 20 kHz at 9.9 V) A/D 4 channels, 16-bit PCM Sample Rate Up to 48828.125 Hz * Frequency Response DC - 7.5 kHz (3 dB corner, 2nd order, 12 dB per octave) Voltage In +/- 10.0 Volts S/N (typical) 82 dB (20 Hz - 20 kHz at 9.9 V) Fiber Optic Ports IZ One output for IZ2, up to 128 channels PZ One input for PZ2, PZ3 or PZ4, up to 32 channels Digital I/O 24 bits programmable System 3 Manual RZ Z-Series Processors 1-33 BNC Channel Mapping Please note that channel numbering begins at the top left block of BNCs for both analog and digital I/O and is printed on the face of the device to avoid miswiring. Maps to Ch 1-4 on Analog I/O DB25 Maps to Ch 9-12 on Analog I/O DB25 Maps to Port C Bits 0-3 on Digital I/O DB25 DB25 Analog I/O Pinout Pin Name 1 NA Description Pin Name Description Not Used 14 2 15 3 16 4 17 NA Not Used ADC Analog Input Channels (ADC Inputs) 5 AGND Analog Ground 18 A1 6 A2 19 A3 7 A4 ADC Analog Input Channels (ADC Inputs) 20 NA Not Used 8 NA Not Used 21 22 A9 DAC Analog Output DAC Analog Output Channels (DAC Outputs) 23 A11 24 NA Not Used 25 9 10 A10 11 A12 12 NA Channels (DAC Outputs) Not Used 13 System 3 Manual 1-34 RZ Z-Series Processors DB25 Digital I/O Pinout Pin Name Description Pin Name Description 1 C0 Byte C 14 C1 Byte C 2 C2 Bit Addressable digital I/O 15 C3 Bit Addressable digital I/O 3 C4 Bits 0, 2, 4, and 6 16 C5 Bits 1, 3, 5, and 7 4 C6 17 C7 5 GND Digital I/O Ground 18 A0 Byte A 6 A1 Byte A 19 A2 7 A3 Word addressable digital I/O Word addressable digital I/O 20 A4 Bits 0, 2, 4, and 6 8 A5 Bits 1, 3, 5, and 7 21 A6 9 A7 22 B0 Byte B 10 B1 23 B2 Word addressable digital I/O 24 B4 Bits 0, 2, 4, and 6 25 B6 11 B3 12 B5 13 B7 System 3 Manual Byte B Word addressable digital I/O Bits 1, 3, 5, and 7 RZ Z-Series Processors 1-35 RZ6 Multi I/O Processor Overview The RZ6 Multi I/O Processor is a high sample rate processor with flexible input/output capabilities. Up to four 400 MHz Sharc digital signal processors are networked in an optimized multiprocessor architecture that features efficient onboard communication and memory access. Two channels each of sigma-delta D/A and A/D converters provide a dynamic range of up to 115 dB and sampling rates up to ~200 kHz. The single device form factor incorporates two channels of onboard programmable and manual attenuation and can drive headphones and standard, magnetic, or electrostatic speakers. It includes an onboard monitor speaker, two channels of amplification for analog inputs, and 24 channels of digital I/O. XLR, audio jack, and BNC connections are supported. Optionally, the RZ6 can be equipped with a fiber optic input, allowing it to support a four channel Medusa preamplifier. The RZ6-A Base version starts with a single DSP and makes an excellent all-in-one psychoacoustics system or can be added to any system to add audio stimulus generation to experiments. The RZ6-A-P1 comes equipped with three DSPs for more processing power and includes the optional fiber optic input port, allowing it to serve as a BioAmp base station for ABR and OAE studies. Both configurations can be upgraded with additional DSPs (up to a maximum of four) for complex filtering and high frequency applications. Power and Communication The RZ6's Optibit optical interface ensures fast and reliable data transfer from the RZ6 to the PC and is integrated into the device. Connectors are provided on the back panel and are color coded for correct wiring. The RZ6’s power supply is also integrated into the device and is shipped from the factory configured for the desired voltage setting (110 V or 220V). If you need to change the voltage setting, please contact TDT support at 386.462.9622 or email support@tdt.com. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or System 3 Manual 1-36 RZ Z-Series Processors custom applications. Several RZ6 macros are provided and are required to handle all programmable features related to the RZ6. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see MultiProcessor Circuit Design in the RPvdsEx Manual. RZ6 Multi-Bus Architecture The RZ6 processor utilizes a multi-bus architecture and offers three dedicated, data buses for fast, efficient data handling. While the operation of the system architecture is largely transparent to the user, a general understanding is important when developing circuits in RPvdsEx. As shown in the diagram above, the RZ6 architecture consists of three functional blocks: The DSPs Each DSP in the DSP Block is connected to three data buses: two buses that connect each DSP to the other functional blocks and one that handles data transfer between the DSPs (the zHop Bus). This architecture facilitates fast DSP-to-off-chip data handling. Each DSP has its own 64MB of SDRAM memory. Large and complex circuits should be designed to balance memory needs (such as data buffers and filter coefficients) across processors. When designing circuits also note that the maximum number of components for each RZ6 DSP is 768. The zBus Interface The zBus Interface provides a connection to the PC. Data and host PC control commands are transferred to and from the DSP Block through the zBus Interface Bus. The I/O Interface The I/O Interface serves as a connection to outside signal sources or output devices. It is used to input data from the optional preamplifier System 3 Manual RZ Z-Series Processors 1-37 input and digital and analog channels. The I/O Interface Bus provides a direct connection to each DSP. Distributing Data Across DSPs To take advantage of multi-DSP modules, processing tasks must be efficiently distributed across the available DSPs. The RZ6 architecture provides the zHop Bus for transferring data across DSPs. The zHop Bus The zHop Bus allows the transfer of single or multi-channel signals between each DSP in the RZ6. [1:3,0] MCzHopPick ChanNo=1 zHopOut zHopIn MCzHopOut MCzHopIn nChan=4 nChan=4 ChanSel=1 In RPvdsEx, data is transferred across the zHop Bus using paired zHop Components, including zHopIn, zHopOut, MCzHopIn, MCzHopOut, and MCzHopPick. Up to 126 pairs can be used in a single RPvdsEx circuit. Bus Related Delays The zHop Bus introduces a single sample delay. This delay is taken care of for the user in OpenEx when Timing and Data Saving macros are used. Functional Signal Flow Diagrams The following diagrams illustrate how analog signals for channels A and B flow through the RZ6 and its modules. For more information on analog input and output see page 1-38. Mic-A The diagram to the below depicts the analog input flow for the RZ6. Diff-A In-A Amp ADC A In-B B RZ6 Analog Input Flow Diagram Input signals for channel A are input either through the XLR input (Mic-A), the audio jack input (Diff-A), or BNC (In-A). Input signals for channel B are input through the BNC (In-B). A switch located to the left of the gain control knob allows a single gain setting for both channels to be applied or bypassed completely. System 3 Manual 1-38 RZ Z-Series Processors The diagram below depicts analog output flow through the RZ6. DAC A PA + Mon Lvl MA - A&B Out-A Speaker + Out-B Mon B -A- -B- - RZ6 Analog Output Flow Diagram Signals A and B flow out of the DAC and pass through the programmable and manual attenuation modules prior to being output on the front panel BNC connectors (Out-A and Out-B). The signals for channels A and B are also passed to two stereo headphone output ports labeled A&B and Mon. Individual stereo power amplifiers are used for the BNC and stereo headphone outputs. A single channel monitor speaker is connected either to signal A, signal B, or disabled based on the monitor control switch setting. The monitor level knob controls the sound level of both the stereo headphone jack labeled Mon and the monitor speaker. Finally, if the electrostatic speaker driver is enabled via its switch, located on the front panel, signals A and B are output from the mini-DIN ports located on the RZ6 front panel. RZ6 Features Onboard Analog I/O and Optional Amplifier Input The RZ6 is equipped with onboard analog I/O and may also include a fiber optic port for Medusa preamplifier input. The following table provides a quick overview of the analog I/O and amplifier input features and how they must be accessed during circuit design. The RZ6 relies exclusively on macros for configuring analog and digital I/O and its fiber optic input port. See the RPvdsEx Manual for more information on circuit design. Analog I/O Description Channels Required Macro ADC Inputs Analog Input A and B RZ6_AudioIn DAC Outputs Analog Output A and B RZ6_AudioOut Optical Amp Medusa PreAmp Input 1-4 RZ6_AmpIn System 3 Manual RZ Z-Series Processors 1-39 Onboard Analog Inputs The RZ6 is equipped with two channels of 24-bit sigma-delta A/D converters. See RZ6 Technical Specifications, page 1-45 for more information. Analog signals can be input through several connectors on the RZ6 front panel. Channel A has three possible sources: MIC-A (XLR microphone input) DIFF-A (1/4” TRS microphone input) BNC labeled In-A Channel B uses only the BNC labeled In-B. Mic-A Diff-A In-A In-B Important!: Use only one input for channel A at a time. Attempting to input signals from multiple sources will produce an erroneous signal. Analog input is accessed in RPvdsEx through the RZ6_AudioIn macro. ADC and Microphone Amplifier An onboard two channel amplifier provides gain for the onboard analog input signals (MIC-A, DIFF-A, In-A, and In-B). The switch located to the left of the gain control knob allows the current gain setting to be applied (if set to Amp) or bypassed completely (if set to Byp). Important!: When the gain is enabled, analog input signals MIC-A and DIFF-A are differential. Since the differential signals are summed a signal gain of 6 dB will be inherently applied. If the amplifier is bypassed, common mode rejection is disabled. Note: To prevent clipping caused by a DC offset, the amplifier is AC coupled when the gain amplification is in use. Gain (DB) 65 Amp 20 25 60 Byp 30 55 35 50 45 40 Gain The front panel gain control knob can be used to the control overall signal level of both channels from 20 to 65 dB in 5 dB steps. System 3 Manual 1-40 RZ Z-Series Processors Fiber Optic Port - Optional The RZ6-A-P1 acquires digitized signals from a Medusa preamplifier over a fiber optic cable. The port can be used with the RA4PA to input up to 4 channels. Input from the preamplifier fiber optic port is accessed using the RZ6_AmpIn macro. The fiber optic port (devices with serial number 1007 and greater) can also support the HTI3 Head Tracker Interface. See page 17-17 for more information on using the HTI3. Fiber Oversampling (acquisition only) Signals are digitized on the Medusa preamplifier at a maximum sampling rate of ~25 kHz, however, the fiber optic port on the RZ6 can oversample the digitized signals up to 8X or ~200 kHz. This will allow the RZ6 to run a DSP chain at ~200 kHz and still sample data acquired through an optically connected preamplifier. Oversampling is performed on the RZ6. The signals being acquired will still be sampled at ~25 kHz on the preamplifier. This means that, even with oversampling, signals acquired by an optically connected preamplifier are still governed by the bandwidth and frequency response of the preamplifier. Onboard Analog Outputs The RZ6 is equipped with two channels of 24-bit sigma-delta D/A converters (see RZ6 Technical Specifications, page 1-45). Analog signals are output through a variety of connectors on the RZ6 front panel. See the Functional Signal Flow Diagrams on page 1-37, for more information. Analog output is configured in RPvdsEx through the RZ6_AudioOut macro. Programmable Attenuation The RZ6_AudioOut macro provides access to two channels of programmable attenuation for precision control of analog output signal levels over a wide dynamic range. Programmable attenuation in the RZ6 is achieved using both analog and digital attenuation methods. The device supports analog attenuation values of 0, 20, 40, and 60 dB. Attenuation values which lie in-between or exceed 60 dB are handled using digital attenuation. For example, if you set an attenuation value of 66 dB in the RZ6_AudioOut macro, the analog attenuator will be set to 60 dB and the remaining 6 dB of attenuation will be applied by scaling the digital signal through RPvdsEx. Note: For the best results, you should utilize the maximum D/A voltage range and use the RZ6_AudioOut macro to configure the desired attenuation setting for channels A and B. System 3 Manual RZ Z-Series Processors 1-41 Manual Attenuator The RZ6 includes another level of analog attenuation that can be controlled manually via the attenuator control knob from 0 to 27 dB in increments of 3 dB. Manual attenuation is applied to both channels before the signals are output on any of the front panel connectors and is therefore applied in addition to any programmable attenuation set in RPvdsEx through the RZ6_AudioOut macro. Atten (DB) 0 3 27 6 24 9 21 12 15 18 Analog Output via BNCs DAC channels A and B are output to BNCs labeled Out-A and Out-B after attenuation has been applied. These outputs use a stereo power amplifier to drive TDT’s FF1 and CF1 Magnetic speakers. Note: A single signal generated or input from any of the RZ6 analog inputs can be ganged to reduce the spectral variation in power of the transducer across all frequencies (see the Power Output Diagram for specific detail on page 1-47). To do this, configure your signal to output from both DAC channels as shown in the following diagram. Out-A Out-B Transducer Ganged Output Connection Diagram Configure your RPvdsEx circuit to output the same signal to DAC channels A and B then connect the transducer as shown in the diagram above. Stereo Headphone Output DAC channels A and B are also available as a stereo headphone output through two 1/8” audio jack connector ports (channel A is the left stereo output and channel B is the right stereo output). The port labeled A&B (top) provides a stereo headphone output suitable for experimental paradigms while the port labeled Mon (bottom) can be controlled by the Mon Level knob located directly to the right, making it more suitable for monitoring the experiment. A&B Out-A Mon Level Out-B Min Max Note: All outputs use stereo power amplifiers. Mon System 3 Manual 1-42 RZ Z-Series Processors Monitor Speaker The RZ6 is equipped with an onboard monitor speaker, provided for audio monitoring of a single channel. A switch located directly to the left of the monitor speaker is used to select between DAC channels A and B or to disable the monitor speaker. The monitor speaker output level is controlled by the Mon Level knob located directly to the right of the monitor stereo output. -AOff -B- Electrostatic Speaker Output An onboard two channel broadband electrostatic speaker driver is provided, allowing direct connection of TDT's ES series electrostatic speakers. The driver produces flat frequency responses reaching far into the ultrasonic range, can drive two ES series speakers, and is powered using the onboard power supply. A switch located directly to the left of the two 4-pin, mini-DIN connectors is used to enable or disable output of DAC channels A and B. Electrostatic On -A- -B- Off Note: The electrostatic speaker driver is designed to work exclusively with TDT’s electrostatic series speakers. Do NOT attempt to use any other speaker. Important!: If the electrostatic speaker driver is not being used, make sure that the ON/OFF switch is in the OFF position to reduce noise on the RZ6. Digital I/O Current RZ6 models are equipped with 24 bits of programmable digital I/O divided into three bytes (A, B, and C) as described in the chart below. Earlier versions (serial number < 2000) were limited to 8 bits. By default, all lines are configured as inputs. Data direction is configured using the RZ6_Control macro in RPvdsEx and may be controlled dynamically through the macro input port. For more information on using the RZ6_Control macro see the help provided in the macro's properties dialog box. Digital I/O Description Notes Byte A bits 0 - 7 byte addressable Byte B bits 0 - 7 byte addressable Byte C bits 0 – 7 bit addressable System 3 Manual RZ Z-Series Processors 1-43 The Digital I/O connector can be found on the front of the RZ6. See RZ6 Technical Specifications page 1-45, for pinouts. Voltage outputs and logic thresholds vary by type as shown in the table below. Digital I/O Type Voltage Output Voltage Input logic high logic low logic high logic low byte addressable 5V 0V ≥ 2.5 V 0 - 2.45 V bit addressable 3.3 V 0V ≥ 1.5 V 0 - 1.4 V See Working with BitIn - BitOut in the Digital I/O Circuit Design section of the RPvdsEx Manual for more information on programming and addressing Byte C of the digital I/O. See Working with WordIn -WordOut in the Digital I/O Circuit Design section of the RPvdsEx Manual for more information on programming and addressing Bytes A and B of the digital I/O. DSP Status Displays The RZ6 includes status lights and a VFD (Vacuum Fluorescent Display) screen to report the status of the individual processors. Status Lights Processors 1 2 3 4 LEDs report the status of the multiprocessor's individual DSPs and will be lit solid green when the corresponding DSP is installed and running. The LED will be lit dim green if the cycle usage on a DSP is 0%. If the demands on a DSP exceed 99% of its capacity on any given cycle, the corresponding LED will flash red (~1 time per second). Important!: The status lights flash when a DSP goes over the cycle usage limit, even if only for a particular cycle. This helps identify periodic overages caused by components in time slices. Front Panel VFD Screen The front panel VFD screen reports detailed information about the status of the system. The display includes two lines. The top line reports the system mode, Run!, Idle, or Reset, and displays heading labels for the second line. The second line reports the user’s choice of status indicators for each DSP followed by an aggregate value. The user can cycle through the various status indicators using the Mode button to the bottom right of the display. Push and release the button to change the display or push and hold the button for one second then release to automatically cycle through each of the display options. The VFD screen may also report system status such as booting status (Reset). Note: When burning new microcode or if the firmware on the RZ6 is blank, the VFD screen will report a cycle usage of 99% and the processor status lights will flash red. System 3 Manual 1-44 RZ Z-Series Processors Status Indicators Cyc: cycle usage Bus%: percentage of internal device's bus capacity used I/O%: percentage of data transfer capacity used DAC: Displays the current analog attenuator setting. Also displays bars according to the RMS level of DAC A and B using a logarithmic scale. Note: Eight solid bars denote that the signal on DAC A or B is clipping. Displays bars according to the RMS Level on ADC A and B using a logarithmic scale. ADC: Note: Eight solid bars denote that the signal on ADC A or B is clipping. Analog Input – ADC LED Indicators The ADC LED indicators are labeled and located at the top right of the RZ6 front panel. The LEDs indicate the level of the signals on ADC channels A and B. This provides a useful indicator for adjusting the gain and to detect and prevent clipping. The following table describes the LED indicators' operation. Light Pattern LEDs Lit Description A 4 Input is ≤ -6 dB down from max input voltage 3 Input is between -6 dB and -12 dB down from max input voltage 2 Input is between -12 dB and -25 dB down from max input voltage 1 Input is between -25 dB and -50 dB down from max input voltage B -6db -12 -25 -50 Level Digital I/O LED Indicators The digital I/O LED indicators are located directly below the VFD and DSP status LEDs and display information relative to the digital I/O contained on the RZ6. There are 8 LEDs one for each bit addressable digital I/O channel (Byte C). Each LED may display one of four states. The following table illustrates the possible display options and their associated descriptions. Light Pattern Description Dim Green Bit is configured for output and is currently a logical low (0) Solid Green Bit is configured for output and is currently a logical high (1) Dim Red Bit is configured for input and is currently a logical low (0) Solid Red Bit is configured for input and is currently a logical high (1) Analog Input - Fiber Optic Port LED Indicator A single green LED indicator is provided for the fiber optic input port on the RZ6-A-P1. When lit the LED signifies a Medusa preamplifier is correctly synced with the RZ6. System 3 Manual RZ Z-Series Processors 1-45 Specialized DSP/Optical Interface Boards (Optional) The RZ Standard DSP Boards can be replaced with specialized DSP Boards which include an optical interface for communication and control of RZ compatible devices, such as the IZ2 Stimulator and RV2 Video Processor. RZ devices equipped with one or more specialized DSP boards include an optical port for each card. The ports are located on the back panel and labeled for easy identification. RZDSP-I This board supports the IZ2 Stimulator, allowing the RZ device to function as a controller or base station. See the IZ2 Stimulator section, page 7-23, for more information on using and designing circuits for the stimulator. RZDSP-P This board supports PZ amplifier input, providing an alternate method for acquiring data from a PZ amplifier. It can be used to expand the number of channels that can be acquired on any RZ processor. Access to this input can be enabled in the PZ control macro. RZDSP-V This board supports the RV2 Video Tracking System, allowing the RZ device to function as a controller or base station. See the RV2 Video Processor section, page 8-1, for more information on using and designing circuits for the RV2. RZ6 Multi I/O Technical Specifications The RZ6 can be equipped with a fiber optic input port which may be used with a four channel Medusa preamplifier. Specifications for the A/D converters of those devices are found under the preamplifier's technical specifications. DSP 400 MHz DSPs, 2.4 GFLOPS Peak (Up to four) Memory 64 MB SDRAM per DSP D/A 2 channels, 24-bit sigma-delta Sample Rate Up to 195312.50 kHz Frequency Response DC - 82 kHz Voltage Out +/- 10.0 Volts S/N (typical) 115 dB (20 Hz - 80 kHz at 5 Vrms) THD (typical) -90 dB (1 kHz output at 5 Vrms) Sample Delay 47 samples A/D 2 channels, 24-bit sigma-delta Sample Rate Up to 195312.50 kHz Frequency Response DC - 82 kHz System 3 Manual 1-46 RZ Z-Series Processors Voltage In +/- 10.0 Volts S/N (typical) 115 dB (20 Hz - 80 kHz at 5 Vrms) THD (typical) -90 dB (1 kHz output at 5 Vrms) Sample Delay 66 samples Optional Input Available on RZ6-A-P1 only Fiber Optic Ports Supports 4-channel Medusa preamplifier or HTI3 Head Tracker Interface (serial number 1007 and greater) Digital I/O 24 bits programmable ADC and Microphone Amplifier Single setting for both channels (AC coupled when enabled) High Pass Corner Frequency 3.6 Hz (Active only if the Amplifier is enabled) Gain Settings 20 to 65 dB Gain Resolution 5 dB Programmable Attenuation 2 channels Switching Time 1 sample Settling Time 3 µsec Transient Voltage ~370 mV Hardware Attenuation Settings 0, 20, 40, 60 dB Manual Attenuation Single setting for both channels Attenuation Settings 0 to 27 dB Attenuation Resolution 3 dB 2 channels Amplification Spectral Variation < 0.1 dB from 50 Hz to 200 kHz Signal Noise 115 dB (20 Hz to 80 kHz) THD < 0.02% at 1 Watt from 50 Hz to 100 kHz Noise Floor 10.5 µV rms Input Impedance 10 kOhm Output Impedance 1 Ohm, 0.5 Ohm ganged Headphone Output System 3 Manual 2 channels RZ Z-Series Processors 1-47 Output Impedance 1 Ohm Electrostatic Speaker Output 2 channels Note: For further information on ES series speaker specifications, see page 16-11, for Magnetic Speakers, see page 16-3. D/A dB Rolloff Diagram This graph shows the dB rolloff for the RZ6 with varying sampling frequencies for the D/A. The sample delay remains constant for varying frequencies. D/A Power Output Diagram This graph shows the power output for the RZ6 with varying driving frequencies for the D/As when driving a four Ohm load. Driving higher impedance loads will reduce spectral variation. System 3 Manual 1-48 RZ Z-Series Processors DB25 Digital I/O Pinout Pin Name Description Pin Name Description 1 C0 Byte C 14 C1 Byte C 2 C2 Bit Addressable digital I/O 15 C3 Bit Addressable digital I/O 3 C4 Bits 0, 2, 4, and 6 16 C5 Bits 1, 3, 5, and 7 4 C6 17 C7 5 GND Digital I/O Ground 18 A0 Byte A 6 A1 Byte A 19 A2 7 A3 Word addressable digital I/O Word addressable digital I/O 20 A4 Bits 0, 2, 4, and 6 8 A5 Bits 1, 3, 5, and 7 21 A6 9 A7 22 B0 Byte B 10 B1 23 B2 Word addressable digital I/O 24 B4 Bits 0, 2, 4, and 6 25 B6 11 B3 12 B5 Byte B Word addressable digital I/O Bits 1, 3, 5, and 7 13 B7 Digital I/O – DB9 Connector Pinout (serial numbers < 2000) Pin Name Description Pin Name Description 1 D0 5 GND Ground 2 D2 Digital I/O bits 0,2,4,6 6 D1 Digital I/O bits 1,3,5,7 3 D4 7 D3 4 D6 8 D5 5 GND 9 D7 System 3 Manual Ground RZ Z-Series Processors 1-49 RZ-UDP RZ Communications Interface Overview The RZ Communications Interface (RZ-UDP-20) is an optional interface for RZ processor devices that includes a UDP Ethernet connection and a serial port connection. The serial port can support baud rates up to 115200. The port is a standard 9-pin RS232 connection located on the back of the RZ. The RS232 port can be directly connected to any device that communicates via serial port, such as head trackers, eye trackers, or a PC. The UDP interface is designed to transfer up to 200 data values at low rates to or from a PC. The PC may be directly connected through a dedicated Ethernet card located elsewhere on the user’s network, or even in a remote location connected via the internet. The RZ UDP interface is located on the back panel of the RZ processor and accepts a standard Ethernet cable. Like all network devices the RZ UDP interface utilizes several network parameters such as a unique network address, appropriate network mask, and optionally a gateway (if operating across networks). The RZ UDP Ethernet interface supports the DHCP (Dynamic Host Configuration) protocol for automatic configuration of these network parameters, but these parameters may also be set manually, as described in the Network Configurations section on page 1-56. The type and structure of data for the serial port must be manually configured through the same network interface. Note: the RZ-UDP-20 is an updated version of the RZ-UDP-10 which had only an Ethernet interface. Configuration of the Ethernet interface is the same for both versions. Installation The TDT drivers installation provides the UDP test application as well as two RPvdsEx macros designed for the UDP Ethernet interface and two macros for the serial interface. Once installed, the toolset should extract the macros to the following path: C:\TDT\RPvdsEx\Macros\Device\UDP Ethernet\ The test application will be extracted to: C:\TDT\RPvdsEx\Examples\RZ UDP\ System 3 Manual 1-50 RZ Z-Series Processors Hardware Requirements Basic requirements include an Ethernet cable and an RZ processor equipped with the UDP interface. A PC equipped with an Ethernet port or an Ethernet jack connected to a local area network is required to send or receive data from an RZ processor. Optionally, a 9-pin RS232 cable is required to connect the serial port to an external device or a PC. Setting-Up Your Hardware To setup the UDP Ethernet interface, connect your Ethernet cable directly to a PC Ethernet port or standard Ethernet wall jack. For more information on setting up or configuring the RZ processor see the System 3 Installation Guide. The diagram above illustrates the possible connections from the RZ processor to an active network (1) or PC (2), and an optional serial connection to a peripheral device (3). Note: If you are only using the serial interface, you will still need a UDP Ethernet connection to configure the serial interface through the web interface. See page 1-54, for more information. Status LEDs The UDP Ethernet interface provides several status indicators which are located on the back of the RZ processor. These status indicators are used to denote a proper connection to a network, activity or network traffic, or UDP activity such as sending or receiving packets. System 3 Manual RZ Z-Series Processors 1-51 The following table lists the possible status indicators for the UDP Ethernet interface. LED Color Status Green Orange Red Off No network connectivity No network traffic detected Remote address set, no activity Light network traffic is present Power connected, waiting for remote address to be set Heavy network traffic present Packet activity present Blinking slowly (once / sec) Blinking rapidly or solid glow Link connected (several times / sec) (send or receive) Network Structure In order to understand how the UDP interface works, a basic understanding of Internet Protocol (IP) networking is required. As mentioned above, all network devices require a unique network address, appropriate network mask, and if communicating between networks, a gateway. Data in IP networks is organized into discrete packets for transmission or reception. For our purposes, the packet size is equivalent to the number of channels being transmitted or received. Network Address All network devices utilize a network address commonly referred to as the IP address. The IP address is a unique address given to any networked device and consists of four hexadecimal values that are used to locate a device from within a network. Multiple devices that are located within a common network use similar IP addresses. For example: Several office computers are connected to a network within an office. IP address Computer 1: 192.86.100.10 IP address Computer 2: 192.86.100.11 IP address Computer 14: 192.86.100.23 As shown above, IP addresses share a common prefix when located on a common network. Subnet Mask Just as the IP address is important for each device contained within a network, the subnet mask is used to classify the size of the network as well as determine the broadcasting address for a device. When an IP address is given to a device, the inverse of the subnet mask is ORed to the IP address to obtain the broadcast address. For example: To obtain the broadcast for an IP address with a subnet mask of 255.255.255.0 the IP address and inverse of the subnet mask value are ORed. IP Address Subnet Mask Broadcast -1 192.86.100.10 = 1100 0000 | 0101 0110 | 0110 0100 | 0000 1010 0.0.0.255 = 0000 0000 | 0000 0000 | 0000 0000 | 1111 1111 192.86.100.255 = 1100 0000 | 0101 0110 | 0110 0100 | 1111 1111 System 3 Manual 1-52 RZ Z-Series Processors Several types of network protocols and services use broadcasts in different ways. Dynamic Host Configuration Protocol (DHCP), for instance, requires that broadcasts be used to dynamically assign a unique IP address to computers on a network. Types of Networks Several different classifications of networks exist and are organized by the number of possible network addresses (IP addresses) available. The previous example used a Class C network subnet mask. The following table illustrates the bit ranges and classifications of common networks. Class Start End Default Subnet Mask Class A 0.0.0.0 127.255.255.255 255.0.0.0 Class B 128.0.0.0 191.255.255.255 255.255.0.0 Class C 192.0.0.0 223.255.255.255 255.255.255.0 Class A defined networks contain a broad range of possible values since the subnet mask allows for 24 bits or 16,777,214 addresses per network. A Class C network contains 8 bits of IP addresses per network and so, allows up to 256 possibilities. Gateway Along with an IP address and subnet mask, networks may optionally use a gateway which is required to send or receive data from outside the network. You can think of a gateway as a node that serves as an access point to another network. MAC Address A device’s MAC address or “Media Access Control” address is a unique number that acts like a name for a particular network adapter. On a shared medium such as Ethernet, this address is generally assigned to the hardware when it is constructed, but may be manually modified in the UDP Interface. For example: The network cards in two different computers will have different MAC addresses, as would an Ethernet adapter and a wireless adapter in the same computer. The DHCP Protocol DCHP or “Dynamic Host Configuration Protocol” is a protocol used by networked devices (clients) to obtain various parameters necessary for the clients to operate in an Internet Protocol (IP) network. By using this protocol, system administration workload greatly decreases, and devices can be added to the network with minimal or no manual configuration. DHCP automates the assignment of IP addresses, subnet masks, default gateway, and other IP parameters. Three modes for allocating IP addresses exist: dynamic, reserved, and manual. The UDP interface relies primarily on dynamic mode for its IP configuration. Dynamic In dynamic mode a client is provided with a temporary IP address for a given length of time. This length of time is dependant on the server configuration and may range from a long time (months) to several hours. System 3 Manual RZ Z-Series Processors 1-53 The current IP address can be renewed at any time by the DHCP client. This renewal is used by properly functioning clients to maintain the same IP address throughout their connection to a network. Reserved In reserved mode, the IP address is permanently assigned to a client via DHCP server-side reservations. Please check the documentation for your DHCP server for more information. Manual In manual mode the IP address is selected by the client (manually by the user or any other means) and the DHCP protocol messages are used to inform the server that the address has been allocated. The UDP Protocol UDP or “User Datagram Protocol” is a core protocol of the Internet Protocol suite or more commonly known as the TCP/IP protocol suite. UDP allows programs and networked computers to send datagrams or data organized in a specific structure (commonly referred to as a packet). Note: The UDP protocol is considered “connectionless” since devices send data to a defined IP address and are not actively connected to the destination device or PC. As such, the UDP Ethernet interface will send or receive data from the last IP address it is configured to communicate with. When information from a data protocol (UDP or TCP) is sent, the information may get lost or delayed along the way. UDP protocol allows time critical data to be transmitted with very low latency since UDP protocol does not implement data tracking. Conversely, when TCP detects that information has been lost or received out of order, it resends the suspect information. This is insufficient for time dependant data found in most neuroscience applications. Note: The UDP protocol does not account for data received out of order. Process Layers The UDP Ethernet interface operates on a structure of layers. These layers interact with each other as segments to produce the end result; to send data from one source and receive it intact on another source. Five layers of this structure are shown below. Layer - Name Entity or Protocol Segment Task 1 – Physical UDP Ethernet Interface Encodes the data into packets. 2 – Data Link Ethernet Provides a means to move data packets. 3 – Network IP Provides a link between one or more data sources. 4 – Transmission UDP Manages the transfer of data packets to or from sources. 5 – Presentation Application Used to manipulate or analyze the data packets. Each process begins with encoding in which the data is organized into packets before it is sent through the data link to a network. Once the device is recognized on the network (through an IP address) data transmission can occur. In order for the destination to be selected and the device to be recognized, the NetBIOS protocol translates any present NetBIOS names to IP addresses and the target source’s application may receive the data packet for further processing. Once resolved, System 3 Manual 1-54 RZ Z-Series Processors the NetBIOS to IP address conversion is cached for future transmissions. All other processes repeat for each data packet sent. UDP Configuration Given this basic understanding of a Network (IP) address, subnet mask, gateway, MAC address, and the various protocols, we can now look at the default configuration of the UDP Ethernet interface. Initialization Upon initializing, the UDP interface will attempt to locate a DHCP server to dynamically assign an IP address to the device. If a DHCP server is available, a dynamically allocated IP address is assigned to the interface and NetBIOS is used to associate the interface IP address with a unique name, the NetBIOS name. If no DHCP server responds, the device falls back on the following static IP configuration which is also associated with the NetBIOS name: IP Address: 10.1.0.100 IP Mask: 255.0.0.0 Gateway: 10.1.0.1 NetBIOS Name The default NetBIOS name associated with the IP address is set by TDT. All RZ processor devices equipped with the UDP Ethernet interface will use this standard NetBIOS Name structure: TDT_UDP_MD_XXXX M = the number from the model of the device, e.g. ‘2’ for an RZ2, ‘5’ for an RZ5 D = the number of RZ processor DSPs XXXX = last 4 digits the RZ processor device serial number. For Example An RZ2-4 (4 DSP) with a serial number of 1234 uses a NetBIOS name of: TDT_UDP_24_1234 Note: Devices equipped with a UDP interface that have a serial number less than 2012 use a different NetBIOS name format. Although a default NetBIOS name is assigned. The name can be changed using the UDP Web Interface, see page 1-57 for more information. Note: When connecting the RZ, be sure the network mask is set to a Class C or smaller network. A Class A network mask (255.0.0.0) will disable NetBIOS naming on the PC Ethernet interface. In such cases, the IP address of the UDP Ethernet interface must be specified instead. Configuration through the Web Interface Every RZ UDP interface contains a minimal web server which is used to configure the UDP and serial interfaces. Configuration options can be set here if no DHCP server is available. If a DHCP server exists, the NetBIOS name associated with the dynamically assigned IP address can be configured here. Note: The web interface is only enabled for one minute after powering up the RZ, unless it is in use, in which case it remains enabled until the RZ is turned off. Loading pages through the web interface while collecting data is discouraged and may cause packet loss. System 3 Manual RZ Z-Series Processors 1-55 To connect to the UDP Ethernet interface server: Make sure there is an active connection from the PC to the UDP Ethernet port on the back of the RZ then open an internet browser such as Internet Explorer or Mozilla FireFox. Enter the device’s IP address (if known) as the web address (e.g. http://10.1.0.100) and click Enter. or Enter the NetBIOS name as the web address (e.g. TDT_UDP_0000000) and click Enter. Once properly connected, navigation to the UDP web interface loads the Introduction page. Clicking the links to the left of the web interface loads the corresponding page. Introduction Page The Introduction page provides basic information, including the default username and password. The login information can be changed on the Authentication page. Authentication Page The Authentication page allows users to change their username and password provided they enter the currently set username and password. Note: Any server pages that modify the device configuration require a username and password. Default Username: admin Default Password: pw System 3 Manual 1-56 RZ Z-Series Processors To change the Username and Password: 1. Click the Authentication link on the left side of the UDP server web page. You will be prompted to enter the current username and password. 2. Enter the current username and password. 3. Click OK. 4. Enter the desired new username and password. 5. Click the Submit button. Note: Once changed, you may need to re-enter the new username and password to access the network configurations or Authentication pages. Network Configurations Page This page contains settings for configuring the UDP interface. To change the network configuration: 1. Click the Networking link on the left side of the UDP server web page. 2. If you have not already entered the username and password, the authentication dialog box will prompt. 3. Enter the username and password to access the Networking page. Current Network Value Current IP settings are displayed in this area. Settings for configuring the static IP address, subnet mask, gateway address, and MAC address are located in the Network Settings area. System 3 Manual RZ Z-Series Processors 1-57 Network Settings This area contains settings for configuring the UDP interface in the event that no DHCP server is detected. If the Enable DHCP check box is checked (see following Parameters diagram), the IP Address, Subnet Mask, and Gateway Address values are overridden and automatically configured by the DHCP server if available. Note: These settings are reserved for connections that cannot locate a DHCP server. If no DHCP server can be detected contact your network administrator for applicable settings. Parameters This area contains settings for enabling DHCP or renaming the NetBIOS name. To Change the NetBIOS name: Type the desired NetBIOS name in the NetBIOS name textbox and click the Update button. or Type the desired NetBIOS Name in the NetBIOS name textbox and click the Update and Reset button. The Update and Reset button saves the current configuration settings and performs a soft reset of the UDP interface to load the current settings. Note: The NetBIOS name can be no greater than 15 characters long and cannot contain spaces or the following characters: \ / : * ? " ; | - Note: A reset circuit is provided with the TDT driver installation and can be found in: C:/TDT/RPvdsEx/Support/. Running this circuit on the device with the UDP interface will reset the NetBIOS name to the factory default setting described on page 1-54. Direct Connection to a PC The UDP interface can be connected directly to a PC or laptop; however, it is usually necessary to use an Ethernet crossover cable to connect the devices. Once connected, several steps are required System 3 Manual 1-58 RZ Z-Series Processors in order for the PC to recognize to the UDP interface connection. This method may be performed on any operating system which supports TCP/IP. To initialize the PC for a direct connection in Windows XP: 1. Physically connect the UDP interface and the PC via an Ethernet crossover cable. 2. Click Start | Control Panel then double-click Network Connections. 3. Right-click the desired connection (this is usually a Local Area Connection) and select Properties. 4. Select Internet Protocol (TCP/IP) or if there are multiples, select Internet Protocol (TCP/IPv4). 5. Click the Properties button. 6. Select Use the following IP address and enter these values: IP address: Subnet mask: Default gateway: 7. 10.1.0.x, where x can be any value from 1 to 254 except 100 255.255.255.0 Leave empty Click OK. The UDP interface connection should now be recognized by the PC. Cycle power on the RZ device, the IP address of the RZ will be 10.1.0.100. System 3 Manual RZ Z-Series Processors 1-59 Serial Configuration The Serial Configuration page on the web interface contains settings for configuring the serial interface. To change the serial configuration: 1. Click the Serial Configuration link on the left side of the UDP server web page. 2. If you have not already entered the username and password, the authentication dialog box will prompt. 3. Enter the username and password to access the Serial Configurations page. Latest Data read from Serial Port If any data has been sent to the RZ serial port, the latest value will be displayed in this area. ASCII characters represent each byte. Settings for enabling the serial port, setting baud rate, setting data type and command formats are located in the Serial Port Settings area. Parameters The user can enable/disable the serial port, specify the baud rate, and select from a list of preset values. Data Type Big vs Little endian If the device attached to the RS232 connection sends the lower byte before the upper byte, set this to Little Endian. Otherwise, use Big Endian. 8 vs 16 vs 24 vs 32 bit words This field specifies the length of the data words that the device attached to the RS232 connection is sending. If the data being received is less than 32 bits in length, it is 0 padded out to 32 bits. Response Format This area contains configuration settings for the data received from the peripheral device. As data is received over the RS232 connection, it is matched against a user-specified sequence of header bytes at user specified intervals. For example, the user could set the connection to match two specific header bytes, process the next four bytes as data and then stat the process over again. System 3 Manual 1-60 RZ Z-Series Processors Frame Length Enter the total length of a ‘frame’ of data, including any header bytes. In the example shown in the image above, three channels of 32 bit data are being sent, for a total of 12 data bytes (32 bits = 4 bytes). In addition, there are 8 ‘header’ bytes that the user wants to synchronize with, bringing the total frame byte count to 20. The Frame Length, the word size, and the size of the header bytes are used to determine the number of channels being sent and which channel each data byte belongs to. Header Format If this field is empty, no synchronization will occur, and everything sent over the RS232 connection will be processed. Otherwise, the RZ will look for the specified sequence of bytes at the beginning of each frame. The user can enter a decimal value or any ASCII character in single quotes (e.g. ‘A’). The ‘*’ character is reserved as a wildcard character that will match anything. Note: If the received data/headers do not match the expected format, they are discarded and all synchronization information is reset. The RZ will then wait until 10 consecutive successful synchronizations before processing any further data bytes. Commands This area is used to configure any commands that the RZ needs to send over the serial port. Use this section if the peripheral device connected to the RS232 accepts special requests, such as an initialization command, start/stop command, or reset command. System 3 Manual RZ Z-Series Processors 1-61 Command Groups The format of this section is similar to the header format. The user can enter a decimal value or any ASCII character in single quotes, but the ‘*’ no longer takes on any special meaning here. Each of the command groups is tied to a trigger in the RZ_Serial_Rec or RZ_Serial_Send macros. When triggered, the specified sequence of bytes/characters will be sent over the RS232 connection. The UDP Packet Structure All data sent or received by the UDP Ethernet interface is in the form of a packet. Every packet has a standard structure which includes a 4 byte header followed by n x 4 bytes of data, where n is the total number of channels. Note: The term packet refers to a header and number of single sample values sent. Each channel sends a single sample. The packet size is therefore equivalent to the number of channels and is measured in 32-bit words. For Example Sending 16 channels (a packet size of 16, 32-bit words) will produce a packet of 68 bytes. 4 byte header + (16 channels x 4 bytes) = 68 bytes. Header Format The packet header precedes a new packet and stores information about the packet and its intended command for the UDP interface. The structure for the packet header is shown below. 4 Byte Packet Header (32 bits) 0x55 0xAA Cmd Num The upper two bytes, “55AA” are reserved and required by hardware. The lower two bytes are used for specifying a UDP command (Cmd) and the number of 4 byte data packets (Num) that are to be expected following the header. For all data samples, “Cmd” must be set to 0. For Example The previous example which sent a packet size of 16 channels would use the 32-bit header: 55 | AA | 0x00 | 0x10 Where the “Num” value 0x10 = 16 (the number of channels). UDP Interface Commands There are 4 commands that can be specified for the header byte labeled “Cmd”. Name Hex Code Description DATA_SEND 0x00 Data is being sent, the byte labeled “Num” contains the number of data packets following the current header. GET_VERSION 0x01 Retrieve the protocol version supported by the UDP interface. System 3 Manual 1-62 RZ Z-Series Processors SET_REMOTE_IP 0x02 Sets the target for receiving packets from the RZ. The IP and port of the machine sending this packet will be used as the new target. FORGET_REMOTE_IP 0x03 Clears the target IP and port, thereby stopping the flow of packets. UDP Circuit Design Access to the UDP interface is provided through two RPvdsEx macros: RZ_UDP_Send and RZ_UDP_Rec. Both macros operate on multi-channel data and can be configured to specify the number of channels. The channel count corresponds to the size of the underlying UDP packets. RZ_UDP_Send Macro The RZ_UDP_Send macro is used to send data from the RZ across a network. All data is organized into packets according to the number of words (specified by the packet size) set in the macro setup properties dialog. The macro accepts a multi-channel data stream as well as a logic input that tells the macro to send out a packet. An output labeled “Busy” indicates if the macro is currently in the process of sending out a packet. Sending Data Construct Data is sent on the rising edge of the “Send” input. The duration of the busy signal is then dependent on the number of channels to send (packet size). It takes N+1samples to send a packet, where N is the packet size. Note: Since the data packets are sent serially, multi-channel data is not sent at the same time. This means that there will be a time shift of multiple samples in multi-channel data. In this construct, the parameter tag “Send” is used to enable data transmission. The Send input on the RZ_UDP_Send macro is only pulsed when the Send parameter tag is high (1) and the macro is not already sending a packet (Busy = low (0)). Data is input from the HopIn component labeled MCSignal. System 3 Manual RZ Z-Series Processors 1-63 RZ_UDP_Rec Macro The RZ_UDP_Rec macro is used to receive data packets from across a network to the RZ. All data is organized into packets according to the number of words (specified by the packet size) set in the macro setup properties dialog. The macro outputs a latched multi-channel data stream and status lines. An output labeled “Busy” is used to determine if the macro is currently in the process of receiving a packet. Another output labeled “NewPack” is used to denote that a new packet header has been received. The “Reset” input can be used to reset the macro or halt any data transfer. Receiving Scalar Data Construct When data is received, the NewPack signal will output a logic high (1) for one sample denoting that a packet header has been found. As data is being received, the Busy signal will output logic high (1). The Busy signal will then remain high until the entire packet has been received. The duration of the busy signal is dependent on the number of channels (packet size). If reset goes high (1) at any time, receiving data is halted and the macro will wait until a new header is found. Any data that was received will still be available on the multi-channel output. Note: Since the channels are received serially, all channels are not received at the same time. Data received in later channels occurred several samples before it is available on the Output. In this example, whenever a packet header is detected the Block_Store_MC macro saves the specified packet size as a single block. The Block_Store_MC macro is configured for 16 channels of 32-bit floats. Note: To modify the number of channels received, edit the Packet Size parameter found in the RZ_UDP_Rec macro setup properties. Remember to also edit the number of channels in the Block_Store_MC macro. System 3 Manual 1-64 RZ Z-Series Processors Serial Circuit Design Access to the Serial interface is provided through two RPvdsEx macros: RZ_Serial_Send and RZ_Serial_Rec. Both macros operate on multi-channel data and can be configured to specify the number of channels. This channel count corresponds to the size of the underlying serial stream. RZ_Serial_Rec Macro The RZ_Serial_Rec macro is used to receive serial data from the RS232 connection and can also be triggered to send preset commands over the RS232 connection. The number of channels received by the hardware is set in the web configuration. Make sure the packet size set in the macro is at least as large as the value set in the web configuration, otherwise some channels will have missing or incorrect data. If packet size is larger than the number of channels being sent, any excess channels will simply read 0. RZ_Serial_Send Macro Use the RZ_Serial_Send macro to send more than just the preconfigured commands over RS232. If using both the RZ_Serial_Rec and RZ_Serial_Send in the same circuit you must disable the Commands in the RZ_Serial_Rec macro options. Sending Data Construct Data is sent whenever the “Send” input receives a rising trigger (logic high (1)). The duration of the busy signal is then dependant on the number of channels to send (packet size). Each logic high pulse sent to the send input results in one send packet request. This means that each packet sent results in one sample sent per channel. Note: Since the data packets are sent serially, multi-channel, non-scalar data is not sent at the same time. Each time a packet is sent, the macro sends a single sample from each channel serially. This means that there will be a time shift present in multi-channel, non-scalar data consisting of multiple samples. System 3 Manual RZ Z-Series Processors 1-65 In this construct, the parameter tag “Send” is used to enable data transmission. The Send input on the RZ_UDP_Send macro is only pulsed when the Send parameter tag is high (1) and the macro is not already sending a packet (Busy = low (0)). Data is input from the HopIn component labeled MCSignal. Note: To modify the number of channels sent, (packet size) edit the Packet Size parameter found in the RZ_UDP_Send macro setup properties. Receiving Scalar Data Construct When data is received, the NewPack signal will output a logic high (1) denoting that a packet header has been found. As data is being received, the Busy signal will output a logic high (1) and as soon as the header has been received, NewPack will go low (0). The Busy signal will then remain high until the entire packet has been received. The duration of the busy signal is then dependant on the number of channels to send (packet size). Each high duration of the Busy signal results in one received packet. This means a single packet received results in one sample received per channel. If reset goes high (1) at any time, receiving data is halted and the macro will wait until a new header is found. Any data that was received will still be available on the multi-channel output. Note: Since the data packets are received serially, multi-channel data is not received at the same time on the Output. There will be a time shift in channels two and higher directly proportional to the channel number. In this circuit construct, software triggers are used to send commands to the peripheral device (head tracker). The multi-channel output contains the tracking information and can be further processed and/or stored to the data tank. UDP Test Application In addition to the RPvdsEx macros, the UDP Ethernet interface also provides a software test application which can be used to connect to a specified UDP interface in order to send or receive packets from an RZ multi-processor device. The UDP Test Application was written in MSVC++ to illustrate the portability of the UDP Ethernet interface. The UDP Test Application is installed to: C:\TDT\RPvdsEx\Examples\RZ UDP\. Running the Application Once the application is running, connecting to a UDP interface and sending, or receiving packets from an RZ processor is extremely easy. Packets can be loaded, saved, and edited. Additionally, the packet format can be converted to double or integer format. System 3 Manual 1-66 RZ Z-Series Processors To load an existing packet configuration: 1. Select Open from the File menu. 2. Browse to the desired *.hex file and click the Open button. The specified *.hex file will now display any packet information. To save a packet configuration: 1. Select Save or Save As from the File menu. 2. Type the desired name of the *.hex file and click the Save button. To create a new packet: Double-click anywhere in the packet window to access the Edit Values dialog box. or 1. Right-click the packet window to access the Packet Dialog menu. 2. Select the New Packet option. This prompts the Edit Values dialog box. To edit an existing packet: 1. Select the desired packet and right-click to access the Packet Dialog menu. 2. Select the Edit Packet option. This prompts the Edit Values dialog box. To convert the Test Application packet format: 1. Right-click the packet window to access the Packet Dialog menu. 2. Select Convert To. 3. Select the desired format for the selected packet. Example: Using the Test Application In this example we will send packets from the PC to an RZ through the UDP interface. To establish a connection to the RZ: 1. First, run the Test Application by double-clicking the TestApplication.exe icon. 2. Enter the NetBIOS name or IP address of the RZ processor you wish to send a packet to in the Device Address text box. 3. Click the Check button. A connection is established and the status bar indicates a device has been found. Packets may now be received or sent from this RZ processor. System 3 Manual RZ Z-Series Processors 1-67 To send a data packet to the RZ processor: 1. Double-click anywhere in the Test Application packet window. or Right-click to bring up a selection dialog box and select New Packet. This prompts the Edit Values dialog box. System 3 Manual 1-68 RZ Z-Series Processors 2. Click the Doubles radio button and enter “1234” 3. Click OK. The configured data packet is shown in the Test Application packet window. 4. Click the Send All button to send all data packets to the RZ processor. or Send an individual packet by right-clicking on the desired packet and selecting Send Packet from the Packet Dialog menu. The status bar displays that the packet was sent to the RZ processor. Data packets are received through RPvdsEx using the RZ_UDP_Rec macro. To receive a data packet sent from the RZ processor: 1. System 3 Manual First, run the Test Application by double-clicking the TestApplication.exe icon. RZ Z-Series Processors 1-69 2. Enter the NetBIOS name or IP address of the RZ processor you wish to send a packet to in the Device Address text box. 3. Click the Check button. 4. Click the Receive button. The button changes to Stop in order to notify that it is waiting for a data packet to be sent from the RZ processor. Data packets are sent through RPvdsEx using the RZ_UDP_Send macro. 5. At this time you may configure the circuit to send a data packet from the RZ processor to the Test Application. Once received, the data packet will be displayed in the Test Application packet window. The Source column will display the IP address the data packet was received from while the Data column displays the data packet itself. The Test Application runs separate threads for sending and receiving data so it is possible to listen (wait for a data packet to be received) while sending, connecting to a device, or disconnecting from a device. System 3 Manual 1-70 RZ Z-Series Processors Writing a Custom Software Application The Test Application is designed to be used as a diagnostic tool for the UDP Ethernet Interface. Custom software applications are fully supported for any computer language that supports IP network protocols. Several basic steps are required in order to configure the UDP interface for sending and receiving data packets as illustrated in the following Python code. Here is the basic initialization script; this script must be included to initialize the UDP interface: # import network methods import socket # UDP command constants CMD_SEND_DATA = CMD_GET_VERSION = CMD_SET_REMOTE_IP = CMD_FORGET_REMOTE_IP = 0x00 0x01 0x02 0x03 # enter RZ's IP address or NetBIOS name here: TDT_UDP_HOSTNAME = 'TDT_UDP_0000000 ' # Important: the RZ UDP interface port is fixed at 22022 UDP_PORT = 22022 # create a UDP socket object sock = socket.socket( socket.AF_INET, # Internet socket.SOCK_DGRAM ) # UDP # bind preliminary IP address and port number to the PC sock.bind(("0.0.0.0", UDP_PORT)) # connect the PC to the target UDP interface sock.connect((TDT_UDP_HOSTNAME, UDP_PORT)) # configure the header. Notice that it includes the header # information followed by the command 2 (set remote IP) # and 0 (no data packets for header). packet = struct.pack('4B', 0x55, 0xAA, CMD_SET_REMOTE_IP, 0) # Sends the packet to the UDP interface, setting the remote IP # address of the UDP interface to the host PC sock.send(packet) System 3 Manual RZ Z-Series Processors 1-71 The code above simply sends a command packet to the UDP interface listening Port (22022) and tells it to set the UDP interface remote IP to the host PC IP address. Once this has been done, any data packets sent by the UDP Ethernet interface will go to this IP address. Note: The listening port on the UDP Ethernet interface is 22022 and cannot be changed. Here is the code structure necessary to receive a packet from the UDP interface: while 1: # Receive a data packet from the UDP interface packet = sock.recv(1024) # Process received packet # ... Here is the code structure necessary to send a packet of 16 channels to the UDP interface: # begin sending data NPACKETS = 16 # configure the header. Notice that the command is now 0 # (sending data packets) and the number of packets following is 16 header = struct.pack('4B', 0x55, 0xAA, CMD_SEND_DATA, NPACKETS) count = 0 while 1: # this example uses fake data fakeval = count % 10 data = range(fakeval, NPACKETS + fakeval) # append sixteen 32-bit words to the header # '>' in the format string is used to force big-endian packet = struct.pack(">%di" % len(data), *(i for i in data)) # send the data packet to the UDP interface. print 'sending packet', count, '...' sock.send(header + packet) count += 1 # slow it down for demonstration purposes time.sleep(.2) System 3 Manual 1-72 RZ Z-Series Processors UDP Interface Performance The UDP interface is a 10Mb Ethernet interface, but the usable bandwidth is significantly lower due to limitations of the Ethernet hardware. A graph below displays the expected throughput for different numbers of packets sent or received per second depending on the number of channels transmitted on an RZ processor. The bandwidth for transmitting data from an RZ through the UDP interface decreases depending on the width (or number of channels) of packets sent or received. Transmission of a single packet (single channel) provides a high amount of data resolution since the packets are transmitted at a much higher rate and would respond quickly to abrupt changes in value. Transmitting multiple packets (large number of channels) allows more information to be sent in parallel but reduces data resolution. Relative Performance A typical application might involve sending a packet size of 16 channels 100 times per second or a packet size of 100 channels 10 times per second. As shown in the diagram above, the UDP interface will be able to send a packet size of 16 channels 400 times per second or a packet size of 128 channels 100 times per second. As a result, the UDP performance is relative to the size of the packet, dictated by the number of channels transmitted. System 3 Manual Part 2 Data Streamers System 3 Manual 2-2 Data Streamers ~ System 3 Manual Data Streamers 2-3 RS4 Data Streamer Overview The RS4 Data Streamer is a high performance data storage array designed to store data streamed from the RZ2, our most powerful processor for high channel count data acquisition. Off-loading data streaming tasks from an RZ2 to the RS4 improves real-time performance and allows you to acquire continuous data over several days or weeks. Access to the RS4 storage array can be provided through a network connection, direct connection to a PC, or data transfer to a USB storage device. The RS4 allows streaming of up to 1024 16-bit channels at rates up to ~25 kHz and fewer channels at rates up to ~50 kHz. Streamed data is stored as individual channels and can be stored in different numeric formats (Short, Float, etc.). Stored data can be easily reincorporated into the OpenEx data tank format for post processing. The RS4 is available with either 4 terabytes or 8 terabytes of storage and features 1 or 4 streaming ports. Power and Communication Data is transferred to the RS4 through its streaming ports located on the back panel of the device. A special version of the RZ2 provides matching ports used to connect and stream data to the RS4. These ports ensure fast and reliable data transfer from the RZ2 and are color coded for correct wiring. Communication to the RS4 is provided through a touch screen user interface independent from the TDT system. Firmware updates for the RS4 interface are available online through the TDT web server. See page 2-16 for more information. The RS4 contains an integrated switched-mode power supply. The power supply auto-detects your region’s voltage setting and no further configuration is needed. A switch located on the back panel of the RS4 is used to enable/disable the power supply. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx) on the RZ2 processor through TDT run-time applications such as OpenEx or custom applications. A single RPvdsEx storage macro is provided to configure the RZ2 to send data to the RS4. Once connected to the RZ2, a properly configured RS4 will automatically store the data it receives. See the RZ2 Bioamp Processor section on page 1-3 for more information on the RZ2. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see MultiProcessor Circuit Design and Multi-Channel Circuit Design in the RPvdsEx Manual. System 3 Manual 2-4 Data Streamers Distributing Data to the RS4 The Stream_Server_MC macro is provided for configuring data storage from the RZ2 to the RS4. The macro provides settings for the number of channels, storage format, and decimation factor. See the macro internal help for more information. Note: The macro parameter summary lists important information such as the store name, data format, sample rate, and calculated data rate. The following example illustrates a typical acquisition circuit designed for use with the RS4. In this example, all circuit timing is handled by the CoreSweepControl macro. Acquisition and filtering are provided by the RZ2_Input_MC and HP-LP_Filter_MC macros. As data is input from a PZ amplifier, it is filtered and sent to the RS4 through the Stream_Server_MC macro. It is important that the Stream_Server_MC macro is assigned to the DSP in the RZ that is physically connected to the RS4 (in this case, DSP-8) via fiber optic cables. Recording Sessions When an RZ2 begins streaming data to the RS4, a recording period or session is initiated. A session is defined as any length of continuous streaming data sent to an RS4 streaming port. Each streaming port on the RS4 can initiate a session and sessions may run concurrently. When data is System 3 Manual Data Streamers 2-5 no longer streaming to the port or if streaming has been paused for longer than 1 second, the session is concluded and a new session will begin when a new data stream is presented. Important!: When recording data in OpenEx’s Preview mode, ensure that you place the hardware into Idle mode prior to switching to Record mode. Switching directly from Preview to Record mode will NOT terminate the data session. Failure to do this will cause any data recorded in Preview mode to be prepended to the data obtained in Record mode. Data Transfer Rate The maximum data rate for each RS4 streaming port is 12.5 MB/s. This equates to streaming 256 16-bit channels at a sampling rate of ~25 kHz per streaming port. With four ports available, up to 1024 channels can be streamed to the RS4. Note: When recording data it is important to compare the data rate calculated by the macro to the actual data rate reported by the RS4. If the reported data rate in the RS4 is not similar to the calculated data rate in the macro, this may indicate a hardware problem. If so, contact TDT. File System Check Occasionally the RS4 will perform a file system check during the boot process. This is to ensure the integrity of the storage array and file system. You can view the progress of the file system check in the Status tab (see Progress Bar, page 2-15 for more information) of the RS4 interface. Note: The more files present on the storage array, the longer the file system check will take. Hardware Requirements Basic requirements include an RS4, RZ2 equipped with at least one streaming port, and one fiber optic cable for connection between the RS4 and RZ2. Optional requirements for accessing data on the RS4 include a PC equipped with an Ethernet port or an Ethernet jack connected to a local area network, and an Ethernet cable. Setting-Up Your Hardware Basic setup for the RS4 Data Streamer includes connection to one or more RZ2 Bioamp Processors. Optionally, an Ethernet connection for direct connection to a PC or network is supported. Connect the RZ2 as illustrated in the following diagram. Important!: Make sure that all cables are connected before powering on the RS4. RS4 to RZ2 Connection Diagram System 3 Manual 2-6 Data Streamers In the diagram above, a single RZ2 provides one streaming input to the RS4. Additional RZ2 devices can be connected to the same RS4 provided it has vacant streaming ports (B, C, or D) available. The RZ2 is also connected to a preamplifier and PC (see the RZ2 section on page 1-3 for specific information).The fiber optic cables are color coded to prevent wiring errors. RS4 PC and Network Connection Diagram The diagram above illustrates possible connections from the RS4 to a PC (1) or network (2). Connect the Ethernet cable to the RS4 port labeled Network. Configuring the RS4 Default configuration settings allow the RS4 to begin streaming data immediately. The RS4 supports the DHCP (Dynamic Host Configuration) protocol for automatic configuration of network parameters. Once connected to an active network, the RS4 will attempt to lease an IP address. The DHCP Protocol DCHP or “Dynamic Host Configuration Protocol” is a protocol used by networked devices (clients) to obtain various parameters necessary for the clients to operate in an IP (Internet Protocol) network. By using this protocol, system administration workload greatly decreases, and devices can be added to the network with minimal or no manual configuration. DHCP automates the assignment of IP addresses, subnet masks, default gateway, and other IP parameters. Three modes for allocating IP addresses exist: Dynamic, Reserved, and Manual. The RS4 relies on Dynamic mode for its IP configuration. If no DHCP server responds, the device falls back on Manual mode with the following static IP configuration: IP Address: 10.1.0.42 Netmask: 255.255.255.0 Dynamic mode In dynamic mode a client is provided with a temporary IP address for a given length of time. The duration is dependant on the server configuration and may range from several hours to months. System 3 Manual Data Streamers 2-7 The RS4 will automatically renew the current IP address as needed. This renewal is used by properly functioning clients to maintain the same IP address throughout their connection to a network. Accessing the RS4 Storage Array There are two methods provided for accessing the RS4 storage array: Directly connecting to a PC Connection to a local area network Direct Connection to a PC Direct connection to a PC allows data on the RS4 to be viewed and modified through the standard Microsoft Windows file sharing protocol. Using Windows 7 To access the RS4 file system through a PC, running Windows 7: 1. You will have to configure the PC TCP/IP settings. Open Control Panel then doubleclick Network and Sharing Center. 2. Click the desired connection link (this is usually a Local Area Connection). 3. In the status dialog, click the Properties button. 4. In the item list, select Internet Protocol (TCP/IP) or if there are multiples, select Internet Protocol (TCP/IPv4). 5. Click the Properties button. 6. Select Use the following IP address and enter these values: IP address: Subnet mask: Default gateway: 10.1.0.x, where x can be any value from 1 to 254 except 42 255.255.255.0 Leave empty 7. Click OK. The RS4 can now be accessed by the PC. 8. Obtain the RS4 device address. System 3 Manual 2-8 Data Streamers 9. a. Press the Ports tab on the RS4 interface. b. The device address is displayed at the top of the page to the right of Device Name field. Enter the device address as shown in a windows address bar to access the RS4 file system. The path RS4-#XXXX\data is used to access the RS4 storage array. Where # is the total number of streaming ports on the RS4 back panel, XXXX is the device serial number while the data folder contains the data saved to the storage array. 10. Access the files on the RS4 by reading or writing. Warning!: Do not attempt to write to the RS4 storage array at any time while data is actively streaming. Doing so may corrupt data currently being stored. Using Windows XP To access the RS4 file system through a PC: 11. You will have to configure the PC TCP/IP settings. Open Control Panel then doubleclick Network Connections. 12. Right-click the desired connection (this is usually a Local Area Connection) and select Properties. 13. Select Internet Protocol (TCP/IP) or if there are multiples, select Internet Protocol (TCP/IPv4). 14. Click the Properties button. 15. Select Use the following IP address and enter these values: IP address: Subnet mask: Default gateway: System 3 Manual 10.1.0.x, where x can be any value from 1 to 254 except 42. 255.255.255.0 Leave empty Data Streamers 2-9 16. Click OK. The RS4 can now be accessed by the PC. 17. Obtain the RS4 device address. Press the Ports tab on the RS4 interface. The device address is displayed at the top of the page to the right of Device Name field. 18. Enter the device address as shown in a windows address bar to access the RS4 file system. The path RS4-#XXXX\data is used to access the RS4 storage array. Where # is the total number of streaming ports on the RS4 back panel, XXXX is the device serial number while the data folder contains the data saved to the storage array. 19. Access the files on the RS4 by reading or writing. Warning!: Do not attempt to write to the RS4 storage array at any time while data is actively streaming. Doing so may corrupt data currently being stored. Connecting Through a Network Connection to a local area network also allows data to be viewed and modified through the standard Microsoft Windows file sharing protocol from any PC connected to the same network as the RS4. System 3 Manual 2-10 Data Streamers To access the RS4 file system through a network: DHCP must be enabled on the network in order to access the RS4. If DCHP is disabled or not supported, you can connect the RS4 directly to a PC (see page 2-7 for more information). 1. Obtain the RS4 device address. 2. Press the Ports tab on the RS4 interface. The device address is displayed at the top of the page to the right of Device Name field. 3. Enter the device address in a windows address bar to access the RS4 file system. 4. Access the files on the RS4 by reading or writing. Warning!: Do not attempt to write to the RS4 storage array at any time while data is actively streaming. Doing so may corrupt data currently being stored. Moving Stored Data to a Data Tank Data stored on the RS4 can be easily reincorporated into the OpenEx DataTank format for post processing. RS4 Storage Format The RS4 stores data in a format similar to the OpenEx DataTank format. Data stored on the RS4: Contain an *.sev file for each channel recorded in the stream. Do not contain other Data Tank file types (.tbk, .tdx, .tev, .tsq). Stores all of the channel data files in a single Data Tank folder. These features allow single and multi-channel data to be copied and pasted directly into any OpenEx Data Tank folder. Naming Convention When connected to an active network, TDT’s OpenEx software sends information to the RS4 via a broadcast UDP packet allowing it to properly name the streaming data sent to the RS4. For example, if you are recording channel 1 for the event wavA on Block-3 from DemoTank2 the RS4 will store in the following location and format: \data\DemoTank2\Block-3\DemoTank-Block-3_wavA_ch1.sev Without the OpenEx network information the RS4 falls back to the default data format: \data\Event name-year-month-day-hour-minute-second\unnamed.sev Note: The default format is also used if phantom storage is disabled in the Stream_Server_MC macro. See the macro internal help for more information. To move blocks to a Data Tank: 1. System 3 Manual Access the RS4 file system on the local PC using the process described above. Data Streamers 2-11 2. Select the desired Data Tank. 3. Copy the selected Data Tank to the local PC Data Tank. 4. If the Data Tanks share the same name, select Yes to All when asked to confirm possible overwrites. This will NOT overwrite data currently stored on the local drive since only the *.sev files are copied. 5. If you wish to move only a single block, copy the desired block and place it into the local PC Data Tank folder. To move individual channels to a Data Tank: 1. Access the RS4 file system on the local PC using the process described above. 2. Copy and paste the desired file(s) to the local PC Data Tank folder. 3. Open the Data Tank you wish to move the data to by browsing to the block folder in the Data Tank folder on the local PC. System 3 Manual 2-12 Data Streamers 4. Copy and paste the desired data from the RS4 to the local PC. Note: Data sets containing a large number of channels, or long recording periods may take longer to display and process on the RS4 and will also lengthen the amount of time for file system checks. TDT recommends removing data that is no longer needed on the RS4 (see Storage on page 2-13 for more information on deleting data). After moving, the data can be processed using one of TDT’s Data Tank applications (such as OpenExplorer). To access the data using these applications simply select the associated block then select the event name (in this case Block-1 and wavA). RS4 Features Power Button A power button located on the front plate of the RS4 is used to turn the device on and off. Prior to powering on/off, the device will enter a brief boot/shutdown period. Important!: Always power the RS4 down during an Idle state. Idle status can be checked in the Ports tab. Failure to power down during Idle status may result in the RS4 performing a file system check during the next boot process and possible data loss. To turn off the RS4: 1. Ensure that the RS4 is in the Idle state prior to shutdown. To do this, press the Ports tab and verify that the current session name is Idle on all data ports. 2. Press the power button on the front panel. Note: If the RS4 becomes unresponsive and fails to shutdown normally, you can shut the device down by holding the power button for longer than five seconds. This will force the device to shutdown. After a forced shutdown, the RS4 may perform a file system check. LCD Touch Screen The LCD touch screen allows navigation through the RS4 interface. To make a selection, gently press the touch screen on the desired item. Standard click and drag options for the storage array are also supported in order to select multiple file system objects. To click and drag, gently press your finger on the start location then slide down the screen until the desired items are selected. Interface The interface reports information and allows configuration of available options. A selection tab located on the right-side of the screen allows the user to select between the available pages. To navigate to the desired window, press the corresponding tab on the right side of the LCD screen. System 3 Manual Data Streamers 2-13 Ports The Ports tab provides information for storage array streams, local storage rates, and storage size. Note: Keep in mind that the total available storage is based on the amount of free memory space after system allocation. For example, although the system specifications list 8 terabytes of storage space, 7.2 terabytes are actually available for data storage. Firmware Version: The currently installed firmware version number is displayed to the left of the local storage label on the Ports tab. This is useful for identifying the current firmware version and also to verify that a recent firmware update has been installed. Device Name: Displays the assigned device name. Port A, B, C, D: Displays port information regarding the currently installed storage array. Rate: Displays the approximate current data transfer rate in kB/s. This rate incorporates overheads in the data transfer protocol and may differ slightly from the data rate calculated by the macro. Amount Saved: Displays the amount of data saved to the storage array during the current recording session. Name: Displays the current session name. See Naming Convention page 2-10 for more information. Local Storage: This area displays information relative to the currently installed array. Array Size - Status: Displays the status of the storage array. nTB - Active: Array is properly configured and its maximum storage space (nTB) is listed. Not Ready: No array is detected or the array is not yet ready (see Progress Bar, page 215 for more information) Percent Full: Displays the percentage of space that has been used on the storage array. Will fill in approximately: Displays an estimate of how much time it will take to fill the storage array with data based on the data rates for the current session(s). Storage The Storage tab provides a list of file system objects stored on the currently installed storage array. Items may be selected and deleted or moved and copied to a USB device. Status information for any connected USB Storage devices is displayed. System 3 Manual 2-14 Data Streamers Local Storage: Data items stored on the RS4 storage array are populated in the local storage list. Multiple items may be selected using press and drag techniques. Select All: Press to select all items in the list. Deselect All: Press to deselect all items in the list. USB Storage A, B: Displays connection information for USB devices detected on USB ports A and B. Select item(s) from the local storage list and press the desired USB Storage connection indicator to prompt the copy dialog. From this dialog you may: Copy: Press to copy the selected item(s) to the desired USB Storage device. Copied items remain on the storage array. Move: Press to move the selected item(s) to the desired USB storage device. Moved items are copied onto the USB storage device and deleted from the storage array. Cancel: Press to cancel the current USB data transfer. Note: When moving or copying items the RS4 interface may become temporarily unresponsive. Trash: Select item(s) from the local storage list and press the Trash icon to permanently delete them. A dialog will prompt asking to confirm the deletion of the item(s). Status The Status tab provides system information such as processor usage rates, core temperatures, fan speeds, device IP address, array reformat progress, memory buffer allocation, and communication errors. Log information can also be retrieved from this tab. System 3 Manual Data Streamers 2-15 System: Displays important system status information. Processor Usage: Displays the current percent usage for each processor core. Core Temperatures (F): Displays the current processor core temperatures measured in Fahrenheit. Fan Speeds (RPM): Displays the approximate rpm for all three fans located inside of the RS4. Current IP: Displays the currently assigned IP address for the RS4. Storage Array: Displays information about the state of the current storage array. Active and mounted: Storage array is available and ready to store data. Active and not mounted: A support storage array is available but is not configured to store data. Array was not found!: The system did not detect a supported storage array. Process bar: Displays progress for various processes which run on the RS4 including: Reformatting: When reformatting a storage array, the progress completed (%) as well as the estimated amount of time remaining is displayed. Resyncing: If a mirrored array type has been formatted, the progress completed (%) as well as the estimated amount of time remaining for the Resync process is displayed. See Mirrored page 2-17 for more information. File System Check: If the RS4 is performing a file system check, the progress completed (%) and estimated amount of time remaining is displayed. During this time the status array will not be ready. Check button: When the storage array is in mirrored configuration, disk check button appears at the bottom left corner. Pressing the Check button begins a disk check to see if the data on both images are identical. This process can take several hours. A progress bar and an estimated time to completion are displayed. During this time the Ports tab will report that the array status is "Checking". No data access should occur during checking. The button will stay depressed for the duration of the disk check. You can stop the disk check at any time by pressing the Check button again. TDT recommends performing a disk check on a mirrored configuration every 7-30 days. Data Ports: Displays storage information for all installed memory buffers and any communication errors present. Memory Buffers (U/F/A): Displays the number of memory buffers currently used, free, and allocated. Communication Errors: Displays the current count of communication errors between the RS4 and interfaced RZ2s. This value should be zero. If not, the current data session may not contain valid data. If the count increases continuously at a high rate (>1500 errors per second), the RZ connected to that port might not be synchronized to the PCI card. Check the fiber optic connection from the RZ device to the PCI card and use zBusMon to confirm RZ to PC communication. Clear Error Count: Press to clear all communication errors currently listed. View Log Window: A log stores relevant messages and any communication errors encountered while the RS4 is in use. Click to open and view the log window. The log.txt file can be copied from the storage array for transfer to a PC. System 3 Manual 2-16 Data Streamers Note: Individual comments can be saved as well. Use standard drag techniques to highlight the desired comment(s) and click Save to write the selection to the log.txt file. Config The Config tab provides options for reformatting the currently installed storage array, updating the RS4 firmware, and rebooting the system. Data Streams: Not currently implemented. Current Drive Configuration: Displays information about the currently installed data drives. Number of Drives: Displays the number of drives currently installed and optionally their corresponding array usage. Array Type: Displays the currently configured array type and the status of the drives. Striped: Array type is currently configured as striped. Mirrored(UUUU): Array type is currently configured as mirrored. A U indicates that a drive is up and running. A _ indicates a drive failure. Missing: No array type is detected. See page 2-21 for more information. Array Status: Displays the current status of the array. Preparing: Storage array is currently being reformatted. Resyncing: Storage array is being reformatted as a mirrored array and is currently resyncing the mirrored partitions. See Mirrored below for more information. N/A: Storage array is not detected. Active: Storage array is detected and configured. System 3 Manual Data Streamers 2-17 Reformat Array: Click to prompt the reformat array dialog. This dialog will ask for confirmation as well as the desired array type: Striped or Mirrored. Reformatting an array will erase all data contained in the array. Note: When reformatting an array, the interface may become temporarily unresponsive. Miscellaneous Tasks: Provides options for updating the current RS4 firmware and rebooting the system. Update Firmware: Click to update the RS4 firmware. Firmware is downloaded from the TDT server and automatically installed on the RS4. Connection to a DHCP enabled network that has internet connectivity is required to retrieve any updates. Important!: TDT recommends updating the firmware only when absolutely necessary (critical updates and if the system experiences compatibility issues). In most cases if a problem is encountered, contact TDT. Reboot System: Click to reboot the system. Storage Array Types Two RAID based array types are supported on the RS4, Striped and Mirrored. When reformatting the storage array, either type may be selected for the new format. Each type has advantages and disadvantages and is suited for particular situations. Striped Striped array types offer quick reformatting (several minutes), efficient data storage, and performs streaming tasks at the maximum transfer rate. This type does NOT protect against data drive failures and loss of a data drive will result in loss of data. Since the data is not backed-up as is the case in mirrored arrays, striped storage arrays offer twice the amount of storage space that mirrored arrays provide. This format is useful for those who wish to stream large amounts of data and are using an external solution to provide data recovery in the event of drive failure. Mirrored Mirrored array types offer data loss prevention at the cost of some transfer rate limitations and reduced storage space. Unlike striped array types, data drives are mirrored and data is backed-up. This results in longer write times and also a much longer reformatting period (hours). This format is useful for those who are streaming smaller amounts of data and are concerned with data loss prevention. Mirrored arrays will prevent data loss if any single drive fails. RS4 devices that contain four data drives, in some cases, are protected if two of the four data drives fail. The storage capacity, however, is cut in half. A resyncing status is displayed while reformatting a mirrored array. This status is unique to the mirrored array type and is verification for the mirrored partitions of the array. One partition is read while another partition is simultaneously written to. This ensures that mirrored partitions are in sync to provide data loss prevention. Prior to completion of the resyncing process, data loss prevention is disabled. Note: If the resyncing process is interrupted by a loss of power or shutdown of the system, it will resume to where it left off prior to the interruption. To reformat the RS4 storage array: 1. Press the Config tab on the RS4 interface. 2. Press the Reformat Array button. 3. Press the desired array type or press Cancel to exit. System 3 Manual 2-18 Data Streamers USB Ports Two USB 2.0 ports are provided for small/slower data transfers (typically less than several GB of data) or for access to the storage array when no network or PC is available. The ports support connections at any time while the device is powered. When supported USB media is detected, the interface will display only the total space existing on the media as a reference. It does NOT display available space on the media. Note: TDT recommends that you do not attempt to copy or move files using the USB ports while a recording session is active. Device Status LEDs The device status LEDs report streaming or network activity. The following tables display the status LED indicators. Video Not currently implemented. Network Status Information Off No network traffic detected. Lit Network traffic is present and detected on the RS4. Status Information Off No storage access to the RS4 is detected. Lit Storage access to the RS4 is in progress Storage Ethernet Ports Two Ethernet ports are provided on the back panel, Video and Network. Video Port Not currently implemented. Network Port The Network port allows connections to either a PC or local area network via a standard Ethernet cable. The RS4 supports automatic DHCP protocol, see page 2-6 for more information. Troubleshooting The following section provides examples and solutions to some of the errors that could be encountered while using the RS4 Data Streamer. Device Will Not Power Up Check the position of the power supply switch. If set to the “O” position the power supply is disabled. To enable, simply ensure that the switch is in the “1” position and attempt to power on System 3 Manual Data Streamers 2-19 the RS4. If the device does not power up after verifying that the power supply is enabled contact TDT. Can’t Access the RS4 Storage Array Check the Ethernet cable connection to ensure that the RS4 is connected to a network or PC using the Network Ethernet port located on the back panel of the RS4. If the Ethernet cable is connected to the Video Ethernet port, network traffic will cause the Video status LED to light up. See Setting-Up Your Hardware on page 2-5 for connection diagrams. If you are attempting to access the RS4 through a network, ensure that the server supports DHCP. If not, the RS4 will default to its static IP address (10.1.0.42). If you encounter this issue, see page 2-7 for information on how to access the RS4 using a direct connection to a PC. RS4 Interface Becomes Slow or Unresponsive Researchers who use the OpenEx preview mode extensively may find the interface to behave sluggishly. The RS4 does not throw out data recorded while in preview mode. Data recorded in preview mode is stored as unnamed data on the RS4 and is readily distinguishable from legitimate data recorded during an actual experiment. TDT recommends removing unnecessary data remaining on the storage array. RS4 Is Not Correctly Naming Data When connected to an active network, TDT’s OpenEx software sends information to the RS4 via a broadcast UDP packet allowing it to properly name the streaming data sent to the RS4. If the RS4 is powered on before connecting the necessary network cables it may default to the basic naming format: \data\Event name-year-month-day-hour-minute-second\unnamed.sev Power off the RS4, connect all the necessary cables then power the RS4 back on. Port Tab Errors Below is an example of errors that can be encountered on the Port tab. Ports that are not currently installed will be displayed in grayed out text. In most cases it is normal to see 3 of the 4 Streams disabled (since RS4 devices come installed with 1 or 4 data ports). Hardware failures can cause all ports to be grayed out. If you encounter this issue, contact TDT. System 3 Manual 2-20 Data Streamers Array status messages will determine whether or not a storage array is currently installed properly. If the NOT READY status is displayed, the storage array may require reformatting (Check the Status tab for more details). See Storage Array Types on page 2-17 for information on reformatting. Status Tab Errors Temperature sensor failures will be displayed as ???.?? in the Status tab. If you encounter this issue, contact TDT. Typical fan speed rates should be 1500 RPM and 3500 RPM under heavy processing loads. Fan failures will be displayed as ????? in the Status tab. If you encounter this issue, contact TDT. Unformatted storage arrays will cause an Array not found status to be displayed. This may also be caused by disk drive failures within the RS4. You may attempt to reformat the storage array. See Storage Array Types on page 2-17 for information on reformatting. If reformatting is not desired, contact TDT. Communication errors are compiled per recording session for currently installed streaming ports and will indicate if a streaming port had a communication failure at some point during the session. Data recorded during the session may be invalid. Communication errors may result from wiring errors between the RZ2 and RS4. Cycling power on the RZ2(s) may fix the issue. Refer to the diagram on page 2-5 for a proper wiring example. If the wiring is correct this may indicate a bad fiber optic cable that will need to be replaced. System 3 Manual Data Streamers 2-21 Config Tab Errors Drive configuration errors may occur if the RS4 is unable to detect a properly formatted storage array. You may attempt to reformat the storage array. See Storage Array Types on page 2-17 for information on reformatting. If reformatting is not desired, contact TDT. Note: If using a mirrored array type, drive failures will be displayed using an underscore. For Example, if drives 1 and 2 fail the Array Type will read: Array Type: Mirrored (_ _UU) Data in these scenarios are most likely recoverable. If you encounter this issue contact TDT. You may attempt to recover the data by accessing the RS4 file system to move the data to a local PC prior to reformatting the array. Technical Specifications Specifications for the RS4 Data Streamer. Processing Cores 4 Storage Array Size 4 Terabytes or 8 Terabytes Streaming Ports Number of Ports 1 or 4 Port Speed 12.5 MB/sec (per port) System 3 Manual 2-22 Data Streamers PO8e Interface for the RZ Overview The RZ PO8e interface is an optional interface for RZ processor devices and is designed to transfer high channel-count data to a PCI Express card interface (PO8e) for real-time processing in custom applications. The PO8e card can be in the same computer as the TDT system, or in a dedicated computer. The RZ connects to the PO8e card via a special DSP (RZDSP-U). This DSP has an interface located on the back panel of the RZ processor and connects to the PO8e via orange fiber optic cables provided with the system. Data streamed through the PO8e is buffered at several points while the system copies it from the RZ to PC memory. When data is generated on the RZ unit and fed into the Stream_Remote_MC macro, this data is placed in a 10000 sample (per channel) FIFO buffer on the RZ processor. Data from this FIFO is transferred over the fiber optic link to the PO8e PCI Express card. A shared library is provided (PO8eStreaming) along with a C/C++ interface for writing custom applications to collect data from the PO8e card in real-time. In the PO8eStreaming library a dedicated software thread actively attempts to read from the PCI Express card and places the transferred data into a RAM buffer. This structure allows the application program to query the API when convenient and read data in larger blocks. The RAM buffer is limited only by available memory, though the programmer should consume the data as soon as possible since this interface can transfer at rates up to 6 MB/second on Windows and up to 12 MB/second on Linux-based computers. Installation The PO8e toolset is provided with the TDT driver installation. Once installed, the circuit macro needed to send data from the RZ will be located in the following path: C:\TDT\RPvdsEx\Macros\Device\PO8e_Streamer\ The PO8eStreaming libraries and examples can be found in C:\TDT\PO8e System 3 Manual Data Streamers 2-23 Hardware Requirements Basic requirements include a paired fiber optic cable, an RZ processor equipped with the RZDSPU card. The PO8e requires a Windows or Linux computer with a PCI Express slot. Setting-Up Your Hardware In order to setup the RZ PO8e interface, connect the fiber optic cable from the RZ back panel to the PO8e card installed in the computer. The PO8e can be installed in the same computer as the PO5/e card or in a separate computer. For more information on setting up or configuring the RZ processor see the System 3 Installation Guide. The diagram above illustrates the possible PO8e connections from the RZ processor to the TDT PC (1) or to a separate PC (2). PO8e Circuit Design Access to the PO8e interface is provided through the RPvdsEx macros named Stream_Remote_MC. This macro operates on multi-channel data and can be configured to specify the number of channels and data type. Stream_Remote_MC Macro The Stream_Remote_MC macro is used to send data from the RZ to the PO8e card. All data is organized into packets according to the number of words (specified by the packet size) set in the macro setup properties dialog. The macro accepts a multi-channel data stream as well as a logic input that tells the macro to send out a packet. System 3 Manual 2-24 Data Streamers Sending Data Construct Data is sent whenever the “Send” input receives a rising trigger (logic high (1)). Up to 256 channels can be sent on each Send signal. This occurs in one sample period. If the number of channels is greater than 256, data is sent in blocks and grouped together on the PO8e card’s buffer. In this circuit, 256 channels of data in Short format are sent to the PO8e card every fourth sample. The CoreSweepControl macro is required in any circuit using the Stream_Remote_MC macro. The Stream_Remote_MC macro must be placed on the special DSP that is physically connected to the PO8e card (DSP #7 in this case). Note: To modify the number of channels sent and format, edit the parameters found in the Stream_Remote_MC macro setup properties. About PO8e Streaming PO8eStreaming is a library of methods for accessing data on one or several PO8e interfaces through a custom Windows or Linux application. Both C and C++ interfaces are provided to this library. The C interface creates a pointer to a connected card, and then that pointer is passed to each subsequent function. Users should be mindful of using good 'closed loop' access when working with PO8eStreaming. This means always releasing any open connections to PO8e cards. A typical PO8e access session for a client consists of five main steps: 1. Run the circuit on the RZ device that streams to the PO8e card. 2. Call connectToCard to get a pointer to an available PO8e card. 3. Call startCollecting to begin reading from PO8e card. 4. Perform any number of buffer operations. 5. Call releaseCard to release the card object from memory. System 3 Manual Data Streamers 2-25 Organization of PO8e Streaming Methods PO8eStreaming methods can be divided into three basic groups: Setup and Control -- The methods in this group are used to setup access to any PO8e card(s) in the system. Hardware Data Access -- The methods in this group are used to read data from PO8e card(s). Hardware Information Retrieval -- The methods in this group are used to access information pertaining to current data stream, including number of channels and sample size in bytes. Setup and Control PO8e cardCount Description: cardCount returns the number of PO8e cards detected in the system. Call this first to determine the possible values for the “index” passed to the constructor. C++ prototype: static int cardCount(); C prototype: int cardCount(); Returns: The number of PO8e cards in the system. Sample Code C++ int totalCards = PO8e::cardCount(); C int totalCards = cardCount(); connectToCard Description: Returns a pointer to the specified card index. Note that the index will be consistent across system boots and is dependent on the PCIe bus layout, so if you move the cards between slots their respective indices can change. C++ prototype: static PO8e* connectToCard(unsigned int cardIndex = 0); C prototype: void* connectToCard(unsigned int cardIndex = 0); Arguments: cardIndex Returns: Pointer to PO8e instance. Sample Code This code sample creates a PO8e object pointing to the first card identified in the system. C++ PO8e *card = PO8e::connectToCard(0); C void *card = connectToCard(0); Specify the target card by index. releaseCard Description: Free the PO8e card objects through this interface. It is done this way to ensure that in Windows the objects are freed from the correct heap context. C++ prototype: static void releaseCard(PO8e *card); C prototype: void releaseCard(void* card); Arguments: card Pointer to PO8e object. System 3 Manual 2-26 Data Streamers Sample Code This code sample releases the card object memory. C++ PO8e::releaseCard(card) C releaseCard(card) Hardware Data Access PO8e startCollecting Description: Call this to start collecting a data stream from the PO8e card. Collected data will be buffered as needed. C++ prototype: bool startCollecting(bool detectStops = true); C prototype: bool startCollecting(void* card, bool detectStops = true); Arguments: detectStops Tell the PO8e to detect when the stream from the RZ is stopped. Returns: pointer Pointer to PO8e instance. Sample Code Description: This code sample tells an existing PO8e object to begin collecting data. C++ card->startCollecting(true); C startCollecting(card, true); stopCollecting Description: Call this to stop collecting a data stream from the PO8e card. C++ prototype: void stopCollecting(); C prototype: void stopCollecting(void* card); Sample Code Description: This code sample stops data collection on a PO8e object. C++ card->stopCollecting(); C stopCollecting(card); waitForDataReady Description: This function provides a means to efficiently wait for data to arrive from the RZ unit. C++ prototype: size_t waitForDataReady(int timeout = 0xFFFFFFFF); C prototype: int waitForDataReady(void* card, int timeout = 0xFFFFFFFF); Arguments: int timeout Maximum duration (in ms) to wait for streaming to begin. Sample Code Description: This code sample blocks execution until buffered data is ready on the card. C++ card->waitForDataReady(); C waitForDataReady(card); System 3 Manual Data Streamers 2-27 samplesReady Description: Returns the number of samples (per channel) that are currently buffered. C++ prototype: size_t samplesReady(bool *stopped = 0); C prototype: int samplesReady(void* card, bool *stopped = 0); Arguments: bool pointer stopped The value pointed to will be set to true if the underlying mechanisms detect that data has stopped flowing. Sample Code Description: This code returns the number of samples (per channel) currently buffered on the card and detects if streaming has stopped. C++ bool stopped; size_t numSamples = card->samplesReady(&stopped); if (stopped) PO8e::releaseCard(card); C bool stopped; int numSamples = samplesReady(card, &stopped); if (stopped) releaseCard(card); readChannel Description: Copy the data buffered for an individual channel. Note that this call does NOT advance the data pointer. Use calls to flushBufferedData to discard the data copied using this function. The user is responsible for ensuring that the buffer is large enough to hold nSamples * dataSampleSize() bytes. C++ prototype: int readChannel(int chanIndex, void *buffer, int nSamples); C prototype: int readChannel(void* card, int chanIndex, void *buffer, int nSamples); Arguments: int chanIndex The channel to read data from. void pointer buffer The location to write buffered data to. int nSamples The number of samples to read. Returns: int Number of samples that were read. Sample Code Description: This code sample reads 1 sample from channel 2 and stores it in buff. C++ short buff[8192]; card->readChannel(2, buff, 1); C short buff[8192]; readChannel(card, 2, buff, 1); System 3 Manual 2-28 Data Streamers readBlock Description: Copy the data buffered for all channels. Note that this call does NOT advance the data pointer. Use calls to flushBufferedData to discard the data copied using this function. The data will be grouped by channel and the number of samples returned applies to all channels. The user is responsible for ensuring that the buffer is large enough to hold nSamples * numChannels() * dataSampleSize() bytes. C++ prototype: int readBlock(void *buffer, int nSamples); C prototype: int readBlock(void* card, void *buffer, int nSamples); Arguments: void pointer buffer The location to write buffered data to. int nSamples The number of samples to read. Returns: int Number of samples that were read. Sample Code Description: This code sample reads 1 sample from all channels, stores it in a buffer and flushes that data from the card. C++ short buff[1024]; card->readBlock(buff, 1); card->flushBufferedData(1); C short buff[1024]; readBlock(card, buff, 1); flushBufferedData(card, 1); flushBufferedData Description: Releases samples from each buffered channel. C++ prototype: void flushBufferedData(int numSamples = -1, bool freeBuffers = false); C prototype: void flushBufferedData(void* card, int numSamples = 1, bool freeBuffers = false); Arguments: int numSamples Number of samples to release. Passing -1 releases all buffered samples. bool freeBuffers Controls the optional freeing of the underlying data buffers. Sample Code Description: This code sample flushes one sample from all channels. C++ card->flushBufferedData(1); C flushBufferedData(card, 1); System 3 Manual Data Streamers 2-29 Hardware Information Retrieval numChannels Description: Counts the number of channels in the current stream. This value is set in the Stream_Remote_MC macro. Changing the number of channels mid-stream triggers an error condition. C++ prototype: int numChannels(); C prototype: int numChannels(void* card); Returns: int Number of channels in the current data stream. Sample Code Description: This code determines how many channels are in the current stream. C++ int nChannels = card->numChannels(); C int nChannels = numChannels(card); numBlocks Description: Counts the number of blocks that the current stream is divided into. This value is set in the Stream_Remote_MC macro. Each block will contain the same number of channels, so dividing the value from numChannels() by this value will leave no remainder. Changing the number of blocks mid-stream triggers an error condition. C++ prototype: int numBlocks(); C prototype: int numBlocks(void* card); Returns: int Number of blocks the current data stream is divided into. Sample Code Description: This code determines how many blocks are in the current stream. C++ int nBlocks = card->numBlocks(); C int nBlocks = numBlocks(card); dataSampleSize Description: Returns the size in bytes of each data sample (per channel). This value is set in the Stream_Remote_MC macro. Changing the data type during a stream triggers an error condition. C++ prototype: int dataSampleSize(); C prototype: int dataSampleSize(void* card); Returns: int Size of each data sample in bytes. Sample Code Description: This code determines how many bytes are in each sample. C++ int size = card->dataSampleSize(); C int size = dataSampleSize(card); System 3 Manual 2-30 Data Streamers getLastError Description: This returns the most recent error. C++ prototype: int getLastError(); C prototype: int getLastError(void* card); Returns: int The most recent error code. Sample Code Description: This code determines how many channels are in the current stream. C++ int nChannels = card->getLastError(); C int nChannels = getLastError(card); Examples The example files below are installed with the TDT drivers package. Files: C:\TDT\RPvdsEx\Examples\PO8e.rcx, PO8eTest.cpp, PO8e.h Hardware: RZ2/RZ5/RZ6 Real-Time Processor Overview: Streams 256 channels of floats to the PO8e card at 6.1kHz. System 3 Manual Part 3 RX Processors System 3 Manual 3-2 RX Processors ~ System 3 Manual RX Processors 3-3 RX5 Pentusa Base Station Overview The RX5 Pentusa is a powerful multiple DSP device well suited for processing high channel count neurophysiology data in real-time. A streamlined hardware interface provides connections to up to 64 channels for neurophysiological data acquisition. The RX5 is equipped with either two or five 100 MHz, 1600 MFLOPS Sharc DSPs and serves as a base station for up to four Medusa preamplifiers to form a powerful multi-channel amplifier system. The multiprocessor architecture provides simultaneous ~25 kHz sampling on every channel, 16-bit precision, fiber optic isolation, and the power of user-programmable real-time DSPs. The RX5 also features front panel status indicators, 40 bits of configurable digital I/O, and four D/A converters for versatile experiment control and stimulus generation. Power and Communication The RX5 mounts in a System 3 zBus Powered Device Chassis (ZB1PS) and communicates with the PC using the Gigabit (PI5/FI5) or Optibit (PO5/FO5) PC interfaces. The ZB1PS is UL compliant, see the ZB1PS Operations Manual for power and safety information. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see the RPvdsEx Manual. RX Architecture Each RX multiprocessor device is equipped with either two or five digital signal processors (DSPs). The multi-DSP architecture allows processing tasks to be distributed across multiple processors and enables data to be transferred to the PC quickly and efficiently. The DSPs include one master and one or four auxiliary DSP(s). 128 MB SDRAM of system memory is shared by all DSPs. When designing circuits the maximum number of components for each RX DSP is 256. Each DSP communicates with an internal bus to send and receive information from the I/O controller and the shared memory. The master DSP supervises overall system boot up and operation. The master DSP also acts as the main data interface between the zBus (host PC) and the multi-DSP environment. System 3 Manual 3-4 RX Processors Because the zBus communicates only with the master processor, these devices operate most efficiently when the circuit related processing tasks assigned to the master DSP are minimized, allowing more processor power (cycles) for communication and overhead tasks. The RX5 contains two DB25 connectors for interfacing with 40 bits of digital I/O and 4 channels of analog output. A BNC connector is provided for access to the first analog output channel. Four fiber optic Medusa preamp ports enable connections for up to 64 channels of analog input. Distributing Data Across DSPs In RPvdsEx data can be transferred between each of the auxiliary DSPs as well as the master DSP using zHop components. MCzHopIn nChan=16 ChanSel=1 MCzHopOut nChan=16 [4:231,0] MCzHopPick ChanNo=1 zHopIn zHopOut Components such as MCzHopIn and MCzHopOut can be used for multi-channel signals while components such as zHopIn, zHopOut, and MCzHopPick are used with single-channel signals. Up to 126 pairs can be used in a single RPvdsEx circuit. System 3 Manual RX Processors 3-5 Bus Related Delays The zHop Bus introduces a single sample delay. However, this delay is taken care of for the user in OpenEx when Timing and Data Saving macros are used. See MultiProcessor Circuit Design in the RPvdsEx Manual for these and other multiprocessor circuit design techniques. RX5 Features DSP Status Displays All high performance RX multiprocessors include status lights and a VFD (Vacuum Fluorescent Display) screen to report the status of the individual processors. Status Lights Up to five LEDs report the status of the multiprocessor's individual DSPs. When the device is turned on, they will glow steadily. If the demands on a DSP exceed 99% of its capacity on any given cycle, the corresponding LED will flash rapidly (~3 times per second). Front Panel VFD Screen The front panel VFD screen reports detailed information about the status of the system. The display includes two lines. The top line reports the system mode, Run! or Idle, and displays heading labels for the second line. The second line reports the user’s choice of status indicators for each DSP followed by an aggregate value. The user can cycle through the various status indicators using the Mode button to the left of the display. Push and release the button to change the display or push and hold the button for one second then release to automatically cycle through each of the display options. The VFD screen may also report system status such as booting status (Booting DSP) or alert the user when the device's microcode needs to be reprogrammed (Firmware Blank). Status Indicators Cyc: cycle usage Ovr: processor cycle overages Bus%: percentage of internal device's bus capacity used I/O%: percentage of data transfer capacity used Important Note!: The status lights will flash (~3 times a second) to alert the user when a device goes over the cycle usage limit, even if only for a particular cycle. This helps to identify periodic overages caused by components in time slices. System 3 Manual 3-6 RX Processors Fiber Optic Ports The RX5 base station acquires digitized signals from a Medusa preamplifier over a fiber optic cable. This provides loss-less signal acquisition between the amplifier and the base station. Two or four fiber optic ports are provided to support simultaneous acquisition from up to four preamplifiers. Each port can input up to 16 channels at a maximum sampling rate of ~25 kHz. The first two ports provide oversampling. See Fiber Oversampling, below for more information. The fiber optic ports can be used with any of the Medusa preamplifiers including the RA16PA, RA4PA, or RA8GA. The channel numbers for each port begin at a fixed offset regardless of the number of channels available on the connected device. Channels are numbered as follows: Amp-A 1 – 16 Amp-B 17 – 32 Amp-C 33 – 48 Amp-D 49 - 64 Fiber Oversampling The fiber optic cable that carries the signals to the fiber optic input ports has a transfer rate limitation of 6.25 Mbits/s. With 16 channels of data and 16 bits per sample, this limitation translates to a maximum sample rate of 24.414 kHz. However, the need may arise to run a circuit at a higher sample rate while still acquiring data via a fiber optic port. The first two fiber optic ports can oversample the digitized signals that have already been sampled up to 4X or ~100 kHz. This will allow an RX5 to run a DSP chain at ~50 kHz or ~100 kHz, and still sample data acquired through an optically connected preamplifier that digitized the incoming data stream at a maximum rate of ~25 kHz. Oversampling is performed on the base station. The signals being acquired will still be sampled at ~25 kHz on the preamplifier. This means that, even with oversampling, signals acquired by an optically connected preamplifier are still governed by the bandwidth and frequency response of the preamplifier. When acquiring up to 16 channels of data on the first fiber optic input port of the RX5, the signals will be oversampled 4X to 100 kHz. If data is being acquired only on the first two fiber optic ports, the signals will be oversampled 2X to ~50 kHz. Amp Status and Clip Warning Lights Amp lights are located to the right of each fiber optic port. These lights are used to indicate the power status or provide a clip warning for the connected amplifiers. When an amplifier is not connected the Amp light will flash in a slow steady pattern. The light is lit when the amplifier is connected and begins to flash quickly when the voltage on the battery for the corresponding amplifier is low. When any channel on the connected amplifier produces a voltage approaching the maximum input of the amplifier, the corresponding light will flash rapidly to warn that clipping may occur if the signal exceeds the maximum input voltage. See the corresponding preamplifier section for more information on input range and clip warnings. Important Note!: The Li-ion batteries voltage decreases rapidly once the battery low light is on. Data acquisition will suffer if the battery is not charged soon after the light goes on. System 3 Manual RX Processors 3-7 Amplifier Status Patterns Light Pattern Amplifier Status Solid Connected Very slow flash (~1 every two seconds) Not connected Slow flash (~1 per second) Connected and charging Rapid flash Battery low Very rapid flash Clip Warning Note: If the amplifier appears to be connected and the amplifier status light is flashing slowly, check to ensure that the device is connected properly. Bits Lights The RX5’s eight Bits lights are user configurable. By default the Bits lights indicate the logic level (light when high) for the eight bit-addressable digital I/O lines. The Bits lights can also be configured to provide information about amplifier status or act as logic level lights for any of the other four bytes of digital I/O. Using the Bits Lights to Display Amplifier Status Note: Because clip warning and amplifier status are always displayed using the Amp lights (located directly to the right of each fiber optic port), TDT recommends using the Bits lights for other applications. See Amp Status and Clip Warning Lights for more information. When the Bits lights are configured to display the amplifier status, the left column of lights indicates the power status and the right column indicates a clip warning for the corresponding amplifier. The table on page 3-7 shows the light pattern and corresponding amplifier status for the power status lights (0 - 3). Clip lights flash very rapidly when any channel on the connected amplifier produces a voltage approaching the maximum input of the amplifier. Analog Output The RX5 is equipped with four channels of 16-bit PCM D/A. The sampling rate is user selectable up to a maximum of ~100 kHz. The D/A is DC coupled and has a built-in upsampler for improved audio playback. The upsampler is controlled through one of the RX5's programmable bits and can be turned off to allow the D/A to drive external devices such as a stimulator. Channel one analog output can be accessed via a front Panel BNC (DAC-1). All four analog channels can be accessed via the DB25 Multi I/O connector (pins 14 – 17). System 3 Manual 3-8 RX Processors Digital I/O The RX5 processor has 40 digital I/O lines. Eight bits are bit-addressable. The remaining 32 bits are four word-addressable bytes. Digital I/O lines are accessed via the two 25-pin connectors on the front of the RX5. See the Digital I/O Circuit Design section of the RPvdsEx Manual for more information on programming the digital I/O. CAUTION!: The first eight bits of bit-addressable digital I/O on RX devices are unbuffered. When used as inputs, overvoltages on these lines can cause severe damage to the system. TDT recommends when sending digital signals into the device, never send a signal with amplitude greater than five volts into any digital input. Configuring the Programmable I/O Lines Each of the eight bit-addressable lines can be independently configured as inputs or outputs. The digital I/O lines can be configured as inputs or outputs in groups of eight bits – that is as byte A, byte B, byte C, and byte D. Note, however, that the bytes must be addressed as if part of a word, not as individual bytes. See Addressing Digital Bits In A Word in the RPvdsEx Manual for more information. By default, all bits are configured as inputs. This default setting is intended to prevent damage to equipment that might be connected to the digital I/O lines. The user can configure the bits in the RPvdsEx configuration register. The configuration register is also used to determine what the eight front panel Bits lights represent. To access the bit configuration register in RPvdsEx: Click the Device Setup command on the Implement menu. In the Set Hardware Parameters dialog box, click the Device Type box and select the RX5 Pentusa from the list. The dialog expands to display the Device Configuration Register. Click Modify to display the Edit I/O Setup Control dialog box. In this dialog box, a series of check boxes are used to create a bitmask that is used to program all bits. System 3 Manual RX Processors 3-9 To enable the check boxes, delete Und from the Decimal Value box. To determine the desired value, select or clear the check boxes according to the table below. By default, all check boxes are cleared (value = 0). Selecting a check box sets the corresponding bit in the bitmask to one. When the configuration is complete, click OK to return to the Set Hardware Parameters dialog box. Bit_# Description 0-7 Each of these bits controls the configuration of one of the eight addressable bits as inputs or outputs. Setting the bit to one will configure that bit as an output. 8-11 Each of these bits controls the configuration of one of the four addressable bytes as inputs or outputs. Setting the bit to one will configure that byte as an output. bit 8 - byte A, bit 9 - byte B, bit 10 - byte C, and bit 11 - byte D 12-14 Create a bit code that determines how the front panel Bits lights are used, see table below. 15 Setting the bit to one will disable the D/A upsampler. Bit Codes for Controlling the Bit Lights (Boxes 12-14) By default, check boxes 12 –14 in the Edit I/O Setup Control dialog box (previous diagram) are cleared to create the bit code 000. This configures the eight front panel Bits lights to act as activity lights (lit when high) for the eight bit addressable digital I/O lines. The Bits lights can also be configured to provide information about amplifier status or act as activity lights for any of the other four bytes of digital I/O. Bit Flags Bits set to 1 Bit Lights Used For … 000 None Logical level lights for bit-addressable I/O lines 010 13 Amplifier Clip Warning/Power Status display 100 14 Enable logical level lights for byte A 101 12, 14 Enable logical level lights for byte B System 3 Manual 3-10 RX Processors 110 13, 14 Enable logical level lights for byte C 111 12, 13, 14 Enable logical level lights for byte D XLink The XLink is not supported at this time. Pentusa Base Station Technical Specifications The RX5 has no onboard A/D converters. Technical Specifications for the A/D converters are found under the preamplifier's technical specifications. DSP 100 MHz Sharc ADSP 21161, 600 MFLOPS Peak Two or Five Memory 128 MB SDRAM (Shared) D/A 4 channels, 16-bit PCM Sample Rate Up to 97.65625 kHz (8X upsampled to 200 kHz default operation) Frequency Response DC-Nyquist(~1/2 sample rate) Voltage Out +/- 10.0 Volts Voltage Out Accuracy +/- 10% S/N (typical) 84 dB (20 Hz to 25 KHz) 82 dB with upsampling disabled THD (typical) -77 dB for 1 kHz output at 5 Vrms -74 dB with upsampling disabled Output Impedance System 3 Manual 10 Ohm RX Processors 3-11 Fiber Optic Ports Two or Four Inputs (Medusa) Digital I/O 40 bits programmable (8 bits bit-addressable and a 32 bit word, addressable as 4 bytes) DB25 Connector Pinouts TDT recommends the PP24 patch panel for accessing the RX5 I/O. Multi I/O Pin Name Description Pin Name Description 1 14 A1 2 15 A2 3 16 A3 4 17 A4 AGND Analog Ground Analog Output Channels 5 GND Digital I/O Ground 18 C0 Byte C 6 C1 Byte C 19 C2 7 C3 Word addressable digital I/O Word addressable digital I/O 20 C4 Bits 0, 2, 4, and 6 8 C5 Bits 1, 3, 5, and 7 21 C6 9 C7 22 D0 Byte D 10 D1 23 D2 Word addressable digital I/O 24 D4 Bits 0, 2, 4, and 6 25 D6 11 D3 12 D5 Byte D Word addressable digital I/O Bits 1, 3, 5, and 7 13 D7 System 3 Manual 3-12 RX Processors Digital I/O Pin Name Description Pin Name Description 1 BA0 14 BA1 2 BA2 Bit Addressable digital I/O 15 BA2 3 BA4 16 BA3 4 BA6 17 BA4 5 GND Digital I/O Ground 18 A0 Byte A 6 A1 Byte A 19 A2 7 A3 Word addressable digital I/O Word addressable digital I/O 20 A4 Bits 0, 2, 4, and 6 8 A5 Bits 1, 3, 5, and 7 21 A6 9 A7 22 B0 Byte B 10 B1 23 B2 Word addressable digital I/O 24 B4 Bits 0, 2, 4, and 6 25 B6 11 B3 12 B5 13 B7 System 3 Manual Bits 0, 2, 4, and 6 Byte B Word addressable digital I/O Bits 1, 3, 5, and 7 Bit Addressable digital I/O Bits 1, 3, 5, and 7 RX Processors 3-13 RX6 Piranha Multifunction Processor Overview The RX6 Piranha Multifunction Processor is a high performance multiple DSP device for researchers who need to acquire or produce high sample rate signals. The RX6 supports complex research, multimodal, and experimental paradigms on a single high-bandwidth device. The RX6 equipped with either two or five 100 MHz, 1600 MFLOPS Sharc DSPs, combines a powerful multiprocessor architecture and high-speed data transfer with two channels of 24-bit sigma-delta D/A converters and two channels of 24-bit sigma-delta A/D converters to provide superior high frequency signal generation and acquisition. Optionally, the RX6 can be equipped with a fiber optic input, allowing it to serve as a base station for a Medusa preamplifier. Power and Communication The RX6 mounts in a System 3 zBus Powered Device Chassis (ZB1PS) and communicates with the PC using the Gigabit (PI5/FI5) or Optibit (PO5/FO5) PC interfaces. The ZB1PS is UL compliant, see the ZB1PS Operations Manual for power and safety information. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see the RPvdsEx Manual. RX Architecture Each RX multiprocessor device is equipped with either two or five digital signal processors (DSPs). The multi-DSP architecture allows processing tasks to be distributed across multiple processors and enables data to be transferred to the PC quickly and efficiently. The DSPs include one master and one or four auxiliary DSP(s). 128 MB SDRAM of system memory is shared by all DSPs. When designing circuits the maximum number of components for each RX DSP is 256. Each DSP communicates with an internal bus to send and receive information from the I/O controller and the shared memory. The master DSP supervises overall system boot up and operation. The master DSP also acts as the main data interface between the zBus (host PC) and the multi-DSP environment. System 3 Manual 3-14 RX Processors Because the zBus communicates only with the master processor, these devices operate most efficiently when the circuit related processing tasks assigned to the master DSP are minimized, allowing more processor power (cycles) for communication and overhead tasks. The RX6 contains a DB25 connector for interfacing with 24 bits of digital I/O and four BNC connectors for interfacing with four channels of analog I/O. An optional fiber optic Medusa preamp port enables connections for up to 16 channels of analog input. Distributing Data Across DSPs In RPvdsEx data can be transferred between each of the auxiliary DSPs as well as the master DSP using zHop components. MCzHopIn nChan=16 ChanSel=1 MCzHopOut nChan=16 [4:231,0] MCzHopPick ChanNo=1 zHopIn zHopOut Components such as MCzHopIn and MCzHopOut can be used for multi-channel signals while components such as zHopIn, zHopOut, and MCzHopPick are used with single-channel signals. Up to 126 pairs can be used in a single RPvdsEx circuit. System 3 Manual RX Processors 3-15 Bus Related Delays The zHop Bus introduces a single sample delay. However, this delay is taken care of for the user in OpenEx when Timing and Data Saving macros are used. See MultiProcessor Circuit Design in the RPvdsEx Manual for these and other multiprocessor circuit design techniques. RX6 Features DSP Status Displays All high performance RX multiprocessors include status lights and a VFD (Vacuum Fluorescent Display) screen to report the status of the individual processors. Status Lights Up to five LEDs report the status of the multiprocessor's individual DSPs. When the device is turned on, they will glow steadily. If the demands on a DSP exceed 99% of its capacity on any given cycle, the corresponding LED will very flash rapidly (~3 times per second). Front Panel VFD Screen The front panel VFD screen reports detailed information about the status of the system. The display includes two lines. The top line reports the system mode, Run! or Idle, and displays heading labels for the second line. The second line reports the user’s choice of status indicators for each DSP followed by an aggregate value. The user can cycle through the various status indicators using the Mode button to the left of the display. Push and release the button to change the display or push and hold the button for one second then release to automatically cycle through each of the display options. The VFD screen may also report system status such as booting status (Booting DSP) or alert the user when the device's microcode needs to be reprogrammed (Firmware Blank). Status Indicators Cyc: cycle usage Ovr: processor cycle overages Bus%: percentage of internal device's bus capacity used I/O%: percentage of data transfer capacity used Important Note!: The status lights will flash (~3 times a second) to alert the user when a device goes over the cycle usage limit, even if only for a particular cycle. This helps to identify periodic overages caused by components in time slices. System 3 Manual 3-16 RX Processors Fiber Optic Port - Optional The RX6 can include a single fiber optic port most often used with the HTI3, but may also be used to acquire digitized signals from a Medusa preamplifier over a fiber optic cable. This provides loss-less signal acquisition between the amplifier and the base station. The port can input up to 16 channels at a maximum sampling rate of ~25 kHz. See Fiber Oversampling, below for more information. The fiber optic port can be used with any of the Medusa preamplifiers including the RA16PA, RA4PA, or RA8GA. The channel numbers for each port begin at a fixed offset regardless of the number of channels available on the connected device. Channels are numbered as follows: Amp-A 1 – 16 Fiber Oversampling The fiber optic cable that carries the signals to the fiber optic input ports has a transfer rate limitation of 6.25 Mbits/s. With 16 channels of data and 16 bits per sample, this limitation translates to a maximum sample rate of 24.414 kHz. However, the need may arise to run a circuit at a higher sample rate while still acquiring data via a fiber optic port. The fiber optic port on the RX6 can oversample the digitized signals that have already been sampled up to 4X or ~100 kHz. This will allow an RX6 to run a DSP chain at ~50 kHz or ~100 kHz, and still sample data acquired through an optically connected preamplifier that digitized the incoming data stream at a maximum rate of ~25 kHz. Oversampling is performed on the base station. The signals being acquired will still be sampled at ~25 kHz on the preamplifier. This means that, even with oversampling, signals acquired by an optically connected preamplifier are still governed by the bandwidth and frequency response of the preamplifier. Amp Status and Clip Warning Lights If the RX6 includes a fiber optic port for a Medusa Preamplifier, an Amp light is located to the right of the fiber optic port. This light is used to indicate the power status or provide a clip warning for the connected amplifier. When an amplifier is not connected the Amp light will flash in a slow steady pattern. The light is lit when the amplifier is connected and begins to flash quickly when the voltage on the battery for the corresponding amplifier is low. When any channel on the connected amplifier produces a voltage approaching the maximum input of the amplifier, the corresponding light will flash rapidly to warn that clipping may occur if the signal exceeds the maximum input voltage. See the preamplifier user guide for more information on input range and clip warnings. Important Note!: The Li-ion batteries voltage decreases rapidly once the battery low light is on. Data acquisition will suffer if the battery is not charged soon after the light goes on. System 3 Manual RX Processors 3-17 Amplifier Status Patterns Light Pattern Amplifier Status Solid Connected Very slow flash (~1 every two seconds) Not connected Slow flash (~1 per second) Connected and charging Rapid flash Battery low Very rapid flash Clip Warning Note: If the amplifier appears to be connected and the amplifier status light is flashing slowly, check to ensure that the device is connected properly. Bits Lights The RX6’s eight Bits lights are user configurable. By default the Bits lights indicate the logic level (light when high) for the eight bit-addressable digital I/O lines. The Bits lights can also be configured to provide information about amplifier status or act as logic level lights for any of the other two bytes of digital I/O. Using the Bits Lights to Display Amplifier Status Note: Because clip warning and amplifier status are always displayed using the Amp lights (located directly to the right of each fiber optic port), TDT recommends using the Bits lights for other applications. See Amp Status and Clip Warning Lights for more information. When the Bits lights are configured to display the amplifier status, the left column of lights indicates the power status and the right column indicates a clip warning for the amplifier. The table above shows the light pattern and corresponding amplifier status for the power status lights (0-3). Clip lights flash very rapidly when any channel on the connected amplifier produces a voltage approaching the maximum input of the amplifier. Analog Input/Output The RX6 has two channels of 24-bit, sigma-delta D/A and two channels of 24-bit, sigma-delta A/D, each accessible through BNC connectors. Sigma-delta converters provide superior conversion quality and extended useful bandwidths, at the cost of an inherent fixed group delay. The RX6 DAC Delay is 43 samples and the RX6 ADC Delay is 70 samples. This device can sample at rates up to ~260 kHz for a realizable bandwidth of ~109 kHz. For specific information on the actual sampling rates see Realizable Sampling Rates for the RX6, page 3-21. System 3 Manual 3-18 RX Processors Important Note!: Because some RX6 models can acquire analog signals using a Medusa preamplifier via an optional fiber optic port, the sigma-delta A/D inputs on all RX6 models are offset and accessed as ADC channels 128 and 129. Digital I/O The RX6 processor includes 24 bits of programmable I/O in two eight bit word-addressable bytes and eight bits of bit-addressable I/O. Digital I/O lines are accessed via the 25-pin connector on the front panel and can be configured as inputs or outputs. See the Digital I/O Circuit Design section of the RPvdsEx Manual for more information on programming the digital I/O. The first four bits of digital I/O (bits 0-3) can also be used for submicrosecond event timing. See Nanosecond Event Timing, page 4-12 and the TimeStamp component in the RPvdsEx Manual for more information. CAUTION!: The first eight bits of bit-addressable digital I/O on RX devices are unbuffered. When used as inputs, overvoltages on these lines can cause severe damage to the system. TDT recommends when sending digital signals into the device, never send a signal with amplitude greater than five volts into any digital input. Configuring the Programmable I/O Lines Each of the eight bit-addressable bits can be independently configured as inputs or outputs. The digital I/O lines can be configured as inputs or outputs in groups of eight bits – that is as byte A and byte B. Note, however, that the bytes must be addressed as if part of a word, not as individual bytes. See Addressing Digital Bits In A Word in the RPvdsEx Manual for more information. By default, all bits are configured as inputs. This default setting is intended to prevent damage to equipment that might be connected to the digital I/O lines. The user can configure the bits in the RPvdsEx configuration register. The configuration register is also used to determine what the eight front panel Bits lights represent. To access the bit configuration register in RPvdsEx: Click the Device Setup command on the Implement menu. In the Set Hardware Parameters dialog box, click the Device Type box and select the RX6 Multi-Function from the list. The dialog expands to display the Device Configuration Register. System 3 Manual RX Processors 3-19 Click Modify to display the Edit I/O Setup Control dialog box. In this dialog box, a series of check boxes are used to create a bitmask that is used to program all bits. To enable the check boxes, delete Und from the Decimal Value box. To determine the desired value, select or clear the check boxes according to the table below. By default, all check boxes are cleared (value = 0). Selecting a check box sets the corresponding bit in the bitmask to one. When the configuration is complete, click OK to return to the Set Hardware Parameters dialog box. Bit_# Description 0-7 Each of these bits controls the configuration of one of the eight addressable bits as inputs or outputs. Setting the bit to one will configure that bit as an output. 8-9 Each of these bits controls the configuration of one of the two addressable bytes as inputs or outputs. Setting the bit to one will configure that byte as an output. bit 8 controls byte A, and bit 9 controls byte B. 10-11 bits 10 – 11 are not used. 12-14 Create a bit code that determines how the front panel Bits lights are used, see table below. 15 Not used. Bit Codes for Controlling the Bit Lights (Boxes 12-14) By default, check boxes 12 –14 in the Edit I/O Setup Control dialog box (previous diagram) are cleared to create the bit code 000. This configures the eight front panel Bits lights to act as activity lights (glow when high) for the eight bit addressable digital I/O lines. The Bits lights can also be configured to provide information about amplifier status or act as activity lights for any of the other four bytes of digital I/O. System 3 Manual 3-20 RX Processors Bit Flags Bits set to 1 Bit Lights Used For … 000 None Logical level lights for bit-addressable I/O lines 010 13 Amplifier Clip Warning/Power Status display 100 14 Enable logical level lights for byte A 101 12, 14 Enable logical level lights for byte B XLink The XLink is not supported at this time. System 3 Manual RX Processors 3-21 Realizable Sampling Rates for the RX6 The following table shows the actual sampling rate values for the RX6. The X's on the table correspond to realizable frequencies for the ADC, DAC, Optical input, and Digital I/O. For example, the Digital I/O accepts a sampling rate up to 390625.0 Hz and the Audio ADC and DAC each accept a sampling rate up to 260416.67 Hz. The maximum realizable sampling rates are accepted as the maximum sampling rate without distortion. Each of the inputs and outputs will function above these sampling rates, but distortion will be present in the signal. Standard Rate Actual/Arbitrary Rate (Hz) Audio ADC Audio DAC Optical/AMP Input Digital I/O 6 kHz 6103.52 x x x x 6975.45 x x x 8138.025 x x x 9765.63 x x x 12207.03 x x 13950.89 x x x 16276.04 x x x 19531.25 x x x 24414.06 x x 27901.79 x x x 32552.08 x x x 39062.50 x x x 48828.13 x x 55803.57 x x x 65104.17 x x x 78125.00 x x x 97656.25 x x 111607.14 x x x 130208.33 x x x 156250.00 x x x 195312.50 x x x 223214.29 x x x 260416.67 x x x 12 kHz 25 kHz 50 kHz 100 kHz 200 kHz 400 kHz x x x* x* x x x x 312500.00 x 390625.00 x [x] = Fully functional [x*] = Sampling limited to 25KHz System 3 Manual 3-22 RX Processors Piranha Technical Specifications The RX6 can be equipped with a fiber optic input port which may be used with a Medusa or Adjustable Gain preamplifier. Specifications for the AD converters of those devices are found under the preamplifier's technical specifications. DSP 100 MHz Sharc ADSP 21161, 600 MFLOPS Peak Two or Five Memory 128 MB SDRAM D/A 2 channels, 24-bit sigma-delta Sample Rate Up to 260.4166 kHz Frequency Response DC – 109 kHz Voltage Out +/- 10.0 Volts S/N (typical) 105 dB (20 Hz - 20 kHz at 10 V) THD (typical) -92 dB (1 kHz output at 5 Vrms) Sample Delay 43 samples A/D 2 channels, 24-bit sigma-delta Sample Rate Up to 260.4166 kHz Frequency Response DC – 109 kHz Voltage In +/- 10.0 Volts S/N (typical) 105 dB (20 Hz - 20 kHz at 10 V) THD (typical) -95 dB (1 kHz input at 5 Vrms) Sample Delay 70 samples Fiber Optic Ports Optional Input (Medusa) Digital I/O 24 bits programmable (8 bits addressable and a 16 bit word, addressable as 2 bytes) Input Impedance 10 kOhms Output Impedance 10 Ohms System 3 Manual RX Processors 3-23 Signal-to-Noise Ratio Diagram The following graph is of the signal to noise ratio with varying signal frequencies. dB Rolloff Diagram This graph shows the dB rolloff for the RX6 with varying sampling frequencies for both D/A and A/D. The sample delay remains relatively stable for varying frequencies. System 3 Manual 3-24 RX Processors DB25 Connector Pinout TDT recommends the PP24 patch panel for accessing the RX6 I/O. Digital I/O Pin Name Description Pin Name Description 1 BA0 14 BA1 2 BA2 Bit Addressable digital I/O 15 BA3 3 BA4 16 BA5 4 BA6 17 BA7 5 GND Digital I/O Ground 18 A0 Byte A 6 A1 Byte A 19 A2 7 A3 Word addressable digital I/O Word addressable digital I/O 20 A4 Bits 0, 2, 4, and 6 8 A5 Bits 1, 3, 5, and 7 21 A6 9 A7 22 B0 Byte B 10 B1 23 B2 Word addressable digital I/O 24 B4 Bits 0, 2, 4, and 6 25 B6 11 B3 12 B5 13 B7 System 3 Manual Bits 0, 2, 4, and 6 Byte B Word addressable digital I/O Bits 1, 3, 5, and 7 Bit Addressable digital I/O Bits 1, 3, 5, and 7 RX Processors 3-25 RX7 Stimulator Base Station Overview The RX7 base station is a high performance processor available with either two or five 100 MHz, 1600 MFLOPS Sharc DSPs. You can use the base station’s onboard DSPs to design and generate complex arbitrary waveforms or complex patterns of biphasic pulses in real-time. The RX7 has been developed specifically for microstimulation applications. As part of TDT’s RX7G MicroStimulator system, the RX7’s primary role is to control the MS16 stimulus isolator, transferring hardware control and stimulation information across fiber optics. This proven digital communication system optically isolates the RX7 from the electrical stimulator, eliminating AC power surges and noise. For more information see MS4/MS16 Stimulus Isolator, page 7-3. The RX7 includes 40 bits of digital I/O, analog output, and can include one or two fiber optic input ports for acquisition of digitized data from Medusa preamplifiers. Acquired signals can be filtered, rectified, or smoothed for stimulus output or dynamic real-time stimulus control based on analog control signals from virtually any signal source. Power and Communication The RX7 mounts in a System 3 zBus Powered Device Chassis (ZB1PS) and communicates with the PC using the Gigabit (PI5/FI5) or Optibit (PO5/FO5) PC interfaces. The ZB1PS is UL compliant, see the ZB1PS Operations Manual for power and safety information. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see the RPvdsEx Manual. RX Architecture Each RX multiprocessor device is equipped with either two or five digital signal processors (DSPs). The multi-DSP architecture allows processing tasks to be distributed across multiple processors and enables data to be transferred to the PC quickly and efficiently. The DSPs include one master and one or four auxiliary DSP(s). 128 MB SDRAM of system memory is shared by all DSPs. When designing circuits the maximum number of components for each RX DSP is 256. Each DSP communicates with an internal bus to send and receive information from the I/O controller and the shared memory. The master DSP supervises overall system boot up and operation. The master DSP also acts as the main data interface between the zBus (host PC) and the multi-DSP environment. System 3 Manual 3-26 RX Processors Because the zBus communicates only with the master processor, these devices operate most efficiently when the circuit related processing tasks assigned to the master DSP are minimized, allowing more processor power (cycles) for communication and overhead tasks. The RX7 contains two DB25 connectors for interfacing with 40 bits of digital I/O and 4 channels of analog output. A BNC connector is provided for access to the first analog output channel. One or two fiber optic Medusa preamp ports enable connections for up to 32 channels of analog input. Distributing Data Across DSPs In RPvdsEx data can be transferred between each of the auxiliary DSPs as well as the master DSP using zHop components. MCzHopIn nChan=16 ChanSel=1 MCzHopOut nChan=16 [4:231,0] MCzHopPick ChanNo=1 zHopIn zHopOut Components such as MCzHopIn and MCzHopOut can be used for multi-channel signals while components such as zHopIn, zHopOut, and MCzHopPick are used with single-channel signals. Up to 126 pairs can be used in a single RPvdsEx circuit. System 3 Manual RX Processors 3-27 Bus Related Delays The zHop Bus introduces a single sample delay. However, this delay is taken care of for the user in OpenEx when Timing and Data Saving macros are used. See MultiProcessor Circuit Design in the RPvdsEx Manual for these and other multiprocessor circuit design techniques. RX7 Features DSP Status Displays All high performance RX multiprocessors include status lights and a VFD (Vacuum Fluorescent Display) screen to report the status of the individual processors. Status Lights Up to five LEDs report the status of the multiprocessor's individual DSPs. When the device is turned on, they will glow steadily. If the demands on a DSP exceed 99% of its capacity on any given cycle, the corresponding LED will flash very rapidly (~3 times per second). Front Panel VFD Screen The front panel VFD screen reports detailed information about the status of the system. The display includes two lines. The top line reports the system mode, Run! or Idle, and displays heading labels for the second line. The second line reports the user’s choice of status indicators for each DSP followed by an aggregate value. The user can cycle through the various status indicators using the Mode button to the left of the display. Push and release the button to change the display or push and hold the button for one second then release to automatically cycle through each of the display options. The VFD screen may also report system status such as booting status (Booting DSP) or alert the user when the device's microcode needs to be reprogrammed (Firmware Blank). Status Indicators Cyc: cycle usage Ovr: processor cycle overages Bus%: percentage of internal device's bus capacity used I/O%: percentage of data transfer capacity used Important Note!: The status lights will flash (~3 times a second) to alert the user when a device goes over the cycle usage limit, even if only for a particular cycle. This helps to identify periodic overages caused by components in time slices. System 3 Manual 3-28 RX Processors Fiber Optic Output Port (Stimulator) The output port, labeled Stimulator, can be used to transfer microstimulation waveforms to the MS16/MS4 Stimulus Isolator and/or to control its digital output. See the Stimulua Isolator section, page 7-3, for more information. Important Note: This fiber optic port is disabled if the sampling rate of the system is set to a value greater than ~25 kHz. Fiber Optic Input Ports (Amp-A and Amp-B) The RX7 base station can acquire digitized signals from a Medusa preamplifier over a fiber optic cable. This provides loss-less signal acquisition between the amplifier and the base station. Up to two fiber optic ports are provided to support simultaneous acquisition from up to two preamplifiers. Each port can input up to 16 channels at a maximum sampling rate of ~25 kHz. The fiber optic ports provide oversampling. See Fiber Oversampling, below for more information. The fiber optic ports can be used with any of the Medusa preamplifiers including the RA16PA, RA4PA, or RA8GA. The channel numbers for each port begin at a fixed offset regardless of the number of channels available on the connected device. Channels are numbered as follows: Amp-A 1 – 16 Amp-B 17 – 32 Fiber Oversampling (acquisition only) The fiber optic cable that carries the signals to the fiber optic input ports on the RX7 has a transfer rate limitation of 6.25 Mbits/s. With 16 channels of data and 16 bits per sample, this limitation translates to a maximum sampling rate of ~25 kHz. However, the need may arise to run a circuit at a higher sampling rate while still acquiring data via a fiber optic port. The first two fiber optic ports on an RX device can oversample the digitized signals that have already been sampled up to 4X or ~100 kHz. This will allow an RX7 to run a DSP chain at ~50 kHz or ~100 kHz, and still sample data acquired through an optically connected preamplifier that digitized the incoming data stream at its maximum rate of ~25 kHz. Oversampling is performed on the base station. The signals being acquired will still be sampled at ~25 kHz on the preamplifier. This means that, even with oversampling, signals acquired by an optically connected preamplifier are still governed by the bandwidth and frequency response of the preamplifier. When acquiring up to 16 channels of data on the first fiber optic input port of the RX7, the signals will be oversampled 4X to ~100 kHz. If the RX7 is equipped with a second fiber optic input port and data is being acquired on both ports, the signals on second port will be oversampled 2X to ~50 kHz. Amp Status and Clip Warning Lights Amp lights are located to the right of each fiber optic port. These lights are used to indicate the power status or provide a clip warning for the connected amplifiers. When an amplifier is not connected the Amp light will flash in a slow steady pattern. The light is lit when the amplifier is connected and begins to flash quickly when the voltage on the battery for the corresponding amplifier is low. When any channel on the connected amplifier produces a voltage approaching the maximum input of the amplifier, the corresponding light will flash rapidly to warn that clipping may occur if the signal exceeds the maximum input voltage. See the corresponding preamplifier section for more information on input range and clip warnings. System 3 Manual RX Processors 3-29 Important Note!: The Li-ion batteries voltage decreases rapidly once the battery low light is on. Data acquisition will suffer if the battery is not charged soon after the light goes on. Amplifier Status Patterns Light Pattern Amplifier Status Solid Connected Very slow flash (~1 every two seconds) Not connected Slow flash (~1 per second) Connected and charging Rapid flash Battery low Very rapid flash Clip Warning Note: If the amplifier appears to be connected and the amplifier status light is flashing slowly, check to ensure that the device is connected properly. Bits Lights The RX7’s eight Bits lights are user configurable. By default the Bits lights indicate the logic level (light when high) for the eight bit-addressable digital I/O lines. The Bits lights can also be configured to provide information about amplifier status or act as logic level lights for any of the other four bytes of digital I/O. Using the Bits Lights to Display Amplifier Status Note: Because clip warning and amplifier status are always displayed using the Amp lights (located directly to the right of each fiber optic port), TDT recommends using the Bits lights for other applications. See Amp Status and Clip Warning Lights for more information. When the Bits lights are configured to display the amplifier status, the left column of lights indicates the power status and the right column indicates a clip warning for the corresponding amplifier. The table on page 3-29 shows the light pattern and corresponding amplifier status for the power status lights (0 - 3). Clip lights flash very rapidly when any channel on the connected amplifier produces a voltage approaching the maximum input of the amplifier. Analog Output The RX7 is equipped with four channels of 16-bit PCM D/A. The sampling rate is user selectable up to a maximum of ~100 kHz. The D/A is DC coupled and has a built-in upsampler for improved audio playback. The upsampler is controlled through one of the RX7's programmable bits and can be turned off to allow the D/A to drive external devices such as a stimulator. Channel one analog output can be accessed via a front Panel BNC (DAC-1). All four analog channels can be accessed via the DB25 Multi I/O connector (pins 14 – 17). System 3 Manual 3-30 RX Processors Important! When using the RX7 with the stimulus isolator, the sampling rate set for this device cannot exceed ~25 kHz—a limitation of the fiber optic connection between the RX7 and the stimulus isolator. Digital I/O The RX7 base station has 40 digital I/O lines. Eight bits are bit-addressable. The remaining 32 bits are four word-addressable bytes. Digital I/O lines are accessed via the two 25-pin connectors on the front of the RX7. See the Digital I/O Circuit Design section of the RPvdsEx Manual for more information on programming the digital I/O. CAUTION!: The first eight bits of bit-addressable digital I/O on RX devices are unbuffered. When used as inputs, overvoltages on these lines can cause severe damage to the system. TDT recommends when sending digital signals into the device, never send a signal with amplitude greater than five volts into any digital input. Configuring the Programmable I/O Lines Each of the eight bit-addressable lines can be independently configured as inputs or outputs. The digital I/O lines can be configured as inputs or outputs in groups of eight bits – that is as byte A, byte B, byte C, and byte D. Note, however, that the bytes must be addressed as if part of a word, not as individual bytes. See Addressing Digital Bits In A Word in the RPvdsEx Manual for more information. By default, all bits are configured as inputs. This default setting is intended to prevent damage to equipment that might be connected to the digital I/O lines. The user can configure the bits in the RPvdsEx configuration register. The configuration register is also used to determine what the eight front panel Bits lights represent. To access the bit configuration register: Click the Device Setup command on the Implement menu. In the Set Hardware Parameters dialog box, click the Device Type box and select the RX7 Elec-Stimulator from the list. The dialog expands to display the Device Configuration Register. Click Modify to display the Edit I/O Setup Control dialog box. System 3 Manual RX Processors 3-31 In this dialog box, a series of check boxes are used to create a bitmask that is used to program all bits. To enable the check boxes, delete Und from the Decimal Value box. To determine the desired value, select or clear the check boxes according to the table below. By default, all check boxes are cleared (value = 0). Selecting a check box sets the corresponding bit in the bitmask to one. When the configuration is complete, click OK to return to the Set Hardware Parameters dialog box. Bit_# Description 0-7 Each of these bits controls the configuration of one of the eight addressable bits as inputs or outputs. Setting the bit to one will configure that bit as an output. 8-11 Each of these bits controls the configuration of one of the four addressable bytes as inputs or outputs. Setting the bit to one will configure that byte as an output. bit 8 - byte A, bit 9 - byte B, bit 10 - byte C, and bit 11 - byte D 12-14 Create a bit code that determines how the front panel Bits lights are used, see table below. 15 Setting the bit to one will disable the D/A upsampler. Bit Codes for Controlling the Bit Lights (Boxes 12-14) By default, check boxes 12 –14 in the Edit I/O Setup Control dialog box (previous diagram) are cleared to create the bit code 000. This configures the eight front panel Bits lights to act as activity lights (glow when high) for the eight bit addressable digital I/O lines. The Bits lights can also be configured to provide information about amplifier status or act as activity lights for any of the other four bytes of digital I/O. Bit Flags Bits set to 1 Bit Lights Used For … 000 None Logical level lights for bit-addressable I/O lines 010 13 Amplifier Clip Warning/Power Status display 100 14 Enable logical level lights for byte A System 3 Manual 3-32 RX Processors 101 12, 14 Enable logical level lights for byte B 110 13, 14 Enable logical level lights for byte C 111 12, 13, 14 Enable logical level lights for byte D XLink The XLink is not supported at this time. Stimulator Base Station Technical Specifications The RX7 is designed for use with the stimulus isolator. The specifications for the stimulus isolator are found under that device's technical specifications. The RX7 is also equipped with a fiber optic input port for use with Medusa or Adjustable Gain preamplifiers. Specifications for the A/D converters of the preamplifiers are found in the corresponding technical specifications. DSP 100 MHz Sharc ADSP 21161, 600 MFLOPS Peak Two or Five Memory 128 MB SDRAM (Shared) D/A 4 channels, 16-bit PCM Sample Rate Up to 97.65625 kHz (8X upsampled to 200 kHz default operation)* Frequency Response DC-Nyquist(~1/2 sample rate) Voltage Out +/- 10.0 Volts Voltage Out Accuracy +/- 10% S/N (typical) 84 dB (20 Hz to 25 KHz) 82 dB with upsampling disabled THD (typical) -77 dB for 1 kHz output at 5 Vrms -74 dB with upsampling disabled System 3 Manual RX Processors 3-33 Output Impedance 10 Ohm Fiber Optic Ports One or Two Inputs, Output for Stimulator * Digital I/O 40 bits programmable (8 bits bit-addressable and a 32 bit word, addressable as 4 bytes) * Note: When used with the microstimulator, the sampling rate is limited to 24.414 kHz by the Stimulator Fiber Optic Port. DB25 Connector Pinouts Multi I/O Pin Name Description Pin Name Description Analog Ground 14 A1 2 15 A2 3 16 A3 4 17 A4 1 AGND Analog Output Channels 5 GND Digital I/O Ground 18 C0 Byte C 6 C1 Byte C 19 C2 7 C3 Word addressable digital I/O Word addressable digital I/O 20 C4 Bits 0, 2, 4, and 6 8 C5 Bits 1, 3, 5, and 7 21 C6 9 C7 22 D0 Byte D 10 D1 23 D2 Word addressable digital I/O 24 D4 Bits 0, 2, 4, and 6 25 D6 11 D3 12 D5 Byte D Word addressable digital I/O Bits 1, 3, 5, and 7 13 D7 System 3 Manual 3-34 RX Processors Digital I/O Pin Name Description Pin Name Description 1 BA0 14 BA1 2 BA2 Bit Addressable digital I/O 15 BA2 3 BA4 16 BA3 4 BA6 17 BA4 5 GND Digital I/O Ground 18 A0 Byte A 6 A1 Byte A 19 A2 7 A3 Word addressable digital I/O Word addressable digital I/O 20 A4 Bits 0, 2, 4, and 6 8 A5 Bits 1, 3, 5, and 7 21 A6 9 A7 22 B0 Byte B 10 B1 23 B2 Word addressable digital I/O 24 B4 Bits 0, 2, 4, and 6 25 B6 11 B3 12 B5 13 B7 System 3 Manual Bits 0, 2, 4, and 6 Byte B Word addressable digital I/O Bits 1, 3, 5, and 7 Bit Addressable digital I/O Bits 1, 3, 5, and 7 RX Processors 3-35 RX8 Multi I/O Overview The RX8 is a high channel count, high sample rate analog I/O system which provides a maximum of 24 channels of analog I/O and generates a maximum sampling rate of 100 kHz per channel. Each bank of four or eight channels of I/O is user configurable with either PCM or sigma-delta converters. The 24-bit sigma-delta converters are ideal for audio applications. The 16-bit PCM analog converters have an excellent dynamic range and almost no group delay. These converters are excellent for acquiring signal information and controlling external devices, such as motors. The RX8 is equipped with either two or five 100 MHz, 1600 MFLOPS Sharc DSPs and can control audio feedback systems or motor controls in real-time. Built in digital filters, waveform generators, and logic control components give end users the ability to design and control virtually any presentation system. Power and Communication The RX8 mounts in a System 3 zBus Powered Device Chassis (ZB1PS) and communicates with the PC using the Gigabit (PI5/FI5) or Optibit (PO5/FO5) PC interfaces. The ZB1PS is UL compliant, see the ZB1PS Operations Manual for power and safety information. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see the RPvdsEx Manual. RX Architecture Each RX multiprocessor device is equipped with either two or five digital signal processors (DSPs). The multi-DSP architecture allows processing tasks to be distributed across multiple processors and enables data to be transferred to the PC quickly and efficiently. The DSPs include one master and one or four auxiliary DSP(s). 128 MB SDRAM of system memory is shared by all DSPs. When designing circuits the maximum number of components for each RX DSP is 256. Each DSP communicates with an internal bus to send and receive information from the I/O controller and the shared memory. The master DSP supervises overall system boot up and operation. The master DSP also acts as the main data interface between the zBus (host PC) and the multi-DSP environment. System 3 Manual 3-36 RX Processors Because the zBus communicates only with the master processor, these devices operate most efficiently when the circuit related processing tasks assigned to the master DSP are minimized, allowing more processor power (cycles) for communication and overhead tasks. The RX8 contains two DB25 connectors for interfacing with 24 bits of digital I/O and 24 channels of analog I/O. Distributing Data Across DSPs In RPvdsEx data can be transferred between each of the auxiliary DSPs as well as the master DSP using zHop components. MCzHopIn nChan=16 ChanSel=1 MCzHopOut nChan=16 [4:231,0] MCzHopPick ChanNo=1 zHopIn zHopOut Components such as MCzHopIn and MCzHopOut can be used for multi-channel signals while components such as zHopIn, zHopOut, and MCzHopPick are used with single-channel signals. Up to 126 pairs can be used in a single RPvdsEx circuit. Bus Related Delays The zHop Bus introduces a single sample delay. However, this delay is taken care of for the user in OpenEx when Timing and Data Saving macros are used. System 3 Manual RX Processors 3-37 See MultiProcessor Circuit Design in the RPvdsEx Manual for these and other multiprocessor circuit design techniques. RX8 Features DSP Status Displays All high performance RX multiprocessors include status lights and a VFD (Vacuum Fluorescent Display) screen to report the status of the individual processors. Status Lights Up to five LEDs report the status of the multiprocessor's individual DSPs. When the device is turned on, they will glow steadily. If the demands on a DSP exceed 99% of its capacity on any given cycle, the corresponding LED will flash very rapidly (~3 times per second). Front Panel VFD Screen The front panel VFD screen reports detailed information about the status of the system. The display includes two lines. The top line reports the system mode, Run! or Idle, and displays heading labels for the second line. The second line reports the user’s choice of status indicators for each DSP followed by an aggregate value. The user can cycle through the various status indicators using the Mode button to the left of the display. Push and release the button to change the display or push and hold the button for one second then release to automatically cycle through each of the display options. The VFD screen may also report system status such as booting status (Booting DSP) or alert the user when the device's microcode needs to be reprogrammed (Firmware Blank). Status Indicators Cyc: cycle usage Ovr: processor cycle overages Bus%: percentage of internal device's bus capacity used I/O%: percentage of data transfer capacity used Important Note!: The status lights will flash (~3 times a second) to alert the user when a device goes over the cycle usage limit, even if only for a particular cycle. This helps to identify periodic overages caused by components in time slices. System 3 Manual 3-38 RX Processors Bits Lights The RX8’s eight Bits lights are user configurable. By default the Bits lights indicate the logic level (light when high) for the eight bit-addressable digital I/O lines. The Bits lights can also act as logic level lights for any of the other two bytes of digital I/O. Analog Input/Output The RX8 can have a maximum of 24 channels of analog I/O accessed via the 25-pin connector on the front panel. Each bank of up to eight channels of I/O is user configurable with either PCM or sigma-delta converters. Sigma-delta converters provide superior conversion quality and extended useful bandwidths, at the cost of an inherent fixed group delay. When equipped with sigma-delta, the RX8 DAC Delay is 23 samples and the RX8 ADC Delay is 47 samples. This device can sample at rates up to ~100 kHz. For additional information on sampling rates for both PCM and sigma-delta converters, see Realizable Sampling Rates for the RX8, page 3-41. Note: Because of device timing constraints at higher sampling rates, only the first 23 channels of analog I/O are processed when operating the RX8 at ~100 kHz. The analog I/O of each device is custom configured at the factory. Problems will arise if end users do not carefully note the configuration of their RX8 device. This topic provides information about configurations and channel numbering. The RX8's analog I/O channels are accessed via a 25-pin connector on the front panel. If you know what channel numbers your device uses, See the RX8 Technical Specifications, page 3-42, for the Analog I/O pinout diagram. Organization of Analog I/O Blocks The RX8 has three blocks of I/O ports. Each block can house up to eight channels for a total of 24 channels of analog I/O. Blocks can only be filled by analog I/O modules of the same type. For example: A block can be configured with all D/A’s or all A/D’s, but not a mixture of D/A’s and A/D’s. In addition, the D/A’s and A/D’s must be of the same type (either PCM or sigma-delta). Note: Block C can only be configured with outputs. System 3 Manual RX Processors 3-39 Channel Numbers Starting with block A and ending with block C, channels are numbered sequentially from 1 to 24. The channel numbering is independent of whether the analog I/O board is an input or output. For example: The analog I/O of an RX8 that has four A/D’s in the first two slots of Block A and four D/A’s in the first two slots of Bank C, would be accessed with the A/D’s as channels 1-4 and the D/A’s as channels 17-20. The photo below shows one possible configuration of the RX8's I/O boards. This configuration uses channels 1-4, 9-12, and 17-20. Digital I/O The RX8 processor includes 24 bits of programmable I/O in two eight bit word-addressable bytes and eight bits of bit-addressable I/O. Digital I/O lines are accessed via the 25-pin connector on the front panel and can be configured as inputs or outputs. See the Digital I/O Circuit Design section of the RPvdsEx Manual for more information on programming the digital I/O. CAUTION!: The first eight bits of bit-addressable digital I/O on RX devices are unbuffered. When used as inputs, overvoltages on these lines can cause severe damage to the system. TDT recommends when sending digital signals into the device, never send a signal with amplitude greater than five volts into any digital input. Configuring the Programmable I/O Lines Each of the eight bit-addressable bits can be independently configured as inputs or outputs. The digital I/O lines can be configured as inputs or outputs in groups of eight bits – that is as byte A and byte B. Note, however, that the bytes must be addressed as if part of a word, not as individual bytes. See Addressing Digital Bits In A Word in the RPvdsEx Manual for more information. By default, all bits are configured as inputs. This default setting is intended to prevent damage to equipment that might be connected to the digital I/O lines. The user can configure the bits in the RPvdsEx configuration register. The configuration register is also used to determine what the eight front panel Bits lights represent. System 3 Manual 3-40 RX Processors To access the bit configuration register: Click the Device Setup command on the Implement menu. In the Set Hardware Parameters dialog box, click the Device Type box and select RX8 MultiChan I/O from the list. The dialog expands to display the Device Configuration Register. Click Modify to display the Edit I/O Setup Control dialog box. In this dialog box, a series of check boxes are used to create a bitmask that is used to program all bits. To enable the check boxes, delete Und from the Decimal Value box. To determine the desired value, select or clear the check boxes according to the table below. By default, all check boxes are cleared (value = 0). Selecting a check box sets the corresponding bit in the bitmask to one. When the configuration is complete, click OK to return to the Set Hardware Parameters dialog box. Bit_# Description 0-7 Each of these bits controls the configuration of one of the eight addressable bits as inputs or outputs. Setting the bit to one will configure that bit as an output. 8-9 Each of these bits controls the configuration of one of the two addressable bytes as inputs or outputs. Setting the bit to one will configure that byte as an output. bit 8 controls byte A, and bit 9 controls byte B. 10-11 bits 10 – 11 are not used. 12-14 Create a bit code that determines how the front panel Bits lights are used, see table below. 15 Not used. System 3 Manual RX Processors 3-41 Bit Codes for Controlling the Bit Lights (Boxes 12-14) By default, check boxes 12 –14 in the Edit I/O Setup Control dialog box (previous diagram) are cleared to create the bit code 000. This configures the eight front panel Bits lights to act as activity lights (glow when high) for the eight bit addressable digital I/O lines. The Bits lights can also be configured to provide information about amplifier status or act as activity lights for any of the other four bytes of digital I/O. Bit Flags Bits set to 1 Bit Lights Used For … 000 None Logical level lights for bit-addressable I/O lines 100 14 Logical level lights for byte A 101 12, 14 Logical level lights for byte B XLink The XLink is not supported at this time. Realizable Sampling Rates for the RX8 PCM converters support a broad range of sampling rates up to the maximum of ~100 kHz. Relizable sampling rates can easily be determined in the device set-up dialog in RPvdsEx. Sigma-Delta converters support a more limited set of sampling rates as shown in the table below. When using Sigma-Delta converters, the user must ensure a valid sampling rate is set for the device. Note: The Check Realizable button in the device set-up dialog in RPvdsEx is used to calculate the true sampling rate of the system when an arbitrary sampling rate is used. This rate is based on the PCM converters. If your RX8 contains any sigma-delta converters you must use the following values for arbitrary sampling rates. System 3 Manual 3-42 RX Processors Supported Arbitrary Sample Rates for Sigma-Delta Converters Standard Rate Actual/Arbitrary Rate (Hz) 6 kHz 6103.52 6975.45 8138.025 9765.63 12 kHz 12207.03 13950.89 16276.04 19531.25 25 kHz 24414.06 27901.79 32552.08 39062.50 50 kHz 48828.13 55803.57 65104.17 78125.00 100 kHz 97656.25 Multi I/O Technical Specifications DSP 100 MHz Sharc ADSP 21161, 600 MFLOPS Peak Two or Five Memory 128 MB SDRAM D/A up to 24 channels, 16-bit PCM or 24-bit sigma-delta Sample Rate Up to 97.65625 kHz*† Frequency Response Sigma-delta or PCM: DC-Nyquist (~1/2 sample rate) Voltage Out +/- 10.0 Volts S/N (typical) Sigma-delta: 97 dB (20 Hz - 20 kHz at 10 V) PCM: 80 dB (20 Hz - 20 kHz at 10 V) THD (typical) Sigma-delta: -84 dB (1 kHz output at 5 Vrms) PCM: -70 dB (1 kHz output at 5 Vrms) Sample Delay System 3 Manual Sigma-delta: 23 samples or PCM: 4 samples RX Processors 3-43 A/D up to 16 channels, 16-bit PCM or 24-bit sigma-delta Sample Rate Up to 97.65625 kHz*† Frequency Response Sigma-delta: DC-Nyquist (~1/2 sample rate) PCM: DC - 7.5 kHz (3 dB corner, 2nd order, 12 dB per octave) Voltage In +/- 10.0 Volts S/N (typical) Sigma-delta: 97 dB (20 Hz - 20 kHz at 10 V) PCM: 80 dB (20 Hz - 20 kHz at 10 V) THD (typical) Sigma-delta: -84 dB (1 kHz output at 5 Vrms) PCM: -65 dB (1 kHz output at 5 Vrms) Sample Delay Sigma-delta: 47 samples or PCM: 4 samples Digital I/O 24 bits programmable (8 bits addressable and a 16 bit word, addressable as 2 bytes) Input Impedance 10 kOhms Output Impedance 10 Ohms *Note: Because of device timing constraints at higher sampling rates, only the first 23 channels of analog I/O are processed when operating the RX8 at 100 kHz. †Note: See page 3-41 for a list of supported sampling rates. DB25 Connector Pinouts TDT Recommends accessing the RX8 I/O via a PP24 patch panel. Analog I/O Pin Name 1 A1 2 A3 3 A5 4 A7 5 AGND Description Pin Name Description Analog I/O Channels 14 A2 Analog I/O Channels 15 A4 16 A6 Input or Output Depending on Custom Configuration 17 A8 18 A9 Input or Output Depending on Custom Configuration Analog Ground System 3 Manual 3-44 RX Processors 6 A10 19 A11 7 A12 20 A13 8 A14 21 A15 9 A16 22 A17 10 A18 23 A19 24 A21 25 A23 Analog I/O Channels Input or Output Depending on Custom Configuration 11 A20 Analog Outputs Analog Outputs 12 A22 13 A24 Digital I/O Pin Name Description Pin Name Description 1 BA0 14 BA1 2 BA2 Bit Addressable digital I/O 15 BA3 3 BA4 16 BA5 4 BA6 17 BA7 5 GND Digital I/O Ground 18 A0 Byte A 6 A1 Byte A 19 A2 7 A3 Word addressable digital I/O Word addressable digital I/O 20 A4 Bits 0, 2, 4, and 6 8 A5 Bits 1, 3, 5, and 7 21 A6 9 A7 22 B0 Byte B 10 B1 23 B2 Word addressable digital I/O 24 B4 Bits 0, 2, 4, and 6 25 B6 11 B3 12 B5 13 B7 System 3 Manual Bits 0, 2, 4, and 6 Byte B Word addressable digital I/O Bits 1, 3, 5, and 7 Bit Addressable digital I/O Bits 1, 3, 5, and 7 Part 4 RP Processors System 3 Manual 4-2 RP Processors ~ System 3 Manual RP Processors 4-3 RA16 Medusa Base Station Overview Recommended for single or dual channel extracellular recordings and low channel count EEG’s, EMG’s and evoked potential recordings (such as ABRs), the Medusa Base Station is a versatile signal processor designed to acquire, filter, and process data digitized on one of our preamplifiers. The RA16 acquires digitized signals from a Medusa preamplifier over a fiber optic cable, providing loss-less signal acquisition between the amplifier and the base station. PCM analog outputs can be used for a wide variety of signal production tasks, including control of motors, electrical stimulation, and monitoring analog signals during acquisition. Power and Communication The RA16 mounts in a System 3 zBus Powered Device Chassis (ZB1PS) and communicates with the PC using any of the zBus PC interfaces. The ZB1PS is UL compliant, see the ZB1PS Operations Manual for power and safety information. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see the RPvdsEx Manual. RA16 Features Status Lights The four lights on the left-hand side are status lights that relate to the amplifier. Active - The active light blinks when there is no active connection between the base station and the amplifier. The active light is on when there is a connection to an amplifier and the amplifier is on. Error - The error light blinks when there is a communication error between the base station and the amplifier. Clip - The clip light is a warning light and flashes when any channel on the connected amplifier produces a voltage approaching the maximum input of the amplifier. The light will flash rapidly to warn that clipping may occur if the signal exceeds the maximum input voltage. System 3 Manual 4-4 RP Processors Battery - The battery light flashes when the battery voltage is low. The Li-Ion battery voltage decreases rapidly once this indicator light is on. Data acquisition will suffer if the battery is not charged soon after this warning. Digital Out Lights There is one digital out LED for each digital output bit. Each LED will light when a logical high (1) is sent out on the corresponding digital output bit. The digital out lights can be used to indicate clipping or spike detection on a channel. Trigger Allows input of an external digital trigger. Link and Amplifier Ports The Base Station has two sets of fiber optic ports. The Link port outputs the signals that are input to the amplifier port. This allows multiple base stations to be linked for complex or high channel count processing. The Amplifier port is used to connect the base station to a Medusa preamplifier for the acquisition of analog signals. Stereo Output The stereo output samples from the first two channels of the digital-to-analog converters (DACs) so that users can monitor signal properties with headphones or speakers. The left speaker monitors channel one of the DAC and the right speaker monitors channel two. Use the Ch (channel) parameter on the channel inputs to change which analog channels are being monitored. Analog and Digital Outputs Each base station comes with 16 digital output bits and eight analog output channels. See the technical specifications for DB25 pinout. Each DAC uses 18-bit sigma-delta parts for high quality signal conversion. Sigma-delta converters provide superior conversion quality and extended useful bandwidths, at the cost of an inherent fixed group delay. For the RA16BA the DAC Delay is 18 samples. Sampling Rate Considerations There are no onboard analog-to-digital converters (ADCs) on the Medusa base station. When acquiring data, a preamplifier does this conversion. Since the fiber optic connection from a preamplifier to the base station has a transfer rate limitation of ~25 kHz, circuits utilizing this data acquisition must use a sample rate of ~25 kHz or less. Otherwise (i.e. circuits with digital-toanalog conversion only), the maximum sample rate is ~50 kHz. Force Pushing a paper clip in to the pinhole next to the clip light deletes the microcode on the base station. Once the microcode is deleted the RA16 base station will need to be reprogrammed. USB Transfer Rates USB transfers are limited to 100,000 samples per second of 32-bit data. 16-channels of ~25 KHz data produces 400,000 samples of data per second. Data reduction techniques such as Compress to 16 and Shuffle to 16 will reduce the data size without significant loss of information. Selective channel analysis and filtering can further reduce the amount of data transferred. System 3 Manual RP Processors 4-5 Memory The RA16BA Medusa comes standard with 32MB of RAM. At 16-channels in 16-bit mode, 32MB would give around 40 seconds of continuous data acquisition. Each additional base station could add an additional 2.5 minutes of continuous data acquisition. Medusa Base Station Technical Specifications Note: The RA16BA has no onboard AD converters. Technical specifications for the AD converters are found under the preamplifier's technical specifications. DSP 50 MHz Sharc 21065, 150 MFLOPS Memory 16 MB SDRAM or 32 MB SDRAM D/A 8 channels, 18-bit sigma-delta Sample Rate 48.828 kHz maximum Frequency Response 3 dB at 3 Hz - Nyquist (~1/2 sample rate) Voltage Out +/- 10.0 V (AC coupled) S/N (typical) 90 dB (20 Hz to 25 KHz) Distortion (typical) -70 dB for 1 KHz output at 0.7 Vrms Sample Delay 18 samples Fiber Optic Ports 1 16-channel Input and 1 Link Port (24 kHz maximum sample rate) Digital Inputs 1 bit Digital Outputs 16 bits Input Impedance NA Output Impedance 20 Ohm System 3 Manual 4-6 RP Processors DB25 Analog/Digital I/O Connector Pin Out Pin Name Description Pin Name Description 1 A1 14 A2 2 A3 Analog Output Channels 15 A4 3 A5 16 A6 4 A7 17 A8 5 GND Ground 18 D0 6 D1 Digital Output Bits 19 D2 7 D3 20 D4 8 D5 21 D6 9 D7 22 D8 10 D9 23 D10 11 D11 24 D12 12 D13 25 D14 Analog Output Channels Digital Output Bits 13 D15 Note: TDT recomends the PP16 patch panel for accessing the Digital I/O. System 3 Manual RP Processors 4-7 RP2.1 Real-Time Processor Overview The RP2 and RP2.1 real-time processors are flexible and powerful signal processing modules for TDT's System 3. The RP2 system consists of an Analog Devices Sharc floating point DSP with surrounding analog and digital interface circuits to yield a powerful programmable signalprocessing device capable of handling a variety of tasks. Power and Communication The PR2.1 mounts in a System 3 zBus Powered Device Chassis (ZB1PS) and communicates with the PC using any of the zBus PC interfaces. The ZB1PS is UL compliant, see the ZB1PS Operations Manual for power and safety information. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see the RPvdsEx Manual. Features Memory The RP2 comes with 16MB of memory for data storage and retrieval. The RP2.1 has 32MB of memory for data storage and retrieval. Digital Input/Output Bits The digital I/O circuits include eight bits of digital input and eight bits of digital output that are accessed on the 25 pin connector on the front of the RP2. The eight bits of I/O can be used within the processing chain in a variety of ways including implementing triggers, timing trigger responses, and lighting LEDs. The first four bits of the digital inputs and digital outputs as well as the Trigger/Enable input are mapped to LED indicators on the front panel of the RP2. There is an additional TRIG input BNC on the front panel. D/A and A/D The RP2.1 is equipped with two channels of 24-bit, 200 kHz sigma-delta D/A and two channels of 24-bit, 200 kHz sigma-delta A/D. System 3 Manual 4-8 RP Processors Sigma-Delta converters provide superior conversion quality and extended useful bandwidths, at the cost of an inherent fixed group delay. See the technical specifications for the group delay of each device. The original RP2 A/D's run at 100 kHz. An Optional RP2-5 (identifiable by its version number only) is equipped with 24-bit 50 kHz A/D and 50 kHz D/A. The RP2-5 device does not have SDRAM. Hardware Up to 32MB of SDRAM can be installed for storage of long waveforms and acquired data. An RP2 comes standard with 16MB of SDRAM while an RP2-5 has no SDRAM. All of the RPvdsEx buffer components, used to build circuits for the RP2, utilize the SDRAM memory and therefore will not work when used on an RP2-5 device. The RP2 communicates with and is programmed through the zBus link. The RP2 hardware also contains a powerful digital I/O sub-system, offering eight bits of digital input and eight bits of digital output as well as a dedicated trigger input connected to a BNC on the front panel. The first four bits of both input and output port and the trigger input have LED monitors for a quick indicator of bit state. The bits of these ports can be programmed individually or as a 'digital word' and used in a variety of ways within the RP2 processing circuit. The RP2 is interfaced to the analog world via a two channel 24-bit analog to digital converter and a two channel 24-bit digital to analog converter. The RP2 system's I/O buffer handles +/- 10 Volt signals with excellent signal to noise performance. The RP2 contains a 100 kHz (50 kHz BW) A/D and a 200 kHz (100 kHz BW) D/A, while the RP2-5 has a 50 kHz (25 kHz BW) A/D and D/A. Both devices allow for user programmable sampling rates from the specified maximum down to 6.25 kHz. A special calibration program is used to calibrate the RP2's analog I/O offering very small gain and DC errors. System 3 Manual RP Processors 4-9 Real-Time Processor Technical Specifications DSP 50 MHz Sharc 21065, 150 MFLOPS Memory RP2: 16 MB SDRAM RP2.1: 32 MB SDRAM RP2-5 has no SDRAM A/D 2 channels, 24-bit sigma-delta Frequency Response DC - 0.84 * Nyquist (1/2 sample rate) RP2.1: DC - 82 kHz maximum RP2: DC - 41 kHz maximum RP2-5: DC - 21 kHz maximum S/N (typical) 105 dB (20 Hz to 20 KHz), 95 dB (20 Hz to 50 KHz) Distortion (typical) -95 dB for 1 KHz input at 5 Vrms A/D Sample Rate RP2.1: 195.312 kHz maximum RP2: 97.656 kHz maximum RP2-5: 48.828 kHz maximum Sample Delay RP2.1: 65 samples RP2: 41 samples D/A 2 channels, 24-bit sigma-delta Frequency Response DC - 0.84 * Nyquist (1/2 sample rate) RP2.1: DC - 82 kHz maximum RP2: DC - 41 kHz maximum RP2-5: DC - 21 kHz maximum S/N (typical) 105 dB (20 Hz to 20 KHz), 95 dB (20 Hz to 50 KHz) Distortion (typical) -95 dB for 1 KHz output at 5 Vrms D/A Sample Rate RP2.1: 195.312 kHz maximum RP2: 97.656 kHz maximum RP2-5: 48.828 kHz maximum Sample Delay RP2.1: 30 samples RP2: 30 samples Digital Inputs 8 bits + 1 TRIG input System 3 Manual 4-10 RP Processors Digital Outputs 8 bits System Reset Force input (see following section on how to reset) Input Impedance 10 kOhm Output Impedance 10 Ohm DB25 Connector Pin Out Pin Name Description Pin Name Description 1 GND Ground 13 GND Ground 2 NA Not Used 14 VCC 3.3V (1A Max) 3 DI1 Digital Input Bits 15 DI0 Digital Input Bits 4 DI3 16 DI2 5 DI5 17 DI4 6 DI7 18 DI6 7 DO1 19 DO0 8 DO3 20 DO2 9 DO5 21 DO4 10 DO7 22 DO6 11 NA Not Used 23 NA 12 Force Used to reset the RP2.1 24 Digital Output Bits Digital Output Bits Not Used 25 Note: TDT recommends the PP16 Patch Panel for accessing digital I/O. Important!: Force is used to reset the RP2.1, including deleting the device's microcode. It has no function in data acquisition or manipulation. To reset the device: Connect a wire (or paper clip) from pin 12 to pin 13 on the Digital I/O port. System 3 Manual RP Processors 4-11 With pins 12 and 13 shorted, open the RPProg System 3 Device Programmer and select the device type (RP2) and interface in the #1 Connection group. If necessary, select the desired device ID in the #2 Erase group. When the device is selected the device name in the #3 Program group will be similar to "G21K_(1)". Next click the Browse button next to the uCode File field and select RP21.dxe. Remove the short from pins 12 and 13, and click the Program Device! button. Do not use your computer until the device reprogramming is complete (approximately five minutes). System 3 Manual 4-12 RP Processors RV8 Barracuda Barracuda Overview The Barracuda features include nanosecond accurate event-timing, fast DAC's for high frequency stimulus presentation and user control of sample frequencies. In addition the Barracuda gives users precise control over stimulus presentation. The system has 16-digital inputs, 8-digital outputs, and 8 analog outputs. Power and Communication The RA16 mounts in a System 3 zBus Powered Device Chassis (ZB1PS) and communicates with the PC using any of the zBus PC interfaces. The ZB1PS is UL compliant, see the ZB1PS Operations Manual for power and safety information. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see the RPvdsEx Manual. Nanosecond Event-Timing The Barracuda is a nanosecond accurate event timer. The TimeStamp component uses the highspeed clock on the system to record when a TTL event occurred during a sampling period. This means that event times are independent of sample rate. When an event occurs the TimeStamp sends out the time in microseconds from the start of that sample period. At the end of each sample period the event timer is reset to zero. In the figure below three events occurred during a sample period of ten microseconds. For each digital input a unique time stamp is recorded for that sample period. System 3 Manual RP Processors 4-13 Fast Digital-Analog Converters The Barracuda ships with PCM DAC's with up to 500 kHz sample rate. The fast DAC's can be used for high frequency presentations. In addition the Barracuda's PCM DAC's give users precise control over voltage outputs for microelectrode stimulation. Variable Sample Frequency The Barracuda allows users to set the sample period in 40 nanosecond steps. Users can select sample frequency from 10 to 500,000 Hz. User Control of System Devices The Barracuda has two control modes: Free-run and Triggered. In Free-run mode the circuit runs continuously and gating functions are required to control the signal outputs and inputs. In Trigger mode the circuit only runs after it has been triggered. It then runs for a set number of samples and then stops. The system can be triggered once or multiple times. The circuit must be reset before it can trigger again. Gating functions are not required for turning on and off stimuli. Additional Features To simplify signal synchronization it is possible to send out the sample clock and the system clock (50 MHz) on the digital outputs. Users can also send out the sample clock period. Barracuda Features Trigger Takes an external TTL pulse and triggers components (free run mode) or triggers the circuit (trigger mode). System 3 Manual 4-14 RP Processors Status Lights The status lights indicate the state of the RV8. Armed, Running, DC (DoCount), and FreeRun. Combinations of the status light describe the state of the RV8. Free Run Mode Free Run Mode w/Circuit Running Trigger Mode Trigger Mode with System Armed Trigger Mode with System Running: Digital Input Lights Lights are on when there is a TTL pulse on the digital input line. Pulse times may be too brief to see in many cases. Only channels 0-7 have indicator lights. Digital Output Lights Lights are on when a TTL pulse is sent out of a digital output line. All eight channels (0-7) have a TTL indicator light. 25-pin Connector for Digital Inputs and Outputs A 25-pin connector gives access to all 24 channels of digital I/O. The pin outs for the connector are shown in the technical specifications, page 4-17. TDT provides the PP16 with 24 connectors to give users easy access to all the digital output channels of the Barracuda. Barracuda Device Setup The Barracuda has several additional features not found in other RP devices. An expanded dialog box opens after selecting the RV8 option. System 3 Manual RP Processors 4-15 Bandwidth and Timing Standard Sample Rates are in powers of two from 6 kHz to 400 kHz. The actual sample rate is given in the box to the right. Arbitrary Sample Rate can be from 10 Hz to 500,000 Hz. In the Arbitrary Sample Rate box type a number between 10 Hz and 500,000 Hz. To reset to the Standard Sample Rates type 0 in the Arbitrary Sample Rate box. To determine the true sample rate click Check Realizable. The sample rate is based on the system clock (25 MHz) or a sample period of 40 nanoseconds (40 * 1009 ). To calculate the true sample rate, take the reciprocal of the required sample period in seconds. Device Configuration Parameters The device configuration parameters allow RPvdsEx access to unique features on the RV8. To access a particular parameter either double-click on the parameter name or click on the parameter and click the Modify button. To reset the parameter value to the default mode click Clear. Special Mode The Special Mode is a bit-masked value that determines which features of the Barracuda are activated. The default mode for the Special Mode is zero. This makes the system behave like other RP devices. There are seven modes that are accessed through the bit-mask shown below. Special Mode can be accessed with the ActiveX controls SetDevCfg and GetDevCfg. System 3 Manual 4-16 RP Processors Bitnumber Enabled Value Name Function 0 1 DoCount Sets up system to run under trigger mode. 1 2 AutoClr Clears the DAC out buffers after a trigger event. 2 4 TickOut Sends a pulse at the beginning of each tick period on Digital Out 7. Pulse length is 40 nanoseconds. 3 8 ClkOut Sends pulses at 1/2 the clock frequency (25 MHz). 4 16 UseZTRGA Starts the Barracuda when a ZtrgA goes high. Only works in the trigger mode (must also have bit-number 1 enabled). 5 32 UseZTRGB Starts the Barracuda when a ZtrgB goes high. Only works in the trigger mode (must also have bit-number 0 enabled). 6 64 UseEXTR Starts the Barracuda using the external trigger. Only works in the trigger mode (must also have bit-number 0 enabled). 7 128 MTRIG Enables multiple trigger mode. Users can repeatedly trigger the Barracuda without stopping and rerunning the circuit. 0=Very Large Number of Triggers The Special Modes are set with a bit-masked pattern. For example, to set the trigger mode using a zTRGA the value for the Special Mode would be set to 1 + 16 or "17". To use the Mtrig function the value would be 1 (DoCount) + 16 (UseZTRGA) + 128 (MTRIG) or "145". DoCount Enable DoCount to use the trigger mode. If this is not enabled then the device is in free-run mode. AutoClr AutoClr works in trigger mode. AutoClr clears the output of the DAC's to zero after the last value is played. Otherwise the output of the DAC is set to the last value converted. Trigger Mode In trigger mode the circuit only runs after it has been triggered. After a trigger it runs for set number of samples and then stops. Using the trigger mode requires three steps: Set the value of the Special Mode parameter. This value is a bit-masked value. To calculate the value needed sum the individual bit-masks (see above). The bit-masks include DoCount (1) the trigger mode (16, 32 or 64 depending on what trigger option) and possibly enabling MTRIG (128). Determine the number of samples that the circuit runs. The Barracuda can play out over 4 Gsamples (4*109 samples) on one trigger. Sample Counter (Low 16) sets the sample number between 0 and 65535 Sample Counter (High 16) sets it between 65536 and a large number. For example, to play out 80000 samples the Sample Counter (High 16) would be set to 1 (65,536) and Sample Counter (Low 16) to 14,464. Load and trigger the circuit. System 3 Manual RP Processors 4-17 Sample Count Options Sample count parameters set the number of samples the circuit will run. The Sample Counter (Low 16) values are between 0 and 65536 (lower 16-bits of data). Sample Counter (High 16) values are multiples of 65536. For example, a value of 2 in Sample Counter (High 16) will cause the circuit to run for 131,072 samples. If the system needed to run for 200,000 samples you would set Sample Counter (High 16) = 3 (196,608 samples) and Sample Counter (Low 16) = 3,392. Sample count is only used when in trigger mode. At all other times the circuit is free running. Sample Counter (Low 16) = the lower 16bits of the sample counter (0-65535) Sample Counter (High 16) = the upper 16bits of the counter. A value of 1 in Sample Counter (High 16) = 65536. Logic User selects whether a high voltage on a digital line is a logical 1 or logical 0 on the Barracuda. The default state for a high voltage on a digital line is 1 (high true). Setting InLogic = 1 inverts the logic (low true) and makes a high input voltage produce a 0 and a low input voltage produce a 1. Similarly, when setting OutLogic = 1, a high voltage on a digital output line will produce a 0 and a low voltage will produce a 1. Software Control The Barracuda has two modes: free-run and trigger. In free-run mode the circuit is always running and signals are constantly generated, acquired, and filtered. In the trigger mode the circuit runs for a set length each time it is triggered. The advantage of the trigger mode is that some circuit design is simplified. The example below shows two circuits that present a tone burst of 100 milliseconds. The first circuit works under the free-run mode and the second with trigger. Free-Run Mode [1:4,0] [1:5,0] Tone Amp=1 Shft=0 Freq=1000 Phse=0 Rst=Run LinGate [1:2,0] Schmitt Trf=10 Ctrl=Closed cO Ch=1 [1:6,0] Thi=100 Tlo=10 [1:1,0] Src=Soft1 Trigger Mode [1:1,0] Tone Amp=1 Shft=0 Freq=1000 Phse=0 Rst=Run cO Ch=1 [1:2,0] The first circuit requires three additional components: LinGate gates the output on and off, Schmitt opens and closes the gate and Src (Soft1) starts the Schmitt trigger. The second circuit requires that the Barracuda be controlled from the trigger mode. Trigger mode is accessible within RPvdsEx or from the ActiveX controls. System 3 Manual 4-18 RP Processors TimeStamp The TimeStamp component is unique to the Barracuda and Multifunction Processor (RX6). The event-timer, with its submicrosecond accuracy, is independent of the sample period. This allows users to have separate control of both slow processes, such as button presses, and fast events, such as neural activity, all on one circuit with little or no loss of processing power. PCM DAC Outs The PCM DACs have a sample delay of only 2 samples. This makes them ideal for use with time critical presentation of signals. These DACs are excellent for neurophysiological stimulation for examining motor behavior. Multiple Triggering Multiple triggers allow users to repeatedly trigger the Barracuda without resetting (Halting and then Running the chain). To use multiple triggering with RPvdsEx add the bit-masked value of 128 to the Special Mode value. For example, to configure the Barracuda for multiple triggering from the zBUSTrigA, you would set the value to 1 (Trigger Enabled) + 16 (ZbusTRIGA) + 128 (multiple triggers). RPvdsEx has no way to control the number of presentations. To generate an RPvdsEx circuit for multiple triggering, use the Setup Device command on the Implement menu to open the Set Hardware Parameters dialog box, then modify the Special Mode register. Use the bit-masked values for the Special Mode to make a circuit trigger off either the zBUS or external trigger. In general this will be 1(trigger mode enabled) + (trigger type) + 128 (mTrig enabled). The multiple trigger does not require the addition of the trigger component. The circuit runs when the trigger pulses high. The RPvdsEx circuit will trigger for a near infinite number of times before stopping. Arbitrary Sample Rates The Barracuda is the only System 3 module that has arbitrary sample rates. To set the arbitrary sample, click Device Setup on the Implement menu, and then set the sample rate in the Arbitrary Sample Rate box. To check the true sample rate, click Check Realizable. This will display the true sample rate. Sample periods are in increments of 40 nanoseconds. To calculate the true sample rate determine the sample period in seconds that you require and then divide by 1/(sample period). These circuits work only with the Barracuda. If the circuit is run on a different RP module it will give the following error: RP Control Object files (RCO) will produce similar problems. If you attempt to run an RCO file (compiled RPvdsEx files for use with ActiveX controls and turn-key software programs) that has an arbitrary sample rate on another RP device the same error will occur. Using the TimeStamp Component The TimeStamp component is an event timer with submicrosecond accuracy. With other RP systems the resolution of the TimeStamp is no better than the sample clock period. TimeStamp uses the system clock to determine when, within a sample period, the event occurred. After each sample period the TimeStamp component is reset. System 3 Manual RP Processors 4-19 The diagram below shows how TimeStamp works. The first event occurs 2.2 microseconds after the start of the first sample period so a value of 2.2 is generated. The second event occurs 7.04 microseconds after the start of the second sample period so a value of 7.04 is generated. The circuit below saves the event time (in microseconds) to a SerStore buffer. The circuit has two parameter tags: InputBit and data. The InputBit tag sends the digital input channel number (to which the Event trigger will be sent) to the TimeStamp. This determines which of the Barracuda's digital input lines will be monitored for triggers. The data tag reads the stored event-time data to a PC buffer. A software trigger resets the SimpCount, starting the clock, and will also reset the TimeStamp component and the SerStore buffer. The SimpCount increments the count value at every sample tick. The ScaleAdd divides the SimpCount output by the sample period (40.96 microseconds) to keep track of the time in milliseconds. When an event is detected, the TimeStamp output is added to the SimpCount output to get the event time in microseconds. Reset [1:1,0] Src=Soft1 [1:8,0] [1:9,0] [1:10,0] [1:11,0] SimpCount Int2Float ScaleAdd SerStore Rst=0 Enable=1 SF=1 [1:5,0] SF=4.096e-005 Shft=0 Reset Data Size=1000 Rst=0 WrEnab=1 Index=0 {>Data} TimeStamp InputBit Reset BitNum=0 Rst=Run Enab=Yes Strobe=0 ActiveX The Barracuda uses two additional ActiveX methods SetDevCfg and GetDevCfg. Detailed information about them is included in the ActiveX help. System 3 Manual 4-20 RP Processors Barracuda Technical Specifications Specifications for the RV8 Barracuda Processor. DSP 50 MHz Sharc 21065, 150 MFLOPS Memory 32MB SDRAM Digital Inputs 16 bits + 1 TRIG input Digital Outputs 8 bits Analog Outputs 8 Channels Input Impedance 10 kOhm Output Impedance 10 Ohm DB25 Connector Pin Out Pin Name Description 1 Do0 2 Digital Output Channels Pin Name Description 14 Do1 Do2 15 Do3 3 Do4 16 Do5 4 Do6 17 Do7 5 GND Ground 18 Di0 6 Di1 Digital Input Channels 19 Di2 7 Di3 20 Di4 8 Di5 21 Di6 9 Di7 22 Di8 10 Di9 23 Di10 System 3 Manual Digital Output Channels Digital Input Channels RP Processors 4-21 11 Di11 24 Di12 12 Di13 25 Di14 13 Di15 Option I/O DB9 Connector Pin Out Pin Name Description 1 AGND Analog Ground 2 A1 Analog Channels 3 A2 4 A3 5 A4 6 A5 7 A6 8 A7 9 A8 System 3 Manual Part 5 RM Mobile Processors System 3 Manual 5-2 RM Mobile Processors ~ System 3 Manual RM Mobile Processors 5-3 RM Mobile Processors The RM Family The System 3 platform includes two self-contained real-time processors: the Mini Processor and the Mobile Processor. Designed as an affordable test-bed system for designing and debugging RPvdsEx circuits, each device includes stereo A/D and D/A, an adjustable onboard speaker, and can drive headphones at up to 100 dB SPL. The devices draw power from the USB interface of the computer and work well with laptop computers for maximum portability. These economical mobile systems can also be used for basic psychoacoustics. For detailed information on each member of the RM family check the technical specifications of the module. Power Requirements Power is provided across the USB connection to a host PC. The RM draws approximately 300 mAmps from a 6 Volt input. The draw on a portable PC battery will depend on the power requirements of the portable PC and the properties of the battery. In many cases, the user may see less than 10% decrease of the battery life. Users can attach an external power supply such as an AC adapter (available on request) or an external pack such as a motorcycle battery (input range of 6-9 Volts). Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx). Circuits are loaded to the processor through TDT run-time applications or custom applications. This manual includes device specific information needed during circuit design. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see the RPvdsEx Manual. Mobile Processor Hardware The RM1 Real-time Mini Processor and RM2 Mobile Processor combine a signal processor, a power supply, and a computer interface in one small form factor. The RM consists of an Analog Devices Sharc floating point DSP with surrounding analog and digital interface circuits and 32 MB of memory for data storage and retrieval. The RM2 also includes a fiber optic connection for the RA4/RA16PA Medusa amplifier. D/A and A/D The RM is equipped with stereo 24-bit sigma-delta A/D and D/A that can sample at rates up to 97.656 kHz. Sigma-delta converters provide superior conversion quality and extended useful System 3 Manual 5-4 RM Mobile Processors bandwidths, at the cost of an inherent fixed group delay. For the RM1 and RM2, the DAC Delay is 17 samples and the ADC Delay is 16 samples. Digital Input/Output Bits The TTL I/O circuits include four bits of digital input and four bits of digital output that are accessed via the 9-pin connector on the back of the RM. BitO can also be accessed through a BNC connector on the front panel. The RM's digital I/O can be used to implement triggers, time trigger responses, and light LEDs. Analog Output The RM is equipped with an external speaker for use when previewing stimulus during the circuit design process. The RM's stereo analog output can drive a headphone at up to 100 dB SPL. USB Input Port An USB Input port allows multiple devices to be connected for increased processing power. Mobile Processor Front Panel Features Bit0 The BNC connector for Bit0 allows for a direct input or output to the first bit of the RM device. This allows for a more convenient connection for a typical trigger input. Access to the other digital inputs and outputs are from a 9-pin connector on the back panel. Status Lights The status lights indicate the state of the RM. Power The power light indicates that the device is connected to a power supply. The power may be supplied by an external power supply or by a computer (powered on) via the USB interface. Comm (Communication) The communication light blinks when the device is sending or receiving information to or from the PC. (This requires the system to be connected to a PC.) Err (Error) or Amp (RM2) The error light indicates one of the following: An error communicating with the host PC. An error communicating with the RA4/RA16PA (RM2 Only) Status The status light blinks when a circuit is running. The rate at which the light blinks is a general indicator of cycle usage, with faster blinking indicating a higher cycle usage. Bits Lights Bit lights indicate when a bit input is set high. The LED(s) will light if the input signal is set high or if the output bit is set high. Voltage high is 3.3 volts and voltage low is nominal 0 Volts. Access to the digital I/O port is through a 9-pin connector on the back panel. The Bit In's are set logical high by default. System 3 Manual RM Mobile Processors 5-5 Analog I/O The analog inputs and outputs use a 1/8" stereo plug and deliver or accept a +/- 1 Volt signal with a dynamic range of over 45 dB. The RM uses 24-bit Sigma-delta A/D and D/A converters. In The maximum analog input is +/- 1 Volt with a peak sample rate of 97.656 kHz. The input impedance is 10 kOhm. Out The maximum analog output is +/- 1 volt with a peak sample rate of 97.656 kHz. The low-level output impedance (10 Ohm) of the system allows users to drive earphones at up to 100 dB SPL. Because of the 0.16 Hz high pass filter on the D/A converter, the RM cannot play out DC or very low frequency (<1 Hz) signals. Level The RM has an internal speaker that is driven by channel 1 output. The Level knob controls the volume of the speaker and analog channels 1 and 2 when connected to the 1/8” audio jack labeled OUT. To achieve the full output level specified in your circuit on these two channels, set the Level knob to Max. Mobile Processor Back Panel Features USB In The USB input on the RM acts as a USB hub. Multiple RM devices can be ganged together to increase signal processor power. A standard USB, A to B, cable is required for setup. USB Out The USB output connects either to another RM device, a UB4, or to the host computer's USB interface. The RM can be connected to PCs with either USB 1.1 or USB 2.0 hubs. Digital I/O The female DB-9 connector allows direct access to the digital inputs and outputs. Pinout information is provided on the label above the connector. Bits 0 - 3 (which map to pins 5, 9, 4, and 8 on the male DB-9 connector) are inputs and bits 4 - 7 (which map to pins 3, 7, 2, and 6 on the male DB-9 connector) are outputs. Ground is labeled G (which maps to pin 1 on the male DB-9 connector). Note: The digital lines drive about 25 milliamps. Amplifier (RM2 only) A fiber optic connector is found on the RM2 for use with the Medusa RA4/RA16 preamplifier, the Loggerhead RA8GA, and the associated headstage assemblies. Ext. Pow. (External Power) An external power supply can be used as an alternative to drawing power from the USB connection. An adapter allowing the device to be powered form an AC power source is available upon request. A battery with an output range of 6-9 volts, such as a motorcycle battery, could also be used to power the device. TDT recommends separate external power sources when using multiple RM devices. System 3 Manual 5-6 RM Mobile Processors Mobile Processors Digital Input/Output The Mobile Processors are equipped with 8 bits of programmable digital input/output, accessed via the Digital I/O 9 pin connector on the back panel. See the Mobile Processor Technical Specifications for a pinout diagram. Note: The digital lines drive about 25 milliamps. Configuring the Programmable I/O Lines All 8 digital lines are independently configurable as inputs or outputs. By default, bits 0-3 are configured as inputs and bits 4-7 are configured as outputs. In RPvdsEx, bits 0-7 in the bit configuration register control the configuration of the eight addressable bits as inputs or outputs. Setting a bit to one will configure that bit as an output. To access the bit configuration register: Click the Device Setup command on the Implement menu. In the Set Hardware Parameters dialog box, click the Type drop-down box and select RM1 or RM2 from the list. The dialog expands to display the Edit Bit Dir Control dialog box. System 3 Manual RM Mobile Processors 5-7 Click Modify to display the Edit Bit Dir Control dialog box. In this dialog box, a series of check boxes are used to create a bitmask that is used to program all bits. To enable the check boxes, delete Und from the Decimal Value box. To determine the desired value, select or clear the check boxes. By default, all check boxes are cleared (value = 0). Click the check boxes for desired bits (0 -7) to set the bit to one and configure that bit as an output. Note: Modifying any of the bits will change the default configuration (by default, bits 0-3 are inputs and bits 4-7 are outputs). When the configuration is complete, click OK to return to the Set Hardware Parameters dialog box. Using the RM2 Fiber Optic Port The RM2 Fiber Optic Port can be used with a Medusa or Loggerhead preamplifier; however, it is unlikely that a single RM2 device can acquire 16 channels of high frequency activity. Instead we recommend that the RM2 be used for low channel count (up to four channels) high sample rate acquisition or for high channel count low sample rate activity (e.g. 16 channels of slow EEG activity). Using the RM2 as part of a Medusa/Loggerhead system effectively provides two channels of high quality A/D inputs and up to 16 channels of signal input running at 25 kHz. The signal input lines accessed via the analog I/O and fiber optic port are mapped as described below to allow for simultaneous use of the high quality A/D and the amplifier input channels. RM2 Channel RM2 Channel Analog I/O Input Channel 1 Channel 1 Amp Channel 8 Channel 24 Analog I/O Input Channel 2 Channel 2 Amp Channel 9 Channel 25 Amp Channel 1 Channel 17 Amp Channel 10 Channel 26 Amp Channel 2 Channel 18 Amp Channel 11 Channel 27 Amp Channel 3 Channel 19 Amp Channel 12 Channel 28 Amp Channel 4 Channel 20 Amp Channel 13 Channel 29 Amp Channel 5 Channel 21 Amp Channel 14 Channel 30 Amp Channel 6 Channel 22 Amp Channel 15 Channel 31 Amp Channel 7 Channel 23 Amp Channel 16 Channel 32 For more information about the medusa, see the RA16 Medusa Amplifier, page 6-20. System 3 Manual 5-8 RM Mobile Processors Software Control for the Mobile Processor In general, the RM processors can use any circuit that has been designed for the RP2.1. There are a few caveats that relate to the number of digital inputs and outputs, the positioning of the input channels from the fiber optics on the RM2, and the maximum signal voltage. Digital I/O The RM has only eight digital I/O channels. Circuits that use more than four TTL outs or four TTL ins will not work with the RM. RM2 Acquisition Channel Input The channels from the preamplifier to the RM2 are mapped so that the system can acquire from both the high quality analog inputs and the preamplifier. For acquisition channels across the fiber optic connection, channel numbers are offset by 16. Channel one from the preamp maps to channel 16 of the RM2, channel two maps to 17, and so forth. Users must modify existing circuit designs and OpenEx files by setting an offset value to match the channel organization of the RM2. There is no fiber optic repeater to allow multiple RM2s to be linked for data acquisition from a single preamplifier. All acquisition from the preamplifier must take place on a single RM2. Signal Voltage The maximum signal voltage for acquisition and presentation is +/- 1 volt. Circuits that have components generating signals greater than +/- 1 volt will cause the device to clip either on input or output. Mobile Processor Technical Specifications Technical specifications for the RM1 and RM2 processors. DSP 50 MHz Sharc 21065, 150 MFLOPS Memory 32 MB A/D 2 channels 24-bit sigma-delta A/D S/N (typical) 85 dB (20 Hz to 20 kHz) Distortion (typical) 80 dB for 1 kHz input at 630 mV rms Sample Delay 16 samples D/A 2 channels 24-bit sigma-delta D/A S/N (typical) 85 dB (20 Hz to 20 kHz) Distortion (typical) 80 dB for 1 kHz input at 630 mV rms Sample Delay 17 samples Highpass Filter 0.16 Hz System 3 Manual RM Mobile Processors 5-9 Digital I/O 8 user selectable System Reset Front panel next to ERR light Input Impedance 10 kOhm Output Impedance 10 Ohm RM2 Fiber Optic Inputs Input up to 16 channels Sampling Rate 24.414 kHz max Digital I/O DB9 Female Connector Pin Out Pin Name Description 1 GND Ground 2 D6 Digital Input/Output Channels 3 D4 4 D2 5 D0 6 D7 7 D5 8 D3 9 D1 System 3 Manual Part 6 Preamplifiers System 3 Manual 6-2 Preamplifiers ~ System 3 Manual Preamplifiers 6-3 PZ2 Preamplifier Overview The PZ2 is a high channel count preamplifier suitable for extracellular recordings. The PZ2 preamplifier features a custom 18-bit hybrid A/D architecture that offers the advantages of Sigma-Delta converters at significantly lower power and a fast fiber optic connection capable of simultaneously transferring up to 256 channels. The extended bandwidth offered by this connection supports sampling rates up to ~50 kHz and improves signal fidelity, spike discrimination, sorting, and analysis. Used exclusively with ZSeries base stations, PZ2 preamplifiers are available in 32, 64, 96, 128, or 256-channel models. Note: When sampling at a rate of ~50 kHz only the first 128 amplifier channels will be available. System Hardware All PZ2 channels are organized into groups of 16 channel banks with each bank corresponding to a rear panel headstage connector and front panel LED display. Recorded signals are digitized, amplified, and transmitted to the RZ2 base station via a single fiber optic connection for further processing. In addition, configuration information is sent from the RZ2 to the PZ2 preamplifier across the fiber optic connection. A standard configuration for neurophysiology recordings includes electrodes (chronic or acute), one or more Z-Series high impedance headstages, a PZ2 preamplifier, and an RZ2 base station. Hardware Set-up The diagram below illustrates the connections necessary for PZ2 preamplifier operation. PZ2 Back Panel Z-Series Headstages 16 channels per bank 49-64 33-48 RZ2 Back Panel 17-32 1-16 In PreAmp Zbus Out Out In Charger Connect Out In Zbus Interface System 3 Manual 6-4 Preamplifiers One or more Z-Series headstages can be connected to the input connectors on the PZ2 back panel. A 5-meter paired fiber optic cable is included to connect the preamplifier to the base station. The connectors are color coded and keyed to ensure proper connections. The PZ2 battery charger connects to the round female connector located on the back panel of the PZ2 preamplifier. Important!: To avoid introducing EMF noise, DO NOT connect the charger to the PZ2 while collecting data. Powering ON To turn the preamplifier on, move the three position battery switch located on the front panel of the PZ2, to either the Bat-A or Bat-B position. Powering OFF To turn the preamplifier off, move the three position battery switch located on the front panel of the PZ2, to the OFF position. Important Note: Channels are grouped by 16-channel banks and each bank will only power up when a headstage is connected. This design helps to increase battery life. PZ2 Software Control The preamplifier’s hardware operation (power options and indicator LEDs) can be configured using the PZ2_Control macro within the RPvdsEx control circuits running on the RZ2 base station. Double-clicking the macro in RPvdsEx displays the macro properties and allows users to easily configure the macro. Additional information on using the macro is available in the macro properties dialog box. This macro is not required for preamplifier operation but is recommended if the user requires more control over the amplifier power/up or power/down status or front panel LEDs. See the relevant sections below for more information about these features. PZ2 Features Clip Warnings and Activity Display 256 front panel LEDs can be used to indicate spike activity and/or clip warning depending on display mode and configuration. See Display Button and Status LED below for more information. Recording Channel LEDs: When enabled, LEDs for each channel may be lit green to indicate activity or red to indicate a clip warning. Green: Activity | Red: Clip Warning Clip Warning When the input to a channel is greater than -3dB from the preamplifier's maximum voltage input the LED for the corresponding channel is lit red indicating clipping may occur. System 3 Manual Preamplifiers 6-5 Activity Whenever a unit (spike) occurs (the sensitivity threshold can be configured with the PZ2_Control macro) the LED for the corresponding channel is lit green. Note: The LED Indicators are also mirrored on the RZ2 LCD display. Display Button: The Display button located on the front panel of the PZ2 toggles the clip warning and activity display LEDs between software control and standard operation. To toggle between display modes: Press the Display button. Status LED: When recording, the status LED located below the Display button indicates the current display mode of the LED Indicators. Green Software Control of LEDs Use the PZ2_Control macro to configure LED Indicators. LEDs are turned off until enabled through software control. Orange LEDs enabled for standard operation In this mode, LEDs are automatically enabled for default activity and clip warning display as described above. External Ground A banana jack located on the back of the PZ2 (directly to the right of the charger input) provides connections to common ground for the first bank of channels (1-16). Battery Overview The PZ2 preamplifier features two Lithium ion batteries to allow for longer record times. A threeposition switch selects the active battery between Bank-A, Bank-B, or both banks off. Maximizing Battery Life To increase battery life, individual banks of channels will only power up when a headstage is connected to the corresponding input. The PZ2_Control macro can also be added to the circuit running on the RZ2 to further specify how PZ2 channel banks are powered. When a headstage is connected, banks may be powered on or off statically through the Power Control options within the macro or dynamically by using the PZ2_Control macro inputs. See the internal macro help for more information. Battery Status LEDs System 3 Manual 6-6 Preamplifiers Battery Level: Eight LEDs indicate the voltage level of the selected battery. These LEDs can be found on the front of the PZ2 preamplifier by the heading Level. When the battery is fully charged, all eight LEDs will light green. When the battery voltage is low, only one green LED will be lit. If the voltage is allowed to drop further, the last LED will flash red. TDT recommends charging the battery before this flashing low-voltage indicator comes on. While charging, the Level LEDs will flash green. Status Description 8 Green Fully Charged 1 Green, 7 Unlit Low Voltage 1 Flashing Red Low Voltage - Charge Immediately! 8 Green Flashing Charging in Progress Charging the Batteries Operate the preamplifier with the charging cable disconnected. Connecting the PZ2 charger will simultaneously charge both batteries. TDT recommends putting the three-position switch in the OFF (middle) position while charging the PZ2. Charging Indicators: When powered on, the PZ2 battery status LEDs are also used for each battery to indicate which battery, if any, is charging. These LEDs are found next to the Level LEDs by the headings -A- and -B-. A green indicator denotes the battery bank is fully charged while a red indicator designates the battery is currently charging. When the device is in operation (charger is not connected) the -A- and -B- LEDs are not lit. Status Description Red Charging Green Fully Charged Unlit Operation Mode (charger not connected) An external battery pack is also available to provide longer battery life for extended recording sessions. See page 6-20. System 3 Manual Preamplifiers 6-7 PZ2 Technical Specifications Technical specifications for the PZ2 Z-Series Preamplifier. A/D Up to 256 channels, 18-bit hybrid Maximum Voltage In +/- 10 mV Frequency Response 3 dB: 0.35 Hz – 7.5 kHz 6 dB: 0.2 Hz – 8.5 kHz Anti-Aliasing Filter 4th order Lowpass (24 dB per octave) S/N (typical) 73 dB Distortion (typical) < 1% A/D Sample Rate Up to 48828.125 Hz* Input Impedance 105 Ohms Power Requirements 2 Lithium Ion cells at 10 AmpHours each Battery Eight hours to charge both cells Battery life between charges, per cell: 32 ch ~ 13 hrs 64 ch ~ 11 hrs 96 ch ~ 9.5 hrs 128 ch ~ 8 hrs 256 ch ~ 5 hrs Charger External 6VDC, 3A power supply Indicator LEDs Up to 256 status or clip warning, battery life, active battery bank Input inferred noise 2µV rms typical 300- 7000Hz, 8µV peak typical Fiber Optic Cable 5 meters standard, cable lengths up to 20 meters** *Note: When sampling at a rate of 48.828 kHz the PZ2 preamplifier is limited to a maximum of 128 channels. **Note: If longer cable lengths are required, contact TDT. Input Connectors PZ2 Preamplifiers have up to 16, 26-pin headstage connectors on the back of the unit. A1 – A16 represent the 16 channels coming from each connected headstage. The PZ2 channels are marked System 3 Manual 6-8 Preamplifiers next to the respective connector on the preamplifier. So, for the connector for channel 1 – 16, A1 is channel 1 while on the connector for channels 17 – 32, A1 is channel 17. Important!: Each input connector uses its own unique ground and reference. When using multiple headstages, ground pins on all headstages should be connected together to form a single common ground. See the Headstage Connection Guide, page 6-38 for more information. Pinout Diagram Pin Name Description Pin Name Description 1 A1 14 V+ 2 A2 3 A3 16 GND 4 A4 17 V- 5 Ref 6 HSD Headstage Detect 19 HSD 7 A5 20 A6 8 A7 21 A8 9 A9 10 A11 Analog Input Channels Reference Analog Input Channels Positive Voltage 15 GND Ground Negative Voltage 18 HSD Headstage Detect 22 A10 23 A12 11 A13 24 A14 12 A15 25 A16 13 GND Ground 26 NA Analog Input Channels Not Used Note: TDT technical support (386-462-9622 or support@tdt.com) before attempting to make any custom connections to pins 6, 18, or 19. System 3 Manual Preamplifiers 6-9 PZ3 Low Impedance Amplifier Overview The PZ3 is a high channel count, low impedance amplifier well suited for ECOG, Evoked Potentials, EEGs, LFP’s, EMGs, and other similar recording applications. Available in 32, 64, and 128 channel models, the PZ3 amplifier offers shared or true differential operation, low input inferred noise, impedance checking, and an optional high input range mode. System Hardware A standard configuration for low sample rate, low impedance recordings includes 1.5 mm TouchProof connectors for electrodes, a PZ3 amplifier, and an RZ2 base station. The battery powered PZ3 digitizes and amplifies signals recorded from each of the electrode channels. All digitized signals are sent via a single fiber optic connection to the RZ2 base station for further processing. The RZ2 also sends amplifier configuration information to the PZ3 across the fiber optics. The diagram below illustrates this flow of data and control information through the system. Electrode Signals to be Amplified High-speed Interface Software control and data transfer. LI-CONN-Z Electrodes or Breakout Box PZ3 Amplifier Filters and amplifies signals from electrodes RZ2 Base Station Analysis of acquired signals and PZ3 control PC Fiber Optic Connection Digitized data to be processed sent to the RZ2 Configuration information sent from the RZ2 to the PZ3 PZ3 Data and Control Flow Diagram System 3 Manual 6-10 Preamplifiers Recording Modes The PZ3 supports two recording modes: Individual Differential and Shared Differential. For Individual Differential (true differential) operation, the amplifier inputs are grouped into banks of eight recording (+) channels, each with a paired alternate indifferent (-) channel (inverting channel). Individual (True) Differential, Bank 1 and 2 Functional Diagram For Shared Differential operation, each bank of channels uses a separate shared reference. Shared Differential, Bank 1 and 2 Functional Diagram The PZ3’s impedance checking and a high voltage range features can be used in both true and shared differential modes. System 3 Manual Preamplifiers 6-11 It is also important to note that in the various modes of operation, the RZ2 processor may use the alternate channels to report information such as impedance values or RMS. This occurs at the software level on the RZ2. For example, in Shared Differential mode the RZ2 maps RMS levels for each channel to the alternate channels. See the An external battery pack is also available to provide longer battery life for extended recording sessions. See page 6-20. PZ3-RZ2 Channel Data Chart on page 6-17 for more information. Electrode Connectors The PZ3 is designed to record from low impedance electrodes and electrode caps with input impedances less than 20 kOhm. Signals are input via multiple DB26 connectors on the PZ3 back panel. A break out box or connector(s) are required for electrode connection. TDT provides a version of our LI-CONN connector for the PZ3: the LI-CONN-Z for Shared Differential mode. It features standard 1.5 mm safety connectors and provides easy connections between electrodes and the amplifier. Hardware Set-up The diagram below illustrates the connections necessary for PZ3 amplifier operation. PZ3 Back Panel LI-CONN-Z(D) Connect to electrodes RZ2 Back Panel 8 or 16 channels with ground and reference In PreAmp Zbus Out Out In Charger Connect Out In Zbus Interface One or more male connectors (such as the LI-CONN-Z) can be connected to the input connectors on the PZ3 back panel. Alternately, custom connectors and a breakout box can be used. If using custom connectors, see pinouts for the PZ3 connectors on page 6-18. Note: In Shared Differential mode no connection should be made to the indifferrent (-) channels. A 5 meter paired fiber optic cable is included to connect the preamp to the base station. The connectors are color coded and keyed to ensure proper connections. The PZ3 battery charger connects to the round female connector located on the back panel of the PZ3 amplifier. Important!: To avoid introducing EMF noise, DO NOT connect the charger to the PZ3 while collecting data. System 3 Manual 6-12 Preamplifiers PZ3 Software Control The amplifier’s mode of operation (shared or individual differential), other options, and channel mapping tasks are handled using PZ3 specific macros within the RPvdsEx control circuits running on the RZ2 Signal Processor. RPvdsEx includes two PZ3 specific macros: PZ3_Control macro PZ3_ChanMap macro PZ3_Control Macro The PZ3 Control macro should be added to your RPvdsEx circuit to configure all hardware features of the PZ3 amplifier. Inputs are available on the macro for enabling/disabling the LED clip status lights, enabling Impedance mode for electrode (+) channels, enabling Impedance mode for alternate indifferent (-) channels, and dynamic power control for channel banks. Macro Options Double-clicking the macro in RPvdsEx, displays the macro properties dialog box and allows users to easily modify macro properties. On the Options tab, in the properties dialog box: Setting the Clip LEDs On to Yes or No enables or disables the LED clip warning indicators. Differential Mode allows the user to select from Shared (Shared Differential) or Individual (True-Differential) modes. Input Range may be set to either 3mV or 20mV input ranges. The Target Impedance option allows the user to specify the impedance threshold for the status LEDs for each channel bank. Three inputs are available on the macro for enabling/disabling the LED clip status lights, enabling Impedance mode for electrode (+) channels, and enabling Impedance mode for indifferrent (-) channels. Under the Power Control tab are additional options that specify how the PZ3 channel banks are powered. Powering Down the Channel Banks Channel banks may be powered down through the macro. As long as the Power Control Mode under the Power Control tab is set to Static, channel banks may only be powered up or down through the Power Control Mode options within the macro. Dynamic mode will allow channel banks to be powered on or off either through both the Power Control Mode options or by inputs on the macro through RpvdsEx components. Each of the letter indexed channel banks in the macro correspond to 32 channels of the PZ3. Selecting No will enable a bank of channels while selecting Yes will power down and disable that bank of channels. System 3 Manual Preamplifiers 6-13 For Example: If you are using a PZ3 with 128 channels, powering down Bank A (Select Yes) would power down the first four blocks of 8 channels of the PZ3, disabling channels 1 – 32. PZ3_ChanMap Macro In the data stream on the RZ2, the odd numbered channels are the recording channels and the even numbered channels can report impedance measurements or RMS values. The PZ3_ChanMap should be added to your RPvdsEX circuit along with the RZ2_Input_MC macro to remap the data stream. The channel mapping macro selects the appropriate channels from the PZ3 input stream and builds two separate, sequential multichannel outputs containing either the amplified waveforms or alternate data (impedances or RMS values). Macro Options The user can set several different options under the Options tab. The designated number of channels to map and output. The ability to enable/disable the impedance measurement output. PZ3 Circuit Example The following illustration shows how macros can be used to create a simple OpenEx acquisition and control circuit for the PZ3. The RZ2_Input_MC macro feeds the circuit with each digitally amplified signal acquired using the PZ3 amplifier. The data is fed first through the PZ3_ChanMap macro which separates the System 3 Manual 6-14 Preamplifiers signals from their impedances (or RMS) values and builds the appropriate multi-channel data stream for further processing. In this case the signals are filtered and stored for post processing. A CoreSweepControl macro is included to handle the required timing functions used by programs such as OpenEx and a PZ3_Control macro configures the operation mode of the PZ3 as well as any additional options that may be necessary. Three parameter inputs allow toggling of clipping LEDs and toggling (+) or (-) channel impedance measurements. PZ3 Operation RCX control circuits running on the base station must include PZ3 specific macros to configure the amplifier’s mode of operation; Shared Differential or Individual Differential and other configuration options such as input range and clip warning display. See PZ3 on page 6-12 for more information. Impedance checking is also available from the front panel. Powering ON To turn the amplifier on, move the three position battery switch to either the Bat-A or Bat-B position. Powering OFF To turn the amplifier off, move the three position battery switch to the OFF position. Operation Modes Recorded signals are acquired in Shared or Individual differential mode. Shared Differential In shared differential mode a single shared reference and a ground are used for each bank of eight recording channels. Note: In this mode no connection should be made to the alternate indifferent (-) channels. Use the LI-CONN-Z connector to ensure proper connections. Enabling Shared Differential Operation To enable shared differential mode, use the PZ3 control macro and under the Options tab set the value of Differential Mode to Shared. Individual Differential When the PZ3 is operating in individual differential mode, each of the 8 (+) channels of an individual bank has a paired (-) differential reference. Note: While operating in this mode no connections should be made to the Shared Reference (pin 5.) Enabling Individual Differential Mode To enable individual differential mode, use the PZ3 control macro and under the Options tab set the value of Differential Mode to Individual. Clip Warnings Analog clipping occurs when the input signal is too large. If analog clipping occurs, TDT recommends switching the PZ3 into high input range mode. For more information see Modifying the Input Voltage Range on the PZ3, page 6-15. System 3 Manual Preamplifiers 6-15 While the amplifier is recording, the front panel LEDs can act as clip warning indicators (according to configuration settings set using the PZ3_Control macro). If an analog signal approaches the PZ3s clipping range, the PZ3 LEDs for the corresponding channel are lit red. Note: The LED Indicators are also mirrored on the RZ2 LCD display. When recording, the status LED located below the Display Mode button indicates the status of the Clip Indicators. Solid green indicates that clip warning is disabled and orange indicates the clip warning is enabled. To enable clip warning, press the Display Mode button on the PZ3 front panel. Alternatively the PZ3_Control macro can be used to enable or disable the clip warning indicators. For more information on the PZ3_Control macro see PZ3 Macros, page 6-12. Modifying the Input Voltage Range on the PZ3 In the default mode, the PZ3 has an effective differential input range of +/- 3mV, which TDT recommends for EEG, LFP, and ECOG. If recordings demand a higher input range such as EMGs, the alternate High Input Range mode allows the input range to increase to +/- 20mV. Important!: The PZ3 automatically detects the gain setting and voltage range and scales the signal output accordingly. Note: The signal to noise performance is better while operating in the +/- 3mV input range. Enabling the High Input Range Mode The high input range mode can be enabled through the PZ3_Control macro. To enable the high range input mode, select 20 mV from the Input Range option on the Options tab. Testing your Electrode Impedance Impedance measurement may be enabled programmatically or using the Display Mode button. Enabling Impedance Mode To enable impedance mode manually, push and hold down the Display Mode button on the PZ3 front panel. During impedance checking all channels are tested in parallel using a ~375 Hz test signal and the impedance is measured relative to a target impedance (1k – 15k) specified by the user (set using the PZ3_Control macro). The LEDs on the PZ3 (and in the PZ3 display on the RZ2 LCD) will light green when the electrode impedance is less than or equal to the target impedance or red when electrode impedance is greater than the target impedance value. Green: Less than or equal target impedance Red: Greater than target impedance System 3 Manual 6-16 Preamplifiers Impedance Checking For True Differential Mode Impedance values of either recording (+) or alternate indifferent (-) channels can be tested. To toggle between (+) and (-) channel impedance measurements, press the Display Mode button on the PZ3 front panel. The status LED located below the Display button of the PZ3 will flash green while electrode (+) channel impedances are being tested or red while alternate indifferent (-) channel impedances are being tested. Returning to Signal Acquisition Modes To leave Impedance mode, simply hold down the Display Mode button on the PZ3 front panel after enabling impedance mode. Battery Overview The PZ3 amplifier features two Lithium ion batteries to allow for longer record times. A threeposition switch selects the active battery between Bank-A, Bank-B, or both banks off. Battery Status LEDs Battery Level: Eight LEDs indicate the voltage level of the selected battery bank. These LEDs can be found on the front of the PZ3 amplifier by the heading Level. When the battery is fully charged, all eight LEDs will be lit. When the battery voltage is low, only one green LED will be lit. If the voltage is allowed to drop further, the last LED will flash red. TDT recommends charging the battery before this flashing low-voltage indicator comes on. While charging, the Level LEDs will flash green. Status Description 8 Green Fully Charged 1 Green, 7 Unlit Low Voltage 1 Flashing Red Low Voltage - Charge Immediately! 8 Green Flashing Charging in Progress Charging the Batteries Operate the amplifier with the charging cable disconnected. Connecting the PZ3 charger will simultaneously charge both batteries. Ensure that the three-position switch is in the OFF (middle) position while charging the PZ3. Charging Indicators: LEDs are also used for each bank to indicate which bank, if any, is charging. These LEDs are found next to the Level LEDs by the headings -A- and -B-. A green indicator denotes the battery bank is fully charged while a red indicator designates the bank is System 3 Manual Preamplifiers 6-17 currently charging. When the device is in operation (charger is not connected) the A and B LEDs are not lit. Status Description Red Charging Green Fully Charged Unlit Operation Mode (charger not connected) An external battery pack is also available to provide longer battery life for extended recording sessions. See page 6-20. PZ3-RZ2 Channel Data Charts The following charts show what data the user can expect to be available on the RZ2 for each channel depending on whether the amplifier is in a recording mode or in impedance checking mode. Please note that this does not necessarily reflect how the hardware channels are used on the PZ3. The RZ2 interprets input from the PZ3 then makes the data available as described below. To further simplify circuit design, the PZ3_ChanMap macro can be used to build separate multichannel data streams for waveform data and impedance values. Recording Mode Unmapped Channel Index Shared Differential Individual Differential (True Differential) Channel 1 Analog Input Channel 1 Analog Input Channel 1(+) Channel 2 RMS of Channel 1 Reference Channel 1(-) . . . . . . Channel 15 Analog Input Channel 8 Analog Input Channel 8(+) Channel 16 RMS of Channel 8 Reference Channel 8(-) Unmapped Channel Index Impedance Checking Shared Diferential Individual Differential (True Differential) Channel 1 NA NA Channel 2 Impedance of Channel 1 Impedance of Channel 1 (+) or (-) . . . . . . Channel 15 NA NA Channel 16 Impedance of Channel 8 Impedance of Channel 8 (+) or (-) System 3 Manual 6-18 Preamplifiers PZ3 Technical Specifications Technical specifications for the PZ3 Low Impedance Amplifier. A/D Up to 128 channels 18-bit hybrid Maximum Voltage In +/- 3mV - Default input range mode +/- 20 mV - High input range mode Frequency Response 3 dB: 0.1 Hz – 5 kHz S/N (typical) 71 dB - Default input range mode Distortion (typical) < 1% A/D Sample Rate Up to 48828.125 Hz Input Impedance 106 Ohms Power Requirements 2 Lithium Ion cells at 10 AmpHours each Battery Eight hours to charge both cells Battery life between charges, per cell: 32 ch ~ 11 hrs 64 ch ~ 8 hrs 128 ch ~ 5 hrs Charger External 6VDC, 3A power supply Indicator LEDs Up to 128 status or clip warning, battery life, active battery bank Input inferred noise 0.9µV rms typical 300- 5000Hz, 3mV input range 2.3µV rms typical 300- 5000Hz, 20mV input range Fiber Optic Cable 5 meters standard, cable lengths up to 20 meters* *Note: If longer cable lengths are required, contact TDT. System 3 Manual Preamplifiers 6-19 Input Connectors PZ3 amplifiers have up to 16 26-pin headstage connectors on the back of the unit. The PZ3 channels are marked next to the respective connector on the amplifier. Pinout Diagram Note: There are 8 (+) channels and 8 (-) channels per DB26 connector. Subsequent banks are indexed by an additional 8 channels. Pin Name Description Pin Name Description 1 A1(+) Analog Input Channel 14 V+ Positive Voltage 2 A1(-) Indifferent Analog Input Channel 15 GND Ground 3 A2(+) Analog Input Channel 16 GND 4 A2(-) Indifferent Analog Input Channel 17 V- Negative Voltage 5* Ref* Shared Reference* 18 HSD Headstage Detect 6 HSD Headstage Detect 19 HSD 7 A3(+) 20 A3(-) 8 A4(+) 21 A4(-) 9 A5(+) Analog Input Channels 22 A5(-) 10 A6(+) 23 A6(-) 11 A7(+) 24 A7(-) 12 A8(+) 25 A8(-) 13 GND Ground 26 NA Indifferent Analog Input Channels Not Used *Note: No connections should be made to pin 5 while operating in True Differential mode. System 3 Manual 6-20 Preamplifiers PZ-BAT External Battery Pack for PZ Amplifiers Overview An external battery pack is available for use with the PZ amplifier. Ideal for long recording sessions, the PZ-BAT provides 42 AmpHours and requires 8-10 hours to charge to 95% capacity and 14 hours to fully charge. Charging the Batteries A 100-240 VAC, 50-60HZ 2A(MAX) power connection socket is provided on the back or the PZ-BAT. Connect to AC power to charge. Using the External Battery Pack The DC power output cable on the front panel can be connected directly to the round female charger socket on the back panel to a PZ amplifier. Set the three position switch on the front of PZ amplifier to either the A or B position to power on the PZ amplifier. When the PZ-BAT is connected the PZ’s Battery Status LEDs will behave as if the internal batteries are charging. Important: To avoid introducing EMF noise, DO NOT connect the PZ-BAT to AC power while connected to a PZ amplifier that is collecting data. PZ-BAT Technical Specifications External battery performance: # of Ch PZ_BAT 32 55 hrs 64 46 hrs 96 40 hrs 128 34 hrs 256 21 hr Note: all time values are typical. Charger: internal 6VDC, 3A power supply System 3 Manual Preamplifiers 6-21 PZ4 Digital Headstage Manifold Overview The PZ4 is a high channel count manifold for transmitting extracellular recordings acquired with TDT’s ZCD digital headstages to an RZ base station for processing. This device supports sampling rates up to ~25 kHz. The PZ4 manifold is available with 1, 2 or 4 digital headstage connections for a variety of channel counts. The PZ4-4 has four DB26 connections and can support up to 256 channels. The PZ4-2 has two DB26 connections and can support up to 128 channels. The PZ4-1 has a single DB26 connection and can support up to 32 channels. System Hardware Analog signals from the electrodes are digitized on the ZCD headstage and transmitted to the PZ4. They are then organized and streamed to the RZ base station over a fiber optic connection for further processing and data storage. The PZ4 Manifold has up to four 26-pin headstage connectors (DB26) on the back of the unit. Because the PZ4 accepts digital inputs, the channel count for each DB26 connection is not fixed. Each DB26 connection can support any headstage channel count up to the limit for the entire PZ4 device. For example, the DB26 port on a PZ4-1 can accept either a 16 channel (ZCD-16) or 32 channel headstage (ZCD-32). A PZ4-2 might have a 32ch headstage (ZCD-32) connected to Bank A and a 96 channel headstage (ZCD-96) connected to Bank B for a total of 128 channels. The PZ4 will automatically detect the number of channels in the headstage on each DB26. All channels will be concatenated together, starting with connector “-A-“, to create the output signal to the RZ base station. Hardware Set-up The PZ4 can connect to any RZ with a PZ port. This includes an RZ2, any RZ with an RZDSP-P card or any RZ5D. The diagram below illustrates the connections necessary for PZ4 manifold operation for an RZ2 and an RZ5D. System 3 Manual 6-22 Preamplifiers One or more ZCD headstage can be connected to the input connectors on the PZ4 back panel. Important!: Each input connector uses its own unique ground. Ground pins on all headstages should be connected together to form a single common ground when using multiple headstages. See the Headstage Connection Guide, page 6-38 for more information. Only TDT digital headstages can be connected to the PZ4. No other connections should be attempted. A 5-meter paired fiber optic cable is included to connect the preamplifier to the base station. The connectors are color coded and keyed to ensure proper connections. The PZ4 battery charger connects to the round female connector located on the back panel of the PZ4 preamplifier. The battery will only charge when the power switch is in the CHG position. Power Switch To turn the PZ4 on, move the two-position battery switch located on the front panel to the ON position. To turn the PZ4 manifold off, or to charge the battery, move the two-position battery switch to the CHG position. System 3 Manual Preamplifiers 6-23 PZ4 Features Headstage LEDs An LED for each headstage (labeled -A-, -B-, -C-, -D-) indicates whether or not a digital headstage is detected. Each LED turns green when a headstage is detected on the corresponding port. If the headstage configuration changes while the PZ4 is under power, all headstage LEDs affected by the change will turn red. For example, if a headstage connected to bank A is swapped with a headstage connected to bank B, the -A- and -B- LEDs that were previously green will turn red. This is an alert to the user that the PZ4 has reconfigured the channels. The red LEDs can be cleared by cycling the power on the PZ4. Status LED: The Status LED indicates if the PZ4 is synchronized to the RZ base station. It will turn green when synchronized and red otherwise. External Ground A banana jack located on the back of the PZ4 (directly below the fiber optic port) provides connections to common ground for all channels. Battery Overview The PZ4 manifold contains a Lithium ion battery pack. Battery Status LEDs Eight LEDs on the front panel indicate the voltage level of the PZ4 battery. When the battery is fully charged, all eight LEDs will light green. When the battery voltage is low, only one green LED will be lit. If the voltage is allowed to drop further, the last LED will flash red. TDT recommends charging the battery before this flashing low-voltage indicator comes on. While charging, the Battery Status LEDs will flash red and green. Status Description 8 Green Fully Charged 1 Green, 7 Unlit Low Voltage 1 Flashing Red Low Voltage - Charge Immediately! Green/Red Flashing Charging in Progress System 3 Manual 6-24 Preamplifiers Charging the Batteries The PZ4 power switch should be in the CHG position while charging, otherwise 50/60Hz noise will bleed into the recordings. An external battery pack (PZ-BAT) is also available to provide longer battery life for extended recording sessions. See page 6-20 PZ4 Technical Specifications Sample Rate Up to 24414.0625 Hz Power Requirements One Lithium Ion cell at 12.75 AmpHours Battery 5 hours to charge the battery 8-10 hrs battery life between charges Charger External 6VDC, 3A power supply Indicator LEDs Headstage status, battery life, sync status Fiber Optic Cable 5 meters standard, cable lengths up to 20 meters* *Note: If longer cable lengths are required, contact TDT. System 3 Manual Preamplifiers 6-25 Medusa Preamplifiers Overview The Medusa Preamplifiers are low noise digital bioamplifiers and are available with either PCM or Sigma-Delta ADCs. The system amplifies and digitizes up to 16-channels of analog signal at a 24.414 kHz sampling rate. The amplified digital signal is sent to the base station via a noiseless fiber optic connector. Digitizes either four or 16 channels at acquisition rates of approximately 6, 12, or 25 kHz. Connects to the headstage via a DB25 connector. Powered by a Lithium-ion battery that provides 20 hours of continuous data acquisition in 16channel mode and 30 hours of operation in 4-channel mode. Clip warning lights indicate when any signal is -3db from the preamplifier's maximum voltage input. Features Analog Acquisition Channels The RA16PA and RA4PA standard Medusa Preamplifiers acquire signals using 16-bit PCM ADCs, which provide quality acquisition with minimal delay. The RA16SD and RA4SD use Sigma-Delta ADCs, which have several characteristics that improve signal quality. Oversampling of the signal before conversion removes aliasing of high frequency RF signals. RA16SD testing indicates that signals greater than 150% of the Nyquist frequency are removed from the signal. This allows users to acquire at lower sampling rates (6 kHz) without worry of significant aliasing. In addition, each converter also has a two pole anti-aliasing filter (12 dB per Octave) at 7.5 kHz. However, the sigma-delta ADC’s have a fixed group delay of 20 samples (compared to four samples for the RA16PA). When using the RA16SD this group delay must be taken into account when the data is displayed or acquired (for example, adding a SampDelay to the RPvdsEx circuit). Clip Warning Lights When the input to a channel is greater than -3db from the preamplifier's maximum voltage input, a light on the top of the amplifier is illuminated. The first column of lights corresponds to channels 1-8 and the second column corresponds to channels 9-16. The clip warning light indicator can be turned off by flipping a switch on the end of the amplifier. System 3 Manual 6-26 Preamplifiers Power Light The power light is in the top corner of the amplifier. It is illuminated when the device is on. It flashes quickly if the battery is low. It flashes slowly while the battery is charging. Headstage Connector The headstage connector is a 25-pin (16-channel) connector. Information on the pin inputs is provided with the technical specifications. Base Station Connector - To Base One end of the fiber optic cable connects to the amplifier and the other end connects to the amplifier input on the base station. Power A switch on the back powers up the amplifier. The fiber connector at the right will be illuminated when the amplifier is on. LEDs This switch turns the clip warning lights on top of the amplifier on or off. Power Requirements The Lithium-ion batteries charge in four hours. Keeping the battery charger connected to the amplifier does not affect the battery life. However, the charger will significantly increase the noise of the system if it is plugged in while an experiment is running. A 6 volt battery charger is included with the amplifier. The charger tip is center negative. If it is necessary to replace the charger make sure that the power supply has the correct polarity. The Li-ion battery supplied with the system cannot be removed. If battery life longer than 30 hours is required, an external battery pack can be connected to the voltage inputs of the charger. TDT recommends a 6 (minimum) to 9 Volt (maximum) battery, such as lead acid batteries used for motorized wheel chairs. Contact TDT for more information. System 3 Manual Preamplifiers 6-27 Medusa Preamplifier Technical Specifications Technical Specifications for the RA4PA, RA16PA, and RA16SD Medusa Preamplifiers. A/D RA4PA: 4-channels 16-bit PCM RA16PA: 16-channels 16-bit PCM RA16SD: 16-channels 16-bit sigma-delta Maximum Voltage In RA4PA and RA16PA: +/- 4 millivolts RA16SD: +/- 5 millivolts Frequency Response 3 dB 2.2 Hz - 7.5 kHz Highpass Filter 2.2 Hz Anti-Aliasing Filtering RA4PA and RA16PA: 7.5 kHz (3 dB corner, 1st order, 6 dB per octave) RA16SD: 7.5 kHz (3 dB corner, 2nd order, 12 dB per octave) S/N (typical) RA4PA and RA16PA: 60dB Input Inferred Noise rms 3 microvolts bandwidth 300 - 3000 Hz 6 microvolts bandwidth 30 - 5000 Hz Group Sample Delay RA4PA and RA16PA: NA RA16SD: 20 Samples A/D Sample Rate 6, 12, or 25 kHz Input Impedance 105 Ohms Power Requirements 500 mAmps while charging, 50 mAmps once charged Battery Li-ion Battery 1500 mAh, 20-30 hours between charges. 1000 cycles of charging, not removable by user Charger 6-9 Volts DC, greater than 500 mAmps, center negative Fiber Optic Cable 5 meters standard, maximum cable length 12 meters System 3 Manual 6-28 Preamplifiers Pin Diagrams 16/4-channel pin outs (all 16 channel models and 4 channel models built after 2002): Pin Name Description 1 A1 2 A2 3 A3 4 A4 5 REF Reference Pin 6 NA TDT Use Only Pins 6, and 19 are for TDT use only and should not be used. 7 A5 8 A7 9 A9 10 A11 11 A13 12 A15 13 GND Ground 14 V+ Positive Voltage Headstage Power Source (1.4 V as measured in reference to ground) 15 GND Ground 16 GND Ground 17 V- Negative Voltage Headstage Power Source (1.4 V as measured in reference to ground) 18 SCM Sixteen Channel Mode Indicator Pin The status of pin 18 determines whether the preamplifier is in four or 16-channel mode. To use the preamplifier in 16channel mode with a custom headstage, connect pin 18 to pin 17. 19 NA TDT Use Only Pins 6, and 19 are for TDT use only and should not be used. Analog Input Channel Number System 3 Manual Analog Input Channel Number Preamplifiers 6-29 20 A6 21 A8 22 A10 23 A12 24 A14 25 A16 Analog Input Channel Number Grounds (pins 13, 15, 16) are tied together. 4-channel pin outs (models shipped before January 2002): Pin Name Description 1 A1 2 A2 3 A3 4 A4 5 REF Reference Pin 6 V+ Positive Voltage Headstage Power Source 7 GND Ground 8 GND Ground 9 V- Negative Voltage Headstage Power Source Analog Input Channel Number Grounds (pins 7 & 8) are tied together. System 3 Manual 6-30 Preamplifiers Adjustable Gain Preamp Overview The RA8GA was designed to acquire and digitize multi-channel data from a variety of analog voltage sources such as eye-trackers, amplifiers (including grass, axon, and WPI amplifiers), PH meters, and temperature sensors. The RA8GA digitizes up to eight channels at acquisition rates of 6, 12, or 25 kHz. All channels have a variable group gain setting of 10 Volts, 1 Volt, or 100 millivolts. The system has a bandwidth to DC, which allows users to acquire low frequency DC signals. In addition a two-pole low pass filter (12 dB per Octave) is set at 7.5 kHz. Power and Interface The device is powered via the System 3 zBus (ZB1PS) and requires an interface to the PC. If the RA8GA is housed in one of several ZB1PS chassis in your system, ensure that it is connected in the interface loop according to the installation instructions: Gigabit, Optibit, or USB Interface. Features Max Input Lights The Active light flashes once a second when the preamplifier is not connected to a base station. It glows steady when it is properly connected. The 10V, 1V, and 0.1V lights indicate the current acceptable voltage range. If the signal input reaches -6db from the maximum input for the selected range, a clip warning light on the base station will be lit. On high performance processors, such as the RX5 or RX7 the LED located next to the fiber optic input port serves as the clip warning light. Range Select Button All channels use a group adjustable gain control i.e. all channels are either +/- 1 Volt, 10 Volts, or 0.1 Volt. A Range Selection button adjusts the gain setting among the following voltages: 0.1X gain = +/-10 Volts, 10X gain = +/- 100 milliVolts, 1.0 X gain = +/-1 volt. Press the button to scroll through the available voltage ranges. Max input lights located to the left of the button, indicate the current selection. To Base The To Base connector is used to connect the device to the base station (such as RA16BA, RX5, or RX7) using a fiber optic cable pair. One end of the fiber optic cable connects to the device using this connection pair and the other end connects to the input on the base station. System 3 Manual Preamplifiers 6-31 Connecting the Base Station to the Preamplifiers To make the connection, plug one end of the cable into one of the fiber optic connectors as shown below and connect the other end of the cable to the fiber optic port on the base station. Both ends of the cable are the same but the two sides of the connector are different. See the diagram below to determine the correct way to make the connection for each device. Preamplifier Base Station Analog Input Each Preamp comes with eight channels of analog input. Each analog input uses 16-bit PCM parts for high quality signal conversion. See the technical specifications for a Pinout Diagram for the 25-pin Analog Input connector. A PP16 patch panel can be used to simplify connection to the preamplifier’s analog inputs. A ribbon cable can be connected from the RA8GA Analog I/O connector to the RA16 connector on the back of the PP16 allowing acquisition of signals via the first eight BNC connectors on the front of the PP16. RA8GA Gain Settings Gain Voltage Range RPvdsEx Scale Factor 0.1 +/-10 V 1700 1.0 +/- 1 V 170 10.0 +/- 0.1 V 17 Accounting for Gain Settings in RPvdsEx The output from a RA8GA generates a floating-point value of between +/- 6 mVolts (i.e. the voltage value of the RA16PA). A scale factor must be used in order for the acquired signal to display the correct voltage. The scale factor for each gain setting is listed in the table above. The scale factor should be added after the channel input (AdcIn). The following example shows a circuit segment that could be used to add the scale factor for a +/1 Volt range: System 3 Manual 6-32 Preamplifiers [1:2,0] Ch=1 dc [1:1,0] ScaleAdd SF=170 Shft=0 A parameter tag may be used to allow the scale factor of the channel input to be modified at runtime. [1:2,0] Ch=1 dc [1:1,0] ScaleAdd SF=1 Shft=0 SF_Ch1 RA8GA Technical Specifications Technical specifications for the RA8GA Adjustable Gain Preamplifier. A/D 8-channels 16-bit PCM Maximum Voltage In Variable gain settings allow +/-10V, +/-1 V or +/- 100 mV Frequency Response DC - 7.5 kHz (2nd order 12 dB per octave) S/N (typical) 70 dB (+/- 1 V 1000 kHz) at 1 V Gain Setting THD (typical) 0.01% A/D Sample Rate 6, 12, or 25 kHz Cross Talk < -70 dB (DC - Nyquist) Input Impedance 10 kOhm DC Offset < 5 mV at +/- 10 V < 3 mV at +/- 1 V and +/- 100 mV System 3 Manual Preamplifiers 6-33 Analog Input Pinout Diagram Pin Name 1 A1 2 A3 3 Description Pin Name Description 14 A2 15 A4 A5 16 A6 4 A7 17 A8 5 AGND Ground 18 NA 6 NA 19 Analog Input Channels 7 20 8 21 9 22 10 Not Used Analog Input Channels Not Used 23 11 24 12 25 13 System 3 Manual 6-34 Preamplifiers TB32 32-Channel Digitizer Overview The TB32 32 channel digitizer interfaces directly with Triangle BioSystems, Inc. (TBSI) wireless headstage and receiver allowing up to 31-channels of recording from a free moving subject. TBSI’s wireless headstage captures the analog signals and wirelessly transmits them up to 3 meters from the subject to the TBSI receiver. The analog signals are then passed to the TB32 for digitization through a 37-pin connector. Signals are digitized at up to ~25 kHz on the digitizer and sent over two fiber optic links to a DSP device such as the Pentusa base station, where they are filtered and processed in real-time. Hardware Setup The diagram below shows the connections made to the front and back panels of the TB32 digitizer. TB32 Front Panel TB32 32 Channel Digitizer CHARGER CH 1-16 CH 17-32 POWER 6-9VDC TIP-NEG TO BASE TO BASE ON TB32 Back Panel Connect to Base Station ANALOG INPUTS DB37 Connector To TBSI Wireless Receiver System 3 Manual Preamplifiers 6-35 Features Analog Acquisition Channels The TB32 acquires signals using 16-bit sigma-delta ADCs, which provide superior conversion quality and extended useful bandwidths, at the cost of an inherent fixed group delay. Each converter has a two-pole anti-aliasing filter (12 dB per Octave) at 4.5 kHz. Note: The TB32 16-bit sigma-delta A/D converters contain a 20 sample group delay. Scale Factor To determine the actual biopotential from the TB32, two scale factors should be applied in the DSP. The first scale factor is 400. This is used to convert the input from the TB32 into the standard voltage range expected by the DSP. The second scale factor is used to scale the signal according to the amplification of the TBSI headstage and receiver. This can be simplified into a single conversion of 400/ GTBSI Where GTBSI = Gain of TBSI wireless headstage and receiver Headstage Connector The headstage connector is a 37-pin (31-channel) female connector. Information on the pin inputs is provided with the technical specifications on page 6-36. Base Station Connectors - To Base One end of the fiber optic cable connects to the digitizer and the other end connects to the digitizer (amplifier) input on the base station. Two fiber optic base station connectors are provided. Connect each fiber optic cable as shown below. Digitizer Output To Base Station Base Station Connector For Digitizer Input Each connector on the TB32 is labeled and corresponds to the channels of the wireless headstage. Refer to the System 3 Manual for specific device channel configurations. Power Switch A switch on the front panel powers up the digitizer. The power light and fiber connectors at the left will be illuminated when the digitizer is on. System 3 Manual 6-36 Preamplifiers Power Light The power light is illuminated when the device is on. It flashes quickly if the battery is low. It flashes slowly while the battery is charging. Power Requirements Onboard lithium-ion batteries charge in ten hours. Keeping the battery charger connected to the digitizer does not affect the battery life. However, the charger will significantly increase the noise of the system if it is plugged in while an experiment is running. A 6 Volt battery charger is included with the digitizer. The charger tip is center negative. The Li-ion battery supplied with the system cannot be removed. If battery life longer than 20 hours is required, contact TDT for more information. TB32 Digitizer Technical Specifications A/D 31-channels: 16-bit sigma-delta Maximum Voltage In +/- 2 Volts Frequency Response 3 dB 2.2 Hz - 4.5 kHz Highpass Filter 2.2 Hz Anti-Aliasing Filtering 4.5 kHz (3 dB corner, 2nd order, 12 dB per octave) S/N (typical) 74 dB Input Inferred Noise(Re 2V) rms 400 microvolts bandwidth 300 - 3000 Hz* 1 millivolt bandwidth 30 - 5000 Hz* Group Sample Delay 20 Samples A/D Sample Rate 6, 12, or 25 kHz Input Impedance 105 Ohms Power Requirements 500 mAmps while charging, 50 mAmps once charged Battery Li-Ion Polymer Battery 5000 mAh, 20-30 hours between charges. Charger 6-9 Volts DC, greater than 500 mAmps, center negative Fiber Optic Cable 5 meters standard, maximum cable length 20 meters *Note: Given the standard gain on the TB32 these values are 1uV and 2.5uV respectively. Pin Diagrams 31-channel pin out: System 3 Manual Preamplifiers 6-37 Pin NameDescription Pin Name Description 1 GND Ground 20 A1 2 A2 21 A3 3 A4 22 A5 4 A6 23 A7 5 A8 24 A9 Analog input channels 6 A10 2,4,6,8,10,12,14,16,18, 7 A12 20,22,24,26,28,30 Analog input channels 1,3,5,7,9,11,13,15,17,19, 25 A11 21,23,25,27,29,31 26 A13 8 A14 27 A15 9 A16 28 A17 10 A18 29 A19 11 A20 30 A21 12 A22 31 A23 13 A24 32 A25 14 A26 33 A27 15 A28 34 A29 16 A30 35 A31 17 NA 36 GND Ground 18 NA Not Used 37 NA Not Used 19 NA Note: No connections should be made to pins 17, 18, 19, and 37. System 3 Manual 6-38 Preamplifiers Headstage Connection Guide Overview Ground and Reference placement is important in all headstage configurations. They determine the operation of the headstage and can, if incorrectly wired, produce undesired results. Important!: High channel count recordings (implemented either with PZ or multiple Medusa preamplifiers) may be implemented using multiple headstages. When using multiple headstages, ground pins on all headstages should be connected together to form a single common ground. This ensures that all headstage ground pins are at the same potential and eliminates additive noise from varying potentials across the subject’s brain. This section serves as a guide to headstage connection and will illustrate single and multiple headstage configurations. A common error example is provided for the final illustration. Headstage Operation Headstage operations can be categorized into three forms listed below. It is important that multiple headstage configurations use a common node for all grounds regardless of the operation of the headstage. Headstage Operations Description Single-Ended Ground and reference pins are tied together and the probe(s) reference all channels to ground. Differential Ground and reference pins are separate and the probes may use shared or multiple references. Hybrid A mixture of single-ended or differential operations when multiple headstages are used. Single Headstage Configurations Single headstage with a Shared Ground and Reference When using a single headstage with a shared ground and reference, the ground and reference pins of the headstage should be tied together. A ground is used and attached to a skull screw. All recordings will reference this connection. This configuration is referred to as “Single-Ended”. System 3 Manual Preamplifiers 6-39 Single headstage with a Separate Ground and Reference When using a single electrode with a separate ground and reference, it is important that the headstage itself is not single-ended, that is, its ground and reference pins are NOT tied together. This will allow the headstage to reference each channel to ground as well as an additional chosen site on the subject. This configuration is referred to as “Differential” Multiple Headstage Configurations Note: All headstages must use the same Ground wire. But not all headstages need to use the same Reference wire. Multiple headstages with a Shared Ground or Reference When using multiple headstages with a shared ground or reference, the ground and reference pins of each headstage should be tied together. A ground is used and attached to a skull screw. This ground is used by all headstages and ensures the headstages are referencing the same potential. This is a multiple single-ended configuration. Multiple headstages with a Single Ground and Multiple References This configuration uses multiple differential headstages each with their own separate references. Notice that all the headstages’ ground pin are tied together. This is a multiple differential configuration. System 3 Manual 6-40 Preamplifiers Multiple headstages with a Shared Ground and different Ground/Reference configurations When using multiple electrodes with a shared ground and separate reference, all headstages’ grounds are connected to the skull screw. A reference wire is present and connected to the desired headstage. This ensures all headstages have the same ground potential and provides a reference for the desired headstage. This is a hybrid configuration and uses a mixture of singleended and differential headstages. Alternatively, to use a single reference for all headstages you may tie all headstage reference pins to the site labeled “Ref”. A Common Error to Avoid When using multiple headstages a common error is to connect separate grounds for each headstage. This allows additional noise to corrupt signals increasing the number of artifacts present. To avoid this, ensure that all headstage ground pins are wired as a single ground. Incorrect Configuration Both headstages are connected to a unique node for ground. This will introduce additional noise artifacts into the recordings. Correct Configuration These headstages are correctly sharing a single node for ground. All headstages will be able to reference the same ground and will eliminate unnecessary noise artifacts from the recordings. System 3 Manual Part 7 Stimulus Isolator System 3 Manual 7-2 Stimulus Isolator ~ System 3 Manual Stimulus Isolator 7-3 MS4/MS16 Stimulus Isolator Overview The MS4/MS16 Stimulus Isolator converts digital waveforms into analog current waveforms as part of a computer controlled neural microstimulator system that delivers user-defined current waveforms through multichannel electrodes. The MicroStimulator System A typical system consists of an RZ5 or RX7 processor base station (RX7 must be housed in a zBus Device Caddie with power supply and interface module), an MS4 or MS16 Stimulus Isolator, ACC16 AC Coupler (Optional) and NC48 or HV250 Battery Pack. The block diagram below illustrates the functionality of the system. PC High Speed Interface Fiber Optic Connection Software control and data transfer Transfer control info and digital signals for stimulation to stimulus isolator RZ5 or RX7 Base Station Real-time DSP generates digital stimulation and control waveforms Input from sensors (RA8GA) or recording electrodes (RA16PA/RA4PA) Optional PreAmp MS16 or MS4 Stimulus Isolator generates analog current waveforms NC48 or HV250 Battery Pack Optional Headstage Stimulating Electrodes Current output to headstage (ACC16 optional) Multichannel MicroStimulator System Diagram As seen in the illustration above, stimulation control waveforms for each electrode channel are first defined on the base station and digitally transmitted over a fiber optic cable to the battery powered stimulus isolator. On the isolator, specialized circuitry for each electrode channel generates an analog current waveform as specified by the digital stimulation control waveform. The final analog current output from the isolator is adjusted to match the stimulation control waveform by adjusting the isolator’s driving voltage according to Ohm’s law where: V=IR. That is, the driving voltage is adjusted for the stimulation control waveform level and the electrode System 3 Manual 7-4 Stimulus Isolator impedance. In this way, the stimulation current specified by the user will be constant regardless of electrode impedance, within system limits. The MicroStimulator System standard configuration is capable of delivering up to 100 µA of current simultaneously across up to 16 stimulating electrodes (impedances up to 1Mohm). See Working with the MS16 MilliAmp Mode on page 7-17, for information if your stimulus isolator has been configured for MilliAmp mode. The Stimulus Isolator The stimulus isolator features either four or 16 D/A converters that can deliver arbitrary waveforms of up to 10 kHz bandwidth. PCM D/As are used to ensure sample delays of only 4-5 samples and square edges on pulse stimulation waveforms. Each of the device’s stimulation channels can be configured in one of three states: Stimulate: Channels in stimulate mode pass current through the selected electrodes. Reference: Channels in reference mode become part of the return path for the current. All channels in Reference mode use the same return path to analog ground on the stimulator. Note: Users can also use a dedicated global reference channel as a current return path. In this mode all channels can be used for stimulation. Open: The Open mode is the default mode for all channels. In the open mode, the corresponding electrode channel is disconnected from output and internally grounded to eliminate noise and crosstalk. On multichannel electrodes, these electrodes might instead be connected to a recording preamp. In this mode a channel can be used to acquire neural signals. The stimulus isolator utilizes an onboard, rechargeable Li-Ion battery for logic control and D/A converter operation. Special circuitry on the stimulus isolator draws on external high voltage battery packs to convert low voltage waveforms from the D/A converters to analog current waveforms as shown in the diagram below. Digital Waveforms and Control Logic D/A Converters Analog, Low Voltage Waveforms Onboard Battery for Logic Control Circuit to convert low voltage waveforms to constant current output Analog Current Waveforms High Voltage Battery for Stimulation Current Stimulus Isolator Diagram The ACC16 AC Coupler The stimulus isolator may generate a DC bias current of up to 0.2% of full scale (up to 0.2 µA on 100 µA device) on any stimulation channel, even during a quiescent state. While this may not have significant short-term effects, over time, it may cause unintended tissue damage. This problem primarily affects researchers using electrodes with impedances of more than 100 kOhms. Users may connect the ACC16 AC coupler (supplied with all MS4/MS16s) directly to the Stim Output connector on the stimulus isolator to block any bias present on the Stim Output lines. Note: Single-ended operation (G and Ref jumper pins tied together) is the only mode supported on the ACC16. Each channel of the ACC16 coupler includes an RC circuit with a one µF capacitor in parallel with a one MOhm resistor. The coupler acts as a 1.6 Hz highpass filter, eliminating the DC bias System 3 Manual Stimulus Isolator 7-5 current. It also acts as a voltage divider, decreasing the voltage and thus the current delivered through the electrode. Note: When using the ACC16 you will NOT be able to deliver the MAXIMUM Rated current. See Designing the Stimulus Signal, page 7-9, for more information. Stimulus Isolator Batteries Power for stimulation is supplied by one of TDT's battery packs. Power requirements are determined by the amount of current needed for stimulation and the impedance of the electrode being used. When using a high impedance electrode (approximately 1 MOhm), the HV250 Battery Pack will most likely be required. With lower impedance electrodes (100 kOhms to 200 kOhms), the NC48 Battery Pack may be more suitable. Users should contact TDT for further information before attempting to use an external power supply. See Battery Reference page 7-20, for technical specifications and for more information. Hardware Set-up To connect the system hardware: Ensure that the TDT drivers, PC interface, and device caddies are installed, setup, and configured according to the installation guide provided with your system. Connect the battery pack to the back panel of the Stimulus Isolator via the connector labeled Battery, as shown in the diagram below. Warning!: The HV250 is a high voltage power source, capable of delivering up to 250 Volts DC at high currents. Shorting the battery connection pins can cause damage to the device and injury to the user. Always use caution when handling or connecting the devices. System 3 Manual 7-6 Stimulus Isolator u1 0 u2 0 - - All 0% - Processors RZ5 1 BioAmp Processor Mode 2 Digital I/O ADC DAC 0 4 1 9 1 5 2 10 2 6 3 11 3 7 4 12 Digital Idle Cyc. DAC ADC Connect the Stimulus Isolator to the base station using the provided fiber optic cable. 1 2 3 4 9 10 11 12 0 1 2 3 Speaker Volume Min Stim Digital I/O Amp-a Max Analog I/O Amp-b Fiber Optic Cable Connections Base Station Stimulus Isolator Stimulator To Base MS16 Stimulus Isolator Control Outputs Stim Outputs NC48 Battery Pack Connect the fiber optic cable from the MS16 fiber optic port labeled To Base to the fiber optic port labeled Stimulator on either the RZ5 or the RX7 (not shown). Be sure to note the difference in the two sides of the fiber optic cable connectors and ensure they are inserted with the correct side up as shown under Fiber Optic Cable Connections above. If desired, connect the ACC16 AC Coupler to the Stimulus Isolator’s STIM OUTPUT port. Jumper MS16/MS4 ACC16 G Ref STIM ELE Connect to Electrodes (Male DB25) Connect to Stim Output (Female DB25) on MS16 Stimulus Isolator Jumper Default Position Shorts ground and reference to yield single-ended operation. Note: this is the only supported mode of operation Connect the Stimulus Isolator’s STIM OUTPUT or the ACC16’s STIM ELE connector to the stimulating electrodes using your preferred method such as direct wiring, the SH16 switching headstage, or a custom pass through connector (available from TDT). See the Stimulus Isolator Technical Specifications section, page 7-18, for pinouts. Power on the base station, then power on the stimulus isolator using the power switch on the isolator’s back panel. Note: Ensure that the rechargeable batteries (onboard Li-Ion and NC48) are fully charged before starting your protocol. The hardware is ready for use. If using the system with other devices, such as a switching headstage or preamplifiers, see the documentation for those devices for hardware connection information. System 3 Manual Stimulus Isolator 7-7 Stimulus Isolator Features Analog Outputs (Stim Outputs) The Stimulus Isolator is equipped with four or 16 analog current output channels, arranged in four-channel banks that can be powered down when not in use. Channels can operate in three modes: Stimulate, Reference, or Open. Simultaneously setting any channel in a bank to both Stimulate and Reference mode turns off that entire bank of channels. An ACC16 AC Coupler is supplied with all MS4/MS16 modules and may be connected directly to the Stim Output connector to block any DC current bias present on the Stim Ouput lines (this problem primarily affects researchers using electrodes with impedances of more than ~100 kOhms) when set in stimulate mode. Note: When using the ACC16 you will NOT be able to deliver the MAXIMUM current. Stim Lights A Stim Light (one for each channel) indicates that a Stim Output channel is in use as a stimulus output. The Stim Lights are located above the Stim Output connector and are numbered 1 - 16, to indicate the active channel number. The LEDs will flash once every three seconds to indicate any bank of channels that has been powered off. Ref Lights A Ref Light (one for each channel) indicates that a Stim Output channel is in use as a reference. The Ref Lights are located above the Stim Output connector and are numbered 1 - 16, to indicate the active channel number. Status Lights Sync: Flashes once a second when the stimulator is not connected to a base station and glows steady when it is correctly connected. Stim Ref: When lit, indicates that the stimulator has been configured to use a global reference. Battery: When lit, indicates when the stimulator's onboard battery is low. The battery voltage decreases rapidly once the battery low light is on. Fast: charging Slow: low battery High Voltage: When lit, indicates that the stimulator is correctly connected to the designated Battery Pack. Solid - correct working voltage Flashing - low voltage Digital Output (Control Outputs) The Control Output connector provides access to the stimulator’s 16 channels of Word addressable digital output. These outputs can control the relays on the SH16 switching headstage or other digital output device (maximum current 40 mA, maximum voltage 3.3 Volts). Control Output Lights A Control Output Light (one for each digital I/O) indicates that the digital output channel is set high (or active). The Control Output Lights are located above the Control Output connector and are numbered 1 - 16, to indicate the active digital output channel. System 3 Manual 7-8 Stimulus Isolator Fiber Optic Port (To Base) The stimulus isolator’s fiber optic input port (labeled To Base) provides an isolated connection to the base station (RZ5 or RX7). The fiber optic cable carries digital signals to D/A’s on the stimulus isolator. It also carries control information and information about the state of the stimulation channels. One end of the fiber optic cable connects to the device using the To Base connection pair and the other end connects to the Stimulator input on the base station. Keep in mind, because of the fiber optic cable data transfer rate, the corresponding Stimulator fiber optic output port on the base station (RZ5 or RX7) will be disabled if the system sampling rate is set to a value greater than 24.414 kHz. High Voltage Input (Back Panel) The stimulator uses either the NC48 or the HV250 High voltage Battery Pack for stimulation. The battery pack should be connected via the Battery connection on the back panel. Warning! The HV250 battery packs are capable of delivering up to 250 Volts DC at high currents. Shorting the device can cause damage to the device and injury to the user. Always use caution when handling or connecting the devices. Power Switch (Back Panel) The Power switch turns the stimulus isolator power off or on. The fiber connector on the front panel will be illuminated when the stimulator is on. Software Control Operation of the MicroStimulator system is controlled via an RPvdsEx circuit loaded and run on the connected base station processor (RZ5 or RX7). TDT recommends using the MS16_Control Macro (pictured below) in your control circuits. This macro simplifies setup of stimulus and reference channels, stimulus signal output, and power conservation. The macro is also used to configure the correct scale factors and poke addresses for the RZ5 or RX7 processor. Select the correct device in the macro settings dialog. When the MS16_Control macro is not sufficient for your task, a circuit can be designed using the Poke component to control the system. This component writes to special memory locations on System 3 devices and is intended primarily for TDT use. While both methods are described here, keep in mind that the Poke component should be used with caution. Important Circuit Design Considerations Sampling Rate When using the RZ5 or RX7 with the stimulus isolator, the maximum sampling rate of the system is 24.414 kHz, a limitation of the fiber optic connection between the base station and the stimulus isolator. System 3 Manual Stimulus Isolator 7-9 Signal Resolution Signal resolution is dependant on the sampling rate used. The stimulus isolator’s PCM D/A converters allow users to generate precise pulsed signals, including square waves with durations of only 1 sample. When using the maximum sampling rate of 24.414 kHz, the sample period is 40.96 microseconds. The stimulus isolator has an effective bandwidth of 10 kHz for continuous (nonpulsed) waveforms. Designing the Stimulus Signal The MicroStimulator system offers flexible stimulus delivery capable of generating complex patterns of pulses or arbitrary waveforms. This allows you to make use of the full range of the waveform and pulse generators in the RPvdsEx component library, including the PulseGenN macro. Desired Signal Range When adding and configuring waveform components you must consider the output range of the system. The default configuration of the stimulus isolator can deliver stimuli in the range of +/100 µA; be sure to set component amplitude parameters with this output range in mind. In the figure below, the amplitude of a biphasic pulse is defined in the Amp-A and Amp-B parameters. Amplitude Parameters When using components that output a logical signal, such as a PulseTrain, the output range can be defined when the output is converted to the desired data type. In the figure below the PulseTrain component sends out a standard TTL signal with a fixed duration. A TTL2Float component is then used to convert the signal to a user specified value between 0 and 100. This value indicates the desired stimulator output in microAmps. [1:3,0] PulseTrain Thi=10 Tg=0 Tlo=10 Npls=0 Trg=0 Stage=0 CurN=0 [1:4,0] TTL2Float desired uAmps HiVal=100 Amplitude Parameter If the ACC16 is not in use the desired uAmps in floating point format can be fed directly to the MS16_Control macro’s Stim Signal input. If the ACC16 is being used a correction factor must be applied (see below). System 3 Manual 7-10 Stimulus Isolator ACC16 Correction Factor An ACC16 AC coupler can be used with the system in single-ended operation (global reference) to block any DC bias present on the Stim Output lines (a problem primarily affecting researchers using electrodes with impedances of more than 200 kOhms). When the ACC16 is in use, it acts as a voltage divider, decreasing the voltage and thus the current delivered through the electrode. The actual current delivered through the ACC16 depends on the ratio of the coupler impedance to the impedance of the electrode in use. For 50 kOhm electrodes the error is about 5%. To calculate a correction factor for actual current delivered: Determine the impedance of your stimulating electrode. Calculate the following equation: Correction = 1/(1,000,000/(Electrode Imp+1,000,000)) = (Electrode Imp +1,000,000)/1,000,000 In your circuit, scale the current output by this value. desired uAmps [1:8,0] [1:9,0] ScaleAdd Limit SF=1.05 Shft=0 correct uAmps Max=100 Min=-100 correction In the example correction circuit above: The value for “correction” represents the results of the calculation above. The value for “desired uAmps” represents the desired amplitude of the stimulus signal. The values for the “Limit” component should be set based on the actual limits of your systems. The MS4/MS16 is available in 100 µA and 1 mA versions. In either case, when using the ACC16 you will NOT be able to deliver the MAXIMUM current. The maximum current = 1/correction factor x 100. Calling for higher currents will deliver currents at the defined limit. If using the recommended MS16_Control Macro, the correct uAmps value is fed to the macro’s Stim Signal input. Selecting Global or Local Reference Mode The MS16_Control macro should be included in all circuits for stimulus isolator control. The Stimulation Mode setting on the Setup tab of the macro properties dialog box determines whether the stimulus isolator is configured to use a global reference (Single ended) or a local reference(s) (Differential). Global Reference Mode If a global reference is desired, set the MS16_Control macro’s Stimulation Mode to Single Ended on the Setup tab of the macro properties dialog box. In this mode the RefChan input is disabled. Local Reference Mode If local reference is desired, set the MS16_Control macro’s Stimulation Mode to Differential on the Setup tab of the macro properties dialog box. In this mode the RefChan input is enabled. System 3 Manual Stimulus Isolator 7-11 Note: In Local Reference (Differential) mode, writing a 0 to the RefChan_Mask macro input while the Channel Select Method is set to With Chan Mask, will disable all local reference channels and enable the global reference. Configuring Reference and Stimulation Channels The MS16_Control macro sets reference and stimulation channels. Feeding an integer value to the macro’s StimChan and RefChan inputs will turn on channels for stimulation or reference, respectively. The Channel Select Method on the Setup tab of the macro properties dialog box determines whether the integer is read as a single channel number or as a mask value representing multiple channels. Important Note! Configuring a channel, as both stimulus and reference will cause the unit to automatically turn off that bank of channels. Setting a Single Channel for Stimulation or Local Reference By default, the Channel Select Method on the Setup tab of the macro properties dialog box is set to With Chan Number. The StimChan and RefChan inputs accept an integer value of 0 through 16 and the macro will set the selected channel for stimulation or local reference. Note: an integer value of 0 fed to StimChan disables all channels. Setting Multiple Channels for Stimulation or Local Reference To configure multiple reference channels, the Channel Select Method on the Setup tab of the macros properties box must be set to With Chan Mask. In this mode, StimChan and RefChan inputs accept an integer value channel mask representative of the desired channels (shown in the table below). The integer value is the sum of the channel masks for the channels. Channel Mask Table: Channel # Channel Mask Channel # Channel Mask 1 1 9 256 2 2 10 512 3 4 11 1024 4 8 12 2048 5 16 13 4096 6 32 14 8192 7 64 15 16384 8 128 16 32768 For example: If you wish to simultaneously set channels 1 (channel mask 1), 2 (channel mask 2), and 3 (channel mask 4) to stimulation mode add their respective channel masks from the table above (1 + 2 + 4 = 7), and send that sum (7) to the StimChan_Mask input as shown in the figure below. System 3 Manual 7-12 Stimulus Isolator This example sets channels 1, 2, and 3 for stimulation. Unused banks of channels are powered down. The stimulus design and delivery are not included in this circuit segment. The reference channels can be configured in the same way, using the integer values in the Channel Mask Table above. The iXor component can also be used to set all channels NOT set as stimulation to reference. In the figure below, an iXor is used to perform an exclusive bitwise OR function. The channel mask for stimulation is XORed with the integer mask value for all channels, resulting in a channel mask that sets all non-stimulus channels to reference channels. Important!: Writing a 0 to the RefChan_Mask macro input while the Channel Select Method is set to With Chan Mask, will disable all local reference channels and enable the global reference. Delivering the Stimulation The stimulus delivery segment of the circuit can be handled within the MS16_Control macro or external to the macro using the Poke component. TDT recommends using the MS16_Control macro whenever possible. The Poke component should be used with caution; however, it is necessary for some tasks, including simultaneous stimulation on multiple channels. Important!: The memory addresses used with the Poke component are different for the RZ5 and RX7. See the memory address table, page 7-14 for more information. Single Channel Stimulation with Global Reference When the global reference is used, the MS16_Control macro can be used for single channel stimulation. The Stimulation Mode on the Setup tab of the macro’s properties box must be set to Single Ended and the Channel Select Method must be set to With Chan Number to enable the StimSignal input. StimSignal accepts floating-point input, representative of the desired stimulus current waveform. The macro will send the stimulus signal to the channel set using the StimChan_Num input. System 3 Manual Stimulus Isolator 7-13 This example sends floating point values representing the amplitude of the waveform in microAmps to a user-specified channel of the stimulator as long as the enable is high. If using the ACC16 be sure to scale the signal by the necessary correction factor. See ACC16 Correction Factor, page 7-10 for more information. Note: To conserve the life of the stimulus isolator's onboard and external batteries, remember to power down unused bank of channels on the MS16_Control macro's Power Control tab. Simultaneous Stimulation on Multiple Channels and/or Local Reference Mode The MS16_Control macro’s StimSignal is disabled whenever the local reference mode is used or when a channel mask is used to set multiple stimulation channels. In these cases the macro should still be used to configure or turn on channels for stimulation (see Configuring Reference and Stimulation Channels, page 7-11), but stimulus delivery must be handled external to the macro. Converting the Signal to an Integer Value When designing the stimulus signal it is convenient to work with floating point values that represents the desired current in microAmps (See Designing the Stimulus Signal, page 7-9). However, when the macro is not used the stimulus signal must be converted to an integer value representing a voltage level in the proper range for the stimulus isolator. The scale factor required to scale the current in the desired range of +/-100 µA is dependent on the type of base station processor being used. RZ5 When using the RZ5, use a scale factor of: 1.7394e+007 RX7 When using the RX7, use a scale factor of: 265.41 [1:2,0] desired uAmps Float2Int stimulus_Sig SF=1.7394e+0 In this circuit segment, the desired floating point value in microAmps is fed to a Float2Int, which converts the data type and applies the scale factor. Signal Output to Stimulus Channels Once output waveforms are converted to an integer value they are poked (written) to memory locations on the MS4/MS16, using the Poke component. Memory addresses vary be processor as described here. Reference tables are also provided below; page 7-14. When using the RZ5, output to channels 1-16 must be written to memory addresses 32RZ5 47, respectively. To do so, offset the channel number by 31 and enter this value in the address parameter of the Poke component. System 3 Manual 7-14 Stimulus Isolator [1:5,0] Poke stimulus_Sig Addr=32 The circuit segment above sends out a stimulus signal to channel one of the stimulator. RX7 When using the RX7, output to channels 1-16 must be written to memory addresses 2035, respectively. To do so, offset the channel number by 19 and enter this value in the address parameter of the Poke component. Summary: Simultaneous Stimulation on Multiple Channels The example below shows a more complete picture, with the MS16_Control macro used to set or turn on multiple channels using the ChanMask hop, see page 7-11, and the Poke used to write the signal value to the MS4/MS16 memory location for channels one and two with the RZ5. Circuit Design Using the Poke Component Using the MS16_Control macro simplifies circuit design for the MicroStimulator System. If the macro cannot be used, you can use the RPvdsEx Poke component to control the stimulus isolator by writing information to memory addresses on the RZ5 or RX7. Memory Address Reference for Using the Poke Component The table below summarizes each stimulus isolator control function and its memory address. Control Value Description Memory Address RZ5 RX7 Stimulus Channels Mask for channels between none and 16; integer value between 0 and 65535 48 7 Signal Output Integer representing current level scaled for D/A (varies depending on device). 32-47 20-35 Global Reference 0 (off) or 1 (on) 50 9 System 3 Manual Stimulus Isolator 7-15 Reference Channels Mask for channels between none and 16; integer value between 0 and 65535 49 8 Digital Out Mask for channels between none and 16; integer value between 0 and 65535 51 3 Signal Output to Stimulus Channels To generate signals on the stimulus isolator, the output waveforms are poked (written) to memory locations as integer values. See Converting the Signal to an Integer Value, page 7-13, for more information. The table below maps the output channels of the RZ5 and RX7 to their poke address. Isolator Output Channel Poke Waveform To Address Isolator Output Channel Poke Waveform To Address RZ5 RX7 RZ5 RX7 1 32 20 9 40 28 2 33 21 10 41 29 3 34 22 11 42 30 4 35 23 12 43 31 5 36 24 13 44 32 6 37 25 14 45 33 7 38 26 15 46 34 8 39 27 16 47 35 Global Reference Enable Global reference uses the analog ground to complete the stimulation circuit. The global reference feature can be enabled by setting the value of a specific memory address to one. The StimRef indicator light on the front panel of the stimulus isolator is illuminated when the global reference has been set. [1:23,0] ConstI K=1 [1:24,0] Poke Addr=50 RZ5 To enable global reference when using an RZ5 set the value of memory address 50 to one as pictured above. RX7 To enable global reference when using the RX7 set the value of address 9 to one. Channel Masks Memory addresses for stimulus, reference, or digital I/O channel setup expect an integer value between zero and 65535. Masked values for each channel are noted in the table below. Adding masked values together will set multiple channels. System 3 Manual 7-16 Stimulus Isolator The table below maps channel numbers to mask values. Channel # Channel Mask Channel # Channel Mask 1 1 9 256 2 2 10 512 3 4 11 1024 4 8 12 2048 5 16 13 4096 6 32 14 8192 7 64 15 16384 8 128 16 32768 For example: If channels 1 (channel mask 1), 2 (channel mask 2), and 3 (channel mask 4) are desired, use a channel mask of 7 (1 + 2 + 4 = 7). Stimulus, Reference, or Control Channel Setup To enable a given channel, an integer value is written to the appropriate memory address of the base station. The integer value is the sum of the channel masks (see table above for mask values) for all the stimulation channels that the user wishes to activate. [1:23,0] ConstI StimChans K=0 [1:25,0] ConstI RefChans K=0 [1:27,0] ConstI DigitalChans K=0 [1:24,0] Poke Addr=48 [1:26,0] Poke Addr=49 [1:28,0] Poke Addr=51 In the example circuit above, the StimChans parameter tag feeds a ConstI an integer value used to assign channels as stimulus channels, RefChans sets the reference channels, and DigitalChans sets the digital channels. This example above is configured for the RZ5. Important!: The memory addresses for the RZ5 and RX7 are different. See the memory address table, page 7-14 for more information. Note: When using the SH16 switching headstage, the digital I/O channels on the MS4/MS16 are used to control the switching headstage. These are accessed via a DB25 connector labeled Control. For SH16 switching headstages (serial number 2000 and greater), channels 1-3 are used for communication and channels 4-8 are used to provide power to the SH16. When the SH16 is not being used, the MS4/MS16 digital I/O can be used for any type of digital control. See SH16 – 16 Channel Switchable Acute Headstage, page 10-26, for more information about controlling the headstage. System 3 Manual Stimulus Isolator 7-17 Working with the MS16 MilliAmp Mode The MS16 can be modified at the factory to deliver stimuli in the +/- 1 mA range. If your device has this modification, please note the following important differences in operation. The HV250 battery pack CANNOT be used with milliAmp mode. This mode should only be used with the NC48 battery pack. Circuit Design for the MS16 in MilliAmp Mode MS16_Control Macro When using the MS16_Control macro set High Current Range on the Setup tab of the macro’s properties box to Yes. If High Current Range is set to Yes, all other circuit design considerations are handled automatically by the macro. Scale Factor When using the Poke component for stimulus delivery, use the appropriate scale factor for your processor to convert the signal in desired or corrected microAmps to the necessary voltage for A/Ds. RZ5 When using RZ5, use a scale factor of 1.7394e+006. RX7 When using RX7, use a scale factor of 26.541. See Converting the Signal to an Integer Value, page 7-13, for more information. [1:2,0] desired uAmps Float2Int SF=1.7394e+0 [1:3,0] Poke Addr=32 In this circuit segment, the desired floating point value in microAmps is fed to a Float2Int, which converts the data type and applies the necessary scale factor for MilliAmp mode. High Current Mode When the MS16_Control is not used at all, the high current mode can be set by sending a specific value to the appropriate memory address for your processor. This memory address is the same address used to turn on or off the global reference. The value used to set the high current mode can be added to the global reference values 0 (off) and 1(on). RZ5 When using the RZ5, the high current mode can be set by sending a value of 54784 to memory address 50. Therefore, poking 54784 to the address turns on high current mode and turns off the global reference; while poking 54785 to the address turns on high current mode and turns on the global reference. RX7 When using the RX7, the high current mode can be set by sending a value of 214 to memory address 9. Therefore, poking 214 to address 9 turns on high current mode and turns off the global reference; while poking 215 to address 9 turns on high current mode and turns on the global reference. System 3 Manual 7-18 Stimulus Isolator Stimulus Isolator Technical Specifications Technical specifications for the MS4/MS16 Stimulus Isolator. Stimulus Output Channels 4 (MS4) or 16 (MS16) Sampling rate Up to 24.414 kHz Stimulus Output Current +/- 100 µA up to 1 MOhm load with HV250 +/- 100 µA up to 200 kOhms load with NC48* DC Offset Current Less than 0.2% of full range setting Digital Output Max Current 40 mA Digital Output Max Voltage 3.3 V Selectable Reference Local or Global Power Onboard Rechargeable Li-Ion battery Control Stimulation NC48 Rechargeable Battery with NiCad batteries* or HV250 Battery Pack with Carbon Zinc batteries *Note: the Stimulus Isolator may be modified at the factory for 1 MilliAmp Mode. DB25 Connector Pinouts STIM ELE Connector on the ACC16 The ACC16 AC Coupler is used to block DC bias and connects directly to this Stim Output Connector, passing signals through to its STIM ELE connector with the same pinout. System 3 Manual Stimulus Isolator 7-19 Stim Output Connector The Stim Output connector provides access to the analog output channels. These channels are used primarily for stimulus output. Pin Name Description Pin Name Description Analog Channels 14 1 A1 NA Not Used 2 A2 3 A3 16 4 A4 17 5 Ref Reference 18 6 NA Not Used 19 7 A5 20 A6 Analog Channels 8 A7 21 A8 Ch 6, 8, 10, 12, and 14, 16 9 A9 Analog Channels 22 A10 Ch 5, 7, 9, 11, 13, and 15 23 A12 11 A13 24 A14 12 A15 25 A16 10 A11 13 NA Ch 1-4 15 Not Used Note: Channels 5 - 16 not available on the MS4. Control Output Connector This connector provides access to control or relay output channels. Pin Name 1 NA Description Pin Name Description Not Used 14 2 15 3 16 NA Not Used System 3 Manual 7-20 Stimulus Isolator 4 17 5 DGND 6 Digital Ground 18 D0 D1 19 D2 7 D3 20 D4 8 D5 Digital Output 21 D6 9 D7 Bits 1, 3, 5, 7, 9, 11, 13, and 15 22 D8 10 D9 23 D10 11 D11 24 D12 12 D13 25 D14 Digital Outputs Bits 0, 2, 4, 6, 8, 10, 12, and 14 13 D15 Battery Reference The stimulus isolator uses an onboard Lithium-Ion battery for general device operation. These batteries charge in four hours. A 6-9 Volt battery charger with 500 mA of current capacity is included with the stimulator and can be connected via the Charger connector on the stimulator's back panel. The charger tip is center negative. If it is necessary to replace the charger, ensure that the power supply has the correct polarity. Issue HV250 NC48 Onboard Li-Ion Battery life 130 mAh (up to 27 hours stimulation) 1000 mAh (up to 240 hours of stimulation) 12-15 hours battery life between charges Rechargeable No Yes Yes Maximum impedance for delivering a 100 microAmp current 1 MOhms 200 kOhms N/A Usable in MilliAmp Mode No Yes Yes Ambient temperature Normal room temperatures Normal room temperatures Normal room temperatures HV250 Battery Pack The HV250 Battery Pack uses four Carbon Zinc batteries, each delivering 67 Volts. Because the HV250 Battery Pack is non-rechargeable, it must be replaced periodically. The High Voltage LED System 3 Manual Stimulus Isolator 7-21 on the front panel of the MS4/MS16 will flash to alert the user of a low voltage condition. To extend the life of the battery, we recommend enabling only the desired channels for stimulation. WARNING The HV250 is a high-voltage power source, capable of delivering up to 250 Volts DC at high amperages. Shorting the device can cause damage to the device and injury to the user. Always use caution when handling or connecting the devices. Never attempt to charge the HV250. NC48 Battery Pack The NC48 Battery Pack uses 32 Nickel Cadmium (NiCad) batteries to supply a peak-to-peak voltage of 48 Volts with a range of +/- 24 Volts. WARNING Just as with all batteries, shorting the NC48 Battery Pack can cause damage to the device and injury to the user. Always use caution when handling or connecting the devices. WARNING Overcharging the NC48 battery pack can cause the cells to rupture. The NC48 Battery Pack should be connected to its charger for a maximum of 16 hours. Overcharging shortens battery life and may burn out the battery in extreme cases. Although the batteries used in the NC48 are designed to provide the user with dozens of charge/discharge cycles, the performance of all rechargeable batteries deteriorates over time. The major sign that a battery is deteriorating is a shortened use cycle between charges. Note! Used NiCad batteries must be recycled. The NC48 Battery pack should be stored at normal room temperatures. Temperature extremes can affect the operation of the batteries. Battery packs stored for longer than two months should be tested prior to use. MS4/MS16 Anomalies If the stimulus isolator control bits and relay switching control bits do not work after power up, execute a hardware reset on the base station using zBusMon. Serial numbers 4000 and above Previous versions of the stimulator automatically switched banks of channels off when not in use. A recent change to the microcode eliminates this feature, giving users control over when channels are turned off. By default, all channels are on and must be turned off manually. Serial numbers below 4008 (MS4) and 4015 (MS16) When the NC48 is connected to the stimulus isolator, the High Voltage LED on the front panel of the MS4/MS16 will constantly flash even when the NC48 (+/-24 V) is at full charge, because the voltage monitoring circuitry was designed to detect a low voltage of the HV250 battery pack. Serial numbers below 4000 The MS4/MS16 has undergone several design changes to improve performance and usability. TDT recommends that all users upgrade to the latest versions (serial numbers 4000 and above). Contact TDT for an RMA to upgrade your current module. Serial numbers below 3000 Noise on outputs is high when the output is in 'Open" mode. The noise is especially evident during recording and stimulation events. Contact TDT for an RMA for upgrade of your current device. Conservation of Power The stimulus isolator’s analog channels are arranged in four-channel banks. Each of these banks is powered up on reset of the device and will remain powered on. To conserve power, TDT recommends powering down unused banks of channels. The MS16_Control macro can be used to System 3 Manual 7-22 Stimulus Isolator turn off unused banks of channels. When not using the macro, simultaneously setting any channel in a bank to both Stimulate and Reference mode turns off that four-channel bank. Maximum Voltage Output The stimulus output channels drive a current signal that ranges from 0-100 microAmps. The maximum voltage output from the MicroStimulator system using the TDT NC48 battery is the 24 volts and the maximum voltage output using the TDT HV250 battery is 125 Volts. The actual voltage output depends on the current waveform specified and the impedance of your electrodes, that is, V = ZI where V=Volts, Z = impedance and I = current. Using the MicroStimulator with TDT's Switching Headstage When using TDT’s switching headstage, ensure that relays for channels used for stimulation have been switched to the correct position using the SH16_Control macro. Any stimulus channel for which the corresponding control channel has not also been set will fail to generate a signal. See Switchable Headstage Operation, page 10-27. System 3 Manual Stimulus Isolator 7-23 IZ2 Stimulator Overview The IZ2 Stimulator converts digital waveforms into analog waveforms as part of a computercontrolled neural microstimulator system that delivers user-defined stimuli through multichannel electrodes. The IZ2 can output either a voltage-controlled waveform or a current-controlled waveform and provides feedback of the actual voltages delivered to the electrodes. The IZ2H is a high current range version of the IZ2 and is available with sixteen stimulus channels. The IZ2 Stimulator System A typical system consists of a Stimulator (IZ2-32, IZ2-64, IZ2-128, or IZ2H-16); a Battery Pack (LZ48-200 or LZ48-400); and an RZ processor equipped with a specialized DSP (RZ-DSP-I) and additional fiber optic connector on the back panel. The block diagram below illustrates the functionality of the system. PC High Speed Interface Fiber Optic Connection Software control and data transfer Transfers control information and digital signals for stimulation to IZ2, returns actual stimulation voltage to RZ for monitoring RZ Base Station Real-time DSP generates digital stimulation and control waveforms Input from sensors (RA8GA) or recording electrodes (PZ2/RA16PA) Optional PreAmp IZ2/IZ2H Stimulator generates analog current or voltage waveforms LZ48-200 or LZ48400 Battery Pack Optional Headstage Stimulating Electrodes Current or voltage output to headstage Multichannel IZ2/IZ2H Stimulator System Diagram System 3 Manual 7-24 Stimulus Isolator Stimulation control waveforms for each electrode channel are first defined on the RZ base station and digitally transmitted over a fiber optic cable to the battery powered stimulator. On the stimulator, specialized circuitry for each electrode channel generates an analog voltage waveform. In current mode, the driving voltage is adjusted according to Ohm’s law (V=IR), where I is the desired stimulation current and R is the electrode impedance. Eight analog-to-digital (A/D) converters on the IZ2/IZ2H read the output voltage for a chosen bank of channels and send that information back to the RZ for monitoring. In Current mode, the IZ2 Stimulator System is capable of delivering up to 300 µA of current simultaneously across up to 128 stimulating electrodes (impedances up to 50 kOhm). The IZ2H Stimulator System is capable of delivering up to 3 mA of current simultaneously across up to 16 stimulating electrodes (impedances up to 5 kOhm). In Voltage mode, both the IZ2 and IZ2H are capable of delivering up to +/-12V across each individual electrode. Special features for IZ2 serial numbers > 2000 and all IZ2H devices: Individual channels can be open circuited or shorted to ground. A 1 MOhm shunt resistor to ground can be applied to all channels. This is most useful for electrodes with very high impedance at DC that would normally produce large quiescent DC voltages when in Current mode. The Stimulator The IZ2 stimulator features 32, 64, or 128 channels that can deliver arbitrary waveforms of up to 80 kHz bandwidth and the IZ2H features 16 channels for high current range stimulation. Each channel uses PCM D/As to ensure sample delays of only 4-5 samples and square edges on pulse stimulation waveforms. The stimulator uses a rechargeable Li-Poly battery from the LZ48 battery pack (VC) for logic control and D/A converter operation. Special circuitry on the stimulator draws on the LZ48 high voltage batteries (VA and VB) to convert low voltage waveforms from the D/A converters to constant voltage or constant current waveforms as shown in the diagram below. Digital Waveforms and Control Logic from RZ2 To RZ for monitoring D/A Converters Circuit to generate constant voltage or constant current waveforms Voltage out to electrodes A/D Converters Stimulator Diagram Stimulator Batteries Power for stimulation is supplied by one of TDT's battery packs (LZ48-200 or LZ48-400). Both batteries produce the same output voltage/current characteristics. The LZ48-200 has a 200 Wh battery life and the LZ48-400 has a 400 Wh battery life. The number of channels needed for stimulation determines power requirements. The IZ2-128 and IZ2H-16 should only be used with the LZ48-400. The IZ2-32 and IZ2-64 can be used with either the LZ48-200 or LZ48-400. See Battery Reference page 7-34, for technical specifications and for more information. System 3 Manual Stimulus Isolator 7-25 Hardware Set-up To connect the system hardware: Ensure that the TDT drivers, PC interface, and RZ and zBUS devices are installed, setup, and configured according to the installation guide provided with your system. Connect the battery pack cable to the back panel of the stimulator via the connector labeled Battery, as shown in the diagram below. Warning!: Shorting the battery connection pins can cause damage to the device and injury to the user. Always use caution when handling or connecting the devices. Connect the stimulator to the base station using the provided fiber optic cable. Connect the fiber optic cable from the IZ2/IZ2H fiber optic port labeled Fiber to the fiber optic port labeled To IZ2 on the back side of the RZ. Be sure to note the difference in the two sides of the fiber optic cable connectors and ensure they are inserted with the correct side up. Connect the DB26 output connectors on the stimulator to the stimulating electrodes using your preferred method such as direct wiring or a custom pass through connector (available from TDT). See the IZ2 Stimulator Technical Specifications section on page 7-31 for pinouts. Power on the base station, then power on the LZ48 using the power switch on the LZ48’s front panel. This will also power on the stimulator. System 3 Manual 7-26 Stimulus Isolator Note: Ensure that the LZ48 rechargeable batteries are fully charged before starting your protocol. The hardware is ready for use. If using the system with other devices, such as a switching headstage or preamplifiers, see the documentation for those devices for hardware connection information. IZ2 Features Analog Outputs (Stim Outputs) The IZ2 is equipped with 32, 64, or 128 analog output channels, arranged in sixteen-channel banks that are powered down when no headstage is connected. The IZ2H is equipped with 16 analog output channels, arranged in eight-channel banks that are powered down when no headstage is connected. Stim Lights An LED (one for each channel) indicates that a channel is in use as a stimulus output. The Stim Light will turn green when a channel is on and will turn red when a channel is clipping. The Stim Lights are located on the front plate of the IZ2/IZ2H and have channel number labels. Note: Stim lights indicate clipping beyond +/- 10 V. Status Light This LED provides connection and output mode information. Light Pattern Description Solid Red IZ2/IZ2H is not properly connected to RZ base station or cannot sync. Solid Green IZ2/IZ2H is properly connected to RZ and is operating in current mode. Solid Green, Slowly Flashing Red IZ2/IZ2H is properly connected to RZ and is operating in voltage mode. Fiber Optic Port (Fiber) The fiber optic input port (labeled Fiber) provides an isolated connection to the RZ base station. One end of the fiber optic cable connects to the IZ2/IZ2H fiber optic input port (labeled Fiber) and the other end connects to the fiber optic input port (labeled To IZ2) on the back panel of the RZ base station. See page 7-25 for a connection diagram. Battery Input (Back Panel) The stimulator uses either the LZ48-200 or the LZ48-400 battery pack for stimulation and to power the logic circuitry. The battery pack should be connected via the Battery connection on the back panel using the battery pack cable provided. See page 7-25 for a connection diagram. Power Switch (Front Panel) The Power switch turns the power on or off. The status lights on the front panel will be illuminated when the IZ2/IZ2H is on. System 3 Manual Stimulus Isolator 7-27 Software Control Operation of the stimulator system is controlled via an RPvdsEx circuit that runs on the connected RZ base station. TDT recommends using the IZ2_Control macro (pictured below) in your control circuit. This macro simplifies control of stimulator signal outputs and bank monitoring. Note: The label on the additional fiber optic port on the back of the RZ processor will indicate which DSP is used to control the IZ2/IZ2H. The IZ2_Control macro must be assigned to this special DSP. StimSignal: Multi-channel floating point input stream of stimulus waveforms MonBank: Select which bank of eight channels to update on the monitor output (integer, 0-15) Monitor: Multi-channel floating point monitor output StimChan_Num, Enable and Updating are for SH16-Z use only Selecting Voltage or Current Mode The IZ2_Control macro should be included in all circuits. The Stimulation Mode setting on the Setup tab of the macro properties dialog box determines whether the IZ2 is configured to output in voltage mode or in current mode. The macro can also be used to select high current range when using the IZ2H-16. Important Circuit Design Considerations Sampling Rate The IZ2 can control 128 channels at up to 50 kHz, 64 channels at up to 100 kHz, and 32 channels at a maximum 200 kHz. The IZ2/IZ2H sampling rate is the same as the sampling rate of the circuit running on the RZ device, so the maximum sampling rate of the IZ2/IZ2H is also limited to the maximum sampling rate of the type of RZ device controlling it. Note: The channel stim lights and output monitoring are not available when sampling at 200 kHz. Signal Resolution Signal resolution is dependant on the sampling rate used. PCM D/A converters allow users to generate precise pulsed signals, including square waves with durations of only 1 sample. When using the maximum sampling rate of 195.3125 kHz, the sample period is 5.12 microseconds. The IZ2/IZ2H has an effective bandwidth of 80 kHz for continuous (non-pulsed) waveforms. System 3 Manual 7-28 Stimulus Isolator Designing the Stimulus Signal The IZ2/IZ2H Stimulator system offers flexible stimulus delivery capable of generating complex patterns of pulses or arbitrary waveforms. This allows you to make use of the full range of the waveform and pulse generators in the RPvdsEx component library, including the PulseGenN macro. Desired Signal Range Consider the output range of the system when adding and configuring waveform components. The default configuration of the stimulator can deliver stimuli in the range of +/- 300 µA (at 50kOhm) or +/-12V and the IZ2H-16 can deliver up to +/-3mA (at 5kOhm) or +/-12V. Be sure to set component amplitude parameters with the output range of your device in mind. In the figure below, the amplitude of a biphasic pulse is defined in the Amp-A and Amp-B parameters. Amplitude Parameters When using components that output a logical (TTL) signal, such as a PulseTrain, the output range can be defined when the output is converted to the desired data type. In the figure below, the PulseTrain component sends out a TTL signal with a fixed duration. A TTL2Float component is then used to convert the signal to a user specified value between 0 and 300 (or 0 and 3000 for the IZ2H). This floating point value indicates the desired stimulator output in microAmps. The desired uAmps hop is a multi-channel floating point signal that can be fed directly to the IZ2_Control macro’s StimSignal input or further manipulated as in the next example. [1:21,0] PulseTrain Thi=1 Tg=0 Tlo=99 Npls=0 Trg=1 Stage=0 CurN=0 [1:22,0] TTL2Float HiVal=100 [1:24,0] MCConst desired uAmps nChan=16 Value=1 Amplitude Parameter Setting Multiple Channels for Stimulation This example generates a 16-channel signal for voltage stimulation. The base stimulation is a +/1V bipolar pulse generated by the PulseGenN macro. The StimScales data table holds the scale factors that will be applied to each channel’s stimulus. The output (desired V) can be connected directly to the StimSignal port of the IZ2_Control macro. The IZ2_Control macro is configured for Voltage Stim Mode. System 3 Manual Stimulus Isolator 7-29 PulseGenN [1:27,0] Trigger Output Sync nPeriod = 100 nPulses = 10 nDur-A = 5 nDur-B = 5 Amp-A = 1 Amp-B = -1 Reset MCConst [1:28,0] MCMult desired V Inp2 nChan=16 Value=1 nChan=16 [1:25,0] StimScales MCValList nChan=16 {>List} =0 IZ2_Control desired V StimSignal StimChan_Num Monitor Updating MonBank Enable Voltage Stim Mode (16 ch) : Shunt ON Double-clicking the StimScales DataTable component prompts the Data Table dialog which allows you to adjust individual scale factors for each channel. Note: To turn off a particular channel, set its scale factor to 0. IZ2 Serial Number > 2000 or any IZ2H Set the signal value less than the lowest allowed value (e.g. constant -10000) on any channel to short that channel to ground. Set the signal value greater than the highest allowed value (e.g. constant 10000) on any channel to open circuit that channel. Use the macro settings to enable the 1MOhm shunt resistors on all channels. Grounding or opening the channels can be achieved by using a second MCValList that is added to the stim signals, as in the example below. System 3 Manual 7-30 Stimulus Isolator Summing a large constant value with the signal will switch that channel into Open or Short mode. The values in the Config DataTable must be large enough to clip the target channel. A value of +10000 is sufficient to open a channel; a value of -10000 is sufficient to short a channel. A value of 0 in the Config data table will have no effect on the output signal. Monitoring the Stimulation Eight PCM A/D converters on the IZ2/IZ2H monitor the actual output voltage for a chosen bank of channels and send that information back to the RZ. This information is available from the output of the IZ2_Control macro. The MonBank macro input specifies which bank of eight channels is updating on the Monitor output (the rest of the channels of the Monitor output will be latched). A zero indicates that the first bank of eight is monitored. Note: The onboard A/D converters that provide the feedback clip at +/-20V, which is higher than any possible output signal in either voltage or current mode. Important note for IZ2H users: To monitor the first 8 channels on the IZ2H, set MonBank to 0. To monitor the upper 8 channels on the IZ2H, set MonBank to 2. Circuit Design Using the MCeStim Component Using the IZ2_Control macro simplifies circuit design for the IZ2 Stimulator System. If you would like to change the output mode (voltage or current) in real-time, you can use the RPvdsEx MCeStim component to control the IZ2. Input: Multi-channel floating point input stream of stimulus waveforms. Output: Multi-channel floating point monitor output. nChan: Number of stimulus channels to send to IZ2/IZ2H. VMode: Configures the IZ2/IZ2H to run in Voltage Mode (1) or Current Mode (0). MonBank: Select which bank of eight channels to actively monitor (integer, 015). OpBits: Set to 48 to enable the shunt resistors (For IZ2 serial numbers > 2000 or any IZ2H only). This is also used for SH16-Z control. However if using an SH16-Z the IZ2_Control macro must be used. System 3 Manual Stimulus Isolator 7-31 IZ2 Stimulator Technical Specifications Technical specifications for the IZ2-32, IZ2-64, IZ2-128 and IZ2H-16 Stimulator Stimulus Output Channels 16 (IZ2H-16), 32 (IZ2-32), 64 (IZ2-64) or 128 (IZ2-128) Sampling rate IZ2H-16: Up to 195.3125 kHz^ IZ2-32: Up to 195.3125 kHz^ IZ2-64: Up to 97.65625 kHz^ IZ2-128: Up to 48.828125 kHz^ Stimulus Output Voltage +/- 12 V with LZ48 Stimulus Output Current IZ2: +/- 300 µA up to 50 kOhm load with LZ48 IZ2H: +/- 3 mA up to 5 kOhm load with LZ48 DC Offset Current < 100 nA on active chanels and < 3 nA on open channels Power Control/Stimulation LZ48 Rechargeable Battery with Li-Poly batteries Battery Life Battery life between charges: LZ48-200 ~4 hours to charge LZ48-400 ~8 hours to charge LZ48-200 w/ IZ2: 32 ch ~ 20 hrs 64 ch ~ 10 hrs LZ48-400 w/ IZ2H: 8 ch ~ 12 hrs 16ch ~ 6 hrs LZ48-400 w/ IZ2: 32 ch ~ 30 hrs 64 ch ~ 20 hrs 128 ch ~ 10 hrs Note: The LZ48-200 is not recommended for use with the IZ2-128 or the IZ2H-16 ^Note: the sampling rate is also limited by the RZ processor used for stimulator control. System 3 Manual 7-32 Stimulus Isolator Mini-DB26 Connector Pinouts for the IZ2 Stim Output Connector The Stim Output connector provides access to the analog output channels. These channels are used primarily for stimulus output. Pin Name Description Pin Name Description 1 A1 14 2 A2 3 A3 16 GND Ground 4 A4 17 5 Analog Output Channels Digital Clock 15 GND Ground HSD Headstage Detect 19 HSD 7 A5 20 A6 8 A7 21 A8 9 A9 10 A11 22 A10 23 A12 11 A13 24 A14 12 A15 25 A16 13 V+ +20 V Digital Data 18 HSD Headstage Detect 6 Analog Output Channels Digital Strobe 26 V- Analog Output Channels -20 V Note: TDT technical support (386-462-9622 or support@tdt.com) before attempting to make any custom connections to pins 6, 18, or 19. Mini-DB26 Connector Pinouts for the IZ2H Stim Output Connector The Stim Output connector provides access to the analog output channels. These channels are used primarily for stimulus output. System 3 Manual Stimulus Isolator 7-33 Pin Name Description Pin Name Description 1 A1 14 2 A2 3 A3 16 GND Ground 4 A4 17 5 Analog Output Channels Digital Clock 15 GND Ground HSD Headstage Detect 19 HSD 7 A5 20 A6 8 A7 9 10 21 A8 Analog Output Channels 22 Not Connected 23 11 24 12 25 13 V+ Digital Data 18 HSD Headstage Detect 6 Analog Output Channels Digital Strobe +20 V 26 V- Not Connected -20 V Note: TDT technical support (386-462-9622 or support@tdt.com) before attempting to make any custom connections to pins 6, 18, or 19. System 3 Manual 7-34 Stimulus Isolator Battery Reference The LZ48 has several batteries to power both the stimulation and the IZ2 stimulator logic circuitry. A 24 Volt battery charger with 2.7A of current capacity is included with the stimulator and can be connected via the connector on the LZ48's back panel. The charger tip is center negative. If it is necessary to replace the charger, ensure that the power supply has the correct polarity. Issue LZ48-200 LZ48-400 Battery life 200 Wh 400 Wh Rechargeable Yes Yes Compliance voltage +/- 15V +/- 15V Maximum impedance for delivering a 300 microAmp current 50 kOhms 50 kOhms Ambient temperature Normal room temperatures Normal room temperatures LZ48 Status LEDs VA: Positive Battery Pole VB: Negative Battery Pole VC: Logic Battery Level Eight LEDs indicate the voltage level of the currently displayed battery. When the battery is fully charged, all eight LEDs will be lit green. When the battery voltage is low, only one green LED will be lit. If the voltage is allowed to drop further, the last LED will flash red. TDT recommends charging the battery before this flashing low-voltage indicator comes on. While charging, the Status LEDs will flash. Status Description 8 Green Fully Charged 1 Green, 7 Unlit Low Voltage 1 Flashing Red Low Voltage - Charge Immediately! 8 Green Flashing Charging in Progress System 3 Manual Stimulus Isolator 7-35 LZ48 Battery Pack The LZ48 Battery Pack uses multiple Lithium Polymer (LiPoly) batteries. WARNING Just as with all batteries, shorting the LZ48 Battery Pack can cause damage to the device and injury to the user. Always use caution when handling or connecting the devices. WARNING Overcharging the LZ48 battery pack can cause the cells to rupture. The LZ48 Battery Pack should be connected to its charger for a maximum of 16 hours. Overcharging shortens battery life and may burn out the battery in extreme cases. Although the batteries used in the LZ48 are designed to provide the user with dozens of charge/discharge cycles, the performance of all rechargeable batteries deteriorates over time. The major sign that a battery is deteriorating is a shortened use cycle between charges. Note! Used LiPoly batteries must be recycled. The LZ48 Battery pack should be stored at normal room temperatures. Temperature extremes can affect the operation of the batteries. Battery packs stored for longer than two months should be tested prior to use. System 3 Manual Part 8 Video Processors System 3 Manual 8-2 Video Processors ~ System 3 Manual Video Processors 8-3 RV2 Video Processor Overview The RV2 Video Processor system is comprised of a machine vision color camera (VGAC), and a dedicated video processor and collection device (RV2). Video is streamed from the camera to the RV2 collection device where it is processed and stored. Camera triggering is precisely synchronized to the collection system (RZ) allowing frame by frame correlation between video data and other recorded system signals. A number of methods support robust target tracking including red/green LEDs mounted on the ZIF-Clip headstage or limb tracking. Positional information is available in real-time on the RZ device and can be processed and/or stored. Image data is stored on dedicated hard drives within the RV2 in DIVX encoded AVI files. Access to the RV2 storage array can be provided through a LAN connection or direct connection to a PC. The RV2 is recommended for use with TDT systems only. Power and Communication A fiber optic port on the back panel of the RV2 is used to communicate with an RZ device. The RV2 receives timing pulses from a special DSP (RZDSP-V) and returns real-time frame and tracking information for further processing and storage. Communication to the RV2 is provided through a touch screen user interface independent from the TDT system. Firmware updates for the RV2 interface are available online through the TDT web server. See page 8-14 for more information. Snapshots are sent from the RV2 over the network to the PC for laying out regions using RVMap software. Configuration files are sent from RVMap software to the RV2, also over the network. The RV2 contains an integrated switched-mode power supply. The power supply auto-detects your region’s voltage setting and no further configuration is needed. A switch located on the back panel of the RV2 is used to enable/disable the power supply. Software Control Software control is implemented with circuit files developed using TDT's RP Visual Design Studio (RPvdsEx) on the RZ processor through TDT’s OpenEx software package. A single RPvdsEx macro is provided to configure the RZ to send trigger information to the RV2 and receive frame and positional information. System 3 Manual 8-4 Video Processors See the RZ Z-Series Processors section on page 1-1 for more information on your RZ processor. For circuit design techniques and a complete reference of the RPvdsEx circuit components, see MultiProcessor Circuit Design and Multi-Channel Circuit Design in the RPvdsEx Manual. RVMap software is used to define regions and tracks for the RV2 search algorithm and determine what data is returned to the RZ for real-time analysis and/or storage. See the RVMap Software section, page 8-18, for more information. Triggering the RV2 The Video_Access macro is provided for configuring video tracking and must be added to the circuit file used in OpenEx. The macro has settings for the frame control, rate, and storage. See the macro internal help for more information. This macro also requires that the CoreSweepControl macro is present in the circuit to handle all circuit timing. The Video_Access macro stores timestamps when frame information is received. The PosData multi-channel stream contains tracker positions. Information for up to eight targets can be returned to the RZ for storage. RVMap is used to define the targets that are returned to the RZ. The Video_Access macro must be assigned to the DSP that is physically connected to the RV2. The Video_Access macro controls when frame triggers are sent from the RZ to the RV2. The RV2 receives the trigger, retrieves an image from the camera, adds it into the video file, performs the tracking algorithm and prepares the tracking data to be sent to the RZ. The RV2 waits until the next camera trigger from the RZ before returning the tracking data from the previous frame to the RZ. This ensures that there is always enough time to collect an image from the camera and run the tracking algorithm on it, and greatly reduces the likelihood that a frame is missed due to jitter in the collection process. However, because of this protection the data received by the RZ is always off by one frame. When track data is sent to the RZ it is also written to the tracking.txt file. The timestamp in the tracking.txt file indicates when the data was collected from the camera and is relative to when the RV2 began recording. Recording Sessions When OpenWorkbench is set to ‘Record’ mode and a Video_Access macro is present in the circuit, Workbench sends a UDP packet over the network to find RV2s. If Workbench doesn’t receive a response within five seconds an error message is displayed and recording begins without video storage. The UDP packet contains the tank and block name so the RV2 can properly name its files. Once an RV2 responds, OpenEx begins sending frame triggers and recording data. When OpenEx switches modes to anything other than ‘Record’ a packet is sent to the RV2 to close the files it is currently writing to and wait for the next recording session. Frame Rate The maximum frame rate depends on the camera’s exposure setting. This value can be adjusted using the ‘Lighter’ and ‘Darker’ buttons on the RV2 touch screen interface. The frame rate is overlaid on the camera image in the Live tab. The current maximum rate based on the camera settings is displayed when the camera is in free run mode. System 3 Manual Video Processors 8-5 Note: When recording data it is important that the desired frame rate is no greater than the observed free run frame rate, otherwise frame loss will occur. A lost frame counter is overlaid on the lower right corner the camera image. To reset this counter, see the Status tab. A reboot will also reset the lost frame counter. Hardware Requirements Basic requirements include a VGAC, an RV2, an RZ equipped with at least one video fiber optic port, one fiber optic cable for connection between the RV2 and RZ, the VGAC power cable, one Gigabit Ethernet cable to connect the VGAC to the RV2, a PC equipped with an Ethernet port or an Ethernet jack connected to a local area network, and an Ethernet cable. Setting-Up Your Hardware The RV2 Video Processor connects to one RZ processor via orange fiber optic cables from the back of the RV2 to the dedicated RV2 port on the back of the RZ (labeled ‘To RV2’). The gray camera power cable connects the ‘Power-1’ port on the RV2 to the VGAC camera. A GigE cable connects the ‘Camera-1’ port on the RV2 to the VGAC. An Ethernet cable connects the ‘Network’ port on the RV2 to either a local area network or directly to the PC running OpenEx. Optionally a VGA cable is connected from the ‘Monitor’ port on the RV2 to an external monitor. Important!: Make sure that all cables are connected before powering on the RV2. RV2 to RZ Connection Diagram In the diagram above, a single RZ connects to the RV2. The fiber optic cables are color coded to prevent wiring errors. System 3 Manual 8-6 Video Processors RV2 PC and Network Connection Diagram The diagram above illustrates possible connections from the RV2 to a PC (1) or network (2). Connect the Ethernet cable to the RV2 port labeled Network. Configuring the RV2 Default configuration settings allow the RV2 to begin streaming video immediately. The RV2 supports the DHCP (Dynamic Host Configuration) protocol for automatic configuration of network parameters. Once connected to an active network, the RV2 will attempt to lease an IP address. The DHCP Protocol DCHP or “Dynamic Host Configuration Protocol” is a protocol used by networked devices (clients) to obtain various parameters necessary for the clients to operate in an IP (Internet Protocol) network. By using this protocol, system administration workload greatly decreases, and devices can be added to the network with minimal or no manual configuration. DHCP automates the assignment of IP addresses, subnet masks, default gateway, and other IP parameters. Three modes for allocating IP addresses exist: Dynamic, Reserved, and Manual. The RV2 relies on Dynamic mode for its IP configuration. If no DHCP server responds, the device falls back on Manual mode with the following static IP configuration: IP Address: 10.1.0.42 Netmask: 255.255.255.0 Dynamic mode In dynamic mode a client is provided with a temporary IP address for a given length of time. The duration is dependant on the server configuration and may range from several hours to months. The RV2 will automatically renew the current IP address as needed. This renewal is used by properly functioning clients to maintain the same IP address throughout their connection to a network. System 3 Manual Video Processors 8-7 Accessing the RV2 There are two methods provided for accessing the RV2: Directly connecting to a PC Connection to a local area network Direct Connection to a PC Direct connection to a PC allows data on the RV2 to be viewed and modified through the standard Microsoft Windows file sharing protocol. Using Windows 7 To access the RV2 file system through a PC, running Windows 7: 1. You will have to configure the PC TCP/IP settings. Open Control Panel then doubleclick Network and Sharing Center. 2. Click the desired connection link (this is usually a Local Area Connection). 3. In the status dialog, click the Properties button. 4. In the item list, select Internet Protocol (TCP/IP) or if there are multiples, select Internet Protocol (TCP/IPv4). 5. Click the Properties button. 6. Select Use the following IP address and enter these values: IP address: 10.1.0.x, where x can be any value from 1 to 254 except 42. Subnet mask: 255.255.255.0 Default gateway: Leave empty 7. Click OK. The RV2 can now be accessed by the PC. 8. Obtain the RV2 device address. 9. a. Press the Live tab on the RV2 interface. b. The device address is displayed at the top of the page to the right of Device Name field. Enter the device address as shown in a windows address bar to access the RV2 file system. System 3 Manual 8-8 Video Processors Typically, the path \\RV2-0XXXX\ is used to access the RV2 storage array, where XXXX is the device serial number, but the name should be verified on the Live tab. 10. Access the files on the RV2 by reading or writing. Warning!: Do not attempt to write to the RV2 at any time while data is actively recording Doing so may corrupt data currently being stored. Using Windows XP To access the RV2 file system through a PC: 11. You will have to configure the PC TCP/IP settings. Open Control Panel then doubleclick Network Connections. 12. Right-click the desired connection (this is usually a Local Area Connection) and select Properties. 13. Select Internet Protocol (TCP/IP) or if there are multiples, select Internet Protocol (TCP/IPv4). 14. Click the Properties button. 15. Select Use the following IP address and enter these values: IP address: 10.1.0.x, where x can be any value from 1 to 254 except 42. Subnet mask: 255.255.255.0 Default gateway: Leave empty System 3 Manual Video Processors 8-9 16. Click OK. The RV2 can now be accessed by the PC. 17. Obtain the RV2 device address. a. Press the Live tab on the RV2 interface. b. The device address is displayed at the top of the page to the right of Device Name field. 18. Enter the device address as shown in a windows address bar to access the RV2 file system. Typically, the path \\RV2-0XXXX\ is used to access the RV2 storage array, where XXXX is the device serial number, but the name should be verified on the Live tab. 19. Access the files on the RV2 by reading or writing. Warning!: Do not attempt to write to the RV2 at any time while data is actively recording Doing so may corrupt data currently being stored. System 3 Manual 8-10 Video Processors Connecting Through a Network Connection to a local area network also allows data to be viewed and modified through the standard Microsoft Windows file sharing protocol from any PC connected to the same network as the RV2. To access the RV2 file system through a network: 1. DHCP must be enabled on the network in order to access the RV2. If DCHP is disabled or not supported, you can connect the RV2 directly to a PC. 1. Obtain the RV2 device address. a. Press the Status tab on the RV2 interface. b. The device address is displayed in the middle of the page just under the Fan Speeds. 2. Enter the device address in a windows address bar to access the RV2 file system. 3. Access the files on the RV2 by reading or writing. Warning!: Do not attempt to write to the RV2 storage array at any time while data is actively streaming. Doing so may corrupt data currently being stored. RV2 Storage Format The RV2 has three main storage folders – configs, recordings, snapshots. Configs: All of the rvm configuration files sent from RVMap are stored here. Recordings: For each recording, a new folder is created that contains the avi file, the rvm used for that recording and a text file (tracking.txt) that contains the results of the tracking algorithm. The tracking.txt file contains a list of frame numbers and tracked point information for each frame. The total number of points may exceed the 8 tracked target limit of the RZ2 Snapshots: holds JPG images from when the Snapshot button was pressed on the Live tab of the RV2 interface. Naming Convention When connected to an active network, TDT’s OpenEx software sends information to the RV2 via a broadcast UDP packet allowing it to properly name the video file recorded on the RV2. This allows you to easily match up the video with data stored in the tank. For example, if you are recording for the event Vid0 in Block-3 of DemoTank2 the RV2 will store in the following location and format: \recordings\DemoTank2\Block-3\DemoTank-Block-3_Vid0.avi Without the OpenEx network information the RV2 falls back to the default data format: \recordings\YYYY-MM-DD hh_mm_ss\YYYY-MM-DD hh_mm_ss.avi Note: The snapshots always store in the default format. \snapshots\YYYY-MM-DD hh_mm_ss.jpg System 3 Manual Video Processors 8-11 RV2 Features Power Button A power button located on the front plate of the RV2 is used to turn the device on and off. Prior to powering on/off, the device will enter a brief boot/shutdown period. Important!: Only power the RV2 down when it is not actively recording a video. Failure to do so may result in the RV2 performing a file system check during the next boot process and possible data loss. Note: If the RV2 becomes unresponsive and fails to shutdown normally, you can shut the device down by holding the power button for longer than five seconds. This will force the device to shutdown. After a forced shutdown, the RV2 may perform a file system check. LCD Touch Screen The LCD touch screen allows navigation through the RV2 interface. To make a selection, gently press the touch screen on the desired item. Interface The interface reports information and allows configuration of available options. A selection tab located on the right-side of the screen allows the user to select between the available pages. To navigate to the desired window, press the corresponding tab on the right side of the LCD screen. Live The Live tab shows the current image captured by the camera, allows changes to the camera settings, and allows the user to choose the current tracking configuration. Device Name: The NetBIOS name of the device. Firmware Version: The currently installed firmware version number. This is useful for identifying the current firmware version and also to verify that a recent firmware update has been installed. See settings of the Config tab, page 8-14 for more information on updating the firmware. Current Config: A dropdown list of all available configurations. Tap a configuration to select it. System 3 Manual 8-12 Video Processors AutoOnce: Tells the camera to perform its built-in auto-adjustment of exposure, gain and white balance. Lighter/Darker: Adjusts the exposure time longer and shorter, respectively. Full Screen: Displays the camera image over the entire screen. Tapping on the full screen image returns the interface to normal. Resolution (v1.6b and above): A dropdown list at the bottom of the screen controls the camera resolution (640x480 or 320x240). Lower the resolution to achieve a higher frame count. Manual Control: Enables the Snapshot, Track LEDs and Record buttons. You cannot record from OpenEx while the RV2 is in Manual mode. Tab the Manual Control button again to disable Manual Control. Snapshot: Copies the current camera image to a JPG file on the RV2 hard drive, into the snapshots folder. Track LEDs: Applies the tracking specification in the currently selected configuration file to the live camera feed. If colored targets are tracked, dots will appear in the image where the algorithm is finding targets. Use this mode to preview the efficiency of the tracking algorithm and then modify the configuration and/or camera settings if needed. Record: Performs a manual recording. Since the camera is in free-run mode the frame rate will be maximized. Tap Record again to stop recording. Playback The Playback tab provides a list of video files currently stored on the RV2. Videos may be reviewed through this interface. The video’s length is displayed, in time or in frames, as well as the current position. Current Video: A dropdown list containing all video files on the RV2. Tap a video name to select it. Play: Begin playing the currently selected video. Tap again to pause playback. To restart the video, you must select a different video and then select the original video. As Frames/As Time: Switch the Video Stats units from time to frames. Synchronized playback: When tank data is accessed by a TDT application (such as OpenExplorer or OpenScope) the application will detect epoch event names that begin with ‘Vid’. System 3 Manual Video Processors 8-13 When the TDT application retrieves data from that epoch, the TDT application will send a UDP packet containing the tank name, block name and current value of that epoch (which corresponds to the frame number). An RV2 on the network will receive the packet, open the corresponding video file (if it exists) and jump to that frame. The RV2 must be on the Playback tab for this functionality. Rerun tracking algorithm: While playback is occurring on the RV2, the rvm file in the same directory as the avi file on the RV2 file system is used to run the tracking algorithm and overlay the results on the video image. Status The Status tab provides system information such as processor usage rates, core temperatures, fan speeds, device IP address, array reformat progress, memory buffer allocation, and communication errors. Log information can also be retrieved from this tab. System: Displays important system status information. Processor Usage: Displays the current percent usage for each processor core. Core Temperatures (F): Displays the current processor core temperatures measured in Fahrenheit. The text will turn yellow or red if the processor gets too hot. This can occur if there is an issue with the heatsink or internal fans. When this happens the RV2 will sound a warning and should be shut down immediately. Fan Speeds (RPM): Displays the approximate rpm for all three fans located inside of the RV2. Current IP: Displays the IP address currently assigned to the RV2. Storage Array: Displays information about the state of the current storage array. Active and mounted: Storage array is available and ready to store data. Active and not mounted: A support storage array is available but is not configured to store data. Array was not found!: The system did not detect a supported storage array. Progress bar: Displays progress for various processes which run on the RV2 including: Reformatting: When reformatting a storage array, the progress completed (%) as well as the estimated amount of time remaining is displayed. System 3 Manual 8-14 Video Processors Resyncing: If a mirrored array type has been formatted, the progress completed (%) as well as the estimated amount of time remaining for the Resync process is displayed. File System Check: The RV2 will perform a file system check during the boot process once every 30 boots. This ensures the integrity of the storage array and file system. If the RV2 is performing a file system check, the progress completed (%) and estimated amount of time remaining is displayed. During this time the Playback tab will be disabled and the RV2 cannot be triggered for storage. Memory Usage: Displays current and maximum memory (RAM) usage since last reboot Memory Usage: High Water Mark displays the most memory used by the system since last reboot. Current Size displays the currently used memory. Total System (free total) indicates how much memory is available vs how much total memory the system has. Clear Lost Counter: Resets the lost frame counter. View Log Window: A log stores relevant messages and any communication errors encountered while the RV2 is in use. Click to open and view the log window. The log.txt file can be copied from the storage array for transfer to a PC. Note: Individual comments can be saved as well. Use a drag gesture to highlight the desired comment(s) and click Save to write the selection to the log.txt file. Config The Config tab provides options for reformatting the currently installed storage array, updating the RV2 firmware, and rebooting the system. Data Storage Locations: Not currently implemented. Current Drive Configuration: Displays information about the currently installed data drives. Number of Drives: Displays the number of drives currently installed. Array Type: Displays the currently configured array type and the status of the drives. Striped: Array type is currently configured as striped. Mirrored(UU): Array type is currently configured as mirrored. A U indicates that a drive is up and running. A _ indicates a drive failure. System 3 Manual Video Processors 8-15 Missing: No array type is detected. Array Status: Displays the current status of the array. Preparing: Storage array is currently being reformatted. Resyncing: Storage array is being reformatted as a mirrored array and is currently resyncing the mirrored partitions. N/A: Storage array is not detected. Active: Storage array is detected and configured. Reformat Array: Click to prompt the reformat array dialog. This dialog will ask for confirmation as well as the desired array type: Striped or Mirrored. Reformatting an array will erase all data contained in the array. Note: When reformatting an array, the interface may become temporarily unresponsive. Miscellaneous Tasks: Provides options for updating the current RV2 firmware and rebooting the system. Update Firmware: Click to update the RV2 firmware. Firmware is downloaded from the TDT server and automatically installed on the RV2. Connection to a DHCP enabled network that has internet connectivity is required to retrieve any updates. Important!: TDT recommends updating the firmware only when absolutely necessary (critical updates and if the system experiences compatibility issues). In most cases if a problem is encountered, contact TDT. Reboot System: Click to reboot the system. Device Status LEDs The device status LEDs report streaming or network activity. The following tables display the status LED indicators. Video Status Information Off No video camera is detected. Lit Video camera has been found Status Information Off No network traffic detected. Lit Network traffic is present and detected on the RV2. Status Information Off No storage access to the RV2 is detected. Lit Storage access to the RV2 is in progress Network Storage Ethernet Ports Two Ethernet ports are provided on the back panel, Video and Network. System 3 Manual 8-16 Video Processors Camera-1 The Camera-1 port connects directly to the Ethernet port on the VGAC. Important!: The cable connecting the RV2 to the VGAC MUST support gigabit Ethernet (e.g. Cat 5e, Cat 6). Network The Network port allows connections to either a PC or local area network via a standard Ethernet cable. The RV2 supports automatic DHCP protocol. Power Port A 9-pin serial port is provided on the back panel, labeled Power. This port is connected to a special cable that provides power to the VGAC using the special gray cable provided with the system. VGA Port A VGA port is provided on the back panel, labeled Monitor. This port can be connected to an external monitor that will show the current camera image or a video that is being played in the Playback tab. Important!: The external monitor must be connected before the RV2 is powered on. USB 2.0 Port This port is currently not in use. Technical Specifications Processing Cores 4 Storage Array Size 2 Terabytes System RAM 2 GB Number of Video Inputs 1 VGAC Specifications: Camera type CCD CCD sensor size 1/3” Aperture (f/#) F1.4 Focal Length 4.0 – 8.0 mm Resolution 8-bit per channel (24-bit total) Features Auto Exposure Auto Gain System 3 Manual Video Processors 8-17 Auto White balance Field of View (degrees): vertical = 57.2, horizontal = 70.6 Spatial Resolution (minutes): vertical = 16.3', horizontal = 15.7' Frame Rates (typical) 640x480 color -- 40 FPS 320x240 color -- 100 FPS (firmware v1.6b and above) Video File Format DIVX encoded AVI Troubleshooting The following section provides examples and solutions to some of the errors that could be encountered while using the RV2 Video Tracker. Device Will Not Power Up Check the position of the power supply switch. If set to the “O” position the power supply is disabled. To enable, simply ensure that the switch is in the “1” position and attempt to power on the RV2. If the device does not power up after verifying that the power supply is enabled contact TDT. Can’t Access the RV2 Storage Array Check the Ethernet cable connection to ensure that the RV2 is connected to a network or PC using the Network Ethernet port located on the back panel of the RV2. If the Ethernet cable is connected to the Video Ethernet port, network traffic will cause the Network status LED to light up. See Setting-Up Your Hardware on page 8-5 for connection diagrams. If you are attempting to access the RV2 through a network, ensure that the server supports DHCP. If not, the RV2 will default to its static IP address (10.1.0.42). If you encounter this issue, see page 2-7 for information on how to access the RV2 using a direct connection to a PC. RV2 Interface Becomes Slow or Unresponsive Every thirtieth time the RV2 is booted up, it performs a disk check. The length of time required to perform this check depends on how much video data is currently stored on the RV2. During this time, the Playback tab will be grayed out and you will be unable to record to the RV2. The Status tab . TDT recommends removing unnecessary data remaining on the storage array. RV2 Is Not Correctly Naming Data Folders When connected to an active network, TDT’s OpenEx software sends information to the RV2 via a broadcast UDP packet allowing it to properly name the video files stored on the RV2. If the RV2 is powered on before connecting the necessary network cables it may default to the basic naming format. Power off the RV2, connect all the necessary cables then power the RV2 back on. System 3 Manual 8-18 Video Processors RVMap Software Overview The RVMap application provides a simple visual interface to define regions and targets for video tracking. RVMap is installed with TDT drivers, version 72 or greater. See Setting-Up Your Hardware, page 8-5, for information on setting up the RV2 video processor, VGAC camera, and RZ recording system. The overall process for using the RVMap is as follows: 1. Get a snapshot of the experiment space from the camera connected to the RV2. 2. Describe targets that will be tracked in the experiment space and regions of interest. 3. Upload the configuration to the RV2 file system. The Workspace RVMap provides a workspace where users can display a camera snapshot and define regions and targets. Menus and Toolbars Window Status Bar Window The main workspace window displays an image from a camera or loaded file. Click-and-drag tools are used to define regions and targets on a map overlaying the image. System 3 Manual Video Processors 8-19 Menus and Toolbars A comprehensive set of menus and toolbars provides access to commands and tools. Frequentlyused commands are available via toolbar buttons. Move the mouse pointer over a toolbar button to display the button name. A tool tip for the button is also displayed in the Status Bar. See the Menus and Toolbars Reference, page 8-31, for a complete list of commands and tools. Context sensitive menus are available by right-clicking the workspace. Status Bar A status bar along the bottom of the window displays status messages, tool tips. The right side of the status bar displays the coordinates of the pointer. Creating a Configuration Before a recording session can be started, an RVMap configuration file (*.rvm) must be created, saved, and uploaded to the RV2. Configurations are created by drawing regions and targets to create a map overlaying a reference image. The *.rvm files contain region descriptions, reference points, target descriptions and camera settings. Loading an Image RVMap can load a snapshot image from a connected RV2 and camera or from a previously saved image file. Loading Existing Image Files To load an existing image: 1. Click the File menu and click Load Image. or Click the 2. Load Image button on the Standard Toolbar. The Specify Image File dialog box is launched. Browse to the desired folder. 3. Select the image file and click Open. System 3 Manual 8-20 Video Processors Loading Images from the RV2 RVMap can auto-detect the RV2 and then retrieve a snapshot from a connected camera. Before loading an image from an RV2, ensure the RV2 is on and connected to the PC or network and then connect and position the camera over the experiment space, preferably with the targets visible. Try to make the conditions as close as possible to the recording conditions as this will aid in creating accurate target and region definitions. To load an image from the RV2: 1. Click the File menu and click Load Image from RV2. 2. If a default RV2 has not previously been defined, the Load Image From dialog is opened. In this dialog box, any available RV2s connected to the system or available across a network will be displayed. In the Hardware Available list, select the desired RV2. Note: Every time RVMap needs information from an RV2, it pings the network for available RV2s and lists them. To make the selected RV2 the default hardware and bypass this step in the future, select the Use as default and do not show this dialog check box. 3. Click OK. A snapshot from the RV2 is retrieved and displayed. Defining Regions RVMap allows users to define up to eight active regions and one void region. Active regions are numbered one to eight and the corresponding region number will be included in the returned data when a target is found in that region. A void region can be used to eliminate areas of the image which are outside the experiment space. The tracking algorithm will not look for targets in void regions. Regions are defined by drawing a region shape over the image in the main window. The shape must be a polygon and may have any number of vertices. Note: The X,Y coordinates of the pointer are displayed in the right end of the status bar for more specific information about placement of the region vertices. System 3 Manual Video Processors 8-21 To place a region: 1. Click a region button on the region toolbar. 2. Click the image area in one corner of the desired region to begin drawing a polygon. Click each corner of the region in turn to create a vertex point. 3. Double-click the last vertex to complete the region shape. System 3 Manual 8-22 Video Processors Modifying a Region To move a region: Click and drag the region to the desired location. To change the region number: 1. Regions are numbered and identified on screen using colors. Right-click the region to be changed. 2. Click Change Region on the shortcut menu. 3. In the Change Region Type dialog box, select the desired region label in the list and click OK. System 3 Manual Video Processors 8-23 The region has been changed and should be displayed in the color corresponding to the new region number. Note: Selected regions can also be changed using the Regions menu. To edit the vertices: 1. Hold down CTRL and double-click a region. The regions outline will be wider and the vertices will be selectable. 2. You can now move, add, or remove a vertex. To move a vertex, click and drag the vertex. To add a vertex, hold CTRL and click on the region’s boundary to place a new vertex in that location. To remove a vertex, hold CTRL and click the vertex you want to remove. Defining Targets Targets are added to the configuration to identify fixed, relative, or reference targets for tracking. Fixed targets are an easily identified red, blue, or green area on the target subject, such as an LED on a headstage or color marker. Relative targets are points expected to always be located in a predictable area relative to a previously defined target, such as a second LED on a headstage. This limits the search area, which reduces processing demands and increases accuracy. The location of the relative target can be used to infer information, such as the orientation of the subject and can be used to more accurately place reference targets. Reference targets are identified based on the location of previously defined target(s). This is a point that maintains a fixed distance and angular separation from other trackable targets but does not have a trackable marker. An example of this is the nose of a mouse wearing a red/green LED headstage. During recording, the tracking algorithm searches all areas of the image not defined as a void region and identifies the location of the targets. Data for each target (region, 0, x, y) and reference (region, heading, x, y) are saved in a text file (tracking.txt) during each recording session. For each target or reference, the user defines whether or not information is sent back to the RZ for System 3 Manual 8-24 Video Processors real-time analysis and/or storage. Information from up to eight targets and/or references can be returned to the RZ. The Return option in the Target Specifications determines if the target or reference target will be returned to the RZ. Fixed Targets At least one fixed target must be placed before any other types of targets. To place a fixed target: 1. Click the Target button on the Region toolbar. 2. Click in the image window to place the target. The Select New Target Specifications dialog opens. 3. Ensure the Target Type is set to Fixed. 4. In the Target Radius box, type a new value to define the target radius (in pixels) or adjust the value using the adjacent arrow buttons. 5. In the Color drop-down list, select the desired color. 6. Select or clear the Return checkbox to determine if data from this target will be sent back to the RZ for real-time analysis and/or storage. 7. Under Fixed Search Method select the radio button for the desired method. 8. Full Screen Search for a target of the defined color and radius in any location in the image window (except Void regions). Circle Radius Search for the target in a particular circle in the image window. If this option is selected, enter the radius in the Circle Radius value box or use the arrows to adjust the value. Click OK. System 3 Manual Video Processors Fixed Target with Full Screen Search 8-25 Fixed Target with Circle Radius Search Relative Targets Once a Fixed target has been placed, a Relative target can be placed. An arc segment around the Fixed target determines a search area for the Relative target. To place a relative target: 1. Click the Target button on the Region toolbar. 2. Click the target in the image window. The Select New Target Specifications dialog opens. 3. In the Target Type dropdown list, select Relative. 4. In the Target Radius box, type a new value to define the target radius or adjust the value using the adjacent arrow buttons. System 3 Manual 8-26 Video Processors 5. In the Color drop-down list, select the desired color. 6. Under Parents, select the desired target from the Primary and Secondary (if there are more than two targets already) drop down lists. 7. Select or clear the Return checkbox to determine if data from this target will be returned to the RZ for real-time analysis and/or storage. 8. Click OK. The Relative Search Parameters can be modified after the Relative target has been added. To modify the parameters: 1. Double-click the target. The Modify Relative Target Specifications dialog box opens. System 3 Manual Video Processors 8-27 2. Type values or use the arrow buttons to adjust the values of the search area Start Angle, End Angle, Inner Radius, and Outer Radius. This defines the shape of the arc to look in. Enter 180 and 180 for the Start Angle and End Angle, respectively, to search in a complete circle. 3. To apply the changes, click OK. Reference Targets Reference targets can be created after one or more Parent targets have been place. References can be placed with one or two Parents. When only a Primary Parent target is defined, the distance and angle (relative to 0, i.e. the horizontal axis) from Reference target to the Primary target is preserved. When two Parent targets are defined, the distance from the reference to the Primary target is preserved, and the angle from the Secondary Parent to the Primary Parent to the Reference target is also preserved. Example: When a two LED headstage, red and green, is used with a mouse, a reference point may be placed on the nose. There is no LED there, but the distance from primary target to the nose is constant, and so is the angle between the green LED, the red LED and the nose. In this way the nose can be tracked without having to place an LED directly on the nose. To place a reference target: 1. Click the Target button on the Region toolbar. 2. Click the target in the image window. The Select New Target Specifications dialog opens. 3. In the Target Type dropdown list, select Reference. System 3 Manual 8-28 Video Processors 4. Under Parents, select the desired target from the Primary and Secondary (if applicable) drop down lists. 5. Select or clear the Return checkbox to determine if data from this target will be returned to the RZ for real-time analysis and/or storage. 6. Click OK. Saving Configurations The configuration is saved to an RVMap file (*.rvm). To save the map file: 1. Click the File menu and click Save As. 2. Browse to the desired location, type a name in the File name box, and click Save. System 3 Manual Video Processors 8-29 To upload to an RV2: 1. Click the File menu and click Send Config to RV2. or Click the button on the toolbar. 2. If prompted, select the hardware. 3. In the Create/Replace Config dialog box, enter a name in the New Config Name box and click Send. 4. Verify that the new config is listed as the Current Config on the Live tab of the RV2 interface. You are now ready to begin your OpenEx recording. Workplace Settings The workplace settings, including range/units of the display, camera settings, and tracking details can be accessed in the Settings dialog bog. The Settings dialog can be opened using the menu. Settings button on the toolbar or from the File Reference Points and Range The units/scaling of the workplace and all X, Y coordinate values returned by the tracking algorithm are determined by the following image window Reference Points: red circle blue star System 3 Manual 8-30 Video Processors By default, the red circle and blue star Reference Points are positioned, respectively, in the bottom left and top right corners of the image. The red circle defines the center point (0,0) and the blue star defines the position of the (X,Y) range value in the Settings dialog. After the range values have been defined, click OK to apply them to the RVMap settings. The Reference Points can be dragged to a new position, such as the location of a known object in a displayed image, to help define a real-world scale for the image. For example, a ruler might be placed in the camera frame and the Reference Point can be dragged to each end of the ruler so that the X,Y coordinates will be redefined based on the ruler visible in the image. To select and move the Reference Points simultaneously: Hold down the CTRL key and click each of the Reference Points. They are now both selected and both will move in unison. Camera Settings The Camera Settings area of the Settings dialog box enables user to retrieve settings from the camera so that they can be stored with the configuration and applied each time that configuration is used. The RV2 does not maintain the camera settings after it is rebooted, so it is a good idea to store the current settings in the configuration file. The values you see initially are the default values. To retrieve the camera settings to be applied each time the configuration is loaded: Click Fetch From Camera. The Live tab on the RV2 interface provides an AutoOnce button that tells the camera to perform its own auto-adjustment of exposure, gain and white balance. The Lighter and Darker buttons on the Live tab are used to adjust the exposure time. There is no direct control of gain and white balance on the RV2 interface, so if you want to manipulate those values you will have to adjust them in the Settings dialog and upload the configuration to the RV2 to apply those camera settings. See Saving Configurations, page 8-28, for more information on uploading the configuration. Track Specifications The Track Specifications area of the Settings dialog box displays details of the current map configurations and can be used to edit and/or enter configurations in a text format. An example is displayed in the commented text (the lines begin with '#') to provide some description of the structure. Targets can be refined here more precisely than in the GUI. This method is recommended for users who are very familiar with the system and scripting. In general, System 3 Manual Video Processors 8-31 it is easiest to use the GUI to design the tracking algorithm and visit the Track Specifications textbox later if necessary. Menu and Toolbar Reference Menus File Menu New Open a new RV Map file. Open Launch the Load RV Map File dialog box. Close Close the application. Save Save changes to the current RV Map File or launches the Save RV Map file. Save As Launch the Save RV Map file. Load Image Launch the Specify Image File and enable the user to load a saved snapshot image. Load Image from RV2 Load a snapshot image from a connected camera. If a default hardware device has not been previously defined, the Load Image From dialog box is launched to prompt hardware selection. Send Config to RV2 Send the current configuration to the RV2. If a default hardware device has not been previously defined, the Send Config To dialog box is launched to prompt hardware selection. Use Configs Retrieve a list of available configuration on the RV2 and allow the user to select a configuration. If a default hardware device has not been previously defined, the Use Config On dialog box is launched to prompt hardware selection. Purge Configs Delete the previously saved configurations on the RV2. If a default hardware device has not been previously defined, a dialog box is launched to prompt hardware selection. Settings Launch the Settings Window and allow the user to define range, camera, and track specifications. Page Setup Enable the user to define specifications for printing the image. Print Print the currently displayed image. Print Preview Preview how the currently displayed image would be printed. Recent File List recently used RV Map files. Exit Close the application. Edit Menu Undo Undo the most recent action. Redo Redo the most recent action. Cut Cut the selection and put on the clipboard. Copy Copy the selection and put on the clipboard. Paste Insert clipboard contents. Delete Delete selection. System 3 Manual 8-32 Video Processors Show/Hide Regions Toggle the region image overlay on or off. Edit Vertices Enable click-and-drag editing for a selected region. Drag Vertices to change the shape of the image, or CTRL+click to add/remove vertices along the region boundary. Change Region Launch the Change Region Type dialog box and enable the user to change the region label for a selected region. Lock References Lock the Reference Points at their current positions. Reset References Reset Reference Points to their default positions. Use Default RV2 Make the currently connected RV2 the default hardware throughout the software. Regions Menu Void Enable multi-click region drawing tool to define a void region. Region-1 Enable multi-click region drawing tool to define Region-1. Region-2 Enable multi-click region drawing tool to define Region-2. Region-3 Enable multi-click region drawing tool to define Region-3. Region-4 Enable multi-click region drawing tool to define Region-4. Region-5 Enable multi-click region drawing tool to define Region-5. Region-6 Enable multi-click region drawing tool to define Region-6. Region-7 Enable multi-click region drawing tool to define Region-7. Region-8 Enable multi-click region drawing tool to define Region-8. Targets Enable click drawing tool to place a new target. Window Menu New Window Not currently used. Cascade Not currently used. Tile Not currently used. Arrange Icons Not currently used. Zoom 50% Display the image in the main window at 50%. Zoom 100% Display the image in the main window at 100% (scale 1:1). Zoom 200% Display the image in the main window at 200%. Help Menu About RVmap System 3 Manual Display program information including version and copyright. Video Processors 8-33 Toolbars Standard Toolbar New Create a new document. Open Open an existing document. Save Save the active document. Load Image Load bitmap image from disk. Load Image From RV2 Load snapshot from RV2. Send To Hardware Send the active configuration to RV2 and set it as the current configuration. Use Configs Tell RV2 which rvm file to use. Purge Configs Purge unused rvm files from RV2. Change Settings Change settings, such as range, camera settings, and tracking details. Cut Cut the selection and put on the clipboard. Copy Copy the selection and put on the clipboard. Paste Insert clipboard contents. Show/Hide Regions Toggle the region image overlay on or off. Edit Vertices Enable click-and-drag editing for a selected region. Drag Vertices to change the shape of the image. CTRL+click to add/remove vertices along region boundary. Change Regions Launch the Change Region Type dialog box and enable the user to change the region label for a selected region. Lock Reference Points Lock the Reference Points at their current positions. Reset Reference Points Reset Reference Points to their default positions. Zoom 100% Zoom to 100% (scale 1:1). Zoom 200% Zoom to 200% Print Print the active document. About Display program information including version and copyright. System 3 Manual 8-34 Video Processors Region Toolbar System 3 Manual Draw Void Region Select pen to draw void region. Draw Region 1 Select pen to draw region 1. Draw Region 2 Select pen to draw region 2. Draw Region 3 Select pen to draw region 3. Draw Region 4 Select pen to draw region 4. Draw Region 5 Select pen to draw region 5. Draw Region 6 Select pen to draw region 6. Draw Region 7 Select pen to draw region 7. Draw Region 8 Select pen to draw region 8. Draw Targets Select pen to place a new target. Part 9 MicroElectrode Array Interface System 3 Manual 9-2 MicroElectrode Array Interface ~ System 3 Manual MicroElectrode Array Interface 9-3 MZ60 - MicroElectrode Array Interface Overview The MZ60 Microelectrode Array Interface is used with our RZ2 BioAmp Processor and the PZ2 Amplifier as part of a complete solution for high spatio-temporal resolution tissue slice and cell culture recordings. The interface supports simultaneous stimulation and extracellular in-vitro recording on up to 60 channels and offers built-in environmental control. Headstage amplification provided on the MZ60 is optimized for high input impedance and low output impedance to achieve high signal-to-noise ratio, high sensitivity, and stability for long experimental durations. The MZ60 is compatible with a large selection of MEA plates and both inverted and upright microscopes. The Microelectrode Array System A typical system consists of an RZ2 processor, a PZ2 amplifier, the MZ60 microelectrode array interface, and the HC10 temperature controller. An optional stimulus generation device may also be used and controlled by the RZ2 processor as part of an integrated solution. The diagram below illustrates the function of the components in the system. High Speed Fiber Optic Interface Fiber Optic Connection Software control and data transfer Transfer control info for PZ2 amplifier and digitized signals PC RZ2 Processor Real-time DSP controls I/O signals and processes digitized data from the PZ2 amplifier. PZ2 Amplifier Digitizes recorded data from the MEA60. Optional - Stimulus generation device for designated microelectrode sites. MZ60 Interfaces with MEA electrode sites for stimulation and recording. HC10 Programmable heating unit. Microelectrode Array System Diagram System 3 Manual 9-4 MicroElectrode Array Interface As seen in the illustration above, the MZ60 acquires analog input signals from cell lines or tissue slices via a MicroElectrode (MEA) plate and sends those signals to the PZ2 amplifier. All channels are digitized on the PZ2 using an 18-bit hybrid A/D architecture and up to ~50kHz sampling per channel. Digitized data is streamed to the RZ2 multiprocessor DSPs on a lossless fiber optic connection and processed data is transferred to the PC for data storage via a highly optimized bus and high throughput fiber optic connection. A single RZ2 and PZ2 system is capable of interfacing with up to four MZ60’s. The HC10 temperature controller monitors and regulates a user defined temperature for the MZ60. Stimulation can be delivered to any of the MZ60's electrode sites while the RZ2 processor simultaneously records from non-stimulus channels and may be provided by the RZ2 processor or an optional stimulus device. The Microelectrode Array Interface The MZ60 is compatible with the standard 49x49mm arrays from NMI or Ayanda Biosystems and can accommodate a wide selection of readily available arrays. The arrays are placed on an aluminum plate and spring loaded connections are secured over the contact pads when the top is lowered and locked using the twist lock mechanism. A voltage-follower headstage provides a high input impedance and low output impedance with unity-gain. The dynamic range of the MZ60 and PZ2 amplifier is 10 mV with a signal resolution of 1 µVolt or less. It is therefore ideal for low voltage biological recordings. Each of the sixty channels can be configured in one of two states: Record: Channels in record mode become part of the return path for in-vitro signals and are connected to a PZ2 amplifier input channel. Channels are designated for recording when the corresponding DIP-switch is in the OFF position (opposite the ON position labeled on each DIPswitch). Stimulate: Channels in stimulate mode allow current to pass through the enabled electrodes. Stimulating channels are NOT connected to the PZ2 and will NOT saturate the input to the PZ amp nor are they connected to the REF line on the MZ60. A common ground pin is available on the Microelectrode Array Interface. Channels are designated for stimulation when the corresponding DIP-switch is in the ON position. The MZ60 channels are organized in four individual 16-channel banks that correspond to banks of channels on the PZ2 amplifier. Each bank transmits 15 analog signals recorded from the MEA to the PZ2 amplifier (the sixteenth channel of each bank is connected to ground and is not used). If any channel is designated for stimulation, it is grounded internally on the PZ2. In addition to the MEA plate located inside of the MZ60, a heating coil is provided for temperature regulation and is controlled by the HC10 Temperature Controller. The HC10 Temperature Controller The HC10 temperature controller provides controlled heating for the MEA Interface. This device allows temperature adjustment settings in either Celsius or Fahrenheit with up to a degree resolution. Built in offsets and buffered memory allow user specified settings to be stored. The heating coil located underneath the MEA plate is used to monitor the current temperature as well as regulate the temperature. See the HC10 section on page 9-10 for more information. Hardware Set-up To insert the MEA into the interface. Twist the knob on the front edge of the MZ60 counterclockwise to release the hinged top. Lift the top and position the MEA on the aluminum plates. System 3 Manual MicroElectrode Array Interface 9-5 Lower the top and twist the knob clockwise to secure the MEA inside the interface housing. Important!: The securing knob on the MEA turns on a screw that allows for pressure adjustment between the MEA plate and the MZ60 interface contact pins. The pressure should be set to achieve only light contact between the spring loaded contact pins and the MEA electrode plate (enough pressure to visually depress the spring contacts). Excessive pressure may cause damage to the device or MEA plate. Refer to the vendor’s specifications of the chosen Microelectrode Array (MEA) plate regarding the MEA pinouts and technical specifications of the electrodes. To connect the system hardware: Ensure that the TDT drivers, PC interface, and device caddies are installed, setup, and configured according to the System 3 Install Guide provided with your system. Connect the MZ60 Interface to the PZ2 Amplifier via the MZ60 interface cable provided. Attach the 68-pin D-Sub connector on the interface cable to the corresponding connector on the MZ60. Attach each of the labeled Mini-DB26 connectors to the corresponding channel bank connector on the PZ amplifier. Connect the PZ2 amplifier to the RZ2 processor using the provided fiber optic cable. The fiber optic wires are keyed and color coded to reduce connection errors. If heating is desired, connect the HC10 temperature controller to the 9-pin connector provided on the MZ60 interface cable. Plug in the AC power cable provided with the HC10 then connect it to the power port located on the back of the HC10 housing. Using the power switch on the back panel, power on the HC10 and allow it to heat to the desired temperature. Power on the RZ2 processor and PZ amplifier. If using the system with other devices, such as a third party stimulus device or preamplifiers, see the documentation for those devices for hardware connection information. HC10 (Side view) HC10 9-Pin Bank D 49-63 Temperature Adjust Knob PZ2 Back Panel 49-64 Bank C 33-47 D-Sub Connector 68-Pin 7 1 2 7 8 9 1 3 4 5 6 7 Stim (ON) Record 8 1 01 11 21 31 4 6 5 2 2 4 3 2 7 2 2 3 6 5 4 2 6 3 5 5 3 2 7 4 4 74 64 5 4 44 34 24 1 30 3 93 83 73 63 53 4 1 2 3 N 4 5 6 7 1 O 2 3 4 5 6 7 4 N 3 2 1 4 3 2 8 2 9 3 0 3 1 8 0 9 7 2 1 6 5 4 5 5 O 2 2 O 7 5 2 6 5 N 4 1 5 5 O 1 1 8 5 7 0 5 6 9 2 9 5 1 0 5 N 7 8 1 6 4 1 1 6 3 3 2 2 6 6 5 1-16 5 Bank A 1-15 6 6 8 5 5 7 4 4 Bank B 17-31 N 3 3 1 N O 2 2 O O N 1 1 RZ2 Back Panel 17-32 MZ60 MEA Interface O 33-48 Charger In PreAmp Zbus Out 8 N Out In Out In Zbus Interface Setup of the Microelectrode Array System System 3 Manual 9-6 MicroElectrode Array Interface Microelectrode Array Interface Features Analog Input and Output The MZ60 supports Microelectrode Arrays (MEAs) which contain electrode sites for up to 60 analog input/output channels. Any of these analog channels may be configured for recording or stimulus presentation using top panel stimulus switches. Stimulus Switches A DIP-style switch is provided for each of the 60 analog input channels and controls the nature of each channel (whether a channel is used for stimulation or recording). From Stim Port _ 10kΩ To PZ2 To MEA Electrode Site + Recording Channel Record Mode Selected Stimulate Mode Selected MZ60 Single Channel Circuit Diagram In the circuit diagram above, a single MZ60 channel is shown. Each channel is either in record mode (the MEA recording site is connected through the corresponding MZ60 headstage to the PZ2 A/D channel) or in stimulate mode (the MZ60 stimulate port contains a path to the global ground pin and the MEA recording site is grounded). Switch State Reference Table Record Mode Stimulate Mode Stim Port Connected to Electrode Site* Electrode Site Connected to MZ60 Headstage Shorted to Common Ground PZ2 Channel Records analog signals from MZ60 Headstage Shorted to Common Ground *Warning!: Channels designated for recording are still connected to the corresponding stim port located on the MZ60. To avoid damage to the MZ60 headstage, DO NOT attempt to present stimulus signals to channels configured for record mode. System 3 Manual MicroElectrode Array Interface 9-7 Environmental Control The MZ60 Interface housing contains built-in environmental control and allows the microelectrode array (MEA) to have regulated temperature control. MZ60 Interface Cable Connector An interface cable is provided to connect the MZ60 to the PZ2 amplifier and, optionally, to the HC10 temperature controller. The cable features a 9-pin connector for the HC10 and four miniDB26 connectors which connect to four banks on the back of the PZ2. Common Ground Pin A single ground pin is attached to the MZ60 and serves as the common ground for both stimulating and recording channels on the MZ60. The PZ2 amplifier ground and reference pins for each bank are tied to this pin internally when the PZ2 amplifier and MZ60 are connected. Some MEA plates have an internal reference (i.r.) pin integrated into dish. Please review the MEA dish manufacturer specifications for proper grounding. Troubleshooting This section is provided to address common issues that may be encountered when using the MZ60 MicroElectrode Array Interface. If you need assistance beyond the scope of this guide contact tech support at 386-462-9622. General Tips If you are not using the HC10 Heat Controller make sure that you ground the 9-pin HC10 connector to the back of the PZ amplifier. You can quickly ground the 9-pin HC10 connector by placing it on top of one of the mini-DB connectors located on the back of the PZ amplifier. This will reduce the noise picked up by the HC10 connector cable. When recording signals make sure that the PZ amplifier is not connected to the charger as this will induce mains interference in your recordings. Make sure there are no power strips plugged in anywhere near the MZ60 setup. Power strips will induce mains interference into your recordings. Also minimize electrical interference from other electrical devices (50-60 Hz and their harmonics) It is best to keep the MZ60 interface cables away from any AC line power sources to avoid unnecessary noise interference. We recommend that the MZ60 and the PZ2 be approximately 1 meter from computers, Oscilloscopes, RZ and RX devices. This will reduce the noise. To avoid unnecessary interference, make sure there are no wires crossing the MZ60 cables. Make sure there is no liquid on the MEA plate contacts. Clean the contacts gently but thoroughly with isopropyl alcohol to assure a clean connection. Make sure the MZ60 knob is oriented in the correct position. If the MZ60 top is not tight enough, open the MZ60 and ensure that the MEA plate is seated correctly in the MZ60 housing. As you close the MZ60 top ensure that all of the gold pins are touching the MEA electrode dish contacts. System 3 Manual 9-8 MicroElectrode Array Interface Make sure that all of the spring-loaded contact pins are out and not stuck in a compressed position. If a pin happens to be stuck, use a pair of forceps or small pliers to gently pull the pin out. MZ60 Noise Floor is Too High If 50-60 Hz hum (caused by mains voltage sources) is prevalent in your recordings, make sure that the common ground wire is making contact with the liquid in the MEA. Proper filtering is useful for removing artifacts from your recordings. Be sure to configure high and low pass filter corners that correspond to the expected bandwidth of your recordings. Noisy Single Electrode Channels Large noise signals may be a sign of a bad electrode contact or pin. To test the electrode contact, rotate the MEA and begin recording signals again. If the previously affected channels’ noise is significantly lower then the MEA has a bad electrode contact. If the same channels are still affected the MZ60 pin contact is bad. Contact TDT support if you encounter a bad pin contact. If the electrode contact is affected you may remedy the problem by cleaning the MEA contact sites with a cotton swab and some pure alcohol (100%). If the problem persists after cleaning the MEA electrode contacts, the contacts are damaged beyond repair and the MEA plate must then be replaced. Microelectrode Array Interface Technical Specifications Technical specifications for the Microelectrode Array Interface. Stimulus Input Channels Up to 60 (0.75 mm female input pin) Analog Input Channels Up to 60 Input Impedance 1014 Ohms Compatible MEAs Standard MEA Arrays 49x49 mm Microelectrode Array Connector Pinouts Stimulate/Record Switching Banks A DIP-switch bank is located on each of the four sides of the MZ60 and toggles between stimulate or record modes for 15 electrode sites. Stimulating inputs accept 0.75 mm male pins. Pinouts are shown looking into the connector and reflect the preamplifier channels assuming the MZ60 is used with a PZ2-64. For higher channel count amplifiers, channels numbers may be offset depending on the MZ60-PZ2 connections. Note: Channels 16, 32, 48, and 64 are grounded on the preamplifier. System 3 Manual MicroElectrode Array Interface 9-9 System 3 Manual 9-10 MicroElectrode Array Interface HC10 - Temperature Controller Overview The HC10 temperature controller provides a digitally controlled current source for the heating element located directly beneath the selected MEA plate in the MZ60 Interface. This device allows the user to set the desired temperature of the element in either Celsius or Fahrenheit in increments of one degree. The HC-10 also allows for a user defined offset to account for a temperature difference between the heating element and test subject solution that arises from various MEA, solution, and environmental configurations. HC10 Temperature Controller Features Power Switch The Power switch turns the HC10 power off or on. The LED display will be illuminated when the HC10 is on. If the 9-pin connector provided on the MZ60 interface cable is not properly connected to the HC10 when the power switch is on, a warning message (Chck Htr) will be displayed. See the MZ60 section on page 9-1 for more information. Environmental Control The HC10 provides a current which is used to regulate the temperature inside the MZ60. Buffered Memory The HC10 automatically stores all user settings when the HC10 is turned off. When powered on, the HC10 resumes programmed temperature control based on the previous user settings. Memory can be restored to default settings using the options menu. LED Display The HC10 displays the desired temperature as well as the thermistor (temperature sensor) status. User Set “desired” temperature of heating element Thermistor status indicator System 3 Manual MicroElectrode Array Interface 9-11 Thermistor Status Indicator The thermistor status indicator is located on the left side of the LED display and tracks the current state of the temperature sensor in the heating element. The status symbol changes as the thermistor temperature approaches the user set temperature. The table below describes each status symbol. Status Symbol Description <, <<, or <<< Thermistor temperature is less than user set temperature. As the temperature difference becomes greater, additional less than symbols are displayed (up to three). >, >>, or >>> Thermistor temperature is greater than user set temperature. As the temperature difference becomes greater, additional greater than symbols are displayed (up to three). Thermistor temperature is stabilizing. This symbol appears when the thermistor temperature is approaching the user set temperature and is within a degree Celsius of the desired temperature. <-> Thermistor temperature is stable. This symbol appears when the thermistor temperature stabilized to within a half of a degree of the desired temperature. <*> Thermistor temperature is stable and equal to the user set temperature (+/- error). SELECT (Enter) Knob The HC10 select knob allows the user to manually adjust the user defined temperature, offsets, and other features. It is also used to allow access to the options menu. Turn the Select knob to adjust temperature values or cycle through the options menu. Options Menu Press the Select knob inward once to enter the options menu. Turn the select knob to cycle through the options menu. Press the select knob inward to choose the specified option. Units By default, the HC10 displays the user defined temperature in Celsius. Temperature units of Fahrenheit are configured by pressing the select knob and turning it to ‘F’. Press the select knob once more to set the unit display to Fahrenheit. Offset The temperature offset is used to offset the temperature recorded by the thermistor sensor in the MZ60 and can be made in increments of one tenth of a degree. The user defined offset is added to the measured thermistor temperature. This is useful if you wish to offset the reading of the sensor to reflect the actual temperature of the liquid contained in the MEA. Please note that the response in temperature of the MEA solution to the heater temperature will only be linear over a small range. This feature should not be used if large temperature changes are to be made to the solution after its actual temperature has been measured and offset defined. (Un)Lock This option locks or unlocks manual temperature adjustments. To lock/unlock the HC10, press the select knob inward then turn the knob to display the (Un)Lock menu. Press the select knob inward to lock/unlock manual temperature adjustments. System 3 Manual 9-12 MicroElectrode Array Interface Clear This option once selected, returns the HC10 to the default temperature, offset, and unit settings (37C and no offset). Done This option when selected, exits the options menu. Temperature Controller Technical Specifications Technical specifications for the Temperature Controller. Power Output 10W Power Requirements External 12 VDC, 1.25A power supply Maximum Solution Temperature 40C* Maximum Precision 1 degree temperature setting with 1/10 degree offset Celsius or Fahrenheit. Display Units Celsius (default) or Fahrenheit *Note: Maximum temperature test conducted using a saline solution at a room temperature of 23C in standard 8 x 8 MEA array. System 3 Manual Part 10 High Impedance Headstages System 3 Manual 10-2 High Impedance Headstages ~ System 3 Manual High Impedance Headstages 10-3 ZIF-Clip® Headstages Overview The ZIF-Clip® headstage (Patent No. 7540752) features an innovative, hinged headstage design that ensures quick, easy headstage connection with almost no insertion force applied to the subject. ZIF-Clip® headstage contacts seat inside the probe array and snap in place, firmly locking the headstage and probe with very little applied pressure. These self aligning headstages provide long lasting low insertion performance for a variety of channel number and electrode configurations. An aluminum finish provides increased durability. The ZIF-Clip® technology has been implemented in both standard (analog) and digital designs. By default, ground and reference are separate on all ZIF Clip® headstages yielding a differential configuration. Reference and ground may be tied together on the headstage adapter or ZIF Clip® microwire array for single-ended configurations. ZIF-Clip® Standard Headstages ZIF-Clip® standard headstages are analog headstages designed to connect directly to a PZ2 preamplifier but may be connected to an RA16PA with the use of an adapter. Analog signal are buffered inside the headstage and digitized on the PZ2 or RA16PA for transfer to a base station processor, such as the RZ2 of RX5. ZIF-Clip® Digital Headstages ZIF-Clip® digital headstages use an Intan amplifier chip to digitize physiological recordings directly inside the clip. Digitized signals are routed to a PZ4 headstage manifold through a single cable for transfer to an RZ base station. System 3 Manual 10-4 High Impedance Headstages ZIF-Clip® LED Headstages ZIF-Clip® LED headstages have built-in red and green LEDs on each side. The LEDs provide an ample amount of light for tracking test subjects and are available for 16-, 32- and 64-channel ZIFClip® standard headstages. Note: ZIF-Clip® headstage LEDs cannot be added to existing non-LED headstages. Part Numbers: ZC16 – 16-channel Aluminum ZIF-Clip® headstage ZC32 – 32-channel Aluminum ZIF-Clip® headstage ZC64 – 64-channel Aluminum ZIF-Clip® headstage ZC96 – 96-channel Aluminum ZIF-Clip® headstage ZC128 – 128-channel Aluminum ZIF-Clip® headstage ZC16-LED – 16-channel ZIF-Clip® headstage with LEDs ZC32-LED – 32-channel ZIF-Clip® headstage with LEDs ZC64-LED – 64-channel ZIF-Clip® headstage with LEDs ZCD32 – 32-chanel Digital ZIF-Clip® headstage ZCD64 – 64-channel Digital ZIF-Clip® headstage ZCD96 – 96-channel Digital ZIF-Clip® headstage The headstage has sensitive electronics. Always ground yourself before handling. Adapter and Probe Connection ZIF-Clip® headstages are designed to automatically position the high density connectors on the headstage and probe (or adapter) and are recommended for use with probe impedances that range from 20 Kohm to 5 Mohm. Standard ZIF-Clip® Pictured Above System 3 Manual High Impedance Headstages 10-5 Connect probes and adapters to the headstage as described below. Firmly press and hold the back to open the headstage. Align the notch guide of connector to the black square guide of the fully opened headstage then move headstage into position. WARNING! The ZIF-Clip® headstage must be held in the fully open position while being slid into position. The headstage should only be closed when fully engaged. Sliding the headstage into position while applying pressure to the tip will permanently damage the ZIF-Clip® headstage and micro connectors. Press the front of the headstage together as shown to lock the connector in place. You should hear an audible click when the locking mechanism is engaged. ZIF-Clip® Headstage O-Rings All ZIF-Clip® headstages are shipped with two o-rings for additional connection security. Gently slip the o-ring onto the headstage sleeve and then roll the o-ring towards the back of the headstage. Connect the probe or adapter to the headstage as described above. Once the connection is secure, roll the o-ring forward until it settles into the sleeve on the front of the headstage. System 3 Manual 10-6 High Impedance Headstages ZIF-Clip® Standard Headstages Preamplifier Connection One or more MiniDB26 connectors are used to connect the ZIF-Clip® standard headstage to a PZ2 preamplifier depending on the number of channels in the headstage. Each MiniDB26 connector carries 16 channels and is labeled with a bank letter that corresponds to its matching bank on the preamplifier. For example the MiniDB26 connector labeled “Bank A” should connect to bank 1 on the PZ2 and will carry channels 1-16. Subsequently, “Bank B” corresponds to the next 16 channels of the headstage, etc. Below is a table which shows the Bank labels along with their matching PZ2 bank. ZIF-Clip® headstage Bank Label on MiniDB26 Connect to PZ2 Bank ZC16 (Connects Bank A) Bank - A 1 (Channels 1 - 16) ZC32 (Connects Banks A - B) Bank - B 2 (Channels 17 - 32) ZC64 (Connects Banks A - D) Bank - C 3 (Channels 33 - 48) ZC96 (Connects Banks A - F) Bank - D 4 (Channels 49 - 64) ZC128 (Connects Banks A - H) Bank - E 5 (Channels 65 - 80) Bank - F 6 (Channels 81 - 96) Bank - G 7 (Channels 97 - 112) Bank - H 8 (Channels 113 - 128) The diagram below illustrates the connection of a ZC64 ZIF-Clip® headstage to the PZ2 Preamplifier. Note that the bank channel numbering matches on both the preamplifier and headstage MiniDB26 connectors. ZIF-Clip® Headstage (64-Channels) System 3 Manual High Impedance Headstages 10-7 ZIF-Clip® Digital Headstage Manifold Connection The ZIF-Clip® digital headstage has one MiniDB26 connector that transmits all channels for that headstage. Up to four ZIF-Clip® digital headstages can be connected to a PZ4 Digital Headstage Manifold. The PZ4 will automatically detect the number of channels in each headstage. All channels will be concatenated together, starting with connector “-A-“, to create the output signal to the RZ base station. The total channel count of all connected headstages can not exceed the maximum channel count for the PZ4. See PZ4 Digital Headstage Manifold, page 6-21, for more information. Headstage Voltage Range When using a TDT preamplifier the voltage input range of the preamplifier (PZ2, RA16PA) is typically lower than the headstage and must be considered the effective range of the system. Also keep in mind that the output range of the headstage varies depending on the power supply provided by the preamplifier. TDT preamplifiers supply +/- 1.5V DC, but third party preamplifiers may vary. TDT recommends using preamplifiers which deliver +/- 2.5V DC or less. The table below lists the input voltage ranges for the ZIF-Clip® standard headstage for either +/- 1.5V DC or +/- 2.5V DC power sources. ZIF-Clip® standard headstage Headstage input range when using +/- 1.5V DC power source Headstage input range when using +/- 2.5V DC power source +/- 1.48 V +/- 2.49 V Technical Specifications Important!: When using multiple headstages, ensure that a single ground is used for all headstages. This will avoid unnecessary noise contamination in recordings. See the headstage connection guide on page 6-38 for more information. ZIF-Clip® standard headstage Input referred noise 3 µ VRMS bandwidth 300-3000 Hz 6 µ VRMS bandwidth 30-8000 Hz Headstage Gain Unity (1x) Input Impedance 1e14 ohms System 3 Manual 10-8 High Impedance Headstages Dimensions (Approx.) Headstage Length Width Thickness ZC16/ZC32* 14.744 mm 11.00 mm 9.373 mm ZC64 17.014 mm 15.508 mm 9.556 mm ZC96 18.021 mm 19.00 mm 9.556 mm ZC128 19.111 mm 25.50 mm 12.582 mm * Form factor for both the ZC16 and ZC32 is the same. ZIF-Clip® digital headstage Input referred noise 4 µ VRMS bandwidth 300-3000 Hz 7 µ VRMS bandwidth 30-8000 Hz Headstage Gain Unity (1x) Input Impedance 1e9 Ohms A/D Up to 128 channels, 16-bit PCM A/D Sample Rate Up to 24414.0625 Hz Maximum Voltage In +/- 6 mV Frequency Response 3 dB: 0.3 Hz – 6 kHz 6 dB: 0.25 Hz – 7.5 kHz System 3 Manual High Impedance Headstages 10-9 Anti-Aliasing Filter 3rd order low-pass (-18 dB per octave) Distortion (typical) < 1% Dimensions Headstage Length Width Thickness (Approx.) ZCD32 16.05 mm 10.50 mm 7.40 mm ZCD64 16.497 mm 15.50 mm 10.40 mm ZCD96 17.562 mm 19.00 mm 10.499 mm System 3 Manual 10-10 High Impedance Headstages ZIF-Clip® Headstage Pinouts If you are interested in using a third party electrode see page 12-9 for ZIF-Clip® adapters. If there is no adapter offered for the desired electrode, the following diagrams show the headstage pinout (channel connections to the amplifier) for all ZIF-Clip® headstages. 16-, 32- and 64-channel ZIF-Clip® headstage pinouts Note: The 16-channel ZIF-Clip® headstage does not have any pins connected on the right side of the headstage. A black square guide is used to align the headstage to ZIF-Clip® compatible connectors. Note: Digital Headstage Channel Numbers are relative to the manifold connection to which they are connected. System 3 Manual High Impedance Headstages 16- and 32-channel headstages 10-11 64-channel headstage Note: Images are not to scale. System 3 Manual 10-12 High Impedance Headstages 96- and 128-channel ZIF Clip® headstage pinouts 96-channel headstage Note: Images are not to scale. System 3 Manual 128-channel headstage High Impedance Headstages 10-13 ZIF-Clip® Headstage Holder Part Number: ZROD The ZIF-Clip® headstage holder securely holds your ZIF-Clip® headstage during electrode insertion and can be used with most micromanipulators. The headstage holder is approximately 4.5” in length. The stabilizing rod is 3” in length and has a 3/32” diameter. Each holder is designed for use with the selected ZIF-Clip® headstage. Using the ZIF-Clip® Headstage Holder Connect the probe or adapter to your ZIF-Clip® headstage BEFORE putting the headstage in the holder (the square guide provided to ensure the probe or adapter is connected with the correct polarity is hidden from view when the headstage is in the holder). See the Adapter and Probe connection section on page 10-4 for more information. Gently slide the ZIF-Clip® headstage onto the holder until it is completely secure as shown in the images below. Gently slide the headstage onto the holder (with probe or adapter already connected). Position the headstage holder between the cables of the ZIFClip® headstage. Headstage completely secured in holder. To remove, grip the top and bottom of the headstage and gently slide the holder off of the headstage. System 3 Manual 10-14 High Impedance Headstages Form Factor 16/32-channel 64-channel 96-channel 128-channel Height 4.10 mm Inner Width 9 mm 14 mm 17.50 mm 24 mm Outer Width 13 mm 18 mm 21.50 mm 28 mm Holder Length 25 mm 28 mm 28 mm 28 mm Rod Length stabilizing rod is 3” with a 3/32” diameter Weight 4.5g System 3 Manual High Impedance Headstages 10-15 RA16AC - 16 Channel Acute Headstage Overview The 16 Channel acute headstages is recommended for extracellular neurophysiology using silicon electrodes, metal microelectrodes or microwire arrays with recommended input impedances from 20 kOhm to 5 Mohm unless otherwise noted. The 16 channel acute headstage has an 18-pin DIP connector that can be used with standard high impedance metal electrodes. The pinout of the RA16AC matches the wiring of NeuroNexus electrodes to allow for direct connection to the headstage. TDT recommends connecting electrodes to an 18-pin socket and then connecting the socket to the headstage to protect the headstage from unnecessary wear and tear. The RA16AC4 provides 4x gain and is used with electrodes with a recommended impedance range of 20 kOhm to 300 kOhm. The headstage connects to a System 3 Medusa preamplifer (such as the RA16PA) via a DB25 connector or to a PZ series preamplifier via a mini 26-pin connector. Part Numbers: RA16AC – 16 Channel Acute Headstage for Medusa PreAmps, with unity (1x) gain RA16AC4 - 16 Channel Acute Headstage for Medusa PreAmps, with 4x gain RA16AC-Z - 16 Channel Acute Headstage for Z-Series (PZ) PreAmps, with unity (1x) gain The headstage has sensitive electronics. Always ground yourself before handling. Headstage Voltage Range When using a TDT preamplifier the voltage input range of the preamplifer is typically lower than the headstage and must be considered the effective range of the system. Check the specifications of your amplifier for voltage range. Also keep in mind that the range of the headstage varies depending on the power supply provided by the preamplifier. TDT preamplifiers supply +/- 1.5 VDC, but third party preamplifiers may vary. TDT recommends using preamplifiers which deliver +/- 2.5 VDC or less. Check the preamplifier voltage input and power supply specifications and headstage gain to determine the voltage range of the system. The table below lists the input voltage ranges for RA16AC headstages for either a +/- 1.5 VDC or +/- 2.5 VDC power source. Headstage input range when using Headstage input range when +/- 1.5 VDC power source using +/- 2.5 VDC power source RA16AC4 +/- 0.37 V +/- 0.62 V RA16AC +/- 0.9 V +/- 1.9 V System 3 Manual 10-16 High Impedance Headstages Technical Specifications Warning!: When using multiple headstages ensure that all ground pins are connected to a single common node. See page 6-34 for more information. Input inferred noise rms 3 µ V bandwidth 300-3000 Hz rms 6 µ V bandwidth 30-8000 Hz RA16AC - Unity (1x) Headstage Gain RA16AC4 - 4x RA16AC-Z - Unity (1x) Input Impedance 1014 Ohms Pinout (looking into connections) The numbers in the diagram above show the channel connections to the amplifier. The electrode connector accepts 0.5 mm diameter male pins. For pinouts for the preamplifier connector, see the corresponding preamplifier. System 3 Manual High Impedance Headstages 10-17 NN64AC - 64 Channel Acute Headstage Overview The 64 Channel Acute headstage is recommended for extracellular neurophysiology using silicon electrodes, metal microelectrodes or microwire arrays with input impedances from 20 kOhm to 5 Mohm. The headstage features two 40-pin connectors designed for use with NeuroNexus Acute 64channel probes. The headstage connects to a PZ series preamplifier via four mini 26-pin connectors or with System 3 Medusa preamplifers (such as four RA16PAs) via four DB25 connectors. In either case, each connector carries the signals for 16 channels, power and ground. Therefore, each connector can be connected independently. The connector labeled Bank-1 carries channels 1-16, Bank-2 carries 17-32, etc. Part Numbers: NN64AC – 64 Channel Acute Headstage for Medusa PreAmps NN64AC-Z - 64 Channel Acute Headstage for Z-Series (PZ) PreAmps The headstage has sensitive electronics. Always ground yourself before handling. Headstage Voltage Range When using a TDT preamplifier the voltage input range of the preamplifer is typically lower than the headstage and must be considered the effective range of the system. Check the specifications of your amplifier for voltage range. Also keep in mind that the range of the headstage varies depending on the power supply provided by the preamplifier. TDT preamplifiers supply +/- 1.5 VDC, but third party preamplifiers may vary. TDT recommends using preamplifiers which deliver +/- 2.5 VDC or less. Check the preamplifier voltage input and power supply specifications and headstage gain to determine the voltage range of the system. The table below lists the input voltage ranges for the NN64AC and NN64AC-Z headstages for either a +/- 1.5 VDC or +/- 2.5 VDC power source. Headstage input range when using Headstage input range when +/- 1.5 VDC power source using +/- 2.5 VDC power source +/- 0.9 V +/- 1.9 V System 3 Manual 10-18 High Impedance Headstages Technical Specifications Warning!: When using multiple headstages ensure that all ground pins are connected to a single common node. See page 6-34 for more information. Input inferred noise rms 3 µ V bandwidth 300-3000 Hz rms 6 µ V bandwidth 30-8000 Hz Headstage Gain Unity (1x) Input Impedance 1014 Ohms Pinout (looking into connections) The numbers in the diagram above show the channel connections to the amplifier. The headstage also features jumper locations to short G, R and Ref (Ref refers to the built-in reference site on the NeuroNexus probe). The ground channel should either be tied to an external ground or to the reference for a single ended input. See the table below, (NN32AC) for jumper configurations and associated requirements. Important! When using the NN64AC with the NeuroNexus Acute 64-channel probe, keep in mind that there are several versions of the probe. Check the NeuroNexus Website for pin diagrams. Also, see MCMap for a description and examples on how to re-map channel numbers. System 3 Manual High Impedance Headstages 10-19 NN32AC - 32 Channel Acute Headstage Overview The 32 Channel Acute headstage is recommended for extracellular neurophysiology using silicon electrodes, metal microelectrodes or microwire arrays with input impedances from 20 kOhm to 5 Mohm. The headstage features a 40-pin connector designed for use with the NeuroNexus Acute 32-channel probe. The headstage connects to a PZ series preamplifier via two mini 26-pin connectors or to two RA16PA preamplifiers via two 25-pin connectors. For either headstage, Connector A carries the signals for channels 1-16, power and ground. This connector must be connected whether you are acquiring data from one of these channels or not. Part Numbers: NN32AC – 32 Channel Acute Headstage for Medusa PreAmps NN32AC-Z - 32 Channel Acute Headstage for Z-Series (PZ) PreAmps The headstage has sensitive electronics. Always ground yourself before handling. Headstage Voltage Range When using a TDT preamplifier the voltage input range of the preamplifer is typically lower than the headstage and must be considered the effective range of the system. Check the specifications of your amplifier for voltage range. Also keep in mind that the range of the headstage varies depending on the power supply provided by the preamplifier. TDT preamplifiers supply +/- 1.5 VDC, but third party preamplifiers may vary. TDT recommends using preamplifiers which deliver +/- 2.5 VDC or less. Check the preamplifier voltage input and power supply specifications and headstage gain to determine the voltage range of the system. The table below lists the input voltage ranges for the NN32AC and NN32AC-Z for either a +/- 1.5 VDC or +/- 2.5 VDC power source. Headstage input range when using Headstage input range when +/- 1.5 VDC power source using +/- 2.5 VDC power source +/- 0.9 V +/- 1.9 V System 3 Manual 10-20 High Impedance Headstages Technical Specifications Warning!: When using multiple headstages ensure that all ground pins are connected to a single common node. See page 6-34 for more information. Input inferred noise rms 3 µ V bandwidth 300-3000 Hz rms 6 µ V bandwidth 30-8000 Hz Headstage Gain Unity (1x) Input Impedance 1014 Ohms Pinout (looking into connections) Important! When using the NN32AC with the NeuroNexus Acute 32-channel probe, keep in mind that there are several versions of the probe and the NN32AC was designed to correspond to the NeuroNexus rev 3 probe. Check the NeuroNexus Website for pin diagrams. Also, see MCMap in the RPvdsEx User Guide, for a description and examples on how to re-map channel numbers. The numbers in the diagram above show the channel connections to the amplifier. The surfaced connections on the back of the headstage include female connectors to simplify connections to external devices and jumper locations to short G, R and Ref (Ref refers to the builtin reference site on the NeuroNexus probe). The ground channel should either be tied to an external ground or to the reference for a single ended input. System 3 Manual High Impedance Headstages 10-21 Jumper Configuration The following table describes the jumper configurations and associated requirements. Jumper Connections G R Operation Requirements Shorts headstage Ground and Reference inputs together, yielding single-ended amplification of signals relative to ground. Connect common Ground/Reference wire to the headstage or electrode. Shorts headstage Reference input to the pin labeled Ref (a low impedance site on the probe) yielding differential amplification of signals relative to the voltage of the Ref site. Connect Ground wire to the headstage or electrode. Headstage Ground and Reference separated and Ref pin is not used, yielding differential amplification of signals relative to the voltage of the Reference Connect both a Ground wire and a Reference wire to the headstage or electrode. Ref G R Ref G R Ref System 3 Manual 10-22 High Impedance Headstages RA16CH/LP16CH - 16 Channel Chronic Headstage Overview The 16 Channel Chronic headstages are recommended for extracellular neurophysiology using silicon electrodes, metal microelectrodes or microwire arrays with input impedances from 20 kOhm to 5 Mohm. The 16-channel chronic headstages come in two configurations; RA16CH (standard profile) and LP16CH (low profile). The headstages provide the same performance with the smaller footprint of the LP16CH yielding better clearance in tight applications. The headstages use a low profile female Omnetics connector that is compatible with the NeuroNexus chronic electrodes. Users can also request the matching male Omentics connector (OMCON_ML_HB) from TDT for use in building electrode arrays. Part Numbers: LP16CH – 16 Channel Chronic Low Profile Headstage for Medusa PreAmps LP16CH-Z – 16 Channel Chronic Low Profile Headstage for Z-Series (PZ) PreAmps RA16CH – 16 Channel Chronic Headstage for Medusa PreAmps RA16CH-Z – 16 Channel Chronic Headstage for Z-Series (PZ) PreAmps The headstage has sensitive electronics. Always ground yourself before handling. Headstage Voltage Range When using a TDT preamplifier the voltage input range of the preamplifer is typically lower than the headstage and must be considered the effective range of the system. Check the specifications of your amplifier for voltage range. Also keep in mind that the range of the headstage varies depending on the power supply provided by the preamplifier. TDT preamplifiers supply +/- 1.5 VDC, but third party preamplifiers may vary. TDT recommends using preamplifiers System 3 Manual High Impedance Headstages 10-23 which deliver +/- 2.5 VDC or less. Check the preamplifier voltage input and power supply specifications and headstage gain to determine the voltage range of the system. The table below lists the input voltage ranges for the 16 channel chronic headstages for either a +/1.5 VDC or +/- 2.5 VDC power source. Headstage input range when using Headstage input range when +/- 1.5 VDC power source using +/- 2.5 VDC power source LP16CH +/- 1.48 V +/- 2.49 V RA16CH +/- 0.9 V +/- 1.9 V Technical Specifications Warning!: When using multiple headstages ensure that all ground pins are connected to a single common node. See page 6-34 for more information. Input inferred noise rms 3 µ V bandwidth 300-3000 Hz rms 6 µ V bandwidth 30-8000 Hz Headstage Gain Unity (1x) Input Impedance 1014 Ohms Pinout The numbers on the pinout diagram above show the channel connections to the amplifier. By default, the RA16CH/LP16CH inputs are single ended, with Ref and GND tied together. A jumper is provided to give the user the option of making the inputs differential. To make the inputs differential, cut the jumper pictured below. RA16CH: LP16CH: System 3 Manual 10-24 High Impedance Headstages RA4AC - Four Channel Headstage Overview The 4 Channel Acute headstages are recommended for extracellular neurophysiology using silicon electrodes, metal microelectrodes, or microwire arrays with input impedances from 20 kOhm to 5 MOhm. The RA4AC1 and RA4AC4 headstages have a low-profile 6-pin connector. The RA4AC1 provides unity gain (1x). The RA4AC4 provides 4x gain and is used with electrodes with a recommended impedance range of 20 kOhm to 300 kOhm. The 25-pin connector connects to the RA4PA 4-channel Medusa preamplifier. Part Numbers: RA4AC1 – 4 Channel Acute Headstage for Medusa PreAmps, with unity (1x) gain RA4AC4 – 4 Channel Acute Headstage for Medusa PreAmps, with 4x gain The headstage has sensitive electronics. Always ground yourself before handling. Headstage Voltage Range When using a TDT preamplifier the voltage input range of the preamplifer is typically lower than the headstage and must be considered the effective range of the system. Check the specifications of your amplifier for voltage range. Also keep in mind that the range of the headstage varies depending on the power supply provided by the preamplifier. TDT preamplifiers supply +/- 1.5 VDC, but third party preamplifiers may vary. TDT recommends using preamplifiers which deliver +/- 2.5 VDC or less. Check the preamplifier voltage input and power supply specifications and headstage gain to determine the voltage range of the system. The table below lists the input voltage ranges for the RA4AC and RA4AC4 headstages for either a +/- 1.5 VDC or +/- 2.5 VDC power source. Headstage input range when using Headstage input range when +/- 1.5 VDC power source using +/- 2.5 VDC power source RA4AC4 +/- 0.37 V +/- 0.62 V RA4AC +/- 0.9 V +/- 1.9 V Technical Specifications Warning!: When using multiple headstages ensure that all ground pins are connected to a single common node. See page 6-34 for more information. Input inferred noise rms 3 µ V bandwidth 300-3000 Hz rms 6 µ V bandwidth 30-8000 Hz System 3 Manual High Impedance Headstages 10-25 RA4AC1 - Unity (1x) Headstage Gain RA4AC4 - 4x Input Impedance 1014 Ohms Pinout (looking into connections) The numbers in the above diagram show the channel connections to the amplifier. The electrode connector accepts 0.76 mm diameter male pins. The RA4AC1/RA4AC4 is also provided with a 6-pin male connector with flying leads. When connecting to the headstage, note that the silver dots marking channel 1 line up. The colors of the lead wires correspond to the headstage channels as follows: Color Channel Black 1 Red 2 Orange 3 Yellow 4 Blue Reference Green Ground System 3 Manual 10-26 High Impedance Headstages SH16 - 16 Channel Switchable Acute Headstage Overview The SH16 is a 16 channel acute headstage containing recording circuitry that can be bypassed for selected channels and connected to the stimulus isolator. It features high voltage, low leakage solid-state relays to allow for remote switching. Note: The SH16 Switching headstage provides unity gain (1x) for its recording channels. The minimum switching time for the SH16 is dependant on the length of time it takes to send the 24-bit serial control bit pattern (see Creating the Serial Control Bit Pattern for more information) that defines which channels are switched plus an inherent 2 ms delay associated with the solid state relay switches. The minimum switching time can be calculated as follows: [Number of bits in serial control pattern (24)] ÷ [Serial data transfer Rate (939 Hz Max)] + 2 ms Serial Transfer Rate (Hz) Minimum SH16 Switching Time (ms) 939 28 469 53 The diagram below illustrates how the relays are used to switch channels for recording (to RA16PA) or stimulation (from MS16). System 3 Manual High Impedance Headstages 10-27 SH16 Relay MS16 ‘Stimulator Outputs’ (x 16: 1 per channel) Logic ‘Control Output’ Channel 16 RA16PA ‘Preamp Connector’ Electrode Channels Channel 1 Switchable Headstage Diagram The 16 channel switchable acute headstage has an 18-pin DIP connector that can be used with standard high impedance metal electrodes. The pinout of the SH16 matches the wiring of NeuroNexus electrodes, allowing direct connection to the headstage. TDT recommends connecting electrodes to an 18-pin DIP socket and then connecting the socket to the headstage to protect the headstage from unnecessary wear and tear. Important! When using the headstage with the NeuroNexus probes, keep in mind that there may be several versions of the probe. Check the NeuroNexus Website for pin diagrams. Also, see MCMap for a description and examples on how to re-map channel numbers. Connection Diagram Idle Cyc. u1 0 u2 0 - - DAC ADC When using the SH16 with a microstimulator system, connect the system as shown. The diagram below shows a system configuration featuring the RZ5 BioAmp Processor, an MS16 Stimulus Isolator, and RA16PA Medusa PreAmp. Connections are much the same when using the RX7 in place of the RZ5. All 0% - 1 2 3 4 9 10 11 12 0 1 2 3 Speaker Volume RZ5 BioAmp Processor 1 Mode 2 Digital I/O ADC DAC 0 4 1 9 1 5 2 10 2 6 3 11 3 7 4 12 Digital Min Processors Stim Digital I/O Amp-a Max Analog I/O Amp-b Recorded waveforms on Non-Stimulus channels MS16 Stimulus Isolator RA16PA Electrodes To DB25 ‘Preamp’ Control Stimulator Preamp To DB25 ‘Stimulator’ NC48 Battery Pack SH16 Electrodes SH16 to MicroStimulator Connection Diagram Switchable Headstage Operation When using the SH16 switching headstage with an RZ5 or RX7 processor and an MS4/MS16 Stimulus Isolator, TDT recommends using the SH16_Control macro to set stimulation channels System 3 Manual 10-28 High Impedance Headstages and mode of operation. Based on the macro settings, all necessary control signals are sent from the base station to the headstage via the MS4/MS16 Control output port. Setup parameters determine which channels are used for stimulation and whether the headstage will be operated in single ended or differential mode. SH16_Control StimChan_Mask Chan Updating Enable Enable Single Ended Stim Mode (RZ5) See the Help text in the macro’s properties dialog box for more information about this macro. Note: The SH16 Headstage requires at least 10ms in order to initialize its control bits for use. If you are trying to trigger the enable input you must either use a trigger signal that is delayed 10ms from the point the circuit is run or use a manual trigger method to begin acquisition. Operating the Switching Headstage without Using the Macro The SH16_control macro (above) greatly simplifies control of the switching headstage. If the macro cannot be used, the SH16 can be controlled directly from RPvdsEx using the following information. The SH16 is controlled using the digital I/O (digital control lines) on the MS4/MS16, which are in turn set by writing an integer value directly to memory (poke address values vary depending on the processor used). Channels 1 - 3 of the digital I/O (bits 0-2) are used to send a serial pattern that controls the state of all channels to the SH16. Transmitting this data to the headstage from the MS4/MS16 is accomplished using the following 3 digital output lines. Bit Number Name (page 7-19) Description Pin # (Control DB25) 2 DO2 Serial Clock Line 19 1 DO1 Serial Data Line 6 0 DO0 Load/Latch Signal 18 DO0 (Bit 0) is the load/latch signal. This bit is pulsed for a minimum pulse width of 100 nanoseconds to latch the data to the relays on the headstage after the data has been transmitted. DO1 (Bit 1) is the serial data line. The 24-bit mask must be sent most significant bit (MSB) first. In other words, bit 23 is sent first, then bit 22, bit 21, etc. DO2 (Bit 2) is the serial clock signal. When the SH16 is being controlled through a System 3 device such as the MS4/MS16, then the maximum rate for serial data transfer is 939 Hz. Creating the Serial Control Bit Pattern Channel setup and control are programmed by serially transmitting a 24-bit pattern to the headstage on the serial data line (DO1). The first bits in the pattern control the connection of a given channel to the Stimulus Isolator. Bit 16 controls the ground and bit 17 controls the record reference line. Bits 18-23 are not used and are always sent as zeros. By default, all channels are set System 3 Manual High Impedance Headstages 10-29 in the record mode (disconnected from the stimulator). To connect a given electrode to the output of the stimulus isolator, send a binary ‘1’ on the appropriate bit of the pattern. Sending a binary ‘0’ on the appropriate bit will disconnect that electrode from the stimulus isolator and connect it to the recording preamp. To disconnect the stimulator ground from the record ground during stimulation, a ‘1’ is sent in the mask at bit location 16. To disconnect the record reference line from the headstage and leave it floating during stimulation, a ‘1’ is sent at bit location 17. SH16 Serial Control Bit Pattern For example, to stimulate on channels 1 (1), 3 (4) and 4 (8), the following serial bit pattern with an integer value of 13 (1 + 4 + 8) should be sent to the headstage. Notice that bits 16 and 17 are not set (1), allowing non-stimulating channels to record using a preamplifier. 0000 0000 0000 0000 0000 1101 RPvdsEx Circuit The following circuit illustrates the headstage channel setup and serial data load for the SH16 using an MS4/MS16 and RZ5 or RX7 processor. The first figure shows the headstage channel setup. The ChSelectBM parameter tag sets the value of the ConstI with an integer representing the serial control bit pattern discussed above. Headstage channel setup [1:1,0] ConstI ChSelectBM Headstage_Ch K=7 Bit value 0000|0000|0000|0111 The next segment of the circuit detects a change to the headstage setup and generates a pulse that will reset the serial data transmission to send the new channel selection and control logic. System 3 Manual 10-30 High Impedance Headstages Headstage_Ch [1:5,0] [1:6,0] [1:7,0] iScaleAdd iCompare EdgeDetect SF=-1 Shft=0 K=0 Test=NE HS_Enable Edge=Rising [1:2,0] ShortDelay Nms=1 {>Data} The third segment of the chain uses a pulse train to send the 24-bit pattern serially (MSB first) to the headstage. After all 24 bits have been sent; the data is latched to the relays. [1:13,0] [1:9,0] PulseTrain2 HS_Enable nPer=52 nPulse=24 Enab=Yes Rst=Run PLate=0 PCount=0 iCompare Latch K=24 Test=EQ Bit0 Bit Pattern [1:18,0] Int2TTL Headstage_Ch Bit2 [1:15,0] Each time a new mask is written into the register, a TTL pulse needs to be sent to latch the information to the headstage. iScaleAdd SF=-1 Shft=23 [1:10,0] TTLDelay2 N1=13 N2=0 Clock [1:11,0] Schmitt2 nHi=26 nEnab=1 The 24-bit mask is sent serially, (MSB first) to load the headstage. These bits are clocked with the serial clock. When all 24 bits have been sent, the load pulse is activated to latch the data to the relays. With the sampling rate set to 25 kHz in RPvdsEx and ‘nPer’ equal to 52 in the PulseTrain2 component, the serial clock (Bit 2) will run at 469 Hz. Setting ‘nPer’ equal to 26, will allow the clock to run at 939 Hz. The figure below (not to scale) shows the 25kHz pulse rate of 52 samples (1 sample high, 51 samples low) as well as the serial clock rate of 13 samples low, 26 samples high, and 13 samples low. For headstages with serial numbers >2000, the headstage needs digital high voltages on the input lines of the control connector to power its circuits. System 3 Manual Bit1 BitN=0 High Impedance Headstages 10-31 Power the headstage circuits by writing a logic ‘1’ (high) to the MS16 control bits (bits 3-7). In the circuit segment below, the latch, data, and clock lines are fed directly to bits 0, 1, and 2 respectively on the FromBits component and bits 3-7 are set high by ORing the value from the FromBits component with the value 248 (binary: 0000 0000 1111 1000). Headstage Relay Register [1:5,0] FromBits Bit0 Bit1 Bit2 Rst=0 [1:6,0] N=248 b0=0 b1=0 b2=0 b3=0 b4=0 b5=0 [1:7,0] iOr Poke Addr=51 Bit0 is the load pulse for loading data Bit1 is the serial data line Bit2 is the serial clock for the data A poke component is used to send the resulting value to memory address 51 on the RZ5 processor or memory address 3 on the RX7. The Poke RPvdsEx component writes values to a specific device memory location and should be used with care. Using the Switching Headstage with Other Devices When using the SH16 with hardware other than a microstimulator System, connect as follows: To base station with fiber optic input Stimulation input to headstage Control device produc ing 3V logic signal RA16PA Control Stimulator Preamp SH16 The Serial Control Bit Pattern that controls connection of a given channel to the Stimulus Isolator can be sent using any 3 digital logic lines that will produce a +3V logic signal. Circuit design is similar to the example above, designed for use with the RZ5 and RX7 processors, but must be modified by routing Bit 0, Bit 1, and Bit 2 to the appropriate digital outputs of the device (instead of using the Poke component). Note: The serial clock (Bit 2) on the SH16 can be run at a maximum rate of 5 MHz for other devices. Technical Specifications Headstage Gain Input Impedance Unity (1x) 1014 Ohms System 3 Manual 10-32 High Impedance Headstages SH16 Pinout Diagrams PreAmp Connector For SH16 headstages with serial numbers <2000, the DB25 connector labeled Preamp must be connected as it supplies power to the headstage. For headstages with serial numbers >2000, this connector does not need to be connected if the user is not recording on the non-stimulating channels. DB25 Pinout Connections for use with Medusa Preamps Pin Name 1 Description A1 Analog Input Channel Number Ch 1-4 Pin Name Description 14 V+ Positive Voltage 15 GND Ground 2 A2 3 A3 16 GND Ground 4 A4 17 V- Negative Voltage 5 REF Reference Pin 18 NA Not Used 6 NA Not Used 19 NA Not Used 7 A5 20 A6 8 A7 21 A8 22 A10 23 A12 Analog Input Channel Number Ch 5, 7, 9, 11, 13, and 15 9 A9 10 A11 11 A13 24 A14 12 A15 25 A16 13 NA Analog Input Channel Number Ch 6, 8, 10, 12, 14, and 16 Not Used Mini DB26 Pinout Connections for use with PZ preamps Pin Name 1 A1 System 3 Manual Description Pin Name Description 14 V+ Positive Voltage High Impedance Headstages 2 A2 3 Analog Input Channel Number Ch 1-4 10-33 15 GND Ground A3 16 GND Ground 4 A4 17 V- Negative Voltage 5 REF Reference Pin 18 NA Not Used 6 NA Not Used 19 NA Not Used 7 A5 20 A6 8 A7 21 A8 9 A9 22 A10 10 A11 23 A12 11 A13 24 A14 12 A15 25 A16 13 NA 26 NA Analog Input Channel Number Ch 5, 7, 9, 11, 13, and 15 Not Used Analog Input Channel Number Ch 6, 8, 10, 12, 14, and 16 Not Used Headstage Pinout The numbers in the diagram to the right refer to the channel connections to the preamp connector or stimulator connector. “G” on the diagram to the right is connected to the reference pin (Ref) on the stimulator connector and can also connect to the ground pin (GND) of the preamp connector through a switchable relay in the SH16. “R” on the diagram to the right is connected to a switchable relay that can connect to the “Ref” pin of the preamp connector. The electrode connector accepts 0.5 mm diameter male pins. The headstage has sensitive electronics. Always ground yourself before handling. DB25 Control Connector The Control DB25 can be connected to any control device that produces a 3V logic signal. For headstages with serial numbers >2000, this connector must be connected as it supplies power to the headstage. Note: Pins that are not labeled are not connected. System 3 Manual 10-34 High Impedance Headstages DB25 Stimulator Connector Note: The global reference (Ref) is connected to the SH16 ground pin (G of headstage pinout). Pin Name Description Pin Name Description 1 S1 14 2 S2 3 S3 16 4 S4 17 5 Ref Reference 18 6 NA Not Used 19 7 S5 20 S6 8 S7 21 S8 9 S9 22 S10 Stimulator Channels 10 S11 23 S12 Ch 6, 8, 10, 12, 14, and 16 11 S13 24 S14 12 S15 25 S16 13 NA Stimulator Channels Ch 1-4 NA 15 Not Used System 3 Manual Stimulator Channels Ch 5, 7, 9, 11, 13, and 15 Not Used High Impedance Headstages 10-35 SH16-Z - 16 Channel Switchable Acute Headstage Overview The SH16-Z is a 16 channel acute headstage containing programmable relays that connect selected channels to the IZ2 stimulator and leave unselected channels connected to the PZ2. It features high voltage, low leakage solid-state relays to allow for remote switching. Note: The SH16-Z switching headstage provides unity gain (1x) for its recording channels. Channel selection is handled within the IZ2_Control macro which generates a 24-bit serial control bit pattern to control SH16-Z channel switching. The minimum switching time is dependent on the length of time it takes to receive the control bit pattern plus an inherent 2 ms delay associated with the solid state relay switches. Typical switching times are shown in the table below. Sampling Rate Minimum SH16-Z Switching Time (ms) 50 kHz and above 28 25 kHz 53 The diagram below illustrates how the relays are used to switch channels for recording (to PZ2) or stimulation (from IZ2). System 3 Manual 10-36 High Impedance Headstages SH16-Z Relay (x 16: 1 per channel) IZ2 Stimulator/Control Logic Connector Channel 16 PZ2 Preamp Connector Electrode Channels Channel 1 Switchable Headstage Diagram The 16 channel switchable acute headstage has an 18-pin DIP connector that can be used with standard high impedance metal electrodes. The pinout of the SH16-Z matches the wiring of NeuroNexus electrodes, allowing direct connection to the headstage. TDT recommends connecting electrodes to an 18-pin DIP socket and then connecting the socket to the headstage to protect the headstage from unnecessary wear and tear. Important! When using the headstage with the NeuroNexus probes, keep in mind that there may be several versions of the probe. Check the NeuroNexus Website for pin diagrams. Also, see MCMap for a description and examples on how to re-map channel numbers. Connection Diagram When using the SH16-Z with a microstimulator system, connect the system as shown. The diagram below shows a system configuration featuring the RZ Processor, an IZ2 Stimulator, and PZ2 PreAmp. RZ (Back) Red Red To PZ2 PC Red Red To RV2 To IZ2 Connection PZ Amplifier ZB IZ2 Stimulator (Back) PZ2 (back) Non-Stimulus channels Electrodes Fiber Red To DB26 PreAmp To DB26 Stimulator LZ48 Battery Pack SH16-Z Electrodes SH16-Z to MicroStimulator Connection Diagram Switchable Headstage Operation When using the SH16-Z switching headstage it should be enabled in the IZ2_Control macro. System 3 Manual High Impedance Headstages 10-37 IZ2_Control StimSignal StimChan_Num Monitor Updating MonBank Enable Voltage Stim Mode (32 ch) The StimChan parameter input is used to set the stimulation channels. Based on the macro settings, you either specify a single channel to open for stimulation or send a channel mask if stimulating on more than one channel. All necessary control signals are sent from the base station to the headstage via the IZ2 output port. To use an electrode as the stimulus return path, make sure that channel is open for stimulation and send an inverted stimulus signal to that channel. Multiple SH16-Zs can be used with a single IZ2. The MonBank input determines which SH16-Z is updated when the StimChan value is changed. See the Help text in the IZ2_Control macro’s properties dialog boxes for more information about this macro. Note: The SH16-Z Headstage requires at least 10 ms to initialize its control bits for use. If you are trying to trigger the enable input you must either use a trigger signal that is delayed 10 ms from the point the circuit is run or use a manual trigger method to begin acquisition. Technical Specifications Headstage Gain Unity (1x) Input Impedance 1014 Ohms SH16-Z Pinout Diagrams Headstage Pinout The numbers in the diagram to the right refer to the channel connections to the preamp connector or stimulator connector. “G” on the diagram to the right is connected to the ground pin (GND) on the stimulator connector and can also connect to the ground pin (GND) of the preamp connector through a switchable relay in the SH16-Z. “R” on the diagram to the right is connected to a switchable relay that can connect to the “Ref” pin of the preamp connector. The electrode connector accepts 0.5 mm diameter male pins. The headstage has sensitive electronics. Always ground yourself before handling. PreAmp Connector For SH16-Z headstages, this connector does not need to be connected if the user is not recording on the non-stimulating channels. System 3 Manual 10-38 High Impedance Headstages Pin Name 1 A1 2 A2 3 A3 4 A4 5 REF 6 NA 7 Description Pin Name Description 14 V+ Positive Voltage 15 GND Ground 16 GND Ground 17 V- Negative Voltage Reference Pin 18 NA Not Used Not Used 19 NA Not Used A5 20 A6 8 A7 21 A8 9 A9 22 A10 10 A11 23 A12 11 A13 24 A14 12 A15 25 A16 13 NA 26 NA Analog Input Channel Number Ch 1-4 Analog Input Channel Number Ch 5, 7, 9, 11, 13, and 15 Not Used Analog Input Channel Number Ch 6, 8, 10, 12, 14, and 16 Not Used DB26 Stimulator Connector Pin Name 1 S1 2 S2 3 S3 4 S4 5 Clock 6 HSD System 3 Manual Description Pin Name Description 14 LL Load/Latch Stimulator Channels 15 GND Ground Ch 1-4 16 GND Ground 17 Data Digital Data Digital Clock 18 HSD Stimulator Detect Stimulator Detect 19 HSD Stimulator Detect High Impedance Headstages 10-39 7 S5 20 S6 8 S7 21 S8 9 S9 22 S10 Stimulator Channels 10 S11 23 S12 Ch 6, 8, 10, 12, 14, and 16 11 S13 24 S14 12 S15 25 S16 13 +20V 26 -20V Stimulator Channels Ch 5, 7, 9, 11, 13, and 15 +20V -20V System 3 Manual Part 11 Low Impedance Headstages System 3 Manual 11-2 Low Impedance Headstages ~ System 3 Manual Low Impedance Headstages 11-3 RA4LI - Four Channel Headstage The RA4LI headstage is designed for low impedance electrodes with input impedances between <1 kOhm and 20 kOhm. Electrode connectors are standard 1.5 mm safety connectors making it easy to connect to standard needle and surface electrodes for recording evoked potentials and EEG's. The headstage connects directly to the RA4PA Medusa preamplifier's 25-pin connector. A built in impedance checker can be used to test each channel and the reference. Additional 20x gain on the headstage improves signal-to-noise of low voltage signals. Impedance Checking with the Low-Impedance Headstage The Impedance checker on the RA4LI provides a simple check of the channel impedance relative to ground. To check the impedance level, press the button next to the channel indicator. The highest-level light indicates the maximum impedance between the channel and the ground. If all impedance lights are illuminated it is likely that one of the channels is not properly connected. The (-) impedance button checks the impedance between the reference and the ground. Impedance Checker 25-pin connector to preamplifier Ground Reference Headstage Voltage Range When using a TDT preamplifier the voltage input range of the preamplifer is typically lower than the headstage and must be considered the effective range of the system. Check the specifications of your amplifier for voltage range. Also keep in mind that the range of the headstage varies depending on the power supply provided by the preamplifier. TDT preamplifiers supply +/- 1.5 VDC, but third party preamplifiers may vary. TDT recommends using preamplifiers which deliver +/- 2.5 VDC or less. Check the preamplifier voltage input and power supply specifications and headstage gain to determine the voltage range of the system. The table below lists the input voltage ranges for the RA4LI headstage for either a +/- 1.5 VDC or +/- 2.5 VDC power source. Headstage input range when using Headstage input range when +/- 1.5 VDC power source using +/- 2.5 VDC power source +/- 33 mV +/- 80 mV System 3 Manual 11-4 Low Impedance Headstages Headstage Technical Specifications Warning!: When using multiple headstages ensure that all ground pins are connected to a single common node. See page 6-34 for more information. Input inferred noise rms 0.1 µ V bandwidth 300-3000 Hz 0.3 µ V bandwidth 2-8000 Hz Headstage Gain 20x Highpass Filter 2.2 Hz Lowpass Filter 7.5 kHz Input Impedance 106 Ohm System 3 Manual Low Impedance Headstages 11-5 RA16LI - 16 Channel Headstage The sixteen channel low impedance headstage (RA16LI) is a high quality, low-impedance headstage designed for recording high channel count EEG's. The RA16LI headstage is designed for low impedance electrodes and electrode caps with input impedances between <1 kOhm and 20 kOhm. Either headstage unit connects to the Medusa preamplifier's 25-pin connector. The simple interface to the RA16PA preamplifier makes it easy to connect your electrodes to our system. An adapter is also available to connect a low impedance headstage to a PZ preamplifier. See DBF-MiniDBM, page 12-17 for more information. A built in impedance checker can be used to test each channel and the reference. Additional 20x gain on the headstage improves signal-to-noise of low voltage signals. 25-pin connector to preamplifier 25-pin connector to electrodes Impedance Checking with the Low-Impedance Headstage The Impedance checker on the RA16LI provides a simple check of the channel impedance relative to ground. To check the impedance level, press the button next to the channel indicator. The highest-level light indicates the maximum impedance between the channel and the ground. If all impedance lights are illuminated it is likely that one of the channels is not properly connected. The (-) impedance button checks the impedance between the reference and the ground. Headstage Voltage Range When using a TDT preamplifier the voltage input range of the preamplifer is typically lower than the headstage and must be considered the effective range of the system. Check the specifications of your amplifier for voltage range. Also keep in mind that the range of the headstage varies depending on the power supply provided by the preamplifier. TDT preamplifiers supply +/- 1.5 VDC, but third party preamplifiers may vary. TDT recommends using preamplifiers which deliver +/- 2.5 VDC or less. Check the preamplifier voltage input and power supply specifications and headstage gain to determine the voltage range of the system. The table below lists the input voltage ranges for the RA16LI headstage for either a +/- 1.5 VDC or +/- 2.5 VDC power source. Headstage input range when using Headstage input range when +/- 1.5 VDC power source using +/- 2.5 VDC power source +/- 33 mV +/- 80 mV System 3 Manual 11-6 Low Impedance Headstages Headstage Technical Specifications Warning!: When using multiple headstages ensure that all ground pins are connected to a single common node. See page 6-34 for more information. Input inferred noise rms 0.1 µ V bandwidth 300-3000 Hz 0.3 µ V bandwidth 2-8000 Hz Headstage Gain 20x Highpass Filter 2.2 Hz Lowpass Filter 7.5 kHz Input Impedance 106 Ohm The electrode connector is a 25-pin connector. Information on the pin inputs is provided below. Note: Pins 6, 14, 17, 18 and 19 are not connected. Pin Name Description Pin Name Description 1 14 NA Not Used 15 GND Ground A1 Analog Input Channels 2 A2 3 A3 16 GND 4 A4 17 NA 5 Ref Reference 18 NA 6 NA Not Used 19 NA 7 A5 20 A6 8 A7 21 A8 9 A9 22 A10 10 A11 23 A12 11 A13 24 A14 12 A15 25 A16 13 GND System 3 Manual Analog Input Channels Ground Not Used Analog Input Channels Low Impedance Headstages 11-7 RA16LI-D - 16 Channel Headstage with Differential The RA16LI-D headstage is designed for fully differential recordings from low impedance electrodes and electrode caps with input impedances between <1 kOhm and 20 kOhm. It connects to the Medusa preamplifier's 25-pin connector. The simple interface to the RA16PA preamplifiers makes it easy to connect your electrodes to our system. An adapter is also available to connect a low impedance headstage to a PZ preamplifier. See DBF-MiniDBM, page 12-17 for more information. The differential inputs allow for improved common mode rejection on all channels. Because of the increased complexity of the circuitry, the RA16LI-D does not have impedance checking. The headstage connector is a DB44. The pin out diagram is shown below. Headstage Voltage Range When using a TDT preamplifier the voltage input range of the preamplifer is typically lower than the headstage and must be considered the effective range of the system. Check the specifications of your amplifier for voltage range. Headstage Technical Specifications Warning!: When using multiple headstages ensure that all ground pins are connected to a single common node. See page 6-34 for more information. Input inferred noise rms 0.1 µ V bandwidth 300-3000 Hz 0.3 µ V bandwidth 2-8000 Hz Headstage Gain 20x Highpass Filter 2.2 Hz Lowpass Filter 7.5 kHz Input Impedance 106 Ohm System 3 Manual 11-8 Low Impedance Headstages Note: Pins 1, 21-24 and 39 are not connected. Pin Name Description Pin Name 1 NA Not Used 25 AGND Analog Ground 2 A2 Analog Input 26 AGND 3 D3 Differential Input 27 D12 Differential Input 4 D5 28 A14 Analog Input 5 A5 29 A15 6 A7 30 D16 7 A8 31 D1 8 A9 32 A3 Analog Input 9 D9 Differential Input 33 D4 Differential Input 10 A10 Analog Input 34 AGND Analog Ground 11 A11 35 D6 12 A12 36 D7 13 D13 37 D8 14 AGND Analog Ground 38 AGND Analog Ground 15 A16 39 NC 16 A1 40 D10 17 D2 Differential Input 41 D11 18 A4 Analog Input 42 A13 Analog Input 19 AGND Analog Ground 43 D14 Differential Input 20 A6 Analog Input 44 D15 21 NA Not Used 22 NA 23 NA 24 NA System 3 Manual Analog Input Differential Input Analog Input Description Differential Input Differential Input Differential Input Part 12 Adapters and Connectors System 3 Manual 12-2 Adapters and Connectors ~ System 3 Manual Probe Adapters and Connectors 12-3 Probe Adapters Each TDT headstage is designed for use with a particular style of probe. Probe adapters allow each headstage to be used with a wider variety of probes. When using adapters, keep in mind that standard operation (differential vs single ended) varies for acute and chronic preparations and headstages are designed accordingly. When adapting across preparations, carefully note and understand the use of the ground (G) and reference (R) connections provided on each adapter. AC-CH Acute Headstage to Chronic Probe (16 Channels) This adapter allows the user to connect a 16-channel chronic probe (such as a TDT 16 channel microwire array) to an acute TDT headstage (RA16AC/RA16AC4). Standard operation for chronic preparations is single ended with ground and reference shorted together in the chronic headstage. However, the acute headstage is designed for differential operation. When using the acute headstage with our microwire arrays, short G and R together on the adapter for single ended operation. Pinouts are looking into the connector and reflect the preamplifier channels. TDT probe adapters are designed for specific TDT headstage to probe connections. If you are using a third party headstage, please contact TDT support for assistance. CH-AC Chronic Headstage to Acute Probe (16 Channels) This adapter connects a 16-channel acute probe to a TDT chronic headstage (RA16CH). Reference and ground are tied together by default on the chronic headstage so in general only one pin System 3 Manual 12-4 Adapters and Connectors connection is necessary. A jumper is provided on the RA16CH for differential operation. See RA16CH, page 10-22 for information. Pinouts are looking into the connector and reflect the preamplifier channels. TDT probe adapters are designed for specific TDT headstage to probe connections. If you are using a third party headstage, please contact TDT support for assistance. ACx2-NN 16 Channel Acute Headstage to 32 Channel Acute Probe This adapter connects a 32-channel acute NeuroNexus probe to two 16-channel acute TDT headstages (RA16AC/RA16AC4). Standard operation with the NeuroNexus probe is differential. If you wish to use the Reference pad on the probe, do not tie G and R together. Pinouts are looking into the connector and reflect the preamplifier channels. TDT probe adapters are designed for specific TDT headstage to probe connections. If you are using a third party headstage, please contact TDT support for assistance. Important!: When using these adapters with NeuroNexus probes, keep in mind that there are several versions of each of the probes. TDTs ACx2-NN is designed for use with Rev 2 of the 32channel NeuroNexus acute probe. Check the NeuroNexus website for pin diagrams. Also, see MCMap, in the RPvdsEx User Guide, for a description and examples on how to re-map channel numbers. CHx2-NN 16 Channel Chronic Headstage to 32 Channel Acute Probe This adaptor connects a 32-channel acute NeuroNexus probe to two 16-channel chronic TDT headstages (RA16CH). Connect the first RA16CH headstage (channels 1-16) to the front of the adapter. Connect the second RA16CH (channels 17-32) to the back of the adapter. This adapter also features a holding rod for connection to a micromanipulator. As with the CH-AC adaptor, reference and ground are tied together by default on the chronic headstage so in general only one System 3 Manual Probe Adapters and Connectors 12-5 pin connection is necessary. If you wish to use the Reference pad on the probe, do not tie G and R together and cut the jumper on each headstage to make the inputs differential. See RA16CH, page 10-22 for more information. Pinouts are looking into the connector and reflect the preamplifier channels. TDT probe adapters are designed for specific TDT headstage to probe connections. If you are using a third party headstage, please contact TDT support for assistance. Important!: When using these adapters with NeuroNexus probes, keep in mind that there are several versions of each of the probes. TDTs CHx2-NN is designed for use with Rev 2 of the 32channel NeuroNexus acute probe. Check the NeuroNexus website for pin diagrams. Also, see MCMap, in the RPvdsEx User Guide, for information on how to re-map channel numbers. nanoZ-OMN/DIP nanoZ™ to Omnetics and DIP Based Probes This adapter allows the user to connect an Omnetics or DIP based probe to a nanoZ™ impedance tester. Connectors are labeled on the circuit board for easy identification. The K1 connector on the bottom of the adapter is used to connect the nanoZ™ to one of the following: The Chronic connector is a dual row 20-pin Omnetics nano connector that is used with a 16-channel chronic probe, such as a TDT 16-channel microwire array. System 3 Manual 12-6 Adapters and Connectors The OmCon connector is a dual row 36-pin Omnetics nano connector that is used with a 32-channel chronic probe. The Acute connector is a 0.5mm female 18-pin DIP socket that is used with a 16-channel DIP-based probe, such as a 16-channel acute Neuronexus probe. Important! The corresponding channels from each probe connection are tied together, so that channel 1 of the Chronic connector, the OmCon connector, and the Acute connector are all tied to channel 1 of the nanoZ™ connector. See pinouts below for more detail. Connecting the Adapter to the nanoZ™ After configuring the nanoZ™ impedance tester as directed in the nanoZ™ User Manual, connect the adapter to the Samtec connector closest to the center, ensuring it is firmly seated. The adapter should cover both nanoZ™ Samtec connectors (as shown below). Chronic Pinout 18-pin female Omnetics nano dual row header (pinout looking into the connector) System 3 Manual Probe Adapters and Connectors 12-7 OmCon Pinout 36-pin female Omnetics nano dual row header (pinout looking into the connector) Acute Pinout 0.5mm female 18-pin DIP socket header (pinout looking into the connector) K1 Pinout 40-pin Samtec FOLC high density socket strip (pinout looking into the connector) nanoZ-ZCA32/ZCA64 Probes nanoZ™ to ZIF-Clip® These adapters allow the user to connect a nanoZ™ impedance tester to a 32- or 64-channel ZIFClip® probe. The nanoZ-ZCA32 K1 connector is used to connect the nanoZ™ to a 32-channel chronic probe, such as a TDT 32-channel ZIF-Clip® microwire array. The nanoZ-ZCA64 K1 and K2 connectors are used to connect the nanoZ™ to a 64-channel chronic probe, such as a TDT 64-channel ZIF-Clip® microwire array. System 3 Manual 12-8 Adapters and Connectors See ZIF-Clip® Headstages, page 10-3, for more information on ZIF-Clip® connectors. Connecting the Adapter to the nanoZ™ After configuring the nanoZ™ impedance tester as directed in the nanoZ™ User Manual, connect the adapter so that both nanoZ™ Samtec connectors (as shown below). Ensure that it is firmly seated. The nanoZ-ZCA32 should connect to the Samtec connector closest to the center of the nanoZ™. K1 and K2 Pinouts 40-pin Samtec FOLC high density socket strips (pinouts looking into the connector) System 3 Manual Probe Adapters and Connectors 12-9 ZIF-Clip® Headstage Adapters ZIF-Clip® headstage adapters are available for use with a variety of electrode styles. When using adapters, keep in mind that standard operation (differential vs single-ended) may vary for acute and chronic preparations. Carefully note and understand the use of the ground (G) and reference (R) connections provided on each adapter. Standard operation for ZIF-Clip® headstages is differential. Headstage adapters can be configured for single-ended operation by tying ground (G) and reference (R) connections together on the adapter (if available). Refer to the electrode manufacturer’s documentation for information on single-ended or differential configurations. Note: When using these adapters with NeuroNexus, Gray Matter, or CyberKinetics probes, keep in mind that there may be updates to pin configurations. Check the suppliers' website for pin diagrams. Also, see MCMap for a description and examples on how to re-map channel numbers. ZCA-DIP16 ZIF-Clip® Headstage to Acute Probe (16 Channels) This adapter allows the user to connect a 16-channel acute probe (such as NeuroNexus) to a 16channel ZIF-Clip® headstage. Ground and reference pins are located on the DIP connector and may be tied together for single-ended operation. Pinouts are looking into the connector and reflect the preamplifier channels. ZCA-OMN16 ZIF-Clip® Headstage to Chronic Probe (16 Channels) This adapter connects a 16-channel chronic Omnetics based probe to a 16-channel ZIF-Clip® headstage. Ground and reference pins may be tied together for single-ended operation. Pinouts are looking into the connector and reflect the preamplifier channels. System 3 Manual 12-10 Adapters and Connectors ZCA-OMN32 ZIF-Clip® Headstage to Chronic Probe (32 Channels) This adapter connects a 32-channel chronic Omnetics based probe to a 32-channel ZIF-Clip® headstage. By default, the inputs are single ended, with Ref and GND tied together. A jumper is provided to give the user the option of making the inputs differential. To make the inputs differential, cut the jumper between ground and reference (shown below). Pinouts are looking into the connector and reflect the preamplifier channels. ZCA-NN32 ZIF-Clip® Headstage to 32 Channel Acute Probe) This adapter connects a 32-channel acute NeuroNexus probe to a 32-channel ZIF-Clip® headstage. Note: X (Ref) is a reference pin that is connected from the adapter to the probe only. See the jumper configuration below for more information. Pinouts are looking into the connector and reflect the preamplifier channels. System 3 Manual Probe Adapters and Connectors 12-11 ZCA-NN64 ZIF-Clip® Headstage to 64 Channel Acute Probe) This adapter connects a 64-channel acute NeuroNexus probe to a 64-channel ZIF-Clip® headstage. Note: X (Ref) is a reference pin that is connected from the adapter to the probe only. See the jumper configuration below for more information. Pinouts are looking into the connector and reflect the preamplifier channels. Jumper Configuration The following table describes the jumper configurations for both the ZCA-NN32 and ZCA-NN64. Jumper Connections Operation G R Shorts headstage Ground and Reference inputs together, yielding single-ended amplification of signals relative to ground. X (Ref) G R X (Ref) G R X (Ref) Shorts headstage Reference input to the pin labeled X (a low impedance site on the probe) yielding differential amplification of signals relative to the voltage of the X (Ref) site. Headstage Ground and Reference separated and X (Ref) pin is not used, yielding differential amplification of signals relative to the voltage of the Reference System 3 Manual 12-12 Adapters and Connectors ZCA-GM60 ZIF-Clip® Headstage to 60-Channel Chronic Probe This adapter connects a 60-channel chronic Gray Matter microdrive (SC60-1) to a 64-channel ZIF-Clip® headstage. Ground and reference pins are located on the adapter for access to singleended and differential modes of operation. See the diagram below for connection details. G R R G G Pinouts are looking into the connector and reflect the preamplifier channels. Gray Matter microdrive (SC60-1) ZIF-Clip® headstage ZCA-GM60 Adapter ZCA-GM60 Connection Diagram System 3 Manual Probe Adapters and Connectors 12-13 ZCA-CK96A ZIF-Clip® Headstage to 96-Channel Chronic Probe This adapter connects a 96-channel chronic CyberKinetics CerePort connector to a 96-channel ZIF-Clip® headstage. For single-ended operation, tie the ground and reference pins (shown in diagram) together. Pinouts are looking into the connector and reflect the preamplifier channels. ZIF-Clip® headstage ZCA-CK96A Adapter CerePort Plug ZCA-CK96A Connection Diagram System 3 Manual 12-14 Adapters and Connectors A four-pin header located on the backside of the adapter is provided for access to two probe reference pins. These pins are separate references and are connected internally to the adapter. Connecting a jumper between the headstage reference pins (Ind) and either of the probe reference pins (Ref1 or Ref2) connects the headstage reference to the desired probe reference (see table below for more information). Jumper Configuration The following table describes the jumper configurations for the ZCA-CK96A. Jumper Connections Ind Ref1 Ind Ref2 Ind Ref1 Ind Ref2 Ind Ref1 Ind Ref2 Operation Headstage Ground and Reference separated and Ref1, Ref2 pins are not used, yielding differential amplification of signals relative to the voltage of the Reference (Ind). An external connection for the headstage reference (Ind) must be used for differential amplification. Shorts headstage Reference input (Ind) to the pin labeled Ref1 (a low impedance site on the probe) yielding differential amplification of signals relative to the voltage of the Ref1 site. Shorts headstage Reference input (Ind) to the pin labeled Ref2 (a low impedance site on the probe) yielding differential amplification of signals relative to the voltage of the Ref2 site. ZCA-ICS96 ZIF-Clip® Headstage to 96-Channel Chronic Probe This adapter connects a 96-channel acute CyberKinetics ICS-96 connector to a 96-channel ZIFClip® headstage. Banks A, B and C are labeled on the adapter and can be matched with the ICS-96 electrode sockets for correct alignment when plugging the two together. A four-pin header located on the top of the adapter is provided for access to the REF1 and REF2 probe reference pins used by the ICS-96. Connecting a jumper between the headstage reference pins (IND) and either of the probe reference pins (REF1 or REF2) connects the headstage reference to the desired probe reference (see table below for more information). For single-ended operation, solder the headstage ground (COM) and headstage reference (IND) solder points together. System 3 Manual Probe Adapters and Connectors 12-15 Jumper Configuration The following table describes the jumper configurations for the ZCA-ICS96. Jumper Connections Operation Headstage Ground and Reference separated and REF1, REF2 pins are not used, yielding differential amplification of signals relative to the voltage of the Reference (IND). An external connection for the headstage reference (IND) must be used for differential amplification. IND REF1 IND REF2 Shorts headstage Reference input (IND) to the pin labeled REF1 (a low impedance site on the probe) yielding differential amplification of signals relative to the voltage of the REF1 site. IND REF1 IND REF2 IND REF1 Shorts headstage Reference input (IND) to the pin labeled REF2 (a low impedance site on the probe) yielding differential amplification of signals relative to the voltage of the REF2 site. IND REF2 Pinouts G R1 47 45 43 41 39 37 35 33 31 29 27 25 48 46 44 42 NC G 95 93 91 89 87 85 83 81 79 77 75 73 96 94 92 90 A G G 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 NC G 88 86 84 82 80 78 76 74 72 70 68 66 64 62 60 58 B G R2 8 6 4 2 23 21 19 17 15 13 11 9 7 5 3 1 NC G 56 54 52 50 71 69 67 65 63 61 59 57 55 53 51 49 1.27mm 36-pin female micro socket headers NC No connect R1 Probe Reference 1 R2 Probe Reference 2 G G Ground R Headstage Reference R C Pinouts are looking into the connector and reflect the preamplifier channels. System 3 Manual 12-16 Adapters and Connectors ZCA-UP16 16-Channel Plextrode® U-Probe to ZIF-Clip® headstage This adapter connects an 8 or 16-channel acute Plextrode® U-Probe connector to a 16-channel ZIF-Clip® headstage. The adapter includes mounting holes for attachment to a micromanipulator. Configuration for single-ended or differential operation is provided on the electrode. Refer to the Plextrode® documentation for jumper configurations. Pinouts are looking into the connector and reflect the preamplifier channels. ZCA-UP24 24-Channel Plextrode® U-Probe to ZIF-Clip® headstage This adapter connects a 24-channel acute Plextrode® U-Probe connector to a 32-channel ZIF-Clip® headstage. The adapter includes mounting holes for attachment to a micromanipulator. Configuration for single-ended or differential operation is provided on the electrode. Refer to the Plextrode® documentation for jumper configurations. Pinouts are looking into the connector and reflect the preamplifier channels. System 3 Manual Probe Adapters and Connectors 12-17 Preamplifier Adapters Each TDT headstage is designed for use with either a Legacy or Z-Series preamplifier. Preamplifier adapters allow TDT headstages to be used with a variety of preamplifiers by converting the type of preamplifier connector. DBF-MiniDBM Low Impedance Headstage to PZ Preamplifier (16-channels) This adapter connects a low impedance headstage (RA4LI or RA16LI) to a PZ preamplifier. MiniDBF-DBM Z-Series Headstage Female MiniDB26 to Male DB25 Cable Adapter This adapter converts a Z-Series headstage Mini-D connector to a DB25 connector for use with a Medusa RA16PA preamplifier. System 3 Manual 12-18 Adapters and Connectors PLX-ZCA Z-Series Headstage to Plexon® Preamplifier This adapter connects a Z-Series headstage to a Plexon® preamplifier. Each PLX-ZCA adapter board connects 16-channels. Multiple adapter boards can be stacked for a higher channel count and are fastened together using two screws on either side of the adapter board. An external power source is provided to power the headstage. Female Mini-DB26 Connector (Connects to Z-Series Headstage) External Power Connector (Connect to 10-Pin Header) Square denotes channel 1 To Battery Pack and ON/OFF Switch Female Harwin Connector (Connects to Plexon® Preamp) External Power Source Connector and a Single PLX-ZCA Adapter Board External Power Source In order to power TDT headstages when using this adapter, an external power source is required. Each external power source includes four connectors and can power up to four PLX-ZCA adapter boards. The external power source uses two 1.5 V D batteries and is enabled through a simple ON/OFF switch. To power the PLX-ZCA adapter: Align the red colored stripe to the Harwin connector side of the adapter (as shown in the diagram above). Connect an external power connector to the 10-pin header located on the adapter. Ensure that the batteries are correctly inserted in the battery pack then move the switch to the ON position. Note: To power multiple PLX-ZCA adapters, simply connect each 10-pin header to one of the available external power connectors. System 3 Manual Probe Adapters and Connectors 12-19 Plexon header pinout Harwin Connector 10-Pin Header (For external power connector) Pinouts are looking into the connector and reflect the preamplifier channels. NA = Not Used, G = AGND, R = Reference System 3 Manual 12-20 Adapters and Connectors Connectors LI-CONN - Low Impedance Connectors A set of multi-channel low impedance connectors (LI-CONN) for the RA16LI is available for users who do not require a direct connection between the electrodes and the headstage. The LICONN uses standard 1.5 mm safety connectors to ensure proper connection between electrodes and the preamplifier. LI-CONN-Z - Low Impedance Connector for the PZ3 The PZ3 is designed to record from low impedance electrodes and electrode caps with input impedances less than 20 kOhm. Signals are input via multiple DB26 connectors on the PZ3 back panel. A break out box or connector(s) is required for electrode connection. The LI-CONN-Z for Shared Differential mode features standard 1.5 mm safety connectors and provides easy connections between electrodes and the amplifier. System 3 Manual Probe Adapters and Connectors 12-21 Splitters S-BOX - Amplifier Input Splitter The S-BOX is a 32-channel passive signal splitter for use with the PZ3 Low Impedance Amplifier. The splitter provides a simple and effective means of routing low impedance biological signals to both a TDT acquisition system and a parallel recording system. Four DB26 connectors provide direct connection to a PZ3 amplifier and a single DB37 provides a parallel output connection. Bank letters as well as channel number ranges are labeled on all the DB26 connectors (i.e. Bank A Channels 1-8). Important! The S-BOX is NOT FDA approved and is intended for use with the PZ3 Amplifier in Shared Differential mode. It DOES NOT support Individual (True) Differential mode. The S-BOX uses standard 1.5 mm safety connectors for input from electrodes. Front panel numbering of these inputs corresponds to TDT amplifier channels. DB37 connector DB26 connectors System 3 Manual 12-22 Adapters and Connectors DB37 Pinout Pin NameDescription Pin Name Description 1 A1 20 A2 2 A3 21 A4 3 A5 22 A6 4 A7 5 A9 23 A8 Analog input channels 1,3,5,7,9,11,13,15,17,19 ,21,23,25,27,29,31 6 A11 24 A10 Analog input channels 2,4,6,8,10,12,14,16,18, 25 A12 20,22,24,26,28,30,32 7 A13 26 A14 8 A15 27 A16 9 A17 28 A18 10 A19 29 A20 11 A21 30 A22 12 A23 31 A24 13 A25 32 A26 14 A27 33 A28 15 A29 34 A30 16 A31 35 A32 17 NA 36 NA Not Used Not Used 18 NA 37 REF Reference 19 GND Ground Note: No connections should be made to pins 17, 18, and 36. System 3 Manual Part 13 Microwire Arrays System 3 Manual 13-2 Microwire Arrays ~ System 3 Manual Microwire Arrays 13-3 ZIF-Clip® Based Microwire Arrays Part Number: ZIF2010, ZIF2011, ZIF2030, ZIF3030 Standard 50 µm polyimide-insulated tungsten microwire gives the arrays excellent recording characteristics and the rigidity of tungsten facilitates insertion. The standard ZIF2010 array consists of sixteen channels configured in two rows of eight electrodes each and are accessed via our ZIF-Clip® headstage. A notch at the base of the connector facilitates proper insertion into the ZIF-Clip® headstage and also denotes the 1st row of electrodes. See page 10-3 for connection instructions. Grounding the Electrode The following illustration shows the possible connections made for reference or ground wires. These wires are attached at TDT. Important note! A notch guide provides easy connections to the ZIF-Clip® headstage. Ensure that the notch side is properly aligned with the arrow symbol on the headstage (as shown in the pinout diagram). Caution! The microwire array can be damaged by extreme heat. Use caution when soldering. Specifications might vary based on custom order: Specification Default Options n Rows X n Electrodes 2X8 Max channels per connector = 64 Metal Tungsten Wire Diameter 50 μm Insulation Polyimide Electrode Type Standard Flex Ribbon Site Specification Attached 33 μm Flex Ribbon Separated System 3 Manual 13-4 Microwire Arrays Electrode Spacing 250 μm 500 μm Row Separation 375 μm Tip Angle Blunt Cut (0 degrees) 30, 45, 60 degrees Tip Length 2mm 0.5 - 10 mm Ground and Reference Wires Differential Single-Ended See the Online Order Form for more information on ordering specifications. ZIF-Clip® Based Microwire Array Site Map The following diagrams illustrate the site map configurations for 16, 32, and 64 channel ZIF-Clip® based microwire arrays. Site numbers reflect the preamplifier channels when connected with a ZIF-Clip® headstage. 16 and 32 channel ZIF-Clip® microwire arrays (Looking into the array) These diagrams indicate the site map or channel output to a TDT amplifier from the ZIF-Clip® based microwire array. Note: 16 channel ZIF-Clip® based microwire arrays contain only the first 2 rows. System 3 Manual Microwire Arrays 13-5 64 channel ZIF-Clip® microwire array (Looking into the array) ZCAP - Aluminum ZIF-Clip® Cap Part Number: ZCAP The Aluminum ZIF-Clip® Cap is designed to protect the ZIF-Clip® micro connector from potential damage in the absence of the ZIF-Clip® headstage. The caps are made of high quality aluminum and feature a rubber O-ring for easy handling and grip. The ZCAP fits directly over all ZIF-Clip® compatible connectors protecting your ZIF-Clip® probe adapters and microwire arrays. Using the ZCAP Grip the ZCAP with two fingers and gently slide it onto the ZIF-Clip® micro connector. To remove, grasp both sides of the O-ring grip and gently pull away from the ZIF-Clip® micro connector until the ZCAP releases from the connector. System 3 Manual 13-6 Microwire Arrays Omnetics Based Microwire Arrays Part Numbers: OMN1010, OMN1005, OMN1020, OMN1030 Standard 50 µm polyimide-insulated tungsten microwire gives the arrays excellent recording characteristics and the rigidity of tungsten facilitates insertion. The standard OMN1010 array consists of sixteen channels configured in two rows of eight electrodes each and are typically accessed via our RA16CH 16-channel headstages. OMN1005, OMN1020, and OMN1030 share this standard configuration with varying electrode separation specifications. Consult the documentation provided with your array for custom specifications. Grounding the Electrode Our latest laser cut microwire arrays (OMN1010) have one location each to connect needed ground and reference wires. Because the reference and ground are shorted together in our RA16CH chronic headstages (unless the jumper is cut by the user) only one wire will be needed for most cases. Important note! The solder pad is located on the backside of the microwire circuit board. Back view Front view The illustrations above show a single wire connected to the ground pad located on the backside of the array. Caution! The microwire array can be damaged by extreme heat. Use caution when soldering. System 3 Manual Microwire Arrays 13-7 Specifications might vary based on custom order: Specification Default Options n Rows X n Electrodes 2X8 Max channels = 32 Metal Tungsten Wire Diameter 50 μm Insulation Polyimide Electrode Spacing 250 μm 175 μm, 350 μm, 500 μm Row Separation 500 μm 1000 μm, 1500 μm, 2000 μm Tip Angle Blunt Cut (0 degrees) 30, 45, 60 degrees Tip Length 2mm 0.5 - 4 mm Attached G/R Wires None Ground, Reference 33 μm See the Online Order Form (PDF format) for more information on ordering specifications. Pinout Omnetics dual row 18-pin nano connector(s) (0.025 mil pitch; <2x7x4mm) (Looking into connector) System 3 Manual 13-8 Microwire Arrays Suggestions for Microwire Insertion I. General Procedures: The following are general suggestions for insertion of TDT microwire arrays and may not comply with your animal care and use guidelines. Investigators should consult officials at their respective institutions to determine the regulations governing animal care and use in their laboratory. We use aseptic techniques and avertin anesthesia for mouse, ketamine/xylazine anesthesia for rat. We use the general procedures for rodent survival surgery described in: "Principles of Aseptic Rodent Survival Surgery: General Training in Rodent Survival Surgery - Part I" In: Laboratory Animal Medicine and Management, Reuter J.D. and Suckow M.A. (Eds.) International Veterinary Information Service, Ithaca NY (www.ivis.org), 2004; B2514.0604. This can be downloaded from http://www.ivis.org/advances/Reuter/brown1/IVIS.pdf. NIH offers instructional videos entitled: “Training in Basic Biometholodology for Laboratory Mice” and “Training in Survival Rodent Surgery” at their website: http://grants.nih.gov/grants/olaw/TrainingVideos.htm. II. Stereotaxic Surgery: We use procedures similar to those described in: "Stereotaxic Surgery In The Rat: A Photographic Series" by Richard K. Cooley and C.H. Vanderwolf. This reference is available from Amazon.com for $27.97 and is highly recommended. III. Microwire Procedures: General information, pictures, and available configurations for TDT microwire arrays can be found at: http://www.tdt.com/products/MW16.htm and http://www.tdt.com/products/OrderForm_Omn1010.pdf A recent paper by Kralik et al. (2001) contains a very helpful description of microwire array insertion methods (Methods. 2001 Oct; 25(2): 121-50). In rat and mouse, we recommend following the general and neurosurgical procedures as described in the references above. We first prepare the subject and perform a craniotomy above the implantation site following the methods of Cooley and Vanderwolf (2004). Implant several skull screws as described in this reference to help bond the dental acrylic and array to the skull. A base coat of OptiBond FL (Kerr) applied to the skull works well to help bond the dental acrylic. Keep this out of the craniotomy. For rat and mouse we recommend a durotomy, using the tip of a sterile syringe needle as a microscalpel to cut an "X" shaped incision through the dura. Reflect the flaps of dura aside, taking care not to disturb the pia or pial vasculature. Advance the array to the pial surface using a stereotaxy and check that all electrodes are unobstructed by bone or dura. We have also used the stereotaxy to quickly advance the array through the pia and then to adjust the array to its final depth. This method has worked well for a number of our customers as well. There have been two schools of thought on insertion speed. Fast insertion (e.g. Rousche PJ, Normann RA. Ann Biomed Eng. 1992;20(4):413-22) using an inserter device, and slow insertion (e.g. Nicolelis et al., Proc Natl Acad Sci U S A. 2003 Sep 16;100(19): 11041-6). A recent paper by Rennaker et al., 2004, (J Neurosci Methods. 2005 Mar 30;142(2):169-76) explores the relative merits of each method. Regardless of which insertion method you choose, advance the array to its desired position, leaving it attached to the stereotaxy until it is fully bonded to the skull with dental acrylic. Prevent System 3 Manual Microwire Arrays 13-9 CSF from weeping from the craniotomy by gently packing around the array with gelfoam. The CSF will eventually soak through and keep the acrylic around the craniotomy from curing, so perform this step quickly. Bone wax or Kwik-Cast would probably work better than the gelfoam, but we have not used these in our lab to date. Attach the array to the skull using a thin layer of dental acrylic and the methods described by Cooley and Vanderwolf. Do not build up a large base of acrylic until the ground wire(s) of the array have been attached by wrapping them around the stainless skull screws. Make very sure that the ground wire(s) make good electrical contact to the screws. Pot the entire array/screw complex with dental acrylic using the methods described by Cooley and Vanderwolf. In our hands, explanted arrays come out of the brain with roughly the same impedances they went in with. Here, recording duration seems to be more limited by surgical technique/capsule formation than by the arrays themselves. We recommend ethylene oxide gas sterilization of the arrays and good sterile surgical technique. We have obtained good recordings in rat and mouse cortex for several weeks; using only alcohol sterilization of the arrays (we have no access to ethylene oxide). An example from rat with lots of active channels, ~150 µV spikes on ~20 µV background noise is below. We have seen up to ~300 µV spikes on the same noise floor. Our customers have reported recordings durations of several months in rat and monkey. System 3 Manual 13-10 System 3 Manual Microwire Arrays Part 14 Attenuator System 3 Manual 14-2 Attenuator ~ System 3 Manual Attenuator 14-3 PA5 Programmable Attenuator Overview The PA5 Programmable Attenuator is a precision device for controlling signal levels over a wide dynamic range, providing 0 to 120 dB of attenuation for signals up to 100 kHz in frequency. The device is fully programmable; however, simple manual operation is also available using front panel controls. When used programmatically, the module may be controlled via TDT's ActiveX Controls, as well as any programming environment that supports ActiveX or programs that allow scripts for implementing ActiveX controls, such as Microsoft Access and Excel. For information about how to control the module programmatically, see the ActiveX Reference Manual. When used in manual operation, the attenuation level is adjusted in two modes of operation: The Atten mode permits the user to adjust the attenuation level of the signal from 0 to 120 dB in increments of 0.1 dB. The UserAtt mode permits the user to adjust the attenuation level of the signal using userprogrammed parameters. Before using the UserAtt mode, attenuation parameters must be set up using the UserOps menu. Power and Interface The PA5 Programmable Attenuator is powered via the System 3 zBus (ZB1PS) and requires an interface to the PC (Gigabit, Optibit, or USB). Ensure that the ZB1PS chassis housing the PA5 is connected in the interface loop according to the installation instructions for the interface in use. Important!: The chassis housing the PA5 must be powered and connected to a PC via the PC interface for BOTH manual and programmed operation. Features Display Displays the current level of attenuation being applied to the signal or displays the manual operations menu. During manual operation it is used to set up user-defined attenuation parameters and to obtain descriptions for menu items. See Display Icons, page 14-12 for more information. (ESC) Button Exits the manual operations menu items without accepting changes. System 3 Manual 14-4 Attenuator SELECT (ENTER) Knob During manual operation, allows the user to adjust the attenuation applied to the signal. In addition, it allows the user to scroll through the manual operation menus, set up user-defined attenuation parameters, and access descriptions of menu item. Turn the Select knob to adjust attenuation or view menus. Press and release the knob to make a selection. The module must be in Attn or UserAtt mode to manually adjust attenuation. See Manual Operation, page 14-4 for more information. INPUT BNC Source signal input. The maximum input voltage is +/- 10V peak. OUTPUT BNC Attenuated signal output. PA5 Manual Operation Important!: The PA5 is powered via the zBus and must be connected to the PC via an interface module during manual operation. In manual operation, the PA5 is operated using front panel controls. The menu options are viewed by turning the Select knob and entered by pressing and releasing the knob. The module must first be set to Attn or UserAtt mode to manually adjust attenuation. To access a menu: Turn the knob until the name of the desired menu appears on the display, then press and release the knob. The module has two levels of menus. Top-level menu items are indicated by a single filled box in the upper left corner of the menu display, and sub-menus are indicated with an additional indicator box for each level. Only the UserOps menu item has sub-menu items. See Display Icons, page 14-12 for more information. For a definition of each menu item: Turn the Select knob until the name of the menu appears on the display, then press and hold down the Select knob. A description of the menu function will scroll across the display. To exit a menu without changing settings: Press and release the ESC button. Operation in Atten Mode In Atten mode, the user sets the desired level of attenuation with the Select knob. When the unit is powered on, it defaults to the Atten mode with 0.0 dB of attenuation. To use Atten mode: Turn the Select knob until Atten appears on the display, then press and release the Select knob. A small letter "A" appears in the upper left corner of the display, indicating the unit is in Atten mode, and a decibel reading appears on the right side of the display. See Display Icons for more information. Turn the Select knob to adjust attenuation in 0.1 dB increments. System 3 Manual Attenuator 14-5 Operation in UserAtt Mode In UserAtt mode, the user can adjust the attenuation level of the signal using user-programmed parameters available in the UserOps menu. Users can also save common parameter configurations in the PA5's nonvolatile memory. See Using Preset Configurations for more information. To use UserAtt mode: Turn the Select knob until UserAtt appears on the display, then press and release the Select knob. A small letter "U" appears in the upper left corner of the display, indicating the unit is in UserAtten mode, and a decibel reading appears on the right side of the display. See Display Icons, page 14-12 for more information. Turn the Select knob to adjust attenuation according the current user programmable parameters (available in the UserOps menu). The default settings include a step size of 3.0 dB and dynamic update mode. Note: When the Update attenuation parameter is set to Manual, the intensity of the display will dim as the user turns the knob—this indicates that the changes have not been applied to the output signal. The user must press and release the Select knob to apply attenuation changes to the output signal. To access the UserOps menu: Turn the Select knob until UserOps appears on the display. Press and release the Select knob. Set the UserOps parameters as desired. To set parameters such as step size (StpSize), update mode (Update), minimum attenuation (AbsMin), base attenuation (BaseAtt), and reference value (Refrnce); turn the Select knob to the desired value and then press and release to save changes. To exit any menu without saving parameter changes, press and release the ESC button before the settings are saved. About UserAtten Mode Parameters In UserAtten Mode, the user may set parameters such as step size (StpSize), update mode (Update), and minimum attenuation (AbsMin). The scale can be adjusted using the base attenuation (BaseAtt) and reference value (Refrnce) parameters. Both base attenuation and reference can be used simultaneously, producing an actual attenuation equal to (Refrnce+BaseAttdial setting). See Manual Operation Menus for more information. BaseAtt--Base Attenuation Adds a fixed attenuation value, shifting the scale down and allowing attenuation to be displayed relative to this base level (useful for calibrating signals played over varying transducers). See Setting Base Attenuation, page 14-8 for more information. StpSize--Step Size Sets the increments in which attenuation is applied to the signal when using the Select knob. Refrnce—Reference Sets a reference value used to "flip" the scale of the display (useful for displaying actual signal level on the front panel of the PA5). May be used only when the intensity of the input signal is known. See Setting a Reference Value, page 14-10 for more information. System 3 Manual 14-6 Attenuator Update—Update Determines whether attenuation changes dynamically as the selector knob is turned or only after pressing enter to select the current value. AbsMin--Minimum Attenuation Sets the minimum level of attenuation the user can apply to the signal (to avoid accidentally presenting excessively loud signals). PA5 Manual Operation Menus To access a menu: Turn the knob until the name of the desired menu appears on the display, then press and release the knob. The module has two levels of menus. Top-level menu items are indicated by a single filled box in the upper left corner of the menu display, and sub-menus are indicated with an additional indicator box for each level. Only the UserOps menu item has sub-menu items. For a definition of each menu item: Turn the Select knob until the name of the menu appears on the display, then press and hold down the Select knob. A description of the menu function will scroll across the display. To exit a menu without changing settings: Press and release the ESC button. System 3 Manual Attenuator 14-7 PA5 Top Level Menu Atten Sets attenuation from 0.0 to 120.0 dB in 0.1 dB increments. The default setting is 0.0 dB. When Atten is in use, the letter "A" appears on the left side of the display, while the attenuation level appears on the right side of the display. UserAtt Sets attenuation based on UserOps settings. Before use, attenuation parameters must be set up via the UserOps sub-menus (see below). The default setting is 0.0 dB. When UserAtt is in use, the letter "U" appears on the left side of the display, while the attenuation level appears on the right side of the display. UserOps Access UserOps submenu UserOps Sub-menu BaseAtt Sets a fixed level of attenuation as a reference. The default setting is 0.0 dB and the range is 0 to 100.0 dB. When BaseAtt is set, a "+" symbol appears on the left side of the display. When used, the attenuation level displayed is relative to BaseAtt. For example, with BaseAtt set to 60.0 dB, the attenuation level will be display from -60.0 dB to 60.0 dB. StpSize Sets the increments of attenuation. The default setting is 3.0 dB, and the range is 0.1 to 60.0dB. Refrnce Changes the display so it shows the output signal intensity rather than the attenuation level. This function may be used only when the input signal strength is known. When Refrnce is set, the letter "R" appears on the left side of the display. The default setting is 0.0, and the range is ± 300.0. For example, when Refrnce is set to 136 and the attenuation level set to 0.0 dB, the display shows 136.0. When the attenuation level is adjusted to 30.0 the display shows 106. Update Determines when attenuation is applied to the signal. When set to Dynamic, attenuation is applied as the Select knob is turned. When set to Manual, attenuation is applied after the Select knob is pressed and released. The default setting is Dynamic. Note that when Update is set to Manual, the attenuation level on the display changes as the Select knob is turned, but the attenuation is not applied to the signal until the Select knob is pressed and released. In this mode, the intensity of the display dims to indicate that the attenuation has not been applied to the signal. MinAttn Sets the minimum attenuation level for the UserAtt mode. This is used to avoid signals that are too loud for the subject or equipment. The default value is 0.0 dB and its range is 0.0 to 100.0 dB. Note that setting this parameter limits the range of possible attenuation levels. For example, when it is set to 30.0 dB, the range of attenuation is 30 db to 120 dB. Load PS Loads one of four preset UserAtt configurations from non-volatile memory. See Save PS (Below). The default is 1 and its range is 1 to 4. Save PS Saves the current UserAtt configuration in one of four non-volatile memory buffers. This permits the user to save commonly used UserAtt configurations. The default is 1 and its range is 1 to 4. System 3 Manual 14-8 Attenuator To save a configuration, first ensure that all UserAtt parameters are set as desired then turn the Select knob until the desired memory location is displayed, and press the Select knob. Saving appears on the display. The preset is ready of use. Reset Resets all menu items, including presets, to their default conditions. Confirm The user must confirm the reset by pressing and releasing the Select knob. While the module is resetting, Reseting appears on the display. The user must confirm the reset by pressing and releasing the Select knob. While the module is resetting, Reseting appears on the display. To exit without resetting, turn the Select knob until Cancel appears on the display and then press and release the Select knob, or press the Esc button. Cancel Cancels the reset. Setting Base Attenuation When operating the PA5 manually in User Attenuation (UserAtt) mode, the Base Attenuation (BaseAtt) parameter can be used to apply a fixed attenuation level to the signal. Any additional attenuation to the signal is displayed relative to this base level within a range of 0 to 120 dB. For example: if the BaseAtt is set to 6 dB, when the user sets the attenuation to 3 dB the actual attenuation applied is 9 dB. This feature can be used to calibrate a number of different experimental setups, attenuating each by a different base attenuation so as to provide identical signal levels when each is set to 0.0 dB UserAtt. When this feature is in use, a "+" symbol is displayed on the left side of the display. Note that the Base Attenuation and Reference parameters can be used simultaneously. When both of these features are in use, the letter "R" and a "+" symbol are displayed on the left side of the display. See Display Icons for more information. To set the base attenuation: Access the UserAtt mode, by turning the Select knob until UserAtt appears on the display, then pressing and releasing the knob. Access the UserOps menu, and turn the Select knob until BaseAtt appears on the display. Press and release the Select knob. 0.0 dB appears on the display. Turn the Select knob until the display shows the desired level of attenuation. Press and release the Select knob. The level is saved and BaseAtt appears on the display. To exit the UserOps menu, press and release the ESC button again. Example 1: Adding Speaker Calibration Attenuation A user wishes to equilibrate the level of stimuli applied to two different loudspeakers. Speaker #2 is 7.3 dB louder at the frequency of interest than speaker #1. This example requires the use of two PA5 Programmable Attenuators. To more directly compare thresholds measured with both loudspeakers, set the BaseAtt parameter for speaker #1 to 0.0 dB and set the BaseAtt parameter for speaker #2 to 7.3 dB, so that the signal level delivered for a given UserAtt is the same for both loudspeakers. Actual attenuation versus displayed levels is shown in the following table. Speaker 1: BaseAtt=0 UserAtt Display Value System 3 Manual Speaker 2: BaseAtt = 7.3 Actual Attenuation UserAtt Display Value Actual Attenuation Attenuator 14-9 0 0 -7.3 0 120 120 0 7.3 112.7 120 Example 2: Multiple Signals of Varying Levels The base attenuation feature is also useful when working with multiple signals of varying levels. BaseAtt can be configured so the intensity of each signal input is identical at 0.0 dB. When working with three signals 30, 34, and 36 dB SPL, the BaseAtt parameters are set and the actual versus displayed value of attenuation are shown in the table below. This example requires three PA5 Programmable Attenuators. System 3 Manual 14-10 Attenuator Input Signal BaseAtt Displayed Value Actual Attenuation 36 dB SPL 6.0 db 0 6 4 10 6 12 8 14 0 4 4 8 6 10 8 12 0 0 4 4 6 6 8 8 34 dB SPL 30 dB SPL 4.0 dB 0.0 dB Setting a Reference Value The Reference parameter is used to display the intensity of the output signal. This parameter can be used only when the strength of the input signal is known. This serves to "flip" the scale, displaying larger numbers for smaller attenuation values. When in use, a letter "R" is displayed on the left side of the display. Note that the Base Attenuation and Reference parameters can be used simultaneously. When both of these features are in use, the letter "R" and a "+" symbol are displayed on the left side of the display. See Display Icons, page 14-12 for more information. To set the Reference parameter: Access the UserOps menu, and turn the Select knob until Refrnce appears on the display. Press and release the Select knob. 0.0 dB appears on the display. Turn the Select knob until the display shows the desired level. Press and release the Select knob. The reference is saved. To exit the UserOps menu, press and release the ESC button. Example 1: Displaying Signal Level in SPL A user wishes to use the PA5 to display the signal level in dB Sound Pressure Level (SPL) for the frequency of interest. Measurements with a sound level meter show a sound level of 96.4 dB SPL with 0.0 dB of attenuation in the PA5. The user sets the Refrnce parameter to 96.4. The actual attenuation versus the displayed value is as follows: Display Value (in dB SPL) Attenuation 0 96.4 System 3 Manual Attenuator 14-11 50 46.4 96.4 0 Example 2: Combining Reference and Base Attenuation When the Reference parameter is set to 110 dB and the Base Attenuation parameter is set to 6.0 dB, the actual attenuation versus displayed value is as follows: Display Value (in dB SPL) Attenuation 0 116 50 66 110 6 Using Preset Configurations The PA5 Programmable Attenuator allows users to save four unique User Operation configurations that may be used in UserAttn mode. These configurations may include any of the UserOps parameters (such as step size, base attenuation, and minimum attenuation). Before a configuration can be loaded, it must be set up via the UserOps menu and saved via the SavePS menu. Saving Preset Configurations Warning: This procedure overwrites the contents of the selected preset location. Be certain that the existing configuration is not needed before continuing. Before a configuration can be saved, it must be set up via the UserOps menu. Once the configuration is set up as desired, save the configuration by performing the following: At any top-level menu, turn the Select knob until SavePS appears on the display. Press and release the Select knob. Preset-1 appears on the display. Turn the Select knob until the desired preset location is displayed and then press and release the Select knob. Saving appears on the display and then Atten appears on the display. The configuration is saved. Loading Preset Configurations When a configuration has been set up via the UserOps menu and saved via the SavePS menu, load the configuration by performing the following: Turn the Select knob until LoadPS appears on the display. Press and release the Select knob. Preset-1 appears on the display. Turn the Select knob until the desired preset location is displayed, and then press and release the Select knob. First, Loading appears on the display and then Attn appears on the display. The configuration is loaded. System 3 Manual 14-12 Attenuator PA5 Display Icons Menu Level Icons Display Description Single Box: indicates a top-level menu. Double Box: indicates a second-level menu. Attenuation Mode Icons Display Description A: Normal Attenuation Mode U: User Attenuation Mode U+: User Attenuation Mode. Base attenuation value set. R: User Attenuation Mode. Reference level set. R+: User Attenuation Mode. Base attenuation value and reference level set. System 3 Manual Attenuator 14-13 PA5 Technical Specifications Input Signal Range ±10V peak Frequency Range DC – 200 kHz Attenuation Range 0.0 to 120.0 dB Attenuation Resolution 0.1 dB Attenuation Accuracy 0.05 dB Spectral Variation <0.04 dB (20Hz to 80 kHz) DC Offset < 10 mV Signal/Noise 113 dB (20 Hz to 80 kHz at 9.9 V) Noise Floor 16 V rms (20 Hz to 80 kHz) THD <0.003 % (1kHz tone +/- 7V peak, 0 dB attenuation) Attenuation Settling Time 5 ms Switching Transient < 8 mV (0 Hz to 80 kHz) Input Impedance 10 kOhm Output Impedance 10 Ohm System 3 Manual 14-14 System 3 Manual Attenuator Part 15 Commutators System 3 Manual 15-2 Commutator ~ System 3 Manual Commutator 15-3 ACx Motorized Commutators Overview As part of a complete solution for research with awake, behaving subjects, TDT has developed a series of 16, 32, and 64-channel ultra quiet motorized commutators. Lightweight cables and connectors minimize the torque caused by subject motion relative to a fixed cable. Sensors on the commutator continuously measure the rotational angle applied to the headstage cable, and spin the motor to compensate, eliminating the turn-induced torque at the subject’s end of the cable. Pushbuttons allow for optional manual control, and an input BNC can be used to inhibit the commutator motor during critical recording periods. A rechargeable Li-Ion battery powers the motorized commutators. Part numbers: AC16 - 16 Channel Commutator AC32 - 32 Channel Commutator AC64 - 64 Channel Commutator Power and Interface The commutators are powered by a 1500 mAh Li-ion Battery. A 6-9 V DC, 500 mA, center negative adaptor (one provided) charges the unit. Low battery status is reported only by a decrease in rotational speed. No PC interface is required for operation. Mounting The commutator assembly can be mounted above the subject by utilizing the two mounting holes provided. Depending on the mounting configuration, a 2.75” diameter access hole may have to be drilled into the support to which the commutator is mounted. Dimensions are provided below to determine clearance requirements. System 3 Manual 15-4 Commutator Connection and Setup Before using the AC32 and AC64 commutators, it is important to adjust the wire harness on the back so it is balanced. The AC32 harness should be in two loops 180 degrees apart and the AC64 harness should be in four loops 90 degrees apart (as shown below). Typically, preamps are connected to the DB25 connectors on the front of the commutator and headstages (with special splice connectors) are connected to the interface receptacles on the back of the commutator. Amplifier Connections The commutators interface with one or more preamplifers via connections on the user interface panel. All connections are designed for direct connections to TDT preamplifers. By default, the 16 and 32 channel versions feature DB25 connectors that match the pin configuration of the Medusa PreAmps. 64 channel versions feature flying leads with connectors that mate with the Z-Series PreAmp. Custom pinout configurations are available. System 3 Manual Commutator 15-5 Default Device Configurations Commutator Use with AC16 Medusa RA16PA AC32 Medusa RA16PA AC64 Z-Series PZ2 or PZ3 Channel Mapping Diagram Device Connector Channels AC16 Connector 1-16 Device Connector Channels AC32 Connector A 1-16 Connector B 17-32 Device Connector Channels AC64 Connector #1 1-16 Connector #2 17-32 Connector #3 33-48 Connector #4 49-64 Headstage Connections TDT offers a headstage with splice suitable for use with the commutator. A DB25 splice cable can also be provided to allow you to easily switch to a configuration that does not use the commutator. See the following illustration. System 3 Manual 15-6 Commutator Important!: When using TDT's SH16 Switching Headstage with the AC64, the “control” connector of the headstage MUST be connected using the #1 (ch1-16) connector. The switching headstage CANNOT be connected to any other connector. When using non-TDT switching headstages, contact TDT customer support for assistance. Interface Receptacles System 3 Manual Commutator 15-7 Interface receptacles (AC64 (4), AC32 (2), AC16 (1)) on the back of the commutator provide connections to headstages via standard interface headers. See technical specifications for pin mapping and see Headstage Connections below for direct connection solutions from TDT. Features LEDs The four indicator LEDs on the front panel indicate power, the status of the Inhibit BNC input, clockwise rotation and counterclockwise rotation. P Power (~2 Hz flash when on, ~4 Hz flash when rotating) I Inhibit Counterclockwise rotation Clockwise rotation Note: When the sensors on the commutator cause the motor to continuously rotate more than five revolutions in one direction, the unit will enter a hold state to prevent the wires from tangling. The commutator will not respond to commands and both the clockwise and counterclockwise LEDs will flash. Cycle power to reset the unit. Manual Rotational Buttons The commutators feature both clockwise and counterclockwise manual rotational buttons. When pressed, these buttons will rotate the commutator at approximately 12 RPM. Pressing either of these buttons also overrides the current rotational state of the commutator. Inhibit BNC During critical recording periods it may be necessary to prevent rotation to ensure signal integrity. A logical low (0) on the Inhibit BNC will prohibit any rotation initiated by either the sensors on the commutator or the manual rotational button. External Ground A banana jack located in the top right corner of the front plate (directly above the charger input port) provides connections to common ground on the commutator. System 3 Manual 15-8 Commutator AC16, AC32, AC64 Technical Specifications Channels: 16, 32, or 64 Signal/Noise: 120 dB (20 Hz to 25 kHz) RPM (approx): 12 Digital Inputs: 1 Inhibit Power Consumption: 35 mAh, quiescent 65 mAh, rotating Power Supply: Battery 1500 mAh Li-ion Battery. 1000 cycles of charging, not removable by user. Charger 6-9 V DC, 500 mA, center negative Dimensions (in): Backplate to end of connector 4.15 Minimum diameter for access hole 2.75 Distance between mounting holes 7.3 Weight (g): ~ 665 (AC16 and AC32) ~ 945 (AC64) Interface Receptacles The interface receptacle diagram shows how the pins on each receptacle map to the pins on the associated DB25 connector on the front of the commutator. System 3 Manual Commutator 15-9 AC16 and AC32 Headstage Connector(s) Pinout Pin Name Description Electrode Channels Pin Name Description 1 E1 14 V+ 2 E2 15 GND Ground 3 E3 16 GND Ground 4 E4 17 V- Negative Voltage 5 Ref Reference 18 N/A Not Used 6 N/A Not Used 19 N/A Not Used 7 E5 Electrode Channels 20 E6 Electrode Channels 8 E7 21 E8 9 E9 22 E10 10 E11 23 E12 11 E13 24 E14 12 E15 25 E16 Positive Voltage 13 GND Ground System 3 Manual 15-10 Commutator AC64 Headstage Connectors Pinout Important!: Connectors 2, 3, and 4 share common GND, V+, and V-. Pin Name Description Pin Name Description 1 E1 14 V+ Positive Voltage 2 E2 15 GND Ground 3 E3 16 GND Ground 4 E4 17 V- Negative Voltage 5 Ref Reference 18 HSD Headstage Detect 6 HSD Headstage Detect 19 HSD Headstage Detect 7 E5 Electrode Channels 20 E6 Electrode Channels 8 E7 21 E8 9 E9 22 E10 10 E11 23 E12 11 E13 24 E14 12 E15 25 E16 13 GND 26 N/A System 3 Manual Electrode Channels Ground Not Used Part 16 Transducers and Amplifiers System 3 Manual 16-2 Transducers and Amplifiers ~ System 3 Manual Transducers and Amplifiers 16-3 MF1 Multi-Field Magnetic Speakers Overview TDT Multi-Field Magnetic Speakers offer high output and fidelity over a wide bandwidth and deliver more power at lower frequencies than our electrostatic speakers. They are well-suited for laboratory species with lower frequency hearing and for noise exposure studies. Detachable tips allow them to be configured for either free- or closed- field use. The closed-field configuration incorporates an internal parabolic cone designed to maximize output and minimize distortion. Tips are tapered for either direct application or for use with 1/8” O.D. PVC tubing. The mono speaker is provided with two 10 cm tubes and the dual speaker set is provided with four 10 cm tubes. Speakers feature a rugged aluminum housing and a built-in, 8-32 threaded hole for use with standard laboratory mounting hardware. The mono speaker includes a aluminum stand and the dual speaker set includes a variety of aluminum mount/base fittings for easier positioning. The speakers can be driven directly from the RZ6 or using either TDT’s SA1 or SA8 stereo amplifiers. The speaker input carries both bias and signal voltages from the stereo amplifier. Part Numbers: MF1-M - Mono MF1-S – Dual (two speakers) Multi-Field Configurations The MF1 speaker is comprised of the free-field speaker and a closed-field adapter, two tapered tips, and line filter for closed-field use. An RCA to BNC adapter and stand are also provided. Using the MF1 for Free Field Operation The MF1 main speaker component can be used for free-field sound production. The speaker can be connected to the source via an RCA connector located on the back of the MF1 housing. If using the stereo amplifier built into the RZ6, simply connect the supplied RCA cable from the MF1 to one of the output BNC connectors on the RZ6 using the supplied RCA to BNC adapter. Caution!: When the speaker is configured for free field use, be careful to avoid touching the exposed speaker membrane. System 3 Manual 16-4 Transducers and Amplifiers Configuring the MF1 for Closed Field Operation For closed-field operation, the Close Field adapter is attached to the face of the speaker using three hex screws. A parabolic tip is be mounted in the recessed socket on the closed-field adapter and is held securely in place by an o-ring at the base of the tip. The speaker can be connected to the source via an RCA connector located on the back of the MF1 housing. If using the stereo amplifier built into the RZ6, simply connect the supplied RCA cable from the MF1 to one of the output BNC connectors on the RZ6 using the supplied RCA to BNC adapters. Iportant!: When using the MF1 in the closed-field configuration the supplied CF line filter must be installed between the BNC to RCA adapter and the RCA cable. This filter minimizes distortion at lower frequencies in the closed-field. CF Adapter Speaker Hex Screws Stand CF Line Filter Tip To configure the MF1 for closed-field: Ensure black o-ring is in place on back of CF adapter, as shown. Attach the CF adapter to the front of the speaker using three of the provided 1/4 x 4-40 hex screws. Speaker Front Back of CF Adapter Holes for Hex Screws Black O-ring Ensure the blue o-ring is in place at the base of the desired tip, as shown. Insert one of the tips into the groove on the CF adapter. Ensure the tip is bottomed in its socket. If using the tube tip, gently insert the tube into the narrow end of the tip. Speaker with CF Adapter 3mm Ear Tip 3mm Tube Tip Blue O-ring Groove for Tip System 3 Manual Transducers and Amplifiers 16-5 Attach a BNC to RCA adapter to the BNC amplifier port of your source device. Attach the CF filter to the RCA cable. CF Filter For Closed Field Configuration Only If desired, the provided stand can be attached to the speaker using a thumbscrew. Connect the MF1 to the amplifier using the RCA cable (with CF filter attached). Back of Speaker with Stand Thumb Screw RCA Line In Closed-Field Speaker Design Considerations When using the closed-field configuration for experiments, the provided PVC tubing will transfer the signal best when it is kept straight. Note that the speaker performance is dependent on the coupling system used and the ear of the subject. All speaker configurations should be calibrated to your specific configuration. Technical specifications measured under specific controlled conditions are provided for comparison purposes. Technical Specifications Weight Free Field Closed Field ~216g ~277g Dimensions Outside Diameter 6.6 cm Depth 3.6 cm 6.8 cm 7.1 cm Free Field w/Tube Tip w/Ear Tip Typical Output (+/- 1 V peak input) Free Field 87 dB SPL at 10 cm Closed Field 100 dB SPL in 0.1 cc coupler THD <= 1% from 1kHz to 50 kHz Impedance 4 Ohms System 3 Manual 16-6 Transducers and Amplifiers Free field measurements typical at 10 cm using +/- 1V input. Closed field measurements typical for approx 0.1cc eartip coupler using +/- 1V input. System 3 Manual Transducers and Amplifiers 16-7 CF1/FF1 Magnetic Speakers Overview TDT Magnetic Speakers offer high output and fidelity over a bandwidth from 1 – 50 kHz. These broadband speakers have more power at lower frequencies than our electrostatic speakers, making them well suited for laboratory species with lower frequency hearing. Their high output levels and broad bandwidth also make them excellent for noise exposure studies. These 4-Ohm magnetic speakers are available in either free-field or closed-field models. The freefield model delivers signals of over 100 dB SPL with < 1% distortion over its entire bandwidth (+/- 4 V, 10 cm). The closed-field model has an internal parabolic cone designed to maximize output and minimize distortion. Its tapered tip can be inserted directly to the subject’s ear or fitted with the provided tubing and used with most standard ear tips. The FF1 and CF1 magnetic speakers can be driven using either TDT’s SA1 or SA8 stereo amplifiers. The speaker input is connected via a BNC connector, which carries both bias and signal voltages from the stereo amplifier. Both models feature a rugged polymer enclosure with a stable base as well as a built-in, ¼”-20 threaded post for positioning with laboratory mounting hardware. Part Numbers: FF1 - Free-Field Magnetic Speaker CF1 - Closed-field Magnetic Speaker (Provided with 6” of 1/8” O.D. PVC tubing) Cable Connection Connections to the speakers are made through a BNC connector located on the back of the FF1 and CF1 housing. If using the SA1 stereo amplifier, simply connect a BNC cable from the FF1 or CF1 to one of the output BNC connectors on the SA1 as shown in the following figure. System 3 Manual 16-8 Transducers and Amplifiers Sa1 Stereo Power Amp Gain (DB) IN-1 Out-1 Out-2 In-2 In From Speaker Driver FF1 or CF1 BNC Connect FF1 or CF1 BNC Connect If you are using the SA8 See the SA8 Eight Channel Power Amplifier, page 16-30 for more information. Routine Care and Maintenance Inspect speakers for visual damage prior to use. Exposure to high temperatures will damage the speaker. The polymer used to construct the speaker’s housing is very durable, however prolonged pressure, such as supporting the weight of the CF1 with the speaker’s parabolic cone, may alter the original structure of the cone causing possible distortion and undesirable effects. Unlike the closed-field model the free-field model’s speaker is exposed and should be carefully handled. Sharp objects could puncture the speaker membrane causing damage to the unit. If there is damage to the BNC connector or the speaker housing, contact TDT for an RMA for repair. Closed Field Speaker Design Considerations All speaker configurations should be calibrated to your specific configuration. If you are planning to deliver tone stimuli, SigCalRP can be used to normalize the desired stimulus signals. For questions about normalizing other types of stimuli, contact TDT. When using the CF1 speaker for experiments the provided PVC tubing will transfer the signal best when it is kept straight. Note that the speaker performance is dependent on the coupling system used and the ear of the subject. Users should test the device under experimental conditions to ensure it meets their requirements. Technical Specifications measured under specific controlled conditions are provided for comparison purposes. System 3 Manual Transducers and Amplifiers 16-9 Technical Specifications FF1 Technical Specifications Crossover Frequency 500 Hz High Pass Weight ~550 Grams Dimensions 7.62 cm outside diameter x 3.81 cm deep Typical Output (+/- 1 V peak input) 108 dB SPL at 10 cm from 1 kHz to 50 kHz THD <= 1% from 1kHz to 50 kHz Impedance 4 Ohms Free-field Frequency Response at 10 cm FF1 measurements typical at 10 cm using +/- 4V input. System 3 Manual 16-10 Transducers and Amplifiers CF1 Technical Specifications Crossover Frequency 500 Hz High Pass Weight ~590 Grams Dimensions 7.62 cm outside diameter x 8.89 cm deep Typical Output (+/- 1 V peak input) 120 dB SPL from 1 kHz to 40 kHz THD <= 1% from 1kHz to 40 kHz Closed-field Frequency Response CF1 measurements typical for approx 0.1cc pvc tube coupler using +/- 1V input. System 3 Manual Transducers and Amplifiers 16-11 EC1/ES1 Electrostatic Speaker Overview TDT Electrostatic Speakers (Patent No. US 6,842,964 B1) are designed specifically for ultrasonic signal production. The electrostatic design offers a thin, flexible membrane with an extremely low moving mass. Unlike conventional speakers, these speakers distribute the driving signal homogeneously over the surface of the membrane. These factors produce a small, lightweight speaker with an excellent ultrasonic response and very low distortion. Available with or without a coupler, both models are easy to position and are particularly well suited for studies with small animals that have hearing in the ultrasonic range. Part Numbers (Patent No. US 6,842,964 B1): ES1 - Free Field Electrostatic Speaker EC1 - Electrostatic Speaker—Coupler Model Cable Connection The ES1 and EC1 electrostatic speakers work exclusively with the ED1 Electrostatic Speaker Driver. Input is via a 4-pin, mini-DIN connector, which carries both bias and signal voltages from the speaker driver. Connection to the speaker driver is through a standard 20' long cable. Other cable lengths can be special ordered, but will affect the speaker’s frequency response. The speakers come fully enclosed to eliminate access to the high-voltage bias and driving signals. A 1/8" mounting hole at the base of the speaker accepts a standard 4-40 standoff. See the ED1 Electrostatic Speaker Driver, page 16-16 for information about gain settings. The orientation of the cable connection is indicated with dots on the cable connector and on the speaker. The cable should be connected so that the dot on the cable faces towards the speaker. When connecting the cable, ensure that the four pin connectors are fully seated on the speaker and the speaker driver. When the cable is repeatedly moved during the experiment, periodically check that the connectors are fully seated. System 3 Manual 16-12 Transducers and Amplifiers EC1 Coupled Electrostatic Speaker The EC1 includes a small piece of Tygon® tubing coupled to the output. The tubing will transfer the signal best when it is kept straight. Note that the speaker performance is dependent on the coupling system used and the ear of the animal. Users should test the device under experimental conditions to ensure it meets their requirements. Technical Specifications measured under specific controlled conditions are provided for comparison purposes. Maximizing the Life of the Speakers The TDT electrostatic speakers are designed to operate with input signals between 4 and 110 kHz. Playing signals below 4 kHz causes a large amount of harmonic distortion that degrades the operation of the speakers over time, causing a decreased power output across all frequencies. Broadband Signals When using broadband signals, limit the amount of energy in the low frequency ranges whenever possible. For example, band limiting noise stimuli with a high pass filter at 4 kHz or above (the higher the better for the life of the speakers) and limiting complex harmonic signals, such as frequency sweeps, to frequencies above 4 kHz can increase the effective life of the speakers. Click Stimuli ABR experiments in both human and mouse studies typically use a 100 microsecond click stimuli, which has most of its energy in the 2 kHz to 8 kHz range. Because click stimuli are short impulses that generate signals across a broad frequency range, band limiting the frequencies is not feasible. TDT recommends that users attenuate the click stimuli so as to minimize the potential effects on the speaker. Also note that the shorter the stimuli the flatter the frequency response and the greater the energy in the higher frequencies. Moreover, the shorter the duration of the click the less total energy it has (for a given voltage). Routine Care and Maintenance Inspect speakers for visual damage or obstruction of the speaker holes prior to use. If there is damage to the copper shield around the components next to the connector or debris clogging the speaker holes, contact TDT for an RMA for repair. Caution!: NEVER attempt to clean the holes in the baseplate of the speaker. Doing so can puncture the speaker membrane. When using the EC1, check the end of the Tygon® tubing for cerumen and other debris and clean as necessary. System 3 Manual Transducers and Amplifiers 16-13 Technical Specifications ES1 Technical Specifications Frequency Response +/- 11 dB from 4 kHz to 110 kHz Weight 22 Grams Dimensions 3.8 cm outside diameter x 2.6 cm deep Typical Output (10V peak 95 dB SPL at 10 cm, 5kHz signal input) THD <3%, 2 kHz - 110 kHz, 4 Vp input Free-field Frequency Response of Four Speakers at 10 cm System 3 Manual 16-14 Transducers and Amplifiers Harmonic Distortion at 4 V Peak Noise as well as harmonic distortion is measured. Lower signal levels (e.g. above 75 kHz shown above) have higher THD+noise because of lower signal to noise ratios. When measured at higher signal levels, the THD above 75 kHz is actually <3% up to 110 kHz. EC1 Technical Specifications Frequency Response +/- 9 dB from 4 kHz to 110 kHz Weight 22 Grams Dimensions 3.8 cm outside diameter x 2.6 cm deep Typical Output 90 dB SPL, 5kHz signal* Every experimental setup is unique. It is important to calibrate the response of the speaker in each experimental setup. THD Every experimental setup is unique. It is important to calibrate the response of the speaker in each experimental setup. Frequency Response in Plexiglas Coupler *Measurements were made in a 1 cm x 0.5 cm coupler with a 20 cm length of 3/32" i.e. tubing attached to the fitting of the EC1. 4 V peak input tones were tested and frequency response was measured with a calibrated pressure microphone. The results of the calibration will vary depending on the type of ear to which the speaker is coupled and the length of the tube that is coupled to the ear. This curve is provided as representative of the type of response that may be obtained in a closed field. System 3 Manual Transducers and Amplifiers 16-15 In this case, the low end of the response (< 5 kHz) is enhanced over the free-field response while the high end of the response (> 80 kHz) is attenuated. Every experimental setup is unique. It is important to calibrate the response of the speaker in each experimental setup. Important Note!: Modifying the EC1 or ES1 can result in unexpected changes in the transfer function. All modifications to the EC1 or ES1 should be performed by TDT. If you need to be 3060 dB lower than specifications, or if you have one of these devices, contact TDT for assistance. System 3 Manual 16-16 Transducers and Amplifiers ED1 Electrostatic Speaker Driver Overview The ED1 is a broadband electrostatic driver that produces incredibly flat frequency responses reaching far into the ultrasonic range. The ED1 is designed especially for TDT's ES series electrostatic speakers. The ED1 Electrostatic speaker driver can drive two ES series speakers and is powered off the zBUS. The ED1 is a TDT System 3 device, and receives power from the zBUS. It's two input BNCs accept input signals up to 10 Vpeak. The front panel gain control can be used to the control overall signal level of both channels from 0 to -27 dB in 3 dB steps. ED1 output is via two 4-pin, miniDIN connectors, which carry both bias and signal voltages. The ED1 is designed to work exclusively with TDT ES series electrostatic speakers. While the ED1 will accept a 10V input, it is possible to overdrive and ES1 when the ED1 is on the maximum gain setting. Always check that the output signal is not distorted. If the signal is distorted, turn down the gain on the ED1 until the distortion disappears. The SigCalRP software that is distributed with SigGenRP is useful for measuring the frequency response of the ES1 and to measure the Total Harmonic Distortion (THD) of the speaker. SigCalRP also generates normalization curves that can be used to flatten the frequency response of the ES1. Power The ED1 Electrostatic Speaker Driver is powered via the System 3 zBus (ZB1PS). No PC interface is required. ED1 Technical Specifications Input Signal Range +/- 10 V peak into ED1 Gain 0 dB to -27 dB on both channels, in 3 dB steps Input Impedance 10 kOhm Output Impedance 1 kOhm Note: For further information, see ES series speaker specifications, page 16-13. System 3 Manual Transducers and Amplifiers 16-17 ED1 Pinouts System 3 Manual 16-18 Transducers and Amplifiers FLYSYS FlashLamp System Overview The Flashlamp System includes a high intensity photic stimulator, lamp driver, and liquid light guide optic. Ideal for standard ERG, Visual Evoked Potential, and Visual Neurophysiology applications, the system features rapid flash rates, variable intensity control, high output, and a spectral range from UV to near infrared. The modular design and supplied 9' cable allows for precise positioning of the Flashlamp (LS1130) and the 1 meter liquid light guide optic (FO1) offers additional positioning and focusing abilities. Power The Flash Lamp Driver (FD1) provides power for the flashlamp and can control flashlamps that use their own power supply. The FD1 Flashlamp Driver is powered via the System 3 zBus (ZB1PS). No PC interface is required for FD1 operation. System Set-Up The LS1130 output intensity and rate of stimulation are controlled via the FD1, which receives a variable voltage reference and trigger input from one of the System 3 processors. The diagram below shows how the system would be connected when using an RP2.1 module for control. System 3 Manual Transducers and Amplifiers 16-19 System Features Vref Input Signal The variable reference voltage controls flashlamp output intensity and can be supplied by any System 3 device with a DC level positive, such as the RP2.1 or RX processors (the RA16BA cannot be used), and must be set high for 10 mSec before the stimulus trigger. Trig Input Signal A TTL trigger controls stimulation rate and is typically supplied by a digital output line from one of the System 3 processors, such as the RP2.1 or RX6. Alternatively, the trigger line can be provided by an external source TTL source with a maxium voltage of 5 V and 1 mSec duration. Flash Switch This manual switch can be used to trigger the flashlamp. To trigger the lamp, push the switch up and then press down. Flash Driver Output (LS1130 or MVS7000) The Flashdrive LS1130 output will drive the standard LS1130 flashlamp that ships with the FLSYS. The MVS7000 output can be used to control other flashlamps. Important note: contact TDT for assistance before using any other flashlamps with the FD1. Flash Intensity To calculate the flash intensity, use the following equation: J=1/2(0.50 µF) (Vref*100)^2 FLYSYS Technical Specifications Includes FD1 Flash Lamp Driver, LS1130 Flashlamp, and FO1 Liquid Light Guide. Flash Rate 0.1 - 200 Hz Flash Duration 10 µsec Trigger TTL (5V max) Flash Intensity (max) 0.235 Joules Charge Time 30 msec Spectrum 350 – 800 nm Input Signal (Vref) 4 – 10 V Life 109 flashes Power and Communication zBus required for FD1 System 3 Manual 16-20 Transducers and Amplifiers LS1130 and MVS7000 Connector Pinout Note: connectors are wired the same. System 3 Manual Transducers and Amplifiers 16-21 HB7 Headphone Buffer Overview The HB7 headphone buffer is used to amplify signals for headphones. The HB7 is a two channel device. The outputs include both a stereo headphone jack and Left and Right BNC connectors. The output level can be controlled with a Gain knob, and there is a Differential switch that allows the LEFT input to be output to the Left and Right outputs resulting in an additional 6 dB of gain. Power The HB7 Headphone Buffer is powered via the System 3 zBus (ZB1PS). No PC interface is required. Features Inputs The HB7 has two inputs for signals up to ±10 V, accessed through front panel BNC connectors labeled LEFT and RIGHT. Outputs The outputs include both a stereo headphone jack labeled PHONES and Left and Right BNC connectors. Note: When monitoring both output channels with only one input connected, users should short the unused input channel to ensure maximum channel separation. Gain A single GAIN knob provides control over the signal output level in 3 dB steps from 0 to -27 dB. DC/AC Switch The DC/AC switch can be used to switch from DC coupling to AC coupling mode. In AC coupling mode, DC shifts in the signals are removed. DIFF Switch The DIFF switch will switch to a differential output mode that gives 6 dB of additional gain when connected to a speaker. When DIFF is switched on (the switch in the up position), the left channel input goes to both the left and right channels and is inverted on the right channel (the right input BNC is not used). The differential output will usually only be used with speakers, not headphones. System 3 Manual 16-22 Transducers and Amplifiers To connect the speaker, connect the left output to one pole of the speaker and the right output to the other pole of the speaker (neither ground of the left nor right output will be connected). HB7 Technical Specifications Input Signal Range ±10 V peak Power Output 0.12 W into 4 Ohms, 0.25 W into 8 Ohms, 1.0 W into 32 Ohms Spectral Variation <0.1 dB from 10 Hz to 200 kHz Signal/Noise 117 dB (20 Hz to 80 kHz) Noise Floor 9.2 V rms THD <0.0002% (1 kHz tone, +/- 7V peak) Input Impedance 10 kOhm Output Impedance 5 Ohm System 3 Manual Transducers and Amplifiers 16-23 System 3 Manual 16-24 Transducers and Amplifiers MA3: Microphone Amplifier Overview The MA3 is a two-channel microphone amplifier for auditory scientists. This high-quality lowcost system is designed for use with both ¼” audio jack microphones and balanced XLR inputs for optimum impedance and noise characteristics. The MA3 is able provide a bias voltage for microphones that require it. Two BNC connectors provide analog output. A variable gain knob provides amplification from 10 dB to 55 dB in 5 dB steps. A toggle switch provides 20 dB of additional gain for over five thousand fold amplification. Power The MA3 Microphone Amplifier is powered via the System 3 zBus (ZB1PS). No PC interface is required. Features Inputs The MA3 comes with three inputs: an XLR microphone input and two ¼” TRS connector inputs. Signals from two microphones can be amplified simultaneously. Bias The Bias switch produces a bias voltage for microphones that require it. Gain Control The gain control amplifies the microphone input in 5 dB steps from 10-55 dB (3x-560x). The Gain Switch adds an additional 20 dB (10x) of gain for a maximum amplification of 5600. Outputs Two BNC outputs give easy connection to any TDT System 3 device. The maximum voltage output is +/- 10 Volts. Clip lights indicate and overvoltage on the signal output. System 3 Manual Transducers and Amplifiers 16-25 MA3 Technical Specifications Input Signal Range +/- 10 V peak -3dB Bandwidth 200 kHz @ 40 dB gain Gain Accuracy +/- 1 dB Spectral Variation 1 dB from 20 Hz to 20 kHz Signal/Noise 110 dB (20 Hz to 30 kHz at 9.9 V) Noise Floor 9.2 V rms THD < 0.002% (1 kHz tone, +/- 7 V peak) Input Impedance 600 Ohm Output Signal Range +/- 10 V peak Bias Voltage 10 V, 150 mA max, superimposed onto microphone Output Impedance 5 Ohm Output Diagram System 3 Manual 16-26 Transducers and Amplifiers Frequency Response Diagram System 3 Manual Transducers and Amplifiers 16-27 MS2 Monitor Speaker Overview The MS2 Monitor Speaker is used as an audio monitor for signals up to ± 10 V. The MS2 output level is controlled manually using a 1-turn potentiometer on the front panel interface. Maximum output is greater than 90 dB SPL at 10 cm. The frequency response ranges from 300Hz to 20 kHz. A typical use of the MS2 is for audio monitoring of electrophysiological potentials. Power The MS2 Monitor Speaker is powered via the System 3 zBus (ZB1PS). No PC interface is required. Features Manual control is via a single LEVEL knob, which provides control over the signal output level. The MS2 has one input channel for signals up to ±10 V, accessed through a front panel BNC connector The MS2 is useful for monitoring the output signal that may be going to headphones in a soundproof room and for monitoring physiological signals that are being acquired, such as neurophysiology recordings. MS2 Technical Specifications Input Signal Range ±10V peak Max Output > 90 dB SPL at 10 cm Input Impedance 10 kOhms System 3 Manual 16-28 Transducers and Amplifiers SA1 Stereo Amplifier Overview The SA1 is a power amplifier for the zBus that delivers up to 3 watts of power to speakers. It has excellent channel separation combined with low noise and distortion. The frequency response is flat from 50 hertz to 200 kilohertz. Gain can be varied over a 27 dB range in 3 dB increments. Power The SA1 Stereo Amplifier is powered via the System 3 zBus (ZB1PS). No PC interface is required. Features Inputs There are two inputs (±10 V maximum) that connect through BNC's labeled IN-1 and IN-2. Outputs The outputs are two (OUT-1 and OUT-2) BNC connectors. Gain A single GAIN knob provides control over the signal output level in 3 dB steps from 0 to -27 dB. Ganged Output Mode A ganged output mode gives 6 dB of additional gain when connected to a speaker. Split the signal to the input; send one to the IN-1 and the other to IN-2. Take the outputs from OUT-1 and OUT-2 and combine them to boost the gain. System 3 Manual Transducers and Amplifiers 16-29 SA1 Technical Specifications Input Signal Range ±10V peak Power Output 1.5 W/channel into 8 ohms, 6.0 W with Ganged output. Spectral Variation < 0.1 dB from 50 Hz to 200 kHz Signal/Noise 116 dB (20 Hz to 80 kHz) THD < 0.02% at 1 Watt from 50 Hz to 100kHz Noise Floor 10.5 V rms Input Impedance 10 kOhm Output Impedance 2 ohms, 1 ohm Ganged System 3 Manual 16-30 Transducers and Amplifiers SA8 Eight Channel Power Amplifier Overview The SA8 is an eight-channel power amplifier that delivers up to 1.5 watts of power per speaker to up to eight speakers. The unit features high channel separation with low cross talk combined with low noise and distortion. The gain for all eight channels can be set to 0, -6, -10 or –13 dB. Power The SA8 Power Amp is powered via the System 3 zBus (ZB1PS). No PC interface is required. Features Inputs There are eight available inputs located on the DB9 connector on the front panel of the SA8. Outputs The eight output channels are accessible via the DB25 connector and are arranged for optional direct connection to a PP16 Patch Panel. For easy wiring and connection to a wide variety of transducers, the eight outputs are duplicated on the DB25 and sufficient ground pins are provided to allow for connections requiring a single ground for all channels or paired grounds for each channel. See Mapping SA8 Output to PP16 Connectors, page 16-31 for more information on easy access to SA8 output channels via the patch panel. Gain The gain is controlled by two toggle switches on the front panel of the SA8. The following table describes the selectable gain values. Front Panel Diagram System 3 Manual Left Toggle Right Toggle dB Gain Up Up 0 Up Down -6 Down Up -10 Down Down -13 Transducers and Amplifiers 16-31 Mapping SA8 Output to PP16 Connectors The picture below maps the SA8 signal out connection to the PP16. SA8 Eight Channel Power Amplifier Inputs 0 dB -6 dB -10 dB -13 dB Gain Power Outputs Connector labeled RA16 PP16 A1 A2 A3 A4 A5 A6 A7 A8 Out-1 through Out-8 B1 B2 B3 B4 B5 B6 B7 B8 C1 C2 GND GND … Out-1 Out-2 … C3 C4 C5 C6 C7 C8 … GND GND … Out-7 Out-8 SA8 Technical Specifications Input Signal Range ±10V peak Power Output 1.5 W/channel into 8 ohms Spectral Variation < 0.1 dB from 50 Hz to 200 kHz Signal/Noise 116 dB (20 Hz to 80 kHz) THD < 0.02% at 1 Watt from 50 Hz to 100kHz Noise Floor 10.5 V rms Input Impedance 10 kOhm Output Impedance 2 ohms Cross Talk < -60 dB System 3 Manual 16-32 Transducers and Amplifiers Analog Input Pinout Diagram Pin Name Description Pin Name Description 1 A1 Analog Input Channels 6 A2 Analog Input Channels 2 A3 7 A4 3 A5 8 A6 4 A7 9 A8 5 GND Ground Analog Output Pinout Diagram Pin Name Description 1 A1 Analog Output Channels Group 1 Pin Name Description 14 A2 15 A4 2 A3 3 A5 16 A6 4 A7 17 A8 5 GND 18 A1 6 19 A2 7 20 A3 8 21 A4 9 22 A5 10 23 A6 11 24 A7 12 25 A8 13 System 3 Manual GND Analog Output Channels Group 1 Analog Output Channels Group 2 Part 17 Subject Interfaces System 3 Manual 17-2 Subject Interfaces ~ System 3 Manual Subject Interfaces 17-3 BBOX Button Box Overview The button box is a complete subject response interface. It is an excellent system for psychoacoustics, including n-alternative forced choice, GO NO GO, Bekesy style presentation, and modified method of limits experiments. The button box provides accurate reliable performance. All inputs are debounced in the button box and a built-in rechargeable lithium-ion battery provides power for up to 24 hours of continuous use per charge. The standard button box configuration includes six buttons and six high intensity LEDs. However, the button and LED organization can be configured to user specification. The button box can have up to eight buttons and 32 LEDs. The button box design allows experimenters a great deal of flexibility to control feedback based on subject response, reinforcing behavior for correct and incorrect choices. The button box can be controlled from an RP2.1 or RV8 processor with button response acquisition and LED control through the digital input/output port of these modules. Data can be latched and then read from specialized RPvdsEx circuits using ActiveX and Matlab, or other programming languages. RPvdsEx circuits designed for button box control can be used with all TDT software. Connecting the Button Box to the RP2.1 or RV8 The button box is controlled using the RP2.1 or RV8 processor. The button box connects from the DB25 connector (Control) directly to the digital input/output port on the RP2.1 or RV8 with the supplied ribbon cable. The button box is configured at the factory for the RP2.1. It can be configured for the RV8 by installing a jumper pin (Jumper for RV8) on the back of the button box. System 3 Manual 17-4 Subject Interfaces RP2.1 Enhanced Real-Time Processor Digital I/O Zbus for System 3 Bit... In- 1 In- 2 Out- 1 Out- 2 Control 9 VDC On Off RP2.1 to BBOX Power Requirements The button box is supplied with a 3.3 Volt lithium-ion battery pack. This high current battery should provide up to 24 hours of continuous use per charge. The lithium-ion battery charges in under three hours with the supplied 9 Volt battery charger. The ON/OFF switch, the power connection for the battery charger, and a power indicator light are found on the back of the button box. The Power/(Low Bat) LED lights when the button box is on and flashes if the battery is low. Important: To operate any features of the button box the power must be turned on and the device must be connected to an RP2.1 or RV8 that is powered on and connected to a PC. Caution!: A low battery may give erroneous results. If the battery is low, the battery charger can be connected to the device. This will charge the battery and power the box at the same time. Organization of Buttons and LED's BBox Control LEDs can be controlled and button presses can be acquired by including the necessary circuit segments in the RPvdsEx circuit that will be run on the controlling device. The button box can also be controlled using ActiveX and Matlab, or any programming language that supports ActiveX. Before designing or debugging circuits for the button box, ensure that the button box is connected to the RP2.1 or RV8 that will be used for control and that the button box power is turned on. The buttons will only operate when the button box is powered. System 3 Manual Subject Interfaces 17-5 The remaining button box help topics provide the necessary information for basic button box control, including circuits that acquire button responses and test for correct or incorrect responses to button presses. The information provided assumes some knowledge of RPvdsEx and possibly ActiveX. Users with custom built button boxes should modify circuits based on the configuration of the buttons. Acquiring BBox Button Presses The most efficient way to acquire button presses is with the WordIn component in RPvdsEx. The WordIn checks all the digital input lines and returns a 16-bit value from the digital line addressed. Input values are generated as a bit-mask that determines which buttons were pressed. Users can also record the inputs from the individual digital I/O lines. The RPvdsEx examples in this topic use the WordIn method. BBox Organization of Buttons Note: In order for the buttons to operate the button box power supply must be turned on. Many of the circuits shown below, as well as some MATLAB examples for use with ActiveX controls, are included with RPvdsEx (RPvdsEX|Examples|ButtonBox). 10110100 A simple circuit for acquiring button presses... [1:1,0] M=-1 W WordIn produces an integer value based on the buttons pressed A parameter tag allows the user to read the value from the button box Button Press ParWatch A parameter watch allows the user to see the bit value from the WordIn In this example, the user would continuously poll the component, from a program that acquired the value from the ButtonPress parameter, to determine which buttons are pressed. A simple circuit like this may be required if the RP2 that controls the button box is also used for stimulus presentation. System 3 Manual 17-6 Subject Interfaces A more likely circuit design for button acquisition... A Latch stores the value of the Button press (triggered by the iCompare) 10110100 WordIn produces an Integer value based on the buttons pressed [1:1,0] A Parameter tag allows user to read the value from the button box [1:5,0] Button_Press Latch M=-1 W Trg=0 [1:2,0] iCompare K=0 Test=EQ When a button press occurs, iCompare generates a logical high that triggers the Latch component In this example, the WordIn produces an integer value based on the buttons pressed. When a button press occurs, an iCompare generates a logical high that triggers the Latch component. The Latch stores the value of the button press until the next button press occurs. The Button_Press parameter tag allows the user to read the value from the button box. If only the first button press is important then a reset line should be included in the circuit to rest the Latch. Resetting the Latch... 10110100 A WordIn produces an Integer value based on the buttons pressed A Latch stores the value of the Button press (triggered by the iCompare) [1:9,0] [1:1,0] Latch M=-1 W [1:6,0] Set=0 Rst=0 K=0 Test=NE When a Button press occurs iCompare generates a Logical high that sets the RSFlipFlop high [1:4,0] Src=Soft1 Button_Press Trg=0 RSFlipFlop [1:2,0] iCompare A Parameter tag allows user to read the value from the button box When the Set line on the RSFlipFlop goes high then the Latch is Triggered. The Rst line sets the RSFlipFLop low [1:10,0] Int2Float 2 SF=1 A Parameter watch allows user to see the Bit-value from the WordIn A SoftTrg Resets the RSFlipFlop to zero to acquire the next button press In the previous examples all button presses are acquired, that is, if a person presses buttons simultaneously there is the chance that both responses will be obtained. This will happen infrequently with circuits that use an iCompare and Latch, but it is still possible. In some cases the user will want to determine if the proper button press was acquired or wait until a particular button press has happened. Additional circuitry can be added that checks for this. System 3 Manual Subject Interfaces 17-7 10110100 Identifying the correct button press... [1:1,0] [1:10,0] Latch M=-1 W Correct Trg=0 [1:2,0] iCompare K=0 Test=NE [1:6,0] [1:7,0] RSFlipFlop EdgeDetect Set=0 Rst=0 [1:4,0] Src=Soft1 Correct Edge=Rising [1:11,0] [1:12,0] Int2Float Log2 Button_Press SF=1 [1:14,0] Correct CorrectBtn iCompare K=4 Test=EQ [1:15,0] EdgeDetect Edge=Rising [1:16,0] Schmitt [1:17,0] M=1 Bi Thi=100 Tlo=10 iCompare is only triggered when ther correct button is pressed. EdgeDetect then sets the Schmitt trigger, which turns on an LED for 100 milliseconds In this example, the top part of the circuit detects if a button is pressed. The button press value is also translated into a value representing which bit was read. For example, if the bit in bitmask value is 16, then Log2 converts the value to 4. This lets the user determine, via the Button_Press parameter tag, that bit 4 was high. The lower part of the circuit tests to determine if the correct button was pressed. If so, an LED is flashed. A parameter tag is used to identify the correct button press. The iCompare is only triggered when the correct button is pressed. The EdgeDetect component then sets the Schmitt that turns on the first LED for 100 milliseconds. Button box circuits can be incorporated in to all TDT System 3 software. For information on using the button box with other applications please see that application's documentation. If you have questions about how to design your own applications for the button box call 386-462-9622 for technical assistance. Controlling the LEDs This topic demonstrates several methods to control LEDs. The button box may have up to four LEDs for each button and each LED can be turned on and off independently of any other. Using the LEDs involves two steps: 1) designating the LED to turn on or off and 2) turning the LED on and off. LEDs are designated by specifying the column (button number) and position (LED number). System 3 Manual 17-8 Subject Interfaces BBox Organization of LEDs and Buttons Selecting an LED Bits 0, 1: Control the position within a column Bits 2, 3, 4: Control which column is selected Turning on/off LEDs Bit 5: Turns on selected LED Bit 6: Turns off selected LED Bit 7: Turns off all LEDs Bit Patterns Table Note: Because the button box has its own power supply, the LED's will remain on until they are turned off via the RP2 or RV8 or until the power is turned off. The circuits shown below, as well as some MATLAB examples for use with ActiveX controls, are included with RPvdsEx (RPvdsEX|Examples|ButtonBox). In the first design the user designates the LED and the button number or column position in two separate steps. In the second the steps are combined. In the final design LED designation and on/off information are combined in a single word. Designating the LED and button number or column position in two separate steps... In the example above there are two sets of inputs used to specify the LED. The first controls which LED (LED position within a grouping) is lit while the second controls the column (button location) in which the LED is located. DataTables are used to test and run the circuit within RPvdsEx and parameter tags (LED_POS and LED_COL) are included to allow users to control the position and column values from another application. System 3 Manual Subject Interfaces 17-9 ToBits converts the output from integer to a bit-value that sets the dOuts for color Data Table has values (0,1,2,3) [1:1,0] Color [1:3,0] [1:2,0] ConstI ToBits K=0 b0 b1 b2 b3 b4 b5 Rst=0 =0 LED_POS M=1 Bi [1:5,0] M=2 Bi ToBits converts the output from integer to a bit-value that sets the digital outs for the column Data Table has values (0,1,2,3,4,5,6,7) [1:8,0] Column Sends the output to the following Digital Out lines Sends the output to the following Digital Out lines [1:10,0] [1:9,0] ConstI ToBits K=0 Rst=0 =0 b0 b1 b2 b3 b4 b5 M=4 Bi [1:12,0] M=8 Bi [1:14,0] LED_COL M=16 Bi Turns on LED [1:15,0] Src=zBusA Turns off LED [1:16,0] M=32 Bi Turns off all LEDs [1:18,0] [1:17,0] Src=zBusB M=64 Bi [1:7,0] [1:6,0] Src=Soft2 M=128 Bi To follow along with this example, open the LED1 RPvdsEx file in the ButtonBox example folder (TDT|RPvdsEX|Examples|ButtonBox). To set the color or position of the LED (0 = Top, 1 = Left, 2 = Right, 3 = Bottom), click the green up and down arrows on the DataTable labeled Color. To determine which column the LED is in (0 = Far Left ... 7 = Far Right), click the green up and down arrows on the DataTable marked Column. To turn on the LED, press the zBusA trigger button in RPvdsEx. Make sure to click the pulse button for the zTrig. To turn off the LED press the zBusB trigger. You can select (one at a time) several lights to turn on and off. For example, to light the top LED in the first column and the bottom LED in the last column perform the following steps: Set the Color DataTable to 0 and the Column DataTable to 0. Turn on the LED by clicking the zBusA trigger button in RPvdsEx. This will turn on the top LED in the first column. Set the Color DataTable to 3 and the Column DataTable to 7. Click the zBusB trigger button in RPvdsEx. Both LED's should now be on. To turn off the latter LED, click the zBusB trigger button. To turn off all LEDs, click the Soft2 button in RPvdsEx. To turn on all LED's in succession, set the zBusA trigger line high the DataTable values. To reverse the operation set the zBusA trigger low cycle through the DataTable values. and then cycle through , set the zBusB trigger high , then System 3 Manual 17-10 Subject Interfaces Combining the position and column setup... The following example combines the two data tables and uses one ToBits component to control the button box's LEDs. [1:3,0] M=1 Bi Determine which LED is lit within the diamond pattern 0 lights the top 1 lights the left 2 lights the right [1:1,0] [1:2,0] 3 lights the bottom ConstI ToBits b0 b1 K=0 Color_Pos b2 Rst=0 [1:5,0] Color of LED M=2 Bi [1:7,0] M=4 Bi b3 b4 b5 [1:9,0] M=8 Bi DataTable Position of LED [1:11,0] M=16 Bi The DataTable contains values that represent both the column and position =0 Turns on the specified LED Turns off the specified LED [1:15,0] [1:17,0] [1:14,0] Src=zBusA M=32 Bi [1:16,0] Src=zBusB Turns off all LEDs [1:12,0] Src=Soft2 M=64 Bi [1:13,0] M=128 Bi The single data table used in this example contains values that combine the column and position. For example: If 28 is used in the data table, the circuit selects the top LED in the seventh column. That's because the top position in the seventh column is represented by the digital number 11100 (as shown below), which equals 28. Column Select Lines LED Position Select Lines D4 D3 D2 D1 D0 1 1 1 0 0 To learn more about this example, open the LED2 RPvdsEx file in the ButtonBox example folder (TDT|RPvdsEX|Examples|ButtonBox). Using a WordOut with a DataTable/ParTag for on/off actions... The following example uses the WordOut component similarly to the way the WordIn is used in the button press example. As before, a DataTable is used to determine which LED to light. In the LED POS DataTable, values 0 - 31 are used to determine the position of the LED. In addition, another DataTable is used to set whether the LED is turned ON or OFF, all LED's are turned OFF, or if nothing is done when the LED is selected. This value gets added to the LED position value and is sent out via the WordOut component. The values for the second DataTable are 0 = 0 (nothing done), 1 = 32 (LED ON), 2 = 64 (LED OFF), and 3 = 128 (all LEDs OFF). The cycle usage for this example is half the cycle usage for the one above it. Notice that there are no BitOut components used. The WordOut and BitOut components cannot be used in the same circuit. System 3 Manual Subject Interfaces 17-11 Values 0-31 contained in the table determine the position of the LED ConstI K=0 [1:5,0] iScaleAdd [1:6,0] M=-1 W SF=1 Shft=0 10110100 [1:4,0] LED POS iScaleAdd adds the ON OFF DataTable value to the LED position value to turn the LED on or off WordOut cannot be used with BitOut =0 LED_POS Values in the ON OFF DataTable are 5, 6, and 7; the output of iBitShift will be 32, 64, and 128 respectively for these values Adding 64 (1000000) is equivalent to inserting a 1 in the D6 position, which turns off the LED selected in the first five bits [1:1,0] ConstI K=1 [1:2,0] ON OFF Adding 32 (100000) is equivalent to inserting a 1 in the D5 position, which turns on the LED selected in the first five bits iBitShift N=-1 Adding 128 (10000000) is equivalent to inserting a 1 in the D7 position, which turns off all LEDs =3 ON OFF Note: See the Bit Pattern Table for a review of how each bit position is used. This example is found in the LED3 RPvdsEx file in the ButtonBox example folder (TDT|RPvdsEX|Examples|ButtonBox). System 3 Manual 17-12 Subject Interfaces RBOX Response Box The RBOX has four buttons for user response, and four LEDs that can be used to provide subjects with feedback. This small and lightweight response box is an affordable solution to collecting simple subject response data. The RBOX has three models: RBOX is used with the RP2.1 processor, RBOX4 with the RM-series processors, and RBOX_RX6 with the RX-series processors. Part numbers: RBOX – Response Box for RP2.1 RBOX4 – Response Box for PI2, RM1, or RM2 RBOX_RX6 – Custom Response Boxes Connecting the RBOX to the RP2.1 The standard RBOX connects via the DB25 connector directly to the digital input/output port on the RP2.1 with the supplied cable. Connecting the RBOX4 to the RM1 or RM2 The RBOX4 connects via the DB9 connector directly to the digital input/output port on the back panel of the RM1 or RM2 with the supplied cable. See Configuring an RM Processor for the RBOX4, page 17-13 for set-up information. Connecting the RBOX_MISC to an RX-series processor An RBOX can be requested for use with RX devices and will connect via the DB25 connector directly to the digital input/output port on an RX-series processor with the supplied cable. See Configuring an RX Processor for the RBOX, below, for set-up information. Buttons and LEDs The buttons and LEDs are numbered as follows. Contact TDT for assistance with custom button or LED configurations. Note that the logic on the inputs to the RP/RM/RX processors is reversed logic. Therefore, when polling the lines to determine if a button has been pressed, a logic high or ‘1’ means that no button is pressed and a logic low or ‘0’ indicates a button press. System 3 Manual Subject Interfaces 17-13 Software Support The response box can be used directly with PsychRP, SykoFizX or custom designed software. More information on RBOX operation can be found in PsychRP Help. Configuring an RM Processor for the RBOX4 The RBOX4 uses the ground connection (pin 1) and the 8 bits of digital I/O on an RM-series processor Digital I/O port. Bits 0 through 3 are used as button inputs and Bits 4 through 7 are used as LED outputs. To use the response box with an RM processor, configure the bits in the RPvdsEx configuration register as follows: Click the Device Setup command on the Implement menu. In the Set Hardware Parameters dialog box, click the Type drop-down box and select either the RM1 or RM2 from the list. The dialog expands to display the Edit Bit Dir Control dialog box. Click Modify to display the Edit Bit Dir Control dialog box. In this dialog box, a series of check boxes are used to create a bitmask that is used to program all bits. To enable the check boxes, delete Und from the Decimal Value box and enter 240. This configures Bits 4 through 7 as outputs. When the configuration is complete, click OK to return to the Set Hardware Parameters dialog box. Configuring an RX Processor for the RBOX_RX6 The RBOX_RX6 uses the ground connection (pin 5) and the 8-bits of bit-addressable digital I/O on an RX-series processor Digital I/O port. Bits 0 through 3 are used as button inputs and Bits 4 through 7 are used as LED outputs. To use the response box with an RX processor, configure the bits in the RPvdsEx configuration register as follows: Click the Device Setup command on the Implement menu. In the Set Hardware Parameters dialog box, click the Device Type box and select any RX device from the list. System 3 Manual 17-14 Subject Interfaces The dialog expands to display the Device Configuration Register. Click Modify to display the Edit I/O Setup Control dialog box. In this dialog box, a series of check boxes are used to create a bitmask that is used to program all bits. To enable the check boxes, delete Und from the Decimal Value box and enter 240. This configures Bits 4 through 7 as outputs. When the configuration is complete, click OK to return to the Set Hardware Parameters dialog box. RBOX Technical Specifications Response Box for RP2.1 Buttons 4 LEDs 4 Connection 25-pin Cable Length 6' System 3 Manual Subject Interfaces 17-15 RBOX DB25 Pin Out Pins Name Description Pins Name Description 1 GND Ground 15 B0 Button Bit 0 2 NA Not Used 16 B2 Button Bit 2 3 B1 Button Bit 1 17 NA Not Used 4 B3 Button Bit 3 18 5 NA Not Used 19 L0 LED Bit 0 20 L2 LED Bit 2 NA Not Used 6 7 L1 LED Bit 1 21 8 L3 LED Bit 3 22 9 NA Not Used 23 10 24 11 25 12 13 14 RBOX4 Technical Specifications Response Box for RM1, RM2, or PI2 Buttons 4 LEDs 4 Connection 9-pin Cable Length 6' System 3 Manual 17-16 Subject Interfaces RBOX4 DB9 Connector Pin Out Pin Name Description 1 GND Ground 2 L2 LED Bit 2 3 L0 LED Bit 0 4 B2 Button Bit 2 5 B0 Button Bit 2 6 L3 LED Bit 3 7 L1 LED Bit1 8 B3 Button Bit 3 9 B1 Button Bit 1 System 3 Manual Subject Interfaces 17-17 HTI3 Head Tracker Interface Overview The HTI3 is an interface between your System 3 processor and either the Polhemus FASTRAK® or Ascension Flock of Birds® or miniBIRD® motion trackers and can acquire X, Y, and Z coordinates as well as azimuth, elevation, and roll (AER) data from two receivers/sensors. A boresight signal can be used to zero the AER values to a relative position. This can be accomplished by a manual button press on the front panel of the HTI3 or from an external 3V digital source via the boresight input BNC. Data can be transferred directly to any System 3 processor with a fiber optic input, bypassing the host computer and enabling movement and positional information to be integrated into experiments in real-time without any increase in latency. Positional information from motion trackers can be efficiently stored and synchronized with biological signals such as EMG, EEG and extracellular neurophysiology or used to update a 3D audio signal presentation in real-time. The HTI3 parses the incoming signals from the motion tracker into the following data components: Receiver #: Each HTI3 can handle up to 2 channels of motion tracker receivers. Error code: The HTI3 will generate four channels that encode the decimal error codes from the Fastrack motion tracker. XYZ coordinate space: The HTI3 will generate three channels of coordinate space distance from each receiver in either inches or centimeters based on information from the motion tracker. Azimuth, Elevation and Roll (AER): The HTI generates three channels of AER information for each receiver based on signal information from the motion tracker. NOTE: The XYZ space is absolute distance from the transmitter while the AER information is relative to the boresight point. System 3 Manual 17-18 Subject Interfaces The raw HTI3 output signals must be scaled to achieve the appropriate signal range before the data can be used. Special processing must be implemented in RPvdsEx to perform the necessary scaling and to reduce redundancy in the data. See HTI3 Circuit Design for more information about this processing and techniques for using the data with HRTF filter components. Power and Interface The device is powered via the System 3 zBus (ZB1PS) and requires an interface to the PC. If the HTI3 is housed in one of several ZB1PS caddies in your system, ensure that it is connected in the interface loop according to the installation instructions: Gigabit, Optibit or USB Interface. To Base The HTI3 sends information to the base station over a fiber optic cable. When connecting the HTI3 to a base station, make sure that the fiber optic cable is connected as shown below. Features Reset/Boresight Pressing the Reset/Boresight button momentarily will issue a boresight command to the tracker unit. This signal will zero the AER values respective to the boresight position. Holding the button down for one second will issue a reset command to the tracker unit and undo the boresight command. The AER values will now be returned with respect to the default initial positioning. To Tracker The To Tracker DB9 input connects the motion tracker to the HTI3. Note: When using the FOB or miniBIRD® motion tracker, data will be properly transferred to the interface if only pins 2, 3 and 5 are connected. A special connector is shipped with the HTI3 to make this transition from the RS232 cable to the tracker. This connector also performs the required RS232 gender change. Polhemus/FOB The toggle switch is provided to select between the FT or FOB motion tracker. This switch must be in the correct position on power up of the HTI3 for correct operation. To use the miniBIRD® set to FOB. The miniBIRD® tracker must be set to Normal Addressing Mode and the DIP settings should be configured as below: System 3 Manual Subject Interfaces 17-19 1 2 3 4 5 6 7 8 ON ON ON OFF OFF OFF ON OFF Boresight A boresight command can be issued from an external 3V digital source via the Boresight BNC input. This signal needs to be a logical high (‘1’) pulse of at least 200 ns in length. The signal then needs to be set logic low (‘0’) for at least 200 ns before another boresight command can be issued. Activity Lights Active The Active LED indicates if the HTI3 is connected to a base station via a fiber optic cable. This LED will flash slowly (~1 Hz) if this connection is not properly made. Data The Data LED indicates if the HTI3 is receiving data from the motion tracker unit. This LED will also flash slowly (~1 Hz) if the tracker is not properly connected to the HTI3. CH1 Stat/Ch2 Stat The Ch1 Stat and Ch2 Stat LEDs indicate if the interface is receiving data from receiver 1, receiver 2 or both. The figure below shows the LED pattern for the HTI3 properly connected to a base station and a motion tracker while acquiring data from receiver 1. HTI3 Circuit Design The HTI3 parses incoming signals from a motion tracker into 16 channels of data and sends it to a base station (such as RX5, RX6, or RA16BA) at rates up to 25 kHz. Most motion trackers send data at a slow rate (~120 Hz). This means that there is a large amount of redundancy in the data acquired by the base station. The circuit designs described below will reduce the resulting redundancy and convert the raw HTI3 output signals into useful information such as error codes, distance measures and relative positional information such as Azimuth, Elevation, and Roll. Acquiring and Scaling Motion Tracker Signals Motion tracker signals are acquired via a fiber optic cable connecting the HTI3 to a base station. The most common signals input via the fiber optic port are biological signals amplified using one of the TDT preamplifiers; so all signals input through one of these ports are automatically scaled accordingly. When the fiber optic inputs are used to acquire signals from other devices, such as the HTI3, the signals must be scaled according to the signal characteristics of the specific device. In the case of the HTI interface, the signal from each channel must be scaled by 114.35. This adjusts the signal to a range of +/- 1.0V. Additional scaling is required to convert signals on some input channels to the appropriate units or values. The table below describes the scale factor(s) for each signal input from the HTI3 and for each device. System 3 Manual 17-20 Subject Interfaces Device Receiver Channel Data SF (base) SF (cm) or SF(ASCII) for err SF (in) SF (rad) SF(deg) FT 1 1 Azm 114.35 NA NA 3.14159 180 2 1 FOB 2 Ele NA NA 3.14159 180 3 Roll NA NA 3.14159 180 4 X 300 118.11 NA NA 5 Y 300 118.11 NA NA 6 Z 300 118.11 NA NA 7 Azm NA NA 3.14159 180 8 Ele NA NA 3.14159 180 9 Roll NA NA 3.14159 180 10 X 300 118.11 NA NA 11 Y 300 118.11 NA NA 12 Z 300 118.11 NA NA 13 err 16384.2 14 err 16384.2 15 err 16384.2 16 err 16384.2 NA NA 3.14159 180 1 2 System 3 Manual 1 Azm 114.35 2 Ele NA NA 3.14159 180 3 Roll NA NA 3.14159 180 4 X 91.44 36 NA NA 5 Y 91.44 36 NA NA 6 Z 91.44 36 NA NA 7 Azm NA NA 3.14159 180 8 Ele NA NA 3.14159 180 9 Roll NA NA 3.14159 180 10 X 91.44 36 NA NA 11 Y 91.44 36 NA NA Subject Interfaces 1 17-21 12 Z 13 NA 14 NA 15 NA 16 NA 91.44 36 NA NA Note: The scale factor for the FT error codes converts the values to ASCII codes. These scale factors must be incorporated into any circuit design. The circuit below performs the initial scale factor. The circuit uses the iterate function to efficiently scale all 16 channels. The circuit uses only single processor components and works on all devices. The iterate function duplicates the construct 16 times, with an input signal from channel ‘x’ scaled by 114.35 and then sent to a hop out. Iterate: x =1 to 16 by 1 [1...,2-01...] Ch={x} dc .,1-01...] ScaleAdd chan{x} SF=114.35 Shft=0 The next circuit segment scales each channel based on the table above for the FOB motion tracker. The first three channels in this example scale Azimuth, Elevation, and Roll. If the input to the HTI3 includes two motion tracker channels, then channels 7, 8 and 9 will contain the Azimuth, Elevation, and Roll information for the second motion tracker. To return this information in radians, the scale factor should be changed to 3.14159. Channels 4-6 are scaled to inches. To scale the XYZ coordinate space to centimeters the scale factor would be 91.44. This circuit can be easily modified to use with the FT motion tracker by inserting the appropriate scale factors from the table above. [1:2,0] chan1 ScaleAdd [1:8,0] Azm1_Deg chan4 SF=180 Shft=0 ScaleAdd [1:10,0] Elv 1_Deg chan5 SF=180 Shft=0 chan3 ScaleAdd Y1_in SF=36 Shft=0 [1:6,0] [1:12,0] ScaleAdd ScaleAdd SF=180 Shft=0 X1_in SF=36 Shft=0 [1:4,0] chan2 ScaleAdd Roll1_Deg chan6 SF=36 Shft=0 System 3 Manual Z1_in 17-22 Subject Interfaces Data Storage and Visualization of Signal Input Motion tracker signals are updated/transferred to the HTI3 at rates up to 120Hz. The HTI3 sends signals to the RX/RP device at sample rates up to 25 kHz. This means that each value from the motion tracker may be repeated on the DSP up to 200 times. To minimize the redundancy of the signal, the channel outputs can be decimated by a fixed value. This will decrease the amount of data stored on either the DSP or transferred to a computer. The construct below shows two ways to decimate the signal. One way shows real-time visualization of the signal and the other illustrates storage of the signal to disk. Since the following circuit segments are based on the data transfer rate of the motion tracker itself, users should review the documentation provided with their device before using the parameter values shown. [1:1,0] PulseTrain2 decimate nPer=60 nPulse=-1 Enab=Yes Rst=Run PLate=0 PCount=0 The PulseTrain2 component sends out a pulse every 60 samples. The output from the PulseTrain2 is sent to the Trigger line on a latch. Therefore the output from the latch is updated once every 60 samples. This generates an updated output that more closely matches the data transfer rate of the motion tracker. The output can then be sent to a head related transfer function (HRTF) coefficient generator (see Using the HTI3 with HRTF Filters). decimate [1:9,0] chan1 ScaleAdd SF=180 Shft=0 chan2 Latch [1:12,0] [1:13,0] Latch [1:6,0] ScaleAdd SF=180 Shft=0 Azm1_Deg Trg=0 ScaleAdd SF=180 Shft=0 chan3 [1:10,0] Elv 1_Deg Trg=0 [1:7,0] Latch Roll1_Deg Trg=0 Another way to use the decimated signal would be to send it to a Serial Buffer input. In this case the values are stored once every 60 samples. If you were using this with OpenEx this would be the primary way to save the data set. System 3 Manual Subject Interfaces 17-23 [1:10,0] Azm1_Deg decimate Azimuth SerStore Size=1000 Rst=0 WrEnab=1 Index=0 {>Data} Index [1:14,0] Elv 1_Deg SerStore decimate Size=1000 Rst=0 WrEnab=1 Index=0 {>Data} Elevation [1:6,0] Roll1_Deg SerStore decimate Size=1000 Rst=0 WrEnab=1 Index=0 {>Data} Roll Using the HTI3 with HRTF Filters One great advantage of the HTI3 setup is that users can connect the device to an RX6 Multifunction Processor. With the RX6 system, a virtual 3D audio environment can be generated. The following circuit uses the Azimuth and Elevation information to change the perception of a signal input. Channels 1 and 2 are latched via the PulseTrain2 decimation construct discussed earlier. decimate chan1 [1:8,0] [1:9,0] ScaleAdd Latch SF=180 Shft=0 [1:12,0] chan2 ScaleAdd SF=180 Shft=0 Azm1_Deg Trg=0 [1:13,0] Latch Elv 1_Deg Trg=0 The output of the HTI3 is sent to an HRTF filter that converts the mono input into a stereo output that can be sent to Headphone buffers etc. A random access buffer stores the HRTF filter values. System 3 Manual 17-24 Subject Interfaces cO Ch=1 [1:20,0] Mono_Sig [1:17,0] HrtfCoef CmpNo=24 Az=0 El=0 Azm1_Deg Elv 1_Deg [1:19,0] L HrtfFir Stereo Order=32 MaxITD=100 {>Coef} {>Delay} [1:21,0] R cO Ch=2 [1:23,0] [1:24,0] RamBuf NoName Size=1000 Index=0 Write=0 {>Data} Name=C:\TD N=0 OS=0 About the Sample Circuit The sample circuit HTIFLOCKOFBIRDS.rpx illustrates the scale factors for all incoming channels from the FOB motion tracker. Page 0 shows the initial scaling and the secondary scaling for channels 1-3 (deg) and 4-6 (in). Page 1 shows the scaling of the channels relating to the optional 2nd motion tracker input (channels 7-12). HTI3 Technical Specifications Max update rate 120 Hz Boresight trigger External RS232 acquisition rate 115 kbaud To Tracker - DB9 Pinout for Ascension Flock of Birds® Pin Name Description 1 NA Not Used 2 Receive Serial Receive Line 3 Transmit Serial Transmit Line System 3 Manual Subject Interfaces 17-25 4 NA Not Used 5 GND Ground NA Not Used 6 7 8 9 To Tracker - DB9 Pinout for Polhemus FASTRAK® Pin Name Description 1 NA Not Used 2 Transmit Serial Transmit Line 3 Receive Serial Receive Line 4 NA Not Used 5 GND Ground NA Not Used 6 7 8 9 System 3 Manual Part 18 Signal Handling System 3 Manual 18-2 Signal Handling ~ System 3 Manual Signal Handling 18-3 PM2Relay Overview The PM2Relay (PM2R) is a 16 channel multiplexer for delivering powered and unpowered signals to a device. When coupled to a power amplifier such as the SA1, the PM2R can transfer several watts of power to standard four ohm and eight ohm speakers. The PM2R is designed to be used as a "de-multiplexer", that is, one input switched to 16 possible outputs. However, it can also be used as a straight multiplexer (16 inputs to one output). This is accomplished by sending signals in to the 16 "signal out" channels. The selected channel will be output on the "signal in" channel. Users that are doing this should be very careful, as it is easy to exceed the maximum input values when sending in 16 input signals. The aggregate input of all signals should never exceed two amps, or 15 Volts, because severe damage can be caused to the module. Each RP2 can control up to four PM2R devices and each PM2R can have one active channel. Therefore, a maximum of four signals can be played out simultaneousely when using four PM2Rs. To connect to a System 3 module, attach the 25-pin, blue ribbon cable from the RP2 device to the PM2R. Connect your powered signal source to the Signal In and connect the signal out to the RP2 connection on the PP16, or your own connectors. The channel outs on the PP16, from the left to right, correspond to the 16 channels (0-15) on the device. Power The device is powered via the System 3 zBus (ZB1PS). No PC interface is required. Features The PM2R uses a bit pattern code to control the output of a powered signal to one of sixteen output channels. The powered signal can come from any power amplifier such as the SA1 (Stereo Amplifier) or the HB7 (Headphone Buffer). The PM2R is designed to use a bit-code pattern from an RP2 Real-Time Processor or RV8 Barracuda Processor. RP Control Input The male DB25 connector on the left is the interface to the RP2. A blue ribbon connector is used to directly connect the RP2 and the PM2R. The PM2R uses all the bit outputs from the RP2. If you require additional bit outs, TDT recommends purchasing an RV8. In addition, any System 3 processor that has at least eight digital outputs, including the RX family of devices, can be used to control the PM2R (a special connector may be required). System 3 Manual 18-4 Signal Handling Signal In The BNC connector is the powered signal input. The maximum power input is a two amp, 15 Volt continuous signal or approximately 30 watts of continuous power. Signal Out The female DB25 connector on the right is the interface for the powered signal output. Users can also connect the PM2R output to the patch panel (PP16) connector labeled for the RP2 for easy BNC access to the powered signal. Channel... Sixteen LEDs indicate which channel is active. One channel can be active at a time. It is also possible to inactivate all channels. PM2R Bitcode Pattern The bitcode pattern from the RP2 consists of an 8-bit word that contains the following information; the device ID, the channel ID, and a set-bit. A final bit shuts off all channels. To control the PM2R, generate the bitcode pattern associated with the device and channel then send out the set-bit to change the channels. Be aware that the relays on the PM2R have a transition time of around one millisecond. Bits 0 - 3 identify the channel number. Integer 0, or bitpattern (xxxx 0000), is channel 0 and integer 15, or bitpattern (xxxx 1111), is channel 15. Bits 4 and 5 identify the device number. Integer value 0, or bit pattern (xx00xxxx), is device number 0 and integer value 48, or bit pattern (xx11xxxx), is device number 3. The device number is set internally for each PM2R and allows for an RP2 to control up to four PM2R modules. If only one PM2R is being used, it should have device number 0. Bit 6 is the set-bit. When this bit is set high, the channel and device from the previous six bits is activated. Bit 7 deactivates all channels across only the specified device. The chart below shows the bit ID, its integer value, and its function. Bit Number Integer Value Function 0 1 Least significant bit of channel number 1 2 Bit 2 of channel number 2 4 Bit 3 of channel number 3 8 Most significant bit of channel number 4 16 Least significant bit of device number 5 32 Most significant bit of device number 6 64 Turns on the channel of the specified device 7 128 Turns off all channels on specified device only System 3 Manual Signal Handling 18-5 Note: Make sure to put a delay of one sample between setting the channel number and turning the channel on. Trying to do both at the same time will not work correctly. For example, send "00000111" to select channel 7, and then send "01000000" one sample later to turn the channel on. PM2R Technical Specifications Switching Mode Single 1-to-16/16-to-1 Switching Time 2 mSec Input/output Level +/- 15 Volts Channel Cross-Talk < -80 dB S/N (typical) 90 dB Maximum Allowable Current 2 Amps continuous RP Control Input - DB25 Pinout Pin Name Description Pin Name Description 1 GND Ground 14 NA 2 NA Not Used 15 NA 3 NA 16 NA 4 NA 17 NA 5 NA 18 NA 6 NA 19 D0 7 D1 20 D2 8 D3 21 D4 9 D5 22 D6 10 D7 23 NA 11 NA 24 NA 12 NA 25 NA 13 GND Digital Input Channels Not Used Not Used Digital Input Channels Not Used Ground System 3 Manual 18-6 Signal Handling Signal Output - DB25 Pinout Pin Name Description Pin Name Description 1 SGND Signal Ground 14 NA Not Used 2 NA Not Used 15 A0 Analog Output Channels 3 A1 Analog Output Channels 16 A2 4 A3 17 A4 5 A5 18 A6 6 A7 19 A8 7 A9 20 A10 8 A11 21 A12 9 A13 22 A14 10 A15 23 NA 11 NA 24 NA 12 NA 25 NA 13 SGND Signal Ground Not Used Not Used PM2R - Controlling Signal Presentation The circuits described here use typical techniques for controlling the signal presentation when using a PM2R. These circuits have been designed as tutorials and will need to be modified to meet the needs of the individual researcher. Controlling the PM2R with BitOuts: In this example several BitOuts are used to control the PM2R (via an RP2.1) from within RPvdsEx. The bit pattern is generated by two DataTable components. DataTables are commonly used to send values from the PC to the RP devices. While working in RPvdsEx, the selection can be changed by clicking the green up and down arrows near the bottom edge of the components. The first DataTable (Channel Select) stores the values for the channel number. Channel numbers start at zero and go to fifteen. Each RP2.1 is capable of controlling up to four PM2R devices. The second DataTable (DeviceSelect) stores the values for the device ID. The values in the table are 0 (device 0), 16 (device 1), 32 (device 2), and 48 (device 3). The iScaleAdd is used to add the System 3 Manual Signal Handling 18-7 integer values from both tables and the ToBits component changes the resulting integer to the bitcode pattern. The first four bits are used to select the channel number and the last two bits are used to select the device ID. A software trigger is used to change devices and initiate a tone burst of 100 milliseconds duration. The software trigger causes the Schmitt trigger to open a gate for 100 milliseconds. The Schmitt trigger is delayed by one millisecond relative to the channel select. This removes the transient associated with the relays. These bits are used to select the channel number [1:4,0] M=1 Bi [1:6,0] [1:1,0] [1:2,0] ConstI iScaleAdd K=0 Channel Selec M=2 Bi [1:3,0] SF=1 Shft=0 ToBits b0 b1 b2 b3 b4 b5 Rst=0 Device Selec [1:8,0] M=4 Bi [1:10,0] M=8 Bi =0 =0 Use the Channel Select DataTable to select a channel: 0 selects channel 1 15 selects channel 16 Use the Device Select DataTable to select the device: 0 selects device 1 16 selects device 2 32 selects device 3 48 selects device 4 These bits are used to select the device ID [1:12,0] M=16 Bi [1:14,0] A software trigger sets the channel and device ID [1:16,0] M=64 Bi [1:15,0] Src=Soft1 [1:21,0] M=32 Bi Tone Amp=1 Shft=0 Freq=1000 Phse=0 Rst=Run [1:22,0] Cos2Gate [1:18,0] TTLDelay Tdel=1 [1:19,0] Schmitt Trf=10 Ctrl=Closed cO Ch=1 [1:23,0] Thi=100 Tlo=10 If signal play out occurs during the selection an audible click will be heard, a TTLDelay component is used to delay the start of the signal play out Controlling the PM2R with WordOut: In this example a WordOut is used to control the PM2R (via an RP2.1) from within RPvdsEx. This simplified format decreases cycle usage. An additional iScaleAdd is required because the BitOut and WordOut components function differently and should not be used in the same circuit. As before, a software trigger initiates the start of the stimulus presentation. The triggered signal adds 64 to the output to change the channel. System 3 Manual 18-8 Signal Handling ConstI K=0 Channel Selec [1:5,0] [1:6,0] iScaleAdd iScaleAdd SF=1 Shft=0 Device Selec [1:7,0] M=-1 W SF=1 Shft=0 [1:2,0] TTL2Int =0 HiVal=64 =0 [1:1,0] Src=Soft1 ToneOut [1:12,0] Tone Amp=1 Shft=0 Freq=1000 Phse=0 Rst=Run [1:13,0] Cos2Gate ToneOut [1:9,0] [1:10,0] TTLDelay Schmitt Tdel=1 Trf=10 Ctrl=Closed cO Ch=1 [1:14,0] Thi=100 Tlo=10 Controlling the PM2R from a run-time application: The examples described here could easily be modified to allow control from run-time applications. Parameter tags can be included and used in other applications such as BioSigRP or OpenEx. System 3 Manual 10110100 [1:4,0] Signal Handling 18-9 SM5 Signal Mixer Overview The SM5 is a three-channel signal mixer. The relative contribution of the three inputs to the final output can be adjusted using a variable gain for two of the inputs. In addition, the signal on the two adjustable channels can be inverted before addition. The input signal range is ±10V for each channel, with the additional caveat that the amplified signal for each channel may not exceed ±10V without clipping. The range for the summed output is ±10V. Power The SM5 Signal Mixer is powered via the System 3 zBus (ZB1PS). No PC interface is required. Features The SM5 Signal Mixer is a three-channel weighted summer with variable input weighting and channel inverting. The SM5 is a zBus rack mounted device, through which it receives power. Inputs Three signals input channels (A, B, and C), with a range up to ±10 V peak, are accessed through front panel BNC connectors. Input channels A and B are multiplied by a weighted, signed constant, K, before being added to the final output. The weighting range for these two channels is adjustable from -20 dB to +20 dB (i.e. |K| = 0.1 to 10) using a GAIN knob on the front panel. The sign of K for channels A and B can also be selected using front panel toggle switches, labeled INV-A and INV-B. If an input is not being used, it should be grounded by attaching a shorted BNC cable. This will prevent unwanted noise from being added to the output. Clipping The variable weighting provides a great deal of flexibility in input and output signals. However, care should be taken to avoid clipping any signal component. The SM5 output signal = (Ka*A) + (Kb*B) + C is limited to ±10V peak. In addition, the raw inputs, A, B, and C, as well as the weighted inputs, Ka*A, and Kb*B, are limited to ±10V peak. System 3 Manual 18-10 Signal Handling SM5 Technical Specifications Input Signal Range ±10V peak Weighting Range -20.0 to +20.0 dB Max Output ±10V Spectral Variation < 0.1 dB from 10 Hz to 200 kHz S/N (typical) 111 dB (20 Hz to 80 kHz) THD < 0.002% (1kHz tone +/- 7V peak) Noise Floor 19 V rms Output Impedance 20 Ohm Input Impedance 10 kOhm Inversion Channels A & B System 3 Manual Signal Handling 18-11 System 3 Manual 18-12 Signal Handling PP16 Patch Panel The PP16 Patch Panel provides convenient BNC connections for easy access to the digital and analog inputs and outputs of a variety of System 3 devices. Originally designed for use with the RP2 Real-time Processor, RA16 Medusa Base Station, and RV8 Barracuda; the PP16 back edge is equipped with a nine pin and three 25-pin connectors, which have been marked with the corresponding device label to minimize the possibility of miswiring. To connect the PP16 to a device: Connect the male end of the 9- or 25-pin ribbon cable to the desired module and connect the female end to the correct PP16 input according to the following table. Connector: RV8 9-Pin RV8 25-Pin RA16 25 Pin RP2 25 Pin Devices: RV8 Optional I/O* RV8 Digital I/O RA16BA RP2 RA8GA RP2.1 SA8 PM2R RX5 RX6 RX7 RX8 *GND Jumper: When using the PP16 and the RV8 Barracuda, the jumper located on the PP16 connects the analog ground of the DB9 connector to the device ground on the RV8. *DIP-Switch: The DIP-switches located on the PP16 is used to control the input of either digital signals or the output of analog signals on the RV8. When the DIP switches are in the ON position, digital input bits 8-15 are connected and will be available on the PP16 BNCs A1-A8. Do not attempt to output any analog signals from the RV8 while the DIP-switches are in the ON position. When the DIP-switches are in the OFF position the analog ouputs are available on the PP16 BNCs A1-A8. System 3 Manual Signal Handling 18-13 Mapping the Inputs and Outputs for Each Device Each device has a unique input and output configuration. The table below shows the configuration of the BNC connectors. Device & Connector A1-A8 B1-B8 C1-C8 RP2, RP2.1 Digital Inputs Digital Outputs C1=Trigger Digital I/O Connector Channels 1-8 Channels 1-8 C2=Volt out (3.3v) RA16BA Analog Outputs Digital Outputs Digital Outputs Analog/Digital I/O Connector Channels 1-8 Channels 0-7 Channels 8-15 RV8, RV8D Digital Inputs Digital Outputs Digital Inputs Digital I/O Connector Channels 8-15 Channels 0-7 Channels 0-7 RV8D* Analog Outputs Not Used Not Used Optional I/O Connector Channels 1-8 RA8GA Analog Input Not Used Not Used Not Used Analog I/O Connector Channels 1-8 PM2R Analog Output Analog Output Signal Out Connector Channels 0-7 Channels 8-15 SA8 Analog Output Analog Output Analog Output Power Outputs Connector Channels 1-8 Signal and Ground: Channels 1-4 Signal and Ground: Channels 5-8 Note: The PP16 can also be used with the RX devices, however, the PP24 is recommended for these devices. RX5, RX6, RX7, RX8 Bit Addressable Digital Digital I/O, Byte A Digital I/O Connector I/O Channels 0-7 Channels 0-7 Digital I/O, Byte B Channels 8-15 RX5, RX7 Analog Outputs Multi I/O Connector A2, A4, A6, A8 = Channels 16-23 Channels 1-4 A1, A3, A5, A7 = Not Used Channels 24-31 RX8 Analog I/O Block A Analog Output Block C Analog I/O Connector Channels 1-8 Digital I/O, Byte C Analog I/O Block B Channels 9-16 Digital I/O, Byte D Channels 17-24 *To use the RV8D Optional I/O analog output connector, move all the DIP switch postions to the OFF setting on the PP16. Once the switches are in this position digital inputs 8-15 are not accessible. Do NOT attempt to output analog signals when the switches are in the ON position. System 3 Manual 18-14 Signal Handling Mapping RA16BA I/O The diagram below maps the RA16BA Digital I/O connection to the PP16. RA16 Medusa Base Station TRIG Digital I/O Connector labeled RA16 PP16 A1 A2 A3 A4 A5 A6 A7 A8 B1 Analog Channels 1-8 B2 B3 B4 B5 B6 B7 B8 C1 C2 Digital Out 0-7 C3 C4 C5 C6 C7 C8 C6 C7 Digital Out 8-15 Mapping RP2/RP2.1 I/O The diagram below maps the RP2 Digital I/O connection to the PP16. The last seven BNC connectors are not used. BNC C1 maps to VCC 3.3. RP2.1 Real-Time Processor TRIG Digital I/O IN-1 IN-2 A6 A7 A8 OUT-1 OUT-2 Connector labeled RP2 PP16 A1 A2 A3 A4 A5 Digital In 1-8 B1 B2 B3 B4 B5 B6 Digital Out 1-8 B7 B8 C1 C2 C3 C4 C5 Vcc 3.3 Mapping RV8 I/O There are two connectors for the Barracuda on the rear edge of the PP16. The optional analog channels are on the DB9 connector and the digital I/O are on the DB25 connector. The PP16 is configured to accommodate 24 of the 32 inputs, outputs, and channels on the Barracuda, at any given time. TDT ships a special cable that connects between the DB9 connector and the RV8. Connect the analog ground on the back of the PP16 to produce adequate signal quality. The default connection for the Barracuda is shown below. In this format, sixteen digital inputs and eight digital outputs are configured as follows: System 3 Manual C8 Signal Handling 18-15 RV8 Barracuda Processor Armed Running DC FreeRun Trig DIP-Switches Press switches toward arrow ON PP16 A1 A2 A3 A4 A5 A6 A7 A8 Din Installed Option Dout Digital I/O Option I/O Connector labeled RV8 B1 B2 Digital In 8-15 B3 B4 B5 B6 B7 B8 C1 C2 C3 C4 C5 C6 C7 C8 Digital In 0-7 Digital Out 0-7 The optional connection for the Barracuda is shown below and uses both the DB25 and DB9 cables provided with the PP16. In this format, eight digital inputs, eight digital outputs, and the eight optional analog channels are configured as follows: RV8 Barracuda Processor DIP-Switches TRIG Press switches toward arrow ARMED RUNNING DC FREERUN DIN DOUT Digital I/O ON PP16 A1 A2 A3 A4 A5 A6 A7 A8 Analog Channels 1-8 Installed Option Option I/O Connectors labeled RV8 B1 B2 B3 B4 B5 B6 B7 B8 Digital Out 0-7 C1 C2 C3 C4 C5 C6 C7 Digital In 0-7 Mapping RA8GA A PP16 patch panel can be used to simplify connection to the preamplifier’s analog inputs. A ribbon cable can be connected from the RA8GA Analog I/O connector to the RA16 connector on the back of the PP16 allowing acquisition of signals via the first eight BNC connectors on the front of the PP16. RA8GA Adjustable Gain Preamp Max Input Active 10V 1V 0.1V To Base Range Select Analog I/O PP16 Back Ports Connector Labeled RA16 PP16 Patch Panel A1 A2 A3 A4 A5 A6 A7 A8 Analog Inputs on Connectors 1-8 System 3 Manual C8 18-16 Signal Handling Mapping PM2R I/O The picture below maps the PM2R signal out connection to the PP16. PM2RELAY Power Multiplexer CHANNEL... RP CONTROL INPUT SIGNAL IN SIGNAL OUT Connector labeled RP2 PP16 A1 A2 A3 A4 A5 A6 A7 A8 Analog Channels 0-7 B1 B2 B3 B4 B5 B6 B7 B8 C1 C2 C3 C4 C5 C6 C7 Analog Channels 8-15 Connect to the ETM1 The connector labeled J1 is used to connect the ETM1 to a PP16. Plug one end of a serial DB25 male-female cable into the J1 connector and plug the other end into the RA16 port of the PP16. Channels 1 - 8 and 9 - 16 of the headstages can be accessed through the patch panel BNCs labeled A1-A8 and B1 - B8, respectively. Also, a custom cable can be fabricated to connect the ETM1 (connector J1) to virtually any signal source. System 3 Manual C8 Signal Handling 18-17 PP24 Patch Panel Overview The PP24 Patch Panel provides front panel, BNC connections for easy access to the digital and analog inputs and outputs of the RX family of processors. The PP16 Patch Panel is recommended for use with devices such as the RP2.1 and RA16BA processors, Power Multiplexer (PM2R), and Power Amplifier (SA8). The PP24 can also be used with the RZ5. The PCB Adapter Advantage The PP24 is supplied with a single device specific PCB adaptor that can be used with either RX or RZ processors. The PCB provides better performance than ribbon cables, facilitating faster data transfer rates and improved signal to noise ratios. Adjustable Positioning The PP24 is equipped with a 25-pin connector on the front panel. The PCB Adapter can be used to connect the PP24 to an RX device positioned either directly above or directly below the PP24 or an RZ processor positioned above the PP24. Four thumbscrews located on each corner of the PP24 front panel allow the user to slide the BNC array into the correct position to align the connector with the target device. Caution: The thumbscrews should never be completely removed. Avoid loosening the thumbscrews too far. Mapping the Inputs and Outputs for Each Device The PP24 consists of 3 banks of BNC connectors, Bank A, B, and C. Each of the banks is labeled 1-8 within the set and each BNC is also numbered as part of the entire group from 1 – 24. System 3 Manual 18-18 Signal Handling The following table shows the configuration of the BNC connectors for each I/O connector of the RX and RZ devices. Device & Connector A1-A8 B1-B8 C1-C8 RX5, RX6, RX7, RX8 Digital I/O, Byte B Digital I/O Connector Bit Addressable Digital I/O Digital I/O, Byte A Channels 0-7 Channels 0-7 RX5, RX7 Analog Outputs Digital I/O, Byte D Multi I/O Connector A2, A4, A6, A8 = Channels Channels 16-23 1-4 A1, A3, A5, A7 = Not Used Channels 24-31 RX8 Analog I/O Block A Analog I/O Block B Analog I/O Connector Channels 1-8 Channels 9-16 Analog Output Block C Channels 8-15 Digital I/O, Byte C Channels 17-24 RZ5 Digital I/O Connector Analog I/O Connector Bit Addressable Digital I/O Digital I/O, Byte A Channels 0-7 Channels 0-7 Digital I/O, Byte B Not Used Analog Inputs Analog Outputs Channels 1-4 Channels 9-12 Channels 0-7 For more information, see the diagrams for the desired device below. Note that the RX5 and RX7 use the same Digital and Multi I/O mappings. Mapping RX5 or RX7 I/O Note: The PP24 can be mounted above or below the RX5. The diagram below maps the RX5 or RX7 Digital I/O connections to the PP24. All digital bits are programmable as input or output. RX5 Pentusa Base Station Amp-a Status Amp-b Amp-c Amp-d BITS Zbus for System 3 Mode Idle uM u1 u2 u3 u4 All Cyc . 0 0 0 0 0 0% XLink A1 System 3 Manual M1234 A2 A4 B1 B2 B3 B4 C1 C2 C3 C4 1 3 5 7 A5 A6 A7 A8 9 11 B5 B6 13 15 B7 B8 17 C5 19 C6 21 C7 23 C8 2 10 14 18 20 22 24 4 A3 Mulit-DSP Processor 6 8 12 16 Multi I/O RX CONN 24 nel 0 4 1 5 2 6 3 7 DAC-1 Signal Handling 18-19 A1-A8 B1-B8 C1-C8 Bit Addressable Digital I/O Channels 0-7 Digital I/O, Byte A Channels 0-7 Digital I/O, Byte B Channels 8-15 The diagram below maps the RX5 or RX7 Multi I/O connections to the PP24. All digital bits are programmable as input or output. RX5 Pentusa Base Station Amp-a Status Amp-b Amp-c Amp-d BITS Zbus for System 3 Mode M1234 Idle uM u1 u2 u3 u4 All Cyc . 0 0 0 0 0 0% XLink A1 A2 Digital I/O A4 B1 B2 B3 B4 C1 C2 C3 C4 1 3 5 7 A5 A6 A7 A8 9 11 B5 B6 13 15 B7 B8 17 C5 19 C6 21 C7 23 C8 2 10 14 18 20 22 24 4 A3 Mulit-DSP Processor 6 8 12 16 RX CONN A1-A8 B1-B8 C1-C8 Analog Outputs Digital I/O, Byte C Digital I/O, Byte D A2, A4, A6, A8 = Channels 1-4 Channels 16-23 Channels 24-31 0 4 1 5 2 6 3 7 DAC-1 24 nel A1, A3, A5, A7 = Not Used Mapping RX6 I/O Note: The PP24 can be mounted above or below the RX6. The diagram below maps the RX6 Digital I/O connection to the PP24. All digital bits are programmable as input or output. Amp-a RX6 Multifunction Processor Status Idle uM u1 u2 u3 u4 All Cyc . 0 0 0 0 0 0% M1234 Mode Zbus for System 3 XLink A1 A2 Mulit-DSP Processor A4 B1 B2 B3 B4 C1 C2 C3 C4 1 3 5 7 A5 A6 A7 A8 9 11 B5 B6 13 15 B7 B8 17 C5 19 C6 21 C7 23 C8 2 10 14 18 20 22 24 4 A3 6 8 12 16 BITS RX CONN 0 4 1 5 2 6 3 7 DAC-1 DAC-2 DAC-3 DAC-4 24 nel A1-A8 B1-B8 C1-C8 Bit Addressable Digital Digital I/O, Byte A Digital I/O, Byte B System 3 Manual 18-20 Signal Handling I/O Channels 0-7 Channels 8-15 Channels 0-7 Mapping RX8 I/O Note: The PP24 can be mounted above or below the RX8. The diagram below maps the RX8 Digital I/O connection to the PP24. All digital bits are programmable as input or output. RX8 Multi I/O Processor Status BITS Mode Zbus for System 3 M1234 Idle uM u1 u2 u3 u4 All Cyc . 0 0 0 0 0 0% Mulit-DSP Processor XLink A1 A2 A4 B1 B2 B3 B4 C1 C2 C3 C4 1 3 5 7 A5 A6 A7 A8 9 11 B5 B6 13 15 B7 B8 17 19 C5 C6 21 C7 23 C8 2 10 14 18 22 24 4 A3 6 8 12 16 20 RX CONN 0 4 1 5 2 6 3 7 Analog I/O 24 nel A1-A8 B1-B8 C1-C8 Bit Addressable Digital I/O Channels 0-7 Digital I/O, Byte A Channels 0-7 Digital I/O, Byte B Channels 8-15 The diagram below maps the RX8 Analog I/O connection to the PP24. All digital bits are programmable as input or output. RX8 Multi I/O Processor Status BITS Mode Zbus for System 3 M1234 Idle uM u1 u2 u3 u4 All Cyc . 0 0 0 0 0 0% XLink Mulit-DSP Processor Digital I/O 0 4 1 5 2 6 3 7 A1-A8 B1-B8 C1-C8 Analog I/O Block A Analog I/O Block B Analog Output Block C Channels 1-8 Channels 9-16 Channels 17-24 System 3 Manual Signal Handling 18-21 Mapping RZ5 I/O Note: The PP24 is mounted below the RZ5. Idle Cyc. u1 0 u2 0 - - DAC ADC The diagram below maps the RZ5 Digital I/O connection to the PP24. All digital bits are programmable as input or output. All 0% - 1 2 3 4 9 10 11 12 0 1 2 3 Speaker Volume RZ5 1 BioAmp Processor Mode 2 Digital I/O A1 ADC DAC 0 4 1 9 1 5 2 10 2 6 3 11 3 7 4 12 A2 Digital Min Processors Amp-a A4 B1 B2 B3 B4 C1 C2 C3 C4 1 3 5 7 A5 A6 A7 A8 9 11 B5 B6 13 15 B7 B8 17 C5 19 C6 21 C7 23 C8 2 10 14 18 20 22 24 4 A3 6 8 12 Stim Digital I/O 16 RX CONN Max Analog I/O Amp-b 24 nel A1-A8 B1-B8 C1-C8 Bit Addressable Digital I/O Channels 0-7 Digital I/O, Byte A Channels 0-7 Digital I/O, Byte B Channels 0-7 Idle Cyc. u1 0 u2 0 - - DAC ADC The diagram below maps the RZ5 Analog I/O connection to the PP24. All 0% - 1 2 3 4 9 10 11 12 0 1 2 3 Speaker Volume RZ5 BioAmp Processor 1 Digital Min Processors Mode 2 Digital I/O ADC DAC 0 4 1 9 1 5 2 10 2 6 3 11 3 7 4 12 Stim Digital I/O Amp-a A1 A2 Analog I/O Amp-b A4 B1 B2 B3 B4 C1 C2 C3 C4 1 3 5 7 A5 A6 A7 A8 9 11 B5 B6 13 15 B7 B8 17 C5 19 C6 21 C7 23 C8 2 10 14 18 20 22 24 4 A3 6 8 12 16 A1-A8, B5-B8, C5-C8 B1-B4 C1-C4 Not Used Analog Input Analog Output Channels 1-4 Channels 9-12 Max RX CONN 24 nel System 3 Manual 18-22 Signal Handling ETM1 Experiment Test Module Overview The Experiment Test Module (ETM1) allows you to design and test experimental protocols before running critical experiments and can be used to input signals into either the chronic (RA16CH) or acute (RA16AC) headstages from the analog outputs of the Medusa (RA16BA) or Barracuda Processor (RV8). The ETM1 also accepts signals via the Patch Panel (PP16). A processor can be used to generate signal spikes that simulate a physiological recording. The simulated spike signals can then be passed through the ETM1 and acquired by the connected headstage. The ETM1 also includes a connection to receive signals via the Patch Panel (PP16). Using the PP16, virtually any signal source can be used. The ETM1 allows the experimental setup to be tested without using a subject. There is 1000 to 1 signal attenuation in the ETM1. Therefore, 1V on the input is equivalent to 1mV on the output to the headstage. The ETM1 uses transformer isolation of the incoming signal to the resulting output to the headstages. Inputs, or processor and patch panel connections, are located on one end of the device and output, or headstage connections, are located on the other end of the device. Connecting the Headstage Connect the headstage to the corresponding connector on the ETM1. Chronic Headstage connected to ETM1 System 3 Manual Acute Headstage connected to ETM1 Signal Handling 18-23 Connecting the Signal Source The connectors labeled J1, J2 and J3 are used to connect the ETM1 to signal sources. The first eight-headstage channels (1-8) are wired to connector J2. The other eight-headstage channels (916) are wired to connector J3. All 16 channels are wired to connector J1. See technical specifications, page 18-23 for pinouts. Connecting to an RA16BA or RV8 For headstage channels 1-8, plug one end of a serial DB25 male-female cable into the J2 connector and plug the other end into the Analog/Digital I/O Port of an RA16BA or RV8. For headstage channels 9-16 plug one end of a serial DB25 male-female cable into the J3 connector and the other end into the Analog/Digital I/O port of a second RA16BA or RV8. Connect to the PP16 The connector labeled J1 is used to connect the ETM1 to a PP16. Plug one end of a serial DB25 male-female cable into the J1 connector and plug the other end into the RA16 port of the PP16. Channels 1 - 8 and 9 - 16 of the headstages can be accessed through the patch panel BNCs labeled A1-A8 and B1 - B8, respectively. Also, a custom cable can be fabricated to connect the ETM1 (connector J1) to virtually any signal source. ETM1 Technical Specifications Maximum Input Should not exceed the maximum input for your amplifier (such as 4V for the RA16PA) Frequency Response Flat from 500 - 20,000 Hz Highpass Filter (Fc) 20 Hz S/N (typical) 70 dB System 3 Manual 18-24 Signal Handling THD (Typical) 0.01% for 1 kHz input at 1 V peak-to-peak Cross-Talk < -70 dB Attenuation 60 dB J1 DB25 Pinout Analog input channels 1-16. The J1 connector is typically used to input signals from the PP16 Patch Panel. Note: Female pin-in shown. Pin Name Description 1 A1 2 Analog Input Channels Pin Name Description 14 A2 A3 15 A4 3 A5 16 A6 4 A7 17 A8 5 NA Not Used 18 A9 6 A10 Analog Input Channels 19 A11 7 A12 20 A13 8 A14 21 A15 9 A16 22 NA 10 NA Not Used Analog Input Channels Not Used 23 11 24 12 25 13 J2 DB25 Pinout Analog input channels 1-8. Typically used to input signals from the RA16BA or the RV8. Note: Female pin-in shown. System 3 Manual Signal Handling 18-25 Pin Name Description Pin Name Description 1 A1 14 A2 2 A3 15 A4 3 A5 16 A6 4 A7 17 A8 5 GND Ground 18 NA 6 NA Not Used 19 Analog Input Channels 7 20 8 21 9 22 10 23 11 24 12 25 Analog Input Channels Not Used 13 J3 DB25 Pinout Analog input channels 9-16. Typically used to input signals from the RA16BA. Note: Female pin-in shown. Pin Name Description 1 A9 2 Analog Input Channels Pin Name Description 14 A10 A11 15 A12 3 A13 16 A14 4 A15 17 A16 5 GND Ground 18 NA 6 NA Not Used 19 7 20 8 21 9 22 10 23 Analog Input Channels Not Used System 3 Manual 18-26 Signal Handling 11 24 12 25 13 System 3 Manual Part 19 PC Interfaces System 3 Manual 19-2 PC Interfaces ~ System 3 Manual PC Interfaces 19-3 Interface Transfer Rates Transfer rates depend on a number of factors, including the device accessed the type of transfer, and cycle usage. The table below includes typical transfer rates for the Optibit, Gigabit, and USB interfaces at a 50% cycle usage with RP/RX and RZ devices. All values are MB/s. Interface Transfer Type RP/RX RZ PO5/PO5e/FO5/LO5 Read 1.5/4.0 8.0 Write 1.0 8.0 Read 1.5 NS Write 1.0 NS Read 1.5 NS Write 1.0 NS PI5/FI5 UZ2 Because of the overhead required to poll the hardware or run single commands with the USB interface, users should be aware of the following relationships when performing small data transfers with the UZ2. Interface Transfer Type RP/RX UZ2 Snippet Transfers (~100) 0.3 MB/s Single Commands 1000 Commands/s System 3 Manual 19-4 PC Interfaces Cycle Usage and Large Transfers The following graphs show how the cycle usage affects the transfer rate for large transfers with the Optibit, Gigabit, and USB 2.0 interfaces with an RX device. The data was collected using a buffer size of 1,000,000 for the Read Tag and Write Tag commands. The transfer rates were tested using both the RP2.1 (a single processor device) and only the main processor of an RX6 and using circuits generating cycle usages of 5, 25, and 50 percent. System 3 Manual PC Interfaces 19-5 Optibit Interface Overview The Optibit system (Optical Gigabit) is designed for users that require high-speed real-time control of System 3 devices or precise system-wide device synchronization. The Optibit interface consists of a PCI card (PO5), or PCIe card (PO5e) that must be installed in the computer and one or more Optibit-to-zBUS interface modules (FO5) that mount in the rear slot of a zBUS device chassis. It is up to 8x times faster than the original gigabit interface and also reduces the system’s susceptibility to EMF. Devices are connected in a simple loop using provided high speed noise immune fiber optic cabling. Also, when using the Optibit interface, all devices (across all chassis) are automatically phase locked to a single clock. Part Numbers: PO5 – Optical PCI Card for Hardware/Software Control PO5e – Optical PCI Express Card for Hardware/Software Control FO5 – PO5 to zBus Interface Status LEDs Four status LEDs on the face of the FO5 indicate the connection status of the interface. Connected – The Connected LED is lit when the interface is powered on and the fiber optic cable labeled IN is connected properly. Although the Connected LED will light if only the IN cable is connected, both cables have to be connected properly for communication to take place. Identified – The Identified LED lights when a software signal sent from the PC is recognized by the interface. This takes place when launching TDT software such as zBusMon, RPvdsEx or loading an OpenEx project. Activity – The Activity LED is lit when data is being sent to or from the TDT hardware. Error – The Error LED lights when there is a connection or communication error. For example, this LED will light if the fiber optic cables are not connected properly. System 3 Manual 19-6 PC Interfaces PO5/PO5e Technical Specifications The PI5 and PO5 zBus to PC interface cards must be installed in a standard size, (PCI v 2.2 or greater) compliant 3.3 V slot. The PO5e zBus to PC interface card must be installed in a PCI Express slot. Notes: Do not install in a PCI-X slot—the interface might fail. Do not attempt to install in low-profile PCI slots. While low profile and standard PCI cards maintain the same electricals, protocols, PC signals, and software drivers as standard PCI expansion cards, the low profile bracket is not compatible with standard cards. Maximum cable length: 30 meters Interface Transfer Rates vary by transfer type and device. See Interface Transfer Rates, page 19-3, for more information. PCI vs PCIe Below is a diagram of the compatible PCI and PCIe slots used with the PO5 and PO5e Optibit Interface cards. System 3 Manual PC Interfaces 19-7 Gigabit Interface Overview The Gigabit system is designed for users that require high-speed real-time control of System 3 devices or precise system-wide device synchronization. The gigabit interface consists of a PCI card (PI5) that fits in the computer and one or more GBit-to-zBUS interface modules (FI5) that mounts in the rear slot of a zBUS device chassis. Devices are connected in a simple loop using provided cabling. When using the gigabit-interface all devices (across all chassis) are automatically phase locked to a single clock. Over 100 devices can be connected in a single Gigabit loop with automatic device identification and system initialization. Part Numbers: PI5 – PCI Card for Hardware/Software Control FI5 – PI5 to zBus Interface PI5 Technical Specifications The PI5 and PO5 zBus to PC interface cards must be installed in a standard size, (PCI v 2.2 or greater) compliant 3.3 V slot. Notes: Do not install in a PCI-X slot—the interface might fail. Do not attempt to install in low-profile PCI slots. While low profile and standard PCI cards maintain the same electricals, protocols, PC signals, and software drivers as standard PCI expansion cards, the low profile bracket is not compatible with standard cards. Maximum cable length: 30 meters Interface Transfer Rates vary by transfer type and device. See Interface Transfer Rates, page 19-3, for more information. Gigabit Anomalies and Tech Notes The PI5 must be installed in a computer that has a 3.3 V compliant PCI slot (v2.2 or greater). The PI5 is not compatible with the WindowsXP and 2000 Standby and Hibernate features. We recommend configuring PC Power Options to never use these modes for any PC used to run TDT applications. Problems loading drivers may occur when the C:WINNT/inf folder is not visible. In Windows Explorer choose Tools|Folder Options, then choose View|Hidden Files and Folders, and select Make Visible. System 3 Manual 19-8 PC Interfaces When data is being transferred from the TDT hardware to the computer, CPU usage on the computer goes up to 100%. The computer is still usable (can ran other programs, etc.) despite the high CPU usage, however, other programs that are running on the computer may slow down. After installing the Gigabit PCI card in your computer, there may be a conflict with how the PC communicates with the card and other devices in the system. This could lead to the following error message when performing a transfer test in zBUSmon: “System Test Error: Cycle power on system and test again.” If you experience system problems and find the IRQ number to be the same on another device, then you should move the PI5 card to another PCI slot in your machine. System 3 Manual PC Interfaces 19-9 UZ2 USB 2.0 Interface Overview The USB 2.0 zBus Interface mounts in the rear bay of a zBus device chassis and handles communication and data transfer between your computer and zBus mounted programmable devices, such real-time processors or programmable attenuators. Most nonprogrammable devices, such as speaker drivers or signal mixers, do not require an interface. You will need a USB2.0 port available on the host PC for each UZ2 in a multi-chassis system. We recommend upgrading to an Optibit interface if a system requires more than three chassis. Note: The USB 2.0 interface requires Windows XP (with either Service Pack 1 or 2) or Windows 2000 (with Service Pack 5). Connecting the UZ2 The UZ2 connects to your computer with standard USB 2.0 A to B cables (provided with each module). Interface drivers are bundled with the TDT Drivers and will be installed when the device is connected to the host computer for the first time. The UZ2 can be safely connected or unconnected while the computer is running. Important Note: Wait ten seconds after devices have gone through the boot sequence or 30 seconds after turning on devices (with the computer already running) before running applications that use TDT devices. We also recommend using zBUSmon to verify the logical order of devices before beginning any experiment. See Boot Up Sequence, below, for more information. Sync The Sync allows users to synchronize several modules that are mounted in different device caddies. Each USB module has its own clock. Clocks on multiple USB devices will drift relative to each other. The Sync line uses the clock from one USB module, the master, to synchronize the clocks across all zBUS device caddies. To connect several zBUS caddies, one module (the highest logical module) is designated as the master and the other clocks are slaved to the master clock. Connect the Sync Out of the master clock to the Sync In of the slave with a short patch cable. To connect several device caddies, daisy chain the connections between the slave caddies as shown below. When the Sync lines are connected correctly the LED to the left of the Sync connectors should be lit on each slave devices. The LED on the master will remain unlit. The LED should only flash when the Sync lines are not connected. System 3 Manual 19-10 PC Interfaces Sync LEDs Indicates Flashing (on slave) Connected incorrectly Master device not lit and slave devices lit Connected correctly No devices lit Not synced to any device Logical Order of Devices The logical order of devices is determined each time the zBus caddies are powered on. You can verify the current logical order using the zBUSmon software. Boot Up Sequence The boot up sequence for the USB 2.0 interface is driven from the PC and follows the communication protocol described below. The first time the hardware is turned on a device driver is loaded to the interface. Depending on your operating system, the PC might beep to indicate that the device driver has been loaded A second set of drivers will be loaded and the devices will reboot. The TDT hardware is queried to determine the logical order of the devices and zBus caddies. Important!: If the zBUS is accessed during step three, the devices will fail to ID. To ensure that step three is completed, wait ten seconds after the devices have rebooted (step two) before loading any TDT application or viewing the devices in zBUSmon. If the hardware fails to ID shut down the TDT hardware and restart the device. System 3 Manual PC Interfaces 19-11 ExpressCard to zBus Interface Overview The LO5 ExpressCard to zBus Interface model provides a means of controlling System 3 devices from a laptop (or any computer with an ExpressCard slot) and offers performance comparable to the Optibit system (Optical Gigabit). The entire interface system consists of a 34mm (26 pin) ExpressCard that is attached with a cable to a free standing fiber optic interface module. The module can then connect to the zBus optic port on any RZ device or via an FO5 housed in a zBus chassis. When connecting to a multiple device system, devices are daisy-chained together with multiple fiber optic cables. The LO5 module requires AC power. Part Numbers: LO5 – ExpressCard to zBus Interface module (includes express card) LO5 Technical Specifications The ExpressCard must be installed in a 34mm (26 pin) slot. Maximum fiber optic cable length: 30 meters Interface Transfer Rates vary by transfer type and device. See Interface Transfer Rates, page 19-3, for more information. Tech Note The System 3 hardware, LO5, and ExpressCard should all be connected before turning on the laptop. If the system is not connected before boot-up, the LO5 may fail to initialize and will not appear in zBUSmon. If the LO5 does not initialize, unplug the system and reconnect to the ExpressCard. If the LO5 still does not initialize, ensure all devices are connected and powered on, then reboot the laptop. System 3 Manual Part 20 The zBus and Power Supply System 3 Manual 20-2 The zBus and Power Supply ~ System 3 Manual The zBus and Power Supply 20-3 ZB1PS Chassis - Powered zBUS Device Chassis Overview zBUS is TDT's high-speed, low-noise bus for System 3 modules. The bus is integrated into a device chassis, which serves as a rack mountable housing for most modular devices in the System 3 line. As seen in the functional diagram below, the bus distributes communication and power throughout the system. Functional Diagram One or two modular devices can be mounted in the chassis’ front bays, providing easy access to front panel connections. An interface module can be mounted in the second rear bay for chassis housing a programmable device. Multiple chassis can be interfaced for custom system configurations and individual modules can be added or removed as needed. Power Supply The ZB1PS chassis features an onboard, switchable (115V/220V) power source. The power supply is integrated into the chassis and cannot be removed. A small fan is located inside of the power supply and provides cooling while the power supply is active. System 3 Manual 20-4 The zBus and Power Supply Using the ZB1PS Front View Back View Applying Power to the Chassis CAUTION! Allow at least 2 cm clearance from each side of the chassis for proper cooling. A ventilation fan is provided on the right side of the chassis. Ventilation holes are also provided on the power supply panel and another internal fan is provided inside the power supply housing. Installation of the chassis with the ventilation obstructed may cause a malfunction or fire. Use only the supplied power cord. To turn the ZB1PS on: 1. Position the chassis so that both the power switch and power cord may be accessed easily. 2. Ensure that the power switch is off and connect the power cord. 3. Ensure that the voltage region switch is set correctly. For standard outlets in the United States it should be switched to 115 V. 4. Turn the power switch on and check that the power switch's green LED is illuminated. The Indicator Light A front panel switch turns on the chassis power supply and includes an indicator light. The power switch's green LED will illuminate when the chassis is switched on. The light will flash rapidly when it receives a command from software and slowly to indicate a communications error (check all cable connections). System 3 Manual The zBus and Power Supply 20-5 Disconnecting Power from the Chassis CAUTION! When removing the power cord from either the power supply or socket outlet, grasp the plug, not the cord, in order to avoid damaging the cable. To disconnect the ZB1PS: 1. Turn off the power switch. 2. Disconnect the power cord from the power supply. 3. Disconnect the power cord from the wall socket plug. Adding and Removing Modules Before adding or removing modules, make sure the zBus is powered off. To remove a module from the chassis: 1. Unscrew the two thumb screws on the corner of the module faceplate. 2. Pull straight out on the front-panel BNC connectors. A BNC 'T' connector makes a great handle for removing zBus devices. To add a module to a chassis: 1. Insert the module into an empty bay and push straight back until it seats onto the connector. 2. Hold the module in place with the thumb screws. Maintaining the ZB1PS Safety Notices This device has passed rigorous testing by Underwriters Laboratories and is UL compliant for CAT II installation in laboratories and other indoor environments. Before applying power to the zBUS caddie, verify that the correct safety precautions are taken. WARNINGS! Read the following warnings prior to operation. If the device is damaged, or fails to operate according to the specifications described in this manual, disconnect the power cord and contact TDT support immediately. Before applying power to the device, you must correctly connect the power cord to a standard socket outlet provided with a protective earth contact. In the event of impaired ground protection, avoid using the device to prevent possible damage. When removing the power cord from either the power supply or socket outlet, grasp the plug, not the cord, in order to avoid damaging the cable. Do not attempt to disassemble the power supply or caddie. If you experience any issues, contact TDT support immediately. Only fuses with the required rated voltage, current, and specified type should be used with this device. Do not attempt to alter or disassemble the power supply fuses. Do not attempt to alter this device in any way that deviates from its intended operation as described in this user manual. System 3 Manual 20-6 The zBus and Power Supply Capacitors contained inside the device may retain their charge even after power has been disconnected from its supply source. Operation of this device in the presence of flammable gases or fumes is strictly prohibited to avoid definite safety hazards. Do not subject this device to excessive amounts of vibration or shocks during handling or shipping, and avoid dropping the device. Although there is a protective screen over the ventilation fan, do not attempt to stick any objects into the fan. This may result in injury or damage the device. Do not attempt to store this device where it may be exposed to prolonged periods of excessive sunlight, high temperatures, high humidity, or condensation. If exposed to such conditions, the device may no longer work properly and its specifications may no longer be satisfied. The device is designed for indoor use only and is not waterproof; do not get the device wet. Do not attempt to use this device in a manner unspecified by TDT. Changing the Power Supply Fuses CAUTION! Only fuses with the required rated current, voltage, and specified type should be used with this device. Use only 500 mA, 250 V rated Time Lag fuses. To change the power supply fuses: 1. Turn off the power switch. 2. Disconnect the power cord from the power supply. 3. Using a flathead screwdriver gently push the fuse plate inward. 4. Once the fuse plate is pressed inward gently turn the screwdriver counterclockwise until the fuse plate tab is visible. 5. Depress the fuse plate and it will pop up. 6. Grab both ends of the fuse plate and slide the fuse housing out of the power supply. 7. Replace the defective/broken fuse with a new 500 mA 250 V rating Time Lag fuse by gently pushing the end of the fuse into the fuse housing. 8. Push the fuse housing back into the power supply again by pressing the screwdriver inward. 9. Rotate the screwdriver clockwise until the fuse tab is correctly locked back into its original position. 10. Repeat for the other fuse if necessary. Cleaning the ZB1PS Chassis To clean the device: 1. Remove power from the ZB1PS chassis. 2. Clean the external surfaces of the device with a soft, dry cloth. 3. Do not attempt to disassemble and clean the inside of the device. System 3 Manual The zBus and Power Supply 20-7 ZB1PS Technical Specifications Chassis Height 1U Width Standard 19’’ rack mount Power Supply (Integrated) Maximum Working Voltage HI to earth ground 230V max LO to earth ground 230V max Main Voltage Rating 115/230 V, 50/60 Hz, 40 VA AC Installation Category CAT II Environmental Operating Temperature 0 to 45°C Storage Temperature 5 to 40°C Humidity 80% for temperatures up to 31°C, decreasing linearly to 50% RH at 40°C Maximum Altitude 2,000 m Pollution Degree 2 (Indoor use only) Power Supply Fuses Time Lag Fuse 239P Series 2 fuses Operating Temperature -55˚C to 125˚C Ampere Rating 0.500 A Voltage Rating 250 V Interrupting Rating 10,000 amperes at 125 VAC, 0.7-0.8 power factor 35 amperes at 250 VAC, 0.7-0.8 power factor System 3 Manual 20-8 The zBus and Power Supply ZB1 Device Caddie and PS25F Power Supply The ZB1 and PS25F are TDT’s legacy zBUS caddie and power supply. The ZB1 device caddie is similar to the newer ZB1PS; however, it does not have onboard power and must be used in conjunction with the PS25F. WARNINGS! The PS25F power supply must be placed in the right hand bay of a ZB1 Device Caddie as you look at the back of the caddie. It can damage the system if it is placed in any other bay. No other power supply can be used to power the zBUS. The two voltage switches should be switched to the mains voltage for your country. For example, in the United States these should both be switched to 115 V. System 3 Manual Part 21 System 3 Utilities System 3 Manual 21-2 System 3 Utlities ~ System 3 Manual System 3 Utlities 21-3 zBUSmon – Bus/Interface Test Utility The zBUS Monitor program is a tool used to test the USB, Gigabit, or Optibit connection to System 3. This program is installed in the C:\TDT\zDrv3 directory by default and a shortcut is added to the TDT Sys3 Directory in the Start menu. The zBUSmon Window When the utility is run a small monitor window is opened. All correctly connected zBUS or builtin device chassis housing a programmable device, such as the RP2 and PA5, are represented in the system diagram. Chassis housing non-programmable devices, such as the SM5 or HB7, are not displayed. Reboot System! The Reboot System! button resets hardware and reloads device drivers. Hardware Reset! The Hardware Reset! button resets connected hardware. Flush zBus! The Flush zBus! button flushes interface line of commands or data. Transfer Test The Transfer Test button tests communication between the TDT modules and the PC. This will test data transfer both to and from the PC. A status bar is displayed indicating how much time is remaining in the test. Click anywhere in the zBUSmon window to end the test early. Show Version Check Box When the Show Version box is checked, the version number of each programmable device's firmware (TDT Microcode) are displayed in the hardware diagram. The microcode version number is shown within parentheses next to each device. For processor devices, the version number shown should be the same as the version number of the TDT Drivers installed on the PC System 3 Manual 21-4 System 3 Utlities (Note: this does not occur in the PA5). The RP2.1 and the RL2 have a 1 in front of the microcode version number. Microcode and driver version numbers should always be the same. Microcode versions displayed with red text are significantly outdated (such as versions older than v62) and should be updated immediately. Show Statistics The zBUSmon program, when used with the Optical Gigabit interface, provides an additional option to view system statistics. When Show Statistics is checked, the window expands to display the amount of data transferred and error codes if necessary. Rebooting the system, resetting the hardware, or cycling power on the zBUS racks will reset the data in the expanded window. System 3 Manual System 3 Utlities 21-5 RPProg - Microcode Update Utility About the Microcode The microcode is low-level software that resides in flash memory on the System 3 processor devices. The microcode contains the DSP instructions for the RPvdsEx processing components. Because the System 3 design allows users to update this software quickly and efficiently, users can take advantage of the latest software tools available without purchasing new equipment or sending devices to our manufacturing facility for upgrades. Updating the Microcode When should the microcode be updated? Every time a new version of RPvdsEx is installed on the host PC, the microcode should be updated on all processors in the system. This includes programmable devices that may have been purchased prior to your new system. New versions of the files need to update the microcode are always included in the TDT Drivers installation. How is the microcode updated? Users must update the microcode using the System 3 Device Programmer (PrgG21K.exe). This program is copied to the host PC during TDT Drivers installation and is stored in the following directory: C:\TDT\RPvdsEx\RPProg. Important Notes: You should not use your PC for other tasks while devices are being reprogrammed. Most processors can be programmed in four minutes; however, the RZ processors may take up to 40 minutes (five minutes per DSP). For instructions on updating an RL2 contact TDT Support. To update the microcode: 1. Run the System 3 Device Programmer. To run the System 3 Device Programmer, click the Start/Programs menu, point to TDT Sys3 and click RPProg. System 3 Manual 21-6 System 3 Utlities 2. Select the Device and System Interface Type. a. Under #1 Connection, select the device type to be programmed from the Dev. Type drop-down list. b. Select your system’s interface type from the Interface drop-down list. Connected devices (of the type selected) will appear in the Device ID dropdown list. 3. Erase (Prepare) the Device. Important Note: High performance processors, such as the RX5, are erased using a different method from other real-time processors. Please note your device type and follow the appropriate procedure for erasing the device. Classic, Single-DSP Processors and Z-Series Processors a. To erase the first device in the list, click the button below the Device ID list under #2 Erase. (Erase Device! or Prepare Device...) A warning message will be displayed. b. Click Yes to continue. When the device has been erased, a message is displayed. c. Click OK. RX-Series Processors a. To erase the device, press and hold the Mode button on the front panel of the device and click Refresh in the programmer window. Release the Mode button. After the device is erased, the display on the device should read: FirmWare: BLANK. After a device is erased it appears in the # 3 Program area. In that list it appears with a generic name such as G21K_1 the remaining programmed devices are renumbered. This can sometimes make it difficult to identify devices if more than one device is erased at a time. Be sure to program this device before erasing others. System 3 Manual System 3 Utlities 4. 21-7 Program the Device a. Click Browse next to the uCode File box, then select the appropriate microcode file for the selected device. File RP2.dxe RP21.dxe RA16.dxe RV8.dxe RMX.dxe RXn.dxe RZn.dxe b. Device RP2 Real-Time Processor RP2.1 Enhanced Real-Time Processor RA16BA Medusa Base Station RV8 Barracuda Processor RM1/RM2 Mobile Processors RX5 Pentusa Base Station RX6 MultiFunction Processor RX7 Micro Stimulator Base Station RX8 Multi I/O Processor Z-Series Processors Click Program Device!. A warning message will be displayed. c. Click Yes to continue. Important! Wait until the device is programmed before doing anything else with your PC. Most processors can be programmed in four minutes; however, the RZ processors may take up to 40 minutes (five minutes per DSP). d. 5. Click OK. The selected Real-Time Processor has now been reprogrammed. Programming Additional Devices If you have additional devices to program, click Refresh, then repeat beginning with Step 2, Select the Device and System Interface Type. System 3 Manual
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