TM02_Engineering_Specification TM02 Engineering Specification
TM02_Engineering_Specification TM02_Engineering_Specification
User Manual: TM02_Engineering_Specification
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ENGINEERING SPE'CIFICATION
CONTINUATION SHEET
TITLE
1.0
System Description
1.1
Gerieral Information
The,~U16/TM02
tape system will consist of between ,one and
eight tape drives and a single electronics package which
will serve 'as an interface between anyone of those drives
and a Massbus controller.
1.2
De'fini'tion
For the purposes of this specification',' the following
'definitions apply:
1.2.1 ' Controller - anY'Massbus controller.
I
1.2.2
Slave - a tape transport.
1.2.2.1 ,Selected Slave - that slave whose select
code appears in bits 0';'2 of the Tape.
Control (TC) Register.
1.2.3
T.M02 - defined operationally. The TM02 electronics
, package interfaces to the controller~· It accepts
commands which a selected slave must execute while
providing the controller with information about the
status of the slave. During data transfers the
TM02 controls fetching, formatting, and· sending of
data. The TM02also oversees the handling of error
conditions 'and slave servicing requirements.
1.2.4
Drive - when bits 0-'2 of the Tape Control Register
in the TM02 contain the select code of an existing
slave, then the Master and the selected slave together become equivalent to what is defin~d as a
IIdrive n in the Massbus Specification., No more than
'one slave may be legally selected ,at anytime~ and
commands cannot be issued tounselected slaves.
However,unselected slaves are able to make impor~
tant status changes known to the controller. (See
'SSC bit of Status Register.)
,
1.3
,
System Configuration
The followingblo~k'diagram illustrates the' configuration
of a TUl 6/TMO 2 tape system:
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TU.IG/TM02. TAPE. SY5TEM·(ONFIGURAT10N
>
a::
IJJ
u..
0
Mac:.s Bus
Lines
TM02
96
SLAVE
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iLl
::l
Z
%:
(J)
iLl
C
0
0
I
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-u
SLAVEN
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.(!)
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o
I
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-zat:
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w
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____ ____ __
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E",GINEERING SPECIFICATION
.TITLE
1.4
--
CONTINUATION SHEET
Applicable Documents
Befol:'e'.reading this document, the reader should familiarize
himself with the Massbus Specification. In addition, at~
tempts· to program the TU16/TM02 system ~hould.beprefaced
by a thoro~gh study of the programming manual for the particular Massbus controller with which the program will,
interface.
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2.0
Commands'Implemented
'2.1
Commands will,beexecuted only if'they are directed to
ONLINE slaves. The following commands will be implemented
on, ,the TUl6 tape system. Functions, codes not listed here
will be treated as illegal functions.
FS
F4,
F3
000
000
000
o
01
o
,10
010
011
0"
1
1
101
1
'1
0
1
1
0
l'
1
1
111
Fl
Ope;ration Name
o
o
o
1
1
1
o
o
o
No-op
Rewind, Offline
Rewind
Drive Clear
write Fi1emark
Erase
Space 'Forward
Space Reverse
write Check Forward
write Check ReYerse
write Forward
Read Forward
Read Reverse
F2
0'
1
o
o
o
o
o
1
1
1
o
o
o
o
o
1
1
2.1.1' The requirement for a "read-in" mode on the
'TU16/TM02 system will engender either one or two
additional commands. Details of the ,"read-in"
cc;>mmands ,and sequencing will be published at a '
later date.
2.'2
Description of Commands
2.2.1
2,.2.2
NO-OP: Causesinunediate reset 6f GO and assertion
of DRY. No tape motion or status change occur's in
the selected slave. No attention generated.
REWIND, OFFLINE: The selected slave begins rewinding and goes OFFLINE. GO i's reset and DRY,
SLA, SSC, and ATA become asserted (SLAand sse are
'asserted because the slave has gone OFFLINE).
Operator intervention is required to bring the slave
back ONLINE.
NOTE: This command generates, only one Att~ntion, ,
whereas a REWIND command may generate either one or
,two Attentions.
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2.2.3 .. REWIND: The selected slave executes a rewind back
to the re,flective strip marking beginning ·of tape
(BOT). Sequencing of a REWIND command proceeds as
follows
'
2.2.3 1
0
. 2.2~302
When a REWIND command·is loaded with GO = 1,
the drive first checks the Settledown
(SDWN) bit in the status Register.
a)
If SDWN = ~, the selected slave immediately begins rewinding •.
b)
If SDWN = 1 (indicating that the selected slave is slowing to a halt after
completion of a prior command) and ,the
last command loaded called for tape
motion in the REVERSE direction, the
selected slave immediately begins
rewinding.
c)
If SDWN = 1 and 'the last command loaded
called for tape motion in the FORWARD
direction, the TM02 delays execution
of the REWIND unti.l SDWN =~, indicating that tWe drive has stopped.
The maximum length of the Settledown
interval on TU16 is 15 milliseconds.
As soon as the slave has recognized the
REWIND command, the drive returns to the
ready stat~ and DRY andATA become asserted.
In cases 2.2.3.1 a) and b), the time from
initiation of the control Bus write sequence which loads the REWIND command until
re-assertion of DRY is less than 2 microseconds. In case c), ·re-asserti,on of DRY
may not occur for up to 15 milliseconds
after initiation of the REWIND sequence.,
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2.2.3.3
Once the selected slave. reaches BQT, it
will cause SLAVE ATTENTION (SLA) to beGome asserted, .in turn ,causing SLAVE
STATUS eHANGE (SSe) and'ATA to become
asserted. If the·selected slave was already at BOT when the REWIND cammandwas .
loaded, the ATA condition generated' in
section 2.2.3.2 and the, ATA condition
generated in section 2.2.3.3 will occur
so close together in .time that they will
be iridistinguishable to the programmer.
2.2.3.4
The following examples will indicate·, the
states of important status bits during
a rewind sequence. For simplicity, the
possibility of SLA and. sse becoming asserted due to status changes in slaves
other than the rewinding slave w~ll not
be treated.
a)
During the time between reception of
the REWIND command. and initiation of
a rewind by the selected slave:
DRY = 91, ATA = 91, sse = 91, SLA = ~,
SDWN = 91 or. I, PIP
91.
=
b)
After initiation of the rewind, if
the selected slave was alre,ady at
Bar: DRY = 1, ATA =1, sse = .1,
SLA = 1, SDWN = 91, PIP = 910
..
'c)
After initiation of the.rewind, if the
selected slave was not at BOT:
DRY = I, ATA = I,. sse = 91, SLA ={4',
SDWN = ¢, PIP = 1 •.
d)
After completion .,of the· rewind, if
the selected: slave was not,already at
BOT:' DRY = I, ATA = I, SLA.= 1,
sse = I, SDWN = 91, .PIP = ¢. (Identical
to case 2.2.3.4 b)
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2.2.3.5
Note that sse is an indication
status changes in .2.E. least one
Thus, it should not be cleared
all slaves'have been polled to
their status.
of
slave.
until
confirm
In a mUlti-slave system the presence of
rewinding slaves on the TM02-TUI6bus does
not interfere with the execution of commands by selected slaves which are not rewinding. Any command recognized as a
legal function by the TUl6 may be issued
to a rewinding slave if DRY = 1. If this
is done, the following sequence of events
will occur:
.~)
When command is loaded, GO becomes
asserted;
b)
Execution of command is deferred 'until '
rewind is complete '(,until PIP becomes
negated); GO remains asserted;
c)
When rewind .reaches completion, PIP
becomes negated and SLA becomes as~
serted; command execution is initiated.
d)
When command reaches completion, ATA
becomes asserted because of prior assertion of SLA.
NOTE THAT, WORST CASE, THIS' SEQUENCE COULD
CAUSE THE ENTIRE TUl6 SYSTEM TO GO BUSY
FOR UP TO 5 MINUTES. IF A DATA TRANSFER
COMMAND IS ISSUED TO A REWINDING SLAVE,
DATA BUS TIMING· RESTRICTIONS MAY BE
VI OLA'I'ED •
2.2.4
DRIVE CLEAR: Performs reset'on TM02 and selected
slq,ve, does not affect unselected slaves. Like any
other command, DRIVE CLEAR can be loaded into the
TUl6/TM02 system only if DRY = 1.
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DRIVE CLEAR command'resets: SLA in selected.slave,
sse '(if no other slaves have current attentiondemanding conditions), IDB,ERR, ATA in STATUS
·Register; resets all 'but bit 6 of MAINTENANCE
Register: resets FCL in TAPE CONTROL Register; resets all bits in ERROR Register ,except bit 14 (UNS),
~nd resets UNS if the TM02 is not experiencing a
, power-fail.
The time from reception of a DRIVE CLEAR command to
re-assertion of DRY = 1 is 2 microseconds (maximum).
If DRIVE CLEAR is issued to a TM02 which is experiencing a power-fail, ATA and ERR will become asserted when DRY becomes asserted. DRIVE CLEAR cannot affect a rewinding .'slave.··
2'.2.5
WRITE FILEMARK: The selected slave writes an extended (3") inter-record gap, a filemark, and
stops. ATA becomes asserted when DRY becomes asserted: EOF will be asserted if a detectable ,file',mark was 'written (this is the normal case).
2.2.6
ERASE: The selected slave writes an extended interrecord gap and stops. ATA becomes asserted when
DRY becomes asserted.
2.2.7
SPACE FORWARD:
The selected slave spaces forward
{lfcDWardsr:E0T) over the n\Unber of records specified
by the contents of the Frame Count Register. Detection of a filemark (EOF) causes a SPACE command
to be aborted.
All data errors are inhibited during, this operation.
DRY becomes asserted when operation is complete and.
a valid inter-record gap found., ATA becomes asserted when DRY asserted.
2.2 8
0
SPACE REVERSE: Like SPACE FORWARD, except that de-,
.tection of BOT or EOF will abort the operation, and
that the direction of tape motion is in the 'reverse
direction (towards BOT)Q
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READ FORWARD/WRITE CHECK FORW~D:
The tape 'system makes no distinction between these
commands.
The tape system reads one record. Data transmission
will normally be terminated by detection of FRAME
COUNT overflow. See Chapter 4 for a discussion of
·.othercauses of transmission terminationsG
2.2.10 READ .REVERSE/WRITE CHECK REVERSE:
This operation is identical to READ (WRITE CHECK)
FORWARD with the following excep~ions: Massbus data
transfers occur in the order sl1.own in Chapter 6, and
tape motion is on the reverse direction.
2.2.11 WRITE:
Transport writes one record while moving forward.
Record length is controlled by. the FRAME COUNT
Register. See Chapter 4 for a discussion of other
types of terminations.
2.3
INIT:_ INIT differs from DRIVE
aspects:
CLEARwi~h
the following
~)
INIT may be issued at anytime,
b)
INIT :~'affects all slaves, not jus t
slave;
. c)
- .
INIT clears EOF in the STATUS
the selected
Regist~r.
INIT resets:
GO, SLA (all slaves), SSC, EOF, IDB, ERR, and ATA in·the
STATUS Register; resets all but bit 6 of MAINTENANCE Register, resets FeL in TAPE CONTROL Register; resets all bits
in ERROR Register except bit 14 (UNS), and resets UNS if
the TM02.is not experiencing a power-fail. INITsets DRY.
INIT, like DRIVE CLEAR, requires 2 microseconds (maximum)
for completion~ If the TM02 is experiencing a power-fail
whenINIT is issued, ATA-and ERR will be asserted at the
completion of the system reset.
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INIT has no effect on a rewinding 'slave, but will halt
a slave which is executing any other command •
. NOTE : Iss.uing an INITduring a wri te operation ruins
the 'record being written. The only safe recovery from
INIT is a rewind.
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3.0
Registers Implemented
3.1 ' The following registers will be, implemented in the TU16
Tape System:
Type
Register
R/W
Read
Read
00
01
02
03
04
05
06
07
10
11
R/W
R/W
R/W'
R~ad
R/W
Read
Read'
3.2
Name'
CONTROL I
~CSI)
,
STATUS (DS)
ERROR '(ER)
MAINTENANCE (MT)
ATTENTION ,SUMMARY (AS)
FRAME COUNTER (FC)
DRIVE TYPE (DT)
TAPE' CONTROL (TC)
CHECK CHARACTER (CC)
SERIAL NUMBER (SN)
Description of Control I Register
The CSI Register ,will be used as, defined in the Massbus
Specification. Loading this register with a GO Bit 'and a
valid function code will initiate a cycle to check for the'
various possible error conditions and, if no errors are
detected, initiate command execution.
, 3.2.'1
Bits in the Control Register
3.2.1.1
BIT 0 - GO BIT:
Loading a "I" in this bit initiates a com ....
mand execution cycle. When this bit is set,
'the selected slave becomes busy, and no
other slaves may be used. This bit is reset
by,·the drive when the 'drive returns to the
DRY condition.
(Logical address of' the
current selected slave is described in TC
Register disctission.) The GO bit is cleared
by an INIT.
3.2.102
BITS 1 to 5 - F1 to F5
Function Code bits (Se~Section 2). INIT
and DRIVE CLEAR have no effect on bits 1-5.
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'3.2 1.3
8
BIT 11 - DRIVE AVAILABLE (DVA)
Always set in TU16.
·3.2.1.4
3.3
For a description of the other CSI bits,
·consult the Massbus spe'cification, and the
various controller spe~ifications.
Description of the STATUS Register:
The ~ta1;.us register indicates the sta~us of various sections
of· the drive. Individual bits which. are generated in' the
selected slave will be followed by (SS). Bits which can be
generated by any slaves will be followed by.(S). Bits which
are generated in the' TM02 will be foll-owed by (M).
3.3.1
Bi£s~in
3.3.1.1
the Status Register:
Bit 0 --SLAVE ATTENTION (SLA)
~
(SS):
Asserted by a selected slave which requires
attention for one of the following reasons:
REWIND complet~d, detection of power fail,
coming ONLINE, going OFFLINE. SLA is
cleared by DRIVE CLEAR or INIT (sections
2 • 2 .4 , 2- • 3 .1 ) .•
3.3.1.2
BIT 1 - BEGINNING OF TAPE (BOT) (SS):
Asserted whenever the selected slave detects the BOT marker •. INIT and DRIVE CLEAR
cannot affect this bit~· _
3.3.1.3
BIT 2 - END OF FILE (EOF) (M):
Asserted when a 'filemark is detected: remains asserted until the next tape motion
-operation is initia.ted. The phase Encoded
filemark written by TUl6 ·consists of 40
characters with zero's i:Q tracks 1, 2, 4,
5, 7, and 8 and with tracks 3, 6, and 9 DC
erased. The NRZI filemark written by the i
TU16 consists of a single character record
followed by the LRC for that record.
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The single record contains octa1 023 on
9-Track slaves and octal 017 on 7-Track
slaves. EOF should be high after the completion of a WRITE FILEMARK command ...
INIT clears EOF, DRIVE CLEAR does not affect
it.
3.3.1 4
0
BIT 3 - IDENTIFICATION BURST (IDB)
(M):
Set on recog~ition of the PE identi~ication
burst o In the forward direction the bit
remains set thru the READING, WRITING, OR
SPACING operation. On a PE tape, IDB should
be asserted after any tape motion operation
which began from BOT. IDB becomes reset
when another command is issued. Cleared by
INIT or DRIVE CLEARo.
3.3.1.5
BIT 4 - SLOWING-SETTLING DOWN (SDWN)
(SS):
This bit is set during the period when tape
motion is stopping. "DRY is asserted on the
leading edge of SDWN. DRIVE CLEAR and INIT.
cannot affect this bit.
3.3,,1.6
BIT 5 - PHASE ENCODED STATUS (PES)
(SS):
This bit reflects the format mode in which
the. formatter is oper.ating. 'PES originates
in the selected slave and in TU16 should be
. identical to BIT 10 in TC register. It is
asserted when selected slave in PEmode,
negated when selected slave in NRZI mode.
DRIVE CLEAR and INIT cannot affect this bit.
(See also bits 8-10 of TAPE CONTROLRegis~·;
ter)
0
3.3.1.7
BIT 6 - SLAVE STATUS CHANGE '(SSC)
(M):
This bit is asserted and latched by the
TM02 whenever any slave has an attention
condition as defined in' Section 3.3.1.1
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Setting sse results in ATA becoming asserted as soon as DRY becomes asserted,
(ATA becomes asserted immediately if DRY
is already asserted.)
INIT always clears sse. DRIVE CLEAR clears
if only the selected slave has a ·current
attention condition. Note that power-fail
in a slave·is a transient attention condition, and that sse should not be cleared
before polling all slaves to confim their
st·atus.
sse
3 '. 3.1.8
BIT 7 - DRIVE READY (DRY) -
(M):
Asserted at completion of any command.
INIT sets DRY.
.
3.301.9
BIT 8 - DRIVE PRESENT (DPR)
(M):
Always asserted in the TUl6 system.
3.3.1.10. BIT 9 - NEUTRAL (NTL)
~(M):
Always negated in the TU16 system.
3.3.1.1IBIT 10 - END OF TAPE (EOT) -
3.3.1.12
(SS):
When the EOT marker is 'recognized during
forward. tape motion, ·th;is, bit is set. It
is reset when the EOT Marker is passed over
during reverse tape motion.
DRIVE C.LEAR and
INIT do not affect EOT.
BIT 11 - WRITE LOCK (WRLl - (SS):
Asserted whenever a reel of .tape without a
write enable ring is loaded on the selected
slave. DRIVE CLEAR and INITcannot affect
this bit ..
3.3.1.13
BIT 12 - MEDIUM ON LINE (MOL) -
(SS):
The selected slave is loaded and the online
switch activated. This condition is neces~
sary for response to any commands, i.e., if
'GO = 1 and MOL =~, cornmandis aborted, and
UNS andATA become asserted. DRIVE CLEAR
and INIT cannot affect this bit.
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'3.3.1.14
BIT 13 - POSITIONING IN PROCESS (PIP) Asserted during SPACE (.M) and REWI~TD (SS)
operations. Cleared by INIT during SPACE
operationsQ Unaffected by DRIVE CLEAR or
INIT during REWIND operations, DRIVE CLEAR
cannot be issued during SPACE operations.
3.3.1.15
BIT 14 - COMPOSITE ERRO~ (ERR) -
(M):
,Asserted whenever any error bit in the,
Error (ER) register is asserted. Reset by
Drive Clear or INIT.' (See Sections 2.2.3.4
and 2.3.)
3.3.1.16
BIT 15 - ATTENTION ACTIVE (ATA) -
(M):
See Section 50
3.4
Description of the ERROR Register. See Section 4 for descriptions of error-handling algorithms.,
3.4.1 'Bits in the ERROR Register
~, 3 .4 .1.1
BIT 0 - ILLEGAL FUNCTION ( ILF) :
Asserted when GO bit is loaded with a 11111,
and BITS F1 to F5 of CSI do not denote a
function implemented by the TU16. Cleared
by INIT or DR;I:iJE CLEAR.
3.4.1.2
BIT 1 - ILLEGAL REGISTER (ILR):
Asserted if the Controll'er addresses a register which is not implemented on the TU16.
No register modification s~ould occur., On
a Control Bus read, all ,zeros are gated onto
CONTROL lines. Cleared by INIT or DRIVE
CLEAR.
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3.4.1.3
BIT 2 - REGISTER'MODIFICATION REFUSED (RMR):
Asserted whenever the controller attempts
to write into any implement'ed TU16 Register
except Register 3 (Maintenance) or Register
4 (Attention Summary),while the GO bit is
asserted. If RMR occurs, the addressed
'register is not modified: ATA becomes asserted as soon as DRy'is asserted. Cleared
by INIT or DRIVE CLEAR."
3.4.104
BIT 3 - MASSBUS PARITY ERROR (PAR):
Asserted whenever a parity error is detec,ted on the Massbus DATA, Lines or CONTROL
Lines when data is being transmitted from
the Controller to the TM02. ATA becomes
asserted as soon as DRY is asserted. No
register modificationshould'occur on
CONTROL bus writes., Cl~ared by INIT or
DRIVE CLEAR.'
3.4.1.5
BIT 4 - FORMAT ERROR (FMT):
Asserted whenever a data transfer command
is loaded with GO = 1 and the tape format
code loaded in the TC Reglster is not implemented on that TM0.2. Tape motion is inhibited: EXC aridEBL are raised. DRyand
ATA become asserted whenEBL becomesnegated. Cleared by INIT or DRIVE CLEAR. '
304.1.6
BIT 5 - FORMATTER PARITY ERROR (FPAR):
Asserted whenever· a parity error is detec- ,
ted during the process of transfonning tape
word images into Massbus word images.
(Will
not be implemented on all tape formats.),
ATA becomes asserted when DRY becomes asserted. Cleared by INIT or DRIVE CLEAR.
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,BIT 6 -INCORRECTABLE DATA ERROR/VPE
',(INC/VPE) :
Asserted when performing a data transfer on,
a PE sl~ve and multiple dead tracks, dead
tracks without parity errors, parity errors
without dead tracks, or skew overflow are
detected.
Asserted when performing a'data transfer on
an NRZ slave and a vertical parity error is
detected. Cleared by DRIVE CLEAR or INIT.
3.4 .. 14»8
BIT 7 - FORMAT ERROR/LR~ (PEF/LRC):
In PE mode this bi t is, asserted whenever an
invalid preamble or postamble is discovered.
In NRZ mode, the bit is asserted when the
LRC character generated from readback data
does not match the LRC character read from
tape. ATA becomes asserted when DRY becomes asserted. Cleared by INIT or DRIVE
CLEAR.
3.4.1.9
BIT 8 - BAD TAPE ERROR (BTE):'",'
Asserted whenever any t~pe characters are
read while the read head is scanning the
first half of the inter-record gap. ATA
becomes asserted when DRY becomes, asserted.
Cleared by INIT or DRIVE CLEAR.
,3.4.1.10
BIT 9 - FRAME COUNT ERROR (FCE):
Asserted whenever a SPACE, READ, or WRITE
terminates and the FRAME'C.oUNTERcontains'
,any number but octal 00'00.' ATA becomes as,;..
serted when DRY becomes asserted. ' Detection of this error is affected by state of
INHIBIT RECORD LENGTH ERROR and IGNORE
FRAME "C()~T bits in TAPE' CONTROL Register •
FCE cleared by INIT o~ DRIVE CLEAR.
(See
IFC bit, section 3.9.8)
SIZE
A
DEC' FORM NO DEC 16-(381)-1022-N370
O~A 108
CODE
NUMBER
SHEET
REV
OF _ _
ENGINEERING SPECIFICATION
TITLE
3.4.1.11
-
CONTINUATION SH~ET
BIT 10 - CORRECTABLE SKEW/ILLEGAL FILE MARK
I(CS/IFM):
In PE mode, this bi:t'is asserted when excessive but correctable skew is detected in
data read back from tape. It is a warning
only, and does not indicate that bad data
was read from tape.
In NRZ mode, this bit is asserted when a
bit pattern is detected on tape which has
the general characteristics of an NRZ fi1emark (specifically,
one-character record
followed by another one-character record
spaced an appropriate distance away from
the first) but which "does riot contain the"
exact data expected in an NRZ filemark.
, When such a bit pattern is detected in NRZ
mode, both EOF in the DSRegister and CS/IFM
in the ER Register will ,become asserted.
a
CS/IFM is cleared by DRIVE CLEAR or INIT.
(See Figure 4.1.3.1.)
3.4.1.12
BIT 11 - NON-EXECUTABLE FUNCTION (NEF):
Asserted whenever one of the following
occurs:
3.4.1.12.1
write operation requested with
WRL status bit asserted.
3.4.1.12.2
SPACE REVERSE or READ,REVERSE
or WRITE CHECK REVERSE requested with'BOT status bit asserted.,
3.4.1012.3
PE!NRZI bit loaded into TC
Register' does not agree with
PES status b~t asserted ~yse1ected slave.'
NUMBER
DEC FO,RM NO DEC 16-(381)-1022-N'370
ORA 108'
SHEET
REV
OF
ENGINEERING SPECIFICATION
· CONTINUATIQN SHEET
TITLE
3.4.1.12.4
SPACE, READ, or WRITE command
is loaded with GO = 1 and· peL
in TAPE CONTROL Register = ~
and IFC in TC Register = fl.
3.4.1.12.5 READ or WRITE coinmand is·loaded
with DEN2 in TAPE CONTROL Register = 0 and FRAME COUNT Register set to two's complement of
1 or 2. angIFC = ~._~iniJJ!~I1l
NRZ_ recoJ;"q :Length :!-.s 3 data
characters. )
Cleared by INIT or DRIVE CLEAR.
304.1·11113 . BIT 12 - DRIVE TIMING ERROR. (DTE):
Asserted whenever one of the following
occurs:
a)
During a WRITE operation, a SCLK signal
was generated, and a WCLKsignal was
not received· in timetoprtivide valid
data for the next tape character written.
b)
A data transfer co~and was load~d into
the TU16/TM02 system while oce = 1.
Case a) can be distinguished from case b)
by looking at. the FRAME. COUNT Register. In
case a), the. Fe Register will have been incremented at least once since.its loading.
In case b), the FC Register will contain the
same number with which it was loaded prior
to the loading of the data transfer command.
Also, DTE during a READ operation can occur
only due to case b)_. DTE is cleared.by
INITor DRIVE CLEAR.
NUMBER
DEC FORM NO
ORA 108
DEC 16-(381)-:-1022-N370
REV
SHEET· _ _ OF. _ _
ENGINEERING SPECifiCATION
..
CONTINUATION SHEET
, TITLE
3.4.1.14
BIT 13-- OPERATION INCOMPLETE (OPI):
Asserted if no record is detected within 7
seconds after initiation of a READ or
SPACE command. Asserted if no record is
detected within 0.7 seconds after initiation of a WRITE command.
(Initiation of a
command == setting GO to 1 with bits F1 to
F5 of CSI Register set to the Function
'Code for that command.)' OPI is cleared by
INIT or DRIVE CLEAR.
3.4.1.15
BIT 14 - DRIVE UNS (UNS):
Asserted if GO = ,I and, MOL in STRegister =
¢. Also asserted if'TM02 detects irmninent
power-fail condition.
(AC LO signal is
asserted, DC LO signal ,not asserted. See
A-SP-5409728-0-8.)
If UNS is caused by GO ='1 while MOL = 0,
i t is cleared by INIT or DRIVE CLEAR. If
UNS is caused by a transient voltage - low
condition, it can be cleared by INIT or
DRIVE CLEAR when voltage returns to an acceptable level. If UNS is caused by a
permanent voltage - low condition, i t cannot be cleared.
(See, Figure 4.1.3.20)
304.1.16
BIT 15 - CORRECTABLE DATA ERROR/CRC ERROR
(COR/CRC):
In PE mode, this bit becomes asserted whenever a tape parity error and a single dead
track occur on the same tape character. In
this case, the data bit in the dead track
is inverted to correct the parity error.
In NRZ m9de" thisbi t is asserted when the
CRe character gerierated from readhack data
does not agree with the CRC read from tape.
COR/CRC is cleared by DRIVE CLEAR or INIT.
(See Figure 4.1.3.1.)
SIZE CODE
A
DEC FORM NO DEC 16-(381)-1022-N310
DRA108
NUMBER
I REV
SHEET _ _ OF _ _
I
ENGINEERING·SPECIFICATION
CONTINUATION SHEET
TITLE
3.4.2
Table 3.4.2 describes those errors which might
reasonably be detected during normal operation
of the TU16/TM02 system.
NUMBER
DEC FORM NO
ORA 108
DEC 16-(381)-1022~N370
SHEET _ _ OF _ _
>
IJJ
0::
~
!
Exc.ep+
AS OR MT
OPERATIONS
1-LL.
0
I
Ct:
LIJ
m
:IE
tLIJ
LIJ.
:1:'
;:)
Z
CI)
to-UJ
C
0
(J
I
~
LIJ
~«
(I)
I--
z
.-
UJ
0::
<:'0
I-La..
0
::t:
en
z
i=
i __Rll__ ' ....
_ _ _ R8__
__RI5__
_ _ _ R12_
_
p, _
~-_ _
.::.
_..Jl$_ _
~
__R7
_ _ _ _ _ _ RO_ _
_. _ _ _ _ ..:.. R4__
~
*If PDP-II 7-Track formats are used on 9-Track
,drives, the contents of the '2, hi9h.-or~er bits
of the ·9-Track tape frames are undefined (i~e.,.
not necessarily 0)5
PACK/UNPACK
MODES IMPLEMENTED·
(cont. )
PDP-IS·
Mode 1:
1I1S.9-Track"
Tape Word positions
. Tape Frames
T~
T7
. T6
TS
LSB
T4
T3
T2
Tl·
TO
1
_ P _ _N2 _ _ _ _ _ _ . ___________ N.9_ _
2
_ P _ _NIO_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ N17_
Mode 2:
"15 Core Dump"
1
_P _
.l6_._.}!.;-. _NO _ _ _ _ .;-. _ _ _ : ___ NS__
2
_ p. _
..J6__ !! __N6
3
_. P _ ~__
_ _ _ _ _ _ :.______ Nil _
li __N12___ ._ _ _ _
~ ___ N17 _
ENGINEERING SPECIFICATION
'CONTI N UATIO NSH EET
TlrLE
6.0.
'l'Mo.2 Specifi¢a.tions·
Maximum.Transfer Rate
(TMo.2 to slave)
(tentative)
Maximum Tr'ansfer Rate
(lS-Bit. M~ssbus Data Words)
Error De'taction
Maximum·Record Length
Minimum Record Length
write t.ock
operat"ing, Environment
120. Kbytes/sec in PDP-lo. 7
TRACK
. FORMAT·
240. Kbytes/sec - all other'formats
. (See NOTE. 1)
Dependent· on·:TM02. - slave transfer rate and.' format used.
See section 3
. 217 bytes, ··1?E or NRZ
1. byte, p~~.' 3 .bytes, ·.NR~.
Dependent upon write lock .signal
from slave
600 F to 95~F
20% to 80% RH, no condensation
vibration
Shock
Power Requirements
D.C.
None.
A.C. - 9o.-i35/l80-27o. VAC,
.47-6~Hz
Installation
Shipping weight
Reliability
(TM02 + slave)
inch pa~el.height
19 inch rack mount
pounds (uncrated)
rate: less
than one
recoverable
error.in
.g
.
. 1 x 10. bitsr-ead.. A recoverable
error is defined as ·an· incorrect
transfer of data from tape that
occurs only once In four successive re.tries •.
Nonrecoverable error rate: les
than 'one error: in 1 J( ld' bits
transferred.
Re~overableer~or
NUMBER
DEC FORM NO DEC 16-(381)-1022-N370
ORA 108
REV
SHEET _ ........ OF _ _
ENGINEERING SPECIFICATION
TITLE
CONTINUATION SHEET
.
(NOTE 1)
'Ability to mix PE slaves of different data
rates on 'TM02 - slave b~s··requi.res. further
evaluation of PE read circuitry •. Maximum
transfer rates specified.~i~· ~esigngoals:
and have. not yet been evaluated.
NUMBER
DEC FORM
"",DA 1no
~o
DEC 16-(381)-l02~370
REV
SHEET _ _ OF _ _
. ENGINEERING S·PE~IFICATION
CONTINUATION SHEET
TITLE
I
I
7.0
Interface
.' 7.1
Specificatio~
Data .BusSignals
7.l~1 ,D,
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