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User Manual: Marking of electronic components, SMD Codes 7702A, 7716A. Datasheets AON7702A, Si7716ADN.

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AON7702A
30V N-Channel MOSFET

SRFET
General Description

TM

Product Summary

SRFETTM AON7702A uses advanced trench technology
with a monolithically integrated Schottky diode to provide
excellent RDS(ON),and low gate charge. This device is
suitable for use as a low side FET in SMPS, load
switching and general purpose applications.

VDS

30V
36A

ID (at VGS=10V)
RDS(ON) (at VGS=10V)

< 10mΩ

RDS(ON) (at VGS = 4.5V)

< 13mΩ

100% UIS Tested
100% Rg Tested

DFN 3x3A
Top View

D
Bottom View

Top View
1

8

2

7

3

6

4

5

SRFETTM
Soft Recovery MOSFET:
Integrated Schottky Diode
G
S

Pin 1

Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage

VGS
TC=25°C

Continuous Drain
Current
Pulsed Drain Current
Continuous Drain
Current

C

V
A

80
13.5

IDSM

TA=70°C

±12
22

IDM
TA=25°C

Units
V

36

ID

TC=100°C

Maximum
30

A

11

Avalanche Current C

IAS, IAR

15

A

Avalanche energy L=0.1mH C
TC=25°C

EAS, EAR

11

mJ

Power Dissipation B

TC=100°C

Power Dissipation A

TA=70°C

TA=25°C

Rev 1: Feb. 2011

3.1

Steady-State
Steady-State

RθJA
RθJC

www.aosmd.com

W

2

TJ, TSTG

Symbol
t ≤ 10s

W

9

PDSM

Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case

23

PD

-55 to 150

Typ
30
60
4.5

°C

Max
40
75
5.4

Units
°C/W
°C/W
°C/W

Page 1 of 6

Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol

Parameter

STATIC PARAMETERS
Drain-Source Breakdown Voltage
BVDSS
IDSS

Zero Gate Voltage Drain Current

Conditions

Min

ID=250µA, VGS=0V
TJ=125°C

100

Gate-Body leakage current

VDS=0V, VGS= ±12V

Gate Threshold Voltage

VDS=VGS ID=250µA

1.2

ID(ON)

On state drain current

VGS=10V, VDS=5V

80

100

nA

2.1

V

8.2

10

12.5

15

VGS=4.5V, ID=11A

9.9

13

Static Drain-Source On-Resistance

TJ=125°C

A

gFS

Forward Transconductance

VDS=5V, ID=13A

80

VSD

Diode Forward Voltage

IS=1A,VGS=0V

0.4

IS

Maximum Body-Diode Continuous Current

DYNAMIC PARAMETERS
Ciss
Input Capacitance
Crss

Reverse Transfer Capacitance

Rg

Gate resistance

mA

1.65

VGS=10V, ID=13A

Output Capacitance

Units
V

0.5

IGSS

Coss

Max

30

VDS=30V, VGS=0V

VGS(th)

RDS(ON)

Typ

mΩ
mΩ
S

0.7

V

30

A

930

1170

1400

pF

VGS=0V, VDS=15V, f=1MHz

90

128

170

pF

45

89

125

pF

VGS=0V, VDS=0V, f=1MHz

0.7

1.4

2.1

Ω

SWITCHING PARAMETERS
Qg(10V) Total Gate Charge

16

20

24

nC

Qg(4.5V) Total Gate Charge

7

8.7

10.5

nC

Qgs

Gate Source Charge

Qgd

Gate Drain Charge

VGS=10V, VDS=15V, ID=13A

tD(on)

Turn-On DelayTime

tr

Turn-On Rise Time

tD(off)

Turn-Off DelayTime

tf

Turn-Off Fall Time

trr

Body Diode Reverse Recovery Time

Qrr

Body Diode Reverse Recovery Charge IF=13A, dI/dt=500A/µs

VGS=10V, VDS=15V, RL=1.2Ω,
RGEN=3Ω

3.2

nC

3

nC

6

ns

2.4

ns

23

ns

4
IF=13A, dI/dt=500A/µs

ns

5.5

7

8.5

5

6.5

8

ns
nC

A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA t ≤ 10s value and the maximum allowed junction temperature of 150°C. The value in any given
application depends on the user's specific board design, and the maximum temperature of 150°C may be u sed if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.
G. The maximum current rating is package limited.
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.

THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.

Rev 1: Feb. 2011

www.aosmd.com

Page 2 of 6

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
35

35
10V

30

VDS=5V

2.75V
30
25

20

20

ID(A)

ID (A)

3V
25

15

15

2.5V
10

10

125°C
25°C

5

5

VGS=2.25V
0

0
0

1

2

3

4

1.5

5

2

2.25

2.5

2.75

3

VGS(Volts)
Figure 2: Transfer Characteristics (Note E)

VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
12
Normalized On-Resistance

2

11
RDS(ON) (mΩ )

1.75

VGS=4.5V

10
9

VGS=10V

8
7

1.8
VGS=10V
ID=13A

1.6
1.4

VGS=4.5V
ID=11A

1.2
1
0.8

6
1

6

11

16

21

0

26

25

ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)

50

75

100

125

150

175

200

Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
1.0E+02

25

1.0E+01

ID=13A
20

125°C

40
125°C

15

IS (A)

RDS(ON) (mΩ )

1.0E+00
1.0E-01
1.0E-02
10

25°C

25°C

1.0E-03

5

1.0E-04
2

4

6

8

10

VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)

Rev 1: Feb. 2011

www.aosmd.com

0.0

0.2

0.4
0.6
0.8
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)

1.0

Page 3 of 6

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1500

10
VDS=15V
ID=13A
Capacitance (pF)

VGS (Volts)

Ciss

1200

8

6

4

900

600

Crss

300

2

Coss
0

0
0

5

10

15

20

0

25

10

20
VDS (Volts)
Figure 8: Capacitance Characteristics

Qg (nC)
Figure 7: Gate-Charge Characteristics
200

1000.0
10µs 10µs

100.0

RDS(ON)
limited

10.0

160

TJ(Max)=150°C
TC=25°C

100µs

1.0

1ms
10ms
DC

TJ(Max)=150°C
TC=25°C

0.1

Power (W)

ID (Amps)

30

17
5
2
10

120
80
40

0.0

0

0.01

0.1

1

10

100

VDS (Volts)

0.0001

0.001

0.01

0.1

1

0

10

Pulse Width (s)
18
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)

Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)

Zθ JC Normalized Transient
Thermal Resistance

10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=5.4°C/W

In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse

40

1

PD

0.1

Ton
T

Single Pulse
0.01
0.00001

0.0001

0.001

0.01

0.1

1

10

100

Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)

Rev 1: Feb. 2011

www.aosmd.com

Page 4 of 6

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100.0

25

Power Dissipation (W)

IAR (A) Peak Avalanche Current

TA=25°C

TA=100°C

TA=150°C

TA=125°C

20

15

10

5

0

10.0

0

1

10
100
1000
Time in avalanche, tA (µ
µs)
Figure 12: Single Pulse Avalanche capability (Note
C)

40

25

50

75
100
125
TCASE (°C)
Figure 13: Power De-rating (Note F)

10000

35

TA=25°C

1000

30
Power (W)

Current rating ID(A)

150

25
20
15

17
5
2
10

100

10

10
5

1
0.00001

0
0

25

50

75
100
125
TCASE (°C)
Figure 14: Current De-rating (Note F)

0.001

0.1

10

150

0
18

1000

Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H)

Zθ JA Normalized Transient
Thermal Resistance

10
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
1

In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse

RθJA=75°C/W

40

0.1
PD
0.01

Single Pulse

Ton
T

0.001
0.00001

0.0001

0.001

0.01

0.1

1

10

100

1000

Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)

Rev 1: Feb. 2011

www.aosmd.com

Page 5 of 6

Gate Charge Test Circuit & Waveform
Vgs
Qg
10V

+
+ Vds

VDC

-

Qgs

Qgd

VDC

-

DUT
Vgs
Ig

Charge

Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%

+ Vdd

DUT

Vgs

VDC

-

Rg

10%

Vgs

Vgs

t d(on)

tr

t d(off)

t on

tf
toff

Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L

2

E AR = 1/2 LIAR

Vds

BVDSS

Vds

Id

+ Vdd

Vgs

Vgs

I AR

VDC

-

Rg

Id

DUT
Vgs

Vgs

Diode Recovery Test Circuit & Waveforms
Q rr = - Idt

Vds +
DUT

Vds Isd
Vgs
Ig

Rev 1: Feb. 2011

Vgs

L

Isd

+ Vdd

t rr

dI/dt
I RM
Vdd

VDC

-

IF

Vds

www.aosmd.com

Page 6 of 6

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