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Preface

Notebook Computer
M740TH/ M748TH
Service Manual
Preface

I

Preface

Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes.

Preface

Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Version 1.0
March 2010

Trademarks
Intel, Celeron and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and /or registered trademarks of their respective companies.

II

Preface

About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the M740TH/
M748TH series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.

Preface

Appendix A, Part Lists
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS

III

Preface

IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment:

Preface

1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19V, 3.42A or 18.5V, 3.5A (65W) minimum AC/DC Adapter.

CAUTION
Always disconnect all telephone lines from the wall outlet before servicing or disassembling this equipment.

TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER,
TELECOMMUNICATION LINE CORD
This Computer’s Optical Device is a Laser Class 1 Product

IV

Preface

Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1.

Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer
to any shock or vibration.

2.

Do not place anything heavy
on the computer.

Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not leave it in a place
where foreign matter or moisture may affect the system.

Don’t use or store the computer in a humid environment.

Do not place the computer on
any surface which will block
the vents.

Preface

Do not expose it to excessive
heat or direct sunlight.

3.

Do not place it on an unstable
surface.

Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power
until you properly shut down
all programs.

Do not turn off any peripheral
devices when the computer is
on.

Do not disassemble the computer by yourself.

Perform routine maintenance
on your computer.

V

Preface
4.
5.

Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data.
Take care when using peripheral devices.
Use only approved brands of
peripherals.

Unplug the power cord before
attaching peripheral devices.

Preface

Power Safety
The computer has specific power requirements:



VI

•
•

Power Safety
Warning

•

Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.

•
•
•

Only use a power adapter approved for use with this computer.
Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
Before cleaning the computer, make sure it is disconnected from any external power supplies.
Do not plug in the power
cord if you are wet.

Do not use the power cord if
it is broken.

Do not place heavy objects
on the power cord.

Preface

Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not remove any batteries from the computer while it is powered on.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.

Preface


Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of
its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal
waste stream. Check with your local solid waste officials for details in your area for recycling options or proper
disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturer’s instructions.

VII

Preface

Related Documents
You may also need to consult the following manual for additional information:

Preface

User’s Manual on CD
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC.

VIII

Preface

Contents
Introduction ..............................................1-1
Overview .........................................................................................1-1
Specifications ..................................................................................1-2
External Locator - Top View with LCD Panel Open ......................1-4
External Locator - Front & Right side Views .................................1-5
External Locator - Left Side & Rear View .....................................1-6
External Locator - Bottom View .....................................................1-7
Mainboard Overview - Top (Key Parts) .........................................1-8
Mainboard Overview - Bottom (Key Parts) ....................................1-9
Mainboard Overview - Top (Connectors) .....................................1-10
Mainboard Overview - Bottom (Connectors) ...............................1-11
Overview .........................................................................................2-1
Maintenance Tools ..........................................................................2-2
Connections .....................................................................................2-2
Maintenance Precautions .................................................................2-3
Disassembly Steps ...........................................................................2-4
Removing the Battery ......................................................................2-5
Removing the Hard Disk Drive .......................................................2-6
Removing the Optical (CD/DVD) Device ......................................2-8
Removing the System Memory (RAM) ..........................................2-9
Removing the Inverter Board ........................................................2-11
Removing and Installing the Processor .........................................2-12
Removing the Wireless LAN Module ...........................................2-15
Removing the Bluetooth Module ..................................................2-16
Removing the Keyboard ................................................................2-17
Removing the Modem ...................................................................2-18

Part Lists ..................................................A-1
Part List Illustration Location ........................................................ A-2

Schematic Diagrams................................. B-1
System Block Diagram ...................................................................B-2
Clock Generator ..............................................................................B-3
Penryn (Socket-P) CPU 1/2 ............................................................B-4
Penryn (Socket-P) CPU 2/2 ............................................................B-5
CANTIGA 1/7, Host .......................................................................B-6
CANTIGA 2/7, Graphics ................................................................B-7
CANTIGA 3/7 ................................................................................B-8
CANTIGA 4/7 ................................................................................B-9
CANTIGA 5/7 ..............................................................................B-10
CANTIGA 6/7 ..............................................................................B-11
CANTIGA 7/7 ..............................................................................B-12
DDRII SO-DIMM - 0 ...................................................................B-13
DDRII SO-DIMM - 1 ...................................................................B-14
Panel, Inverter, CRT .....................................................................B-15
ICH9M 1/4, SATA .......................................................................B-16
ICH9M 2/4, PCI, USB ..................................................................B-17
ICH9M 3/4 ....................................................................................B-18
ICH9M 4/4 ....................................................................................B-19
NEW CARD, MINI PCIE ............................................................B-20
3G, POWERGOOD ......................................................................B-21
USB, FAN, TP, FP, MULTI CON ...............................................B-22
CARD READER(JMB261) ..........................................................B-23
SATA ODD, LED, HOTKEY, LID SW ......................................B-24
LAN(JMB261) ..............................................................................B-25
IX

Preface

Disassembly ...............................................2-1

Top (M740TH) .............................................................................. A-3
Top (M748TH) .............................................................................. A-4
Bottom ........................................................................................... A-5
LCD ............................................................................................... A-6
DVD SUPER-MULTI ................................................................... A-7

Preface

Preface
AUDIO CODEC ALC272 ........................................................... B-26
KPC-ITE IT8502E ....................................................................... B-27
5VS, 3VS, 3.3VM, 1.05VS, V1N1 .............................................. B-28
POWER 3.3V/5V ......................................................................... B-29
POWER 1.5VS/1.05VS ................................................................ B-30
POWER 1.8V/0.9V ...................................................................... B-31
POWER GPU/NVVDD ............................................................... B-32
AC_IN, CHARGE ........................................................................ B-33
VCORE ........................................................................................ B-34
ODD BOARD FOR M760T ........................................................ B-35
CLICK FINGER BOARD FOR M77 .......................................... B-36
MULTI FUNCTION BOARD ..................................................... B-37
AUDIO BOARD .......................................................................... B-38
POWER SWITCH BOARD FOR M76 ....................................... B-39
POWER SWITCH BOARD FOR M74 ....................................... B-40
FINGER BOARD FOR M74 ....................................................... B-41
POWER SWITCH BOARD FOR M76 ....................................... B-42
EXTERNAL ODD BOARD FOR W76 ....................................... B-43

Updating the FLASH ROM BIOS......... C-1
Download the BIOS ........................................................................2-1
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash
drive .................................................................................................2-1
Set the computer to boot from the external drive ............................2-1
Use the flash tools to update the BIOS ...........................................2-2
Restart the computer (booting from the HDD) ...............................2-2

X

Introduction

1: Introduction
Overview
This manual covers the information you need to service or upgrade the M740TH/M748TH series notebook computer.
Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information
about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer.
Operating systems (e.g. Windows Vista/ Window 7, etc.) have their own manuals as do application software (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.

1.Introduction

The M740TH/M748TH series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please note the warning and safety information indicated by the “” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.

Overview 1 - 1

Introduction

Specifications

Latest Specification Information

1.Introduction

The specifications listed in this here are correct
at the time of going to press. Certain items (particularly processor types/speeds) may be
changed, delayed or updated due to the manufacturer's release schedule. Check with your
service center for details.


CPU
The CPU is not a user serviceable part. Accessing the CPU in any way may violate your
warranty.

Processor Options

Security

Intel® Core™2 Duo Processor
T6600 (2.2GHz), T6500 (2.1GHz),
T6400 (2.0GHz)
2MB L2 Cache & 800MHz FSB

Security (Kensington® Type) Lock Slot
BIOS Password

Intel® Pentium® Processor
T4300 (2.1GHz), T4200 (2.0GHz)
1MB L2 Cache & 800MHz FSB

(Factory Option) One Changeable 12.7mm(h) Optical
Device Type (Super Multi Drive Module)
One Changeable 2.5" 9.5 mm (h) SATA (Serial) HDD

Intel® Celeron® Processor
T3100 (1.9GHz), T3000 (1.8GHz)
1MB L2 Cache & 800MHz FSB

Audio

T1700 (1.83GHz), T1600 (1.66GHz)
1MB L2 Cache & 667MHz FSB

High Definition Audio Compliant Interface
2 * Built-In Speakers
Built-In Microphone

900 (2.2GHz)
1MB L2 Cache & 800MHz FSB

Keyboard

Core Logic
Intel® GL40 + ICH9M Chipset

BIOS
One 16Mb SPI Flash ROM
Phoenix™ BIOS

“WinKey” keyboard (with embedded numeric keypad)

Pointing Device
Built-in Touchpad

Interface

Two 200 Pin SO-DIMM Sockets Supporting DDR2 667/
800MHz Memory
Memory Expandable up to 4GB

Three USB 2.0 Ports
One Headphone-Out Jack
One Microphone-In Jack
One S/PDIF Out Jack
One RJ-11 Modem Jack
One RJ-45 LAN Jack
One DC-in Jack
One External Monitor Port
One ExpressCard/34(54) Slot

Video Adapter

Card Reader

Intel® GL40 Integrated Video
Shared Memory Architecture up to 1GB
MS DirectX® 10.0 compatible

Embedded 7-in-1 Card Reader (MS/ MS Pro/ SD/ Mini SD/
MMC/ RS MMC/ MS Duo)
Note: MS Duo/ Mini SD/ RS MMC Cards require a PC
adapter

LCD Options
14.1" WXGA TFT LCD

Memory

1 - 2 Specifications

Storage

Introduction
Communication
56K MDC Modem, V.90 & V.92 Compliant
10Mb/100Mb Ethernet LAN
Wireless LAN Module Options:
(Factory Option) Intel® WiFi Link 5300 (802.11a/g/n)
Wireless LAN Half Mini-Card Module
(Factory Option) Intel® WiFi Link 1000 (802.11b/g/n)
Wireless LAN Half Mini-Card Module
(Factory Option) 3rd Party 802.11b/g/n Wireless LAN Half
Mini-Card Module

1.Introduction

(Factory Option) 1.3M Pixel USB PC Camera Module
(Factory Option) Bluetooth 2.1 + EDR Module
(Factory Option) 3.75G/HSPA Mini-Card Module

Power
6 Cell Smart Lithium-Ion Battery Pack, 48,84WH
(Factory Option) 9 Cell Smart Lithium-Ion Battery Pack,
79,92WH
Full Range AC/DC Adapter
AC Input: 100 - 240V, 50 - 60Hz
DC Output: 19V, 3.42A or 18.5V, 3.5A (65W)

Environmental Spec
Temperature
Operating: 5°C - 35°C
Non-Operating: -20°C - 60°C
Relative Humidity
Operating: 20% - 80%
Non-Operating: 10% - 90%

Dimensions & Weight
336mm (w) * 250mm (d) * 24.8 - 35.7mm (h)
2.2 kg With 6 Cell Battery and ODD

Specifications 1 - 3

Introduction
Figure 1

External Locator - Top View with LCD Panel Open

1.Introduction

Top View
1

1. Optional Built-In
PC Camera
2. LCD
3. Speakers
4. Power Button
5. Hot Key Buttons
6. Keyboard
7. Built-In
Microphone
8. Touchpad &
Buttons
9. LED Indicators

2

3

3
4

5

6

7
8
9

1 - 4 External Locator - Top View with LCD Panel Open

Introduction

External Locator - Front & Right side Views

Figure 2
Front Views
1. LED Power &
Communication
Indicators

1

Right Side Views

1

2

3

4

5

6

7

1. S/PDIF-Out Jack
2. Microphone-In
Jack
3. Headphone-Out
Jack
4. USB 2.0 Port
5. Optical Device
Drive Bay
6. RJ-11 Phone
Jack
7. Security Lock
Slot

External Locator - Front & Right side Views 1 - 5

1.Introduction

Figure 3

Introduction

External Locator - Left Side & Rear View
Figure 4
Left Side View

1

2

3

5
4

1.Introduction

1. DC-In Jack
2. External Monitor
Port
3. RJ-45 LAN Jack
4. Vent
5. 2 * USB 2.0 Ports
6. 7-in-1 Card
Reader
7. ExpressCard Slot

Figure 5
Rear View
1. Battery

1 - 6 External Locator - Left Side & Rear View

1

5

6

7

Introduction

External Locator - Bottom View
Figure 6
Bottom View
1. Battery
2. RAM & CPU Bay
Cover
3. Vent/Fan Intake/
Outlet
4. Hard Disk Bay
Cover

1

1.Introduction

2
3



4

Overheating

3

To prevent your computer from overheating
make sure nothing
blocks the vent/fan intakes while the computer is in use.

External Locator - Bottom View 1 - 7

Introduction
Figure 7

Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts

1.Introduction

1. JMB261
2. KBC ITE IT8502E

1

2

1 - 8 Mainboard Overview - Top (Key Parts)

Introduction

Mainboard Overview - Bottom (Key Parts)

Figure 8
Mainboard Bottom
Key Parts

10

1

9
2

3
4
5

8
6
7

Mainboard Overview - Bottom (Key Parts) 1 - 9

1.Introduction

1. CPU Socket (no
CPU installed)
2. North Bridge
3. Memory Slots
DDR2 SO-DIMM
4. Clock Generator
5. Card Reader
Socket
6. South Bridge
7. Audio Codec
8. SIMLOCK
9. 3.5G Slot
10. Mini-Card Slot
(WLAN Module)

Introduction
Figure 9

Mainboard Overview - Top (Connectors)

1.Introduction

Mainboard Top
Connectors
3

1. USB Port
2. Inverter board
Connector
3. LCD Cable
Connector
4. Keyboard Cable
Connector
5. Audio Board
Connector
6. Microphone
Cable Connector
7. TouchPad Cable
Connector

2

4
1
7

6

1

5

1 - 10 Mainboard Overview - Top (Connectors)

Introduction

Mainboard Overview - Bottom (Connectors)

Figure 10
Mainboard Bottom
Connectors
7

1
2

3

5

6

4

Mainboard Overview - Bottom (Connectors) 1 - 11

1.Introduction

1. BT Cable
Connector
2. Multi Board
Connector
3. CD-ROM
Connector
4. HDD Connector
5. CMOS Bat.
Connector
6. CPU Fan Cable
Connector
7. DC-In Jack

1.Introduction

Introduction

1 - 12

Disassembly

Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the M740TH/ M748TH series notebook’s parts and
subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.

To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a 
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also.


Information

A box with a  will also provide any possible helpful information. A box with a  contains warnings.
An example of these types of boxes are shown in the sidebar.


Warning

Overview 2 - 1

2.Disassembly

Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.

Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).

Maintenance Tools
The following tools are recommended when working on the notebook PC:

2.Disassembly

•
•
•
•
•
•

M3 Philips-head screwdriver
M2.5 Philips-head screwdriver (magnetized)
M2 Philips-head screwdriver
Small flat-head screwdriver
Pair of needle-nose pliers
Anti-static wrist-strap

Connections
Connections within the computer are one of four types:

2 - 2 Overview

Locking collar sockets for ribbon connectors

To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.

Pressure sockets for multi-wire connectors

To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.

Pressure sockets for ribbon connectors

To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.

Board-to-board or multi-pin sockets

To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.

Disassembly

Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions:

Power Safety
Warning
Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.

Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.

Overview 2 - 3

2.Disassembly

1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
components could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight.
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor
the position of magnetized tools (i.e. screwdrivers).
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly
damaged.
5. Be careful with power. Avoid accidental shocks, discharges or explosions.
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies.
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.
6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.



Disassembly

Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.

To remove the Battery:
1. Remove the battery

To remove the Wireless LAN Module:
page 2 - 5

1. Remove the battery
2. Remove the wireless LAN

page 2 - 5
page 2 - 6

To remove the Bluetooth Module:

page 2 - 5
page 2 - 15

To remove the HDD:

2.Disassembly

1. Remove the battery
2. Remove the HDD

1. Remove the battery
2. Remove the Bluetooth

page 2 - 5
page 2 - 16

To remove the Optical Device:
1. Remove the battery
2. Remove the Optical device

page 2 - 5
page 2 - 8

To remove the Keyboard:
1. Remove the battery
2. Remove the keyboard

page 2 - 5
page 2 - 17

To remove the System Memory:
1. Remove the battery
2. Remove the system memory

page 2 - 5
page 2 - 9

To remove the Inverter Board:
1. Remove the battery
2. Remove the inverter board

page 2 - 5
page 2 - 11

To remove and install a Processor:
1. Remove the battery
2. Remove the processor
3. Install the processor

2 - 4 Disassembly Steps

page 2 - 5
page 2 - 12
page 2 - 14

To remove the Modem:
1.
2.
3.
4.
5.
6.

Remove the battery
Remove the HDD
Remove the Optical device
Remove the processor
Remove the keyboard
Remove the modem

page 2 - 5
page 2 - 6
page 2 - 8
page 2 - 12
page 2 - 17
page 2 - 18

Disassembly

Removing the Battery
1.
2.
3.
4.

Turn the computer off, and turn it over.
Slide the latch 1 in the direction of the arrow.
Slide the latch 2 in the direction of the arrow, and hold it in place.
Slide the battery 63 in the direction of the arrow 4 .

Figure 1
Battery Removal
a. Slide the latch and hold
in place.
b. Slide the battery in the direction of the arrow.

a.

2

2.Disassembly

1

b.
3

4


3. Battery

Removing the Battery 2 - 5

Disassembly

Removing the Hard Disk Drive
Figure 2
HDD Assembly
Removal
a. Locate the HDD bay
cover and remove the
screw(s).

The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
(h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in
Chapter 4 of the User’s Manual) when setting up a new hard disk.

Hard Disk Upgrade Process
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screw 1 & 2 .



2.Disassembly

a.

HDD System Warning

1

2

New HDD’s are blank. Before you begin make sure:
You have backed up any
data you want to keep from
your old HDD.
You have all the CD-ROMs
and FDDs required to install
your operating system and
programs.


• 2 Screws

2 - 6 Removing the Hard Disk Drive

If you have access to the internet, download the latest
application and hardware
driver updates for the operating system you plan to install. Copy these to a
removable medium.

Disassembly
3.
4.
5.
6.
7.

Remove the hard disk bay cover 63 .
Grip the tab and slide the hard disk in the direction of arrow 4 .
Lift the hard disk out of the bay 5 .
Remove the screw 6 and the adhesive cover 67 from the hard disk 68 .
Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).

Figure 3
HDD Assembly
Removal (cont’d.)

b.
3
e.

2.Disassembly

6

b. Remove the HDD bay
cover.
c. Grip the tab and slide the
HDD in the direction of
the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screw and
adhesive cover.

7

c.

4

8

d.


5

3. HDD Bay Cover
7. Adhesive Cover
8. HDD

• 1 Screw

Removing the Hard Disk Drive 2 - 7

Disassembly
Figure 4
Optical Device
Removal
a. Remove the screws.
b. Disconnect the fan cable
and remove the cover.
c. Remove the screw.
d. Push the optical device
out off the computer at
point 7.

Removing the Optical (CD/DVD) Device
1.
2.
3.
4.
5.
6.

Turn off the computer, and remove the battery (page 2 - 5).
Locate the component bay cover 1 and remove screws 2 - 4 .
Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
Carefully disconnect the fan cable 5 , and remove the cover 1 .
Remove the screw at point 6 , and use a screwdriver to carefully push out the optical device 8 at point 7 .
Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
7. Restart the computer to allow it to automatically detect the new device.
c.

2.Disassembly

a.
2

3

4

1
6

b.

d.


c.

1. Component Bay Cover
8. Optical Device

8

• 4 Screws
5

2 - 8 Removing the Optical (CD/DVD) Device

1

7

Disassembly

Removing the System Memory (RAM)

Figure 5

The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting
DDR2 667/800MHz. The main memory can be expanded up to 4GB. The SO-DIMM modules supported are 1024MB,
and 2048MB and DDRII Modules. The total memory size is automatically detected by the POST routine once you turn
on your computer.

RAM Module
Removal
a. Remove the screws.
b. Remove the cover.

Memory Upgrade Process
1.
2.
3.
4.

Turn off the computer, remove the battery (page 2 - 5).
Locate the component bay cover 1 , and remove screws 2 - 4 .
Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
Carefully disconnect the fan cable 5 , and remove the cover 1 .



b.

a.
2

3

4
1
1

5

Be careful not to touch
the metal pins on the
module’s connecting
edge. Even the cleanest hands have oils
which can attract particles, and degrade the
module’s
performance.


1. Component Bay
Cover

• 3 Screws

Removing the System Memory (RAM) 2 - 9

2.Disassembly

Contact Warning

Disassembly

Figure 6
RAM Module
Removal (cont’d.)

5. Gently pull the two release latches ( 6 & 7 ) on the sides of the memory socket in the direction indicated by the
arrows (Figure 6c).
d.

c.

c. Pull
the
release
latch(es).
d. Remove the module(s).
e. Properly re-insert the
bay cover pins.

8
6

7

2.Disassembly


Single Memory
Module Installation
If your computer has a
single memory module,
then insert the module
into the Channel 0
(J_DIMM_1) socket. In
this case, this is the lower memory socket (the
socket closest to the
mainboard) as shown in
Figure 6d.

6.
7.
8.
9.

The RAM module(s) 8 will pop-up (Figure 6d), and you can then remove it.
Pull the latches to release the second module if necessary.
Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
will go. DO NOT FORCE the module; it should fit without much pressure.
10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
11. Replace the bay cover and screws (make sure you reconnect the fan cable before screwing down the bay
cover).
Note for M760TUN computers that there are four 9 - 12 cover pins which need to be aligned with slots in the
case, to insure a proper cover fit, before screwing down the bay cover 1 .
e.
9
1



10
11

8. RAM Module(s)
12

12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.

2 - 10 Removing the System Memory (RAM)

Disassembly

Removing the Inverter Board

Figure 7

1. Turn off the computer, and remove the battery (page 2 - 5).
2. Remove any rubber covers, screws 1 - 6 (Figure 7a), then run your finger around the middle of the frame to
carefully unsnap the LCD front panel module 7 from the back.
3. Discharge the remaining system power (see ?$paratext>? below).
4. Remove screw 8 (Figure 7b) from the inverter, and carefully lift the inverter board up slightly.
5. Disconnect cables 9 & 10 (Figure 7c) from the inverter, then remove the inverter 11 (Figure 7d) from the top
case assembly.
a.

2

3

4

5

b.

a. Remove the 6 screws
and unsnap the LCD
front panel module from
the back.
b. Remove the screw and
discharge the remaining
power from the inverter
board and lift the board
up slightly.
c. Disconnect the cables
from the inverter.
d. Remove the inverter.

c.
1

6
9

7


Inverter Power Warning
In order to prevent a short circuit when removing the inverter it is necessary to discharge any remaining system power. To do
so, press the computer’s power button for a
few seconds before disconnecting the inverter cable.

10

d.
11


7. LCD Front Panel
11. Inverter Board

• 6 Screws

Removing the Inverter Board 2 - 11

2.Disassembly

8

Inverter Board
Removal

Disassembly

Removing and Installing the Processor
Figure 8
Processor Removal
a. Remove the cover and
Iocate the heat sink.
b. Remove the screws in
the order indicated.
c. Remove the heat sink.

Processor Removal Procedure
1.
2.
3.
4.

Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
The CPU heat sink will be visible at point A on the mainboard.
Loosen screws 3 , 2 , 1 (Figure 8b) the reverse order to that indicated on the label.
Carefully lift up the heat sink B (Figure 8c) off the computer.
a.

c.

A

2.Disassembly

B

b.

2
3
1


B. Heat Sink

• 3 Screws (Loosen
Only)

2 - 12 Removing and Installing the Processor

Disassembly
5.
6.
7.
8.

Turn the release latch C towards the unlock symbol
, to release the CPU (Figure 9d).
Carefully (it may be hot) lift the CPU D up out of the socket (Figure 9e).
See page 2 - 14 for information on inserting a new CPU.
When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).

Figure 9
Processor Removal
(cont’d)
d. Turn the release latch to
unlock the CPU.
e. Lift the CPU out of the
socket.

d.

C

Unlock

2.Disassembly

C

Lock

e.


D

Caution
The heat sink, and CPU area in
general, contains parts which are
subject to high temperatures. Allow the area time to cool before removing these parts.


D. CPU

Removing and Installing the Processor 2 - 13

Disassembly
Figure 10
Processor
Installation
a. Insert the CPU.
b. Turn the release latch towards the lock symbol.
c. Remove the sticker from
the heat sink and insert
the heat sink.
d. Tighten the screws.

Processor Installation Procedure
1. Insert the CPU A , pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!), and
turn the release latch B towards the lock symbol
(Figure 10b).
2. Remove the sticker C (Figure 10c) from the heat sink.
3. Insert the heat sink D as indicated in Figure 10c.
4. Tighten screws 1 - 3 in the order indicated on the label.
5. Replace the component bay cover and tighten the screws (page 2 - 9).
a.

c.
A

2.Disassembly

C
D

b.

d.

2

D
3


A. CPU
D. Heat Sink

• 3 Screws (Tighten
Only)

2 - 14 Removing and Installing the Processor

B

1

Disassembly

Removing the Wireless LAN Module
1.
2.
3.
4.
5.

Figure 11

Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
The Wireless LAN module will be visible at point 1 on the mainboard.
Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket.
The Wireless LAN module 5 will pop-up.
Lift the Wireless LAN module (Figure 11d) up and off the computer.
b.

a.

d.

1
2

4

a. Remove the cover.
b. Disconnect the cable
and remove the screw.
c. The WLAN module will
pop up.
d. Lift the WLAN module
out.

Note: Make sure you
reconnect the antenna
cable to ‘’1’’ +
‘’2’’socket (Figure
b).

c.


5

5. WLAN Module.

• 1 Screw

Removing the Wireless LAN Module 2 - 15

2.Disassembly

3

5

Wireless LAN
Module Removal

Disassembly
Figure 12
Bluetooth Module
Removal

Removing the Bluetooth Module

1.
2.
3.
a. Remove the screw.
4.
b. Lfit the cover and remove
5.
the screw.
c. Disconnect the cable and
the connector.
d. Lift the Bluetooth module
up off the socket.

Turn off the computer, remove the battery (page 2 - 5).
Locate the Bluetooth bay cover, and remove the screw 1 and cover 2 .
Remove the screw 3 and turn the module over.
Carefully separate the Bluetooth module from the connector 4 and disconnect the cable 5 .
Lift the Bluetooth module 6 (Figure 12c) up and off the computer.
a.

c.

2.Disassembly

5
4

1

b.

d.
2


2. Cover
6. Bluetooth Module

• 2 Screws

2 - 16 Removing the Bluetooth Module

3

6

Disassembly

Removing the Keyboard
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Press the four keyboard latches at the top of the keyboard to elevate the keyboard from its normal position (you
may need to use a small screwdriver to do this).
3. Carefully lift the keyboard 5 up, being careful not to bend the keyboard ribbon cable (Figure 13b).
4. Disconnect the keyboard ribbon cable 6 from the locking collar socket 7 .

a.

c.
1

2

3

Figure 13
Keyboard Removal
a. Press the four latches to
release the keyboard.
b. Lift the keyboard up and
disconnect the cable
from the locking collar.
c. Remove the keyboard.

4

Re-Inserting the Keyboard

b.
6
5
7

5

When re-inserting the
keyboard firstly align
the four keyboard tabs
at the bottom of the
keyboard with the slots
in the case.


5. Keyboard

Removing the Keyboard 2 - 17

2.Disassembly



Disassembly

Figure 14
Modem Removal
a. Remove the screws and
diconnect the cable.
b. Turn the computer over,
remove the screws and
disconnect the cable.

Removing the Modem
1. Turn off the computer, remove the battery (page 2 - 5), HDD (page 2 - 6), component bay cover (page 2 - 9), optical device (page 2 - 8), CPU (page 2 - 12), bluetooth (page 2 - 16) and keyboard (page 2 - 17).
2. Remove screws 1 - 17 from the bottom case.
3. Turn the computer over, remove screws 18 - 19 and disconnect cables 20 - 22 (Figure 15b).

a.

2.Disassembly

1

2

3

4
17

6

5

8

b.

7

22
19

16

9

18

21
20

14

13


• 19 Screws

2 - 18 Removing the Modem

15

12

11

10

Disassembly
4.
5.
6.
7.
8.

Carefully lift the top case 23 up and off the computer (Figure 15d).
Remove screws 24 - 26 (Figure 15e) from the computer.
Remove screws 27 - 28 (Figure 15f) from the modem module.
Lift the modem up and separate the modem from the connector 29 .
Lift the modem 30 off the computer.

Figure 15
Modem Removal
(cont’d.)
d. Lift the cover off the
computer.
e. Remove the screws.
f. Remove the screws and
disconnect the connector.
g. Lift the modem out.

f.

d.

23

2.Disassembly

28
29

27

e.
g.
26

30


23 Top Case
30. Modem

25
24

• 5 Screws

Removing the Modem 2 - 19

2.Disassembly

Disassembly

2 - 20

Part Lists

Appendix A: Part Lists
This appendix breaks down the M740TH/ M748TH series notebook’s construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.

A.Part Lists

Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.

A - 1

Part Lists

Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A- 1
Part List Illustration
Location

A.Part Lists

Parts

A - 2 Part List Illustration Location

PAGES

Top (M740TH)

page A - 3

Top (M748TH)

page A - 4

Bottom

page A - 5

LCD

page A - 6

DVD SUPER-MULTI

page A - 7

Part Lists

Top (M740TH)

Figure A - 1

白色 (無鉛)
無鉛
無電鍍

無鉛
無鉛
無鉛

無鉛

無鉛
無鉛
無鉛
無鉛
無鉛

無鉛
含背膠

無鉛
無鉛
無鉛

Top (M740TH) A - 3

A.Part Lists

Top (M740TH)

Part Lists

Top (M748TH)

A.Part Lists

Figure A - 2
Top (M748TH)

黑色

(無鉛)

無鉛
珍珠黑

無鉛
無鉛

無鉛

無鉛
無鉛
尚盟 無鉛
無鉛
無鉛

無鉛
含背膠

無鉛
無鉛

無鉛
無鉛

A - 4 Top (M748TH)

Part Lists

Bottom

無鉛
無鉛
無鉛

無鉛

無鉛
日東

無鉛

無鉛
無鉛

日東

無鉛
無鉛
無鉛
無鉛

海華

無鉛

微星

變更

無鉛

無鉛
無鉛
(富士弘)無鉛

變更

區加長

Figure A - 3
Bottom

(鼎緯)

無鉛
無鉛
無鉛

日東

無鉛

無鉛
無鉛

無鉛
無鉛
凱碩

無鉛

亞旭

無鉛

無鉛
無鉛
無鉛
無電鍍

無鉛

無鉛
(鼎緯) 無鉛

無鉛
無鉛
無鉛

無鉛
無電鍍

無鉛

無鉛
藍天7 互億

無鉛

凱碩

無鉛

無鉛
無鉛
無鉛
無鉛
無鉛
無電鍍

無鉛
無鉛
(更換背膠)無鉛

無鉛
無鉛
無鉛

導電布

無鉛
無鉛

Bottom A - 5

A.Part Lists

無鉛

Part Lists

LCD

無鉛
無鉛
(世華)無鉛

A.Part Lists

Figure A - 4

無鉛
無鉛

LCD

無鉛

無鉛
無鉛
無鉛
無鉛
(不需重工高壓線)無鉛
無鉛

無鉛

無鉛
(無鋁箔) 世華 無鉛
無鋁箔

無鉛

(無鋁箔)(珍珠黑)
精乘

無鉛
無鉛

無鉛
無鉛
無鉛
地線上移

無鉛

無鉛
無鉛

精乘

無鉛
無鉛

中性

電鑄薄膜鍍亮鉻

無鉛
無鉛

(電鑄薄膜鍍亮鉻) (字體設變為無鉛)

無鉛

無鉛

(設變)

無鉛
無鉛
無鉛

精乘

A - 6 LCD

無鉛

Part Lists

DVD SUPER-MULTI

Figure A - 5

*(非耐落)

無鉛

(志精)

無鉛

內縮

無鉛

內縮 無鉛
（設變)無鉛

DVD SUPER-MULTI A - 7

A.Part Lists

DVD SUPERMULTI

A.Part Lists

Part Lists

A-8

Schematic Diagrams

Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the M740TH/ M748TH notebook’s PCB’s. The following table indicates where
to find the appropriate schematic diagram.
Diagram - Page

Diagram - Page

Diagram - Page

ICH9M 1/4, SATA - Page B - 16

POWER 1.5VS/1.05VS - Page B - 30

Clock Generator - Page B - 3

ICH9M 2/4, PCI, USB - Page B - 17

POWER 1.8V/0.9V - Page B - 31

Penryn (Socket-P) CPU 1/2 - Page B - 4

ICH9M 3/4 - Page B - 18

POWER GPU/NVVDD - Page B - 32

Penryn (Socket-P) CPU 2/2 - Page B - 5

ICH9M 4/4 - Page B - 19

AC_IN, CHARGE - Page B - 33

CANTIGA 1/7, Host - Page B - 6

NEW CARD, MINI PCIE - Page B - 20

VCORE - Page B - 34

CANTIGA 2/7, Graphics - Page B - 7

3G, POWERGOOD - Page B - 21

ODD BOARD FOR M760T - Page B - 35

CANTIGA 3/7 - Page B - 8

USB, FAN, TP, FP, MULTI CON - Page B - 22

CLICK FINGER BOARD FOR M77 - Page B - 36

CANTIGA 4/7 - Page B - 9

CARD READER(JMB261) - Page B - 23

MULTI FUNCTION BOARD - Page B - 37

CANTIGA 5/7 - Page B - 10

SATA ODD, LED, HOTKEY, LID SW - Page B - 24

AUDIO BOARD - Page B - 38

CANTIGA 6/7 - Page B - 11

LAN(JMB261) - Page B - 25

POWER SWITCH BOARD FOR M76 - Page B - 39

CANTIGA 7/7 - Page B - 12

AUDIO CODEC ALC272 - Page B - 26

FINGER BOARD FOR M74 - Page B - 41

DDRII SO-DIMM - 0 - Page B - 13

KPC-ITE IT8502E - Page B - 27

POWER SWITCH BOARD FOR M76 - Page B - 42

DDRII SO-DIMM - 1 - Page B - 14

5VS, 3VS, 3.3VM, 1.05VS, V1N1 - Page B - 28

EXTERNAL ODD BOARD FOR W76 - Page B - 43

Panel, Inverter, CRT - Page B - 15

POWER 3.3V/5V - Page B - 29

Table B - 1
Schematic
Diagrams

B.Schematic Diagrams

System Block Diagram - Page B - 2


Version Note
The schematic diagrams in this chapter
are based upon version 6-7P-M74H6-001.
If your mainboard (or
other boards) are a later version, please
check with the Service
Center for updated diagrams (if required).

B - 1

Schematic Diagrams

System Block Diagram
AC-IN,CHARGER

3.3VS, 5VS,3.3V,5V

CLEVO M7XTH System Blo ck Diag ram

MULTI I/O BOARD
SPK_R, RJ-11, LED
POWER KEY,CCD,LID

POWER GPU

14.318 MHz

Colck Generator
ICS9LPR365BGLF

AUDIO BOARD

B.Schematic Diagrams

PHONE JACK, USB

Intel Penryn
PROCESSOR

Memory Termination

478pins uFCBGA

VDD3,VDD5
DDRII
SO-DIMM0

1.05VS,1.5VS

DDRII
SO-DIMM1

1.8V,0.9VS(VTT_MEM)

FSB
0.5"~5.5"

Sheet 1 of 42
System Block
Diagram

INTERNAL

CRT CONNECTOR

<15"GRAPHICS

CLICK BOARD

TOUCH PAD
Synaptic

LCD CONNECTOR,
IVERTER

810602-1703

INTERNAL

<8"GRAPHICS

667/800/1066 MHz
VTT=1.05T

NORTH BRIDGE
Intel Cantiga
GL40

VCORE
AUDIO BOARD

667/800 MHz
DDR2

SPI

<=8"

128pins LQFP

LPC

1 4*1 4*1 .6 mm

BIOS
SPI
INT. K/B

EC SMBUS
SMART
FAN

Azalia Codec
Realtek
ALC272

AUDIO
AMP.

48pins LQFP

TPA6017A2

INT SPK L

9*9 *1.6 mm

MDC CON

SYSTEM SMBUS

SOUTH BRIDGE
ICH9M

0.1"~13

INT MIC

AZALIA LINK

24 MHz

67 6 mBGA
100 MHz

PCIE
THERMAL
SENSOR

HP
OUT

INT SPK R

AZALIA
MDC
MODULE

DMI

33 MHz

0.5"~11"

MIC
IN

1329 Ball FCBG A

32.768 KHz

EC
ITE 8502E

SPDIF
OUT

RJ-11

<12"

SMART
BATTERY
32.768KHz

SATA I/II 3.0Gb/s

USB2.0

<12"

480 Mbps

New Card
SOCKET
(USB3)

3G CARD
(USB4)

Mini PCIE
SOCKET
(USB5)

LAN / CARD READER

JMB261

(Optional)

1"~16"

FINGER PRINTER BOARD

SATA ODD
USB0

SATA HDD

B - 2 System Block Diagram

USB2

USB1

AUDIO
BOARD

Bluetooth
(USB6)

CCD
(USB7)

(USB7)
FingerPrint

GOLAN

12 MHz
(Optional)

MINI PCIE

RJ-45

7IN1
SOCKET

Schematic Diagrams

Clock Generator
CLOCK GENERATOR

1 .0 5 V S

1 . 0 5V S _ C L K
L7 1

3 .3 V S

*H C B 10 0 5 K F -1 2 1 T2 0 _ 1 0 mi l _ s ho rt

C8 2 0

C 796

1 0u _ 6 . 3 V _ X 5R _ 0 6

1 u _ 6 . 3 V _ X5 R _ 04

C 8 13

C8 0 6

C 8 19

C 821

C 816

C8 1 5

C 8 23

1 u _ 6. 3V _X 5 R _0 4

.1 U_ 1 6 V _ 0 4

. 1 U _1 6 V _ 0 4

. 1U _ 1 6V _0 4

. 1 U _ 16 V _ 0 4

10 u _ 6 . 3 V _ X5 R _ 06

1 u _ 6 . 3V _X 5 R _0 4

3 .3 V S _ G

40m ils

PLACE CRYSTAL WITHIN 500
MILS

L72
C7 9 3

12
20
26
36
45
49
2 7P _5 0 V _ 0 4

T 2 54

Z1220

48

XT A L _ I N

60

XT A L _ OU T

59

10mil

CL K _ IC H4 8

R 21 2

33_04

C LK _B S E L 0

R 21 3

2 . 2 1 K _ 1 % _0 4 F S LA

17
17

C L K_ BSEL 1
1 0 K_ 0 4
33_04
F S LC

R 64 8
R 64 9

C LK _B S E L 2
C LK _I C H 14

CL K _ IC H1 4

10
57
62
37
38

P M_ S T P C P U #
P M _ S T P P CI#
R 2 21

PC L K_ KBC

PC L K_ KBC

R 652
R 653

3 .3 V S

33 _ 0 4

1 0K _0 4
*1 0 K _ 0 4

PC L KKBC

Z1203

5

4

T252

Z1204

3

T253

Z1205

1

I C S R E Q_ S E L

6

Zo=55 Ohm
R 49 7
R 60 6

3 .3 V S

16

R5 0 9
R6 5 7

P CL K _ IC H

* 10 K _ 0 4
1 0 K_ 0 4
33_04
* 10 K _ 0 4

P CL K IC H

C4 4 2

7
64
63

1 2, 1 3 , 1 7 I C H _ S M B C L K 0
1 2, 1 3 , 1 7 I C H _ S M B D A T0
3 .3 V S

1 7 CL K _ P W R G D

R2 1 9

1 00 K _ 0 4

R2 2 0

0_04

.1 U_ 1 6 V _ 0 4

X1

C P U0
C P U 0#

X2

S R C4
S R C 4#

V T T _ P W R _G D

56

U S B _4 8 M H z / F S L A

R E F 0/ F S L C / E S T _S E L

C 748

C 81 7

. 1 U _ 16 V _ 0 4

.1 U_ 1 6 V _ 0 4

C L K _ MC H _ B C L K
C L K _ MC H _ B C L K #

54
53

C L K _ CP U _ B CL K
C L K _ CP U _ B CL K #

27
28

C L K _ P C I E _G L A N
C L K _ P C I E _G L A N #

24
25

C L K _ P C I E _I C H
C L K _ P C I E _I C H #

44
43

S R C7 /C R# _ F
S R C 7# / C R # _ E

C P U _ S T OP #
P C I _S TO P #

51
50

33
32

S R C1 1 /C R# _ H
S R C1 1 # /C R# _ G

F S L B / T E S T _ M OD E

S R C9
S R C 9#

P CI 3
S RC 2 /S A T A
S R C2 # /S A T A #
P C I 2/ T M E
S R C6
S R C 6#

C4 7 3

*1 0 P _ 5 0 V _ 04

P CL K _ IC H

C7 4 3

C7 6 5

C 797

*1 0 P _ 5 0 V _ 04

. 1 U _ 1 6 V _ 04

. 1 U _ 16 V _ 0 4

Layout note:
Place terminationclose to
ICS

Z122 1

C LK _M C H _ B C LK 5
C LK _M C H _ B C LK # 5
C LK _C P U _ B C L K 3
C LK _C P U _ B C L K # 3

C LK _P C I E _ G L A N 22
C LK _P C I E _ G L A N # 2 2
C LK _P C I E _ I C H 16
C LK _P C I E _ I C H # 1 6

R6 4 6
R6 4 7

4 7 0_ 0 4
4 7 0_ 0 4

R6 6 0

4 7 0_ 0 4

M C H _ C L K R E Q# 7
W L A N _ C L K R E Q # 19 , 2 0
N E W C A R D _ C L K R E Q # 19

Sheet 2 of 42
Clock Generator

SL Zdiff=100 Ohm
MS Zdiff=95 Ohm

T255

30
31

C L K _ P C I E _M I N I
C L K _ P C I E _M I N I #

21
22

C L K_ SATA
C L K_ SATA#

41
40

C L K _ P C I E _M I N I _ 3G
C L K _ P C I E _M I N I _ 3G #

34
35

C L K _ P C I E _3 G P L L
C L K _ P C I E _3 G P L L #

47
46

C L K _ P C I E _N E W _ C A R D
C L K _ P C I E _N E W _ C A R D #

17
18

CL K _ DR E F S S
CL K _ DR E F S S #

13
14

CL K _ DR E F
CL K _ DR E F #

C LK _P C I E _ M I N I 1 9
C LK _P C I E _ M I N I # 19
C LK _S A T A 1 5
C LK _S A T A # 1 5
C LK _P C I E _ M I N I _3 G 2 0
C LK _P C I E _ M I N I _3 G # 2 0

P C I 1/ C R #_ B
S R C 10
S R C 1 0#

P C I 0/ C R #_ A

S R C8 /IT P
S R C 8# / I T P #

P C I 4/ 2 7 _ S e l ec t

C LK _P C I E _ 3 G P L L 7
C LK _P C I E _ 3 G P L L# 7

C LK _P C I E _ N E W _ C A R D 1 9
C LK _P C I E _ N E W _ C A R D # 1 9

P CI F 5 /IT P _ E N
2 7 MH z_ N o nS S / S R C 1 / S E 1
27 M H z _ S S / S R C 1 # / S E 2

S CL K
S D A TA

C LK _D R E F S S 7
C LK _D R E F S S # 7

CK _ P W RG D/P D#

C 47 2
*. 1U _ 1 0V _X 7 R _0 4

S R C 0 / D OT T _ 96
S R C 0# / D OT C _ 96

8
11
15
19
23
29
42
52
58

EMI

6-02-08510-EL0
6-02-09635-EL0

C P U1
C P U 1#

S R C3 /C R# _ C
S R C3 # /C R# _ D

C LK _I C H 48

Zo=55 Ohm

NC

G ND P CI
GN D 4 8
G ND
GN D
GN D S R C 1
G ND S RC 2
GN D S R C 3
G ND C P U
G ND RE F

C7 2 9

2 7 P _ 50 V _ 0 4

26

*1 0 P _ 5 0 V _ 04

P CL K _ K B C

* H C B 1 0 0 5K F -1 2 1T 2 0 _ 10 m i l _s h o rt

U 24

V DD P C I
V D D 48
V D DP L L 3
V DD S R C
V D DC P U
V D DR E F

1 4 . 3 18 M H z
C 72 8

17

*1 0 P _ 5 0 V _ 04

C4 7 1

C LK _D R E F 7
C LK _D R E F # 7

S L G 8S P 5 10 T

MCH PCICLK: SRC10 / SRC10#
SRC11/CR#H MCHCLKREQ#
MINI PCIECLK: SRC9 / SRC9#
SRC11#/CR#G MINICLKREQ#
NEWCARD PCIECLK: SRC8/ITP / SRC8#/ITP#
SRC7#/CR#F

SLG8SP510T
ICS9LPR365BGLF

R 663

*1 K _ 0 4

3 .3 V S

R 6 59

1 0 K _ 04

W L A N _C L K R E Q#

FSC

FSB

FSA

CK505

BSEL2

BSEL1

BSEL0

0

0

1

Host Clock
Frequency
133 MHz

0

1

1

166 MHz

667 MHz

0

1

0

200 MHz

800 MHz

0

0

0

266 MHz

1066 MHz

3 .3 V S
1 .0 5 V S

3 , 6 , 7, 10 , 1 2 , 1 3 , 14 , 1 5 , 1 6 , 1 7, 18 , 1 9 , 2 1 , 2 2, 2 3 , 2 5 , 2 6, 27 , 3 3
3 , 4 , 5, 7, 9 , 1 0 , 1 5 , 1 8, 2 9 , 3 1

533 MHz

1 .0 5 V S
C P U_ S W 1
F H D S -0 2 F -T -T / R
3
2
1 .0 5 V S

4

MC H _ B S E L1

1

M C H_ B S E L 2 7
1
2
3
4

7

R6 6 1
1K _0 4

R 662

*0 _ 0 4

R N1 4
8 P 4 R X1 K _ 0 4

R2 1 4
8
7
6
5

*5 6 _ 04
3

C L K_ BSEL 0

CP U _ B S E L 0

3
R 2 07

1K _0 4

C L K_ BSEL 1

C P U_ B S E L 1

R2 0 6

R 205

*0 _ 0 4

R 494

*0 _ 0 4

1K _0 4
3
MC H _B S E L 0 7

C L K_ BSEL 2

C P U_ B S E L 2

Clock Generator B - 3

B.Schematic Diagrams

V DD _ IO
V D D P L L3 _ I O
V D DS R C_ IO 1
V D D S R C _ I O2
V D D S R C _I O3
V DD C P U_ IO

1

2
9
16
39
55
61

1u _ 6 . 3 V _ X 5R _ 0 4

X2

17

C4 3 2

C L K _ ICH 4 8

3 .3 V S

Layout note:

2

C L K _ ICH 1 4

Schematic Diagrams

Penryn (Socket-P) CPU 1/2

<12inches
15

5

H _A D S T B # 1

15

H _A 20 M #

A 6
A 5
C 4

H_ F E R R#
15

H _I GN N E #

15
15
15
15

H
H
H
H

D 5
C 6
B 4
A 3

_S TP C L K #
_I N T R
_N M I
_S MI #
C
C
C
C
C
C
C
C
C

P UR
P UR
P UR
P UR
P UR
P UR
P UR
P UR
P UR

SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD

01
02
03
04
05
06
07
08
09

M4
N 5
T2
V 3
B 2
D 2
D 22
D 3
F 6

A 2 0 M#
F E R R#
I GN N E #
S T P C LK #
L INT 0
L INT 1
SM I#
VD[0 1 ]
VD[0 2 ]
VD[0 3 ]
VD[0 4 ]
VD[0 5 ]
VD[0 6 ]
VD[0 7 ]
VD[0 8 ]
VD[0 9 ]

HIT #
H I T M#
B P M[ 0 ] #
B P M[ 1 ] #
B P M[ 2 ] #
B P M[ 3 ] #
P RD Y #
P R E Q#
TC K
TD I
TD O
TM S
T RS T #
D B R#

H_ B R 0 #

H_ IN IT #

D4
D3
D1
C4
C2
C1
C5
A6
B3
B5
B6
20

H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H

5

15

Zo= 55O ? 5 %

H_ L O CK # 5

1
3
4
3
2

H_ C P UR S T # 5
H_ R S # 0
5
H_ R S # 1
5
H_ R S # 2
5
H_ T R DY # 5

G 6
E 4
A
A
A
A
A
A
A
A
A
A
A
C

H _D # [ 6 3: 0]

H_ IE R R #

H 4
C
F
F
G
G

U 22 B
5

H_ D E F E R # 5
H_ D RD Y # 5
H_ D B S Y # 5

F 1
D 20
B 3

5
5
5

H_ H IT #
H _ H I T M#

H_CPURST#

5
5

1" 50 mils
preferred) away from any other toggling
signal.
_ DP RS T P # 7 ,1 5 ,3 3
_ DP S L P # 1 5
_ DP W R# 5
_ P W R GD 1 5 H_PWRGD <12" (CPU TO ICH9M)
_ CP US L P # 5
SI#
33

0.5" Max, Zo=27.4 Ohms
0.5" Max, Zo=55
Ohms
is 18 mils wide trace for outer
mils wide trace if on internal

C OM P 0
C OM P 1
C OM P 2
C OM P 3

V DD 3

NEAR EC

R2 8

R 29

R3 9 5

R 3 97

5 4. 9_ 1 % _ 0 4

2 7 . 4 _ 1 %_ 0 4

5 4. 9_ 1 % _ 0 4

2 7 . 4 _ 1% _ 0 4

*2 0 m li _ s ho rt
1
2
3
4

R 154

R2 6
U2 6
AA1
Y1

5

Layout note:

THERMAL SENSER

H _I E R R #
H _P R E Q #
H _P R O C H OT #

H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D

H _D # [ 6 3: 0]

TO POWER PAGE

If PROCHOT# is routed between CPU, IMVP and MCH,
pull-up resistor has to be 68 ohm ? 5%. If not
use, pull-up resistor has to be 56 ohm ? 5%

5 4 . 9 _ 1% _ 0 4
5 4 . 9 _ 1% _ 0 4
5 4 . 9 _ 1% _ 0 4

AE2 4
AD2 4
AA2 1
AB2 2
AB2 1
AC2 6
AD2 0
AE2 2
AF 2 3
AC2 5
AE2 1
AD2 1
AC2 2
AD2 3
AF 2 2
AC2 3
AE2 5
AF 2 4
AC2 0

# 32
# 33
# 34
# 35
# 36
# 37
# 38
# 39
# 40
# 41
# 42
# 43
# 44
# 45
# 46
# 47
H _ D S TB N # 2 5
H _ D S TB P # 2 5
H _ DIN V # 2 5

COMP0, COMP2:
COMP1, COMP3:
Best estimate
layers and 14
layers.

R 3 94
2 K _ 1 % _ 04

R5 7
R3 2
R6 0

H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D
H_ D

P e n ry n

DESIGN GUIDE P.65

1 .0 5 VS

Y2 2
AB2 4
V2 4
V2 6
V2 3
T2 2
U2 5
U2 3
Y2 5
W22
Y2 3
W24
W25
AA2 3
AA2 4
AB2 5
Y2 6
AA2 6
U2 2

C 2 01

R N 13
8 P 4 R X 4 . 7K _0 4

1 U _6 . 3 V _ 0 4

R 74
* 1 0K _0 4

8
7
6
5

B.Schematic Diagrams

H _ A # [ 3 5: 3]

H_ R
H_ R
H_ R
H_ R
H_ R

A DS#
B N R#
BP RI#

A[3 ]#
A[4 ]#
A[5 ]#
A[6 ]#
A[7 ]#
A[8 ]#
A[9 ]#
A[1 0 ]#
A[1 1 ]#
A[1 2 ]#
A[1 3 ]#
A[1 4 ]#
A[1 5 ]#
A[1 6 ]#
AD ST B[0 ]#

DATA GRP 0

5

J4
L5
L4
K 5
M3
N 2
J1
N 3
P 5
P 2
L2
P 4
P 1
R 1
M1

ADDR
GROUP_1

Sheet 3 of 42
Penryn (Socket-P)
CPU 1/2

H _ A D S TB #0
H _ RE Q # [4 :0 ]

H_ A # 3
H_ A # 4
H_ A # 5
H_ A # 6
H_ A # 7
H_ A # 8
H_ A # 9
H_ A # 1 0
H_ A # 1 1
H_ A # 1 2
H_ A # 1 3
H_ A # 1 4
H_ A # 1 5
H_ A # 1 6

ADDR
GROUP_0

5
5

U 22 A

H _A #[ 3 5 : 3 ]

RESERVED

5

U 6
1
2

H _ TH E R MD A
3 .3 VS
R5 6

* 1K _0 4

T HE RM
AL ER T

D G ND

S D A TA
S C LK

T H E R M _A LE R T # 2 6

4
6

D6
C

S C S 7 51 V -4 0
A

C 1 98
1 0 0 0 P _ 50 V _ 0 4

IT P_ DB RST #
H _ TH E R MD C

3
5

W 83 L 7 7 1 A W G

H_TDI
Circult: 54.9 ohm check 150 ohm

Layout Note:
Route H_THERMDA and
H_THERMDC on same layer.
10 mil trace on 10 mil spacing.

B - 4 Penryn (Socket-P) CPU 1/2

VD D
D +

Layout Note:
Near to Thermal
IC

7
8

S MD _C P U _ TH E R M 2 6
S MC _C P U _ TH E R M 2 6

P M _ TH R M # 1 7

1 4, 15 , 1 6 , 1 7 , 1 8, 19 , 2 0 , 2 1 , 2 2, 2 3 , 2 7 , 2 9 , 30 3 . 3 V
1 5 , 1 9, 23 , 2 6 , 2 7 , 2 8, 3 2 V D D 3
2, 4 , 5 , 7 , 9 , 1 0 , 1 5, 18 , 2 9 , 3 1 1 . 0 5V S
2 , 6, 7, 1 0 , 1 2 , 1 3 , 14 , 1 5 , 1 6 , 1 7 , 18 , 1 9 , 2 1 , 2 2, 23 , 2 5 , 2 6 , 2 7, 3 3 3 . 3 V S

Schematic Diagrams

Penryn (Socket-P) CPU 2/2
PLACE NEAR CPU
V CO R E

U2 2 D

V C OR E

V CO R E
U 22 C
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC

C[0 0 1 ]
C[0 0 2 ]
C[0 0 3 ]
C[0 0 4 ]
C[0 0 5 ]
C[0 0 6 ]
C[0 0 7 ]
C[0 0 8 ]
C[0 0 9 ]
C[0 1 0 ]
C[0 1 1 ]
C[0 1 2 ]
C[0 1 3 ]
C[0 1 4 ]
C[0 1 5 ]
C[0 1 6 ]
C[0 1 7 ]
C[0 1 8 ]
C[0 1 9 ]
C[0 2 0 ]
C[0 2 1 ]
C[0 2 2 ]
C[0 2 3 ]
C[0 2 4 ]
C[0 2 5 ]
C[0 2 6 ]
C[0 2 7 ]
C[0 2 8 ]
C[0 2 9 ]
C[0 3 0 ]
C[0 3 1 ]
C[0 3 2 ]
C[0 3 3 ]
C[0 3 4 ]
C[0 3 5 ]
C[0 3 6 ]
C[0 3 7 ]
C[0 3 8 ]
C[0 3 9 ]
C[0 4 0 ]
C[0 4 1 ]
C[0 4 2 ]
C[0 4 3 ]
C[0 4 4 ]
C[0 4 5 ]
C[0 4 6 ]
C[0 4 7 ]
C[0 4 8 ]
C[0 4 9 ]
C[0 5 0 ]
C[0 5 1 ]
C[0 5 2 ]
C[0 5 3 ]
C[0 5 4 ]
C[0 5 5 ]
C[0 5 6 ]
C[0 5 7 ]
C[0 5 8 ]
C[0 5 9 ]
C[0 6 0 ]
C[0 6 1 ]
C[0 6 2 ]
C[0 6 3 ]
C[0 6 4 ]
C[0 6 5 ]
C[0 6 6 ]
C[0 6 7 ]

V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC

C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C

AB2 0
AB7
AC 7
AC 9
AC 1 2
AC 1 3
AC 1 5
AC 1 7
AC 1 8
AD 7
AD 9
AD 1 0
AD 1 2
AD 1 4
AD 1 5
AD 1 7
AD 1 8
AE9
AE1 0
AE1 2
AE1 3
AE1 5
AE1 7
AE1 8
AE2 0
AF9
AF1 0
AF1 2
AF1 4
AF1 5
AF1 7
AF1 8
AF2 0

[0 6 8 ]
[0 6 9 ]
[0 7 0 ]
[0 7 1 ]
[0 7 2 ]
[0 7 3 ]
[0 7 4 ]
[0 7 5 ]
[0 7 6 ]
[0 7 7 ]
[0 7 8 ]
[0 7 9 ]
[0 8 0 ]
[0 8 1 ]
[0 8 2 ]
[0 8 3 ]
[0 8 4 ]
[0 8 5 ]
[0 8 6 ]
[0 8 7 ]
[0 8 8 ]
[0 8 9 ]
[0 9 0 ]
[0 9 1 ]
[0 9 2 ]
[0 9 3 ]
[0 9 4 ]
[0 9 5 ]
[0 9 6 ]
[0 9 7 ]
[0 9 8 ]
[0 9 9 ]
[1 0 0 ]

1 .0 5 V S

1 .5 V S

Layout note:

20mils
C 645

C6 5 3

1 0 U_ 1 0 V _ 0 8

PLACE AS CLOSE
AS POSSIBLE TO
THE CPU VCCA PIN

. 01 U _ 5 0V _X 7 R _ 04

B2 6
C 26

V C C A [0 1 ]
V C C A [0 2 ]
VID
VID
VID
VID
VID
VID
VID

80mils

G 21
V6
J6
K6
M6
J21
K2 1
M 21
N 21
N 6
R 21
R 6
T21
T6
V2 1
W21

P [0 1 ]
P [0 2 ]
P [0 3 ]
P [0 4 ]
P [0 5 ]
P [0 6 ]
P [0 7 ]
P [0 8 ]
P [0 9 ]
P [1 0 ]
P [1 1 ]
P [1 2 ]
P [1 3 ]
P [1 4 ]
P [1 5 ]
P [1 6 ]

AD 6
AF5
AE5
AF4
AE3
AF3
AE2

[0 ]
[1 ]
[2 ]
[3 ]
[4 ]
[5 ]
[6 ]

H
H
H
H
H
H
H

_ V ID
_ V ID
_ V ID
_ V ID
_ V ID
_ V ID
_ V ID

0
1
2
3
4
5
6

33
33
33
33
33
33
33

V C CS ENS E

AF7
V C CS E NS E

V S S S E NS E

AE7

VS SS E NSE

TO POWER PAGE

V C CS E NS E

33

VSS SEN SE 3 3

P e n ry n
.

R 14

R 13

Layout note:
1 0 0 _1 % _ 0 6
V C OR E

1 0 0_ 1 % _ 0 6

Route VCCSENSE and
VSSSENSE traces at 27.4Ohm
with 50 mil spacing.
Place PU and PD within 1
inch of CPU.

V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V

S S[0 0 1 ]
S S[0 0 2 ]
S S[0 0 3 ]
S S[0 0 4 ]
S S[0 0 5 ]
S S[0 0 6 ]
S S[0 0 7 ]
S S[0 0 8 ]
S S[0 0 9 ]
S S[0 1 0 ]
S S[0 1 1 ]
S S[0 1 2 ]
S S[0 1 3 ]
S S[0 1 4 ]
S S[0 1 5 ]
S S[0 1 6 ]
S S[0 1 7 ]
S S[0 1 8 ]
S S[0 1 9 ]
S S[0 2 0 ]
S S[0 2 1 ]
S S[0 2 2 ]
S S[0 2 3 ]
S S[0 2 4 ]
S S[0 2 5 ]
S S[0 2 6 ]
S S[0 2 7 ]
S S[0 2 8 ]
S S[0 2 9 ]
S S[0 3 0 ]
S S[0 3 1 ]
S S[0 3 2 ]
S S[0 3 3 ]
S S[0 3 4 ]
S S[0 3 5 ]
S S[0 3 6 ]
S S[0 3 7 ]
S S[0 3 8 ]
S S[0 3 9 ]
S S[0 4 0 ]
S S[0 4 1 ]
S S[0 4 2 ]
S S[0 4 3 ]
S S[0 4 4 ]
S S[0 4 5 ]
S S[0 4 6 ]
S S[0 4 7 ]
S S[0 4 8 ]
S S[0 4 9 ]
S S[0 5 0 ]
S S[0 5 1 ]
S S[0 5 2 ]
S S[0 5 3 ]
S S[0 5 4 ]
S S[0 5 5 ]
S S[0 5 6 ]
S S[0 5 7 ]
S S[0 5 8 ]
S S[0 5 9 ]
S S[0 6 0 ]
S S[0 6 1 ]
S S[0 6 2 ]
S S[0 6 3 ]
S S[0 6 4 ]
S S[0 6 5 ]
S S[0 6 6 ]
S S[0 6 7 ]
S S[0 6 8 ]
S S[0 6 9 ]
S S[0 7 0 ]
S S[0 7 1 ]
S S[0 7 2 ]
S S[0 7 3 ]
S S[0 7 4 ]
S S[0 7 5 ]
S S[0 7 6 ]
S S[0 7 7 ]
S S[0 7 8 ]
S S[0 7 9 ]
S S[0 8 0 ]
S S[0 8 1 ]

VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS

P6
P2 1
P2 4
R 2
R 5
R 22
R 25
T1
T4
T23
T26
U 3
U 6
U 21
U 24
V2
V5
V2 2
V2 5
W1
W4
W23
W26
Y 3
Y 6
Y 21
Y 24
AA2
AA5
AA8
AA1 1
AA1 4
AA1 6
AA1 9
AA2 2
AA2 5
AB1
AB4
AB8
AB1 1
AB1 3
AB1 6
AB1 9
AB2 3
AB2 6
AC 3
AC 6
AC 8
AC 1 1
AC 1 4
AC 1 6
AC 1 9
AC 2 1
AC 2 4
AD 2
AD 5
AD 8
AD 1 1
AD 1 3
AD 1 6
AD 1 9
AD 2 2
AD 2 5
AE1
AE4
AE8
AE1 1
AE1 4
AE1 6
AE1 9
AE2 3
AE2 6
A2
AF6
AF8
AF1 1
AF1 3
AF1 6
AF1 9
AF2 1
A2 5
AF2 5

S[0 8 2 ]
S[0 8 3 ]
S[0 8 4 ]
S[0 8 5 ]
S[0 8 6 ]
S[0 8 7 ]
S[0 8 8 ]
S[0 8 9 ]
S[0 9 0 ]
S[0 9 1 ]
S[0 9 2 ]
S[0 9 3 ]
S[0 9 4 ]
S[0 9 5 ]
S[0 9 6 ]
S[0 9 7 ]
S[0 9 8 ]
S[0 9 9 ]
S[1 0 0 ]
S[1 0 1 ]
S[1 0 2 ]
S[1 0 3 ]
S[1 0 4 ]
S[1 0 5 ]
S[1 0 6 ]
S[1 0 7 ]
S[1 0 8 ]
S[1 0 9 ]
S[1 1 0 ]
S[1 1 1 ]
S[1 1 2 ]
S[1 1 3 ]
S[1 1 4 ]
S[1 1 5 ]
S[1 1 6 ]
S[1 1 7 ]
S[1 1 8 ]
S[1 1 9 ]
S[1 2 0 ]
S[1 2 1 ]
S[1 2 2 ]
S[1 2 3 ]
S[1 2 4 ]
S[1 2 5 ]
S[1 2 6 ]
S[1 2 7 ]
S[1 2 8 ]
S[1 2 9 ]
S[1 3 0 ]
S[1 3 1 ]
S[1 3 2 ]
S[1 3 3 ]
S[1 3 4 ]
S[1 3 5 ]
S[1 3 6 ]
S[1 3 7 ]
S[1 3 8 ]
S[1 3 9 ]
S[1 4 0 ]
S[1 4 1 ]
S[1 4 2 ]
S[1 4 3 ]
S[1 4 4 ]
S[1 4 5 ]
S[1 4 6 ]
S[1 4 7 ]
S[1 4 8 ]
S[1 4 9 ]
S[1 5 0 ]
S[1 5 1 ]
S[1 5 2 ]
S[1 5 3 ]
S[1 5 4 ]
S[1 5 5 ]
S[1 5 6 ]
S[1 5 7 ]
S[1 5 8 ]
S[1 5 9 ]
S[1 6 0 ]
S[1 6 1 ]
S[1 6 2 ]
S[1 6 3 ]

C 207

C 2 09

C 68 1

C6 4 3

C2 1 0

C 682

C 6 09

C 62 0

C2 0 8

C8 7

1 0 U _ 10 V _ 0 8

1 0 U_ 1 0 V _ 0 8

1 0 U_ 1 0 V _ 0 8

1 0U _ 1 0 V _ 08

10 U _ 1 0V _0 8

1 0 U _1 0 V _ 0 8

* 10 U _ 1 0V _0 8

*1 0 U _ 10 V _ 0 8

*1 0 U _ 1 0 V _ 0 8

*1 0 U _ 1 0 V _ 0 8

V CO R E

C1 3 4

C6 0 8

C 133

C 86

2 2U _ 6 . 3 V _ 0 8

22 U _ 6 . 3V _ 08

2 2 U _6 . 3 V _ 0 8

2 2 U_ 6 .3 V _ 0 8

C6 4 4

C1 3 5

C 618

C 88

C 61 9

22 U _ 6 . 3V _ 08

2 2 U _6 . 3 V _ 0 8

2 2 U_ 6 .3 V _ 0 8

2 2 U_ 6 .3 V _ 0 8

C5 4

C6 1 5

C 104

C 6 23

C 19 1

C8 9

1 U_ 6 .3 V_ 0 4

1U _ 6 . 3 V _ 0 4

1 U _ 6. 3V _0 4

1 U _6 . 3 V _ 0 4

1 U_ 6 .3 V _ 0 4

1 U_ 6 .3 V _ 0 4

C1 9 0

C1 0 5

C 192

C 1 93

C 51

C1 9 4

1 U_ 6 .3 V_ 0 4

1U _ 6 . 3 V _ 0 4

1 U _ 6. 3V _0 4

1 U _6 . 3 V _ 0 4

1 U_ 6 .3 V _ 0 4

1 U_ 6 .3 V _ 0 4

22 U _ 6 . 3V _ 08

V C OR E

V C OR E

Sheet 4 of 42
Penryn (Socket-P)
CPU 2/2

V C OR E

C5 2

C1 8 9

C6 0 5

C 63 9

C 6 21

C 53

. 0 1 U _ 5 0 V _ X 7R _ 0 4

. 1 U _ 1 0 V _ X 7R _ 0 4

.1 U_ 1 0 V _ X 7 R_ 0 4

.1 U_ 1 0 V _ X 7 R_ 0 4

. 1 U _1 0 V _ X 7 R _ 0 4

. 0 1 U _5 0 V _ X 7 R _ 0 4

NEAR CPU PIN

1 .0 5 VS

EMI

+ C6 2 7
1 5 0U _ 4 V _ B 2

C 113

C1 2 1

C1 0 3

C1 2 7

C 11 7

C 1 02

. 1 U _ 1 0V _X 7 R _ 04

. 1U _ 1 0 V _ X7 R _ 0 4

. 1 U _ 1 0 V _ X 7R _ 0 4

.1 U_ 1 0 V _ X 7 R_ 0 4

. 1 U _1 0 V _ X 7 R _ 0 4

. 1 U _ 10 V _ X 7 R _0 4

0.1UF*6 INSIDE CPU CENTER CAVITY IN 2 ROWS

1 .0 5 VS

C9 5

C1 2 0

C1 0 6

C 13 0

C 1 22

*. 1 U _ 1 0V _X 7 R _ 04

*. 1 U _ 10 V _ X 7 R _0 4

*. 1 U _ 1 0V _X 7 R _ 04

* . 1U _ 1 0 V _ X7 R _ 0 4

* . 1 U _ 1 0 V _ X 7R _ 0 4

P e n ry n
.

+VCCP = 1.05V (0. 997V~1.102V)

10 , 1 5 , 1 6 , 1 8 , 1 9, 2 0 , 2 9 1 . 5 V S
2 , 3 , 5 , 7 , 9 , 1 0 , 1 5 , 1 8, 2 9 , 3 1 1 . 0 5 V S
33
V C O RE

Penryn (Socket-P) CPU 2/2 B - 5

B.Schematic Diagrams

A 7
A 9
10
12
13
15
17
18
20
B 7
B 9
B 10
B 12
B 14
B 15
B 17
B 18
B 20
C 9
C 10
C 12
C 13
C 15
C 17
C 18
D 9
D 10
D 12
D 14
D 15
D 17
D 18
E 7
E 9
E 10
E 12
E 13
E 15
E 17
E 18
E 20
F 7
F 9
F 10
F 12
F 14
F 15
F 17
F 18
F 20
AA 7
AA 9
AA 1 0
AA 1 2
AA 1 3
AA 1 5
AA 1 7
AA 1 8
AA 2 0
AB 9
AC 1 0
AB 1 0
AB 1 2
AB 1 4
AB 1 5
AB 1 7
AB 1 8
A
A
A
A
A
A
A

A4
A8
A1 1
A1 4
A1 6
A1 9
A2 3
AF2
B6
B8
B1 1
B1 3
B1 6
B1 9
B2 1
B2 4
C5
C8
C1 1
C1 4
C1 6
C1 9
C2
C2 2
C2 5
D1
D4
D8
D1 1
D1 3
D1 6
D1 9
D2 3
D2 6
E3
E6
E8
E1 1
E1 4
E1 6
E1 9
E2 1
E2 4
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G2 3
G2 6
H3
H6
H2 1
H2 4
J2
J5
J2 2
J2 5
K1
K4
K2 3
K2 6
L3
L6
L2 1
L2 4
M2
M5
M2 2
M2 5
N1
N4
N2 3
N2 6
P3

Schematic Diagrams

CANTIGA 1/7, Host
U2 3 A

Sheet 5 of 42
CANTIGA 1/7, Host

H _D # [6 3 :0 ]

H _ D# 0
H _ D# 1
H _ D# 2
H _ D# 3
H _ D# 4
H _ D# 5
H _ D# 6
H _ D# 7
H _ D# 8
H _ D# 9
H _ D# 1 0
H _ D# 1 1
H _ D# 1 2
H _ D# 1 3
H _ D# 1 4
H _ D# 1 5
H _ D# 1 6
H _ D# 1 7
H _ D# 1 8
H _ D# 1 9
H _ D# 2 0
H _ D# 2 1
H _ D# 2 2
H _ D# 2 3
H _ D# 2 4
H _ D# 2 5
H _ D# 2 6
H _ D# 2 7
H _ D# 2 8
H _ D# 2 9
H _ D# 3 0
H _ D# 3 1
H _ D# 3 2
H _ D# 3 3
H _ D# 3 4
H _ D# 3 5
H _ D# 3 6
H _ D# 3 7
H _ D# 3 8
H _ D# 3 9
H _ D# 4 0
H _ D# 4 1
H _ D# 4 2
H _ D# 4 3
H _ D# 4 4
H _ D# 4 5
H _ D# 4 6
H _ D# 4 7
H _ D# 4 8
H _ D# 4 9
H _ D# 5 0
H _ D# 5 1
H _ D# 5 2
H _ D# 5 3
H _ D# 5 4
H _ D# 5 5
H _ D# 5 6
H _ D# 5 7
H _ D# 5 8
H _ D# 5 9
H _ D# 6 0
H _ D# 6 1
H _ D# 6 2
H _ D# 6 3

Lay out Not ice :
0.1 uF s hou ld be pla ced
100 mils or le ss fro m GM CH
pin .

L ayo ut Not ice :
MC H_H RCO MP a 10 mi ls tra ces
an d 2 0 m ils spa cin g
1 . 05 VS

R 439
2 2 1_ 1 %_ 0 4

10mils
10mils

1. 0 5V S
R 436
1 0 0_ 1 %_ 0 4

C 655

R 444

. 1 U _1 0 V_ X7 R _0 4

2 4 .9 _ 1% _ 04

R4 4 5

F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M1 1
J1
J2
N1 2
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P1 3
N8
L7
N1 0
M3
Y3
A D1 4
Y6
Y1 0
Y1 2
Y1 4
Y7
W2
AA8
Y9
AA1 3
AA9
AA1 1
A D1 1
A D1 0
A D1 3
AE1 2
AE9
AA2
AD 8
AA3
AD 3
AD 7
AE1 4
AF3
AC 1
AE3
AC 3
AE1 1
AE8
AG 2
AD 6

MCH _ H SW IN G
MCH _ H RC O MP

3
3

C5
E3

C1 2
E1 1

H _ C PU RS T#
H _C PU SL P#

H _ D #_ 0
H _ D #_ 1
H _ D #_ 2
H _ D #_ 3
H _ D #_ 4
H _ D #_ 5
H _ D #_ 6
H _ D #_ 7
H _ D #_ 8
H _ D #_ 9
H _ D #_ 1 0
H _ D #_ 1 1
H _ D #_ 1 2
H _ D #_ 1 3
H _ D #_ 1 4
H _ D #_ 1 5
H _ D #_ 1 6
H _ D #_ 1 7
H _ D #_ 1 8
H _ D #_ 1 9
H _ D #_ 2 0
H _ D #_ 2 1
H _ D #_ 2 2
H _ D #_ 2 3
H _ D #_ 2 4
H _ D #_ 2 5
H _ D #_ 2 6
H _ D #_ 2 7
H _ D #_ 2 8
H _ D #_ 2 9
H _ D #_ 3 0
H _ D #_ 3 1
H _ D #_ 3 2
H _ D #_ 3 3
H _ D #_ 3 4
H _ D #_ 3 5
H _ D #_ 3 6
H _ D #_ 3 7
H _ D #_ 3 8
H _ D #_ 3 9
H _ D #_ 4 0
H _ D #_ 4 1
H _ D #_ 4 2
H _ D #_ 4 3
H _ D #_ 4 4
H _ D #_ 4 5
H _ D #_ 4 6
H _ D #_ 4 7
H _ D #_ 4 8
H _ D #_ 4 9
H _ D #_ 5 0
H _ D #_ 5 1
H _ D #_ 5 2
H _ D #_ 5 3
H _ D #_ 5 4
H _ D #_ 5 5
H _ D #_ 5 6
H _ D #_ 5 7
H _ D #_ 5 8
H _ D #_ 5 9
H _ D #_ 6 0
H _ D #_ 6 1
H _ D #_ 6 2
H _ D #_ 6 3
H _ SW IN G
H _ R CO MP

H _ C PU RS T#
H _ C PU SLP #

R4 4 9

C 669

2K _1 %_ 0 4

. 1 U _1 0 V_ X7 R _0 4

CLOSE TO PIN
Z0 5 0 1

FOR QUA D C ORE
16. 9_1% _04

A1 1
B1 1

SHORT BOTH PIN
BELOW GMCH
PACKAGE

H _ AD S#
H _A DS TB #_ 0
H _A DS TB #_ 1
H _BN R #
H_ BP RI #
H_ BR EQ #
H _ D EFER #
H_ D BSY #
H PL L_ C LK
H PL L _C L K#
H _D PW R #
H _ D RD Y #
H _ H IT#
H_ H I TM#
H _ LO C K#
H_ TRD Y #

H _D I NV #_ 0
H _D I NV #_ 1
H _D I NV #_ 2
H _D I NV #_ 3
H _ D STBN #_ 0
H _ D STBN #_ 1
H _ D STBN #_ 2
H _ D STBN #_ 3
H _D STBP #_ 0
H _D STBP #_ 1
H _D STBP #_ 2
H _D STBP #_ 3
H _ R EQ#_ 0
H _ R EQ#_ 1
H _ R EQ#_ 2
H _ R EQ#_ 3
H _ R EQ#_ 4
H _ RS #_ 0
H _ RS #_ 1
H _ RS #_ 2

1K _1 %_ 0 4

10mils

H _A #_ 3
H _A #_ 4
H _A #_ 5
H _A #_ 6
H _A #_ 7
H _A #_ 8
H _A #_ 9
H _ A# _1 0
H _ A# _1 1
H _ A# _1 2
H _ A# _1 3
H _ A# _1 4
H _ A# _1 5
H _ A# _1 6
H _ A# _1 7
H _ A# _1 8
H _ A# _1 9
H _ A# _2 0
H _ A# _2 1
H _ A# _2 2
H _ A# _2 3
H _ A# _2 4
H _ A# _2 5
H _ A# _2 6
H _ A# _2 7
H _ A# _2 8
H _ A# _2 9
H _ A# _3 0
H _ A# _3 1
H _ A# _3 2
H _ A# _3 3
H _ A# _3 4
H _ A# _3 5

HOST

B.Schematic Diagrams

3

A1 4
C 15
F1 6
H 13
C 18
M1 6
J 13
P1 6
R 16
N 17
M1 3
E1 7
P1 7
F1 7
G20
B1 9
J 16
E2 0
H 16
J 20
L17
A1 7
B1 7
L16
C 21
J 17
H 20
B1 8
K1 7
B2 0
F2 1
K2 1
L20
H 12
B1 6
G17
A9
F1 1
G12
E9
B1 0
AH 7
AH 6
J 11
F9
H9
E1 2
H 11
C9

J8
L3
Y 13
Y1

H_ AD S# 3
H_ AD STB# 0 3
H_ AD STB# 1 3
H_ BN R # 3
H_ BP RI # 3
H_ BR 0 # 3
H_ D EFE R# 3
H_ D BSY # 3
C L K_ MC H _ BC LK 2
CL K_ MC H_ BC L K# 2
H_ D PW R # 3
H_ D R DY # 3
H_ H IT#
3
H_ H ITM# 3
H_ L O CK # 3
H_ TR DY # 3

H_ D IN V# 0
H_ D IN V# 1
H_ D IN V# 2
H_ D IN V# 3

3
3
3
3

L10
M7
AA 5
AE 6

H_ D STBN #0
H_ D STBN #1
H_ D STBN #2
H_ D STBN #3

3
3
3
3

L9
M8
AA 6
AE 5

H_ D STBP# 0
H_ D STBP# 1
H_ D STBP# 2
H_ D STBP# 3

3
3
3
3

B1 5
K1 3
F1 3
B1 3
B1 4
B6
F1 2
C8

H _ AVR EF
H _ D VR EF
CA NTI GA

2 , 3, 4 ,7 , 9, 1 0, 1 5, 1 8, 2 9, 3 1 1. 0 5VS

B - 6 CANTIGA 1/7, Host

H _ A# [3 5 :3 ] 3

H _ A# 3
H _ A# 4
H _ A# 5
H _ A# 6
H _ A# 7
H _ A# 8
H _ A# 9
H _ A# 10
H _ A# 11
H _ A# 12
H _ A# 13
H _ A# 14
H _ A# 15
H _ A# 16
H _ A# 17
H _ A# 18
H _ A# 19
H _ A# 20
H _ A# 21
H _ A# 22
H _ A# 23
H _ A# 24
H _ A# 25
H _ A# 26
H _ A# 27
H _ A# 28
H _ A# 29
H _ A# 30
H _ A# 31
H _ A# 32
H _ A# 33
H _ A# 34
H _ A# 35

H _ RE Q# [ 4: 0 ] 3

H _ R EQ #0
H _ R EQ #1
H _ R EQ #2
H _ R EQ #3
H _ R EQ #4
H_ R S# 0
H_ R S# 1
H_ R S# 2

3
3
3

Schematic Diagrams

CANTIGA 2/7, Graphics
1. 05VM_PEG

3.3 VS
L11
Z0601
U23C
*20 mil_shor t

R141
R102

R98

R122

R115
49. 9_1%_ 04

10K_04

L_BKLT_ CTRL

10K_04
14

BLON

Z06 02
Z06 03

14 P_DDC_CLK
14 P_DDC_DATA

R48 0

2. 37K_1%_0 4

R11 4
R12 0

*20mil_ short
*20mil_ short

14 NB_ENAVDD

M3 3
K3 3
J3 3
M2 9
C4 4
B4 3
E3 7
E3 8
C4 1
C4 0
B3 7
A3 7

14
14
14

LVDS-L0 N
LVDS-L1 N
LVDS-L2 N

H4 7
E4 6
G4 0
LVDSA_DATA#3 A4 0

14
14
14

LVDS-L0 P
LVDS-L1 P
LVDS-L2 P

H4 8
D4 5
F4 0
B4 0

14
14
14

LVDS-U0N
LVDS-U1N
LVDS-U2N

A4 1
H3 8
G3 7
LVDSB_DATA#3 J3 7

14
14
14

LVDS-U0P
LVDS-U1P
LVDS-U2P

LVDSB_DATA3

B4 2
G3 8
F3 7
K3 7

TVA_DAC
TVB_DAC
TVC_ DAC

F2 5
H2 5
K2 5

R82
R86
R95

LVDSA_DATA3

75_1%_04
75_1%_04
75_1%_04

H2 4

C3 1
E3 2

1 4 DAC_BLUE

Zo=
50O? 5%

1 4 DAC_GREEN

E2 8
G2 8

DAC_RED

J2 8

R99

C6 68

R91

C664

R83

C6 73

1 50_1%_04

22P_50V_04

150_ 1%_04

22P_50 V_04

1 50_1%_04

22P_50V_04
G2 9

Zo=
55O? 5%

1 4 DAC_DDCACLK
14 DAC_ DDCADATA
14 DAC_HSYNC
14

DAC_VSYNC
C226

C2 24

30P_50V_04

3 0P_ 50V_ 04

R88
R78
R94

3 0.1_1 %_04
1 .02K_1%_04
3 0.1_1 %_04

CRT_HS
CRT_TVO
CRT_VS

H3 2
J3 2
J2 9
E2 9
L2 9

L_VDD_EN
LVDS_I BG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

PEG_RX#_ 0
PEG_RX#_ 1
PEG_RX#_ 2
PEG_RX#_ 3
PEG_RX#_ 4
PEG_RX#_ 5
PEG_RX#_ 6
PEG_RX#_ 7
PEG_RX#_ 8
PEG_RX#_ 9
PEG_RX#_1 0
PEG_RX#_1 1
PEG_RX#_1 2
PEG_RX#_1 3
PEG_RX#_1 4
PEG_RX#_1 5

LVDSA_DATA# _0
LVDSA_DATA# _1
LVDSA_DATA# _2
LVDSA_DATA# _3
LVDSA_DATA_ 0
LVDSA_DATA_ 1
LVDSA_DATA_ 2
LVDSA_DATA_ 3
LVDSB_DATA# _0
LVDSB_DATA# _1
LVDSB_DATA# _2
LVDSB_DATA# _3
LVDSB_DATA_ 0
LVDSB_DATA_ 1
LVDSB_DATA_ 2
LVDSB_DATA_ 3

TVA_DAC
TVB_DAC
TVC_DAC
TV_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE
CRT_GREEN
CRT_RED

VGA

1 4 DAC_RED

DAC_BLU E
DAC_GREEN

L_CTRL _DATA
L_DDC_CL K
L_DDC_DATA

PEG_RX_ 0
PEG_RX_ 1
PEG_RX_ 2
PEG_RX_ 3
PEG_RX_ 4
PEG_RX_ 5
PEG_RX_ 6
PEG_RX_ 7
PEG_RX_ 8
PEG_RX_ 9
PEG_RX_1 0
PEG_RX_1 1
PEG_RX_1 2
PEG_RX_1 3
PEG_RX_1 4
PEG_RX_1 5
PEG_TX#_ 0
PEG_TX#_ 1
PEG_TX#_ 2
PEG_TX#_ 3
PEG_TX#_ 4
PEG_TX#_ 5
PEG_TX#_ 6
PEG_TX#_ 7
PEG_TX#_ 8
PEG_TX#_ 9
PEG_TX#_1 0
PEG_TX#_1 1
PEG_TX#_1 2
PEG_TX#_1 3
PEG_TX#_1 4
PEG_TX#_1 5
PEG_TX_ 0
PEG_TX_ 1
PEG_TX_ 2
PEG_TX_ 3
PEG_TX_ 4
PEG_TX_ 5
PEG_TX_ 6
PEG_TX_ 7
PEG_TX_ 8
PEG_TX_ 9
PEG_TX_1 0
PEG_TX_1 1
PEG_TX_1 2
PEG_TX_1 3
PEG_TX_1 4
PEG_TX_1 5

T37 PEG_COMP
T36

(1. 27 cm) of the (G)MC H

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39
H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40
J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

Sheet 6 of 42
CANTIGA 2/7,
Graphics

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

CRT_I RTN

CRT_DDC_C LK
CRT_DDC_D ATA
CRT_HSYNC
CRT_TVO_IR EF
CRT_VSYNC

MAX=0.5"
Minimize REFSET
routing length a nd
shield with VSS

CANTIGA

10
1.05VM_PEG
2, 3,7, 10,12, 13,1 4,15, 16,17 ,18,1 9,21, 22,23 ,25,2 6,27, 33 3.3VS

CANTIGA 2/7, Graphics B - 7

B.Schematic Diagrams

LVDS-LCL KN
L VDS-LCLKP
LVDS-UCLKN
L VDS-UCLKP

PEG_COMPI
PEG_COMPO

TV

14
14
14
14

L_BKL T_CTRL
L_BKL T_EN
L_CTRL _CLK

LVDS

Zdiff=
100O? 0%

LVDS_IBG
LVDS_VBG
Z06 04
Z06 05

L3 2
G3 2
M3 2

GRAPHICS

2.2 1K_1 %_04

PCI-EXPRESS

2.21K_1%_04

PEG _COMPI and th e PEG_ COMPO pins sh ould b e
sho rted a t the p ackage and t hen rou ted to one
end of a 49.9 O ? % pu ll-up resisto r to
VCC _PEG. Place t he res istor within 500 mi ls

Schematic Diagrams

CANTIGA 3/7
U 23B

M CH _ CF G _ 5

R 77

*2 . 2 1 K _ 1 % _ 0 4

iTPM HOST INTERFACE
Low= enable
High=disable (default)
M CH _ CF G _ 6

R 75

2 . 2 1 K _ 1 % _0 4

ME TLS
Confidentiality
R 1 00

PCI express graphics lane
reverse option for layout
convenience
M CH _ CF G _ 9

R 73

*2 . 2 1 K _ 1 % _ 0 4

M CH _ CF G _ 1 0

MCH_CFG_12
MCH_CFG_13
clock un-gating

R 79

R 93
R 1 06

*2 . 2 1 K _ 1 % _ 0 4
*2 . 2 1 K _ 1 % _ 0 4

M CH _ CF G _ 1 6

R 84

*2 . 2 1 K _ 1 % _ 0 4

2
2
2

M C H_ B S E L 0
M C H_ B S E L 1
M C H_ B S E L 2

FSB Dynamic ODT

3 .3 V S

DMI lane reversal
*4 . 0 2 K _ 1 % _ 0 6

MC H _ C F G _1 9

R 11 3

*4 . 0 2 K _ 1 % _ 0 6

MC H _ C F G _2 0

1
2
3
4
5
6
7
8
9
10
11
12
13
14

M3 6
N3 6
R3 3
T33
AH 9
A H1 0
A H1 2
A H1 3
K1 2
AL 3 4
AK3 4
A N3 5
A M3 5
T24

M C H _ R S V D 15
M C H _ R S V D 16
M C H _ R S V D 17

B3 1
B2
M1

M C H _ R S V D 20

A Y2 1

M
M
M
M

B G2 3
BF2 3
B H1 8
BF1 8

R
R
R
R
R
R
R
R
R
R
R
R
R
R

SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD

1
2
3
4
5
6
7
8
9
10
11
12
13
14

R SVD 1 5
R SVD 1 6
R SVD 1 7

SA_ C
SA_ C
SB_ C
SB_ C
SA_ C
SA_ C
SB_ C
SB_ C

C
C
C
C

H_ R
H_ R
H_ R
H_ R

SVD
SVD
SVD
SVD

22
23
24
25

R SVD 2 0

R
R
R
R

SVD
SVD
SVD
SVD

22
23
24
25

*2 . 2 1 K _ 1 % _ 0 4

M CH _ CF G _ 1 2
M CH _ CF G _ 1 3

R 11 9

SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD
SVD

*2 . 2 1 K _ 1 % _ 0 4

MCH_CFG_10
PCIE Loopback enable

Sheet 7 of 42
CANTIGA 3/7

H_ R
H_ R
H_ R
H_ R
H_ R
H_ R
H_ R
H_ R
H_ R
H_ R
H_ R
H_ R
H_ R
H_ R

SDVO/DP/iHDMI
Concurrent with PCIe

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C

H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C
H_ C

F G_ 3
F G_ 4
F G_ 5
F G_ 6
F G_ 7
F G_ 8
F G_ 9
F G_ 1 0
F G_ 1 1
F G_ 1 2
F G_ 1 3
F G_ 1 4
F G_ 1 5
F G_ 1 6
F G_ 1 7
F G_ 1 8
F G_ 1 9
F G_ 2 0

T25
R2 5
P2 5
P2 0
P2 4
C2 5
N2 4
M2 4
E2 1
C2 3
C2 4
N2 1
P2 1
T21
R2 0
M2 0
L21
H2 1
P2 9
R2 8
T28

C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C

FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG
FG

S
S
S
S

A _ OD
A _ OD
B _ OD
B _ OD

_0
_1
_2
_3
_4
_5
_6
_7
_8
_9
_ 10
_ 11
_ 12
_ 13
_ 14
_ 15
_ 16
_ 17
_ 18
_ 19
_ 20

3 .3 V S

R6 0 5

10 K _0 4

M CH _ CL K REQ #

R1 3 1

10 K _0 4

PM _ EXT TS0 #

R1 3 6

10 K _0 4

PM _ EXT TS1 #

3. 3V S
2. 21 K _1 % _ 0 4

H D M I _ C TR L C L K

R1 2 5

*2 . 2 1 K _ 1 % _ 04

H D M I _ C TR L D A T A

High: SDVO/iHDMI/DP enable

R1 0 5

*2 . 2 1 K _ 1 % _ 04

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C

H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N
H_ N

C_ 1
C_ 2
C_ 3
C_ 4
C_ 5
C_ 6
C_ 7
C_ 8
C_ 9
C_ 1 0
C_ 1 1
C_ 1 2
C_ 1 3
C_ 1 4
C_ 1 5
C_ 1 6
C_ 1 7
C_ 1 8
C_ 1 9
C_ 2 0
C_ 2 1
C_ 2 2
C_ 2 3
C_ 2 4
C_ 2 5
C_ 2 6

B G4 8
BF4 8
B D4 8
B C4 8
B H4 7
B G4 7
BE4 7
B H4 6
BF4 6
B G4 5
B H4 4
B H4 3
BH 6
BH 5
BG 4
BH 3
BF3
BH 2
BG 2
BE2
BG 1
BF1
BD 1
BC 1
F1
A4 7

N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N

C_ 1
C_ 2
C_ 3
C_ 4
C_ 5
C_ 6
C_ 7
C_ 8
C_ 9
C_ 1 0
C_ 1 1
C_ 1 2
C_ 1 3
C_ 1 4
C_ 1 5
C_ 1 6
C_ 1 7
C_ 1 8
C_ 1 9
C_ 2 0
C_ 2 1
C_ 2 2
C_ 2 3
C_ 2 4
C_ 2 5
C_ 2 6

D DP C_ C T RL D A T A

High: iHDMI/DP enable

B - 8 CANTIGA 3/7

R1 2 8
R 96
R 72

P M _ S Y NC #
P M _ D P R S TP #
PM _ EXT_ TS# _ 0
PM _ EXT_ TS# _ 1
P W RO K
R ST IN #
T H E R MT R I P #
D PR SL PVR

C A N T I GA

NC

R1 0 9

R2 9
B7
N3 3
P3 2
AT4 0
1 0 0_ 1 % _ 0 4 M C H _ R S T I N #
AT1 1
* 10 m i l _ sh o rt Z 07 0 1
T20
* 10 m i l _ sh o rt M C H _ D P R S LP V R R 3 2
P M_ E X T T S 0 #
P M_ E X T T S 1 #

ME GRAPHICS VID

PM _ EXTTS1 #
D E L A Y _ P W R GD
PL T_ R ST#
P M _T H R MT R I P #
P M _D P R S L P V R

PM

on the DPRSTP topology to avoid
signal integrity degradation.

1 2 ,1 3
1 7 ,3 3
16
3 ,1 5
1 7 ,3 3

T_0
T_1
T_0
T_1

S M _ R C O MP
S M_ R C O MP #
S M _ R C OM P _ V O H
S M _R C OM P _ V O L
S M_ V R E F
S M _ P W R OK
S M_ R E X T
S M_ D R A M R S T #

AP2 4
AT 2 1
AV2 4
AU 2 0
AR 2 4
AR 2 1
AU 2 4
AV2 0
BC 2 8
AY 2 8
AY 3 6
BB3 6
BA1 7
AY 1 6
AV1 6
AR 1 3
BD 1 7
AY 1 7
BF 1 5
AY 1 3

M_ C
M_ C
M_ C
M_ C

L K _ DD
L K _ DD
L K _ DD
L K _ DD

R0
R1
R2
R3

M_ C
M_ C
M_ C
M_ C

L K _ DD
L K _ DD
L K _ DD
L K _ DD

R0 #
R1 #
R2 #
R3 #

M_ C
M_ C
M_ C
M_ C

KE0
KE1
KE2
KE3

12
12
13
13

M_ C S 0 #
M_ C S 1 #
M_ C S 2 #
M_ C S 3 #

12
12
13
13

M_ O
M_ O
M_ O
M_ O

12
12
13
13

DT 0
DT 1
DT 2
DT 3

BG 2 2
BH 2 1

S M _ R C OM P
S M _ R C OM P #

BF 2 8
BH 2 8

S M _ R C OM P _ V O H
S M _ R C OM P _ V O L

AV4 2
AR 3 6
BF 1 7
BC 3 6

M_ V R E F _M C H

B3 8
A3 8
E4 1
F4 1

C L K _D R E F
C L K _D R E F #
C L K _D R E F S S
C L K _D R E F S S #

12
12
13
13

1 .8 V

Z dif f=
7 0O? 0%

S M_ R C O M P _ V O H

12
12
13
13

P E G _ CL K
P E G_ C LK #

C 7 07

R4 8 9

.0 1 U_ 5 0 V _ X 7 R_ 0 4

2 . 2 U _6 . 3 V _ 0 6

3 . 0 1K _1 % _ 0 4

C 70 3

C 7 06

R4 9 0

.0 1 U_ 5 0 V _ X 7 R_ 0 4

2 . 2 U _6 . 3 V _ 0 6

1 K _ 1 %_ 0 4

DM I_ RX N _ 0
DM I_ RX N _ 1
DM I_ RX N _ 2
DM I_ RX N _ 3
D MI _ R X P _ 0
D MI _ R X P _ 1
D MI _ R X P _ 2
D MI _ R X P _ 3
D
D
D
D

M
M
M
M

G
G
G
G
G

I _T X N
I _T X N
I _T X N
I _T X N

_0
_1
_2
_3

I_ T X P _ 0
I_ T X P _ 1
I_ T X P _ 2
I_ T X P _ 3

F X _ V ID
F X _ V ID
F X _ V ID
F X _ V ID
F X _ V ID

_0
_1
_2
_3
_4

G FX_ VR _ EN

1 K _ 1 % _ 04

S M_ R C O M P _ V O L

Z o=
5 5O? 5%

1. 8V
R 483
R 488
R 485
R 482

* 2 0_ 1 % _ 0 6
8 0 . 6 _ 1 % _0 6
* 2 0_ 1 % _ 0 6
8 0 . 6 _ 1 % _0 6

1 .8 V
R 16 9
1 K _ 1 % _ 04

S M _ REXT
D D R 3 _D R A MR S T #

F4 3
E4 3

R4 9 1

C 70 5

R4 8 1

DPL L _ R E F _ CL K
D P LL _ R E F _ C LK #
D P L L _R E F _S S C L K
D P L L _ R E F _ S S C LK #

MISC

17 P M_ B M B U S Y #
3 ,1 5 ,3 3 H_ D P R S T P #
This "Daisy Chain" CMOS topology

K# _ 0
K# _ 1
K# _ 0
K# _ 1

SA_ C S# _ 0
SA_ C S# _ 1
SB_ C S# _ 0
SB_ C S# _ 1

DM
DM
DM
DM

should be routed from ICH9M to Intel
MVP, then to (G)MCH and CPU (in this
order exactly). CPU must be end agent

K_ 0
K_ 1
K_ 0
K_ 1

S A _ CK E _ 0
S A _ CK E _ 1
S B _ CK E _ 0
S B _ CK E _ 1

C
C
C
C

L K_ DR
L K_ DR
L K_ DR
L K_ DR

EF 2
EF # 2
EF SS 2
EF SS # 2

C8 7 9

R 17 0

. 0 1U _ 5 0 V _ X7 R _ 0 4

1 K _ 1 % _ 04

49 9 _ 1 % _ 04

CL K _ P C IE _ 3 G P L L 2
CL K _ P C IE _ 3 G P L L # 2

AE4 1
AE3 7
AE4 7
AH 3 9

DM I_ T X N0 1 6
DM I_ T X N1 1 6
DM I_ T X N2 1 6
DM I_ T X N3 1 6

AE4 0
AE3 8
AE4 8
AH 4 0

DM I_ T X P 0 1 6
DM I_ T X P 1 1 6
DM I_ T X P 2 1 6
DM I_ T X P 3 1 6

AE3 5
AE4 3
AE4 6
AH 4 2
AD 3 5
AE4 4
AF 4 6
AH 4 3

DM
DM
DM
DM

I_ RX N
I_ RX N
I_ RX N
I_ RX N

0
1
2
3

16
16
16
16

DM
DM
DM
DM

I_ RX P
I_ RX P
I_ RX P
I_ RX P

0
1
2
3

16
16
16
16

B3 3
B3 2
G 33
F3 3
E3 3

DF
DF
DF
DF
DF

GT _ V I D
GT _ V I D
GT _ V I D
GT _ V I D
GT _ V I D

C 34

D F GT _ V R _ E N

Z o= 55O ? 5 %

_0
_1
_2
_3
_4

1 . 05 V S

CL _ CL K
C L _ DA T A
C L _ P W R OK
CL _ R S T #
C L_ V R E F

D D P C _ C TR L C L K
DD P C _ CT R L DA T A
S D V O _ C TR L C L K
S D V O _ CT R L DA T A
CL K R E Q #
I CH _ S YN C #

T SAT N #

HDA

B.Schematic Diagrams

M CH _ CF G _ 7

C
C
C
C
C
C
C
C
C
C
C
C
C
C

RSVD

M
M
M
M
M
M
M
M
M
M
M
M
M
M

CFG
DDR CLK/ CONTROL/COMPENSATION
CLK
DMI

DMI X2 select Low= DMI x 2
High=DMI x 4 (default)

H D A _ BCL K
HD A _ R S T #
H DA _ S DI
HD A _ S D O
H D A _S Y N C

AH 3 7
AH 3 6
AN 3 6
AJ 3 5
AH 3 4

C L _ C L K 0 17
CL _ DA T A 0 1 7
M P W R O K 1 4 ,1 7 ,2 6
C L _ RST # 0 1 7

N 28
M 28
G 36
E3 6
K3 6
H 36

DD
DD
HD
HD
MC

B1 2

MC H _ TS A T N #

B2 8
B3 0
B2 9
C 29
A2 8

M
M
M
M
M

CH
CH
CH
CH
CH

P C _ CT R L CL K
P C _ CT R L DA T A
M I_ CT R L CL K
M I_ CT R L DA T A
H _ CL K R E Q #

_ HD
_ HD
_ HD
_ HD
_ HD

A_ BC L K
A_ R ST #
A_ SD I
A_ SD O
A_ SY NC

R 143
1 K _1 % _ 0 4
M C H _ C L_ V R E F

C 284

R 144

. 1U _ 1 0 V _ X7 R _ 0 4

5 1 1 _ 1 % _ 04

M C H _ C LK R E Q # 2
M C H_ IC H_ S Y N C# 1 7
R 44 6

5 4 . 9 _1 % _ 0 4

Add 0.1uF capacitor on this
rail close to (G)MCH.

1 .0 5 VS
3 , 1 5 , 1 9 , 2 3 , 2 6, 2 7 , 2 8 , 3 2 V D D 3
2 , 3 , 4 , 5 , 9 , 1 0 , 1 5, 1 8 , 2 9 , 3 1 1 . 0 5 V S
2 , 3 , 6 , 1 0 , 1 2, 1 3 , 1 4 , 1 5 , 1 6 , 1 7, 18 , 1 9 , 2 1 , 2 2 , 2 3 , 2 5, 2 6 , 2 7 , 3 3 3 . 3 V S
9 , 1 0 , 1 2, 1 3 , 2 9 , 3 0 1 . 8 V

Schematic Diagrams

CANTIGA 4/7

S A_ BS_ 0
S A_ BS_ 1
S A_ BS_ 2
SA _ RA S#
SA _ CA S#
S A _W E #

SA _ DM
SA _ DM
SA _ DM
SA _ DM
SA _ DM
SA _ DM
SA _ DM
SA _ DM

_0
_1
_2
_3
_4
_5
_6
_7

S A_ DQ S_ 0
S A_ DQ S_ 1
S A_ DQ S_ 2
S A_ DQ S_ 3
S A_ DQ S_ 4
S A_ DQ S_ 5
S A_ DQ S_ 6
S A_ DQ S_ 7
S A _ DQ S # _ 0
S A _ DQ S # _ 1
S A _ DQ S # _ 2
S A _ DQ S # _ 3
S A _ DQ S # _ 4
S A _ DQ S # _ 5
S A _ DQ S # _ 6
S A _ DQ S # _ 7
SA_ M A_ 0
SA_ M A_ 1
SA_ M A_ 2
SA_ M A_ 3
SA_ M A_ 4
SA_ M A_ 5
SA_ M A_ 6
SA_ M A_ 7
SA_ M A_ 8
SA_ M A_ 9
S A _M A _ 1 0
S A _M A _ 1 1
S A _M A _ 1 2
S A _M A _ 1 3
S A _M A _ 1 4

BD 2 1
BG 1 8
AT2 5

M_ A _ B S 0 # 1 2
M_ A _ B S 1 # 1 2
M_ A _ B S 2 # 1 2

B B 20
BD 2 0
AY 2 0

M_ A _ R A S # 1 2
M_ A _ C A S # 1 2
M_ A _ W E # 12

AM 3 7
AT4 1
AY 4 1
AU 3 9
B B 12
AY 6
AT7
AJ 5

M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D

AJ 4 4
AT4 4
B A 43
BC 3 7
AW 1 2
BC 8
AU 8
AM 7
AJ 4 3
AT4 3
B A 44
BD 3 7
AY 1 2
BD 8
AU 9
AM 8
B A 21
BC 2 4
BG 2 4
BH 2 4
BG 2 5
B A 24
BD 2 4
BG 2 7
B F 25
AW 2 4
BC 2 1
BG 2 6
BH 2 6
BH 1 7
AY 2 5

Zo = 5 5O? 5%

M _ A_ A0
M _ A_ A1
M _ A_ A2
M _ A_ A3
M _ A_ A4
M _ A_ A5
M _ A_ A6
M _ A_ A7
M _ A_ A8
M _ A_ A9
M _ A_ A1 0
M _ A_ A1 1
M _ A_ A1 2
M _ A_ A1 3
M_ A _ A 1 4

M0
M1
M2
M3
M4
M5
M6
M7

12
12
12
12
12
12
12
12

M_ A _ D QS 0 1 2
M_ A _ D QS 1 1 2
M_ A _ D QS 2 1 2
M_ A _ D QS 3 1 2
M_ A _ D QS 4 1 2
M_ A _ D QS 5 1 2
M_ A _ D QS 6 1 2
M_ A _ D QS 7 1 2
M_ A _ D QS 0 # 1 2
M_ A _ D QS 1 # 1 2
M_ A _ D QS 2 # 1 2
M_ A _ D QS 3 # 1 2
M_ A _ D QS 4 # 1 2
M_ A _ D QS 5 # 1 2
M_ A _ D QS 6 # 1 2
M_ A _ D QS 7 # 1 2
M_ A _ A [ 1 4 : 0 ] 1 2

Zo= 55 O? 5 %

U2 3 E
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D
M_ B _ D

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q1 0
Q1 1
Q1 2
Q1 3
Q1 4
Q1 5
Q1 6
Q1 7
Q1 8
Q1 9
Q2 0
Q2 1
Q2 2
Q2 3
Q2 4
Q2 5
Q2 6
Q2 7
Q2 8
Q2 9
Q3 0
Q3 1
Q3 2
Q3 3
Q3 4
Q3 5
Q3 6
Q3 7
Q3 8
Q3 9
Q4 0
Q4 1
Q4 2
Q4 3
Q4 4
Q4 5
Q4 6
Q4 7
Q4 8
Q4 9
Q5 0
Q5 1
Q5 2
Q5 3
Q5 4
Q5 5
Q5 6
Q5 7
Q5 8
Q5 9
Q6 0
Q6 1
Q6 2
Q6 3

AK4 7
AH4 6
AP4 7
AP4 6
A J4 6
A J4 8
A M4 8
AP4 8
AU4 7
AU4 6
BA4 8
AY4 8
A T4 7
AR4 7
BA4 7
BC4 7
BC4 6
BC4 4
B G4 3
BF 4 3
BE4 5
BC4 1
BF 4 0
BF 4 1
B G3 8
BF 3 8
BH3 5
B G3 5
BH4 0
B G3 9
B G3 4
BH3 4
BH1 4
B G1 2
BH1 1
B G8
BH1 2
BF 1 1
BF 8
B G7
BC5
BC6
AY3
AY1
BF 6
BF 5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL 1
AL 2
AJ 1
AH1
A M2
A M3
AH3
AJ 3

S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ
S B _ DQ

_0
_1
_2
_3
_4
_5
_6
_7
_8
_9
_10
_11
_12
_13
_14
_15
_16
_17
_18
_19
_20
_21
_22
_23
_24
_25
_26
_27
_28
_29
_30
_31
_32
_33
_34
_35
_36
_37
_38
_39
_40
_41
_42
_43
_44
_45
_46
_47
_48
_49
_50
_51
_52
_53
_54
_55
_56
_57
_58
_59
_60
_61
_62
_63

S B _ B S _0
S B _ B S _1
S B _ B S _2

S B _R A S #
S B _C A S #
SB_ W E#

SB
SB
SB
SB
SB
SB
SB
SB

B

_0
_1
_2
_3
_4
_5
_6
_7
_8
_9
_1 0
_1 1
_1 2
_1 3
_1 4
_1 5
_1 6
_1 7
_1 8
_1 9
_2 0
_2 1
_2 2
_2 3
_2 4
_2 5
_2 6
_2 7
_2 8
_2 9
_3 0
_3 1
_3 2
_3 3
_3 4
_3 5
_3 6
_3 7
_3 8
_3 9
_4 0
_4 1
_4 2
_4 3
_4 4
_4 5
_4 6
_4 7
_4 8
_4 9
_5 0
_5 1
_5 2
_5 3
_5 4
_5 5
_5 6
_5 7
_5 8
_5 9
_6 0
_6 1
_6 2
_6 3

MEMORY

Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q

SYSTEM

_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D

A

SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA

MEMORY

AJ 3 8
AJ 4 1
AN 3 8
AM 3 8
AJ 3 6
AJ 4 0
AM 4 4
AM 4 2
AN 4 3
AN 4 4
AU 4 0
AT3 8
AN 4 1
AN 3 9
AU 4 4
AU 4 2
AV3 9
AY 4 4
BA4 0
BD 4 3
AV4 1
AY 4 3
BB4 1
BC 4 0
AY 3 7
BD 3 8
AV3 7
AT3 6
AY 3 8
BB3 8
AV3 6
A W 36
BD 1 3
AU 1 1
BC 1 1
BA1 2
AU 1 3
AV1 3
BD 1 2
BC 1 2
B B9
B A9
AU 1 0
A V9
BA1 1
BD 9
AY 8
B A6
A V5
A V7
AT9
AN 8
AU 5
AU 6
AT5
AN 1 0
AM 1 1
AM 5
AJ 9
AJ 8
AN 1 2
AM 1 3
AJ 1 1
AJ 1 2

SYSTEM

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63

_D
_D
_D
_D
_D
_D
_D
_D

M
M
M
M
M
M
M
M

_0
_1
_2
_3
_4
_5
_6
_7

S B _ D QS _0
S B _ D QS _1
S B _ D QS _2
S B _ D QS _3
S B _ D QS _4
S B _ D QS _5
S B _ D QS _6
S B _ D QS _7
S B _ D QS # _0
S B _ D QS # _1
S B _ D QS # _2
S B _ D QS # _3
S B _ D QS # _4
S B _ D QS # _5
S B _ D QS # _6
S B _ D QS # _7
S B _ MA _0
S B _ MA _1
S B _ MA _2
S B _ MA _3
S B _ MA _4
S B _ MA _5
S B _ MA _6
S B _ MA _7
S B _ MA _8
S B _ MA _9
S B _ MA _ 10
S B _ MA _ 11
S B _ MA _ 12
S B _ MA _ 13
S B _ MA _ 14

B C1 6
BB1 7
BB3 3

M _B _ B S 0 # 1 3
M _B _ B S 1 # 1 3
M _B _ B S 2 # 1 3

A U1 7
B G1 6
BF1 4

M _B _ R A S # 13
M _B _ C A S # 13
M _B _ W E # 1 3

A M4 7
AY4 7
B D4 0
BF3 5
B G1 1
BA3
AP1
AK2
AL 4 7
AV4 8
B G4 1
B G3 7
B H9
BB2
A U1
A N6
AL 4 6
AV4 7
B H4 1
B H3 7
B G9
B C2
AT2
A N5
AV1 7
BA2 5
B C2 5
A U2 5
AW 2 5
BB2 8
A U2 8
AW 2 8
AT3 3
B D3 3
BB1 6
AW 3 3
AY3 3
B H1 5
A U3 3

M_ B _ A 0
M_ B _ A 1
M_ B _ A 2
M_ B _ A 3
M_ B _ A 4
M_ B _ A 5
M_ B _ A 6
M_ B _ A 7
M_ B _ A 8
M_ B _ A 9
M_ B _ A 1 0
M_ B _ A 1 1
M_ B _ A 1 2
M_ B _ A 1 3
M_ B _ A 1 4

M
M
M
M
M
M
M
M

_B
_B
_B
_B
_B
_B
_B
_B

_ DM
_ DM
_ DM
_ DM
_ DM
_ DM
_ DM
_ DM

0
1
2
3
4
5
6
7

13
13
13
13
13
13
13
13

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

_B
_B
_B
_B
_B
_B
_B
_B
_B
_B
_B
_B
_B
_B
_B
_B
_B

_ DQ S 0 1 3
_ DQ S 1 1 3
_ DQ S 2 1 3
_ DQ S 3 1 3
_ DQ S 4 1 3
_ DQ S 5 1 3
_ DQ S 6 1 3
_ DQ S 7 1 3
_ DQ S 0 # 1 3
_ DQ S 1 # 1 3
_ DQ S 2 # 1 3
_ DQ S 3 # 1 3
_ DQ S 4 # 1 3
_ DQ S 5 # 1 3
_ DQ S 6 # 1 3
_ DQ S 7 # 1 3
_ A [ 1 4 : 0] 1 3

Zo= 55 O? 5%

Sheet 8 of 42
CANTIGA 4/7

CA NT IG A

C A N TI GA

CANTIGA 4/7 B - 9

B.Schematic Diagrams

_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ
_ A _ DQ

DDR

1 3 M_ B _ D Q[ 6 3 : 0 ]

U 23D
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

DDR

12 M _ A _ D Q [ 6 3 : 0 ]

Zo= 55 O? 5%

Schematic Diagrams

CANTIGA 5/7
U23G
1.8V

VGFX_CORE

U23F

CANTIGA

B - 10 CANTIGA 5/7

1.05VS

POWER

.1
U_10V_X7R_04

.22U_
16V_X7R_06
C3
35

C249

22U_6.3V_08

*220U_2.5V_
B

.22U_16V_X7R_06
C260

C307

C739
.1U_10V_X7R_04

. 1U_10V_X7R_04

.22U_1
6V_X7R_
06

VCC_
35

C231

C235

C6
54

VCC_
13
VCC_
14
VCC_
15
VCC_
16
VCC_
17
VCC_
18
VCC_
19
VCC_
20
VCC_
21
VCC_
22
VCC_
23
VCC_
24
VCC_
25
VCC_
26
VCC_
27
VCC_
28
VCC_
29
VCC_
30
VCC_
31
VCC_
32
VCC_
33
VCC_
34

VCC NCTF

1U_6
. 3V_04

C656

C666

22U_6.3V_08

22U_6.3V_08

C6
62

VCC_NCT
F_1
VCC_NCT
F_2
VCC_NCT
F_3
VCC_NCT
F_4
VCC_NCT
F_5
VCC_NCT
F_6
VCC_NCT
F_7
VCC_NCT
F_8
VCC_NCT
F_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

AM
32
AL
32
AK32
AJ32
AH32
AG
32
AE32
AC32
AA32
Y32
W32
U32
AM
30
AL
30
AK30
AH30
AG
30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V3
0
U30
AL
29
AK29
AJ29
AH29
AG
29
AE29
AC29
AA29
Y29
W29
V2
9
AL
28
AK28
AL
26
AK26
AK25
AK24
AK23

1
U_6.3V_04
C336

CANTIG
A

1U_6
. 3V_04

VCC_AXG_SENSE
VSS_AXG
_SENSE

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

C328

AJ14
AH14

AV44
BA37
AM40
AV21
AY5
AM10
BB13

.22U_1
6V_X7R_
06

.1U_10V_X7R_04
C240
GPUVCCSENSE
GPUVSSSENSE

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG
26
AE26
AC26
AH25
AG
25
AF25
AG
24
AJ23
AH23
AF23

VCC_
1
VCC_
2
VCC_
3
4
VCC_
VCC_
5
VCC_
6
VCC_
7
VCC_
8
VCC_
9
VCC_
10
VCC_
11
VCC_
12

VGFX_CORE

.47U_10V_04

.1U_10V_X7R_04

.1U_
10V_X7R_04
C242

.1U_10V_
X7R_04

C223

C677

+

C234

*220U_4V_D2

VGFX_CO
RE

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42

.22U_16V_X7R_06

Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14

C318

*.1U_16V_0
4

AG
34
AC34
AB34
AA34
Y34
V34
U34
AM
33
AK33
AJ33
AG
33
AF33

T32

C2
82

*.1U_
16V_0
4

.1U_
16V_0
4

C263

*.1U_
16V_0
4

C233

C277

*.1U_
16V_04

.1U_16V_04

C294

*.1U_1
6V_04

VCC GFX NCTF

C322

VGFX_CORE

C256

VCCSM_42
C250

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

PLACE CLOSE
TO THE GMCH

C266

VCCSM_40

BA36
BB24
BD16
BB21
AW16
AW13
AT13

+

VCC GFX

B.Schematic Diagrams

VCCSM_36
VCCSM_37
VCCSM_38

VCC SM

Sheet 9 of 42
CANTIGA 5/7

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

VCC CORE

? BGA

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC SM LF

C319

C300

C708

C749

+

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

POWER

22
U_6.3V_08

.22U_16V_X7R_06

*150U_4V_B2

.1U_10V_X7R_04

1.05VS
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29

31 VGFX_CORE
2, 3
, 6,7,10,12,13,14,15,16,17,18,19,21,22,23,25,26,27,33 3.3VS
7,10,12,13,29,30 1.8V
2,3,4,5,7,10,15,18,29,31 1.05VS

Schematic Diagrams

CANTIGA 6/7
C859

C678

C683

4
.7
U_6.3V_06

.01U_16V_04

.1U_10V_X7R_04

1.05VS
U2
3H

3.3VS_TV_CRT_BG
L
58
B27
A26
C860

C672

C667

*4.7U_6
. 3V_06

.01U_16V_04

.1U_10V_X7R_04

A25
B25

.

1.05VS
L14
BKP1005
HS121_04

1 0m ils

VCCA_DPLLA

.
.

4.7U_
6.3V_0
6

*220
U_6.3V_B2

L1
9
BKP1005HS121_04

F47

C243

VCCA_DPLLB

.1U_10V_X7R_04

VCCA_HPLL

AD1

VCCA_MPLL

AE1

L48

VCCA_DAC_BG
VSSA_DAC_BG

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL

PLL

+C698

C8
74

VCCA_CRT_DAC_1
VCCA_CRT_DAC_2

CRT

HCB1608KF-121T25_06

VTT

3. 3
VS

VCCA_M
PLL

1 0m ils

1.05VS

C878

C292

10U_
6.3V_X
5R_08

.1U_10V_X7R_04

1.8V_TXLVDS

VCCA_L
VDS

4.7U_6.3V_06

.1U_10V_X7R_04

1.5VS
AD48

C702

C304

.1U_10V_X7R_04

.1U_10V_X7R_04

AA48
C693

10U_10V_08

.1U_10V_X7R_04

1.05VS
+ C34
9

C268

C245

10U_1
0V_08

1U_6.3V_04

4.7U_6.3V_06

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

10 m ils
C273

C264

C283

.1U_10V_X7R_04

*2.2u_6.3V_06

10U_10V_08

VCCA_PEG_PLL

C680

C67
6

2.2U_6.3V_06

4
.7
U_6.3V_06

4.7U_6
.3
V_06

C875

C876

C877

*. 1U_16V_04

*.1U_16V_04

*10U_10V_08

15
0U_4V_B2

VCC_HV_1
VCC_HV_2
VCC_HV_3

C35
B35
A35

10_06 Z1001

R101

C

D7
SCS355
V
A

1.05VS

Sheet 10 of 42
CANTIGA 6/7

C230

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9

POWER

A SM

*100U_6.3V_B2

C261

VCCA_PEG_BG

A PEG

VCCA_
MPLL

C692

C671

.47U_10V_04

.1U_16V_04
1.5VM_PEGPLL

1 0m ils

+ C663

C674

3.3VS

AXF

C689

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

B22
B21
A21

20 m ils

M
CH_VCC_AXF
C679

C684

1U_6.3V_04

*10U_
10V_
08

25 m ils

M
CH_VCC_SMCK

SM CK

.

L59
BKP1005HS121_
04

VSSA_LVDS

C687

HV

1000P_5
0V_04
J47

BKP1005HS121_04

.

J48
VCCA_HPLL

A LVDS

C285

1 0m ils

L78

U13
T
13
U12
T
12
U11
T
11
U10
T
10
U9
T
9
U8
T
8
U7
T
7
U6
T
6
U5
T
5
V3
U3
V2
U2
T
2
V1
U1

VCC_SM
_CK_1
VCC_SM
_CK_2
VCC_SM
_CK_3
VCC_SM
_CK_4

BF21
BH20
BG20
BF20

C700

C701

.1
U_10V_X7R_
04

1
0U_6.3V_X5R_
08

R454

0_06

R484

0_06

1.05VS

1.8V

L1
7
BKP1005HS121_04

.

C289

C274

1000P_50V_04

10U_10V_08

1. 8V_TX
LVDS
3.3VS_TV_CRT
_BG

C675

. 01
U_16V_04

.1U_10V_X7R_04

20 m ils
C220
R153

D04 -0925

M
CH_
VCC_HDA

VCCD_T
VDAC

*20
mil_short

VCC_TX_LVDS
VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8

K47

1.05VM_
PEG

A CK

C670

R600
*20mil_shor t

AP28
AN28
AP25
AN25
AN24
AM
28
AM
26
AM
25
AL25
AM
24
AL24
AM
23
AL23

PEG

3.3VS

VCC_PEG
_1
VCC_PEG
_2
VCC_PEG
_3
VCC_PEG
_4
VCC_PEG
_5

80 m ils

V48
U48
V47
U47
U46

C688

VCC_HDA

1.5VS
C6
91

. 01U_16V_04

.1U_1
0V_X
7R_04

M
25

VCCD_TVDAC

L28
VCCD_QDAC

C296

1
U_6.3V_04

10U_
10V_08

VCCD_HPLL
VCCD_PEG
_PLL

C86
3

.1U_10V_X7R_04

.1U_10
V_X7R_04

1.05VS

C704

C308

C32
6

.1
U_10V_X7R_
04

.1U_10V_X7R_04

10U_10V_08

VTTLF1
VTTLF2
VTTLF3

20m ils

AH48
AF48
AH47
AG47

A8
L
1
AB2

L6
0

.

1.05VS

HCB1608
KF-121T25_0
6

VTTLF_CAP1
VTTLF_CAP2
VTTLF_CAP3
C685

C665

C657

.4
7U_10V_04

.47U_
10V_
04

.4
7U_10V_04

1.8V
R134

*20mil_short

M
CH_
VCCD_LVDS

M
38
L37

VCCD_LVDS_1
VCCD_LVDS_2

C248
1U_6.3V_04

CANTI G
A

LVDS

C314

.1U_10
V_X7R_04

AA47
.1U_10V_X7R_04

BKP1005HS121_04

AF1

1.05VS

C246

.

1.05VS

1 0m ils

1.5VM
_PEG
PLL

C301

L20

DMI
D TV/CRT

C690

HDA

A32

VCCA_T
V_DAC_1
VCCA_T
V_DAC_2

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

VTTLF

.1U_10V_X7R_04

TV

.01U_16V_04

B24
A24

.

HCB1608
KF-121T25_0
6

C862

22U_6.3V_08

1.05VM_
DMI

.1U_10V_X7R_0
4
C686

L8
3

C699

6
1.05VM_PEG
7,9,12,13,29,30 1.8V
4
, 15
, 16, 1
8,19,20,29 1. 5
VS
2,3,6,7,12,13,14,15,16,17,18,19,21
, 22
, 23, 2
5,26,27,33 3. 3
VS
2,3, 4
,5
, 7,9,15,18
, 29
,3
1 1.05VS

CANTIGA 6/7 B - 11

B.Schematic Diagrams

+ C325
*220U_6
. 3V_B2

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

Schematic Diagrams

CANTIGA 7/7
U 2 3I
AM 36
AE 36
P36
L36
J 36
F36
B36
AH 35
AA 35
Y 35
U 35
T35
BF 34
AM 34
AJ 3 4
AF 34
AE 34
W 34
B34
A34
BG 33
BC 33
BA 33
AV 33
AR 33
AL3 3
AH 33
AB 33
P33
L33
H 33
N 32
K32
F32
C 32
A31
AN 29
T29
N 29
K29
H 29
F29
A29
BG 28
BD 28
BA 28
AV 28
AT2 8
AR 28
AJ 2 8
AG 28
AE 28
AB 28
Y 28
P28
K28
H 28
F28
C 28
BF 26
AH 26
AF 26
AB 26
AA 26
C 26
B26
BH 25
BD 25
BB 25
AV 25
AR 25
AJ 2 5
AC 25
Y 25
N 25
L25
J 25
G25
E25
BF 24
AD 12
AY 24
AT2 4
AJ 2 4
AH 24
AF 24
AB 24
R 24
L24
K24
J 24
G24
F24
E24
BH 23
AG 23
Y 23
B23
A23
AJ 6

B G 21
L12
A W 21
A U 21
AP 21
A N 21
A H 21
AF 21
AB 21
R 21
M21
J 21
G21
B C 20
BA 20
A W 20
A T20
A J 20
A G 20
Y 20
N 20
K 20
F 20
C 20
A 20
B G 19
A 18
B G 17
B C 17
A W 17
A T17
R 17
M17
H 17
C 17
BA 16
A U 16
A N 16
N 16
K 16
G16
E 16
B G 15
A C 15
W 15
A 15
B G 14
AA 14
C 14
B G 13
B C 13
BA 13

A N 13
A J 13
AE 13
N 13
L13
G13
E 13
BF 12
AV 12
A T12
A M12
AA 12
J 12
A 12
B D 11
BB 11
A Y 11
A N 11
A H 11
Y 11
N 11
G11
C 11
B G 10
AV 10
A T10
A J 10
AE 10
AA 10
M10
BF 9
B C9
A N9
A M9
A D9
G9
B9
B H8
BB 8
AV 8
A T8

V SS _199
V SS _200
V SS _201
V SS _202
V SS _203
V SS _204
V SS _205
V SS _206
V SS _207
V SS _208
V SS _209
V SS _210
V SS _211
V SS _212
V SS _213
V SS _214
V SS _215
V SS _216
V SS _217
V SS _218
V SS _219
V SS _220
V SS _221
V SS _222
V SS _223
V SS _224
V SS _225
V SS _226
V SS _227
V SS _228
V SS _229
V SS _230
V SS _231
V SS _232
V SS _233

VSS

V SS _235
V SS _237
V SS _238
V SS _239
V SS _240
V SS _241
V SS _242
V SS _243
V SS _244
V SS _245
V SS _246
V SS _247
V SS _248
V SS _249
V SS _250
V SS _251
V SS _252

V SS _255
V SS _256
V SS _257
V SS _258
V SS _259
V SS _260
V SS _261
V SS _262
V SS _263
V SS _264
V SS _265
V SS _266
V SS _267
V SS _268
V SS _269
V SS _270
V SS _271
V SS _272
V SS _273
V SS _275
V SS _276
V SS _277
V SS _278
V SS _279
V SS _280
V SS _281
V SS _282
V SS _283
V SS _284
V SS _285
V SS _286
V SS _287
V SS _288
V SS _289
V SS _290
V SS _291
V SS _292
V SS _293
V SS _294
V SS _295
V SS _296

C A N TI G A
C A N TI G A

B - 12 CANTIGA 7/7

V SS _297
V SS _298
V SS _299
V SS _300
V SS _301
V SS _302
V SS _303
V SS _304
V SS _305
V SS _306
V SS _307
V SS _308
V SS _309
V SS _310
V SS _311
V SS _312
V SS _313
V SS _314
V SS _315
V SS _316
V SS _317
V SS _318
V SS _319
V SS _320
V SS _321
V SS _322
V SS _323
V SS _324
V SS _325
V SS _327
V SS _328
V SS _329
V SS _330
V SS _331
V SS _332
V SS _333
V SS _334
V SS _335
V SS _336
V SS _337
V SS _338
V SS _339
V SS _340
V SS _341
V SS _342
V SS _343
V SS _344
V SS _345
V SS _346
V SS _347
V SS _348
V SS _349
V SS _350
V SS _351
V SS _352
V SS _353
V SS _354

VSS NCTF

VSS

VS S _1 00
VS S _1 01
VS S _1 02
VS S _1 03
VS S _1 04
VS S _1 05
VS S _1 06
VS S _1 07
VS S _1 08
VS S _1 09
VS S _1 10
VS S _1 11
VS S _1 12
VS S _1 13
VS S _1 14
VS S _1 15
VS S _1 16
VS S _1 17
VS S _1 18
VS S _1 19
VS S _1 20
VS S _1 21
VS S _1 22
VS S _1 23
VS S _1 24
VS S _1 25
VS S _1 26
VS S _1 27
VS S _1 28
VS S _1 29
VS S _1 30
VS S _1 31
VS S _1 32
VS S _1 33
VS S _1 34
VS S _1 35
VS S _1 36
VS S _1 37
VS S _1 38
VS S _1 39
VS S _1 40
VS S _1 41
VS S _1 42
VS S _1 43
VS S _1 44
VS S _1 45
VS S _1 46
VS S _1 47
VS S _1 48
VS S _1 49
VS S _1 50
VS S _1 51
VS S _1 52
VS S _1 53
VS S _1 54
VS S _1 55
VS S _1 56
VS S _1 57
VS S _1 58
VS S _1 59
VS S _1 60
VS S _1 61
VS S _1 62
VS S _1 63
VS S _1 64
VS S _1 65
VS S _1 66
VS S _1 67
VS S _1 68
VS S _1 69
VS S _1 70
VS S _1 71
VS S _1 72
VS S _1 73
VS S _1 74
VS S _1 75
VS S _1 76
VS S _1 77
VS S _1 78
VS S _1 79
VS S _1 80
VS S _1 81
VS S _1 82
VS S _1 83
VS S _1 84
VS S _1 85
VS S _1 86
VS S _1 87
VS S _1 88
VS S _1 89
VS S _1 90
VS S _1 91
VS S _1 92
VS S _1 93
VS S _1 94
VS S _1 95
VS S _1 96
VS S _1 97
VS S _1 98
VS S _1 99

VSS SCB

Sheet 11 of 42
CANTIGA 7/7

VS S _1
VS S _2
VS S _3
VS S _4
VS S _5
VS S _6
VS S _7
VS S _8
VS S _9
VS S _10
VS S _11
VS S _12
VS S _13
VS S _14
VS S _15
VS S _16
VS S _17
VS S _18
VS S _19
VS S _20
VS S _21
VS S _22
VS S _23
VS S _24
VS S _25
VS S _26
VS S _27
VS S _28
VS S _29
VS S _30
VS S _31
VS S _32
VS S _33
VS S _34
VS S _35
VS S _36
VS S _37
VS S _38
VS S _39
VS S _40
VS S _41
VS S _42
VS S _43
VS S _44
VS S _45
VS S _46
VS S _47
VS S _48
VS S _49
VS S _50
VS S _51
VS S _52
VS S _53
VS S _54
VS S _55
VS S _56
VS S _57
VS S _58
VS S _59
VS S _60
VS S _61
VS S _62
VS S _63
VS S _64
VS S _65
VS S _66
VS S _67
VS S _68
VS S _69
VS S _70
VS S _71
VS S _72
VS S _73
VS S _74
VS S _75
VS S _76
VS S _77
VS S _78
VS S _79
VS S _80
VS S _81
VS S _82
VS S _83
VS S _84
VS S _85
VS S _86
VS S _87
VS S _88
VS S _89
VS S _90
VS S _91
VS S _92
VS S _93
VS S _94
VS S _95
VS S _96
VS S _97
VS S _98
VS S _99

NC

B.Schematic Diagrams

U 2 3J
A U 48
A R 48
A L48
BB 47
AW 47
A N 47
A J 47
AF 47
A D 47
AB 47
Y 47
T47
N 47
L47
G47
B D 46
BA 46
A Y 46
AV 46
A R 46
A M46
V 46
R 46
P 46
H 46
F 46
BF 44
A H 44
A D 44
AA 44
Y 44
U 44
T44
M44
F 44
B C 43
AV 43
A U 43
A M43
J 43
C 43
B G 42
A Y 42
A T42
A N 42
A J 42
AE 42
N 42
L42
B D 41
A U 41
A M41
A H 41
A D 41
AA 41
Y 41
U 41
T41
M41
G41
B 41
B G 40
BB 40
AV 40
A N 40
H 40
E 40
A T39
A M39
A J 39
AE 39
N 39
L39
B 39
B H 38
B C 38
BA 38
A U 38
A H 38
A D 38
AA 38
Y 38
U 38
T38
J 38
F 38
C 38
BF 37
BB 37
AW 37
A T37
A N 37
A J 37
H 37
C 37
B G 36
B D 36
AK 15
A U 36

V SS _N C TF _1
V SS _N C TF _2
V SS _N C TF _3
V SS _N C TF _4
V SS _N C TF _5
V SS _N C TF _6
V SS _N C TF _7
V SS _N C TF _8
V SS _N C TF _9
V SS _N C TF _10
V SS _N C TF _11
V SS _N C TF _12
V SS _N C TF _13
V SS _N C TF _14
V SS _N C TF _15
V SS _N C TF _16

VS S_S C B _1
VS S_S C B _2
VS S_S C B _3
VS S_S C B _4
VS S_S C B _5
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N

C _26
C _27
C _28
C _29
C _30
C _31
C _32
C _33
C _34
C _35
C _36
C _37
C _38
C _39
C _40
C _41
C _42

A H8
Y8
L8
E8
B8
AY7
A U7
A N7
A J7
A E7
A A7
N7
J7
B G6
B D6
A V6
A T6
A M6
M6
C6
B A5
A H5
A D5
Y5
L5
J5
H5
F5
B E4
B C3
A V3
A L3
R3
P3
F3
B A2
A W2
A U2
A R2
A P2
A J2
A H2
A F2
A E2
A D2
A C2
Y2
M2
K2
A M1
A A1
P1
H1
U 24
U 28
U 25
U 29

A F32
A B32
V 32
A J 30
A M2 9
A F29
A B29
U 26
U 23
A L20
V 20
A C19
A L17
A J 17
A A17
U 17

B H48
B H1
A 48
C1
A3
E1
D2
C3
B4
A5
A6
A 43
A 44
B 45
C 46
D 47
B 47
A 46
F 48
E 48
C 48
B 48

Z110 1
Z110 2
Z110 3
Z110 4

R 11 8
R 12 7
R 12 1
R 13 2

*10m il_s hort
*10m il_s hort
*10m il_s hort
*10m il_s hort

Schematic Diagrams

DDRII SO-DIMM - 0
SO-DIMM 0
8

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

Layout Note:
signal/space/signal:
8/ 4 / 8

M
M
M
M

_ A_ BS0 #
_ A_ BS1 #
_ CS 0 #
_ CS 1 #

M _ CK E 0
M _ CK E 1
M _ A _ CA S #
M _ A _ RA S #
M _ A_ W E#
S A 0 _ D I M0 _ 1
S A 1 _ D I M0 _ 1

2 ,1 3 ,1 7 ICH _ S M B CL K 0
2 ,1 3 ,1 7 ICH _ S M B DA T 0
7
7

1 0K _ 04

M _ OD T 0
M _ OD T 1

M _ OD T 0
M _ OD T 1

8
8
8
8
8
8
8
8

M
M
M
M
M
M
M
M

_ A _ DM
_ A _ DM
_ A _ DM
_ A _ DM
_ A _ DM
_ A _ DM
_ A _ DM
_ A _ DM

8
8
8
8
8
8
8
8

M_ A
M_ A
M_ A
M_ A
M_ A
M_ A
M_ A
M_ A

8
8
8
8
8
8
8
8

M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D

_D
_D
_D
_D
_D
_D
_D
_D

Q
Q
Q
Q
Q
Q
Q
Q

QS
QS
QS
QS
QS
QS
QS
QS

1 02
1 01
1 00
99
98
97
94
92
93
91
1 05
90
89
1 16
86
84
85
1 07
1 06
1 10
1 15
30
32
1 64
1 66
79
80
1 13
1 08
1 09
1 98
2 00
1 97
1 95
1 14
1 19
10
26
52
67
1 30
1 47
1 70
1 85

0
1
2
3
4
5
6
7

13
31
51
70
1 31
1 48
1 69
1 88

S0
S1
S2
S3
S4
S5
S6
S7

11
29
49
68
1 29
1 46
1 67
1 86

0#
1#
2#
3#
4#
5#
6#
7#

DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 8
DQ 9
DQ 1 0
DQ 1 1
DQ 1 2
DQ 1 3
DQ 1 4
DQ 1 5
DQ 1 6
DQ 1 7
DQ 1 8
DQ 1 9
DQ 2 0
DQ 2 1
DQ 2 2
DQ 2 3
DQ 2 4
DQ 2 5
DQ 2 6
DQ 2 7
DQ 2 8
DQ 2 9
DQ 3 0
DQ 3 1
DQ 3 2
DQ 3 3
DQ 3 4
DQ 3 5
DQ 3 6
DQ 3 7
DQ 3 8
DQ 3 9
DQ 4 0
DQ 4 1
DQ 4 2
DQ 4 3
DQ 4 4
DQ 4 5
DQ 4 6
DQ 4 7
DQ 4 8
DQ 4 9
DQ 5 0
DQ 5 1
DQ 5 2
DQ 5 3
DQ 5 4
DQ 5 5
DQ 5 6
DQ 5 7
DQ 5 8
DQ 5 9
DQ 6 0
DQ 6 1
DQ 6 2
DQ 6 3

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 1 0 /A P
A1 1
A1 2
A1 3
A1 4
A1 5
A 1 6 _B A 2
BA0
BA1
S0 #
S1 #
CK 0
C K 0#
CK 1
C K 1#
CK E0
CK E1
CA S#
RA S#
W E#
SA0
SA1
SC L
SD A
OD T 0
OD T 1
DM
DM
DM
DM
DM
DM
DM
DM

0
1
2
3
4
5
6
7

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

S0
S1
S2
S3
S4
S5
S6
S7

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

S0 #
S1 #
S2 #
S3 #
S4 #
S5 #
S6 #
S7 #

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D
_ A_ D

M_ A _ D Q[ 6 3 : 0 ] 8

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q1 0
Q1 1
Q1 2
Q1 3
Q1 4
Q1 5
Q1 6
Q1 7
Q1 8
Q1 9
Q2 0
Q2 1
Q2 2
Q2 3
Q2 4
Q2 5
Q2 6
Q2 7
Q2 8
Q2 9
Q3 0
Q3 1
Q3 2
Q3 3
Q3 4
Q3 5
Q3 6
Q3 7
Q3 8
Q3 9
Q4 0
Q4 1
Q4 2
Q4 3
Q4 4
Q4 5
Q4 6
Q4 7
Q4 8
Q4 9
Q5 0
Q5 1
Q5 2
Q5 3
Q5 4
Q5 5
Q5 6
Q5 7
Q5 8
Q5 9
Q6 0
Q6 1
Q6 2
Q6 3

1 .8 V

M_ C K E 0
M_ A _ B S 2 #
M_ C K E 1

1
2
3
4

8
7
6
5

M_ A _ A 1 1
M_ A _ A 1 4
M_ A _ A 7
M_ A _ A 6

1
2
3
4

8
7
6
5

RN 2
8 P 4 R X 5 6 _ 04

M_ A _ A 4
M_ A _ A 2
M_ A _ A 0
M_ A _ B S 1 #

1
2
3
4

8
7
6
5

RN 3
8 P 4 R X 5 6 _ 04

RN 1
8 P 4 R X 5 6 _ 04

C3 9 7

. 1 U _ 10 V _ X 7 R _0 4

C3 9 2

. 0 1 U _5 0 V _ X 7 R _ 0 4

C7 1 7

. 1 U _ 10 V _ X 7 R _0 4

C7 2 4

* .1 U_ 1 0 V _ X 7 R_ 0 4

C3 9 4

. 1 U _ 10 V _ X 7 R _0 4

C3 9 3

* .1 U_ 1 0 V _ X 7 R_ 0 4

C3 9 1

. 1 U _ 10 V _ X 7 R _0 4

C7 2 1

* .1 U_ 1 0 V _ X 7 R_ 0 4

C7 2 3

. 1 U _ 10 V _ X 7 R _0 4

C7 1 6

. 1 U _ 10 V _ X 7 R _0 4

C3 9 6

* .1 U_ 1 0 V _ X 7 R_ 0 4

C7 2 0

. 1 U _ 10 V _ X 7 R _0 4

C7 2 5

. 1 U _ 10 V _ X 7 R _0 4

C3 9 5

. 1 U _ 10 V _ X 7 R _0 4

C7 1 9

. 1 U _ 10 V _ X 7 R _0 4

C7 2 2

. 0 1 U _5 0 V _ X 7 R _ 0 4

C7 1 8

* .1 U_ 1 0 V _ X 7 R_ 0 4

J _ D I M M_ 1 B
1 12
1 11
1 17
96
95
1 18
81
82
87
1 03
88
1 04

3 .3 VS

20m ils
C 726

C 727

2 . 2 U _ 6. 3 V _0 6

VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD

. 1 U _ 1 6V _0 4
1 99

C4 0 2

C 408

2 . 2U _ 6 . 3 V _ 0 6

. 1 U _ 1 6V _0 4

V D DSP D

83
1 20
50
69
1 63

7 , 1 3 P M _E XT T S 1 #

2 0m ils

MV R E F _ D I M 0 _ 1
D I M M0 _ G N D 0
D I M M0 _ G N D 1

D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2

NC
NC
NC
NC
NC

1

1
2
3
4
T EST

VR EF

2 01
2 02

GN D 0
GN D 1

47
1 33
1 83
77
12
48
1 84
78
71
72
1 21
1 22
1 96
1 93
8

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS1 0
VSS1 1
VSS1 2
VSS1 3
VSS1 4
VSS1 5

V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V

SS1 6
SS1 7
SS1 8
SS1 9
SS2 0
SS2 1
SS2 2
SS2 3
SS2 4
SS2 5
SS2 6
SS2 7
SS2 8
SS2 9
SS3 0
SS3 1
SS3 2
SS3 3
SS3 4
SS3 5
SS3 6
SS3 7
SS3 8
SS3 9
SS4 0
SS4 1
SS4 2
SS4 3
SS4 4
SS4 5
SS4 6
SS4 7
SS4 8
SS4 9
SS5 0
SS5 1
SS5 2
SS5 3
SS5 4
SS5 5
SS5 6
SS5 7

18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162

M_ A _ R A S #
M_ C S 0 #
M_ O D T 0
M_ A _ A 1 3

1
2
3
4

8
7
6
5

RN 4
8 P 4 R X 5 6 _ 04

M_ A _ A 5
M_ A _ A 8
M_ A _ A 9
M_ A _ A 1 2

1
2
3
4

8
7
6
5

RN 2 0
8 P 4 R X 5 6 _ 04

M_ A _ B S 0 #
M_ A _ A 1 0
M_ A _ A 1
M_ A _ A 3

1
2
3
4

8
7
6
5

RN 2 1
8 P 4 R X 5 6 _ 04

M_ O D T 1
M_ C S 1 #
M_ A _ C A S #
M_ A _ W E #

1
2
3
4

8
7
6
5

RN 2 2
8 P 4 R X 5 6 _ 04

Sheet 12 of 42
DDRII SO-DIMM - 0

La yout not e :
Pl a ce one c a p c lose to e ve ry 2 pul l- up re si stors
te rm ina t e d to + VTT_ M EM

2 -1 7 34 0 7 3 -1

CLOSE TO SO-DIMM_0

1. 8V

R 19 0

M V R E F _ D I M0 _ 1

1 K _ 1 % _0 4

R 1 89

C 40 7

C 40 9

1 K_ 1 % _ 0 4

1 U_ 6 .3 V _ 0 4

. 1 U _1 0 V _ X 7 R _ 0 4

V TT _ M E M

2 -1 7 34 0 7 3 -1

C4 0 1

C4 0 0

10 U _ 1 0V _ 08

10 U _ 1 0V _ 08

1 .8 V

+C 3 85
1 5 0 U_ 4 V _ B 2

C4 2 8

C 4 16

C4 1 3

C4 1 7

C 427

C4 1 5

C 42 5

C 412

.1 U_ 1 0 V _ X 7 R_ 0 4

. 1 U _ 10 V _X 7 R _ 04

. 1 U _ 1 0 V _ X 7R _ 0 4

.1 U_ 1 0 V _ X 7 R_ 0 4

. 1 U _ 1 0V _X 7 R _ 04

. 1 U _ 1 0 V _ X 7R _ 0 4

.1 U_ 1 0 V _ X 7 R_ 0 4

. 1 U _ 1 0V _X 7 R _ 04

1 .8 V

7 , 9 , 1 0 , 1 3 , 2 9, 30 1 . 8 V
13 , 3 0 V T T_ M E M
2 , 3 , 6 , 7 , 1 0 , 1 3 , 1 4, 15 , 1 6 , 1 7 , 1 8 , 1 9 , 21 , 2 2 , 2 3 , 2 5 , 2 6 , 2 7, 33 3 . 3 V S

1 .8 V

+ C 43 7
* 15 0 U _ 4V _B 2

C 43 5

C4 4 6

C4 3 4

C4 3 3

C4 1 8

C 426

C 414

C 429

C 405

C4 0 4

1 0 U_ 1 0 V _ 0 8

1 0 U_ 1 0 V _ 0 8

1 0 U_ 1 0 V _ 0 8

4 .7 U_ 6 .3 V _ 0 6

4 .7 U_ 6 .3 V _ 0 6

1 U _ 6 .3 V _ 0 4

1 U _ 6 . 3 V _ 04

1 U _ 6 . 3V _ 04

. 2 2 U _ 16 V _ X 7 R _0 6

. 2 2U _ 1 6 V _ X 7R _ 0 6

+ C 41 9
2 2 0 U_ 4 V _ D 2

DDRII SO-DIMM - 0 B - 13

B.Schematic Diagrams

1 0 K_ 0 4

R1 9 8

_ A_ A0
_ A_ A1
_ A_ A2
_ A_ A3
_ A_ A4
_ A_ A5
_ A_ A6
_ A_ A7
_ A_ A8
_ A_ A9
_ A_ A1 0
_ A_ A1 1
_ A_ A1 2
_ A_ A1 3
_ A_ A1 4

M _ A_ BS2 #

M_ A _ B S 2#

8
M_ A _ B S 0#
8
M_ A _ B S 1#
7
M _ C S 0#
7
M _ C S 1#
7
M_ C L K _ D D R 0
7 M _ CL K _ D DR 0 #
7
M_ C L K _ D D R 1
7 M _ CL K _ D DR 1 #
7
M _ CK E 0
7
M _ CK E 1
8
M_ A _C A S #
8
M_ A _R A S #
8
M _ A_ W E#

R 197

V TT _ M E M

J _ D I M M_ 1 A

M _ A _ A [1 4 :0 ]

8

+VTT_MEM RESISTORS

Schematic Diagrams

DDRII SO-DIMM - 1
SO-DIMM 1

+VTT_MEM RESISTORS
V TT _ M E M

8

J _ D I MM _2 A

M_ B _ A [ 1 4 : 0 ]

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

B.Schematic Diagrams

Layout Note:
signal/space/signal:
8 / 4 / 8

Sheet 13 of 42
DDRII SO-DIMM - 1

R 217
1 0 K_ 0 4

8

M _B _B S 2 #

8
8
7
7
7
7
7
7
7
7
8
8
8

M _B _B S 0 #
M _B _B S 1 #
M_ C S 2 #
M_ C S 3 #
M _ CL K _ DD R 2
M_ C LK _D D R 2 #
M _ CL K _ DD R 3
M_ C LK _D D R 3 #
M_ C K E 2
M_ C K E 3
M _ B _ CA S #
M _ B _ RA S #
M_ B _ W E #

_B _ A 0
_B _ A 1
_B _ A 2
_B _ A 3
_B _ A 4
_B _ A 5
_B _ A 6
_B _ A 7
_B _ A 8
_B _ A 9
_B _ A 1 0
_B _ A 1 1
_B _ A 1 2
_B _ A 1 3
_B _ A 1 4

M _B _ B S 2#
M
M
M
M

_B _ B S 0#
_B _ B S 1#
_C S 2 #
_C S 3 #

M _C K E 2
M _C K E 3
M _B _ C A S #
M _B _ R A S #
M _B _ W E #
S A 0 _ D I M1 _ 1
S A 1 _ D I M1 _ 1

2 , 1 2, 17 I C H _ S M B C L K 0
2 , 1 2, 17 I C H _ S M B D A T 0

R 218
1 0 K_ 0 4

7
7

M_ O D T 2
M_ O D T 3

8
8
8
8
8
8
8
8

3 .3 VS

M
M
M
M
M
M
M
M

8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

_ B _ DM
_ B _ DM
_ B _ DM
_ B _ DM
_ B _ DM
_ B _ DM
_ B _ DM
_ B _ DM

_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ

_B
_B
_B
_B
_B
_B
_B
_B

_D
_D
_D
_D
_D
_D
_D
_D

Q
Q
Q
Q
Q
Q
Q
Q

M _O D T 2
M _O D T 3

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
107
106
110
115
30
32
164
166
79
80
113
108
109
198
200
197
195

BA0
BA1
S0 #
S1 #
C K0
C K0 #
C K1
C K1 #
C KE0
C KE1
C AS#
R AS#
WE #
SA0
SA1
SC L
SD A

114
119

O DT 0
O DT 1

10
26
52
67
130
147
170
185

0
1
2
3
4
5
6
7

13
31
51
70
131
148
169
188

S0
S1
S2
S3
S4
S5
S6
S7

11
29
49
68
129
146
167
186

S0 #
S1 #
S2 #
S3 #
S4 #
S5 #
S6 #
S7 #

D Q0
D Q1
D Q2
D Q3
D Q4
D Q5
D Q6
D Q7
D Q8
D Q9
DQ 1 0
DQ 1 1
DQ 1 2
DQ 1 3
DQ 1 4
DQ 1 5
DQ 1 6
DQ 1 7
DQ 1 8
DQ 1 9
DQ 2 0
DQ 2 1
DQ 2 2
DQ 2 3
DQ 2 4
DQ 2 5
DQ 2 6
DQ 2 7
DQ 2 8
DQ 2 9
DQ 3 0
DQ 3 1
DQ 3 2
DQ 3 3
DQ 3 4
DQ 3 5
DQ 3 6
DQ 3 7
DQ 3 8
DQ 3 9
DQ 4 0
DQ 4 1
DQ 4 2
DQ 4 3
DQ 4 4
DQ 4 5
DQ 4 6
DQ 4 7
DQ 4 8
DQ 4 9
DQ 5 0
DQ 5 1
DQ 5 2
DQ 5 3
DQ 5 4
DQ 5 5
DQ 5 6
DQ 5 7
DQ 5 8
DQ 5 9
DQ 6 0
DQ 6 1
DQ 6 2
DQ 6 3

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 1 0 /A P
A1 1
A1 2
A1 3
A1 4
A1 5
A1 6 _ BA2

D
D
D
D
D
D
D
D

M0
M1
M2
M3
M4
M5
M6
M7

D
D
D
D
D
D
D
D

QS 0
QS 1
QS 2
QS 3
QS 4
QS 5
QS 6
QS 7

D
D
D
D
D
D
D
D

QS 0 #
QS 1 #
QS 2 #
QS 3 #
QS 4 #
QS 5 #
QS 6 #
QS 7 #

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
1 23
1 25
1 35
1 37
1 24
1 26
1 34
1 36
1 41
1 43
1 51
1 53
1 40
1 42
1 52
1 54
1 57
1 59
1 73
1 75
1 58
1 60
1 74
1 76
1 79
1 81
1 89
1 91
1 80
1 82
1 92
1 94

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ
_ B _ DQ

M _B _D Q[ 63 : 0 ] 8

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63

1 . 8V
J_ D I MM _ 2B

C 457

C 456

11 2
11 1
11 7
96
95
11 8
81
82
87
10 3
88
10 4

2 . 2 U _6 . 3 V _ 0 6

. 1U _ 1 6V _0 4

19 9

3 .3 V S

20m ils

83
12 0
50
69
16 3

7 , 12 P M_ E X T T S 1 #

20m ils
C 443

C 452

2 . 2 U _6 . 3 V _ 0 6

. 1U _ 1 6V _0 4

M V R E F _ D I M 1 _1

1

D I M M 1_ G N D 0
D I M M 1_ G N D 1

20 1
20 2

47
13 3
18 3
77
12
48
18 4
78
71
72
12 1
12 2
19 6
19 3
8

V
V
V
V
V
V
V
V
V
V
V
V

DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD

1
2
3
4
5
6
7
8
9
10
11
12

V DD S P D
N
N
N
N
N

C1
C2
C3
C4
CT E S T

V RE F
G ND 0
G ND 1

V
V
V
V
V
V
V
V
V
V
V
V
V
V
V

SS1
SS2
SS3
SS4
SS5
SS6
SS7
SS8
SS9
SS1 0
SS1 1
SS1 2
SS1 3
SS1 4
SS1 5

V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V

SS1 6
SS1 7
SS1 8
SS1 9
SS2 0
SS2 1
SS2 2
SS2 3
SS2 4
SS2 5
SS2 6
SS2 7
SS2 8
SS2 9
SS3 0
SS3 1
SS3 2
SS3 3
SS3 4
SS3 5
SS3 6
SS3 7
SS3 8
SS3 9
SS4 0
SS4 1
SS4 2
SS4 3
SS4 4
SS4 5
SS4 6
SS4 7
SS4 8
SS4 9
SS5 0
SS5 1
SS5 2
SS5 3
SS5 4
SS5 5
SS5 6
SS5 7

18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162

M_ B _ A 9
M_ B _ B S 2#
M_ B _ A 1 2
M_ C K E 2

5
6
7
8

4
3
2
1

R N9
8 P 4 R X 5 6 _ 04

M_ B _ A 1
M_ B _ A 3
M_ B _ A 5
M_ B _ A 8

5
6
7
8

4
3
2
1

R N1 0
8 P 4 R X 5 6 _ 04

M_ O D T 3
M_ B _ A 1 0
M_ B _ B S 0#
M_ B _ W E #

5
6
7
8

4
3
2
1

R N1 1
8 P 4 R X 5 6 _ 04

M_ B _ A 1 3
M_ B _ C A S #
M_ C S 3 #

8
7
6
5

1
2
3
4

R N1 2
8 P 4 R X 5 6 _ 04

M_ C K E 3
M_ B _ A 1 4
M_ B _ A 1 1
M_ B _ A 7

1
2
3
4

8
7
6
5

R N3 9
8 P 4 R X 5 6 _ 04

M_ B _ A 6
M_ B _ A 4
M_ B _ A 2
M_ B _ A 0

1
2
3
4

8
7
6
5

R N4 0
8 P 4 R X 5 6 _ 04

M_ B _ B S 1#
M_ B _ R A S #
M_ C S 2 #
M_ O D T 2

1
2
3
4

8
7
6
5

R N4 1
8 P 4 R X 5 6 _ 04

La yout note :

C 477

*. 1 U _1 0 V _ X 7 R _ 0 4

C 755

. 1 U _ 1 0 V _ X7 R _0 4

C 752

*. 1 U _1 0 V _ X 7 R _ 0 4

C 485

*. 1 U _1 0 V _ X 7 R _ 0 4

C 491

*. 0 1 U _ 5 0 V _ X 7R _ 0 4

C 492

. 1 U _ 1 0 V _ X7 R _0 4

C 489

. 1 U _ 1 0 V _ X7 R _0 4

C 753

. 0 1U _ 5 0V _X 7 R _ 0 4

C 478

*. 1 U _1 0 V _ X 7 R _ 0 4

C 744

. 1 U _ 1 0 V _ X7 R _0 4

C 490

. 1 U _ 1 0 V _ X7 R _0 4

C 754

. 1 U _ 1 0 V _ X7 R _0 4

C 487

. 1 U _ 1 0 V _ X7 R _0 4

C 756

. 1 U _ 1 0 V _ X7 R _0 4

C 488

. 1 U _ 1 0 V _ X7 R _0 4

C 757

. 1 U _ 1 0 V _ X7 R _0 4

C 486

*. 1 U _1 0 V _ X 7 R _ 0 4

Pl a ce one ca p cl ose t o e ve ry 2 pull -up re si stors
t e rm ina te d to + V TT_ MEM
CLOSE TO SO-DIMM_1

17 3 4 0 75 -2

R 2 02

1 .8 V

MV R E F _ D I M1 _ 1

1K _1 % _ 0 4

R2 0 1

C 45 1

C4 5 0

1 K _ 1% _ 0 4

1 U_ 6 .3 V _ 0 4

. 1U _ 1 0V _X 7 R _0 4

1 7 3 4 07 5 -2

Layout note:
SO-DIMM_1 is placed farther from
the GMCH than SO-DIMM_0

V T T_ M E M
1 .8 V

+ C 47 0
*1 5 0 U _ 4 V _ B 2

+ C4 3 6

C 46 7

C 449

C4 6 9

C 4 06

C4 3 8

1 U_ 6 .3 V _ 0 4

1 U _ 6. 3 V _ 0 4

1 U_ 6 .3 V _ 0 4

.2 2 U_ 1 6 V _ X 7 R_ 0 6

. 2 2 U _ 1 6 V _ X7 R _ 06

*2 2 0U _ 4 V _ D 2

C7 4 5

1 0 U_ 1 0 V _ 0 8

10 U _ 10 V _ 0 8

2 , 3 , 6 , 7 , 10 , 1 2 , 1 4 , 1 5, 16 , 1 7 , 1 8 , 1 9, 2 1 , 2 2 , 2 3, 25 , 2 6 , 2 7 , 3 3 3. 3 V S
7 , 9, 10 , 1 2 , 2 9 , 3 0 1. 8 V
1 2 ,3 0
V T T_ M E M

1 .8 V

+C 4 2 1
* 1 50 U _ 4V _B 2

B - 14 DDRII SO-DIMM - 1

C 47 6

C 463

C4 5 8

C 4 53

C4 4 5

C 44 4

C 447

C 45 4

C4 6 4

C 466

C 46 5

C4 4 8

C 455

C 46 8

1 0 U _1 0 V _ 0 8

1 0U _ 1 0V _0 8

1 0 U_ 1 0 V _ 0 8

4. 7 U _ 6. 3V _0 6

4 .7 U_ 6 .3 V _ 0 6

. 1 U _ 10 V _ X 7 R _ 0 4

. 1 U _1 0 V _ X 7 R _ 0 4

. 1 U _ 1 0 V _ X7 R _ 04

. 1 U _ 10 V _ X 7 R _ 0 4

. 1 U _1 0 V _ X 7 R _ 0 4

. 1 U _ 1 0 V _ X7 R _ 04

. 1 U _ 10 V _ X 7 R _ 0 4

. 1 U _1 0 V _ X 7 R _ 0 4

Schematic Diagrams

Panel, Inverter, CRT
PANEL

ED ID Mod e

INVERTER CONNECTOR

P _ D DC _DA TA 6
P _ D DC _CL K 6

3 . 3V

J _L C D 1

PL V D D

. 1U _ 16 V _04

L VD S-UC L KP
L VD S-UC L KN
L VD S-U2 P
L VD S-U2 N

5
6
7
8

*10 P_ 12 _8 P4 C
4
3
2
1

.1 U _5 0V _ 06

L VDS -LC L K N
L VDS -LC L K P
L VDS -L1 N
L VDS -L1 P
L VDS -L2 N
L VDS -L2 P
L VDS -L0 N
L VDS -L0 P

LV D S -LC L KN 6
LV D S -LC L KP 6
LV D S -L1 N 6
LV D S -L1 P 6
LV D S -L2 N 6
LV D S -L2 P 6
LV D S -L0 N 6
LV D S -L0 P 6

26

B K L_ EN

6

B LON

U 1 8A
74 LV C0 8P W

LV DS -U0P
LV DS -U0N

VI N L1
H C B 16 08K F -12 1T 25 _06

3
2

V I N _I N V

.

3 .3 V

1
U 18 B
74 LV C 08 P W

C1 4

C 58 8

C1

* 1. U _1 6V _ 04

. 1U _ 50 V_ 06

. 1U _ 50 V _0 6

40 mil

Z 1 40 6 4
6
5
14

LV DS -L2 P
LV DS -L2 N

LV D S -U 0N 6
LV D S -U 0P 6
LV D S -U 1N 6
LV D S -U 1P 6
LV D S -U 2N 6
LV D S -U 2P 6
LV D S -U CLK N 6
LV D S -U CLK P 6

14

*10 P_ 12 _8 P4 C
CP2
4
3
2
1

3 . 3V S
C3

4
3
2
1

L VDS -U 0N
L VDS -U 0P
L VDS -U 1N
L VDS -U 1P
L VDS -U 2N
L VDS -U 2P
L VDS -U C L KN
L VDS -U C L KP

14

L VD S-U1 N
L VD S-U1 P

5
6
7
8

CP 4
*10 P _1 2_8 P 4C

R 34 2

*1 00 K_ 04

Z 14 07

9

U18C
74L V C 08 PW

R 650
4. 7K _ 04

8 Z 14 09
17

23 ,2 6

U 18 D
74 LV C 08 P W

C2
R5
1 U_6 . 3V _X 5R _ 04

12

LI D _ SW #

*1 M_0 4

11

J _I NV 1
1
2
3
4
5
6
8 72 13 -0 6
6-20- 41A10-106

13

7 , 17 , 26 MP W R OK

CP 1
*10 P _1 2_8 P 4C

I N V _B LON

Z 14 08 10

3 .3 V

S B _B LON

J _I NV1
1
AC

2 6 B RG
I H TN E SS
3 .3 V

6

C

A

D3 2
*B A V 99
C 15
3. 3 VS
*. 1U _ 10 V _X7 R _0 4

CO-LAY

N EA R P IN 4, 5

U4
4
5

2A

V IN
V IN

1

V OUT

C 536
3
1U _1 0V _ 06

EN

2

G ND
G5 24 3A

S Y S 15V

S Y S 15 V

R 33 7

R3 39

*1M_ 04 _S

*1 M_0 4_ S

U1 7
1
2

6 N B _E N A V D D

3

Z 14 04
D

Z 1 40 3
B

C
Q2 5
E* DTC 1 14 EU A _ S

Sheet 14 of 42
Panel, Inverter,
CRT

Q2 7

G

+

D

D

D

D

6

C 5 90

C 4

*1 00 U _6 . 3V _B 2

* . 1U _1 6V _ 04_ S

5

PL V D D

4

G
S
*S I 3 456 B D V-T 1-E 3_ S
R 3 35

R 33 6

C5

C 593

R 33 8

*3 30 _0 4_ S

*20 0_ 04

. 1U _ 16 V _0 4

10U _ 10 V _0 8

*1 00K _ 04

C58 9
*2 N70 02 W_ S
*. 22 U_16 V _0 4_ S

S

R 3 32

Z 14 05
D

*1 00 K_ 04

Q26
G
S

*2 N 70 02 W_ S

CRT
J _C R T 1
C 105 09 -91 50 5-L

6 DAC _ GR E EN
6 DAC _ B LUE

R 2 83

*10 mi _l sh ort

RED

L4 8

R 2 84

*10 mi _l sh ort

GRN

L4 6

R 2 88

*10 mi _l sh ort

B LU

L4 4

.
.
.

6 DAC _ R E D

F CM10 05 K F-1 21 T03

F RED

1

F CM10 05 K F-1 21 T03

F GRN

2

F CM10 05 K F-1 21 T03

F B LU E

3

9

2 4 m il
10
11

4
R 3 49

C3 3

15 0_ 1%_ 04

C26

C2 1

C 22

1 50 _1 %_0 4

2 2P _5 0V _ 04 22 P_ 50 V _0 4 2 2P _5 0V _ 04
22 P _5 0V _0 4 2 2P _ 50V _ 04 22 P _50 V _0 4

P LE AS E CL OS E TO C ON NE CT OR

2. 2 1K _1 %_0 4

R3 52

2. 2 1K _1 %_0 4

H SY N C

14

V SY N C

15

D DC L K

GN D1
GN D2

8

5V S

R3 48

D D C D AT A

13
6
7

3. 3 VS

12
5

R 3 50

2. 2 1K _1 %_ 04

R 3 51

2. 2 1K _1 %_ 04

C1 7
1 000 P _5 0V _X 7R _ 04

1 50 _1 %_ 04

C2 7

C 18
220 P _5 0V _X 7R _ 04

C34

C 23
22 0P _5 0V _ X7 R _0 4

R 35 4

C3 0
1 00 0P _5 0V _X 7 R _0 4

R1 0

U9
10

6 DAC _ D D C A D A TA
6 DAC _ D D C A C LK

11

6 DAC _ H S Y NC

13

6 DAC _ V SY N C

15
1

5 VS

2

3. 3 VS

7

C 16

0. 22 u_ 10 V _Y 5V _0 4

C2 4

C 13

0 .2 2u _1 0V _Y 5 V_ 04

0 . 22 u_ 10V _ Y5 V _0 4

5 VS

8

D D C _I N1
D D C _I N2

D D C_ OU T1
D D C_ OU T2

S Y N C _I N 1

SY N C_ OU T1

S Y N C _I N 2

SY N C_ OU T2

V C C _S Y NC

V I D E O_1

V C C _V I D E O

V I D E O_2

V C C _D D C

V I D E O_3

BYP
I P 4 772 C Z 16

GN D

9

D D C D AT A

12

D D C LK

14

CR T _H S Y N C

R4 5

33 _0 4

H S Y NC

16

CR T _V S Y N C

R4 8

33 _0 4

V S Y NC

3

BL U

4

GR N

5

RE D

6

C M20 09- 02Q R P N:6 -02 -20 090 -B6 0
I P47 72C Z16 PN :6- 02- 477 21- B60

1 . 5V S
3 . 3V
3 . 3V S
5V
5 VS
S Y S 15 V
VIN

4 , 10 , 15, 1 6, 1 8, 19 , 20 ,2 9
3 , 15 , 16, 1 7, 1 8, 19 , 20 ,2 1, 2 2, 23 , 27 , 29 ,3 0
2 , 3, 6 ,7 , 10 , 12, 1 3, 1 5, 16 , 17 ,1 8, 1 9, 21 , 22 , 23 ,2 5, 2 6, 27 , 33
1 8, 2 1, 25 , 27 , 28, 2 9, 3 0, 33
1 5, 1 8, 21 , 23 , 25, 2 7
2 7, 2 8
2 3, 2 7, 28 , 29 , 30, 3 2

Panel, Inverter, CRT B - 15

B.Schematic Diagrams

5
6
7
8

4
3
2
1
CP3

L V D S-L 2N
L V D S-L 2P

C 59 2

*4 . 7U _ 25 V_ 08

L VD S-L C LK P
L VD S-L C LK N

L V D S-U 0 N
L V D S-U 0 P

2A
C 5 91

5
6
7
8

7

L VD S -L0 N
L VD S -L0 P

L VD S-L 0P
L VD S-L 0N
L VD S-L 1N
L VD S-L 1P

7

L VD S -L1 N
L VD S -L1 P

L V D S-U 2 N
L V D S-U 2 P

14

L VD S -LCL K N
L VD S -LCL K P

3. 3 V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

7

L VD S -U 1N
L VD S -U 1P

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
8 81 07 -3 00 01

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

7

L VD S -U C LK N
L VD S -U C LK P

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

Schematic Diagrams

ICH9M 1/4, SATA
R TC V C C
C 78 5

1 5 P _5 0 V _ 0 4
2
X3
3 2 . 76 8 K H 3z

C 831

R 51 7

1 U _ 6. 3 V _ 0 4

1 0 M_ 0 4

C

4

V D D3

2 0mils
A

1

20m ils

D3 6

C 78 3

1 5 P _5 0 V _ 0 4

S C S 75 1 V -4 0
R 5 57
2 0 K _ 1 %_ 0 4

Zo = 50 O? 5%
U2 5 A

C 838

S C S 75 1 V -4 0

J OP E N 2
*O P E N _1 0 m i l- 1 M M

R 52 9
1 U _ 6. 3 V _ 0 4
1 K_ 0 4

2

10m ils

R 5 55
2 0 K _ 1 %_ 0 4
1

R T C V CC
R5 5 6

T PM CL EA R

C 837

J OP E N 1
*O P E N _1 0 m i l- 1 M M

1 M_ 0 4

1 2

A2 5
F20
C2 2

I C H _ I N TV R M E N

B2 2
A2 2

G L A N _ CL K

E2 5

L A N _R S T S Y N C

C1 3

L A N _R X D 0
L A N _R X D 1
L A N _R X D 2

F14
G1 3
D1 4

2

1 U _ 6. 3 V _ 0 4

2

Sheet 15 of 42
ICH9M 1/4, SATA

R T CR S T#
S R T CR ST #
I N T R U DE R #

8 52 0 5 -0 2R
3 .3 V

L A N _T X D 0
L A N _T X D 1
L A N _T X D 2

D1 3
D1 2
E1 3

I C H _ G P I O5 6

B1 0

1 .5 VS
R5 3 7
R 2 33

1 0 K_ 0 4

2 4. 9 _ 1 % _0 4

I C H _ G LA N_ C O MP

C 49 9

C9 1 2

*2 2 P _5 0 V _ 0 4

L82

. 1 U _ 1 6 V _ 04
2 1 , 25 A Z _B I TC L K
2 1 , 25 A Z _S Y N C
2 1 , 25 A Z _R S T #
25
A Z _ S D I N0
21
A Z _ S D I N1

3 .3 VS
R3 0 9
2 1, 2 5

.

B.Schematic Diagrams

J _R T C 1
1

C2 3
C2 4

R 2 44
3 3 2 K _ 1% _ 0 6

R TC _ V B A T 1

J_RTC1

R T C_ X 1
R T C_ X 2

0_04

B2 8
B2 7

Z2 2 03
AF6
AH 4
AE7

H D A _ S D I N2
H D A _ S D I N3

*1 K _ 0 4

AF4
AG 4
AH 3
AE5
AG 5

A Z _ S D OU T
R 549

3 .3 V S

*1 0 K _ 0 4

H D A _ D OC K _ E N # _ R
H D A _ D OC K _ RS T #

AG 7
AE8

S A TA _ L E D #

AG 8

C8 2 7

HDD

*. 1 U _ 1 6 V _ 04

Zdif f= 10 0O? 0%
23
23
23
23

S A TA R X N 0
S A TA R X P 0
S A TA T X N 0
S A TA T X P 0

S A T A R XN 1
S A T A R XP 1
S A TA T X N 1
S A TA T X P 1

C7 9 5
C7 9 2
C7 9 8
C7 9 9

. 01 U _5 0 V _ X 7 R _ 0 4
. 01 U _5 0 V _ X 7 R _ 0 4
. 01 U _5 0 V _ X 7 R _ 0 4
. 01 U _5 0 V _ X 7 R _ 0 4

S A TA _ R X N0 _ C
S A TA _ R X P 0_ C
S A TA _ T X N 0 _ C
S A TA _ T X P 0 _ C

AJ 1 6
A H1 6
AF 1 7
A G1 7

C7 1 3
C7 1 2
C7 1 4
C7 1 5

. 01 U
. 01 U
. 01 U
. 01 U

SA
SA
SA
SA

A H1 3
AJ 1 3
A G1 4
AF 1 4

_5 0 V _ X 7 R _ 0 4
_5 0 V _ X 7 R _ 0 4
_5 0 V _ X 7 R _ 0 4
_5 0 V _ X 7 R _ 0 4

TA _ R X N1 _ C
TA _ R X P 1_ C
TA 1 T X N
TA 1 T X P

R T C X1
R T C X2
R T C RS T #
S R TC R S T #
I NT R U D E R #

RTC
LPC

R TC CL EA R

F
F
F
F

W H0 /L AD
W H1 /L AD
W H2 /L AD
W H3 /L AD

0
1
2
3

F W H 4/ L F R A ME #
LD R Q 0 #
LD RQ 1 # / GP I O 2 3

I NT V R ME N
L A N1 0 0 _S LP

A 2 0 GA T E
A 20 M #

GL A N _ C L K
L A N_ R S T S Y N C
L A N_ R XD 0
L A N_ R XD 1
L A N_ R XD 2
L A N_ T X D 0
L A N_ T X D 1
L A N_ T X D 2
GP I O5 6

LAN / GLAN
CPU

D3 5

GL A N _ C O MP I
GL A N _ C O MP O

D P R S TP #
DP S LP #
F E RR #

I GN NE #
IN IT #
I NT R
R CIN #

S T P C LK #
T H R MT R I P #
A _ S DI
A _ S DI
A _ S DI
A _ S DI

N0
N1
N2
N3

H D A _ S D O UT

H D A _ D O C K _ E N # / GP I O 3 3
H D A _ D O C K _ R S T #/ GP I O 34

S A T A 0 RX N
S A T A 0 RX P
S A T A 0 T XN
S A T A 0 T XP
S A T A 1 RX N
S A T A 1 RX P
S A T A 1 T XN
S A T A 1 T XP

TP1 2

S A T A 4 RX N
S A T A 4 RX P
S A TA 4T X N
S A T A 4 TX P
S A T A 5 RX N
S A T A 5 RX P
S A TA 5T X N
S A T A 5 TX P

SATAL ED #

L P C_ A D 0 2 6
LP C_ A D 1 2 6
LP C_ A D 2 2 6
L P C_ A D 3 2 6

K3
J3
J1

LP C _ F R A ME # 2 6
L P C _ DR Q0 #
L D RQ 1 #
R3 1 7

N7
A J 27

GA 2 0
H _ A 2 0 M#

A J 25
AE2 3

I C H _D P RS TP #
I C H _D P S L P #

A J 26

I C H _F E RR #

R 51 8
R 24 6

H _ P W R GD

S A T A _C L K N
SA T A_ CL K P
S A TA R B I A S #
SA T AR B IA S

H _ F E R R# 3
R5 1 4
R2 4 7
R5 1 5

3

H _ I GN N E # 3

AE2 2
A G2 5
L3

H _ I NI T#
3
H _ I NT R
3
K B C _ R S T # 26

R 576

1 0 K_ 0 4

H_ NM I

R 239

* 1 0m i l _s h o rt

Z 22 0 1

A H2 7

3

S B _ TH R M T R I P #

A G2 7

I C H _T P 1 2

A H1 1
A J 11
A G1 2
AF1 2

S
S
S
S

A T A 4R X N
A T A 4R X P
A T A 4T X N
A T A 4T X P

A H9
AJ 9
AE1 0
AF1 0

S
S
S
S

A T A _R X N 5 _ C
A T A _R X P 5 _C
A T A _T X N 5_ C
A T A _T X P 5 _ C

R2 4 3

54 . 9 _ 1 %_ 0 4
R 240

56_04

Layout note:

A H1 8
A J 18

C L K_ SAT A# 2
CL K_ S AT A 2
Z 22 0 2

Within 500mil
R5 4 7
2 4. 9_ 1 % _ 04

SATA HDD

SATA HDD & ODD LED
J _H DD 1
S1
S2
S3
S4
S5
S6
S7

SAT ATXP0
S AT A T X N0
3 .3 V S
S A T A R XN 0
S A T A R XP 0
3 . 3V S

P1
P2
P3
P4
P5
P6
P7
P8
P9
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5
C 16 6 N 5-X 2 2 0 5-X

P IN G ND 1 ~ 2 = G N D

B - 16 ICH9M 1/4, SATA

R 542
* 1 0K _0 4

C7 8 0

C7 8 2
SA T A_ L ED#

*. 0 1 U _ 1 6 V _ 0 4

*1 0 U_ 1 0 V _ 08
5 VS

H D D_ N C 0
H D D_ N C 1
H D D_ N C 2
H D D_ N C 3

C4 7 9

C7 4 7

C4 7 4

C7 7 8

C 7 76

*. 1 U _1 6 V _ 0 4

. 1 U _ 1 6 V _0 4

*. 1 U _1 6 V _ 0 4

1 U _ 1 0V _0 6

1 0 U _ 1 0 V _ 08

+C 7 58
* 10 0 U _6 . 3 V _ B 2

1 . 0 5V S

3 .3 VS
H _ S MI #

3

P M_ T HR MT R I P # 3, 7

IC H9 M

ODD

5 6_ 0 4
*5 6 _ 04
*5 6 _ 04

H_ S T PCL K# 3

A G2 6

AJ 7
A H7

3 .3 VS

H _ D P R S T P # 3 , 7 , 33
H _ D P S LP # 3

5 6 _0 4

< 0. 2i nc he s

AF2 5

AF2 3
AF2 4

1 0K _0 4

26
3

*1 0 m il _ s h ort
*1 0 m il _ s h ort

R5 1 3

< 2i nc he s

A D2 2

HD A _ RS T #
HD
HD
HD
HD

K5
K4
L6
K2

C P U PW RG D

N MI
S M I#

H D A _ B I T _ CL K
HD A _ S Y N C

IHDA

C

SATA

A

1

R T C_ V B A T_ 1

3 , 14 , 1 6 , 1 7 , 18 , 1 9 , 2 0, 21 , 2 2 , 2 3, 2 7 , 2 9 , 3 0 3 . 3 V
3 , 1 9 , 23 , 2 6 , 2 7 , 28 , 3 2 V D D 3
2 , 3, 6, 7 , 1 0 , 1 2, 1 3 , 1 4 , 1 6, 1 7 , 1 8 , 19 , 2 1 , 2 2 , 23 , 2 5 , 2 6, 27 , 3 3 3 . 3 V S
14 , 1 8 , 2 1, 2 3 , 2 5 , 2 7 5 V S
4 , 1 0 , 16 , 1 8 , 1 9, 20 , 2 9 1 . 5 V S
18
R T CV C C
2 , 3 , 4 , 5, 7, 9 , 1 0 , 1 8, 29 , 3 1 1 . 0 5V S

S A TA _L E D # 23

1 .0 5 VS

5 4. 9_ 1% n ee ds t o pl ac ed
w it hi n 2" o f IC H8 , 56 O hm
m us t be p la ce d wi th in 2 " of
2 4. 9_ 1% w /o s tu b.

Schematic Diagrams

ICH9M 2/4, PCI, USB
.1U_10V_X7R_04 PCIE_TXN1_C
.1U_10V_X7R_04 PCIE_TXP1_C

N29
N28
P27
P26

19
19
19
19

PCIE_RXN2_NEW_CARD
PCIE_RXP2_NEW_CARD
PCIE_TXN2_NEW_CARD
PCIE_TXP2_NEW_CARD

C771
C770

.1U_10V_X7R_04 PCIE_TXN2_C
.1U_10V_X7R_04 PCIE_TXP2_C

L29
L28
M
27
M
26

3.3V

20 PCIE_RXN3_3G
20 PCIE_RXP3_3G
20 PCIE_TXN3_3G
20 PCIE_TXP3_3G

C769
C768

.1U_10V_X7R_04 PCIE_TXN3_C
.1U_10V_X7R_04 PCIE_TXP3_C

J29
J28
K27
K26

*.1U_16V_04
5

C548

PLT_RST#

U14
74AHC1G08GW

1
4

22 PCIE_RXN4_GLAN
22 PCIE_RXP4_GLAN
22 PCIE_TXN4_GLAN
22 PCIE_TXP4_GLAN

C767
C766

.1U_10V_X7R_04 PCIE_TXN4_C
.1U_10V_X7R_04 PCIE_TXP4_C

G29
G28
H27
H26

PCIE_RXN1_WLAN
PCIE_RXP1_WLAN
PCI E_TXN1_WLAN
PCI E_TXP1_WLAN

BUF_PLT_RST
# 19, 20, 22,26

2

PCIE_RXN5_CARD E29
PCIE_RXP5_CARD E28
PCIE_TXN5_C
F27
PCIE_TXP5_C
F26

3

R285
*100K_04

R255
R235

RN65
8P4RX10K_04
4
5
3
6
2
7
1
8

3.3V

R254
R237

Z2307
Z2308
Z2301

3.3V

*3.3K_04
*3.3K_04
*10K_04
*10K_04

SPI_SCLK
SPI_CS0#
SPI_CS1#
SPI_SI
SPI_SO

RN64
8P4RX10K_04
4
5
3
6
2
7
1
8

21

19

3. 3VS

NC3

15_1%_04
15_1%_04

SPICLK
SPICS0#

D23
D24
F23

R236
R257

*1K_04
15_1%_04

SPIM
OSI

D25
E23

USB_OC#01

R315

Z2301
Z2307
Z2302
Z2303
Z2304
10K_04 Z2305

R310

Z2306
Z2308
10K_04 Z2309

USB_OC#9

3.3V
R584

20_1%_06

ICH_USBRBIAS

N4
N5
N6
P6
M
1
N2
M
4
M
3
N3
N1
P5
P3
AG2
AG1

PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5

DM
I1RXN
DMI1RXP
DMI1TXN
DM
I 1T
XP
DM
I2RXN
DMI2RXP
DMI2TXN
DM
I 2T
XP
DM
I3RXN
DMI3RXP
DMI3TXN
DM
I 3T
XP
DMI_CLKN
DM
I _CLKP

DMI_ZCOM
P
DM
I _IRCOM
P

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/ GLAN_TXP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
SPI_CLK
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPI O6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
USBP9P
OC8#/GPIO44
USBP10N
OC9#/GPIO45
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#

SPI

USB

V27
V26
U29
U28

DM
I _RXN0 7
DM
I _RXP0 7
DM
I _TXN0 7
DM
I _TXP0 7

Y27
Y26
W29
W28

DM
I _RXN1 7
DM
I _RXP1 7
DM
I _TXN1 7
DM
I _TXP1 7

AB27
AB26
AA29
AA28
AD27
AD26
AC29
AC28

DM
I _RXN3 7
DM
I _RXP3 7
DM
I _TXN3 7
DM
I _TXP3 7

T26
T25

CLK_PCIE_ICH# 2
CLK_PCIE_ICH 2

AF29
AF28
AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

Zo = 5 5O ? 5%

DM
I _RXN2 7
DM
I _RXP2 7
DM
I _TXN2 7
DM
I _TXP2 7

DMI_COMP

USB_PN6
USB_PP6

USB_PN11
USB_PP11
USB_PN10
USB_PP10

R512

24.9_1%_04

USB_PN0
USB_PP0
USB_PN1
USB_PP1
USB_PN2
USB_PP2
USB_PN3
USB_PP3
USB_PN4
USB_PP4
USB_PN5
USB_PP5

21
21
21
21
20
20
23
23
19
19
21
21

USB_PN7
USB_PP7
USB_PN9
USB_PP9

21
21
19
19

USB_PN8 21
USB_PP8 21

1. 5VS

Place within 5 00
mils of ICH

Zd iff =
90 O? 5%

USB0: Por t 0
USB1: Por t 1
USB2: 3G
USB3: Blu etooth
USB4: Min i Card
USB5: CCD
USB6:
USB7: Fin ger Print
USB9: New card
USB11: Bl uetooth
USB10:
USB8: Por t 2

Sheet 16 of 42
ICH9M 2/4, PCI,
USB

ICH9M

Place within 500
mils of ICH

SHORT

SPI_*_R = 0.1" ~0.5"

16Mbit
C846

R248
R256

3.3V

Z o= 60 O? 5%

C29
C28
D27
D26

PERN2
PERP2
PETN2
PETP2

DM
I0RXN
DMI0RXP
DMI0TXN
DM
I 0T
XP

.1U_16V_04
U32
Z2310

8

VDD

SI

SPI_SI

5

SPI_SO

2 SPI_SO_R
SO
R573

3.3K_04 SPI_WP#

3

WP#

CE#

R534

15_1%_04

U25B

1

SPI_CS0#

6

SPI_SCLK

SCK
R587

3.3K_04 SPI_HOLD# 7

HOLD#

VSS

4

SST 25VF016B

SPI_WP#

SPI_WP# 17

Boot B IOS select

FW H(defaul t)

PCIRST#: LAN,Cardbus,KBC

St rap

PC I_GN T#0

11

S tuff

St uff

S PI_CS #1

P CI

10

S tuff

U ns taff

S PI

01

Unst af f

St uff

PLT_RST#: N/B ,IDE,FWH
BUF_PLT_RST#: NEW CARD,MINI CARD

PCI _AD0
PCI _AD1
PCI _AD2
PCI _AD3
PCI _AD4
PCI _AD5
PCI _AD6
PCI _AD7
PCI _AD8
PCI _AD9
PCI _AD10
PCI _AD11
PCI _AD12
PCI _AD13
PCI _AD14
PCI _AD15
PCI _AD16
PCI _AD17
PCI _AD18
PCI _AD19
PCI _AD20
PCI _AD21
PCI _AD22
PCI _AD23
PCI _AD24
PCI _AD25
PCI _AD26
PCI _AD27
PCI _AD28
PCI _AD29
PCI _AD30
PCI _AD31

D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

PCI _I NT#A
PCI _I NT#B
PCI _I NT#C
PCI _I NT#D

J5
E1
J6
C4

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

PCI

C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#

Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

F1
G4
B6
A7
F13
F12
E6
F6

PCI_REQ#0
PCI_GNT
#0
PCI_REQ#1
PCI_GNT#1
dGPU_SELECT#
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3

D8
B4
D6
A5

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

PCI_IRDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

C14
D4
R2

PLT_RST#
PCLK_ICH

H4
K6
F2
G2

PCI_INT#E
PCI_INT#F
PCI_INT#G
PCI_INT#H

3.3VS
R320

1K_04
PCI_STOP#
PCI_INT#D
PCI_IRDY#

R297

*1K_04

4
3
2
1
PCI_DEVSEL# 1
PCI_REQ#1
2
PCI_FRAME# 3
dGPU_SELECT# 4
PCI_REQ#0
1
PCI_INT#G
2
PCI_INT#B
3
PCI_LOCK#
4
PCI_INT#F
8
PCI_INT#C
7
6
PCI_SERR#
PCI_INT#A
5
PCI_INT#E
8
PCI_TRDY#
7
6
PCI_PERR#
PCI_REQ#3
5
PCI_INT#HR319

5
6
7
8
8
7
6
5
8
7
6
5
1
2
3
4
1
2
3
4

RN45
8P4RX8.2K_04

RN19
8P4RX8.2K_04

RN46
8P4RX8.2K_04

RN17
8P4RX8.2K_04

RN18
8P4RX8.2K_04

8. 2K_04

PLT_RST
# 7
PCLK_ICH 2
PME#
26

ICH9M

2,3,6,7,10,12,13,14, 15, 17,18,19,21,22,23,25,26,27,33
3,14, 15, 17,18,19,20,21,22,23,27,29,30
4,10,15,18,19,20,29
14,15,18,21,23,25,27

3.3VS
3.3V
1.5VS
5VS

ICH9M 2/4, PCI, USB B - 17

B.Schematic Diagrams

Zo = 55 O? 5%

3.3VS

iTPM Enable
R254 STUFF 10K_04

PCIE_RXN6_C
PCIE_RXP6_C
PCIE_TXN6_C
PCIE_TXP6_C

PERN1
PERP1
PETN1
PETP1

PCI-Express
Direct Media Interface

U25D

C773
C772

19
19
19
19

Schematic Diagrams

ICH9M 3/4
3 .3 V S

R N1 6
8 P 4 R X 1 0 K _ 04

R
R
R
R

29 3
27 5
27 6
27 7

R 61 6

1 0 0 K _0 4
1 0 0 K _0 4
2 . 2 1 K _ 1% _ 0 4
2 . 2 1 K _ 1% _ 0 4

A CP R E S E N T
S US P W R_ A C K
I C H _S MB C L K 0
I C H _S MB D A T 0

* 10 K _ 0 4

I C H _S U S B #

NEW CARD, MINI CARD

26

* 10 K _ 0 4

_S
_S
_G
_S
_S

MB C LK 0
MB D A T 0
P I O 60
MB C LK 1
MB D A T 1

F1 9

S W I#

S W I#

7

2
2

1 0 K _ 04

D

V R M P W R GD
R 224

* . 1 U _ 1 0V _X 7 R _ 0 4

1 M _ 04

G

3 .3 VS

Sheet 17 of 42
ICH9M 3/4

14
R 27 8
R 26 6

* 10 K _ 0 4
* 10 K _ 0 4

1 0 0 K _0 4
1 0 0 K _0 4

16
25

S CI#
OD D _ D E TE C T #

R 52 0
R 31 8

* 8. 2 K _ 0 4
8 .2 K_ 0 4

P M_ T H R M#
P M_ C LK R U N #

R
R
R
R
R

1 0 K _ 04
1 0 K _ 04
1 0 K _ 04
1 0 0 K _0 4
1 0 K _ 04

S E RIR
P W RS
S MI #
I C H _G
I C H _G

31 6
57 5
25 3
26 2
61 9

S B _ B L ON

P M_ S T P P C I #
P M_ S T P C P U #

3 .3 VS
R 52 2
R 52 1

A2 0

S MI #
OD D _ D E T E C T #
S CI#
I C H _G P I O 8
S B _ B L ON
I C H _G P I O 13
I C H _G P I O 17
dG P U _ P W R _ E N #
dG P U _ H OL D _R S T #
GP O 22
S B _ MU TE #
I C H _G P I O 28
P W RS A V E # _ R
I C H _G P I O 38
I C H _G P I O 39
I C H _G P I O 48
I C H _G P I O 49

26
S MI #
2 3 O DD _ DE T E C T #
26
S CI#

S

C LK E N #

W AKE#
S E R IRQ
T H R M#

Q
AVE# _ R

R 6 13

S PI_ W P#
S B _ MU T E #

0919
8.2-k Pull-up
to Vcc3_3 if
TEMP SENSOR
not used

* 0_ 0 4

R 5 23

1 0 K _ 04

R 5 36

1 0 0K _0 4

AG 1 9
AH 2 1
AG 2 1
A2 1
C 12
C 21
AE1 8
K1
A F8
AJ 2 2
A9
D 19
L1
AE1 9
AG 2 2
AF2 1
AH 2 4
A8

GP I O 1
GP I O 6
GP I O 7
GP I O 8
GP I O 1 2
GP I O 1 3
GP I O 1 7
GP I O 1 8
GP I O 2 0
S C L O C K / G P I O 22
GP I O 2 7
GP I O 2 8
S A T A C L K R E Q #/ G P I O 35
S L OA D / GP I O3 8
S D A TA O U T 0 / G P I O3 9
S D A TA O U T 1 / G P I O4 8
GP I O 4 9
GP I O 5 7 / C L GP I O5

I C H _G P I O 57

25
IC H_ S P K R
7 MC H _ I C H _ S Y N C #

P I O 17
P I O 38

T P 11

M7
AJ 2 4
B2 1
AH 2 0
AJ 2 0
AJ 2 1

I C H _T P 3
I C H _T P 8
I C H _T P 9
I C H _T P 1 0

SPKR
MC H _ S Y N C #
T P3
T P8
T P9
T P 10

P W R OK
D P R S L P V R / GP I O 1 6
BATL O W #
P W RBT N #

A H2 3
AF1 9
AE2 1
A D2 0

S B _ GP I O 2 1
S B _ GP I O 1 9
dG P U _P R S N T#
dG P U _R U N P W R OK

H1
AF3

CL K _ ICH 1 4
CL K _ ICH 4 8

P1

SUSC L K

C1 6
E1 6
G1 7

I C H _S U S B #
S L P _S 4#
S L P _S 5#

C1 0

S 4 _S T A T E #

G2 0

S B _ P W R OK

CL K _ IC H1 4 2
CL K _ IC H4 8 2

M2

DP R S L P V R

R5 7 8

* 1 0m i l _ sh o rt

B1 3

S B _ B A T L OW #

R5 3 3

8. 2 K _ 0 4

R3

P W R_ B T N #

R5 8 3

*1 0 K _ 04

R S MR S T #

D2 0

LA N _ R S T #

R2 5 2

10 K _ 0 4

D2 2

I C H _R S M R S T # R 2 7 9

C K _ P W R GD
C L P W R OK
S LP _ M #
C L _C L K 0
C L _C L K 1
C L_ D A T A 0
C L_ D A T A 1
CL _ V RE F 0
CL _ V RE F 1
C L _ RS T 0 #
C L _ RS T 1 #
M E M_ L E D / GP I O 2 4
GP I O 1 0/ S U S _ P W R _ A C K
GP I O1 4 / A C _ P R E S E N T
W OL _ E N / GP I O 9

1 0K _0 4
1 0K _0 4
*1 0 K _ 0 4
*1 0 K _ 0 4

* 1 00 K _ 0 4
P M_ D P R S L P V R

7 ,3 3

3 .3 V
P W R _B TN # 2 6

MP W R OK

R S M RS T # 2 6

B1 6

S L P _M #

F24
B1 9

CL _ CL K 1

R2 8 2

2

10 K _ 0 4

C5 4 3

1 0 0P _ 5 0 V _ 0 4

M P W R OK 7 , 1 4 , 2 6
3 . 3V S
C L _ C LK 0 7

Zo= 55O? 5%

F22
C1 9

CL _ DA T A 1

C2 5
A1 9

C L _V R E F 0
CL _ V RE F 1

F21
D1 8

Zo= 55O? 5%

A1 6
C1 8
C1 1
C2 0

C L _ D A TA 0 7

12mils
C L _R S T # 0 7

CL _ RS T # 1
I C H _G P I O 24
S US P W R_ A C K
ACPR ESEN T
I C H _G P I O 9

R
R
R
R

52 7
28 1
29 4
25 8

1 0 K _ 04
*1 0 m i _l s h or t
*1 0 m i _l s h or t
1 0 0K _0 4

R 2 29
3 . 2 4 K _ 1% _ 0 6

R 2 27

C 7 62

4 5 3 _1 % _ 0 6

. 1 U _1 0 V _ X 7R _ 0 4
3 .3 V

3 .3 V

R2 6 4
3 . 2 4K _1 % _ 0 6

S U S _ P W R _ A C K 26
A C_ P R E S E NT 2 6

C7 8 6

R2 6 3

. 1 U _ 1 0 V _X 7 R _0 4

4 5 3_ 1 % _ 06

3 .3 V

U 26B
7 4 L V C0 8 P W

3 .3 V

4

S Y S _ P W RO K
SUS B#

R5 1 9
R2 6 0
R5 1 6
R2 6 1

CL_ VRET0 /1=0. 405V 12mils

the CRB Schematics for a
sample implementation.

6

S B _ GP I O2 1
S B _ GP I O1 9

3 .3 V

C L K _ P W RG D

R6

ICH_GPIO57:
Can be used as TPM Physical
Presence for iTPM. Refer to

5

1 0K _0 4

I t" s fo r in te rn al t es ti ng
p ur po se s on ly

10 0 _ 1 %_ 0 4

R5

14

14
RS M RS T #
ICH _ S US B #

30

R 577

3 .3 V

* . 1 U _ 1 6 V _ 04

R2 4 9

Layout note:
SL P_ S4 #

IC H9 M

C 787

d GP U _ P R S N T #

L A N _R S T #

U 26 A
7 4 LV C 0 8 P W

1
3

1 9, 26 , 2 9

S B _P W R O K

2

30 1 . 8 V _ P W R GD
R 280

R 273

C 534

* 1 0K _0 4

* . 1 U _ 1 6 V _ 04

3 .3 V

7

7

U 2 6C
7 4 L VC0 8 PW

14

14

* 1 00 K _ 0 4
9

8
7, 3 3 D E L A Y _ P W R GD

S Y S _ P W RO K

2 9 1 . 0 5 V M _P W R G D

10

3 0 1 .8 V _ P W RG D

U 26 D
7 4 LV C 0 8 P W

12
11

MP W R OK

13

R5 3 1

R2 7 4
7

7

B.Schematic Diagrams

33

CL K R UN #

D 21

I C H _T P 1 1
C 4 93

CL K 1 4
CL K 4 8
S U S C LK

S 4 _ S T A T E # / GP I O 2 6

L4

Z 24 0 1
Q 22
2 N7 0 0 2 W

21
19
36
37

SL P_ S3 #
SL P_ S4 #
SL P_ S5 #

S T P _ P CI#
S T P_ CPU #

E2 0
M5
AJ 2 3

P CIE _ W A K E #
S E RIR Q
P M_ T H R M#

P / GP I O
P / GP I O
P / GP I O
P / GP I O

S MB A LE R T # / GP I O 1 1

A1 4
E1 9

P M_ C L K R U N #

SAT A0 G
SAT A1 G
SAT A4 G
SAT A5 G

P MS Y N C # / GP I O0

A1 7

P M_ S T P P C I #
P M_ S T P C P U #

P M_ S T P P C I #
P M _ S TP C P U #

1 9 , 2 0, 2 2 P C I E _ W A K E #
26
S E RI RQ
3
P M_ T H R M#

S B _ MU TE #

S U S _S T A T # / L P C P D #
S Y S _R E S E T #

M6

P M_ B MB U S Y #
I C H _G P I O 11

3 .3 VS

RI#

R 4
G 19

S B _ S U S S TA T #
P M_ S Y S R S T #

R 22 5
R 61 2

1 9 I C H _ S MB C L K 1
1 9 I C H _ S MB D A T 1

SMB

CL _ RS T # 1
I C H _G P I O 60
I C H _G P I O 11

ICH
ICH
ICH
ICH
ICH

2, 12 , 1 3 I C H _ S MB C L K 0
2, 12 , 1 3 I C H _ S MB D A T 0

DDR2, CLK GEN

U 2 5C
G 16
S MB C L K
A1 3
S MB D A T A
E1 7
L I N K A L E R T #/ G P I O 60 / C L GP I O 4
C 17
S ML I N K 0
B1 8
S ML I N K 1

Clocks

R N1 5
8 P 4 R X 1 0 K _ 04

1
2
3
4
1
2
3
4

P CIE _ W A K E #
S B _ B L ON
I C H _S MB C L K 1
I C H _S MB D A T 1
I C H _G P I O 57
S B _ S U S S TA T#
I C H _G P I O 8
I C H _G P I O 13
P M_ S Y S R S T #
S W I#

1 0 K _ 04
1 0 K _ 04
1 0 K _ 04
1 0 K _ 04
* 10 K _ 0 4
1 0 K _ 04
8
7
6
5
8
7
6
5

SYS GPIO
Power MGT

25 9
28 9
26 8
26 7
53 8
28 6

MISC
GPIO
Controller Link

R
R
R
R
R
R

SATA
GPIO

3 .3 V

*1 0 0K _0 4
SL P_ S4 #
S 4 _ S T A TE #

R2 7 2
R2 6 9

*1 0 m li _ s ho rt
*0 _ 0 4

S US C#

POWER OK

FOR ICH9M

3 . 3V S

U 15
3

C 55 6

R ST#
VC C
GN D

2

P M _P W R O K

1

* G6 9 0 L2 9 3 T 73

*. 1U _ 16 V _ 0 4

B - 18 ICH9M 3/4

*1 0 K _0 4

26

( IM P8 09 )

R 5 26
* 10 0 K _ 0 4

H3 6
C 2 7 6 B 1 46 D 12 6

H3 7
C 2 7 6 B 1 46 D 1 26

1 4, 1 5 , 1 8 , 2 1, 2 3 , 2 5 , 27 5 V S
3 , 14 , 1 5 , 1 6 , 18 , 1 9 , 2 0, 2 1 , 2 2 , 2 3, 2 7 , 2 9 , 30 3 . 3 V
2 , 3, 6 , 7 , 1 0 , 1 2, 1 3 , 1 4 , 1 5, 1 6 , 1 8 , 19 , 2 1 , 2 2, 23 , 2 5 , 2 6, 2 7 , 3 3 3 . 3V S

Schematic Diagrams

ICH9M 4/4
RT C VC C
U2 5 F

V C C5 R E F

. 1 U _1 0 V _ X 7 R _ 04

.1 U_ 1 6 V _ 0 4

*1 0 U _1 0 V _ 0 8

V 5 RE F _ S U S

A6
AE1

.

C5 1 8

. 1 U _ 1 0V _ X7 R _ 0 4

. 1 U _1 0 V _ X 7 R _ 04

.1 U_ 1 0 V _ X 7 R_ 0 4

C 50 8

C7 6 1

C

H C B 1 6 0 8 K F -1 2 1 T 2 5_ 0 6
V C C 5R E F

C 920

+ C7 6 0

C 828

* 1 U _ 2 5 V _ X 5 R _ 0 6 . 1 U _ 1 0 V _ X 7R _ 0 4

*2 2 0 U _ 2 . 5 V _ B

2 2 U_ 6 .3 V _ 0 8

C 50 9

2 2U _ 6 . 3 V _ 0 8

2 .2 U_ 6 .3 V _ 0 6

Layout note:
Place above Caps within 100 mils of ICH on the bottom
side or 140 mils on the top near D28, T28, AD28

Layout note:

5V

L35
B K P 1 0 0 5H S 1 2 1 _ 0 4
1. 5V S

10m ils

V C C S A T A P LL

.

Place within 100 mils
of pin G4 of ICH9M on
the bottom side of
140mils on the top

Layout note:

C5 2 7

C5 2 8

Place within 100mils
of ICH on the bottom
side or 140 mils on
the top

1 0U _ 1 0 V _ 0 8

1 U_ 6 .3 V _ 0 4

3. 3V

C

A

10 mils

V5 R EF_ SU S

1 .5 V S
C8 1 0

C 921

C 849
1 U_ 6 .3 V _ 0 4

* 1 U _ 2 5 V _ X 5 R _ 0 6 . 1 U _ 1 0 V _ X 7R _ 0 4

Layout note:

1 .5 VS

C8 0 3

A C1 1
A D1 1
AE1 1
AF1 1
A G1 0
A G1 1
A H1 0
A J1 0

1 U_ 6 .3 V _ 0 4

R5 1 1
10 _ 0 4

10m ils

V CC G L A NP L L

1 0m ils
1 .5 V S

A C9

C5 2 9

C 526

A C1 8
A C1 9

.1 U_ 1 0 V _ X 7 R_ 0 4

. 1U _ 1 6 V _ 0 4

A C2 1

C7 6 3
.1 U_ 1 6 V _ 0 4
G1 0
G9
1 .5 V S

3 .3 VS

A C1 2
A C1 3
A C1 4

C8 0 4
.1 U_ 1 0 V _ X 7 R_ 0 4
R5 3 2

V _ C P U_ IO [1 ]
V _ C P U_ IO [2 ]

VC
VC
VC
VC
VC
VC
VC
VC

C1 _ 5 _ A [1 ]
C1 _ 5 _ A [2 ]
C1 _ 5 _ A [3 ]
C1 _ 5 _ A [4 ]
C1 _ 5 _ A [5 ]
C1 _ 5 _ A [6 ]
C1 _ 5 _ A [7 ]
C1 _ 5 _ A [8 ]
C1 _ 5 _ A [9 ]
C1 _ 5 _ A [1 0 ]
C1 _ 5 _ A [1 1 ]
C1 _ 5 _ A [1 2 ]
C1 _ 5 _ A [1 3 ]
C1 _ 5 _ A [1 4 ]
C1 _ 5 _ A [1 5 ]
C1 _ 5 _ A [1 6 ]

Layout note:

.1 U_ 1 6 V _ 0 4

Place within 100mils of ICH
on the bottom side or 140 mils
on the top near pin F1

.1 U_ 1 0 V _ X 7 R_ 0 4

T P _ V C C L A N1 0 5 _ IC H
V C C L A N3 _ 3

C8 1 8

3 .3 VS

A1 0
A1 1
A1 2
B1 2

.1 U_ 1 6 V _ 0 4
V C C GL A N P L L

A2 7

1 .5 V S _ P C IE _ IC H

C3 _ 3 [3 ]
C3 _ 3 [4 ]
C3 _ 3 [5 ]
C3 _ 3 [6 ]

V C C3 _ 3 [8 ]
V C C3 _ 3 [9 ]
V C C 3_ 3 [ 1 0 ]
V C C 3_ 3 [ 1 1 ]
V C C 3_ 3 [ 1 2 ]
V C C 3_ 3 [ 1 3 ]
V C C 3_ 3 [ 1 4 ]

V C C S U S 1_ 0 5 [ 1 ]
V C C S U S 1_ 0 5 [ 2 ]
V C CS US 1 _ 5 [1 ]
V C CS US 1 _ 5 [2 ]

V C CS US 3 _ 3 [1 ]
V C CS US 3 _ 3 [2 ]
V C CS US 3 _ 3 [3 ]
V C CS US 3 _ 3 [4 ]

10 mils

V CC G L A N3 _ 3
C5 0 1
.1 U_ 1 6 V _ 0 4

C5 0 4

C5 0 3

.1 U_ 1 6 V _ 0 4

.1 U_ 1 6 V _ 0 4
V C C GL A N 3 _ 3

D2 8
D2 9
E2 6
E2 7
A2 6

Place at MCH edge

Layout note:

Place within 100mils of ICH on the
bottom side or 140 mils on the top

V C C DM IP L L

V C C1 _ 5 _ A [1 8 ]
V C C1 _ 5 _ A [1 9 ]
V C C1 _ 5 _ A [2 0 ]
V C C1 _ 5 _ A [2 1 ]
V C C1 _ 5 _ A [2 2 ]
V C C1 _ 5 _ A [2 3 ]
V C C1 _ 5 _ A [2 4 ]
V C C1 _ 5 _ A [2 5 ]

C 759

1 0 U _1 0 V _ 0 8

. 0 1 U _ 50 V _X 7 R _ 0 4

1 .0 5 V S

V CC _ DM I
W23
Y2 3

C5 1 4

1. 05 V S

4 .7 U_ 6 .3 V _ 0 6

2 0m ils

AB2 3
A C 23

C 515

C5 2 0

C5 1 3

. 1U _ 1 6 V _ 0 4

.1 U_ 1 6 V _ 0 4

4 .7 U_ 6 .3 V _ 0 6

C 7 7 7 . 1U _ 1 6 V _ 0 4

AJ 6

C 8 3 0 . 1U _ 1 6 V _ 0 4

A D 19
AF2 0
A G 24
A C 20

C 511

C 913

. 1 U _ 1 6V _ 04

. 1 U _ 1 6V _ 04

V C C 3 . 3 _4

B9
F9
G3
G6
J2
J7
K7

3 .3 V S
C5 7 0

C 55 0

C 552

.1 U_ 1 6 V _ 0 4

. 1 U _1 6 V _ 0 4

. 1 U _ 1 6V _ 04

C 835

.1 U_ 1 6 V _ 0 4

C 840

.1 U_ 1 6 V _ 0 4

A J 4 V CC HD A

L73

A J 3 V CC S U S HD A

L75

A C 8 T P _ V C C S U S 1 0 5_ I C H 1
F 1 7 T P _ V C C S U S 1 0 5_ I C H 2

B K P 1 0 0 5 H S 12 1 _ 0 4

F 1 8 T P _ V C C S U S 1 5 _I C H 2
C 5 3 5 . 1U _ 1 6 V _ 0 4

L62
B K P 1 0 0 5H S 1 2 1 _ 0 4

1 0m ils

A 1 8 V CC S U S 3 .3
D1 6
D1 7
E2 2

V C CS US 3 _ 3 [6 ]
V C CS US 3 _ 3 [7 ]
V C CS US 3 _ 3 [8 ]
V C CS US 3 _ 3 [9 ]
V C C S U S 3_ 3 [ 1 0 ]
V C C S U S 3_ 3 [ 1 1 ]
V C C S U S 3_ 3 [ 1 2 ]
V C C S U S 3_ 3 [ 1 3 ]
V C C S U S 3_ 3 [ 1 4 ]
V C C S U S 3_ 3 [ 1 5 ]
V C C S U S 3_ 3 [ 1 6 ]
V C C S U S 3_ 3 [ 1 7 ]
V C C S U S 3_ 3 [ 1 8 ]
V C C S U S 3_ 3 [ 1 9 ]
V C C S U S 3_ 3 [ 2 0 ]

1_ 5 [ 1 ]
1_ 5 [ 2 ]
1_ 5 [ 3 ]
1_ 5 [ 4 ]

3 .3 V

AF1
T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

C 84 8

C 554

C 850

2 2 n _1 6 V _ 0 4

2 2 n _ 1 6V _ 04

. 1U _ 1 0 V _ X 7 R _ 0 4

V C C C L 1_ 5

C 5 2 3 . 1U _ 1 6 V _ 0 4

V C C C L3 _ 3 [ 1 ]
V C C C L3 _ 3 [ 2 ]

G2 3 T P _ V C C C L _ 1 5
A2 4
B2 4
3 .3 V S

2 0m ils

C 525

C 5 24

* . 1 U _1 0 V _ X 7 R _ 04

* 1 U_ 6 .3 V _ 0 4

C 914
. 1U _ 1 0 V _ X 7 R _ 0 4

V C CG L A N P L L
L AN
L AN
L AN
L AN

3 .3 V

A D 8 T P _ V C C S U S 1 5 _I C H 1

V C CL A N 3 _ 3 [1 ]
V C CL A N 3 _ 3 [2 ]

CG
CG
CG
CG

3 .3 V S

B K P 1 0 0 5 H S 12 1 _ 0 4

V C C C L 1 _0 5

V C C L A N 1 _ 0 5[ 1]
V C C L A N 1 _ 0 5[ 2]

VC
VC
VC
VC

1 .5 V S

L32
B K P 1 00 5 H S 1 2 1 _ 04

2 0m ils

G2 2 T P _ V C C C L _ 1 0 5
C1 _ 5 _ A [2 6 ]
C1 _ 5 _ A [2 7 ]
C1 _ 5 _ A [2 8 ]
C1 _ 5 _ A [2 9 ]
C1 _ 5 _ A [3 0 ]

L31
B K P 1 00 5 H S 1 2 1 _ 04

10m ils

C 498

3 .3 V
V C CS US 3 _ 3 [5 ]

V C C1 _ 5 _ A [1 7 ]

VC
VC
VC
VC
VC

1 0 0 U_ 6 .3 V _ B

GLAN POWER

R2 3 8
10 _ 0 4

VC
VC
VC
VC

VC C HD A

USB CORE

C5 4 6

V C C L A N 3_ 3
C8 1 4

AA7
AB6
AB7
A C6
A C7

. 1 U _ 1 6V _ 04

Layout note:

V C C3 _ 3 [7 ]

AJ 5

10m ils

. 1U _ 1 0 V _ X 7 R _ 0 4

A C 10

V C C S US HD A

V C C U S B P LL
10 _ 0 4

C 521

A G 29
V C C3 _ 3 [2 ]

V C CS A T A P L L
VC
VC
VC
VC
VC
VC
VC
VC

+C 8 0 2

C 522

V C C3 _ 3 [1 ]

ATX

Place within 100mils of
ICH on the bottom side or
140 mils on the top near
pin AE7

V CC _ DM I[1 ]
V CC _ DM I[2 ]

ARX

A C1 6
A D1 5
A D1 6
AE1 5
AF1 5
A G1 5
A H1 5
A J1 5

1 .0 5 V S

R2 9
V CC DM IP L L

VCCP_CORE

A

L81
S C S 7 5 1 V -4 0

C 51 9

PCI

A J1 9

R 550

C 506

VCCPSUS

S C S 7 5 1 V -4 0

1 .5 V S

VCCPUSB

10_04

1 .5 V S _ P C IE _ IC H

20 mils
D 34

C1 _ 5 _ B [1 ]
C1 _ 5 _ B [2 ]
C1 _ 5 _ B [3 ]
C1 _ 5 _ B [4 ]
C1 _ 5 _ B [5 ]
C1 _ 5 _ B [6 ]
C1 _ 5 _ B [7 ]
C1 _ 5 _ B [8 ]
C1 _ 5 _ B [9 ]
C1 _ 5 _ B [1 0 ]
C1 _ 5 _ B [1 1 ]
C1 _ 5 _ B [1 2 ]
C1 _ 5 _ B [1 3 ]
C1 _ 5 _ B [1 4 ]
C1 _ 5 _ B [1 5 ]
C1 _ 5 _ B [1 6 ]
C1 _ 5 _ B [1 7 ]
C1 _ 5 _ B [1 8 ]
C1 _ 5 _ B [1 9 ]
C1 _ 5 _ B [2 0 ]
C1 _ 5 _ B [2 1 ]
C1 _ 5 _ B [2 2 ]
C1 _ 5 _ B [2 3 ]
C1 _ 5 _ B [2 4 ]
C1 _ 5 _ B [2 5 ]
C1 _ 5 _ B [2 6 ]
C1 _ 5 _ B [2 7 ]
C1 _ 5 _ B [2 8 ]
C1 _ 5 _ B [2 9 ]
C1 _ 5 _ B [3 0 ]
C1 _ 5 _ B [3 1 ]
C1 _ 5 _ B [3 2 ]
C1 _ 5 _ B [3 3 ]
C1 _ 5 _ B [3 4 ]
C1 _ 5 _ B [3 5 ]
C1 _ 5 _ B [3 6 ]
C1 _ 5 _ B [3 7 ]
C1 _ 5 _ B [3 8 ]
C1 _ 5 _ B [3 9 ]
C1 _ 5 _ B [4 0 ]
C1 _ 5 _ B [4 1 ]
C1 _ 5 _ B [4 2 ]
C1 _ 5 _ B [4 3 ]
C1 _ 5 _ B [4 4 ]
C1 _ 5 _ B [4 5 ]
C1 _ 5 _ B [4 6 ]
C1 _ 5 _ B [4 7 ]
C1 _ 5 _ B [4 8 ]
C1 _ 5 _ B [4 9 ]

A1 5
B1 5
C1 5
D1 5
E1 5
F15
L 11
L 12
L 14
L 16
L 17
L 18
M1 1
M1 8
P1 1
P1 8
T 11
T 18
U1 1
U1 8
V1 1
V1 2
V1 4
V1 6
V1 7
V1 8

AA2 6
AA2 7
AA3
AA6
AB1
AA2 3
AB2 8
AB2 9
AB4
AB5
A C1 7
A C2 6
A C2 7
A C3
A D1
A D1 0
A D1 2
A D1 3
A D1 4
A D1 7
A D1 8
A D2 1
A D2 8
A D2 9
A D4
A D5
A D6
A D7
A D9
AE1 2
AE1 3
AE1 4
AE1 6
AE1 7
AE2
AE2 0
AE2 4
AE3
AE4
AE6
AE9
AF1 3
AF1 6
AF1 8
AF2 2
A H2 6
AF2 6
AF2 7
AF5
AF7
AF9
A G1 3
A G1 6
A G1 8
A G2 0
A G2 3
A G3
A G6
A G9
A H1 2
A H1 4
A H1 7
A H1 9
A H2
A H2 2
A H2 5
A H2 8
A H5
A H8
A J1 2
A J1 4
A J1 7
AJ 8
B1 1
B1 4
B1 7
B2
B2 0
B2 3
B5
B8
C2 6
C2 7
E1 1
E1 4
E1 8
E2
E2 1
E2 4
E5
E8
F16
F28
F29
G1 2
G1 4
G1 8
G2 1
G2 4
G2 6
G2 7
G8
H2
H2 3
H2 8
H2 9

VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[
VSS[

1]
2]
3]
4]
5]
6]
7]
8]
9]
10 ]
11 ]
12 ]
13 ]
14 ]
15 ]
16 ]
17 ]
18 ]
19 ]
20 ]
21 ]
22 ]
23 ]
24 ]
25 ]
26 ]
27 ]
28 ]
29 ]
30 ]
31 ]
32 ]
33 ]
34 ]
35 ]
36 ]
37 ]
38 ]
39 ]
40 ]
41 ]
42 ]
43 ]
44 ]
45 ]
46 ]
47 ]
48 ]
49 ]
50 ]
51 ]
52 ]
53 ]
54 ]
55 ]
56 ]
57 ]
58 ]
59 ]
60 ]
61 ]
62 ]
63 ]
64 ]
65 ]
66 ]
67 ]
68 ]
69 ]
70 ]
71 ]
72 ]
73 ]
74 ]
75 ]
76 ]
77 ]
78 ]
79 ]
80 ]
81 ]
82 ]
83 ]
84 ]
85 ]
86 ]
87 ]
88 ]
89 ]
90 ]
91 ]
92 ]
93 ]
94 ]
95 ]
96 ]
97 ]
98 ]
99 ]
10 0 ]
10 1 ]
10 2 ]
10 3 ]
10 4 ]
10 5 ]
10 6 ]

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

[ 1 07 ]
[ 1 08 ]
[ 1 09 ]
[ 1 10 ]
[ 1 11 ]
[ 1 12 ]
[ 1 13 ]
[ 1 14 ]
[ 1 15 ]
[ 1 16 ]
[ 1 17 ]
[ 1 18 ]
[ 1 19 ]
[ 1 20 ]
[ 1 21 ]
[ 1 22 ]
[ 1 23 ]
[ 1 24 ]
[ 1 25 ]
[ 1 26 ]
[ 1 27 ]
[ 1 28 ]
[ 1 29 ]
[ 1 30 ]
[ 1 31 ]
[ 1 32 ]
[ 1 33 ]
[ 1 34 ]
[ 1 35 ]
[ 1 36 ]
[ 1 37 ]
[ 1 38 ]
[ 1 39 ]
[ 1 40 ]
[ 1 41 ]
[ 1 42 ]
[ 1 43 ]
[ 1 44 ]
[ 1 45 ]
[ 1 46 ]
[ 1 47 ]
[ 1 48 ]
[ 1 49 ]
[ 1 50 ]
[ 1 51 ]
[ 1 52 ]
[ 1 53 ]
[ 1 54 ]
[ 1 55 ]
[ 1 56 ]
[ 1 57 ]
[ 1 58 ]
[ 1 59 ]
[ 1 60 ]
[ 1 61 ]
[ 1 62 ]
[ 1 63 ]
[ 1 64 ]
[ 1 65 ]
[ 1 66 ]
[ 1 67 ]
[ 1 68 ]
[ 1 69 ]
[ 1 70 ]
[ 1 71 ]
[ 1 72 ]
[ 1 73 ]
[ 1 74 ]
[ 1 75 ]
[ 1 76 ]
[ 1 77 ]
[ 1 78 ]
[ 1 79 ]
[ 1 80 ]
[ 1 81 ]
[ 1 82 ]
[ 1 83 ]
[ 1 84 ]
[ 1 85 ]
[ 1 86 ]
[ 1 87 ]
[ 1 88 ]
[ 1 89 ]
[ 1 90 ]
[ 1 91 ]
[ 1 92 ]
[ 1 93 ]
[ 1 94 ]
[ 1 95 ]
[ 1 96 ]
[ 1 97 ]
[ 1 98 ]

V S S _ N CT F [1 ]
V S S _ N CT F [2 ]
V S S _ N CT F [3 ]
V S S _ N CT F [4 ]
V S S _ N CT F [5 ]
V S S _ N CT F [6 ]
V S S _ N CT F [7 ]
V S S _ N CT F [8 ]
V S S _ N CT F [9 ]
V S S _ N C T F [ 10 ]
V S S _ N C T F [ 11 ]
V S S _ N C T F [ 12 ]

H 5
J23
J26
J27
AC 2 2
K2 8
K2 9
L13
L15
L2
L26
L27
L5
L7
M 12
M 13
M 14
M 15
M 16
M 17
M 23
M 28
M 29
N 11
N 12
N 13
N 14
N 15
N 16
N 17
N 18
N 26
N 27
P1 2
P1 3
P1 4
P1 5
P1 6
P1 7
P2
P2 3
P2 8
P2 9
P4
P7
R 11
R 12
R 13
R 14
R 15
R 16
R 17
R 18
R 28
T12
T13
T14
T15
T16
T17
T23
B2 6
U 12
U 13
U 14
U 15
U 16
U 17
AD 2 3
U 26
U 27
U 3
V1
V1 3
V1 5
V2 3
V2 8
V2 9
V4
V5
W26
W27
W3
Y 1
Y 28
Y 29
Y 4
Y 5
AG 2 8
AH 6
AF2
B2 5

Sheet 18 of 42
ICH9M 4/4

A1
A2
A2 8
A2 9
AH 1
AH 2 9
AJ 1
AJ 2
AJ 2 8
AJ 2 9
B1
B2 9

IC H9 M

V C C G L A N 3_ 3
IC H9 M
2 1 ,2 5 ,2 7 ,2 8 ,2 9 ,3 0 ,3 3 5 V
3 , 1 4 , 1 5 , 1 6 , 1 7, 19 , 2 0 , 2 1 , 2 2 , 2 3 , 2 7 , 2 9 , 3 0 3 . 3 V
4, 10 , 1 5 , 1 6 , 1 9 , 2 0 , 2 9 1 . 5 V S
15
R T CV CC
2 , 3 , 6 , 7 , 1 0, 12 , 1 3 , 1 4 , 1 5 , 1 6 , 1 7 , 1 9 , 2 1, 22 , 2 3 , 2 5 , 2 6 , 2 7 , 3 3 3 . 3 V S
1 4 ,1 5 ,2 1 ,2 3 ,2 5 ,2 7 5 V S
2 ,3 ,4 ,5 ,7 ,9 ,1 0 ,1 5 ,2 9 ,3 1 1 .0 5 V S

ICH9M 4/4 B - 19

B.Schematic Diagrams

D 37

3 .3 V S

VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC
VC

VCCA3GP

R 585

CLOSE TO pin AD25

CORE

V 5 RE F _ S U S
AA2 4
AA2 5
AB2 4
AB2 5
A C2 4
A C2 5
A D2 4
A D2 5
AE2 5
AE2 6
AE2 7
AE2 8
AE2 9
F25
G2 5
H2 4
H2 5
J2 4
J2 5
K2 4
K2 5
L2 3
L2 4
L2 5
M2 4
M2 5
N2 3
N2 4
N2 5
P2 4
P2 5
R2 4
R2 5
R2 6
R2 7
T2 4
T2 7
T2 8
T2 9
U2 4
U2 5
V2 4
V2 5
U2 3
W24
W25
K2 3
Y2 4
Y2 5

10_04

V C C 1_ 0 5 [ 1 ]
V C C 1_ 0 5 [ 2 ]
V C C 1_ 0 5 [ 3 ]
V C C 1_ 0 5 [ 4 ]
V C C 1_ 0 5 [ 5 ]
V C C 1_ 0 5 [ 6 ]
V C C 1_ 0 5 [ 7 ]
V C C 1_ 0 5 [ 8 ]
V C C 1_ 0 5 [ 9 ]
V C C 1 _0 5 [ 1 0 ]
V C C 1 _0 5 [ 1 1 ]
V C C 1 _0 5 [ 1 2 ]
V C C 1 _0 5 [ 1 3 ]
V C C 1 _0 5 [ 1 4 ]
V C C 1 _0 5 [ 1 5 ]
V C C 1 _0 5 [ 1 6 ]
V C C 1 _0 5 [ 1 7 ]
V C C 1 _0 5 [ 1 8 ]
V C C 1 _0 5 [ 1 9 ]
V C C 1 _0 5 [ 2 0 ]
V C C 1 _0 5 [ 2 1 ]
V C C 1 _0 5 [ 2 2 ]
V C C 1 _0 5 [ 2 3 ]
V C C 1 _0 5 [ 2 4 ]
V C C 1 _0 5 [ 2 5 ]
V C C 1 _0 5 [ 2 6 ]

V 5 RE F

.

C4 9 6

.
.

C5 1 6

.

C 50 5

.

V C CR T C

Place within 100 mils
of pin A16 and T7 of
ICH9M on the bottom
side or 140 mils on
the top side

5 VS

U2 5 E

A2 3

Layout note:

Schematic Diagrams

NEW CARD, MINI PCIE
NEW CARD

3 .3 V S
* . 1U _ 16 V _ 0 4

5

C 8 01
1

B U F _ P L T _R S T #

4
2
3 . 3V
U 31
. 1U _ 1 6V _ 0 4

17

A V C C_ A U X

3. 3V S
C8 0 7

. 1U _ 1 6V _ 0 4

P E R S T#
A U XO U T

8

N C _R S T #

U2 7
7 4A H C 1G 0 8G W

3

C8 4 3

15

2
A V C C_ 3 . 3 V
1. 5V S
V OU T _3 . 3 V

C8 4 1

. 1U _ 1 6V _ 0 4

12

B.Schematic Diagrams

1 7 ,2 6 ,2 9

3 .3 V

B UF _ P L T _ RS T #

1

S US B #

R5 8 8

6
19

4
5
13
14
16

1 0 K _ 04

Sheet 19 of 42
NEW CARD, MINI
PCIE

S Y S RS T #
OC #

C 49 4

NC _ 3 . 3V S

40 mil

C 80 5

. 1 U_ 1 6 V _ 04

C 49 7

. 1 U_ 1 6 V _ 04

C 48 3

. 1 U_ 1 6 V _ 04

CP P E #
C PUS B #

11

C 47 5

RC LK E N
S HD N#
GN D
GN D

. 1 U_ 1 6 V _ 04
NC _ C P P E #
NC _ C P U S B #
PC IE_ W AKE#

10
9
R5 6 6

N C _R C L K E N
N C _S H D N #

18
20

17 , 2 0 , 2 2 P CI E _W A K E #
2 N E W CA R D _C L K R E Q #
3 .3 V S

*1 0 0K _0 4

R5 6 5

*1 0 0K _0 4

R5 8 6
R5 3 0

*1 0 K _ 04
*1 0 K _ 04

R 24 2

3 .3 V

2 CL K _ PC IE _ NE W _ C ARD
2 C L K _ P CI E _N E W _ C A RD #
16
16
16
16

Ad d GN D pi n

P C I E _ RX P 2 _ N E W _ C A R D
P C I E _ RX N 2 _N E W _ C A RD
P CI E _ T X P 2 _ N E W _ C A R D
P CI E _ T X N2 _ N E W _ CA R D

16
16

Port 9

20 PIN QFN PACKAGE

14
15
9
10
17
4
11
16

1 0 K _0 4

7
21

P 2 2 3 1N F

13
12

40 mil

NC _ 1 . 5V S

ST BY #

NC
NC
NC
NC
NC

20 mil

3

A V C C_ 1 . 5 V
V OU T _1 . 5 V

16 , 2 0 , 2 2 , 26 B U F _ P L T _R S T #
16
U S B _ OC # 9

J _ NE W 1
NC _ P E RS T#
. 1 U_ 1 6 V _ 04

NC _ 3 . 3V

6- 01 -7 41 08 -Q 61

US B _P P 9
US B _P N9

1 7 I C H _S M B D A T 1
1 7 I C H _S M B C LK 1

19
18
22
21
25
24

3
2
8
7

PER ST#
+ 3 . 3V A U X

+ 3 . 3V
+ 3 . 3V
+ 1 . 5V
+ 1 . 5V
CP P E #
CP US B#
W AKE #
CL K R EQ #
RE F CL K +
RE F CL K R E S E RV E D
P E R p 0 R E S E RV E D
PER n 0
GN D
PETp 0
GN D
PETn 0
GN D
GN D
U S B _ D+
GN D
U S B _ DGN D
GN D
S M B _ DA T A
GN D
S M B _ CL K

NE W _ R E S E R V E D 1
NE W _ R E S E R V E D 2

5
6
1
20
23
26
G ND
G ND
G ND
G ND

1
2
3
4

1 3 0 80 1 -1

MINI CARD

20 mil
J _ MI N I 1
P C IE _ W AK E #
3 .3 V S

R3 8 8

1 0 K _ 04

1
3
5
7
11
13
9
15

2 , 2 0 W LA N_ C L K R E Q#
2 C L K _ P CI E _M I NI #
2 C L K _ P CI E _M I N I

W AK E#
C OE X 1
C OE X 2
C
R
R
G
G

LK R E Q #
E F CL K E F CL K +
ND 0
ND 1

3 .3 V
1 .5 VS

W L A N 1. 5 V S
3. 3V A U X _ 0
1 .5 V_ 0
UIM _ P W R
U I M_ DA TA
U I M_ C LK
UIM _ RES E T
U I M_ V P P
G ND 5

2
6
8
10
12
14
16

20 mil
UI
UI
UI
UI
UI

R 23

M_ P W R _1
M_ D A T A _ 1
M_ C L K _ 1
M_ R S T _ 1
M_ V P P _ 1

*0 _ 0 6

C7 3
*. 1 U_ 1 6 V _ 0 4

4

KEY
21
27
29

16
16
16
16

35
23
25
31
33

2 6 W L A N _ D E T#
P CIE _ R X N1 _ W L A N
P C I E _ RX P 1 _ W L A N
P C IE _ T X N1 _ W L A N
P C I E _ TX P 1 _ W L A N
26
26

8 0D E T #
3 IN1
3 .3 V

V DD 3

R 38 9

0_ 0 4

17
19
37
39
41
43
45
47
49
51

G ND 2
G ND 3
G ND 4
G N D 11
PET n 0
PET p 0
PER n 0
PER p 0
R es e rv e d 0
R es e rv e d 1
G N D 12
3 .3 VA UX _ 3
3 .3 VA UX _ 4
G N D 13
R es e rv e d 2
R es e rv e d 3
R es e rv e d 4
R es e rv e d 5

G ND 6
G ND 7
G ND 8
G ND 9
G ND 1 0
W _ DIS A B L E #
PER SET #
S MB _ C LK
S M B _ DA TA
U S B _ DUS B_ D +
3. 3V A U X _ 1
1 .5 V_ 1
1 .5 V_ 2
3. 3V A U X _ 2
L ED _ W W AN #
L E D_ W L A N #
L ED _ W PAN #

18
26
34
40
50
20
22
30
32
36
38
24
28
48
52
42
44
46

W L A N _E N 2 3 , 2 6

B U F _ P L T_ R S T #

U S B _ PN4 1 6
U SB_ PP4 1 6

20 mil
40 mil W L A N 1. 5 V S

Z2603

20 mil

R3 5

*2 0 m li _ s ho rt

3 .3 V

Port 4

3 .3 V
8 0 CL K

26

8 8 9 08 -5 2 0 4

V D D3
1 .5 V S
3 .3 V
3 .3 V S
5V

1 .5 VS

B - 20 NEW CARD, MINI PCIE

3 . 3V

C1 9 6

C2 1 1

C 112

*. 1 U _1 6 V _ 0 4

*1 0 U _ 1 0 V _ 08

. 1U _ 16 V _ 0 4

3 , 1 5, 23 , 2 6 , 2 7, 2 8 , 3 2
4 , 1 0, 15 , 1 6 , 1 8, 2 0 , 2 9
3 , 1 4, 15 , 1 6 , 1 7, 1 8 , 2 0 , 21 , 2 2 , 2 3 , 27 , 2 9 , 3 0
2 , 3 , 6 , 7, 1 0 , 1 2 , 1 3, 1 4 , 1 5 , 16 , 1 7 , 1 8, 21 , 2 2 , 2 3, 2 5 , 2 6 , 2 7, 3 3
1 8 , 21 , 2 5 , 2 7 , 28 , 2 9 , 3 0, 3 3

Schematic Diagrams

3G, POWERGOOD
3G

C697

220U_4V_D2

C179

.1U_16V_04

+

20 mil

3G POWER

GND

1
3
5

17,19,22 PCIE_WAKE#

Z2701 7
11
13
9
15

CLKREQ#
REFCLKREFCLK+
GND0
GND1

GND

17
19
37
39
41
43
45
47
49
51

3G_3.3V

GND

C695

.1U_16V_04

10U_10V_08

GND

GND11
PETn0
PETp0
PERn0
PERp0
Reserved0
Reserved1
GND12
3.3VAUX_3
3.3VAUX_4
GND13
Reserved2
Reserved3
Reserved4
Reserved5
88908-5204

G
C169

C116

C199

C145

W_DISABLE#
PERSET#
SMB_CLK
SMB_DATA
USB_DUSB_D+
3.3VAUX_1
1.5V_1
1.5V_2
3.3VAUX_2
LED_WWAN#
LED_WLAN#
LED_WPAN#

1U_6.3V_04

10U_10V_08

.1U_16V_04
R61

.1U_16V_04

10K_04

4
GND
GND

GND6
GND7
GND8
GND9
GND10

3G_3.3V

>48 mil

R63

18
26
34
40
50

26 3G_POWER

Q14
MTN7002ZHS3

G

From H8 default HI

20
22
30
32
36
38
24
28
48
52
42
44
46

100K_04

3G_EN
26
BUF_PLT_RST# 16,19,22,26
USB_PN2 16
USB_PP2 16
R477

Z2704

0_04

Sheet 20 of 42
3G, POWERGOOD

Port 2

3G_3.3V

1. 5VS
3G_3.3V
+ C696
220U_4V_D2

1.5VS

GND

3G_3. 3V

C66

C213

.1U_16V_04

.1U_16V_04

GND
GND

SIM CONN

R507

GND

*4.7K_04

J_SIM1
LOCK
(TOP VIEW)
UIM_CLK R503
UIM_RST
UIM_PWR

0_04

Z2702

C735
*22P_50V_04
GND

C3
C2
C1

UIM_CLK
UIM_RST
UIM_PWR

C7 Z2703
UIM_DATA C6
UI M_VPP C5
UIM_GND

R508

0_04

C742

OPEN
SIMLOCK 1770661- 1

*22P_50V_04
GND

GND

UI M_DATA
UI M_VPP
C740

C737

*22P_50V_04
GND

*22P_50V_04

GND

Layou note:
1. SIM? Signal Trace(10mil)
2. All signal trace reference GND
3. SIM hold body around add GND
4.SIM CONN NEAR MINI CARD CONN

1.5VS
3.3V
3.3VS
5VS

4,10,15, 16, 18, 19,29
3,14,15, 16, 17, 18,19,21,22,23,27,29,30
2,3, 6, 7,10,12,13,14,15,16,17,18,19,21,22,23, 25, 26,27,33
14,15,18,21, 23, 25,27

3G, POWERGOOD B - 21

B.Schematic Diagrams

35
23
25
31
33

26
3G_DET#
16 PCIE_RXN3_3G
16 PCI E_RXP3_3G
16 PCI E_TXN3_3G
16 PCIE_TXP3_3G

GND2
GND3
GND4

3G_3.3V
1.5VS

UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

K EY
21
27
29

C694

GND5

2
6
8
10
12
14
16

D

*0_04

2 CLK_PCIE_MINI_3G#
2 CLK_PCIE_MI NI_3G

3.3VAUX_0
1.5V_0
UIM_PWR
UI M_DATA
UIM_CLK
UIM_RESET
UIM_VPP

*0_06
Q19
AO3415
S
D

>48 mil

S

R448

2,19 WLAN_CLKREQ#

WAKE#
COEX1
COEX2

R67

3. 3V

J_3G1

Schematic Diagrams

USB, FAN, TP, FP, MULTI CON
FAN CONTROL

USB PORT*2

5 VS

U1 9
N C_ F O N

R6 3 2

3 .3 V

10 K _ 0 4
U 10

16

5

US B _ O C# 0 1

F L G # V OU T 1

2

5V
C 38 4

3

1 0 U _ 1 0 V _ 08

4

V IN 1

V OU T 2

V IN 2

V OU T 3

EN #

G ND

US B VCC 0 1

6

100 MIL

7

C3 1 2

C3 1 3

. 1 U _ 1 6V _0 4

4. 7U _ 6. 3V _ 0 6

1
2
3
4

F ON
V IN
V OU T
V SET

GN D
GN D
GN D
GN D

8
7
6
5

G9 9 0
CP U _ F A N

8

C 3 55

C 360

C3 6 9

1

. 1 U _ 16 V _ 0 4

. 1U _ 16 V _ 0 4

*1 0 U _ 1 0V _0 8

26

5 V S _F A N
J _ F A N1

R T 97 1 5 B GS
2 7 , 30

1
2
3

C3 1 1

D D _O N #

10 U _1 0 V _ 0 8
U S B _V C C 0 1 _ 0
L22

J_FAN1

60 mil

* 3 2m i l _ sh o rt
+C 3 33

3

2 6 CP U _ F A N S EN

C3 3 4

* 1 00 U _6 . 3 V _ B 2

R 19 2

3 . 3V S

C
D1 1

Port 0

. 1 U _ 1 6 V _ 04

4 . 7 K _ 04

1

A
S C S 5 5 1 V -3 0

J _ US B 1
1
US B _ P N0

16

US B _ P P 0

R6 2 0
4
1

0_04
3
2

U S B _P N 0 _ R

2

U S B _P P 0_ R

3

V+

4

G ND

K S - 00 1 H L -A N B A

5V
U S B V C C0 1

U S B _ V C C 0 1_ 1
L25

C3 7 0

* 3 2m i l _ sh o rt

*. 1 U _1 6 V _ 0 4

3 .3 V S _ F P

P IN G ND 3 ~ 4 = G N D

5 VS

+C 3 87

R 49 2

* . 1 U _ 1 6 V _ 04

* 1 00 U _6 . 3 V _ B 2

R 49 3

1
2
3
4

C3 7 5

Port 1

. 1 U _ 1 6 V _ 04

U S B _ P P 7 16
U S B _ P N 7 16

Port 7

*8 5 20 1 -0 4 L_ S
1
2
3
4
5
6

C3 8 9

L2 4
3 .3 V S
*H C B 16 0 8 K F -1 2 1T 2 5 _ 06 _ S

J _F P 1

J _ TP 1

60 mil

C 365

FP CONN

CLICK CONN FOR M760T

D ATA_ L
D ATA_ H

L2 3
* W C M2 0 12 F 2 S -1 6 1 T0 3
R6 2 1
0_04

G ND 2
GN D 2

Port 0

16

G ND 1
G ND 1

Sheet 21 of 42
USB, FAN, TP, FP,
MULTI CON

.

1 0 K _ 04

1 0 K _ 04

C 71 0

C 71 1

1 U _ 1 0 V _ 06

4 7 P _ 50 V _ 0 4

4 7 P _ 50 V _ 0 4

* . 1 U _ 1 6 V _ 04 _ S

C 9 15

*1 0 U _ 1 0V _0 8
TP _D A T A
TP _C L K

C 37 4

C 376

* 1 U _ 1 0V _0 6 _ S

26
26

J_FP1
4
1

J _ US B 2

Port 1

16

US B _ P N1

16

US B _ P P 1

R6 2 2
4

0_04
3

1

2
L2 7
* W C M2 0 12 F 2 S -1 6 1 T0 3
R6 2 3
0_04

U S B _P N 1 _ R

2

U S B _P P 1_ R

3
4

8 5 20 1 -0 6 R

V+
D ATA_ L

J _F P 2

G ND

K S - 00 1 H L -A N B A

P IN G ND 3 ~ 4 = G N D

3 . 3V S _ F P

For W76

6
5
4
3
2
1

D ATA_ H
LE D _ C T R L 26

G ND 2
GN D 2

1

G ND 1
G ND 1

For ESD

U S B _ P N 7 16
U S B _ P P 7 16

*8 5 20 1 -0 6 05 1 _ S

25
25

3. 3 V

5V

25 H E A D P H O N E -R
25 H E A D P H O N E -L
25 J D _ S E N S E

C9 2 2
1.5V:FOR MONTEVINA PLATFORM
GMCH HD_AUDIO USED

C9 2 3
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 04

3. 3 V

1 5 ,2 5
1 5 ,2 5
15
1 5 ,2 5

AZ_ SD
AZ_ SY
AZ_ SD
A Z _ RS

C9 1 6
C9 1 7
C9 1 8
C9 1 9

CN 2
1
3
5
7
9
11
13
15

OU T
NC
IN1
T#

6 8 P _ 5 0V
6 8 P _ 5 0V
6 8 P _ 5 0V
6 8 P _ 5 0V

_0 4
_0 4
_0 4
_0 4

2
4
6
8
10
12
14
16

8 7 21 6 -1 6 06

A Z _ B I T CL K

16
16

25
16
16

SPK_ H P#

J D_ S E N S E _ B
U S B _P N 8
U S B _P P 8

D03B-0329
25

A UD G
L79
F C M 10 0 5 K F -1 2 1T 0 3
Z 2 8 04

S P DIF O

Port 5

J _ TP 2

J_TP2
1

8 72 1 3 -1 30 0 G_ R

12

6-20-94A20-112

1
2
3
4
5
6
7
8
9
10
11
12

1
3

T P B U TT O N _ L
T P _ S C R OL L _ D O W N
T P _ S C R OL L _ U P
T P B U TT O N _ R
N C _ T P _5
N C _ T P _6
T P _ CL K
T P _ DA T A
5 VS
C3 6 4

8 7 1 5 1-1 2 0 7 G
. 1 U _ 1 0V _X 7 R _ 0 4

C8 8 1

3 . 3V S
J _ SW 1
J_SW1
C8 8 2

1

68 P _ 5 0 V _ 04
4

1
2
3
4
8 5 2 0 1-0 4 0 5 1_ R

B - 22 USB, FAN, TP, FP, MULTI CON

M_ B T N #

27

V IN
3 . 3V
3 . 3V S
5V
5 VS
V DD 5

4
3

LIFT
KEY

SW 7
TJ G -5 33 -S -T / R

*1 0 0 0 P _ 50 V _ 0 4

Z 2 8 03

SW6~9
2
1

RIGHT
KEY

FOR POWER SWITCH BOARD

R6 2 4
F C M 1 00 5 K F -1 2 1 T 03
1 5 ,2 5

Port 8
C C D_ DE T # 2 6
C C D _ E N 26
S P K OU T R + 2 5
S P K OU T R - 2 5
U S B _ P N5
U SB_ PP5

M I C 1 -R
M I C 1 -L

C N1
1
2
3
4
5
6
7
8
9
10
11
12
13

1 4 , 23 , 2 7 , 2 8 , 29 , 3 0 , 3 2
3 , 1 4, 15 , 1 6 , 1 7, 1 8 , 1 9 , 2 0, 2 2 , 2 3 , 2 7, 2 9 , 3 0
2 , 3 , 6 , 7, 1 0 , 1 2 , 1 3, 1 4 , 1 5 , 1 6, 1 7 , 1 8 , 19 , 2 2 , 2 3 , 25 , 2 6 , 2 7 , 33
1 8 , 25 , 2 7 , 2 8 , 29 , 3 0 , 3 3
1 4 , 15 , 1 8 , 2 3 , 25 , 2 7
2 7 , 28

SW 6
T J G-5 3 3 -S -T / R
2
4

5
6

FOR MULTI IO BOARD

CLICK CONN FOR M740T

5V

T P B U T T ON _R

1
3

2
4

5
6

FOR PHONE JACK BOARD

MULTI I/O CONN

.

B.Schematic Diagrams

U S B V C C0 1

8 5 2 0 5-0 3 0 0 1

T P BUT T O N_ L

Schematic Diagrams

CARD READER(JMB261)
22_04

MDIO Single
End = 50
Ohm

Switching Regulator
(>20mil)

4 .7 K _ 0 4 S D _ CD #
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

U 12
1 0 K_ 0 4

MS _ I N S #

R N3 8
8 P 4 R X1 0 K _ 0 4
8
1
7
2
6
3
5
4

LA N _ L E D 0
LA N _ L E D 1
SD _ BS
SD _ W P
MD I O 1 3

D VD D

Ca rd Reader Pull
Hi gh/Low
Re sistors

24
24

24
24
24
24

R2 1 6

*1 0 K _ 0 4 MD I O 7

R2 4 1
R2 2 2

*2 0 0 K _ 0 4 MD I O 1 2
*2 0 0 K _ 0 4 MD I O 1 4

3 .3 V
L A N _ MD I P 2
L A N _ MD I N 2
D VD D
L A N _ MD I P 3
L A N _ MD I N 3

LA N _ M D I P 2
LA N _ M D I N 2
LA N _ M D I P 3
LA N _ M D I N 3

SM B_ SD A /C

JMC251
JMC261
( LQFP 6 4)

C
C
S MB _ S

G ND
M DIO 1 3
M DIO 1 4
R _L E D N
TESTN
VDD IO
V DD
V C C3 O
R_ C D0 N
R_ C D1 N
CL /L ED 2
C R E QN
M PD
W A KEN
R STN
A V DD X

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

C 29 3

C 2 90

1 0 U_ 1 0 V_ 0 8
Pin#7

. 1 U _1 6 V _ 0 4
Pin#7

1. For JM C251/ JMC26 1 o nly .
2. M PD co nn ec t t o M ain Powe r o r
RSTN for D3E appl icaion , to AUX
p ower oth erwis e.

MD I O1 3
MD I O1 4
C R 1 _L E D N

C R 1 _P C T L N
S D_ C D#
MS _ I N S #
LA N _ L E D 2

For JMC251/261
only

3 .3 V
DV D D

3 .3 V

P C IE _ W AK E # 1 7 ,1 9 ,2 0
R 43 3

DV D D

R1 7 8
R1 8 8

* 0 _ 04
3 .3 V
* 1 0 0K _ 04 3 . 3 V S

C5 9 7

* .1 U_ 1 6 V _ 0 4

3 .3 VS

Sheet 22 of 42
CARD
READER(JMB261)

0_04

R EXT
V D DX 3 3
XIN
X OU T
G ND
LX
FB1 2
V DD RE G
C L KN
CL K P
AV D DH
R XP
R XN
GN D
T XN
TX P

3 .3 V S

L A N _ MD I P 0
L A N _ MD I N 0
D VD D
L A N _ MD I P 1
L A N _ MD I N 1

L ED 0
L ED 1
V DD
G ND
V IP _ 1
V IN_ 1
A V DD 1 2
V IP _ 2
V IN_ 2
G ND
A V DD 3 3
V IP _ 3 (NC )
V IN _ 3 (N C)
A V D D 1 2 (N C )
V IP _ 4 (NC )
V IN _ 4 (N C)

(>20mil)

J M C2 6 1

R2 5 1

R E GL X
A RF B1 2

LA N X I N
L A N X O UT

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

PCIe Differential
Pairs = 100 Ohm
C 286
C 287

.1 U_ 1 0 V _ X 7 R_ 0 4
.1 U_ 1 0 V _ X 7 R_ 0 4

1 2 K _ 1 % _0 4

B U F _ P L T_ R S T # 1 6 , 1 9 , 2 0 , 2 6

Card Reader
Power

P C I E _R X P 4 _ GL A N 1 6
P C I E _ R X N 4 _ GL A N 1 6

C R 1 _ P C T LN

V CC _ CA R D

R 179

P C IE _ T X N4 _ G L A N 1 6
P C I E _ T XP 4_ G L A N 1 6

75_06

DV DD
3 .3 V

3 .3 V

3 .3 V
L A N _L E D 2
C R1 _ L ED N

C LK _ P C I E _ GL A N 2
CL K _ P C IE _ G L A N # 2

C3 1 6

R 17 7
R 17 6

4 . 7 K _ 04
4 . 7 K _ 04

.1 U_ 1 6 V_ 0 4
Pin#26
3 .3 V
DV DD

C 251
.1 U_ 1 6 V _ 0 4
Pin#8
C2 8 0

C2 8 1

C 26 7

C 3 03

.1 U_ 1 6 V_ 0 4
Pin#51

.1 U_ 1 6 V _ 0 4
Pin#62

. 1 U _1 6 V _ 0 4
Pin#55

1 0 U_ 1 0 V _ 0 8
Pin#55
Reserved

C2 5 7
1 0 U _ 1 0V _0 8
Pin#8

For JMC251/261
only

Card Reader
Connector
J _ C A R D -R E V 1
S D_ C D #
S D_ D 2
S D_ D 3
S D_ B S

3 .3 V

C5 8 1

C2 7 0

.1 U_ 1 6 V_ 0 4
Pin#38

.1 U_ 1 6 V _ 0 4
Pin#27

V CC _ CA RD

S D_ C L K
C6 0 3

L A NX O U T

.1 U_ 1 6 V _ 0 4

R1 8 5
3 .3 V

1 M_ 0 4

LA N X I N

V CC _ CA RD

X4
2

C5 9 6
1

V C C_ C A R D

V C C_ C A R D
.1 U_ 1 6 V _ 0 4

S D _C L K
C2 6 9

C2 5 2

C 59 4

C 5 84

1 0 U_ 1 0 V _ 0 8
Pin#59
Reserved

.1 U_ 1 6 V _ 0 4
Pin#59

. 1 U _1 6 V _ 0 4
Pin#2

. 1 U _ 16 V _0 4
Pin#11

Plac e all c ap acit ors close d t o c hip .
Th e s ubscript in eac h CAP inc icat es t h e pi n
nu mb er o f JM C251 /JMC261 t ha t sho uld b e
c los ed t o .

C 2 65

2 5 MH z

2 2 P_ 5 0 V_ 0 4

C2 6 2
C 595

C 323

C 610

C 321

C 317

* 1 0 P _ 5 0V _ 04

. 1U _ 1 6 V _ 0 4

4 . 7 U _ 25 V _0 8

. 1 U _ 1 6 V _ 04

. 1U _ 1 6 V _ 0 4

2 2P _5 0 V _ 0 4

S D_ D 0
S D_ D 1
S D_ W P

S D_ C L K
S D_ D 3
MS _ I N S #
S D_ D 2
S D_ D 0
S D_ D 1
S D_ B S

P1
P2
P3
P4
P5
P6
P7
P8
P9
P 10
P 11
P 12
P 13
P 14
P 15
P 16
P 17
P 18
P 19
P 20
P 21

CD _ S D
D A T 2_ S D
CD /D A T 3 _ S D
C M D _S D
V S S _S D
V D D_ S D
C L K _S D
V S S _S D
D A T 0_ S D
D A T 1_ S D
W P_ SD
V S S _M S
V C C_ M S
S C L K _ MS
D A T 3_ M S
I N S _ MS
D A T 2_ M S
S D I O/ D A T 0 _ M S
D A T 1_ M S
BS_ M S
V S S _M S

G ND
G ND

P2 2
P2 3

M D R 0 19 -C 0 -0 0 1 0 ( R e v e rs e )

Near Cardreader CONN

24
D VDD
2 , 3 , 6 , 7 , 1 0, 12 , 1 3 , 1 4 , 1 5 , 1 6 , 1 7 , 1 8, 19 , 2 1 , 2 3 , 2 5 , 2 6 , 2 7 , 3 3 3. 3V S
3 , 1 4 , 1 5 , 1 6 , 1 7 , 1 8, 19 , 2 0 , 2 1 , 2 3 , 2 7 , 2 9 , 3 0 3. 3V

CARD READER(JMB261) B - 23

B.Schematic Diagrams

24
24

49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

AR FB1 2

S W F 2 52 0 C F -4 R 7 M-M

R178 R188 R432 C566 Function
NC
NC
NC Disable D3E
0
NC
NC
0
NC Enable D3E(1)
NC
100K NC
0.1uEnable D3E(2)

M DIO 0
M D IO 1
M D I O2
V D DIO
M D IO 3
M D IO 4
M D I O5
GN D
M D IO 6
M D I O7
V D DIO
M DIO 8
M D IO 9
M D I O1 0
M DIO 1 1
M D IO 1 2

R2 5 0

V C C _C A R D

D VD D

L26

R E GL X

.

R2 3 4

SD _ W P
M D I O7

3 .3 V

3 .3 V

SD _ D 3
SD _ BS

S D_ D 0
SD _ D1
S D _D 2

3 .3 V

D IO 8
D I O9
D I O1 0
DIO 1 1
D I O 12

R 1 82

S D_ C L K

M
M
M
M
M

JMC251/JMC261

Schematic Diagrams

SATA ODD, LED, HOTKEY, LID SW
VIN

HOT KEY

SATA ODD

M740TU USE

R 6 10

MAIL

INTERNET

SW 1
TJ G -53 3 -S -T / R

S A T A TX P 1 1 5
S A T A TX N 1 15

1
3

2
4

1
3

P1
P2
P3
P4
P5
P6

Z 30 0 6 1
3

1
2

3
4

SILENT
SW 3
TJ G -5 33 -S -T / R

PSW1~5
2
4

5
6

S A T A RX N1 1 5
S A T A RX P 1 1 5

1 0 0 K _ 04

S W2
T J G- 53 3 -S -T / R

2
4

5
6

S1
S2
S3
S4
S5
S6
S7

AP_ KEY

5
6

J _ OD D 1

Z3 00 1
1
3

+ C7 0 9

C3 5 4

C3 5 0

C3 3 7

C3 5 7

. 1 U _ 1 6 V _0 4

. 1 U _ 1 6V _0 4

1U _ 10 V _ 0 6

1 0U _ 1 0V _ 0 8

2
4

S W5
* T JG -5 3 3-S - T/ R
1
3

W E B _E MA I L # 2 6

*1 0 0 U _ 6 . 3V _B 2

G ND
2
4

W EB_ W W W # 2 6

C 7
. 1 U _ 1 6 V _ 04

5
6

5
6

P IN G N D1 ~ 4 = G ND

GN D

LED

GN D

GN D

Bluetooth

3 . 3V S

3 . 3V
3 .3 VS

3 .3 V S

R 3 27

A

26

R Y -S P 15 5 H Y Y G4

2
4

G

J_BT1
1

D1 6

1

3

R Y -S P 1 5 5H Y Y G4

2

4

LID SWITCH IC
3 .3 V

4 7 0_ 0 4
Z 30 1 3
3

1

BAT LED

D1 7

R 3 31

WLAN/
BT
LED

Z30 14

1 0K _ 0 4

U 1
1

R Y -S P 1 5 5H Y Y G4

VC C

O UT

2

LI D _ S W #

L ID_ S W #

MH -24 8

4

2

4

2

8 72 1 2 -06 G 0

Q 32
2 N7 0 0 2 W

C5 8 7
4

1
2
3
4
5
6

U SB_ PN3
U SB_ PP3
B T _ DET #

GN D

1
3

BT_ EN

R 59 0

Z3012

SG

D 15

B T_ E N #

1 0 K_ 0 4

16
16
26

5 VS

4 7 0_ 0 4

3

POWER ON
LED

5 VS

Z 3 01 1

R 38 1

3 .3 V

Z 30 1 5

. 1U _ 1 6V _ 0 4

3

A
C

D 22

R5 9 3

2 2 0_ 0 4
Z 30 1 0
1

3

1

J _ BT1

Port 3

L E D _ S C R O L L# 2 6

R 59 1

2 2 0 _0 4

1 0U _ 10 V _ 0 8

From EC default HI

VD D3

R5 9 4

2 20 _ 0 4
Z3 00 9

Y
SG

3
4

V DD 3

R5 9 2

Z3008

2

SCROLL
LOCK
LED

Y

V DD 3

2 20 _ 0 4

1

D2 1

CAPS
LOCK
LED

L E D _ N U M# 2 6

R 5 95

. 1 U _ 1 6 V _ 04

2 20 _ 0 4

L E D _ C A P # 26

SG

V DD 3

HDD/
CD-ROM
LED

Y

C

R Y -S P 1 7 2Y G3 4

D 19

C

A

Z3002

D 20

C5 9

Z3005

R Y - S P 1 72 Y G 3 4

22 0 _ 0 4

A

NUM
LOCK
LED

R Y -S P 1 7 2 Y G3 4

R3 2 5

R3 2 8

2 2 0 _0 4
Z 3 00 4

D

2 20 _ 0 4

C5 5

S

R3 2 6

Z 30 0 3

C

S A T A _ L E D# 1 5

5 0m il

.

R Y -S P 1 7 2 Y G3 4

B
Q 24
D TA 11 4 E U A
Z3017

3 V_ BT

L4
H C B 16 0 8 K F -1 2 1T 2 5 _ 06

3 .3 V S

E

2

B.Schematic Diagrams

. 1 U _1 6 V _ 0 4
GN D

C

10 0 K _ 0 4

. 1 U _ 1 6 V _ 04

GN D

M760TU USE

SW 4
*T J G-5 3 3- S -T/ R

C 9

Sheet 23 of 42
SATA ODD, LED,
HOTKEY, LID SW

C 8

5V S

OD D _ D E T E C T # 1 7

9 1 92 3 -0 13 7 P

R6 1 1

PSU1, PSU2
3

L E D _P W R # 2 6
LE D _ A C I N # 2 6

C

LE D _ B A T _ F U L L # 26

B

L E D _ B A T _ C H G# 2 6

E

1
W L A N_ E N

1 9, 2 6

Q4 8
D TC 1 14 E U A

C
B
B T _E N
E

B - 24 SATA ODD, LED, HOTKEY, LID SW

Q5 0
D T C 11 4 E U A

26
VD D3
VIN

3 , 1 5, 19 , 2 6 , 2 7, 2 8 , 3 2
1 4 , 27 , 2 8 , 2 9, 30 , 3 2

1 .5 V S
3 .3 V
3 .3 V S
5V
5 VS
VD D5

4 , 1 0, 15 , 1 6 , 1 8, 1 9 , 2 0 , 29
3 , 1 4, 15 , 1 6 , 1 7, 1 8 , 1 9 , 20 , 2 1 , 2 2, 27 , 2 9 , 3 0
2 , 3 , 6 , 7, 1 0 , 1 2 , 13 , 1 4 , 1 5, 16 , 1 7 , 1 8, 1 9 , 2 1 , 22 , 2 5 , 2 6, 27 , 3 3
1 8 , 21 , 2 5 , 2 7, 28 , 2 9 , 3 0, 3 3
1 4 , 15 , 1 8 , 2 1, 25 , 2 7
2 7 , 28

2

1 4, 2 6

6

GN D

27

Schematic Diagrams

LAN(JMB261)
LAN (JMC251/JMC261)
LP3
8P4 RX0_ 06
4
5
3
6
2
7
1
8

L8

22
22

L AN _MDI P0
L AN _MDI N0

22
22

L AN _MDI P1
L AN _MDI N1

22
22

L AN _MDI P2
L AN _MDI N2

22
22

L AN _MDI P3
L AN _MDI N3

1
2
3
4
5
6
7
8
9
10
11
12

TCT1
TD1+
TD1TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4-

LP2
*# 944C M-00 51=P3
LMX1+ 4
5 DLMX1+
LMX1- 3
6 DLMX1LMX2+ 2
7 DLMX2+
LMX2- 1
8 DLMX2LP1
*# 944C M-00 51=P3
LMX3 + 4
5 DLMX3+
LMX3 - 3
6 DLMX3LMX4 + 2
7 DLMX4+
LMX4 - 1
8 DLMX4-

24
23
22
21
20
19
18
17
16
15
14
13

MCT1
MX1+
MX1MCT2
MX2+
MX2MCT3
MX3+
MX3MCT4
MX4+
MX4-

J_RJ _1
1
2
3
6

4
5
7
8

10 /100 M --> LF-H 240 P-1
10 00M --> GS5 019P LF

s hield
s hield

GND1
GND2

DC+
DCDD+
DDC100 91- 108A4

D LMX3 +

R 81
0 _04
MC T1
MC T2
MC T3
MC T4

R44
R43
R42
R41

7 5_1%_0 4
7 5_1%_0 4
*75 _1%_04 _S
*75 _1%_04 _S

Z311 0

R46
R47

75 _1%_04
75 _1%_04

Sheet 24 of 42
LAN(JMB261)

D LMX3 D LMX4 +

R 85
C171
0 _04

DVDD
1000 p_2 KV_1 2

D LMX4 -

R80
*0_04

40 mil

TCT

C212

C19 7

C204

C218

.01U _16V_0 4

*.01 U_16 V_ 04_S

*.01U _16V_0 4_S

*. 01U_ 16V_0 4_S

FOR JMC251
STUFF L8,C212,C197,C204,C218,LP3,LP4,J_RJ_1,
R44,R43,R42,R41,C171

FOR JMC261
STUFF L28,C212,,LP3,J_RJ_1,
R44,R43,R46,R47,C171,R81,R85

L2 8
22
22

LAN_MD IP0
LAN_MD IN0

1
2
3

TCT
NS_ NC1
NS_ NC2

22
22

LAN_MD IP1
LAN_MD IN1

4
5

6
7
8

RD +
RD RD _CT

RX+
RXRX_ CT

NC
NC
TD_CT
TD+
TD-

NC
NC
TX_ CT
TX+
TX-

16
15
14

L MX1+
L MX1MCT1

13
12

N S_ NC3
N S_ NC4

11
10
9

MCT2
L MX2+
L MX2-

*NS6816 80

22

DVDD

LAN(JMB261) B - 25

B.Schematic Diagrams

LP4
*8P4RX0 _06 _S
8
1
7
2
6
3
5
4

LF- H240 2P-1

DA+
DADB+
DB-

Schematic Diagrams

AUDIO CODEC ALC272
CODEC ( ALC272-GR )

FOR PIN25,PIN38 10uF/.1uF

C 78 9

C 7 88

. 1 U _1 6 V _ 0 4

1 0 U_ 1 0 V _ 0 8

D4 0
C

*S C S 5 5 1 V -3 0
A

L 77

H C B 1 6 0 8K F -1 2 1 T 25 _ 0 6

5V

5 V S _ A UD

3. 3V S _ A U D

C 62 5
1 U _ 6. 3V _ 04

.1 U_ 1 6 V _ 0 4

C 8 08

C 649

1 0 U_ 1 0 V_ 0 8

. 1 U _ 16 V _ 0 4

. 1 U _ 16 V _0 4

1 0 U_ 1 0 V _ 0 8

C7 8 1
*. 1 U _ 1 6V _ 04

* 1 U_ 1 0 V _ 0 6

C7 5 1
C7 5 0

* .1 U_ 1 6 V _ 0 4
* .1 U_ 1 6 V _ 0 4

M I C 1 _L
M I C 1 _R

C7 7 5
C7 4 6

* .1 U_ 1 6 V _ 0 4
* .1 U_ 1 6 V _ 0 4

C 650
R
R
R
R
R

1 5 ,2 1 AZ _ S D O UT
1 5 ,2 1 AZ _ B IT C L K
15
A Z _ SDI N0
1 5 ,2 1 A Z _ S Y N C
15 , 2 1 A Z _ R S T #

2 2 P _ 5 0V _ 04

535
539
540
528
544

2
3

A L C_ G P IO 0
A L C_ G P IO 1

22 _ 0 4
22 _ 0 4
22 _ 0 4
22 _ 0 4
22 _ 0 4

AZ_ S
AZ_ B
AZ_ S
AZ_ S
AZ_ R

5
6
8
10
11

DO UT _ R
IT CL K _ R
DIN 0 _ R
Y N C_ R
ST# _ R

48
45

S P D IF O

46
44

A UD G

1 0 K_ 0 4
PC BEEP _ C
1 K_ 0 4
1 0 0 P_ 5 0 V_ 0 4

C 832

1 U_ 1 0 V _ 0 6
M IC _ S EN SE
H P _ S E NS E

2 1 J D _ SEN SE
2 1 J D _ SEN SE_ B

43
12

PC BEE P_ R
R5 2 4
R5 2 5

2 0 K_ 1 % _ 0 4
5 .1 K _ 1 % _ 0 4

13
34

JD 1
JD 2

14
15

I N T_ M I C R 5 7 9

1 K_ 0 4

C8 4 5
C8 5 5

INT _ M IC_ R

4 . 7 U _ 6 . 3V _ 06
4 . 7 U _ 6 . 3V _ 06

16
17

M I C 2 _L
M I C 2 _R

18
19
20

M I C 2 -V R E F O

21
21

25
38

FOR EMI
A U DG

AU DG

Layout Note:
28

MI C 1 -V R E F O

M I C 1 -V R E F O

D 39

A

C

CH 3 5 5 PT

M I C 1 -V R E F O -R

D 33

A

C

CH 3 5 5 PT

MI C 1 -V R E F O -L

Very close to Audio Codec

37

M O N O -O U T

R 365

MI C 1 -L
M I C 1 -R

M I C 1 -L
M I C 1 -R

R3 4 4
R3 4 3

7 5 _ 1% _ 0 4
7 5 _ 1% _ 0 4

C8 1 2
C8 1 1

MI C 1 _ L _C
MI C 1 _ R _ C

4 . 7 U _ 6 . 3V _ 06
4 . 7 U _ 6 . 3V _ 06

21
22

M I C 1 _L
M I C 1 _R

31
30
29

CPV EE
CBN
C BP

SP D IF O 1
SP D IF O 2

C1 0 1
C1 0 7

2. 2 U _ 6 . 3 V _ X 5 R _ 0 4
2. 2 U _ 6 . 3 V _ X 5 R _ 0 4

R 362

4 .7 K _ 0 4
M I C 1 -R

A UD G
35
36

L O U T 1 -L
LO U T1 -R

NC
P C B E E P -I N

ANALOG

L I N E 2 -L
L I N E 2 -R

6 8 0 P_ 5 0 V_ X 7 R_ 0 4

A UD G

H E A D P H O N E -L 2 1
H E A D P H O N E -R 2 1

M I C 2 -V R E F O

NEAR CODEC
40

JD R E F

MI C 1 -L
MI C 1 -R

A UD G

23
24

L I N E 1 -L
L I N E 1 -R

L I N E 1 -V R E F O
MI C 2 -V R E F O
L I N E 2 -V R E F O

C 809

6 8 0 P _ 5 0 V _ X 7 R_ 0 4

33
32

H P O U T -L
H P O U T -R

MI C 2 -L
MI C 2 -R

C 791

F R O N T -L
F R O N T -R

39
41

L O U T 2 -L
LO U T2 -R

S e n s e A (J D 1 )
S e n s e B (J D 2 )

4 .7 K _ 0 4

M I C 1 -L

D M I C -C LK 1/ 2
D M I C -C LK 3/ 4

R 361

J D RE F

J_INTMIC1

2 0 K_ 1 % _ 0 4

2

2 . 2 1 K _ 1 %_ 0 4
A U DG

J _ INT M IC 1
I N T _M I C

A L C2 7 2

1
2

C2 5 5

26
42

Layout Note:

8 8 26 6 -0 2 0 0 1
3 3 0P _ 50 V _ X 7 R _ 04
P C B F oo t p ri n t = 8 8 2 6 6 -2 R

Codec pin 1 ~ pin 11 and pin 44 ~ pin 48
are Digital signals.
The others are Analog signals.

A U DG

PIN 13 ,PIN34 JD_SENSE
MUST AVOID NOISE

5 V S _R E A R

5 VS

AMP (TPA6017)

L4 1

10/16 change
footprinter

H C B 1 00 5 K F -1 21 T 2 0

C 551

C 549

C 542

C5 5 3

. 1 U _ 1 6V _ 04

* 1 U_ 1 0 V _ 0 6

1 0 U _ 1 0V _0 8

*1 0 U _ 1 0 V _ 0 8

J_SPK1
2
1

U 29
F R ON T -L

R3 6 7

3 0 K_ 0 4

F R ON T -R

R3 6 8

3 0 K_ 0 4

A U DG

A U DG

A UD G
5 VS
3 .3 V S
A UD G

C
D 38

.1 U_ 1 0 V _ X 7 R_ 0 4
.1 U_ 1 0 V _ X 7 R_ 0 4

L IN L IN +

5
9

C 5 57
C 5 41

.1 U_ 1 0 V _ X 7 R_ 0 4
.1 U_ 1 0 V _ X 7 R_ 0 4

R INR IN+

17
7

SP K_ EN

19

R2 9 6
R2 9 0

* 10 0 K _ 0 4
1 0 0 K_ 0 4

R2 8 7
R2 9 5

* 10 0 K _ 0 4
1 0 0 K_ 0 4

C7 9 0

Low mute!

C 5 60
C 5 61

G AIN 0
G AIN 1

? 15db

*. 1 U _ 1 0 V _ X7 R _ 0 4

A
*S C S 3 5 5 V

2
3
1
11
13
20
21

Gain Settings

L IN L IN +
R INR IN+

SD #
G A IN 0
G A IN 1

PVD D
PVD D
VD D

Thermal Pad

M770CU SPEAKER 4ohm/2W, use 33K
W760CU SPEAKER 8ohm/1.5W, use30K
W760C use 47K

LO U T+

6
15
16

A UD G
J _S P K L 1

4

S P K OU T L +

L6

8

S P K OU T L -

L5

L O UT 18
R O U T+

RO UT G ND
G ND
G ND
BYP ASS
G ND
N C
EXPO SED PA D

14

10

F C M 1 0 0 5 K F -1 2 1 T 03 _ 0 4

21

E A P D _ M OD E

1
4

K BC _ M UT E #

3

26

S PK_ EN

2
U3 7
MC 7 4 V H C 1 G 08 D F T 1 G

GAIN0 GAIN1 AV(inv)
0
0
6 dB
0
1
10 dB

C 12

12

1
1

0
1

15.6 dB
21.6 dB

AU D G

B - 26 AUDIO CODEC ALC272

1 8 0 P_ 5 0 V_ 0 4

*1 0 m i l _ sh o rt

FOR EMI
C5 4 7
2. 2 U _ 6 . 3 V _ X 5 R _ 0 4

AUD G

45 k
25 k

3 .3 V S
5V
5 VS

C 11

1 8 0 P _ 5 0 V _ 04
L40

A MP _ B Y P A S S

T P A 60 1 7 A 2 P W P R
INPUT IMPEDANCE
90 k
70 k

1
2

8 5 2 0 4 -0 20 0 1
P C B F o o t p rin t = 8 5 2 0 4 -0 2 R

S P K OU T R + 2 1
S P K OU T R -

S P K O UT L + _ R
S P K O U T L -_ R

F C M 1 0 0 5 K F -1 2 1 T 03 _ 0 4

5

1 7 S B _M U T E #

1

R1 8 1

AVSS 1
A VSS2

21

Very close to Audio Codec

R5 7 1
R5 7 2
C8 3 9

1 0U _ 1 0 V _ 0 8

27

VR EF

DIGITAL

* 1 0 mi l _ s h or t
. 1 U _ 1 6V _ 04
. 1 U _ 1 6V _ 04
. 1 U _ 1 6V _ 04
. 1 U _ 1 6V _ 04
. 1 U _ 1 6V _ 04

EAP D

Layout Note:

BEE P

S D A T A -O U T
B I T -C L K
S D A T A -I N
SY NC
RE S E T #

C8 6 1

A L C_ V RE F

GP I O0 / D M I C -D A T A 1 / 2
GP I O1 / D M I C -D A T A 3 / 4

47

E A P D _ M OD E

U3 5

AVD D 1
A V D D2

1
9
DV D D
D V D D -I O

D VSS1
DV S S2
M I C 2 _L
M I C 2 _R

C 784

L37
C7 3 4
C6 2 4
C7 7 4
C6 2 9
C6 3 0

A U DG

.
.

B.Schematic Diagrams

C 8 64

. 1 U _1 6 V _ 0 4

ICH _ S P K R

AU D G

Sheet 25 of 42
AUDIO CODEC
ALC272

C 77 9
AU D G
C 79 4

4
7

17

H C B 1 60 8 K F -1 21 T 2 5 _ 0 6

Z3202

C8 0 0

BEEP

BEE P

.

L4 9
26

5 VS

.

PC BEEP

3 .3 V S

2 , 3 , 6 , 7 , 1 0 , 1 2 , 1 3 , 1 4, 15 , 1 6 , 1 7 , 1 8 , 1 9 , 2 1 , 22 , 2 3 , 2 6 , 2 7 , 3 3
1 8 , 2 1 , 2 7 , 2 8, 29 , 3 0 , 3 3
1 4 , 1 5 , 1 8 , 2 1, 23 , 2 7

Schematic Diagrams

KPC-ITE IT8502E
K B C _A V D D

L30
B K P 1 00 5 H S 12 1 _ 0 4

C4 8 2

C5 1 7

. 1 U _ 1 6V _0 4

C5 3 2

1 0U _ 1 0V _ 0 8

C 48 1

. 1 U _ 1 6 V _ 04

C 5 31

.1 U_ 1 6 V _ 0 4

.

V DD 3
C 50 0

C 5 07

. 1 U _1 6 V _ 0 4

. 1 U _1 6 V _ 0 4

V DD 3
V DD 3

C 510

. 1 U _1 6 V _ 0 4
* . 1 U _ 1 6 V _ 04

1

24

J_KB1

C5 1 2
L80
B K P 1 0 05 H S 1 21 _ 0 4

14

L C D _ B R I GH T N E S S
K B C_ B E E P

24
25
28
29
30
31
32
34

_B
_B
_C
_C
_V
_V

23 L E D _ S C R OL L #
23
L E D_ N UM #
23
L E D_ C A P #
2 3 L E D_ B A T _ C HG #
2 3 L E D _B A T_ F U L L #
23
L ED _ PW R #

T H E RM _ RST #

PU
PU
PU
PU
PU
PU
PU
PU

)
)
)
)
)
)
)
)

125

C4 9 5

0 _0 4

74

)I D 0 / G
)I D 1 / G
)I D 2 / G
)I D 3 / G
)I D 4 / G
)I D 5 / G
)I D 6 / G

P H0
P H1
P H2
P H3
P H4
P H5
P H6

VBA T

EXT GPIO
( P D )E G A D / G P E 1
( P D )E G C S #/ G P E 2
( P D )E G C L K / G P E 3

WAKE UP
PF0 (
PF1 (
PF2 (
PF3 (
PF4 (
PF5 (

PU
PU
PU
PU
PU
PU

)
)
)
)
)
)

( P D )W U I 5/ G P E 5
( P D )L P C P D # / W U I 6/ G P E 6

PWM/COUNTER
( P D )T A C H 0 / G P D 6
( P D )T A C H 1 / G P D 7
( P D )TM R I 0/ W U I 2 / G P C 4
( P D )TM R I 1/ W U I 3 / G P C 6

P W R S W /G P E4 ( P U )

CIR

( P D )C R X / G P C 0
( P D )C T X/ G P B 2

R I 1 # / W U I 0 / GP D 0 ( P U )
R I 2 # / W U I 1 / GP D 1 ( P U )

GP INTERRUPT
UART

( P D )L 80 H LA T/ G P E 0
( P D )R I N G # / P W R F A I L # / LP C R S T #/ G P B 7

R X D / GP B 0 ( P U )
T XD / GP B 1 ( P U )

1
12
27
49
91
113
1 22

-S I 0
-S I 1
-S I 2
-S I 3
-S I 4
-S I 5
-S I 6
-S I 7

4
5
6
8
11
12
14
15

KB
KB
KB
KB
KB
KB
KB
KB

-S I 0
-S I 1
-S I 2
-S I 3
-S I 4
-S I 5
-S I 6
-S I 7

4
5
6
8
11
12
14
15

C8 2 5

36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55

KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB

-S O0
-S O1
-S O2
-S O3
-S O4
-S O5
-S O6
-S O7
-S O8
-S O9
-S O1 0
-S O1 1
-S O1 2
-S O1 3
-S O1 4
-S O1 5

1
2
3
7
9
10
13
16
17
18
19
20
21
22
23
24

KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB

-S O0
-S O1
-S O2
-S O3
-S O4
-S O5
-S O6
-S O7
-S O8
-S O9
-S O1 0
-S O1 1
-S O1 2
-S O1 3
-S O1 4
-S O1 5

1
2
3
7
9
10
13
16
17
18
19
20
21
22
23
24

100
101
102
103
104
105
106

K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K

B -S I 0
B -S I 1
B -S I 2
B -S I 3
B -S I 4
B -S I 5
B -S I 6
B -S I 7
B -S O0
B -S O1
B -S O2
B -S O3
B -S O4
B -S O5
B -S O6
B -S O7
B -S O8
B -S O9
B -S O1 0
B -S O1 1
B -S O1 2
B -S O1 3
B -S O1 4
B -S O1 5

C8 8 8
C8 8 9
C8 9 0
C8 9 1
C8 9 2
C8 9 3
C8 9 4
C8 9 5
C8 9 6
C8 9 7
C8 9 8
C8 9 9
C9 0 0
C9 0 1
C9 0 2
C9 0 3
C9 0 4
C9 0 5
C9 0 6
C9 0 7
C9 0 8
C9 0 9
C9 1 0
C9 1 1

*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4
*. 1 U _ 1 6 V _ 0 4

VER.

RX

VOLTAGE

V1.0

X

3.3V

26.7K

2.4V

R 2 30

M OD E L _I D

V D D3
R 2 26
R 2 28

3G _ D E T #
C C D _ D E T#

CLOCK
CK 3 2 K E
CK 3 2 K

R 24 5

. 1 U _ 1 6V _0 4

*1 0 _0 4 P C L K _ K B C _R

V DD 3

C C D_ EN

21

S US B #
S US C #

1 7, 1 9 , 2 9
17

S US _ PW R_ A CK

L E D T H R OT T LE #

R 487
R 486
R 432

S MC _ B A T

AC
D2 8
BAV9 9

S MD _ B A T

AC
D2 9
BAV9 9

C P U _F A N S E N 2 1
V CO RE_ O N 3 3
M P W R OK 7 , 14 , 1 7

L E D _ CT RL
C T X0

L E D _ C T R L 21

A

B A T_ D E T

A

32

B A T _ V OL T

AC
D3 1
BAV9 9

B A T _ DE T

A
C

B A T _V OL T

AC
D3 0
BAV9 9

A

VD D3

NC 2
S HO RT

KBC_SPI_*_R = 0.1"~0.5"

512Kbit

19
112

S W I#

17

C H G_ E N

32

. 1 U _1 6 V _ 0 4
U 33
S P I_ V D D1

8

VD D

SI

5

K B C _ S P I _S I _R

2

K B C _ S P I _S O_ R

R3 0 6

SO
C K3 2 KE
C K3 2 K
R 26 5

R5 5 2

1 K _0 4

KBC _ FL ASH 3

W P#

*1 0 M_ 0 4
R5 5 1

1 5 P _ 50 V _ 0 4

C E#
S CK

3 2 . 76 8 K H z
1
2

1 U _ 1 0 V _ 06

C
32

R S M RST # 1 7
K B C _ R S T # 15

M C H _ TS A T N _ E C

B A T _V O L T _R
10 0 _ 1 % _0 4
C4 8 0

C

20

S MI #
17
S CI#
17
P W R _ B T N # 17

120
124

R2 2 3

C

W L A N _ D E T# 1 9
B T_ D E T # 2 3
D D _O N
27
3 G _ EN

1 0 K_ 0 4
4 .7 K_ 0 4
4 .7 K_ 0 4

17

A C _ P R E S E N T 17

W D T_ EN

X5
4
3
C 53 3

* 0 _0 4 Z 3 4 0 5

Sheet 26 of 42
KPC-ITE IT8502E

C5 0 2

35
17

2
128

1 0K _0 4
1 0K _0 4

*1 0 P _ 50 V _ 0 4

82
83
84

119
123

V DD 3

*2 6 . 7 K _ 04

RX

P CL K _ K B C

107

47
48

M740T
M740TU

1 0K _0 4

R 2 32

K B C_ S P I_ C E#
K B C_ S P I_ S I
K B C_ S P I_ S O

56
57
93
94
95
96
97
98
99

MODEL_ID

K B C_ S P I_ S C L K

C 85 2

LPC/WAKE UP

GI N T / GP D 5 ( P U )

C 92 4

PD
PD
PD
PD
PD
PD
PD

( P D )I D 7 / G P G1

N C1
R2 3 1

A V CC
(
(
(
(
(
(
(

WAKE UP

R 66 4

1 4 B RIG HT N E S S

3

26
50
92
114
12 1
127

PA0 (
PA1 (
PA2 (
PA3 (
PA4 (
PA5 (
PA6 (
PA7 (

I T 8 50 2 E

0_04 FOR IT8512CX/EX
0.1U_04 FOR ITE8512-J(ITE8502-J W/0 CIR)
EC Cost Down

( P D )K S O1 6 / G P C 3
( P D )K S O1 7 / G P C 5

3
4
1
2
6( P U )
7( P U )

PS/2

108
109

B T _E N
B K L_ E N

0/ G
1/ G
2/ G
3/ G
4/ G
5/ G
6/ G
7/ G

P S 2 CL K 0 /G
P S 2 DA T 0 /G
P S 2 CL K 1 /G
P S 2 DA T 1 /G
P S 2 CL K 2 /G
P S 2 DA T 2 /G

33

2 3 W E B _W W W #

23
14

PW M
PW M
PW M
PW M
PW M
PW M
PW M
PW M

KB
KB
KB
KB
KB
KB
KB
KB

B A T _V OL T

GPIO

L K 0 / GP B
A T 0 / GP B
L K 1 / GP C
A T 1 / GP C
L K 2 / GP F
A T 2 / GP F

PWM

18
21

27
PW R _ SW #
1 4 ,2 3
L ID_ S W #

F L F R A ME # / G P G2
F L A D 0/ S C E #
F LA D 1 / S I
F L A D 2/ S O
F L A D 3 / G P G6
F L CL K /S C K
( P D )F L R S T # / W U I 7 / T M/ G P G0

0
1
2
3
4
5
6
7

SMBUS
S MC
S MD
S MC
S MD
S MC
S MD

85
86
87
88
89
90

8 0 CL K
3 IN1
8 0 D E T#
PM E#
T P _ CL K
T P _ DA T A

IT8512E
FLASH

0 / GP I
1 / GP I
2 / GP I
3 / GP I
4 / GP I
5 / GP I
6 / GP I
7 / GP I

AVS S

19
19
19
16
21
21

110
111
115
116
117
118

MC
MD
MC
MD
MC
MD

A DC
A DC
A DC
A DC
A DC
A DC
A DC
A DC

58
59
60
61
62
63
64
65

75

1 U _ 6 . 3 V _ 04

LOW ACTIVE

AT
AT
P U _T H E R M
P U _T H E R M
GA _ T H E R M
GA _ T H E R M

S
S
S
S
S
S

32
SM C_ B A T
32
SM D_ B A T
3 S MC _C P U _T H E R M
3 S MD _C P U _T H E R M

0 / GP J 0
1 / GP J 1
2 / GP J 2
3 / GP J 3
4 / GP J 4
5 / GP J 5

ADC

66
67
68
69
70
71
72
73

B A T _D E T
B A T _V O L T _R
C UR _ S E N S E _ R
J M B _ D3 D
L A N _ OG P I O
3 G _ DE T #
C CD _ DE T #
M OD E L _ I D

3 G_ D E T #
C CD _ DE T #

DA C
DA C
DA C
DA C
DA C
DA C

J _K B 1
8 5 2 01 -2 4 0 51

4 . 7K _0 4 K B C _ H O L D # 7

H OL D #

VSS

1
6

R3 0 7
K B C _ S P I _C E # _ R
R3 0 5
K B C _ S P I _S C L K _ R
R3 0 8

K B C_ S P I_ SI
C5 6 5
K B C_ S P I_ SO
15 _ 1 % _ 04
C5 6 6
K B C_ S P I_ C E #
15 _ 1 % _ 04
C5 6 4
K B C_ S P I_ SC L K
47 _ 0 4
C5 6 7
47 _ 0 4

*3 3 P _ 5 0 V _0 4
*3 3 P _ 5 0 V _0 4
*3 3 P _ 5 0 V _0 4
*3 3 P _ 5 0 V _0 4

4

E N 2 5P 05 -5 0 GC P
C5 3 0
15 P _ 5 0 V _ 04

V D D3
3 .3 V
3 .3 V S

3, 1 5 , 1 9 , 2 3, 2 7 , 2 8 , 3 2
3, 1 4 , 1 5 , 1 6, 1 7 , 1 8 , 1 9, 2 0 , 2 1 , 2 2, 2 3 , 2 7 , 2 9, 3 0
2, 3 , 6 , 7 , 1 0 , 12 , 1 3 , 1 4 , 15 , 1 6 , 1 7 , 18 , 1 9 , 2 1 , 22 , 2 3 , 2 5 , 2 7, 3 3

S H OR T

L C D _ B R I GH TN E S S

* . 1 U _ 1 6V _0 4

K B C_ A G ND

KPC-ITE IT8502E B - 27

B.Schematic Diagrams

C P U _F A N

C4 8 4

DAC

76
E C _V GA _ A L E R T # 7 7
78
W L A N_ P W R
79
80
81

19 , 2 3 W L A N _E N
20
3 G_ P O W E R
25
K B C _ MU TE #

K S O 0 /P D0
K S O 1 /P D1
K S O 2 /P D2
K S O 3 /P D3
K S O 4 /P D4
K S O 5 /P D5
K S O 6 /P D6
K S O 7 /P D7
K S O 8/ A C K #
K S O 9 /B US Y
K S O1 0 / P E
K S O1 1 / E R R #
K S O1 2 / S L C T
K S O 13
K S O 14
K S O 15

E CS CI# /G P D3 ( P U )
E C S MI # / G P D 4 ( P U )

K B C _W R E S E T #

1 U _ 1 0 V _ 06
K S I0 /S T B #
K S I 1/ A F D #
K S I 2 / I N I T#
K S I3 /S L IN#
K S I4
K S I5
K S I6
K S I7

K/B MATRIX

GA 2 0 / G P B 5
K B R S T# / G P B 6 ( P U )
P W U R E Q # / GP C 7 ( P U )
L 80 L L A T / GP E 7( P U )

1 00 K _ 0 4

FOR
M740T

FOR
M760T
J _ KB2
8 52 0 1 -2 40 5 1

W R S T#

23
15

27
A P _K E Y #
2 3 W E B _E MA I L #

BEEP

LPC

126
4
16
20

15
GA 20
32
A C_ IN #
23
L E D _ A CIN #
3 T H E R M _A LE R T #

25

L A D0
L A D1
L A D2
L A D3
L P C C LK
L F RA M E #
S E R IRQ
L P C R S T #/ W U I 4 / G P D 2 ( P U )

V SS
VSS
VSS
VSS
VSS
V SS
VSS

P CL K _ K B C

V ST BY
VSTB Y
VST BY
VST BY
VST BY
V ST BY

U1 3
10
9
8
7
13
6
5
22

K B C_ W R ES E T #

20
21

11

M740T/TU

15
L P C _A D 0
15
L P C _A D 1
15
L P C _A D 2
15
L P C _A D 3
2
PC L K_ KBC
1 5 LP C _ F R A ME #
17
S E RI RQ
1 6 , 1 9 , 2 0, 2 2 B U F _ P L T _R S T #

21

K B C _ A GN D
E C_ V C C

V CC

0_04 for M760T/TU
BKP1005HS121_04 for
EMI Solution

R5 4 3

. 1 U _ 1 6 V _ 04

.

3 .3 V S

Schematic Diagrams

5VS, 3VS, 3.3VM, 1.05VS, V1N1
PD7
*SCS35
5V_S
A
C

(1)

VA

(8)

U8

VIN1
PC73

VDD3

PM O S
Q21

M_BTN#

PWR_SW#

I NSTANT-ON

7

DD_ON

6

PWR_SW#

5

GND

AP_KEY# 26

Q5
3
2N7002W

AP_KEY

23

(4)

(3)

M
_BTN#

*100K_04_S *.1U_16V_04_S

PR57
*10K_
04_S

(7)
Z3504

C

E

B

PQ10
*DTA114EUA_S

Q54
2N7002W

G

C403
S

R187

S

S

PR58

D

G
S

G

D

D

PWR-SWA
G

*100K_04_S

M
_BTN#

VIN1

VIN1
DD_ON_LATCH

Q16
*2N7002W_S

G

21

4

AP_KEY_C

Q
17
*2N7002W_S

DD_ON

DD_ON

26

VIN

PC72
*.1U_50V_06_S
Z3505

(5)
ON
DDON L TO H FROM EC

5V

5VS

SYS1
5V VDD5

3A
PR63

PQ39
SI4800BDY
8
7
3
6
2
5
1
4

SYS5V

NM O S
5V

3A

SYS15V VDD5

5V

Power Plane

R194

1M_
04
1M_04

Q
40
SI4800BDY
8
7
3
6
2
5
1
4

5VS

PR6
2
1
0K_04

DD_ON#

DD_ON#

21,30

C733

Z3506

.1U_16V_04

G

DD_O
N#
1

S

Q18
2N7002W

D

PC76
2200P_50V_04

D

Z3507

C423
2200P_
50V_04

26

G

SUSB

29, 3
0

S

1

PJ3

PJ21

PQ1
2
2
N7002W

PC75
*.1U_16V_04

PR60
100K_04

2

40mil

G

DD_O
N

S

D

PQ13
2N7002W

2

40mil

ON

3.3V
SYS15V VDD3

3A
PR140

3.3VS
PQ38
SI4800BDY
8
7
3
6
2
5
1
4

3.3V

1M
_04

NM O S

SYS15V
VDD3

3A
Power Plan e

R500
1M_04

3.3VS

Q
37
SI4800BDY
8
7
3
6
2
5
1
4

C732

C730

.1U_16V_04

10U_10V_08

R501

Z3508
PQ37
2N7002W

*100_1
%_
04

G

DD_ON#

Q20
2N7002W

D

C731
2200P_50V_04

D

D

Z3509
PC153

1000P_
50V_X7R_04
G

ON

B - 28 5VS, 3VS, 3.3VM, 1.05VS, V1N1

G
S

SUSB

S

S

B.Schematic Diagrams

R193
*33K_1%_04_S
Z3501
D

(6)

Q15
*2N7002W_S

Sheet 27 of 42
5VS, 3VS, 3.3VM,
1.05VS, V1N1

AP_KEY

VIN

P2808

S

PWR_SW#

3

G
R19
6
*330K_04_S

10K_04
PWR_SW#

D

R191

M_BTN#

PD6
*SCS35
5V_S
A
C

150mA

D *AO3409_SZ3502

S

8
VA

2

VIN

. 1U_50V_06

26

1

VA

(2)
VIN

Z351
0
Q36
*2N7002W

1. 05
VS
SYS5V
5V
3. 3V
VIN1
VIN
VA
VDD5
VDD3
5VS
3. 3VS
SYS15V

2,3,4,5,7, 9, 10
, 15,18,29,31
28,29,32
18,21,25,28,29,30,33
3,14,15,16,17,18,19,20,21,22,23,29,30
28
14,23,28,29,30,32
32
28
3,15,19,23,26,28,32
14,15,18,21,23,25
2,3,6,7,10,12,13, 14, 15, 16, 17, 18
, 19,21,22,23,25,26,33
14,28

Schematic Diagrams

POWER 3.3V/5V
V IN
C

P C 2 02
L GA T E 1
P C 2 15

P C 2 17

P C2 1 8

. 1 U _2 5 V _ X 7 R _ 0 6

. 1 U _2 5 V _ X 7 R _ 0 6

. 1 U _ 25 V _ X 7 R _ 0 6

VIN 1

P R 16 1

A

SY S5 V

PD2 5
Z 36 2 4
A
. 1 U _ 16 V _ 0 4

SCS3 5 5 V

PD2 4

SCS3 5 5 V

C

SY S1 0 V

2 .2 _ 0 4

PC2 0 1

P C 1 87
22 0 0 P _ 5 0 V _0 4
. 1 U _2 5 V _ X 7 R _ 0 6
L DO 5 V

6-06-00540-021
P C 2 19

P C2 2 0

P C 2 21

P C2 2 2

. 1 U _2 5 V _ X 7 R _ 0 6

. 1U _ 2 5V _X 7 R _ 0 6

. 1 U _2 5 V _ X 7 R _ 0 6

. 1 U _ 25 V _ X 7 R _ 0 6

C

A

PD2 3
Z 36 2 5
A

SCS3 5 5 V

PD2 2

SCS3 5 5 V

P C 2 00

PD2 0
F M0 5 4 0 -N

. 1U _ 1 6V _0 4

LD O5 V

C

A

P D2 1
C

F M 05 4 0 -N
A

C

SY S1 5 V
PC2 1 0

6-06-00355-061
PC 1 8 8

PC 1 9 2

P R 16 4

4 . 7 U _6 . 3 V _ 0 6

. 1 U _ 10 V _ X 7 R _ 0 4

*1 M _ 04

22 0 0 P _ 5 0 V _0 4

15

5
6
7

19

13

SW 2

Z3 613

PD 1 9

4

L GA TE 1

20

Z3 60 5

27

B G1

17

BG 2

P Q4 6
A O 4 46 8
4

L G A TE 2

8
F M5 8 2 2

1
2
3

A

6-06-05822-061

SY S3 V

5A 1

+
PR1 7 4

1 0 _ 04

SEN SE1 +

S E NS E 2 +

8

Z3 61 4

7

P C 2 03
1 0 00 P _ 5 0 V _ 0 4
Z3 61 5

P C1 9 9
10 0 0 P _ 5 0 V _ 04

PC 1 6 6

P R1 4 6

2 2 P _ 5 0V _0 4

10 5 K _ 1 % _ 06

S G ND 4

PR1 7 6

1 0 _ 04

PR1 8 3

4 7 K_ 0 4
P C2 0 5

P C 2 06

Z 3 60 8

Z3 60 6

28

2 2 0 P _ 5 0V _X 7 RZ_30640 7

2

SEN SE1 -

S E N S E 2-

E XT V C C

IT H1

3
VFB1

Z3 617

1 0 _ 04

P R1 7 0

Z3 61 1

1 0 K _ 04

25

PR1 6 9

16

P R1 5 1
2 0 K _ 1 % _ 04

10

5V

S G ND 4

D

S H OR T

* 10 K _ 0 4

*1 0 K _ 04

S GN D 4

P Q5 6
*2 N 70 0 2 W
G

*. 1 U _1 6 V _ 0 4
S

S GN D 4

P R 1 67

* 1 0m i l _ sh o rt L D O 5 V
Z3 62 3
1

P R 1 68
* 10 K _ 0 4

S GN D 4

PJ 2 4
4 0 m li

*1 0 0K _0 4
2

*0 _ 0 4

PR1 8 8
P C2 0 4

S GN D 4

P R 18 5
P C2 0 9

4, 3 3 V C OR E
2 7 , 2 9, 3 2 S Y S 5 V
1 8 , 2 1, 25 , 2 7 , 2 9 , 3 0, 3 3 5 V
4 , 1 0 , 1 5, 16 , 1 8 , 1 9 , 2 0, 2 9 1 . 5 V S
27
VD D5
3 , 1 5, 19 , 2 3 , 2 6 , 2 7, 3 2 V D D 3
27
VIN 1
1 4, 23 , 2 7 , 2 9 , 3 0, 3 2 V I N
2 , 3 , 4 , 5 , 7 , 9, 10 , 1 5 , 1 8 , 2 9, 3 1 1 . 0 5 V S
14 , 2 7 S Y S 1 5 V
1 4 , 1 5, 18 , 2 1 , 2 3 , 2 5, 2 7 5 V S

. 01 U _ 16 V _ 0 4

. 0 1 U _1 6 V _ 0 4

PR1 8 6
*0 _ 0 4

P R1 8 7

Z36 28

P C2 1 1

PJ 1 9
1
2

P R 1 81

P Q5 7
*2 N 70 0 2 W
G

S

S

2 2 0 0 P _ 50 V _ 0 4

P Q5 5
*2 N 7 0 0 2 W
G

D

D
S YS5 V
P C1 9 8

1 00 0 P _ 5 0 V _ 04

LD O 5V

6-02-03850-CQ0

S G ND 4

P C1 9 7

6 3. 4K _1 % _ 0 6

Z3 619

P U9
L T C 38 5 0
PIN 29 = SGND4

Z 3 6 22

6

1
Z 3 62 1

* 1 M_ 0 4

Z 36 2 0

P R1 7 3

*1 M _0 4

26

9
3 V EN

S GN D 4
P R1 7 2

4

VFB 2

5 V EN

VIN 2

P R 14 7

*1 0 0 P _ 5 0V _0 4

P GN D

3 . 32 K _ 1 % _ 0 6
V IN2

P C 16 7
4 7 K_ 0 4

* 10 0 P _ 5 0 V _ 0 4

F R E Q/ P L L F L T R
R UN 2

PR 1 6 0
* 0 _0 4

5A

S G ND 4

MO D E / P L LI N

IL IM

L D O5 V
20 K _ 1 % _ 0 6

Z 3 6 1 8 P R 18 4
P C 2 0 7 22 0 P _ 5 0 V _ X7 R _ 04
P C2 0 8

T K /SS 1

24

2

OP E N -5 m m

5V

IT H 2

T K /SS 2

Z3 61 0

* 1 0m i l _ sh o rt

P R1 5 2

S GN D 4

5

P R 1 78

* 10 m i l _s h o rt

P GO OD

R UN 1

12
PR 1 6 3

Z 3 6 1 6 P R 1 77

P J 15

Sheet 28 of 42
POWER 3.3V/5V

Z3627

1 0 _ 04

*1 0 0P _5 0 V _ 0 4
Z3 60 9

L D O 5V

11

P R 1 75

P C1 6 5

Z3 62 6

V D D3

. 1 U _ 10 V _ X 7 R _ 04

SW 1

P R 14 4
8 m _1 2

P C1 5 8

PD 1 8
F M5 8 2 2

15 0 u _ 6. 3V _D 2
25mohm_NEC

23

3
2
1

. 1 U _ 1 0 V _ X7 R _0 4

+ P C1 6 4

A

. 1 U _1 0 V _ X 7 R _ 0 4

PL 1 0
4 . 7 U H 5 . 5 A 6 . 8 *7 . 3 *3 . 5
1
2

P Q4 5
A O4 4 6 8

7
6
5

8
PC1 5 7

VI N

21

2 2 0 P _ 5 0V _X 7 R _ 0 4
Z3 60 4

2

VDD3

P Q4 7
A O4 4 6 8

C

1

O P E N -5 mm
P C 1 55

8

4

6-19-41001-242

6-13-R0080-13B

5A

2

. 1 U _ 1 0 V _ X 7R _ 0 4

TG 2

5
6
7

PJ 1 4
1

TG 1

Z3 612

PC 2 1 4

C

5A

P C 18 9

14

1
2
3

PL 9
4. 7 U H 5 . 5 A 6 . 8 * 7. 3 * 3 . 5

PR1 4 3
8 m_ 1 2

22

PC1 8 3
*4 . 7 U _2 5 V _ 0 8

25mohm_NEC
1 5 0 u _ 6. 3 V _ D 2

6-15-04800-7B1

SY S5 V

Z3 60 3

3
2
1

V D D5

.1 U_ 1 0 V _ X 7 R_ 0 4

4

P C1 8 2
4. 7 U _ 25 V _ 0 8

B O OS T 2

P Q4 4 8
A O 4 4 68

7
6
5

VDD5

B O OS T 1

PC 1 9 0

18

Z3 60 2

* 4 . 7 U _ 2 5 V _ 08

IN T VCC

4 .7 U_ 2 5 V _ 0 8

S GN D 4 S G N D 4

POWER 3.3V/5V B - 29

B.Schematic Diagrams

P C1 8 5

VIN 2

Z3 60 1
P C 1 84

Schematic Diagrams

POWER 1.5VS/1.05VS


D

PD17

+

6. 8K_1%_04

PQ40
MDS2659

1.05VS

PD16
4
PQ43
MDS2655

+

FM5822
PC156

5

6

7

8

.1U_10V_X7R_04

PC174
1U_10V_06

PR153
*10mil_sh ort

.1U_16V_04

Z37 08

17

1

1.05VS
2

8mm

+

PC172

4

A

PAD

PJ13

8A
220U_4V_D2

3

DL

Z37 07

*220U_4V_D2

VCC

Z370 6

V1.05

PC154

BST

2

C

1

PL7
BCI HP1040-2R5M-NL
1
2

5
6
7
8

LX

.1U_50V_06

2
3
1

16

PU7
SC412A

DH

N. C

2
3
1

Z3705

4
PC169

GND

PC171

RTN

N.C

FB

15

Z3704
VOUT

9

14

13
10

Z3703

N.C

ILI M

PGD

Z3702

N.C

220K_1%_04

17 1 .05VM_PWRGD

EN

11

PC228

5
6
7
8

S

12
PR149

PR154
10K_1%_04

PC170

PC173

PR155

.01U_16V_04

20P_50V_04

23. 7K_1%_06

1.8V

2.5A

1.5VS

5V
PC175

10U_10V_08

.1U_16V_04

PC161

PR1 59

100K_0 4

8
1

D

5V

PC180
27 ,30

SUSB

G

PQ50
2N7002W

PU8
VI N
VI N
POK

6

VOUT

4

VOUT

V1.5S

2.5A

1.5VS
PJ17
*OPEN_3mm
1
2

PR171
10K_04

3

EN
GND
AX6 610

SYS5V

1U_10 V_06
VCNTL

PC179
PC186

PC177

PC178

10U_10V_08

10 U_1 0V_08

.1U_16V_04

SUSB

82 P_50V_04
VFB

2
PR157
17.4K_1%_04
PR158

.1U_16V_04

PQ51
19 .6K_1%_06

G

2 N700 2W
S

17, 19,26 SUSB#

27,28,32
7,9,10, 12,13,30
14,23,27, 28,30,32
2 7,28
18, 21,25,27, 28,30,33
3, 14,15,16, 17,18,19, 20,21,22, 23,27,30
4, 10,15,16, 18,19,20
2,3,4,5, 7,9,10, 15,18,31

B - 30 POWER 1.5VS/1.05VS

SUSB

D

PC1 76

5
9
7

S

B.Schematic Diagrams

3.3V

PC227

PR145

PC213

FM0540- N

PC168
.1 U_1 0V_X7R_04

Sheet 29 of 42
POWER 1.5VS/
1.05VS

15U_25V_D

EN_1.05VM
PQ42
2N70 02W

G

C

SUSB

A

PR148
100K_1%_04

*4. 7U_25V_08

*4.7U_25V_08

5V

5V

SYS5V
1.8V
VI N
VDD5
5V
3.3V
1.5VS
1.05VS

PC196
.1U_16V_04

27,30

Schematic Diagrams

POWER 1.8V/0.9V
5V
3 .3 V

PR 6 6

P R 68

1 . 5 M _0 4

1 0_ 0 6

A

VIN

V D DQ

P D9

6
8

Z 3 80 5

9

10

Z 3 80 7

5

P C8 6

* 3 2 mi l _ s ho rt
PR 6 5

P R7 6
*1 5 m li _ s h or t

19 Z38 18

O P E N _2 A
+P C 1 8 1

P C 93

P R7 5

PC 9 5

PC 9 6

*2 0 K _ 1 % _ 0 6

.1 U_ 5 0 V _ 0 6
P C 81

*1 5 U _ 2 5 V _ D
P C 83

O P E N _8 A

C

5
6
7

5
6
7

2

PD 8

+P C 8 2

P C 15 9

P C1 6 0

*M D S 2 6 5 5

F M 5 8 22

2 2 0 U_ 4 V _ D2

.1 U_ 1 6 V _ 0 4

. 01 U _ 16 V _ 0 4

1 .8 V

Sheet 30 of 42
POWER 1.8V/0.9V

1 U _ 1 0 V _ 06
PG
PG
PG
PG

E N/P S V

11

*1 0 U _ 1 0 V _ 0 8 1 U _ 2 5 V _ 0 8

PJ 1 6
1

4
MD S 2 6 55

5V
P C8 4

V DD P 2
V DD P 2

1

*1 0 U _ 10 V _ 0 8 1 0 U _ 1 0 V _ 0 8 1 0 U _ 1 0 V _ 08

1 5 0 U_ 4 V _ B 2

4
20

V DD P 1

VTT
VTT

12
13

V DD Q
P C 89

P C 87

VSSA

14
15

8
P Q 14

A

VTT_ M EM

Z 3 80 9

1.5A

1

8
PQ 1 5

1
2
3

4

1.8V
11A

2 . 5 U H + / -2 0%

DL

1 U_ 1 0 V _ 0 6

1
2
3

10 0 0 P _ 5 0 V _ 0 4

+

V DD Q

PL 8

1 0 K _ 1 % _ 06
22 Z38 17

LX

*. 0 6 8 U _ 5 0 V _ 0 6

PJ 1 8

21 Z38 16

IL IM

V CC A

PC 9 0

VSS A

2

8P Q 4 1
M D S 26 5 9

4

.1 U_ 5 0 V _ 0 6

DH
Z 3 80 6

Z3815

4 .7 U_ 2 5 V _ 0 8

23 Z38 14

V T TS

VTT_MEM

P C8 5
. 1 U _ 1 0 V _ X 7R _ 0 4

P R 1 50

P C 80

P C9 2

P C 98

Z3813

* 3 2 mi l _ s ho rt

PC 2 2 6

24 Z38 12

BST

C O MP

*4 . 7 U _ 2 5 V _ 0 8

PR 6 4

FB
RE F

PC2 2 5

TO N

*. 1 U _1 6 V _ 0 4

1 U _ 10 V _ 0 6

1 .8 V _ P W RG D 1 7
VIN

Z 3 8 08
P C9 7

1 . 8 V _ P W R GD

1
2
3

PR 7 0
1 0 K _ 1 %_ 0 6

Z 3 80 3
Z 3 80 4

7

P GD

V DD Q S

V T TE N

N
N
N
N

25
18
16
17

D2
D1
D1
D2

PR 7 4

* 1 5 m li _ s ho rt

VSS A

S C4 8 6
P R1 6 6

1 .8 V E N

4 7 K _ 04
D

5V

PC 1 9 4
P Q5 3

G

D D _ ON #

D D _ ON #

. 1 U _ 16 V _ 0 4

2 N 70 0 2 W
S

2 1 ,2 7

P R 1 65
V T TE N

5V
D

1 0 0 K_ 0 4
P R 1 82

*1 0 0 K _ 04

PC 1 9 3
P Q5 2

Z 38 1 9

*0 _ 0 4

G

. 1 U _ 16 V _ 0 4

2 N 70 0 2 W
S

1

D

P R1 8 0

PQ 5 4
G

SL P_ S4 #

* 2 N7 0 0 2 W

H1 1
2
3
4
5

2 7 ,2 9

SU SB

9
8
7
6

2
3
4
5

H1 4
1

9
8
7
6

MT H 3 15 D 1 11

2
3
4
5

M T H 3 1 5 B 2 17 D 1 11

H1 0
H 9
H 35
H3 4
C 1 5 8 D 1 5 8 C 1 58 D 1 58 C 1 5 8 D 1 5 8 C 1 5 8 D 1 5 8

M3
M-M A R K 1

M 14
M -MA R K 1

M5
M -M A R K 1

M8
M-M A R K 1

H 29
1

MT H 31 5 D 1 11

H 22
C 2 3 7D 1 4 6

M2
M -MA R K 1

*1 0 m li _ s h or tZ 3 8 1 0

P R1 7 9

H2 8
1

4 0 m il
2

S

17

PJ 2 2

M7
M -M A R K 1

9
8
7
6

2
3
4
5

H 31
1

9
8
7
6

MT H 31 5 D 1 11

2
3
4
5

H 12

M1
M -MA R K 1

2
3
4
5

MT H 31 5 D 11 1

H2 4
H 21
H 23
C 2 1 7 D 1 1 1 C 21 7 D 11 1 C 2 7 6D 1 5 8

M1 1
M-M A R K 1

9
8
7
6

1

M 13
M -M A R K 1

MT H 31 5 D 11 1

H 19
C 2 76 D 1 5 8

M1 0
M-M A R K 1

H 17
1

9
8
7
6

2
3
4
5

H 27

MT H 3 1 5 D 11 1

H 18
H2 6
H2 5
C 2 76 D 1 5 8 C 2 3 7 D 1 4 6 C 2 3 7 D 1 4 6

M9
M- MA R K 1

M 12
M -MA R K 1

9
8
7
6

1

M6
M-M A R K 1

2
3
4

9
8
7

MT H 3 15 D 1 11 _ N 5 6

H1 3
C 6 7 D 67

M4
M-M A R K 1

H 20
1

H 30
C 6 7D 6 7

2
3
4
5

H 33
1

9
8
7
6

2
3
4
5

M T H3 1 5 D1 1 1

H 6
H 7
C 3 5 4B 3 15 D 1 85 C 23 7

H 32
9
8
7
6

1

M T H3 1 5 D1 1 1

H 8
C 237

H 5
C 23 7

H4
C2 3 7

2
3
4
5

H 16
9
8
7
6

1

2
3

9
8
1

M T H3 1 5 D1 1 1

MT H 31 5 D 11 1 _ N 4 5 6 7

H 3
C 237

H1
S MD 7 9 X1 7 7 R

H 2
C 19 7

H 38
C 2 95 D 1 65

1 4 , 2 3 , 27 , 2 8 , 2 9 , 3 2
1 8 , 2 1 , 2 5 , 27 , 2 8 , 2 9 , 3 3
3, 14 , 1 5 , 1 6 , 1 7, 18 , 1 9 , 2 0 , 2 1 , 22 , 2 3 , 2 7 , 2 9
7 , 9 , 10 , 1 2 , 1 3 , 2 9
1 2, 13

V IN
5V
3 .3 V
1 .8 V
V T T _M E M

H 40
C 2 7 6B 1 46 D 1 26

POWER 1.8V/0.9V B - 31

B.Schematic Diagrams

10_06

2

1 U _1 0 V _ 0 6

1 0_ 0 4

Rb

3

Z 3 80 2

5
6
7

1U _ 1 0 V _ 06

P R7 2

P R7 3

Z 3 80 1
PC 8 8

.

1 00 P _ 5 0 V _ 0 4

10_06

P C9 4

PR 6 9
2 . 2 K _ 1 % _0 6

C

P R6 7

Ra

P C9 1

PR 7 1
1 0 0 K_ 0 4

F M0 5 4 0 -N

P U3

Schematic Diagrams

POWER GPU/NVVDD

VGFX_CORE
PJ 11
1. 05VS

1

2

V GFX_C OR E

. 0 1U _ 1 6V _0 4

. 0 1U _ 1 6V _0 4

. 01 U _ 1 6V _0 4

. 01 U _ 16 V_ 0 4

. 01 U _ 16 V_ 0 4

P C7 0

PC 1 5 0

PC 7 1

PC 1 4 9

Sheet 31 of 42
POWER GPU/
NVVDD

PC 1 4 8

B.Schematic Diagrams

OP EN _5A

2, 3,4, 5, 7,9, 10, 15, 18, 29 1. 05V S
9

B - 32 POWER GPU/NVVDD

VGF X_C OR E

Schematic Diagrams

AC_IN, CHARGE
P R3 2

PQ 2 5

V A

A
F M0 5 4 0 -N

P C 41

PC1 7

P C 16

4. 7U _ 2 5V _0 8

4 . 7 U _ 2 5 V _ 08

1
2
3
4
5
6
7
8

Z4037
Z 4 0 09
Z4011
P R 19 7

P R 94
2 0 K _ 1 % _0 4

1 0 K _ 1% _ 0 4
PR 9 5

S G ND 5 P R 1 2

* 0_ 0 4

PR 2 1

* 0_ 0 4

PC 5 5

. 1 U _ 50 V _ 0 6

Sheet 32 of 42
AC_IN, CHARGE

VA

32
31
30
29
28
27
26
25
VC C
-I N C 1
+ INC 1
A C IN
A C OK
-I N E 3
AD J 1
C O MP 1

C TL2
CB
O U T -1
LX
VB
O U T -2
P G ND
CE L L S

P U1

TRERMAL PAD
-I N E 1
OU T C 1
O UT C 2
+ INC 2
-I N C 2
AD J 2
CO M P 2
C O MP 3

* . 1 U _ 5 0 V _0 6

P C 11 6

S G ND 5

P C 2 2 . 1U _ 5 0V _0 6
V IN
CT L 1
G ND
VREF
R T
CS
AD J 3
BATT
S G ND

24
23
22
21
20
19
18
17
33

C TL
Z
Z
Z
Z
Z

P C 18

. 1U _ 5 0V _0 6

40 1 7
40 1 8 P R 1 9 4
40 1 9 P C 1 0 2
40 2 0
40 2 1

3 9 . 2 K _ 1% _ 0 4
. 1 U _1 6 V _ 0 4
P C2 5
S GN D 5

P R9 7

P R3 0

1K _1 % _ 0 4

1 00 K _ 1 % _ 0 4

9
10
11
12
13
14
15
16

MB 3 9 A 1 3 2

1 0 K _ 1 % _0 4

B A T_ V O L T 2 6

.1 U_ 5 0 V _ 0 6

1 U_ 2 5 V _ 0 8

Z 4 00 8
Z4034
Z 4 0 04
Z 40 0 6
Z4007

VA
P C1 1 7
*. 1 U _5 0 V _ 0 6

PC 6

.1 U_ 2 5 V _ X 7 R_ 0 6

C
P D3

. 1 U _ 5 0 V _ 06

P R 1 93
0 _ 04

P Q2 6 B
A O4 9 3 2

S G ND 5
P C 1 15
. 0 1 U _ 5 0 V _ X7 R _ 04
Z 4 0 22

B

S GN D 5

Z40 33

PR 1 5

PC 2 9

6 . 0 4 K _ 1% _ 0 4

.1 U_ 1 6 V _ 0 4

S G ND 5

P R 1 96
P R 1 98

* 1 0m i l _ sh o rt
* 1 0m i l _ sh o rt

P C1 2 3

D

PR9 6
PC 3 1

10 K _ 1 % _ 0 4

* 2 2P _5 0 V _ 0 4

2 7. 4 K _ 1 % _ 0 4

P Q4
MT N 70 0 2 Z H S 3
PC2 7

S

S YS5 V

G

P R9 8
10 0 P _ 5 0 V _ 04

PR32 = 17.4K OFTUN

PR 1 7

2 2 K _ 1% _ 0 4

10 0 0 P _ 5 0 V _ 04

S G N D5
PC1 2 0
10 0 0 P _ 5 0V _0 4

V DD 3
S GN D 5
PR 1 1

Battery Voltage:
9V~12.6V

1 0 K _ 04
S YS5 V
26

Z4 002

G

26
26
26

1 0 0 K_ 0 4

PL 1 2
PL 2
PL 1 1

S M C_ B A T
S M D_ B A T
B A T _ DE T

H C B 1 0 0 5K F -1 2 1T 2 0
H C B 1 0 0 5K F -1 2 1T 2 0
H C B 1 0 0 5K F -1 2 1T 2 0

C TL
D

P R1 9 9
20 0 K _ 0 4

PQ 6
SYS5 V

P R4 2

1 00 K _ 0 4

Z 4 02 8

P C 1 12

P C1 1 3

P C 11 4

3 0 P _ 50 V _ 0 4

3 0 P_ 5 0 V_ 0 4

3 0P _5 0 V _ 0 4

G
M T N7 0 0 2 Z HS 3
P R 34

S

D

PR 9 1
* 1 5m i l _ sh o rt

P R 90
* 15 m i l _s h o rt

1
2
3
4
5
6
7
8
9
G ND 1
G ND 2
B A T CO N

* 15 m i l _s h o rt

PQ 7
26

C H G_ E N

1

G
M TN 7 0 02 Z H S 3

PJ 1
1m m

SG ND 5

2

1 M _ 04

S

P R 1 89

P R3 7

S

VA

P Q3
MT N 70 0 2 Z H S 3

J B A TT A 1

Z40 35
Z40 36
Z40 29
Z40 30
Z40 31

D

A C_ IN #

V IN
SY S5 V
V D D3
VA

V IN

PC 9 9
.1 U_ 5 0 V _ 0 6

P C4 6

PC1 0 0

PC 4 7

. 1 U _ 5 0 V _ 06

. 1 U _ 5 0 V _ 06

. 1 U _5 0 V _ 0 6

1 4 , 2 3 , 2 7 , 28 , 2 9 , 3 0
2 7 ,2 8 ,2 9
3 , 1 5 , 1 9 , 2 3, 26 , 2 7 , 2 8
27

AC_IN, CHARGE B - 33

B.Schematic Diagrams

P R1 9 5
0_ 0 4

* 1 0 mi l _ s ho rt

Z 4 01 6

E

P C 54

P R 25
PR 2 2
*1 0 m i l_ s h o rt

P C3 0

BAT

BAT
B AT

.1 U_ 5 0 V _ 0 6

Z40053

PR 1 6
3 0 K _ 1 % _0 4

PC 2 4

PC 1 4

1 0 K _ 1 % _0 4

PQ 5
P D TA 11 4 E U
C Z4032

Total Power 60W

.1 U_ 5 0 V _ 0 6

P C 12

PR 1

S GN D 5

4 .7 U_ 2 5 V _ 0 8

P R1 3 9
2 0 0 K _ 1 % _0 4

PR 1 9 2
1 0 0 K_ 0 4

PC 5

. 1 U _ 5 0 V _ 06

4

P C1 0 1

1 0 K _ 08

Charge Voltage 12.6V

PR 9 2
2 0 m _ 20

8

PR 7 8

. 1U _ 5 0V _0 6

4 .7 U_ 2 5 V _ 0 8

P C3

. 1 U _5 0 V _ 0 6

Charge Current 2.0A

2A

7
PC 2 3

1 3 0 K _ 04
PC 2

2 0 m_ 2 0

4 .7 U_ 2 5 V _ 0 8

P R7 7

P L5
4 . 7 U H 5 . 5 A 6 . 8 *7 . 3 *3 . 5
PC 4

PR 2

3
2
1
4

P Q 26 A
A O 4 9 32
2
1

5
6

8
7
6
5

4
1
2
3

4 .7 U_ 2 5 V _ 0 8

P Q1 6
P 20 0 3 E V G

4 . 7 U _ 2 5 V _ 08

V A

PL 1
H C B 4 5 3 2 K F -8 0 0 T6 0

4 . 7 U _ 2 5 V _ 08

J _D C -JA C K 1
2 D C -G2 1 3 -B 2 0 0
Z4 001
1
2
G N D1
G N D2
G N D3
G N D4

PC 1 9

0_04
VIN

*P 20 0 3 E V G
4
1
5
2
6
3
7
PQ 2
8
P2 0 0 3 EVG
5
6
7
8

Schematic Diagrams

VCORE
VIN

5V

A

1 0 0 0 P _5 0 V _ 0 4

P C4 4
PD 4
1 U _2 5 V _ 0 8
F M 0 54 0 -N

PR 4 8
VIN

B S T1

1 0 _ 06

C

1 0 0_ 1 % _ 04

V -R C 1

PC 3 9

P C 1 25

D P R S L _S TP
E N _ V C OR E
DP R S L
VPN 1

1
2
3

V C OR E

1 5 n_ 1 0 V _ X 7R _ 04
TG 1

PQ 2 3
I R F 7 8 32 Z T R P B F

1
2
3
1 U_ 2 5 V_ 0 8

DR N1

C

5
6
7

CS1 N

A

*3 2 m il _ s h ort

P R 86

*3 2 m il _ s h ort
P C1 0 8
+

1 50 0 P _ 5 0 V _ 06

1 0 0 P _ 50 V _ 0 4

5
6
7

P C 15
. 1 U _5 0 V _ 0 6

. 1 U _5 0 V _ 0 6

P Q2 8
I R F 7 8 32 Z T R P B F

Z 41 1 0

P Q2 9
I R F 78 3 2 Z T R P B F

* 3 2m i l _ sh o rt

SG ND 3

1 5 U_ 2 5 V _ D

22A
PL 4

8

8

C

5
6
7

0. 5U H
P D1 4
4

P R 26
1 0 _0 6

4
F M5 8 2 2

PC 3 8
Z 4 1 08

A

A
F M0 5 4 0 -N

PR1 1 1

1 0 00 p _ 5 0V _X 7 R _ 0 6

C

V -R C 2

*3 3 0 U _ 2 . 5 V _D

P Q2 7
I R F 7 4 13 Z P B F

5V

PD 2

P C 1 30
+

3 3 0 U _ 2 . 5V _D

8
C A R 4 0 0 L1 6 M

1
2
3
* 20 m i l_ s h o rt

P C1 1 8
+

P C1 1 1
+

P C 11

DR N2

1 00 0 P _ 5 0 V _0 4

PR2 7

TG 2
BG 2
D RN 2

P R 84

CS2 N

PR 2 4

1 K _ 1 %_ 0 4

PC 1 3

1
2
3

S GN D 3S GN D 3S G N D 3S G N D 3

10 0 0 p _5 0 V _ X 7 R _ 0 6

. 01 5 U _5 0 V _ 0 6

1U _ 2 5V _ 0 8

*1 0 0 P _ 5 0V _ 0 4

1 0 0_ 1 % _ 04

P C4 5

P C5 7

3 .3 VS

P C 56

CS2 P

* 33 0 U _2 . 5 V _ D

4

V CO RE _ V R E F

7. 5 K _ 1 % _ 04

PC1 5 1
+

3 3 0 U _ 2 . 5V _D

V IN

S GN D 3
P R3 6

P C 58

*1 0 0 P _ 50 V _ 0 4

*6 8 0 _0 4

*1 0 0P _ 5 0 V _ 0 4

D RPD RP+
P R9 9

P C1 2 9
+

3 3 0U _ 2 . 5V _D

3 3 0U _ 2 . 5V _D

P C3 6

Z 4 1 01
FB+
FB-

P C1 5 2
+

E -R C

P C 28

*1 0 m il _ s ho rt
10 _ 0 4
10 _ 0 4

Z 4 1 13
PC1 1 0

D AC
V C_ S S

0. 5 U H

P R8 5
10_06

Z 41 0 9
V CC A

PC 5 9

G ND
P R4 5
P R3 1
P R3 5

P C 1 2 6 * 10 0 P _ 5 0 V _ 04

7 ,1 7 DE L A Y _ P W RG D
4
V C CS E N S E
4
VSSSEN SE
3
P SI#

D E L A Y _P W R G D
VCC SE N SE
VSSSEN SE
PS I#

45

P R 40
1 K _ 04

SC452

C S1 N
C S2 N

PC1 3 1

3 .3 V S

S GN D 3

PU5

33
32
31
30
29
28
27
26
25
24
23

PC1 2 8

1 0 0 0 P _ 50 V _ 0 4

ID6
ID5
ID4
ID3
ID2
ID1
ID0

1 U _2 5 V _ 0 8

PC 3 2

_V
_V
_V
_V
_V
_V
_V

8

P C4 3

1 3 0 K _ 1% _ 0 6

H
H
H
H
H
H
H

44A

4

. 1 U _ 5 0 V _0 6

C S1 +
C S 1C S 2C S2 +
E R R OU T
VC CA
A GN D
D AC
SS
D RP +
D RP -

PC 3 5

1 0 0 P _ 5 0V _ 0 4

4
4
4
4
4
4
4

P R 14

1 0 0 0 P _5 0 V _ 0 4

PC 3 4

13 0 K _ 1 % _0 6

CL K E N #
VREF
HY S
CL S E T
V ID6
V ID5
V ID4
V ID3
V ID2
V ID1
V ID0

P C3 7

3 5 7K _1 % _ 0 6

C L K EN# 1
V C OR E _ V R E F 2
V C OR E _ H Y S 3
V C OR E _ C L S E T 4
5
H _ V ID6
H _ V ID5
6
H _ V ID4
7
H _ V ID3
8
H _ V ID2
9
H _ V I D 1 10
H _ V I D 0 11

P W R GD
V P N2
V IN 2
B ST2
TG 2
DR N2
BG 2
V 5 _2
P S I#
F B+
F B-

4 7 K _ 1% _ 0 4

P R 20

C LK E N #

12
VPN 2 1 3
14
15
16
17
18
19
20
21
22

P R 23

17

8

4

F M5 8 2 2

. 0 1U _ 50 V _ 0 4

1 0 0 P _ 5 0V _ 0 4

PR 1 9

PC 3 3

5
6
7

44
43
42
41
40
39
38
37
36
35
34

PR 1 3

Sheet 33 of 42
VCORE

22A

PL 3

P D1 3
PC4 2

DP R SL
VP N1
VIN 1
B ST1
TG 1
DR N1
BG 1
V 5 _1
EN
PR ST P#
I SH

PR 1 0 2
6 8 0 _0 4

P Q2 4
I R F 78 3 2 Z T R P B F

D RN 1
B G1
IS H

3 . 3V S

VCORE

Z4 10 2

7 . 5K _1 % _ 0 4

close to IMVP6

. 1 U _5 0 V _ 0 6

P Q 22
I R F 7 4 1 3Z P B F

1
2
3

4 9 9_ 1 % _ 0 4

*2 0 m il _ s ho rt

5
6
7

0 _ 04

P R 18

.0 1 U_ 2 5 V _ 0 4

1
2
3

P R 10 4

P M_ D P R S L P V R

PC 9

. 1U _ 50 V _ 0 6

4

.

V IN

BST2
V C _S S
3 .3 V S

5V

E N _ V C OR E

PR1 1 3
D

D RN 1

10 0 K _ 0 4

P R 38

P C6 0

1

PR1 0 6

C S1 N

N TC _ 1 00 K _ 0 6

D CR _ DR 1

4 7 K_ 0 4

D RP +

P R4 6

4 7 K_ 0 4

PR 3 9

PC 1 3 4

D RN 2

P R 10 9

P C1 2 7

PR4 1

3 3n _ 1 6 V _ X7 R _0 4

6 8 0P _5 0 V _ X 7R _ 0 4

D P RS L

D RP -

P R1 1 2

1 7. 4K _ 1 % _ 04

RT 1
P R 1 07

DR P _ L 2 2

2 8K _ 1 % _ 04

* 0 _0 4
D P RS L _ S T P

1

C S2 N

P R 11 0

S

S G ND 3
Z 41 0 4 G

P Q3 1
*A O 34 1 4

*0 _ 0 4

N T C _ 1 0 0 K _0 6

* . 1U _ 1 6V _ 0 4

4
V C OR E
2 , 3 , 6, 7 , 1 0 , 1 2 , 13 , 1 4 , 1 5 , 16 , 1 7 , 1 8 , 19 , 2 1 , 2 2, 23 , 2 5 , 2 6, 27 3 . 3 V S
18 , 2 1 , 2 5, 27 , 2 8 , 2 9, 30 5 V
14 , 2 3 , 2 7, 28 , 2 9 , 3 0, 32 V I N

B - 34 VCORE

P Q 32
* 2N 7 00 2 W

Z 4 1 0 5G

P Q 33
* 2N 7 00 2 W

G

3

1 3 K _ 1 % _0 6

4 7 K_ 0 4

S

1

4 0 m il

Z 41 0 7

2

D
PC 1 2 4

S
P J1 0
P Q3 6
2N 7 0 02 W

G

PU 6
* 74 A H C T 1 G0 2 G W

1
Z 41 0 6

PC 1 3 3
*2 2 n _1 6 V _ X 7R _ 0 4

Z 41 1 1

4

P R1 0 8

*2 2 n_ 1 6 V _ X7 R _ 04

S

DC R_ DR 2

. 1 U _1 6 V _ 0 4

D

*1 0 K _ 0 4

2
D
V C O R E _ ON

* 10 K _ 0 4

G
2 N 70 0 2 W

26

P R 1 05

*1 0 K _ 04

C LK E N #

4 7 K_ 0 4

P C 1 32
PC 6 3

PR1 0 1

PR1 0 3

3 3n _ 1 6 V _ X7 R _0 4

1 7. 4K _ 1 % _ 04
P Q3 4

Z 4 10 3

DR P _ L 1 2

2 8K _ 1 % _ 04

5

1 0 K_ 0 4

D

RT 2
PR 4 3
PR4 4

5V

S

B.Schematic Diagrams

7 , 1 7 P M _D P R S L P V R

H _ DP R S T P #

. 1 U _5 0 V _ 0 6
Z4112

PC 8

8

P R1 0
1 U _ 2 5 V _ 08
PR 2 9

3, 7 , 1 5 H _D P R S TP #

5
6
7

P C4 0

*0 _ 04

PC7

.

PR1 0 0

PR 2 8

P C 10

Schematic Diagrams

ODD BOARD FOR M760T
V IN

5V

A

1 0 0 0 P _5 0 V _ 0 4

P C4 4
PD 4
1 U _2 5 V _ 0 8
PR 4 8

F M 0 54 0 -N

VIN
B S T1

1 0 _ 06

C

1 0 0_ 1 % _ 04

V -R C 1

D P R S L _S TP
E N _ V C OR E
DP R S L

1 5 n_ 1 0 V _ X 7R _ 04
TG 1

1
2
3

1 0 0 0 P _5 0 V _ 0 4

DR N1

C

5
6
7

A

P R 86

*3 2 m li _ s h ort
P C1 0 8
+

1 50 0 P _ 5 0 V _ 06

1 0 0 P _ 50 V _ 0 4

PC 1 3

P C 15

P R1 1 1

* 3 2m i l _ sh o rt

. 1 U _5 0 V _ 0 6

. 1 U _5 0 V _ 0 6

S G ND 3

1 5 U_ 2 5 V _ D

P Q2 7
I R F 7 4 13 Z P B F

P Q2 8
I R F 7 8 32 Z T R P B F

Z 41 1 0

P Q2 9
I R F 78 3 2 Z T R P B F

22A
PL 4

8

C

5
6
7

8

0. 5U H
PD1 4

4

P R 26
1 0 _0 6

4
F M5 8 2 2

PC 3 8
Z 4 1 08

A

1
2
3

1 U _2 5 V _ 0 8

A
F M0 5 4 0 -N

*3 3 0 U _ 2 . 5 V _D

1 0 00 p _ 5 0V _X 7 R _ 0 6

C

V -R C 2

P C 1 30
+

3 3 0 U _ 2 . 5V _D

P C1 1 1
+

P C 11

5V

PD 2

P C1 1 8
+

8
C A R 4 0 0 L1 6 M

1
2
3
* 20 m i _l s h o rt

Sheet 34 of 42
CLICK FINGER
BOARD FOR M77

CS 1 N

*3 2 m li _ s h ort

CS 2 N

PR 2 4

1 K _ 1 %_ 0 4

1 U_ 2 5 V _ 0 8

1 00 0 P _ 5 0 V _0 4

P R2 7

PC 3 5

1 0 0_ 1 % _ 04

TG 2
BG 2
D RN 2

P R 84

. 01 5 U _5 0 V _ 0 6

1U _ 2 5V _ 0 8

*1 0 0 P _ 5 0V _ 0 4

S GN D 3S GN D 3S G N D 3S G N D 3

P C 56

CS2 P

* 33 0 U _2 . 5 V _ D

4

V CO RE _ V R E F

7. 5 K _ 1 % _ 04

P C1 5 1
+

3 3 0 U _ 2 . 5V _D

V IN

S GN D 3
P R3 6

P C 58

P C4 5

P C5 7

3 .3 VS

P C 1 2 6 * 10 0 P _ 5 0 V _ 04

*1 0 0 P _ 50 V _ 0 4

*6 8 0 _0 4

10 0 0 p _5 0 V _ X 7 R _ 0 6

DR N2

D RP D RP +
PR9 9

P C1 2 9
+

3 3 0U _ 2 . 5V _D

3 3 0U _ 2 . 5V _D

5
6
7

Z 4 1 01
FB+
FB-

P C1 5 2
+

E -R C

P C3 6

*1 0 m li _ s ho rt
10 _ 0 4
10 _ 0 4

Z 4 1 13
P C1 1 0

D AC
V C_ SS

0. 5 U H

P R8 5
10_06

Z 41 0 9
V CC A

P C 28

PR4 5
PR3 1
PR3 5

*1 0 0P _ 5 0 V _ 0 4

7 ,1 7 DE L A Y _ P W RG D
4
VC CSEN SE
4
VSSSEN SE
3
P S I#

D E L A Y _P W R G D
V CC S E N S E
VSSSEN SE
PSI#

45

P R 40
1 K _ 04

SC452

C S1 N
C S2 N

PC 5 9

3 .3 VS

S GN D 3

PU5

33
32
31
30
29
28
27
26
25
24
23

P C1 3 1

ID6
ID5
ID4
ID3
ID2
ID1
ID0

. 1 U _ 5 0 V _0 6

C S1 +
C S 1C S 2C S2 +
E R R OU T
VC CA
A GN D
D AC
SS
D RP +
D RP -

. 0 1U _ 50 V _ 0 4

1 3 0 K _ 1% _ 0 6

_V
_V
_V
_V
_V
_V
_V

P C3 7

1 0 0 0 P _ 50 V _ 0 4

H
H
H
H
H
H
H

G ND

PC 3 2

4
4
4
4
4
4
4

P R 14

PR 1 9

1 0 0 P _ 5 0V _ 0 4

CL K E N #
VREF
HY S
CL S E T
V ID6
V ID5
V ID4
V ID3
V ID2
V ID1
V ID0

P C1 2 8

3 5 7K _1 % _ 0 6

PC 3 4

C L K E N#
1
V C OR E _ V R E F 2
V C OR E _ H Y S 3
V C OR E _ C L S E T 4
5
H _ V ID6
6
H _ V ID5
7
H _ V ID4
8
H _ V ID3
9
H _ V ID2
10
H _ V ID1
11
H _ V ID0

8

4

PC4 3

C LK E N #

P W R GD
V P N2
V IN 2
B ST2
TG 2
DR N2
BG 2
V 5 _2
P S I#
F B+
F B-

17

8

4

F M5 8 2 2

12
VPN 2 1 3
14
15
16
17
18
19
20
21
22

13 0 K _ 1 % _0 6

44A

.

P R 20

1 0 0 P _ 5 0V _ 0 4
4 7 K _ 1% _ 0 4

5
6
7

44
43
42
41
40
39
38
37
36
35
34

PR 1 3
PC 3 3
P R 23

22A

PL 3

P D1 3
P C4 2

DP R S L
VP N1
VIN 1
B ST 1
TG 1
DR N1
BG 1
V 5 _1
EN
PR ST P#
I SH

PR 1 0 2
6 8 0 _0 4

P Q2 4
I R F 78 3 2 Z T R P B F

D RN 1
B G1
ISH

3 . 3V S

VCORE
V C OR E

PQ 2 3
I R F 7 8 32 Z T R P B F

V IN

BST2
V C _S S
3 .3 VS

5V

D

D RN 1

P R 38

PC6 0

1

4 7 K_ 0 4

D RP +

P R4 6

4 7 K_ 0 4

PR 3 9

PC 1 3 4

D RN 2

P R 10 9

PC1 2 7

P R4 1

3 3n _ 1 6 V _ X7 R _0 4

D
6 8 0P _5 0 V _ X 7R _ 0 4

1 3 K _ 1 % _0 6

D P RS L

D RP -

P R1 1 2

RT 1
P R 1 07

DR P_ L 2 2

2 8K _ 1 % _ 04

D P RS L _ S T P
1

C S2 N

P R 11 0

P Q 32
* 2N 7 00 2 W

Z 4 1 0 5G

* 0 _0 4

4 7 K_ 0 4

1 7. 4K _ 1 % _ 04

Z 41 0 7

P Q 33
* 2N 7 00 2 W

G

2

S G ND 3
Z 41 0 4 G

P Q3 1
*A O 34 1 4

*0 _ 0 4
S

S

1

4 0 m li

PU 6
* 74 A H C T 1 G0 2 G W

1
Z 41 0 6

PC 1 3 3
*2 2 n _1 6 V _ X 7R _ 0 4

S

PC 1 2 4

S

D

P J1 0
P Q3 6
2N 7 0 02 W

G

*2 2 n_ 1 6 V _ X7 R _ 04

D

DC R_ DR 2

*1 0 K _ 0 4

. 1 U _1 6 V _ 0 4

Z 41 1 1

4

P R1 0 8

2

2 N 70 0 2 W

V C O R E _ ON

* 10 K _ 0 4

G

Z 4 10 3

26

P R 1 05

*1 0 K _ 04

C LK E N #

4 7 K_ 0 4
D CR _ DR 1

P R1 0 6

P C 1 32
PC 6 3

P R1 0 1

P R1 0 3

3 3n _ 1 6 V _ X7 R _0 4

1 7. 4K _ 1 % _ 04
P Q3 4

C S1 N

N TC _ 1 00 K _ 0 6

S

P R1 1 3
10 0 K _ 0 4

DR P_ L 1 2

2 8K _ 1 % _ 04

5

E N _ V C OR E

3

1 0 K_ 0 4

D

RT 2
PR 4 3
P R4 4

5V

N T C _ 1 0 0 K _0 6

* . 1U _ 1 6V _ 0 4

4
V C OR E
2 , 3 , 6, 7 , 1 0 , 1 2 , 13 , 1 4 , 1 5 , 16 , 1 7 , 1 8 , 19 , 2 1 , 2 2, 23 , 2 5 , 2 6, 27 3 . 3 V S
18 , 2 1 , 2 5, 27 , 2 8 , 2 9, 30 5 V
14 , 2 3 , 2 7, 28 , 2 9 , 3 0, 32 V I N

ODD BOARD FOR M760T B - 35

B.Schematic Diagrams

VPN 1

close to IMVP6

. 1 U _5 0 V _ 0 6

Z4102

7 . 5K _1 % _ 0 4

1
2
3

4 9 9_ 1 % _ 0 4

5
6
7

0 _ 04

P R 18

PC 9

.0 1 U_ 2 5 V _ 0 4

P Q 22
I R F 7 4 1 3Z P B F

1
2
3

P R 10 4

P M_ D P R S L P V R

*2 0 m li _ s ho rt

P C 1 25

PC 8

. 1U _ 50 V _ 0 6

4

.

7 , 1 7 P M _D P R S L P V R

H _ DP R S T P #

. 1 U _5 0 V _ 0 6
Z411 2

P C7

8

P R1 0
1 U _ 2 5 V _ 08
PR 2 9

3, 7 , 1 5 H _D P R S TP #

5
6
7

PC 3 9

1
2
3

*0 _ 04

P C4 0

PR 2 8

P C 10
P R1 0 0

Schematic Diagrams

CLICK FINGER BOARD FOR M77
D
R
A
O
B
R
E
G
N
I
F

D
R
A
O
B
K
C
I
L
C

CJ _ F P 1
C GN D

CC 1 3
. 1 U _ 10 V _ X 7 R _ 0 4
C5 V
C GN D

M760XX STUFF
M765XX STUFF

CJ _ T P 2
1
2
3
4
5
6

CT P _ D A T A
CT P _ C L K

CSW1, CSW2
CSW3, CSW4

CG ND

CJ_TP2
1

RIGHT
KEY

LIFT
KEY

CSW1~4
2
1

4
3

CSW 1
TJ G -5 33 -S -T / R

6

U X OU T
RID 0 /S E N S E
CS
I S O/ M O D E 3
P I O1

CT D
CT D
CT G
CT U
CT U

ATA0
ATA1
P I O0 / I N T
S B _ P N7 _ R
SB_ PP7 _ R

1
3
5
7
9
11
13
15
17
19
21
23

2
4
6
8
10
12
14
16
18
20
22
24

CS W 2
T JG -5 3 3-S -T/ R

1
3

8 5 2 0 1-0 6 0 5 1_ S _ R

CT M
CT G
CT M
CT M
CT G

2
4

CC 5

C C6

C C8

2 . 2U _ 1 0V _0 6

2 . 2 U _ 1 0 V _ 06

2 . 2 U _1 0 V _ 0 6

CO N2 4 A

1
3

C T P B U T TO N _ R

CT AV DD
C T T C _V D D
CT D VDD 1

C T MO S I
C T P D _R E G
C TN R E S E T
C T DA T A 2
C TE S D _ R I N G
C T MC L K
C T XI N
C T XO U T

2
4

CG ND

CG ND

CG ND

C GN D

C T P B UT T O N_ L

5
6
CS W 4
*T J G-5 3 3 -S -T / R
1
3

D03 For
M765

2
4

D03 For
M765

5
6

C T P _ C LK
CT P_ D AT A
CG ND

C 5V

C T G P I O 0/ I N T

CR 1 7

1 .5 K _ 0 4

CT U SB _ PP 7 _ R

CR 1 8

2 7 . 4 _ 1 %_ 0 4

C T 3. 3 V
CJ _ F P 2

CG ND

CG ND

1
2
3
4

1

2
4

CJ_FP1

12

6-20-94A20-112

CSW 3
*T J G-5 3 3 -S -T / R
1
3

5
6

1

4

C T P B U T TO N _L
C T P _ S C R O L L _D OW N
C T P _ S C R O L L _U P
C T P B U T T ON _R
Z 4 5 01
Z 4 5 02

1
2
3
4
5
6
7
8
9
10
11
12

CJ_TP1

Sheet 35 of 42
CLICK FINGER
BOARD FOR M77

5
6

CJ _ T P1

C T USB_ PP 7
CT U S B _ P N 7

CT U SB_ PP7
CC 1 9
4 7P _ 5 0 V _ 0 4

8 5 2 0 1- 04 0 5 1 _S _ R

C C 12

CG ND

8 7 1 51 -1 2 0 7G _ L
C GN D

. 1U _ 1 0V _X 7 R _ 0 4

CG ND

C H2
C 5 5D 5 5

CH 5
C5 5 D5 5

C H1
2
3
4
5

C H3
1

9
8
7
6

2
3
4
5

MT H 2 3 7 D 9 1

C GN D

C H4
9
8
7
6

1

2
3
4
5

M T H2 3 7 D9 1

CG ND

C GN D

C H6
9
8
7
6

1

2
3
4
5

M T H2 3 7 D9 1

CG ND

C GN D

9
8
7
6

1

M T H2 3 7 D9 1

CG ND

C GN D

TCS4B Unstuff
TCS4C 1U_10V_06

C G ND

CT 3 .3 V

GREEN FOR TCS4EA CHANGE PARTS
C C2 0

CC 2 2

1 U_ 1 0 V _ 0 6

. 1 U _ 1 0 V _ X 7R _ 04

CT G RID 0 /S E N S E

C C2
. 1 U _ 2 5 V _ X7 R _0 6
Z 4 5 07

CR 2
2 20 _ 0 6

Unstuff

TCS4C

330K_04

TCS4E

330K_04

TCS4E 1U_10V_06

C T 3. 3V

C U1

10mil

C T E S D _R I N G

TCS4B

CR 3

C C4

33 0 K _ 0 4

1 U _1 0 V _ 0 6

1
3
2

CC 1

3 3 0 K_ 0 6

33 P _ 5 0 V _ 0 6

C T MO S I

C R 22

1 0 K_ 0 4

C T D A TA 2

CR 8

0_04

C T D A TA 1

C R 10

0_04

C TP D _ R E G

R C LA MP 0 5 0 2B

C T T C_ V D D

TCS4B

Unstuff

TCS4C

47P_50V_06

D03D-0925
CT T C_ V D D

CG ND

TCS4EA 33P_50V_06

CR 9

0_04

CR 7

0_04

C T MI S O/ M OD E 3

CR 5

1 0 K_ 0 4

C TU S B _ P N 7 _R

CR 4

C D1

*0 _ 04

* S C S 55 1 V -3 0

4 7 K _ 04

CR 1 5

CT US B _ P N7

2 7 . 4 _ 1 %_ 0 4

CG N D
CQ 1
*N D S 35 2 A P _ N L
G

CG ND

CC 9
C R1 6
S

C T G_ F E T
C C 25

C R6

C T3 . 3 V

C T D A TA 0
C T GP I O1

C T GP I O0 / I N T

C T NR ESE T

C

C R1

A

C GN D

CC 1 8

. 1 U _ 1 0V _X 7 R _0 4

C R1 4

. 1U _ 1 0V _X 7 R _ 0 4

* 1 00 K _ 0 4

47 P _ 5 0 V _ 0 4

5 .6 _ 0 6
C C 17

C GN D
D

C GN D

CT A V DD

*. 0 2 2U _ 1 6V _X 7 R _0 4

CG ND

C GN D

C T TC _ V D D

CT X IN

5
2
1
6

S
Q
CS#
S CK

C R1 2

8

V DD

C C3

C C1 5

*. 1U _ 10 V _ X 7 R _ 0 4

1 U_ 1 0 V _ 0 6

3

B

C GN D
C CS 3
S M D 1 5 8 X 27 6 R

A#

*1 U _ 10 V _ 0 6

3

CT 3 .3 V

B

CL R#

C x

7

Z 4 5 04

6

Z 4 5 05
C C2 1

5

Z 4 5 06 C R 1 9

4

CG ND
CG ND

CG ND

B - 36 CLICK FINGER BOARD FOR M77

CG ND

3 3P _5 0 V _ 0 4
* 2 . 2U _ 6 . 3V _0 6
C GN D

1

C C2 3

* 1 00 K _ 0 4

* 3 30 K _ 0 4
C C7

R x/ C x
C R2 1

8

GN D

Q

*S N 7 4 LV C 1 G1 2 3 D C T

C GN D

1 M _ 04
C TX O U T

C R2 0
VCC

1

1
1

1
1

2

10 K _ 0 6

C CS 1
S M D 1 5 8 X2 7 6 R

CG ND

TCS4C 22P_50V_04

CU 3
1

Z 45 0 3

CG ND
1

CG ND

C C 16

TCS4EA USE RESISTER

2 2P _ 5 0 V _ 0 4

CX 1
12 M H z F U JI C OM F S X -8 L

TCS4B 33P_50V_04

C T MU X OU T

7

HO L D#

C GN D
C CS 4
S M D 75 X 2 7 6R

. 1 U _ 10 V _ X 7 R _ 0 4

CT 3 .3 V
C C2 4
*. 1 U _1 0 V _ X 7 R _ 0 4

CG ND

E
C Q2
CB T B 1 1 9 8N 3

*M 9 51 2 8 W M N 6 T P

C CS 2
S MD 75 X 2 7 6R

C R1 1

*3 3 _0 6
C T DVD D 1

VSS

C C1 4

C R 13
W P#

4

CC 1 0

*1 5 _ 0 6

1

C T M I S O/ MO D E 3
C T M OS I
CT M CS
CT M CL K

C T T C_ V D D

2

CU 2

1

B.Schematic Diagrams

C GN D

CG ND

* 10 K _ 0 4 C T G_ F E T

CC 1 1

2 2P _ 5 0 V _ 0 4

CG ND

Schematic Diagrams

MULTI FUNCTION BOARD
M_ 5 V

CCD

MULTI I/O CONN

SPEAKER CONNECTOR

M 5 V _C C D

MC 9

MC 10

1U _ 6. 3V _ 0 4

M GN D
M _5V
M_ 5 V
MJ _ S P K 1
M D D -S P K R +

M L4

F C M1 0 05 K F - 12 1 T 03

Z460 1

M D D -S P K R -

M L3

F C M1 0 05 K F - 12 1 T 03

Z461 2

M C8

1 8 0 P _ 5 0V _ 0 4

1 8 0P _5 0 V _ 0 4

1
3
5
7
9
11
13
15

Z 4 6 05
M
M
M
M
M

8 5 20 5 -0 3 00 1 _ L
M C7

H C B 1 0 0 5K F -12 1 T 2 0

M J _F B 1

20 MIL

1
2
3

M L2

M_ 3 . 3 V

A Z _ S D OU T
A Z _ S Y NC
A Z _ S D IN1
A Z _ R S T#
A Z _ B IT CL K

M
M
M
M

CC
CC
DD
DD

D _ D E T#
D_ E N
-S P K R +
-S P K R -

MC 6

G
. 1U _ 10 V _ X 7 R _ 0 4
Z 4 60 3

M C3

M C4

1 0 0K _0 4

. 1 U _ 1 0 V _ X7 R _0 4

1 U_ 6 .3 V _ 0 4
5

MR 7
10 0 K _ 0 4

MG N D

MU S B _ P N 1
MU S B _ P P 1

MR 8

33 0 K _ 0 4
Z46 04

MG N D
D

88 1 0 7 -16 0 0 1

M CC D_ E N

MQ 1
2N 7 00 2 W

G

M GN D

MJ _ C C D 1
1
2
3
4
5

MU S B _ P N 1
MU S B _ P P 1
MC C D _D E T #

85 2 0 5 -05 0 0 1 _R

S

MG N D

MJ_CCD1

M R6

1

1 U_ 6 .3 V _ 0 4

1

F OR E MI

MG N D

M5 V _ C C D

48 mil

D03

MG N D

From H8 default HI
M GN D

RJ-11

Sheet 36 of 42
MULTI FUNCTION
BOARD

FAR AWAY ANOTHER PARTS >2.5mm
MODEM
MJ_MODEM1
2 1

M J _M OD E M1
Z 46 0 8
2
Z 46 0 9
1

RJ-11
MJ _ R J1 1
ML 5
ML 6

B K 1 6 08 H S 1 21
B K 1 6 08 H S 1 21

Z 4 61 0 1
Z 4 61 1 2

8 5 2 05 -0 2 0 01 _ L
P C B F o o t p rin t = 8 5 2 05 -0 2 L

T IP
RIN G

C 1 0 1 2 1-1 0 2 0 4-L
P I N G N D 1~ 2 = MG N D

MDC MODULE
MJ_MDC1
12
2

11
1

20 MIL

MJ _ M D C 1
MA Z _S D O U T

M R5

3 3 _ 0 4 M A Z _ S DO UT _ R

MA Z _S Y N C
MA Z _S D I N 1
MA Z _R S T #

M R4
M R3
M R2

3 3 _ 0 4 M A Z _ S Y N C_ R
2 2 _ 0 4 M A Z _ S D I N 1 _R
3 3 _ 0 4 M A Z _ RS T # _ R

1
3
5
7
9
11

GN D
A za l i a_ S D O
GN D
A za l i a_ S Y N C
A za l i a_ S D I
A za l i a_ R S T #

R ESER VED
R ESER VED
3. 3 V M a ni / a u x
G ND
G ND
A za l ia _ B C LK

2
4
6
8
10
12

Z 4 60 5
Z 4 60 6
Z 4 60 7

10mil

M A Z _ B IT CL K _ R

8 8 01 8 -1 2 0G

MG N D

MH 5
2
3
4
5

M H6

1
6

MT H 25 6 D 1 4 6 -5 P
M GN D

M GN D

2
3
4
5

MH 7

1
6

2
3
4
5

M TH 2 5 6D 1 46 -5 P
MG N D

MG N D

1

2
3
4
5

M TH 3 15 D 1 11
M GN D

M GN D

M R1

M C2

M C1

. 1 U _1 0 V _ X 7R _ 04

* 2 2P _ 5 0 V _ 0 4

0_04

M A Z _ B IT CL K

MH 3
1

9
8
7
6

2
3
4
5

MT H 3 1 5 D 1 1 1
M GN D

M_ 3 . 3 V

MG N D

M H8
9
8
7
6

M L1
H C B 1 0 0 5K F -12 1 T 2 0

1

9
8
7
6

MH 2
C 6 0 D 60

MH 1
C5 2 D5 2

MT H 2 56 D 11 1
MG N D

MG N D

MG N D

MULTI FUNCTION BOARD B - 37

B.Schematic Diagrams

MJ_SPK1
3

M C5

2
4
6
8
10
12
14
16

1U _ 6. 3 V _ 0 4

M GN D

M Q2
A O3 4 09
Z 4 60 2 S
D

Schematic Diagrams

AUDIO BOARD

USB PORT
A _U S B V C C
AL 5
H C B 1 6 08 K F - 12 1 T 25

A _ US B V CC 2

60 mil

A _ U S B V CC
+

A_ 5 V

A C9

AU 1
4
3

V IN

V OU T

V IN

V OU T

1 0U _ 10 V _ 0 8

GN D

50 mil

1

AC7

1 0 0U _ 6. 3V _ B 2

. 1U _ 1 0V _ X 7 R _ 0 4
AJ _ U SB1

5

AC 5

A C6

A C8

1
A GN D

. 1 U _1 0 V _ X 7R _ 0 4

2

. 1 U _ 10 V _ X 7 R _ 0 4

10 U _1 0 V _ 0 8
AR 1

R T 97 0 1 -C P L

B.Schematic Diagrams

AC 1

*1 0 mi l _ sh o rt

AU SB_ PN4 _ R

2

A U S B _ P P 4 _R

3

A G ND
A GN D

4
A U S B _P N 4
A U S B _P P 4

1

A L1

2

V+
D A T A _L
D A T A _H
G ND

4
3
*W C M2 0 1 2 F 2S -16 1 T 0 3
AR 2

G ND 1
s h ei l d
GN D 2
G N D 3s hi e l d
s h i el d
GN D 4
s hi e l d

50 mil

C 1 0 7 B 3 -1 04 0 3 -Y

*1 0 mi l _ sh o rt
AG ND

Sheet 37 of 42
AUDIO BOARD

A G ND

AUDIO JACK
A C1 1
. 01 U _1 6 V _ X 7R _ 0 4
A S P DIF O
Z 4 71 0
A_ 5 V

A
A
A
A
A
A
A

AL 7

F C M1 0 05 K F - 10 2 T 02

AJ _ F B1
1
2
3
4
5
6
7
8
9
10
11
12
13

A MI C 1- R
A MI C 1- L
H E A D P H ON E -R
H E A D P H ON E -L
MI C _S E N S E
S P K _ HP #
HP_ SEN SE
USB_ PN 4
USB_ PP4

A S P DIF O

AR 7
2 2 0_ 0 4

Z470 1
Z470 2

5 A J _ S P D IF 1
4
R
3

Z470 3
Z470 4

2
L
6
1
2 S J -S 3 5 1 -S 3 0

A C 12
1 00 0 P _ 5 0 V _0 4

S PDIF OUT

BLACK
A GN D
A M I C _S E N S E
A M I C 1-R

AL 4

F C M1 0 0 5K F -1 21 T 0 3

Z470 5

A M I C 1-L

AL 6

F C M1 0 0 5K F -1 21 T 0 3

Z470 6
Z470 7

8 7 2 1 2-1 3 G0 _ L
A C 10

AC 4

6 8 0P _5 0 V _ 0 4

6 8 0P _5 0 V _ 0 4

5 A J _ MI C 1
4
R
3

3 4

5

2
L
6
1
2 S J -S 3 5 1 -S 3 0

A _A U D G A GN D

MIC IN

D0 3B

BLACK
AH P_ SEN SE

A_ AUD G

A S P K _ HP #
A H E A D P H O N E -R
A R3
A R5

AH 5
C 2 96 D 29 6 N

A H1
AH 3
C 5 2 D 5 2 C 52 D 52

A H2
2
3
4
5

1

2
3
4
5

1

9
8
7
6

Z 4 70 8

F C M1 0 0 5K F -1 21 T 0 3

Z 4 70 9

1 0 0 _ 06

AC 1 4

. 1U _ 10 V _ X 7 R _ 0 4

AC 1 5

. 1U _ 10 V _ X 7 R _ 0 4

AC 1 3

. 1U _ 10 V _ X 7 R _ 0 4

AC 1 6

. 1U _ 10 V _ X 7 R _ 0 4

M TH 2 76 D 11 1
A GN D

AG ND

A G ND
A GN D

B - 38 AUDIO BOARD

F C M1 0 0 5K F -1 21 T 0 3

Z4 7 1 2 AL 3

A R9

A R8

AC 3

AC 2

1K _0 4

1K _0 4

6 8 0P _5 0 V _ 0 4

6 8 0P _5 0 V _ 0 4

5 A J _ HP 1
4
R
3

A _ A U DG

2
L
6
1
2 S J -S 3 5 1 -S 3 0

H EADP HON E

BLACK

A H4
9
8
7
6

MT H 2 7 6 D 1 1 1
A GN D

Z4 7 1 1 AL 2
1 0 0 _ 06

A H E A D P H O N E -L

A_ AUD G

2

1

6

Schematic Diagrams

POWER SWITCH BOARD FOR M76
FU 1
EXT_RI N G2
CR I DO
R I NG
MUXOUT
AV DD
MC S
PAD _VD D1B

DV DD
GPI O1
AGND
DA TA0
DA TA1
GPI O0
MCLK
U SB_DN
U SB _D P
MOSI
PD _R EG
N R ESET
D GND
DA TA2
EXT_RI N G1
PV DD
XTALIN
PGND
XTALOUT
TC S4B

FESD _RI N G

B1

FGRI D 0/ SEN SE

C1
D1

FGN D
FMUXOU T

E1
F1

FA VD D
FMCS

G1
H1

FTC _V DD
FMIS O/ MOD E3

J1
A2

FJ 1

FD VD D 1
FGPI O1

B2

FGN D
FGN D

C2

FD ATA0

D2

FD ATA1

E2

FGPI O0/I N T

F2

FMCLK

G2

FU SB_PN 7_R

FGN D

FMU XOU T
FG R ID 0/ SEN SE
FMC S
FMIS O/ MOD E3
FG PI O1
FD ATA0
FD ATA1
FG PI O0/ IN T
FU SB_PN 7_R
FU SB_PP7_R

1
3
5
7
9
11
13
15
17
19
21
23

2
4
6
8
10
12
14
16
18
20
22
24

FMOSI
FPD _RE G
FN R ESET
FD ATA2
FES D_R IN G
FMC LK
FXIN
FXOUT

FAVD D
FTC_VD D
FD VD D1

Sheet 38 of 42
POWER SWITCH
BOARD FOR M76

FGND

C ON 24
H2

FU SB_PP7_R

J2

FMOS I

A3

FPD _REG

B3

FN RE SET

FJ1
1

C3
D3

FD ATA2

E3

FESD _RI N G

F3
G3

23

23

1

FGN D
2
24
BOTTON VIEW

24
2
TOP VIEW

FTC _V DD
FXIN

H3
FGN D
J3

FXOU T

POWER SWITCH BOARD FOR M76 B - 39

B.Schematic Diagrams

MISO

A1

Schematic Diagrams

POWER SWITCH BOARD FOR M74
POWER SW & POWER LED FOR M74

SMSW1
TJG-533-S-T/R
1
3

SMR1
2
4

220_04
SM_BTN#
SM_3.3VS
20mi l

SMC1

SMJ_SW1

20mil Z4901
Z4902

*.1U_04
SM_BTN#

A

Sheet 39 of 42
POWER SWITCH
BOARD FOR M74

POWER
SWITC H
LED

5
6
SMGND
SMD1

SMGND

1
2
3
4

85201-04051_L
SMGND
C

KPC-3216QBC-C

SMGND

SMH2
C52D52

SMH3
C52D52

SMH1
2
3
4
5

SMH4
9
8
7
6

1

2
3
4
5

9
8
7
6

1

SMS1
C126
1

SMH5
C237B52D52N

1

B.Schematic Diagrams

SM_3.3VS
20mil

POW ER BUTTON

MTH237D87
SMGND
SMGND

B - 40

SMGND

MTH237D87
SMGND
SMGND

SJ _SW1
4
1

Schematic Diagrams

FINGER BOARD FOR M74
4
7
M
R
O
F
D
R
A
O
B
R
E
G
N
I
F
TCS4B Unstuff

F C CT 3 .3 V _ F
F C C T3 . 3 V _ F

F C C1 4

1 U _ 1 0V _0 6

F CR 1 6
100_06

Unstuff

TCS4C

330K_04

TCS4C 1U_10V_06

F C U1

10mil

1

F C T E S D _ R I N G _F

.1 U_ 1 0 V _ X 7 R_ 0 4

3

F C GN D

TCS4B

F CR 1 8

F C C1 2

3 3 0 K_ 0 6

* 47 P _ 5 0 V _ 0 6

F CG N D

2

F CR 1 5

F CC 6

R C LA MP 0 5 0 2 B

*3 3 0 K _ 0 4

*1 U _1 0 V _ 0 6

F C T P D _ R E G _F

TCS4B

Unstuff

TCS4C

47P_50V_06

C

F CC 1 3

F CC 1
. 1 U _ 2 5 V _ X 7R _ 0 6
F CT G RID 0 /SE N S E _ F
Z5005

F C C T 3. 3 V _ F

F CR 1 4

F CD 1

F C TT C _ V D D _ F
4 7K _ 04

F CT D A T A 1 _ F

F C R8

4 7K _ 04

F CT D A T A 0 _ F

F C R9

4 7K _ 04

F C Q1
ND S 3 5 2 AP _ NL
G
F C TG _ F E T _ F

S

F C R1 3

*S C S 5 5 1 V -3 0
A

0 _0 4
F CT D A T A 2 _ F

F C R2
*0 _ 0 6

F C GN D

F C GN D

F C R1 0

3 30 K _0 4

D

F C T G P I O 1_ F

F C T A V D D_ F

. 0 2 2 U _ 1 6 V _ X 7R _ 0 4
F C T M I S O / MO D E 3_ F C R 1 1

4 7K _ 04
F C T T C _ V D D _F

F C R3

1 5_ 0 6

F CG N D

F C C4

F C C7

1 U_ 1 0 V_ 0 6

. 1 U _ 1 0 V _ X 7R _ 0 4

F C R1 9

F C C T3 . 3 V _ F
F C C2
. 1 U _ 1 0 V _ X 7R _ 0 4

3 3 _ 06
F CT D V DD 1 _ F

B

F C GN D
F C GN D

F CU 2
1

F C C1 7
F C T T C _ V D D _F
I S O / M OD E 3 _ F 5
2
O SI_ F
C S_ F
1
C LK _F
6

1 U _1 0 V _ 0 6
V DD

S
Q
C S#
S CK

F CG ND

F C R2 0

F C C1 8

1 00 K _ 0 4

1 U_ 1 0 V _ 0 6

F C CT 3 .3 V _ F

3

F CG ND
F C T XO U T_ F

F C R1
8

V CC

3 3 0 K _ 04

B
R x/ C x

F CC 2 0
. 1U _ 1 0V _X 7 R _ 04

W P#

A#

8
C L R#

Cx

G ND

Q

2

1

3

4

F CG N D

F CX 1
1 2M H z -H S X 53 1 S

7

Z 5 0 04

6

Z 5 0 01
F CC 3

5

Z 5 0 03 F C R 1 7

F C R2 1

*4 7 K _ 0 4

2 .2 U_ 6 .3 V _ 0 6
F CC 1 5

3

4

1 0 K_ 0 4

F C C 21

F C T G_ F E T _ F
1 8P _5 0 V _ 0 6

1 8 P_ 5 0 V_ 0 6

S N 7 4 L V C 1 G 1 2 3D C T
4

HO L D#

V SS

7

F C GN D

F CG ND

M 9 5 1 28 W MN 6T P
F CG N D

F CG N D

F C GN D

F C G ND

TCS4B 33P_50V_04
F C T U S B _ P N 7 _R _ F F C R 6

2 7. 4_ 1 % _ 0 4

TCS4C 22P_50V_04

F C T TC _ V D D _ F

F C T U S B _ P N 7_ F

F CT G P IO 0 /INT _ F F C R4

1 .5 K _ 0 4

F C T U S B _ P P 7 _ R _ FF C R 5

2 7 . 4 _1 % _ 0 4

F C TM U X O U T _ F
F C TN R E S E T _ F F C R 1 2
F CR 7

F CC 9

1 0 0 K_ 0 4

4 7 P_ 5 0 V_ 0 4

4 7 K_ 0 4

F C C1 1
F C C1 0

F C T U S B _P P 7 _F

F CC 8

3 3P _5 0 V _ 0 4

4 7P _5 0 V _ 0 4

. 1 U _ 1 0 V _ X 7R _ 0 4
F CG N D

F CG N D
F C G ND
F C GN D

F CC 1 6

F C C1 9

F CC 2 2

1 U _ 10 V _0 6

1 U_ 1 0 V _ 0 6

1 U _ 1 0 V _ 06

F C G ND

F CH 4
C 4 4 D4 4

M T H2 3 7 D9 1

F C G ND

F CH 3
C4 4 D4 4

F C GN D

F C H6
C 23 7 D 23 7

2
3
4
5

M TH 2 3 7D 9 1

F C GN D

F C H5
C 23 7 D 23 7

F CH 1
9
8
7
6

F CG ND

FC S1
S M D 7 9 X 1 9 7R

F CG ND

9
8
7
6

MT H 23 7 D 9 1

F CG ND
F CS 3
S MD 7 9 X 19 7 R

F C G ND

1

F C G ND

F CS2
S MD 79 X 1 9 7 R

F C G ND
FC S4
S M D 7 9 X 1 97 R
1

F CT D
F CT D
F CT G
F CT U
F CT U

F C T M OS I _ F
F C T P D _ R E G_ F
F C T NR E S E T _ F
F C T D A T A 2 _F
F C T E S D _R I N G_ F
F CT M CL K _ F
F C T X I N _F
F C T X OU T _ F

F C T A V D D _F
F C T T C _ V D D _F
F CT D V DD 1 _ F

1

1

F C GN D
F CG ND

2
4
6
8
10
12
14
16
18
20
22
24

2
3
4
5

F C GN D

F CG ND

1

8 5 2 01 -0 4 0 5 1 _R

1
UX O UT _ F
3
RI D 0 /S E N S E _ F 5
C S _F
7
I S O / MO D E 3_ F 9
P I O 1_ F
11
13
AT A0 _ F
15
17
AT A1 _ F
P I O 0/ I N T _ F
19
S B _ P N 7 _R _ F 2 1
S B _ P P 7 _ R _F 2 3

F C H2
9
8
7
6

1

F C TU S B _ P P 7_ F
F C T U S B _ P N 7_ F

F CT M
F CT G
F CT M
F CT M
F CT G

1

1

1
4

1
2
3
4

F C GN D

2
3
4
5

MT H 2 37 D 9 1

FC J _ FP2
F CC T 3 .3 V _ F
F C J_ F P 1

9
8
7
6

1

1

2
3
4
5

FC H 7

1

F CH 8

1

F CG ND

FCJ_FP1

TM
TM
TM
TM

2

Z 50 0 2

F CU 3
FC
FC
FC
FC

Sheet 40 of 42
FINGER BOARD
FOR M74

F C T XI N _ F
E
F CQ 2
C
B TB 11 9 8 N 3

C ON 2 4A
F C G ND
F C G ND

F C GN D

F CG N D

FINGER BOARD FOR M74 B - 41

B.Schematic Diagrams

F C C5

Schematic Diagrams

POWER SWITCH BOARD FOR M76
POWER SW & POWER LED FOR M76

SHR1
2
4

220_04
SH_BTN#
20 mil
20m il

SHC1

SH_3.3VS
SHJ_SW1

Z5101
SHGND

2 0mil

*.1U_04

Z5102

A

Sheet 41 of 42
POWER SWITCH
BOARD FOR M76

POWER
SWITCH
LED

20m il

SHSW1
TJG-533-S-T/R
1
3
5
6

SH_BTN#

SHD1

SHGND

1
2
3
4

85201-04051_L
KPC-3216QBC-C

SHGND

C
SHGND

SHH3
C52D52

SHH1
C52D52

2
3
4
5

SHH2

9
8
7
6

1

2
3
4
5

SHH4

9
8
7
6

1

SHS1
C126
1

SHH5
C237B52D52N

1

B.Schematic Diagrams

SH_3.3VS

POW ER BUTTON

MTH237D87
SHGND
SHGND

B - 42 POWER SWITCH BOARD FOR M76

SHGND

MTH237D87
SHGND
SHGND

SJ _SW1
4
1

Schematic Diagrams

EXTERNAL ODD BOARD FOR W76
ODD BOARD FOR W76

W J _O D D 2
S1
S2
S3
S4
S5
S6
S7

Z 5201
Z 5202
Z 5203
Z 5204

W GN D

W GN D
Z 5205

P1
P2
P3
P4
P5
P6

W _ 5VS

P1
P2
P3
P4
P5
P6

W _5 VS

Z 5206

20 20 01 -1

P IN
GN D 1~ 2= W GN D

242 00 1-1
W GN D

P IN
GN D 1~ 3= W

W GN D

Sheet 42 of 42
EXTERNAL ODD
BOARD FOR W76

W _5 VS

WC1

WC2

. 1U _ 16 V_ 04

. 1 U _1 6V _04

W GN D

WH1
C2 37 D 91

W H2
C 23 7D 91

W GN D

W GN D

WH3
C 67D 6 7

WH4
C 67 D 67

EXTERNAL ODD BOARD FOR W76 B - 43

B.Schematic Diagrams

W J _ OD D1
S1
S2
S3
S4
S5
S6
S7

B.Schematic Diagrams

Schematic Diagrams

B - 44

BIOS Update

Appendix C:Updating the FLASH ROM BIOS
To update the FLASH ROM BIOS you must:
•
•
•
•
•
•
•

Download the BIOS
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel.
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model
(see sidebar for important information on BIOS versions).

Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the
downloaded files.
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software).

BIOS Version
Make sure you download the latest correct
version of the BIOS appropriate for the computer model you are
working on.
You
should
only
download BIOS versions
that
are
V1.01.XX or higher as
appropriate for your
computer model.
Note that BIOS versions
are not backward compatible and therefore
you may not downgrade your BIOS to an
older version after upgrading to a later version (e.g if you upgrade
a BIOS to ver 1.01.05,
you MAY NOT then go
back and flash the BIOS
to ver 1.01.04).

Set the computer to boot from the external drive
1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.
C - 1

C:BIOS Update

Download the BIOS update from the web site.
Unzip the files onto a bootable CD/DVD/USB Flash Drive.
Reboot your computer from an external CD/DVD/USB Flash Drive.
Use the flash tools to update the flash BIOS using the commands indicated below.
Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
After rebooting the computer you may restart the computer again and make any required changes to the default BIOS
settings.



BIOS Update

Use the flash tools to update the BIOS
1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs
being loaded by DOS. Choose “N” for any memory management programs.
2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB
flash drive).
3. Type the following command at the DOS prompt:

C:BIOS Update

C:\> XXX.bat

4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
restarts.

Restart the computer (booting from the HDD)
1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F9) and select “Yes” to confirm the selection.
5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.

Your computer is now running normally with the updated BIOS
You may now enter the BIOS and make any changes you require to the default settings.

C-2

www.s-manuals.com

Source Exif Data:

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Linearized                      : No
Page Mode                       : UseOutlines
XMP Toolkit                     : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39
Format                          : application/pdf
Title                           : Clevo M740TH, M748TH - Service Manual. www.s-manuals.com.
Creator                         : 
Subject                         : Clevo M740TH, M748TH - Service Manual. www.s-manuals.com.
Create Date                     : 2010:03:08 16:01:22Z
Creator Tool                    : FrameMaker 9.0
Modify Date                     : 2016:04:19 21:42:02+03:00
Metadata Date                   : 2016:04:19 21:42:02+03:00
Producer                        : Acrobat Distiller 9.0.0 (Windows)
Document ID                     : uuid:e7255494-94e3-4d0a-a35c-f2809cfd48f5
Instance ID                     : uuid:72aea4fa-3d7f-4f98-bc1b-a74eba530f79
Page Count                      : 99
Keywords                        : Clevo M740TH, M748TH - Service Manual. www.s-manuals.com.

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