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P150HM/ P151HM1 SERVICE MANUAL Preface Notebook Computer P150HM/P151HM1 Service Manual Preface I Preface Notice The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. Preface Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. Version 2.0 February 2011 Trademarks Intel and Intel Core are trademarks of Intel Corporation. Windows® is a registered trademark of Microsoft Corporation. Other brand and product names are trademarks and/or registered trademarks of their respective companies. II Preface About this Manual This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the P150HM/ P151HM1 series notebook PC. The following information is included: Chapter 1, Introduction, provides general information about the location of system elements and their specifications. Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade elements of the system. Preface Appendix A, Part Lists Appendix B, Schematic Diagrams Appendix C, Updating the FLASH ROM BIOS III Preface IMPORTANT SAFETY INSTRUCTIONS Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment: Preface 1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet basement or near a swimming pool. 2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning. 3. Do not use the telephone to report a gas leak in the vicinity of the leak. 4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may explode. Check with local codes for possible special disposal instructions. 5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output of 19V, 9.47A (180 Watts) minimum AC/DC Adapter. CAUTION This Computer’s Optical Device is a Laser Class 1 Product IV Preface Instructions for Care and Operation The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions: 1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged. Do not expose the computer to any shock or vibration. 2. Do not place anything heavy on the computer. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. Do not leave it in a place where foreign matter or moisture may affect the system. Don’t use or store the computer in a humid environment. Do not place the computer on any surface which will block the vents. Preface Do not expose it to excessive heat or direct sunlight. 3. Do not place it on an unstable surface. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save your work. Remember to periodically save your data as data may be lost if the battery is depleted. Do not turn off the power until you properly shut down all programs. Do not turn off any peripheral devices when the computer is on. Do not disassemble the computer by yourself. Perform routine maintenance on your computer. V Preface 4. 5. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data. Take care when using peripheral devices. Use only approved brands of peripherals. Unplug the power cord before attaching peripheral devices. Preface Power Safety The computer has specific power requirements: VI • • Power Safety Warning • Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. • • • Only use a power adapter approved for use with this computer. Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are unsure of your local power specifications, consult your service representative or local power company. The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one. When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire. Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices. Before cleaning the computer, make sure it is disconnected from any external power supplies. Do not plug in the power cord if you are wet. Do not use the power cord if it is broken. Do not place heavy objects on the power cord. Preface Battery Precautions • Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer. • Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire. • Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode. • Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service personnel. • Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode or leak if exposed to fire, or improperly handled or discarded. • Keep the battery away from metal appliances. • Affix tape to the battery contacts before disposing of the battery. • Do not touch the battery contacts with your hands or metal objects. Battery Guidelines Preface The following can also apply to any backup batteries you may have. • If you do not use the battery for an extended period, then remove the battery from the computer for storage. • Before removing the battery for storage charge it to 60% - 70%. • Check stored batteries at least every 3 months and charge them to 60% - 70%. Battery Disposal The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste officials for details in your area for recycling options or proper disposal. Caution Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturer’s instructions. Battery Level Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10% will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week. VII Preface Related Documents You may also need to consult the following manual for additional information: User’s Manual on Disc This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC. System Startup Remove all packing materials. Place the computer on a stable surface. Insert the battery and tighten the screws. Securely attach any peripherals you want to use with the computer (e.g. keyboard and mouse) to their ports. 5. Attach the AC/DC adapter to the DC-In jack at the rear of the computer, then plug the AC power cord into an outlet, and connect the AC power cord to the AC/DC adapter. 6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do not to exceed 135 degrees); use the other hand (as illustrated inFigure 1) to support the base of the computer (Note: Never lift the computer by the lid/LCD). 7. Press the power button to turn the computer “on”. Preface 1. 2. 3. 4. VIII 135 ﾟ Figure 1 Opening the Lid/LCD/ Computer with AC/DC Adapter Plugged-In Preface Contents Introduction ..............................................1-1 Overview .........................................................................................1-1 External Locator - Top View with LCD Panel Open ......................1-4 External Locator - Front & Right side Views .................................1-5 External Locator - Left Side & Rear View .....................................1-6 External Locator - Bottom View .....................................................1-7 Mainboard Overview - Top (Key Parts) .........................................1-8 Mainboard Overview - Bottom (Key Parts) ....................................1-9 Mainboard Overview - Top (Connectors) .....................................1-10 Mainboard Overview - Bottom (Connectors) ...............................1-11 Disassembly ...............................................2-1 Part Lists ..................................................A-1 Part List Illustration Location ........................................................ A-2 Schematic Diagrams................................. B-1 System Block Diagram ...................................................................B-2 Processor 1/7 ...................................................................................B-3 Processor 2/7 ...................................................................................B-4 Processor 3/7 ...................................................................................B-5 Processor 4/7 ...................................................................................B-6 Processor 5/7 ...................................................................................B-7 Processor 6/7 ...................................................................................B-8 Processor 7/7 ...................................................................................B-9 DDRIII CHA SO-DIMM_0 ..........................................................B-10 DDRIII CHA SO-DIMM_1 ..........................................................B-11 DDRIII CHB SO-DIMM_0 ..........................................................B-12 DDRIII CHB SO-DIMM_1 ..........................................................B-13 MXM PCI-E .................................................................................B-14 Panel, Inverter, CRT .....................................................................B-15 1394_JMB380C ............................................................................B-16 DVI ...............................................................................................B-17 HDMI ............................................................................................B-18 CougarPoint - M 1/9 .....................................................................B-19 CougarPoint - M 2/9 .....................................................................B-20 CougarPoint - M 3/9 .....................................................................B-21 CougarPoint - M 4/9 .....................................................................B-22 CougarPoint - M 5/9 .....................................................................B-23 IX Preface Overview .........................................................................................2-1 Maintenance Tools ..........................................................................2-2 Connections .....................................................................................2-2 Maintenance Precautions .................................................................2-3 Disassembly Steps ...........................................................................2-4 Removing the Battery ......................................................................2-5 Removing the Hard Disk Drive .......................................................2-6 Inserting the Hard Disk Into the HDD Bay .....................................2-8 Removing the Optical (CD/DVD) Device ......................................2-9 Removing the Primary System Memory (RAM) .........................2-10 Removing the System Memory (RAM) from Under the Keyboard .......................................................................................2-12 Removing and Installing the Processor .........................................2-14 Removing the Wireless LAN Module ...........................................2-17 Removing the 3G Module .............................................................2-18 Removing and Installing the Video Card ......................................2-19 Top with Fingerprint ...................................................................... A-3 Top without Fingerprint ................................................................ A-4 Bottom ........................................................................................... A-5 LCD ............................................................................................... A-6 COMBO ......................................................................................... A-7 DVD-Dual Drive ............................................................................ A-8 2nd HDD ....................................................................................... A-9 Preface Preface CougarPoint - M 6/9 ..................................................................... B-24 CougarPoint - M 7/9 ..................................................................... B-25 CougarPoint - M 8/9 ..................................................................... B-26 CougarPoint - M 9/9 ..................................................................... B-27 3G, CCD ....................................................................................... B-28 Mini PCIE, LID ............................................................................ B-29 LED, Hotkey, LID SW, Fan ......................................................... B-30 RJ 45 ............................................................................................. B-31 Codec Realtek ALC892 ............................................................... B-32 APA2010D1-TPA2008D2 ........................................................... B-33 KBC-ITE IT8519 ......................................................................... B-34 USB, TP, FP, MULTI-CONN ...................................................... B-35 Card Reader (JMC 251C) ............................................................. B-36 USB 3.0 ........................................................................................ B-37 VDD3, VDD5 ............................................................................... B-38 5V, 3.3V, 5VS, 3VS, 1.5VS, VIN1 .............................................. B-39 Power 1.05VS, 1.05VS_VTT ....................................................... B-40 Power 1.5V/VTT_MEM .............................................................. B-41 Power 1.8VS ................................................................................. B-42 Power V-Core 1 ............................................................................ B-43 Power V-Core 2 ............................................................................ B-44 AC_In, Charger ............................................................................ B-45 Power 0.85VS ............................................................................... B-46 Audio Jack .................................................................................... B-47 X5100 ODD Board ....................................................................... B-48 X5100 Click Board ....................................................................... B-49 X5100 LED 1 Board .................................................................... B-50 X5100 LED 2 Board .................................................................... B-51 X5100 LED 3 Board .................................................................... B-52 X7100 HDD & ODD Board ......................................................... B-53 CIR ............................................................................................... B-54 X7100 LED Board ....................................................................... B-55 X X7100 Click Board .......................................................................B-56 X7100 Fingerprint Board ..............................................................B-57 TPM ..............................................................................................B-58 X5100 HDD Board .......................................................................B-59 Updating the FLASH ROM BIOS......... C-1 To update the FLASH ROM BIOS you must: C-1 Download the BIOS ........................................................................C-1 Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive ................................................................................................C-1 Set the computer to boot from the external drive ...........................C-1 Use the flash tools to update the BIOS ...........................................C-2 Restart the computer (booting from the HDD) ...............................C-2 Introduction Chapter 1: Introduction Overview This manual covers the information you need to service or upgrade the P150HM/P151HM1 series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer. Operating systems (e.g. Windows Vista, Windows 7, etc.) have their own manuals as do application software (e.g. word processing and database programs). If you have questions about those programs, you should consult those manuals. 1.Introduction The P150HM/P151HM1 series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please note the warning and safety information indicated by the “” symbol. The balance of this chapter reviews the computer’s technical specifications and features. Overview 1 - 1 Introduction Specifications Latest Specification Information 1.Introduction The specifications listed here are correct at the time of sending them to the press. Certain items (particularly processor types/speeds) may be changed, delayed or updated due to the manufacturer's release schedule. Check with your service center for more details. CPU The CPU is not a user serviceable part. Accessing the CPU in any way may violate your warranty. Processor Options LCD P150HM: P150HM: Intel® Core™ i7 Processor Extreme Edition i7-2920XM (2.50GHz) 8MB L3 Cache, 32nm, DDR3-1600MHz, TDP 55W Intel® Core™ i7 Processor i7-2820QM (2.30GHz) 8MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W i7-2720QM (2.20GHz) , i7-2630QM (2.0GHz) 6MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W i7-2520M (2.50GHz) 3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W 15.6" (39.62cm) FHD (1920 * 1080) P151HM1: Intel® Core™ i7 Processor i7-2820QM (2.30GHz) 8MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W i7-2720QM (2.20GHz) , i7-2630QM (2.0GHz) 6MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W i7-2520M (2.50GHz) 3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W Intel® Core™ i5 Processor i5-2410M (2.30GHz) 3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W Intel® Core™ i3 Processor i3-2310M (2.10GHz) 3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W Memory *Four 204 Pin SO-DIMM Sockets Supporting DDR3 1333/ 1600** MHz Memory Modules Memory Expandable up to 16GB Compatible with 2GB or 4GB Modules *Note: Four SO-DIMMs are only supported by Quad-Core CPUs; Dual-Core CPUs support two SO-DIMMs maximum **Note: 1600 MHz Memory Modules are only supported by Quad-Core CPUs to a maximum of two SO-DIMMs 1 - 2 Overview P151HM1: 15.6" (39.62cm) HD+ (1600 * 900) BIOS AMI BIOS (32Mb SPI Flash-ROM) Storage (Factory Option) One Changeable 12.7mm(h) Optical Device Type Drive (Super Multi Drive Module or Blu-Ray Combo Drive Module) One Changeable 2.5" (6cm) 9.5mm (h) SATA (Serial) Hard Disk Drive Core Logic Intel® HM65 Chipset Video Adapter P150HM: nVIDIA® GeForce GTX 485M PCIe Video Card 2GB GDDR5 Video RAM on board Microsoft DirectX® 11 Compatible nVIDIA® GeForce GTX 460M PCIe Video Card 1.5GB GDDR5 Video RAM on board Microsoft DirectX® 11 Compatible P151HM1: nVIDIA® GeForce GTX 460M PCIe Video Card 1.5GB GDDR5 Video RAM on board Microsoft DirectX® 11 Compatible Security Security (Kensington® Type) Lock Slot BIOS Password (Factory Option) Fingerprint Reader Module Audio High Definition Audio Compliant Interface THX TruStudio Pro S/PDIF Digital Output One (3W) Sub Woofer Built-In Microphone 2 Speakers Introduction Pointing Device Interface Power Built-in TouchPad (scrolling key functionality integrated) Two USB 3.0 Ports Two USB 2.0 Ports (Note one USB 2.0 port can supply power when the system is off but still powered by the AC/DC adapter - see page 11.) One eSATA & USB 2.0 Combo Port One HDMI-Out Port One DVI-Out Port One IEEE1394a Port One S/PDIF-Out & Surround-Out Combo Jack One Headphone/Speaker-Out Jack One Microphone-In Jack One Line-In Jack One RJ-45 LAN Jack One DC-In Jack Removable 8-cell cylinder battery, 76.96Wh (5200mAh) Keyboard Full-size “WinKey” keyboard with numeric keypad Communication Built-In Giga Base-TX Ethernet LAN 2.0M Pixel USB PC Camera Module (Factory Option) 3.75G/HSPA Mini-Card Module (Models A & B Only) (Factory Option) TV Tuner Mini-Card Module (Model C Only) Card Reader Embedded Multi-In-1 Card Reader MMC (MultiMedia Card) / RS MMC SD (Secure Digital) / Mini SD / SDHC/ SDXC MS (Memory Stick) / MS Pro / MS Duo Full Range AC/DC Adapter AC Input: 100 - 240V, 50 - 60Hz DC Output: 19V, 9.47A (180W) P151HM1 : Full Range AC/DC Adapter AC Input: 100 - 240V, 50 - 60Hz DC Output: 19V, 6.3A (120W) Dimensions & Weight 376mm (w) * 256mm (d) * 35 - 43mm (h) Around 3.1kg with Battery and ODD 1.Introduction (Factory Option) Intel® WiFi Link 6230 (802.11a/g/n) Wireless LAN + Bluetooth 3.0 Half Mini-Card Combo Module (Factory Option) Intel® WiFi Link 6300 (802.11a/g/n) Wireless LAN Half Mini-Card Module (Factory Option) Third-Party Wireless LAN (802.11b/g/n) + Bluetooth 3.0 Half Mini-Card Combo Module (Factory Option) Third-Party 802.11b/g/n Wireless LAN Half Mini-Card Module P150HM : Note: External 7.1CH Audio Output Supported by Headphone, Microphone, Line-In and Surround-Out Jacks Mini Card Slots Slot 1 for WLAN Module or Combo WLAN and Bluetooth Module (Factory Option) Slot 2 for 3.75G/HSPA Half Mini-Card Module Environmental Spec Temperature Operating: 5°C - 35°C Non-Operating: -20°C - 60°C Relative Humidity Operating: 20% - 80% Non-Operating: 10% - 90% Overview 1 - 3 Introduction Figure 1 External Locator - Top View with LCD Panel Open 1.Introduction Top View 1 1. PC Camera 2. LCD 3. LED Status Indicators 4. Power Button 5. Speakers 6. Keyboard 7. Built-In Microphone 8. TouchPad and Buttons 9. Fingerprint Reader (Optional) 2 15.6” (39.62cm) 3 4 5 5 6 7 8 9 1 - 4 External Locator - Top View with LCD Panel Open 3 Introduction External Locator - Front & Right side Views Figure 2 Front Views 1. LED Power Indicators Front 1 Right 1 2 3 4 5 6 7 8 1. Optical Device Drive Bay 2. Emergency Eject Hole 3. Headphone Jack 4. Microphone Jack 5. S/PDIF-Out Jack 6. Line-In Jack 7. USB 2.0 Port 8. Security Lock Slot External Locator - Front & Right side Views 1 - 5 1.Introduction Figure 3 Right Side Views Introduction External Locator - Left Side & Rear View Figure 4 Left Side View 1. 2. 3. 4. Left 1 2 3 2 4 5 1.Introduction RJ-45 LAN Jack USB 3.0 Ports USB 2.0 Port Mini-IEEE 1394a Port 5. Multi-in-1 Card Reader Figure 5 Rear View 1. Vent 2. eSATA/USB 2.0 Combo Port 3. HDMI-Out Port 4. DVI-Out Port 5. DC-In Jack Rear 1 1 - 6 External Locator - Left Side & Rear View 2 3 4 5 1 Introduction External Locator - Bottom View Figure 6 Bottom View 1. Vent 2. Component Bay Cover 3. Sub Woofer 4. HDD Bay 5. Battery 2 1 1.Introduction 3 1 1 1 4 5 Overheating To prevent your computer from overheating make sure nothing blocks the vent/fan intakes while the computer is in use. External Locator - Bottom View 1 - 7 Introduction Figure 7 Mainboard Overview - Top (Key Parts) Mainboard Top Key Parts 1.Introduction 1. Platform Controller Hub 2. Audio Codec 3. KBC ITE IT8519E 1 2 3 1 - 8 Mainboard Overview - Top (Key Parts) Introduction Mainboard Overview - Bottom (Key Parts) Figure 8 Mainboard Bottom Key Parts 1 2 3 5 4 6 Mainboard Overview - Bottom (Key Parts) 1 - 9 1.Introduction 1. VGA-Card Connector 2. CPU Socket (no CPU installed) 3. Memory Slots DDR3 SO-DIMM (Primary) 4. Hard Disk Connector 5. Mini-Card Connector (3G Module) 6. JMC 251C Introduction Figure 9 Mainboard Overview - Top (Connectors) 1.Introduction Mainboard Top Connectors 1. CCD Connector 2. USB 2.0 Port 3. Mini-IEEE 1394a Port 4. Multi-in-1 Card Reader 5. USIM Card 6. LED 2 Cable Connector 7. Keyboard Cable Connector 8. TouchPad Cable Connector 9. Microphone Cable Connector 10. LED 3 Cable Connector 11. Audio Cable Connector 12. LED 1 Cable Connector 13. Speaker Connector 14. LCD Cable Connector 1 14 13 12 6 11 2 7 3 4 5 8 9 10 1 - 10 Mainboard Overview - Top (Connectors) Introduction Mainboard Overview - Bottom (Connectors) Figure 10 Mainboard Bottom Connectors 4 3 2 1. 2. 3. 4. 1 5. 9 6. 8 8. 9. 7 8 5 6 Mainboard Overview - Bottom (Connectors) 1 - 11 1.Introduction 7. DC-In Jack DVI-Out Port HDMI-Out Port eSATA/USB 2.0 Combo Port VGA Fan Cable Connector Sub Woofer Cable Connector CPU Fan Cable Connector USB 3.0 Ports RJ-45 LAN Jack 1.Introduction Introduction 1 - 12 Disassembly Chapter 2: Disassembly Overview This chapter provides step-by-step instructions for disassembling the P150HM/P151HM1 series notebook’s parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated). We suggest you completely review any procedure before you take the computer apart. To make the disassembly process easier each section may have a box in the page margin. Information contained under the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also. Information A box with a will also provide any possible helpful information. A box with a contains warnings. An example of these types of boxes are shown in the sidebar. Warning Overview 2 - 1 2.Disassembly Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are repeated here for your convenience. Disassembly NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the battery is removed too). Maintenance Tools The following tools are recommended when working on the notebook PC: 2.Disassembly • • • • • • M3 Philips-head screwdriver M2.5 Philips-head screwdriver (magnetized) M2 Philips-head screwdriver Small flat-head screwdriver Pair of needle-nose pliers Anti-static wrist-strap Connections Connections within the computer are one of four types: 2 - 2 Overview Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently rock it from side to side as you pull it out. Do not pull on the wires themselves. When replacing the connection, do not try to force it. The socket only fits one way. Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as you pull them apart. If the connection is very tight, use a small flat-head screwdriver - use just enough force to start. Disassembly Maintenance Precautions The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions: Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. Cleaning Do not apply cleaner directly to the computer, use a soft clean cloth. Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer. Overview 2 - 3 2.Disassembly 1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components could be damaged. 2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. 3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor the position of magnetized tools (i.e. screwdrivers). 4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. 5. Be careful with power. Avoid accidental shocks, discharges or explosions. •Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. •When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. 6. Peripherals – Turn off and detach any peripherals. 7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before handling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap instead. 8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements. 9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged surfaces, reducing performance. 10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws, loose inside the computer. Disassembly Disassembly Steps The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM THE DISASSEMBLY STEPS IN THE ORDER INDICATED. To remove the Battery: 1. Remove the battery To remove the WLAN Module: page 2 - 5 To remove and install the HDD: 2.Disassembly 1. Remove the battery 2. Remove the HDD 3. Install the HDD page 2 - 5 page 2 - 6 page 2 - 8 To remove the Optical Device: 1. Remove the battery 2. Remove the Optical device page 2 - 5 page 2 - 9 To remove the Primary System Memory: 1. Remove the battery 2. Remove the system memory page 2 - 5 page 2 - 12 To remove the System Memory under the Keyboard: 1. Remove the battery 2. Remove the keyboard 3. Remove the system memory page 2 - 5 page 2 - 10 page 2 - 13 To remove and install the Processor: 1. 2. 3. 4. Remove the battery Remove the system memory Remove the processor Install the processor 2 - 4 Disassembly Steps page 2 - 5 page 2 - 10 page 2 - 14 page 2 - 16 1. Remove the battery 2. Remove the keyboard 3. Remove the wireless LAN page 2 - 5 page 2 - 10 page 2 - 17 To remove the 3G: 1. Remove the battery 2. Remove the 3G page 2 - 5 page 2 - 18 To remove and install the Video Card: 1. Remove the battery 2. Remove the video card 3. Install the video card page 2 - 5 page 2 - 19 page 2 - 20 Disassembly Removing the Battery 1. 2. 3. 4. Turn the computer off, and turn it over. Slide the latch 1 in the direction of the arrow (Figure 1a). Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a). Lift the battery 63 out in the direction of the arrow 4 (Figure 1b & Figure 1c). a. Figure 1 Battery Removal a. Slide the latch and hold in place. b. Lift the battery out in the direction of the arrow. c. 2.Disassembly 2 1 b. 4 3 3 3. Battery Removing the Battery 2 - 5 Disassembly Figure 2 HDD Assembly Removal a. Locate the HDD bay cover and remove the screws. b. Remove the hard disk bay cover by levering the cover at point 3 . Removing the Hard Disk Drive The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk. Hard Disk Upgrade Process 1. Turn off the computer, and remove the battery (page 2 - 5). 2. Locate the hard disk bay cover and emove screws 1 - 2 (Figure 2a). 3. Remove the hard disk bay cover by levering the cover at point 3 (Figure 2b). 2.Disassembly a. b. 3 1 2 3 HDD System Warning New HDD’s are blank. Before you begin make sure: You have backed up any data you want to keep from your old HDD. • 2 Screws You have all the CD-ROMs and FDDs required to install your operating system and programs. If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan to install. Copy these to a removable medium. 2 - 6 Removing the Hard Disk Drive Disassembly 4. 5. 6. 7. Slide the HDD assembly in the direction of the arrow 4 (Figure 3c). Remove the hard disk assembly 65 (Figure 3d). Remove screws 6 & 7 and the insulation plate 68 (Figure 3e). Reverse the process to install a new hard disk (do not forget to replace all the screws and covers). c. d. e. Figure 3 HDD Assembly Removal (cont’d.) 7 4 8 c. Slide the HDD assembly in the direction of the arrow. d. Remove the hard disk assembly. e. Remove the screws and the insulation plate. 2.Disassembly 6 5 5. HDD 8. HDD Insulation Plate • 2 Screws Removing the Hard Disk Drive 2 - 7 Disassembly Figure 4 Inserting the Hard Disk Into the HDD Bay 1. Make sure the HDD assembly is aligned with the black taped area 1 (Figure 4a). 2. When aligned, carefully insert the HDD assembly 2 into the case so that the connectors line up (Figure 4a). 3. Replace the hard disk bay covers and screws. a. 1 1 2.Disassembly a. Make sure the HDD assembly is aligned with the black taped area. When aligned, carefully insert the HDD assembly into the case so that the connectors line up. Inserting the Hard Disk Into the HDD Bay 2 2. HDD 2 - 8 Inserting the Hard Disk Into the HDD Bay Disassembly Removing the Optical (CD/DVD) Device Figure 5 1. 2. 3. 4. Turn off the computer, and remove the battery (page 2 - 5). Locate the hard disk bay cover and remove screws 1 & 2 (Figure 5a). Remove the hard disk bay cover 63 (Figure 5b). Remove the screw at point 4 (Figure 5c), and use a screwdriver to carefully push out the optical device 65 at point 6 (Figure 5d). 5. Reverse the process to install any new optical (CD/DVD) device. c. a. Optical Device Removal a. Locate the hard disk bay cover and remove the screws. b. Remove the hard disk bay cover. c. Remove the screw. d. Use a screwdriver to carefully push the optical device out. 2.Disassembly 4 1 b. 2 d. 3. HDD Bay Cover 5. Optical Device 6 • 3 Screws 5 3 Removing the Optical (CD/DVD) Device 2 - 9 Disassembly Figure 6 RAM Module Removal a. Remove the screws. b. Slide the bottom cover until the cover and case indicators are aligned. Removing the Primary System Memory (RAM) The computer has four memory sockets for 204 pin Small Outline Dual In-line (SO-DIMM) DDR III (DDR3) type memory modules. The total memory size is automatically detected by the POST routine once you turn on your computer. Note that four SO-DIMMs are only supported by Quad-Core CPUs; Dual-Core CPUs support two SO-DIMMs maximum. Two primary memory sockets are located under component bay cover (the bottom case cover), and two secondary memory sockets are located under the keyboard (not user upgradable). If you are installing only two RAM modules then they should be installed in the primary memory sockets under the component bay cover. 2.Disassembly Note that the RAM located under the keyboard is not user upgradable. Contact your service center for more information if you wish to upgrade the memory in the secondary memory sockets. Memory Upgrade Process 1. Turn off the computer, and turn it over, remove the battery (page 2 - 5). 2. Remove screws 1 - 4 (Figure 6a). 3. Slide the bottom cover until the cover and case indicators 5 are aligned (Figure 6b). a. b. 2 1 4 3 5 • 4 Screws 2 - 10 Removing the Primary System Memory (RAM) Disassembly 4. Lift the component bay cover 6 off the computer case. The modules will be visible at point 7 (Figure 7c). 5. Gently pull the two release latches ( 8 & 9 ) on the sides of the memory socket(s) in the direction indicated below (Figure 7d). 6. The RAM module 10 will pop-up, and you can remove it (Figure 7e). 7. Pull the latches to release the second module if necessary. 8. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot. 9. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it will go. DO NOT FORCE the module; it should fit without much pressure. 10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. 11. Replace the bay cover and screws. 12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up. e. c. c. Lift the component bay cover off the computer case. The modules will be visible at point 7 . d. Gently pull the two release latches on the sides of the memory socket(s) in the direction indicated below. e. The RAM module will pop-up, and you can remove it. 10 7 d. Contact Warning 8 9 8 9 Be careful not to touch the metal pins on the module’s connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the module’s performance. 6. Component Bay Cover 10. RAM Module Removing the Primary System Memory (RAM) 2 - 11 2.Disassembly 6 Figure 7 RAM Module Removal (cont’d.) Disassembly Figure 8 2.Disassembly RAM Module Removal a. Remove the component bay cover. b. Use the small tool provided to carefully push out the top cover module. c. Remove the top cover module. d. Remove the screws. e. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable. Removing the System Memory (RAM) from Under the Keyboard The computer has four memory sockets for 204 pin Small Outline Dual In-line (SO-DIMM) DDR III (DDR3) type memory modules. The total memory size is automatically detected by the POST routine once you turn on your computer. Note that four SO-DIMMs are only supported by Quad-Core CPUs; Dual-Core CPUs support two SO-DIMMs maximum. Two primary memory sockets are located under component bay cover (the bottom case cover), and two secondary memory sockets are located under the keyboard. If you are installing only two RAM modules then they should be installed in the primary memory sockets under the component bay cover. Memory Upgrade Process 1. 2. 3. 4. a. Remove screws 1 - 4 . Use the small tool A provided (see picture below) to carefully push out the top cover module at point B . Remove the top cover module C and remove screws 5 - 9 . Carefully lift the keyboard D up, being careful not to bend the keyboard ribbon cable 10 . 2 1 c. 3 C 4 d. b. 5 C. Top Cover Module D. Keyboard A 6 7 e. B 10 • 9 Screws D Top Cover Module Tool 2 - 12 Removing the System Memory (RAM) from Under the Keyboard 8 9 Disassembly 5. Disconnect the keyboard ribbon cable 10 from the locking collar socket 11 by using a small flat-head screwdriver to pry the locking collar pins 12 away from the base. (Figure 9c). 6. Remove the keyboard and the memory sockets 13 & 14 will be visible. 7. Gently pull the two release latches ( 15 & 16 ) on the sides of the memory socket(s) in the direction indicated below. 8. The RAM module 17 will pop-up, and you can remove it. 9. Pull the latches to release the second module if necessary. 10. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot. 11. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it will go. DO NOT FORCE the module; it should fit without much pressure. 12. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. 13. Replace the bay cover and screws. 14. Restart the computer to allow the BIOS to register the new memory configuration as it starts up. 15 10 12 11 12 15 17 16 17 16 f. Disconnect the keyboard ribbon cable from the locking collar socket by using a small flat-head screwdriver to pry the locking collar pins away from the base. g. Remove the keyboard and the memory sockets will be visible. h. Gently pull the two release latches on the sides of the memory socket(s) in the direction indicated below. g. 13 14 Contact Warning Be careful not to touch the metal pins on the module’s connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the module’s performance. 17. RAM Modules Removing the System Memory (RAM) from Under the Keyboard 2 - 13 2.Disassembly h. f. Figure 9 RAM Module Removal (cont’d.) Disassembly Figure 10 Processor Removal Procedure 2.Disassembly a. Remove the screws in the correct order. b. Carefully remove the heat sink unit. Removing and Installing the Processor Processor Removal Procedure 1. Turn off the computer, remove the battery (page 2 - 5), and component bay cover (page 2 - 10). 2. Remove screws 1 - 4 from the heat sink unit in the order indicated on the label (i.e screw 4 first through to screw 1 last Figure 10a). 3. Carefully (it may be hot) remove the heat sink unit 5 (Figure 10b). a. 2 1 4 3 Note: Loosen the screws in the reverse order 4-3-2-1 as indicated on the label. CPU Warning In order to prevent damaging the contact pins when removing the CPU, it is necessary to first remove the WLAN module from the computer. b. 5. Heat Sink Unit • 4 Screws 2 - 14 Removing and Installing the Processor 5 Disassembly 4. 5. 6. 7. Turn the release latch 6 towards the unlock symbol , to release the CPU (Figure 11c). Carefully (it may be hot) lift the CPU A up out of the socket (Figure 11d). See page 2 - 16 for information on inserting a new CPU. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!). Figure 11 Processor Removal (cont’d) c. Turn the release latch to unlock the CPU. d. Lift the CPU out of the socket. c. 2.Disassembly 6 6 Unlock Lock A d. Caution The heat sink, and CPU area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts. A. CPU Removing and Installing the Processor 2 - 15 Disassembly Figure 12 Processor Installation a. Insert the CPU. b. Turn the release latch towards the lock symbol. c. Remove the sticker from the heat sink unit and insert the heat sink. d. Tighten the screws. Processor Installation Procedure 1. Insert the CPU A , pay careful attention to the pin alignment (Figure 12a), it will fit only one way (DO NOT FORCE IT!), and turn the release latch B towards the lock symbol (Figure 12b). 2. Remove the sticker C (Figure 12c) from the heat sink unit. 3. Insert the heat sink unit D as indicated in Figure 12c. 4. Tighten the CPU heat sink screws in the order 1 , 2 , 3 & 4 (the order as indicated on the label and Figure 12d). 5. Replace the CPU fan, component bay cover and tighten the screws (page 2 - 14). a. c. C 2.Disassembly A D Note: Tighten the screws in the order 1-23-4 as indicated on the label. b. d. A. CPU D. Heat Sink • 4 Screws 2 1 4 3 B 2 - 16 Removing and Installing the Processor Disassembly Removing the Wireless LAN Module Figure 13 Turn off the computer, remove the battery (page 2 - 5) and the keyboard (page 2 - 12). The Wireless LAN module will be visible at point 1 under the keyboard (Figure 13a). Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket (Figure 13b). The Wireless LAN module 5 will pop-up (Figure 13c). Lift the Wireless LAN module (Figure 13d) up and off the computer. 1. 2. 3. 4. 5. c. a. a. The Wireless LAN module will be visible at point 1 under the keyboard b. Disconnect the cables and remove the screw. c. The WLAN module will pop up. d. Lift the WLAN module out. 2.Disassembly 1 Wireless LAN Module Removal 5 b. d. 4 3 5 5. WLAN Module 2 • 1 Screw Removing the Wireless LAN Module 2 - 17 Disassembly Figure 14 3G Module Removal Removing the 3G Module 1. 2. a. Remove the screw. 3. b. Disconnect the cable and 4. remove the screw. Turn off the computer, remove the battery (page 2 - 5), and component bay cover (page 2 - 10). Locate the 3G, it is visible at point 1 (Figure 14a). Carefully disconnect the cable 2 and remove screw 3 from the 3G module (Figure 14b). Lift the 3G module 4 up and off the computer (Figure 14b). c. Lift the 3G module up off the socket. c. a. 2.Disassembly 4 1 d. b. 3 4 2 4. 3G Module • 1 Screw 2 - 18 Removing the 3G Module Disassembly Removing and Installing the Video Card Figure 15 Video Card Removal Procedure Turn off the computer, turn it over and remove the battery (page 2 - 5) and component cover (page 2 - 10). Remove screws 1 - 7 from the heat sink unit in the order indicated on the label (i.e screw 7 first through to screw 1 last) (Figure 15a). 3. Carefully (it may be hot) remove the heat sink units 8 & 9 (Figure 15b). 4. Remove screws 10 & 11 from the video card. The video card 12 will pop up (Figure 15c). 5. Remove the video card 12 (Figure 15d). a. c. 1. 2. c. a. Remove the screws in the correct order. b. Carefully remove the heat sink units. c. Remove the video card screws. The video card will pop up. d. Remove the video card. 12 2 11 10 9 1 4 6 5 Note: 7 Caution Please use a hexagonal screwdriver to remove screws 10 & 11 . d. d. b. 9 8 The heat sink, and video card area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts. Heat Sink Screw Removal and Insertion 15 Remove the screws from the heat sink in the order indicated here: 7-6-5-4-3-2-1. 12 When tightening the screws, make sure that they are tightened in the order: 1-2-3-4-5-6-7. 8 & 9.Heat Sink Units 12. Video Card • 9 Screws Removing and Installing the Video Card 2 - 19 2.Disassembly 3 Video Card Removal Procedure Disassembly Figure 16 Installing a New Video Card e. Insert the video card at a 30 degree angle. f. Fit the connectors straight and even, and secure the card with screws 10 & 11 . Installing a New Video Card Prepare to fit the video card 12 into the slot by holding it at about a 30° angle (Figure 16e). The card needs to be fully into the slot, and the video card and socket have a guide-key and pin which align to allow the card to fit securely (Figure 16f). Fit the connectors firmly into the socket, straight and evenly. 1. 2. 3. e. f. 10 2.Disassembly 12 11 Caution The heat sink, and video card area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts. 4. DO NOT attempt to push one end of the card in ahead of the other. 5. The card’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket as it will go (none of the gold colored contact should be showing). DO NOT FORCE the card; it should fit without much pressure. 6. Secure the card with screws 10 & 11 (Figure 15 on page 2 - 19). 7. Place the heat sink back on the card, and secure the screws in the order indicated in Figure 15 on page 2 - 19. 8. Attach the video card fan and secure with the screws as indicated in Figure 15 on page 2 - 19. 9. Reinsert the component bay cover, and secure with the screws as indicated in Figure 8 on page 2 - 12. 12. Video Card • 2 Screws 2 - 20 Removing and Installing the Video Card Part Lists Appendix A: Part Lists This appendix breaks down the P150HM/P151HM1 series notebook’s construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings. Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure to cross-check any relevant documentation. Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the total number of duplicated parts used. A.Part Lists Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers. A - 1 Part Lists Part List Illustration Location The following table indicates where to find the appropriate part list illustration. Table A- 1 A.Part Lists Part List Illustration Location A - 2 Part List Illustration Location Parts W870CU Top with Fingerprint page A - 3 Top without Fingerprint page A - 4 Bottom page A - 5 LCD page A - 6 COMBO page A - 7 DVD-Dual Drive page A - 8 2nd HDD page A - 9 Part Lists Top with Fingerprint Figure A - 1 Top with Fingerprint A - 3 A.Part Lists Top with Fingerprint Part Lists Top without Fingerprint A.Part Lists Figure A - 2 Top without Fingerprint A - 4 Top without Fingerprint Part Lists Bottom Figure A - 3 Bottom A - 5 A.Part Lists Bottom Part Lists LCD A.Part Lists Figure A - 4 LCD A - 6 LCD Part Lists COMBO Figure A - 5 (祥和) COMBO A - 7 A.Part Lists COMBO Part Lists DVD-Dual Drive A.Part Lists Figure A - 6 DVD-Dual Drive (祥和) A - 8 DVD-Dual Drive Part Lists 2nd HDD Figure A - 7 2nd HDD A - 9 A.Part Lists 2nd HDD A.Part Lists Part Lists A - 10 Schematic Diagrams Appendix B: Schematic Diagrams This appendix has circuit diagrams of the P150HM/P151HM1 notebook’s PCB’s. The following table indicates where to find the appropriate schematic diagram. Diagram - Page Diagram - Page Diagram - Page Table B - 1 Schematic Diagrams CougarPoint - M 4/9 - Page B - 22 Power 1.8VS - Page B - 42 Processor 1/7 - Page B - 3 CougarPoint - M 5/9 - Page B - 23 Power V-Core 1 - Page B - 43 Processor 2/7 - Page B - 4 CougarPoint - M 6/9 - Page B - 24 Power V-Core 2 - Page B - 44 Processor 3/7 - Page B - 5 CougarPoint - M 7/9 - Page B - 25 AC_In, Charger - Page B - 45 Processor 4/7 - Page B - 6 CougarPoint - M 8/9 - Page B - 26 Power 0.85VS - Page B - 46 Processor 5/7 - Page B - 7 CougarPoint - M 9/9 - Page B - 27 Audio Jack - Page B - 47 Processor 6/7 - Page B - 8 3G, CCD - Page B - 28 X5100 ODD Board - Page B - 48 Processor 7/7 - Page B - 9 Mini PCIE, LID - Page B - 29 X5100 Click Board - Page B - 49 DDRIII CHA SO-DIMM_0 - Page B - 10 LED, Hotkey, LID SW, Fan - Page B - 30 X5100 LED 1 Board - Page B - 50 DDRIII CHA SO-DIMM_1 - Page B - 11 RJ 45 - Page B - 31 X5100 LED 2 Board - Page B - 51 DDRIII CHB SO-DIMM_0 - Page B - 12 Codec Realtek ALC892 - Page B - 32 X5100 LED 3 Board - Page B - 52 Version Note DDRIII CHB SO-DIMM_1 - Page B - 13 APA2010D1-TPA2008D2 - Page B - 33 X7100 HDD & ODD Board - Page B - 53 MXM PCI-E - Page B - 14 KBC-ITE IT8519 - Page B - 34 CIR - Page B - 54 Panel, Inverter, CRT - Page B - 15 USB, TP, FP, MULTI-CONN - Page B - 35 X7100 LED Board - Page B - 55 1394_JMB380C - Page B - 16 Card Reader (JMC 251C) - Page B - 36 X7100 Click Board - Page B - 56 DVI - Page B - 17 USB 3.0 - Page B - 37 X7100 Fingerprint Board - Page B - 57 HDMI - Page B - 18 VDD3, VDD5 - Page B - 38 TPM - Page B - 58 CougarPoint - M 1/9 - Page B - 19 5V, 3.3V, 5VS, 3VS, 1.5VS, VIN1 - Page B - 39 X5100 HDD Board - Page B - 59 CougarPoint - M 2/9 - Page B - 20 Power 1.05VS, 1.05VS_VTT - Page B - 40 CougarPoint - M 3/9 - Page B - 21 Power 1.5V/VTT_MEM - Page B - 41 B.Schematic Diagrams System Block Diagram - Page B - 2 The schematic diagrams in this chapter are based upon version 6-7P-X510D-001. If your mainboard (or other boards) are a later version, please check with the Service Center for updated diagrams (if required). B - 1 Schematic Diagrams System Block Diagram AUDIO BOARD Huron River System Block Diagram PHONE JACK x4, USB x1 Clock Generator SLG8SP585 X5100M Audio BOARD PCIE*16 CLICK & FINGER PRINTER BOARD Sandy Bridge MXM 3.0 0.1"~13 0.5"~5.5" X7100 ODD & 2nd HDD BOARD AC_IN,CHARGER LINE IN USB PORT CIR BOARD SPDIF OUT AUDIO BOARD INT MIC 32.768 KHz EC ITE 8519BX LPC 0.5"~11" 33 MHz HP OUT MIC IN 0.85VS CougarPoint Controller Hub (PCH) (RESERVE) SPI TOUCH PAD VCORE, VGFX_CORE <=8" <15" DVII CONNECTOR HDMI Connector 5V,3.3V,5VS,3VS, 1.5VS,VIN1 DMI*4 FDI LED BOARD 1.05VS,1.05VS_VTT 1.8VS DDRIII SO-DIMM*4 SHEET 10~13 1.5V,(VTT_MEM) FBVDDQ SYSTEM SMBUS LCD CON NECTOR B.Schematic Diagrams (RESERVE) rPGA989/988 Function LED BOARD Sheet 1 of 58 System Block Diagram 800/1067/1333 MHz DDR3 / 1.5V PROCESSOR POWER LED BOARD Indicatory VDD3,VDD5 14.318 MHz Azalia Codec REALTEK ALC892 27x27mm 989 Ball FCBGA AMP TI TPA2008D2 INT SPKER Front L Front R AMP TI TPA2008D2 SURR L SURR R AMP TI TPA2008D2 BIOS SPI 24 MHz CENTER SUBWOOFER AZALIA LINK EC SMBUS INT. K/B THERMAL SENSOR SMART FANx2 G711 SMART BATTERY AC-IN SATA I/II 3.0Gb/s PCIE 100 MHz <12" 32.768KHz USB2.0 <12" 480 Mbps Mini PCIE SOCKET 3G CARD (USB2) Mini PCIE SOCKET WLAN USB3.0 uPD720200 (USB3) JMICRO JMC251C CARD LAN READER 1"~16" SATA HDD eSATA USB PORT CCD (USB9) USB PORT (USB1) (USB5) 3D IR (USB6) X5100M(USB0) Audio BOARD X5100M FINGER PRINTER(USB4) ON CLICK BOARD USB3.0 USB3.0 PORT PORT FingerPrint X7100M ODD& 2nd HDD BOARD X5100M ODD BOARD (Optional) 12 MHz P150HM-D03 B - 2 System Block Diagram RJ-45 7IN1 SOCKET JMICRO JMB380C 25 MHz 1394 PORT Schematic Diagrams Processor 1/7 Sandy Bridge Processor 1/7 ( DMI,PEG,FDI ) 1. 0 5 V S _ V T T U 3 2A D M I _T X P 0 D M I _T X P 1 D M I _T X P 2 D M I _T X P 3 21 21 21 21 D D D D MI _ R MI _ R MI _ R MI _ R XN XN XN XN 21 21 21 21 D D D D MI _ R MI _ R MI _ R MI _ R XP 0 XP 1 XP 2 XP 3 B2 8 B2 6 A2 4 B2 3 G2 1 E2 2 F21 D2 1 0 1 2 3 G2 2 D2 2 F20 C2 1 A2 1 H1 9 E1 9 F18 B2 1 C2 0 D1 8 E1 7 A2 2 G1 9 E2 0 G1 8 B2 0 C1 9 D1 9 F17 1. 0 5 V S _ V T T R 42 0 J1 8 J1 7 1 K_ 0 4 P E G _I C OM P I P E G_ I C OM P O P E G _ R C OM P O MI _ R X # [ 0 ] MI _ R X # [ 1 ] MI _ R X # [ 2 ] MI _ R X # [ 3 ] D MI _ R X [ 0 ] D MI _ R X [ 1 ] D MI _ R X [ 2 ] D MI _ R X [ 3 ] D D D D MI _ T X# [ 0 ] MI _ T X# [ 1 ] MI _ T X# [ 2 ] MI _ T X# [ 3 ] D D D D MI _ T X[ 0 ] MI _ T X[ 1 ] MI _ T X[ 2 ] MI _ T X[ 3 ] FD FD FD FD FD FD FD FD I 0 _T X # [ 0] I 0 _T X # [ 1] I 0 _T X # [ 2] I 0 _T X # [ 3] I 1 _T X # [ 0] I 1 _T X # [ 1] I 1 _T X # [ 2] I 1 _T X # [ 3] FD FD FD FD FD FD FD FD I 0 _T X [ 0 ] I 0 _T X [ 1 ] I 0 _T X [ 2 ] I 0 _T X [ 3 ] I 1 _T X [ 0 ] I 1 _T X [ 1 ] I 1 _T X [ 2 ] I 1 _T X [ 3 ] F D I 0 _F S Y N C F D I 1 _F S Y N C H2 0 F D I_ INT DP Compensation Signal R 31 8 *0 _ 04 A1 8 A1 7 B1 6 C1 5 D1 5 CAD NOTE: DP_COMPIO and ICOMPO signals should be shorted near balls and routed with - typical impedance < 25 mohms C1 7 F16 C1 6 G1 5 C1 8 E1 6 D1 6 F15 F D I 0 _L S Y N C F D I 1 _L S Y N C e D P _C OM P I O e D P _I C OM P O e D P _H P D e D P _A U X e D P _A U X # e DP e DP e DP e DP _T X [ 0 ] _T X [ 1 ] _T X [ 2 ] _T X [ 3 ] e DP e DP e DP e DP _T X # [ 0] _T X # [ 1] _T X # [ 2] _T X # [ 3] eDP J1 9 H1 7 R 31 5 2 4 . 9_ 1 % _0 4 PCI EXPRESS* - GRAPHICS 21 21 21 21 D D D D DMI I _T X N 0 I _T X N 1 I _T X N 2 I _T X N 3 P E G_ R X# [ 0 ] P E G_ R X# [ 1 ] P E G_ R X# [ 2 ] P E G_ R X# [ 3 ] P E G_ R X# [ 4 ] P E G_ R X# [ 5 ] P E G_ R X# [ 6 ] P E G_ R X# [ 7 ] P E G_ R X# [ 8 ] P E G_ R X# [ 9 ] P E G _R X #[ 10 ] P E G _R X #[ 11 ] P E G _R X #[ 12 ] P E G _R X #[ 13 ] P E G _R X #[ 14 ] P E G _R X #[ 15 ] P E G_ R X [ 0 ] P E G_ R X [ 1 ] P E G_ R X [ 2 ] P E G_ R X [ 3 ] P E G_ R X [ 4 ] P E G_ R X [ 5 ] P E G_ R X [ 6 ] P E G_ R X [ 7 ] P E G_ R X [ 8 ] P E G_ R X [ 9 ] P E G_ R X[ 10 ] P E G_ R X[ 11 ] P E G_ R X[ 12 ] P E G_ R X[ 13 ] P E G_ R X[ 14 ] P E G_ R X[ 15 ] P E G_ T X# [ 0 ] P E G_ T X# [ 1 ] P E G_ T X# [ 2 ] P E G_ T X# [ 3 ] P E G_ T X# [ 4 ] P E G_ T X# [ 5 ] P E G_ T X# [ 6 ] P E G_ T X# [ 7 ] P E G_ T X# [ 8 ] P E G_ T X# [ 9 ] P E G_ T X #[ 10 ] P E G_ T X #[ 11 ] P E G_ T X #[ 12 ] P E G_ T X #[ 13 ] P E G_ T X #[ 14 ] P E G_ T X #[ 15 ] P E G _ TX [ 0 ] P E G _ TX [ 1 ] P E G _ TX [ 2 ] P E G _ TX [ 3 ] P E G _ TX [ 4 ] P E G _ TX [ 5 ] P E G _ TX [ 6 ] P E G _ TX [ 7 ] P E G _ TX [ 8 ] P E G _ TX [ 9 ] P E G_ T X[ 10 ] P E G_ T X[ 11 ] P E G_ T X[ 12 ] P E G_ T X[ 13 ] P E G_ T X[ 14 ] P E G_ T X[ 15 ] P E G _ I R C OM P _R R 95 2 4. 9 _ 1 %_ 0 4 K3 3 M 35 L34 J35 J32 H 34 H 31 G 33 G 30 F35 E3 4 E3 2 D 33 D 31 B3 3 C 32 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _ R X # _0 _ R X # _1 _ R X # _2 _ R X # _3 _ R X # _4 _ R X # _5 _ R X # _6 _ R X # _7 _ R X # _8 _ R X # _9 _ R X # _1 0 _ R X # _1 1 _ R X # _1 2 _ R X # _1 3 _ R X # _1 4 _ R X # _1 5 C C C C C C C C C C C C C C C C 43 3 46 7 43 1 46 5 44 7 46 3 44 5 46 1 44 3 45 9 44 1 45 7 43 9 45 5 43 7 45 3 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _ RX N0 1 4 _ RX N1 1 4 _ RX N2 1 4 _ RX N3 1 4 _ RX N4 1 4 _ RX N5 1 4 _ RX N6 1 4 _ RX N7 1 4 _ RX N8 1 4 _ RX N9 1 4 _ RX N1 0 1 4 _ RX N1 1 1 4 _ RX N1 2 1 4 _ RX N1 3 1 4 _ RX N1 4 1 4 _ RX N1 5 1 4 J33 L35 K3 4 H 35 H 32 G 34 G 31 F33 F30 E3 5 E3 3 F32 D 34 E3 1 C 33 B3 2 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _ RX _ 0 _ RX _ 1 _ RX _ 2 _ RX _ 3 _ RX _ 4 _ RX _ 5 _ RX _ 6 _ RX _ 7 _ RX _ 8 _ RX _ 9 _ R X _ 10 _ R X _ 11 _ R X _ 12 _ R X _ 13 _ R X _ 14 _ R X _ 15 C C C C C C C C C C C C C C C C 43 4 46 8 43 2 46 6 44 8 46 4 44 6 46 2 44 4 46 0 44 2 45 8 44 0 45 6 43 8 45 4 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _ RX P 0 1 4 _ RX P 1 1 4 _ RX P 2 1 4 _ RX P 3 1 4 _ RX P 4 1 4 _ RX P 5 1 4 _ RX P 6 1 4 _ RX P 7 1 4 _ RX P 8 1 4 _ RX P 9 1 4 _ R X P 1 0 14 _ R X P 1 1 14 _ R X P 1 2 14 _ R X P 1 3 14 _ R X P 1 4 14 _ R X P 1 5 14 M 29 M 32 M 31 L32 L29 K3 1 K2 8 J30 J28 H 29 G 27 E2 9 F27 D 28 F26 E2 5 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _ TX # _ 0 _ TX # _ 1 _ TX # _ 2 _ TX # _ 3 _ TX # _ 4 _ TX # _ 5 _ TX # _ 6 _ TX # _ 7 _ TX # _ 8 _ TX # _ 9 _ TX # _ 10 _ TX # _ 11 _ TX # _ 12 _ TX # _ 13 _ TX # _ 14 _ TX # _ 15 C C C C C C C C C C C C C C C C 64 86 66 68 88 70 90 72 92 74 94 76 96 78 98 80 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N M 28 M 33 M 30 L31 L28 K3 0 K2 7 J29 J27 H 28 G 28 E2 8 F28 D 27 E2 6 D 25 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _ TX _ 0 _ TX _ 1 _ TX _ 2 _ TX _ 3 _ TX _ 4 _ TX _ 5 _ TX _ 6 _ TX _ 7 _ TX _ 8 _ TX _ 9 _ TX _ 1 0 _ TX _ 1 1 _ TX _ 1 2 _ TX _ 1 3 _ TX _ 1 4 _ TX _ 1 5 C C C C C C C C C C C C C C C C 63 85 65 67 87 69 89 71 91 73 93 75 95 77 97 79 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG _ TX P 0 1 4 _ TX P 1 1 4 _ TX P 2 1 4 _ TX P 3 1 4 _ TX P 4 1 4 _ TX P 5 1 4 _ TX P 6 1 4 _ TX P 7 1 4 _ TX P 8 1 4 _ TX P 9 1 4 _ TX P 1 0 1 4 _ TX P 1 1 1 4 _ TX P 1 2 1 4 _ TX P 1 3 1 4 _ TX P 1 4 1 4 _ TX P 1 5 1 4 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PEG Compensation Signal CAD NOTE: PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with - max length = 500 mils - typical impedance = 14.5 mohms 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 Sheet 2 of 58 Processor 1/7 Analog Thermal Sensor P Z 98 9 2 7-3 6 4 1 -01 F Q 41 5 GN D 1 2 N C GN D 4 SC70-5 & SC70-3 Co Lay 3 V CC VO *T M P 2 0 3 .3 V 2 Q2 0 VC C 1 O UT 3 C 4 52 G ND 0 . 1 u _1 0 V _ X 7R _ 04 G 71 1 S T 9U 1 :2 ( 4mi ls :8 mi ls ) T H E R M_ V O L T 3 4 4 , 6, 24 , 2 5 , 26 , 4 0 , 4 3 1 . 0 5 V S _ V T T 4 , 9, 1 4 , 1 5 , 19 , 2 0 , 2 1, 2 3 , 2 4, 25 , 2 6 , 28 , 2 9 , 3 0, 3 2 , 3 5, 36 , 3 7 , 39 , 4 0 , 4 1, 4 2 3 . 3 V C4 5 1 0. 1u _ 1 0V _ X 7 R _ 0 4 1 3 PLACE NEAR U3 2 Processor 1/7 B - 3 B.Schematic Diagrams DM DM DM DM Intel(R) FDI B2 7 B2 5 A2 5 B2 4 21 21 21 21 20 mil J22 J21 H 22 Schematic Diagrams Processor 2/7 Sandy Bridge Processor 2/7 ( CLK,MISC,JTAG ) PU /P D fo r JT AG s ig na ls 1 . 0 5 V S _ V TT XD XD XD XD XD XD S NB _ IV B # A N3 4 S K T OC C # AL 3 3 H _C A T E R R # A N3 3 *1 0m i l _s h o rt PECI Add to connect to EC R 52 43 H _P R OC H O T# 56 _ 0 4 R5 1 2 4 H_ T HRM T RIP # AL 3 2 H _ P R O C H OT # _D P R O C H OT # A N3 2 *1 0m i l _s h o rt T HE RM T RIP # A2 8 A2 7 P _ TM S P _ TD I_ R P_ PREQ # P _ TD O_ R P _ TC L K P _ TR S T # R R R R R R 82 76 84 30 8 30 9 67 51 _ 0 4 51 _ 0 4 *5 1 _0 4 51 _ 0 4 51 _ 0 4 51 _ 0 4 C L K _E XP _ P 2 0 C L K _E XP _ N 20 1 . 0 5V S _V T T D P LL _ R E F _ S S C L K D P L L_ R E F _S S C L K # A1 6 A1 5 S M_ R C OM P [ 0 ] S M_ R C OM P [ 1 ] S M_ R C OM P [ 2 ] R 32 2 R 32 5 1K _ 0 4 1K _ 0 4 R8 C P U D R A MR S T # AK1 A5 A4 S M_ R C O MP _ 0 S M_ R C O MP _ 1 S M_ R C O MP _ 2 AP2 9 AP2 7 X DP _ P RD Y # X D P _ P R E Q# S M_ D R A M R S T # Sheet 3 of 58 Processor 2/7 DD R3 C om pe ns at io n Si gn al s S M _R C O MP _ 0 R 4 0 9 1 4 0_ 1 % _0 4 S M _R C O MP _ 1 R 3 3 3 2 5 . 5_ 1 % _0 4 S M _R C O MP _ 2 R 3 3 4 2 0 0_ 1 % _0 4 P roc es so r Pu ll up s/ Pu ll d ow ns 1 .0 5 V S _V TT R4 1 24 H _C P U P W R GD A M3 4 *1 0m i l _s h o rt P M_ S Y N C *1 0m i l _s h o rt H _C P U P W R GD _ R AP3 3 U N C O R E P W R GO OD V D D P W R G OO D _ R V8 S M_ D R A MP W R O K Bu ff er ed r es et t o C PU 3. 3 V S 1 . 0 5 V S _ V TT A R3 3 B UF _ CP U _ RS T # RE S E T # R9 7 R 39 AR2 6 AR2 7 AP3 0 X DP _ T CL K X D P _ T MS X DP _ T RS T # AR2 8 AP2 6 X D P _ T D I_ R X D P _ T D O _R A L 35 X DP _ DB R _ R R 42 H _C P U P W R GD _ R 1 0K _ 1 % _0 4 C 44 9 R 49 0. 1u _ 16 V _ Y 5 V _ 0 4 D02A TRACE WIDTH 10MIL, LENGTH <500MILS DB R # B B B B B B B B P M# [ 0 ] P M# [ 1 ] P M# [ 2 ] P M# [ 3 ] P M# [ 4 ] P M# [ 5 ] P M# [ 6 ] P M# [ 7 ] 3 . 3V S A T 28 AR2 9 AR3 0 A T 30 AP3 2 AR3 1 A T 31 AR3 2 X DP _ D B R_ R 1 K _ 04 R 3 01 S3 c ir cu it :- D RA M_ RS T# to m em or y sh ou ld b e hi gh d ur in g S 3 1 . 5 V P Z 98 9 27 -3 6 41 -0 1 F G Q3 7 MT N 70 0 2 Z H S 3 R3 8 43 . 2 _ 1% _ 0B 4U F _ C P U _ R S T# R3 2 9 1 K _0 4 H _ P RO CHO T # R 32 7 D R4 0 MT N 7 0 0 2Z H S 3 D S 6 2 _0 4 Q 38 1 4 , 2 3, 5 8 P L T_ R S T# R5 1 1 TD I T DO H _P R OC H O T# 7 5 _0 4 D 1 0 K_ 0 4 TC K TM S T RS T # JTAG & BPM R3 0 2 21 H _P M _ S Y N C PWR MANAGEMENT P RDY # P RE Q # S *1 . 5K _1 % _ 04 Q6 C8 2 * 0 _0 4 BSS138 ( VGS 1.5V ) 6 8 P _5 0 V _ 04 G C6 0 6 8 P _5 0 V _ 0 4 R4 8 G 3 4 H _ P R OC H OT # _ E C M TN 7 00 2 Z H S 3 S 1 0 0 K _0 4 CP U DRA M RS T # Q 24 R JU 00 3 N 0 3 T 10 6 S D R 34 R3 3 1 R 3 28 G *7 5 0 _1 % _ 04 1 00 K _ 0 4 3 .3 V 1 K _0 4 D D R 3 _D R A M R S T # 1 0, 1 1 ,1 2, 13 4 . 99 K _ 1 %_ 0 4 1. 5V S _ C P U D R A M R S T _ C N TR L 9, 2 0 3 .3V R1 3 2 R1 1 7 C4 9 4 P M_ D R A M_ P W R G D R1 0 7 *4 7 n _5 0 V _ 04 R 1 18 0 _0 4 * 1 0K _ 0 4 P M_ D R A M_ P W R GD 20 0 _ 04 R 1 27 *2 0 0 _0 4 1 3 0 _0 4 D R A MP W R GD _ C P U D 2 1 P M_ D R A M_ P W R GD R 11 5 V D D P W R GO OD _ R Q 11 R1 2 8 D G Q1 0 S * MT N 7 0 0 2Z H S 3 G D S 3 9 , 4 1 +1 .5 S _ C P U _P W R GD *3 9_ 0 4 R 10 3 *MT N 70 0 2 Z H S 3 Q8 D * 10 0 K _ 04 S * 10 0 K _ 04 B - 4 Processor 2/7 * MT N 7 0 0 2Z H S 3 Q 13 G 2 5 , 3 9,4 0 , 4 1, 4 2 S U S B G S B.Schematic Diagrams THERMAL R5 0 24 , 3 4 H _ P E C I CA T E R R# BC L K B CL K # CLOCKS C2 6 DDR3 MISC P R OC _S E L E T 2 4 P RO C_ S E L E T MISC U3 2 B * MT N 7 0 0 2Z H S 3 3 . 3V S 1 0 , 1 1, 1 2 , 1 3, 14 ,1 5 , 16 , 1 7 , 18 , 1 9 ,20 , 2 1 ,23 ,2 4 , 25 ,2 6 , 2 9, 3 0 , 3 2, 3 3 ,3 4, 3 5 , 3 6,3 9 , 4 0, 43 , 5 8 3. 3 V 3 , 9 , 1 4, 15 , 1 9 ,20 , 2 1 , 23 ,2 4 , 25 ,2 6 , 28 , 2 9 , 30 , 3 2 ,3 5, 3 6 , 3 7,3 9 , 4 0, 4 1 , 4 2 1. 5 V 9 , 1 0 , 11 , 1 2 ,1 3, 2 6 ,3 0,3 7 , 3 9,4 1 1. 5 V S _ C P U 7 , 3 9 1. 0 5 V S _ V T T 3 , 6 , 2 4, 2 5 , 2 6, 4 0 , 4 3 Schematic Diagrams Processor 3/7 Sandy Bridge Processor 3/7 ( DDR3 ) U32C U32D 10,11 M_A_BS0 10,11 M_A_BS1 10,11 M_A_BS2 10,11 M_A_CAS# 10,11 M_A_RAS# 10,11 M_A_WE# AE10 AF10 V6 AE8 AD9 AF9 SA_DQ[ 0] SA_DQ[ 1] SA_DQ[ 2] SA_DQ[ 3] SA_DQ[ 4] SA_DQ[ 5] SA_DQ[ 6] SA_DQ[ 7] SA_DQ[ 8] SA_DQ[ 9] SA_DQ[ 10] SA_DQ[ 11] SA_DQ[ 12] SA_DQ[ 13] SA_DQ[ 14] SA_DQ[ 15] SA_DQ[ 16] SA_DQ[ 17] SA_DQ[ 18] SA_DQ[ 19] SA_DQ[ 20] SA_DQ[ 21] SA_DQ[ 22] SA_DQ[ 23] SA_DQ[ 24] SA_DQ[ 25] SA_DQ[ 26] SA_DQ[ 27] SA_DQ[ 28] SA_DQ[ 29] SA_DQ[ 30] SA_DQ[ 31] SA_DQ[ 32] SA_DQ[ 33] SA_DQ[ 34] SA_DQ[ 35] SA_DQ[ 36] SA_DQ[ 37] SA_DQ[ 38] SA_DQ[ 39] SA_DQ[ 40] SA_DQ[ 41] SA_DQ[ 42] SA_DQ[ 43] SA_DQ[ 44] SA_DQ[ 45] SA_DQ[ 46] SA_DQ[ 47] SA_DQ[ 48] SA_DQ[ 49] SA_DQ[ 50] SA_DQ[ 51] SA_DQ[ 52] SA_DQ[ 53] SA_DQ[ 54] SA_DQ[ 55] SA_DQ[ 56] SA_DQ[ 57] SA_DQ[ 58] SA_DQ[ 59] SA_DQ[ 60] SA_DQ[ 61] SA_DQ[ 62] SA_DQ[ 63] SA_CLK[0] SA_CLK#[0] SA_CKE[0] SA_CLK[1] SA_CLK#[1] SA_CKE[1] SA_CLK[2] SA_CLK#[2] SA_CKE[2] SA_CLK[3] SA_CLK#[3] SA_CKE[3] SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3] DDR SYSTEM MEMORY A C5 D5 D3 D2 D6 C6 C2 C3 F10 F8 G10 G9 F9 F7 G8 G7 K4 K5 K1 J1 J5 J4 J2 K2 M8 N10 N8 N7 M 10 M9 N9 M7 AG6 AG5 AK6 AK5 AH5 AH6 AJ5 AJ6 AJ8 AK8 AJ9 AK9 AH8 AH9 AL9 AL8 AP11 AN11 AL12 AM 12 AM 11 AL11 AP12 AN12 AJ14 AH14 AL15 AK15 AL14 AK14 AJ15 AH15 SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3] SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7] SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7] SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] SA_BS[0] SA_BS[1] SA_BS[2] SA_CAS# SA_RAS# SA_WE# PZ98927-3641-01F AB6 AA6 V9 AA5 AB5 V10 AB4 AA4 W9 AB3 AA3 W10 AK3 AL3 AG1 AH1 AH3 AG3 AG2 AH2 M_A_CLK_DDR0 10 M_A_CLK_DDR#0 10 M_A_CKE0 10 12,13 M _B_DQ[63:0] M _B_DQ0 M _B_DQ1 M _B_DQ2 M _B_DQ3 M _B_DQ4 M _B_DQ5 M _B_DQ6 M _B_DQ7 M _B_DQ8 M _B_DQ9 M _B_DQ10 M _B_DQ11 M _B_DQ12 M _B_DQ13 M _B_DQ14 M _B_DQ15 M _B_DQ16 M _B_DQ17 M _B_DQ18 M _B_DQ19 M _B_DQ20 M _B_DQ21 M _B_DQ22 M _B_DQ23 M _B_DQ24 M _B_DQ25 M _B_DQ26 M _B_DQ27 M _B_DQ28 M _B_DQ29 M _B_DQ30 M _B_DQ31 M _B_DQ32 M _B_DQ33 M _B_DQ34 M _B_DQ35 M _B_DQ36 M _B_DQ37 M _B_DQ38 M _B_DQ39 M _B_DQ40 M _B_DQ41 M _B_DQ42 M _B_DQ43 M _B_DQ44 M _B_DQ45 M _B_DQ46 M _B_DQ47 M _B_DQ48 M _B_DQ49 M _B_DQ50 M _B_DQ51 M _B_DQ52 M _B_DQ53 M _B_DQ54 M _B_DQ55 M _B_DQ56 M _B_DQ57 M _B_DQ58 M _B_DQ59 M _B_DQ60 M _B_DQ61 M _B_DQ62 M _B_DQ63 M_A_CLK_DDR1 10 M_A_CLK_DDR#1 10 M_A_CKE1 10 M_A_CLK_DDR2 11 M_A_CLK_DDR#2 11 M_A_CKE2 11 M_A_CLK_DDR3 11 M_A_CLK_DDR#3 11 M_A_CKE3 11 M_A_CS#0 M_A_CS#1 M_A_CS#2 M_A_CS#3 10 10 11 11 M_A_ODT0 M_A_ODT1 M_A_ODT2 M_A_ODT3 10 10 11 11 C4 G6 J3 M 6 AL6 AM8 AR12 AM15 M _A_DQS#0 M _A_DQS#1 M _A_DQS#2 M _A_DQS#3 M _A_DQS#4 M _A_DQS#5 M _A_DQS#6 M _A_DQS#7 D4 F6 K3 N6 AL5 AM9 AR11 AM14 M _A_DQS0 M _A_DQS1 M _A_DQS2 M _A_DQS3 M _A_DQS4 M _A_DQS5 M _A_DQS6 M _A_DQS7 AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7 M _A_A0 M _A_A1 M _A_A2 M _A_A3 M _A_A4 M _A_A5 M _A_A6 M _A_A7 M _A_A8 M _A_A9 M _A_A10 M _A_A11 M _A_A12 M _A_A13 M _A_A14 M _A_A15 M_A_DQS#[7:0] 10,11 M_A_DQS[ 7: 0] 10,11 M_A_A[15:0] 10,11 12,13 M_B_BS0 12,13 M_B_BS1 12,13 M_B_BS2 12,13 M_B_CAS# 12,13 M_B_RAS# 12,13 M_B_WE# C9 A7 D10 C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2 J7 J8 K10 K9 J9 J10 K8 K7 M 5 N4 N2 N1 M 4 N5 M 2 M 1 AM 5 AM 6 AR3 AP3 AN3 AN2 AN1 AP2 AP5 AN9 AT 5 AT 6 AP6 AN8 AR6 AR5 AR9 AJ11 AT 8 AT 9 AH11 AR8 AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15 AA9 AA7 R6 AA10 AB8 AB9 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] SB_CLK[0] SB_CLK#[0] SB_CKE[0] SB_CLK[1] SB_CLK#[1] SB_CKE[1] SB_CLK[2] SB_CLK#[2] SB_CKE[2] SB_CLK[3] SB_CLK#[3] SB_CKE[3] SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3] SB_ODT[0] SB_ODT[1] SB_ODT[2] SB_ODT[3] SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7] SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7] SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] SB_BS[0] SB_BS[1] SB_BS[2] SB_CAS# SB_RAS# SB_WE# AE2 AD2 R9 AE1 AD1 R10 AB2 AA2 T9 AA1 AB1 T10 AD3 AE3 AD6 AE6 AE4 AD4 AD5 AE5 M_B_CLK_DDR0 13 M_B_CLK_DDR#0 13 M_B_CKE0 13 M_B_CLK_DDR1 13 M_B_CLK_DDR#1 13 M_B_CKE1 13 M_B_CLK_DDR2 12 M_B_CLK_DDR#2 12 M_B_CKE2 12 M_B_CLK_DDR3 12 M_B_CLK_DDR#3 12 M_B_CKE3 12 M_B_CS#0 M_B_CS#1 M_B_CS#2 M_B_CS#3 13 13 12 12 M_B_ODT0 M_B_ODT1 M_B_ODT2 M_B_ODT3 13 13 12 12 D7 F3 K6 N3 AN5 AP9 AK12 AP15 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 C7 G3 J6 M3 AN6 AP8 AK11 AP14 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4 M_B_B0 M_B_B1 M_B_B2 M_B_B3 M_B_B4 M_B_B5 M_B_B6 M_B_B7 M_B_B8 M_B_B9 M_B_B10 M_B_B11 M_B_B12 M_B_B13 M_B_B14 M_B_B15 Sheet 4 of 58 Processor 3/7 M_B_DQS#[7:0] 12,13 M_B_DQS[7:0] 12,13 M_B_B[ 15:0] 12,13 PZ98927-3641-01F Processor 3/7 B - 5 B.Schematic Diagrams M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 DDR SYSTEM MEMORY B 10,11 M_A_DQ[ 63: 0] Schematic Diagrams Processor 4/7 San dy B ri dg e Pro ce ss or 4 /7 ( PO WE R ) U 32F POWE R PROC ESSO R CO RE PO WER *22u_6 . 3V _X 5R_08 22u _6.3V_X 5R_ 08 22u_6.3V _X 5R_08 C 484 C13 5 C478 C 473 C471 *22u_6 . 3V _X 5R_08 22u _6.3V_X 5R_ 08 22u_6.3V _X 5R_08 C134 22u_6.3V _X 5R_08 C 145 *22u_6.3V _X 5R_08 C483 *22u_6 . 3V _X 5R_08 C16 5 22u_6.3V _X 5R_08 C 479 C 151 C47 5 C470 C 474 C143 *10u_6.3V _X 5R_06 *10u_6.3V _X5R _06 10u_6.3V _X5 R_08 10u _6.3V_X 5R_ 08 10u_6.3V _X 5R_08 C 146 C48 2 C128 C 166 C164 *10u_6.3V _X5R _06 *10u_6 . 3V _X 5R_06 10u _6.3V_X 5R_ 08 10u_6.3V _X 5R_08 VC ORE VCC 1 VCC 2 VCC 3 VCC 4 VCC 5 VCC 6 VCC 7 VCC 8 VCC 9 VCC 10 VCC 11 VCC 12 VCC 13 VCC 14 VCC 15 VCC 16 VCC 17 VCC 18 VCC 19 VCC 20 VCC 21 VCC 22 VCC 23 VCC 24 VCC 25 VCC 26 VCC 27 VCC 28 VCC 29 VCC 30 VCC 31 VCC 32 VCC 33 VCC 34 VCC 35 VCC 36 VCC 37 VCC 38 VCC 39 VCC 40 VCC 41 VCC 42 VCC 43 VCC 44 VCC 45 VCC 46 VCC 47 VCC 48 VCC 49 VCC 50 VCC 51 VCC 52 VCC 53 VCC 54 VCC 55 VCC 56 VCC 57 VCC 58 VCC 59 VCC 60 VCC 61 VCC 62 VCC 63 VCC 64 VCC 65 VCC 66 VCC 67 VCC 68 VCC 69 VCC 70 VCC 71 VCC 72 VCC 73 VCC 74 VCC 75 VCC 76 VCC 77 VCC 78 VCC 79 VCC 80 VCC 81 VCC 82 VCC 83 VCC 84 VCC 85 VCC 86 VCC 87 VCC 88 VCC 89 VCC 90 VCC 91 VCC 92 VCC 93 VCC 94 VCC 95 VCC 96 VCC 97 VCC 98 VCC 99 VCC 100 PEG AND DDR 22u_6.3V _X 5R_08 C144 22u_6.3V _X 5R_08 C 476 2 2u_6.3V_ X5R _08 C167 *22u_6.3V _X 5R_08 C47 2 2 2u_6.3V_ X5R _08 Sheet 5 of 58 Processor 4/7 C 136 1 0u_6.3V_ X5R _08 B.Schematic Diagrams VC ORE AG 35 AG 34 AG 33 AG 32 AG 31 AG 30 AG 29 AG 28 AG 27 AG 26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD 35 AD 34 AD 33 AD 32 AD 31 AD 30 AD 29 AD 28 AD 27 AD 26 AC 35 AC 34 AC 33 AC 32 AC 31 AC 30 AC 29 AC 28 AC 27 AC 26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U 35 U 34 U 33 U 32 U 31 U 30 U 29 U 28 U 27 U 26 R 35 R 34 R 33 R 32 R 31 R 30 R 29 R 28 R 27 R 26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 VC CIO25 VC CIO26 VC CIO27 VC CIO28 VC CIO29 VC CIO30 VC CIO31 VC CIO32 VC CIO33 VC CIO34 VC CIO35 VC CIO36 VC CIO37 VC CIO38 VC CIO39 AH 13 AH 10 AG 10 AC 10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12 1.05VS_VTT 8. 5A C193 C1 75 C188 C 192 C186 22u_6.3V_X5R_08 22u_6 . 3V_X5R _08 22u_6.3V_X5R_08 22u_ 6. 3 V_X5R _08 22u_6.3V_X5R_08 C1 80 C189 C1 91 C187 C 493 C491 22u_6.3V_X5R_08 22u_6 . 3V_X5R _08 22u_6.3V_X5R_08 22u_ 6. 3 V_X5R _08 22u_6.3V_X5R_08 C492 C4 90 C168 C 185 22u_6.3V_X5R_08 22u_6 . 3V_X5R _08 22u_6.3V_X5R_08 22u_ 6. 3 V_X5R _08 C208 C4 88 C169 C 190 C176 22u_6.3V_X5R_08 22u_6 . 3V_X5R _08 22u_6.3V_X5R_08 22u_ 6. 3 V_X5R _08 22u_6.3V_X5R_08 C4 87 C198 C 489 C481 22u_6 . 3V_X5R _08 22u_6.3V_X5R_08 22u_ 6. 3 V_X5R _08 22u_6.3V_X5R_08 + 330u_ 6. 3 V_D C1 81 + E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 J23 +V1.05S_VC CP_F R8 8 *10mil_short 330u_ 6. 3 V_D 1.05VS_ VTT SVID Signals 1.05VS_VTT VIDALERT# VID SC LK VIDSOUT AJ2 9 AJ3 0 AJ2 8 H_CPU_SVIDALRT#_R H_CPU_SVIDCLK H_CPU_SVIDDAT_R 43.2_1%_04 R55 0_04 R54 H_C PU _SVIDALRT# 43 H_C PU _SVIDCL K 43 H_C PU _SVIDDAT 43 H_CPU_SVIDDAT_R 130_04 R53 VCO RE R 300 100 _04 VC ORE_VCC_SENSE 43 VC ORE_VSS_SEN SE 43 R 68 100 _04 D0 3 PZ98927-3641-01F B - 6 Processor 4/7 VC CIO1 VC CIO2 VC CIO3 VC CIO4 VC CIO5 VC CIO6 VC CIO7 VC CIO8 VC CIO9 VC CIO10 VC CIO11 VC CIO12 VC CIO13 VC CIO14 VC CIO15 VC CIO16 VC CIO17 VC CIO18 VC CIO19 VC CIO20 VC CIO21 VC CIO22 VC CIO23 VC CIO24 VC CIO40 SVID SV 48 1.05VS_VTT SENSE LINES I C CMA X M a xim um P roc es s or P ROCES SOR UNCO RE PO WER 48A CORE SUPPLY VC ORE VCC_SENSE VSS_SENSE VC CIO_SENSE VSSIO_SENSE AJ3 5 AJ3 4 1. 0 5VS_VTT R326 10_04 B10 A10 VCC IO _SENSE 40 VSSIO_ SENSE 40 R330 10_04 VCOR E 43,44 1.05VS_ VTT 3,4,24,25,26,40,43 Schematic Diagrams Processor 5/7 Sandy Bridge Processor 5/7 ( GRAPHICS POWER ) 1 .5VS_CPU POWER U32G R177 *0_04 R175 V_ SM_VREF VCCPLL 1.2A C239 + 330u_6 .3V_ D C20 5 C2 12 10u_6 .3V_ X5R_08 C21 3 1u_6. 3V_Y5V_04 B6 A6 A2 1u_6. 3V_Y5 V_04 VCCPLL1 VCCPLL2 VCCPLL3 VREF G AK3 5 AK3 4 R410 SM_VREF AL1 V_SM_VREF_ CNT C245 R178 0.1u_ 10V_X5R_04 100_0 4 *0_04 V_SM_VREF V_SM_ VREF_CNT PS_S3CNTRL_1.5S 39 DDR3 -1.5V RAILS Sheet 6 of 58 Processor 5/7 1.5 VS_CPU VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ 10A AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1 C242 C241 C2 40 10u_6.3 V_X5R_0 8 10u_6.3V_X5R_08 1 0u_6.3V_X5R_08 + C502 3 30u_6.3V_D C243 C203 C210 C206 C209 10u _6.3V_X5R_08 0. 1u_10V_X5R_04 0.1 u_10V_ X5R_04 0. 1u_10V_X5R_04 0. 1u_10V_X5R_04 SA RAIL 0.8 5VS VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8 VCCSA_SENSE FC_C22 VCCSA_ VID1 VCCSA 6A M27 M26 L 26 J 26 J 25 J 24 H26 H25 C139 C469 C1 38 10u_6.3 V_X5R_0 8 10u_6.3V_X5R_08 1 0u_6.3V_X5R_08 H23 C22 C24 + C126 330u_6. 3V_D VCCSA_SENSE 46 R3 10 *0 _04 R31 1 R3 17 10K_04 10K_ 04 VCCSA_VID0 46 VCCSA_VID1 46 PZ98927- 3641-01F 0.85VS 46 1.5VS_ CPU 4 ,39 1.8VS 16,25, 42 1.05VS_VTT 3,4, 6,24, 25,26,4 0,43 1.5V 4,9,1 0,11,1 2,13,2 6,30,37 ,39,41 Processor 5/7 B - 7 B.Schematic Diagrams 1. 8VS VAXG_SENSE VSSAXG_SENSE CAD No te: + V_S M_V RE F s hou ld hav e 1 0 m il tr ace w idt h MISC 0_04 GRAPHICS R3 21 VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54 1.8V RAIL D 02 SENSE LINES 100_0 4 AT24 AT23 AT21 AT20 AT18 AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18 AN17 AM24 AM23 AM21 AM20 AM18 AM17 AL 24 AL 23 AL 21 AL 20 AL 18 AL 17 AK24 AK23 AK21 AK20 AK18 AK17 AJ 24 AJ 23 AJ 21 AJ 20 AJ 18 AJ 17 AH24 AH23 AH21 AH20 AH18 AH17 Q15 AO3402L S D Schematic Diagrams Processor 6/7 Sandy Bridge Processor 6/7 ( GND ) B.Schematic Diagrams U 3 2H Sheet 7 of 58 Processor 6/7 AT 3 5 AT 3 2 AT 2 9 AT 2 7 AT 2 5 AT 2 2 AT 1 9 AT 1 6 AT 1 3 AT 1 0 AT7 AT4 AT3 AR 2 5 AR 2 2 AR 1 9 AR 1 6 AR 1 3 AR 1 0 AR 7 AR 4 AR 2 AP3 4 AP3 1 AP2 8 AP2 5 AP2 2 AP1 9 AP1 6 AP1 3 AP1 0 A P7 A P4 A P1 AN 3 0 AN 2 7 AN 2 5 AN 2 2 AN 1 9 AN 1 6 AN 1 3 AN 1 0 AN 7 AN 4 AM 2 9 AM 2 5 AM 2 2 AM 1 9 AM 1 6 AM 1 3 AM 1 0 AM 7 AM 4 AM 3 AM 2 AM 1 AL 3 4 AL 3 1 AL 2 8 AL 2 5 AL 2 2 AL 1 9 AL 1 6 AL 1 3 AL 1 0 AL 7 AL 4 AL 2 AK3 3 AK3 0 AK2 7 AK2 5 AK2 2 AK1 9 AK1 6 AK1 3 AK1 0 A K7 A K4 AJ 2 5 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS U3 2 I 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 P Z 98 9 2 7 -3 64 1 -0 1 F VSS V S S 81 V S S 82 V S S 83 V S S 84 V S S 85 V S S 86 V S S 87 V S S 88 V S S 89 V S S 90 V S S 91 V S S 92 V S S 93 V S S 94 V S S 95 V S S 96 V S S 97 V S S 98 V S S 99 V S S 1 00 V S S 1 01 V S S 1 02 V S S 1 03 V S S 1 04 V S S 1 05 V S S 1 06 V S S 1 07 V S S 1 08 V S S 1 09 V S S 1 10 V S S 1 11 V S S 1 12 V S S 1 13 V S S 1 14 V S S 1 15 V S S 1 16 V S S 1 17 V S S 1 18 V S S 1 19 V S S 1 20 V S S 1 21 V S S 1 22 V S S 1 23 V S S 1 24 V S S 1 25 V S S 1 26 V S S 1 27 V S S 1 28 V S S 1 29 V S S 1 30 V S S 1 31 V S S 1 32 V S S 1 33 V S S 1 34 V S S 1 35 V S S 1 36 V S S 1 37 V S S 1 38 V S S 1 39 V S S 1 40 V S S 1 41 V S S 1 42 V S S 1 43 V S S 1 44 V S S 1 45 V S S 1 46 V S S 1 47 V S S 1 48 V S S 1 49 V S S 1 50 V S S 1 51 V S S 1 52 V S S 1 53 V S S 1 54 V S S 1 55 V S S 1 56 V S S 1 57 V S S 1 58 V S S 1 59 V S S 1 60 A J 22 A J 19 A J 16 A J 13 A J 10 AJ 7 AJ 4 AJ 3 AJ 2 AJ 1 A H3 5 A H3 4 A H3 2 A H3 0 A H2 9 A H2 8 A H2 6 A H2 5 A H2 2 A H1 9 A H1 6 A H7 A H4 A G9 A G8 A G4 AF6 AF5 AF3 AF2 AE3 5 AE3 4 AE3 3 AE3 2 AE3 1 AE3 0 AE2 9 AE2 8 AE2 7 AE2 6 AE9 A D7 A C9 A C8 A C6 A C5 A C3 A C2 AB3 5 AB3 4 AB3 3 AB3 2 AB3 1 AB3 0 AB2 9 AB2 8 AB2 7 AB2 6 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2 T3 5 T3 4 T3 3 T3 2 T3 1 T3 0 T2 9 T2 8 T2 7 T2 6 P9 P8 P6 P5 P3 P2 N3 5 N3 4 N3 3 N3 2 N3 1 N3 0 N2 9 N2 8 N2 7 N2 6 M3 4 L3 3 L3 0 L2 7 L9 L8 L6 L5 L4 L3 L2 L1 K3 5 K3 2 K2 9 K2 6 J3 4 J3 1 H3 3 H3 0 H2 7 H2 4 H2 1 H1 8 H1 5 H1 3 H1 0 H9 H8 H7 H6 H5 H4 H3 H2 H1 G3 5 G3 2 G2 9 G2 6 G2 3 G2 0 G1 7 G1 1 F34 F31 F29 V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V SS1 6 1 SS1 6 2 SS1 6 3 SS1 6 4 SS1 6 5 SS1 6 6 SS1 6 7 SS1 6 8 SS1 6 9 SS1 7 0 SS1 7 1 SS1 7 2 SS1 7 3 SS1 7 4 SS1 7 5 SS1 7 6 SS1 7 7 SS1 7 8 SS1 7 9 SS1 8 0 SS1 8 1 SS1 8 2 SS1 8 3 SS1 8 4 SS1 8 5 SS1 8 6 SS1 8 7 SS1 8 8 SS1 8 9 SS1 9 0 SS1 9 1 SS1 9 2 SS1 9 3 SS1 9 4 SS1 9 5 SS1 9 6 SS1 9 7 SS1 9 8 SS1 9 9 SS2 0 0 SS2 0 1 SS2 0 2 SS2 0 3 SS2 0 4 SS2 0 5 SS2 0 6 SS2 0 7 SS2 0 8 SS2 0 9 SS2 1 0 SS2 1 1 SS2 1 2 SS2 1 3 SS2 1 4 SS2 1 5 SS2 1 6 SS2 1 7 SS2 1 8 SS2 1 9 SS2 2 0 SS2 2 1 SS2 2 2 SS2 2 3 SS2 2 4 SS2 2 5 SS2 2 6 SS2 2 7 SS2 2 8 SS2 2 9 SS2 3 0 SS2 3 1 SS2 3 2 SS2 3 3 VSS VSS2 3 4 VSS2 3 5 VSS2 3 6 VSS2 3 7 VSS2 3 8 VSS2 3 9 VSS2 4 0 VSS2 4 1 VSS2 4 2 VSS2 4 3 VSS2 4 4 VSS2 4 5 VSS2 4 6 VSS2 4 7 VSS2 4 8 VSS2 4 9 VSS2 5 0 VSS2 5 1 VSS2 5 2 VSS2 5 3 VSS2 5 4 VSS2 5 5 VSS2 5 6 VSS2 5 7 VSS2 5 8 VSS2 5 9 VSS2 6 0 VSS2 6 1 VSS2 6 2 VSS2 6 3 VSS2 6 4 VSS2 6 5 VSS2 6 6 VSS2 6 7 VSS2 6 8 VSS2 6 9 VSS2 7 0 VSS2 7 1 VSS2 7 2 VSS2 7 3 VSS2 7 4 VSS2 7 5 VSS2 7 6 VSS2 7 7 VSS2 7 8 VSS2 7 9 VSS2 8 0 VSS2 8 1 VSS2 8 2 VSS2 8 3 VSS2 8 4 VSS2 8 5 F22 F19 E3 0 E2 7 E2 4 E2 1 E1 8 E1 5 E1 3 E1 0 E9 E8 E7 E6 E5 E4 E3 E2 E1 D 35 D 32 D 29 D 26 D 20 D 17 C 34 C 31 C 28 C 27 C 25 C 23 C 10 C 1 B2 2 B1 9 B1 7 B1 5 B1 3 B1 1 B9 B8 B7 B5 B3 B2 A3 5 A3 2 A2 9 A2 6 A2 3 A2 0 A3 P Z 9 8 92 7 -3 6 4 1- 01 F 2 5, 3 9 1 .5 V S 4 , 1 0 , 1 1, 12 , 1 3 , 1 4 , 1 5, 16 , 1 7 , 1 8 , 1 9, 2 0 , 2 1 , 2 3 , 2 4, 2 5 , 2 6 , 2 9 , 30 , 3 2 , 3 3 , 3 4 , 35 , 3 6 , 3 9 , 4 0, 43 , 5 8 3 . 3 V S B - 8 Processor 6/7 Schematic Diagrams Processor 7/7 Sandy Bridge Processor 7/7 ( RESERVED ) CFG Straps for Processor PEG Static Lane Reversal - CFG2 is for the 16x U 32 E 1:(Default) Normal Operation; Lane # definition matches socket pin map definition 0:Lane Reversed CF G 2 CF G 2 R 83 * 1 K _ 04 CF G CF G CF G CF G 4 5 6 7 CFG4 CF G 4 3 .3 V R 81 * 1 K _ 04 PCIE Port Bifurcation Straps 11: 10: 01: 00: R3 1 2 1 00 K _ 0 4 CFG[6:5] (Default) x16 - Device 1 functions 1 and 2 disabled x8, x8 - Device 1 function 1 enabled ; function 2 disabled Reserved - (Device 1 function 1 disabled ; function 2 enabled) x8,x4,x4 - Device 1 functions 1 and 2 enabled H _ CP U _ RS V D 6 H _ CP U _ RS V D 7 AJ 3 1 AH 3 1 AJ 3 3 AH 3 3 AJ 2 6 B4 D 1 CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF G[ 0 ] G[ 1 ] G[ 2 ] G[ 3 ] G[ 4 ] G[ 5 ] G[ 6 ] G[ 7 ] G[ 8 ] G[ 9 ] G[ 1 0 ] G[ 1 1 ] G[ 1 2 ] G[ 1 3 ] G[ 1 4 ] G[ 1 5 ] G[ 1 6 ] G[ 1 7 ] RS RS RS RS VD1 VD2 VD3 VD4 CF G 6 R 77 RS V D6 RS V D7 * 1 K _ 04 R 74 * 1 K _ 04 PEG DEFER TRAINING 1: (Default) PEG Train immediately following xxRESETB de assertion 0: PEG Wait for BIOS for training CFG7 CF G 7 R 73 * 1 K _ 04 H _ S N B _ I V B #_ P W R C T R L R 31 3 0_04 F25 F24 F23 D 24 G 25 G 24 E2 3 D 23 C 30 A3 1 B3 0 B2 9 D 30 B3 1 A3 0 C 29 J20 B1 8 A1 9 SVD SVD SVD SVD SVD 28 29 30 31 32 R SVD 3 3 R SVD 3 4 R SVD 3 5 R SVD 3 7 R SVD 3 8 R SVD 3 9 R SVD 4 0 R R R R R SVD SVD SVD SVD SVD 41 42 43 44 45 R R R R R SVD SVD SVD SVD SVD 46 47 48 49 50 L7 A G7 AE7 AK2 W8 AT 2 6 A M3 3 AJ 2 7 T8 J 16 H1 6 G1 6 AR3 5 AT 3 4 AT 3 3 AP3 5 AR3 4 Sheet 8 of 58 Processor 7/7 RS V D5 H _S N B _ I V B #_ P W R C TR L CF G 5 R R R R R RS RS RS RS RS RS RS RS RS RS RS RS RS RS RS RS VD8 VD9 VD1 0 VD1 1 VD1 2 VD1 3 VD1 4 VD1 5 VD1 6 VD1 7 VD1 8 VD1 9 VD2 0 VD2 1 VD2 2 VD2 3 R SVD 5 1 R SVD 5 2 B3 4 A3 3 A3 4 B3 5 C3 5 AJ 3 2 AK3 2 AH2 7 R SVD 5 3 R SVD 5 4 R SVD 5 5 RS V D2 4 RS V D2 5 RS V D2 6 R SVD 5 6 R SVD 5 7 R SVD 5 8 AN3 5 A M3 5 AT 2 AT 1 AR1 J15 1. 5 V R 353 On CRB H_SNB_IVB#_PWRCTRL = low, 1.0V H_SNB_IVB#_PWRCTRL = high/NC, 1.05V *0 _ 0 4 R 362 R 35 2 0_ 0 4 R 36 0 *0 _ 04 MV R E F _ D Q_ D I MM A 1 0 , 1 1 MV R E F _ C A _ D I M MA P Z 9 8 9 2 7- 36 4 1 -0 1F 10 R 332 G R3 3 9 *1 K _ 0 4 B1 KEY 1 K_ 1 % _ 0 4 Q 25 * A O3 4 0 2L S D H_ C P U_ R S V D 6 RS V D2 7 1 K_ 1 % _ 0 4 DR A M RS T _ CN T RL 4 ,2 0 1 .5 V R 3 75 *0 _ 0 4 R3 6 9 R 3 70 * 1K _0 4 R3 8 2 G H _C P U _ R S V D 7 3 .3 V 1 .5 V 1 K _ 1% _ 0 4 Q2 6 *A O 3 4 02 L S D R3 8 0 0_04 R3 7 4 * 0 _0 4 3 , 4 , 1 4 , 15 , 1 9 , 2 0 , 2 1, 2 3 , 2 4 , 2 5, 26 , 2 8 , 2 9 , 30 , 3 2 , 3 5 , 3 6, 3 7 , 3 9 , 4 0, 41 , 4 2 4 , 1 0 , 1 1, 1 2 , 1 3 , 2 6, 30 , 3 7 , 3 9 , 41 M V R E F _ D Q _D I M MB 1 2 , 1 3 M V R E F _ C A _ D I MM B 1 2 1 K _ 1% _ 0 4 D R A MR S T _ C N T R L 4 , 2 0 Processor 7/7 B - 9 B.Schematic Diagrams Display Port Presence Strap 1:(Default) Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port AK2 8 AK2 9 AL 2 6 AL 2 7 AK2 6 AL 2 9 AL 3 0 AM 3 1 AM 3 2 AM 3 0 AM 2 8 AM 2 6 AN 2 8 AN 3 1 AN 2 6 AM 2 7 AK3 1 AN 2 9 RESERVED CFG2 Schematic Diagrams DDRIII CHA SO-DIMM_0 Channel A SO-DIMM 0 CHANGE TO STANDARD JD I M M3 A B.Schematic Diagrams 5, 1 1 M _ A _ A [ 1 5 : 0 ] M_ A _ A 0 M_ A _ A 1 M_ A _ A 2 M_ A _ A 3 M_ A _ A 4 M_ A _ A 5 M_ A _ A 6 M_ A _ A 7 M_ A _ A 8 M_ A _ A 9 M_ A _ A 1 0 M_ A _ A 1 1 M_ A _ A 1 2 M_ A _ A 1 3 M_ A _ A 1 4 M_ A _ A 1 5 La yout Not e : signa l /spa c e /si gna l: 8/4/8 109 108 79 114 121 101 103 102 104 73 74 115 110 113 C H A _ S A 0 _ D I M0 1 9 7 C H A _ S A 1 _ D I M0 2 0 1 202 200 5 , 1 1 M_ A _ B S 0 5 , 1 1 M_ A _ B S 1 5 , 1 1 M_ A _ B S 2 5 M_ A _ C S # 0 5 M_ A _ C S # 1 5 M _ A _ CL K _ D DR 0 5 M _ A _ CL K _ D DR # 0 5 M _ A _ CL K _ D DR 1 5 M _ A _ CL K _ D DR # 1 5 M_ A _ C K E 0 5 M_ A _ C K E 1 5 , 1 1 M_ A _ C A S # 5 , 1 1 M_ A _ R A S # 5 , 1 1 M_ A _ W E # Sheet 9 of 58 DDRIII CHA SODIMM _0 1 1 , 1 2 , 13 , 2 0 S M B _ C LK 1 1 , 1 2 , 13 , 2 0 S M B _ D A T A 5 5 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D 116 120 M_ A _ O D T 0 M_ A _ O D T 1 11 28 46 63 136 153 170 187 M0 M1 M2 M3 M4 M5 M6 M7 5, 11 M _ A _ D Q S [ 7 : 0 ] 3. 3V S 5 , 1 1 M_ A _ D QS # [ 7 : 0 ] R N4 1 0 K _ 8 P 4 R_ 0 4 1 8 C HA _ S A 2 7 C HA _ S A 3 6 C HA _ S A 4 5 C HA _ S A 1_ D 0_ D 1_ D 0_ D I M1 I M1 I M0 I M0 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 C H A _ S A 1 _ D I M1 1 1 C H A _ S A 0 _ D I M1 1 1 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 12 29 47 64 137 154 171 188 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 10 27 45 62 135 152 169 186 A A A A A A A A A A A A A A A A 0 1 2 3 4 5 6 7 8 9 10 / A P 11 12 / B C # 13 14 15 DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 D Q1 0 D Q1 1 D Q1 2 D Q1 3 D Q1 4 D Q1 5 D Q1 6 D Q1 7 D Q1 8 D Q1 9 D Q2 0 D Q2 1 D Q2 2 D Q2 3 D Q2 4 D Q2 5 D Q2 6 D Q2 7 D Q2 8 D Q2 9 D Q3 0 D Q3 1 D Q3 2 D Q3 3 D Q3 4 D Q3 5 D Q3 6 D Q3 7 D Q3 8 D Q3 9 D Q4 0 D Q4 1 D Q4 2 D Q4 3 D Q4 4 D Q4 5 D Q4 6 D Q4 7 D Q4 8 D Q4 9 D Q5 0 D Q5 1 D Q5 2 D Q5 3 D Q5 4 D Q5 5 D Q5 6 D Q5 7 D Q5 8 D Q5 9 D Q6 0 D Q6 1 D Q6 2 D Q6 3 B A0 B A1 B A2 S 0# S 1# C K0 C K0 # C K1 C K1 # C KE0 C KE1 C AS# R AS# W E# S A0 S A1 S CL S DA O DT 0 O DT 1 D D D D D D D D M0 M1 M2 M3 M4 M5 M6 M7 D D D D D D D D QS QS QS QS QS QS QS QS 0 1 2 3 4 5 6 7 D D D D D D D D QS QS QS QS QS QS QS QS 0# 1# 2# 3# 4# 5# 6# 7# 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q1 0 Q1 1 Q1 2 Q1 3 Q1 4 Q1 5 Q1 6 Q1 7 Q1 8 Q1 9 Q2 0 Q2 1 Q2 2 Q2 3 Q2 4 Q2 5 Q2 6 Q2 7 Q2 8 Q2 9 Q3 0 Q3 1 Q3 2 Q3 3 Q3 4 Q3 5 Q3 6 Q3 7 Q3 8 Q3 9 Q4 0 Q4 1 Q4 2 Q4 3 Q4 4 Q4 5 Q4 6 Q4 7 Q4 8 Q4 9 Q5 0 Q5 1 Q5 2 Q5 3 Q5 4 Q5 5 Q5 6 Q5 7 Q5 8 Q5 9 Q6 0 Q6 1 Q6 2 Q6 3 M _ A _ D Q [ 6 3: 0] 5 , 11 J D I MM 3 B 1 .5 V 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 3 .3 V S 20mils C 57 5 C 57 4 2 . 2 U _6 . 3 V _ X 5 R _ 0 6 0 . 1 u _1 6 V _ Y 5V _ 04 VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD D D D D D D D D D D D D D D D D D D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 199 VD D SPD 3 .3 V S R4 4 2 77 122 125 * 1 0K _0 4 198 30 1 1 , 1 2 , 1 3 TS #_ D I MM 0 _ 1 4 ,1 1 ,1 2 ,1 3 DD R3 _ DR A M RS T # 20mils C 32 5 C 33 0 2 . 2 u _ 6 . 3V _Y 5 V _ 0 6 0 . 1 u _ 1 6V _Y 5 V _ 0 4 9 , 1 1 M V R E F _ D Q _D I M MA R 4 41 9 M V R E F _ C A _ D I MM A *0 _ 0 4 M V R E F _ C A _ D I M MA _R C 57 2 2 . 2 u _ 6 . 3V _0 6 C 59 2 0 . 1 u _ 1 6V _Y 5 V _ 0 4 1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 N C1 N C2 N CT E S T E V E NT # R ESET# VR EF_ D Q VR EF_ C A VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS S1 S2 S3 S4 S5 S6 S7 S8 S9 S1 0 S1 1 S1 2 S1 3 S1 4 S1 5 VSS1 6 VSS1 7 VSS1 8 VSS1 9 VSS2 0 VSS2 1 VSS2 2 VSS2 3 VSS2 4 VSS2 5 VSS2 6 VSS2 7 VSS2 8 VSS2 9 VSS3 0 VSS3 1 VSS3 2 VSS3 3 VSS3 4 VSS3 5 VSS3 6 VSS3 7 VSS3 8 VSS3 9 VSS4 0 VSS4 1 VSS4 2 VSS4 3 VSS4 4 VSS4 5 VSS4 6 VSS4 7 VSS4 8 VSS4 9 VSS5 0 VSS5 1 VSS5 2 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 V TT _ M E M VTT1 VTT2 G1 G2 203 204 G ND 1 G ND 2 D D R S K - 20 4 0 1 -T R 5 B CLO SE TO S O- DI M M D D R S K -20 4 0 1 -T R 5 B 1 .5 V R 4 43 1 K _ 1 %_ 0 4 1 . 5V C 32 7 + 2 20 u _ 4 V _ V _ A C 709 + * 2 20 u _ 4 V _ V _ A C6 9 6 C 695 C 69 4 C5 7 7 1 0 u_ 1 0 V _ Y 5 V _ 0 8 1 0 u _1 0 V _ Y 5V _0 8 1 0 u _ 1 0V _Y 5 V _ 0 8 1u _ 6 . 3 V _ 0 4 C 5 78 C5 7 9 C 580 1 u _ 6 . 3V _0 4 1 u_ 6 . 3 V _ 0 4 1 u _ 6 . 3 V _ 04 M V R E F _ C A _D I M MA _ R C 594 1 K _ 1 % _0 4 0 . 1 u _ 1 0V _X 5 R _0 4 1 u _ 6 . 3 V _ 04 1 1 , 1 2 , 1 3, 4 1 V TT _ M E M 4 , 9 , 1 1 , 1 2 , 1 3, 2 6 , 3 0 , 3 7 , 3 9, 4 1 1 . 5 V 4 , 1 1, 1 2 , 1 3 , 1 4 , 1 5, 1 6 , 1 7 , 1 8 , 1 9, 2 0 , 2 1 , 2 3 , 2 4, 2 5 , 2 6 , 2 9 , 3 0, 3 2 , 3 3 , 3 4 , 3 5, 3 6 , 3 9 , 4 0 , 4 3, 5 8 3 . 3 V S V T T _ ME M C 576 C6 6 7 C 638 C 66 6 C5 9 5 C 6 40 C6 6 4 C 665 C5 9 3 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5V _0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 .1 u _ 1 6 V_ Y5 V_ 0 4 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5V _0 4 B - 10 DDRIII CHA SO-DIMM_0 11 C6 3 9 1 .5 V C6 6 3 M V R E F _ C A _ D I MM A _ R R 44 0 C 3 28 C3 2 4 C 3 23 1 0 u _1 0 V _ Y 5V _ 08 1u _ 6 . 3 V _ Y 5 V _ 0 4 1 u_ 6 . 3 V _ Y 5 V _0 4 C3 3 4 C 333 1 u_ 6 . 3 V _ Y 5V _0 41 u _ 6 . 3 V _ Y 5 V _ 0 4 Schematic Diagrams DDRIII CHA SO-DIMM_1 Channel A SO-DIMM 1 CHANGE TO STANDARD JD I M M1 A 5, 1 0 M _ A _ A [ 1 5 : 0 ] M_ A _ A 0 M_ A _ A 1 M_ A _ A 2 M_ A _ A 3 M_ A _ A 4 M_ A _ A 5 M_ A _ A 6 M_ A _ A 7 M_ A _ A 8 M_ A _ A 9 M_ A _ A 1 0 M_ A _ A 1 1 M_ A _ A 1 2 M_ A _ A 1 3 M_ A _ A 1 4 M_ A _ A 1 5 La yout Not e : signa l /spa c e /si gna l: 8/4/8 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D 116 120 M_ A _ O D T 2 M_ A _ O D T 3 11 28 46 63 136 153 170 187 M0 M1 M2 M3 M4 M5 M6 M7 5, 10 M _ A _ D Q S [ 7 : 0 ] 5 , 1 0 M_ A _ D QS # [ 7 : 0 ] M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 12 29 47 64 137 154 171 188 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 10 27 45 62 135 152 169 186 A A A A A A A A A A A A A A A A 0 1 2 3 4 5 6 7 8 9 10 / A P 11 12 / B C # 13 14 15 B B B S S C C C C C C C R W S S S S A0 A1 A2 0# 1# K0 K0 # K1 K1 # KE0 KE1 AS# AS# E# A0 A1 CL DA DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 D Q1 0 D Q1 1 D Q1 2 D Q1 3 D Q1 4 D Q1 5 D Q1 6 D Q1 7 D Q1 8 D Q1 9 D Q2 0 D Q2 1 D Q2 2 D Q2 3 D Q2 4 D Q2 5 D Q2 6 D Q2 7 D Q2 8 D Q2 9 D Q3 0 D Q3 1 D Q3 2 D Q3 3 D Q3 4 D Q3 5 D Q3 6 D Q3 7 D Q3 8 D Q3 9 D Q4 0 D Q4 1 D Q4 2 D Q4 3 D Q4 4 D Q4 5 D Q4 6 D Q4 7 D Q4 8 D Q4 9 D Q5 0 D Q5 1 D Q5 2 D Q5 3 D Q5 4 D Q5 5 D Q5 6 D Q5 7 D Q5 8 D Q5 9 D Q6 0 D Q6 1 D Q6 2 D Q6 3 O DT 0 O DT 1 D D D D D D D D M0 M1 M2 M3 M4 M5 M6 M7 D D D D D D D D QS QS QS QS QS QS QS QS 0 1 2 3 4 5 6 7 D D D D D D D D QS QS QS QS QS QS QS QS 0# 1# 2# 3# 4# 5# 6# 7# 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q1 0 Q1 1 Q1 2 Q1 3 Q1 4 Q1 5 Q1 6 Q1 7 Q1 8 Q1 9 Q2 0 Q2 1 Q2 2 Q2 3 Q2 4 Q2 5 Q2 6 Q2 7 Q2 8 Q2 9 Q3 0 Q3 1 Q3 2 Q3 3 Q3 4 Q3 5 Q3 6 Q3 7 Q3 8 Q3 9 Q4 0 Q4 1 Q4 2 Q4 3 Q4 4 Q4 5 Q4 6 Q4 7 Q4 8 Q4 9 Q5 0 Q5 1 Q5 2 Q5 3 Q5 4 Q5 5 Q5 6 Q5 7 Q5 8 Q5 9 Q6 0 Q6 1 Q6 2 Q6 3 M _ A _ D Q [ 6 3: 0] 5 , 10 J D I MM 1 B 1 .5 V 3 .3 VS 20mils C 60 7 C 60 3 2 . 2 U _ 6 . 3 V _ X 5R _ 0 6 0 . 1 u _1 6 V _ Y 5V _ 04 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD D D D D D D D D D D D D D D D D D D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 199 VD D SPD 3 .3 V S R4 5 3 20mils * 1 0K _0 4 198 30 1 0 , 1 2 , 1 3 TS #_ D I MM 0 _ 1 4 ,1 0 ,1 2 ,1 3 DD R3 _ DR A M RS T # C 60 4 C 60 6 2 . 2 u _ 6 . 3V _0 6 0 . 1 u _ 1 6V _Y 5 V _ 0 4 9, 10 M V R E F _ D Q _ D I MM A 1 0 MV R E F _ C A _ D I MM A _ R C 57 1 C 57 3 77 122 125 2 . 2 u _ 6 . 3V _0 6 0 . 1 u _ 1 6V _Y 5 V _ 0 4 1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 N C1 N C2 N CT ES T E V E NT # R ESET# VR EF_ D Q VR EF_ C A VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS S1 S2 S3 S4 S5 S6 S7 S8 S9 S1 0 S1 1 S1 2 S1 3 S1 4 S1 5 VSS1 6 VSS1 7 VSS1 8 VSS1 9 VSS2 0 VSS2 1 VSS2 2 VSS2 3 VSS2 4 VSS2 5 VSS2 6 VSS2 7 VSS2 8 VSS2 9 VSS3 0 VSS3 1 VSS3 2 VSS3 3 VSS3 4 VSS3 5 VSS3 6 VSS3 7 VSS3 8 VSS3 9 VSS4 0 VSS4 1 VSS4 2 VSS4 3 VSS4 4 VSS4 5 VSS4 6 VSS4 7 VSS4 8 VSS4 9 VSS5 0 VSS5 1 VSS5 2 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 Sheet 10 of 58 DDRIII CHA SODIMM _1 V TT _ M E M VTT1 VTT2 G 1 G 2 203 204 G ND 1 G ND 2 D D R S K - 20 4 0 1 -T R 4 B D D R S K -20 4 0 1 -T R 4 B 1 0 , 1 2 , 1 3, 4 1 V TT _ M E M 4 , 9 , 1 0 , 1 2 , 1 3, 2 6 , 3 0 , 3 7 , 3 9, 4 1 1 . 5 V 4 , 1 0, 1 2 , 1 3 , 1 4 , 1 5, 1 6 , 1 7 , 1 8 , 1 9, 2 0 , 2 1 , 2 3 , 2 4, 2 5 , 2 6 , 2 9 , 3 0, 3 2 , 3 3 , 3 4 , 3 5, 3 6 , 3 9 , 4 0 , 4 3, 5 8 3 . 3 V S V T T _ ME M 1 .5 V C5 8 3 C 582 C5 8 5 C 590 C 58 8 C5 8 6 C 5 84 C5 8 1 C 589 C5 8 7 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5V _0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 .1 u _ 1 6 V _ Y 5 V _ 0 4 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5V _0 4 C 3 58 C3 4 9 C 3 47 1 0 u _1 0 V _ Y 5V _ 08 1 u _6 . 3 V _ Y 5 V _ 04 1 u _ 6. 3 V _ Y 5 V _ 0 4 C3 6 7 C 365 1 u_ 6 . 3 V _ Y 5V _0 41 u _ 6 . 3 V _ Y 5 V _ 0 4 DDRIII CHA SO-DIMM_1 B - 11 B.Schematic Diagrams 109 108 79 114 121 101 103 102 104 73 74 115 110 113 CH A_ SA0 _ DI M1 1 9 7 C H A _ S A 1 _ D I M1 2 0 1 202 200 5 , 1 0 M_ A _ B S 0 5 , 1 0 M_ A _ B S 1 5 , 1 0 M_ A _ B S 2 5 M_ A _ C S # 2 5 M_ A _ C S # 3 5 M _ A _ CL K _ D DR 2 5 M _ A _ CL K _ D DR # 2 5 M _ A _ CL K _ D DR 3 5 M _ A _ CL K _ D DR # 3 5 M_ A _ C K E 2 5 M_ A _ C K E 3 5 , 1 0 M_ A _ C A S # 5 , 1 0 M_ A _ R A S # 5 , 1 0 M_ A _ W E # 1 0 C H A _S A 0 _D I M 1 1 0 C H A _S A 1 _D I M 1 1 0 , 1 2 , 13 , 2 0 S M B _ C LK 1 0 , 1 2 , 13 , 2 0 S M B _ D A T A 5 5 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 Schematic Diagrams DDRIII CHB SO-DIMM_0 Channel B SO-DIMM 0 CHANGE TO STANDARD J D I M M2 A B.Schematic Diagrams 5, 1 3 M _B _B [ 15 : 0 ] Sheet 11 of 58 DDRIII CHB SODIMM _0 5 5 5 5 CHA_DIMM0=00 CHA_DIMM1=01 M_ B _ B 0 M_ B _ B 1 M_ B _ B 2 M_ B _ B 3 M_ B _ B 4 M_ B _ B 5 M_ B _ B 6 M_ B _ B 7 M_ B _ B 8 M_ B _ B 9 M_ B _ B 1 0 M_ B _ B 1 1 M_ B _ B 1 2 M_ B _ B 1 3 M_ B _ B 1 4 M_ B _ B 1 5 109 108 79 114 121 101 103 102 104 73 74 115 110 113 CH B _ S A 0 _ DIM 0 1 9 7 CH B _ S A 1 _ DIM 0 2 0 1 202 200 5 , 1 3 M_ B _ B S 0 5 , 1 3 M_ B _ B S 1 5 , 1 3 M_ B _ B S 2 5 M_ B _ C S #2 5 M_ B _ C S #3 M _B _C L K _ D D R 2 M _B _C L K _ D D R # 2 M _B _C L K _ D D R 3 M _B _C L K _ D D R # 3 5 M _ B _C K E 2 5 M _ B _C K E 3 5, 1 3 M _B _C A S # 5, 1 3 M _B _R A S # 5, 1 3 M _B _W E # 1 0, 1 1 , 1 3 , 20 S MB _ C L K 1 0, 1 1 , 1 3 , 20 S MB _ D A TA CHB_DIMM0=10 5 5 M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D CHB_DIMM1=11 3 . 3V S 116 120 M_ B _ O D T 2 M_ B _ O D T 3 11 28 46 63 136 153 170 187 M0 M1 M2 M3 M4 M5 M6 M7 5 , 1 3 M_ B _ D Q S [ 7 : 0 ] R N 14 10 K _ 8 P 4 R _ 0 4 1 8 C HB _ S A 1 _ DI 2 7 C HB _ S A 0 _ DI 3 6 C HB _ S A 0 _ DI 4 5 C HB _ S A 1 _ DI M1 M1 M0 M0 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 C HB _ S A 1 _ DIM 1 1 3 C HB _ S A 0 _ DIM 1 1 3 5 , 1 3 M_ B _ D QS # [ 7 : 0 ] D03 M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 12 29 47 64 137 154 171 188 M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 10 27 45 62 135 152 169 186 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 1 0/ A P A1 1 A 1 2/ B C # A1 3 A1 4 A1 5 BA0 BA1 BA2 S0 # S1 # CK 0 CK 0 # CK 1 CK 1 # CK E 0 CK E 1 CA S # RA S # W E# SA0 SA1 S CL S DA OD T0 OD T1 DM DM DM DM DM DM DM DM 0 1 2 3 4 5 6 7 DQ DQ DQ DQ DQ DQ DQ DQ S0 S1 S2 S3 S4 S5 S6 S7 DQ DQ DQ DQ DQ DQ DQ DQ S0 # S1 # S2 # S3 # S4 # S5 # S6 # S7 # DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 DQ 1 0 DQ 1 1 DQ 1 2 DQ 1 3 DQ 1 4 DQ 1 5 DQ 1 6 DQ 1 7 DQ 1 8 DQ 1 9 DQ 2 0 DQ 2 1 DQ 2 2 DQ 2 3 DQ 2 4 DQ 2 5 DQ 2 6 DQ 2 7 DQ 2 8 DQ 2 9 DQ 3 0 DQ 3 1 DQ 3 2 DQ 3 3 DQ 3 4 DQ 3 5 DQ 3 6 DQ 3 7 DQ 3 8 DQ 3 9 DQ 4 0 DQ 4 1 DQ 4 2 DQ 4 3 DQ 4 4 DQ 4 5 DQ 4 6 DQ 4 7 DQ 4 8 DQ 4 9 DQ 5 0 DQ 5 1 DQ 5 2 DQ 5 3 DQ 5 4 DQ 5 5 DQ 5 6 DQ 5 7 DQ 5 8 DQ 5 9 DQ 6 0 DQ 6 1 DQ 6 2 DQ 6 3 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 12 9 13 1 14 1 14 3 13 0 13 2 14 0 14 2 14 7 14 9 15 7 15 9 14 6 14 8 15 8 16 0 16 3 16 5 17 5 17 7 16 4 16 6 17 4 17 6 18 1 18 3 19 1 19 3 18 0 18 2 19 2 19 4 M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q[ 6 3 : 0 ] 5 , 13 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 JD I MM 2 B 1 .5 V 75 76 81 82 87 88 93 94 99 1 00 1 05 1 06 1 11 1 12 1 17 1 18 1 23 1 24 3 . 3V S 2 0 mil s 1 99 C 610 C 60 9 2 . 2 U _ 6 . 3 V _ X5 R _ 06 77 1 22 1 25 0 . 1 u _ 16 V _ Y 5V _0 4 1 98 30 1 0, 1 1 , 1 3 T S #_ D I MM 0 _1 4 , 1 0, 1 1 , 1 3 D D R 3 _ D R A MR S T # C3 9 1 C3 9 0 2. 2 u _ 6 . 3V _Y 5 V _ 06 0. 1 u _ 1 6V _Y 5 V _ 04 1 1 26 9 , 1 3 MV R E F _ D Q_ D I M MB 9 MV R E F _ C A _D I MM B R 46 9 * 0 _0 4 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 M V R E F _C A _ D I M MB _R C6 3 3 2. 2 u _ 6 . 3V _0 6 C6 5 6 0. 1 u _ 1 6V _Y 5 V _ 04 V V V V V V V V V V V V V V V V V V DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 V DD S P D N C1 N C2 N CT E S T E V E NT # R ESET# V RE F _ D Q V RE F _ C A V V V V V V V V V V V V V V V SS1 SS2 SS3 SS4 SS5 SS6 SS7 SS8 SS9 SS1 0 SS1 1 SS1 2 SS1 3 SS1 4 SS1 5 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 V T T _ ME M V T T1 V T T2 G1 G2 203 204 G ND 1 G ND 2 A S 0 A 6 21 -U 4 R N -7F A S 0 A 6 2 1-U 4 R N -7 F CLO SE TO SO -DI MM La y out N ot e : SO- DIMM_ 1 is pla ce d f a rthe r from the G MCH tha n SO -DI MM_0 1 .5 V R4 6 0 1K _1 % _ 0 4 M V R E F _ C A _ D I MM B _ R M V R E F _ C A _ D I M MB _ R R 46 3 C6 5 7 1 K _ 1 % _0 4 0 . 1u _ 1 0 V _X 5 R _0 4 13 1 .5 V C 69 9 C6 9 8 C6 9 7 C6 7 7 1 0 u_ 1 0 V _ Y 5 V _ 0 8 1 0 u_ 1 0 V _ Y 5 V _ 0 8 1 0 u_ 1 0 V _ Y 5 V _ 0 8 1 u _6 . 3 V _ 0 4 C6 7 8 C6 5 4 C6 7 3 C6 7 4 1 u _6 . 3 V _ 0 4 1 u _6 . 3 V _ 0 4 1 u _6 . 3 V _ 0 4 1 u _6 . 3 V _ 0 4 1 0 , 1 1, 13 , 4 1 V T T _M E M 4 , 9 , 10 , 1 1 , 1 3 , 26 , 3 0 , 3 7, 39 , 4 1 1 . 5V 4 , 1 0 , 1 1, 1 3 , 1 4 , 15 , 1 6 , 1 7 , 18 , 1 9 , 2 0, 21 , 2 3 , 2 4, 2 5 , 2 6 , 2 9, 3 0 , 3 2 , 33 , 3 4 , 3 5 , 36 , 3 9 , 4 0, 43 , 5 8 3 . 3V S V T T_ M E M 1 .5 V C 64 7 C 64 6 C6 4 8 C6 4 9 C6 5 0 C6 5 1 C6 5 2 C6 5 3 C6 7 6 C6 7 5 C5 9 9 C 601 C 615 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 10 u _ 10 V _ Y 5V _0 8 1 u _ 6 . 3V _0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 1 u _ 6 . 3V _Y 5 V _ 04 B - 12 DDRIII CHB SO-DIMM_0 C 598 1 u _ 6 . 3V _0 4 C 596 1 u _6 . 3 V _ 0 4 Schematic Diagrams DDRIII CHB SO-DIMM_1 Channel B SO-DIMM 1 CHANGE TO STANDARD J D I MM 4 A 5, 12 M _ B _ B [ 1 5 : 0 ] M_ B _ B 0 M_ B _ B 1 M_ B _ B 2 M_ B _ B 3 M_ B _ B 4 M_ B _ B 5 M_ B _ B 6 M_ B _ B 7 M_ B _ B 8 M_ B _ B 9 M_ B _ B 1 0 M_ B _ B 1 1 M_ B _ B 1 2 M_ B _ B 1 3 M_ B _ B 1 4 M_ B _ B 1 5 M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M 116 120 M _B _O D T 0 M _B _O D T 1 11 28 46 63 136 153 170 187 0 1 2 3 4 5 6 7 5 , 1 2 M_ B _ D QS [ 7: 0 ] 5 , 1 2 M _B _D QS #[ 7: 0 ] M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 12 29 47 64 137 154 171 188 M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 10 27 45 62 135 152 169 186 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 /AP A1 1 A1 2 /BC # A1 3 A1 4 A1 5 BA 0 BA 1 BA 2 S0 # S1 # C K0 C K0 # C K1 C K1 # C KE0 C KE1 C AS# R AS# WE # SA 0 SA 1 SC L SD A O DT 0 O DT 1 D D D D D D D D M0 M1 M2 M3 M4 M5 M6 M7 D D D D D D D D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 D D D D D D D D QS 0 # QS 1 # QS 2 # QS 3 # QS 4 # QS 5 # QS 6 # QS 7 # DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 DQ 1 0 DQ 1 1 DQ 1 2 DQ 1 3 DQ 1 4 DQ 1 5 DQ 1 6 DQ 1 7 DQ 1 8 DQ 1 9 DQ 2 0 DQ 2 1 DQ 2 2 DQ 2 3 DQ 2 4 DQ 2 5 DQ 2 6 DQ 2 7 DQ 2 8 DQ 2 9 DQ 3 0 DQ 3 1 DQ 3 2 DQ 3 3 DQ 3 4 DQ 3 5 DQ 3 6 DQ 3 7 DQ 3 8 DQ 3 9 DQ 4 0 DQ 4 1 DQ 4 2 DQ 4 3 DQ 4 4 DQ 4 5 DQ 4 6 DQ 4 7 DQ 4 8 DQ 4 9 DQ 5 0 DQ 5 1 DQ 5 2 DQ 5 3 DQ 5 4 DQ 5 5 DQ 5 6 DQ 5 7 DQ 5 8 DQ 5 9 DQ 6 0 DQ 6 1 DQ 6 2 DQ 6 3 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 1 29 1 31 1 41 1 43 1 30 1 32 1 40 1 42 1 47 1 49 1 57 1 59 1 46 1 48 1 58 1 60 1 63 1 65 1 75 1 77 1 64 1 66 1 74 1 76 1 81 1 83 1 91 1 93 1 80 1 82 1 92 1 94 M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ M _B _D Q [ 63 : 0 ] 5 , 1 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 J D I M M 4B 1 .5 V 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 3 .3 V S 20mils C5 9 1 C3 6 2 2 . 2 U _6 . 3 V _ X 5 R _ 0 6 0. 1 u _ 1 6 V _ Y 5 V _ 0 4 10 , 1 1 , 1 2 T S # _ D I M M0 _ 1 4 , 10 , 1 1 , 1 2 D D R 3_ D R A M R S T# C6 1 8 C6 2 1 2 . 2 u_ 6 . 3 V _ 0 6 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 9 , 12 M V R E F _ D Q _ DI M MB 1 2 MV R E F _ C A _ D I M MB _R C6 5 9 C6 2 8 2 . 2 u_ 6 . 3 V _ 0 6 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 199 77 122 125 198 30 1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 D1 6 D1 7 D1 8 V D DS P D NC 1 NC 2 NC T E S T EVEN T# RE S E T # V R E F _ DQ V R E F _ CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 0 VSS1 1 VSS1 2 VSS1 3 VSS1 4 VSS1 5 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 44 48 49 54 55 60 61 65 66 71 72 12 7 12 8 13 3 13 4 13 8 13 9 14 4 14 5 15 0 15 1 15 5 15 6 16 1 16 2 16 7 16 8 17 2 17 3 17 8 17 9 18 4 18 5 18 9 19 0 19 5 19 6 Sheet 12 of 58 DDRIII CHB SODIMM _1 V T T_ M E M V T T1 V T T2 G1 G2 20 3 20 4 GN D 1 GN D 2 D DR S K -2 0 4 01 -T R 9D D D R S K -2 0 4 0 1 -TR 9 D La yout Not e: SO -DI M M _1 i s pl a ce d fa rthe r f rom t he G M CH tha n SO - DIM M _ 0 1 0 , 1 1 , 1 2, 4 1 V T T _ ME M 4, 9 , 1 0 , 1 1 , 1 2, 26 , 3 0 , 3 7 , 3 9, 4 1 1 . 5 V 4, 1 0 , 1 1 , 1 2 , 14 , 1 5 , 1 6 , 1 7, 1 8 , 1 9 , 2 0 , 21 , 2 3 , 2 4 , 2 5, 26 , 2 9 , 3 0 , 32 , 3 3 , 3 4 , 3 5, 36 , 3 9 , 4 0 , 4 3, 5 8 3 . 3 V S V T T _ ME M 1 .5 V C 6 72 C6 4 1 C 64 2 C 643 C6 4 4 C 6 45 C6 6 8 C 66 9 C 670 C6 7 1 C6 6 2 C 629 0 . 1 u _ 16 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5V _0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 1 0 u_ 1 0 V _ Y 5 V _ 0 8 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5V _0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 1 u _ 6 . 3V _0 4 C6 3 0 C 6 31 1 u_ 6 . 3 V _ 0 4 1 u _ 6. 3 V _ 0 4 C6 3 2 1 u _ 6. 3V _0 4 DDRIII CHB SO-DIMM_1 B - 13 B.Schematic Diagrams 109 108 79 114 121 101 103 102 104 73 74 115 110 113 C H B _ S A 0 _ D I M1 1 9 7 C H B _ S A 1 _ D I M1 2 0 1 202 200 5 , 1 2 M _B _B S 0 5 , 1 2 M _B _B S 1 5 , 1 2 M _B _B S 2 5 M _B _C S # 0 5 M _B _C S # 1 5 M _B _C L K _ D D R 0 5 M _ B _ CL K _ D DR # 0 5 M _B _C L K _ D D R 1 5 M _B _C L K _ D D R # 1 5 M _ B _ CK E 0 5 M _ B _ CK E 1 5, 1 2 M _ B _ C A S # 5, 1 2 M _ B _ R A S # 5, 1 2 M _ B _ W E # 1 2 CH B _ S A0 _ DIM 1 1 2 CH B _ S A1 _ DIM 1 10 , 1 1 , 1 2 , 2 0 S MB _ C L K 10 , 1 1 , 1 2 , 2 0 S MB _ D A T A 5 5 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 Schematic Diagrams MXM PCI-E D03 1 5 E X _V G A _ E N A V D D 1 5 E X_ V G A _B K L T E N 1 5 E X_ V G A _B K L P W M 3 .3 V S R 3 05 R 3 04 P E X _S T D _S W # 1 *4 . 3K _ 1 % _0 4 *4 . 3K _ 1 % _0 4 1 5 E X_ L V D S _ D D C _ D A T 1 5 E X_ L V D S _ D D C _ C L K R 3 06 19 , 3 2 H D A _ R S T# 19 H D A _S D I N 1 3 2 ,3 5 S P DIF O 3 P E G_ R XN [ 0. . 1 5 ] 3 P E G_ R XP [ 0 . . 1 5] * 33 _ 04 R3 0 7 *3 3 _0 4 R6 6 4 0_ 0 4 D 03 PEG _R XN15 PEG _R XP15 PEG _R XN14 PEG _R XP14 PEG _R XN13 PEG _R XP13 PEG _R XN12 PEG _R XP12 PEG _R XN11 PEG _R XP11 PEG _R XN10 PEG _R XP10 PEG _R XN9 PEG _R XP9 PEG _R XN8 PEG _R XP8 PEG _R XN7 PEG _R XP7 PEG _R XN6 PEG _R XP6 PEG _R XN5 PEG _R XP5 PEG _R XN4 P E G _R X P 4 PEG _R XN3 PEG _R XP3 PEG _R XN2 PEG _R XP2 PEG _R XN1 PEG _R XP1 PEG _R XN0 PEG _R XP0 E 2-1 E 2-2 E 2-3 E 2-4 E 2-5 E 2-6 E 2-7 E 2-8 E 2-9 E 2-1 0 E 4-1 E 4-2 E 4-3 E 4-4 E 4-5 E 4-6 E 4-7 E 4-8 E 4-9 E 4-1 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 10 0 10 2 10 4 10 6 10 8 11 0 11 2 11 4 11 6 11 8 12 0 12 2 12 4 13 4 13 6 13 8 14 0 14 2 14 4 14 6 14 8 15 0 15 2 3A PJ 1 OP E N -3 m m 1 2 2A PJ 2 OP E N -2 m m 1 2 3 .3 VS 5 VRU N 3A J _ MX M1 B 2 0 C L K _ P C I E _ MX M # 2 0 C L K _ P C I E _ MX M 3 VRU N 2A VIN P W R _ S RC PJ 1 3 1 4 m m 1 4A R2 4 1 1 5 E X _ L V D S -U 2 N 1 5 E X _ L V D S -U 2 P 4 7 K _0 4 3 .3 V S R1 6 *1 0K _ 0 4 1 5 E X _ L V D S -U 0 N 1 5 E X _ L V D S -U 0 P 3 .3 V S A LL _ S Y S _ P W R G D 1 5 , 21 , 3 4 , 43 R3 3 1 0 K _0 4 R 32 R 31 S M D _ V GA _ T H E R M_ R S M C _ V GA _ T H E R M_ R 18 E X _ H D M I _C 2 N 1 8 E X _ H D MI _ C 2 P 3 . 3V S A C / B A T L # 45 T H_ O V E RT # 1 T H_ A L E RT # 1 R2 9 R2 8 R3 0 1 5 E X _ L V D S -U 1 N 1 5 E X _ L V D S -U 1 P D0 3 D GP U _ P R S N T # 2 0 V G A _ P W RG D1 1 5 E X _L V D S -U C L K N 1 5 E X _L V D S -U C L K P 1 4A 2 D 03 *2 . 2 K _ 04 *2 . 2 K _ 04 R 32 3 R 31 9 * 33 _ 04 * 33 _ 04 * 33 _ 04 1 8 E X_ H D MI _ C 1 N 1 8 E X _ H D MI _ C 1 P 3 . 3V S 1 8 E X_ H D MI _ C 0 N 1 8 E X _ H D MI _ C 0 P D0 3 *2 . 2 K _0 4 *2 . 2 K _0 4 1 8 E X_ H D MI _ C C L K N 1 8 E X _ H D MI _ C C L K P 3 .3 V S H D A _ B I T C L K 1 9 , 32 H D A _ S D OU T 1 9 , 32 HDA _ S Y NC 1 9 ,3 2 1 8 E X_ H D MI _ C _ S D A 1 8 E X_ H D MI _ C _ S C L Ma x: 0. 5in ch P E G_ T X N [ 0 . . 15 ] 3 P E G _ TX P [ 0 . . 15 ] 3 P E G _ TX N 1 5 P E G _ TX P 1 5 P E G _ TX N 1 4 P E G _ TX P 1 4 P E G _ TX N 1 3 P E G _ TX P 1 3 P E G _ TX N 1 2 P E G _ TX P 1 2 1 7 E X _ DV I_ D2 N 1 7 E X_ D V I _D 2P P E G _ TX N 1 1 P E G _ TX P 1 1 1 7 E X _ DV I_ D1 N 1 7 E X_ D V I _D 1P P E G _ TX N 1 0 P E G _ TX P 1 0 1 7 E X _ DV I_ D0 N 1 7 E X_ D V I _D 0P P E G _ TX N 9 P E G _ TX P 9 P E G _ TX N 8 P E G _ TX P 8 1 7 E X_ D V I _C LK N 1 7 E X _ DV I_ CL K P H2 3 H2 4 H 7 _ 0D 4_ 1 H 7 _ 0D 4_ 1 R4 6 R4 5 1 7 E X _ DD C_ DA T A 1 7 E X _ DD C_ CL K 0 _ 04 0 _ 04 P E G _ TX N 7 P E G _ TX P 7 15 3 15 5 15 7 15 9 16 1 16 3 16 5 16 7 16 9 17 1 17 3 17 5 17 7 17 9 18 1 18 3 18 5 18 7 18 9 19 1 19 3 19 5 19 7 19 9 20 1 20 3 20 5 20 7 20 9 21 1 21 3 21 5 21 7 21 9 22 1 22 3 22 5 22 7 22 9 23 1 23 3 23 5 23 7 23 9 24 1 24 3 24 5 24 7 24 9 25 1 25 3 25 5 25 7 25 9 26 1 26 3 26 5 26 7 26 9 27 1 27 3 27 5 27 7 27 9 28 1 P E X _R E F C L K # P E X _R E F C L K GN D RSVD RSVD RSVD RSVD RSVD L V D S _ U C LK # L V D S _ U C LK GN D L V D S _ U T X 3# L V DS _ UT X 3 GN D L V D S _ U T X 2# L V DS _ UT X 2 GN D L V D S _ U T X 1# L V DS _ UT X 1 GN D L V D S _ U T X 0# L V DS _ UT X 0 GN D DP_ C_ L 0 # DP_ C_ L 0 GN D DP_ C_ L 1 # DP_ C_ L 1 GN D DP_ C_ L 2 # DP_ C_ L 2 GN D DP_ C_ L 3 # DP_ C_ L 3 GN D D P _ C _ A U X# DP_ C_ AU X RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD GN D D P _ A _ L 0# DP_ A _ L 0 GN D D P _ A _ L 1# DP_ A _ L 1 GN D D P _ A _ L 2# DP_ A _ L 2 GN D D P _ A _ L 3# DP_ A _ L 3 GN D DP_ A _ AUX# DP_ A _ AUX P R S N T_ L # C 83 C 10 1 *4 . 7 U _ 2 5V _0 8 4. 7 U _2 5 V _X 5 R _ 0 8 CLOSE T O MXM PIN E1 B - 14 MXM PCI-E CL OSE TO M XM PINE2 E X _ DD C_ DA T A 1 7 E X _ DD C_ CL K 1 7 E X_ D A C _ V S Y N C 1 7 E X_ D A C _ H S Y N C 1 7 E X_ D A C _ R 1 7 E X_ D A C _ G 1 7 E X_ D A C _ B 1 7 E X_ L V D S -L C LK N 15 E X_ L V D S -L C LK P 1 5 E X_ L V D S -L 2 N 1 5 E X_ L V D S -L 2 P 1 5 E X_ L V D S -L 1 N 1 5 E X_ L V D S -L 1 P 1 5 E X_ L V D S -L 0 N 1 5 E X_ L V D S -L 0 P 1 5 HDM I_ D# 2 1 5 HDM I_ D2 1 5 HDM I_ D# 1 1 5 HDM I_ D1 1 5 HDM I_ D# 0 1 5 HDM I_ D0 1 5 HDM I_ DCL K # 1 5 HDM I_ DCL K 1 5 HDM I_ D_ S DA 1 5 HDM I_ D_ S CL 1 5 E X_ H D MI _ C H P D 1 8 HDM I_ DHP D 1 5 E X_ D V I _D 5N E X_ D V I _D 5P 17 17 E X_ D V I _D 4N E X_ D V I _D 4P 17 17 E X_ D V I _D 3N E X_ D V I _D 3P 17 17 E X_ D V I _H P D 1 7 3 VRU N GN D GN D P E G _ TX N 5 P E G _ TX P 5 5V S D0 3 P E G _ TX N 4 P E G _ TX P 4 P E G _ TX N 3 P E G _ TX P 3 Q2 3 S M D _ V GA _ T H E R M _ R S P E G _ TX N 2 P E G _ TX P 2 P E G _ TX N 1 P E G _ TX P 1 Q2 2 S M C _ V GA _ T H E R M _ R R 6 65 R6 6 6 2. 2 K _ 0 4 2. 2 K _ 0 4 S 3 . 3V 2 4 D G P U _ H O LD _R S T # R 44 M TN 7 00 2 Z H S 3 D C 51 *0 . 1u _ 1 6V _ 0 4 * 1 00 K _ 04 S MD _V G A _T H E R M 3 4 1 4 4 , 23 , 5 8 P LT _ R S T # S MC _V G A _T H E R M 3 4 R3 5 3 VRU N C1 0 0 C 62 *4 . 7 U _ 2 5V _ 0 8 4. 7 U _2 5 V _X 5 R _ 0 8 C 52 CLOSE T OM XM CONN. C5 8 C8 1 C 4 35 C 4 36 C 4 25 C 42 6 C4 3 0 * 4. 7 U _2 5 V _0 8 4 . 7U _ 25 V _ X5 R _0 8 CL OSE TO M XM CONN. MX M_ R S T # 2 M TN 70 0 2 Z H S 3 D P E G _ TX N 0 P E G _ TX P 0 C3 4 4 . 7 U _ 2 5V _ X 5R _ 08 MX M_ C L K R E Q# 20 U 4 *7 4 A H C 1G 0 8G W 0 _0 4 1 5, 1 7 , 1 8, 1 9 , 25 , 2 6 , 30 , 3 2, 3 3 , 3 5, 3 9 , 4 3, 4 4 4 , 1 0 , 11 , 1 2, 1 3 , 1 5, 1 6 , 1 7, 1 8 , 19 , 2 0 , 21 , 2 3, 2 4 , 2 5, 2 6 , 2 9, 3 0 , 32 , 3 3 , 34 , 3 5, 3 6 , 3 9, 4 0 , 4 3, 5 8 15 , 3 8 , 39 , 4 0, 4 1 , 4 3, 4 4 , 4 5, 4 6 3 , 4, 9, 1 5 , 19 , 2 0 , 21 , 2 3, 2 4 , 2 5, 2 6 , 2 8, 2 9 , 30 , 3 2 , 35 , 3 6, 3 7 , 3 9, 4 0 , 4 1, 4 2 5 VRU N C 44 MX M_ R S T# R2 6 * 0_ 0 4 R2 7 * 0_ 0 4 3 . 3V S P W R_ S RC C 99 15 4 15 6 15 8 16 0 16 2 16 4 16 6 16 8 17 0 17 2 17 4 17 6 17 8 18 0 18 2 18 4 18 6 18 8 19 0 19 2 19 4 19 6 19 8 20 0 20 2 20 4 20 6 20 8 21 0 21 2 21 4 21 6 21 8 22 0 22 2 22 4 22 6 22 8 23 0 23 2 23 4 23 6 23 8 24 0 24 2 24 4 24 6 24 8 25 0 25 2 25 4 25 6 25 8 26 0 26 2 26 4 26 6 26 8 27 0 27 2 27 4 27 6 27 8 28 0 9 1 78 2 -31 4 0 M-N V -0 1 P E G _ TX N 6 P E G _ TX P 6 9 1 78 2 -31 4 0 M-N V - 01 P W R _S R C CL K _ RE Q # P E X _ RS T # V G A _D D C _D A T V G A _D D C _C LK V GA _ V S Y N C V GA _ H S Y N C G ND V G A _ RE D V GA _ G R E E N V GA _B L U E G ND L V DS _ L CL K # LV D S _ LC LK G ND L V D S _ L TX 3 # LV D S _ LT X 3 G ND L V D S _ L TX 2 # LV D S _ LT X 2 G ND L V D S _ L TX 1 # LV D S _ LT X 1 G ND L V D S _ L TX 0 # LV D S _ LT X 0 G ND D P _ D _L 0 # DP _ D_ L 0 G ND D P _ D _L 1 # DP _ D_ L 1 G ND D P _ D _L 2 # DP _ D_ L 2 G ND D P _ D _L 3 # DP _ D_ L 3 G ND D P _D _ A U X # D P _ D _A U X D P _C _ H P D D P _D _ H P D RSVD RSVD RSVD G ND D P _ B _L 0 # D P _B _ L 0 G ND D P _ B _L 1 # D P _B _ L 1 G ND D P _ B _L 2 # D P _B _ L 2 G ND D P _ B _L 3 # D P _B _ L 3 G ND DP_ B _ AUX# D P _ B _A U X DP _ B _ HP D DP _ A _ HP D 3 V3 3 V3 5 Sheet 13 of 58 MXM PCI-E *0 _ 04 R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND P R S N T _R # W AKE# P W R _ GO OD PW R_ EN RSVD RSVD RSVD RSVD P W R_ L E V E L T H_ O V E RT # T H_ A L E RT # T H_ PW M GP I O 0 GP I O 1 GP I O 2 S M B _D A T S M B _C LK G ND OE M OE M OE M OE M G ND P E X_ T X1 5 # P E X _ TX 1 5 G ND P E X_ T X1 4 # P E X _ TX 1 4 G ND P E X_ T X1 3 # P E X _ TX 1 3 G ND P E X_ T X1 2 # P E X _ TX 1 2 G ND P E X_ T X1 1 # P E X _ TX 1 1 G ND P E X_ T X1 0 # P E X _ TX 1 0 G ND P E X _ TX 9 # P E X _T X 9 G ND P E X _ TX 8 # P E X _T X 8 G ND P E X _ TX 7 # P E X _T X 7 G ND P E X _ TX 6 # P E X _T X 6 G ND P E X _ TX 5 # P E X _T X 5 G ND P E X _ TX 4 # P E X _T X 4 G ND P E X _ TX 3 # P E X _T X 3 G ND G ND P E X _ TX 2 # P E X _T X 2 G ND P E X _ TX 1 # P E X _T X 1 G ND P E X _ TX 0 # P E X _T X 0 G ND 3 R 57 PW PW PW PW PW PW PW PW PW PW G B.Schematic Diagrams 5 VRU N 5 VS P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D 5V 5V 5V 5V 5V GN D GN D GN D GN D P E X _S T D _S W # V GA _ D I S A B LE # P NL _ P W R_ E N P N L _ B L _E N P N L _ B L _P W M H D MI _ C E C DV I_ HP D L V DS _ DD C_ DA T L V DS _ DD C_ CL K GN D OE M OE M OE M OE M GN D P E X _R X 15 # P E X _R X 15 GN D P E X _R X 14 # P E X _R X 14 GN D P E X _R X 13 # P E X _R X 13 GN D P E X _R X 12 # P E X _R X 12 GN D P E X _R X 11 # P E X _R X 11 GN D P E X _R X 10 # P E X _R X 10 GN D P E X _R X 9# P E X _R X 9 GN D P E X _R X 8# P E X _R X 8 GN D P E X _R X 7# P E X _R X 7 GN D P E X _R X 6# P E X _R X 6 GN D P E X _R X 5# P E X _R X 5 GN D P E X _R X 4# P E X _R X 4 GN D P E X _R X 3# P E X _R X 3 GN D GN D P E X _R X 2# P E X _R X 2 GN D P E X _R X 1# P E X _R X 1 GN D P E X _R X 0# P E X _R X 0 GN D MX M 3 .0 MO D U L E B O A R D CO NN E C TO R PWR_ SRC(10A)--7-20V 5 VRUN(2.5A)--5V 3 VRUN(1A)--3.3V E 1 -1 E 1 -2 E 1 -3 E 1 -4 E 1 -5 E 1 -6 E 1 -7 E 1 -8 E 1 -9 E 1-1 0 E 3 -1 E 3 -2 E 3 -3 E 3 -4 E 3 -5 E 3 -6 E 3 -7 E 3 -8 E 3 -9 E 3-1 0 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 10 1 10 3 10 5 10 7 10 9 11 1 11 3 11 5 11 7 11 9 12 1 12 3 12 5 13 3 13 5 13 7 13 9 14 1 14 3 14 5 14 7 14 9 15 1 G MXM 3.0 P W R_ S RC J _ MX M1 A MX M 3.0 MOD ULE B OAR D CONNE CT OR P W R _ S RC 4. 7 U _2 5 V _X 5 R _ 0 8 4. 7 U _ 2 5 V _X 5 R _ 0 8 0 . 1 u _5 0 V _ Y 5 V _0 6 0 . 0 1u _ 5 0V _ 0 4 4. 7 U _2 5 V _X 5 R _ 0 8 0. 1 u _5 0 V _ Y 5 V _0 6 0 . 1 u _5 0 V _Y 5 V _0 6 0. 0 1 u _5 0 V _0 4 5V S 3. 3 V S VIN 3. 3 V Schematic Diagrams Panel, Inverter, CRT 1 4 E X_ V GA _ B K LP W M PANEL 34 B R I G H TN E S S P L V DD R9 1 D C PL VDD R 93 D7 R8 6 D03 E X_ L V D S -U C LK P 1 4 E X_ L V D S -U 2 N 1 4 E X_ L V D S -U 2 P 14 E X_ L V D S -U 0 N 1 4 E X_ L V D S -U 0 P 14 R6 6 7 *0 _ 04 E X _ V GA _ B KL P W M_ S *0 _ 04 E X_ V GA _ B K LP W M_ R E X _ LV D S -LC L K N E X _ LV D S -LC L K P 1 4 E X_ L V D S -LC LK N 14 E X _L V D S -L C L K P E X _ LV D S -L1 N E X _ LV D S -L1 P 1 4 E X _L V D S -L 1N 1 4 E X _ LV D S -L 1 P D0 3 B R I G H T N E S S _R AC 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 E X _L V D S -U C LK P E X_ LV D S -U 2 N E X_ LV D S -U 2 P E X_ LV D S -U 0 N E X_ LV D S -U 0 P 3 .3 V S *R B 75 1 V 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 D6 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 E X _ VG A _B K L P W M_ R E X_ LV D S -LC LK N E X_ LV D S -LC LK P E X_ LV D S -L1 N E X_ LV D S -L1 P B R I GH T N E S S _ R I N V _B L ON 5V S 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 E X_ V GA _ E N A V D D I N V _ B LO N * B A V 99 R E C T I F I E R C D0 3 E X_ LV D S _D D C _ C L K E X_ LV D S _D D C _ D A T 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 5V S 3 . 3V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 *8 81 0 7-3 00 0 1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 E X _V G A _E N A VD D E X _L V D S _ D D C _C LK E X _L V D S _ D D C _D A T E X _L V D S -L 0 N E X _L V D S -L 0 P E X _L V D S -L 0N 14 E X _L V D S -L 0P 1 4 E X _L V D S -L 2 N E X _L V D S -L 2 P E X _L V D S -L 2N 14 E X _L V D S -L 2P 1 4 VL ED 3 . 3V S E X_ LV D S -L0 N E X_ LV D S -L0 P E X_ LV D S -L2 N E X_ LV D S -L2 P R8 5 R8 9 2 . 2K _ 0 4 2. 2 K _ 04 E X _ LV D S _D D C _ D A T E X_ L V D S _ D D C _ C L K E X_ LV D S _D D C _ D A T 14 E X_ LV D S _D D C _ C L K 14 V LE D Sheet 14 of 58 Panel, Inverter, CRT 8 81 0 7-4 00 0 1 C 1 53 0 . 1u _1 6 V _Y 5V _ 04 3 . 3V 3. 3 V C 1 32 C 12 9 C1 0 5 0. 1 u_ 5 0V _ Y 5 V _ 06 B K L _E N B K L_ E N 1 E X_ V GA _ B K LT E N 2 U8 A 74 L V C 0 8P W 1 3 14 E X_ V GA _ B K LT E N U8 B 74 L V C 08 P W 1 4 3 . 3V 6 5 0 . 1u _ 50 V _Y 5V _ 0 6 R9 2 1 0 0K _ 0 4 R9 6 * 10 0 K _0 4 7 10 u _2 5 V _X 5 R _1 2 34 4 5 VS H N O t o CO M R 5 07 10 0 K_ 0 4 P L V D D _S E L S NM OS D >100 mil R 79 E X_ V GA _ B K LP W M _S 1 0 0K _ 04 1 0 0K _ 04 B R I GH T N E S S _ R P L V DD_ S E L R 66 2 R9 4 1 M_ 04 C 79 6 H D MI _D #2 1 4 H D MI _D 2 14 Q4 3B MT N N 2 0 N 0 3Q 8 5 2 20 0 p_ 5 0V _ X 7R _ 0 4 Q4 4 *M TN 70 0 2Z H S 3 G 3. 3 V Q3 5 MT N 7 00 2 Z H S 3 G R 6 63 S P L V DD C 15 6 R6 6 1 *1 0 0_ 0 4 0. 1 u _1 6 V _Y 5V _ 04 *1 00 K _0 4 0 . 1u _1 6 V _Y 5V _ 04 1 0u _ 10 V _ Y 5 V _0 8 G 0 . 1u _ 16 V _Y 5V _ 0 4 0 . 1u _ 16 V _Y 5V _ 0 4 H D MI _D #1 1 4 H D MI _D 1 14 D C4 1 C4 0 Q 40 A O 34 1 5 S C 1 52 PL VDD 1 0K _ 04 I N V _B L ON 3 .3 VS D 03 ON VL ED 88 1 07 -3 00 0 1 1 4 E X _V G A _E N AV D D D3 E X _ V GA _ EN A V D D Q4 5 MT N 7 00 2 Z H S 3 G S R 78 0 . 1u _ 16 V _Y 5V _ 0 4 0 . 1u _ 16 V _Y 5V _ 0 4 D A D0 3 0. 1 u _1 6V _ Y 5 V _ 04 0. 1 u _1 6V _ Y 5 V _ 04 C3 9 C3 8 C 3 . 3V S C 10 3 C 10 4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 B A V 99 AC H D MI _ D # 0 H D MI _ D 0 1 4 H D MI _ D _S D A 1 4 H D MI _ D _ S C L 0. 1 u _1 6V _ Y 5 V _ 04 0. 1 u _1 6V _ Y 5 V _ 04 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 R 56 L17 . 14 14 C 43 C 42 SYS1 5 V 4 R 50 9 10 K _0 4 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 >100mil PLV DD LVD S:3 .3V 2A eDP 3D :5V 3A C8 4 J _D P 1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 Q4 3 A MT N N 20 N 0 3 Q8 2 1 3 . 3V S G eDP 0. 1 u _1 6V _ Y 5 V _ 04 0. 1 u _1 6V _ Y 5 V _ 04 8 7 >100 milS* A O34 1 5D D02 C 37 C 36 7 Q33 >100 mil A O3 4 15 Q34 1 4 H D MI _ D C L K # 14 H D MI _D C L K 1 u_ 6 . 3V _ X 5R _0 4 PLVDD POW ER 5 VS * 0. 1 u_ 1 6V _ Y 5 V _ 04 D F unc tion N C t o CO M G IN L *1 M_ 04 B R I GH T N E S S _ R C 78 5 D CO M 3 G ND NC *T S 5A 3 1 57 11 B R I GH TN E S S _ S W # 21 IN 2 3 B R I GH TN ES S C 42 9 7 5 6 NO I N V _B L ON R9 8 6 1 U8 D 74 L V C 08 P W 1 13 1 4 , 21 , 3 4, 4 3 A L L _S Y S _P W R G D V+ E X_ V GA _ B K LP W M 10 12 2 9 , 34 , 3 5 L I D _ S W # U 48 R 3 03 4. 7 K _ 04 8 3. 3 V 3 .3 V D03 U8 C 74 L V C 0 8P W 1 9 S B _ BL ON 14 24 S D 02 V LE D 14 . * 10 0 K _0 4 14 R8 7 14 V LE D L18 H C B 16 0 8K F -1 2 1T 2 5 7 VIN F C M1 6 08 K -1 21 T0 6 1 0 K _0 4 14 H D M I _D H P D C1 0 2 2 2 0p _ 50 V _0 4 3 . 3V S 3 . 3V 5 VS VIN SYS1 5 V 4, 1 0 , 11 , 1 2, 1 3, 1 4 , 16 , 1 7, 1 8, 1 9 , 20 , 2 1, 2 3 , 24 , 25 , 2 6, 2 9 , 30 , 32 , 3 3, 3 4 , 35 , 36 , 3 9, 4 0 , 43 , 5 8 3, 4 , 9 , 14 , 1 9, 2 0, 2 1 , 23 , 2 4, 2 5, 2 6 , 28 , 2 9, 3 0 , 32 , 35 , 3 6, 3 7 , 39 , 40 , 4 1, 4 2 14 , 1 7, 1 8 , 19 , 25 , 2 6, 3 0 , 32 , 33 , 3 5, 3 9 , 43 , 4 4 14 , 3 8, 3 9 , 40 , 41 , 4 3, 4 4 , 45 , 46 38 , 3 9, 4 0 Panel, Inverter, CRT B - 15 B.Schematic Diagrams 2 4 6 8 10 J _L C D 1 D03 A P LV D D 1 3 5 7 9 A S G Q4 6 MT N 7 0 02 Z H S 3 J _ LC D 2 1 3 5 7 9 E X _ LV D S-U C L K N E X _ LV D S-U 1N E X _ LV D S-U 1P 1 4 E X _ LV D S-U C L K N 1 4 E X_ L VD S -U 1 N 1 4 E X _L V D S -U 1 P 3 . 3V S 0_ 0 4 1 0 K _0 4 Schematic Diagrams 1394_JMB380C IEEE1394 1394 _TPBIAS0 C6 93 1.8 VS 3.3 VS 3.3 V 5VS VI N 0. 33u_ Y5V_16 V_ 06 R487 56_0 4 R488 56_0 4 J139 4PORT1 GND1 GND2 GND GND TPA+ TPATPB+ TPB- L P1 0160 OHM #944 CM-0 051 5 4 6 3 7 2 8 1 R44 9 0_04 R45 0 0_04 R45 1 0_04 R45 2 0_04 4 3 2 1 7 ,25 ,42 4 ,10 ,11 ,12, 13, 14, 15, 17,1 8,1 9,2 0,21 ,23 ,24 ,25, 26, 29, 30, 32,3 3,34,3 5,36 ,39,40 ,43, 58 3 ,4, 9,1 4,1 5,19 ,20 ,21 ,23, 24, 25, 26, 28,2 9,3 0,3 2,35 ,36,37 ,39, 40, 41, 42 1 4,1 5,1 7,18 ,19 ,25 ,26, 30, 32, 33, 35,3 9,4 3,4 4 1 4,1 5,3 8,39 ,40 ,41 ,43, 44, 45, 46 139 4_TPA0+ 139 4_TPA01394_ TPB0 + 139 4_TPB0R490 56_0 4 R489 56_0 4 MIE-0 4RH4G 2 20p_50V_0 4 C716 3.3 VS L69 C7 24 12K_1%_04 12mil 13 94_XI 20p_5 0V_04 C7 20 HCB201 2KF- 500 T40 0 .1u_ 16V_Y5 V_ 04 *0. 1u_1 6V_04 C71 5 C711 *0.1 u_16 V_ 04 *0. 1u_1 6V_04 36 35 34 33 32 31 30 29 28 27 26 25 DV1.8 V 0. 1u_1 6V_Y5V_0 4 1394_XI 1394_XO C729 20p_5 0V_04 3.3VS_C AR D Note: Close to JMB380 C73 5 0. 1u_1 6V_Y5V_0 4 37 38 39 40 41 42 43 44 45 46 47 48 DV18 TXI N TXO UT MDI O7 MDI O6 MDI O5 MDI O4 DV33 MDI O3 MDI O2 MDI O1 MDI O0 JMB380C 6-03-00380-032 U38 T RE XT T P B IA S_ 1 T PA 1P TP A 1N T P B1 P TP B 1N T A V3 3 MD IO8 M DIO 9 MD IO10 M DI O11 M DIO1 2 C71 0 TCPS MD IO13 MD IO14 CR_L EDN DV33 R EG_CTRL DV18 CR1 _PCTLN CR1 _CD0N CR1 _CD1N SEEC LK SEED AT GND_M JMB380 X RS TN X T E ST A PC LK N AP CLK P A P VDD AP GND A P RE XT AP RX P A P RX N A PV 18 A P T XN A PT X P 1 2 X13 *24 .576MHz 1 2 3 4 5 6 7 8 9 10 11 12 139 4_XO 2 1M_04 4 X14 R496 3 1 Sheet 15 of 58 1394_JMB380C 3. 3VS_ CAR D Note: Close to JMB380 1 394_ TP B IA S 0 139 4_T P A0 + 1 394_ TP A 0139 4_T P B0 + 1 394 _T PB 0- C692 R486 2 4.57 6M Hz TCPS R4 91 10K_0 4 3. 3VS_ CAR D 40 mil DV1. 8V 0. 1u_1 6V_Y5V_0 4 0. 1u_ 16V_Y5 V_ 04 QFN-48 0.1u _16 V_ Y5V_04 0.1u _16 V_ Y5V_04 PCIE_RXP4 _139 4 20 PCIE_RXN4_1 394 20 D V1.8V 20 CLK_PCI E_ 1394# 20 CLK_PCI E_ 1394 1. 8VS C70 5 C7 44 JMI CRON C74 8 C74 7 23,28, 29, 34, 36, 37 BUF_PLT_RST# 24 23 22 21 20 19 18 17 16 15 14 13 49 DV1. 8V L71 . B.Schematic Diagrams 4 .99 K_ 1%_04 . Note: Close to CON R478 *HCB2012KF-50 0T40 0.1u_1 6V_Y5V_0 4 C730 C7 39 C727 10u _10V_Y 5V_08 PCI E_ TXN4 _13 94 20 PCI E_ TXP4_ 1394 2 0 10 00p_50V_X7R_0 4 12mil R505 8.2K_04 B - 16 1394_JMB380C C74 6 C745 0. 01u_ 50V_04 0.1 u_16 V_ Y5V_04 10u_10V_Y5V_08 C743 Schematic Diagrams DVI PLEASE CLOS E TO C ONNECT OR L2 L7 F C M1 00 5 MF -6 0 0 T0 1 _ 04 L6 F C M 10 0 5 MF -6 0 0T 0 1 _0 4 FR ED F C M 10 0 5 MF -6 0 0T 0 1 _0 4 F G RN F C M 10 0 5 MF -6 0 0T 0 1 _0 4 F B L UE C8 Close to DVI PORT 14 E X_ D V I _D 2 N 14 E X _ DV I_ D2 P 14 E X_ D V I _D 4 N 14 E X _ DV I_ D4 P 14 E X_ D V I _D 1 N 14 E X _ DV I_ D1 P 14 E X_ D V I _D 3 N 14 E X _ DV I_ D3 P 14 E X_ D V I _D 0 N 14 E X _ DV I_ D0 P 14 E X_ D V I _D 5 N 14 E X _ DV I_ D5 P LP 7 C4 LP 2 LP 6 D D C _O U T 1 12 DD C_ IN2 D D C _O U T 2 13 S Y N C_ IN1 S Y N C _O U T 1 S Y N C_ IN2 S Y N C _O U T 2 15 1 V CC _ S Y N C V I D E O_ 1 V CC _ V IDE O V I D E O_ 2 2 V CC _ DDC 5 P _ 5 0 V _0 4 C2 3 5 P _ 5 0 V _0 4 C2 2 5 P _ 5 0 V _0 4 C 1 11 5 P _ 5 0 V _0 4 C 1 10 5 P _ 5 0 V _0 4 C2 1 5 P _ 5 0 V _0 4 C2 0 5 P _ 5 0 V _0 4 C 1 09 5 P _ 5 0 V _0 4 C 1 08 5 P _ 5 0 V _0 4 C2 5 5 P _ 5 0 V _0 4 C2 4 5 P _ 5 0 V _0 4 C 1 06 5 P _ 5 0 V _0 4 C 1 07 5 P _ 5 0 V _0 4 E X _ DV I_ DA T A 2 # _ R E X _ DV I_ DA T A 2 _ R 3 C 48 C 47 LP 1 E X _ DV I_ DA T A 4 # _ R E X _ DV I_ DA T A 4 _ R 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 3 C 1 21 C 1 20 4 3 1 2 E X _ DV I_ DA T A 1 # _ R E X _ DV I_ DA T A 1 _ R 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 C 46 C 45 E X _ DV I_ DA T A 3 # _ R E X _ DV I_ DA T A 3 _ R 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 LP 5 4 3 1 2 C 1 19 C 1 18 E X _ DV I_ DA T A 0 # _ R E X _ DV I_ DA T A 0 _ R 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 LP 3 4 3 1 2 C 50 C 49 E X _ DV I_ DA T A 5 # _ R E X _ DV I_ DA T A 5 _ R 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 HS Y NC 3 3 _0 4 V S Y NC 3 FR ED 4 F G RN 5 F BL U E LP 4 14 E X _ D V I _ C L K P 1 2 C 1 16 C 1 17 4 3 D V I 2 01 2 F 2 S F -9 00 T 05 _ 0 8 14 E X _ D V I _ C L K N 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 E X _ DV I_ CL K _ R E X _ DV I_ CL K # _ R Sheet 16 of 58 DVI 6 BYP G ND 5 VS A I P 4 7 72 C Z 16 D2 J _D V I 1 E E E E 3. 3 V S I _D I _D I _D I _D A T A 4# _ R A T A 4_ R A T A 1# _ R A T A 1_ R E X_ D V I _D A T A 3# _ R E X_ D V I _D A T A 3_ R D 1 BAV9 9 14 X_ D V X_ D V X_ D V X_ D V R4 L4 E X _ DV I_ HP D F C M1 6 0 8K -1 2 1 T0 6 E X_ D V I _D A T A 0# _ R E X_ D V I _D A T A 0_ R 1 0 K _0 4 C7 2 2 0 p_ 5 0 V _0 4 E X_ D V I _D A T A 5# _ R E X_ D V I _D A T A 5_ R E X_ D V I _C LK _R E X_ D V I _C LK #_ R F RE D F GR N F B LU E H SYN C V SYNC L8 DD CD A T A F C M 1 60 8 K -1 21 T 0 6 1 2 3 4 5 9 10 11 12 13 15 16 17 18 19 20 21 22 23 24 C 1 C 2 C 3 C 4 8 7 6 C 1 TM TM TM TM TM TM TM TM TM TM DS DS DS DS DS DS DS DS DS DS C R B 75 1 V + 5 V P OW E R D ATA 2 D ATA 2 + 2 / 4 S h i el d D ATA 4 D ATA 4 + D ATA 1 D ATA 1 + D A T A 1 / 3 S h i e dl D ATA 3 D ATA 3 + 14 C1 6 0. 1 u _ 16 V _ Y 5 V _ 0 4 Close to DVI PORT R R R R R R R R R R R R R R GN D (A N A LO G) H O T P L U G D E TE C T TM D S D A T A 0 TM D S D A T A 0 + TM D S D A T A 0 / 5 S h i e dl TM D S D A T A 5 TM D S D A T A 5 + TM D S C L K S h ei l d TM D S C L K + TM D S C l k RE D GR E E N B LU E H S Y NC C ASE V SYN C C ASE DD C Da ta GN D DD C Cl k GN D D 7 1 1 10 -2 9 F -10 1 0 5-R D SUB M M C C 1 2 5 6 D E X_ D V I _D A T A 2# _ R E X_ D V I _D A T A 2_ R DVI 66 65 20 19 64 63 18 17 62 61 22 21 59 60 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % Q1 M T N 7 0 02 Z H S 3 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 E X _ D V I _ D A T A 2 # _R E X _ DV I_ DA T A 2 _ R E X _ D V I _ D A T A 4 # _R E X _ DV I_ DA T A 4 _ R E X _ D V I _ D A T A 1 # _R E X _ DV I_ DA T A 1 _ R E X _ D V I _ D A T A 3 # _R E X _ DV I_ DA T A 3 _ R E X _ D V I _ D A T A 0 # _R E X _ DV I_ DA T A 0 _ R E X _ D V I _ D A T A 5 # _R E X _ DV I_ DA T A 5 _ R E X _ DV I_ CL K _ R E X _ DV I_ CL K # _ R 3. 3 V S G S 0. 2 2 u _1 0 V _ Y 5 V _0 4 3 3 _0 4 R1 3 V I D E O_ 3 8 C1 9 C1 3 0 . 22 u _ 10 V _ Y 5 V _ 04 C 17 0 . 2 2 u_ 1 0 V _Y 5V _ 0 4 7 4 A D02 1 _0 4 3 . 3V S R1 5 16 C R9 0 5 VS 14 A C 1 4 E X _D A C _ V S Y N C 1 2p _ 5 0V _ 0 4 L9 DD CL K . 1 4 E X _D A C _ H S Y N C D D C LK . 1 4 E X _D D C _C L K 4 1 2 D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 8 7 6 5 DD C_ IN1 11 5 P _ 5 0 V _0 4 C 1 12 D D C D A TA . 1 4 E X _D D C _D A T A 9 C 1 13 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 F C M 1 60 8 K -1 21 T 0 6 C 2 1 2p _ 5 0V _ 0 4 1 4 , 1 5, 1 8 , 1 9, 2 5 , 2 6, 3 0 , 3 2, 33 , 3 5 , 39 , 4 3 , 44 5 V S 4, 10 , 1 1 , 12 , 1 3 , 14 , 1 5 , 16 , 1 8 , 19 , 2 0 , 21 , 2 3 , 2 4, 2 5 , 2 6, 2 9 , 3 0, 3 2 , 3 3, 3 4 , 3 5, 36 , 3 9 , 40 , 4 3 , 58 3 . 3 V S DVI B - 17 B.Schematic Diagrams 10 C 1 23 C 1 22 1 2 D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 PLEA SE CLO SE TO CONNE CTOR U 1 3 1 2 D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 5 VS R N1 2 . 2 K _ 8P 4 R _0 4 4 C1 0 1 2 3 4 3 .3 VS C6 C1 1 2 2p _ 5 0V _ 0 4 C9 2 2 p_ 5 0 V _ 04 C5 2 2 p _5 0 V _ 04 C1 2 2 2 p _5 0 V _ 04 C3 2 2 p_ 5 0 V _0 4 R2 1 5 0 _1 % _ 04 R 3 1 50 _ 1 %_ 0 4 R1 L5 F C M1 00 5 MF -6 0 0 T0 1 _ 04 2 2 p_ 5 0 V _ 04 EX_ DAC _ B F C M1 00 5 MF -6 0 0 T0 1 _ 04 2 2 p _5 0 V _ 04 L3 22 p _ 50 V _ 0 4 E X _ DA C _ B L1 EX_ DAC _ G 22 p _ 50 V _ 0 4 14 EX_ DAC _ R 1 50 _ 1 %_ 0 4 E X _ DA C _ G . . . E X _ DA C _ R 14 . . . 14 Schematic Diagrams HDMI HDMI CONNECTOR 200 9/11 /28 _Ale x 5VS_HDMI 5 VS R2 3 1 _04 R14 1_04 J _HDMI 1 C15 C14 22u _6.3 V_ X5R_ 08 22u_ 6.3 V_ X5R_0 8 19 17 +5V DDC/ CEC GND 16 SD A SCL 14 EX_HD MI_CC LKN_R 4 EX_HD MI_C1 N_R 2 EX_HD MI_C1 P_ R 3 CEC 12 TMDS C LOCK- CLK SHIELD 10 2 WCM2 012F2S-1 61T0 3 R9 499_ 1%_ 04 WCM2 012F2S-1 61T0 3 1 R8 499_ 1%_ 04 TMDS C LOCK+ TMDS DATA0- 8 SH IELD0 TMDS D ATA1 4 499_ 1%_ 04 2 HDMI_ CEC 11 R1 2 4 99_1 %_ 04 R1 1 4 99_1 %_ 04 R6 4 99_1 %_ 04 3 9 3 L10 3 WC M201 2F2S-161 T03 4 EX_HD MI_C 2N_R 1 2 5 TMDS DATA2- SH IELD2 TMDS DATA2+ R5 5VS Q2 MTN7 002 ZHS3 GND1 S C27 6 EX_HD MI_C 0N_R 1 EX_HD MI_C 0P_R WC M201 2F2S-161 T03 SHIELD1 TMDS D ATA1 + G 4 2 L13 1 EX_HD MI_C 2P_R 4 99_1 %_ 04 GND D HDMIGND Sheet 17 of 58 HDMI R7 EX_HD MI_C _SCL_R 13 TMDS DATA0+ 6 4 15 7 GND2 GND GND3 GND GND4 GND L 11 RESERVED 499_ 1%_ 04 HDMI GND DF03 -7 0.1u _16V_Y 5V_04 14 EX_H DMI_C 1P 1 4 EX_HDMI _C1N 14 EX_H DMI_C 2P 1 4 EX_HDMI _C2N EX_HDMI _CCL KP EX_HDMI _CCL KN C 30 C 31 0. 1u_ 16V_Y5V_0 4 EX_H DMI_ CCLKP_R 0. 1u_ 16V_Y5V_0 4 EX_H DMI_ CCLKN_R EX_HD MI_C0 P EX_ HDMI _C0N C 32 C 33 0. 1u_ 16V_Y5V_0 4 0. 1u_ 16V_Y5V_0 4 EX_HDMI_C0 P_ R EX_HDMI_C0 N_R EX_HD MI_C1 P EX_ HDMI _C1N C 28 C 29 0. 1u_ 16V_Y5V_0 4 0. 1u_ 16V_Y5V_0 4 EX_HDMI_C1 P_ R EX_HDMI_C1 N_R EX_HD MI_C2 P EX_ HDMI _C2N C 26 C 27 0. 1u_ 16V_Y5V_0 4 0. 1u_ 16V_Y5V_0 4 EX_HDMI_C2 P_ R EX_HDMI_C2 N_R F O R H D M I S W I TC H 3. 3VS A 14 EX_H DMI_C 0P 1 4 EX_HDMI _C0N C 14 EX_H DMI_ CCLKP 1 4 EX_HDMI_CCL KN PIN GND 1~4 =GND D 02 D 18 AC BAV99 14 EX_H DMI_ CHPD R298 L 55 EX_H DMI_ CHPD . FCM1608 K- 121T06 EX_HDMI _CHPD_R 10K_04 C42 3 2 20p _50V_0 4 5 VS_H DMI 5VS_ HDMI R299 4.7K_0 4 D1 9 BAV9 9 R29 6 14 EX_HD MI_C _SCL S D L57 Q4 MTN70 02ZHS3 C422 5VS_ HDMI D1 7 D0 2 BAV9 9 D AC G R297 4.7K_0 4 R29 5 S 10 p_50 V_ 04 A C 5 VS_H DMI R43 4.7K_0 4 L56 . EX_HD MI_C _SD A Q5 MTN70 02ZHS3 FCM16 08K-12 1T0 6 EX_H DMI_ C_SCL_R 33 _04 3.3 VS 1 4 EX_HDMI _C_SDA D0 2 AC G R47 4.7K_0 4 EX_HD MI_C _SC L A C 3.3 VS . B.Schematic Diagrams EX_HD MI_CC LKP_ R 1 L 12 R 10 3 EX_HD MI_C HPD _R HOT PL UG D ETECT 18 EX_HD MI_C _SD A_ R FCM16 08K-12 1T0 6 EX_H DMI_ C_SDA_R 33 _04 C424 10 p_50 V_ 04 B - 18 HDMI 3. 3VS 4, 10,1 1,1 2,13 ,14 ,15 ,16, 17, 19, 20,2 1,2 3,24 ,25 ,26 ,29, 30, 32, 33,3 4,3 5,3 6,39 ,40 ,43, 58 5VS 14, 15, 17, 19,2 5,2 6,3 0,32 ,33 ,35, 39, 43, 44 Schematic Diagrams CougarPoint - M 1/9 INTVRMEN- Integrated SUS 1.05V VRM Enable High - Enable Internal VRs Low - Enable External VRs R T CV C C D1 4 2 A 20m ils C 3 C3 2 2 D 20 3 4 1 R T C R S T# S R T C _ R TC # FW FW FW FW H0 H1 H2 H3 / / / / L A D0 L A D1 L A D2 L A D3 INT RU DE R # RT CV CC INT V RM E N R 51 0 D L34 H DA _ S P K R T10 H DA _ S P K R G SPKR K3 4 H D A _R S T # S A TA 1 R XN S A T A 1 RX P S A T A 1 T XN S A TA 1T X P E3 4 32 H D A _S D I N 0 14 H D A _S D I N 1 H D A _S D I N 0 S A TA 2 R XN S A T A 2 RX P S A T A 2 T XN S A TA 2T X P G 34 34 34 34 34 SI 2 SPI_ SO 1 S P I_ CS 0 # 6 S CK 4 H OL D # VSS *M X 25 L 3 20 5 D M 2I - 12 G S P I_ S CL K SO W P# HS HS HS HS P I _M P I _M P I _S P I _C R R R R R SI SO CL K E# 20 5 23 8 20 4 24 0 24 5 0_ 0 4 0_ 0 4 0_ 0 4 0_ 0 4 *0 _ 04 S P I_ S I S P I_ S O S P I_ S CL K S P I_ CS 0 # S P I_ CS 1 # H D A _S D I N 1 C 34 H D A _S D I N 2 A3 4 3 . 3V D03 H D A _S D I N 3 CE # R 20 3 *3 . 3 K _ 1 %_ 0 4 S P I _ H O LD # 7 1 4 , 32 H D A _ S D OU T 34 Flash Descriptor Security Overide J _ HD D1 SATA_ TXP0 S A T A _ T X N0 HD A _ S DO UT D 11 C RB 7 5 1 V A R 6 70 A 3 6 H D A _S D O * 1 0K _ 0 4 C 36 M E_ W E# H D A _D OC K _E N # / GP I O 3 3 D02 R 6 71 2 4 , 3 7 U S B 3 0 _S MI # 3. 3 V R 19 4 *1 K _ 04 S up po rt N 32 * 0 _0 4 H D A _D OC K _R S T # / GP I O 13 P C H _ J TA G _ TM S H 7 P C H _ J TA G _ TD I K5 P C H _ J TA G _ TD O H 1 3 .3 V R1 1 3 R3 3 8 R3 5 1 2 10 _ 0 6 21 0 _ 06 21 0 _ 06 JT A G _T C K S A TA 5 R XN S A T A 5 RX P S A T A 5 T XN S A TA 5T X P JT A G _T M S S A T A I C O MP O J3 NO REBOOT STRAP: HDA_SPKR High Enable 3 .3 VS S A TA 4 R XN S A T A 4 RX P S A T A 4 T XN S A TA 4T X P X HC I Fu nct io n P C H _ J T A G_ T C K _ B U F S A T A _ RX N 0 S A T A _ RX P 0 S A TA 3 R XN S A T A 3 RX P S A T A 3 T XN S A TA 3T X P SATA SPI_ SI IHDA VD D 5 AM 3 AM 1 AP7 AP5 S A T A R XN 0 C 6 2 4 S A T A R XP 0 C 6 2 3 S A T A T X N0 C6 2 5 S A T A T X P 0 C6 2 6 * 10 K _ 0 4 S E R I R Q 3 4 , 58 JT A G _T D I JT A G _T D O 0 . 0 1 u _1 6 V _ X5 R 0 . 0 1 u _1 6 V _ X5 R 0 . 0 1 u _1 6 V _ X5 R 0 . 0 1 u _1 6 V _ X5 R A M 10 AM 8 AP1 1 AP1 0 AB8 AB1 0 AF3 AF1 _0 4 _0 4 _0 4 _0 4 S A T A _R X N 0 S A T A _R X P 0 S A T A _T X N 0 S A T A _T X P 0 S A T A _ RX N4 3 5 S A T A _ RX P 4 3 5 S A T A _ TX N 4 35 S A T A _ TX P 4 3 5 AD 7 AD 5 AH 5 AH 4 S A T A _ RX N2 S A T A _ RX P 2 S A T A _ TX N 2 S A T A _ TX P 2 35 35 35 35 D03 *1 0 K _ 04 SATA HDD SATA ODD Sheet 18 of 58 CougarPoint - M 1/9 S A T A R XN 1 S A T A R XP 1 S A T A T X N1 SATATXP1 Y 7 Y 5 AD 3 AD 1 D03 Y 3 Y 1 AB3 AB1 1. 05 V S Y 11 J TA G 3 H DA _ S Y N C_ R 3 4 H D A _S Y N C _ C T R L U 25 R 23 3 *3 . 3 K _ 1 %_ 0 4 SPI_ W P# H D A _B C L K 1 4 , 32 H D A _ R S T # 32 Mb it S E R IRQ R4 2 2 32 SPI_* = 1.5"~6.5" 8 3. 3 V S R 42 1 B o ard I D V5 S E R IRQ S A TA 0 R XN S A T A 0 RX P S A T A 0 T XN S A TA 0T X P N 34 1 4 , 32 H D A _ B I T C L K H D A _S Y N C BIOS ROM NC2 R403 R378 10 K _ 0 4 Q 36 M TN 70 0 2 Z H S 3 S 1 4, 3 2 H D A _ S Y N C E3 6 K3 6 B4100 B5100 L P C _ F R A M E # 34 , 5 8 S A T A I C O MP R 3 86 3 7. 4 _ 1 % _0 4 S A T A I C O MP R 3 83 4 9. 9 _ 1 % _0 4 Y 10 S A TA I C OM P I +V 1. 0 5 S _ S A T A 3 AB1 2 S A T A 3 R C O MP O AB1 3 S A T A 3C OM P I R1 4 5 R3 5 9 1 0 0 _0 4 10 0 _ 04 S P I_ S C L K R1 2 2 T3 0_04 AH 1 S P I_ CL K S P I_ C S 0 # R3 8 5 0_04 S P I _ C S 0 # _R Y 1 4 S P I_ C S 1 # R1 4 0 * 0 _0 4 S P I _ C S 1 # _R S A TA 3 R B I A S C 6 22 C6 2 0 +C 3 93 S P I_ CS 1 # R3 6 1 S P I_ S I 10 0 _ 04 R1 3 8 V4 0_04 S P I _ MOS I S P I_ S O * 0 . 1u _ 1 6V _0 4 1 0 0 u_ 6 . 3 V _ B 2 1 u_ 1 0 V _ 06 P3 R 12 5 4. 7K _ 0 4 V1 4 OD D _ D E T E C T# 3. 3V S S A T A _ L E D # 3 0 , 35 R 1 61 1 0K _0 4 R1 4 9 *1 K _ 0 4 P1 S A T A 1 GP / G P I O1 9 C o u g arP o i n t _R e v _1 p 0 P C H _J T A G _T C K _B U F S A T A _ L E D# S A T A L E D# S P I _ MI S O S A T -22 S Y 0B P IN G ND 1 ~ 2 = G ND 1 0 K_ 0 4 S A T A 0 GP / G P I O2 1 3 3_ 0 4 S P I _ S O _R U 3 R 1 21 7 5 0 _1 % _ 04 3 .3 VS R1 4 1 T1 HD D_ NC 0 HD D_ NC 1 HD D_ NC 2 HD D_ NC 3 R B IA S _ S A T A 3 R1 3 7 S P I_ CS 0 # SP I P C H _ JT A G _T M S P C H _ JT A G _T D I P C H _ JT A G _T D O 5V S BBS_ BIT 0 BBS_BIT0 - BIOS BOOT STRAP BIT 0 U S B V CC 0 1 DEVICE V DD VD D V DD VDD 6 10 16 20 HOST RX _ 1 N R X_ 1 P 3 .3 VS 1 09 1 10 1 05 1 06 * * * * 4 . 7K _ 0 4 4 . 7K _ 0 4 4 . 7K _ 0 4 4 . 7K _ 0 4 21 R R R R 1 2 S A TA _R XN 1 _R 1 1 S A TA _R XP 1_ R GN D G ND GN D G ND GN D TX _ 1 N TX _ 1 P D1 D 0 *0 . 0 1 u_ 1 6 V _ X5 R _ 0 4 S A T A _ R X N 1 4 *0 . 0 1 u_ 1 6 V _ X5 R _ 0 4 S A T A _ R X P 1 5 La yo ut n ot e: NEAR TO J_ESATA1 SN75LVCP412RTJ 6 -0 2- 75 41 2- KQ 0 1 0u _ 1 0V _ Y 5V _ 0 8 C1 7 3 C 2 02 E U 0 0 1 -11 7 C R L -TW 23 US B _ P N9 US B _ P P 9 GN D 4 G ND3 GN D 2 GN D 1 0 . 1 u _1 0 V _ X 5R _0 4 J _ ESATA1 5 GN D 1 23 C1 7 1 *1 u _6 . 3 V _ 0 4 S A TA R X N 1 C 18 3 S A TA R X P 1 C 19 4 R X _ 0P R X _ 0N C3 5 3. 3 V S *0 . 1 u_ 1 6 V _ Y 5V _ 0 4 *0 . 0 1 u_ 1 6 V _ X5 R _ 0 4 S A T A _ T XP 1 1 *0 . 0 1 u_ 1 6 V _ X5 R _ 0 4 S A T A _ T XN 1 2 U1 1 *S N 7 5L V C P 41 2 * 4. 7 K _ 0 4 7 EN 1 5 S A TA _T X P 1 _R T X_ 0 P 1 4 S A TA _T X N 1 _ R TX _ 0 N Closed to U23 *0 . 0 1u _ 1 6V _X 5 R _0 4 S A TA T X P 1 C 17 7 S A TA T X N 1 C 18 2 R 10 4 ESATA POART C 18 S A TA _ T X P 1 _R C5 4 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 S A T A _ TX P 1 _ C S A TA _ T X N 1 _ R C5 5 US B _ P N 9 4 L15 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 S A T A _ TX N 1 _ C 4 3 W C M2 0 12 F 2 S -1 61 T 0 3-s h o rt US B _ P P 9 1 2 W C M 2 01 2 F 2 S -1 61 T 0 3-s h o rt S A TA _ R XN 1 _R C5 6 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 S A T A _ R X N 1 _ C S A TA _ R XP 1 _ R C5 7 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 S A T A _ R X P 1 _C 3 1 L14 1 L16 2 2 4 3 W C M 20 1 2F 2S -1 6 1 T0 3 -s ho rt 6 1 7 2 8 3 9 4 10 G ND GN D G ND GN D L ay ou t No te : S A T A _ T XP 1_ R S A T A _ T XN 1 _R S A T A _ R X N 1_ R S A T A _ RX P 1 _ R T -P A D 0 _0 4 0 _0 4 0 _0 4 0 _0 4 3 13 17 18 19 R 3 14 R 3 16 R 3 20 R 3 24 8 9 S A T A T XP 1 S A T A T XN 1 S A T A RX N1 S A T A RX P 1 U SBVCC 0 1 50 mil 3 .3 V S ESATA REDRIVER TXP VBU S TXN DGN D 2 D+ RX N GN D 4 RX P 11 GN D 3 2 0 , 2 1, 14 , 1 5 , 1 7, 1 8 , 2 5, 2 6 , 3 0, 3 2 , 3 3, 2 6 , 2 8, 3 2 , 3 5, 3 7 , 3 9, 2 9, 3 4 , 3 5, 25 , 2 6 , 30 , 4 0 1. 05 V S 35 , 3 9 , 43 , 4 4 5V S 40 , 4 1 , 42 , 4 6 5V 36 , 3 8 , 39 , 4 5 V D D 3 2 1 , 26 RT CV C C 3 , 4 , 6, 24 , 2 5 , 26 , 4 0 , 43 1 . 0 5 V S _V TT 3 , 4 , 9, 1 4 , 1 5, 20 , 2 1 , 23 , 2 4 , 25 , 2 6 , 2 8, 2 9 , 3 0, 3 2 , 3 5, 3 6 , 3 7, 39 , 4 0 , 41 , 4 2 3. 3V 4 , 1 0 , 11 , 1 2 , 1 3, 1 4 , 1 5, 1 6 , 1 7, 1 8 , 2 0 , 21 , 2 3 , 24 , 2 5 , 26 , 2 9 , 3 0, 3 2 , 3 3, 3 4 , 3 5, 3 6 , 3 9 , 40 , 4 3 , 58 3 . 3 V S CougarPoint - M 1/9 B - 19 B.Schematic Diagrams V DD 3 SATA 6G 1 u _ 6. 3 V _ X 5R _ 06 L D R Q0 # LD R Q 1# / G P I O2 3 RTC 2 X 7100M L P C _ A D 0 3 4, 5 8 L P C _ A D 1 3 4, 5 8 L P C _ A D 2 3 4, 5 8 L P C _ A D 3 3 4, 5 8 D 36 S RT CR S T # K2 2 C 17 P C H _ I N T V R ME N C 38 A3 8 B3 7 C 37 F W H 4 / L F R A ME # G 22 S M_ I N T R U D E R # D02 P1 P2 P3 P4 P5 P6 P7 P8 P9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 C 20 RT C_ X 2 RT CX 2 33 0 K _ 04 R 49 5 D02 RT CX 1 R T C _ R S T# R 16 9 3 .3 VS R 41 8 1 K _1 % _ 04 U 19 A A2 0 RT C_ X 1 C 5 23 S P I_ V DD R3 5 8 R3 4 6 *1 K _ 0 4 1 0 M_ 0 4 2 0 K _ 1% _ 0 4 R4 0 8 1 M_ 0 4 S1 S2 S3 S4 S5 S6 S7 R 1 76 D02 R 4 14 X51 00M S HO RT H DA _ S Y N C 2 2 8 5 2 04 -0 2 00 N B H 8 0 0. 9 G C2 4 4 15 p _ 50 V _ N P O _ 04 JO P E N 1 *O P E N _ 1 0m i l -1M M 1 u _ 6. 3 V _ X 5R _ 06 1 + 1 J _ CB A T 1 J _ CB A T 2 1 + 2 *K T S -B A T -01 2 -0 01 RT C CLE AR C 5 05 X4 * 32 . 7 6 8K H z 2 0 K _ 1% _ 0 4 J_ C B A T3 32 . 7 6 8 K H z R 2 39 1K _ 0 4 X3 D02 R 3 89 C 2 95 *0 . 1u _ 1 0V _X 5 R _ 0 4 1 0K _0 4 * 1K _0 4 1 .5 V _ V CC S US H DA B A T 5 4C W GH 3. 3 V S 3 .3 VS S E R IRQ H DA _ S P K R Zo= 50O ? 5% 1 u _ 6. 3 V _ X 5R _ 06 2 1 RT C_ V B A T _ 1 10m ils CougarPoint - M (HDA,JTAG,SATA) C2 6 1 15 p _ 50 V _ N P O _ 04 LP C A 2 1 V D D3 1 3 4 20m ils Schematic Diagrams CougarPoint - M 2/9 3 .3 V R N7 SM SM SM SM CougarPoint - M (PCI-E,SMBUS,CLK) 4 3 2 1 L 0_ C LK B _ DA T A B _ CL K L 0_ D A T A U 1 9B P C IE _ R X N 4_ 1 3 94 P C IE _ R X P 4 _ 1 39 4 P C I E _ TX N 4_ 1 3 94 P C I E _ TX P 4 _ 1 39 4 2 8 P C IE _ R X N 5_ 3 G 2 8 P C IE _ R X P 5 _ 3 G 28 P C I E _ TX N 5_ 3 G 28 P C I E _ TX P 5 _ 3 G Sheet 19 of 58 CougarPoint - M 2/9 PCI-E x1 Lane Lane Lane Lane Lane Lane Lane Lane 1 2 3 4 5 6 7 8 C 56 4 C 56 5 C 56 6 C 56 7 0 . 1u _ 1 0V _ X 5 R _ 0 4 0 . 1u _ 1 0V _ X 5 R _ 0 4 B G 36 B J 36 A V 34 A U 34 0 . 1u _ 1 0V _ X 5 R _ 0 4 0 . 1u _ 1 0V _ X 5 R _ 0 4 BF BE AY BB 36 36 34 34 0 . 1u _ 1 0V _ X 5 R _ 0 4 0 . 1u _ 1 0V _ X 5 R _ 0 4 BG BH AY BB 37 37 36 36 B J 38 B G 38 A U 36 A V 36 Usage USB3.0 GLAN / CARD READER WLAN 1394 3G X X X B G 40 B J 40 A Y 40 B B 40 B E 38 B C 38 A W 38 A Y 38 Y 40 Y 39 3 7 C L K _ P C IE _U S B 3 0 # 3 7 CL K _ P CIE _ U S B 3 0 3 7 U S B 3 0 _C L K R E Q # PER N4 PER P4 PET N 4 PET P4 P C I E C L K R Q 1# P C I E C L K R Q 2# R 29 0 R 39 7 S MB _D A T A 1 0, 1 1 , 1 2, 13 D R A M R S T _ C N T R L 4 ,9 S ML 0 A L E R T # / GP I O6 0 C8 S M L0 _ C L K G1 2 S M L0 _ D A T A P C IE C LK R Q6 # S M L0 C LK 2 . 2 K _ 04 2 . 2 K _ 04 RN 8 10 K _ 8 P 4 R _ 0 4 8 1 7 2 6 3 5 4 D RA M RS T _ CN T RL 1 3 94 _ P C I E C L K R Q 5 # S M L0 D A TA E 1 4 S MC _ C P U _ T H E R M_ R R 3 9 0 M1 6 S M L 1D A T A / GP I O7 5 R 16 2 R 38 8 1 K_ 0 4 1 0 K _ 04 PER N8 PER P8 PET N 8 PET P8 S MC _C P U _ T H E R M 3 4 S MD _C P U _ T H E R M 3 4 M7 CL _ CL K 1 T1 1 C L _ D A TA 1 P1 0 C L _ R S T# 1 C L _C L K 1 CL _ CL K 1 2 9 CL _ DA T A 1 2 9 C L _D A T A 1 CL _ RS T 1 # CL _ RS T # 1 2 9 P C I E C L K R Q2 # R3 4 7 1 0K _ 0 4 P C I E C L K R Q1 # D GP U _ P R S N T# I C H _ G P IO4 6 R1 4 2 R2 1 0 R3 7 1 1 0K _ 0 4 *1 0 K _ 04 1 0K _ 0 4 M X M_ C L K R E Q# L A N _C L K R E Q # C L K _B U F _ C P Y C L K _ N C L K _B U F _ C P Y C L K _ P R N3 1 0 K _8 P 4 R _0 4 8 1 7 2 6 3 5 4 10K pull-down to GND M1 0 MX M _C L K R E Q # AB3 7 AB3 8 C L K _ P C I E _ MX M# C L K _ P C I E _ MX M P E G_ A _ C L K R Q# / GP I O4 7 C LK OU T _ P C I E 0N C LK OU T _ P C I E 0P C LK OU T _ P C I E 1N C LK OU T _ P C I E 1P *0 _ 0 4 S M D _ C P U _ TH E R M 3 . 3V S C L K O U T _ P E G_ A _ N C L K OU T_ P E G _ A _P C L K OU T _D MI _ N C L K O U T _ D M I_P P C I E C L K R Q1 # / GP IO 1 8 CL K O UT _ DP _ N C L K OU T_ D P _P C LK OU T _ P C I E 2N C LK OU T _ P C I E 2P V 10 C L K IN _D MI _ N C LK IN _ D M I_P P C I E C L K R Q2 # / GP IO 2 0 Y 37 Y 36 29 C LK _P C IE _ MI N I# 2 9 C L K _ P C I E _ MI N I S MC _ C P U _T H E R M _R S MD _ C P U _T H E R M D03 S MB _C L K 10 ,1 1 ,1 2, 1 3 A 1 2 D R A M R S T_ C N T R L _ R S M L 1C L K / GP I O5 8 PER N7 PER P7 PET N 7 PET P7 M1 A A 48 A A 47 P C H_ B T _ E N# C1 3 U S B 3 0 _C L K R E Q # _R A B 49 A B 47 S M B _D A T A S M L1 A L E R T# / P C H H OT # / GP I O7 4 P C I E C L K R Q0 # / GP IO 7 3 0_04 S M B _C L K U S B 3 0 _C L K R E Q #_ R P C H_ B T _ E N# J2 R3 3 5 H1 4 C9 S MB D A TA PER N3 PER P3 PET N 3 PET P3 PER N6 PER P6 PET N 6 PET P6 P C H _ B T _E N # S MB C LK PER N2 PER P2 PET N 2 PET P2 PER N5 PER P5 PET N 5 PET P5 E1 2 S M B A L E R T # / GP I O1 1 SMBUS C 55 5 C 55 6 0 . 1u _ 1 0V _ X 5 R _ 0 4 0 . 1u _ 1 0V _ X 5 R _ 0 4 34 34 32 32 Link 16 16 16 16 P C IE _ R X N 3_ W L A N P C IE _ R X P 3 _ W L A N P C I E _ TX N 3_ W L A N P C I E _ TX P 3 _ W L A N C 55 7 C 55 8 BE BF BB AY C LK OU T _ P C I E 3N C LK OU T _ P C I E 3P C L K I N _ G N D 1_ N C L K I N _ GN D 1 _P MX M _C L K R E Q # 14 C L K _ P C I E _M X M# 1 4 C L K _ P C I E _M X M 1 4 AV2 2 A U2 2 C L K _ E XP _N C L K _ E XP _P 4 4 I C H _ G P IO4 6 R 37 2 3 .3 V * 10 K _ 0 4 A M1 2 A M1 3 BF1 8 BE1 8 C L K _B U F _ R E F 14 _ R R 4 3 5 C L K _P C IE _ IC H _ N _ R R 4 0 0 C L K _P C IE _ IC H _ P _ R R 3 9 5 C L K _ B U F _D OT 9 6 _N _ R R 4 1 2 C L K _ B U F _D OT 9 6 _P _ R R 4 0 4 C L K _ B U F _C K S S C D _ N _ R R 3 4 9 C L K _ B U F _C K S S C D _ P _ R R 3 4 8 C L K _ P C I E _ I C H _ N _R CL K _ P C IE _ ICH_ P _ R B J 30 C L K _ B U F _ C P Y C L K _ N B G3 0 C L K _ B U F _ C P Y C L K _ P 1 0K _ 0 4 1 0K _ 0 4 1 0K _ 0 4 1 0K _ 0 4 1 0K _ 0 4 1 0K _ 0 4 1 0K _ 0 4 A8 P C I E C L K R Q3 # / GP IO 2 5 Y 43 Y 45 L A N _ C LK R E Q# L 12 V 45 V 46 1 6 C L K _ P C I E _ 1 3 94 # 16 C LK _P C IE _ 1 39 4 1 3 94 _ P C I E C L K R Q 5 # L 14 C L K I N _ D OT _ 96 N C L K I N _D OT _ 9 6P C LK OU T _ P C I E 4N C LK OU T _ P C I E 4P C L K IN _ S A T A _ N C L K IN _ S A T A _P P C I E C L K R Q4 # / GP IO 2 6 C LK OU T _ P C I E 5N C LK OU T _ P C I E 5P G2 4 E2 4 C L K _ B U F _D OT 9 6 _N _ R C L K _ B U F _D OT 9 6 _P _R AK7 AK5 C L K _ B U F _C K S S C D _ N _ R C L K _ B U F _C K S S C D _ P _ R K4 5 C L K _ B U F _R E F 1 4 _R X7 D03 * 25 M H z 2 1 3 4 C3 0 3 R E F C LK 1 4 I N P C I E C L K R Q5 # / GP IO 4 4 C L K IN _P C I L OO P B A C K H4 5 C L K _ P C I_F B 23 R2 1 7 X8 X 8A 0 2 5 00 0 F G1 H _2 5 MH z C LK OU T _ P E G _B _ N C LK OU T _ P E G _B _ P X T A L 25 _ I N X T A L 25 _ OU T V4 7 V4 9 X TA L2 5 _ I N X TA L2 5 _ OU T Y4 7 X C L K _ R C OM P 2 1M _ 04 A B 42 A B 40 2 8 C L K _ P C I E _ 3 G# 28 C LK _P C IE _ 3 G 1 8 p _5 0 V _ N P O _0 4 P E G _ B _ C L K R Q # / GP IO 56 V 40 V 42 P C I E C L K R Q6 # XC L K _ R C O MP R2 0 8 9 0 . 9 _ 1% _ 0 4 1.0 5 V S C LK OU T _ P C I E 6N C LK OU T _ P C I E 6P 90.9-O ? % pullup to +VccIO (1.05V, S0 rail) 1 . 05 V S 19 ,2 1 ,25 , 2 6 , 3 0, 4 0 3 . 3V S 4, 1 0 ,1 1, 12 , 1 3 , 14 ,1 5 , 1 6,1 7 ,1 8, 1 9 , 2 1 , 23 , 2 4 , 25 ,2 6 ,2 9, 3 0 , 3 2, 33 , 3 4 , 35 ,3 6 ,3 9, 4 0 , 4 3, 5 8 1 . 05 V S _ V T T 3 , 4, 6 , 2 4 , 2 5,2 6 ,4 0, 4 3 3 . 3V 3, 4 , 9 , 1 4 , 15 ,1 9 , 21 , 2 3 ,2 4, 2 5 , 2 6, 28 , 2 9 , 30 ,3 2 ,3 5, 3 6 , 3 7,3 9 , 4 0 , 41 ,4 2 T 13 P C I E C L K R Q6 # / GP IO 4 5 V 38 V 37 I C H _ GP I O 4 6 K4 3 C LK OU T _ P C I E 7N C LK OU T _ P C I E 7P K 12 P C I E C L K R Q7 # / GP IO 4 6 A K 14 A K 13 C LK OU T _ I T P X D P _ N C LK OU T _ I T P X D P _ P C o ug a rP o i nt _ R ev _ 1 p 0 B - 20 CougarPoint - M 2/9 C3 0 2 E6 2 8 3 G_ C L K R E Q# 4 1 I C H _ GP IO 46 1 8 p _5 0 V _ N P O _0 4 1 29 W L A N _C L K R E Q # 3 6 C L K _ P C I E _ GL A N # 36 C LK _P C IE _ GL A N F LE X C LO CK S B.Schematic Diagrams 29 29 29 29 P C IE _R X N 2 _ GL A N P C IE _R X P 2_ G LA N P C IE _ T X N 2 _ GL A N P C IE _ T X P 2_ G LA N 0 . 1u _ 1 0V _ X 5 R _ 0 4 0 . 1u _ 1 0V _ X 5 R _ 0 4 2 . 2 K _ 8P 4R _ 04 PER N1 PER P1 PET N 1 PET P1 Controller 36 36 36 36 C 56 2 C 56 3 B G 34 B J 34 A V 32 A U 32 CLOCKS P C I E _ R X N 1_ U S B 3 0 P CIE _ RX P 1 _ US B 3 0 P C I E _ TX N 1_ U S B 3 0 P C I E _ TX P 1 _ U S B 3 0 PCI-E* 37 37 37 37 5 6 7 8 C L K OU TF L E X 0 / GP I O6 4 F47 C L K OU TF L E X 1 / GP I O6 5 H4 7 C L K OU TF L E X 2 / GP I O6 6 K4 9 C L K OU TF L E X 3 / GP I O6 7 DG P U_ P R S NT # D GP U _ P R S N T # 1 4 Schematic Diagrams CougarPoint - M 3/9 CougarPoint -M (DMI,FDI,GPIO) U1 9 C 3 .3 VS I_ RX N I_ RX N I_ RX N I_ RX N 3 3 3 3 DM DM DM DM I_ RX P 0 I_ RX P 1 I_ RX P 2 I_ RX P 3 3 3 3 3 D MI _T X N 0 D MI _T X N 1 D MI _T X N 2 D MI _T X N 3 3 3 3 3 D D D D MI MI MI MI BC 2 4 BE2 0 BG 1 8 BG 2 0 0 1 2 3 BE2 4 BC 2 0 BJ 1 8 BJ 2 0 AW 2 4 AW 2 0 BB1 8 AV1 8 AY 2 4 AY 2 0 AY 1 8 AU 1 8 _T X P 0 _T X P 1 _T X P 2 _T X P 3 D D D D MI 0 R MI 1 R MI 2 R MI 3 R XN XN XN XN D D D D MI 0 R MI 1 R MI 2 R MI 3 R XP XP XP XP D D D D MI 0 T X N MI 1 T X N MI 2 T X N MI 3 T X N D D D D MI 0 T X P MI 1 T X P MI 2 T X P MI 3 T X P F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R FD FD FD FD FD FD FD FD FDI DM DM DM DM DMI 3 3 3 3 X N0 X N1 X N2 X N3 X N4 X N5 X N6 X N7 I_ RX P 0 I_ RX P 1 I_ RX P 2 I_ RX P 3 I_ RX P 4 I_ RX P 5 I_ RX P 6 I_ RX P 7 F D I_ INT R4 1 5 1 .0 5 VS D M I _ C O MP _R 4 9 . 9 _ 1% _ 0 4 BJ 2 4 D MI _ Z C OM P F DI_ F S Y N C0 D MI _ I R C O MP F DI_ F S Y N C1 B B B B B B B B G1 4 B1 4 F14 G1 3 E1 2 G1 2 J1 0 H9 P M_ C L K R U N # R1 2 3 8 .2 K_ 0 4 P CIE _ W A K E # R1 5 5 1 K_ 0 4 P M_ S L P _ L A N # R3 8 7 1 0 K_ 0 4 S W I# R1 5 6 1 0 K_ 0 4 S US _ P W R_ A C K R1 5 9 1 0 K_ 0 4 P W R_ B T N # R4 0 5 * 1 0 K _ 04 A C_ P R E S E N T R4 0 2 1 0 K_ 0 4 P M_ B A T L O W # R3 8 1 8 .2 K_ 0 4 D S W O D V RE N R1 7 4 3 3 0 K_ 0 4 R1 8 0 * 3 3 0K _0 4 R1 3 3 1 0 K_ 0 4 3 .3 V A W16 R TC V C C B C1 0 A V1 4 D MI 2 R B I A S F D I _L S Y N C 0 B B1 0 F D I _L S Y N C 1 A L L _S Y S _ P W R G D A 18 D S W OD V R E N E 22 R S M R S T# B 9 PC IE_ W AKE # C 12 S U S _ P W R _ A CK R1 4 4 3 .3 VS 1 0K _0 4 SU SAC K# SY S_ RE S ET # K3 S Y S _ P W R OK P1 2 SY S_ RE SET # S Y S _ P W R OK L22 P M _P C H _ P W R OK 3 4 P M_ P C H _P W R O K R 378 0_04 P W RO K P M_ M P W R OK L10 A P W RO K B1 3 4 P M_ D R A M _ P W R GD 34 D R A M P W R OK R S M RS T # R4 0 6 R S MR S T # S U S _ P W R _A C K 3 4 SU S_ PW R _ AC K 34 C 21 R S M R S T# 1 0 K_ 0 4 W AKE# H 20 P M _B A T LO W # E1 0 SW I# SU S_ STAT# DSWODVREN - On Die DSW VR Enable P M _ CL K R UN # 5 8 SU S_ STAT # 5 8 N 14 B R I G H T N E S S _ S W # 15 D 10 S L P _ S 5 # / G P I O6 3 Sheet 20 of 58 CougarPoint - M 3/9 P C I E _ W A K E # 2 8 , 2 9, 3 6 , 3 7 S U S C LK / G P I O6 2 D03 R7V25 STUFFED, R7V26 UNSTUFFED Enabled (DEFAULT) R7V26 STUFFED, R7V25 UNSTUFFED Disabled SL P_ S5 # D02 H 4 SL P_ S4 # F 4 SL P_ S3 # A C P R E S E N T / GP I O3 1 SL P_ SU S# B A T L O W # / G P I O7 2 PM SY N CH SU SB# G 10 SL P_ A# G 16 SL P_ SU S# SL P_ A# A P1 4 A1 0 SW I# P M _C L K R U N # G8 S U S _ S T A T # / G P I O6 1 S U S W A R N #/ S U S P W R D N A C K / GP I O 3 0 A C _P R E S E N T N 3 C L K R U N # / G P I O3 2 P W RB T N # 23 , 3 4 A C _ P R E S E N T 34 DP W RO K E2 0 P W R _ B T N# P W R_ B T N# K1 6 System Power Management D S W V R ME N K 14 R I# SU SC# 3 4, 41 SU SB# 3 2, 33 , 3 4 , 3 7 , 3 9 H _ P M_ S Y N C 4 P M _S LP _L A N # S L P _ L A N # / G P I O2 9 C o ug a rP o i n t _ R e v _ 1 p 0 3 .3 V 3 .3 V 3 .3 V 3 .3 V 6 14 14 1 . 0 5 V S _ V T T _E N R 134 4 3 D E L A Y _P W R G D 11 8 7 7 2 *0 _ 04 P M_ M P W R OK SY S_ PW R O K R1 3 5 10 K _ 0 4 7 1 .0 5 V S_ VT T _ EN R 3 77 *1 0 m li _ s h ort 13 10 5 7 4 0 1 .0 5 V S_ PW R G D 4 2 1 .8 V S _ P W R G D 3 12 9 4 6 0 . 8 5V S _ P W R GD 4 14 1 4 1 D D R 1 . 5 V _ P W R GD 14 U1 7 A 7 4L V C 0 8 P W U 1 7D 7 4 L V C0 8 P W U1 7 C 74 L V C 0 8P W U 17 B 7 4 L VC0 8 P W 40 A L L _ S Y S _ P W R GD 1 4 , 15 , 3 4 , 4 3 ON 1. 05 V S 1 9 , 2 0 , 2 5, 2 6 , 3 0 , 4 0 0. 85 V S 7 ,4 6 3. 3V S 4 , 1 0 , 1 1 , 12 , 1 3 , 1 4 , 1 5, 16 , 1 7 , 1 8 , 1 9, 20 , 2 3 , 2 4 , 2 5, 26 , 2 9 , 3 0 , 3 2, 33 , 3 4 , 3 5 , 3 6, 39 , 4 0 , 4 3 , 5 8 3. 3V 3 , 4 , 9 , 1 4 , 1 5, 1 9 , 2 0 , 2 3 , 2 4, 2 5 , 2 6 , 2 8 , 29 , 3 0 , 3 2 , 3 5 , 36 , 3 7 , 3 9 , 4 0 , 41 , 4 2 1. 05 V S _V TT 3 , 4 , 6 , 2 4 , 2 5 , 2 6, 4 0 , 4 3 RT C V CC 1 9 ,2 6 V DD 3 1 9 , 2 9 , 3 4, 3 5 , 3 6 , 3 8 , 39 , 4 5 CougarPoint - M 3/9 B - 21 B.Schematic Diagrams BH 2 1 7 5 0 _1 % _ 0 4 J1 4 Y1 4 E1 4 H1 3 C1 2 J1 2 G1 0 G9 A V1 2 BG 2 5 R4 0 7 B A B B B B B B Schematic Diagrams CougarPoint - M 4/9 CougarPoint -M (LVDS,DDI) U19D L_BKLTEN L_VDD_EN SDVO_TVCLKINN SDVO_TVCLKI NP L_BKLTCTL SDVO_STALLN SDVO_STALLP P45 AN48 AM47 AK47 AJ48 AN47 AM49 AK49 AJ47 AF40 AF39 AH45 AH47 AF49 AF45 AH43 AH49 AF47 AF43 N48 P49 T49 T39 M40 M47 M49 R431 1K_1%_04 DAC_IREF_R T43 T42 LVDSA_CLK# LVDSA_CLK LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3 DDPB_AUXN DDPB_AUXP DDPB_HPD LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3 LVDSB_CLK# LVDSB_CLK LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3 LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3 CRT_BLUE CRT_GREEN CRT_RED CRT_DDC_CLK CRT_DDC_DATA DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P DDPC_CTRLCLK DDPC_CTRLDATA DDPC_AUXN DDPC_AUXP DDPC_HPD DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P DDPD_CTRLCLK DDPD_CTRLDATA CRT_HSYNC CRT_VSYNC DAC_IREF CRT_IRT N DDPD_AUXN DDPD_AUXP DDPD_HPD DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P AT49 AT47 AT40 AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49 P46 P42 AP47 AP49 AT38 AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49 M43 M36 AT45 AT43 BH41 BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42 CougarPoint_Rev_1p0 Connect to GND No Connect External Graphics (PCH Integrated Graphics Disable) External Graphics (PCH Integrated Graphics Disable) 4,10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,29, 30, 32, 33, 34, 35, 36,39,40,43,58 3. 3VS 14,15,17,18, 19, 25, 26, 30, 32, 33,35,39,43,44 5VS B - 22 CougarPoint - M 4/9 SDVO LVD_VREFH LVD_VREFL P38 M39 Display P ort B AK39 AK40 Sheet 21 of 58 CougarPoint - M 4/9 SDVO_CTRLCLK SDVO_CTRLDATA Display P ort C AE48 AE47 LVD_IBG LVD_VBG Digital Display Interface B.Schematic Diagrams AF37 AF36 SDVO_INTN SDVO_I NTP AM42 AM40 AP39 AP40 L_CTRL_CLK L_CTRL_DATA LVDS T45 P39 L_DDC_CLK L_DDC_DATA CRT T40 K47 AP43 AP45 Display P ort D J47 M45 Schematic Diagrams CougarPoint - M 5/9 CougarPoint -M (PCI,USB,NVRAM) U19E 0 0 1 1 Boot BIOS Location 0 1 0 1 R436 LPC Reserved PCI SPI *1K_04 (NAND) BBS_BIT1 R433 PCI_GNT#3 *1K_04 BE28 BC30 BE32 BJ32 BC28 BE30 BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28 AW30 3. 3VS 5 6 7 8 RN13 4 3 2 1 INT_PIRQA# INT_PIRQD# INT_PIRQE# SATA_ODD_DA# R430 *1K_04 INT_PIRQE# MPC Sw itch Co ntrol MPC OF F -- 0 DEFAULT MPC ON -- 1 10K_8P4R_04 3. 3VS INT_PIRQB# INT_PIRQC# R426 8.2K_04 R427 8.2K_04 INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD# K40 K38 H38 G38 PCI_REQ#0 PCI_REQ#1 PCI_REQ#3 C46 C44 E40 3. 3VS R206 R438 4 3 2 1 BBS_BI T1 DGPU_PWM_SELECT# PCI_GNT#3 PCI_REQ#0 PCI_REQ#1 PCI_REQ#3 INT_PIRQG# 10K_8P4R_04 INT_PIRQE# SATA_ODD_DA# INT_PIRQG# INT_PIRQH# 35 SATA_ODD_DA# 34 PIN PLT_RST# to Buffer D03 PME# R654 R211 R434 34 PCLK_KBC PLT_RST# *22_04 22_04 PCLK_TPM_R CLK_PCI_FB_R 22_04 CLK_PCI_KBC_R G42 G40 C42 D44 C6 H49 H43 J48 K42 H40 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 TP21 TP22 TP23 TP24 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 TP25 TP26 TP27 TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 TP39 TP40 RSVD28 RSVD29 PIRQA# PIRQB# PIRQC# PIRQD# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54 GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55 PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPI O4 PIRQH# / GPI O5 USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P USBRBI AS# USBRBI AS AT10 BC8 AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6 AV5 AV10 Sheet 22 of 58 CougarPoint - M 5/9 AT8 AY5 BA2 AT12 BF3 C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32 C33 USB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN3 USB_PP3 USB_PN4 USB_PP4 USB_PN5 USB_PP5 35 35 35 35 28 28 29 29 35 35 28 28 USB PO RT0 US B PORT1 HM65 no support Port6 and Port7 D02 USB_PN9 19 USB_PP9 19 USB_PN6 35 USB_PP6 35 D02 3.3V USB_BI AS R187 USB_OC#89 USB_OC#1011 USB_OC#67 USB_OC#1213 5 6 7 8 USB_OC#23 USB_OC#14 USB_OC#45 5 6 7 8 CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4 OC0# / GPI O59 OC1# / GPI O40 OC2# / GPI O41 OC3# / GPI O42 OC4# / GPI O43 OC5# / GPI O9 OC6# / GPI O10 OC7# / GPI O14 4 3 2 1 22.6_1%_06 10K_8P4R_04 B33 PME# PLTRST# RN9 A14 K20 B17 C16 L16 A16 D14 C14 USB_OC#1 USB_OC#23 USB_OC#45 USB_OC#67 USB_OC#89 USB_OC#1011 USB_OC#1213 USB_OC#14 GPIO14 USB_OC#1 35 RN10 4 3 2 1 10K_8P4R_04 R398 *0_04 AC_PRESENT 21,34 CougarPoint_Rev_1p0 3. 3VS *0.1u_10V_X5R_04 5 C228 D47 E42 F46 K10 4, 14, 58 PLT_RST# 58 PCLK_TPM 20 CLK_PCI_FB PLT_RST# U15 1 4 BUF_PLT_RST# 16,28,29,34,36,37 2 3 5 6 7 8 RN12 10K_04 INT_PIRQH# *10K_04 DGPU_PWM_SELECT# RSVD5 RSVD6 AY7 AV7 AU3 BG4 MC74VHC1G08DFT1G R157 100K_04 4,10, 11, 12,13,14,15,16,17,18,19,20, 21, 24,25,26,29,30,32,33,34,35,36, 39, 40,43,58 3.3VS 3,4,9,14,15,19,20, 21, 24,25,26,28,29,30,32,35,36,37, 39, 40,41,42 3.3V CougarPoint - M 5/9 B - 23 B.Schematic Diagrams B21 M20 AY16 BG46 Und erstand the RE D FONT d efine RSVD1 RSVD2 RSVD3 RSVD4 TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20 USB BBS_BIT0 RSVD BBS_BIT1 BG26 BJ26 BH25 BJ16 BG16 AH38 AH37 AK43 AK45 C18 N30 H3 AH12 AM4 AM5 Y13 K24 L24 AB46 AB45 PCI B o o t B IOS S t r a p Schematic Diagrams CougarPoint - M 6/9 CougarPoint - M (GPIO,VSS_NCTF,RSVD) U 19 F E D P _C A R D _ D E T # 34 10 K _ 1 % _ 0 4 E D P _ CA R D_ D E T # R 3 41 * 0 _0 4 34 S CI# 41 ICC _ E N# R 15 3 3 . 3V Su pp or t XH CI F un ct io n R6 7 2 1 9, 3 7 U S B 3 0 _ S MI # T A C H 5 / GP I O 6 9 D G P U _H P D _I N T R # T A C H 2 / G P I O6 S CI # T A C H 3 / G P I O7 ICC _ E N# R1 2 4 3 . 3V S 1 0 K_ 0 4 0 _0 4 L A N _ P H Y _ P W R _ C TR L / G P I O1 2 G2 H OS T _ A L E R T# 1 D 40 T A C H 0 / G P I O1 7 B IO S _ RE C T5 HO S T _ A L E RT # 2 E8 S C LO C K / GP I O2 2 S B _ B L ON S B _ B L ON GP I O2 7 P C H_ M UT E # C RB /S V DE TE CT N O ST UF F [D ET EC T ] P8 MP C _ L E D _ C TR L K1 P C H _ MU T E # K4 S A T A _ OD D _P R S N T #_ R V8 C R B _ S V _ DE T GP I O2 8 10 K _ 0 4 F D I _O V R V L TG M5 MF G _ MO D E N 2 T 14 V _ N V R A M _V C C Q K B C _ R S T # 34 H _ CPU P W R G D 4 H _ T HR MT R I P # 4 R 355 1 K_ 0 4 I N I T 3 _ 3V # R3 5 4 AY 1 P RO C_ SE L E T 4 4 . 7 K _ 04 AH 8 R 35 0 AK1 1 R 36 3 0_04 A H 10 R 36 7 0_04 AK1 0 R 36 4 0_04 TS_ VSS 2 TS_ VSS 3 TS_ VSS 4 0_04 P3 7 GF X _ C R B _ D E T M3 T E S T _ S E T _ UP V1 3 NC _ 1 S D A T A OU T 0 / GP I O3 9 D02 10 0 K _ 0 4 T E S T_ D E T BG 2 S D A T A OU T 1 / GP I O4 8 V S S _ N CT F _ 1 5 S A T A 5 G P / G P I O4 9 V S S _ N CT F _ 1 6 GP I O5 7 V S S _ N CT F _ 1 7 V3 B G 48 D 6 BH 3 T E S T _ S E T _ UP B H 47 BJ 4 V S S _ N CT F _ 1 V S S _ N CT F _ 1 9 V S S _ N CT F _ 2 V S S _ N CT F _ 2 0 V S S _ N CT F _ 3 V S S _ N CT F _ 2 1 BJ 4 4 A4 5 BJ 4 5 A4 6 V S S _ N CT F _ 4 D03 R1 4 7 R1 6 0 *1 K _ 0 4 1 0 K _ 04 R3 7 9 1 0 K _ 04 A5 H O S T_ A L E R T # 1 IC C_ E N # V S S _ N CT F _ 5 A6 BJ 4 6 V S S _ N CT F _ 2 2 BJ 5 V S S _ N CT F _ 2 3 BJ 6 V S S _ N CT F _ 6 V S S _ N CT F _ 2 4 V S S _ N CT F _ 7 V S S _ N CT F _ 2 5 V S S _ N CT F _ 8 V S S _ N CT F _ 2 6 V S S _ N CT F _ 9 V S S _ N CT F _ 2 7 V S S _ N CT F _ 1 0 V S S _ N CT F _ 2 8 V S S _ N CT F _ 1 1 V S S _ N CT F _ 2 9 V S S _ N CT F _ 1 2 V S S _ N CT F _ 3 0 V S S _ N CT F _ 1 3 V S S _ N CT F _ 3 1 V S S _ N CT F _ 1 4 V S S _ N CT F _ 3 2 B3 HO ST _ A L E RT # 2 C2 B4 7 C4 8 BD 1 D1 BD 4 9 D4 9 B E1 3 .3 V S R N 11 E1 BE4 9 S CI# S MI # MF G _ MO D E S A T A _ O D D _ P W R GT E4 9 B F1 F1 BF4 9 F49 C ou g a rP o i nt _R e v _ 1 p0 C R I T _T E M P _ R E P # _R MP C _ LE D _ C T R L DG P U_ H P D_ IN T R# 1 0 K_ 0 4 1 0 K_ 0 4 D G P U _ H OL D _ R S T # D G P U_ P W R O K ICC _ E N# D G P U _P W R O K P L L _O D V R _ E N F D I _O V R V L TG R1 6 3 R4 2 9 R3 6 5 R3 5 6 *1 K _ 0 4 *1 0 K _ 0 4 *1 K _ 0 4 1 0 0K _0 4 R3 4 5 2 0 0K _0 4 S A TA _O D D _ P R S N T # _ R B - 24 CougarPoint - M 6/9 34 V S S _ N CT F _ 1 8 3 .3 V 3 .3 V S G A2 0 3 . 3V S DF _ T V S A4 4 1 0K _8 P 4 R _ 04 R1 3 9 R4 2 8 3 9 0 _1 % _ 0 4 TS_ VSS 1 S L OA D / G P I O 3 8 1 0 0 K_ 0 4 * 0 _0 4 1 0K _8 P 4 R _ 04 R N 6 1 8 2 7 3 6 4 5 R3 6 8 I NI T 3 _ 3V # A4 8 7 6 5 1 0 K_ 0 4 S A T A 3 G P / G P I O3 7 R 3 93 1 2 3 4 R3 4 0 A Y 10 S T P _ P C I # / GP I O3 4 R 1 46 R 3 66 R 3 94 P5 TH R MT R I P # S A T A 2 G P / G P I O3 6 C R I T _ TE MP _ R E P # _ R 3 . 3V S H _P E C I 4 , 3 4 3 . 3V S P RO CP W RG D GP I O3 5 35 S A T A _ OD D _ P R S N T # *1 0 K _ 04 * 10 K _ 0 4 1 . 05 V S _V TT * 0_ 0 4 A Y 11 E1 6 P L L _O D V R _ E N 1 0 0 K_ 0 4 R 1 26 *0 _ 0 4 P E CI S A T A 4 G P / G P I O1 6 R 1 43 3 . 3V S 1 0 K_ 0 4 R1 6 8 R1 7 3 RC IN # 33 R 5 14 3 .3 VS R3 4 3 A 2 0 GA T E U 2 D G P U _H OL D _ R S T # 1 4 D GP U _ H O L D _ R S T# 15 1 . 5 K _ 1 % _ 04 3 .3 VS A U 16 H _ P E C I _ R P4 GP I O1 5 D G P U _P W R O K GF X _ C R B _ D E T 1 . 5 K _ 1 %_ 0 4 C 4 E D I D _ S E L E C T# * 0 _0 4 * 10 K _ 0 4 1 . 5 K _ 1 %_ 0 4 R2 0 1 T A C H 7 / GP I O 7 1 GP I O2 4 / M E M_ L E D Sheet 23 of 58 CougarPoint - M 6/9 R2 0 0 A4 0 R1 9 8 GP I O8 R 3 57 B IO S RE CO VE R Y D IS AB LE -- -- N O ST UF F (D EF A UL T) E NA BL E- -- -- S TU FF S A TA _O D D _ P W R GT 3 5 P CH _ GP I O 5 7 C4 1 C 10 B IO S_ RE C D03 S A T A _ O D D _P W R G T B4 1 T A C H 6 / GP I O 7 0 E3 8 NCTF B.Schematic Diagrams 1 0 K_ 0 4 T A C H 4 / GP I O 6 8 T A C H 1 / G P I O1 H 36 CPU/MISC R3 4 4 3 . 3V S C4 0 B M B U S Y # / G P I O0 A4 2 S MI # S MI # DGPU HDP (NV CONTROL BYSELF) GPIO R3 4 2 3 . 3V S T7 3 , 4 , 6 , 25 , 2 6 , 4 0 , 4 3 1. 0 5 V S _ V T T 3 , 4 , 9 , 1 4 , 1 5, 1 9 , 2 0 , 2 1 , 23 , 2 5 , 2 6 , 2 8, 2 9 , 3 0 , 3 2, 35 , 3 6 , 3 7 , 39 , 4 0 , 4 1 , 4 2 3. 3 V 4 , 1 0 , 1 1, 12 , 1 3 , 1 4 , 15 , 1 6 , 1 7 , 1 8, 1 9 , 2 0 , 2 1 , 23 , 2 5 , 2 6 , 2 9, 3 0 , 3 2 , 3 3, 34 , 3 5 , 3 6 , 39 , 4 0 , 4 3 , 5 8 3. 3 V S Schematic Diagrams CougarPoint - M 7/9 CougarPoint -M (POWER) D02 3. 3 V S R 11 4 POWER S USB V C C A _ D A C _ 3 . 3V S 10 u _ 6. 3 V _ X 5 R _ 0 6 1 u _6 . 3 V _ X 5R _ 04 1 u _ 6. 3 V _ X 5 R _ 04 1 u _ 6. 3V _ X 5 R _ 0 4 CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC OR OR OR OR OR OR OR OR OR OR OR OR OR OR OR OR OR E[1 ] E[2 ] E[3 ] E[4 ] E[5 ] E[6 ] E[7 ] E[8 ] E[9 ] E[1 0 ] E[1 1 ] E[1 2 ] E[1 3 ] E[1 4 ] E[1 5 ] E[1 6 ] E[1 7 ] V C CA D A C U4 7 . C3 0 1 C2 9 2 0. 01 u _ 16 V _ X 7R _ 04 0 . 1u _ 1 0 V _X 5 R _ 0 4 3 . 3 V S _ V C C A _ LV D C2 2 1 R1 3 1 10 u _ 6. 3 V _ X 5 R _ 0 6 0. 1u _ 1 0V _ X 5 R _ 0 4 *1 7 . 4 K _ 1% _ 0 4 3 L62 * H C B 1 60 8 K F -1 2 1 T2 5 3. 3 V S . AK3 6 V CC A L V DS V S S A L V DS C2 1 7 R4 2 3 0_04 C5 3 9 V C C T X_ L V D S [ 1] . L45 *H C B 16 0 8 K F -1 21 T 2 5 V C C T X_ L V D S [ 2] AP3 6 C5 4 6 C 5 45 AP3 7 *0 . 0 1 u_ 1 6 V _X 5 R _ 0 4 * 0 . 01 u _ 1 6V _ X 5 R _ 0 4 C3 0 0 R 20 7 0 _ 04 *2 2 u_ 6 . 3 V _ X5 R _0 8 D03 Sheet 24 of 58 CougarPoint - M 7/9 3 .3 V S V C C I O[ 1 5 ] V C C I O[ 1 6 ] A N 21 V C C I O[ 1 7 ] 1. 0 5 V S C4 9 9 A P 21 1 u_ 6 . 3 V _ X5 R _0 4 A P 23 0 . 1u _ 1 0V _ X 5 R _ 0 4 1 . 5 V S _ 1. 8 V S V C C I O[ 1 8 ] A T1 6 V C C V R M[ 3] 157mA 570mA V C C I O[ 2 0 ] A T2 0 V C C I O[ 2 1 ] V C C D MI [ 1] V C C I O[ 2 2 ] A P 26 A T 24 V C C I O[ 2 3 ] V C C I O[ 2 4 ] VCCIO A P 24 DMI C 5 35 C5 4 1 V 34 V C C 3 _ 3[ 7] A N 27 V C C I O[ 1 9 ] 1 u _ 6. 3 V _ X 5 R _ 04 V C C 3 _ 3[ 6] A N 26 4A 1u _ 6 . 3V _X 5 R _ 0 4 *S C 1 5 63 I S K -3 . 0 T R T . V C C T X_ L V D S [ 4] HVCMOS A N 17 C5 0 0 1 2 V 33 *1 0 u _6 . 3 V _ X 5R _ 06 1 u_ 6 . 3 V _ X5 R _0 4 S HDN GN D V C C A P LL E X P C5 1 7 C5 2 0 AD J *1 0 K _ 1 %_ 0 4 1 . 8 V S _ V C C T X _L V D B J 22 A N 16 1 0 u _6 . 3 V _ X 5R _ 06 R1 4 8 A M3 8 V C C I O[ 2 8 ] * B K P 1 00 5 H S 12 1 _ 04 C 5 12 IN 1 .8 V S A M3 7 V C C T X_ L V D S [ 3] L6 1 O UT *1 0 u _6 . 3 V _ X 5R _ 06 A N 19 +V 1. 0 5 S _ V C C A P L L_ E X P 5 C 2 18 VSSAD AC AK3 7 C2 2 2 4 , 39 , 4 0 , 4 1, 4 2 5 VS U1 3 4 1 . 0 5V S _V TT C5 2 2 20mA V C C C L K D MI AB3 6 C 52 9 1 u _ 6. 3 V _ X 5 R _ 0 4 1 .0 5 VS 1 0 u_ 6 . 3 V _ X5 R _0 6 A N 33 V C C I O[ 2 5 ] A N 34 3. 3 V S A G1 6 V C C I O[ 2 6 ] V C C D F TE R M[ 1] V CC3 _ 3 [3 ] V C C D F TE R M[ 2] C2 7 5 157mA 0. 1 u _ 1 0V _ X 5 R _ 0 4 A P 16 V C C V R M [ 2] R 3 73 *0 _ 0 4 B G6 A P 17 + V 1 . 0 5S _ V C C _ D M I V C C D MI [ 2] * 15 m i l_ s h or t _0 6 1. 8 V S R 37 6 C5 0 9 A J1 6 V C C D F TE R M[ 3] R3 9 9 3. 3V S * 15 m i _l s h ort _ 0 6 * 0_ 0 4 0 . 1u _ 1 0V _X 5 R _ 0 4 A J1 7 V C C D F TE R M[ 4] V C C M E 3 . 3V V C C I O[ 2 7 ] A U 20 R 41 3 1. 0 5 V S _ V T T V cc A F D I P L L FDI 1 . 5 V S _ 1. 8 V S 1. 0 5 V S V _ N V R A M_ V C C Q 20mA A G1 7 DFT / SPI B H 29 V1 20mA V C CSPI 2009/11/12 3. 3 V S 3 .3 V D02 R1 2 0 0_ 0 4 R2 0 9 *0 _ 04 C 2 24 1 u _ 6. 3V _ X 5 R _ 0 4 C o u ga rP o i n t _R e v _1 p 0 1 9 , 20 , 2 1 , 26 , 3 0 , 4 0 3 , 4, 9 , 1 4 , 1 5, 1 9 , 2 0 , 21 , 2 3 , 24 , 2 6 , 2 8, 2 9 , 3 0 , 32 , 3 5 , 36 , 3 7 , 3 9, 4 0 , 4 1 , 42 39 14 , 1 5 , 1 7, 1 8 , 1 9 , 26 , 3 0 , 32 , 3 3 , 3 5, 3 9 , 4 3 , 44 26 7 , 1 6 , 42 4 , 1 0 , 1 1, 1 2 , 1 3 , 14 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 0 , 21 , 2 3 , 24 , 2 6 , 2 9, 3 0 , 3 2 , 33 , 3 4 , 35 , 3 6 , 3 9, 4 0 , 4 3 , 58 3 , 4 , 6 , 2 4, 2 6 , 4 0 , 43 1 .0 5 V S 1 .5 VS 1 .8 VS 1. 0 5 V S 3 .3 V 1 .5 VS 5 VS 1 . 5 V S _ 1 . 8V S 1 .8 VS 3 .3 VS 1 . 0 5 V S _ V TT 1 . 5V S _1 . 8 V S R 38 4 R 39 1 R 39 2 *0 _ 0 4 0 _0 4 *0 _ 0 4 CougarPoint - M 7/9 B - 25 B.Schematic Diagrams 1 . 0 5V S V V V V V V V V V V V V V V V V V L28 H C B 1 6 08 K F -1 2 1 T2 5 68mA 2 2u _ 6 . 3 V _X 5 R _0 8 C5 1 0 CRT C5 4 0 VCC CORE C5 3 1 U4 8 LVDS C4 9 8 A A 23 A C 23 A D 21 A D 23 A F 21 A F 23 A G 21 A G 23 A G 24 A G 26 A G 27 A G 29 A J 23 A J 26 A J 27 A J 29 A J 31 * 1 u_ 6 . 3 V _ X 5R _ 04 U1 9 G 1. 05 V S 1.6A 0 _ 06 Schematic Diagrams CougarPoint - M 8/9 CougarPoint - M (POWER) 1 . 05 V S _ V C C A _ C L K L 42 *H C B 1 0 05 K F -1 2 1 T 20 1 .0 5 V S 3 .3 V C 2 97 C 29 1 * 1 0u _ 6 . 3V _X 5 R _ 0 6 * 0. 1 u _ 10 V _ X 5RA _D 044 9 1 . 0 5V S POWER U1 9 J 52mA C5 2 4 N 26 V CC A CL K V C C I O [ 29 ] C5 2 7 P 26 V C C I O [ 30 ] T1 6 0 . 1u _ 1 0V _ X 5 R _ 0 4 V CC DS W 3 _ 3 1u _ 6 . 3 V _X 5 R _ 0 4 P 28 V C C I O [ 31 ] L43 . *0 . 1 u _1 0 V _ X 5R _ 04 P C H_ V C CD S W 1 . 0 5V S L 34 C 5 47 1 0 u _6 . 3 V _ X 5R _ 06 1u _ 6 . 3V _ X 5 R _ 0 4 T29 V C C 3_ 3 [ 5 ] T23 V C C S U S 3 _ 3[ 7 ] V C C A P LL D MI 2 0 . 1 u _1 0 V _ X 5R _ 04 V 23 AL 2 4 D CP S US [3 ] *1 u_ 6 . 3 V _ X5 R _0 4 C 5 14 0. 1u _ 1 0V _ X 5 R _ 0 4 V C C S U S 3 _ 3[ 8 ] V C C I O[ 1 4 ] 1849mA C5 3 3 T24 AL 2 9 * H C B 1 60 8 K F -1 2 1T 2 5 1 . 0 5V S V C C S U S 3 _ 3[ 9 ] V 24 D 8 V C C S U S 3 _ 3 [ 10 ] C D B U 0 03 4 0 A 3 .3 V C P 24 V C C S U S 3 _ 3[ 6 ] R 1 86 AA1 9 V CC A S W [1 ] V C C I O [ 34 ] AA2 1 1. 0 5 V S T26 C5 3 0 1 . 0 5V S V CC A S W [2 ] 0 . 1u _ 1 0V _ X 5 R _ 0 4 AA2 4 V CC A S W [3 ] C5 3 2 2 2 u _6 . 3 V _ X 5R _ 08 1u _ 6 . 3V _ X 5 R _ 0 4 AA2 6 V CC A S W [4 ] AA2 7 V CC A S W [5 ] AA2 9 V CC A S W [6 ] AA3 1 C 2 72 C5 1 8 2 2 u _6 . 3 V _ X 5R _ 08 1u _ 6 . 3V _ X 5 R _ 0 4 V CC A S W [7 ] AC 2 6 V CC A S W [8 ] AC 2 7 V CC A S W [9 ] AC 2 9 V C C A S W [ 1 0] AC 3 1 C 5 28 AD 2 9 1 u _ 6. 3V _ X 5 R _ 0 4 AD 3 1 W21 V C C A S W [ 1 1] V C C A S W [ 1 2] V C C A S W [ 1 3] V C C A S W [ 1 4] W23 V 5 R E F _ S US V C C A S W [ 1 5] M 2 6 + V 5 A _ P C H _ V C C 5R E F S U S A N2 3 + V C CA _ US B S US C5 1 5 * 1u _ 6 . 3V _X 5 R _ 0 4 DC P S US[4 ] A N2 4 V C C S U S 3 _ 3[ 1 ] + 5 V _P C H _ V C C 5 R E F S U S D 10 C P 34 C D B U 0 03 4 0 A 3 .3 VS V 5 REF R 1 97 PCI/GPIO/LPC C 2 78 Clock and Miscellaneous Sheet 25 of 58 CougarPoint - M 8/9 5V 1 0_ 0 4 N 20 V C C A S W [ 1 6] 1 0_ 0 4 V C C S U S 3 _ 3[ 2 ] 5 VS C5 4 2 N 22 V C C S U S 3 _ 3[ 3 ] 1 u_ 6 . 3 V _X 5 R _ 0 4 P 20 V C C S U S 3 _ 3[ 4 ] 97mA P 22 3. 3V V C C S U S 3 _ 3[ 5 ] C 51 3 V C C 3 _ 3[ 1 ] A A 16 3 .3 VS W 16 C 55 9 C5 3 6 C 5 48 T34 0 . 1 u _1 0 V _ X5 R _0 4 0 . 1u _ 1 0V _X 5 R _ 0 4 0 . 1 u _ 10 V _ X 5R _ 04 1 u _6 . 3 V _ X 5R _ 04 V C C 3 _ 3[ 8 ] W24 V C C 3 _ 3[ 4 ] W26 V C C A S W [ 1 7] C 5 01 W29 0. 1 u _ 10 V _ X 5R _ 04 V C C A S W [ 1 8] W31 1 . 5 V S _ 1. 8 V S 1 .0 5 V S A J2 V C C A S W [ 1 9] 1 . 0 5 V S _ V C C A _ A _D P L V C C 3 _ 3[ 2 ] + V 1 . 05 S _ S A T A 3 L60 H C B 1 0 0 5K F -12 1 T 20 W33 A F 13 V C C A S W [ 2 0] L44 H C B 10 0 5 K F -1 21 T 2 0 V C C I O[ 5 ] + V CC RT CE X T N 1 6 C 32 1 C 2 90 +C 31 0 159mA R2 1 6 2 2 u_ 6 . 3 V _ X5 R _0 8 C4 9 6 1u _ 6 . 3 V _X 5 R _ 0 4 *1 0 u _6 . 3 V _ X5 R _0 6 A H1 4 V C C V R M [ 4] V C C I O [ 13 ] *0 _ 0 4 1. 1V S _ V C C A _ B _ D P L 10mA 10mA V C C I O[ 6 ] BD 4 7 V CC A DP L L A SATA L40 H C B 10 0 5 K F -1 21 T 2 0 BF4 7 V CC A DP L L B C2 8 7 C2 8 1 22 u _ 6. 3V _ X 5 R _ 0 8 1 u_ 6 . 3 V _ X5 R _ 0 4 +C 30 9 *2 2 0 u _4 V _ V _ B 160mA 1 . 0 5V S 1 .0 5 VS 1 .0 5 VS C5 0 3 A H1 3 V C C I O [ 12 ] 1 u _ 6. 3 V _ X 5 R _ 04 *2 2 0 u _4 V _ V _ B D CP RT C Y 49 R4 2 5 AF1 7 AF3 3 AF3 4 AG 3 4 C5 5 0 C4 9 7 C5 4 3 1 u_ 6 . 3 V _ X5 R _0 4 1 u _6 . 3 V _ X5 R _0 4 V C CSS C A G 3 3 1u _ 6 . 3V _X 5 R _ 0 4 V CCS SC C5 0 8 0. 1 u _ 10 V _ X 5R _ 04 V C C S S T V V V V CC CC CC CC I O[ 7 ] D I F F C LK N [ 1 ] D I F F C LK N [ 2 ] D I F F C LK N [ 3 ] V C C A P LL S A T A A F 14 A K1 L2 9 *H C B 1 0 05 K F -1 2 1 T2 0 + V 1. 0 5 S _ V C C A P L L _S A TA 3 A F 11 1 . 5V S _1 . 8 V S V C C V R M[ 1 ] 1 . 0 5V S A C1 6 V C C I O[ 2 ] A C1 7 V C C I O[ 3 ] C5 2 5 A D1 7 V CC S S C V C C I O[ 4 ] 1u _ 6 . 3 V _X 5 R _ 0 4 1 9 , 20 , 2 1 , 2 5, 3 0 , 4 0 19 , 2 1 4, 1 0 , 1 1 , 12 , 1 3 , 14 , 1 5 , 1 6, 1 7 , 1 8 , 19 , 2 0 , 21 , 2 3 , 2 4, 2 5 , 2 9, 30 , 3 2 , 33 , 3 4 , 3 5, 3 6 , 3 9, 4 0 , 4 3 , 58 25 1 4, 1 5 , 1 7, 18 , 1 9 , 25 , 3 0 , 3 2, 3 3 , 3 5, 3 9 , 4 3 , 44 4 , 9 , 10 , 1 1 , 1 2, 1 3 , 3 0, 3 7 , 3 9 , 41 2 8 , 32 , 3 5 , 3 7, 3 9 , 4 0, 4 1 , 4 2 , 46 3 , 4 , 9, 1 4 , 1 5 , 19 , 2 0 , 21 , 2 3 , 2 4, 2 5 , 2 8, 29 , 3 0 , 32 , 3 5 , 3 6, 3 7 , 3 9, 4 0 , 4 1 , 42 3 , 4 , 6 , 2 4, 2 5 , 4 0 , 43 V1 6 D CP S S T 0 _ 04 C5 4 4 0 . 1 u _ 10 V _ X 5R _ 04 0. 1 u _ 10 V _ X 5 R _ 04 BJ 8 D CP S US [1 ] D CP S US [2 ] V _P R OC _ I O V CC RT C C2 6 5 C 2 60 C2 6 3 1 u_ 6 . 3 V _ X5 R _ 0 4 0 . 1 u _ 10 V _ X 5R _ 04 0. 1 u _ 10 V _ X 5 R _ 04 V C C A S W [ 23 ] V 21 T19 V C C A S W [ 21 ] 1 . 5 V _V C C S U S H D A R 41 6 A2 2 RT CV C C 1. 05 V S V C C A S W [ 22 ] MISC C 5 26 4 . 7u _ 6 . 3V _X 5 R _ 0 6 1 . 0 5V S _V T T T21 C o u ga rP o i n t _R e v _1 p 0 V CC S US H DA R 41 9 C 53 4 0. 1 u _ 10 V _ X 5 R _ 0 4 B - 26 CougarPoint - M 8/9 1 .5 V *0 _ 04 P 32 HDA C2 3 5 <1mA 2mA C2 3 4 T1 7 V1 9 CPU C 5 11 0 . 1u _ 1 0V _X 5 R _ 0 4 + V 1 . 0 5 M_ V C C S U S *1 u _ 10 V _ X 5 R _ 0 4 RTC B.Schematic Diagrams V C C I O [ 33 ] BH 2 3 + V C C A P L L_ C P Y _ P C H C 5 21 142.6mA V C C I O [ 32 ] T3 8 C 5 69 3. 3 V T27 D CP S US B Y P 320mA H C B 1 60 8 K F -1 2 1T 2 5 . V1 2 USB 3 .3 V S C 4 95 *1 5 mi l _ sh o rt _ 0 6 3 .3 V 1. 0 5 V S RT C V CC 3 .3 V S 1 . 5 V S _ 1 . 8V S 5 VS 1 .5 V 5V 3 .3 V 1 . 0 5 V S _ V TT Schematic Diagrams CougarPoint - M 9/9 CougarPoint -M (GND) U 19 I VSS[ 15 9] VSS[ 16 0] VSS[ 16 1] VSS[ 16 2] VSS[ 16 3] VSS[ 16 4] VSS[ 16 5] VSS[ 16 6] VSS[ 16 7] VSS[ 16 8] VSS[ 16 9] VSS[ 17 0] VSS[ 17 1] VSS[ 17 2] VSS[ 17 3] VSS[ 17 4] VSS[ 17 5] VSS[ 17 6] VSS[ 17 7] VSS[ 17 8] VSS[ 17 9] VSS[ 18 0] VSS[ 18 1] VSS[ 18 2] VSS[ 18 3] VSS[ 18 4] VSS[ 18 5] VSS[ 18 6] VSS[ 18 7] VSS[ 18 8] VSS[ 18 9] VSS[ 19 0] VSS[ 19 1] VSS[ 19 2] VSS[ 19 3] VSS[ 19 4] VSS[ 19 5] VSS[ 19 6] VSS[ 19 7] VSS[ 19 8] VSS[ 19 9] VSS[ 20 0] VSS[ 20 1] VSS[ 20 2] VSS[ 20 3] VSS[ 20 4] VSS[ 20 5] VSS[ 20 6] VSS[ 20 7] VSS[ 20 8] VSS[ 20 9] VSS[ 21 0] VSS[ 21 1] VSS[ 21 2] VSS[ 21 3] VSS[ 21 4] VSS[ 21 5] VSS[ 21 6] VSS[ 21 7] VSS[ 21 8] VSS[ 21 9] VSS[ 22 0] VSS[ 22 1] VSS[ 22 2] VSS[ 22 3] VSS[ 22 4] VSS[ 22 5] VSS[ 22 6] VSS[ 22 7] VSS[ 22 8] VSS[ 22 9] VSS[ 23 0] VSS[ 23 1] VSS[ 23 2] VSS[ 23 3] VSS[ 23 4] VSS[ 23 5] VSS[ 23 6] VSS[ 23 7] VSS[ 23 8] VSS[ 23 9] VSS[ 24 0] VSS[ 24 1] VSS[ 24 2] VSS[ 24 3] VSS[ 24 4] VSS[ 24 5] VSS[ 24 6] VSS[ 24 7] VSS[ 24 8] VSS[ 24 9] VSS[ 25 0] VSS[ 25 1] VSS[ 25 2] VSS[ 25 3] VSS[ 25 4] VSS[ 25 5] VSS[ 25 6] VSS[ 25 7] VSS[ 25 8] V SS[2 59] V SS[2 60] V SS[2 61] V SS[2 62] V SS[2 63] V SS[2 64] V SS[2 65] V SS[2 66] V SS[2 67] V SS[2 68] V SS[2 69] V SS[2 70] V SS[2 71] V SS[2 72] V SS[2 73] V SS[2 74] V SS[2 75] V SS[2 76] V SS[2 77] V SS[2 78] V SS[2 79] V SS[2 80] V SS[2 81] V SS[2 82] V SS[2 83] V SS[2 84] V SS[2 85] V SS[2 86] V SS[2 87] V SS[2 88] V SS[2 89] V SS[2 90] V SS[2 91] V SS[2 92] V SS[2 93] V SS[2 94] V SS[2 95] V SS[2 96] V SS[2 97] V SS[2 98] V SS[2 99] V SS[3 00] V SS[3 01] V SS[3 02] V SS[3 03] V SS[3 04] V SS[3 05] V SS[3 06] V SS[3 07] V SS[3 08] V SS[3 09] V SS[3 10] V SS[3 11] V SS[3 12] V SS[3 13] V SS[3 14] V SS[3 15] V SS[3 16] V SS[3 17] V SS[3 18] V SS[3 19] V SS[3 20] V SS[3 21] V SS[3 22] V SS[3 23] V SS[3 24] V SS[3 25] V SS[3 28] V SS[3 29] V SS[3 30] V SS[3 31] V SS[3 33] V SS[3 34] V SS[3 35] V SS[3 37] V SS[3 38] V SS[3 40] V SS[3 42] V SS[3 43] V SS[3 44] V SS[3 45] V SS[3 46] V SS[3 47] V SS[3 48] V SS[3 49] V SS[3 50] V SS[3 51] V SS[3 52] H 46 K1 8 K2 6 K3 9 K4 6 K7 L18 L2 L20 L26 L28 L36 L48 M12 P1 6 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N 18 P3 0 N 47 P1 1 P1 8 T33 P4 0 P4 3 P4 7 P7 R2 R 48 T12 T31 T37 T4 W 34 T46 T47 T8 V1 1 V1 7 V2 6 V2 7 V2 9 V3 1 V3 6 V3 9 V4 3 V7 W 17 W 19 W2 W 27 W 48 Y 12 Y 38 Y4 Y 42 Y 46 Y8 BG 2 9 N 24 AJ 3 AD 4 7 B4 3 BE10 BG 4 1 G 14 H 16 T36 BG 2 2 BG 2 4 C 22 AP13 M14 AP3 AP1 BE16 BC 1 6 BG 2 8 BJ 28 H5 A A17 AA2 AA3 A A33 A A34 A B11 A B14 A B39 AB4 A B43 AB5 AB7 AC 19 A C2 AC 21 AC 24 AC 33 AC 34 AC 48 AD 10 AD 11 AD 12 AD 13 AD 19 AD 24 AD 26 AD 27 AD 33 AD 34 AD 36 AD 37 AD 38 AD 39 A D4 AD 40 AD 42 AD 43 AD 45 AD 46 A D8 AE2 AE3 A F10 A F12 AD 14 AD 16 A F16 A F19 A F24 A F26 A F27 A F29 A F31 A F38 AF4 A F42 A F46 AF5 AF7 AF8 AG 19 A G2 AG 31 AG 48 AH 11 A H3 AH 36 AH 39 AH 40 AH 42 AH 46 A H7 AJ 19 AJ 21 AJ 24 AJ 33 AJ 34 A K12 AK3 U19H VSS [0 ] VSS [1 ] VSS [2 ] VSS [3 ] VSS [4 ] VSS [5 ] VSS [6 ] VSS [7 ] VSS [8 ] VSS [9 ] VSS [1 0] VSS [1 1] VSS [1 2] VSS [1 3] VSS [1 4] VSS [1 5] VSS [1 6] VSS [1 7] VSS [1 8] VSS [1 9] VSS [2 0] VSS [2 1] VSS [2 2] VSS [2 3] VSS [2 4] VSS [2 5] VSS [2 6] VSS [2 7] VSS [2 8] VSS [2 9] VSS [3 0] VSS [3 1] VSS [3 2] VSS [3 3] VSS [3 4] VSS [3 5] VSS [3 6] VSS [3 7] VSS [3 8] VSS [3 9] VSS [4 0] VSS [4 1] VSS [4 2] VSS [4 3] VSS [4 4] VSS [4 5] VSS [4 6] VSS [4 7] VSS [4 8] VSS [4 9] VSS [5 0] VSS [5 1] VSS [5 2] VSS [5 3] VSS [5 4] VSS [5 5] VSS [5 6] VSS [5 7] VSS [5 8] VSS [5 9] VSS [6 0] VSS [6 1] VSS [6 2] VSS [6 3] VSS [6 4] VSS [6 5] VSS [6 6] VSS [6 7] VSS [6 8] VSS [6 9] VSS [7 0] VSS [7 1] VSS [7 2] VSS [7 3] VSS [7 4] VSS [7 5] VSS [7 6] VSS [7 7] VSS [7 8] VSS [7 9] VSS[ 80 ] VSS[ 81 ] VSS[ 82 ] VSS[ 83 ] VSS[ 84 ] VSS[ 85 ] VSS[ 86 ] VSS[ 87 ] VSS[ 88 ] VSS[ 89 ] VSS[ 90 ] VSS[ 91 ] VSS[ 92 ] VSS[ 93 ] VSS[ 94 ] VSS[ 95 ] VSS[ 96 ] VSS[ 97 ] VSS[ 98 ] VSS[ 99 ] VSS[ 100 ] VSS[ 101 ] VSS[ 102 ] VSS[ 103 ] VSS[ 104 ] VSS[ 105 ] VSS[ 106 ] VSS[ 107 ] VSS[ 108 ] VSS[ 109 ] VSS[ 110 ] VSS[ 111 ] VSS[ 112 ] VSS[ 113 ] VSS[ 114 ] VSS[ 115 ] VSS[ 116 ] VSS[ 117 ] VSS[ 118 ] VSS[ 119 ] VSS[ 120 ] VSS[ 121 ] VSS[ 122 ] VSS[ 123 ] VSS[ 124 ] VSS[ 125 ] VSS[ 126 ] VSS[ 127 ] VSS[ 128 ] VSS[ 129 ] VSS[ 130 ] VSS[ 131 ] VSS[ 132 ] VSS[ 133 ] VSS[ 134 ] VSS[ 135 ] VSS[ 136 ] VSS[ 137 ] VSS[ 138 ] VSS[ 139 ] VSS[ 140 ] VSS[ 141 ] VSS[ 142 ] VSS[ 143 ] VSS[ 144 ] VSS[ 145 ] VSS[ 146 ] VSS[ 147 ] VSS[ 148 ] VSS[ 149 ] VSS[ 150 ] VSS[ 151 ] VSS[ 152 ] VSS[ 153 ] VSS[ 154 ] VSS[ 155 ] VSS[ 156 ] VSS[ 157 ] VSS[ 158 ] AK38 AK4 AK42 AK46 AK8 AL1 6 AL1 7 AL1 9 AL2 AL2 1 AL2 3 AL2 6 AL2 7 AL3 1 AL3 3 AL3 4 AL4 8 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN 2 AN 29 AN 3 AN 31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR 2 AR 48 AT1 1 AT1 3 AT1 8 AT2 2 AT2 6 AT2 8 AT3 0 AT3 2 AT3 4 AT3 9 AT4 2 AT4 6 AT7 AU 24 AU 30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW 14 AW 18 AW 2 AW 22 AW 26 AW 28 AW 32 AW 34 AW 36 AW 40 AW 48 AV11 AY 12 AY 22 AY 28 Sheet 26 of 58 CougarPoint - M 9/9 Couga rPoint_R ev _1p0 C ou gar Poin t _R ev _1 p0 CougarPoint - M 9/9 B - 27 B.Schematic Diagrams AY 4 AY 4 2 AY 4 6 AY 8 B1 1 B1 5 B1 9 B2 3 B2 7 B3 1 B3 5 B3 9 B7 F4 5 BB1 2 BB1 6 BB2 0 BB2 2 BB2 4 BB2 8 BB3 0 BB3 8 BB 4 BB4 6 BC 1 4 BC 1 8 BC 2 BC 2 2 BC 2 6 BC 3 2 BC 3 4 BC 3 6 BC 4 0 BC 4 2 BC 4 8 BD 4 6 BD 5 BE2 2 BE2 6 BE4 0 BF1 0 BF1 2 BF1 6 BF2 0 BF2 2 BF2 4 BF2 6 BF2 8 BD 3 BF3 0 BF3 8 BF4 0 BF 8 BG 1 7 BG 2 1 BG 3 3 BG 4 4 BG 8 BH 1 1 BH 1 5 BH 1 7 BH 1 9 H 10 BH 2 7 BH 3 1 BH 3 3 BH 3 5 BH 3 9 BH 4 3 BH 7 D3 D 12 D 16 D 18 D 22 D 24 D 26 D 30 D 32 D 34 D 38 D 42 D8 E1 8 E2 6 G18 G20 G26 G28 G36 G48 H 12 H 18 H 22 H 24 H 26 H 30 H 32 H 34 F3 Schematic Diagrams 3G, CCD X5100 C 3 78 C6 0 8 J _3 G 1 C L K R E Q# RE F C L K RE F C L K + GN D 0 GN D 1 G ND 5 GN D GN D 3 G _3 . 3 V C6 3 4 0 . 1u _ 1 6 V _Y 5 V _ 04 *1 0 m li _ s ho rt 17 19 37 39 41 43 45 47 C 66 0 49 51 1 0 u_ 1 0 V _ Y 5 V _ 0 8 R4 5 5 R e s erv ed 0 R e s erv ed 1 GN D 1 2 3. 3 V A U X _3 3. 3 V A U X _4 GN D 1 3 R e s erv ed 2 R e s erv ed 3 R e s erv ed 4 R e s erv ed 5 C6 8 7 C6 0 5 1 u _ 6. 3 V _ Y 5V _ 0 4 W _ D IS A B L E # PER SET# S MB _ C L K S MB _ D A T A US B _ D U S B _D + 3 .3 V A UX _ 1 1 .5 V _ 1 1 .5 V _ 2 3 .3 V A UX _ 2 LE D _ W W A N # L E D _W L A N # L E D_ W P A N # R 2 61 0_04 1 0 u_ 1 0 V _ Y 5 V _ 0 8 C7 1 8 R 44 6 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _Y 5 V _ 04 2 0 K _ 04 0. 1 u _ 1 6V _ Y 5V _0 4 Q 18 M TN 7 0 02 Z H S 3 4 GN D G ND R4 4 7 G 1 00 K _ 0 4 3 4 3 G_ P O W E R From EC default HI 20 22 30 32 36 38 24 28 48 52 42 44 46 Q 28 M TN 7 00 2 Z H S 3 G 18 26 34 40 50 B U F _P LT _ R S T# 3 G _E N 34 B U F _ P L T _R S T # 16 , 2 3 , 2 9, 34 , 3 6 , 3 7 U SB_ PN 2 2 3 U SB_ PP2 2 3 40 mil Port 2 3G _ 3 . 3V 40 mil X5100 only 3G _ 3 . 3V C3 9 2 + 8 89 0 8 -52 0 4 M-0 1 G ND C 61 2 C 61 1 GN D G ND 6 G ND 7 G ND 8 G ND 9 GN D 1 0 GN D 1 1 P E T n0 P E T p0 P E Rn 0 P E Rp 0 _ PW R _ DA T A _ CL K _ RS T _ VPP G ND G ND G ND 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 U I M _P W R R4 8 3 X5100 1 5 2 6 3 7 R 4 8 4 R 48 5* 1 0m i l _s h o rt U I M_ C LK _ R * 1 0m i l _s h o rt U I M_ D A T A _R C6 9 1 H2 5 H 7 _ 0 B 4 _0 D 2_ 8 U I M _D A T A J _ S I M1 UIM _ P W R UIM _ RS T UIM _ V P P UIM _ CL K UIM _ DA T A 4 . 7 K _ 04 C6 8 8 GN D 2 2 0u _ 6 . 3 V _6 . 3 *4 . 5 B.Schematic Diagrams 35 23 25 31 33 34 3 G_ D E T # 2 0 P C IE _ RX N5 _ 3 G 2 0 P C I E _R X P 5_ 3 G 2 0 P C I E _T X N 5 _ 3 G 2 0 P C I E _ T X P 5_ 3 G GN D 2 GN D 3 GN D 4 3 G_ 3 . 3V 3 G _3 . 3 V UIM UIM UIM UIM UIM KEY 21 27 29 Sheet 27 of 58 3G, CCD 2 6 8 10 12 14 16 D 3 .3 V A UX _ 0 1 .5 V _ 0 U I M_ P W R U I M_ D A T A U I M_ C L K U I M_ R E S E T U I M_ V P P >120mil S 7 11 13 9 15 20 3 G _C L K R E Q # 2 0 C L K _ P C I E _3 G # 2 0 C L K _ P C I E _ 3G W AKE# C OE X1 C OE X2 3 G _3 . 3 V Q2 9 A O 34 1 5 S D >120 mil C6 8 9 *2 2 p _5 0 V _ 0 4 C 7 04 *2 2 p _5 0 V _ 0 4 (TOP VIEW) UIM UIM UIM UIM UIM UIM _ PW R _ GN D _ RS T _ I/O _ CL K _ DA T A C 6 90 *2 2 p _ 50 V _ 0 4 *2 2 p _5 0 V _ 0 4 SIM CONN GN G GND 1 3 5 1 0 K _ 04 40 mil D R4 4 8 3 .3 V 0 . 1 u _ 16 V _ Y 5V _ 0 4 S 3. 3 V 3G POWER G ND * 0 _0 4 1 3 53 0 6 -1 G ND 1 GN D2 R 51 3 2 1 , 2 9, 36 , 3 7 P C I E _W A K E # 2 20 u _ 6 . 3V _6 . 3 *4 . 5 + D02A G 3G G ND G ND <4000 mils GN D GN D TV ANTENNA R 58 J AN T2 1 1 2 2 3 3 4 4 F R -0 0 5E T V _ GN D *0 _ 1 2 CCD J A NT 1 1 2 3 5V 5 V _ CC D 1A X7100 4 5 2 02 7 9 -00 1 E -0 1 C 1 59 J A NT 3 1 2 3 5 V _ CC D U6 V OU T 1u _ 6 . 3 V _ Y 5 V _ 04 1 u _ 6 . 3V _Y 5 V _0 4 D02 X5100 2 02 7 9 -00 1 E -0 1 E N G ND 1u _ 6 . 3V __ Y 5V _0 4 1A C 158 C CD_ E N 3 C1 3 0 48 mil 1 V IN V IN R8 0 C1 2 5 C1 2 4 1 00 K _ 0 4 0. 1 u _ 1 6V _ Y 5V _0 4 1u _ 6 . 3V __ Y 5V _0 4 2 G 5 24 3 A 2009/11/30_Alex 34 Port 5 CC D_ E N From KBC default HI 23 23 34 U S B _ P N5 US B _ P P 5 C C D _D E T # J _ CC D1 1 2 3 4 5 8 5 2 05 -0 5 0 01 5V 3 .3 V 3 .3 V S V DD 5 B - 28 3G, CCD 2 6 , 3 2 , 35 , 3 7 , 3 9, 40 , 4 1 , 4 2, 4 6 3 , 4 , 9 , 1 4 , 15 , 1 9 , 2 0, 2 1 , 2 3 , 24 , 2 5 , 2 6, 2 9 , 3 0 , 32 , 3 5 , 3 6, 37 , 3 9 , 4 0, 4 1 , 4 2 4 , 1 0 , 1 1, 12 , 1 3 , 1 4, 1 5 , 1 6 , 17 , 1 8 , 1 9, 2 0 , 2 1 , 23 , 2 4 , 2 5, 2 6 , 2 9 , 30 , 3 2 , 3 3, 34 , 3 5 , 3 6, 3 9 , 4 0 , 43 , 5 8 3 5 , 3 8 , 39 Schematic Diagrams Mini PCIE, LID V DD3 R 27 1 1 0K _ 0 4 U5 1 2 L ID _ S W # OU T LI D _ S W # 1 5 , 34 , 3 5 G ND V CC MH -2 48 3 C3 9 9 0. 1 u _1 6 V _ Y 5 V _ 04 PSU1, PSU2 3 X5100 1 GND 2 G ND Sheet 28 of 58 Mini PCIE, LED 20 mil 3 .3V C 3 29 MINI CARD 0 . 1 u _1 6 V _ Y 5 V _0 4 P CI E _ W A K E # 2 1, 2 8 ,36 , 3 7 P CI E _ W A K E # R2 6 3 3 .3 V 1 0 K _ 04 1 3 5 7 11 13 9 15 2 0 W LA N_ CL K RE Q # 2 0 C L K _ P CI E _ MI N I # 2 0 CL K _ P C IE _ MIN I J _ MI NI 1 W AKE# C O E X1 C O E X2 3 . 3 V A UX _ 0 1 .5 V_ 0 U I M_ P W R U IM_ DA TA UI M_ C LK UI M_ RE S E T UI M_ V P P C L K RE Q # R E F C LK R E F C LK + GN D0 GN D1 2 6 8 10 12 14 16 G ND R 25 8 *0 _ 0 4 B T _S B D # 8 0 CL K 8 0 DET # 3 IN 1 V DD 3 34 34 34 H 15 H 7 _5 B 5 _0 D 3_ 7 4 G ND 5 KEY 21 27 29 35 23 25 31 33 3 4 W LA N _D E T # 2 0 P CI E _ R XN 3_ W L A N 2 0 P C IE _ RX P 3 _W LA N 2 0 P C IE _ T XN 3_ W L A N 2 0 P C I E _ TX P 3 _W LA N 3 0 , 3 4,3 5 R 2 51 B T_ E N *0 _ 0 4 3 .3 V 20 20 20 C L_ CL K 1 C L_ DA TA 1 C L_ RS T# 1 3. 3 V 3 0 , 34 , 3 5 B T_ E N R2 3 1 R2 3 0 R2 2 9 R2 22 R2 23 B T_ S B D # R 2 5 6 *0 _0 4 *0 _0 4 *0 _0 4 *0 _ 0 4 0 _0 4 17 19 37 39 41 43 45 47 49 51 GN D2 GN D3 GN D4 GN D1 1 P E T n0 P E T p0 P ERn 0 P ERp 0 R e s erv e d 0 R e s erv e d 1 GN D1 2 3 . 3V A U X _3 3 . 3V A U X _4 GN D1 3 R e s erv e d 2 R e s erv e d 3 R e s erv e d 4 R e s erv e d 5 G ND 6 G ND 7 G ND 8 G ND 9 GND 1 0 W _D I S A B L E # PER SET # S MB _ C LK S MB _ DA TA US B _ D USB_ D + 3 . 3 V A UX _ 1 1 .5 V_ 1 1 .5 V_ 2 3 . 3 V A UX _ 2 L E D_ W W A N # LE D _W L A N # L ED_ W PA N # 18 26 34 40 50 20 22 30 32 36 38 24 28 48 52 42 44 46 GND R 25 2 1 0 K _0 4 B UF _ P L T_ R S T# 20 mil 3 .3 V S W L A N _ E N 30 , 3 4, 35 B U F _P L T _ RS T # 1 6 , 2 3, 2 8 ,3 4, 3 6 ,37 B T_ DE T # 34 U S B _P N 3 23 U S B _P P 3 23 3 . 3V A U X _1 R 24 9 0 _ 04 Port 3 3 .3 V 40 mil 20 mil 3 .3V W LA N _L E D # 3 0 ,3 4, 3 5 3 .3 VS V D D3 1 .5 VS 3 .3 V 4, 1 0 , 1 1, 1 2 , 1 3, 1 4 ,15 , 1 6 ,17 , 1 8, 1 9 ,2 0, 2 1 ,2 3, 2 4 , 25 ,2 6 , 30 ,3 2, 3 3 , 3 4,3 5 , 3 6,3 9 , 40 , 4 3 , 58 19 , 3 4 ,35 , 3 6, 38 , 3 9, 4 5 25 , 3 9 3, 4 , 9 , 1 4,1 5 , 1 9,2 0 , 21 , 2 3 , 24 , 2 5, 2 6 , 2 8, 3 0 , 3 2, 3 5 ,36 , 3 7 ,39 , 4 0, 4 1 ,4 2 M F 08 -4 04 -5 2 3A *0 _ 0 4 Mini PCIE, LID B - 29 B.Schematic Diagrams LID SWITCH IC Schematic Diagrams LED, Hotkey, LID SW, Fan VGA FAN CONTROL CPU FAN CONTROL 5 VS 5 VS U2 2 F ON 1 U 33 1 2 3 4 FO N C5 1 6 C5 0 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 F ON V IN V OU T VSET APE8 8 7 2 GN GN GN GN 4 . 7u _ 6. 3V _ X 5R _ 06 D D D D 8 7 6 5 CP U_ F A N C 2 89 C 2 94 F ON VIN V OU T VSET GN D GN D GN D GN D 8 7 6 5 V GA _FA N A P E 8 8 72 0. 1 u _1 6 V _ Y 5 V _ 04 C PU _F AN 1 2 3 4 4. 7 u _ 6. 3 V _ X 5R _0 6 VG A_ F AN 3 4 34 5 V S _ V GA _ F A N 5 VS_ FAN J_ F A N 2 J_ F A N 1 1 2 3 C 5 19 8 5 20 5 -0 37 0 1 3. 3 V S J_FAN1 3 4 V GA _ F A N S E N J_FAN1 3 R4 1 7 8 5 20 5 -03 7 0 1 1 0 u_ 1 0 V _Y 5V _0 8 3 R4 3 9 3 .3 VS 4 . 7 K _0 4 4 . 7K _ 0 4 1 1 3. 3 V 3. 3 V S 5 VS J _L E D 3 C 3 95 C 2 71 C7 2 3 0. 1 u _ 16 V _ Y 5 V _0 4 C 17 4 0 . 1 u _1 6 V _ Y 5V _ 0 4 C3 9 6 0 . 1 u _1 6 V _ Y 5V _ 0 4 X5100 only C 6 17 0 . 1 u_ 1 6 V _Y 5 V _ 0 4 C 11 5 0. 1 u _ 16 V _ Y 5 V _0 4 C1 6 1 0 . 1 u_ 1 6 V _Y 5 V _ 0 4 C 21 9 C4 1 6 8 52 0 4 -05 0 0 1 0 . 1 u _1 6 V _ Y 5V _0 4 L ED_ AC IN 3 4 L E D _ P W R 34 L E D_ B A T _ CHG 3 4 L E D _ B A T _ F U L L 34 0 . 1 u_ 1 6 V _Y 5 V _ 0 4 L E D _A C I N L E D _P W R L E D _B A T_ C H G L E D _B A T_ F U L L 0 . 1u _ 1 6V _ Y 5 V _ 04 1 2 3 4 5 1 . 05 V S GN D 0. 1 u _ 16 V _ Y 5 V _0 4 Sheet 29 of 58 LED, Hotkey, LID SW, Fan 3 .3 V S EMI J _L E D 1 1 2 3 4 5 6 S A TA _ L E D # B T _E N W LA N _E N S A T A _L E D # 1 9 , 3 5 B T _E N 29 , 3 4 , 35 W L A N _ E N 2 9 , 3 4, 3 5 W L A N _L E D # 5 VS 3. 3 V 3. 3 V S 1. 5 V C los e to U3 9 W L A N _ L E D # 2 9, 34 , 3 5 85 2 01 -0 6 05 1 C 75 6 C 18 4 C 75 7 C 7 58 0 . 0 1u _ 1 6V _ Y 5 V _ 04 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 0. 0 1 u_ 1 6 V _X 7 R _0 4 C1 7 9 0 . 0 1u _ 16 V _ Y 5 V _ 04 3 .3 V S Cl os e to H1 9 C7 5 5 0 . 01 u _1 6 V _ Y 5 V _0 4 C lo se to P C16 0 . 0 1u _ 1 6V _ Y 5 V _ 04 GN D J _ L E D2 1 2 3 4 5 6 L E D _N U M # L E D _C A P # L E D _S C R O LL # L E D _ N U M# 3 4 , 35 L E D_ C A P # 3 4 ,3 5 L E D _ S C R OL L # 34 , 3 5 3. 3 V S VDD 3 3. 3 V 5V S 1. 0 5 V S 1. 5 V 8 52 0 1 -06 0 5 1 1 S P T1 S MD 8 0 X 80 1 B.Schematic Diagrams 1 0 u _1 0 V _ Y 5 V _ 08 34 C P U _ F A N S E N 1 2 3 C 29 6 D02 only for X7100 B - 30 LED, Hotkey, LID SW, Fan 4 , 1 0, 1 1 , 1 2, 1 3 , 1 4, 1 5 , 1 6, 1 7 , 1 8, 1 9 , 2 0, 2 1 , 2 3, 2 4 , 25 , 2 6 , 29 , 3 2 , 33 , 3 4 , 35 , 3 6 , 39 , 4 0 , 43 , 5 8 1 9 , 29 , 3 4 , 35 , 3 6 , 38 , 3 9 , 45 3 , 4 , 9, 14 , 1 5, 1 9 , 2 0, 2 1 , 2 3, 2 4 , 2 5, 2 6 , 2 8, 2 9 , 3 2, 3 5 , 3 6, 3 7 , 39 , 4 0 , 41 , 4 2 1 4 , 15 , 1 7 , 18 , 1 9 , 25 , 2 6 , 32 , 3 3 , 35 , 3 9 , 43 , 4 4 1 9 , 20 , 2 1 , 25 , 2 6 , 40 4 , 9 , 10 , 1 1 , 12 , 1 3 , 26 , 3 7 , 39 , 4 1 Schematic Diagrams RJ 45 RN2 4 3 2 1 5 6 7 8 0_8P4R_04 L72 D02 36 36 36 36 LAN_MDI N0 LAN_MDI P0 LAN_MDI N1 LAN_MDI P1 36 36 36 36 LAN_MDI N2 LAN_MDI P2 LAN_MDI N3 LAN_MDI P3 LAN_M DIN0 LAN_M DIP0 LAN_M DIN1 LAN_M DIP1 12 11 9 8 LAN_M DIN2 LAN_M DIP2 LAN_M DIN3 LAN_M DIP3 6 5 3 2 C163 C142 C133 T D2T D2+ T D1T D1+ T CT4 T CT3 T CT2 T CT1 LP8 13 MX4- 14 MX4+ 16 MX3- 17 MX3+ LMX1LMX1+ LMX2LMX2+ 19 MX2- 20 MX2+ 22 MX1- 23 MX1+ 15 M CT4 18 M CT3 21 M CT2 24 M CT1 LMX3LMX3+ 1 2 3 4 LMX4LMX4+ DLM X1+ DLM X1DLM X2+ DLM X2- *SB0402TL- 040 LP9 8 DLMX37 DLMX3+ 6 DLMX45 DLMX4+ DLM X3+ DLM X3DLM X4+ DLM X4- J_RJ1 1 2 DA+ 3 DA6 DB+ DB- shield shield GND1 GND2 4 5 DC+ 7 DC8 DD+ DD130451-02 *SB0402TL-040 RN5 4 3 2 1 GST5009 LF *0.01u_16V_X7R_04 DLMX1DLMX1+ DLMX2DLMX2+ 1 2 3 4 *0.01u_16V_X7R_04 0.01u_16V_X7R_04 8 7 6 5 C178 5 6 7 8 *0.01u_16V_X7R_04 Sheet 30 of 58 RJ 45 0_8P4R_04 D02 NMCT_1 NMCT_2 NMCT_3 NMCT_4 75_1%_04 NMCT_R 75_1%_04 75_1%_04 75_1%_04 R72 R71 R70 R69 C114 4 0 m il H9 H6 H10 H5 H26 H27 H8_0D4_3 H8_0D4_3 H8_0D4_3 H8_0D4_3 H7_0D2_8 H7_0D2_8 1000p_2KV_X 7R_12_H125 H7 M 2 M - MARK M 1 M -MARK M 4 M -MARK M3 M-MARK 2 3 4 5 H16 9 8 7 6 1 2 3 4 5 MTH8_0D2_8 GND M 6 M - MARK M 5 M -MARK M 7 M -MARK H21 C111D111N 2 3 4 5 MTH8_0D2_8 GND H19 9 8 7 6 1 2 3 4 5 MTH8_0D2_8 GND H11 9 8 7 6 1 2 3 4 5 MTH8_0D2_8 GND 9 8 7 6 1 H20 H8 H14 H6_0D3_7 H3_5D1_8 H3_5D1_8 MTH8_0D2_8 GND GND M8 M-MARK GND H3 H1 H2 H22 C111D111N C111D111N C111D111N H12 9 8 7 6 1 2 3 4 5 H13 9 8 7 6 1 2 3 4 5 MTH8_0D2_8 GND GND H17 9 8 7 6 1 2 3 4 5 MTH8_0D2_8 GND H4 9 8 7 6 1 2 3 4 5 MTH8_0D2_8 GND GND GND H18 9 8 7 6 1 2 3 4 5 MTH8_0D2_8 GND 9 8 7 6 1 MTH8_0D2_8 GND DVDD 3. 3V 36 3,4,9,14, 15, 19,20,21,23,24,25,26,28,29,30,32, 35,36,37,39,40,41,42 RJ 45 B - 31 B.Schematic Diagrams 10 7 4 1 T D4T D4+ T D3T D3+ Schematic Diagrams Codec Realtek ALC892 3 .3 V Layout Note: C3 3 2 U 43 pi n 1 ~ pi n 11 an d pi n 47 an d pi n 48 a re Di gi ta l si gn als . T he ot he rs a re A nal og s ig na ls. R 6 68 L47 D02 C3 5 3 40mil C4 5 0 C3 7 9 0 . 1 u_ 1 6 V _Y 5 V _ 04 1 0u _ 1 0V _ Y 5V _0 8 1 0u _ 1 0 V _Y 5 V _0 8 D 19 2 H DA_ SPKR Max: 0.5inch A R2 6 5 R2 6 4 C3 7 7 5 6 8 10 11 E A P D _ M OD E S P DIF O 1 4 ,3 5 S P DIF O BEE P 47 K _ 0 4 C3 7 5 4. 7K _ 0 4 *1 0 0p _ 5 0V _N P O_ 0 4 35 35 AUD G L 48 H C B 1 00 5 K F -1 2 1T 2 0 port A S U R R -OU T-L S U R R -OU T -R 47 S P D IF I/E A P D V R E F OU T-F _L V R E F O U T -E 48 S P D IF O 13 34 J D_ S E N S E A J D_ S E N S E B C I N T_ M I C C 36 8 2 2 u _6 . 3 V _ X 5R _ 08 R 26 6 1 K_ 0 4 I N T _ MI C _ R C 38 3 C 38 4 4 . 7u _ 6 . 3V _X 5 R _ 0 6 4 . 7u _ 6 . 3V _X 5 R _ 0 6 M IC2 _ L M IC2 _ R M I C 1 -L MI C 1-R 37 29 16 17 18 19 20 D02 35 35 MI C 1- L MI C 1- R R2 6 7 R2 6 8 C3 6 4 0 . 1 u _ 16 V _ Y 5 V _ 0 4 -OU T-L port D FF RR OONN TT-OU T -R F R _ H P -L F R _ H P -R port E 75 _ 0 4 75 _ 0 4 C3 8 5 C3 8 6 4 . 7 u _6 . 3 V _ X 5R _ 06 4 . 7 u _6 . 3 V _ X 5R _ 06 21 22 Se n s e A Se n s e B port G N C L DO _ IN M I C 2 -L M I C 2 -R ANALOG port F C 3 72 0 . 1 u_ 1 6 V _Y 5 V _ 04 C 3 73 2 . 2 u_ 6 . 3 V _ Y 5 V _ 06 CE N T E R LFE port HSSI DI DEE -R-L 28 32 M I C 1 -V R E F O-L M I C 1 -V R E F O-R 39 41 S U R R _L _ C S U R R _R _ C 30 31 M I C 2 -V R E F O 35 36 F R ON T_ L F R ON T_ R T 45 T44 F R ON T_ L 3 3 F R ON T_ R 3 3 C 38 1 C 38 2 43 44 A U D I O _C E N _ C L E F _ OU T_ C 45 46 S I D E -L _ R S I D E -R _ R 33 CA P A LC 8 92 port CLLI NI N EE 11-L-R 4. 7 u _ 6. 3V _ X 5 R _ 0 6 4. 7 u _ 6. 3V _ X 5 R _ 0 6 C3 3 6 C3 3 5 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 C 35 7 * 10 u _ 10 V _ X 5R _ 08 R 2 42 20 K _ 1 % _0 4 23 24 R 2 43 *5 . 1 K _1 % _ 04 C 3 37 C 3 87 C 3 88 VT1818S P2P ALC892 H E A D P H O N E -L H E A D P H O N E -R 4 . 7 u _6 . 3 V _ X5 R _0 6 4 . 7 u _6 . 3 V _ X5 R _0 6 C 36 1 40 J DR E F port B H C B 1 6 08 K F -1 2 1 T2 5 A U DG 14 15 C AP C D -L C D -G N D C D -R M I C 1 -L M I C 1 -R 0 . 1u _ 1 6V _ Y 5V _0 4 25 38 1 9 D VSS2 V R E F O OU T-B _L V R E F OU T -B _ R DIGITAL PC BEEP L DO _ IN Co nn ect st and by p ow er(f or po p n ois e) S D A T A -OU T B I T -C LK S D A T A -I N S Y NC R ESET# 27 12 1 u _ 10 V _ 0 6 5V D 15 * RB 7 5 1 V 5 VS VR EF B A T 5 4C W G H L 73 *H C B 1 0 0 5K F - 12 1 T 20 5 VS *2 2 p_ 5 0 V _ N P O _0 4 R2 5 0 3 3_ 0 4 R2 5 5 3 3_ 0 4 R2 5 7 3 3_ 0 4 R2 5 9 3 3_ 0 4 R2 6 2 3 3_ 0 4 E A P D _ MO D E C 3 * H C B 10 0 5 K F -1 21 T 2 0 A UD G 26 42 D02 1 KBC _ BEEP 0 . 1 u _ 16 V _ Y 5 V _ 0 4 L50 G P I O0 / D MI C -C L K D MI C _D A T G P I O1 / D MI C -D A T A AVS S1 AVSS2 34 C3 8 0 V R E F _ C OD E C AVD D1 A V DD 2 S 33 2 4 3 1 0u _ 1 0V _ Y 5V _0 8 A B.Schematic Diagrams C 35 2 C 36 6 D1 6 A 0 . 1 u _ 16 V _ Y 5 V _ 0 4 C3 7 6 A UDG U3 0 1 4 , 1 9 H D A _ S D OU T 1 4 , 1 9 H D A _ B I T C LK 19 HD A _ S DIN 0 1 4 , 1 9 H D A _S Y N C 14 , 1 9 H D A _ R S T # PC BEEP D02 0 . 1 u _ 16 V _ Y 5 V _ 0 4 Q4 2 MT N 7 0 0 2Z H S 3 D03 L4 9 C 36 9 D02 Sheet 31 of 58 Codec Realtek ALC892 0 . 1 u _ 16 V _ Y 5 V _ 0 4 C3 7 1 A UDG 1 0 u _1 0 V _ Y 5 V _ 0 8 G 2 1 , 33 , 3 4 , 37 , 3 9 S U S B # 5 V S _ A UD 40mi l C 3 46 G C3 4 4 (2 )M IC 1-R (U 13 .2 2) (4 )L IN E-R ( U1 3. 24 ) * 0. 1 u _ 16 V _ Y 5 V _ 0 4 7 Layout Note: ( 1) MIC 1- L ( U1 3. 21) ( 3) LIN E- L (U 13 .2 3) 3 . 3V S _A U D Q 19 M TP 34 0 3 N 3 D S D VDD 1 DVD D2 3. 3 V S 0 . 1 u _ 16 V _ Y 5 V _ 0 4 C3 8 9 * H C B 10 0 5 K F -1 21 T 2 0 1 0 0K _ 0 4 A UD G R2 3 5 R2 3 4 A UD G H E A D P H ON E -L 3 5 H E A D P H ON E -R 35 7 5_ 1 % _0 4 7 5_ 1 % _0 4 S IDE _ L S IDE _ R 35 35 BluRay content protection *1 0 0 p_ 5 0 V _ N P O _0 4 4 . 7 u_ 6 . 3 V _ X5 R _0 6 4 . 7 u_ 6 . 3 V _ X5 R _0 6 R 26 9 R 27 0 7 5 _ 1% _ 0 4 7 5 _ 1% _ 0 4 L INE - L L INE - R 35 35 A UD G 3 .3 V S _ A UD X7100 only D03 NERA CODEC L74 H C B 1 0 05 K F -1 2 1 T 20 U4 5 S U R R _L _ C F R ON T_ L 2 11 10 3. 3 V S _ A U D D03 S U R R _R _ C F R ON T_ R 5 8 D OL B Y _S E L 7 0 B0 1 B0 S0 12 C 7 8 1 0 . 1 u _1 6 V _ Y 5 V _ 04 1 3 S U RR _ L VC C A 0 GN D AUD G S U RR_ L 33 S U RR_ R 33 9 0 B1 1 B1 S1 VC C A 1 GN D 4 6 S U RR _ R M I C 2 -V R E F O P I 5 A 3 1 58 R 47 6 R2 7 3 P C B F o ot p ri n t = 88 2 6 6-2 R 1 0 K _ 04 A UD G M I C 1 -V R E F O-L 2 . 2K _ 0 4 M I C 1 -V R E F O-R 8 82 6 6 -0 20 0 1 I N T _M I C 3 .3 V S _ A UD D03 R 2 60 R2 5 3 2 . 2 K _ 04 2 . 2 K _0 4 C4 0 0 M I C 1 -L L75 H C B 1 0 05 K F -1 2 1 T 20 M I C 1 -R C 3 70 C3 6 3 U4 6 A U D I O _C E N _ C F R ON T_ L 2 11 10 34 DO L B Y _ S E L L E F _ OU T_ C F R ON T_ R 5 8 D OL B Y _ S E L 7 0 B0 1 B0 S0 0 B1 1 B1 S1 12 C 7 8 2 0 . 1 u _1 6 V _ Y 5 V _ 04 1 3 C E NT E R VC C A 0 GN D VC C A 1 GN D CE NT E R 33 * 68 0 p _5 0 V _ X 5R _ 04 A UD G *6 8 0 p_ 5 0 V _ X5 R _0 4 A UD G 9 4 6 L E F _ O UT P I 5 A 3 1 58 A UD G B - 32 Codec Realtek ALC892 AUD G L E F _ OU T 33 3 , 4 , 9 , 14 , 1 5 , 1 9, 2 0 , 2 1 , 23 , 2 4 , 25 , 2 6 , 2 8, 2 9 , 3 0, 35 , 3 6 , 37 , 3 9 , 4 0, 4 1 , 4 2 4 , 1 0, 11 , 1 2 , 13 , 1 4 , 1 5, 1 6 , 1 7, 1 8 , 1 9 , 20 , 2 1 , 2 3, 2 4 , 2 5, 2 6 , 2 9 , 30 , 3 3 , 34 , 3 5 , 3 6, 3 9 , 4 0, 43 , 5 8 3. 1 4 , 15 , 1 7 , 1 8, 1 9 , 2 5, 26 , 3 0 , 33 , 3 5 , 3 9, 4 3 , 4 4 2 6 , 2 8, 35 , 3 7 , 39 , 4 0 , 4 1, 4 2 , 4 6 3. 3 V 3V S 5V S 5V 2 1 J _I N T MI C 1 3 30 p _ 50 V _ X 7R _ 04 Schematic Diagrams APA2010D1-TPA2008D2 A MP _ 5V S R 2 25 *0 _0 4 R 2 47 A M P GN D On 5V S 0. 1 u _1 0V _ X5 R _ 0 4 1 C 3 51 P V D DR2 P GN D L1 P GN D R 1 P GN D L2 P GN D R 2 2 14 R 22 7 10 K _0 4 15 L INN L OU T P L INP P V DDL 1 V OL U ME P V DDL 2 10 CO S C 25 20 3 S H U TD O W N 0 _0 4 D02 0. 1 U _ 10 V _ X5 R _ 042 4 C 2 88 C 29 8 R 23 2 *0 _ 04 R 2 37 S URR_ L A M P GN D 5V S A M P GN D 0 _0 4 0. 1 u _1 0V _ X5 R _ 0 4 1 C 3 38 BYPASS 2 C 34 0 0. 1 u_ 1 0V _ X5 R _ 04 R 21 5 7. 5 K _1 % _0 4 14 R 21 4 10 K _0 4 15 R O U TN RIN P P V D DR2 P GN D L1 P GN D R 1 P GN D L2 P GN D R 2 L OU T P L INP P V DDL 1 V OL U ME P V DDL 2 NC 25 5 C3 0 5 3 D S A MP GN D 20 Mil A MP GN D R 2 18 R 21 9 S A MP GN D 0 _0 4 C 3 13 C 3 14 22 D02 0 . 1u _1 0 V _X 5R _0 42 4 R 2 92 D0 3 A MP GN D 5 VS D02 A MP GN D 1 C 4 85 R INN R 2 20 5 . 1K _ 1% _0 4 R 2 21 1 0K _ 04 D 03 16 P G NDL 2 P G NDR2 L OU T P L INP P V D D L1 V O LU M E P V D D L2 3. 2 4K _ 1 %_ 04 R OS C R 45 4 C 6 16 D02 2 2 0p _5 0 V _0 4 C 47 7 D02 4 N C 25 R4 2 4 5 9 C OS C 0 . 1 u_ Y 5 V _1 6V _ 04 18 19 L INN 10 11 21 R OU T N P G NDR1 14 15 F C M10 0 5K F - 1 21 T0 3 - 7 P V DDR2 P G NDL 1 2 0. 1 u _1 0V _ X5 R _ 0 4 F C M10 0 5K F - 1 21 T0 3 - 7 L 52 R OU T P P V DDR1 7 1 1K _ 1% _ 04 L 51 CE NT E R- 17 R INP * 0_ 04 20 Mil X510 0 B Y P AS S 23 0. 1 U _ 10 V _ X5 R _ 04 6 R 29 3 CE NT E R+ 20 3 2. 2 U _ 6. 3 V _Y 5V _ 06 1 20 K _0 4 VD D 13 SU BWO OF ER 3 W 8 L OU T N A GN D T P A 2 00 8D 2 12 P C B F o o t pri nt = 88 2 66 - 2R S U BW O OF E R + F C M10 0 5K F - 1 21 T0 3 -7 L6 6 S U BW O OF E R - 1 00 0p _ 50 V_X7 R_ 04 A MP GN D 10 00 p _5 0V_ X7 R_0 4 D02 88 2 66 -02 0 01 2 1 4 Ohm Speaker The cut-off frequency Fcut Fcut = 1 / (2 * Pi * (CA) * (RA)) Fcut(-3db)=485.4Hz 485.4 Hz Low Pass Filter J_ S U B W O O F1 C7 7 1 C7 72 L6 7 F C M10 0 5K F - 1 21 T0 3 -7 0. 1 u_ 1 0V _ X5 R _ 04 A MP G N D C EN TE R 2W T HD +N a t 1% A M P GN D U4 4 * 0_ 04 C 3 12 T h e rm a l_ Pad D 32 CE NT E R Q4 7 MT N 7 00 2 ZH S 3 2 2U _6 . 3V _ X 5R _ 0 8 4 Ohm Speaker T PA 20 08 D2 P 2P B A2 05 50 ( TS SO P2 4) A MP GN D X 7100 10 00 p _5 0V_ X7R _0 4 U2 8 MC 74 V H C 1 G0 8D F T1 G A MP _ E N G D0 3 C 37 4 1 00 0 p_ 50 V_ X7 R_ 04 C 3 07 Q3 0 MT N 7 0 02 Z H S 3 1 0 0K _ 04 0. 1 u _1 6V _ Y 5 V _0 4 C 4 86 10 0 0p _5 0 V_X7 R_0 4 A MP G N D A MP _ E N S H U TD OW N L E F _O U T L 39 *H C B 10 05 K F -12 1 T2 0-7 4 R 67 4 F R O N T_ L C76 8 5 VS 1 G F R O N T_ R 1 0 00 p_ 5 0V_ X7R_ 0 4 B _ L OUT - 0. 1 u_ 1 6V _ Y 5 V _0 4 0. 1 u _1 6V _ Y 5 V _0 4 C 7 73 C7 6 5 12 T P A 20 0 8D 2 A MP _ 5V S 3. 3 V S S P K _H P # 1 00 0p _ 50 V_X7 R_ 04 *0 . 1u _ 10 V _X 5R _0 4 *0 _0 4 33 0K _ 0 4 D02 20 Mil L 31 F C M1 0 05 K F - 12 1T 0 3 B _ LO U TN 8 LO U TN A GND B _ R OU T+ B _ R OU TB _ LO U T + B _ LO U T - B _ LO U T+ 13 12 0 K _0 4 R 51 2 32 F C M1 0 05 K F - 12 1T 0 3 C7 67 RO S C V DD KB C _MU TE # 35 L 30 10 00 p _5 0V_ X7R _0 4 34 B _ LO U TP Ohm Speaker C 76 6 C 3 31 1 00 K _ 1% _0 4 2 Low mute! 1 4 2 3 4 5 6 85 20 4 -06 00 1 20 Mil 9 J_ X 71 S P K 1 F C M1 0 05 K F - 12 1T 0 3 B _ R O U T- 20 Mil D 02 R2 3 6 Sheet 32 of 58 APA2010D1TPA2008D2 2W C7 70 R 2 41 E A P D _ MO D E L 26 Ba ck Su rr o un d Sp ea ke r R / L C76 9 PC H _ MU T E # B _ R OU T N 18 4 C 34 2 2 20 p _5 0V _ 04 24 17 5 L INN R 24 4 A C D B U 0 03 4 0 A *C D B U 00 34 0 F C M1 0 05 K F - 12 1T 0 3 B _ R O U T+ 20 Mil 19 CO S C 11 L 25 16 10 3 .3 VS B _ R OU T P P V D DR1 RIN N 7 D02 20 Mil 32 2 2 u_ 6. 3 V _ X5 R _ 08 21 23 0. 1 U _ 10 V _X 5R _0 4 6 A M P GN D C 28 6 0. 1 u_ 1 6V _ Y 5 V_ 0 4 R OU T P 22 2. 2 u_ 6 .3 V _ Y 5V _ 0 6 T h erm al _ Pad 20 Mil A M P GN D R 2 13 S URR_ R C 29 9 0. 1 u_ 16 V _ Y 5V _ 0 4 D02 1 4, 1 5 , 17 , 18 , 1 9, 2 5, 2 6, 3 0 , 32 , 35 , 3 9, 4 3, 4 4 5 V S 4 , 10 , 1 1, 1 2, 1 3 ,1 4 , 15 , 16 , 1 7, 1 8, 1 9 ,2 0 , 21 , 23 , 2 4, 2 5, 2 6 ,2 9 , 30 , 32 , 3 4, 3 5, 3 6 ,3 9 , 40 , 43 , 5 8 3 . 3V S APA2010D1-TPA2008D2 B - 33 B.Schematic Diagrams *0 _ 04 C 29 3 10 00 p _5 0V_ X7R _0 4 R 21 2 A MP _ 5V S C 34 1 U2 6 A MP _E N D0 2A D 02 D02 T PA 20 08 D2 P 2P B A2 05 50 ( TS SO P2 4) A M P GN D 32 12 A GND D0 2 *20 m li _ P_ 0 4 32 C D 13 C D 12 8 LO U TN T P A2 0 08 D 2 12 0 K _0 4 2 20 p _5 0V _ 04 A M P GN D S US B # R O U T+ R O U TLO U T + LO U T - 13 1 00 0 p_ 50 V_X7 R_ 04 C 35 6 A MP G N D 2 1, 3 2 , 34 , 37 , 39 V DD 10 0 0p _5 0 V_ X7 R_0 4 RO S C R 25 4 L OU T N 20 Mil L 20 F C M1 0 05 K F - 12 1T 0 3 L OU T- 9 1 00 0 p_ 5 0V_ X7R_ 0 4 11 R 24 8 Th e vo lu me co n tro l. the g ai n ra ng e is fr o m -80 db (Vvo lu me = 5V) t o + 20d b (Vvo lume =0 V) w ith 64 step s p re cise co n tro l. L OU T P 20 Mil L 19 F C M1 0 05 K F - 12 1T 0 3 L OU T+ 4 NC 4 Ohm Speaker 19 5 C7 64 7. 1 5 K_ 1 %_ 04 1 2 3 4 8 52 0 5-0 40 0 1 F C M1 0 05 K F - 12 1T 0 3 R O U T - 20 Mil 18 C76 3 0. 1 u_ 1 0V _ X5 R _ 04 R 22 8 L 22 16 C7 6 2 C 35 4 R OU T N 17 C7 61 A M P GN D 0 _0 4 R O U TN RIN P 2W J _X 5 1S P K 1 20 Mil P V D DR1 RIN N F ro n t Sp ea ker R / L F C M1 0 05 K F - 12 1T 0 3 R O U T + . F RONT _ L 7 D02 L 21 . 32 2 2 u_ 6. 3 V _ X5 R _ 08 R OU T P . A M P GN D *0 _0 4 20 21 BYPASS 23 0. 1 u_ 1 0V _ X5 R _ 04 6 20 Mil F R ON T _ L R OU T P T h erm a l_ Pad C 3 08 S H U TD O W N . 0 _0 4 R2 4 6 0. 1 u_ 1 6V _ Y 5 V_ 0 4 . 22 D02 0. 1 U _ 10 V _ X5 R _ 042 4 2. 2 u_ 6 .3 V _ Y 5V _ 0 6 C 31 8 A M P GN D C 32 0 0. 1 u_ 16 V _ Y 5V _ 0 4 . F RONT _ R L 46 H C B 16 0 8K F - 1 21 T2 5 5 VS C 31 9 . 32 3 C 31 1 D02 C 35 5 U2 7 A MP _E N 20 Mil A M P GN D F R ON T _ R R 2 26 D02 T PA 20 08 D2 P 2P B A2 05 50 ( TS SO P2 4) A MP GN D . AUDIO AMP Schematic Diagrams KBC-ITE IT8519 K B C_ A V D D C 40 1 1 0 u_ 1 0 V _Y 5 V _0 8 C4 2 0 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 C 4 15 H C B 10 0 5 K F -1 21 T 2 0 24 GA 2 0 3 5, 4 5 A C_ IN # 30 LE D _ A C I N 21 , 2 3 A C _ P R E S E N T 24 24 P C L K _K B C K B C _ W RE S E T # 45 B A T_ D E T 4 5 B A T _ V OL T 4 5 T OT A L _ C U R 3 T H E R M_ V OL T 3 G_ D E T # C CD _ D E T # 45 S M C_ B A T 45 S M D_ B A T 1 4 S MC _V GA _ T H E R M 1 4 S MD _V GA _ T H E R M 20 S M D _ C P U _T H E R M LOW ACTIVE 3 2 KBC _ BEEP 3 0 , 3 5 L E D _S C R O L L# 30 , 3 5 LE D _ N U M# 3 0 , 3 5 LE D _ C A P # 3 0 L E D_ B A T _ CH G 3 0 L E D _B A T_ F U LL 30 L E D _P W R 29 29 80 C L K B T _ DE T # 4 H _ P R O C H O T #_ E C 35 T P _ CL K 35 T P _ DA T A 28 B A T _ DE T B A T _ V OL T T OT A L _ C U R C_ B A T D_ B A T C _ V GA _T H E R M D _ V GA _T H E R M _ H_ P E CI_ R D _ C P U _ TH E R M L C D _ B R I G H T NE S S K B C_ B E E P 8 0 CL K 3 IN1 H _P R OC H O T# _ E C A DC A DC A DC A DC A DC A DC A DC A DC 110 111 115 116 117 118 S MC S MD S MC S MD S MC S MD 0/ G 1/ G 2/ G 3/ G 4/ G 5/ G 6/ G 7/ G P I0 P I1 P I2 P I3 P I4 P I5 P I6 P I7 LK 0 / G A T0 / G LK 1 / G A T1 / G LK 2 / G A T2 / G 24 25 28 29 30 31 32 34 P W M0 / GP P W M1 / GP P W M2 / GP P W M3 / GP P W M4 / GP P W M5 / GP P W M6 / GP P W M7 / GP P S 2C P S 2D P S 2C P S 2D P S 2C P S 2D L K 0/ A T 0/ L K 1/ A T 1/ L K 2/ A T 2/ B RIG HT NE S S C4 0 6 B - 34 KBC-ITE IT8519 0 _ 04 P P P P P P P P U U U U U U U U 3 ( P D )K S O 1 6/ G P C 3 ( P D )K S O 1 7/ G P C 5 ( ( ( ( ( ( ( ) ) ) ) ) ) ) ) D D D D D D D )I D )I D )I D )I D )I D )I D )I D 0/ G 1/ G 2/ G 3/ G 4/ G 5/ G 6/ G P H0 P H1 P H2 P H3 P H4 P H5 P H6 ( P D )E GA D / GP E 1 ( P D )E GC S # / GP E 2 ( P D )E GC L K / GP E 3 ) ) ) ) ) ) ( P D )W U I 5 / GP E 5 ( P D )LP C P D # / W U I 6 / GP E 6 ( P D )T A C H 0/ G P D 6 ( P D )T A C H 1/ G P D 7 ( P D )T M R I 0 / W U I 2/ G P C 4 ( P D )T M R I 1 / W U I 3/ G P C 6 CIR R I 1 # / W U I 0 / GP D 0 ( P U ) R I 2 # / W U I 1 / GP D 1 ( P U ) ( P D )C R X/ G P C 0 ( P D )C T X / GP B 2 GP INTERRUPT LPC/WAKE UP GI N T / G P D 5 ( P U ) UART RX D/G P B 0 ( P U ) TX D / GP B 1 ( P U ) -S I 0 -S I 1 -S I 2 -S I 3 -S I 4 -S I 5 -S I 6 -S I 7 4 5 6 8 11 12 14 15 K B -S I 0 K B -S I 1 K B -S I 2 K B -S I 3 K B -S I 4 K B -S I 5 K B -S I 6 K B -S I 7 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB -S O0 -S O1 -S O2 -S O3 -S O4 -S O5 -S O6 -S O7 -S O8 -S O9 -S O1 0 -S O1 1 -S O1 2 -S O1 3 -S O1 4 -S O1 5 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O 100 101 102 103 104 105 106 K B C_ S P I_ CE # K B C_ S P I_ S I K B C_ S P I_ S O 3 G_ P O W E R 2 8 K B C_ S P I_ S CL K V S H G _S E L 4 5 CCD _ E N 56 57 S US B # S US C # 93 94 95 96 97 98 99 ( P D )L 8 0 H L A T / GP E 0 ( P D )RI N G# / P W R F A I L #/ L P C R S T # / GP B 7 82 83 84 DD_ O N CLOCK CK 3 2 K E CK 3 2 K D02 *0 . 1u _ 1 6V _Y 5V _0 4 EC MODULE CHOOSE (FOR DIFFERENCE K/B TYPE) 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 VE R. RX VO LT AG E M OD EL_ ID V1 .0 R 27 7 1 0K / R27 8 X 3 .3 V P 15 0HM ,P 17 0HM R 27 7 0V P 15 1HM X /R 278 1 0K M OD E L _I D R 2 77 D03 * 0_ 0 4 R 2 82 * 0_ 0 4 R 4 32 R432 X71? ? 119 123 R 29 4 R 29 1 1 0 K _0 4 4 . 7 K _0 4 4 . 7 K _0 4 S MC _B A T AC D2 1 BAV9 9 V D D3 S MD _B A T AC D2 2 BAV9 9 3 G_ D E T # C C D _ D E T# R2 7 4 R2 7 5 C 4 , 24 A B A T_ D E T B A T_ V O LT AC D2 3 BAV9 9 A AC D2 4 BAV9 9 A R2 8 9 H_ P E C I C 2 1 , 3 2, 3 3 , 3 7, 3 9 2 1 ,4 1 4 3 . 2 _1 % _ 04 *0 _0 4 C P CL K _ K B C R2 8 0 C 41 2 * 10 p _ 50 V _ N P O _ 04 C 40 3 1u _ 1 0V _ Y 5V _ 0 6 C 48 0 1 00 _ 0 4 1u _ 1 0V _ Y 5V _ 0 6 *1 0 _0 4 3 . 3V S 3 5 , 3 8, 3 9 R 5 15 10 K _ 0 4 B A T _ V OL T T OT A L _C U R R 4 9 7 29 8 0 DE T # 8 0D E T # CP U_ F A NS E N 3 0 V G A _F A N S E N 30 P M _P C H _ P W R OK 2 1 V C OR E _O N 4 3 A L L _S Y S _ P W R G D 1 4 , 1 5, 2 1 , 4 3 C IR_ RX R 64 2 S H OR T R 28 3 1 0 K _0 4 3I N 1 3 IN1 29 D02 V DD 3 N C4 S H OR T P ME # 23 LA N _ P C I E _ W A K E # 3 6 SW I# 0. 1 u _ 16 V _ Y 5 V _ 0 4 KBC_SPI_*_R = 0.1"~0.5" 4 Mb it C 73 4 U 39 21 S P I _ V D D _1 8 VD D 112 CHG _ E N K B C_ S P I_ SI_ R R2 8 6 4 7_ 0 4 K B C _S P I _ S I 2 K B C _ S P I _ S O_ R R2 8 5 1 5_ 1 % _0 4 K B C _S P I _ S O 1 K B C _ S P I _ CE # _ R R2 8 7 1 5_ 1 % _0 4 K B C _S P I _ C E # 6 K B C_ S P I_ SCL K _ R R2 8 8 4 7_ 0 4 K B C _S P I _ S C LK 5 SI 45 S O C K 3 2K E C K 3 2K R 28 4 E C _ H _P E C I _ R S MC _C P U _ T H E R M R 51 6 2 0 S MC _ C P U _ T H E R M H D A _ S Y N C _ C TR L 19 19 2 128 1 0K _ 0 4 1 0K _ 0 4 A D OL B Y _S E L 3 2 0_04 * 0 _0 4 * 0_ 0 4 NC6 V D D3 * 10 K _ 0 4 V DD 3 28 R S M R S T # 21 K B C_ RS T # 2 4 47 48 120 124 1 0 K _ 04 R 2 78 RX R4 9 9 V DD 3 K B C_ F L A S H 3 1 K _ 04 W P# *1 0 M_ 0 4 X9 1 2 * 3 2. 7 6 8 K H z 4 3 X1 0 1 2 * 3 2. 7 6 8 K H z 4 3 1 2 3 4 5 8 82 6 6 -05 0 0 1 C 41 9 C 4 18 *1 2 p _5 0 V _ N P O _0 4 * 12 p _ 50 V _ N P O_ 04 CE # SC K J _8 0 D E B U G1 S H OR T K B C _ A GN D 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 U S B _P W R _ E N # 3 5 C E LL _ C O N T R O L 45 35 17 NC 7 S HO RT N C3 1 u _ 10 V _ 0 6 4 5 6 8 11 12 14 15 C S U S _ P W R _A C K 2 1 B T _E N 2 9 , 3 0, 3 5 BKL _ EN 1 5 H S P I_ CE # 1 9 H S P I _ S C LK 1 9 H S P I _ MS O 1 9 H S P I _ MS I 19 0 . 1 u _1 6 V _ Y 5 V _ 04 LC D _ B R I GH T N E S S K B C _W R E S E T # R6 3 0 R6 3 1 R6 3 2 E C _V S S W/ 0 CIR ) 1 0 0 K _0 4 D02 PWM/COUNTER P W RS W /G P E 4 ( P U ) R 2 79 J _K B 1 85 2 01 -2 4 05 1 KB KB KB KB KB KB KB KB ( P D )I D 7/ G P G1 EXT GPIO PU PU PU PU PU PU C I R _R X 8 5 20 4 -0 40 0 1 X5100 58 59 60 61 62 63 64 65 107 WAKE UP *0 _ 04 P P P P P P P WAKE UP GP F 0 ( GP F 1 ( GP F 2 ( GP F 3 ( GP F 4 ( GP F 5 ( I T 85 1 9 E / B X (B ) C 4 14 GPIO PS/2 85 86 87 88 89 90 108 109 R 2 81 F LF R A ME #/ G P G2 F LA D 0 / S C E # F L A D1 /S I F L A D 2/ S O F L A D 3/ G P G6 F L C LK / S C K ( P D )F L R S T # / W U I 7 / T M/ G P G0 PB3 PB4 P C1 P C2 P F 6( P U ) P F 7( P U ) A 0( A 1( A 2( A 3( A 4( A 5( A 6( A 7( 1 2 3 4 24 J_KB1 X7100 74 FLASH PWM 33 0 _0 4 FO R I T8 51 2CX /E X 0 .1 U_ 04 FO R IT E85 12 -J (IT E8 50 2- J E C Co st Do wn IT8519 SMBUS 18 21 P W R_ B T N# PJ 2 PJ 3 PJ 4 PJ 5 ADC 125 2 9, 3 0 , 3 5 W LA N _ LE D # 29 W L A N_ DE T # 15 VBAT DAC GP J 0 GP J 1 D A C 2/ G D A C 3/ G D A C 4/ G D A C 5/ G 66 67 68 69 70 71 72 73 3 G_ D E T# C C D _D E T # M OD E L_ I D K S O0 / P D 0 K S O1 / P D 1 K S O2 / P D 2 K S O3 / P D 3 K S O4 / P D 4 K S O5 / P D 5 K S O6 / P D 6 K S O7 / P D 7 K S O 8 /A CK # K S O9 / B U S Y K S O1 0 / P E K S O 1 1/ E R R # K S O1 2 / S L C T K S O 13 K S O 14 K S O 15 E C S C I #/ G P D 3 ( P U ) E C S M I #/ G P D 4 ( P U ) 76 77 78 79 80 81 SM SM SM SM EC SM K S I 0/ S T B # K S I1 /A F D# K S I 2 / I N I T# K S I3 /S L IN# KSI4 KSI5 KSI6 KSI7 K/B MATRIX GA 2 0 / GP B 5 K B R S T # / GP B 6 ( P U ) P W U R E Q# / GP C 7 ( P U ) L8 0 L LA T / G P E 7( P U ) 23 15 3G _E N R2 7 6 AVC C 26 50 92 1 14 121 1 27 LPC 126 4 16 20 R6 7 3 0 _ 0 4 39 PW R _ SW # 1 5 , 2 9, 3 5 L I D_ S W # 21 LA D 0 LA D 1 LA D 2 LA D 3 LP C C L K LF R A ME # S E RIR Q LP C R S T # / W U I 4 / G P D 2 ( P U ) J _ CIR 1 1 J _ KB2 8 52 0 1 -24 0 5 1 W RS T # 29 , 3 0 , 35 W L A N _E N 33 K B C _ MU T E # 19 ME _W E # 30 C P U _F A N 30 V GA _ F A N 45 T o t al _ C U R _ S E L 28 28 * 0 . 1u _ 1 6V _ Y 5V _ 0 4 14 S MI # S CI# D03 VSTB Y VSTBY VSTB Y VSTBY VSTBY VSTBY U3 1 10 9 8 7 13 6 5 22 AVSS D03 Sheet 33 of 58 KBC-ITE IT8519 *0 . 1 u_ 1 6V _Y 5V _0 4 C 4 09 VSS VSS VSS VSS VSS VSS VSS 1 9, 5 8 L P C _A D 0 1 9, 5 8 L P C _A D 1 1 9, 5 8 L P C _A D 2 1 9, 5 8 L P C _A D 3 23 P CL K _ K B C 1 9, 5 8 L P C _ F R A ME # 1 9, 5 8 S ERIR Q 1 6 , 2 3, 2 8 , 2 9, 36 , 3 7 B U F _ P L T _R S T # 11 M74 0T /T U 1 12 27 49 91 1 13 122 B.Schematic Diagrams 0 _0 4 fo r M 76 0T /TU B KP 10 05 HS1 21 _0 4 f or E MI S ol uti on V D D3 C 4 10 0 . 1 u _1 6 V _ Y 5 V _ 04 E C _ V CC VCC 3 .3 VS V D D3 C4 1 1 K B C_ A G ND 0 . 1 u _1 6 V _ Y 5 V _ 0 4 . L54 L5 3 H C B 10 0 5K F -12 1 T 20 C 41 3 75 0 . 1u _ 1 6V _ Y 5V _ 0 4 C 4 17 . C4 2 1 C4 0 4 0. 1u _ 16 V _ Y 5 V _ 04 V D D3 R5 0 4 3 IN1 8 0 CL K 8 0 DE T # K B C _ H OL D # 7 4 . 7 K _0 4 4 H OL D # VSS M X 25 L 3 20 6 E 1 9 , 29 , 3 5 , 36 , 3 8 , 39 , 4 5 V D D 3 4 , 1 0 , 11 , 1 2 , 13 , 1 4 , 15 , 1 6 , 1 7, 1 8 , 1 9, 2 0 , 2 1, 2 3 , 2 4, 2 5 , 2 6, 2 9 , 3 0, 32 , 3 3 , 35 , 3 6 , 39 , 4 0 , 43 , 5 8 3. 3V S Schematic Diagrams USB, TP, FP, MULTI-CONN 5 VS F OR C LI CK BO AR D Zero Power ODD F OR HD D& OD D BOA RD 5 VS 5 VS Z ero _ V I N R6 4 0 *1 5 mi l _ sh o rt _ 06 R6 3 3 R 63 4 C7 4 9 1 0K _ 0 4 1 0 K _0 4 *1 0 U _ 1 0V _ 0 8 C 78 0 C7 7 9 2 4 6 8 10 12 14 16 18 20 S A TA _O D D _ P R S N T # S A TA _O D D _ D A # 24 S A T A _ OD D _ P R S N T # 2 3 S A TA _ O D D _ D A # 5 VS 3. 3 V S J _ S A T A _ H OD D 1 1 1 3 3 5 5 7 7 9 9 11 11 13 13 15 15 17 17 19 19 2 4 6 8 10 12 14 16 18 20 *0 . 0 1u _ 50 V _ X 7R _ 04 S A T A _ TX P 2 S A T A _T X N 2 S A T A _ TX P 2 1 9 S A T A _ TX N 2 1 9 S A T A _ RX N2 SA T A_ RXP2 S A T A _ TX P 4 S A T A _ TX N 4 U 43 1 S A T A _ RX N2 1 9 S A T A _ R X P 2 19 S A T A _ TX P 4 1 9 S A T A _ TX N 4 1 9 S A T A _ RX N4 S A T A _ RX P 4 2 3 S A T A _ OD D _ P W R G T 2 4 R 6 41 +C 3 9 4 C7 1 4 2 C 3 26 V IN 1 V O UT 2 3 4 10 u _ 10 V _ Y 5 V _ 08 7 C3 6 0 8 0. 1 u _ 16 V _ Y 5 V _ 0 4 +C 6 00 J _A U D I O 1 GN D 32 32 17 U 47 23 4 V DD 5 R 6 52 D 3 4 U S B _ P W R _E N # G 5 6 R 6 5 1 1 0 K _1 % _ 04 7 10 K _ 1 %_ 0 4 8 US B _ P N 0 US B _ P P 0 U S B _P N 0 U S B _P P 0 U S B _O C # 1 14 , 3 2 L35 S P D IF O O UT U S B _ P N1 _ R C7 8 4 10 U S B _ P P 1 _R 0. 1 u _ 16 V _ Y 5 V _ 0 4 D M_ I N D P _O 1 0 00 p _ 50 V _ X 7R _ 04 DP _ IN I L I M_ S E L G ND E N /DS C I LI M0 CT L 1 I LI M1 CT L 2 NC CT L 3 F A UL T # VD D3 14 16 R6 4 6 15 K _ 1 %_ 0 4 15 R6 4 8 *1 0K _ 0 4 3. 3V R 65 0 R6 4 9 10 K _ 0 4 9 13 G_ OC #0 1 1 0 K _ 04 R6 5 3 D02 *0 _ 04 T P S 2 5 40 9/3 S M_PQFP16 CTL 1 CTL 1 CTL 1 USB_AC_IN CTL2 CTL2 CTL2 CTL3: 0 CTL3: 1 CTL3: X X 1 1 1--- -- > De dicat ed Ch arg ing Po t, Aut o-d et ect 1- --- -> Ch arg ing Dow ns tream Port, BCSpe cificat ion 1.1 0--- -- > Sta ndard Dow ns tream Port, USB 2.0 Mo de US B V C C_ CH A RG E R US B V C C_ CH A RG E R U S B _ V C C 01 _ 0 L68 H C B 1 6 0 8K F -1 2 1 T2 5 50 mil S P D I F O_ R F C M1 0 05 K F -1 2 1 T0 3 _0 4 C 27 3 11 3. 3 V S X7100 only P Q7 3 MT N 7 0 0 2Z H S 3 A C_ IN# 50 mil . C 5 68 J _ X7 1 P OW 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 FO R 3D E mi tte r Mo du le D02 W L A N_ L E D# S A T A _ LE D # B T _E N W LA N _E N L E D _ N U M# L E D_ CA P # L E D _S C R O L L# M_ B T N # W L A N _L E D # 2 9 , 3 0, 3 4 S A T A _L E D # 19 , 3 0 B T _E N 29 , 3 0 , 34 W L A N _ E N 2 9 , 3 0, 3 4 L E D _ N U M# 3 0, 3 4 L E D _ C A P # 3 0 , 34 L E D _ S C R OL L # 3 0 , 3 4 M_ B T N # 39 5 VS 85 2 0 5-0 6 0 01 23 23 V D D3 L I D _S W # L ID_ S W # U S B _P N 6 U SB_ PP6 6 5 4 3 2 1 J _ 3D 1 15 , 2 9 , 34 C 59 7 87 1 5 1-1 5 0 51 Port 0 J _ US B 1 D03 1 V+ L 65 U S B _P N 1 _R 1 2 2 DA T A _ L 4 3 3 4 GN D D03 U S 04 0 3 6B C A 0 81 P IN G N D3 ~ 4 = G ND G ND 2 DA T A _ H *W C M2 0 1 2F 2 S -1 6 1T 0 3 -sh o rt GN D 1 U S B _P P 1 _ R V DD 3 3 . 3V S 5V 5 VS 3 . 3V V DD 5 1 9 , 2 9, 3 4 , 3 6, 3 8 , 3 9, 4 5 4 , 1 0 , 11 , 1 2 , 13 , 1 4 , 15 , 1 6 , 17 , 1 8 , 19 , 2 0 , 21 , 2 3 , 24 , 2 5 , 26 , 2 9 , 30 , 3 2 , 33 , 3 4 , 36 , 3 9 , 40 , 4 3 , 58 2 6 , 2 8, 3 2 , 3 7, 3 9 , 4 0, 4 1 , 4 2, 4 6 1 4 , 1 5, 1 7 , 1 8, 1 9 , 2 5, 2 6 , 3 0, 3 2 , 3 3, 3 9 , 4 3, 4 4 3 , 4 , 9 , 14 , 1 5 , 19 , 2 0 , 21 , 2 3 , 24 , 2 5 , 26 , 2 8 , 29 , 3 0 , 32 , 3 6 , 37 , 3 9 , 40 , 4 1 , 42 3 8 ,3 9 GN D 2 EM I 0 . 1 u_ 1 6 V _Y 5 V _0 4 GN D 1 C 7 60 0 . 0 1 u_ 1 6 V _X 7R _0 4 1 0 u_ 1 0V _Y 5V _0 8 C 75 9 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 3 4 ,4 5 1 0 K _1 % _ 04 R 6 4 7 1 0 K _1 % _ 04 PPAD DM _ O 3 23 23 12 IN 2 R6 4 5 J D_ SE N S EA 3 2 L I N E -R 32 L I N E -L 32 J D_ SE N S EB 3 2 S IDE _ R 3 2 S IDE _ L 3 2 8 81 0 7-2 0 0 01 1 V DD 5 JD _ S E N S E A LI N E -R LI N E -L JD _ S E N S E B S IDE _ R S IDE _ L 2 4 6 8 10 12 14 16 18 20 Sheet 34 of 58 USB, TP, FP, MULTI-CONN A U DG C 7 83 10 u _1 0 V _ Y 5 V _ 08 3 4 , 3 8, 3 9 D D _ ON S P K _ HP # S P K _ HP # D02A 8/31 U S B V C C _C H A R GE R P R 2 45 10 K _ 1 %_ 0 4 33 *1 0 u_ 1 0V _ 0 8 V DD 5 D03 1 3 5 7 9 11 13 15 17 19 MI C 1-R MI C 1-L 3 2 H E A D P H ON E -R 3 2 H E A D P H ON E -L C 35 0 0 . 1 u_ 1 6V _ Y 5V _ 0 4 USB Charge PORT JA CK BO AR D U SBVCC 0 1 5 VS D03 4 7 P _5 0 V _ 04 * 1 00 u _6 . 3 V _ B 2 C3 5 9 U S B _P P 1 4 7P _ 5 0 V _0 4 U S B _P N 4 23 U S B _P P 4 23 FOR A ud io C3 4 3 1 0 u _1 0 V _ Y 5 V _0 8 R T9 7 1 5B G S 23 C 75 1 8 5 2 01 -1 0 05 1 3 9 , 41 D D _ ON # V DD 3 C7 5 0 10 0 K _ 04 1 EN # For ESD U S B _P N 1 T P _ CL K 3 4 3 .3 V S T P _ DA T A 3 4 100 mil 6 F L G# V O U T 1 V IN 2 V O UT 3 23 T P _ CL K T P _ DA T A USB, TP, FP, MULTI-CONN B - 35 B.Schematic Diagrams *0 . 1 u _1 6 V _ 04 EN 4 5 T P _ DA T A 1 2 3 4 5 6 7 8 9 10 US B V CC0 1 5 100 mil C3 4 5 GN D G5 2 43 A S A T A _ RX N4 1 9 S A T A _ R X P 4 19 U 29 5V * 0. 1 u _ 16 V _ 0 4 VIN VIN T P _ CL K *1 0 0 u_ 6 . 3 V _B 2 1 0u _ 10 V _ Y 5 V _ 0 8 USB PORT C 34 8 VO UT 5 V S _O D D C 19 4 3 5V J _T P 1 . ? ? 0. 1 u _ 16 V _ Y 5 V _0 4 5V S _O D D Schematic Diagrams Card Reader (JMC 251C) S D_ CL K V D D3 D02 JMC251 C C 74 0 near Pin#41 R6 3 9 3 . 3 V _L A N 0_ 0 6 S wit ch in g R eg ula to r c los e to PI N3 3 I S ON D02 * 10 p _ 50 V _ N P O _ 06 R5 0 1 3. 3 V S S D_ CL K R 50 0 DV DD *1 0 0 K _1 % _ 04 0_ 0 4 L 70 (>2 0m il ) R E G LX . R4 7 1 *4 . 7 K _ 04 S D _ C D # S DX C_ P O W E R U3 7 C 72 8 31 L A N _ MD I P 0 31 L A N _ MD I N 0 *1 5 m li _ s ho rt _ 0 6 31 31 D02 A V D D 1 2 _ 62 C 70 2 R4 6 6 D V DD 3 . 3 V _L A N 31 L A N _ MD I P 2 31 L A N _ MD I N 2 *1 5 m li _ s ho rt _ 0 6 31 31 0 . 1 u_ 1 6 V _Y 5 V _0 4 A V D D 1 2 _5 5 L A N _ MD I P 1 L A N _ MD I N 1 L A N _ MD I P 3 L A N _ MD I N 3 LA N _ MD I P 2 LA N _ MD I N 2 A V D D 1 2 _6 2 LA N _ MD I P 3 LA N _ MD I N 3 D02 3 . 3 V _ LA N J MC 25 1 _C R4 7 0 1 K _ 04 MS _ I N S # 3 .3 VS R4 6 8 R4 5 9 *1 0 K _ 1% _ 0 4 R E GL X S D _B S S D_ D3 S D_ D 2 S D_ D1 S D_ D 0 D VDD JMC251 C (LQFP 64) A V D D 1 2 _ 13 M D I O 13 M D I O7 R4 7 2 MD I O 1 0 MD I O 9 MD I O 8 V DD V I P _1 V IN_ 1 A V D D 12 V I P _2 V IN_ 2 GN D A V D D 33 V I P _3 V IN_ 3 A V D D 12 V I P _4 V IN_ 4 3 .3 V F or JM C2 51/ 26 1 C 74 2 C7 3 1 1 0 u_ 1 0V _Y 5V _0 8 Pin#33 0 . 1u _ 16 V _ Y 5 V _ 0 4 Pin#33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 V DD RE G V CC 3 V PW R CR TEST MP D W AKEN L A N _ LE D 2 C R _L E D R S TN CP P E N G ND V D DIO MD I O6 MD I O1 2 MD I O1 4 C R _ C D 0N *A T 2 4C 02 B N 3 .3 V S V DD 3 R 49 8 *0 _ 0 4 ( >2 0m il) 0m il) C 7 36 C 72 6 1 0 u _1 0 V _ Y 5 V _ 08 Pin#32 0 . 1 u_ 1 6 V _Y 5 V _0 4 Pin#32 MP D R4 9 3 1 0 K _ 04 C 72 5 C7 1 9 R4 9 4 * 4. 7K _ 0 4 1 0 u_ 1 0 V _Y 5 V _0 8 Pin#31 0 . 1u _ 1 6V _ Y 5V _ 0 4 Pin#31 C7 1 2 0 . 1 u _1 6 V _ Y 5 V _ 04 D02 * 0 _0 4 B U F _ P L T_ R S T# 3. 3 V _ L A N A V D D 1 2 _7 A V D D 1 2_ 7 C 6 83 C6 5 8 V DD3 3 .3 V D03 V D D3 R6 3 6 *0 _ 06 C 7 74 D02 *1 0u _ 1 0V _ Y 5V _ 0 8 1A D V DD 4 3 R 63 7 *1 . 62 K _ 1 %_ 0 4 V C NT L V IN V IN P OK V O UT V O UT D V DD R4 5 7 * 15 m i l_ s ho rt _ 0 6 1 VF B C7 7 6 R6 3 8 * 82 p _ 50 V _ N P O _ 04 * 2. 49 K _ 1 %_ 0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 0 _0 4 IN_ C 8 2 C6 8 0 5 9 7 EN A V D D 1 2 _1 3 *0 _ 0 4 R 63 5 * 0_ 0 6 U 42 *1 u _ 25 V _ 0 8 6 0 . 1 u _1 6 V _ Y 5 V _ 04 R 4 65 *0 _ 04 3. 3 V _ L A N S D _W P M D I O 12 MD I O1 4 S D _C D # P CI e Dif fe re nti al P ai rs = 10 0 Ohm R 4 64 3 .3 V R 4 77 B U F _P LT _ R S T # 1 6, 2 3 , 2 8, 2 9 , 3 4, 3 7 MS _ I N S # DVD D R4 6 2 * 1 5m i l_ s h ort _ 0 6 D02 (> 20m il ) (> 20 mil ) 3. 3 V S ( >2 V C C _C A R D MP D R 47 9 L A N _ P C I E _W A K E # L A N_ S C L L A N_ S D A 1 2 3 A0 A1 A2 G ND 3 . 3V S R 4 56 * 15 m i _l s ho rt _ 0 6 GN D *AX6610 C 77 8 * 1 0u _ 6 . 3V _ X 5 R _ 06 R4 8 2 C 68 1 C 68 2 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 P C I E _ R XP 2 _ GL A N 20 P C I E _R X N 2 _ GL A N 2 0 1 0K _1 % _ 04 3. 3V _ L A N D 20 2 1 , 28 , 2 9 , 37 P C I E _W A K E # P C IE _ W A K E # A C L A N _P C I E _ W A K E # L A N _P C I E _ W A K E # 3 4 C D B U 0 03 4 0 DV D D P C I E _T X N 2 _ GL A N 20 P C I E _ T X P 2_ G LA N 2 0 C LK _ P C I E _G L A N 2 0 C L K _ P C I E _ G LA N # 20 C6 3 7 4 IN 1 SOCKET SD/MMC/MS/MS Pro J_ C A R D _ N OR 1 S D_ CD # S D_ W P S D_ D1 S D_ D0 LA N X OU T *1 0 u_ 6 . 3 V _X 5 R _ 0 6 Pin#55 Reserved D02 R4 6 7 *1 M _0 4 X1 2 *2 5M H z 2 3 . 3 V _ LA N 1 3 D02 L A NX IN 4 Card Reader Power X1 1 2 C 73 3 C7 3 8 0 . 1 u_ 1 6 V _Y 5 V _0 4 Pin#43 *0 . 1 u_ 1 0 V _X 5 R _ 0 4 Pin#43 1 V C C_ C A RD S D_ B S S D_ CL K S D_ D1 S D_ D0 V C C _C A R D S D_ D2 C4 0 2 X 8 A 02 5 0 00 F G 1H _ 25 MH z C 63 5 C6 3 6 0 . 1u _ 16 V _ Y 5 V _ 0 4 22 p _5 0 V _ N P O _0 4 22 p _ 50 V _ N P O _ 04 R2 7 2 7 5_ 1 % _0 4 3 . 3 V _ LA N V C C _C A R D MS _ I N S # S D_ D3 S D_ B S S D_ CL K S D_ D3 C4 0 5 S D_ D2 0 . 1u _ 16 V _ Y 5 V _ 0 4 V C C _C A R D C 70 6 7 WP SC L SD A 4 V D D3 1 2K _ 1 % _0 4 3 .3 V _ L A N U 35 8 6 5 L A N_ S DA MS _ I N S # D02 * 4 . 7K _ 0 4 o nly 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Sheet 35 of 58 Card Reader (JMC 251C) D V DD 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 R EXT A V D D 33 X IN X OU T C LK N CL KP AVD D1 2 RXP RX N G ND TXN TX P AVDD 1 2 M D I O1 3 M D I O7 C R _ C D 1N D V DD *1 5 m li _ s ho rt _ 0 6 C 70 8 0 . 1 u_ 1 6 V _Y 5 V _0 4 MD I O1 0 MD I O9 MD I O8 A V D D 1 2 _5 2 R4 7 5 L A NX IN L A N X OU T B.Schematic Diagrams 0 . 1 u_ 1 6 V _Y 5 V _0 4 A V D D 1 2 _ 55 VDD 3 R 4 73 VC C D02 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 A V D D 1 2 _ 52 3. 3 V _ L A N S D X C _ P OW E R D02 Card Reader Pull High/Low Resistors A V D D 12 _ 7 S D_ W P 1 K_ 0 4 C 7 41 2. 2 u _ 6. 3 V _ Y 5 V _ 0 6 M D I O1 1 L AN_ L ED0 LA N _ LE D 1 IS O N GN D VD DIO VDDO M DIO 5 M D I O4 M DIO 3 M D I O2 M DIO 1 M D I O0 FB1 2 G ND LX R 48 1 M D I O1 1 L A N _ LE D 0 L AN_ L ED1 I S ON D02 * 4 . 7K _ 0 4 ( >20 mi l) S W F 2 5 20 C F -4R 7 M-M V C C _C A R D L A N_ S CL D03 D V DD R 4 74 D02 1 0 u_ 6 . 3 V _X 5 R _ 0 6 Pin#59 Reserved C7 1 3 C 6 84 C7 0 7 0 . 1u _ 1 6V _ Y 5V _ 0 4 Pin#59 0. 1 u _1 6 V _ Y 5 V _ 04 Pin#2 0. 1 u _ 16 V _ Y 5 V _ 0 4 Pin#21 B - 36 Card Reader (JMC 251C) C D_ S D W P _S D D A T 1_ S D D A T 0_ S D W P GN D _ S D V S S _S D V S S _M S B S _M S C L K _S D D A T 1_ M S S D I O/ D A T 0_ M S V D D_ S D D A T 2_ M S V S S _S D I N S _ MS D A T 3_ M S C MD _S D S C L K _M S V C C _ MS C D / D A T 3_ S D V S S _M S D A T 2_ S D 1-0 8 1 -40 0 3 95 -0 0 1 GN D GN D GN D GN D V C C_ CA R D C 39 8 0 . 1 u _1 6 V _ Y 5 V _ 04 Place all cap acito rs closed t o ch ip. The subs cript in e ach CAP incic ates t he p in n umber of JMC251/JMC261 t hat shou ld be clo sed t o. P 1 P 2 P 3 P 4 P 5 P 6 P 7 P 8 P 9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 P1 6 P1 7 P1 8 P1 9 P2 0 P2 1 P2 2 C 3 97 PN: 6- 20-G4000- 026 1- 081-4003 95-001 D02 C7 1 7 C 70 1 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 10 u _1 0 V _ Y 5 V _ 08 Near Cardreader CONN 1 9 , 29 , 3 4 , 3 5, 3 8 , 3 9, 4 5 V D D 3 D V DD 4, 10 , 1 1 , 12 , 1 3 , 14 , 1 5 , 16 , 1 7 , 18 , 1 9 , 20 , 2 1 , 23 , 2 4 , 25 , 2 6 , 29 , 3 0 , 32 , 3 3 , 34 , 3 5 , 39 , 4 0 , 43 , 5 8 3 . 3V S 3, 4, 9 , 1 4 , 15 , 1 9 , 20 , 2 1 , 23 , 2 4 , 25 , 2 6 , 28 , 2 9 , 30 , 3 2 , 35 , 3 7 , 39 , 4 0 , 41 , 4 2 3 . 3V 2 6 , 28 , 3 2 , 35 , 3 7 , 39 , 4 0 , 41 , 4 2 , 46 5 V PN: 6- 21-G4000- 126 M SD0 19-C0-10A3 P2 3 P2 4 P2 5 P2 6 Schematic Diagrams USB 3.0 3 . 3V 3 . 3V A 1 . 05 V 3 . 3V A f or X7 2 C99 0323 L36 . C 25 5 C 53 7 C 25 3 0. 1 u_ 10 V _X 5R _0 4 0. 1 u_ 10 V _X 5R _0 4 0. 1 u_ 10 V _X 5 R _0 4 0 . 1u _1 0V _ X5 R _ 04 L 27 U S B 30 V C C C 2 80 40 MIL . C 2 01 Port 2 1 0 u_ 10 V _Y 5V _ 08 H C B1 6 08 K F- 1 2 1T 25 0. 1 u_ 1 0V _ X5 R _ 04 J_ U S B 2 3. 3 V A 0 . 1u _1 0V _ X5 R _ 04 0 . 1u _1 0V _ X5 R _ 04 D2 D1 F2 F1 P C I E _T X P1 _ U S B 30 P C I E _T X N 1_ U S B 30 U 3T X D N 2 U 2 D M2 P E RX P P E RX N C 27 9 0 . 01 u _1 6V _ X7 R _ 04 0. 1 u_ 10 V _X 5 R _0 4 5 p_ 5 0V _ 04 P13 D7 U 3 TX D P 2 P E TX P P E TX N C5 5 2 U2 DP 2 U3 RX DP 2 C LOSE TO CO NNECT OR B6 S S T X2 C 21 5 0 . 1u _1 0V _ X5 R _ 04 A6 N8 S S T X2 # U 2D M 2 C 21 4 P8 B8 U 2D P 2 S S RX 2 A8 S S R X 2# G1 4 H1 3 U SB 3 0_ OC H1 4 J 14 P P ON 0 . 1u _1 0V _ X5 R _ 04 1 L58 *W C M2 0 12 F 2S -1 61 T0 3- s h ort4 1 L5 9 * WC M20 12 F 2S - 1 61 T 03 - sh or 4t U3 RX DN2 C 3 .3 V 16 , 23 , 2 8, 2 9, 3 4, 3 6 B U F _ P LT _R ST # R 17 0 2 1, 2 8, 2 9, 3 6 P C I E _ W AK E # 2 0 U SB 3 0 _C L K R E Q# A U XD E T R 17 1 D9 R 18 8 R 18 3 3 . 3V 1 9, 2 4 U S B 3 0_ S MI # R B 75 1 V 68 0K _ 04 0 _0 4 R 1 81 P E W A KE 0_ 04 0 _0 4 A U X D E T_ R J 2 J1 1 0K _ 04 H1 R6 6 9 0_ 04 D03 A H2 K1 K2 P5 P E R S TB P E W A KE B P E C R E QB OC I 2 B OC I 1 B A UX DE T PSEL S MI B P P ON 2 P P ON 1 U S B _S P I _ S C LK M2 U S B _S P I _ C E # N 2 N1 U S B _S P I _ S I U S B _S P I _ S O M1 1u _6 . 3 V_ X 5R _ 04 D02 P ON R ST B A U X D E T_ R R 1 82 *0 _0 4 K1 3 K1 4 J1 3 P4 S P IS CK S P ICS B S P IS I S P IS O U 3T X D N 1 U 2 D M1 U2 DP 1 U3 RX DP 1 u PD720200 GND GND GND GND B1 0 S S T X1 C 2 69 A1 0 N1 0 S S T X1 # U 2D M 1 P1 0 B1 2 U 2D P 1 S S RX 1 A1 2 S S R X 1# P 1 2 R 19 5 N1 2 R RE F U2 AVSS U3 AVSS 3 FP- >UEA11 1RC-C ABUF- 7H C99 0401 G ND2 D02 R 10 0 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND C1 2 C1 3 GND D 3 GND D4 GND GND D11 D1 2 GN D D1 3 G ND D1 4 G ND E1 GND E2 GND E1 3 GND E14 GND F 4 GN D F 6 G ND F 7 G ND F 8 GND F 9 GND F1 1 GND F 12 GND G1 GN D G2 G ND G6 G ND 2 0 p_ 50 V _N P O _0 4 3 2 1 0 K_ 0 4 UGND P1 4 P1 1 P9 P7 P2 P1 N1 3 N9 N7 N3 M1 3 M1 2 M1 1 M1 0 M9 M8 M7 M6 M5 M4 M3 L 12 L 11 L7 L6 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND U S B 30 V C C U S B 3 0_ OC 3 . 3V 5V U 12 5 R 1 01 F L G# V O U T1 2 C 2 04 *1 0 K_ 0 4 Q7 6 7 V IN1 V O U T2 V IN2 V O U T3 3 1 0u _1 0 V_ Y 5 V _0 8 4 D C 28 3 2 3 . 3V 8 E N# G ND 50 MIL C 23 2 C 21 1 C 20 7 + 0 . 1 u_ 16 V _Y 5 V _ 04 * 0. 1 u_ 16 V _ Y 5V _ 04 1 R T9 71 5 BG S P PO N G R 1 02 S 4 Sheet 36 of 58 USB 3.0 Port 1 G ND1 S ST X + S H I E LD V BU S S ST X DGN D D+ S SR X+ GN D _ D S SR X- S H I E LD 1 . 6K _ 1% _0 4 *2 N 7 00 2W 0_ 0 4 3 . 3V 3 . 3V NC 1 GND GND GND GND GN D GN D G ND GND GND GND GND GN D GN D G ND GND GND GND GND GND 3 C 28 2 20 p_ 5 0V _ N P O _0 4 9 1 8 2 4 3 6 7 5 0. 1 u_ 10 V _ X5 R _0 4 X T1 X T2 GND GND GND GND GN D GN D G ND 1 1 0 u_ 10 V _Y 5 V _0 8 D6 * N C _ 04 G7 G8 G9 G11 G1 2 G1 3 H6 H7 H8 H9 H12 J3 J4 J6 J7 J8 J9 J1 1 J1 2 K3 K4 L1 L2 L3 L4 *24 MH z 2 3 2 20 u _6 .3V _ 6. 3 *4 .5 X5 2 J_ U S B 3 N1 1 1 0 0_ 04 A1 A2 A3 A4 A5 A7 A9 A1 1 A1 3 A1 4 B3 B4 B5 B7 B9 B1 1 B1 3 B1 4 C1 C2 C3 C1 0 C1 1 C 2 62 3 U2 PVSS CSEL 24 MH z 1 H C B 16 08 K F -12 1T 25 CONNEC TOR C 2 74 0. 1 u_ 10 V _ X5 R _0 4 1 L6 3 *W C M 20 12 F 2S - 1 61 T0 3 - sh or t 4 1 L6 4 *W C M 20 12 F 2S - 1 61 T0 3 - sh or t 4 P6 X6 2 . 2 C -3 17 A H 0 9F Z TS 4 9 4C B GND R 20 2 G ND2 40 MIL U3 RX DN1 C1 4 N1 4 M1 4 L3 3 U S B 30 V C C CLOS E TO U 3 TX D P 1 C 62 7 G ND1 S S TX + S H I E L D V B US S S TX DGN D D+ S S R X+ GN D _ D S S R X- S H I E L D C -3 17 A H 0 9F Z T S4 9 4C B U2A VDD3 3 H1 1 K11 K12 L8 VDD 10 VDD 10 VD D10 VDD1 0 E11 E12 H3 H4 L5 VDD1 0 VDD1 0 VDD1 0 E3 E4 VDD1 0 VDD1 0 VDD 10 VD D10 C8 C9 D8 D9 VD D10 VDD1 0 VDD 10 VD D10 C4 C5 C6 C7 D5 VD D10 VDD1 0 VDD1 0 VDD 10 VD D10 L1 3 L1 4 L9 L10 N4 N5 N6 P3 VDD33 VDD3 3 VDD3 3 VDD3 3 VDD3 3 VDD 33 VDD3 3 VDD3 3 F3 G3 G4 P E C L KP P E C L KN 0 . 01 u _1 6V _ X7 R _ 04 C 23 7 R1 6 7 KBC_SPI_*_R = 0.1"~0.5" 512Kb it 0 . 1u _1 6V _ Y 5 V _0 4 4 7K _ 04 U1 6 8 U S B _ SP I _ V D D _ 1 5 U S B _S P I _ SI _ R R 15 1 4 7_ 04 U S B_ S P I _S I 2 U S B _S P I _ SO _R R 16 6 1 5_ 1% _ 04 U S B_ S P I _S O R 16 5 1 U S B _S P I _ C E #_ R CE # 6 U S B _S P I _ SC LK _ R R 15 4 S CK 4 H O LD # VS S MX 25 L5 12 1 EM C - 20 G 1 5_ 1% _ 04 U S B_ S P I _C E# 4 7_ 04 U S B_ S P I _S C L K V DD SI SO R1 6 4 1 K _0 4 U S B_ F LA S H 3 R1 5 8 4 . 7K _ 04 U S B_ H OL D # 7 W P# ? ? ? ? PIN6? 3 . 3V 5V 1 .5 V 5V R 17 2 2A C 22 3 U1 4 10 K _0 4 5 9 7 R 13 0 AU XD E T 10 K _0 4 V IN V IN P OK 1. 0 5V 1 u_ 1 0V _ 06 V CNT L V O UT 6 P R 93 3A 4 3 D 8 G 1 C 21 6 C 2 48 S S US B # *MT N 70 0 2Z H S 3 G ND C 22 5 V FB 2 R 1 36 75 0_ 1 %_ 04 1u _6 . 3V _ Y 5 V _0 4 AX6 610AE SA 0. 1 u _1 6V _ Y 5V _ 0 4 *1 5 mi _l sh o r t U GN D EN Q16 21 , 32 , 33 , 34 , 39 V O UT C 2 20 0. 0 15 u_ 1 0V _ X7 R _0 4 C 2 30 C2 2 9 *1 0 U _1 0V _ 08 1 0u _ 10 V _Y 5 V _0 8 0. 1 u_ 16 V _Y 5V _ 04 4 , 9, 1 0, 1 1, 1 2 ,1 3 , 26 , 30 , 39 , 41 3, 4 , 9, 1 4, 1 5 , 19 , 20 , 21 , 23 , 24 , 25 , 2 6, 2 8, 2 9, 3 0, 3 2, 3 5 ,3 6 , 39 , 40 , 41 , 42 2 6, 2 8, 3 2, 3 5 ,3 9 , 40 , 41 , 42 , 46 1. 5 V 3. 3 V 5V (15nF ~48nF) C 2 27 C 22 6 R 1 29 1 0u _1 0 V_ Y 5 V _0 8 0 . 1 u_ 16 V _Y 5V _ 04 2. 4 K _1 %_ 0 4 USB 3.0 B - 37 B.Schematic Diagrams 20 20 C 25 0 C 25 1 PC I E_ R X P 1_ U S B 30 PC I E_ R X N 1 _U S B 3 0 9 1 8 2 4 3 6 7 5 Standard -A 20 20 U3 A VDD3 3 B2 B1 20 C L K_ P C I E _ U S B3 0 20 C L K _P C I E _ U S B 30 # VDD3 3 VDD 33 VD D33 VDD3 3 VDD3 3 VDD3 3 U 21 D1 0 F1 3 F1 4 C 56 1 C 5 49 0. 0 1u _1 6 V_ X 7R _ 04 0 . 01 u_ 16 V _X 7 R _0 4 C 55 4 C 26 6 C2 5 2 C 5 51 0. 0 1u _1 6 V_ X 7R _ 04 0. 0 1u _ 16 V _X 7R _ 0 4 0 . 01 u_ 1 6V _ X7 R _ 04 C2 6 8 C 56 0 0 . 01 u_ 1 6V _ X7 R _0 4 0. 0 1u _1 6 V_ X 7R _ 0 4 C 5 53 C 5 38 C 2 84 C 25 4 C 28 5 0 . 01 u_ 16 V _X 7 R _0 4 0 . 01 u_ 16 V _X 7 R _0 4 0. 0 1u _1 6V _ X 7R _ 04 0. 0 1u _1 6 V_ X 7R _ 0 4 Standar d-A H C B 16 08 K F -12 1T 25 C 2 49 Schematic Diagrams VDD3, VDD5 VR EF P R 11 6 * 0_ 0 4 P R1 1 5 0_ 0 4 PC 9 8 1u _ 1 0V _0 6 P R1 1 8 P R 1 14 E N _ 3V E N_ 5 V P C9 3 10 0 K _ 04 P C9 5 10 0 0 p_ 5 0 V _ X7 R _0 4 1 0 0 K _0 4 7 V O2 4 .7 u_ 2 5 V _ X5 R _0 8 4 . 7u _ 2 5V _X 5 R _ 0 8 1 EN1 3 4 2 VFB1 V IN 24 VO 1 P R 1 05 8 B OO T 2 10 1 5 6 7 8 C P R 91 P R8 9 P R9 6 R B 0 5 40 S 2 * 0_ 0 4 P R8 3 0 _ 04 PR 9 0 * 0 _0 4 P D7 P R 1 19 *0 _ 0 4 E N _ 3V P R 1 13 0 _0 4 P R 98 E N _ 5V VIN *0 _0 4 C P C7 6 0 .0 1 u _1 6 V _ X7 R _0 4 D D03 1 9 .1 K _ 1% _ 0 6 P D5 A R B 0 54 0 S 2 C SY S5 V SY S1 0 V P C 74 P D4 R B 0 54 0 S 2 2 2 00 p _ 50 V _ X 7 R _ 0 4 C 1 u _6 . 3 V _ X 5R _ 06 A P C 80 0 . 01 u _ 1 6V _ X 7 R _ 0 4 P D3 A R B 0 54 0 S 2 C SY S1 5 V P C 73 1 2 S D PQ 3 1 2 2 00 p _ 50 V _ X 7 R _ 0 4 1 0 0 K _ 04 M T N 7 00 2 Z H S 3 PJ 6 * 4 0m i l P R 1 09 P C 8 9 0 . 1 u _1 0 V _ X 5 R _ 0 4 D M TN 7 00 2 Z H S 3 S P R1 2 2 G P Q2 1 G R B 0 54 0 S 2 A V R E G5 P C 78 1 0 K _0 4 P Q 25 P D8 C A 4 .7 u _2 5 V _ X 5R _ 08 R B 0 54 0 S 2 0_ 0 4 P C 79 2. 2_ 0 6 VIN 1 V RE G 5 D D _ ON Rb M990125 V RE G 5 3 4 , 3 5, 3 9 10 0 0 p_ 5 0 V _ X7 R _0 4 *6 8 0 K _ 1% _ 0 4 P R8 2 G S A C_ IN M T N 70 0 2 Z H S 3 45 D02 39 S YS5 V 3 5 ,3 9 V D D5 39 V IN1 1 5, 3 9 , 4 0 S Y S 1 5 V 1 9 , 29 , 3 4 ,3 5,3 6 , 3 9 , 45 V D D 3 1 4 ,15 ,3 9 ,4 0,4 1 , 4 3 ,44 , 4 5 ,4 6 V I N B - 38 VDD3, VDD5 *5 m m P R1 2 1 P1 2 0 3 BV V R E G5 E N_ A L L R B 0 54 0 S 2 P D1 7 2 PC 9 6 A A V DD 5 PJ 1 9 1 Ra 3 0 K _ 1 %_ 0 6 1 2 3 18 17 16 25 15 14 13 C VDD5 5A P L8 4 .7 U H _6 .8 *7 .3 *3 . 5 2 P Q5 7 P D6 A V RE F C OP Y C4 8 C 98 09 17 4 .7 u_ 2 5 V _ X5 R _0 8 4 VCL K L DO 5 EN0 19 PD 9 F M S 3 0 04 -A S -H V R E G5 P C 16 6 4 .7 u _2 5 V _ X 5R _ 08 SY S5 V P 1 2 03 B V L G ATE1 V IN L GA T E 2 G ND PAD GN D 12 4 PR8 8 P R 11 7 2 0 K _ 1% _ 0 4 P HA S E 1 S K IP S E L 8 7 6 5 P Q 56 P 1 2 03 B V PD 1 6 P C 1 67 P Q 55 4 20 C 1 3 K _1 % _ 0 6 UG A T E 1 P HA S E 2 3 2 1 PC 9 7 1 0 0p _ 5 0 V _N P O _ 0 4 22 0 u _6 . 3 V _ 6 . 3* 4 . 5 + P R 12 3 UG A T E 2 11 P C9 4 P C1 7 7 1 u_ 2 5 V _ 08 21 1 2 3 PL 1 0 4.7 U H _ 6 . 8* 7 . 3* 3 .5 2 1 P C 99 0 . 1 u _ 50 V _ Y 5 V _ 0 6 22 3 2 1 SY S3 V 1 *5 m m uP6182 0 . 1u _ 5 0V _Y 5 V _0 6 P J 20 2 B OO T 1 5 6 7 8 9 PC 8 5 4 A V DD 3 Sheet 37 of 58 VDD3, VDD5 SYS5 V P OK P C8 8 8 7 6 5 5A * 1 0K _0 4 23 L DO 3 1u _ 6 .3 V _X 5 R _ 0 6 P Q 59 P 1 2 03 B V 0 . 1 u _ 16 V _ Y 5 V _ 04 B.Schematic Diagrams P C9 0 VDD3 C P C1 7 5 P U7 F M S 30 0 4 - A S - H P C 17 6 VREF V IN T O NSEL EN2 V R E G3 V FB2 5 6 10 0 0 p_ 5 0 V _ X7 R _0 4 P C 1 72 + 2 2 0 u_ 6 . 3 V _6 . 3 *4 .5 P C 92 0 . 1 u_ 1 6 V _Y 5 V _ 04 Schematic Diagrams 5V, 3.3V, 5VS, 3VS, 1.5VS, VIN1 V IN POWER SWITCH LED 3 .3 V S 20mil POWER BUTTON SW 1 4 3 R 6 55 1 VA *1 2K _0 4 35 1 00 _ 0 4 M_ B T N # M _B T N # . L76 VIN 1 10 K _ 0 4 R6 5 6 PW R _ SW # I N S TA N T -ON G ND 1K _ 1 % _ 04 P W R _S W # 3 4 5 D03 P 2 8 0 8A 1 D03 C1 2 7 D03 1 K _ 04 D D _ ON 6 M _B T N # 4 R 4 58 D D _O N _ L A T C H 3 1 K _ 1 %_ 0 4 V IN 1 7 VIN R 50 3 R4 6 1 8 VA D03 20mil 20mil H C H _S T S -0 2 M_ B T N # M _B TN # U 34 2 V IN R7 5 1 2 * A V L C 1 5 S 02 0 3 6_ 0 4 V DD 3 C 3 39 SY S5 V *0 . 1 u _1 6 V _ 0 4 SY S5 V 0 . 1 u _1 6 V _ Y 5 V _ 0 4 P R1 9 4 X7100 A X5100 VI N VIN VA VA VA 10 K _ 0 4 D 4 D D _ ON # C4 2 8 C 42 7 0 . 1u _ 5 0V _ Y 5 V _ 0 6 D D _O N 1 0 K _ 04 MT N 7 0 02 Z H S 3 P C1 7 9 SUS B S *0 . 1 u_ 1 6 V _Y 5 V _0 4 P R1 9 5 G 1 0 0 K _ 04 SU SB 4 , 2 5, 4 0 , 4 1, 4 2 PC1 6 4 P Q 54 2 1 , 3 2, 3 3 , 3 4, 3 7 S U S B # MT N 7 0 0 2Z H S 3 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 S 0 . 1 u _5 0 V _ Y 5 V _0 6 0. 1u _ 5 0V _ Y 5 V _ 0 6 C 0. 1 u _ 50 V _ Y 5 V _ 0 6 3 4 , 3 5, 3 8 P R 1 93 3 5 , 41 P Q6 1 G Sheet 38 of 58 5V, 3.3V, 5VS, 3VS, 1.5VS, VIN1 1. 5 V S _ C P U 1. 5 V EMI 5V 1.5VS_CPU 1.5VS 5VS C5 0 6 0. 1 u _ 1 6V _ Y 5V _ 0 4 C5 0 7 0. 1 u _ 1 6V _ Y 5V _ 0 4 C2 4 6 0. 1 u _ 1 6V _ Y 5V _ 0 4 C2 4 7 0. 1 u _ 1 6V _ Y 5V _ 0 4 NM OS M TN N 2 0 N 0 3 Q8 2 1 N MOS 5V S Y S 1 5V 3A V DD 5 S Y S 15 V R1 5 2 D03 SY S1 5 V NM OS C2 3 1 5 22 0 0 p _5 0 V _ X7 R _0 4 P Q 16 B M TN N 2 0 N 0 3 Q8 5 G S US B P Q 53 A M TN N 2 0 N 0 3 Q8 2 1 Q1 4 MT N 70 0 2 Z H S 3 S PJ 9 * 2 20 _ 0 4 P C 1 60 P C 1 61 * 0. 1 u _ 16 V _ Y 5V _ 0 4 * 1 0u _ 6 . 3V _ X 5 R _ 0 6 P Q 53 B MT N N 2 0 N 0 3 Q8 P C 15 9 5 S US B P Q5 2 * MT N 7 0 0 2 Z H S 3 G 2 2 00 p _ 50 V _ X 7 R _ 04 S *4 0m i l 6 2 *4 0 m li P R 1 92 1 M_ 0 4 6 P J2 3 2 4 , 2 5, 40 , 4 1 , 42 8 7 1 6 1 6 S US B P R 19 1 3 P Q 2 8B M TN N 2 0 N 0 3 Q8 DD_ O N# 4 70 p _ 50 V _ X 7 R _ 0 4 C 2 38 R1 7 9 0 . 1u _ 1 6V _Y 5 V _0 4 1 0 0_ 0 4 1 0 u _1 0 V _ Y 5 V _ 0 8 4 C3 1 6 5 C2 3 3 1 .5 VS_ EN D 3 P Q 71 B M TN N 2 0 N 0 3 Q8 4 4 PJ3 MUST SHORT 7 P S _ S 3 C N TR L_ 1 . 5 S 1 .5 VS M TN N 2 0 N 0 3 Q8 8 2 7 1 C 31 7 0 . 1 u_ 1 6 V _ Y 5 V _ 04 * 47 0 p _5 0 V _ X7 R _0 4 P Q 1 6A 1M _ 04 1 M_ 0 4 P C 1 93 1 .5 V R2 2 4 3 1 M_ 0 4 5 VS M T N N 20 N 03 Q 8 8 2 7 1 Power Plane P R 2 17 NM OS P Q2 8 A 3 8 3A 7 4 S Y S 1 5 V V D D5 D P Q 7 1A ON ON ON 3 .3 V 3.3V 3A P Q 6 4A M TN N 2 0 N 0 3 Q8 8 2 7 1 3 . 3V S Y S 1 5V V D D3 3A Power Plane *1 0 K _0 4 P Q6 0 A M T N N 20 N 03 Q 8 8 2 7 1 R1 0 8 3 .3 VS 1 .5 V S _ CP U G R4 4 5 5 * 22 0 0 p_ 5 0 V _X 7 R _ 0 4 DD_ O N# C6 1 4 R 44 4 0 . 1 u_ 1 6 V _ Y 5 V _ 04 8 2 _0 4 10 u _ 10 V _ Y 5 V _ 0 8 P Q 6 0B M TN N 2 0 N 0 3 Q8 2 20 0 p _5 0 V _ X 7R _ 04 G S S US B R 11 6B S Q9 *2 N 39 0 4 4 ,4 1 38 V IN1 45 VA 38 SYS5 V 3 5 ,3 8 V DD5 4 , 25 , 4 0 , 41 , 4 2 S U S B * MT N 7 0 02 Z H S 3 4 ,7 1 . 5V S _C P U 1 5 , 3 8, 4 0 S Y S 15 V 7 , 16 , 2 5 , 4 2 1 . 8 V S 25 1 .5 VS 4 , 9 , 1 0 , 11 , 1 2 , 13 , 2 6 , 3 0, 3 7 , 4 1 1. 5 V 1 9 , 2 9 , 34 , 3 5 , 36 , 3 8 , 4 5 V D D 3 2 6 , 2 8, 3 2 , 3 5, 37 , 4 0 , 41 , 4 2 , 4 6 5 V 1 4 , 15 , 3 8 , 40 , 4 1 , 4 3, 4 4 , 4 5, 46 V I N 1 4, 1 5 , 1 7 , 18 , 1 9 , 25 , 2 6 , 3 0, 3 2 , 3 3, 35 , 4 3 , 44 5 V S 4 , 1 0, 1 1 , 1 2, 13 , 1 4 , 15 , 1 6 , 1 7, 1 8 , 1 9, 2 0 , 2 1 , 23 , 2 4 , 25 , 2 6 , 2 9, 3 0 , 3 2, 3 3 , 3 4 , 35 , 3 6 , 40 , 4 3 , 5 8 3 . 3 V S 3 , 4 , 9 , 1 4, 1 5 , 1 9, 20 , 2 1 , 23 , 2 4 , 2 5, 2 6 , 2 8, 2 9 , 3 0 , 32 , 3 5 , 36 , 3 7 , 4 0, 4 1 , 4 2 3. 3 V Q1 2 6 1 2 6 5 P J2 1 Q 27 M TN 7 00 2 Z H S 3 *1 K _ 04 E C6 0 2 C 61 3 D P Q 64 B M TN N 2 0 N 0 3 Q8 3 P C 1 80 1 M_ 0 4 4 3 4 1 M_ 0 4 + 1 . 5 S _C P U _P W R GD *1 0 K _ 0 4 C P R 1 96 R1 1 1 N MOS D NM OS S Y S 1 5 V V D D3 3 .3 V 3.3VS *4 0 m li ON 5V, 3.3V, 5VS, 3VS, 1.5VS, VIN1 B - 39 B.Schematic Diagrams X5100 0 . 1 u _5 0 V _ Y 5V _0 6 C 57 0 D03 D D _ ON # C 6 1 9 C 72 1 D K P -20 1 2 P B C -A D D02 Schematic Diagrams Power 1.05VS, 1.05VS_VTT 5V A VIN 5V *0.1u_1 6V_Y5V_04 16 15 PC1 78 V1 .05 1.05VS 20PJ22 A 1 2 + PD18 FMS3004 -AS-H A GND RTN 17 5 ? ? ? ? PIN3? PC1 12 RTN 6 N.C N.C 7 8 DL PAD PQ33 *MDU2654 4 C PQ62 MDU2 654 4 4 FB 1. 05VS 2 *OPEN-12mm 3 5 6 7 8 VCC 2 3 1 BST VOUT 5 6 7 8 PGD 9 Sheet 39 of 58 Power 1.05VS, 1.05VS_VTT + PL11 1UH _ 10*1 0*4. 5 1 2 1 2 3 1 10 PC182 + PC183 PC18 7 1u_10V_Y5V_06 PJ11 1 PR135 PR134 40.2K_1%_ 04 2 0K_1%_04 5V PR137 2 PC109 *40mil 4 7p_50V_NPO_04 90.9K_04 PR131 0_04 PC107 PC10 8 0 .01u_16 V_X7R_ 04 6/22 Modify PR133 20p_50V_NPO_04 VCCIO_ SENSE 6 PR130 *0_04 PJ16 100K_ 1%_04 RTN 1 2 VSSI O_SENSE 6 *40mil 3.3VS 1.05VS_VTT_ PWRGD 46 9A PQ66A MTNN20N03Q8 2 1 5 1.05 VS_VTT_EN# 3.3 V D PQ66B MTNN20N03Q8 G 1K_04 *0.1u_ 16V_Y5V_04 MTDN7002ZHS6R E R49 2 *100_0 4 PQ51A 1 Q39 2N3 904 Q31 *MTN7002 ZHS3 S C700 C661 10u_10V_Y5V_08 3 C679 S C B PC105 2 G PR220 3,4,6, 24,25, 26,43 1.05 VS_VTT 1M_04 4 D 1. 05VS_VTT R480 *2200p_50 V_X7R_ 04 6 0. 1u_16V_Y5V_04 8 7 PR127 10K_04 NMOS SYS1 5V 1 .05VS 3.3 VS PR128 10K_ 1%_04 1.05VS_VTT 6 R506 10K_04 D ON 21 1.05VS_ VTT_EN G Q32 MTN7002ZHS3 S B.Schematic Diagrams LX 11 1.05VS_ PWRGD 21 1.05 VS_PWRGD EN PC113 0.1 u_50V_Y5V_0 6 DH 12 N. C 13 10K_04 ILIM PR132 5V N.C 14 PC111 PC119 *15u_25V_6.3*4. 4_C 5 6 7 8 4 PC106 PC116 0.1u_50V_Y5V_06 C PU9 SC412A / uP612 7 S MTDN7002 ZHS6R PC110 4.7u_25V_X5R_08 4 PQ63 MDU2 657 0.1u_16V_Y5V_04 PQ32 B 10 K_1%_04 560u_2. 5V_6. 3*6 4,25, 39,41, 42 SUSB RB0540S2 PR136 5 G 2 3 1 SUSB D 4. 7u_25V_X5R_08 1.0 5V_ON 3 *560u_2.5V_6. 3*6 PR129 100K_1%_ 04 0. 1u_50V_Y5V_06 PD12 4,10, 11,12, 13,14, 15,16, 17,18, 19,20, 21,23, 24,25, 26,29, 30,32, 33,34, 35,36, 39,43, 58 3 .3VS 19,2 0,21,2 5,26,3 0 1. 05VS 15,3 8,39 SYS15V 26,2 8,32,3 5,37,3 9,41,4 2,46 5V 14,1 5,38,3 9,41,4 3,44,4 5,46 VI N 3 ,4,6, 24,25, 26,43 1.05VS_VTT 3,4, 9,14,1 5,19,2 0,21,2 3,24,2 5,26,2 8,29,3 0,32,3 5,36,3 7,39,4 1,42 3.3V B - 40 Power 1.05VS, 1.05VS_VTT Schematic Diagrams 0 . 1u _ 1 0V _ X 5 R _ 0 4 22 V L D O IN VBST PJ 8 24 P R 1 26 21 VTT D RV H 1 P C 1 02 20 V T T GN D 2 DR V L 0_ 0 6 *0 _ 0 4 P G ND C S _G N D 4 V T T RE F PV C C5 V C C5 C OMP P GO OD P R 94 5 6 7 8 P C9 1 S5 N C F M S 3 0 04 -A S -H P C 1 6 5 P C 1 74 P C1 6 2 P C 16 3 P C8 7 10 P R8 7 P R9 9 1 0 0 K _ 04 0_ 0 6 DD R1 .5 V _ P W RG D D D R 1 .5 V _ P W R G D 2 1 Sheet 40 of 58 Power 1.5V/ VTT_MEM 25 12 7 S3 NC V D DQ S E T + 3 .3 V 11 VD DQ SET D S * 1 00 0 p _X 5 R _0 4 PC8 1 *M TN 7 00 2 Z H S 3 9 + P D1 1 4 P R 1 20 2 .2_ 0 4 13 V D DQ S NS P Q3 0 MD U 2 6 54 5V 10 K _ 1 % _0 6 1 u _1 0 V _ 06 G 8 P R 10 8 15 14 1 u_ 1 0 V _ 06 P Q2 6 S US B 4 ,2 5, 39 ,4 0 , 42 S U S B 6 *1 0 _ 04 PC 84 *1 0 00 p _ X 5 R _ 0 4 V T T _ ME M 0 _ 06 PR9 7 P R 10 0 5V *2 2 _0 4 P Q 29 *M D U 2 65 4 0 _ 06 4 CS 0 . 1 u_ 1 0 V _ X5 R _0 4 5 P R 12 4 P R1 1 2 16 M OD E P C 86 18 17 A *0 _ 0 4 P R1 0 3 2 *O P E N _8 A 5V * 1 0K _1 % _ 04 P R9 2 P R 1 02 5V 10 K _ 1 % _0 6 4 7 K _ 04 1 00 K _ 0 4 G D 0 . 1 u _ 16 V _ Y 5 V _ 0 4 P Q2 7 MT N 70 0 2 Z H S 3 S US C # PJ 7 *4 0m i l G MT N 70 0 2 Z H S 3 S S 2 1 ,34 P Q2 4 MT N 7 0 0 2Z H S 3 G G P Q2 3 3 5 ,39 0 .1 u _ 16 V _ Y 5 V _ 0 4 *M TN 7 00 2 Z H S 3 S D P R 1 06 P C8 3 10 K _ 1 % _0 6 P C8 2 D VTTEN P Q2 2 SU SB P R9 5 D * 10 0 K _ 0 4 S 1 0 0 K _0 4 P R1 0 7 1 4 ,3 9 +1 . 5 S _ C P U _ P W R G D P R1 1 0 2 5V D D _ ON # V DDQ S E T 3 . 3V P R8 6 P R8 1 7 5K _ 1 % _ 04 3 .3 V 15 0 K _ 1% _ 0 4 P R8 5 PJ 2 8 2 S 3 .3 V PQ 2 0 MT N 7 0 0 2Z H S 3 D G P Q1 9 1 u_ 6 .3 V _ X5 R _0 4 S 2 9/17' 09 1. 5V_ CTRL1 1. 5_ CTRL0 Volta ge 1 0 1 0 1.5 5V 1.6 0V 1.6 5V 1.7 0V G P C 75 PJ 2 9 2 0 I C H _ GP IO 46 1 0 0 K _ 04 1 u_ 6 . 3 V _X 5 R _ 0 4 D03 P R 84 1 0 0K _ 0 4 1 S D P C7 7 G ICC _E N # * 40 m i l P Q1 8 MT N 70 0 2 Z H S 3 P R8 0 S 1 24 G P Q1 7 MT N 7 0 0 2Z H S 3 D 10 0 K _ 04 P R 79 1 0 0K _ 0 4 D 3 .3 V MT N 70 0 2 Z H S 3 1 1 0 0 2 6 ,28 ,3 2 ,3 5,3 7 , 3 9, 40 , 4 2 ,46 5 V 1 4 ,15 ,3 8 ,3 9,4 0 , 4 3, 44 , 4 5 ,46 V I N 4 , 9 ,10 ,1 1 ,1 2,1 3 ,2 6, 30 , 3 7 ,39 1 . 5 V 3 ,4 , 9, 1 4 ,1 5, 19 ,2 0 ,21 ,2 3 , 2 4,2 5 , 2 6, 28 , 2 9 ,30 ,3 2 ,3 5,3 6 , 3 7, 39 , 4 0 ,42 3 . 3 V 10 , 1 1 , 1 2, 1 3 V T T _M E M * 40 m i l Power 1.5V/VTT_MEM B - 41 B.Schematic Diagrams P R1 0 1 G ND GND 5V 0 _0 6 2 3 1 3 P R1 0 4 V DD Q PJ 1 8 1 .5 V P R 12 5 19 V T T S NS 1 0 u _1 0 V _ Y 5 V _ 0 8 *1 0u _ 1 0V _Y 5 V _0 8 1 LL 0. 1 u _ 1 6V _ Y 5 V _ 0 4 1 0 u _1 0 V _ Y 5 V _ 0 8 23A 0. 1 u _ 16 V _ Y 5 V _ 0 4 P R 11 1 0 _ 06 1.5V V D DQ 5 60 u _ 2. 5 V _ 6 . 3 *6 P C 10 4 C P C 10 3 0730 modify PL 9 1 .0 U _ 1 0* 10 * 5 1 2 3 .3 _ 06 * OP E N _2 A + V IN * 33 0 u _2 . 5 V _ V _ A 1 5 6 7 8 2 2 3 1 V T T _M E M P C1 7 0 0 . 1u _ 5 0 V _Y 5 V _ 0 6 2 3 1 23 P C1 6 8 P C 17 3 4 P C 1 00 PC1 7 1 4 . 7u _ 2 5V _X 5 R _0 8 R B 05 4 0 S 2 P C 10 1 1 0 u_ 1 0 V _Y 5 V _ 08 VTT_MEM P C1 6 9 4 . 7u _ 2 5V _ X 5 R _0 8 P Q5 8 M D U 2 65 7 5 6 7 8 C 5V u P 6 1 63 0. 1u _ 5 0V _ Y 5 V _ 0 6 P D 10 A PU 8 VD DQ *1 5 u _2 5 V _ 6 . 3* 4 . 4_ C Power 1.5V/VTT_MEM Schematic Diagrams Power 1.8VS V1.8 5V 1.8VS 3.3 V PJ5 PC67 21 1.8VS_PWRGD 1.8VS_PWRGD R150 PR75 10K_04 4,25,39,40,41 SUSB G PR74 1M_04 *10mil_short EN1.8VS PC64 D 5V 5 6 9 VIN VCNTL 7 VIN 4 POK VOUT 3 VOUT 8 EN 1 2 GND VFB 10K_04 PQ15 2N7002 2A PC70 PC71 PC68 PR77 1.27K_1%_04 *1u_6.3V_Y5V_04 AX6610 / GS7113 M990125 PC69 PC66 82p_50V_NPO_04 PC72 PC65 0.1u_16V_Y5V_04 10u_10V_Y5V_08 2200p_50V_X7R_04 PR76 C990317 1K_1%_04 B - 42 Power 1.8VS *OPEN_2A 1u_10V_06 10u_ 10V_Y5V _08 0 .1 u _ 1 6 V _ Y 5 V _ 0 4 3.3V 2 PU6 2A PR78 1 * 10u_10V_Y 5V_08 Sheet 41 of 58 Power 1.8VS S B.Schematic Diagrams 1.8VS 3,4,9,14,15,19,20,21,23,24,25,26,28,29,30,32,35,36,37,39,40,41 3.3V 7,16,25 1.8VS 26,28,32,35,37,39,40,41,46 5V Schematic Diagrams Power V-Core 1 P C 4 7 6 8 0 p_ 5 0 V _ X 7R _ 04 TR BST P R 47 PR 3 8 13 . 7 K _ 1 % _0 4 P C4 4 PR 4 9 24 . 9 k _ 1% _ 0 4 0 . 1 u_ 1 0 V _ X5 R _0 4 1. 21 K _ 0 4 P C4 9 B~ 43 50 0804 modify R T1 1 5 60 0 p _ 50 V _ X 7 R _ 0 4 A_GN D 2 1 00 K _ N TC _ 06 _ B P R1 6 0 22 p _ 50 V _ N P O_ 0 4 P R3 4 33 0 0 p _5 0 V _ X 7R _ 04 P C 43 3 . 01 K _ 1 % _0 4 R T2 *1 0 0 _0 4 P R3 0 *1 5 m li _ s ho rt D03 3.3VS VR 1 _C SRE F 53 52 51 50 49 48 47 46 45 44 43 42 41 40 P R 65 0_ 0 4 V R _ ON 6131_V CC 5VS PR 7 1 2 . 2 _0 6 VIN A_ G ND P R 67 1K _0 4 P C5 7 PC5 8 PR 6 6 1 u_ 6 . 3 V _ X5 R _ 04 *1 4 K _ 04 EPAD D IF F O UT VSN T RBST FB C OM P IL IM D R OO P C SCO M P CSS UM IO UT CS REF N C2 N C1 VSP T SEN SE V R HO T # S D IO SC L K AL ER T# VR _ RD Y VR _ RD YA EN ABL E VC C R OS C V R MP T SEN SEA A_GN D 0 . 0 1 u_ 5 0 V _ X7 R _0 4 N C P 6 1 31 S CS N2 C SP2 CS N3 C SP3 CS N1 C SP1 D R ON P W M1 / A D D R P W M3 / V B O OT P W M 2 /IS HE D IM A X P W MA / I M A X A V B OO T A VS NA VSPA F BA D I F F OU T A T RBST A C OM P A I LI MA D R O OP A C S C OM P A IO UT A CS SUM A C SPA C S NA 2 1 D E L A Y _P W R G D PU 4 39 38 37 36 35 34 33 32 31 30 29 28 27 C SN2 A_G ND 27 0 p _5 0 V _ X 7 R _ 0 4 44 44 44 P R 22 1 0 _0 4 P R 32 1 0 _0 4 P R 20 1 0 _0 4 CS N 1 44 CS N 2 44 CS N 3 44 P R6 3 P R6 1 1 30 _ 0 4 75 _ 0 4 5 4 . 9 _ 1% _ 0 4 6 H _C P U _S V I D D A T 6 H _C P U _S V I D A L R T# 6 H _C P U _S V I D C L K CS N2 44 CS P2 44 CS N3 44 CS P3 44 CS N1 44 CS P1 44 0 . 0 4 7u _ 1 0v _X 7 R _ 0 4 PR 1 9 5 . 4 9 K _ 1% _ 0 4 5VS P C 31 * 0 _0 4 2 Pha se : 0 ohm 3 Pha se : DNP PR 2 1 0730 modify 0 . 0 4 7u _ 1 0v _X 7 R _ 0 4 5. 49 K _ 1 % _0 4 C SN1 CSN 2 CSN 2 CSN 2 CSP P2 C SN3 CSN 3 C SPP3 CSP P3 CSN 1 CS P P 1 P C 32 P R 23 D RO N 0 . 0 4 7u _ 1 0v _X 7 R _ 0 4 5. 49 K _ 1 % _0 4 D R ON 44 V R 1 _ P W M1 4 4 Sheet 42 of 58 Power V-Core 1 V R 1 _ P W M 3 44 V R 1_ P W M2 4 4 5VS PR2 4 10 K _ 0 4 P R2 7 PR 2 6 75 k _ 1 %_ 0 4 * 0_ 0 4 A_G ND OPTION: DISALBE V_GT A _G ND ICC_ M AX_ 21 h =R *1 0uA*2 56 A/2 V A_G ND P J2 7 * 6 mi l P R 21 9 1 10 K _ 1 % _ 04 A_ G ND A_ G NDA_GN D A_GN D P R6 0 Qua d 4 5W CP U VID 1=0. 9V Ic cM a x = 94 A R_LL= 1. 9m ohm OCP ~12 0A 1 0K _0 4 A_GN D A_GN D C SP1 C SP2 C SP3 P R 25 D02 1.05 VS_VTT 10 0 0 P _ 50 V _ 0 4 P C4 0 P R3 3 A_GN D 14 15 16 17 18 19 20 21 22 23 24 25 26 4 H _ P R O C H OT # 1 TSENSE 2 3 4 H_C PU_SVID DA T H_C PU_SVID CLK 5 H_C PU_SVID ALRT# 6 7 VR _R DY 8 9 10 11 PR5 8 1 0 K_ 0 4 12 13 1 8 7K _ 1 % _ 06 1 8 7K _ 1 % _ 06 1 8 7K _ 1 % _ 06 0804 modify H _ CP U _ S V IDD A T H_ C P U_ S V ID A L RT # H_ CP U_ S V ID CL K P R6 9 3. 3V S * 10 K _ 0 4 1 V R_ O N 2 P R5 4 *6 m il D PJ 4 *1 0 0 K _ 04 P Q 10 * MT N 7 0 0 2Z H S 3 PQ 9 * MT N 7 0 0 2 Z H S 3 V CO RE _ O N S 34 PR7 0 *1 0 K _0 4 *1 5 m li _ s ho rt V R _O N P J3 * 6 mi l 2 G P R6 8 1 4 , 1 5 , 21 , 3 4 A L L _S Y S _ P W R GD 1 D S G P C 51 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 4 , 1 0 , 1 1, 1 2 , 1 3 , 14 , 1 5 , 1 6, 17 , 1 8 , 1 9, 2 0 , 2 1 , 23 , 2 4 , 2 5 , 26 , 2 9 , 3 0, 3 2 , 3 3 , 3 4, 3 5 , 3 6 , 39 , 4 0 , 5 8 3. 3 V S 3 , 4 , 6, 2 4 , 2 5 , 26 , 4 0 1 . 0 5V S _ V TT 1 4, 1 5 , 3 8 , 3 9, 4 0 , 4 1 , 44 , 4 5 , 4 6 V I N 1 4 , 1 5 , 17 , 1 8 , 1 9, 2 5 , 2 6 , 3 0, 3 2 , 3 3 , 35 , 3 9 , 4 4 5V S Power V-Core 1 B - 43 B.Schematic Diagrams A_GN D 10 K _ 0 4 P C3 9 PC 3 8 1 0 00 p _ 5 0V _ X 7 R _ 0 4 A_G ND P R6 2 PUT COLSE TO VCORE HOT SPOT C OM P 0_04 PR3 9 P C 30 CSC OM P P R1 6 V CO RE P R3 5 P R3 6 P R3 7 7 5 K _ 04 CSSU M I M ON 6 ,4 4 0804 modify 1 6 5K _0 6 2 1 K _1 % _ 0 4 1 P R 15 9 PC 4 5 P R 43 10 0 0 p _5 0 V _ X 7R _ 04 PR5 7 6 V CO RE _ V C C_ S E N S E 1 0 0K _N T C _0 6 _ B 2 8 . 2 5K _ 0 4 P R 42 0_04 P C5 5 B~ 3 96 4 A_GN D 1 0 0 p_ 5 0 V _ N P O _ 04 1K _ 0 4 D03 PR5 3 6 V C OR E _ V S S _ S E N S E P C 56 0 . 1 u_ 1 0 V _ X 5 R _ 0 4 *1 0 0 _0 4 P C 53 2 4. 9 _ 1 % _0 4 PR 4 6 F B PR5 5 cha nge to 24 .9 ohm TR BST A_GN D D IFFOU T P R5 5 A _G ND TSENS E PUT COLSE TO VCORE Phase 1 Inductor 2 P R5 0 1 0 _ 0 4 1 I MO N VCORE_1 Schematic Diagrams Power V-Core 2 P Q2 *M D U 26 5 7 VC C S V R E G _S W 1_ L G G 4 PC1 5 5VS HG 8 P WM SW 7 LG 5 VC C 0 . 1u _ 5 0 V _Y 5 V _ 0 6 P R1 3 *1 5 m li _ s ho rt P R1 0 *1 5 m li _ s ho rt CS N 3 43 CS P 3 43 P C2 7 + P C2 9 + P C2 5 + P C2 6 + P C2 2 + P C1 2 P Q4 3 MD U 2 6 54 P Q4 4 MD U 2 6 54 P C1 7 P L2 0 . 3 6 uH _ 13 * 13 *3 . 5 1 2 VR EG_SW2_OU T VC OR E VREG _SW 2_LG P D1 3 G R 25 0 G PAD 9 F MS 30 0 4 -A S -H PR 8 V C OR E 6 , 4 3 2 Pha se: DNP 3 Pha se: 0 ohm * 1 5m i l _s h o rt C S N2 43 C SP2 43 1 4 , 15 , 3 8 , 39 , 4 0 , 4 1, 4 3 , 4 5, 4 6 V I N 1 4, 1 5 , 1 7 , 18 , 1 9 , 25 , 2 6 , 3 0, 3 2 , 3 3, 3 5 , 3 9, 43 5 V S 0804 modify B - 44 Power V-Core 2 P C2 8 + 0 . 1u _ 5 0 V _Y 5 V _ 0 6 P C1 1 S G S V R E G _S W 2_ H G GN D 6 EN 6 ,4 3 P C3 3 + A 4 9 . 9 _1 % _ 04 N CP 5 9 1 1 D 3 G D P Q5 *M D U 26 5 7 D P Q6 MD U 2 6 57 S D R ON 0 . 22 u _ 10 V _ X 7R _ 06 D 43 2 P R5 F MS 30 0 4 -A S -H P C6 + P R4 *0 _ 04 V R 1 _ P W M2 V CO RE G S 43 PC 1 BST VCO RE P D1 4 G VIN 1 D02 P C3 4 + P L3 0 . 3 6 uH _ 13 * 13 *3 . 5 1 2 V R E G_ S W 3 _ LG PC1 cha nge to 0 60 3 Siz e a nd X7R Type PU 1 V CO RE *3 30 u _ 2. 5 V _ 9 m _6 . 3 *6 5 P Q4 6 MD U 2 6 54 6 ,4 3 33 0 u _2 . 5 V _ 9m _ 6 . 3 *6 6 S S P Q4 5 MD U 2 6 54 9 2 . 2_ 0 6 43 *3 30 u _ 2. 5 V _ 9 m _6 . 3 *6 LG V R E G_ S W 3 _ OU T PAD P R3 CS P 1 33 0 u _2 . 5 V _ 9m _ 6 . 3 *6 GN D V R E G_ S W 3 _ H G 7 5VS Re se rve fo r 2 Ph ase * 1 5m i l _s h o rt P C5 33 0 u _2 . 5 V _ 9m _ 6 . 3 *6 3 4 9. 9 _ 1 %_ 0 4 E N 4 VC C 8 *4 . 7 u _2 5 V _ X 5 R _ 0 8 PR3 cha nge to 0 60 3 Siz e SW *4 . 7 u _2 5 V _ X 5 R _ 0 8 PC1 6 5VS HG P WM 1 5u _ 2 5V _6 . 3 *4 . 4 PR 6 43 A D R ON BST S 43 2 G S V R 1 _ P W M3 G N CP 5 9 1 1 *4 . 7 u _2 5 V _ X 5 R _ 0 8 D P Q4 *M D U 26 5 7 P C1 0 *4 . 7 u _2 5 V _ X 5 R _ 0 8 VIN 0 . 22 u _ 10 V _ X 7R _ 06 P C9 1 5 u _2 5 V _ 6 . 3* 4. 4 PC 2 D PU 2 CS N 1 C 2 . 2_ 0 6 * 1 5m i l _s h o rt C P R2 V C OR E 6 , 43 A P R9 P C7 + PC 2 c ha nge t o 06 03 Si ze a nd X7 R Ty pe 1 43 P R1 2 F MS 3 0 04 -A S -H 9 PR 2 c hange t o 06 03 Si ze 2 . 2u _ 6 . 3V _X 5 R _0 6 Sheet 43 of 58 Power V-Core 2 VCO RE P D1 5 G S 2 . 2u _ 6 . 3V _X 5 R _0 6 PC1 8 5 PAD P Q3 MD U 2 6 57 2 . 2u _ 6 . 3V _X 5 R _0 6 B.Schematic Diagrams LG PQ 4 7 M D U 26 5 4 33 0 u _2 . 5 V _ 9m _ 6 . 3 *6 4 5VS P Q4 8 MD U 2 6 54 GN D 6 EN PL 4 0 . 36 u H _ 1 3 *1 3 *3 . 5 1 2 V R E G_ S W 1 _ OU T 3 3 0 u_ 2 . 5 V _ 9m _ 6 . 3 *6 3 4 9 . 9 _1 % _ 04 7 3 3 0 u_ 2 . 5 V _ 9m _ 6 . 3 *6 P R7 SW D D R ON P WM G V R E G _S W 1_ H G S 43 2 8 D V R 1 _ P W M1 HG D 43 G N CP 5 9 1 1 BST S 1 D PU 3 PR1 cha nge to 0 60 3 Siz e P C4 0 . 1u _ 5 0 V _Y 5 V _ 0 6 PQ 1 M D U 26 5 7 1 5u _ 2 5V _6 . 3 *4 . 4 0 . 22 u _ 10 V _ X 7R _ 06 P C1 4 C PC 3 D 2 . 2_ 0 6 D P R1 P C1 3 *4 . 7 u _2 5 V _ X 5 R _ 0 8 P C8 + PC 3 c ha nge t o 06 03 Si ze a nd X7 R Ty pe * 4 . 7u _ 2 5V _ X 5 R _0 8 VIN VCORE_2 Del PC21 Schematic Diagrams 4 . 7u _ 2 5V _ X 5 R _ 0 8 4 . 7 u_ 2 5 V _X 5 R _0 8 4. 7 u _ 25 V _ X 5 R _ 08 4 . 7u _ 2 5V _ X 5 R _ 0 8 4 . 7 u_ 2 5 V _X 5 R _0 8 PC1 4 1 P C 13 0 PC1 2 9 PC1 4 6 P C 14 7 P C 1 3 1 4 . 7u _ 2 5V _ X 5 R _ 0 8 4 . 7 u_ 2 5 V _X 5 R _0 8 C 40 8 10 0 0p _ 5 0V _ X 7 R _ 0 4 4 P C 1 27 1u _ 2 5V _ 0 8 P C 13 9 S GN D 5 P R 1 5 0 *0 _0 4 PR1 4 9 *0 _0 4 P C 13 7 0 . 1 u_ 5 0 V _Y 5 V _0 6 VA B A T _V O LT 3 4 B PR1 5 4 30 9 K _ 1% _ 04 P R 14 1 P C 19 2 0 . 1 u_ 1 6 V _Y 5 V _0 4 32 31 30 29 28 27 26 25 MB 3 9 A 1 32 P Q3 9 MT N 70 0 2Z H S 3 P R 14 2 10/26 VD D3 P Q7 7 1 0 0K _ 1 % _0 4 P R 1 99 S GN D 5 34 T o t al _ C U R _ S E L S PR1 3 8 * MT N 7 0 02 Z H S 3 C TL P C 1 33 FOR EMI 39 . 2 K _ 1% _ 04 0. 1 u _1 6 V _ Y 5 V _ 04 P C1 8 4 S GN D 5 S GN D 5 P R1 5 1 P R 2 03 1 K _1 % _ 04 10 0 K _1 % _ 04 V S H G_ S E L 3 4 * 10 m li _ s ho rt P C1 3 5 PR2 0 6 P R 2 02 *4 7p _ 5 0V _ N P O_ 04 PR2 0 8 1 0K _ 1 % _0 4 49 . 9 K _ 1% _ 04 1 0 2 K _1 % _ 04 D A C / B A T L # 14 S GN D 5 P C 18 8 P Q3 4 M T N 7 00 2 Z H S 3 G P R 2 07 4 . 7K _1 % _0 4 3 3 00 P _ 5 0V _ X 7 R _ 04 S GN D 5 TO TA L _ C U R P Q 40 PC1 8 5 2 20 0 p _5 0 V _ X7 R _ 0 4 S 34 P R 13 9 S GN D 5 3 4 ,3 5 D A C_ IN# P R1 4 5 VA 1 M_ 0 4 P Q3 5 MT N 7 0 02 Z H S 3 A C_ IN G C E SG ND5 S C E LL S P R2 1 2 0_ 0 4 G P R 1 52 1 0 K _ 04 0730 modify 2M _ 1% _ 04 V OL T -S E L 7 6. 8 K _ 1 %_ 0 4 V D D3 A C_ IN P R2 0 9 1 00 p _5 0 V _ N P O _0 4 P C 1 86 *1 0 K _ 04 38 Sheet 44 of 58 AC_In, Charger 0. 1 u _5 0 V _ Y 5 V _ 06 PR1 5 3 PC1 3 6 V O LT -S E L 4 7 0K _ 1 % _0 4 P R2 0 1 10/26 G 24 23 22 21 20 19 18 17 33 PC1 1 7 0. 0 1 u _1 6 V _ X7 R _ 0 4 D S *1 0 0K _ 1 % _0 4 V IN CT L 1 G ND VRE F R T C S A DJ 3 BATT S G ND 0. 1 u _5 0 V _ Y 5 V _ 06 D 6. 0 4 K _ 1% _ 0 4 P R 24 6 G TRERMAL PAD P C1 3 4 S D 1 0 K _1 % _ 04 SY S3 V VA MT N 7 0 02 Z H S 3 P R 2 13 *0 _ 0 4 P R2 1 4 VC C -I N C 1 + IN C1 AC IN A C OK -I N E 3 AD J 1 C OM P 1 C T L2 CB O U T -1 LX VB O U T -2 P GN D C E LL S 1 2 3 4 5 6 7 8 -I N E 1 OU T C 1 OU T C 2 + IN C2 -I N C 2 AD J 2 C O MP 2 C OM P 3 P R 21 5 3 0 K _1 % _ 04 P U1 0 9 10 11 12 13 14 15 16 0 . 1 u_ 5 0V _Y 5 V _ 0 6 P Q7 0 P D T A 1 14 E U C P C 1 21 0 . 1u _ 5 0V _ Y 5 V _ 06 E BAT C 40 7 0. 1 u _ 50 V _ Y 5 V _ 06 C A P D 1 9 R B 0 5 40 S 2 C E LL S P C 1 20 P C 14 0 0 . 1 u_ 5 0 V _Y 5 V _ 0 6 PC1 3 8 5 6 8 P R 1 46 *1 0 mi l _s h o rt P Q3 6 B P D 1 5 03 Y V S 0 . 1 u_ 5 0 V _Y 5 V _ 0 6 P R1 4 4 0 _0 4 * 10 m i _l s ho rt B AT BAT 0. 1 u _ 50 V _ Y 5 V _0 6 PR1 4 3 0_ 0 4 3 P R 1 47 P R 15 6 0 . 0 2_ 1 % _3 2 3A S G N D 5S GN D 5 P R 14 0 P R 2 00 D 2 0 0K _ 1 % _0 4 B P Q6 8 D TA 1 1 4E U A P R 20 4 P Q6 9 MT N 7 0 02 Z H S 3 1 M_ 1 % _0 4 1 0 0K _0 4 34 34 34 S G P L1 5 P L1 4 P L1 3 H C B 10 0 5 K F -1 21 T 20 H C B 10 0 5 K F -1 21 T 20 H C B 10 0 5 K F -1 21 T 20 B att er y Vo lt ag e: 12 V~ 16 .8V D SYS3 V S MC _ B A T S MD _ B A T B A T _D E T P Q6 5 MT N 7 0 0 2Z H S 3 G D P R 21 1 M TN 70 0 2 Z H S 3 S P Q 41 V IN P C 1 91 3 0 p _5 0 V _ N P O_ 0 4 30 p _5 0 V _ N P O _0 4 3 0 p _5 0 V _ N P O_ 0 4 S G ND 5 P R1 5 5 1 G P C 19 0 X5100B T J-0 7 A P 0 G-S D 00 1 S 1 M_ 0 4 1 2 3 4 5 6 7 M T N 7 00 2 Z H S 3 X7 100 B TJ -07 DT 0B_ 10 080 3 *1 5 m li _ sh o rt S G ND 5 PJ 1 2 * 1m m PC1 2 2 P C 12 5 P C1 2 6 P C1 2 3 2 C H G_ E N S 34 1 M_ 04 G 1 0 0K _ 0 4 D P R 21 6 P R 20 5 MT N 70 0 2Z H S 3 D P R2 1 0 P Q4 2 S Y S 3V P C1 8 1 P Q6 7 S G C TL 3 4 C E L L _C ON TR OL 0 . 0 1u _ 50 V _ X 7 R _ 0 4 P C 1 89 1 0 0K _ 0 4 J B A T TA 1 0. 1 u _ 50 V _ Y 5 V _ 06 0. 1 u _ 50 V _ Y 5 V _ 06 0 . 1 u_ 5 0V _Y 5V _ 0 6 0. 1 u _ 50 V _ Y 5 V _ 06 39 VA 3 8 ,3 9 SYS5 V 1 9, 2 9 , 3 4, 3 5 , 3 6, 3 8 , 39 V D D 3 1 4 , 15 , 3 8, 3 9 , 4 0, 4 1 , 4 3, 4 4 , 4 6 V I N AC_In, Charger B - 45 B.Schematic Diagrams P C1 2 4 PR 1 5 1 0 0 K _0 4 P Q 37 ME 4 4 25 P L1 2 B C I H P 0 7 3 5-6 R 8 M -N L P C 1 3 2 4. 7 u _ 25 V _ X 5 R _ 08 4 1 0 K _ 1% _ 04 D02 0 . 1 u _5 0 V _ Y 5V _ 0 6 P R 1 97 PR1 4 20 0 K _ 1% _ 04 5 6 7 8 P C 12 8 PQ 7 8 ME 44 2 5 7 3 6 2 5 1 0 . 1 u_ 5 0 V _Y 5 V _0 6 P C 1 1 5 4 . 7u _ 25 V _ X 5 R _ 0 8 PC2 4 0 _ 04 P Q3 6 A P D 1 50 3 Y V S 2 1 7 P C 1 14 4 . 7 u _2 5 V _ X 5R _ 08 PR1 1 0. 0 1 _ 1% _ 32 P R 14 8 P Q 38 ME 4 4 25 0 . 1 u _1 6 V _ Y 5V _ 0 4 P C1 9 0 . 1 u _5 0 V _ Y 5 V _0 6 10 K _ 0 8 0. 1 u _5 0 V _ Y 5 V _ 06 3 2 1 4 1 3 0K _1 % _0 4 P C2 0 0. 0 1 _ 1% _ 32 P R1 5 8 P Q 49 ME 44 2 5 8 7 6 5 P R 1 98 2 MJ -34 3 2 -00 7 P R1 5 7 VA C ha rg e C ur ren t : 3 .0 A C ha rg e V ol tag e 16. 8V T ot al Po we r : 2 00W 5 6 7 8 1 2 3 P C 11 8 4 . 7 u_ 2 5 V _X 5 R _ 0 8 VA 1 2 3 4 0 . 3 3u _ 1 6V _ Y 5 V _ 06 PL 1 H C B 4 5 32 K F -8 0 0T 6 0 JA C 1 X7100 V IN 4 2 D C -G2 13 -B 4 9 1 2 3 3 2 1 4 8 7 6 5 PL 5 H C B 4 5 32 K F -8 0 0T 6 0 GN D 1 GN D 2 P C 23 X5100 1 2 G ND G ND P Q 72 ME 44 2 5 D02 J _D C -J A C K 1 4 AC_In, Charger Schematic Diagrams Power 0.85VS 5V P C 1 50 P R 1 68 1 0 K _ 04 0 . 02 2 u_ 1 6 V _X 7 R _ 0 4 0 .9 V (Set0) 0 .8V (Set2) 0. 72 5V (Set1) 0.6 75V (Set3) 0 0 1 1 0 .85 V S _ P W R GD 2 1 V IN P R 1 79 9 . 3 1K _ 1 %_ 0 4 PR1 8 8 12 K _ 1% _ 0 4 P R 1 80 1 0 K _1 % _0 4 P D1 D03 C R B 0 54 0 S 2 P R1 7 7 V CCS A _ S E N S E 7 1 0 0 _0 4 P C 1 49 P U1 1 u P 61 2 2 P R 1 82 1 0 K _1 % _0 4 6 7 8 9 10 S E T3 S E T2 S E T1 S E T0 FB 21 20 19 18 17 16 P C1 5 5 P R1 7 3 0_ 0 4 P R 1 85 10 0 _0 4 3 47 p _ 50 V _ N P O _0 4 7 V C C S A _ V ID 0 7 V C C S A _ V ID 1 P C1 9 4 1u _ 25 V _ 0 8 P Q8 B P D 1 50 3 Y V S P R 17 0 1 2 K _1 % _0 4 P C1 5 2 P R 16 7 V 0 .8 5 PJ 1 4 OP E N -5m m 1 2 0. 8 5 V S P C 14 4 3 3 K _1 % _0 4 0730 modify 0 .1u _ X 7R _2 5 V _ 06 C SN 0730 modify P C 1 54 C SP P R1 7 6 1. 3 K _ 1 %_ 0 4 *0 . 1u _ 1 6V _ X 7 R _ 0 6 0730 modify 1 0 0K _1 % _0 4 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 P R1 7 5 0 . 8 5V _ O N P C1 5 1 P R 18 3 *0 _0 4 4 C SN 22 _ 0 4 0 .01 u _ 16 V _ X7 R _0 4 P R 18 6 6A P C1 4 5 + P R 17 1 0 _ 04 C SP 11 12 13 14 15 1 K _1 % _ 04 PL 7 1 .0U H _ 6 .8* 7.3 * 3.5 1 2 0. 1u _ 50 V _ Y 5 V _ 06 GN D PHASE LG VC C R T CS P 56 0 u_ 2 . 5 V _6 . 6 *6 . 6 *5 . 9 P R 1 84 EAP SS P OK UG B O OT 15 K _ 1% _ 0 4 COM P V ID 0 V ID1 E N/P S M C SN PR1 9 0 0730 modify P Q8 A P D 1 5 0 3Y V S 8 0 . 1 u_ 1 6V _ Y 5 V _ 04 1 0 K _1 % _0 4 1 2 P R 1 81 7 10 K _ 1% _ 0 4 5 4 3 2 1 PR1 8 9 5 6 10/26 Sheet 45 of 58 Power 0.85VS P C 15 3 P R 1 78 V C C S A _S E N S E 7 0_04 5V 5V P R 1 72 1 0 0K _ 0 4 P R1 6 9 10 0 K _0 4 3 0 . 85 V _ ON 4 1 D P C1 4 8 1 u_ 6 . 3 V _X 5 R _ 0 4 B - 46 Power 0.85VS S MT D N 7 0 0 2Z H S 6 R P J1 5 *1 mm 2 4 0 1.0 5 V S _ V TT _ P W R G D P Q5 0 M T N 7 00 2 Z H S 3 G D P Q 5 1B 5G S B.Schematic Diagrams 0 . 1 u _5 0 V _Y 5 V _ 0 6 9. 3 1 K _1 % _ 04 4 . 7 u_ 2 5V _ X 5 R _ 0 8 PR1 8 7 A 10/26 5V 0 _0 4 P C 36 P R1 7 4 0730 modify P C 1 43 1 0. 1 u _ 50 V _ Y 5V _0 6 0 4 . 7u _ 25 V _ X 5 R _ 0 8 1 P C3 7 0 P OK VC CSA _VI D1 PC1 4 2 VC CSA _VI D0 0 . 85 V S V IN 5 V 2 6, 28 ,3 2, 3 5 , 3 7,3 9 , 40 , 4 1 ,42 7 14 , 1 5, 3 8 , 3 9,4 0 ,4 1, 4 3 , 44 , 4 5 Schematic Diagrams Audio Jack USB PORT A _ U S B V CC A _ US B V C C AL 9 H C B 16 0 8 K F -1 21 T 2 5 A _ US BV C C2 60 mil 50 mil + A C 17 A C 15 AC 1 4 0 . 1 u_ 1 6 V _Y 5V _0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 1 0 u _1 0 V _ Y 5 V _ 08 A C2 A C1 1 1 00 u _ 6. 3 V _ B 2 0. 1 u _ 16 V _ Y 5 V _ 0 4 A J _ USB 1 1 A GN D 2 A U S B _P P 0_ R 3 V+ D A TA _ L GN D 1 GN D 3 A US B _ PP 0 1 2 * W C M 20 1 2 F 2S -16 1 T0 3 -s ho rt U S 0 40 3 6 B C A 0 8 1 GN D 2 4 AL 7 GN D 1 A US B _ PN0 GN D 2 D A TA _ H 4 Sheet 46 of 58 Audio Jack A GN D A G ND A L I NE _S E N S E A J _ L INE 1 AUDIO JACK 5 4 3 6 2 1 AL 6 F C M1 0 0 5K F -12 1 T0 3 A L I N E -R AL 5 A _ US BV C C A L I N E -L F C M1 0 0 5K F -12 1 T0 3 A J _ A U D I O1 1 3 5 7 9 11 13 15 17 19 A M I C 1 -R A M I C 1 -L A H E A D P H ON E -R A H E A D P H ON E -L H P _P L U G A _ 5V S 2 4 6 8 10 12 14 16 18 20 2 S J -T 35 1 -0 18 AJ D_ S EN SE A A L I NE - R A L I NE - L AJ D_ S EN SE B ASID E_ R ASID E_ L ASPD IF O AC 9 1 0 0 p_ 5 0V _0 4 A J _ SP DIF 1 A S IDE _ L A S IDE _ R A L8 A L1 1 AU SB_ PP0 AU SB _ P N0 A C 16 AC 1 8 A_ 5 VS 6 8 0 p_ 5 0 V _X 7 R _ 0 4 6 8 0p _ 50 V _ X 7R _ 04 H C B 1 6 0 8K F -1 2 1 T2 5 A B C A _ A UD G A S P DIF O A L 10 A G ND D03 1 2 3 4 5 H CB 1 6 08 K F -1 2 1T 2 5 H CB 1 6 08 K F -1 2 1T 2 5 AS ID E _ S E NS E 8 8 10 7 -2 00 0 1 A _ AUDG AC 1 0 A _ A UDG 1 0 0 p_ 5 0V _0 4 A _ A U DG A_ A UD G DR IV E IC TX T OJ -0 0 15 S T R 2 -2 -H4 -P A 9 T -J A C7 *0 . 1u _ 1 6V _ Y 5V _ 0 4 A R 11 * 22 0 _0 4 A _ A UD G A C1 9 1 8 0 p_ 5 0 V _N P O_ 0 4 A _ AUD G A _A U D G AM IC_ SE NS E A J _M I C1 A JD _S E NS E A A JD _S E NS E B AR AR AR AR 10 9 7 8 1 0K _1 % _0 4 2 0K _1 % _0 4 3 9. 2 K _ 1 % _0 4 5 . 1K _1 % _ 04 A LI N E _ S E N S E A MI C _S E N S E A HP_ S E NS E A S IDE _ S E N S E A MI C 1 -R AL 4 H C B 1 60 8 K F -1 2 1T 2 5 A MI C 1 -L AL 1 H C B 1 60 8 K F -1 2 1T 2 5 5 4 3 6 2 1 AC 6 1 0 0p _ 5 0V _ 0 4 MIC IN 2S J-T 3 5 1-0 1 8 AC 3 1 0 0 p_ 5 0V _0 4 A _ AU DG A _ AUD G D03 A_ A UD G A HP _ S E NS E A J_ H P 1 A H2 H 8 _0 D 2_ 8 A _A U D G AH 1 H 8 _0 D 2 _ 8 HP_ P L UG D03 A H E A D P H O N E -R A R5 10 0 _ 04 A H E A D P H O N E -L A R4 10 0 _ 04 AR 3 AR 6 2 2K _0 4 2 2 K _ 04 AL 3 F C M1 0 0 5K F -12 1 T0 3 AL 2 F C M1 0 0 5K F -12 1 T0 3 5 4 3 6 2 1 AC 5 A C4 1 0 0 p_ 5 0V _0 4 10 0 p _5 0 V _ 04 2S J -T 3 51 -0 1 8 AR 2 * 1K _ 0 4 AR 1 * 1K _ 0 4 A GN D A_ A UD G A_ A UD G A GN D A C1 0 . 1 u _1 6 V _ Y 5 V _ 04 A C1 3 0 . 1 u _1 6 V _ Y 5 V _ 04 A C1 2 0 . 1 u _1 6 V _ Y 5 V _ 04 A C8 0 . 1 u _1 6 V _ Y 5 V _ 04 A _ A UDG A _ A UD G D03 A _ A U DG A _ A UD G A _ AUD G A _ AUD G Audio Jack B - 47 B.Schematic Diagrams D03 A G ND A U S B _P N 0 _R Schematic Diagrams X5100 ODD Board O_5V S B.Schematic Diagrams EOD D_ED TEC T# EOD D_D A# D02 Sheet 47 of 58 X5100 ODD Board OJ _ODD 1 S1 S2 S3 S4 S5 S6 S7 P1 P2 P3 P4 P5 P6 OC 4 OC 5 0. 01u_16V_X7R _04 0. 01u_16V_X7R _04 OSA TA _TXP0 OSA TA _TXN0 OC 6 OC 7 0. 01u_16V_X7R _04 0. 01u_16V_X7R _04 OSA TA _R XN0 OSA TA _R XP0 OGN D OS ATA _R XN 0 OSATA_R XP 0 OGN D O_5V S EOD D _D A# FP->AT13035BAA089 C990326 OH 1 OH 2 OH 3 OH 4 OH 5 H8_0D2_8 H8_0D 2_8 H 6_5D 2_5 H 3_5D 1_8 H 3_5D 1_8 B - 48 X5100 ODD Board OSATA_TXP 0 OS ATA_TXN 0 EOD D _E DTEC T# O_5VS OC3 OC 1 0.1u_16V_Y5V_04 *10u_10V_08 OGND OGN D OJ _SA TA _H OD D1 1 1 3 3 5 5 7 7 9 9 11 11 13 13 15 15 17 17 19 19 C 1952 OGN D OGN D 2 4 6 8 10 12 14 16 18 20 OGN D SLS -13SBXG-SD 001 OGN D 2 4 6 8 10 12 14 16 18 20 OGN D OGN D OC 2 0.01u_16V _X7R _04 X5100M ONLY Schematic Diagrams X5100 Click Board CSW1~2 T+ 5 VS T C1 7 0. 1 u _ 16 V _ Y 5 V _ 04 T +5 V S T J_ T P B 1 1 2 3 4 5 6 0 . 1 u _1 6 V _ Y 5 V _ 04 1 3 TSW 1 T 4 B J B 16 -Q T GT P _ CL K T GT P _ DA T A T TP B U T TO N _ L T TP B U T TO N _ R 2 4 1 3 TT P B U TT O N _ R TSW 2 T 4 B JB 16 -Q 5 6 TC 1 TU S B _ P N 1 0 T US B _ P P 1 0 T G ND T J _ TP 1 T G TP _ C LK T GT P _ D A T A LIFT KEY RIGHT KEY F CR 1 *3 2 m il _ sh o rt 10 9 8 7 6 5 4 3 2 1 4 3 2 1 2 4 TT P B U TT ON _ L 5 6 T 3 . 3V 8 52 0 1 -06 0 51 * 32 m i l_ s h ort T GN D T R 1 4 T E S D _G N D 8 52 0 1 -10 0 51 T GN D T GN D T GN D 6-20-94A20-110 T GN D T GN D T 3 . 3V TU 1 T3 . 3 V TC 12 TC 5 T C9 1u _ 6. 3 V _ Y 5 V _ 0 4 1u _ 6 . 3V _ Y 5V _ 0 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 T R1 1 *4 . 7 K _ 04 T MI S O T R1 0 *4 . 7 K _ 04 T MO S I T R1 3 4 . 7K _ 0 4 5 2 1 6 T MOS I T MI S O T MC S T MC L K T 3. 3 V B5 T US B _ CO NN B1 1 T B DRI V E 1 B1 0 T B DRI V E 2 A5 TBEZEL 1 B DR IV E 2 *0 . 1 u_ 1 6V _Y 5V _0 4 4 B 9 C 2 A7 N C2 C5 TBEZEL 2 BEZEL 2 A N C3 TC 6 1 u _ 6. 3 V _ X 5R _ 04 TC 1 6 2 2 p _5 0 V _ N P O _0 4 T 3. 3 V T GN D TBEZEL 1 The pat h be mark ed in T P D_ RE G T B DR IV E 1 TR 9 1 00 _ 1% _ 0 4 1 T B DR IV E 2 TR 12 1 00 _ 1% _ 0 4 2 3 TBEZEL 2 TR 3 3 3 0 K _0 4 TC 7 1 u _ 6. 3 V _ X 5R _ 04 R C L A M P 05 0 2 B T 3. 3 V nee ds t o be desig n t o b e s hort and at low impedan ce. C7 T C1 4 T E S D _ GN D A1 0 T R E G_ O U T C1 0 3 3 p_ 5 0 V _N P O_ 0 4 TA V D D A V DD A3 C3 A1 T R1 T C3 1 u _1 0 V _ 06 T C1 5 1 u _ 10 V _ 0 6 0 . 1 u_ 1 6 V _Y 5V _0 4 A1 1 C9 T GN D A4 T P D_ RE G T G ND TU S B _ P N _ R TR 6 2 7 . 4 _1 % _0 4 T GN D T U S B _ P N 10 TC 11 47 p _5 0 V _ NP O _0 4 B2 T MC S C6 T MI S O B4 T MOS I B3 T MC L K MI S O MO S I MC L K B1 U S B _ DN T GN D T X IN TR 5 4 7 0 _0 4 1 M _0 4 T GN D 2 T US B _ P P _ R T NRE S E T 3 4 TX1 H S X 5 31 S _ 1 2M H Z NR E S E T C4 C1 1 T R E F _ OS C A8 T XI N X TA L I N C8 2 7 . 4 _1 % _0 4 TU S B _ P P 1 0 TC 13 HSX531S+-20ppm T C8 18 p _ 50 V _ NP O _ 04 T H2 H 10 _ 0 D 5 _ 5 1 8 p_ 5 0V _N P O_ 0 4 T H1 H 1 0 _ 0D 5 _5 T G ND T GN D T GN D D GN D 2 A6 1 . 5 K _ 1% _ 0 4 TR 7 47 p _5 0 V _ NP O _0 4 TC 4 T GN D A G ND TR 8 TU S B _ P P _R T GN D R E F _ OS C B6 T GN D T GN D D GN D 1 TU S B _ C ON N 1 T X OU T A2 T XI N _ R TR 4 T US B _ P N_ R C1 US B _ D P T XO U T X TA L OU T TCS5XF T G ND T GN D T GN D 2 . 2_ 1 % _0 6 T C2 T3 . 3 V DV DD 1 MC S T R E G _O U T T GN D E S D _ GND 2 P D _ RE G T A V DD T GN D E S D _ GND 1 E S D _ GND 3 T G ND 951206 R E G_ OU T DV DD 2 HO L D# *M 95 1 28 W M N 6 T P T GN D BEZEL 2 B N C4 4 7 K _ 04 The TESD_GND trac e has t o be w ide (> 2 0mil) BEZEL 1 B E S D _ GND 4 B 8 T RE F _ O S C TR 2 Sheet 48 of 58 X5100 Click Board 7 V SS T G ND TC 1 0 TU 2 BEZEL 1 A N C1 A 9 B 7 3 D02 T GN D T NR E S ET B DR IV E 1 V DD W P# TP U 1 U S B _ CO N N E C T 8 S Q C S# S CK T GN D X5100M ONLY X5100 Click Board B - 49 B.Schematic Diagrams I t is s trongly re commende d t hat the TESD_ GND h as a de dic ate d c onnec tio n t o the s yst em chas sis or c able s hie ld. Schematic Diagrams X5100 LED 1 Board LLED_ACIN LLED_BAT_FULL LR4 85204-05001 LR1 220_04 220_04 1 3 220_04 1 220_04 LR2 3 LR3 LED_GND LD1 4 KPB-3025YSGC KPB-3025YSGC 4 Y SG LD2 2 LLED_ACIN LLED_PWR LLED_BAT_CHG LLED_BAT_FULL Y SG Sheet 49 of 58 X5100 LED 1 Board 1 2 3 4 5 LLED_BAT_CHG LED_GND 2 B.Schematic Diagrams LJ_LED1 LLED_PWR LED_GND LED_GND LED_GND AC IN/POWER ON LED LH1 H6_0D2_3 LED_GND B - 50 X5100 LED 1 Board BAT CHARGE/FULL LED Schematic Diagrams X5100 LED 2 Board L2_3.3VS LED L2J_LED1 L2S AT A_L ED # L2B T_EN L2W LAN _E N L2_W LA N_LE D# L2_3.3V S L2 _3.3VS Sheet 50 of 58 X5100 LED 2 Board L2_3.3V S D02 85201-06051 L2GN D L2R3 HDD/CD-ROM LED 220_04 L2R1 L2 R2 220_04 22 0_04 A D03 L2D1 L2D 3 KP -2012PB C-A K P -20 12P BC -A L2D2 KP -2012PB C-A L2B T_E N B C L2_W LAN _LE D# C C 0_04 C L2R 4 D03 C L2H 1 L2 H2 H 6_0D2_ 3 H 6_0D2_ 3 A A D03 L2W LA N_E N B L 2GND L2GND L2GN D L2Q 1 *DT C114EUA D03 E L2Q2 DT C114E UA E L2S AT A_LED # L2 GND X5100 LED 2 Board B - 51 B.Schematic Diagrams 6 5 4 3 2 1 Schematic Diagrams X5100 LED 3 Board L3_3.3VS L3_3.3VS L3R1 220_04 220_04 220_04 L3D3 KP-2012PBC-A SCROLL LOCK LED D03 L3LED_SCROLL# L3H2 L3H1 H6_0D2_3 H6_0D2_3 L3_GND L3_GND B - 52 X5100 LED 3 Board L3D2 CAPS LOCK LED L3D1 KP-2012PBC-A D03 L3LED_CAP# NUM LOCK LED KP-2012PBC-A C D02 A L3R2 A 85201-06051 L3_3.3VS L3R3 A Sheet 51 of 58 X5100 LED 3 Board L3LED_NUM# L3LED_CAP# L3LED_SCROLL# L3_3.3VS C 6 5 4 3 2 1 C B.Schematic Diagrams L3J_LED1 D03 L3LED_NUM# Schematic Diagrams X7100 HDD & ODD Board H J _OD D 1 S1 S2 S3 S4 S5 S6 S7 0.0 1u_16V _X7R _ 04 0.0 1u_16V _X7R _ 04 H S A TA_T XP0 H S A TA_T XN 0 HC1 4 HC1 3 0.0 1u_16V _X7R _ 04 0.0 1u_16V _X7R _ 04 H S A TA_R XN 0 H S A TA_R XP 0 HG ND H _5V S H _EO D D _ ED TEC T# H _EO D D _ D A # H _5V S H _E OD D _E D TE C T# H _5VS H _3. 3V S H _E OD D _D A # FP->AT13035BAA089 C990326 C 185 94-11305-L 2 4 6 8 10 12 14 16 18 20 2 4 6 8 10 12 14 16 18 20 C 1952 H J _SA TA _H O D D 1 1 1 3 3 5 5 7 7 9 9 11 11 13 13 15 15 17 17 19 19 H GN D H SA TA _TXP 0 H S AT A_TX N 0 H SA TA _R X N 0 H S A TA _R XP 0 H SA TA _TXP 1 H SA TA _TXN 1 H SA TA _R XN 1 H SA TA _R XP 1 HG ND HG ND Sheet 52 of 58 X7100 HDD& ODD Board D02 H J _H D D 1 S1 S2 S3 S4 S5 S6 S7 HC 5 HC 6 0. 01u_16V _X7R _04 0. 01u_16V _X7R _04 H S A TA_T XP1 H S A TA _TXN 1 HC 7 HC 8 0. 01u_16V _X7R _04 0. 01u_16V _X7R _04 H S A TA_ R XN 1 H S ATA _R XP1 X7100M ONLY H H3 H H2 H H1 H 7_0D 2 _8 H 7_0D 2 _8 H 6_0D 2_ 3 H _3. 3V S P1 P2 P3 P4 P5 P6 P7 P8 P9 P 10 P 11 P 12 P 13 P 14 P 15 H C 11 H C 10 HG ND HG ND HG ND * 10u_10V _08 * . 01u_16V _04 H _5V S H GN D H GN D HC9 H C4 H C 17 H C 12 HC 2 0.1 u_16V _Y 5V _04 0. 1u_ 16V_ Y 5V _04 0. 1u_16 V_Y 5V _04 1u_6. 3V _X5R _04 10u_10V _Y 5V_ 08 HC1 H C3 100u_6. 3V _B 2 * 22u_6. 3V _12 + SG 41718522F B 0X0R A 4 P I N G N D 1 ~2 = G N D H GN D H GN D X7100 HDD & ODD Board B - 53 B.Schematic Diagrams P1 P2 P3 P4 P5 P6 HC1 6 HC1 5 Schematic Diagrams CIR CIR _VD D5 C J_CIR 1 4 C IR_R X_R 3 2 1 85204-04001 CIR_ GND B.Schematic Diagrams C J_CIR 2 4 3 2 1 85204-04001 Sheet 53 of 58 CIR D03 CIR CIR _V DD5 C H4 CH2 H 6_0D2 _3 H6_0D 2_2 R629 C U1 1 00_04 D02 V C C2 C C4 C IR_G ND CIR_G ND G O 0 .1 u_16V _Y 5V _04 C IR_G ND 10u_1 0V_ Y 5V _08 V GN D2 G GN D1 GND 2 GND 1 O IRM-V 038/TR 1 C IR _GND B - 54 CIR C IR_R X_R C IR_G ND Schematic Diagrams X7100 LED Board L4_3.3VS L4_VDD3 L4_3.3VS D03 X7100 L4R5 L4R6 L4R7 220_04 220_04 220_04 PT3661G-BB A 0. 1u_16V_Y5V_04 A 3 L4_3.3VS L4_LI D_SW# A L4_C1 D02 L4_WLAN_LED# L4_SATA_LED# L4_BT_EN L4_WLAN_EN L4_LED_NUM# L4_LED_CAP# L4_LED_SCROLL# L4_M_BTN# L4_3. 3VS L4_U2 2 VCC OUT GND 1 L4D3 L4D4 L4D5 KP-2012SGC KP-2012SGC KP-2012SGC L4_LED_SCROLL# C L4_VDD3 C L4_LID_SW# C L4GND L4_LED_CAP# L4_LED_NUM# 87151-15051 L4GND L4_WLAN_LED# Sheet 54 of 58 X7100 LED Board D02 L4R1 0_04 L4R8 HDD/CD -ROM LED L4R9 HCH_STS-02 220_04 20mil L4_M_BTN# 20mil L4R10 L4R11 220_04 220_04 A 1 2 100_04 L4C1 A L4_SW1 4 3 L4_3.3VS L4D6 *0. 1u_16V_04 L4D7 L4D8 KP-2012SGC KP-2012SGC KP-2012SGC C White C L4_BT_EN B L4Q1 *DTC114EUA E L4_WLAN_EN B L4_SATA_LED# L4GND L4Q2 DTC114EUA E L4D9 KP-2012SGC C C A C L4GND L4GND A 20mil POW ER BUTT ON L4_3.3VS L4_3.3VS C L4_3. 3VS PO WER SW ITCH LE D L4GND L4GND L4H1 L4H2 L4H3 H6_0D2_3 H6_0D2_3 H6_0D2_3 L4GND L4GND L4GND X7100 LED Board B - 55 B.Schematic Diagrams J_L4LED1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Schematic Diagrams X7100 Click Board C 3. 3 V C + 5V S CC 1 7 0. 1 u _ 16 V _ Y 5 V _ 04 RIGHT KEY C J _ TP B 1 1 2 3 4 5 6 C C1 6 C U S B _P N 1 0 CU S B _ PP 1 0 C GN D C J_ T P 1 C GT P _ C L K C GT P _D A T A 0 . 1 u _1 6 V _ Y 5 V _ 04 1 3 CG TP _C LK CG TP _D A TA CT P B U TT ON _ L CT P B U TT ON _ R CSW 1 T 4B JB 1 6 -Q 2 4 1 3 C T P B U T T ON _R 2 4 5 6 10 9 8 7 6 5 4 3 2 1 LIFT KEY C SW 2 T 4 B J B 16 -Q C TP B U T TO N _ L 5 6 C+ 5 VS F CR 7 *3 2 m li _ sh o rt 8 52 0 1 -06 0 51 * 32 m i _l s h ort CG ND C R 1 0 C TE S D_ GN D 8 52 0 1 -10 0 51 D03 C GN D CG ND D03 C GND B.Schematic Diagrams 6-20-94A20-110 I t is s trongly re commende d t hat the TESD_ GND h as a de dic ate d c onnec tion t o the s yst em chas sis or C GN D CG ND c able s hie ld. C 3. 3 V CU 2 CJ _ F P B 1 Sheet 55 of 58 X7100 Click Board C R E G_ O U T CB DRIV E 1 CB DRIV E 2 1 3 5 7 9 11 13 15 17 19 21 23 CX IN CX O UT C M OS I CM CL K CM CS CN RE S E T C3 .3 V C3 .3 V 2 4 6 8 10 12 14 16 18 20 22 24 C R E F _O S C CB E Z E L 1 CB E Z E L 2 C A VDD C R1 1 *4 . 7 K _ 04 C MI S O C R1 2 *4 . 7 K _ 04 C MOS I C R1 3 4 . 7K _ 0 4 OS I ISO CS CL K 5 2 1 6 S Q C S# S CK 8 VDD *0 . 1 u_ 1 6V _Y 5V _0 4 CM ISO C U S B _C ON N C P D _R E G C NRE S E T C U S B _P N _ R C U S B _P P _R C R E F _ OS C CR1 4 4 7 K _ 04 CC1 9 1 u _ 6. 3 V _ X 5R _ 04 CC2 0 2 2 p _5 0 V _ N P O _0 4 D02 4 7 V SS HO L D# *M 95 1 28 W M N 6 T P C3 .3 V C G ND C GN D 951206 C BEZEL 1 C GN D C U3 C B DR IV E 1 CR1 5 1 00 _ 1% _ 0 4 1 C B DR IV E 2 CR1 6 1 00 _ 1% _ 0 4 2 3 CG ND P lace Bott on C3 .3 V C P D _ RE G J_FP1 23 1 CC 18 3 W P# C GN D *C ON 24 A C GN D CM CM CM CM C3 .3 V C C 22 C C 23 CR1 7 3 3 0 K _0 4 CC2 1 1 u _ 6. 3 V _ X 5R _ 04 C3 .3 V C BEZEL 2 R C L A M P 05 0 2 B C C2 5 CC 2 4 C T E S D _G N D 3 3 p_ 5 0 V _N P O_ 0 4 1u _ 6 . 3V _ Y 5V _ 0 4 24 2 TOP VIEW 1 u_ 6 . 3 V _Y 5V _0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 2 24 BOTTON VIEW C A VDD C GN D C R E G_ O U T C R 1 8 2 . 2_ 1 % _0 6 CC 2 6 6 1 TJ_FP1 CG ND C C2 7 1 u _1 0 V _ 06 C C2 8 1 u _ 10 V _ 0 6 0 . 1 u_ 1 6 V _Y 5V _0 4 C GN D C US B _P N _R CR1 9 2 7 . 4 _1 % _0 4 CG ND C USB _ P N1 0 CC2 9 47 p _5 0 V _ N P O _0 4 C GN D C XI N CR2 0 4 7 0 _0 4 C X I N _R C R2 2 X7100M ONLY 1 M _0 4 C GN D 2 1 3 4 C XO U T C US B _C ON N CR2 1 1 . 5 K _ 1% _ 0 4 C US B _P P _ R CR2 3 2 7 . 4 _1 % _0 4 C X1 H S X 5 31 S _ 1 2M H Z 47 p _5 0 V _ N P O _0 4 C GN D C C 31 18 p _ 50 V _ N P O _ 04 C CH 1 CCH 2 CC H3 C C H4 C CH 5 CC H6 H 6_ 0 D 2 _ 2 H 6 _0 D 2_ 2 H 6 _ 0D 2 _2 H 6_ 0 D 2 _ 2 H 4 _0 D 2 _ 2 H 4 _ 0D 2 _2 C GN D B - 56 X7100 Click Board C GN D CG ND C GN D C GN D CG ND C GN D C U S B _P P 10 CC3 0 HSX531S+-20ppm CG ND C C3 2 1 8 p_ 5 0V _N P O_ 0 4 CG ND Schematic Diagrams X7100 Fingerprint Board FPJ T1 FR E G_OUT FB D R IV E1 FB D R IV E2 FP U 1 B5 FU S B_C ON N B11 FB D RI V E1 B10 FB D RI V E2 A5 FB EZE L1 U SB_C ON N EC T BD R I VE1 BD R I VE2 BEZ EL1A B7 NC1 B8 C5 BEZ EL2A B9 NC3 BEZ EL2B C2 R E G_OU T FB EZE L2 FBE ZE L1 FBE ZE L2 FAV D D FMI SO FU SB _CON N FPD _R EG FU SB _PN FU SB _PP S PN Z-24S2-VB-017-1-R F GN D FGN D 6-21-41710-212 C 10 ES D _GN D 2 F 3. 3V FR EF _OS C FR E G_OU T FA VD D A VD D ES D _GN D 1 The path be marked in RED needs to be design t o be short and at low im pedance. C7 A10 FMOS I FMC LK FMC S FN R E SE T F3. 3V 2 4 6 8 10 12 14 16 18 20 22 24 A3 Sheet 56 of 58 X7100 Fingerprint Board FGN D C3 FGN D A1 F3. 3V D VD D 1 A11 D VD D 2 ES D _GN D 3 PD _R EG C9 FP D _R E G B2 FMC S C6 FMI SO B4 FMOSI MC S MI SO MOSI B3 FMC LK B1 FU S B_PN C1 FU S B_PP A2 FN R ES ET MC LK U SB_D N U S B_D P N R E SET FGN D A4 B6 23 1 24 2 BOTTON VIEW 24 2 TOP VIEW FGN D FXI N C8 DGN D 2 XTA LOU T A9 ES D _G N D 4 AGN D FR E F_OSC A8 XTA LI N 23 FGN D DGN D 1 C 11 FJ1 1 C4 R E F_OSC X7100M ONLY F GN D A6 FXOU T TCS5XF FGN D X7100 Fingerprint Board B - 57 B.Schematic Diagrams NC4 FXI N FXOU T The TESD_GND trace has to be w ide ( > 20mil) A7 BEZ EL1B NC2 1 3 5 7 9 11 13 15 17 19 21 23 Schematic Diagrams TPM 3.3VS TPM 1.2 U49 19,34 19,34 19,34 19,34 26 23 20 17 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 21 B.Schematic Diagrams 23 PCLK_TPM 19,34 4,14,23 19,34 21 22 16 27 15 LPC_FRAME# PLT_RST# SERIRQ PM_CLKRUN# 28 21 SUS_STAT# Sheet 57 of 58 TPM TPM_BADD 9 TPM_PP 7 1 3 12 8 C786 LAD0 LAD1 LAD2 LAD3 LCLK VDD1 VDD2 VDD3 10 19 24 LPCPD# VSB 5 C790 *0.1u_16V_Y5V_04 GPIO GPIO2 TESTBI/BADD 6 2 13 XTALI 14 XTALO XTALI PP XTALO NC_1 NC_2 NC_3 TESTI Asserted before entering S3 LPC reset timing: LPCPD# inactive to LRST# inactive 32~96us HI: A CCES S L OW: NORMA L ( Int er nal P D ) HI: 4E/ 4F H T PM _BA DD L OW: 2E/ 2F H C789 3.3VS TPM LFRAME# LRESET# SERIRQ CLKRUN# C788 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *1u_10V_06 GND_1 GND_2 GND_3 GND_4 X15 *ZM200S_32.768KHZ 4 1 3 2 4 11 18 25 X16 4 3 C791 *MC-146_32.768KHZ 1 2 C792 *18p_50V_NPO_04 *SLB9635TT T PM _PP C787 PCLK_TPM R657 *18p_50V_NPO_04 *33_04 C793 *10p_50V_04 3.3VS TPM_PP R658 *10K_04 TPM_BADD R659 *10K_04 R660 *10K_04 4,10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,29,30,32,33,34,35,36,39,40,43 3.3VS B - 58 TPM Schematic Diagrams X5100 HDD Board DJ_ODD1 S1 S2 S3 S4 S5 S6 S7 DSATA_TXP0 DSATA_TXN0 DSATA_RXN0 DSATA_RXP0 DGND P1 P2 P3 P4 P5 P6 D_5VS 242001-1 DSATA_TXP0 DSATA_TXN0 PIN GND1 ~3=Q G ND DGND Sheet 58 of 58 X5100 HDD Board DSATA_RXN0 DSATA_RXP0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 D_5VS DC3 DC4 DC5 DC6 DC7 .1u_10V_X7R_04 .1u_10V_X7R_04 .1u_10V_X7R_04 1u_6.3V_X5R_04 *10u_10V_Y5V_08 DC8 + *100U_6.3V_B2 DC9 *22u_6.3V_12 C16664-12204-L PIN G ND1~ 2=G ND DGND DGND 6-21-C2700-122 DH1 DH2 DH3 H6_0D2_3 H6_0D2_3 H6_0D2_3 DGND DGND DGND X5100 HDD Board B - 59 B.Schematic Diagrams DJ _HDD1 S1 S2 S3 S4 S5 S6 S7 B.Schematic Diagrams Schematic Diagrams B - 60 BIOS Update Appendix C:Updating the FLASH ROM BIOS To update the FLASH ROM BIOS you must: • • • • • • • Download the BIOS 1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. 2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files (the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model (see sidebar for important information on BIOS versions). Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive 1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the downloaded files. 2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). BIOS Version Make sure you download the latest correct version of the BIOS appropriate for the computer model you are working on. You should only download BIOS versions that are V1.01.XX or higher as appropriate for your computer model. Note that BIOS versions are not backward compatible and therefore you may not downgrade your BIOS to an older version after upgrading to a later version (e.g if you upgrade a BIOS to ver 1.01.05, you MAY NOT then go back and flash the BIOS to ver 1.01.04). Set the computer to boot from the external drive 1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the computer and press F2 (in most cases) to enter the BIOS. 2. Use the arrow keys to highlight the Boot menu. 3. Use the “+” and “-” keys to move boot devices up and down the priority order. 4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS. 5. Press F10 to save any changes you have made and exit the BIOS to restart the computer. C - 1 C:BIOS Update Download the BIOS update from the web site. Unzip the files onto a bootable CD/DVD/USB Flash Drive. Reboot your computer from an external CD/DVD/USB Flash Drive. Use the flash tools to update the flash BIOS using the commands indicated below. Restart the computer booting from the HDD and press F2 at startup enter the BIOS. Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer. After rebooting the computer you may restart the computer again and make any required changes to the default BIOS settings. BIOS Update Use the flash tools to update the BIOS 1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs being loaded by DOS. Choose “N” for any memory management programs. 2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB flash drive). 3. Type the following command at the DOS prompt: C:BIOS Update C:\> Flash.bat 4. The utility will then proceed to flash the BIOS. 5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer restarts. Restart the computer (booting from the HDD) 1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from the HDD. 2. Press F2 as the computer restarts to enter the BIOS. 3. Use the arrow keys to highlight the Exit menu. 4. Select Load Setup Defaults (or press F9) and select “Yes” to confirm the selection. 5. Press F10 to save any changes you have made and exit the BIOS to restart the computer. Your computer is now running normally with the updated BIOS You may now enter the BIOS and make any changes you require to the default settings. C-2 www.s-manuals.com
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File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.6 Linearized : No Page Mode : UseOutlines XMP Toolkit : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39 Create Date : 2011:02:14 13:37:43Z Creator Tool : FrameMaker 9.0 Modify Date : 2016:06:05 20:34:01+03:00 Metadata Date : 2016:06:05 20:34:01+03:00 Producer : Acrobat Distiller 9.0.0 (Windows) Format : application/pdf Title : Clevo P150HM, P151HM1 - Service Manual. www.s-manuals.com. Creator : Subject : Clevo P150HM, P151HM1 - Service Manual. www.s-manuals.com. Document ID : uuid:4d269543-e2ea-41e4-afcc-57ea959243d5 Instance ID : uuid:7c6e1aed-a112-4283-b098-c709a1626674 Page Count : 117 Keywords : Clevo P150HM, P151HM1 - Service Manual. www.s-manuals.com.EXIF Metadata provided by EXIF.tools