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W150HRM / W150HRQ

SERVICE
MANUAL

Preface

Notebook Computer
W150HRM / W150HRQ
Service Manual
Preface

I

Preface

Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes.

Preface

Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Version 1.0
April 2011

Trademarks
Intel, and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and /or registered trademarks of their respective companies.

II

Preface

About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the W150HRM
/ W150HRQ series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.

Preface

Appendix A, Part Lists
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS

III

Preface

IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment:

Preface

1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19V, 6.3A (120W) minimum AC/DC Adapter.

CAUTION

This Computer’s Optical Device is a Laser Class 1 Product

FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.

IV

Preface

Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1.

Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer
to any shock or vibration.

2.

Do not place anything heavy
on the computer.

Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not leave it in a place
where foreign matter or moisture may affect the system.

Don’t use or store the computer in a humid environment.

Do not place the computer on
any surface which will block
the vents.

Preface

Do not expose it to excessive
heat or direct sunlight.

3.

Do not place it on an unstable
surface.

Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power
until you properly shut down
all programs.

Do not turn off any peripheral
devices when the computer is
on.

Do not disassemble the computer by yourself.

Perform routine maintenance
on your computer.

V

Preface
4.
5.

Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data.
Take care when using peripheral devices.
Use only approved brands of
peripherals.

Unplug the power cord before
attaching peripheral devices.

Preface

Power Safety
The computer has specific power requirements:



VI

•
•

Power Safety
Warning

•

Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.

•
•
•

Only use a power adapter approved for use with this computer.
Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
Before cleaning the computer, make sure it is disconnected from any external power supplies.
Do not plug in the power
cord if you are wet.

Do not use the power cord if
it is broken.

Do not place heavy objects
on the power cord.

Preface

Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.

Battery Guidelines

Preface

The following can also apply to any backup batteries you may have.
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.


Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.

Battery Level
Click the battery icon
in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.

VII

Preface

Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on CD/DVD
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC.

System Startup
Remove all packing materials.
Place the computer on a stable surface.
Insert the battery and make sure it is locked in position.
Securely attach any peripherals you want to use with the computer
(e.g. keyboard and mouse) to their ports.
5. Attach the AC/DC adapter to the DC-In jack at the rear of the
computer, then plug the AC power cord into an outlet, and connect
the AC power cord to the AC/DC adapter.
6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do
not exceed 130 degrees); use the other hand (as illustrated in
Figure 1) to support the base of the computer (Note: Never lift the
computer by the lid/LCD).
7. Press the power button to turn the computer “on”.

Preface

1.
2.
3.
4.


Shut Down
Note that you should always shut your computer down by choosing Shut Down from
the Start Menu.
This will help prevent hard disk or system
problems.

VIII

Figure 1
Opening the Lid/LCD/
Computer with AC/DC
Adapter Plugged-In

130

Preface

Contents
Introduction ..............................................1-1
Overview .........................................................................................1-1
Specifications ..................................................................................1-2
External Locator - Top View with LCD Panel Open ......................1-4
External Locator - Front & Right Side Views .................................1-5
External Locator - Left Side & Rear View .....................................1-6
External Locator - Bottom View .....................................................1-7
Mainboard Overview - Top (Key Parts) .........................................1-8
Mainboard Overview - Bottom (Key Parts) ....................................1-9
Mainboard Overview - Top (Connectors) .....................................1-10
Mainboard Overview - Bottom (Connectors) ...............................1-11
Overview .........................................................................................2-1
Maintenance Tools ..........................................................................2-2
Connections .....................................................................................2-2
Maintenance Precautions .................................................................2-3
Disassembly Steps ...........................................................................2-4
Removing the Battery ......................................................................2-5
Removing the Hard Disk Drive .......................................................2-6
Removing the Optical (CD/DVD) Device ......................................2-8
Removing the System Memory (RAM) ..........................................2-9
Removing and Installing a Processor ............................................2-11
Removing the 3G Module .............................................................2-14
Removing the Wireless LAN Module ...........................................2-15
Removing the Keyboard ................................................................2-16
Removing the LCD Back Cover (W150HRM) .............................2-17

Part Lists ..................................................A-1
Part List Illustration Location ........................................................ A-2
Top with Fingerprint ...................................................................... A-3

Schematic Diagrams................................. B-1
System Block Diagram ...................................................................B-2
Sandy Bridge Processor 1/7 ............................................................B-3
Sandy Bridge Processor 2/7 ............................................................B-4
Sandy Bridge Processor 3/7 ............................................................B-5
Sandy Bridge Processor 4/7 ............................................................B-6
Sandy Bridge Processor 5/7 ............................................................B-7
Sandy Bridge Processor 6/7 ............................................................B-8
Sandy Bridge Processor 7/7 ............................................................B-9
DDR3 SO-DIMM_0 .....................................................................B-10
DDR3 SO-DIMM_1 .....................................................................B-11
Panel, Inverter, CRT .....................................................................B-12
VGA PCI-E Interface ....................................................................B-13
VGA Frame Buffer Interface ........................................................B-14
VGA Frame Buffer A ...................................................................B-15
VGA Frame Buffer B ...................................................................B-16
VGA I/O .......................................................................................B-17
VGA NVVDD Cecoupling ...........................................................B-18
CougarPoint - M 1/9 .....................................................................B-19
CougarPoint - M 2/9 .....................................................................B-20
CougarPoint - M 3/9 .....................................................................B-21
CougarPoint - M 4/9 .....................................................................B-22
CougarPoint - M 5/9 .....................................................................B-23
CougarPoint - M 6/9 .....................................................................B-24
IX

Preface

Disassembly ...............................................2-1

Top without Fingerprint ................................................................. A-4
Bottom ........................................................................................... A-5
Combo ............................................................................................ A-6
DVD SUPER MULTI .................................................................... A-7
LCD (W150HRM) ........................................................................ A-8
LCD (W150HRQ) ........................................................................ A-9

Preface

Preface
CougarPoint - M 7/9 ..................................................................... B-25
CougarPoint - M 8/9 ..................................................................... B-26
CougarPoint - M 9/9 ..................................................................... B-27
WLAN, 3G, Mini PCIE ................................................................ B-28
USB, Fan, TP, FP, Multi-Conn .................................................... B-29
USB 3.0 ........................................................................................ B-30
Card Reader (JMC251C) .............................................................. B-31
SATA ODD, LED, Hotkey, LID SW ........................................... B-32
HDMI, RJ45 ................................................................................. B-33
Audio Codec ALC269 .................................................................. B-34
KBC-ITE IT8518E ....................................................................... B-35
5VS, 3VS, 3.3VM, 1.5VS_CPU .................................................. B-36
VDD3, VDD5 ............................................................................... B-37
Power 0.85VS, 1.8VS, PEX_VDD .............................................. B-38
Power 1.5V/1.05VS/0.75V ........................................................... B-39
Power V-Core1 ............................................................................. B-40
Power V-Core2 ............................................................................. B-41
Power VGA NVVDD ................................................................... B-42
AC_IN, Charger ........................................................................... B-43
W150HNM Audio Board ............................................................. B-44
W150HNM Second HDD Board .................................................. B-45
B5100 Click Board ....................................................................... B-46
B5100 Fingerprint Board ............................................................. B-47
B5130 LED & VGA SW Board ................................................... B-48
B5100 Power Switch Board ......................................................... B-49
Sequence ....................................................................................... B-50

Updating the FLASH ROM BIOS......... C-1
To update the FLASH ROM BIOS you must: C-1
Download the BIOS ....................................................................... C-1
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash
drive ................................................................................................ C-1
X

Set the computer to boot from the external drive ...........................C-1
Use the flash tools to update the BIOS ...........................................C-2
Restart the computer (booting from the HDD) ...............................C-2

Introduction

Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the W150HRM / W150HRQ series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about dri-vers (e.g. VGA & audio) is also found in the User’s Manual. The manual is shipped with the
computer.
Operating systems (e.g. Window 7, etc.) have their own manuals as do application softwares (e.g. word processing and
database programs). If you have questions about those programs, you should consult those manuals.

1.Introduction

The W150HRM / W150HRQ series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed
description of the upgrade procedures for each specific component. Please take note of the warning and safety information indicated by the “” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.

Overview 1 - 1

Introduction

Specifications

Latest Specification Information

1.Introduction

The specifications listed here are correct at the
time of sending them to the press. Certain items
(particularly processor types/speeds) may be
changed, delayed or updated due to the manufacturer's release schedule. Check with your
service center for more details.


CPU
The CPU is not a user serviceable part. Accessing the CPU in any way may violate your
warranty.

Processor Options

Video Adapter

Intel® Core™ i7 Processor
i7-2820QM (2.30GHz)
8MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W
i7-2720QM (2.20GHz)
6MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W
i7-2630QM (2.00GHz)
6MB L3 Cache, 32nm, DDR3-1333MHz, TDP 45W
i7-2620M (2.70GHz)
4MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W
Intel® Core™ i5 Processor
i5-2540M (2.60GHz), i5-2520M (2.50GHz), 
i5-2410M (2.30GHz)
3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W
Intel® Pentium Dual-Core Processor
B950 (2.10GHz), B940 (2.00GHz)
2MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W

Intel® GMA HD and NVIDIA® GeForce GT 555M
Supports NVIDIA® Optimus Technology

Core Logic
Intel® HM65 Chipset

BIOS
One 32Mb SPI Flash ROM
Phoenix™ BIOS

LCD
15.6" (39.62cm) HD/ HD+/ FHD LCD

Intel Integrated GPU (Intel® GMA HD):
Microsoft DirectX®10.1 Compatible
NVIDIA Discrete GPU (NVIDIA® GeForce GT 555M):
2GB GDDR3 Video RAM
Microsoft DirectX®11 Compatible

Memory
Two 204 Pin SO-DIMM Sockets Supporting DDR3 1333/
1600MHz Memory
Memory Expandable up to 8GB
(The real memory operating frequency depends on the FSB of
the processor.)

Security
BIOS Password
Security (Kensington® Type) Lock Slot
(Factory Option) Fingerprint Reader (Model A Only)

Audio
High Definition Audio Compliant Interface
THX TruStudio Pro
2 * Built-In Speakers
Built-In Microphone

Storage
(Factory Option) One Changeable 12.7mm(h) Optical Device
Type Drive (Super Multi Drive Module or Blu-Ray Combo Drive
Module)
One Changeable 2.5" 9.5 mm (h) SATA (Serial) HDD

1 - 2 Specifications

Introduction
Interface

Card Reader

Two USB 2.0 Ports
Two USB 3.0 Ports
One eSATA Port
One HDMI-Out Port
One Headphone-Out Jack
One Microphone-In Jack
One S/PDIF Out Jack
One RJ-45 LAN Jack
One External Monitor Port
One DC-in Jack

Embedded Multi-in-1 Card Reader
MMC (MultiMedia Card) / RS MMC

Communication

WLAN/ Bluetooth Half Mini-Card Modules:
(Factory Option) Intel® Centrino® Advanced-N 6230 Wireless LAN (802.11a/g/n) + Bluetooth 3.0
(Factory Option) Intel® Centrino® Wireless-N 1030 Wireless
LAN (802.11b/g/n) + Bluetooth 3.0
(Factory Option) Intel® Centrino® Ultimate-N 6300 Wireless
LAN (802.11a/g/n)
(Factory Option) Third-Party Wireless LAN (802.11b/g/n) +
Bluetooth 3.0
(Factory Option) Third-Party Wireless LAN (802.11b/g/n)

Keyboard
Full-size “WinKey” keyboard (with numeric keypad)

Pointing Device

Mini Card Slots
Slot 1 for WLAN Module or WLAN and Bluetooth Combo
Module
(Factory Option) Slot 2 for 3.75G/HSPA Module

Environmental Spec
Temperature
Operating: 5°C - 35°C
Non-Operating: -20°C - 60°C
Relative Humidity
Operating: 20% - 80%
Non-Operating: 10% - 90%

1.Introduction

Built-In Gigabit Ethernet LAN
(Factory Option) 1.3M/2.0M Pixel USB PC Camera Module
(Factory Option) 3.75G/HSPA Mini-Card Module

SD (Secure Digital) / Mini SD / SDHC/ SDXC
MS (Memory Stick) / MS Pro / MS Duo

Power
Full Range AC/DC Adapter
AC Input: 100 - 240V, 50 - 60Hz
DC Output: 19V, 6.3A (120W)
6 Cell Smart Lithium-Ion Battery Pack, 48.84WH
(Factory Option) 6 Cell Smart Lithium-Ion Battery Pack,
62.16WH

Dimensions & Weight
374mm (w) * 250mm (d) * 25 - 40.2mm (h)
2.6kg with ODD & 48.84WH Battery

Built-in Touchpad (scrolling key functionality integrated)

Specifications 1 - 3

Introduction
Figure 1

External Locator - Top View with LCD Panel Open

1.Introduction

Top View
1. PC Camera
(Optional)
2. LCD
3. Power Button
4. GPU Button
5. LED Indicators
6. Hot Key Buttons
7. Keyboard
8. Built-In
Microphone
9. Touchpad &
Buttons
10. Fingerprint
Reader

1

2
15.6” (39.62cm)

4

3

5
6

7

8
9
10

1 - 4 External Locator - Top View with LCD Panel Open

Introduction

External Locator - Front & Right Side Views

Figure 2
Front View
1. LED Indicators

FRONT VIEW
1

Right Side View
RIGHT SIDE VIEW

1

2

3

4

5

6

1. Headphone-Out
Jack
2. Microphone-In
Jack
3. S/PDIF-Out Jack
4. USB 2.0 Port
5. Optical Device
Drive Bay
6. Emergency Eject
Hole

External Locator - Front & Right Side Views 1 - 5

1.Introduction

Figure 3

Introduction

External Locator - Left Side & Rear View
Figure 4

1.Introduction

Left Side View
1. External Monitor
Port
2. RJ-45 LAN Jack
3. HDMI-Out Port
4. USB 2.0 Port
5. 2 * USB 3.0 Ports
6. Vent
7. eSATA Port
8. Multi-in-1 Card
Reader

/

LEFT SIDE VIEW

1

Figure 5

2

3

4

7

5
6

5

8

REAR VIEW

Rear View
1. Security Lock Slot
2. Battery
3. DC-In Jack

1

1 - 6 External Locator - Left Side & Rear View

2

3

Introduction

External Locator - Bottom View
Figure 6
Bottom View
1. Battery
2. Component Bay
Cover
3. Vent
4. Hard Disk Bay
Cover
5. Speakers

1
3
3

1.Introduction

3

2
3

4
5

3

5


Overheating
To prevent your computer from overheating, make sure nothing blocks any vent
while the computer is
in use.

External Locator - Bottom View 1 - 7

Introduction
Figure 7

Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts

1.Introduction

1. JMC251C
2. KBC-ITE IT8502E
3. Audio Codec

1

2

3

1 - 8 Mainboard Overview - Top (Key Parts)

Introduction

Mainboard Overview - Bottom (Key Parts)

Figure 8
Mainboard Bottom
Key Parts

1

2

3

5

6

4

Mainboard Overview - Bottom (Key Parts) 1 - 9

1.Introduction

1. Mini-Card
Connector (3.5G
Module)
2. CPU Socket (no
CPU installed)
3. Memory Slots
DDR3 SO-DIMM
4. Mini-Card
Connector (WLAN
Module)
5. Controller Hub
6. Multi-in-1 Card
Reader

Introduction
Figure 9

Mainboard Overview - Top (Connectors)

Mainboard Top
Connectors

1.Introduction

1.
2.
3.
4.
5.

HDMI-Out Port
USB 2.0 Port
USB 3.0 Ports
eSATA Port
LED Cable
Connector
6. Microphone
Cable Connector
7. Audio Cable
Connector
8. TouchPad Cable
Connector
9. Keyboard Cable
Connector
10. Switch Board
Cable Connector
11. USIM Card

11
10
1

2
5
3
8

9

6
4

3
7

1 - 10 Mainboard Overview - Top (Connectors)

Introduction

Mainboard Overview - Bottom (Connectors)

Figure 10
Mainboard Bottom
Connectors

6
5
8
7
4

3

1

Mainboard Overview - Bottom (Connectors) 1 - 11

1.Introduction

2

1. CMOS Battery
2. Speaker Cable
Connector
3. CPU Fan Cable
Connector
4. RJ-45 LAN Jack
5. External Monitor
Port
6. DC-In Jack
7. LCD Cable
Connector
8. CCD Cable
Connector

1.Introduction

Introduction

1 - 12

Disassembly

Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the W150HRM / W150HRQ series notebook’s parts
and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.

To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a 
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also.


Information

A box with a  will also provide any possible helpful information. A box with a  contains warnings.
An example of these types of boxes are shown in the sidebar.


Warning

Overview 2 - 1

2.Disassembly

Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.

Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).

Maintenance Tools
The following tools are recommended when working on the notebook PC:

2.Disassembly

•
•
•
•
•
•

M3 Philips-head screwdriver
M2.5 Philips-head screwdriver (magnetized)
M2 Philips-head screwdriver
Small flat-head screwdriver
Pair of needle-nose pliers
Anti-static wrist-strap

Connections
Connections within the computer are one of four types:

2 - 2 Overview

Locking collar sockets for ribbon connectors

To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.

Pressure sockets for multi-wire connectors

To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.

Pressure sockets for ribbon connectors

To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.

Board-to-board or multi-pin sockets

To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.

Disassembly

Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions:

•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies.
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.

6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.

Power Safety
Warning
Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.

Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.

Overview 2 - 3

2.Disassembly

1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
components could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight.
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor
the position of magnetized tools (i.e. screwdrivers).
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly
damaged.
5. Be careful with power. Avoid accidental shocks, discharges or explosions.



Disassembly

Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.

To remove the Battery:
1. Remove the battery

To remove the Keyboard:
page 2 - 5

1. Remove the battery
2. Remove the keyboard

page 2 - 5
page 2 - 6

To remove the LCD Back Cover:

To remove the HDD:

2.Disassembly

1. Remove the battery
2. Remove the HDD

To remove the Optical Device:
1. Remove the battery
2. Remove the Optical device

page 2 - 5
page 2 - 8

To remove the System Memory:
1. Remove the battery
2. Remove the system memory

page 2 - 5
page 2 - 9

To remove and install a Processor:
1. Remove the battery
2. Remove the processor
3. Install the processor

page 2 - 5
page 2 - 11
page 2 - 13

To remove the 3G Module:
1. Remove the battery
2. Remove the 3G module

page 2 - 5
page 2 - 14

To remove the Wireless LAN Module:
1. Remove the battery
2. Remove the WLAN module

2 - 4 Disassembly Steps

page 2 - 5
page 2 - 15

1. Remove the battery
2. Remove the LCD back cover

page 2 - 5
page 2 - 16

page 2 - 5
page 2 - 17

Disassembly

Removing the Battery
1.
2.
3.
4.

Figure 1
Battery Removal

Turn the computer off, and turn it over.
Slide the latch 1 in the direction of the arrow (Figure 1a).
Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a).
Slide the battery 63 in the direction of the arrow 4 (Figure 1b).

a. Slide the latch and hold it
in place.
b. Slide the battery in the direction of the arrow.

b.

a.
2
1

3

2.Disassembly

4


3. Battery

Removing the Battery 2 - 5

Disassembly

Removing the Hard Disk Drive
Figure 2
HDD Assembly
Removal

2.Disassembly

a. Locate the HDD bay cover
and remove the screws.

The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
(h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in
Chapter 4 of the User’s Manual) when setting up a new hard disk.

Hard Disk Upgrade Process
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screws 1 & 2 (Figure 2a).



a.

HDD System Warning
New HDD’s are blank. Before you
begin make sure:
You have backed up any data
you want to keep from your old
HDD.

1


• 2 Screws

2 - 6 Removing the Hard Disk Drive

2

You have all the CD-ROMs and
FDDs required to install your operating system and programs.
If you have access to the internet,
download the latest application
and hardware driver updates for
the operating system you plan to
install. Copy these to a removable medium.

Disassembly
3.
4.
5.
6.
7.

Remove the hard disk bay cover 63 (Figure 3b).
Grip the tab and slide the hard disk in the direction of arrow 4 (Figure 3c).
Lift the hard disk assembly 65 out of the bay 6 (Figure 3d).
Remove the screw 7 - 10 and the mylar cover 11 from the hard disk 12 (Figure 3e).
Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
b.

d.

6

Figure 3
HDD Assembly
Removal (cont’d.)
b. Remove the HDD bay
cover.
c. Grip the tab and slide the
HDD assembly in the direction of the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screws and
mylar cover.

2.Disassembly

3
5

e.

c.

7


10

8
4

11
12

9

3. HDD Bay Cover
5. HDD Assembly
11. Mylar Cover
12. HDD

• 4 Screws

Removing the Hard Disk Drive 2 - 7

Disassembly
Figure 4
Optical Device
Removal

1.
2.
3.
4.

Turn off the computer, remove the battery (page 2 - 5) and hard disk (page 2 - 6).
Remove the screw at point 1 (Figure 4a).
Use a screwdriver to carefully push out the optical device 3 at point 2 (Figure 4b).
Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
5. Restart the computer to allow it to automatically detect the new device.
a.

2.Disassembly

a. Remove the screw at
point 1 .
b. Use a screwdriver to
carefully push out the
optical device at point
2 .

Removing the Optical (CD/DVD) Device

b.

3
1

2


3. Optical Device

• 1 Screw

2 - 8 Removing the Optical (CD/DVD) Device

Disassembly

Removing the System Memory (RAM)

Figure 5

The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting
DDRIII (DDR3) Up to 1333/1600MHz. The main memory can be expanded up to 8GB. The SO-DIMM modules supported are 1024MB and 2048MB DDRIII Modules. The total memory size is automatically detected by the POST routine once you turn on your computer.

Memory Upgrade Process
1.
2.
3.
4.
5.

Turn off the computer, turn it over and remove the battery (page 2 - 5).
Remove screws 1 - 4 from the component bay cover (Figure 5a).
Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
Carefully disconnect the fan cable 5 , and remove the cover (Figure 5b).
The RAM modules will be visible at point 5 on the mainboard (Figure 5b).

RAM Module
Removal
a. Remove the screws
from the component
bay cover.
b. The RAM modules will
be visible at point 5
on the mainboard.

1



2

Contact Warning
Be careful not to touch
the metal pins on the
module’s
connecting
edge. Even the cleanest
hands have oils which
can attract particles, and
degrade the module’s
performance.

3
4

b.


6

• 4 Screws
5

Removing the System Memory (RAM) 2 - 9

2.Disassembly

a.

Disassembly
Figure 6
RAM Module
Removal (cont’d)

6. Gently pull the two release latches ( 7 & 8 ) on the sides of the memory socket in the direction indicated by the
arrows (Figure 5c). The RAM module 9 will pop-up (Figure 5d), and you can then remove it.
7. Pull the latches to release the second module if necessary.
d.

c.
c. Pull the release latches.
d. Remove the module.

7

8

2.Disassembly

9


Contact Warning
Be careful not to touch
the metal pins on the
module’s
connecting
edge. Even the cleanest hands have oils
which can attract particles, and degrade the
module’s performance.

8. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
9. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot
as it will go. DO NOT FORCE IT; it should fit without much pressure.
10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
11. Replace the component bay cover and the screws (see page 2 - 9).
12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.


9. RAM Module

2 - 10 Removing the System Memory (RAM)

Disassembly

Removing and Installing a Processor

Figure 7

Processor Removal Procedure

Processor Removal

1. Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
2. The CPU heat sink will be visible at point A (Figure 6a) on the mainboard.
3. Remove screws 6 , 5 , 4 , 3 , 2 and 1 , the reverse order indicated on the label. *Note: Make sure that the
size of the screwdriver is below 4mm. when removing or tighting screw 5 , and its position should be at a 90
degree angle from the mainboard.(Figure 6c)

a. Remove the cover and
Iocate the heat sink.
b. Remove the screws in
the order indicated.

a.

b.

6

5

1

2.Disassembly

4

A
3

2

c.


•

6 Screws

5

Removing and Installing a Processor 2 - 11

Disassembly

Figure 8
Processor Removal
(cont’d)

2.Disassembly

c. Remove the heat sink.
d. Turn the release latch to
unlock the CPU.
e. Lift the CPU out of the
socket.

4.
5.
6.
7.
8.

Carefully lift up the heat sink B (Figure 7c) off the computer.
Turn the release latch C towards the unlock symbol
, to release the CPU (Figure 7d).
Carefully (it may be hot) lift the CPU D up out of the socket (Figure 7e).
See page 2 - 13 for information on inserting a new CPU.
When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
c.

B


Caution
The heat sink, and CPU
area in general, contains
parts which are subject to
high temperatures. Allow
the area time to cool before removing these parts.

d.

e.

D

C


B. Heat Sink
D. CPU

2 - 12 Removing and Installing a Processor

Unlock

Disassembly

Processor Installation Procedure

Figure 9

1. Insert the CPU A (Figure 8a), pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE
IT!), and turn the release latch B towards the lock symbol
(Figure 8b).
2. Remove the sticker C (Figure 8c) from the heat sink.
3. Insert the heat sink D as indicated in Figure 8d.
4. Tighten the CPU heat sink screws in the order 1 , 2 , 3 , 4 , 5 & 6 (the order as indicated on the label and
Figure 8d) *Note: Make sure that the size of the screwdriver is below 4mm. when removing or tighting screw 5 ,
and its position should be at a 90 degree angle from the mainboard.
5. Replace the component bay cover (don’t forget to replace the fan cable) and tighten the screws (page 2 - 9).

Processor
Installation
a. Insert the CPU.
b. Turn the release latch towards the lock symbol.
c. Remove the sticker from
the heat sink and insert
the heat sink.
d. Tighten the screws.

c.

a.

2.Disassembly

C

A

d.

b.

5

6

1

D

B
4
3



2

Note:
Tighten the screws
in the order as indicated on the label.

A. CPU
D. Heat Sink

• 6 Screws

Removing and Installing a Processor 2 - 13

Disassembly
Figure 10
3G Module Removal
a. Locate the 3G module.
b. Disconnect the cable
and remove the screw.
c. The module will pop-up.
d. Remove the 3G module.

Removing the 3G Module
1.
2.
3.
4.

Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
The 3G module will be visible at point 1 on the mainboard (Figure 9a).
Carefully disconnect the cable 2 , and then remove the screw 3 (Figure 9b).
The 3G module 4 (Figure 9c) will pop-up, and you can remove it from the computer (Figure 9d).

2.Disassembly

a.

Note: Make sure you
reconnect the antenna
cable to socket.

d.

c.
4

1

4

b.
3


4. 3G Module

• 1 Screw

2 - 14 Removing the 3G Module

2

Disassembly

Removing the Wireless LAN Module
1.
2.
3.
4.

Figure 11

Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
The Wireless LAN module will be visible at point 1 on the mainboard (Figure 10a).
Carefully disconnect the cables 2 & 3 , and then remove the screw 4 (Figure 10b).
The Wireless LAN module 5 (Figure 10c) will pop-up, and you can remove it from the computer (Figure 10d).
c.

a.

d.

Wireless LAN
Module Removal
a. Locate the WLAN.
b. Disconnect the cables
and remove the screw.
c. The WLAN module will
pop up.
d. Remove the Wireless
LAN module.

1
b.
2

3

5
4


5.Wireless LAN Module

• 1 Screw

Removing the Wireless LAN Module 2 - 15

2.Disassembly

Note: Make sure you
reconnect the antenna
cable to the “1 + 2”
socket (Figure 10b).

5

Disassembly
Figure 12

2.Disassembly

Keyboard Removal
a. Remove screws from the
bottom of the computer.
b. Turn the computer over,
unsnap up the LED cover module from point 5
towards the right .
c. Remove screws from
the keyboard.
d. Carefully lift the keyboard up and disconnect
the keyboard ribbon cable from the locking collar socket.
e. Remove the keyboard.


Re-Inserting the
Keyboard

Removing the Keyboard
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Remove screws 1 - 2 from the bottom of the computer. Press at point 3 to unsnap the LED cover module (you
will need to use Pin Eject Tool to do this Figure 11a).
3. Turn the computer over, unsnap up the LED cover module 4 from point 5 on the left of the computer, towards the
right (Figure 11b) as indicated by arrow.
4. Remove screws 6 - 10 from the keyboard (Figure 11c).
5. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable 11 . Disconnect the keyboard
ribbon cable 11 from the locking collar socket 12 (Figure 11d)
6. Carefully lift up the keyboard 13 (Figure 11e) off the computer.
a.
d.
11
3
1
2
13

12

b.
5

When re-inserting the
keyboard firstly align the
four keyboard tabs (Figure 11e) at the bottom of
the keyboard with the
slots in the case.

e.

4

c.



6

7

8

9

10

13

4. LED Cover Module
13. Keyboard

• 7 Screws

Keyboard Tabs

2 - 16 Removing the Keyboard

Disassembly

Removing the LCD Back Cover (W150HRM)

Figure 13

1. Turn off the computer, and turn the computer over to remove the battery (page 2 - 5).
2. Open the LCD and carefully remove the upper rubber screw covers 1 & 2 (2 corner rubber screw covers only)
and set them aside (Figure 12a).
3. Remove screws 3 & 4 from the front cover (Figure 12a).
4. Carefully slide the cover forward in the direction of the arrows 5 & 6 as illustrated below (Figure 12b).
5. Remove the LCD back cover 7 (Figure 12c).

a.

1

2

LCD Back Cover
Removal (W150HNM)
a. Remove the rubber covers and screws.
b. Slide the cover forward.
c. Remove the LCD back
cover.

b.
5

6

2.Disassembly

4

3

c.





Rubber Screw Covers
After removing the rubber screw covers, place them on a
clean dry surface (or attach them to the front cover itself) in
order to prevent loss of adhesive.

7. LCD Back Cover

7
•

2 Screws

Removing the LCD Back Cover (W150HRM) 2 - 17

2.Disassembly

Disassembly

2 - 18

Appendix A:Part Lists
This appendix breaks down the W150HRM / W150HRQ series notebook’s construction into a series of illustrations. The
component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.

A.Part Lists

Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.

A - 1

Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A - 1

A.Part Lists

Part List Illustration
Location

Part

W150HRQ

Top with Fingerprint

page A - 3

Top without Fingerprint

page A - 4

Bottom

page A - 5

Combo

page A - 6

DVD Super Multi

page A - 7

LCD

A - 2

W150HRM

page A - 8

page A - 9

Top with Fingerprint

黑色

灰色

Top with Fingerprint A - 3

A.Part Lists

Figure A - 1
Top with Fingerprint

Top without Fingerprint

A.Part Lists

Figure A - 2
Top without Fingerprint

黑色

灰色

A - 4 Top without Fingerprint

Bottom

Bottom

Bottom A - 5

A.Part Lists

Figure 3

Combo

A.Part Lists

Figure A - 4
Combo

非耐落
志精

A - 6 Combo

DVD SUPER MULTI

Figure A - 5

非耐落
志精

太乙

DVD SUPER MULTI A - 7

A.Part Lists

DVD SUPER MULTI

LCD (W150HRM)

A.Part Lists

Figure A - 6

銘板

LCD (W150HRM)
非耐落

一般漆

A - 8 LCD (W150HRM)

LCD (W150HRQ)

Figure A - 7

銘板

非耐落

一般漆

LCD (W150HRQ) A - 9

A.Part Lists

LCD (W150HRQ)

A - 10

A.Part Lists

Schematic Diagrams

Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the W150HRM / W150HRQ notebook’s PCB’s. The following table indicates
where to find the appropriate schematic diagram.
Diagram - Page

Diagram - Page

Diagram - Page

CougarPoint - M 1/9 - Page B - 19

5VS, 3VS, 3.3VM, 1.5VS_CPU - Page B - 36

Sandy Bridge Processor 1/7 - Page B - 3

CougarPoint - M 2/9 - Page B - 20

VDD3, VDD5 - Page B - 37

Sandy Bridge Processor 2/7 - Page B - 4

CougarPoint - M 3/9 - Page B - 21

Power 0.85VS, 1.8VS, PEX_VDD - Page B - 38

Sandy Bridge Processor 3/7 - Page B - 5

CougarPoint - M 4/9 - Page B - 22

Power 1.5V/1.05VS/0.75V - Page B - 39

Sandy Bridge Processor 4/7 - Page B - 6

CougarPoint - M 5/9 - Page B - 23

Power V-Core1 - Page B - 40

Sandy Bridge Processor 5/7 - Page B - 7

CougarPoint - M 6/9 - Page B - 24

Power V-Core2 - Page B - 41

Sandy Bridge Processor 6/7 - Page B - 8

CougarPoint - M 7/9 - Page B - 25

Power VGA NVVDD - Page B - 42

Sandy Bridge Processor 7/7 - Page B - 9

CougarPoint - M 8/9 - Page B - 26

AC_IN, Charger - Page B - 43

DDR3 SO-DIMM_0 - Page B - 10

CougarPoint - M 9/9 - Page B - 27

W150HNM Audio Board - Page B - 44

DDR3 SO-DIMM_1 - Page B - 11

WLAN, 3G, Mini PCIE - Page B - 28

W150HNM Second HDD Board - Page B - 45

Panel, Inverter, CRT - Page B - 12

USB, Fan, TP, FP, Multi-Conn - Page B - 29

B5100 Click Board - Page B - 46

VGA PCI-E Interface - Page B - 13

USB 3.0 - Page B - 30

B5100 Fingerprint Board - Page B - 47

VGA Frame Buffer Interface - Page B - 14

Card Reader (JMC251C) - Page B - 31

B5130 LED & VGA SW Board - Page B - 48

VGA Frame Buffer A - Page B - 15

SATA ODD, LED, Hotkey, LID SW - Page B - 32

B5100 Power Switch Board - Page B - 49

VGA Frame Buffer B - Page B - 16

HDMI, RJ45 - Page B - 33

Sequence - Page B - 50

VGA I/O - Page B - 17

Audio Codec ALC269 - Page B - 34

VGA NVVDD Cecoupling - Page B - 18

KBC-ITE IT8518E - Page B - 35

Table B - 1
SCHEMATIC
DIAGRAMS


Version Note
The schematic diagrams in this chapter
are based upon version 6-7P-W15H7-002.
If your mainboard (or
other boards) are a later version, please
check with the Service
Center for updated diagrams (if required).

B - 1

B.Schematic Diagrams

System Block Diagram - Page B - 2

Schematic Diagrams

System Block Diagram
VDD3,VDD5

W150HRM/W170HR Huron River System Block Diagram

W150HRM 7IN1 6-7P-W15R7-002
W150HRM MAIN BOARD
6-71-W15H0-D02

GPU NVDIDA N12x NVVDD
PCIE*8

AUDIO BOARD

5V,3V,5VS,3VS,1.5VS,
1.8VS,+1.5S_CPU
1.8V, PEX_VDD,0.85VS

B.Schematic Diagrams

1.5V,0.75VS(VTT_MEM)
FBVDDQ

Nvidia
Fermi N12E-GE-A1
RAM SIZE:2GB
(128MX16)
1005 Balls

Sheet 1 of 49
System Block
Diagram

SECOND HDD/ODD BOARD
DDRIII
SO-DIMM2

rPGA988B

DDRIII
SO-DIMM1

0.1"~13

DMI*4
AUDIO BOARD
SPDIF
OUT

CougarPoint
Controller
Hub (PCH)

SPI

MIC
IN

HP
OUT

USB PORT (USB8)

W170HR

W150HNM (INT SPK R)

6-71-W1500-D01

33 MHz
BIOS
SPI

24 MHz

THERMAL
SENSOR
W83L771AWG

SMART
FAN

SMART
BATTERY
AC-IN

PCIE

USB2.0

<12"

1"~16"

100 MHz

USB3.0
VLI8012
*NEC uPD720200

Mini PCIE
SOCKET
3G MSATA CARD
(USB2/SATA3)
(Optional)

B5100

W150HNM
SECOND HDD BOARD

B - 2 System Block Diagram

6-71-B7117-D01

AZALIA LINK

eSATA

USB PORT1
(USB0)

25
MHz

<12"

6-71-B7112-D02

POWER SWITCH BOARD
6-71-B711S-D02

32.768KHz

480 Mbps

(B4100M)

K/B TRANSFER BOARD
CLICK BOARD

SATA I/II 3.0Gb/s

SATA ODD

PHONE JACK x3, USB x1
RJ-11 6-71-W170A-D01
6-71-W170N-D01

EC SMBUS

INT. K/B

AUDIO BOARD

SECOND HDD/ODD BOARD
INT MIC

14 *1 4*1 .6m m

SATA HDD

W150HNM
INT SPKER-L

Azalia Codec
REALTAK
ALC269

27x27mm
989 Ball FCBGA

LPC

8IN1 6-7P-W1708-001

W150HN MAIN BOARD

32.768 KHz

0.5"~11"

6-71-B510S-D03

LED & VGA S/W BOARD
6-71-B5134-D01

TPM 1.2
Optional

128pins LQFP

6-71-B5102-D04

POWER SWITCH BOARD
W150HNM
INT SPKER-R

HDMI Connector

EC
ITE 8518E

6-71-B510F-D02

CLICK BOARD

SHEET 9

<=8"

<8"
<15"

LCD
CRT CONNECTOR
CONNECTOR

6-71-W150N-D01

FINGER PRINTER BOARD

SHEET 10

SYSTEM SMBUS

0.5"~5.5"

SENTELIC
649-C4102-010
TOUCH
PAD
CLICK BOARD

800/1067/1333 MHz
DDR3 / 1.5V

PROCESSOR

FDI
1.05VS_VTT
VGFX_CORE

PHONE JACK x3, USB x1
RJ-11 6-71-W150A-D02

Sandy Bridge

CCD
(USB5)

JMICRO

JMC251_C
CARD
LAN READER

RJ-45

FINGER PRINTER BOARD

(USB4)
FingerPrint
(Optional)

Mini PCIE
SOCKET
WLAN
(USB2)

USB PORT2

USB PORT3

12 MHz

USB3.0

7IN1
SOCKET

LED & VGA S/W BOARD
6-71-B7134-D01

DEBUG BOARD
6-71-W840TD-D03

Schematic Diagrams

Sandy Bridge Processor 1/7
Sandy Bridge Processor 1/7 ( DMI,PEG,FDI )
1 . 05 V S _ V T T

CPU

U4 9 A

20
20
20
20

DM I_ T X P 0
DM I_ T X P 1
DM I_ T X P 2
DM I_ T X P 3

20
20
20
20

CAD NOTE: DP_COMPIO and ICOMPO signals
should be shorted near balls and routed with
- typical impedance < 25 mohms
1. 05 V S _V TT

B2 8
B2 6
A2 4
B2 3
G 21
E2 2
F21
D 21

DM I_ RX N 0
DM I_ RX N 1
DM I_ RX N 2
DM I_ RX N 3
DM
DM
DM
DM

G 22
D 22
F20
C 21

I_ RX P 0
I_ RX P 1
I_ RX P 2
I_ RX P 3

20
20
20
20
20
20
20
20

F DI_ T X N0
F DI_ T X N1
F DI_ T X N2
F DI_ T X N3
F DI_ T X N4
F DI_ T X N5
F DI_ T X N6
F DI_ T X N7

20
20
20
20
20
20
20
20

F DI_ T X P 0
F DI_ T X P 1
F DI_ T X P 2
F DI_ T X P 3
F DI_ T X P 4
F DI_ T X P 5
F DI_ T X P 6
F DI_ T X P 7

A2 1
H 19
E1 9
F18
B2 1
C 20
D 18
E1 7

A2 2
G 19
E2 0
G 18
B2 0
C 19
D 19
F17

1 .0 5 V S_ VT T
20
20

F D I_ F S Y N C 0
F D I_ F S Y N C 1

20

F D I_ INT

J18
J17

DM
DM
DM
DM

I_ RX # [0 ]
I_ RX # [1 ]
I_ RX # [2 ]
I_ RX # [3 ]

DM I_ RX [0 ]
DM I_ RX [1 ]
DM I_ RX [2 ]
DM I_ RX [3 ]
D M I _ T X# [ 0 ]
D M I _ T X# [ 1 ]
D M I _ T X# [ 2 ]
D M I _ T X# [ 3 ]
DM
DM
DM
DM

I _ T X[
I _ T X[
I _ T X[
I _ T X[

0]
1]
2]
3]

FD
FD
FD
FD
FD
FD
FD
FD

I 0_ T X # [ 0 ]
I 0_ T X # [ 1 ]
I 0_ T X # [ 2 ]
I 0_ T X # [ 3 ]
I 1_ T X # [ 0 ]
I 1_ T X # [ 1 ]
I 1_ T X # [ 2 ]
I 1_ T X # [ 3 ]

FD
FD
FD
FD
FD
FD
FD
FD

I 0_ T X [ 0 ]
I 0_ T X [ 1 ]
I 0_ T X [ 2 ]
I 0_ T X [ 3 ]
I 1_ T X [ 0 ]
I 1_ T X [ 1 ]
I 1_ T X [ 2 ]
I 1_ T X [ 3 ]

F D I 0_ F S Y N C
F D I 1_ F S Y N C

H 20

R 521
1 K_ 1 % _ 0 4

R5 1 9
2 4 . 9_ 1 % _ 0 4

20
20

F D I _I N T
J19
H 17

F D I _ LS Y N C 0
F D I _ LS Y N C 1

F D I 0_ L S Y N C
F D I 1_ L S Y N C

ED P H P D Fu nc ti o n D is ab l e
ED P_ HP D : Pu ll -u p 10 K- D IS A BL ED H PD
EDP _ H PD

A1 8
A1 7
B1 6

C 15
D 15

11
11

DP _ A U X _ P
DP _ A U X _ N

11
11
11

DP _ T XP _ 0
DP _ T XP _ 1
DP _ T XP _ 2

C 17
F16
C 16
G 15

11
11
11

DP _ T XN_ 0
DP _ T XN_ 1
DP _ T XN_ 2

C 18
E1 6
D 16
F15

e D P _ C OM P I O
e D P _ I C OM P O
e DP_ H P D

e DP_ AU X
e DP_ AU X#

e DP_ T X [0 ]
e DP_ T X [1 ]
e DP_ T X [2 ]
e DP_ T X [3 ]
e DP_ T X # [0 ]
e DP_ T X # [1 ]
e DP_ T X # [2 ]
e DP_ T X # [3 ]
P Z 9 8 8 2 7- 36 4 B -0 1 F

eDP

E D P _ C OM P I O

DP Compensation Signal

PE G _ RX# [0 ]
PE G _ RX# [1 ]
PE G _ RX# [2 ]
PE G _ RX# [3 ]
PE G _ RX# [4 ]
PE G _ RX# [5 ]
PE G _ RX# [6 ]
PE G _ RX# [7 ]
PE G _ RX# [8 ]
PE G _ RX# [9 ]
P E G _ RX # [1 0 ]
P E G _ RX # [1 1 ]
P E G _ RX # [1 2 ]
P E G _ RX # [1 3 ]
P E G _ RX # [1 4 ]
P E G _ RX # [1 5 ]
P E G _R X [ 0 ]
P E G _R X [ 1 ]
P E G _R X [ 2 ]
P E G _R X [ 3 ]
P E G _R X [ 4 ]
P E G _R X [ 5 ]
P E G _R X [ 6 ]
P E G _R X [ 7 ]
P E G _R X [ 8 ]
P E G _R X [ 9 ]
PE G _ RX[1 0 ]
PE G _ RX[1 1 ]
PE G _ RX[1 2 ]
PE G _ RX[1 3 ]
PE G _ RX[1 4 ]
PE G _ RX[1 5 ]
P E G_ T X # [ 0 ]
P E G_ T X # [ 1 ]
P E G_ T X # [ 2 ]
P E G_ T X # [ 3 ]
P E G_ T X # [ 4 ]
P E G_ T X # [ 5 ]
P E G_ T X # [ 6 ]
P E G_ T X # [ 7 ]
P E G_ T X # [ 8 ]
P E G_ T X # [ 9 ]
P E G _T X # [ 1 0 ]
P E G _T X # [ 1 1 ]
P E G _T X # [ 1 2 ]
P E G _T X # [ 1 3 ]
P E G _T X # [ 1 4 ]
P E G _T X # [ 1 5 ]
P E G_ T X [ 0 ]
P E G_ T X [ 1 ]
P E G_ T X [ 2 ]
P E G_ T X [ 3 ]
P E G_ T X [ 4 ]
P E G_ T X [ 5 ]
P E G_ T X [ 6 ]
P E G_ T X [ 7 ]
P E G_ T X [ 8 ]
P E G_ T X [ 9 ]
P E G_ T X [ 1 0 ]
P E G_ T X [ 1 1 ]
P E G_ T X [ 1 2 ]
P E G_ T X [ 1 3 ]
P E G_ T X [ 1 4 ]
P E G_ T X [ 1 5 ]

20 mil

J22
J21
H 22

K3 3
M 35
L34
J35
J32
H 34
H 31
G 33
G 30
F35
E3 4
E3 2
D 33
D 31
B3 3
C 32

P E G_ I R C O M P _ R

PE
PE
PE
PE
PE
PE
PE
PE

G_ R
G_ R
G_ R
G_ R
G_ R
G_ R
G_ R
G_ R

X# 0
X# 1
X# 2
X# 3
X# 4
X# 5
X# 6
X# 7

PE
PE
PE
PE
PE
PE
PE
PE

G_ R
G_ R
G_ R
G_ R
G_ R
G_ R
G_ R
G_ R

X0
X1
X2
X3
X4
X5
X6
X7

R1 3 3

2 4 . 9 _ 1% _ 0 4

12
12
12
12
12
12
12
12

PEG Compensation Signal

J33
L35
K3 4
H 35
H 32
G 34
G 31
F33
F30
E3 5
E3 3
F32
D 34
E3 1
C 33
B3 2

CAD NOTE: PEG_ICOMPI and RCOMPO signals
should be shorted and routed with
- max length = 500 mils
- typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with
- max length = 500 mils
- typical impedance = 14.5 mohms

12
12
12
12
12
12
12
12

M 29
M 32
M 31
L32
L29
K3 1
K2 8
J30
J28
H 29
G 27
E2 9
F27
D 28
F26
E2 5

PE
PE
PE
PE
PE
PE
PE
PE

G_ T X # _0
G_ T X # _1
G_ T X # _2
G_ T X # _3
G_ T X # _4
G_ T X # _5
G_ T X # _6
G_ T X # _7

C
C
C
C
C
C
C
C

591
589
594
596
598
601
606
608

0.
0.
0.
0.
0.
0.
0.
0.

22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R

_ 04
_ 04
_ 04
_ 04
_ 04
_ 04
_ 04
_ 04

M 28
M 33
M 30
L31
L28
K3 0
K2 7
J29
J27
H 28
G 28
E2 8
F28
D 27
E2 6
D 25

PE
PE
PE
PE
PE
PE
PE
PE

G_ T X _ 0
G_ T X _ 1
G_ T X _ 2
G_ T X _ 3
G_ T X _ 4
G_ T X _ 5
G_ T X _ 6
G_ T X _ 7

C
C
C
C
C
C
C
C

587
588
593
595
597
602
604
607

0.
0.
0.
0.
0.
0.
0.
0.

22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R

_ 04
_ 04
_ 04
_ 04
_ 04
_ 04
_ 04
_ 04

PE
PE
PE
PE
PE
PE
PE
PE

G_ T X #0
G_ T X #1
G_ T X #2
G_ T X #3
G_ T X #4
G_ T X #5
G_ T X #6
G_ T X #7

12
12
12
12
12
12
12
12

PE
PE
PE
PE
PE
PE
PE
PE

G_ T X 0
G_ T X 1
G_ T X 2
G_ T X 3
G_ T X 4
G_ T X 5
G_ T X 6
G_ T X 7

12
12
12
12
12
12
12
12

Q 26
5

4
3 .3 V

G ND

VC C

N C
GN D
VO

Sheet 2 of 49
Sandy Bridge
Processor 1/7

SC70-5 & SC70-3
Co-lay

1
2
3

* T MP 2 0
Q 27
2

1
VC C

O UT

1:2 (4mils:8mils)

C6 7 3
3
G ND
0 . 1u _ 1 0 V _ X 7R _ 0 4

G 71 1 S T 9 U

C6 7 2

T H E R M _V OL T 3 4

8/30

0 . 1 u_ 1 0 V _ X 7R _ 0 4

1
3

PLACE NEAR U3

2

3 , 5 , 2 3 , 2 4, 25 , 3 5 , 3 9 1 . 0 5V S _ V T T
3 , 8, 11 , 1 2 , 1 6 , 1 8, 19 , 2 0 , 2 2 , 2 3, 24 , 2 5 , 2 7 , 2 8, 29 , 3 0 , 3 3 , 3 5, 37 , 3 8 , 3 9 3 . 3 V

Sandy Bridge Processor 1/7 B - 3

B.Schematic Diagrams

20
20
20
20

B2 7
B2 5
A2 5
B2 4

I_ T X N0
I_ T X N1
I_ T X N2
I_ T X N3

PCI EXPRESS* - GRAPHICS

DM
DM
DM
DM

DMI

20
20
20
20

Intel(R ) FDI

H1 6
H 15
H 8
H 8 _ 0 D 4 _ 4 H 8 _0 D 4 _4 H 8 _ 0D 4 _ 4

P E G _ I C O MP I
P E G_ I C OM P O
P E G _ R C OM P O

Schematic Diagrams

Sandy Bridge Processor 2/7
Sandy Bridge Processor 2/7 ( CLK,MISC,JTAG )

Processor Pullups/Pull downs

PU/PD for JTAG signals

1 .0 5 V S_ V T T

1. 0 5 V S _ V T T
H _ P R O C H OT #
P _ TM S
P _ TD I _ R
P _ P RE Q #
P _ TD O_ R
P _ TC L K
P _ TR S T #

U 49 B

R 4 94

1 K _0 4

P R OC _S E LE C T #

I f PR OC HO T# is n ot u se d,
t he n it m us t b e te rm in at ed
w it h a 56 -O +- 5% p ul l- up
r es is to r to 1. 05 VS _V TT .

AL 3 3
C A TE R R #

AN3 3
2 3, 3 4

H _ P R OC H O T#

3 9 H _ P R O C H OT #

H_ P E CI

R1 0 9

PEC I

56 _ 1 % _0 4

H _ P R O C H OT # _ D

2 3 H _ TH R M T R I P #

Sheet 3 of 49
Sandy Bridge
Processor 2/7

AL 3 2

P R OC H OT #

AN3 2
T H E R MT R I P #

D P L L _R E F _ S S C LK
DP L L _ RE F _ S SC L K#

S M _ R C OM P [ 0]
S M _ R C OM P [ 1]
S M _ R C OM P [ 2]

10 K _ 0 4

TRACE WIDTH 10MIL, LENGTH <500MILS

A2 8
A2 7

CL K _ E X P _ P 1 9
CL K _ E X P _ N 1 9

A1 6
A1 5

CL K _ DP _ P 1 9
C L K _ D P _ N 19

R8

C P UD RA M RS T #

AK1
A5
A4

S M _ R C O MP _0
S M _ R C O MP _1
S M _ R C O MP _2

AP2 9
AP2 7

X D P _P R D Y #
X D P _P R E Q#

A R2 6
A R2 7
AP3 0

X D P _T C LK
X D P _T M S
X D P _T R S T#

A R2 8
AP2 6

X D P _T D I _R
X D P _T D O_ R

A L 35

X D P _D B R _ R

A T 28
A R2 9
A R3 0
A T 30
AP3 2
A R3 1
A T 31
A R3 2

X DP
X DP
X DP
X DP
X DP
X DP
X DP
X DP

S M_ D R A MR S T #

DDR3 Compensation Signals
S M_ R C OM P _ 0

R5 3 1

14 0 _ 1 %_ 0 4

S M_ R C OM P _ 1

R5 2 8

25 . 5 _ 1 %_ 0 4

S M_ R C OM P _ 2

R5 2 9

20 0 _ 1 %_ 0 4

S3 circuit:- DRAM PWR GOOD logic
3 . 3V

13 0 _ 1% _ 0 4

V D D P W R G OO D _ R

V8
S M _D R A M P W R OK

1 . 05 V S _ V T T
B UF _ C P U_ RS T #

AR3 3
RE S ET #

3 .3 VS

R5 1 2
7 5_ 0 4

R 6 58
3

1 0K _0 4

U1 4
* MC 7 4V H C 1 G 08 D F T 1G

R1 8 6

P MS Y S _ P W R G D _ B U F

R 16 8
* 39 _ 0 4
0_04

Q 13

G

S

* MT N 7 0 0 2Z H S 3

H _ P R O C H OT #
D

Q 37 A
S M TD N 7 0 0 2Z H S 6 R

Q1 6

G

3 4 H _ P R OC H OT # _ E C

C6 2 2
MT N 7 0 0 2 Z H S 3
47 p _ 50 V _ N P O_ 0 4

*1 . 5 K _ 1% _ 0 4
1 0 0K _ 0 4

C 6 21

S3 circuit:- DRAM_RST# to memory
should be high during S3
1 .5 V

R 51 7
10 0 K _ 0 4

*0 . 1 u_ 1 6 V _ Y 5V _0 4
4

2

2 0, 3 7 1 . 8 V S _ P W R G D

P Z 9 8 8 2 7-3 6 4 B -0 1F

R 20 3
R 52 4

M0 _ R
M1 _ R
M2 _ R
M3 _ R
M4 _ R
M5 _ R
M6 _ R
M7 _ R

3 5 , 3 7, 38 S U S B

D

R5 1 8

_B P
_B P
_B P
_B P
_B P
_B P
_B P
_B P

Q 3 7B
M T DN7 0 0 2 Z HS 6 R
4

6
1 2 , 22 , 2 8 P L T _R S T #

# [ 0]
# [ 1]
# [ 2]
# [ 3]
# [ 4]
# [ 5]
# [ 6]
# [ 7]

R 17 5
2 0 0 _1 % _ 04

1

2 0 P M _D R A M_ P W R GD

4 3 . 2_ 1 % _0 4 B U F _ C P U _ R S T#

D

5G

2G

DBR #
BPM
BPM
BPM
BPM
BPM
BPM
BPM
BPM

1 .5 V S _ CP U

S

R5 1 5

S

Buffered reset to CPU

5

U N C O R E P W R G OO D

T DI
T DO

R1 8 8

D

R1 7 4

AP3 3

C 2 78
R 1 87

3

P M S Y S _P W R G D _ B U F

H _ C P U P W R GD _R

T CK
T MS
TR S T #

* 10 0 K _ 04

2 3 H _ C P U P W R GD

P M _S Y N C

*1 0 mi l _ sh o rt

JTAG & BPM

R4 9 8

PWR MANAGEMENT

A M3 4

2 0 H _ P M_ S Y N C

3 .3 V

* 2 00 _ 0 4

P R DY #
PREQ #

1
6 8 p _5 0 V _ N P O _ 04
* 75 0 _ 1% _ 0 4

CAD Note: Capacitor need to be placed
close to buffer output pin

R2 3 1

* 0 _0 4

R 2 30
1 K_ 0 4

Q1 7
MT N 7 0 0 2 Z H S 3
S
D

C P U D R A MR S T #

6 , 8 , 9 , 1 0, 2 5 , 2 9 , 35 , 3 7 , 3 8 1 . 5 V
6 ,3 5 ,3 8 1 .5 V S_ C PU
2 , 5 , 2 3 , 24 , 2 5 , 3 5, 3 9 1 . 0 5V S _V TT
2 , 8 , 1 1 , 12 , 1 6 , 1 8, 1 9 , 2 0 , 22 , 2 3 , 2 4, 2 5 , 2 7 , 28 , 2 9 , 3 0, 3 3 , 3 5, 37 , 3 8 , 3 9 3 . 3 V
9 , 1 0, 1 1 , 1 2, 18 , 1 9 , 20 , 2 1 , 2 2, 23 , 2 4 , 25 , 2 7 , 2 8, 2 9 , 3 0 , 31 , 3 2 , 3 3, 3 4 , 3 5 , 39 3 . 3 V S

B - 4 Sandy Bridge Processor 2/7

R2 3 5

1 K _ 04

D D R 3 _ D R A MR S T # 9 , 1 0

D RA M RS T _ CN T RL 8 ,1 9

G

B.Schematic Diagrams

S K T OC C #

X D P _D B R _R
H _C A T E R R #

B C LK
BC L K#

C2 6

AN3 4

CLOCKS

H _S N B _ I V B #

2 3 H _ SNB _ IVB #
3 . 3V S

62 _ 0 4

H _ C P U P W R GD _ R R 4 9 9

DDR3
MISC

XD
XD
XD
XD
XD
XD

MISC

R5 1 0
R5 0 6
R5 0 8
R5 1 1
R5 1 3
R5 0 5

THERMAL

5 1_ 0 4
5 1_ 0 4
* 5 1_ 0 4
5 1_ 0 4
5 1_ 0 4
5 1_ 0 4

R1 1 0

R 22 5

C3 1 5

4 . 9 9 K _1 % _ 0 4

0 . 0 47 u _ 10 V _ X 7 R _ 0 4

Schematic Diagrams

Sandy Bridge Processor 3/7
Sandy Bridge Processor 3/7 ( DDR3 )
U49
C

9
9
9

M
_A_BS0
M
_A_BS1
M
_A_BS2

9
9
9

M
_A_CAS#
M
_A_RAS#
M
_A_WE#

C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G
10
G
9
F9
F7
G
8
G
7
K4
K5
K1
J1
J5
J4
J2
K2
M
8
N10
N8
N7
M
10
M
9
N9
M
7
AG
6
AG
5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM
12
AM
11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15

AE10
AF10
V6

AE8
AD9
AF9

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

PZ9
8827-364B- 01
F

SA_CLK[ 0]
SA_CLK#
[ 0]
SA_CKE[ 0]

SA_CLK[ 1]
SA_CLK#
[ 1]
SA_CKE[ 1]

SA_CLK[ 2]
SA_CLK#
[ 2]
SA_CKE[ 2]

SA_CLK[ 3]
SA_CLK#
[ 3]
SA_CKE[ 3]

SA_CS#
[ 0]
SA_CS#
[ 1]
SA_CS#
[ 2]
SA_CS#
[ 3]

SA_ODT
[ 0]
SA_ODT
[ 1]
SA_ODT
[ 2]
SA_ODT
[ 3]

SA_DQ
S#[ 0]
SA_DQ
S#[ 1]
SA_DQ
S#[ 2]
SA_DQ
S#[ 3]
SA_DQ
S#[ 4]
SA_DQ
S#[ 5]
SA_DQ
S#[ 6]
SA_DQ
S#[ 7]

SA_DQS[ 0]
SA_DQS[ 1]
SA_DQS[ 2]
SA_DQS[ 3]
SA_DQS[ 4]
SA_DQS[ 5]
SA_DQS[ 6]
SA_DQS[ 7]

SA_MA[ 0]
SA_MA[ 1]
SA_MA[ 2]
SA_MA[ 3]
SA_MA[ 4]
SA_MA[ 5]
SA_MA[ 6]
SA_MA[ 7]
SA_MA[ 8]
SA_MA[ 9]
SA_M
A[10]
SA_M
A[11]
SA_M
A[12]
SA_M
A[13]
SA_M
A[14]
SA_M
A[15]

AB6
AA6
V9

M
_A_CLK_DDR0 9
M
_A_CLK_DDR#0 9
M
_A_CKE0 9

AA5
AB5
V10

10 M_B_DQ
[ 63: 0]
M
_B_DQ0
M
_B_DQ1
M
_B_DQ2
M
_B_DQ3
M
_B_DQ4
M
_B_DQ5
M
_B_DQ6
M
_B_DQ7
M
_B_DQ8
M
_B_DQ9
M
_B_DQ10
M
_B_DQ11
M
_B_DQ12
M
_B_DQ13
M
_B_DQ14
M
_B_DQ15
M
_B_DQ16
M
_B_DQ17
M
_B_DQ18
M
_B_DQ19
M
_B_DQ20
M
_B_DQ21
M
_B_DQ22
M
_B_DQ23
M
_B_DQ24
M
_B_DQ25
M
_B_DQ26
M
_B_DQ27
M
_B_DQ28
M
_B_DQ29
M
_B_DQ30
M
_B_DQ31
M
_B_DQ32
M
_B_DQ33
M
_B_DQ34
M
_B_DQ35
M
_B_DQ36
M
_B_DQ37
M
_B_DQ38
M
_B_DQ39
M
_B_DQ40
M
_B_DQ41
M
_B_DQ42
M
_B_DQ43
M
_B_DQ44
M
_B_DQ45
M
_B_DQ46
M
_B_DQ47
M
_B_DQ48
M
_B_DQ49
M
_B_DQ50
M
_B_DQ51
M
_B_DQ52
M
_B_DQ53
M
_B_DQ54
M
_B_DQ55
M
_B_DQ56
M
_B_DQ57
M
_B_DQ58
M
_B_DQ59
M
_B_DQ60
M
_B_DQ61
M
_B_DQ62
M
_B_DQ63

M
_A_CLK_DDR1 9
M
_A_CLK_DDR#1 9
M
_A_CKE1 9

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG
1
AH1

M
_A_CS#0 9
M
_A_CS#1 9

AH3
AG
3
AG
2
AH2

M
_A_ODT0 9
M
_A_ODT1 9

C4
G6
J3
M6
AL6
AM
8
AR12
AM
15

M
_A_DQS#0
M
_A_DQS#1
M
_A_DQS#2
M
_A_DQS#3
M
_A_DQS#4
M
_A_DQS#5
M
_A_DQS#6
M
_A_DQS#7

D4
F6
K3
N6
AL5
AM
9
AR11
AM
14

M
_A_DQS0
M
_A_DQS1
M
_A_DQS2
M
_A_DQS3
M
_A_DQS4
M
_A_DQS5
M
_A_DQS6
M
_A_DQS7

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

M
_A_A0
M
_A_A1
M
_A_A2
M
_A_A3
M
_A_A4
M
_A_A5
M
_A_A6
M
_A_A7
M
_A_A8
M
_A_A9
M
_A_A10
M
_A_A11
M
_A_A12
M
_A_A13
M
_A_A14
M
_A_A15

M_A_DQS#[ 7:0] 9

M_A_DQS[ 7:0] 9

M_A_A[15:0] 9

10
10
10

M_B_BS0
M_B_BS1
M_B_BS2

10
10
10

M_B_CAS#
M_B_RAS#
M_B_WE#

C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA9
AA7
R6

AA10
AB8
AB9

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]

SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]

SB_CLK[2]
SB_CLK#[2]
SB_CKE[2]

SB_CLK[3]
SB_CLK#[3]
SB_CKE[3]

SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]

SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[ 10]
SB_MA[ 11]
SB_MA[ 12]
SB_MA[ 13]
SB_MA[ 14]
SB_MA[ 15]

AE2
AD2
R9

M_B_CLK_DDR2 10
M_B_CLK_DDR#2 10
M_B_CKE2 10

AE1
AD1
R10

M_B_CLK_DDR3 10
M_B_CLK_DDR#3 10
M_B_CKE3 10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

M_B_CS#2 10
M_B_CS#3 10

AE4
AD4
AD5
AE5

M_B_ODT2 10
M_B_ODT3 10

D7
F3
K6
N3
AN5
AP9
AK12
AP15

M
_B_DQS#0
M
_B_DQS#1
M
_B_DQS#2
M
_B_DQS#3
M
_B_DQS#4
M
_B_DQS#5
M
_B_DQS#6
M
_B_DQS#7

C7
G3
J6
M3
AN6
AP8
AK11
AP14

M
_B_DQS0
M
_B_DQS1
M
_B_DQS2
M
_B_DQS3
M
_B_DQS4
M
_B_DQS5
M
_B_DQS6
M
_B_DQS7

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M
_B_A0
M
_B_A1
M
_B_A2
M
_B_A3
M
_B_A4
M
_B_A5
M
_B_A6
M
_B_A7
M
_B_A8
M
_B_A9
M
_B_A10
M
_B_A11
M
_B_A12
M
_B_A13
M
_B_A14
M
_B_A15

Sheet 4 of 49
Sandy Bridge
Processor 3/7

M
_B_DQS#[7:0] 10

M
_B_DQS[7: 0] 10

M_B_A[15:0] 10

PZ98827-364B-01F

Sandy Bridge Processor 3/7 B - 5

B.Schematic Diagrams

M_A_DQ
0
M_A_DQ
1
M_A_DQ
2
M_A_DQ
3
M_A_DQ
4
M_A_DQ
5
M_A_DQ
6
M_A_DQ
7
M_A_DQ
8
M_A_DQ
9
M_A_DQ
10
M_A_DQ
11
M_A_DQ
12
M_A_DQ
13
M_A_DQ
14
M_A_DQ
15
M_A_DQ
16
M_A_DQ
17
M_A_DQ
18
M_A_DQ
19
M_A_DQ
20
M_A_DQ
21
M_A_DQ
22
M_A_DQ
23
M_A_DQ
24
M_A_DQ
25
M_A_DQ
26
M_A_DQ
27
M_A_DQ
28
M_A_DQ
29
M_A_DQ
30
M_A_DQ
31
M_A_DQ
32
M_A_DQ
33
M_A_DQ
34
M_A_DQ
35
M_A_DQ
36
M_A_DQ
37
M_A_DQ
38
M_A_DQ
39
M_A_DQ
40
M_A_DQ
41
M_A_DQ
42
M_A_DQ
43
M_A_DQ
44
M_A_DQ
45
M_A_DQ
46
M_A_DQ
47
M_A_DQ
48
M_A_DQ
49
M_A_DQ
50
M_A_DQ
51
M_A_DQ
52
M_A_DQ
53
M_A_DQ
54
M_A_DQ
55
M_A_DQ
56
M_A_DQ
57
M_A_DQ
58
M_A_DQ
59
M_A_DQ
60
M_A_DQ
61
M_A_DQ
62
M_A_DQ
63

DDR SYSTEM MEMORY B

M_A_DQ[63:0]

DDR SYSTEM MEMORY A

9

U49D

Schematic Diagrams

Sandy Bridge Processor 4/7
Sandy Bridge Processor 4/7 ( POWER )
U49F

POWER

PRO CESSOR CORE POWER

C169

C162

C628

VCORE

10u_6.3V_X5R_06

10u_6.3V_X5
R_06

10u
_6.3V_X5R_06

C17
4

C192

C193

C171

C175

10u_6.3V_X5R_06

10u_6.3V_X5R_06

C173

*10u_6.3V_X5R_06

C172

*10u_6. 3V_X5R_06

C170

*10u_6.3V_
X5R_06

C191

*1
0u_6.3V_X5R_06

C19
0

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

PZ98827-364B-01F

B - 6 Sandy Bridge Processor 4/7

8 .5A

1.05VS_VTT
AG
35
AG
34
AG
33
AG
32
AG
31
AG
30
AG
29
AG
28
AG
27
AG
26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

PEG AND DD R

22u_6.3V_
X5R_08

C627

22u_6.3V_X5R_08

22u_6.3V_X5R_08

2
2u_6.3V_X5R_08

C62
0

*22u_6.3V_X5R_0
8

C613

22u_6.3V_X5R_08

C161

*22u_6
. 3V_X5R_08

C125

22u_6.3V_X5R_08

C619

*22u_6. 3V_X5R_08

C16
6
*2
2u_6.3V_X5R_08

22u_6.3V_X5
R_08

C618

22u_6.3V_X5R_08

C617

*22u_6
.3
V_X5R_08

C165

22u_6
. 3V_X5R_
08

C616

22u_6
. 3V_X5R_
08

Sheet 5 of 49
Sandy Bridge
Processor 4/7

C61
5

10u_6
. 3V_X5R_
06

B.Schematic Diagrams

VCORE

4 8A
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

1.05VS_VT
T

+C668

C223

C222

C236

C230

C237

22u_6.3V_X5R_0
8

22u_6.3V_X5R_08

22u_6.3V_X5R_0
8

22u_6.3V_X5R_08

22u_6.3V_X5R_0
8

C231

C654

C650

C247

C652

22u_6.3V_X5R_0
8

22u_6.3V_X5R_08

22u_6.3V_X5R_0
8

22u_6.3V_X5R_08

22u_6.3V_X5R_0
8

C659

C647

C646

C645

C644

22u_6.3V_X5R_0
8

22u_6.3V_X5R_08

22u_6.3V_X5R_0
8

22u_6.3V_X5R_08

22u_6.3V_X5R_0
8

C643

C642

C641

C640

C629

*22u_6.3V_X5R_08

*22u_6.3V_X5R_08

*22u_6.3V_X5R_08

*22u_6.3V_X5R_08

*22u_6. 3V_X5R_08

C216

C194

C195

C226

C225

*22u_6.3V_X5R_08

*22u_6.3V_X5R_08

*22u_6.3V_X5R_08

*22u_6.3V_X5R_08

*22u_6. 3V_X5R_08

C224

C227

C228

C229

*22u_6.3V_X5R_08

*22u_6.3V_X5R_08

*22u_6.3V_X5R_08

*22u_6.3V_X5R_08

J23 1. 05VS_VCCP_F R129

*15
mil_short_06

220u_6.3V_6.3*6. 3*4.2

+C639
220u_6.3V_6.3*6. 3*4.2

1.05VS_VTT

CAD Note: H_CPU_SVIDALRT# _R,H_CPU_SVIDDAT_R
Place the PU resistors cl ose to CPU

SVID Signals
1.05VS_VT
T

SV ID

SV 48

VIDALERT#
VIDSCLK
VIDSOUT

AJ29
AJ30
AJ28

H_CPU_SVIDALRT#_R
H_CPU_SVIDCLK_R
H_CPU_SVIDDAT_R

R116
R114
R120

43.2_1%_04
0_04
0_04

H_CPU_SVIDALRT
# 39
H_CPU_SVIDCLK 39
H_CPU_SVIDDAT 39

CAD Note: H_CPU_SVIDCLK_R
Place the PU
resistors close to VR

VCORE

R87
100_04

VCO
RE_VCC_SENSE 39
VCO
RE_VSS_SENSE 39
R94
100_04
1.05VS_VTT

SE NSE LIN ES

ICCMAX Maximum Processor

PRO CESSO R UNCO RE PO WER

CO RE SUP PLY

VCORE

VCC_SENSE
VSS_SENSE

VCCIO_SENSE
VSSIO_SENSE

AJ35
AJ34

R523
1
0_04

B10
A10

VCCP_SENSE 38
VSSP_SENSE 38

R526
10_04

40
VCORE
2,3,23, 24
,2
5,35,39 1
.0
5VS_VTT

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT_R

R118
R117
R122

75_04
*54.9_1%_04
130_1%_04

Schematic Diagrams

Sandy Bridge Processor 5/7
Sandy Bridge Processor 5/7 ( GRAPHICS POWER )
1 .5 V

POWER
U 4 9G

R 2 63

C6 5 5

C1 8 5

C1 8 4

2 2 u_ 6 . 3 V _ X 5R _ 08

2 2u _ 6 . 3 V _ X5 R _0 8

22 u _ 6 . 3V _X 5 R _ 0 8

2 2u _ 6 . 3 V _X 5 R _0 8

C2 1 2

C6 3 2

C6 2 4

2 2 u_ 6 . 3 V _ X 5R _ 08

2 2u _ 6 . 3 V _ X5 R _0 8

22 u _ 6 . 3V _X 5 R _ 0 8

2 2u _ 6 . 3 V _X 5 R _0 8

C1 8 9
+
22 0 u _ 6. 3 V _ 6 . 3 *6 . 3 *4 . 2

1.2A

1 .8 V S

+C 6 69
5 6 0 u _2 . 5 V _ 6 . 6 *6 . 6 *5 . 9

C 2 51

C 67 0

C 66 3

1 0 u _6 . 3 V _ X 5 R _ 0 6

1 u _6 . 3 V _ Y 5 V _ 0 4

1 u _ 6. 3 V _ X 5 R _ 0 4

B6
A6
A2

V C CP L L 1
V C CP L L 2
V C CP L L 3

R 2 66

1 K _ 1 % _0 4
V _ S M _V R E F _ C N T

10/22

* 1 00 K _ 1 % _0 4

S US B #

AL 1

V_ SM_ VR EF

0_04

R 2 65

C3 5 5

1 K _ 1 % _0 4
2 0, 2 9 , 3 4 , 3 5

R5 3 0 V _ SM _ V RE F _ C NT

S M_ V R E F

CAD Note: +V_SM_VREF should
have 10 mil trace width
1. 5 V S _C P U

12A
V D D Q1
V D D Q2
V D D Q3
V D D Q4
V D D Q5
V D D Q6
V D D Q7
V D D Q8
V D D Q9
V D D Q1 0
V D D Q1 1
V D D Q1 2
V D D Q1 3
V D D Q1 4
V D D Q1 5

AF 7
AF 4
AF 1
AC 7
AC 4
AC 1
Y 7
Y 4
Y 1
U 7
U 4
U 1
P7
P4
P1

+C 6 83

C 6 78

C 679

C6 7 7

1 0 u _6 . 3 V _ X 5 R _ 0 6

1 0 u _ 6. 3 V _ X 5 R _ 0 6

10 u _ 6 . 3V _X 5 R _ 0 6

C 6 80

C 681

C6 8 2

1 0 u _6 . 3 V _ X 5 R _ 0 6

1 0 u _ 6. 3 V _ X 5 R _ 0 6

10 u _ 6 . 3V _X 5 R _ 0 6

0 . 85 V S

6A
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC

SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8

M 27
M 26
L26
J26
J25
J24
H 26
H 25

Sheet 6 of 49
Sandy Bridge
Processor 5/7

5 6 0 u _2 . 5 V _ 6 . 6 *6 . 6 *5 . 9

C 163

C1 6 4

C1 5 1

1 0 u _ 6. 3 V _ X 5 R _ 0 8

10 u _ 6 . 3V _X 5 R _ 0 8

1 0u _ 6 . 3 V _X 5 R _0 6

C 126
+
* 3 30 U _ 2. 5 V _ D 2_ D

1 .0 5 V S
H 23
V CC SA _ S E N S E

V CC S A _ S E N S E

V C CS A _ S E NS E

1 .5 V

R 12 6
R5 0 9

F C_ C2 2
V C CS A _ V ID1

37

C 2 2 R6 4 8
C 24

*0 _ 0 4

1 0 K _ 04

1 0 K _ 04
V C CS A_ V ID 0 3 7

P Z 98 8 2 7 -36 4 B -0 1 F

V CC S A _ V ID1 3 7
C3 0 8

C3 1 0

R 12 3
*1 0 K _ 0 4
1 .5 V S _ CP U

18 , 1 9 , 2 0, 24 , 2 5 , 2 9, 3 5 , 3 7 , 3 8, 3 9 1 . 0 5 V S
24 , 3 5
1 .5 V S
37
0 . 8 5V S
4 0 V GF X _ C O R E
3, 3 5 , 3 8 1 . 5V S _C P U
23 , 2 4 , 3 7 1. 8V S
3 , 8 , 9 , 1 0, 25 , 2 9 , 3 5, 3 7 , 3 8 1 . 5V
3, 9 , 1 0 , 1 1, 12 , 1 8 , 1 9, 2 0 , 2 1 , 2 2, 2 3 , 2 4 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 1 , 32 , 3 3 , 3 4, 35 , 3 9 3 . 3 V S

Sandy Bridge Processor 5/7 B - 7

B.Schematic Diagrams

C 22 0

V _ S M_ V R E F

0 . 1u _ 1 0 V _ X 5R _ 0 4

C 21 1

2 2 u _ 6. 3 V _ X 5 R _ 0 8

Q1 8
*A O 3 40 2 L
S
D

0 . 1u _ 1 0 V _ X 5R _ 0 4

C 6 56

V C C _ G T_ S E N S E 3 9
V S S _G T _S E N S E 39

0 . 1 u_ 1 0 V _ X 5 R _ 0 4

2 2u _ 6 . 3 V _X 5 R _0 8

A K 35
A K 34

G

22 u _ 6 . 3V _X 5 R _ 0 8

VREF

2 2u _ 6 . 3 V _ X5 R _0 8

C1 6 8

DDR3 -1.5V RAILS

2 2 u_ 6 . 3 V _ X 5R _ 08

C1 8 3

V A X G_ S E N S E
V S S A X G_ S E N S E

SA RAIL

C2 2 1

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54

MISC

2 2 u _ 6. 3 V _ X 5 R _ 0 8

C 19 9

VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG

GRAPHICS

C 1 98

AT2 4
AT2 3
AT2 1
AT2 0
AT1 8
AT1 7
A R2 4
A R2 3
A R2 1
A R2 0
A R1 8
A R1 7
AP2 4
AP2 3
AP2 1
AP2 0
AP1 8
AP1 7
A N2 4
A N2 3
A N2 1
A N2 0
A N1 8
A N1 7
A M2 4
A M2 3
A M2 1
A M2 0
A M1 8
A M1 7
AL 2 4
AL 2 3
AL 2 1
AL 2 0
AL 1 8
AL 1 7
AK2 4
AK2 3
AK2 1
AK2 0
AK1 8
AK1 7
AJ 2 4
AJ 2 3
AJ 2 1
AJ 2 0
AJ 1 8
AJ 1 7
A H2 4
A H2 3
A H2 1
A H2 0
A H1 8
A H1 7

SENSE
LINES

33A

1.8V RAIL

V G F X _ CO RE

Schematic Diagrams

Sandy Bridge Processor 6/7
Sandy Bridge Processor 6/7 ( GND )

B.Schematic Diagrams

U4 9H

CAD Note: 0 ohm resistor
should be placed close
to CPU

Sheet 7 of 49
Sandy Bridge
Processor 6/7

AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS1 0
VSS1 1
VSS1 2
VSS1 3
VSS1 4
VSS1 5
VSS1 6
VSS1 7
VSS1 8
VSS1 9
VSS2 0
VSS2 1
VSS2 2
VSS2 3
VSS2 4
VSS2 5
VSS2 6
VSS2 7
VSS2 8
VSS2 9
VSS3 0
VSS3 1
VSS3 2
VSS3 3
VSS3 4
VSS3 5
VSS3 6
VSS3 7
VSS3 8
VSS3 9
VSS4 0
VSS4 1
VSS4 2
VSS4 3
VSS4 4
VSS4 5
VSS4 6
VSS4 7
VSS4 8
VSS4 9
VSS5 0
VSS5 1
VSS5 2
VSS5 3
VSS5 4
VSS5 5
VSS5 6
VSS5 7
VSS5 8
VSS5 9
VSS6 0
VSS6 1
VSS6 2
VSS6 3
VSS6 4
VSS6 5
VSS6 6
VSS6 7
VSS6 8
VSS6 9
VSS7 0
VSS7 1
VSS7 2
VSS7 3
VSS7 4
VSS7 5
VSS7 6
VSS7 7
VSS7 8
VSS7 9
VSS8 0

PZ98827 -364B-0 1F

B - 8 Sandy Bridge Processor 6/7

U49I

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N 35
N 34
N 33
N 32
N 31
N 30
N 29
N 28
N 27
N 26
M34
L 33
L 30
L 27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J 34
J 31
H 33
H 30
H 27
H 24
H 21
H 18
H 15
H 13
H 10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G 35
G 32
G 29
G 26
G 23
G 20
G 17
G 11
F34
F31
F29

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

PZ98 827-3 64B-01F

VSS

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D3 5
D3 2
D2 9
D2 6
D2 0
D1 7
C3 4
C3 1
C2 8
C2 7
C2 5
C2 3
C1 0
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

Schematic Diagrams

Sandy Bridge Processor 7/7
Sandy Bridge Processor 7/7 ( RESERVED )
C FG S tr ap s fo r Pr oc ess or

? DIMM? ? ?

& TRACE? ?

PEG Static Lane Reversal - CFG2 is for the 16x
1 .5 V

1:(Default) Normal Operation; Lane #
definition matches socket pin map definition
0:Lane Reversed
C F G0

* 1K _ 0 4

C F G2
C
C
C
C

F G4
F G5
F G6
F G7

Display Port Presence Strap
1:(Default) Disabled; No Physical Display Port
CF G4 attached to Embedded Display Port
0:Enabled; An external Display Port device is
connected to the Embedded Display Port

CF G 4

R4 9 3

C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C

F G[ 0 ]
F G[ 1 ]
F G[ 2 ]
F G[ 3 ]
F G[ 4 ]
F G[ 5 ]
F G[ 6 ]
F G[ 7 ]
F G[ 8 ]
F G[ 9 ]
F G[ 1 0 ]
F G[ 1 1 ]
F G[ 1 2 ]
F G[ 1 3 ]
F G[ 1 4 ]
F G[ 1 5 ]
F G[ 1 6 ]
F G[ 1 7 ]

R S VD3 3
R S VD3 4
R S VD3 5

L7
A G7
AE7
AK2
W8

P U_ RS V D
P U_ RS V D
P U_ RS V D
P U_ RS V D

1
2
3
4

A J3 1
A H3 1
A J3 3
A H3 3

V R E F _C H _ A _ D I M M
V R E F _C H _ B _ D I M M

PCIE Port Bifurcation Straps

C FG [ 6: 5]
C F G5

R 49 2

*1 K _ 04

C F G6

R 50 0

*1 K _ 04

(Default) x16 - Device 1 functions 1 and 2 disabled
x8, x8 - Device 1 function 1 enabled ; function 2 disabled
Reserved - (Device 1 function 1 disabled ; function 2 enabled)
x8,x4,x4 - Device 1 functions 1 and 2 enabled

3. 3 V

R5 1 4

10 K _ 1 %_ 0 4

H _ S N B _I V B #_ P W R C T R L

R5 1 6

*1 0 mi l _ sh o rt

H _ S N B _ I V B # _ P W R C TR L _R

B4
D1

F25
F24
F23
D2 4
G2 5
G2 4
E2 3
D2 3
C3 0
A3 1
B3 0
B2 9
D3 0
B3 1
A3 0
C2 9

J2 0
B1 8
A1 9

M V R E F _D Q_ D I M MA 9
R1 5 0

C 3 57

1K _ 1 % _0 4

0 . 1 u _1 0 V _ X 5R _0 4

D R A M R S T _ C N TR L 3, 1 9
1. 5 V
R
R
R
R

S VD3 7
S VD3 8
S VD3 9
S VD4 0

T8
J 16
H1 6
G1 6

R6 4 3

V A X G_ V A L _ S E N S E
V S S A X G _V A L_ S E N S E
V C C _ V A L _S E N S E
V SS _ VA L _ S ENSE

R
R
R
R
R

S VD4 1
S VD4 2
S VD4 3
S VD4 4
S VD4 5

R
R
R
R
R

S VD4 6
S VD4 7
S VD4 8
S VD4 9
S VD5 0

*0 _ 0 4

R 15 9
Q1 0
*A O 3 40 2 L
S
D

V R E F _ C H _B _D I MM

A J2 6

11:
10:
01:
00:

R 1 49
*1 K _0 4

A T 26
A M3 3
A J 27

* 1K _ 0 4
H_ C
H_ C
H_ C
H_ C

1K _ 1 % _0 4

Q9
*A O 3 40 2 L
S
D M V R E F _D Q_ D I M 0

V R E F _ C H _A _D I MM

A R3 5
A T 34
A T 33
AP3 5
A R3 4

R 1 53
*1 K _0 4

1 K _ 1% _ 0 4
M V R E F _ D Q _ D I M1

M V R E F _D Q_ D I M MB 1 0
R 16 0

C3 6 7

1 K _ 1% _ 0 4

0 . 1 u_ 1 0V _X 5 R _ 0 4

Sheet 8 of 49
Sandy Bridge
Processor 7/7

R S V D5

R S V D6
R S V D7

R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R

S V D8
S V D9
S V D1 0
S V D1 1
S V D1 2
S V D1 3
S V D1 4
S V D1 5
S V D1 6
S V D1 7
S V D1 8
S V D1 9
S V D2 0
S V D2 1
S V D2 2
S V D2 3

R S V D2 4
R S V D2 5
V C C I O _S E L

R S VD5 1
R S VD5 2

B3 4
A3 3
A3 4
B3 5
C3 5

D R A MR S T_ C N T R L 3 , 1 9

A J 32
AK3 2

A H2 7
V CC _ DIE _ S E NS E

R S VD5 4
R S VD5 5

R S VD5 6
R S VD5 7
R S VD5 8

A N3 5
A M3 5

AT2
AT1
A R1

J1 5

On CRB
H_SNB_IVB#_PWRCTRL = low, 1.0V
H_SNB_IVB#_PWRCTRL = high/NC, 1.05V

PEG DEFER TRAINING
1: (Default) PEG Train immediately following xxRESETB de assertion
CF G 7 0: PEG Wait for BIOS for training

CF G 7

R4 9 1

R S V D2 7
KEY

B1

P Z 98 8 2 7-3 6 4 B -01 F

* 1K _ 0 4

3, 6 , 9 , 1 0, 25 , 2 9 , 35 , 3 7 , 38 1 . 5 V
2, 3 , 1 1 , 12 , 1 6 , 1 8, 1 9 , 2 0, 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0, 33 , 3 5 , 37 , 3 8 , 39 3 . 3 V

Sandy Bridge Processor 7/7 B - 9

B.Schematic Diagrams

AK2 8
AK2 9
A L2 6
A L2 7
AK2 6
A L2 9
A L3 0
A M3 1
A M3 2
A M3 0
A M2 8
A M2 6
A N2 8
A N3 1
A N2 6
A M2 7
AK3 1
A N2 9

S VD2 8
S VD2 9
S VD3 0
S VD3 1
S VD3 2

G

R5 0 3

*0 _ 0 4
R1 5 5

R
R
R
R
R

G

CF G 2

R6 4 2
U 4 9E

RESERVED

CF G2

Schematic Diagrams

DDR3 SO-DIMM_0
SO-DIMM A

B.Schematic Diagrams

CHANGE TO STANDARD
C 35 4
M_ A _ C L K _ D D R 0

*1 0 p_ 5 0 V _N P O_ 0 4
M _ A _C L K _D D R # 0

C 34 8
M_ A _ C L K _ D D R 1

*1 0 p_ 5 0 V _N P O_ 0 4
M _ A _C L K _D D R # 1

4

JD I MM 1A

M_ A _ A [ 1 5 : 0 ]

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

La yout Note :
si gna l/ spa ce /si gna l:
8 / 4 /8

Sheet 9 of 49
DDR3 SO-DIMM_0

4
4
4
4

4
4
4
4
4
M
M
M
M
4
4
4
4
4

M _ A _B S 0
M _ A _B S 1
M _ A _B S 2
M _ A _C S # 0
M _ A _C S # 1
_ A _C L K _D D R 0
_ A _C L K _D D R # 0
_ A _C L K _D D R 1
_ A _C L K _D D R # 1
M _ A _C K E 0
M _ A _C K E 1
M_ A _ C A S #
M_ A _ R A S #
M_ A _ W E #

_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A

_A 0
_A 1
_A 2
_A 3
_A 4
_A 5
_A 6
_A 7
_A 8
_A 9
_A 1 0
_A 1 1
_A 1 2
_A 1 3
_A 1 4
_A 1 5

98
97
96
95
92
91
90
86
89
85
1 07
84
83
1 19
80
78
1 09
1 08
79
1 14
1 21
1 01
1 03
1 02
1 04
73
74
1 15
1 10
1 13
1 97
2 01
2 02
2 00

SA 0 _ DIM 0
SA 1 _ DIM 0

1 0, 1 9 S M B _C L K
1 0, 1 9 S M B _D A T A
4
4

1 16
1 20

M _ A _O D T 0
M _ A _O D T 1

11
28
46
63
1 36
1 53
1 70
1 87
4

M _A _D QS [ 7 : 0 ]

3 .3 V S
4 M _ A _ D QS #[ 7 : 0 ]
RN 3
10 K _ 8 P 4 R _ 0 4
1
8 S A 1 _ D I M1
2
7 S A 0 _ D I M1
3
6 S A 1 _ D I M0
4
5 S A 0 _ D I M0

S A 1 _ DIM 1 1 0
S A 0 _ DIM 1 1 0

M
M
M
M
M
M
M
M

_A
_A
_A
_A
_A
_A
_A
_A

_D
_D
_D
_D
_D
_D
_D
_D

QS 0
QS 1
QS 2
QS 3
QS 4
QS 5
QS 6
QS 7

12
29
47
64
1 37
1 54
1 71
1 88

M
M
M
M
M
M
M
M

_A
_A
_A
_A
_A
_A
_A
_A

_D
_D
_D
_D
_D
_D
_D
_D

QS # 0
QS # 1
QS # 2
QS # 3
QS # 4
QS # 5
QS # 6
QS # 7

10
27
45
62
1 35
1 52
1 69
1 86

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 1 0 /AP
A1 1
A 1 2 /BC #
A1 3
A1 4
A1 5

DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 8
DQ 9
DQ 1 0
DQ 1 1
DQ 1 2
DQ 1 3
DQ 1 4
DQ 1 5
DQ 1 6
DQ 1 7
DQ 1 8
DQ 1 9
DQ 2 0
DQ 2 1
DQ 2 2
DQ 2 3
DQ 2 4
DQ 2 5
DQ 2 6
DQ 2 7
DQ 2 8
DQ 2 9
DQ 3 0
DQ 3 1
DQ 3 2
DQ 3 3
DQ 3 4
DQ 3 5
DQ 3 6
DQ 3 7
DQ 3 8
DQ 3 9
DQ 4 0
DQ 4 1
DQ 4 2
DQ 4 3
DQ 4 4
DQ 4 5
DQ 4 6
DQ 4 7
DQ 4 8
DQ 4 9
DQ 5 0
DQ 5 1
DQ 5 2
DQ 5 3
DQ 5 4
DQ 5 5
DQ 5 6
DQ 5 7
DQ 5 8
DQ 5 9
DQ 6 0
DQ 6 1
DQ 6 2
DQ 6 3

BA 0
BA 1
BA 2
S0 #
S1 #
C K0
C K0 #
C K1
C K1 #
C KE0
C KE1
C AS#
R AS#
WE #
SA 0
SA 1
SC L
SD A
O DT 0
O DT 1
D
D
D
D
D
D
D
D

M0
M1
M2
M3
M4
M5
M6
M7

D
D
D
D
D
D
D
D

QS 0
QS 1
QS 2
QS 3
QS 4
QS 5
QS 6
QS 7

D
D
D
D
D
D
D
D

QS 0 #
QS 1 #
QS 2 #
QS 3 #
QS 4 #
QS 5 #
QS 6 #
QS 7 #

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
12 9
13 1
14 1
14 3
13 0
13 2
14 0
14 2
14 7
14 9
15 7
15 9
14 6
14 8
15 8
16 0
16 3
16 5
17 5
17 7
16 4
16 6
17 4
17 6
18 1
18 3
19 1
19 3
18 0
18 2
19 2
19 4

_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A
_A

_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D
_D

M_ A _ D Q [ 63 : 0 ] 4

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q1 0
Q1 1
Q1 2
Q1 3
Q1 4
Q1 5
Q1 6
Q1 7
Q1 8
Q1 9
Q2 0
Q2 1
Q2 2
Q2 3
Q2 4
Q2 5
Q2 6
Q2 7
Q2 8
Q2 9
Q3 0
Q3 1
Q3 2
Q3 3
Q3 4
Q3 5
Q3 6
Q3 7
Q3 8
Q3 9
Q4 0
Q4 1
Q4 2
Q4 3
Q4 4
Q4 5
Q4 6
Q4 7
Q4 8
Q4 9
Q5 0
Q5 1
Q5 2
Q5 3
Q5 4
Q5 5
Q5 6
Q5 7
Q5 8
Q5 9
Q6 0
Q6 1
Q6 2
Q6 3

J D I MM 1B
1 .5 V
75
76
81
82
87
88
93
94
99
1 00
1 05
1 06
1 11
1 12
1 17
1 18
1 23
1 24

3 .3 V S

2 0 mi ls
C 3 59

C3 6 0

1 u _ 6. 3V _ X 5 R _ 0 4

0 . 1 u_ 1 6 V _Y 5 V _0 4

VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD

D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2
D1 3
D1 4
D1 5
D1 6
D1 7
D1 8

1 99
V D DS P D
3 .3 V S
R 2 51

77
1 22
1 25

1 0K _0 4

1 98
30

10 T S # _ D I MM 0 _1
3 , 10 D D R 3_ D R A MR S T #
C 3 75
C 3 74

1 u_ 6 . 3 V _ X5 R _0 4
0 . 1 u_ 1 6 V _Y 5 V _0 4

M V R E F _ D Q_ D I M MA

1
1 26

N C1
N C2
N CT E S T
EVEN T #
R ESET #

V R E F _ DQ
V R E F _ CA

8 M V R E F _ D Q_ D I M MA
M V R E F _ D I M0
C 3 28
C 3 25

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

1 u_ 6 . 3 V _ X5 R _0 4
0 . 1 u_ 1 6 V _Y 5 V _0 4

CLOS E TO S O- DIM M _0
R2 2 9

1 . 5V

1 K _ 1 % _0 4

MV R E F _ D I M 0

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS1 0
VSS1 1
VSS1 2
VSS1 3
VSS1 4
VSS1 5

VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS
VS

S 16
S 17
S 18
S 19
S 20
S 21
S 22
S 23
S 24
S 25
S 26
S 27
S 28
S 29
S 30
S 31
S 32
S 33
S 34
S 35
S 36
S 37
S 38
S 39
S 40
S 41
S 42
S 43
S 44
S 45
S 46
S 47
S 48
S 49
S 50
S 51
S 52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

V T T_ M E M
V T T1
V T T2
G1
G2

203
204
G ND 1
G ND 2

7 8 1 21 -0 0 11

R 2 39

C 3 16

1 K _ 1 % _0 4

0 . 1 u _ 10 V _ X 5R _ 04

78 1 2 1-0 0 1 1

V T T _M E M

C3 3 4

C 37 6

C3 6 6

C 34 1

C3 4 0

10 u _ 10 V _ Y 5 V _ 0 8

1 u _6 . 3 V _ X 5R _0 4

1u _ 6 . 3V _X 5 R _ 0 4

1 u _6 . 3 V _ X5 R _0 4

1u _ 6 . 3V _ X 5 R _ 0 4

C3 6 4

C 37 0

C3 3 3

C 33 7

C3 3 8

C 33 0

C3 7 1

C3 3 6

C 3 32

C3 3 9

0. 1 u _ 16 V _ Y 5 V _ 0 4

0 . 1 u_ 1 6 V _ Y 5 V _ 04

0. 1 u _ 16 V _ Y 5 V _ 0 4

0 . 1 u_ 1 6 V _Y 5 V _ 04

0. 1 u _ 16 V _ Y 5 V _ 0 4

0 . 1 u_ 1 6 V _Y 5 V _ 04

0. 1 u _ 16 V _ Y 5 V _ 0 4

0 . 1 u_ 1 6 V _Y 5 V _0 4

0. 1 u _ 16 V _ Y 5 V _ 0 4

0 . 1 u_ 1 6 V _Y 5 V _0 4

1. 5 V

2 4, 3 5 1 . 5 V S
1 0, 3 8 V T T _M E M
3 , 6 , 8 , 1 0, 2 5 , 2 9, 3 5 , 3 7, 38 1 . 5 V
3 , 10 , 1 1 , 12 , 1 8 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5 , 27 , 2 8 , 29 , 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 5, 39 3 . 3 V S

1 . 5V

+ C3 9 4
22 0 u _6 . 3 V _ 6 . 3* 6. 3* 4. 2

B - 10 DDR3 SO-DIMM_0

+ C3 8 2
*2 2 0u _ 6 . 3V _ 6 . 3 *6 . 3 *4 . 2

C3 3 5

C 36 1

C3 2 4

C 36 8

C3 6 9

C3 3 1

C 3 65

C3 6 3

10 u _ 10 V _ Y 5 V _ 0 8

1 0 u_ 1 0 V _Y 5 V _0 8

10 u _ 6. 3 V _ X 5R _ 06

1 u _6 . 3 V _ X5 R _0 4

1u _ 6 . 3V _ X 5 R _ 0 4

1 u _6 . 3 V _ X5 R _0 4

1u _ 6 . 3V _ X 5 R _ 0 4

1 u _6 . 3 V _ X5 R _0 4

Schematic Diagrams

DDR3 SO-DIMM_1
SO-DIMM B

CHANGE TO STANDARD

J D I M M2 B
C4 0 5
M _ B _C L K _ D D R 2

*1 0 p_ 5 0 V _ N P O _ 04
M _B _ C LK _D D R # 2

C4 0 1
M _ B _C L K _ D D R 3

*1 0 p_ 5 0 V _ N P O _ 04
M _B _ C LK _D D R # 3

4

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

La y out N ot e :
signa l/ spac e /si gna l :
8/ 4 / 8

_B _ A 0
_B _ A 1
_B _ A 2
_B _ A 3
_B _ A 4
_B _ A 5
_B _ A 6
_B _ A 7
_B _ A 8
_B _ A 9
_B _ A 1 0
_B _ A 1 1
_B _ A 1 2
_B _ A 1 3
_B _ A 1 4
_B _ A 1 5

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

116
120

M _B _O D T 2
M _B _O D T 3

11
28
46
63
136
153
170
187
4

M _B _ D QS [ 7 : 0 ]

4 M _ B _D QS #[ 7 : 0 ]

M
M
M
M
M
M
M
M

_B _ D
_B _ D
_B _ D
_B _ D
_B _ D
_B _ D
_B _ D
_B _ D

QS 0
QS 1
QS 2
QS 3
QS 4
QS 5
QS 6
QS 7

12
29
47
64
137
154
171
188

M
M
M
M
M
M
M
M

_B _ D
_B _ D
_B _ D
_B _ D
_B _ D
_B _ D
_B _ D
_B _ D

QS # 0
QS # 1
QS # 2
QS # 3
QS # 4
QS # 5
QS # 6
QS # 7

10
27
45
62
135
152
169
186

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 1 0/ A P
A1 1
A 1 2/ B C #
A1 3
A1 4
A1 5

DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 8
DQ 9
DQ 1 0
DQ 1 1
DQ 1 2
DQ 1 3
DQ 1 4
DQ 1 5
DQ 1 6
DQ 1 7
DQ 1 8
DQ 1 9
DQ 2 0
DQ 2 1
DQ 2 2
DQ 2 3
DQ 2 4
DQ 2 5
DQ 2 6
DQ 2 7
DQ 2 8
DQ 2 9
DQ 3 0
DQ 3 1
DQ 3 2
DQ 3 3
DQ 3 4
DQ 3 5
DQ 3 6
DQ 3 7
DQ 3 8
DQ 3 9
DQ 4 0
DQ 4 1
DQ 4 2
DQ 4 3
DQ 4 4
DQ 4 5
DQ 4 6
DQ 4 7
DQ 4 8
DQ 4 9
DQ 5 0
DQ 5 1
DQ 5 2
DQ 5 3
DQ 5 4
DQ 5 5
DQ 5 6
DQ 5 7
DQ 5 8
DQ 5 9
DQ 6 0
DQ 6 1
DQ 6 2
DQ 6 3

BA0
BA1
BA2
S0 #
S1 #
CK 0
CK 0 #
CK 1
CK 1 #
CK E 0
CK E 1
CA S #
RA S #
W E#
SA0
SA1
S CL
S DA
OD T 0
OD T 1
DM
DM
DM
DM
DM
DM
DM
DM

0
1
2
3
4
5
6
7

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

S0
S1
S2
S3
S4
S5
S6
S7

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

S0 #
S1 #
S2 #
S3 #
S4 #
S5 #
S6 #
S7 #

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
12 9
13 1
14 1
14 3
13 0
13 2
14 0
14 2
14 7
14 9
15 7
15 9
14 6
14 8
15 8
16 0
16 3
16 5
17 5
17 7
16 4
16 6
17 4
17 6
18 1
18 3
19 1
19 3
18 0
18 2
19 2
19 4

M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q

M_ B _ D Q[ 6 3 : 0 ] 4

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

3. 3 V S

20 m ils

VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD

D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2
D1 3
D1 4
D1 5
D1 6
D1 7
D1 8

199
V D DS P D

C4 1 8

C4 1 0

1u _ 6 . 3 V _ X5 R _0 4

0 . 1u _ 1 6V _Y 5 V _ 04

77
122
125
198
30

9 T S # _ D I M M0 _ 1
3, 9 D D R 3 _D R A MR S T #
C 416
C 415

1 u _ 6. 3 V _ X 5 R _ 0 4
0 . 1 u _1 6 V _ Y 5 V _ 0 4

MV R E F _ D Q _ D I M MB

1
126

NC 1
NC 2
NC T ES T
EVEN T #
RE SET #
V R E F _ DQ
V R E F _ CA

8 MV R E F _ D Q _ D I M MB
MV R E F _ D I M1
C 397
C 402

1 u _ 6. 3 V _ X 5 R _ 0 4
0 . 1 u _1 6 V _ Y 5 V _ 0 4

CLO SE TO SO -DI MM 1

1 .5 V

R2 7 0

1 K _1 % _ 0 4

M V R E F _ DIM 1

R 2 74

C3 8 4

1 K _ 1 % _0 4

0 . 1u _ 1 0V _X 5 R _ 0 4

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS1 0
VSS1 1
VSS1 2
VSS1 3
VSS1 4
VSS1 5

VSS1 6
VSS1 7
VSS1 8
VSS1 9
VSS2 0
VSS2 1
VSS2 2
VSS2 3
VSS2 4
VSS2 5
VSS2 6
VSS2 7
VSS2 8
VSS2 9
VSS3 0
VSS3 1
VSS3 2
VSS3 3
VSS3 4
VSS3 5
VSS3 6
VSS3 7
VSS3 8
VSS3 9
VSS4 0
VSS4 1
VSS4 2
VSS4 3
VSS4 4
VSS4 5
VSS4 6
VSS4 7
VSS4 8
VSS4 9
VSS5 0
VSS5 1
VSS5 2

44
48
49
54
55
60
61
65
66
71
72
1 27
1 28
1 33
1 34
1 38
1 39
1 44
1 45
1 50
1 51
1 55
1 56
1 61
1 62
1 67
1 68
1 72
1 73
1 78
1 79
1 84
1 85
1 89
1 90
1 95
1 96

Sheet 10 of 49
DDR3 SO-DIMM_1
V T T_ M E M

VTT1
VTT2
G 1
G 2

2 03
2 04
GN D 1
GN D 2

7 8 19 2 -0 0 11

7 8 19 2 -0 0 11
V T T_ M E M

C 398

C4 1 7

C3 8 0

C3 8 5

C3 8 1

1 0 u _ 10 V _ Y 5V _0 8

1u _ 6 . 3 V _X 5 R _0 4

1u _ 6 . 3 V _ X5 R _0 4

1u _ 6 . 3 V _ X5 R _0 4

1 u_ 6 . 3 V _ X5 R _0 4

C 372

C4 0 3

C4 0 6

C3 9 0

C3 9 1

C4 0 8

C3 8 6

C3 8 8

1 0 u _ 10 V _ Y 5V _0 8

10 u _ 10 V _ Y 5V _0 8

10 u _ 1 0V _ Y 5 V _0 8

1u _ 6 . 3 V _ X5 R _0 4

1 u_ 6 . 3 V _ X5 R _0 4

1 u_ 6 . 3 V _ X5 R _ 04

1 u_ 6 . 3 V _ X 5R _ 04

1 u_ 6 . 3 V _ X 5R _ 04

1. 5V

La yout Note :
SO -D IM M_1 i s pl ac e d fa rthe r f rom t he GMCH tha n S O- DIMM _ 0

1 .5 V

C 407

C3 8 7

C4 0 9

C4 0 0

C3 8 9

C4 0 4

C4 1 4

C4 1 3

C4 1 2

C 41 1

0 . 1 u _ 16 V _ Y 5V _0 4

0. 1 u _ 1 6V _ Y 5 V _0 4

0. 1 u _ 1 6V _Y 5 V _0 4

0. 1u _ 1 6V _Y 5 V _ 04

0 . 1u _ 1 6 V _Y 5 V _ 04

0 . 1u _ 1 6 V _Y 5 V _ 04

0 . 1u _ 1 6 V _ Y 5 V _ 0 4

0 . 1 u_ 1 6 V _ Y 5 V _ 0 4

0 . 1 u_ 1 6 V _ Y 5 V _ 0 4

0 . 1 u_ 1 6 V _ Y 5 V _ 0 4

9, 3 8
3 , 6 , 8 , 9 , 2 5, 2 9 , 3 5 , 37 , 3 8
3, 9 , 1 1 , 1 2, 18 , 1 9 , 2 0, 2 1 , 2 2 , 23 , 2 4 , 2 5, 27 , 2 8 , 2 9, 3 0 , 3 1 , 3 2, 3 3 , 3 4 , 35 , 3 9
24 , 3 5

V T T _M E M
1 .5 V
3 .3 V S
1 .5 V S

DDR3 SO-DIMM_1 B - 11

B.Schematic Diagrams

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

4
M _B _B S 0
4
M _B _B S 1
4
M _B _B S 2
4
M _B _C S # 2
4
M _B _C S # 3
4 M_ B _ C L K _ D D R 2
4 M_ B _ C L K _ D D R # 2
4 M_ B _ C L K _ D D R 3
4 M_ B _ C L K _ D D R # 3
4 M_ B _ C K E 2
4 M_ B _ C K E 3
4
M _ B _ CA S #
4
M _ B _ RA S #
4
M _ B_ W E#
9
S A 0 _ D I M1
9
S A 1 _ D I M1
9 , 1 9 S MB _C L K
9 , 1 9 S MB _D A T A
4
4

1 . 5V

J D I M M2 A

M _ B _ A [ 1 5: 0]

Schematic Diagrams

Panel, Inverter, CRT
PANEL POWER

D2 4

3 4 B R I GH T N E S S

3 . 3V

4

C1 6

R4 8 9

0 . 1u _ 1 6V _Y 5V _0 4

.

34

B K L_ E N

21

BL O N

*1 00 K _ 0 4
BKL _ EN

1

BL O N

2

U 4 5A
7 4 L V C0 8 P W
3

B L ON 1

R4 9 0

10 0 K _ 04

28 , 3 4

L41
C 56 0

F C M1 0 05 MF - 60 0 T 01

F G RN

2

F C M1 0 05 MF - 60 0 T 01

F B L UE

3

10

C5 6 2

C5 6 1

C5 5 9

4
5

MT H 7 _ 0D 2 _8

H 17
1

GN D
9
2
8
3
7
4
6
5

M TH 7 _0 D 2_ 8
G ND

2
3
4
5

H 3
1

2
3
4
5

MT H 7_ 0 D 2 _ 8

B - 12 Panel, Inverter, CRT

1

G ND
9
8
7
6

2
3
4
5

MT H 7 _ 0D 2 _8
GN D
9
2
8
3
7
4
6
5

M TH 7 _0 D 2_ 8
G ND

H6

H2 4
1

MT H 7 _ 0D 2 _8
GN D

H2 8
1

G ND
9
8
7
6

MT H 7_ 0 D 2 _ 8
G ND
9
8
7
6

2
3
4
5

H7
1

G ND
9
8
7
6

MT H 7_ 0 D 2 _ 8
G ND

DD CD A T A

13

HS Y NC

14

V S Y NC

15

DD CL K

7
8

5V S

C 3

H 26
9
8
7
6

1

1

9
8
7
6

M T H 7 _0 D 2_ 8

G ND

2
3
4
5

H 14
1

U4 0
10

2 1 DA C _ DDC A DA T A

GN D
9
8
7
6

5 VS

R 4

GN D

D D C _ OU T 2

12
S Y N C_ IN1

S Y N C _ OU T 1

S Y N C_ IN2

S Y N C _ OU T 2

15
1

1_ 0 4

V C C _S Y N C
V C C _V I D E O

V IDE O _ 2

V C C _D D C

V IDE O _ 3

7

C 6
BY P

D DCL K

14

H S Y N C _C R 1 3

16

V S Y N C_ C R 1

8

H SYN C

3 3_ 0 4

VSYN C

FR ED

4

F G RN

5

F B L UE

6
BYP

3 3_ 0 4

3
V IDE O _ 1

2

3 .3 V S
C2

M T H 7 _0 D 2_ 8

D D C _ OU T 1

DDC _ IN2
13

2 1 D A C _V S Y N C

DDC DA T A

9
DDC _ IN1

11

2 1 DA C _ DDC A CL K
2 1 D A C _H S Y N C

G ND
2
3
4
5

12
6

8
7
6
5
2
3
4
5

24 mil

11

C 55 8

1
2
3
4
9
8
7
6

0 . 2 2 u_ 1 0 V _ Y 5V _ 0 4

M TH 7 _0 D 2_ 8

H1 8
1

1 0u _ 1 0V _ Y 5 V _ 0 8

9

GN D 1
G ND 2

C 56 3

1

C1

L42

F C M1 00 5 MF - 60 0 T0 1

C6 6 1

10 p _ 50 V _ N P O _ 04

1 50 _ 1% _ 0 4

R4 3 2

10 p _ 50 V _ N P O_ 04

1 50 _ 1 %_ 0 4

R4 3 3

C6 9 8

F C M1 00 5 MF - 60 0 T0 1

FR ED

1 0p _ 5 0V _ N P O_ 0 4

L56

F C M1 0 05 MF - 60 0 T 01

1 0p _ 5 0V _ N P O_ 0 4

L53

D A C _B L U E

L43

1 0p _ 5 0V _ N P O_ 0 4

D A C _G R E E N

F C M1 00 5 MF - 60 0 T0 1

2 2 p_ 5 0 V _N P O_ 0 4

D A C _B L U E

L45

2 2 p_ 5 0 V _ N P O_ 0 4

21 D A C _ GR E E N

D A C _R E D

0 . 2 2u _ 1 0V _ Y 5 V _ 0 4

2
3
4
5

0 . 1u _ 1 0V _ X 5 R _ 0 4

J_ C R T 1
1 0 8A H 1 5F S T0 4 A 1 C C

D A C _R E D

3. 3 V S

H1 2
9
8
7
6

C5 8 4

* 1M _ 04

1 1 L I D _S W #1

RN 1
2 . 2 K _8 P 4 R _ 0 4

1

R 4 86

6-20-14X30-015

M1 1
M1 6
M1 2
M1 3
M-M A R K M-M A R K M- M A R K M-M A R K

H 27

I N V _B L O N

13

1 50 _ 1 %_ 0 4

H5
MT H 7_ 0 D 2 _ 8_ O

L ID_ S W #

CRT
21

8
U4 5 D
74 L V C 0 8 P W

20 , 3 4 , 39 A L L _ S Y S _ P W R GD

R 4 34
M2
M9
M4
M5
M-M A R K M-M A R K M- M A R K M-M A R K

S B _B LO N 1

S B _ B L ON

12

C6 9 7

2
3
4
5

U 4 5C
7 4 L VC0 8 PW

3 .3 V

*1 0 0 K _0 4

14

23

2 2p _ 5 0V _ N P O_ 0 4

H2
H 23
H1
H 22
C 1 5 8 D 1 5 8 C 1 58 D 15 8 C 1 5 8 D 1 58 C 15 8 D 1 5 8

R4 8 8

GN D

I P 4 77 2 C Z 1 6
C 5 57
0 . 2 2 u_ 1 0 V _Y 5 V _0 4

CM2009-02QR PN:6-02-20090-B60
IP4772CZ16 PN:6-02-47721-B60

35 , 3 6 , 3 7, 3 8 , 3 9, 4 0 , 4 1, 4 2 V I N
1 8 , 2 4, 2 5 , 2 7, 2 8 , 3 1, 3 2 , 3 3, 3 5 , 3 9, 40 , 4 1 5V S
2 , 3 , 8, 1 2 , 1 6, 1 8 , 1 9, 20 , 2 2 , 23 , 2 4 , 25 , 2 7 , 28 , 2 9 , 30 , 3 3 , 3 5, 3 7 , 3 8, 3 9 3 . 3V
3, 9 , 1 0 , 1 2, 1 8 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 27 , 2 8 , 29 , 3 0 , 31 , 3 2 , 33 , 3 4 , 35 , 3 9 3 . 3V S

10 0 0 p_ 5 0 V _ X 7R _ 04

S

H4
H 21
H2 0
H 25
C 1 4 6 D 1 1 0 C 1 46 D 11 0 C 1 5 8 D 1 58 C 14 6 D 1 1 0

H1 9
H6 _ 0 D3 _ 7

3 .3 V
6 B L ON 2

7

D

21
M1 0
M1 5
M7
M1 4
M-M A R K M-M A R K M- M A R K M-M A R K

C 8 00

10 p _ 50 V _ N P O _ 04

M1
M6
M3
M8
M-M A R K M-M A R K M- M A R K M-M A R K

S

4

S

2G
Q 4 9A
*M T D N 7 0 0 2Z H S 6 R

U4 5 B
74 L V C 0 8 P W

4
5

L2
H C B 1 6 08 K F -1 2 1 T2 5

4 . 7 u _2 5 V _ X 5 R _ 0 8

3

6
1

D

5G
Q4 9 B
*M TD N 7 0 02 Z H S 6 R

NB _ E N A V DD

S

3 .3 V
C1 9

.
.
.

D

* 0. 1u _ 50 V _ Y 5 V _ 0 6

0 . 1 u_ 5 0 V _Y 5 V _ 0 6

*2 0 0_ 1 % _0 4

1108

G

D

10

R2 2 8

Q4 5
MT N 7 0 0 2Z H S 3

10/29
Q2 2 B 5G
M T D N 7 0 0 2Z H S 6 R

3 . 3V

9
C1 7

*1 0 K _ 04
C 15

S
Q 22 A
M TD N 7 0 02 Z H S 6R

1 0 0 K _0 4

R2 3 4
1 M _0 4

2 0 0_ 1 % _0 4

3

R 65 4

L E D P L_ V I N

R 22 6

2G

2 1 , 34 N B _E N A V D D

I N V _ B L ON

0 . 1 u_ 1 6 V _Y 5 V _ 04

*0 . 1 u _1 6 V _ Y 5 V _ 04

D

R1 9 7
* 10 0 K _ 0 4

4

3 .3 V S
PL VD D

2A

0 . 1u _ 1 6V _Y 5 V _ 0 4

Gn d 1
G nd 2

LV D S -L 2 N 2 1
LV D S -L 2 P 2 1

8 7 2 16 -4 0 06

C 21

1 0 0 K _0 4

2 20 p _ 50 V _ N P O _ 04

P 2 00 3 E V G

1 0 K _0 4

3 .3 V

P _G N D

3A

R 22 3

R8 6

C4

R 5 78

*C D B U 0 0 3 40
A

1 u_ 6 . 3 V _X 5 R _ 0 4

2
O P E N_ 2 A

C5

3
2
1

Q4 6

D6
C

L E DP L _ V IN
8
7
6
5

C1 4 4

C4 8 8

2 20 p _ 50 V _ N P O _ 04

.

PJ 3 3

C2 4 8

7

L1
* 0_ 0 6

*B A V 99 R E C T I F I E R

>100 mil1

LV D S -U 0N 2 1
LV D S -U 0P 2 1

C1 2 8

1 00 0 p _5 0 V _ X 7 R _ 04

V IN

0 _ 04

C

R 30

P LV D D

>100mil

14

21
L V D S -L 0N
21
L V D S -L 0 P
*1 0K _0 4 B R I GH TN E S S _ R

R4 6 0

3 .3 V S

LV D S -U 2N 2 1
LV D S -U 2P 2 1

6

L V D S -L1 N _ C OM B O
L V D S -L1 P _ C O MB O

Q3 0
A O 34 1 5
S
D

>100 mil

2
O P E N_ 2 A

1

L V D S -LC LK N _ C O MB O
L V D S -LC LK P _C OM B O

PJ 2 0

14

LC LK P _C OM B O
LC LK N _ C O MB O
U C L K P _ C OMB O
U 1 P _ C OM B O
L1 P _ C O MB O
U C L K N _C OM B O
U 1 N _ C O MB O
L1 N _ C OM B O

>100 mil1
P _ DDC _ DA T A 2 1
P _ DDC _ CL K 2 1

7

_X 7 R _ 0 4 L V D S _X 7 R _ 0 4 L V D S _X 7 R _ 0 4 L V D S _X 7 R _ 0 4 L V D S _X 7 R _ 0 4 L V D S _X 7 R _ 0 4 L V D S _X 7 R _ 0 4 L V D S _X 7 R _ 0 4 L V D S -

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

5V S

14

*0 . 1u _ 1 0V
*0 . 1u _ 1 0V
*0 . 1u _ 1 0V
*0 . 1u _ 1 0V
*0 . 1u _ 1 0V
*0 . 1u _ 1 0V
*0 . 1u _ 1 0V
*0 . 1u _ 1 0V

AC

19 7
21 4
17 8
19 6
18 2
16 7
18 6
17 9

A

C
C
C
C
C
C
C
C

DP _ A UX _ P
D P _ A UX _ N
D P _ T XP _ 0
D P _ T XP _ 1
D P _ T XP _ 2
D P _ TX N _ 0
D P _ TX N _ 1
D P _ TX N _ 2

V IN

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

L V D S -U 1 N _ C O MB O
L V D S -U 1 P _ C OM B O

P L V DD

Sheet 11 of 49
Panel, Inverter,
CRT

G1
G2

J _L C D 1
L V D S -U C L K N _C OM B O
L V D S -U C L K P _ C OMB O

P LV DD
L VD S: 3. 3V 2 A
e DP 3 D: 5V 3 A

R2 7

.
.
.

B.Schematic Diagrams

U C L K N _C OM B O
U C L K P _ C OMB O
U 1 N _ C O MB O
U 1 P _ C OM B O
LC LK N _ C O MB O
LC LK P _C OM B O
L1 N _ C OM B O
L1 P _ C O MB O

2 . 2K _ 0 4

0 _ 8P 4 R _0 4 L V D S L V DS L V DS L V DS 0 _ 8P 4 R _0 4 L V D S L V DS L V DS L V DS -

2 . 2K _0 4

2
2
2
2
2
2
2
2

1
2
3
4
1
2
3
4

G

R2 8
8
7
6
5
R N1 0 8
7
6
5
R N8

2 1 L V D S -U C L K N
2 1 L V D S -U C L K P
21
L V D S -U 1 N
21
L V D S -U1 P
2 1 L V D S -LC L K N
21
LV D S -L C L K P
21
LV D S - L 1 N
21
L V DS -L 1 P

0 . 1 u_ 1 6 V _Y 5 V _ 0 4

3. 3 V S

7

PANEL CONNECTOR (LED+EDP)

Schematic Diagrams

VGA PCI-E Interface
GP U
H9
H11
H 13
H 8_0D 4_4 H8_0 D4_ 4 H 8_0D 4_4
U46A
B
G
A_1
005_
P
080
_29
0X
29
0

3.3 V

C
O
M
M
ON

Q4
AO 3415
S
D

AK1 6
AK1 7
AK2 1
AK2 4
AK2 7

C1 17

C1 06

C9 4

C 123

C4 0

C36

C 33
C 46

0. 1u_16V _Y 5V_04

0. 1u_16V _Y 5V_04

1 u_6. 3V_X 5R_ 04 1u_6. 3V _X5R _04

4.7 u_6. 3V_ X5R_ 06

10u_6. 3V _X5R _06

d GP U_P WR_ EN _#2

2 2u_6. 3V_ X5R_ 08

3V 3_R UN

10 u_6. 3V_X 5R_0 6
PLA CE N EA R BA LLS

3V3_ RU N

P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q

100K _04
*0_ 04

Q 39
S *MTN 7002Z HS 3

R 68

PEX_ TSTC LK _OU T
PEX_ TSTC LK _OU T#

VG A_P EXC LK
VG A_P EXC LK #

2
2

PEG _R X0
PEG _R X#0

PE G_R X0
PE G_R X#0

2
2

P EG _TX0
P EG _TX#0

PE G_T X0
PE G_T X#0

2
2

PEG _R X1
PEG _R X#1

PE G_R X1
PE G_R X#1

2
2

P EG _TX1
P EG _TX#1

PE G_T X1
PE G_T X#1

2
2

PEG _R X2
PEG _R X#2

PE G_R X2
PE G_R X#2

2
2

P EG _TX2
P EG _TX#2

PE G_T X2
PE G_T X#2

A J17
A J18
AR 16
AR 17

C71
C75

0. 22u_ 10V_X 5R_ 04 P EX_ RX0
0. 22u_ 10V_X 5R_ 04 P EX_ RX0#

C74
C82

0. 22u_ 10V_X 5R_ 04 P EX_ RX1
0. 22u_ 10V_X 5R_ 04 P EX_ RX1#

A L17
AM17
AP 17
AN 17
AM18
AM19
AN 19
AP 19

P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q

PE X_TSTCLK O
_ UT
PE X_TSTCLK O
_ UT
PE X_REFC LK
PE X_REFC LK

C8 5

C7 8

0. 1u_16V _Y 5V_04

C9 8

0. 1u_16V _Y 5V_04

C 65

1u _6. 3V_X5 R_04 1 u_6. 3V_X 5R_ 04

C1 38

C32

C 58

4. 7u_6. 3V _X5R _06

10u_6. 3V _X5R _06

2 2u_6. 3V_ X5R_ 08

R 49
10 K_04

PL AC E NE AR B ALLS

Q 50
MTN7 002ZH S3
G
S

3.3 VS
P EX_ VD D

D

P LAC E NE AR B GA

Q 5B

AJ25
AJ27
AK1 8
AK2 0
AK2 3
AK2 6
AL16

dGP U_P WR _EN _#0

5G

PJ44
*6mil

S MTDN 7002 ZH S6R

D
Q5A

R 58

2G

2 2,3 4,3 7 dG PU _PWR _E N#

S MTD N 7002Z HS 6R

1M_04

PE X_TX0
PE X_TX0
PE X_RX0
PE X_RX0

G F10x
G T21X

PEX_PLL_HVD D_N C
PEX_CA L
_P U_GN D_NC

PE X_TX1
PE X_TX1

GF10x

PEX_SVD D_3V3
PEX_SV DD_3V3_N C

PE X_RX1
PE X_RX1

GT21x

AG 20

PE X_CA L_P U_G N D_N C

AG 19
F7

PEX _VD D_ SVD D

3V3 _RU N

16 mi l
L5

PE X_SVDD _3V3

.

dG PU _P WR_E N#
H CB 1005K F- 121T2 0

C 55

C 104

0. 1u_16 V_Y 5V_0 4

4. 7u_6. 3V _X5R _06

D02 CH ANGE
FOR NV VDD CV TES T

Sheet 12 of 49
VGA PCI-E
Interface

P EX_V DD

2
2

PEG _R X3
PEG _R X#3

PE G_R X3
PE G_R X#3

2
2

P EG _TX3
P EG _TX#3

PE G_T X3
PE G_T X#3

2
2

PEG _R X4
PEG _R X#4

PE G_R X4
PE G_R X#4

2
2

P EG _TX4
P EG _TX#4

PE G_T X4
PE G_T X#4

2
2

PEG _R X5
PEG _R X#5

PE G_R X5
PE G_R X#5

2
2

P EG _TX5
P EG _TX#5

PE G_T X5
PE G_T X#5

2
2

PEG _R X6
PEG _R X#6

PE G_R X6
PE G_R X#6

2
2

P EG _TX6
P EG _TX#6

PE G_T X6
PE G_T X#6

2
2

PEG _R X7
PEG _R X#7

PE G_R X7
PE G_R X#7

2
2

P EG _TX7
P EG _TX#7

PE G_T X7
PE G_T X#7

C87
C83

0. 22u_ 10V_X 5R_ 04 P EX_ RX2
0. 22u_ 10V_X 5R_ 04 P EX_ RX2#

A L19
AK 19
AR 19
AR 20

C86
C95

0. 22u_ 10V_X 5R_ 04 P EX_ RX3
0. 22u_ 10V_X 5R_ 04 P EX_ RX3#

C97
C10 3

0. 22u_ 10V_X 5R_ 04 P EX_ RX4
0. 22u_ 10V_X 5R_ 04 P EX_ RX4#

C10 8
C10 9

0. 22u_ 10V_X 5R_ 04 P EX_ RX5
0. 22u_ 10V_X 5R_ 04 P EX_ RX5#

AM20

AM21
AM22
AN 22
AP 22
A L22
AK 22
AR 22
AR 23

0. 22u_ 10V_X 5R_ 04 P EX_ RX6
0. 22u_ 10V_X 5R_ 04 P EX_ RX6#

A L23
AM23
AP 23
AN 23

C12 4
C13 9

0. 22u_ 10V_X 5R_ 04 P EX_ RX7
0. 22u_ 10V_X 5R_ 04 P EX_ RX7#

PE X_RX2
PE X_RX2

A L20

AP 20
AN 20

C12 1
C12 2

PE X_TX2
PE X_TX2

AM24
AM25
AN 25
AP 25
A L25
AK 25
AR 25
AR 26
A L26
AM26
AP 26
AN 26
AM27
AM28
AN 28
AP 28
A L28
AK 28
AR 28
AR 29
AK 29
A L29
AP 29
AN 29
AM29
AM30
AN 31
AP 31
AM31
AM32
AR 31
AR 32

PE X_TX3
PE X_TX3
PE X_RX3
PE X_RX3
PE X_TX4
PE X_TX4
PE X_RX4
PE X_RX4
PE X_TX5
PE X_TX5
PE X_RX5
PE X_RX5
PE X_TX6
PE X_TX6
PE X_RX6
PE X_RX6
PE X_TX7
PE X_TX7
PE X_RX7
PE X_RX7
PE X_TX8
PE X_TX8
PE X_RX8
PE X_RX8
PE X_TX9
PE X_TX9

N C_1
N C_2
N C_3
N C_4
N C_5
N C_6
N C_7
N C_8
N C_9
N C_10
N C_11
N C_12
N C_13
N C_14
N C_15
N C_16
N C_17
N C_18
N C_19
N C_20
N C_21
N C_22
N C_23
N C_24
N C_25
N C_26
N C_27
N C_28
N C_29
N C_30
N C_31
N C_32
N C_33
N C_34
N C_35
N C_36
N C_37
N C_38
N C_39
N C_40
N C_41
N C_42
N C_43

A2
A7
AA2 8
AA4
AA8
AB4
AB7

L3
P LAC E N EAR BA LLS

AC 5
AD 28
AD 6
AF6
AG 6
AH 12
AH 24
AH 25
AH 26
AJ5
AK1 5
AL7
B7
C7
D5
D6
D7
E5
E7
F4
G5
H10
H11
H12
H15
H21
H24
H25
H26
H32
L8
P6
R28
U7
V6
Y4

H C B1005 KF- 121T 20

1 6m il

VI D_P LLVD D

C 49

C41

*4. 7u_6 .3V _X5R _06

10u_6. 3V _X5R _06 4700 p_50V _X7R _04

C 42

C47

C 38

0. 1u_10V _X7R _04

0 .1u _10V_ X7R _04

U 46P
B
G_
A
100
5_P
0
80_
290
X
290
C
OM
M
O
N

14/ 16XTA L
_P L

1 2m il

N1 2 P- GS

3V3_ RU N

P LAC E NE AR BG A

R 35

*20K _1%_04

VG A_ RO M_ SI

R47 2

45. 3K_ 1%_04

R 450

*4. 99K _1%_04

VG A_ RO M_ SO

R44 9

10K _1%_04

R 36

*34. 8K _1%_04

VG A_ RO M_ SC LK

R47 3

15K _1%_04

R 41

45. 3K _1%_04

VG A_ STR AP 0

R42

*4. 99K_1 %
_ 04

R 56

*34. 8K _1%_04

VG A_ STR AP 1

R55

34. 8K_ 1%_04

R 54

34. 8K _1%_04

VG A_ STR AP 2

R53

*34. 8K_1 %
_ 04

C37

C 45

0. 1u_10V _X7R _04

0 .1u _10V_ X7R _04

AE9
AE8
A D8
A D9
AF8
AF9

PLLVD D
PLLVD D
VI D_PLLVD D
VI D_PLLVD D
SP _PLLVDD
SP _PLLVDD

PLA CE N EA R BA LLS
X _SS IN

D2

B1

D02 CHA NGE
R47 3 34 .8K FO R W / VB IOS RO M
R47 3 15 K FOR BI OS I NCL UDE VB IOS
(R4 73 1 5K? U42 & C 569 ? ? ? )
D 02 CHA NGE

XT ALSSIN

R 476
10 K_04
X11

PE X_TX14
PE X_TX14

C 566

C56 7
X12
4
3

3V3_R U N

VD D_SEN SE
GN D_SEN SE
VD D_SEN SE
GN D_SEN SE
VD D_SEN SE
GN D_SEN SE

J10
J11
J12
J13
J9

PE X_TX15
PE X_TX15

AR 34
AP 34

PE X_RX15
PE X_RX15

20p_50 V_N PO _04

P7
R7

0. 1u_16V _Y 5V_04

R767

C48

C 35

0.1 u_16V _Y5 V_04

0 .1u _16V_ Y5V _04

C 59

C3 1

1u_ 6.3 V_X5R _04

4. 7u_6. 3V _X5R _06

PS1 _VD D_ SEN SE
PS1 _GN D _SE NS E

BBI ASN_N C
BBI ASP_NC

AG 14
AH 15

P EX_P LLV DD

PEX _
T ERMP
PEX _
T ERMP

AG 21
AH 21

P EX_T ER MP

C3

V GA _RO M_CS #

3
1

H OLD
WP
CS

D3
C4
D4

V GA _RO M_SI
V GA _RO M_SO
V GA _RO M_SC LK

5
2
6

SI
SO

V GA _ST RA P2 V7
V GA _ST RA P1 W7
V GA _ST RA P0 W5

STR AP2
STR AP1
STR AP0

G PU _TES TMOD E

8

I 2CH_SD A

C 569
*0. 1u_ 16V_Y 5V _04

4
S CK
GN D
*M X25 L5121E MC - 20G
3V3_R U N

I 2CH _SCL

VC C

F6

I 2C _SC L

R 474

2.2 K_04

G6

I 2C _SD A

R 475

2.2 K_04

6-04-25512-B71
6-04-25512-B70
6-04-25512-B72
6-04-25010-490

*0_04

2. 49K _1%_04

R 507

10 K_04

SPD IF_N C

L7
HC B1 005KF - 121T20

1 6m il

R 82

.

C 72

C96

C 70

0. 1u_16 V_Y 5V_0 4

1u_6. 3V _X5R _04

4 .7u _6. 3V_X 5R_0 6

P LAC E N EAR BAL LS
AP3 5

R OM_
CS
RO M_S I
R OM_
SO
RO M_S CLK

PS 1_VD D _SE NS E 41
PS 1_G ND _SE NS E 41

N12P- GS
R768

PEX_PLLVD D
PEX_PLLVD D

TESTMOD E

U42

1 3
/ 1 6 MS
I C2

J26
J25

P LAC E N EAR BG A

*0_04

AD 20
AD 19
D35
E35

3 V3_R UN
R451

BG A_ 1005_P 080_2 90X290
C OMMON

10K_0 4
C6 4

D02 CH ANGE

B IOS R OM

3V3 _RU N

PEX_ VD D

PE X_RX14
PE X_RX14

AN 32
AP 32

XT AL_O U T

U 46O

PE X_TX12
PE X_TX12

PE X_RX13
PE X_RX13

2H SX84 0GA _27MHZ

Cry st a l 8 0 4 5 & 32 2 5 C o-la y

P LAC E N EAR BAL LS

PE X_TX13
PE X_TX13

1

1
2
*H SX32 1S_27 MH Z

1 6 mi l
VD D33_1
VD D33_2
VD D33_3
VD D33_4
VD D33_5

X_O UT BU FF

B2

FS X8L_25M Hz? ? ? ? ?

XT AL_I N

PE X_RX11
PE X_RX11

PE X_RX12
PE X_RX12

D1

10K_ 04

20p_5 0V_N PO _04

PE X_TX10
PE X_TX10

PE X_TX11
PE X_TX11

XTALO UT

N 12E- G E- A1 G F106 -70 0-A 1

PE X_RX9
PE X_RX9

PE X_RX10
PE X_RX10

XTA L
O UTB UFF

XT ALIN

R47 7

A B5

BUFR ST

P GOO D_OU T
R 64

40 .2K _1%_04

M_STR AP _RE F0

R 66

40 .2K _1%_04

M_STR AP _RE F1

PL AC E NE AR B GA

1u->0.1u C990525

CEC

N9
R8
M8
M9

A5

A4

C5
AK 14

MULTI_S TRAP_R EF0_GN D
MULTI_S TRAP_R EF0_GN D
MULTI_S TRAP_R EF1_GN D
MULTI_S TRAP_R EF1_GN D

GN D
GN D
GN D

K9
K8

N1 2E- GE -A 1 GF 106- 700- A1
N 12E- G E- A1 G F106- 700 -A 1

16, 41 3V3 _RU N
13, 37 PE X_VD D
2, 3, 8, 11, 16, 18, 19, 20, 22, 23, 24, 25, 27, 28, 29, 30, 33, 35, 37, 38, 39 3. 3V
3,9 ,10 ,11 ,18 ,19 ,20 ,21 ,22 ,23 ,24 ,25 ,27 ,28 ,29 ,30 ,31 ,32 ,33 ,34 ,35 ,39 3. 3VS

VGA PCI-E Interface B - 13

B.Schematic Diagrams

19 VG A_PE XC LK
19 VG A_PE XC LK#

*220 _1%_04

2 20 0 m A

AG 25
AG 26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24

7

R63

G
1 9 PE G_ CLK RE Q#

3

3V 3_R UN

D

PE X_CLKRE Q

10_0 4

D02 CHA NGE

2

PE X_RST

R 769

47
. u _6. 3V_X5 R_06

1

AM16

P EX_C LKR EQ # AR 13

3

P ER STB #
R 67

100 K_04

4

4
2

6

100K _04

5

1u_6 .3V _X5R _04

1

d GP U_R ST#

C 34

R37
10K_0 4

R 48

.

34

3, 22, 28 PLT_ RS T#

C 39
0. 022 u_16V _X7R _04

PL AC E NE AR B GA

1

R 45

AG 11
AG 12
AG 13
AG 15
AG 16
AG 17
AG 18
AG 22
AG 23
AG 24

dG PU _PWR _EN _#

U5
MC74 VH C1G 08D FT2 G

P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q
P EX_IO VDD Q

D

PEX_I OVD D
PEX_I OVD D
PEX_I OVD D

G

PEX_I OVD D
PEX_I OVD D

C 69

3 V3_R U N

P EX_ VD D

1/ 16PC I_EXPR ESS

Schematic Diagrams

VGA Frame Buffer Interface
F ram e Buffer Int er face
U46B

U46C
BG
A_
100
5_P0
80_2
90X2
90
C
O
M
M
O
N

B
G
A
_0
105
_P08_
029
0X
29
0
C
O
M
M
ON

2/ 16FBA

3/16 FBB

FB A_D 7
FB A_D 8
FB A_D 9
FB A_D 10
FB A_D 11
FB A_D 12
FB A_D 13
FB A_D 14
FB A_D 15
FB A_D 16
FB A_D 17
FB A_D 18
FB A_D 19
FB A_D 20
FB A_D 21

FB A_D 36
FB A_D 37
FB A_D 38
FB A_D 39
FB A_D 40
FB A_D 41
FB A_D 42
FB A_D 43
FB A_D 44
FB A_D 45
FB A_D 46
FB A_D 47
FB A_D 48
FB A_D 49
FB A_D 50

H 30
K 31
L 31
L 30
M32
N 30
M30
P 31
R 32
R 30
AG 30
AG 32
AH 31
AF 31
AF 30
AE 30
AC 32
AD 30
AN 33
AL 31
AM33
AL 33
AK 30
AK 32
AJ 30
AH 30
AH 33
AH 35
AH 34

FB A_D 51
FB A_D 52
FB A_D 53
FB A_D 54
FB A_D 55
FB A_D 56
FB A_D 57
FB A_D 58
FB A_D 59
FB A_D 60
FB A_D 61
FB A_D 62
FB A_D 63

AH 32
AJ 33
AL 35
AM34
AM35
AF 33
AE 32
AF 34
AE 35
AE 34
AE 33
AB 32
AC 35

FB A_D 24
FB A_D 25
FB A_D 26
FB A_D 27
FB A_D 28
FB A_D 29
FB A_D 30
FB A_D 31
FB A_D 32
FB A_D 33
FB A_D 34
FB A_D 35

Sheet 13 of 49
VGA Frame Buffer
Interface
14 FB AD QM[ 7:0 ]

P 35
P 33
P 34
K 35
K 33
K 34
H 33
G 34
G 33
E 34
E 33
G 31
F 30
G 30
G 32
K 30
K 32

FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA

_D0
_D1
_D2
_D3
_D4
_D5
_D6
_D7
_D8
_D9
_D10
_D11
_D12

FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB

VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q

FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA

_D13
_D14
_D15
_D16
_D17
_D18
_D19
_D20
_D21
_D22
_D23
_D24
_D25
_D26
_D27

FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB

VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q
VDD Q

_D30
_D31
_D32
_D33
_D34
_D35
_D36
_D37
_D38
_D39
_D40
_D41

FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA

_D42
_D43
_D44
_D45
_D46
_D47
_D48
_D49
_D50
_D51
_D52
_D53
_D54
_D55
_D56

FBA
FBA
FBA
FBA
FBA
FBA
FBA

_D57
_D58
_D59
_D60
_D61
_D62
_D63

P 32
H 34
J 30
P 30
AF 32
AL 32
AL 34
AF 35

FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA

_DQM 0
_DQM 1
_DQM 2
_DQM 3
_DQM 4
_DQM 5
_DQM 6
_DQM 7

FBA D QS _WP0 L 34
FBA D QS _WP1 H 35
FBA D QS _WP2 J 32
FBA D QS _WP3 N 31
FBA D QS _WP4 AE 31
FBA D QS _WP5 AJ 32
FBA D QS _WP6 AJ 34

FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA

_DQS
_DQS
_DQS
_DQS
_DQS
_DQS
_DQS
_DQS

FBA D QM0
FBA D QM1
FBA D QM2
FBA D QM3
FBA D QM4
FBA D QM5
FBA D QM6
FBA D QM7
F BAD Q S_WP 7
[ :0]

FBA D QS _WP7 AC 33

C 130

C 132

0.1 u_10V _X7R _04

0. 1u_10 V_X7 R_0 4

0 .1u _10V_ X7R _04

FBC _D 8
FBC _D 9
FBC _D 10
FBC _D 11
FBC _D 12
FBC _D 13
FBC _D 14
FBC _D 15
FBC _D 16
FBC _D 17
FBC _D 18
FBC _D 19
FBC _D 20
FBC _D 21
FBC _D 22

PLA CE UN DE R B GA

C 53

C79

C 119

C 84

1u_ 6. 3V_X5 R_0 6

4.7 u_6. 3V_ X5R _06

1u_6 .3V _X5R _06

4 .7u _6. 3V_X5 R_0 6

PLA CE NE AR B GA

J16
J17
J20
J21
J22

FBC _D 23
FBC _D 24

_
W P0
_
W P1
_
W P2
_
W P3
_
W P4
_
W P5
_
W P6
_
W P7

F
F
F
F
F
F
F
F
F

BA_CM D25
BA_CM D23
BA_CM D2
BA_CM D0
BA_CM D10
BA_CM D26
BA_CM D14
BA_CM D7
BA_CM D1

F
F
F
F
F
F
F
F
F
F
F
F
F
F
F

BA_CM D22
BA_CM D20
BA_CM D24
BA_CM D18
BA_CM D9
BA_CM D29
BA_CM D8
BA_CM D27
BA_CM D15
BA_CM D11
BA_CM D16
BA_CM D28
BA_CM D3
BA_CM D17
BA_CM D5

FB A_C MD[ 31: 0] 1 4

GF 10X
U 30
V3 0
U 31
V3 2
T35
U 33
W32
W33
W31
W34
U 34
U 35
U 32
T34

FBA _CM D0
FBA _CM D1
FBA _CM D2
FBA _CM D3
FBA _CM D4
FBA _CM D5
FBA _CM D6
FBA _CM D7
FBA _CM D8
FBA _CM D9
FB A_CM D10
FB A_CM D11
FB A_CM D12
FB A_CM D13
FB A_CM D14
FB A_CM D15
FB A_CM D16
FB A_CM D17
FB A_CM D18
FB A_CM D19
FB A_CM D20
FB A_CM D21
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB

F BA_CM D4
F BA_CM D21
F BA_CM D6
F BA_CM D13
F BA_CM D19
F BA_CM D12
F BA_CM D30
N /A

T33
W30
AB 30
AA 30
AB 31
AA 32
AB 33
Y 32
Y 33
AB 34
AB 35
Y 35
W35
Y 34
Y 31
Y 30
W29

A_CM D22
A_CM D23
A_CM D24
A_CM D25
A_CM D26
A_CM D27
A_CM D28
A_CM D29
A_CM D30
A_CM D31

F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_

CMD 0
CMD 1
CMD 2
CMD 3
CMD 4
CMD 5
CMD 6
CMD 7
CMD 8
CMD 9
CMD 10
CMD 11
CMD 12
CMD 13
CMD 14
CMD 15

F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_
F BA_

CMD 16
CMD 17
CMD 18
CMD 19
CMD 20
CMD 21
CMD 22
CMD 23
CMD 24
CMD 25
CMD 26
CMD 27
CMD 28
CMD 29
CMD 30

Y 29

F BA_ CMD 31

T32
T31
AC 31
AC 30

F BA_ CLK 0
F BA_ CLK 0#
F BA_ CLK 1
F BA_ CLK 1#

15
FBA _O DT_ L
FBA _O DT_ H
FBA _C KE_ L
FBA _C KE_ H
FBA _R ST#

F BA _CMD 2 R 93
F BA _CMD 18 R 98
F BA _CMD 3
R 112
F BA _CMD 19 R 99
F BA _CMD 5 R 527

1
1
1
1
1

FB CD QM[ 7: 0]

P 29
R 29
L 29
M29
AG 29
AH 29
AD 29
AE 29

FBA _DQS _
R N0
FBA _DQS _
R N1
FBA _DQS _
R N2
FBA
FBA
FBA
FBA
FBA

_DQS
_DQS
_DQS
_DQS
_DQS

FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA

_WC K0
_WC K0
_WC K1
_WC K1
_WC K2
_WC K2
_WC K3
_WC K3

FBA _
C LK0

_
R N3
_
R N4
_
R N5
_
R N6
_
R N7

FBA C
_ LK0
FBA _
C LK1
FBA _
C LK1

T30
T29

F BA_DEB UG0_C AS2
FBA D
_ EBU G1

FBA _D EBU G 0
FBA _D EBU G 1

RF U
RF U

GF10x
FB_V REF_N C

GT 21
X

AF 28
AE 28

FB_VR EF

G F10x
FB _DLLAVD D
F B_PLLAVD D
FB _DLLAVD D
F B_PLLAVD D

FBC _D 52
FBC _D 53
FBC _D 54
FBC _D 55
FBC _D 56
FBC _D 57
FBC _D 58
FBC _D 59
FBC _D 60
FBC _D 61
FBC _D 62
FBC _D 63

C32
B32
B35
B34
A29
B28
A28
C28
C26
D25
B25
A25

F BC DQ M0
F BC DQ M1
F BC DQ M2
F BC DQ M3
F BC DQ M4
F BC DQ M5
F BC DQ M6
F BC DQ M7

F
F
F
F
F
F
F
F

BC DQ S_
BC DQ S_
BC DQ S_
BC DQ S_
BC DQ S_
BC DQ S_
BC DQ S_
BC DQ S_

WP0
WP1
WP2
WP3
WP4
WP5
WP6
WP7

C14
A10
E10
D14
E26
D32
A32
B26

F
F
F
F
F
F
F
F

BC DQ S_
BC DQ S_
BC DQ S_
BC DQ S_
BC DQ S_
BC DQ S_
BC DQ S_
BC DQ S_

RN 0
RN 1
RN 2
RN 3
RN 4
RN 5
RN 6
RN 7

B14
B10
D9
E14
F26
D31
A31
A26

FB CD Q S_WP [7 :0]

15 FB CD Q S_R N [7: 0]

FBA _C LK0 14
FBA _C LK0# 14
FBA _C LK1 14
FBA _C LK1# 14

R 97
R 92

*6 0. 4_04
*1 0K_0 4

FBB_D 43
FBB_D 44
FBB_D 45
FBB_D 46
FBB_D 47
FBB_D 48
FBB_D 49
FBB_D 50
FBB_D 51
FBB_D 52
FBB_D 53
FBB_D 54
FBB_D 55
FBB_D 56
FBB_D 57
FBB_D 58
FBB_D 59
FBB_D 60
FBB_D 61
FBB_D 62
FBB_D 63

FBB_D QM 0
FBB_D QM 1
FBB_D QM 2
FBB_D QM 3
FBB_D QM 4
FBB_D QM 5
FBB_D QM 6
FBB_D QM 7

FBB_D QS_WP0
FBB_D QS_WP1
FBB_D QS_WP2
FBB_D QS_WP3
FBB_D QS_WP4
FBB_D QS_WP5
FBB_D QS_WP6
FBB_D QS_WP7

FBB_D QS_R N0
FBB_D QS_R N1
FBB_D QS_R N2
FBB_D QS_R N3
FBB_D QS_R N4
FBB_D QS_R N5
FBB_D QS_R N6
FBB_D QS_R N7

FBB_WCK0
FBB_WCK0
FBB_WCK1
FBB_WCK1
FBB_WCK2
FBB_WCK2
FBB_WCK3
FBB_WCK3

L8

C1 35

C9 0

C 806

0. 1u_10 V_X7R _04

0. 1u_10 V_X7R _04

0. 1u_10 V_X7 R_0 4

.

0. 1u_ 10V_ X7R_ 04

0.1 u_10V _X7R _04

0. 1u_1 0V_X7 R_0 4

C1 05

C 110

C14 5

C 250

1u_6 .3V _X5R _06

4. 7u_ 6.3 V_X5 R_0 6

*1u_6. 3V_ X5R _06

*4. 7u_6. 3V _X5R _06

P LAC E N EA R BG A

F BC _CMD 3
[ 1:0 ]
FB C_ CMD 3
[ 1 :0]
GT21X
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB

B_CM D25
B_CM D23
B_CM D2
B_CM D0
B_CM D10
B_CM D26
B_CM D14
B_CM D7
B_CM D1
B_CM D22

FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB

B_CM D20
B_CM D24
B_CM D18
B_CM D9
B_CM D29
B_CM D8
B_CM D27
B_CM D15
B_CM D11
B_CM D16
B_CM D28
B_CM D3
B_CM D17
B_CM D5
B_CM D4

FB B_CM D21
FB B_CM D6
FB B_CM D13
FB B_CM D19
FB B_CM D12
FB B_CM D30
N /A

15

GF10X
F18
E19
D1 8
C1 7
F19
C1 9
B17
E20
B19
D2 0
A19
D1 9
C2 0
F20
B20

FBB_C MD 0
FBB_C MD 1
FBB_C MD 2
FBB_C MD 3
FBB_C MD 4
FBB_C MD 5
FBB_C MD 6
FBB_C MD 7
FBB_C MD 8
FBB_C MD 9
FBB_C MD 10
FBB_C MD 11
FBB_C MD 12
FBB_C MD 13
FBB_C MD 14
FBB_C MD 15
FBB_C MD 16
FBB_C MD 17
FBB_C MD 18
FBB_C MD 19
FBB_C MD 20
FBB_C MD 21
FBB_C MD 22

G2 1
F22
F24
F23
C2 5
C2 3
F21
E22
D2 1
A23
D2 2
B23
C2 2
B22
A22
A20
G2 0

FBB_C MD 23
FBB_C MD 24
FBB_C MD 25
FBB_C MD 26
FBB_C MD 27
FBB_C MD 28
FBB_C MD 29
FBB_C MD 30
FBB_C MD 31

FBB_C L
K1
FBB_C L
K1

E17
D1 7
D2 3
E23

FBB _
D EBU G0_CAS 2
FBB_D EBUG 1

G1 9
G1 6

FBB_C L
K0
FBB_C L
K0

C 143

1u_6 .3 V_X5R _06

10u _6. 3V_X5 R_0 6

FB_C AL_PD_VD DQ
FB_C AL_PD_VD DQ
FB_C AL_PU_G ND
FB_C AL_PU_G ND

PLA CE N EA R B GA C LO SE TO CA PS

F B_CAL_TER M_G ND
F B_CAL_TER M_G ND

FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_

CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD1
CMD1
CMD1
CMD1
CMD1
CMD1
CMD1

0
1
2
3
4
5
6

FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_
FB C_

CMD1
CMD1
CMD1
CMD2
CMD2
CMD2
CMD2
CMD2
CMD2
CMD2
CMD2
CMD2
CMD2
CMD3
CMD3

7
8
9
0
1
2
3
4
5
6
7
8
9
0
1

FB C_ CLK 0
FB C_ CLK 0#
FB C_ CLK 1
FB C_ CLK 1#

FBB _O DT_ L
FBB _O DT_ H
FBB _C KE_ L
FBB _C KE_ H
FBB _R ST#

F BC _C MD 2 R 75
F BC _C MD 18 R 83
F BC _C MD 3 R 73
F BC _C MD 19 R 88
F BC _C MD 5 R 84

FB C_C LK 0 15
FB C_C LK 0# 1 5
FB C_C LK 1 15
FB C_C LK 1# 1 5

F BC _D EBU G 0
F BC _D EBU G 1

R8 1
R7 6

*60. 4_ 04
*10K _04

FB _C AL_P D_V D DQ

R9 0

40 .2_ 1%_04

R9 6

40 .2_ 1%_04

FB _C AL_TE RM_G N D R9 1

60 .4_ 1%_04

FB _C AL_P U_G N D

12, 37 PE X_VD D
14, 15, 37 FB VD DQ

B - 14 VGA Frame Buffer Interface

C 133

0. 1u_10 V_X7R _04
P LAC E U ND E R BG A
W27
Y2 7

FB V D D Q

HC B1 005KF - 121T20

C 137

N12 E- GE -A 1 GF 106- 700- A 1
N 12E- G E- A1 G F106 -70 0-A 1

C99

P EX_ VD D

FB A_D PL LAVD D

P LAC E N EA R BA LLS

C 141

FBB_D 31
FBB_D 32
FBB_D 33
FBB_D 34
FBB_D 35
FBB_D 36
FBB_D 37
FBB_D 38
FBB_D 39
FBB_D 40
FBB_D 41
FBB_D 42

FB CD Q S_R N[ 7: 0]

G14
G15

F B VD D Q

FB VD DQ

C1 36

FBB_D 29
FBB_D 30

A16
D10
F11
D15
D27
D34
A34
D28

FBVD DQ
FBVD DQ
FBVD DQ
FBVD DQ
FBVD DQ
FBVD DQ
FBVD DQ
FBVD DQ
FBVD DQ
FBVD DQ
FBVD DQ

FBB_D 14
FBB_D 15
FBB_D 16
FBB_D 17
FBB_D 18
FBB_D 19
FBB_D 20
FBB_D 21
FBB_D 22
FBB_D 23
FBB_D 24
FBB_D 25
FBB_D 26
FBB_D 27
FBB_D 28

15 FB C DQ S_WP [ 7:0 ]

16 mi l

FB _VR EF _TP J 27

FBC _D 37
FBC _D 38
FBC _D 39
FBC _D 40
FBC _D 41
FBC _D 42
FBC _D 43
FBC _D 44
FBC _D 45
FBC _D 46
FBC _D 47
FBC _D 48
FBC _D 49
FBC _D 50
FBC _D 51

G11
G12
G27
G28
G24
G25

FB _DLLAVD D
F B_PLLAVD D
GT21x

A17
D16
C13
B11
C11
A11
C10
C8
B8
A8
E8
F8
F10
F9
F12
D8
D11

FBB_D 0
FBB_D 1
FBB_D 2
FBB_D 3
FBB_D 4
FBB_D 5
FBB_D 6
FBB_D 7
FBB_D 8
FBB_D 9
FBB_D 10
FBB_D 11
FBB_D 12
FBB_D 13

FB CD Q M[ 7: 0]

0K_04
0K_04
0K_04
0K_04
0K_04

14 F BA DQ S_R N [7 :0]
FBA D QS _RN 0 L 35
FBA D QS _RN 1 G 35
FBA D QS _RN 2 H 31
FBA D QS _RN 3 N 32
FBA D QS _RN 4 AD 32
FBA D QS _RN 5 AJ 31
FBA D QS _RN 6 AJ 35
FBA D QS _RN 7 AC 34

B13
D13
A13
A14
C16
B16

E11
D12
E13
F13
F14
F15
E16
F16
F17
D29
F27
F28
E28
D26
F25
D24
E25
E32
F32
D33
E31
C33
F29
D30
E29
B29
C31
C29
B31

FBC _D 25
FBC _D 26
FBC _D 27
FBC _D 28
FBC _D 29
FBC _D 30
FBC _D 31
FBC _D 32
FBC _D 33
FBC _D 34
FBC _D 35
FBC _D 36

FBA _C MD [ 31: 0]
G T21X

14 F BA DQ S_W P[ 7: 0]

F BAD Q S_R N[ 7: 0]

0. 1u_ 10V_X 7R_ 04

C13 1

FBC _D 0
FBC _D 1
FBC _D 2
FBC _D 3
FBC _D 4
FBC _D 5
FBC _D 6
FBC _D 7

FBA _D28
FBA _D29
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA
FBA

F BAD Q M[ 7: 0]

C 134

AC 27
AD 27
AE 27
AJ 28
B1 8
E2 1
G 17
G 18
G 22
G8
G9
H 29
J14
J15

J18
J19AF2
AG727

B.Schematic Diagrams

FB A_D 22
FB A_D 23

L 32
N 33
L 33
N 34
N 35

FB C_ D[ 63: 0]

M28
M27 L2L2
7 8K 28
K 27

FB A_D 0
FB A_D 1
FB A_D 2
FB A_D 3
FB A_D 4
FB A_D 5
FB A_D 6

F BV DD Q

AB2A9
B2
AA7
A
3A1
2A9
AJ29
2 J24
7 J23

1 4 F BA _D[ 63: 0]

15

V 34
V 29
V 27
U 29
U 27
TR
2727
P 27
N 27

FB C_D [ 63: 0]
F BA_ D[ 63: 0]

F B VDDQ

1 0K_04
1 0K_04
1 0K_04
1 0K_04
1 0K_04

Schematic Diagrams

VGA Frame Buffer A
Frame Buffer Partition A

F B A_ C MD [ 3 1: 0]

FB V D DQ

1 3 FB A _C MD [ 31: 0]

F BV D D Q

F BA _D [ 63 :0 ]
13

F BA _D [ 6 3: 0]

13 F BA D Q M[ 7: 0]
C 2 10

C 63 1

C 6 66

C 24 1

C 2 34

C 790

C 24 4

C2 15

F BA D Q M[7 : 0]

C2 43

C 792

C 24 0

C 6 49

C 66 5

C 1 87

C 18 1

C 1 80

C 63 0

F BA D Q S_ WP [ 7: 0]

0. 1u_ 16 V_ Y5 V_ 04

*0. 1u _16 V_ Y 5V _04

0. 1u _1 6V _Y 5V _0 4

0 . 1u_ 16V _Y 5 V_ 04

0. 1u _1 6V _Y 5V _0 4

0 . 1u_ 16V _Y 5 V_ 04

1u _6. 3 V_ X5R _ 04

1 u_ 6. 3V _X5 R _04

1u _6. 3 V_ X5R _ 04

C 65 1
13 F B AD Q S _W P[ 7: 0 ]

0 . 1u_ 16V _Y 5 V_ 04

0. 1u _1 6V _Y 5V _04

0 . 1u_ 16V _Y 5 V_ 04

0. 1u _1 6V_ Y 5V _04

0 . 1u_ 16V _Y 5 V_ 04

*0. 1u _1 6V _Y 5V _0 4

1u _6 .3 V_ X5R _ 04

1u_ 6. 3V _X 5R _0 4

1u _6 3
. V_ X5R _ 04
F BA D Q S_ R N[ 7 0
: ]
1 3 FB AD Q S _R N [ 7: 0]

F BV D D Q

F BV D D Q

FB V D DQ

C 6 25

C 24 5

C 2 46

C 63 4

C 6 58

C 791

C 63 8

C6 67

C 20 9

C6 48

C 23 8

C2 32

C 21 7

C6 64

C 793

C 65 3

C 6 62

C 21 3

C 2 18

C 20 0

C 1 88

C 63 7

0 . 1u_ 16V _Y 5 V_ 04

0. 1u _1 6V _Y 5V _04

0 . 1u_ 16V _Y 5 V_ 04

0. 1u _1 6V_ Y 5V _04

0 . 1u_ 16V _Y 5 V_ 04

*0. 1u _1 6V _Y 5V _0 4

1u _6 .3 V_ X5R _ 04

1u_ 6. 3V _X 5R _0 4

1u _6 3
. V_ X5R _ 04

1u_ 6. 3V _X 5R _0 4

1u _6. 3 V_ X5R _ 04

1u_ 6. 3V _X 5R _0 4

1u _6. 3 V_ X5R _ 04

0. 1u_ 16 V_ Y5 V_ 04

*0. 1u _16 V_ Y 5V _04

0. 1u _1 6V _Y 5V _0 4

0 . 1u_ 16V _Y 5 V_ 04

0. 1u _1 6V _Y 5V _0 4

0 . 1u_ 16V _Y 5 V_ 04

1u _6. 3 V_ X5R _ 04

1 u_ 6. 3V _X5 R _04

1u _6. 3 V_ X5R _ 04

U 51

U 10

FB V DD Q

U5 0

F BV D D Q

F BV D D Q

FB VD D Q
G F1X X

FB A _C MD 15
FB A _C MD 13
FB A _C MD 0

J3
K3
L3

R AS
C AS

VDD
VDD

L2

WE

VDD

CS

VDD
VDD
VDD

FB A _C MD 9

N3

FB A _C MD 11

P7
P3
N2

FB A _C MD 8
FB A _C MD 25

A0

VDD

A1
A2
A3

VDD
VDD

B2
D9

F BA _C M D 3 0
F BA _C MD 1 5
F BA _C MD 1 3

G7

W E

VDD

CS

VDD
VDD
VDD

F BA _C MD 9

N3

F BA _C MD 1 1
F BA _C MD 8
F BA _C MD 2 5

P7
P3
N2

A1

F BA _C MD 1 0

P8

A8
C1
C9

F BA _C MD 2 4
F BA _C MD 2 2
F BA _C MD 7

A4

V DDQ

A5
A6

V DDQ
V DDQ

T8
R3

A7

V DDQ

A8

V DDQ

D2
E9

L7
R7

A9
A1 0

V DDQ
V DDQ

F1
H2

F BA _C MD 6
F BA _C MD 2 9
F BA _C MD 2 3

N7
T3

A1 1

V DDQ

H9

F BA _C MD 2 8

A1 2

V DDQ

T7
M7

A1 3
A1 4/ N C 6

FB A _C MD 20
FB A _C MD 4
FB A _C MD 14

L2

R1
R9

P8

FB A _C MD 28

VDD
VDD

N9

P2
R8
R2

FB A _C MD 6
FB A _C MD 29
FB A _C MD 23

RA S
CA S

F BA _C MD 0

FB A _C MD 24

FB A _C MD 21

L3

K2
K8
N1

FB A _C MD 10
FB A _C MD 22
FB A _C MD 7

J 3
K3

F BA _C MD 2 1

F BA _C MD 2 0
F BA _C MD 4
F BA _C MD 1 4

FB A _C MD 26

BA 0

VS S

BA 1

VS S

BA 2

VS S
VS S

13

FB A _C LK 0

13

FB A _C LK 0#

FB A _C LK 0#

K9
J7
K7

VS S
C KE
CK

VS S
VS S

CK

VS S

J1
J9
L1
L9

FB A _C MD 5

NC1
NC2

VS S Q

NC4

VS S Q
VS S Q
VS S Q
VS S Q

R ES E T
FB A _C MD 2

K1
OD T

FB A _Z Q 0

VS S
VS S

NC3

T2

L8

VS S Q
VS S Q
VS S Q

F BA _C MD 2 6

J8
M1
M9

R 13 6

P9
T1
T9

FB A_ D 14
FB A_ D 8

F7
F2
F8

FB A_ D 13

H3

FB A_ D 10
FB A_ D 15
FB A_ D 11

FB AD Q M1
FB AD Q S _W P1

F BA _C L K0 #

H8
G2
H7

E7
F3

FB AD Q S _R N 1 G 3

D Q L0

D QU 0

D Q L1
D Q L2
D Q L3

D QU 1
D QU 2
D QU 3

D Q L4

D QU 4

D Q L5
D Q L6
D Q L7

D QU 5
D QU 6
D QU 7

D ML

D MU

D Q SL

D QS U

D Q SL

D QS U

K4W 2G 1 646 C -H C 1 1

W E

V DD

CS

V DD
V DD
V DD

F B A_ C MD 9

N3

R1
R9

F B A_ C MD 1 1
F B A_ C MD 8
F B A_ C MD 2 5

P7
P3
N2

A1

F B A_ C MD 1 0

P8

A8
C1
C9

F B A_ C MD 2 4
F B A_ C MD 2 2
F B A_ C MD 7

A4

V DDQ

A5
A6

V DDQ
V DDQ

T8
R3

A7

V DDQ

A8

V DDQ

D2
E9

L7
R7

A9
A 10

V DDQ
V DDQ

F1
H2

F B A_ C MD 6
F B A_ C MD 2 9
F B A_ C MD 2 3

N7
T3

A 11

V DDQ

H9

F B A_ C MD 2 8

A 12

V DDQ

T7
M7

A 13
A 14 /N C 6

M2
N8
M3

F B A_ C MD 2 1

F B A_ C MD 2 0
F B A_ C MD 4
F B A_ C MD 1 4

B A0

VS S

B A1

VS S

B A2

VS S
VS S

K9
J 7
K7

J 9
L1
L9

VS S
CK E
CK

VS S
VS S

CK

VS S

D1

NC1
NC2

E2
E8

F BV D D Q

F BA _C MD 5

V SS Q

NC4

V SS Q
V SS Q
V SS Q

T2

F9

V SS Q
R E SE T

F BA _C MD 2

G1

K1
OD T

G9
R 14 1

FB A _Z Q1

VS S
VS S

NC3

D8

L8

V SS Q
V SS Q
V SS Q

P9
T1
T9

R 13 8

0. 01 u_1 6V _X 7R _0 4

1. 1 K_ 1%_0 4

13

F BA _C L K1

F BA _D 29

E3

C3
C8
C2

F BA _D 1 9

F BA _D 28

F BA _D 2 0
F BA _D 1 7

F BA _D 30
F BA _D 25

F7
F2
F8

A7

F BA _D 2 1

F BA _D 26

H3
H8
G2
H7

D Q L0

D QU 0

D Q L1
D Q L2
D Q L3

D QU 1
D QU 2
D QU 3

D Q L4

D QU 4

D Q L5
D Q L6
D Q L7

D QU 5
D QU 6
D QU 7

A2
B8
A3

F BA _D 1 8

F BA _D 27

F BA _D 2 3
F BA _D 1 6

F BA _D 31
F BA _D 24

D3
C7

F B AD Q M2
F B AD Q S _W P2

E7
F BA D Q M3
F BA D Q S_ WP 3 F 3

D ML

B7

F B AD Q S _R N 2

F BA D Q S_ R N3

G3

VD D
VD D

WE

VD D

CS

VD D
VD D
VD D

FB A _C MD 9

N3

R1
R9

FB A _C MD 11
FB A _C MD 8
FB A _C MD 25

P7
P3
N2

A1

FB A _C MD 10

P8

A8
C1
C9

FB A _C MD 24
FB A _C MD 22
FB A _C MD 7

P2
R8
R2

A4

VD D Q

A5
A6

VD D Q
VD D Q

T8
R3

A7

VD D Q

A8

VD D Q

D2
E9

L7
R7

A9
A 10

VD D Q
VD D Q

F1
H2

FB A _C MD 6
FB A _C MD 29
FB A _C MD 23

N7
T3

A 11

VD D Q

H9

FB A _C MD 28

A 12

VD D Q

T7
M7

A 13
A 14 / NC 6

M2
N8
M3

FB A _C MD 21

FB A _C MD 20
FB A _C MD 4
FB A _C MD 14

A0

VD D

A1
A2
A3

VD D
VD D

P2
R8
R2

A4

V DD Q

A5
A6

V DD Q
V DD Q

T8
R3

A7

V DD Q

A8

V DD Q

L7
R7

A9
A1 0

V DD Q
V DD Q

N7
T3

A1 1

V DD Q

A1 2

V DD Q

T7
M7

A1 3
A1 4/ N C 6

13

F BA _C L K1 #

K9

F B A_ C LK 1#

K7

J 7

BA0

V SS

BA1

V SS

BA2

V SS
V SS
V SS

CKE
CK

V SS
V SS

CK

V SS

J 1
J 9
L1
L9

D1

NC1
NC2

E2
E8

F B A_ C MD 5

V SS Q

NC4

V SS Q
V SS Q
V SS Q

T2

F9

V SS Q
R E S ET

F B A_ C MD 1 8

G1

K1
ODT

G9
F B A_ ZQ 2

V SS
V SS

NC3

D8

L8

V SS Q
V SS Q
V SS Q

F B A_ VR E F 0

FB A _C MD 12
FB A _C MD 27

B3
E1
G8

FB A _C MD 26

J 8
M1
M9

R1 35

P9
T1
T9

F B A_ D3

F BA _D 3 7

E3

C3
C8
C2

F B A_ D6

F BA _D 3 3

F B A_ D1
F B A_ D7

F BA _D 3 9
F BA _D 3 2

F7
F2
F8

A7

F B A_ D2

F BA _D 3 6

H3
H8
G2
H7

D QL 0

DQU 0

D QL 1
D QL 2
D QL 3

DQU 1
DQU 2
DQU 3

D QL 4

DQU 4

D QL 5
D QL 6
D QL 7

DQU 5
DQU 6
DQU 7

F B A_ D5

F BA _D 3 4

F B A_ D0
F B A_ D4

F BA _D 3 8
F BA _D 3 5

D MU

D3
C7

F B AD Q M0
F B AD Q S _WP 0

E7
F BA D Q M4
F BA D Q S_ WP 4 F 3

D ML

D QS L

D QS U

B7

F B AD Q S _R N 0

F BA D Q S_ R N 4 G 3

D QS L

D QS U

K7

VSS
VSS

BA 2

VSS
VSS
VSS

C KE
CK

VSS
VSS

CK

VSS

J1

160 _1% _04

L1
L9

D1

NC1
NC2

E2
E8

F B VD D Q

FB A _C MD 5

V S SQ

NC4

V S SQ
V S SQ
V S SQ

T2

F9

V S SQ
R ES E T

FB A _C MD 18

G1

K1
ODT

G9
F BA _Z Q 3

VSS
VSS

NC3

D8

L8

V S SQ
V S SQ
V S SQ

N9
R1
R9

1. 1K _1% _04

C MD4
C MD5

A 14
R ST

A1 4
RS T

C MD6

A 9

A9

C MD7

A 7

A7

C MD8
C MD9

A 2
A 0

A2
A0

A 4
A 1

D2
E9

C MD1 2
C MD1 3

B A0
W E#

BA 0
WE #

C MD1 4

A 15

A1 5

F1
H2

C MD1 5
C MD1 6

C AS#

CA S#
CS 0#

H9

C MD1 7
C MD1 9
C MD2 0

A 13

CK E
A1 3

C MD2 1

C MD1 8

A4
A1

OD T

A 8

A8

A9

C MD2 2

A 6

A6

B3
E1
G8

C MD2 3
C MD2 4

A 11
A 5

A1 1
A5

C MD2 5

A 3

A3

J2

C MD2 6
C MD2 7
C MD2 8

B A2
B A1
A 12

BA 2
BA 1
A1 2

C MD2 9

A 10

A1 0

C MD3 0

R AS#

RA S#

J8
M1
M9
P1

Sheet 14 of 49
VGA Frame Buffer
A

P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9

16mil
<500mil
VR E FD Q

F BA _V R EF 1

M8

V RE F C A

243 _1% _04
R1 43

C KE

C MD1 0

H1

R 522

0 . 01u _16 V_ X7R _ 04

C MD3

O DT

ZQ

M8
C 2 42

C S0#

C MD1 1

A8
C1
C9

1. 1K _1% _04

F BA _V R EF 1

32 .. 63

C MD0
C MD1
C MD2

V S SQ

D7

FB A _D 56

F B A_ D 45

E3

C3
C8
C2

FB A _D 59

F B A_ D 47

FB A _D 58
FB A _D 62

F B A_ D 42
F B A_ D 46

F7
F2
F8

A7

FB A _D 61

F B A_ D 43

H3
H8
G2
H7

D7

F BA _D 5 1

C3
C8
C2

F BA _D 5 2

A7

F BA _D 4 9

A2
B8
A3

F BA _D 5 0
F BA _D 5 3

DMU

D3
C7

F BA D Q M6
F BA D Q S_ WP 6

B7

F BA D Q S_ R N 6

D Q L0

DQU 0

D Q L1
D Q L2
D Q L3

DQU 1
DQU 2
DQU 3

D Q L4

DQU 4

D Q L5
D Q L6
D Q L7

DQU 5
DQU 6
DQU 7

A2
B8
A3

FB A _D 57

F B A_ D 44

FB A _D 60
FB A _D 63

F B A_ D 40
F B A_ D 41

D MU

D3
C7

F BA D Q M7
F BA D Q S_ WP 7

E7
F B AD Q M5
F B AD Q S _W P5 F 3

D ML

D QS L

DQ S U

B7

F BA D Q S_ R N 7

F B AD Q S _R N 5 G 3

D Q SL

D Q SU

D QS L

DQ S U

D Q SL

D Q SU

K 4W2 G 164 6C - H C 11

K2
K8
N1

R1 44

VR E FC A

D7

FB A _C LK 1#

J7

J9

H1

24 3_1 %_0 4

K9

F BA _C L K1 #

B1
B9

16mil
<500mil
V R EF D Q

BA 0
BA 1

VSS

P1

FB A _C MD 19
FB A _C LK 1

SDD R3 _BG A96
0 ..3 1

G7

A1

VSS

F BA _C L K1

ZQ

R 139

M2
N8
M3

J 2

V SS Q

M8

B2
D9

A1 5/ N C 5
V SS

A2
B8
A3

K4 W2 G 164 6C - H C 11

R AS
C AS

L2

N9

V DD
V DD
V DD

F B A_ C MD 1 9
F B A_ C LK 1

B1
B9

V R E FC A

F BA _D 2 2

L3

FB A _C MD 16

A0

V SS

P1

H1
V R EF D Q

D7

J3
K3

K2
K8
N1

16mil
<500mil
24 3_ 1%_0 4

C 233

F B A_ C MD 2 6

J8
M1
M9

ZQ

R 14 0

FB A _C MD 15
FB A _C MD 13

A1
A2
A3

J2

V SS Q

M8

FB A _C M D 30

G7

A9
F B A_ C MD 1 2
F B A_ C MD 2 7

B3
E1
G8

1. 1 K_ 1%_0 4

F B A_ VR E F0

B2
D9

A 15 / NC 5
VS S

J 1

16 0_1 %_0 4
FB A_ C LK 0#

B1
B9

V R EF C A

FB A_ D 9

L2

N9

P2
R8
R2

VS S
F BA _C MD 3
F BA _C L K0

P1

H1
VR E F D Q

E3

V DD
V DD

F B A_ C MD 1 6

VDD

FB A_ C LK 0

16mil
<500mil

FB A_ D 12

RAS
CAS

K2
K8
N1

VDD
VDD

J2

ZQ

2 43_ 1%_ 04

L3

A9
F BA _C MD 1 2
F BA _C MD 2 7

B3
E1
G8

VS S Q

R 1 37

J 3
K3

A 15 /N C 5
VS S

VS S
FB A _C MD 3
FB A _C LK 0

F B A_ C MD 1 5
F B A_ C MD 1 3

A0

A9
M2
N8
M3

F B A_ C MD 3 0

G7

A1
A2
A3

A1 5/ N C 5
FB A _C MD 12
FB A _C MD 27

B2
D9

F BA _D 4 8
F BA _D 5 4
F BA _D 5 5

K 4W 2G 16 46 C- H C 11

1 3, 15, 3 7 FB V DD Q

VGA Frame Buffer A B - 15

B.Schematic Diagrams

U9

FB A _C M D 30

Schematic Diagrams

VGA Frame Buffer B
Frame Buffer Partition B

F BV D D Q

FB V D DQ

FB C _C MD [ 31: 0]
C5 70

C 30

C 57 8

C5 76

C 574

C 78 4

C5 4

C 568

C 58 0

13 F BC _ C MD [ 3 1: 0]

C 155

C 152

C 14 7

C 5 72

C 62

C 78 8

0. 1u_ 16 V_ Y5 V_ 04

0. 1u _16 V_ Y5 V_ 04

0. 1u _1 6V _Y 5V _04

0 .1 u_ 16V _Y 5V _0 4

0. 1u_ 16 V_ Y5 V_ 04 *0. 1 u_1 6V _Y 5V _0 4

C 1 20

C1 57

1 u_6 .3 V_ X5 R_ 04

1u_ 6. 3V _X5 R _04

C 78 6

F BC _ D [6 3: 0]
13
0. 1u_ 16 V_Y 5 V_ 04

0. 1u _16 V_ Y 5V _04

0 .1 u_1 6V _Y 5V _0 4

0. 1u_ 16V _Y 5 V_ 04

0. 1u _16 V_ Y 5V _04

*0 .1 u_1 6V _Y 5V _0 4

1u_ 6. 3V _X5 R _04

1u _6. 3V _X 5R _0 4

FB C _D [ 63 :0 ]

*1 u_6 . 3V_ X5 R_ 04

*1u _6. 3 V_ X5R _ 04

F BC D Q M[ 7: 0]

1 3 FB C D Q M[ 7 :0 ]

F BC D Q S _W P[ 7: 0]
F BV D D Q

13 F BC D Q S_ WP [ 7: 0]
F BC D Q S _R N [ 7: 0]

FB V D DQ

B.Schematic Diagrams

13 F BC D Q S _R N [ 7: 0]
C6 05

C 58 6

C 61 0

C6 00

C 146

0. 1u_ 16 V_Y 5 V_ 04

0. 1u _16 V_ Y 5V _04

0 .1 u_1 6V _Y 5V _0 4

0. 1u_ 16V _Y 5 V_ 04

0. 1u _16 V_ Y 5V _04

C 78 5
*0. 1u _1 6V_ Y 5V _04

C5 92

C 156

C 36 2

1u_ 6. 3V _X5 R _04

1u _6. 3V _X 5R _0 4

*1 u_6 . 3V_ X5 R_ 04

U4

C 68

C 160

C 11 6

C 5 85

C 599

0. 1u_ 16 V_ Y5 V_ 04

0. 1u _16 V_ Y5 V_ 04

0. 1u _1 6V _Y 5V _04

0 .1 u_ 16V _Y 5V _0 4

0. 1u_ 16 V_ Y5 V_ 04

C 78 9
*0. 1u _16 V_ Y5 V_ 04

C 5 90

C6 03

C 78 7

1 u_6 .3 V_ X5 R_ 04

1u_ 6. 3V _X5 R _04

*1u _6. 3 V_ X5R _ 04

U4 4
U7
F BV D D Q

U4 7

F B VD D Q
FB V D DQ

Sheet 15 of 49
VGA Frame Buffer
B

FB C _C M D 30
FB C _C MD 15

J3
K3

FB C _C MD 13
FB C _C MD 0

L3
L2

FB C _C MD 9
FB C _C MD 11
FB C _C MD 8
FB C _C MD 25
FB C _C MD 10
FB C _C MD 24
FB C _C MD 22
FB C _C MD 7
FB C _C MD 21
FB C _C MD 6
FB C _C MD 29
FB C _C MD 23
FB C _C MD 28
FB C _C MD 20
FB C _C MD 4
FB C _C MD 14

13
13

FB C _C LK 0
FB C _C LK 0#

WE
CS

V DD
V DD
V DD

J3
K3

G7
K2
K8

F BC _ C MD 1 3
F BC _ C MD 0

L3
L2

V DD
V DD

N1
N9
R1
R9

F BC _ C MD 1 1
F BC _ C MD 8

A1
A8

F BC _ C MD 2 5
F BC _ C MD 1 0
F BC _ C MD 2 4

A1
A2

V DD
V DD

A3
A4
A5

VD D Q
VD D Q

A6
A7
A8

VD D Q
VD D Q
VD D Q

A9
A1 0

VD D Q
VD D Q

E9
F1
H2

A1 1
A1 2
A1 3

VD D Q
VD D Q

H9

R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

M3

K9
J7
K7
J1
J9
L1
L9

F BC _ C MD 9

F BC _ C MD 2 2
F BC _ C MD 7

C1
C9
D2

F BC _ C MD 2 1
F BC _ C MD 6
F BC _ C MD 2 9
F BC _ C MD 2 3
F BC _ C MD 2 8
F BC _ C MD 2 0
F BC _ C MD 4
F BC _ C MD 1 4

A1 4/ N C 6
A1 5/ N C 5

BA 0
BA 1

V SS
V SS
V SS

BA 2

V SS
V SS
V SS
V SS

CK E
CK
CK
NC 1
NC 2
NC 3
NC 4

T2
RE S ET
K1
OD T

FB C _Z Q 0

F BC _ C MD 3 0
F BC _ C MD 1 5

A0

N2
P8
P2

M2
N8

FB C _C MD 2

B2
D9

P3

FB C _C MD 26

FB C _C MD 5

V DD
V DD

N3
P7

FB C _C MD 12
FB C _C MD 27

FB C _C MD 3
FB C _C LK 0
FB C _C LK 0#

RA S
CA S

V SS
V SS
V SS
V SS
V SS

D8
E2
E8

V SS Q
V SS Q
V SS Q

F9
G1

V R EF D Q
VR E FC A

F B C _D 15
F B C _D 9
F B C _D 12
F B C _D 10
F B C _D 14
F B C _D 8
F B C _D 13
F B C _D 11

E3
F7
F2
F8
H3
H8
G2
H7

F B C DQ M1
E7
F B C DQ S _W P1 F 3
G3
F B C DQ S _R N 1

DQ L 0
DQ L 1
DQ L 2

D Q U0
D Q U1
D Q U2

DQ L 3
DQ L 4

D Q U3
D Q U4

DQ L 5
DQ L 6

D Q U5
D Q U6

DQ L 7

D Q U7

DML
DQ S L

D MU
DQ S U

DQ S L

DQ S U

K 4W 2G 16 46C - H C 11

V D DQ
V D DQ

H9

T7
M7

K9
J7
K7
J1
J9
L1
L9

R 60

H1
M8

F BC _Z Q 1

B A0
B A1

VSS
VSS
VSS

B A2

VSS
VSS
VSS
VSS

CK E
CK
CK
NC1
NC2
NC3
NC4

T2
K1

FB C _V R EF 0

VSS
VSS
VSS
VSS
VSS

C 43

R 48 5

0. 0 1u_ 16V _X 7R _0 4

1. 1 K_ 1%_ 04

P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7

FB C _C MD 20
FB C _C MD 4
FB C _C MD 14

T3
T7
M7

A9
B3
E1

FB C _C MD 12

M2

G8

FB C _C MD 27

N8

FB C _C MD 26

J2
J8
M1
M9
P1
P9
T1
T9

13

FB C _C LK 1

13

FB C _C LK 1#

M3

FB C _C MD 19
FB C _C LK 1

K9
J 7

FB C _C LK 1#

K7

V DD
V DD
V DD
V DD

J 9
L1
L9

VS SQ
VS SQ
VS SQ

D8
E2
E8

VS SQ
VS SQ
VS SQ

F9
G1

FB C _C MD 5

T2

G9

FB C _C MD 18

K1

FB C _Z Q 2

L8

V DD
V DD

R1

V DDQ

A5
A6
A7

V DDQ
V DDQ
V DDQ

A8
A9

V DDQ
V DDQ

D2
E9
F1

A 10
A 11
A 12

V DDQ
V DDQ
V DDQ

H2
H9

FB C _D 23
FB C _D 19
FB C _D 18

F BC _D 2 9
F BC _D 2 7
F BC _D 3 0

B8

FB C _D 17
FB C _D 22

F BC _D 2 4
F BC _D 3 1

FB C _D 16

F BC _D 2 5

D3
C7
B7

FB C D Q M2
FB C D Q S_ WP 2

E3
F7
F2
F8
H3
H8
G2
H7

F BC D Q M3
E7
F BC D Q S_ WP 3 F3
G3
F BC D Q S_ R N 3

D Q L0
D Q L1
D Q L2

D QU 0
D QU 1
D QU 2

D Q L3
D Q L4

D QU 3
D QU 4

D Q L5
D Q L6

D QU 5
D QU 6

BA0

VS S
VS S

BA1

VS S

BA2

VS S
VS S
VS S

CK E
CK

D Q L7

D QU 7

D ML
D Q SL

D MU
D Q SU

D Q SL

D Q SU

F BC _C MD 24
F BC _C MD 22

A8
C1
C9

F BC _C MD 7
F BC _C MD 21
F BC _C MD 6
F BC _C MD 29
F BC _C MD 23
F BC _C MD 28

VS S
VS S
VS S

P2
R8
R2
T8
R3
L7
R7
N7

A9
B3

F BC _C MD 12

M2

E1

F BC _C MD 27

N8

F BC _C MD 26

G8
J2
J8
M1
M9
P1

FB C _C LK 1

B1
B9

VS S Q
VS S Q
VS S Q

D1
D8
E2

VS S Q
VS S Q
VS S Q

E8
F9

F BC _C MD 19
F BC _C L K1
F BC _C L K1 #

P9
T1
T9

VS S
VS S
VS S
VS S Q

VS S Q
VS S Q

P7
P3
N2
P8

T3
T7
M7

NC2
NC3

M3

K9
J7
K7

VD D
VD D
VD D
VD D
VD D
VD D

J9
L1
L9

VD D
VD D

VD D Q

A5
A6
A7

VD D Q
VD D Q
VD D Q

A8
A9

VD D Q
VD D Q

D2
E9
F1

A1 0
A1 1
A1 2

VD D Q
VD D Q
VD D Q

H2
H9

16mil
<500mil

F BC _C MD 5

T2

F BC _C MD 18

K1

FB C _Z Q 3

L8

R 50 1

R1
R9

VD D
A1
A8
C1
C9

BA 0

V SS
V SS

BA 1

V SS

BA 2

V SS
V SS
V SS

C KE
CK

V SS
V SS
V SS

A9
B3
E1
G8
J 2
J 8
M1
M9
P1

V SS
V SS
V SS

NC2
NC3

V S SQ

B1
B9

V S SQ
V S SQ
V S SQ

D1
D8
E2

R ES E T

V S SQ
V S SQ
V S SQ

E8
F9

OD T

V S SQ
V S SQ

H1

FB C _D 3
FB C _D 7

F BC _ D 37

E3
F7

FB C _D 0
FB C _D 6
FB C _D 1

F BC _ D 35
F BC _ D 36
F BC _ D 34

B8

FB C _D 4
FB C _D 2

F BC _ D 39
F BC _ D 33

FB C _D 5

F BC _ D 38
F BC _ D 32

G2
H7

D3
C7
B7

FB C D Q M0
FB C D Q S_ WP 0

F BC D Q M4

E7
F3

FB C D Q S_ RN 0

F B C _V RE F 1

R 504

F2
F8
H3
H8

F BC D Q S _W P4
F BC D Q S _R N 4 G 3

D QL 0
D QL 1

DQ U 0
DQ U 1

D QL 2
D QL 3

DQ U 2
DQ U 3

D QL 4
D QL 5

DQ U 4
DQ U 5

D QL 6
D QL 7

DQ U 6
DQ U 7

D ML
D QS L
D QS L

D MU
D QS U
D QS U

H1
VR E FD Q

M8
R 50 2

0. 01 u_1 6V _X7 R _04

1. 1K _1 %_0 4

F B C_ D 59

FB C _D 44

F B C_ D 62
F B C_ D 57
F B C_ D 61

FB C _D 46
FB C _D 40
FB C _D 45

A2

F B C_ D 58
F B C_ D 63

FB C _D 42
FB C _D 47

B8
A3

F B C_ D 56
F B C_ D 60

FB C _D 41
FB C _D 43

G2
H7

FB C D Q M7

FB C D Q M5

FB C D Q S_ WP 7
FB C D Q S_ RN 7

E7
F3

FB C D Q S_ WP 5
FB C D Q S_ RN 5 G 3

D7
C3
C8
C2
A7

D3
C7
B7

FB C _V R EF 1

M8

VR E F CA

24 3_1 %_04
C 142

E3
F7
F2
F8
H3
H8

D Q L0
D Q L1

D QU 0
D QU 1

D Q L2
D Q L3

D QU 2
D QU 3

D Q L4
D Q L5

D QU 4
D QU 5

D Q L6
D Q L7

D QU 6
D QU 7

D7
C3
C8
C2
A7

FB C _D 50
FB C _D 52

FB C D Q M6

D ML

D MU
D Q SU
D Q SU

B7

1 3, 14 ,3 7 FB V D DQ

FB C _D 53
FB C _D 48
FB C _D 54
FB C _D 51
FB C _D 55

D Q SL
D Q SL

K 4W 2G 16 46 C- H C 11

FB C _D 49

A2
B8
A3

D3
C7

K4 W2G 1 646 C -H C 1 1

R ST

R ST

CMD 6
CMD 7
CMD 8

A 9
A 7
A 2

A 9
A 7
A 2

CMD 9
CMD 10
CMD 11

A 0
A 4
A 1

A 0
A 4
A 1

CMD 12
CMD 13
CMD 14

B A0
W E#
A 15

B A0
W E#
A 15

CMD 15
CMD 16
CMD 17

C AS#

FB C D Q S_ WP 6
FB C D Q S_ R N6

C AS#
C S0#
O DT
C KE

CMD 20
CMD 21
CMD 22

A 13
A 8
A 6

A 13
A 8
A 6

CMD 23
CMD 24

A 11
A 5

A 11
A 5

CMD 25
CMD 26

A 3
B A2

A 3
B A2

CMD 27
CMD 28
CMD 29

B A1
A 12
A 10

B A1
A 12
A 10

CMD 30

R AS#

R AS#

16mli
<500mil

1. 1K _1 %_0 4

V R EF C A

A 14

CMD 5

G1
G9

ZQ

3 2.. 63

O DT
C KE
A 14

P9
T1
T9

NC1

F BC _V R E F0
R 95

0 ..3 1
C S0#

CMD 2
CMD 3
CMD 4

CMD 18
CMD 19

A1 3
A1 4/ N C 6
A1 5/ N C 5

NC4

FB V D DQ

G1
G9

K8
N1
N9

A2
A3
A4

J1
16 0_1 %_0 4

CMD 0
CMD 1

D9
G7
K2

A0
A1

CK

R 10 8

FB C _C LK 1#

ZQ

K 4W2 G 164 6C - H C 11

B - 16 VGA Frame Buffer B

SD DR3 _BG A96

B2
R AS
C AS
WE
CS

N3

F BC _C MD 20
F BC _C MD 4
F BC _C MD 14

NC1

R E S ET

A3

C2
A7
A2

F BC _C MD 8
F BC _C MD 25
F BC _C MD 10

A1

V R EF D Q

D7
C3
C8

F BC _C MD 9
F BC _C MD 11

R9

V DD

A 13
A 14 / NC 6
A 15 / NC 5

24 3_1 %_0 4

F BC _D 2 8
F BC _D 2 6

K3
L3
L2

A2
A3
A4

OD T

H1
M8

J3

F BC _C MD 15
F BC _C MD 13
F BC _C MD 16

A0
A1

NC4

ZQ

F BC _C M D 30

D9
G7
K2
K8
N1
N9

CK

B1
B9
D1

B2

V DD
V DD

J 1

VS SQ
VS SQ

VR E F DQ
V R EF C A

RA S
CA S
W E
CS

N3

VS SQ

L8

R 48 4

FB C _D 20
FB C _D 21

FB C D Q S_ R N 2

FB C _C MD 29
FB C _C MD 23
FB C _C MD 28

16mil
<500mil

A3

C2
A7
A2

FB C _C MD 7
FB C _C MD 21
FB C _C MD 6

1. 1 K_ 1%_ 04

24 3_1 %_0 4

D7
C3
C8

FB C _C MD 24
FB C _C MD 22

C1
C9
D2

A 14/ N C 6
A 15/ N C 5

OD T

16mil
<500mil
2 43_ 1%_0 4

A 11
A 12
A 13

N7
T3

R E SE T

ZQ

R 69

E9
F1
H2

G9

V SS Q

L8

FB C _C MD 8
FB C _C MD 25
FB C _C MD 10

V D DQ
V D DQ

16 0_ 1%_0 4

F BC _C MD 2

FB C _C MD 9
FB C _C MD 11

A1
A8

A9
A 10

R3
L7
R7

R 43

F BC _C MD 5

R9

V D DQ
V D DQ
V D DQ

FB C _C LK 0#

F BV D D Q

N1
N9
R1

A6
A7
A8

R8
R2
T8

F BV D D Q
GF1 XX

V DD
V DD
V DD
V DD

J2
J8
M1

V SS Q
V SS Q
V SS Q

K3
L3
L2

V D DQ
V D DQ

M3

B1
B9
D1

J 3

FB C _C MD 15
FB C _C MD 13
FB C _C MD 16

A3
A4
A5

M2
N8

T1
T9

FB C _C M D 30

G7
K2
K8

A1
A2

F BC _ C MD 2 6

V SS Q
V SS Q

B2
D9

A0

N2
P8
P2

F BC _ C MD 1 2
F BC _ C MD 2 7

F BC _ C MD 3
F BC _ C LK 0
F BC _ C LK 0#

V DD
V DD
V DD

P3

G8

FB C _C LK 0

V DD
V DD

WE
CS

N3
P7

A9
B3
E1

M9
P1
P9

RA S
CA S

Schematic Diagrams

VGA I/O
U 46K
U 4 6I
B GA _1005_P080_290X290
C OMMON

8/1 6 IF PC

U 46 J

BG A_1005_P080_290X 290
CO MMO N

BG A_1005_P 080_290X290
CO MMO N

9/16 IFPEF

IFPD_ PL LVDD

AN 3
AP2

IFPC_ AUX
IFPC_ AUX
IFPC_L 3
IFPC_L 3

AR 2
AP1

TXD0
TXD0

IFPC_L 2
IFPC_L 2

AM 4
AM 3

TXD1
TXD1

IFPC_L 1
IFPC_L 1

AM 5
AL 5

TXD2
TXD2

IFPC_L 0
IFPC_L 0

AM 6
AM 7

IF PC_IOVDD

HPDC

DP

IFPD_ RSET

I F P D _I O V D D

AK8

IFPD_ IOVDD

TXC
TXC

I PD_L3
F
IF PD_L3

A R4
A R5

TXD0
TXD0

I PD_L2
F
IF PD_L2

AP5
A N5

TXD1
TXD1

I PD_L1
F
IF PD_L1

A N7
AP7

TXD2
TXD2

I PD_L0
F
IF PD_L0

A R7
A R8

HPDD

SDA
SCL

IFPE_AUX
IFPE_AUX

TXC
TXC

TXC
TXC

I PE_ L3
F
IF PE_ L3

TXD0
TXD0

TXD0
TXD0

IF PE_ L2
IF PE_ L2

TXD1
TXD1

TXD1
TXD1

I PE_ L1
F
IF PE_ L1

TXD2
TXD2

TXD2
TXD2

I PE_ L0
F
IF PE_ L0

HPDE

HPDE

GPIO15

R N1 6
4
3
2
1

5
6
7
8

I F P C _P L L V D D
I F P A B _ P L LV D D
I F P D _I O V D D
I F P C _I O V D D

I F P E F _ P L LV D D

AJ 6
AL 1

IFPEF_ PL LVDD
IFPEF_ RSET

1 0 K _8 P 4 R _ 04

R N1 5
4
3
2
1

GPIO19

IFPD

5
6
7
8

I F P E F _ P L LV D D
I F P A B _ I OV D D
I F P E F _ I OV D D
I F P D _P L L V D D

1 0 K _8 P 4 R _ 04

AE7

IFPE_IOVDD

AD 7

IFPF_IOVDD

SDA
SCL

IFPF_AUX
IFPF_AUX

TXC
TXC

IF PF_ L3
IF PF_ L3

TXD3
TXD3

TXD0
TXD0

I PF_ L2
F
IF PF_ L2

TXD4
TXD4

TXD1
TXD1

I PF_ L1
F
IF PF_ L1

TXD5
TXD5

TXD2
TXD2

I PF_ L0
F
IF PF_ L0

HPDF

GPIO21

N 1 2 E -GE -A 1 GF 1 06 -7 00 -A 1
N 1 2E -G E -A 1 G F 10 6 -70 0 -A 1
I F P E F _ I OV D D

3V 3 _ R U N

CO MMO N

A J 12

4/16 DACA
DACA_ VDD

D A C A _V R E F A K 12

DACA_ VREF

D A C A _V D D

R6 5

A K 13

C 61

DACA_ RSET

D A C A _R S E T
*0. 1 u _1 6 V _Y 5 V _ 04

10 K _ 04

I2CA_SCL
I2 CA_ SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE

C6 0

R7 0

*0 . 1 u_ 1 6V _ Y 5 V _ 04

*1 24 _ 1% _ 04

G1
G4
A M1 3
A L 13
A M1 5

S NN_ A _ S CL
S NN_ A _ S DA

DA CB _ V DD

A G7

DA CB _ V RE F

AK6
A H7

S NN_ HS Y NC
S N N _V S Y N C
S NN_ RE D

A M1 4

S N N _G R E E N

A L 14

S NN_ B L UE

R4 0

C5 8 1

1 0K _ 0 4

0 . 1u _ 16 V _ Y 5 V _0 4

B GA _ 1 00 5 _P 0 8 0_ 2 90 X 29 0
C OMMO N
6 /1 6DACB
(G96 DACC)
DACB_VDD

I2 CB_ SCL
I2CB_SDA

G3
G2

IF PEF

I2 CB _ S CL
I2 CB _ S DA

N 1 2E -GE -A 1 GF 1 0 6-7 0 0-A 1
3V 3 _ R U N

DACB_VREF
DACB_RSET

DACB_HSYNC
DACB_ VSYNC
DACB_RED
DACB_GREEN
DACB_BLUE

A M1
A M2
R N 13
2 . 2K _ 8 P 4R _ 0 4

AK4
A L4

S N N _ A _S D A
S NN_ A _ S CL
I2 CB _ SDA
I 2C B _S C L

A J4

U 46H
BG A_1005_P080_290X 290
CO MMO N

7/16 IFPAB
LVDS
DVI-SL

DVI-DL
N 12 E -GE -A 1 GF 1 0 6-7 0 0-A 1

Sheet 16 of 49
VGA I/O

K6

Test Point

BG A_1005_P080_290X 290

*0 _0 4

U 46 M

8
7
6
5

U 46L

1
2
3
4

R6 1

DP

SDA
SCL

N 1 2 E-G E -A 1 G F 10 6 -70 0 -A 1
I PA_ TXD0
F
IF PA_ TXD0

IFPAB_TXD1 *
IFPAB_TXD1

I PA_ TXD1
F
IF PA_ TXD1

IFPAB_TXD2 *
IFPAB_TXD2

I PA_ TXD2
F
IF PA_ TXD2

AM 9

IFPAB_TXD0 *
IFPAB_TXD0

I F P A B _P L L V D D
3V 3 _ R U N

AK9

3V 3 _ R U N
AJ 1 1

IFPAB_ PL LVDD
IFPAB_ RSET

5

8
7
6
5

I PA_ TXD3
F
IF PA_ TXD3

R N1 4
2. 2 K _ 8P 4 R _ 0 4

4

V G A _T H E R M D A

B5

E3
E4

S MC _ V GA _ TH E R M1
S MD _ V GA _ TH E R M1
I 2 C C _S C L
I 2 C C _S D A

V _ JT A G_ T R S T

AP1 4
A R1 4
A N1 4
A N1 6
AP1 6

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST

R 4 87
1K _ 0 4

GPIO1 6
GPIO1 7
GPIO1 8

L2
L4
M4

GPIO2 0

L5

GPIO2 2
GPIO2 3
GPIO2 4

L6
M6
M7

S M C _ V GA _ TH E R M 3 4

S M D _ V GA _ TH E R M 3 4
I F P A B _I O V D D

R 57
R 46
K3
H3
H2
H1
H4
H5
H 6 V _ GP I O8
J 7 V _ GP I O9
K4
K5
H7
A C _D E T
J4
J6

S MC _V G A _T H E R M

S MD _V G A _T H E R M

D02 CHA NGE
DS? ? ? ? , ? ?

THERM DP

GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO1 0
GPIO1 1
GPIO1 2
GPIO1 3
GPIO1 4

Q2 4A
6 MT D N 7 0 02 Z H S 6 R

1

D

I2 CC_SCL
I2CC_ SDA

1 0 00 p_ 5 0V _ X 7R _0 4

E2
E1

S

C 23

I2CS_SCL
I2 CS_ SDA

IFPAB_TXC*
IFPAB_TXC

10 0 K _0 4
10 0 K _0 4

IFPA_TXC
IFPA_TXC

? 3V 3_R UN? ?

A H1 0
AG 9

IFPA_IOVDD
IFPA_IOVDD

A G1 0
A H1 1

IFPB_IOVDD
IFPB_IOVDD

3 V 3 _R U N

IFPAB_TXD3 *
IFPAB_TXD3

IF PB_ TXD4
IF PB_ TXD4

IFPAB_TXD4 *
IFPAB_TXD4

I PB_ TXD5
F
IF PB_ TXD5

IFPAB_TXD5 *
IFPAB_TXD5

I PB_ TXD6
F
IF PB_ TXD6
IF PB_ TXD7
IF PB_ TXD7

D02 CH ANG E
? ? ? ? ,CO ST DOWN

N V V D D _V I D 0 4 1
N V V D D _V I D 1 4 1 VID? ? 3PIN
N V V D D _V I D 2 4 1

3 V 3_ R U N
R 51

R 32

* 0_ 04

R 26

* 0_ 04

IFPB_TXC
IFPB_TXC

V G A _T H E R M_ S H D W N _#

10 K _ 04

U3

D0 2 C HANG E
GP IO1 3 ? ? ? GP IO1 2

V _G P I O8
S MD _ V GA _ T H E R M
S MC _ V GA _ T H E R M
3 .3 V

5
6
7
8

GN D T H E R M#
A LE R T#
D SDA T A
D+
SCL K
V DD
*G 78 1 -1P 8 U F

4
3
2
1

V GA _T H E R MD C
V GA _T H E R MD A
V GA _V D D

HPDAB

IFPAB
N 1 2E -GE -A 1 GF 1 0 6-7 0 0-A 1

6 - 02 - 00 7 81 - LD 0
C2 2
5
6
7
8

4
3 R N 21
2 2 . 2K _ 8 P 4R _0 4
1

* 0. 1 u _1 6 V _Y 5V _ 0 4

GPIO0
K1

12/16 M S
I C1
THERM DN

Q2 4 B
3 MT D N 70 0 2Z H S 6R
D

B4

G

V G A _T H E R M D C

S

2

1
2
3
4

B GA _1005_P080_290X290
C OMMON

G

U 4 6N

R2 9

*1 0m i _l s ho rt

3 . 3V

V GA _ T H E R M _S H D W N # 1

N 12 E -GE -A 1 GF 1 0 6-7 0 0-A 1

1 2 , 41 3 V 3 _R U N
2 , 3 , 8, 1 1 , 12 , 1 8, 1 9 , 20 , 2 2, 2 3 , 24 , 2 5, 2 7, 2 8 , 29 , 3 0, 3 3 , 35 , 3 7, 3 8 , 39 3 . 3V

VGA I/O B - 17

B.Schematic Diagrams

K2

GPIO1

A N4
AP4

IFPD_AUX
IFPD_AUX

SDA
SCL

TXC
TXC

IF PC

AB6

A LA2L 3

DVI/ HDMI

IF PC_RSET

A M A8L 8

A J8

I F P D _P L L V D D A C 6

DP

SDA
SCL

I F P C _ I OV D D

DVI-SL
HDMI

DVI-DL
DVI/HDMI

L7

AK7

IF PC_PLLVDD

A E 4A D 4

5/16 IFPD
I F P C _ P L LV D D A J9

Schematic Diagrams

VGA NVVDD Cecoupling
U46F

N12E- GE-A1 GF106-700-A1

B - 18 VGA NVVDD Cecoupling

N12E-GE-A1 GF106-700-A1

NVVDD
P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24

C100

C76

C93

C56

C89

C102

0.1u_16V_Y5V_04

0.1u_16V_Y5V_04

0.1u_16V_Y5V_04

0.1u_16V_Y5V_04

0. 1u_16V_Y5V_04

0.1u_16V_Y5V_04

C107

C129

C118

C749

C750

C383

0.1u_16V_Y5V_04

0.1u_16V_Y5V_04

0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04

*0.1u_16V_Y5V_04

C88

C66

C748

C782

0.1u_16V_Y5V_04

0.1u_16V_Y5V_04

C424

C426

*0.1u_16V_Y5V_04

*0. 1u_16V_Y5V_04

C73

C57

C67

1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

C797

C783

*1u_6.3V_X5R_04

*1u_6. 3V_X5R_04

C794

C795

*0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0. 1u_16V_Y5V_04

C430

C550

*0.1u_16V_Y5V_04

C92

C706

10u_6.3V_X5R_06

*10u_6.3V_X5R_06

C101

C751

C728

1u_6. 3V_X5R_04

*1u_6.3V_X5R_04

*1u_6.3V_X5R_04

C52

C91

C796

C111

4.7u_6.3V_X5R_06

4.7u_6.3V_X5R_06 *4.7u_6.3V_X5R_06

*0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04

22u_6.3V_X5R_08

PLACEIN THE BACKPLATEAREA

U46E

U4
6D

B G A_1 005_P 080 _290X 290
C O MMO N

B G A_ 1005_ P08 0_290 X29 0
C O MMO N

1 0/1 6 M IOA

P9
R9
T9
U9

M IOA_ VDDQ _N C
M IOA_ VDDQ _N C
M IOA_ VDDQ _N C
M IOA_ VDDQ _N C

U5

M IOACAL _ PD_ VDDQ _N C

T5

M IOACAL _ PU_ GND _N C

N5

M IOAD 0_ NC
M IOAD 1_ NC
M IOAD 2_ NC
M IOAD 3_ NC
M IOAD 4_ NC
M IOAD 5_ NC
M IOAD 6_ NC
M IOAD 7_ NC
M IOAD 8_ NC
M IOAD 9_ NC
MO
I AD1 0_ NC
MO
I AD1 1_ NC
MO
I AD1 2_ NC
MO
I AD1 3_ NC
MO
I AD1 4_ NC

1 1 /1 6 M IOB

P2
P3
T3
T2
T1
U4
U1
U2
U3
R6
T6
N6

M IOA_ VREF_ NC

AA9
AB9
W9
Y9

M IOB_ VDD Q_ NC
M IOB_ VDD Q_ NC
M IOB_ VDD Q_ NC
M IOB_ VDD Q_ NC

AA7

M IOBC AL_ PD_ VDD Q_ NC

AA6

M IOBC AL_ PU_ GN D_ NC

AF1

M IOB_ VREF_ NC

P5
N3
L3
N2

M IOA_ CTL 3_ NC
MIO A_HSYN C_ NC
M IOA_ VSYN C_ NC
M IOA_ DE_ NC

R4
T4

M IOA_ CLKO UT_ NC
M IOA_ CLKO UT_ NC
MIO A_CL KIN_ NC

MIO BD0 _NC
MIO BD1 _NC
MIO BD2 _NC
MIO BD3 _NC
MIO BD4 _NC
MIO BD5 _NC
MIO BD6 _NC
MIO BD7 _NC
MIO BD8 _NC
MIO BD9 _NC
M IOBD1 0 _NC
M IOBD1 1 _NC
M IOBD1 2 _NC
M IOBD1 3 _NC
M IOBD1 4 _NC

Y3Y2Y1

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6

W3
W1
W2
Y5

M IOB_ CTL 3 _NC
MO
I B_H SYNC _NC
M IOB_ VSYNC _NC
MIO B_D E_NC

10K_04

N12E-GE-A1 GF106-700-A1

N12E- GE-A1 GF106-700-A1

12,16,41 3V3_RUN
41
NVVDD

V4
W4

M IOB_ CL KOU T_NC
M IOB_ CL KOU T_NC
MO
I B_C LKIN _NC

R44

AE1

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

10K_04

AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AD12
AD14
AD16
AD18
AD22
AD24
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
M12
M14
M16
M18
M20
M22
M24
P11
P13
P15
P17
P19

C51 *0.1u_16V_Y5V_04

E15
E18
E24
E27
E30
E6
E9
F2
F31
F34
F5
J2
J31
J34
J5
L9
M11
M13
M15
M17
M19
M2
M21
M23
M25
M31
M34
M5
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
P12
P14
P16
P18
P20
P22
P24
R2
R31
R34
R5
T11
T13
T15
T17
T19
T21
T23
T25
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
V12
V14
V16
V18
V2
V20
V22
V24
V31
V5
V9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25

R111

GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D

P1P4N1

G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND
G ND

N4

16/ 16 N VV DD

10K_04

Sheet 17 of 49
VGA NVVDD
Cecoupling

AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA2
AA20
AA21
AA22
AA23
AA24
AA25
AA34
AA5
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AC9
AD11
AD13
AD15
AD17
AD2
AD21
AD23
AD25
AD31
AD34
AD5
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG31
AG34
AG5
AK2
AK31
AK34
AK5
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AL6
AL9
AN2
AN34
AP12
AP15
AP18
AP21
AP24
AP27
AP3
AP30
AP33
AP6
AP9
B12
B15
B21
B24
B27
B3
B30
B33
B6
B9
C2
C34
E12

NVVDD
BG A _100 5_P 080_2 90X 290
CO MMO N

15 1
/ 6 G ND

C50 *0.1u_16V_Y5V_04

B.Schematic Diagrams

NVVDD
B G A_ 1005_ P08 0_290 X29 0
C O MMO N

R198

U4
6G

R38
10K_04

Schematic Diagrams

CougarPoint - M 1/9
20m ils

H D A _ S P K R R 30 1

R3 5 0

Co-lay

1M _ 04

1u _ 6 . 3 V _X 5 R _ 0 4

Gen3

R 59 5
RT C V CC
INTVRMEN- Integrated SUS 1.05V VRM Enable

*0 _ 0 4 S A T A _ T X P 1
*0 _ 0 4 S A T A _ T X N 1
*0 _ 0 4 S A T A _ R XN 1
*0 _ 0 4 S A T A _ R XP 1

R 61 1

3 . 3 A _1 . 5 A _ H D A _ I O
R 6 06

P C H _I N T V R M E N

C1 7

S R T C R S T#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

SATA_ TXP2
S A T A _ T X N2

L D R Q0 #
L D R Q1 # / G P I O2 3

H DA _ S Y NC

33

HD A _ RS T #

T1 0
SPK R
H D A _ R S T#

2
33

HD A _ S DI N0

H DA _ S D IN0

34

ME _ W E

H DA _ S D IN1
C3 4
H DA _ S D IN2
33

R 60 3

0 _ 04

R 60 2

*9 1 0 _ 04

HD A _ S DO UT
D2 9
A

H DA _ S D IN3

C D B U 0 0 3 40
C

A3 6
H DA_ SD O

S A T A _ OD D _ D A # 2 2 , 3 1
5 V S _ OD D

31

C3 6

L E D_ IG P U#

S A T A 3 RX N
S A TA 3R X P
S A T A 3 TX N
SAT A3 TXP
S A T A 4 RX N
S A TA 4R X P
S A T A 4 TX N
SAT A4 TXP

H D A _ D O C K _R S T # / GP I O 1 3

R 5 66

3 .3 V

H D A _ D O C K _E N # / GP I O3 3

N3 2

2 9 U S B 3 . 0 _ S MI #

J T A G_ T C K

S A T A 5 RX N
S A TA 5R X P
S A T A 5 TX N
SAT A5 TXP

J T A G_ T MS

S A TA I C O MP O

1 0 K_ 0 4
P C H _J T A G _T C K _B U F J 3

5 VS

P C H _J T A G _T M S

H7

P C H _J T A G _T D I

K5

P C H _J T A G _T D O

H1

HD D_ NC 0
+ C6 8 6

C6 8 9

C 6 87

*0 . 1 u _1 6 V _ Y 5 V _ 0 4

* 2 . 2u _ 6 . 3 V _Y 5 V _ 06

S A T A 1 RX N
S A TA 1R X P
S A T A 1 TX N
SAT A1 TXP
S A T A 2 RX N
S A TA 2R X P
S A T A 2 TX N
SAT A2 TXP

G3 4

A3 4

S A T A _ OD D _ P R S N T # 2 3, 3 1

S A T A 0 RX N
S A TA 0R X P
S A T A 0 TX N
SAT A0 TXP

E3 4

J OP E N 2
*O P E N _1 0 m li -1 MM

*2 2 0 u_ 6 . 3 V _ 6. 3* 6. 3* 4 . 2

L P C_ A D
L P C_ A D
L P C_ A D
L P C_ A D

E3 6
K3 6

B oa rd I D

J T A G_ T D O

V5

S E RIR Q

S A TA R X N 0
S A TA R X P 0
S A TA TX N 0
S A TA TX P 0

A M 10
AM 8
AP1 1
AP1 0

S A TA _R X N 1
S A TA _R X P 1
S A TA _T X N 1
S A TA _T X P 1

AD
AD
AH
AH

S
S
S
S

7
5
5
4

A TA
A TA
A TA
A TA

S E R IRQ

1 .0 5 V S
S A T A I C OM P

R 30 8

3 7. 4_ 1 % _ 04

S A T A 3 C O MP

R 30 9

4 9. 9_ 1 % _ 04

1 .0 5 V S
AB1 2

* 0 _0 4

S P I_ S CL K _ R T 3

S P I _ C S 0 # R 3 15

* 0 _0 4

S P I_ CS _ 0 # Y 1 4

AH 1

DEVICE

TX _ 1 N
TX _ 1 P

R X _1 N
RX _ 1 P

S A TA _T X N 0 _ R
C3 0 7
0. 0 1 u _ 16 V _ X 7 R _ 0 4
S A TA _R X N 0 _ R
C3 0 4
0. 0 1 u _ 16 V _ X 7 R _ 0 4
S A TA _R X P 0_ R

8
9

21

4. 7 K _ 0 4 D 1
*4 . 7 K _ 04
*4 . 7 K _ 04
4. 7 K _ 0 4 D 0

12
11

R 3 03

* 0 _0 4

S P I_ S O

R 3 07

* 3 3_ 0 4 S P I _ S O_ R

ESATA_ EN 1
S A T A _ T XP 0 _ R
S A T A _ T XN 0 _R

S A T A _ TX N 0 _C

3

S A T A _ T X N _ 0 _C

2

T XP

4

3

S A T A _ R XP _ 0 _ C

6
RX P

Gen3

3. 3 V S

* 1 0K _ 0 4

V1 4

O D D _ D E T E C T#

P1

B B S _ B IT 0

S A T A _ L E D# 3 1
OD D _ D E TE C T # 23
R 5 64

*1 K _ 0 4

S A TA 1 G P / G P I O1 9

BBS_BIT0 - BIOS BOOT STRAP BIT 0

3 17
2 94
3 25
2 93
3 06

0_04
0_04
0_04
0_04
* 0 _0 4

S P I_ S I_ R
S P I _ S O_ R
S P I_ S CL K _ R
S P I_ CS _ 0 #
S P I_ CS _ 1 #

7
GN D 3
A T 0 7J 3 6 B A A 0 9 0

3. 3 V

Layout Note:
Closed to U4
R5 4 9

R 28 5

R 2 84

2 10 _ 1 % _0 6

2 1 0_ 1 % _ 06

2 1 0 _ 1% _ 0 6

B IO S R OM
NC 3

SPI_* = 1.5"~6.5"

S HO RT
C 4 28
* 0 . 1u _ 1 6V _Y 5 V _ 04
U 32
S P I_ V DD
R 3 28
* 3 . 3K _ 1 % _ 04
S P I _W P #

8

32Mbit

VD D

SI

W P#

C E#

5

S P I_ S I

2

S P I_ S O

1

S P I_ C S 0 #

6

S P I_ S C L K

C 50 0

C 3 17

C3 1 8

PC
PC
PC
PC

R5 6 8
1 0 0 _ 1% _ 0 4

R 29 8
1 0 0_ 1 % _ 04

R 2 97

H _ J TA G
H _ J TA G
H _ J TA G
H _ J TA G

_ TM
_ TD
_ TD
_ TC

S
I
O
K_ BU F

R5 6 7
5 1_ 0 4

1 0 0 _ 1% _ 0 4

SO
3

GN D 2
5
RX N

4

R
R
R
R
R

H S P I _ MS I
H S P I _ MS O
H S P I _ S C LK
HS P I_ C E #

GN D 1

T XN
L 20
* W C M 2 0 12 F 2 S -1 6 1T 0 3 -s ho rt
S A T A _ RX N0 _ C
1
2
S A T A _ R XN _ 0_ C

S A TA _L E D #

S A TA LE D #
S A TA 0 G P / G P I O2 1

3 .3 VS

J _ ESATA1

S A T A _ RX P 0 _ C

S P I _ M OS I

U3

Layout note:

1

7 5 0 _1 % _ 0 4

R5 6 3

Share ROM
34
34
34
34

S A T A _ R X N 0_ R
SAT A_ RXP0 _ R

L 21
* W C M 2 0 12 F 2 S -1 6 1T 0 3 -s ho rt
S A T A _ TX P 0 _ C
1
2
S A T A _ T X P _ 0_ C

R5 7 0

3 .3 V S

P3

B D 8 2 H M6 5 _ MP

6-02-75412-KQ0

3

V4

S P I_ M IS O

NEAR TO J_ESATA1
SN75LVCP412RTJ

4

S P I_ S I_ R

1u _ 6 . 3 V _Y 5V _ 0 4

6
10
16
20

HOST

S P I_ S I

4 . 7 K _ 04

0 . 1 u _ 16 V _ Y 5 V _ 0 4

S A T A _ RX N0 4
S A T A _ RX P 0 5

V DD
VD D
V DD
VD D

0 . 0 1 u_ 1 6 V _ X7 R _0 4
0 . 0 1 u_ 1 6 V _ X7 R _0 4

R 21 1

G ND
GN D
G ND
GN D
GN D

S A T A R XN 0 C 3 0 9
S A T A R XP 0 C 3 0 5

RX _ 0 P
RX _ 0 N

T -P A D

S A T A _ TX P 0 1
S A T A _ TX N 0 2

3
13
17
18
19

0 . 0 1 u_ 1 6 V _ X7 R _0 4
0 . 0 1 u_ 1 6 V _ X7 R _0 4

D 1
D0

SAT AT XP0 C3 1 3
S A T A T X N0 C3 1 1

U 19
S N 7 5L V C P 4 1 2
7
EN
15
TX _ 0 P 1 4
T X _0 N

SPI

SPI_ C S1 #

D02 CHANGE
DEL COLAY & ? ? REDRIVER IC
FOR ESATA WRITE SPEED DOWN

C3 1 2
0. 0 1 u _ 16 V _ X 7 R _ 0 4

R B IA S _ S A T A 3

S A T A 3 RB IA S

SPI_ C S0 #
T1

0 . 0 1 u_ 1 6 V _ X 7R _ 0 4

G ND 2

S P I _ S C L K R 5 62

S P I _ C LK
3 .3 VS

S P I_ CS _ 1 #

C3 1 4
0. 0 1 u _ 16 V _ X 7 R _ 0 4

W14XX
S A TA O D D

Y3
Y1
AB3
AB1

AB1 3

ES AT A R E DR IV E R

S A TA _T X P 0 _ R

31
31
31
31

Sheet 18 of 49
CougarPoint - M 1/9

S A T A 3 C OM P I

P IN G ND 1 ~ 2 = G ND

ES AT A P O RT

S A TA O D D

S A T A _ R X N 4_ 1 4
S A T A _ RX P 4 _ 1 4
S A T A _ T XN 4 _1 4
S A T A _ T XP 4_ 1 4

S A TA 3 R C O MP O

3 .3 V S

E - SA TA HD D
W15XX/W17XX
S A TA H D D

S A T A _ RX N 3 2 7
S A T A _ RX P 3 2 7
S A T A _ T XN 3 2 7
S A T A _ T XP 3 2 7

Y7
Y5
AD 3
AD 1

3. 3 V S

*1 0 K _ 0 4
*1 0 K _ 0 4

2 8 , 34

_R X N 2
_R X P 2
_T X N 2
_T X P 2

AB8
AB1 0
AF3
AF1

W14XX R391
W15XX/W17XX
R386

Y1 0

*A C E S -9 1 9 07 -0 2 20 A -H 0 1

R 7 71
R 7 72
R 7 73
R 7 74

*1 K _ 0 4
1 0 K_ 0 4

S A T A I C OM P I

G ND 1

3 .3 V S

28 , 3 4
28 , 3 4
28 , 3 4
28 , 3 4

R 39 1
R 38 6

AM 3
AM 1
AP7
AP5

Y1 1
J T A G_ T D I

0
1
2
3

L P C _ F R A ME # 2 8 , 3 4

S E R IRQ

L3 4

HD A _ S Y N C
HD A _ S P K R

Low = Disabled-(Default)
High = Enabled

S A T A _ RX N 2
S A T A _ RX P 2

8 8 0 14 -3 0 0 01

HD D_ NC 1
HD D_ NC 2
HD D_ NC 3

I N TR U D E R #

H D A _ B C LK

1 K _ 04
33
33

0
1
2
3

D3 6

N3 4

HD A _ B IT CL K

LA D
LA D
LA D
LA D

F W H 4 / L F RAM E#

K3 4

1

1 K_ 0 4

Flash Descriptor
Security Overide

J_ S A T A 1

3 .3 V S

K2 2

0/
1/
2/
3/

R 31 3

S E R IRQ R2 8 9
C3 8
A3 8
B3 7
C3 7

R 3 27
* 3 . 3K _ 1 % _ 04
S P I _H OL D # 7

S CK
4
H OL D #

VSS

*M X2 5 L 3 20 5 D M 2 I - 1 2G

2 5 3. 3 A _ 1 . 5 A _ H D A _I O
2 0 ,2 5
R T CV C C
6 , 1 9 , 2 0, 2 4 , 2 5 , 29 , 3 5 , 3 7, 38 , 3 9 1 . 05 V S
2 7, 28 , 3 0 , 3 4, 3 5 , 3 6 , 42 V D D 3
1 1 , 2 4 , 25 , 2 7 , 2 8, 3 1 , 3 2 , 33 , 3 5 , 3 9, 40 , 4 1 5 V S
2 , 3 , 8 , 11 , 1 2 , 1 6, 19 , 2 0 , 2 2, 2 3 , 2 4 , 25 , 2 7 , 2 8, 2 9 , 3 0 , 33 , 3 5 , 3 7, 38 , 3 9 3 . 3V
3 , 9, 1 0 , 1 1 , 12 , 1 9 , 2 0, 21 , 2 2 , 2 3, 2 4 , 2 5 , 27 , 2 8 , 2 9, 3 0 , 3 1 , 32 , 3 3 , 3 4, 35 , 3 9 3 . 3V S

CougarPoint - M 1/9 B - 19

B.Schematic Diagrams

3. 3A _ 1 . 5 A _ H D A _ I O

S A T A _ R XP 1
S A T A _ R XN 1
S A T A _ T X N1
SATA_ TXP1

P1
P2
P3
P4
P5
P6
P7
P8
P9
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5

S M_ I N T R U D E R #

R TC R S T #

I N TV R M E N

33

PLL ODVR VOLTAGE: HDA_SYNC
LOW-1.8 V (DEFAULT) HIGH-15V

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

S R T C _ R TC #

G2 2

FW H
FW H
FW H
FW H

High - Enable Internal VRs /Low - Enable External VRs

SATA1&2 ? ? ? ? ? J_SATA1 CONN
B41XX? ? ? ? 0.01u_50V_X7R_04? ?

S A T A _ RX P 1 _ C
S A T A _ R X N 1_ C
S A T A _ T XN 1 _C
S A T A _ T XP 1_ C
J_ H D D 1
S1
S2
S3
S4
S5
S6
S7

3 3 0K _ 0 4

R TC X 2
D2 0

SATA 6G

R5 7 9
R5 8 1
R5 8 8
R5 9 0

C2 0

R T C _ R S T#

IHDA

S A T A _ T XP 1_ C
S A T A _ T XN 1 _C
S A T A _ R X N 1_ C
S A T A _ RX P 1 _ C

R TC _ X 2

R TC X 1

Zo= 50O? 5%

C4 6 8

A2 0

LPC

C 7 02
1 8 p _5 0 V _ N P O _ 0 4

2
B Y A A A -B A T -0 63 -P 0 1

SPI_ SI

R T C _X 1

6- 03 - 08 26 5 -0 S 0

RTC

R3 5 5
20 K _ 1 % _ 04

R TC C LEA R

U5 4 A

1 0M _ 04

SATA

2
* A A A -B A T -0 2 2-K 01

1

R5 9 8

X1 3
MC -3 06 _ 3 2. 76 8 K H z

JTAG

R TC _ V B A T

1

TP M FU NC TI ON :S PI _S I Hi gh E na bl e

X1 4

6- 22 -3 2R 76 -0B 2
6- 22 -3 2R 76 -0B G

*3 2 . 76 8 K H z

J _ C B A T1

JO P E N 1
*O P E N _ 1 0 mi l -1 MM

2
1

1
C4 5 9
1u _ 6 . 3 V _X 5 R _ 0 4
2

J _ CB A T 2

*1 K _ 0 4

iTPM ENABLE/DISABLE

R 5 92
1 K_ 0 4

3 .3 V S

NO R EB OO T S TR AP : HD A_ SP KR H ig h En ab le

C 7 03
1 8 p _5 0 V _ N P O _ 0 4

2
1

R T C _ V B A T _ 12

NO REBOOT STRAP

CougarPoint - M (HDA,JTAG,SATA)

D2 8
R TC V C C
B A T 5 4C W GH
A
C 3
C 46 3
1 u _6 . 3 V _ X 5R _ 04
A
R 34 4
2 0 K _ 1% _ 0 4

3
4

1

V DD 3

3
4

2 0mils

Schematic Diagrams

CougarPoint - M 2/9
CougarPoint - M (PCI-E,SMBUS,CLK)
D02 CHANGE
FOR VIA USB3.0 ONLY

2 7 P CIE _ R X N3 _ W L A N
2 7 P C I E _ R X P 3 _W LA N
27 P C I E _ T X N 3 _ W L A N
27 P C I E _ T X P 3 _W LA N

C 5 33
C 5 26

P C I E _ R X N 4_ G LA N
P C I E _ R X P 4 _ GL A N
P C I E _T X N 4_ G LA N
P C I E _T X P 4 _ GL A N

0 . 1 u _ 10 V _ X 7 R _ 0 4
0 . 1 u _ 10 V _ X 7 R _ 0 4

C 5 34
C 5 29

0 . 1 u _ 10 V _ X 7 R _ 0 4
0 . 1 u _ 10 V _ X 7 R _ 0 4

P C I E _ TX N 2_ C
P C I E _ TX P 2 _ C

P C I E _ TX N 3_ C
P C I E _ TX P 3 _ C

P C I E _ TX N 4_ C
P C I E _ TX P 4 _ C

B G3 6
B J3 6
AV3 4
A U3 4
BF3 6
BE3 6
AY3 4
BB3 4
B G3 7
B H3 7
AY3 6
BB3 6

PCI-E x1
Lane
Lane
Lane
Lane
Lane
Lane
Lane
Lane

1
2
3
4
5
6
7
8

USB3.0 FOR VIA
USB3.0
WLAN
GLAN / CARD READER
X
X
X
X

B J3 8
B G3 8
A U3 6
AV3 6
B G4 0
B J4 0
AY4 0
BB4 0
BE3 8
B C3 8
AW 3 8
AY3 8
Y4 0
Y3 9

P CIE C L K RQ 0 #

P
P
P
P

E RN 2
E RP 2
E TN 2
E TP 2

P
P
P
P

E RN 6
E RP 6
E TN 6
E TP 6

P
P
P
P

E RN 7
E RP 7
E TN 7
E TP 7

10 0MHz

R3 4 6
R4 5 2

* 10 m i _l s h o rt
* 10 m i _l s h o rt

U S B 3 0 _ C L K R E Q# _ V L I

10 0MHz
2 9 C L K _ P C I E _ U S B 30 # _ N E C
2 9 CL K _ P C IE _ US B 3 0 _ NE C

R3 4 0
R3 5 1

* 10 m i _l s h o rt
* 10 m i _l s h o rt

2 9 U S B 3 0 _ C L K R E Q# _ N E C

R2 9 2

* 10 m i _l s h o rt

R3 6 1
R3 6 2

* 10 m i _l s h o rt
* 10 m i _l s h o rt

C L K _ P C I E _U S B _ 3 0 _# _ N E C A A 4 8
C L K _ P C I E _U S B _ 3 0 _N E C A A 4 7
U S B 3 0 _ C L K R E Q# _ N E C _ 2

V1 0

C L K _ P C I E _M I N I N
C L K _ P C I E _M I N I P

Y3 7
Y3 6

DR A M RS T _ CN T RL

C 8

S M L0 _ C L K

G 12

S M L0 _ D A TA

C 13

L P D _ S P I _I N T R #

E 14

S M C_ CP U_ T HE R M

S ML 0 A L E R T # / G P I O6 0

S MB _D A T A 9 , 1 0

D R A MR S T _ C N T R L 3 , 8

S ML 0 C L K

S M L 1D A T A / G P I O7 5

M 16

S M D_ CP U_ T HE R M

M7

C L _ C LK 1

T11

C L _ D A TA 1

P 10

C L _ R S T# 1

S M C_ C P U_ T H E RM

34

S M D_ C P U_ T H E RM

34

R 33 2
R 33 0
R 58 3

R
1 0K
U S B 30 _ C L K R E Q #_ V L I
P C I E C L K R Q6 #
P C I E C L K R Q5 #
P C I E C L K R Q0 #

3 .3 V S 3 .3 V

N5
_8 P 4 R _0 4
8
1
7
2
6
3
5
4

D G P U _P R S N T#
R 41 8
U S B 30 _ C LK R E Q #_ N E C _ 2 R 29 1

10 K _ 0 4
10 K _ 0 4

CL _ CL K1 2 7

C L _ D A TA 1 2 7

CL _ DA T A 1
C L _ R S T1 #

2. 2K _ 0 4
2. 2K _ 0 4
1K _0 4

C L _ R S T# 1 2 7

10K pull-down to
GND
M 10

P E G _ C L K R E Q#

A B 37
A B 38

VG A _ PE X CL K #
VG A _ PE X CL K

P E G _C L K R E Q# 1 2

P E G_ A _ C L K R Q# / G P I O4 7
CL K O UT _ P E G _ A _ N
C L K OU T _P E G_ A _ P

CL K O UT _ DM I_ N
C L K O U T _ D MI _ P

P C I E C L K R Q 1 # / GP I O 1 8
C LK OU T_ D P _ N
C L K OU T _D P _ P
C L K OU T _P C I E 2 N
C L K OU T _P C I E 2 P
CL K IN _ DM I_ N
C L K I N _ D MI _ P

C L K OU T _P C I E 3 N
C L K OU T _P C I E 3 P

C L K I N _G N D 1 _ N
C L K I N _ GN D 1 _ P

10 0M Hz
10 0M Hz

A V 22
A U2 2

A M1 2
A M1 3

P C H_ CL K _ D P _ N_ R
P C H_ CL K _ D P _ P _ R

R3 0 4
R3 0 5

B F 18
B E 18

CL K _ P C IE _ ICH _ N
CL K _ P C IE _ ICH _ P

B J3 0
B G3 0

CL K _ B U F _ CP Y CL K _ N
CL K _ B U F _ CP Y CL K _ P

G 24
E 24

C L K _ B U F _ D O T 96 _ N
C L K _ B U F _ D O T 96 _ P

A K7
A K5

CL K _ B U F _ CK S S CD _ N
CL K _ B U F _ CK S S CD _ P

K 45

C L K _ B U F _ R E F 14

* 10 m i _l s h o rt
* 10 m i _l s h o rt

12 0M Hz

V GA _ P E X C L K # 12
V GA _ P E X C L K 1 2

C
C
C
C

LK _ P C
LK _ P C
LK _ B U
LK _ B U

IE _ IC
IE _ IC
F _ CP
F _ CP

H_ N
H_ P
Y C LK _ N
Y C LK _ P

RN 1 9
1 0 K _ 8 P 4 R_ 0 4
8
1
7
2
6
3
5
4

C
C
C
C

LK _ B U
LK _ B U
LK _ B U
LK _ B U

F _ DO
F _ DO
F _ CK
F _ CK

T 96 _ P
T 96 _ N
S SCD _ P
S SCD _ N

RN 9
1 0 K _ 8 P 4 R_ 0 4
8
1
7
2
6
3
5
4

CL K_ E X P_ N 3
CL K_ E X P_ P 3
CL K_ DP _ N
CL K_ DP _ P

3
3

C LK _ B U F _ R E F 14
P E G _ C L K R E Q#
L A N_ C L K RE Q #

R3 3 5
R4 1 0
R3 7 1

1 0 K_ 0 4
1 0 K_ 0 4
* 10 K _ 0 4

A8

LA N _ C L K R E Q#

Y4 3
Y4 5

CL K IN _ S A T A _ N
C LK I N _ S A T A _ P

L1 2
P C I E C L K R Q 4 # / GP I O 2 6
V4 5
V4 6

P CIE C L K RQ 5 #

C L K OU T _P C I E 4 N
C L K OU T _P C I E 4 P

C L K OU T _P C I E 5 N
C L K OU T _P C I E 5 P

C LK _ P C I _ F B 2 2

C L K I N _P C I L OO P B A C K

C L K OU T _P E G_ B _ N
C L K OU T _P E G_ B _ P

XT A L 2 5 _I N
X T A L 2 5_ O U T

V 47
V 49

X T A L2 5 _ I N
X T A L2 5 _ OU T

Y 47

X C L K _ R C OM P

P E G_ B _ C L K R Q# / G P I O 56
X C L K _ R C OM P
C L K OU T _P C I E 6 N
C L K OU T _P C I E 6 P
P C I E C L K R Q 6 # / GP I O 4 5
C L K OU T _P C I E 7 N
C L K OU T _P C I E 7 P

K1 2
P C I E C L K R Q 7 # / GP I O 4 6

CL K _ XDP _ N
CL K _ XDP _ P

1 M_ 0 4

X 15

*H S X 3 21 S _ 2 5 MH Z
X1 6

C 73 6

FSX8L_25MHz? ? ? ? ?

T1 3
V3 8
V3 7

P E G_ P C I E C LK R Q7 #

R6 2 0

1 8 p_ 5 0 V _ N P O _ 04

E6

V4 0
V4 2
P CIE C L K RQ 6 #

33 MHz

H 45
P C I E C L K R Q 5 # / GP I O 4 4

P E G_ B _ C LK R Q #

C 73 5

R E F C L K 1 4I N

L1 4
AB4 2
AB4 0

Crystal 8045 & 3225 Co-lay

1

C L K _ P C I E _G L A N N
C L K _ P C I E _G L A N P

4

* 10 m i _l s h o rt
* 10 m i _l s h o rt

2

R3 6 3
R3 7 3

3

10 0MHz

C L K I N _D OT _ 9 6 N
C L K I N _ D O T _9 6 P

X 8 A 0 2 50 0 0 F G1 H _2 5 M H z

P C I E C L K R Q 3 # / GP I O 2 5

2 2 L A N _ C LK R E Q #

AK1 4
AK1 3

C L K OU T _I T P X D P _ N
C L K OU T _I T P X D P _ P

K 43

P C H _ X TA L_ I N

F 47

P C H _ GP I O6 5

H 47

P C H _ GP I O6 6

K 49

D G P U _P R S N T #

C LK OU TF L E X 0 / G P I O6 4
C LK OU TF L E X 1 / G P I O6 5
C LK OU TF L E X 2 / G P I O6 6
C LK OU TF L E X 3 / G P I O6 7

R6 2 1

9 0. 9 _ 1 % _0 4

1 .0 5 VS

90.9-O ? % pullup to +VccIO
(1.05V, S0 rail)close to
PCH

D02 CHANGE
DEL

B D 8 2 H M 6 5_ M P
6, 1 8 , 2 0 , 2 4, 2 5 , 2 9 , 3 5, 3 7 , 3 8 , 3 9 1 . 0 5 V S
2 , 3, 8, 1 1 , 1 2 , 1 6, 1 8 , 2 0 , 2 2, 2 3 , 2 4 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 3 , 35 , 3 7 , 3 8 , 39 3 . 3 V
3 , 9 , 1 0 , 11 , 1 2 , 1 8 , 20 , 2 1 , 2 2 , 23 , 2 4 , 2 5, 27 , 2 8 , 2 9, 30 , 3 1 , 3 2, 33 , 3 4 , 3 5, 39 3 . 3 V S

B - 20 CougarPoint - M 2/9

3 .3 V
_04
1
2
3
4

R N4
1 0K _8 P 4 R _0 4
8
1
7
2
6
3
5
4

S M D_ CP U_ T HE R M
S M C_ CP U_ T HE R M
D RA M RS T _ CN T RL

CL _ CL K 1

C L K OU T _P C I E 0 N
C L K OU T _P C I E 0 P

C L K OU T _P C I E 1 N
C L K OU T _P C I E 1 P

L P D _ S P I _I N T R #
P C H_ B T _ E N#
P E G _ B _ C L K R Q#
P E G _ P CIE C L KRQ 7 #

S M L 0D A T A

P C I E C L K R Q 2 # / GP I O 2 0

2 7 W L A N _ C L K R E Q#

30 C L K _ P C I E _ G L A N #
3 0 C LK _P C I E _ G LA N

A 12

S MB _C L K 9 , 1 0

1

2 7 C LK _P C I E _ M I N I #
2 7 C L K _ P C I E _ MI N I

10 0MHz

M1

S M B _ DA T A

S M L 1 C L K / G P I O5 8

P E RN 8
P E RP 8
P E TN 8
P E TP 8

J2

C L K _ P C I E _U S B _ 3 0 _# _ V L I A B 4 9
AB4 7
C L K _ P C I E _U S B _ 3 0 _V LI

S M B _ CL K

C 9

S ML 1 A L E R T # / P C H H OT # / G P I O7 4

P C I E C L K R Q 0 # / GP I O 7 3
2 9 C L K _ P C I E _U S B 3 0 # _V LI
29 C L K _ P C I E _ U S B 3 0 _V LI

H 14

RN 6
2 . 2 K _ 8 P 4R
8
7
6
5

S M B _ CL K
S M B _ DA T A
S M L0 _ C LK
S M L0 _ D A TA

P CH _ B T _ E N# 2 7

S MB C L K

E RN 4
E RP 4
E TN 4
E TP 4

P E RN 5
P E RP 5
P E TN 5
P E TP 5

P C H_ B T _ E N#

S MB D A T A

P E RN 3
P E RP 3
P E TN 3
P E TP 3
P
P
P
P

E 12
S M B A L E R T # / G P I O1 1

2

Sheet 19 of 49
CougarPoint - M 2/9

Usage

E RN 1
E RP 1
E TN 1
E TP 1

FLEX CLOCKS

B.Schematic Diagrams

30
30
30
30

0 . 1 u _ 10 V _ X 7 R _ 0 4
0 . 1 u _ 10 V _ X 7 R _ 0 4

BE3 4
BF3 4
BB3 2
AY3 2

P
P
P
P

SMBUS

C 5 15
C 5 21

B G3 4
B J3 4
AV3 2
A U3 2

Link

SB 3 0 _ NE C
S B 3 0_ N E C
SB 3 0 _ NE C
S B 3 0_ N E C

P C I E _ TX N 1_ C
P C I E _ TX P 1 _ C

Controller

P C I E _ R X N 2 _U
P C IE_ RXP 2 _ U
P C I E _ TX N 2 _U
P C I E _ TX P 2 _ U

U 54 B

* 0 . 1u _ 1 0 V _X 7 R _0 4
* 0 . 1u _ 1 0 V _X 7 R _0 4

CLOCKS

29
29
29
29

C 5 64
C 5 65

PCI-E*

2 9 P C I E _ R X N 1 _ U S B 3 0_ V L I
2 9 P C IE _ RX P 1 _ USB 3 0 _ V L I
2 9 P C I E _ T X N 1 _ U S B 3 0_ V L I
2 9 P CIE _ T X P 1 _ US B3 0 _ V L I

1 8 p_ 5 0 V _ N P O _ 04

Schematic Diagrams

CougarPoint - M 3/9
CougarPoint -M (DMI,FDI,GPIO)
U 5 4C

2
2
2
2

D
D
D
D

M
M
M
M

BE2 4
B C2 0
BJ 1 8
BJ 2 0

I_ RX P 0
I_ RX P 1
I_ RX P 2
I_ RX P 3

2
2
2
2

D
D
D
D

MI _ T X N
MI _ T X N
MI _ T X N
MI _ T X N

2
2
2
2

D MI _ T X P 0
D MI _ T X P 1
D MI _ T X P 2
D MI _ T X P 3

AW 2 4
AW 2 0
BB1 8
AV1 8

0
1
2
3

A Y2 4
A Y2 0
A Y1 8
A U1 8

D M I0 RX N
D M I1 RX N
D M I2 RX N
D M I3 RX N
D
D
D
D

M
M
M
M

I0 RX P
I1 RX P
I2 RX P
I3 RX P

D
D
D
D

M
M
M
M

I 0 TX N
I 1 TX N
I 2 TX N
I 3 TX N

FD
FD
FD
FD
FD
FD
FD
FD

D M I 0 TX P
D M I 1 TX P
D M I 2 TX P
D M I 3 TX P

I_ R
I_ R
I_ R
I_ R
I_ R
I_ R
I_ R
I_ R

F DI
F DI
F DI
F DI
F DI
F DI
F DI
F DI

FDI

D M I_ RX N 0
D M I_ RX N 1
D M I_ RX N 2
D M I_ RX N 3

DMI

2
2
2
2

B C2 4
BE2 0
B G1 8
B G2 0

_R
_R
_R
_R
_R
_R
_R
_R

XN
XN
XN
XN
XN
XN
XN
XN

0
1
2
3
4
5
6
7

XP0
XP1
XP2
XP3
XP4
XP5
XP6
XP7

B
A
B
B
B
B
B
B

J1 4
Y1 4
E1 4
H1 3
C1 2
J1 2
G1 0
G9

B
B
B
B
B
B
B
B

G1 4
B1 4
F1 4
G1 3
E1 2
G1 2
J1 0
H9

A W16

BJ 2 4

D M I _ C O MP _ R

A V1 2
D M I_ Z CO M P

R 594

7 5 0 _ 1 % _ 04

B C1 0
D M I _ I R C O MP

F D I_ F S Y NC 1

D M I2 RB I A S

F DI_ L S Y NC 0

B H2 1

D M I _ 2R B I A S

F
F
F
F
F
F
F
F

DI_ T X P 0
DI_ T X P 1
DI_ T X P 2
DI_ T X P 3
DI_ T X P 4
DI_ T X P 5
DI_ T X P 6
DI_ T X P 7

2
2
2
2
2
2
2
2

3 .3 V

D02 CHANGE
ADD PULL HIGH

A C _ P RE S E N T
P M _ S L P _ L A N#
SW I #
SU S_ PW R _ AC K

R7 7 0
R3 2 3
R5 7 6
R5 8 2

1 0 K _ 04
*1 0 K _ 0 4
1 0 K _ 04
1 0 K _ 04

PC IE_ W A K E #
PW R _ BTN #
P M _ B A T L OW #

R3 2 2
R3 3 6
R5 7 5

1 K_ 0 4
*1 0 K _ 0 4
8 .2 K_ 0 4

P M _ CL K R UN #

R5 5 3

8 .2 K_ 0 4

DS W O DV R E N

R5 9 6

3 3 0K _0 4

R5 9 3

*3 3 0 K _ 0 4

R3 5 8

1 0 K _ 04

3 .3 VS

F DI_ F S Y N C0 2

F D I_ F S Y NC 0

B G2 5

2
2
2
2
2
2
2
2

RT C V C C

F DI_ F S Y N C1 2

A V1 4
F DI_ L S Y NC 0 2
B B1 0

F DI_ L S Y NC 1 2

F DI_ L S Y NC 1

AL L _ SY S_ PW R G D
A 18

D S W O D V RE N

E 22

R S M RS T #

B 9

PC IE_ W AKE#

N 3

P M _ CL K RU N#

Sheet 20 of 49
CougarPoint - M 3/9

System Power Management

D S W V R ME N
C1 2

SU S_ PW R _ AC K

S US A CK #
R 556

3 .3 VS

3 4 P M_ P C H _ P W R OK

1 0 K_ 0 4

S Y S _ RE S E T #

K3

S Y S _ P W R OK

P1 2

S Y S _R E S E T #

S Y S _P W R OK

R 354

*1 0 m i _l s h o rt

P M _P C H _ P W R O K _ R L 2 2

R 352

*1 0 m i _l s h o rt

P M _M P W R O K

P W R OK

L10
A P W R OK
B1 3

3 P M_ D R A M_ P W R G D

D R A MP W R OK
C2 1

R S M RS T #
34

RS M R S T #

R 353

3 4 S U S _ P W R_ A C K

34

R S M RS T #

1 0 K_ 0 4

P W R_ B T N #

S U S _P W R _A C K

K1 6

P W R _B T N #

E2 0

A C_ P R E S E NT

H2 0

P M_ B A TL O W #

E1 0

D P W RO K

W A KE#

C LK R U N # / GP I O3 2

D 10

S L P _ S 5#

Enabled (DEFAULT)

R681

Disabled

S 4_ S T A TE # 2 8

H 4
SL P_ S4 #

SU SC # 3 4 ,3 8
F 4

SL P_ S3 #

SU SB#
G 10

SL P_ A #

G 16

S L P _ S US #

SL P_ A#

A C P R E S E N T / GP I O3 1

6 ,2 9 ,3 4 ,3 5

SL P_ SU S#
A P1 4

H _ P M _S Y N C

P MS Y N C H

A1 0

S W I#

SU SC L K

R680
28

S U S C L K / GP I O6 2

P W R B T N#

S W I#

N 14

P M_ C LK R U N #

S L P _S 5# / GP I O6 3

B A T L OW # / GP I O7 2

34

S4 _ STAT E#

S U S _ S TA T# / GP I O6 1

S U S W A R N # / S U S P W R D N A C K / GP I O3 0

2 2 ,3 4 A C _ P R E S E N T

G 8

DSWODVREN - On Die DSW VR Enable
P CIE _ W A K E # 2 7 ,2 9 ,3 0

K 14
R I#

3

PM _ SL P_ L AN #

S L P _ L A N # / GP I O2 9

B D 8 2 H M6 5 _ M P
3 .3 V

14

U 31D
7 4 L V C 08 P W
12
3 9 D E L A Y _P W R GD

3 .3 V
U3 1 C
7 4L V C 0 8 P W
3 .3 V

9
37

3 .3 V

1 K_ 0 4

SY S_ PW RO K

R5 7 2

A LL _ S Y S _ P W R G D

11 , 3 4 , 3 9

C 699
7

* 0 . 1 u_ 1 0 V _ X 5 R _ 0 4

4
3, 3 7 1 . 8 V S _ P W R GD
3
DD R_ 1 .0 5 V S _ P W RG D

1

R5 7 1

8
10

14

14
3 8 D D R 1. 5V _P W R GD

S Y S _P W R _O K

1 0K _0 4

0. 85 V S _ P W R GD

U 31B
7 4 L V C 0 8P W

U3 1 A
74 L V C 0 8 P W

11
13
7

14

3 4 P M _P C H _ P W R OK

6

1 .0 5 VS _ VT T _ EN

5

2

7

7

3 8 1 . 0 5V S _ P W R G D
R 649

10 K _ 0 4

1 .0 5 VS _ VT T _ EN # 3 5
D

3 .3 V
R 5 84

* 10 K _0 4

P M _M P W R O K

Q 32
M T N7 0 0 2 Z HS 3

S

G

ON
? ? SUSB# -->? ? 1.05VS_VTT? SUSPEND? ? ? ? ?

1 8 ,2 5 RT C V C C
6 , 1 8 , 1 9 , 2 4 , 2 5 , 2 9, 35 , 3 7 , 3 8 , 3 9 1 . 0 5 V S
2 , 3 , 8 , 1 1 , 1 2 , 1 6, 18 , 1 9 , 2 2 , 2 3 , 2 4 , 2 5, 27 , 2 8 , 2 9 , 3 0 , 3 3 , 3 5, 3 7 , 3 8 , 3 9 3 . 3 V
3 , 9 , 1 0 , 1 1 , 1 2 , 18 , 1 9 , 2 1 , 2 2 , 2 3 , 2 4, 25 , 2 7 , 2 8 , 2 9 , 3 0 , 3 1, 32 , 3 3 , 3 4 , 3 5 , 3 9 3 . 3 V S

CougarPoint - M 3/9 B - 21

B.Schematic Diagrams

4 9 .9 _ 1 % _ 0 4

DI_ T X N0
DI_ T X N1
DI_ T X N2
DI_ T X N3
DI_ T X N4
DI_ T X N5
DI_ T X N6
DI_ T X N7

F DI_ IN T 2

F D I _I N T
R 599

1 . 0 5V S

F
F
F
F
F
F
F
F

Schematic Diagrams

CougarPoint - M 4/9
CougarPoint -M (LVDS,DDI)

U 54D
L _ BKL TEN
L _ V D D_ E N

S D V O_ T V C L K I N N
S D V O _ T V CL K IN P

P4 5
L _ BKL TC TL

L VD S _ IBG

T4 5
P3 9
AF3 7
AF3 6
AE4 8
AE4 7

AK3 9
AK4 0

1 1 L V D S -L C L K N
1 1 L V D S -L C L K P

Sheet 21 of 49
CougarPoint - M 4/9

1 1 L V D S -L 0 N
1 1 L V D S -L 1 N
1 1 L V D S -L 2 N

A N4 8
A M4 7
AK4 7
AJ 4 8

1 1 L V D S -L 0 P
1 1 L V D S -L 1 P
1 1 L V D S -L 2 P

A N4 7
A M4 9
AK4 9
AJ 4 7

AF4 0
AF3 9

1 1 L V D S -U C L K N
1 1 L V D S -U C L K P

11

D A C _ B L UE

11

D A C _ GR E E N

11

D A C _ RE D

C 729

* 33 p _ 5 0 V _ N P O _ 0 4

C 734

* 33 p _ 5 0 V _ N P O _ 0 4

C 738

R 619

* 15 m i l _ sh o rt

D AC_ BL U E_ R

R 624

* 15 m i l _ sh o rt

D A C_ G RE E N_ R

R 626

* 15 m i l _ sh o rt

DA C _ RE D_ R

1 1 L V D S -U 0 N
1 1 L V D S -U 1 N
1 1 L V D S -U 2 N

A H4 5
A H4 7
AF4 9
AF4 5

1 1 L V D S -U 0 P
1 1 L V D S -U 1 P
1 1 L V D S -U 2 P

A H4 3
A H4 9
AF4 7
AF4 3

R 6 18
R 6 23
R 6 25

N4 8
1 5 0 _1 % _ 0 4 D A C _B L U E _ R
1 5 0 _1 % _ 0 4 D A C _G R E E N _ R P 4 9
T4 9
1 5 0 _1 % _ 0 4 D A C _R E D _ R

L _ C TR L _ C L K
L _ C TR L _ D A TA
L VD _ IBG
L VD _ VBG

S DV O _ CT R L CL K
S D V O _ C T R LD A T A

L VD _ VR EFH
L VD _ VR EFL

L VD SA_ C L K#
L VD SA_ C L K
L VD
L VD
L VD
L VD

SA_ D
SA_ D
SA_ D
SA_ D

AT A# 0
AT A# 1
AT A# 2
AT A# 3

L VD
L VD
L VD
L VD

SA_ D
SA_ D
SA_ D
SA_ D

AT A0
AT A1
AT A2
AT A3

DD P B _ A U X N
D D P B _A U X P
D D P B _ HP D

L VD SB_ C L K#
L VD SB_ C L K
L VD
L VD
L VD
L VD

SB_ D
SB_ D
SB_ D
SB_ D

AT A# 0
AT A# 1
AT A# 2
AT A# 3

L VD
L VD
L VD
L VD

SB_ D
SB_ D
SB_ D
SB_ D

AT A0
AT A1
AT A2
AT A3

C RT _ B L U E
C RT _ G RE E N
C RT _ R E D

NEAR PCH

T3 9
M4 0

1 1 D A C _D D C A C L K
1 1 D A C _D D C A D A T A

11
11

M4 7
M4 9

DA C _ HS Y N C
DAC _ VSY NC
R 3 88

1 K _ 1 % _ 04

D A C _I R E F _R

Connect to GND

T4 3
T4 2

C RT _ D DC _ CL K
C R T _ D D C _ D A TA

C RT _ H S Y NC
C RT _ V S Y N C

D A C _ IRE F
C RT _ IR T N

PB_ 0 N
PB_ 0 P
PB_ 1 N
PB_ 1 P
PB_ 2 N
PB_ 2 P
PB_ 3 N
PB_ 3 P

D DP C _ CT R L CL K
D D P C _ C T R LD A T A

D DP C_ A U X N
D D P C _A U X P
D DP C _ HP D
D
D
D
D
D
D
D
D

DP C _ 0 N
D PC_ 0 P
DP C _ 1 N
D PC_ 1 P
DP C _ 2 N
D PC_ 2 P
DP C _ 3 N
D PC_ 3 P

D DP D _ CT R L CL K
D D P D _ C T R LD A T A

* 33 p _ 5 0 V _ N P O _ 0 4

EMI

D D
DD
D D
DD
D D
DD
D D
DD

D DP D_ A U X N
D D P D _A U X P
D DP D _ HP D
D
D
D
D
D
D
D
D

DP D _ 0 N
D PD_ 0 P
DP D _ 1 N
D PD_ 1 P
DP D _ 2 N
D PD_ 2 P
DP D _ 3 N
D PD_ 3 P

P3 8
M3 9

AT4 9
AT4 7
AT4 0

3 .3 V S

AV4 2
AV4 0
AV4 5
AV4 6
A U 48
A U 47
AV4 7
AV4 9

R4 2 0
2. 2K _0 4

R4 1 9
2 . 2 K _ 04

P4 6
P4 2

H D M I _ C TR L C L K 3 2
H D M I _ C TR L D A T A 3 2

AP4 7
AP4 9
AT3 8

P OR T C _ H P C

A Y 47
A Y 49
A Y 43
A Y 45
BA4 7
BA4 8
BB4 7
BB4 9

H
H
H
H
H
H
H
H

D
D
D
D
D
D
D
D

MI C
MI C
MI C
MI C
MI C
MI C
MI C
MI C

_ C0 C N
_ C0 C P
_ C1 C N
_ C1 C P
_ C2 C N
_ C2 C P
_ CL KC N
_ CL KC P

MI
MI
MI
MI
MI
MI
MI
MI

C_ C
C_ C
C_ C
C_ C
C_ C
C_ C
C_ C
C_ C

0C
0C
1C
1C
2C
2C
LK
LK

32

N 32
P 32
N 32
P 32
N 32
P 32
CN 3 2
C P 32

M4 3
M3 6

AT4 5
AT4 3
B H 41
BB4 3
BB4 5
BF4 4
BE4 4
BF4 2
BE4 2
BJ 4 2
B G 42

B D 8 2 H M6 5 _ MP

External Graphics (PCH Integrated Graphics Disable)

3 , 9 , 1 0 , 1 1 , 1 2, 18 , 1 9 , 2 0 , 2 2 , 2 3, 24 , 2 5 , 2 7 , 2 8 , 2 9 , 30 , 3 1 , 3 2 , 3 3 , 3 4 , 35 , 3 9 3 . 3 V S
1 1, 18 , 2 4 , 2 5 , 2 7 , 2 8 , 31 , 3 2 , 3 3 , 3 5 , 3 9 , 40 , 4 1 5 V S

B - 22 CougarPoint - M 4/9

P O R T C _H P C
HD
HD
HD
HD
HD
HD
HD
HD

SDVO

L _ C T R L_ C L K
L _ C T R L_ D A T A

2 . 3 7K _ 1% _ 0 4

A M 42
A M 40
AP3 9
AP4 0

Display Port B

2 .2 K _ 0 4
2 .2 K _ 0 4

R 38 7

S D V O_ I N T N
S D V O _ INT P

AP4 3
AP4 5

Display Port C

R 39 7
R 37 9

L _ D DC _ CL K
L _ D DC _ DA T A

Digital Display Interface

T4 0
K4 7

1 1 P_ D DC _ CL K
1 1 P_ D DC _ DAT A

LVDS

Ver:1.0
pull up 2.2K

CRT

B.Schematic Diagrams

3 .3 VS

SD VO _ STAL L N
S D V O_ S T A L L P

Display Port D

J47
M4 5

11
B L ON
1 1 ,3 4 N B_ EN A VD D

Schematic Diagrams

CougarPoint - M 5/9
CougarPoint -M (PCI,USB,NVRAM)
U54E

BBS_BIT0

0
0
1
1

Boot BIOS Location

0
1
0
1
R415

LPC
Reserved
PCI
SPI

(NAND)

BBS_BIT1

*1K_04

B21
M
20
AY16
BG
46

Flash Descriptor security override strap

TP21
TP22
TP23
TP24

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD

Boot BIOS Strap
BBS_BIT1

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

RSVD23
RSVD24

R409

*1K_04

R406

PCI_GNT#3

INT
_PIRQ
E#

*1K_04

MPC Switch C ontrol
MPC OFF -- 0 DEFAULT
MPC ON -- 1

12,34,37 DG
PU_PWR_EN#

R407

*0_04

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

K40
K38
H38
G
38

DGPU_HO
LD_RST#
DGPU_SEL
ECT#
D_GPU_PWR_EN#

C46
C44
E40

BBS_BIT1
D47
DGPU_PWM
_SELECT# E42
PCI_G
NT#3
F46

18,31 SATA_ODD_DA#

INT_PIRQE#
SATA_ODD_DA#
INT_PIRQG#
INT_PIRQH#

G
42
G
40
C42
D44

TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40

PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ
1# / G
PIO5
0
REQ
2# / G
PIO5
2
REQ
3# / G
PIO5
4
G
NT1# / GPIO51
G
NT2# / GPIO53
G
NT3# / GPIO55

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG
#/ G
PIO
4
PIRQH# / G
PIO
5

RSVD28
RSVD29

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10

RN7
10K_8P4R_04
5
4
6
3
7
2
8
1

USB_O
C#14
USB_O
C#67
USB_O
C#1011
USB_O
C#45

RN18
10K_8P4R_04
5
4
6
3
7
2
8
1

INT_PIRQE#
SATA_ODD_DA#
INT_PIRQD#
INT_PIRQA#

RN12
10K_8P4R_04
4
5
3
6
2
7
1
8

DGPU_HOLD_RST
#
DGPU_SELECT#
D_GPU_PWR_EN#
INT
_PIRQ
G#

RN20
10K_8P4R_04
4
5
3
6
2
7
1
8

AY5
BA2

INT_PIRQB#
INT
_PIRQ
C#
INT
_PIRQ
H#

3.3V

3.3VS

Sheet 22 of 49
CougarPoint - M 5/9

AT12
BF3

RN23
10K_8P4R_04
4
5
3
6
2
7
1
8

DGPU_PWM_SELECT
#

USB

Unde rstand the RE D FONT define

AT10
BC8

LAN_CLKREQ#
USB_O
C#23
USB_O
C#89
USB_O
C#1213

AT8

RSVD26
RSVD27

PCI

BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG
32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30

HIGH = Default

19 LAN_CL
KREQ
#

RSVD25

LOW = PCI_GNT#3 swap override
PCI_GNT#3

AY7
AV7
AU3
BG4

USBP0
N
USBP0P
USBP1
N
USBP1P
USBP2
N
USBP2P
USBP3
N
USBP3P
USBP4
N
USBP4P
USBP5
N
USBP5P
USBP6
N
USBP6P
USBP7
N
USBP7P
USBP8
N
USBP8P
USBP9
N
USBP9P
USBP10
N
USBP10P
USBP11
N
USBP11P
USBP12
N
USBP12P
USBP13
N
USBP13P

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M
28
L30
K30
G
30
E30
C30
A30
L32
K32
G
32
E32
C32
A32

C33

USB_PN0
USB_PP0
USB_PN1
USB_PP1
USB_PN2
USB_PP2
USB_PN3
USB_PP3
USB_PN4
USB_PP4
USB_PN5
USB_PP5

28
28
27
27
27
27
27
27
28
28
28
28

*10K_
04

R400

US B PORT0
US B PORT1
3G
WLAN
FING ER
CCD

HM65 NO SUPPORT PORT 6 & 7

USB_PN6_FP14 2
7
USB_PP6_FP14 27

USB_BIAS

USBRBI AS#

R604

W1 4XX FINGER

22.6_1%_06

B33
30,34

PME#

R425

*0_04

PLT_RST#

PME#
C6

3,12,28 PLT_RST#

28 PCLK_TPM
19 CLK_PCI_FB
34 PCLK_KBC

USBRBI AS

K10

PLTRST#

R416
R616

*22_04
22_04

PCLK_TPM_PCH
CLK_PCI _FB_R

R392

22_04

CLK_PCI _KBC_R

H49
H43
J48
K42
H40

CLKO
UT_PCI0
CLKO
UT_PCI1
CLKO
UT_PCI2
CLKO
UT_PCI3
CLKO
UT_PCI4

O
C0# / GPI O
59
O
C1# / GPI O
40
O
C2# / GPI O
41
O
C3# / GPI O
42
O
C4# / GPI O
43
O
C5# / GPI O
9
O
C6# / GPI O
10
O
C7# / GPI O
14

A14
K20
B17
C16
L16
A16
D14
C14

USB_OC#01
USB_OC#23
USB_OC#45
USB_OC#67
USB_OC#89
USB_OC#10
11
USB_OC#12
13
USB_OC#14

USB_OC#01 28

R591

*0_04

AC_
PRESENT 20,34

BD82HM65_M
P
3.3VS
*0.1u_1
6V_Y5V_
04
5

C690

PI N PL T_ RS T# to B uf fe r
U53
MC74VHC1G08DFT
2G

1
4

BUF_PLT_RST
# 27,29,30,34

2
3

PLT_RST#

R574
100K_04

2,3, 8, 11
, 12
, 16
, 18
, 19
, 20
, 23, 24, 25, 27, 28, 29
, 30
, 33
, 35
, 37
, 38
, 39 3.3V
3, 9, 10, 11, 12
, 18
, 19
, 20
, 21
, 23
, 24
, 25, 27, 28, 29, 30
, 31
, 32
, 33
, 34
, 35
, 39 3.3VS

CougarPoint - M 5/9 B - 23

B.Schematic Diagrams

BG
26
BJ26
BH25
BJ16
BG
16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45

Schematic Diagrams

CougarPoint - M 6/9
CougarPoint - M (GPIO,VSS_NCTF,RSVD)
3.3V
R569
R295

1K_04
1K_04

HOST_ALERT#1
HOST_ALERT#2

3.3VS
U54F

RN17
10K_8P4R_04
1
8
2
7
3
6
4
5

S_G
PI O
34

KBC_RST#
DGPU_HPD_I NTR#
SCI#
SMI#
SATA_ODD_PRSNT#

34

SMI#

SCI#

T
7
BMBUSY# / GPIO0

TACH4 / GPIO68

TACH1 / G
PIO
1

TACH5 / GPIO69

A4
2

DGPU_HPD_INTR#

H3
6

SCI#

E3
8

I CC_EN#

C1
0

TACH2 / G
PIO
6

TACH6 / GPIO70

TACH3 / G
PIO
7

TACH7 / GPIO71

R573

10K_04

EDID_SEL
ECT#

C4

R465

*0_0
4

HOST_ALERT#1

G
2

Sheet 23 of 49
CougarPoint - M 6/9

R299
R314

*1
K_0
4
100K_04

PCH_GPIO57

R609

1.5K_1%_04

C41

G
PIO70

R612

1.5K_1%_04

A4
0

G
PIO71

R610

1.5K_1%_04

R300

10K_04

R320
R316

*10K_04
*0_04

SATA_DET#4

FOR VIA USB3.0 ONLY

ODD_DETECT# 18

PCH_TS_VSS1
PCH_TS_VSS2
PCH_TS_VSS3
PCH_TS_VSS4

BIO
S_REC

D4
0
T
5
SCLO
CK/ GPIO22

HOST_ALERT#2
11

PLL_O
DVR_EN
FDI_O
VRVL
TG

SB_BLON

SB_BLON

D02 CHANGE

PLL
_ODVR_
EN

29,34

ICPPE#

R466

*0_0
4

E8
GPIO2
4 /M
EM
_LED
E1
6
P8
GPIO2
8

AU16

HPECI _R

P5

KBC_RST#

LED_DGPU#
PCH_MUTE#

18,31 SATA_ODD_PRSNT#

3.3VS

FDI_OVRVLTG

M
5

MFG_MO
DE

N2

T14

INI T
3_3V#

AY1

NV_
CLE

AH8

PCH_TS_VSS1

AK11

PCH_TS_VSS2

AH10

PCH_TS_VSS3

AK10

PCH_TS_VSS4

TS_VSS2
TS_VSS3
SATA2
GP / G
PIO3
6
TS_VSS4

GFX_CRB_DET

34 CRI T
_TEMP_REP#

NC_1

M
3
SDATAOUT
0 / GPIO3
9

IN T ER N AL GF X : L OW (D E FA U LT )
EX T ER N AL GF X :H I GH

100K_04

P3
7
SLOAD / GPIO38

TEST_SET_UP

V1
3

R290

*0_0
4

CRIT_TEM
P_REP#_R

V3

R296

100K_04

TEST_DET

D6

BG
2
SDATAOUT
1 / GPIO4
8

VSS_NCTF_15

SATA5
GP / G
PIO4
9

VSS_NCTF_16

GPIO5
7

VSS_NCTF_17

BG
48
BH3
BH47

R288

10K_04

VSS_NCTF_18

BIO
S_REC
A4
R28
7

B IO S R E CO V ER Y

A4
4

*0
_04

D IS A BL E -- - -H I GH ( D EF A UL T )
E NA B LE - -- - -L O W

A4
5

BJ4
VSS_NCTF_1

VSS_NCTF_19

VSS_NCTF_2

VSS_NCTF_20

VSS_NCTF_3

VSS_NCTF_21

BJ44
BJ45

A4
6
VSS_NCTF_4
A5
VSS_NCTF_5
A6
3.3V

BJ46
VSS_NCTF_22
BJ5
VSS_NCTF_23
BJ6

VSS_NCTF_6

VSS_NCTF_24

VSS_NCTF_7

VSS_NCTF_25

VSS_NCTF_8

VSS_NCTF_26

VSS_NCTF_9

VSS_NCTF_27

VSS_NCTF_10

VSS_NCTF_28

VSS_NCTF_11

VSS_NCTF_29

VSS_NCTF_12

VSS_NCTF_30

VSS_NCTF_13

VSS_NCTF_31

VSS_NCTF_14

VSS_NCTF_32

B3
R414

10K_04

ICC_EN#

C2

B4
7
R577
*1
K_04

I NT E GR A TE D C l oc k C hi p E n ab l e
I CC _ EN # : H IG H - D I SA B LE D [ D EF A UL T ]
L OW - EN A BL E D

C48

BD1

D1

BD4
9

D49

BE1

E1

BE4
9

E4
9

BF1

F1

BF4
9

F4
9

BD82HM65_M
P

6,24,37 1.8VS
2,3,5,24,25,35,39 1.05VS_VTT
2,3,8,11,12,16,18,19,20,22,24,25,27,28,29,30,33
,3
5, 3
7,38,39 3.3V
3
,9
, 10, 1
1,12,18,19,20,21,22,24,25,27,28,29,30,31,32
,3
3, 3
4,35,39 3.3VS

B - 24 CougarPoint - M 6/9

H_THRMTRIP# 3
R560

SATA3
GP / G
PIO3
7
G
FX_CRB_DET

390
_1%_06

R559

1K_04

DF_TVS

GPIO3
5
V8

H_CPUPWRGD 3
HTHRMTRIP#_R R318

THRMTRI P#

STP_PCI# / G
PIO
34
K4

SATA_ODD_PRSNT#

H_PECI 3
,3
4
KBC_
RST# 34

AY10
INIT3_3V#

3
4

1. 05
VS_VTT

PROCPWRGD

TS_VSS1

K1
31

3. 3VS

AY11

GPIO2
7

FOR VIA USB3.0 ONLY

R56
5

3. 3VS

PECI

U2
SATA4
GP / G
PIO1
6

LO W - D I SA B LE D

*1
0K_
04

3. 3VS

GA20

A20G
AT
E

RCIN#

PL L _O D VR _ EN : HI GH - E N AB L ED [ DE F AU L T]

R555

SATA_ODD_PWRGT 31

P4
GPIO1
5

D02 CHANGE

TACH0 / G
PIO
17
*10mli_short
*10mli_short
*10mli_short
*10mli_short

SATA_ODD_PWRGT

B4
1

LAN_PHY_PWR_CTRL / GPIO1
2

OCPPE#

DGPU_PWROK
R326
R310
R319
R311

C40

GPIO8
3.3V
29

S_GPIO
ODD_DET
ECT#
TEST_SET
_UP
CRIT_TEMP_REP#_R

SM
I#

NCTF

B.Schematic Diagrams

RN22
10K_8P4R_04
1
8
2
7
3
6
4
5
R302
200K_04

DGPU_PWROK
SATA_ODD_PWRGT
M
FG
_MODE
SATA_DET#4

CPU/MISC

*1
0K_
04
1K_04
10K_04
10K_04

GPIO

R401
R402
R554
R551

2.2K_
04

1.8VS
H_SNB_IVB# 3

DMI & FDI Termination Voltage
Set to Vss
NV_CLE

when LOW

Set to Vcc when HIGH

PL A CE R4 6 4 C LO S E T O T HE BR A NC H IN G P OI N T
( T O C PT an d N V RA M C O NN E CT O R

Schematic Diagrams

CougarPoint - M 7/9
CougarPoint -M (POWER)
3 .3 VS
L 52
H C B 1 60 8 K F -1 2 1 T2 5

C 4 67

1 u _6 . 3 V _ X 5R _ 04

1 u _ 6. 3V _ X 5 R _ 0 4

1 . 0 5V S

CO
CO
CO
CO
CO
CO
CO
CO
CO
CO
CO
CO
CO
CO
CO
CO
CO

RE [1 ]
RE [2 ]
RE [3 ]
RE [4 ]
RE [5 ]
RE [6 ]
RE [7 ]
RE [8 ]
RE [9 ]
RE [1 0 ]
RE [1 1 ]
RE [1 2 ]
RE [1 3 ]
RE [1 4 ]
RE [1 5 ]
RE [1 6 ]
RE [1 7 ]

5

V C C A _D A C 3 . 3 V S

1
O UT

C7 3 0

C7 3 1

C 73 7

C7 4 2

C 7 40

R6 3 0

0. 0 1 u _1 6 V _ X 7R _ 04

0 . 1u _ 1 0 V _X 5 R _ 0 4

1 0 u_ 6 . 3 V _ X 5R _ 06

0 . 1 u_ 1 0 V _ X5 R _0 4

2 2 u _6 . 3 V _ X 5R _ 08

*2 3 . 7K _1 % _ 04
S ET
4

IN
C 7 41

U 47

3

V S S A DA C

S HD N#
2
SET

V C CA L V D S
VSSAL VD S

AK3 6

3. 3 V S _ V C C A _ L V D

1mA

3 . 3V S
R3 6 5

R6 2 7

* 15 m i _l s h or t _0 6
*1 0 K _1 % _ 0 4

C5 2 3

AK3 7

G ND

* A P L 5 60 3 -3 3B

*1 u _ 6. 3 V _ X 5 R _ 0 4
1. 8 V S _ V C C T X _ LV D

AM 3 7
V C C T X _ LV D S [ 1 ]
AM 3 8

60mA

L39

V C C T X _ LV D S [ 2 ]
AP3 6

C5 3 0

AP3 7

0. 0 1 u _1 6 V _ X 7R _ 04

V C C T X _ LV D S [ 3 ]
V C C T X _ LV D S [ 4 ]

C5 3 6

C 54 3

0 . 01 u _ 1 6V _ X 7 R _ 0 4

2 2 u_ 6 . 3 V _ X 5R _ 08

.

H C B 16 0 8 K F -1 2 1T 2 5

1. 8 V S

APL5603-33B 6-02-56033-4C0
G9091-330T11UF 6-02-90913-4C0

V C C I O[ 2 8 ]
1 . 0 5 V S _ V C C A P L L_ E X P 1

*H C B 1 0 0 5 K F -1 21 T 2 0

.

BJ 2 2

3 .3 VS

V C C A P L L E XP

C 7 01

HVCMOS

L 47

AN 1 6
V C C I O[ 1 5 ]

* 1 0u _ 6 . 3V _X 5 R _ 0 6
AN 1 7

V C C I O[ 1 6 ]
AN 2 1
V C C I O[ 1 7 ]
1 .0 5 V S

C5 2 8

1 . 5 V S _ 1. 8V S
V C C I O[ 1 9 ]

C5 0 3

1 u _6 . 3 V _ X 5R _ 04

1 u_ 6 . 3 V _ X5 R _0 4

C5 0 5
1u _ 6 . 3V _X 5 R _ 0 4

C 4 85
1 u _ 6. 3V _ X 5 R _ 0 4

AP2 3

AT1 6

160mA

AT2 0

42mA

AB3 6

V C C C LK D MI

V C C V R M[ 3 ]

V C C I O[ 2 0 ]
V C C I O[ 2 1 ]

AP2 6
V C C I O[ 2 3 ]
AT 2 4
V C C I O[ 2 4 ]

VCCIO

V C C I O[ 2 2 ]

1 . 0 5V S _V T T

V C C D MI [ 1 ]

AP2 4

DMI

C4 9 5

1 0 u_ 6 . 3 V _ X 5R _ 06

0 . 1u _ 1 0 V _X 5 R _ 0 4

V3 4

V C C I O[ 1 8 ]

AP2 1

Sheet 24 of 49
CougarPoint - M 7/9

266mA

V C C 3 _3 [ 7 ]

AN 2 7

C 47 7

V3 3

AN 2 6

2.92A

2.93A

V C C 3 _3 [ 6 ]

C 45 8

2mA
V CC CL K DM I

R 37 5

*1 5 m li _ s ho rt _ 0 6

1. 0 5 V S

1 u _ 6 . 3V _ X 5 R _ 0 4

C 4 54
1 0 u _6 . 3 V _ X 5R _ 06

AN 3 3
V C C I O[ 2 5 ]
AN 3 4

AG 1 6
V C C I O[ 2 6 ]

3. 3 V S

266mA

V C C D F T E R M[ 1 ]

DFT / SPI

BH 2 9
V C C 3 _3 [ 3 ]

C6 9 3
1 . 5 V S _ 1. 8 V S
0. 1u _ 1 0V _X 5 R _ 0 4

160mA

AP1 6
V CC V RM [2 ]

1 . 05 V S _ V C C A P L L _ F D I
BG 6

* 0_ 0 6

V c cA F D I P L L
AP1 7

42mA
1. 0 5 V S _ V T T

V C C I O[ 2 7 ]

1 . 0 5 S _ V C C _D MI
R 3 48

AU 2 0

*1 5 mi l _ sh o rt _ 0 6

V CC DM I[2 ]

FDI

R 3 24

1 . 0 5V S

V _N V R A M_ V C C Q
AG 1 7

190mA

R 55 8

C 45 6

R 56 1

*0 _ 0 4

R 55 0

0 _0 4

3. 3V S

R 55 7

*0 _ 0 4

3. 3V

* 1 5m i l _s h o rt _ 06

V C C D F T E R M[ 2 ]
AJ 1 6
V C C D F T E R M[ 3 ]

1. 8V S
3. 3V S

0 . 1 u_ 1 0 V _ X5 R _0 4
AJ 1 7

V C C D F T E R M[ 4 ]

V C C ME 3 . 3 V
V1

20mA

V CC S P I
C6 9 4
1 u_ 6 . 3 V _ X5 R _0 4

B D 82 H M6 5 _M P

1 . 05 V S

1 .5 V S

1 .8 V S

1 . 5V S _1 . 8 V S

R 42 2
R 33 1
R 62 2

*0 _ 0 4
* 1 0m i l _s h o rt
*0 _ 0 4

35
1 .5 V S
2 5 1 . 5V S _1 . 8 V S
6 ,2 3 ,3 7 1 .8 V S
6, 18 , 1 9 , 20 , 2 5 , 2 9, 3 5 , 3 7 , 38 , 3 9 1 . 0 5V S
1 1, 1 8 , 2 5 , 27 , 2 8 , 3 1, 3 2 , 3 3, 35 , 3 9 , 4 0, 4 1 5 V S
2 , 3 , 5, 2 3 , 2 5 , 35 , 3 9 1 . 05 V S _ V T T
2 , 3 , 8 , 11 , 1 2 , 1 6, 1 8 , 1 9 , 20 , 2 2 , 2 3, 2 5 , 2 7 , 28 , 2 9 , 3 0, 3 3 , 3 5 , 37 , 3 8 , 3 9 3 . 3 V
3 , 9, 10 , 1 1 , 12 , 1 8 , 1 9, 2 0 , 2 1 , 22 , 2 3 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 1, 3 2 , 3 3 , 34 , 3 5 , 3 9 3 . 3 V S

CougarPoint - M 7/9 B - 25

B.Schematic Diagrams

AN 1 9

*1 0 m li _ s ho rt

U 55

.

VCC A DA C

1 . 0 5 V S _ V C C A P L L_ E X P
R5 9 7

5V S

L51
H C B 1 6 0 8K F -12 1 T 2 5

1mA

* 1u _ 6 . 3 V _X 5R _ 04

C 49 4

1u _ 6 . 3 V _ X5 R _0 4

V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC
V CC

CRT

C5 1 4

10 u _ 6. 3V _ X 5 R _ 0 6

V C C A _ D A C _ 3 . 3V S
U 48

LVDS

C4 7 8

AA2 3
AC 2 3
AD 2 1
AD 2 3
AF 2 1
AF 2 3
AG 2 1
AG 2 3
AG 2 4
AG 2 6
AG 2 7
AG 2 9
AJ 2 3
AJ 2 6
AJ 2 7
AJ 2 9
AJ 3 1

VCC CORE

1.3A

.

P OW E R

U5 4 G
1. 05 V S

Schematic Diagrams

CougarPoint - M 8/9

1 . 0 5V S _ V C C A _ C LK
L5 0

1 . 05 V S

CougarPoint - M (POWER)

CougarPoint power supply range

*H C B 1 00 5 K F -1 2 1 T2 0
U5 4 J

3 .3 V

Note: C417 - STUFFED ONLY FOR CPT INTERPOSER;
UNSTUFF FOR CPT

2. 92 A

A D 49

C4 8 2

N 26
V CCA CL K

0. 1 u _ 10 V _ X 5 R _ 04

3mA

V C C I O[ 2 9 ]

C 51 6
P2 6

V C C I O[ 3 0 ]

T 16
V CCD S W 3 _ 3

1 u _ 6. 3 V _ X 5R _ 04
P2 8

V C C I O[ 3 1 ]
C4 4 9
L4 9

3 .3 VS

.

PC H_ V C CD SW

* 0. 1 u _ 10 V _ X 5R _ 04

V 12

VC C3 _ 3

C7 3 2

C5 3 2

10 u _ 6. 3 V _ X 5 R _ 06

1u _ 6 . 3V _X 5 R _ 0 4

T 38

V C C I O[ 3 3 ]
V C C 3 _ 3 [ 5]
V C C S U S 3 _3 [ 7 ]
V C C A P LL D MI 2

C4 7 6

* 0. 1 u _ 16 V _ Y 5 V _ 0 4

USB

D CP S US[3 ]

V C C S U S 3 _3 [ 9 ]
V C C S U S 3 _ 3[ 1 0 ]
V C C S U S 3 _3 [ 6 ]

DC P S US
A A 19

1. 01A

V CCA S W [1 ]

Max
1.10V
1.58V
1.89V
3.47V
5.25V

C 46 1

C5 0 2

0 . 1 u _1 0 V _ X5 R _0 4

0 . 1u _ 1 0V _ X 5 R _ 0 4

T24
V2 3
V2 4

D 15
C

1mA

R3 7 0

V CCA S W [4 ]
A A 27
V CCA S W [5 ]
A A 29
V CCA S W [6 ]
A A 31

C4 8 0

C4 8 4

22 u _ 6. 3 V _ X 5 R _ 08

1u _ 6 . 3V _X 5 R _ 0 4

V CCA S W [7 ]
A C 26
V CCA S W [8 ]
A C 27
V CCA S W [9 ]
A C 29
V C C A S W [ 1 0]
A C 31
V C C A S W [ 1 1]

C4 8 6
A D 29

V C C A S W [ 1 2]

1u _ 6 . 3V _X 5 R _ 0 4
A D 31

V C C A S W [ 1 3]
W 21
V C C A S W [ 1 4]
W 23

Clock and Miscellaneous

A A 26

V C C A S W [ 1 5]

Note: C1289- STUFFED ONLY FOR CPT INTERPOSER;
UNSTUFF FOR CPT

W 24

M 26

5 V A _ P C H_ V CC 5 RE F S U S

A N 23

V C C A _U S B S U S

V 5 R E F _S U S
D CP S US [4 ]

C 46 5

*1 u _6 . 3 V _ X 5R _ 04

A N 24

3 .3 V

V C C S U S 3 _3 [ 1 ]

P3 4

1mA

5 V S _ P C H _ V C C 5R E F S U S
D 17
C

C D B U 00 3 4 0
A

3 . 3V S

V 5R E F
N 20

PCI/GPIO/LPC

V CCA S W [3 ]

1u _ 6 . 3V _X 5 R _ 0 4

5V

0 . 1 u _1 0 V _ X5 R _0 4

A A 24
C5 1 7

22 u _ 6. 3 V _ X 5 R _ 08

3 . 3V

1 0 _ 1% _ 0 4

C 50 7

1. 05 V S

V CCA S W [2 ]
C4 8 1

C D B U 00 3 4 0
A

P2 4

V C C I O[ 3 4 ]

A A 21

1 . 0 5V S

T23

T26

V C C A S W [ 1 6]

R3 6 7

97mA

V C C S U S 3 _3 [ 2 ]

1 0 _ 1% _ 0 4

5 VS

C5 1 8

N 22
V C C S U S 3 _3 [ 3 ]

1 u_ 6 . 3 V _X 5 R _ 0 4

P2 0
V C C S U S 3 _3 [ 4 ]
P2 2
V C C S U S 3 _3 [ 5 ]

3 . 3V
AA1 6

C 4 87

266mA
3 . 3V S

V C C 3 _3 [ 1 ]

1 u _ 6. 3 V _ X 5R _ 04

W16

C5 2 2

C 71 1

C4 6 6

T34

0 . 1u _ 1 0V _ X 5 R _ 0 4

0 . 1 u _1 0 V _ X5 R _0 4

0 . 1u _ 1 0V _ X 5 R _ 0 4

V C C 3 _3 [ 8 ]
V C C 3 _3 [ 4 ]

W 26
V C C A S W [ 1 7]
W 29

C 46 0

V C C A S W [ 1 8]

0. 1 u _ 10 V _ X 5 R _ 04
W 31

D02 CHANGE

AJ 2
V C C A S W [ 1 9]

1 . 05 V S

1 . 05 V S _ V C C A _ A _ D P L
L3 8
H C B 16 0 8 K F -1 21 T 2 5

V C C 3 _3 [ 2 ]

V C C A S W [ 2 0]
V C C I O[ 5 ]

.

V C C R T C E XT
+ C 7 39

C7 3 3

C5 4 7

22 u _ 6. 3 V _ X 5R _ 08

1u _ 6 . 3V _ X 5 R _ 0 4

16 mA
R4 0 3

22 0 u _4 V _ V _ A

1 . 0 5S _S A T A 3

W 33

1 . 5 V S _ 1 . 8V S

N 16

AF1 3

2.92A

L32
H C B 1 0 0 5K F - 12 1 T 20
1 .0 5 V S

C4 4 7

D CP R T C

A H 13
V C C I O[ 1 2 ]

Y 49

1 u_ 6 . 3 V _X 5 R _ 0 4
A H 14

V C C V R M[ 4 ]

V C C I O[ 1 3 ]

*0 _ 04
1 . 0 5 V S _ V C C A _B _D P L

.

L36
H C B 16 0 8 K F -1 21 T 2 5
C 72 7

C7 1 9

C5 4 0
1 u_ 6 . 3 V _X 5R _0 4

2 2u _ 6 . 3V _ X 5 R _ 0 8

* 22 u _ 6. 3 V _ X 5 R _ 0 8

*2 2 u_ 6 . 3 V _ X 5R _ 08

22 0 u _4 V _ V _ A

D02 CHANGE

C 7 24

V CCA DPL L A
V CCA DPL L B

C4 7 9

C4 5 5

1u _ 6 . 3V _X 5 R _ 0 4

1u _ 6 . 3V _X 5 R _ 0 4

A F 17
A F 33
A F 34
A G 34

L46
* H C B 10 0 5 K F -1 21 T 2 0

V C C I O[ 6 ]

B F 47

150mA

1 . 05 V S
+ C 8 01

AF1 4
B D 47

SATA

80mA
80mA

V
V
V
V

CCIO [7 ]
C C D I F F C LK N [ 1 ]
C C D I F F C LK N [ 2 ]
C C D I F F C LK N [ 3 ]

AK1

1 . 0 5 V S _ V C C A P L L_ S A T A 3

1 .0 5 V S

VC CAP L L SA T A
1 . 5V S _1 . 8 V S
AF1 1
V C C V R M[ 1 ]

1 . 0 5V S
3. 3 V

A C 16

A G 33

A D 17
V CCS S C

C4 9 6

C 4 4 8 0 . 1 u_ 1 0 V _ X5 R _ 0 4 V C C S S T

T 17
V 19

D CP S US[1 ]
D CP S US[2 ]

C4 5 1

4 . 7 u_ 6 . 3 V _ X5 R _ 0 6

0. 1 u _ 10 V _ X 5 R _ 04

0. 1 u _ 10 V _ X 5 R _ 04

2mA

V _P R OC _I O

A 22
V CCR T C

RT C V CC
C 70 8

C7 1 0

C7 1 5

1 u _6 . 3 V _ X5 R _0 4

0. 1 u _ 10 V _ X 5 R _ 04

0. 1 u _ 10 V _ X 5 R _ 04

B D 8 2 H M 65 _ MP

CPU

C4 4 6

1.01A
1 .0 5 VS

V C CA S W [2 2 ]

RTC

B J8
C 45 0

V C CA S W [2 3 ]

V2 1
T19

V C CA S W [2 1 ]
3 . 3 A _ 1. 5 A _ H D A _ I O
P3 2

16mA

V C CS U S HD A
C5 0 6
0 . 1u _ 1 0V _ X 7 R _ 0 4

B - 26 CougarPoint - M 8/9

*0 _ 0 6
*1 5 m li _ sh o rt _ 0 6

1 u_ 6 . 3 V _X 5 R _ 0 4

T21

<1mA
1 . 0 5V S _ V T T

R 6 07
R 6 08

D CP S S T

MISC

C4 6 9

C4 5 3

V C C I O[ 4 ]

V 16

1u _ 6 . 3V _X 5 R _ 0 4
1 . 0 5 M_ V C C S U S
*1 u _6 . 3 V _ X5 R _0 4

3. 3A _ 1 . 5 A _ H D A _I O

A C 17
V C C I O[ 3 ]

1 . 05 V S

1. 5 V

V C C I O[ 2 ]

HDA

B.Schematic Diagrams

Sheet 25 of 49
CougarPoint - M 8/9

V C C I O [ 1 4]

V C C A P L L _C P Y _ P C H

*H C B 1 6 0 8K F -12 1 T 2 5

V C C S U S 3 _3 [ 8 ]

A L 29

A L 24

.

Voltage
1.05V
1.5V
1.8V
3.3V
5V

T29

1 . 0 5V S

L4 8

97 mA

V C C I O[ 3 2 ]

B H 23

1 . 0 5V S

3 .3 V
T27

D CP S USB Y P

26 6mA

H C B 1 6 08 K F -1 2 1 T2 5

Min
1.00V
1.43V
1.71V
3.14V
4.75V

1. 0 5 V S

PO WE R

1 8 3 . 3A _1 . 5 A _ H D A _I O
1 8 ,2 0
RT C V CC
2 4 1 . 5 V S _ 1 . 8V S
6, 1 8 , 1 9, 2 0 , 2 4, 29 , 3 5 , 37 , 3 8 , 3 9 1 . 0 5 V S
3 , 6, 8 , 9 , 1 0 , 29 , 3 5 , 37 , 3 8 1 . 5V
2, 3 , 5 , 2 3 , 24 , 3 5 , 3 9 1 . 0 5 V S _ V TT
1 1 , 18 , 2 4 , 2 7, 2 8 , 3 1, 3 2 , 3 3 , 35 , 3 9 , 40 , 4 1 5 V S
2 , 3 , 8 , 1 1, 1 2 , 1 6, 18 , 1 9 , 20 , 2 2 , 23 , 2 4 , 2 7, 2 8 , 2 9, 3 0 , 3 3 , 35 , 3 7 , 38 , 3 9 3 . 3V
3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 20 , 2 1 , 22 , 2 3 , 24 , 2 7 , 2 8, 2 9 , 3 0, 3 1 , 3 2 , 33 , 3 4 , 35 , 3 9 3 . 3V S
2 7 , 2 8 , 29 , 3 5 , 37 , 3 8 5 V

Schematic Diagrams

CougarPoint - M 9/9
CougarPoint -M (GND)
U54I
U54H
VSS[ 15
9]
VSS[ 16
0]
VSS[ 16
1]
VSS[ 16
2]
VSS[ 16
3]
VSS[ 16
4]
VSS[ 16
5]
VSS[ 16
6]
VSS[ 16
7]
VSS[ 16
8]
VSS[ 16
9]
VSS[ 17
0]
VSS[ 17
1]
VSS[ 17
2]
VSS[ 17
3]
VSS[ 17
4]
VSS[ 17
5]
VSS[ 17
6]
VSS[ 17
7]
VSS[ 17
8]
VSS[ 17
9]
VSS[ 18
0]
VSS[ 18
1]
VSS[ 18
2]
VSS[ 18
3]
VSS[ 18
4]
VSS[ 18
5]
VSS[ 18
6]
VSS[ 18
7]
VSS[ 18
8]
VSS[ 18
9]
VSS[ 19
0]
VSS[ 19
1]
VSS[ 19
2]
VSS[ 19
3]
VSS[ 19
4]
VSS[ 19
5]
VSS[ 19
6]
VSS[ 19
7]
VSS[ 19
8]
VSS[ 19
9]
VSS[ 20
0]
VSS[ 20
1]
VSS[ 20
2]
VSS[ 20
3]
VSS[ 20
4]
VSS[ 20
5]
VSS[ 20
6]
VSS[ 20
7]
VSS[ 20
8]
VSS[ 20
9]
VSS[ 21
0]
VSS[ 21
1]
VSS[ 21
2]
VSS[ 21
3]
VSS[ 21
4]
VSS[ 21
5]
VSS[ 21
6]
VSS[ 21
7]
VSS[ 21
8]
VSS[ 21
9]
VSS[ 22
0]
VSS[ 22
1]
VSS[ 22
2]
VSS[ 22
3]
VSS[ 22
4]
VSS[ 22
5]
VSS[ 22
6]
VSS[ 22
7]
VSS[ 22
8]
VSS[ 22
9]
VSS[ 23
0]
VSS[ 23
1]
VSS[ 23
2]
VSS[ 23
3]
VSS[ 23
4]
VSS[ 23
5]
VSS[ 23
6]
VSS[ 23
7]
VSS[ 23
8]
VSS[ 23
9]
VSS[ 24
0]
VSS[ 24
1]
VSS[ 24
2]
VSS[ 24
3]
VSS[ 24
4]
VSS[ 24
5]
VSS[ 24
6]
VSS[ 24
7]
VSS[ 24
8]
VSS[ 24
9]
VSS[ 25
0]
VSS[ 25
1]
VSS[ 25
2]
VSS[ 25
3]
VSS[ 25
4]
VSS[ 25
5]
VSS[ 25
6]
VSS[ 25
7]
VSS[ 25
8]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG
29
N24
AJ3
AD47
B43
BE10
BG
41
G14
H16
T36
BG
22
BG
24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG
28
BJ28

H5
VSS[ 0
]
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3

VSS[ 1
]
VSS[ 2
]
VSS[ 3
]
VSS[ 4
]
VSS[ 5
]
VSS[ 6
]
VSS[ 7
]
VSS[ 8
]
VSS[ 9
]
VSS[ 1
0]
VSS[ 1
1]
VSS[ 1
2]
VSS[ 1
3]
VSS[ 1
4]
VSS[ 1
5]
VSS[ 1
6]
VSS[ 1
7]
VSS[ 1
8]
VSS[ 1
9]
VSS[ 2
0]
VSS[ 2
1]
VSS[ 2
2]
VSS[ 2
3]
VSS[ 2
4]
VSS[ 2
5]
VSS[ 2
6]
VSS[ 2
7]
VSS[ 2
8]
VSS[ 2
9]
VSS[ 3
0]
VSS[ 3
1]
VSS[ 3
2]
VSS[ 3
3]
VSS[ 3
4]
VSS[ 3
5]
VSS[ 3
6]
VSS[ 3
7]
VSS[ 3
8]
VSS[ 3
9]
VSS[ 4
0]
VSS[ 4
1]
VSS[ 4
2]
VSS[ 4
3]
VSS[ 4
4]
VSS[ 4
5]
VSS[ 4
6]
VSS[ 4
7]
VSS[ 4
8]
VSS[ 4
9]
VSS[ 5
0]
VSS[ 5
1]
VSS[ 5
2]
VSS[ 5
3]
VSS[ 5
4]
VSS[ 5
5]
VSS[ 5
6]
VSS[ 5
7]
VSS[ 5
8]
VSS[ 5
9]
VSS[ 6
0]
VSS[ 6
1]
VSS[ 6
2]
VSS[ 6
3]
VSS[ 6
4]
VSS[ 6
5]
VSS[ 6
6]
VSS[ 6
7]
VSS[ 6
8]
VSS[ 6
9]
VSS[ 7
0]
VSS[ 7
1]
VSS[ 7
2]
VSS[ 7
3]
VSS[ 7
4]
VSS[ 7
5]
VSS[ 7
6]
VSS[ 7
7]
VSS[ 7
8]
VSS[ 7
9]

VSS[ 80
]
VSS[ 81
]
VSS[ 82
]
VSS[ 83
]
VSS[ 84
]
VSS[ 85
]
VSS[ 86
]
VSS[ 87
]
VSS[ 88
]
VSS[ 89
]
VSS[ 90
]
VSS[ 91
]
VSS[ 92
]
VSS[ 93
]
VSS[ 94
]
VSS[ 95
]
VSS[ 96
]
VSS[ 97
]
VSS[ 98
]
VSS[ 99
]
VSS[ 100
]
VSS[ 101
]
VSS[ 102
]
VSS[ 103
]
VSS[ 104
]
VSS[ 105
]
VSS[ 106
]
VSS[ 107
]
VSS[ 108
]
VSS[ 109
]
VSS[ 110
]
VSS[ 111
]
VSS[ 112
]
VSS[ 113
]
VSS[ 114
]
VSS[ 115
]
VSS[ 116
]
VSS[ 117
]
VSS[ 118
]
VSS[ 119
]
VSS[ 120
]
VSS[ 121
]
VSS[ 122
]
VSS[ 123
]
VSS[ 124
]
VSS[ 125
]
VSS[ 126
]
VSS[ 127
]
VSS[ 128
]
VSS[ 129
]
VSS[ 130
]
VSS[ 131
]
VSS[ 132
]
VSS[ 133
]
VSS[ 134
]
VSS[ 135
]
VSS[ 136
]
VSS[ 137
]
VSS[ 138
]
VSS[ 139
]
VSS[ 140
]
VSS[ 141
]
VSS[ 142
]
VSS[ 143
]
VSS[ 144
]
VSS[ 145
]
VSS[ 146
]
VSS[ 147
]
VSS[ 148
]
VSS[ 149
]
VSS[ 150
]
VSS[ 151
]
VSS[ 152
]
VSS[ 153
]
VSS[ 154
]
VSS[ 155
]
VSS[ 156
]
VSS[ 157
]
VSS[ 158
]

AK38
AK4
AK42
AK46
AK8
AL1
6
AL1
7
AL1
9
AL2
AL2
1
AL2
3
AL2
6
AL2
7
AL3
1
AL3
3
AL3
4
AL4
8
AM
11
AM
14
AM
36
AM
39
AM
43
AM
45
AM
46
AM
7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT1
1
AT1
3
AT1
8
AT2
2
AT2
6
AT2
8
AT3
0
AT3
2
AT3
4
AT3
9
AT4
2
AT4
6
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

Voltage
1.05
5
5
3.3
1.05
1.05
1.05
1.05
1.1
1.05
1.05
3.3
3.3
1.8
3.3
3.3
1.5
1.05
1.05
1.05
3.3
1.8

S0 Iccmax Current (A)
1 (mA)
1 (mA)
1 (mA)
0.266
1 (mA)
0.08
0.08
1.3
0.042
2.925
1.01
0.020
2 (mA)
0.19
0.097
1 (mA)
0.16
0.02
0.095
0.055
1 (mA)
0.06

Sheet 26 of 49
CougarPoint - M 9/9

BD82HM65_M
P

BD82HM65_M
P

CougarPoint - M 9/9 B - 27

B.Schematic Diagrams

AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3

Voltage Rail
V_CPU_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC3
VccADPLLA
VccADPLLB
VccCore
VccDMI
VccIO
VccASW
VccSPI
VccDSW3_3
VccDFTERM
VccSus3_3
VccSusHDA
VccVRM
VccClKDMI
VccSSC
VccDIFFCLKN
VccALVDS
VccTX_LVDS

Schematic Diagrams

C 5 75

2 2 0u _ 6 . 3V _ 6 . 3 *6 . 3* 4 . 2

C 5 82
J _ 3 G1
1
3
5

3 G_ 3 . 3 V

7
11
13
9
15

C1 4 0
0 . 1u _ 1 6V _ Y 5V _ 0 4

W AKE#
CO E X 1
CO E X 2

3. 3 V A U X_ 0
1 . 5V _ 0
U I M _P W R
UIM _ DA T A
U I M_ C L K
UIM _ RE S E T
U I M_ V P P

C L K R E Q#
RE F CL K RE F CL K +
GN D 0
GN D 1

3G _ 3. 3 V
U I M_ P W R
U I M_ D A TA
U I M_ C LK
U I M_ R S T
U I M_ V P P

3 .3 V S _ F P

C 2 92

1 u _1 0 V _ Y 5 V _ 06

0. 1 u _ 16 V _ Y 5 V _ 04

C7 4 4
C7 4 3

1 u _6 . 3 V _ X5 R _0 4

0 . 1 u_ 1 6V _Y 5V _ 0 4

17
19
37
39
41
43
45
47
49
51

GN D

60 mils
3G _3 . 3 V
C6 1 2

GN D

3 G_ E N

1 0u _ 10 V _ Y 5 V _ 08

C 6 11

R 6 44

*0 _ 04

GN D 1 1
PET n 0
PET p 0
P E R n0
P E R p0

W _ DIS A B L E #
P E RS E T #
S M B _ CL K
SM B_ DAT A
U S B _D U S B _ D+

R e s e rv ed 0
R e s e rv ed 1
GN D 1 2
3 .3 V A UX _ 3
3 .3 V A UX _ 4
GN D 1 3
R e s e rv ed 2
R e s e rv ed 3
R e s e rv ed 4
R e s e rv ed 5

3. 3 V A U X_ 1
1 . 5V _ 1
1 . 5V _ 2
3. 3 V A U X_ 2
LE D _W W A N #
L E D_ W L A N#
LE D _ W P A N #

18
26
34
40
50

Port 2

20
22
30
32
36
38

3 G_ E N

3

Po rt 4

U S B _P N 6_ F P 1 4 2 2
U S B _P P 6 _ F P 1 4 2 2

R6 3 9

J_FP1
4
1

34

34

CPU FAN CONTROL

3G _3 . 3 V

+
2 2 0u _ 6. 3 V _ 6 . 3* 6 . 3* 4. 2

5V S _ F A N

FO N 1
2
3
4

0 . 1 u_ 1 6 V _Y 5 V _0 4

S P T1
S MD 79 X 13 8

FO N
V IN
V O UT
VSET

G
G
G
G

8
7
6
5

ND
ND
ND
ND

33

34

D02 CHANGE
VALUE

C PU _F AN

5 VS_ FAN

1
1

1
1

1
1

1
1

D02 CHANGE
DEL H10 (3G? ? )

1
2
3

C 39 9

33

M I C 1 -R

33 H E A D P H ON E -R
33 H E A D P H ON E -L
3 3 JD _ S E N S E

S P K _H P #

S P DIF O

L26

U S B _ P N 1_ C N 1
US B _ P P 1 _ CN1
S P D I F O _R
F C M1 00 5 K F -1 2 1T 0 3
C4 1 9

CO-lay
R 5 42

3 . 3V S

J_FAN1
3

R 62 9

1 0K _0 4
7
11
13
9
15

C
R
R
G
G

3 . 3V A U X _0
1 . 5 V _0
UIM _ P W R
U I M_ D A T A
U I M_ C L K
U I M_ R E S E T
U I M_ V P P

LK R E Q#
E F CL K E F CL K +
ND0
ND1

G ND5

2
6
8
10
12
14
16

3 . 3V

20 mil
R6 2 8

*0 _ 04

R6 5 5

1 0K _ 0 4

35
23
25
31
33

3 4 W L A N _D E T #
1 9 P C I E _ R X N 3_ W L A N
1 9 P C I E _ R X P 3 _W L A N
1 9 P C I E _ TX N 3_ W L A N
19 P C I E _T X P 3 _W L A N
*0 _ 0 4 B T _ E N _ R

R6 3 1

BT_ EN

3 .3 V

C L_ C LK 1
C L_ D A TA 1
C L_ R S T# 1
3 . 3V

6 32
6 33
6 34
6 36

*
*
*
*

0_ 0 4
0_ 0 4
0_ 0 4
10 K _ 0 4

CL _ CL K _ 1
CL _ DA T A _ 1
C L _ R S T # _1
P C H _B T _ E N _ #

17
19
37
39
41
43
45
47
49
51

G ND2
G ND3
G ND4
G ND1 1
PETn 0
PETp 0
PER n 0
PER p 0
R es e rv e d0
R es e rv e d1
G ND1 2
3 .3 V A UX _ 3
3 .3 V A UX _ 4
G ND1 3
R es e rv e d2
R es e rv e d3
R es e rv e d4
R es e rv e d5

G ND6
G ND7
G ND8
G ND9
G N D 10
W _ D I S A B LE #
P E R S E T#
S MB _ C L K
S MB _ D A T A
U S B _ DUS B _ D+
3 . 3V A U X _1
1 . 5 V _1
1 . 5 V _2
3 . 3V A U X _2
LE D _ W W A N #
L ED_ W L AN#
L ED_ W PAN#

3I N 1

1 9 P C H _ B T _E N #

B - 28 WLAN, 3G, Mini PCIE

R 63 5

0 _0 4

R 63 7

*0 _ 0 4

R5 3 7
R5 4 1
R5 4 6
R5 4 8

U I M_ P W R

U I M_ C LK
U I M_ R S T
U I M_ P W R

20
22
30
32
36
38
24
28
48
52
42
44
46

U I M _C
R7 4

*1 0 mi l _ sh o rt

0 . 1u _ 16 V _ Y 5 V _ 0 4

3. 3V S

* 4. 7K _ 0 4

U I M_ D A T A

B T_ D E T# 3 4
U S B _P N 3 2 2
U S B _P P 3 2 2

20 mil
R4 1 2

40 mil

0 _0 4

GN D
3 . 3V

(T OP VI EW)
D E TE C T_ S W
U I M_ D A T A
U I M_ C L K
U I M_ R S T
U I M_ P W R

U I M _M C M D
U I M _I / O
U I M_ V P P
U I M_ GN D

8
6
4
2

R8 9
*1 0 mi l _ sh o r t
U I M_ D

R3 8 2
4 7K _ 0 4

3 .3 V
B T _D E T #
W LA N _ LE D # 31
C5 3 7
11 , 1 8 , 24 , 2 5 , 28 , 3 1 , 32 , 3 3 , 35 , 3 9 , 40 , 4 1 5V S
2 5, 2 8 , 2 9, 3 5 , 3 7, 3 8 5 V
1 8 , 2 8, 3 0 , 3 4, 3 5 , 3 6, 4 2 V D D 3
2 , 3, 8 , 1 1 , 12 , 1 6 , 18 , 1 9 , 20 , 2 2, 23 , 2 4, 2 5 , 2 8, 2 9 , 3 0, 3 3 , 3 5, 3 7 , 3 8, 3 9 3 . 3V
3, 9 , 1 0 , 11 , 1 2, 18 , 1 9, 20 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 2 8 , 2 9, 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 5, 3 9 3 . 3V S

U I M _D A T A
U I M _V P P

C1 1 5

C1 1 4

C 1 27

*2 2 p_ 5 0 V _N P O_ 0 4

GN D

Lay ou t?
1. SI M? ? ? ? ? ? ? ? (1 0mi l)
2. ? ? ? ? ? ? ? ? G ND
3. SI M h ol d ? ? ? ? ? GN D? ?
4.S IM CO NN ? ? M INI C AR D C ON N

Port 3
3 . 3V

9
7
5
3
1

G ND

W L A N _E N 2 8, 3 4
B U F _P LT _ R S T # 22 , 2 9 , 30 , 3 4

20 mil

R8 5

9 17 1 2 -00 9 0P
C7 7

C1 1 3
R4 1 3
*1 0 K _0 4

3. 3 V A U X_ 1

AU DG
U S B _ P N 1 _C N 1
U S B _ P N 1 _C N 2
U S B _ P P 1_ C N 1
U S B _ P P 1_ C N 2

J _ S I M1

4

18
26
34
40
50

0 _0 4
*0 _ 04
0 _0 4
*0 _ 04

? ? M S AT A fu n c ti o n ? ? ? ? ? ? ?

34

* 18 0 p_ 5 0 V _N P O_ 0 4
BT_ EN

U SB_ PP1

P C H _B T_ E N # 1 9
80 C LK
34

88 9 10 -5 2 04 M -01
3 1, 3 4

U S B _ P N1

22

V DD 3

KEY
21
27
29

22

SIM CONN

20 mil

1
NC1
NC2

*8 71 5 1 -20 0 7 G

GN G
G ND
GN D
GN D

3 . 3V
1 9 W L A N _ C L K R E Q#
1 9 CL K _ P CIE _ M INI#
1 9 C L K _ P C I E _M I N I

W AKE #
C OE X 1
C OE X 2

JSW1
20

?? ??? ?? ??

GN D 1
G ND 2
GN D 3
G ND4

J_ MI N I 1

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

1 00 0 p _5 0 V _ X7 R _ 0 4

DIF F USB8 P&N? ? ? ?

4. 7 K _ 0 4
1

WLAN MINI CARD

M I C 1 -L
M I C 1 -R
AU DG
H E A D P H ON E -R
H E A D P H ON E -L
J D_ S E N S E
SPK_ H P#
J D_ S E N S E _ B
S P K O UT R-_ R
S P K O UT R+ _ R
G ND
U S B _ P N 1 _C N 2
U S B _ P P 1_ C N 2
87 2 13 -1 6 00 G S P D I F O_ R

3 3 JD _ S E N S E _ B
33 S P K O U T R -_ R
33 S P K O U T R + _ R

8 52 0 5 -03 7 01

34 C P U _ F A N S E N

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

D02
CHANGE
33
M I C 1 -L

N C T 3 9 40 S -A

1 0 u_ 1 0 V _Y 5V _0 8

1
3
5

J_ C N 2

U3 0

J _ F A N1

P C IE _ W A K E #

5V

5V

J _C N 1
5 VS

C 39 6

2 0 , 2 9, 3 0 P C I E _W A K E #

Q4 7 B
S L 2N 70 0 2 D W 1 T 1G

Q 47 A
S L 2 N 7 0 02 D W 1T 1 G
1108

FOR AUDIO BOARD

3G _3 . 3 V
C 6 14

G ND

S P T3
S MD 7 9 X 13 8

3 G_ P OW E R

G

D

U S B _P N 2 22
U S B _P P 2 22

6 0mi ls

24
28
48
52
42
44
46

8 8 9 08 -5 20 4 M-0 1

SPT4
S M D 7 9 X1 3 8

2 G

From H8 default HI

C P U _F A N

SPT 2
S M D 7 9X 1 3 8

5

1 0 0K _ 0 4

* 85 2 0 1-0 4 0 51

4

GN D 6
GN D 7
GN D 8
GN D 9
G ND1 0

*2 2p _ 5 0V _ N P O_ 0 4

_ 04
_ 04
_ 04
_ 04

GN D 2
GN D 3
GN D 4

*2 2 p_ 5 0 V _N P O_ 0 4

0 . 0 1u _ 16 V _ X 7R
0 . 0 1u _ 16 V _ X 7R
0 . 0 1u _ 16 V _ X 7R
0 . 0 1u _ 16 V _ X 7R

35
23
25
31
33

6

21
27
29

3 G_ D E T #

D

*2 2 p _5 0 V _ N P O_ 0 4

1 8 S A T A _R X P 3
1 8 S A TA _ R XN 3
1 8 S A TA _ T X N 3
1 8 S A T A _ T XP 3

19
19
19

1 0_ 0 6

1 0 K _ 04

1
2
3
4

1

C7 7 8
C7 7 9
C7 8 0
C7 8 1

R
R
R
R

C7 4 5
R6 4 0
R 63 8

.

34

31 , 3 4

3 G_ 3 . 3V

>48 mil

1 0u _ 1 0V _ Y 5 V _ 0 8
GN D

KEY

? ? ? ? ? J_ 3 G 1

0. 1 u _ 16 V _ Y 5 V _0 4

C 29 5
0 . 1u _ 1 6V _ Y 5V _ 0 4

OP E N _2 A
2

Q4 8
A O 3 41 5
S
D

>48 mil

4
GN D 5

GN D

B.Schematic Diagrams

3 .3 V

3. 3 V S

J _ FP1
G ND

G ND

P J4 3
1

L1 8
H C B 16 0 8 K F -12 1 T 25

C4 4

GN D

Sheet 27 of 49
WLAN, 3G, Mini
PCIE

? ? M S A TA f un c t io n ? P J4 3 SH O R T, ? ? ? ? ?

W140HN ONLY

60 mil s

2
6
8
10
12
14
16

3G POWER

FP CONN

GN D

0. 1 u _ 16 V _ Y 5 V _ 04

G

MINI CARD

.

3G/MSATA

+

WLAN, 3G, Mini PCIE

G ND

Schematic Diagrams

USB, Fan, TP, FP, Multi-Conn
USB Charge PORT

CCD
U SB VCC 0 1

V DD 5
17

V DD3

22

U S B _P N 0

22

U S B _P P 0

2
D M_ O

R 41 7
*1 0 K _ 0 4

3 4 , 35 , 3 6 D D _O N
V DD 5
U S B _A C _ I N R 7 40

U S B_ AC_ IN
D

34

* 10 K _ 0 4 6

R7 4 1

* 10 K _ 0 4 7

Q 25
* MT N 7 0 0 2Z H S 3

C 3 49

U S B _P P 0 _ R

* 0 . 1u _ 1 6V _ Y 5V _ 0 4

5 V _ CC D
U 2

I L I M0

C TL 1

I L I M1

C TL 2

N C

C 14

V DD3

GN D

E N /DS C

16

R 73 6

* 15 K _ 1 %_ 0 4

15

R 73 8

* 10 K _ 0 4

3 .3 V

R 7 39
* 1 0K _ 0 4

R 74 2
1 0 K _0 4

9

34

13
C TL 3

G _O C # 0 1

R 4 37

F A U L T#

*T P S 2 54 0

G

A C _I N #

U S B _P N 0 _R

10
14

8

*1 0 K _0 4

*0 _ 04

C1 3

1
VIN
VIN

48 mil

1A

V OU T
C1 0

3

R 22

C1 2

C1 1

1 0 0K _0 4

0. 1 u _ 16 V _ Y 5 V _ 0 4

1 u_ 6 . 3 V _Y 5 V _0 4

2
EN

G ND

J _ CCD 1

Port 5

CC D_ E N

From KBC default HI

U S B _ OC #0 1 2 2

1u _ 6 . 3V _Y 5V _0 4

G 5 24 3 A

22
22
34

1
2
3
4
5

U S B _ P N5
USB _ P P5
CCD _ DE T #

To So uth Bridge OC P in.

U15 & AU2 ? ? ? ? ?

8 5 20 5 -0 50 0 1

M_PQFP16
S

3 4, 4 2

R7 3 7

11
D P_ IN

I L I M _S E L
* 10 K _ 0 4 5

1A

5V

4
5

DM _ IN

D P_ O
4
R7 4 3

0_ 0 4
0_ 0 4

O UT

3

V DD 5

R 43 5
R 43 6

12

PPAD

IN

1 u _6 . 3 V _ Y 5V _0 4

U1 5
1

U S B _ P N0 _ R
USB _ P P0 _ R

1 u _6 . 3 V _ Y 5 V _0 4

C 4 89
* 10 u _ 10 V _ Y 5 V _ 0 8

? ?? ?? ?? ??
U S B _P N 0
U S B _P P 0

CT L2
CT L2
CT L2

CT L3: 0
CT L3: 1
CT L3: X

X
1
1

1 --- -- > De dicat ed Ch ar ging Po t, Au to- de tec t
1- --- -> Ch arg ing Do wn str e am Por t , BC Sp ecif icatio n 1.1
0 --- -- > Sta nda rd Do wn str e am Por t , USB 2.0 M od e

TPM 1.2

R 39 6
U SB VCC 0 1

USB_AC_IN

3 .3 VS

* 10 K _ 0 4
5V

U6
5

G_ OC # 01

MODEL

FUNCTION

6

AC/DC

H

2
V IN1
V IN2

1 0 u_ 1 0 V _ Y 5 V _ 08

L

C 7 54

0. 1 u _ 16 V _ Y 5 V _ 0 4

2 2 u _6 . 3 V _ X5 R _0 8

22

60 mil

D D _ ON #

1 8, 3 4
3 , 1 2, 2 2
1 8, 3 4
20

U S B _ V C C 0 1 _0

L 13

.
*1 0 0u _ 6. 3V _ B _ A

C 69 1

PCL K _ T PM
22
16
27
15
28

2 2 u _6 . 3 V _ X 5R _0 8 2 2 u _6 . 3 V _ X5 R _0 8

TP M _ B A D D

0. 1 u _ 16 V _ Y 5 V _ 0 4

100 MIL
1

L 14
C 35 3

C 3 42

C 3 52

C 35 1

0 . 1 u _1 6 V _ Y 5 V _ 04

*2 2u _ 1 0V _ Y 5V _ 0 8

* 0. 1u _ 1 6V _ Y 5V _ 0 4

* 0. 1 u _ 16 V _ Y 5 V _ 0 4

L AD
L AD
L AD
L AD

0
1
2
3

L C LK

L P C _ F R A ME #
P L T _R S T #
S E R IRQ
P M _C LK R U N #

C1 7 7

Port 0

TP M _ P P

V+

U S B _P N 0 _R

1

2

U S B _ P N_ 0

2

U S B _P P 0_ R

4

3

U SB_ PP_ 0

3

D A TA _L

G ND

9/6 EMC DVT request
? ? ? OK, PVT? ? short?

C 1 07 7 0 -10 4 A 3
P IN G N D3 ~ 4 = G N D

G ND3
G ND4

C 3 79

C 3 78

C 32 0

*0 . 1 u_ 1 6 V _Y 5 V _0 4

*0 . 1u _ 1 6V _Y 5V _0 4

* 0. 1u _ 16 V _ Y 5 V _ 0 4

* 1u _ 16 V _ X 5 R _ 06

3 .3 VS
5

L F R A ME #
L R ESET #
S E RIRQ
C L K RU N#

VS B
C3 2 3
*0 . 1 u _1 6 V _ Y 5 V _ 04

L P C P D#

6
2

GP I O
GP I O 2

T ES T B I/B AD D

7

T P M3 0 0 4
T P M3 0 0 5

13

XTAL I

14

XTAL O

X TA L O
N C_ 1
N C_ 2
N C_ 3

GN
GN
GN
GN

4
11
18
25

D_ 1
D_ 2
D_ 3
D_ 4

*S L B 9 63 5 T T

Ass ert ed befor e ent ering S3
LPC res et ti ming:
LPCPD# inac tive to LRS T# inact ive 32~96us
HI: ACCESS
LOW: NORM AL ( I nte rnal PD)
HI: 4 E/ 4F H
TPM _BADD LOW: 2E/ 2F H

CLICK CONN
5 VS

10
9
8
7
6
5
4
3
2
1

C2 8 9
T P _ CL K
T P _ DA T A

R 1 90

1 0K _ 0 4

10 K _ 0 4

R2 5 8

* 10 K _ 0 4

TP M _ B A D D

R2 5 9

* 10 K _ 0 4

R2 6 4

* 10 K _ 0 4

U S B _ P N 4_ T P 2
U S B _ P P 4 _ TP 2

T P _ CL K
T P _ DA T A
T P B U TT O N _ L
T P B U TT O N _ R

T P _ CL K
T P _ DA T A
C 2 88

4 7p _ 50 V _ N P O_ 04

47 p _ 50 V _ N P O _ 04

* 85 2 0 1-0 6 0 51

8 5 20 1 -1 00 5 1

K20100125

For W150HNM

K20100125

For W140HN
CSW1~2

U S B _P N 4 2 2
U S B _P P 4 2 2

1
3

SW 2
* TJ G-5 3 3 -S -T / R

5
6

0_04
0_04

LIFT
KEY
2
4

TP B U T TO N _ L

2
1

4
3
1
3

SW 3
*T JG -5 33 -S -T / R

5
6

?? ?? ?? ???
U S B _P N 4 _T P 2 R 6 6 0
U S B _P P 4_ T P 2 R 6 6 1

FOR POWER SWITCH BOARD

* 1 0u _ 10 V _ Y 5V _ 0 8

C2 9 0

RIGHT
KEY
2
4

X5
4
3

*3 2 . 7 68 K H z
1
2

C 3 93

C 39 2

* 1 8p _ 5 0V _ N P O_ 0 4

* 18 p _ 50 V _ N P O _ 04

R2 3 2
P CL K _ T P M

C 32 1
P C L K _ TP M 1

*3 3 _0 4

D 32
1

3. 3 V S
1
2
3
4
5
6

*3 2 . 7 68 K H z
1
2

* 10 p _ 50 V _ N P O _ 04

D02 CHANGE

C 2 86
R1 9 1

0 . 1 u_ 1 6V _Y 5V _0 4

J_ T P 1

X6
4
3

3. 3 V S
TP M _ P P

5V S
J _ TP 2

Sheet 28 of 49
USB, Fan, TP, FP,
Multi-Conn

XTAL I
PP

TPM _PP

5 VS

C3 2 2

TPM

T ESTI
GN D 3
GN D 4

10
19
24

V DD 1
V DD 2
V DD 3

8

D A TA _H
4

W C M 2 01 2 F 2 S -16 1 T 03

9

T P M 30 0 1 1
T P M 30 0 2 3
T P M 30 0 3 12

J _ USB 1

GN D 1
G ND 2

C 6 88

G ND1
GN D 2

5V

100 MIL

26
23
20
17

0
1
2
3

2 0 S 4 _ S TA T E #

H C B 1 60 8 K F -1 21 T 2 5 + C 2 3 9
U S B V C C 01

L PC_ A D
L PC_ A D
L PC_ A D
L PC_ A D

21

G ND

R T 9 7 15 B G S
3 5 ,3 8

U S B V CC 0 1

18 , 3 4
18 , 3 4
18 , 3 4
18 , 3 4

1
E N#

Discharge

C5 0 8

8
VO UT 3

4

Battery

7
VO UT 2

3

Charge

U2 4

F L G# V O U T 1

50 mil
C 11 2

T P B U T T ON _ R

34
34

* V 1 5A V LC 0 40 2
2

J _S W 1
1
2
3
4
5
6
7
8
9
10
11
12

R 39 9

S MC _ B A T 3 4 , 42
S MD _ B A T 3 4 , 42

* 1 K _0 4
M_ B T N # 3 5

3 .3 VS
W L A N _S W # 3 4

W LA N _ E N _ R

MU TE _S W # 3 4
L I D _ S W # 1 1, 3 4

R 78
R 79

* 0 _0 4
0_04

W L A N _E N 2 7 , 34

V D D3
C C D _S W # 3 4

W140HN R78
W150HNM R79

8 7 1 51 -1 2 07 G

35 , 3 6
V D D5
1 1 , 1 8, 2 4 , 2 5, 2 7 , 3 1, 3 2 , 3 3, 3 5 , 3 9, 4 0 , 4 1 5V S
2 5 , 27 , 2 9 , 35 , 3 7 , 3 8 5 V
1 8, 2 7 , 3 0, 3 4 , 3 5, 3 6 , 4 2 V D D 3
2 , 3, 8 , 1 1 , 12 , 1 6 , 18 , 1 9 , 20 , 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 9, 3 0 , 3 3, 3 5 , 3 7, 3 8 , 3 9 3. 3 V
3, 9 , 1 0 , 11 , 1 2 , 18 , 1 9 , 20 , 2 1 , 22 , 2 3 , 2 4, 2 5 , 2 7, 2 9 , 3 0, 3 1 , 3 2, 3 3 , 3 4, 3 5 , 3 9 3. 3 V S

USB, Fan, TP, FP, Multi-Conn B - 29

B.Schematic Diagrams

CT L1
CT L1
CT L1

3 .3 V

Schematic Diagrams

USB 3.0
1. 05
V_N EC

R283
10K_04

uPD72020
0

V
5

USBVCC .30

R347

*2N700
2W

0_
04

8
1

S

B - 30 USB 3.0

V IA EN# R 347 ? ? ?

C535

C636

EN
1 GND

C72
5
u_6.3V_Y5V_04
1

VFB 2

AX 6615
C42
7
0u_10V_Y5V_
1
08

75
0_1%_04

C548

C762

1.05VS_VE801
C764
C 76
5
C766
C767
C6
78
*0.1u_16
V_Y V
5_04 *0. 1
u_16V_Y5V_0
4 *0. 1u_
16V_Y5V_04 *0.1u_16
V_Y5V_04 *0.1u_16V_Y5V_
04

C769
C770
C 77
1
C772
C773
*0
. 1u_
16V_Y5V_04 *0.1u_16
V_Y V
5_04 *0. 1
u_16V_Y5V_0
4 *0. 1u_
16V_Y5V_04 *0.1u_16
V_Y5V_04

R405

C358

+

C356

R540
PR122

*15mli _
shor t

L24

HC B16
08KF- 2
11T25

CLOS E TO C ONNEC TOR
G_DM0

*0_
04
0_04
*0_
04
0_04
*0_
04

G_DP0
G_DM1
G_DP1

SSTX1_
N EC R 65
1
TXP_
0VI A
R 45
3
SSTX1#
_NEC R 65
2
TS
XT
N0_V
45
5
S
X2_
NIAEC R
R 65
3
TXP_
1VI A
R 45
7
S
X2#
_IA
NEC R 66
2
TS
XT
N1_V
R 45
8
SSRX1_NEC R 66
8
RXP0_VIA
R 66
45
9
SSRX1#_NEC R
9
RXN0_VIA
R 46
2
S
2_N
R 46
67
0
RS
XR
PX
1_V
IAEC R
3
SSRX2#_NEC R 67
1
RXN1_VIA
R 46
4

0_04
*0_
04
0_04
*0_
04
0_04
*0_
04
0_04
*0_
04
0_04
*0_
04
0_04
*0_
04
0_04
*0_
04
0_04
*0_
04

TXP0

XP1
T
C524
XN1
T
C520
G_DM1
1
*W
CM20
12F
2S
G
_DP
1-161T03-short 4
RXP1
1
*W
CM20
12F
2S-161T03-short 4
R
XN1
Di f .f t race90oh m

6
65
64
3
6
62
61
60
59
*20p_5
0V_NPO 0
_4

RXP0

GND

USBVCC 3
.0

RXN0
RXP1

L25

3.3VS_VL801

R443
*10K_0
4

J_USB3

0
. 1u_
10V_X7R_04 X
TP1_R
0
. 1u_
10V_X7R_04 T
XN1_R
2
3
3 L6
2
4
3 L6

TXN0
TXP1
TXN1

22u_6.3V_X5R_08
GND
22u_6.3V_X5R_08
GND
0. 1u_
16V_Y5V_04
GND
*220u_
6. 3V_
6. 3*6. 3*4. 2GND

HC B16
08KF- 2
11T25

9
1
8
2
4
3
6
7
5

SSTX+ SHI ELD GND1
VS
BTX
USS
DGND
DS
+RX+
S
GND_D
GND2
SSRX- SHI ELD

UEA111R
C- C141
F -809
H GND
6 -21
-B 4A1
0-1
C692
22u_6.3V_X5R_08
GND
C746
22u_6.3V_X5R_08
GND
C395
0. 1u_
16V_Y5V_04
GND
C538
*220u_
6. 3V_
6. 3*6. 3*4. 2
GND
8/ 19
J_USB2

CLOS E TO C ONNEC TOR

8 UV48
DD

SPISI

3

SPISO
SPISCS#
SPISCLK

SI 5
2
SO
1
C E#
6
SC K
7 H OLD# VS S 4
*MX25L51
2MC -12G
6 -0 4-2 5512- B 72
WP#

XP0
T
C420
XN0
T
C421
G_DM0
4
*W
CM20
12F
2S
G
_DP
0-161T03-short 1
RXP0
4
*W
CM20
12F2S-161T03-short
RXN0
1

0
. 1u_
10V_X7R_04 X
TP0_R
0
. 1u_
10V_X7R_04 T
XN0_R
3
5
2 L6
3
L6
6
2
GND

9
1
8
2
4
3
6
7
5

GND1
SSTX+ SHI ELD
VBUS
SSTXDG
DN
+D
SSRX+
GND2
GND_D
SSRX- SHI ELD

C19007090
5- 0-0
L 09 GND
6 -21
-B94A1
6 -21 -B 4A0 0-0 09

USB_ON1#
SPISO
SPISI
S
L
SP
PIIS
SC
CK
S#
GPCI E_RXN1_USB3_RC759
GPCI E_RXP1_USB3_RC635

*N C_0
4
*6. 04
K_1%
_04
TXP1_VA
I
TXN1_VIA
RXP1_VI A
RXN 1
_VI A

C
19
CLK
LK_P
_PC
CIE
IE_U
_US
SB
B30#_V
30_VLILI19

3.3VS_VI A

G

OC PPE#

1
2

22,27, 3
0, 34BU F_PT
L_RST#

D31
C
R456

C
* DBU003
40
A

G

PEX
C PPE#
C577 *1u_10
V_Y5V_06
R454

R666
*0_0
4

*1
00K_04 3. 3V_
VI A
L54
*HCB1608
KF- 121
T25

1.05VS_VIA
PJ36
1

OPEN_2A

2
O PEN_2
A

1.05VS_VE
PEXCPPE# R444

1.05V_NEC
PJ3
7

1.05VS_VI A

G

AL801_
R ST
#

O PEN_2
A
1.05VS

3. V
3S_VL801

Q3
5
*AO3415

*100K_
04

3.3VS_VIA

52
1 PJ3

1

4 R496
*10
K_04
U11
*MC74VHC1G08DFT2G

1 PJ39 2
3.3V_VI A

R665
*0_0
4

3.3V_VIA

Q1
4
*AO3415
3.3VS

42
1 PJ3

1. 0
5V

*3.01K_1%
_04

3. V
3S_VL801
1. 5
0VS_VL801

PEXCPPE#

USB3.0 POWER SETTING
3.3V_NEC

PCIE_RXN1_USB30_VLI 19
PCIE_RXP1_USB30_VLI 19

Q3
4
*AO3415

23

34VI A_RST#

3. 3
V

*0.1u_10V_
X7R_04
*0.1u_10V_
X7R_04

PCI E_T
XN1_USB30_VLI 19
PCI E_T
XP1_USB30_VLI 19

PEXREXT R438

G_D P1
_VI A
G_D M1_
VI A

OPEN_2A
RXN1

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23

D

USBVC C3.0

C752
C498
C525

3.3V_VI A

C32
7

C700
R 44
0
C747

Di f .f t race90oh m
UG ND

X17
2
1
3
4
G ND
*X8A02500
0FG1H _
25MHz
2
1
X9
*X8A025
000FG1H_25MHz

VS
3
USB
HUPS
E#
2
USBH PE#
3
USBHSP
PS
#
4
IEO
SPI SI
SPISCLK
SPC
IVS
D#
D
VCCA33PEXT
X
P
E
X
T
X
0PEXTX0
+
VCC A3PEXM
PEXRX0PEXRX0
+
VCC A33
PEXRX
PEXCLKC
K
L+
VCCA P
3E
RX
EG1
2
PEX
R EX
T
VCCA 3REV
G2
5
DD

U 38
*V L 80 1_ Q N F8 8 _A 1
VL80 0 4PORT
VL80 1 2PORT

6-03- 00801 -031

GND

*20p_5
0V_NPO 0
_4

USB3.0 VLI ROM
? ?? ?

V
SD
SD
X
T1+
SSX
T1V
SC
SC
RA
X10S
1
+ SRX1
SSRX1
VCCA33SS1
U
US
SB
BH
HP
P1+
1VCCA33SS1
S
S
X
T
2+
SSX
T2VCCA10SSRX2
SSRX2
+
SSRX2
VCCA33SS2
USBHP2+
U
SC
BA
H33S
P2- S2
VC
VCCA10SSM
S
X
SS
SIO
X

R
411
*1
M_
04

USB3.0 Port

0_04
*0_
04
0_04

R
P
A
RX
X
N0_V
_
0VII A

SSXI
SSXO
3. 3
VS V
_L801

C297

R
3
R 54
27
1
R 54
4
R 27
3
R 64
6
R 27
6
R 64
7
R 28
1

TXP0_VA
I
TXN0_VI A

G_
D
P0_
VI IA
A
G_
DM
0_V

1. 6
K1
_%_
04

U2DM1_NEC
G_DM0_VI A
U2DP1_NEC
G_DP0_VA
I
U2DM2_NEC
G_DM1_VI A
U
G2D
_DP
P2_N
1_VE
A
IC

1. 5
0VS_VE801

C707
0.1u_16V_Y5V_
04

C704

67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88

C6
73

2
OPEN 2
_A

(15nF~48nF)
C72
1

C761

.

PJ45

U1
_0V_0810u_1
0V_Y5V_08
0.022u_1
6V_X7R_04 *10

C 71
8

C 76
0

1. 0
5VS_VE
55
L

1.05VS_VIA *HC B1
608KF- 1
21T25

3A
1

R 39
0

C657

*0
. 1u_
16V_Y5V_04 *0.1u_16
V_Y V
5_04 *0. 1
u_16V_Y5V_0
4 *0. 1u_
16V_Y5V_04 *0.1u_16
V_Y5V_04 *0.1u_16V_Y5V_
04

1. 05
V

1u
_10V_Y5V_06

6

VOUT 4
VOUT 3

*10K_0
4

C3
51
47
6
4
45

C519

58
57
5
6
55
54
3
5
52
51
50
49
48

C 62
3

S

VCNTL

8

SSTX_
1NEC
SSTX#
1_NEC
U2DM1_NEC
U2DP1_NEC
SSRX1_NEC
SSRX1#_
N EC

C626

*0
. 1u_
16V_Y5V_04 *0.1u_16
V_Y V
5_04 *0. 1
u_16V_Y5V_0
4 *0. 1u_
16V_Y5V_04 *0.1u_16
V_Y5V_04 *0.1u_16V_Y5V_
04

S

5 U36
VIN
9 V
IN
7 POK

R345

*10K_04 10K_04

R441

3.3V_VIA

*10K_0
4
*10K_0
4
*20mi _
l P_04 USB30_OC

D

R77
5
PPON

G_OC_14#

*10K_0
4
*10K_0
4
*10K_0
4
*10K_0
4
*10K
4
*10K_0
_0
4

3.3V_VI A
C758

FOR VIA

C471

R483
R439
R445

VSUSUSB
SC
SC
REA
X33
TSSM
V
SSTX3+
SSTX3VC CA10SSRX3
SSRX3+
SSRX3V CCA33SS3
USBH P3
+
USBHP3VC
G
NCA
D33SS3
SSTX4+
SSTX4VC CA10SSRX4
SSRX4+
SSRX4V
C
C
A
33S
S4
20 USBH P4
+
1 USBHP42
22
VCCA33SS4
G1
G1

USB30_OC

5V

2A

R404
R337
R447
R481
R
R482
495

GPA
OG
3CK
JT
PEXCPPE#
G_OC_23#

1
2
3
4
5
6
7
8
9
10
1
12
13
4
1
15
16
17
18
19

1. 5V

5V

V
T
VIIA
A_S
_SMD
MCA
LK
VIA_SMI#
LOPW
R EN#
RMTWKEN#

VDD
D3
VSV
UDS
TESTEN
SMDAT
SMCLK
PEXRST#
PEXW
AKE#
S MI#
LOPWREN#
RMTWKEN#
O3
3
VSG
UPS
VDD
JTAGCK
PEXC PPE#
USBH OC1#
USBHOC #
2
U SBHOC3#
USBH OC4#
USBHPE1#
VSUS33

. 1u_
0
10V_X5R_04

0. 01u
_16V_X7R_04

3. 3V_VIA

6- 04- 255 12- 47 1

? ? ? ? P IN6 ? <2m m

FOR VIA

? ? ?? ? ? ?
C377

10
0K_04

D
Q38
PPON G

47_04 USB_SPI _SI

15_1%_04 USB_SPI_SO
15_1%_04USB_SPI C
_ E#
_C LK
47_
04 USB_SPI S
6- 04- 255 12- B7 2

1.05VS_VL80
1

50 M IL
6
7

220
u_6. 3
V_6. 3
* 6.3*4.2

*10
K_04
USB_ON1#

U6
2
5 FLG# VO UT1
2 VI N1 VO UT2
3
VI N2 VO UT3
4
EN#
GND
R9
T715BGS

0. 1u
_16V_Y5V_0
4

C373
10u_10
V_Y5V_08

*0.1u_16
V_Y5V_04

R374

0.1u_10
V_X5R_04

p_50V_NPO_04
5

U2AVDD33

D7

P13
P14
GN D P11
GN D P9
GN D P7
GN D P
2
GN
ND
D P1
G
N13
GN D N
9
GN D N7
GN D N3
GN D M13
GN D M
12
GN
ND
D M11
G
M10
GN D M
9
M8
G
GN
ND
D M
7
GN D M6
GN D M5
G
GN
ND
D M4
M3
GN D L12
L11
G
GN
ND
D L7
GN D L6
GN D

USB30_
OC
3. 3V

I SI _R R389
5 USB_SP_
SI
2
USB_SP_
I SO_R R421
SO
I CE#_R R359
CE# 1 USB_SP_
6 USB_SP_
I SCLK_R R360

SCK
4.7K_04USB_HOLD#7 HOLD# VSS 4
MX25L51
2MC 1
- 2G

USB3.0 NEC core power 1.05V
USB3.0 VIA core power 1.05VS_VIA

U GND

GND
GN
ND
D
G
GND
GND
GND
GND
GND
G
GN
ND
D
GND
GN
ND
D
G
GND
GND
G
GN
ND
D
GND
G
GN
ND
D
GND
GND
GND

. 3V
3

8 U37
VDD

1K_04 USB_FL
AS H3 W
P#

R469

. 1u_
0
16V_Y5V_04 2.4K_1%_04

GND

?? ? ?

R44
2
*4. 7K_0
4
AL80
1_RST#

7K_04
4

R423

*20
m_
li P_04

5

C422

SSTX#
2_NEC
U2DM2_NEC
U2DP2_NEC
SSRX2_NEC
SSRX2#_
N EC

R33
3

R44
6

18 USB3.0_SMI #
CH
IPSET?? PULLHIGH
20, 2
7, 30 PCIE_WAKE#

3

C423

C4
52

S

24
. 000
M Hz/ 16pF/ + 0
3ppm
1

A2
1
A
A3
A5
4
A
A7
A9
A13
11
A
A14
B4
3
B
B5
B7
B9
B11
B13
B14
C1
C2
C3
C10
C11

3. V
3A

512Kbit

C552 C499

SSTX_
2NEC

P12
R REF N12 R424
U2AVSS
N11
U2PVSS
D6
U3AVSS

C12 GND
C13
D 3 GND
D4 GND
D11 GND
D2
1 GND
D13 GND
D14 G
GN
NDD
E
E1
2 GND
E13 GND
E14 GND
F4 GND
F6 G
ND
F7 GND
F8 GND
F9 GND
F11 G
GN
NDD
F1
2
G1 GND
G2 GN
GNDD
G67 GND
G
G8 G
ND
G9 GND
G 1 GND
G12 GND
G13 G
GN
NDD
H7
6 GND
H
H8 G
GN
NDD
9 GND
HH2
1
J3 G
ND
J4 GND
J6 GND
J7 GND
J8 GND
G
ND
9 GN
J
D
J11
J12 G
GN
NDD
K4
3 GND
K
L1 GN
GNDD
L2 GND
L3
L4 GND
GND

8
X
2

20p_5
0V_NPO 0
_4

*21
4MHZ

20p_5
0V_NPO 0
_4

7
2X

C755

VSUSUSB
SSR EXT

uPD72 0200

N
14 XT
1
M14
XT
2
P6 CSEL

R471
100_0
4

U3AVDD33

P3

L1
3
L14

N4
N5
N6

VDD33
VDD33
VDD33
VDD 3
VDD33
V
VD
DD
D33
3

C4
V
VD
DD10
D10 C5
VDD10 C
C67
V
VD
DD10
D10 D5
C8
VDD10 C9
V
VD
DD
D10
0
1 D8
VDD10 D9
VD D10 E3
VDD10 E4
E11
VD D10 E
12
VDD 0
1
H3
VDD10 H4
VDD 0
1 5
VDD10 L
VD D10 H11
K12
11
VDD10 K
VD
DD10
V
D10 L8

B10
U3TXDP1
A10
U3TXDN1 N10
U2DM1
U2DP1 P10
U3RXDP1 B12
U3RXDN1 A12

*NC_04
C 46
2
0.1u_16V_
Y 5V_
04
USB_SPI_VDD _
1

0. 1"~ 0.5 "

+

A

C14

0.1u_1
0V_X5R_04

0.01u_1
6V_X7R_04

. 1u_
0
10V_X5R_04

C553

KBC _S PI_ *_R =

Standard-A

C

PONRSTB

C490

*0
. 1u_
16V_Y5V_04 *0.1u_16
V_Y V
5_04 *0. 1
u_16V_Y5V_0
4 *0. 1u_
16V_Y5V_04 *0.1u_16
V_Y5V_04 *0.1u_16V_Y5V_
04

C551

G14
OCI 2B H13
OCI 1B
PPON2 H14
PPON1 J14

AUXDET
PSEL
SMIB

C 75
7

NC 4

3. V
3S

P
SK
TB
PE
ER
W
A
EB
PECREQB

*0_04

USB30
_XT1

3. V
3A

C717

B6
U3TXDP2
U3TXDN2 A
N6
8
U2DM2
P8
U2DP2 B8
U3RXDP2
U3RXDN2 A8

K13
K14 GND
J13 GND
ND
P4 G
GND
AU D
X ET_
R R398

0.01u_1
6V_X7R_04

C541

0.01u_16
V_X7R_04

0. 1
0u_16V_X7
R0
_4

0. 01
u_16V_X7R_0
4

0.01u_1
6V_X7R_04

0. 01
u_16V_X7R_0
4

. 01u_
0
16V_X7R_04

0.01u_1
6V_X7R_04

C549

C756

.

B.Schematic Diagrams

C527 C 72
0

USB_SPI S
_C L
K M2
N2 SPS
ICK
U
_
US
SB
B_S
_SP
PII C
S
_I E# N1 SPC
IS B
USB_SPI S
_O M1 S
SP
PS
S
I
II O

C429
1u_25
V_08

D02 CHANGE

C425

B
B2
1 PECLKP
PECLKN
D1
2 PETP
X
D
PETN
X
F2
F1 PERXP
PERXN

H2
0_0
4 PEWAKE K1
0_0
4
K2
0_0
4 AU D
X ET
_R J2
J1
10K_
04
H1

R349
680K_1
%_0
4

D02 CHANGE
DEL

C539

C633

+

0. 1
u_10V_X5
R0
_4
0. 1
u_10V_X5
R0
_4

P5

Sheet 29 of 49
USB 3.0

C674

For U SB3 .0 Leg ac y
To PC H G PIO 13

3. V
3_NEC

Standard-A

C2
36
C0
75

D10
VD D33 F
13
VDD33 F14
VDD33
F3
VDD 3 G3
VDD33 G4
VDD33
9
VDD33 L
L10

S

*MTN7002ZHS3

0. 1u_
16V_Y5V_04

U9
3

22, 7
2, 30
, 34 BUF_PLT
_RS #
T
R6
48
20,27, 3
0 PC E
I _W
AK E#
R4
33
19 USB30_CLKREQ#_NEC
AUXDE T R 2
46
R0
48
3.3V
18 USB3.0_SMI #
3.3V_NEC

D18
RB751V

C709

C 54
6

19 CLK_PCI EU
_ SB3
0_NEC
19 CLK_PCIE _
U SB3
0#_NEC
19 PCI E_RXP2_USB30
_N EC
19 PCI E_RXN2_USB30_
N EC
19 PCI ET
_XP2_USB30_NEC
19 PCI ET
_XN2_USB30_NEC

0. 1
0u_16V_X7
R0
_4

D

AUXDET

Q42

G

6, 20,34,35 SUSB#

C472
0.01u_16
V_X7R_04

0.1u_10V_
X5R_04

0. 01
u_16V_X7R_0
4

R467
10K_0
4

C609 C 55
4

D02 CHANGE

3.3V_VI A

USB3.0 NEC ROM

3.3V_NEC

0.1u_10V_
X5R _
04

C509
. 3V_NEC
3

VLI VL8 01 U SB3.0

C716 C723 C470

.

D

3. 3VA L40
HC B1
608KF- 1
21T253. 3V_NEC

2

1.0 5VS

3 .3V S

3 .3V

O FF

ON

*20mi _
l P_0
4

I CPPE# 23,34

OPEN_2A
S3

O FF

25
, 27,28,35, 7
3, 38 V
5
6,18,19, 0
2, 24
, 25,35,37, 8
3, 39 1
. 05VS
,, 18,
,, 24,
2
,, 33,
3
.3
3,9, 2,
10,,3
18,
1,1
11,
2,1
12,
8, 16
19
20,1
29,
1,2
20,
2, 2
3
2,, 23
24
25,2
25,
7,2
27,
8, 8
0
3,, 30
31
32,3
35,
3,3
37,
4, 8
5
3,, 39
39 3
. 3V
3VS
, 6,8, ,910,25,35, 7
3
3, 38 1
. 5V

1. 05
VS V
_L801

Schematic Diagrams

Card Reader (JMC251C)
S D_ CL K

JMC251 C

Sw it ch in g Reg ul at or
C 2 65

near Pin#41

cl os e to P IN3 3

* 1 0p _ 5 0V _ N P O_ 0 6

3 .3 VS

SD_ CL K

R1 6 2

0 _ 04

S D_ CD #
M S _ INS #

S D XC _ P OW E R

* 0 . 1u _ 1 6V _ Y 5V _0 4

C2 6 1
2. 2 u _ 6. 3 V _ X 5 R _ 0 6

3 . 3V _L A N
M S _ INS #
U 12

Card Reader Pull High/Low
Resistors

R 14 6

32
* 15 m i _l s h ort _ 0 6 3 2

LA N _ MD I P 0
LA N _ MD I N 0

32
32

LA N _ MD I P 1
LA N _ MD I N 1

32
32

3. 3 V _ L A N
LA N _ MD I P 2
LA N _ MD I N 2

32
32

LA N _ MD I P 3
LA N _ MD I N 3

* 15 m i _l s h ort _ 0 6

V DD 3

3 .3 V S

( >20 mi l)

J M C 2 5 1-L G B Z 0 C

(> 20 mi l)

C2 9 9

C2 9 6

10 u _ 6. 3 V _ X 5 R _ 06
Pin#32

LA N _ MD I P 2
LA N _ MD I N 2
A V D D 1 2_ 6 2
LA N _ MD I P 3
LA N _ MD I N 3

MD I O1 0
MD I O9
MD I O8
VDD
VIP _ 1
VIN_ 1
A V DD 1 2
VIP _ 2
VIN_ 2
GN D
A V DD 3 3
VIP _ 3
VIN_ 3
A V DD 1 2
VIP _ 4
VIN_ 4

0 . 1 u_ 1 6 V _ Y 5 V _ 04
Pin#32

JMC251 C

C 28 7

C 2 85

1 0 u _6 . 3 V _ X5 R _0 6
Pin#31

0 . 1 u _1 6 V _ Y 5 V _ 0 4
Pin#31

R 19 4

*4 . 7K _0 4

*4 . 7 K _ 0 4

(LQFP 64 )

RE X T _ C

R 15 4

3 .3 V

V D DR E G
V C C3 V
P W RC R
T EST
M PD
W AK EN
L A N_ L E D2
C R_ L E D
R ST N
CP P E N
GN D
V DD IO
MD I O6
M D I O 12
M D I O 14
C R_ CD 0 N

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

R1 8 3

*1 5 m li _ s ho rt _ 0 6

*0 _ 06

GN D

* A T2 4 C 0 2 B N

(> 20 mi l)

3. 3 V S
V C C _C A R D
MP D
P ME #
LA N _ S C L
LA N _ S D A

3. 3 V S V D D 3
B U F _ P L T_ R S T# 2 2 , 2 7, 2 9 , 3 4

CPP EN

MP D

3. 3 V _ L A N

R1 9 5

1 0 K _ 04

R1 9 6
C 28 3

* 4. 7 K _ 0 4

Core power 1.2V

0. 1 u _ 16 V _ Y 5V _ 0 4

V DD 3

? ? ? ? PIN6? <2mm

C2 7 5

R 4 78
* 0_ 0 6

C7 1 4
*1 u _ 6. 3 V _ X 5 R _ 04

V D D3
I S O N _ 2 5 1C

R1 5 1

0 _0 4

R1 5 6

* 10 0 K _ 0 4

6
D V DD

1A

V CN T L

4

R 4 80

VIN
VIN
P OK

V OU T

3

R1 7 6

* 0 _0 4

R1 7 7

0_04

R2 0 9
*0 _ 0 6

U 33

P CI e Dif fe re nt ia l
P ai rs = 10 0 Oh m

R1 7 0
D V DD

R1 6 9
D V DD

3 . 3V _L A N

3. 3V

V D D3

V OU T

*1 . 2 7 K _ 1% _ 0 4

3 .3 V

R 14 8

*0 _ 06

R 16 4

*0 _ 06

5
9
7

IN_ C

8

Sheet 30 of 49
Card Reader
(JMC251C)

EN
2

A V D D 1 2 _ 13

1
2
3

A0
A1
A2

(> 20 mi l)

V D DR E G

S D_ W P
MD I O1 2
MD I O1 4
S D_ CD #

WP

S CL
S DA

4
R1 8 2

3 .3 V_ L AN

C2 6 6

7

6
5

L AN_ SC L
L AN_ SD A

1 2 K _1 % _ 04
A V D D1 2 _ 7

U1 7
V CC

6-03-02510-0P0

RE X T
AV D D3 3
XIN
XO UT
CL K N
C LK P
A V DD 1 2
R XP
RX N
G ND
TXN
TX P
A V DD 1 2
M D I O1 3
M DIO 7
C R_ CD 1 N

R 14 5

DVD D

A V D D 1 2_ 5 5

49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

R 1 93

1
VFB

V DD 3

G ND

C7 2 2
R 47 9
* 8 2p _ 5 0V _ N P O_ 0 4
*2 . 4 9 K _1 % _ 04

C 7 26

*AX6615

* 1 u_ 6 . 3 V _X 5 R _ 0 4

MS _ I N S #
3 . 3 V _L A N

0. 1 u _ 16 V _ Y 5 V _ 0 4
Pin#7

A V D D 1 2 _ 52

A V D D 1 2 _ 55

C2 5 6

P C I E _R X P _4 _ GL A N C 2 7 2
P C I E _R X N _ 4 _G L A N C 2 7 0

0. 1 u _ 1 6V _ Y 5V _ 0 4
Pin#13

A V DD1 2 _ 6 2

C2 5 5

0 . 1 u _1 0 V _ X 7R _ 04
0 . 1 u _1 0 V _ X 7R _ 04

P C I E _ R X P 4 _ GL A N 1 9
P C I E _ R XN 4_ G LA N 1 9

R 18 0
1 0 K _ 04
D9

A V D D 1 2 _7

C2 5 3

P C I E _ TX N 4 _ GL A N 1 9
P C I E _ T X P 4 _G LA N 1 9
C L K _ P C I E _ GL A N 1 9
C L K _ P C I E _ G LA N # 1 9

C 2 71

A

2 0, 2 7 , 2 9 P C I E _ W A K E #

C

P ME #

2 2 ,3 4

C D B U 0 0 3 40

L A N X OU T
0. 1 u _ 16 V _ Y 5 V _ 0 4
Pin#52

0. 1 u _ 1 6V _ Y 5V _ 0 4
Pin#55

0 . 1u _ 1 6V _ Y 5V _0 4
Pin#62

* 1 0u _ 6 . 3V _ X 5 R _ 0 6
Pin#7
Reserved

R 16 1

*1 M_ 0 4
X1

1
3 .3 V _ L A N

L A NX IN

D02 CHANGE
DEL

F S X -8 L _2 5 MH z
2

V C C_ CA R D

4 IN 1 SOCKET SD/MMC/MS/MS Pro
Card Reader
Power

Fo r JM C25 1 C

FSX8L_25MHz? ? ? ? ?
X2
C2 8 2

C 25 2

C2 8 4

C2 9 3

0. 1 u _ 16 V _ Y 5 V _ 0 4
Pin#43

* 0. 1 u _ 10 V _ Y 5 V _ 0 4
Pin#43

0 . 1u _ 1 6V _ Y 5V _0 4

0 . 1u _ 1 6V _Y 5 V _0 4

4

3

1

2

J _ C A R D -R E V 1
S D_ C D#
S D_ D 2
S D_ D 3
S D_ B S

V C C_ CA R D
3. 3 V _ L A N

V CC _ CA R D

S D _ C LK
C7 1 2

*H S X 3 21 S _ 2 5M H Z

C 28 1

C2 5 7
0 . 1u _ 1 6 V _Y 5 V _0 4

C2 6 4
2 2p _ 5 0V _ N P O_ 0 4

3 .3 V _ L A N

C 26 0
2 2 p_ 5 0 V _ N P O _0 4

* 0 . 1u _ 1 6V _ Y 5V _0 4
Pin#2

* 1 0u _ 6 . 3V _X 5 R _ 0 6
Pin#2

R6 0 0
75 _ 0 4

C2 6 2
1 0u _ 6 . 3V _ X 5 R _ 0 6
V CC _ CA R D
C5 4 4
0 . 1u _ 1 6 V _Y 5 V _0 4

C2 4 9

C2 5 4

C2 5 9

C 2 58

10 u _ 6. 3 V _ X 5 R _ 06
Pin#59
Reserved

0. 1 u _ 1 6V _ Y 5V _ 0 4
Pin#59

0 . 1u _ 1 6V _ Y 5V _0 4
Pin#2

0 . 1 u _1 6 V _ Y 5 V _ 0 4
Pin#21

Place a ll capac itors clo sed t o chip.
The subscript in each CAP incic ates t he p in
number of JM C25 1/JMC261 t hat sho uld be
closed to .

6-2 2- 25 R0 0- 1B4
6-2 2- 25 R0 0- 1B5

Crystal 8045 & 3225 Co-lay

V C C _C A R D

S D_ D 0
S D_ D 1
S D_ W P
S D _ C LK
S D_ D 3
MS _ I N S #
S D_ D 2
S D_ D 0
S D_ D 1
S D_ B S

P1
P2
P3
P4
P5
P6
P7
P8
P9
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5
P1 6
P1 7
P1 8
P1 9
P2 0
P2 1

CD _ S D
DA T 2 _ S D
CD /DAT 3 _ S D
CM D_ SD
VSS_ SD
V DD _ SD
CL K_ SD
VSS_ SD
DA T 0 _ S D
DA T 1 _ S D
W P_ SD
V S S _ MS
V C C _ MS
S CL K _ M S
D A T 3 _ MS
I N S _M S
D A T 2 _ MS
S D I O/ D A T0 _ MS
D A T 1 _ MS
B S _ MS
V S S _ MS

GN D
GN D

P2 2
P2 3

M D R 01 9 -C 0 -1 0 42
C 7 13

C 5 45

0 . 1 u _1 6 V _ Y 5 V _ 0 4

*4 . 7u _ 6 . 3 V _X 5 R _ 0 6

Near Cardreader CONN

2 5 , 2 7, 2 8 , 2 9 , 35 , 3 7 , 38 5 V
32
DVD D
1 8 , 2 7, 28 , 3 4 , 35 , 3 6 , 4 2 V D D 3
2, 3 , 8 , 1 1 , 12 , 1 6 , 1 8, 1 9 , 2 0, 2 2 , 2 3 , 24 , 2 5 , 27 , 2 8 , 2 9, 3 3 , 3 5 , 37 , 3 8 , 39 3 . 3 V
3 , 9 , 1 0, 11 , 1 2 , 18 , 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4 , 25 , 2 7 , 28 , 2 9 , 3 1, 3 2 , 3 3 , 34 , 3 5 , 39 3 . 3 V S

Card Reader (JMC251C) B - 31

B.Schematic Diagrams

* 15 m i _l s h ort _ 0 6

1
2
3
4
5
6
7
A V DD1 2 _ 7
* 15 m i _l s h ort _ 0 6 8
9
10
11
12
A V DD1 2 _ 1 3 1 3
* 15 m i _l s h ort _ 0 6 14
15
M D I O7
CR _ CD1 N
16

DVD D

MD I O1 0
MD I O9
MD I O8
A V D D 1 2_ 5 2

R 14 7

0 . 1u _ 1 6V _ Y 5V _0 4
Pin#33

L A N X IN
L A NX O UT

DVD D

C2 7 3

10 u _ 6. 3 V _ X 5 R _ 0 6
Pin#33

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

4 . 7 K _ 04

C2 7 4

8
V D D3

M D I O1 1
LA N _ L E D 0
L A N _L E D 1
I S ON
G ND
V DD IO
V D DO
M DIO 5
M D I O4
M DIO 3
M D I O2
M DIO 1
M D I O0
FB1 2
G ND
LX

R1 7 8

F or J MC 25 1C/ 26 1 on ly
R E GL X

S D_ W P

1 K_ 0 4

3 . 3 V _ LA N
S D X C _ P OW E R
SD _ CL K _ C
S D_ B S
S D _ D3
S D_ D 2
S D _ D1
S D_ D 0
D V DD

C 2 63

R1 8 1

( >2 0m il)

S W F 2 5 2 0C F -4 R 7 M- M
M D I O 11
L A N _L E D 0
L AN_ L ED1
I S O N _ 2 5 1C

V CC _ CA R D

3 . 3V _L A N

DV D D

.

*4 . 7 K _0 4
*4 . 7 K _0 4

DV D D

L16

( >2 0m il )
R E G LX

R 18 5
R 18 4

Schematic Diagrams

SATA ODD, LED, Hotkey, LID SW
Zero Power ODD

W140XX ONLY

5 VS

? ? ? ? ? J_ODD1

C 2 80

S A TA _T X P 4 _1 4 1 8
S A TA _T X N 4 _ 14 1 8

C2 7 9

1
V IN
V IN

G ND

E N

4
5

5 V S _ OD D

S A T A _ OD D _ P R S N T# 1 8 , 23

2

3

V GA _ S W #

V GA _ S W # 3 4

* R Y -S P 1 95 U H Y U Y G 4

S A TA _ O D D _ P W R GT 2 3

C 67 5

C6 7 6

C6 7 1

C 27 6

C 2 67

1 00 K _ 0 4

+

27 , 3 4

R1 6

2 20 _ 0 4

2 20 _ 04

ad d W LA N_L ED #
C9 907 13

B

BT_ EN

0. 1u _ 16 V _ Y 5 V _ 0 4
1 u _1 0 V _ Y 5 V _ 06
* 22 0 u_ 6 . 3 V _6 . 3 *4 . 2
0 . 1u _ 1 6V _ Y 5V _ 0 4
1 0 u _1 0 V _ Y 5 V _ 08

*C 1 85 5 3 -11 3 05 -L

R1 2

D 2

R1 6 7

G5 2 4 3A

S A T A _ OD D _ D A # 1 8, 2 2

2
4

W LA N _ LE D #

Q 2
D TC 1 14 E U A
E

GN GN
D1 D2

V O UT

SW 1
*T JG -5 33 -S -T / R
1
3

3

U1 3

1

*0 . 0 1 u_ 5 0V _ X 7 R _ 0 4

S A TA _R XN 4 _1 4 1 8
S A TA _R XP 4_ 1 4 18

??? ?? ?? ??

P1
P2
P3
P4
P5
P6

3 .3 VS

W140XX ONLY

*1 5 m li _ s ho rt _ 0 6

R

*0 . 0 1 u_ 1 6V _X 7 R _ 0 4
*0 . 0 1 u_ 1 6V _X 7 R _ 0 4

R 17 9

G

C7 7 6
C7 7 7

Z e ro_ V I N

4

*0 . 0 1 u_ 1 6V _X 7 R _ 0 4
*0 . 0 1 u_ 1 6V _X 7 R _ 0 4

2

C7 7 4
C7 7 5

C

S1
S2
S3
S4
S5
S6
S7

5
6

J _ OD D 1

0 . 1u _ 1 6V _ Y 5 V _ 04

SATA ODD

For V41XX

W140XX/W150XX/W170XX
3 . 3V S

G re en

D5

HDD/CD-ROM
LED

*H T-1 7 0 B P Z

R Y -S P 1 7 0 Y G3 4 -5 M

R 3
* 2 20 _ 04

D1

IGPU LED

*R Y -S P 1 7 2Y G3 4

DGPU LED

*R Y -S P 1 7 2U H R 24 -5 M

Green

White

M 100 12 6

Red

M1 001 26

G re en

C

C

G re en

SCROLL
LOCK LED

D 22

CAPS LOCK
LED

R Y -S P 1 7 0 Y G3 4 -5 M

* 2 20 _ 04

D3

A
D 21

NUM LOCK
LED

* 2 20 _ 04

A

2 20 _ 0 4

R 9

A

R4 3 1

2 20 _ 0 4

R Y -S P 1 7 0 Y G3 4 -5 M

3. 3V S

R 11

C

R4 3 0

2 20 _ 0 4
A

R4 2 9

D 20

3 . 3V S

3 .3 V S

A

3 .3 V S

C

3 .3 V S

C

LED

A

Sheet 31 of 49
SATA ODD, LED,
Hotkey, LID SW

C

L E D_ DG P U#
LE D _ N U M #

LE D _ C A P #

L E D _N U M # 3 4

L E D _C A P # 34

L E D _ S C R OL L #

S A T A _ L E D#

L E D _ S C R OL L # 3 4

L E D_ IG P U#

S A T A _ LE D # 18

W140XX/W150XX/W170XX

34 O P TI M U S _ M OD E
3 .3 V S
E

8/17
K P B -3 02 5 Y S G C
34

L E D _A C I N

R 44 8

2 2 0 _0 4

1

L E D _P W R

R 46 1

2 2 0 _0 4

3

SG

B

R6

2

*2 2 0 _0 4
4

R 5
* 22 0 _ 04
3

1

D3 0

D 4 Green

2 2 0 _0 4

1

3 4 LE D _ B A T_ F U LL

R 42 7

2 2 0 _0 4

3

2

B

Y
SG

* R Y _S P 1 9 5

4

Y
R 42 8

W150XX/W170XX LED CON

C 2

K P B -3 02 5 Y S G C

SG

RED

AC IN/POWER ON LED

3 4 LE D _ B A T_ C H G

Q 3
* D T A 1 14 E U A

C

Y
34

L E D_ DG P U# 2 3

L E D _ I GP U # 18

Q 1
* DT C1 1 4 E UA
4

E

B.Schematic Diagrams

P I N GN D 1 ~ 4 = GN D

3 .3 V S
J _ LE D 1

D2 3

BAT CHARGE/FULL LED
27

W L A N _L E D #

L E D _I G P U #
L E D _D GP U #
VG A_ SW #
BT_ EN
S A T A _ L E D#
O P T I MU S _M OD E
W L A N _L E D #

1
2
3
4
5
6
7
8
9
10
8 8 48 6 -1 00 1

8 pi n ->1 0 pi n a dd WL AN _L ED#
C9 90 71 3

B - 32 SATA ODD, LED, Hotkey, LID SW

1 8, 2 7 , 2 8, 3 0 , 3 4, 3 5 , 3 6, 4 2 V D D 3
11 , 1 8 , 24 , 2 5 , 27 , 2 8 , 32 , 3 3 , 35 , 3 9 , 40 , 4 1 5V S
3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0, 3 2 , 3 3, 3 4 , 3 5, 3 9 3 . 3V S

Schematic Diagrams

HDMI, RJ45
L5 7
*H D M I 2 01 2 F 2 S F -9 00 T 0 4
R 17 3
* 0 _0 4
1
2

FOR W/O LEVEL SHIFT

GIGA LAN (JMC251C)

T MD S _C L OC K #-I
T MD S _C L OC K -I

L44

L1 5
1

LA N
LA N
LA N
LA N

_ MD
_ MD
_ MD
_ MD

IP 0
IN0
IP 1
IN1

12
11
9
8
6
5
3
2

IP 2
IN2
IP 3
IN3

10
7
4
1

T CT

T D4 T D4 +
T D3 T D3 +

MX 4 M X4 +
MX 3 M X3 +

T D2 T D2 +
T D1 T D1 +

MX 2 M X2 +
MX 1 M X1 +

T CT 4
T CT 3
T CT 2
T CT 1

M
M
M
M

CT 4
CT 3
CT 2
CT 1

13
14
16
17

LM
LM
LM
LM

X 1+
X 1X 2+
X 2-

2
W C M2 0 1 2F 2 S -1 6 1T 0 3
3
2 L1 7
W C M2 0 1 2F 2 S -1 6 1T 0 3
3 L2 3
2

4
1
4
1

19
20
22
23

LM
LM
LM
LM

X 3+
X 3X 4+
X 4-

W C M2 0 1 2F 2 S -1 6 1T 0 3
3
2 L3 3
W C M2 0 1 2F 2 S -1 6 1T 0 3
3

4
1
4

15
18
21
24

D L MX 1 +
D L MX 1 D L MX 2 +
D L MX 2 -

1
2
3
6

D L MX 3 +
D L MX 3 D L MX 4 +
D L MX 4 -

4
5
7
8

NM CT _ 4
NM CT _ 3
NM CT _ 2
NM CT _ 1

D A+
D AD B+
D B-

T MD S _D A T A 1 #-I

D02 CHANGE
? ? ?

G ND 1
G ND 2

sh i e ld
sh i e ld

T MD S _D A T A 1 -I

D C+
D CD D+
D D-

T MD S _D A T A 0 -I

2
R 34 1

* 0. 01 u _1 6 V _ X 7R _0 4

7 5_ 0 4
7 5_ 0 4
7 5_ 0 4
7 5_ 0 4

T MD S _D A T A 2 -I

*1 M _0 4
P O R T C _H P C

Q 7
* MT N 7 0 0 2Z H S 3
D
H D M I _ H P D -C

S

C6 3
3 .3 VS
G

10 0 0 p_ 2 K V _ X 7R _1 2 _ H 1 2 5
H D M I _C T R L C L K

S

Q8
*M T N 7 00 2 Z H S 3
D
H D M I _ S C L -C

G
H D M I _C T R L D A T A

S

* 0 . 1u _ 1 0V _ X 7 R _ 0 4
* 0 . 1u _ 1 0V _ X 7 R _ 0 4

TM D S _ D A T A 2 # -I
TM D S _ D A T A 2 -I

C 2 98
C 2 77

* 0 . 1u _ 1 0V _ X 7 R _ 0 4
* 0 . 1u _ 1 0V _ X 7 R _ 0 4

TM D S _ D A T A 1 # -I
TM D S _ D A T A 1 -I

C 2 69
C 2 68

* 0 . 1u _ 1 0V _ X 7 R _ 0 4
* 0 . 1u _ 1 0V _ X 7 R _ 0 4

TM D S _ D A T A 0 # -I
TM D S _ D A T A 0 -I

C 2 35
C 2 19

* 0 . 1u _ 1 0V _ X 7 R _ 0 4
* 0 . 1u _ 1 0V _ X 7 R _ 0 4

TM D S _ C L O C K # -I
TM D S _ C L O C K -I

C 20 8
C 20 7

0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C LK C N _4C8
0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C LK C P _4C7

2 1 H D M I C _ C LK C N
2 1 H D M I C _ C LK C P

2 1 H D MI _ C T R LC LK
2 1 H DM I_ CT RL DA T A
21
3. 3 V S

P OR T C _ H P C
R1 2 1
R1 1 9

H D MI _ C T R L C LK
H D MI _ C T R L D A TA

9
8

P OR TC _ H P C

7

*4 . 7K _0 4
*0 _0 4

O E#
D CC_ E N #

? ? ?
SN 75D P1 39 C han ge 3 .9 K
R1 2 8
3 . 3V S

R 13 2
R 13 4

49 9 _ 1% _ 0 4
*4 . 7 K _ 0 4
*4 . 7 K _ 0 4

PC 0
PC 1
R E XT

O E _1
O E _2

25
32
10
3
4
6

34
35

I N _D 2+
I N _D 2-

OU T _ D 2 +
O UT _ D2 -

I N _D 3+
I N _D 3-

OU T _ D 3 +
O UT _ D3 -

I N _D 4+
I N _D 4-

OU T _ D 4 +
O UT _ D4 -

SC L
SD A

S C L_ S I N K
S DA _ S IN K

HP D

H P D_ S IN K

OE #

VC
VC
VC
VC
VC
VC
VC
VC

DC C_ E N #
RT _ E N#
PC 0
PC 1
R E XT
OE _1
QE _2

R 12 7

4 . 7 K _0 4

DC C_ E N#

R 13 1

4 . 7 K _0 4

P C0

R 13 0

*4 . 7 K _ 0 4

P C1

P a ra d e P S 81 0 1
P I N 4 9 = GN D

GN D [ 1 ]
GN D [ 2 ]
GN D [ 3 ]
GN D [ 4 ]
GN D [ 5 ]
GN D [ 6 ]
GN D [ 7 ]
GN D [ 8 ]
GN D [ 9 ]
GN D [ 1 0 ]

TM D S _ D A TA 1# -R
TM D S _ D A TA 1-R

16
17

TM D S _ D A TA 0# -R
TM D S _ D A TA 0-R

13
14

TM D S _ C LO C K # -R
TM D S _ C LO C K -R

R 71

28
29

H D MI _ S C L -C
H D MI _ S D A -C

30

H D MI _ H P D -C

2
11
15
21
26
33
40
46

? ? ?

SN75DP139 6-03-75139-030
6-03-03360-030
PS8101 (6-03-08101-030) PIN TO PIN

5 V S _ H D MI _ I N

R7 2

C

A
D 25

D 26

D 27

*B A V 99 R E C T I F I E R
*B A V 9 9 R E C T I F I E R
*B A V 99 R E C T I F I E R

1 _ 04
J _H D M I 1

C8 1

C 80

1 0u _ 1 0V _ Y 5V _ 0 8

2 2 u_ 6 . 3 V _ X5 R _ 0 8

H D MI _ S D A -C
H D M I _H P D -C
19

+5V
H D M I _ S D A -C

? ? Co-Ray

1 0 0K _0 4

16
14

3 .3 V S

T M D S _ C L OC K # -R
T M D S _ C L OC K -R

C 1 76

C1 5 9

0 . 1 u _1 6 V _ Y 5 V _ 0 4

0 . 1u _ 1 6V _ Y 5V _ 0 4
T M D S _ D A T A 1 # -R

C 1 53

C1 5 8

R1 6 3
4

0_04
3

R 10 7

1
2
R2 0 1
0_04
L1 2 * H D MI 2 0 12 F 2 S F -9 0 0T 0 4
R2 3 3
0_04
4
3
1
2
R2 3 6
0_04
L1 0 * H D MI 2 0 12 F 2 S F -9 0 0T 0 4

0 . 1 u _1 6 V _ Y 5 V _ 0 4
0 . 1u _ 1 6V _ Y 5V _ 0 4

5 VS
Q 6
* MT N 7 0 0 2Z H S 3

R 10 6

*4 9 9_ 1 % _0 4
T M D S _ C L OC K #
T M D S _ C L OC K
* 49 9 _ 1% _ 0 4

12
10
8

R 10 3

R 10 2

G
C1 5 4
0 . 1u _ 1 6V _Y 5V _0 4

H OT P L U G D E TE C T

18

? ? LE VE LSH IF T 100 K_ 04
? ? ? L EV EL SH IFT 2 0K _04

T M D S _ D A T A 1 -R
1
5
12
18
24
27
31
36
37
43

1 _0 4

Fo r ES D

H D MI _ S C L-C

R 1 24

49

3. 3 V S

GN D

? ? ?

C[1 ]
C[2 ]
C[3 ]
C[4 ]
C[5 ]
C[6 ]
C[7 ]
C[8 ]

19
20

R8 0
2. 2K _ 0 4

5V S _H D M I

5V S

AC

0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 2C N _ C4 5
0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 2C P _ C4 4

TM D S _ D A TA 2# -R
TM D S _ D A TA 2-R

*4 9 9_ 1 % _0 4
T MD S _ D A T A 1 #
T M DS _ DA T A 1
*4 9 9_ 1 % _0 4

6
4
2

H D MI _ H P D -C

17
DD C/C E C G ND

SD A

15
SC L

R E S E RV E D

13
CE C

T MD S C L O C K -

11
C L K S HIE L D

T MD S C L O C K +

H D MI _ S C L-C

? ? Co-Ray

H D M I _C E C
R1 0 5

*4 99 _ 1 %_ 0 4
R2 3 8

9

T MD S _D A T A 0#

1

0 _0 4
2 T MD S _D A T A 0 #-R

TM D S D A T A 0 S H IE L D0

7
T MD S D A T A 0 +

T MD S D A TA 1 -

5
S H I E LD 1

T MD S D A TA 1 +

3

T MD S _D A T A 0
R1 0 4
*4 99 _ 1 %_ 0 4
R1 0 1
*4 99 _ 1 %_ 0 4

4
R2 8 6
L11
R3 7 6

T MD S _D A T A 2#

3 T MD S _D A T A 0 -R
0 _0 4
*H D M I 20 1 2 F 2S F -90 0 T 04
0 _0 4
1
2
TM D S _ D A TA 2 # -R

TM D S D A T A 2 S H IE L D2

1
T MD S D A T A 2 +
GN D
G ND
GN D
G ND

C 20 6
C 20 5

22
23

Sheet 32 of 49
HDMI, RJ45

T MD S _D A T A 2
R1 0 0
*4 99 _ 1 %_ 0 4

4
R3 8 1
L9

3 T MD S _D A T A 2 -R
0 _0 4
*H D M I 20 1 2 F 2S F -90 0 T 04

H D MI G N D

G ND 1
GN D 2
G ND3
GN D 4

C 20 4
C 20 3

2 1 H D MI C _ C 2 C N
2 1 H D MI C _ C 2 C P

OU T _ D 1 +
O UT _ D1 -

DH DM IG ND

2 1 H D MI C _ C 1 C N
2 1 H D MI C _ C 1 C P

0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 1C N _ C4 2
0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 1C P _ C4 1

I N _D 1+
I N _D 1-

S

0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 0C N _ C3 9
0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 0C P _ C3 8

C

R7 7
2 . 2K _ 0 4

U8
C 20 2
C 20 1

T MD S _D A T A 2

C 7 98
C 7 99

5V S _ H D MI

HDMI CONNECTOR

T MD S _D A T A 2 #

2 1 H DM IC_ C1 C N
2 1 H DM IC_ C1 C P

2 1 H DM IC_ CL K C N
2 1 H DM IC_ CL K C P

Q1 4
*M T N 7 00 2 Z H S 3
D
H D M I _ S D A -C

4

2 1 H DM IC_ C0 C N
2 1 H DM IC_ C0 C P

2 1 H DM IC_ C2 C N
2 1 H DM IC_ C2 C P

3 .3 VS

*0 _ 0 4

2
1
R 52 0
*0 _ 0 4
L58
*H D M I 2 01 2 F 2 S F -9 00 T 0 4

R 15 2

N MC T_ R

FOR INTEL GRAPHIC

T MD S _D A T A 0
*0 _ 0 4

R 49 7
3

T MD S _D A T A 2 #-I

R5 0
R3 9
R3 4
R3 3

0 . 01 u _ 16 V _ X 7R _ 04

2 1 H D MI C _ C 0 C N
2 1 H D MI C _ C 0 C P

T MD S _D A T A 0 #

1

C 1 28 1 7 -11 9 A 5 -L
P IN G N D1 ~ 4 = G N D

D02 CHANGE
R107/R106/R103/R102/R105/R104/R101/R100/Q6
FOR W/O LEVELSHIFT? ? ?
30
DV D D
1 1 , 1 8, 2 4 , 2 5, 27 , 2 8 , 31 , 3 3 , 35 , 3 9 , 40 , 4 1 5 V S
3 , 9, 1 0 , 1 1, 1 2 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 23 , 2 4 , 25 , 2 7 , 28 , 2 9 , 3 0, 3 1 , 3 3, 3 4 , 3 5, 3 9 3 . 3 V S

HDMI, RJ45 B - 33

B.Schematic Diagrams

*0 . 01 u _ 16 V _ X 7R _ 04

L5 9
*H D M I 2 01 2 F 2 S F -9 00 T 0 4
R 25 2
*0 _ 0 4
3
4

3 . 3V S

D03 LP16 CHANGE
TO RN22

C 5 71

C5 8 3
*0 . 0 1u _ 1 6V _ X 7 R _ 0 4

T MD S _D A T A 1

1 3 0 45 1 -0 2

Main 6-21-84020-008
Sec 6-21-84030-008

G

C 5 73

T MD S _D A T A 1 #

4
3
R 25 0
* 0 _0 4
L3 7
*H D MI 2 0 1 2F 2 S F -9 0 0 T0 4

TM D S _ D A TA 0 # -I

G S T 50 0 9 LF
C5 7 9

T MD S _C L OC K

A

L A N _ MD I P 2
L A N _ MD I N 2
L A N _ MD I P 3
L A N _ MD I N 3

_ MD
_ MD
_ MD
_ MD

* 0 _0 4
2

C

*0 _ 04

30
30
30
30

LA N
LA N
LA N
LA N

R 24 9
1

TM D S _ C L O C K #

AC

R6 2

L A N _ MD I P 0
L A N _ MD I N 0
L A N _ MD I P 1
L A N _ MD I N 1

3
* 0 _0 4

A

D V DD

30
30
30
30

J _ RJ _ 1

4
R 24 3

AC

LAN POART

Schematic Diagrams

Audio Codec ALC269
CODEC (ALC269 & VT1802P)

P V D D1 _ 2

R 3 12
* 15 m i _l s h or t _0 6

La yout not e:
GND a nd AUDG spa ce i s
60m ils ~ 1 00 mil s

5 VS
3. 3 V S _ A U D

C4 7 3

C 4 74

10 u _ 6 . 3V _ X 5 R _ 0 6

0 . 1 u _1 6 V _ Y 5 V _ 0 4

C4 3 9

C6 9 6

0 . 1 u_ 1 6 V _Y 5 V _ 04

10 u _ 6. 3 V _ X 5 R _ 0 6

AZ_RS T# For 3. 3V
HDA Link De -pop
D 12 * C D B U 0 0 34 0
A

C 43 7

*0 . 1 u _ 16 V _ Y 5 V _ 0 4

* 10 u _ 6. 3 V _ X 5 R _ 0 6

? ? ?

5V S _A U D

L3 4
H C B 1 0 05 K F -1 2 1 T2 0

5 VS_ AU D
D1 3
B A T 54 A W G H
2

0 . 1 u_ 1 6 V _ Y 5 V _ 04
3

1

C 44 2
1 0 u_ 6 . 3 V _ X5 R _0 6

C 5 01

C 69 5

0 . 1 u_ 1 6 V _ Y 5 V _ 04

0 . 1u _ 1 6V _Y 5V _0 4

1 0 u _6 . 3 V _ X 5R _ 06

*1 0 u _6 . 3 V _ X 5R _ 06

A
S
3 . 3V

Layout Note:
C lo se to P CH

27
Layout Note:

40
41

S P K O UT RS P K O UT R+

44
45

E A P D _ MO D E

47
48

D M I C -D A T
D M I C -C L K

2
3

S P DIF O

Ve ry c lo se to

R3 3 8

S P K O UT L +
S P K O UT L -

22 p _ 5 0V _ N P O_ 0 4
R 33 4

3 3_ 0 4

1 8 H D A _ B I T C LK

R 33 9

3 3_ 0 4

18

R 35 7

25
38
A V D D1
A V DD 2

39
46
P V D D1
P V DD 2

S P D IF C2 /E A P D
S P D IF O

J DR E F
M ON O-O U T

G P I O0 -D M I C -D A T
G P I O1 -D M I C -C L K

33 _ 0 4

DIGITAL
A Z _S D OU T _R

M I C 1 -L
MI C 1-R

ANALOG

L I N E 1 -L
L I N E 1-R

5

6-03-02695-030

B I T -C LK
Q2 3
MT N 70 0 2 Z H S 3

10

H DA _ R S T #

11
R ESET#

PC BEEP 1 2
PC BEEP

4 . 7 K _ 04

C 49 2

1 u_ 6 . 3 V _X 5 R _ 0 4

BEEP
C 4 91

1 0 0p _ 5 0V _ N P O_ 0 4

3.3 VS_ AUD
5 VS
20 ms

M I C 1 -V R E F O-L

BEEP_ R

4 7 K _0 4

Ple a se Le t LC Fil te r
toget he r and close to
Code c .I F Spe ak e r
w ire le ngth i s l es s
tha n 80 00 mil s I t don't
ne e d t he LC Fil te r.

R3 6 8

2 0K _1 % _ 04

J D _S E N S E 2 7

L I N E 2 -L
L I N E 2 -R

R3 6 9

3 9. 2K _ 1 % _0 4

J D _S E N S E _ B 2 7

M IC2 _ L C5 1 0
M IC2 _ R C5 1 1

16
17

4 . 7 u _6 . 3 V _ X 5R _ 06
4 . 7 u _6 . 3 V _ X 5R _ 06

S E N S E -B

19
20

J DR E F
MO N O -OU T

21
22

MI C 1 -L_ R C 5 1 2
MI C 1 -R _ R C 5 1 3

23
24

L I N E 1 -L
L I N E 1 -R

27

V R E F -A L C 2 6 9

VT1802P

H P -O U T -L
H P -OU T-R
CB N
C BP
O PVEE

32
33

2 0 K _ 1 %_ 0 4
*1 0 0 p_ 5 0 V _ N P O _0 4

4 . 7 u _6 . 3 V _ X 5R _ 06 M I C 1 _ L
4 . 7 u _6 . 3 V _ X 5R _ 06 M I C 1 _ R
C 4 75

A UD G

*1 0m i l _s h o rt

J P1

*1 0m i l _s h o rt

C5 5 5

0. 1 u _ 16 V _ Y 5 V _ 0 4

C5 5 6

0. 1 u _ 16 V _ Y 5 V _ 0 4

A U DG

L D O _C A P
MI C 1 -V R E F O-R
MI C 2 -V R E F O
H E A D P H ON E -L
H E A D P H ON E -R

35

C B N -A L 2 69

36
34

C B P -A L C 2 6 9
OP V E E -A L C 2 6 9

2 . 2 u _6 . 3 V _ X5 R _0 6

VT1802P

10u

C 4 64

1 0 u _6 . 3 V _ X5 R _0 6

VT1802P

C 4 43

J_INTMIC1

M I C 2 -V R E F O

NC PIN

H E A D P H ON E -L 2 7
H E A D P H ON E -R 2 7

2

I N T _M I C R 2 1 3

4 . 7 K _0 4

J _ I N T MI C 1

1 K_ 0 4

2
1

VT1802P
C 3 06
330P 6 80 p _ 50 V _ X 7 R _ 04

C 4 45

8 8 26 6 -0 20 0 1
P C B F o ot p ri n t = 88 2 6 6-2 R

A L C 2 69 Q -V B 5 -GR
2 . 2 u _6 . 3 V _ X 5R _ 06

VT1802P

75_1%_05

M IC1 _ R

R3 7 7

1 K_ 0 4

M IC1 _ L

R3 8 3

1 K_ 0 4

M I C 1 -V R E F O-L

R3 8 4

2 .2 K _ 0 4

M I C 1 -V R E F O-R

R3 7 8

2 .2 K _ 0 4

A U DG
AU DG

MI C 1 -V R E F O -L

The rma l P ad pl a ce 9
V ia hole .

S P K OU TL +

VT1802P
S P K OU T L+ _ L

C 4 32

C 43 5

* 1 u_ 1 6 V _ X5 R _ 0 6

*1 8 0 p _5 0 V _ N P O _0 4

H E A D P H ON E -L
H E A D P H ON E -R
D

R3 9 5
*2 2 0K _ 0 4

R 3 80

S

G

Q3 6

S P K OU T R + _ R 2 7
S P K OU T R -_ R 2 7

A U DG

*A O 3 41 5 R 39 3

R3 8 5

* 4. 7 K _ 0 4
C 4 31

C 43 6

* 1 u_ 1 6 V _ X5 R _ 0 6

*1 8 0 p _5 0 V _ N P O _0 4

S P K OU T R -_ R
* F C M 1 60 8 K -1 21 T 0 6_ s h o rt
L29
C 4 33
*1 8 0 p_ 5 0 V _ N P O _0 4

La yout not e :
Cl ose to code c

*1 0 K _ 04
C 7 53
* 10 u _ 6 . 3V _ X 5 R _ 0 6

A U DG
J_SPK1
2 1

S P K O UT R-

Q 29
*2 N 7 0 02 W

G

D

S P K OU T R + _ R

Q 31
* 2 N 7 0 02 W

G
* 1 0K _ 0 4

E A P D _ M OD E

L28
* F C M 1 60 8 K -1 21 T 0 6_ s h o rt
S P K O UT R+

27

D02 CHANGE

3. 3 V S

8 52 0 5 -02 7 0 1

* F C M 1 60 8 K -1 21 T 0 6_ s h o rt
L30
C 4 34
*1 8 0 p_ 5 0 V _ N P O _0 4

27

M I C 1 -L

8/27
Headphone Anti-Pop Circuit
2
1

S P K OU T L-_ L

M I C 1 -R

4.7K_1%_05

J _S P K L1
S P K OU T L-

1

R2 1 6

VT1802P
2.2K_04

A U DG

2 . 2u _ 6 . 3 V _X 5 R _ 0 6

EMI Require

B - 34 Audio Codec ALC269

J P2

0 . 1 u_ 1 6 V _Y 5 V _0 4

L31
* F C M 1 60 8 K -1 21 T 0 6_ s h o rt

Spe a ke r w ire l e ngt h le ss tha n 80 00 mil s , I t don't ne e d LC Fi lt er.
SPK OUTR+ ,R -,L+ ,L- Trac e w id t h
Spe a ke r 4 ohm-- --- -> 4 0m ils
Spe a ke r 8 ohm-- --- -> 2 0m ils

H C B 10 0 5 K F -1 21 T 2 0
A U DG

AZ_RS T#
PD#

L35

I N T _ MI C

5.1K_1%_04

R3 6 6
C5 0 4

C 4 83
28
30
29

EMI Require

NEAR CODEC

18

VR EF

L D O _C A P
M I C 1 -V R E F O-R
MI C 2 -V R E F O

S Y NC

AVSS1
AVSS 2

R3 6 4

8

A Z _S Y N C _ R

31

R3 7 2

A Z _S D I N 0 _ R

S D A T A -I N

FOR VOLUMN
ADJUST

26
37

S

GN D

D

49

D1 6
B A T 5 4C W GH
1 A
C 3
2 A

6

D VSS2

3 3_ 0 4

A Z _ B IT CL K _ R

SEN SE_ A

14
15

S e ns e -B

PVSS1
PVSS2

K B C_ B E E P
H D A _S P K R

R 34 2

9

S P K -R S P K -R +

7

PC BEEP
18

H DA _ S D IN0

13
S e ns e A
L I N E 2 -L
L I N E 2-R

S D A T A -OU T

3 .3 V S

34

1 u_ 6 . 3 V _Y 5 V _ 04

DIG ITAL

ANALOG

M I C 2 -L
MI C 2-R

42
43

H D A _S Y N C

*1 0 K _ 04
18

G

1 8 H D A _ S D OU T

C4 9 7

A UD G

S P K -L +
S P K -L -

Au di o Co de c
C 45 2

1

PD #

Q2 1
*B S S 1 3 8 _ N L

AZ_RST# For 1. 5V
HDA Link De -pop

DV DD 1

4

Q 20
* 2 N 7 0 02 W

G

D

*1 0 0K _ 0 4

D V D D -I O

D

U 34

S

B.Schematic Diagrams

C4 9 3

C

R 32 9

H D A _ R S T# G

Sheet 33 of 49
Audio Codec
ALC269

C 44 0
0 . 1u _ 1 6V _Y 5V _0 4

1 0 K_ 0 4
P D#

5V S _A U D

5 VS

C4 4 4

D

H DA _ R S T #

A

18

3 4 K B C _M U T E #

C 43 8
R 3 21

S

E A P D _M OD E C

VT1802P

C 44 1

3 .3 V S
L2 7
H C B 1 0 05 K F -1 2 1 T2 0

S

PD# Cont rol

2 , 3 , 8, 1 1 , 1 2 , 16 , 1 8 , 1 9, 2 0 , 2 2, 2 3 , 2 4 , 25 , 2 7 , 28 , 2 9 , 3 0, 3 5 , 3 7 , 38 , 3 9 3 . 3V
3 , 6 , 8, 9 , 1 0 , 2 5, 2 9 , 3 5 , 37 , 3 8 1 . 5V
11 , 1 8 , 24 , 2 5 , 2 7, 2 8 , 3 1 , 32 , 3 5 , 39 , 4 0 , 4 1 5 V S
3, 9 , 1 0 , 1 1, 1 2 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 1, 3 2 , 3 4, 3 5 , 3 9 3. 3 V S

A UD G

Schematic Diagrams

KBC-ITE IT8518E
K B C _ A V DD

L 19
H C B 1 00 5 K F -1 2 1T 2 0

V D D3

C 34 3
0 . 1 u_ 1 6 V _Y 5 V _0 4

H C B 1 0 0 5K F -12 1 T 20

.

U 18

18 , 2 8
L PC_ AD 0
18 , 2 8
L PC_ AD 1
18 , 2 8
L PC_ AD 2
18 , 2 8
L PC_ AD 3
22
P C L K _K B C
18 , 2 8 L P C _ F R A M E #
18 , 2 8
S E RIR Q
2 2 , 2 7, 2 9 , 3 0 B U F _ P L T_ R S T#

10
9
8
7
13
6
5
22

P CL K _ K B C

MU T E _S W #

28

C C D _D E T #
S MC _B A T
S MD _B A T
A _ TH E R M
A _ TH E R M

33
K B C _B E E P
3 1 LE D _ S C R OL L #
31
L E D _ N U M#
31
L E D_ CA P #
3 1 L E D _B A T _ C H G
3 1 LE D _ B A T _F U L L
31
LE D _ P W R
27
27
27
28
28
28
27

8 0 CL K
B T _ DE T #
3 IN1
W LA N _ S W #
T P _C L K
T P _D A T A

DAC
G
G
D
D
D
D

R5 3 8
R5 3 9

C C D _ D E T#
MO D E L _ I D
S MC _ B A T
S MD _ B A T
S MC _ V GA _ T H E R M
S MD _ V GA _ T H E R M
S MC _ C P U _ T H E R M_ R
S MD _ C P U _ T H E R M_ R
L C D _B R I GH TN E S S
K B C _B E E P

8 0C L K

AD
AD
AD
AD
AD
AD
AD
AD
SM
SM
SM
SM
SM
SM

C 0 / GP I 0
C 1 / GP I 1
C 2 / GP I 2
C 3 / GP I 3
C 4 / GP I 4
C 5 / GP I 5
C 6 / GP I 6
C 7 / GP I 7

F L F R A ME # / GP G 2
F L A D0 /S C E #
F L A D 1/ S I
F L A D2 /S O
F L A D 3 / GP G 6
F L CL K /S CK
( P D )F L R S T# / W U I 7 / GP G 0/ T M

GPIO
( P D )K S O1 6 / GP C 3
( P D )K S O1 7 / GP C 5

C L K 0 / GP B 3
D A T 0 / GP B 4
C L K 1 / GP C 1
D A T 1 / GP C 2
C L K 2 / GP F 6 ( P U )
D A T 2 / GP F 7 ( P U )

PW M
PW M
PW M
PW M
PW M
PW M
PW M
PW M

(
(
(
(
(
(
(
(

0 / GP A 0 (
1 / GP A 1 (
2 / GP A 2 (
3 / GP A 3 (
4 / GP A 4 (
5 / GP A 5 (
6 / GP A 6 (
7 / GP A 7 (

PU
PU
PU
PU
PU
PU
PU
PU

)
)
)
)
)
)
)
)

LK 0 / G
A T0 / G
LK 1 / G
A T1 / G
LK 2 / G
A T2 / G

P F 0(
P F 1(
P F 2(
P F 3(
P F 4(
P F 5(

0/ I D
1/ I D
2/ I D
3/ I D
4/ I D
5/ I D
6/ I D
1/ I D

0
1
2
3
4
5
6
7

WAKE UP

PU
PU
PU
PU
PU
PU

( P D )W U I 5 / G P E 5
( P D )L P C P D # / W U I 6 / G P E 6

)
)
)
)
)
)

PWM/COUNTER
( P D )T A C H 0 / GP D 6
( P D )T A C H 1 / GP D 7
( P D )T MR I 0/ W U I 2 / GP C 4
( P D )T MR I 1/ W U I 3 / GP C 6

P W R S W / G P E 4( P U )

CIR

R I 1# / W U I 0 / GP D 0( P U )
R I 2# / W U I 1 / GP D 1( P U )

( P D )C R X / GP C 0
( P D )C TX / G P B 2

GP INTERRUPT

P W R_ B T N#

)GP H
)GP H
)GP H
)GP H
)GP H
)GP H
)GP H
)GP G

( P D )E G A D / G P E 1
( P D )E G C S # / G P E 2
( P D )E G C L K / G P E 3

WAKE UP

18
21

PD
PD
PD
PD
PD
PD
PD
PD

EXT GPIO

PS/2
PS2 C
PS2 D
PS2 C
PS2 D
PS2 C
PS2 D

33
20

IT8518
6-03-08518-0P2
FLASH

PWM

24
25
28
29
30
31
32
34

1 25

35
P W R _S W #
11 , 2 8
L ID_ S W #

2
3
4
5

SMBUS

1 10
1 11
1 15
1 16
1 17
1 18

85
86
87
88
89
90

3 G_ E N

P J0
P J1
A C 2 / GP J
A C 3 / GP J
A C 4 / GP J
A C 5 / GP J

ADC

66
67
68
69
70
71
72
73

B A T _ DE T
B A T _ V OL T
CC D_ S W #

*0 _ 0 4
0 _0 4

E C S C I # / GP D 3 ( P U )
E C S MI # / GP D 4 ( P U )

LPC/WAKE UP

G I N T / GP D 5 ( P U )

10 0 K _ 04

W150HRM

K B C _ W R E S E T#

J _ KB2
8 52 0 1 -24 0 5 1

C3 4 7
1u _ 6 . 3V _ Y 5V _ 0 4

K S I0 /S T B #
K S I1 /A F D #
K S I 2/ I N I T #
K S I 3/ S LI N #
KSI4
KSI5
KSI6
KSI7

K S O0 / P D 0
K S O1 / P D 1
K S O2 / P D 2
K S O3 / P D 3
K S O4 / P D 4
K S O5 / P D 5
K S O6 / P D 6
K S O7 / P D 7
K S O8 / A C K #
K S O 9/ B U S Y
K S O 1 0/ P E
K S O1 1 / E R R #
K S O1 2/ S LC T
K S O1 3
K S O1 4
K S O1 5

G A 20 / G P B 5
K B R S T #/ G P B 6 ( P U )
P W U R E Q # / GP C 7( P U )
L 8 0L L A T / GP E 7 ( P U )

76
77
78
79
80
81

24

J_KB1

J _K B 1
* 85 2 0 1-2 4 0 51

W R ST #

R 6 73

1

W140XX

LPC K/B MATRIX

23
15

42
B A T _ DE T
4 2 B A T_ V O LT
28
C C D _S W #
2 T H E R M_ V O LT
42
T OT A L _ C U R
2 3 C R I T_ T E MP _ R E P #
27
3 G _D E T #

28 , 4 2
28 , 4 2
1 6 S MC _ V G
1 6 S MD _ V G

L A D0
L A D1
L A D2
L A D3
L P CC L K
L F R A ME #
S E R IRQ
L P C R S T #/ W U I 4 / GP D 2 ( P U )

1 26
4
16
20

S MI #
S CI #

2 7 , 2 8 W LA N _ E N
33
K B C _ MU TE #
18
ME _ W E
27
CP U _ F A N
28
MU TE _S W #
29
V I A _R S T #

*0 . 1 u_ 1 6 V _Y 5 V _0 4

58
59
60
61
62
63
64
65

K B -S I 0
K B -S I 1
K B -S I 2
K B -S I 3
K B -S I 4
K B -S I 5
K B -S I 6
K B -S I 7

36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55

K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O
K B -S O

10 0
10 1
10 2
10 3
10 4
10 5
10 6

K B C_ S P I_ C E #
K B C_ S P I_ S I
K B C_ S P I_ S O
V S HG _ S E L
K B C _ S P I _ S C LK

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

4
5
6
8
11
12
14
15

K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S

I0
I1
I2
I3
I4
I5
I6
I7

4
5
6
8
11
12
14
15

1
2
3
7
9
10
13
16
17
18
19
20
21
22
23
24

K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S

1
O0
O1
2
3
O2
O3
7
9
O4
O5 1 0
1
3
O6
O7 1 6
O8 1 7
O9 1 8
O1 0 1 9
O1 1 2 0
O1 2 2 1
O1 3 2 2
O1 4 2 3
O1 5 2 4

Board? ?
EC MODULE CHOOSE (FOR DIFFERENCE K/B TYPE)
V ER .

RX

V 1. 0

R20 2 10 K/ R2 04 X

3. 3V

R20 2 X /R2 04 1 0K

0V

MO D E L _ I D

27

56
57
93
94
95
96
97
98
99
10 7

CC D_ E N

28

SU SB#
S U S C#

6, 2 0 , 2 9, 3 5
20 , 3 8

C C D _S W #
M UT E _ S W #
3 G _D E T #
C C D _D E T #

R5 3 2
R4 7 0
R2 0 6
R2 0 5

S M C _ C P U _ TH E R M _ R
S M C _ C P U _ TH E R M _ R
S M D _ C P U _ TH E R M _ R
S M D _ C P U _ TH E R M _ R

R2 1 9
R2 2 7
R2 4 8
R2 5 3

S U S _P W R _ A C K 2 0
BT_ EN
27 , 3 1
B K L_ E N 11
HS P I_ CE # 1 8
H S P I _S C L K 1 8
H S P I _M S O 1 8
H S P I _M S I 1 8
D D _ ON
28 , 3 5 , 36

82
83
84

P C L K _K B C

R 2 42

C 34 4

0 _0 4 F OR I T85 12 CX /EX
0 .1 U_0 4 FO R I TE 85 12- J( IT E85 02 -J

*0 _0 4

AVSS
75

I T8 5 18 E V E R : C

R 24 6

35
17

CP U_ F A NS E N 2 7
H _ P R OC H OT # _ E C 3

12 0
12 4
11 9
12 3

W/0 C IR )

S H OR T

S H OR T

S W I#

20

B RIG HT NE S S

*1 0 mi l _ sh o rt

L CD _ B RIG HT NE S S

K B C _A G N D

C 3 01

* 1 0p _ 5 0V _ N P O_ 0 4

1 u_ 1 0 V _Y 5 V _0 6

C H G_ E N

42

KBC_SPI_*_R = 0.1"~0.5"

0. 1 u _1 6 V _ Y 5 V _ 0 4

32 Mb it

C 29 1
S P I _ V D D _1

8

K B C_ F L A S H
1 K _ 04

3

K B C_ HO L D#
4 . 7K _0 4

7

U1 6
VD D

CK3 2 K E
CK3 2 K
R 2 37

* 10 M _0 4

X 4 *3 2 . 7 68 K H z
1
4
2
3

* 0_ 0 4

R 2 40

* 0_ 0 4

R 2 41

R2 5 6
0_ 0 4

R1 8 9

N B _E N A V D D 1 1 , 21

K B C _S P I _S I _ R

R2 0 8

0_04

K B C _S P I _S I

2

K B C _S P I _S O _ R

R1 7 1

0_04

K B C_ S P I_ S O

1

K B C _S P I _C E # _R

R1 7 2

0_04

W P#

K B C_ S P I_ CE #

6

K B C _S P I _S C L K _R

R2 1 0

0_04

K B C _ S P I_ S CL K

CE #
S CK

IC P P E #

2 3, 2 9

R1 9 2

D02 CHANGE

4
H OL D #

VSS

C4 5 7

*3 3 _5 0 V _ N P O _0 4

P C T 2 5V F 03 2 B

FOR VIA USB3.0 ONLY

* 3 2. 7 6 8 K H z
4
3

5
SI
SO

? ? ?

6-04-25032-491

J _8 0 D E B U G1
C3 2 9
*1 2 p_ 5 0 V _N P O_ 0 4

R2 4 4

C 3 50

N C1

C E LL _ C O N T R O L 4 2
PM E#
22 , 3 0

X3
1
2
NC 2

H _P E C I 3 , 2 3
S MC _C P U _ T H E R M 1 9
S MD _C P U _ T H E R M 1 9
U S B _ A C_ IN 2 8

V DD 3

P M _P C H _ P W R OK 2 0
A L L _S Y S _ P W R G D 1 1 , 20 , 3 9

V D D3

0 . 1 u_ 1 6 V _Y 5V _0 4

4 3 _1 % _ 04
* 0_ 0 4
* 0_ 0 4
* 0_ 0 4

R S MR S T # 2 0
K B C _R S T # 2 3

47
48

2
12 8

Sheet 34 of 49
KBC-ITE IT8518E

10 K _ 0 4
*1 0 K _0 4
10 K _ 0 4
10 K _ 0 4

B A T_ V O LT

E C_ V S S

E C Cos t Do wn
11

C K 3 2K E
C K 3 2K

V DD3

*1 0K _0 4

P C L K _ K B C _R
* 10 _ 0 4

V GA _ S W # 3 1
d GP U _R S T # 12
d GP U _P W R _ E N # 1 2 , 22 , 3 7

19

CLOCK

10 K _ 0 4

RX

V S H G_ S E L 4 2

( P D )R I N G #/ P W R F A I L # / L P C R S T# / G P B 7

VSS
VSS
VSS
VSS
VSS
VSS
VSS

R XD / GP B 0 ( P U )
T X D / G P B 1( P U )

MOD EL _I D

VDD 3
3G _ P OW E R

( P D )L 80 H LA T / G P E 0

1
12
27
49
91
113
1 22

3 1 O P T I MU S _M OD E
27
W LA N _ D E T #

R2 0 2
R2 0 4

11 2

UART

1 08
1 09

V OL TAG E

1
2
3
4
5

3 IN1
8 0C L K
8 0D E T #

R2 4 5
10 K _ 0 4

8 82 6 6 -05 0 0 1
C 3 45

* 0. 1 u _ 16 V _ Y 5 V _ 0 4

18 , 2 7 , 28 , 3 0 , 35 , 3 6 , 42 V D D 3
3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 20 , 2 1, 22 , 2 3 , 24 , 2 5 , 27 , 2 8 , 29 , 3 0 , 31 , 3 2 , 33 , 3 5 , 39 3 . 3 V S

KBC-ITE IT8518E B - 35

B.Schematic Diagrams

23
23

* 0 _0 4

*0 . 1 u _1 6 V _ Y 5 V _ 04

14

K B C _W R E S E T #
23
G A 20
2 8 , 42
A C _I N #
31
L E D_ A CIN
2 0, 22 A C _P R E S E N T

C3 0 0

0 . 1u _ 1 6V _ Y 5V _ 0 4

R2 4 7

VSTBY
VST BY
VSTBY
VSTB Y
VSTBY
VSTB Y

M 74 0T/ TU

V CC

0 _0 4 f or M 760 T/ TU
B KP 100 5H S1 21_ 04 f or
E MI So lu ti on

VDD 3

C3 0 3

K B C _ A GN D

26
50
92
114
1 21
127

E C_ V C C

11

L22
3 . 3V S

V DD3

C3 0 2

74

0 . 1 u _1 6 V _ Y 5 V _ 04

3

0 . 1 u_ 1 6 V _Y 5 V _0 4

C 34 6

VBAT

1 0u _ 1 0V _ Y 5V _ 0 8

C 3 19

0 . 1u _ 1 6V _ Y 5 V _ 04

0. 1 u _ 16 V _ Y 5 V _ 0 4

C 68 4

A V CC

C2 9 4

.

C6 8 5

Schematic Diagrams

5VS, 3VS, 3.3VM, 1.5VS_CPU
V DD 3
V IN
V DD 3
U 20
*1 0K _ 0 4

7
V IN

1 K _0 4

V I N1

V IN 1

2

V IN

R 2 22

M_ B T N #

8
VA

3

1K _0 4

P R2 1 7
1 0K _ 0 4

D D _ ON

D D _O N _ L A TC H

M _B T N #

4

R 2 18

10 K _ 0 4

I N S TA N T -ON

P W R _S W #R

6

P W R _S W #

R 5 34

1K _ 0 4

P W R _ S W # 34

5

GN D

1 . 0 5V S _V T T _ P W R G D # 3 7

1.05VS_VTT
8
7

E

3

P R 22 5

1 0 K _ 04

1 0 K _ 04
S US B

D D _ ON #
D

DD_ O N#

2 8 , 38

P C8 0

2G

2 8 , 34 , 3 6 D D _ ON

*0 . 1 u _1 6 V _ Y 5 V _ 04

S

P Q 18 A

P R 1 18

S
M TD N 7 0 02 Z H S 6R

5

S Y S 1 5 V V D D5
5V
8
7

3A
P R 24 1

1 M_ 04

1 M_ 0 4

NM O S

ON

P Q5 8A
M T N N 2 0 N 0 3 Q8
2
1

5 VS

SYS1 5 V

1 . 5V

P R 2 43

2

4

*1 0u _ 6 . 3V _X 5 R _ 0 6

P Q 11 B
*M T N N 2 0 N 0 3 Q8
5

SU SB

*2 2 00 p _5 0 V _ X7 R _0 4

G

P Q 10
* MT N 7 0 02 Z H S 3

ON

P C 20 1
0 . 1 u _1 6 V _ Y 5 V _0 4

P Q 59 B
MT N N 2 0 N 0 3Q 8
D D _ ON #

P C2 0 0
47 0 0 p_ 5 0 V _X 7 R _ 0 4

6

4

5

P C 20 2
P R 2 40
75 _ 04

P Q6 0 B
MT N N 20 N 0 3 Q8
5

D

3

3 .3 V S

3 . 3 V S _ LO

V DD 3

P R2 3 9

10 u _ 10 V _ Y 5 V _ 08

S Y S 15 V

3 .3 V S _ E N1
4

S

P C5 6

6

1

2

ON

P Q6 0 A
MT N N 2 0N 0 3Q 8
8
2
7
1

1M _ 04

3 . 3 V _E N 1

G

6

S

S US B

D02 CHANGE
ON

B - 36 5VS, 3VS, 3.3VM, 1.5VS_CPU

P Q 6 8B
L 2 N 7 0 02 D W 1T 1 G

P C5 5

*0 . 1 u _1 6 V _ Y 5 V _ 04

D02 CHANGE

3

3 .3 V

3A

Power Plane

P R2 3 1

2 20 0 p _5 0 V _ X7 R _ 0 4

D

P C 54

NM O S

P Q5 9A
M T N N 2 0 N 0 3 Q8
8
2
7
1

P C1 9 6

* 22 0 _ 04

ON

3.3VS
NM O S

1 M_ 04

P R8 0

1 .5 V S _ CP U E N1

5 G

S US B

S

4 0 mi l

ON

3.3V

P Q6 8A
L2 N 7 0 0 2D W 1 T1 G
G 2

4 0 mi l

D02 CHANGE

V DD 3

D

6 8 0 0p _ 5 0V _ X 7 R _ 04

P J 18

D02 CHANGE

P C 2 05

6

1

6

2 2 00 p _ 50 V _ X 7R _ 04
PJ 9

3 , 3 7, 3 8

P R 79

P Q 1 1A
* MT N N 2 0N 03 Q 8
8
2
7
1

*1 M_ 0 4

1 . 5V S _L O

S US B

3

1

5

1 0 u _1 0 V _ Y 5V _0 8

P C 20 3

P R 24 4
1 0 0_ 0 4

4

4
D D _ ON #

1. 5 V S _ E N 1

P C2 0 9

0 . 1 u_ 1 6 V _Y 5V _ 0 4

5

2
*5 m m

NM OS

P C2 0 6

P Q 58 B
MT N N 2 0 N 0 3Q 8

P C1 9 5
*2 2 00 p _ 50 V _ X 7R _ 04

PJ 7 MU ST S HOR T

PJ 5
1
S Y S 15 V

3

0. 1 u _ 16 V _ Y 5 V _ 04

5 VS_ EN 1

P Q 57 B
M TN N 2 0 N 0 3Q 8

6

Power Plane

3

3
4

5 V_ EN 1

1 .5 V S _ CP U

1 .5 V S

1 M _0 4
P C2 0 4

20A

1 .5 V

200mA

P Q 15
P 2 7 03 B A G
6
5
2
4
1

D1 . 5V S _C P U _ L O

P Q5 7 A
MT N N 20 N 0 3 Q8
2
1

P R2 3 0

1.5VS_CPU

1.5VS
N M OS

ON

S

5VS
NM OS

ON

ON

6

1 . 05 V S _ V T T_ E N # 20

6

5V

S Y S 1 5V

* 0 . 1u _ 16 V _ Y 5 V _ 0 4

MT D N 7 00 2 Z H S 6 R

ON

8
7

3, 3 7 , 3 8

P C 1 84
P Q 18 B

10 0 K _ 04
5

V DD 5

S US B

D

5G

6 , 2 0 , 29 , 3 4 S U S B #

1
P Q6 9B
MT N N 2 0 N 0 3Q 8

4

4

P Q 4 5B
M TN N 2 0 N 0 3 Q8

EMI

S Y S 1 5V

P R 1 14

4

2 2 0 0p _ 5 0V _ X 7 R _ 04

P R 26 9
1 0 0_ 0 4

10 u _1 0 V _ Y 5 V _0 8

0. 1 u _ 50 V _ Y 5 V _ 06

C 6 60

SY S5 V

P C 22 8

0 . 1 u_ 1 6 V _ Y 5V _ 0 4

3

1. 0 5 V S _ V T T_ E N 1

C2 5
0 . 1 u_ 5 0 V _Y 5 V _ 0 6

B.Schematic Diagrams

Sheet 35 of 49
5VS, 3VS, 3.3VM,
1.5VS_CPU

ON

P C2 2 7

1 M _0 4
C 24

2 N 3 90 4

S Y S 5V

P R 2 45

V IN

P Q4 6

10A 1. 0 5 V S _ V TT

MT N N 20 N 03 Q8
2
1

8
7

B

10 0 K _ 04

P Q4 5 A

SYS1 5 V

V IN

2 , 3 , 5, 23 , 2 4, 25 , 3 9 1. 0 5 V S _ V TT

P Q6 9 A
MT N N 20 N 0 3 Q8
2
1

NM OS

6

1 .0 5 V S

P R2 4 2

C

P 28 0 8A 1

3

28

R 2 21

1

VA

3

R 2 60

ON

P Q6 7
MT N 7 0 02 Z H S 3

42
VA
36
V IN 1
2 8, 3 6
VDD 5
24
1 . 5V S
3 ,6 ,3 8 1 .5 V S _ CP U
36
S Y S 5V
3 6, 3 7 S Y S 1 5V
25 , 2 7 , 28 , 2 9 , 37 , 3 8 5V
6 , 1 8 , 19 , 2 0 , 24 , 2 5 , 29 , 3 7 , 38 , 3 9 1. 05 V S
1 1 , 3 6, 3 7 , 3 8, 3 9 , 4 0, 4 1 , 4 2 V I N
3 , 6 , 8 , 9, 1 0 , 2 5, 2 9 , 3 7, 3 8 1 . 5V
1 8 , 2 7, 2 8 , 3 0, 3 4 , 3 6, 4 2 V D D 3
11 , 1 8 , 24 , 2 5 , 27 , 2 8 , 31 , 3 2 , 33 , 3 9 , 40 , 4 1 5V S
2 , 3 , 5 , 2 3, 2 4 , 2 5, 3 9 1 . 05 V S _ V T T
2, 3 , 8 , 1 1, 1 2 , 1 6, 1 8 , 1 9, 2 0 , 2 2, 2 3 , 2 4, 2 5 , 2 7, 2 8 , 2 9, 3 0 , 3 3, 3 7 , 3 8, 3 9 3 . 3V
3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0, 3 1 , 3 2, 3 3 , 3 4, 3 9 3 . 3V S

Schematic Diagrams

VDD3, VDD5
V R E F _ V DD

P R 87

* 0 _0 4

P R8 8

0_04
PC 5 8

1 u_ 1 0 V _ Y 5 V _ 0 6
VFB 1

T ON S E L

VFB2
PR 9 1
E N _ 3V

P R9 0
E N _5 V

P C 63
1 0 0K _0 4

P C6 1
1 00 0 p _ 50 V _ X 7 R _ 0 4

1 0 0 K_ 0 4
1

2

E N1

SYS5 V

P C 17 9

P HA S E 1

21

1 u _ 2 5V _0 8
UG A T E 1

20

P HA S E 1

19

L GA T E 1

C

A

P R9 4
EN _ AL L
R B 0 5 40 S 2
* 6 80 K _ 1 % _ 0 4

V R E F _ V DD
V R E G5

P R 1 02

0 _ 04

P R 1 00

*0 _ 0 4

PR 9 9

0_04

P C7 1

PD 9
C

Ra

P D1 1

V DD 5
P J1 7
1

2
*5 m m

P R8 9

1 0 00 p _ 50 V _ X 7 R _ 0 4

P D 10
B A T 54 S W G H
A 1
3 C
A 2

V R E G5

Rb
P R8 4
1 9 . 1 K _ 1 % _0 6

SY S5 V
S Y S 1 0V

0 . 0 1 u_ 5 0 V _ X7 R _ 04

P C8 2
+

P C 1 85
0 . 1 u _1 6 V _ Y 5 V _ 0 4

Sheet 36 of 49
VDD3, VDD5

P C7 0

P C7 3
A

P C 69

4 . 7 u _2 5 V _ X 5 R _ 0 8

VI N

SY S5 V

P C6 0

P 12 0 3 B V

R B 0 54 0 S 2

*0 _ 0 4

P R1 0 1
2. 2 _ 0 6

1026

V IN1

P R 98

VDD5
5A

3 0 K _ 1 % _0 6

VR EG 5

M9 90 12 5

P R9 7
*0 _ 04

4 . 7 u _2 5 V _ X 5R _ 0 8

PL 1 0
T M P C 0 6 0 3H -4 R 7 M -Z 0 1
2

P Q5 0
1
2
3

18

17

16

25
15

14

C

P D1 2

C

5
6
7
8

C

1

P D6
13

A

P C 1 80

4. 7u _ 2 5 V _ X5 R _0 8

4

PD 7
V R E G5

P C2 0 7 P C2 0 8
+
+

P C7 5

P Q4 9
P 1 20 3 B V

4

V CL K

L DO 5

L G ATE1
V IN

E N0

GN D P A D
G ND

LG A T E 2

4

3
2
1

P D 14

0 . 1 u _ 50 V _ Y 5V _0 6

1 5 u _2 5 V _ 6 . 3 *4 . 4

UG A T E 1

P HA S E 2

V IN_ 6 1 8 2

2 0 K _ 1 % _0 4

12

UG A T E 2

S K IP S E L

P R8 6

L G AT E2

uP6182

S K IP S E L

8
7
6
5
C

C
1 3 K _ 1 %_ 0 6

P D 13

A
*S K 3 4S A

0 . 1 u _1 6 V _ Y 5V _ 0 4

P C5 9

CS O D1 4 0 S H
A

2 2 0u _ 6 . 3 V _ 6 . 3* 6 . 3* 4 . 2

PR 8 5

1 00 p _ 5 0V _N P O _0 4

PC 8 1
+

11

P Q5 1
P 12 0 3 B V

*5 m m

P C1 8 6

10

P HA S E 2

P C6 5
B O OT 1

B O OT 1

3
2
1

PL 1 1
T MP C 0 6 03 H -4 R 7 M- Z 01
2
1

1

P R 92
* 10 K _ 0 4
P O K _ 61 8 2

22

1
2
3

4

SYS3 V
P J 19

B OO T 2

0. 1u _ 5 0 V _ Y 5 V _ 0 6
U GA TE 2

23
PO K

9

R B 0 5 4 0S 2

1 u _1 0 V _ Y 5 V _ 0 6

P C6 8

PD 8
B A T 54 S W G H
A 1
3 C
A 2

2 2 0 0 p_ 5 0 V _ X7 R _ 04

S YS1 5 V

0 . 0 1 u _ 50 V _ X 7 R _ 0 4
P C6 7

2 2 0 0 p_ 5 0 V _ X7 R _ 04

VR EG 5
E N_ 3 V 5 V

P R 81

* 0_ 0 6

P R 15 3

E N_ 5 V
* 10 m i l _s h o rt

E N_ 3 V

P R 83

3

D

4

1 0 K _0 4

S
MT D N 7 0 02 Z H S 6 R

P Q 12 B
5G

1

6

D D _O N _ E N _ V D D
D

2G
S

PJ 6
*4 0 m i l

P Q6 3 A

6

M TD N 7 0 0 2 Z H S 6 R

A C _ IN

P C 57

0 . 1 u_ 1 0 V _ X 5R _ 04

1 00 K _ 0 4

D

2G
1

42

2

1

28 , 3 4 , 3 5 D D _ O N

PR 8 2

S

P Q1 2 A

MT D N 7 0 02 Z H S 6 R
Support Intel V-Pro Function

35
V IN 1
2 8 ,3 5
V DD 5
35
SYS5 V
3 5 , 3 7 S Y S 15 V
1 1 , 3 5, 37 , 3 8 , 3 9 , 40 , 4 1 , 4 2 V I N
18 , 2 7 , 2 8 , 30 , 3 4 , 3 5 , 42 V D D 3

VDD3, VDD5 B - 37

B.Schematic Diagrams

V DD 3

2

LD O3
B OO T2

5
6
7
8

8
7
6
5

5A

PC 6 4

* 1 5u _ 2 5 V _ 6. 3 * 4. 4

8
1u _ 1 0V _Y 5 V _ 0 6
P Q5 2
P 12 0 3 B V

A
C S OD 1 40 S H

4. 7 u _ 2 5V _X 5 R _0 8

P C6 2

VDD3

? ? ? ? ? ?

V IN
24
VO 1

A
* SK3 4 SA

4 . 7 u _ 25 V _ X 5 R _ 0 8

P U5

2 2 0 u _6 . 3 V _ 6 . 3 *6 . 3 *4 . 2

V O2

P C1 7 6

3

4

7
PC 1 7 5

VFB1

VI N

VR EF

E N2

VFB2

V RE G 3

TO N SEL

5

6

1 0 00 p _ 5 0V _ X 7 R _ 0 4

Schematic Diagrams

Power 0.85VS, 1.8VS, PEX_VDD
PEX_VDD
1.05V@4A
250 MIL

PQ 5 A
M T N N 20 N 0 3 Q8
2
1

1

PJ 1

P EX _ VDD

? ? ? ? PIN6? <2mm
5V

*1 0 m i _l s ho rt

2

3 .3 V

1 M _0 4
0 . 1u _ 1 6V _Y 5 V _0 4

1 0 u _1 0 V _ Y 5 V _ 0 8

D02 CHANGE

D

PQ 5 B
M TN N 2 0 N 0 3 Q8

6 8 0 0p _ 5 0V _ X 7 R _ 0 4

P R 22 6

3. 3V

5

G

R5 4 7

P Q7 0
M T N 7 0 02 Z H S 3

P R 22 9

5V

10 K _ 0 4

1
6

P R 22 4

SUSB

1M _0 4

E N 1 . 8V S

0_04

E N 1 . 8V S 1

2A

VCN T L
4

1. 8 V S
1

1

2
GN D

*1 u _ 6 . 3V _ Y 5V _ 0 4
P Q6 3 B
MT D N 70 0 2 Z H S 6 R
P C 19 4

VF B

P C1 8 7

1. 27 K _ 1 %_ 0 4
P C1 8 9

8 2 p_ 5 0 V _ N P O _0 4

P C1 8 3
0 . 1 u_ 1 6 V _ Y 5 V _ 04
22 0 0 p_ 5 0 V _X 7 R _ 0 4

PC1 9 0

P C 1 91

P C 1 93

V F B _6 6 1 0 P R 22 7

AX66 15ESA
M 990 12 5

S

2

O P E N_ 3 A

V OU T
EN

dG P U _ P W R _ E N # 1 2 , 22 , 3 4

PJ 2 1

V OU T

8
P C 18 8

5G
4

2

3 ,3 5 ,3 8
P R 3 10

V 1. 8

2 . 2 u_ 6 . 3 V _ Y 5 V _ 06

6
VIN
VIN
P OK

D

PJ 2
4 0m i l

P O K _ 66 1 0

3

S

dG P U _ P W R _ E N # _ R

5
9
7

1 0 K _0 4

1 .8 VS _ P W RG D

3, 2 0 1 . 8 V S _ P W R G D

3

4

1 0 _ 04
P C 2 29

P U 11

P R2 2 3

3

1 . 0 5V _ P W R _ E N

P C2 3 1

P C 19 2

2A

*O P E N _ 5 A

PC2 3 0

1 0 u_ 1 0 V _ Y 5V _0 8

8
7

P R 2 22

1.8VS

0 . 1 u _1 6 V _ Y 5 V _0 4

N M OS

1 . 05 V S

*1 0 u_ 1 0 V _Y 5V _ 0 8

SYS1 5 V

P R 22 8

10 u _ 10 V _ Y 5 V _ 0 8

1 K _ 1 %_ 0 4

*0 . 1 U _ 1 0 V _X 5 R _ 0 4

ON
GS7113 6-02-07113-320
AX6610 6-02-06610-320
APL5930KC 6-02-05930-420

N M OS

VIN

FBVDDQ

S S _0 . 8 5 V S 3 . 3 V

1 2 K _1 % _ 04

2

* OP E N _ 11 A
P R1 9 4

10 . 7 K _ 1% _ 0 4
9 . 1 K _1 % _ 04

E A P _0 . 8 5 V S

P R 19 5

10 K _ 1 %_ 0 4
S E T 3 _ 0. 85 V S 6
S E T 2 _ 0. 85 V S 7
S E T 1 _ 0. 85 V S 8
S E T 0 _ 0. 85 V S 9
10
F B_ 0 .8 5 VS

ON
P R 20 1

1K _ 1 % _0 4

P R 20 4

D

P S _ N V V D D _ P GO OD #

PC1 4 7
22 _ 0 4

0 . 0 1u _ 5 0V _ X 7 R _ 0 4

C S N _ 0. 8 5 V S

P R 20 2
*0 _0 4

MT N 70 0 2 Z H S 3

47 p _ 50 V _ N P O _ 04

5V
P R 20 6

10 0 K _ 1% _ 0 4

P R 2 05
1 00 K _ 0 4
6 V CC S A _ V ID0
6 V CC S A _ V ID1

0 . 0 1u _ 5 0V _X 7 R _0 4

G
S

4 1 P S _ N V V D D _ P G OOD

P C 1 45

0. 1u _ 5 0V _ Y 5V _ 0 6

PJ 2 6
1
* 6m i l
PJ 2 8
2

C S P _0 . 8 5 V S
C S N _ 0 . 8 5V S

1

1 0 _0 4

PC1 6

10 0 K _ 0 4
2

P R 2 08

* 6m i l

P R2 3 7

D
S
1
2

4 0m i l

B - 38 Power 0.85VS, 1.8VS, PEX_VDD

P C1 4 4

0.9 V

G

P J 29

PJ 3 0
1 2 K _ 1% _ 0 4

P R2 0 0

1. 3K _ 1 % _0 4

PC1 5 1

PR 2 4

0_04
V C CS A _ S E N S E 6

P Q3 9
3 5 1. 05 V S _ V T T _P W R G D #

P C 1 41
+
P R1 2
0_ 0 4

PR 7
P Q 31 B
P D 15 0 3 Y V S

33 K _ 1 % _0 4

* 6m i l

0 . 8 5 V _O N

0 _ 04

V 0 . 85 P J 1 4
0 .8 5 VS
OP E N -6 mm
1
2

6A

3
P R1 9 6

3 .3 V
0 . 85 V _ ON

P C 14 8
P C1 5 0

PL 5
TM P C 0 6 0 3H -1 R 0 M-Z 01
1
2

P H A S E _ 0 . 8 5V S
L G_ 0 . 85 V S

PR 1 1

C OM P _0 . 8 5 V S

P Q7 3

8

0. 1 u _ 50 V _ Y 5V _ 0 6

R T _ 0 . 8 5V S

11
12
13
14
15

D02 CHANGE

P Q3 1 A
P D 1 5 0 3Y V S

5 6 0 u_ 2 . 5 V _ 6. 6 * 6. 6 * 5. 9

1 00 K _ 0 4

21
20
19
18
17
16
C S P _ 0 . 85 V S

P R3 1 1

S E T3
S E T2
S E T1
S E T0
FB

GN D
PH ASE
LG
VCC
RT
C SP

PC1 4 0

7

5
4
3
2
1
15 K _ 1 %_ 0 4
P R1 9 9

PC1 9 8

5
6

3. 3 V

P R1 9 8

EAP
SS
P OK
U G
B OO T

5
6

6

5

PU 9
u P 6 12 2

C O MP
VID 0
VID1
EN /PS M
CS N

6 8 0 0p _ 5 0V _ X 7 R _ 0 4

P Q 72 B
M T N N 20 N 03 Q8

*3 3 0 u_ 2 . 5 V _ V _A

P Q7 1 B
MT N N 2 0N 03 Q 8

4

4

+
P C 2 32

0.85VS

B OO T _0 . 8 5 V S
1
2

P C 52
1 00 _ 0 4

0 . 1u _ 1 6V _ Y 5 V _ 0 4

1 0 u _1 0 V _ Y 5 V _ 0 8

R B 0 5 40 S 2
1 0 _0 4

1

P C2 3 4

0 . 1u _ 1 6V _Y 5 V _0 4

P D 21

10 K _ 0 4
P R 18 8

2

P C2 3 3

P R 27 5

3

F B V D D Q _P W R _ E N

P R1 8 7

0. 1u _ 5 0V _ Y 5 V _ 0 6

PJ 3

1 M _0 4

0 _ 04

4

1

F B_ VDD Q

0. 0 2 2 u_ 1 6 V _ X 7R _ 04

240MIL

3

P R 2 74

P R 18 9

4 . 7 u _2 5 V _ X 5R _ 08

PC1 3 7
10 K _ 1 %_ 0 4

A

F B V DD Q

P C1 2 3

5V

11A

SYS1 5 V
P Q7 1 A
MT N N 2 0 N 0 3Q 8
8
2
7
1

20

P C 1 22

P R1 9 3

0. 8 5 V S _ P W R GD

0 . 1 u_ 5 0 V _ Y 5V _0 6

P R1 9 2

9. 3 1 K _ 1% _ 0 4

4. 7u _ 2 5V _ X 5 R _ 0 8

9 . 3 1K _ 1 % _0 4
P R1 9 1

P C1 2 1

P R1 9 0

C

P Q7 2 A
MT N N 2 0 N 0 3Q 8
8
2
7
1

P C 13 1

1 . 5V

*0 . 1 u_ 1 6 V _ X 7R _ 06

Sheet 37 of 49
Power 0.85VS,
1.8VS, PEX_VDD

1 u_ 1 0 V _Y 5V _ 0 6

B.Schematic Diagrams

P C2 3 6

MT N 70 0 2 Z H S 3

* 1 u_ 6 . 3 V _ X5 R _ 0 4

VC CS A_ VI D0
VC CS A_ VI D1

0
0
SET0

6
0 . 8 5V S
25 V 0 .67 5V
6 , 2 3 , 24 1 . 8 V S
35 , 3 6 S Y S 1 5V
3 , 6 , 8, 9, 1 0 , 2 5, 2 9 , 3 5 , 38 1 . 5 V
12 , 1 3 P E X _V D D
1 3 , 1 4 , 15 F B V D D Q
35 , 3 6 S Y S 5 V
2 5, 2 7 , 2 8, 2 9 , 3 5 , 38 5 V
11 , 3 5 , 3 6, 3 8 , 3 9, 4 0 , 4 1 , 42 V I N
6 , 1 8 , 1 9, 2 0 , 2 4, 2 5 , 2 9 , 35 , 3 8 , 39 1 . 0 5 V S
2, 3, 8 , 1 1 , 12 , 1 6 , 1 8, 1 9 , 2 0, 2 2 , 2 3 , 24 , 2 5 , 27 , 2 8 , 2 9, 3 0 , 3 3, 3 5 , 3 8 , 39 3 . 3 V

0 .8V

0.7

0
1
SET2

1
0
SET1

1
1
SET3

Schematic Diagrams

Power 1.5V/1.05VS/0.75V
4
2
3
1
23

22
V LD OI N

10 u _ 10 V _ Y 5 V _ 0 8

VBST

VBST

P C 1 81

0 . 1 u _1 0 V _ X 7R _ 04

PJ 8
1

24

VTT

P C8 3

V TT

21

DR V H

20

LL

19

DR V L

V TT G N D

2
1 .5 V

P R1 1 9
2

13

P G OO D _ 6 1 63

11

S 5 _ 6 16 3

9
V D D QS E T
V D DQ S E T

PC 7 7

10

A

2
3
1
PQ 1 9
ME 4 6 2 6 -G

2 . 2 _0 6

P C7 9

D02 CHANGE
? ?

3 . 3V

P R1 1 6

8/18

DEL PR223,PR222,PC177
P R 22 0

P R 1 06
1 0 0K _0 4

GN D

S3
NC

5
6
7
8

5
6
7
8
P R1 1 0

S5

NC

D
S

P R 1 08

15
14

P G OO D

V D D QS N S

P D1 6

4

P Q5 4
ME 4 6 26 -G

P C1 7 1

0 _ 06

D D R 1. 5V _ P W R GD

Sheet 38 of 49
Power 1.5V/1.05VS/
0.75V

D D R 1 . 5 V _P W R G D 2 0

5V
*1 0 K _ 1% _ 0 4
P R1 0 4

5V

9 . 5 3K _ 1 % _ 06

P R1 0 5

P R2 2 1

2G

1 0 0 K _ 04
3

6

P C6 6
D
P Q 14 A
S US B

4 7K _0 4

0 . 1u _ 1 6 V _Y 5 V _0 4

D

2G

PJ 7

P Q1 7 A
D
M T DN7 0 0 2 Z HS 6 R

PQ 1 6

M TD N 7 0 0 2Z H S 6 R

5G

*MT N 70 0 2 Z H S 3

S U S C#

40 m i l
4

1

20 , 3 4

0 . 1 u _1 6 V _ Y 5 V _ 0 4

G

S

P Q1 7 B
S

9 . 7 6K _ 1 % _ 06

PC 7 4

D

PR1 0 9
VTTEN

S

* 1 00 K _ 0 4

6

P R9 3

1

1 0 0 K _ 04

1

1 .5 S _ CP U _ P W RG D

P R9 5

5V

S

2

5V

28 , 3 5

D D _O N #

M T D N 70 0 2 Z H S 6 R

VIN

PD 2

1 u _ 10 V _ Y 5 V _ 0 6
1 . 5 S _ C P U _P W R G D

D

* 1 5u _ 2 5V _ 6 . 3 *4 . 4 _ C

0 . 1 u _5 0 V _ Y 5 V _ 06

4 . 7 u _2 5 V _ X 5 R _ 0 8

0 . 1 u_ 5 0 V _Y 5V _ 0 6

1.05VS
20A

V1 .0 5

2

S K 34 S A

*O P E N -1 2 m m
+

P C 15 8

P C1 6 0

Q 12

1

PD 3
4

PR 1 8

P J3 1
* 6 mi l

0_ 0 4
2

P C 15 9
+

C

5
6
7
8

* ME 4 6 26 -G

D02 CHANGE

*6 m li P J 4 2
2
1

V C C P _ S E N S E _ 6 12 7
3 . 3V _E N _ D G
B

PR1 6

P C2 2

4. 0 2 K _ 1 %_ 0 4

*1 5 p_ 5 0 V _ N P O _0 4

V CC P _ S E N S E 5

S

C

* MT N 70 0 2 Z H S 3

1 . 0 5V S

P J 15

0 . 1u _ 1 6V _ Y 5 V _ 0 4

? ? ? ? PIN3?
PC 2 0

* 1 0K _ 0 4

* 10 K _ 0 4

P C 1 25
+

1

* 56 0 u _2 . 5 V _ 6 . 6* 6 . 6* 5 . 9

17

5

6

7

8

R 1 65

P Q3 7
P Q 34
M E 4 6 26 -G
4

DL

A

PAD

4

2
3
1

GN D

DL
N.C

3. 3V

FB
N.C

9

BST

3

3 .3 V

1. 5 V S _ C P U

5
6
7
8
2
3
1

BST
V CC

5 6 0 u_ 2 . 5 V _ 6. 6 * 6. 6 * 5. 9

FOR S3 REDUCE ? ?

P C 1 35

1

10
V O UT

P C 1 34

LX
2

PG D
P K 3 9 06

R 16 6

C

LX

11

1 . 05 V S _ P W R GD

P C 13 0

PL 6
T M P C 1 0 04 H -1 R 0 M-Z 0 1
1
2

0 . 1 u _5 0 V _ Y 5 V _ 0 6
DH

14

PC 1 7

16
N.C

12

N.C

10 K _ 0 4

I LI M

P R 10

15

D H

IL IM
13

*0 . 1 u_ 1 6 V _ Y 5 V _ 04

2
3
1

4

4

EN
2 0 1. 0 5 V S _ P W R GD

P Q 35
M E 4 8 94 -G

P C1 5

MT D N 7 00 2 Z H S 6R

3 .3 V

10 K _ 1 % _0 4

P U1
U P 6 1 27

S

RT N

3
5G

P Q 1 4B

P C 13 2

R B 0 54 0 S 2
PR 9

S US B

D

4 . 7 u_ 2 5 V _ X 5R _ 08

1 . 05 V _ O N

1 00 K _ 0 4

5
6
7
8

P R8

A

D02 CHANGE
OCP? ?

5V

Q 11

P R1 4

VSSP_ SEN SE 5
? ? ? IC PIN5,6 ? ? ? ?

0_ 0 4

1

*6 m il

PJ 3 2

E

* 2N 3 90 4

2

5V

P R1 3

F B _1 . 0 5 V S _ 6 12 7

* 9 0. 9 K _ 0 4

P C1 9

P C2 1

PR1 5

0. 0 1 u _ 16 V _ X 7R _ 04

*2 0 p _5 0 V _ N P O _ 04

10 K _ 1 % _0 4

3, 6 , 3 5 1 . 5V S _C P U
9, 10 V T T _ ME M
3 5 , 3 6, 3 7 S Y S 1 5V
1 3 , 1 4, 1 5 , 3 7 F B V D D Q
25 , 2 7 , 28 , 2 9 , 3 5, 3 7 5 V
11 , 3 5 , 3 6, 3 7 , 3 9 , 40 , 4 1 , 4 2 V I N
6 , 1 8 , 1 9, 2 0 , 2 4 , 25 , 2 9 , 35 , 3 7 , 3 9 1. 0 5 V S
3 , 6 , 8 , 9, 1 0 , 2 5 , 29 , 3 5 , 3 7 1 . 5 V
2 , 3 , 8 , 11 , 1 2 , 16 , 1 8 , 1 9, 2 0 , 2 2 , 23 , 2 4 , 2 5, 2 7 , 2 8, 29 , 3 0 , 33 , 3 5 , 3 7, 3 9 3 . 3 V

Power 1.5V/1.05VS/0.75V B - 39

B.Schematic Diagrams

PC 7 2

* MT N 7 0 02 Z H S 3

C OM P

4

D02 CHANGE

1 u _1 0 V _ Y 5 V _ 06

G

V D DQ S NS 8

*1 0 00 p _ X 7 R _ 0 4
* 10 _ 0 4

* 10 0 0 p_ X 7 R _ 0 4

P Q1 3
SU SB

C O MP _ V D D 6

P V CC5
V CC5

V TT R E F

1 0K _ 1 % _0 6

1u _ 1 0V _ Y 5 V _ 0 6

P C 76

0_ 0 6

P R 1 07

P R 1 03

5V
*2 2 _ 04

CS

P D 15

0_06
5V

P R 11 2

* 5 . 1_ 0 6

V T TR E F 5
0. 1 u _ 10 V _ X 7 R _ 0 4

P R 11 5
C S

2
3
1

M OD E
P C7 8

18
17
16

7

* 0 _0 6

4

P C 1 72

25

P R 1 11

MO D E

12

* 0 _0 6

P GN D
C S _ GN D

P C 17 4
P C 1 73
+
+

0. 1 u _ 1 6V _ Y 5 V _ 0 4

P R 1 13

G ND

OP E N _ 8 A

0. 1 u _ 16 V _ Y 5 V _ 0 4

5V

0_06

C

D RV L
0_06

3
P R 1 17

A

V TT S N S

10 u _ 10 V _ Y 5V _ 0 8 *1 0 u _1 0 V _ Y 5 V _ 0 8

V D DQ

C S O D 1 4 0S H

1 0 u _ 10 V _ Y 5 V _ 0 8

3 , 3 5, 3 7 S U S B

PJ 1 6
1

P C8 4

C

P R1 2 1
0_ 0 6 V T T S N S

LL

5 60 u _ 2. 5 V _ 6 . 6 *6 . 6 *5 . 9

P C8 6

* 1 00 0 p _5 0 V _ X 7 R _ 0 4

P C8 7

56 0 u _2 . 5 V _ 6 . 6 *6 . 6* 5 . 9

1
PC 8 8

PR 9 6

30A

3 . 3 _0 6

O P E N _2 A

V TT _ ME M

1.5V

V D DQ
PL 9
T MP C 10 0 4 H -R 56 M -Z 0 1
1
2

P R1 2 0

DR VH

*S K 34 S A

2

V T T _ ME M

P C8 9

0. 1u _ 5 0V _ Y 5 V _ 0 6

R B 0 5 40 S 2

V DD Q

P C8 5

P C9 0

5
6
7
8

uP 61 6 3

VTT_MEM

P C1 8 2

0. 1 u _ 50 V _ Y 5 V _ 0 6

P Q5 5
ME 4 8 94 -G

4. 7 u _ 25 V _ X 5 R _ 0 8

VI N
C

5V

4 . 7 u _ 25 V _ X 5 R _ 0 8

P D1 7
A

PU6

Schematic Diagrams

Power V-Core1
1.05VS_VTT
P C 1 64 6 80 p _ 50 V _ X 7R _0 4

P R2 8

P R3 3

P R4 7

13 0 _ 1% _ 0 4

*7 5 _ 04

5 4. 9 _ 1 %_ 0 4

2 4 . 9 K _ 1% _ 0 4

H_ C P U_ S V ID DA T
H _ C P U _ S V I D A LR T#
H _ C P U _S V I D C L K

B~ 43 50

P C 16 3

PUT COLSE
TO VCORE
Phase 1
Inductor

R T2

33 0 0 p_ 5 0 V _X 7 R _ 0 4

A_ GN D

1

2

1 00 K _ N T C _0 6 _ B
DI FFOU T

5 H_ CP U_ S V IDD A T
5 H _ C P U _ S V I D A L R T#
5 H_ CP U_ S V IDC L K

P R2 1 1

TSE NSE

P C 29
P R3 9

10 0 _ 04

P R4 0

1K _0 4

1 0 0p _ 5 0V _ N P O_ 04

PC 3 4

D02 CHANGE
? VALUE & FOOTPRINT

2 2 p_ 5 0 V _N P O_ 0 4
P R5 0

FB

T RB S T

P R 2 0 9 1 . 2 k_ 1 % _0 4

10/13

P R3 6
PC 3 0
4 . 0 2 K _1 % _ 04

3 3 00 p _ 50 V _ X 7R _ 04

P R 32

P R4 6
20 K _ 1 % _0 4

0 _ 04

PR 7 4

* 0_ 0 4
53
52
51
50
49
48
47
46
45
44
43
42
41
40

A_ GND

1
2
3
H_ CPU _S VIDD AT
4
5
H_ CPU _S VIDC LK
H_ CPU _S VIDAL RT# 6
7
VR_ RD YA
8
V R _ ON _E N A B L E _ 61 3 19
6 1 3 1_ VC C
10
11
PR 5 4
1 0K _ 0 4
V R MP _V I N 1 2
TSEN SEA 1 3

2 0 D E L A Y _P W R G D

5VS

V R _O N
2 . 2_ 0 6

P R5 3

P R5 2

0 _ 04
A_G ND

TSE NSEA

P R5 7

VIN

1 K _ 1% _ 0 4
P C3 9

P R6 1

1 u_ 6 . 3 V _X 5 R _ 0 4

PC 4 0

*1 4K _ 1 % _0 4

0 . 0 1 u_ 5 0 V _X 7 R _ 0 4

A_G ND

A_ GN D

IMO NA

N C P 6 13 1 S

V S N A _ 61 3 1
V S P A _ 6 13 1

1
2

B~ 3 964
1 0 0K _N T C _ 0 6_ B

P R 2 16

R T4

P C4 1

VSP
T S E NS E
V R H OT #
S DIO
S CL K
A L E RT #
V R_ R DY
V R_ R DY A
E N A B LE
V CC
RO S C
V RM P
T S E NS E A

1 0_ 0 4

CS N 1

40

CS N 3

40

CS N 3
P C3 7

10 0 0 p_ 5 0 V _X 7 R _ 0 4

P R 45

5 . 49 K _ 1 %_ 0 4

39
38
37
36
35
34
33
32
31
30
29
28
27

C SP3
C SN1

CS N 1
P C3 8

CS N 3
CS P P 3
CSN 1
CS P P 1
D R ON

0 . 0 4 7u _ 1 0V _ X 7 R _ 0 4

P R5 1

5 . 49 K _ 1 %_ 0 4
C SP1
D R ON

PR5 5

P R2 1 5
P R2 1 8

P R5 9

10 K _ 0 4

5VS

* 10 K _ 0 4

1 0K _ 0 4

PR 5 8

P R5 6
PR2 1 9

1 1 3K _ 1 % _0 4

1 0 K _ 04

76 . 8 K _ 1% _ 0 4
1 8. 7 K _ 1 %_ 0 4

2

1

P J2 4

* 6 mi l

A_ GN D
2 2 00 p _ 50 V _ X 7R _0 4

A_ GN D

P R2 3 2
PJ 2 3
*6 m i l

OPTION:
DISALBE
ICC_ M AX_2 1h A_ GN D
V_GT
=R *1 0uA*25 6A/ 2V

A_G ND

1 13 K _ 1 %_ 0 4

A_G ND
A_ GN D
CSN A

CSPPA

P C 48

2 4. 9 K _ 1 % _0 4

C SCO MPA

22 K _ 1 %_ 0 4

P C4 9

10 0 0 p_ 5 0 V _X 7 R _ 0 4 6 3 . 4K _ 1 % _0 6

40
P R6 4

PR 6 2

0 . 1u _ 1 0V _ X 5 R _ 0 4

1 3 . 7 K _1 % _ 04 0 2

0. 1u _ 10 V _ X 5 R _ 04

C OM PA

PUT COLSE
TO V_GT
HOT SPOT

P C4 5

68 0 p _5 0 V _ X7 R _0 4

D IFFO UTA
A_ GN D

A_ GND

A_G ND

A_ GND

P R7 0

P R 2 3 1 0 0_ 0 4

P C4 4

P R6 5
6 8p _ 5 0V _ N P O_ 0 4

FBA
P R 6 7 0 _0 4

R T3

40

V _ GT

1

PC 4 3

2

1 0 0 K _N T C _ 06 _ B

B~ 435 0

1 0 0p _ 5 0V _ N P O_ 0 4

P C 47
1 0 00 p _ 50 V _ X 7R _ 04
P R6 8

P R 2 5 1 0 0_ 0 4

D02 CHANGE
? VALUE

16 5 K _ 1% _ 0 6

1K _0 4

6 V S S _ G T_ S E N S E

6 V C C _ GT _ S E N S E

P R 73
7 5K _ 1 % _0 4

1 0 _1 % _ 04

PR 7 1
P R 6 6 0 _0 4

PC 5 0
3 . 01 K _ 1 %_ 0 4

3 3 00 p _ 50 V _ X 7R _ 04

PUT COLSE
TO V_GT
Inductor

3 .3 V S

1

1 0 K _0 4
P R 23 8

2

PJ 4
*6 m i l
P R6 3

*1 5 m li _ sh o rt
V R _ ON
2 , 3, 8 , 1 1 , 12 , 1 6 , 18 , 1 9 , 20 , 2 2 , 23 , 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0, 3 3 , 3 5, 3 7 , 3 8 3. 3 V
2, 3 , 5 , 2 3, 2 4 , 2 5, 3 5 1 . 0 5V S _ V T T
6 , 1 8, 1 9 , 2 0, 2 4 , 2 5, 2 9 , 3 5, 3 7 , 3 8 1. 0 5 V S
1 1 , 3 5, 3 6 , 3 7, 3 8 , 4 0, 4 1 , 4 2 V I N
1 1 , 18 , 2 4 , 2 5, 2 7 , 2 8, 3 1 , 3 2, 3 3 , 3 5, 4 0 , 4 1 5V S
3, 9 , 1 0 , 11 , 1 2 , 18 , 1 9 , 20 , 2 1 , 22 , 2 3 , 24 , 2 5 , 2 7, 2 8 , 2 9, 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 5 3. 3 V S

B - 40 Power V-Core1

CS N A

0 . 0 4 7u _ 1 0V _X 7 R _ 0 4
C SPA

P C 1 65

4 . 87 K _ 1 % _0 6

1 1 , 20 , 3 4 A L L_ S Y S _P W R G D

V R 1_ P W M 1 40

5VS

0 _0 4
V R 1 _P W MA 4 0

P R 72

A_ GN D

40

40
V R 1 _P W M3 4 0

P W M2 _ 6 13 1
I MA X _ 6 13 1
VR1 _ PWMA

P R 23 3

P C4 2

40

C S N 2_ 5 V S

C SSUM A
P R 2 10

40

0_04

I MO N

P C4 6

P R6 9

40

0 . 0 4 7u _ 1 0V _ X 7 R _ 0 4

5VS
P R4 2

C S N2
CS P 2
C S N3
CS P 3
C S N1
CS P 1
D R ON
P W M 1/ A D D R
P W M3 / V B O OT
P W M2 / I S H E D
I MA X
P W MA / I MA X A
V B O OT A

I MO NA

0_04

40

A_G ND

V S NA
VSPA
FBA
D I F F OU T A
T RB S T A
CO M P A
I LI M A
D R OO P A
C S CO M P A
I OU T A
C S S UM A
CS P A
C S NA

* 7 5_ 0 4

TSENSE

P R7 7

1 0_ 0 4

P R2 1 3

PU 3

EPAD
DIF F O UT
VSN
T RB S T
FB
C OM P
IL IM
D R O OP
C S C OM P
C S S UM
I OU T
C S RE F
NC 2
N C1

P R4 4

1 0 K _0 4

P R2 1 4

14
15
16
17
18
19
20
21
22
23
24
25
26

10 K _ 0 4

P R 49

C SP3

10 0 K _ 1% _ 0 6

D02 CHANGE
? VALUE

P C3 5

1.05VS

P R4 8

1 0 0 p_ 5 0V _N P O_ 0 4

V R1 _C SREF
I MO N

TR BST
*1 5 mi l _s h o r t

A_G ND

6-13-93121-28B

2 2 0 0p _ 50 V _ X 7 R _ 04

P C3 2

1

PR 7 5

3.3V

3 H _ P R OC H OT #

8 . 2 5 K _1 % _ 04

CSCO M P

PR6 0

PUT COLSE
TO VCORE
HOT SPOT

Sheet 39 of 49
Power V-Core1

C OM P_ CPU

R T1

P R 2 07
1
2

9 3 . 1 K _1 % _ 06

1 0 0K _N T C _ 0 6_ B

0 . 1u _ 1 0V _X 7 R _0 4

10 0 0 p_ 5 0 V _X 7 R _ 0 4

A_ GN D

0 . 1u _ 1 0V _X 7 R _0 4

B.Schematic Diagrams

PC3 3

P C3 1

CSSU M

5 V C O R E _ V C C _S E N S E

3.3VS

40

1 6 5K _ 1 % _0 6
PR 4 1

B~ 3 964

C SP1
P R 35

5 V C OR E _V S S _S E N S E
P C3 6

Qua d 45 W CPU
VID1 = 0.9 V
Ic cM a x= 9 4A
R_LL= 1. 9m oh m
OCP ~1 20 A

10 0 K _ 1% _ 0 6

7 5K _ 1 % _0 4

2

P R 21 2 10 _ 04

VCORE_1

Q ua d V CCAXG
VI D1= 1 .15 V
I ccM a x = 26 A
R_ L L= 3 .9m ohm
O CP~ 31 A

C SPA

40

40

Schematic Diagrams

Power V-Core2

EN
V CC

LG

PQ 4 3
M D U 26 5 4

P Q 42
M DU2 6 5 4

P Q6
M D U 2 65 4

G

G

G
S K 3 4S A

A

S

S

S

1 u _6 . 3 V _ X 5 R _ 04

*1 5 mi l _ sh o rt

V CC

LG

5

PQ 3
M DU2 6 5 4

P Q3 3
M D U 2 65 4

P C2 5

P L4
TM P B 1 23 5 MP -R 3 6M -Z 0 1
1
2

V R E G_ S W 3 _L G

1
G

G

A

SK3 4 SA

S

S

S

1u _ 6 . 3V _X 5 R _ 0 4

2
*1 5 mi l _ sh o rt

C S N3

39

PR 2 0

*1 5 mi l _ sh o rt

C SP3

39

VRE G_ SWA_ HG

7

VRE G_ SWA

0 . 1u _ 5 0V _ Y 5 V _ 0 6

V _G T

39

VRE G_ SWA_ L G
CSN A

39
+

P R 43

* 1 5m i _l s h ort

CSPA

39

P C1 6 6
+

V C OR E

+

PC1 3 9
+

5 6 0u _ 2 . 5V _ 6 . 6 *6 . 6 *5 . 9

P C1 4 9
5 6 0u _ 2 . 5V _ 6 . 6 *6 . 6 *5 . 9

A
5

SK3 4 SA

Colay

* 1 5m i _l s h ort

* 33 0 u _2 . 5 V _ V _ A

P C 1 62
P R 37

5 60 u _ 2. 5 V _ 6 . 6* 6 . 6* 5 . 9

G

P C 1 55
+

P C 1 57
+

P C 1 36
+

P C 14 3 P C 2 6
+

+

P C1 8
+

*3 3 0 u_ 2 . 5 V _V _A

G

*5 6 0u _ 2 . 5V _ 6 . 6 *6 . 6 *5 . 9

5

9

5 60 u _2 . 5 V _ 6 . 6* 6. 6* 5. 9

LG

V GFX_ COR E

PD5

5 60 u _ 2. 5 V _ 6 . 6* 6 . 6* 5. 9

V CC

P Q7
*M D U 2 6 5 4

PA D
PC 5 3

*1 5 mi l _ sh o rt

VGFX_CORE

PL 8
T MP C 1 00 4 H -R 3 6M -Z 0 1
1
2
PQ 4 7
M D U 26 5 4

GN D 6

EN

PR 2 9

S
8

5 60 u _ 2. 5 V _ 6 . 6 *6 . 6* 5 . 9

4

5VS

SW

C

2 K _1 % _ 04

HG

PW M

S

DRO N

BST

D

3

D

2
P R7 8

S

39

1

V R 1 _ P W MA

1 u_ 6 . 3 V _X 5 R _0 4

39

N C P 59 1 1

VGFX_CORE

P C1 6 7

4 . 7u _ 2 5V _ X 5 R _ 0 8

G
PU4

D02 CHANGE
CHANGE VALUE

P C 1 68

4 . 7 u_ 2 5V _X 5 R _0 8

PQ 8
M D U 26 5 7

D

0 . 2 2 u_ 1 0 V _X 7 R _ 0 6

Sheet 40 of 49
Power V-Core2

V C OR E 5

PL 1 3
PR 2 1
* TM P C 1 0 04 H -R 3 6 M-Z 0 1

PC1 6 9

P C5 1

39

G

9

2. 2 _ 0 6

39

CS P 1

V COR E

VIN

PR 7 6

CS N1

PD 2 2

PAD
P C1 4 2

PC2 3

1 5 u_ 2 5 V _6 . 3 *4 . 4

D
S

S
PQ 3 6
M D U 26 5 4

PC2 4

* 33 0 u_ 2 . 5 V _ V _A

4

5VS

7

G ND 6

EN

3 3 0U _ 25 V
*1 5 mi l _ sh o rt

PR 2 6

G

C

2K _1 % _ 04

SW

P WM

V R E G_ S W 3 _O U T
D

D RO N

3

V R E G_ S W 3 _H G

D

P R1 9 7

8

D

39

2

V R 1 _ P W M3

P Q4
M D U 2 65 7

G
HG

BST

V C OR E 5

PL 1 4
* TM P C 1 0 04 H -R 3 6 M-Z 0 1 P R 2 7

VIN
D

0 . 22 u _ 10 V _ X 7R _ 06

P U1 0 NCP 5 9 1 1
1

V COR E

2

6
V GF X _ C O R E
5
V CO RE
1 1 , 35 , 3 6 , 37 , 3 8 , 39 , 4 1 , 42 V I N
1 1 , 18 , 2 4 , 25 , 2 7 , 28 , 3 1 , 32 , 3 3 , 35 , 3 9 , 41 5 V S
3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 2 0 , 2 1, 22 , 2 3 , 24 , 2 5 , 27 , 2 8 , 29 , 3 0 , 31 , 3 2 , 33 , 3 4 , 35 , 3 9 3 . 3V S

Power V-Core2 B - 41

B.Schematic Diagrams

P C 1 46

PQ 3 8
M D U 26 5 7

D02 CHANGE
CHANGE VALUE
39

0 . 1 u _5 0 V _ Y 5V _ 0 6

1

PC1 3 8
+

2. 2 _ 0 6

D02 CHANGE
? ? DIP?

V R E G_ S W 1 _ L G

5

9

P R 20 3

+P C 17 7

P D4

PAD
P C 28

* 4. 7u _ 25 V _ X 5 R _ 0 8

D
S

P L7
TM P B 1 23 5 MP -R 3 6M -Z 0 1
1
2

V R E G_ S W 1 _ OU T

G ND 6

0 . 1 u _5 0 V _ Y 5V _ 0 6

4

7

4 . 7 u _2 5 V _ X 5R _ 08

2 K _ 1 %_ 0 4

5VS

SW

P C1 5 2

4 . 7 u _2 5 V _ X 5 R _ 08

D RO N

P WM

PC1 5 3

G

V R E G_ S W 1 _ H G

HG 8

C

3

PR 3 0

G

NCP 5 9 1 1

BST

P Q4 0
M D U 2 65 7

D

39

2

V R 1 _ P W M1

PQ 4 1
M D U 26 5 7

D

39

1

0 . 22 u _ 10 V _ X 7R _ 06

S

P U2

D02 CHANGE
CHANGE VALUE

P C2 7

D

2. 2 _ 0 6

D

P R 31

P C 1 54
*4 . 7 u _2 5 V _ X 5R _ 08

VIN

VCORE_2

Schematic Diagrams

Power VGA NVVDD
0.8125V

0.8625V

0.9125V

1
0

0
0

1
1

(GPIO5)

NVVDD_VID1
NVVDD_VID2

1

1

0

(GPIO7)

NVVDD_VID0

(GPIO6)

D 0 2 C H A NG E
? ? FO R N V VD D ? ? ? ?

*1 . 91K _1 %_0 4

P C2 44

VI N

1u _25 V _08 GN D _6 220

Input ? ?

VIN? ? Hi side Mosfet

B OOT1 _62 20

C

A
S K3 4S A

S

S
31

32

33

VI D 0

V ID1

V ID2

34

36

35
VI D 4

V ID3

37

EN

V ID5

V ID6

D

S

C LK EN # _6 220
39

38

40
C LK _E N #

D

VIN? ? Hi side Mosfet VIN

P R 124

*0 _04

P C 25 2

P R 28 6
PR 3 06

0_ 04

1 0K _1 %_0 4

12 PS 1_ VD D _ SE N S E
0 _04

4 7. u_ 25V _ X5R _ 08

20 0K _1% _04

D 0 2 C H A N GE
C H A NG E V AL U E

A GN D

PQ3 0
MD U 265 4
G

GN D _6 22 0

P Q32
MD U 2 654

P D 23

C

1 000 p_ 50V _X 7R _ 04

G

PJ 27

P R 29 3

D0 2 C HA N G E
? ?

P R 30 5

PL 15
T MPC 1 004 H -R 56M-Z 01
1
2
T M_62 20

P R 159
5. 1 _06
P R 3 02
0 _0 4

U G2,P H2,L G2? ? ? ? ? ? ? ? ? ? MOS FET
L AYOU T? ? ?
GN D _ 62 20

GND? ? Low side Mosfet GND

P C 25 1

41

U G1

B OOT1

I MON

Input ? ?

PR 3 03
0_0 4

P C 246

R T5

0_0 4

P R 30 4
1 _04

100 K_ N TC _ 06_ B

22 0p_ 50 V_ N PO_ 04
PR 3 07

NT C ? ? ? ? ?

12 K_ 1%_ 04

1 K_ 1%_ 04

5V S

1
P C 10 2
*1 000 p_ 50V _ X7R _ 04
PR 1 25
*0_ 04

P R 30 8

D 0 2 C H A NG E

0 . 1u_ 10 V_ X7R _ 04
GN D _ 622 0

PR 3 09

*0_0 4

PC 2 54

5 60_ 04
P C 24 0

V I N P R 28 4

220 p_ 50V _N P O_0 4
GN D _6 220

10K _1 %_ 04

I MON _6 22 0

P C 24 2
100 0p _50 V _X7 R _04

2 K _1% _04

* 6mi l

V GA_ VC OR E

0_ 04
1

0 0. 1u _50 V_ X 7R _0 4

P J 25

44 2. K _1% _04
P R 283
*5 _1% _04

P C 253

*1 u_1 0V _Y 5 V_ 06
3V 3_ R U N
P R 129

1 0K _0 4

V R _ON _ 62 20

PC 2 41
0. 0 47u _1 0V _X7 R _0 4
GN D _6 22 0

D 0 2 C H A N GE

P C 23 5

2

P R 28 2

? ? ? ? ? I C U P 6 22 0 P i n1 6

P R 2 34

P R 127

1u _25 V_ 08

P C 247

*6mi l

12 P S 1_GN D _ SE N S E

P C 10 0
*2 20 0p_ 50 V_ X7R _ 04

GND _ 62 20

D 0 2 C H A N GE
? ? P J4 4 F OR N V V DD C V T E S T
GN D _6 22 0

B - 42 Power VGA NVVDD

P C 10 7

4 7. u_ 25V _X 5R _ 08

P R 29 4
1 0K _1 %_0 4

V GA _V C ORE
2

20

18

2 200 p_ 50 V_ X7R _ 04
P R 12 6

19

R AM P

VCC
17

11
12

0_0 4

PR 2 36

P R 279

CS P

1S EN 2

15
2. 2_ 04
16

10

15 K_ 1%_ 04

CS N

0. 01 u_ 16V _X 7R _ 04

P C 12

4. 7 u_2 5V _X 5R _0 8

22
21

F B R TN

P C 2 49

P C 11

4. 7u _2 5V _X5 R _0 8

+

V IN

P H1

TB

14

9

13

10 0p_ 50 V_ N PO_ 04

PC 1 0

4 . 7u_ 25 V_ X5 R _08

A
S K3 4S A

P GN D 1
FB

P R 292

PR 3 00

23

D

C OMP

8
P C 2 50

B OOT1 _6 220

PS1_ VDD_ SENS E , V GA_V CORE , P S1_G ND_S ENSE ? ? ? ? ? ? ? ?

L G1

7

*10K _ 1%_ 04

D0 2 C HA N G E

25
24

VI N

*2 2_ 1%_ 04

GN D _62 20

PV C C

PR 2 76

*0. 01 u_ 50V _ X7R _ 04

P R 30 1

P C9

G

EA P

*82 0_1 %_0 4
5 VS

P C 24 5

TM

6

PR 2 90

PQ2 9
MD U 265 7

S

5V S

0_ 04

1 SE N 1
D A C /S S

P R2 89

L G2

GND

VR _ TT#

+

D

P R 28 8

RT

H _P R OC H OT# _62 20 4
1 00K _0 4
TM_ 622 0 5

26

S

GN D_ 62 20

P GN D 2
3

D

33 K_ 1%_ 04

S

PR 2 87

+

17
NV V DD
1 1, 35 , 36, 3 7, 38 , 39, 4 0, 42 V I N
11 ,1 8, 24 , 25 ,2 7, 28 , 31, 3 2, 33 , 35, 3 9, 40 5 VS
1 8, 27 , 28, 3 0, 34 , 35, 3 6, 42 V D D 3
3, 6, 8 ,9 , 10, 2 5, 29 , 35, 3 7, 38 1 . 5V
12 , 16 3 V3 _R U N
2 3, , 8, 11 , 12, 1 6, 18 ,1 9, 2 0, 22 ,2 3, 24 , 25, 2 7, 28 , 29, 3 0, 33 , 35, 3 7, 38 ,3 9 3. 3 V

2

R T6
10 0K _N TC _ 06 _B
1

+
5 60u _2 . 5V _6. 6 *6. 6* 5. 9

Input ? ?

28
27

+

N V VD D
2

*12 mm

P C 11 1

2. 2_ 06

P R 291
1_ 04

P R 299
12 K _1% _04
V IN

0. 1u _1 0V _X 7R _ 04

P R 295

22 0p _50 V _N P O_04

*3 30u _2 .5 V_ V _A

29

P R 123
0_ 04

P C 23 9

P J11
1
P C9 7

G

P R 16 5
5. 1 _0 6
P R 2 98
0 _0 4

0 . 1u_ 10 V_ X7 R _0 4

P H2

PD1

V GA _V C OR E

40 A
P C 99

10 K_ 04

N12E_VGA
P Q22
MD U 2 654

*33 0u_ 2. 5V _V _ A

U G2

4. 7u _2 5V _X 5R _0 8

GND? ? Low side Mosfet
12
D0 2 C HA N G E T MPCPL1 004
H -R 56M-Z 01
2
CH A N G E V A L UE 1

P C 95

P R 14 0
P R 17
P R 136

2. 2_ 06

U G1,P H1,L G1? ? ? ? ? ? ? ? ? ? MOS FET
L AYOU T? ? ?
D 0 2 CH A N G E
F O R EM I C HA N G E

30
BOOT 2

PC 9 8

4. 7u _25 V _X5 R _08

Input ? ?

G

PS I #

PC 5

4 . 7u_ 25 V_ X5R _ 08

G
PQ1
MD U 265 4

POK

P C2

4 . 7u_ 25 V_ X5R _ 08

PC 9 4

P SI #_ 62 20 2

P C4

4 . 7u_ 25 V_ X5 R _08

56 0u_ 2. 5V _ 6. 6*6 . 6*5. 9

1
3 7 P S_ N VV D D _P GOOD

D 02 C H AN G E

P C3

5 60u _2 .5 V _6. 6 *6. 6*5 . 9

U P 622 0A

P R 281

PQ2 1
MD U 265 7

P C 10 6

PU 7

D 0 2 C H A NG E
F O R E M I C H A N GE

PC 1 03

Sheet 41 of 49
Power VGA NVVDD

P R 28 5
1 0K _04

P R 280

GN D _62 20

OS M

1 K_ 1%_ 04
1K _ 1%_ 04
1K _1 %_0 4

3V 3_ R U N

P R 29 7 0_ 06

V R _ON _6 22 0

B.Schematic Diagrams

PR 2 96 0_ 06

D

P R 5 *10 mi _l sho rt
P R 6 *10 mi _l sho rt
P R 14 2 *10 mi l_ sho rt

16 NV V D D _V I D 0
16 NV V D D _V I D 1
16 NV V D D _V I D 2

1

A

1u_ 25 V_ 08

P D2 5
R B0 54 0S 2

2

A

C

P C 24 8

1 u_2 5V _0 8

P C 24 3
PD 1 8
R B0 540 S 2

C

*1K _1 %_0 4
*1 K _1% _04
PR 3 12
P R 31 3

5 VS

P R 235

1K _1 %_0 4
1K _1 %_0 4
1K _1% _04
1 K_ 1%_ 04

3V 3_R U N

P R 141
PR 1 39
PR 1 30
P R 13 1

3V 3 _R U N

Schematic Diagrams

AC_IN, Charger
VA

1
2
3

VA
J _ D C -J A C K 1
5 0 9 32 -0 0 30 1 -0 01

P L1
H C B 45 3 2 K -8 00 _ 1 8

1
2
GN D 1
GN D 2

P R 1 63

P Q 26 A
P D 1 5 03 Y V S
2
1
7

0 . 0 2 _1 % _ 32

Ch ar ge Cu rr en t 3 .0 A

P Q2
ME P 44 3 5 Q8
5
6
7
8

4

V IN

P L3
0 6 03 H - 6R 8M -Z 0 1

Ch ar ge Vo lt ag e 1 2. 6V
To ta l P ow er 1 10W
B AT

P R2 4 7
0 . 0 2 _1 % _ 32

P R 25 5
1 6. 2K _ 1 % _0 4

P R2 5 7
20 K _ 0 6

P Q6 5
2N 3 90 4

P C1 6 1

P C1 0 8

P C 1 12

P C 1 14

4 . 7 u _2 5 V _ X 5 R _ 08

4 . 7 u _2 5 V _ X 5R _ 08

5
6
P R 25 4
P C 15 6

3 9. 2K _ 1 % _0 4
0 . 2 2u _ 1 0V _ X 5 R _ 0 4

29

Sheet 42 of 49
AC_IN, Charger

P R2 5 9

S GN D

S GN D 5
1 0 0 K _ 1% _ 0 4
-I N E 3

P C2 1 9
P C2 1 8
22 0 0 p_ 5 0 V _X 7 R _ 0 4
68 0 0 p_ 5 0 V _X 7 R _ 0 4
Z 3 22 3

P C2 2 1

0 . 02 2 u _1 6 V _ X7 R _0 4

P R2 6 6

10 K _ 1 %_ 0 4

33 K _ 1 %_ 0 4

4 7 K _ 1% _ 0 4

1 0 K _ 1% _ 0 4
Z 3 20 8
Z 3 22 4

P R 26 7
1 1 3 K _ 1% _ 0 4

A

P R2 6 4

P C 2 22
47 p _ 50 V _ N P O _ 04

P R2 6 3

20 0 K _ 1% _ 0 4

1 0 0K _1 % _ 04
P R 2 62

A

AC
D 7
B A V 9 9 R E CT IF IE R

VR EF
Z3219
Z3220
Z3221

Z 32 0 7

P R 2 65

C
B A T _ DE T

CB
O U T -1
VS
VB
OU T -2
P G ND
X A CO K

P C 2 20
6 8 0 0p _ 50 V _ X 7 R _ 0 4
P R 26 1
S GN D 5

A

AC
D 11
B A V 9 9 R E CT IF IE R

4. 7U _2 5 V _ X 5R _0 8

4 7 0 K _0 4

C
S MD _ B A T

PC2 1 6

*4 . 7 U _ 2 5V _X 5 R _ 0 8

0 . 1 u _5 0 V _ Y 5 V _ 0 6

22 p _ 50 V _ N P O_ 04

? ? BAT?

AC
D 10
B A V 9 9 R E CT IF IE R

C TL

0 _0 4

P C 2 17

21
20
19
18
17
16
15

C TL
GN D
V RE F
R T
CS
O UT D
-I N E 3

S GN D 5
P R2 7 1

T OT A L _ C U R

C
S MC _ B A T

TRERMAL PAD

Z 3 20 9

C
B

P R2 6 0
1 00 K _ 0 6

P C 2 15

P R2 5 2

28
27
26
25
24
23
22

M B 3 9A 1 1 9

34

10 K _ 0 4
4. 7 K _ 0 4
4. 7 K _ 0 4

E

Z 3 5 29

P R 2 58
2 3 . 7 K _ 1% _ 0 4

V DD3
Z 3 5 30
R 20 7
R 21 5
R 21 2

1 u _2 5 V _ 08

8
9
10
11
12
13
14

P R2 5 6
1 0K _ 0 6

4

8

A

Z 32 0 6

D02 CHANGE

V CC
-I N C 1
+ INC 1
A CI N
A CO K
CV M
+ INE 1

-I N E 1
O UT C 2
+ INC2
-I N C 2
+I N E 2
-I N E 2
F B 1 23

1
2
3
4
5
6
7

Z 32 0 4
Z 32 0 5

Z 3 5 27

PC2 1 4

Z 32 0 3

P R2 5 3
10 0 K _ 0 6

4

C

A

PU 8

P D2 4
U D Z 1 6B

0. 1u _ 5 0V _ Y 5V _ 0 6

R B 05 4 0 S 2
S GN D 5

D02 CHANGE
ADD

P C2 1 2

0 . 1 u_ 5 0 V _ Y 5 V _ 06

C
P D2 0

3
2
1

Z 3 5 28

P Q 26 B
P D 15 0 3 Y V S

P C2 2 3

P C2 2 4

0 . 01 u _ 16 V _ X 7R _ 04

0. 0 1 u _1 6 V _ X 7R _0 4

+ INE 2

C
B A T _ V OL T
34

B A T _ V O LT

AC
D 8
B A V 9 9 R E CT IF IE R

D02 CHANGE
DEL

PR2 7 7

A
V RE F

+ IN E 2

VR EF

-I N E 3
1 M_ 0 4
P R 27 8
1 . 5 M_ 0 4

P R 26 8

P Q 6 2A
M T D N 7 0 0 2Z H S 6 R

VH =3 S2 P/ 3A

3 00 K _ 1 % _0 4

0 . 0 1 u_ 5 0 V _X 7 R _ 0 4

3

V L= 12. 9V ( 28 00m A ce ll )
6

P R 1 84

*O P E N _ 1 0 mi l -1 MM

1 . 5 M_ 0 4

D

34

P Q2 3 B
4
P R1 6 0

2

S

t B T D -1 0 1 00 0 9

D02 CHANGE
6-21-D34C0-105 ? ? &
PIN? ? ? ?

S G ND5
PJ 4 0
*O P E N _ 1 0 m li -1 MM

S P Q6 6 A
MT D N 70 0 2 Z H S 6 R

5G

VA

S
MT D N 7 0 02 Z H S 6R

D

2G

V S H G_ S E L

1

3

2

PJ 2 2
P R1 8 6
1 00 K _ 0 4

28 , 3 4

Battery Voltage:
9V~12.6V

5G
4

6
1

S
1

10 K _ 0 4
A C_ IN #

5

D
P Q6 6 B

V H= 12. 6V ( 22 00m AH c el l)

2G

3 4 CE L L _ CO NT RO L

P D 1 9 *U D Z 1 6 B
A

1
2
3
4

B A T_ D E T
S MD _ B A T
S MC _ B A T

34
B A T _D E T
2 8 , 3 4 S MD _ B A T
2 8 , 3 4 S MC _ B A T

S
D
P C 1 97

C

P R 27 3

5G

VL= 3S 1P /1 .5A
P R1 5 0

P R 27 2
1 M_ 0 4

D P Q6 2 B
MT D N 7 00 2 Z H S 6 R

1

V DD 3

J BATT A2

3 3 K _ 1% _ 0 4 9/13
3

P R 1 85
1 0 0 K _0 4

36

4

A C_ IN
Support Intel V-Pro Function

MT D N 70 0 2 Z H S 6 R

1M _ 04

S G ND 5
P R1 4 9

S G ND 5
S GN D 5

P R 27 0

*1 5 mi l _s h o rt _ 06

20 0 K _ 1 %_ 0 4
SYS3 V

V IN
S G ND5

P R 1 69
PQ 2 4
P R 1 61
A O 3 40 9 3 0 K _ 1% _ 0 4
S
D

BAT

P C1 7 8

1 0 0 K _0 4

3

S
M TD N 7 0 0 2Z H S 6 R

S

P C1 3

0 . 1u _ 5 0V _Y 5V _0 6

0 . 1 u _5 0 V _ Y 5 V _ 06

0 . 1u _ 5 0V _ Y 5V _ 0 6

SYS3 V

P R 16 4

34

C H G_ E N

P Q 2 8B

5G

1 0 0 K _0 4

BAT

P C6

PC 7

0. 1 u _ 50 V _ Y 5 V _ 0 6

0 . 1 u_ 5 0 V _Y 5 V _0 6

P C8
0 . 1 u_ 5 0 V _ Y 5 V _ 06

P C2 5 5
1 00 0 p _5 0 V _ X7 R _0 4

D

2G

1

0 . 1 u_ 1 6 V _Y 5 V _ 04

6

P C 11 0

6 . 0 4K _1 % _ 04

S P Q2 8 A
MT D N 7 00 2 Z H S 6R

PJ 1 3
* OP E N _ 10 m i -l 1 MM
2

1

2G

P R 15 1

1

6

G

D

4

C TL

SYS3 V

PC 1 4

B A T_ V O LT

P R1 6 2
2 00 K _ 1 %_ 0 4
P Q 2 3A
D
MT D N 7 00 2 Z H S 6 R

0 . 1 u_ 5 0 V _ Y 5 V _ 06

P C2 2 5

3 5 , 36 , 3 7 S Y S 1 5 V
35
VA
3 5 ,3 6
SYS5 V
18 , 2 7 , 28 , 3 0 , 3 4, 3 5 , 3 6 V D D 3
1 1 , 3 5, 3 6 , 3 7, 3 8 , 3 9, 4 0 , 4 1 V I N

AC_IN, Charger B - 43

B.Schematic Diagrams

PQ 2 7
M E P 4 43 5 Q8
8
7
6
5

0 _ 04

Z3213

P C 2 13

3
2
1
4

VA

Z 3 2 1 53
P R 25 0

4 . 7u _ 2 5V _X 5 R _0 8

P Q4 4
ME P 4 4 3 5Q 8

8
7
6
5

4 . 7 u _2 5 V _ X 5 R _ 0 8 P C 1 09

20 K _ 1 %_ 0 4

4 . 7 u _2 5 V _ X 5R _ 08

0 . 1 u _5 0 V _ Y 5 V _0 6

P R2 5 1

Z321 4

P R 24 9
0 _ 04

0 . 1 u_ 5 0 V _Y 5 V _ 06

Z 3 21 0
Z3211
Z 3 21 2

P C9 3

P C 2 26

P R 24 8

0 . 1 u _5 0 V _ Y 5 V _ 06
1 0 K _0 8
0. 1u _ 50 V _ Y 5V _ 0 6

4 . 7 u _2 5 V _ X 5R _ 08

P C9 2

P C 2 11

10 0 K _ 04
PC 9 1

P C 2 10

P R2 4 6

Schematic Diagrams

W150HNM Audio Board
USB PORT(PORT3)
A _ US B V CC
A L6
H C B 1 6 08 K F -1 2 1 T2 5

A _ US B V C C2

60 mil
A C1 9
+

A _ US B V C C

AC1 1

A C3

2 20 u _ 6. 3 V _ 6 . 3* 6 . 3* 4 . 2

0. 1 u _ 10 V _ X 7R _ 04

+
*1 00 u _ 6. 3 V _ B _ A

A _5 V

A J_ U S B 1

3

V IN 1
V IN 2

V OU T1
V OU T2
V OU T3

4

1 0 u_ 1 0 V _Y 5 V _0 8

6

A C 15

V+

A C1 6

2

A U S B _P P 8_ R

3
D A TA _H

A L7
0 . 1 u_ 1 0 V _ X5 R _ 0 4

0. 1 u _ 10 V _ X 5R _ 04

4

1 0u _ 1 0V _ Y 5V _ 0 8

GN D

R T 97 1 5 B GS

B.Schematic Diagrams

A U S B _P N 8 _R

D A TA _L

A C1 7

8
1

EN #

1
A G ND

7

A U S B _P N 8

4

3

A U S B _P P 8

1

2

G ND
C 1 07 7 0 -10 4 A 3

* W C M 2 01 2 F 2 S -1 61 T 0 3-s h o rt
A GN D

A GN D

GN D 2

A C 13

F L G#

GN D 1

2

G ND1

5

60 mil

60 mil

A GN D

9/6 EMC DVT request
? ? ? OK, PVT? ? short?

G ND2

A U1

A GN D
A GN D

Sheet 43 of 49
W150HNM Audio
Board

AUDIO BOARD
A US B _ P N 8

CO-Ray

A C8
0. 0 1 u _5 0 V _ X7 R _0 4
A S P D IF O
A S P D I F O -R A L5

? ?? ?? ?? ??
AR
AR
AR
AR

A US B _ P P 8

DIFF USB8P&N? ? ? ?

5 52
6 45
6 56
6 57

0_ 0 4
*0 _ 04
0_ 0 4
*0 _ 04

A U S B _P N 8 _A U D 1
A U S B _P N 8 _A U D 2
A U S B _P P 8 _ A U D 1
A U S B _P P 8 _ A U D 2

S P D I F _P I N 5 5 A J_ S P D I F 1
S P D I F _P I N 4 4
R
3
F C M1 0 0 5K F -10 2 T 02

AR 3
2 2 0 _0 4

A S P D I F O_ R 2
S P D I F _P I N 6 6
L
1
2 S J -T3 5 1 -S 23

A C9

10 0 0 p_ 5 0 V _X 7 R _ 0 4

A _5 V
A _5 V

A J _ A UD 2
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

10/22

A M I C 1 -R
A M I C 1 -L
A _ A UD G
A H E A D P H ON E -R
A H E A D P H ON E -L
A M IC_ S E NS E
ASPK_ H P#
A H P _S E N S E
A S P K O U T R -_ R
A S P K O UT R+ _ R
A G ND
A U S B _P N 8 _A U D 2
A U S B _P P 8_ A U D 2
A S P D IF O

N C2
N C1

16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

A GN D

AJ _ SPKL 1
A MI C 1-R
A M I C 1 -L

A S P K O U T R -_ R
A S P K O UT R+ _ R

A H E A D P H O N E -R
A H E A D P H O N E -L
A M IC_ S E N S E
A S P K _ HP #
A HP _ S E N S E
A S P K OU T R -_R
A S P K OU TR + _R

A H1
9
8
7
6

2
3
4
5

MT H 6 _ 0 D 2 _ 2
A GN D

B - 44 W150HNM Audio Board

A G ND

9
8
7
6

2
3
4
5

MT H 7 _ 0D 2 _8
A GN D

A C1 0
1

9
8
7
6

A GN D

A MI C 1 -L _ R
MI C _P I N 6

1 80 p _ 50 V _ N P O _ 04

AC 2

A C7

A GN D

A GN D

A GN D

2 4 0_ 1 % _0 6 A H E A D P H ON E -R - R

A L1

F C M1 0 0 5K F -12 1 T 03 A H E A D P H O N E -R _R

A H E A D P H ON E -L A R 5

2 4 0_ 1 % _0 6 A H E A D P H ON E -L -R

A L2

F C M1 0 0 5K F -12 1 T 03 A H E A D P H O N E -L _ R

La yout note :
He a dphone? ? ? ? > 1 0mi ls
? ? phone j a ck ? ?
? ?? ?? ??
R/ L? ? ? ? G ND? ? ? ? 3 *? ?

A C1

0 . 1 u _1 0 V _ X 5R _0 4

A C1 2

0 . 1 u _1 0 V _ X 5R _0 4

H P-L

A C4

0 . 1 u _1 0 V _ X 5R _0 4

H P-R

A _ A UD G

MIC IN

A _ A U DG

A S P K _ HP #

A H E A D P H ON E -R A R 4

0 . 1 u _1 0 V _ X 5R _0 4

2
6
L
1
2 S J -T3 5 1 -S 23

BLACK
A HP _ S E N S E

5 A J_ H P 1
4
3
R
2
6
L
1
2 S J -T3 5 1 -S 23

AR 1

A R2

AC 6

*1 K _ 0 4

* 1 K _0 4

68 0 p _5 0 V _ X 7R _0 4
6 8 0 p_ 5 0 V _X 7 R _ 0 4

A C5

HEAD PHONE

BLACK
A _ A U DG

G ND

M TH 7 _0 D 2_ 8
A G ND

A MI C 1 -R _R

F C M 1 00 5 K F -1 2 1T 0 3

A _ A UD G

AH 4
1

F C M 1 00 5 K F -1 2 1T 0 3

AL 4

68 0 p _5 0 V _ X 7R _0 4
6 8 0 p_ 5 0 V _X 7 R _ 0 4

Re sist or 32 or 33 _0 4
me e t W LK Te st
VT1802P
33_1%_04

A H3
A H2
C 5 6D 5 6 C 5 6D 5 6

1

AL 3

A MI C 1 -L
A C1 4

1 8 0p _ 5 0V _ N P O_ 0 4

8 7 21 3 -1 60 0 G

AH5

A MI C 1 -R

5 A J_ M I C 1
4
3
R

8 5 2 04 -0 2 00 1

* 87 1 51 -2 0 07 G

2
3
4
5

A GN D
A MI C _ S E N S E

1
2

A C 18

A U S B _P N 8 _A U D 1
A U S B _P P 8 _ A U D 1
A S P D IF O

A G ND

SPDIF OUT

BLACK

A J _ A UD 1

3* R/L ? ?
G ND

Schematic Diagrams

W150HNM Second HDD Board
OJ _OD D 1
S1
S2
S3
S4
S5
S6
S7

OJ _SA TA 1
OC 15
OC 16

0.0 1u_16V _X7R _04
0.0 1u_16V _X7R _04

O _D S ATA _TXP 2
O _D S ATA _TXN 2

O_H SA TA _TXP 1
O_H SA TA _TXN 1

OC 17
OC 18

0.0 1u_16V _X7R _04
0.0 1u_16V _X7R _04

O _D S ATA _R X N 2
O _D S ATA _R X P2

O_H SA TA _R XN 1
O_H SA TA _R XP 1

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

O _3. 3VS
P1
P2
P3
P4
P5
P6

OG N D
O _S ATA _OD D _P R S N T#

O_H D D _5V S
O_Z ero_OD D _5V S

O_S A TA_O D D _D A#

OC 10
+
220u_6. 3V _6. 3*6. 3* 4. 2

F P->A T13 035 BAA 089
C 9903 26

A T13035B A A 089

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

O_D SA TA _TXP 2
O_D SA TA _TXN 2
O_D SA TA _R XN 2
O_D SA TA _R XP 2
O_S A TA _OD D _PR SN T#
O_S ATA _OD D _D A #
O_Z ero_OD D _5V S

88028-3010
OGN D

OG N D

6-21-C1D6 0-215

OG N D

W150HNM Zero Power
OJ _H D D 1
S1
S2
S3
S4
S5
S6
S7

Sheet 44 of 49
W150HNM Second
HDD Board

Gen3
OC 11
OC 12

0. 01u_16V _X7R _04
0. 01u_16V _X7R _04

O_H S A TA_T XP1
O_H S A TA_T XN 1

OC 13
OC 14

0. 01u_16V _X7R _04
0. 01u_16V _X7R _04

O_H S A TA_R XN 1
O_H S A TA_R XP 1
O_3. 3V S

P1
P2
P3
P4
P5
P6
P7
P8
P9
P 10
P 11
P 12
P 13
P 14
P 15

O C3

OC 5

* 0. 01u_50V _X7R _04

* 10u_10V _Y 5V _08
O _H D D _5VS

O GN D

O GN D
OC 1

O C6

OC 8

OC 7

OC 9

OC 4

0. 1u_10 V_X5R _04

0. 1u_10V _X5R _04

0. 1u_10V _X5R _04

1u_6. 3V _X5R _04

* 10u_10V _Y 5V _08

+

220u_6. 3V _6. 3*6. 3* 4. 2

C 16664-12204-L
P IN G N D 1 ~ 2= G N D
O GN D
O GN D

6-21 -C2700 -122

2
3
4
5

OH 6
1

9
8
7
6

2
3
4
5

H 6_5D 2_3
OG N D

OH 4
1

OH 1
H 6_5D 3_7

9
8
7
6

OH 2
H 6_5D 3_7

OH 5
C 67D 67

OH 3
C 67D 67

H 6_5 D 2_3
O GN D

OG N D

OGN D

OGN D

OGN D

W150HNM Second HDD Board B - 45

B.Schematic Diagrams

OG N D

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

Schematic Diagrams

B5100 Click Board
CSW1~2

C C1
0 . 1u _ 1 0V _ X 7 R _ 0 4

T +5 V S

RIGHT
KEY

F CR 7
*3 2m i l _s h o rt
T J _T P B 1

T GN D

TJ _ TP 1
T G TP _ C LK
T GT P _ D A T A

1
2
3
4
5
6

T _3 . 3 V
T C 16
T U S B _P N 1 0
TU S B _ P P 1 0

0 . 1 u _1 6 V _ Y 5 V _ 04

1
3

LIFT
KEY

C SW 2
T J G-5 3 3-S -T / R

T GT P _ C L K
T GT P _ D A T A
C TP B U T TO N _ L
C TP B U T TO N _ R

2
4

1
3

C T P B U T T ON _ R

CS W 1
TJ G -53 3 -S -T / R

5
6

1
2
3
4
5
6
7
8
9
10

4
3

2
1

T+5 VS

1
3

8 5 20 1 -0 60 5 1

2
4

C TP B U T TO N _ L

5
6

V15XX CLICK BOARD

T 3. 3V

C SW 4
*T J G-5 3 3 -S -T / R

2
4

1
3

CS W 3
*T JG - 5 33 -S - T / R

2
4

8 5 20 1 -1 0 05 1

T GN D

T G ND

5
6

*3 2 m il _ s ho rt
TG N D
T R1 0 T E S D_ G ND

5
6

TG N D

6-20-94A20-110
TG N D

It is st ro ng ly rec ommend ed th at the TESD_ GND h as

T GN D

B.Schematic Diagrams

a d ed ica ted co nn ect ion to th e sy ste m ch ass is o r
ca ble sh ield .

T 3 .3 V
TU 1

Sheet 45 of 49
B5100 Click Board

TM OS I
TM I S O
TM C S
TM C L K

TM I S O

T R1 2

*4 . 7 K _ 04

T R1 1

*4 . 7 K _ 04

5
2
1
6

TM OS I
1
3
5
7
9
11
13
15
17
19
21
23

T X IN
T X OU T
T M OS I
T M CL K
T M CS
T N RE S E T
T 3 .3 V

T3 . 3 V

2
4
6
8
10
12
14
16
18
20
22
24

T R2

8

VDD

3

T 3. 3 V

T C2

W P#

0 . 1u _ 1 6V _ Y 5V _ 0 4

TJ _ FPB1
T R E G_ OU T
T B D RIV E 1
T B D RIV E 2

S
Q
C S#
SC K

4

4 . 7K _ 0 4

7
VS S

T R E F _ OS C

HO L D#

M9 5 12 8 W MN 6 TP
T B E Z E L1
T B E Z E L2

T GN D

TAVD D

T GN D

TG N D

951206
TN R E S E T

TR 4

T M IS O
T U S B _ C ON N
T P D _R E G
T U S B_ PN_ R
T U S B _ P P _R

TR E F _ OS C

4 7 K _ 04

T 3. 3 V

TC 4

1 u _ 6. 3 V _ Y 5 V _ 0 4

T C 11

2 7 p _5 0 V _ N P O _0 4

TB E Z E L 1
TU 2
TB D R I V E 1

T R1 3

10 0 _ 1% _ 0 4

1

TB D R I V E 2

T R1 4

10 0 _ 1% _ 0 4

2

3

TB E Z E L 2
* CO N2 4 A

R C L A M P 05 0 2 B

T GN D

TG N D

T GN D

T C1 3
T E S D_ G ND
TP D _ R E G

Pla ce Bot to n

T 3. 3 V

TR 9

3 3 0 K _0 4

T C 12

1 u _ 6. 3 V _ Y 5 V _ 0 4

1 8p _ 5 0V _ N P O_ 0 4

T 3. 3 V
T G ND

J_FP1
23

1

TC 5

T C1 4

T C1 5
T A V DD

1u _ 6 . 3V _ X 5 R _ 0 4
24
2
TOP VIEW

1 u_ 6 . 3 V _ X5 R _ 0 4

0 . 1 u _1 6 V _ Y 5 V _ 04
TR E G_ O U T

2
24
BOTTON VIEW

T R6

2 . 2_ 1 % _0 6
T U S B _ P N _R

TC 8

T C7

T R8

2 7 . 4_ 1 % _0 4

T U S B _P N 1 0

T C6

T GN D
1u _ 1 6V _ X 5 R _ 0 6

B5100M ONLY

1
6
TJ_FP1

TC 10

1 u _ 16 V _ X 5R _0 6
0 . 1 u_ 1 6 V _ Y 5 V _ 04

47 p _5 0 V _ N P O _ 04
T GN D

T GN D
T GN D

T XI N

TR 3

4 7 0 _0 4

T U S B _ C ON N

T R5

1 . 5 K _ 1% _ 0 4

T US B _ P P _ R

T R7

2 7 . 4_ 1 % _0 4

TU S B _ P P 1 0

T XI N _ R
TC 9

T R1
1 M_ 0 4

T GN D

2

3
4
T X1
H S X 53 1 S _ 12 M H Z
T H1
2
3
4
5

TH 3

1

9
8
7
6

2
3
4
5

T H4

1

9
8
7
6

2
3
4
5

TH 2

1

9
8
7
6

2
3
4
5

1

9
8
7
6

T H5
H 3 _ 0D 2_ 3

47 p _5 0 V _ N P O _ 04

1

T X OU T

T GN D

MT H 6 _ 0D 2 _3 _ S

MT H 6_ 0 D 2 _ 3_ S

TC 1

T C3

T GN D
T G ND

B - 46 B5100 Click Board

T GN D

T GN D

T G ND

1 8 p_ 5 0 V _N P O_ 0 4

M T H 6 _0 D 2_ 3 _ S

TG N D
T GN D

T GN D

TH 6
H 3 _0 D 2_ 3

1 8 p _5 0 V _ N P O _0 4
M TH 6 _0 D 2_ 3 _ S

HSX531S+-20pp m

TG N D

T GN D

Schematic Diagrams

B5100 Fingerprint Board

V51XX FINGERPRINT BOARD

FPJ T1

FPU 1
B5

FU SB _ C ON N

B11

FBD R I VE 1

B10

FBD R I VE 2

A5

FBE ZE L1

US B_C ON N EC T
B D R IV E1
B D R IV E2
B7

B EZ EL 1 A
NC 1
NC 2
B EZ EL 2 A

B9
NC 3

FMOS I
FMC LK
FMC S
FN R E SET
F3. 3 V

FBE ZE L2

The path be marked in RED

F 3. 3 V

A10
R EG_OU T
A VD D
ES D_GN D 1

FGN D

F3 . 3V

C9

FGN D

A4

FPD _R E G

B2

FMC S

C6

FMI SO

B4

FMOSI

MOSI
B3

FMC LK

B1

FU SB _ PN

C1

FU SB _ PP

A2

FN R ES ET

MC L K

U SB _ D P
N R ES ET

R EF _OSC

C 11

ESD _GN D 4

FJ1

B6

23

23

1

FGN D
FR EF _ OSC

2
24
BOTTON VIEW

24
2
TOP VIEW

FGN D

AGN D
XTA LI N

FXI N

C8
F GN D
A6

XTALOU T

A9

B5100M ONLY
1

C4

A8

D GN D 2

Sheet 46 of 49
B5100 Fingerprint
Board

A11

ES D_GN D 3

D GN D 1

FGN D

FGN D

A1

US B_ D N

FU SB _P N
FU SB _P P

FGN D

D VD D 1

MI SO

FMI SO
FU SB _C ON N
FPD _R EG

FA VD D

A3

PD _R EG

FAV D D

6-21-41710-212

C 10

C3

MC S

FBE ZEL1
FBE ZEL2

FR EG_ OU T

ES D_GN D 2

D VD D 2

FR EF _OS C

S PN Z- 24 S2 -VB-0 1 7-1 -R

needs to be design to be short and at low im pedance.

C7
B EZ EL 2 B

NC 4

2
4
6
8
10
12
14
16
18
20
22
24

FXOU T

TCS5BF

F GN D

B5100 Fingerprint Board B - 47

B.Schematic Diagrams

C2

C5

FXI N
FXOU T

The TESD_GND trace has to be w ide ( > 20mil)

A7
B EZ EL 1 B

B8

1
3
5
7
9
11
13
15
17
19
21
23

FR E G_OU T
FB D R IV E1
FB D R IV E2

Schematic Diagrams

B5130 LED & VGA SW Board
HDD LED

BT LED

BL _3 .3 VS

BL _3 .3 VS
BLJ _L ED1

BL _3 .3 VS

BLR 1

BLR 7

22 0_ 04

22 0_ 04

BL_ LED _I GPU #
BL_ LED _D GPU #
BL_ VGA_ SW#
BL_ BT_ EN
BL_ SATA_ LED #
BL_ OPTIMUS_ MO DE
BL_ WL AN_ LED #

BLR 2

A

D02 CHANGE
UPDATE VALUE

BL_ BT_ EN

B

8 pi n -> 10 p in a dd W LA N_ LE D#
C9 90 71 3

R

BL_ WL AN_ LED #

BLQ 1
DTC1 14 EUA

BL_ SATA_ LED #

BL _3 .3 VS

S

BLG ND

BL _3 .3 VS

88 48 6- 10 01

4

BLG ND

C

2

ad d WL AN _L ED #
C9 90 71 3

E

Gr ee n
C9 90 71 3

RY -SP1 95 UH YU YG 4

G

BL _3 .3 VS

BLR 4

22 0_ 04

22 0_ 04

BLQ 2
AO3 40 9

D

BLR 5
BLR 3

22 0_ 04
BLR 6

DGPU LED

BLD 5 Gr ee n
RY -SP1 95 UH YU YG 4

C

2

Red

4

RY -SP1 70 UH Y2 4- 5M

Green

R

RY -SP1 70 UY G2 4- 5M

RE D

G

BLD 4

3

1

A

A

47 0_ 04

IGPU LED

BLD 3

B5130M ONLY

C

C
BL_ LED _I GPU #

BL_ LED _D GPU #

BL_ OPTIMUS_ MO DE

B
BLQ 3
DTC1 14 EUA

BL_ SW1
TJ G- 53 3- S-T/R

E

1
3
BLH 1
2
3
4
5

1

BLH 2
9
8
7
6

2
3
4
5

1

BLH 3
9
8
7
6

2
3
4
5

1

BLG ND
9
8
7
6

BLH 4
H4 _4 D2 _2

BLH 5
H4 _4 D2 _2

2
4

5
6

B.Schematic Diagrams

C

RY -SP1 72 DBW 71 -5 M

HDD/CD-ROM
LED

G

BLD 1
BLD 2

Sheet 47 of 49
B5130 LED & VGA
SW Board

3

1

22 0_ 04

10
9
8
7
6
5
4
3
2
1

BLG ND
H6 _0 D2 _3

BLG ND

H6 _0 D2 _3

BLG ND

B - 48 B5130 LED & VGA SW Board

BLG ND

H6 _0 D2 _3

BLG ND

BLG ND

BLG ND

DU MM Y NE T
C9 90 71 3

BL_ VGA_ SW#

Schematic Diagrams

B5100 Power Switch Board
V51XX POWER SWITCH BOARD
BH_3. 3VS

BVD D3

*BAV99
AC

*B AV99

BPW RBTN#

AC

BWEB #0

AC

P OWER
B UTTON
L ED

BD 3

*BAV99

*BAV99

BW EB#1

AC

BH _3.3VS

BJ_SW1

BR 1
680_06

BVDD 3
B D2

C

BD 1
C

C

BD 4

BVD D3

BW EB#0

BWEB #2

BW EB#1
BLID _SW#
BW EB#2

A

M100126
BDG N D

C

A

A

A

BD 5
H T- 150BP

BD GN D

BD GN D

B DGND

BD GN D
B DGND

Mute

BSW2
4
3
BD GN D

1
2

Wl an

BSW 3
4
3

B WEB#1

1
2

CCD

BSW 1
4
3

BW EB#0

1
2

BW EB#2

1
2

TJ G- 533-S- T/ R

TJ G-533-S-T/R

TJG -533-S-T/R

TJG-533- S-T/R

PIN5,6=BDGND

PIN5,6=BDGN D

PIN5,6=BDGND

PIN5,6=BDGND

BD GND

BDG N D

BDGN D

BR2

B5100M ONLY

10K_04

BU1
VC C

0.1u_16V_Y5V_04
BD GN D

2

BLID _SW #

MH- 248

3

BC 7

OUT

GN D

1

BV DD 3

BDGND

1

9
8
7
6

2
3
4
5

H6_0D 2_3
BD GND

BH2
1

9
8
7
6

2
3
4
5

H6_0D 2_3
BD GND

BD GN D

B H3
1

9
8
7
6

BH4
H 4_4D 2_2

BVDD 3

BVDD 3

BVD D3

BC 6

BC 3

BC 5

BC4

*0. 1u_16V_Y 5V_04

*0. 1u_16V_Y 5V _04

*0.01u_50V_X7R _04

*0.01u_50V_X7R _04

BD GN D
BH 1

BPW RBTN#

LID SWITCH IC

BVD D3

2
3
4
5

POWER
BOTTOM

BSW 4
4
3

Sheet 48 of 49
B5100 Power
Switch Board

BD GN D

BD GN D

BD GND

BH 5
H4_4D 2_2

H 8_0D3_0
BD GND

BD GN D

BD GN D

BD GN D

BD GN D

B5100 Power Switch Board B - 49

B.Schematic Diagrams

1
2
3
4
5
6
7
8
9
10
11
12
87151-1207G

BPW R BTN #

A BH _PI NA

BVDD 3

C

BVDD 3

Schematic Diagrams

Sequence
PB50/PB70 Huron River POWER SEQUENCE
VCCRTC
36mS
SPEC MIN 9 mS

RTCRST#

DD_ON#

5V

420uS

3V

1.3mS

SPEC MIN 10mS
91.073mS

RSMRST#

734mS
SPEC M AX 200mS
5mS
SPEC MAX 90 mS

SUS_PWR_ DN_ACK

240mS

ACPRESEN T

B.Schematic Diagrams

PWRBTN#

81.24mS

SLP_A#

SPEC M IN 5ms Will never go high la ter than SL P_S3#

SLP_S5#

Sheet 49 of 49
Sequence

SLP_S4#
SLP_S3#

SPEC Minimum du ration of P WRBTN# asse rtion = 16m S.
PWRB TN# can as sert before or after R SMRST#

122mS

SP EC MIN 5mS
31.6mS

36.47uS

SPEC MIN 30us
SPEC M IN 30uS
1.307mS

1.5V
APWROK

2.17mS
SPEC MI N 1ms

5VS

2.15mS

3.3VS

2.35mS

SPEC MIN 0m s
8.7mS

SPE C MIN 0ms

1.8VS( VccPLL)
1.5VS
1.05VS
1.05VS _VTT
0.85VS
H_VTTP WRGD(ALL_SY S_PWRGD)
IMVP_V R_EN
PWROK

UNCORE PWRGOOD
DRAMPW ROK

2.0mS

1.785mS

10.5mS

11.5mS

12.3mS

1.73mS
SPEC MIN 99mS

195.3mS

S PEC MIN 5mS ~MAX650ms

SPEC MIN 2mS

149.4mS

S PEC MIN 2mS ~MAX650ms

SPEC MI N 0mS
1.2mS

SYS_PW ROK

SPEC MIN 1mS

SUS_ST ATE#

SPEC MIN 60 uS

PLT_RS T#

SPEC MIN 1mS~MA X100ms

1.8mS

IMVP_V R_EN
CPU SV ID BUS

SPEC M IN MAX5ms

set VID
SLO W
pac ket
SPEC MAX500us

A
C
K
SPEC MIN50 us~MAX2000u s

VCORE
SPEC MAX50 us
MVP_PW RGD (VR_Rea dy)

B - 50 Sequence

SPE C MAX5ms

BIOS Update

Appendix C:Updating the FLASH ROM BIOS
To update the FLASH ROM BIOS you must:
•
•
•
•
•
•
•

Download the BIOS
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel.
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model
(see sidebar for important information on BIOS versions).

Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the
downloaded files.
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software).

BIOS Version
Make sure you download the latest correct
version of the BIOS appropriate for the computer model you are
working on.
You
should
only
download BIOS versions
that
are
V1.01.XX or higher as
appropriate for your
computer model.
Note that BIOS versions
are not backward compatible and therefore
you may not downgrade your BIOS to an
older version after upgrading to a later version (e.g if you upgrade
a BIOS to ver 1.01.05,
you MAY NOT then go
back and flash the BIOS
to ver 1.01.04).

Set the computer to boot from the external drive
1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.
C - 1

C:BIOS Update

Download the BIOS update from the web site.
Unzip the files onto a bootable CD/DVD/USB Flash Drive.
Reboot your computer from an external CD/DVD/USB Flash Drive.
Use the flash tools to update the flash BIOS using the commands indicated below.
Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
After rebooting the computer you may restart the computer again and make any required changes to the default BIOS
settings.



BIOS Update

Use the flash tools to update the BIOS
1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs
being loaded by DOS. Choose “N” for any memory management programs.
2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB
flash drive).
3. Type the following command at the DOS prompt:

C:BIOS Update

C:\> Flash.bat
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
restarts.

Restart the computer (booting from the HDD)
1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F9) and select “Yes” to confirm the selection.
5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.

Your computer is now running normally with the updated BIOS
You may now enter the BIOS and make any changes you require to the default settings.

C-2

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