Clevo W240BU, W241BU, W241BUQ, W245BUQ, W248BUQ, W249BUQ Service Manual. Www.s Manuals.com. Manual

User Manual: Notebook Clevo W249BUQ - Service manuals and Schematics, Disassembly / Assembly. Free.

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W241BU/W241BUQ/W240BU/W245BUQ/W248BUQ/W249BUQ

Preface

Notebook Computer
W241BU/W241BUQ/W240BU/W245BUQ/W248BUQ/
W249BUQ
Preface

Service Manual

I

Preface

Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes.

Preface

Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Version 1.0
May 2011

Trademarks
AMD® is a registered trademark of Advanced Micro Devices, Inc.

Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and/or registered trademarks of their respective companies.

II

Preface

About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the W241BU/
W241BUQ/W240BU/W245BUQ/W248BUQ/W249BUQ series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.

Preface

Appendix A, Part Lists
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS

III

Preface

IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment:

Preface

1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19V, 1.58A (30 Watts) minimum AC/DC Adapter.

CAUTION
This Computer’s Optical Device is a Laser Class 1 Product

FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.

IV

Preface

Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1.

Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer
to any shock or vibration.

2.

Do not place anything heavy
on the computer.

Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not leave it in a place
where foreign matter or moisture may affect the system.

Don’t use or store the computer in a humid environment.

Do not place the computer on
any surface which will block
the vents.

Preface

Do not expose it to excessive
heat or direct sunlight.

3.

Do not place it on an unstable
surface.

Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power
until you properly shut down
all programs.

Do not turn off any peripheral
devices when the computer is
on.

Do not disassemble the computer by yourself.

Perform routine maintenance
on your computer.

V

Preface
4.
5.

Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data.
Take care when using peripheral devices.
Use only approved brands of
peripherals.

Unplug the power cord before
attaching peripheral devices.

Preface

Power Safety
The computer has specific power requirements:



VI

•
•

Power Safety
Warning

•

Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.

•
•
•

Only use a power adapter approved for use with this computer.
Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
Before cleaning the computer, make sure it is disconnected from any external power supplies.
Do not plug in the power
cord if you are wet.

Do not use the power cord if
it is broken.

Do not place heavy objects
on the power cord.

Preface

Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.

Battery Guidelines

Preface

The following can also apply to any backup batteries you may have.
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.


Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.

Battery Level
Click the battery icon
in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.

VII

Preface

Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on CD
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC.

System Startup
Remove all packing materials.
Place the computer on a stable surface.
Insert the battery and make sure it is locked in position.
Securely attach any peripherals you want to use with the computer (e.g.
keyboard and mouse) to their ports.
5. Attach the AC/DC adapter to the DC-In jack on the left of the computer, then plug
the AC power cord into an outlet, and connect the AC power cord to the AC/DC
adapter.
6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do not exceed
130 degrees); use the other hand to support the base of the computer (Note:
Never lift the computer by the lid/LCD).
7. Press the power button to turn the computer “on”.

Preface

1.
2.
3.
4.


Shut Down

130 ﾟ

Figure 1
Opening the Lid/LCD/Computer with AC/DC Adapter
Plugged-In

VIII

Note that you should
always shut your
computer down by
choosing Shut Down
from the Start Menu.
This will help prevent
hard disk or system
problems.

Preface

Contents
Introduction ..............................................1-1

Disassembly ...............................................2-1
Overview .........................................................................................2-1
Maintenance Tools ..........................................................................2-2
Connections .....................................................................................2-2
Maintenance Precautions .................................................................2-3
Disassembly Steps ...........................................................................2-4
Removing the Battery ......................................................................2-5
Removing the Hard Disk Drive .......................................................2-6
Removing the Optical (CD/DVD) Device ......................................2-8
Removing the System Memory (RAM) ..........................................2-9
Removing the Wireless LAN Module ...........................................2-11
Removing the 3.75G Module ........................................................2-12
Removing the Keyboard ................................................................2-13

Part Lists ..................................................A-1
Part List Illustration Location ........................................................ A-2
Top (W248BUQ) ............................................................................ A-3
Top (W245BUQ) ............................................................................ A-4

Schematic Diagrams................................. B-1
System Block Diagram ...................................................................B-2
ONTARIO MEM & PCIE I/F, AP .................................................B-3
ONTATIO DISPLAY/ CLK/ MISC ...............................................B-4
ONTARIO POWER & DECOUPLING .........................................B-5
INAGUA DDR3 SO-DIMMS A ....................................................B-6
INAGUA DDR3 SO-DIMMS B ....................................................B-7
Robson S3 PCIE/ LVDS 1/6 ...........................................................B-8
Robson S3 MAIN 2/6 .....................................................................B-9
Robson S3 MEM Interface 3/6 .....................................................B-10
Robson S3 Straps 4/6 ....................................................................B-11
Robson S3 Power 5/6 ....................................................................B-12
Robson S3 Power 6/6 ....................................................................B-13
Robson DDR3 MEM CH-A .........................................................B-14
Robson DDR3 MEM CH-B ..........................................................B-15
HUDSON PCIE/ PCI/ CLOCK/ FCH ..........................................B-16
HUDSON GPIO/ USB/ STRAP ...................................................B-17
HUDSON SATA/ DEBUG IO/ SPI .............................................B-18
HUDSON POWER DECOUPLING ............................................B-19
IX

Preface

Overview .........................................................................................1-1
Models Differences .........................................................................1-1
Specifications ..................................................................................1-2
External Locator - Top View with LCD Panel Open ......................1-4
External Locator - Front & Right side Views .................................1-5
External Locator - Left Side & Rear View .....................................1-6
External Locator - Bottom View .....................................................1-7
Mainboard Overview - Top (Key Parts) .........................................1-8
Mainboard Overview - Bottom (Key Parts) ....................................1-9
Mainboard Overview - Top (Connectors) .....................................1-10
Mainboard Overview - Bottom (Connectors) ...............................1-11

Top (W240BUQ, W241BU-C) ...................................................... A-5
Bottom (W240BU, W241BU) W/O USIM ................................... A-6
Bottom (W240BU, W241BU) With USIM ................................... A-7
Bottom (W248BUQ, W249BU-C) ................................................ A-8
LCD (W240BU, W241BU) ........................................................... A-9
LCD (W245BUQ) ....................................................................... A-10
LCD (W248BUQ - C) ................................................................. A-11
SATA-DVD SUPER MULTI (W245BUQ/ W240BUQ/
W241BU-C) ................................................................................. A-12
SATA-DVD SUPER MULTI (W248BUQ) ................................ A-13
HDD ............................................................................................. A-14

Preface

Preface
POWERGOOD/ TPM .................................................................. B-20
LVDS, INVERTER ...................................................................... B-21
HDMI/ CRT ................................................................................. B-22
CCD/ 3G ....................................................................................... B-23
Card Reader/ LAN JMC261C ...................................................... B-24
MINI PCIE/ SATA HDD/ ODD .................................................. B-25
AUDIO CODEC ALC261C ......................................................... B-26
USB 3.0 VL800 ............................................................................ B-27
KBC- ITE IT8518 ........................................................................ B-28
LED/ MDC/ BT ............................................................................ B-29
USB/ FAN/ TP/ MULTI CON ..................................................... B-30
5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS .............................................. B-31
POWER VDD3/ VDD5 ............................................................... B-32
Power 1.5V/ 0.75 .......................................................................... B-33
Power 1.1V/ 1VS .......................................................................... B-34
Power 1.8VS ................................................................................. B-35
APU CORE/ NB CORE ............................................................... B-36
VGA POWER .............................................................................. B-37
CHARGER/ DC IN ...................................................................... B-38
Click Board .................................................................................. B-39
Audio Board/ USB ....................................................................... B-40
Power Switch & LID Board ......................................................... B-41
EXTERNAL ODD Board ............................................................ B-42

Updating the FLASH ROM BIOS......... C-1

X

Introduction

Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the W241BU/W241BUQ/W240BU/W245BUQ/
W248BUQ/W249BUQ series notebook computer. Information about operating the computer (e.g. getting started, and the
Setup utility) is in the User’s Manual. Information about drivers (e.g. VGA & audio) is also found in User’s Manual.
That manual is shipped with the computer.
Operating systems (e.g. Windows 7 etc.) have their own manuals as do application software (e.g. word processing and
database programs). If you have questions about those programs, you should consult those manuals.

1.Introduction

The W241BU/W241BUQ/W240BU/W245BUQ/W248BUQ/W249BUQ series notebook is designed to be upgradeable.
See Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please
note the warning and safety information indicated by the “” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.

Models Differences
This notebook series includes different models that vary slightly in design style, color and general appearance. Note that though your
computer may look slightly different from that pictured throughout this documentation, all ports, jacks, indicators, specifications and
general functions are the same for all the design styles.

Overview 1 - 1

Introduction

Specifications

Latest Specification Information
The specifications listed here are correct at the
time of sending them to the press. Certain items
(particularly processor types/speeds) may be
changed, delayed or updated due to the manufacturer's release schedule. Check with your
service center for more details.

Processor Options

Audio

AMD-C Series Accelerated Processing Unit - C30
(1.2GHz)

High Definition Audio Compliant Interface

512KB L2 Cache, 40nm, DDR3-1066MHz, TDP 9W

Built-In Microphone

AMD-C Series (Dual-Core) Accelerated Processing Unit C50 (1.0GHz)

Security

1MB L2 Cache, 40nm, DDR3-1066MHz, TDP 9W

2 * Built-In Speakers

Security (Kensington® Type) Lock Slot

Core Logic

BIOS Password

AMD A50M FCH

Communication

LCD

Built-In 10Mb/100Mb Ethernet LAN
(Factory Option) 300K/1.3M Pixel USB PC Camera Module

1.Introduction

14" (35.56cm) HD TFT LCD

Memory

(Factory Option) 3.75G/HSPA Mini-Card Module
WLAN/ Bluetooth Half Mini-Card Modules:
(Factory Option) Wireless LAN (802.11b/g/n)


CPU
The CPU is not a user serviceable part. Accessing the CPU in any way may violate your
warranty.

One 204 Pin SO-DIMM Socket Supporting DDR3 1066/
1333MHz Memory

(Factory Option) Wireless LAN (802.11b/g/n) + Bluetooth
3.0

Memory Expandable up to 4GB

Keyboard
BIOS
“WinKey” keyboard (with embedded numeric keypad)
One 16Mb SPI Flash ROM
AMI BIOS

Pointing Device

Storage

Built-in Touchpad

(Factory Option) One Changeable 12.7mm(h) Super Multi
Optical Device Drive

Interface

(Factory Option) Dummy ODD for Models W240,W241and
W245 only
One Changeable 2.5" 9.5 mm (h) SATA HDD

Three USB 2.0 Ports
One HDMI-Out Port
One Headphone-Out Jack
One Microphone-In Jack

Video Adapter
AMD Radeon™ HD 6250 (APU Integrated)
Shared Memory Architecture of up to 1469MB
Microsoft® DirectX11 Compatible

1 - 2 Specifications

One RJ-45 LAN Jack
One DC-in Jack
One External Monitor Port

Introduction
Card Reader
Embedded Multi-In-1 Card Reader

MMC (MultiMedia Card) / RS MMC
SD (Secure Digital) / Mini SD / SDHC/ SDXC
MS (Memory Stick) / MS Pro / MS Duo

Mini Card Slots
Slot 1 for WLAN Module or WLAN and Bluetooth Combo
Module
(Factory Option) Slot 2 for 3.75G/HSPA Module

Power
3 Cell Smart Lithium-Ion Battery Pack, 24.42WH

1.Introduction

(Factory Option) 6 Cell Smart Lithium-Ion Battery Pack,
48.84WH
(Factory Option) 4 Cell Smart Lithium-Ion Battery Pack
Full Range AC/DC Adapter
AC Input: 100 - 240V, 50 - 60Hz
DC Output: 19V, 1.58A (30W)

Environmental Spec
Temperature
Operating: 5°C - 35°C
Non-Operating: -20°C - 60°C
Relative Humidity
Operating: 20% - 80%
Non-Operating: 10% - 90%

Dimensions & Weight
340mm (w) * 238mm (d) * 13.9 - 31.8mm (h)
2.05 kg (with 24.42WH Battery and ODD)
Or
341mm (w) * 238.5mm (d) * 16 - 34mm (h)
2.05 kg (with 24.42WH Battery and ODD)

Specifications 1 - 3

Introduction
Figure 1

External Locator - Top View with LCD Panel Open

1.Introduction

Top View
1. Optional Built-In
PC Camera
2. LCD
3. Power Button
4. Hot Key Buttons
5. LED Status
Indicators
6. Keyboard
7. Built-In
Microphone
8. Touchpad &
Buttons

1

1

2

2

Design II

Design I

5

4

5

3

3

Design II

6

6

7

8

1 - 4 External Locator - Top View with LCD Panel Open

7

8

Introduction

External Locator - Front & Right side Views

Figure 2
Front Views
1. LED Power
Indicators

1

Right Side Views

1

2

3

4

5

6

1. Microphone-In
Jack
2. Headphone-Out
Jack
3. USB 2.0 Port
4. Optical Device
Drive Bay
5. Security Lock
Slot
6. Security Lock
Slot

External Locator - Front & Right side Views 1 - 5

1.Introduction

Figure 3

Introduction

External Locator - Left Side & Rear View
Figure 4
Left Side View

1

2

3

4

5

5
6

1.Introduction

1. DC-In Jack
2. External Monitor
Port
3. RJ-45 LAN Jack
4. HDMI-Out Port
5. 2 * USB 2.0 Ports
6. Vent
7. Multi-in-1 Card
Reader

Figure 5
Rear View
1. Battery

1 - 6 External Locator - Left Side & Rear View

1

7

Introduction

External Locator - Bottom View
Figure 6
Bottom View

1

1
3
3

2

2

3

4

3

WITHOUT 3G

3
4

5

WITH 3G


Overheating
To prevent your computer from overheating
make sure nothing
blocks the vent/fan intakes while the computer is in use.

External Locator - Bottom View 1 - 7

1.Introduction

3

1. Battery
2. Component Bay
Cover
3. Vent/Fan Intake/
Outlet
4. Hard Disk Bay
Cover
5. 3.75G/HSPA
USIM Card
Cover (optional)

Introduction
Figure 7

Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts

1.Introduction

1. JMC261
2. ITE T851E
3. AZALIA Codec

4
2
1
3

1 - 8 Mainboard Overview - Top (Key Parts)

Introduction

Mainboard Overview - Bottom (Key Parts)

Figure 8
Mainboard Bottom
Key Parts

1
2

3

4

5

6
7

8

Mainboard Overview - Bottom (Key Parts) 1 - 9

1.Introduction

1. Memory Slots
DDR3 SO-DIMM
2. Accelerated
Processing Unit
3. AMD Hudson M1
FCH
4. Mini-Card
Connector (3G
Module)
5. SIMLOCK
6. Mini-Card
Connector (WLAN
Module)
7. CMOS Battery
8. Card Reader
Socket

Introduction
Figure 9

Mainboard Overview - Top (Connectors)

1.Introduction

Mainboard Top
Connectors
1. HDMI-Out Port
2. USB Port 2.0
3. Speaker Cable
Connector
4. Microphone
Cable Connector
5. Audio Board
Connector
6. TouchPad Cable
Connector 2
7. TouchPad Cable
Connector 1
8. Keyboard Cable
Connector
9. Switch Board
Cable Connector

9

1

8

2

4
6
7

2

5
3

1 - 10 Mainboard Overview - Top (Connectors)

Introduction

Mainboard Overview - Bottom (Connectors)

Figure 10
7

9

6

8

1
5

Mainboard Bottom
Connectors

2

4

3

Mainboard Overview - Bottom (Connectors) 1 - 11

1.Introduction

1. Battery
Connector
2. ODD Connector
3. HDD Connector
4. CPU Fan Cable
Connector
5. RJ-45 LAN Jack
6. External Monitor
Port
7. DC-In Jack
8. CCD Cable
Connector
9. LCD Cable
Connector

1.Introduction

Introduction

1 - 12 Mainboard Overview - Bottom (Connectors)

Disassembly

Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the W241BU/W241BUQ/W240BU/W245BUQ/
W248BUQ/W249BUQ series notebook’s parts and subsystems. When it comes to reassembly, reverse the procedures
(unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.

To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a 
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also.


Information

A box with a  will also provide any possible helpful information. A box with a  contains warnings.
An example of these types of boxes are shown in the sidebar.


Warning

Overview 2 - 1

2.Disassembly

Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.

Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).

Maintenance Tools
The following tools are recommended when working on the notebook PC:

2.Disassembly

•
•
•
•
•
•

M3 Philips-head screwdriver
M2.5 Philips-head screwdriver (magnetized)
M2 Philips-head screwdriver
Small flat-head screwdriver
Pair of needle-nose pliers
Anti-static wrist-strap

Connections
Connections within the computer are one of four types:

2 - 2 Overview

Locking collar sockets for ribbon connectors

To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.

Pressure sockets for multi-wire connectors

To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.

Pressure sockets for ribbon connectors

To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.

Board-to-board or multi-pin sockets

To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.

Disassembly

Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions:

Power Safety
Warning
Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.

Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.

Overview 2 - 3

2.Disassembly

1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
components could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight.
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor
the position of magnetized tools (i.e. screwdrivers).
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly
damaged.
5. Be careful with power. Avoid accidental shocks, discharges or explosions.
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies.
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.
6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.



Disassembly

Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.

To remove the Battery:
1. Remove the battery

To remove the 3.75G Module:
page 2 - 5

1. Remove the battery
2. Remove the 3.75G

page 2 - 5
page 2 - 6

To remove the Keyboard:

To remove the HDD:

2.Disassembly

1. Remove the battery
2. Remove the HDD

To remove the Optical Device:
1. Remove the battery
2. Remove the Optical device

page 2 - 5
page 2 - 8

To remove the System Memory:
1. Remove the battery
2. Remove the system memory

page 2 - 5
page 2 - 9

To remove and install a Processor:
1. Remove the battery
2. Remove the processor
3. Install the processor

page 2 - 5
page 2 - 11
page 2 - 13

To remove the WLAN Module:
1. Remove the battery
2. Remove the wireless LAN

2 - 4 Disassembly Steps

page 2 - 5
page 2 - 11

1. Remove the battery
2. Remove the keyboard

page 2 - 5
page 2 - 12

page 2 - 5
page 2 - 13

Disassembly

Removing the Battery
1.
2.
3.
4.

Figure 1

Turn the computer off, and turn it over.
Slide the latch 1 in the direction of the arrow.
Slide the latch 2 in the direction of the arrow, and hold it in place.
Slide the battery 63 in the direction of the arrow 4 .

Battery Removal
a. Slide the latch and hold
in place.
b. Slide the battery in the direction of the arrow.

a.
2

1

2.Disassembly

b.
3


3. Battery

4

Removing the Battery 2 - 5

Disassembly
Figure 2
HDD Assembly
Removal
a. Locate the HDD bay
cover and remove the
screws.

Removing the Hard Disk Drive
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
(h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in
Chapter 4 of the User’s Manual) when setting up a new hard disk.

Hard Disk Upgrade Process
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screws 1 & 2 .
a.

2.Disassembly


HDD System Warning
New HDD’s are blank. Before
you begin make sure:
You have backed up any data
you want to keep from your old
HDD.

1


• 2 Screws

2 - 6 Removing the Hard Disk Drive

2

You have all the CD-ROMs
and FDDs required to install
your operating system and
programs.
If you have access to the internet, download the latest application and hardware driver
updates for the operating system you plan to install. Copy
these to a removable medium.

Disassembly
3.
4.
5.
6.
7.

Remove the hard disk bay cover 63 .
Grip the tab and slide the hard disk in the direction of arrow 4 .
Lift the hard disk out of the bay 5 .
Remove the screws 6 - 9 and the mylar cover 10 from the hard disk 11 .
Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
d.

b.

5

Figure 3
HDD Assembly
Removal (cont’d.)
b. Remove the HDD bay
cover.
c. Grip the tab and slide the
HDD in the direction of
the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screw and
mylar cover.

2.Disassembly

3

c.

e.

9
6

8
4

10

7

11


3. HDD Bay Cover
10. Mylar Cover
11. HDD

• 4 Screws

Removing the Hard Disk Drive 2 - 7

Disassembly
Figure 4
Optical Device
Removal
a. Remove the screws.
b. Remove the cover.
c. Remove the screw and
push the optical device
out off the computer at
point 8.

Removing the Optical (CD/DVD) Device
1.
2.
3.
4.
5.
6.

Turn off the computer, and remove the battery (page 2 - 5).
Locate the RAM & CPU bay cover 1 , and remove screws 2 - 5 .
Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
Carefully disconnect the fan cable 6 , and remove the cover 1 .
Remove the screw at point 7 , and use a screwdriver to carefully push out the optical device 9 at point 8 .
Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
7. Restart the computer to allow it to automatically detect the new device.
a.

2.Disassembly

2

c.

3
1
4

7
5

b.


1. Component Bay Cover
9. Optical Device

• 5 Screws

9
6

2 - 8 Removing the Optical (CD/DVD) Device

8

Disassembly

Removing the System Memory (RAM)

Figure 5

The computer has one memory socket for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting
DDR3 1333/ 1066MHz. The main memory can be expanded up to 8GB. The SO-DIMM modules supported are 1GB,
2GB and 4GB and DDRIII Modules. The total memory size is automatically detected by the POST routine once you turn
on your computer.

Memory Upgrade Process
1.
2.
3.
4.

Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 8).
The RAM modules will be visible at point 1 on the main board.
Gently pull the two release latches on the sides of the memory socket.
The RAM module 2 will pop-up (Figure 6b), and you can then remove it.

a. Locate the memory
socket.
b. Remove the module.


Contact Warning
Be careful not to touch
the metal pins on the
module’s connecting
edge. Even the cleanest hands have oils
which can attract particles, and degrade the
module’s
performance.

1

2


2. RAM Module

5. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
6. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
will go. DO NOT FORCE the module; it should fit without much pressure.
7. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.

Removing the System Memory (RAM) 2 - 9

2.Disassembly

b.

a.

RAM Module
Removal

Disassembly

Figure 6
RAM Module
Removal (cont’d.)
d. Properly re-insert
bay cover pins.

8. Replace the bay cover and screws (make sure you reconnect the fan cable before screwing down the bay
cover).
Note that there are four 5 - 8 cover pins which need to be aligned with slots in the case, to insure a proper cover
fit, before screwing down the bay cover.

the

c.
5

2.Disassembly

6

7
8

9. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.

2 - 10 Removing the System Memory (RAM)

Disassembly

Removing the Wireless LAN Module
1.
2.
3.
4.

Figure 7
Wireless LAN
Module Removal

Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
The Wireless LAN module will be visible at point 1 on the mainboard.
Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket.
Lift the Wireless LAN module 5 (Figure 7c) up and off the computer.

a. Remove the cover.
b. Disconnect the cables
and remove the screw.
c. Lift the WLAN module
out.

c.

a.

5

1

b.
4
3


5. WLAN Module.

2
• 1 Screw

Removing the Wireless LAN Module 2 - 11

2.Disassembly

Note: Make sure you
reconnect the antenna
cable to ‘’1’’ +
‘’2’’socket (Figure
b).

Disassembly
Figure 8
3.75G Module
Removal

Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
The 3.75G module will be visible at point 1 on the mainboard.
Carefully disconnect the cable 2 , then remove the screw 3 from the module socket.
The 3.75G module 4 will pop-up.
Lift the 3.75G module (Figure 8d) up and off the computer.

1.
2.
3.
4.
5.
a.

2.Disassembly

a. Remove the cover.
b. Disconnect the cable
and remove the screw.
c. The 3.75G module will
pop up.
d. Lift the 3.75G module
out.

Removing the 3.75G Module

c.

d.

d.

4

1
4
b.



2

4. 3.75G Module.

• 1 Screw
3

2 - 12 Removing the 3.75G Module

Disassembly

Removing the Keyboard

Figure 9

1. Turn off the computer, and remove the battery (page 2 - 5).
2. Press the four keyboard latches at the top of the keyboard (Figure 9a) to elevate the keyboard from its normal
position (you may need to use a small screwdriver to do this).
3. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable (Figure 9b).
4. Disconnect the keyboard ribbon cable 5 from the locking collar socket 6 (Figure 9b).
5. Carefully lift up the keyboard 7 (Figure 9c) off the computer.
a.
1

2

3

4

Keyboard Removal
a. Press the four latches to
release the keyboard.
b. Lift the keyboard up and
disconnect the cable
from the locking collar.
c. Remove the keyboard.

c.

Re-Inserting the Keyboard

b.
5

7

When re-inserting the
keyboard firstly align
the four keyboard tabs
at the bottom of the
keyboard with the slots
in the case.

6
5


Keyboard Tabs

7. Keyboard

Removing the Keyboard 2 - 13

2.Disassembly



2.Disassembly

Disassembly

2 - 14

Part Lists

Appendix A: Part Lists
This appendix breaks down the W241BU/W241BUQ/W240BU/W245BUQ/W248BUQ/W249BUQ series notebook’s
construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.

A.Part Lists

Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.

A - 1

Part Lists

Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A- 1
Part List Illustration
Location
Parts
Top

W248BUQ

W240BUQ, W241BU-C

page A - 3

Top

A.Part Lists

W245BUQ

page A - 4

Top

page A - 5

Bottom W/O USIM

page A - 6

Bottom W/ USIM
Bottom (W248BUQ, W249BU-C)

page A - 7
page A - 8

LCD

page A - 9

LCD
LCD

page A - 10
page A - 11

DVD-Super Multi Drive
DVD-Super Multi Drive
HDD

A - 2 Part List Illustration Location

page A - 12
page A - 13
page A - 14

Part Lists

Top (W248BUQ)

Figure A - 1

黑色

導電布

今皓
今皓
今皓

(灰色)

度

黑色

非耐落

Top (W248BUQ) A - 3

A.Part Lists

Top (W248BUQ)

Part Lists

Top (W245BUQ)

A.Part Lists

Figure A - 2
Top (W245BUQ)

黑色

(非耐落)

(灰色)

非耐落

頭徑

頭厚

度

A - 4 Top (W245BUQ)

號

黑色

Part Lists

Top (W240BUQ, W241BU-C)

Figure A - 3

黑色

(非耐落)

設變

定位孔

(灰色)

非耐落

度

黑色

Top (W240BUQ, W241BU-C) A - 5

A.Part Lists

Top (W240BUQ,
W241BU-C)

Part Lists

Bottom (W240BU, W241BU) W/O USIM

A.Part Lists

Figure A - 4
Bottom (W240BU,
W241BU) W/O
USIM

A - 6 Bottom (W240BU, W241BU) W/O USIM

Part Lists

Bottom (W240BU, W241BU) With USIM

Figure A - 5

Bottom (W240BU, W241BU) With USIM A - 7

A.Part Lists

Bottom (W240BU,
W241BU) With
USIM

Part Lists

Bottom (W248BUQ, W249BU-C)

A.Part Lists

Figure A - 6
Bottom
(W248BUQ,
W249BU-C)

A - 8 Bottom (W248BUQ, W249BU-C)

Part Lists

LCD (W240BU, W241BU)

Figure A - 7

銘板

中性

今皓 / 泰林

必選

玉鼎

選配

電鑄薄膜鍍亮鉻(字體連結)

FOR 噴漆BACK CASE

LCD (W240BU, W241BU) A - 9

A.Part Lists

LCD (W240BU,
W241BU)

Part Lists

LCD (W245BUQ)

A.Part Lists

Figure A - 8
LCD (W245BUQ)

銘板

(華力)
(銅箔接地)

今皓 / 泰林

中性

A - 10 LCD (W245BUQ)

電鑄薄膜鍍亮鉻(字體連結)

Part Lists

LCD (W248BUQ - C)

Figure A - 9

非耐落

無鉛

設變
(華力)

精乘

LCD (W248BUQ - C) A - 11

A.Part Lists

LCD (W248BUQ C)

Part Lists

SATA-DVD SUPER MULTI (W245BUQ/ W240BUQ/ W241BU-C)

A.Part Lists

Figure A - 10
LCD (W245BUQ/
W240BUQ/
W241BU-C)
*(非耐落)

A - 12 SATA-DVD SUPER MULTI (W245BUQ/ W240BUQ/ W241BU-C)

無鉛

Part Lists

SATA-DVD SUPER MULTI (W248BUQ)

Figure A - 11

*(非耐落)

無鉛

SATA-DVD SUPER MULTI (W248BUQ) A - 13

A.Part Lists

SATA-DVD SUPER
MULTI (W248BUQ)

Part Lists

HDD

A.Part Lists

Figure A - 12
SATA-DVD SUPER
MULTI (W248BUQ)

無鉛
(無鉛)

A - 14 HDD

Schematic Diagrams

Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the W241BU/W241BUQ/W240BU/W245BUQ/W248BUQ/W249BUQ notebook’s PCB’s. The following table indicates where to find the appropriate schematic diagram.
Diagram - Page

Diagram - Page

Diagram - Page

HUDSON PCIE/ PCI/ CLOCK/ FCH - Page B - 16

USB/ FAN/ TP/ MULTI CON - Page B - 30

ONTARIO MEM & PCIE I/F, AP - Page B - 3

HUDSON GPIO/ USB/ STRAP - Page B - 17

5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS - Page B - 31

ONTATIO DISPLAY/ CLK/ MISC - Page B - 4

HUDSON SATA/ DEBUG IO/ SPI - Page B - 18

POWER VDD3/ VDD5 - Page B - 32

ONTARIO POWER & DECOUPLING - Page B - 5

HUDSON POWER DECOUPLING - Page B - 19

Power 1.5V/ 0.75 - Page B - 33

INAGUA DDR3 SO-DIMMS A - Page B - 6

POWERGOOD/ TPM - Page B - 20

Power 1.1V/ 1VS - Page B - 34

INAGUA DDR3 SO-DIMMS B - Page B - 7

LVDS, INVERTER - Page B - 21

Power 1.8VS - Page B - 35

Robson S3 PCIE/ LVDS 1/6 - Page B - 8

HDMI/ CRT - Page B - 22

APU CORE/ NB CORE - Page B - 36

Robson S3 MAIN 2/6 - Page B - 9

CCD/ 3G - Page B - 23

VGA POWER - Page B - 37

Robson S3 MEM Interface 3/6 - Page B - 10

Card Reader/ LAN JMC261C - Page B - 24

CHARGER/ DC IN - Page B - 38

Robson S3 Straps 4/6 - Page B - 11

MINI PCIE/ SATA HDD/ ODD - Page B - 25

Click Board - Page B - 39

Robson S3 Power 5/6 - Page B - 12

AUDIO CODEC ALC261C - Page B - 26

Audio Board/ USB - Page B - 40

Robson S3 Power 6/6 - Page B - 13

USB 3.0 VL800 - Page B - 27

Power Switch & LID Board - Page B - 41

Robson DDR3 MEM CH-A - Page B - 14

KBC- ITE IT8518 - Page B - 28

EXTERNAL ODD Board - Page B - 42

Robson DDR3 MEM CH-B - Page B - 15

LED/ MDC/ BT - Page B - 29

Schematic
Diagrams


Version Note
The schematic diagrams in this chapter
are based upon version 6-7P-W2405003. If your mainboard
(or
other
boards) are a later
version,
please
check with the Service Center for updated
diagrams
(if
required).

B - 1

B.Schematic Diagrams

System Block Diagram - Page B - 2

Table B - 1

Schematic Diagrams

System Block Diagram
W240BU/W250BUQ/W250BAQ System Block Diagram

CLICK BOARD
6-71-W2402-D01

POWER SWITCH BOARD
POWER SWITCH+HOTKEY X 3
6-71-E51QS-D02

A T I RO BS O N
(S3 TYPE)

PCIE*4

USB+EARPHONE+EXT.MIC
6-71-W2408-D02

EXTERNAL ODD BOARD
EXT. ODD
6-71-E51QN-D01

GPU POWER, VDDC
MVDDQ,1.8V_REG,1.0V_REG

AMD FUSION APU
Ontario FT1

5V,3V,5VS,3.3VS
1.5VS,1.1VS

41 3-B A LL
19 mm X 19mm B GA
S IN GLE C H A NN E L D D R 3
D I SP LA Y P OR T X 2
D X 11 IGP
4 X 1 P C IE GE N 2 GP P
1 X 4 U M I-L IN K GE N 1
V GA D A C

512MB DDR3

AUDIO BOARD

LCD CONNECTOR

1066MHz
DDR3 / 1.5V
DDRIII
SO-DIMM2
SHEET 6

APU_CORE,NB_CORE
1.5V,0.75VS(VTT_MEM)

DDRIII
SO-DIMM1
SHEET 5

CRT Connector

1.1V, 1VS

UMI*4

HDMI Conne ctor

B.Schematic Diagrams

VDD3,VDD5

1.8VS

USB PORT
(USB4)

AMD HUDSON-M1

MIC
IN

HP
OUT

INT SPK R

CHARGER,DC IN
TOUCH PAD

Sheet 1 of 41
System Block
Diagram

SHEET 38

605-BALL

CLICK BOARD

SPI

23mmX23mm BG A
TPM

(Reserve)

32.768 KHz

EC
ITE 8518
128pins LQFP

LPC

14 *1 4*1 .6m m

INT. K/B

P C IE GE N 1 I/F (4 x 1)
U SB 2. 0(12) + 1.1 (2)
S AT AI I (3 P OR TS )
IN T. C LK GE N
A ZA LIA H D AU D I O
GB M A C
S PI I/F
LP C I/ F
H W M ON ITOR

33 MHz
BIOS
SPI

EC SMBUS
THERMAL
SENSOR
W83L771AWG

SMART
BATTERY
AC-IN

SMART
FAN

INT SPKER

Azalia Codec
REALTEK
ALC269

INT MIC

24 MHz AZALIA LINK
PCIE

100 MHz

32.768KHz

USB 3.0

(USB9)

Mini PCIE
SOCKET
(USB2)

(Optional)

3G CARD

WLAN

(Reserve)

USB2.0
480 Mbps

(USB3)

JMICRO JMC261C

LAN

RJ-45

SATA HDD

SATA ODD

SATA I/II 3.0Gb/s

B - 2 System Block Diagram

USB PORT USB PORT
(USB0)
(USB1)

Bluetooth
(USB6)

CCD
(USB5)

CARD
READER

7IN1
SOCKET

25
MHz

Schematic Diagrams

ONTARIO MEM & PCIE I/F, AP
DD R0
DD R1
DD R2
DD R3
DD R4
DD R5
DD R6
DD R7
DD R8
DD R9
DD R1 0
DD R1 1
DD R1 2
DD R1 3
DD R1 4
DD R1 5

M E M _D A T A [ 6 3 : 0 ] 5 , 6

U1 E
M _AD D0

H1 9
J17
H1 8
H1 7
G1 7
H1 5
G1 8
F1 9
E1 9
T1 9
F1 7
E1 8
W17
E1 6
G1 5

M _D AT A0
O NT ARI O 2
( . 0)

M _AD D1
M _AD D2

PA RT 1 O F 5

M _D AT A1
M _D AT A2

M _AD D3

M _D AT A3

M _AD D4

M _D AT A4

M _AD D5

M _D AT A5

M _AD D6

M _D AT A6

M _AD D7
M _AD D8

M _D AT A7

M _AD D9

M _D AT A8

M _AD D10
M _AD D11

M _D AT A9
M _D ATA 10

M _AD D12
M _AD D13

M _D ATA 11
M _D ATA 12

M _AD D14

M _D ATA 13

M _AD D15

M _D ATA 14
M _D ATA 15

ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M

_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ
_ DQ

S _ H0
S_ L 0
S _ H1
S_ L 1
S _ H2
S_ L 2
S _ H3
S_ L 3
S _ H4
S_ L 4
S _ H5
S_ L 5
S _ H6
S_ L 6
S _ H7
S_ L 7

M
M
M
M
M
M
M
M

EM
EM
EM
EM
EM
EM
EM
EM

_D
_D
_D
_D
_D
_D
_D
_D

M0
M1
M2
M3
M4
M5
M6
M7

D1 5
B1 9
D2 1
H2 2
P2 3
V2 3
AB2 0
AA1 6
A1 6
B1 6
B2 0
A2 0
E2 3
E2 2
J22
J23
R2 2
P2 2
W22
V2 2
A C2 0
A C2 1
AB1 6
A C1 6

M _BA NK0
M _BA NK1

M _D ATA 16

M _BA NK2

M _D ATA 17
M _D ATA 18

M _DM 0

M _D ATA 19

M _DM 1

M _D ATA 20

M _DM 2
M _DM 3

M _D ATA 21
M _D ATA 22

M _DM 4

M _D ATA 23

M _DM 5
M _DM 6

M _D ATA 24

M _DM 7

M _D ATA 25
M _D ATA 26

M _DQ S_H 0

M _D ATA 27

M _DQ S_L 0

M _D ATA 28

M _DQ S_H 1

M _D ATA 29

M _DQ S_L 1

M _D ATA 30

M _DQ S_H 2

M _D ATA 31

M _DQ S_L 2
M _DQ S_H 3
M _DQ S_L 3
M _DQ S_H 4
M _DQ S_L 4
M _DQ S_H 5
M _DQ S_L 5
M _DQ S_H 6
M _DQ S_L 6

M
M
M
M
M
M
M
M

E M_ C
E M_ C
E M_ C
E M_ C
E M_ C
E M_ C
E M_ C
E M_ C

LK
LK
LK
LK
LK
LK
LK
LK

_H 0
_L 0
_H 1
_L 1
_H 2
_L 2
_H 3
_L 3

5 , 6 M E M_ R E S E T #
5 , 6 M E M_ E V E N T #

M1 7
M1 6
M1 9
M1 8
N1 8
N1 9
L18
L17

M _D ATA 33
M _D ATA 34
M _D ATA 35
M _D ATA 36
M _D ATA 37
M _D ATA 38
M _D ATA 39

M _DQ S_H 7
M _DQ S_L 7

L23
N1 7

M _D ATA 40

M _C LK_H 0

M _D ATA 42

M _C LK_L0

M _D ATA 43

M _C LK_H 1

M _D ATA 44

M _C LK_L1
M _C LK_H 2

M _D ATA 45
M _D ATA 46

M _C LK_L2

M _D ATA 47

M _C LK_H 3
M _C LK_L3

M _D ATA 48
M _D ATA 49

M _RE SET _L

M _D ATA 50

M _EV ENT _L

M _D ATA 51
M _D ATA 52
M _D ATA 53

5, 6
5, 6

ME M _ C K E 0
ME M _ C K E 1

F1 5
E1 5

M _CK E0

M _D ATA 54

M _CK E1

M _D ATA 55

M _D ATA 56

5 D I MM 0 _O D T 0
5 D I MM 0 _O D T 1
6 D I MM 1 _O D T 0
6 D I MM 1 _O D T 1
5 D I MM 0 _C S # 0
5 D I MM 0 _C S # 1
6 D I MM 1 _C S # 0
6 D I MM 1 _C S # 1
5, 6
5, 6
5, 6

ME M _ R A S #
ME M _ C A S #
ME M _ W E #

W19
V1 5
U1 9
W15
T1 7
W16
U1 7
V1 6
U1 8
V1 9
V1 7

ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M

_ DA T A 0
_ DA T A 1
_ DA T A 2
_ DA T A 3
_ DA T A 4
_ DA T A 5
_ DA T A 6
_ DA T A 7

C
A
B
D
A
B
A
C

18
19
21
20
18
18
21
20

ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M

_ DA T A 8
_ DA T A 9
_ DA T A 1 0
_ DA T A 1 1
_ DA T A 1 2
_ DA T A 1 3
_ DA T A 1 4
_ DA T A 1 5

C
D
F
F
C
D
F
F

23
23
23
22
22
22
20
21

ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M

_ DA T A 1 6
_ DA T A 1 7
_ DA T A 1 8
_ DA T A 1 9
_ DA T A 2 0
_ DA T A 2 1
_ DA T A 2 2
_ DA T A 2 3

H
H
K
K
G
H
K
K

21
23
22
21
23
20
20
23

ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M

_ DA T A 2 4
_ DA T A 2 5
_ DA T A 2 6
_ DA T A 2 7
_ DA T A 2 8
_ DA T A 2 9
_ DA T A 3 0
_ DA T A 3 1

N 23
P 21
T2 0
T2 3
M 20
P 20
R 23
T2 2

ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M

_ DA T A 3 2
_ DA T A 3 3
_ DA T A 3 4
_ DA T A 3 5
_ DA T A 3 6
_ DA T A 3 7
_ DA T A 3 8
_ DA T A 3 9

V 20
V 21
Y 23
Y 22
T2 1
U 23
W 23
Y 21

ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M

_ DA T A 4 0
_ DA T A 4 1
_ DA T A 4 2
_ DA T A 4 3
_ DA T A 4 4
_ DA T A 4 5
_ DA T A 4 6
_ DA T A 4 7

Y
A
A
A
A
A
A
Y

20
B2 2
C1 9
A1 8
A2 3
A2 0
B1 9
18

ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M

_ DA T A 4 8
_ DA T A 4 9
_ DA T A 5 0
_ DA T A 5 1
_ DA T A 5 2
_ DA T A 5 3
_ DA T A 5 4
_ DA T A 5 5

A
Y
A
A
A
A
A
A

C1 7
16
B1 4
C1 4
C1 8
B1 8
B1 5
C1 5

ME M
ME M
ME M
ME M
ME M
ME M
ME M
ME M

_ DA T A 5 6
_ DA T A 5 7
_ DA T A 5 8
_ DA T A 5 9
_ DA T A 6 0
_ DA T A 6 1
_ DA T A 6 2
_ DA T A 6 3

For W250BA Q
U1 A
7
7

V GA _ R X P 0
V GA _ R X N 0

7
7

V GA _ R X P 1
V GA _ R X N 1

7
7

VG A_ RXP2
VG A_ RXN 2

7
7

VG A_ RXP3
VG A_ RXN 3

M 0_O DT0

M _D ATA 57
M _D ATA 58

M 0_O DT1
M 1_O DT0

M _D ATA 59
M _D ATA 60

M 1_O DT1

M _D ATA 61

M 0_CS _L0

M _D ATA 62
M _D ATA 63

AA6
Y6

P _G PP_ RXP 0
P _G PP_ RXN 0

AB4
A C4

P _G PP_ RXP 1
P _G PP_ RXN 1

ON _Z V D D

1 VS
M _D ATA 32

M _D ATA 41

5
5
5
5
6
6
6
6

14
15
17
18
14
14
16
16

R 2

AA1
AA2

P _G PP_ RXP 2

Y4
Y3

P _G PP_ RXP 3

Y1 4

O N TAR I O ( 2. 0)
P ART 2O F 5

P_G PP _TX P0
P_G PP _TX N0

AB6
AC6

C1
C2

* 0. 1u _ 1 0 V _ X7 R _ 04
* 0. 1u _ 1 0 V _ X7 R _ 04

V G A _ TX P 0 7
V G A _ TX N 0 7

P_G PP _TX P1
P_G PP _TX N1

AB3
AC3

C3
C4

* 0. 1u _ 1 0 V _ X7 R _ 04
* 0. 1u _ 1 0 V _ X7 R _ 04

V G A _ TX P 1 7
V G A _ TX N 1 7

Y1
Y2

C5
C6

* 0. 1u _ 1 0 V _ X7 R _ 04
* 0. 1u _ 1 0 V _ X7 R _ 04

VG A_ TXP2 7
V G A _ T X N2 7

V3
V4

C7
C8

* 0. 1u _ 1 0 V _ X7 R _ 04
* 0. 1u _ 1 0 V _ X7 R _ 04

VG A_ TXP3 7
V G A _ T X N3 7

P_G PP _TX P2

P _G PP_ RXN 2

P _G PP_ RXN 3

P _ZV DD _10

P_G PP _TX N2

P_G PP _TX P3
P_G PP _TX N3

P_ ZVS S

AA1 4

ON _ Z V S S

R 1

Sheet 2 of 41
ONTARIO MEM &
PCIE I/F, AP

B.Schematic Diagrams

5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6
5 ,6

R1 8
T1 8
F1 6

M EMO RY I/F

5 , 6 M E M _B A N K 0
5 , 6 M E M _B A N K 1
5 , 6 M E M _B A N K 2
5 , 6 M E M_ D M[ 7 : 0 ]

B
A
A
D
A
C
C
D

PC IE I/F

M EM _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A
M E M _A

1. 27 K _ 1 % _ 0 4

2 K _ 1% _ 0 4

1 5 C _U MI _ P _ R X 0
1 5 C _U MI _ N _ R X 0
1 5 C _U MI _ P _ R X 1
1 5 C _U MI _ N _ R X 1
1 5 C _U MI _ P _ R X 2
1 5 C _U MI _ N _ R X 2
1 5 C _U MI _ P _ R X 3
1 5 C _U MI _ N _ R X 3

AA1 2
Y1 2

P _UM I _RX P0
P _UM I _RX N0

P _UM I _TX P0
P _UM I _TX N0

AB1 2
AC1 2

C9
C1 0

0 . 1 u _ 10 V _ X 7 R _ 0 4
0 . 1 u _ 10 V _ X 7 R _ 0 4

C _ U MI _ P _ T X 0 1 5
C _ U MI _ N _ TX 0 1 5

AA1 0
Y1 0

P _UM I _RX P1
P _UM I _RX N1

P _UM I _TX P1
P _UM I _TX N1

AC1 1
AB1 1

C1 1
C1 2

0 . 1 u _ 10 V _ X 7 R _ 0 4
0 . 1 u _ 10 V _ X 7 R _ 0 4

C _ U MI _ P _ T X 1 1 5
C _ U MI _ N _ TX 1 1 5

AA8
Y8

C1 3
C1 4

0 . 1 u _ 10 V _ X 7 R _ 0 4
0 . 1 u _ 10 V _ X 7 R _ 0 4

C _ U MI _ P _ T X 2 1 5
C _ U MI _ N _ TX 2 1 5

AB8
AC8

C1 5
C1 6

0 . 1 u _ 10 V _ X 7 R _ 0 4
0 . 1 u _ 10 V _ X 7 R _ 0 4

C _ U MI _ P _ T X 3 1 5
C _ U MI _ N _ TX 3 1 5

UM I I/F

5 , 6 M E M_ A D D R [ 1 5 : 0 ]

R 17

ONTARIO MEM & PCIE I/F, AP

AB1 0
A C1 0

P _UM I _RX P2
P _UM I _RX N2

P _UM I _TX N2

A C7
AB7

P _UM I _RX P3

P _UM I _TX P3

P _UM I _TX P2

P _UM I _RX N3

P _UM I _TX N3

O N T A R I O_ A P U

ROUTE A- LIN K D IFF PAI R @ 8 5 OHM +/ - 10 %
C8 4 2

C 84 3

C 844

1 0 u_ 6 . 3 V _ X 5 R _ 0 6
0 . 1u _ 1 0 V _ X 7R _ 04
1 0 0 0 p_ 5 0 V _ X 7R _ 0 4

1 .5 V

V T T _M E M
R 67 8
1 K _ 1 % _0 4

Analog Thermal Sensor
3. 3V

M 0_CS _L1
M 1_CS _L0
M 1_CS _L1

M _V RE F

R 67 9
R 68 0

M 23

* 0 _0 4
0_04

Q1 5
2

1
VC C

OU T

1:2 (4mils:8mils)

T H E R M _ V OL T 2 7

1 .5 V

M _RA S_L
M _CA S_L
M _WE_L

M _Z VDD I O_M E M _S

M 2 2 M E M _Z V D D I O

R 6

3 9. 2_ 1 % _ 0 4

R 68 1
1 K _ 1 % _0 4

3

C 3 65

G ND

0 . 1 u _ 10 V _ X 5 R _ 0 4

G 7 11 S T 9 U

C3 6 4
0 . 1u _ 1 0 V _ X 5R _ 0 4

O N TA R I O _A P U

Not e: Open th e sod lermas k for Vi as on Mem int erfac e

R6 c onnec tion to VD DIO_SU S s hould
be direc tly t o the pla n e with ou t a long tr ac e

1

PLACE NEAR U1

3

2

ONTARIO MEM & PCIE I/F, AP B - 3

Schematic Diagrams

ONTATIO DISPLAY/ CLK/ MISC
ONTARIO DISPLAY/CLK/MISC

1 .8 V S
R 11
R 12

1 K_ 0 4
1 K_ 0 4

C P U_ S V C
C P U_ S V D

R 14

3 0 0_ 1 % _ 0 4

APU _ PW R G D

U 1B

P R OC H OT #

20
20

L V D S -L 2P
L V D S -L 2N

20
20

L V D S -L 1P
L V D S -L 1N

TD P1 _TX P2

A1 0
B1 0

TD P1 _TX P3

LVD S

R 13
3 0 0_ 1 % _ 0 4
L DT _ R S T #

Sheet 3 of 41
ONTATIO
DISPLAY/ CLK/
MISC

C 84 0
0 . 1 u _1 6 V _ Y 5 V _ 0 4

L V D S -L C L K P
L V D S -L C L K N

15
15

A P U _C L K P
A P U _C L K N

15
15

DIS P _ CL K P
DIS P _ CL K N

35
35

CP U_ S V C
C PU _ SVD

16
16
L D T R S T_ R
L D T P W R GD _ R

C 21

15
1 5, 35

* 1 50 p F _ N P O _ 50 V _ 0 4 0 2* 1 5 0p F _ N P O _ 50 V _0 4 0 2

35

H3

R 21

1 5 0 _ 1% _ 0 4

ON _ B L O N
ON _ D I GO N
ON _ V A R Y

R 16
R 5 98

0_04
0_04

H D MI _ D D C _ C LK
H D MI _ D D C _ D A T A

D 6
C 6

LT DP 0_TX P1

LT DP 0_H PD

D3

A6
B6

LT DP 0_TX P2

LT DP 0_TX N1

LT DP 0_TX N2

LT DP 0_TX P3

DAC _R ED
D AC_ RE DB
D AC _G RE EN
DA C_G R EE NB
D AC _BL UE

LT DP 0_TX N3

DA C_B LU EB

C LK IN _H

D I SP _CLK I N_H

DA C_H SY NC

C1 2
D1 3
A1 2
B1 2
A1 3
B1 3

LV D S _ D D C _ C LK
LV D S _ D D C _ D A T A
R 60
*1 0 0 K _ 0 4
R 62
*1 0 0 K _ 0 4

R2 7

1 5 0_ 1 % _ 0 4

R2 8

1 5 0_ 1 % _ 0 4

R 35
R 36

T3
T4

0_04
0_04

L DT R ST _ R
L DT P W RG D_ R

0_04

P R OC H O T #
A P U _ TH E R MT R I P #

U 1
U 2
T2

A P U _ TD I
A P U _ TD O
A P U _ TC K
A P U _ TM S
A P U _ TR S T #
DB RD Y
DB RE Q #

N 2
N 1
P1
P2
M4
M3
M1

F4
*1 0 m i l _s h o rt _ 0 4 V D D C R _ N B _ S E N S E
*1 0 m i l _s h o rt _ 0 4 V D D C R _ C P U _S E N S E G 1
VD DIO _ S U S _ S E N SE F 3
*1 0 m i l _s h o rt _ 0 4 V S S _ S E N S E
*1 0 m i l _s h o rt _ 0 4

R 48
R 49

F1
B4
W11
V5

R2 9

D AC _SC L

S VC

D AC_ ZV SS

SV D
T ES T4

E1
E2

DA C_ H S Y NC
DA C_ V S Y N C

F2
D4

SIC

T ES T5

SI D

T ES T6
T ES T14

RE SE T_L

T ES T15

PW RO K

T ES T16
T ES T17

PR O CH O T_L
TH ER M TR IP _L

T ES T18
T ES T19

AL ER T_L

TE ST 25_H

TD I

T ES T25_L
TE ST 28_H

TD O

T ES T28_L

T CK

T ES T31

TM S
TR ST _L

TE ST 33_H
T ES T33_L

DB RD Y

TE ST 34_H

DB RE Q _L

T ES T34_L
T ES T35

VD DC R_N B_ SE NS E

T ES T36

VD DC R_C PU _S EN SE

T ES T37

DA C _ RS E T

R1
R2
R6
T5
E4
K4
L1
L2
M2
K1
K2
L5
M5
M2 1
J1 8
J1 9
U1 5
T1 5
H4
N5
R5

A P U _T H E R MD A
A P U _T H E R MD C

_T E
_T E
_T E
_T E

5

R3 1
R3 2

*0 _ 0 4
*0 _ 0 4

R 58

A P U _T E S T 3 3_ H _ M_ C L K T S T _ H
A P U _T E S T 3 3_ L _ M _C L K T S T _ L

C 23
C 24

L DT _ R S T # _ B UF

R 44

* 1 K _ 04

A PU _ P W R G D_ B U F R5 4

* 1 K _ 04

T ES T38
RS VD _1

D M AA CT V
I E_L

K3
T1

ON _ D MA A C T I V E #

R 50

0_04

A L LO W _ L D T S T P 1 5

RS VD _2
O NT AR IO ( 2. 0)
RS VD _3

R5 1

3
5
3

Reserve
1. 8V S

H DT + H EA D E R / P L A C E O N T O P

1 .8 V S

1 .8 VS

J1
R 59
1 K_ 0 4
A P U _ T RS T # R
R
R
R

65
66
67
68

*
*
*
*

0 _0 4 H D T _ T R S T #
1 0K _ 04
1 0K _ 04
1 0K _ 04

1
3
5
7
9
11
13
15
17
19

CP U_ VD DI O
G ND
G ND
G ND

C PU _TC K
CP U_T M S
CP U_ TD I
CP U_T DO

CP U_ TR ST_ L

CP U_P WRO K _BU F

CP U_ DB RDY 3

C PU _R ST_ L_BU F

CP U_ DB RDY 2

C PU _DB RD Y0

CP U_ DB RDY 1

CP U_D BR EQ _L

G ND

CP U_ PLLT ES T0

CP U_ VD DI O

CP U_ PLLT ES T1

* H D R 10 X 2 - B LU E - V E R T I C A L P L U G

B - 4 ONTATIO DISPLAY/ CLK/ MISC

5 1 _ 04
5 1 _ 04

VS S_ SEN SE

* 74 A H C 1 G0 8 GW
4

R 42
R 43

VD DI O _M EM _S _S ENS E

1. 8V S

2

1 6 ,1 7 ,2 7
1 6 ,1 7 ,2 7

* 1K _0 4

R5 6

R5 2

1 .8 V S
R5 3

APU _ SIC
APU _ SID

1. 8V S

0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
0 . 1 u_ 1 6 V _ Y 5 V _ 0 4

A P U _T E S T 3 5
A P U _T E S T 3 6

1 K_ 0 4 1 K_ 0 4 1 K_ 0 4
4

U4 5
1

1 K _0 4
1 K _0 4
5 1 0 _ 1 % _ 04
5 1 0 _ 1 % _ 04

PA RT 3 O F 5

* 74 A H C 1 G0 8 GW

0_04
0_04

S MD _ C P U _ T H E R M
S MC _ C P U _ T H E R M

1 K_ 0 4

R3 7
R3 9
R4 0
R4 1

2

A P U _ P W R GD

R 33
R 34

4 9 9 _1 % _ 0 4

S T 1 8_ P L L T E S T 1
S T 1 9_ P L L T E S T 0
S T 2 5_ H _ B Y P A S S C L K
S T 2 5_ L _ B Y P A S S C L K

ON T A R I O_ A P U
U4 4
1

21
21

DA C_ D DC A C L K 2 1
DA C _ DD C A DA T A 2 1

A P U _B P 1 _ T S T U P D _ U S C L K 1

APU
APU
APU
APU

21

D A C _ B LU E 2 1

1 5 0_ 1 % _ 0 4

D1 2

21

D A C_ G R E E N

DAC _S DA

1. 8V S

L DT _ R S T #

1 0 0 K_ 0 4
1 0 0 K_ 0 4
1 0 0 K_ 0 4

21

D A C_ R E D

R 30

P3
P4

R 5 91
R 5 92
R 5 93

LV D S _ D D C _ C LK 2 0
LV D S _ D D C _ D A T A 2 0
5V S

DA C_V SY NC

D I SP _CLK I N_L

A P U _S I C
A P U _S I D

O N_ BL O N
O N _ D I GO N
O N_ VA R Y

H D MI _ D D C _ C LK 2 1
H D MI _ D D C _ D A T A 2 1
P OR T C _ H P D

A3
B3

J1
J2

BL O N
20
N B_ EN AVD D 2 0

C1

LTD P0_ AU XN

C LK IN _L

R 45
R 46

3 5 C P U _V D D 0 _ R U N _ F B _ L
3 5 C P U _V D D N B _ R U N _ F B _ L

ON D P _ C A LR

T DP 1_H PD

LTD P0_ AU XP

V2
V1

R 38

CP U _ V D DN B _ RU N _ F B _ H
3 5 C P U _V D D 0 _ R U N _ F B _ H

B2
C2

LT DP 0_TX N0

D 2
D 1

PRO C HO T #

1 6 CP U _ T HE RM T RIP #
1 7 ,2 7 AP U_ T A L E R T #

TD P1_ AU XN

H1

LT DP 0_TX P0

D 8
C 8

A P U_ S IC
A P U_ S ID

L D T_ R S T #
A P U_ P W RG D

L D T _R S T #
A P U _P W R GD

15

C 22

TD P1_ AU XP

TD P1 _TX N3

L V D S -L 0P
L V D S -L 0N

20
20

TD P1 _TX N2

DP_ BLO N
D P_D IG O N
DP _VA RY _BL

B5
A5

1 .8 V S
20
20

TD P1 _TX N1

H 2 G2

D1 0
C1 0

DPM ISC

TD P1 _TX P1

DISPL AYPORT 1

B9
A9

VGADAC

0_ 0 4

H D M I B _ D 0B P
H D M I B _ D 0B N

2 1 H D MI B _ C L K B P
2 1 H D MI B _ C L K B N

DP_ ZV SS

TD P1 _TX N0

TEST

R2 5

H D M I B _ D 1B P
H D M I B _ D 1B N

21
21

HD M I
1 7 S B _ P RO C HO T #

21
21

TD P1 _TX P0

B8

DISPL AYPORT 0

_ TH E R MT R I P #
_ TA L E R T #
C HO T #
_ SIC
_ SID

H D M I B _ D 2B P
H D M I B _ D 2B N

CLK

APU
APU
P RO
APU
APU

21
21

SER

*1 K _ 0 4
1K _ 04
1K _ 04
1K _ 04
1K _ 04
1K _ 04

CTRL

R1 5
R2 2
R1 7
R1 9
R2 4
R2 0

J TAG

3 .3 V S

B.Schematic Diagrams

ANAL OG/DISPLAY/MISC

A8

3 .3 V

2
4
6
8
10
12
14
16
18
20

A P U _ T CK
A P U _ T MS
A P U _ T DI
A P U _ T DO
A PU _ P W R G D_ B U
L D T _ R S T # _B U F
D B RD Y
D B R E Q#
J 1 08 _ P L L T S T 0
J 1 08 _ P L L T S T 1

R6 1
R6 3
R6 4

1 K_ 0 4
1 K_ 0 4
1 K_ 0 4

F

R6 9
R7 0
R7 1

3 0 0_ 1 % _ 0 4
*0 _ 0 4
*0 _ 0 4

A P U _ T E S T 1 9 _P L LT E S T 0
A P U _ T E S T 1 8 _P L LT E S T 1

1 .8 VS

Schematic Diagrams

ONTARIO POWER & DECOUPLING
ONTARIO POWER & DECOUPLING
1 .8 V S

V D D C R _C P U

E5
E6
F5
F7
G6
G8
H5
H7
J6
J8
L7
M6
M8
N7
R8

V D D C R _N B

C 30

V DD CR _C PU _1

VD D_1 8_1

V DD CR _C PU _2

VD D_1 8_2

V DD CR _C PU _3

VD D_1 8_3

V DD CR _C PU _4

VD D_1 8_4

V DD CR _C PU _5

VD D_1 8_5

V DD CR _C PU _6

VD D_1 8_6

V DD CR _C PU _7

VD D_1 8_7

U 8
W 8
U 6
U 9
W 6
T7
V 7

C 26

C 27

C 29

C 28

C3 1

U 1D

C 869

C 87 1

C 870

V DD CR _C PU _8

*1 0 u _ 6 . 3 V _ X 5R _ 0 6
*1 0 u _ 6 . 3 V _ X 5R _ 0 6
* 1 0u _ 6 . 3 V _ X 5 R _0 6

V DD CR _C PU _9
V DD CR _C PU _10
V DD CR _C PU _11
V DD CR _C PU _12
V DD CR _C PU _13
V DD CR _C PU _14
V DD CR _C PU _15

V D DA N _ 1 8 _ DA C
1 .8 VS

1 .5 V

V DD CR _N B_1

V DD _18_D AC

R 73

0 _0 4

V DD CR _N B_3
V DD CR _N B_4
V DD CR _N B_5

C 872

ON TA RI O ( 2.0 )
P AR T 4 O F 5

C 32

C 33

1 0 u _ 6 . 3 V _ X 5R _ 0 6
*1 0 u _ 6 . 3 V _ X 5R _ 0 6
1 u _ 6 .3 V _ X 5 R_ 0 4

V DD CR _N B_6
V DD CR _N B_7
V DD CR _N B_8
V DD CR _N B_9
V DD CR _N B_10
V DD CR _N B_11
V DD CR _N B_12
V DD CR _N B_13
V DD CR _N B_14
V DD CR _N B_15

1V S

V DD P L _ 1 0
V DD PL _10

U 11

L63

C 34

C 35

.

H C B 1 6 0 8 K F -1 2 1 T 2 5
C 36

V DD CR _N B_16

1 0u _ 6 . 3 V _ X 5 R _0 6
0 .1 u _ 1 0 V_ X 5 R_ 0 4
1 u _ 6. 3V _ X5 R _ 0 4

V DD CR _N B_17
V DD CR _N B_18
V DD CR _N B_19
V DD CR _N B_20

1 VS

V DD CR _N B_21
V DD CR _N B_22

VD D_1 0_1
VD D_1 0_2

G1 6
G1 9
E1 7
J16
L16
L19
N1 6
R1 6
R1 9
W18
U1 6

W 9

V DD CR _N B_2

P OW ER

E8
E1 1
E1 3
F9
F12
G1 1
G1 3
H9
H1 2
K1 1
K1 3
L10
L12
L14
M1 1
M1 2
M1 3
N1 0
N1 2
N1 4
P1 1
P1 3

VD D_1 0_3
V DD I O _M EM _S _1
V DD I O _M EM _S _2

VD D_1 0_4

U 13
W 13
V 12
T1 2
C 37

C 38

C 39

C4 0

C 41

C 42

V DD I O _M EM _S _3

1 0u _ 6 . 3 V _ X 5 R _0 6
1 u _ 6 .3 V _ X5 R_ 0 4
0 . 1 u _1 0 V _ X 5 R _ 04
1 0 u _ 6 .3 V _ X 5 R_ 0 6
1 u _ 6 .3 V _ X 5 R_ 0 4
0 .1 u _ 1 0 V _ X 5 R_ 0 4

V DD I O _M EM _S _4
V DD I O _M EM _S _5
V DD I O _M EM _S _6
V DD I O _M EM _S _7
V DD I O _M EM _S _8

3 .3 V S

V DD I O _M EM _S _9

C8 7 3

C 874

V SS _1

O N TA RI O 2
( .0)

VS S_50

V SS _2

P AR T 5 O F 5

VS S_51

V SS _3

VS S_52

V SS _4

VS S_53

V SS _5

VS S_54

V SS _6

VS S_55

V SS _7

VS S_56

V SS _8

VS S_57

V SS _9

VS S_58

V SS _10
V SS _11

VS S_59
VS S_60

V SS _12

VS S_61

V SS _13

VS S_62

V SS _14
V SS _15

VS S_63
VS S_64

V SS _16

VS S_65

V SS _17

VS S_66

V SS _18

VS S_67

V SS _19

VS S_68

V SS _20

VS S_69

V SS _21

VS S_70

V SS _22

VS S_71

V SS _23

VS S_72

V SS _24

VS S_73

V SS _25

VS S_74

V SS _26
V SS _27
V SS _28
V SS _29

VS S_75
VS S_76
VS S_77
VS S_78

V SS _30

VS S_79

V SS _31

VS S_80

V SS _32

VS S_81

V SS _33

VS S_82

V SS _34

VS S_83

V SS _35

VS S_84

V SS _36

VS S_85

V SS _37

VS S_86

V SS _38
V SS _39

VS S_87
VS S_88

V SS _40

VS S_89

V SS _41

VS S_90

V SS _42
V SS _43

VS S_91
VS S_92

V SS _44

VS S_93

V SS _45

VS S_94

V SS _46

VS S_95

V SS _47

VS S_96

V SS _48

VS S_97

V SS _49

V SS BG _D AC

N1 3
N2 0
N2 2
P1 0
P1 4
R4
R7
R2 0
T6
T9
T1 1
T1 3
U4
U5
U7
U1 2
U2 0
U2 2
V8
V9
V1 1
V1 3
W1
W2
W4
W5
W7
W12
W20
Y5
Y7
Y9
Y1 1
Y1 3
Y1 5
Y1 7
Y1 9
AA4
AA2 2
AB2
AB5
AB9
AB1 3
AB1 7
AB2 1
AC 5
AC 9
AC 1 3
A1 1

Sheet 4 of 41
ONTARIO POWER
& DECOUPLING

C 875

V DD I O _M EM _S _10
V DD I O _M EM _S _11

V DD _33

A 4

O NT A RIO _ A P U

O N TA R I O _ A P U

*1 0 u _ 6 . 3 V _ X 5 R _ 0 6
* 1 0 u _6 . 3 V _X 5 R _ 0 6
*1 0 u _ 6 . 3 V _ X 5R _ 0 6
C 43

V D D CR _ CP U

1 u _ 6 .3 V _ X 5 R_ 0 4
1 .5 V

C 44

C 45

C4 6

C 47

C 48

C 49

C5 0
C5 1

1 0 u _ 6 .3 V _ X 5 R_ 0 6
1 0 u _6 . 3 V _X 5 R _ 0 6
1 0 u _ 6 .3 V _ X 5 R_ 0 6
1 0 u _6 . 3 V _X 5 R _ 0 6
1 0 u _ 6 . 3 V _ X 5R _ 0 6
1 0u _ 6 . 3 V _ X 5 R _0 6
1 0 u _ 6 . 3 V _ X 5R _ 0 6

C 52

C5 3

C 54

10 u _ 6 . 3 V _ X 5 R _ 0 6
*2 2 u _ 6 . 3 V _ X 5 R _ 0 8
1 0 u _ 6 .3 V _ X 5 R_ 0 6
*2 2 u _ 6 . 3 V _ X 5R _ 0 8

C 55

C 56

C5 7

C 58

C 59

C 60

C6 1

C 62

C 63

1 u _ 6 .3 V _ X5 R_ 0 4
1 u _ 6. 3V _ X5 R _ 0 4
0 . 1 u _ 10 V _X 5 R _ 0 4
0. 1u _ 1 0 V _ X 5 R _ 0 4
0. 1u _ 1 0 V _ X 5 R _ 0 4
1 u _ 6 .3 V _ X 5 R_ 0 4
1 u _ 6 .3 V _ X 5 R_ 0 4
0 . 1 u _ 1 0 V _ X 5R _ 0 4
0 . 1 u_ 1 0 V _ X 5 R _0 4

C6 4

EMC C APS
1 .5 V

V D DC R _ CP U

V D D CR _ NB

C 65

C6 6

0 .1 u _ 1 0 V _ X 5 R_ 0 4
* 0 . 1 u _1 0 V _ X 7 R _ 04
0 .1 u _ 1 0 V _ X 5 R_ 0 4

1. 5V

V DD C R_ N B
C 67

C 68

C6 9

1 80 P _5 0 V _ N P O _ 0 4
1 8 0 P _ 5 0 V _ N P O _0 4
C 75

C 76

C7 7

C 78

V D DA N_ 1 8 _ DA C

1 8 0 P _ 5 0 V _ N P O _0 4
C9 1

C 92

C7 2

C 73

C7 4

0 .1 u _ 1 0 V _ X 5 R_ 0 4
* 0. 1u _ 1 0 V _ X 7 R _ 0 4

3. 3V S
1 .8 VS

C 84

C 90

C 71

1 8 0 P _ 5 0 V _ N P O_ 0 4
1 8 0P _ 50 V _N P O _ 0 4

C8 0

C 81

C8 2

C 83

C 79

1 0 u _ 6 .3 V _ X 5 R_ 0 6
1 0 u _6 . 3 V _X 5 R _ 0 6
1 0 u _ 6 .3 V _ X 5 R_ 0 6
1 0 u _ 6 .3 V _ X 5 R_ 0 6
1 0u _ 6 . 3 V _ X 5 R _0 6

C 89

C 70

1 8 0 P _ 5 0V _ N P O _ 0 4
1 80 P _5 0 V _ N P O _ 0 4

C 93

C 94

C9 5

C 96

C8 5
1 8 0 P _ 5 0V _ N P O _ 0 4

1 u _ 6. 3V _ X5 R _ 0 4
1 u _ 6. 3V _ X5 R _ 0 4
1 u _6 . 3 V _X 5 R _ 0 4
*1 u _ 6 . 3 V _ X 5 R _ 0 4

V D D P L _ 10

1 VS

C8 6
1 8 0 P _ 5 0V _ N P O _ 0 4

C8 7
1 8 0 P _ 5 0 V _ N P O_ 0 4

C 88
0 .1 u _ 1 0 V _ X5 R_ 0 4

C 97

1 u _ 6 .3 V _ X5 R_ 0 4
1 u _ 6. 3V _ X5 R _ 0 4
1 u _ 6 .3 V _ X 5 R_ 0 4
0 . 1 u _ 10 V _X 5 R _ 0 4
0. 1u _ 1 0 V _ X 5 R _ 0 4
1 u _ 6 .3 V _ X 5 R_ 0 4
1 u _ 6 .3 V _ X 5 R_ 0 4
0 . 1 u _ 1 0 V _ X 5R _ 0 4
0 . 1 u_ 1 0 V _ X 5 R _0 4

ONTARIO POWER & DECOUPLING B - 5

B.Schematic Diagrams

A7
B7
B1 1
B1 7
B2 2
C4
D5
D7
D9
D1 1
D1 4
B1 5
D1 7
D1 9
E7
E9
E1 2
E2 0
F8
F1 1
F1 3
G4
G5
G7
G9
G1 2
G2 0
G2 2
H6
H1 1
H1 3
J4
J5
J7
J20
K1 0
K1 4
L4
L6
L8
L11
L13
L20
L22
M7
N4
N6
N8
N1 1

10 u _ 6 . 3 V _ X 5 R _ 0 6
1 u _ 6 .3 V _ X 5 R_ 0 4
1 u_ 6 . 3 V _ X 5 R _ 04
1 u_ 6 . 3 V _ X 5 R _ 04
* 1 u _6 . 3 V _X 5 R _ 0 4
0. 1u _ 1 0 V _ X 5 R _ 0 4

GR O UN D

U 1C

Schematic Diagrams

INAGUA DDR3 SO-DIMMS A
SO -D IMM A

INAGUA DDR3 SO-DIMMS A

2,6 MEM_ADDR[15:0]

B.Schematic Diagrams

6,10,16 SCLK0
6,10,16 SDATA0

MEM_DQS_H0
MEM_DQS_H1
MEM_DQS_H2
MEM_DQS_H3
MEM_DQS_H4
MEM_DQS_H5
MEM_DQS_H6
MEM_DQS_H7

2,6
2,6
2,6
2,6
2,6
2,6
2,6
2,6

MEM_DQS_L0
MEM_DQS_L1
MEM_DQS_L2
MEM_DQS_L3
MEM_DQS_L4
MEM_DQS_L5
MEM_DQS_L6
MEM_DQS_L7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

M
EM
_DM0
M
EM
_DM1
M
EM
_DM2
M
EM
_DM3
M
EM
_DM4
M
EM
_DM5
M
EM
_DM6
M
EM
_DM7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

2 DIMM0_O
DT0
2 DIMM0_O
DT1
2,6 M
EM
_DM[7:0]

2,6
2,6
2,6
2,6
2,6
2,6
2,6
2,6

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

2,6 MEM_BANK0
2,6 MEM_BANK1
2,6 MEM_BANK2
2 DIMM0_CS#0
2 DIMM0_CS#1
2 M
EM
_CLK_H0
2 M
EM
_CLK_L0
2 M
EM
_CLK_H1
2 M
EM
_CLK_L1
2,6 MEM_CKE0
2,6 MEM_CKE1
2,6 M
EM
_CAS#
2,6 M
EM
_RAS#
2,6 M
EM
_WE#

Sheet 5 of 41
INAGUA DDR3 SODIMMS A

MEM_DAT
A[63:0] 2,6

JDIMM1A
MEM_
ADDR0
MEM_
ADDR1
MEM_
ADDR2
MEM_
ADDR3
MEM_
ADDR4
MEM_
ADDR5
MEM_
ADDR6
MEM_
ADDR7
MEM_
ADDR8
MEM_
ADDR9
MEM_
ADDR10
MEM_
ADDR11
MEM_
ADDR12
MEM_
ADDR13
MEM_
ADDR14
MEM_
ADDR15

ODT0
ODT1

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

12
29
47
64
137
154
171
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

10
27
45
62
135
152
169
186

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
12
9
13
1
14
1
14
3
13
0
13
2
14
0
14
2
14
7
14
9
15
7
15
9
14
6
14
8
15
8
16
0
16
3
16
5
17
5
17
7
16
4
16
6
17
4
17
6
18
1
18
3
19
1
19
3
18
0
18
2
19
2
19
4

MEM_DATA0
MEM_DATA1
MEM_DATA2
MEM_DATA3
MEM_DATA4
MEM_DATA5
MEM_DATA6
MEM_DATA7
MEM_DATA8
MEM_DATA9
MEM_DATA10
MEM_DATA11
MEM_DATA12
MEM_DATA13
MEM_DATA14
MEM_DATA15
MEM_DATA16
MEM_DATA17
MEM_DATA18
MEM_DATA19
MEM_DATA20
MEM_DATA21
MEM_DATA22
MEM_DATA23
MEM_DATA24
MEM_DATA25
MEM_DATA26
MEM_DATA27
MEM_DATA28
MEM_DATA29
MEM_DATA30
MEM_DATA31
MEM_DATA32
MEM_DATA33
MEM_DATA34
MEM_DATA35
MEM_DATA36
MEM_DATA37
MEM_DATA38
MEM_DATA39
MEM_DATA40
MEM_DATA41
MEM_DATA42
MEM_DATA43
MEM_DATA44
MEM_DATA45
MEM_DATA46
MEM_DATA47
MEM_DATA48
MEM_DATA49
MEM_DATA50
MEM_DATA51
MEM_DATA52
MEM_DATA53
MEM_DATA54
MEM_DATA55
MEM_DATA56
MEM_DATA57
MEM_DATA58
MEM_DATA59
MEM_DATA60
MEM_DATA61
MEM_DATA62
MEM_DATA63

JDIMM1B

1.5V
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

3.3VS

20mils
C9
8

C99

1u_6.3V_X5R_04
0.1u_
16V_Y5V_
04

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199
VDDSPD
1.5V
R75

77
122
125

1K_0
4

198
30

2,6 MEM_EVENT#
2,6 MEM_RESET#
MVREF_DIMM0

C100

1
126

C101

NC1
NC2
NCTEST
EVENT#
RESET#

VREF_DQ
VREF_CA

C102
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

1u_6.3V_X5R_04
1000p_50V_X7R_0
4
0.1u_10V_X7R_04

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

44
48
49
54
55
60
61
65
66
71
72
12
7
12
8
13
3
13
4
13
8
13
9
14
4
14
5
15
0
15
1
15
5
15
6
16
1
16
2
16
7
16
8
17
2
17
3
17
8
17
9
18
4
18
5
18
9
19
0
19
5
19
6

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT_MEM
20
3
20
4

VTT1
VTT2

G
ND1
G
ND2

G1
G2

DDRRK-20401- TR4B

DDRRK-2040
1- T
R4B

(REV)4.0mm

C LOS E TO S O- DI M M A

1.5V

R76

1K_1%_04

M
VREF_DIMM
0

1.5V

+ C104

C105

C106

C107

C108

C109

C110

C111

C11
2

C113

+

*150u_4V_B_A *220u_4V_V_A 10u_
10V_Y5V_
08
10u_
10V_Y5V_
08
1u_6
. 3V_X5R_04
1u_6
. 3V_X5R_04
10u_
10V_Y5V_
08
1u_6
. 3V_X5R_04
1u_6
. 3V_X5R_04
1u_6
. 3V_X5R_04

1.5V

VTT_M
EM

C114

C115

C116

C117

C118

C119

C120

C121

C122

C123

0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
0.1u_16
V_Y5V_04
0.1u_16
V_Y5V_04
0.1u_16
V_Y5V_0
4
0.1u_16V_Y5V_04
0.1u_16
V_Y5V_04
0.1u_16
V_Y5V_04
0.1u_16
V_Y5V_04
0.1u_16
V_Y5V_0
4

B - 6 INAGUA DDR3 SO-DIMMS A

C124

C125

C126

C127

C128

10u_10V_Y5V_08
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04

R77

C103

1
K_1%_04

0.1u_10V_X5R_04

Schematic Diagrams

INAGUA DDR3 SO-DIMMS B
S O-D IMM B

INA GUA DDR3 S O-DIMMS B

2,5 MEM_ADDR[15:0]

M
EM
_DATA[63
: 0] 2,5

JDIMM2A

2,5 MEM_BANK0
2,5 MEM_BANK1
2,5 MEM_BANK2
2 DIMM1_CS#0
2 DIMM1_CS#1
2 M
EM
_CLK_H2
2 M
EM
_CLK_L2
2 M
EM
_CLK_H3
2 M
EM
_CLK_L3
2,5 MEM_CKE0
2,5 MEM_CKE1
2,5 M
EM
_CAS#
2,5 M
EM
_RAS#
2,5 M
EM
_WE#

R7
8

5,10,16 SCLK0
5,10,16 SDATA0

2,5
2,5
2,5
2,5
2,5
2,5
2,5
2,5

MEM_DQS_L0
MEM_DQS_L1
MEM_DQS_L2
MEM_DQS_L3
MEM_DQS_L4
MEM_DQS_L5
MEM_DQS_L6
MEM_DQS_L7

MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

BA0
BA1
BA2
S0#
S1#
CK0
CK0
#
CK1
CK1
#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

2 DIMM1_O
DT0
2 DIMM1_O
DT1
2,5 MEM_
DM[7:0]

MEM_DQS_H0
MEM_DQS_H1
MEM_DQS_H2
MEM_DQS_H3
MEM_DQS_H4
MEM_DQS_H5
MEM_DQS_H6
MEM_DQS_H7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

109
108
79
114
121
101
103
102
104
73
74
115
110
113
4.7K_04 197
201
202
200

3.3VS

2,5
2,5
2,5
2,5
2,5
2,5
2,5
2,5

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

O
DT0
O
DT1

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

12
29
47
64
137
154
171
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

10
27
45
62
135
152
169
186

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M
EM
_DATA0
M
EM
_DATA1
M
EM
_DATA2
M
EM
_DATA3
M
EM
_DATA4
M
EM
_DATA5
M
EM
_DATA6
M
EM
_DATA7
M
EM
_DATA8
M
EM
_DATA9
M
EM
_DATA10
M
EM
_DATA11
M
EM
_DATA12
M
EM
_DATA13
M
EM
_DATA14
M
EM
_DATA15
M
EM
_DATA16
M
EM
_DATA17
M
EM
_DATA18
M
EM
_DATA19
M
EM
_DATA20
M
EM
_DATA21
M
EM
_DATA22
M
EM
_DATA23
M
EM
_DATA24
M
EM
_DATA25
M
EM
_DATA26
M
EM
_DATA27
M
EM
_DATA28
M
EM
_DATA29
M
EM
_DATA30
M
EM
_DATA31
M
EM
_DATA32
M
EM
_DATA33
M
EM
_DATA34
M
EM
_DATA35
M
EM
_DATA36
M
EM
_DATA37
M
EM
_DATA38
M
EM
_DATA39
M
EM
_DATA40
M
EM
_DATA41
M
EM
_DATA42
M
EM
_DATA43
M
EM
_DATA44
M
EM
_DATA45
M
EM
_DATA46
M
EM
_DATA47
M
EM
_DATA48
M
EM
_DATA49
M
EM
_DATA50
M
EM
_DATA51
M
EM
_DATA52
M
EM
_DATA53
M
EM
_DATA54
M
EM
_DATA55
M
EM
_DATA56
M
EM
_DATA57
M
EM
_DATA58
M
EM
_DATA59
M
EM
_DATA60
M
EM
_DATA61
M
EM
_DATA62
M
EM
_DATA63

JDIMM2
B

1.5V
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

3. 3
VS

20mils
C129

C130

1u_6.3V_X5R_04
0
. 1u
_16V_Y5V_04

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199
VDDSPD
77
122
125
198
30

2,5 MEM_EVENT
#
2,5 MEM_RESET
#

1
126

MVREF_DIMM
1

C131

C132

NC1
NC2
NCTEST
EVENT#
RESET#

VREF_DQ
VREF_CA

C133
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

1u_6.3V_X5R_04
1000p_
50V_
X7R_04
0.1u_10V_X7R_04

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

Sheet 6 of 41
INAGUA DDR3 SODIMMS B

VT
T_MEM
203
204

VTT1
VTT2

GND1
GND2

G1
G2

DDRRK- 20
401-TP8
D

DDRRK-204
01-TP8D

(REV)8.0mm
SN:6-86-24204-XXX

C LO SE TO SO - DI MM B

1.5V

R79

1
K_1%_
04

MVREF_DIMM1

1.5V

C136
C135

C137

C1
38

C139

C140

C14
1

C142

C143

C144

R80

C134

1K_1%_04

0.1u_1
0V_X
5R_04

+

+

*220u_4
V_V_A 10u_10V_Y5
V_08
10
u_10V_Y5V_08
1u_6.3V_X5R_04
1u_6.3V_X5R_04
10u_1
0V_Y5V_08
1u_6.3V_X5R_0
4
1u_
6.3V_X
5R_04
1u_6.3V_X5R_04
560u
_2.5V_
6. 6
*6.6*5. 9

VTT_
MEM

1.5V

C145

C146

C147

C1
48

C149

C150

C15
1

C152

C153

C154

0.1u_1
6V_Y5V_04
0.1u_16V_Y5V_04
0.1u
_16V_Y5V_04
0.1u_16V_Y5V_0
4
0.1u_16V_Y5V_04
0
.1
u_16V_Y5V_04
0.1u_16
V_Y5V_
04
0.1u_16V_Y5V_04
0.1u_
16V_
Y5V_04
0.1u_16V_Y5
V_04

C155

C156

C157

C158

C1
59

10u_10V_Y5V_
08
1u_6.3V_X5R_04
1u_6
. 3V_X5R_04
1u_
6. 3
V_X5
R_04
1u_6.3V_X5R_
04

INAGUA DDR3 SO-DIMMS B B - 7

B.Schematic Diagrams

MEM_ADDR0
MEM_ADDR1
MEM_ADDR2
MEM_ADDR3
MEM_ADDR4
MEM_ADDR5
MEM_ADDR6
MEM_ADDR7
MEM_ADDR8
MEM_ADDR9
MEM_ADDR10
MEM_ADDR11
MEM_ADDR12
MEM_ADDR13
MEM_ADDR14
MEM_ADDR15

Schematic Diagrams

B.Schematic Diagrams

Robson S3 PCIE/ LVDS 1/6

Sheet 7 of 41
Robson S3 PCIE/
LVDS 1/6

B - 8 Robson S3 PCIE/ LVDS 1/6

Schematic Diagrams

Robson S3 MAIN 2/6
COMPONENTS SH OWN AR E EXAMPLES ONLY
AND NOT NEC ESSAR ILY QUALIFIED

VBIOS FLA SH ROM

U4 B

Y1 1
AE9
L9
N9
1 8. V _R E G

R9 8

R 99

M EM_ I D 3
M EM_ I D 2
M EM_ I D 1
M EM_ I D 0

A C6
A C5

D P C _ VD D 1 8

1 . 0V _R E G

*10 u_6 . 3V _X 5R _ 06

AA5
AA6

*1u _6 .3 V _X 5R _0 4

Access to SCL and SDA is
mandatory on BACO designs

R 1 04

R 10 5

for debug purposes

*4 . 7K _0 4

*4. 7 K_ 04

3 3. V S_ GP U
20
20

S B _MX M_C L KR E Q#
GP I O7_ B LON

R 10 8
R 10 9

*1 0K _ 04
*1 0K _ 04

GP I O24 _T R ST B
GP I O25 _T D I

R 11 0

*1 0K _ 04

GP I O27 _T MS

R 11 1

*1 0K _ 04

GP I O26 _T C K

R 68 5

*1 0K _ 04

S B _MX M_C L KR E Q#

10
10
10
10
10

GP I O0
GP I O1
GP I O2
MX M_S D A TA
MXM_ S C LK
10
GP I O5
20 GP I O7_ B LON
10
GP I O8
10
GP I O9
10
10
10

*1K _0 4 GP IO 2 8_ TD O
*1K _0 4 GP IO 2 4_ TR S T B

T X4 P_ D PB 1 P
TX4 M_D P B 1N

GP I O11
GP I O12
GP I O13

10
GP I O2 1
10
GP I O2 2
1 6 S B_ MXM_ C LK R E Q#

GP I O0
GP I O1
GP I O2
MX M_S D A TA
MX M_S C L K
GP I O5
GP I O6
GP I O7_ B LON
GP I O8
GP I O9
GP I O10
GP I O11
GP I O12
GP I O13
HP D2
R OB S ON _GP I O1 5
R OB S ON _GP I O1 6
GP U _ TA LE R T#
GP I O18 _H P D 3
GP I O_1 9_ C TF
GP I O20
GP I O21
GP I O22
S B _MX M_C L KR EQ#
GP I O24 _T R S TB
GP I O25 _T D I
GP I O26 _T C K
GP I O27 _T MS
GP I O28 _T D O
T E ST EN
R 115
*5 . 11 K_ 1% _0 6

R1
R3

10

R 1 16

L6
L5
L3
L1
K4
K7
A F2 4

HP D_ 4
HP D1
P X _E N

A C1 4
A B1 6

GE N E R I C C

21 *5. 1 1K _1 %_
H P 06
D1

U6
U1 0
T1 0
U8
U7
T9
T8
T7
P1 0
P4
P2
N6
N5
N3
Y9
N1
M4
R6
W1 0
M2
P8
P7
N8
N7

A B1 3
W8
W9
W7
A D1 0

GE N _ A
GE N _ B

For PX_EN, refer to t he BACO
reference schem atics for detail

T XC C P _D P C 3 P
TX C C M_D P C 3N

D PC _ V D D 18 #1
D PC _ V D D 18 #2

TX 0P _D P C 2 P
T X0 M_D P C 2N

D PC _ V D D 10 #1
D PC _ V D D 10 #2

D PC _ V SS R # 1
D PC _ V SS R # 2
D PC _ V SS R # 3
D PC _ V SS R # 4
D PC _ V SS R # 5

TX 2P _D P C 0 P
T X2 M_D P C 0N
D P C _C A LR

R
RB

GPI O_ 0
GPI O_ 1
GPI O_ 2
GPI O_ 3_ SMB D A TA
GPI O_ 4_ SMB C L K
GPI O_ 5_ AC _ B AT T
DA C1
GPI O_ 6
GPI O_ 7_ BL ON
GPI O_ 8_ R OMSO
GPI O_ 9_ R OMSI
GPI O_ 10 _R OMS C K
GPI O_ 11
GPI O_ 12
GPI O_ 13
GPI O_ 14 _H P D 2
GPI O_ 15 _P WR C N TL_ 0
GPI O_ 16 _S S IN
GPI O_ 17 _T H ER MA L _I N T
GPI O_ 18 _H P D 3
GPI O_ 19 _C T F
GPI O_ 20 _P WR C N TL_ 1
GPI O_ 21 _B B _E N
GPI O_ 22 _R OMC S B
GPI O_ 23 _C L KR E QB

G
GB
B
BB
H SY N C
V SY N C
RS E T
A VD D
A V S SQ
VDD1 DI
V SS 1 D I
R2
R2 B
G2
G2 B

JT AG_ TR S TB
JT AG_ TD I
JT AG_ TC K
JT AG_ TMS
JT AG_ TD O
TE S TE N
TE S TE N _L EGA C Y
GEN E R I C A
GEN E R I C B
GEN E R I C C
GEN E R I C D
GEN E R I C E _H P D 4

B2
B2 B
C
Y
C OMP
DA C2
H 2 SY N C
V 2 SY N C
VDD2 DI
V SS 2 D I

H PD 1
PX _E N

(1 .8 V@75 m A DPLL_ PVDD)
L 71
*H C B 1 60 8K F-1 21 T2 5

C 19 3

C 194

*10 u_ 6. 3V _ X5 R _06

D PL L_ PV D D

A 2 VD D

VR E F G

X TA LI N
X TA LOU T

D P LL _V D D C

A M2 8
A K2 8
A C2 2
A B2 2

* 0. 1u _1 0V _X 5R _ 04

*1 u_ 6. 3V _ X5 R _04
3. 3 VS _ GPU
R 16 7
*2. 2 K_ 04
(1 .8V @2 0m A TSVDD)
C 20 1 C 20 2

*10 u_ 6. 3V _ X5 R _06

C 2 03

T SV D D

PL L/ CLO CK
D PL L_ PV D D
D PL L_ PV S S

1 0 GP U _D P LU S
1 0 GP U _D MI N U S
T S_ F D O

D D C 1C L K
D D C 1D A T A
A U X1 P
AU X 1N

D PL L_ VD D C

D D C 2C L K
D D C 2D A T A

XT AL I N
XT AL OU T

A U X2 P
AU X 2N

XO_ IN
XO_ IN 2

D D C C L K _A U X3 P
D D C D A T A_ AU X 3N

GND Optio n If
XO_IN/XO_IN2
not use d

1. 8 V_ R EG
L 73
*H C B 1 60 8K F-1 21 T2 5

DD C/ AU X
A F1 4
A E1 4
A D1 4

C 1 97 C 19 8 C 1 99

5

TMD S _T X1 P 21
TMD S _T X1 N 21

GP I O10

R 94

* 33_ 04

S C K /W E b

6

TMD S _T X2 P 21
TMD S _T X2 N 21

GP I O22

R 95

* 33_ 04

CSb

1

U5
D

Q

2

C
S

7

A K5
A M3

H OL D
3
W

3. 3 VS _G PU

A K6
A M5

DNI

R 1 02

*0_ 04

R 1 00

*0_ 04

8

VCC
VSS
*EN 2 5P 0 5-50 GC P
*0 .1 u_ 10 V_ X5 R _0 4

A J7
A H6
A K8
A L7

4

C 1 70

1 M bit SERIAL EEPRO M is optiona l for Se ym our GDDR5 Des ign
1 M bit SERIAL EEPRO M is r e quire d for Pa r k /Robson GDDR5 De s ign

V4
U5

N OTE: D es ig ns t ha t do not inc lu de a n EEP RO M m us t still pr ovide
a cc e s s to the RO M inte r fa c e s igna ls for de bug pur pos e s

W3
V2
Y4
W5

Sheet 8 of 41
Robson S3 MAIN 2/
6

A A3
Y2
J8

R 1 03

*1 50_ 1% _0 4

A M26
A K2 6

R _D A C 1
R B _D A C 1 R 71 5

*1 50 _1 %_0 4

R _D A C 1

21

A L2 5
A J2 5

G_D A C 1
GB _D A C 1 R 71 6

*1 50 _1 %_0 4

G_D A C 1

21

A H 24
A G25

B _D A C 1
B B_ D A C 1 R 71 7

*1 50 _1 %_0 4

B_ D A C 1

21

1. 8 V_ R E G
(1.8V @65m A AVD D)
* H C B1 60 8K F -121 T2 5

H S Y N C _ D AC 1 10, 2 1
V S Y N C _D A C 1 1 0, 21

A V DD

L 66
C 17 8

C 1 77

A H 26
A J2 7

*1 0u _6. 3 V _X5 R _0 6

C 179

*1u _6 .3 V _X5 R _0 4
*0 . 1u _10 V _X 5R _0 4

R 1 12

A D 22
AV D D

A G24
A E2 2

*4 99 _1% _0 4
(1.8V @100 m A VDD1 DI)

VD D 1 D I

L 67
C 1 80

V D D 1D I

A E2 3
A D 23

C 18 1

C 182

* H C B1 60 8K F -121 T2 5
*1 0u_ 6. 3 V_ X5 R _0 6

A M12
A K1 2

R _D A C 2
R B _D A C 2

A L1 1
A J1 1

G_D A C 2
GB _D A C 2

A K1 0
A L9

B _D A C 2
B B_ D A C 2

*0. 1u _1 0V _X 5R _ 04
*1 u_ 6. 3V _ X5R _ 04

(1.8V @2m A A2 VD DQ)

A 2V D D Q

L 68
C 1 84

C 183

C 185

* H C B1 60 8K F -121 T2 5
*1 0u _6 .3 V _X 5R _0 6

*1u _6 .3 V _X5 R _0 4
*0 . 1u _10 V _X 5R _0 4

DAC2 i s NC on Se ymo ur

A H 12
A M10
A J9

(1 .8V @1 00 m A V DD2 DI)

V D D 2D I

L 69
C 1 87

C 186

C 188

* H C B1 60 8K F -121 T2 5
*1 0u _6 .3 V _X 5R _0 6

A L1 3
A J1 3

H S Y N C _D A C 2 1 0
V SY N C _ D A C 2 10

*1u _6 .3 V _X5 R _0 4
*0 . 1u _10 V _X 5R _0 4

VD D 2D I

A D 19
A C 19

R 1 17

Se ym ou r

3. 3 VS _ GPU
(3 .3V @1 30 m A A 2 VDD)

A 2V D D

L 70
C 19 0

C 1 89

*0 _04

A E2 0
A 2V D D Q

C 191

* H C B1 60 8K F -121 T2 5
*1 0u _6 .3 V _X 5R _0 6

NC o n Seym ou r

A E1 9

*0 . 1u _10 V _X5 R _0 4

(1.0 V@1 25m A DPLL_ VDDC)

*10 u_ 6. 3 V_ X5 R _0 6

R OM_S O

*0. 1u _1 0V _X 5R _ 04
*1 u_ 6. 3V _ X5R _ 04

A 2V S SQ
A C1 6

C 1 95

S I / A1 6

A 2 VD D Q

PLA CE VREFG DIV IDER A ND CAP
C LOSE TO ASIC

*1u _6 . 3V _X 5R _ 04

1. 0 V_ R EG
L7 2
*H C B 1 60 8K F-1 21 T2 5

A K3
A K1

A E1 7

R 1 20
*2 49 _1 %_0 4
C 19 2
*0. 1 u_1 0V _ X5R _ 04 D P LL _P V D D

* 33_ 04

A 2V D D

R 2S E T
1. 8 V_ R EG

* 33_ 04

R 93

SC L
SD A

1 . 8V _R E G
R 1 18
*4 99 _1 %_0 4

R 92

GP I O9

DP C

D PC _ P VD D
D PC _ P VS S

G ENE RA L PU RPO SE I /O

36 R OB S ON _GP I O15
36 R OB S ON _GP I O16
10 , 17 GP U _T A LE R T#

R 11 4

T X3 P_ D PB 2 P
TX3 M_D P B 2N

512Kbit
*1 0K _0 4

GP I O8

TMD S _T X0 P 21
TMD S _T X0 N 21

A H3
A H1

I2 C
SC L
SDA

SCL
SDA

3. 3 VS _ GPU

R 11 3

TX C B P_ D PB 3 P
T XC B M_D P B 3N
DP B

TX 1P _D P C 1 P
T X1 M_D P C 1N
U1
W1
U3
Y6
AA1

*0. 1 u_1 0V _ X5R _ 04

3 . 3V S_ GP U 3. 3V S _GP U

*1 0K _ 04
*1 0K _ 04

T X2 P_ D PA 0 P
TX2 M_D P A 0N

T X5 P_ D PB 0 P
TX5 M_D P B 0N
W6
V6

D PC _ VD D 18

D P C _ VD D 1 0
(1 .0 V@1 1 0m A DPC_ VDD1 0 )
L6 5
*H C B 16 08 KF -12 1T 25
C 17 4
C 1 75
C 17 6

R 10 6
R 10 7

T X1 P_ D PA 1 P
TX1 M_D P A 1N

D VD A T A_ 12
D VD A T A_ 11
D VD A T A_ 10
D VD A T A_ 9
D VD A T A_ 8
D VD A T A_ 7
D VD A T A_ 6
D VD A T A_ 5
D VD A T A_ 4
D VD A T A_ 3
D VD A T A_ 2
D VD A T A_ 1
D VD A T A_ 0

A G3
A G5

D D C C L K _A U X5 P
D D C D A T A_ AU X 5N
T4
T2
R5
A D1 7
A C1 7

D PL U S
D MI N U S

THE RM AL

D D C 6C L K
D D C 6D A T A

A G13

R 1 19

*71 5_ 1%_ 04

A E6
A E5

D D C 1C L K
D D C 1D A T A

A D2
A D4

A U X1P
A U X1N

A C 11
A C 13

D D C 2C L K
D D C 2D A T A

A D 13
A D 11

X TA L IN

C 1 96 *2 2p_ 50 V _N P O_0 4

A U X2P
A U X2N

X2
*F SX 8L _2 7MH z

A D 20
A C 20

D D C C LK _ AU X 3P
D D C D A TA _A U X 3N

A E1 6
A D 16

D D C C LK _ AU X 5P
D D C D A TA _A U X 5N

A C1
A C3

D D C 1 C LK 2 1
D D C 1 D AT A 2 1

D D C 6C L K
D D C 6D A T A

R 1 21
*1 M_0 4

X TA LOU T
C 2 00 *2 2p_ 50 V _N P O_0 4
D D C 6C L K
21
D D C 6D A T A 21

XTAL Opt ion

TS _F D O
TS V D D
TS V SS

*0 . 1u _10 V _X5 R _0 4
*1 u_6 . 3V _X 5R _ 04

*R OB S ON XT S3

Robson S3 MAIN 2/6 B - 9

B.Schematic Diagrams

1. 8 V_ R E G
(1.8 V@1 50m A DPC_ VDD18 )
L 64
C 1 73
*H C B 16 08 KF -12 1T 25
C 17 2

C 1 71

*1u _6 . 3V _X 5R _ 04
*1 0u _6 . 3V _X 5R _ 06

T X0 P_ D PA 2 P
TX0 M_D P A 2N

DP A

For Seymour,
DPC_PVDD is DPC_VDD18
DPC_PVSS and all DPC_VSSR are DP_VSSR

D PC _ V D D 18

*0 . 1u _10 V _X 5R _0 4

D VO

1

R 97

ME M_ I D 0 *1 0K _0 4
*1 0K _ 04
*10 K_ 04
*1 0K _0 4
ME M_ I D 1
ME M_ I D 2
ME M_ I D 3

D VC L K
D VC N T L_ 0
D VC N T L_ 1
D VC N T L_ 2

3. 3V S _GP U
R 10 1

0. 1"~ 0.5 "
TMD S _T XC P 21
TMD S _T XC N 21

2

R 96

AE8
A D9
A C1 0
A D7
A C8
A C7
AB9
AB8
AB7
AB4
AB2
Y8
Y7

TX C A P_ D PA 3 P
T XC A M_D P A 3N

A F2
A F4

Schematic Diagrams

Robson S3 MEM Interface 3/6
COMPONENTS SHOWN ARE EXAMPLES ONLY
AND NOT NECESSARILY QUALIFIED

DDR3 Memory
Interface

U4C

Sheet 9 of 41
Robson S3 MEM
InTERFACE 3/6

14

DQA0_[ 31. .0]

G DDR 5/DD R3
DQA0_ 0
DQA0_ 1
DQA0_ 2
DQA0_ 3
DQA0_ 4
DQA0_ 5
DQA0_ 6
DQA0_ 7
DQA0_ 8
DQA0_ 9
DQA0_ 10
DQA0_ 11
DQA0_ 12
DQA0_ 13
DQA0_ 14
DQA0_ 15
DQA0_ 16
DQA0_ 17
DQA0_ 18
DQA0_ 19
DQA0_ 20
DQA0_ 21
DQA0_ 22
DQA0_ 23
DQA0_ 24
DQA0_ 25
DQA0_ 26
DQA0_ 27
DQA0_ 28
DQA0_ 29
DQA0_ 30
DQA0_ 31
DQA1_ 0
DQA1_ 1
DQA1_ 2
DQA1_ 3
DQA1_ 4
DQA1_ 5
DQA1_ 6
DQA1_ 7
DQA1_ 8
DQA1_ 9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

DQA1_[ 31. .0]

PLACE MVREF DIVIDERS
AND CAPS CLOSE TO ASIC
MVD DQ

Ra

R12 2
*40. 2_1%_0 4

K2 7
J2 9
H3 0
H3 2
G2 9
F2 8
F3 2
F3 0
C3 0
F2 7
A2 8
C2 8
E2 7
G2 6
D2 6
F2 5
A2 5
C2 5
E2 5
D2 4
E2 3
F2 3
D2 2
F2 1
E2 1
D2 0
F1 9
A1 9
D1 8
F1 7
A1 7
C1 7
E1 7
D1 6
F1 5
A1 5
D1 4
F1 3
A1 3
C1 3
E1 1
A1 1
C1 1
F1 1
A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3
E1
G7
G6
G1
G3
J6
J1
J3
J5
K2 6
J2 6

MVDDQ

Rb

R12 3

C204

*100 _04

*0 .1u _10V_X5R_0 4

MVDD Q
R12 4
R12 5

*2 43_1 %_ 04

J2 5
K2 5

*2 43_1 %_ 04

MAA0 _0/ MAA_ 0
MAA0 _1/ MAA_ 1
MAA0 _2/ MAA_ 2
MAA0 _3/ MAA_ 3
MAA0 _4/ MAA_ 4
MAA0 _5/ MAA_ 5
MAA0_ 6/MAA0_ 6
MAA0_ 7/MAA0_ 7
MAA1 _0/ MAA_ 8
MAA1 _1/ MAA_ 9
MAA1_ 2/MAA_1 0
MAA1_ 3/MAA_1 1
MAA1_ 4/MAA_1 2
MAA1_ 5/MAA_13 /BA2
MAA1_ 6/MAA_14 /BA0
MAA1_ 7/MAA_15 /BA1
WCKA0_0 /DQMA_ 0
W CKA0B_0 /DQMA_ 1
WCKA0_1 /DQMA_ 2
W CKA0B_1 /DQMA_ 3
WCKA1_0 /DQMA_ 4
W CKA1B_0 /DQMA_ 5
WCKA1_1 /DQMA_ 6
W CKA1B_1 /DQMA_ 7
EDCA0_ 0/RD QSA_ 0
EDCA0_ 1/RD QSA_ 1
EDCA0_ 2/RD QSA_ 2
EDCA0_ 3/RD QSA_ 3
EDCA1_ 0/RD QSA_ 4
EDCA1_ 1/RD QSA_ 5
EDCA1_ 2/RD QSA_ 6
EDCA1_ 3/RD QSA_ 7

DDBI A0_ 0/WD QSA_ 0
DDBI A0_ 1/WD QSA_ 1
DDBI A0_ 2/WD QSA_ 2
DDBI A0_ 3/WD QSA_ 3
DDBI A1_ 0/WD QSA_ 4
DDBI A1_ 1/WD QSA_ 5
DDBI A1_ 2/WD QSA_ 6
DDBI A1_ 3/WD QSA_ 7
ADBI A0/OD TA0
ADBI A1/OD TA1
CLKA0
CLKA0B
CLKA1
CLKA1B
R ASA0B
R ASA1B
C ASA0B
C ASA1B
CSA0 B_ 0
CSA0 B_ 1
CSA1 B_ 0
CSA1 B_ 1

MVREFDA
MVREFSA
MEM_ CAL RN0
MEM_ CAL RP0

CKEA0
CKEA1
WEA0B
WEA1B
G DDR5 /DD R3

Ra R1 26
DMEM_ RST

*40 .2_1 %_ 04

MAA0_ 8/MAA_1 3
MAA1_8 _RSVD

L1 0

K17
J2 0
H2 3
G2 3
G2 4
H2 4
J1 9
K19
J1 4
K14
J1 1
J1 3
H1 1
G1 1
J1 6
L1 5
E32
E30
A21
C2 1
E13
D1 2
E3
F4

DQMA0_ 0
DQMA0_ 1
DQMA0_ 2
DQMA0_ 3
DQMA1_ 0
DQMA1_ 1
DQMA1_ 2
DQMA1_ 3

H2 8
C2 7
A23
E19
E15
D1 0
D6
G5

QSA0 _0
QSA0 _1
QSA0 _2
QSA0 _3
QSA1 _0
QSA1 _1
QSA1 _2
QSA1 _3

H2 7
A27
C2 3
C1 9
C1 5
E9
C5
H4

QSA0 _0B
QSA0 _1B
QSA0 _2B
QSA0 _3B
QSA1 _0B
QSA1 _1B
QSA1 _2B
QSA1 _3B

L1 8
K16

ODTA0
ODTA1

H2 6
H2 5

CLKA0
CLKA0#

G9
H9

CLKA1
CLKA1#

G2 2
G1 7

RASA0#
RASA1#

G1 9
G1 6

CASA0#
CASA1#

H2 2
J2 2

CSA0 b_0

G1 3
K13

CSA1 b_0

K20
J1 7

CKEA0
CKEA1

G2 5
H1 0

WEA0#
WEA1#

G2 0
G1 4

MAA1 3
MAA1 _8

A_BA2
13 ,14
A_BA0
13 ,14
A_BA1
13 ,14
DQ MA0_[3 ..0 ] 13

DQMA1_ [3. .0] 1 4

QSA0_[ 3.. 0]

13

QSA1 _[3 ..0 ]

QSA0_0 B
QSA0_1 B
QSA0_2 B
QSA0_3 B
QSA1_0 B
QSA1_1 B
QSA1_2 B
QSA1_3 B

14

13
13
13
13
14
14
14
14

ODTA0
ODTA1

13
14

C LKA0
C LKA0 #

13
13

C LKA1
C LKA1 #

14
14

R ASA0#
R ASA1#

13
14

C ASA0#
C ASA1#

13
14

C SA0b _0

13

C SA1b _0

14

CKEA0
CKEA1

13
14

WEA0#
WEA1#

13
14

MAA13

13 ,14

T9 7

From GPU

CL KTESTA
CL KTESTB

C 205
*ROBSON XT S3

Rb

1 3,14

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12

DR AM_ RST
K8
L7

R1 27

MAA[12 ..0]

GDD R5/D DR3

DQ A0 _0/D QA_ 0
DQ A0 _1/D QA_ 1
DQ A0 _2/D QA_ 2
DQ A0 _3/D QA_ 3
DQ A0 _4/D QA_ 4
DQ A0 _5/D QA_ 5
DQ A0 _6/D QA_ 6
DQ A0 _7/D QA_ 7
DQ A0 _8/D QA_ 8
DQ A0 _9/D QA_ 9
DQ A0 _10/ DQA_10
DQ A0 _11/ DQA_11
DQ A0 _12/ DQA_12
DQ A0 _13/ DQA_13
DQ A0 _14/ DQA_14
DQ A0 _15/ DQA_15
DQ A0 _16/ DQA_16
DQ A0 _17/ DQA_17
DQ A0 _18/ DQA_18
DQ A0 _19/ DQA_19
DQ A0 _20/ DQA_20
DQ A0 _21/ DQA_21
DQ A0 _22/ DQA_22
DQ A0 _23/ DQA_23
DQ A0 _24/ DQA_24
DQ A0 _25/ DQA_25
DQ A0 _26/ DQA_26
DQ A0 _27/ DQA_27
DQ A0 _28/ DQA_28
DQ A0 _29/ DQA_29
DQ A0 _30/ DQA_30
DQ A0 _31/ DQA_31
DQ A1 _0/D QA_ 32
DQ A1 _1/D QA_ 33
DQ A1 _2/D QA_ 34
DQ A1 _3/D QA_ 35
DQ A1 _4/D QA_ 36
DQ A1 _5/D QA_ 37
DQ A1 _6/D QA_ 38
DQ A1 _7/D QA_ 39
DQ A1 _8/D QA_ 40
DQ A1 _9/D QA_ 41
DQ A1 _10/ DQA_42
DQ A1 _11/ DQA_43
DQ A1 _12/ DQA_44
DQ A1 _13/ DQA_45
DQ A1 _14/ DQA_46
DQ A1 _15/ DQA_47
DQ A1 _16/ DQA_48
DQ A1 _17/ DQA_49
DQ A1 _18/ DQA_50
DQ A1 _19/ DQA_51
DQ A1 _20/ DQA_52
DQ A1 _21/ DQA_53
DQ A1 _22/ DQA_54
DQ A1 _23/ DQA_55
DQ A1 _24/ DQA_56
DQ A1 _25/ DQA_57
DQ A1 _26/ DQA_58
DQ A1 _27/ DQA_59
DQ A1 _28/ DQA_60
DQ A1 _29/ DQA_61
DQ A1 _30/ DQA_62
DQ A1 _31/ DQA_63

MEMORY INTERFACE

B.Schematic Diagrams

13

*0. 1u_ 10V_X5 R_04
*10 0_04

25mm (max)
D MEM_RST

5mm (max)

RPD1
*4.99 K_ 1%_04

r oute 50o hms sin gle- ende d/1 00oh ms d iff
a nd k eep sho rt

25mm (max)

RSER 1
*10 _04 1 0.0

RSER2
*49. 9_1 %_ 04

MEM_RST

13, 14

CSHUNT1
*040 2_12 0pF_50 V_ 5%

D ebug onl y, for cloc k ob ser vati on, if n ot need ed, DNI

DD R3/GD DR 3 Me mory Stu ff Optio n

CLKTESTB
C LKTESTA

GDDR5

B - 10 Robson S3 MEM Interface 3/6

DDR3

MVDDQ

1.5V

1.5V/1.8V

Ra

40.2R

40.2R

Rb

100R

100R

C2 06

*0.1u _10 V_ X5R_ 04
R 128

*5 1.1 _1%_04

C2 07
R 129
*0. 1u_1 0V_X5R _04
*51. 1_1 %_0 4

Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm) except Rser2
This basi c topo logy s hould be use d for DRAM_ RST fo r DDR3 /GDDR5 .Thes e
Capa citor s and Resist or val ues ar e an exampl e only . The Series R an d
|| C ap va lues w ill de pend o n the DRAM load a nd wil l have to be
calc ulate d for diffe rent M emory ,DRAM Load and bo ard t o pass Rese t
Sign al Sp ec.

Schematic Diagrams

Robson S3 Straps 4/6
GPIO21 MUST BE LOW DURING PERSTB WHEN BEING USED TO CONTROL MVDDQ
3.3VS_GPU

P IN S T RAP S

W250B AQ

8

GPIO0

R1
30

*1
0K_0
4

GP IO0

1

8

GPIO1

R1
31

*1
0K_0
4

R1
32

*1
0K_0
4

GP IO1
GP IO2

1
0

R1
33

*1
0K_0
4

R1
34

*1
0K_0
4

R1
35

*1
0K_0
4

R1
36

*1
0K_0
4

R1
37

8

GPIO2

8

GPIO8

8

GPIO9

8

GPIO11

8

GPIO12

8

GPIO13

GP IO8
GP IO9

0
0

GP IO11
GP IO12

1
0

*1
0K_0
4

GP IO13

0

R1
38

*1
0K_0
4

R1
39

*1
0K_0
4

V SY NC_DA C1 1
HSY NC_DA C1 1

RECOM
MENDED SETTING
S

CONFIGU RATION S TR APS-- SEE EAC H DATAB OOK FOR S TR AP DE TAILS

0= DO NOT INSTALL RESI STOR
1 = I NSTALL 3
K RESISTOR

ALLOW FOR PULLUP PADS FOR THES E S TRAPS AND IF THES E GPI OS ARE US ED,
THEY MUS T NOT CONFLICT DURI NG RESET
STRAPS

PIN

X = DESIGNDEPENDANT
NA = NOT APPLICABLE

DESCRIPTION O
F DEFAULT SETTING
S

TX_PWRS_ENB

G
PI O0

PCIEFULL TXOUTPUT SWING

TX_DEEMPH_EN

G
PI O1

PCIETRANSMITTER DE-EMPHASIS ENABLED

X
X

8,21 VSYNC_
DAC1

GENERICC

8 HSYNC_DAC2
8

GPIO21

8

GPIO22
GPIO5

*1
0K_0
4

R1
41

*1
0K_0
4

R1
42

*1
0K_0
4

R1
43

*1
0K_0
4

R1
44

*1
0K_0
4

R1
45

*1
0K_0
4

GE NERICC
1
V SY NC_DA C2 0
HSY NC_DA C2 0
GP IO21
GP IO22

0
0

GP IO5

1

0

RSVD

G
PI O21

RESERVED

0

EN ABL E EXTER NA L BIO S R OM

X

BIOS_ROM_EN

GPIO
_22_RO
MCSB

ROM
IDCFG(2:0)

G
PIO
[1
3: 1
1]

VIP_DEVICE_STRAP_ENA

R146

R147

*2.2K_04

*2.2K_04

SER IAL

V2SYNC

RO M TYP E O R MEM O RY AP ER TUR E S IZE S EL EC T

IGNOREVIP DEVICESTRAPS(Removed on Seymour/Whistler)

Sheet 10 of 41
Robson S3 Straps
4/6

XXX

X

U6
MXM
_SCLK R150

*0_0
4

8

MXM
_SDAT
A R151

*0_0
4

7
6

R153

*0_04

5

RESERVED

0

SEE DA TABO OK FO R DE TA IL
SEE DA TABO OK FO R DE TA IL

X
X

RSVD

G
ENERICC

RESERVED

0

C209

*2200p_50V_X7R_04

NOTE1: AMD RESERVED C ONF IGURATI ON ST RAPS

VDD
2

SDATA

*0_04

H2SYNC

HSYNC
VSYNC

1
SCLK

R152

RSVD

AUD[1]
AUD[0]
C208
3.3VS_
GPU
*1000p_
50V_X7R_04

27 SMD_VG
A_THERM

0
0

VGAENABLED

3.3VS_GPU

GPU Thermal Sensor

27 SMC_VG
A_THERM

RESERVED
RESERVED

G
PI O9

D+

GPU_
DPLUS
3

ALERT

GPU_
DMINUS 8

D4

G
ND

THERM

8

R154

*0_04

*W8
3L771AWG

ALLOW FOR P ULLUP P ADS FOR THESE STRAPS BUT DO NOT I NST ALL RESI STOR. IF THESE GPI OS ARE US ED,
THEY MUS T KEEP "LOW" AND NOT CONFLICT DURI NG RESET .

VGA_ALERT# 27
R157

GPIO21

H2SYNC

G
ENERICC

G PIO 8

GPIO2

*2.2K_0
4
3.3VS_GPU

R155
R156

*0_04

GPU_T
ALERT# 8
,1
7

3.3VS_G
PU

SMBus gating circuit

*2.2K_04
3.3VS_GPU

7
M
XM_RST#
R159
*6.8K_1%_04
R160
*6.8K_1%_04
8

M
XM_SDATA

R158

*0_04

G

8

R1
40

G
PI O2
G
PI O8

BIF_VGADIS

MX
M_SDATA

S
G

8

8 VSYNC_DAC2

RSVD
RSVD

8

MX
M_SCLK

M
XM_SCLK

S

Q4
D
*MTN70
02ZHS3

SDATA0

5
, 6,16

SCLK0

5
, 6,16

Q
5
D
*MTN7002ZHS3

Robson S3 Straps 4/6 B - 11

B.Schematic Diagrams

8,21 HSYNC_DAC1

Schematic Diagrams

Robson S3 Power 5/6

B.Schematic Diagrams

U4E

Sheet 11 of 41
Robson S3 Power
5/6

AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF32
AG27
AH32
K28
K32
L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W25
W26
W27
Y25
Y32

M6
N11
N12
N13
N16
N18
N21
P6
P9
R12
R15
R17
R20
T13
T16
T18
T21
T6
U15
U17
U20
U9
V13
V16
V18
Y10
Y15
Y17
Y20
R11
T11

PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31

GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86

GND

G
ND#1
G
ND#2
G
ND#3
G
ND#4
G
ND#5
G
ND#6
G
ND#7
G
ND#8
G
ND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55

A3
A30
AA1
3
AA1
6
AB1
0
AB1
5
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6

PARK/ROBSON- S3 (DP Power)
( 1.8V@ 300m A DPAB_VDD18 )
DPAB_VDD18
U4
G

AG1
5
AG1
6

*1u_6.3V_X5
R_04

*HCB16
08KF-121T
25
C212
LVDS mode (1.8V@440mA DPEF_VDD18)
DP mode (1.8V@300mA DPEF_VDD18)

C21
5

*10u_6.3V_08_H125

C213

B - 12 Robson S3 Power 5/6

C210

DPE_VDD18#1
DPE_VDD18#2

DPA_
VDD18#1
DPA_
VDD18#2

DPE_VDD10#1
DPE_VDD10#2

DPA_
VDD10#1
DPA_
VDD10#2

AE1
1
AF1
1

*0.1u_
10V_X5R_04
AF6
AF7

L77

L74

C211

*HCB1608KF-121T25

C219

C220 C2
21

*10
u_6.3V_08_H1
25

*0.1u_10V_X5R_04

DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5

DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5

C217

AE1
AE3
AG1
AG6
AH5
DPAB_
VDD18

AF1
6
AG1
7

DPF_VDD18#1
DPF_VDD18#2

DPB_
VDD18#1
DPB_
VDD18#2

DPF_VDD10#1
DPF_VDD10#2

DPB_
VDD10#1
DPB_
VDD10#2

AE1
3
AF1
3

DPEF_VDD10
DPAB_VDD10
AF2
2
AG2
2

AF2
3
AG2
3
AM2
0
AM2
2
AM2
4

R162

DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5

DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5

AF1
7
*150
_1%_04

AF8
AF9

AF1
0
AG9
AH8
AM6
AM8

AE1
0 R163
DPEF_CALR

DPAB_CALR

*150_1%_04
DPAB_VDD18

DP PLL POWER
DPE_PVDD
DPE_PVSS

DPA_PVDD
DPA_
PVSS

DPF_PVDD
DPF_PVSS

DPB_PVDD
DPB_
PVSS

AG8
AG7

DPEF_VDD18

DPAB_
VDD18
AG1
9
AF2
0

AG10
AG11

C218

1.0V_REG

*HCB1608KF- 12
1T25

*10u_
6.3V_
08_H125

*1u_6.3V_X5R_04

*1u_6
.3
V_X
5R_04
DPEF_VDD18

*10u_6.3V_08_H125

( 1.0 V@220 m A DPAB_VDD1 0)L76

C216
*0.1u
_10V_X5R_0
4

AG1
4
AH1
4
AM1
4
AM1
6
AM1
8

*HCB16
08KF-121T
25
LVDS mode (1.0V@240mA DPEF_VDD10)
DP mode (1.0V@220mA DPEF_VDD10)

DPEF_
VDD18

A32
AM1
AM32

C21
4

*0.1u_10
V_X
5R_04

DPAB_VDD10
AG2
0
AG2
1

DPEF_VDD1
0

1.0V_REG

*ROBSON XT S3

*RO
BSO
N XT S3

DP A/B POWER

DPEF_VDD18
L75

AG1
8
AF1
9

VSS_M
ECH#1
VSS_M
ECH#2
VSS_M
ECH#3

1.8V_REG

*1u_6.3V_X5R_
04

DP E/F POWER
1.8V_REG

Schematic Diagrams

Robson S3 Power 6/6
M VDDQ
2.8A 210m il

MV D D Q

*0 . 1u _ 10 V _X 5R _ 0 4
C 22 2

C 2 23

* 0. 1 u_ 1 0V _ X5 R _ 04

C 22 5

C 22 4

C 2 26

* 0. 1 u_ 10 V _X 5 R _0 4
* 0. 1 u_ 1 0V _ X5 R _ 04

C 23 2

C 23 3

*1 u_ 6 . 3V _ X5 R _ 04

C 24 8

C 2 35

C2 3 4

C 24 9

* 10 u_ 6. 3 V _0 8 _H 1 2 5

* 1u _6 . 3 V_ X 5R _ 0 4

C2 2 9

C 2 28

C 23 0

* 0. 1 u_ 1 0V _ X5 R _ 04

C 23 1

U 4D

*1 u_ 6 .3 V _ X5 R _0 4

* 1u _6 . 3V _ X5 R _ 04

C 25 2

C 25 1

*1 0u _6 . 3V _ 0 8_ H 12 5

*10 u _6 . 3V _ 08 _H 12 5

V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR

1# 1
1# 2
1# 3
1# 4
1# 5
1# 6
1# 7
1# 8
1# 9
1# 10
1# 11
1# 12
1# 13
1# 14
1# 15
1# 16
1# 17

P CIE _ V DDR# 1
P CIE _ V DDR# 2
P CIE _ V DDR# 3
P CIE _ V DDR# 4
P CIE _ V DDR# 5
P CIE _ V DDR# 6
P CIE _ V DDR# 7
P CIE _ V DDR# 8

1 . 8V _ R E G
V D D C _C T
L7 9

*1 u_ 6. 3 V _X 5R _0 4

* H C B 1 60 8K F -1 21 T2 5
C 2 61

* 0. 1 u_ 10 V _X 5 R _0 4
C 26 3

C 26 2

C 26 4

AA2 0
AA2 1
AB2 0
AB2 1

C 2 65
*1 u _6 . 3V _ X5 R _ 04

LEVEL
TRANSLATION
V D D _ C T #1
V D D _ C T #2
V D D _ C T #3
V D D _ C T #4

P CIE _ V DDC# 1
P CIE _ V DDC# 2
P CIE _ V DDC# 3
P CIE _ V DDC# 4
P CIE _ V DDC# 5
P CIE _ V DDC# 6
P CIE _ V DDC# 7
P CIE _ V DDC# 8
P CIE _ V DDC# 9
P C I E _V D D C #1 0
P C I E _V D D C #1 1
P C I E _V D D C #1 2

CORE

3. 3 V S _GP U
I/O

*1 u _6 . 3V _ X5 R _ 04
VDDC_CT+VDDR4

* 1u _6 . 3V _ X 5R _ 04

187mA 10mil

C 27 7

C 27 6
*1 0u _ 6. 3 V _0 8_ H 1 25

C 27 8

AA1 7
AA1 8
AB1 7
AB1 8

C 2 79

*1 u_ 6. 3 V _X 5 R _0 4

3.3VS_GPU
60mA 4mil

V DD R4
V1 2
Y1 2
U1 2

* 1u _6 . 3V _ X 5R _ 04
V DDR4

AA1 1
AA1 2

* H C B 1 60 8K F -1 21 T2 5
C 29 0

C 2 91

V1 1
U1 1

*0 .1 u _1 0V _ X5 R _ 04

*1 u _6 . 3V _ X5 R _ 04

V D D R 4# 1
V D D R 4# 2
V D D R 4# 3
N C #1
N C #2

POWER

L8 0

V D D R 3# 1
V D D R 3# 2
V D D R 3# 3
V D D R 3# 4

N C #3
N C #4

MEM CLK
L1 7
L1 6
P C I E _ VD D R _ VG A
A M3 0

V DDC# 1
V DDC# 2
V DDC# 3
V DDC# 4
V DDC# 5
V DDC# 6
V DDC# 7
V DDC# 8
V DDC# 9
V D D C #1 0
V D D C #1 1
V D D C #1 2
V D D C #1 3
V D D C #1 4
V D D C #1 5
V D D C #1 6
V D D C #1 7
V D D C #1 8
V D D C #1 9
V D D C #2 0
V D D C #2 1
V D D C #2 2
V D D C #2 3

BI F _ V D D C # 1
BI F _ V D D C # 2

R 21
U 21

N C _MP V 1 8

C 2 43

C 2 42

C 24 5

C 2 44

*1 u_ 6. 3 V _X 5R _0 4 * 1u _6 . 3V _ X5 R _ 04

*1 0u _ 6. 3 V _0 8_ H 1 25
*1u _ 6. 3 V _X 5R _0 4

1.0V_REG
2A 80mil

C 2 53

C 2 55

C 25 4

* 1u _6 . 3 V_ X 5R _ 0 4

C 2 56

*1 u_ 6. 3 V _X 5R _0 4

*1 u_ 6. 3 V _X 5 R _0 4

VD DC
1 . 0V _ R E G
C2 5 8

C 25 7

*1 u_ 6. 3 V _X 5R _0 4

*1 u_ 6. 3 V _X 5 R _0 4

C 8 37
+
* 22 0u _ 4V _ V_ A

C2 6 0

C2 5 9

*1 0u _6 . 3 V_ 0 8_ H 1 25

*1 u_ 6. 3 V _X 5R _0 4

* 1u _6 . 3 V_ X 5R _ 0 4

VDDC
12.9A 520mil
* 1u _6 . 3 V_ X 5R _ 0 4
C 2 66

C 26 7

*1 u_ 6. 3 V _X 5R _0 4
C 2 69

C2 6 8

*1 u_ 6. 3 V _X 5 R _0 4
C 27 1

C 2 70

C 27 2

V DDC

* 1u _6 . 3 V_ X 5R _ 0 4
C 27 3

C 2 74

C 27 5
*1 u_ 6. 3 V _X 5R _0 4

*1 u_ 6 . 3V _ X5 R _ 04
*1u _ 6. 3 V_ X 5R _ 0 4
C 2 80

* 1u _6 . 3V _ X5 R _ 04
C2 8 2

C 28 1

*1 u _6 . 3V _ X5 R _ 04

*1 u_ 6. 3 V _X 5R _0 4
C2 8 7

*1 u_ 6. 3 V _X 5R _0 4

C 3 01

C 3 00

C 28 9

* 1u _6 . 3V _ X 5R _ 04

*1 0 u_ 6. 3 V _0 8 _H 1 25

*1 0u _ 6. 3 V _0 8_ H 1 25

C 2 88

*1 u _6 . 3V _ X5 R _ 04 *1 u_ 6. 3 V _X 5R _0 4

*1u _ 6. 3 V _X 5R _0 4

C 2 99

C 2 98
*1 0u _ 6. 3 V _0 8_ H 1 25

*1u _6 . 3 V_ X 5R _ 0 4
C 2 84

C 2 83

*1 u _6 . 3V _ X5 R _ 04

*1 u_ 6 . 3V _ X5 R _ 04

C 3 02
*1 0u _ 6. 3 V _0 8_ H 1 25

C3 0 3

Sheet 12 of 41
Robson S3 Power
6/6

*1 0 u_ 6. 3 V _0 8_ H 1 25

* 10 u_ 6. 3 V _0 8 _H 1 25

See Not e 1
C 30 4

S P V 18

ISOLATED
CORE I/O V D D C I # 1
V DDCI# 2
V DDCI# 3
V DDCI# 4
V DDCI# 5
V DDCI# 6
V DDCI# 7
V DDCI# 8

S P V 10

J7
SPVSS

* 1u _6 . 3V _ X 5R _ 04
S H OR T

C2 4 1

* 0. 1 u_ 1 0V _ X5 R _ 04

*H C B1 6 08 K F- 1 2 1T 25

B IF _ V D D C

PLL

H7
H8

C 24 0

*0 . 1u _ 10 V _X 5R _0 4

AA1 5
N 15
N 17
R 13
R 16
R 18
Y 21
T12
T15
T17
T20
U 13
U 16
U 18
V2 1
V1 5
V1 7
V2 0
Y 13
Y 16
Y 18
M 11
M 12

S P V1 8
1. 0 V _R E G
*10 u _6 . 3V _ 08 _H 12 5
L8 1
C 3 07 C 30 8
* H C B 16 0 8K F -12 1 T2 5
C 30 6
N C1
*0 . 1 u_ 10 V _X 5R _0 4

L78

N C _V S S R H A

MP V 18
L8

L23
L24
L25
L26
M 22
N 22
N 23
N 24
R 22
T22
U 22
V2 2

1 . 8V _ R E G

400mA20mil

N C _V D D R H A

P C I E _ P VD D

Fo r Se ym o u r,PCIE_ PV DD i s PC IE _ VDDR

AB2 3
A C2 3
A D2 4
AE2 4
AE2 5
AE2 6
AF2 5
A G2 6

SPVSS

*1 u _6 . 3V _ X5 R _ 04
M
M
M
M
M
M
M
N

13
15
16
17
18
20
21
20

C3 0 5
*1 u _6 . 3V _ X5 R _ 04
V DDCI
V DDC

VDDCI
2A80mil
*1 u _6 . 3V _ X5 R _ 04
C 3 09

C 3 10

L 82
C 31 1

C 3 12

*H C B1 6 08 K F -12 1T 25
0.9-1.12V @2A (DDR3) ??(GDDR5)
*1 u_ 6 .3 V _ X5 R _0 4
Warning:Select the correct Bead to
*1 u_ 6. 3 V _X 5R _0 4
support expected VDDCI current. See
databook for details.
C3 1 3

C 3 14

*1 u_ 6 . 3V _ X5 R _ 04
* 1u _6 . 3 V_ X 5R _ 0 4

*1 u_ 6. 3 V _X 5 R _0 4

*R OB S ON X T S3
MP V 18

(Pa r k : 1 .8 V @7 5 m A M PV 1 8 )
L8 3
C 3 20
C 31 7
C 3 21
*H C B 1 60 8 K F-1 2 1T 25
*1 0u _6 . 3 V_ 0 8_ H 1 25

C 3 15

*1 u _6 . 3V _ X5 R _ 04
* 0. 1 u_ 1 0V _ X5 R _0 4

(1 .8 V @7 5 m A SPV 1 8)
L84
C 32 2
*H C B 1 60 8K F -1 21 T2 5

SP V 1 8
C 32 3

*1 0u _6 . 3 V_ 0 8_ H 1 25

C 3 24
* 0. 1 u_ 10 V _X 5 R _0 4

*1u _ 6. 3 V _X 5R _ 0 4
SPVSS

*1 0u _ 6. 3 V _0 8_ H 1 25

N ote 1
B FI _ V D D C
R 16 4

C 3 16
*1 0u _ 6. 3 V _0 8_ H 1 25

V DDC
* 10 mi l_ s ho rt

1. No BACO Suppo rt:
BIF_VDDC sho rts with VDDC if
BACO is not su ppor ted
2. BACO Su pport :

VDDCI and VDDC share one commo n regulator

Refer to the BACO r eferen ce schem atics/Application
no te for de ta ila bout BIF_VDDC Rail if BACO is
Suppo rted

Robson S3 Power 6/6 B - 13

B.Schematic Diagrams

* 10 u_ 6. 3 V _0 8 _H 1 2 5

PC E
I _ V D D R _ V GA

PCIE
H1 3
H1 6
H1 9
J1 0
J2 3
J2 4
J9
K1 0
K2 3
K2 4
K9
L1 1
L1 2
L1 3
L2 0
L2 1
L2 2

C 2 38

*10 u _6 . 3V _ 08 _ H 12 5

PCIE
_VDDR

MEM I/O

*1 u_ 6 . 3V _ X5 R _ 04

*0. 1 u _1 0V _ X5 R _ 04

*1 u_ 6. 3 V _X 5 R _0 4
* 1u _6 . 3 V_ X 5R _ 0 4

*0 . 1 u_ 10 V _X 5 R _0 4

C 22 7

*0 . 1 u_ 10 V _X 5 R _0 4

Schematic Diagrams

Robson DDR3 MEM CH-A
COMPONENTS SHOWN ARE EXAMPLES ONLY
AND NOT NECESSARILY QUALIFIED

CHANNEL A: 64M X 16 bit X8 DDR3 (RANK0)

U 7

U8

OD T A 0

QS A 0 _1
QS A 0 _2

QS A 0_ [ 3. . 0 ]
Q SA 0 _0
Q SA 0 _1
Q SA 0 _2
Q SA 0 _3

9
9
9
9

QS A 0_ 0 B
QS A 0_ 1 B
QS A 0_ 2 B
QS A 0_ 3 B

QS A0 _ 0B
QS A0 _ 1B
QS A0 _ 2B
QS A0 _ 3B

K1
L2
J3
K3
L3
F3
C7

D Q MA 0_ 1
D Q MA 0_ 2

E7
D3

QS A 0 _1 B
QS A 0 _2 B

G3
B7

T2

9, 1 4 ME M_ R S T

L8

OD T
CS
RAS
CAS
WE
D QS L
D QS U
D ML
D MU
D QS L
D QS U

RESE T
ZQ

V D D Q# A1
V D D Q# A8
V D D Q#C 1
V D D Q#C 9
V D D Q#D 2
V D D Q# E9
V D D Q# F1
V D D Q#H 2
V D D Q#H 9
V S S # A9
V S S # B3
V S S # E1
V S S #G8
V SS # J2
V SS # J8
V S S #M1
V S S #M9
V S S # P1
V S S # P9
V SS # T1
V SS # T9

MV D D Q
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

9
9
9

C LK A 0
C LK A 0#
C KE A 0
OD T A 0

9
9
9
9

C S A 0 b_ 0
R AS A 0 #
C AS A 0 #
W E A 0#

J7
K7
K9
K1
L2
J3
K3
L3

QS A 0_ 3
QS A 0_ 0

F3
C7

D QMA 0 _3
D QMA 0 _0

E7
D3

QS A 0 _3 B
QS A 0_ 0B

G3
B7

T2

9, 1 4 ME M_R ST

L8

CK
CK
CKE
OD T
CS
RAS
CAS
WE
D QS L
D QS U
D ML
D MU
D QS L
D QS U

RESE T
ZQ

V D D Q#A 1
V D D Q#A 8
V D D Q #C 1
V D D Q #C 9
V D D Q #D 2
V D D Q#E 9
V D D Q#F 1
V D D Q #H 2
V D D Q #H 9
V S S #A 9
V S S #B 3
V S S #E 1
V S S #G8
VS S # J2
VS S # J8
V S S #M1
V S S #M9
V S S #P 1
V S S #P 9
VS S # T1
VS S # T9

C 34 1

C 3 42
* 0. 1 u_ 10 V _X 5 R _0 4

C 3 40

*0 . 1u _1 0V _ X 5R _ 04

C 35 4

B2
D9
G7
K2
K8
N1
N9
R1
R9

C 3 55

C 35 6

C 3 57

C 35 8

C 3 59

C 36 0

C 3 61

C 36 2

C 3 63

C 37 5

C 3 76

C 37 7

C 3 78

MV D D Q

M VD D Q
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

C 33 9

MV D D Q

M VD D Q
VD D #B 2
V D D #D 9
V D D #G7
VD D #K 2
VD D #K 8
V D D #N 1
V D D #N 9
V D D #R 1
V D D #R 9

C 3 38

* 0. 1 u_ 10 V _X 5 R _0 4

9

C 33 7

*0 .1 u _1 0V _ X 5R _ 04

D QA 0 _[ 7 . 0. ]

C 3 36

*0 . 1 u_ 10 V _X 5 R _0 4

A0 _ 3
A0 _ 2
A0 _ 5
A0 _ 0
A0 _ 7
A0 _ 4
A0 _ 6
A0 _ 1

C 33 5

*1 u_ 6. 3 V _X 5R _0 4

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

C 3 34

*1 u _6 . 3V _ X5 R _ 04

D7
C3
C8
C2
A7
A2
B8
A3

C 33 3

*1u _ 6. 3 V_ X 5R _0 4

D QA 0_ [ 31 . . 24 ] 9

*1 u _6 . 3V _ X5 R _ 04

A0 _ 27
A0 _ 28
A0 _ 25
A0 _ 31
A0 _ 29
A0 _ 30
A0 _ 24
A0 _ 26

* 0. 1 u_ 10 V _X 5 R _0 4

B A0
B A1
B A2

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

*0 . 1u _1 0V _ X 5R _ 04

M2
N8
M3

D QU 0
D QU 1
D QU 2
D QU 3
D QU 4
D QU 5
D QU 6
D QU 7

E3
F7
F2
F8
H3
H8
G2
H7

* 0. 1 u_ 10 V _X 5 R _0 4

A_ BA0
A_ BA1
A_ BA2

QL0
QL1
QL2
QL3
QL4
QL5
QL6
QL7

*0 .1 u _1 0V _ X 5R _ 04

9, 1 4
9, 1 4
9, 1 4

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 10 / A P
A 11
A 12 / B C
A 13
A 14
A 15

D
D
D
D
D
D
D
D

*0 . 1 u_ 10 V _X 5 R _0 4

MV D D Q

V RE F CA
V RE F DQ

*1 u_ 6. 3 V _X 5R _0 4

B2
D9
G7
K2
K8
N1
N9
R1
R9

D QA 0 _[ 2 3. . 1 6] 9

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

*1 u _6 . 3V _ X5 R _ 04

C S A 0b _0
R A S A0 #
C A S A0 #
W EA 0 #

CK
CK
CKE

V D D # B2
VD D #D 9
VD D #G7
V D D # K2
V D D # K8
VD D #N 1
VD D #N 9
VD D #R 1
VD D #R 9

QA 0_ 23
QA 0_ 22
QA 0_ 18
QA 0_ 21
QA 0_ 16
QA 0_ 19
QA 0_ 17
QA 0_ 20

MA A 0
MA A 1
MA A 2
MA A 3
MA A 4
MA A 5
MA A 6
MA A 7
MA A 8
MA A 9
MA A 1 0
MA A 1 1
MA A 1 2
MA A 13

M8
H1

*1 0 u_ 6. 3 V _X 5 R _0 6

9
9
9
9

J7
K7
K9

BA0
BA1
BA2

D
D
D
D
D
D
D
D

V R E FC _U 8
V R E FD _U 8

*1u _ 6. 3 V_ X 5R _0 4

C LK A 0
C LK A 0 #
C K E A0

M2
N8
M3

D7
C3
C8
C2
A7
A2
B8
A3

9

*1 u _6 . 3V _ X5 R _ 04

9
9
9
D QMA 0_ [ 3. . 0 ]
D QMA 0 _0
D QMA 0 _1
D QMA 0 _2
D QMA 0 _3

9

A_ B A 0
A_ B A 1
A_ B A 2

D QU 0
D QU 1
D QU 2
D QU 3
D QU 4
D QU 5
D QU 6
D QU 7

D QA 0 _[ 1 5. . 8 ]

*10 u _6 . 3V _ X5 R _ 06

9

9 ,1 4
9 ,1 4
9 ,1 4

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 10 / A P
A 11
A 12 / B C
A 13
A 14
A 15

D QA 0_ 11
D QA 0_ 9
D QA 0_ 8
D QA 0_ 10
D QA 0_ 15
D QA 0_ 12
D QA 0_ 14
D QA 0_ 13

E3
F7
F2
F8
H3
H8
G2
H7

*1 0 u_ 6. 3 V _X 5R _0 6

Sheet 13 of 41
Robson DDR3 MEM
CH-A

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

D QL0
D QL1
D QL2
D QL3
D QL4
D QL5
D QL6
D QL7

*1u _ 6. 3 V_ X 5R _0 4

MA A 0
MA A 1
MA A 2
MA A 3
MA A 4
MA A 5
MA A 6
MA A 7
MA A 8
MA A 9
M AA 1 0
M AA 1 1
M AA 1 2
MA A 13

MA A 0
MA A 1
MA A 2
MA A 3
MA A 4
MA A 5
MA A 6
MA A 7
MA A 8
MA A 9
MA A1 0
MA A1 1
MA A1 2
MA A 1 3

V RE F CA
V RE F DQ

*1u _ 6. 3 V_ X 5R _0 4

9, 1 4 MA A [ 1 3. . 0 ]

M8
H1

*10 u _6 . 3V _ X5 R _ 06

B.Schematic Diagrams

MV D D Q
V R E F C _U 7
V R E F D _U 7

M VD D Q
MV D D Q

R 1 69
*4 . 99 K _1 %_ 04

R1 7 0
* 4. 9 9K _ 1% _0 4
V RE F C_ U8

V R E F C _U 7
R 1 65

9

OD T A0

*24 3_ 1 %_ 04

OD T A0
J1
L1
J9
L9

V S S Q# B1
V S S Q# B9
V S S Q#D 1
V S S Q#D 8
V S S Q# E2
V S S Q# E8
V S S Q# F9
V S S Q#G1
V S S Q#G9

N C # J1
N C # L1
N C # J9
N C # L9
10 0-B A LL
SD R A M D D R 3

* K 4W 1G 16 46 G-B C 11

B1
B9
D1
D8
E2
E8
F9
G1
G9

R 1 66

* 24 3_ 1% _0 4

J1
L1
J9
L9

V S S Q#B 1
V S S Q#B 9
V SS Q #D 1
V SS Q #D 8
V S S Q#E 2
V S S Q#E 8
V S S Q#F 9
V SS Q #G1
V SS Q #G9

N C # J1
N C # L1
N C # J9
N C # L9
1 0 0-B A LL
S D R AM D D R 3

B1
B9
D1
D8
E2
E8
F9
G1
G9

R1 7 4
C 32 5
* 0. 1 u_ 10 V _X 5R _0 4
*4 . 99 K _1 %_ 04
R 1 73

C 3 26
*0 . 1u _1 0V _ X5 R _ 04
* 4. 9 9K _ 1% _0 4

M VD D Q
MV D D Q

* K4 W 1G1 6 46 G-B C 11
R 1 77
*4 . 99 K _1 %_ 04

R1 7 8
* 4. 9 9K _ 1% _0 4
V RE F D_ U8

V R E F D _U 7
C 3 30
*0 . 1u _1 0V _ X5 R _ 04
* 4. 9 9K _ 1% _0 4
R1 8 2
R 1 81

C 32 9
* 0. 1 u_ 10 V _X 5R _0 4
*4 . 99 K _1 %_ 04
9

C L KA 0
R 18 5
*5 6_ 04
R 18 6
*5 6_ 04

9

C L KA 0 #

B - 14 Robson DDR3 MEM CH-A

*0 . 0 1u _1 6V _ X7 R _ 04
C3 5 3

Schematic Diagrams

Robson DDR3 MEM CH-B
C OMPONEN TS SHOWN AR E EXA MPLES ON LY
A ND N OT NE CE SSA RILY QUA LIFIED

9

O D TA 1

D QA 1 _2 1
D QA 1 _2 2
D QA 1 _1 6
D QA 1 _2 3
D QA 1 _1 8
D QA 1 _2 0
D QA 1 _1 9
D QA 1 _1 7

D 7
C 3
C 8
C 2
A7
A2
B8
A3

D QA 1 _2 8
D QA 1 _2 6
D QA 1 _3 1
D QA 1 _2 4
D QA 1 _2 9
D QA 1 _2 5
D QA 1 _3 0
D QA 1 _2 7

D QA 1 _[ 2 3. . 16 ] 9

MV D D Q
C 3 94

C 3 95

C 3 96

C 39 7

C 39 8

C 3 99

C 4 00
*0 . 1u _1 0V _ X 5R _ 04

C 39 3

*0 . 1u _1 0V _ X5 R _ 04

C 39 2

*0. 1 u_ 10 V _X 5 R _0 4

C3 9 1

*0. 1 u_ 10 V _X 5R _0 4

MV D D Q

D QA 1 _[ 3 1. . 24 ] 9

* 0. 1 u_ 10 V_ X 5R _ 04

D QU 0
D QU 1
D QU 2
D QU 3
D QU 4
D QU 5
D QU 6
D QU 7

E3
F7
F2
F8
H 3
H 8
G 2
H 7

*1 u_ 6. 3 V _X 5 R _0 4

QL0
QL1
QL2
QL3
QL4
QL5
QL6
QL7

*1 u_ 6. 3 V _X 5R _ 0 4

D
D
D
D
D
D
D
D

9
9
9
9

C S A 1b _0
R A S A1 #
C A S A1 #
W EA 1 #
QS A 1 _0
QS A 1 _1

F3
C7
E7
D3

QS A 1 _0 B
QS A 1 _1 B

G3
B7

O DT
C S
R AS
C AS
WE
D QS L
D QS U
D ML
D MU
D QS L
D QS U

T2
R ES E T
L8

R 23 6
*56 _0 4
C 41 1
*0 .0 1u _ 16 V_ X7 R _ 04

J1
L1
J9
L9

N C #J 1
N C #L 1
N C #J 9
N C #L 9

V D D Q# A1
V D D Q# A8
VD D Q#C 1
VD D Q#C 9
VD D Q#D 2
V D D Q# E9
V D D Q# F1
VD D Q#H 2
VD D Q#H 9
VS S # A9
VS S # B3
VS S # E1
V S S #G8
V SS # J2
V SS # J8
V S S #M1
V S S #M9
VS S # P1
VS S # P9
V SS # T1
V SS # T9
V S S Q# B1
V S S Q# B9
V S S Q#D 1
V S S Q#D 8
V S S Q# E2
V S S Q# E8
V S S Q# F9
V S S Q#G1
V S S Q#G9

1 00 -BA L L
S DRA M DDR3
*K 4 W1 G16 4 6G-B C 1 1

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

C LK A 1
C LK A 1 #
C K EA 1
OD T A 1

9
9
9
9

C S A1 b_ 0
R A SA 1 #
C A SA 1 #
WE A 1 #

J7
K7
K9
K1
L2
J3
K3
L3

QS A 1_ 2
QS A 1_ 3

F3
C7

D QMA 1 _2
D QMA 1 _3

E7
D3

QS A 1_ 2B
QS A 1_ 3B

G3
B7

BA0
BA1
BA2

C K
C K
C KE
O DT
C S
R AS
C AS
WE
D QSL
D QSU
D ML
D MU
D QSL
D QSU

T2

9 , 13 ME M_ R S T

R ES E T
L8
ZQ

B1
B9
D1
D8
E2
E8
F9
G1
G9

R 20 6
*24 3_ 1% _0 4

J1
L1
J9
L9

N C #J 1
N C #L 1
N C #J 9
N C #L 9

V D D #B 2
VD D #D 9
VD D #G7
V D D #K 2
V D D #K 8
VD D #N 1
VD D #N 9
VD D #R 1
VD D #R 9
V D D Q#A 1
V D D Q#A 8
V D D Q #C 1
V D D Q #C 9
V D D Q #D 2
V D D Q#E 9
V D D Q#F 1
V D D Q #H 2
V D D Q #H 9
V S S #A 9
V S S #B 3
V S S #E 1
V S S #G8
V SS # J2
V SS # J8
V S S #M1
V S S #M9
V S S #P 1
V S S #P 9
V SS # T1
V SS # T9
V S S Q#B 1
V S S Q#B 9
V S SQ #D 1
V S SQ #D 8
V S S Q#E 2
V S S Q#E 8
V S S Q#F 9
V S SQ #G1
V S SQ #G9

B2
D 9
G 7
K2
K8
N 1
N 9
R 1
R 9

C4 1 2

C 41 3

C 41 4

C 4 15

C 4 16

C 4 17

C 41 8

C 41 9

C 4 20

C 4 21

MV D D Q
A1
A8
C 1
C 9
D 2
E9
F1
H 2
H 9
A9
B3
E1
G 8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D 1
D 8
E2
E8
F9
G 1
G 9

C 43 5

C 43 6

C 4 37

MV D D Q
C4 3 4

*0 . 1u _1 0V _ X 5R _ 04

9
9
9

M2
N8
M3

*0 . 1u _1 0V _ X5 R _ 04

MV D D Q
A1
A8
C1
C9
D2
E9
F1
H2
H9

A _B A 0
A _B A 1
A _B A 2

*0. 1 u_ 10 V _X 5 R _0 4

9 , 13
9 , 13
9 , 13

*0. 1 u_ 10 V _X 5R _0 4

B2
D9
G7
K2
K8
N1
N9
R1
R9

*1 u_ 6. 3 V _X 5 R _0 4

C K
C K
C KE

V D D # B2
VD D #D 9
VD D #G7
V D D # K2
V D D # K8
VD D #N 1
VD D #N 9
VD D #R 1
VD D #R 9

* 0. 1 u_ 10 V_ X 5R _ 04

K1
L2
J3
K3
L3

D Q MA 1_ 0
D Q MA1 _ 1

9 , 13 ME M_ R S T

OD T A 1

J7
K7
K9

BA0
BA1
BA2

*1 u_ 6. 3 V _X 5R _ 0 4

C LK A 1
C LK A 1 #
C K E A1
OD T A 1

QS A 1_ 0B
QS A 1_ 1B
QS A 1_ 2B
QS A 1_ 3B

R 23 7
*56 _0 4

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 1 0/ A P
A1 1
A 1 2/ B C
A1 3
A1 4
A1 5

*1 u_ 6. 3V _ X 5R _ 04

9
9
9

QS A 1_ 0
QS A 1_ 1
QS A 1_ 2
QS A 1_ 3

M2
N8
M3

C LK A 1

C LK A 1#

MV D D Q

V RE F CA
V RE F DQ

* 1u _6 . 3V _X 5 R _0 4

D QMA 1 _0
D QMA 1 _1
D QMA 1 _2
D QMA 1 _3

A _B A 0
A _B A 1
A _B A 2

ZQ

9

9

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

MV D D Q
9 , 13
9 , 13
9 , 13

R 20 5
*24 3_ 1% _0 4
9

D QA 1 _[ 7 . .0 ]

MA A 0
MA A 1
MA A 2
MA A 3
MA A 4
MA A 5
MA A 6
MA A 7
MA A 8
MA A 9
MA A1 0
MA A1 1
MA A1 2
MA A 13

Sheet 14 of 41
Robson DDR3 MEM
CH-B

MV D D Q

+C 83

*1 0u _6 . 3V _ X5 R _ 06

QS A 1_ 0B
QS A 1_ 1B
QS A 1_ 2B
QS A 1_ 3B

QA1 _ 11
QA1 _ 12
QA1 _ 9
QA1 _ 8
QA1 _ 14
QA1 _ 15
QA1 _ 10
QA1 _ 13

V R E F C _U 12 M8
V R E F D _U 12 H 1

*1 0u _6 .3 V _X 5 R _0 6

9
9
9
9

D
D
D
D
D
D
D
D

9

*1u _6 . 3V _ X5 R _ 04

QS A1 _ [3 . . 0]

D7
C3
C8
C2
A7
A2
B8
A3

D QA 1 _[ 1 5. . 8]

*10 u_ 6. 3 V _X 5 R _0 6

9

D QA 1 _0
D QA 1 _2
D QA 1 _7
D QA1 _ 3
D QA 1 _6
D QA 1 _4
D QA 1 _5
D QA1 _ 1

* 10 u_ 6. 3 V_ X 5R _ 06

9 D Q MA1 _ [3 . . 0]

D QU 0
D QU 1
D QU 2
D QU 3
D QU 4
D QU 5
D QU 6
D QU 7

E3
F7
F2
F8
H3
H8
G2
H7

*1 u_ 6. 3V _ X 5R _ 04

MA A 0
MA A 1
MA A 2
MA A 3
MA A 4
MA A 5
MA A 6
MA A 7
MA A 8
MA A 9
MA A1 0
MA A1 1
MA A1 2
MA A 13

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 1 0/ A P
A1 1
A 1 2/ B C
A1 3
A1 4
A1 5

D QL0
D QL1
D QL2
D QL3
D QL4
D QL5
D QL6
D QL7

*1u _6 . 3V _ X5 R _ 04

9 ,1 3 MA A [ 1 3. . 0]

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

U1 2

V RE F CA
V RE F DQ

MV D D Q

8

* 22 0u _4 V _V _A

MV D D Q

R 22 4
*4. 9 9K _ 1% _0 4

R 2 25
* 4. 99 K _1 %_ 04

V R E F C _ U 11
R 23 2

C 3 87
*0 . 1u _1 0V _ X5 R _0 4
*4. 9 9K _ 1% _0 4

V R E F D _U 1 1
R 2 33

C 38 8
*0. 1 u_ 10 V _X 5R _ 04
* 4. 99 K _1 %_ 04

10 0 -B A L L
S DRA M DDR3
*K 4W 1 G16 46 G-B C 11

MV D D Q

MV D D Q

R 22 6
*4 .9 9 K_ 1% _0 4
VR EF C _ U 12

R2 2 7
* 4. 9 9K _1 %_ 04
V R E F D _U 1 2

R 23 4

R2 3 5
C 3 89
C 39 0
*0 . 1u _1 0V _ X5 R _0 4
*0. 1 u_ 10 V _X 5R _ 04
*4 .9 9 K_ 1% _0 4
* 4. 9 9K _1 %_ 04

Robson DDR3 MEM CH-B B - 15

B.Schematic Diagrams

MA A 0
MA A 1
MA A 2
MA A 3
MA A 4
MA A 5
MA A 6
MA A 7
MA A 8
MA A 9
MA A1 0
MA A1 1
MA A1 2
MA A 1 3

M8
H1

* 1u _6 . 3V _X 5 R _0 4

U1 1
V R E F C _U 11
V R E F D _U 11

CHANNEL A: 64M X 16 bit X8 DDR3 (RANK1)

Schematic Diagrams

HUDSON PCIE/ PCI/ CLOCK/ FCH
HU DS ON P CI E/P CI /C LO CK /FC H

U 19 E
1 50 p F _N P O_ 5 0V _ 0 40 2

1. 1 V S

A D2 6
A D2 7
A C2 8
A C2 9
AB2 9
AB2 8
AB2 6
AB2 7

P CI E_RS T#

P CI CLK0

AE2 4
AE2 3
A D2 5
A D2 4
A C2 4
A C2 5
AB2 5
AB2 4

MI _ P _T X 0
MI _ N _ TX 0
MI _ P _T X 1
MI _ N _ TX 1
MI _ P _T X 2
MI _ N _ TX 2
MI _ P _T X 3
MI _ N _ TX 3

R 24 9
R 25 0

5 90
2 K _1 % _0 4

CA L RP
CA L RN

A D2 9
A D2 8

F C H _G P P T XP 0
F C H _G P P T XN 0
F C H _G P P T XP 1
F C H _G P P T XN 1

AA2 8
AA2 9
Y2 9
Y2 8
Y2 6
Y2 7
W28
W29

PC IC LK1/ GP O36
PC IC LK2/ GP O37

U MI _TX 0P
U MI _TX 0N

PC IC LK3/ GP O38
PC IC LK4/ 14M _OS C/ GP O39

U MI _TX 1P
U MI _TX 1N
U MI _TX 2P

P CI C LKS

C4 5 2
C4 5 3
C4 5 4
C4 5 5
C8 2 2
C8 2 3

24 P C I E _T X P 3_ W L A N
24 P C I E _T X N 3 _ W LA N

0. 1 u _1 0 V _ X7 R _ 0 4
0. 1 u _1 0 V _ X7 R _ 0 4

F C H _G P P T XP 3
F C H _G P P T XN 3

AA2 2
Y2 1
AA2 5
AA2 4
W23
V2 4
W24
W25

2 3 P C I E _ R X P 0 _J MC
2 3 P C I E _ R X N 0 _ JM C
2 6 P C I E _ U S B 30 _ N B _ R X P
2 6 P C I E _ U S B 30 _ N B _ R X N

Sheet 15 of 41
HUDSON PCIE/
PCI/ CLOCK/ FCH

24 P C I E _R X P 3_ W L A N
24 P C I E _R X N 3 _W L A N

AD1/ G PI O1

U MI _RX 0P

AD2/ G PI O2
AD3/ G PI O3

U MI _RX 0N

AD4/ G PI O4

U MI _RX 1P

AD5/ G PI O5

U MI _RX 1N
U MI _RX 2P

AD6/ G PI O6
AD7/ G PI O7

PCI EXP RE SS I /F

U MI _RX 2N

AD8/ G PI O8

U MI _RX 3P
U MI _RX 3N

AD9/ G PI O9
AD10/ G PI O10

P CI E_CA LRP

AD11/ G PI O11
AD12/ G PI O12

G PP _TX0P

AD13/ G PI O13
AD14/ G PI O14
AD15/ G PI O15

G PP _TX0N
G PP _TX1P

AD16/ G PI O16
AD17/ G PI O17

G PP _TX1N

AD18/ G PI O18

G PP _TX2P
G PP _TX2N

AD19/ G PI O19
AD20/ G PI O20

G PP _TX3P

AD21/ G PI O21

G PP _TX3N

AD22/ G PI O22

G PP _RX0P

AD23/ G PI O23
AD24/ G PI O24

G PP _RX0N

AD25/ G PI O25

G PP _RX1P
G PP _RX1N

AD26/ G PI O26
AD27/ G PI O27

G PP _RX2P
G PP _RX2N

AD28/ G PI O28
AD29/ G PI O29

G PP _RX3P
G PP _RX3N

AD30/ G PI O30
AD31/ G PI O31
C BE0#

AA1
AA4
AA3
AB1
AA5
AB2
AB6
AB5
AA6
A C2
A C3
A C4
A C1
A D1
A D2
A C6
AE2
AE1
AF8
AE3
AF1
A G1
AF2
AE9
A D9
A C1 1
AF6
AF4
AF3
A H2
A G2
A H3
AA8
A D5
A D8
AA1 0
AE8
AB9
AJ 3
AE7
A C5
AF5
AE6
AE4
AE1 1
A H5
A H4
A C1 2
A D1 2
AJ 5
A H6
AB1 2
AB1 1
A D7

C BE1#
C BE2#
C BE3#

M2 3
P2 3
D I S P _ C L K : C P U (no n -s pre a d)
3
3

P C I E _ R C L K : (S p re ad , F U S I ON M OD E )

U2 9
U2 8

D I S P _C LK P
D I S P _C LK N

T2 6
T2 7
3
3

V2 1
T2 1

A P U _C LK P
A P U _C LK N

V2 3
T2 3

7 V GA _ P C I E C L K _P
7 V GA _ P C I E C L K _N

L2 9
L2 8

2 3 C LK _ P C I E _J MC
2 3 C LK _ P C I E _J MC #

N2 9
N2 8

2 4 CL K_ P CIE _ W L A N
2 4 CL K_ P CIE _ W L A N#
FC H _GP P

D EV I C E

GF X_ C LK
0
1
2
3
4
5
6
7
8

MX M
J MC 2 61C
W LA N
N A
N A
N A
N A
N A
U S B3 .0
N A

M2 9
M2 8

C L KR E Q#

P C I R S T# _ R

22 _ 0 4
22 _ 0 4
22 _ 0 4
22 _ 0 4

R2 4 5

PCL K _ K B C 1 6
P CI_ CL K 2 1 6
P CI_ CL K 3 1 6
P CI_ CL K 4 1 6
P C I _R S T#

*3 3 _0 4

C4 4 9
AD0/ G PI O0

U MI _TX 3N

P CI I/ F

F RAM E#
DEV SEL#
P CI E_RC LKP /N B_LNK _CLKP

IR DY#

P CI E_RC LKN /N B_LNK _CLKN

TR DY#

N B_DI SP _CLK P

P AR
STO P#

N B_DI SP _CLK N

PE RR#
SE RR#
RE Q0#

N B_HT _CLK P
N B_HT _CLK N

RE Q1#/ G PI O40
RE Q2#/ CLK _RE Q8#/ G PI O41

C PU_H T_C LKP
C PU_H T_C LKN

RE Q3#/ CLK _RE Q5#/ G PI O42
G NT0#
GN T1#/ GP O44

S LT_G FX_ CLKP
S LT_G FX_ CLKN

GN T2#/ GP O45
G NT3#/ CLK _RE Q7#/ G PI O46
CLKR UN#
LO CK#

G PP _CLK0 P
G PP _CLK0 N

IN TF#/ G PI O33

G PP _CLK1 N

I NT G#/ G PI O34
IN TH#/ G PI O35

Re se rve
C 7 50
P CL K _ K B C

R 5 13

*1 0 _0 4 P C L K _ K B C _ R
*1 0 p _5 0 V _N P O_ 0 6

B T _ ON
MX M_ P R E S E N T 2#
MX M_ P R E S E N T 1#

R6 8 6
R2 4 7

2 4, 2 8

* 0_ 0 4
2 0 K _0 4

3 . 3V S
3 .3 V
U1 7
* 74 A H C 1 G0 8G W
* 0_ 0 4
1
*0 _ 0 4
2

R 80 5
R 8 06

1 6 P C I E _ R S T # _G A T E
P C I E _R S T# _ C

C4 6 0
4

M XM _G P I O0 7

R 2 52

3 . 3V S
R6 8 7
R6 8 8

* 10 K _ 0 4
* 10 K _ 0 4

P C IE _ R ST # I S F OR PC I E D E V I C ES ON H U D SON
3 .3 V
M XM _P W R GD

U1 8
* 74 A H C 1 G0 8G W
1
S B _A R S T #_ GA T E

36

C4 6 1

GP I O 30
GP I O 31

4
2

A _R S T# _ C

P2 5
M2 5

R 2 54

LP C

N2 6
N2 7

2 6 P C I E _ U S B 3 0 _C LK P
2 6 P C I E _ U S B 3 0 _C LK N
R6 8 9
C4 6 5

2 2_ 0 4

2 3 JM C _ 2 5M _I N
22 P _ 50 V _ N P O _0 4

T2 9
T2 8

LAD2
LAD3

G PP _CLK6 P

LF RAM E#
LDR Q0#
LDR Q1#/ CLK _RE Q6#/ G PI O49

G PP _CLK6 N

S ER IR Q/ G PI O48

*0 _ 04

B OA R D I D

3 .3 V S
MX M_ GP I O2

GP I O 31
0
R 2 56
* 20 K _ 04

MX M_ GP I O1
U S B 3 0 _C L K R E Q#
R 8 12
*2 2 _ 04

MX M_ GP I O 1 7 , 3 6

R2 5 5
* 2 0K _ 0 4

1

GP I O 3 0
0
W 2 4 0B U
W 25 0 B U Q
0
W 2 5 0B A Q

R2 5 7
2 0 K _0 4
L D T _ S TP #

R 2 59
2 0 K _0 4

22 p _ 50 V _ N P O _0 4
C4 6 2

R2 5 8
2 0K _ 0 4
* MC -1 4 6 _3 2 . 76 8 K H z

L P CCL K _ 0
L P CCL K _ 1

P RO CHO T#
LDT_P G
C PU

LDT_S TP#
LDT_R ST#

R 2 61
R 2 62

2 2 _0 4
2 2 _0 4

S E RIR Q

S E RIR Q
*1 0K _ 0 4

1

L D T _S T P #

C4 6 7

22 P _ 50 V _ N P O _0 4

32 K _ X1

L2 6

C2

32 K _ X2

2 5M _X 2

L2 7

25M _X1

1 M _0 4

R TC

32K_X2

C4 6 8

1 u_ 6 . 3V _X 5 R _ 04

B - 16 HUDSON PCIE/ PCI/ CLOCK/ FCH

A_ VBAT
I NT RUD E R_ AL E RT #
V B A T_ I N R 2 6 8

VD DBT _RTC _G

H U D S ON M1 A 1 3

2

D4 6
A_ VBAT
B A T 54 C W GH
A
20mi ls
C 3
C 4 64
A

R 2 65
C4 6 6
* 1u _ 6 . 3V _ X 5R _ 04

1
D2
B2

1 K _ 04 1

R T C _ V B A T _1

J _ RT C1

RTC CLK
IN TR UDE R_ALE RT#
25M _X2

20m i ls

R 2 63

10mi l s

1 K _ 04

5 1 0_ 1 % _0 4

2
*8 5 20 5 -0 27 0 1

1u _ 6 . 3V _ Y 5 V _ 0 4

J _R TC 2
1
2
A A A -B A T -02 2 -K 0 1

22 p _ 50 V _ N P O _0 4

INT RUD E R_ A L E RT #
* 1 M_ 04

R 26 6

2

2 5M _X 1

X4
1T J S 1 25 D J 4 A 4 20 P _ 32 . 7 6 8K H z
C4 6 3

Zo= 50O? 5%

P C LK _ T P M 1 9

A L L OW _ L D T S TP 3
P R OC H OT # 3
A P U _P W R GD 3, 3 5
L DT _ RST # 3

C1

VDD 3

3 . 3V

32K_X1

B 1

F S X 5L _ 2 5M H Z

R2 6 0
1 0 M_ 0 4

3 2K _ X 2

* 0_ 0 4

1 9, 2 7

14M _25M _48M _OS C

R 2 67

L P C _ C L K 0 1 6, 2 7
L PC_ CL K 1 1 6

L P C _ A D 0 1 9, 2 7
R2 7 1
L P C _ A D 1 1 9, 2 7
L P C _ A D 2 1 9, 2 7
L P C _ A D 3 1 9, 2 7
LP C _F R A ME # 1 9, 27

G2 1
H2 1
K1 9
G2 2
J 24

ALLO W_LDT STP / DM A_AC TI VE#

L2 5

X5

1 .8 V S

GP I O3 1
GP I O3 0

P C I _ C L K R U N # 19

S B _ A R S T # _G A TE

R 59 5
G PP _CLK7 P
G PP _CLK7 N

G PP _CLK8 P
G PP _CLK8 N

P CIE _ A RS T # 7

*1 50 p F _N P O_ 5 0V _ 0 4 02
P C I E _A R S T # I S F O R P C I E D E V I C E S ON F T1

H2 4
H2 5
J 27
J 26
H2 9
H2 8
G2 8
J 25
AA1 8
AB1 9

LPC CLK1
LAD0
LAD1

G PP _CLK5 P

W 250 BAQ ad d R2 53 , R2 54
*3 3 _0 4

X3

LPC CLK0
CLO CK G EN ERA TO R

G PP _CLK5 N

P2 9
P2 8

0 . 1u _ 16 V _ Y 5 V _ 04
R 2 53

C 45 9

3 2K _ X 1

G PP _CLK4 P
G PP _CLK4 N

B U F _ P L T_ R S T # 1 9, 2 3 , 24 , 2 6 , 27

15 0 pF _ N P O_ 50 V _ 04 0 2

0 _0 4

G PP _CLK2 P

G PP _CLK3 P
G PP _CLK3 N

3 3_ 0 4

1

L2 4
L2 3

0 . 1u _ 16 V _ Y 5 V _ 04
R 2 51

C 45 7
MX M_ GP I O0

AJ 6
A G6
A G4
AJ 4

IN TE#/ G PI O32
G PP _CLK1 P

*1 50 p F _ N P O_ 5 0V _ 0 4 02

G PP _CLK2 N

T2 5
V2 5

G
0
1
NA
NA
NA
NA
NA
7
NA

2

B.Schematic Diagrams

0. 1 u _1 0 V _ X7 R _ 0 4
0. 1 u _1 0 V _ X7 R _ 0 4
*0 . 1u _ 1 0V _ X 7R _0 4
*0 . 1u _ 1 0V _ X 7R _0 4

V2

R2 4 2
R2 4 0
R2 4 3
R2 4 4

PC IR ST#

U MI _TX 2N
U MI _TX 3P

P CI E_CA LRN

2 3 P C I E _ TX P 0 _ JM C
2 3 P C I E _ TX N 0_ J MC
2 6 P C I E _ N B _ U S B 30 _ TX P
2 6 P C I E _ N B _ U S B 30 _ TX N

P CI_ CL K 1 _ R
P CI_ CL K 2 _ R
P CI_ CL K 3 _ R
P CI_ CL K 4 _ R

2
1

12/9

C_ U
C_ U
C_ U
C_ U
C_ U
C_ U
C_ U
C_ U

U_ RX 0 P _ C
U_ RX 0 N_ C
U_ RX 1 P _ C
U_ RX 1 N_ C
U_ RX 2 P _ C
U_ RX 2 N_ C
U_ RX 3 P _ C
U_ RX 3 N_ C

3
4

2
2
2
2
2
2
2
2

0. 1 u _1 0 V _ X7 R _ 0 4
0. 1 u _1 0 V _ X7 R _ 0 4
0. 1 u _1 0 V _ X7 R _ 0 4
0. 1 u _1 0 V _ X7 R _ 0 4
0. 1 u _1 0 V _ X7 R _ 0 4
0. 1 u _1 0 V _ X7 R _ 0 4
0. 1 u _1 0 V _ X7 R _ 0 4
0. 1 u _1 0 V _ X7 R _ 0 4

2
1

33 _ 04

A _RST #

C4 4 4
C4 4 5
C4 4 3
C4 4 6
C4 4 7
C4 4 8
C4 5 0
C4 5 1

I _ P _R X0
I_ N_ RX 0
I _ P _R X1
I_ N_ RX 1
I _ P _R X2
I_ N_ RX 2
I _ P _R X3
I_ N_ RX 3

3
4

R2 4 1

E C_ RS T #
C_ UM
C_ UM
C_ UM
C_ UM
C_ UM
C_ UM
C_ UM
C_ UM

W2
W1
W3
W4
Y1

5

2
2
2
2
2
2
2
2

PA RT 1 O F 5

3

27

P1
L1

5

HU DS ON -1
P C I E _ R S T # _C
A _ R S T # _C

3

C4 4 1

J OP E N 1
*O P E N _ 1 0m i -l 1 M M

Schematic Diagrams

HUDSON GPIO/ USB/ STRAP
HUDSON GPIO/USB/AUDIO/STRAP
U1 9 A

27
27

3 . 3V

R2 8 2
1 0K _ 0 4

J2
K1
2 0, 2 7 , 2 9 LI D _ S W #
D3
F1
1 9 , 2 6, 2 7 , 3 0 S U S B #
H1
2 7 , 3 0, 3 2
S US C #
F2
R6 9 1
0_ 0 4
27
P W R _ B TN #
H5
19
S B _ P W R GD
R8 1 3
*0 _0 4 S U S _ S T A T # G6
19
S 4 _ S T A TE #
B3
R7 4 2
*2 . 2 K _0 4
R7 4 3
*2 . 2 K _0 4
C4
3 . 3V
F6
R7 4 4
*2 . 2 K _0 4
R 2 75
0 _ 04
GE V E N T 0#
AD2 1
GA 2 0
GE V E N T 1#
AE2 1
R 2 70
0 _ 04
K B C _ R S T#
K2
27
E C _S C I #
J2 9
2 6, 2 7 E C _S MI #
S W I # R7 3 1
0_ 0 4
H2
27
S W I#
J1
S Y S _ R S T#
19
S Y S _ RS T #
H6
2 3 , 2 4, 26 P C I E _ W A K E #
F3
23 J M_ D 3M OD E
J6
3 C P U _ T H E R MT R I P #
AC1 9
N B _ P W R GD
*0 _0 4
*0 _ 0 4

G1

RS M RS T #
S Y S _R S T #

AD1 9
AA1 6
AB2 1
AC1 8
AF 2 0
AE1 9
AF 1 9
AD2 2
AE2 2
F5
F4
AH2 1
AB1 8
E1
A J2 1
H4
D5
D7
G5
K3
AA2 0

1 5 P C I E _ R S T# _ GA T E
MX M_ P W R _ E N

7 M XM _P W R _ E N
25
H DA _ S P K R
5 , 6, 10
S CL K 0
5 , 6, 10
S DA T A 0

3 .3 V

R 28 0
* 20 K _ 0 4

S CL K 1
S DA T A 1

2 4 W L A N _ C L K R E Q#

W F _ RA D IO
C4 7 0
*0 . 1u _ 1 6 V _Y 5 V _0 4

W F _ RA D IO

R 2 96

8 S B _ MX M _C L K R E Q #

0 _ 04

R 6 92
U SB CLK/ 14M _25M _48M _O SC

RI #/G E VEN T22#
SPI _C S3#/ G BE_S TA T1/ G EVE NT 21#

U SB _RC OM P

2 4 OD D _ D A # _ F C H
2 4 OD D _ D E T E C T#
26 , 2 9 U S B _ O C P 0 _ 1#
2 6 U S B 3 0 _P W R _ E N

3 . 3V
G1 9

U S B _ R C OM P

R 2 72

1 1 K _1 % _ 0 4
R 2 73

U SB M I SC

SLP_ S3#
SLP_ S5#
PWR _BTN #
PWR _GO O D

USB 1. 1

SUS _ST AT#
TES T0

US B_F SD 1P/ GP I O186
USB _FS D1N

TES T1/ TM S
TES T2

US B_F SD 0P/ GP I O185

GA 20I N/ GE VE NT0#
KBR ST #/G E VEN T1#

USB _FS D0N

LPC_ PM E#/ G EVE NT 3#
LPC_ SM I#/ G EV ENT 23#

U SB _HS D13P
U SB _HS D13N

GE VE NT5#
SYS _RE SET #/ GE VE NT19 #

U SB _HS D12P

WAK E#/ GE VE NT8#
IR _RX 1/G EV EN T20#

U SB _HS D12N

THR M TRI P# S
/ MB ALE RT# /G EV EN T2#
NB_P WRG D

U SB _HS D11P
U SB _HS D11N

A CPI / WAK E UP E VE NTS
RSM R ST#

U SB _HS D10P
U SB _HS D10N

CLK_ REQ 4#/ SA TA_ IS 0#/G P O
I 64
CLK_ REQ 3#/ SA TA_ IS 1#/G P O
I 63
SM AR TVO LT 1/S AT A_I S2#/ G PI O 50

USB _HS D9P
USB _HS D9N

CLK_ REQ 0#/ SA TA_ IS 3#/G P O
I 60
SAT A_I S4#/ F ANO U T3/ GP I O55
SAT A_I S5#/ F ANI N3 /G PI O 59

USB _HS D8P
USB _HS D8N

SPK R/ G PI O 66
SCL0 G
/ PI O 43

USB _HS D7P

SDA 0/ GP IO 47
SCL1 G
/ PI O 227

J1 0
H1 1

R S MR S T #

* 2 2K _ 0 4
C 4 69

R2 7 4
* 2 . 2u _ 6 . 3V _X 5 R _ 0 4

H9
J8

*2 0 K _ 04

B 12
A 12

Q6
*M T N 7 0 02 Z H S 3

G

2 7 R S M R S T _ GA TE #

F 11
E 11
E 14
E 12
J1 2
J1 4
A 13
B 13

U S B _P P 9
U S B _P N 9

22
22

3 . 3V S
U SB9

3G
R 2 76
R 2 77
R 2 78
R 2 79

D1 3
C1 3

2 .2 K_ 0 4
2 .2 K_ 0 4
4 .7 K_ 0 4
4 .7 K_ 0 4

S CL K 0
S DA T A 0
N B _ P W R GD
S US _ S T A T #

G1 2
G1 4

USB _HS D7N
USB 2. 0

SDA 1/ GP IO 228

USB _HS D6P

CLK_ REQ 2#/ FA NI N4/ G PI O 62

USB _HS D6N

CLK_ REQ 1#/ FA NO UT 4/G P O
I 61
IR _LED #/LLB #/ GP IO 184

USB _HS D5P

SM AR TVO LT 2/S HU TDO WN #/G P O
I 51

USB _HS D5N

DDR 3_RS T#/ G EVE NT 7#
GB E_LE D0/ G PI O18 3
GB E_LE D1/ G EVE NT 9#

USB _HS D4P
USB _HS D4N

GB E_LE D2/ G EVE NT 10#
GB E_S TAT 0/ GE VE NT11#

USB _HS D3P

CLK_ REQ G #/ GP IO 65/ O SC IN

USB _HS D3N
GP IO

H3
D1
E4
D4
E8
F7
E7
F8

0 _0 4

A 10

USB _HS D2P
BLI NK U
/ SB_ OC 7#/G E VEN T18#

USB _HS D2N

USB _O C6#/ I R_TX 1/ GE VE NT6#
USB _O C5#/ I R_TX 0/ GE VE NT17#

USB _HS D1P

USB _O C4#/ I R_RX 0/ GE VE NT16#

USB _HS D1N

USB _O C3#/ AC _PRE S/ TD O /G EV EN T15#
USB _O C2#/ TC K/ GE VE NT 14#
USB _O C1#/ TD I/ G EV ENT 13#

USB _HS D0P
USB _HS D0N

G1 6
G1 8
D1 6
C1 6
B 14
A 14

P LA C E C L O S E T O S O U T H B R I D GE

U S B _P P 6
U S B _P N 6

28
28

U SB6

B L U E T O OT H

U S B _P P 5
U S B _P N 5

22
22

U SB5

CC D

U S B _P P 4
U S B _P N 4

29
29

U SB4

R 2 81
R 2 88
R 2 84

P OR T 3

U S B _ P P 2 24
U S B _ P N 2 24

B 17
A 17
A 16
B 16

* 2 . 2K _0 4
2 .2 K_ 0 4
2 .2 K_ 0 4

S Y S _ R S T#
S CL K 1
S DA T A 1

9/14

E 18
E 16
J1 6
J1 8

Sheet 16 of 41
HUDSON GPIO/
USB/ STRAP

3 . 3V

U SB2

MI N I C A R D
P OR T 1

U S B _P P 1
U S B _P N 1

29
29

U SB1

U S B _P P 0
U S B _P N 0

29
29

U SB0

R
R
R
R

3 10
3 12
3 13
3 14

1 0 K_ 0 4
1 0 K_ 0 4
* 2 . 2K _0 4
* 2 . 2K _0 4

SC L K2
SD ATA2
A P U _ S IC
A P U _ S ID

R 2 91

1 0 K_ 0 4

S W I#

R 2 92
R 2 93

1 0 K_ 0 4
1 0 K_ 0 4

E C_ S C I#
E C_ S M I#

P OR T 0

USB _O C0#/ TR ST#/ G EV EN T12#
U SB O C

R2 8 9
*1 0 K _ 04
3 .3 V
GB E _P H Y _ I N TR
R2 9 0
1 0K _ 0 4

R 8 07
* 1 0K _0 4

E2 3
E2 4
F21
G2 9

AZ_S DI N3/ G PI O 170
AZ_S YN C

EC_P WM 1/E C_T IM E R1/ GP I O198
EC_P WM 2/E C_T IM E R2/ GP I O199

AZ_R ST #

EC_P WM 3/E C_T IM E R3/ GP I O200

GB E_C OL

K SI _0/ GP I O201
K SI _1/ GP I O202

G B E LAN

GB E_C RS
GB E_M DC K

K SI _2/ GP I O203
K SI _3/ GP I O204

GB E_M DI O
GB E_R XCLK

K SI _4/ GP I O205
K SI _5/ GP I O206

GB E_R XD3
GB E_R XD2

K SI _6/ GP I O207
K SI _7/ GP I O208

GB E_R XD1
GB E_R XD0

K SO _0/ GP I O209

GB E_R XCT L/ RXD V
GB E_R XER R

K SO _1/ GP I O210
K SO _2/ GP I O211

GB E_T XCLK
GB E_T XD3

K SO _3/ GP I O212
K SO _4/ GP I O213

GB E_T XD2
GB E_T XD1

K SO _5/ GP I O214
K SO _6/ GP I O215

GB E_T XD0
GB E_T XCT L/ TXE N

K SO _7/ GP I O216
K SO _8/ GP I O217

GB E_P HY_P D
GB E_P HY_R ST #

K SO _9/ GP I O218
K SO _10/ GP I O219

GB E_P HY_I N TR

K SO _11/ GP I O220
K SO _12/ GP I O221

PS2_ DAT S
/ DA 4/G P O
I 187

K SO _13/ GP I O222

PS2_ CLK/ SC L4/ GP I O188

K SO _14/ GP I O223

SPI _C S2#/ G BE_S TA T2/ G PI O166

K SO _15/ GP I O224

FC_R ST #/G P O160

0_04

S B _ A C _ OK

D

R6 9 6

Q 8
* MT N 70 0 2 Z H S 3

G

K SO _16/ GP I O225
K SO _17/ GP I O226

PS2K B_D AT G
/ PI O 189
PS2K B_C LK/ G PI O1 90

S C LK 2 R
SD ATA2 R
R
R

6 93
6 94
7 28
7 52

*0 _ 0 4
*0 _ 0 4
*0 _ 0 4
*0 _ 0 4

S MC _C P U _ T H E R M
S MD _C P U _ T H E R M
A P U_ S IC 3
A P U_ S ID 3

P ULL

M I N I P C I E _ S L T2 _ E N #
M I N I P C I E _ S L T3 _ E N #

H IG H

G2 4
G2 5
E 28
E 29
D2 9
D2 8
C2 9
C2 8
B 28
A 27
B 27
D2 6
A 26
C2 6
A 24
B 25
A 25
D2 4
B 24
C2 4
B 23
A 23
D2 2
C2 2
A 22
B 22

3, 1 7 , 2 7
3, 1 7 , 2 7

P ULL

A Z_SD O UT
LO W PO WE R

P CI _CLK 1
A LLO W

PC _
I C LK2
Wat chdog

P CI _CLK 3
U SE

PC I_C LK4
non_F usion

L PC_C LK0
EC

L PC_C LK1
C LKG E N

MIN I PCI E _SLT3_ EN#
G PI O 200

MO DE
P ERF O RMAN CE

PC IEG en2
F OR CE

Ti mer
Enabl ed

D EB UG
S TR AP

CLO C K MO D E

E NA BLE D

E NA BLE D
D EF AU LT

H, H = R eser ved
H, L = SP I R OM

MO DE
D EFA ULT

P CI E G en1
D EFA ULT

C LKG E N
D I SAB LED

L, H = LPC RO M ( DE FAU LT)

LO W

V D DIO _ A Z

R 3 68

H D A _ S D OU T
15
PC L K_ KBC
15
P C I_ CL K 2
15
P C I_ CL K 3
15
P C I_ CL K 4
1 5 , 27 L P C _C L K 0
15
L P C _C L K 1

MI N I P C I E _S L T 3 _ E N #
MI N I P C I E _S L T 2 _ E N #

Wat chdog
Ti mer

I G NO RE
D EB UG

FU SI O N
CLO C K MO D E

EC
D I SAB LED

Di sabled
DE FAU LT

S TR AP
D EF AULT

DEFAU LT

D EF AUL T

3 .3 V S

R 3 69

MI NI PCI E _SLT2 _EN#
G PI O 199

L, L = FWH R OM

3 . 3V

R 3 7 0 R 3 71

R3 7 2

R 3 7 3 R 37 4

R 3 7 5 R 37 6

R 3 77
R 3 78
R 3 79
R 3 80
R 3 81
R 3 82
R 3 83

10 K _ 0 4
*1 0K _0 4
10 K _ 0 4
10 K _ 0 4
10 K _ 0 4
10 K _ 0 4
*1 0K _0 4

R 3 84
R 3 85

*2 . 2 K _0 4
2. 2 K _ 0 4

EM BE DDE D CT RL

PS2M _D AT/ G PI O 191
PS2M _C LK/ G PI O19 2

H U D S ON M1 A 1 3

STR AP PINS

S

2 7 , 2 9, 3 7 A C _I N #

D2 7
F28
F29
E2 7

D2 5
F 23
B 26
E 26
F 25
E 22
F 22
E 21

1 0 K _0 4

S DA3_ LV/ GP I O196
EC_P WM 0/E C_T IM E R0/ GP I O197

*1 0 K _0 4

R2 8 7
3 . 3V

SD A2/ GP I O194
SCL3_ LV/ GP I O195

AZ_S DI N1/ G PI O 168
AZ_S DI N2/ G PI O 169

10 K _ 0 4

3 .3 V

GB E _C OL
GB E _C R S

SC L2/ GP I O193

AZ_S DO UT
AZ_S DI N0/ G PI O 167

*1 0 K _ 0 4

T1
T4
L6
R 2 83
1 0 K _0 4 L 5
T9
U1
U3
T2
U2
T5
1 0 K _0 4
G B E _ RX E RR V 5
P5
M5
P9
T7
P7
M7
P4
M9
GB E _ P H Y _ I N T R
V7

10 K _ 0 4
10 K _ 0 4

AZ_B I TCLK

*1 0 K _ 0 4

R2 8 5
R2 8 6

3 3 _0 4
3 3 _0 4

M3
N1
L2
M2
M1
M4
N2
P2

* 1 0K _ 0 4

R 4 73
R 6 95

H DA _ S Y N C
H DA _ RS T #

3 3 _0 4
3 3 _0 4

1 0 K_ 0 4

R 4 70
R 4 69

*1 0 K _ 04

25
25

Closed to SB.

H D A _B I TC LK
H D A _S D OU T
H D A _S D I N 0
S B _ B L ON

HD AUD IO

*1 0 K _ 04

25
25
25
20

8/18

HUDSON GPIO/ USB/ STRAP B - 17

B.Schematic Diagrams

C4 7 1
1 u _6 . 3 V _ Y 5 V _ 0 4

P AR T 4O F 5

PCI _P ME #/G E VEN T4#

S

S W I # R7 3 0
R6 9 0

D

HUDSON-1

Schematic Diagrams

HUDSON SATA/ DEBUG IO/ SPI
HUDSON SATA/DEB UG IO/SPI
DEBUG ONLY
DNI R652 and R653 for customer board

HUDSON-1
24
24

SAT
ATXP0
SAT
ATXN0

24
24

SAT
ARXN0
SAT
ARXP0

24
24

SAT
ATXP1
SAT
ATXN1

24
24

SAT
ARXN1
SAT
ARXP1

AH9
AJ9
AJ8
AH8
AH10
AJ10
AG10
AF10

FC _C LK
FC _F BC LKO U T
FC _FB CLK I N

SA TA _RX 0N
SA TA _RX 0P

FC _O E#/ G P O
I D 145

SA TA _TX 1P

FC _AV D#/ G P IO D 146
F C_ WE#/ G P IO D 148

SA TA _TX 1N

F C_C E1#/ G P IO D 149
F C_C E2#/ G P IO D 150

SA TA _RX 1N

F C_ IN T1/ G P O
I D 144

SA TA _RX 1P

AG12
AF12
AJ12
AH12
AH14
AJ14

F C_ IN T2/ G P O
I D 147
GP IOD

SA TA _TX 2P

F C_A DQ 0/ G P O
I D 128

SA TA _TX 2N

F C_A DQ 1/ G P O
I D 129

SA TA _RX 2N
SA TA _RX 2P

F C_A DQ 3/ G P O
I D 131
F C_A DQ 4/ G P O
I D 132
F C_A DQ 5/ G P O
I D 133

SA TA _TX 3P

F C_A DQ 6/ G P O
I D 134

SA TA _TX 3N

AG14
AF14

SATAt race should use on
ly 1via o
n the
trace.
customers can use 2vias with GND via within 150mils of

AG17
AF17

signal via as lo
ng as they can ensure that their platfor m
me
et s SATAlogo requireme
nt s. Return loss is exp
ected
to get aff ected with 2 vias. AMD p
latf orms are valid
at e
d
with one via on
ly

AJ17
AH17

F C_A DQ 7/ G P O
I D 135
F C_A DQ 8/ G P O
I D 136

SA TA _RX 3N

F C_A DQ 9/ G P O
I D 137

SA TA _RX 3P

F C_A DQ 10/ G P IO D 138
F C_A DQ 11/ G P IO D 139

SA TA _TX 4P

F C_A DQ 12/ G P IO D 140

SA TA _TX 4N

F C_A DQ 13/ G P IO D 141
F C_A DQ 14/ G P IO D 142

SA TA _RX 4N

Debug port

NO
TE: RO
UT
ETEMP
_CO
MM
ASA10ML
I TRACE
PL
ACEQ
600 UNDERDIMM

F C_A DQ 15/ G P IO D 143

SA TA _RX 4P

AJ18
AH18
AH19
AJ19

S ER I AL AT A
SA TA _TX 5P
SA TA _TX 5N

FA NO UT 0/ G PI O 52
FA NO UT 1/ G PI O 53

SA TA _RX 5N

AVDD_SATA
1K_1%_04
931_1
%_
04

SATA_CALP
SATA_CALN

AB14
AA14

F AN IN 1/ G PI O 57
SA TA _CA LR P

T EM P IN 0/ G PI O 171
T EM P IN 1/ G PI O 172

AD11

SATA_LED#

W7
V9
W8

HUDSO
N_FANTACH0
HDD0_PWR
GPI O
58

B6
A6
A5
B5
C7

TEM
PIN0

ODD_PWR 24

3
.3
VS

*10K_04

F AN IN 2/ G PI O 58

SA TA _CA LR N

28

HUDSO
N_FANOUT0
ODD_PWR
SB_PRO
CHO
T#_C

R330

F AN IN 0/ G PI O 56

R331
R332

W5
W6
Y9

FA NO UT 2/ G PI O 54

SA TA _RX 5P

SA TA _AC T# /G P I O6 7

T EM P IN 2/ G PI O 173
TE MP I N3/ T ALE RT #/ G PI O 174

MB_THRMDA_SB

R798

R333

*0_0
4

R335

*0_0
4

SM
D_CPU_THERM 3,16, 27

10K_04

C

Sheet 17 of 41
HUDSON SATA/
DEBUG IO/ SPI

AJ2
7
AJ2
6
AH25
AH24
AG
23
AH23
AJ2
2
AG
21
AF21
AH22
AJ2
3
AF23
AJ2
4
AJ2
5
AG
25
AH26

F C_A DQ 2/ G P O
I D 130

SB_TALERT#
C486

B

C487

Q9
*2N3904

T EM P _C OM M

SA TA _X1

*10
K_04

V IN 1/ G PI O 176
V IN 2/ G PI O 177
V IN 3/ G PI O 178

V IN 6/ G BE _ST AT 3/ G PI O 181

AC16
SA TA _X2

SPI_DATAIN
J5
SPI_DATAOUT
E2
SPI_CLK
K4
SPI_CS#_SEL
K9
HUDSO
N_RO
M_RST# G2

VI N 7/ G BE _LED 3/ G PI O 182

A8B8B7

VN
I 4/ G PI O 179
V IN 5/ G PI O 180

SP I _DO / G PI O 163

NC

SP I _CLK / GP I O 162
SP I _CS 1#/ G PI O 165

*0_0
4

MB_THRMDC_SB

SM
C_CPU_THERM 3,16, 27

3.3VS

U2
0

R697
NC

*0_0
4

R337

3.3VS

S PI RO M
SP I _DI / G PI O 164

330p
_50V_X7R_04
330p_50V_
X7R_04
R336

E

VIN_VDDCR
VIN_VDDNB
VIN_VDDIO_SUS
R799
10K_0
4
R800
10K_0
4
R801
10K_0
4
R802
10K_0
4
R803
10K_0
4

10K_04

*74AHC1G08G
W
1

4

APU_TALERT# 3,27

2
GPU_TALERT# 8,10
3

R576

A3
B4
A4
C5
A7

V IN 0/ G PI O 175

AD16

5

H W M ON I TO R

3.3VS

YG27
2

B.Schematic Diagrams

PA RT 2O F 5

SA TA _TX 0P
SA TA _TX 0N

AH27
AF29
AE29
AF27
AG26
AG29
AF28
AF26
AG28
AH28

U19B

RO M _R ST #/ GP I O 161

HUDSO
N M1 A13
Co
nne
ctC7 a
ndD8,th
engotoGNDdirectly.

1.8VS

VIN_VDDCR

R340

*11K_1%_04

R341

*10K_04

VDDCR_CPU

3.3V
C488
R73
2

R342
10K_04
*0.1u_
16V_Y5V_04

*0_04

R346
R3
50

D22
A

R347

RB751
V
C

3 SB_PROCHOT#

*1K_04
*1
0K_0
4

*10K_04

SB_PROCHO
T#_C

U2
1

VIN_VDDNB

8
VDD

5

SPI _
DATAO
UT R573

0_04

2

SPI _
DATAIN

R386

0_04

1

SPI _
CS#_SEL R571

0_04

SPI _
CLK

0_04

SI
SO

C491
3
WP#

*0.1u_16V_Y5V_04

CE#
6
SCK

7
VSS

R572

C490

*4.99K_1%_04VDDCR_NB

R345

*4.99K_1%_04

R349
10K_04
*0.1u_
16V_Y5V_04

HSPI _
MSO 27
HSPI _
CE# 27
HSPI _
SCLK 27
1.5V
VIN_VDDI O
_SUS

R351

*25VF032
B
C492

R35
2
10K_04
*0.1u_16
V_Y5V_04

B - 18 HUDSON SATA/ DEBUG IO/ SPI

R344

HSPI _
MSI 27

4
HOLD#

1VS

NEAR U19

*10K_04

Schematic Diagrams

HUDSON POWER DECOUPLING
HUDSON POWER DECOUPLING
U 19 C

HUDSON-1

3 . 3V S

PAR T 3 OF 5

1 .1 V S

P O WER

1 3 1 mA
C4 9 4

C4 9 5

C 4 96

C 49 3

0. 1u _ 1 0V _ X 5 R _ 0 4
2 2u _ 6 . 3V _X 5 R _ 0 8
0 . 1 u _1 0 V _ X 5R _ 04
0 . 1u _ 1 0V _X 5 R _ 0 4

1. 8 V S
R3 5 5

0 _ 04

A H1
V6
Y1 9
AE5
AC2 1
AA2
AB4
A C8
AA7
AA9
AF7
AA1 9

V D D I O_ 1 8_ F C

U 19 D

V DDI O _33_PC I GP

VD DC R_11

V DDI O _33_PC I GP

VD DC R_11

V DDI O _33_PC I GP

VD DC R_11

V DDI O _33_PC I GP
V DDI O _33_PC I GP

VD DC R_11
VD DC R_11

V DDI O _33_PC I GP

VD DC R_11

V DDI O _33_PC I GP

VD DC R_11
C OR E S0

V DDI O _33_PC I GP

VD DC R_11

V DDI O _33_PC I GP

VD DC R_11

C5 0 4

C 5 06

CLK G EN I O
/

V DDI O _33_PC I GP
V DDI O _33_PC I GP

VD DA N_11_C LK
VD DA N_11_C LK
VD DA N_11_C LK

C 4 97
71m A

0 . 1 u _ 10 V _ X 5R _ 04
4 . 7 u _6 . 3 V _ X 5R _ 06
0 . 1u _ 1 0V _X 5 R _ 0 4
* 0 . 1u _ 1 0V _X 7 R _ 0 4

.

H C B 1 0 0 5K F -12 1 T 20

V D D P L _3 . 3 V _ P C I E
C 5 11

VD DA N_11_C LK
V DDI O _18_FC

VD DA N_11_C LK

V DDI O _18_FC

VD DA N_11_C LK

V DDI O _18_FC

VD DA N_11_C LK

VD DR F_G BE _S

V DDI O _33_G BE _S

PCI EX PRE SS

C 51 2

U2 6
V2 2
V2 6
V2 7
V2 8
V2 9
W22
W26

1 2/9
60 0 m A
C5 1 8

C 51 9

C5 2 0

PAR T 5 OF 5

C5 0 2

C 5 03

1u _ 6 . 3 V _X 5 R _ 0 4
10 u _ 6. 3 V _ X 5 R _ 0 8
0 . 1u _ 1 0V _ X 5 R _ 0 4
0 . 1 u_ 1 0 V _ X5 R _0 4
1 u _ 6. 3 V _ X 5 R _ 0 4

+1 . 1 V _ C K V D D
K 28
K 29
J28
K 26
J21
J20
K 21
J22

Y 14
Y 16
A B 16
A C 14
A E 12
A E 14
AF9
A F 11
A F 13
A F 16
A G8
A H7
A H 11
A H 13
A H 16
A J7
A J 11
A J 13
A J 16

1. 1 V S

T B Dm A

L85
C5 0 5

C5 0 7

C 50 8

C5 1 0

. H C B 1 0 0 5K F -12 1 T 2 0

C 49 8

0 . 1 u _1 0 V _ X 5R _ 04
1 u_ 6 . 3 V _ X5 R _0 4
2 2u _ 6 . 3V _ X 5 R _ 0 8
0. 1 u _ 10 V _ X 5 R _ 0 4
1 u _6 . 3 V _ X 5R _ 04

V 1

R3 5 6

M 10

0_ 0 4

A9
B 10
K 11
B9
D 10
D 12
D 14
D 17
E9
F9
F 12
F 14
F 16
C9
G 11
F 18
D9
H 12
H 14
H 16
H 18
J 11
J 19
K 12
K 14
K 16
K 18
H 19

R 7 7 1 * 10 m i _l s h ort

G BE L AN

1 .1 V S

C 51 7

C 50 1

V DDP L_33_PC I E

1 u _1 0 V _ Y 5 V _ 0 6
0 . 1u _ 1 0V _X 5 R _ 0 4

12 /6 D el R8 27

C5 0 0

V DDI O _18_FC

43m A
AE2 8

HUDSON-1
C4 9 9

C5 2 1

* 1 u_ 6 . 3 V _ X5 R _0 4 0. 1 u _ 10 V _ X 5 R _ 0 4
2 2u _ 6 . 3V _X 5 R _ 0 8 1 u _ 6. 3V _ X 5 R _ 0 4 0 . 1 u _1 0 V _ X 5R _ 04

V DDA N_11_P CI E

VD DC R_11_G BE _S

V DDA N_11_P CI E

VD DC R_11_G BE _S

L7
L9

R 77 2

* 10 m i _l s h ort

V DDA N_11_P CI E
V DDA N_11_P CI E
V DDA N_11_P CI E

V DD IO _G BE _S

V DDA N_11_P CI E
V DDA N_11_P CI E

V DD IO _G BE _S

M6
P 8

R 77 3

* 10 m i _l s h ort

V DDA N_11_P CI E

3. 3V S

L8 8

93m A
V D D P L _3 . 3 V _ S A T A

. H C B 10 0 5 K F -1 2 1T 2 0
C 5 27

A J2 0
AF 1 8
AH2 0
A G1 9
AE1 8
AD1 8
AE1 6

C 52 8

* 0 . 1u _ 1 0 V _X 7 R _ 0 4
1u _ 1 0V _ Y 5V _0 6

3 . 3V

3. 3V_S5 I / O
VD DI O _33_S
V DDA N_11_S AT A
V DDA N_11_S AT A

VD DI O _33_S
VD DI O _33_S

V DDA N_11_S AT A

VD DI O _33_S

V DDA N_11_S AT A

VD DI O _33_S

V DDA N_11_S AT A

VD DI O _33_S

V DDA N_11_S AT A

VD DI O _33_S

V DDA N_11_S AT A

VD DI O _33_S

A 21
D 21
B 21
K 10
L10
J9
T6
T8

32m A

C5 2 9

C 5 30

C5 3 1

1u _ 1 0V _ Y 5V _0 6
* 0. 1u _ 1 0V _ X 7 R _ 0 4
1u _ 1 0V _Y 5 V _0 6

1 . 1V

. H C B 1 0 05 K F -1 2 1 T2 0
C 5 33

C 5 34

C5 3 5

C5 3 6

1 u_ 6 . 3 V _ X5 R _0 4
0. 1 u _ 10 V _ X 5 R _ 0 4
2 2u _ 6 . 3V _X 5 R _ 0 8
1 u_ 6 . 3 V _ X5 R _0 4
0 . 1 u _1 0 V _ X5 R _0 4

3 .3 V

A V D D _U S B

. H C B 1 0 05 K F -1 2 1 T2 0

CO RE S 5

US B I /O

5 6 7m A
C 5 32

L 91

SE RI AL AT A
V DDP L_33_SA TA

A V D D _S A TA

1 . 1V S
L 89

AD1 4

6 5 8m A

A1 8
A1 9
A2 0
B1 8
B1 9
B2 0
C1 8
C2 0
D1 8
D1 9
D2 0
E1 9

C5 4 2
C 54 3
C 54 4
C5 4 5
C 5 46
0 . 1u _ 1 0V _ X 5 R _ 0 4 C 1 1
D1 1
1 u _ 6 . 3V _ X 5 R _ 0 4
10 u _ 6 . 3V _ X 5 R _ 0 8
1u _ 6 . 3 V _X 5 R _ 0 4
1 0u _ 6 . 3 V _X 5 R _ 0 8

VDD CR _11_S
V DDA N_33_U SB _S
V DDA N_33_U SB _S

VDD CR _11_S

V DDA N_33_U SB _S

V DDI O _AZ _S

F 26
G 26
M8

V DDA N_33_U SB _S
V DDA N_33_U SB _S

V DDC R_11_ USB _S

V DDA N_33_U SB _S

V DDC R_11_ USB _S

A 11
B 11

1 1 3m A

V D D C R _ 1. 1 V

R3 6 1

V D D I O_ A Z

C 53 7

1 9 7m A

VD DP L_33_SY S

V DDA N_33_U SB _S

P LL

V DDA N_33_U SB _S

VDD PL_11_ SYS _S

V DDA N_33_U SB _S
VDD PL_33_ USB _S

V DDA N_11_U SB _S

V DDA N_33_H WM _S

V DDA N_11_U SB _S
VD DX L_33_S

M 21

4 7m A

L22

62 m A

F 19

17 m A

D 6

5m A

L20

TB D m A

L90

V D D P L _1 . 1 V

C 53 9

A V D D_ U S B

. H C B 1 0 0 5K F -12 1 T 20

P 21
P 20
M 22
M 24
M 26
P 22
P 24
P 26
T 20
T 22
T 24
V 20
J 23

C 5 41

V D D A N _ 3. 3 V _ H W M

3 .3 V
L92
C5 4 7

. H C B 1 0 0 5K F -12 1 T 20

C 54 8

0. 1 u _ 10 V _ X 5 R _ 0 4
1 u_ 1 0 V _ Y 5 V _ 06

T B Dm A
L93

C5 4 0

. H C B 1 0 0 5K F -12 1 T 20

0 . 1u _ 1 0V _ X 5 R _ 0 4
10 u _ 6. 3 V _ X 5 R _ 0 8
0 . 1 u_ 1 0 V _ X5 R _0 4

V D D X L_ 3 . 3 V

HU DS O N M 1 A 1 3
1 .1 V

M 19

1 .1 V
V D D P L _ 3 . 3V

V DDA N_33_U SB _S

D8

1u _ 6 . 3V _ X 5 R _ 0 4
1 u _6 . 3 V _ X 5R _ 04

V D D C R _ 1. 1 _ U S B

VS S
VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _SA TA

VS S

V SSI O _US B

VS S
VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B
V SSI O _US B

VS S
VS S

V SSI O _US B

VS S

V SSI O _US B
V SSI O _US B

VS S
G R OU ND

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B
V SSI O _US B

VS S
VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S

V SSI O _US B

VS S
VS S

Y4

C5 3 8

T B Dm A

V DDA N_33_U SB _S
V DDA N_33_U SB _S

0 _0 4

V SSI O _SA TA
V SSI O _SA TA

VS S
VS S

E FUS E

A J2
A 28
A 2
E 5
D 23
E 25
E 6
F 24
N 15
R 13
R 17
T1 0
P 10
V 11
U 15
M 18
V 19
M 11
L12
L18
J7
P 3
V 4
A D6
A D4
A B7
A C9
V 8
W 9
W 10
A J2 8
B 29
U 4
Y 18
Y 10
Y 12
Y 11
A A 11
A A 12
G 4
J4
G 8
G 9
M 12
A F 25
H 7
A H2 9
V 10
P 6
N 4
L4
L8

Sheet 18 of 41
HUDSON POWER
DECOUPLING

VS S
V SSA N_H WM

V SSX L

V SS PL_SY S

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK

VS SI O_P CI EC LK

V SSI O _PC I ECLK
V SSI O _PC I ECLK

VS SI O_P CI EC LK
VS SI O_P CI EC LK
VS SI O_P CI EC LK

V D D A N _ 1. 1 V _ U S B

M 20

H 23
H 26
A A 21
A A 23
A B 23
A D2 3
A A 26
A C2 6
Y 20
W 21
W 20
A E 26
L21
K 20

H U D S ON M1 A 1 3
C 54 9

C5 5 0

0 . 1 u_ 1 0 V _ X5 R _0 4
1 u _ 10 V _ Y 5V _ 0 6

3. 3 V

V D D A N _ 3 . 3V _H W M

L94
3 .3 V S
3 . 3V

V D D P L _ 3. 3V

1. 1 V

V D D P L_ 1 . 1 V

V D DIO _ A Z

1 .5 V

C 5 51
L95

R 36 2

0 _0 4

. H C B 1 0 0 5K F -12 1 T 20

L96
C 5 53

R 36 3

. H C B 1 0 05 K F - 12 1 T 20

C 55 4

. H C B 1 0 0 5 K F -1 21 T 2 0

C 55 2

1 u _ 10 V _ Y 5V _ 0 6
0. 1 u _ 1 0V _ X 5 R _ 0 4
C5 5 5

C 5 56

*0 _ 0 4
C5 5 7

1 u _ 1 0V _ Y 5V _ 0 6
*0 . 1 u _ 10 V _ X 7R _ 04

1u _ 1 0V _Y 5 V _0 6
*0 . 1 u _1 0 V _ X 7R _ 04

1 u _ 10 V _ Y 5 V _ 0 6

HUDSON POWER DECOUPLING B - 19

B.Schematic Diagrams

3 . 3V S
L86

VD DA N_11_C LK

FLA SH I / O

AF 2 2
AE2 5
AF 2 4
AC2 2

51 0 m A

V DDI O _33_PC I GP

PC I/ G PI O I / O

C 50 9

N 13
R 15
N 17
U 13
U 17
V 12
V 18
W 12
W 18

Schematic Diagrams

POWERGOOD/ TPM
14

3 .3 V

6
5

S Y S _ R S T#

7

16

U2 2 B
7 4 LV C 0 8P W

4

33 1 . 1 V _ P W R G D

3 .3 V

3 5 P W R G D _ V C OR E

3 .3 V
3 .3 V

R 7 74

3 .3 V

3 2 , 35 D D R 1. 5 V _ P W R GD

R7 7 6

*0 _ 04

U2 2 C
74 L V C 0 8 P W

14

0_ 0 4

U 22 D
7 4 LV C 0 8P W

14

U2 2 A
7 4 LV C 0 8P W

R7 7 5

14

34 1 . 8 V _ P W R G D

9

12
11
3

10

7

7

7

1 6 , 2 6, 27 , 3 0 S U S B #

*1 0 K _ 04

3 .3 V S

15

R 8 14
R 8 16
R 8 17
R 8 15

*0 _ 0 4 2 6
*0 _ 0 4 2 3
*0 _ 0 4 2 0
*0 _ 0 4 1 7

R 8 18
R 8 19
R 8 20

*0 _ 0 4 2 2
*0 _ 0 4 1 6
*0 _ 0 4 2 7
15

U 50
L A D0
L A D1
L A D2
L A D3

21

P C L K _T P M
LP C _ F R A M E #
B U F _ P L T _R S T #
S E RIR Q
P C I _ C LK R U N #

L CL K

V DD 1
V DD 2
V DD 3

S 4 _ S T A TE #

T P M_ P P

10
19
24

9
7

3 .3 VS

C8 8 0

G PIO
GP I O 2

6
2

*0 . 1 u _1 6 V _ Y 5 V _ 04
T P M3 0 04
T P M3 0 05

13

XTAL I

14

XTAL O

X T A LI
XT A L O
N C_ 1
N C_ 2
N C_ 3
TESTI

GN D _ 1
GN D _ 2
GN D _ 3
GN D _ 4

4
11
18
25

* S L B 96 3 5 TT

Ass er ted befo re entering S3
LPC reset t iming:
LPCP D# inac tive to LRST# inact ive 32~96us
HI: ACCESS
L OW: NORMAL ( Int ernal PD)
HI: 4E/ 4F H
TPM_BADD L OW: 2E/ 2F H
TPM_PP

B - 20 POWERGOOD/ TPM

C 87 9

*0 . 1 u _1 6 V _ Y 5 V _ 04
*0 . 1 u_ 1 6 V _Y 5 V _0 4
*0 . 1 u _1 6 V _ Y 5 V _ 04
* 1u _ 1 6V _ X 5 R _ 06

PP

8

C8 7 8

VSB

T E S T B I/B A D D

T P M3 0 0 1 1
T P M3 0 0 2 3
T P M3 0 0 3 1 2

C 8 77

5

L P CP D #
T P M_ B A D D

C8 7 6

TPM

L F RA M E #
L R E S E T#
S E R IRQ
C LK R U N #

28
16

S Y S _P W R OK

R3 6 7

TPM 1.2

15 , 2 7
1 5 , 23 , 2 4 , 26 , 2 7
15 , 2 7
15

S B _ P W RO K

0 _0 4

1 u_ 6 . 3 V _Y 5 V _0 4

Sheet 19 of 41
POWERGOOD/
TPM
L P C_ A D0
L P C_ A D1
L P C_ A D2
L P C_ A D3

0 _0 4

R3 6 5
C 84 1

ON

1 5 ,2 7
1 5 ,2 7
1 5 ,2 7
1 5 ,2 7

R3 6 4

13

2

B.Schematic Diagrams

10 K _ 0 4

8

1

P C L K _ TP M

R 8 21

X 12
4
3

* 3 2. 7 6 8 K H z
1
2

X 13
4
3

* 3 2. 7 6 8 K H z
1
2

C 8 81

C8 8 2

*1 8p _ 5 0V _ N P O_ 0 4

*1 8 p_ 5 0 V _N P O_ 0 4

*3 3 _ 04

C 8 83

3 .3 V S
T P M_ P P

R 8 22

*1 0 K _ 04

T P M_ B A D D

R 8 23

*1 0 K _ 04

R 8 24

*1 0 K _ 04

*1 0 p_ 5 0 V _0 4

S B _ P W R GD

16

A L L _ S Y S _ P W R GD 2 0 , 2 7

Schematic Diagrams

LVDS, INVERTER
3 .3 VS

R577, R578 W250BAQ Delete
R5 7 7
R5 7 8

J_LC D1 For single channel
J_LC D2 For dual channe l

2. 2 K _ 0 4
2. 2 K _ 0 4

EDID Mode

V IN_ L CD
J _ LC D 1

8 0mi ls

R
R
R
R
R
R

1
3
5
7
9
11
13
L V D S -L C LK N 15
L V D S -L C LK P 17
19
L V D S -L 1 N 21
L V D S -L 1 P
23
25
L V D S -L 0 N 27
29
L V D S -L 0 P

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

V IN_ L CD
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

LV D S _ D A T A
LV D S _ C L K
B RIG HT NE S S

J_ L C D 2

12/ 7

B R I GH TN E S S 2 7

I N V _ B L ON

3 .3 V

R L V D S -L2 N
R L V D S -L2 P

D2 3
C
B RIG HT N E S S

AC

3. 3 V S

R L V D S -LC L K N
R L V D S -LC L K P

C 5 66
* 0 . 1u _ 1 6V _ Y 5V _ 0 4

A

R L V D S -L1 N
R L V D S -L1 P

*B A V 99 R E C T I F I E R

R L V D S -L0 N
R L V D S -L0 P

C5 6 1

87 2 1 6-3 0 0 6
P LV D D
C 5 63

4. 7 u _ 6. 3 V _ X 5 R _ 06

0. 1 u _ 16 V _ Y 5 V _ 0 4

7
7
7
7

T X CL K _ UN
TX C LK _ U P
T X OU T_ U 1N
TX O U T _U 1 P

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

LV D S _ D A T A
LV D S _ C L K

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

B RIG HT NE S S
I N V _ B L ON
R L V D S -L 2 N
R L V D S -L 2 P

3 .3 VS
PL VD D

2A

T XO U T _ U 2 N 7
T XO U T _ U 2 P 7
T XO U T _ U 0 N 7
T XO U T _ U 0 P 7

* 87 2 1 6-4 0 0 6

Sheet 20 of 41
LVDS, INVERTER

12 /7

PANEL POWER

3. 3 V S

8
7
6
5

3. 3 V

3A

C 56 5

4

2G

D

5G

Q 45 A
*M TD N 7 0 02 Z H S 6 R

1

S

Q 49
M T N 7 0 02 Z H S 3

E N A V DD

D

S
Q4 5 B
*MT D N 7 0 02 Z H S 6R

4

G

6

D

1108

3

*2 00 _ 1 %_ 0 4

*0 . 1 u _5 0 V _ Y 5 V _ 0 6

0 . 1u _ 1 6V _ Y 5V _ 0 4

S

Default UMA

*0 . 0 1u _ 1 6V _ X 7 R _ 0 4
U2 4
4
5

R 2 28
*1 0 K _0 4

C1 8

C 56 4
P L V DD

R2 3 8
1 M_ 0 4

C5 6 0

3
2
1

Q 46
P 20 0 3 E V G

2A
C 5 59

.

R5 8 6

V IN_ L CD

L1
*0 _ 0 6

0 . 1 u _5 0 V _ Y 5 V _0 6

V IN

0 . 01 u _ 50 V _ X 7 R _ 0 4

VIN

3 NB _ E N A V DD

R 69 8

7 V GA _D I GO N

R 69 9

E N A V DD

0 _ 04
*0 _ 0 4

1
VIN
VIN

V OU T

EN

G ND

3

R3 8 7
1 00 K _ 0 4

2A
R LV D S -L 0 N

R LV D S -L 0 P

R LV D S -L 1 N

W250BAQ R698 Off, R699 On

R LV D S -L 1 P

R LV D S -L 2 P

*1 0 mi l _ sh o rt _ 04

INVERTER CONNECTOR

B K L _ E N_ R

R 38 9

C5 6 7

3 .3 V

1

U 2 5A
7 4 L VC0 8 PW
3

R 7 00

0_04

R 7 01

* 0_ 0 4

R LV D S -L C L K N

R LV D S -L C L K P

Z 12 0 1

U2 5 B
74 L V C 0 8 P W

* 0 _0 4

T X OU T _ L 0N

R 6 04

0_04

L V D S -L 0 P

R 6 05

* 0 _0 4

T X OU T _ L 0P

R 6 06

0_04

L V D S -L 1 N

R 6 07

* 0 _0 4

T X OU T _ L 1N

R 6 08

0_04

L V D S -L 1 P

R 6 09

* 0 _0 4

T X OU T _ L 1P

R 6 10

0_04

L V D S -L 2 N

R 6 11

* 0 _0 4

T X OU T _ L 2N

R 6 12

0_04

L V D S -L 2 P

R 6 13

* 0 _0 4

T X OU T _ L 2P

R 6 14

0_04

LV D S -L C L K N

R 6 15

* 0 _0 4

TX C L K _ L N

R 6 16

0_04

LV D S -L C L K P

R 6 17

* 0 _0 4

TX C L K _ L P

R 6 18

0_04

LV D S _ D D C _ D A T A

R 6 19

* 0 _0 4

S DA

R 6 20

0_04

LV D S _ D D C _ C L K

6

R 39 0

L V D S _D A T A

*0 . 1 u _1 6 V _ Y 5 V _ 04

L V D S _C L K
14

1 0 0K _0 4
16

S B _ B LO N

Z 1 20 2

U2 5 C
7 4 LV C 0 8P W

9

3 .3 V

R 6 21

* 0 _0 4

S CL

7

L V D S -L 0 P 3
T XO U T _ L 0P 7
L V D S -L 1 N 3
T XO U T _ L 1N

7

L V D S -L 1 P 3
T XO U T _ L 1P 7
L V D S -L 2 N 3
T XO U T _ L 2N

7

L V D S -L 2 P 3
T XO U T _ L 2P 7
L V D S -L C LK N
T XC L K _L N

3

7

L V D S -L C LK P

3

T XC L K _L P 7

8

L V D S _ D D C _ D A TA
SDA

3

8

L V D S _ D D C _ C LK 3
SCL

8

I N V _B LO N

12
16 , 2 7 , 29 L I D _S W #

U2 5 D
74 L V C 0 8 P W
11

13

7

Z 1 20 3 10

* 10 0 K _ 0 4
14

R3 9 1

T XO U T _ L 0N

4

2
5

R 3 92

C5 6 9

* 1 M_ 0 4

0 . 1u _ 1 6V _ Y 5V _ 0 4

1 9 , 27 A L L _ S Y S _ P W R GD
7

W250BAQ R700 Off , R701 On

L V D S -L 0 N 3

C5 6 8

7

B L ON
GP I O 7_ B L O N

3. 3 V

7

3
8

R 6 03

*0 . 4 7u _ 10 V _ Y 5V _ 0 4
14

* 10 0 K _ 04

3 . 3V

14

R3 8 8

L V D S -L 0 N

A P L 3 5 12 A

R LV D S -L 2 N

B K L_ E N

0_04

2

G5243A 6-02-05243-9C0
APL3512A 6-02-03512-9C0

27

R 6 02

LVDS, INVERTER B - 21

B.Schematic Diagrams

0 . 1u _ 1 6V _ Y 5V _0 4
C5 6 2

G1
G 2

12/7

Gn d 1
G nd 2

PANEL CONNECTOR

Schematic Diagrams

HDMI/ CRT
HDMI PORT

5V S _H D MI

C

A

A

J_ H D MI 1

R E S E R VE D
12

3

3 . 3V S

*0_ 04

8

TMD S _T X2 P

R 6 62

*0_ 04

R 6 25

0_ 04

R 6 26

*0_ 04

R 6 27

0_ 04

R 6 28

*0_ 04

3

D AC _ R E D

R 6 29

0_ 04

8

R _D A C 1

R 6 30

*0_ 04

3

D A C _GR E E N

R 6 31

0_ 04

8

G_D A C 1

R 6 32

*0_ 04

3

D AC _ B LU E

R 6 33

0_ 04

8

B_ D A C 1
D A C _H S Y N C

8, 1 0 H S Y N C _D A C 1
3

D A C _V S Y N C

*0_ 04

R 6 36

0_ 04

R 6 35

*0_ 04

R 6 37

0_ 04

R 6 38

*0_ 04

R 6 39

0_ 04

D D C 6D A TA

R 6 40

*0_ 04

3 D A C _D D C A C LK

R 6 41

0_ 04

R 6 42

*0_ 04

8, 1 0 V SY N C _ D A C 1
3 D A C _D D C A D A TA
8

8

B - 22 HDMI/ CRT

R 6 34

D D C 6C L K

R 4 12

R 41 3

R 4 14

1 50 _1% _0 4
1 50 _1 %_0 4
15 0_ 1%_ 04

H D MI _S C L

9

24
10 m il

3
11
4
12
5

5 VS

RN1
2. 2K _ 8P 4R _ 04

R D AC _ R E D

R D AC _ GR E EN

R D AC _ B LU E

R D AC _ D D C A D A TA

10

R D AC _ D D C A C LK

11

R D A C _H S Y N C

13

R D A C _V S Y N C

15

R D AC _ H S Y N C
1

5V S
R D AC _ V SY N C

R 4 00

*L VA R 04 02 -24 0E 0R 0 5P -LF

9

D D C _ IN 1

D D C _ OU T1

D D C _ IN 2

D D C _ OU T2

S Y N C _I N 1

SY N C _ OU T1

S Y N C _I N 2

SY N C _ OU T2

V C C _S Y N C

VI D E O_1

V C C _V I D E O

VI D E O_2

V C C _D D C

VI D E O_3

7

R D AC _ D D C A D AT A

8

D D C D AT A

12

2

3 . 3V S
3. 3V S

R D AC _ D D C A C LK

U 27

BYP
TP D 7S 01 9

GN D

D D C LK

14

C R T_H SY N C

R 4 15

33 _04

H SY N C

16

C R T_V S Y N C

R 4 16

33 _04

VS Y N C

3

BL U E

4

GR N

5

R ED

6

I P47 72C Z16 6- 02-4 772 1-B 60
T PD7 S01 9 6-0 2-07 019 -B2 0

HS Y NC

14

V S YNC

7
15
8

3. 3 VS

H D MI _S D A

D D C D A TA

13

6

DDCL K
C 58 8 10 00 p_5 0V _ X7 R _0 4

R 6 76

R H D MI B_ C LK B N

GR N
B LU E

220 p_ 50 V_ N P O_0 4

0_ 04

J_ C R T1
10 8A H 15 F ST 04 A1 C C
1
2

F C M10 05MF -6 00T 01
F C M10 05MF -6 00T 01
F C M10 05MF -6 00T 01

C 5 87 2 20 p_5 0V _N PO_ 04

*0_ 04

R 6 75

L 10 4
L 10 3
L 10 5

C 586

R 6 74

R H D MI B_ C LK B P

FC M 100 5MF -60 0T 01
FC M 100 5MF -60 0T 01
FC M 100 5MF -60 0T 01

C 58 5 10 00 p_ 50 V_ X7 R _0 4

0_ 04

RE D
L 137
L 139
L 138

GN D 1
GN D 2

R 6 72

6-20-14X30-015

R D A C _R E D
R D A C _GR E E N
R D A C _B LU E

10 p_ 50V _ N PO_ 04

3 H D MI B _C L KB P

CRT PORT

R H D MI B_ D 0B N

C 58 4

*0_ 04

1 0p _5 0V _N P O_0 4

TMD S _T X0 N

R 6 73

R H D MI B_ D 0B P

10 p_ 50 V_ N P O_0 4

0_ 04

C 5 83

*0_ 04

R 6 71

C 5 82

R 6 70

H D MI B_ D 0B N

R H D MI B_ D 1B N

22p _5 0V _N P O_ 04

TMD S _T X0 P

3

*0 . 1u_ 16 V _Y 5V _ 04

22 p_ 50 V_ N P O_04

8

C 5 78

0. 1 u_ 16 V_ Y 5V _0 4

C 86 7

0_ 04

2 2p _50 V _N P O_0 4

R 6 69

C 57 7

C 86 6

H D MI B_ D 0B P

C 8 65

*0_ 04

3

10p _5 0V _N P O_ 04

0_ 04

R 6 68

3

2 H D MI B _D A T A2 N

L1 02

R H D MI B_ D 1B P

10 p_ 50 V_ N PO _04

*0_ 04

R 6 67

TMD S _T X1 N

D D C 1D A TA

1

4
3 H D MI B_ D AT A 2P
*H D MI2 01 2F 2S F -90 0T 04-s ho rt

C 581

R 6 66

H D MI B_ D 1B N

8

8

1

2 H D MI B _D A T A0 N

3. 3 VS

1 0p _50 V _N P O_0 4

TMD S _T X1 P

3

D D C 1C L K

3

C 1 28 17 -1 19 A5 -L

H D MI B _E XT 1_ SD A

C 58 0

8

8

TMD S D AT A 2-

S H I E LD 2
TM D S D A TA 2 +

R H D MI B_ D 2B N

C 5 79

H D MI B_ D 1B P

3 H D MI _D D C _ D A TA

SH I E L D 1
T MD S D A T A1 +

2

1
2
3
4

3

0_ 04

3 H D MI _ D D C _C L K

4

8
7
6
5

*0_ 04

R 6 65

TMD S _T XC N

5

L1 00

4
3 H D MI B_ D AT A 0P
*H D MI 2 01 2F 2S F -90 0T0 4-s ho rt

TM D S D A TA 0 +
T MD S D A T A1 -

R H D MI B_ D 2B P

0. 2 2u _10 V _Y 5V _0 4

0_ 04

R 6 64

8

7

S H I E LD 0

6

2. 2K _ 04

D

C 5 91

R 6 63

TMD S _T X2 N

TMD S _T XC P

Q2 8

0 . 22 u_1 0V _ Y5 V_ 04

H D MI B_ D 2B N

8

1

*0_ 04

8

3 H D MI B _C L KB N

TMD S D AT A 0-

8

FO R EM I

H D MI _ C EC

9

MT N 70 02 ZH S 3

3

8

Default UMA

0_ 04

T MD S C L OC K +

R 660

S

C 58 9

Default UMA

5V S

R 65 9
4. 7 K _04
H D MI _S D A

R 6 61

1
2
*H D MI 2 012 F 2S F -9 00 T0 4-sh ort

3 . 3V S
R 721

H D MI B_ D 2B P

H D MIB _ D AT A 1P

H D MI B _E XT 1_ SC L

H D MI B _E X T1 _S C L

13
11

R 40 7

R 65 7
*2 00 K _04
R 6 58
10 K _04

3

2. 2K _ 04

D
MT N 70 02 ZH S 3

H D M IB _ EX T1 _H P D

2N 3 90 4

0_ 04

R 72 0
*1 00K _ 04

Q2 6

S

3

L10 1

C L K S H I E LD

R 4 06

20 0K _0 4

4

R 40 4

R5 5

C 590

R 7 19

P OR TC _ H P D

B

H D MIB _ D AT A 1N

0. 2 2u_ 10 V_ Y 5V _0 4

3

4. 7 K _04
H D MI _ SC L

Q27

*0_ 04

G

R 7 18

HPD1

C

W250BAQ Del R719, Add R718
8

R 656

R 4 05

3 .3 V S

Sheet 21 of 41
HDMI/ CRT

G

R 65 5

H D MI B _E X T1 _H P D

*L VA R 04 02 -24 0E 0R 0 5P -LF

R 39 5
5V S

* LV A R 040 2-2 40 E0 R 05 P-L F

3 . 3V S
3 . 3V S

E

B.Schematic Diagrams

CLOSE TO HD MI CO NN.

CEC

T MD S C L OC K -

10

* LV A R 040 2-2 40 E0 R 05 P-L F

L99

1
2
*H D MI 2 012 F 2S F -9 00 T0 4-sh ort

19
17
15

S CL

*LV A R 04 02 -2 40 E0 R 05 P -L F

49 9_ 1%_ 04

49 9_ 1% _04

4 99 _1 %_0 4

4

H D MIB _ C LOC K P

R 65 4

R 65 3

R 6 52

49 9_ 1%_ 04

49 9_ 1% _04

4 99 _1 %_0 4
R 651

R 65 0

H D MIB _ C LOC K N

D D C / C E C GN D
S DA

FO R EM I
H D MI B _E XT 1_ SC L
H D MI B _E XT 1_ SD A
H D MI B _E XT 1_ H PD

+ 5V

16
14

D

MT N 70 02 ZH S 3

R 64 9

499 _1 %_ 04

R 6 48

R 647

G

H OT P L U G D ET E C T

18
H D MI B _E XT 1_ SD A

R 39 8

2 2u_ 6. 3 V_ X5 R _0 8

*LV A R 04 02 -2 40 E0 R 05 P -L F

C 5 71

1 0u_ 10 V_ Y 5V _ 08

.
.
.

S

3 . 3V S

Q2 5

5 V S_ H D MI

C 5 70

H D MI B_ C LOC K P
H D MI B_ C LOC K N
4 99 _1 %_0 4

C 83 5 0. 1u _1 0V _X 7R _ 04
C 83 6 0. 1u _1 0V _X 7R _ 04

1 _04

2. 2 K_ 04
2. 2 K_ 04

.
.
.

R H D MI B _ C LK BP
R H D MI B _ C LK BN

R 579
R 580

R 3 97

H D MI B_ D A TA 0P
H D MI B_ D A TA 0N

R 3 93
5V S _H D MI

*L VA R 0 40 2-24 0E 0R 0 5P -LF

C 83 3 0. 1u _1 0V _X 7R _ 04
C 83 4 0. 1u _1 0V _X 7R _ 04

5V S

*L VA R 0 40 2-24 0E 0R 0 5P -LF

R H D MI B _ D 0B P
R H D MI B _ D 0B N

L9 8
1_ 04

For ESD

AC

H D MI B_ D A TA 1P
H D MI B_ D A TA 1N

A

C

H D MI B_ D A TA 2P
H D MI B_ D A TA 2N

C 83 1 0. 1u _1 0V _X 7R _ 04
C 83 2 0. 1u _1 0V _X 7R _ 04

AC

C 82 9 0. 1u _1 0V _X 7R _ 04
C 83 0 0. 1u _1 0V _X 7R _ 04

R H D MI B _ D 1B P
R H D MI B _ D 1B N

AC

R H D MI B _ D 2B P
R H D MI B _ D 2B N

C

RD2
* BA V 99 R EC T I FI E R R D 3
* BA V 99 R EC T I FI E R
RD1
* BA V 99 R EC T I FI E R

Schematic Diagrams

CCD/ 3G
MINI CARD 3G(Port 6)
Layo ut Sh ow "3.5G( HSDPA)" Note

Layout?
1. SIM? ? ? ? ? ? ? ? (10mil)
2. ? ? ? ? ? ? ? ? GND
3. SIM hold ? ? ? ? ? GND? ?
4. SIM CONN ? ? MINI CARD
CONN

3 G_ 3 . 3 V
J _3 G 1
1
3
5

W AKE#
C O E X1
C O E X2

7
11
13
9
15

CL K RE Q #
R E F C LK R E F C LK +
GN D 0
GN D 1

60 mils

2
6
8
10
12
14
16

3 .3 V A UX _ 0
1. 5 V _ 0
U I M_ P W R
U I M _D A T A
U I M _C L K
U I M _R E S E T
U I M _V P P

U
U
U
U
U

I M_ P W R
I M_ D A T A
I M_ C L K
I M_ R S T
I M_ V P P

C5 9 2

+C 5 9 3

C5 9 4
0. 1u _ 16 V _ Y 5 V _ 0 4

2 20 u _ 4V _ V _ B

0 . 1u _ 1 6V _ Y 5V _ 0 4

4
GN D 5

KEY
21
27
29
27

GN D 2
GN D 3
GN D 4

3 G_ 3 . 3 V

C5 9 8

C5 9 9

0 . 1u _ 1 6V _ Y 5V _ 0 4

1 0u _ 1 0V _ Y 5V _ 0 8

GN D 1 1
P E T n0
P E T p0
P E Rn 0
P E Rp 0

17
19
37
39
41
43
45
47
49
51

R e s erv e d 0
R e s erv e d 1
GN D 1 2
3. 3 V A U X_ 3
3. 3 V A U X_ 4
GN D 1 3
R e s erv e d 2
R e s erv e d 3
R e s erv e d 4
R e s erv e d 5

SIM CONN

20
22
30
32
36
38

W _D I S A B L E #
P E RS E T #
S M B _C L K
S M B _D A T A
USB_ D U S B _D +

3 G _E N

L106
2

*W C M2 0 12 F 2 S -1 61 T 0 3-s h o rt
1
USB_ P N 9 1 6

3

24
28
48
52
42
44
46

3 .3 V A UX _ 1
1. 5 V _ 1
1. 5 V _ 2
3 .3 V A UX _ 2
L E D_ W W A N #
LE D _ W LA N #
L E D_ W P A N #

R 42 0

27

R 41 9

4

*1 5 m li _ sh o rt _ 06

USB_ P P9

J _ S I M1

16

3 G_ 3 . 3 V
3G _ 3. 3 V

C3
C2
C1

UIM _ RS T
UIM _ P W R

U I M_ C L K
U I M_ R S T
U I M_ P W R

C6 0 5

0 . 1 u_ 1 6 V _Y 5 V _0 4

U I M_ D A T A
U I M_ V P P
U I M_ GN D

D avid 8/25
R 4 22
*1 0m i l _s h or t _0 4
C 7
C 6
C 5

O PEN

*2 2 p _5 0 V _ N P O_ 0 4

C6 0 0
+ C 6 01

C 1 77 0 6 61 -1
S I ML OC K

*0 . 1 u _1 6 V _ Y 5 V _ 04

8 89 1 0 -52 0 4 M-0 1

LO CK
(T OP VI EW )

R4 2 1
*1 0 mi l _s h o rt _0 4
U I M _C LK

C 86 8

60 mil s

*4 . 7K _0 4

UIM _ DA T A
UIM _ V P P

C 6 02

C6 0 3

C 60 4

*2 2p _ 5 0V _ N P O_ 0 4

*2 2 p_ 5 0V _N P O_ 0 4

* 22 p _ 50 V _ N P O _0 4

Sheet 22 of 41
CCD/ 3G

22 0 u _4 V _ V _ B

AO3409? ? ?

AO3409( 90mohm) C hange
to AO3 415(45moh m).

3G POWER

CCD
5V

Q 10
MT P 3 4 03 N 3
S
D

3 . 3 V _ 3G

MJ_CCD1
C 6 10

C6 1 1
C8 4 6

3A 120mils

D

G

Q 32
A O3 41 5
S

3A 120mils

R 4 23

C 61 2

C 6 13

C 6 14

10 0 K _ 04

* 1u _ 6 . 3V _ Y 5V _ 0 4

0 . 1 u _1 6 V _ Y 5 V _ 04

1u _ 6. 3 V _ Y 5 V _ 0 4

1

1 u _ 6. 3 V _ Y 5 V _ 0 4
0 . 1 u _1 6 V _ Y 5 V _ 04

C 8 57

5

R4 2 4

1 u_ 6 . 3 V _Y 5 V _0 4
C5 9 6

C 5 95

1u _ 6 . 3V _ Y 5V _ 0 4

1 00 K _ 0 4

1 0u _ 10 V _ Y 5 V _ 0 8

0. 1 u _1 6 V _ Y 5 V _ 04

J _ CCD 1

2 7 3G _ P OW E R

27

1 0 0K _ 0 4

2 G

From SB GPI O P in de fa ul t HI
Pow e r Pla ne : Suspe nd
S3 : Def ine d

D
Q3 3 A
S R T 3 K 4 4M

5 G

D

C C D _E N

3 3 0K _ 0 4

Q1 1
MT N 7 0 0 2Z H S 3

G

C CD_ E N

S

1 0 _ 06
3

R7 9 3

R 7 92

2 0K _ 1 % _0 4

D

R4 2 6
R7 9 1

From H8 default HI

16
US B _ P N5
16
U S B _P P 5
2 7 C C D _D E T #

CC D_ DE T #

1
2
3
4
5
8 5 20 5 -0 50 0 1

Q 3 3B
S R T 3K 4 4 M
4

0 _ 06

G

R7 9 0

5V _ C C D

48 mil

3G _3 . 3 V

6

3 .3 V

*0 _ 0 6

1

3 .3 V S

R7 8 9

ADDR128,Q2
So lut ion F or
PDA
BUG- Wh en
Bat te ry
dis charge to
sh utd ow n,
th e CMOS
so me time s
los s.

1A
U4 7
4
5

1
V IN
V IN

V O UT

C C D _E N 3

1A
2

EN

GN D
*G 52 4 3 A

CCD/ 3G B - 23

B.Schematic Diagrams

35
23
25
31
33

3G _ D E T #

18
26
34
40
50

GN D 6
GN D 7
GN D 8
GN D 9
GN D 1 0

Schematic Diagrams

Card Reader/ LAN JMC261C
3 . 3 V _L A N

JMC261 C

S D_ CL K
S D _ CL K

R 44 0

* 1 0p _ 50 V _ N P O_ 0 4

3 . 3V S

S wit ch in g Reg ul at or
c los e to P IN3 3

0_04

near Pin#41

C 6 43

3 . 3 V _ LA N

(> 20m il )

*4 . 7 K _0 4

DV D D

S D_ CD #

R4 4 4

1 K_ 0 4

SD _ W P

* 0 . 1u _ 1 6V _ Y 5V _ 0 4

M DIO 1 1
LA N _ LE D 0
L A N_ L E D1
I S ON

C 6 46
C 64 7
2 . 2 u _6 . 3 V _ X5 R _0 6

U3 0
C R _ C D 1N R 5 8 3

* 0_ 0 4

MS _ I N S #

0 _ 04
M DIO 1 0
M DIO 9
M DIO 8
L A N _M D I P 0
L A N _M D I N 0

DVD D

3 . 3 V _L A N

L A N _M D I P 2
L A N _M D I N 2
A V D D 12 _ 62
L A N _M D I P 3
L A N _M D I N 3

DV D D

C8 0 4
10 u _ 10 V _ Y 5 V _ 0 8
Pin#59

PC Ie D iff er en ti al
Pa ir s = 1 00 O hm

need to close to chip

M D I O 10
M DIO 9
M DIO 8
VD D
V I P _1
VIN _ 1
AV DD1 2
V I P _2
VIN _ 2
G ND
AV DD3 3
V I P _3
VIN _ 3
AV DD1 2
V I P _4
VIN _ 4

JMC261 C
( LQFP 64)

R EXT
A V D D 33
X IN
X OU T
C LK N
CL K P
A VD D1 2
RXP
RX N
G ND
T XN
T XP
A VD D1 2
M D I O1 3
M DIO 7
C R_ CD 1 N

Sheet 23 of 41
Card Reader/ LAN
JMC261C

L A N _M D I P 1
L A N _M D I N 1

49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

JM C 2 6 1 C

V DD 3

VD DREG
VC C3 V
P W RCR
TEST
MP D
W AKEN
L AN_ L E D2
C R _ LE D
R S TN
CP P E N
GN D
V DDIO
MD I O6
M D I O1 2
M D I O1 4
C R _ C D 0N

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

1 0 u _1 0 V _ Y 5 V _ 08
Pin#33

L A NXIN

X8

*0 _ 0 4

J M C _ 2 5M _I N 1 5

0 _0 6

*0 _ 06

Ra

D VDD

27 p _ 50 V _ N P O _ 04

DV D D

DVD D

C8 0 7

VF B

GN D

G ND

C 8 54

5

1
OU T

I N

R4 4 7

R 5 81

*0 _ 0 6

S HD N#

1 . 6 9K _ 1 % _0 4

0_06
3. 3 V S V D D 3

SET

GN D

3

V D D_ IN
MP D

2

10 K _ 0 4

R 58 9

*4 . 7 K _0 4

1 u_ 6 . 3 V _ Y 5 V _ 04

2 . 7 K _1 % _ 04

(>2 0m il )

C6 4 9

0 . 1 u_ 1 6 V _ Y 5 V _ 04

R6 7 7

* 0_ 0 4

B U F _P LT _ R S T #

(> 20m il )

C6 5 0

R 8 26

C6 5 1

C 65 2

C 8 17

1 0 u_ 1 0 V _Y 5 V _0 8
Pin#31

0. 1 u _ 16 V _ Y 5 V _ 0 4
Pin#31

R8 2 5
1 0u _ 1 0V _Y 5V _0 8 0 . 1u _ 1 6V _ Y 5V _ 0 4
Pin#32
Pin#32

V DD 3 3 .3 V

*0 _ 0 4

R 72 9

*0 _ 06

R 44 1

*0 _ 06

R 44 3

0_ 0 4

R 43 8

*1 0 K _0 4

3 . 3V _ L A N
JM _D 3 MO D E

JM _ D 3 MO D E 1 6

need to close to chip

Q7 9
M TN 7 00 2 Z H S 3

G

D VDD

IS O N

0. 1 u _ 10 V _ X 7R _ 04
0. 1 u _ 10 V _ X 7R _ 04

P C I E _ R X P 0 _ JM C 1 5
P C I E _ R X N 0_ J MC 15
P C I E _T X N 0 _ JM C 1 5
P C I E _T X P 0 _J MC 1 5
C L K _P C I E _ J MC 15
C LK _ P C I E _ JM C # 1 5

P CIE _ W A K E#

16 , 2 4 , 26 P C I E _ W A K E #

C 8 10

A

3. 3 V _ L A N
C

R5 8 2

4 IN 1 SOCKET SD/MMC/MS/MS Pro

Card Reader
Power

J _C A R D -R E V 1
S D_ CD #
S D_ D2
S D_ D3
SD_ BS

1 0 K _ 04
V C C_ CA R D

V CC _ CA RD

R B 7 5 1V
C 8 39

M LM X 0-_ R

4

M LM X 0+ _ R

1

0_04

DV DD

R6 4 5

3
M L MX 0 *W C M2 0 12 F 2 S -1 6 1T 0 3
2
M L MX 0 +

ML MX 1 -_ R

4

ML MX 1 + _R

1

L 13 1
R6 4 4
0 _0 4

0_04

C 80 3

10 u _1 0 V _ Y 5 V _ 0 8

3
ML M X1 *W C M2 0 12 F 2 S -1 6 1T 0 3
2
ML M X1 +

L 13 2
R6 4 6

0_04

7
8
4
5

10/21
L A N _M D I P 1
C 8 18

0 . 1 u _1 6 V _ Y 5 V _ 04
Pin#59

0 . 1 u_ 1 6 V _Y 5 V _0 4
Pin#2

0 . 1 u _1 6 V _ Y 5 V _ 04
Pin#21

L A N _M D I N 1
R D_ CT
T D_ C T
R4 5 0
*0 _ 04
C 48 9

C 61 9
*0 . 0 1 u_ 1 6 V _ X 7R _ 04

C 80 5

1
2
3
6

T D+
T D-

TX+
T X-

N C
N C

NC
NC

R D+
R D-

RX +
R X-

R D_ CT
T D_ C T
P 30 1 2

C 6 20

C 81 5

0 . 1 u_ 1 6 V _ Y 5 V _ 04
* 0. 1 u _ 16 V _ Y 5 V _ 0 4

R X _C T
T X _C T

10
9

ML M X0 + _ R
ML M X0 -_ R

16
15
14
11

ML MX 0 +
ML MX 0 ML MX 1 +
ML MX 1 -

1
2
3
6

D C _N P

4
5
7
8

ML M X1 + _ R
ML M X1 -_ R
RX _ CT
T X_ CT

D D _N P
R3 3 4

1 0 0 0p _ 2 K V _X 7 R _ 1 2 _H 1 25

R7 3 6
*7 5_ 1 % _0 4

J _R J1

12
13

R3 4 8

R 2 69

R 3 43
75 _ 1% _ 0 4

L A N _M D I P 0
L A N _M D I N 0

C 81 4

C 82 1

L36

75 _ 1 %_ 0 4

0 . 1 u _1 6 V _ Y 5 V _ 04
Pin#13

75 _ 1 %_ 0 4

0. 1 u _ 16 V _ Y 5 V _ 0 4
Pin#7

75 _ 1 %_ 0 4

C 8 13

C 80 6

0 . 1 u_ 1 6 V _ Y 5 V _ 04
* 0. 1 u _ 16 V _ Y 5 V _ 0 4

V C C_ CA R D
C 8 08

3 . 3 V _ LA N

B - 24 Card Reader/ LAN JMC261C

R 44 5

C6 4 8

R5 8 5

S D_ CL K

Pla ce all cap acito rs clo sed t o ch ip.
The su bscript in eac h CAP incica tes t he p in
nu mber of JMC251/JMC261 t hat shou ld b e
clo sed t o.

*A T 2 4C 0 2B N

V D D3

3. 3 V S

D V DD

3 .3 V_ L AN

* 0. 1 u _ 10 V _ X 7R _ 04
Pin#43

1
2
3

U4 3

1.2 V

3 . 3 V _ LA N

for D3E C991022

C 81 1
C 81 9

R6 4 3

C 81 2

A0
A1
A2

G9141
APL5603-12B(no R201,R198)

LA N _ P C I E _ W A K E #

0 . 1 u _1 6 V _ Y 5 V _ 0 4
Pin#43

WP

S CL
S DA

4

LA N _ S D A
3 . 3V

Vout=0.8(1+Ra/Rb).
AP L5603-12B Change AX6610.

*A P L 5 6 03 -1 2 B I -T R G

Rb

VD DR EG

0 . 1u _ 1 6V _Y 5V _0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 * 10 u _ 6. 3V _ X 5 R _ 06
Pin#52
Pin#55
Pin#62
Pin#35
Pin#7
Reserved

C 8 20

7
V CC

S

DVD D

D VDD

U 31
8
6
5

need to cl ose to chip

need to cl ose to chip

C8 1 6

*4 . 7 K _ 04

LA N _ S C L
1

S D _ CD#

D4 5
C8 0 9

R4 4 6

V D D_ IN

V D D3
3 . 3 V _ LA N

C8 0 1

27 p _ 50 V _ N P O_ 04

R4 3 7
* 4 . 7K _ 0 4

8

2

L A N _ P C I E _W A K E # 2 7

B U F _P L T _ R S T # 15 , 1 9 , 2 4, 2 6 , 2 7

SE E DAT

F S X5 L _ 25 MH Z
C 8 02

5
9
7

R4 4 2

( >2 0m il)

3 . 3V

6- 22- 25 R0 0-1 B4
6- 22- 25 R0 0-1 B5

1

VO UT

4

SD _ W P

VIN
VIN
P OK

VO UT

EN

D VDD

( >2 0m il)

M PD
R 82 8
0_04
L A N _S C L
L A N _S D A
B U F _ P LT _ R S T #
S EE DA T

VC NT L

A X 6 6 10

R4 3 4

12 K _ 1 %_ 0 4

D VDD

2

R6 0 1

3

D

* 1M _ 04

DV D D

8 2 p _5 0 V _ N P O _0 4

R5 8 4

3 .3 VS
V C C_ CA R D

M D I O 13
M D I O7
CR _ CD1 N

LA N X I N
L A N X OU T

L A N X OU T
R4 3 5

R4 3 2

4

for AX6610 , Ra( 1. 69K_1% ) ,
Rb( 2.7K_1% )

1 0K _ 0 4

10/28 Modify value

6

1 u_ 1 0 V _Y 5 V _0 6

0. 1 u _ 16 V _ Y 5 V _ 0 4
Pin#33

3 . 3V

V D DR E G

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

DVD D

0 . 0 1u _ 1 6V _ X 7 R _0 4

B.Schematic Diagrams

MD I O1 3 R 5 8 8

C8 5 2

C6 4 5

C8 5 3

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

Card Reader Pull High/Low
Resistors

C 6 44

Fo r J MC 25 1/2 61 o nl y
R E GL X

VCC _ CA R D

S D _B S
S D_ D3
S D _D 2
S D_ D1
S D_ D 0

S D X C _ P OW E R

S D X C _ P OW E R

M S_ INS#

MD I O1 1
L A N_ L E D0
LA N _ LE D 1
IS O N
GN D
V D DIO
V DDO
M DIO 5
M D I O4
M DIO 3
M D I O2
M DIO 1
M D I O0
FB1 2
G ND
LX

1 K_ 0 4

U 49

(> 20m il )

*S W F 2 52 0 C F -4 R 7 M -M
R 4 33

DV DD

DVDD

.

R4 3 6

L6 2 NC da vid 8 /25

L62

REG L X

3 . 3V _L A N

5V

LDO t ype ? J MC26 1C ,

DA+
DADB+
DB-

s h ei l d
s h ei l d

GN D 1
GN D 2

DC+
DCDD+
DDP J S -0 8S L 3 B

W240BU 6-21-B4000-008
W250BUQ 6-21-B4040-008

D a v di 8 / 2 7

S D_ D0
S D_ D1
SD_ W P

S D_ CL K
S D_ D3
MS _ I N S #
S D_ D2
S D_ D0
S D_ D1
SD_ BS

P1
P2
P3
P4
P5
P6
P7
P8
P9
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5
P1 6
P1 7
P1 8
P1 9
P2 0
P2 1

CD_ S D
D A T 2 _S D
C D / D A T 3_ S D
C MD _ S D
VSS_ SD
V D D _S D
CL K _ S D
VSS_ SD
D A T 0 _S D
D A T 1 _S D
W P_ SD
V S S _ MS
V C C _M S
S C L K _ MS
D A T 3 _M S
I N S _ MS
D A T 2 _M S
S D I O / D A T 0 _M S
D A T 1 _M S
B S _M S
V S S _ MS
MD R 0 1 9-C 0 -10 4 2

Fo r JM C2 51 C
3 . 3 V _ LA N
C 8 00
*0 . 1u _ 1 6V _Y 5V _0 4
Pin#2

C 79 9
*1 0 u_ 1 0 V _ Y 5 V _ 08
Pin#2

G ND
G ND

P 22
P 23

Schematic Diagrams

MINI PCIE/ SATA HDD/ ODD
MINI CARD (WLAN,Port 5)
20 mil

3 .3 V
C 84 7

Layo ut Sho w "WLAN( Wimax, 802. 11N) "Not e

0 . 1 u _1 6 V _ Y 5 V _ 04
J_ M I N I 1
P CIE _ W A K E #

1 6, 2 3 , 2 6 P C I E _ W A K E #
R 4 51

3 .3 VS

R5 0 9

*0 _ 0 4

1 0 K _ 04
W LA N _ C L K R E Q #

1 6 W L A N _ C L K R E Q#
15 C LK _ P C I E _ W LA N #
15 C LK _P C I E _ W L A N

1
3
5
7
11
13
9
15

W AKE#
C OE X 1
C OE X 2
C
R
R
G
G

3 . 3 V A U X_ 0
1. 5 V _ 0
U I M_ P W R
U I M _D A T A
UIM _ CL K
U I M _R E S E T
UIM _ V P P

L K RE Q #
E F C LK E F C LK +
ND 0
ND 1

GN D 5

2
6
8
10
12
14
16

20 mil
R4 5 2

*0 _ 04
R4 9 6
R7 2 2
R5 0 8

V D D3
B T_ ON
8 0 CL K

0 _0 4
1 00 K _ 0 4
0 _0 4

1 5 , 28
27

3 IN 1

4

KEY

27
W LA N _ D E T #
1 5 P C IE _ RX N3 _ W L A N
1 5 P C I E _R X P 3_ W L A N
1 5 P C I E _ T XN 3_ W L A N
1 5 P C I E _T X P 3 _ W LA N

27 , 2 8
27

B T _E N
3 IN1

3I N 1

R4 5 4

*0 _0 4

R7 3 8

*0 _0 4

V D D3
3 .3 V
1 5, 2 8
2 7, 2 8

B T_ ON
B T _E N

R 7 23
R 7 24

*1 0 m li _ sh o rt
*1 0 m li _ sh o rt

R 4 55

*1 0 K _ 04

3. 3 V

R4 9 4
R4 5 6
R4 5 7
R4 5 8

* 1 0K _ 0 4
* 1 0K _ 0 4
* 0 _0 4
0 _0 4

35
23
25
31
33
17
19
37
39
41
43
45
47
49
51

G ND 2
G ND 3
G ND 4
G
P
P
P
P

GN D 6
GN D 7
GN D 8
GN D 9
GN D 1 0

ND 1 1
E Tn 0
E Tp 0
ERn 0
ERp 0

W _D I S A B L E #
P E RS E T #
S M B _ CL K
S M B _D A T A
U S B _D U SB _ D+

R e se rv e d 0
R e se rv e d 1
G ND 1 2
3 . 3 V A U X_ 3
3 . 3 V A U X_ 4
G ND 1 3
R e se rv e d 2
R e se rv e d 3
R e se rv e d 4
R e se rv e d 5

3 . 3 V A U X_ 1
1. 5 V _ 1
1. 5 V _ 2
3 . 3 V A U X_ 2
L ED_ W W AN#
LE D _ W L A N #
L E D _W P A N #

18
26
34
40
50

R4 5 3
*1 0 K _0 4

20
22
30
32
36
38
24
28
48
52
42
44
46

3 .3 V S

W L AN_ E N 2 7 ,2 8
B U F _ P L T _R S T # 1 5 , 1 9, 23 , 2 6 , 27

B U F _P L T _ R S T #

R 72 5
R 72 6
3. 3 V A U X _1

20 mil

20 mil

B T _D E T # 2 7 , 2 8
US B _ P N 2 1 6
US B _ P P 2 1 6

* 10 m i l_ s ho rt
* 10 m i l_ s ho rt
R7 2 7

0 _ 04

Port 2

3. 3 V

3 .3 V
W LA N _ LE D # 27 , 2 8

R7 3 9

*0 _0 4

8 0 CL K

27

Sheet 24 of 41
MINI PCIE/ SATA
HDD/ ODD

B E L LW E TH E R 8 0 0 03 -1 0 21

SATA ODD

SATA HDD
J _ HD D1

J _ OD D 1
S A TA _ T X P 0
S A TA _ T X N 0

C6 5 3
C6 5 4

0 . 0 1 u_ 1 6 V _ X7 R _ 0 4
0 . 0 1 u_ 1 6 V _ X7 R _ 0 4

S A TA _ R XN 0
S A TA _ R XP 0

C6 5 5
C6 5 8

0 . 0 1 u_ 1 6 V _ X7 R _ 0 4
0 . 0 1 u_ 1 6 V _ X7 R _ 0 4

S A TA T X P 0 1 7
S A TA T X N 0 1 7
S A TA R X N 0 1 7
S A TA R X P 0 17

3 . 3V S

C6 6 1
C6 6 2
*0 . 0 1 u_ 1 6 V _ X7 R _ 0 4
5V S

*1 0 u _1 0 V _ Y 5 V _ 08

P1
P2
P3
P4
P5
P6

S A T A _ TX P 1 C 65 6
S A T A _ TX N 1 C 65 7

0. 0 1 u _1 6 V _ X7 R _0 4
0. 0 1 u _1 6 V _ X7 R _0 4

S A T A _ R X N 1 C 65 9
S A T A _ R X P 1 C 66 0

0. 0 1 u _1 6 V _ X7 R _0 4
0. 0 1 u _1 6 V _ X7 R _0 4

R7 0 5

0_ 0 4

S A T A RX N1 1 7
S A T A R X P 1 17

OD D _ D E T E C T#

O D D _ D E TE C T # 16

3 .3 VS

OD D _ 5 V
R 70 6

S A T A TX P 1 1 7
S A T A TX N 1 1 7

*1 0 K _0 4

C 1 8 5 53 -1 1 30 5 -L
P IN G ND 1 ~ 2 = G ND

*M TN 70 0 2 Z H S 3

Q 7

S

OD D _ 5 V
R7 0 2

D

0 _ 06
Q3 0

O D D _D A # _F C H 1 6

S

C8 4 5

A L L T O P -C 1 6 6 N 5 -1 2 2 0 5 -L

D

C 67 0

C6 7 6

C6 7 5

C6 7 4

C6 7 3

C6 7 2

*1 00 0 p _5 0 V _ X7 R _0 4
C6 7 1

17

OD D _ P W R

R7 0 7

R 70 4
*1 0 K _0 4
Q 31
* MT N 7 0 02 Z H S 3

* 1K _0 4 G
S

W240BU 6-20-43730-122
W250BUQ 6-20-43750-022

D
* A O3 4 0 9

R 70 3
* 1M _ 04

+

G

2 2 0u _ 6 . 3V _ 6 . 6 *5 . 7

22 u _ 6. 3 V _ X 5 R _ 0 8

1 u_ 6 . 3 V _Y 5V _ 0 4

2 2u _ 6. 3V _ X 5 R _ 0 8

A L L T OP -C 16 6 N 5 -1 2 20 5 -L

0 . 1u _ 1 6V _Y 5 V _ 0 4

H D D _N C 1
H D D _N C 2
H D D _N C 3

0 . 1 u_ 1 6V _Y 5 V _ 0 4

5V S
H D D _N C 0

0 . 1 u_ 1 6 V _Y 5 V _ 0 4

P1
P2
P3
P4
P5
P6
P7
P8
P9
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5

S1
S2
S3
S4
S5
S6
S7

G

S1
S2
S3
S4
S5
S6
S7

5 VS

OD D _ 5 V
C 6 77

C 6 78

C 67 9

0. 0 1 u _1 6 V _ X7 R _0 4

0 . 0 1 u_ 1 6 V _X 7 R _ 0 4

0 . 0 1u _ 1 6V _X 7 R _ 0 4

12 /6 Re se rve
C6 6 3
*0 . 1 u _1 6 V _ Y 5 V _ 04

C 66 4
0 . 1 u _1 6 V _ Y 5 V _ 04

C6 6 5
0. 1 u _ 16 V _ Y 5 V _ 0 4

C6 6 6
1 u_ 6 . 3 V _ Y 5 V _ 04

C 66 7

C 66 8

1 0 u _1 0 V _ Y 5 V _ 08

+

C6 6 9
* 22 0 u _6 . 3 V _ 6. 6 * 5. 7
*0 . 1 u _1 6 V _ Y 5 V _ 04

MINI PCIE/ SATA HDD/ ODD B - 25

B.Schematic Diagrams

21
27
29

Schematic Diagrams

AUDIO CODEC ALC261C
.
t
n
e
n
o
p
m
o
C
8
5

AUDIO CODEC
ALC269 VB
VT1802P

P V D D1 _ 2

R4 6 0

1. 5V S

C 6 80
1 0 u _1 0 V _ Y 5 V _ 0 8
R4 6 1

3 .3 V S _ A UD

3 . 3V S

AZ_ RST# For 3 .3 V
HDA Li nk D e- pop

C 68 1
0 . 1 u_ 1 6 V _ Y 5 V _ 04

EM I Requ ire
L 1 091

2

*H C B 1 0 05 K F -1 2 1 T2 0

DV D D_ IO
A UDG

*1 0 m il _ s ho rt

VT1802P
L75,C718 ? ? ?
C6 8 2
1 0 u_ 1 0 V _Y 5 V _ 08

PD# Cont rol

Lay out note :
GN D a nd AUDG spa c e is
60 mil s ~ 100 mi ls

0 _ 06

* 0 _0 4

For 3. 3V HDA Li nk.

C6 8 3
0 . 1 u _1 6 V _ Y 5 V _ 04

C 68 4
* 1 0u _ 1 0V _ Y 5V _ 0 8

C6 8 5
*0 . 1 u _1 6 V _ Y 5 V _ 0 4

AN ALOG

DIG ITAL

5 V S _A U D

L 11 0
3. 3 V S _ A U D
H C B 1 0 0 5K F -12 1 T 2 0
1
2

L 11 1
H C B 1 0 0 5K F -12 1 T 20
1
2

J P1

*1 0 mi l _ sh o rt

J P2

*1 0 mi l _ sh o rt

C 68 6

0. 1u _ 1 6V _ Y 5V _ 0 4

C 68 7

0. 1u _ 1 6V _ Y 5V _ 0 4

5 VS

C6 8 8

C6 8 9

C 69 0

C 6 91

C6 9 2

C6 9 3

C 69 4

C6 9 5

0 . 1u _ 1 6V _Y 5 V _0 4

10 u _ 10 V _ Y 5 V _ 0 8

0 . 1 u _1 6 V _ Y 5 V _ 04

0 . 1 u _ 16 V _ Y 5 V _ 0 4

1 0 u_ 1 0 V _Y 5 V _ 08

0. 1 u _ 16 V _ Y 5V _ 0 4

1 0 u _1 0 V _ Y 5 V _ 08

1 u_ 6 . 3 V _ Y 5 V _ 04

5 VS
A UDG

R4 6 6

* 10 0 K _ 04

S

P le a se Le t LC Filt e r
t oge t he r a nd c lose t o
C ode c. IF S pe a k er
w i re le ngt h is le ss
t han 80 00m ils It don't
ne e d the LC Filt e r.

Q 12
*B S S 1 3 8 _N L

40
41

S P K O UT L +
S P K O UT L S P K O UT RS P K O UT R+

44
45

EAPD
S P DI F O

47
48

C O D E C _ GP I O 02
C O D E C _ GP I O 13

25
38

9

M I C 2 -L
MI C 2 -R

S P K -R S P K -R +

J DR EF
M ON O-O U T

GP I O0 -D M I C -D A T
GP I O1 -D M I C -C L K

ANALOG

S D A TA - OU T

M I C 1 -L
MI C 1 -R
L I N E 1 -L
L I N E 1 -R

6

B E E P _C

R4 7 8

C7 0 9

4. 7 K _ 0 4

10 0 p _5 0 V _ N P O _ 04

MI C 1 -V R E F O -L

4 7 K_ 0 4

FOR VOLUMN
ADJUST

A VSS1
AVSS2

1u _ 6 . 3V _Y 5 V _0 4
R 4 77

42
43

K B C_ B EE P
H D A _S P K R

PC BEEP

31

C7 0 6

R E S E T#

G ND

D 28
B A T 5 4 CW G H
A
C 3 BEEP
2 A
1

27

12

B E E P _R

PC BEEP
16

11

H D A _ R S T#

26
37

H D A _R S T #

LD O_ C A P
M I C 1 -V R E F O-R
MI C 2- V R E F O

S Y NC

49

16

S D A TA - I N
10

DV S S 2

H DA _ SY NC

8

A Z _S D I N 0 _ R

PVSS1
PV SS2

H D A _S D I N 0

16

2 2 _0 4

S E N S E _A

R4 6 3

2 0 K _ 1% _ 0 4

14
15

LI N E 2 _ L
LI N E 2 _ R

R4 6 4

3 9 . 2 K _1 % _ 04 H P _S E N S E

16
17

MI C 2_ L
MI C 2_ R

C6 9 6
C6 9 7

18

S E N S E _B

19
20

JD R E F
MO N O _O U T

R4 6 8
C6 9 9

2 0 K _ 1% _ 0 4
* 10 0 p _5 0 V _ N P O _ 04

21
22

MI C 1_ L _ C
MI C 1_ R _C

C7 0 0
C7 0 1

4 . 7 u _6 . 3 V _ X5 R _0 6
4 . 7 u _6 . 3 V _ X5 R _0 6

MI C _ S E N S E

H P -O U T -L
H P -OU T -R

4 . 7 u _6 . 3 V _ X5 R _0 6
4 . 7 u _6 . 3 V _ X5 R _0 6

M IC_ S E N S E 2 9

23
24

LI N E 1 _ L
LI N E 1 _ R

C7 0 3

0 . 1 u _1 6 V _ Y 5 V _ 04

C O D E C _V R E F

C7 0 4

2 . 2 u _6 . 3 V _ X5 R _0 6

28
30
29

LD O_ C A P
MI C 1- V R E F O -R
MI C 2- V R E F O

32
33

HE A D P HO NE - L
HE A D P HO NE - R

35

C O D E C _C B N

36
34

C O D E C _C B P

VT1802P
C7 0 5

I N T _ MI C

R 4 67

C7 0 7
A LC 2 69 Q -V B 6 -GR

2. 2 u _ 6. 3 V _ X 5 R _ 0 6

6 8 0p _ 5 0V _X 7 R _ 0 4

A UD G

MI C 1-L

R4 7 2

1K _ 0 4

M I C 1 -L _ M

MI C 1-R

R4 7 4

1K _ 0 4

M I C 1 -R _M

M I C 1 -V R E F O-R R 4 7 5

2. 2 K _ 0 4

M I C 1 -V R E F O-L R 4 7 6

2. 2 K _ 0 4

VT1802P 4.7K_1%_04
C 7 08
2 . 2 u _6 . 3 V _ X5 R _0 6
S P K OU T R +

SP K O UT R+ 2 9

A U DG
S P K OU T R -

SP K O UT R- 2 9

M I C 1 -V R E F O-L

The rm al Pa d pl ac e 9
Vi a hole .
3 .3V S_AUD
S P K O UT L +

5VS
20ms

AZ_ RST#
PD#

B - 26 AUDIO CODEC ALC261C

C 7 10

C7 1 1

* 1u _ 1 0V _Y 5 V _0 6

*1 8 0 p_ 5 0 V _N P O_ 0 4

C2 3 6
C2 4 6

*1 8 0 p_ 5 0 V _ N P O _0 4
*1 8 0 p_ 5 0 V _ N P O _0 4

A UD G
J _ SPK1

S P K OU TL -

J_SPK1

S P K OU TL -_ L
* F C M 16 0 8 K -1 21 T 0 6_ s h ort
L 1 13

C7 1 2
*1 8 0 p_ 5 0 V _N P O_ 0 4

2

Spea k er wi re le ngth l es s tha n 8 00 0mi ls , It don't ne ed LC Fil te r.
SPKO UTR+, R-, L+, L- Tra ce wi dth
Spea k er 4 ohm- --- -- > 40 mil s
Spea k er 8 ohm- --- -- > 20 mil s

Re serve 9/8

L 1 12
* F C M 16 0 8 K -1 21 T 0 6_ s h ort
S P K O U T L + _L

1

EMI Require

J_ S P K L 1
1
2

SP K O UT R+
SP K O UT R-

1
2
8 8 2 66 -0 2 00 1
P C B F oo t p ri nt = 8 8 2 66 -2 L

VT1802P 75_1%_04

NC PIN

1 2/6
A U DG

I N T _ MI C _ OU T
C 69 8

A UDG

CBN
C BP
OP V E E

1 K _ 04

VT1802P
330P

10u

H E A D P H ON E -L 29
H E A D P H ON E -R 2 9

1

4 . 7 K _ 04
J _ INT M IC1

1 0 u_ 1 0 V _ Y 5 V _ 08

VT1802P

2
R 46 5

VT1802P
2.2K_04

HP _ S E N S E 2 9

VT1802P 5.1K_1%_04

27
VR EF

7

16

B I T -C L K
R 4 71

13

S en s e -B
S PD IF C2 /E A PD
S PD IF O

DIGITAL

J_INTMIC1

MI C 2- V R E F O

L I N E 2 -L
L I N E 2 -R

5

22 p _ 50 V _ N P O _ 04

1 6 H DA _ B IT CL K

A UD G

S en s e A

S P K -L +
S P K -L -

1 6 H DA _ S DO UT
C 7 02

A U DG

A VD D1
A V DD 2

P VD D1
P V DD 2

1
DVD D1

D V D D -I O

PD #
Q 13
* MT N 7 0 0 2Z H S 3

G

H D A _ R S T #G

AZ_RST# For 1. 5V
HDA Link De -pop

4

P D#

D

Sheet 25 of 41
AUDIO CODEC
ALC261C

5V S

U 32

1 0 K _ 04

D

H D A _ R S T#
2 7 K B C _M U T E #

39
46

R 4 62
D3 3
B A T 54 A W G H
1 A
C 3
2 A

S

B.Schematic Diagrams

5 VS
R 45 9

For 1 .5 V H DA Link .

L136
L135

S P K OU T L+ _ L
S P K OU T L-_ L
* F C M 1 60 8 K -1 21 T 0 6 _s h o rt
* F C M 1 60 8 K -1 21 T 0 6 _s h o rt

S P K OU T R +_ R
S P K OU T R -_R

4
3
2
1
* 85 2 0 4-0 4 0 01

8 5 20 4 -0 20 0 1
P C B F o o t p rin t = 8 5 20 4 -0 2R

PN: 6-20- 43130- 104
C2 3 7
C2 3 9
A UD G

*1 8 0 p_ 5 0 V _ N P O _0 4
*1 8 0 p_ 5 0 V _ N P O _0 4

MI C 1 -L M

29

MI C 1-R M 2 9

Schematic Diagrams

USB 3.0 VL800

USB 3.0 VL800 B - 27

B.Schematic Diagrams

Sheet 26 of 41
USB 3.0 VL800

Schematic Diagrams

KBC- ITE IT8518
KB C _ AV DD

*1 5 m li _ sh o rt _ 06

C7 4 1

C7 4 2

C7 4 3

C 74 4

0. 1 u _ 16 V _ Y 5 V _ 0 4

1 0u _ 10 V _ Y 5 V _ 0 8

0 . 1u _ 1 6V _ Y 5V _ 0 4 0 . 1 u_ 1 6V _Y 5V _ 0 4

V DD3

L 1 17
H C B 1 0 05 K F -1 2 1T 2 0

U 37
8

.

R 50 1

V DD3

C 74 7

V DD 3

VD D

C8 5 6

C7 4 5

C 7 46

0. 1 u _ 16 V _ Y 5 V _ 0 4

*0 . 1 u_ 1 6 V _Y 5 V _0 4

* 0 . 1u _ 1 6V _ Y 5 V _ 0 4

SI
SO
CE #
SC K

0 . 1 u_ 1 6 V _Y 5 V _0 4
K B C _ F LA S H

3

5
2
1
6

VD D3

K B C _S P I _S I _ R
K B C _S P I _S O _ R
K B C _S P I _C E # _R
K B C _S P I _S C L K _R

R 50 2

W P#

1 0 0K _0 4

C 74 8
L 11 8
H C B 1 00 5 K F -1 21 T 2 0

0 . 1 u_ 1 6 V _Y 5 V _0 4
EC_ VCC

1 5 , 19 , 2 3 , 24 , 2 6 B U F _ P L T_ R S T#
15

E C_ RS T #

R7 8 5

*0 _0 4

R7 8 6

0_ 0 4

( S MI # )
( S CI# )

E C _ S MI #
E C_ S CI#

29

23
15

M E _W E #
C PU_ F A N
( W EB1 # )
V G A _F A N

C P U _F A N
2 9 W E B _E MA I L #
C8 5 5
0 . 1u _ 1 6V _ Y 5V _ 0 4

BA T _ DE T
B A T _ V OL T
( APKEY# )

37
B A T _ DET
37
B A T _ V OL T
29
A P _K E Y #
2 TH E R M _V OL T

L A N _ P C I E _W A K E #
3 G_ D E T#
C C D _ D E T#
M OD E L_ I D

2 3 L A N_ P CIE _ W A K E #
22
22

3 G_ D E T #
CCD _ DE T #

37
S MC _B A T
37
S MD _B A T
1 0 S MC _ V GA _ T H E R M
1 0 S MD _ V GA _ T H E R M
3, 1 6 , 1 7 S M C _ C P U _ TH E R M
3, 1 6 , 1 7 S M D _ C P U _ TH E R M

R 70 8
R 70 9
R 52 3

H _P E C I

25

Pin87 3 IN1 mult i
f un ctio n pin

L C D _ B R I GH TN E S S
K BC_ BE E P( B E EP )
K B C_ B E E P
28 L E D _ S C R OL L #
28
L E D _N U M #
28
L E D _C A P #
2 8 LE D _ B A T _C H G
2 8 L ED_ BA T _ F UL L
28
L E D_ P W R
24

2 4, 2 8
24

3 IN1

B T_ D E T #

S MC _ B A T
S MD _ B A T
S MC _ V GA _ T H E R M
S MD _ V GA _ T H E R M
0_04
0_04
* 0 _0 4

R 7 87

8 0 CL K

80 C L K
1 K_ 0 4

2 9 W E B _W W W #
29
T P _ CL K
29
T P_ DAT A
22

8 0 D E T # ( 80 P O R T _D E T # )
( W EB2 # )

PJ 0
PJ 1
A C 2 / GP J 2
A C 3 / GP J 3
A C 4 / GP J 4
A C 5 / GP J 5

3

74
VBAT

IT8518

AD
AD
AD
AD
AD
AD
AD
AD

C 0 / GP I
C 1 / GP I
C 2 / GP I
C 3 / GP I
C 4 / GP I
C 5 / GP I
C 6 / GP I
C 7 / GP I

0
1
2
3
4
5
6
7

F L F R A M E # / GP G 2
F L AD0 /S C E #
F L A D1 /S I
F L A D2 /SO
F LA D 3 / GP G 6
F LC L K / S C K
( P D )F L R S T# / W U I 7/ G P G0 / T M

GPIO

SMBUS

1 10
1 11
1 15
1 16
1 17
1 18

SM
SM
SM
SM
SM
SM

( P D )K S O1 6 / GP C 3
( P D )K S O1 7 / GP C 5

C L K 0 / GP B 3
D A T 0 / GP B 4
C L K 1 / GP C 1
D A T 1 / GP C 2
C L K 2 / GP F 6 ( P U )
D A T 2 / GP F 7 ( P U )

(
(
(
(
(
(
(
(

PWM

24
25
28
29
30
31
32
34

PW M
PW M
PW M
PW M
PW M
PW M
PW M
PW M

0 / GP A 0 (
1 / GP A 1 (
2 / GP A 2 (
3 / GP A 3 (
4 / GP A 4 (
5 / GP A 5 (
6 / GP A 6 (
7 / GP A 7 (

PU
PU
PU
PU
PU
PU
PU
PU

)
)
)
)
)
)
)
)

PS2 C
PS2 D
PS2 C
PS2 D
PS2 C
PS2 D

LK 0 / G
A T0 / G
LK 1 / G
A T1 / G
LK 2 / G
A T2 / G

P F 0(
P F 1(
P F 2(
P F 3(
P F 4(
P F 5(

)G
)G
)G
)G
)G
)G
)G
)G

P H0 /ID
P H1 /ID
P H2 /ID
P H3 /ID
P H4 /ID
P H5 /ID
P H6 /ID
P G1 / I D

0
1
2
3
4
5
6
7

( P D )E GA D / GP E 1
( P D )E G C S # / GP E 2
( P D )E G C L K / GP E 3

K B -S I 0
K B -S I 1
K B -S I 2
K B -S I 3
K B -S I 4
K B -S I 5
K B -S I 6
K B -S I 7

4
5
6
8
11
12
14
15

KB
KB
KB
KB
KB
KB
KB
KB

-S I 0
-S I 1
-S I 2
-S I 3
-S I 4
-S I 5
-S I 6
-S I 7

4
5
6
8
11
12
14
15

36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55

K B -S O0
K B -S O1
K B -S O2
K B -S O3
K B -S O4
K B -S O5
K B -S O6
K B -S O7
K B -S O8
K B -S O9
K B -S O1 0
K B -S O1 1
K B -S O1 2
K B -S O1 3
K B -S O1 4
K B -S O1 5

1
2
3
7
9
10
13
16
17
18
19
20
21
22
23
24

KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB

-S O0
-S O1
-S O2
-S O3
-S O4
-S O5
-S O6
-S O7
-S O8
-S O9
-S O1 0
-S O1 1
-S O1 2
-S O1 3
-S O1 4
-S O1 5

1
2
3
7
9
10
13
16
17
18
19
20
21
22
23
24

PU
PU
PU
PU
PU
PU

( P D )W U I 5 / GP E 5
( P D )L P C P D # / W U I 6 / GP E 6

)
)
)
)
)
)

( P D )T A C H 0 / GP D 6
( P D )T A C H 1 / GP D 7
( P D )T MR I 0/ W U I 2 / GP C 4
( P D )T MR I 1/ W U I 3 / GP C 6

CIR

R I 1# / W U I 0 / GP D 0( P U )
R I 2# / W U I 1 / GP D 1( P U )

( P D )C R X / GP C 0
( P D )C TX / GP B 2

( 3 G_ P W R _ E N )
K B C _ S P I _C E #
K B C _ S P I _S I
K B C _ S P I _S O
( V C H G-S E L )
KB C_ S P I_ SCL K

0 _04 F OR IT 85 12C X/ EX
0 .1U _0 4 F OR I TE8 51 2- J(I TE 85 02- J
E C C os t D ow n

R 5 33

W/ 0 CI R)

C 7 53

R5 3 5

0V

V 2. 0

R5 03 10 K/ R5 04 10 K

1.6 5V

W240BU
W250BU
W250BAQ

EC_ VS S

C K 32 K E
C K 3 2K

SM D_ BA T R8 0 8
SM C_ BA T R8 0 9

2. 2 K _ 0 4
2. 2 K _ 0 4

1 0 K _ 04

VD D3

* 1 0K _ 0 4

R 50 5

1 0K _ 0 4

CCD _ DE T #

R 50 6

1 0K _ 0 4

R 50 7

*1 0 K _ 04

W L A N_ L E D#

1 6 , 1 9, 2 6 , 3 0
1 6 , 3 0, 3 2

B A T _V O L T

VD D3

OC P P E #
ICP P E #

35
17

C 7 5 1 1 u _6 . 3 V _ X5 R _0 4

80PORT

J_ 8 0D E B U G 1

2 9 , 3 0, 3 1

5
4
3
2
1

E GA D
26
26

3 IN 1
8 0 CL K
R 51 4

1 0 K _0 4

80 D E T#

1 2/6 Reve rse

R S M R S T _ GA T E # 16
K B C_ RS T # 1 6

47
48

C P U _F A N S E N

V GA _ F A N S E N

120
1 2 4 ( P M_ P W R O K )

V C O R E _ ON

119
1 2 3 ( K B C _ P ME # ) P ME #

29

VDD 3

C7 5 2
0 . 1 u _1 6 V _ Y 5 V _ 04

For 8512E
KBC_SPI_*_R = 0.1"~0.5"

35

R 7 10

U 39
8

0_ 0 4

VD D

C E L L _C ON TR OL 3 7

2
128

S W I#

16

C H G_ E N

37

R5 2 8 1 K _ 0 4

? ? ?

*1 0m i l _s h ort

1
2

3

R 5 3 2 4 . 7 K _ 04
K B C _ H O LD #

7

* 12 p _5 0 V _ N P O _0 4

C K 3 2K

* MC -14 6 _3 2 . 7 68 K H z

Co -la yo ut X2 , X3
1
2

4
3

R5 34 F or IT8 518 BX&
IT 85 19 BX On ly.

4 7 _ 04

R5 2 7

1 5 _ 1% _ 0 4K B C _S P I _ S O

K B C _S P I _C E # _R

R5 2 9

1 5 _ 1% _ 0 4K B C _S P I _ C E #

6

K B C _S P I _S C L K _R

R5 3 0

4 7 _ 04

CE#

VSS

P C T 25 V F 0 1 6B -75 -4 I -S 2 A F

C K 3 2K E

* 12 p _ 50 V _ N P O _ 04

S H OR T

R5 2 6

K B C _S P I _S O _ R

4

*1 0 M_ 0 4

C 7 55

K B C _S P I _S I _R

2
1

SI

SC K
H OL D #

4
3

5
SO

K B C _ F LA S H

U37 U39 Co-layout

CK 3 2 K E
CK 3 2 K
R 53 1

C7 5 4

K BC_ AG ND

3G _D E T #

3 .3 VS

22

B T _E N
2 4 ,2 8
B K L _E N
20
H S PI_ CE # 1 7
H S P I _ S C LK 1 7
H S P I _ MS O 1 7
H S P I _ MS I 17
D D _O N

82
83
84

22

X1 0
R5 3 4

0 . 1 u_ 1 6 V _Y 5 V _0 4

* 10 m i _l s h ort _ 0 4L C D _ B R I G H T N E S S
*0 . 1 u_ 1 6 V _Y 5 V _0 4

R5 0 3

RX

X1 1
* 1T J S 1 25 D J4 A 4 2 0P _ 3 2 . 76 8 K H z

6 -2 2-3 2R 76 -0B 4
C7 5 6

B - 28 KBC- ITE IT8518

M OD EL _ID

3.3 V

V C H G _ S E L 37

S USB #
S USC #

19

CLOCK

NC 2
2 0 B R I GH TN E S S

V OLT AG E

R5 03 X/ R 504 1 0K

Pin100 ,104&106 EXT ? ? Pu ll hi
& Pull L ow .

93
94
95
96
97
98
99
107

( P D )L 80 H L A T / GP E 0

AVSS

R XD / GP B 0 ( P U )
T X D/G P B1 ( PU )

*0 _0 4

RX
R5 03 10 K/ R5 04 X

V 2. 0

R5 0 4

C CD_ E N

75

UART

I T8 5 1 8E

V ER .
V 1. 0

MO D E L _ I D

3 G_ P OW E R

56
57

( P D )R I N G #/ P W R F A I L # / L P C R S T# / GP B 7

VSS
VSS
VSS
VSS
VSS
VSS
VSS

WEB1 #- --WEB_EM AIL#
WEB2 #- --WEB_WWW #

EC MODULE CHOOSE (FOR DIFFERENCE K/B TYPE)

W P#

LPC/WAKE UP

GP INTERRUPT
G I N T / GP D 5 ( P U )

1 08
1 09

24

J_KB1

A L L _S Y S _ P W R G D 1 9 , 20

PWM/COUNTER

P W R S W / G P E 4( P U )

* 0 _0 4
* 0 _0 4

1 u _6 . 3 V _ X5 R _0 4

V DD3
100
101
102
103
104
105
106

112
R 83 0
1 0 V G A _ A L E RT #
R 82 9
2 4, 2 8 W L A N _ L E D #
24
W L A N_ DE T #

1

*8 52 0 5 -05 0 0 1

WAKE UP

WAKE UP

33

PD
PD
PD
PD
PD
PD
PD
PD

EXT GPIO

PS/2

85
86
87
88
89
90

* 8 52 0 1- 24 0 51

58
59
60
61
62
63
64
65

K B C _W R E S E T #
C 74 9

For 8502E
U9 U28 Co-layout

V D D3

FLASH

ADC

66
67
68
69
70
71
72
73

18
21

P W R_ B T N#

A VCC

26
50
92
114
1 21
127
VSTBY
VST BY
VSTBY
VSTB Y
VSTBY
VSTBY

DAC
G
G
D
D
D
D

1 25

3G _E N

30
P W R_ S W #
16 , 2 0 , 29 L I D _ S W #
16

E C S CI# /G P D3 ( P U )
E C S MI # / G P D 4 ( P U )

76
77
78
79
80
81

W L A N _E N

2 4 , 28 W L A N _E N
25
K B C _ MU T E #

Sheet 27 of 41
KBC- ITE IT8518

0 _ 04

K S O0 / P D 0
K S O1 / P D 1
K S O2 / P D 2
K S O3 / P D 3
K S O4 / P D 4
K S O5 / P D 5
K S O6 / P D 6
K S O7 / P D 7
K S O8 / A C K #
K S O 9/ B U S Y
K S O 10 / P E
K S O1 1 / E R R #
K S O 1 2/ S L C T
KSO 1 3
KSO 1 4
KSO 1 5

G A 2 0/ G P B 5
K B R S T #/ G P B 6 ( P U )
P W U R E Q # / GP C 7( P U )
L 8 0L L A T / GP E 7 ( P U )

4
VSS

* A T 25 F 5 1 2A N

FOR W250BUQ
J _K B 2

8 52 0 1 -24 0 5 1
KSI0 /ST B#
K S I1 /A F D #
K S I 2/ I N I T #
K S I 3/ S L I N #
KS I4
KS I5
KS I6
KS I7

LPC K/B MATRIX

1
12
27
49
91
113
1 22

B.Schematic Diagrams

1 6, 2 6
16

FOR J _W240BU
KB1

W R ST #
1 26
4
16
20

G A 20
R 7 97

0
1
2
3
CL K
A ME #
IRQ
R S T #/ W U I 4 / GP D 2 ( P U )

7
HO L D#

14

K B C _W R E S E T #
16
GA 2 0
1 6, 2 9 , 3 7 A C _ I N #
28
LE D _ A C I N
3 ,1 7 AP U_ T A L E RT #

L AD
L AD
L AD
L AD
L PC
LFR
SER
L PC

V CC

U3 8
10
9
8
7
13
6
5
22

1 5, 1 9
L P C _A D 0
1 5, 1 9
L P C _A D 1
1 5, 1 9
L P C _A D 2
1 5, 1 9
L P C _A D 3
15 , 1 6 LP C _ C L K 0
1 5 , 19 L P C _ F R A ME #
1 5, 1 9
S E RIR Q

K B C _ H OL D #

K B C _ A GN D

11

.

3 .3 VS

6 -22 -3 2R 76- 0B 2
6 -22 -3 2R 76- 0B G

K B C _S P I _ S I

K B C _S P I _ S C LK

Schematic Diagrams

LED/ MDC/ BT
3V _B T

Bluetooth

J _ BT 1

3 .3 V

16
US B _ P N 6
16
US B _ P P 6
2 4, 2 7
B T _ DE T #

R5 3 6
47 K _ 0 4

3 .3 V

*8 7 21 2 -0 6G 0
1 5, 2 4

B T _ DE T #
C7 5 7

R5 3 7

B T _ ON

3 . 3V

*1 0K _0 4

3 V_ BT

D
22 0 _0 4
D1

R 54 3

R 54 4

R5 4 5

2 2 0 _0 4

2 2 0_ 0 4

2 2 0_ 0 4

2 20 _ 04

R5 5 0

POWER ON

M2
M-M A R K 1

H3 4
h t 6 _ 0b 7 _0 d 3 _7

H3 5
H C 6_ 0 d 3_ 7

3
4
5

1

9
8
7
6

H1 4
3
4
5

MT H 31 5 D 1 1 1

2

24 , 2 7

For W240BU

E
H2 5
M8
M-M A R K 1

K P B - 30 2 5Y S GC

B
BT _ EN

M7
M-MA R K 1

D 14

K P B -3 02 5 Y S G C

E

6-5 2- 520 01 -02 7

Q1 7
D T C 1 1 4E U A

M1
M5
M -MA R K 1 M -MA R K 1

BAT LED

3

3

1

2 4, 2 7

Q1 6
* DT C1 1 4 E UA

L E D _ S C R OL L # 2 7

LED
D1 3

2

Y

C

* 10 m i _l s ho rt _ 0 4
B
W L A N _E N

1

1

2

R 5 42

Sheet 28 of 41
LED/ MDC/ BT

K P B -3 02 5 Y S G C

Y

4

SG

1
3

2

W LA N _L E D # 2 4 , 2 7

L E D_ CA P # 2 7

6-5 2- 520 01 -02 7

1

LOCK
LED

L E D _ B A T _F U L L 2 7

WLAN
LED

SG

A
C

R Y - S P 17 0 Y G3 4 -5M

A
C
L E D _ N U M# 2 7

6- 52 -52 00 1- 027

SCROLL
D5

LOCK
LED

L E D_ B A T _ CH G 2 7

27

C

S A T A _L E D # 1 7

6- 52- 52 001 -0 27

CAPS
D 4

LOCK
LED

R Y -S P 1 70 Y G 34 -5 M

A
C

R Y -S P 17 0 Y G3 4 -5 M

C

NUM
D 3

LED

R Y -S P 1 70 Y G 34 -5 M

A

HDD/ODD

LE D _A C I N 2 7

L ED_ PW R

BT
LED
D2

2 2 0 _0 4

4

2 20 _ 0 4

R 54 1

22 0 _0 4

2

2 20 _ 0 4

R 5 48

4

R5 4 7

3

22 0 _ 04

3 . 3V S

R 5 40

4

R5 4 6

*1 0 u_ 1 0 V _Y 5V _0 8

3 . 3V S

Y

R 5 49

3 .3 V S

SG

3 .3 V S

C7 5 9

* 18 0 p_ 5 0 V _N P O_ 0 4

S
3 .3 VS
3 .3 VS

C 75 8

1

9
8
7
6

H1 3
3
4
5

MT H 31 5 D 1 1 1

9
8
7
6

1

C 76 0
*0 . 1 u_ 1 6V _Y 5V _ 0 4

MT H 3 1 5 D 1 1 1
V D D3

H2

H1
C 1 10 D 11 0 N P

C 11 0 D 1 1 0N P

M6
M-MA R K 1

M3
M-M A R K 1

M4
M-M A R K 1

H5
3
4
5

S2
S MD 8 0 X 80

H 29
H 30
H 31
H 4_ 7 B 6 _0 D 3 _ 7 H 4_ 7 B 6 _0 D 3_ 7 H 4 _7 B 6 _0 D 3_ 7

9
8
7
6

MT H 31 5 D 1 1 1

3
4
5

H6
C6 7 D6 7

H1 9
H 4 _ 0B 7 _ 0 D 3 _7
H2 1
H 20
C 1 10 D 1 1 0 N P C 11 0 D 1 1 0N P

H3 6
h t 6 _ 0b 7 _0 d 3 _7

H3 2
H 4 _ 7B 6_ 0 D 3 _ 7

H 33
H T 6_ 0 B S 1 D 3 _7

H7
1

H9
3
4
5

1

1

MT H 31 5 D 1 1 1

9
8
7
6

H2 4
3
4
5

MT H 31 5 D 1 1 1

6

mt h3 1 5d 1 1 1_ 3

H 23
C 67 D 6 7

H3
3
4
5

H1 1

1

1

H 17
H 15
* H 4 _7 B 6 _ 0D 3 _7
H 4_ 7 B 6 _0 D 3 _ 7

1

S1
S MD 80 X 8 0
1

H 18
H 6_ 0 D 3 _ 7

1

9
8
7
6

3
4
5

1

9
8
7
6

1

1
2
3
4
5
6

MT H 3 1 5 D 1 1 1

H2 6

9
8
7
6

3
4
5

MT H 31 5 D 1 1 1

1

M TH 3 15 D 1 1 1

H4
3
4
5

1

GN D

J_ T P 4

9
8
7
6

L E D_ P W R
L E D_ A CI N
L E D_ B A T _ F UL L
L E D_ B A T _ CHG

* 85 2 01 -0 6 05 1
GN D

1 2/9

For W250BUQ

9
8
7
6

MT H 3 1 5 D 1 1 1

LED/ MDC/ BT B - 29

B.Schematic Diagrams

LED

5 0mi l

*1 5 m li _ sh o rt _ 06
Q1 4
*MT N 70 0 2Z H S 3

G

R 5 39

50 mi l

B T _ E N#

BT_ EN

* 0_ 0 4

R 5 38

* 18 0 p_ 5 0 V _N P O_ 0 4

2 4 , 27

1
2
3
4
5
6

BT _ EN#

Schematic Diagrams

USB/ FAN/ TP/ MULTI CON
USB PORT*2(Port 0,Port1)

US B V CC1

Reserve 9/8

R7 4 0

0 _ 06

R7 4 1

* 0_ 0 6

U S B _V C C 2

US B V CC0

60 mil
+

C 7 40

+ C7 6 9

2 2 0u _ 6. 3V _ 6 . 6 *4 . 5
V DD 5

2

U S B _P P 0

3

17

D M_ O
D P _O

V D D5

12

O UT

*1 0 K _0 4

5

R 7 50

*1 0 K _0 4

6

R 7 48

*1 0 K _0 4

7

A C_ IN

R 7 51

*1 0 K _0 4

8

J _ USB 1
R 7 11

11

U S B _ P N 0 _R

10

U S B _ P P 0_ R

D M _I N
D P _I N

U S B _P N 0 _R

4

U S B _P P 0_ R

1

14
G ND

EN /DSC

I L I M0

C TL 1

I L I M1

C TL 2

NC

5V S

R7 3 7

* 17 . 8 K _ 1% _ 0 4

15

R7 4 5

* 10 K _ 0 4

D

F A U LT #

R5 7 4

*0 _ 04

G 9 9 0P 1 1 U 6 - 0 2- 9 9 01 1 - B2 0
P 2 7 93 A 6- 0 2 - 02 7 9 3- B 2 0

GN D

0_ 0 4

5 VS

J _ F A N1

CTL3: 0
CTL3: 1
CTL3: X

X
1
1

3 . 3V

R 5 52
1 0 K _ 04
U S B _O C P 0 _ 1 #

R 5 54

US B V CC1

16

US B _ P N0

16

U S B _P P 0

+ C 7 72

U S B _F L G #

*0 _ 04

U S B _ V CC3

L 13 0
*1 5 mi l _ sh o rt _ 06

R 5 53
*1 0K _ 0 4

U S B _P N 0

R 1 68

0_ 0 4

US B _ P N0 _ R

U S B _P P 0

R 1 71

0_ 0 4

U S B _ P P 0 _R

JFAN

2 7 C P U_ F A N S E N

3
R 5 51

U S B _ F L G#

* 10 0 u _6 . 3 V _ B _A

6

16

U S B _P N 1

C 7 62

C 7 63

C 7 64 1 6

US B _ P P 1

VIN2

1

0 . 1 u _1 6 V _ Y 5 V _ 04

0. 1 u _1 6 V _ Y 5 V _ 04

*1 0u _ 6 . 3V _ X 5 R _ 06

V O UT 3

4
E N#

Port 1

1

R7 1 4

C 77 0

DA T A _ L

GN D

R T9 7 1 5B G S

U S 0 40 3 6 B C A 0 81

W 24 0 B U 6 - 2 1- B 4 9C 0 - 10 4

R 5 56

R 5 57

10 K _ 0 4

10 K _ 0 4

C7 7 1

* 10 u _ 10 V _ Y 5 V _ 08

3

J_ T P 1

DA T A _ H
0 _0 4

3 0, 3 2 , 3 3 D D _ ON #

* 15 m il _ s ho rt _ 0 6

2

L1 2 1
4

G ND

R 5 55

V+

3
* W C M 20 1 2 F 2S -1 6 1 T0 3
2

1

FO R CLI CK B OA RD
5 VS_ TP

5V S

1

0 _0 4

4

V O UT 2

3

1 0u _ 10 V _ Y 5 V _ 0 8

100 MIL

8

7
VIN1

R7 1 3

U S B V CC 1

F L G# V O U T 1
2

C 76 1

CLICK CONN

0 . 1 u _1 6 V _ Y 5 V _0 4

J _ USB 2

5

4. 7 K _ 0 4

80 mil

C 7 73

U 40
5V

8 52 0 5-0 3 7 01

1 0u _ 1 0V _ Y 5V _ 0 8

1-----> Dedicated Charging Port, Auto-detect
1-----> Charging Downdtream Port, BC Spec 1.1
0-----> Standard Downstream Port, USB 2.0 Mode.

3 . 3V

1 6, 2 6 U S B _ O C P 0 _ 1#

1
2
3

C7 6 6
0. 1 u _1 6 V _ Y 5 V _ 04

U S B _ O C P 0 _1 #

1
2
3
4
8 52 0 1-0 4 0 51

GN D 1
G ND 2
GN D 3
G ND 4

CTL2
CTL2
CTL2

5 VS_ FAN

C 7 65

*T P S 2 5 40
N/A

G ND 1
GN D 2
G ND3
GN D 4

CTL1
CTL1
CTL1

8
7
6
5

A X 9 9 5S A

W 25 0 B UQ 6 -2 1 - B4 4 1 0- 0 0 4

V DD3

D
D
D
D

D A TA _ L
D A TA _ H

R 7 12

GN
GN
GN
GN

V+

U S 0 40 3 6 B C A 0 8 1

*1 0 K _0 4

FO N
VIN
V O UT
VSET

3

W 24 0 B U 6 - 21 - B 49 C 0 -1 0 4
R7 4 6

C P U _F A N

3 .3 VS

Sheet 29 of 41
USB/ FAN/ TP/
MULTI CON

U 41
1
2
3
4

2

3
*W C M2 0 1 2F 2 S -1 6 1T 0 3
2

4
16

13
C TL 3

27

1

0_ 0 4

L 1 20

9

Q7 6
*M TN 70 0 2 Z H S 3

G

1 6 , 27 , 3 7 A C _I N #

12 /7

100 mil

S

1 u_ 6 . 3V _Y 5V _ 0 4

T P _D A T A 2 7
T P _C LK
27
C 7 74

C 7 75

47 p _ 50 V _ N P O _0 4

47 p _ 50 V _ N P O _0 4

W 25 0 B UQ 6 - 21 - B 44 1 0 -0 0 4

VDD 3

POWER SWITCH CONN.

CONN.(Port 2)

AP_ KEY#

5V

R7 3 4

3 . 3V S

1.1A 60mils
*0 _ 0 6

C7 7 8

0 . 0 1 u_ 1 6 V _X 7 R _ 0 4

3. 3 V

C7 7 6

C 7 77

1
2
3
4
5
6
7
8

Q 18
G

2 5 M IC_ S E N S E
2 5 H P _ S ENSE

2 5 S P K OU T R +
2 5 S P K OU T R 16

USB _ PN4

R5 6 1

*1 0 m il _ sh o rt _ 04

U S B N4 _ R

16

USB _ PP 4

R5 6 2

*1 0 m il _ sh o rt _ 04

U S B P 4 _R

B - 30 USB/ FAN/ TP/ MULTI CON

H E A D P H O N E -R
H E A D P H O N E -L
M IC_ S E NS E
S P K _H P #
H P _ S ENSE
U S BN4 _ R
U S B P 4 _R
S P K OU T R +
S P K O UT R-

1
2
3
4
5
6
7
8
9
10
11
12
13
14
8 5 20 1 -14 0 5 1-0 1

Ch an ge co nne ct or

0 . 01 u _ 16 V _ X 7R _0 4

0. 0 1 u_ 1 6 V _X 7 R _ 0 4

*1 0 m il _ sh o rt _ 04 M_ B T N #

AP_ KEY#

88 4 8 6-0 8 01
J _ SW 1
1
2
3
4
5
6
7
8
9
10

M_ B T N #

20 mi l
M _B T N #_ R
W EB_ W W W #
W E B _ E M A I L#
L ID_ S W #

30

R5 6 0
*1 0m i l _s h or t _0 4
M_ B TN #

M_ B T N #

W E B _W W W # 2 7
W E B _E M A I L # 2 7
L I D _ S W # 1 6, 2 0 , 2 7

A P _ ON

30

P R 21 5
* 47 K _ 0 4
*0 . 1u _ 5 0V _ Y 5V _ 0 6

12 /8

P C2 3 0

P V1
*V 1 5 A V L C 0 4 02
2

2 5 H E A D P H ON E -R
2 5 H E A D P H ON E -L

M I C 1 -R M
M IC1 -L M

3 .3 V

2 0m il
MB T N
R5 5 8
W EB_ W W W #
W E B _ E MA I L #
LI D _ S W #

1

2 5 M I C 1 -R M
2 5 M I C 1 -L M

S

* MT N 7 0 02 Z H S 3
J _ A UDIO 1

12 /10 Dele te R5 59

F OR A UD IO B OA RD

3 .3 VS

1 0 K _ 04
* 1 0K _ 0 4
* 1 0K _ 0 4
J_ S W 2

0 _ 06
D

R7 3 3

R8 3 1
R8 3 2
R8 3 3

A P _K E Y # 2 7

FOR P OW ER S WI TC H BO AR D
US B V CC1

AP_ KEY #
W E B _W W W #
W E B _E M A I L #

CLOSE TO J_SW1

1

Audio/B

A P _ ON

PV2
*V 1 5 A V L C 0 40 2

VIN
2

B.Schematic Diagrams

R 7 49

V DD5

D D _ ON

* 10 K _ 0 4

5V S _ F A N

G ND1
GN D 2
G ND3
GN D 4

U S B _P N 0

IN

I L I M_ S E L

R 7 47

FAN CONTROL

Port 0

G ND 1
GN D 2
G ND 3
GN D 4

1

PPAD

U 10

100 mil

4

27 , 3 0 , 31

0 . 1 u _1 6 V _ Y 5 V _ 04

F ON #

US B PO RT Charg e

V DD 5

C7 6 8

*1 0 0u _ 6 . 3V _ B _ A

US B V C C0

* 5 05 0 0- 01 0 41 -0 0 1L

If system has APON function, uses J_SW1
If system has no APON function, uses J_SW2

1 2/8

Schematic Diagrams

5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS
VI N
VA

VIN

V IN 1

3 .3 V

V IN 1
R8 1 0

PU 1
V A

*1 2 K _ 06

V IN
29

P R 2 10

M_ B T N #
29

8
VA

7
V IN

R5 6 3

D D _ ON _L A T C H

1 K _ 04

6
M _B T N #

1K _ 0 4

12 /6

V IN1

2
3

1 K_ 0 4

P R 2 11

A P _ ON

1

P R1 8

P W R_ S W #

4

D D_ O N

2 7 , 29 , 3 1

1 K_ 0 4

P W R_ S W # 2 7

ON
DD_ON"L" T O
"H" FROM EC

PC 6

PC 7

PC 8

C 7 79

0 . 1 u_ 5 0 V _Y 5 V _ 06

0 . 1 u _5 0 V _ Y 5 V _ 0 6

0 . 1 u_ 5 0 V _ Y 5 V _ 0 6

0 . 0 1 u _1 6 V _ X7 R _0 4

5
I N S TA N T -ON

GN D

PR 3

10 0 K _ 0 4

V DD 3

P 2 8 0 8B 0
S Y S 5V

5V

S Y S 5V

PR 4

P R5

1 0 K_ 0 4

1 0 K_ 0 4

SY S5 V

P R6
10 K _ 0 4

ON

ON
D D _ ON #

0 . 0 1 u_ 1 6 V _X 7 R _0 4

0. 0 1 u _1 6 V _ X 7R _ 04

0 . 01 u _ 1 6V _ X 7 R _ 0 4
P Q1 A
M TD N 7 0 0 2Z H S 6 R

D D_ O N#

SU SB

2 9 , 3 2 , 33
P Q1 B
M TD N 7 0 0 2Z H S 6 R

ON

D

S US C

S US B

D

5G
4

PR 7

1 6 , 27 , 3 2

PC 1 0

P C1 1

S US C #
S

1 6, 1 9 , 2 6 , 27 S U S B #

* 0. 1 u _ 16 V _ Y 5V _ 0 4

S
* 0. 1 u _ 16 V _ Y 5V _ 0 4

* 0 . 1u _ 1 6 V _Y 5 V _ 04

P R9

PR 8
10 0 K _ 04

1 0 0K _0 4

C7 8 3

C 78 4

0. 01 u _ 16 V _ X 7 R _ 0 4

0 . 0 1u _ 1 6V _X 7 R _ 0 4

1 0 0 K _0 4

ON
ON

ON

5VS

5V

S Y S 1 5V
V DD 5

3A

3A

1.5VS

NM O S
PQ 4 A
M TN N 2 0 N 0 3 Q8
2
1

V DD 5

5V

8
7

5V S

S Y S 15 V

P R1 1

Power Plane

1 .5 V

P Q 5A
*M T N N 20 N 03 Q 8
2
1

8
7

P R1 2

1 M_ 0 4

N M OS
1 . 5V S

*1 M_ 0 4

P C1 2

P C2 2 5

P R 2 06

0. 1 u _ 16 V _ Y 5V _ 0 4

1 0u _ 1 0V _Y 5 V _0 8

1 0 0 _1 % _ 04

P C1 7

S US B

2

P R1 4

*1 0 u_ 1 0 V _ Y 5 V _ 08

* 1 00 _ 1 % _0 4

P Q1 3
* MT N 70 0 2 Z H S 3

G

S US B

*0 . 1 u_ 1 0 V _ X7 R _0 4
6

S

1
2

P C1 4

*0 . 1 u _1 6 V _ Y 5 V _ 0 4
P Q 5B
*M TN N 2 0 N 0 3 Q8
5

10/20

PJ 2

P J1

PC1 3

P C1 9

4 70 p _ 50 V _ X 7 R _ 0 4

G

47 0 p _ 50 V _ X 7 R _ 0 4
6

PQ 6 0
M TN 7 00 2 Z H S 3

G

1

D D _O N #

5
6

5

P C1 8
P Q6 1
MT N 7 0 0 2Z H S 3

S

P Q3 B
M T N N 20 N 03 Q 8

P Q4 B
M TN N 2 0 N 0 3 Q8

D

10 0 _ 1% _ 0 4

S

P R2 0 7

1 0 u _1 0 V _ Y 5 V _ 0 8

4

P C 2 27

0 . 1 u_ 1 6 V _Y 5 V _ 04

D

P C 22 6

D

4

3

1M _ 04

4

3

P R1 0

8
7

P Q3 A
MT N N 20 N 03 Q 8
2
1

3

S Y S 15 V

Sheet 30 of 41
5VS/ 3.3VS/ 1.8VS/
1.5VS/ 1.1VS

4 0 m li
SU SB

4 0m i l

3 2, 3 3 , 3 4 , 36

ON

ON

1.1VS

3 .3 V

3A

8
7

P Q6 A

1 M_ 0 4

P R 17

Power Plane

P R1 6

P C2 1

P C2 2

PR 1 9

0. 1 u _ 1 6V _ Y 5V _0 4

1 0 u _1 0 V _ Y 5 V _ 0 8

1 0 0 _1 % _ 04

3

1 M_ 0 4
P C 22 8

P C 2 29

P R2 0 8

0 . 1 u_ 1 6 V _Y 5 V _ 04

1 0 u _1 0 V _ Y 5 V _ 0 8

10 0 _ 1% _ 0 4

G

5

5

SU SB

PQ 7
MT N 70 0 2 Z H S 3

G
S

SU SB

2 20 0 p _ 50 V _ X 7 R _ 0 4

G

PQ 1 0
M TN 7 00 2 Z H S 3

6

D

4
P C 26

P Q6 2
MT N 7 0 0 2Z H S 3

1 0 0_ 1 % _0 4

P Q6 B
M T N N 20 N 03 Q 8

ON

1 2/8

6

S

22 0 0 p _5 0 V _ X 7R _ 04

D D _ ON #

P R 15

1 0 u_ 1 0 V _ Y 5 V _ 0 8

6

5

PC 1 6

0 . 1 u _ 16 V _ Y 5 V _ 0 4

0 . 0 1 u_ 1 6 V _ X7 R _0 4
P Q9 B
MT N N 2 0N 0 3Q 8

S

P Q8 B
M T N N 20 N 03 Q 8

D

4
P C2 5

P C1 5

PC 2 0

3

1M _ 04

1 .1 V S

M T N N 20 N 03 Q 8
2
1

3

P Q8 A
MT N N 20 N 03 Q 8
2
1

P Q9 A
MT N N 2 0N 0 3Q 8
2
1

PR 1 3

8
7

D

8
7

V D D3

3. 3 V S

1 . 1V

4

V DD 3

3A

SY S1 5 V

NM O S
S Y S 1 5V

S Y S 15 V

NM O S

3.3VS

3.3V

ON

5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS B - 31

B.Schematic Diagrams

1

PC 9
S

3 3, 3 5

P Q2
MT N 7 0 0 2 Z H S 3

G
2G

27 , 2 9 , 3 1 D D _ ON

3. 3 V S

S US C

3 2 , 3 3 , 34 , 3 6
D

C7 8 2

3

C7 8 1

6

C 78 0

Schematic Diagrams

POWER VDD3/ VDD5
VR EF

P R2 1

* 0 _0 4

P R2 2

0_04
P C2 8

1u _ 1 0 V _ Y 5 V _ 0 6

P R2 3

PR2 4
E N _3 V

E N _5 V

V O2

P C3 1

P R2 9
20 K _ 1 % _ 04

1

2
VR EF

E N1

5
6
7
8
1
2
3
5
6
7
8
1
2
3

18

17

16

C

A

PR 3 0
* RB 0 5 4 0 S 2

* 68 0 K _ 1 % _0 4

VR EF
VR EG 5

P R3 4

0 _0 4

P R3 5

*0 _ 0 4

P R 1 46
5 . 1 _ 06

P R2 6
3 0 K _ 1 % _0 6

P C 1 74
2 2 00 p _ 5 0V _X 7 R _0 4

V REG 5

P R 32
*0 _ 0 4

P R3 3
2 . 2_ 0 6

P C 46
0 . 01 u _ 5 0V _X 7 R _0 4

P D5
B A T 54 S W GH
A 1

3 C

A

VIN 1
C

V IN

1 9 . 1 K _ 1 % _0 6

12 /7
SY S5 V

2
SY S1 0 V

PC 4 9

A
4 . 7 u _ 25 V _ X 5 R _ 0 8

1 u _1 0 V _ Y 5V _0 6

P C 50
0 . 01 u _ 5 0V _X 7 R _0 4

P D6
B A T 54 S W GH
A 1

2 20 0 p _ 50 V _ X 7 R _ 0 4

3 C
A

2

SY S1 5 V
P C 51
2 20 0 p _ 50 V _ X 7 R _ 0 4

VR EG 5
Z24 18

P R 37

*0 _ 0 4

E N_ 3 V

P R3 8

0 _ 04

E N_ 5 V

D

1 0K _0 4

P R3 6

P Q1 8
G

1
2

S

D
P Q2 2
*M T N 7 0 0 2Z H S 3

B - 32 POWER VDD3/ VDD5

S

AC IN

S

10 0 K _ 0 4

G
37

PR3 9

P Q 19
M T N7 0 0 2 Z HS 3

0 . 1 u _1 0 V _ X 7 R _0 4

PJ 5
*6 m i l

D D _ ON

PC 5 5

D

MT N 70 0 2 Z H S 3

G
2 7 , 2 9 , 30

+

P R2 8

68 0 K _ 1 % _ 06

P C 47
PC 4 8

R B 0 54 0 S 2

Rb

P R2 1 6

V RE G 5
P D7

2

P C 41

* RB 0 5 4 0 S 2

EN _ AL L
P R3 1
0_04

1
*5 m m

1 0 00 p _ 5 0 V _X 7 R _0 4

PD 4
C

25
15

VR EG 5
P C2 3 8
22 0 0 p _ 50 V _ X 7 R _ 0 4

PQ 1 7
P 1 2 0 3B V

4

VCL K

L DO 5

EN0

19

PD 3
A

PJ 4

5A
Ra

LG A T E 1
VIN

L G AT E2

S K IPS EL

12

4

V D D5

P L2
T MP C 0 60 3 H -4 R 7 M-Z 01
2

PH ASE1

14

1 3 K _ 1 % _0 6

S YS5 V

1

20

GN D P A D
G ND

P Q 16
P 1 2 0 3B V

4 . 7 u_ 2 5 V _ X 5R _ 0 8
4 . 7 u _ 25 V _ X 5 R _ 0 8

PQ 1 5
P1 2 0 3 BV

4

3
2
1
8
7
6
5

P R1 5 2
5. 1_ 0 6

PC 4 2

1 u_ 1 0 V _ Y 5 V _ 0 6

21
UG A T E 1

11

13

Sheet 31 of 41
POWER VDD3/
VDD5

P R2 7

PC 3 8

0 . 1u _ 5 0 V _ Y 5 V _ 0 6

B O OT 1

uP6182

0 . 1 u _1 0 V _ X 7 R _ 0 4
10

3
2
1

+

P C3 9
0 . 1 u_ 1 6 V _ Y 5 V _ 0 4

1 0 0p _ 5 0 V _ N P O _ 04

* 5 mm

PC3 7

22
B OO T2

P HAS E 2
PC 4 0
22 0 u _ 6. 3V _6 . 6 * 5. 7

B.Schematic Diagrams

9

U GA TE 2

PL 1
T M P C 0 6 0 3H -4 R 7 M -Z 0 1
2
1

5A

P C 33

SY S5 V

PO K
PC3 6

P C 35

4
S YS3 V
1

*1 0 K _ 04

23
L D O3

P C3 4
1u _ 1 0 V _ Y 5 V _ 0 6

8
7
6
5

4 . 7 u _2 5 V _ X 5 R _ 0 8

P J3

V IN
24
V O1

8
P Q 14
P 1 2 0 3B V

4 . 7 u _2 5 V _ X 5 R _ 0 8

2

PU 2

PR 2 5
PC 3 2

V D D3

VF B1

4

7
V RE G 3

3
T O N SEL

6
E N2

V F B2

10 0 0 p _5 0 V _ X 7 R _ 0 4

VIN

PC 3 0
1 0 0 0p _ 5 0 V _ X7 R _ 04

10 0 K _ 0 4
5

1 00 K _ 0 4

P C 45
22 0 u _ 6. 3 V _ 6 . 6 *4 . 5

PC2 9

P C4 4
0 . 1 u _ 1 6V _Y 5 V _ 04

Schematic Diagrams

*0 . 1 u _5 0 V _ Y 5 V _ 0 6

*4 . 7 u _2 5 V _ X 5 R _0 8

* 4 . 7 u _2 5 V _ X 5 R _0 8
P C6 8

C
R B 0 5 40 S 2

PU 4

P C6 7

PD 1 2
A

5V

P C6 6

Power 1.5V/ 0.75
V IN

12 /6 Dis ab le

V D DQ

5
6
7
8

u P 6 1 63
PC 6 9
10 u _ 1 0V _ Y 5 V _ 0 8
PC 7 0
23

PQ 2 3
MD S 2 6 5 9

4

0 . 1 u _ 10 V _ X 7 R _0 4

VBST

2
3
1

V L DO IN

V D DQ

PJ 7
2

1

24

P R 47

21
VTT

PL 4
1 . 0 U H _ 1 0 *1 0 *4 . 5
1
2

0_06

D RV H

10A

PJ 8
1

2
1 .5 V

P R5 5

*0 _ 0 4

4

C

5
6
7
8
PR 5 2

0_06
5V

PR 5 4

16
MO D E

P C8 0

PQ 2 4
MD S 2 6 5 5

Z 26 2 1
PD 1 3

4

18
17

* SK3 4 SA

2
3
1

11 /5

P G ND
C S _G N D

A

*0 _ 0 4

DR V L

GN D

1 0 K _ 1 % _ 06

C S

0 . 1 u _ 10 V _ X 7 R _ 0 4

P V C C5
V C C5

5
V T T REF

+

P R5 0
5 .1 _ 0 6

15
14

P R 56

2 . 2 _0 4
PR 5 7

0_06

6

PC 8 2

P GO OD

V D DQ S E T

S3
N C

*1 0 _0 4

10

0_06

7

Sheet 32 of 41
Power 1.5V/0.75V

P R6 0
1 0 0 K_ 0 4
DD R1 .5 V _ P W RG D

PC 8 4
*1 0 0 0p _ 5 0 V _ X 7 R _ 0 4

PC 8 3
* 1 00 0 p _ 5 0V _X 7R _ 0 4

NC

3 .3 V
11

G N D

S5

1u _ 1 0 V _ Y 5 V _ 0 6

V D DQ S NS

1 u _ 10 V _ Y 5 V _ 0 6

P R5 9
9

P C8 1

13
C O MP

8

25

P R5 8

12

5V

+

DD R1 .5 V _ P W RG D 1 9 ,3 5

P R6 2
5V
*1 0 K _ 1 % _ 04

PR 6 3

1 0K _1 % _ 0 6

PR 6 4
1 0 K _ 1 %_ 0 6

P R6 5

1 .5 V E N

4 7K _0 4

S

2

S

0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
*M T N 7 0 0 2 Z H S 3

PJ 9
*6 m i l

G
M TN 7 0 02 Z H S 3
1

S

P C 85
P Q2 6

G
P Q 27

1 6 ,2 7 ,3 0 S U S C#

P Q2 5
MT N 70 0 2 Z H S 3

G

1 0 0 K _ 04
D

P R6 6

D

D

5V

2 9 , 3 0, 33 D D _O N #

5V
* 2 2 _0 4

+1 . 5 S _ C P U _ P W R G D

PR 6 7

1 0 0K _0 4

PR 6 9

*1 0 0 K _ 0 4

PQ 2 8
SU SB

G

P C8 6
PQ 2 9

S US B

0. 1u _ 1 6 V _ Y 5 V _ 0 4

G

* MT N 7 00 2 Z H S 3

M TN 7 0 0 2Z H S 3
S

3 0 , 3 3 , 3 4, 3 6 S U S B

V TT E N

D

P R 68

D

V T T _ ME M

Power 1.5V/ 0.75 B - 33

B.Schematic Diagrams

P R5 3

19
V T T S NS

0 . 1 u _1 6 V _ Y 5 V _ 0 4

3

* OP E N _ 8 A

0 . 0 1u _ 1 6 V _ X 7 R _ 0 4

5V

2

11/5

0 _ 06

LL

P C 77

V D DQ

1 0 u _ 10 V _Y 5 V _ 0 8
1 0 u _ 10 V _ Y 5 V _ 08
* 10 u _ 1 0 V _ Y 5 V _ 0 8
P R4 9

20
V T T GN D

PR 4 8
0_06

P C7 9
5 6 0 u _2 . 5 V _ 6 . 6 *6 . 6 * 5. 9

1

PC 7 3

PC 7 5

PC 7 2

P C7 4
2 2 0 0p _ 5 0 V _ X 7 R _ 0 6

PC 7 1

PC 7 6
*5 6 0 u _ 2. 5 V _ 6 . 6 * 6. 6 * 5 . 9

* OP E N _ 2 A

S

V TT _ M E M

1.5V

22

Schematic Diagrams

Power 1.1V/ 1VS
5V
V IN

OCP=10uA X RILIM / Rdson

P C 90

10 K _1 % _ 0 4
PQ 3 1
M D S 2 65 8
4

PC 9 1

2
3
1

0 . 1 u _1 0 V _ X 5 R _ 0 4

15

PU5
uP 6 12 7

PL 5
TM P C 0 60 3 H -4 R 7 M -Z 0 1
1
2

D H

N .C

PG D

BST

V O UT

VC C

3

9
G N D

R TN

17
PA D

+

P Q3 2
MD S 2 6 5 8

5

6

8

7

P C 78

P R 74

* 0 . 1 u_ 1 0 V _ X 7 R _ 0 4

N.C

N .C

DL

P C9 5

P R 51
5 . 1 _0 6

4

4
FB

P C9 6
2 2 00 p _ 5 0 V _ X7 R _ 0 4

1 .1 V

1

2
5m m

0 . 1u _ 1 6 V _ Y 5 V _ 0 4

10

5
6
7
8

2 2 0 K _ 1 % _ 04

19 1.1 V_PWRGD

P J1 0

5A

2

2
3
1

P R7 3

1

V 1 .1

LX

1 u_ 1 0 V _ Y 5 V _0 6
* 1 0 m il _ s h ort

Sheet 33 of 41
Power 1.1V/ 1VS

P C 97

PR 7 5

PC 9 8

0 . 0 1u _ 1 6 V _ X 7R _ 0 4

1 0 K _ 1 % _ 04

* 2 0p _ 5 0 V _ N P O_ 0 4

5V
PC 9 9

P C 2 13

* 2 0p _ 5 0 V _ N P O_ 0 4

1 u _1 0 V _ Y 5 V _ 06

PR 7 6

1.1VS_VTT=0.75 X (1+PR101 / PR102)

2 1 K _ 1 % _ 04
1. 5V
P C 2 15

P U1 1

3A

0 . 1u _ 1 6 V _ Y 5 V _ 0 4
P C2 1 8

5
9
7

1V S _ P W R GD

6
V IN
V IN
P OK

V1 S _ R EG

V C NT L

3A

4

P R 1 96

E N
1

2
G N D

Ra

V FB

P C 2 14

P C2 1 6

8 2 p _5 0 V _ N P O_ 0 4

1 0 u _ 6 . 3 V _ X5 R _ 06
1 0 u _6 . 3 V _ X 5 R _0 6

3 . 2 4 K _ 1% _ 0 4

PC 2 1 9

A X 66 1 0
P R 1 95
5V

Rb

1 0 . 2 K _ 1% _ 0 4

VIN

Vout = 0.8V ( 1 + Ra / Rb )

5V

* R B 05 4 0 S 2
PR 7 9

*6 . 8 K _ 1 % _ 0 4

0 . 1 u_ 1 0 V _ X 7 R _ 0 4

5
6
7
8

P Q3 4
*M D S 26 5 9
4

P C1 0 4

2
3
1

0 . 1 u _ 1 0V _ X5 R _ 04

1
LX

16

15

14

1

3
4
GN D

17

P C 1 09
*1 u _ 1 0 V _ Y 5 V _ 0 6

*1 0 m i l_ s h o rt
PC 1 1 0

P R8 2

PC1 1 1

* 0. 01 u _ 1 6 V _ X7 R _ 0 4

*1 . 2 K _ 1 % _0 4 *2 0 p _5 0 V _ N P O_ 0 4

PC1 1 2
P R8 3
*2 0 p _5 0 V _ N P O_ 0 4

PD 1 7
* C S O D 14 0 S H

P AD

5

N .C

N.C

R TN
6

7

8

PR 8 1

P Q 35
*M D S 26 5 5

4

D L

+

* 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4

VC C

1 VS

PJ 1 1
2
5 mm

P C 1 07

BS T

V O UT

P C1 0 8

B - 34 Power 1.1V/ 1VS

6.5A
PC1 0 6
* 5 60 u _ 2 . 5 V _ 6 . 6 *6 . 6 *5 . 9

PG D

FB

*3 K _ 1 % _0 4

V1 .0 S

2

9

*0 . 1 u _ 10 V _ X 7 R _0 4

PL 6
*2 . 5 U H _ 6 . 8 *7 . 3 * 3
1
2

5
6
7
8

10

1 V S _P W R GD

1VS

* 0 . 1 u_ 1 0 V _ X 7 R _ 0 4

2
3
1

2 20 K _ 1 % _ 0 4

PU 6
*u P 6 1 2 7
DH

EN
11

N .C

12
P R8 0

N .C

IL IM

13

P C1 0 5

3 .3 V

35 1VS_ PWRGD

* 4 . 7u _ 2 5 V _ X 5 R _ 0 8

P C 10 0

PC 1 0 2

*4 . 7 u _2 5 V _ X 5 R _ 08

PQ 3 3
M TN 7 0 0 2Z H S 3

G

62 K _1 % _ 0 4

P C1 0 3

C

PR 7 8

P C 10 1

A

SU SB

C

3 0 , 3 2 , 3 4, 36 S U S B

P D1 6

D

10 0 K _ 1 % _ 0 4

OCP=10uA X RILIM / Rdson

*0 . 1 u _ 5 0V _Y 5V _ 06

E N_ 1 V S

A

10/22 1.0V=>1.054V

P R7 7

2
3m m

V O UT

8

E N_ 1 VS

1 VS

PJ 1 8
1

V O UT
3

1 0 u_ 6 . 3 V _ X 5 R _ 0 6

S

B.Schematic Diagrams

EN
11

N.C

I LI M

12

1.1V

0 . 1 u _ 10 V _ X 7 R _ 0 4

2

16

13

14

1

PC 9 2
PJ 2 3
O P E N -1 mm

3 .3 V

PC9 4

6 2 K _ 1 % _ 04

PC 8 7

R B 0 5 40 S 2
P R7 1

P C9 3
5 6 0u _ 2 . 5 V _ 6 . 6 *6 . 6 *5 . 9

P R 1 97

29 , 3 0 , 3 2 D D _ O N #

P C8 8

*4 . 7 u _ 2 5V _ X 5 R _ 0 8

0 . 1 u_ 1 0 V _ X 7 R _ 0 4

4 . 7 u _ 25 V _X 5R _ 0 8

PD 1 4

D

P C 89

M TN 7 0 0 2Z H S 3

C

SU SC

0 .1 u _ 5 0 V _ Y5 V_ 0 6

E N _ 1 .1 V

PQ 3 0
G

* 6 2K _ 1% _ 0 4

S

3 0 , 35

PR 7 2

5
6
7
8

PR 7 0
1 0 0 K _ 1 % _0 4
SU SC

A

5V

Schematic Diagrams

Power 1.8VS
5V

3

17

PQ21B
*AP6901GSM

PC61

PC62

2
5mm

+

1.8VS

PJ6
1

PC60

PAD

PC59
*560u_2.5V_6. 6*6.6*5.9

7

8

DL

3
4

V1.8S

4A

1.8VS

*1u_10V_Y5V_06
*10mil_short

*0.1u_10V_X7R_04

PR45

Sheet 34 of 41
Power 1.8VS

PC63

PC64
*14K_1%_04 *20p_50V_NPO_04
*0.01u_16V_X7R_04

PR46

PC65

*10K_1%_04 *20p_50V_NPO_04

3.3V
PC217

5V

0.1u_16V_Y5V_04

PC224
PC221
1u_10V_Y5V_06

10u_6.3V_X5R_06

3A
1.8V_PWRGD
EN_1. 8V

PU12
5
9 VIN
7 VIN
POK
8
1

VCNTL
VOUT
VOUT

6

VFB

PJ22
1

3
2

1.8VS
2

3mm
PR204

EN
GND

V1.8 S_REG

3A

4

Ra

PC222

PC223

PC220

12.7K_1%_1/16W_04
10u_6.3V_X5R_06
82p_50V_NPO_04
10u_6.3V_X5R_06

AX6610
PR205

Rb

10K_1%_04

Vout = 0.8V ( 1 + Ra / Rb )

Power 1.8VS B - 35

B.Schematic Diagrams

PR44

PL3
*TMPC0603H- 4R7M-Z01
1
2

1
2

PC54

5
6

VCC

FB

PC58

4

15

16
DH

14

BST

VOUT

220K_1 %_04
1.8V_PWRGD

N.C

N.C

PGD

N.C

PR43

1
2

PQ21A
*AP6901GSM
8

*0. 1u_10V_X7R_04
LX

GND

9

PU3
*uP6127

5

10

RTN

3.3V

EN

6

11

N.C

12

ILIM

13

0.01u_16V_X7R_04

PC53

*0.1u_16V_Y5V_04

MTN7002ZHS3 *0.1u_10V_X7R_04

PC57

19 1.8V_PWRGD

PC52

*RB0540S2

*. 1u_50V_Y5V_06

PD10

D

G

*4.7u_25V_X5R_08

*15K_1%_04

7

10K_ 1%_04

PR41
PC56

C

PR42

S

SUSB

PQ20

*4.7u_25V_X5R_08

EN_1.8V

A

PR40
100K_1%_04
30, 32,33,36 SUSB

VI N

OCP=10uA X RILIM / Rdson

5V

Schematic Diagrams

APU CORE/ NB CORE
Of fse t &
Dr oop
O

O FS/V FIX EN
GND
+3 .3V
+5V

SV I
O

VF IX

X
O

O
X

X
X

V DDCR_ CP U

X

EMI

P R 10 9
10 _0 4
N B _V D D C R

C 78 9 0 . 1u _10 V _X 5R _0 4

C 79 0 * 0. 01 u_ 16V _ X7 R _04

C PU _ V D D N B_ R U N _F B _H 3

M eta l VI D C ode s

1 .2
1 .0

1

0 .8

P R 11 4
10 _0 6

C

1
PD 2 0

P Q43
MD S 26 55

4

1

P C 13 9
4. 7 u_ 25 V_ X5 R _0 8

2

5
6
7
8
P H A S E_ N B

L GA TE _N B

*3 30 U _2 5V

N B _V D D C R P J1 9 VD D C R _N B
P L8

P R 1 16
8 . 2K _1 %_0 4

C 79 1 0 . 1u _10 V _X 5R _0 4

P C 1 40

T MP C 06 03H -R 6 8M-Z 01
2

P R 21 7
5 . 1_0 6

+

P C 23 4
2 20 0p_ 50 V_ X7 R _0 4

10 A

+

1

2
*8 mm

P C 14 4
*3 30 u_2 . 5V _V _ A

1
0

1

P Q42
MD S 26 59

V IN

+

P C 143
56 0u_ 2. 5 V_ 6. 6 *6. 6* 5. 9

0
1

4

A

1 .4

P C 14 7

0

P C 14 6
0. 1 u_ 50 V_ Y5 V _06

0

V IN

U GA T E_ N B

*C S OD 140 S H

SGN D 5

O utp ut

P C 1 45
1 0u _6 .3 V _X 5R _0 8

SGN D 5

S VD

P H A SE _0

S VC

P GN D _0

33

P H A SE _ 0

4

P R 13 1

0 _0 6

E N AB L E
7

P R 1 34

P C 16 5

2 55 _1 %_0 4

S GN D 5

PR 1 33
62 K_ 1%_ 04

PR 1 32
54 .9 K _1% _0 4

4 70 0p_ 50 V_ X7 R _0 4

P R 13 5

8

31
LGA TE _0

R B I AS

LGA TE _1

V D I FF _0

P GN D _1

10

A

+

29

P C 153
*4. 7 u_ 25V _ X5 R _0 8

P C 15 2
*4 . 7u_ 25 V_ X 5R _ 08
+

P C 163
2. 2 u_6 . 3V _Y 5 V _06

2
*8mm

I S P _0
28

F B_ 0

P H A SE _1

C OMP _0

U GA TE _1

27
IS N_ 0

P C 16 6

6 .8 K _1% _0 4

I SN _ 1

I S P _1

P R 1 39

5V

24

23

VW _1

C OMP _1
22

21

VD I F F _1

F B _1
20

V SE N _ 1
19

17

18

RT N_ 1

R TN _ 0
16

15

V SE N _ 0

B OOT_1
I S N _0

V W_ 0

1 00 0p_ 50 V_ X7 R _0 4

14

P C 168

25
I SP _0

P R 137
PC 1 67
18 0p_ 50 V_ N P O_0 4

26

12

I S P _1

10 0K _0 4

I SN _ 0

S US C

P R 14 4

*0 _0 4

P R 14 7

*0 _0 4

P R 20 9

0 _0 4

3. 3 VS

3 C P U _V D D 0 _R U N _ FB _ L

U4 6
P R 14 9
10 _0 4

33 1 VS _ PW R GD

EN _ V C OR E

G

19 , 32 D D R 1 . 5V _P W R GD

1 0K _1 %_ 04

4
2

G

1 . 8V S

3, 1 5 AP U _ PW R GD

3. 3V S

R 6 82
1 0K _0 4

MTN 7 00 2Z H S 3

Q29

S

D

AP U _P W R GD _R

*0 . 1u _10 V _X7 R _0 4

P C 17 2
P Q46
MT N 700 2Z H S 3

G

P J1 6
OP EN -1 mm
PQ4 7
MTN 7 00 2Z H S3

P C 17 1

*74 AH C 1 G08 GW

1

3

P R 14 8

5

3 C P U _V D D 0_ R U N _F B _H

1 . 5V

Z 33 01
1

V C OR E _ON

3 0, 3 3

2

P C 1 69
0 . 1u _5 0V _Y 5 V_ 06

S

P R 1 40
4 . 02 K_ 1%_ 04

P R 143
*10 mi _l sh ort

C P U _V D D C R

I S N _1
27

C los e to
C PU
s ock et

51 0K _0 4

PR 1 45

7. 5 K_ 1% _0 4

P R 14 2
*1 0mi l _sh ort

P R 14 1
10 _0 4

PR 1 38

D

I SP _0

D

1 00 0p _5 0V _X 7R _0 4

S

11
5 4. 9 K_ 1%_ 04

B - 36 APU CORE/ NB CORE

PC 1 51
4 . 7u _2 5V _X 5R _ 08

2 20 0p_ 50 V_ X7 R _0 4

30

P V CC

OC S ET

P C 15 0
4. 7 u_2 5V _X 5 R _0 8

P C 15 8

LGA TE _0
5 VS

9

1 K _1% _0 4

P R 1 36

ISL6265C

6

32

PC 1 61

EN _ V C OR E

P R 12 9
*1 0m li _s ho rt

0. 0 1u _50 V _X 7R _ 04

5

P R 12 8
*1 0m li _s ho rt

0 . 22u _1 0V _Y 5 V_ 04

4

* 10m li _s ho rt

P R 21 8
5 . 1_0 6
P D 21
*C S OD 1 40S H

V D D C R _ C PU
PJ 20

1

P C 16 2

* 10m li _s ho rt

P R 13 0

P Q45
MD S 26 55

C P U _V D D C R

1 1A

P C 16 0

P R 12 7

U GAT E _0

U GA TE _0

Pin 49 is GND Pi n

P L9
T MPC 0 60 3H -R 6 8M-Z 01
1
2

4

*1 5u _2 5V _6 . 3*4 .4 _C

10u _6 . 3V _X 5R _ 08

34
P WR OK

P Q44
MD S 26 59

P C 15 5
0 2. 2u _1 6V _0 6

+P C 15

PC 1 59

C PU _ SV C

3

*0. 1 u_ 50V _ Y 5V _0 6

P C 16 4 *3 30 u_2 . 5V _V _ A

C PU _ SV D

3

* 10m li _s ho rt

2
3
1
PR 125
1_ 1% _0 6

35

B OOT_0

2
3
1

3

P R 12 6

*0 .1 u_ 50 V_ Y 5V _0 6 0. 1 u_ 50V _ Y 5V _0 6

4

36

B OOT _N B

P C 157

560 u_ 2. 5 V_ 6. 6* 6. 6*5 . 9

AP U _ PW R GD _R

P GOOD

P C 14 9

C

2

*1 0mi l _sh ort

P C 15 6

5
6
7
8

PR 1 20
1_1 %_ 06

S GN D 5
PR 1 24
1 9 P WR GD _ VC OR E

V IN

P U9

5
6
7
8

37

39

40

38

U GA TE _ N B

P H A SE _ N B

LGA T E_ N B

P GN D _N B

R TN _ N B

41

42

P R 118

PC 1 48
0. 22 u_ 16V _ 06

OC S E T _N B

OF S/ V F I XE N

43

44

46

45

47

49
1

V SE N _ N B

*10 K_ 06

F S E T_ N B

P R 12 3

F B_ N B

*0_ 06

C OMP _N B

P R 12 1
1 0K _0 4

P R 12 2

V CC

3 . 3V S

GN D

5 VS

0_0 6

48

S GN D 5
P R 11 9

VI N

3. 3V S

P R 11 7

P R 115
44 . 2K _1 %_0 4

Sheet 35 of 41
APU CORE/ NB
CORE

13

B.Schematic Diagrams

V FIX EN V ID Cod es
SV C
SV D

PC 1 38
4 . 7u _2 5V _X 5R _ 08

1 u_1 0V _Y 5V _0 6
P R 11 2
*1 0mi l _s hort

P R 11 1
10 _0 4

S GN D 5

2
3
1

S GN D 5

5
6
7
8

0 .8

P C 13 7

2
3
1

1

P R 11 0
10 _0 6

*10 mi _l sh ort

1

5V S
2 2K _ 1%_ 04

1 .0
0 .9

1 00 0p_ 50 V _X 7R _ 04

0

10 00 p_5 0V _ X7 R _0 4

1

P C 14 1
*1 0mi l _s hort

0
1

C PU _ V D D N B_ R U N _F B _L 3

3 3p_ 50 V_ N P O_0 4

O utp ut
1 .1

P R 1 13

SV D
0

P C 142

SV C
0

0. 1 u_ 10 V_ X7 R _0 4

Schematic Diagrams

VGA POWER
Table: VDDC_OPT_VID
1.15V

1.05V

VID0

0

1

VID1

0
SE T0

0
SE T1

1.0V

0.9V

0

1

1
SE T2

1
SET 3

3 . 3V S _GP U

P R9 1

5V

VI N

* 10 K_ 04
MX M_P W R GD

15 MX M_ PW R GD

? ? VGA default? ? ?

P C 1 18
P C 11 3

A

? ? ? ? ? ? ? ? ? ? ? VGA? ? ? ? ?

* 10 0p _50 V _N P O_ 04

PD 1 8

* 17 . 4K _1 %_ 04

PR 9 8

* 18 . 7K _1 %_ 04

PR 9 6

* 21 . 5K _1 %_ 04

P C 11 7
*0 . 1u _5 0V _Y 5V _0 6
PL 7
*1. 0 U H _6 . 8* 7. 3* 3. 5

21
20
19
18
17
16

*12 K _1 %_ 04
A

*22 00 p_ 50 V _X 7R _ 04

* 47 p_ 50 V_ N P O_0 4

P R 1 04
* 10 0K _1 %_ 04

VDDC
2

* 8mm

V GA_COR E

P C 1 25
* 0. 01 u_ 50 V _X 7R _ 04
PC 17 0

3 . 3V

*0 . 1u _1 0V _X 7 R _0 4

P C 1 24
PR 9 4
*22 _0 4

P J 12
1

+

PR 19 3
*C S OD 1 40 SH P C 12 2

*1 u_ 16 V_ X5 R _ 06
PR 9 3
*1K _ 1%_ 04

V GA _ VC OR E

P D 19

P C 12 3

*5 60 u_ 2. 5 V_ 6. 6 *6 .6 *5 . 9

*0. 0 1u _5 0V _X 7R _ 04

13A

P R 92
*5. 1 _0 6

P Q38
*ME 46 26 -G

4

P R 89
*3 3K _ 1%_ 04

11
12
13
14
15

PC 1 27

P U7
*u P6 12 2

P C 12 1

*0_ 04

S ET 3
S ET 2
S ET 1
S ET 0
FB

G ND
P HA SE
LG
V CC
RT
CSP

P C 11 9

PR 95

*10 . 2K _1 %_ 04

6
7
8
9
10

1 2/8 Delete PC120

*0. 1 u_ 50 V _Y 5 V_ 06

3 . 3V
Q1

S

P C 1 73
* 0. 1u _5 0V _ Y 5V _ 06

P R 21 4

D

3 . 3V S _GP U

300mA

Sheet 36 of 41
VGA POWER

*A O3 40 9
*3K _ 1% _0 4

C 1 68
C 1 69

MX M_P W R E N #

D

G

P R 19 4

*10 K _0 4

* 10 u_ 6. 3V _ 08 _H 1 25
*2 20 0p _5 0V _ X7 R _0 4

P Q63
*MT N 70 02 ZH S 3
PR 8 4

3. 3 V

* 10 0K _0 4

P J 24
2

* 6mi l
1

P J 25
2

* 6mi l
1

R8 3
*1 K _0 4

12/10
3. 3V S
3. 3 V S_ GP U

ON

R OB S ON _ GPI O1 5

8 R OB SON _GP I O15

P R 88
P C 1 16

R8 4

*1 0K _0 4

P R 21 2

*0 _0 4

*1 00 K _0 4

R8 8
* 10 K_ 04

D

G
S

MXM_ PW R E N

Q2

MX M_P W R E N 7
G
MV D D Q

Q3

R9 0

*M TN 7 00 2Z H S 3

*1 M_0 4

*MT N 70 02 Z H S 3

P R8 7

*1 00 K _0 4

7 , 15 M XM_ GP IO 1

*1 00 K _0 4

MX M_GP I O1

R 68 4

* 0_ 04

SUS B

R 91

* 0_ 04

G
S

P R8 6

*0 _0 4

D

P R 21 3

S

*2 20 0p _5 0V _ X7 R _0 6
R OB S ON _ GPI O1 6

8 R OB SON _GP I O16

12/7

NMOS
1. 5 V
Q19
*P 12 03 B V
8
7
3
6
2
5
1

1. 8 V _R E G

2A

PJ 14
2

R 5 65
3

R 56 6

P Q3 9A
* MTN N 2 0N 0 3Q8
8
2
7
1

3

*10 0K _ 04

R 56 7

*1 0u _1 0V _ Y 5V _0 8
*0 . 1u _1 6V _ Y 5V _0 4

*1 00 _0 4

5V

P R 10 6

5
6

1 . 5V _P G

*1 u_ 10 V _Y 5 V _0 6

G

Q23
*MT N 70 02 Z H S3

8

*10 K _0 4
D

P C 1 31

* 0. 02 2u _5 0V _ X7 R _0 4
S

*MTN N 20 N 03 Q8
Q20 B

P R 10 5
3. 3 VS

D

D

P C 1 36

2
*OP E N _3 A

P U8
5
9
7

P J1 5
1

C 7 87

4
6

Q 22

*MTN 7 00 2Z H S 3
G

5

120MIL

2A

* 1M_ 04

* 10 0_ 04
C 7 88
*0 . 02 2u _5 0V _X 7R _ 04

5V
P C 1 30

PC 1 29

*10 u_ 6. 3 V_ X5 R _ 08
*0. 1 u_ 16 V_ Y 5V _ 04

G
S

1

*OP EN _5 A
C 78 6
*10 u_ 10 V _Y 5 V_ 08
*0. 1 u_ 16 V _Y 5 V_ 04
C 78 5

PC 1 28

1 . 8V S

1
PQ4 0

PC 1 35

*1U _ 6. 3 V_ Y 5 V_ 04
*MTN 7 00 2Z H S 3

1021 delete

S

200MIL

*1 M_0 4
F B V D D Q_P W R _E N

1 .5 V

NM OS
S Y S 15 V

4

R 5 64

Q20 A
*MT N N 20 N 03 Q8
8
2
7
1

MVD D Q

4

S Y S 1 5V

*M TN N 2 0N 0 3Q8
P Q3 9B

V IN
V IN
P OK

V C N TL
V OU T
V OU T

6

VFB

1.5A

3
P R 1 07

EN
GN D

R E G_ 1 . 0V

4

2

Ra

P C 1 32

P C 13 3

1 .0 V _ REG
P J2 1
1

2

*OP E N _3 A
P C 13 4

*2 . 61 K _1 %_0 4
*1 0u _6 . 3V _X 5R _ 08
*8 2p _5 0V _ N PO _0 4
*1 0u _6 . 3V _X 5R _ 08

* AX 66 10
P R 1 08

Rb

*1 0K _ 1% _0 4

Vout = 0.8V ( 1 + Ra / Rb )
ON
PR 19 8
PR 20 1

P R 19 9

*0 _0 4 MXM_ P WR E N #

PR 20 0

*0_ 04 MX M_P W R E N #

P R 20 2

*0 _0 4 SU SB

PR 20 3

*0_ 04 S U S B

*0_ 04 MX M_P W R E N #
*0_ 04 S U S B

ON
S US B

3 0, 3 2, 3 3, 3 4

VGA POWER B - 37

B.Schematic Diagrams

PR 97

P Q36
*ME 4 89 4-G
4

C

PR 1 00

*10 . 2K _1 %_ 04

PC 11 5

2
3
1

*10 . 2K _1 %_ 04

PR 99

* 0_0 4

5
6
7
8

PR 10 1

P R 1 50

2
3
1

* 14 . 7K _1 %_ 04

5
4
3
2
1

PR 1 02

C

* 0_ 04

*10 K _1 %_0 4

EAP
SS
P OK
UG
B OOT

P R 1 51
PR 10 3

P C 11 4

*4. 7 u_ 25 V _X 5R _ 08 *4. 7 u_ 25 V _X5 R _ 08
*0 .1 u_ 50 V _Y 5 V _0 6

*R B 0 54 0S 2

5
6
7
8

*10 00 p_ 50 V _X 7R _ 04

C OM P
VID0
VID1
E N / P SM
CS N

PC 12 6

Schematic Diagrams

CHARGER/ DC IN
4
P Q 49 A
A P 6 9 01 G S M

0. 1 u _ 50 V _ Y 5 V _ 06

0. 1u _ 50 V _ Y 5 V _0 6

4 . 7 u_ 2 5V _ X 5 R _ 0 8

P C1 9 0

4 . 7 u _2 5 V _X 5 R _0 8

P C 18 8

4. 7 u _ 25 V _ X 5R _ 08

P C 1 87

P C1 8 9

4 . 7 u _2 5 V _ X 5R _0 8

* 4. 7 u _2 5 V _ X 5R _ 08

4. 7u _ 25 V _ X 5 R _ 08

4

P Q 4 9B
A P 6 9 0 1G S M

P C1 8 5

3

P C 1 86

B C I H P 0 7 30 -6 R 8 M

5
6

PL 1 1

8

0 . 1 u _5 0 V _Y 5 V _ 0 6

V _B A T

PR1 5 5
0. 02 _ 1% _ 3 2

7

P C1 8 4

0. 01 u _1 6 V _ X7 R _ 0 4

0. 1 u _ 50 V _ Y 5V _0 6

1 0 K _ 1% _ 04

P C 1 81

P C1 7 9

P C1 8 3

P R 1 59

4. 7 u _ 25 V _ X 5R _ 08

0 . 1 u_ 5 0 V _Y 5 V _ 0 6

1 3 0K _1 % _0 4

4 . 7 u _2 5 V _X 5 R _0 8
P C1 8 0

0 . 1 u_ 5 0 V _Y 5 V _ 0 6

P R1 5 6
1 0 K _ 04

P C 1 82

0 . 1 u_ 5 0 V _Y 5 V _ 0 6

P R 1 54

2
1

*1 u _2 5 V _0 8

P C 17 7

4

P C 17 6

PC2 3 5
PR1 5 3
0 . 02 _ 1 %_ 3 2

3
2
1

P R 15 7
20 0 K _ 1% _ 04

P C 17 5

PQ 5 0
P 2 0 0 3E V G
8
7
6
5

# Char g e Volt age 1 2.6V

P Q 48
P 2 0 03 E V G
5
6
7
8

1
2
3

VA
PL 1 0
H C B 4 53 2 K F -8 00 T 6 0

1
2
GN D 1
GN D 2

VA
V IN

P C1 7 8

J A CK 1
J D D -5 2 0 48 A S 1 F - 1 65

# Char g e Cur r ent 1.5A

CHARGER

6-20-B3Z40-004 for 30W
6-20-B3410-003 for 65W

TOTAL
POWER
ADJ

P C 20 5
2 0 0 K _0 4

1 0 K _ 1% _ 0 4

*0 _0 4

R5 6 8
V O LT _ S E L

P R 17 3

P R 1 67

P R 18 1

P C 21 1

6 0 . 4K _ 1 % _0 4

0 . 1 u_ 5 0 V _Y 5V _ 0 6

B A T _ DE T
P C2 0 6
*2 2 p_ 5 0V _ N P O_ 04
P C2 0 9
1 0 00 p _ 50 V _ X 7R _0 4 P R 17 7

S G ND6

22 K _ 1 %_ 0 4
P C2 1 0
1 0 00 p _ 50 V _ X 7R _0 4 P R 17 9
S GN D 6

S GN D 6

S GN D 6
27

S GN D 6

B A T _V O L T

1 0 K _1 % _ 04

C
AC
A
D3 2
*B A V 9 9 R E C TI F I E R

P C 2 36
TO T A L_ C U R
CU R_ S E NS E

C E L LS C

E

G

5

P R 1 83
27
27
27

1 0 2 K _1 % _ 04
P R 18 4

SY S3 V

P R 18 6
* 17 . 4 K _ 1% _ 04

2 M_ 1 %_ 0 4

G

G

S

7 6 . 8 K _1 % _ 04
S

MT N 70 0 2Z H S 3
P R1 8 9

1 0 0K _0 4

D

P R 1 88

P Q5 7

1 0K _ 0 4

P Q 5 8A
C T L1
D

F RO M E C: #1 23 /(P D) CTX /G PB2

P R 1 92
1 M_ 0 4

PR1 9 0

0. 1u _ 50 V _ Y 5 V _ 06

6- 2 1 -D 3 4 B0 - 1 05

M TN 7 00 2 Z H S 3

5
4
3
2
1
JB A TT A 1
* B TD -0 5T C 1 B

P Q 59

G
2 7 C E LL _ C O N T R O L

VH =3 S
VL =4 S

P C 21 2
0 . 0 1u _ 50 V _ X 7 R _ 04

1
2

S

S

P Q5 8 B
5 MT D N 70 0 2 Z H S 6 R

G
4
P J 17
O P E N -1 m m

W250BUQ
P C2 3 7

V H= 4.2 V
V L= 4.3 V

* MT N 7 0 02 Z H S 3

D
2

S

P Q5 6
MT N 7 0 0 2Z H S 3

S

3
D

P C 23 3

V C H G_ S E L 2 7

G

C E CL M
6

P C 23 2

4
3
2
1
JB A TT A 2
B T D -05 T I 1G

3 0p _ 5 0V _ N P O_ 04
3 0p _ 5 0V _ N P O_ 04
3 0p _ 5 0V _ N P O_ 04

P R 1 87
P Q5 5

1

H C B 10 0 5K F -12 1 T2 0
H C B 10 0 5K F -12 1 T2 0
H C B 10 0 5K F -12 1 T2 0
P C 23 1

P R 1 85
1 0 0 K _0 4

D B

P Q5 4
D T A 11 4 E U A

G

S M C_ B A T
S M D_ B A T
B A T _ DE T

P L1 2
P L1 3
P L1 4

V OL T _S E L

MT N 7 0 02 Z H S 3

MT D N 70 0 2Z H S 6 R

W240BU

PIN17t h CONNECT
T OBAT CONN.

C H G-C U R R E N T

D

P Q5 3

0. 1 u _ 50 V _ Y 5 V _ 06

V_ BAT

0. 5V/ 1A
0. 5V/ 1A

SYS3 V

B - 38 CHARGER/ DC IN

S MD _ B A T

CHARGE
CURRENT
ADJ

S G ND6

*1 0m i l _s h ort _0 4

C H G_ E N

4 9 . 9 K _1 % _ 04

P R 1 72

1 0K _ 0 4

C
AC
A
D2 9
*B A V 9 9 R E C TI F I E R
C
AC
A
D3 0
*B A V 9 9 R E C TI F I E R
C
AC
A
D3 1
*B A V 9 9 R E C TI F I E R

S MC _ B A T

S G ND6

1 0 K _ 1% _ 0 4

P R1 8 2

27

V DD3

C T L1

D

P R1 8 0
2 0 0K _ 1 % _0 4

SY S3 V

0 . 1u _ 5 0V _ Y 5 V _ 0 6

G

B A T _V O L T

P R1 7 6
2 0K _1 % _0 4

PR17 0 : 3 .65 K f or 3 0W

P R 17 8
3 0 0K _ 1 % _0 4

P C2 0 2

1 K _ 1 %_ 0 4
0 . 0 1 u_ 5 0 V _X 7 R _ 0 4

PR17 0 : 1 0K fo r 65 W

24
23
22
21
20
19
18
17
33

P C 2 04

* 0. 1 u _5 0 V _ Y 5 V _ 06

P Q 52
A O3 4 09
S
D

P C2 0 3
1 0 0p _ 5 0V _ N P O_ 04

V IN
CT L 1
G ND
VR EF
RT
C S
ADJ 3
BATT
SG ND

P R1 7 4

S G ND6
MT N 7 0 02 Z H S 3

P R 1 71

V_ BAT

MB 39 A 1 32

P R 1 68

G
S

1M _ 04

P R1 7 0
3 . 6 5K _ 1 %_ 0 4

P Q5 1
P R1 6 9

VA

TRERMAL PAD

*0 _ 04

39 . 2 K _ 1% _ 04

D

1 6, 2 7 , 2 9

V CC
-I N C 1
+I N C 1
A CIN
A C OK
-I N E 3
A DJ 1
C OM P 1

0 . 1 u _5 0 V _Y 5 V _ 0 6

1
2
3
4
5
6
7
8

P R1 6 5

VA

0 . 1 u_ 5 0V _ Y 5 V _ 06

P U 10

10 K _ 0 4
A C_ IN#

P R1 6 3

C E LL S

VA
32
31
30
29
28
27
26
25

P C 1 99

P C 2 08

PR1 6 6

A C IN

PIN 25th
FOR2S CONNECT TO GND
FOR3S CONNECT N.C.
FOR4S CONNECT TO VREF PIN

P C 20 7

V DD 3

31

P C 1 98

C T L2
CB
O U T -1
LX
VB
O U T -2
P GN D
C E LL S

0 . 1 u_ 5 0 V _Y 5V _ 0 6

P R1 6 1

P C 20 1

0 . 1u _ 5 0V _ Y 5 V _ 0 6

* 0. 1 u _5 0 V _ Y 5V _ 0 6

P C2 0 0

0 . 1 u_ 5 0V _ Y 5V _ 0 6

P R1 6 0

P C 19 7

A
R B 05 4 0S 2

* 0. 1 u _5 0 V _ Y 5V _ 0 6

0 . 1u _ 50 V _ Y 5 V _ 0 6

PC1 9 5
1u _ 10 V _ Y 5 V _ 0 6

C

P R1 6 4

P C 19 6

0 . 1 u _5 0 V _Y 5 V _0 6
P D 22

V IN

Sheet 37 of 41
CHARGER/ DC IN

P C1 9 1

-IN E 1
OU T C 1
O UT C 2
+I N C 2
-INC 2
AD J 2
C O MP 2
C OM P 3

0 . 1 u _5 0 V _ Y 5 V _0 6

9
10
11
12
13
14
15
16

PC1 9 4

0 . 1 u_ 5 0V _ Y 5V _ 0 6

0_ 0 4

0_ 0 4

P C 19 3

0 . 1 u_ 5 0 V _Y 5V _ 0 6

10 0 K _ 1% _ 0 4

P C 19 2

S

B.Schematic Diagrams

V_ BAT

P R 19 1

1. 5 M_ 0 4

*1 5 m li _ sh o rt _ 06
S GN D 6

S G ND 6

Schematic Diagrams

Click Board
CLICK BOARD

6- 21-9 1A00 -106
6- 21-9 1A20 -106

CGND

SG

CD26
*KPB-30 25YSGC

4

Y

SG
4

Y

CGND

CGND

*KPB-3025YSGC

B AT LED

3

1

1
CLED_PWR
2
CLED_ACIN
3
CLED_BAT_FULL
4
CLED_BAT_CHG
5
6
*85201- 06051

CGND

CD27

2

CJ_ TP3

1
CTP_CLK
2
CTP_DATA
3
CTPBUTTON_L
4
CTPBUTTON_R
5
6
85201- 06051

Sheet 38 of 41
Click Board

CGND CGND

6-5 2-55 002 -042
6-5 2-55 002 -04E

6-52 -550 02-0 42
6-52 -550 02-0 4E

6-21 -91A 00-1 06
6-21 -91A 20-1 06

For W250BUQ
CSW1~4
4
3

CSW1
TJG-533-S-T/R

2
4

1
3

CTPBUTTON_L

CGND

CSW2
TJG-533-S-T/R

CH3
1

9
8
7
6

2
3
4
5

MTH237D91
CGND

2
4

CSW3
*TJG- 533-S- T/R
2
4

CH1
1

9
8
7
6

2
3
4
5

CGND

CH4
1

9
8
7
6

2
3
4
5

MTH237D91
CGND

CGND

RI GHT
K EY

1
3

CTPBUTTON_L

CGND

6-5 3-30 50B- 041

MTH237D91
CGND

1
3

CTPBUTTON_R

CGND

6-53 -30 50B- 041

2
3
4
5

LI FT
KE Y

5
6

1
3

RIG HT
KE Y

5
6

LIF T
KEY

1

9
8
7
6

CTPBUTTON_R

CGND

6-5 3-30 50B -041

CH2

CSW4
*TJG-533-S-T/R
2
4
5
6

2
1

5
6

CGND

6- 20-9 4A50 -104
6- 20-9 4AA0 -104
6- 20-9 4A70 -104

CJ_TP2

2

CGND

CH5
C95D9 5

6-5 3-3 050B -041

CH6
HO-165X94_5NP

MTH237D91
CGND

CGND

CGND

Click Board B - 39

B.Schematic Diagrams

CJ_TP1
1
CTP_DATA
2
CTP_CL K
3
4
85201-0 4051

CGND

CR3
CR4
*220_04 *220 _04

POW ER O N
LED

1

CR1
CR2
*220_04 *220_04

CC3
*0.1u_16V_Y5V_04
CVDD3

1

CGND

CLED_BAT_FUL L

2

CC2
*0. 1u_16V_Y5V_04
C5VS

CLED_BAT_CHG

CLED_PWR

3

CC1
0.1u_16V_Y5V_04
C5VS

CLED_ACIN

Schematic Diagrams

Audio Board/ USB
USB PORT
A R7 3 5

0 _0 6
A_ US B V CC
AL 1
H C B 1 60 8 K F -1 2 1T 2 5

A_ US B V C C2

60 mil

A _U S B V C C
AU 1
5

6
F L G# V O U T 1

5 0mi ls

2
3
4

A C3

A C4

*0 . 1 u_ 1 6V _Y 5V _ 0 4

0. 1 u _ 16 V _ Y 5 V _ 0 4

A J _ US B 1
A R1

8
V IN 2 V O UT 3

1 0u _ 1 0V _ Y 5 V _ 0 8

E N#

G ND

A G ND

1

6-02-09715-920

A GN D A G N D

*1 0 mi l _ sh o rt _ 04

1
V+

A US B _ P N2

4

A US B _ P P 2

1
2
*W C M2 0 12 F 2 S -1 6 1T 0 3

A G ND

3

A US B _ P N2 _ R

2

A US B _ P P 2 _ R

3
4

*1 0 mi l _ sh o rt _ 04

D A TA _ L
D A TA _ H
G ND

U S 0 4 03 6 B C A 0 8 1

GN D 1
GN D 2
G ND 3
GN D 4

A R2

B.Schematic Diagrams

A GN D

AL 1 2 2

* R T 9 71 5 B GS
A GN D

0 . 1u _ 1 6V _ Y 5V _ 0 4

7
V IN 1 V O UT 2

A C5

A C2

G ND 1
GN D 2
G ND 3
GN D 4

A_ 5 V

+A C 1
* 10 0 u_ 6 . 3 V _ B _A
2 2 u _6 . 3 V _ X5 R _0 8
A C1 0

50m ils

6-21-B49C0-104

A G ND

Sheet 39 of 41
Audio Board/ USB

TO M/B

AUDIO JACK

EMI Require

A M I C 1 -R

A L1 213

2

F C M1 0 05 K F -1 2 1T 0 3

A M I C 1 -L

A L1 214

2

F C M1 0 05 K F -1 2 1T 0 3

A C 7 92
A_ 5 V

5 A J _ MI C 1
4
3
R

A M IC_ S E N S E
M I C 1 _ OU T _ R
M I C 1 _ OU T _ L
N C _M I C 1

2
6
L
1
2S J -T 3 51 -S 2 3

A C7 9 3

A J _ A U D I O1
* 1 00 p _5 0 V _ N P O _0 4 *1 00 p _ 50 V _ N P O _ 04
1
2
3
4
5
6
7
8
9
10
11
12
13
14

A M I C 1 -R
A M I C 1 -L
A H E A D P H ON E -R
A H E A D P H ON E -L
A M IC_ S E N S E
A S P K _H P #
A H P _ S E NS E
A U S B _ P N2
AU SB_ PP2
A S P K OU T R +
A S P K OU T R -

R esi stor 3 2 or 3 3_0 4
m ee t WLK Te st
VT1802P
33_1%_04
10/28 Modify value
A H E A D P H O N E -R

A R5 6 9

1 8 0_ 1 % _0 4

P H O N E -R

A L 1215

2

F C M 1 00 5 K F -1 21 T 0 3

A H E A D P H O N E -L

A R5 7 0

1 8 0_ 1 % _0 4

P H O N E -L

A L 1216

2

F C M 1 00 5 K F -1 21 T 0 3
A C 7 94

La y out not e :
He adphone ? ? ? ? > 1 0mi ls
? ? phone ja ck ? ?
?? ?? ?? ?
R/L? ? ? ? GND ? ? ? ? 3*? ?

8 52 0 1 -14 0 5 1-0 1
A _ A U DG A G ND

Reverse

MIC IN

6-20-B2800-106

BLACK
A _ A UD G

*1 0 0 p_ 5 0V _N P O_ 0 4

5 A J _ HP1
4
3
R

A HP _ S E N S E
P H O N E _ OU T_ R

2
L
6
1
2S J -T 3 51 -S 2 3

P H O N E _ OU T_ L
A S P K _ HP #
A C7 9 5
*1 00 p _ 50 V _ N P O _ 04

HEADPHONE

BLACK 6-20-B2800-106

EMI Require

A _ A UD G

3
4

2
1

A C6

0 . 1 u_ 1 6V _Y 5V _ 0 4

HP -L

A C7

0 . 1 u_ 1 6V _Y 5V _ 0 4

HP -R

A C8

0 . 1 u_ 1 6V _Y 5V _ 0 4

A C9

0 . 1 u_ 1 6V _Y 5V _ 0 4

G ND

5

6

3* R/ L? ?
G ND

A L 12 7
*F C M1 6 0 8K -1 2 1 T0 6 _ sh o rt
A S P K OU TR +
A GN D

A _ A UDG
A C7 9 6

A C7 9 7

*1 u _1 0 V _ 06

*1 8 0p _ 5 0V _ N P O_ 0 4
A J _ S P K R1
A _A U D G

A S P K OU TR *F C M1 6 0 8K -1 2 1 T0 6 _ sh o rt
A L 12 8
J_SPK1
AH 1
C 59 D 59

A H3
C5 9 D5 9

2
3
4
5

A H2
1

9
8
7
6

2
3
4
5

M TH 2 76 D 1 1 1
A GN D

B - 40 Audio Board/ USB

A H4
1

9
8
7
6

MT H 2 7 6 D 1 11
A GN D A G N D

A G ND

2

A C7 9 8

A S P K O UT R+ _ R
A S P K O U T R -_ R

1
2

J_SPK1
2 1

85 2 0 4-0 2 0 01
P C B F o ot p ri n t = 8 5 2 04 -0 2 R

*1 8 0 p_ 5 0V _N P O_ 0 4

1
A _A U D G

6-20-43150-102
6-20-43110-102

Schematic Diagrams

Power Switch & LID Board
POWER SW & LED & HOT KEY
S _ 3. 3 V S

S _3 . 3 V

POWER
SWITCH
LED

S _ 3 . 3V
S R2
S _ 3. 3 V S

SD2
*B A V 99 R E C T I F I E R

S _ 3 .3 V
22 0 _0 4

20 mi l

S R1
SJ _ SW 2
1
2
3
4
5
6
7
8

S M GN D
S _ V IN

1 0 p in & 8 pi n co- la y

6-52-56001-023
6-52-56001-028
6-52-56000-020
6-52-56001-022

6-20-94K10-108

SC 2

*0 . 1 u_ 1 0 V _X 7 R _ 0 4

SD 1

S LI D _ S W #

2
VC C

OU T
A

GN D

A

S D3
* H T -1 50 N B -D T

S MGN D

S A P _ ON

AC

S U1
S C6

8 8 48 6 -0 80 1

* 50 5 0 0-0 1 0 41 -0 01 L

Z430 1

3

S A P _ ON

2 0m il

1
S M _B T N #
SW EB_ W W W #
S W E B _ E M A I L#
S L ID_ S W #

S C1
M H 2 4 8-A LF A -E S O

0 . 1 u_ 1 6 V _Y 5 V _0 4

*1 00 p _ 50 V _ N P O _ 04

S MGN D
H T -1 5 0N B -D T

S M GN D
S M GN D

C

S M GN D

20 mi l

20 mi l

A

S M _B T N #
SW EB_ W W W #
S W E B _ E M A IL #
S L ID_ S W #

1 0 0 K _0 4

S MG N D

S MG N D
S MGN D

6-52-56001-023
6-52-56001-028
6-52-56000-020
6-52-56001-022

S M GN D

SU1, SU2

6-02-00248-LC2
6-02-00268-LC1

3
1

6-53-3150B-245
6-53-3050B-241
6-53-3050B-240
POWER BUTTON

6-53-3150B-245
6-53-3050B-241
6-53-3050B-240
WEB_WWW#

SPW R _ SW 1
T J G-5 33 -S -T / R

S W W W _S W 1
*T J G-5 3 3 -S -T/ R
S M_ B T N #

1
3

S W E B _W W W #

1
3

SC 4

2
4

S A P _S W 1
* T JG -53 3 -S -T / R

S W E B _E M A I L #

1
3

2
4

S C3
S R4
*0 _ 0 4

PSW1~8
* 0. 1 u _ 16 V _ Y 5 V _ 04
3
4

Sheet 40 of 41
Power Switch & LID
Board

6-53-3150B-245
6-53-3050B-241
6-53-3050B-240
AP_KEY#

SR 3
* 10 0 K _ 1% _ 0 4

S MA I L _ S W 1
* T JG -5 33 -S -T / R
2
4

5
6

2
4
5
6

1
3

S _ V IN

6-53-3150B-245
6-53-3050B-241
6-53-3050B-240
WEB_EMAIL#

5
6

HOT KEY

FOR E4120Q/E5120Q

*0 . 1u _ 1 6V _ Y 5V _ 0 4

S A P _O N

S C5

5
6

FOR E5128Q

2

SR 5
* 4 7K _ 0 4

* 0 . 1u _ 1 6V _ Y 5V _ 0 4

1
2

S M GN D

S M GN D

S M GN D

S MG N D

S MG N D

S MGN D

S MGN D

S M GN D
S MG N D

FOR E5120Q
POWER BUTTON
S MH 2
S MH 5
H 7 _0 D 2_ 3 H 7 _ 0D 2 _3

SPW R _ SW 2
*T J G-5 3 3 -S -T/ R
2
4

S MH 6
T1 5 8B 11 8 X8 7 D 1 1 8 X8 7

S MH 7
T1 5 8 B 91 D 91

SM H1
2
3
4
5

S M_ B T N #

1

S MH 3
9
8
7
6

2
3
4
5

1

S MH 4
9
8
7
6

2
3
4
5

1

9
8
7
6

5
6

1
3

PSW1~8
3
4
S M GN D

1
2

M TH 2 37 D 8 7
S MG N D
S MG N D

M T H 2 37 D 87
S MG N D

MT H 2 3 7D 1 18
S M GN D

S M GN D

S MG N D

6-53-3150B-245
6-53-3050B-240
6-53-3050B-241

FOR E5128Q

Power Switch & LID Board B - 41

B.Schematic Diagrams

1
2
3
4
5
6
7
8
9
10

S _ 3 . 3V

C

SJ _ SW 1

LID SWITCH IC
C

S _ 3. 3 V S

Schematic Diagrams

EXTERNAL ODD Board
QJ_O DD 2
S1
S2
S3
S4
S5
S6
S7

QJ_ODD 1
S1
S2
S3
S4
S5
S6
S7

QJ_SATA_TXP1
QJ_SATA_TXN1
QJ_SATA_RXN 1
QJ_SATA_RXP1

QGND

B.Schematic Diagrams

P1
P2
P3
P4
P5
P6

QGN D
QJ_O DD _D ETEC T#
Q_5VS

P1
P2
P3
P4
P5
P6

Q_5VS
QJ_SATA_OD D_D A#

1-162-100562

PI N
GN D1 ~ 2= WGN D

Sheet 41 of 41
EXTERNAL ODD
Board

242001-1
QGND

P IN
GN D1 ~ 3= QG ND

QGN D

6-21 -140 10-01 3
6-21 -140 20-01 3
6-21 -140 30-01 3

6- 21-1 3A00 -013

Q_5VS

QC1

Q C2

0.1u_16V_Y5V_04

*0. 1u_16V_Y5V_04

QGN D

B - 42

Q H1
C 237D91

QH4
C 237D 91

QGN D

QG ND

QH 3
C67D 67

QH 2
C67D 67

BIOS Update

Appendix C:Updating the FLASH ROM BIOS
To update the FLASH ROM BIOS you must:
•
•
•
•
•
•
•

Download the BIOS
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel.
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model
(see sidebar for important information on BIOS versions).

Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the
downloaded files.
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software).

BIOS Version
Make sure you download the latest correct
version of the BIOS appropriate for the computer model you are
working on.
You
should
only
download BIOS versions
that
are
V1.01.XX or higher as
appropriate for your
computer model.
Note that BIOS versions
are not backward compatible and therefore
you may not downgrade your BIOS to an
older version after upgrading to a later version (e.g if you upgrade
a BIOS to ver 1.01.05,
you MAY NOT then go
back and flash the BIOS
to ver 1.01.04).

Set the computer to boot from the external drive
1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
C - 1

C:BIOS Update

Download the BIOS update from the web site.
Unzip the files onto a bootable CD/DVD/USB Flash Drive.
Reboot your computer from an external CD/DVD/USB Flash Drive.
Use the flash tools to update the flash BIOS using the commands indicated below.
Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
After rebooting the computer you may restart the computer again and make any required changes to the default BIOS
settings.



BIOS Update

Use the flash tools to update the BIOS
1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs
being loaded by DOS. Choose “N” for any memory management programs.
2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB
flash drive).
3. Type the following command at the DOS prompt:

C:BIOS Update

C:\> Flash.bat
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
restarts.

Restart the computer (booting from the HDD)
1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F3) and select “Yes” to confirm the selection.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.

Your computer is now running normally with the updated BIOS
You may now enter the BIOS and make any changes you require to the default settings.

C-2

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