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W270BUQ Series Preface Notebook Computer W270BUQ Service Manual Preface I Preface Notice The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. Preface Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. Version 1.0 July 2011 Trademarks AMD® is a registered trademark of Advanced Micro Devices, Inc. Windows® is a registered trademark of Microsoft Corporation. Other brand and product names are trademarks and /or registered trademarks of their respective companies. II Preface About this Manual This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the W270BUQ series notebook PC. The following information is included: Chapter 1, Introduction, provides general information about the location of system elements and their specifications. Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade elements of the system. Preface Appendix A, Part Lists Appendix B, Schematic Diagrams Appendix C, Updating the FLASH ROM BIOS III Preface IMPORTANT SAFETY INSTRUCTIONS Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment: Preface 1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet basement or near a swimming pool. 2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning. 3. Do not use the telephone to report a gas leak in the vicinity of the leak. 4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may explode. Check with local codes for possible special disposal instructions. 5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output of 19V, 3.42A or 18.5V, 3.5A (65W) minimum AC/DC Adapter. CAUTION This Computer’s Optical Device is a Laser Class 1 Product FCC Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: This device may not cause harmful interference. This device must accept any interference received, including interference that may cause undesired operation. IV Preface Instructions for Care and Operation The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions: 1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged. Do not expose the computer to any shock or vibration. 2. Do not place anything heavy on the computer. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. Do not leave it in a place where foreign matter or moisture may affect the system. Don’t use or store the computer in a humid environment. Do not place the computer on any surface which will block the vents. Preface Do not expose it to excessive heat or direct sunlight. 3. Do not place it on an unstable surface. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save your work. Remember to periodically save your data as data may be lost if the battery is depleted. Do not turn off the power until you properly shut down all programs. Do not turn off any peripheral devices when the computer is on. Do not disassemble the computer by yourself. Perform routine maintenance on your computer. V Preface 4. 5. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data. Take care when using peripheral devices. Use only approved brands of peripherals. Unplug the power cord before attaching peripheral devices. Preface Power Safety The computer has specific power requirements: VI • • Power Safety Warning • Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. • • • Only use a power adapter approved for use with this computer. Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are unsure of your local power specifications, consult your service representative or local power company. The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one. When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire. Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices. Before cleaning the computer, make sure it is disconnected from any external power supplies. Do not plug in the power cord if you are wet. Do not use the power cord if it is broken. Do not place heavy objects on the power cord. Preface Battery Precautions • Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer. • Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire. • Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode. • Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service personnel. • Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode or leak if exposed to fire, or improperly handled or discarded. • Keep the battery away from metal appliances. • Affix tape to the battery contacts before disposing of the battery. • Do not touch the battery contacts with your hands or metal objects. Battery Guidelines Preface The following can also apply to any backup batteries you may have. • If you do not use the battery for an extended period, then remove the battery from the computer for storage. • Before removing the battery for storage charge it to 60% - 70%. • Check stored batteries at least every 3 months and charge them to 60% - 70%. Battery Disposal The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste officials for details in your area for recycling options or proper disposal. Caution Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturer’s instructions. Battery Level Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10% will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week. VII Preface Related Documents You may also need to consult the following manual for additional information: User’s Manual on CD/DVD This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC. System Startup Remove all packing materials. Place the computer on a stable surface. Insert the battery and make sure it is locked in position. Securely attach any peripherals you want to use with the computer (e.g. keyboard and mouse) to their ports. 5. Attach the AC/DC adapter to the DC-In jack at the left of the computer, then plug the AC power cord into an outlet, and connect the AC power cord to the AC/DC adapter. 6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do not exceed 130 degrees); use the other hand (as illustrated in Figure 1) to support the base of the computer (Note: Never lift the computer by the lid/LCD). 7. Press the power button to turn the computer “on”. Preface 1. 2. 3. 4. Figure 1 Opening the Lid/LCD/ Computer with AC/DC Adapter Plugged-In VIII Shut Down 130 ゚ Note that you should always shut your computer down by choosing Shut Down from the Start Menu. This will help prevent hard disk or system problems. Preface Contents .................................................................................................... 1-VIII System Startup ............................................................................ 1-VIII Introduction ..............................................1-1 Disassembly ...............................................2-1 Overview .........................................................................................2-1 Maintenance Tools ..........................................................................2-2 Connections .....................................................................................2-2 Maintenance Precautions .................................................................2-3 Disassembly Steps ...........................................................................2-4 Removing the Battery ......................................................................2-5 Removing the Hard Disk Drive .......................................................2-6 Removing the Optical (CD/DVD) Device ......................................2-8 Removing the System Memory (RAM) ..........................................2-9 Removing the Wireless LAN Module ...........................................2-11 Removing the Keyboard/CCD ......................................................2-12 Part Lists ..................................................A-1 Part List Illustration Location ........................................................ A-2 Top ................................................................................................. A-3 Bottom (9W) .................................................................................. A-4 Schematic Diagrams................................. B-1 System Block Diagram ...................................................................B-2 ONTARIO MEM & PCIE I/F, AP .................................................B-3 ONTARIO DISPLAY/ CLK/ MISC ..............................................B-4 ONTARIO POWER & DECOUPLING .........................................B-5 INAGUA DDR3 SO-DIMMS A ....................................................B-6 INAGUA DDR3 SO-DIMMS B ....................................................B-7 HUDSON PCIE/ PCI/ CLOCK/ FCH ............................................B-8 HUDSON GPIO/ USB/ STRAP .....................................................B-9 HUDSON SATA/ DEBUG IO/ SPI .............................................B-10 HUDSON POWER DECOUPLING ............................................B-11 POWERGOOD/ TPM ..................................................................B-12 ANX3110 ASIC ............................................................................B-13 LVDS/ INVERTER ......................................................................B-14 HDMI/ CRT ..................................................................................B-15 CCD/ 3G .......................................................................................B-16 CARD READER/ LAN JMC261C ..............................................B-17 MINI PCIE/ SATA HDD/ ODD ...................................................B-18 AUDIO CODEC ALC269 ............................................................B-19 USB 3.0 VL800 ............................................................................B-20 KBC-ITE IT8518 ..........................................................................B-21 LED/ MDC/ BT ............................................................................B-22 USB/ FAN/ TP/ MULTI CON .....................................................B-23 5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS ..............................................B-24 POWER VDD3/ VDD5 ................................................................B-25 POWER 1.5V/ 0.75V ...................................................................B-26 POWER 1.1V/ 1VS ......................................................................B-27 IX Preface Overview .........................................................................................1-1 Specifications ..................................................................................1-2 External Locator - Top View with LCD Panel Open ......................1-4 External Locator - Front & Right Side Views .................................1-5 External Locator - Left Side & Rear View .....................................1-6 External Locator - Bottom View .....................................................1-7 Mainboard Overview - Top (Key Parts) .........................................1-8 Mainboard Overview - Bottom (Key Parts) ....................................1-9 Mainboard Overview - Top (Connectors) .....................................1-10 Mainboard Overview - Bottom (Connectors) ...............................1-11 Bottom (18W) ................................................................................ A-5 SATA-DVD-DUAL ....................................................................... A-6 LCD ............................................................................................... A-7 Preface POWER 1.8VS ............................................................................. B-28 APU CORE/ NB CORE ............................................................... B-29 Updating the FLASH ROM BIOS......... C-1 Preface To update the FLASH ROM BIOS you must: C-1 Download the BIOS ....................................................................... C-1 Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive ................................................................................................ C-1 Set the computer to boot from the external drive ........................... C-1 Use the flash tools to update the BIOS .......................................... C-2 Restart the computer (booting from the HDD) .............................. C-2 X Introduction Chapter 1: Introduction Overview This manual covers the information you need to service or upgrade the W270BUQ series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about dri-vers (e.g. VGA & audio) is also found in the User’s Manual. The manual is shipped with the computer. Operating systems (e.g. Window 7, etc.) have their own manuals as do application softwares (e.g. word processing and database programs). If you have questions about those programs, you should consult those manuals. 1.Introduction The W270BUQ series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please take note of the warning and safety information indicated by the “” symbol. The balance of this chapter reviews the computer’s technical specifications and features. Overview 1 - 1 Introduction Specifications Latest Specification Information The specifications listed here are correct at the time of sending them to the press. Certain items (particularly processor types/speeds) may be changed, delayed or updated due to the manufacturer's release schedule. Check with your service center for more details. Processor Options BIOS AMD-C Series (Dual-Core) Accelerated Processing Unit C-50 2C (1.0GHz) One 16Mb SPI Flash ROM AMI BIOS 1MB L2 Cache, 40nm, DDR3-1066MHz, TDP 9W AMD-E Series (Dual-Core) Accelerated Processing Unit E-350 (1.6GHz) 1MB L2 Cache, 40nm, DDR3-1066MHz, TDP 18W Audio High Definition Audio Compliant Interface 2 * Built-In Speakers Core Logic Built-In Microphone AMD A50M FCH Security LCD Security (Kensington® Type) Lock Slot BIOS Password 1.Introduction 17.3" (43.94cm) HD+ / FHD TFT LCD Memory Keyboard Full-size “WinKey” keyboard (with numeric keypad) Two 204 Pin SO-DIMM Sockets Supporting DDR3 1066/ 1333MHz Memory CPU Memory Expandable up to 8GB The CPU is not a user serviceable part. Accessing the CPU in any way may violate your warranty. Storage Pointing Device Built-in Touchpad Communication (Factory Option) One Changeable 12.7mm(h) Super Multi Optical Device Drive Built-In 10Mb/100Mb Ethernet LAN One Changeable 2.5" 9.5 mm (h) SATA HDD (Factory Option) 300K/1.3M Pixel USB PC Camera Module Video Adapter WLAN/ Bluetooth Half Mini-Card Modules: (Factory Option) Wireless LAN (802.11b/g/n) AMD Radeon™ HD 6250 (E-350 APU Integrated) Shared Memory Architecture of up to 1469MB (under Windows 7 32 Bit with 4GB Memory) Microsoft® DirectX 11 Compatible AMD Radeon™ HD 6310 (C-50 APU Integrated) Shared Memory Architecture of up to 1469MB (under Windows 7 32 Bit with 4GB Memory) Microsoft® DirectX 11 Compatible 1 - 2 Specifications (Factory Option) Wireless LAN (802.11b/g/n) + Bluetooth 3.0 Introduction Interface Dimensions & Weight Three USB 2.0 Ports 413mm (w) * 270mm (d) * 14 - 40.5mm (h) One HDMI-Out Port 2.9 kg (with 48.84WH Battery and ODD) One Headphone-Out Jack One Microphone-In Jack One RJ-45 LAN Jack One DC-in Jack One External Monitor Port Card Reader Embedded Multi-In-1 Card Reader 1.Introduction MMC (MultiMedia Card) / RS MMC SD (Secure Digital) / Mini SD / SDHC/ SDXC MS (Memory Stick) / MS Pro / MS Duo Mini Card Slots Slot 1 for WLAN Module or WLAN and Bluetooth Combo Module Environmental Spec Temperature Operating: 5°C - 35°C Non-Operating: -20°C - 60°C Relative Humidity Operating: 20% - 80% Non-Operating: 10% - 90% Power 6 Cell Smart Lithium-Ion Battery Pack, 48.84WH (Factory Option) 6 Cell Smart Lithium-Ion Battery Pack, 62.16WH Full Range AC/DC Adapter AC Input: 100 - 240V, 50 - 60Hz DC Output: 19V, 3.42A or 18.5V, 3.5A (65W) Specifications 1 - 3 Introduction Figure 1 External Locator - Top View with LCD Panel Open Top View 1.Introduction 1 1. PC Camera (Optional) 2. LCD 3. Power Button 4. LED Status Indicators 5. Keyboard 6. Built-In Microphone 7. Touchpad & Buttons 2 17.3” (43.94cm) 4 3 5 6 7 1 - 4 External Locator - Top View with LCD Panel Open Introduction External Locator - Front & Right Side Views Figure 2 Front View 1. LED Power Indicators FRONT VIEW 1 Right Side View RIGHT SIDE VIEW 1 2 3 4 5 6 1. Microphone-In Jack 2. Headphone-Out Jack 3. USB 2.0 Port 4. Optical Device Drive Bay 5. Emergency Eject Hole 6. Security Lock Slot External Locator - Front & Right Side Views 1 - 5 1.Introduction Figure 3 Introduction External Locator - Left Side & Rear View Figure 4 1.Introduction Left Side View 1. DC-In Jack 2. External Monitor Port 3. RJ-45 LAN Jack 4. HDMI-Out Port 5. USB 2.0 Port 6. Vent 7. Multi-in-1 Card Reader / LEFT SIDE VIEW 1 2 Figure 5 4 3 5 5 6 REAR VIEW Rear View 1. Battery 1 1 - 6 External Locator - Left Side & Rear View 7 Introduction External Locator - Bottom View Figure 6 Bottom View 1. Battery 2. Component Bay Cover 3. Vent 4. Hard Disk Bay Cover 5. Speakers 1 3 1.Introduction 3 2 3 3 4 3 3 Overheating 5 5 To prevent your computer from overheating, make sure nothing blocks any vent while the computer is in use. External Locator - Bottom View 1 - 7 Introduction Figure 7 Mainboard Overview - Top (Key Parts) Mainboard Top Key Parts 1.Introduction 1. JMC261C 2. ITE T858 3. AZALIA Codec REALTEK ALC269 2 1 3 1 - 8 Mainboard Overview - Top (Key Parts) Introduction Mainboard Overview - Bottom (Key Parts) Figure 8 Mainboard Bottom Key Parts 1 2 3 4 5 6 Mainboard Overview - Bottom (Key Parts) 1 - 9 1.Introduction 1. Memory Slots DDR3 SO-DIMM 2. Accelerated Processing Unit 3. AMD Hudson M1 FCH 4. Mini-Card Connector (WLAN Module) 5. CMOS Battery 6. Card Reader Socket Introduction Figure 9 Mainboard Overview - Top (Connectors) 1.Introduction Mainboard Top Connectors 1. HDMI-Out Port 2. USB Port 2.0 3. Speaker Cable Connector 4. Microphone Cable Connector 5. Audio Board Connector 6. TouchPad Cable Connector 2 7. TouchPad Cable Connector 1 8. Keyboard Cable Connector 9. Switch Board Cable Connector 9 1 8 2 4 6 7 2 5 3 1 - 10 Mainboard Overview - Top (Connectors) Introduction Mainboard Overview - Bottom (Connectors) Figure 10 7 9 6 8 1 5 Mainboard Bottom Connectors 2 4 3 Mainboard Overview - Bottom (Connectors) 1 - 11 1.Introduction 1. Battery Connector 2. ODD Connector 3. HDD Connector 4. CPU Fan Cable Connector 5. RJ-45 LAN Jack 6. External Monitor Port 7. DC-In Jack 8. CCD Cable Connector 9. LCD Cable Connector 1.Introduction Introduction 1 - 12 Mainboard Overview - Bottom (Connectors) Disassembly Chapter 2: Disassembly Overview This chapter provides step-by-step instructions for disassembling the W270BUQ series notebook’s parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated). We suggest you completely review any procedure before you take the computer apart. To make the disassembly process easier each section may have a box in the page margin. Information contained under the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also. Information A box with a will also provide any possible helpful information. A box with a contains warnings. An example of these types of boxes are shown in the sidebar. Warning Overview 2 - 1 2.Disassembly Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are repeated here for your convenience. Disassembly NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the battery is removed too). Maintenance Tools The following tools are recommended when working on the notebook PC: 2.Disassembly • • • • • • M3 Philips-head screwdriver M2.5 Philips-head screwdriver (magnetized) M2 Philips-head screwdriver Small flat-head screwdriver Pair of needle-nose pliers Anti-static wrist-strap Connections Connections within the computer are one of four types: 2 - 2 Overview Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently rock it from side to side as you pull it out. Do not pull on the wires themselves. When replacing the connection, do not try to force it. The socket only fits one way. Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as you pull them apart. If the connection is very tight, use a small flat-head screwdriver - use just enough force to start. Disassembly Maintenance Precautions The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions: •Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. •When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. 6. Peripherals – Turn off and detach any peripherals. 7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before handling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap instead. 8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements. 9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged surfaces, reducing performance. 10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws, loose inside the computer. Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. Cleaning Do not apply cleaner directly to the computer, use a soft clean cloth. Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer. Overview 2 - 3 2.Disassembly 1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components could be damaged. 2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. 3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor the position of magnetized tools (i.e. screwdrivers). 4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. 5. Be careful with power. Avoid accidental shocks, discharges or explosions. Disassembly Disassembly Steps The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM THE DISASSEMBLY STEPS IN THE ORDER INDICATED. To remove the Battery: 1. Remove the battery page 2 - 5 To remove the HDD: 2.Disassembly 1. Remove the battery 2. Remove the HDD page 2 - 5 page 2 - 6 To remove the Optical Device: 1. Remove the battery 2. Remove the Optical device page 2 - 5 page 2 - 8 To remove the System Memory: 1. Remove the battery 2. Remove the system memory page 2 - 5 page 2 - 9 To remove the Wireless LAN Module: 1. Remove the battery 2. Remove the WLAN module page 2 - 5 page 2 - 11 To remove the Keyboard: 1. Remove the battery 2. Remove the keyboard 2 - 4 Disassembly Steps page 2 - 5 page 2 - 12 Disassembly Removing the Battery 1. 2. 3. 4. Figure 1 Battery Removal Turn the computer off, and turn it over. Slide the latch 1 in the direction of the arrow (Figure 1a). Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a). Slide the battery 63 in the direction of the arrow 4 (Figure 1b). a. a. Slide the latch and hold it in place. b. Slide the battery in the direction of the arrow. b. 2 1 4 2.Disassembly 3 3. Battery Removing the Battery 2 - 5 Disassembly Removing the Hard Disk Drive Figure 2 HDD Assembly Removal a. Locate the HDD bay cover and remove the screws. The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk. Hard Disk Upgrade Process 1. Turn off the computer, and remove the battery (page 2 - 5). 2. Locate the hard disk bay cover and remove screws 1 & 2 (Figure 2a). 2.Disassembly a. HDD System Warning New HDD’s are blank. Before you begin make sure: You have backed up any data you want to keep from your old HDD. 1 • 2 Screws 2 - 6 Removing the Hard Disk Drive 2 You have all the CD-ROMs and FDDs required to install your operating system and programs. If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan to install. Copy these to a removable medium. Disassembly 3. 4. 5. 6. 7. Remove the hard disk bay cover 63 (Figure 3b). Grip the tab and slide the hard disk in the direction of arrow 4 (Figure 3c). Lift the hard disk assembly 65 out of the bay 6 (Figure 3d). Remove the screw 7 - 10 and the mylar cover 11 from the hard disk 12 (Figure 3e). Reverse the process to install a new hard disk (do not forget to replace all the screws and covers). d. b. 6 b. Remove the HDD bay cover. c. Grip the tab and slide the HDD assembly in the direction of the arrow. d. Lift the HDD assembly out of the bay. e. Remove the screws and mylar cover. 2.Disassembly 3 Figure 3 HDD Assembly Removal (cont’d.) 5 e. c. 7 10 8 4 11 12 9 3. HDD Bay Cover 5. HDD Assembly 11. Mylar Cover 12. HDD • 4 Screws Removing the Hard Disk Drive 2 - 7 Disassembly Figure 4 Optical Device Removal 1. 2. 3. 4. Turn off the computer, remove the battery (page 2 - 5) and hard disk (page 2 - 6). Remove the screw at point 1 (Figure 4a). Use a screwdriver to carefully push out the optical device 3 at point 2 (Figure 4b). Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The screw holes should line up). 5. Restart the computer to allow it to automatically detect the new device. a. 2.Disassembly a. Remove the screw at point 1 . b. Use a screwdriver to carefully push out the optical device at point 2 . Removing the Optical (CD/DVD) Device b. 3 1 2 3. Optical Device • 1 Screw 2 - 8 Removing the Optical (CD/DVD) Device Disassembly Removing the System Memory (RAM) Figure 5 The computer has two memory sockets for 204 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting DDRIII (DDR3) Up to 1066/1333 MHz. The main memory can be expanded up to 8GB. The SO-DIMM modules supported are 1024MB and 2048MB DDRIII Modules. The total memory size is automatically detected by the POST routine once you turn on your computer. Memory Upgrade Process RAM Module Removal a. Remove the screws. b. The RAM modules will be visible at point 7 on the mainboard. 1. 2. 3. 4. a. 2.Disassembly Turn off the computer, turn it over and remove the battery (page 2 - 5). Remove screws 1 - 4 from the component bay cover (Figure 5a). Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover. Carefully disconnect the fan cable 5 , and remove the cover 6 (note that you need to raise the bottom cover up to an angle of around 30° angle). 5. The RAM modules will be visible at point 7 on the mainboard (Figure 5b). b. 1 7 6 2 5 3 4 6 30 ゚ 6. Component Bay Cover • 4 Screws Removing the System Memory (RAM) 2 - 9 Disassembly Figure 6 RAM Module Removal (cont’d) c. Pull the release latches. d. Remove the module. 6. Gently pull the two release latches ( 8 & 9 ) on the sides of the memory socket in the direction indicated by the arrows (Figure 5c). The RAM module 10 will pop-up (Figure 5d), and you can then remove it. c. d. e. 8 10 2.Disassembly 9 Contact Warning Be careful not to touch the metal pins on the module’s connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the module’s performance. 30 ゚ Note: The component bay cover has four cover pins, and these need to be aligned with the slots in the case to insure a proper cover fit. Make sure also that the cover is raised at a 30 degree angle during removal and installation. 7. Pull the latches to release the second module if necessary. 8. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot. 9. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot as it will go. DO NOT FORCE IT; it should fit without much pressure. 10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. 11. Replace the component bay cover and the screws (Figure 6e). 12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up. 10. RAM Module 2 - 10 Removing the System Memory (RAM) Disassembly Removing the Wireless LAN Module 1. 2. 3. 4. Figure 7 Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9). The Wireless LAN module will be visible at point 1 on the mainboard (Figure 11a). Carefully disconnect the cable 2 , and then remove the screw 3 (Figure 11b). The Wireless LAN module 4 (Figure 11c) will pop-up, and you can remove it from the computer (Figure 11d). c. a. Wireless LAN Module Removal a. Locate the WLAN. b. Disconnect the cable and remove the screw. c. The WLAN module will pop up. d. Remove the Wireless LAN module. 4 1 b. d. 3 2 4 4.Wireless LAN Module • 1 Screw Removing the Wireless LAN Module 2 - 11 2.Disassembly Note: Make sure you reconnect the antenna cable to the “1 + 2” socket (Figure 11b). Disassembly Figure 8 2.Disassembly Keyboard Removal a. Remove screws from the bottom of the computer. b. Turn the computer over, unsnap up the LED cover module from the center of the computer. c. Remove screws from the keyboard. d. Carefully lift the keyboard up and disconnect the keyboard ribbon cable from the locking collar socket by using a flathead screwdriver to pry the locking collar pins away from the base. e. Remove the keyboard. Removing the Keyboard 1. Turn off the computer, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9). 2. Remove screws 1 - 6 from the bottom of the computer (inside the battery compartment), and then press at point 7 to unsnap the LED cover module (use the eject pin tool provided to do this Figure 8a). 3. Turn the computer over, unsnap up the LED cover module 8 from the center of the computer (Figure 8b). 4. Remove screws 9 - 13 from the keyboard (Figure 8c). 5. Carefully lift the keyboard 14 up, being careful not to bend the keyboard ribbon cable 15 . Disconnect the keyboard ribbon cable 15 from the locking collar socket 16 by using a flat-head screwdriver to pry the locking collar pins 17 away from the base (Figure 8d). 6. Carefully lift up the keyboard 14 (Figure 8e) off the computer. a. d. 14 1 6 7 4 2 5 15 3 17 b. 17 16 8 e. Re-Inserting the Keyboard c. 9 10 11 12 13 14 8. LED Cover Module 14. Keyboard 11 Screws 2 - 12 Removing the Keyboard Keyboard Tabs When re-inserting the keyboard firstly align the four keyboard tabs at the bottom (Figure 8e) at the bottom of the keyboard with the slots in the case. Appendix A:Part Lists This appendix breaks down the W270BUQ series notebook’s construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings. Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure to cross-check any relevant documentation. Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the total number of duplicated parts used. A.Part Lists Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers. A - 1 Part List Illustration Location The following table indicates where to find the appropriate part list illustration. Table A - 1 A.Part Lists Part List Illustration Location A - 2 Part W270BUQ Top page A - 3 Bottom (9W) page A - 5 Bottom (18W) page A - 5 SATA BLU-RAY COMBO page A - 6 SATA DVD DUAL page A - 7 LCD page A - 7 Top Top (灰色) (尚盟) Top A - 3 A.Part Lists Figure A - 1 Bottom (9W) A.Part Lists Figure A - 2 Bottom A - 4 Bottom (9W) Bottom (18W) Figure A - 3 Bottom (18W) A - 5 A.Part Lists Bottom A.Part Lists SATA-DVD-DUAL Figure 4 SATA-DVD-DUAL 志精 A - 6 SATA-DVD-DUAL LCD Figure A - 5 LCD A - 7 A.Part Lists LCD A - 8 LCD A.Part Lists Schematic Diagrams Appendix B: Schematic Diagrams This appendix has circuit diagrams of the W270BUQ notebook’s PCB’s. The following table indicates where to find the appropriate schematic diagram. Diagram - Page Diagram - Page AUDIO CODEC ALC269 - Page B - 19 ONTARIO MEM & PCIE I/F, AP - Page B - 3 USB 3.0 VL800 - Page B - 20 ONTARIO DISPLAY/ CLK/ MISC - Page B - 4 KBC-ITE IT8518 - Page B - 21 ONTARIO POWER & DECOUPLING - Page B - 5 LED/ MDC/ BT - Page B - 22 INAGUA DDR3 SO-DIMMS A - Page B - 6 USB/ FAN/ TP/ MULTI CON - Page B - 23 INAGUA DDR3 SO-DIMMS B - Page B - 7 5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS - Page B - 24 HUDSON PCIE/ PCI/ CLOCK/ FCH - Page B - 8 POWER VDD3/ VDD5 - Page B - 25 HUDSON GPIO/ USB/ STRAP - Page B - 9 POWER 1.5V/ 0.75V - Page B - 26 HUDSON SATA/ DEBUG IO/ SPI - Page B - 10 POWER 1.1V/ 1VS - Page B - 27 HUDSON POWER DECOUPLING - Page B - 11 POWER 1.8VS - Page B - 28 POWERGOOD/ TPM - Page B - 12 APU CORE/ NB CORE - Page B - 29 ANX3110 ASIC - Page B - 13 LVDS/ INVERTER - Page B - 14 HDMI/ CRT - Page B - 15 CCD/ 3G - Page B - 16 CARD READER/ LAN JMC261C - Page B - 17 Table B - 1 SCHEMATIC DIAGRAMS Version Note The schematic diagrams in this chapter are based upon version 6-7P-W24H5-002. If your mainboard (or other boards) are a later version, please check with the Service Center for updated diagrams (if required). MINI PCIE/ SATA HDD/ ODD - Page B - 18 B - 1 B.Schematic Diagrams System Block Diagram - Page B - 2 Schematic Diagrams System Block Diagram W270BUQ System Block Diagram CLICK BOARD 6-71-W2402-D02 POWER SWITCH BOARD CRT Connector POWER SWITCH+HOTKEY X 3 6-71-E51QS-D02 41 3-B A LL 19 mm X 19mm B GA S IN GLE C H A NN E L D D R 3 D I SP LA Y P OR T X 2 D X 11 IGP 4 X 1 P C IE GE N 2 GP P 1 X 4 U M I-L IN K GE N 1 V GA D A C USB+EARPHONE+EXT.MIC 6-71-W2408-D03 LCD Connector EXTERNAL ODD BOARD 5V,3V,5VS,3.3VS 1.5VS,1.1VS AMD FUSION APU Ontario FT1 HDMI Connector AUDIO BOARD EXT. ODD 6-71-E51QN-D01 B.Schematic Diagrams VDD3,VDD5 (Reserve W240BU/W251BUQ) ANX3110 APU_CORE,NB_CORE 1066MHz DDR3 / 1.5V 1.5V,0.75VS DDRIII SO-DIMM2 1.1V, 1VS DDRIII SO-DIMM1 1.8VS UMI*4 Sheet 1 of 43 System Block Diagram USB PORT (USB4) AMD HUDSON-M1 TOUCH PAD CHARGER,DC IN MIC IN SPI INT SPK R SHEET 31 605-BALL CLICK BOARD HP OUT 23mmX23mm BG A TPM (Reserve) 32.768 KHz EC ITE 8518 128pins LQFP LPC 14 *1 4*1 .6m m INT. K/B P C IE GE N 1 I/F (4 x 1) U SB 2. 0(12) + 1.1 (2) S AT AI I (3 P OR TS ) IN T. C LK GE N A ZA LIA H D AU D I O GB M A C S PI I/F LP C I/ F H W M ON ITOR 33 MHz BIOS SPI EC SMBUS THERMAL SENSOR G711ST9U SMART BATTERY AC-IN SMART FAN Azalia Codec REALTEK ALC269 INT SPKER INT MIC 24 MHz AZALIA LINK PCIE 100 MHz 32.768KHz USB 3.0 (Reserve) USB2.0 480 Mbps (USB3) Mini PCIE SOCKET (USB2) JMICRO JMC261C LAN WLAN RJ-45 3G CARD SATA HDD SATA ODD USB PORT USB PORT (USB0) (USB1) Bluetooth (USB6) CCD (USB5) (USB9) (Optional) SATA I/II 3.0Gb/s B - 2 System Block Diagram CARD READER 7IN1 SOCKET 25 MHz Schematic Diagrams ONTARIO MEM & PCIE I/F, AP ONTARIO MEM & PCIE I/F, AP M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q M_ D Q S_ H 0 S_ L 0 S_ H 1 S_ L 1 S_ H 2 S_ L 2 S_ H 3 S_ L 3 S_ H 4 S_ L 4 S_ H 5 S_ L 5 S_ H 6 S_ L 6 S_ H 7 S_ L 7 0 1 2 3 4 5 6 7 D B D H P V AB AA 15 19 21 22 23 23 20 16 A 16 B 16 B 20 A 20 E 23 E 22 J 22 J 23 R 22 P 22 W 22 V 22 A C 20 A C 21 A B 16 A C 16 M _AD D3 M _DAT A3 M _AD D4 M _AD D5 M _DAT A4 M _DAT A5 M _AD D6 M _DAT A6 M _AD D7 M _AD D8 M _DAT A7 M _AD D9 M _AD D10 M _DAT A8 M _DAT A9 M _AD D11 M_ DAT A10 M _AD D12 M _AD D13 M_ DAT A11 M_ DAT A12 M _AD D14 M_ DAT A13 M _AD D15 M_ DAT A14 M_ DAT A15 M _BA NK 0 M _BA NK 1 M_ DAT A16 M _BA NK 2 M_ DAT A17 M _DM 0 M_ DAT A18 M_ DAT A19 M _DM 1 M_ DAT A20 M _DM 2 M _DM 3 M_ DAT A21 M_ DAT A22 M _DM 4 M_ DAT A23 M _DM 5 M _DM 6 M_ DAT A24 M _DM 7 M_ DAT A25 M_ DAT A26 M _DQ S _H0 M_ DAT A27 M _DQ S _L0 M _DQ S _H1 M_ DAT A28 M_ DAT A29 M _DQ S _L1 M_ DAT A30 M _DQ S _H2 M_ DAT A31 M _DQ S _L2 M _DQ S _H3 M _DQ S _L3 M _DQ S _H4 M _DQ S _L4 M _DQ S _H5 M _DQ S _L5 5 5 5 5 6 6 6 6 M M M M M M M M E M_ C E M_ C E M_ C E M_ C E M_ C E M_ C E M_ C E M_ C L K _ H0 L K _ L0 L K _ H1 L K _ L1 L K _ H2 L K _ L2 L K _ H3 L K _ L3 M_ DAT A32 M_ DAT A33 M_ DAT A34 M_ DAT A35 M_ DAT A36 M_ DAT A37 M _DQ S _H6 M _DQ S _L6 M_ DAT A38 M_ DAT A39 L 23 N 17 M _DQ S _L7 M_ DAT A40 M_C LK_ H0 M_ DAT A42 M_C LK_ L0 M_C LK_ H1 M_ DAT A43 M_ DAT A44 M_C LK_ L1 M_ DAT A45 M_C LK_ H2 M_C LK_ L2 M_ DAT A46 M_ DAT A47 M_C LK_ H3 M_C LK_ L3 M_ DAT A48 M _RE SE T_L M_ DAT A50 M _EV EN T_L M_ DAT A51 M_ DAT A52 5 ,6 5 ,6 ME M_ C K E 0 ME M_ C K E 1 F 15 E 15 M _CK E0 M_ DAT A53 M_ DAT A54 M _CK E1 M_ DAT A55 M_ DAT A56 5 5 6 6 D D D D I MM I MM I MM I MM 0 _ OD 0 _ OD 1 _ OD 1 _ OD T0 T1 T0 T1 5 D I MM 0 _ C S # 0 5 D I MM 0 _ C S # 1 6 D I MM 1 _ C S # 0 6 D I MM 1 _ C S # 1 5 ,6 5 ,6 5 ,6 ME M_ R A S # ME M_ C A S # ME M_ W E # W 19 V 15 U 19 W 15 T 17 W 16 U 17 V 16 M_ DAT A57 M 0_O DT 0 M_ DAT A58 M 0_O DT 1 M_ DAT A59 M 1_O DT 0 M 1_O DT 1 M_ DAT A60 M_ DAT A61 M_ DAT A62 M 0_C S_L0 M 0_C S_L1 ATA0 ATA1 ATA2 ATA3 ATA4 ATA5 ATA6 ATA7 C1 8 A1 9 B2 1 D2 0 A1 8 B1 8 A2 1 C2 0 M M M M M M M M E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D ATA8 ATA9 ATA1 0 ATA1 1 ATA1 2 ATA1 3 ATA1 4 ATA1 5 C2 3 D2 3 F2 3 F2 2 C2 2 D2 2 F2 0 F2 1 M M M M M M M M E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D ATA1 6 ATA1 7 ATA1 8 ATA1 9 ATA2 0 ATA2 1 ATA2 2 ATA2 3 H2 1 H2 3 K2 2 K2 1 G2 3 H2 0 K2 0 K2 3 M M M M M M M M E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D De l ? ? VGA 3 /8 U 1A A A6 Y 6 ATA2 4 ATA2 5 ATA2 6 ATA2 7 ATA2 8 ATA2 9 ATA3 0 ATA3 1 N2 3 P2 1 T 20 T 23 M2 0 P2 0 R2 3 T 22 M M M M M M M M E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D ATA3 2 ATA3 3 ATA3 4 ATA3 5 ATA3 6 ATA3 7 ATA3 8 ATA3 9 V2 0 V2 1 Y2 3 Y2 2 T 21 U2 3 W23 Y2 1 M M M M M M M M E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D ATA4 0 ATA4 1 ATA4 2 ATA4 3 ATA4 4 ATA4 5 ATA4 6 ATA4 7 Y2 0 AB2 2 AC1 9 AA1 8 AA2 3 AA2 0 AB1 9 Y1 8 M M M M M M M M E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D ATA4 8 ATA4 9 ATA5 0 ATA5 1 ATA5 2 ATA5 3 ATA5 4 ATA5 5 AC1 7 Y1 6 AB1 4 AC1 4 AC1 8 AB1 8 AB1 5 AC1 5 M M M M M M M M E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D ATA5 6 ATA5 7 ATA5 8 ATA5 9 ATA6 0 ATA6 1 ATA6 2 ATA6 3 M_ DAT A63 M 1_C S_L0 O N_ Z V D D P_G P P_R XN 1 P _G PP_ TXN 1 A A1 A A2 P_G P P_R XP 2 P _G PP_ TXP 2 Y 4 Y 3 P_G P P_R XP 3 Y 14 AA1 2 Y 12 7 C _ UM I_ P_ RX0 7 C _ UM I_ N_ R X 0 AA1 0 Y 10 7 C _ UM I_ P_ RX1 7 C _ UM I_ N_ R X 1 P _G PP_ TXP 0 P _G PP_ TXN 0 O NT AR IO ( 2.0) P_G P P_R XP 1 1 VS 2K _1 % _ 0 4 P_G P P_R XP 0 P_G P P_R XN 0 A B4 AC 4 AB1 0 AC 1 0 7 C _ UM I_ P_ RX2 7 C _ UM I_ N_ R X 2 AC 7 A B7 7 C _ UM I_ P_ RX3 7 C _ UM I_ N_ R X 3 PA RT 2 O F 5 P _G PP_ TXP 1 P_G P P_R XN 2 P_G P P_R XN 3 P_Z VD D_10 P _G PP_ TXN 2 P _G PP_ TXP 3 P _G PP_ TXN 3 P_Z VS S P_U M _ I R XP 0 P_U M I_ TXP 0 P_U M _ I R XN 0 P_U M I_ TXN 0 P_U M _ I R XP 1 P_U M _ I R XN 1 P_U M I_ TXP 1 P_U M I_ TXN 1 AB 6 AC 6 AB 3 AC 3 Y 1 Y 2 V3 V4 A A 14 ON _Z V S S R 1 1 . 2 7 K _ 1 % _ 04 A B 12 AC 1 2 C 9 C 10 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 AC 1 1 A B 11 C 11 C 12 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 C _ U MI _ P _ T X 1 7 C _ U MI _ N _T X 1 7 C _ U MI _ P _ T X 0 7 C _ U MI _ N _T X 0 7 P_U M _ I R XN 2 P_U M I_ TXN 2 AA 8 Y 8 C 13 C 14 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 C _ U MI _ P _ T X 2 7 C _ U MI _ N _T X 2 7 P_U M _ I R XP 3 P_U M _ I R XN 3 P_U M I_ TXP 3 P_U M I_ TXN 3 AB 8 AC 8 C 15 C 16 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 0 . 1 u_ 1 0 V _ X 7 R _ 0 4 C _ U MI _ P _ T X 3 7 C _ U MI _ N _T X 3 7 P_U M _ I R XP 2 P_U M I_ TXP 2 Sheet 2 of 43 ONTARIO MEM & PCIE I/F, AP ON T A R I O_ A P U ROUTE A-LINK DIFF PAIR @ 85 OH M +/- 1 0% C 84 2 C8 4 3 C8 4 4 1 0 u _ 6 . 3V _X 5 R _0 6 0 . 1 u _ 10 V _ X 7 R _ 0 4 1 0 00 p _ 5 0V _X 7 R _0 4 CD 3 /8 1 .5 V R6 7 8 1K _1 % _ 0 4 Analog Thermal Sensor 3 .3 V Q 15 D el R 68 0 3 /7 M2 3 M 1_C S_L1 U 18 V 19 V 17 E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D E M_ D M _DQ S _H7 M_ DAT A49 5 , 6 M E M_ R E S E T # 5 , 6 M E M_ E V E N T # M M M M M M M M R2 M_ DAT A41 M 17 M 16 M 19 M 18 N 18 N 19 L 18 L 17 B1 4 A1 5 A1 7 D1 8 A1 4 C1 4 C1 6 D1 6 PCI E I/F ME ME ME ME ME ME ME ME ME ME ME ME ME ME ME ME _ DM _ DM _ DM _ DM _ DM _ DM _ DM _ DM M _DAT A1 M _DAT A2 PA RT 1 O F 5 UM I I/F 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 5 ,6 ME M ME M ME M ME M ME M ME M ME M ME M M _DAT A0 O NT AR O I ( 2. 0) M _AD D1 M _AD D2 2 M _VR EF 1 VC C O UT 1:2 (4mils:8mils) T H E R M_ V O L T 2 0 1 .5 V M _RA S_L M _CA S_L M _WE _L M_Z VD DI O _M EM _S M2 2 ME M_ Z V D D I O R6 3 9 . 2 _ 1% _ 0 4 R6 8 1 1K _1 % _ 0 4 3 C3 6 5 GN D *0 . 1 u _ 10 V _ X 5 R _ 0 4 ON T A R I O _ A P U R6 co nn ect ion t o 1. 5V sh ould be direct ly to t he plane wit ho ut a lo ng t ra ce *G 7 11 S T 9 U C 364 * 0 . 1 u_ 1 0 V _ X 5R _ 0 4 1 3 PLACE NEAR U1 2 Res er ve 3 /1 1 ME M _ C K E 0 R 81 *6 8 _ 1% _ 0 4 ME M _ C K E 1 R 82 *6 8 _ 1% _ 0 4 C lose to APU ONTARIO MEM & PCIE I/F, AP B - 3 B.Schematic Diagrams R 18 T 18 F 16 5, 6 ME M _ B A N K 0 5, 6 ME M _ B A N K 1 5, 6 ME M _ B A N K 2 5 , 6 M E M _D M[ 7 : 0 ] ME M_ D A TA [ 6 3: 0 ] 5 , 6 U 1E M _AD D0 H 19 J 17 H 18 H 17 G 17 H 15 G 18 F 19 E 19 T 19 F 17 E 18 W 17 E 16 G 15 MEM ORY I/F MEM _ ADD R0 ME M _ A D D R 1 ME M _ A D D R 2 ME M _ A D D R 3 ME M _ A D D R 4 ME M _ A D D R 5 ME M _ A D D R 6 ME M _ A D D R 7 ME M _ A D D R 8 ME M _ A D D R 9 ME M _ A D D R 1 0 ME M _ A D D R 1 1 ME M _ A D D R 1 2 ME M _ A D D R 1 3 ME M _ A D D R 1 4 ME M _ A D D R 1 5 R 17 5 , 6 M E M _A D D R [ 1 5 : 0 ] Schematic Diagrams ONTARIO DISPLAY/ CLK/ MISC ONTARIO DISPLAY/CLK/MISC 1 .8 V S U1 B 9 S B _ P R OC H OT # 0 _ 04 P R O C H OT # LV DS Sheet 3 of 43 ONTARIO DISPLAY/ CLK/ MISC 1 .8 V S 1 4 HD M IB _ CL K B P 1 4 HD M IB _ CL K B N 1 2 ,1 3 1 2 ,1 3 L V D S -L 2 P L V D S -L 2 N 1 2 ,1 3 1 2 ,1 3 L V D S -L 1 P L V D S -L 1 N 13 13 L V D S -L 0 P L V D S -L 0 N 13 13 A P U _ CL K P A P U _ CL K N 7 7 D I S P _ C LK P D I S P _ C LK N C 84 0 0 . 1 u _ 16 V _ Y 5 V _ 0 4 R3 5 R3 6 T DP 1_TX N2 H3 G2 DP MISC DP _BLO N D P_D I GO N D P_V AR Y_B L B2 C2 TD P1_H PD C1 B5 A5 LT DP 0_T XP 0 LT DP 0_AU XP LT DP 0_T XN 0 LT DP 0_AU XN D6 C6 LT DP 0_T XP 1 LTD P0_H PD A6 B6 LT DP 0_T XP 2 LT DP 0_T XN 1 LT DP 0_T XN 2 LT DP 0_T XP 3 DA C_R ED D AC _RE DB D AC _G RE EN DA C_ GR EE NB DA C_B LUE LT DP 0_T XN 3 V2 V1 CLK I N_H D2 D1 DI SP _C LKI N_ H D AC _BLU EB CLK I N_L DI SP _C LKI N_ L P R O C H OT # DA C_H SY NC DA C_V SY NC DA C_S CL DA C_S DA SV C D AC _ZV SS A P U _ S IC A P U _ S ID P3 P4 SI C TE ST 5 S ID TE ST 6 TE ST 14 * 1 0 m li _ s h or t _ 04 L D TR S T _ R * 1 0 m li _ s h or t _ 04 L D TP W R GD _ R T3 T4 R ES ET _L TE ST 15 P R O C H OT # * 1 0 m li _ s h or t _ 04 A P U _ T H E R M T R I P # U1 U2 T2 P WRO K TE ST 16 A P U_ T DI A P U_ T DO A P U_ T CK A P U _ T MS A P U_ T RS T # D B R DY D B R E Q# N2 N1 P1 P2 M4 M3 M1 P RO C HO T_ L T HE RM T RI P_L TE ST 18 TE ST 19 A LER T_L T EST 25_H T DI T ES T25 _L T EST 28_H T DO T ES T28 _L TC K TE ST 31 T MS T RS T_L T EST 33_H T ES T33 _L D BR DY T EST 34_H D BR EQ _L T ES T34 _L C 22 TE ST 35 2 8 C P U _ V D D N B _R U N _ F B _H 2 8 CP U_ V D D0 _ R UN _ F B _ H 2 8 CP U_ V D D0 _ R UN _ F B _ L 2 8 CP U_ V D DN B _ R UN _ F B _ L R 21 O N_ B L O N O N _ D I GO N O N_ V A RY R 16 R 598 R4 5 R4 6 * 1 0 m li _ s h or t _ 04 V D D C R _ N B _ S E N S E F 4 * 1 0 m li _ s h or t _ 04 V D D C R _ C P U _ S E N S E G1 V D D I O_ S U S _ S E N S E F 3 R4 8 R4 9 F1 * 1 0 m li _ s h or t _ 04 V S S _ S E N S E * 1 0 m li _ s h or t _ 04 V DD CR _NB _SE NS E TE ST 36 V DD CR _CP U_S EN SE TE ST 37 V SS _SE NS E TE ST 38 B4 W 11 V5 HD M I_ DD C_ C L K HD M I_ DD C_ D A T A D3 C1 2 D1 3 A1 2 B1 2 A1 3 B1 3 L V DS L V DS R R 5 *7 4 A H C 1 G 0 8G W LD T _ R S T# _ B U F 3 /21 D P _H P D 1 2 D A C _R E D 1 4 R2 7 1 5 0 _1 % _ 0 4 R2 8 1 5 0 _1 % _ 0 4 R2 9 1 5 0 _1 % _ 0 4 D A C _G R E E N D A C _B L U E E1 E2 D A C_ H S Y NC D A C_ V S Y N C F2 D4 D1 2 DA C_ R S E T R1 R2 R6 T5 E4 K4 L1 L2 M2 K1 K2 L5 M5 M2 1 J18 J19 U1 5 T15 H4 N5 R5 A P U _ T HE R M DA A P U _ T HE R M DC *1 K _ 0 4 R 31 R 32 A P U _P W R GD _ B U F R 5 4 *1 K _ 0 4 A P U _ B P 1 _ T S T UP D_ U S CL K 1 APU APU APU APU R 58 _ T E S T 1 8 _P LL T E S T 1 _ T E S T 1 9 _P LL T E S T 0 _ T E S T 2 5 _H _ B Y P A S S C L K _ T E S T 2 5 _L _ B Y P A S S C L K A P U _ T E S T 3 3 _H _ M_ C L K T S T _ H A P U _ T E S T 3 3 _L _ M _ C L K T S T _ L 1 .8 V S C 23 C 24 R SV D_1 R SV D_2 5 1 K _ 04 A P U_ T R S T # R6 5 R6 6 R6 7 R6 8 *0 _ 0 4 H D T _T R S T # *1 0 K _ 0 4 *1 0 K _ 0 4 *1 0 K _ 0 4 C PU _VD DI O GND GND GND DM AA CT I VE _L K3 T1 O N _ D MA A C T I V E # R 50 0_04 R 42 R 43 5 1 _ 04 5 1 _ 04 A L LO W _ L D T S T P 7 P AR T 3 OF 5 R5 1 1 .8 V S CP U_T CK C PU _TM S C PU _TD I C PU _TD O C PU _TR ST _L CP U_ PWR O K_B UF C PU _DB RD Y3 CP U_R ST _L_B UF C PU _DB RD Y2 CPU _D BR DY0 C PU _DB RD Y1 8 ,9 ,2 0 8 ,9 ,2 0 * 1K _ 04 O N TA RI O ( 2. 0) R SV D_3 H D T+ H E A D E R / P L A C E O N T OP 1 3 5 7 9 11 13 15 17 19 A P U_ S IC A P U_ S ID 1 .8 V S 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 R4 4 J1 R5 9 *1 0 m i l _s h o rt _ 0 4 *1 0 m i l _s h o rt _ 0 4 S MD _ C P U _ T H E R M S MC _ C P U _ T H E R M 1K _ 04 1K _ 04 51 0 _ 1 % _ 0 4 51 0 _ 1 % _ 0 4 APU _ TEST3 5 APU _ TEST3 6 3 1 .8 V S 14 1 K_ 0 4 R3 7 R3 9 R4 0 R4 1 Reserve C PU_ DB RE Q_L GND C PU _PLL TE ST0 C PU _VD DI O C PU _PLL TE ST1 *H D R 1 0 X 2 - B L U E - V E R T I C A L P L U G B - 4 ONTARIO DISPLAY/ CLK/ MISC R 33 R 34 *0 _ 0 4 *0 _ 0 4 *7 4 A H C 1 G 0 8G W 4 2 F or ANX31 10 3 /10 14 De l R3 3, R3 4 3 /7 D A C_ D DC A C L K 1 4 DA C_ D DC A D A T A 1 4 1 .8 V S U 45 1 14 14 4 9 9 _ 1% _ 0 4 2 A P U_ P W RG D 1 0 0 K_ 0 4 1 0 0 K_ 0 4 1 0 0 K_ 0 4 14 R5 6 R 52 1 .8 V S R 53 R 591 R 592 R 593 L V D S _D D C _ C L K 1 2 , 1 3 L V D S _D D C _ D A T A 1 2 , 1 3 3 . 3V S 1 K_ 0 4 1 K_ 0 4 1 K_ 0 4 4 O N_ B L O N O N _ D I GO N O N_ V A RY H D MI _D D C _ C L K 1 4 H D MI _D D C _ D A T A 1 4 _ DD C_ C L K _ DD C_ D A T A 60 *1 0 0 K _ 0 4 62 1 00 K _0 4 13 Fo r ANX3 11 0 3 /1 0 P O R T C _H P D A3 B3 O NT A R IO _ A P U U 44 1 BL O N 13 N B_ EN AVD D ON _ V A R Y 1 2 V DD IO _M E M _S_S EN SE 1 .8 V S LD T _ R S T# 1 5 0 _ 1 %_ 0 4 *1 0 m i _l s h o rt _ 0 4 *1 0 m i _l s h o rt _ 0 4 S VD TE ST 4 De l R3 5, R36 , R 38 3 /7 * 1 5 0p F _ N P O _ 50 V _0 4 0 2* 1 5 0p F _N P O _ 5 0V _0 4 0 2 O ND P _ C A L R R 30 J1 J2 R3 8 L D T R S T_ R L D T P W R G D_ R H2 H1 T DP 1_AU XN T DP 1_AU XP T DP 1_TX N3 TE ST 17 7 8 C P U _T H E R MT R I P # 9 , 2 0 A P U _ TA LE R T # C 21 T DP 1_TX P3 D8 C8 A P U _ S IC A P U _ S ID L DT _ RS T # A P U _ P W R GD 7 L DT _ R S T # 7 ,2 8 A P U_ P W RG D A 10 B 10 C P U _S V C CP U_ S V D 8 8 L DT _ R S T # T DP 1_TX P2 LV D S - LC L K P LV D S - LC L K N 7 7 28 28 R 13 3 0 0 _1 % _ 0 4 D 10 C 10 T DP 1_TX N1 TEST R 25 H DM I H D MI B _D 0 B P H D MI B _D 0 B N T DP 1_TX P1 DISPL AYPORT 1 A P U _ T HE RM T RIP # A P U _ T A L E R T# P R OC H OT # A P U _ S IC A P U _ S ID 14 14 B9 A9 DISPL AYPORT 0 *1 K _0 4 1 K_ 0 4 1 K_ 0 4 1 K_ 0 4 1 K_ 0 4 1 K_ 0 4 H D MI B _D 1 B P H D MI B _D 1 B N DP _ZV SS T DP 1_TX N0 CL K 15 22 17 19 24 20 14 14 De l R1 6 , R5 98 3 /7 ANAL OG/DISPLAY/MISC T DP 1_TX P0 B8 CTRL R R R R R R 3 B.Schematic Diagrams 3 .3 V S H D MI B _D 2 B P H D MI B _D 2 B N SER 3 .3 V 14 14 VGA DAC CP U _ S V C CP U _ S V D A P U _P W R GD JTAG 1K _0 4 1K _0 4 30 0 _ 1 % _ 0 4 A 8 R1 1 R1 2 R1 4 2 4 6 8 10 12 14 16 18 20 A P U_ T C K R 61 A P U_ T M S R 63 A P U_ T D I R 64 A P U_ T D O A P U_ P W RG D_ B UF L D T _R S T # _ B U F D B R DY D B R E Q# R 69 J 1 0 8 _P L LT S T 0 R 70 J 1 0 8 _P L LT S T 1 R 71 1 K_ 0 4 1 K_ 0 4 1 K_ 0 4 3 0 0 _1 % _ 0 4 * 0_ 0 4 * 0_ 0 4 A P U _ T E S T 1 9 _ P L L TE S T 0 A P U _ T E S T 1 8 _ P L L TE S T 1 1 .8 V S Schematic Diagrams ONTARIO POWER & DECOUPLING ONTARIO POWER & DECOUPLING 1 .8 VS CD 3/8 V D D C R _C P U 1 .5 V VD D_1 8_2 V DD CR _C PU _3 VD D_1 8_3 V DD CR _C PU _4 VD D_1 8_4 V DD CR _C PU _5 VD D_1 8_5 V DD CR _C PU _6 V DD CR _C PU _7 VD D_1 8_6 VD D_1 8_7 C 27 C 29 C 28 C3 1 U 1D A7 B7 B1 1 B1 7 B2 2 C4 D5 D7 D9 D1 1 D1 4 B1 5 D1 7 D1 9 E7 E9 E1 2 E2 0 F8 F11 F13 G4 G5 G7 G9 G1 2 G2 0 G2 2 H6 H1 1 H1 3 J4 J5 J7 J20 K1 0 K1 4 L4 L6 L8 L11 L13 L20 L22 M7 N4 N6 N8 N1 1 C 869 C 87 1 C 870 *1 0 u _ 6 . 3 V _ X 5R _ 0 6 *1 0 u _ 6 . 3 V _ X 5R _ 0 6 * 1 0u _ 6 . 3 V _ X 5 R _0 6 V DD CR _C PU _9 V DD CR _C PU _10 V DD CR _C PU _11 V DD CR _C PU _12 V DD CR _C PU _13 V DD CR _C PU _14 V DD CR _C PU _15 1 .8 VS V DD CR _N B_1 V DD CR _N B_2 V DD _18_D AC W 9 De l R 73 3 /7 V DD CR _N B_3 V DD CR _N B_4 C 872 ON TA RI O ( 2.0 ) V DD CR _N B_5 P AR T 4 O F 5 C 32 C 33 1 0 u _ 6 . 3 V _ X 5R _ 0 6 *1 0 u _ 6 . 3 V _ X 5R _ 0 6 1 u _ 6 .3 V _ X 5 R_ 0 4 V DD CR _N B_6 V DD CR _N B_7 V DD CR _N B_8 V DD CR _N B_9 V DD CR _N B_10 1V S V DD P L _ 1 0 V DD CR _N B_11 V DD CR _N B_12 V DD CR _N B_13 V DD CR _N B_14 V DD CR _N B_15 V DD PL _10 U 11 L63 C 34 C 35 . H C B 1 6 0 8 K F -1 2 1 T 2 5 C 36 V DD CR _N B_16 1 0u _ 6 . 3 V _ X 5 R _0 6 0 .1 u _ 1 0 V_ X5 R_ 0 4 1 u _ 6. 3V _ X5 R _ 0 4 V DD CR _N B_17 V DD CR _N B_18 V DD CR _N B_19 V DD CR _N B_20 1 VS V DD CR _N B_21 V DD CR _N B_22 VD D_1 0_1 VD D_1 0_3 V DD I O _M EM _S _1 V DD I O _M EM _S _2 VD D_1 0_4 U 13 W 13 V 12 T1 2 C 37 C 38 C 39 C4 0 C 41 C 42 V DD I O _M EM _S _3 V DD I O _M EM _S _4 C D 3 /8 V DD I O _M EM _S _5 *1 0 u _ 6 . 3 V _ X 5R _ 0 6 * 1 u_ 6 . 3 V _ X 5 R _ 04 0 . 1 u _1 0 V _ X 5 R _ 04 1 0 u _ 6 .3 V_ X5 R_ 0 6 1 u _ 6 .3 V_ X5 R_ 0 4 0 .1 u _ 1 0 V_ X5 R_ 0 4 V DD I O _M EM _S _6 V DD I O _M EM _S _7 V DD I O _M EM _S _8 3 .3 VS V DD I O _M EM _S _9 V DD I O _M EM _S _10 V DD I O _M EM _S _11 V DD _33 C8 7 3 A 4 O NT A RIO _ A P U V D D CR _ CP U C 26 10 u _ 6 . 3 V _ X 5 R _ 0 6 * 1 u _ 6. 3V _ X5 R _ 0 4 1 u_ 6 . 3 V _ X 5 R _ 04 1 u_ 6 . 3 V _ X 5 R _ 04 * 1 u _6 . 3 V _X 5 R _ 0 4 0. 1u _ 1 0 V _ X 5 R _ 0 4 V DD CR _C PU _8 VD D_1 0_2 G1 6 G1 9 E1 7 J16 L16 L19 N1 6 R1 6 R1 9 W18 U1 6 U 8 W 8 U 6 U 9 W 6 T7 V 7 C 874 V SS _1 O N TA RI O 2 ( .0) VS S_50 V SS _2 P AR T 5 O F 5 VS S_51 V SS _3 VS S_52 V SS _4 VS S_53 V SS _5 VS S_54 V SS _6 V SS _7 VS S_55 VS S_56 V SS _8 VS S_57 V SS _9 VS S_58 V SS _10 VS S_59 V SS _11 VS S_60 V SS _12 VS S_61 V SS _13 VS S_62 V SS _14 V SS _15 VS S_63 VS S_64 V SS _16 VS S_65 V SS _17 VS S_66 V SS _18 V SS _19 VS S_67 VS S_68 V SS _20 VS S_69 V SS _21 VS S_70 V SS _22 VS S_71 V SS _23 VS S_72 V SS _24 VS S_73 V SS _25 VS S_74 V SS _26 V SS _27 V SS _28 V SS _29 VS S_75 VS S_76 VS S_77 VS S_78 V SS _30 VS S_79 V SS _31 VS S_80 V SS _32 VS S_81 V SS _33 VS S_82 V SS _34 V SS _35 VS S_83 VS S_84 V SS _36 VS S_85 V SS _37 VS S_86 V SS _38 VS S_87 V SS _39 VS S_88 V SS _40 VS S_89 V SS _41 VS S_90 V SS _42 V SS _43 VS S_91 VS S_92 V SS _44 VS S_93 V SS _45 VS S_94 V SS _46 VS S_95 V SS _47 VS S_96 V SS _48 VS S_97 V SS _49 V SS BG _D AC N1 3 N2 0 N2 2 P1 0 P1 4 R4 R7 R2 0 T6 T9 T11 T13 U4 U5 U7 U1 2 U2 0 U2 2 V8 V9 V1 1 V1 3 W1 W2 W4 W5 W7 W12 W20 Y5 Y7 Y9 Y1 1 Y1 3 Y1 5 Y1 7 Y1 9 AA4 AA2 2 AB2 AB5 AB9 AB1 3 AB1 7 AB2 1 AC 5 AC 9 AC 1 3 A1 1 Sheet 4 of 43 ONTARIO POWER & DECOUPLING C 875 O N TA R I O _ A P U *1 0 u _ 6 . 3 V _ X 5 R _ 0 6 * 1 0 u _6 . 3 V _X 5 R _ 0 6 *1 0 u _ 6 . 3 V _ X 5R _ 0 6 C 43 1 u _ 6 .3 V_ X5 R_ 0 4 CD 3/ 8 1 .5 V C 44 C 45 C4 6 C 47 C 48 C 49 C5 0 * 1 0 u _6 . 3 V _X 5 R _ 0 6 *1 0 u _ 6 . 3 V _ X 5 R _ 0 6 1 0 u _ 6 .3 V_ X5 R_ 0 6 *1 0 u _ 6 . 3 V _ X 5 R _ 0 6 1 0 u _ 6 . 3 V _ X 5R _ 0 6 *1 0 u _ 6 . 3 V _ X 5R _ 0 6 * 1 0u _ 6 . 3 V _ X 5 R _0 6 C5 1 C 52 C5 3 C 54 *1 0 u _ 6. 3V _ X5 R _ 0 6 *2 2 u _ 6 . 3 V _ X 5 R _ 0 8 1 0 u _ 6 .3 V _ X 5 R_ 0 6 *2 2 u _ 6 . 3 V _ X 5R _ 0 8 D el C 57 , C 58 , C 60 , C6 1 3/ 17 C 55 C 56 CD 3/8 C 59 1 u _ 6 .3 V _ X 5 R_ 0 4 1 u _ 6 .3 V _ X 5 R_ 0 4 C 62 0. 1u _ 1 0 V _ X 5 R _ 0 4 C 63 0. 1u _ 1 0 V _ X 5 R _ 0 4 0 . 1 u_ 1 0 V _ X 5 R _0 4 C6 4 EMC C APS 1 .5 V V D DC R _ CP U V D D CR _ NB C6 6 De l C 69 3 /17 V DD C R_ N B C 67 C D 3 /8 C 68 C7 0 1 80 P _5 0 V _ N P O _ 0 4 C 71 *1 8 0 P _ 5 0 V _ N P O_ 0 4 1 8 0 P _ 5 0 V _ N P O _0 4 C 75 C 65 * 0 . 1 u _1 0 V _ X 5 R _ 04 * 0 . 1 u _1 0 V _ X 7 R _ 04 0 .1 u _ 1 0 V_ X 5 R_ 0 4 1. 5V C 76 C7 7 C 78 C7 2 C 73 1 8 0 P _ 5 0 V _ N P O_ 0 4 *1 8 0 P _ 5 0 V _ N P O_ 0 4 C7 4 0 .1 u _ 1 0 V _ X 5 R_ 0 4 * 0. 1u _ 1 0 V _ X 7 R _ 0 4 C8 0 C 81 C8 2 C 83 C 79 1 0 u _ 6 .3 V_ X5 R_ 0 6 *1 0 u _ 6 . 3 V _ X 5 R _ 0 6 1 0 u _ 6 .3 V_ X5 R_ 0 6 * 1 0 u _6 . 3 V _X 5 R _ 0 6 *1 0 u _ 6 . 3 V _ X 5R _ 0 6 3. 3V S 1 .8 VS 1 .8 VS *1 u _ 6 . 3 V _ X 5 R _ 0 4 1 u _ 6. 3V _ X5 R _ 0 4 1 u _6 . 3 V _X 5 R _ 0 4 *1 u _ 6 . 3 V _ X 5 R _ 0 4 V D D P L _ 10 1 VS C D a n d D el C9 2, C 97 3 /1 7 C 84 1 8 0 P _ 5 0 V _ N P O _0 4 C 89 C 90 C9 1 1 u _ 6 .3 V _ X 5 R_ 0 4 1 u _ 6. 3V _ X5 R _ 0 4 * 1 u_ 6 . 3 V _ X 5 R _ 04 C 93 C 94 C9 5 C8 5 1 8 0 P _ 5 0V _ N P O _ 0 4 C8 6 1 8 0 P _ 5 0V _ N P O _ 0 4 C8 7 1 8 0 P _ 5 0 V _ N P O_ 0 4 C 88 0 .1 u _ 1 0 V_ X5 R_ 0 4 C 96 1 u _ 6 .3 V _ X 5 R_ 0 4 *0 . 1 u _ 1 0 V _ X 5 R _ 0 4 0 . 1 u _ 1 0 V _ X 5R _ 0 4 0 . 1 u_ 1 0 V _ X 5 R _0 4 ONTARIO POWER & DECOUPLING B - 5 B.Schematic Diagrams E8 E1 1 E1 3 F9 F1 2 G1 1 G1 3 H9 H1 2 K1 1 K1 3 L10 L12 L14 M1 1 M1 2 M1 3 N1 0 N1 2 N1 4 P1 1 P1 3 VD D_1 8_1 V DD CR _C PU _2 P OW ER V D D C R _N B C 30 V DD CR _C PU _1 GR O UN D U 1C E5 E6 F5 F7 G6 G8 H5 H7 J6 J8 L7 M6 M8 N7 R8 Schematic Diagrams INAGUA DDR3 SO-DIMMS A SO -D IMM A INAGUA DDR3 SO-DIM MS A 2,6 MEM_ADDR[15:0] B.Schematic Diagrams 6,8 6,8 SCLK0 SDATA0 MEM_DQS_ H0 MEM_DQS_ H1 MEM_DQS_ H2 MEM_DQS_ H3 MEM_DQS_ H4 MEM_DQS_ H5 MEM_DQS_ H6 MEM_DQS_ H7 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 MEM_DQS_ L0 MEM_DQS_ L1 MEM_DQS_ L2 MEM_DQS_ L3 MEM_DQS_ L4 MEM_DQS_ L5 MEM_DQS_ L6 MEM_DQS_ L7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 M EM _DM0 M EM _DM1 M EM _DM2 M EM _DM3 M EM _DM4 M EM _DM5 M EM _DM6 M EM _DM7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA 116 120 2 DIMM0_O DT0 2 DIMM0_O DT1 2,6 M EM _DM[7:0] 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 2,6 MEM_BANK0 2,6 MEM_BANK1 2,6 MEM_BANK2 2 DIMM0_CS#0 2 DIMM0_CS#1 2 M EM _CLK_H0 2 M EM _CLK_L0 2 M EM _CLK_H1 2 M EM _CLK_L1 2,6 MEM_CKE0 2,6 MEM_CKE1 2,6 M EM _CAS# 2,6 M EM _RAS# 2,6 M EM _WE# Sheet 5 of 43 INAGUA DDR3 SODIMMS A MEM_DAT A[63:0] 2,6 JDIMM1A MEM_ADDR0 MEM_ADDR1 MEM_ADDR2 MEM_ADDR3 MEM_ADDR4 MEM_ADDR5 MEM_ADDR6 MEM_ADDR7 MEM_ADDR8 MEM_ADDR9 MEM_ADDR10 MEM_ADDR11 MEM_ADDR12 MEM_ADDR13 MEM_ADDR14 MEM_ADDR15 ODT0 ODT1 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 12 29 47 64 137 154 171 188 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 10 27 45 62 135 152 169 186 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 12 9 13 1 14 1 14 3 13 0 13 2 14 0 14 2 14 7 14 9 15 7 15 9 14 6 14 8 15 8 16 0 16 3 16 5 17 5 17 7 16 4 16 6 17 4 17 6 18 1 18 3 19 1 19 3 18 0 18 2 19 2 19 4 MEM_DATA0 MEM_DATA1 MEM_DATA2 MEM_DATA3 MEM_DATA4 MEM_DATA5 MEM_DATA6 MEM_DATA7 MEM_DATA8 MEM_DATA9 MEM_DATA10 MEM_DATA11 MEM_DATA12 MEM_DATA13 MEM_DATA14 MEM_DATA15 MEM_DATA16 MEM_DATA17 MEM_DATA18 MEM_DATA19 MEM_DATA20 MEM_DATA21 MEM_DATA22 MEM_DATA23 MEM_DATA24 MEM_DATA25 MEM_DATA26 MEM_DATA27 MEM_DATA28 MEM_DATA29 MEM_DATA30 MEM_DATA31 MEM_DATA32 MEM_DATA33 MEM_DATA34 MEM_DATA35 MEM_DATA36 MEM_DATA37 MEM_DATA38 MEM_DATA39 MEM_DATA40 MEM_DATA41 MEM_DATA42 MEM_DATA43 MEM_DATA44 MEM_DATA45 MEM_DATA46 MEM_DATA47 MEM_DATA48 MEM_DATA49 MEM_DATA50 MEM_DATA51 MEM_DATA52 MEM_DATA53 MEM_DATA54 MEM_DATA55 MEM_DATA56 MEM_DATA57 MEM_DATA58 MEM_DATA59 MEM_DATA60 MEM_DATA61 MEM_DATA62 MEM_DATA63 JDIMM1B 1.5V 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 3.3VS 20mils C9 8 C99 *1u_ 6. 3 V_X5R_04 0.1u_ 16V_Y5V_ 04 CD 3/8 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 199 VDDSPD 1.5V R75 77 122 125 1K_0 4 198 30 2,6 MEM_EVENT# 2,6 MEM_RESET# 1 126 MVREF_DIMM0 C100 C101 NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA C102 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 1u_6.3V_X5R_04 1000p_50V_X7R_0 4 0.1u_10V_X7R_04 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 44 48 49 54 55 60 61 65 66 71 72 12 7 12 8 13 3 13 4 13 8 13 9 14 4 14 5 15 0 15 1 15 5 15 6 16 1 16 2 16 7 16 8 17 2 17 3 17 8 17 9 18 4 18 5 18 9 19 0 19 5 19 6 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VTT_MEM 20 3 20 4 VTT1 VTT2 GND1 GND2 G1 G2 DDRRK-2040 1- TR4B DDRRK-20401- T R4B (REV)4.0mm C LOS E TO S O- DI M M A 1.5V R76 1 K_1%_04 M VREF_DIMM 0 1.5V CD 3/8 + C104 C105 C106 CD 3/8 C107 C108 C109 C110 C111 C11 2 C113 + *150u_4V_B_A *220u_4V_V_A *10u_10V_Y5V_08 10u_ 10V_Y5V_08 *1u_6.3V_X5R_04 1u_6 . 3V_X5R_04 10u_ 10V_Y5V_ 08 1u_6. 3V_X5R_04 *1u_6.3V_X5R_04 1u_6 . 3V_X5R_04 1.5V VTT_M EM CD 3/8 C114 C115 C116 C117 C118 CD 3/8 C119 C120 C121 C122 CD 3/8 C123 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 0.1u_16 V_Y5V_04 *0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16 V_Y5V_04 0.1u_16 V_Y5V_0 4 B - 6 INAGUA DDR3 SO-DIMMS A C124 C125 C126 C127 C128 10u_10V_Y5V_08 1u_6.3V_X5R_04 *1u_ 6. 3 V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 R77 C103 1K_1%_04 0.1u_10V_X5R_04 Schematic Diagrams INAGUA DDR3 SO-DIMMS B S O-D IMM B INAGUA DDR3 S O-DIMMS B 2,5 MEM_ADDR[15:0] R7 8 3.3VS 2,5 2,5 2,5 2,5 2,5 2,5 2,5 2,5 MEM_DQS_L0 MEM_DQS_L1 MEM_DQS_L2 MEM_DQS_L3 MEM_DQS_L4 MEM_DQS_L5 MEM_DQS_L6 MEM_DQS_L7 MEM_DM0 MEM_DM1 MEM_DM2 MEM_DM3 MEM_DM4 MEM_DM5 MEM_DM6 MEM_DM7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 BA0 BA1 BA2 S0# S1# CK0 CK0 # CK1 CK1 # CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA 116 120 2 DIMM1_O DT0 2 DIMM1_O DT1 2,5 MEM_ DM[7:0] MEM_DQS_H0 MEM_DQS_H1 MEM_DQS_H2 MEM_DQS_H3 MEM_DQS_H4 MEM_DQS_H5 MEM_DQS_H6 MEM_DQS_H7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 109 108 79 114 121 101 103 102 104 73 74 115 110 113 4.7K_04 197 201 202 200 SCLK0 SDATA0 2,5 2,5 2,5 2,5 2,5 2,5 2,5 2,5 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 O DT0 O DT1 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 12 29 47 64 137 154 171 188 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 10 27 45 62 135 152 169 186 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M EM _DATA0 M EM _DATA1 M EM _DATA2 M EM _DATA3 M EM _DATA4 M EM _DATA5 M EM _DATA6 M EM _DATA7 M EM _DATA8 M EM _DATA9 M EM _DATA10 M EM _DATA11 M EM _DATA12 M EM _DATA13 M EM _DATA14 M EM _DATA15 M EM _DATA16 M EM _DATA17 M EM _DATA18 M EM _DATA19 M EM _DATA20 M EM _DATA21 M EM _DATA22 M EM _DATA23 M EM _DATA24 M EM _DATA25 M EM _DATA26 M EM _DATA27 M EM _DATA28 M EM _DATA29 M EM _DATA30 M EM _DATA31 M EM _DATA32 M EM _DATA33 M EM _DATA34 M EM _DATA35 M EM _DATA36 M EM _DATA37 M EM _DATA38 M EM _DATA39 M EM _DATA40 M EM _DATA41 M EM _DATA42 M EM _DATA43 M EM _DATA44 M EM _DATA45 M EM _DATA46 M EM _DATA47 M EM _DATA48 M EM _DATA49 M EM _DATA50 M EM _DATA51 M EM _DATA52 M EM _DATA53 M EM _DATA54 M EM _DATA55 M EM _DATA56 M EM _DATA57 M EM _DATA58 M EM _DATA59 M EM _DATA60 M EM _DATA61 M EM _DATA62 M EM _DATA63 JDIMM2 B 1.5V 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 3. 3 VS 20mils CD 3/9 C129 C130 *1u_6.3V_X5R_04 0 . 1u _16V_Y5V_04 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 199 VDDSPD 77 122 125 198 30 2,5 MEM_EVENT # 2,5 MEM_RESET # 1 126 MVREF_DIMM 1 C131 C132 NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA C133 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 1u_6.3V_X5R_04 1000p_ 50V_ X7R_04 0.1u_10V_X7R_04 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 Sheet 6 of 43 INAGUA DDR3 SODIMMS B VT T_MEM 203 204 VTT1 VTT2 GND1 GND2 G1 G2 DDRRK- 20 401-TP8 D DDRRK-204 01-TP8D (REV)8.0mm SN:6-86-24204-XXX C LO SE TO SO - DI MM B 1.5V R79 1 K_1%_ 04 MVREF_DIMM1 1.5V CD 3/9 C136 C135 C137 C1 38 C139 C140 C14 1 C142 C143 C144 R80 C134 1K_1%_04 0.1u_1 0V_X 5R_04 + + *220u_4 V_V_A 10u_10V_Y5 V_08 *10u_10V_Y5V_0 8 *1 u_6.3V_ X5R_04 1u_6.3V_X5R_04 10u_1 0V_Y5V_08 1u_6.3V_X5R_04 *1u_6.3V_X5R_0 4 1u_6.3V_X5R_04 560u _2.5V_ 6. 6 *6.6*5. 9 VTT_ MEM 1.5V CD 3/ 9 C145 C146 C147 C1 48 CD 3/9 C149 C150 C15 1 C152 C153 C154 0.1u_1 6V_Y5V_04 0.1u_16V_Y5V_04 0.1u _16V_Y5V_04 0.1u_16V_Y5V_0 4 *0.1u_16V_Y5V_ 04 *0.1u_16V_Y5V_0 4 *0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_ 16V_ Y5V_04 0.1u_16V_Y5 V_04 C155 C156 C157 C158 C1 59 10u_10V_Y5V_ 08 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 1u_ 6. 3 V_X5 R_04 1u_6.3V_X5R_ 04 INAGUA DDR3 SO-DIMMS B B - 7 B.Schematic Diagrams 2,5 MEM_BANK0 2,5 MEM_BANK1 2,5 MEM_BANK2 2 DIMM1_CS#0 2 DIMM1_CS#1 2 M EM _CLK_H2 2 M EM _CLK_L2 2 M EM _CLK_H3 2 M EM _CLK_L3 2,5 MEM_CKE0 2,5 MEM_CKE1 2,5 M EM _CAS# 2,5 M EM _RAS# 2,5 M EM _WE# 5,8 5,8 M EM _DATA[63 : 0] 2,5 JDIMM2A MEM_ADDR0 MEM_ADDR1 MEM_ADDR2 MEM_ADDR3 MEM_ADDR4 MEM_ADDR5 MEM_ADDR6 MEM_ADDR7 MEM_ADDR8 MEM_ADDR9 MEM_ADDR10 MEM_ADDR11 MEM_ADDR12 MEM_ADDR13 MEM_ADDR14 MEM_ADDR15 Schematic Diagrams HUDSON PCIE/ PCI/ CLOCK/ FCH HU DS ON P CI E/P CI /C LO CK /FC H U 19 E 1 50 p F _N P O_ 5 0V _ 0 40 2 17 P C I E _T X P 3_ W L A N 17 P C I E _T X N 3 _ W LA N A D2 6 A D2 7 A C2 8 A C2 9 AB2 9 AB2 8 AB2 6 AB2 7 AE2 4 AE2 3 A D2 5 A D2 4 A C2 4 A C2 5 AB2 5 AB2 4 CA L RP CA L RN 5 90 2 K _1 % _0 4 _G _G _G _G A D2 9 A D2 8 P CI CLK0 A _RST # PC IC LK1/ GP O36 PC IC LK2/ GP O37 U MI _TX 0P PC IC LK3/ GP O38 U MI _TX 0N PC IC LK4/ 14M _OS C/ GP O39 P CI C LKS U MI _TX 1P U MI _TX 1N U MI _TX 2P PC IR ST# C4 5 2 C4 5 3 C4 5 4 C4 5 5 0. 1 u _1 0 V _ X7 R _ 0 4 0. 1 u _1 0 V _ X7 R _ 0 4 *0 . 1u _ 1 0V _ X 7R _0 4 *0 . 1u _ 1 0V _ X 7R _0 4 F CH F CH F CH F CH P P T XP 0 P P T XN 0 P P T XP 1 P P T XN 1 C8 2 2 C8 2 3 0. 1 u _1 0 V _ X7 R _ 0 4 0. 1 u _1 0 V _ X7 R _ 0 4 F C H _G P P T XP 3 F C H _G P P T XN 3 AA2 8 AA2 9 Y2 9 Y2 8 Y2 6 Y2 7 W28 W29 AA2 2 Y2 1 AA2 5 AA2 4 W23 V2 4 W24 W25 17 P C I E _R X P 3_ W L A N 17 P C I E _R X N 3 _W L A N U MI _RX 0P AD1/ G PI O1 AD2/ G PI O2 AD3/ G PI O3 U MI _RX 0N U MI _RX 1P AD4/ G PI O4 AD5/ G PI O5 U MI _RX 1N AD6/ G PI O6 PCI EXP RE SS I F / U MI _RX 2P U MI _RX 2N AD7/ G PI O7 AD8/ G PI O8 U MI _RX 3P U MI _RX 3N AD9/ G PI O9 AD10/ G PI O10 P CI E_CA LRP AD11/ G PI O11 AD12/ G PI O12 G PP _TX0P AD13/ G PI O13 AD14/ G PI O14 AD15/ G PI O15 G PP _TX0N G PP _TX1P AD16/ G PI O16 AD17/ G PI O17 G PP _TX1N AD18/ G PI O18 G PP _TX2P G PP _TX2N AD19/ G PI O19 AD20/ G PI O20 G PP _TX3P G PP _TX3N AD21/ G PI O21 AD22/ G PI O22 G PP _RX0P G PP _RX0N AD23/ G PI O23 AD24/ G PI O24 AD25/ G PI O25 G PP _RX1P G PP _RX1N AD26/ G PI O26 AD27/ G PI O27 G PP _RX2P G PP _RX2N AD28/ G PI O28 AD29/ G PI O29 G PP _RX3P G PP _RX3N AD30/ G PI O30 AD31/ G PI O31 C BE0# M2 3 P2 3 U2 9 U2 8 D I S P _C LK P D I S P _C LK N T2 6 T2 7 1 2 A N X3 1 1 0_ C L K P 1 2 A N X3 1 1 0_ C L K N Fo r ANX31 10 3/11 3 3 V2 1 T2 1 A P U _C LK P A P U _C LK N V2 3 T2 3 D I S P _ C L K : C P U (n on -s p rea d ) L2 9 L2 8 1 6 C LK _ P C I E _J MC 1 6 C LK _ P C I E _J MC # P C I E _ R C LK : (S pre a d, F U S I ON MO D E ) 1 7 CL K _ P CIE _ W L A N 1 7 CL K _ P CIE _ W L A N# FC H _GP P D EV I C E GF X_ C LK 0 1 2 3 4 5 6 7 8 N A J MC 2 61C W LA N N A N A N A N A N A U S B3 0. N A C L KR E Q# G 0 1 NA NA NA NA NA 7 NA R6 8 9 C4 6 5 2 2_ 0 4 1 6 JM C _ 2 5M _I N 22 P _ 50 V _ N P O _0 4 C BE3# F RAM E# DEV SEL# P CI E_RC LKP /N B_LNK _CLKP P CI E_RC LKN /N B_LNK _CLKN IR DY# TR DY# N B_DI SP _CLK P N B_DI SP _CLK N P AR STO P# PE RR# SE RR# N B_HT _CLK P RE Q0# N B_HT _CLK N RE Q1#/ G PI O40 RE Q2#/ CLK _RE Q8#/ G PI O41 C PU_H T_C LKP C PU_H T_C LKN RE Q3#/ CLK _RE Q5#/ G PI O42 G NT0# GN T1#/ GP O44 S LT_G FX_ CLKP S LT_G FX_ CLKN GN T2#/ GP O45 G NT3#/ CLK _RE Q7#/ G PI O46 CLKR UN# LO CK# G PP _CLK0 P G PP _CLK0 N IN TF#/ G PI O33 G PP _CLK1 N M2 9 M2 8 I NT G#/ G PI O34 IN TH#/ G PI O35 G PP _CLK2 P V2 P C I R S T# _ R R2 4 5 *3 3 _0 4 C 7 50 G PP _CLK7 P G PP _CLK5 N LAD2 LAD3 LF RAM E# LDR Q0# LDR Q1#/ CLK _RE Q6#/ G PI O49 G PP _CLK6 N S ER IR Q/ G PI O48 B T _ ON MX M_ P R E S E N T 2# MX M_ P R E S E N T 1# R6 8 6 R2 4 7 G PP _CLK8 P G PP _CLK8 N P RO CHO T# LDT_P G LDT_S TP# LDT_R ST# 1 22 P _ 50 V _ N P O _0 4 2 5M _X 2 L2 7 25M _X2 R 2 52 GP I O 30 GP I O 31 P CE I _ R ST # I S F OR PC I E D E V I C ES ON H U D SON Del ? ? VGA 3 /8 De l ? ? VGA 3/8 U S B 3 0 _C L K R E Q# R 8 12 2 2_ 0 4 GP I O 31 0 R 2 56 * 20 K _ 04 Del ? ? VGA 3 /8 B OA R D I D 3 .3 VS Fo r W270 BUQ 3/1 5 1 0 R2 5 5 2 0 K _ 04 GP I O 3 0 0 W 2 4 0B U W 25 1 B U Q 0 W 2 5 1B A Q 1 W 2 7 0B U Q 1 .8 V S R2 5 7 GP I O3 1 GP I O3 0 P C I _ C L K R U N # 11 2 0 K _0 4 L D T _ S TP # R 2 59 2 0 K _0 4 22 p _ 50 V _ N P O _0 4 C4 6 2 R2 5 8 *2 0 K _0 4 * MC -1 4 6 _3 2 . 76 8 K H z Del ? ? VGA 3/8 L P CCL K _ 0 L P CCL K _ 1 R 2 61 R 2 62 2 2 _0 4 2 2 _0 4 L P C _ C L K 0 8 , 20 L P C_ CL K 1 8 L P C _ A D 0 1 1, 2 0 R2 7 1 L P C _ A D 1 1 1, 2 0 L P C _ A D 2 1 1, 2 0 L P C _ A D 3 1 1, 2 0 LP C _F R A ME # 1 1, 20 R2 6 0 1 0 M_ 0 4 X4 S E RIR Q S E RIR Q *1 0K _ 0 4 L D T _S T P # V DD 3 L DT _ RS T # 3 20m i ls R 2 63 1 K _ 04 1 R T C _ V B A T _1 A L L OW _ L D T S TP 3 P R OC H OT # 3 A P U _P W R GD 3, 2 8 32 K _ X1 C4 6 3 Zo= 50O? 5% P C LK _ T P M 1 1 1 1, 2 0 3 . 3V 2 D4 6 A_ VBAT B A T 54 C W GH A 20mi l s C 3 C 4 64 A R 2 65 C4 6 6 * 1u _ 6 . 3V _ X 5R _ 04 32 K _ X2 A_ VBAT I NT RUD E R_ A L E RT # V B A T_ I N R 2 6 8 5 1 0_ 1 % _0 4 2 *8 5 20 5 -0 27 0 1 1T J S 1 25 D J 4 A 4 20 P _ 32 . 7 6 8K H z 3 2K _ X 2 0_04 1 10mi l s 1 K _ 04 CD 3 /8 INT RUD E R_ A L E RT # J _R TC 2 1 2 B A T -06 3 - P 01 Ch ang e 3 /21 22 p _ 50 V _ N P O _0 4 *1 u_ 6 . 3 V _Y 5V _ 0 4 * 1 M_ 04 R 26 6 C4 6 8 1 u_ 6 . 3V _X 5 R _ 04 B - 8 HUDSON PCIE/ PCI/ CLOCK/ FCH 0 _0 4 * 10 K _ 0 4 * 10 K _ 0 4 J _ RT C1 D2 B2 VD DBT _RTC _G H U D S ON M1 A 1 3 B U F _ P L T_ R S T # 1 1, 1 6 , 17 , 1 9 , 20 3 . 3V S R6 8 7 R6 8 8 C2 32K_X2 RTC CLK IN TR UDE R_ALE RT# B 1 C4 6 7 R TC 25M _X1 CD 3/8 *0 . 1 u_ 1 6 V _Y 5V _ 0 4 R 2 51 3 3_ 0 4 15 0 pF _ N P O_ 50 V _ 04 0 2 2 R 2 67 L2 6 C4 6 0 4 C 45 7 De l ? ? VGA 3/8 C1 32K_X1 2 5M _X 1 U1 7 * 74 A H C 1 G0 8G W * 0_ 0 4 1 *0 _ 0 4 2 R 80 5 R 8 06 P C I E _R S T# _ C G2 1 H2 1 K1 9 G2 2 J 24 ALLO W_LDT STP / DM A_AC TI VE# C PU 1 M _0 4 3 . 3V S 3 .3 V 14M _25M _48M _OS C X5 1 7, 2 1 * 0_ 0 4 2 0 K _0 4 8 P C I E _ R S T # _G A T E R 59 5 G PP _CLK7 N L2 5 F S X 5L _ 2 5M H Z *1 0 _0 4 P C L K _ K B C _ R X3 LPC CLK1 LAD0 LAD1 LP C N2 6 N2 7 R 5 13 *1 0 p _5 0 V _N P O_ 0 6 H2 4 H2 5 J 27 J 26 H2 9 H2 8 G2 8 J 25 AA1 8 AB1 9 LPC CLK0 CLO CK G EN ERA TO R G PP _CLK6 P Re se rve 3 2K _ X 1 G PP _CLK4 P G PP _CLK4 N G PP _CLK5 P *1 50 p F _ N P O_ 5 0V _ 0 4 02 Add R812, R271 for T PM 3/21 G PP _CLK3 P G PP _CLK3 N P2 9 P2 8 PCL K_ KBC 8 P CI_ CL K 2 8 P CI_ CL K 3 8 P CI_ CL K 4 8 P C I _R S T# P CL K _ K B C G PP _CLK2 N P2 5 M2 5 T2 9 T2 8 22 _ 0 4 22 _ 0 4 22 _ 0 4 22 _ 0 4 AJ 6 A G6 A G4 AJ 4 IN TE#/ G PI O32 G PP _CLK1 P L2 4 L2 3 1 9 P C I E _ U S B 3 0 _C LK P 1 9 P C I E _ U S B 3 0 _C LK N C BE1# C BE2# N2 9 N2 8 T2 5 V2 5 R2 4 2 R2 4 0 R2 4 3 R2 4 4 AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 A C2 A C3 A C4 A C1 A D1 A D2 A C6 AE2 AE1 AF8 AE3 AF1 A G1 AF2 AE9 A D9 A C1 1 AF6 AF4 AF3 A H2 A G2 A H3 AA8 A D5 A D8 AA1 0 AE8 AB9 AJ 3 AE7 A C5 AF5 AE6 AE4 AE1 1 A H5 A H4 A C1 2 A D1 2 AJ 5 A H6 AB1 2 AB1 1 A D7 AD0/ G PI O0 P CI I/ F 3 3 P CI_ CL K 1 _ R P CI_ CL K 2 _ R P CI_ CL K 3 _ R P CI_ CL K 4 _ R C4 4 9 U MI _TX 2N U MI _TX 3P P CI E_CA LRN 1 6 P C I E _ R X P 0 _J MC 1 6 P C I E _ R X N 0 _ JM C 1 9 P C I E _ U S B 30 _ N B _ R X P 1 9 P C I E _ U S B 30 _ N B _ R X N Sheet 7 of 43 HUDSON PCIE/ PCI/ CLOCK/ FCH P CI E_RS T# U MI _TX 3N MI _ P _T X 0 MI _ N _ TX 0 MI _ P _T X 1 MI _ N _ TX 1 MI _ P _T X 2 MI _ N _ TX 2 MI _ P _T X 3 MI _ N _ TX 3 R 24 9 R 25 0 1 6 P C I E _ TX P 0 _ JM C 1 6 P C I E _ TX N 0_ J MC 1 9 P C I E _ N B _ U S B 30 _ TX P 1 9 P C I E _ N B _ U S B 30 _ TX N U_ RX 0 P _ C U_ RX 0 N_ C U_ RX 1 P _ C U_ RX 1 N_ C U_ RX 2 P _ C U_ RX 2 N_ C U_ RX 3 P _ C U_ RX 3 N_ C 2 1 1. 1 V S C_ U C_ U C_ U C_ U C_ U C_ U C_ U C_ U 2 B.Schematic Diagrams 2 2 2 2 2 2 2 2 33 _ 04 0. 1 u _1 0 V _ X7 R _ 0 4 0. 1 u _1 0 V _ X7 R _ 0 4 0. 1 u _1 0 V _ X7 R _ 0 4 0. 1 u _1 0 V _ X7 R _ 0 4 0. 1 u _1 0 V _ X7 R _ 0 4 0. 1 u _1 0 V _ X7 R _ 0 4 0. 1 u _1 0 V _ X7 R _ 0 4 0. 1 u _1 0 V _ X7 R _ 0 4 3 4 C4 4 4 C4 4 5 C4 4 3 C4 4 6 C4 4 7 C4 4 8 C4 5 0 C4 5 1 I _ P _R X0 I_ N_ RX 0 I _ P _R X1 I_ N_ RX 1 I _ P _R X2 I_ N_ RX 2 I _ P _R X3 I_ N_ RX 3 2 1 R2 4 1 E C_ RS T # C_ UM C_ UM C_ UM C_ UM C_ UM C_ UM C_ UM C_ UM W2 W1 W3 W4 Y1 5 2 2 2 2 2 2 2 2 PA RT 1 O F 5 3 1 2, 2 0 P1 L1 3 4 HU DS ON -1 P C I E _ R S T # _C A _ R S T # _C 1 C4 4 1 J OP E N 1 *O P E N _ 1 0m i -l 1 M M Schematic Diagrams HUDSON GPIO/ USB/ STRAP HUDSON GPIO/USB/AUDIO/STRAP U1 9 A Del R69 2 3 /7 HUDSON-1 18 5 ,6 5 ,6 3 .3 V R 28 0 * 20 K _ 0 4 H DA _ S P K R S CL K 0 S DA T A 0 S CL K 1 S DA T A 1 1 7 W L A N _ C L K R E Q# W F _ RA D IO C4 7 0 *0 . 1u _ 1 6 V _Y 5 V _0 4 W F _ RA D IO De l ? ? VGA 3 /8 R 2 73 US B_F SD 1P/ GP I O186 USB _FS D1N TES T1/ TM S TES T2 US B_F SD 0P/ GP I O185 GA 20I N/ GE VE NT0# KBR ST #/G E VEN T1# USB _FS D0N LPC_ PM E#/ G EVE NT 3# U SB _HS D13P LPC_ SM I#/ G EV ENT 23# U SB _HS D13N GE VE NT5# SYS _RE SET #/ GE VE NT19 # U SB _HS D12P WAK E#/ GE VE NT8# IR _RX 1/G EV EN T20# U SB _HS D12N THR M TRI P# S / MB ALE RT# /G EV EN T2# U SB _HS D11P NB_P WRG D U SB _HS D11N A CPI / WAK E UP E VE NTS RSM R ST# U SB _HS D10P U SB _HS D10N CLK_ REQ 4#/ SA TA_ IS 0#/G P O I 64 CLK_ REQ 3#/ SA TA_ IS 1#/G P O I 63 SM AR TVO LT 1/S AT A_I S2#/ G PI O 50 USB _HS D9P USB _HS D9N CLK_ REQ 0#/ SA TA_ IS 3#/G P O I 60 SAT A_I S4#/ F ANO U T3/ GP I O55 USB _HS D8P SAT A_I S5#/ F ANI N3 /G PI O 59 USB _HS D8N SPK R/ G PI O 66 SCL0 /G PI O 43 USB _HS D7P SDA 0/ GP O I 47 USB _HS D7N USB 2. 0 SCL1 /G PI O 227 SDA 1/ GP O I 228 USB _HS D6P CLK_ REQ 2#/ FA NI N4/ G PI O 62 USB _HS D6N CLK_ REQ 1#/ FA NO UT 4/G P O I 61 IR _LED #/LLB #/ GP O I 184 USB _HS D5P SM AR TVO LT 2/S HU TDO WN #/G P O I 51 USB _HS D5N DDR 3_RS T#/ G EVE NT 7# GB E_LE D0/ G PI O18 3 GB E_LE D1/ G EVE NT 9# USB _HS D4P USB _HS D4N GB E_LE D2/ G EVE NT 10# GB E_S TAT 0/ GE VE NT11# USB _HS D3P CLK_ REQ G #/ GP O I 65/ O SC N I USB _HS D3N GP O I H3 D1 E4 D4 E8 F7 E7 F8 1 7 OD D _ D A # _ F C H 1 7 OD D _ D E T E C T# 19 , 2 2 U S B _ O C P 0 _ 1# 1 9 U S B 3 0 _P W R _ E N 18 18 R 4 70 R 4 69 H D A _B I TC LK H D A _S D OU T H D A _S D I N 0 S B _ B L ON R 4 73 R 6 95 H DA _ S Y N C H DA _ RS T # R2 8 5 R2 8 6 R2 8 7 3 . 3V R2 8 9 *1 0 K _ 04 3 .3 V GB E _P H Y _ I N TR R2 9 0 1 0K _ 0 4 3 3 _0 4 3 3 _0 4 3 3 _0 4 3 3 _0 4 M3 N1 L2 M2 M1 M4 N2 P2 T1 T4 L6 R 2 83 1 0 K _0 4 L 5 T9 U1 U3 T2 U2 T5 1 0 K _0 4 G B E _ RX E RR V 5 P5 M5 P9 T7 P7 M7 P4 M9 GB E _ P H Y _ I N T R V7 10 K _ 0 4 10 K _ 0 4 3 .3 V BLI NK /U SB_ OC 7#/G E VEN T18# R 8 07 * 1 0K _0 4 GB E _C OL GB E _C R S E2 3 E2 4 F21 G2 9 USB _HS D2N USB _O C6#/ I R_TX 1/ GE VE NT6# USB _O C5#/ I R_TX 0/ GE VE NT17# USB _HS D1P USB _O C4#/ I R_RX 0/ GE VE NT16# USB _O C3#/ AC _PRE S/ TD O G / EV EN T15# USB _HS D1N USB _O C2#/ TC K/ GE VE NT 14# USB _HS D0P USB _O C1#/ TD I/ G EV ENT 13# USB _HS D0N HD AUD IO AZ_B I TCLK SC L2/ GP I O193 AZ_S DO UT AZ_S DI N0/ G PI O 167 SD A2/ GP I O194 SCL3_ LV/ GP I O195 AZ_S DI N1/ G PI O 168 S DA3_ LV/ GP I O196 AZ_S DI N2/ G PI O 169 EC_P WM 0/E C_T IM E R0/ GP I O197 AZ_S DI N3/ G PI O 170 EC_P WM 1/E C_T IM E R1/ GP I O198 AZ_S YN C EC_P WM 2/E C_T IM E R2/ GP I O199 AZ_R ST # EC_P WM 3/E C_T IM E R3/ GP I O200 K SI _0/ GP I O201 GB E_C OL K SI _1/ GP I O202 G B E LAN GB E_C RS GB E_M DC K K SI _2/ GP I O203 K SI _3/ GP I O204 GB E_M DI O K SI _4/ GP I O205 GB E_R XCLK K SI _5/ GP I O206 GB E_R XD3 GB E_R XD2 K SI _6/ GP I O207 K SI _7/ GP I O208 GB E_R XD1 GB E_R XD0 K SO _0/ GP I O209 GB E_R XCT L/ RXD V K SO _1/ GP I O210 GB E_R XER R K SO _2/ GP I O211 GB E_T XCLK K SO _3/ GP I O212 GB E_T XD3 K SO _4/ GP I O213 GB E_T XD2 K SO _5/ GP I O214 GB E_T XD1 K SO _6/ GP I O215 GB E_T XD0 GB E_T XCT L/ TXE N K SO _7/ GP I O216 K SO _8/ GP I O217 GB E_P HY_P D K SO _9/ GP I O218 GB E_P HY_R ST # K SO _10/ GP I O219 GB E_P HY_I N TR K SO _11/ GP I O220 K SO _12/ GP I O221 PS2_ DAT S / DA 4/G P O I 187 K SO _13/ GP I O222 PS2_ CLK/ SC L4/ GP I O188 K SO _14/ GP I O223 SPI _C S2#/ G BE_S TA T2/ G PI O166 K SO _15/ GP I O224 FC_R ST #/G P O160 R6 9 6 * 1 0m i l _s h o rt _0 4 S B _ A C _ OK D De l R6 96 3/7 Q 8 * MT N 70 0 2 Z H S 3 G C 4 69 R2 7 4 * 2 . 2u _ 6 . 3V _X 5 R _ 0 4 H9 J8 *2 0 K _ 04 B 12 A 12 Q6 *M T N 7 0 02 Z H S 3 G 2 0 R S M R S T _ GA TE # F 11 E 11 E 14 E 12 J1 2 J1 4 A 13 B 13 U S B _P P 9 U S B _P N 9 15 15 3 . 3V S U SB9 3G R R R R D1 3 C1 3 2 76 2 77 2 78 2 79 2 .2 K_ 0 4 2 .2 K_ 0 4 4 .7 K_ 0 4 4 .7 K_ 0 4 S CL K 0 S DA T A 0 N B _ P W R GD S US _ S T A T # Sheet 8 of 43 HUDSON GPIO/ USB/ STRAP G1 2 G1 4 G1 6 G1 8 D1 6 C1 6 B 14 A 14 P LA C E C L O S E T O S O U T H B R I D GE U S B _P P 6 U S B _P N 6 21 21 U S B _P P 5 U S B _P N 5 15 15 U SB5 CC D U S B _P P 4 U S B _P N 4 22 22 U SB4 P OR T 3 U S B _ P P 2 17 U S B _ P N 2 17 U SB2 U SB6 B L U E T O OT H 3 . 3V R 2 81 R 2 88 R 2 84 B 17 A 17 A 16 B 16 S Y S _ R S T# S CL K 1 S DA T A 1 9/14 E 18 E 16 J1 6 J1 8 * 2 . 2K _0 4 2 .2 K_ 0 4 2 .2 K_ 0 4 U S B _P P 1 U S B _P N 1 22 22 U SB1 U S B _P P 0 U S B _P N 0 22 22 U SB0 MI N I C A R D R 3 10 R 3 12 R 3 13 R 3 14 1 0 K_ 0 4 1 0 K_ 0 4 * 2 . 2K _0 4 * 2 . 2K _0 4 SC L K2 SD ATA2 A PU _ S IC A PU _ S ID R 2 91 1 0 K_ 0 4 S W I# R 2 92 R 2 93 1 0 K_ 0 4 1 0 K_ 0 4 E C_ S C I# E C_ S M I# P OR T 1 P OR T 0 K SO _16/ GP I O225 K SO _17/ GP I O226 D2 5 F 23 B 26 E 26 F 25 E 22 F 22 E 21 S C LK 2 R 6 93 S D A T A 2 R 6 94 R 7 28 R 7 52 *0 _ 0 4 *0 _ 0 4 *0 _ 0 4 *0 _ 0 4 S MC _C P U _ T H E R M S MD _C P U _ T H E R M A P U_ S IC 3 A P U_ S ID 3 P ULL M I N I P C I E _ S L T2 _ E N # M I N I P C I E _ S L T3 _ E N # H IG H G2 4 G2 5 E 28 E 29 D2 9 D2 8 C2 9 C2 8 B 28 A 27 B 27 D2 6 A 26 C2 6 A 24 B 25 A 25 D2 4 B 24 C2 4 B 23 A 23 D2 2 C2 2 A 22 B 22 3, 9 , 2 0 3, 9 , 2 0 P ULL A Z_SD O UT LO W PO WE R P CI _CLK 1 A LLO W PC I_C LK2 Wat chdog P CI _CLK 3 U SE PC _ I C LK4 non_F usion L PC_C LK0 EC MO DE PC IEG en2 Ti mer D EB UG CLO C K MO D E E NA BLE D P ERF O RMAN CE F OR CE Enabl ed S TR AP MO DE D EFA ULT P CI E G en1 D EFA ULT Wat chdog Ti mer I G NO RE D EB UG FU SI O N CLO C K MO D E EC D I SAB LED Di sabled S TR AP DEFAU LT D EF AUL T DE FAU LT D EF AULT LO W V D DIO _ AZ R 3 68 H D A _ S D OU T 7 7 7 7 7 ,2 0 7 PC L K_ KBC P C I_ CL K 2 P C I_ CL K 3 P C I_ CL K 4 L P C _C L K 0 L P C _C L K 1 MI N I P C I E _S L T 3 _ E N # MI N I P C I E _S L T 2 _ E N # 3 .3 V S R 3 69 L PC_C LK1 C LKG E N MIN I PCI E _SLT3_ EN# G PI O 200 E NA BLE D H, H = R eser ved D EF AU LT H, L = SP I R OM C LKG E N D I SAB LED L, H = LPC RO M ( DE FAU LT) MI NI PCI E _SLT2 _EN# G PI O 199 L, L = FWH R OM 3 . 3V R 3 7 0 R 3 71 R3 7 2 R 3 7 3 R 37 4 R 3 7 5 R 37 6 R 3 77 R 3 78 R 3 79 R 3 80 R 3 81 R 3 82 R 3 83 10 K _ 0 4 *1 0K _0 4 10 K _ 0 4 10 K _ 0 4 10 K _ 0 4 10 K _ 0 4 *1 0K _0 4 R 3 84 R 3 85 *2 . 2 K _0 4 2. 2 K _ 0 4 PS2K B_D AT G / PI O 189 PS2K B_C LK/ G PI O1 90 EM BE DDE D CT RL PS2M _D AT/ G PI O 191 PS2M _C LK/ G PI O19 2 H U D S ON M1 A 1 3 STR AP PINS S 2 0 , 2 2, 2 9 A C _I N # D2 7 F28 F29 E2 7 R S MR S T # * 2 2K _ 0 4 USB _O C0#/ TR ST#/ G EV EN T12# U SB O C 8/18 Closed to SB. 18 18 18 13 USB _HS D2P J1 0 H1 1 D SUS _ST AT# TES T0 S USB 1. 1 PWR _GO O D *1 0 K _0 4 D el ? ? VGA 3/8 1 1 K _1 % _ 0 4 1 0 K _0 4 7 P C I E _ R S T# _ GA T E R 2 72 10 K _ 0 4 AD1 9 AA1 6 AB2 1 AC1 8 AF 2 0 AE1 9 AF 1 9 AD2 2 AE2 2 F5 F4 AH2 1 AB1 8 E1 A J2 1 H4 D5 D7 G5 K3 AA2 0 U S B _ R C OM P PWR _BTN # *1 0 K _ 0 4 S Y S _R S T # C4 7 1 1 u _6 . 3 V _ Y 5 V _ 0 4 G1 9 U SB M I SC SLP_ S3# SLP_ S5# *1 0 K _ 0 4 G1 RS M RS T # U SB _RC OM P 3 . 3V HUDSON GPIO/ USB/ STRAP B - 9 B.Schematic Diagrams R2 8 2 1 0K _ 0 4 SPI _C S3#/ G BE_S TA T1/ G EVE NT 21# *1 0 m li _ sh o rt _ 0 4 A 10 * 1 0K _ 0 4 3 . 3V R 6 92 U SB CLK/ 14M _25M _48M _O SC RI #/G E VEN T22# 1 0 K_ 0 4 20 20 P AR T 4O F 5 PCI _P ME #/G E VEN T4# *1 0 K _ 04 De l R6 91 , R27 5, J2 K1 1 3, 2 0 , 2 2 LI D _ S W # D3 F1 11 , 1 2 , 1 9, 2 0 , 2 3 S U S B # H1 2 0 , 2 3, 2 5 S US C # R 6 91 *1 0 m li _ s ho rt _ 0 4 F 2 20 P W R _ B TN # H5 11 S B _ P W R GD R8 1 3 *0 _0 4 S U S _ S T A T # G6 11 S 4 _ S T A TE # B3 R7 4 2 *2 . 2 K _0 4 R7 4 3 *2 . 2 K _0 4 C4 3 . 3V F6 R7 4 4 *2 . 2 K _0 4 R2 70 , R73 1 3 /7 R2 7 5 * 1 0m i l _s h o rt _0 4 G EV ENT 0 # AD2 1 GA 2 0 G EV ENT 1 # AE2 1 R2 7 0 * 1 0m i l _s h o rt _0 4 K B C _ R S T# K2 20 E C _S C I # J2 9 1 9, 2 0 E C _S MI # S W I # R7 3 1 *1 0m i l _s h o rt _ 04 H 2 20 S W I# J1 SY S _ RST # 11 S Y S _ RS T # H6 1 6 , 1 7, 19 P C I E _ W A K E # F3 16 J M_ D 3M OD E J6 3 C P U _ T H E R MT R I P # AC1 9 N B _ P W R GD *0 _0 4 *0 _ 0 4 *1 0 K _ 04 S W I # R7 3 0 R6 9 0 Schematic Diagrams HUDSON SATA/ DEBUG IO/ SPI HUDSON SATA/DEB UG IO/SPI 17 17 SAT ATXP0 SAT ATXN0 17 17 SAT ARXN0 SAT ARXP0 17 17 SAT ATXP1 SAT ATXN1 17 17 SAT ARXN1 SAT ARXP1 AH9 AJ9 AJ8 AH8 FC _C LK FC _F BC LKO U T FC _FB CLK I N SA TA _RX 0N SA TA _RX 0P AH10 AJ10 FC _O E#/ G P O I D 145 FC _AV D#/ G P IO D 146 SA TA _TX 1P F C_ WE#/ G P O I D 148 SA TA _TX 1N AG10 AF10 F C_C E1#/ G P O I D 149 F C_C E2#/ G P O I D 150 SA TA _RX 1N F C_ IN T1/ G P IO D 144 SA TA _RX 1P AG12 AF12 AJ12 AH12 AH14 AJ14 F C_ IN T2/ G P IO D 147 GP IOD SA TA _TX 2P F C_A DQ 0/ G P IO D 128 SA TA _TX 2N F C_A DQ 1/ G P IO D 129 SA TA _RX 2N F C_A DQ 3/ G P IO D 131 SA TA _RX 2P F C_A DQ 4/ G P IO D 132 F C_A DQ 5/ G P IO D 133 SA TA _TX 3P F C_A DQ 6/ G P IO D 134 SA TA _TX 3N AG14 AF14 SATAt race should use on ly 1via on the c trace. ustomers can use 2vias with GND via within 150mlis of me et s SATAlogo requirement s. Return loss is exp ected AG17 AF17 to get aff ected with 2 vias. AMD platf orms are valid at ed with one via on ly AJ17 AH17 signal via as lo ng as they can ensure that their platfor m F C_A DQ 7/ G P IO D 135 F C_A DQ 8/ G P IO D 136 SA TA _RX 3N F C_A DQ 9/ G P IO D 137 SA TA _RX 3P F C_A DQ 10/ G P IO D 138 F C_A DQ 11/ G P IO D 139 SA TA _TX 4P F C_A DQ 12/ G P IO D 140 SA TA _TX 4N F C_A DQ 13/ G P IO D 141 F C_A DQ 14/ G P IO D 142 SA TA _RX 4N F C_A DQ 15/ G P IO D 143 De bu g po rt SA TA _RX 4P AJ18 AH18 S ER I AL AT A SA TA _TX 5P SA TA _TX 5N AH19 AJ19 AVDD_SATA -> 1.1VS 3/7 FA NO UT 0/ G PI O 52 FA NO UT 1/ G PI O 53 SA TA _RX 5N 1.1VS 1K_1%_04 931_1 %_04 SATA_CALP SATA_CALN AB14 AA14 F AN IN 1/ G PI O 57 SA TA _CA LR P F AN IN 2/ G PI O 58 SA TA _CA LR N T EM P N I 0/ G PI O 171 21 T EM P N I 1/ G PI O 172 AD11 SATA_LED# HUDSO N_FANOUT0 ODD_PWR SB_PRO CHO T#_C W7 V9 W8 HUDSO N_FANTACH0 HDD0_PWR GPI O 58 SA TA _AC T# G / P I O6 7 B6 A6 A5 B5 C7 TEM PIN0 A3 B4 A4 C5 A7 VIN_ VDDCR VIN_ VDDNB VIN_ VDDIO_SUS Reserve 3/7 3 . 3VS R330 F AN IN 0/ G PI O 56 R331 R332 W5 W6 Y9 FA NO UT 2/ G PI O 54 SA TA _RX 5P T EM P N I 2/ G PI O 173 TE MP I N3/ T ALE RT #/ G PI O 174 MB_THRMDA_SB R798 *10K_04 R333 *0_0 4 R335 *0_0 4 SM D_CPU_THERM 3,8,20 10K_ 04 C Sheet 9 of 43 HUDSON SATA/ DEBUG IO/ SPI AJ2 7 AJ2 6 AH25 AH24 AG23 AH23 AJ2 2 AG21 AF21 AH22 AJ2 3 AF23 AJ2 4 AJ2 5 AG25 AH26 F C_A DQ 2/ G P IO D 130 SB_TALERT# C486 B C487 Q9 *2N3 904 T EM P _C OM M V IN 0/ G PI O 175 AD16 R576 SA TA _X1 *10 K_04 V IN 1/ G PI O 176 V IN 2/ G PI O 177 V IN 3/ G PI O 178 SPI_DATAIN J5 SPI_DATAOUT E2 SPI_CLK K4 SPI_CS#_SEL K9 HUDSO N_RO M_RST# G2 SA TA _X2 VI N 7/ G BE _LED 3/ G PI O 182 A8B8B7 V IN 4/ G PI O 179 V IN 5/ G PI O 180 AC16 V IN 6/ G BE _ST AT 3/ G PI O 181 R800 R801 R802 R803 3.3V R810 R799 *10K_04 10K_04 10 K_0 4 10 K_0 4 10 K_0 4 10 K_0 4 NC SP I _CLK / GP I O 162 SP I _CS 1#/ G PI O 165 R337 *0_0 4 MB_THRMDC_SB SM C_CPU_THERM 3,8,20 3.3VS R697 NC SP I _DO / G PI O 163 *0_0 4 3/18 S PI RO M SP I _DI / G PI O 164 330p_50V_X7R_04 330p_50V_ X7R_04 R336 E H W M ON I TO R 3.3VS 10K_04 R338 *0_04 APU_TALERT# 3,20 YG27 2 B.Schematic Diagrams PA RT 2O F 5 SA TA _TX 0P SA TA _TX 0N AH27 AF29 AE29 AF27 AG26 AG29 AF28 AF26 AG28 AH28 U19B HUDSON-1 Del ? ? VGA 3/8 RO M _R ST #/ GP I O 161 HUDSO N M1 A13 Co nnectC7 andD8,th engotoGNDdirectly. 1.8VS VIN_VDDCR R340 *11K_ 1%_04 R341 *10K_ 04 VDDCR_CPU 3.3V C488 R732 R3 42 10K_04 *0.1u_ 16V_ Y5V_04 *0_04 R346 R350 D22 A CD 3/9 R347 RB751V C 3 SB_PROCHOT# *1K_04 *1 0K_0 4 *10K_04 SB_PROCHO T#_C U21 VIN_VDDNB 8 VDD 5 SPI_DATAOUT R573 *10mil_short_04 2 SPI_DATAIN R386 *10mil_short_04 1 SPI_CS#_SEL R571 *10mil_short_04 6 SPI_CLK R572 *10mil_short_04 SI SO C491 3 WP# *0.1u_16V_Y5V_04 CE# SCK 7 C490 VSS *4.99K_1%_04 VDDCR_NB R345 *4.99K_1%_04 R3 49 10K_04 *0.1u_ 16V_ Y5V_04 HSPI_MSO 20 HSPI_CE# 20 HSPI_SCLK 20 1.5V 4 HOLD# R344 HSPI_MSI 2 0 VIN_VDDI O _SUS R351 *25VF032 B C492 R35 2 10K_04 *0.1u_16V_Y5V_04 B - 10 HUDSON SATA/ DEBUG IO/ SPI 1VS NEAR U19 *10K_04 Schematic Diagrams HUDSON POWER DECOUPLING HUDSON POWER DECOUPLING U 1 9C HUDSON-1 3 .3 V S C 49 4 2 2u ->1 0u CD 3 /8 C 4 95 C 49 6 C4 9 3 1 0 u _6 . 3 V _ X 5R _ 08 0 . 1 u _1 0 V _ X 5R _ 04 0 . 1 u _1 0 V _ X 5R _ 04 0 . 1 u_ 1 0 V _ X5 R _0 4 1 . 8V S PA RT 3 O F 5 1 .1 V S PO WER 1 3 1m A De l R35 5 3 /7 A H1 V6 Y1 9 AE5 A C2 1 AA2 AB4 A C8 AA7 AA9 AF7 AA1 9 V DDI O _33_P CI GP V DD CR _11 V DDI O _33_P CI GP V DD CR _11 V DDI O _33_P CI GP V DD CR _11 V DDI O _33_P CI GP V DD CR _11 V DDI O _33_P CI GP V DD CR _11 V DDI O _33_P CI GP V DD CR _11 V DDI O _33_P CI GP V DD CR _11 C O RE S 0 V DDI O _33_P CI GP V DD CR _11 V DDI O _33_P CI GP V DDI O _33_P CI GP V DD CR _11 C LKG EN I / O V DDI O _33_P CI GP V DDI O _33_P CI GP V DD AN _11_CLK V DD AN _11_CLK PC /I G PI O /I O C5 0 9 C 5 04 C5 0 6 V DD AN _11_CLK V DD AN _11_CLK C 49 7 7 1 mA FL ASH /I O AF2 2 AE2 5 AF2 4 A C2 2 4. 7 u _ 6 . 3V _ X 5 R _ 0 6 0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u _1 0 V _ X 5R _ 04 * 0. 1 u _ 10 V _ X 7 R _ 0 4 3 .3 V S . H C B 10 0 5 K F -1 2 1T 2 0 L86 V D D P L _ 3 . 3 V _P C I E V DDI O _18_F C V DD AN _11_CLK V DDI O _18_F C V DD AN _11_CLK V DDI O _18_F C V DD AN _11_CLK 4 3 mA PCI EX PR ESS C5 1 2 AE2 8 VDD I O_3 3_GB E_S U2 6 V2 2 V2 6 V2 7 V2 8 V2 9 W22 W26 600m A C 5 18 C5 1 9 C 5 20 PAR T 5 OF 5 C 5 01 C5 0 2 C5 0 3 Y1 4 Y1 6 AB1 6 A C1 4 AE1 2 AE1 4 AF9 AF1 1 AF1 3 AF1 6 A G8 A H7 A H1 1 A H1 3 A H1 6 AJ 7 A J1 1 A J1 3 A J1 6 * 1 u_ 6 . 3 V _ X5 R _ 04 10 u _ 6. 3 V _ X 5 R _ 0 8 0 . 1 u_ 1 0 V _ X5 R _0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 0 . 1 u _1 0 V _ X 5R _ 04 Del L 85 3/7 1 .1 V S K2 8 K2 9 J 28 K2 6 J 21 J 20 K2 1 J 22 CD 3 /8 TBD m A C5 0 5 C5 0 7 C 5 08 C5 1 0 C 4 98 *1 u _ 6. 3 V _ X 5 R _ 0 4 1 0 u_ 6 . 3 V _ X5 R _0 8 0 . 1 u_ 1 0 V _ X5 R _ 04 0. 1 u _ 10 V _ X 5 R _ 0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 22 u -> 10 u C D 3/8 De l R35 6 3 /7 V1 R3 5 6 M1 0 R7 7 1 *1 0 m li _ s ho rt A9 B1 0 K1 1 B9 D1 0 D1 2 D1 4 D1 7 E9 F9 F12 F14 F16 C9 G1 1 F18 D9 H1 2 H1 4 H1 6 H1 8 J1 1 J1 9 K1 2 K1 4 K1 6 K1 8 H1 9 *1 0 m li _ s ho rt GB E LAN 1 .1 V S C 517 C5 0 0 V DDP L_33_P CI E 1u _ 1 0 V _Y 5 V _ 06 0 . 1 u _ 10 V _ X 5 R _ 0 4 22 u - >1 0u CD 3 /8 HUDSON-1 C4 9 9 V DDI O _18_F C V DD RF _GB E_S U 19 D CD 3 /8 5 1 0m A C5 2 1 *1 u _ 6. 3 V _ X 5 R _ 0 4 0 . 1 u _1 0 V _ X 5R _ 04 1 0 u_ 6 . 3 V _ X5 R _ 08 1 u_ 6 . 3 V _ X 5R _ 04 0 . 1 u_ 1 0 V _ X5 R _0 4 V DDA N_11_ PCI E V DD CR_1 1_GB E_S V DDA N_11_ PCI E V DD CR_1 1_GB E_S L7 L9 R7 7 2 *1 0 m li _ s ho rt V DDA N_11_ PCI E V DDA N_11_ PCI E V DDA N_11_ PCI E VD DI O _GB E_S V DDA N_11_ PCI E VD DI O _GB E_S M6 P8 R7 7 3 *1 0 m li _ s ho rt V DDA N_11_ PCI E V DDA N_11_ PCI E 3 . 3V S L8 8 9 3 mA V D D P L_ 3 . 3 V _ S A T A . H C B 1 0 05 K F -1 2 1 T2 0 C5 2 7 A D1 4 A J2 0 AF1 8 A H2 0 A G1 9 AE1 8 A D1 8 AE1 6 C5 2 8 *0 . 1 u _ 10 V _ X 7 R _ 0 4 1 u _ 10 V _ Y 5 V _ 0 6 Del L8 9 3 /7 SE RI AL A TA 3 .3 V 3. 3V_S 5 I/ O V DDP L_33_S ATA V DD IO _33_S V DDA N_11_ SAT A V DD IO _33_S V DDA N_11_ SAT A V DD IO _33_S V DDA N_11_ SAT A V DD IO _33_S V DDA N_11_ SAT A V DD IO _33_S V DDA N_11_ SAT A V DD IO _33_S V DDA N_11_ SAT A V DD IO _33_S V DDA N_11_ SAT A V DD IO _33_S A2 1 D2 1 B2 1 K1 0 L 10 J9 T6 T8 3 2 mA C5 2 9 C 5 30 C5 3 1 CD 3/8 * 0. 1 u _ 10 V _ X 7 R _ 0 4 *1 u _1 0 V _ Y 5 V _ 0 6 1u _ 1 0V _Y 5 V _0 6 1. 1 V S 1 .1 V CD 3 /8 CO R E S5 5 67 m A C5 3 2 C5 3 3 C5 3 4 C5 3 5 U SB I / O C5 3 6 * 1u _ 6 . 3 V _X 5 R _ 0 4 0 . 1 u _1 0 V _ X 5R _ 04 1 0 u_ 6 . 3 V _ X5 R _ 08 1 u _ 6 . 3V _X 5 R _ 0 4 0 . 1 u_ 1 0 V _ X5 R _0 4 22u -> 10 u C D 3/8 3 .3 V A V DD _ USB L91 CD 3 /8 . H C B 1 0 0 5K F -12 1 T 2 0 CD 3/8 6 58 m A A1 8 A1 9 A2 0 B1 8 B1 9 B2 0 C1 8 C2 0 D1 8 D1 9 D2 0 E1 9 VD DC R_11_S V DDA N_33_ USB _S VD DC R_11_S V DDA N_33_ USB _S V DDA N_33_ USB _S VDD I O_A Z_S V DDA N_33_ USB _S V DDA N_33_ USB _S VDD CR _11_US B_S V DDA N_33_ USB _S VDD CR _11_US B_S 11 3 m A V D D I O_ A Z M8 A1 1 B1 1 C 5 37 19 7 m A V DDA N_33_ USB _S V DD PL_33_S YS V DDA N_33_ USB _S P LL V DDA N_33_ USB _S VD DP L_11_SY S_S V DDA N_33_ USB _S M2 1 V D D P L_ 1 . 1 V L 22 62m A F19 17m A VD DP L_33_US B_S D6 V DDA N_11_ USB _S V DDA N_11_ USB _S VDD AN _33_HWM _S V DD XL_33_S L90 47 m A L 20 C 5 39 AV D D_ U SB 5m A T B D mA . H C B 1 00 5 K F -1 2 1T 2 0 . M1 9 P2 1 P2 0 M2 2 M2 4 M2 6 P2 2 P2 4 P2 6 T2 0 T2 2 T2 4 V2 0 J2 3 H C B 1 00 5 K F -1 2 1T 2 0 V D D A N _3 . 3 V _ H W M 3 . 3V C5 4 7 V SS V SSI O _SA TA V SS V SSI O _SA TA V SSI O _SA TA V SS V SS V SSI O _SA TA V SS V SSI O _SA TA V SS V SSI O _SA TA V SS V SSI O _SA TA V SSI O _SA TA V SS V SS V SSI O _SA TA V SS V SSI O _SA TA V SS V SSI O _SA TA V SS V SSI O _SA TA V SS V SSI O _SA TA V SSI O _SA TA V SS V SS V SSI O _SA TA V SS V SS V SSI O _US B V SS V SSI O _US B V SSI O _US B V SS V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B G R OU ND V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SSI O _US B V SS V SS V SS V SS V SS AJ 2 A2 8 A2 E5 D2 3 E2 5 E6 F24 N1 5 R1 3 R1 7 T1 0 P1 0 V1 1 U1 5 M1 8 V1 9 M1 1 L1 2 L1 8 J7 P3 V4 A D6 A D4 AB7 A C9 V8 W9 W10 A J 28 B2 9 U4 Y1 8 Y1 0 Y1 2 Y1 1 AA1 1 AA1 2 G4 J4 G8 G9 M1 2 AF2 5 H7 A H2 9 V1 0 P6 N4 L4 L8 Sheet 10 of 43 HUDSON POWER DECOUPLING V SSA N_H WM C5 4 1 L92 V SS V SSI O _SA TA D8 10 u _ 6. 3 V _ X 5 R _ 0 8 0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u _1 0 V _ X 5R _ 04 V D D XL _ 3 . 3 V TB D m A L9 3 C5 4 0 V SS V SSI O _SA TA E FUS E 1 . 1V V D D P L _ 3. 3 V V DDA N_33_ USB _S V SS V SSI O _SA TA Y4 Del R 36 1 3 /7 1u _ 6 . 3V _X 5 R _ 0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 V D D C R _1 . 1 _ U S B H U D S ON M1 A 1 3 1. 1 V C5 3 8 TB D m A V DDA N_33_ USB _S C 54 2 C5 4 3 C5 4 4 C5 4 5 C 54 6 0. 1 u _ 10 V _ X 5 R _ 0 4 C 1 1 D1 1 1 0 u _6 . 3 V _ X 5R _ 08 1 u_ 6 . 3 V _ X5 R _0 4 * 1u _ 6 . 3 V _X 5 R _ 0 4 *1 0 u_ 6 . 3 V _ X5 R _0 8 F26 G2 6 V SSI O _SA TA . H C B 1 00 5 K F -1 2 1T 2 0 C 5 48 0. 1 u _ 10 V _ X 5 R _ 0 4 1 u _1 0 V _ Y 5 V _ 0 6 V SSX L V SS PL_S YS V SSI O _PC IE CLK VS SI O _PCI E CLK V SSI O _PC IE CLK VS SI O _PCI E CLK V SSI O _PC IE CLK VS SI O _PCI E CLK V SSI O _PC IE CLK VS SI O _PCI E CLK V SSI O _PC IE CLK VS SI O _PCI E CLK V SSI O _PC IE CLK VS SI O _PCI E CLK V SSI O _PC IE CLK V SSI O _PC IE CLK VS SI O _PCI E CLK VS SI O _PCI E CLK V SSI O _PC IE CLK VS SI O _PCI E CLK V SSI O _PC IE CLK VS SI O _PCI E CLK V SSI O _PC IE CLK VS SI O _PCI E CLK V SSI O _PC IE CLK VS SI O _PCI E CLK V SSI O _PC IE CLK VS SI O _PCI E CLK VS SI O _PCI E CLK V D D A N _1 . 1 V _ U S B M2 0 H2 3 H2 6 AA2 1 AA2 3 AB2 3 A D2 3 AA2 6 A C2 6 Y2 0 W21 W20 AE2 6 L2 1 K2 0 H U D S ON M1 A 1 3 C5 4 9 C 5 50 0. 1 u _ 1 0V _ X 5 R _ 0 4 1 u _1 0 V _ Y 5 V _ 0 6 3. 3 V V D D A N _3 . 3 V _ H W M L94 3 .3 VS 3 .3 V V D DP L _ 3 .3 V V D D P L_ 1 . 1 V C5 5 1 L 95 * 10 m i _l s h o rt . H C B 1 0 0 5K F -12 1 T 20 L 96 C5 5 3 R3 6 3 1 .1 V V D D I O_ A Z De l R36 2 3 /7 1 .5 V R 36 2 . H C B 1 0 0 5 K F -1 21 T 2 0 C 5 54 . H C B 1 0 05 K F -1 2 1 T 20 CD 3 /8 C 5 55 C5 5 2 *1 u _ 10 V _ Y 5 V _ 0 6 0 . 1 u _1 0 V _ X 5R _ 04 C 55 6 * 0 _0 4 C 55 7 1u _ 1 0V _Y 5 V _0 6 * 0. 1 u _ 1 0V _ X 7 R _ 0 4 1 u _ 1 0V _ Y 5V _0 6 *0 . 1 u _1 0 V _ X 7R _ 04 1 u_ 1 0 V _ Y 5 V _ 06 HUDSON POWER DECOUPLING B - 11 B.Schematic Diagrams C5 1 1 V DD AN _11_CLK N1 3 R1 5 N1 7 U1 3 U1 7 V1 2 V1 8 W12 W18 Schematic Diagrams POWERGOOD/ TPM 14 3 .3 V U2 2 B 7 4 LV C 0 8P W 4 26 1 . 1 V _ P W R G D 6 5 S Y S _ R S T# 7 8 3 .3 V 2 8 P W R G D _ V C OR E 3 .3 V 3 .3 V Del R 775 3/7 R7 7 6 U 22 D 7 4 LV C 0 8P W 12 11 3 10 7 7 8, 1 2 , 1 9, 20 , 2 3 S U S B # 7 8 0 _0 4 0 _0 4 0 _0 4 0 _0 4 R 8 18 R 8 19 R 8 20 0 _0 4 0 _0 4 0 _0 4 26 23 20 17 U 50 L A D0 L A D1 L A D2 L A D3 21 L CL K 22 16 27 15 *0 _ 04 R2 3 9 *1 0 K _0 4 V D D3 R2 4 8 T P M_ B A D D T P M_ P P C8 7 6 10 19 24 3 .3VS to VDD3 3 /9 G P IO GP I O 2 6 2 0 . 1 u_ 1 6V _Y 5 V _0 4 T P M3 0 04 T P M3 0 05 13 XTAL I 14 XTAL O X T A LI XT A L O N C_ 1 N C_ 2 N C_ 3 TESTI GN D _ 1 GN D _ 2 GN D _ 3 GN D _ 4 4 11 18 25 S L B 9 6 3 5T T 3/2 1 Ass erted b efore en tering S3 LPC reset t iming: LPCP D# inac tive to LRST# inact ive 32~96us TPM_BADD B - 12 POWERGOOD/ TPM C 87 9 C8 8 0 PP 8 C8 7 8 VSB T E S T B I/B A D D 7 C 8 77 V D D3 5 9 T P M3 0 0 1 1 T P M3 0 0 2 3 T P M3 0 0 3 1 2 TPM_PP S Y S _ P W RO K *1 0 K _ 04 0 . 1 u_ 1 6V _Y 5 V _0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 1 u _1 6 V _ X5 R _0 6 TPM L F RA M E # L R E S E T# S E R IRQ C LK R U N # L P CP D # 10 K _ 0 4 Pu ll hig ht r es erve 3/17 V DD 1 V DD 2 V DD 3 28 R2 4 6 3 .3 V S S 4 _ S TA T E # R 8 14 R 8 16 R 8 17 R 8 15 P C L K _T P M LP C _ F R A M E # B U F _ P L T _R S T # S E RIR Q P C I _ C LK R U N # *1 0 mi l _ sh o rt R3 6 7 3 .3 V S 7 ,2 0 7 , 16 , 1 7 , 19 , 2 0 7 ,2 0 7 S B _P W R OK R3 6 5 1 u_ 6 . 3 V _Y 5 V _0 4 TPM 1.2 L P C_ A D0 L P C_ A D1 L P C_ A D2 L P C_ A D3 *1 0 mi l _ sh o rt C 84 1 ON 7 ,2 0 7 ,2 0 7 ,2 0 7 ,2 0 R3 6 4 13 2 Sheet 11 of 43 POWERGOOD/ TPM De l R3 64, R 36 5 3/7 10 K _ 0 4 8 1 *0 _ 04 9 7 B.Schematic Diagrams 2 5 , 28 D D R 1. 5 V _ P W R GD R 7 74 U2 2 C 74 L V C 0 8 P W 14 U2 2 A 7 4 LV C 0 8P W 14 27 1 . 8 V _ P W R G D 3 .3 V *1 0 mi l _ sh o rt 14 R7 7 5 HI: ACCESS L OW: NORMAL ( Int ernal PD) HI: 4E/ 4F H L OW: 2E/ 2F H P C L K _ TP M X 12 4 3 M C -3 0 6 _3 2 . 7 68 K H z 1 2 X 13 4 3 * 3 2. 7 6 8 K H z 1 2 Va lue mo dify 3 /23 1 8p to 1 5p 3 /9 C 8 81 C8 8 2 15 p _5 0 V _ N P O _ 04 1 5p _ 5 0V _ N P O_ 0 4 R 8 21 *3 3 _ 04 T P M_ P P R 8 22 *1 0 K _ 04 T P M_ B A D D R 8 23 1 0K _0 4 R 8 24 *1 0 K _ 04 C 8 83 3 .3 V S *1 0 p_ 5 0 V _0 4 S B _ P W R GD 8 A L L _ S Y S _ P W R GD 1 3 , 2 0 Schematic Diagrams ANX3110 ASIC ANX3110 ASIC 3 . 3V S >06 3/1 1 C8 8 5 C8 8 6 C 88 7 C 8 88 C 8 84 2 . 2 u_ 6 . 3V _ X 5 R _ 06 0 . 1 u_ 1 0V _ X 5 R _ 04 0 . 1 u _1 0 V _X 5 R _ 0 4 0. 1 u _1 0 V _ X5 R _ 0 4 0 . 0 1u _ 16 V _ X 7R _0 4 C 88 9 0 . 01 u _1 6 V _ X7 R _ 0 4 1 .2 VS C8 9 0 C 89 1 C8 9 3 C 8 92 0 . 1 u_ 1 0 V _X 5 R _ 04 0. 1 u _1 0 V _ X5 R _ 0 4 2 . 2 u_ 6 . 3V _ X 5 R _ 06 0 . 0 1 u_ 1 6V _ X 7 R _ 04 1. 2 V S >0 6 3 /11 3 .3 V S Re se rve 3/1 7 1 3, 2 0 B R I G H T N E S S R 83 9 3 * 1M _0 4 O N_ V A RY 3, 1 3 L V D S _ D D C _ D A T A 3, 1 3 L V D S _ D D C _ C L K 3 , 13 3 , 13 3 , 13 3 , 13 R8 4 1 *1 M_ 0 4 R 8 40 *0 _ 04 P W M_ V A R Y _B L 1 2 5 62 A V S S _1 AVSS_ 2 AVSS_ 3 8 25 33 39 63 9 32 46 59 13 53 LV D S _ U 3 _P L V D S _ U 3_ N L V D S _ C L K U _P L V DS _ CL K U_ N LV D S _ U 2 _P L V D S _ U 2_ N LV D S _ U 1 _P L V D S _ U 1_ N LV D S _ U 0 _P L V D S _ U 0_ N OS C _ I N OS C _ OU T TD O TD I TM S TC K A N X 3 11 0 L V D S _L 3 _P L V D S _ L 3_ N L V D S _ C L K L _P LV D S _C L K L_ N L V D S _L 2 _P L V D S _ L 2_ N L V D S _l 1 _P L V D S _ l 1_ N L V D S _L 0 _P L V D S _ L 0_ N CPU_ VA R Y _ BL C 8 99 C 9 00 0. 1 u _ 10 V _ X5 R _ 0 4 0. 1 u _ 10 V _ X5 R _ 0 4 L V D S -L2 P L V D S -L2 N L V D S -L1 P L V D S -L1 N C C C C 0. 1 u _ 10 V _ X5 R _ 0 4 0. 1 u _ 10 V _ X5 R _ 0 4 0. 1 u _ 10 V _ X5 R _ 0 4 0. 1 u _ 10 V _ X5 R _ 0 4 3 4 6 7 R8 4 3 P OR R E S E T _L 48 L V D S _D D C _D A TA L V D S _D D C _C LK 9 01 9 02 9 03 9 04 A V DD1 2 _ 1 54 55 57 56 O I S K A V D D 3 3_ 1 A V DD3 3 _ 2 A V D D 3 3_ 3 A V D D 3 3 _4 A V D D 33 _ 5 TD TD TM TC 60 61 D P _ HP D D P _H P D *0 _ 04 30 31 58 0_ 0 4 DPRX _ A UX_ N DPRX _ A UX_ P D P R X _ L0 _ P D P R X _ L0 _ N D P R X _ L1 _ P D P R X _ L1 _ N DPRX _ HP D A N X 3 1 10 65 EPAD 3 L V D S -L 2P L V D S -L 2N L V D S -L 1P L V D S -L 1N R 8 42 34 12 O S C_ IN O S C _ OU T D D C _ D A TA D D C _C LK VAR Y_ BL B L_ E N D I G ON C LK _ S E L TEST _ EN R_ B IA S 3 .3 V S P OR # R ST# U5 1 45 44 43 42 41 40 38 37 36 35 29 28 27 26 24 23 22 21 20 19 50 49 47 15 14 Sheet 12 of 43 ANX3110 ASIC T XCL K_ UP 1 3 T XCL K_ UN 1 3 T X OU T_ U 2 P 1 3 T X OU T_ U 2 N 1 3 T X OU T_ U 1 P 1 3 T X OU T_ U 1 N 1 3 T X OU T_ U 0 P 1 3 T X OU T_ U 0 N 1 3 T X C L K _ LP 1 3 T X C L K _ LN 13 T X OU T_ L 2P 1 3 T X OU T_ L 2N 1 3 T X OU T_ L 1P 1 3 T X OU T_ L 1N 1 3 T X OU T_ L 0P 1 3 T X OU T_ L 0N 1 3 S DA 13 S CL 13 X L T _B L ON _P W M 1 3 X L T _B L E N 1 3 X L T _D I GON 1 3 X L T_ B L ON _P W M 10 11 64 0 _0 4 0 _0 4 C F G_ S D A CF G _ S CL 0. 1 u _ 10 V _ X5 R _ 0 4 R 8 37 R 8 38 52 51 7 A N X 31 1 0 _C LK P 7 A N X3 1 1 0_ C L K N D V D D 1 2 _1 D V D D 12 _ 2 D V D D 1 2 _3 D V D D 12 _ 4 C 8 97 0 _ 04 C8 9 8 * 3. 3u _ 6. 3 V _ X5 R _0 6 D V D D 3 3 _1 D V D D 33 _ 2 R 8 3 5 1 M_ 0 4 3 . 3V S G P I O_ 0 GP I O_ 1 GP I O _ 2 R8 3 6 E C_ RS T # 0 . 1u _ 10 V _ X 5R _0 4 16 17 18 R8 5 6 * 1 00 K _ 04 7 , 20 C 8 96 C8 9 5 2. 2 u _6 . 3 V _ X5 R _ 0 6 3 .3 V S CL K _ SE L T EST _ EN GP I O _0 G P I O_ 1 GP I O_ 2 Mod ify 3/11 R8 5 1 C 9 05 1 2K _ 1 %_ 0 4 10 0 p_ 5 0 V _N P O_ 0 4 1.2VS R8 5 2 1 0K _ 0 4 1 .5 V nee d to clo se to c hip R 85 3 1 0K _ 0 4 R 85 4 * 10 K _ 0 4 R 8 59 * 10 K _ 04 ? ? 3.3VS En able 3/2 2 P R2 1 9 0 _0 6 3 . 3V S Re ser ve 3/2 2 De l PJ24 3 /22 R 8 55 0 _0 4 P U 13 1 P R 2 20 * 1 0K _ 0 4 V IN R85 4 o ff 3/2 2 3. 3 V S 1 .2 VS 200mA 5 V O UT 1. 2 V S 3 8 , 11 , 1 9 , 20 , 2 3 S U S B # EN 2 SET A P L 53 1 7-1 2 B I -T R G PC2 4 3 * 1u _ 1 0V _ Y 5 V _ 0 6 1 u_ 1 0V _ Y 5V _ 0 6 P C 23 9 PC2 4 0 P C 2 41 2 . 2 u_ 6 . 3V _ X 5R _ 06 *1 0 u_ 6 . 3V _ X 5 R _ 06 0 . 1 u _1 6 V _Y 5V _0 4 4 G ND Del R8 56 3/14 P C 24 2 R1 P R 22 1 >0 6 3 /11 C 9 06 C 90 7 C9 0 8 C 9 09 C 91 0 C9 1 1 C 9 12 * 8. 2 K _ 1% _ 0 4 ON 2 . 2 u_ 6 . 3V _ X 5 R _ 06 Vo =Vr ef *(R 2+ R1) /R2 R2 0 . 1 u _1 0 V _X 5 R _ 0 4 0 . 1 u_ 1 0V _ X 5 R _ 04 0. 1u _ 10 V _ X5 R _0 4 0 . 1 u _1 0 V _X 5 R _ 0 4 0 . 0 1 u_ 1 6V _ X 7 R _ 04 0 . 0 1u _ 16 V _ X 7R _0 4 P R 22 2 0 _ 04 Fix ed : P1 OP EN, R 2 s hor t to GN D ANX3110 ASIC B - 13 B.Schematic Diagrams >06 3/1 1 Rese rve 3 /22 C 8 94 0 . 0 1u _ 16 V _ X 7R _0 4 Schematic Diagrams LVDS/ INVERTER 3 .3 VS 2 .2K to 4 .7K 3 /14 EDID Mode J _ LC D 1 8 0mi ls R R R R R R 1 3 5 7 9 11 13 L V D S -L C LK N 1 5 L V D S -L C LK P 1 7 19 L V D S -L 1 N 2 1 L V D S -L 1 P 23 25 L V D S -L 0 N 2 7 29 L V D S -L 0 P 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 I N V _ B L ON R8 5 7 0 _0 4 B RIG HT NE S S R8 5 8 *0 _ 0 4 XL T _B LO N _ P W M 12 , 2 0 12 R L V D S -L2 N R L V D S -L2 P R LV D S -L C L K N R LV D S -L C L K P 3 . 3V S 3 . 3V R LV D S -L 1 N R LV D S -L 1 P D2 3 C5 6 1 C 0 . 1 u_ 1 6 V _Y 5 V _ 0 4 C5 6 2 C5 6 3 4. 7 u _ 6. 3V _ X 5 R _ 0 6 0. 1 u _ 16 V _ Y 5 V _ 0 4 AC R_ B RIG HT N E S S R LV D S -L 0 N R LV D S -L 0 P C5 6 6 *0 . 1 u_ 1 6 V _ Y 5 V _ 04 A 12 12 12 12 * B A V 9 9 R E C TI F I E R 3 /10 TX C LK _U N T XCL K _ UP TX O U T _ U 1 N T XO U T _ U 1 P 4 0. 1 u _ 50 V _ Y 5 V _ 06 *1 0 K _0 4 Q4 5 A 2G *M TD N 7 0 02 Z H S 6 R G U 24 4 5 3 5G S Q4 5 B *M TD N 7 0 02 Z H S 6 R D S 3 N B _E N A V D D R 6 98 12 R 6 99 XL T _ D I G ON 0_04 V O UT EN GN D 3 E NA V D D * 0_ 0 4 1 VIN VIN R L V D S -L0 N R L V D S -L0 P R L V D S -L1 N G5243A 6-02-05243-9C0 APL3512A 6-02-03512-9C0 S *1 0 mi l _ sh o rt _ 04 BACKLIGHT ENABLE B K L_ E N _R R 38 9 C5 6 7 3 .3 V 1 U 2 5A 74 L V C 0 8 P W 3 R L V D S -L1 P * 0_ 0 4 R 7 01 0_04 R6 0 3 0 _0 4 TX O U T _L 0 N R6 0 4 *0 _ 0 4 LV D S -L 0 P R6 0 5 0 _0 4 TX O U T _L 0 P R6 0 6 *0 _ 0 4 LV D S -L 1 N R6 0 7 0 _0 4 TX O U T _L 1 N R6 0 8 *0 _ 0 4 LV D S -L 1 P R6 0 9 0 _0 4 TX O U T _L 1 P R6 1 0 *0 _ 0 4 LV D S -L 2 N R6 1 1 0 _0 4 TX O U T _L 2 N R6 1 2 *0 _ 0 4 LV D S -L 2 P R6 1 3 0 _0 4 TX O U T _L 2 P R6 1 4 *0 _ 0 4 LV D S -L C L K N R6 1 5 0 _0 4 TX C LK _ L N R6 1 6 *0 _ 0 4 LV D S -L C L K P Z 1 20 1 U2 5 B 7 4L V C 08 P W R6 1 7 0 _0 4 TX C LK _ L P R6 1 8 *0 _ 0 4 L V D S _ D D C _D A T A R6 1 9 0 _0 4 R6 2 0 *0 _ 0 4 L V D S _ D D C _C LK R6 2 1 0 _0 4 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 LV D S _ D A T A LV D S _ C L K 14 1 0 0K _0 4 S B _ B LO N Z 1 2 02 U 25 C 7 4 L VC0 8 PW 9 3 .3 V 8 I N V _ B L ON *1 00 K _ 0 4 12 8 , 2 0, 2 2 L I D _S W # U2 5 D 7 4L V C 08 P W 11 13 7 1 1 , 20 A L L _ S Y S _ P W R GD 7 Z 1 2 03 1 0 14 R3 9 1 3 TX OU T _L 0 N 1 2 LV D S -L 0P 3 TX OU T _L 0 P 1 2 LV D S -L 1N 3 ,1 2 TX OU T _L 1 N 1 2 LV D S -L 1P 3, 1 2 TX OU T _L 1 P 1 2 LV D S -L 2N 3 ,1 2 TX OU T _L 2 N 1 2 LV D S -L 2P 3, 1 2 TX OU T _L 2 P 1 2 LV D S -L C L K N 3 TX C L K _ L N 1 2 LV D S -L C L K P 3 TX C L K _ L P 1 2 C 56 8 6 R 39 0 8 LV D S -L 0N 4 2 5 R701 on, R700 off for W270BUQ 3/8 B - 14 LVDS/ INVERTER R L V D S -LC L K P 7 X L T_ B L E N R 7 00 3 . 3V R L V D S -LC L K N 7 12 B L ON LV D S -L 0 N *0 . 4 7u _ 1 0V _ Y 5V _ 0 4 14 * 10 0 K _ 04 3 .3 V 14 R3 8 8 *0 _ 0 4 A P L 35 1 2 A R 38 7 1 0 0K _0 4 R 699 on , R6 98 o ff fo r W27 0BUQ 3 /8 E N A V DD R6 0 2 2 R L V D S -L2 P 3 12 12 12 12 2A R L V D S -L2 N B K L_ E N 2N 2P 0N 0P Default W270BUQ *0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 D 1 1 0 0 K _0 4 D 4 6 *2 00 _ 1 % _0 4 1108 1 M_ 04 20 T_ U T_ U T_ U T_ U C 5 64 0 . 1 u_ 1 6 V _Y 5 V _0 4 R2 2 8 R5 8 6 Q4 9 M T N 7 0 02 Z H S 3 2A P L V DD T X OU T X OU T X OU T X OU P L V DD 0 . 22 u _ 50 V _ 0 6 R9 3. 3 V S PANEL POWER C 5 65 R2 3 8 C1 7 R LV D S -L 2N R LV D S -L 2P Mo dify 3/1 1 3. 3 V 3A C5 6 0 8 7 6 5 C 5 59 3 2 1 Q 46 P 2 0 0 3E V G I N V _B LO N 2A 0 . 0 1u _ 5 0V _ X 7 R _ 0 4 C 18 3/1 0 R _B R I GH TN E S S V IN_ L CD L1 *0 _ 06 . L V D S _ D A TA L V D S _ C LK 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 40pin for W27 3/8 3 . 3V S V IN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 8 72 1 6- 40 0 6 F ollo w ? ? ? ? 3/7 0. 1 u _ 50 V _ Y 5 V _ 06 B.Schematic Diagrams J_ L C D 2 3/10 P LV D D 30pin for W24/W25 V IN_ L CD F or ANX31 10 3/10 LV D S _ D A T A LV D S _ C L K R _B R I GH T N E S S *8 7 21 6 -3 00 6 Sheet 13 of 43 LVDS/ INVERTER J_LCD1 For single channel J_LCD2 For dual channel 4. 7 K _ 0 4 4. 7 K _ 0 4 V IN_ L CD G1 G2 R5 7 7 R5 7 8 G nd 1 Gn d 2 PANEL CONNECTOR R3 9 2 C 56 9 *1 M_ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 04 SD A SC L L V D S _ D D C _ D A TA SD A L V D S _ D D C _ C LK SC L 3, 1 2 12 12 3, 1 2 Schematic Diagrams HDMI/ CRT HDMI PORT 5V S _H D MI A C A R 6 57 *2 00K _ 04 R 7 20 * 100 K _0 4 H D MI B_ D A TA 1P Mo d i fy 3 /1 1 * 0_ 04 R 4 04 5 VS R 65 9 4. 7K _ 04 TMD S D A TA 1+ T MD S D A T A2 S H IE L D 2 1 9 Q28 5 3 1 TMD S D AT A 2+ 2 . 2K _0 4 D 2 H D MI B _D A T A0 N L10 0 4 3 H D MIB _ D AT A 0P *H D MI 2 012 F 2S F -9 00 T0 4-s hort 7 R 39 8 R 40 0 S H I E LD 1 R 6 60 S H D MI_ D D C _D AT A TMD S D AT A 0+ TMD S D A TA 1- C 12 81 7-11 9A 5 -L 3 .3 V S R 7 21 T MD S D A T A0 - S H IE L D 0 1 2 *H D MI 2 01 2F 2S F -90 0T0 4-s ho rt H D MI B_ E XT 1_S C L 3. 3 VS R 65 8 1 0K _ 04 H D MI _C E C R 4 06 G 2 . 2K _0 4 D MTN 700 2Z H S 3 2 N 39 04 P OR T C _H P D D e l R7 1 9 3 /1 1 Q26 S H D MI B _E XT 1_ H P D 3 L1 01 *LV A R 04 02 -240 E 0R 0 5P -LF 2 00 K _04 G C E R 55 4 2 FO R EMI 13 11 1 L10 2 2 H D MI B _D A T A2 N 4 3 H D MIB _ D AT A 2P *H D MI 2 01 2F 2S F -900 T0 4-s ho rt Sheet 14 of 43 HDMI/ CRT 3 . 3V S H D MI B_ E XT 1_S D A MTN 700 2Z H S 3 H D MI B_ D 2B P 3 H D MI B _ D 2B N H D MI B_ D 2B N 3 H D MI B _ D 1B P H D MI B_ D 1B P 3 H D MI B _ D 1B N H D MI B_ D 1B N H D MI B_ C LK B N 6-20-14X30-015 RE D H D MI _D D C _ C LK GR N B LU E 1 0p _5 0V _N P O_ 04 10 p_ 50 V_ N P O_0 4 J_C R T1 10 8A H 15 FS T 04 A1 C C 1 9 2 F C M1 00 5MF -60 0T0 1 F C M1 00 5MF -60 0T0 1 F C M1 00 5MF -60 0T0 1 10 p_5 0V _ N PO_ 04 1 50 _1 %_0 4 1 50 _1 %_ 04 15 0_ 1% _04 L1 04 L1 03 L1 05 2 2p_ 50 V _N P O_0 4 R 4 14 2 2p _5 0V _N P O_ 04 R 41 3 22 p_5 0V _ N PO_ 04 R 4 12 F C M10 05 MF -6 00 T0 1 F C M10 05 MF -6 00 T0 1 F C M10 05 MF -6 00 T0 1 10 p_ 50 V_ N P O_04 M o d i fy 3 /1 1 1 0p _50 V _N P O_0 4 L 13 7 L 13 9 L 13 8 1 0p _5 0V _N P O_ 04 D A C _R E D D A C _GR E E N D A C _B LU E 3 D A C _R E D 3 D A C _GR E E N 3 D A C _B LU E H D MI _D D C _ D AT A 2140 m il 3 11 4 12 D D C D A TA 5 13 H SY N C 6 14 7 V S Y NC 15 DDCL K D A C _ D D C AD A T A 10 D A C _ D D C AC L K 11 D AC _ H S Y N C D A C _ H SY N C 13 D AC _ V SY N C D A C _ VS Y N C 15 3 D AC _D D C A D A TA 3 D AC _ D D C A C LK 3 3 U 27 DDC_ IN1 DDC_ IN2 S Y N C _I N 1 S Y N C _I N 2 D D C _OU T 1 D D C _OU T 2 S Y N C _OU T 1 S Y N C _OU T 2 1 5V S V C C _S Y N C 7 3. 3V S 8 V C C _V I D E O VI D E O_ 2 V C C _D D C VI D E O_ 3 BYP TP D 7S 0 19 GN D C 58 8 10 00p _5 0V _X 7 R _0 4 2 20 p_ 50 V_ N P O_04 22 0p _5 0V _N P O_ 04 C 5 87 C 5 84 C 58 3 D D C D A TA 9 DDCL K 12 14 C R T_ H S Y N C R 41 5 33 _0 4 HS Y NC 16 C R T_ V SY N C R 41 6 33 _0 4 V S Y NC 3 B LU E 4 GR N 5 RE D VI D E O_ 1 2 3 . 3V S C 5 86 M o d i fy 3 /1 1 C 58 2 C 8 67 C 8 66 3 /2 3 C 58 5 10 00 p_5 0V _ X7 R _0 4 2. 2K _ 04 2 . 2K _0 4 2 .2 K _0 4 2. 2 K_ 04 Fo l o l w ? ? ? ? C 86 5 5V S C 58 1 A R B 7 51 V GN D 1 GN D 2 R 8 63 R 86 2 R 86 1 R 8 60 C D6 C 5 80 3. 3 V S C 5 79 8 0. 2 2u _1 0V _Y 5V _ 04 3 H D MI_ D D C _D A T A *0. 1 u_1 6V _ Y 5V _0 4 CRT PORT H D MI B_ C LK B P C 5 91 3 H D MI _D D C _ C LK H D MI B_ D 0B N 0 . 22 u_ 10V _ Y5 V _04 3 H D MIB _ C LK B N C 59 0 3 H D MIB _ C LK B P C 57 8 0 . 1u _1 6V _Y 5 V_ 04 H D MI B_ D 0B P 0. 2 2u_ 10 V _Y 5V _0 4 3 H D MI B _ D 0B N C 58 9 3 H D MI B _ D 0B P C 5 77 Mo d fi y 3 /1 1 . . . 3 H D MI B _ D 2B P . . . 3 4. 7K _ 04 H D MI _ D D C _C L K Q2 7 B H D MI B_ D A TA 1N 4 H D MI B _E XT 1_ SC L 15 6 IP4 772 CZ16 6- 02- 477 21- B60 TPD 7S0 19 6-0 2-0 701 9-B 20 HDMI/ CRT B - 15 B.Schematic Diagrams 3. 3V S D e l ? ? VG A 3 /8 R 6 56 6 17 C LK SH I E L D TMD S C LOC K + 8 H D MI B _E XT 1_ H PD 19 CE C TMD S C LOC K - 5 VS R 65 5 R E SE R V E D 10 3 .3 V S Mo d i fy 3 /1 1 S CL 12 1 2 *H D MI 2 01 2F 2S F -90 0T0 4-s ho rt R 3 95 3. 3 VS DDC/CE CG ND S DA * LV AR 0 40 2-2 40 E0 R 05 P-L F 14 3 L9 9 H OT P LU G D E TE C T +5 V *L V AR 0 40 2-2 40E 0 R 05 P-L F H D MI B_ C LOC K P *L V AR 0 40 2-2 40E 0 R 05 P-L F 4 H D MI B_ C LOC K N *LV A R 04 02 -240 E 0R 0 5P -LF H D MI B_ E XT 1_S C L H D MI B_ E XT 1_S D A H D MI B_ E XT 1_H PD 16 R 40 7 H D MI B _E X T1 _S D A CLO SE TO HDMI CONN. J_H D M 1I * LV AR 0 40 2-2 40 E0 R 05 P-L F * 22 u_6 . 3V _X 5R _ 08 18 4 99 _1 %_0 4 49 9_1 %_ 04 C 571 1 0u _1 0V _Y 5 V_ 08 F OR EM I R 6 54 R 65 3 4 99 _1 %_0 4 4 99_ 1% _0 4 49 9_ 1% _04 R 65 2 R 6 51 R 6 50 499 _1 %_ 04 49 9_ 1%_ 04 4 99_ 1% _0 4 MTN 7 00 2Z H S 3 R 64 9 G C 5 70 D Q 25 R 64 8 S 3. 3 VS R 6 47 Mo d i fy 3 /1 1 C D 3 /8 H D MIB _ C LOC K P H D MIB _ C LOC K N C 8 35 0. 1 u_ 10 V_ X7 R _0 4 C 8 36 0. 1 u_ 10 V_ X7 R _0 4 5V S _H D MI 1 _0 4 2. 2 K_ 04 2. 2 K_ 04 R 40 5 H D MI B _C L KB P H D MI B _C L KB N R 5 79 R 5 80 R 3 97 H D MIB _ D AT A 0P H D MIB _ D AT A 0N R 3 93 5V S _H D MI *LV A R 04 02 -24 0E 0R 0 5P -LF C 8 33 0. 1 u_ 10 V_ X7 R _0 4 C 8 34 0. 1 u_ 10 V_ X7 R _0 4 5 VS *LV A R 04 02 -24 0E 0R 0 5P -LF H D MI B _D 0 BP H D MI B _D 0 BN L 98 1 _04 For ESD AC H D MIB _ D AT A 1P H D MIB _ D AT A 1N A C H D MIB _ D AT A 2P H D MIB _ D AT A 2N C 8 31 0. 1 u_ 10 V_ X7 R _0 4 C 8 32 0. 1 u_ 10 V_ X7 R _0 4 AC C 8 29 0. 1 u_ 10 V_ X7 R _0 4 C 8 30 0. 1 u_ 10 V_ X7 R _0 4 H D MI B _D 1 BP H D MI B _D 1 BN AC H D MI B _D 2 BP H D MI B _D 2 BN C RD2 * BA V 99 R EC T I FI E R R D 3 * BA V 99 R EC T I F IE R RD1 *B A V 99 R E C T I FI E R Schematic Diagrams CCD/ 3G MINI CARD 3G(Port 6) Layo ut Sh ow "3.5G( HSDPA)" Note Layout? 1. SIM? ? ? ? ? ? ? ? (10mil) 2. ? ? ? ? ? ? ? ? GND 3. SIM hold ? ? ? ? ? GND? ? 4. SIM CONN ? ? MINI CARD CONN 3 G_ 3 . 3 V J _3 G 1 1 3 5 W AKE# C O E X1 C O E X2 7 11 13 9 15 CL KRE Q # R E F C LK R E F C LK + GN D 0 GN D 1 60 mils 2 6 8 10 12 14 16 3 .3 V A UX _ 0 1. 5 V _ 0 U I M_ P W R U I M _D A T A U I M _C L K U I M _R E S E T U I M _V P P U U U U U I M_ P W R I M_ D A T A I M_ C L K I M_ R S T I M_ V P P C5 9 2 +C 5 9 3 C5 9 4 *0 . 1 u_ 1 6 V _Y 5 V _0 4 *0 . 1 u_ 1 6 V _Y 5 V _0 4 *2 2 0 u_ 4 V _ V _B 4 GN D 5 KEY 20 35 23 25 31 33 3G _ D E T # 3 G_ 3 . 3 V Sheet 15 of 43 CCD/ 3G GN D 2 GN D 3 GN D 4 C5 9 8 C5 9 9 *0 . 1 u _1 6 V _ Y 5 V _0 4 *1 0 u _1 0 V _ Y 5 V _ 08 GN D 1 1 P E T n0 P E T p0 P E Rn 0 P E Rp 0 17 19 37 39 41 43 45 47 49 51 18 26 34 40 50 GN D 6 GN D 7 GN D 8 GN D 9 GN D 1 0 R e s erv e d 0 R e s erv e d 1 GN D 1 2 3. 3 V A U X_ 3 3. 3 V A U X_ 4 GN D 1 3 R e s erv e d 2 R e s erv e d 3 R e s erv e d 4 R e s erv e d 5 SIM CONN 20 22 30 32 36 38 W _D I S A B L E # P E RS E T # S M B _C L K S M B _D A T A US B _ D U S B _D + 3 G _E N R 42 0 20 L106 2 *W C M2 0 12 F 2 S -1 61 T 0 3-s h o rt 1 US B _ P N 9 8 3 R 41 9 24 28 48 52 42 44 46 3 .3 V A UX _ 1 1. 5 V _ 1 1. 5 V _ 2 3 .3 V A UX _ 2 L E D_ W W A N # LE D _ W LA N # L E D_ W P A N # 4 *1 5 m il _ sh o rt _ 06 US B _ P P 9 LO CK (T OP VI EW ) R4 2 1 *1 0 mi l _s h o rt _0 4 U I M _C LK C 86 8 3G _ 3. 3 V *4 . 7K _0 4 J _ S I M1 8 3 G_ 3 . 3 V 60 mil s C3 C2 C1 UIM _ RS T UIM _ P W R U I M_ C L K U I M_ R S T U I M_ P W R C6 0 5 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 C6 0 0 U I M_ D A T A U I M_ V P P U I M_ GN D D avid 8/25 R 4 22 *1 0m i l _s h or t _0 4 * C 1 7 70 6 6 1-1 S I ML OC K *0 . 1 u _1 6 V _ Y 5 V _ 04 UIM _ DA T A UIM _ V P P C 7 C 6 C 5 O PEN *2 2 p _5 0 V _ N P O_ 0 4 + C 6 01 *M P C E C -S 0 0F 1 -T P 0 0 C 6 02 C6 0 3 C 60 4 *2 2p _ 5 0V _ N P O_ 0 4 *2 2 p_ 5 0V _N P O_ 0 4 * 22 p _ 50 V _ N P O _0 4 *2 20 u _ 4V _ V _ B Valu e m o dify 3/2 3 W270BUQ 3G Default Disable AO3409? ? ? CCD AO3409( 90mohm) C hange to AO3 415(45moh m). 3G POWER 5V Q 10 MT P 3 4 03 N 3 S D CD 3/8 3 . 3 V _ 3G 3 .3 V *0 _ 0 6 R7 9 0 *0 _ 0 6 Q 32 * A O3 4 1 5 S 3A 120mils MJ_CCD1 C 6 10 C6 1 1 C8 4 6 3A 120mils D R 4 23 C 61 2 C 6 13 C 6 14 10 0 K _ 04 * 1u _ 6 . 3V _ Y 5V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 1u _ 6. 3 V _ Y 5 V _ 0 4 1 1 u _ 6. 3 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 1 u_ 6 . 3 V _Y 5 V _0 4 C 8 57 5 R4 2 4 C 5 95 G C5 9 6 *1 u _6 . 3 V _ Y 5 V _ 04 1 00 K _ 0 4 *1 0 u_ 1 0 V _Y 5 V _0 8 J _ CCD 1 *0 . 1u _ 1 6V _ Y 5V _ 0 4 20 3 2 G From SB GPI O P in de fa ul t HI Pow e r Pla ne : Suspe nd S3 : Def ine d D Q3 3 A S *R T3 K 4 4 M 5 G D 3 3 0K _ 0 4 C C D _E N Q1 1 MT N 7 0 0 2Z H S 3 G C CD_ E N S * 1 0_ 0 6 From H8 default HI ADDR128,Q2 Solut ion For PDA BUG- Wh en Bat te ry dis charge to sh utd ow n, th e CMOS so me time s los s. 1A U4 7 4 5 1 VIN VIN VO UT C C D _E N 3 1A 2 EN 8 US B_ P N5 8 U S B _P P 5 2 0 C C D _D E T # CC D_ DET # 1 2 3 4 5 8 5 20 5 -0 50 0 1 Q 3 3B S * R T 3 K 44 M 4 2 0 3G _ P OW E R R 7 92 *2 0 K _1 % _ 04 * 10 0 K _ 04 6 R7 9 3 R7 9 1 D R4 2 6 B - 16 CCD/ 3G 5V _ C C D 48 mil 3G _3 . 3 V G 3 .3 V S R7 8 9 1 B.Schematic Diagrams 21 27 29 GN D *G 52 4 3 A Schematic Diagrams CARD READER/ LAN JMC261C JMC261 C S D _ CL K R4 4 0 S wit ch in g Reg ul at or c los e to P IN3 3 *1 0m i l _s h o rt near Pin#41 C 6 43 3 . 3V S 3 . 3 V _L A N De l R44 0 3 /7 S D_ CL K 3 . 3 V _ LA N * 1 0p _ 50 V _ N P O_ 0 4 (> 20m il ) *4 . 7 K _0 4 DV D D S D_ CD # R4 4 4 1 K_ 0 4 * 0 . 1u _ 1 6V _ Y 5V _ 0 4 SD _ W P M DIO 1 1 LA N _ LE D 0 L AN_ L ED1 I S ON C 6 46 C 64 7 2 . 2 u _6 . 3 V _ X5 R _0 6 U3 0 C R _ C D 1N R 5 8 3 * 0_ 0 4 R 5 88 MS _ I N S # * 10 m i _l s h ort M DIO 1 0 M DIO 9 M DIO 8 DVD D L A N _M D I P 0 L A N _M D I N 0 DVD D L A N _M D I P 1 L A N _M D I N 1 3 . 3 V _L A N 10 u _ 10 V _ Y 5 V _ 0 8 Pin#59 PC Ie D iff er en ti al Pa ir s = 1 00 O hm need to close to chip JMC261 C (LQFP 64) R EXT A V D D 33 XIN X OU T C LK N CL K P AV D D1 2 RX P RX N G ND TXN T XP AV D D1 2 M D I O1 3 M DIO 7 C R_ CD 1 N L A N _M D I P 2 L A N _M D I N 2 A V D D 12 _ 62 L A N _M D I P 3 L A N _M D I N 3 DV D D C8 0 4 M D I O 10 M DIO 9 M DIO 8 VD D V I P _1 VIN _ 1 AV DD1 2 V I P _2 VIN _ 2 G ND AV DD3 3 V I P _3 VIN _ 3 AV DD1 2 V I P _4 VIN _ 4 JM C 2 6 1 C V D DRE G VC C3 V P W RCR T EST MP D W AKEN L A N_ L E D2 C R _ LE D R S TN CP P E N GN D V DDIO MD I O6 M D I O1 2 M D I O1 4 C R _ C D 0N 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 L A NX IN X8 *0 _ 0 4 J M C _ 2 5M _I N 7 R4 3 4 *0 _ 06 for AX6610 , Ra( 1. 69K_1% ) , Rb( 2.7K_1% ) 22 p _ 50 V _ N P O_ 04 22 p _ 50 V _ N P O _ 04 DV D D DVD D Ra C8 0 7 C8 1 6 R 8 26 DV DD 4 SET GN D MP D 2 M LM X 0+ _ R 1 R 58 9 (>2 0m il ) L A N _M D I P 0 L A N _M D I N 0 7 8 4 5 A JM _ D 3 MO D E 8 R5 8 2 C 65 2 C 8 17 1 0 u_ 1 0 V _Y 5 V _0 8 Pin#31 0. 1 u _ 16 V _ Y 5 V _ 0 4 Pin#31 10/21 L A N _M D I P 1 C 80 5 C 8 18 0 . 1 u _1 6 V _ Y 5 V _ 04 Pin#59 0 . 1 u_ 1 6 V _Y 5 V _0 4 Pin#2 0 . 1 u _1 6 V _ Y 5 V _ 04 Pin#21 L A N _M D I N 1 R D_ CT T D_ C T R4 5 0 *0 _ 04 0 . 0 1u _ 1 6V _ X 7 R _0 4 C 48 9 C 61 9 *0 . 0 1 u_ 1 6 V _ X 7R _ 04 C 81 4 1 2 3 6 R D+ R DR D_ CT T D_ C T P 30 1 2 C 6 20 RX + R XR X _C T T X _C T VC C_ CAR D V CC _ CA RD C 8 39 SD_ CL K ML MX 1 -_ R 4 ML MX 1 + _R 1 *1 0 m li _ sh o rt C 80 3 10 u _1 0 V _ Y 5 V _ 0 8 3 ML M X1 *W C M2 0 12 F 2 S -1 6 1T 0 3 2 ML M X1 + R6 4 6 *1 0 m li _ sh o rt ML M X0 + _ R ML M X0 -_ R C 80 6 0 . 1 u_ 1 6 V _ Y 5 V _ 04 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 VC C_ CAR D C 82 1 16 15 ML MX 0 + ML MX 0 ML MX 1 + ML MX 1 - 1 2 3 6 D C _N P 4 5 7 8 ML M X1 + _ R ML M X1 -_ R RX _ CT T X_ CT D D _N P R3 3 4 R7 3 6 *7 5_ 1 % _0 4 J _R J1 12 13 14 11 *0 _ 06 R 44 1 *0 _ 06 R3 4 8 R 2 69 R 3 43 VD D3 DA + DA DB + DB - s h ei l d s h ei l d GN D 1 GN D 2 DC+ DCDD+ DDP J S -0 8S L 3 B W240BU 6-21-B4000-008 W251BUQ 6-21-B4040-008 R 44 3 * 10 m i _l s ho rt R 43 8 *1 0 K _0 4 J _C A R D -R E V 1 SD_ CD # SD_ D2 SD_ D3 SD_ B S 1 0 K _ 04 C 81 5 0 . 1 u_ 1 6 V _ Y 5 V _ 04 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 NC NC R 72 9 Sheet 16 of 43 CARD READER/ LAN JMC261C 4 IN 1 SOCKET SD/MMC/MS/MS Pro Card Reader Power SD_ D0 SD_ D1 SD_ W P L 13 2 N C N C B U F _P LT _ R S T # VDD 3 3 .3 V need to close to chip CD 3 /9 R6 4 5 10 9 * 0_ 0 4 Del R44 3 3/7 3. 3 V _ L A N *1 0 m li _ sh o rt TX+ T X- R6 7 7 IS O N C *1 0 m li _ sh o rt T D+ T D- 0 . 1 u_ 1 6 V _ Y 5 V _ 04 Q7 9 M TN 7 00 2 Z H S 3 L36 3 . 3 V _ LA N C6 4 9 (> 20m il ) C6 5 1 1 0u _ 1 0V _Y 5V _0 8 0 . 1u _ 1 6V _ Y 5V _ 0 4 Pin#32 Pin#32 P C I E _ R X P 0 _ JM C 7 P C I E _ R X N 0_ J MC 7 P C I E _T X N 0 _ JM C 7 P C I E _T X P 0 _J MC 7 C L K _P C I E _ J MC 7 C LK _ P C I E _ JM C # 7 75 _ 1% _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 Pin#13 *4 . 7 K _0 4 1 u_ 6 . 3 V _ Y 5 V _ 04 R8 2 5 G 75 _ 1 %_ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 Pin#7 10 K _ 0 4 C6 4 8 *0 _ 0 4 0. 1 u _ 10 V _ X 7R _ 04 0. 1 u _ 10 V _ X 7R _ 04 75 _ 1 %_ 0 4 C 8 13 R 44 5 3 . 3V _ L A N 3 M L MX 0 *W C M2 0 12 F 2 S -1 6 1T 0 3 2 M L MX 0 + R6 4 4 C 8 08 Pla ce all cap acito rs clo sed t o ch ip. The su bscript in eac h CAP incica tes t he p in nu mber of JMC251/JMC261 t hat shou ld b e clo sed t o. 0_06 V D D_ IN G9141 APL5603-12B(no R201,R198) JM _D 3 MO D E 75 _ 1 %_ 0 4 * 0. 1 u _ 10 V _ X 7R _ 04 Pin#43 R 5 81 *0 _ 0 6 3. 3 V S V D D 3 3 R5 8 5 C6 5 0 L 13 1 C 81 2 R4 4 7 2 . 7 K _1 % _ 04 V D DR E G CD 3/9 M LM X 0-_ R 3 .3 V _ L AN 0 . 1 u _1 6 V _ Y 5 V _ 0 4 Pin#43 S HD N# 1 . 6 9K _ 1 % _0 4 R B 7 5 1V R6 4 3 C 8 20 I N 3. 3 V S P CIE _ W A KE # 8 , 1 7 , 19 P C I E _ W A K E # C 8 10 1 2 3 *A T 2 4C 0 2B N V D D3 *A P L 5 6 03 -1 2 B I -T R G Rb LA N _ P C I E _ W A K E # D V DD G ND 1 OU T 3 . 3 V _ LA N D V DD C 8 54 A0 A1 A2 U4 3 5 L A N _ P C I E _W A K E # 2 0 for D3E C991022 C 81 1 C 81 9 0 . 1u _ 1 6V _Y 5V _0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 * 10 u _ 6. 3V _ X 5 R _ 06 Pin#52 Pin#55 Pin#62 Pin#35 Pin#7 Reserved WP S CL S DA 4 LA N _ S D A 3 . 3V Vout=0.8(1+Ra/Rb). AP L5603-12B Change AX6610. 4 B U F _P L T _ R S T # 7, 11 , 1 7 , 19 , 2 0 D4 5 C8 0 9 GN D S DV D D 7 V CC 6 5 need to cl ose to chip need to cl ose to chip 27 p to 22p 3/9 D V DD D V DD 3 . 3 V _ LA N C8 0 1 U 31 8 S D _ CD# S E EDA T F S X5 L _ 25 MH Z C 8 02 *4 . 7 K _ 04 LA N _ S C L R4 4 2 ( >2 0m il) 3 . 3V 6- 22- 25 R0 0-1 B4 6- 22- 25 R0 0-1 B5 1 R4 4 6 V D D_ IN 1 VFB Del R 828 3/7 SD _ W P R4 3 7 * 4 . 7K _ 0 4 8 2 1.2 V D V DD ( >2 0m il) 12 K _ 1 %_ 0 4 D V DD 2 R6 0 1 V O UT 5 9 7 A X 6 6 10 0 _0 6 M PD R 8 28 *1 0m i l _s h o rt L A N _S C L L A N _S D A B U F _ P LT _ R S T # S E E DA T V IN V IN P OK 8 2 p _5 0 V _ N P O _0 4 R5 8 4 3 .3 V S V C C_ CA R D V C NT L V O UT D * 1M _ 04 3 EN 3 . 3V VD DR E G M D I O 13 M D I O7 CR _ CD1 N LA N X I N L A N X OU T L A N X OU T R4 3 5 R4 3 2 DV D D 0. 1 u _ 16 V _ Y 5 V _ 0 4 Pin#33 1 0K _ 0 4 10/28 Modify value 4 D a v di 8 / 2 7 SD_ CL K SD_ D3 MS _ I N S # SD_ D2 SD_ D0 SD_ D1 SD_ B S P1 P2 P3 P4 P5 P6 P7 P8 P9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 P1 6 P1 7 P1 8 P1 9 P2 0 P2 1 CD_ S D D A T 2 _S D C D / D A T 3_ S D C MD _ S D VSS_ SD V D D _S D CL K _ SD VSS_ SD D A T 0 _S D D A T 1 _S D W P_ SD V S S _ MS V C C _M S S C L K _ MS D A T 3 _M S I N S _ MS D A T 2 _M S S D I O / D A T 0 _M S D A T 1 _M S B S _M S V S S _ MS G ND G ND P 22 P 23 MD R 0 1 9-C 0 -10 4 2 Fo r JM C2 51 C 3 . 3 V _ LA N C 8 00 *0 . 1u _ 1 6V _Y 5V _0 4 Pin#2 C 79 9 *1 0 u_ 1 0 V _ Y 5 V _ 08 Pin#2 1 0 0 0p _ 2 K V _X 7 R _ 1 2 _H 1 25 CARD READER/ LAN JMC261C B - 17 B.Schematic Diagrams De l R58 8 3 /7 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 V DD 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 MD I O1 3 6 1 u_ 1 0 V _Y 5 V _0 6 C8 5 3 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 Card Reader Pull High/Low Resistors S D _B S S D_ D3 S D _D 2 S D_ D1 S D_ D 0 VCC _ CAR D C8 5 2 C6 4 5 1 0 u _1 0 V _ Y 5 V _ 08 Pin#33 Fo r J MC 25 1/2 61 o nl y R E GL X S D X C _ P OW E R S D X C _ P OW E R M S _ INS# MD I O1 1 L A N_ L ED0 LA N _ LE D 1 IS O N GN D V D DIO V DDO M DIO 5 M D I O4 M DIO 3 M D I O2 M DIO 1 M D I O0 F B1 2 G ND LX 1 K_ 0 4 U 49 (> 20m il ) C 6 44 *S W F 2 52 0 C F -4 R 7 M -M R 4 33 DVDD DVDD . R4 3 6 L6 2 NC da vid 8 /25 L62 RE G L X 3 . 3V _L A N 5V LDO t ype ? J MC26 1C , Schematic Diagrams MINI PCIE/ SATA HDD/ ODD MINI CARD (WLAN,Port 5) 20 mil 3 . 3V C 84 7 L ayou t Sh ow "WLAN(Wimax, 80 2.11N) "Not e 0 . 1 u_ 1 6 V _Y 5V _0 4 P C I E _W A K E # 8 , 1 6, 1 9 P C I E _W A K E # R4 5 1 3 . 3V S R5 0 9 *0 _0 4 10 K _ 0 4 J _ MI N I 1 W AKE# CO EX1 CO EX2 7 11 13 9 15 W LA N _ C L K R E Q # 8 W L A N _C LK R E Q# 7 CL K _ P CIE _ W L A N# 7 CL K _ P CIE _ W L A N 1 3 5 3. 3 V A U X_ 0 1 . 5V _ 0 U I M _P W R UIM _ DA T A U I M_ C L K UIM _ RE S E T U I M_ V P P C L K R E Q# RE F CL K RE F CL K + GN D 0 GN D 1 2 6 8 10 12 14 16 R4 5 2 20 W LA N _ D E T # P C I E _ R X N 3_ W L A N P C I E _ R X P 3 _W L A N P C I E _ T XN 3 _W L A N P C I E _ TX P 3 _ W LA N R 7 23 R 7 24 R 4 55 2 0 , 21 Sheet 17 of 43 MINI PCIE/ SATA HDD/ ODD 20 BT_ EN 3 IN1 3 IN1 R4 5 4 *0 _0 4 R7 3 8 *0 _0 4 V D D3 3 .3 V 7 ,2 1 2 0 , 21 B T_ O N BT_ EN *1 0 mi l _s h o rt *1 0 mi l _s h o rt *1 0 K _0 4 3. 3 V R4 9 4 R4 5 6 R4 5 7 R4 5 8 * 10 K _ 0 4 * 10 K _ 0 4 * 0_ 0 4 0_ 0 4 GN D 1 1 PETn 0 PETp 0 P E R n0 P E R p0 17 19 37 39 41 43 45 47 49 51 R e s e rv ed 0 R e s e rv ed 1 GN D 1 2 3 . 3V A U X _ 3 3 . 3V A U X _ 4 GN D 1 3 R e s e rv ed 2 R e s e rv ed 3 R e s e rv ed 4 R e s e rv ed 5 W _ DIS A B L E # P E RS E T # S M B _ CL K S M B _ DA T A U S B _D U S B _ D+ 3. 3 V A U X_ 1 1 . 5V _ 1 1 . 5V _ 2 3. 3 V A U X_ 2 LE D _W W A N # L E D_ W L A N# LE D _ W P A N # *2 0 K _ 04 R7 22 off, a dd R 459 pu ll low r es erve 3/22 18 26 34 40 50 R 4 53 * 1 0K _ 0 4 20 22 30 32 36 38 24 28 48 52 42 44 46 7 ,2 1 20 3 . 3V S B U F _ P L T_ R S T# R7 2 5 R7 2 6 3. 3 V A U X_ 1 20 mil *1 0 mi l _ sh o rt *1 0 mi l _ sh o rt *1 5 mi l _ sh o rt _ 06 R 7 27 20 mil W L A N _ E N 20 , 2 1 B U F _P L T _ R S T # 7, 1 1 , 1 6, 1 9 , 2 0 B T _ D E T # 20 , 2 1 U S B _P N 2 8 U S B _P P 2 8 Port 2 3 .3 V 0 -> Sh ort 3/22 3. 3V W L A N _L E D # 2 0 , 2 1 R 73 9 *0 _ 04 8 0 CL K 20 M P C E C -S 0 0F 1 -T P 0 0 Valu e m od ify 3/23 SATA ODD SATA HDD J _ HD D1 J _ OD D 1 S A T A _ T XP 0 S A T A _ T XN 0 C6 5 3 C6 5 4 0 . 0 1u _ 16 V _ X 7R _ 04 0 . 0 1u _ 16 V _ X 7R _ 04 S A T A TX P 0 9 S A T A TX N 0 9 S A T A _ RX N 0 S A T A _ RX P 0 C6 5 5 C6 5 8 0 . 0 1u _ 16 V _ X 7R _ 04 0 . 0 1u _ 16 V _ X 7R _ 04 S A T A RX N0 9 S A T A RX P 0 9 3 .3 V S S A TA _T X P 1 S A TA _T X N 1 C6 5 6 C6 5 7 0 . 01 u _ 16 V _ X 7R _0 4 0 . 01 u _ 16 V _ X 7R _0 4 S A TA T X P 1 9 S A TA T X N 1 9 S A TA _R XN 1 C 6 5 9 S A TA _R XP 1 C 6 6 0 0 . 01 u _ 16 V _ X 7R _0 4 0 . 01 u _ 16 V _ X 7R _0 4 S A TA R X N 1 9 S A TA R X P 1 9 Del R7 05 3/7 C6 6 1 C 66 2 *0 . 0 1u _ 1 6V _ X 7 R _ 04 P1 P2 P3 P4 P5 P6 OD D _ D E T E C T # R7 0 6 C 1 8 55 3 -1 13 0 5 -L P I N G N D 1 ~ 2 = GN D O D D _D E T E C T # 8 3. 3 V S 5 VS Del R7 02 3/7 *1 0 K _ 04 * MT N 7 0 02 Z H S 3 Q 7 S D O D D _ D A #_ F C H 8 + C 67 0 2 2u _ 6 . 3V _ X 5 R _ 0 8 C6 7 6 *2 2 u _6 . 3 V _ X 5R _ 08 1 u _6 . 3 V _ Y 5 V _0 4 CD 3 /8 C6 7 5 0 . 1 u _1 6 V _ Y 5V _0 4 C 67 4 Chan ge 3/1 8 W24 6-20-43730-122 W25/W27 6-20-43750-022 C 6 73 1-1 6 2- 10 0 56 1 0. 1u _ 16 V _ Y 5 V _ 04 H D D _N C 1 H D D _N C 2 H D D _N C 3 *0 . 1u _ 1 6V _ Y 5 V _ 0 4 H D D _N C 0 2 2 0u _ 6 . 3V _ 6 . 6 *5 . 7 5V S * 10 u _ 10 V _ Y 5 V _ 0 8 C 6 72 P1 P2 P3 P4 P5 P6 P7 P8 P9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 S1 S2 S3 S4 S5 S6 S7 G S1 S2 S3 S4 S5 S6 S7 C6 7 1 B.Schematic Diagrams 7 7 7 7 GN D 6 GN D 7 GN D 8 GN D 9 G ND1 0 B T _O N 8 0C LK R 45 9 GN D 5 GN D 2 GN D 3 GN D 4 35 23 25 31 33 V DD 3 0_ 0 4 *1 00 K _ 0 4 0_ 0 4 3 IN1 4 KEY 21 27 29 20 mil *0 _ 04 R4 9 6 R7 2 2 R5 0 8 CD 3 /8 5 VS 3/7 5 VS C 67 7 C6 7 8 C 6 79 0 . 0 1u _ 1 6V _ X 7 R _ 04 0 . 01 u _1 6 V _ X7 R _0 4 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 CD 3 /8 C 6 63 *0 . 1u _ 1 6V _ Y 5V _ 0 4 B - 18 MINI PCIE/ SATA HDD/ ODD C6 6 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 C6 6 5 *0 . 1 u_ 1 6 V _Y 5 V _0 4 C6 6 6 1 u_ 6 . 3 V _Y 5 V _0 4 C6 6 7 C6 6 8 + 1 0 u_ 1 0V _ Y 5V _ 0 8 C 6 69 *2 2 0u _ 6. 3V _ 6 . 6 *5 . 7 * 0. 1u _ 16 V _ Y 5 V _ 0 4 Schematic Diagrams AUDIO CODEC ALC269 . t n e n o p m o C 8 5 AUDIO CODEC ALC269 VB VT1802P De l R45 9 3 /7 5 VS Lay out note : GN D a nd AUDG spa c e is 60 mil s ~ 100 mi ls For 1 .5 V H DA Link . R4 6 0 1. 5V S * 0 _0 4 C 6 80 1 0 u _1 0 V _ Y 5 V _ 0 8 3 .3 V S _ A UD 3 . 3V S AZ_ RST# For 3 .3 V HDA Li nk D e- pop L 1 091 2 *H C B 1 0 05 K F -1 2 1 T2 0 A UDG *1 0 m il _ s ho rt VT1802P L75,C718 ? ? ? C6 8 2 1 0 u_ 1 0 V _Y 5 V _ 08 PD# Cont rol EM I Requ ire DV D D_ IO For 3. 3V HDA Li nk. R4 6 1 C 68 1 0 . 1 u_ 1 6 V _ Y 5 V _ 04 C6 8 3 0 . 1 u _1 6 V _ Y 5 V _ 04 C 68 4 * 1 0u _ 1 0V _ Y 5V _ 0 8 C6 8 5 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 AN ALOG DIG ITAL 5 V S _A U D L 11 0 3. 3 V S _ A U D H C B 1 0 0 5K F -12 1 T 2 0 1 2 L 11 1 H C B 1 0 0 5K F -12 1 T 20 1 2 C6 8 8 C6 8 9 C 69 0 C 6 91 C6 9 2 C6 9 3 0 . 1u _ 1 6V _Y 5 V _0 4 10 u _ 10 V _ Y 5 V _ 0 8 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _ 16 V _ Y 5 V _ 0 4 1 0 u_ 1 0 V _Y 5 V _ 08 J P1 *1 0 mi l _ sh o rt J P2 *1 0 mi l _ sh o rt C 68 6 0. 1u _ 1 6V _ Y 5V _ 0 4 C 68 7 0. 1u _ 1 6V _ Y 5V _ 0 4 5 VS C 69 4 C6 9 5 1 0 u _1 0 V _ Y 5 V _ 08 1 u_ 6 . 3 V _ Y 5 V _ 04 5 VS 0. 1 u _ 16 V _ Y 5V _ 0 4 A UDG R4 6 6 * 10 0 K _ 04 Q 12 *B S S 1 3 8 _N L 8 H DA _ S DO UT 8 H DA _ B IT CL K S P K O UT L + S P K O UT L - 40 41 S P K O UT RS P K O UT R+ 44 45 EAPD S P DI F O 47 48 C O D E C _ GP I O 02 C O D E C _ GP I O 13 25 38 9 S P K -L + S P K -L - M I C 2 -L MI C 2 -R S P K -R S P K -R + S P D IF C2 /E A P D S P D IF O J DR E F M ON O-O U T GP I O0 -D M I C -D A T GP I O1 -D M I C -C L K ANALOG S D A TA - OU T M I C 1 -L MI C 1 -R L I N E 1 -L L I N E 1 -R 6 K B C_ B E E P H D A _S P K R 1u _ 6 . 3V _Y 5 V _0 4 R 4 77 4 7 K_ 0 4 FOR VOLUMN ADJUST B E E P _C PC BEEP 42 43 20 R4 7 8 C7 0 9 4. 7 K _ 0 4 10 0 p _5 0 V _ N P O _ 04 MI C 1 -V R E F O -L C7 0 6 1 A VSS1 AVSS2 D 28 B A T 5 4 CW G H A C 3 BEEP 2 A 12 R E S E T# 31 B E E P _R PC BEEP 8 11 G ND H D A _ R S T# 26 37 H D A _R S T # LD O_ C A P M I C 1 -V R E F O-R MI C 2- V R E F O S Y NC 49 8 S D A TA - I N 10 DV S S 2 H DA _ S Y NC 8 A Z _S D I N 0 _ R PVSS1 PV SS2 H D A _S D I N 0 8 2 2 _0 4 R4 6 3 2 0 K _ 1% _ 0 4 LI N E 2 _ L LI N E 2 _ R R4 6 4 3 9 . 2 K _1 % _ 04 H P _S E N S E 16 17 MI C 2_ L MI C 2_ R 18 S E N S E _B MI C _ S E N S E H P -O U T -L H P -OU T -R C6 9 6 C6 9 7 4 . 7 u _6 . 3 V _ X5 R _0 6 4 . 7 u _6 . 3 V _ X5 R _0 6 VT1802P JD R E F MO N O _O U T R4 6 8 C6 9 9 2 0 K _ 1% _ 0 4 * 10 0 p _5 0 V _ N P O _ 04 21 22 MI C 1_ L _ C MI C 1_ R _C C7 0 0 C7 0 1 4 . 7 u _6 . 3 V _ X5 R _0 6 4 . 7 u _6 . 3 V _ X5 R _0 6 23 24 LI N E 1 _ L LI N E 1 _ R C7 0 3 0 . 1 u _1 6 V _ Y 5 V _ 04 27 C O D E C _V R E F C7 0 4 2 . 2 u _6 . 3 V _ X5 R _0 6 28 30 29 LD O_ C A P MI C 1- V R E F O -R MI C 2- V R E F O 32 33 HE A D P HO NE - L HE A D P HO NE - R 35 C O D E C _C B N 36 34 C O D E C _C B P VT1802P C7 0 5 R 4 67 C7 0 7 2. 2 u _ 6. 3 V _ X 5 R _ 0 6 VT1802P M I C 1 -L NC PIN MI C 1-R A UD G C7 8 6 2 . 2 u _6 . 3 V _ X5 R _0 6 S P K O UT L + AZ_ RST# PD# 1K _ 0 4 M I C 1 -L _ M R4 7 4 1K _ 0 4 M I C 1 -R _M M I C 1 -V R E F O-R R 4 7 5 2. 2 K _ 0 4 M I C 1 -V R E F O-L R 4 7 6 2. 2 K _ 0 4 VT1802P MI C 1 -L M 22 MI C 1-R M 2 2 4.7K_1%_04 F or Mic n ois e is su e ( Res rve) 3/1 1 S P K OU T R + S P K OU T R - S P KO UT R+ 2 2 S P KO UT R- 22 Re serve 9/8 L 1 12 * F C M 16 0 8 K -1 21 T 0 6_ s h ort S P K O U T L + _L C 7 10 C7 1 1 * 1u _ 1 0V _Y 5 V _0 6 *1 8 0 p_ 5 0 V _N P O_ 0 4 C2 3 6 C2 4 6 *1 8 0 p_ 5 0 V _ N P O _0 4 *1 8 0 p_ 5 0 V _ N P O _0 4 A UD G J _ SPK1 S P K OU TL - J_SPK1 S P K OU TL -_ L * F C M 16 0 8 K -1 21 T 0 6_ s h ort L 1 13 C7 1 2 *1 8 0 p_ 5 0 V _N P O_ 0 4 2 Spea k er wi re le ngth l es s tha n 8 00 0mi ls , It don't ne ed LC Fil te r. SPKO UTR+, R-, L+, L- Tra ce wi dth Spea k er 4 ohm- --- -- > 40 mil s Spea k er 8 ohm- --- -- > 20 mil s 75_1%_04 R4 7 2 A UD G M I C 1 -V R E F O-L The rm al Pa d pl ac e 9 Vi a hole . 20ms 6 8 0p _ 5 0V _X 7 R _ 0 4 Sheet 18 of 43 AUDIO CODEC ALC269 * 2 2n _ 1 6V _ X 7 R _ 0 4 * 2 2n _ 1 6V _ X 7 R _ 0 4 C 7 08 Value m od ify 3/2 3 5VS 1 2 8 8 2 66 -0 2 00 1 P C B F oo t p ri nt = 8 8 2 66 -2 L Add 3/2 2 C 7 85 A LC 2 69 Q -V B 6 I N T _ MI C _ OU T C 69 8 * 0 . 02 2 u _1 6 V _ X 7R _ 04 A U DG CB N C BP OP V E E 1 K _ 04 VT1802P 330P C 92 10u H E A D P H ON E -L 22 H E A D P H ON E -R 2 2 1 4 . 7 K _ 04 J _ INT M IC1 I N T _ MI C 1 0 u_ 1 0 V _ Y 5 V _ 08 VT1802P 2 R 46 5 VT1802P 2.2K_04 HP _ S E N S E 2 2 A U DG A U DG 3 .3V S_AUD J_INTMIC1 M IC_ S E N S E 2 2 5.1K_1%_04 19 20 VR EF 7 8 B I T -C L K R 4 71 S E N S E _A S en s e -B 5 22 p _ 50 V _ N P O _ 04 13 14 15 S en s e A L I N E 2 -L L I N E 2 -R DIGITAL C 7 02 A UD G MI C 2- V R E F O A V D D1 A V DD 2 P V D D1 P V DD 2 1 DV D D1 D V D D -I O D S P le a se Le t LC Filt e r t oge t he r a nd c lose t o C ode c. IF S pe a k er w i re le ngt h is le ss t han 80 00m ils It don't ne e d the LC Filt e r. S AZ_RST# For 1. 5V HDA Link De -pop 4 PD # Q 13 * MT N 7 0 0 2Z H S 3 G H D A _ R S T #G U 32 P D# D 5V S 1 0 K _ 04 A U DG 1 EMI Require J_ S P K L 1 1 2 S P K O UT R+ S P K O UT R- L136 L135 S P K OU T L+ _ L S P K OU T L-_ L * F C M 1 60 8 K -1 21 T 0 6 _s h o rt * F C M 1 60 8 K -1 21 T 0 6 _s h o rt S P K OU T R +_ R S P K OU T R -_R 4 3 2 1 * 85 2 0 4-0 4 0 01 8 5 20 4 -0 20 0 1 P C B F o o t p rin t = 8 5 20 4 -0 2R PN: 6-20- 43130- 104 C2 3 7 C2 3 9 *1 8 0 p_ 5 0 V _ N P O _0 4 *1 8 0 p_ 5 0 V _ N P O _0 4 A UD G AUDIO CODEC ALC269 B - 19 B.Schematic Diagrams H D A _ R S T# 2 0 K B C _M U T E # 39 46 R 4 62 D3 3 B A T 54 A W G H 1 A C 3 2 A Schematic Diagrams USB 3.0 VL800 *1 0 0K _ 04 S R 79 5 G *1 0K _ 04 R 4 79 *1 0 K_ 0 4 R 4 8 0 3 . 3V *10 K _0 4 Q3 4 D * A O34 15 C 8 58 R 4 84 * 0_ 04 P C I E _ W AK E # 8 , 20 EC _S MI # 8, 1 6, 1 7 P C I E _ WA K E # GN D *1 u_ 10 V _0 6 R 48 5 G ND 1 0 K_ 0 4 R 48 1 3 .3 V R 7 94 7, 1 1 ,1 6 , 17 , 20 BU F _P LT _ R S T# R 4 82 *1 0K _ 04 R 48 3 *10 K _0 4 To EC IT8518 Pi n84 CPPE # R 7 96 G_ OC _R * 4. 7 K_ 0 4 *0_ 0 4 R 4 86 ICP P E # *0 _0 4 20 G_ OC 3. 3 V B U F _P L T_ R S T #_ R G_ OC _R R 4 87 *1 0K _ 04 3. 3 V 3 .3 V 3. 3 V S _V L 80 1 3 . 3 VS _ V L8 01 C 7 18 *0. 1 u _1 6V _ Y 5V _ 04 *0 .1 u _1 6V _ Y 5V _ 04 *0 . 1u _1 6V _ Y 5 V_ 0 4 *0 . 1u _1 6V _ Y 5 V_ 0 4 *0 . 1u _1 6 V_ Y 5 V _0 4 *0 . 1u _1 6 V_ Y 5 V _0 4 U34 GN D 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 C 72 0 C 7 21 *0. 1 u _1 6V _ Y 5V _ 04 *0 .1 u _1 6V _ Y 5V _ 04 *0 . 1u _1 6V _ Y 5 V_ 0 4 *0 . 1u _1 6V _ Y 5 V_ 0 4 *0 . 1u _1 6 V_ Y 5 V _0 4 *0 . 1u _1 6 V_ Y 5 V _0 4 Sheet 19 of 43 USB 3.0 VL800 C 7 22 C 7 23 1 . 05 V A C 71 9 C 7 24 1. 0 5V A TX P 0 TX N 0 GN D C 7 25 R XP 0 R XN 0 C 7 26 G_D P 0 G_D M0 *0 . 1u _1 6 V_ Y 5 V _0 4 *0 . 1u _ 16 V _Y 5 V _0 4 S SX I S SX O GN D VD D S S T X1 + S S T X1 V C C A 10 S SR X1 S S RX 1 + S S RX 1 V C C A 33 S S1 U S BH P1 + U S BH P1 V C C A 33 S S1 S S T X2 + S S T X2 V C C A 10 S SR X2 S S RX 2 + S S RX 2 V C C A 33 S S2 U S BH P2 + U S BH P2 V C C A 33 S S2 V C C A 10 S SM SSXI SSXO C 8 59 C 8 60 2 X9 1 SI W P# 7 U SB _ ON 1 # H OLD # VS S S P IS CS # S P IS CL K 4 6-04- 25512- B72 Diff. trace 100ohm GP C I E _R XN 2 _ U S B3 _ R GP C I E _R XP 2 _U S B 3 _R P C I E _N B_ U S B 3 0_ TX N P C I E _N B_ U S B 3 0_ TX P C L K _P C I E _ U S B # C L K _P C I E _ U S B R 4 89 C 72 7 C 72 8 GN D Close to U2 * 0. 1 u_ 10 V _X 7R _0 4 * 0. 1 u_ 10 V _X 7R _0 4 Dif f. trace 100o hm P C I E _ U S B 30 _N B _ R X N 7 P C I E _ U S B 30 _N B _ R X P 7 P C I E _ N B _U S B 3 0_ TX N 7 P C I E _ N B _U S B 3 0_ TX P 7 P C I E _ U S B 30 _C LK N 7 P C I E _ U S B 30 _C LK P 7 *3. 0 1 K_ 1 %_ 04 GN D 3 . 3V S _V L 80 1 1 . 05 V D C P P E# *V L800 / V L801 Q FN88 C 86 1 Q3 5 *2 0p _5 0V _ N P O_ 04 *20 p_ 5 0V _ N P O_0 4 3. 3 VS GN D GN D S *A O3 41 5 D S D R4 9 1 *6 . 04 K _1 %_ 04 *A O3 41 5 G ND From EC IT8 518 Pin 83 G G ND 3. 3 V OC P P E # 2 0 T XP 1 T XN 1 V C N TL V OU T *1u _1 0 V_ 0 6 p ow er 1A 6 4 L D O_ 1. 0 5V 8 V OU T EN 3 . 3V 1 GN D PR1 VFB 2 Ra P C2 * 10 u_ 6. 3 V _X 5 R _ 06 3 *1 K _1 %_ 04 VF B PC4 *82 p _5 0V _ N P O_0 4 * AX 6 61 0 PN: 6- 02- 06610-320 R 8 04 *1 0K _ 04 1. 0 5V S G_ D P 1 G_ D M1 1 . 05 V S L 11 5 G ND C P P E# *H C B 1 60 8K F -1 21 T2 5 ( N o s t uf f ed ) C 73 3 *0. 1 u _1 6V _ Y 5V _ 04 ( N o s t uf f ed ) 1. 0 5V S D *3 . 9K _ 1% _0 4 PN: 6-13-11311-28C Port 1+USB 3.0 Vout=0 .8(1+ Ra/Rb ) 8, 1 1, 1 2 ,2 0 , 23 SU SB # U SB V C C 1 L 11 4 . ( No s tu ffe d ) *H C B 1 60 8K F -1 21 T2 5 *MT N 7 00 2Z H S 3 Q3 8 C 7 31 C 7 32 US B V CC D *0. 1 u_ 1 6V _ Y 5V _ 04 *22 0 u_ 6. 3 V _6 . 6*5 . 7 GN D 5 3 U S B _O N 1# R 4 99 * 0_ 04 R 5 00 * 0_ 04 GN D 6 G L1 * H C B 1 60 8K F -12 1 T2 5 V I N 1 V OU T 2 1 00 M IL V I N 2 V OU T 3 4 7 C 7 36 C 73 7 C 73 8 8 *0 . 1u _ 16 V _Y 5 V _0 4 * 0. 1 u_ 16 V _Y 5V _ 04 *10 u _6 . 3V _ X5 R _0 6 TX P 0 C 7 34 *0 .1 u _1 0V _ X7 R _ 04 TX P 0_ R TX N 0 G_D M 0 C 7 35 R 4 92 *0 .1 u _1 0V _ X7 R _ 04 *0 _0 4 TX N 0 _R G_D M0_ 0 G_D P 0 R XP 0 R 4 93 *0 _0 4 G_D P0 _ 0 R XN 0 1 E N# GN D * R T9 71 5B G S Diff. t race90ohm GN D 8 U S B 30 _P W R _ E N B - 20 USB 3.0 VL800 U3 6 F LG# V OU T 1 2 *1 0u _6 . 3 V_ X 5R _ 06 *H C B 1 60 8K F -1 21 T2 5 1. 0 5V A 1. 0 5V D From EC IT85 18 Pin83 C 86 4 G ND CLO SE TO CONNE CTOR G_ U S B VC C R 4 97 * 0_ 04 C 7 39 *H C B 1 60 8K F -1 21 T2 5 L 13 4 OC P P E # 2 0 GN D U S BV C C R 4 98 * 0_ 04 L 13 3 *1u _ 10 V _0 6( N o st u f f e d ) R 4 95 *1 0K _ 1% _0 4 G_ OC GN D *A O3 41 5 3. 3 V 8, 2 2 U SB _ OC P 0 _1 # 5V *1 u _1 0V _ 06 *A O3 41 5 D S 1 00 mi l Q7 7 G Q3 7 S G ND PR2 Rb C 86 3 G V IN V IN P OK *1 u_ 10 V _0 6( N o st u f f e d ) RX P 1 RX N1 G U 35 5 9 7 C 86 2 + Co re P C3 *0 . 1u _ 16 V _Y 5 V_ 0 4 PC 1 P C5 * 10 u_ 6. 3 V _X 5 R _0 6 GN D 3 . 3V S _ V L8 01 GN D Q3 6 1. 5 V * 1u _1 0V _ 06 G C 73 0 *X 8A 0 25 00 0 FG 1H _ 25 MH z S P IS O 6 *MX 25 L 51 2MC -12 G S P IS O S P IS I S P I S C LK S P IS CS # *0 . 1u _1 6 V_ Y 5 V _0 4 *0 . 1u _ 16 V _Y 5 V _0 4 C 72 9 S P IS I CE # S CK 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 5 2 1 SO 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 R 49 0 * 1M_ 0 4( N o s t uf f ed ) 1. 0 5V D V DD *1 0K _ 04 V SU S3 3 U S B H P E2 # U S B H P E3 # U S B H P E4 # S P I SO SPISI S P IS CL K S P ICS # VDD V C C A 3 3P E XT X P EX T X0 P E XT X0 + V C C A 3 3P E XM P E XR X0 P E X R X0 + V C C A3 3 PE X R X P EX C L K P E XC LK + V C C A 3 3R E G1 2 P E XR EX T V C C A 3 3R E G2 5 VDD VL800 4PORT VL801 2PORT S B.Schematic Diagrams 3 . 3V U3 3 8 R 4 88 G1 C 7 17 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 C 7 16 G1 C 7 15 VD D V DD V S U S 33 T E ST E N S MD AT S MC LK P EX RS T # P E X W A K E# S M I# JT A G T M S JT A G T D O JT A G T D I V S U S 33 V DD J T A GCK C O R E P WR D N # U S BH O C 1# U S BH O C 2 # U S B H OC 3 # U S B H OC 4 # U S B H P E 1# V S U S 33 C 71 4 VS U S U SB S SR EX T V C C A 33 S S M S S TX 3 + S S T X3 V C C A 1 0S S R X 3 SSRX3 + SSRX3 V C C A 33 S S3 U S B H P 3+ U S B H P 3V C C A 3 3S S 3 GND S S T X 4+ S S T X 4V C C A1 0 SS R X 4 SSRX4 + SS R X 4 V C C A 33 S S 4 U S B H P 4+ U S B H P 4V C C A 3 3S S 4 C 71 3 Schematic Diagrams KBC-ITE IT8518 V DD 3 CD 3 /8 *1 5 m li _ s ho rt _ 0 6 K B C_ A VDD CD 3 /8 C7 4 1 C7 4 2 C 7 43 C7 4 4 *0 . 1 u_ 1 6 V _Y 5 V _0 4 1 0u _ 1 0V _Y 5 V _0 8 0 . 1 u _1 6 V _ Y 5 V _ 0 4 *0 . 1 u_ 1 6 V _Y 5 V _ 04 L 11 7 H C B 1 00 5 K F -1 2 1T 2 0 C 74 7 V D D3 VD D3 . R 50 1 V D D3 C 85 6 C 7 45 0 . 1 u_ 1 6 V _Y 5 V _0 4 * 0 . 1u _ 1 6V _ Y 5V _0 4 5 3 IN1 4 8 0 CL K 3 R5 1 4 2 1 * 85 2 05 -0 5 0 01 * 0 . 1u _ 1 6V _ Y 5V _ 0 4 7 , 1 1, 1 6 , 1 7, 1 9 B U F _P LT _ R S T # E C _R S T # *0 _0 4 R7 8 6 0_ 0 4 KB C_ W R E SE T # LPC 74 3 VBAT L AD0 L AD1 L AD2 L AD3 L PCC L K L F RA M E# S ER IRQ L P C R S T #/ W U I 4 / GP D 2 ( P U ) K/B MATRIX 14 W R S T# GA 2 0 8 GA 2 0 8 , 2 2, 2 9 A C _I N # 21 L E D_ ACIN 3 ,9 A P U_ T A L ERT # 0 _0 4 E C _ S MI # E C_ S CI # ME _ W E # C P U _F A N ( W EB1 # ) V GA _ F A N C P U_ F A N 2 2 W E B _ E MA I L # C8 5 5 0. 1u _ 1 6V _ Y 5V _ 0 4 R 7 08 R 7 09 R 5 23 H _P E C I 18 Pin87 3IN1 mult i f unc tion pin 17 , 2 1 B T _ DE T # 3 IN 1 R 7 87 1K _ 0 4 2 2 W EB_ W W W # 22 T P_ CL K 22 T P _ DA T A 80 D E T# ( 8 0 P OR T _ D E T# ) ( W EB2 # ) GP A 0 ( GP A 1 ( GP A 2 ( GP A 3 ( GP A 4 ( GP A 5 ( GP A 6 ( GP A 7 ( PU PU PU PU PU PU PU PU ) ) ) ) ) ) ) ) P F 0( P F 1( P F 2( P F 3( P F 4( P F 5( 0 /ID0 1 /ID1 2 /ID2 3 /ID3 4 /ID4 5 /ID5 6 /ID6 1 /ID7 ( P D )E G A D / G P E 1 ( P D )E GC S #/ G P E 2 ( P D )E GC LK / G P E 3 PU PU PU PU PU PU ( P D )W U I 5/ G P E 5 ( P D )L P C P D # / W U I 6/ G P E 6 ) ) ) ) ) ) PWM/COUNTER ( P D )TA C H 0 / G P D 6 ( P D )TA C H 1 / G P D 7 ( P D )T MR I 0 / W U I 2 / G P C 4 ( P D )T MR I 1 / W U I 3 / G P C 6 CIR R I 1# / W U I 0/ GP D 0 ( P U ) R I 2# / W U I 1/ GP D 1 ( P U ) ( P D )C R X / G P C 0 ( P D )C T X/ G P B 2 LPC/WAKE UP GP INTERRUPT G I N T / GP D 5 ( P U ) K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S I0 I1 I2 I3 I4 I5 I6 I7 4 5 6 8 11 12 14 15 K B -S I 0 K B -S I 1 K B -S I 2 K B -S I 3 K B -S I 4 K B -S I 5 K B -S I 6 K B -S I 7 4 5 6 8 11 12 14 15 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S K B -S O0 O1 O2 O3 O4 O5 O6 O7 O8 O9 O1 0 O1 1 O1 2 O1 3 O1 4 O1 5 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 K B -S O0 K B -S O1 K B -S O2 K B -S O3 K B -S O4 K B -S O5 K B -S O6 K B -S O7 K B -S O8 K B -S O9 K B -S O1 0 K B -S O1 1 K B -S O1 2 K B -S O1 3 K B -S O1 4 K B -S O1 5 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 1 00 1 01 1 02 1 03 1 04 1 05 1 06 Valu e m o dify 3/2 3 R5 3 3 0_ 04 FO R IT 851 2C X/ EX W /0 C IR) C7 5 3 UART 10 8 10 9 *0 _ 0 4 R XD / GP B 0 ( P U ) T X D / GP B 1( P U ) I T 8 5 18 E V E R : C * 0_ 0 4 EC MODULE CHOOSE (FOR DIFFERENCE K/B TYPE) V ER. R50 3 / R5 04 W 24 D0 3 V OL TA GE 1. 65 V 10K / 1 0K W 27 D0 1 2 .4 9K / 7. 5K W 27 D0 1 60 K / 10K W 27 D0 1 2. 5V 0. 47 V 1. 1V 20K / 1 0K 10K / 2 0K W 27 D0 1 W240BU W251BUQ W251BAQ W270BUQ(O2) W240BUQ(O2) W251BUQ(O2) Reserve 0V X / 1 0K W 24 D0 3 MO DE L_I D 3. 3V 1 0K / X W 24 D0 3 2. 2V MO D E L _ I D R5 0 3 2 . 49 K _ 1 % _0 4 R5 0 4 7 . 5K _ 1 % _ 04 Sheet 20 of 43 KBC-ITE IT8518 V DD 3 Mo dify 3/2 2 Pin100 ,104&106 EXT ? ? Pull h i & Pull L ow . M odify 3 /16 56 57 SUS B # SUS C # 93 94 95 96 97 98 99 1 07 R7 1 5 * 0 _0 4 1 20 1 24 C P U _F A N S E N V G A_ F A NSE N CK 3 2 K E CK 3 2 K * 10 K _ 0 4 3. 3V S C 7 51 1 u_ 6 . 3 V _X 5 R _ 0 4 U3 7 8 VD D SI SO CE # SCK 22 , 2 3 , 2 4 K B C_ F L A S H 3 K B C _ H O LD # 7 5 2 1 6 K B C_ S P I_ S I_ R K B C _ S P I _ S O _R K B C _ S P I _ C E #_ R K B C _ S P I _ S C LK _ R WP # 3 /17 4 H OL D # VSS *A T 2 5F 5 1 2 A N For 8502E U37 U39 Co-layout 22 V DD 3 1 1, 1 3 C7 5 2 0 . 1 u_ 1 6 V _ Y 5 V _ 04 For 8512E C E L L _C ON T R OL KBC_SPI_*_R = 0.1"~0.5" U3 9 8 LA N _ P C I E _ W A K E # 1 6 VD D Mod ify 3/1 7 S W I# R5 2 8 1 K _ 0 4 8 ? ? ? KB C_ F L A S H 3 R 5 3 2 4 . 7 K _ 04 K B C _ H O LD # 7 WP # 3/1 6 *1 0 m li _ s ho rt 1 2 *1 0 M_ 0 4 R 5 26 4 7 _ 04 K B C _ S P I _ S O _R R 5 27 1 5 _ 1% _ 0 4 K B C _ S P I _ S O K B C_ S P I_ SI 1 K B C _ S P I _ C E #_ R R 5 29 1 5 _ 1% _ 0 4 K B C _ S P I _ C E # 6 K B C _ S P I _ S C LK _ R R 5 30 4 7 _ 04 CE # K B C_ S P I_ SCL K 4 U37 U39 Co-layout VSS MX 2 5L 1 60 6 E M 2I -1 2 G Va lue m od ify3 /23 CK 3 2 K E C 7 55 K B C_ S P I_ S I_ R 2 SI SCK H OL D # 4 3 5 SO C H G_ E N C K 32 K E C K 32 K R5 3 1 2 1 28 *1 2p _ 5 0V _N P O_ 0 4 NC 2 R 5 07 3/1 6 C 7 54 CK 3 2 K C o- lay ou t X2 , X 3 * 12 p _ 50 V _ N P O_ 0 4 1 2 S H OR T * 10 m i _l s ho rt _ 0 4L C D _ B R I G H T N E S S 1 0 K _ 04 W L A N_ L E D# X1 0 R 53 4 R 5 06 V DD 3 V C O R E _ ON 2 8 A LL _ S Y S _P W R GD ( P M _P W R O K ) R7 1 0 0_04 1 19 1 23 19 CLOCK CC D_ DET # 2. 2 K _ 0 4 2. 2 K _ 0 4 15 R S M R S T _ GA T E # 8 K B C_ RS T # 8 47 48 1 0 K _ 04 F or cha rge r 3 /17 U S B _ P W R _E N # 2 2 OC P P E # 1 9 Mo dify ICP P E # 19 35 17 R 5 05 B A T _ V OL T D D _ ON 82 83 84 S MD _ B A T R 8 0 8 S MC _ B A T R 8 0 9 3G _ D E T # 8 , 1 1 , 12 , 1 9 , 23 8 , 2 3 , 25 EC_ RES E T 2 9 B T _E N 1 7 ,2 1 B K L _E N 13 H S P I_ CE # 9 H S P I _ S C LK 9 H S P I _ MS O 9 H S P I _ MS I 9 ( P D )R I N G # / P W R F A I L# / L P C R S T #/ G P B 7 0 . 1u _ 1 6V _ Y 5V _ 0 4 3 G_ P O W E R 1 5 C CD _ E N ( P D )L 8 0H L A T/ G P E 0 EC_ V SS V DD3 ( 3G _ P W R _ E N ) K B C_ S P I_ C E # K B C_ S P I_ SI K B C_ S P I_ SO V C H G _S E L K B C _ S P I_ S CL K 1 12 R 8 29 1 7, 2 1 W L A N _ L E D # 17 W L A N_ D E T # R5 3 5 )GP H )GP H )GP H )GP H )GP H )GP H )GP H )GP G WAKE UP WAKE UP Del ? ? VGA 3/8 1 2 ,1 3 B RIG HT NE SS PD PD PD PD PD PD PD PD EXT GPIO P W R S W / GP E 4( P U ) 18 21 33 0. 1U_ 04 F OR IT E8 51 2- J(I TE 85 02 -J EC Co st D ow n ( ( ( ( ( ( ( ( PS/2 P W R_ B T N # WEB1# --- WEB_ EM AIL # WEB2# --- WEB_ WWW# 0/ 1/ 2/ 3/ 4/ 5/ 6/ 7/ P S2 CL K0 /G P S 2 D A T0 / G P S2 CL K1 /G P S 2 D A T1 / G P S2 CL K2 /G P S 2 D A T2 / G 3 G_ E N 23 P W R_ S W # 8 , 1 3, 2 2 L I D _S W # 8 ( P D )K S O 16 / G P C 3 ( P D )K S O 17 / G P C 5 PWM 12 5 15 GPIO C L K 0 / GP B 3 D A T 0 / GP B 4 C L K 1 / GP C 1 D A T 1 / GP C 2 C L K 2 / GP F 6 ( P U ) D A T 2 / GP F 7 ( P U ) PW M PW M PW M PW M PW M PW M PW M PW M 85 86 87 88 89 90 80 C LK 8 0C LK F L F R A ME # / G P G2 F L A D 0/ S C E # F LA D 1 / S I F L AD2 /S O F L A D 3 / G P G6 F L CL K /S C K ( P D )F LR S T #/ W U I 7 / GP G 0 / TM SMBUS SM SM SM SM SM SM 24 25 28 29 30 31 32 34 K BC_ B EE P 21 L E D _S C R O LL # 21 L E D _N U M # 21 LE D _ C A P # 2 1 L E D _ B A T _C H G 21 L E D _ B A T _ F U L L 21 L E D_ PW R 17 17 0 _0 4 0 _0 4 *0 _ 0 4 L CD _ B RIG HT NE S S KBC _ BEEP( BEEP ) C 0 / GP I 0 C 1 / GP I 1 C 2 / GP I 2 C 3 / GP I 3 C 4 / GP I 4 C 5 / GP I 5 C 6 / GP I 6 C 7 / GP I 7 AVSS 3, 8 , 9 S M C _ C P U _T H E R M 3, 8 , 9 S M D _ C P U _T H E R M AD AD AD AD AD AD AD AD 1 u_ 6 . 3 V _X 5 R _ 0 4 V DD 3 FLASH ADC 11 0 11 1 11 5 11 6 11 7 11 8 SM C_ BA T SM D_ BA T S MC _ B A T S MD _ B A T Del ? ? VGA 3/8 IT8518 C7 4 9 J _ KB2 *8 5 20 1 -2 40 5 1 58 59 60 61 62 63 64 65 75 29 29 3G _ D E T # CC D_ DE T # MO D E L _ I D P J0 P J1 A C 2 / GP J 2 A C 3 / GP J 3 A C 4 / GP J 4 A C 5 / GP J 5 VSS VSS VSS VSS VSS VSS VSS F or c har ge r 3 /17 DAC G G D D D D 66 67 68 69 70 71 72 73 B A T _D E T B A T _V O L T ( APKEY # ) 29 B A T _ DE T 29 B A T _ V OL T 22 AP_ KEY# 2 T H E R M_ V OL T 2 9 T O TA L _ C U R 15 3 G_ D E T # 15 CC D_ DE T # E C S C I # / GP D 3 ( P U ) E C S MI # / GP D 4 ( P U ) 76 77 78 79 80 81 W L A N_ E N K S O 0/ P D 0 K S O 1/ P D 1 K S O 2/ P D 2 K S O 3/ P D 3 K S O 4/ P D 4 K S O 5/ P D 5 K S O 6/ P D 6 K S O 7/ P D 7 K S O 8/ A C K # K S O 9 /B US Y K S O1 0 / P E K S O 11 / E R R # K S O1 2 / S L C T K S O1 3 K S O1 4 K S O1 5 G A 20 / G P B 5 K B R S T #/ G P B 6 ( P U ) P W U R E Q #/ GP C 7 ( P U ) L 8 0L L A T / GP E 7 ( P U ) 23 15 ( S M I# ) ( S C I# ) 1 7 , 2 1 W LA N _ E N 18 K B C _ MU TE # 22 12 6 4 16 20 1 12 27 49 91 113 1 22 8 ,1 9 8 R7 9 7 K S I0 /S T B# K S I 1/ A F D # K S I2 /INIT # K S I3 /S L IN# K S I4 K S I5 K S I6 K S I7 K B C _ W R E S E T# FOR W25 J _ KB1 8 52 0 1 -24 0 5 1 AV CC 26 50 92 114 1 21 127 VST BY VST BY VST BY VST BY VST BY VST BY 10 9 8 7 13 6 5 22 80 D E T# 24 J_KB1 FOR W24/W27 1 00 K _ 0 4 *1 0 K _ 04 *M C -1 4 6 _3 2 . 7 68 K H z 4 3 X1 1 *1 T JS 1 2 5 D J 4 A 42 0 P _ 3 2. 7 6 8 K H z 6- 22 -3 2R 76- 0B 4 C7 5 6 *0 . 1 u_ 1 6 V _Y 5 V _0 4 K B C _A GN D R53 4 Fo r I T85 18 BX& IT8 51 9BX Onl y. 6- 22- 32 R7 6- 0B2 6- 22- 32 R7 6- 0BG KBC-ITE IT8518 B - 21 B.Schematic Diagrams 7 ,1 2 R7 8 5 VC C U 38 7 ,1 1 LP C _ A D 0 7 ,1 1 LP C _ A D 1 7 ,1 1 LP C _ A D 2 7 ,1 1 LP C _ A D 3 7 ,8 L P C_ CL K 0 7 , 11 L P C _F R A ME # 7 ,1 1 S ER IRQ 1 11 . 3 .3 V S K B C _ A GN D 0 . 1u _ 1 6V _ Y 5V _0 4 E C_ V CC R5 0 2 C 7 46 0 . 1 u_ 1 6 V _Y 5 V _ 04 C7 4 8 L 1 18 H C B 1 00 5 K F -1 2 1T 2 0 80PORT J _ 80 D E B U G 1 Schematic Diagrams LED/ MDC/ BT Bluetooth 3 .3 V R5 3 6 47 K _ 0 4 3 .3 V B T _ DE T # C7 5 7 R 5 38 * 18 0 p_ 5 0 V _N P O_ 0 4 *1 0K _0 4 D B T _ E N# BT_ EN 3 .3 VS A D5 1 1 3 2 4 LE D _A C I N 2 0 2 R 5 42 R 54 3 K P B -3 02 5 Y S G C * 22 0 _ 04 * 22 0 _0 4 R5 5 0 C W LA N _L E D # 1 7 , 2 0 * 10 m i _l s ho rt _ 0 4 B W L A N _E N 6-5 2- 520 01 -02 7 Q1 6 * DT C1 1 4 E UA BT_ EN 17 , 2 0 W24 On, W25/W27 Off E H2 5 M7 M- MA R K 1 M8 M-M A R K 1 M2 M-M A R K 1 H3 3 H T 6 _0 B S 1 D 3 _ 7 H3 4 h t 6 _ 0b 7 _0 d 3 _7 H3 5 H C 6_ 0 d 3_ 7 3 4 5 1 9 8 7 6 H1 4 3 4 5 MT H 31 5 D 1 1 1 1 9 8 7 6 H1 3 3 4 5 MT H 31 5 D 1 1 1 9 8 7 6 1 C 76 0 *0 . 1 u_ 1 6V _Y 5V _ 0 4 MT H 3 1 5 D 1 1 1 VD D3 H1 C 1 10 D 11 0 N P S1 S MD 80 X 8 0 M3 M-M A R K 1 S2 S MD 8 0 X 80 M4 M-M A R K 1 H5 3 4 5 H 15 H 4_ 7 B 6 _0 D 3 _ 7 H 17 * H 4 _7 B 6 _ 0D 3 _7 H3 6 h t 6 _ 0b 7 _0 d 3 _7 H2 9 H 4 _ 7B 6 _ 0 D 3 _7 1 9 8 7 6 H1 1 H6 C6 7 D6 7 H2 1 H 20 C 1 10 D 1 1 0 N P C 11 0 D 1 1 0N P H1 9 H 4 _ 0B 7 _ 0 D 3 _7 H7 1 H2 4 3 4 5 6 3 4 5 1 9 8 7 6 1 H2 6 9 8 7 6 3 4 5 MT H 31 5 D 1 1 1 1 M TH 3 15 D 1 1 1 H9 1 MT H 31 5 D 1 1 1 9 8 7 6 H4 3 4 5 1 MT H 3 1 5 D 1 1 1 9 8 7 6 GN D J_ T P 4 1 2 3 4 5 6 MT H 3 1 5 D 1 1 1 Del H30, H31, H32 3 /8 3 4 5 B - 22 LED/ MDC/ BT 1 9 8 7 6 MT H 31 5 D 1 1 1 mt h3 1 5d 1 1 1_ 3 H 23 C 67 D 6 7 H3 3 4 5 MT H 31 5 D 1 1 1 3 4 5 1 1 H 18 H 6_ 0 D 3 _ 7 M6 M- MA R K 1 1 H2 C 11 0 D 1 1 0N P *K P B -3 0 25 Y S GC B Q1 7 D T C 1 1 4E U A M1 M5 M -MA R K 1 M -MA R K 1 POWER ON LED D1 3 2 1 7, 2 0 C L E D _ S C R OL L # 2 0 20 WLAN LED D1 LOCK LED L ED_ CAP# 2 0 6-5 2- 520 01 -02 7 2 2 0 _0 4 E LOCK LED C L E D _ N U M# 2 0 6- 52 -52 00 1- 027 SCROLL R Y - S P 17 0 Y G3 4 -5M A C C C R Y -S P 17 0 Y G3 4 -5 M S A T A _L E D # 9 6- 52- 52 001 -0 27 D 4 LOCK LED R Y - S P 1 70 Y G 34 -5 M A D 3 LED R Y - S P 1 70 Y G 34 -5 M A D2 CAPS R 54 1 22 0 _0 4 L E D_ P W R BT LED 3 22 0 _0 4 Y R 5 48 2 20 _ 0 4 SG R5 4 7 2 20 _ 0 4 4 R5 4 6 22 0 _ 04 NUM 3 . 3V S R 5 40 1 R 5 49 HDD/ODD C 75 8 3 . 3V S 2 3 .3 V S 3 3 .3 VS Y 3 .3 V S SG LED 4 Sheet 21 of 43 LED/ MDC/ BT 1 B.Schematic Diagrams S 1 7 , 20 * 18 0 p_ 5 0 V _N P O_ 0 4 Q1 4 *MT N 70 0 2Z H S 3 G 9 8 7 6 L ED_ P W R L E D_ A CI N L E D_ B A T _ F UL L L E D_ B A T _ CHG 8 5 20 1 -0 60 5 1 On 3 /18 GN D W24 Off, W2 5/W27 On Schematic Diagrams USB/ FAN/ TP/ MULTI CON USB PORT*2(Port 0,Port1) US B V CC1 FAN CONTROL R7 4 0 0 _ 06 R7 4 1 * 0_ 0 6 U S B _V C C 2 US B V CC0 60 mil + C7 6 9 2 2 0u _ 6. 3V _ 6 . 3 *6 . 3* 4. 2 V DD 5 17 D D _ ON V DD5 D M_ O 12 O UT F O N# V IN V O UT VSET 10 D P _O *1 0 K _0 4 U S B _P P 0_ R I L I M0 *1 0 K _0 4 6 R 7 48 *1 0 K _0 4 7 R 7 51 *1 0 K _0 4 8 C TL 1 I L I M1 C TL 2 NC R7 3 7 * 17 . 8 K _ 1% _ 0 4 R 7 12 15 R7 4 5 * 10 K _ 0 4 C TL 3 20 1 -28 4 -8 00 2 8 1-1 W 2 4 6 - 2 1- B 4 9C 0 - 10 4 W 2 5 /W 2 7 6 - 2 1- B 4 41 0 - 00 4 F A U LT # R7 4 6 *1 0 K _0 4 R5 7 4 *0 _ 04 U 41 1 2 3 4 F ON # GN D Cha ng e 3 /18 9 13 5V S D A TA _ H * 10 m li _ s ho rt _ 0 4 3/23 D R 7 50 5V S _ F A N 3 L 1 20 16 PN:APE8 87 4 3/9 D A TA _ L 4 5 2 5 GN D GN D AX9 95B(SOT 23 -6) & APE88 72 Co -L ayou t V+ 2 3 *W C M2 0 1 2F 2 S -1 6 1T 0 3 2 1 14 G ND E N /DS C 1 * 10 m li _ s ho rt _ 0 4 4 U S B _ P P 0_ R D P _I N I L I M_ S E L 2 nd So ur ce J _ US B 1 R 7 11 U S B _ P N 0 _R U S B _P N 0 _R 3 Q7 6 *M TN 70 0 2 Z H S 3 G A C_ IN# C P U _F A N * A X 99 5 B 100 mil 11 D M _I N C P U _F A N FO N V IN V O UT VSET GN GN GN GN D D D D 8 7 6 5 A X 9 9 5S A 2 nd So urce 2 nd So urce V DD3 PN :APE887 2- -6- 02 -08 87 2-F C0 3/9 PN :G99 0-- 6- 02- 99 011 -B20 PN :AX9 95 SA-- 6-0 2- 990 11 -B20 U S B _ O C P 0 _1 # *T P S 2 5 40 N/A 5 VS S 8, 20 , 2 9 0 . 1 u _1 6 V _ Y 5 V _ 04 8 US B _ P N0 8 U S B _P P 0 U S B _P N 0 R 1 68 0_ 0 4 US B _ P N0 _ R U S B _P P 0 R 1 71 0_ 0 4 U S B _ P P 0 _R 5 VS_ F AN J _ F A N1 1 2 3 C 7 65 C7 6 6 0. 1 u _1 6 V _ Y 5 V _ 04 CTL3: 0 CTL3: 1 CTL3: X X 1 1 3. 3 V 8 , 1 9 U S B _ OC P 0_ 1 # U S B _ F L G# + C 7 72 F L G# V O U T 1 V IN1 V O UT 2 V IN2 V O UT 3 E N# G ND * R T 97 1 5 B GS 5 U S B _ F L G# 6 US B V CC1 F LG # V OU T1 2 8 U S B _P N 1 8 US B _ P P 1 V IN1 V OU T2 V IN2 V OU T3 3 C 76 1 4 1 0u _ 1 0V _ Y 5 V _ 0 8 R7 1 4 8 C7 6 2 C7 6 3 1 0 . 1 u_ 1 6V _ Y 5V _ 0 4 0 . 1 u_ 1 6V _Y 5V _ 0 4 C 77 0 DA T A _ L GN D * 1 0m i _l s h ort _ 0 4 1 -28 4 -8 00 2 81 -1 Ch an ge 3/18 * 10 u _ 6. 3 V _ X 5R _0 6 W2 4 6- 2 1 - B4 9 C 0- 1 0 4 W2 5 / W2 7 6 -2 1 - B4 4 1 0- 0 0 4 R 5 56 R 5 57 10 K _ 0 4 10 K _ 0 4 C7 7 1 * 10 u _ 10 V _ Y 5 V _ 08 J_ T P 1 DA T A _ H 3/2 3 C7 6 4 * 15 m li _ s ho rt _ 0 6 V+ 3 L1 2 1 4 E N# GN D R T 9 71 5 B GS R 5 55 2 3 * W C M 20 1 2 F 2S -1 6 1 T0 3 2 1 5V S 1 * 1 0m i _l s h ort _ 0 4 4 100 MIL 7 5 VS_ TP J _ US B 2 U4 0 5V Port 1 SO P 8 & M SO P 8 C o - la y o u t 3 / 9 R7 1 3 1 CLICK CONN 0 . 1 u _1 6 V _ Y 5 V _0 4 R3 . 3 M odi fy . 6 7 8 1 4. 7 K _ 0 4 Sheet 22 of 43 USB/ FAN/ TP/ MULTI CON 80 mil C 7 73 * 10 0 u _6 . 3 V _ B _A U 4 5 2 3 4 U S B _ V CC3 L 13 0 *1 5 mi l _ sh o rt _ 06 R 55 3 * 10 K _ 0 4 * 0_ 0 4 3 R 5 51 3 .3 V S US B V CC1 R 55 4 JFAN 2 0 C P U _F A N S E N 3. 3 V R 55 2 1 0 K _0 4 U S B _ O C P 0 _1 # 8 52 0 5-0 3 7 01 1 0u _ 1 0V _ Y 5V _ 0 8 1-----> Dedicated Charging Port, Auto-detect 1-----> Charging Downdtream Port, BC Spec 1.1 0-----> Standard Downstream Port, USB 2.0 Mode. 1 2 3 4 8 52 0 1-0 4 0 51 GN D 1 G ND 2 GN D 3 G ND 4 CTL2 CTL2 CTL2 G ND 1 GN D 2 G ND 3 GN D 4 CTL1 CTL1 CTL1 1 u_ 6 . 3V _Y 5V _ 0 4 T P _D A T A 2 0 T P _C LK 20 C 7 74 C 7 75 47 p _ 50 V _ N P O _0 4 47 p _ 50 V _ N P O _0 4 2 3 , 2 5, 2 6 D D _O N # V DD 3 POWER SWITCH CONN. CONN.(Port 2) AP_ KEY# R7 3 3 5V R7 3 4 R8 3 1 R8 3 2 R8 3 3 3 . 3V S 1.1A 60mils *0 _ 0 6 C7 7 8 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 3. 3 V C7 7 6 C 7 77 1 2 3 4 5 6 7 8 Q 18 G 1 8 H P _ S E NS E 1 8 S P K OU T R + 1 8 S P K OU T R 8 US B _ P N4 R5 6 1 *1 0 m li _ sh o rt _ 04 U S B N4 _ R 8 USB_ PP4 R5 6 2 *1 0 m li _ sh o rt _ 04 U S B P 4 _R S P K OU T R + S P K O UT R- 8 5 20 1 -14 0 5 1-0 1 *1 0 m li _ sh o rt _ 04 M_ B T N # AP_ KEY# 88 4 8 6-0 8 01 J _ SW 1 1 2 3 4 5 6 7 8 9 10 M_ B T N # 20 mi l M _B T N #_ R W EB_ W W W # W E B _ E M A I L# L ID_ S W # 23 R5 6 0 *1 0m i l _s h or t _0 4 M_ B TN # M_ B T N # P C2 3 0 W E B _W W W # 2 0 W E B _E M A I L # 2 0 L I D _ S W # 8 , 13 , 2 0 A P _ ON 23 P R 21 5 * 47 K _ 0 4 *0 . 1u _ 5 0V _ Y 5V _ 0 6 P V1 *V 1 5 A V L C 0 4 02 2 1 8 M IC_ S E N S E H E A D P H O N E -R H E A D P H O N E -L M IC_ S E NS E S P K _H P # H P _ S E NS E U S B N4 _ R U S B P 4 _R 0. 0 1 u_ 1 6 V _X 7 R _ 0 4 2 0m il MB T N R5 5 8 W EB_ W W W # W E B _ E MA I L # LI D _ S W # 1 1 8 H E A D P H ON E -R 1 8 H E A D P H ON E -L 0 . 01 u _ 16 V _ X 7R _0 4 3 .3 V A P _ ON PV2 *V 1 5 A V L C 0 40 2 V IN 2 1 8 M IC1 -R M 1 8 M IC1 -L M 1 2 3 4 5 6 7 8 9 10 11 12 13 14 S * MT N 7 0 02 Z H S 3 J _ A UDIO 1 M I C 1 -R M M IC1 -L M 3 .3 V S 1 0 K _ 04 * 1 0K _ 0 4 * 1 0K _ 0 4 J_ S W 2 A P _K E Y # 2 0 0 _ 06 D US B V CC1 AP_ KEY # W E B _W W W # W E B _E M A I L # CLOSE TO J_SW1 1 Audio/B * 5 05 0 0- 01 0 41 -0 0 1L If system has APON function, uses J_SW1 If system has no APON function, uses J_SW2 USB/ FAN/ TP/ MULTI CON B - 23 B.Schematic Diagrams 2 0 U S B _ P W R _E N # Mo dify 3/1 7 U 52 4 3 1 6 G ND1 GN D 2 G ND3 GN D 4 IN 2 4 R 7 49 V D D5 20 , 2 3 , 24 *1 0 0u _ 6 . 3V _ B _ A G ND 1 GN D 2 G ND 3 GN D 4 U 10 1 PPAD 100 mil U S B _P P 0 * 10 K _ 0 4 5 VS Port 0 US B V C C0 U S B _P N 0 R 7 47 C7 6 8 Valu e m o dify 3/2 3 US B PO RT Charg e V DD 3 5V S _ F A N F ON # + C 7 40 Schematic Diagrams 5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS VA Del R81 0 3 /9 V A 1 22 M_ B T N # 22 V IN1 7 V IN 1 0 0K _ 0 4 6 M _B T N # 1K _ 0 4 R5 6 3 D D _ ON _L A T C H 3 1 K_ 0 4 P R 2 11 A P _ ON V IN 1 3 .3 V 1 K to 1 00 K 3/9 8 VA 2 V IN P R 2 10 V IN V IN 1 PU 1 P W R_ S W # 4 D D_ O N P R1 8 2 0 , 22 , 2 4 1 K_ 0 4 P W R_ S W # 2 0 ON DD_ON"L" T O "H" FROM EC PC 6 PC 7 PC 8 C 7 79 0 . 1 u_ 5 0 V _Y 5 V _ 06 0 . 1 u _5 0 V _ Y 5 V _ 0 6 0 . 1 u_ 5 0 V _ Y 5 V _ 0 6 0 . 0 1 u _1 6 V _ X7 R _0 4 5 I N S TA N T -ON GN D PR 3 *1 0 0K _ 0 4 V DD 3 P 2 8 0 8B 0 Dis ab le PR3 3/9 S Y S 5V 5V S Y S 5V PR 4 P R5 1 0 K_ 0 4 1 0 K_ 0 4 SY S5 V PR6 10 K _ 0 4 ON 0. 0 1 u _1 6 V _ X 7R _ 04 0 . 01 u _ 1 6V _ X 7 R _ 0 4 6 P Q1 A M TD N 7 0 0 2Z H S 6 R PC 9 S 1 Sheet 23 of 43 5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS P Q1 B M TD N 7 0 0 2Z H S 6 R ON D 2G 20 , 2 2 , 2 4 D D _ ON 3. 3 V S SU SB 2 2 , 2 5 , 26 S PR 8 1 0 0K _0 4 1 0 0 K _0 4 S US C 2 5 , 2 6 , 27 D 5G 8 , 1 1, 1 2 , 1 9 , 20 S U S B # * 0. 1 u _ 16 V _ Y 5V _ 0 4 PR 7 S US C S US B D 0 . 0 1 u_ 1 6 V _X 7 R _0 4 D D_ O N# 3 C7 8 2 4 C7 8 1 8 , 2 0, 2 5 PC 1 0 P Q2 MT N 7 0 0 2 Z H S 3 G SUSC # P C1 1 S D D _ ON # C 78 0 * 0 . 1u _ 1 6 V _Y 5 V _ 04 P R9 * 0. 1 u _ 16 V _ Y 5V _ 0 4 10 0 K _ 04 C7 8 3 C 78 4 0. 01 u _ 16 V _ X 7 R _ 0 4 0 . 0 1u _ 1 6V _X 7 R _ 0 4 ON 5VS 5V S Y S 15 V S Y S 1 5V V DD 5 3A 5V 3A 1.5VS NMO S V DD 5 PQ 4 A M TN N 2 0 N 0 3 Q8 8 2 7 1 5V S S Y S 15 V PR1 1 Power Plane 1 .5 V P C1 2 P C2 2 5 P R 2 06 0. 1 u _ 16 V _ Y 5V _ 0 4 1 0u _ 1 0V _Y 5 V _0 8 * 10 0 _ 1% _ 0 4 P Q 5A *M T N N 20 N 03 Q 8 2 1 8 7 P R1 2 1 M_ 0 4 N M OS 1 . 5V S *1 M_ 0 4 P C 22 6 P C 2 27 P R2 0 7 0 . 1 u_ 1 6 V _Y 5 V _ 04 1 0 u _1 0 V _ Y 5 V _ 0 8 *1 0 0_ 1 % _0 4 P J1 2 4 PQ 6 0 * MT N 7 0 0 2Z H S 3 4 2 P R1 4 *1 0 u_ 1 0 V _ Y 5 V _ 08 * 1 00 _ 1 % _0 4 P Q 5B *M TN N 2 0 N 0 3 Q8 S US B P Q1 3 * MT N 70 0 2 Z H S 3 G *0 . 1 u_ 1 0 V _ X7 R _0 4 S CD 3 /8 6 PJ 2 CD 3 /8 PC1 4 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 P C1 9 5 4 70 p _ 50 V _ X 7 R _ 0 4 PC1 3 D D G S US B S 1 6 5 S G D D _O N # PC1 8 P Q6 1 *MT N 70 0 2 Z H S 3 1 5 47 0 p _ 50 V _ X 7 R _ 0 4 P Q4 B M TN N 2 0 N 0 3 Q8 6 P C1 7 P Q3 B M T N N 20 N 03 Q 8 D 4 3 1M _ 04 3 3 P R1 0 8 7 P Q3 A MT N N 20 N 03 Q 8 2 1 ON ON 4 0 m li SU SB 4 0m i l 2 5, 2 6 , 2 7 ON ON 1.1VS 3.3VS NM O S V DD 3 3A 8 7 P Q8 A MT N N 20 N 03 Q 8 2 1 3 .3 V 3A 8 7 P Q9 A MT N N 2 0N 0 3Q 8 2 1 P Q6 A 1 M_ 0 4 P R 17 Power Plane P R1 6 P C2 1 P C2 2 PR 1 9 0. 1 u _ 1 6V _ Y 5V _0 4 1 0 u _1 0 V _ Y 5 V _ 0 8 1 0 0 _1 % _ 04 3 1 M_ 0 4 P C 22 8 P C 2 29 P R2 0 8 5 G 5 P R 15 1 0 u_ 1 0 V _ Y 5 V _ 0 8 *1 0 0 _1 % _ 0 4 P Q6 B M T N N 20 N 03 Q 8 5 SU SB G G PQ 1 0 M TN 7 00 2 Z H S 3 6 S SU SB 2 20 0 p _ 50 V _ X 7 R _ 0 4 ON B - 24 5VS/ 3.3VS/ 1.8VS/ 1.5VS/ 1.1VS D 4 P C 26 P Q6 2 MT N 7 0 0 2Z H S 3 P Q9 B MT N N 2 0N 0 3Q 8 S 22 0 0 p _5 0 V _ X 7R _ 04 D D _ ON # PC 1 6 0 . 1 u _ 16 V _ Y 5 V _ 0 4 0 . 0 1 u_ 1 6 V _ X7 R _0 4 S P Q8 B M T N N 20 N 03 Q 8 10 0 _ 1% _ 0 4 6 P C2 5 1 0 u _1 0 V _ Y 5 V _ 0 8 D 4 0 . 1 u_ 1 6 V _Y 5 V _ 04 CD 3 /8 P C1 5 PC 2 0 3 1M _ 04 1 .1 V S M T N N 20 N 03 Q 8 2 1 4 S Y S 15 V VD D3 PR 1 3 NMO S 8 7 3 S Y S 1 5V 3. 3 V S 1 . 1V D 3.3V SY S1 5 V 6 B.Schematic Diagrams ON ON PQ 7 *M T N 7 0 02 Z H S 3 2 6, 2 8 Schematic Diagrams POWER VDD3/ VDD5 VR EF P R2 1 * 0 _0 4 PR2 2 0_04 P C2 8 1u _ 1 0 V _ Y 5 V _ 0 6 P R2 3 P R2 4 E N _5 V 2 1 VF B1 E N1 3 VR EF 5 9 uP6182 8 7 6 5 0 . 1 u _1 0 V _ X 7 R _ 0 4 10 20 K _ 1 % _ 04 W2 4 /W25 -- > 2 20 u_ 6.3 V_6 .6* 5 7 1 2 3 S YS5 V 1 5 6 7 8 1 2 3 18 17 16 25 15 14 C C A PR 3 0 EN _ AL L * RB 0 5 4 0 S 2 VR EF VR EG 5 P R3 4 0 _0 4 P R3 5 *0 _ 0 4 P R 1 46 5 . 1 _ 06 P R2 6 3 0 K _ 1 % _0 6 P C 1 74 2 2 00 p _ 5 0V _X 7 R _0 4 V RE G 5 P R 32 *0 _ 0 4 PR3 3 2 . 2_ 0 6 P C 46 0 . 01 u _ 5 0V _X 7 R _0 4 P D5 B A T 54 S W GH A 1 3 C A 2 V IN 1 2 P C 41 Rb + P R2 1 6 P R2 8 68 0 K _ 1 % _ 06 1 9 . 1 K _ 1 % _0 6 * RB 0 5 4 0 S 2 P R3 1 0_04 * 68 0 K _ 1 % _0 4 1 *5 m m 1 0 00 p _ 5 0 V _X 7 R _0 4 PD 4 13 VR EG 5 PC2 3 8 22 0 0 p _ 50 V _ X 7 R _ 0 4 PQ 1 7 P 1 2 0 3B V 4 VCL K L DO 5 VIN EN0 LG A T E 1 PD 3 A PJ 4 5A Ra 19 GN D P A D G ND L G AT E2 VD D5 P L2 T MP C 0 60 3 H -4 R 7 M-Z 01 2 PH ASE1 12 4 3 2 1 PR2 9 W2 7 5 .7 --> 2 20 u_ 6.3 V_ 6. 3* 6.3 * 4.2 1 0 0p _ 5 0 V _ N P O _ 04 1 3 K _ 1 % _0 6 22 0 u _ 6. 3 V _ 6 . 3 *6 . 3 * 4. 2 PQ 1 5 P1 2 0 3 BV 4 20 S K IPS EL PR1 5 2 5. 1_ 0 6 PC 4 2 1 u_ 1 0 V _ Y 5 V _ 0 6 21 UG AT E1 3 2 1 8 7 6 5 P R2 7 P Q 16 P 1 2 0 3B V 4 . 7 u_ 2 5 V _ X 5R _ 0 8 * 4 . 7u _ 2 5 V _ X5 R _ 08 P C4 4 0 . 1 u _ 1 6V _Y 5 V _ 04 Sheet 24 of 43 POWER VDD3/ VDD5 Ch an ge valu e 3 /2 4 SY S5 V SY S1 0 V V RE G 5 P C 47 PD7 C VIN PC 4 8 PC 4 9 A 4 . 7 u _ 25 V _ X 5 R _ 0 8 R B 0 54 0 S 2 1 u _1 0 V _ Y 5V _0 6 P C 50 0 . 01 u _ 5 0V _X 7 R _0 4 P D6 B A T 54 S W GH A 1 3 C A 2 2 20 0 p _ 50 V _ X 7 R _ 0 4 SY S1 5 V P C 51 2 20 0 p _ 50 V _ X 7 R _ 0 4 VR EG 5 Z2418 P R 37 *0 _ 0 4 E N_ 3 V P R3 8 0 _ 04 E N_ 5 V D 1 0K _0 4 P R3 6 P Q1 8 G 1 2 S D S 10 0 K _ 0 4 G AC IN P Q2 2 *M T N 7 0 0 2Z H S 3 S 29 0 . 1 u _1 0 V _ X 7 R _0 4 P Q 19 M T N7 0 0 2 Z HS 3 P R3 9 PJ 5 *6 m i l D D _ ON PC 5 5 D MT N 70 0 2 Z H S 3 G 2 0 , 2 2 , 23 POWER VDD3/ VDD5 B - 25 B.Schematic Diagrams +P C 4 0 PC 3 8 0 . 1u _ 5 0 V _ Y 5 V _ 0 6 B O OT 1 11 * 5 mm P C3 9 PC3 7 22 B OO T2 P HAS E 2 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 P C 33 SY S5 V PO K P C3 6 P C 35 U GA TE 2 PL 1 T M P C 0 6 0 3H -4 R 7 M -Z 0 1 2 1 5A 23 L D O3 P C3 4 1u _ 1 0 V _ Y 5 V _ 0 6 4 S YS3 V 1 CD 3/8 *1 0 K _ 04 5 6 7 8 P Q 14 P 1 2 0 3B V *4 . 7 u _ 2 5V _X 5 R _ 0 8 P J3 V IN 24 V O1 8 PC3 1 4 . 7 u _2 5 V _ X 5 R _ 0 8 2 TO N SEL 6 E N2 V O2 V RE G 3 PU 2 PR 2 5 PC 3 2 V D D3 V F B2 7 CD 3/8 VIN PC 3 0 1 0 0 0p _ 5 0 V _ X7 R _ 04 10 0 K _ 0 4 10 0 0 p _5 0 V _ X 7 R _ 0 4 4 1 00 K _ 0 4 P C 45 22 0 u _ 6. 3 V _ 6 . 3 *6 . 3 * 4. 2 E N _3 V PC2 9 Schematic Diagrams *4 . 7 u _2 5 V _ X 5 R _0 8 * 4 . 7 u _2 5 V _ X 5 R _0 8 P C6 8 C R B 0 5 40 S 2 *0 . 1 u _5 0 V _ Y 5 V _ 0 6 A 5V PU 4 P C6 7 PD 1 2 P C6 6 POWER 1.5V/ 0.75V VIN VD DQ 5 6 7 8 u P 6 1 63 PC 6 9 10 u _ 1 0V _ Y 5 V _ 0 8 PC 7 0 *0 _ 0 4 P R5 5 *0 _ 0 4 4 P VC C5 VC C5 5 V T T RE F Sheet 25 of 43 POWER 1.5V/ 0.75V PR 5 4 C S 0 . 1 u _ 10 V _ X 7 R _ 0 4 0_06 5V 16 MO D E P C8 0 PR 5 2 Z 26 2 1 PD 1 3 * SK3 4 SA 1 0 K _ 1 % _ 06 P C7 9 5 6 0 u _2 . 5 V _ 6 . 6 *6 . 6 * 5. 9 P R5 3 PQ 2 4 MD S 2 6 5 5 4 18 17 + P R5 0 5 .1 _ 0 6 15 14 P R 56 2 . 2 _0 4 PR 5 7 5V P R5 8 6 0_06 13 C O MP P C8 1 P GO OD 3 .3 V 11 V D DQ S NS S5 V D DQ S E T S3 10 N C *1 0 _0 4 PC 8 4 *1 0 0 0p _ 5 0 V _ X 7 R _ 0 4 7 DD R1 .5 V _ P W RG D 12 PC 8 3 * 1 00 0 p _ 5 0V _X 7R _ 0 4 NC 0_06 P R6 0 1 0 0 K_ 0 4 G N D 9 1u _ 1 0 V _ Y 5 V _ 0 6 P R5 9 1 u _ 10 V _ Y 5 V _ 0 6 8 PC 8 2 25 5V P G ND C S _G N D C DR V L GN D 0 _ 06 DD R1 .5 V _ P W RG D 1 1 ,2 8 P R6 2 5V *1 0 K _ 1 % _ 04 PR 6 3 PR 6 4 1 0 K _ 1 %_ 0 6 P R6 5 1 .5 V EN 4 7K _0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 S S 2 *M T N 7 0 0 2 Z H S 3 PJ 9 *6 m i l G S U S C# P C 85 P Q2 6 G P Q 27 1 M TN 7 0 02 Z H S 3 S 8 , 2 0, 23 P Q2 5 MT N 70 0 2 Z H S 3 G 1 0 0 K _ 04 D P R6 6 D D 5V 2 2 , 2 3, 26 D D _O N # 5V * 2 2 _0 4 +1 . 5 S _ C P U _ P W R G D PR 6 7 1 0 0K _0 4 PR 6 9 *1 0 0 K _ 0 4 PQ 2 8 G B - 26 POWER 1.5V/ 0.75V PC8 6 PQ 2 9 S USB 0. 1u _ 1 6 V _ Y 5 V _ 0 4 G * MT N 7 00 2 Z H S 3 M TN 7 0 0 2Z H S 3 S SU SB S 2 3 , 2 6, 2 7 S U S B V TT E N D P R 68 D V T T _ ME M 1 0K _1 % _ 0 6 + 0 . 0 1u _ 1 6 V _ X 7 R _ 0 4 V T T SNS 3 P R4 9 PJ 8 1 2 1 .5 V * OP E N _ 8 A 0 . 1 u _1 6 V _ Y 5 V _ 0 4 19 P C 77 LL 2 1 0 u _ 10 V _Y 5 V _ 0 8 1 0 u _ 10 V _ Y 5 V _ 08 * 10 u _ 1 0 V _ Y 5 V _ 0 8 V D DQ 2 3 1 20 V T T GN D PR 4 8 0_06 10A PC 7 5 PC 7 3 1.5V V D DQ PL 4 1 . 0 U H _ 1 0 *1 0 *4 . 5 1 2 0_06 PC7 4 2 2 0 0p _ 5 0 V _ X 7 R _ 0 6 PC 7 2 P R 47 D RV H 1 PC 7 1 B.Schematic Diagrams 21 VTT * OP E N _ 2 A PC 7 6 *5 6 0 u _ 2. 5 V _ 6 . 6 * 6. 6 * 5 . 9 24 1 V TT _ M E M PQ 2 3 MD S 2 6 5 9 4 0 . 1 u _ 10 V _ X 7 R _0 4 22 A PJ 7 VBST 5 6 7 8 2 V L DO IN 2 3 1 23 Schematic Diagrams POWER 1.1V/ 1VS 5V V IN PR 1 9 7 2 2 ,2 3 ,2 5 DD _ O N# 62 K _ 1 % _ 0 4 PD1 4 P C8 8 PC 8 7 PC 9 0 RB 0 5 4 0 S 2 P C8 9 G *6 2 K _ 1 % _0 4 4 . 7 u _ 25 V _X 5R _ 0 8 PR 7 2 P R7 1 1 0 K _ 1% _ 0 4 MT N 70 0 2 Z H S 3 0 . 1 u _ 1 0 V _ X 7R _ 0 4 P Q3 1 P1 2 0 3 BV 4 P C9 1 5 6 7 8 SU SC C S US C S 23 , 2 8 OCP=10uA X RILIM / Rdson D P Q3 0 *4 . 7 u _ 2 5 V _ X 5 R _ 0 8 EN_ 1 .1 V 10 0 K _ 1 % _ 0 4 0 .1 u _ 5 0 V_ Y 5 V _ 0 6 P R7 0 A 5V 2 3 1 0 . 1 u _ 1 0 V _ X5 R _ 0 4 1.1V 15 16 13 0. 1u _ 1 0 V _ X 7 R _ 0 4 PU 5 u P 6 1 27 Ch an g e va lue 3 /24 PL 5 T M P C 0 60 3 H -4 R 7 M -Z 0 1 1 2 GN D 17 P AD + PQ 3 2 P 1 20 3 B V P C 78 5 N. C 6 7 N.C *0 . 1 u _ 10 V _X 7 R _ 04 8 P R7 4 R TN D L P C9 5 PC 9 6 2 20 0 p _ 5 0 V _ X7 R _ 0 4 2 5m m 1 u _ 1 0V _Y 5 V _ 0 6 Sheet 26 of 43 POWER 1.1V/ 1VS * 10 m i l _ sh o rt P C9 7 PR 7 5 PC 9 8 0 . 0 1 u _ 1 6V _ X7 R _ 04 1 0 K _ 1 % _0 4 * 2 0p _ 5 0 V _ N P O_ 0 4 5V PC 9 9 P C2 1 3 3 0 0 K _ 1 % _0 4 1 u _ 1 0 V_ Y5 V_ 0 6 PR 7 6 1.1VS_VTT=0.75 X (1+PR101 / PR102) 2 1 K _ 1 % _0 4 3 /8 1 .5 V 0 . 1 u _ 16 V _Y 5 V _ 0 4 PC 2 1 5 PC 2 1 8 3A 1 VS _ P W RG D P U1 1 5 9 7 6 V IN V IN P OK V 1 S _ R EG V C NT L 3A 4 1 0 u _ 6. 3V _X 5 R _ 06 VO UT 8 P R1 9 6 E N 1 2 G N D 2 3m m 3 EN _ 1 VS 1 VS PJ 1 8 1 VO UT Ra P C2 1 4 PC 2 1 6 8 2 p _ 5 0 V _ NP O _ 0 4 1 0 u _6 . 3 V _ X 5 R _0 6 1 0 u_ 6 . 3 V _ X 5 R _ 0 6 3 .2 4 K _ 1 % _ 0 4 VF B P C 2 19 A X 66 1 0 P R1 9 5 Rb 10/22 1.0V=>1.054V PR7 7 SU SB P R7 8 6 2 K _ 1% _ 0 4 P Q3 3 P C1 0 0 M T N7 0 0 2 Z H S 3 0 . 1 u _ 1 0 V _ X7 R _ 0 4 G S SU SB D EN _ 1 VS 1 0 0K _1 % _ 0 4 2 3 ,2 5 ,2 7 1 0 .2 K _ 1 % _ 0 4 Vout = 0.8V ( 1 + Ra / Rb ) 5V P C1 0 4 0. 1u _ 1 0 V _ X 5 R _ 0 4 Delete PU6 and related parts. 3 .3 V PR 8 0 2 2 0 K _ 1% _ 0 4 28 1VS_ PWRGD 1 V S _ P W R GD P C 1 08 *0 . 1 u _ 1 0 V _ X 7R _ 0 4 POWER 1.1V/ 1VS B - 27 B.Schematic Diagrams FB 1 1 1.1 V_PWRGD P R 51 5 . 1 _0 6 4 4 0 . 1 u _ 16 V _ Y 5V _0 4 3 1 PC 9 4 VC C P C9 3 5 6 0 u _ 2. 5 V _6 . 6 * 6 . 6* 5 . 9 BS T V O UT 1 .1 V PJ 1 0 5A 2 PG D 9 5 6 7 8 10 1 V 1 .1 LX 2 3 1 11 2 20 K _ 1 % _ 0 4 DH EN P R7 3 N. C I LI M 12 N .C 2 3 .3 V 14 1 PC9 2 PJ 2 3 O P E N -1 m m Schematic Diagrams POWER 1.8VS 5V MTN7002ZHS3 *0.1u_10V_X7R_04 7 PL3 *TMPC0603 H- 4R7M-Z01 1 2 3 PQ21B *AP6901GSM PC61 PC62 *1u_10V_Y5V_06 *10mil_shor t *0. 1u_10V_X7R_04 PR45 PC63 PC64 *14K_1%_04 *20p_50V_NPO_04 *0.01u_16V_X7R_04 PR46 PC65 *10K_1%_04 *20p_50V_NPO_04 3. 3V PC217 5V PC224 0.1u_16V_Y5V_04 PC221 1u_10V_Y5V_06 10u_6.3V_X5R_06 3A PU12 1.8V_PWRGD 5 9 7 EN_1.8V 8 1 VIN VIN POK VCNTL VOUT VOUT VFB 3A 4 1.8VS 2 3mm PR204 2 Ra PC222 PC223 PC220 12. 7K_1%_1/ 16W_04 10u_6.3V_X5R_06 82p_50V_NPO_04 10u_6.3V_X5R_06 AX6610 PR205 Rb 10K_1%_04 Vout = 0.8V ( 1 + Ra / Rb ) B - 28 POWER 1.8VS PJ22 1 3 EN GND V1.8 S_REG 6 2 5mm PC60 17 1.8VS PJ6 1 + 5 PAD 3 4 V1.8S 4A PC59 *560u_2.5V_6. 6*6.6*5.9 DL 1 2 PC54 5 6 15 14 16 DH GND RTN N. C N. C PR44 6 1. 8V_PWRGD 7 220K_1%_04 Sheet 27 of 43 POWER 1.8VS VCC FB 8 B.Schematic Diagrams 9 LX BST VOUT PC58 PC53 *0.1u_10V_X7R_04 PGD 10 PR43 PU3 *uP6127 4 11 3.3V N. C EN N. C 12 ILIM 13 0.01u_16V_X7R_04 1 2 PQ21A *AP6901GSM 8 PC57 11 1.8V_PWRGD PC52 *RB0540S2 *. 1u_50V_Y5V_06 PD10 *0.1u_16V_Y5V_04 *15K_1%_04 PC56 *4. 7u_25V_X5R_08 PR41 D G C SUSB 10K_1%_04 S 23, 25,26 PR42 PQ20 *4. 7u_25V_X5R_08 EN_1.8V A PR40 100K_1%_04 SUSB VIN OCP=10uA X RILIM / Rdson 5V 1.8VS Schematic Diagrams APU CORE/ NB CORE O FS/V FIX EN GND +3 .3V +5V Of fse t & Dr oop O X X SV I VF IX O X O X O X V DDCR_ CP U EMI P R 10 9 10 _0 4 N B _V D D C R C 78 9 0 . 1u _10 V _X 5R _0 4 C 79 0 * 0. 01 u_ 16V _ X7 R _04 C PU _ V D D N B_ R U N _F B _H 3 M eta l VI D C ode s 1 1 0 .8 P R 11 4 10 _0 6 C PD 2 0 1 2 T MP C 06 03H -R 6 8M-Z 01 2 P R 21 7 5 . 1_0 6 + P Q43 MD S 26 55 4 P C 13 9 *4 .7 u_ 25 V_ X 5R _ 08 PC 1 38 * 4. 7u _2 5V _X 5 R _08 5 6 7 8 1 L GA TE _N B Cha n g e v a l u e 3/24 N B _V D D C R P J1 9 VD D C R _N B P L8 P H A S E_ N B P R 1 16 8 . 2K _1 %_0 4 3 30 U F P C 23 4 2 20 0p_ 50 V_ X7 R _0 4 10 A + 1 2 *8 mm P C 14 4 *3 30 u_2 . 5V _V _ A 1 .4 1 .2 1 .0 C 79 1 0 . 1u _10 V _X 5R _0 4 P C 1 40 + P C 143 56 0u_ 2. 5 V_ 6. 6 *6. 6* 5. 9 0 1 0 P Q42 MD S 26 59 V IN P C 1 45 1 0u _6 .3 V _X 5R _0 8 SGN D 5 PC 1 48 0. 22 u_ 16V _ 06 Pin 49 is GND Pi n S VD P H A SE _0 S VC P GN D _0 33 P H A SE _ 0 P Q45 MD S 26 55 4 P D 21 *C S OD 1 40S H P R 12 8 *1 0m li _s ho rt P R 13 1 0 _0 6 2 55 _1 %_0 4 S GN D 5 PR 1 33 62 K_ 1%_ 04 PR 1 32 54 .9 K _1% _0 4 4 70 0p_ 50 V_ X7 R _0 4 P R 13 5 E N AB L E 8 31 LGA TE _0 R B I AS OC S ET LGA TE _1 V D I FF _0 P GN D _1 10 A 5 VS + P C 163 2. 2 u_6 . 3V _Y 5 V _06 29 P C 153 *4. 7 u_ 25V _ X5 R _0 8 P C 15 2 *4 . 7u_ 25 V_ X 5R _ 08 PC 1 51 * 4. 7u _2 5V _X 5R _ 08 + LGA TE _0 30 P VCC 2 *8mm I S P _0 9 1 K _1% _0 4 28 F B_ 0 P H A SE _1 C OMP _0 U GA TE _1 27 IS N_ 0 P C 16 6 6 .8 K _1% _0 4 I SN _ 1 P R 1 39 5V 24 I S P _1 23 VW _1 C OMP _1 22 21 VD I F F _1 F B _1 20 V SE N _ 1 19 RT N_ 1 17 18 R TN _ 0 16 15 V SE N _ 0 B OOT_1 I S N _0 V W_ 0 1 00 0p_ 50 V_ X7 R _0 4 13 P C 168 25 I SP _0 P R 137 PC 1 67 18 0p_ 50 V_ N P O_0 4 26 12 I S P _1 10 0K _0 4 I SN _ 0 2 3, 2 6 S USC P R 14 4 *0 _0 4 P R 14 7 *0 _0 4 P R 20 9 0 _0 4 3. 3 VS 3 C P U _V D D 0 _R U N _ FB _ L U4 6 P R 14 9 10 _0 4 26 1 VS _ PW R GD PQ4 7 MTN 7 00 2Z H S3 G P C 17 2 P Q46 MT N 700 2Z H S 3 G 0. 1 u_ 10 V_ X7 R _0 4 P J1 6 OP EN -1 mm P C 17 1 *74 AH C 1 G08 GW *0 . 1u _10 V _X7 R _0 4 1 4 2 3 1 . 8V S G 1 . 5V 11 , 25 D D R 1 . 5V _P W R GD 1 0K _1 %_ 04 5 3 C P U _V D D 0_ R U N _F B _H P R 14 8 Z 33 01 1 V C OR E _ON 2 P C 1 69 0 . 1u _5 0V _Y 5 V_ 06 EN _ V C OR E S P R 1 40 4 . 02 K_ 1%_ 04 P R 143 *10 mi _l sh ort C P U _V D D C R I S N _1 20 C los e to C PU s ock et 51 0K _0 4 PR 1 45 7. 5 K_ 1% _0 4 P R 14 2 *1 0mi l _sh ort P R 14 1 10 _0 4 PR 1 38 D I SP _0 D 1 00 0p _5 0V _X 7R _0 4 S 11 5 4. 9 K_ 1%_ 04 14 P R 1 36 ISL6265C 6 7 P C 16 5 2 20 0p_ 50 V_ X7 R _0 4 PC 1 61 EN _ V C OR E P R 1 34 P R 12 9 *1 0m li _s ho rt P C 15 8 32 0. 0 1u _50 V _X 7R _ 04 5 P R 21 8 5 . 1_0 6 V D D C R _ C PU PJ 20 1 Sheet 28 of 43 APU CORE/ NB CORE P C 16 2 4 * 10m li _s ho rt U GAT E _0 U GA TE _0 C P U _V D D C R 1 1A 0 . 22u _1 0V _Y 5 V_ 04 * 10m li _s ho rt P R 13 0 P L9 T MPC 0 60 3H -R 6 8M-Z 01 1 2 10u _6 . 3V _X 5R _ 08 P R 12 7 P C 15 5 0 .2 2u _1 6V _0 6 4 *1 5u _2 5V _6 . 3*4 .4 _C P C 16 0 C PU _ SV C P WR OK 34 +P C 15 PC 1 59 C PU _ SV D 3 * 10m li _s ho rt 2 3 1 PR 125 1_ 1% _0 6 35 B OOT_0 P C 15 0 *4. 7 u_ 25V _ X5 R _0 8 B OOT _N B *0. 1 u_ 50V _ Y 5V _0 6 P Q44 MD S 26 59 2 3 1 3 P R 12 6 P GOOD *0 .1 u_ 50 V_ Y 5V _0 6 0. 1 u_ 50V _ Y 5V _0 6 4 36 P C 157 P C 16 4 *3 30 u_2 . 5V _V _ A AP U _ PW R GD _R 3 5 6 7 8 PR 1 20 1_1 %_ 06 P C 14 9 560 u_ 2. 5 V_ 6. 6* 6. 6*5 . 9 2 P C 15 6 C *1 0mi l _sh ort VIN P U9 S GN D 5 PR 1 24 1 1 P WR GD _ VC OR E CD 3 /8 Noi s e i s s ue 3 /9 5 6 7 8 37 39 40 38 U GA TE _ N B P H A SE _ N B LGA T E_ N B P GN D _N B R TN _ N B OC S E T _N B 41 42 43 44 46 45 F B_ N B 47 49 OF S/ V F I XE N V SE N _ N B *10 K_ 06 F S E T_ N B P R 12 3 1 C OMP _N B P R 12 1 1 0K _0 4 *0_ 06 VCC P R 12 2 3 . 3V S VI N 5 VS 0_0 6 GN D P R 11 9 48 S GN D 5 P R 118 P R 11 7 P R 115 44 . 2K _1 %_0 4 3. 3V S 3 , 7 AP U _ PW R GD 3. 3V S R 6 82 1 0K _0 4 MTN 7 00 2Z H S 3 Q29 S D AP U _P W R GD _R APU CORE/ NB CORE B - 29 B.Schematic Diagrams 0 0 1 VIN 4 A SGN D 5 O utp ut P C 14 7 SV D P C 14 6 0. 1 u_ 50 V_ Y5 V _06 SV C U GA T E_ N B *C S OD 140 S H V FIX EN V ID Cod es S GN D 5 2 3 1 S GN D 5 1 u_1 0V _Y 5V _0 6 5 6 7 8 P C 13 7 P R 11 2 *1 0mi l _s hort 2 3 1 0 .8 Noi s e i s s u e 3/9 P R 11 1 10 _0 4 *10 mi _l sh ort 1 P R 11 0 10 _0 6 2 2K _ 1%_ 04 1 5V S 1 00 0p_ 50 V _X 7R _ 04 1 .0 0 .9 10 00 p_5 0V _ X7 R _0 4 1 0 P C 14 1 *1 0mi l _s hort 0 1 C PU _ V D D N B_ R U N _F B _L 3 P R 1 13 O utp ut 1 .1 3 3p_ 50 V_ N P O_0 4 SV D 0 P C 142 SV C 0 B.Schematic Diagrams Schematic Diagrams B - 30 APU CORE/ NB CORE BIOS Update Appendix C:Updating the FLASH ROM BIOS To update the FLASH ROM BIOS you must: • • • • • • • Download the BIOS 1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. 2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files (the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model (see sidebar for important information on BIOS versions). Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive 1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the downloaded files. 2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). BIOS Version Make sure you download the latest correct version of the BIOS appropriate for the computer model you are working on. You should only download BIOS versions that are V1.00.XX or higher as appropriate for your computer model. Note that BIOS versions are not backward compatible and therefore you may not downgrade your BIOS to an older version after upgrading to a later version (e.g if you upgrade a BIOS to ver 1.00.05, you MAY NOT then go back and flash the BIOS to ver 1.00.04). Set the computer to boot from the external drive 1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the computer and press F2 (in most cases) to enter the BIOS. 2. Use the arrow keys to highlight the Boot menu. 3. Use the “+” and “-” keys to move boot devices up and down the priority order. 4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS. 5. Press F4 to save any changes you have made and exit the BIOS to restart the computer. C - 1 C:BIOS Update Download the BIOS update from the web site. Unzip the files onto a bootable CD/DVD/USB Flash Drive. Reboot your computer from an external CD/DVD/USB Flash Drive. Use the flash tools to update the flash BIOS using the commands indicated below. Restart the computer booting from the HDD and press F2 at startup enter the BIOS. Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer. After rebooting the computer you may restart the computer again and make any required changes to the default BIOS settings. BIOS Update Use the flash tools to update the BIOS 1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs being loaded by DOS. Choose “N” for any memory management programs. 2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB flash drive). 3. Type the following command at the DOS prompt: C:BIOS Update C:\> Flash.bat 4. The utility will then proceed to flash the BIOS. 5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer restarts. Restart the computer (booting from the HDD) 1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from the HDD. 2. Press F2 as the computer restarts to enter the BIOS. 3. Use the arrow keys to highlight the Exit menu. 4. Select Load Setup Defaults (or press F3) and select “Yes” to confirm the selection. 5. Press F4 to save any changes you have made and exit the BIOS to restart the computer. Your computer is now running normally with the updated BIOS You may now enter the BIOS and make any changes you require to the default settings. C-2 www.s-manuals.com
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