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COMPAL CONFIDENTIAL
MODEL NAME : 888L2(SOLANO2-M)
Date: 01/11/01
Version: 2.0
888L2 Main Board 2.0
Cover Sheet
Compal Electronics, Inc.
1 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
MODEL NAME : 888L2 (SOLANO2-M)
GMCH2-M
SODIMM 1
ICH2-M HDD CONN.
CD-ROM
CONN.
USB CONN.
PIO
SODIMM 0
LPC BUS
DC/DC
CIRCUIT
CLOCK
CIRCUIT
MEMORY BUS
SECOND MODULE
CONN.
HUB_ILNK
AC_LINK0
SUSPEND
CKT
PS/2
KEYBOARD &
MOUSE CONN.
FWH
X Bus
NS PC87570EXT
KBD
FDD.
UPGA2
Socket
DVO/Vlink
FSB BUS
Decoupling
CapacitorS
AMP & AC97
CODEC
MODEM/LAN
MINI_PCI CONN
VCH
DISPLAY CACHE CONN. & ITP
LCD/INV. CONN. LVDS
SIO
AC_LINK1/LAN
RJ11 RJ45
KB BIOS
RTC BATT &
ON/OFF BTN
INT KBD
PCCARD
POWER
CONTROLLER
CARDBUS
PCI BUS
OZ 6933T
SLOT 1/2
CARD-BUS
CRT CONN.
LPC-TO-X Bus
NS PC87393
& S/IO MicLine in
Head
Phone
T-PAD
CONN.
PAGE 4,5,6 PAGE 6
PAGE 7,8,9 PAGE 10
PAGE 11
PAGE 30-34
PAGE 17
PAGE 17
PAGE 17
PAGE 18
PAGE 27
PAGE 28 PAGE 28 PAGE 28
PAGE 17PAGE 24PAGE 24
PAGE 21PAGE 22
PAGE 26PAGE 23PAGE 25
PAGE 23
PAGE 25
PAGE 22
PAGE 20 PAGE 20
PAGE 19 PAGE 29
PAGE 14
PAGE 14,15,16
PAGE 13
PAGE 13
PAGE 12
PAGE 12
Sub board
IDSEL: AD11
HOST-HUB BRIDGE
IDSEL: AD13
INTERNAL GFX
BUS#0, DEV#30, DEV#31:
IDSEL: AD19
PIRQA#, PIRQC#
IDSEL: AD27, AD28
PIRQB#, PIRQD# BUS#1, DEV#8:
INTERNAL LAN CONTROLLER
HUB, LPC, IDE, USB, SMBUS,
AC'97
888L2 Main Board 2.0
System Block Diagram
Compal Electronics, Inc.
2 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Revision History
# Description Version
1
Date
First Release 0.12000/7/21 (EVT-SST)
Chip information
GMCH2-M QA38ES (A0)
Q967ES (B0)ICH2-M
VCH Q989ES (A0)
EVT
DVT1
ICH2-M FW82801BAM
A0
B0
B1
Version S-spec. Q-spec.
SL45HQ
SL4HN
Q908, Q909, Q910, Q911, Q912
Q967, Q968
QA36, QA37
2 2000/9/20 Second Release (DVT1-PT1) 0.2A
GMCH2-M
ICH2-M
VCH QA57ES (B2)
Q076ES (A1)
GMCH2-M FW82815EM
A0
A1
Version S-spec. Q-spec.
SL4MP
QA38
QA75 QA75ES (A1)
B2 QA56, QA57
VCH FW82807AA
Version S-spec. Q-spec.
A0 Q989
A1 QA76
(SST)
(PT1)
3 2000/11/3 Third Release (DVT2-PT2) 0.2C1
DVT2 (PT2)
4 2000/12/27 Fouth Release (ST) 1B
ST
GMCH2-M
ICH2-M
VCH
A1
B2
A2 QB41ES
A2
5 2001/01/11 2.0fifth release (QT)
QT same as ST
2.0
Revision History
3 42Thursday, January 11, 2001
Compal Electronics, Inc.
888L2 Main Board
Title
Size Document Number Rev
Date: Sheet of
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
BSEL[1:0] STSEM BUS FREQUENCY
00
01
10
11
66MHZ
100MHZ
RESERVED
133MHZ
Address: 1001_110x
VID[4:0] CPU VCC
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
2.00
1.95
1.90
1.85
1.80
1.75
1.70
1.65
1.60
1.55
1.50
1.45
1.40
1.35
1.30
NO CPU
*
* 850MHZ
10010
10000 1.275
11101
1.025
1.050
1.175
11001 1.075
1.100
11010
NO CPU
10111 1.125
10100
0.925
1.150
11100
11000
0.950
11110
11011
10110
1.200
1.225
10011
0.975
11111
10001
1.000
1.250
10101
VID[4:0] CPU VCC
*
* 900MHZ
888L2 Main Board 2.0
COPPERMINE-A
Compal Electronics, Inc.
4 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
FLUSH#
PICD1_CPU
PICD0_CPU
CPURST#
FERR#
RCPUSLP#
HA#[3..31]
PICD1
PICD0
VID[0..4]
CPU_VID[0..4]
VR_HI/LO#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID0 VID1
VID2
CPU_VID4
CPU_VID3 VID3
VID4
CPU_VID2
CPU_VID1 VID0
BSEL0
HD[0..63]
ITP_TDO
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
ITP_PREQ#
GTL_PRDY#
VCH_VID[0..4]
R_VID1
VCH_VID0
VCH_VID1
VCH_VID2
VCH_VID3
VCH_VID4 R_VID3
R_VID0
R_VID2
R_VID4
ITP_TDO
ITP_TCK
HA#4
HD#54
HD#55
FLUSH#
BSEL1
THERMDA
HA#5
HD#22
HD#58
HD#60
HD#63
HA#12
HA#17
HA#19
HD#1
HD#5
HD#11
HD#42
HA#23
HD#27
HD#37
PICD1_CPU
THERMDC
GTL_PRDY#
HA#15
HD#8
HD#13
HD#18
HD#20
HD#21
HD#23
HD#33
HD#41
HD#50
HD#57
HA#30
HD#6
HD#15
HD#49
CPURST#
THERMDA
HD#17
HD#24
HD#25
FERR#
HA#11 HD#7
HD#9
HD#36
HD#38
HD#40
RCPUSLP#
ITP_TMS
BSEL0
HA#8
HA#20
HD#0
HD#28
HD#35
HD#62
PICD0_CPU
HA#16
HA#28
HD#29
HD#32
HD#34
HA#7
HA#9
HA#14
HA#21
HD#16
HD#30
HD#44
HD#61
HA#22
HD#2
HD#39
HD#48
THERMDC
HA#3
HA#10
HA#29
HD#4
HD#45
HD#46
HD#56
BSEL1
HA#18
HA#24
HD#59
ITP_TDI
HA#26
HA#31
HD#12
HD#26
HD#31
HD#51
HD#52
HA#6
HA#13 HD#10
HD#19
ITP_TRST#
ITP_PREQ#
HA#25
HA#27
HD#3
HD#14
HD#43
HD#47
HD#53
+CPU_IO
+2_5V_CLK
+CPU_IO
+5VS
+3VS
+3VS
+3VS
+3VS
+CPU_IO
+CPU_IO
+3VS
R102 @33_0402
12 C97 @15PF
1 2
RP40
8P4R-10K
1 8
2 7
3 6
4 5
R429
@0_0402
1 2
RP42
8P4R-0
1 8
2 7
3 6
4 5
R106 1501 2
R243 56.2_1%1 2
R44 1.5K
12
R42 1.5K1 2
R107 1501 2
R293 1.5K12
R100 1.5K12
R21710_0402 12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
RP32 8P4R-1.5K1 8
2 7
3 6
4 5
R101 56.2_1%12
R210 1.5K
12
R214
@33_0402
1 2
R261
110_1%
1 2
R99 0_040212
R103 0_040212
COPPERMINE
PC
COMPATIBILITY
SIGNALS
RESPONSE
PHASE
SIGNALS
ARBITRATION
PHASE
SIGNALS
SNOOP PHASE
SIGNALS
ERROR
SIGNALS
REQUEST
PHASE
SIGNALS
DIAGNOSTIC
& TEST
SIGNALS
THERMAL DIODE
DATA
PHASE
SIGNALS
EXECUTION
CONTROL
SIGNALS
U5A
COPPERMINE
AA15
AB16
AB18
AC19
AC11
AB12
AA11
AC15
AD13
AD14
AA14
AB20
W20
AA12
AD10
AC12
AC13
V5
AB10
AA21
Y21
W21
W19
U2
U1
AA2
W1
Y1
V1
Y4
U3
AA1
AB1
Y2
E6
V21
AD9
C6
U4
T4
R1
AB2
T2
V4
V2
W3
W5
W2
L3
K3
J2
L4
L1
K5
K1
J1
J3
K4
G1
H1
E4
F1
F4
F2
E1
C4
D3
D1
E2
D5
D4
C3
C1
B3
A3
B2
C2
A4
A5
B4
C5
D10
D11
C7
C8
B9
A9
C10
B11
C12
B13
A14
B12
E12
B16
A13
D13
D15
D12
B14
E14
C13
A19
B17
A18
C17
D17
C18
B19
D18
B20
A20
B21
D19
C21
E18
C20
F19
D20
D21
H18
F18
J18
F21
E20
H19
E21
J20
H21
L18
G20
P18
G21
K18
K21
M18
L21
R19
K19
T20
J21
L20
M19
U18
R18
V20
T21
U21
R21
V18
P21
P20
U19
AA3
T1
AA18
Y20
AB21
AA10
AC9
A6
M3
AA16
AB15
THERMDA
THERMDC
INTR/LINT0
NMI/LINT1
STPCLK#
SLP#
TCK
TDO
TDI
TMS
TRST#
PREQ#
PRDY#
BSEL0
A20M#
FERR#
IGNNE#
PWRGOOD
SMI#
BP2#
BP3#
BPM0#
BPM1#
TRDY#
RS0#
RS1#
RS2#
RSP#
HIT#
HITM#
DEFER#
AERR#
AP0#
AP1#
BERR#
BINIT#
IERR#
BREQ0#
BPRI#
BNR#
LOCK#
ADS#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
RP#
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#
DBSY#
DRDY#
PICCLK
PICD1
PICD0
INIT#
FLUSH#
RESET#
BCLK
EDGCTRLN
BSEL1
U4
SN74CBT3383
1
23
4 5
67
8 9
1011
1213
14 15
1617
18 19
2021
22 23
24
BE#
C0A0
B0 D0
C1A1
B1 D1
C2A2
GNDBX
B2 D2
C3A3
B3 D3
C4A4
B4 D4
VCC
C209
@15PF
12
R27
1K_0402
1 2
R22
1K_0402
1 2
R18
@1K_0402
1 2
R19
1K_0402
1 2
R20 1K
1 2
R30 @10K
1 2
R24
1K_0402
1 2
C22
.1UF
12
R245 10K_0402
1 2
R246 1K_0402
1 2
C312
2200PF
12
U20MAX1617A
1
2
3
4
5
6
7
8
9
10
11
12
13 14
15
16
NC
VCC
DXP
DXN
NC
ADD1
GND
GND
NC
ADD0
ALERT#
SMBD
NC SMBC
STBY#
NC
R258 1K_0402
1 2
C310
.1UF
1 2
R26
10K_0402
1 2
R105
@10K_0402
1 2
R104
100_0402
12
RP41
8P4R-1K
1 8
2 7
3 6
4 5
HD#[0..63] <7>
ADS#<7>
HA#[3..31]<7>
DEFER#<7>
FERR#<14>
HREQ#4<7>
HIT#<7>
BNR#<7>
HLOCK#<7>
HREQ#1<7>
HREQ#3<7>
HITM#<7>
HREQ#2<7>
HREQ#0<7>
DBSY# <7>
PICD0 <14>
CLK_APIC_CPU <11>
PICD1 <14>
CLK_HOST_CPU <11>
DRDY# <7>
CPU_VID[0..4] <5>
SMB_EC_DA1 <12,22,23,31>
VR_HI/LO# <15,30>
ITP_TDO<13>
GTL_PRDY#<13>
NMI<14>
HTRDY#<7> RS#0<7>
IGNNE#<14>
RS#1<7>
STPCLK#<14>
CPU_PWRGD<14>
RS#2<7>
INTR<14>
SMI#<14>
A20M#<14>
BPRI#<7>
SMB_EC_CK1 <12,22,23,31>
ITP_TDI<13>
ITP_TCK<13>
ITP_TMS<13>
ITP_TRST#<13>
ITP_PREQ#<13>
VCH_VID[0..4] <12>
VID[0..4] <30>
INIT# <14>
CPURST# <7,13>
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
uPGA2 and uBGA2 PIN P1:
for low voltage Cumine CPU: connect to +CPU_CORE, only uBGA2 package.
for normal Cumine CPU: connect to +CPU_IO.
888L2 Main Board 2.0
COPPERMINE-B
Compal Electronics, Inc.
5 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
+CLKREF
+CMOSREF
TESTLO1
TESTLO2
+TESTHI
+GTLREF
+VCCT_VCCA
+VCCT_VSSA
+CPU_CORE
+CPU_IO
+GTLREF
+2_5V_CLK
+CPU_IO
+2_5V_CLK
+CPU_IO
+CPU_CORE
R28
2K_1%
1 2
C194
.1UF C34
.1UF
R29
1K_0402
1 2
R25
2K_1%
1 2
C250
.1UF
12
C205
.1UF
12
R23
1K_0402
1 2
C339
.1UF
12
C217
.1UF
12
C208
.1UF
12
R209
1.5K_1%
1 2
R215
1K_1%
1 2
C202
.1UF
12
L47
Murata LQG21N4R7K10
1 2
R96
56.2_1%
1 2
R262
1.5K
12
COPPERMINE
POWER, GROUND AND NC
U5C
COPPERMINE
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
G17
H6
H17
J6
J17
K6
K17
L6
L17
M6
M17
N6
N17
P1
P6
P17
R6
R17
T6
T17
U6
U17
V6
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
W6
W7
W8
W9
W10
W11
W12
W13
W14
W15
W16
W17
Y6
Y7
Y8
AA6
AA7
AA8
AB6
AB7
AB8
AC6
AC7
AC8
AD6
AD7
AD8
R14
R16
R20
T3
T5
T7
T9
T11
T13
T15
T18
T19
U8
U10
U12
U14
U16
U20
V3
V19
W4
W18
Y3
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y19
AA4
AA13
AA20
AB3
AB5
AB9
AB11
AB13
AB14
AB17
AC1
AC2
AC5
AC10
AC14
AC16
AC18
AC21
AD1
AD5
AD16
AD21
A15
A16
A17
C14
D8
D14
D16
E15
G2
G5
G18
H3
H5
J5
M4
M5
P3
P4
AA5
AA19
AC3
AC17
AC20
AD15
R12
AB4
AC4
AD4
AD3
AD2
VCCT0
VCCT1
VCCT2
VCCT3
VCCT4
VCCT5
VCCT6
VCCT7
VCCT8
VCCT9
VCCT10
VCCT11
VCCT12
VCCT13
VCCT14
VCCT15
VCCT16
VCCT17
VCCT18
VCCT19
VCCT20
VCCT21
VCCT22
VCCT23
VCCT24
VCCT25
VCCT26
VCCT27
VCCT28
VCCT29
VCCT30
VCCT31
VCCT32
VCCT33
VCCT34
VCCT35
VCCT36
VCCT37
VCCT38
VCCT39
VCCT40
VCCT41
VCCT42
VCCT43
VCCT44
VCCT45
VCCT46
VCCT47
VCCT48
VCCT49
VCCT50
VCCT51
VCCT52
VCCT53
VCCT54
VCCT55
VCCT56
VCCT57
VCCT58
VCCT59
VCCT60
VCCT61
VCCT62
VCCT63
VCCT64
VCCT65
VCCT66
VCCT67
VCCT68
VCCT69
VCCT70
VCCT71
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS159
VSS160
VSS161
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
VSS102
VID4
VID3
VID2
VID1
VID0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C263
.1UF
12
C32
10UF_10V_1206
12
C35
22UF_10V_1206
12
C336
.1UF
12
COPPERMINE
POWER,
GROUND,
RESERVED
SIGNALS
PLL ANALOG VOLTAGE
U5B
COPPERMINE
A2
A7
A8
A12
A21
B1
B5
B6
B7
B8
B10
B15
B18
C9
C11
C15
C16
C19
D2
D6
D7
D9
E3
E7
E8
E9
E10
E11
E13
E19
F3
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F20
G3
G19
H2
H7
H9
H11
H13
H15
H20
J4
J8
J10
J12
J14
J16
J19
K2
K7
K9
K11
K13
K15
K20
L5
L8
L10
L12
L14
L16
L19
M7
M9
M11
M13
M15
M20
N2
N3
N4
N8
N10
N12
N14
N16
N18
N19
P5
P7
P9
P11
P13
L2
M2
E5
E16
E17
F5
F17
U5
Y17
Y18
H8
H10
H12
H14
H16
J7
J9
J11
J13
J15
K8
K10
K12
K14
K16
L7
L9
L11
L13
L15
M8
M10
M12
M14
M16
N7
N9
N11
N13
N15
P8
P10
P12
P14
P16
R7
R9
R11
R13
R15
T8
T10
T12
T14
T16
U7
U9
U11
U13
U15
N20
R10
R8
R5
R4
R3
P19
P15
P2
AA9
AD18
R2
AD19
AB19
AD17
Y5
N5
AD20
H4
AA17
G4
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS90
VSS91
VSS92
VSS93
VSS94
VCCA
VSSA
VREF0
VREF1
VREF2
VREF3
VREF4
VREF5
VREF6
VREF7
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VSS89
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
CLKREF
CMOSREF1
CMOSREF2
GHI#
RTTIMPEDP
RSVD
TESTHI
TESTLO1
TESTLO2
TESTP1
TESTP2
TESTP3
TESTP4
IST_CPU_PERF#<15> CPU_VID0<4> CPU_VID1<4> CPU_VID2<4>
CPU_VID3<4> CPU_VID4<4>
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 888L2 Main Board 2.0
CPU BYPASS
Compal Electronics, Inc.
6 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
+CPU_IO
+CPU_IO
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE +CPU_CORE+CPU_CORE
+CPU_CORE +CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
C300
.1UF_0402
12
C286
.1UF_0402
12
C251
.1UF_0402
12
C311
.1UF_0402
12
C285
.1UF_0402
12
C309
.1UF_0402
12
C273
.1UF_0402
12
C342
.1UF_0402
12
C182
1UF
12
+C427
220UF_D_4V
6.3V
12
+C183
220UF_D_4V
6.3V
12
+C296
220UF_D_4V
6.3V
12
C275
.1UF_0402
12
C55
1UF
12
+C188
220UF_D_4V
12
+C185
220UF_D_4V
6.3V
12
C265
.1UF_0402
12
C293
.1UF_0402
12
C303
.1UF_0402
12
C305
.1UF_0402
12
C301
.1UF_0402
12
C269
.1UF_0402
12
C266
.1UF_0402
12
+C173
220UF_D_4V
6.3V
12
C267
.1UF_0402
12
+C420
220UF_D_4V
6.3V
12
+C409
220UF_D_4V
6.3V
12
+C406
220UF_D_4V
6.3V
12
C276
.1UF_0402
12
C277
.1UF_0402
12
C278
.1UF_0402
12
C268
.1UF_0402
12
C291
.1UF_0402
12
C292
.1UF_0402
12
C279
.1UF_0402
12
+C271
220UF_D_4V
6.3V
12
+C33
220UF_D_4V
6.3V
12
+C110
220UF_D_4V
6.3V
12
+C113
220UF_D_4V
6.3V
12
+C105
220UF_D_4V
6.3V
12
C332
10PF
12
C334
10PF
12
+C184
220UF_D_4V
6.3V
12
+C386
220UF_D_4V
6.3V
12
C345
1UF
12
C237
1UF
12
C381
10PF
12
C353
10PF
12
C423
.1UF
12
C36
.1UF
12
C392
1UF
12
C391
1UF
12
C100
.1UF
12
C103
.1UF
12
C102
.1UF
12
C244
.1UF
12
C101
.1UF
12
C422
.1UF
12
C99
.1UF
12
C31
.1UF
12
C316
.1UF_0402
12
C318
.1UF_0402
12
C315
.1UF_0402
12
C98
.1UF
12
C320
.1UF_0402
12
C330
.1UF_0402
12
C319
.1UF_0402
12
C328
.1UF_0402
12
C299
.1UF_0402
12
C272
.1UF_0402
12
C249
.1UF_0402
12
C192
.1UF_0402
12
C344
.1UF_0402
12
C256
.1UF_0402
12
C337
.1UF_0402
12
C343
.1UF_0402
12
C302
.1UF_0402
12
C290
.1UF_0402
12
C421
.1UF
12
+C321
220UF_D_4V
6.3V
12
C329
.1UF_0402
12
C304
.1UF_0402
12
C289
.1UF_0402
12
C505
1UF
12
C504
1UF
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Place 10 ohm within 0.5" of
GMCH ball 'R22' and route
trace 1.5" to ball 'P22'
TYPEDET#+VDDQ AGP-REF
0
1
1.5V
3.3V
0.5VDDQ
0.4VDDQ
MODIFY ON 6/11
For external AGP bus pull up/down resistors.
888L2 Main Board 2.0
GMCH2-M - 1/3
Compal Electronics, Inc.
7 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
RS#[0..2]
HREQ#[0..4]
HREQ#0
RS#0
RS#1
RS#2
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HA#10
HA#15
HA#24
HA#19
HA#26
HA#21
HA#22
HA#13
HA#28
HA#23
HA#29
HA#8
HA#27
HA#14
HA#9
HA#25
HA#17
HA#4
HA#16
HA#5
HA#30
HA#3
HA#31
HA#12
HA#20
HA#18
HA#11
HA#7
HA#6
HL8
HL2
VGA_LMD30
VGA_LMA3
VGA_LMD20
HL10
HL9
HL1
HL0
VGA_LMD29
VGA_LDQM3
VGA_LMD28
VGA_LMD11
VGA_LRAS#
VGA_LMD13
VGA_LFSEL
VGA_LMD22
VGA_LWE#
VGA_LMD26
VGA_LDQM2
VGA_LMD10
VGA_LTCLK0
VGA_LCAS#
VGA_LCKE
VGA_LMA9
VGA_LMD8
VGA_LMA2
VGA_LMD0
VGA_LMD5
VGA_LMD2
VGA_LMD7
VGA_LMD19
VGA_LMD18
VGA_LMA0
VGA_LMA5
VGA_LMD3
VGA_LMD23
VGA_LMD31
VGA_LCS#
VGA_LMD25
VGA_LMD16
VGA_LMD9
HL6
HL5
HL4
HL3
VGA_LMD27
VGA_LMD1
VGA_LMD4
VGA_LMA6
VGA_LMA4
VGA_LMD21
VGA_LTCLK1
VGA_LMA11
VGA_LMD14
VGA_LMA8
VGA_LMA1
HL_STB
VGA_LMD17
VGA_LMD15
VGA_LDQM1
VGA_LMD6
VGA_LDQM0
VGA_LMD24
CLK_HUB_GMCH
+GMCH_HLCOMP
GRCOMP
HL_STB#
VGA_LMA10
VGA_LMA7
DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9
DVO_D10
DVO_D11
DVO_BL#
DVO_CLKOUT
DVO_VSYNC
DVO_HSYNC
LTVCL
CRT_VSYNC
CRT_HSYNC
CRT_R
CRT_G
CRT_B
+AGPREF_2GMCH
VGA_LMD12
CLK_DOT_GMCH
+HUBREF_GMCH
VGA_LMA[0..11]
VGA_LMD[0..31]
VGA_LDQM[0..3]
HD#7
HD#34
HD#44
HD#3
HD#8
HD#6
HD#5
HD#49
HD#23
HD#38
HD#28
HD#25
HD#58
HD#1
HD#59
HD#39
HD#62
HD#50
HD#22
HD#14
HD#10
HD#46
HD#16
HD#21
HD#41
HD#33
HD#31
HD#13
HD#63
HD#0
HD#12
HD#40
HD#20
HD#54
HD#55
HD#18
HD#4
HD#[0..63]
HD#30
HD#42
HD#51
HD#43
HD#27
HD#47
HD#35
HD#56
HD#57
HD#61
HD#36
HD#45
HD#52
HD#9
HD#15
HD#24
HD#29
HD#32
HD#60
HD#17
HD#11
HD#26
HD#2
HD#19
HD#53
HD#48
HD#37
+AGPREF_2GMCH
CLK_HUB_GMCH
HA#[3..31]
HL[0..10]
HL7
CLK_DOT_GMCH
LTVDA
LTVCL
DVO_CLKOUT
DVO_D[0..11]
LTVDA
VGA_LMD28
VGA_LDQM3
VGA_LMD29
AGP_ADSTB0
AGP_ADSTB#0
AGP_ADSTB1
AGP_ADSTB#1
AGP_SBSTB
AGP_SBSTB#
AGP_ADSTB0
AGP_ADSTB1
AGP_SBSTB
AGP_ADSTB#0
AGP_ADSTB#1
AGP_SBSTB#
VGA_LMA6
VGA_LMD12
VGA_LMD11 VGA_LCS#
VGA_LMD30 VGA_LMD24
VGA_LMD27
VGA_LMA7
VGA_LMA10
+GTLREF
+GTLREF
+CPU_IO
+1_8VS
+1_8VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS +3VS
R393 8.2K_0402
1 2
R395 8.2K_0402
1 2
C400
.1UF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C408 @18PFR296
@33_0402
1 2
R314
2K_1%
12
R299
1K_1%
12
C424
.1UF
R73 36.5_1%
1 2
R71 36.5_1%
1 2 R70
300_1%_0402
12
C355
.01UF
12
R92 174_1%1 2
R265 10_0402
1 2
R72
300_1%_0402
12
C356
@22PF
R74
200_1%_0402
12
R75
82_0402
12
R76
300_1%_0402
1 2
C76
470PF_0402
R263
@33_0402
12
C370
@22PF
12
C317
@18PF
C75
470PF_0402
R77
82_0402
12
R267
@33_0402
12
AGP
HUB
DVO
U7C
GMCH2v0
K26
J22
K25
J21
L24
J20
L26
K23
K22
M25
M24
M26
M21
N24
N22
N26
T26
T22
U24
T23
U26
T24
V24
U21
V25
V21
V26
W21
W24
W22
W26
Y21
H23
N21
T25
Y26
R26
P26
P23
P21
P25
R24
AE26
AD25
AC26
AD26
AB24
AD24
AC24
AC23
M22
L23
U22
V23
Y23
AA24
H24
H26
H25
G24
F24
E26
E25
D26
D25
D24
C26
G25
F26
AB22
AB25
AB23
AB26
AA22
AA26
Y22
Y25
J24
J26
R22
P22
AD16
AF17
AE17
AD17
AF18
AD18
AF20
AD20
AC20
AF21
AE21
AD21
AB19
AC18
AE19
AF19
AC16
AB17
AA18
AB18
AE24
Y20
AD23
AF22
AF23
AD22
AE22
AE23
F22
H21
H20
G10
AA20
AB21
G_AD0/LDQM0
G_AD1/LMD4
G_AD2/LMD7
G_AD3/LMD3
G_AD4/LMD6
G_AD5/LMD2
G_AD6/LMD5
G_AD7/LMD1
G_AD8/LMD0
G_AD9/LMA4
G_AD10/LDQM1
G_AD11/LMA2
G_AD12/LMD8
G_AD13/LMA5
G_AD14/LMD9
G_AD15/MA1
G_AD16/LMA8
G_AD17/LMD14
G_AD18/LMA11/LBA
G_AD19/LMD15
G_AD20/LMA9
G_AD21/LMD16
G_AD22/LMA0
G_AD23/LMD17
G_AD24/LCKE
G_AD25/LMD18
G_AD26/LCAS#
G_AD27/LMD19
G_AD28/LTCLK1
G_AD29/LMD20
G_AD30/LTCLK0
G_AD31/LMD21
G_C/BE#0/LMA3
G_C/BE#1/LMD10
G_C/BE#2/LMD13
G_C/BE#3/LRAS#
G_FRAME#/LMA10
G_DEVSEL#/LMD11
G_IRDY#/LMD12
G_TRDY#/LMA7
G_STOP#/LCS#
G_PAR/LMA6
G_REQ#/LMD27
G_GNT#
PIPE#/LMD24
RBF#/LMD30
WBF#
ST0/LMD28
ST1/LDQM3
ST2/LMD29
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
SB_STB
SB_STB#
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HLPSTRB
HLPSTRB#
SBA0/LMD31
SBA1/LMD25
SBA2/LDQM2
SBA3/LMD26
SBA4/LMD23
SBA5/LWE#
SBA6/LMD22
SBA7/LGM_FRQ_SEL
AGPREF
GRCOMP
LOCLK
LRCLK
LTVD0
LTVD1
LTVD2
LTVD3
LTVD4
LTVD5
LTVD6
LTVD7
LTVD8
LTVD9
LTVD10
LTVD11
BLANK#
TVCLKIN/STALL
CLKOUT0
CLKOUT1
LTVVSYNC
LTVHSYNC
DDDA
DDCK
DCLKREF
IWASTE
IREF
VSYNC
HSYNC
RED
GREEN
BLUE
HLCLK
HLREF
HLZCOMP
NC
LTVDA
LTVCK
HOST
U7A
GMCH2v0
AA1
AB2
AF2
AD4
AB1
AB3
AA3
AC4
AC1
AF3
AD1
AE3
AD2
AD3
AF1
AA4
AD6
AC3
AE1
AB6
AF4
AE5
AC8
AB5
AF5
AC6
AF6
AD11
AF8
AD8
AD5
AB7
AF7
AD7
AB8
AE7
AE9
AB9
AF9
AD10
AF12
AB11
AB10
AD9
AC10
AF10
AD14
AD12
AB12
AE11
AE15
AF11
AF13
AB14
AF14
AB13
AB15
AE13
AC14
AD13
AD15
AF16
AF15
AC12
R4
P1
T2
R3
N5
P5
R1
U1
P2
T1
T3
P3
T5
R5
V5
Y2
V3
W1
U4
V2
W3
W4
U5
Y5
Y3
U3
Y1
W5
V1
AA5
G1
N4
M5
J3
M3
J1
K1
L3
L4
K3
K2
L1
H1
AA7
H3
M1
N1
M2
L5
N3
U6
AA10
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
CPURST#
ADS#
BNR#
BPRI#
DBSY#
DEFER#
DRDY#
HIT#
HITM#
HLOCK#
HTRDY#
RS#0
RS#1
RS#2
HCLKIN
RSTIN#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
GTLREFA
GTLREFB
RP38
10P8R-8.2K
10
9
8
7
6
1
2
3
4
5
R79 4.7K_0402
1 2
R255 4.7K_0402
1 2
R399 8.2K_0402
1 2
R397 8.2K_0402
1 2
R400 8.2K_0402
1 2
R398 100K_0402
1 2
R396 8.2K_0402
1 2
R394 8.2K_0402
1 2
R392 8.2K_0402
1 2
R195 10K_0402
1 2
R204 10K_0402
1 2
R391 8.2K_0402
1 2
R47
@33_0402
1 2
C62
@10PF
12
RS#[0..2] <4>
HREQ#[0..4] <4>
DBSY# <4>
HLOCK# <4>
HIT# <4>
BNR# <4>
BPRI# <4>
DRDY# <4>
HTRDY# <4>
DEFER# <4>
HITM# <4>
ADS# <4>
CPURST# <4,13>
PCIRST# <12,14,19,21,29>
CLK_HOST_GMCH <11>
HL_STB <14>
HL_STB# <14>
DVO_BL# <12>
DVO_CLKOUT <12>
DVO_CLK <12>
DVO_CLK# <12>
DVO_VSYNC <12>
DVO_HSYNC <12>
CRT_VSYNC <13>
CRT_HSYNC <13>
CRT_R <13>
CRT_G <13>
CRT_B <13>
VGA_LMD[0..31]<13> VGA_LMA[0..11]<13>
VGA_LDQM[0..3]<13>
VGA_LCAS#<13>
VGA_LTCLK0<13>
VGA_LTCLK1<13>
VGA_LRAS#<13>
VGA_LCS#<13>
VGA_LWE# <13>
HD#[0..63]<4>
VGA_LFSEL <8,13>
HA#[3..31] <4>
HL[0..10] <14>
VGA_LCKE<13> CLK_DOT_GMCH <11>
CLK_HUB_GMCH <11>
DVO_D[0..11] <12>
GMBSDA<12>
GMBSCL<12>
LTVDA <12>
LTVCL <12>
3VDDCDA <13>
3VDDCCL <13>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Power-Up Strap Options
Pin Name Strap Description Configuration InternalInterface
SCAS# Host Freq. "H" : 133MHz (Default)
"L" : 100MHz
System
Memory
SMAA11 IOQ Depth
"L" : 1
"H" : 4 (Default) System
Memory
Memory"L" : All Z
SMAA10 "H" : Normal SystemALL Z
SMAA9
"L" : Disabled (Cumine)
FSB P-MOS Kicker Enable System"H" : Enabled (Default)
Memory
SWE# System"H" : 100MHz (Default)Host Freq.
Memory"L" : 66MHz
Enable VCH Serial
Programming Mode Memory
System"H" : Enabled (Default)
"L" : Disabled
SMAC6#
SMAC5#
"H" : Disabled
"L" : Enabled (Default) System
Memory
Enable Quick Start
Support (Quick Start Mode)
(Stop Grant Mode)
PULL_UP
PULL_UP
PULL_UP
PULL_UP
PULL_UP
PULL_UP
PULL_UP
VGA_LFSEL# Local Memory Freq. Select "H" : 133MHz (Default)
"L" : 100MHz
AGP/LM i815/i815-m
*
888L2 Main Board 2.0
GMCH2-M - 2/3
Compal Electronics, Inc.
8 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
MAB#6_R
MAB#7_R
MAB#4_R
MAB#5_R MAB#4
MAB#5
MAB#6
MAB#7
MD[0..63]
SCASA#
MMA9
CSA#4
MAC#6
MAC#5
SBS0
RMWEA#
VGA_LFSEL#
MMD47
MD46
MMD63
MMD9
MD33 MD2
MMD4
MD6
MD38 MD5
MMD56
MD51
MMD0
MD32
MMD38
MD60
MD56
MMD51
MD3
MD11
MD16
MMD40
MMD2
MD7
MD43
MD42
MMD45 MD14
MD62
MMD58
MMD41
MMD36
MMD15MD15
MMD61
MD63
MMD44
MMD50
MMD10
MMD62
MMD33
MD61
MD59
MMD60
MMD19
MMD57
MD50
MMD43
MMD32
MMD6
MD10
MD12
MD57
MMD59
MMD35
MD34
MD36
MD39
MD40
MMD14
MD45 MD13
MD48
MMD1MD1
MMD37
MD4
MD9
MMD3
MMD7
MD35
MMD5
MD8
MMD13
MD17
MD49
MD37
MMD46
MMD12
MD47
MD44
MD18
MMD16
MMD49
MMD8
MMD42
MMD34
MMD39
MD19
MMD17
MMD11
MD0
MD41
MD58
MMD18
MMD48
MD53
MD52
MD54
MD55
MMD52
MMD54
MMD55
MMD53
MD31
MD30
MD28
MD29 MMD28
MMD31
MMD29
MMD30
MD24
MD25
MD26
MD27
MMD24
MMD27
MMD25
MMD26
MD20
MD22
MD23
MD21
MMD23
MMD22
MMD21
MMD20
CSA#5
MMD18
MMD21
MMD22
MMD24
MMD41
MMD60
MMA8
MMD20
MMD23
MMD25
MMD29
MMD30
MMD31
MMD37
MMD39
MMD45
MMA10
CSA#3
CKE2
DQMA#5
DQMA#7
MMD7
MMD36
MMD51
RMWEA#
MMA1
MMA2
MMA3
CSA#4
MMA0
MMA11
MMA12
MMD11
MMD12
MMD13
MMD14
MMD15
MMD38
MMD42
MMD43
MMD46
MMD49
DQMA#0
MAB#4_R
CKE3
DQMA#2
MMD1
MMD2
MMD3
MMD27
SCASA#
DQMA#1
DQMA#3
DQMA#4
DQMA#6
MMD34
MAB#5_R
MAB#6_R
MAB#7_R
CSA#2
MMD0
MMD16
MMD17
MMD19
MMD50
SBS0
SBS1
MMD8
MMD9
MMD32
MMD33
MMD40
MMD44
MMD48
MMD61
MMD62
MMD4
MMD5
MMD6
MMD10
MMD63
MMD47
MMD52
MMD53
MMD54
MMD55
MMD56
MMD57
MMD58
MMD59
SRASA#
SRCOMP
MMD26
MMD28
MMD35
MMA9
SMAC#5
SMAC#6 SMAC#7 MAC#4
MAC#5
MAC#6
MAC#7
SMAC#4
SMAC#5
SMAC#6SMAC#4
SMAC#7
+3V
R297 36.5_1%1 2
RP9 8P4R-10
1 8
2 7
3 6
4 5
RP8 8P4R-10
1 8
2 7
3 6
4 5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C410 @22PF
RP29 8P4R-10
1 8
2 7
3 6
4 5
RP10 8P4R-10
1 8
2 7
3 6
4 5
RP7 8P4R-10
1 8
2 7
3 6
4 5
RP31 8P4R-10
1 8
2 7
3 6
4 5
RP2 8P4R-10
18 27 36 45 RP27 8P4R-10
18 27 36 45
RP3 8P4R-10
18 27 36 45
RP28 8P4R-10
18 27 36 45
RP13 8P4R-10
1 8
2 7
3 6
4 5
RP15 8P4R-10
1 8
2 7
3 6
4 5
RP5 8P4R-10
1 8
2 7
3 6
4 5
RP4 8P4R-10
1 8
2 7
3 6
4 5
R301 10K_04021 2
RP34 8P4R-10
1 8
2 7
3 6
4 5
RP11 8P4R-10
1 8
2 7
3 6
4 5
RP12 8P4R-10
1 8
2 7
3 6
4 5
R290 @10K_04021 2
R292 10K_04021 2
R307 @10K_04021 2
R305 10K_04021 2
R285 @10K_04021 2
R281 10K_04021 2
R68 @10K_040212
R315 @33_0402
1 2
MEMORY
U7B
GMCH2v0
D13
B16
F12
A16
B12
A12
C11
A11
D12
C13
E11
A13
B7
B15
A15
C14
A14
B10
A10
C10
A9
B13
D11
D15
A17
D14
E14
E13
B17
F9
F8
D10
D9
B9
A8
D8
E8
E9
D7
C8
C7
D16
F15
A7
A6
A18
C17
B6
A5
D23
C23
D22
F21
E21
G20
F20
D20
F19
E19
D19
E18
B18
F18
G18
D17
A3
A1
C1
F2
G3
D6
C5
B4
D4
C2
D3
E4
F5
G4
J6
K5
A26
A25
B24
A24
B23
A23
C22
A22
D21
B21
A21
C20
B20
A20
C19
A19
A4
A2
B1
E1
G2
E6
D5
C4
B3
D2
E3
F4
F6
G5
H4
J4
C16
D18
E16
F7
G7
SMAA0
SMAA1
SMAA2
SMAA3
SMAA4
SMAA5
SMAA6
SMAA7
SMAA8
SMAA9
SMAA10
SMAA11
SMAA12
SMAB#4
SMAB#5
SMAB#6
SMAB#7
SMAC#4
SMAC#5
SMAC#6
SMAC#7
SBS0
SBS1
SCSA#0
SCSA#1
SCSA#2
SCSA#3
SCSA#4
SCSA#5
SCSB#0
SCSB#1
SCSB#2
SCSB#3
SCSB#4
SCSB#5
SCKE0
SCKE1
SCKE2
SCKE3
SCKE4
SCKE5
SDQM0
SDQM1
SDQM2
SDQM3
SDQM4
SDQM5
SDQM6
SDQM7
SMD0
SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7
SMD8
SMD9
SMD10
SMD11
SMD12
SMD13
SMD14
SMD15
SMD16
SMD17
SMD18
SMD19
SMD20
SMD21
SMD22
SMD23
SMD24
SMD25
SMD26
SMD27
SMD28
SMD29
SMD30
SMD31
SMD32
SMD33
SMD34
SMD35
SMD36
SMD37
SMD38
SMD39
SMD40
SMD41
SMD42
SMD43
SMD44
SMD45
SMD46
SMD47
SMD48
SMD49
SMD50
SMD51
SMD52
SMD53
SMD54
SMD55
SMD56
SMD57
SMD58
SMD59
SMD60
SMD61
SMD62
SMD63
SRAS#
SCAS#
SWE#
SCLK
SRCOMP
RP33 8P4R-10
1 8
2 7
3 6
4 5
SRASA# <10>
CLK_MEM_GMCH <11>
MMA0 <10>
MMA1 <10>
MMA2 <10>
MMA3 <10>
MMA8 <10>
MMA9 <10>
MMA10 <10>
MMA11 <10>
MMA12 <10>
SBS0 <10>
SBS1 <10>
CSA#2 <10>
CSA#3 <10>
CKE2 <10>
CKE3 <10>
DQMA#1 <10>
DQMA#2 <10>
DQMA#3 <10>
DQMA#4 <10>
DQMA#5 <10>
MAB#4 <10>
MAB#5 <10>
MAB#6 <10>
MAB#7 <10>
MD[0..63]<10>
RMWEA# <10>
VGA_LFSEL<7,13>
CSA#4 <10>
CSA#5 <10>
CKE4 <10>
CKE5 <10>
DQMA#0 <10>
DQMA#7 <10>
DQMA#6 <10>
SCASA# <10>
MAC#4 <10>
MAC#5 <10>
MAC#6 <10>
MAC#7 <10>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PIN# DT_GMCH GMCH2-M
E7
AA6
VSS (GND)
V_1.8 (1.8V)
AGPBUSY# (OUTPUT)
RESERVED (1.8V)
Y17 VSS (GND) INTRPT# (INPUT)
AC18 LTVCLKIN (INPUT) LTVCLKIN/STALL (INPUT)
888L2 Main Board 2.0
GMCH2-M - 3/3
Compal Electronics, Inc.
9 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
+VCCDA
+VCCDPLL
+1_8VS
+3V
+1_8VS
+1_8VS
+3VS
+3VS
+3VS +1_8VS +3V
C483 .1UF_0402
1 2
C484 .1UF_0402
1 2
+
C482
22UF_6.3V_1210_X5R
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
+
C104
150UF_6.3V_E
1 2
+
C120
150UF_6.3V_E
1 2
R112 0_04021 2
L16
68nH
1 2
R280
10K_0402
12
R319
0_0402
12
C407
10UF_10V_1206
12
C393
.01UF
C358
.1UF
C354
82PF
C325
.1UF
C433
.01UF
C324
82PF
C394
.01UF
C415 .1UF
C377 .1UF
C417 82PF
C432.01UF
C109 .1UF
C428
82PF
+C118
22UF_6.3V_1210_X5R
C419
82PF
C346 .1UF
C399
22UF_10V_1206
12
C359
.1UF
C398 .1UF
C367
.1UF
12
C383 82PF
+
C274
22UF_6.3V_1210_X5R
C357
82PF
C126
.01UF
C371
.1UF
C414 82PF
C404
82PF
C416 .1UF
C352
.01UF
C372 .1UF
C326
.1UF
C418
.1UF
12
C413 .1UF
+
C119
22UF_6.3V_1210_X5R
C333
.01UF
POWER/GND
U7D
GMCH2v0
Y9
Y18
AA8
AA11
AA13
AA15
AA17
AA19
AB16
AB20
AC22
AD19
C25
E24
F23
G22
K6
Y7
N25
M23
U25
R21
U20
U23
AB4
AC2
AC5
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC25
AE2
AE4
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
B26
C3
C6
C9
C12
C15
C18
C21
C24
D1
E5
E10
E12
E15
E17
E20
F1
F3
F11
Y6
Y4
W25
W23
W2
V22
V20
V6
V4
K24
U7
U2
T21
F13
AA21
E23
AF26
AF25
B2
B5
B8
B11
B14
B19
B22
B25
E2
F10
F14
F17
G6
G8
G19
H2
H5
H7
K20
Y24
L21
W20
Y10
Y19
AA2
AA9
AA12
AA14
AA16
P11
P12
P13
P14
P15
P16
R2
R6
R11
R12
R13
R14
R15
R16
R23
R25
T4
T11
T12
T13
T14
T15
T16
M14
M15
M16
N2
N6
N11
N12
N13
N14
N15
N16
N23
P4
AA23
F16
F25
G9
G17
G21
G23
P24
H6
H22
J2
J5
J23
J25
K4
K21
L2
L6
L11
L12
L13
L14
AA25
L15
L16
L22
L25
M4
M11
M12
G26
M6
P6
V7
W7
W6
Y17
T6
J7
E22
AE25
K7
AF24
Y8
M13
E7
AA6
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCDA/(VCC1_8)
VCCBA/(VCC1_8)
VCCDACA1/(VCC1_8)
VCCDACA2/(VCC1_8)
VSUS_3.3_1
VSUS_3.3_2
VSUS_3.3_3
VSUS_3.3_4
VSUS_3.3_5
VSUS_3.3_6
VSUS_3.3_7
VSUS_3.3_8
VSUS_3.3_9
VSUS_3.3_10
VSUS_3.3_11
VSUS_3.3_12
VSUS_3.3_13
VSUS_3.3_14
VSUS_3.3_15
VSUS_3.3_16
VSUS_3.3_17
VSUS_3.3_18
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCC1_8
VCC1_8
VCC1_8
VCC1_8
GND
VCC1_8
INTRPT#
VCC1_8
VCC1_8/VCCDPLL
GND/VSSBA
GND/VSSDACA1
GND/VSSDPLL
GND/VSSDACA2
GND
GND
AGPBUSY#
HCLK# C431
.01UF
AGP_BUSY# <15>
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
DIMM1
REVERSE
DIMM2
H=4.0mm H=5.2mm
For SO-DIMM2
For SO-DIMM1
888L2 Main Board 2.0
P10-SODIMM0/1.SCH
Compal Electronics, Inc.
B10 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
MAB#4
MMA13
MMA12
MMA11
MMA1
RMWEA#
SBS0
MMA0
MMA2
MAB#7
SBS1
MAB#5
MMA3
MAB#6
MMA8
DQMA#5
DQMA#6
DQMA#[0..7]
MD[0..63]
DQMA#3
MMA10
MMA9
DQMA#4 DQMA#0
DQMA#2 DQMA#7
DQMA#1
MMA13
DQMA#6
SMB_ICH_DAT_M1
MAC#7
SMB_ICH_CLK_M
MMA13
DQMA#1
DQMA#0
MMA1 MAC#5
SBS0
SBS1
MMA2
RMWEA#
MMA8
DQMA#7 DQMA#3
DQMA#5
MAC#6
MMA11MMA10
MAC#4
MMA9
DQMA#4
MMA0
DQMA#2
MMA3
MMA12
MD35
MD37
MD33
MD38
MD36
MD39
MD34
MD32
MD21
MD20
MD23
MD22
MD17
MD18
MD19
MD16
MD42
MD46
MD44
MD43
MD47
MD41
MD45
MD40
MD53
MD54
MD55
MD52
MD48
MD49
MD50
MD51
MD1
MD3
MD4
MD0
MD2
MD6
MD5
MD7
MD61
MD62
MD56
MD57
MD58
MD59
MD63
MD60
MD10
MD15
MD12
MD8
MD14
MD11
MD13
MD9
MD28
MD24
MD30
MD26
MD31
MD27
MD29
MD25
MD3
MD5
MD0
MD6
MD2
MD4
MD7
MD1
MD9
MD15
MD12
MD8
MD14
MD10
MD11
MD13
MD60
MD62
MD63
MD61
MD59
MD58
MD57
MD56
MD49
MD48
MD52
MD50
MD53
MD51
MD54
MD55
MD36
MD38
MD34
MD32
MD33
MD39
MD37
MD35
MD28
MD31
MD30
MD29
MD26
MD25
MD24
MD27
MD42
MD46
MD43
MD41
MD45
MD47
MD44
MD40
MD16
MD19
MD18
MD17
MD22
MD20
MD23
MD21
+3V +3V+3V
+3V +3V
+3V +3V +3V
+3V +3V
C51
.1UF
12
C106
.1UF
12
R93
6.8_0402
1 2
C50
1000PF
12
C86
5PF
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C77
.1UF
12
C95
1000PF
12
C58
.1UF
12
C90
.1UF
12
C437
10UF_10V_1206
12
C94
.1UF
12
C67
1000PF
12
C66
.1UF
12
R89 6.8_0402
1 2
R84
6.8_0402
12
C85
5PF
12
C84
5PF
12
R85
6.8_0402
12
JP16
SO-DIMM144
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65
RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
C107
1000PF
12
C81
5PF
1 2
C56
.1UF
12
C48
.1UF
12
C39
1000PF
12
C40
.1UF
12
C108
.1UF
12
C96
.1UF
12
C91
.1UF
12
C92
.1UF
12
C436
10UF_10V_1206
12
C74
1000PF
12
C61
1000PF
12
C93
1000PF
12
R86
1K_0402
12
JP17
SO-DIMM144_R
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65
RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
SMB_ICH_DAT_M0<11>
SCASA# <8>
CKE3 <8>
SMB_ICH_CLK_M <11>
CKE2 <8>
MMA0<8> MMA1<8> MMA3 <8>
MAB#4 <8>
MAB#5 <8>
MAB#6<8> MAB#7 <8>
MMA8<8> SBS0 <8>
MMA12 <8>CSA#2<8>
SBS1 <8>
MMA11 <8>
MMA2<8>
CLK_MEM3 <11> CLK_MEM5 <11>
SCASA# <8>
MMA0<8> MMA1<8> MMA2<8>
MMA3 <8>
MAC#4 <8>
MAC#5 <8>
MAC#6<8> MAC#7 <8>
MMA8<8>
MMA9<8> MMA10<8>
MMA12 <8>
SBS0 <8>
SBS1 <8>
CSA#3<8>
SMB_ICH_DAT_M1<11>
MD[0..63]<8>
MMA10<8> MMA9<8>
CKE4 <8>
MMA11 <8>
CKE5 <8>RMWEA#<8> SRASA#<8>
CLK_MEM2<11> CLK_MEM4<11>
RMWEA#<8> SRASA#<8>
CSA#4<8> CSA#5<8>
DQMA#[0..7]<8>
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
SEL0SEL1 PSB SDRAM
00
0 1
01
11
66 100
100100
133 133
133 100
*
Tristate#
REF
33
1
W218 C9835
DCLK
Pin #
VCH_CLK
37
DCLK
SEL1
REF/SEL1
VCC3
VCH_CLK
38
Tristate#
DCLK
W224
VCC3
VCC3
11
CK-Solano2-m
DCLK
SEL1
36
CPU_STP#34
VCC3
PCI_STP#VCC3
SDRAM6
VCC3
CPU_STP#
C9815
REF0/SEL1
TEST#
PCI_STP#
VCC3
CK-Solano
VCC3
TEST#
SDRAM6
REF
29
SDRAM7 SDRAM7
888L2 Main Board 2.0
Clock Synthesizer
Compal Electronics, Inc.
11 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
CLK_3V66_1
CLK_3V66_0
CLK_SIO
SDRAM2
SDRAM5
PCISTP#
CLK_ICH
CLK_USB
SDRAM4
APIC0
APIC1
CLK_MDM
CK133-XOUT
SDRAM3
+2_5V_CLKS
CK133-XIN
DCLK
CLK_FWH
SEL1 HCLK2
HCLK1
CLK_PCI1
CLK_DOT
SEL1
CLK_14M
SEL0
+3V_CLK
SEL0
OSCVCH
+3V_CLK
+2_5V_CLK
+3VS
+3V_CLK
+3V_CLK
+3V_CLK
+3V_CLK
+5VS
+3V
+3VS
C64
.1UF
12
C65
.1UF
12
C82
4.7UF_10V_0805
12
C72
4.7UF_10V_0805
12
C79
.1UF
12
C57
.1UF
12
C63
.1UF
12
C83
.1UF
12
L15
BLM21A601SPT
12
C80
.1UF
12
C73
.1UF
12
C68
.1UF
12
R62 33_04021 2
R65
2M
12
C71
18PF
12
C78
18PF
12
R46 0_04021 2
R51 33_04021 2
R53 22_04021 2
R55 33_04021 2 R56 10_04021 2
R60 10_0402
1 2
R58 10_04021 2
R88 33_04021 2
R43
@1K_0402
12
R54 33_04021 2
R87 47_0402
1 2
L14
BLM21A601SPT
1 2
R57 10_04021 2
R59 @33_04021 2
R67 33_04021 2
Y1
14.318MHZ
12
R508.2K_0402
1 2
R41
10K_0402
12
R40
@10K_0402
12
R64 33_04021 2
R49 33_04021 2
R61 33_0402
1 2
R69 33_04021 2
R83 33_04021 2
R82 33_040212
R81 33_040212
R39
1K_0402
1 2
U6
CK133-SOLANO2-M
55
54
51
53
48
47
6
14 17
24
35
41
3
4
5
32
56
50
49
52
22
33
2
10
21
27
44
23
30
31
25
26
46
45
43
42
40
39
37
36
9
8
7
38
34
11
12
13
15
16
18
19
20
28
29
1
APIC0
APIC1
VCC2
VCC2
GND
GND
GND
GND VCC3
GND
VCC3
GND
X1
X2
GND
PWR_DWN#
GND
CPU1
CPU2(ITP)
CPU0
VDDA
TEST#/(VCC3)
VCC3
VCC3
GND
VCC3
VCC3
GNDA
SDATA
SCLK
USB(48M)
DOT(48M)
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
VCC3/(SDRAM6)
VCH_CLK/(SDRAM7)
3V66_AGP
3V66_1
3V66_0
DCLK/(VCC3)
CPU_STP#(DCLK)
PCI_STP#/(VCC3)
PCI_F(PCI0_ICH)
PCI1
PCI2
PCI3
PCI4
PCI5
PCI6
SEL0
SEL1(TRIST#)
REF0/(SEL1)
G
D
S
Q10
2N7002
2
13
G
D
S
Q8
2N7002
2
13
G
D
S
Q9
2N7002
2
13
R45
10K_0402
12
R33
10K_0402
12
R35
10K_0402
12
R52 33_04021 2
R32
10K_0402
12
R38
4.7K_0402
12
R37
10K_0402
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
CLK_14M_SIO<21>
CLK_14M_ICH<15>
CLK_PCI_ICH<14>
CLK_PCI_PCM<19>
CLK_PCI_FWH<14> CLK_PCI_SIO<21>
CLK_PCI_MINI<29>
CLK_USB_ICH<15>
CLK_MEM2 <10>
CLK_MEM3 <10>
CLK_MEM4 <10>
CLK_MEM5 <10>
CLK_APIC_CPU <4>
CLK_APIC_ICH <14>
CLK_HUB_GMCH <7>
CLK_HUB_ICH <15>
CLK_MEM_GMCH <8>
CPU_STP# <15>
CLK_HOST_CPU <4>
CLK_HOST_GMCH <7>
CLK_DOT_GMCH<7>
SMB_ICH_DAT<15>
SMB_ICH_DAT_M0 <10>
SMB_ICH_DAT_M1 <10>
SEL_DIMM0<15>
SEL_DIMM1<15>
CLK_OSC_VCH <12>
PCI_STP#<15>
SLP_S1#<15,22>
SMB_ICH_DAT<15> SMB_ICH_CLK<15>
SMB_ICH_CLK_M <10>SMB_ICH_CLK<15>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SI2302DS: N CHANNEL
VGS:4.5V, RDS: 85mOHM
VGS:2.5V, RDS:115mOHM
Id(MAX): 2.8A
VGS(MAX): +/- 8V
FDS4435: P CHANNAL
888L2 Main Board 2.0
VCH
Compal Electronics, Inc.
12 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
GMBSDA
GMBSCL
DVO_D[0..11]
ENVDD
LCD15
LCD14
LCD13
LCD12
LCD11
LCD7
ENVDD
LCD5
LCD4
LCD3
LCD2
LCD6
LCD10
LCD0
LCD17
LCD16
LCD1
PID3
PID3
PID2
PID1
PID0
PID1
LCD10
LCD7
PID2
PID0
LCD4
LTVDA
LCD16
LCD14
LCD13
LCD15
LCD1
LCD3
LCD17
LCD2
LCD0
LCD5
LTVCL
LCD6
LCD11
LCD12
PID0
PID1
PID2
PID3
TV_ZCOM
PID1
PID0
PID2
PID3
VCH_VID2
SMB_INV_DA
SMB_INV_CK
VCH_VID3
VCH_VID0
VCH_VID1
VCH_VID[0..4]
VCH_VID4 M_SEN#
LCDVCCLCDVDD
+1_8VS
+3VS
+1_8VS +1_8VS
+1_8VS
LCDVDD
+12VALW
+12VALW
+3VS
LCDVDD
+1_8VS
+1_8VS
+3VS
B+
+5V
INV_PWR
+3V
+5V
+5VALW
LCDVDD
INV_PWR
+3VS
+5VALW+3VALW
+3VS
R426
0_0402
12
R183
100K_0402
12
C169
.1UF
12
R186
4.7K_0402
1 2
R190
75K
12
R189 4.7K_0402
1 2
R188 4.7K_0402
1 2
R187 4.7K_0402
1 2
G
D
S
Q28
2N7002
2
13
C30 .01UF
12
C240
.1UF
12
G
D
S
Q21
2N7002
2
13
C24
.1UF_0402
12
G
D
S
Q50
2N7002
2
13
G
D
S
Q49
2N7002
2
13
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C27
.1UF_0402
C26
.1UF_0402
C25
.1UF_0402
C23
.1UF_0402
R431 0_0402
12
R432 10K_0402
12
G
D
SQ3
2N7002
2
13
R234
2K_1%
12
C44
.1UF
12
G
D
S
Q19
SI2302DS
2
13
R235
2K_1%
12
C54 @18PF
JP7
LCD CONN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
C220
.1UF
12
C41
.1UF
12
C52
.1UF
12
C164
.1UF
C46
.1UF
12
C206
.1UF
12
C37
.1UF
12
C172
10UF_10V_1206
12
U15B
VCH
M11
P10
N10
M10
P9
M9
P8
P7
N7
M7
P6
N6
M8
N8
N11
P12
P11
N12
P13
D13
D12
E13
E12
F12
C13
B13
F13
E14
M12
D14
C12
C14
B14
N9
A1
A14
B1
C4
G10
F10
D11
E5
E6
E7
E9
E10
F5
F6
F7
F8
F9
G5
G6
G7
G8
G9
H6
H7
H8
H9
H10
J5
J6
J7
J8
J9
J10
K5
K6
K7
K9
K10
K8
L4
N14
P1
P14
H5
DVODATA0
DVODATA1
DVODATA2
DVODATA3
DVODATA4
DVODATA5
DVODATA6
DVODATA7
DVODATA8
DVODATA9
DVODATA10
DVODATA11
DVOCLKIN0
DVOCLKIN1
DVOBLK
DVOCLKOUT
DVOHSYNC
DVOVSYNC
LCDVREF
GMBSDA
GMBSCL
GPIO5
GPIO4
GPIO6
GPIO3
GPIO2
GPIO8
GPIO7
OSC
PCIRST
GPIO0
GPIO1
TESTIN
DVOrZCOM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R11
100K_0402
12
C165
10UF_10V_1206
12
R10
150K
12
R16
100K_0402
12
22K
22K
E
B
CQ18
DTC124EK
2
13
R175
470
12
L10
FBM-11-451616-800A
1 2
R34 36.5_1%
1 2
C47
.1UF
12
C38
.1UF
12
C16
.01UF
12
C197
.1UF
12
C45
.1UF
12
C53
.1UF
12
C201
10UF_10V_1206
12
R184 150
1 2R185 150
1 2
C42
.1UF
12
C176
.1UF
12
R420
6.8K_0402
12
U15A
VCH
E3
E2
E1
F3
F2
F1
G3
G2
G1
H3
H2
H1
J3
J2
J1
K3
K2
K1
L3
L2
L1
M3
M2
M1
N1
N2
P2
N3
P3
M4
N4
P4
M5
N5
P5
M6
C1
B2
D2
D3
A2
A13
C9
D4
D6
D9
E4
F11
G4
H4
J4
K4
L6
C6
L10
C10
C7
L11
C11
C8
G14
G13
G12
F14
J13
J12
H14
H13
H12
J14
K14
K13
K12
L14
L13
L12
M14
M13
A3
B3
A4
B4
A5
B5
A7
B7
A6
B6
A8
B8
A9
B9
A10
B10
A11
B11
A12
B12
D8
D7
C2
C3
D1
D5
D10
E8
C5
E11
G11
F4
H11
J11
K11
L5
L7
L8
L9
N13
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35
FLM
LP
DE
SHFCLK
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
VCC3.3
PLL_VCC
LVDSPLL_VCC
DC_CKT_CKT
PLL_VSS
LVDSPLL_VSS
DC_CKT_VSS
DVOrVSYNC
DVOrHSYNC
DVOrBLANK#
DVOrCLKIN
DVOrCLKOUT0
DVOrCLKOUT1
DVOrDATA0
DVOrDATA1
DVOrDATA2
DVOrDATA3
DVOrDATA4
DVOrDATA5
DVOrDATA6
DVOrDATA7
DVOrDATA8
DVOrDATA9
DVOrDATA10
DVOrDATA11
YA0P
YA0M
YA1P
YA1M
YA2P
YA2M
YA3P
YA3M
CLKAP
CLKAM
YB0P
YB0M
YB1P
YB1M
YB2P
YB2M
YB3P
YB3M
CLKBP
CLKBM
VREF_HI
VREF_LO
ENABKL
ENAVDD
ENEXBUF
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
R36 @33_0402
1 2
R421
6.8K_0402
12
R48
33_0402
1 2
R377 2.4K
1 2
C29 .1UF
12
C28 .1UF
12
Q24
FDS4435
3 6
5
7
8
2
4
1
ENABKL <13,23>
GMBSCL <7>
GMBSDA <7>
DISPOFF#<13>
DVO_CLKOUT<7>
CLK_OSC_VCH <11>
PCIRST# <7,14,19,21,29>
DVO_CLK<7> DVO_CLK#<7>
DVO_HSYNC<7>
DVO_BL#<7>
DVO_VSYNC<7>
DVO_D[0..11]<7>
LTVCL<7> LTVDA<7>
SMB_EC_DA1<4,22,23,31>
SMB_EC_CK1<4,22,23,31>
VCH_VID[0..4] <4>
M_SEN# <13>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDC_MONID0
CRT CONN.
DISPLAY CACHE INTERFACE DSCACHE#
0
1
Display cache exist
Display cache no exist
Status
SI2301DS: P CHANNEL
VGS: -4.5V, RDS: 130 mOHM
VGS: -2.5V, RDS: 190mOHM
Id(MAX): 2.3A
VGS(MAX): +-8V
D
GS
1
23
SI2301DS
G
DS
888L2 Main Board 2.0
CRT CONN
Compal Electronics, Inc.
13 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
CRTB
VGA_LMA[0..11]
VGA_LMD[0..31]
VGA_LDQM[0..3]
VGA_LDQM0
VGA_LMA6
VGA_LMA7
VGA_LTCLK0
VGA_LMD3
VGA_LMD2
VGA_LMD1
VGA_LMD0VGA_LMD7
VGA_LMD5
VGA_LMD6
VGA_LMD4
VGA_LMA5
VGA_LMA4
CRTR
M_SEN#
CRTG
VGA_LTCLK1
VGA_LDQM1
VGA_LMD9
VGA_LMD8
VGA_LMD10
VGA_LMD11
VGA_LMD15
VGA_LMD12
VGA_LMD14
VGA_LMD13
VGA_LMD16
VGA_LMD17
VGA_LMD18
VGA_LMD19
VGA_LDQM2
VGA_LMD20
VGA_LMD21
VGA_LMD22
VGA_LMD23
VGA_LDQM3
VGA_LMD24
VGA_LMD25
VGA_LMD26
VGA_LMD27
VGA_LMA1
VGA_LMA0
VGA_LMA2
VGA_LMA3
VGA_LCS#
VGA_LMA8
VGA_LMA9
VGA_LMA10
VGA_LMA11
VGA_LCAS#
VGA_LCKE
VGA_LWE#
VGA_LRAS#
VGA_LFSEL
VGA_LMD28
VGA_LMD29
VGA_LMD30
VGA_LMD31
DSCACHE#
+3VS +3VS
+CPU_IO +3VS +3VS
CRTVCC
CRTVCC
+1_8VS
+3VS
CRTVCC
CRTVCC
+5VS CRTVCC
U35
74AHCT1G125GW
2 4
1
3
5
C503
.1UF
12
C59 .1UF
1 2 C60 .1UF
1 2
D9
RB751V
21
R433 10K_0402
1 2
C231
.1UF
12
Q62
SI2301DS
2
1 3
D2 @DAN217
1
2
3
R5
75
12
D3 @DAN217
1
2
3
C3
18PF
12
L35 FBM-11-160808-121
1 2
C160
27PF
12
C8
100PF
12
C162
.1UF
12
D1 @DAN217
1
2
3
G
D
S
Q15
2N7002
2
1 3
R6
75
12
L36
FBM-11-160808-121
1 2
C5
18PF
12
C2
100PF
12
G
D
S
Q1
2N7002
2
1 3
R170
4.7K_0402
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C161
27PF
12
C6
18PF
12
R167
4.7K_0402
1 2
R3
0_0402
12
L7
FCM2012C-800(0805)
1 2
JP4
CRT CONN.
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
JP9
CONN 2X40
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72
73 74
75 76
77 78
79 80
1 2
3 4
5 6
7 8
9 10
GND GND
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
GND GND
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
GND GND
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
GND GND
71 72
73 74
75 76
77 78
79 80
C4
100PF
12
C7
100PF
12
L8
FCM2012C-800(0805)
1 2
R179
4.7K_0402
12
R172
2K_0402
1 2
R2
2K_0402
12
L6
FCM2012C-800(0805)
1 2
R4
75
12
R251 10_0402
1 2 C243 10PF
1 2
R250 10_0402
1 2 C242 10PF
1 2
D16
RB751V
21
U34
74AHCT1G125GW
2 4
1
3
5
R324
0_0402
1 2
R423
10K_0402
1 2
R422
10K_0402
1 2
R416 100_0402
1 2
M_SEN#<12>
VGA_LMD[0..31]<7> VGA_LMA[0..11]<7>
VGA_LDQM[0..3]<7>
VGA_LTCLK0 <7>
BKOFF#<22> DISPOFF# <12>
ENABKL<12,23>
VGA_LTCLK1 <7>
VGA_LCS# <7>
VGA_LCAS# <7>
VGA_LCKE <7>
VGA_LFSEL <7,8>
VGA_LWE# <7>
VGA_LRAS# <7>
GTL_PRDY# <4>
ITP_TDO <4>
ITP_TRST# <4>
ITP_PREQ# <4>
ITP_TDI <4>
ITP_TMS<4> ITP_TCK<4>
CPURST#<4,7>
VR_POK <30>
ITP_VR_POK <25>
DSCACHE# <15>
CRT_VSYNC<7>
CRT_HSYNC<7>
3VDDCCL <7>
3VDDCDA <7>
CRT_B<7>
DDC2_MONID2
CRT_G<7>
CRT_R<7>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
(FW82801BAM)
PME# has internal PU
ICH-2M
GNTA# Strapping for "A16 swap override" : "0" -> Enable
FWH
ATA Mode
ATA33
ATA66
Default None; Driver side
detection
Stuff
RX
RY
RY1
RX1
RY2
RX2
PIN N3, M4 can not use GPIO.
11: SigmaTel ST9700
01: AD1881A
888L2 Main Board 2.0
ICH2-m-A (FW82801BAM) & FWH
Compal Electronics,Inc.
14 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
AD1
PIRQD#
AD7
HL10
HL5
AD24
HL7
REQ#1
AD30
PIRQA#
AD23 HL8
HL1
+ICH_HLCOMP
HL2
BD_ID0
+HUBREF_ICH
HL[0..10]
A20M#
AD4
AD0
AD13
HL_STB#
REQ#4
AD14
AD2
REQ#0
REQ#2
AD29
HL0
REQ#3
AD27
GNT#3
REQA#
AD15
INIT#
HL9
PIRQC#
AD16
GNT#4
AD17
AD19
AD31
AD8
AD20
CPU_PWRGD
HL3
GATEA20
HL_STB
BD_ID1
INTR
HL4
GNT#0
AD25
STPCLK#
AD12
GNT#2
SIRQ
AD10
AD28
FERR#
AD22
AD11
AD[0..31]
AD9
NMI
AD21
GPI2
GNTA#
AD6 SMI#
GPI5
IGNNE#
PIRQB#
AD18
KBRST#
AD3
HL6
AD26
AD5
GNT#1
FWH_IC
+VPP_R
LAD1
FWH_GPI4
IDE_SATA66DET
LAD2
LFRAME#
PCIRST#
FWH_GPI2
FWP#
LAD3
LAD0
CLK_PCI_FWH
IDE_PATA66DET
FWH_GPI3
TBL#
IDE_PATA66DET
IDE_SATA66DET
HL11
GPI2
BD_ID1
GPI5
BD_ID0
BD_ID0
BD_ID1
+3VS
+CPU_IO
+3VS
+3VS
+1_8VS
+3VS
+1_8VS
+3VS
+3VS +3VS
+3VS
+3VS
+1_8VS
+3VS
R384 0_0402
1 2
R349 8.2K_0402
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
R338 10K_04021 2
R345 8.2K_04021 2
R115 36.5_1%
1 2
C121
.01UF
12
R354 @0_0402
12
R339 10K_04021 2
C122
.1UF
1 2
C457
@22PF
1 2
R348
@1K_0402
12
R361 @33_0402
1 2
R352 8.2K_04021 2
R113
300_1%
12
R350 @0_0402
12
R356 @0_0402
1 2
R355 8.2K_0402
1 2
R114
300_1%
12
R227 @4.7K_0402
1 2
R199 @0_04021 2
C190
@.1UF
12
C189
@.1UF
12
R220 @0_04021 2
R236
@1.5K
12
R224 @0_04021 2
R218 @4.7K_0402
1 2
RP25
@8P4R-10K
18 27 36 45
R222
@10K_0402
12
R202 @33_0402
12
C
B
E
Q29 @3904
1
2
3
R203
@10K_0402
12
C191
.1UF
12
C177 @22PF
1 2
U19
@FWH-PLCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
VPP
RST#
FGPI3
FGPI2
FGPI1
FGPI0
WP#
TBL#
ID3
ID2
ID1
ID0
FWH0
FWH1
FWH2
GND
FWH3
RFU18
RFU19
RFU20
RFU21
RFU22
FWH4
INIT#
VCC
GND
VCCA
GNDA
IC
FGPI4
CLK
VCC
R211
@10K_0402
1 2
C207
.1UF
12
C218
.1UF
12
C211
.1UF
12
R213
@10K_0402
1 2
R216
@10K_0402
1 2
R208
@10K_0402
1 2
PCI
CPU
HUB
IRQ
U10A
ICH-2M
AA4
AB4
Y4
W5
W4
Y5
AB3
AA5
AB5
Y3
W6
W3
Y6
Y2
AA6
Y1
V2
AA8
V1
AB8
U4
W9
U3
Y9
U2
AB9
U1
W10
T4
Y10
T3
AA10
AA3
AB6
Y8
AA9
AB7
V3
W8
V4
W1
W2
AA15
AA7
W7
Y7
Y15
M3
L2
W11
R2
R3
T1
AB10
P4
L3
M2
M1
R4
T2
R1
L4
N3
N2
N1
M4
F21
C16
N20
P22
N19
N21
P1
P2
P3
N4
A4
B5
A5
B6
B7
A8
B8
A9
C8
C6
C7
C5
A6
A7
A3
B4
D11
A12
R22
A11
C12
C11
B11
B12
C10
B13
C13
A13
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PCIRST#
PLOCK#
SERR#
PERR#
PME#
GPIO0/REQA#
GPIO16/GNTA#
PCICLK
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
GPIO1/REQB#/REQ5#
GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
GPIO17/GNTB#/GNT5#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
IRQ14
IRQ15
APICCLK
APICD0
APICD1
SERIRQ
PIRQA#
PIRQB#
PIRQC#
PIRQD#
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HL11
HL_STB
HL_STB#
HLCOMP
HUBREF
A20M#
CPUSLP#
FERR#
IGNNE#
INIT#
INTR
NMI
SMI#
STPCLK#
RCIN#
A20GATE
CPUPWRGD
R340 @10K_04021 2
R415 @10K_0402
1 2
R413 @10K_0402
1 2
R353 0_0402
1 2 C454 10PF
1 2
RP36
8P4R-100K
1 8
2 7
3 6
4 5
HL[0..10] <7>
FERR# <4>
GNT#0 <16>
PICD1 <4>
C/BE#1<19,29>
FRAME#<16,19,29>
GNT#3 <16,19>
REQA#
AD[0..31]<19,29>
REQ#0<16>
NMI <4>
PIRQA# <16,19>
IGNNE# <4>
PIRQB# <16,29>
GNT#1 <16,29>
SMI# <4>
PLOCK#<16,19>
STOP#<16,19,29>
GATEA20 <22>
A20M# <4>
GNT#2 <16,29>
C/BE#2<19,29>
HL_STB <7>
SIRQ <16,19,21>
MODRST# <17>
IRDY#<16,19,29>
REQ#1<16,29>
IRQ14 <17>
IRQ15 <17>
CLK_PCI_ICH<11>
INIT# <4>
REQ#2<16,29>
PICD0 <4>
REQ#4<16>
STPCLK# <4>
PIRQD# <16,29>
SERR#<16,19,29>
KBRST# <22>
PAR<19,29>
C/BE#0<19,29>
GNT#4 <16>
CLK_APIC_ICH <11>
C/BE#3<19,29>
INTR <4>
HL_STB# <7>
GNTA#
TRDY#<16,19,29>
PIRQC# <16,19>
REQ#3<16,19>
PCIRST#<7,12,19,21,29>
DEVSEL#<16,19,29>
FWH_WPTBL#<15>
PCIRST#<7,12,19,21,29>
LAD3<15,21>
LAD2<15,21>
LAD1<15,21>
CLK_PCI_FWH <11>
LAD0<15,21>
INIT# <4>
LFRAME# <15,21>
PERR#<16,19,29>
CPU_PWRGD <4>
MPCIACT#<29>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AC_SDOUT Strapping: "1" -> Safe Mode Boot
SPKR Strapping: "0" -> No Reboot
CLOSE TO ICH2-M(< 1 inch)
SMLINK0
SMLINK1
Placement close to ICH2-M (U10)
Modify on ST 11/3/2000
888L2 Main Board 2.0
ICH2-m-B (FW82801BAM)
Compal Electronics,Inc.
15 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
SDD[0..15]
+R_VBAIS
SPKR
SDATA_IN1
SDATA_IN0
PDD[0..15]
LDRQ#0
SDD8
SDD9
PDD12
USBP0+
SDATA_IN1
LID_OUT#
PDD0
PDD1
PDD4
PDDACK#
+RTCRST#
USBP1-
USBP0-
SDA1
RSMRST#
LAD3
LFRAME#
USBP0+
SDD12
SDA0
PDD13
PDDREQ
LDRQ1#
USBP2+
SLP_S5#
LAD1
SDD0
SDD4
SDIOW#
PDD3
PDD8
PDD15
PDIOW#
PDCS1#
USBP2-
LAD2
SDD5
SDD10
SDD11
SDDREQ
SDIOR#
PDD5
PDD9
PDD14
SDATA_IN0
SPKR
SDIORDY
SDCS1#
PDCS3#
DSCACHE#
PDIORDY
USBP3+
SLP_S3#
RTCX1
IAC_BITCLK
SDD1
SDD13
USBP3-
RTCX2
SDD7
SDDACK#
SDCS3#
PDA1
OVCUR#3
SLP_S1#
SYS_PWROK
USBP1+
USBP3+
USBP3-
USBP2+
USBP2-
SDD6
SDA2
PDD6
PDD10
PDD11
PDA0
PDA2
USBP0-
THRM#
+VBIAS
SDD2
SDD3
SDD14
SDD15
PDD2
PDIOR#
LAD0
PDD7
USBP1+
USBP1-
DSCACHE#
IAC_BITCLK
LID_OUT#
ICH_AC_SYNC
ICH_AC_SDOUT
ICH_AC_SDOUT
ICH_AC_SYNC
+3V
+3VS
+RTCVCC
+3VALW
+RTCVCC
+3VS
+3VALW
+3VS
+3VS
R161
15K
1 2
R286
1K_0402
1 2
C146
12PF
12
C147
12PF
12
C149
1UF
12
R364 0_04021 2
R151
10K_0402
1 2
R163
10M
1 2
R162
1K_0402
1 2
R160 10K_0402
1 2
R156
10M
1 2
R158 @10K_0402
1 2
X1
32.768KHZ
J5
JOPEN
12
R359 0_0402
1 2
R360 10K_0402
1 2
R147 10K_0402
1 2
R140 0_0402
1 2
R143 @10K_04021 2
C453
@10PF
12
C455
@10PF
12
C456
@10PF
12
RP19
8P4R-15
1 8
2 7
3 6
4 5
RP20
8P4R-15K
18 27 36 45
R117 0_04021 2
R155 10K_0402
1 2
R153 10K_0402
1 2
R368 10K_0402
1 2
R141 @1K_0402
1 2
R366 10K_0402
1 2
CP7
8P4C-33PF
1 8
2 7
3 6
4 5
RP22
8P4R-15K
18 27 36
45
R344
@33_0402
12
R358
@33_0402
12
R357
@33_0402
12
R363
10K_0402
12
R365 10K_0402
1 2
C153
.047UF
1 2
R369 @10K_0402
1 2
IDE
SYSTEM
AC97
GPIO
LPC
USB
U10B
ICH-2M
AA13
D14
W16
AB18
R20
W21
AA17
R21
W15
AA18
Y11
A15
C14
V21
AA16
AB16
AB17
Y17
T20
T21
U22
T22
D4
M19
P20
V22
P19
R19
P21
Y22
W22
N22
Y14
AA11
W14
AB15
L1
AB14
AA14
Y12
W12
AB13
AB12
Y13
W13
AB11
AA12
AB19
AA19
W17
Y18
Y20
W19
AB20
AA20
W18
Y19
W20
Y21
D18
B19
D19
A20
C20
C21
D22
E20
D21
C22
D20
B20
C19
A19
C18
A18
B18
B17
D17
C17
A17
A16
D16
B16
C15
D15
H19
H22
J19
J22
K21
L20
M21
M22
L22
L21
K22
K20
J21
J20
H21
H20
G22
F22
G19
G21
G20
F20
F19
E22
E21
E19
U20
B14
A14
B15
T19
U19
V20
THRM#
SLP_S1#
SLP_S3#
SLP_S5#
PWROK
PWRBTN#
RI#
RSMRST#
GPIO25
SUSCLK
AGPBUSY#
STP_PCI#
STP_CPU#
CLKRUN#
SMBDATA
SMBCLK
SMBALERT#/GPIO11
SUSSTAT#
RTCRST#
VBIAS
RTCX1
RTCX2
CLK66
CLK14
CLK48
AC_RST#
AC_SYNC
AC_BIT_CLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
SPKR
GPIO8
GPIO7
GPIO12
GPIO13
C3_STAT#/GPIO21
GPIO27
GPIO28
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ0#
LDRQ1#
LFRAME#/FWH4
FSO
USBP1+
USBP1-
USBP0+
USBP0-
OC1#
OC0#
USBP3+
USBP3-
USBP2+
USBP2-
OC3#
OC2#
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY
SDA0
SDA1
SDA2
SDCS1#
SDCS3#
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY
PDA0
PDA1
PDA2
PDCS1#
PDCS3#
BATLOW#
CPUPERF#
SSMUXSEL#
VGATE/VRMPWRGD
INTRUDER#
SMLINK0
SMLINK1
R427 22_0402
1 2
R127 10K_0402
1 2
R428 22_0402
1 2
C486
27PF
12
C485
27PF
12
C152 5PF
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C151 5PF
1 2
THRM#<22>
IAC_BITCLK<27,29>
SDATA_IN0<27>
RTCCLK<19,20>
SLP_S3#<22> SLP_S5#<22>
SLP_S1#<11,22>
CLK_HUB_ICH <11>
SDD[0..15] <17>
SDIORDY <17>
SDIOW# <17>
SDIOR# <17>
SDDACK# <17>
SDDREQ <17>
PDIOW# <17>
PDIORDY <17>
PDIOR# <17>
PDDACK# <17>
PDDREQ <17>
LAD1<14,21> LAD0<14,21>
LFRAME#<14,21>
LDRQ#0<21> LAD3<14,21> LAD2<14,21>
SMB_ICH_DAT<11>
PCI_STP#<11> CPU_STP#<11> CLKRUN#<16,19,21,29>
V_GATE <30>
AGP_BUSY#<9>
IST_CPU_PERF# <5>
VR_HI/LO# <4,30>
SYS_PWROK<16,25>
SCI#<22>
PIDERST#<17>SEL_DIMM0<11>
PDA0 <17>
PDA1 <17>
PDA2 <17>
SDA0 <17>
SDA1 <17>
SDA2 <17>
BATTLOW# <23>
SWI#<23>
LID_OUT#<23>
FWH_WPTBL#<14>
PWRBTN_OUT#<23>
SDATA_IN1<29> SPKR<28>
USB0_D- <18>
USB0_D+ <18>
USB2_D- <18>
USB2_D+ <18>
AC97_RST#<27,29> PDD[0..15] <17>
CLK_USB_ICH <11>
CLK_14M_ICH <11>
SEL_DIMM1<11>
RSMRST#<25>
OVCUR#2<18>
PDCS1# <17>
PDCS3# <17>
OVCUR#1<16>
SDCS3# <17>
SDCS1# <17>
OVCUR#0<18>
SMB_ICH_CLK<11>
SUS_STAT#<21>
EC_SMI#<21,22>
ACIN<22,31>
DSCACHE#<13>
IAC_SDATAO<27,29>
IAC_SYNC<27,29>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI
888L2 Main Board 2.0
ICH2-m-C (FW82801BAM)
Compal Electronics,Inc.
16 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
REQ#3
REQ#1
REQ#2
REQ#0
GNT#2
GNT#0
GNT#1
GNT#3
+VCC5REF
+3VS
+1_8VS
+1_8VALW +3VALW +CPU_IO
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+RTCVCC
+3VALW
+CPU_IO
+3VS
+3VS
+1_8VS
+1_8VS
+5VS
+3VALW
+1_8VALW
+3VS
+1_8VALW
+3VALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
+C466
4.7UF_10V_0805
12
C443
1000PF
12
C448
.1UF
12
C447
.1UF
12
C446
.1UF
12
C462
.1UF
12
C463
.1UF
12
RP37
10P8R-8.2K
10
9
8
7
6
1
2
3
4
5
R148 10K_0402
1 2
C458
.1UF
12
C470
.1UF
12
RP18
10P8R-8.2K
10
9
8
7
6
1
2
3
4
5
RP21
10P8R-8.2K
10
9
8
7
6
1
2
3
4
5D4
1SS355
21
+
C135
10UF_10V_1206
12
C139
1000PF
12
C467
10UF_10V_1206
12
C450
1000PF
12
C116
.1UF
12
C461
.1UF
12
C452
.1UF
12
R146
0_0402
1 2
R118
1K_0402
12
C460
.1UF
12
C465
.1UF
12
C464
.1UF
12
C125
1UF
12
C449
1000PF
12
C134
.1UF
12
R145 0_0402
1 2
R367 0_0402
1 2
R1591K_0402
1 2
C150 .1UF
1 2
EEPROM
LAN
U10C
ICH-2M
D10
E5
K19
L19
P5
V9
A1
A2
A10
B1
B2
B3
B9
B10
C2
C3
C4
C9
D5
D6
D7
D8
D9
E6
E7
E8
E9
J10
J11
J12
J13
J14
J9
K10
K11
K12
K13
K14
K9
L10
L11
L12
L13
L14
L9
M10
M11
M12
M13
M14
M9
N10
N11
N12
P9
P14
P13
P12
P11
P10
N9
N14
N13
E14
E15
E16
E17
E18
F18
G18
H18
J18
P18
R18
R5
T5
U5
V5
V6
V7
V8
V14
V15
V16
T18
U18
H5
J5
F5
G5
D2
U21
K2
M20
V19
V17
V18
D12
D13
J3
K3
J4
K4
G3
G2
G1
H1
F3
F2
F1
H2
Y16
A21
A22
B21
B22
AA1
AA2
AA21
AA22
AB1
AB2
AB21
AB22
K1
D3
VCC1_8_1
VCC1_8_2
VCC1_8_3
VCC1_8_4
VCC1_8_5
VCC1_8_6
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCCSUS1_8_1
VCCSUS1_8_2
VCCSUS1_8_3
VCCSUS3_3_1
VCCSUS3_3_2
VCCLAN1_8_1
VCCLAN1_8_2
VCCLAN3_3_1
VCCLAN3_3_2
VCC1_8_7
VCCRTC
V5REF1
V5REF2
V5REF_SUS
VCCSUS3_3_3
VCCSUS3_3_4
V_CPU_IO_1
V_CPU_IO_2
EE_SHCLK
EE_DIN
EE_DOUT
EE_CS
LAN_CLK
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
LAN_RSTSYNC
LAN_PWROK
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
C115
.1UF
12
C459
.1UF
12
R347 @10K_0402
1 2
REQ#0<14> REQ#1<14,29> REQ#2<14,29> REQ#3<14,19>
REQ#4 <14>
GNT#0 <14>
GNT#1 <14,29>
GNT#2 <14,29>
GNT#3 <14,19>
GNT#4 <14>
SYS_PWROK <15,25>
LAN_TXD0 <29>
LAN_TXD1 <29>
LAN_TXD2 <29>
LAN_PHYRST <29>
LAN_RXD1 <29>
LAN_RXD0 <29>
LAN_PHYCLK <29>
LAN_RXD2 <29>
LAN_EECS <29>
LAN_EEDO <29>
LAN_EEDI <29>
OVCUR#1<15>
LAN_EECLK <29>
CLKRUN# <15,19,21,29>
SERR#<14,19,29>
DEVSEL#<14,19,29> PIRQC# <14,19>
PLOCK# <14,19>
PERR#<14,19,29>
TRDY#<14,19,29> IRDY#<14,19,29>
PIRQB# <14,29>STOP#<14,19,29> PIRQA# <14,19>
PIRQD# <14,29>
FRAME#<14,19,29> SIRQ <14,19,21>
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
IDE,CD-ROM & FDD Module CONN.
SECOND MODULE CAP.
HDD CAP.
CDROM/DVD CAP.
HDD
CDROM/DVD
MODULE
MASTER
ATA66S/PDIAG#
FDD/CDROM/DVD
SI3456DV: N CHANNEL
VGS: 4.5V, RDS: 65 mOHM
Id(MAX): 5.1A
888L2 Main Board 2.0
IDE/FDD MODULE
Compal Electronics, Inc.
17 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
WRDATA# STEP#
MTR0#
DISKCHG#
INDEX#
WRPRT#
TRK0#
DIR#
H1SEL#
WGATE#
DRV0#
PIDERST#
SDD10
SDD9
MODRST#
SDD11
SDD13
SDD7
SDD12
SDD14
SDD8
SDD15
SDIOW#
RIRQ15
SIDEACT#
SDA1
SDIORDY
SDA0
SDCS1#
SDDACK#
CD_PDIAG
PDIORDY
SDDREQ
PDA1
PDD12
PDA2PDA0
PDD14
PDD13
PDIOR#
PDIOW#
PDD5 PDD9
PDCS1#
PDDREQ
PDD0
RIRQ14
PDIORDY PCSEL
RPDDACK#
PDCS3#
PDD8PDD7
PDD6
PDD4
PDD3
PDD2
PDD1
PDD10
PDD11
PDD15
ATA66P/PDIAG
PDD[0..15]
SDD[0..15]
SDD4
SDD3
SDD2
SDD1
SDD0
SDD5
SDD6
SDDREQ
SDIOR#
ATA66P/PDIAG
SDA2
SDCS3#
RIRQ15
SDD1
SDD4
RSDDACK#
RDATA#
SIDEACT#
SDD5
MODRST#
DRV0#
IDE_CSEL_S
WRDATA#
SDD2
SDD6
MOD_CD_R
DISKCHG#
SDD14
SDD11
WRPRT#
SDD10
SDD8
WGATE#
SDD15
SDD9
SDDREQ
SDD13
SDD12
SDD0
MOD_CD_L
SDD7
SDD3
H1SEL#
MTR0#
STEP#
SDIORDY
DIR#
TRK0#
MODPRES#
RDATA#
SDDACK# RSDDACK#
PDDACK# RPDDACK#
RIRQ14IRQ14
IRQ15 RIRQ15
PDDREQ
SDIORDY
ACTLED#
HDD_LED#
SIDEACT#
HDD_LED#
DRV0#
IDE_CSEL_M# IDE_CSEL_S
SDD7
PDD7
IDE_CSEL_M#
+12VALW
+5VS +5VSMOD
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+5VSMOD
+5VS
+5VS
+5VSMOD
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+3VALW
+5VS +5VS
U29D
74LVC14
9 8
14
G
D
SQ44
2N7002
2
13
R335
10K_0402
1 2
R336
10K_0402
1 2
R337 470
1 2
R334 470
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C440
.1UF
12
R133 @10K_0402
1 2
R351 1K_0402
1 2
R362 470
1 2
R132 @5.6K_0402
1 2
JP8
HEADER 2X25
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
C444
.1UF
12
RP17
10P8R-1K
10
9
8
7
6
1
2
3
4
5
C49
.1UF
12
R31 0
1 2
JP11
COMBO-60P
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
JP13
HDD 44P
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
C441
4.7UF_10V_0805
12
C442
10UF_10V_1206
12
C43
10UF_10V_1206
12
RP16
8P4R-1K
1 8
2 7
3 6
4 5
R130 1K_0402
12
R150 @10K_0402
12
R149 @5.6K_0402
1 2
R129 22_0402
1 2
R142 22_0402
1 2
R144 22_0402
1 2
R131 22_0402
1 2
R173 470
1 2
R346
100K_0402
12
R342
100K_0402
1 2
R343
100K_0402
1 2
47K
10K C
B
EQ43
DTA114YKA
2
31
U30
TC7S08F
1
24
53
D14
RB717F
1
23
G
D
S
Q41
2N7002
2
13
G
D
S
Q42
2N7002
2
13
C117 33PF
1 2
Q40
SI3456DV
3
6
5
24
1
R341
100K_0402
12
C445
.01UF
12
C143 33PF
1 2 C502
22UF_10V_1206
12
PDDREQ<15>
PDIORDY<15>
PDCS3# <15>
PDA2 <15>
PDD[0..15]<15>
H1SEL#<21>
WRPRT#<21>
RDATA#<21>
SDIOW#<15>
WRDATA#<21> INDEX#<21>
MODPRES#<23> 1.6M_EN#<21>
SDA2<15>
SDIOR#<15>
DISKCHG#<21>
SDCS3#<15>
SDCS1#<15>
SDD[0..15]<15>
WGATE# <21>
CD/FDD# <23>
SDA0 <15>
MTR0# <21>
STEP# <21>
SDIORDY <15>
SDDREQ <15>
INT_CD_L<27> INT_CD_R <27>
INT_CD_GND<27>
TRK0#<21> DIR# <21>
DRV0# <21>
SDA1 <15>
SDDACK#<15>
IRQ14<14>
IRQ15<14>
ACTLED <18>
MODRST# <14>
MOD_CD_R<27> MOD_CD_L <27>
INT_CD_GND <27>
MODEN#<22>
PDIOW#<15> PDIOR#<15>
PDA1<15> PDA0<15>
PDCS1#<15>
PDDACK#<15>
PIDERST#<15>
SIDE_CS_M#/S<22>
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
USB&LED INTERFACE
888L2 Main Board 2.0
USB & FRONT PANEL I/F
Compal Electronics, Inc.
18 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
GND_USBA GND_USBB
USB2_DD-
USB2_DD+
USB0_DD-
USB0_DD+
PWR_LED
PWR_LED
USB_AUSB_AS USB_B USB_BS
+3VALW
+3VALW
+3VS
VDDA
+5VS +5V
+5VS
USB_AS USB_BS
+3VS
M5
PDH
C295D147
1
PAD18
2.2x3 PAD
PAD17
2.2x3 PAD
PAD22
2.2x3 PAD
PAD21
2.2x3 PAD
PAD20
2.2x3 PAD
PAD19
2.2x3 PAD
PAD25
2.2x3 PAD
PAD16
2.2x3 PAD
PAD23
2.2x3 PAD
PAD24
2.2x3 PAD
PAD28
2.2x3 PAD
PAD31
2.2x3 PAD
PAD27
2.2x3 PAD
PAD26
2.2x3 PAD
M8
PDH
T394B295D128
1
PAD30
2.2x3 PAD
PAD32
2.2x3 PAD
PAD8
2.2x3 PAD
PAD29
2.2x3 PAD
PAD11
2.2x3 PAD
PAD13
2.2x3 PAD
PAD9
2.2x3 PAD
PAD10
2.2x3 PAD
M11
PDH
C236D118
1
PAD33
CLIP
SMD87X134
PAD14
2.2x3 PAD
PAD15
2.2x3 PAD
PAD12
2.2x3 PAD
PAD35
CLIP
SMD87X134
PAD36
CLIP
SMD87X134
PAD34
CLIP
SMD87X134
PAD37
CLIP
SMD87X134
PAD6
2.2x3 PAD
PAD2
2.2x3 PAD
R389 47K_0402
1 2
R388 47K_0402
1 2
PAD3
2.2x3 PAD
PAD7
2.2x3 PAD
PAD5
2.2x3 PAD
PAD4
2.2x3 PAD
PAD1
2.2x3 PAD
CFD9
FIDUCIAL
1
CFD5
FIDUCIAL
1
CFD8
FIDUCIAL
1
CFD2
FIDUCIAL
1
CFD13
FIDUCIAL
1
CFD3
FIDUCIAL
1
CFD1
FIDUCIAL
1
GND10
PDH
SMD197X225
1
CFD11
FIDUCIAL
1
CFD4
FIDUCIAL
1
CFD14
FIDUCIAL
1
CFD6
FIDUCIAL
1
FD5
FIDUCIAL
1
CFD12
FIDUCIAL
1
CFD7
FIDUCIAL
1
CFD10
FIDUCIAL
1
M23
STDF_SUPPORT_VGA_CACHE
C315D177
1
FD4
FIDUCIAL
1
FD1
FIDUCIAL
1
FD6
FIDUCIAL
1
FD2
FIDUCIAL
1
FD3
FIDUCIAL
1
GND5
PDH
SMD197X225
1
GND7
PDH
SMD197X197
1
GND6
PDH
SMD197X197
1
GND9
PDH
SMD197X197
1
GND8
PDH
SMD197X197
1
M22
NON-PDH
O177X98D177X98N
1
M21
NON-PDH
O177X98D177X98N
1
M2
PDH
C276D169
1
PAD38
5x5 PAD
SMD197X197
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
R140 1 2
L13
FBM-11-451616-800A
12
M7
PDH
C276D169
1
M3
PDH
C276D169
1
L12
FBM-11-451616-800A
12
+
C170
150UF_E_10V
L11
FBM-11-451616-800A
1 2
C20
.1UF
12
R120 1 2R130 1 2 R150 1 2
M10
STANDOFF_SUPPORT_KB
C315D177
1
M6
PDH
C276D169
1
C15
.1UF
12
C18
.1UF
12
C19
.1UF
12
U33
TPS2042
1
2
5
6
8
3
4
7
GND
IN
OC2#
OUT2
OC1#
EN1#
EN2#
OUT1
R174 470
1 2
47K
10K C
B
EQ20
DTA114YKA
2
31
JP6
SWITCH_CONN
12 34 56 78 910 1112 1314 1516 1718
1920 21
23
25
27
29
31
33
35
37
39
22
24
26
28
30
32
34
36
38
40
+
C9
150UF_E_10V
JP5
Molex-67300
1
2
3
4
5
6
7
8
12 10
11 9
VCC
D0-
D0+
VSS
VCC
D1-
D1+
VSS
G4 G2
G3 G1
L9
FBM-11-451616-800A
1 2 C17 22PF
1 2
C479
.1UF
12
C480
.1UF
12
R386
100K_0402
12
R385
100K_0402
12
GND11
PDH
SMDO280X118
1
M16
PDH
T394B304D128
1
CFD16
FIDUCIAL
1
CFD15
FIDUCIAL
1
GND12
PDH
SMDO280X118
1
M15
STANDOFF_SUPPORT_TB
C315D177
1
M4
PDH
C276D128
1
M9
STDF_SUPPORT_VGA_CACHE
C315D177
1
M17
NON-PDH
O211X67D211X67N
1
M18
NON-PDH
O211X67D211X67N
1
M20
NON-PDH
O211X67D211X67N
1
M19
NON-PDH
O211X67D211X67N
1
M1
PDH
C276D128
1
M12
PDH
C276D128
1
GND3
PDH
SMD197
1
GND2
PDH
SMD197
1
GND1
PDH
SMD197
1
GND4
PDH
SMD197
1
USB0_D-<15> USB0_D+<15> USB2_D- <15>
USB2_D+ <15>
INT_MIC <28>BAT1_LED#<23> BAT2_LED#<23>
ACTLED<17>
PWR_LED#<23>
CAP_LED#<22> NUM_LED#<22> SRL_LED#<22>
ON/OFFBTN <25>
KSO17 <22>
KSI0 <22,23>
KSI1 <22,23>
KSI2 <22,23>
KSI3 <22,23>
KSI4 <22,23>
KSI5 <22,23>
OVCUR#2 <15>
OVCUR#0 <15>
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CARDBUS CONTROLLER
O2
OZ6933T (TQFP)
MICRO CORP.
LEDO
IRQ11
IRQ7
888L2 Main Board 2.0
O2Micro OZ6933 Cardbus Controller
Compal Electronics, Inc.
19 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
S1_A12
S1_A8
CLK_PCI_PCM
S2_A8
S2_A12
S2_D9
S2_D1
S2_D8
S2_D0
S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A7
S2_IOWR#
S2_A9
S2_IORD#
S2_CE2#
S2_D15
S2_D13
S2_D12
S2_D11
S2_D3
AD26
AD5
AD29
AD10
AD24
AD18
AD3
AD22
AD14
AD30
AD6
AD21
AD28
AD16
AD19
AD7
AD31
AD9
AD8
AD12
AD27
AD15
AD13AD[0..31]
AD4
AD25
AD20
AD23
AD17
AD11
AD2
AD1
AD0
S1_A6
S1_A9
S1_D8
S1_A25
S1_D13
S1_D7
S1_D6
S1_D9
S1_D1
S1_A10
S1_OE#
S1_IORD#
S1_CE2#
S1_A11
S1_D5
S1_A5
S1_A4
S1_D10
S1_D12
S1_A24
S1_D0
S1_A17
S1_A0
S1_A7
S1_IOWR#
S1_A1
S1_A3
S1_D15
S1_D11
S1_D4
AD19
S1_A16
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A13
S1_A14
S1_A19
S1_A18
S1_D2
S1_D14
S2_A18
S2_D2
S2_D14
S2_A19
S2_A21
S2_A14
S2_A20
S2_A15
S2_A22
S2_A13
S2_A23 S2_A16
S2_D10
S2_A25
S2_A17
S2_D6
S2_D5
S2_A11
S2_OE#
S2_D7
S2_A10
S2_D4
S2_A24
S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]
S1_A2
S1_D3
S1_IOWR#
S1_CE2#
S1_OE#
S1_IORD#
S2_CE2#
S2_IOWR#
S2_OE#
S2_IORD#
CLK_PCI_PCM
+3VALW +3VS+3VS
+3VALW
+3VS
+3VS
S1_VCC
S2_VCC
R248 331 2
R247 331 2
R289
@33_0402
1 2
C384
@10PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C380
4.7UF_10V_0805
12
C227
.1UF
C389
.1UF
C348
.1UF
C223
.1UF
C225
.1UF
C226
.1UF
C224
.1UF
C385
.1UF
C298
.1UF
C387
.1UF
R287 100_0402
1 2
U24
OZ6933TQFP
127
6
21
37
50
79
134
180
124
122
121
120
119
116
113
111
109
107
105
103
102
100
99
83
81
80
78
77
75
74
73
71
68
67
66
65
64
63
62
59
199
197
196
195
194
191
189
187
185
183
181
178
176
175
174
158
156
155
154
153
151
150
149
148
144
142
141
140
139
138
137
135
117
98
60
112
97
82
70
93
96
95
94
92
90
84
86
108
110
89
91
88
125
106
123
69
85
76
104
61
126
114
118
192
190
202
136
179
152
161
145
198
182
201
164
167
165
186
184
162
159
166
168
170
171
172
169
147
157
173
188
143
160
200
4
5
7
8
9
10
11
12
16
17
18
19
20
22
23
24
38
39
40
41
42
43
45
46
48
49
51
52
53
54
55
56
13
25
36
47
15
1
31
27
29
30
32
35
33
34
3
2
203
204
58
207
163
208
72
128
133
193
205
206
87
132
131
130
115
146
14
26
28
44
57
101
129
177 AUX_VCC
PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC
CORE_VCC
CORE_VCC
CORE_VCC
A_D10/CAD31
A_D9/CAD30
A_D1/CAD29
A_D8/CAD28
A_D0/CAD27
A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A25/CAD19
A_A7/CAD18
A_A24/CAD17
A_A17/CAD16
A_IOWR/CAD15
A_A9/CAD14
A_IORD#/CAD13
A_A11/CAD12
A_OE#/CAD11
A_CE2#/CAD10
A_A10/CAD9
A_D15/CAD8
A_D7/CAD7
A_D13/CAD6
A_D6/CAD5
A_D12/CAD4
A_D5/CAD3
A_D11/CAD2
A_D4/CAD1
A_D3/CAD0
B_D10/CAD31
B_D9/CAD30
B_D1/CAD29
B_D8/CAD28
B_D0/CAD27
B_A0/CAD26
B_A1/CAD25
B_A2/CAD24
B_A3/CAD23
B_A4/CAD22
B_A5/CAD21
B_A6/CAD20
B_A25/CAD19
B_A7/CAD18
B_A24/CAD17
B_A17/CAD16
B_IOWR#/CAD15
B_A9/CAD14
B_IORD#/CAD13
B_A11/CAD12
B_OE#/CAD11
B_CE2#/CAD10
B_A10/CAD9
B_D15/CAD8
B_D7/CAD7
B_D13/CAD6
B_D6/CAD5
B_D12/CAD4
B_D5/CAD3
B_D11/CAD2
B_D4/CAD1
B_D3/CAD0
GRST#
A_SKT_VCC
A_SKT_VCC
A_REG#/CCBE3#
A_A12/CCBE2#
A_A8/CCBE1#
A_CE1#/CCBE0#
A_A16/CCLK
A_A23/CFRAME#
A_A15/CIRDY#
A_A22/CTRDY#
A_A21/CDEVSEL#
A_A20/CSTOP#
A_A13/CPAR
A_A14/CPERR#
A_WAIT#/CSERR#
A_INPACK#/CREQ#
A_WE#/CGNT#
A_RDY_IRQ#/CINT#
A_A19/CBLOCK#
A_WP/CCLKRUN#
A_RST/CRST#
A_R2_D2/RFU
A_R2_D14/RFU
A_R2_A18/RFU
A_VS1/CVS1
A_VS2/CVS2
A_CD1#/CCD1#
A_CD2#/CCD2#
A_BVD2/CAUDIO
A_BVD1/CSTSCHG
B_BVD1/CSTCHG
B_BVD2/CAUDIO
B_CD2#/CCD2#
B_CD1#/CCD1#
B_VS2/CVS2
B_VS1/CVS1
B_R2_A18/RFU
B_R2_D14/RFU
B_R2_D2/RFU
B_RST/CRST#
B_WP/CCLKRUN#
B_A19/CBLOCK#
B_RDY_IRQ#/CINT#
B_WE#/CGNT#
B_INPACK#/CREQ#
B_WAIT#/CSERR#
B_A14/CPERR#
B_A13/CPAR
B_A20/CSTOP#
B_A21/CDEVSEL#
B_A22/CTRDY#
B_A15/CIRDY#
B_A23/CFRAME#
B_A16/CCLK
B_CE1#/CCBE0#
B_A8/CCBE1#
B_A12/CCBE2#
B_REG#/CCBE3#
B_SKT_VCC
B_SKT_VCC
B_SKT_VCC
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C/BE3#
C/BE2#
C/BE1#
C/BE0#
IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PERR#
SERR#
PCI_REQ#
PCI_GNT#
IRQ9/INTA#
IRQ4/INTB#/A_VPP_PGM
LOCK#
RST#
IRQ12/PME#
IRQ14/CLKRUN#
IRQ15/RI_OUT#
SPKR_OUT#
LEDO#/SKTA_ACTV
IRQ11/SKTB_ACTV
IRQ5/SERIRQ#
IRQ7/SIN#/B_VPP_PGM
IRQ3/A_VCC_3#
SCLK/A_VCC_5#
SDATA/B_VCC_3#
SLATCH/SMBCLK/B_VCC_5#
IRQ9/A_VPP_VCC_PGM
IRQ10/B_VPP_VCC_PGM
GND
GND
GND
GND
GND
GND
GND
GND
C351
.1UF
C368
.1UF
C239
.1UF
C360
.1UF
AD[0..31]<14,29>
C/BE#0<14,29> C/BE#1<14,29> C/BE#2<14,29> C/BE#3<14,29>
CLK_PCI_PCM<11> DEVSEL#<14,16,29> FRAME#<14,16,29> IRDY#<14,16,29>
TRDY#<14,16,29> STOP#<14,16,29> PAR<14,29>
PERR#<14,16,29> SERR#<14,16,29> REQ#3<14,16> GNT#3<14,16> PIRQA#<14,16>
PLOCK#<14,16> PIRQC#<14,16>
PCIRST#<7,12,14,21,29>
PCM_PME#<23> CLKRUN#<15,16,21,29> PCM_RI#<24>
SIRQ<14,16,21>
S1_REG# <20>
S1_CE1# <20>
S1_WAIT# <20>
S1_INPACK# <20>
S1_WE# <20>
S1_WP <20>
S1_RST <20>
S1_VS1 <20>
S1_CD1# <20>
S1_CD2# <20>
S1_BVD2 <20>
S1_BVD1 <20>
S2_BVD1 <20>
S2_BVD2 <20>
S2_CD2# <20>
S2_CD1# <20>
S2_VS2 <20>
S2_VS1 <20>
S2_RST <20>
S2_WP <20>
S2_RDY# <20>
S2_WE# <20>
S2_INPACK# <20>
S2_WAIT# <20>
S2_CE1# <20>
S2_REG# <20>
SLDATA <20>
SLATCH <20>
S1_D[0..15] <20>
S1_A[0..25] <20>
S1_RDY# <20>
S2_D[0..15] <20>
S2_A[0..25] <20>
S1_IOWR# <20>
S1_OE# <20>
S1_CE2# <20>
S2_IOWR# <20>
S2_OE# <20>
S2_CE2# <20>
S2_IORD# <20>
PCM_SPK#<28>
S1_IORD# <20>
S1_VS2 <20>
PCMRST# <20,22>
RTCCLK <15,20>
SOCKET
PCMCIA POWER CTRL. CARDBUS
BERG62183-001T
PCMCIA CONN P154
J5
888L2 Main Board 2.0
FOXCONN Cardbus CONN .154PIN
Compal Electronics, Inc.
20 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
S1_A[0..25]
S2_VPP
S1_A23
S2_A23
S1_WP
S2_WP
S2_A23
S2_A15
S2_D6
S1_OE#
S1_D4
S1_D10
S1_D7
S1_D6
S2_D14
S1_VPP
S1_D13
S1_D11
S2_IORD#
S2_D12
S2_D11
S1_WP
S1_D8
S1_BVD1
S2_A3
S2_A24
S2_CE2#
S1_D9
S1_A2
S1_A6
S1_A16
S1_A9
S1_D5
S2_A19
S2_A11
S1_A8
S1_IORD#
S1_CD1#
S2_A4
S2_A12
S2_A22
S2_A18
S2_CD1#
S1_VPP
S2_D10
S2_D2
S2_D0
S2_VS2
S2_OE#
S1_A3
S2_BVD2
S2_A2
S2_RDY#
S2_A20
S1_D15
S1_D0
S1_A1
S1_REG#
S1_INPACK#
S1_A4
S1_A12
S2_D1
S2_D8
S2_BVD1
S2_A1
S2_INPACK#
S2_A13
S1_A24
S2_WP
S2_CE1#
S1_CD2#
S1_D2
S1_VS2
S1_A11
S1_A10
S2_D9
S2_A0
S2_WAIT#
S2_RST
S2_A5
S2_A6
S2_A7
S2_A17
S2_VS1
S2_A10
S2_D3
S1_A15
S1_CE1#
S1_D14
S2_A25
S1_RST
S1_A5
S1_A25
S1_A7
S1_VS1
S1_D3
S2_REG#
S2_WE#
S2_A14
S2_A8
S2_IOWR#
S2_A9
S2_D15
S2_D7
S2_D13
S2_D5
S2_D4
S1_D1
S1_A0
S1_BVD2
S1_WAIT#
S1_A23
S1_A22
S1_IOWR#
S1_D12
S1_A17
S1_CE2#
S2_CD2#
S2_A16
S2_VPP
S2_VCC
S2_A21
S2_VPP
S2_VCC
S1_A21
S1_WE#
S1_A19
S1_A13
S1_VCC
S1_A14
S1_RDY#
S1_A20
S1_VCC
S1_A18
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]
S1_VPP S1_VPP
S1_VCC
+12VALW
+3VALW
+5VALW
S2_VCC
S2_VPP
S2_VCC
S1_VCC
S2_VPP
S1_VCC
S1_VCC
S2_VCC
S2_VCC
S1_VPP
S1_VCC
S2_VPP
S2_VCC
S1_VPP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C238
.1UF
12
C282
.1UF
12
C215
.1UF
1 2
C214
.1UF
1 2
C288
.1UF
12
+C264
4.7UF_25V_1206
25V
C181
.1UF
1 2
U18
TPS2216
24
1
2
30
15
16
17
3
5
4
23
20
21
22
26
27
28
29
25
7
8
9
10
11
6
14
19
13
18 12
12V
5V
5V
5V
3.3V
3.3V
3.3V
DATA
LATCH
CLOCK
BVPP
BVCC
BVCC
BVCC
NC
NC
NC
NC
VCC_5V
12V
AVPP
AVCC
AVCC
AVCC
RESET
RESET#
BPWR_GOOD#
APWR_GOOD#
OC# GND
C174
1UF
1 2
C187
.1UF
1 2
C213
.1UF
1 2
C180
.1UF
1 2
+C234
4.7UF_25V_1206
25V
C322
.1UF
12
R276 22K_0402
1 2
R225 22K_0402
1 2
R244 22K_0402
1 2
R252 22K_0402
1 2
C175
4.7UF_10V_0805
12
C307
10UF_10V_1206
12
C347
10UF_10V_1206
12
C221
4.7UF_10V_0805
12
C204
1000PF
12
C203
1000PF
12
C390
1000PF
1 2
C388
1000PF
1 2
J1
PCMCIA CONN P154
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B17
B18
B16
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
78
79
80
81
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B17
B18
B16
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
78
79
80
81
PCMRST# <19,22>
S1_D[0..15]<19>
S2_D[0..15]<19>
RTCCLK<15,19>
SLDATA<19> SLATCH<19>
S1_CD1#<19>
S1_WE#<19>
S1_IORD#<19>
S1_IOWR#<19>
S1_CE1#<19>
S1_OE#<19>
S1_RDY#<19>
S1_VS1<19>
S1_CE2#<19>
S1_CD2#<19>
S1_RST<19>
S1_WAIT#<19>
S1_REG#<19>
S1_INPACK#<19>
S1_VS2<19>
S1_BVD2<19>
S1_WP<19>
S1_BVD1<19>
S2_CD1# <19>
S2_IORD# <19>
S2_RDY# <19>
S2_WE# <19>
S2_CE1# <19>
S2_CE2# <19>
S2_OE# <19>
S2_VS1 <19>
S2_IOWR# <19>
S2_BVD1 <19>
S2_RST <19>
S2_REG# <19>
S2_VS2 <19>
S2_BVD2 <19>
S2_WP <19>
S2_INPACK# <19>
S2_WAIT# <19>
S2_CD2# <19>
S1_A[0..25]<19>
S2_A[0..25]<19>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BASE ADDRESS CONFIGURATIONXBUS RESET CONFIGURATION
BADDR PULL-UP :4E
BADDR PULL-DOWN:2E
(DEFAULT)
XCNF0
XCNF1
Pin # 61
Signal Pin # Description
BADDR
TEST
XCNF[2:0]
61
58
90, 4, 59
BASE Address Selection
"0": 2E~2F (Default)
"1": 4E~4F
"0": Normal (Default)
"1": Test Mode
2 1 0 Function
x 0 0 No BIOS
x 0 1 Normal Mode. XRDY disabled
0 1 0 Latch Mode. XA12-19, XRDY enabled
1 1 0 Latch Mode. GPIO10~17,XRDY enabled
0 1 1 Latch Mode. XA12-19, XRDY disabled
1 1 1 Latch Mode. GPIO10~17,XRDY disabled
(default) * 1 ROM SOLUTION
IRQ8
888L2 Main Board 2.0
SUPER I/O PC87393 CHIP
21 42Thursday, January 11, 2001
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
WRPRT#
INDEX#
LPTSLCTIN#
LPTSTB#
LPTINIT#
TXDA
XIOCHRDY
XA3
DRV0#
LPTSLCT
LPTERR#
LPTAFD#
XA1
XA0
LPTPE
LPTBUSY
LPTACK#
DTRA#
LPD4
XCNF2
LPD6
LPD7
DSRA#
RXDA
DIR#
1.6M_EN#
RTSA#
CTSA#
XSTB0#
STEP#
LPD0
XD2
WGATE#
XD3
WRDATA#
LPD2
LPD5
DCDA#
XD0
XD1
XD5
XD6
LPD3
XMEMR#
H1SEL#
RDATA#
MTR0#
XD4
XA2
TRK0#
LPD1
XD7
XMEMW#
DTRA#
XA12
XA13
XA16
TXDA
XMEMW#
XCNF2
XA17
XA14
XA15
XA18
XIOR#
XIOW#
RIA#
LAD1
LAD0
LPCSMI#
SIRQ
CLKRUN#
LAD2
LAD3
LFRAME#
LDRQ#0
CLK_PCI_SIO
PCIRST#
CLK_14M_SIOCLK_PCI_SIO CLK_14M_SIO
DISKCHG#
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
RP14
8P4R-10K
1 8
2 7
3 6
4 5
C144
1000PF
12
R311 @10K_0402
1 2
R10810K_0402 12
R109 @10K_0402
1 2
R318 10K_0402
1 2
R312 @10K_0402
1 2
R137
4.7K_0402
12
R138 @0_0402
1 2
PC87393
U11
PC87393
15
16
17
18
8
9
12
6
7
11
10
19
20
14
39
63
88
13
38
64
89
21
22
23
24
25
26
27
28
29
30
31
32
33
34
52
50
48
46
45
44
43
42
35
36
37
40
41
47
49
51
53
54
55
56
57
58
59
60
61
62
70
69
68
67
66
3
2
1
100
99
98
97
96
4
5
73
71
72
74
75
76
77
78
79
80
81
82
83
84
85
86
87
90
91
92
93
94
95
LAD0
LAD1
LAD2
LAD3
LCLK
LRESET#
LFRAME#
CLKRUN#/GPIO36
LPCPD#
LDRQ#
SERIRQ
SMI#/GPIO35
CLKIN
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
DSKCHG#
HDSEL#
RDATA#
WP#
TRK0#
WGATE#
WDATA#
SETP#
DIR#
DR0#
MTR0#
INDEX#
DENSEL
DRATE0/IRSL2
PD0/INDEX#
PD1/TRK0#
PD2/WP#
PD3/RDATA#
PD4/DSKCHG#
PD5/MSEN0
PD6/DRATE0
PD7/MSEN1
PNF/XRDY
SLCT/WGATE#
PE/WDATA#
BUSY_WAIT#/MTR1#
ACK#/DR1#
SLIN#_ASTRB#/STEP#
INIT#/DIR#
ERR#/HDSEL#
AFD#_DSTRB#/DENSEL
STB#_WRITE#
DCD1#
DSR1#
SIN1
RTS1#/TEST
SOUT1/XCNF0
CTS1#
DTR1#_BOUT1/BADDR
RI1#
IRTX
IRRX1
IRRX2_IRSL0
IRSL1
IRSL3/PWUREQ#
XD0/GPIO00/JOYABTN1
XD1/GPIO01/JOYBBTN1
XD2/GPIO02/JOYAY
XD3/GPIO03/JOYBY
XD4/GPIO04/JOYBX
XD5/GPIO05/JOYAX
XD6/GPIO06/JOYBBTN0
XD7/GPIO07/JOYABTN0
XWR#/XCNF1
XRD#/GPIO34/WDO#
XIOWR#/XCS1#/MTR1#/DRATE0
XIORD#/GPIO37/IRSL2/DR1#
XCS0#/DR1#/XDRY/GPIO25
XA19/DCD2#/JOYABTN0/GPIO17
XA18/GPIO16/JOYBBTN0/DSR2#
XA17/GPIO15/JOYAX/SIN2
XA16/GPIO14/JOYBX/RTS2#
XA15/GPIO13/JOYBY/SOUT2
XA14/GPIO12/JOYAY/CTS2#
XA13/GPIO11/JOYBBTN1/DTR2#_BOUT2
XA12/GPIO10/JOYABTN1/RI2#
XA11/GPIO33/XIOWR#/MDTX
XA10/GPIO32/XIORD#/MDRX
XA9/GPIO31/MTR1#/PIRQD
XA8/GPIO30/PIRQC
XA7/GPIO27/PIRQB
XA6/GPIO26/PRIQA/XSTB2#
XA5/XSTB1#/XCNF2
XA4/GPIO24/XSTB0#
XA3/GPIO23
XA2/GPIO22
XA1/GPIO21
XA0/GPIO20
R135
@33_0402
12
R136
@33_0402
12
C124
.1UF
12
C112
.1UF
12
C132
@15PF
12
C133
@15PF
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C148
4.7UF_10V_0805
12
R139 @10K_0402
1 2
R152 10K_0402
1 2
XIOR#<22> XIOW#<22>
DCDA# <24>
DSRA# <24>
RXDA <24>
CTSA# <24>
LPD0 <24>
LPD1 <24>
LPD2 <24>
LPD3 <24>
LPD4 <24>
LPD5 <24>
LPD6 <24>
LPD7 <24>
LPTBUSY <24>
LPTSLCTIN# <24>
LPTSLCT <24>
LPTACK# <24>
LPTERR# <24>
LPTPE <24>
IRQ1<22>
MTR0#<17>
DIR#<17> DRV0#<17>
H1SEL#<17>
IRQ11<22> IRQ12<22>
XIOCHRDY <22>
WGATE#<17>
WRDATA#<17> STEP#<17>
XA12<22> XA13<22> XA14<22> XA15<22> XA16<22>
XA18<22> XA17<22>
XA1<22> XA0<22>
XA3<22> XA2<22>
XMEMR# <22>
XMEMW# <22>
XD0 <22>
XD1 <22>
XD2 <22>
XD3 <22>
XD4 <22>
XD5 <22>
XD6 <22>
XD7 <22>
RIA# <24>
LAD2<14,15> LAD1<14,15>
LDRQ#0<15>
LAD3<14,15>
LAD0<14,15>
SIRQ<14,16,19>
EC_SMI#<15,22>
XSTB0#<22>
EC_FLASH# <22>
1.6M_EN#<17>
RTSA# <24>
TXDA <24>
LPTSTB# <24>
LPTAFD# <24>
LPTINIT# <24>
DTRA# <24>
SUS_STAT#<15>
LFRAME#<14,15>
CLK_14M_SIO<11>
PCIRST#<7,12,14,19,29>
CLK_PCI_SIO<11>
CLKRUN#<15,16,19,29>
WRPRT#<17> RDATA#<17>
TRK0#<17>
INDEX#<17>
DISKCHG#<17>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NC: 1,2,43,44,45,46,87,88,89,90,131,132,133,134,175,176
Pin 130 PU for
Zero Latch
PAD_LED#
IREF: Charger current control
ADPREF: Adapter current control
888L2 Main Board 2.0
KBC/EC PC87570EXT
22 42Thursday, January 11, 2001
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
XA0
XA1
XA2
XA3
XA12
XA13
XA14
XA15
XA16
XA17
XA18
XD0
XD1
XD2
XD3
XD4
XD7
HMEMR#
HMEMW#
PFAIL#
XD4
XD0
XD5
XD6
ECAGND
XD5
51RST
A_BATT_PRE#
SMB_EC_CK1
SMB_EC_DA1
CRY2
CRY1
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA18
ADB0
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
FWR#
FRD#
FSEL#
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
ECAGND KBD_DATA
KBD_CLK
PS2_DATA
PS2_CLK
TP_DATA
TP_CLK
FWR#
THRM#
EC_SMI#
ACOFF
EC_ON
FSEL#
KBA18
KBD_DATA
PS2_DATA
PS2_CLK
FRD#
TP_DATA
TP_CLK
KBD_CLK
KBA[0..17]
ADB[0..7]
KSI[0..7]
SMB_EC_DA1
XD7
XD6
XD2
XD1
XD3
SMB_EC_CK1GATEA20
KBRST#
FWE#
A_BATT_PRE#
GATEA20
KBRST#
KBA15
KBA17
BKOFF#
SELIO#
KSO[0..15]
51RST
EC_SMI#
THRM#
KB_VCC
+3VALW
+RTCVCC
+5VALW
+5VS
+5VS
+5VS
+5VS
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
R124
10K_0402
12
G
D
S
Q37
2N7002
2
13
G
D
S
Q38
2N7002
2
13
C87
1000PF
12
C111
.1UF
12
C129
1000PF
12
C426
.1UF
12
C128
.1UF
12
U21
39F040
12
11
10
9
8
7
6
5
27
26
23
25
4
28
29
3
2
22
24
31
1
13
14
15
17
18
19
20
21
32
16
30
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
CE#
OE#
WE#
VPP
D0
D1
D2
D3
D4
D5
D6
D7
VCC
GND
A17
R331
10K_0402
12
R308 10K_0402
12
R328
100K_0402
1 2
R321
1K_0402 12
C89
.1UF
1 2
L18
BLM11A20
1 2
R294
100K_0402
1 2
R330
51K
12
R329
22M
1 2
C435
33PF
12
C434
10PF
12
X2
32.768KHZ
C130
1UF
1 2
R97
10K_0402
12
R242
0_0402
12
RP35
10P8R-10K
10
9
8
7
6
1
2
3
4
5
C402
.1UF
12
C88 .01UF
1 2
C255
.1UF
1 2
+C241
10UF_10V_1206
12
R122
10K_0402
12
R310
4.7K_0402
12
R316
4.7K_0402
12
R288
100K_0402
1 2
U25D
74LVC32
12
13
11
14
7
L17
BLM11A20
1 2
L19
@BLM11A20
12
PC87570
U9
PC87570-176PIN
166
167
168
169
170
171
172
173
174
3
4
5
6
7
8
9
10
11
12
15
16
17
18
19
20
21
22
13
14
158
159
157
162
163
164
165
161
108
67
23
28
91
24
26
66
109
160
156
155
154
153
25
27
36
35
34
33
32
31
30
29
56
55
54
53
52
51
50
49
48
47
42
41
40
39
38
37
57
58
59
60
69
70
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
112
113
95
96
97
98
81
82
83
84
85
86
93
94
61
62
63
64
65
68
104
103
102
101
100
99
71
72
73
74
75
76
77
78
79
110
107
106
105
111
80
92
HA0
HA1
HA2
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
PA3/HA16
PA4/HA17
PE0/HA18
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HAEN
HIOCHRDY
HIOR#
HIOW#
HMEMCS#/PA0
HMEMRD#/PA1
HMEMWR#/PA2
HMR
HPWRON
VCC
VCC
VCC
VCC
VBAT
AVCC
GND
GND
GND
GND
GND
IRQ1
IRQ8#
IRQ11
IRQ12
32KX1/32CLKIN
32KX2
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15
PSDAT1
PSCLK1
PSDAT2
PSCLK2
PSDAT3/PC7
PSCLK3/PC6
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13/BE0
A14/BE1
A15/PG1/CBRD
A16/PA5/FXBUSEN
A17/PA6
A18/PE1/SHBM#
D0
D1
D2
D3
D4
D5
D6
D7
D8/PF0
D9/PF1
D10/PF2
D11/PF3
D12/PF4
D13/PF5
D14/PF6
D15/PF7
WR0#
PG4/WR1#
DA0
DA1
DA2
DA3
PD0/AD0
PD1/AD1
PD2/AD2
PD3/AD3
PD4/AD4
PD5/AD5
PD6/AD6
PD7/AD7
PC0
PC1
PC2
PC3/EXINT0
PC4/EXINT11
PC5/EXINT15
PH0/BST0/ENV0
PH1/BST1/ENV1
PH2/BST2/TRIS
PH3/PFS
PH4/PLI
PH5/ISE#
PB0/RING#
PB1/SCL
PB2/SDA
PB3/TA
PB4/TB/EXINT10
PB5/GA20
PB6/HRSTO#
PB7/SWIN
PFAIL#
PG0/SELIO
PG2/CLK
PG3/SEL1#
HRMS/SEL0#
RD/HDEN
VREF
AGND
RP30
8P4R-10K
1 8
2 7
3 6
4 5
RP6
8P4R-10K
1 8
2 7
3 6
4 5
R98 10K_0402
1 2
R111@0_0402 12
R11010K_0402 12
R116
10K_0402
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
G
D
S
Q33
2N7002
2
1 3
XA1<21> XA0<21>
XA3<21> XA2<21>
XA12<21> XA13<21> XA14<21> XA15<21> XA16<21>
XA18<21> XA17<21>
XIOCHRDY<21> XIOR#<21> XIOW#<21>
TP_CLK <23>
KBD_CLK <25>
IRQ1<21>
IRQ12<21>
XSTB0#<21>
XMEMR#<21>
XMEMW#<21>
DAC_BRIG
SLP_S3#<15> SLP_S5#<15>
SLP_S1#<11,15>
SUSP#<24,26,30,33>
SMB_EC_CK1<4,12,23,31> SMB_EC_DA1<4,12,23,31> INVT_PWM
PCMRST#<19,20> GATEA20<14> KBRST#<14>
ACIN <15,31>
EN_FAN1# <25>
SYSON <26,31>
BKOFF# <13>
VR_ON <26,30>
FSTCHG <32>
TP_DATA <23>
KBD_DATA <25>
SELIO# <23>
EC_ON <25>
ACOFF <32>
KBA[0..17] <23>
ADB[0..7] <23>
KSI[0..7] <18,23>
KSO[0..15] <23>
MUTE <27>
SCI# <15>
XD0<21> XD1<21>
XD6<21>
XD2<21>
XD5<21>
XD3<21>
XD7<21>
XD4<21>
IRQ11<21>
KSO17 <18>
KSO16 <23>
A_BATT_PRE#<31>
PS2_DATA <25>
PS2_CLK <25>
EC_SMI# <15,21>
THRM# <15>
IREF<32>
ADPREF<32>
SIDE_CS_M#/S <17>
MODEN# <17>
FAN0_TACH<25> FAN1_TACH<25>
FAN_L_H#<25>
EC_HPOWON<25>
SRL_LED#<18> NUM_LED#<18> CAP_LED#<18>
RING#<24>
ON/OFF<25>
EC_FLASH# <21>
EN_FAN0# <25>
POK<33>
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
INPUT OUTPUT
TO TOUCH PAD
RBAT
LID_CL+
EC I2C Bus Address:
NM24C164 Address definition: 1 A2 A1# A0 B2 B1 B0 R/W#
24C164: 1011xxx R/W#
24C16: 1010xxx R/W#
888L2 Main Board 2.0
EC Extended I/O Port
Compal Electronics, Inc.
23 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA3 AA
SELIO# LARST#
ADB[0..7]
KSO[0..16]
KBA1
SELIO#
ADB6
ADB4
ADB5
ADB0
ADB3
ADB2
ADB7
ADB1
KSO4
KSO5
KSO0
KSO3
KSO2
KSI3
KSO1
KSI5
KSI6
KSI0
KSO8
KSO12
KSI7
KSO10
KSO14
KSI4
KSI2
KSI1
KSO6
KSO7
KSO9
KSO13
KSO15
KSO11
KSO16
KSI[0..7]
VLBA#LID_SW#
MINI_PME#
PCM_PME#
CC
PCM_PME#
MINI_PME# AA
CC
KBA[0..17]
LID_SW#
KSO4
KSO5
KSO16
KSO0
KSO3
KSO2
KSO1
KSO8
KSO12
KSO10
KSO14
KSO6
KSO7
KSO9
KSO13
KSO15
KSO11
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3V
+5VS
+3VS
+3VALW
+3VALW
R317 20K_0402
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C403
.1UF
1 2
C425
1UF
1 2
C411
.1UF
1 2
U28
74LVC273
2
4 5
7 6
8 9
13 12
14 15
17 16
18 19
3
11
20
1
10
Q0
D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7
D0
CLK
VCC
CLR
GND
R120
100K_0402
1 2
JP12
JP 25PIN
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25
U26
74LVC244
2 18
4 16
6 14
8 12
11 9
13 7
15 5
17 3
1
19
20
10
1A1 1Y1
1A2 1Y2
1A3 1Y3
1A4 1Y4
2A1 2Y1
2A2 2Y2
2A3 2Y3
2A4 2Y4
1G
2G
VCC
GND
U25B
74LVC32
4
56
14
7
C373
.1UF
1 2
U25A
74LVC32
1
23
14
7
RP26 8P4R-100K
1 8
2 7
3 6
4 5
R300
100K_0402
12
R119
100K_0402
1 2
D12 1SS355
21
C412 .1UF
1 2
U27
NM24C16
1
2
5
6
8
3
4
7A0
A1
SDA
SCL
VCC
A2
GND
WC
L22 FBM-11-451616-800A
1 2
C145
.1UF
12
R278
100K_0402
1 2
R279
100K_0402
1 2
JP10
int. kb
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
CP9
@8P4C-10PF
18 27 36 45
CP8
@8P4C-10PF
18 27 36 45
CP11
@8P4C-10PF
18 27 36 45
CP10
@8P4C-10PF
18 27 36 45
C487 @10PF
1 2
ADB[0..7]<22>
KSO[0..16]<22>
KSI[0..7]<18,22>
TP_CLK <22>
TP_DATA <22>
BEEP# <28>
LID_OUT# <15>
BAT2_LED# <18>
PWR_LED# <18>
BAT1_LED# <18>
PWRBTN_OUT# <15>
SWI# <15>
BATTLOW# <15>
CD/FDD#<17>
SMB_EC_CK1<4,12,22,31> SMB_EC_DA1<4,12,22,31>
KBA[0..17]<22>
ENABKL<12,13>
INTSPK_L+<27,28> INTSPK_L-<27>
INTSPK_R+<27,28> INTSPK_R-<27>
SELIO#<22>
MINI_PME#<29>
PCM_PME#<19>
AIR_ADP#<31>
MODPRES#<17>
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
SERIAL / PARALLEL PORT
PARALLEL
SERIAL PARALLEL
&
SERIAL
888L2 Main Board 2.0
Serial/parallel ports
Compal Electronics, Inc.
24 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
LPD[0..7]
FD7
FD6
FD5
FD4
FD1
FD0
ERR#
AFD/3M#PRNINIT#
FD2
SLCTIN#
FD3
ACK#
BUSY
SLCT
PE
RTS1#
DTR1#
COM_RI
LPD2
LPD1
LPD0
LPD6 FD6
LPD5 FD5
LPTSTB#
FD4
FD7
+5VS_JP5
LPD4
LPD7
PRNINIT#
AFD/3M#
FD0
SLCTIN#
FD3LPD3
ERR#
FD1
FD2
SLCT
BUSY
PE
ACK#
TXD1
DTR0F
RI0F
DSR0F
RXD0F#
DCD0F
RTS0F
COM_RI
CTS0F
TXD0F#
+5V_PRN
+5V_PRN +5V_PRN
+5V_PRN +5V_PRN
+5V
+5VS
+3VALW
G
D
S
Q36
2N7002
2
13
RP23
10P8R-2.7K
10
9
8
7
6
1
2
3
4
5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
CP6
8P4C-47PF
18 27 36 45
CP1 8P4C-47PF
1 8
2 7
3 6
4 5
CP5
8P4C-47PF
18 27 36 45
CP2 8P4C-47PF
1 8
2 7
3 6
4 5
RP24
10P8R-2.7K
10
9
8
7
6
1
2
3
4
5
C12
.1UF
1 2
C1
.1UF
1 2 U3
MAX3243/MAX3243E
1
2
14
13
12
4
5
6
7
3
9
10
11
19
18
17
16
27
8 15
20
28
24
26
25
22
23 21
C2+
C2-
T1IN
T2IN
T3IN
R1IN
R2IN
R3IN
R4IN
V-
T1OUT
T2OUT
T3OUT
R1OUT
R2OUT
R3OUT
R4OUT
V+
R5IN R5OUT
R2OUTB
C1+
C1-
VCC
GND
FORCEOFF
FORCEON INVILID
CP4
8P4C-47PF
18 27 36 45
L44 68
1 2
L43 68
1 2
L40 68
1 2
L41 68
1 2
C13
.1UF
12
C11
.1UF
1 2
C14
.1UF
1 2
R169
33_0402
1 2
R168
2.7K_0402
12
L4 68
1 2
L26 68
1 2
L24 68
1 2
L31 68
1 2
L30 68
1 2
JP3
LPTCN-25
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
L27 68
1 2
L3
68
1 2
L5
68
1 2
L25
68
1 2
L1
68
1 2
L29 68
1 2
L23 68
1 2
L2 68
1 2
D8
1SS355
2 1
JP2
DSUB-9
FOXCONN
5
9
4
8
3
7
2
6
1
L38 68
1 2
L39 68
1 2
L37 68
1 2
L28 68
1 2
L33 68
1 2
L34 68
1 2
CP3
8P4C-47PF
18 27 36
45
R313
20K_0402
1 2
L42 68
1 2
D13
RB717F
1
23
C158
47PF
1 2
DCDA# <21>
DSRA# <21>
RXDA <21>
CTSA# <21>
RIA# <21>
LPD[0..7]<21>
LPTSLCT<21>
LPTPE<21>
LPTBUSY<21>
LPTACK#<21>
LPTERR#<21>
RING# <22>
TXDA<21>RTSA#<21> DTRA#<21>
SUSP#<22,26,30,33>
LPTSLCTIN#<21>
LPTINIT#<21>
LPTAFD#<21>
LPTSTB#<21>
PCM_RI#<19>
MINI_RI#<29>
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V
POWER BTN
-
RTC BATT
+
PWR ON CKT
PS2 CONN.
W=40mils
4516
W=40mils
+3V POWER +3V POWER
888L2 Main Board 2.0
PS/2/RTC/RST CKT
Compal Electronics, Inc.
25 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
PS2_DATA
PS2_CLK
KBD_DATA
KBD_CLK
EC_ON
ON/OFF
KB_ASPS2KB_VCC +3VALW
+RTCVCC
CHGRTC
+3VALW
+3VALW
+5VS
+3VALW +3VALW
+5VALW
+12VALW
+5VALW
+3VS
+5VALW
+12VALW
+5VALW
+3VS
R125
4.7K_0402
12
12
D6
RLZ20A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
R126
22K_0402
1 2
R123
100K_0402
12
D5
DAN202U
1
2
3
C438
.1UF
12
D15
HSM126S
1
2
3
C127
1000PF
12
22K
22K
Q11
DTC124EK
2
13
U1
KBMF01SC6
1
2
3 4
5
6
DATA IN
GND
CLK IN CLK OUT
VCC
DATA OUT
C159
1UF
12
JP1
KBD/PS2_6
5
6
3
1
2
4
U2
KBMF01SC6
1
2
3 4
5
6
DATA IN
GND
CLK IN CLK OUT
VCC
DATA OUT
F3
POLYSWITCH_1.1A L32
FBM-11-451616-800A
1 2
R333
47K_0402
12
R327
330K
12
R326 100_0402
12
R325 100_0402
12
BATT1
RTCBATT
12
U29A
74LVC14
1 2
14 U29B
74LVC14
3 4
14
R182
1K_0402
12
C168
4.7UF_10V_0805
12
+
-
U14A
LM358
3
21
84
JP14
MOLEX 53398-0290
1
2
3
Q27
2SC2411K
23
1
R197
64.9K_1%
1 2
R198
33.2K_1%
1 2
R205
1M
1 2
G
D
SQ7
2N7002
2
13
G
D
S
Q6
2N7002
2
13
R181
10K_0402
12
R196
1K_0402
12
G
D
S
Q4
2N7002
2
13
G
D
SQ5
2N7002
2
13
R193
64.9K_1%
1 2
R191
33.2K_1%
1 2
R192
1M
1 2
Q26
2SC2411K
23
1
JP15
MOLEX 53398-0290
1
2
3
+
-
U14B
LM358
5
67
84
R177
10K_0402
12
C171
4.7UF_10V_0805
12
ON/OFF <22>
EC_ON# <32>
SYS_PWROK <15,16>
EC_HPOWON <22>RSMRST# <15> ITP_VR_POK<13>
KBD_DATA<22>
KBD_CLK<22>
PS2_CLK<22>
PS2_DATA<22>
FAN1_TACH <22> FAN0_TACH <22>
EC_ON<22>
ON/OFFBTN<18>
EN_FAN1#<22>
FAN_L_H#<22>
EN_FAN0#<22>
FAN_L_H#<22>
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
RESET & SUSPEND CKT
+5VALW TO +5VS Transfer
+3VALW TO +3V Transfer
+5VALW TO +5V Transfer
+3VALW TO +3VS Transfer
+1_8VALW TO +1_8VS Transfer
888L2 Main Board 2.0
DC/DC INTERFACE
Compal Electronics, Inc.
26 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
SYSON#
SUSP
RUNON
SUSON
SUSON
SYSON#
SUSP
SUSP#
SUSPRUNON
SUSPRUNON
SYSON#
SYSON#
VR_ON#
VR_ON
SUSP
+5VS
+12VALW
+5VALW
+5V
+12VALW
+5VALW
+5VALW
+3V+3VALW
+12VALW
+12VALW
+3VALW +3VS
+1_8VALW +1_8VS
+CPU_IO
+3VALW +CPU_CORE
+5V
+3V
+5VS
+3VS
G
D
SQ39
@2N7002
2
13
G
D
SQ17
@2N7002
2
13
Q63
@SMO5
1
2
3
G
D
SQ2
@2N7002
2
13
G
D
S
Q13
2N7002
2
13
JP19
3MM
21
JP20
3MM
21
C474
.1UF
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
G
D
SQ47
2N7002
2
13
G
D
S
Q46
2N7002
2
13
R371
1M_0402
12
R372
100K_0402
12
R375
1M_0402
12
R374
100K_0402
12
C471
.01UF
12
C476
.01UF
12
G
D
SQ45
2N7002
2
13
G
D
S
Q48
2N7002
2
13
R121
470
12
R370
470
12
R373
470
12
U8 SI4800
1
2
3
4
8
7
6
5
S
S
S
G
D
D
D
D
U32 SI48001
2
3
4
8
7
6
5
S
S
S
G
D
D
D
D
U31 SI4800
1
2
3
4
8
7
6
5
S
S
S
G
D
D
D
D
G
D
SQ12
2N7002
2
13
R134
470
12
R284
100K_0402
12
R298
10K_0402
12
C140
22UF_10V_1206
12
C136
.1UF
12
C138
10UF_10V_1206
12
C131
10UF_10V_1206
12
C123
22UF_10V_1206
12
U12 SI4800 1
2
3
4
8
7
6
5
S
S
S
G
D
D
D
D
R178
470
12
C473
22UF_10V_1206
12
C469
10UF_10V_1206
12
C472
4.7UF_10V_0805
12
C163
10UF_10V_1206
12
C167
.1UF
12
C166
22UF_10V_1206
12
U13 SI4800 1
2
3
4
8
7
6
5
S
S
S
G
D
D
D
D
R171
@330_0603
12
R332
@100K_0402
1 2
R1
@330_0603
12
C114
.1UF
12
C468
.1UF
12
G
D
S
Q22
2N7002
2
13
G
D
S
Q32
2N7002
2
13
G
D
S
Q35
2N7002
2
13
SYSON#
SUSP<27>
VR_ON<22,30>
SUSP#<22,24,30,33>
SYSON<22,31>
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
FLT3D
W=15mils
FLT0
FLT1
BPCFG
SPDF
ID0#
EAPD
EMI Solution 3/1/2000
ID1#
W=25mils
ADD 15PF(EMI Request)
W=25mils
GNDA GND
Note: direct connect GNDA to GND.
STAC9700 AD1881A
C248
C260
C259
C501
1UF
1UF
1000PF
1000PF
270PF
270PF
4.7UF_10V_0805
Depop
888L2 Main Board 2.0
AUDIO CODEC & AMP
Compal Electronics, Inc.
27 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
BIT_CLK_R
CD_L_IN
INT_CD_AGND
XTL_IN
CAP2
XTL_OUT
REFFLT
INT_CD_AGND
AFTL1
VREFOUT
CD_R_IN
MD_MICMONO_OUT
PHONE
SDATA_IN_R
AFTL2
MD_SPK
RIGHT
INTSPK_L+
LEFT INTSPK_R+
INTSPK_R-
INTSPK_L-
INTSPK_L+
INTSPK_L+
LEFT
MUTEOUT
HP_SENSE
RIGHT
INTSPK_R+
INTSPK_R+
MONO_IN
MUTEOUT
VDD_AC97
VDDA
VDDA
+5VS
VDDA
+3VS
+5VS
VDDA
+5VALW
+12VALW
+5VAU
+5VALW
C478
.1UF
1 2
C501
@1UF
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C369
4.7UF_10V_0805
12
C363
.1UF
12
R275 47
1 2
R274 22
1 2
C261 .1UF
1 2
C247 1UF1 2C259 1000PF1 2
C297 1000PF
1 2
C248
1UF
12
C262
.1UF
1 2
R254
3.3K
1 2
R253 6.8K
1 2
R257 6.8K
1 2
R256
3.3K
1 2
C284 1UF
1 2
C306 1UF
1 2
C257
1000PF
12
C294 1UF
1 2
R282
0_1206
12
R260 6.8K
1 2
C382 22PF
1 2
C340 @1000PF
1 2
C327 @1000PF
1 2 C308 1UF
1 2
C270
4.7UF_10V_0805
12
C283 1000PF
1 2
R259 100K_NC
1 2
R249 6.8K
1 2
C350
2700PF
12
C374
22PF
1 2
C258
1UF
1 2
C260 1000PF
1 2
C287 1000PF
1 2
C314
.1UF
12
R268
4.7K_0402
1 2
R266
47K_0402
1 2 C341 .1UF
1 2
C375 15PF
1 2C253 2.2UF_0805
1 2
C254 2.2UF_0805
1 2
Y2
24.576 MHz
U22 STAC9700
14
15
17
16
23
24
18
20
19
21
22
13
12
35
36
37
11
10
6
5
8
2
3
29
30
28
27
1
9
25
38
32
46
47
48
4
7
39
41
31
33
34
43
44
45
40
26
42
AUX_L
AUX_R
VIDEO_R
VIDEO_L
LIN_IN_L
LIN_IN_R
CD_L
CD_R
CD_GNA
MIC1
MIC2
PHONE
PC_BEEP
LINE_OUT_L
LINE_OUT_R
MONO_OUT
RESET#
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
XTL_IN
XTL_OUT
AFLT1
AFLT2
VREFOUT
REFFLT
VCC
VCC
AVCC
AVCC
CAP2
NC
NC
NC
GND
GND
HP_OUT_L
HP_OUT_R
NC
NC
NC
NC
NC
NC
NC
AGND
AGND
R239 6.8K
1 2
R241 6.8K
1 2
R238 6.8K
1 2
R240 6.8K
1 2
R269 @0_1206
1 2
R95 6.8K
1 2
R90 6.8K
1 2
R94 6.8K
1 2
R91 6.8K
1 2
C376
@4.7UF_10V_0805
12
C349
4.7UF_10V_0805
12
C335 1UF
12
C331 1UF
12
C500
.047UF
1 2
5.11K_0.5%R272
1 2
5.1K
R273
12
C366 68PF
12
D11
AS2431L
1 3
2
2.4K
R309
12
100K_0402
R306
1 2
0_0402
R277
1 2
C378
.1UF
12
C365 220PF
12
G
D
S
Q30
SI2306DS
2
13
5.11K_0.5%
R270
1 2
+
-
U23A
LM358
3
21
84
C364
.1UF
12
C379
.1UF
12
L55
BLM21A601SPT
12
G
D
SQ34
2N7002
2
13
442_1%
R271
1 2
C405
.1UF
1 2
C361 1UF
1 2
R200150K
1 2
R20175K
1 2
R23375K
1 2
R226150K
1 2
C193
4.7UF_10V_0805
C235
.1UF
C246 1UF
C178 1UF
R20675K
1 2
R23275K
1 2
R23175K
1 2
R20775K
1 2
C245 1UF
U17
TPA0202
1
12
13
24
7
18
11
8
14
16
20
19
6
23
17
2
9
10
3
15
22
5
21
4
GND/HS
GND/HS
GND/HS
GND/HS
LVDD
RVDD
MUTEIN
SHUTDW
SE/BTL#
HO/LINE#
RHPIN
RBYPASS
LBYPASS
NC
NC
NC
MUTEOUT
LOUT-
LOUT+
ROUT-
ROUT+
LHPIN
RLINEIN
LLINEIN
C199
.1UF
C179 1UF
R229 0_1206
1 2
R194 @0_1206
1 2
C198
4.7UF_10V_0805
12
INT_CD_R<17>
MD_MIC <29>
LINE_IN_L<28>
MD_SPK<29>
MOD_CD_L<17>
INT_CD_GND<17>
VREFOUT <28>
INT_CD_L<17>
LINE_IN_R<28>
MOD_CD_R<17>
IAC_BITCLK <15,29>
SDATA_IN0 <15>
INTSPK_R- <23>
INTSPK_R+ <23,28>
HP_SENSE<28>
MUTE<22>
INTSPK_L- <23>
INTSPK_L+ <23,28>
SUSP <26>
MONO_IN<28>
EXTMICIN<28>
IAC_SYNC<15,29>
IAC_SDATAO<15,29>
AC97_RST#<15,29> PC_BEEP<28>
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
EXT. LINE_OUT
EXT. LINE IN
EXT. MIC
AUDIO JACK
+3V POWER
888L2 Main Board 2.0
MONO_IN
Compal Electronics, Inc.
28 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
LINE_IN_L
LINE_IN_R
EXT_MIC
EXT_MIC
VDDA
VDDA
VDDA
+3VALW
VDDA
+3VALW
+5VS+3VALW
VDDA
R430
4.7K_0402
1 2
R223
2K_0402
12
R237
100K_0402
12
J2 JA6333L-100
1
2
3
4
5
6
C280
47PF
12
+
C233
150UF_6.3V_E
1 2
C295
47PF
12
C186
47PF
12
C252
47PF
12
C216
47PF
12
L46 BLM11A121S
1 2
L49
BLM11A121S
1 2
L50 BLM11A121S
1 2
J3 JA6333L-100
1
2
3
4
5
6
+
C281
150UF_6.3V_E
1 2
C222
47PF
12
C230
47PF
12
C236
47PF
12
C229
@.1UF
12
C323
47PF
12
+
-
U16A
@APA2308
3
21
84
L53 BLM11A121S
1 2
C338
47PF
12
J4 JA6333L-100
1
2
3
4
5
6
L51
BLM11A121S
1 2
R219
@2K_0402
1 2
R221
@2K_0402
1 2
R228 33_0402
1 2
R230 0_0402
1 2
C232
0.47UF
1 2
C196
@.1UF
12
C228@220PF
1 2
+
-
U16B
@APA2308
5
6
7
84
R30310K_0402
1 2
R3022K_0402
1 2
R320
100K_0402
1 2
C3971UF
1 2
C3951UF
1 2
C439
.1UF
12
C200 @1UF
1 2
C195
@.1UF
12
C3961UF
1 2
R295
100K_0402
12
R291
2K_0402
1 2 R264
100K_0402
12
R3042K_0402
1 2
C362
1UF
Q31
2SC2411K
23
1
C401 1UF
1 2
R322
10K_0402
1 2
D10
1SS355
2 1
C313
@4.7UF_10V_0805
12
U25C
74LVC32
9
10 8
14
7
C210
@10UF_10V_1206
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
U29C
74LVC14
5 6
14
R212 1K_0402
1 2 C212 .1UF
1 2
C219 4.7UF_10V_0805
1 2
R424
@2K_0402
12
L52 BLM11A121S
1 2
R387
2K_0402
12
LINE_IN_R<27>
LINE_IN_L<27>
HP_SENSE<27>
EXTMICIN<27>
MONO_IN <27>
VREFOUT<27>
PCM_SPK#<19>
SPKR<15>
BEEP#<23>
INT_MIC<18>
INTSPK_L+<23,27>
INTSPK_R+<23,27>
MOD_MON<29> PC_BEEP <27>
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
MINI_PCI CONNECTOR
For Compal private Mini-PCI combo card - Mini-PCI type IIIc
pin 21. LAN REQ#
pin 22. LAN GNT#
pin 36. LAN PME#
pin 43. LAN IDSEL
AC_CODEC_ID1#
AC_CODEC_ID0# AC_CODEC_ID1# AC_CODEC_ID0#Connection
SDATA_IN1 0 1
888L2 Main Board 2.0
Mini-PCI Connector
Compal Electronics, Inc.
29 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
AD15
AD16
AD9
AD13
AD8
AD12 AD11
AD14
AD10
AD30
AD7
AD1
AD3
AD5
AD17
AD25
AD27
AD31
AD29
AD23
AD21
CLKRUN#
AD19
GNT#1
AD2
AD6
AD4
AD0
AD28
AD24
AD26
AD22
AD18
AD20
MD_SPK
CLK_PCI_MINI
REQ#1
AD[0..31]
MOD_MON
MD_SPK
IAC_BITCLK
LAN_EEDI_R
LAN_EEDO_R
LAN_RXD2_R
LAN_EECS_R
AD27
AD28
MOD_MON
LAN_EECLK_R
LAN_RXD1_R
LAN_RXD0_R LAN_TXD0_R
LAN_TXD1_R
LAN_TXD2_R
LAN_PHYRST_R
LAN_EECS_R
IAC_BITCLK
+5VS
+5VS
+3VAUX
+3VAUX
+5VS
+3V_MINIPCI
+5VS_MINIPCI
+3V
+3V_MINIPCI
+3VAUX
+3VAUX +3VALW +3V
+5VS
+3V_MINIPCI
+3V_MINIPCI
+3V
R419 1K_0402
1 2
RP39 8P4R-0
1 8
2 7
3 6
4 5
R403 0_040212
R378 @0_0402
12 R379 @0_0402
12
R380 @0_0402
12
R381 @0_0402
12
R417 0_040212
R418 0_040212
R166 @33_0402
12 C157 @22PF
12
C430
.1UF
12
R408 0_040212R407 0_040212
R405 0_040212
R401 0_040212
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
R164
33_0402
1 2
R154 100_0402
1 2
C156
22PF
1 2
C142
.1UF
12
C141
.1UF
12
C154
.1UF
12
C155
.1UF
12
L56 FBM-11-160808-121
1 2
R157
@100_0402
1 2
R128 @0_0402
12
C477
10UF_10V_1206
12
L21
01 2
L57
01 2
C475
.1UF
12
C451
1000PF
12
JP18
MINI_PCI CONN.
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72
73 74
75 76
77 78
79 80
81 82
83 84
85 86
87 88
89 90
91 92
93 94
95 96
97 98
99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124
R409
@33_0402
1 2
C481
@22PF
1 2
R406 0_040212
R404 0_040212
R402 0_0402
12
R165 @0
1 2
R323 0
1 2
C429
.1UF
12
C137
.1UF
12
C/BE#3<14,19>
C/BE#2<14,19>
SERR#<14,16,19>
PERR#<14,16,19> C/BE#1<14,19>
IRDY#<14,16,19>
PCIRST# <7,12,14,19,21>
MINI_PME# <23>
PAR <14,19>
C/BE#0 <14,19>
MINI_RI#<24>
AD[0..31]<14,19>
LAN_RXD0<16>
LAN_PHYRST <16>
LAN_TXD2 <16>
LAN_TXD1 <16>
LAN_TXD0 <16> LAN_PHYCLK <16>
TRDY# <14,16,19>
FRAME# <14,16,19>
DEVSEL# <14,16,19>
STOP# <14,16,19>
CLK_PCI_MINI<11>
CLKRUN#<15,16,19,21>
MD_MIC<27>
IAC_SYNC<15,27>
AC97_RST# <15,27>
MOD_MON<28>
GNT#1 <14,16>
MD_SPK <27>
REQ#1<14,16>
PIRQD# <14,16>
PIRQB#<14,16>
GNT#2 <14,16>
SDATA_IN1<15> IAC_BITCLK<15,27> IAC_SDATAO <15,27>
REQ#2<14,16>
LAN_RXD1<16>
MPCIACT# <14>
LAN_EECLK<16>
LAN_RXD2<16>
LAN_EEDO<16> LAN_EEDI<16> LAN_EECS<16>
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CPU_IOP Detector
Low 1.43 1.35 1.29
High 1.08 1.03 0.99
Delay time (ms)
264 156 108
888L2 Main Board 2.0
CORE/IO/CLK
Compal Electronics, Inc
30 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
BSTCORE
BSTCORE1
2VREF
VCCORE
DLCORE
2VREF
FBCORE
2VREF
DHCORE
LXCORE
+5VALWP
+3VALWP
+5VALWP
+5VALWP
+3VALWP +2_5V_CLKP
B+
+5VALWP
+CPU_IOP
+1_8VALWP
+5VALWP
+3VALWP
B+CPU_CORE
2.5VREF
+CPU_CORE
+CPU_IOP
PC14
0.22UF_0805_16V
PC11
0.22UF_0805_16V
PD1
RB751V
21
+PC22
22UF_B_6.3V
+
PC21
22UF_B_6.3V
SOT-89
PQ10
2SB1132
1
3 2
PQ1
SI4884DY
IRF7811A
3 6
5
7
8
2
4
1
PD2
EC10QS04
12
PQ3
SI4404DY
FDS7764A
3 6
5
7
8
2
4
1
PL2
0.9UH/20A_LPI
1 2
PL1
@1UH
1 2
PC20
68PF
100K
100K
PQ9
DTC115EK
2
13
S
G
D
PQ6
SI3442DV
3
6
2
45
1
PU1
MAX1711
17
18
12
2
16
5
9
15
10 8
3
7
1
19
13
14
22
24
23
21
4
6 11
20
D3
D2
PGOOD
SHDN
D4
CC
REF
VDD
GND TON
FB
VCC
V+
D1
DL
PGND
BST
DH
LX
SKIP
FBS
ILIM GNDS
D0
PC12
1UF_0805_25V
PC13
220PF
PC6
0.1UF_0805_25V
PU3
S-816A25
2
5
1
4
3
VSS
VOUT
EXT
VIN
ON/OFF#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
PR50
1 2
PR4
100K
1 2
PC17
0.1UF_16V
12
PC18
220PF
+PC15
150UF_D_6.3V_KO
12
PC19
0.01UF
100K
100K
PQ8
DTC115EK
2
13
PR7
012
PR10
10K_1%
1 2
PR22
@ 0
1 2
PC16
4.7UF_1206_25V
PC10
2200PF
+
-
PU2A
LM358 3
2
1
84
PD21
EC31QS04
12
PD22
RB751V
21
PR3
0.003_2512_1%
12
PR12
0
1 2
PR11
5.1K
1 2
PR8
150K_1%
12
PR9
1M_1%
12
PR2
100K
12
PR1
0
1 2
PR6
20 12
PR15
243K_1%
1 2
PR17
100K_1%
1 2
G
D
S
PQ7
2N7002 2
13
PR23
0
1 2
PR92
100K
1 2
PR99
012
PR100
@12
PR98
2.2
1 2
PQ2
SI4884DY
IRF7811A
3 6
5
7
8
2
4
1
PQ4
SI4404DY
FDS7764A
3 6
5
7
8
2
4
1
PC5
0.1UF_0805_25V
12
PR16
100K_1%
12
PR19
300K_0.5%
1 2
PR21
5.1K
1 2
PR20
100K
1 2
PR13
1.2M_1%
1 2
PC98
1000PF
12
+
-
PU2B
LM358
5
6
7
PR18
200K_1%
1 2
PQ29
@
3 6
5
7
8
2
4
1
PR101
0.003_2512_1%
12
PL9
FBM-L11-322513-121AT
12
PJP11
@3MM
2 1
+
PC8
220UF_D_4V
12
PR14
100K_1%
12
PC79
1UF_0805_16V
PR106
@0
1 2
PC1
4.7UF_1210_25V
12
PC3
4.7UF_1210_25V
12
PC2
4.7UF_1210_25V
12
PC4
4.7UF_1210_25V
12
PC97
@4.7UF_1210_25V
12
PD23
1SS355
12
VID0<4>
VID1<4>
VID2<4>
VID3<4>
VID4<4>
VR_ON<22,26>
V_GATE<15>
SUSP#<22,24,26,33>
SUSP#<22,24,26,33>
VR_ON<22,26>
VR_POK<13>
VR_ON <22,26>
VR_HI/LO#<4,15>
Precharge detector while AC adaptor
High 16.5 15.8 15.1
Low 13.9 13.2 12.5
Vin Detector
High 18.7 17.9 17.1
Low 18.0 17.3 16.5
888L2 Main Board 2.0
Detector
Compal Electronics, Inc.
31 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
ADPIN
PACIN
ADPGND
RTCVREF
VIN VS
VIN
+3VALWP
VS
+3VALWP
BATT++
+5VP
RTCVREF
B+
BATT+
VIN
GND
AIR_ADP
PCN2
PR34-8R-3PDLA
3
2
1
4
5
6
7
PC27
100PF_50V
12
PC32
1000PF
12
PZD1
RLZ3.6B
12
PC33
0.1UF_16V
12
PC25
@
12
PR26
100
1 2
100K
100K
PQ11
DTC115EK
2
13
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
PD4
@BAS40-04
2
3
1
PD5
@BAS40-04
2
3
1
PD3
@BAS40-04
2
3
1
PC28
@
12
PC26
1000UF_50V
12
PL3
OC9080-D601
3
1 4
2
PC23
100PF_50V
12
PC24
1000PF_50V
12
PD7
RB751V
12
PC29
0.01UF
12
PC31
0.1UF_16V
12
PC30
1000PF
12
100K
100K
PQ13
DTC115EK
2
13
PQ12
2N7002
2
13
PD6
RB751V
12
PCN1
BP02078-H1
1
2
3
4
5
6
7
BATT+
CLK_SMB
DAT_SMB
BATT_PRS#
SYS_PRES#
REMOTE-SNS
GND
PR40
20K_1%
12
PR33
78.7K_1%
12
PJP10
@3MM
21
PC82
0.1UF_0805_25V
12
PC83
0.1UF_0805_25V
12
PL8
FBM-L11-322513-121AT
1 2
+
-
PU4A
LM393A
3
21
84
+
-
PU4B
LM393A
5
6
7
PR25
47K
1 2
PR28
100
1 2
PR24
47K
12
PR41
10K
12
PR39
22K
1 2
PR35
10K
1 2
PR43
10K
12
PR34
10K
12
PR30
1M_1% 12
PR29
100K
1 2
PR42
47K 12
PR36
249K_1%
12
PR37
499K_1%
12
PR38
10K
1 2
PZD5
RLZ24B
12
PR109
10_1206
12
PR27
100
1 2
PR32
1M_1%
1 2
PC93
1000PF
12
PR31
499K_1%
12
ACIN <15,22>
PACIN <32>
AIR_ADP# <23>
SMB_EC_CK1 <4,12,22,23>
SMB_EC_DA1 <4,12,22,23>
A_BATT_PRE# <22>
SYSON <22,26>
SHDN#<33>
ACON<32>
CC = 0~2.7A
Ich = 0.808*IREF
CV = 17.47V
Iadp = 0~3.33A
Iadp = 0.964*ADPREF
888L2 Main Board 2.0
Charger
Compal Electronics, Inc.
32 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
CSH
CHGRTCP
LXCHRG
P2
VIN
VIN
VS
+5VP
VIN
BATT+
B+
CHGRTC
RTCVREF
BATT+
B+
P3
VS1
B++ B+
PD11
RLS4148
12
PC47
0.22UF_1206_25V
12
PQ19
TP0610T
2
13
PD13
RLS4148
12
PD10
EA60QC04
1
3
2
PC48
0.1UF_0805_25V
12
PZD3
RLZ5.1B
12
PU6
S-81235SG
2
1
3
IN
GND
OUT
PZD4
RLZ16B
12
PC51
4.7UF_1206_25V
12
PC50
1UF_0805_25V
12
PC44
4.7UF_1210_25V
12
+
PC42
33UF_EC_25V12
PC45
4.7UF_1210_25V
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
PC34
4.7UF_1210_25V
12
PC35
4.7UF_1210_25V
12
PC36
4.7UF_1210_25V
12
PD12
RLS4148
12
PD8
1SS355
1 2
100K
100K
PQ28
@DTC115EK 2
13
PD26
@1SS355
1 2
PZD2
RLZ4.3B
12
PC85
2200PF
PC86
0.1UF_0805_25V
1 2
PR69
150K
12
PR54
1K
1 2
PR56
66.5K_1%
1 2
PR59
330K
1 2
PR51
@20K_1%
12
PC46
4.7UF_1210_25V
12
PR58
10K
12
PR52
10K
1 2
PR49
100K
12
PR60
69.8K_1%
12
PR63
47.5K_1%
12
PR57
0.02_2512_1%
1 2
PR53
69.8K_1%
12
PC84
0.1UF_0805_25V
12
PR48
0
12
PR46
47K
1 2
PR44
0.02_2512_1%
12
PR45
200K
12
PR75
22K
1 2
PR66
200_0805
12
PR67
10K
1 2
PR55
100K_1%
1 2
PR47
150K
12
PR50
47K
1 2
PR68
100K
12
PR76
200_0805
1 2
PR70
1K_1206
12
PR71
1K_1206
12
PR72
1K_1206
12
PR65
150K_1%
12
PR74
1K_1206
12
PR93
@30.1K_1%
12
PR97
75K_1%
1 2
PR61
10K
12
PR96
@47K
1 2
G
D
S
PQ18
2N70022
13
PC92
0.1UF_0805_25V
1 2
PR62
100_1206
1 2
PC43
1500PF
1 2
PC40
2200PF
1 2
PC94
@
12
PC95
@22PF
12
PC96
@
12
PC99
22PF
12
PC100
22PF
1 2
PR73
1K_1206
12
PC41
0.1UF_16V
12
PC39
0.1UF_16V
1 2
PL4
22UH_SPC-1205PA
1 2
PQ17
FDS4435
36
5
7
82
4
1
PQ14
SI4835DY
36
5
7
82
4
1
PQ16
SI4835DY
3 6
5
7
8
2
4
1
PQ15
SI4835DY
3 6
5
7
8
2
4
1
PC49
0.1UF_16V
12
PU5
MB3878
1
2
3
4
24
23
22
21
5
6
7
8
9
10
11
12
20
19
18
17
16
15
14
13
-INC2
OUTC2
+INE2
-INE2
+INC2
GND
CS
VCC(o)
FB2
VREF
FB1
-INE1
+INE1
OUTC1
OUTD
-INC1
OUT
VH
VCC
RT
-INE3
FB3
CTL
+INC1
PC37
2200PF
1 2
PC38
4700PF
1 2
EC_ON#<25>
PACIN<31>
ACON<31>
IREF<22>
ADPREF<22>
FSTCHG <22>
ACOFF <22>
ACOFF# ACOFF#
888L2 Main Board 2.0
3.3V/5V/12V
Compal Electronics, Inc.
33 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
BST5
CSH5
SNB1
VDD
FLYBACKSNB
CSH3
DH5
BST3
BST51
LX5
DL5
DL3
LX3
BST31
DH3
+3VALWP
+5VALWP
+5VP
VS
VL
2.5VREF
B++
B++
VL
+3VALWP
+12VALWP
B+
PT1
SDT-1205P-100-120
1
4
3
2
PC58
4.7UF_1210_25V
12
PD18
BYS10-45
12
PC74
0.047UF_16V
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
PC56
0.1UF_0805_25V
1 2
PC59
4.7UF_1210_25V
12
+
PC72
150UF_D_6.3V_KO
12
PD17
BYS10-45
12
+
PC68
150UF_D_6.3V_KO
12
+
PC73
@150UF_D_6.3V_KO
12
+
PC71
150UF_D_6.3V_KO
12
PD16
RB751V
12
PD15
RB751V
1 2
+
PC70
150UF_D_6.3V_KO
12
PC61
1000PF
12
PC65
1000PF
12
PL5
1UH_BLM3216
12
PC54
1UF_0805_25V
12
+
PC69
150UF_D_6.3V_KO
12
PD14
EC11FS2
12
PC55
0.1UF_0805_25V
1 2
PC80
0.1UF_0805_25V
12
PC81
2200PF
PC60
4.7UF_1210_25V
12
PC52
2.2UF_1206_25V
1 2
PC53
470PF_0805_100V
1 2
PC66
4.7UF_1206_25V
12
PL6
10UH_SPC-1205P
12
+
PC67
150UF_D_6.3V_KO
12
PC62
4.7UF_1206_25V
12
PC87
0.1UF_16V
1 2
PC57
4.7UF_1210_25V
12
PQ21
SI4834DY
3
4
1
2
5
6
8
7
PQ26
SI4800DY
3 6
5
7
8
2
4
1
PQ27
SI4800DY
3 6
5
7
8
2
4
1
PD24
EC10QS04
12
PD25
RB751V
1 2
PR80
0
1 2
PR83
@ 0
1 2
PC88
2200PF
PC89
0.1UF_0805_25V
12
PC91
0.1UF_0805_25V
12
PU7
MAX1632
26
24
25
27
1
2
3
10
8
4
5
18
16
17
19
20
14
13
12
15
9
6
11
23
7
28
21
22
LX3
DL3
BST3
DH3
CSH3
CSL3
FB3
SKIP#
GND
12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#
SHDN#
TIME/ON5
RUN/ON3
VL
V+
PC64
4.7UF_1210_25V
12
PC90
0.1UF_0805_25V
12
PR105
0
12
PR103
@ 0
12
PC63
4.7UF_1210_25V
12
PR81
0.012_2512_1%
12
PR79
10_1206
12
PR85
10K
1 2
PR82
0.015_2512_1%
12
PR84
0
1 2
PR107
@ 0
1 2 PR108
@ 0
1 2
PR77
22_1206 12
PR78
0
12
PR94
0
1 2
PR95
100K
12
PL10
FBM-L11-322513-121AT
12
PJP12
@3MM
2 1
PR104
0
12
PR102
@ 0
1 2
SHDN# <31>
SUSP#<22,24,26,30>
POK <22>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8V+-5%
888L2 Main Board 2.0
+1_8VS
Compal Electronics, Inc.
34 42Thursday, January 11, 2001
Title
Size Document Number Rev
Date: Sheet of
LX18
VS
+5VALWP
+12VALW
+1_8VALWP
+12VALWP
+CPU_IO+CPU_IOP
+2_5V_CLK+2_5V_CLKP
+5VALW+5VALWP
+3VALW+3VALWP
+1_8VALW
2.5VREF
+1_8VALWP
PC76
4.7UF_1206_25V
12
PQ23
2SC2411K
21
3
+PC75
150UF_D_6.3V_KO
12
PC77
2200PF
12
PJP7
3MM
21
PJP9
3MM
21
+
-
PU8A
LM393A
3
2
1
84
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
PD20
RB751V
1 2
PQ24
2SA1036K 2
3
1
PD19
RB051L-40
12
PL7
@4.7UH_SLF7045T
12
PR88
1K
1 2
PL11
5UH_SPC_06703
12
PC78
0.01UF
12
PJP8
2MM
21
S
G
D
PQ22
SI3445DV
3
6
2
4 5
1
PJP4
3MM
21
PJP5
2MM
21
PJP6
3MM
21
PR91
100K_1%
12
PR90
38.3K_1%
12
PR89
@10K
12
PR86
10K
12
PR87
10K
12
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