Compal LA 1081 Schematics. Www.s Manuals.com. R1.0 Schematics

User Manual: Motherboard Compal LA-1081 888M1 - Schematics. Free.

Open the PDF directly: View PDF .
Page Count: 39

Download
Open PDF In Browser	View PDF

COMPAL CONFIDENTIAL
MODEL

CLOCK

Coppermine
uBGA2/uPGA2
CPU

NAME : 888M1 LA-1081

REV:1.0

ICS925AG-31
PAGE 11

PAGE 2,3

CRT & TV-OUT
PSB

PAGE 13

GMCH2-M
KB/PS2 Interface

VGA Board Connector
PIRQA#

AGP BUS

Host-HUB Bridge

IDSEL: AD11

Internal GFX

IDSEL: AD13

SODIMM X2
-BANK 2,3,4,5

MEMORY BUS

PAGE 12

POWER
INTERFACE
PAGE 29

PAGE 7
PAGE 4,5,6

Direct CD
Play

HUB Link

PAGE 19

PCI BUS
IDSEL: AD16
MASTER 3
PIRQA#, PIRQB#
SIRQ

IDSEL: AD26
MASTER 2
PIRQC#

INTERNAL IDE

IDE/CD
/FDD
PAGE 20

ICH2-M

1394 Controller

FUNC 0: LAN, HUB-TO-PCI ,
PCI-TO-LPC BRIDGE
FUNC 1: IDE Controller
FUNC 2: USB Controller #1
FUNC 3: POWER MANAGEMENT
FUNC 4: USB Controller #2
FUNC 5: AC97 Audio Controller
FUNC 5: AC97 Modem Controller

Smart
Media

CARDBUS
PCI1420

TAB43AB22
PAGE 17

IDSEL: AD23
MASTER 1
PIRQD#

IDSEL: AD27
MASTER 0
PIRQA#,
PIRQD#

Mini PCI
Connector

LAN Controller
RTL8139C

PAGE 14

PAGE 16

PAGE 18

AC LINK

PAGE 8,9,10

PAGE 21

LPC

LPC

MDC
Connector

PCMCIA
SOCKET

PAGE 12

PAGE 15

USB/BlueTooth

DC/DC POWER

PAGE 24

SIO

EC/KBC

LPC 47N227

PC87591

PAGE 22

AC97 Codec
PAGE 25

PAGE 27

AMP &
Audio Jack

+1.5V POWER

PAGE 26

+1.8V POWER

FIR/LPT
PORT

+3VALW POWER
+5VALW POWER
PAGE 23

+12VALW POWER
CPU_CORE POWER
PAGE 32,33,34,35,36,37

BIOS
EC BUFFER
PAGE 28

Switchs &
Connectors
PAGE 30

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:

888M1 COVER SHEET
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet

1

of

38

A

B

C

D

E

+5VS

BREQ0#
4
4
4

BPRI#
BNR#
HLOCK#

4
4
4

2

V1
Y4
U3

HIT#
HITM#
DEFER#

4
4
4
4

HTRDY#
RS#0
RS#1
RS#2

8
8
8
8
8

A20M#
FERR#
IGNNE#
CPU_PWRGD
SMI#

AA21
Y21
W21
W19
U2
U1
AA2
W1
Y1
A20M#
AD10
FERR#
AC12
IGNNE#
AC13
CPU_PWRGD V5
SMI#
AB10
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
ITP_PREQ#
GTL_PRDY#
SELPSB0
SELPSB1

8
8
8
8

INTR
NMI
STPCLK#
CPUSLP#

C6
U4
T4
R1

AC15
AD13
AD14
AA14
AA11
AB20
W20
AA12
AB15

INTR
NMI
STPCLK#
CPUSLP#

AB18
AC19
AC11
AB12

THERMDA
THERMDC

AA15
AB16

AERR#
AP0#
AP1#
BERR#
BINIT#
IERR#

ERROR
SIGNALS

BREQ0#
BPRI#
BNR#
LOCK#

ARBITRATION
PHASE
SIGNALS

HIT#
HITM#
DEFER#

SNOOP PHASE
SIGNALS

BP2#
BP3#
BPM0#
BPM1#
TRDY#
RS0#
RS1#
RS2#
RSP#

RESPONSE
PHASE
SIGNALS

A20M#
FERR#
IGNNE#
PWRGOOD
SMI#

PC
COMPATIBILITY
SIGNALS

TDO
TDI
TMS
TRST#
TCK
PREQ#
PRDY#
SELPSB0
SELPSB1

DIAGNOSTIC
& TEST
SIGNALS

INTR/LINT0
NMI/LINT1
STPCLK#
SLP#

DBSY#
DRDY#

EXECUTION
CONTROL
SIGNALS

1

INIT#
FLUSH#
RESET#
BCLK

00

66MHZ

01

100MHZ

10

RESERVED

1
2

@10K

THERMDA
THERMDC

THERMAL DIODE

EDGCTRLN

MICRO-PGA

+5VS

6
7
8
9
10

5
4
3
2
1

CPU_VID[0..4]

3
7
11
17
21
4
8
14
18
22
1
13

1K

@1K

1K

1K

1K

R330

R325

R324

R302

R304

D38
1

17V/16V#

2
RB751V

1
R200

VID[0..4]

A0
A1
A2
A3
A4

C0
C1
C2
C3
C4

B0
B1
B2
B3
B4

D0
D1
D2
D3
D4

BE#

VCC

BX

GND

2
6
10
16
20

37
3

5
9
15
19
23
24

+5VS

12

C436
.1UF

SN74CBT3383

VR_HI/LO# 9,37

VID[4..0]

4
4

*
*

CPUINIT# 8
CPURST# 4

M3

VID[0..4]

VID0
VID1
VID2
VID3
VID4

2
Q77
2N7002

2
1K

CPUINIT#
FLUSH#
CPURST#

3

CPU_VID1

VR_HI/LO#

DBSY#
DRDY#

CPU_VID[0..4]

2 CPU_VID4
10K CPU_VID2

1
R326

U44
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4

HCLK_CPU 11

4

3

2

1

0

V

0

0

0

0

0

2.00

0

0

0

0

1

1.95

0

0

0

1

0

1.90

0

0

0

1

1

1.85

0

0

1

0

0

1.80

0

0

1

0

1

1.75

0

0

1

1

0

1.70

0

0

1

1

1

1.65

0

1

0

0

0

1.60

0

1

0

0

1

1.55

0

1

0

1

0

1.50

0

1

0

1

1

1.45

0

1

1

0

0

1.40

0

1

1

0

1

1.35

0

1

1

1

0

1.30

2

AA16
R265
10
11

STSEM BUS FREQUENCY

2

2
1
2

+5VS

1

SELPSB[1:0]

CPU_VID0

R323

AA3
T1

AA10
AC9
A6

R174
1K

RP34
10P8R-10K
CPU_VID3

V20
T21
U21
R21
V18
P21
P20
U19

AA18
Y20
AB21

EC_SMD2 19,27,34

ATF#

+5VS
+5VS

For 1GHz CPU
PICCLK
PICD1
PICD0

4

EC_SMC2 19,27,34

MAX1617/MAX6654

22
DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#

16
15
14
13
12
11
10
9

1

IERR#

ADS#

NC
STBY
SMBCLK
NC
SMBDATA
ALERT
ADD0
NC

2

8P4R-1K

AA1
AB1
Y2
E6
V21
AD9

2
1K

NC
VCC
DXP
DXN
NC
ADD1
GND
GND

1

AB2

1
R12

+5VS

1
2
3
4
5
6
7
8

THERMDA
THERMDC

2200PF

3

ADS#

1617VCC
U3
C15

2

4

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
RP#

200

1

ITP_TDI
ITP_TMS
ITP_TCK
ITP_TRST#

T2
V4
V2
W3
W5
W2

R11
C14
.1UF

2

8
7
6
5

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

DATA
PHASE
SIGNALS

HD#[0..63] 4

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

1

RP4
1
2
3
4

4
4
4
4
4

REQUEST
PHASE
SIGNALS

D10
D11
C7
C8
B9
A9
C10
B11
C12
B13
A14
B12
E12
B16
A13
D13
D15
D12
B14
E14
C13
A19
B17
A18
C17
D17
C18
B19
D18
B20
A20
B21
D19
C21
E18
C20
F19
D20
D21
H18
F18
J18
F21
E20
H19
E21
J20
H21
L18
G20
P18
G21
K18
K21
M18
L21
R19
K19
T20
J21
L20
M19
U18
R18

2

2 CPU_PWRGD
1.5K
2 BREQ0#
10

COPPERMINE

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

1

3

1
R252
1
R243

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#

2

+2.5V_CLK

HD#[0..63]

U7A
L3
K3
J2
L4
L1
K5
K1
J1
J3
K4
G1
H1
E4
F1
F4
F2
E1
C4
D3
D1
E2
D5
D4
C3
C1
B3
A3
B2
C2
A4
A5
B4
C5

1

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

2

HA#[3..31]

1

HA#[3..31]

2

4

1

CPURST#
2
56.2_1%_0603
FLUSH#
2
1.5K
FERR#
2
1.5K
CPUSLP#
2
1.5K
ITP_PREQ#
2
1.5K
GTL_PRDY#
1
@56.2_1%_0603
SELPSB0
1
10K
SELPSB1
1
@10K
1
0

2

4

1
R256
1
R235
1
R229
1
R233
1
R195
2
R196
2
R227
2
R224
2
R223

1

CPU_IO

R219

*

1

C373

110_1%_0603

Compal Electronics, Inc.

2

10PF

Title
11

Mobile Coppermine Processor in Micro-PGA2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:

133MHZ

A

B

C

D

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet
E

2

of

38

A

B

2
R218

1
1.5K

AD17
Y5
N5
AD20
H4
AA17
G4

2

TESTLO1
TESTLO2
TESTP1
TESTP2
TESTP3
TESTP4

R247
1K

1

1

TESTHI

1

R245
1K

R207
56.2_1%_0603

GHI#
RTTIMPEDP

2

2

1

1

1

1

1

1

1

1

1

1

1

.1UF
2

.1UF
2

.1UF
2

2

2

2

2

2

2

2

1

1

1

1

1

1

1

1

1

1

2

.1UF
2

.1UF
2

2

2

2

2

2

2

2

1
C349
.1UF
2

+ C64
220U_E

CPU_CORE

1

1

1

1

1

1

1

1

1

.1U

.1U

.1U

2

.1U

2

.1U

2

.1U

2

.1U

2

.1U

2

.1U

2

C269 C277 C284 C292 C299 C307 C315 C323 C332 C333
2

.1U

2

1

C259

2

2

1

CPU_CORE

.1U

1

C270 C260 C261
.1U

.1U
2

.1U

2

.1U

2

.1U

2

.1U

2

.1U

2

.1U

2

.1U

2

.1U

1

1

1

1

1

1

1

1

C324 C316 C308 C300 C293 C285 C278
2

1

CPU_CORE

1

1

1

1

1

1

1

1

1

1

CPU_CORE

C271 C279 C286 C294 C301 C309 C317 C325 C334 C262 C272
.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U

1

1

1

1

1

1

1

1

1

1

CPU_CORE

C280 C287 C295 C302 C310 C318 C326 C335 C336 C327 C319
.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U

1

1

1

1

1

1

CPU_CORE

C311 C303

C296 C288 C281 C273 C263 C374

.1U

.1U

2.2U_0805
2

.1U
2

.1U
2

.1U
2

.1U
2

.1U

C22

C40

C67

C23

C60

G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
G17
H6
H17
J6
J17
K6
K17
L6
L17
M6
M17
N6
N17
P1
P6
P17
R6
R17
T6
T17
U6
U17
V6
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
W6
W7
W8
W9
W10
W11
W12
W13
W14
W15
W16
W17
Y6
Y7
Y8
AA6
AA7
AA8
AB6
AB7
AB8
AC6
AC7
AC8
AD6
AD7
AD8

VCCT0
VCCT1
VCCT2
VCCT3
VCCT4
VCCT5
VCCT6
VCCT7
VCCT8
VCCT9
VCCT10
VCCT11
VCCT12
VCCT13
VCCT14
VCCT15
VCCT16
VCCT17
VCCT18
VCCT19
VCCT20
VCCT21
VCCT22
VCCT23
VCCT24
VCCT25
VCCT26
VCCT27
VCCT28
VCCT29
VCCT30
VCCT31
VCCT32
VCCT33
VCCT34
VCCT35
VCCT36
VCCT37
VCCT38
VCCT39
VCCT40
VCCT41
VCCT42
VCCT43
VCCT44
VCCT45
VCCT46
VCCT47
VCCT48
VCCT49
VCCT50
VCCT51
VCCT52
VCCT53
VCCT54
VCCT55
VCCT56
VCCT57
VCCT58
VCCT59
VCCT60
VCCT61
VCCT62
VCCT63
VCCT64
VCCT65
VCCT66
VCCT67
VCCT68
VCCT69
VCCT70
VCCT71

B

POWER, GROUND AND NC

C47

C20

2

CPU_CORE

+ C92
220U_E
6.3V

+ C93
220U_E
6.3V

+ C94
220U_E
6.3V

+ C4
220U_E
6.3V

+ C9
220U_E
6.3V

VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VID4
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VID3
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VID0
VID1
VID2
VSS159
VSS160
VSS161
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24

2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805

+ C8
220U_E
6.3V

R12
R14
R16
R20
T3
T5
T7
T9
T11
T13
T15
T18
T19
U8
U10
U12
U14
U16
U20
V3
V19
W4
W18
Y3
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y19
AA4
AA13
AA20
AB3
AB4
AB5
AB9
AB11
AB13
AB14
AB17
AC1
AC2
AC4
AC5
AC10
AC14
AC16
AC18
AC21
AD1
AD2
AD3
AD4
AD5
AD16
AD21

4

3

CPU_VID4

CPU_VID3

CPU_VID0
CPU_VID1
CPU_VID2

A15
A16
A17
C14
D8
D14
D16
E15
G2
G5
G18
H3
H5
J5
M4
M5
P3
P4
AA5
AA19
AC3
AC17
AC20
AD15

2

MICRO-PGA
CPU_CORE

CPU_VID[0..4]

2 CPU_VID[0..4]

1

+ C7
220U_E
6.3V

+ C6
220U_E
6.3V

Compal Electronics, Inc.
Title
Mobile Coppermine Processor in Micro-BGA2

MICRO-PGA

A

COPPERMINE

1

1

1

CPU_CORE
1

CMOSREF1
CMOSREF2

.1UF

2

R2
AD19

9 IST_CPU_PERF#

CPU_IO

AA9
AD18

.1UF

2

CMOSREF

.1UF

1

2K_1%_0603

.1UF

2

CLKREF

.1UF

CPU_IO

1

RSVD

.1UF

C348

.1UF

2

P2

1

2

CLKREF

.1UF

.1UF

.1UF

2

AB19

.1UF

2

2

.1UF

1
1K_1%_0603

C364

.1UF

C276 C291 C306 C246 C247 C248 C249 C245 C321

1

R269

C235 C320
.1UF

1

2
1

R238

1

2

2

1

R268
2K_1%_0603

1

R246
1.5K_1%_0603

.1UF

.1UF

2

2

+2.5V_CLK

2

+2.5V_CLK

POWER,
GROUND,
RESERVED
SIGNALS

.1UF

CPU_IO

2

3

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49

.1UF

1

CPU_CORE

COPPERMINE

C264 C282 C297 C312 C328 C345 C344 C343 C342 C258

2

H8
H10
H12
H14
H16
J7
J9
J11
J13
J15
K8
K10
K12
K14
K16
L7
L9
L11
L13
L15
M8
M10
M12
M14
M16
N7
N9
N11
N13
N15
P8
P10
P12
P14
P16
R7
R9
R11
R13
R15
T8
T10
T12
T14
T16
U7
U9
U11
U13
U15

VREF0
VREF1
VREF2
VREF3
VREF4
VREF5
VREF6
VREF7

U7C

1

4.7U_0805

PLL ANALOG VOLTAGE

A2
A7
A8
A12
A21
B1
B5
B6
B7
B8
B10
B15
B18
C9
C11
C15
C16
C19
D2
D6
D7
D9
E3
E7
E8
E9
E10
E11
E13
E19
F3
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F20
G3
G19
H2
H7
H9
H11
H13
H15
H20
J4
J8
J10
J12
J14
J16
J19
K2
K7
K9
K11
K13
K15
K20
L5
L8
L10
L12
L14
L16
L19
M7
M9
M11
M13
M15
M20
N2
N3
N4
N8
N10
N12
N14
N16
N18
N19
N20
P5
P7
P9
P11
P13
P15
P19
R3
R4
R5
R8
R10

2

2

2

2

.1UF

CPU_IO
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101

1

.1UF

E5
E16
E17
F5
F17
U5
Y17
Y18

VCCA
VSSA

2

.1UF

L2
M2

1

1

1

C357 C356 C226
2

C250
2

R199
2K_1%_0603

1

1

VCCTREF
1

CPU_IO
4

.1UF

2

VCCTREF

U7B

C362

33U_D
VCCT_VSSA

E

2

1

VCCT_VCCA

2
4.7Uh

+ C91

1
2
R208
1K_1%_0603

D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.
ONTAINS
AND C CONFIDENTIAL AND
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
PETENT
COMDIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE ATION
INFORM
IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OFALCOMP
ELECTRONICS, INC.

2

1
L3

CPU_IO

C

C

D

Size
B

Document Number
888M1

Date:

Tuesday, April 24, 2001

Rev
1.0
Sheet
E

3

of

38

A

B

C

D

E

GMCH2-M-1/3(GTL+,AGP,HUB)
2

HD#[0..63]

HD#[0..63]

HA#[3..31]

HA#[3..31] 2
12

GAD[0..31]

GAD[0..31]

U6A

U6C
@33
+GTLREF

AA7

HCLK_GMCH 11

H3
U18D
74LVC125

CPURST#
HLOCK#
DEFER#
ADS#
BNR#
BPRI#
DBSY#
DRDY#
HIT#
HITM#
HTRDY#

HOST

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
RS#0
RS#1
RS#2

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

2
C251 @18PF

AA5
L4
M3
G1
N4
M5
J3
J1
K1
L3
K3

CPURST#
HLOCK#
DEFER#
ADS#
BNR#
BPRI#
DBSY#
DRDY#
HIT#
HITM#
HTRDY#

R4
P1
T2
R3
N5
P5
R1
U1
P2
T1
T3
P3
T5
R5
V5
Y2
V3
W1
U4
V2
W3
W4
U5
Y5
Y3
U3
Y1
W5
V1

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

M1
N1
M2
L5
N3

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

K2
L1
H1

RS#0
RS#1
RS#2

2
2
2
2
2
2
2
2
2
2
2

11

12

PCIRST#

8,12,14,15,16,17,18,20,22,27,30

+3V POWER

12
12
12
12

HREQ#[0..4]

RS#[0..2]

HREQ#[0..4]

2

GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#
PIPE#

12
12
12
12
12
12

AD_STBA
AD_STBA#
AD_STBB
AD_STBB#
SBSTB
SBSTB#

12
12

RBF#
WBF#

12 AGP_VGAREF
RS#[0..2]

H23
N21
T25
Y26

GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3

12
12
12
12
12
12
12
12
12

2

K26
J22
K25
J21
L24
J20
L26
K23
K22
M25
M24
M26
M21
N24
N22
N26
T26
T22
U24
T23
U26
T24
V24
U21
V25
V21
V26
W21
W24
W22
W26
Y21

GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#
PIPE#

R26
P26
P23
P21
P25
R24
AE26
AD25
AC26

AD_STBA
AD_STBA#
AD_STBB
AD_STBB#
SBSTB
SBSTB#

M22
L23
U22
V23
Y23
AA24

RBF#
WBF#

AD26
AB24

AGP_VGAREF
J24
1
2 GRCOMP J26
R50
36.5_1%_0603 G10
R22
P22

G_AD0/LDQM0
G_AD1/LMD4
G_AD2/LMD7
G_AD3/LMD3
G_AD4/LMD6
G_AD5/LMD2
G_AD6/LMD5
G_AD7/LMD1
G_AD8/LMD0
G_AD9/LMA4
G_AD10/LDQM1
G_AD11/LMA2
G_AD12/LMD8
G_AD13/LMA5
G_AD14/LMD9
G_AD15/MA1
G_AD16/LMA8
G_AD17/LMD14
G_AD18/LMA11/LBA
G_AD19/LMD15
G_AD20/LMA9
G_AD21/LMD16
G_AD22/LMA0
G_AD23/LMD17
G_AD24/LCKE
G_AD25/LMD18
G_AD26/LCAS#
G_AD27/LMD19
G_AD28/LTCLK1
G_AD29/LMD20
G_AD30/LTCLK0
G_AD31/LMD21

LTVD0
LTVD1
LTVD2
LTVD3
LTVD4
LTVD5
LTVD6
LTVD7
LTVD8
LTVD9
LTVD10
LTVD11
BLANK#
TVCLKIN/STALL
CLKOUT0
CLKOUT1
LTVVSYNC
LTVHSYNC
LTVDA
LTVCK
DDCK
DDDA
DCLKREF
IWASTE
IREF
VSYNC
HSYNC
RED
GREEN
BLUE

G_C/BE#0/LMA3
G_C/BE#1/LMD10
G_C/BE#2/LMD13
G_C/BE#3/LRAS#
G_FRAME#/LMA10
G_DEVSEL#/LMD11
G_IRDY#/LMD12
G_TRDY#/LMA7
G_STOP#/LCS#
G_PAR/LMA6
G_REQ#/LMD27
G_GNT#
PIPE#/LMD24

HLCLK
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HLREF
HLPSTRB
HLPSTRB#
HLZCOMP

HUB

AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
SB_STB
SB_STB#

SBA0/LMD31
SBA1/LMD25
SBA2/LDQM2
SBA3/LMD26
SBA4/LMD23
SBA5/LWE#
SBA6/LMD22
SBA7/LGM_FRQ_SEL

RBF#/LMD30
WBF#
AGPREF
GRCOMP
NC

ST0/LMD28
ST1/LDQM3
ST2/LMD29

LOCLK
LRCLK

AD16
AF17
AE17
AD17
AF18
AD18
AF20
AD20
AC20
AF21
AE21
AD21
AB19
AC18
AE19
AF19
AC16
AB17
AA20
AB21
AB18
AA18
AE24
Y20
AD23

1

+1_8VS
1
R428

2
2.2K
+3V

1
R187

2
4.7K

1
R185

2
10K

GMCH_IREF

1
R186

2
4.7K

1
R184
1
R193
1
R183

2
10K
2
4.7K
2
174_1%_0603

AF22
AF23
AD22
AE22
AE23
CLK_HUB_GMCH
F22
CLK_HUB_GMCH
HL0
H24
HL1
H26
HL2
H25
HL3
G24
HL4
F24
HL5
E26
HL6
E25
HL7
D26
HL8
D25
HL9
D24
HL10
C26
HUBREF
H21
HUBREF
HL_STB
G25
HL_STB
HL_STB#
F26
HL_STB#
H20 +GMCH_HLCOMP 1
2
+1_8VS
R237
36.5_1%_0603
AB22
AB25
AB23
AB26
AA22
AA26
Y22
Y25

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

AD24
AC24
AC23

ST0
ST1
ST2

ST0
ST1
ST2

11

2

HUBREF
1

RSTIN#

1
R205

DVO

HCLKIN

U6
AA10

C341
.1UF

2

2

GTLREFA
GTLREFB

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

AGP

1

AA1
AB2
AF2
AD4
AB1
AB3
AA3
AC4
AC1
AF3
AD1
AE3
AD2
AD3
AF1
AA4
AD6
AC3
AE1
AB6
AF4
AE5
AC8
AB5
AF5
AC6
AF6
AD11
AF8
AD8
AD5
AB7
AF7
AD7
AB8
AE7
AE9
AB9
AF9
AD10
AF12
AB11
AB10
AD9
AC10
AF10
AD14
AD12
AB12
AE11
AE15
AF11
AF13
AB14
AF14
AB13
AB15
AE13
AC14
AD13
AD15
AF16
AF15
AC12

13

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

8
8
8

12
12
12

GMCH2v0
HL[0..10]

GMCH2v0

SBA[0..7]
3

TYPEDET#

+VDDQ

AGP-REF

0

1.5V

0.5VDDQ

1

3.3V

0.4VDDQ

HL[0..10]

8

SBA[0..7]

12

+1_5VS

1

1

C26
470PF
R30
1K_1%_0603

R29
82_1%_0603

1

AGP_NBREF
1

AGP_NBREF

R255
@33

1

1

12

2

2

CLK_HUB_GMCH
CPU_IO

C39

C358

470PF

1

C267

C230

.1UF

.1UF

Place reference circuitry near GMC

1
8.2K
1
8.2K
1
8.2K
1
8.2K
1
8.2K
1
8.2K
1
8.2K
1
8.2K
1
8.2K
1
8.2K
1
8.2K
1
8.2K
1
8.2K

GPAR

1
100K
1
8.2K
1
8.2K
1
8.2K

2
R95
2
R101
AD_STBB# 2
R76
SBSTB#
2
R69

4

H2-M

Compal Electronics, Inc.

2

R231
2K_1%_0603

2

@22PF

+GTLREF

3

2
R88
GIRDY#
2
R293
GDEVSEL#2
R300
GSTOP# 2
R91
AD_STBA 2
R312
AD_STBB 2
R292
GFRAME# 2
R83
GREQ#
2
R273
GGNT#
2
R64
SBSTB
2
R282
RBF#
2
R280
PIPE#
2
R66
WBF#
2
R68

AD_STBA#

2

2

4

R35
82_1%_0603
12

R36
1K_1%_0603
2

R230
1K_1%_0603

+1_5VS
GTRDY#

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, AND
INC.
CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E
Size
OFCOMPETENT
TH
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I
IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF
ELECTRONICS, INC.
Date:
A

B

C

D

GMCH2-M-1/3(GTL+,AGP,HUB)
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet
E

4

of

38

A

B

C

D

E

GMCH2-M-2/3(SDRAM)
7

MD[0..63]

MD[0..63]

U6B
RP25
MD46
MD47
MD43
MD44
MD45
MD40
MD41
MD42

1
2
3
4
5
6
7
8

RP26
16
15
14
13
12
11
10
9

MMD46
MMD47
MMD43
MMD44
MMD45
MMD40
MMD41
MMD42

MD38
MD39
MD36
MD37
MD34
MD35
MD33
MD32

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10
9

MMD38
MMD39
MMD36
MMD37
MMD34
MMD35
MMD33
MMD32

1

16P8R-10

16P8R-10

RP10
MD10
MD9
MD8
MD12
MD11
MD13
MD14
MD15

1
2
3
4
5
6
7
8

RP9
16
15
14
13
12
11
10
9

MMD10
MMD9
MMD8
MMD12
MMD11
MMD13
MMD14
MMD15

MD1
MD0
MD2
MD4
MD3
MD7
MD6
MD5

1
2
3
4
5
6
7
8

16P8R-10

1
2
3
4
5
6
7
8

RP11
16
15
14
13
12
11
10
9

MMD31
MMD63
MMD30
MMD62
MMD29
MMD61
MMD28
MMD60

MD53
MD21
MD54
MD22
MD55
MD23
MD48
MD16

1
2
3
4
5
6
7
8

16P8R-10

MD52
MD20
MD19
MD51
MD18
MD50
MD17
MD49

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10
9

MMD53
MMD21
MMD54
MMD22
MMD55
MMD23
MMD48
MMD16

16P8R-10

RP24
2

MMD1
MMD0
MMD2
MMD4
MMD3
MMD7
MMD6
MMD5

16P8R-10

RP23
MD31
MD63
MD30
MD62
MD29
MD61
MD28
MD60

16
15
14
13
12
11
10
9

RP12
16
15
14
13
12
11
10
9

MMD52
MMD20
MMD19
MMD51
MMD18
MMD50
MMD17
MMD49

MD24
MD27
MD59
MD56
MD26
MD58
MD25
MD57

1
2
3
4
5
6
7
8

16P8R-10

16
15
14
13
12
11
10
9

MMD24
MMD27
MMD59
MMD56
MMD26
MMD58
MMD25
MMD57

16P8R-10

D23
C23
D22
F21
E21
G20
F20
D20
F19
E19
D19
E18
B18
F18
G18
D17
A3
A1
C1
F2
G3
D6
C5
B4
D4
C2
D3
E4
F5
G4
J6
K5
A26
A25
B24
A24
B23
A23
C22
A22
D21
B21
A21
C20
B20
A20
C19
A19
A4
A2
B1
E1
G2
E6
D5
C4
B3
D2
E3
F4
F6
G5
H4
J4

SMD0
SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7
SMD8
SMD9
SMD10
SMD11
SMD12
SMD13
SMD14
SMD15
SMD16
SMD17
SMD18
SMD19
SMD20
SMD21
SMD22
SMD23
SMD24
SMD25
SMD26
SMD27
SMD28
SMD29
SMD30
SMD31
SMD32
SMD33
SMD34
SMD35
SMD36
SMD37
SMD38
SMD39
SMD40
SMD41
SMD42
SMD43
SMD44
SMD45
SMD46
SMD47
SMD48
SMD49
SMD50
SMD51
SMD52
SMD53
SMD54
SMD55
SMD56
SMD57
SMD58
SMD59
SMD60
SMD61
SMD62
SMD63

SMAA0
SMAA1
SMAA2
SMAA3
SMAA4
SMAA5
SMAA6
SMAA7
SMAA8
SMAA9
SMAA10
SMAA11
SMAA12
SMAB#4
SMAB#5
SMAB#6
SMAB#7
SMAC#4
SMAC#5
SMAC#6
SMAC#7

MEMORY

MMD0
MMD1
MMD2
MMD3
MMD4
MMD5
MMD6
MMD7
MMD8
MMD9
MMD10
MMD11
MMD12
MMD13
MMD14
MMD15
MMD16
MMD17
MMD18
MMD19
MMD20
MMD21
MMD22
MMD23
MMD24
MMD25
MMD26
MMD27
MMD28
MMD29
MMD30
MMD31
MMD32
MMD33
MMD34
MMD35
MMD36
MMD37
MMD38
MMD39
MMD40
MMD41
MMD42
MMD43
MMD44
MMD45
MMD46
MMD47
MMD48
MMD49
MMD50
MMD51
MMD52
MMD53
MMD54
MMD55
MMD56
MMD57
MMD58
MMD59
MMD60
MMD61
MMD62
MMD63

SBS0
SBS1
SCSA#0
SCSA#1
SCSA#2
SCSA#3
SCSA#4
SCSA#5
SCSB#0
SCSB#1
SCSB#2
SCSB#3
SCSB#4
SCSB#5
SRAS#
SCAS#
SWE#
SCKE0
SCKE1
SCKE2
SCKE3
SCKE4
SCKE5
SCLK
SDQM0
SDQM1
SDQM2
SDQM3
SDQM4
SDQM5
SDQM6
SDQM7
SRCOMP

MAA0
MAA1
MAA2
MAA3

D13
B16
F12
A16
B12
A12
C11
A11
D12
C13
E11
A13
B7

MAA8
MAA9
MAA10
MAA11
MAA12

B15
A15
C14
A14

SMAB#4
SMAB#5
SMAB#6
SMAB#7

B10
A10
C10
A9

SMAC#4
SMAC#5
SMAC#6
SMAC#7

B13
D11

SBS0
SBS1

D15
A17
D14
E14
E13
B17

CSA#2
CSA#3
CSA#4
CSA#5

SMAB#6
SMAB#7
SMAB#4
SMAB#5
RP13
SMAC#6
SMAC#4
SMAC#5
SMAC#7
RP27

1
2
3
4

8
7
6
5
8P4R-10
8 MAC#6
7 MAC#4
6 MAC#5
5 MAC#7
8P4R-10

1
2
3
4

MAA0
MAA1
MAA2
MAA3

7
7
7
7

MAA8
MAA9
MAA10
MAA11
MAA12

7
7
7
7
7

MAB#6
MAB#7
MAB#4
MAB#5

7
7
7
7

MAC#6
MAC#4
MAC#5
MAC#7

7
7
7
7

SBS0
SBS1

7
7

CSA#2
CSA#3
CSA#4
CSA#5

7
7
7
7

1

F9
F8
D10
D9
B9
A8
2

C16
D18
E16

SRASA#
SCASA#
RMWEA#

D8
E8
E9
D7
C8
C7

CKE2
CKE3
CKE4
CKE5

F7

CLK_MEM_GMCH

D16
F15
A7
A6
A18
C17
B6
A5

DQM#0
DQM#1
DQM#2
DQM#3
DQM#4
DQM#5
DQM#6
DQM#7

G7

SRCOMP

SRASA# 7
SCASA# 7
RMWEA# 7

CKE2
CKE3
CKE4
CKE5

7
7
7
7

CLK_MEM_GMCH 11
DQM#0
DQM#1
DQM#2
DQM#3
DQM#4
DQM#5
DQM#6
DQM#7
1
R239

2
36.5_1%_0603

7
7
7
7
7
7
7
7

+3V

GMCH2v0

Power-Up Strap Options
SCAS#

SWE#

Host Freq.

Host Freq.

Configuration

Interface

"H" : 133MHz (Default)

System

"L" : 100MHz

Memory

"H" : 100MHz (Default)

System

"L" : 66MHz

Memory

SMAA11

IOQ Depth

"H" : 4 (Default)

System

"L" : 1

Memory

SMAA10

ALL Z

"H" : Normal

System

"L" : All Z

Memory

SMAA9

FSB P-MOS Kicker Enable

"H" : Enabled (Default)

System

"L" : Disabled (Cumine)

Memory

SMAC6#

Enable VCH Serial
Programming
Mode
Enable Quick Start
Support

"H" : Enabled (Default)

System

"L" : Disabled

Memory

SMAC5#

4

VGA_LFSEL#

Local Memory Freq. Select

"H" : Disabled
(Stop Grant Mode)
"L" : Enabled (Default)
(Quick Start Mode)
"H" : 133MHz (Default)

Internal
3

PULL_UP

PULL_UP
PULL_UP
PULL_UP
PULL_UP

RMWEA#

R259

1

2 @10K

SCASA#

R263

1

2 10K

SBS0

R267

1

2 10K

System

MAA9

R264

1

2 10K

Memory

SMAC#5

R270

1

2 10K

SMAC#6

R266

1

2 10K

AGP/LM

CLK_MEM_GMCH
1

3

Strap Description

R254

PULL_UP

@33
2

Pin Name

PULL_UP

C352
@22PF
4

i815/i815-m

"L" : 100MHz

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, AND
INC.
CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E
Size
OFCOMPETENT
TH
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I
IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF
ELECTRONICS, INC.
Date:
A

B

C

D

GMCH2-M-2/3(SDRAM)
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet
E

5

of

38

A

B

C

D

E

GMCH2-M-3/3(Power)
Please make sre the ESR and art
p nmber

+1_8VS

+1_8VS

+1_8VS

4

POWER/GND

3

C274
+

2

150UF_E
6.3V

C236
22UF_10V_1206

.1UF

C219
.1UF

C221

C231

C304

C353

C354

C366

C360

C350

C234

C224

C227

82PF

.1UF

.1UF

82PF

.1UF

.1UF

82PF

.1UF

.1UF

.1UF

.1UF

2
C232
.1UF

1

L26
68nH
+VCCDA
C257

4.7UF_0805

C256
22UF_1206

+3V

+3V

2

+

C74
150UF_E
6.3V

C337

C347

C346

C338

C340

C339

C372

C365

C371

C368

C369

C370

C367

C359

4.7UF_0805

.01UF

.01UF

82PF

.01UF

.01UF

82PF

.01UF

.01UF

82PF

.01UF

.01UF

.01UF

.01UF

+1_5VS

K20
Y24
L21
M23
U25
N25
R21
U20
U23
W20

+1_5VS
C289
+
22UF_10V_1206

1
R203

2
10K

C252

C283

C305

C322

C298

C237

C268

C275

.1UF

.1UF

.1UF

.1UF

.1UF

82PF

82PF

82PF

+3V

3

PIN#

DT_GMCH

GMCH2-M

E7

VSS (GND)

AGPBUSY# (OUTPUT)

AA6

V_1.8 (1.8V)

RESERVED (1.8V)

Y17

VSS (GND)

INTRPT# (INPUT)

AC18

LTVCLKIN (INPUT)

LTVCLKIN/STALL (INPUT)

4

GMCH2v0

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, AND
INC.
CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E
Size
OFCOMPETENT
TH
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I
IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF
ELECTRONICS, INC.
Date:
A

B

1

+1_8VS

B2
B5
B8
B11
B14
B19
B22
B25
E2
F10
F14
F17
G6
G8
G19
H2
H5
H7

Y17
E7
M14
M15
M16
N2
N6
N11
N12
N13
N14
N15
N16
N23
P4
AA23
F16
F25
G9
G17
G21
G23
P24
H6
H22
J2
J5
J23
J25
K4
K21
L2
L6
L11
L12
L13
L14
AA25
W7

C5

+

1

AE25
AF24
E22
Y8
AB4
M13
AC2
AC5
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC25
AE2
AE4
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
B26
C3
C6
C9
C12
C15
C18
C21
C24
D1
E5
E10
E12
E15
E17
E20
F1
F3
F11
F13
T21
U2
U7
K24
V4
V6
V20
V22
W2
W23
W25
Y4
Y6
Y10
Y19
AA2
AA9
AA12
AA14
AA16
P11
P12
P13
P14
P15
P16
R2
R6
R11
R12
R13
R14
R15
R16
R23
R25
T4
T11
T12
T13
T14
T15
T16
L15
L16
L22
L25
M4
M11
M12

2

.1UF

1

2

C331

2

4.7UF_0805

1

C329

2

+

2

4.7UF_0805

W6
G26
M6
P6
Y9
Y18
AA8
AA11
AA13
AA15
AA17
AA19
AB16
AB20
AC22
AD19
C25
E24
F23
G22
K6
Y7
AA21
E23
AF26
AF25
AA6
V7
T6

1

C314

VCC1_8
VCC1_8
VCC1_8
VCC1_8
GND/VSSDACA1
GND/VSSDACA2
VCC1_8
GND/VSSBA
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
GND
VCC1_8
VCCDA/(VCC1_8)
GND
VCCBA/(VCC1_8)
GND
VCCDACA1/(VCC1_8)
GND
VCCDACA2/(VCC1_8)
GND
HCLK#
GND
VCC1_8
GND
VCC1_8
GND
GND
GND
VSUS_3.3_1
GND
VSUS_3.3_2
GND
VSUS_3.3_3
GND
VSUS_3.3_4
GND
VSUS_3.3_5
GND
VSUS_3.3_6
GND
VSUS_3.3_7
GND
VSUS_3.3_8
GND
VSUS_3.3_9
GND
VSUS_3.3_10
GND
VSUS_3.3_11
GND
VSUS_3.3_12
GND
VSUS_3.3_13
GND
VSUS_3.3_14
GND
VSUS_3.3_15
GND
VSUS_3.3_16
GND
VSUS_3.3_17
GND
VSUS_3.3_18
GND
GND
VDDQ
GND
VDDQ
GND
VDDQ
GND
GND
VDDQ
GND
VDDQ
GND
VDDQ
GND
VDDQ
GND
VDDQ
GND
VDDQ
VDDQ
GND
GND
INTRPT#
GND
AGPBUSY#
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

2

+

1

1

VCC1_8/VCCDPLL
GND/VSSDPLL

1

U6D
J7
K7

C

D

GMCH2-M-3/3(Power)
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet
E

6

of

38

A

B

C

D

E

+3V

SO-DIM 144 PINS
RAM MODULE CONN.

BANK2/3

+3V

1

5

MAC#[4..7]

5

MAB#[4..7]

5

MAA[0..12]

5

MD[0..63]

5

DQM#[0..7]

5

CSA#[0..5]

C425
.01UF

C441
1000PF

C456
1000PF

C483
1000PF

C495
1000PF

BANK4/5

+3V

JP27
MD0
MD1
MD2
MD3

MAB#[4..7]
MAA[0..12]

MD4
MD5
MD6
MD7

MD[0..63]
RCAS#[0..7]

DQM#0
DQM#4

RRAS#[0..5]

MAA0
MAA1
MAA2
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39

C512

R384

22PF

33

11 CLK_SDRAM2
5
5

C546
10UF_1206
6.3V

+3V

MAC#[4..7]

2

+

SRASA#
RMWEA#
CSA#2
CSA#3

SRASA#
RMWEA#

MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MAB#6
MAA8
MAA9
MAA10
DQM#2
DQM#6

3

MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
SDADIMM0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

+3V

JP26

VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65

VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69

RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC

RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

MD8
MD9
MD10
MD11

MD0
MD1
MD2
MD3

MD12
MD13
MD14
MD15

MD4
MD5
MD6
MD7

DQM#1
DQM#5

DQM#0
DQM#4

MAA3
MAB#4
MAB#5

MAA0
MAA1
MAA2

MD40
MD41
MD42
MD43

MD32
MD33
MD34
MD35

MD44
MD45
MD46
MD47

MD36
MD37
MD38
MD39

CKE2

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

CKE2

SCASA#
CKE3
MAA12

5

SCASA#
CKE3

C503

R380

22PF

33
SRASA#
RMWEA#
CSA#4
CSA#5

CLK_SDRAM3 11

R377
33

MD24
MD25
MD26
MD27

MD16
MD17
MD18
MD19

C490
22PF

MD28
MD29
MD30
MD31
MAB#7
SBS0

SBS0

SBS1
MAA11

SBS1

MD20
MD21
MD22
MD23
MAC#6
MAA8

5

MAA9
MAA10

5

DQM#3
DQM#7

DQM#2
DQM#6

MD56
MD57
MD58
MD59

MD48
MD49
MD50
MD51

MD60
MD61
MD62
MD63

MD52
MD53
MD54
MD55
+3V

SCKDIMM0

SDADIMM1

C90

SO-DIMM144 REVERSE

VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65

VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69

RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC

RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

MD8
MD9
MD10
MD11

1

MD12
MD13
MD14
MD15
DQM#1
DQM#5
MAA3
MAC#4
MAC#5
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47

2

11 CLK_SDRAM4

5
5

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

CKE4
SCASA#
CKE5
MAA12

CKE4

5

CKE5

5
CLK_SDRAM5 11

R383
33

MD24
MD25
MD26
MD27

C511
22PF

MD28
MD29
MD30
MD31
MAC#7
SBS0
SBS1
MAA11
DQM#3
DQM#7

3

MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
SCKDIMM1

SO-DIMM144-STANDARD
.1UF

+

C411
10UF_1206
6.3V

C539
.1UF

C545
.1UF

C544
.1UF

C538
.1UF

C520
.01UF

C496
.01UF

C481
.01UF

4

U10

16
9

SM_SEL

9,11

SCKP4

9,11

SDAP4

6
10
9
3
13

VCC

+3V

INH
A
B

X0
X1
X2
X3

X
Y

GND
GND

DIMM0

Y0
Y1
Y2
Y3

1
5
2
4

SCKDIMM0
SCKDIMM1

12
14
15
11

SDADIMM0
SDADIMM1

DIMM1
+3V

+

C528
10UF_1206
6.3V

C455
.1UF

C440
.1UF

C424
.1UF

C401
.1UF

C399
.01UF
4

7
8

74HC4052
+3VS

Compal Electronics, Inc.

RP14
1
2
3
4

8
7
6
5

SCKDIMM1
SCKDIMM0
SDADIMM1
SDADIMM0

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:

8P4R-10K
A

B

C

D

S.O. DIMM CONNECTOR
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet
E

7

of

38

A

B

C

D

1

1

ICH-2M
AD[0..31]

14,16,17,18 AD[0..31]

U34A
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

2

C/BE#0
C/BE#1
C/BE#2
C/BE#3

AA3
AB6
Y8
AA9

14,16,17,18 DEVSEL#
14,16,17,18 FRAME#
14,16,17,18 IRDY#
14,16,17,18 TRDY#
14,16,17,18 STOP#
14,16,17,18 PAR
4,12,14,15,16,17,18,20,22,27,30 PCIRST#

AB7
V3
W8
V4
W1
W2
AA15
AA7
W7
Y7
Y15
M3
L2

14,16,17,18
14,16,17,18
14,16,17,18
14,16,17,18

PCIRST#
PLOCK#

14,16,17,18 SERR#
14,16,17,18 PERR#

PCI Pullups

PME# has internal PU
3

RP28
PERR#
REQA#
STOP#
SERR#

1
2
3
4
5

+3VS

10
9
8
7
6

PIRQA#
PIRQB#
REQ#4

AA4
AB4
Y4
W5
W4
Y5
AB3
AA5
AB5
Y3
W6
W3
Y6
Y2
AA6
Y1
V2
AA8
V1
AB8
U4
W9
U3
Y9
U2
AB9
U1
W10
T4
Y10
T3
AA10

20

PIDERST#

REQA#
GNTA#

11

PCLK_ICH

PCLK_ICH

+3VS
18
16
17
14

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
GPI1

REQ#0
REQ#1
REQ#2
REQ#3

10P8R-8.2K

W11
R2
R3
T1
AB10
P4
L3

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

(FW82801BAM)

CPU

HUB
PCI

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRQ

DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PCIRST#
PLOCK#
SERR#
PERR#
PME#
GPI0/REQA#
GPO16/GNTA#
PCICLK
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
GPI1/REQB#/REQ5#

A20M#
CPUSLP#
FERR#
IGNNE#
INIT#
INTR
NMI
SMI#
STPCLK#
RCIN#
A20GATE
CPUPWRGD
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HL11
HL_STB
HL_STB#
HLCOMP
HUBREF
PIRQA#
PIRQB#
PIRQC#
PIRQD#
IRQ14
IRQ15
APICCLK
APICD0
APICD1
SERIRQ
GPI2/PIRQE#
GPI3/PIRQF#
GPI4/PIRQG#
GPI5/PIRQH#

GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
GPO17/GNTB#/GNT5#

D11
A12
R22
A11
C12
C11
B11
B12
C10
B13
C13
A13

A20M#

A4
B5
A5
B6
B7
A8
B8
A9
C8
C6
C7
C5
A6
A7
A3
B4

HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HL11
HL_STB
HL_STB#
+ICH_HLCOMP
HUBREF

P1
P2
P3
N4

PIRQA#
PIRQB#
PIRQC#
PIRQD#

PIRQA#
PIRQB#
PIRQC#
PIRQD#

12,14,18
14
17
16,18

F21
C16
N20
P22
N19
N21

IRQ14
IRQ15
CLK_APIC_ICH
PICD0
PICD1
SIRQ

IRQ14
IRQ15

20
19

SIRQ

14,22,27

N3
N2
N1
M4

GPI2
GPI3
GPI4
GPI5

M2
M1
R4
T2
R1
L4

1
R260

FERR#
IGNNE#
CPUINIT#
INTR
NMI
SMI#
STPCLK#
RC#
GATEA20
CPU_PWRGD

A20M#
2
CPUSLP# 2
FERR#
2
IGNNE#
2
CPUINIT# 2
INTR
2
NMI
2
SMI#
2
STPCLK# 2
RC#
27
GATEA20 27
CPU_PWRGD 2

2
@0

HL[0..10]

HL[0..10]

4

2

HL_STB 4
HL_STB# 4
2
C80

1
.1UF

+1_8VS

HL11

PIN N3, M4 can not use GPIO.

GNT#0
GNT#1
GNT#2
GNT#3
GNT#4
SIDERST#

GNT#0
GNT#1
GNT#2
GNT#3

+ICH_HLCOMP

+3VS

IRQ15

REQ#0

WLAN

REQ#1

LAN

REQ#2

1394

+1_8VS

RP30

REQ#4

1

10P8R-8.2K

REQ#3

GPI2
GPI3
GPI4
GPI5

1
2
C390 470PF

PCMCIA CONTROLLER
NC

R287

1

+3VS

PIRQC#
PIRQD#
SIRQ
PLOCK#

2
@8.2K
2
8.2K
2
8.2K

3

+3VS
SIDERST#
IRQ14

10
9
8
7
6

1
R62
1
R33
1
R236

SIDERST# 20

PCI REQ ASSIGMENT

RP29
1
2
3
4
5

2
@10K
2
36.5_1%_0603

18
16
17
14

ICH-2M
IRDY#
TRDY#
DEVSEL#
FRAME#

1
R272
1
R279

300_1%_0603

R283

1
2
3
4

8
7
6
5

56_1%_0603

+3VS

2
1

R281

R275

R57
RP31

PICD0

2
R21
2
R23
CLK_APIC_ICH 1
R43

56_1%_0603
2

1
2
C380 470PF

C66
1
R60
1
R61

8P4R-8.2K
2
8.2K
2
@1K

1
10K
1
10K
2
0

PICD1
2

8
7
6
5

300_1%_0603

12

1
2
3
4

@33

REQ#0
REQ#1
REQ#2
REQ#3

2

4

1

HUBREF

1

4

HUBREF

2

8P4R-100K
PCLK_ICH

GPI1

@22PF

4

Place divider pair in middle o f bus

GNTA#

Compal Electronics, Inc.

GNTA# Strapping for "A16 swap override" : "0" -> Enable

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, AND
INC.
CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E
Size
OFCOMPETENT
TH
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I
IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF
ELECTRONICS, INC.
Date:

A

B

C

ICH2M-A(PCI,HUB,CPU) & FWH
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001
D

Sheet

8

of

38

PBTN_OUT#

1
D20

ON/OFF

1
D21
1
R53
1
D27
1
R54
1
D29
1
R56
1
D28
1
R52
1
D30

27,30

+3V

1

27,30,32,35 ACIN
+3V
27

ECSMI#
+3V

27

ECSCI#
+3V

27

EC_RIOUT#

2
RB751V
2
10K
2
RB751V
2
10K
2
RB751V
2
10K
2
RB751V
2
10K
2
RB751V

8P4R-15

1
RP7
C45
8P4R-15K

ATF_INT#
SLP_S1#
SLP_S3#
SLP_S5#
SYS_PWROK
PBTN#
ICH_RI#
RSMRST#

AA13
D14
W16
AB18
R20
W21
AA17
R21
W15
AA18
AGP_BUSY#
Y11
A15
C14
CLKRUN#
V21
Y17
INTRUDER#
T19

27
ATF_INT#
11,27
SLP_S1#
27
SLP_S3#
27
SLP_S5#
31 SYS_PWROK

SCI#

ICH_RI#
31
RSMRST#
28
FLASH#
14,15
RTCCLK
12 AGP_BUSY#
11
PCI_STP#
11
CPU_STP#
14,16,17,18,22,27 CLKRUN#
12,22,30 SUS_STAT#

2
J1

R107
1

1

2 2
1K

1
7,11
7,11

SDAP4
SCKP4
ICH_ACIN
SMLINK0
SMLINK1

SDAP4
SCKP4

2

JOPEN

2 +R_VBAIS 1
C228
.047UF_0603

1
R215
X2

R206

12,25 IAC_RST#
12,25 IAC_BITCLK
1

32.768KHZ

C229

25
IAC_SDATAI
12 IAC_SDATAI1
26
SPKR

2

12PF
2

12PF

12
7
20

1
R258

22,27
22,27
22,27
22,27
27
22
22,27

2
@10K

LAD0
LAD1
LAD2
LAD3
LDRQ#0
LDRQ#1
LFRAME#

+RTCVCC

SMLINK0

+3V

SMLINK1

24
24

OVCUR#0
OVCUR#1

24

OVCUR#3

V22
P19
R19
P21
Y22
W22
N22

ICH_AC_SYNC
IAC_BITCLK
ICH_AC_SDOUT
IAC_SDATAI
IAC_SDATAI1
SPKR
EXT_SMI#
DSCACHE#
SCI#
LID#

Y14
AA11
W14
AB15
L1
AB14
AA14

LAD0
LAD1
LAD2
LAD3
LDRQ#0
LDRQ#1
LFRAME#

Y12
W12
AB13
AB12
Y13
W13
AB11
AA12

USBP0+
USBP0USBP1+
USBP1USBP2+
USBP2USBP3+
USBP3-

W17
Y18
AB19
AA19
W18
Y19
AB20
AA20

C3_STAT#
SM_SEL
SYSIDEPWR

3

2
10K
2
10K

T20
T21
U22
T22

2
10M_0603

2
10M_0603
C266

1

1

1
R20
1
R38

AA16
AB16
AB17
U19
V20

+RTCRST#
+VBIAS
RTCX1
RTCX2

2

2

INTRUDER#

W19
Y20
Y21
W20

OVCUR#2
OVCUR#3

BATLOW#
CPUPERF#
SSMUXSEL#
VGATE/VRMPWRGD

THRM#
SLP_S1#
SLP_S3#
SLP_S5#
PWROK
PWRBTN#
RI#
RSMRST#
GPIO25
SUSCLK
AGPBUSY#
STP_PCI#
STP_CPU#
CLKRUN#
SUSSTAT#
INTRUDER#

CLK48
CLK14
CLK66
PDA0
PDA1
PDA2
PDCS1#
PDCS3#

SYSTEM

PDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY

SMBDATA
SMBCLK
SMBALERT#/GPI11
SMLINK0
SMLINK1
RTCRST#
VBIAS
RTCX1
RTCX2

IDE

AC_RST#
AC_SYNC
AC_BIT_CLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
SPKR

AC97

GPI8
GPI7
GPI12
GPI13
C3_STAT#/GPO21
GPIO27
GPIO28
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ0#
LDRQ1#
LFRAME#/FWH4
FSO
USBP0+
USBP0USBP1+
USBP1USBP2+
USBP2USBP3+
USBP3-

GPIO

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDA0
SDA1
SDA2
SDCS1#
SDCS3#

LPC

SDDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY

USB

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

OC0#
OC1#
OC2#
OC3#

1
C37
1
R435
1
R436

RP5
8P4R-15K

USB3_D+
USB3_DUSB1_D+
USB1_D-

24
24
24
24

2
5PF
2
@0
2
@0

USBBT_D+ 24
USBBT_D- 24

U20
B14
A14
B15

BATTLOW#
1
R253
V_GATE

P20
M19
D4

CLK_USB_ICH
CLK_14M_ICH
CLK_HUB_ICH

F20
F19
E22
E21
E19

PDA0
PDA1
PDA2
PDCS1#
PDCS3#

G22
F22
G19
G21
G20

PDDREQ
PDDACK#
PDIOR#
PDIOW#
PDIORDY

H19
H22
J19
J22
K21
L20
M21
M22
L22
L21
K22
K20
J21
J20
H21
H20

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

A16
D16
B16
C15
D15

SDA0
SDA1
SDA2
SDCS1#
SDCS3#

B18
B17
D17
C17
A17

SDDREQ
SDDACK#
SDIOR#
SDIOW#
SDIORDY

D18
B19
D19
A20
C20
C21
D22
E20
D21
C22
D20
B20
C19
A19
C18
A18

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

2
0

IST_CPU_PERF# 3
VR_HI/LO# 2,37
V_GATE 37
CLK_USB_ICH 11
CLK_14M_ICH 11
CLK_HUB_ICH 11
PDA0
PDA1
PDA2
PDCS1#
PDCS3#

20
20
20
20
20

PDDREQ
PDDACK#
PDIOR#
PDIOW#
PDIORDY

20
20
20
20
20

2

PDD[0..15]

PDD[0..15] 20

SDA0
SDA1
SDA2
SDCS1#
SDCS3#

19
19
19
19
19

SDDREQ
SDDACK#
SDIOR#
SDIOW#
SDIORDY

19
19
19
19
19

3

SDD[0..15]

SDD[0..15] 19

ICH-2M

+3VS
V_GATE

12,25 IAC_SYNC

OVCUR#2

SDAP4

22PF

C28

1
R49
1
R22

2
22
2
22

+5VS
ICH_AC_SYNC
PDIORDY
ICH_AC_SDOUT
SDIORDY

22PF

LDRQ#1
CLK_HUB_ICH
1

1

CLK_14M_ICH
1

CLK_USB_ICH
AGP_BUSY#
DSCACHE#

12

@10PF

2

@10PF

C36

4

C83
@10PF

2

R41

IAC_BITCLK

C35

R67
@33

2

12

IAC_BITCLK
1

oot

R44
@33
12

R42
@33

ICH_AC_SDOUT

@33

IAC_SDATAI
2

1
10K
1
10K
1
10K
1
1K

2
1K
2
1K

SCKP4

AC_SDOUT Strapping: "1" -> Safe Mode B
2
R26
2
R40
2
R25
2
R45

1
R46
1
R240

2

C59

1

12,25 IAC_SDATAO

CLKRUN#

1

2
100K
2
10K
2
10K
2
10K
2
10K
2
@10K
1
10K
1
10K
2
@10K

2

1
R55
1
R19
1
R37
1
R248
1
R244
1
R257
2
R261
2
R262
1
R24
4

8P4R-15

USB3_D+
USB3_D-

U34B

EXT_SMI#

R210

2
10K

CP5
8P4C-22PF

2

1

C255
1UF_25V_0805

1
R39

2
5PF

8
7
6
5

CLOSE TO ICH2-M(< 1 inch)

15K

1K

1
2
3
4

ICH_ACIN

R221

1

USBP3+
USBP3USBP1+
USBP1-

21
21
24
24

ICH2M-B(IDE,LPC,GPIO)

CLOSE TO ICH2-M(< 1 inch)

+RTCVCC

1

USB2_D+
USB2_DUSB0_D+
USB0_D-

CP6
8P4C-22PF

PBTN#

2
RB751V

RP6

8
7
6
5

4
3
2
1

LID#

1
2
3
4

8
7
6
5

USBP2+
USBP2USBP0+
USBP0-

D

5PF
1
C42

2

1
2
3
4

27

RP8

BATTLOW#

4
3
2
1

27 EC_LID_OUT#

C

5PF
1
C50

5
6
7
8

+3V

8
7
6
5

LLBATT#

2
10K
2
RB751V
2
10K
2
RB751V

1
2
3
4

27

B

1
R34
1
D22
1
R249
1
D26

5
6
7
8

A

+3V

IAC_SDATAI1

Compal Electronics, Inc.
C34

SPKR

Title

@33PF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, AND
INC.
CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E
Size
OFCOMPETENT
TH
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I
IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF
ELECTRONICS, INC.
Date:

SPKR Strapping: "0" -> No Reboot
A

B

C

ICH2M-B(IDE,LPC,GPIO)
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001
D

Sheet

9

of

38

A

B

C

D

ICH2M-C(LAN,Power) & Pull-Up

2

1

C49

C51
.1UF

2

.1UF

2

.1UF

2

.1UF

C46

2

C43

1

1

1

+3V

.1UF

1

1

C53

C56
1000PF

C57
1000PF

2

.1UF

2

C77

2

.1UF

1

1

C75

2

2

.1UF

2

C62

1

C52
.1UF

2

2

.1UF

1

C71

4.7UF_10V_0805

2

1

C376
+

3

1

1

+3VS

.1UF

1

C79

C76
1000PF

C69
1000PF

V14
V15
V16
T18
U18
H5
J5

VCCSUS3_3_1
VCCSUS3_3_2
VCCLAN1_8_1
VCCLAN1_8_2

F5
G5

VCCLAN3_3_1
VCCLAN3_3_2

+5VS

2

1
R222
1K

+VCC5REF

+1_8V

C265

2

1

D19
1SS355

1

K2
M20

V5REF1
V5REF2
VCCSUS1_8_1
VCCSUS1_8_2
VCCSUS1_8_3

+3VS

C30

1UF_0805 .1UF
2

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71

1

E14
E15
E16
E17
E18
F18
G18
H18
J18
P18
R18
R5
T5
U5
V5
V6
V7
V8

VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18

1

A1
A2
A10
B1
B2
B3
B9
B10
C2
C3
C4
C9
D5
D6
D7
D8
D9
E6
E7
E8
E9
J10
J11
J12
J13
J14
J9
K10
K11
K12
K13
K14
K9
L10
L11
L12
L13
L14
L9
M10
M11
M12
M13
M14
M9
N10
N11
N12
P9
P14
P13
P12
P11
P10
N9
N14
N13
A21
A22
B21
B22
AA1
AA2
AA21
AA22
AB1
AB2
AB21
AB22
K1
D3

VCC1_8_1
VCC1_8_2
VCC1_8_3
VCC1_8_4
VCC1_8_5
VCC1_8_6

+3V
LAN_1.8V 1
R63
LAN_3V

1
R271

2

+1_8V

2

+3V

0
0

2

V17
V18

VCCSUS3_3_3
VCCSUS3_3_4

D12
D13

V_CPU_IO_1
V_CPU_IO_2

D2

VCC1_8_7
VCCRTC
V5REF_SUS

CPU_IO
+1_8VS

U21

VCCRTC

V19

+3V

1
R27

2
1K
1

C29

EEPROM

K4
J3
J4
K3

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

1
R74

+RTCVCC

2
.1UF

2
@10K

LAN
G3
G2
G1
H1
F3
F2
F1
H2
Y16

LAN_CLK
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
LAN_RSTSYNC
LAN_PWROK

3

2

.1UF

1

C68

2

.1UF

1

1

C55

2

.1UF

2

C54

2

10UF_1206

1

C290

2

2

10UF_1206

2

+ C386

1

1

1

+1_8VS

+3VS

U34C
D10
E5
K19
L19
P5
V9

2

+1_8VS

1

ICH-2M

2

1

C61
.1UF

C65
.1UF

2

.1UF
4

CPU_IO

4

2

C63

1

1

+1_8V

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, AND
INC.
CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E
Size
OFCOMPETENT
TH
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I
IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF
ELECTRONICS, INC.
Date:
A

B

C

ICH2M-C(LAN,Power) & Pull-Up
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001
D

Sheet

10

of

38

A

B

C

D

E

F

G

H

Clock Generator

+3V_CLK

C96

C102

1

C105

1

C103

1

C101

1

C95

1

C87

1

+3V_CLK
1

L2
1
2
BLM21A601SPT

1

+3VS

C104

1

L1
2
1
BLM21A601SPT

+2.5V_CLKS
.1UF

1

+2.5V_CLK

2

2

.1UF

1

C88
.1UF

C85
4.7UF_10V_0805

2

C89

1

1

2

.1UF
2

.1UF
2

.1UF
2

.1UF
2

.1UF
2

.1UF
2

2

4.7UF_10V_0805

3

CK133-XOUT

4

X1

CLK_14M_ICH

22

14.3M_SIO

9
8
22
16
14
17
18
27

PCI_STP#
PCLK_ICH
PCLK_SIO
PCLK_LAN
PCLK_PCM
PCLK_1394
PCLK_MINI
PCLK_EC

2
R72
2
R71

1
33
1
33

1
R81
1
R85
1
R89
1
R93

2
33
2
33
2
33
2
33

1
R98

2
33

1
R102
1
R103

2
8.2K
2
10K

1
R80
1
R84
1
R92

2
33
2
33
2
33

SEL0
SEL1
CLK_14M

28
29
1

PCISTP#
CLK_ICH
CLK_PCI1
CLK_LAN
CLK_SIO
CLK_1394
CLK_MINI
CLK_EC

11
12
13
15
16
18
19
20

CLK_USB

25
26

51
53

22
17
2
10
37
27
44
35

X2

18PF
9

SEL0
SEL1(TRIST#)
REF0/(SEL1)

PCI_STP#/(VCC3)
PCI_F(PCI0_ICH)
PCI1
PCI2
PCI3
PCI4
PCI5
PCI6

APIC0
APIC1
CPU0
CPU1
CPU2(ITP)
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5

VCH_CLK/(SDRAM7)

2

CLK_USB_ICH

+3V_CLK
SLP_S1#
SDAP4
SCKP4

+3V_CLK

1
R97

33
32

2
0
SDACG
SCKCG

30
31

TEST#/(VCC3)
PWR_DWN#
SDATA
SCLK

DCLK/(VCC3)
CPU_STP#(DCLK)

5
6
14
21
24
41
47
48
56

9,27
7,9
7,9

3V66_AGP
3V66_1
3V66_0

USB(48M)
DOT(48M)

TSSOP-56

55
54
52
50
49
46
45
43
42
40
39

HCLK1
HCLK2

SDRAM2
SDRAM3
SDRAM4
SDRAM5

R73

2 33

1

R75

1
R86
1
R90

2
10
2
10

9
8
7

CLK_3V66_AGP
CLK_3V66_1
1
CLK_3V66_0
R77

2
33

38
34

DCLK

HCLK_CPU 2
HCLK_GMCH 4

2 33

1

1
R82
1
R87

2
10
2
10

CLK_SDRAM2
CLK_SDRAM3
CLK_SDRAM4
CLK_SDRAM5

1
R79
1
R78

2
33
2
33

AGP_CLK 12
CLK_HUB_GMCH 4
CLK_HUB_ICH 9

7
7
7
7

36

1
R94

2
33

2

CLK_MEM_GMCH 5
CPU_STP# 9

GND
GND
GND
GND
GND
GND
GND
GND
GND

9

U9

VCC2
VCC2

Y1
14.318MHZ

2

1

2

C84
2

CK133-XIN

VDDA
VCC3
VCC3
VCC3
VCC3/(SDRAM6)
VCC3
VCC3
VCC3

R70
2M_0603

GNDA

18PF

23

1

1

2

1

C86

CK133-SOLANO2-M

SA092500000

SEL1 SEL0

ICS 9 250AG-31

*
3

PSB

SDRAM

0

0

66

100

0

1

100

100

1

0

133

133

1

1

133

100

1

+3V_CLK

1

+3V_CLK

3

R104

R100
@10K
2

2

10K

SEL1
2

SEL0

1

R96
1K

4

4

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, AND
INC.
CONTAINS CONFIDENTIAL AND
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY E
Size
OFCOMPETENT
TH
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR NFORMATION
THE I
IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENTCOMPAL
OF
ELECTRONICS, INC.
Date:
A

B

C

D

E

F

Clock Generator
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001
G

Sheet

11
H

of

38

5

4

3

2

1

KSI[0..7]

27

KSI[0..7]

27

KSO[0..15]

KS0[0..15]

JP8
JP11

C

11

SBSTB

SBA4
SBA6
AGP_CLK

AGP_CLK

GAD31
GAD29
GAD27
GAD25
4

AD_STBB
GAD23
GAD21
GAD19
GAD17

4

GC/BE#2

4
4

GIRDY#
GDEVSEL#

4

GC/BE#1

4

AD_STBA

9

C3_STAT#

4

AGP_NBREF

GAD14
GAD12
GAD10
GAD8

GAD7
GAD5
GAD3
GAD1

B

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120

CRMA
13
LUMA
13
COMPS
13
TV_SYNC 13
PID0
22
PID1
22
PID2
22
PID3
22
INVT_PWM 27
+5VALW
ENBKL
27
ENVEE
27
+1_5V

+2.5V

+1_5V
C375
+

+1_5VS
PIRQA#
PCIRST#
GGNT#
ST1
PIPE#
WBF#

8,14,18
4,8,14,15,16,17,18,20,22,27,30
4
4
4
4

SBSTB#

4

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

+3V

22UF_10V_1206

27

KSI0
KSI2
KSI4
KSI6
KSO0
KSO2
KSO4
KSO6
KSO8
KSO10
KSO12
KSO14

+3VS
+5VS
TP_DATA

D

+12V
+3V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

KSI1
KSI3
KSI5
KSI7
KSO1
KSO3
KSO5
KSO7
KSO9
KSO11
KSO13
KSO15
+5V
TP_CLK

27

HEADER 2X20

SBA1
SBA3
SBA5
SBA7

+3.3VAUX

+3VS_MDC

GAD30
GAD28
GAD26
GAD24

GC/BE#3 4

C450

AD_STBB# 4

C443

1UF_0805

1UF_0805

C

C115
1UF_0805

JP13

GAD22
GAD20
GAD18
GAD16

25

GFRAME#
GTRDY#
GSTOP#
GPAR

+5VS_MDC
1

SBA0
SBA2
4

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120

2

9,22,30 SUS_STAT#
9
AGP_BUSY#
4
GREQ#
4
ST0
4
ST2
4
RBF#

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119

1

+1_5VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119

2

R
G
B
HSYNC1
VSYNC1
DDC_DATA
DDC_CLK
DDC_MD2
M_SEN#
+5VALW
27
DAC_BRIG
14,15,16,17,18 CBRST#
+1_5V

1

13
13
13
13
13
13
13
13
13

2

D

4
4
4
4

MD_MIC

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

+3.3VAUX

GAD15
GAD13
GAD11
GAD9

+3VS
9,25 IAC_SDATAO
9,25
IAC_RST#

1
L35

2 +3VS_MDC
CHB1608U121

AD_STBA# 4

MDC_DN# 28
MD_SPK 25

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

+5VS_MDC 1
L5
1
R112

2
CHB1608U121

+5VS

2
10K

+3VS

IAC_SYNC 9,25
1
R108
1
R106

2
22
2
22

IAC_SDATAI1 9
IAC_BITCLK 9,25

AMP 108-5424

GC/BE#0 4

GAD6
GAD4
GAD2
GAD0

B

AGP_VGAREF 4

HEADER 2X60

4

GAD[0..31]

4

SBA[0..7]

GAD[0..31]
SBA[0..7]

1

AGP_CLK
R447

12

@33
A

A

2

C580
@22PF

Compal Electronics, Inc.
Title
VGA Connector & MDC Connector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:
5

4

3

2

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet
1

12

of

38

B

D

E

D12
DAN217

1

D10
DAN217

1

D11
DAN217

C

1

A

3

2

3

2

3

1

2

1

+5VS

L18
12

1
2
@FBM-11-160808-121

TV_SYNC

12
12
12

JP2

L23
1
2
FBM-11-160808-121
L21
1
2
FBM-11-160808-121
L22
1
2
FBM-11-160808-121

LUMA
CRMA
COMPS

1
2
3
4
5
6
7

C179
@470PF

47PF
2

2

2

47PF

2

47PF

1

C180

C178

C186

47PF

1

1

1

1

47PF

2

2

C206

C208

2

2

2
2 TV_GND

1

C207

47PF

1

R180
75

2

75

75

1

R179
0_0603
L19

1

1

1

S CONN._SUYIN

R178

2

2

+5VS

R_CRT_VCC
F2
1
1

12

G

12

B

3

2

3

2

3

1

1

C170
15PF

C167
100PF

2

+12VS

C168
68PF

R149
2.2K

3

Q15
2N7002

1

1

C173
220PF
C175
100PF

C166
220PF
2

C171
68PF

2

2N7002

1

1
2
CHB1608U121

+5VS

R165
2.2K

DDC_DATA 12

1

4

3

DDC_CLK 12

Q16
2N7002

2

3

L14

2

R4

+5VS

R144
100K

1

1

VSYNC1

Q20
1

+12VS

2

L10
1
2
CHB1608U121

1

2
12

15PF

2

HSYNC1

3
2N7002

Q21
4

C172

2

15PF
2

18PF

C174

2

C189

1

CRT_VCC
1

1

18PF
2

2

18PF

C188

2

C187

1

12

R161
@75
1

R162
@75
1

1

R163
@75

1

1

2

2

2

L13
1
2
FCM2012C80_0805
L12
1
2
FCM2012C80_0805
L11
1
2
FCM2012C80_0805

1

R

JP3
CRT-15P
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

2

12

C169
.1UF

DAN217

1

M_SEN#

DAN217

2

12

DAN217

3

2

DDC_MD2
2

12

FUSE_1A

1

RB491D

CRT_VCC
2

2

2

2

D5

1

D9

1

D6

2

D7

1

1

+5VS +5VS

10K

3

2

1

CRT Connector
R160

Compal Electronics, Inc.

100K
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:
A

B

C

D

CRT&TV-OUT Connector
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet
E

13

of

38

D

1

1
C140

S2_RST

B_CE1#/CC/BE0#
B_CE2#/CAD10
B_WE#/CGNT#
B_IORD#/CAD13
B_IOWR#/CAD15
B_OE#/CAD11
B_VS1#/CVS1
B_VS2#/CVS2
B_REG#/CC/BE3#
B_RESET/CRST#

H5
G1
G3
H6
F1
G5
F2
E1
G6
F5
E3
C12
A4
E6
B5
F6
B8
A8
E9
F9
B9
A9
F10
E10
F11
E13
C11
B11
A12
B12
E12
A13

R136
100

S2_VCC
8,16,17,18 AD[0..31]

AD[0..31]

B

C

2

1

1

1
C146
1000PF

C156
1000PF
2

S1_BVD1
S1_BVD2
S1_CD1#
S1_CD2#
S1_RDY#
S1_WAIT#
S1_WP
S1_INPACK#

1

H19
J15
V11
H17
J17
J14
H18
L14

C137
1000PF

2

S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A7
S1_A8
S1_A9
S1_A10
S1_A11
S1_A12
S1_A13
S1_A14
S1_A15
SA_A16
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25

1

J19
K14
K15
K19
L15
L17
L19
M15
W16
R14
W14
P14
N18
R17
N14
M14
P18
U15
T19
P15
R18
P17
P19
N17
N19
M18

+3V

C139
1000PF
2

S1_D0
S1_D1
S1_D2
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_D8
S1_D9
S1_D10
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15

1

H14
G18
G14
U11
R11
U12
R12
V13
H15
G17
F19
P11
V12
P12
W13
U13

2

M17

M5

A11
GRST#

VCCA

+3V

2

P13
R13
R19
W15
V15
U14
J18
M19
K17
L18

S1_VS1
S1_VS2
S1_RST

R128
1

2 S1_A16
47
Placement near
to PCMCIA
controller

S1_BVD1 15
S1_BVD2 15
S1_CD1# 15
S1_CD2# 15
S1_RDY# 15
S1_WAIT# 15
S1_WP
15
S1_INPACK# 15
S1_CE1# 15
S1_CE2# 15
S1_WE# 15
S1_IORD# 15
S1_IOWR# 15
S1_OE# 15
S1_VS1
15
S1_VS2
15
S1_REG# 15
S1_RST 15

3

+3V
R125
22K

R124
22K

D1
PCM_INTA#

1

2

PIRQA#

8,12,18

PIRQB#

8

RB751V
D2
PCM_INTB#
PCI1420-GHK

1

2
RB751V

S1_A23
S1_WP
PCM_PME#
PCM1_LED
PCM2_LED

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

C157
.1UF

GND

2

AD16

22K

VCCB

F3
L3
U7
W12
N15
G19
B14
C9
E7

A_CE1#/CC/BE0#
A_CE2#/CAD10
A_WE#/CGNT#
A_IORD#/CAD13
A_IOWR#/CAD15
A_OE#/CAD11
A_VS1#/CVS1
A_VS2#/CVS2
A_REG#/CC/BE3#
A_RESET/CRST#

IRQ/DMA

1
S2_VCC

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

D1
E11

F18
VCCI

A_BVD1/CSTSCHG
A_BVD2/CAUDIO
A_CD1#/CCD1#
A_CD2#/CCD2#
A_READY/CINT#
A_WAIT#/CSERR#
A_WP/CCLKRUN#
A_INPACK/CREQ#

B_BVD1/CSTSCHG
B_BVD2/CAUDIO
B_CD1#/CCD1#
B_CD2#/CCD2#
B_READY/CINT#
B_WAIT#/CSERR#
B_WP/CCLKRUN#
B_INPACK/CREQ#

PCM_INTB#
PCM_INTA
#

2
22K

VCCP
VCCP

C13

B13

F14
E19
F17
G15

A

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

1
R129
S2_A23
R127

1

12

Slot

B

4

S2_WP

C153
.1UF

12,15,16,17,18

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

S2_VS1
S2_VS2

K6
L2
P3
L5
M2
L6
U8
P7
P8
W5

Slot

A_D0/CAD27
A_D1/CAD29
A_D2/RSVD
A_D3/CAD0
A_D4/CAD1
A_D5/CAD3
A_D6/CAD5
A_D7/CAD7
A_D8/CAD28
A_D9/CAD30
A_D10/CAD31
A_D11/CAD2
A_D12/CAD4
A_D13/CAD6
A_D14/RSVD
A_D15/CAD8

G2
J5
P2
P9
V14
K18
E18
F12
B10
E8
C5

S2_CE1#
S2_CE2#
S2_WE#
S2_IORD#
S2_IOWR#
S2_OE#
S2_VS1
S2_VS2
S2_REG#
S2_RST

V9
W9
H3
R9
V8
W8
U9
R7

CBRST#

U16

A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A7/CAD18
A_A8/CC/BE1#
A_A9/CAD14
A_A10/CAD9
A_A11/CAD12
A_A12/CC/BE2#
A_A13/CPAR
A_A14/CPERR#
A_A15/CIRDY#
A_A16/CCLK
A_A17/CAD16
A_A18/RSVD
A_A19/CBLOCK#
A_A20/CSTOP#
A_A21/CDEVSEL#
A_A22/TRDY#
A_A23/CFRAME#
A_A24/CAD17
A_A25/CAD19

Interface

C14 RIOUT#/PME#

15
15
15
15
15
15
15
15
15
15

S2_BVD1
S2_BVD2
S2_CD1#
S2_CD2#
S2_RDY#
S2_WAIT#
S2_WP
S2_INPACK#

PCI

INTA#/MFUNC0
INTB#/MFUNC1
SUSPEND#
DMAREQ#/MFUNC2
IRQSER/MFUNC3
LOCK#/MFUNC4
DMAGNT#/MFUNC5
CLKRUN#/MFUNC6

S2_BVD1
S2_BVD2
S2_CD1#
S2_CD2#
S2_RDY#
S2_WAIT#
S2_WP
S2_INPACK#

B_A0/CAD26
B_A1/CAD25
B_A2/CAD24
B_A3/CAD23
B_A4/CAD22
B_A5/CAD21
B_A6/CAD20
B_A7/CAD18
B_A8/CC/BE1#
B_A9/CAD14
B_A10/CAD9
B_A11/CAD12
B_A12/CC/BE2#
B_A13/CPAR
B_A14/CPERR#
B_A15/CIRDY#
B_A16/CCLK
B_A17/CAD16
B_A18/RSVD
B_A19/CBLOCK#
B_A20/CSTOP#
B_A21/CDEVSEL#
B_A22/CTRDY#
B_A23/CFRAME#
B_A24/CAD17
B_A25/CAD19

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

15
15
15
15
15
15
15
15

Power

F15
E17
D19
A16
C15
E14
F13
B15

R8
W7
V7
W6
V6
U6
V5
U5
N1
M3
L1
M1
T1
N3
P1
P5
P6
M6
N2
N6
N5
R1
R2
R3
W4
R6

B_D0/CAD27
B_D1/CAD29
B_D2/RSVD
B_D3/CAD0
B_D4/CAD1
B_D5/CAD3
B_D6/CAD5
B_D7/CAD7
B_D8/CAD28
B_D9/CAD30
B_D10/CAD31
B_D11/CAD2
B_D12/CAD4
B_D13/CAD6
B_D14/RSVD
B_D15/CAD8

C10 IDSEL

S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A7
S2_A8
S2_A9
S2_A10
S2_A11
S2_A12
S2_A13
S2_A14
S2_A15
R130
S2_A16
1
2 SB_A16
S2_A17
S2_A18
47
S2_A19
Placement near
S2_A20
to PCMCIA
S2_A21
controller
S2_A22
S2_A23
S2_A24
S2_A25

2

3

CBRST#

DATA
CLOCK
LATCH
SPKOUT

W10
U10
P10
H2
J1
J3
K1
K3
V10
R10
W11
H1
J2
J6
K2
K5

1

2
.1UF

10PF

GNT#

S2_D0
S2_D1
S2_D2
S2_D3
S2_D4
S2_D5
S2_D6
S2_D7
S2_D8
S2_D9
S2_D10
S2_D11
S2_D12
S2_D13
S2_D14
S2_D15

1
C138

+3V

C160
.1UF

+3V

C162

PAR

REQ#

Q13 2N7002
S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]

S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]

+3V

E2
A5
C8
A15

8,16,17,18

C6
B6
A6
F7
A7
B7
A14
C7
F8

15
15
15
15

1

S1_VCC

C/BE0#
C/BE1#
C/BE2#
C/BE3#

3

8,16,17,18 SERR#

S2_VCC

33

C161
.1UF

2

100K

R135

A10

2

8,16,17,18 FRAME#
8,16,17,18 DEVSEL#
4,8,12,15,16,17,18,20,22,27,30 PCIRST#
8,16,17,18 TRDY#
8,16,17,18 IRDY#
8,16,17,18 STOP#
8,16,17,18 PERR#

2
.1UF

2

C158
.1UF

2

C154
.1UF

+3V

1

1

1

+3V

PCLK

1

2

+12VS

CARDBUS
PCI1420

PCM_SPK# 26

PAR
SERR#
PERR#
STOP#
IRDY#
TRDY#
RSTIN#
DEVSEL#
FRAME#

R134

1

E

2

C

2

B

15
SLATCH
9,15
RTCCLK
15
SLDATA
8
GNT#3
8
REQ#3
8,16,17,18 C/BE#3
8,16,17,18 C/BE#2
8,16,17,18 C/BE#1
8,16,17,18 C/BE#0
11
PCLK_PCM

2

A

PCM_PME# 27
CLKRUN# 9,16,17,18,22,27
PCM1_LED 28
RING#
27
SIRQ
8,22,27
PCM2_LED 28
+3V
R133
22K
2
1
PCM_SUSP# 27
D3
RB751V
D

R131
1
R132

4

S1_VCC

22K
2
22K

S1_VCC

Compal Electronics, Inc.
Title

TI 1420
Size
B

Document Number

Date:

Tuesday, April 24, 2001

Rev
1.0

888M1
Sheet
E

14

of

38

PCMCIA POWER CTRL.
+3V +5V +12V

S1_VPP

CARDBUS
SOCKET

S1_VPP

W=40mils

S1_VCC

JP19

1

U15

1
1
1
1
1
1

7
24

2 C130
.1UF
2 C129
.1UF
2 C128
.1UF
2 C142
.1UF
2 C143
.1UF
2 C136
.1UF

1
2
30

28

15
16
17
14
14
9,14

3
5
4

SLDATA
SLATCH
RTCCLK

13
19
18

OCCB#
+3V

1

12V
12V
5V
5V
5V

BVPP
BVCC
BVCC
BVCC

3.3V
3.3V
3.3V

RESET
RESET#

DATA
LATCH
CLOCK
APWR_GOOD#
BPWR_GOOD#
OC#

NC
NC
NC
NC
GND

8
9
10
11

C134
2

C135
2 1UF_25V_0805

AVPP
AVCC
AVCC
AVCC

S2_VPP

23
20
21
22

14
14

4.7UF_10V_0805

S1_CD2#
S1_WP

S2_VPP

W=40mils

S2_VCC

1

1

VCC_5V

C133

6
14
2

25

26
27
28
29

14

4.7UF_10V_0805

CBRST#

12

2
TPS2206AI/TPS2216
R126
100K

S1_BVD1

14

S1_BVD2

14

S1_REG#

14

S1_INPACK#

14

S1_WAIT#

14

S1_RST

14

S1_VS2

S1_CD2#
S1_WP
S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1
S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3
S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25
S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22
S1_A16

S1_VPP
S1_VCC

+3V

C192
U18A
74LVC125

2

3

1
R429

2
0

CBRST#

CBRST#

12,14,16,17,18

7

1

1

S2_VPP

1

2
4,8,12,14,16,17,18,20,22,27,30 PCIRST#

+3V POWER

C536

R451

1UF_25V_0805
2

2

2

.01UF

27

G_RST#

1
R430

2
@0

+3V
S1_CD1# 1
@1000PF

1

1

W=30mils

C537
2

C148
.01UF

1UF_25V_0805

1

.1UF

2

C145

56PF
2

C147

C144

2

1

1

S1_VCC

C519
10U_1206

S1_WE#

14

S1_IOWR#

14

S1_IORD#

C542
10K

S1_VPP

S1_RDY#

14
PCMRST# 28
14

.1UF

W=30mils

14

1

1

S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]

S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]

2

1000PF

C124
2

14
14
14

S1_VS1
S1_OE#
S1_CE2#

14

S1_CE1#

C557
S1_CD2# 1
2
@1000PF
C484
S2_CD1# 1
2
@1000PF
S2_CD2# 1
@1000PF

C556
2

14

S1_CD1#

S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3

a68
a34
a67
a33
GND
a66
a32
a65
a31
a64
a30
a63
GND
a29
a62
a28
a61
a27
a60
a26
GND
a59
a25
a58
a24
a57
a23
a56
GND
a22
a55
a21
a54
a20
a53
GND
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
GND
a46
a12
a45
a11
a44
GND
a10
a43
a9
a42
a8
GND
a41
a7
a40
a6
a39
a5
GND
a38
a4
a37
a3
a36
a2
a35
a1

b68
b34
b67
b33
GND
b66
b32
b65
b31
b64
b30
b63
GND
b29
b62
b28
b61
b27
b60
b26
GND
b59
b25
b58
b24
b57
b23
b56
GND
b22
b55
b21
b54
b20
b53
GND
b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13
GND
b46
b12
b45
b11
b44
GND
b10
b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1

B77
B76
B75
B74
B73
B72
B71
B70
B69
B68
B67
B66
B65
B64
B63
B62
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
B51
B50
B49
B48
B47
B46
B45
B44
B43
B42
B41
B40
B39
B38
B37
B36
B35
B34
B33
B32
B31
B30
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1

S2_CD2#
S2_WP

S2_CD2# 14
S2_WP
14

S2_D10
S2_D2
S2_D9
S2_D1
S2_D8
S2_D0
S2_BVD1

S2_BVD1 14

S2_A0
S2_BVD2
S2_A1
S2_REG#
S2_A2
S2_INPACK#
S2_A3

S2_BVD2 14
S2_REG# 14
S2_INPACK# 14

S2_WAIT#
S2_A4
S2_RST
S2_A5
S2_VS2
S2_A6
S2_A25

S2_WAIT# 14
S2_RST

14

S2_VS2

14

S2_A7
S2_A24
S2_A12
S2_A23
S2_A15
S2_A22
S2_A16
S2_VPP
S2_VCC
S2_A21
S2_RDY#
S2_A20
S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13

S2_RDY# 14
S2_WE#

S2_A17
S2_A8
S2_IOWR#
S2_A9
S2_IORD#

14

S2_IOWR# 14
S2_IORD# 14

S2_A11
S2_VS1
S2_OE#
S2_CE2#
S2_A10

S2_VS1 14
S2_OE# 14
S2_CE2# 14

S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6

S2_CE1# 14

S2_D12
S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3

S2_CD1# 14

PCMC154PIN

S2_VCC

1

C518
10U_1206 56PF

C535

C532

2

1

1

Compal Electronics, Inc
C529

1000PF

Title
FCI PCMCIA SOCKET

.1UF
2

2

14
14
14
14

S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13

A77
A76
A75
A74
A73
A72
A71
A70
A69
A68
A67
A66
A65
A64
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
A51
A50
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet

15

of

38

5

4

AD[0..31]

C204
.1UF

2

2

.1UF

C203

CLK
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

VDD
VDD
VDD

1
2

83
95
84
81
82

1

1
2

1

2

R154
75

R155
75

C

2

15PF

2

C201
0.01UF
2

C197
.1UF

+3V

RJ45_PR

1

1

2

+3V

D41
1

2

Q72
DTA114YKA

+3VS

RB751V

3

+3V

54
71
72
73
94
7
18
30
40
55
56
62
74
80
85
93
111
112
113
124

1

1

C198
.1UF

LAN_X2
1
2
R181
1K
1
2
R176
15K
1
2
R177
1.69K_1%_0603

1

1

1
LAN_X1

78

50

Pulse H0013
C199

JP5
1

1
R452

2
300_0603

12
11
8
7

ACTIVITY#
RJ45_RX-

6
5
4

Y2
25 MHz
LAN_X1

LAN_X2

C210

RJ45_RX+

3

RJ45_TX-

2

RJ45_TX+

1

Q73
DTA114YKA

C209

10

27PF_NPO

27PF_NPO

3

+3V

1 1
R453

2
300_0603

9

Amber LED+
Amber LEDSHLD4
PR4SHLD3

16
15

PR4+
PR2PR3-

B

PR3+
PR2+
PR1SHLD2
PR1+
SHLD1

14
13

Green LEDGreen LED+
AMP RJ45/RJ11 with LED

R157

R156

RTL8139C

LINK10_100#

.1UF

75

75

RJ45_PR

1

C193
2

LANGND
1

+3V

1

96

NC
NC
NC
NC
NC

RST#

79

50

RJ45_TX+
RJ45_TX-

2

90

1

C205

77

RTT3
RTT2

CLKRUN#
PME#

LAN_RD+
LAN_RD-

15PF

2

1

LAN_VDD1
2
4.7UH
LAN_VDD2
2
4.7UH
LAN_VDD3
2
4.7UH
1

1
L20
1
L24
1
L25

116
1
12
25
35
46
59
58
106
109
119

+3V

+3V

115

RTSET
INTA#

87
86

R171

RJ45_RX+
RJ45_RX-

16
15
14
13
12
11
10
9

RX+
RXCT
NC
NC
CT
TX+
TX-

1

B

75
76

ISOLATE#

LAN_TD+
LAN_TD-

50

R172

RD+
RDCT
NC
NC
CT
TD+
TD-

2

114

PIRQD#

9,14,17,18,22,27 CLKRUN#
18,27 LAN_PME#
1
2
4,8,12,14,15,17,18,20,22,27,30 PCIRST#
1 R458
2 @0
12,14,15,17,18 CBRST#
R459
0
PCLK_LAN
11
PCLK_LAN

REQ#
GNT#

92
91

50

C200

1

8,18

118
117

REQ#1
GNT#1

LWAKE

ACTIVITY#
LINK10_100#

R169

C

8
8

X2
PERR#
SERR#

99
98
97

R170

C

21
22

X1

LAN_TD+
LAN_TD-

88
89
110

B

8,14,17,18 PERR#
8,14,17,18 SERR#

RXIN+
RXIN-

PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

1
2
3
4
5
6
7
8

10K

23
15
16
17
19
20

U2
LAN_RD+
LAN_RD-

108
107
105
104
103
102
101
100

2

8,14,17,18
PAR
8,14,17,18 FRAME#
8,14,17,18 IRDY#
8,14,17,18 TRDY#
8,14,17,18 DEVSEL#
8,14,17,18 STOP#

TXD+
TXD-

IDSEL

.1UF

B

3

9346

2
@10K +3V
2
+3V
5.6K

10K

2 LAN_IDSEL
100

1
R13
1
R10

2

1
R201

LED0
LED1
LED2

C/BE#0
C/BE#1
C/BE#2
C/BE#3

D

C220

2

Q70
FDV301

36
24
14
2

+3V

E

3

C/BE#0
C/BE#1
C/BE#2
C/BE#3

5
6
7
8

47K

1

C/BE#0
C/BE#1
C/BE#2
C/BE#3

GND
NC
NC
VCC

E

470K
AD23

8,14,17,18
8,14,17,18
8,14,17,18
8,14,17,18

DO
DI
SK
CS

47K

2

U29
4
3
2
1

2

1

LAN_EEDO
LAN_EEDI
LAN_EECLK

2

+12VALW

2

C

OEB
WEB
ROMCS#

LAN_EECS

47
48
49
51
52
53
57
60
61
63
64
65
66
67
68
69
70

2

1

2N7002
R431

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7

50

1

Q69

2

EN_LAN#

MA0
MA1
MA2
MA3
MA4
MA5
MA6/9356SEL
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
MA16

2

28

EECS

1

3

2

100K

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

2

R437

45
44
43
42
41
39
38
37
34
33
32
31
29
28
27
26
13
11
10
9
8
6
5
4
128
127
126
125
123
122
121
120

1

1

LAN_IDSEL

1

U4

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

D

2

2

8,14,17,18 AD[0..31]

3

C177

C176

.1UF

C11

4.7UF_10V_0805

.1UF

2

2

1

C13

.1UF
Termination plane should be copled to chas
sis ground

2

.1UF
2

.1UF

C18

1

1

C32

2

.1UF
2

.1UF

C33

1

1

1

.1UF

C244

2

.1UF

C27

2

.1UF

C17

1

1

C10

2

R16

2

.1UF
2

A

C12

2

1

PCLK_LAN

1

1

1000PF_2KV_1206

C16

Compal Electronics, Inc.

@10PF

Title
LAN REALTEK RTL8139CL

2

12

@22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:
5

4

3

2

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet
1

16

of

38

A

A

B

C

D

E

+3V

.1UF

C468

1

C522

.1UF

C525
.1UF

2

.1UF

1

C473

2

.01UF

1

1

C523

2

2

.01UF

2

C513

.01UF

2

C516

.01UF

1

1

1
C498

.01UF
2

+3V

C486
8
7
6
5

2

1
2
3
4

2

RP38
AD[0..31]

8,14,16,18 AD[0..31]

1

1

+3V

8P4R_4.7K
+3V

2 1394_IDSEL
100
8,14,16,18 C/BE#3
8,14,16,18 C/BE#2
8,14,16,18 C/BE#1
8,14,16,18 C/BE#0
11
PCLK_1394
8
GNT#2
8
REQ#2

3

8,14,16,18 FRAME#
8,14,16,18 IRDY#
8,14,16,18 TRDY#
8,14,16,18 DEVSEL#
8,14,16,18 STOP#
8,14,16,18 PERR#
8
PIRQC#
27
1394_PME#
8,14,16,18 SERR#
8,14,16,18
PAR
9,14,16,18,22,27 CLKRUN#
4,8,12,14,15,16,18,20,22,27,30 PCIRST#

PCIRST#

14

12,14,15,16,18 CBRST#

2

2

89
90

R359

R355

1
C497

.1UF

.1UF

C487
.1UF

2

1

1
C472

2

2

2

1

86
96
10
11

L40
1

1

1
+3V

2
0_0805

+3V

C530
2

C521
2

CYCLEOUT/CARDBUS
CNA
TEST17
TEST16

CYCLEIN

VDDP
VDDP
VDDP
VDDP
VDDP

C515
.1UF

.01UF

4.7UF_0805

CPS

PHY PORT 2

TPBIAS1
TPA1+
TPA1TPB1+
TPB1-

BIAS CURRENT

R0

R1

OSCILLATOR

X0

106

1
R399

125
124
123
122
121

1
2
C517 .1UF
R395
1K
1
2
1
2
R394
1K

2
1K

2

118
R385
6.34K_1%_0603
119
1

C534
2

6
15PF
Y5

X1

FILTER

FILTER0
FILTER1

EEPROM 2 WIRE BUS SDA
SCL

POWER CLASS

PHY PORT 1

PC0
PC1
PC2
TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 TEST9
TEST8
TEST3
TEST2
TEST1
TEST0

24.576 MHz

5
3

1
C526

2
.1UF

1
R363
1
R364

2
220
2
220

C533
1
2
15PF

4
92
91

JP12
TPB0TPB0+
TPA0TPA0+

99
98
97

R335

56.2_1%_0603

1
2
3
4

1
2
3
4

C448
Molex SD-54030-0411
0.33UF_0603

116
115
114
113
112

TPBIAS0

94
95

R362 1
R361 1

2 220
2 220

101
102
104
105

R372
R378
R379
R360

2
2
2
2

1
1
1
1

R344
56.2_1%_0603

220
220
220
220

3

TPA0+
TPA0TPB0+
TPB0-

R345
56.2_1%_0603
R336
56.2_1%_0603

R333
5.11K_1%_0603
C442

220PF

220

2

1

1

220

+3V

PCI BUS INTERFACE

G_RST
GPIO3
GPIO2

15
27
39
51
59
72
88
100
7
1
2
107
108
120

PCLK_1394

C524
@0.1UF
1

1
4

2

1
R398

TSB43AB22

R400

C467
@0.1UF
1

AD26

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA/CINT
PCI_PME/CSTSCHG
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST

PLLGND1
REG_EN
AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND
DGND
REG18
DGND
DGND
DGND
DGND
DGND
DGND
DGND
REG18
DGND

2

22
24
25
26
28
29
31
32
37
38
40
41
42
43
45
46
61
63
65
66
67
69
70
71
74
76
77
79
80
81
82
84
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD

1

8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C/BE#3
C/BE#2
C/BE#1
C/BE#0
PCLK_1394
GNT#2
REQ#2
1394_IDSEL
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
PIRQC#
1394_PME#
SERR#
PAR

20
35
48
62
78

U49
TSB43AB22

87

1

2

@22

TSB43AB22 USE

For TSB43AA22
C654,C655
change to 0
ohm to short
to GND

4

Compal Electronics, Inc.

C531
Title

@10PF

1394 Interface
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:

A

B

C

D

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet
E

17

of

38

Q38
@SI2301DS

+3VALW

+3.3VAUX

D

S

3

1

R109
1

2

+3V

1
2

G

1

0

2

C113
@1UF_25V_0805

2

C461
@1UF_25V_0805

R343
27

1

EN_WOL#

2

+5VALW

@100K

AD23
AD21
AD19
AD17

8,14,16,17 C/BE#2
8,14,16,17 IRDY#
9,14,16,17,22,27 CLKRUN#
8,14,16,17 SERR#
8,14,16,17 PERR#
8,14,16,17 C/BE#1

AD14
AD12
AD10
AD8
AD7

PCLK_MINI
1

AD5

+5VS_MINIPCI

AD3
W=30mils
AD1

12

R116
10

2

C120
33PF

+5VS

2 W=30mils
0

1
L4
0603

+5VS_MINIPCI
PIRQD#

8,16
+3VS_MINIPCI

+3.3VAUX

L7
W=40mils

GNT#0

8

WLANPME# 16,27

1

2

+3V

CHB1608U121
0603

AD30
AD28
AD26
R122
AD24
MINI_IDSEL 1
AD22
AD20

2 AD27

100

AD18
AD16

PAR

8,14,16,17

FRAME#
TRDY#
STOP#

8,14,16,17
8,14,16,17
8,14,16,17

IDSEL : AD27

+5VS_MINIPCI

DEVSEL# 8,14,16,17
AD15
AD13
AD11

C119
@1000PF

C159
@.1UF

C155
@.1UF

C118
@10U_1210

AD9
C/BE#0

8,14,16,17

AD6
AD4
AD2
AD0

+3VS_MINIPCI
C123
.1UF

W=20mils

C117

C127

.1UF

.1UF

C141

1

8,14,16,17 C/BE#3

12,14,15,16,17

.1UF

C152
.1UF

C112
10U_1210

2

AD27
AD25

4,8,12,14,15,16,17,20,22,27,30

CBRST#

1

AD31
AD29

W=40mils
MINI_RST#

PCIRST#

2

REQ#0

W=30mils
PIRQD#

PCIRST#
2
0
2
@0

1

8

PCLK_MINI

1
R113
1
R114

MINI_RST#
LAN RESERVED

2

11

PIRQA#

PIRQA#

RING

1

W=40mils8,12,14

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

2

CHB1608U121
0603

2

2

1

L6
1

+3V

2

2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

2

24,28,30 RFOFF#

1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

1

+3VS_MINIPCI

D39
RB751V
1

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

2

LAN RESERVED

JP18
1

1

TIP

+3.3VAUX

C116

Mini-PCI SLOT
.1UF
2

+5VS_MINIPCI

Compal Electronics, Inc
Title
MINI_PCI

AD[0..31]

AD[0..31]

8,14,16,17

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet

18

of

38

CHB1608U301
1
2
L34
1
2
L33
CHB1608U301
C432
.1UF

+5VOZ
1
R182

28,30 STOPBTN#

2
0

D15
1

28 CD_STOPBTN#

+5VOZ

C404
.1UF

OZ_STOPBTN#

2

C434
.1UF

C446
.1UF

+5VCD

X3
OSC2
8MHZ
R309

SDA0
SDA1
SDA2

9
9

SDCS1#
SDCS3#

9
9

SDIOR#
SDIOW#

9

SDIORDY

8
9
9

IRQ15
SDDREQ
SDDACK#

20

SIDE_RST#

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

76
78
81
83
86
90
95
97
2
4
8
11
15
18
20
22

SDA0
SDA1
SDA2

68
70
66

SDCS1#
SDCS3#

63
61

SDIOR#
SDIOW#

99
6
72
93

SDDREQ
SDDACK#

24
59
48
53
55
50
46

1M
C397
10PF

C398
10PF
30
30
30

DM_ON
PLAYBTN#
FRDBTN#
REVBTN#
OZ_STOPBTN#

PLAYBTN#
FRDBTN#
REVBTN#

C111 10UF_1206_10V
R316
10K
1
2

28

DM_ON
INTN

CD_INTA#

28
36
35
34
37
29
25
30

58

HDD0
HDD1
HDD2
HDD3
HDD4
HDD5
HDD6
HDD7
HDD8
HDD9
HDD10
HDD11
HDD12
HDD13
HDD14
HDD15

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

HDA0
HDA1
HDA2

CDA0
CDA1
CDA2

HCS0
HCS1

CCS0
CCS1

HDIOR#
HDIOW#
HIOCS16#
HIORDY

CDIOR#
CDIOW#
CIOCS16#
CIORDY

HINTRQ
HDMARQ
HDMACK#

CHINTRQ
CDMARQ
CHDMACK#

HRESET#
HDASPN

CRESET#
CDASPN

HSYNC
HBIT_CLK
HDATA_OUT
HDATA_IN
HACRSTN

SSYNC
SBIT_CLK
SDATA_OUT
SDATA_IN
SACRSTN

PAV_EN
PLAY/PAUSE
FFORWARD
REWIND
STOP/EJECT

PWR_CTL
ISCDROM
GPIO[1]/VOL_UP
GPIO[0]/VOL_DN

PCSYSTEM_OFF
INTN
RESET#

MODE0
MODE1

D33
2

1

2,27,34 EC_SMD2

3

26

Q32
2N7002

RB751V
Q29
2N7002

1

3

1

1

2,27,34 EC_SMC2

2

27
OSC1
OSC2

31
32

2

R425

69
71
67

CD_SBA0
CD_SBA1
CD_SBA2

64
62

CD_SCS1#
CD_SCS3#

100
5
73
94

CD_SIOR#
CD_SIOW#
CIOCS16#
CD_SIORDY

75
13
89

CD_IRQ
CD_DREQ
CD_DACK#

23
60

+5VCD
RP35

CD_SBA0 20
CD_SBA1 20
CD_SBA2 20

ISCDROM
CD_IRQ
CDASPN
MODE1

CD_SCS1# 20
CD_SCS3# 20

CD_SIORDY 20

80

PAVMODE
SCLK
OSCI
OSCO

R426
2.2K

CSN
INCN
UDN

8P4R-10K
RP32

CD_RSTDRV# 20

2
@10K
2
10K

1
R424
GPIO_1
GPIO_0

2
@0

56
57

R320
@1K
1
2
MODE1

CDD3
CDD1
CDD2
CDD0
CDD4
CDD6
CDD5
CDD7

+5VCD

1
R427

ISCDROM

2

MEDIA_DETECT 28

0

1
R310

2
10K

16P8R_4.7K

R308
100K

+5VCD

8
7
6
5

C106
10U_1206

R99
100K

C409
.1UF

SUSP#

CD_SIORDY

1
R118

2
1K

CIOCS16#

1
R339

2
47K

DM_ON

2

CD_DREQ

25

1
R117
1
R111

2
10K
2
5.6K

Q6

2

DM_ON#

25

Q7

2
2N7002
3

10K

1

R313

1

1

DM_ON

2N7002
DM_ON#

C407
1U_0805

DM_ON
1

S
D
S
D
S
D
G
D
SI4425DY

9
10
11
12
13
14
15
16

3

1
2
3
4

240K
2

8
7
6
5
4
3
2
1

+5VMOD

1

+5VALW

R307
1

16
15
14
13
12
11
10
9

RP36
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

41
42
43

U11

+5VALW

1
2
3
4
5
6
7
8

16P8R_4.7K

** N o stuff R427 when stuff OZ163
** No stuf f R424 and R320 when stuff OZ168

CDD7
C415
1UF_0805

8
7
6
5

RP37
1
R305
1
R306

+5VCD

+5VCD

C107
10U_1206

8
7
6
5

8P4R-10K

39
40

38

1
2
3
4

PLAYBTN#
1
REVBTN#
2
FRDBTN#
3
OZ_STOPBTN# 4

47
52
54
49
45
51

8
7
6
5

RP33
GPIO_0
GPIO_1
INTN

CD_IRQ 20
CD_DREQ 20
CD_DACK# 20

CD_RSTDRV#
CDASPN

1
2
3
4
8P4R-10K

CD_SIOR# 20
CD_SIOW# 20

16
33
65
85
92

+5VCD

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

SDATA

2

2

2.2K
+5VALW

77
79
82
84
87
91
96
98
1
3
7
10
14
17
19
21

GND
GND
GND
GND
GND

1

Compal Electronics, Inc
SUSP#

2

22K

22K

22K
Q35
DTC124EK

2

CDPLAY

22K

3

27,29,35,37 SUSP#

3

+5VCD

74
12
88

U46
OZ163

VDD

9
SDD[0..15] 9

9
9
9

OSC1

VDD

SDD[0..15]

VDD

CDD[0..15] 20

44

@RB751V
CDD[0..15]

Q37
DTC124EK

CD_PLAY 28

Title
OZ-163 CD_PLAY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number
888M1
Thursday, April 26, 2001

Rev
1.0
Sheet

19

of

38

IDE,CD-ROM Module CONN.

2

2

C381

C82
.1UF

1UF_25V_0805

+5VCD

Place component's closely IDE CONN.

Q10
SI3456DV
6
5
2
1

1
R276

+5VS

+5VS

2
100K

4

3

+

2
1
1

2

R338

PDA2
PDCS3#

1K

PDA2
PDCS3#

9
9

9

Q39
2N7002
C122
.01UF

47K

Q40

2 EXTIDE_EN#
3
1

28 EXTIDEPWR#

2
470

47K

2

1
R242

2

1

Q8
DTC144EKA

2

SYSIDEPWR

2N7002

+5VS

SI3456DV: N CHANNEL
VGS: 4.5V, RDS: 65 mOHM
Id(MAX): 5.1A
VGS,+-20V

HDD 44P SUYIN 20225A-44G5-A
2 SHDD_LED#
100K

1
R371

+5VMOD

9
19

1K

R366
100K

PCSEL

R115

2

+12VALW

C125
4.7UF_A
<1st Part Field>

3

IRQ14
PDA1
PDA0
PDCS1#

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

1

PDDREQ
PDIOW#
PDIOR#
PDIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PHDD_LED#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

3

9
9
9
9
9
8
9
9
9
28

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

1

JP7
PIDE_RST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

+5VMOD

1

C387
10U_1210

2

C81

1000PF

1

1

1

+5VS

PDD[0..15]
CDD[0..15]

PDD[0..15]
CDD[0..15]

JP17

SHDD_LED#
EXTCSEL
RDATA#
WP#
TRACK0#
WDATA#
STEP#
MTR0#
DSKCHG#
DRV0#

22
RDATA#
22
WP#
22
TRACK0#
22
WDATA#
22
STEP#
22
MTR0#
22
DSKCHG#
22,28
DRV0#

INT_CD_R 25

CD_AGND
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

+5VS
CD_DREQ 19
CD_SIOR# 19
CD_DACK# 19
CD_SBA2 19
CD_SCS3# 19
EXTID0
28
EXTID1
28
EXTID2
28
HDSEL# 22

EXTID0
EXTID1
EXTID2
HDSEL#

2

0.1UF
4,8,12,14,15,16,17,18,22,27,30 PCIRST#
8

WGATE#

FDDIR#
3MODE#

FDDIR#
3MODE#

DSKCHG#
INDEX#
WP#
TRACK0#

1
2
3
4

8P4R_1K
1
R120

PIDE_RST#

7SH08FU

22
22
+5VS

INDEX#

INDEX#
+5VMOD

22

2

C572
1

0.1UF

U54

PCIRST# 1
4
RP15

1
2
3
4

4
2

8

8 EXTID0
7 EXTID1
6 EXTID2
5

SIDE_RST#

2

SIDERST#

3

RP17

U25

1

WGATE# 22

+3VALW
8
7
6
5

PCIRST#

PIDERST#

HEADER 2X30
+5VS

C212
1
5

CD_SIOW#
CD_SIORDY
CD_IRQ
CD_SBA1
CD_SBA0
CD_SCS1#
SHDD_LED#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

3

19
19
19
19
19
19
28

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

CD_AGND
CD_RSTDRV#
CDD7
CDD6
CDD5
CDD4
CDD3
CDD2
CDD1
CDD0

5

25
INT_CD_L
25
CD_AGND
19 CD_RSTDRV#

SIDE_RST# 19

7SH08FU

8P4R-100K

2 DRV0#
1K
RP16
+5VS

1000PF
2

10P8R_1K
1
R119

C491

C492
C504
10U_1210

1

W=80mils

+5VMOD

C493

Compal Electronics, Inc

1UF_25V_0805 .1UF
2

STEP#
MTR0#
RDATA#

1

5
4
3
2
1

2

+5VS

6
7
8
9
10

1

WDATA#
WGATE#
HDSEL#
FDDIR#

Title
IDE/ FDD MODULE CONN.

2 EXTCSEL
470
Place component's closely CD-ROM CONN.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet

20

of

38

4

3

2

1

X4

+3VS

+5VS

MS_X2
8MHZ

D

2
G

1M

1

R438

1

Q71
SI2301DS

1

MS_X1

1

5

C578

C582
3

2

3
3

S

D

G

SM_3VON#

4.7UF_0805

R446

Q75
SI2301DS

4.7UF_0805

S

Q74
SI2301DS

+5VS

D

G

C574
15PF

2

S
C573
15PF

@0_0805

SM_5VON#

2

1

F5

U47

SM_FD7
SM_FD6
SM_FD5
SM_FD4
SM_FD3
SM_FD2
SM_FD1
SM_FD0

4
5
6
7
8
9
10
11

SM_3VON#
SM_CE#0
SM_FALE
SM_FCLE
C

+5VS

C576

2
4.7K

1

1

1
R445

17
36
56
21
57
23

C577
0.1UF

2

2

0.1UF

60
61
62
63
64
1
2
3

32
33
48

D7/P07
D6/P06
D5/P05
D4/P04
D3/P03
D2/P02
D1/P01
D0/P00
A15/P17
A14/P16
A13/P15
A12/P14
A11/P13
A10/P12
A9/P11
A8/P10

INT1/P50
INT4/P51
INT3/P52
INT2/P53
WKUP8/P54
INT0/P55
WKUP9/P56
NMI/P57
P40
P41
P42
P43
SOUT/P30
P31
CLKOUT/P32
RXCLK/P33
WKUP4/P34
SIN/P35
WKUP6/P36
WKUP7/P37

AVDD
VPP
VDD
VDD
VSS
VSS
NC
NC
NC
ST92163/TQFP

NC
NC
NC

34
31
30
29
28
27
26
25
55
54
53
52

1
5
6
7
8

1
2
C583 @.1UF

SDA
SCL
WC
VCC

GND
A2
A1
A0

4
3
2
1

R454
C579
470
1UF_0603

@NM24C02

SM_R/B
SM_FWE#
SM_LVD
SM_5VON#
SMCD#
SM_FWP#

1
R443
1
R444

44
43
42
41
40
39
38
37

2
4.7K

2
100K

+5VS

C

30

1
C584

Q_FD5
Q_FD3
Q_FD6
Q_FD2
Q_FD7
Q_FD1
Q_LVD
Q_FD0

2

5
U57

0.1UF
15
1

1N4148
SM_FD4
SM_FD5
SM_FD3
SM_FD6
SM_FD2
SM_FD7
SM_FD1
SM_LVD
SM_FD0
SM_FWP#

2
3
4
5
6
7
9
10
11
12

SM_R/B
SM_FWE#
SM_FRE#
SM_FALE
SM_CE#0
SM_FCLE

13
14
16
18
19
20
21
22
23
24
8
17

VCC
NC

OE1#
OE2#

1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1A9
1A10

1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
1B9
1B10

2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2A9
2A10

2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
2B10

GND
GND

GND
GND

48
47

U56
7SH08FU

2

SMC_VCC

1
4.7K

1

SM_5VON#

2

SM_3VON#

4

46
45
44
43
42
40
39
38
37
36

Q_FD4
Q_FD5
Q_FD3
Q_FD6
Q_FD2
Q_FD7
Q_FD1
Q_LVD
Q_FD0
Q_FWP#

35
34
33
31
30
29
28
27
26
25

Q_R/B
Q_FWE#
Q_FRE#
Q_FALE
Q_CE#0
Q_FCLE

Q_FWP#
Q_R/B
Q_FWE#
Q_FRE#
Q_FALE
Q_CE#0
Q_FCLE

SMC_VCC
3

1

2

2

R441

2
0.1UF

12
11
13
10
14
9
15
8
16
7
17
6
18
5
19
4
20
3
21
2
22
1
23
24

SMCD#
Q_FD4

49
58
59

1

1

1K

D40
+5VS

SMCD#

JP14
SM_LED

C585

B

Q76
2N7002
2

+5VS
R460

SMC_VCC

2

1UF_0603

DSN

20
19
18
16
15
14
13
12

2

FUSE_0.5A

U55

1

45

SDA/P60
SCL/P61
WKUP12/P62
AIN1/P63
AIN2/P64
AIN3/P65
AIN4/P66
AIN5/P67

MS_X1
MS_X2

3

SM_FRE#

2

C575

#RESET

22
24

2

35
1

2

OSCIN
OSCOUT

2

USB2_D+
USB2_D-

1
R440
10K

2
1.5K

1

USB_GND
USB_VCC
USB_DP
USB_DM

2

9
9
+5VS

1
R439

46
47
50
51

1

@4.7K

1

1
R456

@4.7K

D

R455

D

1

2

2

SMC_VCC

1
R317

2
100K

VCC
PCD#
I/O4
VSS
I/O5
I/O3
I/O6
I/O2
I/O7
I/O1
LVD
I/O0
GND
WP#
RDY
WE#
RD#
ALE
CE#
CLE
VCC
VSS
GND
WPRO#

B

SmartMedia Slot

41
32

FST16210
A

A

Compal Electronics, Inc.
Title
SmartMedia Interface
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:
5

4

3

2

Document Number
888M1
Wednesday, April 25, 2001

Rev
1.0
Sheet
1

21

of

38

A

B

C

D

E

SUPER I/O SMsC FDC47N227
1

1

9,27

LAD[0..3]

LAD[0..3]

LPD[0..7]
U24

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#1

24
25

4,8,12,14,15,16,17,18,20,27,30 PCIRST#
9,12,30 SUS_STAT#

26
27

9,27
9

1
R167
PCLK_SIO

50
17
30
28
29

14.3M_SIO

19

+3VS
8,14,27
SIRQ
9,14,16,17,18,27 CLKRUN#
11
PCLK_SIO

2

11

14.3M_SIO

12
12
12
12
2

PID0
PID1
PID2
PID3
17V/16V#

1
R166
1
R164

1
R198

2
10K

48
54
55
56
57
58
59
6
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47

2
10K
2
10K

51
52
64
18

+3VS

PCLK_SIO

53
65
93

C215
1

15PF

4.7UF_0805
10V
22PF

.1UF

C191

1

1

C223

.1UF

C190
.1UF

2

21

21
C222

C211

2

33

10

1

R189

2

R197

1

2
10K

2

14.3M_SIO
2

3

20
21
22
23

7
31
60
76

PD0/INDEX#
PD1/TRK0
PD2/WRTPRT#
PD3/RDATA#
PD4/DSKCHG#
PD5
PD6/MTR0#
PD7

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#
PCIRST#
LPCPD#
GPIO12/IO_SMI#
IO_PME#
SIRQ
CLKRUN#
PCICLK
CLK14

BUSY/MTR1#
PE/WDATA#
SLCT/WGATE#
ERROR#/HDSEL#
ACK#/DS1#
INIT#/DIR#
AUTOFD#/DRVDEN0#
STROBE#/DS0#
SLCTIN#/STEP#
DTR2#
CTS2#
RTS2#
DSR2#
TXD2
RXD2
DCD2#
RI2#

GPIO10
GPIO15
GPIO16
GPIO17
GPIO20
GPIO21
GPIO22
GPIO24
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47

DTR1#
CTS1#
RTS1#
DSR1#
TXD1
RXD1
DCD1#
RI1#
IRMODE/IRRX3
IRRX2
IRTX2
RDATA#
WDATA#
WGATE#
HDSEL#
DIR#
STEP#
DS0#
INDEX#
DSKCHG#
WRTPRT#
TRK0#
MTR0#
DRVDEN0

GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23/FDC_PP
VTR
VCC
VCC
VCC
VSS
VSS
VSS
VSS

DRVDEN1
GPIO11/SYSOPT

68
69
70
71
72
73
74
75

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

79
78
77
81
80
66
82
83
67

LPTBUSY
LPTPE
LPTSLCT
LPTERR#
LPTACK#

100
99
98
97
96
95
94
92
89
88
87
86
85
84
91
90

2
49

23

LPTBUSY
LPTPE
LPTSLCT
LPTERR#
LPTACK#
INIT#
LPTAFD#
LPTSTB#
SLCTIN#

23
23
23
23
23
23
23
23
23

RP1
DCD#1
RI#1
CTS#1
DSR#1

CTS#2

1
2
3
4

+3VS
8
7
6
5

RP3
CTS#2
DSR#2
DCD#2
RI#2

+3VS

1
2
3
4

8
7
6
5
2

DSR#2
DCD#2
RI#2
DTR#1
CTS#1
RTS#1
DSR#1
TXD1
RXD1
DCD#1
RI#1

8P4R-4.7K
1
R188

2
1K

8P4R-4.7K
+5V
JP24

1
R175

63
61
62
16
10
11
12
8
9
5
13
4
15
14
3
1

LPD[0..7]

2
1K

IRMODE 23
IRRX
23
IRTXOUT 23
RDATA#
WDATA#
WGATE#
HDSEL#
FDDIR#
STEP#
DRV0#
INDEX#
DSKCHG#
WP#
TRACK0#
MTR0#
2
R194
1
R168

RDATA#
WDATA#
WGATE#
HDSEL#
FDDIR#
STEP#
DRV0#
INDEX#
DSKCHG#
WP#
TRACK0#
MTR0#
3MODE#

20
20
20
20
20
20
20,28
20
20
20
20
20
20

1
10K
2
1K

+5VS

1
2
3
4
5
6
7
8
9
10

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

1
2
3
4
5
6
7
8
9
10
@96212-1011S

3

Base I/O Address
* 0 = 02Eh
1 = 04Eh

SMsC LPC47N227

4

4

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:
A

B

C

D

SUPER I/O
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet
E

22

of

38

FIR Module
+

U1

C2
1

2

2

0.47UF_0603
7

1
R141
1
R142

2
10K
2
10K

4
5
3

22

IRMODE

2

1

1
C1
10UF_1206

R1
4.7_1206

FIR_VCC

VCC

LEDA

GND

AGND

MODE0

TXD

MODE1

RXD

FIR_SEL

N.C

1/4W

R457
4.7_1206
+

10UF_1206

W=40mils

10

C163

2

+3VS

1

1

+3VS

2
9

IRTXOUT

8

IRRX

IRTXOUT 22
IRRX

22

6

IRMODE
HSDL-3600

The component's most place
cloely IRDA MODULE.

+5V_PRN

PARALLEL PORT

LPTSLCT
LPTPE
LPTBUSY
LPTACK#
10
9
8
7
6

+5V_PRN
CP4
RP18
10P8R-2.7K

D8
+5VS

2

1
R139
2.2K

1
2
3
4
5

RB420D

+5V_PRN
22

AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#

LPTSTB#
AFD#/3M#

R140

22

1

INIT#

+5V_PRN
22

1

SLCTIN#

R3
33

2

LPTINIT#

2

LPTSLCTIN#

22

LPTAFD#

22

LPTERR#

FD0
LPTERR#
FD1
LPTINIT#
FD2
LPTSLCTIN#
FD3
FD4

10
9
8
7
6

FD5
FD6

RP21
RP19
10P8R-2.7K

LPD0
LPD1
LPD2
LPD3

1
2
3
4

FD0
FD1
FD2
FD3

8
7
6
5
8P4R-68

1
2
3
4
5

LPD7
LPD6
LPD5
LPD4

+5V_PRN

RP20
1
2
3
4

FD3
FD2
FD1
FD0

8
7
6
5

FD7
FD6
FD5
FD4

FD7
22

LPTACK#

22

LPTBUSY

22

LPTPE

22

LPTSLCT

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

1
2
3
4

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

4
3
2
1

8P4C-220PF
CP1
5
6
7
8

FD0
FD1
FD2
FD3

1
2
3
4

8P4C-220PF
CP3
8
7
6
5

FD4
FD5
FD6
FD7

1
2
3
4

8P4C-220PF
CP2
8
7
6
5

33
R138

R2
33

FD4
FD5
FD6
FD7

LPTSTB#

C164
220PF

AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#

33

1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13

8
7
6
5

8P4C-220PF
JP4
LPTCN-25

8P4R-68

22

LPD[0..7]

LPD[0..7]

Compal Electronics, Inc.
Title
PARALLEL PORT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet

23

of

38

USB_VCCA

USB_VCCC

F3

F4

R298

+

C395

POLYSWITCH_0.75A

R422
2
470K

9
9

R303

C570

R423

1000PF

560K

1000PF

560K
2

2

C406

USB0_DUSB0_D+

USB0_DUSB0_D+

USB_CGND

1

1

OVCUR#3

1

9

2

2

1

OVCUR#0

C568
150UF_E

2

USB_AGND

2

470K

1
1

L29
0_0805

JP9
1
2
3
4

2
2

L28
0_0805

9
9

USB3_DUSB3_D+

USB3_DUSB3_D+

1
1

L42
0_0805

2
2

L43
0_0805
1
L44
CHB4516G750_1806
4516

C571

2

2

2

C393
.1UF

2

L30
CHB4516G750_1806
4516

1

1

1

SUYIN USB Connector 2569A-04G3T-B

.1UF

USB_VCCB
F1
1

+5VS
1

POLYSWITCH_0.75A

R146

+

C181
C3
150UF_E

2

.1UF

USB_BGND

2

470K

C183

R145

1000PF

560K

JP1
1
2
3
4
5
6
7
8

2

2

1

OVCUR#1
1

9

9
9

USB1_DUSB1_D+

USB1_DUSB1_D+

1
1

L16
0_0805

2
2

L15
0_0805

2

C182
.1UF

1

2

L17
CHB4516G750_1806
4516

1

1

SUYIN 2553A-0BG5T-A

+5VALW

+3VALW

R121

2

@100K
JP15
C132

1

3

2

@.1UF
2
1

1

1
C131

Q11
@SI2301DS
BT_VCC
1

2
Q9
22K

@DTC124EK

9
9

USBBT_D+
USBBT_D-

28

BT_RESET#
BT_VCC

+

C126

1
3
5
7
9
11
13
15
17
19

2
4
6
8
10
12
14
16
18
20

ANT_SW

28

C121
@.1UF
2

22K

2

18,28,30 RFOFF#

2

28 BT_DETACH
28 BT_WAKE_UP

1

@.1UF

2

1

R123
@100K

@HRS DF15-08-20DS-065V

@4.7UF_1206
10V

3

9

+

C569
.1UF

2

.1UF

C100
150UF_E

1

1

POLYSWITCH_0.75A

1

+5VS
1

+5VS

Compal Electronics, Inc
Title
USB & FIR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet

24

of

38

AC97 Codec
+5VS

ON/OFF#

1 1

3

Q46
2N7002

C405

1

input to AMPLIFY

4.7UF_10V_0805
3

GND

LEFT

Q47
2N7002

C402

C499

SI9182

R_INT_CD_R

20 INT_CD_R

2

.1UF

3

DM_ON

19 DM_ON

R369
0
1

R_INT_CD_L

1

3

Q49
2N7002

3

1

+3VS

+5VAMP_PU
R370
10K
2
2

1 1

Q45
2N7002

1UF_25V_0805

3 CDROM_L

1 1

Q51
2N7002

Q44
2N7002
2

R374
@10K

RIGHT

2

CNOISE

3

1UF_25V_0805

2

ERROR

R_INT_CD_L

20 INT_CD_L

VDDA

6

2

8

SENSE

2

7

5

VOUT

DELAY

1

.1UF

VIN

2

2

2

2

4.7UF_10V_0805

C408

1

1

1

4
C414

C500

2

U43

C488
10UF_10V_1206
2

input to CS 4297A

R375
10K

2

2
15

26
26

LINE_IN_L
LINE_IN_R

CDROM_L
CDROM_R

26

MIC

2
R357
2
R347
2
R342
2
R356

1
6.8K
1
6.8K
1
6.8K
1
6.8K

2
R354
2
R358

1
20K
1
20K

1
C464

MD_SPK
26
9,12

17
1
2
C466
1UF_25V_0805
1
2
C460
1UF_25V_0805
CD_L_R 1
2
C457
1UF_25V_0805
CD_R_R 1
2
C458
1UF_25V_0805
CD_GNA 1
2
C465
1UF_25V_0805
1
2
C581
1UF_25V_0805
1
AUD_VREF
2.4K

MIC

1
2
C452 1000PF
2
1UF_25V_0805

2
R341
2
R340

1
10K

1
C451

MONO_IN
IAC_RST#

2
R331

23
24
18
20
19
21
22

2
13
1UF_25V_0805
12

1
100

11

IAC_SYNC

10

9,12 IAC_SDATAO

5

1

9
VCC

38

25

LINE_OUT_L

AUX_R

LINE_OUT_R

VIDEO_L

MONO_OUT

VIDEO_R

HP_OUT_L

LIN_IN_L

HP_OUT_R

LIN_IN_R
BIT_CLK
CD_L
SDATA_IN
CD_R
XTL_IN

2

1

1

2

35

LINEL

1

2

36

LINER

1

2

37

1

2

39

2

1

C416
1000PF
C423
1000PF
C410
4.7UF_10V_0805
C403
4.7UF_10V_0805
C400
1UF_10V_0805
C412
1000PF

6

1

8

1

R319
2 22
R321
2 22

PC_BEEP

RIGHT

LEFT

26

RIGHT

26

MD_MIC

12

IAC_BITCLK 9,12
IAC_SDATAI 9
C422
22PF NPO

2
Y4
24.576 MHz

MIC1

PHONE

LEFT

41

CD_GNA

MIC2

2

DM_ON#

XTL_OUT
AFLT1
AFLT2
VREFOUT

RESET#
REFFLT
SYNC
FLT3D

3
29
30

1
C435
1000PF NPO

28

C447
22PF NPO

2
1
2
C433
1000PF NPO 1
R348

2

AUD_VREF

0

27
32

SDATA_OUT

2

1
2

2
R334
@100K
C429

AUD_VREF
L31
1

0_0805
2

1000PF NPO

L36
1

0_0805
2

L37
1

0_0805
2

C454

2

CD_GNA

1
R352
3.3K

1

CD_AGND

R351

Compal Electronics, Inc.

R353

0

3.3K
2

20

C459
4.7UF_10V_0805

.1UF
2

CS4299A

40
26
42

1

GND
GND

NC
AGND
AGND

C444
1UF_25V_0805

2

S/PDIF_OUT

C439
.1UF
C431
.01UF

1

4
7

31
33
34
43
44

1

48

EAPD#

BPCFG
FLTI
FLTO
NC
NC

1

47

EAPD

1

26

ID0#
ID1#

2

45
46

2

1

9,12

2

12

16

AUX_L

Q52
2N7002

1

14

VCC

AUD_VREF

1
6.8K
1
6.8K

AVCC

AVCC

2
R349
2
R346

3 CDROM_R

1 1

C426
4.7UF_10V_0805

.1UF

2

2

C437

R376
@10K

+3VS

19 DM_ON#
U45

3
Q48
2N7002

2

1

C449
4.7UF_10V_0805

.1UF

2
0_0603

1

1

1
1

R_INT_CD_R

1

R328

CHB2012U170
C413

2

1

VDDA

+5VAMP_PU

VDDC

2

2

AVDD_AC97
L32
1

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:

AC97 CODEC
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet

25

of

38

A

B

C

D

E

AMP & Audio Jack

1

+5VCD

+5VCD

R390
100K

C474

1

1
2

C507

JP16
INTSPK_R1
INTSPK_R2
INTSPK_L1
INTSPK_L2

1 Q50

4.7UF_10V_0805

2

2

.1UF

4

SHUTDOWN#

2

W=40Mil

EAPD

3

1
2
3
4

25

4

ACES 85205-0400

2N7002

U48

C509
C475 .47UF_0603
1
2

.47UF_0603

1

17

1

C471

C470

.47UF_0603.47UF_0603
.47UF_0603
JP20

C506
TPA0132

2

C508 .47UF_0603

C469

5

.047UF_0805
C477

4

2

1

1
12
13
24

.1UF
2

3

25

LINE_IN_R

25

LINE_IN_L

FBM-11-160808-700T
1
2
L9
1
2
L8
FBM-11-160808-700T

3
6
2
1
C149

1

RIGHT

U3-5
U3-23
U3-6
U3-20

+5VCD

1

25

1

1
100K

1

INTSPK_L1
INTSPK_R1
1
2
C476 .47UF_0603
2

2
R382

2

VOL_AMP

LEFT

2
3
4
21
5
23
6
20

1

2

NBA_PLUG
C505 1
2
.1UF
INTSPK_L2
INTSPK_R2

2

27
25

100K

22
15
14
11
9
16
10
8
1

R368
1

PVDD SHUTDOWN#
SE/BTL#
PVDD
PC-BEEP
VDD
BYPASS
PC-ENABLE LOUTVOLUME
ROUTLOUT+
LIN
ROUT+
RIN
LLINEIN
RLINEIN
GND
LHPIN
GND
RHPIN
GND
GND
CLK

2

7
18
19

3

C151
PHONEJACK

2

330PF

2

330PF

JP23
5

74LVC14

R392

1

1UF_10V_0603

2

560

R373
10K

+3V POWER

10UF_10V_1206

2

.22UF_0603

1UF_10V_0603

AVDD_AC97

2
3 Q43
2SC2411EK

R332
2.4K

1
2
R381
18K_1%_0603

1

1UF_10V_0603 560

1
Q53
3 2SC2411EK

2

+3V

C527
1

1
2

R388
18K_1%_0603
1
2

MONO_IN 25

1

R387

1

2

C502
2

MONO_IN

2

1

PCM_SPK#

C453
2

1

2

AVDD_AC97
1

14

1

1

2

C489

2

C379

330PF

2
2

7

C150
PHONEJACK

1

1

3
6
2
1

2

2
8.2K
1

+3V POWER
U18B
74LVC125

1
R284

C514
1
2

4

330PF

U36A

14

1

2

4

6

2

NBA_PLUG
L38
2
1
2 INTSPK_R1-3
47 FBM-11-160808-700T
2
1
2 INTSPK_L1-3
47
L39
FBM-11-160808-700T
C541

R350
10K

.1UF

5

1

C485
150UF_D

1

R288
100K

2

INTSPK_L1

VDDA
C361
1
2

1
R396
1
R397

2

BEEP#
1

27

C494
150UF_D
INTSPK_R1 1
2

+3V

+ +

+3V

1UF_10V_0603

R402

2

R389
100K_1%_0603

JP21

2.2K
2

5

EXT.

4

7

4
74LVC14
+3V POWER

1

1UF_10V_0603

3
6
2
1

2

560

25

R391
10K

MIC

1
2
L41
FBM-11-160808-700T

C540
220PF

D35
RB751V

MICPHONE
JACK
PHONEJACK
1

2

2

1

MIC

1

3

R386

2

SPKR

C501
1
2

1

9

U36B

1

14

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:
A

B

C

D

AMP & Audio Jack
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet
E

26

of

38

2

16,18 WLANPME#
16,18 LAN_PME#

17

1
R401

2
@100K

Q54
@2N7002
3
1394_PME#

34
34

ALI/MH#
BLI/MH#

9,30
9

ON/OFF
SLP_S5#

BATT_CHGI
ADP_I

2

+12V

BATT_TEMPA
BATT_TEMPB

1

OEM
OEM
1

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

BATT_TEMPA
2
.01UF
BATT_TEMPB
2
.01UF
9,22

LAD[0..3]

9,22
LFRAME#
9
LDRQ#0
8,14,22
SIRQ

+5VALW
1
R213
1
R212

A

1
2
3
4
5
6
7
8
9
10

9
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
EC_URXD
EC_UTXD
EC_USCLK

LAD0
LAD1
LAD2
LAD3
2
@0

ECSCI#
G20
RCL#

ECSCI#

+3VALW
11

1
C330

9
8
7

31
5
6
18

PCLK_EC

2
1
22PF R241

15
14
13
10

51RST# 19
22
23
24
25

51RST#

30
LPCPD#
9,14,16,17,18,22 CLKRUN#

JP25

105
106
107
108
109

95

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPD0/RI1#/EXWINT20
IOPD1/RI2#/EXWINT21
IOPD2/EXWINT24
IOPD4
IOPD5
IOPD6
IOPD7

IOPJ0/RD#
IOPJ1/WR0#

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS#
IOPJ6/PLI
IOPJ7/BRKL_RSTO#

SELIO#
SEL0#
SEL1#

AD0
AD1
AD2
AD3

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
IOPE4/SWIN
IOPE5/EXWINT40

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

DP/AD8
DN/AD9
DA0
DA1
DA2
DA3

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

TINT#
TCK
TDO
TDI
TMS

2
33

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#
SERIRQ
LREST#
SMI#
PWUREQ#
IOPE6/LPCPD#/EXWIN45
IOPE7/CLKRUN#/EXWINT46
IOPD3/ECSCI#
GA20/IOPB5
KBRST#/IOPB6

32KX1/32KCLKOUT
32KX2

LCLK

ECAGND

2
10K

1

161
VBAT

AVCC

16
VDD

34
45
123
136
157
166

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#

LAD[0..3]

1
R432
30

2 EC_SMC2
4.7K
2 EC_SMD2
4.7K

1
2
3
4
5
6
7
8
9
10

93
94
99
100
101
102

DAC_BRIG
VOL_AMP
IREF
EN_DFAN

B

1
C388
1
C389

87
88
89
90
2
44

PME#
12
26
33
30

ECAGND

81
82
83
84

IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT

CLK

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

2

143
142
135
134
130
129
121
120

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

113
112
104
103
48

KBA16
KBA17
KBA18
KBA19

138
139
140
141
144
145
146
147

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

SELIO#

173
174
148
149
155
156
3
4
27
28

SYSON
SUSP#
MMO_ON

110
111
114
115
116
117
118
119

KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA

71
72
73
74
77
78
79
80

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

158

CRY1

160

FSTCHG

33,34

FRD#
FWR#

28
28

SELIO#

28

FSEL#

28

SYSON
SUSP#

29
19,29,35,37

ATF_INT# 9

RB751V

D

C

TRICKLE 34

VTT_ON
VTT_PWRGD#
ENVEE
ENBKL

ENVEE
ENBKL

12
12

+3VALW

KBA1

1
R232

2
1K

R228
1
R226

@1K
2
1K

R216

1K

KBA2
TP_CLK 12
TP_DATA 12
LID_SW# 30
CDON#/MP3 30

KBA3
KBA5

B

I/O Addre ss
Index

BADDR1(KBA 3) BADDR0(KB A2)

*

Data

0

0

2E

2F

0

1

4E

4F

1

0

1

1

(HCFGBAH, HCFG BAL) (HCFGBAH, HCFGB AL)+1
Reserve d

R191
CRY1

2 CRY2

1

20M_0603

ENV0 (KBA 0)
R214
510K

CRY2

IRE
* OBD
DEV
PROG

0
0
1
1

ENV1 (KBA 1)

TRIS (KBA 4)

0
1
0
1

0
0
0
0

X1

47

PC97591VPC
L27
1
2
CHB1608U800

29,37

1
10K
2

D23

150
151
152

2
R31

+3VS

VR_ON

RB751V

ATFOUT# 1

2

34
34

2

Q12
2N7002
3

BATT_TEMPA
BATT_TEMPB
VBATTA
VBATTB

IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13/BE0
IOPK6/A14/BE1
IOPK7/A15/CBRD

IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING#/PFAIL#

124
125
126
127
128
131
132
133

1

PCM_PME#

R28
10K

62
63
69
70
75
76

1
R204

+3V
MMO_ON

32.768KHZ

1

15
G_RST#
9
EC_RIOUT#
34
A/B#USE
9,11
SLP_S1#

1
14

ECSMI#
VGA_SUSP#

ECSMI#

26
29
30
41
42
54
55

IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7

1

9

+3VALW

2
100K

SCR_LED#

KBA[0..18]
ADB[0..7]
KSI[0..7]
KSO[0..15]

KBA[0..18]
ADB[0..7]
KSI[0..7]
KSO[0..15]

C217
10PF

C233
10PF

2

C

1
R137

ACIN
RING#

30
NUM_LED#
30 CAPS_LED#
30 ARROW_LED#

RB751V

+12V

PC7

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10

1 RCL#

2

RC#

168
169
170
171
172
175
176
1

PME#
ATFOUT#

9,30,32,35 ACIN
14
RING#
9
SLP_S3#

D25

153
154
162
163
164
165

EC_SMC2
EC_SMD2

MP3#
PC7

32
33
36
37
38
39
40
43

AGND

2

2

1

1

1 G20

2
RB751V

8

EC_URXD
EC_UTXD
EC_USCLK
EC_SMC1
EC_SMD1

EN_WOL#
EC_SMC1
EC_SMD1
PCIRST#

30
30

D24
GATEA20

For PWM EN_D
FAN

9
PBTN_OUT#
2,19,34 EC_SMC2
2,19,34 EC_SMD2
30 FAN_SPEED

R234
10K

28
28
12
12

1

D18

11
12
20
21
85
86
91
92
97
98

18
28,34
28,34
4,8,12,14,15,16,17,18,20,22,30

R32
10K

INVT_PWM

96

2

.1UF
ECAGND

+3VS

8

INVT_PWM
BEEP#

GND1
GND2
GND3
GND4
GND5
GND6
GND7

1

1
2

.1UF

U32

33
ACOFF
9
LLBATT#
30
51ON
9 EC_LID_OUT#
14 PCM_SUSP#

C377

+RTCVCC

C48

2

2

L45
1
2
CHB1608U800

51AVCC

51VDD

2
@0

17
35
46
122
137
159
167

+RTCVCC

0

12
26

2

+3VALW

.1UF

+3VALW

D

2

1000PF 1000PF

51AVCC

C240

C73

1

C239

2

.1UF
2

.1UF

C241

1

1

C313

2

2

.1UF

2

.1UF

C391

1

1

1

+3VS
C242

3

1
R48
1
R47

1

+3VALW

2

4

+3VALW

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6

5

@96212-1011S

SHBM(KBA5)=1: Enable shared memory w
TRIS(KBA4)=1: While in IRE and OBD,
signals for clip-on ISE use

ith host BIOS
float all the

Compal Electronics, Inc.
Title
EC PC87591

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:
5

4

3

2

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet
1

27

of

38

A

+3VALW

.1UF

C213
1

+5VALW

2

C195

1

2

20

20

.1UF

20 SHDD_LED#
20 PHDD_LED#
20,22
DRV0#
15
OCCB#
+3VALW

SELIO#

SELIO#

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

+3VALW
RP2
DD
AA
BB
CC

C214

1
2
3
4

8
7
6
5

1

+3VALW

2
U26A
74LVC32

.1UF
14
1

KBA2

8P4R_100K

3
SELIO#

2
7

74LVC244

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

3
4
7
8
13
14
17
18

AA
LARST#

11
1

D0
D1
D2
D3
D4
D5
D6
D7

U22
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

CLK
CLR

10

6
27

1G
2G

10

U26B
74LVC32

14
4

KBA1

1
19

18
16
14
12
9
7
5
3

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

PCM_LED

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

CC

5
7

R192
1

+5VALW

2
5
6
9
12
15
16
19

1
R433

EXTIDEPWR# 20
MDC_DN# 12
BT_DETACH 24
RFOFF# 18,24,30
BT_RESET# 24
CD_PLAY 19
HDD_LED# 30
2ND_CHGI_CD_FDD_LED#

2
@0

30

GND

2
4
6
8
11
13
15
17

GND

BUTTON1#
INTERNET#
CD_INTA#

VCC

U27
30
30
19

74HCT273

C216
2

1

2
1UF_25V_0805

1

20K
R217
100K

C196

+3VALW

1
19

11
SELIO#

.1UF
U23

VCC

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

1G
2G

10

U26D
74LVC32

14
12

KBA3

2
4
6
8
11
13
15
17

2
.1UF

2

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

18
16
14
12
9
7
5
3

+3VALW
U26C
74LVC32

14
9

KBA4

8
SELIO#

GND

20
EXTID0
20
EXTID1
20
EXTID2
24 BT_WAKE_UP
19 MEDIA_DETECT
30
VOL_UP#
30
VOL_DW#
30
KILL_SW#

20

100K
2

DAN202U

1

20

R8

1

C202

10
7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

3
4
7
8
13
14
17
18

BB
LARST#

11
1

D0
D1
D2
D3
D4
D5
D6
D7

U21
2
5
6
9
12
15
16
19

VCC

2

14 PCM2_LED

+5VALW

CLK
CLR

74LVC244

PWR_LED# 30
2ND_BATT_LOW_LED# 30
BATT_LOW_LED# 30
BATT_CHGI_LED# 30
ANT_SW 24
CD_STOPBTN# 19
PCMRST# 15
EN_LAN# 16

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND

+3VALW

10

PCM_LED

3

1

1

14 PCM1_LED

** No stuff R8 when stuff OZ168

2

D36

74HCT273

DD

13
7
+5VALW

+3VALW

4

C114
1
2

1
R105
1
R110
FLASH_VCC

1
19

BID= 0 for Rev 0.3 M/B or down
BID= 1for Rev 0.4 M/B or up.

7SH32FU
2

+5VALW

2
@0

+3VALW

0

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

1
2N7002

U31
7SH32FU

FLASH#
FWR#

9
27

27,34
27,34

R18

R17

4.7K

4.7K
2

2
G
D

1

Q24
3

1

S

2

4

+12VS

1

1
2
100K

5
2
FWE#

1G
2G

EC_SMC1
EC_SMD1

.1UF
U28
8
VCC
7
6 WC
SCL
5
SDA

1
R15
100K

A0
A1
A2
GND

1
2
3
4

3

NM24C16

R190
100K

74LVC244

1
C110

U14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

1

A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4

OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

2
.1UF

U13

U12

.1UF
KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

R220
R209
100K

2

3

U20

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

C238
1
2

1

1

2
100K 1
2
2 R152 BID 100K
100K
1
2
R173
100K

VCC

20
2

SELIO#

1
R153
1
R151

.1UF

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

18
16
14
12
9
7
5
3

2
.1UF

+5VALW

GND

5

C194
1
2

2
4
6
8
11
13
15
17

1
C225

.1UF
U19

10

30 MP3_STOPBTN#
30 MP3_PLAYBTN#
30 MP3_FRDBTN#
30 MP3_REVBTN#
19,30 STOPBTN#

+3VALW

KBA5

MP3_STOPBTN#
MP3_PLAYBTN#
MP3_FRDBTN#
MP3_REVBTN#

+5VALW +5VALW

2

+3VALW +3VALW

C185
1
2

2

+3VALW

FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

FRD#

27

FSEL#

27

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

VCC
WE*
A17
A14
A13
A8
A9
A11
OE*
A10
CE*
DQ7
DQ6
DQ5
DQ4
DQ3

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

FLASH_VCC

FLASH_VCC

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4

OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

Compal Electronics, Inc

@29F040_TSOP
29F040/SST39VF040_PLCC

Title
BIOS & EXT. I/O PORT

27
27

KBA[0..18]
ADB[0..7]

@SST39VF040_TSOP
KBA[0..18]
ADB[0..7]

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number
888M1
Wednesday, April 25, 2001

Rev
1.0
Sheet

28

of

38

A

B

C

D

+1_5V

+1_8V

E

+3V

+5V

+12V

+3V

R6
470

+

+3VALW

C562
C563
1UF_0805
10UF_1206
6.3V

+1_8V

SYSON_ALW

8
7
6
5

U52
D1
D1
D2
D2

S1
G1
S2
G2

R407

8936

1

C549
10UF_1206
6.3V

C561

R406

.01UF

@1M

2N7002
Q58
3

D1
D1
D2
D2

S1
G1
S2
G2

1
2
3
4

+

1
3

R421
470

Q63
2N7002
2 SYSON#

1
2 SYSON#

3
+

C38
4.7UF_1206

C72
4.7UF_1206
16V

R419
470

1

1
2 SYSON#

3

2 SYSON#

3

3

Q19
2N7002

8936
2 SYSON#

R416
470

Q67
2N7002

Q65
2N7002

1

C58
1UF_0805

16V

2

+

+12VALW

100K

1

Q2
2N7002
2 SYSON#

+1_8VS
U8

1
2
3
4
1

1

8
7
6
5

R158
470

+1_5VS

5VS_GATE

+1_8VS

+3VS

+5VS

+12VS

+3VS
C41
.01UF
+3V
+
C254
10UF_1206
6.3V

U30
8
7
6
5

D1
D1
D2
D2

S1
G1
S2
G2

1
2
3
4

3

Q23
2N7002
2 SUSP

R405
C218
.01UF

2N7002

+2.5V
2

3

2

C99

1UF_0805
+5VALW

Q5

+12VALW

G

VR_ON#

2

SI2301DS
1
+
C559
4.7UF_1206
16V

8936
C543
4.7UF_1206
16V

D

1
2
3
4

Q66
2N7002

Q60

+5VS
S1
G1
S2
G2

2 SUSP
3

100K
2 SUSP

U51
D1
D1
D2
D2

1
2 SUSP

3
Q68
2N7002

3
@1M

R420
470

1

3

+12VALW

S

+5VALW

+

1

R415
470

1

1

C253
10UF_1206
6.3V

2

8
7
6
5

R211
470

Q3
2N7002
2 SUSP

1

3

R408
5VS_GATE

R7
470

Q1
2N7002
2 SUSP

1

8936
+

R5
470

C243
1UF_0805

+12VALW
R409
10K

+2.5V_CLK
C550
.1UF

C555
1UF_0805

R404
100K
C551
1UF_0805
50V

3
+

2

C97
4.7UF_1206

C98
1UF_0805

1

16V

SYSON#

SYSON#

1
27

Q55
NDS352P

R403
51K

36

SYSON

SYSON

2
3
Q62
2N7002

+12VS

5VS_GATE
+
1
Q56
3
2N7002

SUSP# 2
C553
.01UF

C547
1UF_1206
25V
+5VALW

R9
10K

5VS_GATE
3

+5VALW

C25
.01UF

+5V

3

VR_ON#

U50

+

D1
D1
D2
D2

S1
G1
S2
G2

1
2
3
4

1
+1_5V
+

8936
C548
4.7UF_1206
16V

C558
4.7UF_1206

27,37

+12VALW

+1_5VS

8
7
6
5

16V

+
SYSON_ALW

S1
G1
S2
G2

D1
D1
D2
D2

1
2
3
4

C564
.1UF
+

8936
C44
4.7UF_1206
16V

C19
4.7UF_1206

C21
1UF_0805

3

+5VALW

C565
1UF_0805_50V
50V

3
2
1

16V

Q57
NDS352P
+12V

R412
51K

R410

R417
10K

100K
CPU_IO
2

+

VR_GATE

VR_ON#

1

2
100K

Q4

3

+12VALW

1
R14

2N7002

2
Q22
2N7002

R411
100K

+5V

C552
.01UF

4

VR_ON

VR_ON

+12VALW

U5
C554
1UF_0805

1

8
7
6
5

2

1
Q59
3
2N7002

36

C560
1UF_1206_25V
25V

SUSP

SUSP

1
SUSP#

19,27,35,37 SUSP#

2
3
Q61
2N7002

2
C24
.01UF

4

C31
1UF_0805

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:
A

B

C

D

POWER CONTROL CKT
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet
E

29

of

38

5

4

3

+3VS

2

1

RP22
1
2
3
4

MP3_STOPBTN#
MP3_PLAYBTN#
MP3_FRDBTN#
MP3_REVBTN#

8
7
6
5
10K-8P4R

28 MP3_FRDBTN#
28 MP3_REVBTN#

D

28 MP3_STOPBTN#
28 MP3_PLAYBTN#

MP3_FRDBTN#

2
D14

1
RB751V

FRDBTN#

MP3_REVBTN#

2
D17

1
RB751V

REVBTN#

MP3_STOPBTN#

2
D13

1
RB751V

STOPBTN#

MP3_PLAYBTN#

2
D16

1
RB751V

PLAYBTN#

D

JP6
9,27
ON/OFF
27
51ON
28 2ND_BATT_LOW_LED#
18,24,28 RFOFF#
28
KILL_SW#
27 ARROW_LED#
28
INTERNET#
28
VOL_DW#
9,27,32,35 ACIN
28 BATT_LOW_LED#
28
HDD_LED#
27 CDON#/MP3
19
FRDBTN#
19,28 STOPBTN#

+3VALW
+3VALW
1

R51

FRDBTN#
STOPBTN#

+5VALW

470K

+3V

2

51RST#

1

R202

Q25

2

470K

51RST#

27

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
SUYIN-80065A-040G2T

51ON#
32
LID_SW# 27
MP3#
27
SM_LED 21
CAPS_LED# 27
NUM_LED# 27
BUTTON1# 28
VOL_UP# 28
PWR_LED# 28
BATT_CHGI_LED# 28
2ND_CHGI_CD_FDD_LED#
REVBTN#
PLAYBTN#

28

REVBTN# 19
PLAYBTN# 19
C

+3VALW
+3VS

2

PC7

2N7002
3

27

2
0

1

C

1
R434

FAN CONN.
1

+12V
+5V

2
3

27
LPCPD#

27

EN_DFAN

5 VCC
1

U53

2

3

2

1

JP10
1
2
3

D32
1N4148
Q64
2SA1036K

4
1
2
R414
13K_1%_0603

1SS355
FAN1

.1UF

3
2
VEE LMV321_SOT23-5

53398-0310-FAN

+3V

7SH08FU

@0
1

LPCPD#
R274

LPCPD#

EN_DFAN

10UF_1206

E
C108

1N4148

B

C427

D34

2

4

9,12,22 SUS_STAT#

.1UF

2
.1UF

U37

1

4,8,12,14,15,16,17,18,20,22,27 PCIRST#

D37
1
C567

Q36
2SC2411K

1

5

2

2
.1UF

1

+5V
C566

1
C383

2

+3VALW

2

1

2

C
2
B

1

1

3.6K

B

1

R418

1
2
R413
7.32K_1%_0603

For PC87591 REV 0.A Only

R329

2

10K
27

FAN_SPEED

A

A

Compal Electronics, Inc.
Title
Switchs & Connectors
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Document Number
888M1
Tuesday, April 24, 2001

Rev
1.0
Sheet
1

30

of

38

A

B

C

D

E

+3V

RTC BATT
-

+3V

+3V

1

RSMRST#

5

6

9

C378

8

7

74LVC14

7

74LVC14

RSMRST# 9

U36F
+3V POWER

.22UF_0603

1

RTCBATT

12
74LVC14

1

D31
HSM1265
+5V

+RTCVCC

1

H11
CHGRTC

2

10

1

74LVC14

7
2

1

1

H2

Stand-Off 090

Stand-Off 090

+3VS
+5VS

H24

C363
1

1

ST4

2
MR#

4

VCC

2

RST#

PFI

RST

6

NC

C70

GND

C78

1

R59
H15

7

9

PFO#

8

8
+3V POWER

SYS_PWROK 9

R65

5

10K

.1UF

2

3

.01UF

1

J CPU Thermal Plane Screw Hold

J CPU Thermal Plane Screw Hold

3

1

1

1

1

1

1

3

1

CF17
CF1
CF2
CF5
CF6
CF7
CF20
CF19
CF14
CF15
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80

H29

1

J CPU Thermal Plane Screw Hold
H5

1

H26

1

J CPU Thermal Plane Screw Hold

1

1

1

2

100K

2

MAX708
2

H16

1

Stand-Off 115
H13

1

U18C
74LVC125

U35

1

1

1

240K

H12

2

2
.1UF

R58

Screw Boss 070

7SH32FU

.1UF

1

1

11
C355

ST3

.1UF

2
4

2
330K

U36E

14

2

U39

10

1

Stand-Off 053

1

1

1

Stand-Off 053

47K

R251

C428
.1UF

Stand-Off 053

1

+3V
R250

5

ST2

2

C382
3

ST1

+3V

3

7

+3V POWER

1

13

2

U36D

14

R278
+RTCBATT
330K

14

U36C

14

+

BATT1
2

+3V

R277
47K

1

1

1

1

1

1

1

FD1
FIDUCAL

1

1

FD5
FIDUCAL

1

1

1

1

1

H25

1

H28

1

H19

1

H18

1

H10

L Screw Hold

M Screw Hold

N Screw Hold

O Screw Hold

O Screw Hold

O Screw Hold

O Screw Hold

O Screw Hold

O Screw Hold

H20

FD4
FIDUCAL

1

I Screw Hold

H8

1

G Screw Hold

H7

FD2
FIDUCAL

1

F Screw Hold
H9

1

1

D Screw Hold
H22

FD6
FIDUCAL

1

1

C Screw Hold
H30

FD3
FIDUCAL

H27

1

H4

1

H1

1

H31

A Screw Hold
H14

4

H21

Compal Electronics, Inc.
1

1

1

Title
1

4

M Fixed Position Hold

1

H23

1

F Fixed Position Hold

H3

1

I Fixed Position Hold

1

1

1

CF4
CF11
CF13
CF10
CF12
CF16
CF18
CF8
CF9
CF3
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80

E HDD Frame Hold

E HDD Frame Hold

E HDD Frame Hold

E HDD Frame Hold

A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:
B

C

D

RESET
Document Number

Rev
1.0

888M1
Tuesday, April 24, 2001

Sheet
E

31

of

38

A

B

PF1
5A
PCN1

1

D

2
1

1

C

VIN

PL2
CHC4532U800_1812

1

Vin Detector

1

PR3
10_1206

3
2
PC1
PC2
100PF_0603_50V

PC3
1000PF_0603_50V

PC4
100PF_0603_50V

2

1000PF_0603_50V

High 18.7 17.9 17.1
Low 18.0 17.3 16.5
PZD1
RLZ24B

PR101
1M_1%

2

1

PJP1
1

2

1

1

1

VS
2

VIN

2

1

1

PL1
CHC4532U800_1812

3MM

PR98

PR99
78.7K_1%

CPU thermal protection at 99 degree C
Recovery at 51 degree C

2

-

1
1

+

1

PU1A
LM393M

4

1

PC84
0.1UF_50V

9,27,30,35

PACIN

33,34

PZD4
RLZ3.6B

PR86
10K

2
8

PR13
16.9K_1%
TM_REF

5

+

6

4

PH2
@10K_1%_0805

RTCVREF

1
PR107
10K

MAINPWON

7

MAINPWON 35

2

PU1B
LM393M

PR6

PC7
0.22UF_0805_16V

PH1
10K_1%_080
5

PC8
1000P
F_0805

2

2

2

2.15K_1%

2

2

2

PR8
47K

PR100
20K_1%

3

2

1

PC83
1000PF

PR4

2

1

VS

ACIN

8

2

1

2

2

1

VL
PC6
0.1UF_50V

PR94
0

10K
PR103
22K

1

PD1
BYS10-45

21

3
2
DC JACK

VL
100K_1%
PJP8
PR9
100K_1%

+12VALWP

2

1

+12VALW

(120mA,20mils ,Via NO.= 1)

2

+5VALW

(5A,200mils ,Via NO.= 10)

+3VALW

(5A,200mils ,Via NO.= 10)

+1_5V

(1.5A,60mils ,Via NO.= 3)

JOPEN/+12V
PJP6

PH1 under CPU side
PH2 close to RAM door
PD21
RB751V
34

2

VMBA

VIN
1

+5VALWP

1

+3VALWP

PAD-OPEN 4x4m
PJP7
1
2

2

PAD-OPEN 4x4m
PD20
RB751V

3

34

2

VMBB

PJP2
PD19
RLS4148

1

+1_5VP

2

1

3

3MMA/CPU_IO

1

VS
PQ29
TP0610T
3
1

PZD5
CHGRTCP

2

1

(3A,120mils ,Via NO.= 6)

PJP3
+1_8VP

2

1

+1_8V

2

1

PC77
0.1UF_0805_25V

2

2

PC78
0.22UF_1206_25V
2

PR87
100K

1

1

3MMA/CPU_IO
RLZ6.2C

30

1

51ON#

2
PR88
22K

CHGRTCP
RTCVREF

PR102

PU7
S-81235SG

200_0805

4

4

2

3

3
1

PR106
200

2

PC87
1UF_0805_25V

PZD6
RLZ16B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

2

PC88
10UF_1206_10V

2

1

1

1

CHGRTC

A

B

C

COMPAL ELECTRONICS, INC
Title

Connector / DC-DC Interface
Size

Document Number

B

Rev
1.0

888M1

Date: Tuesday, April 24, 2001

Sheet
D

32

of

38

A

B

C

D

Iadp=0~2.9A
P3

PC34

PC43
0.1UF_0805_25V

PC33

1

@1000PF
4

PR39
47K

1

ACOFF#

1

1

2

PR79
10K

PQ1
2N7002

3

24

OUTC2 GND
+INE2

CS

23

PC60
220PF

22

1

2

VIN

21

1

2

4
PQ18
FDS4435

100K

2

ACOFF

27

6

FB2
VREF

OUT
VH

PC53
0.1UF_0805_25V

20
19

PC54
0.1UF_50V
1
2

LXCHRG
PC55
0.1UF_0805_25V
1
2

1
1

2
PR80
10K

8

2

9

1

1

162K_1%
PR92
100K_1%

2

PR91 10K
1

10

PC98
0.1UF_16V

FB1
-INE1

VCC
RT

18
17

1

+INE1
OUTC1
OUTD

-INE3
FB3
CTL

15
14

FSTCHG

2
PR55
68K

16

2

1

2
PR48
47K

PL7
22UH_SPC-1205PA
1
2

27,34

PR40
0.02_2512_1%
1
2

BATT+

1

PD18
1SS355

2

PC56
1500PF

PD14
RB051L-40

+

1

2

11
2

IREF=1.31*Icharge
IREF=0~3.3V

7

1

PR97
IREF

PC73
2200PF

1

2

2

PR96
@24.9K_1%

2

2

1

PC47
4.7UF_1210_25V
2
1

PR89
10K

5

PC48
4.7UF_1210
_25V
2
1

2

PQ14
DTC115EUA

PC22
100UF_EC
_25V
2
1

1

1

0.1UF_16V

2

PC71
4700PF

2

2

PC97

1
PC72
0.1UF_16V

100K
3

PR95
10K_1%

ACON

-INE2 VCC(o)

5
6
7
8

1

3

PR90
24.9K_1%

2

4

1

S

27

2

1

2
G

2

+INC2

1

2

1

1

1

2
D

2

PACIN

-INC2

2
10K

3
2
1

1

2

PR1
150K
2

1
PR43

PR72
0

PU6
MB3878

2

1

PR2
10K

34

8
7
6
5

2
1
PD2
1SS355
ACOFF#

32,34

1
2
3

4

4

PR35
200K

2

PR36
10K

4.7UF_1210_25V
2

4.7UF_1210_25V

PC35

1

PQ22
SI4835DY
1
2
PL3
FBM-L11-453215-900LMAT

2

8
7
6
5

1

1
2
3

PR15
0.02_2512_1%
2
1

2

1

1

1
2
3
1

8
7
6
5

VIN

B++

B+

PQ12
SI4835DY

2

PQ13
SI4835DY

1

P2

1

P1

-INC1

+INC1

PR56
47K

13

2

12

2

1

2

1

3

3

PR93
47.5K_1%

PR81
143K_1%

CC=0~2.52A
CV=16.84V(2P4S
cells)

4

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
A

B

C

COMPAL ELECTRONICS, INC
Title

CHARGER
Size

Document Number

Date:

Rev
1.0

888M1

B
Tuesday, April 24, 2001

Sheet
D

33

of

38

B

VMBA

VMBA

VMBB

1
2
3

1

2
PQ38
HMBT2222A

EC_SMC1 27,28

2
2

EC_SMD2
EC_SMC2

2,19,27 EC_SMC2

3

GA

2

2

100K
36

GB

GB

2

2

3

100K
2

PQ34
DTC115EK

PQ36
DTC115EK

100K
PR133

3

100K
PR131

2

PD7
@BAS40-04

+5VALWP

3

GA

2

+5VALWP

PD6
@BAS40-04

1
1

2

RLS4148

1

1

1

PD28
PR137
10K

1

2

1

2
PD25
RLS4148
1

3

2

2

2,19,27 EC_SMD2

2
PQ33
HMBT2222A

PR128
10K

36

SUYIN 25063A-07G1

1
3

PD27
@BAS40-04

2

PR27
100

1

2

PD10
@BAS40-04

2

1

1

1

EC_SMC1

PR136
22K

2
22K

EC_SMD1 27,28

PR26
100
2

1
EC_SMD1

1
2
3
4
5
6
7

2

2
2

2

PR135

3

PC21
0.01UF

2

PR134
39K

2

PR129
39K

PJP4
BLI/NIMH#
BB/I
TSB

PR23
1K

1

4

4

4

PC95
0.01UF

8
7
6
5

5A PF2

1

1
2
3

PL9
FMT_600AT_1806
2
1

1

8
7
6
5

1

8
7
6
5

PC20
1000PF

PQ11
FDS4435

1

PQ8
FDS4435

1
2
3

2

PR132
100

P4

2

PR34
100

1
2
3

1

PR138
1K

1

1

1

8
7
6
5
4

PF3

ALI/NIMH#
AB/I
TSA

SUYIN 25063A-07G1

PQ10
FDS4435

PL10
FMT_600AT_1806
2
1

2

7A

PQ9
FDS4435

1

P5

PJP5

1

32

BATT+

PC96
1000PF

1
2
3
4
5
6
7

D

3

1

32

C

1

A

1

10K

1

10K

1

2 1

1

2

PC92
100PF

ALI/NIMH# 2

2

27

PR114 5.6M

1

2

2

1

1

BATT_TEMPA 27

+

5

-

6

27

A/B#USE

2

1
PR117
243K_1%

2

1

2

PR31
@1K

PC93
100PF

BLI/NIMH# 2

27
PQ30

100K

2

2

1

PACIN

DTC115EK

100K
PQ37
DTC115EK

TSB
1
PR24
1K

PD5
3

3

1

2

2

1

1

BATT_TEMPB 27

2

PC90
1000PF

PR119
5.6M

100K

PR25
6.49K_1%
2

1
PR29
@47K
PD29

1
1

1

1

1

2

2 7

PR123 4.7K

3

@BAS40-04

+3VALWP

1

1

3

S0

PR115
200K_1%
2
1

2

100K

8 CELLS BATTERY UVP
H 12.16V L 11.09V

PR116
549K_1%

2

2
PR118
100K

2

1
100K

PU9B
LM393A

2

PR111
10K
PR122

@BAS40-04

VMBA

1

100K

ALI/MH#

RTCVREF

2
1

1

1
VL

PR127
100K

1

PQ32
DTC115EK

2

3

2

S1

FSTCHG

3

2

3

27,33

PR33
1K

PD9

2

2

PR30
@1K

2

PR109
243K_1%

4

PR121 4.7K

TSA
1

PR28
@47K
PD8

1

2

-

PR32
6.49K_1%
2

1

PR113
200K_1%

8

1

1

2

2

PR110
549K_1%

1

2

PU9A
LM393A
+ 3

PC89
0.01UF

2

1
1

8
GND

+3VALWP

PR124
100K

S0
S1
1EN
2EN
14
2
1
15

2

6
5
4
3

PC94
0.1UF_50V

PR120
270K

2C0
2C1
2C2
2C3

ACON
1

33

VMBB

VL

VCC
1C0
1C1
1C2
1C3

1

VL

10
11
12
13

16

2Y

7
1Y

9

VS
PU10
74HC253

BLI/MH#

@BAS40-04

@BAS40-04

32,33

PR112
47K

3

3

100K
2

1

4

TRICKLE 27

4

PD24
RLS4148

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
A

B

C

COMPAL ELECTRONICS, INC
Title

Charger Slecter
Size

Document Number

B

Rev
1.0

888M1

Date: Tuesday, April 24, 2001

Sheet
D

34

of

38

A

B

C

+5VALWP
DAP202U
PD16

OUT1_U

0

23

24

25

OUT2_U

5
6
7
8

17

PQ26
SI4810DY

4
3
2
1

19
PC41
@1000PF

INV2

20

15

FB2

SOFT2

PGOD

OUTGND2

14

13

STBY2

STBY1

REF

GND

SCP

12

11

10

9

8

7

CT

5V_STBY
6

5

FB1

SOFT1
3

INV1

2

1

4

S
S
S
G

0

18

PR74

PC69

57.6K_1%

+
PC79
PC81
150UF_D_6.3V @150UF_D_6.3V

33.2K_1%
PR73
330

2

PC76
+3VALWP

0.1UF

PC64

PC70
2200P

PR78
220

4700P
+

2200P

+

PZD3
RLZ4.3B
2

VL
PR76
11.5K_1%
PR105
649_1%

+

PC80
@150UF_D_6.3V

+3VALWP

0.85VREF
PC68
10PF

PC65
0.01UF

PR77
11.5K_1%

1

PR65
430

VL

2

2

PZD2
RLZ6.2C

0.01UF

PD23
BYS10-45
2

1

1

ADJ

47P
PC51
3300P

+

PD22
BYS10-45

PC67

1

PC66

SCP

PR66
330

Vin

3

1

10UH_SPC_1205P_100

+5VALWP

Vout

1

PR108
75_1%

SKIP/PWM #

OUT2_D

OUTGND1

PR61

2

LL2

OUT1_D

26

2

0

TPS5120
27

1
2
3
4

2

LL1

PQ25
SI4810DY

PC40
@1000PF

PC91
4.7UF_1206
_16V

2
PR57

PU5

PL6

16

D
D
D
D

@RLZ16B

+12VALWP

LH2

PR46
28

PU8
AMS2906

1

5
6
7
8

PR47

3

PC31
PT1
2.2UF_1206_25V 10UH_SDT-1205P-118-120

4.7UF_1210_25V

D
D
D
D

2

PC36

0.1UF_0805_25V

G
S
S
S

29

8
7
6
5

1

PD11
EC11FS2

PZD7

PC32

4.7UF_1210_25V

PC50
0.1UF_0805_25V

TRIP2

0.1UF_0805_25V

VCC

LH1

TRIP1

30
0

21

PR51

1

REG5V_IN

4

VREF5

2

22

4.7UF_1206_16V
PC46
1

PC37

D
D
D
D

PQ24
SI4800

4
3
2
1

S
S
S
G

PR63
10K_1%

G
S
S
S

PC58
2.2UF_0805_16V
PC49

PC59
0.1U_0805_25V

8
7
6
5
PQ23
SI4800

PR62
10K_1%

1
2
3
4

PR38
22_1206

PC57
0.1U_080
5_25V

4.7UF_1210_25V
4.7UF_1210_25V

1

1

2200PF

PC39

D
D
D
D

1

VL
PC38

2

PC25
470PF_0805_100V

B++

3

2

B++

PC99

D

VS

PC82
PC86
@150UF_D_6.3V150UF_D_6.3V
PR64
@100K

PR84
47K

PR85
47K

+3.3V : Ipeak = 6.66A ~10A

1

+5V : Ipeak = 6.66A ~ 10A
PR83

MAINPWON 32

100K

2

19,27,29,37 SUSP#

150K

1

VS

PC74
0.01UF

PR82
100K

PC75
.047U_0603_16V

3

2

100K
PQ28
DTC115EK
3

3

1

1

VIN

PQ27

PC100

2
2N7002

2

ACIN

SCP

3

9,27,30,32

PQ39
TP0610T
2

3

0.1UF_0805
PR141
1

2

1

VL

1

10K
PR142

2

330

4

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
A

B

C

COMPAL ELECTRONICS, INC
Title

5V/3.3V/12V
Size

Document Number

B

Rev
1.0

888M1

Date: Tuesday, April 24, 2001

Sheet
D

35

of

38

A

B

C

D

1

1

+1.8V+-5%

D

2

1

4

-

PR19
2

PC28
68PF

0.85VREF

10K

1

1

1

2

2
PR10
0
PC29
220PF

1

PR12
5.1K

PC5
47UF_D_6.3V

-

2

2

PR5
5.1K

1

2

PR37
69.8K_1%
1

PR11
30.1K_1%

100K

2

100K
3

2

PC17
0.01UF
100K

2

SYSON#

SYSON#

2

VL

1

3
2

+

1

8
PQ5
2SA1036K 1

1

1
2
1

PU2A
LM393A
+ 3

3

+

8

PU3A
LM358

4

2
VS
0
2
+5VALWP
@0

2

VL

PC30
0.01UF

2

1
PR139
1
PR140

2

2

+1_5VP

PR21
162K_1%

PC9
2200PF

2

1

3
PR18
1K

PC24
4.7UF_1206
_25V

2

1

2

+ PC10
150UF_D_4V_FP

2

1

2

2

2

PR17
10K

1
1

PD3
RB051L-40

3

1

1
PC16
4.7UF_1206_25V

PQ6
HMBT2222A

+1.5V+-5%
4

G

1
PR20
191K_1%

G

PD4
RB751V

1

2

1

S
4

6
5
2
1

PC23
0.1UF_50V

LX18

6
5
2
1

PQ3
SI3442DV

+1_8VP

S

D

+5VALWP

PL8
5uH-SPC-06704
1
2

3

PQ4
SI3445DV

PQ2
DTC115EK

1
PR14

2
@0

1
PR16

2

SUSP

29

SYSON#

0

29

100K
3

PQ7
DTC115EK

8 Cells Charger OVP 18.13V

3

3

34

P1

GA

PQ31
1

PD26
1SS355

2
3
2
2N7002

BATT+
1

PR125
36K
PR54
1M_0.5%

34

PU2B
LM393A

GB

PQ35
1

PR126
309K 1%

2

0
7

3

+

5

-

6

2N7002
PR130
100K

PC19
1UF_1206
25V

PR53

PC18
1000P

0.85VREF
PR22
100K
1%

PR45
100K_0.5%

PR52
97.6K_1%

PC52
1UF_0805_16V

4

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
A

B

C

COMPAL ELECTRONICS, INC
Title

1.8V/ CPU_IOP
Size

Document Number

B

Rev
1.0

888M1

Date: Tuesday, April 24, 2001

Sheet
D

36

of

38

A

B

C

D

B++

4

1

1

2

PC11
0.1UF_0805
_25V

@4.7UF_121
0_25V
2
1

1
PC14
2

1

PC15
4.7UF_1210
_25V

PQ17
@SI4894DY
@IRF7811A
4

1

4

PQ16
SI4894DY
IRF7811A

4.7UF_1210
_25V
2
1

PQ15
SI4894DY
IRF7811A

PC13

1

2

5
6
7
8

PC12
4.7UF_1210
_25V

2
@0

2

1
PR44

VR_HI/LO#

PD17
RB751V

2,9

5
6
7
8

5
6
7
8

+5VALWP

BSTCORE1

2

2
9
2

VR_ON

0
12

V_GATE

15

+5VALWP

5
MAX1711_2VREF

MAX1711_2VREF

9

10

DL

PGOOD
VDD

V+
VCC

CC

FB

REF

FBS

ILIM

GNDS

GND

TON

3
2
1

2

DLCORE

13

4

1
VCCORE

7

2

PR71
20

4
PC42
2200PF

1

+

1

PC26
220UF_D
_4V

4

1

1
PQ20
SI4404DY
FDS7764A

14

PD12
EC10QS04

PQ21
SI4404DY
FDS7764A

+

2

3
PC62
0.22UF_0805_16V

4
11
8

2

PR67
0

1

+5VALWP
2

PR59
0

FBCORE

1

1
PR50
1M_1%

PR60
10K_1%

2

PR69
@

1

MAX1711_2VREF

MAX1711_2VREF

1

PR70
150K_1%

PC63
0.22UF_0805_16V
2
1

PC61
220PF

PC45
1UF_080
5_25V

6

SHDN

PQ19
SI4404DY
FDS7764A

2

2

0.002_2512_1%
2
1

2

2

PGND

BSTCORE

2

PC27
220UF_D_4V

1
PR68

D0

22

2

27,29

20

BST

1

2

VID0

DH

D1

DHCORE

1

2

D2

LXCORE

24

PD15
EC31QS04

19

23

2

VID1

LX

5
6
7
8

VID2

2

D3

3
2
1

2

18

CPU_CORE
PR7

5
6
7
8

17

21

3
2
1

VID3

SKIP

5
6
7
8

2

D4

2

PL4
0.9UH/20A_LPI

3
2
1

16

PR49
2.2

VID4

PL5
@1UH
1

1

2

2

PU4
MAX1711

3
2
1

PR41
100K

3
2
1

1

0

PC44
0.1UF_0805
_25V

1
PR42

19,27,29,35 SUSP#

3

3

4

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
A

B

C

COMPAL ELECTRONICS, INC
Title

CPU_COREP
Size

Document Number

B

Rev
1.0

888M1

Date: Tuesday, April 24, 2001

Sheet
D

37

of

38

888M1 PIR LIST
02/22/01 Written byJerry
P04: Change VCC of Pull High to +3V at R186, R187,
184,
R and R185
P05: Remove @ atR266
P06: Change value of C256 to UF_1206
22
Change VCC of Pull High to +3V
at R203
P07: Change VCC of U10 and C90
to +3V
P09: Remove @ atR45
Add @0 Ohm R435 and R436 between USB3_D+/- and
USBBT_D+/P10: Change VCC of R63 to
+1_8V
Change VCC of R271 ot +3V
P12: Change net to CBRST# at pin2
3 of JP8
P13: Delete net CRISIS# at pin5
of JP2
Delete Q18, Q17, R150, E159, R148,
and R147
Change value of R160 ot 10K
Change value of R144 to100K
Change value of R149, R165o t2.2K
Change VCC of Pull High to +5VS at R160, 5,
R16and R149
Change VCC of Pull High to +12VS
at R144
P14: Change net CBRST# at pin 1A1of U16
P15: Change net to CBRST# at pin4 1of U15
Add 0 Ohm R429 between Pin3 of U18nda CBRST#
Add @0 Ohm R430 between G_RST# danCBRST#
Change net PCIRST# at pin2
of U18
Change net PCMRST# at pin1
of U18
P16: Add Q69, R431, R437 and Q70 fornable
E
LAN
Change VCC of Pull High to +3VS
at R181
Delete C184
Short pin2 of R154 and R155 to pin1 of 6
R15
and R157
P17: Change net CBRST# to Pin14
of U49
Delete net between Pin 96 of U49 and Pin
2 of RP38
P18: Add net RFOFF# at pin13
of JP18
Change net CBRST# at pin2foR114
P19: Add @ at 1
R82
Remove @ at D15
P20: Delete net SPDIAG# at pin23
of JP17
Delete net SIDE_PRES# at pin40
of JP17
Delete R289, R318, Q28, nd
a Q33
Add U54 and C572 for SIDE
Reset
P21: Change circuit of SmartMedia rfo
ST92163
P22: Delete C165, R143 nd
a U17
P24: Change net RFOFF# at pin
2 of Q9
Change net USBBT_D+/- at Pin7 anf Pin
9 of JP15
P25: Change value of R328 to
0_0603
P26: Change value of C494 and C485
to 150UF
Delete JP22 and change type of JP16 to 4 pin
connector
Delete C385 and U40 and repla
ce U18B
P27: Add @0 Ohm R432 between LDRQ#0 and
in8p of U32
Add @ at R228
P28: Change net KILL_SW# at Pin1
7 of U23
Add @0 Ohm R433 between pin9 of U22ndaRFOFF#
Delete net BT_LED# at pin5
of U21
Add net PCMRST# at pin16
of U21
Add net EN_LAN# at pin19
of U21
P30: Delete C392, C384, U41,
and U38
Change type of JP6 to B to B nntecor
co
Add 0 Ohm R434 between Pin 9 of JP6ndaRFOFF#
Change net KILL_SW# at Pin of
9 JP6
Change net LPCPD# at Pin4
of 37
P31: Delete U33 andC351
Delete Q26 and ReplaceU18C
Change value of C378 to 0.22
UF_0603
Change type of H11 to Sta
nd-OFF
Pin5 tied to Pin1 ofU35
P32: Change PCN1 DC JACK foot print to 5n pi
for DFX.
P33: Change PQ14 footprint toOT23-Q.
S
P34: Battery A/B SMBus ESD diode pull high from +5valw
p to +3valwp.
P34: PF3 fuse change from 5A slow to 7A fast 1206
size for ME.
P35: PC57/PC59/PR62/PR63 connect from
++Bto VS.
P36: Change PC5 from 68UF_EC_25V to Panasonic 47UF_D
_6.3V for ME.
Add 0 Ohm PR139 between VS and pin
8 of PU2
Add @0 Ohm PR140 between +5VALW and pin
8 of PU2
02/26/01 Written byJerry
P12: Change VCC to +12V at pin of
2 JP11
P21: Add C578, R446, an
d C579
Add @2SC2411K atQ71
02/27/01 Written byJerry
P32: Add PH2

04/19/01 Written byJerry
P33: Add PC97 in pin3of PU6
Add PC98 in pin9 ofPU6
P34: Change value of PR110 and PR 116
to 549K_1%
Change value of PR109 and PR 117 to
243K_1%
Change VCC of ESD Diode to +5VALWP in PD10, PD27,
PD6, and PD7
P35: Add PC?? inB++
Add @ in PZD7
Change net VS to B++ in Pin24
of PU5
Change value of PR108 to
75_1%
Change value of PR105 to
649_1%
Change value of PR61 to 57
.6K_1%
Change value of PR76 and PR77 to
11.5K_1%
Change value of PR74 to 33
.2K_1%
Change value of PR83 to150K
Add @ in PR141
Delete PR104, PC85, PR58,nd
a PR75
Change value of PU8 to MS2906
A
Change pull high VCC to +3VALWP
in PR64
03/21/01 Written byJerry

P13: Update JP3 foot
print
P16: Add D41
P19: Change value of D33 otRB751
P21: Move net SM_FRE# to pin4
5 of U47
Move net SM_5VON# to pin25
of U47
Remove @ in R455, R456, C583,
and U55
P23: Update JP4 foot
print
P23: Update ST1, ST2, ST3, ST4, H11, H2, H24, H12, H13, H16,
nd H15
a footprint
04/20/01 Written byJerry
P35: Change value of PT1 to 10UH-SDT-120
5P-118-120
04/24/01 Written byJerry
P09: Change value of CP6 and CP5 to
8P4R-22PF
P16: Swap signals on pin10 and n9
pi of JP5
P21: Change footprint fo JP14
04/25/01 Written byJerry

P09: Remove @ inD20
P12: Connection R447 an
d C580
P16: Delete R448, R449, R450, D38, D39
, and D40
Change type of RJ45 to with LED
in JP5
Add R452, R453, , Q72, nd
a Q73
P17: Add @ in C524 andC467
Connection Pin87 of U49 and Pin2
of RP38
P19: Remove @ in R182 and Add in
@ D15
P21: Add Q74, Q75, Q76, R454,nda C582
Change value of Q71 to SI
2301DS
Add @ in R446
Add U55, R455, R456, and
C583
Change value of R443 to100K
Add net SM_5VON, SM_3VON, SM_LED, dan
SM_LVD
Change value of C575 to 1U
F_0603
P24: Add @ in R123, Q9, C131, Q11, C132, C121, R121,
126,C and JP15
P28: Add @ inR8
P30: Add net SM_LED in pin8
of JP6
P31: Update StandOff

P21: Add @ in R455, R456, C583,
and U55
P28: Remove @ n
o R8
04/26/01 Written byJerry
P19: Change value of R307
to 240K
Change value of R313 ot 10K

03/23/01 Written byJerry
P20: Change VCC of Q10 to
+5VCD
Change type of JP7 to SUYIN 20225
A-44G5-A
P32: Change PR94 10K to0 ohm
P34: Change PR110, PR116 to 549k and PR109, PR117 to 243k. (UVP
:12.16
H L:11.09V)
P35: Add PC100, PR141 , PR142, PQ39
03/26/01 Written byJerry
P13: Change value of L19 to
0_0805
P21:Add F5 for SM
_VCC
03/28/01 Written byJerry
P13: Change FootPrint fo JP2
P19: Change VCC of R339 to
+5VMOD
P31: Modify Hold side in H5
and H29
************* Rev1.0 PIR List *****
*********
04/13/01 Written byJerry
P02: Add D38 and Q77 for 1.6V/1.7
V selete
P16: Change value of R452 and R453 to
300_0603
Update LED circ
uit
P18: Add D39 for wireless
RFOFF#
P22: Add net 17V/16V# in pin57
of U24
P23: Change value of R1 to.7_1206
4
Add R457 4.7_1
206
P27: Change net BUTTON_LOCK# to MP3# in 176
pin of U32
P28: Add net BID in pin17
of U19
R151 pin 1 tied to 3VALW
+
P30: Delete net BUTTON_LOCK# in pin
24 of JP6
Add net MP3# in pin6 fo JP6
P31: Delete Screw Hol
d H17
P33: Change value of PR2
to 10K
Delete PD13
P34: Change value PR120 ot270K
P35: Change net B++ to VS in pin2
4 of PU5

03/02/01 Written byJerry
04/16/01 Written byJerry
P04:
P12:
P16:
P35:

Add
Add
Add
Add

buffer between PCIRST# and
GMCH2-M
R447 and C508 atGP_CLK
A
R448, R449, R450, D38, D39
, and D40
PR141100K

03/05/01 Written byJerry
P25: Add C581 for MIC ircuit
c
03/06/01 Written byJerry
P21: Change net SM_FRE# to Pin2
5 of 47
P31: Change H29, H5 foo
tprint
Delete H32 andH6

P16: Add R458, R459 for LAN
Reset
P28: Add net 2ND_BATT_LOW_LED# in n5
pi of U21
Change net name from CD_FDD_LED# to 2ND_CHGI_
CD_FDD_LED#
P30: Add net 2ND_BATT_LOW_LED# in n5
pi of JP6
Change net name from CD_FDD_LED# to 2ND_CHGI_
CD_FDD_LED#
04/18/01 Written byJerry
P21: Delete RP39, RP40, an
d R442
Add D40, R460, C585, C584, U56,
and U57
Change R444 pull high VCCot+5VS

Compal Electronics, Inc.

************* Rev0.3 PIR List *****
*********
Title
03/19/01 Written byJerry
P32: Change value of PC8 to 100
0PF_0805
Add @ on PH2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC.NTAINS
AND COCONFIDENTIAL AND
PROPRIETARY N
OTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE
Size
ETENT
COMP
DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMA
TION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LCOMPA
ELECTRONICS, INC.
Date:

888M1 PIR LIST
Document Number

Rev
1.0

888M1
Thursday, April 26, 2001

Sheet

38

of

38

www.s-manuals.com



---

Source Exif Data:

File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.6
Linearized                      : No
XMP Toolkit                     : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39
Create Date                     : 2001:07:17 16:27:38Z
Creator Tool                    : 888M1
Modify Date                     : 2014:10:19 22:01:04+03:00
Metadata Date                   : 2014:10:19 22:01:04+03:00
Format                          : application/pdf
Description                     : 
Creator                         : 
Title                           : Compal LA-1081 - Schematics. www.s-manuals.com.
Subject                         : Compal LA-1081 - Schematics. www.s-manuals.com.
Producer                        : Acrobat PDFWriter 2.11 for Windows
Document ID                     : uuid:0913bdf6-9a4a-40b4-b945-b8c6ab1d0638
Instance ID                     : uuid:6be11fed-2ecf-44ed-bd52-d34bd4945fca
Page Count                      : 39
Keywords                        : Compal, LA-1081, -, Schematics., www.s-manuals.com.

EXIF Metadata provided by EXIF.tools