Compal LA 2171 Schematics. Www.s Manuals.com. R0.2 Schematics

User Manual: Motherboard Compal LA-2171 Sullivan - Schematics. Free.

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Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Cover Sheet

1 50, 12, 2004

Compal Electronics, Inc.

SULLIVAN

uFCPGA Dothan

02-11-2004

REV: 0.2

@ : Depop Component for All

Dothan Schematic with Capture CIS and Function field

REV : X01

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Block Diagram

2 50, 12, 2004

Compal Electronics, Inc.

JUSB2 D

PCI BUS

SO-DIMM X2

Dothan

page 24

GMCH-M

ATA100

page 7,8,9

Transformer

page 36

LPC BUS

page 16,17

page 18

page 19

Fan Control

NEW CARD

& TV-OUT

uFCPGA CPU

IDSEL:AD17

(PIRQA/B#,GNT#2,REQ#2)

Macallan III

VGA CONN.

3.3V 24.576MHz

VCORE

page 6

LPC to X-BUS

& Super I/O

page 15

USB2.0

HA#(3..31)

Alviso

page 46

SST39VF080

PCI-E 16X

Clock Generator

HD#(0..63)

Compal confidential

DC IN

CK410M

3.3V 33MHz

5V/3.3V/15V

USBPORT 0

page 31,32

Int.KBD

BANK 0, 1, 2, 3

USBPORT 1

DMI

CDROM

CHARGER

page 29

ICH6

3.3V 33MHz

page 44

USBPORT 2

RICHO R5C841

LAN

BCM4401

JUSB3 D

USBPORT 3

CRT CONN. System Bus

page 36

USBPORT 4

page 30

JUSB2 U

609 BGA

X BUS

CardBus Controller

USBPORT 5

Block Diagram

400 / 533MHz

1.8V 400 / 533MHz

VGA

Board

1.5V

100MHz

1257 FC-BGA

AC-LINK

48MHz / 480Mb

page 28

USBPORT 6

USBPORT 7

GUARDIAN

EMC6N300 page 15

Touch Pad

page 36

& RJ45

MINI PCI

page 33

Memory

BUS(DDRII)

page 41

page 47

BATT IN/+2.5V

page 42

LED/B page 37

Slot 0

page32

1394 CONN.

page31

SATA

3.3V or 5V SATA

page 24

HDD

SATA to PATA Bridge

page 24

page 25

STAC9751

AC97 CODEC

AMP &

page 26

Phone Jack Subwoofer

page 27

page 34,35

page 45

1.8V / 0.9V

1.5V/1.05V(+VCCP)

page 43page 20,21,22,23

page 10,11,12,13,14

Blue Tooth

Multi-media

LCM CONN.

Board

page36

GPIO

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

JUSB3 U

SDIO CONN.

page32

page 27

MDC

Marvell 88SA8040

JUSB1 U

JUSB1 D

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Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Index and Config.

3 50, 12, 2004

Compal Electronics, Inc.

PIRQ

D,C

D,B

+VCCP

PM TABLE

+15V AD17

PCI DEVICE

CARD BUS

IDSEL

S0

1

PCI TABLE

MINI PCI

+1.5VSUS

S3

USB TABLE

+3VSUS

+5VSUS

AD19

+5VALW

S1

S5 S4/AC don't exist

+1.8VRUN

+VCC_CORE

REQ#/GNT#

+5VRUN

ON

power

plane

+3VRUN

S5 S4/AC

+3VALW

State

+1.8VSUS

OFF

+1.5VRUN

+2.5VRUN

2

3Blue Tooth

1

4NEW CARD

USB PORT#

0

DESTINATION

5

7

JUSB2 (Bottom)

6

JUSB2 (Top)

ON

ON

ON

ON

ON

ON ON

ON

OFF

OFF

OFF

OFFOFF

+0.9V_DDR_VTT

3

LAN AD16 4 C

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

JUSB3 (Top)

JUSB3 (Bottom)

JUSB1 (Top)

JUSB1 (Bottom)

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Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Power Rail

4 50, 12, 2004

Compal Electronics, Inc.

+5VALW

+5VSUS

BATTERY

V3P3LAN

PWR_SRC

+3VSRC

+3VALW

+3VRUN

ADAPTER

+VCC_CORE

+3VSUS

+1.8VRUN

RUN_ON

RUNPWROK

SUS_ON

SUS_ON

RUN_ON

SUSPWROK_5V

RUN_ON

+5VHDD +5VMOD +5VRUN VDDA

AUDIO_AVDD_ON

PJP11,PJP12

SUSPWROK_5V

+1.8VSUS

+1.8VSUSP +0.9V_DDR_VTT

SUSPWROK_5V

RUNPWROK

+VCCP

+1.5VRUN

RUN_ON SUSPWROK_1.5V

+1.5VSUS

L10

(Option)

PL9

+15V +2.5VRUN

RUN_ON_D

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

SMBUS TOPOLOGY

5 50, 12, 2004

Compal Electronics, Inc.

+3VRUN CK_SDATA CLK GEN.

Macallan III

7002

ICH6

DAT_SMB

7002

+3VALW

CLK_SMB

GUARDIAN

ICH_SMBDATA +3VSUS

ICH_SMBCLK

24C04

CK_SCLK

SIO

CHARGER

PBAT_SMBCLK

PBAT_SMBDAT +5VALW BATTERY

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

SMBCLK_VGA

SMBDAT_VGA +5VALW VGA

DIMM1DIMM0

Device Address

DIM0

DIM1

CLK GEN.

GUARDIAN

24C04

VGA

Battery

Charger

A0h

A2h

D2h

5Eh

A2h

58h

16h

12h

ICH6-SMBus

EC-SMBus

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CLKSEL1

ICH_SMBCLK

CK_14M_ICH

CK_SDATA

CK_14M_SIO

CLKSEL0

ICH_SMBDATA

CK_14M_CODEC

CLK_MCH_BCLK

CK_ITP#

CK_ITP

CK_BCLK#

CK_BCLK

CLK_MCH_BCLK#

CLK_PCIE_ICH#

CLK_PCIE_ICH

PCICLK2

H_STP_CPU#

CK_XTAL_OUT

CLK_ENABLE#

H_STP_PCI#

PCICLK4

CK_SDATA

CK_SCLK

CK_SCLK

CLKIREF

CLKREF

PCICLK3

CLKSEL1

CLKSEL0 CK_ITP

CK_ITP#

CLK_MCH_BCLK

CLK_MCH_BCLK#

CK_BCLK

CK_BCLK#

CK_CPU1

CK_CPU1#

CK_CPU2#

CK_CPU2

CK_CPU0

CK_CPU0#

PCICLK5

PCICLKF1

PCICLKF0

CK_XTAL_IN

CK_33M_ICHPCI

CK_33M_MINIPCI

CK_33M_LANPCI

CK_33M_CBPCI

CK_33M_SIOPCI

SRC1#

SRC4#

SRC4

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

CLKSEL2

CK_VDD_REF

CK_VDD_48

CK_VDD_48 CK_VDD_A

CK_VDD_A CK_VDD_REF

CLKSEL2CK_48M_ICH

SRC1

SRC5#

SCR5 CLK_MCH_3GPLL

CLK_PCIE_VGA#

CLK_PCIE_VGA

CLK_PCIE_SATA

CLK_PCIE_VGA#

CLK_PCIE_VGA

CLK_PCIE_SATA#

CLK_PCIE_SATA

SRC3#

SRC3 CLK_PCIE_TV

CLK_PCIE_TV#

CLK_PCIE_SATA#

CLK_MCH_3GPLL#

CLK_PCIE_TV

CLK_PCIE_TV#

SRC2

SRC2# CLK_PCIE_ICH#

CLK_PCIE_ICH

+VCCP

CK_VDD_MAIN

+VCCP

+3VRUN

+3VRUN

+3VRUN CK_VDD_MAIN2

+3VRUN

+3VRUN

CK_14M_ICH <22>

CK_14M_SIO <34>

ICH_SMBCLK<22>

CK_48M_ICH<22>

ICH_SMBDATA<22>

CK_14M_CODEC <25>

CLK_ENABLE# <46>

H_STP_CPU# <22,46>

H_STP_PCI# <22>

CK_33M_SIOPCI<34>

CK_33M_MINIPCI<33>

CK_33M_LANPCI<29>

CK_33M_CBPCI<31>

CK_33M_ICHPCI<20>

MCH_CLKSEL0 <10>

MCH_CLKSEL1 <10>

CPU_BSEL0<8>

CPU_BSEL1<8>

CK_SDATA <16,17>

CK_SCLK <16,17>

CK_ITP <7>

CK_ITP# <7>

CK_BCLK <7>

CK_BCLK# <7>

CLK_MCH_BCLK# <10>

CLK_MCH_BCLK <10>

CLK_MCH_3GPLL <12>

CLK_PCIE_VGA# <18>

CLK_PCIE_VGA <18>

CLK_PCIE_SATA <21>

CLK_PCIE_SATA# <21>

CLK_MCH_3GPLL# <12>

CLK_PCIE_TV# <37>

CLK_PCIE_TV <37>

CLK_PCIE_ICH <22>

CLK_PCIE_ICH# <22>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Clock Generator

6 50, 12, 2004

Compal Electronics, Inc.

3

1

G

Place near each pin

W>40 mil

S

Place near CK410M

2N7002

2

D

Place crystal within

500 milsof CK410

FSC FSB FSA CPU

MHz SRC

MHz PCI

MHz

266

133

166

333

400

RESERVED

100 33.30

1

Table : ICS 954201 / Cypress CY28411

CLKSEL0 CLKSEL1 CLKSEL2

0 0 1 for Dothan-A 533Mhz

1 0 1 for Dothan-A 400Mhz

Dothan-A 400MHz, Install R390, No pop. R394, R395

Dothan-A 533MHz, Install R394, No pop. R390, R395

33.3

33.3

33.3

33.3

33.3

33.3

100

100

100

100

100

100

100

200

00

0

0

0

0

0

0

0

0

0

0

1

1 1

1

1

11

1

1

1

DELL CONFIDENTIAL/PROPRIETARY

*

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R551 33_0402_5%~D

1 2

C72

0.047U_0402_10V7K~D

1

2

R58

49.9_0402_1%~D

12

R395

0_0402_5%~D@

1 2

C100

0.1U_0402_16V4Z~D

1

2

X2

14.31818MHz_20P_1BX14318CC1A~D

12

R113

2.2_0402_5%~D

1 2

C405

4.7U_0805_6.3V6K~D

1

2

R42 33_0402_5%~D

1 2

R54 33_0402_5%~D

1 2

R393

0_0402_5%~D

1 2

R552 33_0402_5%~D

1 2

R55 33_0402_5%~D

1 2

R553

49.9_0402_1%~D

1 2

R43

49.9_0402_1%~D

1 2

R85

10K_0402_5%~D

1 2

R394

0_0402_5%~D

1 2

U7

CY28411ZCT_TSSOP56~D

VDD_SRC0

21

VDD_SRC1

28

VDD_SRC2

34

VDD_PCI0

1

VDD_PCI1

7

VDD_48

11

VDD_CPU

42

VDD_REF

48

FSA/USB_48

12

VSS_PCI0

2

FSB/TEST_MODE

16

XTAL_OUT

49

XTAL_IN

50

VSS_SRC

29

VSS_48

13

VSS_CPU

45

PCI2

56

FSC/TEST_SEL

53

SDATA

47

SCLOCK

46

PCIF0/ITP_EN

8

PCIF1

9

IREF

39

SRC5 31

CPU_STOP# 54

CPU1 41

CPU1# 40

CPU_2_ITP/SRC_7 36

SRC5# 30

PCI3

3

PCI4

4

PCI5

5

CPU0# 43

CPU0 44

SRC6 33

SRC6# 32

PCI_STOP# 55

VSS_A 38

VDD_A 37

REF 52

VSS_PCI1

6

VSS_REF

51

CPU_2_ITP/SRC7# 35

SRC4 26

SRC4# 27

SRC3 24

SRC3# 25

SRC2 22

SRC2# 23

SRC1 19

SRC1# 20

SRC0 17

SRC0# 18

DOT96 14

DOT96# 15

VTT_PWRGD#/PD 10

R66 33_0402_5%~D

1 2

R396

0_0402_5%~D@

1 2

R119

1_0402_5%~D

1 2

R40

49.9_0402_1%~D

1 2

R70

49.9_0402_1%~D

12

C94

10U_0805_10V4M~D

1

2

R48 33_0402_5%~D

1 2

R554

49.9_0402_1%~D

1 2

C77

33P_0402_50V8J~D@

12

L20

BLM21PG600SN1D_0805~D

1 2

R65

49.9_0402_1%~D

12

R385 475_0603_1%~D

1 2

G

D

S

Q10

2N7002_SOT23~D

2

1 3

R83 33_0402_5%~D

12

R117

100K_0402_5%~D

12

R59 33_0402_5%~D

1 2

R118

100K_0402_5%~D

12

C401

4.7U_0805_6.3V6K~D

1

2

R112 12.1_0402_1%~D

1 2

R86

10K_0402_5%~D

1 2

R392

1K_0402_5%~D

1 2

R84 33_0402_5%~D

12

C89

0.047U_0402_10V7K~D

1

2

R389

1K_0402_5%~D

@

1 2

R80

49.9_0402_1%~D

12

R95 33_0402_5%~D

12

C44

0.047U_0402_10V7K~D

1

2

R81 33_0402_5%~D

1 2

R56

49.9_0402_1%~D

1 2

C57

0.047U_0402_10V7K~D

1

2

C78

0.047U_0402_10V7K~D

1

2

C42

10U_0805_10V4M~D

1

2

C49

0.047U_0402_10V7K~D

1

2

R47 33_0402_5%~D

1 2

G

D

S

Q9

2N7002_SOT23~D

2

1 3

R106 33_0402_5%~D

12

R41 33_0402_5%~D

1 2

R122 12.1_0402_1%~D

1 2

R63 33_0402_5%~D

1 2

R51

49.9_0402_1%~D

1 2

C83

33P_0402_50V8J~D@

12

R68

49.9_0402_1%~D

1 2

R49

49.9_0402_1%~D

1 2

R71 33_0402_5%~D

1 2

R94

10K_0402_5%~D

@

1 2

R53

49.9_0402_1%~D

12

R46

49.9_0402_1%~D

1 2

C69

0.047U_0402_10V7K~D

1

2

R67 33_0402_5%~D

1 2

L21

BLM21PG600SN1D_0805~D

1 2

R93 33_0402_5%~D

12

R76 33_0402_5%~D

1 2

R64

49.9_0402_1%~D

1 2

C53

0.047U_0402_10V7K~D

1

2

R75

49.9_0402_1%~D

12

R3901K_0402_5%~D@

1 2

C62

0.047U_0402_10V7K~D

1

2

R116 12.1_0402_1%~D

1 2

R50 33_0402_5%~D

1 2

R376

2.2_0402_5%~D

1 2

R391

1K_0402_5%~D

1 2

R123 33_0402_5%~D

12

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ITP_TDI

ITP_TMS

ITP_TCK

ITP_TDO

ITP_TRST#

ITP_BPM#0

ITP_BPM#1

ITP_BPM#2

ITP_BPM#4

ITP_BPM#5

ITP_DBRESET# ITP_TDO

H_RESET# ITP_TMS

ITP_TDI

ITP_TRST#

ITP_TCK

ITP_DBRESET#

H_A#28

H_THERMDA

H_FERR#

H_ADSTB#0

H_D#52

H_D#20H_A#23

H_REQ#2

H_D#10

H_D#5

H_D#49

H_D#3

H_A#31

H_REQ#0

H_D#39

H_D#57

H_D#29

H_A#17

H_IGNNE#

H_D#34

H_D#14

H_BNR#

H_A#29

H_DSTBP#0

H_D#51

H_D#22

H_A#8

H_DEFER#

H_INIT#

H_REQ#1

H_D#50

H_D#48

H_D#0H_A#3

H_RS#0

H_DSTBN#1

H_D#58

H_D#28

H_A#6

ITP_BPM#2

H_BPRI#

H_ADS#

H_A#25

ITP_BPM#3

H_RS#1

H_DSTBP#1

H_D#46

H_D#41

H_D#12

H_A#4

H_IERR#

H_HITM#

H_DSTBN#0

H_D#47

H_D#37

H_THERMDC

H_INTR

H_DSTBN#2

H_D#9

H_D#7

H_A#22

H_A#7

H_REQ#4

H_D#31

H_D#13

ITP_DBRESET#

H_DRDY#

H_A#15

H_A#14

ITP_TCK

ITP_BPM#3

H_A20M#

H_D#27

H_D#25

H_D#4

H_DSTBP#2

H_D#56

H_D#35

H_D#59

H_D#63

H_D#45

H_D#24

H_D#30

H_D#55

H_D#40

H_D#19

H_D#62

H_D#44

H_D#23

H_D#2

H_D#8

H_D#6

H_D#54

H_D#33

H_D#18

H_D#16

H_D#61

H_D#43

H_D#1

H_D#26

H_DSTBN#3

H_D#53

H_D#32

H_D#11

H_DSTBP#3

H_D#38

H_D#36

H_D#17

H_D#15

H_NMI

H_D#60

H_D#42

H_D#21

H_A#30

H_A#27

H_A#18

H_A#10

H_BR0#

H_LOCK#

CPU_CK_ITP

H_A#11

H_A#21

H_A#26

H_A#13

H_A#9

CK_BCLK#

ITP_BPM#0

H_DPSLP#

H_A#20

H_A#16

H_A#12

H_TRDY#

H_HIT#

CPU_CK_ITP#

H_ADSTB#1

H_DBSY#

H_A#19

H_A#24

H_A#5

H_RS#2

CK_BCLK

H_RESET#

ITP_BPM#1

H_REQ#3

H_SMI#

H_STPCLK#

ITP_TCK

ITP_TRST#

ITP_TMS

H_CPUSLP#

ITP_TDO

ITP_TDI

ITP_BPM#5

ITP_BPM#4

H_PROCHOT#

H_DPRSLP#

H_THERMTRIP#

H_PWRGOOD

CK_ITP_R

CK_ITP_R#

CK_ITP#

CK_ITP

CK_ITP_R#

CK_ITP_R

TEST1

H_RESET#

TEST1

TEST2

+VCCP

+VCCP

+VCCP

+VCCP

+3VSUS

+VCCP

+VCCP

+VCCP

H_THERMTRIP#<15>

H_THERMDA<15> H_THERMDC<15>

H_ADS#<10>

H_REQ#[0..4]<10>

H_A#[3..31]<10>

H_BPRI#<10> H_BNR#<10>

CK_BCLK#<6>

H_DEFER#<10>

H_HITM#<10>

H_BR0#<10>

CK_BCLK<6>

H_HIT#<10>

H_D#[0..63] <10>

H_DPSLP#<21>

H_RESET#<10>

H_DRDY#<10>

H_TRDY#<10>

H_RS#[0..2]<10>

H_ADSTB#0<10>

H_DSTBP#[0..3] <10>

H_ADSTB#1<10>

H_DSTBN#[0..3] <10>

H_DINV#0 <10>

H_DINV#2 <10>

CK_ITP#<6> CK_ITP<6>

H_DBSY#<10>

H_DINV#1 <10>

H_IGNNE# <21>

H_LOCK#<10>

H_INTR <21>

H_NMI <21>

H_DINV#3 <10>

H_INIT# <21>

H_FERR# <21>

ITP_DBRESET#<39>

H_A20M# <21>

H_STPCLK# <21>

H_SMI# <21>

H_PWRGOOD<21> H_CPUSLP#<10,21>

H_DPWR#<10>

H_DPRSLP#<21>

H_PROCHOT#<35>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Dothan Processor(1/2)

7 50, 12, 2004

Compal Electronics, Inc.

This shall place near CPU

Add pullups for PWRGOOD and THERMTRIP per INTEL

Place near JITP

Check ITP connector.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R62

150_0402_5%~D

1 2

R31

22.6_0603_1%~D

1 2

R44

27.4_0603_1%~D

1 2

R397

75_0402_5%~D

1 2

T2 PAD~D

R61

39.2_0603_1%~D

1 2

RN3

0_0404_4P2R_5%~D

@

1 4

2 3

R36

54.9_0603_1%~D

1 2

JITP

MOLEX_52435-2891_28P~D@

TDI

1TMS

2TRST#

3NC1

4TCK

5NC2

6TDO

7BCLKN

8BCLKP

9GND0

10 FBO

11 RESET#

12 BPM5#

13

BPM4#

15

BPM3#

17

BPM2#

19

BPM1#

21

BPM0#

23 DBA#

24 DBR#

25 VTAP

26 VTT0

27 VTT1

28

GND1

14

GND2

16

GND3

18

GND4

20

GND5

22

GND6 29

GND7

30

ADDR GROUP

CONTROL GROUP

HOST CLK

MISC

DATA GROUP

THERMAL

DIODE

LEGACY CPU

Dothan

JCPUA

AMP_1473129-1_Dothan~D

A3#

P4

A4#

U4

A5#

V3

A6#

R3

A7#

V2

A8#

W1

A9#

T4

A10#

W2

A11#

Y4

A12#

Y1

A13#

U1

A14#

AA3

A15#

Y3

A16#

AA2

A17#

AF4

A18#

AC4

A19#

AC7

A20#

AC3

A21#

AD3

A22#

AE4

A23#

AD2

A24#

AB4

A25#

AC6

A26#

AD5

A27#

AE2

A28#

AD6

A29#

AF3

A30#

AE1

A31#

AF1

REQ0#

R2

REQ1#

P3

REQ2#

T2

REQ3#

P1

REQ4#

T1

ADSTB0#

U3

ADSTB1#

AE5

BCLK0

B15

BCLK1

B14

ITP_CLK0

A16

ITP_CLK1

A15

ADS#

N2

BNR#

L1

BPRI#

J3

BR0#

N4

DEFER#

L4

DRDY#

H2

HIT#

K3

HITM#

K4

IERR#

A4

LOCK#

J2

RESET#

B11

RS0#

H1

RS1#

K1

RS2#

L2

TRDY#

M3

BPM0#

C8

BPM1#

B8

BPM2#

A9

BPM3#

C9

DBR#

A7

DBSY#

M2

DPSLP#

B7

DPWR#

C19

PRDY#

A10

PREQ#

B10

PROCHOT#

B17

PWRGOOD

E4

SLP#

A6

TCK

A13

TDI

C12

TDO

A12

TEST1

C5

TEST2

F23

TMS

C11

TRST#

B13

THERMDA

B18

THERMDC

A18

THERMTRIP#

C17

D0# A19

D1# A25

D2# A22

D3# B21

D4# A24

D5# B26

D6# A21

D7# B20

D8# C20

D9# B24

D10# D24

D11# E24

D12# C26

D13# B23

D14# E23

D15# C25

D16# H23

D17# G25

D18# L23

D19# M26

D20# H24

D21# F25

D22# G24

D23# J23

D24# M23

D25# J25

D26# L26

D27# N24

D28# M25

D29# H26

D30# N25

D31# K25

D32# Y26

D33# AA24

D34# T25

D35# U23

D36# V23

D37# R24

D38# R26

D39# R23

D40# AA23

D41# U26

D42# V24

D43# U25

D44# V26

D45# Y23

D46# AA26

D47# Y25

D48# AB25

D49# AC23

D50# AB24

D51# AC20

D52# AC22

D53# AC25

D54# AD23

D55# AE22

D56# AF23

D57# AD24

D58# AF20

D59# AE21

D60# AD21

D61# AF25

D62# AF22

D63# AF26

DINV0# D25

DINV1# J26

DINV2# T24

DINV3# AD20

DSTBN0# C23

DSTBN1# K24

DSTBN2# W25

DSTBN3# AE24

DSTBP0# C22

DSTBP1# L24

DSTBP2# W24

DSTBP3# AE25

A20M# C2

FERR# D3

IGNNE# A3

INIT# B5

LINT0 D1

LINT1 D4

STPCLK# C6

SMI# B4

DPRSTP#

G1

R19

54.9_0603_1%~D

1 2

R20

22.6_0603_1%~D

1 2

R92

56_0402_5%~D

1 2

R405

200_0402_5%~D

1 2

C20

0.1U_0402_10V7K~D

1

2

R11

150_0402_5%~D

1 2

RN2

0_0404_4P2R_5%~D

1 4

2 3

R99

1K_0402_5%~D@

1 2

R45

680_0402_5%~D

1 2

T21 PAD~D

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

COMP0

COMP3

COMP1

COMP2

H_VID0

H_VID5

H_VID3

H_VID4

H_VID2

H_VID1

H_VID1

H_VID0

H_VID2

H_VID5

VSSSENSE

H_VID3

H_VID4

VCCSENSE

CPU_BSEL0

CPU_BSEL1

H_PSI#

+VCCP

+VCC_CORE

+VCCA_PROC

+1.8VRUN

+VCCP V_CPU_GTLREF

V_CPU_GTLREF

+1.5VRUN

+VCCP

+VCC_CORE

VID0 <46>

VID1 <46>

VID2 <46>

VID3 <46>

VID4 <46>

VID5 <46>

H_PSI#<46>

CPU_BSEL0<6> CPU_BSEL1<6>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Dothan Processor(2/2)

8 50, 12, 2004

Compal Electronics, Inc.

Resistor placed within

0.5" of CPU pin.Trace

should be at least 25

miles away from any

other toggling signal.

R_B

R_A

For test only ,Cmos output

CPU Voltage ID SHORT

OPEN

OPEN OPEN OPEN OPEN OPEN OPEN

Layout close CPU

Layout Note:

500 mil max length

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R427

54.9_0603_1%~D

12

C117

0.01U_0402_16V7K~D

1

2

R381 0_0402_5%~D

12

C122

10U_1206_6.3V6M~D

1

2

R379 0_0402_5%~D

12

R208

54.9_0603_1%~D@

1 2

B_VID6

OPEN~D

@

1

122

T42 PAD~D

B_VID5

OPEN~D

@

1

122

R203

2K_0603_1%~D

12

R201

1K_0603_1%~D

12

Dothan

POWER, GROUNG, RESERVED SIGNALS AND NC

JCPUB

AMP_1473129-1_Dothan~D

PSI#

E1

GTLREF

AD26

VCCQ0

P23

VCCQ1

W4

VCCSENSE

AE7

VSSSENSE

AF6

BSEL0

C16

BSEL1

C14

VCCA0

F26

VCCA1

B1

VCCA2

N1

VCCA3

AC26

VCCP

D10

VCCP

D12

VCCP

D14

VCCP

D16

VCCP

E11

VCCP

E13

VCCP

E15

VCCP

F10

VCCP

F12

VCCP

F14

VCCP

F16

VCCP

K6

VCCP

L5

VCCP

L21

VCCP

M6

VCCP

M22

VCCP

N5

VCCP

N21

VCCP

P6

VCCP

P22

VCCP

R5

VCCP

R21

VCCP

T6

VCCP

T22

VCCP

U21

VCC

D6

VCC

D8

VCC

D18

VCC

D20

VCC

D22

VCC

E5

VCC

E7

VCC

E9

VCC

E17

VCC

E19

VCC

E21

VCC

F6

VCC

F8

VCC

F18

VID0

E2

VID1

F2

VID2

F3

VID3

G3

VID4

G4

VID5

H4

COMP0

P25

COMP1

P26

COMP2

AB2

COMP3

AB1

RSVD

AF7

RSVD

B2

RSVD

C3

RSVD

E26

VSS A2

VSS A5

VSS A8

VSS A11

VSS A14

VSS A17

VSS A20

VSS A23

VSS A26

VSS B3

VSS B6

VSS B9

VSS B12

VSS B16

VSS B19

VSS B22

VSS B25

VSS C1

VSS C4

VSS C7

VSS C10

VSS C13

VSS C15

VSS C18

VSS C21

VSS C24

VSS D2

VSS D5

VSS D7

VSS D9

VSS D11

VSS D13

VSS D15

VSS D17

VSS D19

VSS D21

VSS D23

VSS D26

VSS E3

VSS E6

VSS E8

VSS E10

VSS E12

VSS E14

VSS E16

VSS E18

VSS E20

VSS E22

VSS E25

VSS F1

VSS F4

VSS F5

VSS F7

VSS F9

VSS F11

VSS F13

VSS F15

VSS F17

VSS F19

VSS F21

VSS F24

VSS G2

VSS G6

VSS G22

VSS G23

VSS G26

VSS H3

VSS H5

VSS H21

VSS H25

VSS J1

VSS J4

VSS J6

VSS J22

VSS J24

VSS K2

VSS K5

VSS K21

VSS K23

VSS K26

VSS L3

VSS L6

VSS L22

VSS L25

VSS M1

RSVD

AC1

R417

27.4_0603_1%~D

12

R38

10K_0402_5%~D

12

B_VID4

OPEN~D

@

1

122

PJP3

PAD-OPEN 2x2m~D

2 1

T43 PAD~D

R416

54.9_0603_1%~D

12

T44 PAD~D

R207

54.9_0603_1%~D@

1 2

RN1

10K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

B_VID1

OPEN~D

@

1

122

B_VID3

OPEN~D

@

1

122

R37

10K_0402_5%~D

12

R378 0_0402_5%~D

12

T45 PAD~D

B_VID2

OPEN~D

@

1

122

R426

27.4_0603_1%~D

12

Dothan

POWER, GROUND

JCPUC

AMP_1473129-1_Dothan~D

VCC

F20

VCC

F22

VCC

G5

VCC

G21

VCC

H6

VCC

H22

VCC

J5

VCC

J21

VCC

K22

VCC

U5

VCC

V6

VCC

V22

VCC

W5

VCC

W21

VCC

Y6

VCC

Y22

VCC

AA5

VCC

AA7

VCC

AA9

VCC

AA11

VCC

AA13

VCC

AA15

VCC

AA17

VCC

AA19

VCC

AA21

VCC

AB6

VCC

AB8

VCC

AB10

VCC

AB12

VCC

AB14

VCC

AB16

VCC

AB18

VCC

AB20

VCC

AB22

VCC

AC9

VCC

AC11

VCC

AC13

VCC

AC15

VCC

AC17

VCC

AC19

VCC

AD8

VCC

AD10

VCC

AD12

VCC

AD14

VCC

AD16

VCC

AD18

VCC

AE9

VCC

AE11

VCC

AE13

VCC

AE15

VCC

AE17

VCC

AE19

VCC

AF8

VCC

AF10

VCC

AF12

VCC

AF14

VCC

AF16

VCC

AF18

VSS

M4

VSS

M5

VSS

M21

VSS

M24

VSS

N3

VSS

N6

VSS

N22

VSS

N23

VSS

N26

VSS

P2

VSS

P5

VSS

P21

VSS

P24

VSS

R1

VSS

R4

VSS

R6

VSS

R22

VSS

R25

VSS

T3

VSS

T5

VSS

T21

VSS

T23

VSS T26

VSS U2

VSS U6

VSS U22

VSS U24

VSS V1

VSS V4

VSS V5

VSS V21

VSS V25

VSS W3

VSS W6

VSS W22

VSS W23

VSS W26

VSS Y2

VSS Y5

VSS Y21

VSS Y24

VSS AA1

VSS AA4

VSS AA6

VSS AA8

VSS AA10

VSS AA12

VSS AA14

VSS AA16

VSS AA18

VSS AA20

VSS AA22

VSS AA25

VSS AB3

VSS AB5

VSS AB7

VSS AB9

VSS AB11

VSS AB13

VSS AB15

VSS AB17

VSS AB19

VSS AB21

VSS AB23

VSS AB26

VSS AC2

VSS AC5

VSS AC8

VSS AC10

VSS AC12

VSS AC14

VSS AC16

VSS AC18

VSS AC21

VSS AC24

VSS AD1

VSS AD4

VSS AD7

VSS AD9

VSS AD11

VSS AD13

VSS AD15

VSS AD17

VSS AD19

VSS AD22

VSS AD25

VSS AE3

VSS AE6

VSS AE8

VSS AE10

VSS AE12

VSS AE14

VSS AE16

VSS AE18

VSS AE20

VSS AE23

VSS AE26

VSS AF2

VSS AF5

VSS AF9

VSS AF11

VSS AF13

VSS AF15

VSS AF17

VSS AF19

VSS AF21

VSS AF24

PJP5

PAD-OPEN 2x2m~D@

2 1

R380 0_0402_5%~D

12

R383 0_0402_5%~D

12

R382 0_0402_5%~D

12

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+VCCP

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Dothan Bypass

9 50, 12, 2004

Compal Electronics, Inc.

10uF 1206 X5R -> 85 degree

X7R

High Frequence Decoupling

Near VCORE regulator.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

NOTE:Place close to CPU south side

ESR <= 3m ohm

Capacitor > 880 uF

C163

10U_1206_6.3V6M~D

1

2

C452

0.1U_0402_10V7K~D

1

2

+

C415

220U_D2_2VM~D

1

2

C432

0.1U_0402_10V7K~D

1

2

C144

10U_1206_6.3V6M~D

1

2

C441

10U_1206_6.3V6M~D

1

2

C435

0.1U_0402_10V7K~D

1

2

C165

10U_1206_6.3V6M~D

1

2

C209

10U_1206_6.3V6M~D

1

2

+

C408

220U_D2_2VM~D@

1

2

+

C665

220U_D2_2VM~D

1

2

C466

10U_1206_6.3V6M~D

1

2

C446

0.1U_0402_10V7K~D

1

2

C457

0.1U_0402_10V7K~D

1

2

C437

0.1U_0402_10V7K~D

1

2

+

C416

220U_D2_2VM~D

1

2

C525

10U_1206_6.3V6M~D

1

2

C445

0.1U_0402_10V7K~D

1

2

C464

10U_1206_6.3V6M~D

1

2

C138

10U_1206_6.3V6M~D

1

2

C210

10U_1206_6.3V6M~D

1

2

C139

10U_1206_6.3V6M~D

1

2

C527

10U_1206_6.3V6M~D

1

2

C526

10U_1206_6.3V6M~D

1

2

C532

10U_1206_6.3V6M~D

1

2

C207

10U_1206_6.3V6M~D

1

2

C465

10U_1206_6.3V6M~D

1

2

+

C85

220U_D2_2VM~D

1

2

C444

10U_1206_6.3V6M~D

1

2

C447

0.1U_0402_10V7K~D

1

2

C463

10U_1206_6.3V6M~D

1

2

C127

10U_1206_6.3V6M~D

1

2

C448

0.1U_0402_10V7K~D

1

2

C208

10U_1206_6.3V6M~D

1

2

C212

10U_1206_6.3V6M~D

1

2

C436

0.1U_0402_10V7K~D

1

2

C214

10U_1206_6.3V6M~D

1

2

C530

10U_1206_6.3V6M~D

1

2

C167

10U_1206_6.3V6M~D

1

2

C168

10U_1206_6.3V6M~D

1

2

C529

10U_1206_6.3V6M~D

1

2

C211

10U_1206_6.3V6M~D

1

2

+

C407

220U_D2_2VM~D

@

1

2

C213

10U_1206_6.3V6M~D

1

2

C166

10U_1206_6.3V6M~D

1

2

+

C160

150U _D2_6.3VM~D

1

2

C215

10U_1206_6.3V6M~D

1

2

C528

10U_1206_6.3V6M~D

1

2

C128

10U_1206_6.3V6M~D

1

2

C531

10U_1206_6.3V6M~D

1

2

C443

10U_1206_6.3V6M~D

1

2

C440

10U_1206_6.3V6M~D

1

2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_SWNG1

PM_EXTTS#0

PM_EXTTS#1

PLTRST_R#

THERMTRIP_MCH#

H_ADSTB#1

H_R_CPUSLP#

H_RS#2

H_RS#0

H_RS#1

H_YSCOMP

H_YRCOMP

H_SWNG0

H_SWNG1

H_SWNG0

PM_EXTTS#0

PM_EXTTS#1

MCH_CLKSEL0

CFG6

CFG5

CFG7

CFG12

CFG13

CFG19

CFG16

CFG18

MCH_CLKSEL1

M_ODT0

M_ODT1

M_ODT2

M_ODT3

DDR_CS3_DIMMB#

DDR_CS2_DIMMB#

DDR_CS0_DIMMA#

DDR_CS1_DIMMA#

DDR_CKE3_DIMMB

DDR_CKE1_DIMMA

DDR_CKE2_DIMMB

DDR_CKE0_DIMMA

M_CLK_DDR#0

M_CLK_DDR#1

M_CLK_DDR#3

M_CLK_DDR#4

M_CLK_DDR0

M_CLK_DDR1

M_CLK_DDR3

M_CLK_DDR4

DMI_RXP1

DMI_RXP0

DMI_RXN0

DMI_RXN1

DMI_TXP0

DMI_TXP1

DMI_TXN0

DMI_TXN1

SMRCOMPP

SMRCOMPN

H_CPUSLP# H_R_CPUSLP#

CFG0

CFG9

DMI_RXP3

DMI_RXP2

DMI_RXN2

DMI_RXN3

DMI_TXP2

DMI_TXP3

DMI_TXN2

DMI_TXN3

M_OCDOCMP0

M_OCDOCMP1

M_OCDOCMP0

M_OCDOCMP1

THERMTRIP_MCH#

H_DRDY#

H_A#25

H_A#24

H_A#23

H_REQ#3

H_HIT#

H_DSTBP#0

H_REQ#2

H_A#12

H_A#5

H_A#4

H_BNR#

H_A#18

H_DSTBN#0

H_A#21

H_A#20

H_A#14

H_A#9

TP_H_EDRDY#

H_ADS#

H_A#29

H_REQ#0

H_A#31

H_A#30

H_BPRI#

H_RESET#

H_DBSY#

H_DSTBN#3

TP_H_PCREQ#

H_A#28

H_DSTBN#1

H_VREF

H_A#16

H_A#15

H_BR0#

H_A#17

H_A#13

H_LOCK#

H_A#8

H_ADSTB#0

H_DSTBP#1

H_REQ#4

H_A#26

H_A#19

H_A#6

H_TRDY#

H_A#11

H_A#7

H_HITM#

H_DSTBN#2

H_REQ#1

H_A#22

H_A#10

H_DSTBP#3

H_DEFER#

H_DSTBP#2

H_A#27

H_A#3

H_XSCOMP

H_XRCOMP

H_D#21

H_D#61

H_D#35

H_D#6

H_D#47

H_D#58

H_D#51

H_D#31

H_D#26

H_D#13

H_D#55

H_D#48

H_D#15

H_D#0

H_D#59

H_D#23

H_D#3

H_D#1

H_D#32

H_D#11

H_D#5

H_D#62

H_D#29

H_D#49

H_D#44

H_D#25

H_D#16

H_D#50

H_D#43

H_D#27

H_D#56

H_D#45

H_D#18

H_D#40

H_D#38

H_D#36

H_D#34

H_D#24

H_D#42

H_D#39

H_D#22

H_D#37

H_D#9

H_D#8

H_D#46

H_D#33

H_D#60

H_D#52

H_D#28

H_D#19

H_D#7

H_D#2

H_D#54

H_D#14

H_D#4

H_D#41

H_D#20

H_D#10

H_D#30

H_D#63

H_D#57

H_D#53

H_D#17

H_D#12

+VCCP

+VCCP

+VCCP

+VCCP

+2.5VRUN

+1.8VSUS

+VCCP

+1.5VRUN

H_A#[3..31]<7> H_D#[0..63] <7>

PM_BMBUSY# <22>

THERMTRIP_MCH# <15>

IMVP_PWRGD <22,39,46>

H_REQ#[0..4]<7>

H_ADSTB#1<7> H_ADSTB#0<7>

H_DSTBP#[0..3]<7>

H_DSTBN#[0..3]<7>

H_TRDY#<7>

H_HITM#<7> H_HIT#<7> H_LOCK#<7>

H_DEFER#<7>

H_BPRI#<7>

H_BR0#<7>

H_RESET#<7>

H_DPWR#<7>

H_DINV#0<7> H_DINV#1<7>

H_DINV#3<7> H_DINV#2<7>

H_DRDY#<7>

H_DBSY#<7>

CLK_MCH_BCLK#<6> CLK_MCH_BCLK<6>

H_BNR#<7>

H_ADS#<7>

H_RS#[0..2]<7>

PLTRST_MCH# <20>

DDR_CS2_DIMMB#<16> DDR_CS3_DIMMB#<16>

DDR_CS0_DIMMA#<17> DDR_CS1_DIMMA#<17>

DDR_CKE3_DIMMB<16> DDR_CKE2_DIMMB<16>

DDR_CKE0_DIMMA<17> DDR_CKE1_DIMMA<17>

M_CLK_DDR#0<17> M_CLK_DDR#1<17>

M_CLK_DDR#3<16> M_CLK_DDR#4<16>

M_CLK_DDR0<17> M_CLK_DDR1<17>

M_CLK_DDR3<16> M_CLK_DDR4<16>

DMI_RXP1<22> DMI_RXP0<22>

DMI_RXN0<22> DMI_RXN1<22>

DMI_TXP0<22> DMI_TXP1<22>

DMI_TXN0<22> DMI_TXN1<22>

V_DDR_MCH_REF<16,17,45>

H_CPUSLP#<7,21>

CFG5 <12>

CFG6 <12>

CFG7 <12>

CFG12 <12>

CFG13 <12>

CFG16 <12>

CFG19 <12>

CFG18 <12>

CFG0 <12>

CFG9 <12>

DMI_RXP3<22> DMI_RXP2<22>

DMI_RXN2<22> DMI_RXN3<22>

DMI_TXP2<22> DMI_TXP3<22>

DMI_TXN2<22> DMI_TXN3<22>

MCH_CLKSEL1 <6>

MCH_CLKSEL0 <6>

M_ODT0<17> M_ODT1<17> M_ODT2<16> M_ODT3<16>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Alviso(1 of 5)

10 50, 12, 2004

Compal Electronics, Inc.

Layout Guide

will show these

signals routed

differentially.

Layout Guide will show

these signals routed

differentially.

Note:

"Do not install R97 for Dothan-A,

Install R97 for Dothan-B"

Layout Note:

Rote as short

as possible

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C484

0.1U_0402_16V4Z~D

1

2

R176

100_0603_1%~D

12

R455

40.2_0603_1%~D

12

R131

221_0603_1%~D

12

T3 PAD~D

R121

54.9_0603_1%~D

12

R413

10K_0402_5%~D

12

R200 100_0603_1%~D

1 2

R157

221_0603_1%~D

12

R143

100_0603_1%~D

12

C124

0.1U_0402_10V7K~D

1

2

T1 PAD~D

R398

10K_0402_5%~D

12

DMIDDR MUXING

CFG/RSVD

PM

CLK

NC

U15B

ALVISO_BGA1257~D

DMIRXN0

AA31

DMIRXN1

AB35

DMIRXP0

Y31

DMIRXP1

AA35

DMITXN0

AA33

DMITXN1

AB37

DMITXP0

Y33

DMITXP1

AA37

SM_CK0

AM33

SM_CK1

AL1

SM_CK2

AE11

SM_CK3

AJ34

SM_CK4

AF6

SM_CK5

AC10

SM_CK0#

AN33

SM_CK1#

AK1

SM_CK2#

AE10

SM_CK3#

AJ33

SM_CK4#

AF5

SM_CK5#

AD10

SM_CKE0

AP21

SM_CKE1

AM21

SM_CKE2

AH21

SM_CKE3

AK21

SM_CS0#

AN16

SM_CS1#

AM14

SM_CS2#

AH15

SM_CS3#

AG16

SM_OCDCOMP0

AF22

SM_OCDCOMP1

AF16

SM_ODT0

AP14

SM_ODT1

AL15

SM_ODT2

AM11

SM_ODT3

AN10

SMRCOMPN

AK10

SMRCOMPP

AK11

SMVREF0

AF37

SMVREF1

AD1

SMXSLEWIN

AE27

SMXSLEWOUT

AE28

SMYSLEWIN

AF9

SMYSLEWOUT

AF10

CFG0 G16

CFG1 H13

CFG2 G14

CFG3 F16

CFG4 F15

CFG5 G15

CFG6 E16

CFG7 D17

CFG8 J16

CFG9 D15

CFG10 E15

CFG11 D14

CFG12 E14

CFG13 H12

CFG14 C14

CFG15 H15

CFG16 J15

CFG17 H14

CFG18 G22

CFG19 G23

CFG20 D23

RSVD21 G25

RSVD22 G24

RSVD23 J17

RSVD24 A31

RSVD25 A30

RSVD26 D26

RSVD27 D25

BM_BUSY# J23

EXT_TS0# J21

EXT_TS1# H22

THRMTRIP# F5

PWROK AD30

RSTIN# AE29

DREF_CLKN A24

DREF_CLKP A23

DREF_SSCLKN C37

DREF_SSCLKP D37

NC1 AP37

NC2 AN37

NC3 AP36

NC4 AP2

NC5 AP1

NC6 AN1

NC7 B1

NC8 A2

NC9 B37

NC10 A36

NC11 A37

DMITXN2

AC33

DMITXN3

AD37

DMIRXN3

AD35 DMIRXN2

AC31

DMITXP2

AB33

DMITXP3

AC37

DMIRXP2

AB31

DMIRXP3

AC35

R132

100_0603_1%~D

12

R125

24.9_0603_1%~D

12

R180

24.9_0603_1%~D

12

T20PAD~D

R456

40.2_0603_1%~D

12

R457

80.6_0603_1%~D

12

HOST

Alviso

U15A

ALVISO_BGA1257~D

HD0# E4

HD1# E1

HD2# F4

HD3# H7

HD4# E2

HD5# F1

HD6# E3

HD7# D3

HD8# K7

HD9# F2

HD10# J7

HD11# J8

HD12# H6

HD13# F3

HD14# K8

HD15# H5

HD16# H1

HD17# H2

HD18# K5

HD19# K6

HD20# J4

HD21# G3

HD22# H3

HD23# J1

HD24# L5

HD25# K4

HD26# J5

HD27# P7

HD28# L7

HD29# J3

HD30# P5

HD31# L3

HD32# U7

HD33# V6

HD34# R6

HD35# R5

HD36# P3

HD37# T8

HD38# R7

HD39# R8

HD40# U8

HD41# R4

HD42# T4

HD43# T5

HD44# R1

HD45# T3

HD46# V8

HD47# U6

HD48# W6

HD49# U3

HD50# V5

HD51# W8

HD52# W7

HD53# U2

HD54# U1

HD55# Y5

HD56# Y2

HD57# V4

HD58# Y7

HD59# W1

HD60# W3

HD61# Y3

HD62# Y6

HD63# W2

HA3#

G9

HA4#

C9

HA5#

E9

HA6#

B7

HA7#

A10

HA8#

F9

HA9#

D8

HA10#

B10

HA11#

E10

HA12#

G10

HA13#

D9

HA14#

E11

HA15#

F10

HA16#

G11

HA17#

G13

HA18#

C10

HA19#

C11

HA20#

D11

HA21#

C12

HA22#

B13

HA23#

A12

HA24#

F12

HA25#

G12

HA26#

E12

HA27#

C13

HA28#

B11

HA29#

D13

HA30#

A13

HA31#

F13

HREQ#0

A7

HREQ#1

D7

HREQ#2

B8

HREQ#3

C7

HREQ#4

A8

HADSTB#0

B9

HADSTB#1

E13

HPCREQ#

A11

HCLKN

AB1

HCLKIN

AB2

HVREF J11

HXRCOMP C1

HXSCOMP C2

HYRCOMP T1

HYSCOMP L1

HYSWING P1

HXSWING D1

HDSTBN#0

G4

HDSTBN#1

K1

HDSTBN#2

R3

HDSTBN#3

V3

HDSTBP#0

G5

HDSTBP#1

K2

HDSTBP#2

R2

HDSTBP#3

W4

HDINV#0

H8

HDINV#1

K3

HDINV#2

T7

HDINV#3

U5

HCPURST#

H10

HADS#

F8

HTRDY#

B5

HDPWR#

G6

HDRDY#

F7

HDEFER#

E6

HEDRDY#

F6

HHITM#

D6

HHIT#

D4

HLOCK#

B3

HBREQ0#

E7

HBNR#

A5

HBPRI#

D5

HDBSY#

C6

HSLPCPU#

G8

HRS0#

A4

HRS1#

C5

HRS2#

B4

C490

0.1U_0402_16V4Z~D

1

2

C146

0.1U_0402_16V4Z~D

1

2

R97

0_0402_5%~D@1 2

C112

0.1U_0402_16V4Z~D

1

2

R114

75_0402_5%~D

1 2

R142

200_0603_1%~D

12

R156

54.9_0603_1%~D

12

T19PAD~D

R458 80.6_0603_1%~D

1 2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_D11

DDR_B_D57

DDR_B_D46

DDR_B_D7

DDR_B_D0

DDR_B_D44

DDR_B_D40

DDR_B_D30

DDR_B_D27

DDR_B_D15

DDR_B_D3

DDR_B_D35

DDR_B_D25

DDR_B_D23

DDR_B_D49

DDR_B_D37

DDR_B_D19

DDR_B_D48

DDR_B_D47

DDR_B_D36

DDR_B_D18

DDR_B_D8

DDR_B_D62

DDR_B_D60

DDR_B_D9

DDR_B_D2

DDR_B_D52

DDR_B_D50

DDR_B_D22

DDR_B_D56

DDR_B_D51

DDR_B_D39

DDR_B_D28

DDR_B_D17

DDR_B_BS#0

DDR_B_D45

DDR_B_D6

DDR_B_D61

DDR_B_D58

DDR_B_BS#1 DDR_B_D1

DDR_B_D54

DDR_B_D41

DDR_B_D31

DDR_B_D12

DDR_B_D5

DDR_B_D38

DDR_B_D32

DDR_B_D20

DDR_B_D16

DDR_B_D14

DDR_B_D33

DDR_B_D63

DDR_B_D59

DDR_B_D42

DDR_B_D55

DDR_B_D53

DDR_B_D43

DDR_B_D29

DDR_B_D26

DDR_B_D13

DDR_B_D4

DDR_B_BS#2

DDR_B_D34

DDR_B_D24

DDR_B_D21

DDR_B_D10

DDR_B_DQS#4

DDR_B_DQS#5

DDR_B_DQS0

DDR_B_CAS#

DDR_B_WE#

DDR_B_RAS#

DDR_B_DM1

DDR_B_DQS#6

DDR_B_DQS#7

TP_MB_RCVENIN#

DDR_B_DQS1

DDR_B_DQS2

DDR_B_DQS3

DDR_B_DQS4

DDR_B_DQS5

DDR_B_DQS6

DDR_B_DQS7

DDR_B_DQS#0

DDR_B_MA0

DDR_B_MA5

DDR_B_MA3

DDR_B_MA2

DDR_B_MA7

DDR_B_MA1

DDR_B_MA6

DDR_B_MA4

DDR_B_MA12

DDR_B_MA9

DDR_B_MA8

DDR_B_MA10

DDR_B_MA11

DDR_B_MA13

DDR_B_DQS#1

DDR_B_DQS#2

DDR_B_DQS#3

DDR_B_DM6

DDR_B_DM7

DDR_B_DM2

DDR_B_DM4

DDR_B_DM5

DDR_B_DM3

DDR_B_DM0

DDR_A_D63

DDR_A_D59

DDR_A_D42

DDR_A_D37

DDR_A_D17

DDR_A_D2

DDR_A_D22

DDR_A_D19

DDR_A_D7

DDR_A_WE#

DDR_A_MA10

DDR_A_DQS#4

DDR_A_D53

DDR_A_D43

DDR_A_D35

DDR_A_D15

DDR_A_DQS1

DDR_A_D30

DDR_A_D56

DDR_A_D58

DDR_A_D48

DDR_A_D32

DDR_A_MA5

DDR_A_D55

DDR_A_D51

DDR_A_D40

DDR_A_D34

DDR_A_DQS5 DDR_A_D18

DDR_A_D16

DDR_A_D10

DDR_A_D9

DDR_A_MA9

DDR_A_DQS#3

DDR_A_DQS6

DDR_A_DQS0

DDR_A_D38

DDR_A_D27

DDR_A_D11

DDR_A_MA3

DDR_A_DQS#7

DDR_A_DM6

DDR_A_D33

DDR_A_D14

DDR_A_D0

DDR_A_MA4

DDR_A_MA0

DDR_A_BS#0

DDR_A_D54

DDR_A_D46

DDR_A_D28

DDR_A_DQS4

DDR_A_BS#2 DDR_A_D3

DDR_A_D60

DDR_A_D21

DDR_A_D41

DDR_A_D13

DDR_A_D6

DDR_A_D5

DDR_A_MA8

DDR_A_DQS#2

DDR_A_BS#1

DDR_A_D45

DDR_A_MA2

DDR_A_DQS#6

DDR_A_DM7

DDR_A_D62

DDR_A_D26

DDR_A_D20

DDR_A_DM4

DDR_A_DM3

DDR_A_D52

DDR_A_D57

DDR_A_D44

DDR_A_D39

DDR_A_D25

DDR_A_D1

DDR_A_MA13

DDR_A_DQS#1

DDR_A_DQS3

DDR_A_DM1

DDR_A_D12

DDR_A_D61

DDR_A_D36

DDR_A_D8

DDR_A_MA7

DDR_A_DQS7

DDR_A_D29

DDR_A_CAS#

DDR_A_MA11

DDR_A_MA1

DDR_A_DQS#5

DDR_A_DQS#0

DDR_A_DM5

DDR_A_DM2

DDR_A_D23

DDR_A_DQS2

DDR_A_D50

DDR_A_D49

DDR_A_D47

DDR_A_D31

DDR_A_D24

DDR_A_D4

DDR_A_RAS#

DDR_A_MA12

DDR_A_MA6

DDR_A_DM0

TP_MB_RCVENOUT#TP_MA_RCVENOUT#

TP_MA_RCVENIN#

DDR_B_D[0..63] <16>DDR_A_D[0..63] <17>

DDR_A_BS#0<17> DDR_A_BS#1<17>

DDR_A_MA[0..13]<17>

DDR_A_BS#2<17>

DDR_B_BS#0<16> DDR_B_BS#1<16> DDR_B_BS#2<16>

DDR_A_WE#<17>

DDR_A_CAS#<17> DDR_A_RAS#<17>

DDR_A_DM[0..7]<17>

DDR_B_CAS#<16> DDR_B_RAS#<16>

DDR_B_MA[0..13]<16>

DDR_B_WE#<16>

DDR_B_DM[0..7]<16>

DDR_A_DQS#[0..7]<17>

DDR_A_DQS[0..7]<17>

DDR_B_DQS#[0..7]<16>

DDR_B_DQS[0..7]<16>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Alviso(2 of 5)

11 50, 12, 2004

Compal Electronics, Inc.

This Symbol as same

as Intel CRB

schematic, So Layout

Guide will show these

signals routed

differentially.

This Symbol as same

as Intel CRB

schematic, So Layout

Guide will show these

signals routed

differentially.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DDR SYSTEM MEMORY B

U15D

ALVISO_BGA1257~D

SBDQ0 AE31

SBDQ1 AE32

SBDQ2 AG32

SBDQ3 AG36

SBDQ4 AE34

SBDQ5 AE33

SBDQ6 AF31

SBDQ7 AF30

SBDQ8 AH33

SBDQ9 AH32

SBDQ10 AK31

SBDQ11 AG30

SBDQ12 AG34

SBDQ13 AG33

SBDQ14 AH31

SBDQ15 AJ31

SBDQ16 AK30

SBDQ17 AJ30

SBDQ18 AH29

SBDQ19 AH28

SBDQ20 AK29

SBDQ21 AH30

SBDQ22 AH27

SBDQ23 AG28

SBDQ24 AF24

SBDQ25 AG23

SBDQ26 AJ22

SBDQ27 AK22

SBDQ28 AH24

SBDQ29 AH23

SBDQ30 AG22

SBDQ31 AJ21

SBDQ32 AG10

SBDQ33 AG9

SBDQ34 AG8

SBDQ35 AH8

SBDQ36 AH11

SBDQ37 AH10

SBDQ38 AJ9

SBDQ39 AK9

SBDQ40 AJ7

SBDQ41 AK6

SBDQ42 AJ4

SBDQ43 AH5

SBDQ44 AK8

SBDQ45 AJ8

SBDQ46 AJ5

SB_BS0#

AJ15

SB_BS1#

AG17

SB_BS2#

AG21

SBDQ47 AK4

SBDQ48 AG5

SBDQ49 AG4

SBDQ50 AD8

SBDQ51 AD9

SBDQ52 AH4

SBDQ53 AG6

SBDQ54 AE8

SBDQ55 AD7

SBDQ56 AC5

SBDQ57 AB8

SBDQ58 AB6

SBDQ59 AA8

SBDQ60 AC8

SBDQ61 AC7

SBDQ62 AA4

SBDQ63 AA5

SB_CAS#

AH14

SB_RAS#

AK14

SB_RCVENIN#

AF15

SB_RCVENOUT#

AF14

SB_WE#

AH16

SB_MA0

AH17

SB_MA1

AK17

SB_MA2

AH18

SB_MA3

AJ18

SB_MA4

AK18

SB_MA5

AJ19

SB_MA6

AK19

SB_MA7

AH19

SB_MA8

AJ20

SB_MA9

AH20

SB_MA10

AJ16

SB_MA11

AG18

SB_MA12

AG20

SB_MA13

AG15

SB_DQS0#

AF35

SB_DQS1#

AK33

SB_DQS2#

AK28

SB_DQS3#

AJ23

SB_DQS4#

AL10

SB_DQS5#

AH7

SB_DQS6#

AF7

SB_DQS7#

AB5

SB_DQS0

AF34

SB_DQS1

AK32

SB_DQS2

AJ28

SB_DQS3

AK23

SB_DQS4

AM10

SB_DQS5

AH6

SB_DQS6

AF8

SB_DQS7

AB4

SD_DM0

AF32

SD_DM1

AK34

SD_DM2

AK27

SD_DM3

AK24

SD_DM4

AJ10

SD_DM5

AK5

SD_DM6

AE7

SD_DM7

AB7

DDR MEMORY SYSTEM A

U15C

ALVISO_BGA1257~D

SADQ0 AG35

SADQ1 AH35

SADQ2 AL35

SADQ3 AL37

SADQ4 AH36

SADQ5 AJ35

SADQ6 AK37

SADQ7 AL34

SADQ8 AM36

SADQ9 AN35

SADQ10 AP32

SADQ11 AM31

SADQ12 AM34

SADQ13 AM35

SADQ14 AL32

SADQ15 AM32

SADQ16 AN31

SADQ17 AP31

SADQ18 AN28

SADQ19 AP28

SADQ20 AL30

SADQ21 AM30

SADQ22 AM28

SADQ23 AL28

SADQ24 AP27

SADQ25 AM27

SADQ26 AM23

SADQ27 AM22

SADQ28 AL23

SADQ29 AM24

SADQ30 AN22

SADQ31 AP22

SADQ32 AM9

SADQ33 AL9

SADQ34 AL6

SADQ35 AP7

SADQ36 AP11

SADQ37 AP10

SADQ38 AL7

SADQ39 AM7

SADQ40 AN5

SADQ41 AN6

SADQ42 AN3

SADQ43 AP3

SADQ44 AP6

SADQ45 AM6

SADQ46 AL4

SADQ47 AM3

SADQ48 AK2

SADQ49 AK3

SADQ50 AG2

SADQ51 AG1

SADQ52 AL3

SADQ53 AM2

SADQ54 AH3

SADQ55 AG3

SADQ56 AF3

SADQ57 AE3

SADQ58 AD6

SADQ59 AC4

SADQ60 AF2

SADQ61 AF1

SADQ62 AD4

SADQ63 AD5

SA_BS0#

AK15

SA_BS1#

AK16

SA_BS2#

AL21

SA_DM0

AJ37

SA_DM1

AP35

SA_DM2

AL29

SA_DM3

AP24

SA_DM4

AP9

SA_DM5

AP4

SA_DM6

AJ2

SA_DM7

AD3

SA_DQS0

AK36

SA_DQS1

AP33

SA_DQS2

AN29

SA_DQS3

AP23

SA_DQS4

AM8

SA_DQS5

AM4

SA_DQS6

AJ1

SA_DQS7

AE5

SA_DQS0#

AK35

SA_DQS1#

AP34

SA_DQS2#

AN30

SA_DQS3#

AN23

SA_DQS4#

AN8

SA_DQS5#

AM5

SA_DQS6#

AH1

SA_DQS7#

AE4

SA_MA0

AL17

SA_MA1

AP17

SA_MA2

AP18

SA_MA3

AM17

SA_MA4

AN18

SA_MA5

AM18

SA_MA6

AL19

SA_MA7

AP20

SA_MA8

AM19

SA_MA9

AL20

SA_MA10

AM16

SA_MA11

AN20

SA_MA12

AM20

SA_MA13

AM15

SA_CAS#

AN15

SA_RAS#

AP16

SA_RCVENIN#

AF29

SA_RCVENOUT#

AF28

SA_WE#

AP15

T22 PAD~DT25 PAD~D T23 PAD~DT24 PAD~D

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PEG_RXN0

PEG_RXN1

PEG_RXN2

PEG_RXN3

PEG_RXN4

PEG_RXN5

PEG_RXN7

PEG_RXN6

PEG_RXN8

PEG_RXN9

PEG_RXN11

PEG_RXN10

PEG_RXN14

PEG_RXN15

PEG_RXN13

PEG_RXN12

PEG_RXP1

PEG_RXP3

PEG_RXP2

PEG_RXP6

PEG_RXP7

PEG_RXP5

PEG_RXP4

PEG_RXP11

PEG_RXP9

PEG_RXP8

PEG_RXP12

PEG_RXP13

PEG_RXP15

PEG_RXP14

PEG_RXP10

PEG_TXN0

PEG_TXN1

PEG_TXN3

PEG_TXN2

PEG_TXN6

PEG_TXN7

PEG_TXN5

PEG_TXN4

PEG_TXN11

PEG_TXN9

PEG_TXN8

PEG_TXN12

PEG_TXN13

PEG_TXN15

PEG_TXN14

PEG_TXN10

PEG_TXP0

PEG_TXP1

PEG_TXP3

PEG_TXP2

PEG_TXP6

PEG_TXP7

PEG_TXP5

PEG_TXP4

PEG_TXP11

PEG_TXP9

PEG_TXP8

PEG_TXP12

PEG_TXP13

PEG_TXP15

PEG_TXP14

PEG_TXP10

PEG_RXN[0..15]

PEG_TXN[0..15]

PEG_TXP[0..15]

PEG_RXP[0..15]

PEG_RXP0

PEGCOMP

+1.5VRUN_PCIE

+VCCP

+2.5VRUN

+VCCP

PEG_RXN[0..15] <18>

PEG_RXP[0..15] <18>

PEG_TXN[0..15] <18>

PEG_TXP[0..15] <18>

CLK_MCH_3GPLL#<6> CLK_MCH_3GPLL<6>

CFG0<10>

CFG5<10>

CFG6<10>

CFG7<10>

CFG12<10>

CFG13<10>

CFG16<10>

CFG18<10> CFG19<10>

CFG9<10>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Alviso(3 of 5)

12 50, 12, 2004

Compal Electronics, Inc.

This Symbol as same

as Intel CRB

schematic, So Layout

Guide will show these

signals routed

differentially.

CFG[2:0] Refer to sheet 6 for FSB

frequency select

CFG19

(VTT Select)

*

*

CFG18

(VCC Select)

Low = DMI x 2

CFG7

High = DMI x 4

CFG5

Low = DT/Transportable CPU

High = Mobile CPU

CFG6 High = DDR-I

Low = DDR-II

CFG[13:12]

CFG16

(FSB Dynamic

ODT)

Low = 1.05V (Default)

00 = Reserved

01 = XOR Mode Enabled

10 = All Z Mode Enabled

11 = Normal Operation (Default)

High = 1.2V

Low = 1.05V (Default)

High = 1.5V

High = Enabled

Low = Disabled

Low = Reverse Lane

CFG9 High = Normal Operation

*

*

*

**

*

CFG[17:3] have internal pull-up

CFG[19:18] have internal pull-down

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R411 2.2K_0402_5%~D@

1 2

MISC

TVVGALVDS

PCI - EXPRESS GRAPHICS

U15G

ALVISO_BGA1257~D

SDVOCTRL_DATA

H24

SDVOCTRL_CLK

H25

GCLKN

AB29

GCLKP

AC29

TVDAC_A

A15

TVDAC_B

C16

TVDAC_C

A17

TV_REFSET

J18

TV_IRTNA

B15

TV_IRTNB

B16

TV_IRTNC

B17

GREEN#

B20

HSYNC

G21

DDCCLK

E24

DDCDATA

E23

BLUE

E21

BLUE#

D21

GREEN

C20

RED

A19

RED#

B19

VSYNC

H21

REFSET

J20

LDDC_CLK

F23

LBKLT_CTL

E25

LBKLT_EN

F25

LCTLA_CLK

C23

LCTLB_DATA

C22

LDDC_DATA

F22

LVDD_EN

F26

LIBG

C33

LVBG

C31

LVREFH

F28

LVREFL

F27

LACLKN

B30

LACLKP

B29

LBCLKN

C25

LBCLKP

C24

LADATAN0

B34

LADATAN1

B33

LADATAN2

B32

LADATAP0

A34

LADATAP1

A33

LADATAP2

B31

LBDATAN0

C29

LBDATAN1

D28

LBDATAN2

C27

LBDATAP2

C26

EXP_COMPI D36

EXP_ICOMPO D34

EXP_RXN0 E30

EXP_RXN1 F34

EXP_RXN2 G30

EXP_RXN3 H34

EXP_RXN4 J30

EXP_RXN5 K34

EXP_RXN6 L30

EXP_RXN7 M34

EXP_RXN8 N30

EXP_RXN9 P34

EXP_RXN10 R30

EXP_RXN11 T34

EXP_RXN12 U30

EXP_RXN13 V34

EXP_RXN14 W30

EXP_RXN15 Y34

EXP_RXP0 D30

EXP_RXP1 E34

EXP_RXP2 F30

EXP_RXP3 G34

EXP_RXP4 H30

EXP_RXP5 J34

EXP_RXP6 K30

EXP_RXP7 L34

EXP_RXP8 M30

EXP_RXP9 N34

EXP_RXP10 P30

EXP_RXP11 R34

EXP_RXP12 T30

EXP_RXP13 U34

EXP_RXP14 V30

EXP_RXP15 W34

EXP_TXN0 E32

EXP_TXN1 F36

EXP_TXN2 G32

EXP_TXN3 H36

EXP_TXN4 J32

EXP_TXN5 K36

EXP_TXN6 L32

EXP_TXN7 M36

EXP_TXN8 N32

EXP_TXN9 P36

EXP_TXN10 R32

EXP_TXN11 T36

EXP_TXN12 U32

EXP_TXN13 V36

EXP_TXN14 W32

EXP_TXN15 Y36

EXP_TXP0 D32

EXP_TXP1 E36

EXP_TXP2 F32

EXP_TXP3 G36

EXP_TXP4 H32

EXP_TXP5 J36

EXP_TXP6 K32

EXP_TXP7 L36

EXP_TXP8 M32

EXP_TXP9 N36

EXP_TXP10 P32

EXP_TXP11 R36

EXP_TXP12 T32

EXP_TXP13 U36

EXP_TXP14 V32

EXP_TXP15 W36

LBDATAP0

C28

LBDATAP1

D27

R408 2.2K_0402_5%~D@

1 2

R407 1K_0402_5%~D@

1 2

R129

24.9_0603_1%~D

1 2

R406 1K_0402_5%~D@

1 2

R402 2.2K_0402_5%~D@

1 2

R415 10K_0402_5%~D

12

R401 2.2K_0402_5%~D@

1 2

R404 2.2K_0402_5%~D

1 2

R412 2.2K_0402_5%~D@

1 2

R108 2.2K_0402_5%~D@

1 2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

V1.8_DDR_CAP3

V1.8_DDR_CAP4

V1.8_DDR_CAP6

V1.8_DDR_CAP4

V1.8_DDR_CAP6

3GRLL_R

V1.8_DDR_CAP5

V1.8_DDR_CAP1

V1.8_DDR_CAP2

V1.8_DDR_CAP5

V1.8_DDR_CAP1

V1.8_DDR_CAP2

V1.8_DDR_CAP3

+1.5VRUN

+1.5VRUN_DPLLA +1.5VRUN_DPLLB

+1.5VRUN+1.5VRUN_DDRDLL

+1.5VRUN

+1.5VRUN+1.5VRUN_3GPLL

+2.5VRUN+2.5VRUN_3GBG

+2.5VRUN

+VCCP

+1.8VSUS

+1.5VRUN_MPLL

+1.5VRUN

+1.5VRUN_MPLL

+1.5VRUN_HPLL

+1.5VRUN

+1.5VRUN_HPLL

+1.5VRUN

+1.5VRUN_DPLLB

+1.5VRUN

+1.5VRUN_DPLLA

+1.5VRUN

+2.5VRUN

+2.5VRUN

+2.5VRUN

+VCCP

+VCCP

+1.5VRUN_PCIE

+1.8VSUS

+1.5VRUN

+VCCP

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Alviso(4 of 5)

13 50, 12, 2004

Compal Electronics, Inc.

Note : All VCCSM pin

shorted internally.

W=20 mils

W=20 mils

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Note: Place near chip.

Close B26,B25,A25

Route VSSA3GBG gnd from GMCH to

decoupling cap ground lead and

then connect to the gnd plane.

C120

0.1U_0402_16V4Z~D

1

2

C462

0.1U_0402_16V4Z~D

1

2

C641

0.1U_0402_16V4Z~D

1

2

L34

BLM18PG600SN1_0603

12

L78

BLM18PG600SN1_0603

12

C425

10U_1206_6.3V6M~D

1

2

+

C481

470U_D2_2.5VM~D

1

2

C640

0.1U_0402_16V4Z~D

1

2

C233

10U_1206_6.3V6M~D

1

2

C638

0.1U_0402_16V4Z~D

1

2

C427

0.01U_0402_16V7K~D

1

2

C479

10U_1206_6.3V6M~D

1

2

C459

10U_1206_6.3V6M~D

1

2

C453

2.2U_0805_10V6K~D

1

2

C79

4.7U_0805_6.3V6K~D

1

2

L19

BLM11A601S_0603~D

1 2

C504

0.1U_0402_10V7K~D

1

2

C430

0.1U_0402_16V4Z~D

1

2

C90

4.7U_0805_6.3V6K~D

1

2

C451

0.1U_0402_16V4Z~D

1

2

C422

0.47U_0603_16V7K~D

1

2

C644

0.1U_0402_16V4Z~D

1

2

C118

0.22U_0603_10V7K~D

1

2

C513

0.1U_0402_10V7K~D

1

2

C418

10U_1206_6.3V6M~D

1

2

C456

0.1U_0402_16V4Z~D

1

2

POWER

U15F

ALVISO_BGA1257~D

VTT0

K13

VTT1

J13

VTT2

K12

VTT3

W11

VTT4

V11

VTT5

U11

VTT6

T11

VTT7

R11

VTT8

P11

VTT9

N11

VTT10

M11

VTT11

L11

VTT12

K11

VTT13

W10

VTT14

V10

VTT15

U10

VTT16

T10

VTT17

R10

VTT18

P10

VTT19

N10

VTT20

M10

VTT21

K10

VTT22

J10

VTT23

Y9

VTT24

W9

VTT25

U9

VTT26

R9

VTT27

P9

VTT28

N9

VTT29

M9

VTT30

L9

VTT31

J9

VTT32

N8

VTT33

M8

VTT34

N7

VTT35

M7

VTT36

N6

VTT37

M6

VTT38

A6

VTT39

N5

VTT40

M5

VTT41

N4

VTT42

M4

VTT43

N3

VTT44

M3

VTT45

N2

VTT46

M2

VTT47

B2

VTT48

V1

VTT49

N1

VTT50

M1

VTT51

G1

VCCSM0 AM37

VCCSM1 AH37

VCCSM2 AP29

VCCSM3 AD28

VCCSM4 AD27

VCCSM5 AC27

VCCSM6 AP26

VCCSM7 AN26

VCCSM8 AM26

VCCSM9 AL26

VCCSM10 AK26

VCCSM11 AJ26

VCCSM12 AH26

VCCSM13 AG26

VCCSM14 AF26

VCCSM15 AE26

VCCSM16 AP25

VCCSM17 AN25

VCCSM18 AM25

VCCSM19 AL25

VCCSM20 AK25

VCCSM21 AJ25

VCCSM22 AH25

VCCSM23 AG25

VCCSM24 AF25

VCCSM25 AE25

VCCSM26 AE24

VCCSM27 AE23

VCCSM28 AE22

VCCSM29 AE21

VCCSM30 AE20

VCCSM31 AE19

VCCSM32 AE18

VCCSM33 AE17

VCCSM34 AE16

VCCSM35 AE15

VCCSM36 AE14

VCCSM37 AP13

VCCSM38 AN13

VCCSM39 AM13

VCCSM40 AL13

VCCSM41 AK13

VCCSM42 AJ13

VCCSM43 AH13

VCCSM44 AG13

VCCSM45 AF13

VCCSM46 AE13

VCCSM47 AP12

VCCSM48 AN12

VCCSM49 AM12

VCCSM50 AL12

VCCSM51 AK12

VCCSM52 AJ12

VCCSM53 AH12

VCCSM54 AG12

VCCSM55 AF12

VCCSM56 AE12

VCCSM57 AD11

VCCSM58 AC11

VCCSM59 AB11

VCCSM60 AB10

VCCSM61 AB9

VCCSM62 AP8

VCCSM63 AM1

VCCSM64 AE1

C186

0.1U_0402_16V4Z~D

1

2

L32

BLM18PG600SN1_0603

12

C461

0.1U_0402_16V4Z~D

1

2

+

C238

330U_D2E_2.5VM~D@

1

2

C639

0.1U_0402_16V4Z~D

1

2

C515

0.1U_0402_10V7K~D

1

2

C426

0.1U_0402_16V4Z~D

1

2

L24

BLM11A601S_0603~D

12

+

C485

470U_D2_2.5VM~D

1

2

C126

10U_1206_6.3V6M~D

1

2

C173

10U_1206_6.3V6M~D

1

2

C642

0.1U_0402_16V4Z~D

1

2

POWER

U15E

ALVISO_BGA1257~D

VCC0

T29

VCC1

R29

VCC2

N29

VCC3

M29

VCC4

K29

VCC5

J29

VCC6

V28

VCC7

U28

VCC8

T28

VCC9

R28

VCC10

P28

VCC11

N28

VCC12

M28

VCC13

L28

VCC14

K28

VCC15

J28

VCC16

H28

VCC17

G28

VCC18

V27

VCC19

U27

VCC20

T27

VCC21

R27

VCC22

P27

VCC23

N27

VCC24

M27

VCC25

L27

VCC26

K27

VCC27

J27

VCC28

H27

VCC29

K26

VCC30

H26

VCC31

K25

VCC32

J25

VCC33

K24

VCC34

K23

VCC35

K22

VCC36

K21

VCC37

W20

VCC38

U20

VCC39

T20

VCC40

K20

VCC41

V19

VCC42

U19

VCC43

K19

VCC44

W18

VCC45

V18

VCC46

T18

VCC47

K18

VCC48

K17

VCCD_HMPLL1

AC2

VCCD_HMPLL2

AC1

VCCA_DPLLA

B23

VCCA_DPLLB

C35

VCCA_HPLL

AA1

VCCA_MPLL

AA2

VCCA_TVDACA0 F17

VCCA_TVDACA1 E17

VCCA_TVDACB0 D18

VCCA_TVDACB1 C18

VCCA_TVDACC0 F18

VCCA_TVDACC1 E18

VCCA_TVBG H18

VSSA_TVBG G18

VCCD_TVDAC D19

VCCDQ_TVDAC H17

VCCD_LVDS0 B26

VCCD_LVDS1 B25

VCCD_LVDS2 A25

VCCA_LVDS A35

VCCHV0 B22

VCCHV1 B21

VCCHV2 A21

VCCTX_LVDS0 B28

VCCTX_LVDS1 A28

VCCTX_LVDS2 A27

VCCA_SM0 AF20

VCCA_SM1 AP19

VCCA_SM2 AF19

VCCA_SM3 AF18

VCC3G0 AE37

VCC3G1 W37

VCC3G2 U37

VCC3G3 R37

VCC3G4 N37

VCC3G5 L37

VCC3G6 J37

VCCA_3GPLL0 Y29

VCCA_3GPLL1 Y28

VCCA_3GPLL2 Y27

VCCA_3GBG F37

VSSA_3GBG G37

VCC_SYNC H20

VCCA_CRTDAC0 F19

VCCA_CRTDAC1 E19

VSSA_CRTDAC G19

C231

0.1U_0402_16V4Z~D

1

2

C454

10U_1206_6.3V6M~D

1

2

C519

0.1U_0402_10V7K~D

1

2

C497

0.1U_0402_16V4Z~D

1

2

L29

BLM11A601S_0603~D

1 2

C119

0.1U_0402_16V4Z~D

1

2

C523

0.1U_0402_10V7K~D

1

2

C477

0.1U_0402_16V4Z~D

1

2

C450

0.1U_0402_16V4Z~D

1

2

C643

0.1U_0402_16V4Z~D

1

2

C460

4.7U_0805_6.3V6K~D

1

2

C449

0.22U_0603_10V7K~D

1

2

C232

10U_1206_6.3V6M~D

1

2

C495

0.1U_0402_10V7K~D

1

2

C423

0.47U_0603_16V7K~D

1

2

C455

10U_1206_6.3V6M~D

1

2

C520

0.1U_0402_16V4Z~D

1

2

C429

0.1U_0402_16V4Z~D

1

2

L30

BLM11A601S_0603~D

1 2

C428

0.1U_0402_16V4Z~D

1

2

+

C510

220U_D2_4VM

1

2

R422

0.5_0805_1%~D

1 2

L15

BLM11A601S_0603~D

1 2

+

C237

100U_D2_6.3VM_R45~D

1

2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+VCCP +1.8VSUS

+VCCP

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Alviso(5 of 5)

14 50, 12, 2004

Compal Electronics, Inc.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

VSS

U15I

ALVISO_BGA1257~D

VSS271

Y1

VSS270

D2

VSS269

G2

VSS268

J2

VSS260

L2

VSS259

P2

VSS258

T2

VSS257

V2

VSS256

AD2

VSS255

AE2

VSS254

AH2

VSS253

AL2

VSS252

AN2

VSS251

A3

VSS250

C3

VSS249

AA3

VSS248

AB3

VSS247

AC3

VSS246

AJ3

VSS245

C4

VSS244

H4

VSS243

L4

VSS242

P4

VSS241

U4

VSS240

Y4

VSS239

AF4

VSS238

AN4

VSS237

E5

VSS236

W5

VSS235

AL5

VSS234

AP5

VSS233

B6

VSS232

J6

VSS231

L6

VSS230

P6

VSS229

T6

VSS228

AA6

VSS227

AC6

VSS226

AE6

VSS225

AJ6

VSS224

G7

VSS223

V7

VSS222

AA7

VSS221

AG7

VSS220

AK7

VSS219

AN7

VSS218

C8

VSS217

E8

VSS216

L8

VSS215

P8

VSS214

Y8

VSS213

AL8

VSS212

A9

VSS211

H9

VSS210

K9

VSS209

T9

VSS208

V9

VSS207

AA9

VSS206

AC9

VSS205

AE9

VSS204

AH9

VSS203

AN9

VSS202

D10

VSS201

L10

VSS200

Y10

VSSALVDS B36

VSS199

AA10

VSS198

F11

VSS197

H11

VSS196

Y11

VSS195 AA11

VSS194 AF11

VSS193 AG11

VSS192 AJ11

VSS191 AL11

VSS190 AN11

VSS189 B12

VSS188 D12

VSS187 J12

VSS186 A14

VSS185 B14

VSS184 F14

VSS183 J14

VSS182 K14

VSS181 AG14

VSS180 AJ14

VSS179 AL14

VSS178 AN14

VSS177 C15

VSS176 K15

VSS175 A16

VSS174 D16

VSS173 H16

VSS172 K16

VSS171 AL16

VSS170 C17

VSS169 G17

VSS168 AF17

VSS167 AJ17

VSS166 AN17

VSS165 A18

VSS164 B18

VSS163 U18

VSS162 AL18

VSS161 C19

VSS160 H19

VSS159 J19

VSS158 T19

VSS157 W19

VSS156 AG19

VSS155 AN19

VSS154 A20

VSS153 D20

VSS152 E20

VSS151 F20

VSS150 G20

VSS149 V20

VSS148 AK20

VSS147 C21

VSS146 F21

VSS145 AF21

VSS144 AN21

VSS143 A22

VSS142 D22

VSS141 E22

VSS140 J22

VSS139 AH22

VSS138 AL22

VSS137 H23

VSS136 AF23

VSS135 B24

VSS134 D24

VSS133 F24

VSS132 J24

VSS131 AG24

VSS130 AJ24

VSS

U15J

ALVISO_BGA1257~D

VSS267

AL24

VSS266

AN24

VSS265

A26

VSS264

E26

VSS263

G26

VSS262

J26

VSS261

B27

VSS129

E27

VSS128

G27

VSS127

W27

VSS126

AA27

VSS125

AB27

VSS124

AF27

VSS123

AG27

VSS122

AJ27

VSS121

AL27

VSS120

AN27

VSS119

E28

VSS118

W28

VSS117

AA28

VSS116

AB28

VSS115

AC28

VSS114

A29

VSS113

D29

VSS112

E29

VSS111

F29

VSS110

G29

VSS109

H29

VSS108

L29

VSS107

P29

VSS106

U29

VSS105

V29

VSS104

W29

VSS103

AA29

VSS102

AD29

VSS101

AG29

VSS100

AJ29

VSS99

AM29

VSS98

C30

VSS97

Y30

VSS96

AA30

VSS95

AB30

VSS94

AC30

VSS93

AE30

VSS92

AP30

VSS91

D31

VSS90

E31

VSS89

F31

VSS88

G31

VSS87

H31

VSS86

J31

VSS85

K31

VSS84

L31

VSS83

M31

VSS82

N31

VSS81

P31

VSS80

R31

VSS79

T31

VSS78

U31

VSS77

V31

VSS76

W31

VSS75

AD31

VSS74

AG31

VSS73

AL31

VSS72

A32

VSS71

C32

VSS70

Y32

VSS69

AA32

VSS68

AB32

VSS67 AC32

VSS66 AD32

VSS65 AJ32

VSS64 AN32

VSS63 D33

VSS62 E33

VSS61 F33

VSS60 G33

VSS59 H33

VSS58 J33

VSS57 K33

VSS56 L33

VSS55 M33

VSS54 N33

VSS53 P33

VSS52 R33

VSS51 T33

VSS50 U33

VSS49 V33

VSS48 W33

VSS47 AD33

VSS46 AF33

VSS45 AL33

VSS44 C34

VSS43 AA34

VSS42 AB34

VSS41 AC34

VSS40 AD34

VSS39 AH34

VSS38 AN34

VSS37 B35

VSS36 D35

VSS35 E35

VSS34 F35

VSS33 G35

VSS32 H35

VSS31 J35

VSS30 K35

VSS29 L35

VSS28 M35

VSS27 N35

VSS26 P35

VSS25 R35

VSS24 T35

VSS23 U35

VSS22 V35

VSS21 W35

VSS20 Y35

VSS19 AE35

VSS18 C36

VSS17 AA36

VSS16 AB36

VSS15 AC36

VSS14 AD36

VSS13 AE36

VSS12 AF36

VSS11 AJ36

VSS10 AL36

VSS9 AN36

VSS8 E37

VSS7 H37

VSS6 K37

VSS5 M37

VSS4 P37

VSS3 T37

VSS2 V37

VSS1 Y37

VSS0 AG37

NCTF

U15H

ALVISO_BGA1257~D

VCCSM_NCTF31 AB12

VCCSM_NCTF30 AC12

VCCSM_NCTF29 AD12

VCCSM_NCTF28 AB13

VCCSM_NCTF27 AC13

VCCSM_NCTF26 AD13

VCCSM_NCTF25 AC14

VCCSM_NCTF24 AD14

VCCSM_NCTF23 AC15

VCCSM_NCTF22 AD15

VCCSM_NCTF21 AC16

VCCSM_NCTF20 AD16

VCCSM_NCTF19 AC17

VCCSM_NCTF18 AD17

VCCSM_NCTF17 AC18

VCCSM_NCTF16 AD18

VCCSM_NCTF15 AC19

VCCSM_NCTF14 AD19

VCCSM_NCTF13 AC20

VCCSM_NCTF12 AD20

VCCSM_NCTF11 AC21

VCCSM_NCTF10 AD21

VCCSM_NCTF9 AC22

VCCSM_NCTF8 AD22

VCCSM_NCTF7 AC23

VCCSM_NCTF6 AD23

VCCSM_NCTF5 AC24

VCCSM_NCTF4 AD24

VCCSM_NCTF3 AC25

VCCSM_NCTF2 AD25

VCCSM_NCTF1 AC26

VCC_NCTF78 L17

VCC_NCTF77 M17

VCC_NCTF76 N17

VCC_NCTF75 P17

VCC_NCTF74 T17

VCC_NCTF73 U17

VCC_NCTF72 V17

VCC_NCTF71 W17

VCC_NCTF70 L18

VCC_NCTF69 M18

VCC_NCTF68 N18

VCC_NCTF67 P18

VCC_NCTF66 R18

VCC_NCTF65 Y18

VCC_NCTF64 L19

VCC_NCTF63 M19

VCC_NCTF62 N19

VCC_NCTF61 P19

VCC_NCTF60 R19

VCC_NCTF59 Y19

VCC_NCTF58 L20

VCC_NCTF57 M20

VCC_NCTF56 N20

VCC_NCTF55 P20

VCC_NCTF54 R20

VCC_NCTF53 Y20

VCC_NCTF52 L21

VCC_NCTF51 M21

VCC_NCTF50 N21

VCC_NCTF49 P21

VCC_NCTF48 T21

VCC_NCTF47 U21

VCC_NCTF46 V21

VCC_NCTF45 W21

VCC_NCTF44 L22

VCC_NCTF43 M22

VCC_NCTF42 N22

VCC_NCTF41 P22

VCC_NCTF40 R22

VCC_NCTF39 T22

VCC_NCTF38 U22

VCC_NCTF37 V22

VCC_NCTF36 W22

VCC_NCTF35 L23

VCC_NCTF34 M23

VCC_NCTF33 N23

VCC_NCTF32 P23

VCC_NCTF31 R23

VCC_NCTF30 T23

VCC_NCTF29 U23

VCC_NCTF28 V23

VCC_NCTF27 W23

VCC_NCTF26 L24

VCC_NCTF25 M24

VCC_NCTF24 N24

VCC_NCTF23 P24

VCC_NCTF22 R24

VCC_NCTF21 T24

VCC_NCTF20 U24

VCC_NCTF19 V24

VCC_NCTF18 W24

VCC_NCTF17 L25

VCC_NCTF16 M25

VCC_NCTF15 N25

VCC_NCTF14 P25

VCC_NCTF13 R25

VCC_NCTF12 T25

VCC_NCTF11 U25

VCCSM_NCTF0 AD26

VTT_NCTF17

L12

VTT_NCTF16

M12

VTT_NCTF15

N12

VTT_NCTF14

P12

VTT_NCTF13

R12

VTT_NCTF12

T12

VTT_NCTF11

U12

VTT_NCTF10

V12

VTT_NCTF9

W12

VTT_NCTF8

L13

VTT_NCTF7

M13

VTT_NCTF6

N13

VTT_NCTF5

P13

VTT_NCTF4

R13

VTT_NCTF3

T13

VTT_NCTF2

U13

VTT_NCTF1

V13

VTT_NCTF0

W13

VSS_NCTF68

Y12

VSS_NCTF67

AA12

VSS_NCTF66

Y13

VSS_NCTF65

AA13

VSS_NCTF64

L14

VSS_NCTF63

M14

VSS_NCTF62

N14

VSS_NCTF61

P14

VSS_NCTF60

R14

VSS_NCTF59

T14

VSS_NCTF58

U14

VSS_NCTF57

V14

VSS_NCTF56

W14

VSS_NCTF55

Y14

VSS_NCTF54

AA14

VSS_NCTF53

AB14

VSS_NCTF52

L15

VSS_NCTF51

M15

VSS_NCTF50

N15

VSS_NCTF49

P15

VSS_NCTF48

R15

VSS_NCTF47

T15

VSS_NCTF46

U15

VSS_NCTF45

V15

VSS_NCTF44

W15

VSS_NCTF43

Y15

VSS_NCTF42

AA15

VSS_NCTF41

AB15

VSS_NCTF40

L16

VSS_NCTF39

M16

VSS_NCTF38

N16

VSS_NCTF37

P16

VSS_NCTF36

R16

VSS_NCTF35

T16

VSS_NCTF34

U16

VSS_NCTF33

V16

VSS_NCTF32

W16

VSS_NCTF31

Y16

VSS_NCTF30

AA16

VSS_NCTF29

AB16

VSS_NCTF28

R17

VSS_NCTF27

Y17

VSS_NCTF26

AA17

VSS_NCTF25

AB17

VSS_NCTF24

AA18

VSS_NCTF23

AB18

VSS_NCTF22

AA19

VSS_NCTF21

AB19

VSS_NCTF20

AA20

VSS_NCTF19

AB20

VSS_NCTF18

R21

VSS_NCTF17

Y21

VSS_NCTF16

AA21

VSS_NCTF15

AB21

VSS_NCTF14

Y22

VSS_NCTF13

AA22

VSS_NCTF12

AB22

VSS_NCTF11

Y23

VSS_NCTF10

AA23

VSS_NCTF9

AB23

VSS_NCTF8

Y24

VSS_NCTF7

AA24

VSS_NCTF6

AB24

VSS_NCTF5

Y25

VSS_NCTF4

AA25

VSS_NCTF3

AB25

VSS_NCTF2

Y26

VSS_NCTF1

AA26

VSS_NCTF0

AB26

VCC_NCTF10

V25

VCC_NCTF9

W25

VCC_NCTF8

L26

VCC_NCTF7

M26

VCC_NCTF6

N26

VCC_NCTF5

P26

VCC_NCTF4

R26

VCC_NCTF3

T26

VCC_NCTF2

U26

VCC_NCTF1

V26

VCC_NCTF0

W26

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

REN_DIODE_P

+3VSUS_R

REN_DIODE_NTHERMATRIP1#

THERMATRIP2#

THERMATRIP_VGA#

THERMATRIP1#

THERMATRIP2#

FAN2_5V

FAN2_VFB FAN2_ON

FAN2VREF

FAN1_ON

FAN1_VFB

FAN1_VOUT

FAN1VREF

+3VSUS

+RTC_CELL

+3VSUS

+3VALW

+5VSUS

+5VSUS

+3VSUS

+3VSUS

+VCCP

+VCCP

+3VRUN

+15V

+5VRUN

+15V

+3VRUN

+5VRUN

DAT_SMB<35,36> CLK_SMB<35,36>

H_THERMDA<7>

H_THERMDC<7>

SUSPWROK<22,39>

ICH_PWRGD#<39>

POWER_SW#<35,37>

ATF_INT# <34>

THERMTRIP_SIO <35>

THERM_STP# <44>

INTRUDER# <21>

5V_CAL_SIO# <34>

THERMATRIP_VGA#<18>

THERMTRIP_MCH#<10>

H_THERMTRIP#<7>

FAN2_PWM<35>

FAN2_TACH <35>

FAN1_TACH <35>

FAN1_PWM<35>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Thermal sensor and Fan

15 50, 12, 2004

Compal Electronics, Inc.

1

E 3

2222 SYMBOL(SOT23-NEW)

2

C

B

DELL CONFIDENTIAL/PROPRIETARY

Trace width = 10mil

FAN1

FAN1 Control and Tachometer

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

FAN2

FAN2 Control and Tachometer

R418

12.1K_0603_1%~D

12

R475

10KB_0603_1%_TSM1A103F34D3R~D

12

R96

150K_0402_5%~D

1 2

C505

2200P_0402_50V7K~D

1

2

U4A

LM358M_SO8~D

P8

IN+

3

IN-

2

G

4

O1

C559

0.47U_0603_16V7K~D

1

2

R57

10K_0402_5%~D

12

D18

RB751V_SOD323~D

2 1

C74

2200P_0402_50V7K~D@

1 2

U4B

LM358M_SO8~D

P8

IN+

5

IN-

6

G

4

O7

C64

1000P_0402_50V7K~D

@

1

2

R451

100K_0402_5%~D

12

C560

1000P_0402_50V7K~D

@

1

2

C508

0.1U_0402_16V4Z~D

1

2

R104

100K_0402_5%~D

1 2

S

G

DQ7

SI3456DV-T1_TSOP6~D

3

6

2

4 5

1

C583

2200P_0402_50V7K~D@

1 2

G

D

S

Q46

2N7002_SOT23~D 2

13

R483

150K_0402_5%~D

1 2

C75

1U_0603_10V4Z~D

1

2

R430 8.2K_0402_5%~D

1 2

R452

1K_0402_5%~D

1 2

R428

49.9_0603_1%~D

1 2

R433 1K_0402_5%~D

1 2

E

B

C

Q37

MMBT3904_SOT23~D

1

2

3

S

G

DQ47

SI3456DV-T1_TSOP6~D

3

6

2

4 5

1

C478

2200P_0402_50V7K~D

1

2

U25

EMC6N300_SSOP24~D

THDAT_SMB

1

THCLK_SMB

2

SMBADDRSEL

13

REM_DIODE2_P

18

REM_DIODE2_N

17

+3VSUS

4

VSUS_PWRGD

11

+RTC_PWR3V

10

+3V_PWROK

5

POWER_SW

21

THERMTRIP1

6

THERMTRIP2

7

THERMTRIP3

8

VSET

22

HW_LOCK

14

VSS

3

ATF_INT 9

VCP 23

RESSERVED 16

REM_DIODE1_N 19

REM_DIODE1_P 20

THERMTRIP_SIO 15

THERM_STP 24

INTRUDER 12

+

C257

47U_D_16VM_R70~D

1

2

C406

0.1U_0402_16V4Z~D

1

2

C489

2200P_0402_50V7K~D

1

2

JFAN2

E&T_3801-03-1~D

1

2

3

R386

8.2K_0402_5%~D

12

C496

0.1U_0402_16V4Z~D

1

2

C503

2200P_0402_50V7K~D

1

2

E

B

C

Q8

MMBT3904_SOT23~D

1

2

3

R111

100K_0402_5%~D

1 2

C95

0.1U_0402_16V4Z~D

1

2

JFAN1

E&T_3801-03-1~D

1

2

3

R444 1K_0402_5%~D

1 2

C84

1U_0603_10V4Z~D

1

2

R476

10K_0402_5%~D

12

R450

10K_0402_5%~D

12

C483

0.1U_0402_16V4Z~D

1

2

R481

100K_0402_5%~D

12

C51

0.1U_0603_25V7K~D

1

2

+

C65

47U_D_16VM_R70~D

1

2

R388

2.2K_0402_5%~D

1 2

D5

RB751V_SOD323~D

2 1

R424

2.21K_0603_1%~D

12

R453 1K_0402_5%~D

1 2

R421

30.1K_0603_1%~D

12

R120

2.2K_0402_5%~D

1 2

R124

8.2K_0402_5%~D

12

E

B

C

Q40

MMBT3904_SOT23~D

1

2

3

R82

100K_0402_5%~D

12

C54

0.47U_0603_16V7K~D

1

2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_CS3_DIMMB#

M_CLK_DDR3

M_CLK_DDR4

M_CLK_DDR#3

M_CLK_DDR#4

DDR_B_DM0

DDR_CKE3_DIMMB

DDR_CS2_DIMMB#

CK_SCLK

CK_SDATA

DDR_CKE2_DIMMB

DDR_B_CAS#

DDR_B_DM5

DDR_B_DM7

DDR_B_DQS#0

DDR_B_BS#2

DDR_B_DQS#1

DDR_B_DQS#2

DDR_B_DQS#4

DDR_B_DQS#6

DDR_B_MA1

DDR_B_MA10

DDR_B_MA3

DDR_B_MA9

DDR_B_MA12

DDR_B_MA5

DDR_B_WE#

DDR_B_D8

DDR_B_D3

DDR_B_D9

DDR_B_D1

DDR_B_D0

DDR_B_D2

DDR_B_D10

DDR_B_D25

DDR_B_D17

DDR_B_D19

DDR_B_D16

DDR_B_D18

DDR_B_D11

DDR_B_D24

DDR_B_D27

DDR_B_D40

DDR_B_D26

DDR_B_D35

DDR_B_D33

DDR_B_D34

DDR_B_D32

DDR_B_D56

DDR_B_D43

DDR_B_D42

DDR_B_D50

DDR_B_D49

DDR_B_D51

DDR_B_D48

DDR_B_D41

DDR_B_D59

DDR_B_D58

DDR_B_DQS1

DDR_B_DQS0

DDR_B_DQS2

DDR_B_DM3

DDR_B_D57

DDR_B_DQS4

DDR_B_DQS6

DDR_B_MA8

DDR_B_BS#0

DDR_B_MA11

DDR_B_MA2

DDR_B_MA0

DDR_B_MA4

DDR_B_MA6

DDR_B_D6

DDR_B_BS#1

DDR_B_RAS#

DDR_B_D4

DDR_B_D7

DDR_B_D5

DDR_B_D15

DDR_B_D20

DDR_B_D12

DDR_B_D13

DDR_B_D14

DDR_B_D21

DDR_B_D22

DDR_B_D29

DDR_B_D30

DDR_B_D31

DDR_B_D23

DDR_B_D37

DDR_B_D36

DDR_B_D28

DDR_B_D38

DDR_B_D39

DDR_B_D46

DDR_B_D44

DDR_B_D47

DDR_B_D52

DDR_B_D45

DDR_B_D53

DDR_B_D54

DDR_B_D60

DDR_B_D63

DDR_B_D61

DDR_B_D62

DDR_B_D55

DDR_B_DM6

DDR_B_DM4

DDR_B_DQS3

DDR_B_DQS#3

DDR_B_DQS#5

DDR_B_DQS#7

DDR_B_MA7

DDR_B_DM1

DDR_B_DM2

DDR_B_DQS7

DDR_B_MA13

DDR_B_DQS5

DDR_B_MA1

DDR_B_BS#0

DDR_B_CAS#

DDR_B_MA0

DDR_B_RAS#

DDR_B_MA3

DDR_B_MA10

DDR_B_BS#2

DDR_CS2_DIMMB#

DDR_B_BS#1

DDR_CKE2_DIMMB

DDR_CKE3_DIMMB

DDR_B_MA4

DDR_B_MA7

DDR_B_MA9

DDR_B_MA2

DDR_B_MA11

DDR_B_MA5

DDR_B_MA12

DDR_B_MA6

DDR_B_MA8

M_ODT3

DDR_CS3_DIMMB#

M_ODT2

M_ODT3

M_ODT2

DDR_B_MA13

DDR_B_WE#

M_CLK_DDR3

M_CLK_DDR#3

M_CLK_DDR4

M_CLK_DDR#4

V_DDR_MCH_REF

+1.8VSUS +1.8VSUS

+0.9V_DDR_VTT

+3VRUN

+0.9V_DDR_VTT

+1.8VSUS

+3VRUN

DDR_CS3_DIMMB#<10>

M_CLK_DDR3 <10>

M_CLK_DDR4 <10>

M_CLK_DDR#3 <10>

M_CLK_DDR#4 <10>

V_DDR_MCH_REF <10,17,45>

CK_SDATA<6,17>

DDR_CKE3_DIMMB <10>

CK_SCLK<6,17>

DDR_CS2_DIMMB# <10>

DDR_CKE2_DIMMB<10>

DDR_B_D[0..63]<11>

DDR_B_DQS[0..7]<11>

DDR_B_MA[0..13]<11>

DDR_B_DM[0..7]<11>

DDR_B_DQS#[0..7]<11>

M_ODT3<10>

M_ODT2 <10>

DDR_B_RAS# <11>

DDR_B_WE#<11>

DDR_B_BS#1 <11>

DDR_B_BS#0<11>

DDR_B_CAS#<11>

DDR_B_BS#2<11>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

DDRII-SODIMM SLOT1

16 50, 12, 2004

Compal Electronics, Inc.

Layout Note:

Place these resistor

closely JDIM1,all

trace length<750 mil

Layout Note:

Place these resistor

closely JDIM1,all

trace length

Max=1.3"

Layout Note:

Place near JDIM1

Layout Note:

Place one cap close to every 2 pullup

resistors terminated to +0.9V_DDR_VTT

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

STANDARD

DIMMA

RN12

56_0404_4P2R_5%~D

1 4

2 3

C577

0.1U_0402_16V4Z~D

1

2

C292

2.2U_0805_10V6K~D

1

2

C294

0.1U_0402_16V4Z~D

1

2

RN27

56_0404_4P2R_5%~D

14 23

RN13

56_0404_4P2R_5%~D

14 23

C581

0.1U_0402_16V4Z~D

1

2

RN22

56_0404_4P2R_5%~D

14 23

RN26

56_0404_4P2R_5%~D

1 4

2 3

C582

0.1U_0402_16V4Z~D

1

2

C580

0.1U_0402_16V4Z~D

1

2

R272

10K_0402_5%~D

12

C301

0.1U_0402_16V4Z~D

1

2

C308

2.2U_0805_10V6K~D

1

2

C299

0.1U_0402_16V4Z~D

1

2

C318

0.1U_0402_16V4Z~D

1

2

C287

10P_0402_50V8J~D

@

1

2

RN23

56_0404_4P2R_5%~D

14 23

RN11

56_0404_4P2R_5%~D

1 4

2 3

C320

0.1U_0402_16V4Z~D

1

2

RN25

56_0404_4P2R_5%~D

1 4

2 3

C319

0.1U_0402_16V4Z~D

1

2

C293

0.1U_0402_16V4Z~D

1

2

R271

10K_0402_5%~D

1 2

C300

0.1U_0402_16V4Z~D

1

2

C578

0.1U_0402_16V4Z~D

1

2

C297

0.1U_0402_16V4Z~D

1

2

C289

10P_0402_50V8J~D

@

1

2

C310

2.2U_0805_10V6K~D

1

2

RN15

56_0404_4P2R_5%~D

14 23

RN14

56_0404_4P2R_5%~D

14 23

RN10

56_0404_4P2R_5%~D

1 4

2 3

C312

2.2U_0805_10V6K~D

1

2

C313

2.2U_0805_10V6K~D

1

2

C317

0.1U_0402_16V4Z~D

1

2

C311

2.2U_0805_10V6K~D

1

2

JDIM1

FOX_AS0A426-M2S-TR~D

VREF

1

VSS

3

DQ0

5

DQ1

7

VSS

9

DQS0#

11

DQS0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

VSS 2

DQ4 4

DQ5 6

VSS 8

DM0 10

VSS 12

DQ6 14

DQ7 16

VSS 18

DQ12 20

DQ13 22

VSS 24

DM1 26

VSS 28

CK0 30

CK0# 32

VSS 34

DQ14 36

DQ15 38

VSS 40

VSS

41

DQ16

43

DQ17

45

VSS

47

DQS2#

49

DQS2

51

VSS

53

DQ18

55

DQ19

57

VSS

59

DQ24

61

DQ25

63

VSS

65

DM3

67

NC

69

VSS

71

DQ26

73

DQ27

75

VSS

77

CKE0

79

VDD

81

NC

83

BA2

85

VDD

87

A12

89

A9

91

A8

93

VDD

95

A5

97

A3

99

A1

101

VDD

103

A10/AP

105

BA0

107

WE#

109

VDD

111

CAS#

113

NC/S1#

115

VDD

117

NC/ODT1

119

VSS

121

DQ32

123

DQ33

125

VSS

127

DQS4#

129

DQS4

131

VSS

133

DQ34

135

DQ35

137

VSS

139

DQ40

141

DQ41

143

VSS

145

DM5

147

VSS

149

DQ42

151

DQ43

153

VSS

155

DQ48

157

DQ49

159

VSS

161

NC,TEST

163

VSS

165

DQS6#

167

DQS6

169

VSS

171

DQ50

173

DQ51

175

VSS

177

DQ56

179

DQ57

181

VSS

183

DM7

185

VSS

187

DQ58

189

DQ59

191

VSS

193

SDA

195

SCL

197

VDDSPD

199

VSS 42

DQ20 44

DQ21 46

VSS 48

NC 50

DM2 52

VSS 54

DQ22 56

DQ23 58

VSS 60

DQ28 62

DQ29 64

VSS 66

DQS3# 68

DQS3 70

VSS 72

DQ30 74

DQ31 76

VSS 78

NC/CKE1 80

VDD 82

NC/A15 84

NC/A14 86

VDD 88

A11 90

A7 92

A6 94

VDD 96

A4 98

A2 100

A0 102

VDD 104

BA1 106

RAS# 108

S0# 110

VDD 112

ODT0 114

NC/A13 116

VDD 118

NC 120

VSS 122

DQ36 124

DQ37 126

VSS 128

DM4 130

VSS 132

DQ38 134

DQ39 136

VSS 138

DQ44 140

DQ45 142

VSS 144

DQS5# 146

DQS5 148

VSS 150

DQ46 152

DQ47 154

VSS 156

DQ52 158

DQ53 160

VSS 162

CK1 164

CK1# 166

VSS 168

DM6 170

VSS 172

DQ54 174

DQ55 176

VSS 178

DQ60 180

DQ61 182

VSS 184

DQS7# 186

DQS7 188

VSS 190

DQ62 192

DQ63 194

VSS 196

SAO 198

SA1 200

C302

0.1U_0402_16V4Z~D

1

2

C296

0.1U_0402_16V4Z~D

1

2

RN9

56_0404_4P2R_5%~D

1 4

2 3

C291

2.2U_0805_10V6K~D

1

2

RN24

56_0404_4P2R_5%~D

14 23

C298

0.1U_0402_16V4Z~D

1

2

C579

0.1U_0402_16V4Z~D

1

2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_MA11

V_DDR_MCH_REF

DDR_CKE1_DIMMA

M_CLK_DDR0

M_CLK_DDR1

M_CLK_DDR#0

M_CLK_DDR#1

DDR_CKE1_DIMMA

DDR_CS0_DIMMA#

CK_SCLK

DDR_A_MA1

DDR_A_MA10

DDR_A_MA3

DDR_A_MA9 DDR_A_MA7

DDR_A_MA12

DDR_A_MA5

DDR_A_WE#

DDR_A_D8

DDR_A_D3

DDR_A_D9

DDR_A_D1

DDR_A_D0

DDR_A_D2

DDR_A_D10

DDR_A_D25

DDR_A_D17

DDR_A_D19

DDR_A_D16

DDR_A_D18

DDR_A_D11

DDR_A_D24

DDR_A_D40

DDR_A_D27

DDR_A_D35

DDR_A_D33

DDR_A_D34

DDR_A_D26

DDR_A_D32

DDR_A_D56

DDR_A_D43

DDR_A_D42

DDR_A_D50

DDR_A_D49

DDR_A_D51

DDR_A_D48

DDR_A_D41

DDR_A_D59

DDR_A_D58

DDR_A_D57

DDR_A_DQS1

DDR_A_DQS0

DDR_A_DQS2

DDR_A_DM3

DDR_A_DM1

DDR_A_DM2

DDR_A_DQS4

DDR_A_DQS6

DDR_A_DQS7

CK_SDATA

DDR_CKE0_DIMMA

DDR_A_MA8

DDR_CS1_DIMMA#

DDR_A_MA11

DDR_A_MA2

DDR_A_MA0

DDR_A_MA4

DDR_A_MA6

DDR_A_CAS#

DDR_A_BS#1

DDR_A_RAS#

DDR_A_D6

DDR_A_D4

DDR_A_D7

DDR_A_D5

DDR_A_D15

DDR_A_D20

DDR_A_D14

DDR_A_D21

DDR_A_D22

DDR_A_D12

DDR_A_D13

DDR_A_D29

DDR_A_D30

DDR_A_D31

DDR_A_D37

DDR_A_D36

DDR_A_D23

DDR_A_D38

DDR_A_D28

DDR_A_D39

DDR_A_D46

DDR_A_D44

DDR_A_D54

DDR_A_D53

DDR_A_D47

DDR_A_D52

DDR_A_D45

DDR_A_D60

DDR_A_D63

DDR_A_D61

DDR_A_D62

DDR_A_D55

DDR_A_DM6

DDR_A_DM4

DDR_A_DM5

DDR_A_DM7

DDR_A_DM0

DDR_A_MA13

DDR_A_DQS5

DDR_A_BS#0

DDR_A_BS#2

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#2

DDR_A_DQS3

DDR_A_DQS#3

DDR_A_DQS#4

DDR_A_DQS#5

DDR_A_DQS#6

DDR_A_DQS#7

DDR_A_MA0

DDR_A_MA4

DDR_A_BS#2

DDR_A_BS#1

DDR_A_MA6

DDR_A_MA9

DDR_CKE0_DIMMA

DDR_A_MA2

DDR_A_MA12

DDR_A_MA5

DDR_A_MA1

DDR_A_CAS#

DDR_A_RAS#

DDR_A_BS#0

DDR_A_MA8

DDR_A_MA3

DDR_A_MA10

DDR_CS0_DIMMA#

M_ODT1

DDR_CS1_DIMMA#

M_ODT0

M_ODT1

DDR_A_WE#

M_ODT0

DDR_A_MA13

DDR_A_MA7

M_CLK_DDR0

M_CLK_DDR#0

M_CLK_DDR1

M_CLK_DDR#1

+1.8VSUS +1.8VSUS

+0.9V_DDR_VTT

+3VRUN

+0.9V_DDR_VTT

+1.8VSUS

DDR_A_D[0..63]<11>

DDR_A_DQS[0..7]<11>

DDR_A_MA[0..13]<11>

DDR_A_DM[0..7]<11>

M_CLK_DDR0 <10>

M_CLK_DDR#0 <10>

CK_SDATA<6,16>

DDR_CKE1_DIMMA <10>

DDR_CS0_DIMMA# <10>

CK_SCLK<6,16>

DDR_CKE0_DIMMA<10>

DDR_CS1_DIMMA#<10>

DDR_A_DQS#[0..7]<11>

M_ODT0 <10>

M_ODT1<10>

DDR_A_WE#<11>

DDR_A_CAS#<11>

DDR_A_BS#0<11>

DDR_A_BS#2<11>

V_DDR_MCH_REF <10,16,45>

DDR_A_RAS# <11>

DDR_A_BS#1 <11>

M_CLK_DDR#1 <10>

M_CLK_DDR1 <10>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

DDRII-SODIMM SLOT2

17 50, 12, 2004

Compal Electronics, Inc.

Layout Note:

Place these resistor

closely JDIM2,all

trace length Max=1.3"

Layout Note:

Place near JDIM2

Layout Note:

Place one cap close to every 2 pullup

resistors terminated to +0.9V_DDR_VTT

Layout Note:

Place these resistor

closely JDIM2,all

trace length<750 mil

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DIMMB

REVERSE

C605

0.1U_0402_16V4Z~D

1

2

C329

10P_0402_50V8J~D

@

1

2

C324

2.2U_0805_10V6K~D

1

2

C323

0.1U_0402_16V4Z~D

1

2

RN21

56_0404_4P2R_5%~D

14 23

C342

0.1U_0402_16V4Z~D

1

2

C603

0.1U_0402_16V4Z~D

1

2

RN33

56_0404_4P2R_5%~D

1 4

2 3

RN35

56_0404_4P2R_5%~D

1 4

2 3

RN32

56_0404_4P2R_5%~D

1 4

2 3

C325

2.2U_0805_10V6K~D

1

2C328

10P_0402_50V8J~D

@

1

2

C343

0.1U_0402_16V4Z~D

1

2

C607

0.1U_0402_16V4Z~D

1

2

C326

2.2U_0805_10V6K~D

1

2

C337

0.1U_0402_16V4Z~D

1

2

C336

0.1U_0402_16V4Z~D

1

2

R286

10K_0402_5%~D

1 2

C341

2.2U_0805_10V6K~D

1

2

C604

0.1U_0402_16V4Z~D

1

2

C335

0.1U_0402_16V4Z~D

1

2

C340

2.2U_0805_10V6K~D

1

2

RN36

56_0404_4P2R_5%~D

1 4

2 3

R282

10K_0402_5%~D

12

C346

2.2U_0805_10V6K~D

1

2

RN20

56_0404_4P2R_5%~D

14 23

RN31

56_0404_4P2R_5%~D

14 23

RN18

56_0404_4P2R_5%~D

14 23

RN16

56_0404_4P2R_5%~D

14 23

C332

0.1U_0402_16V4Z~D

1

2

RN34

56_0404_4P2R_5%~D

1 4

2 3

RN19

56_0404_4P2R_5%~D

14 23

JDIM2

FOX_AS0A426-M2R-TR~D

VREF

1

VSS

3

DQ0

5

DQ1

7

VSS

9

DQS0#

11

DQS0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

VSS

41

DQ16

43

DQ17

45

VSS

47

DQS2#

49

DQS2

51

VSS

53

DQ18

55

DQ19

57

VSS

59

DQ24

61

DQ25

63

VSS

65

DM3

67

NC

69

VSS

71

DQ26

73

DQ27

75

VSS

77

CKE0

79

VDD

81

NC

83

BA2

85

VDD

87

A12

89

A9

91

A8

93

VDD

95

A5

97

A3

99

A1

101

VDD

103

A10/AP

105

BA0

107

WE#

109

VDD

111

CAS#

113

NC/S1#

115

VDD

117

NC/ODT1

119

VSS

121

DQ32

123

DQ33

125

VSS

127

DQS4#

129

DQS4

131

VSS

133

DQ34

135

DQ35

137

VSS

139

DQ40

141

DQ41

143

VSS

145

DM5

147

VSS

149

DQ42

151

DQ43

153

VSS

155

DQ48

157

DQ49

159

VSS

161

NC,TEST

163

VSS

165

DQS6#

167

DQS6

169

VSS

171

DQ50

173

DQ51

175

VSS

177

DQ56

179

DQ57

181

VSS

183

DM7

185

VSS

187

DQ58

189

DQ59

191

VSS

193

SDA

195

SCL

197

VDDSPD

199

VSS 2

DQ4 4

DQ5 6

VSS 8

DM0 10

VSS 12

DQ6 14

DQ7 16

VSS 18

DQ12 20

DQ13 22

VSS 24

DM1 26

VSS 28

CK0 30

CK0# 32

VSS 34

DQ14 36

DQ15 38

VSS 40

VSS 42

DQ20 44

DQ21 46

VSS 48

NC 50

DM2 52

VSS 54

DQ22 56

DQ23 58

VSS 60

DQ28 62

DQ29 64

VSS 66

DQS3# 68

DQS3 70

VSS 72

DQ30 74

DQ31 76

VSS 78

NC/CKE1 80

VDD 82

NC/A15 84

NC/A14 86

VDD 88

A11 90

A7 92

A6 94

VDD 96

A4 98

A2 100

A0 102

VDD 104

BA1 106

RAS# 108

S0# 110

VDD 112

ODT0 114

NC/A13 116

VDD 118

NC 120

VSS 122

DQ36 124

DQ37 126

VSS 128

DM4 130

VSS 132

DQ38 134

DQ39 136

VSS 138

DQ44 140

DQ45 142

VSS 144

DQS5# 146

DQS5 148

VSS 150

DQ46 152

DQ47 154

VSS 156

DQ52 158

DQ53 160

VSS 162

CK1 164

CK1# 166

VSS 168

DM6 170

VSS 172

DQ54 174

DQ55 176

VSS 178

DQ60 180

DQ61 182

VSS 184

DQS7# 186

DQS7 188

VSS 190

DQ62 192

DQ63 194

VSS 196

SAO 198

SA1 200

C602

0.1U_0402_16V4Z~D

1

2

C608

0.1U_0402_16V4Z~D

1

2

C334

0.1U_0402_16V4Z~D

1

2

RN30

56_0404_4P2R_5%~D

14 23

C606

0.1U_0402_16V4Z~D

1

2

RN17

56_0404_4P2R_5%~D

1 4

2 3

C330

0.1U_0402_16V4Z~D

1

2

C331

0.1U_0402_16V4Z~D

1

2

C344

0.1U_0402_16V4Z~D

1

2

C345

2.2U_0805_10V6K~D

1

2

C333

0.1U_0402_16V4Z~D

1

2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PEG_PWRON# GPWR_SRC_ON

PEG_TXN2

PEG_A_TXN_4

PEG_RXP14

PEG_A_TXP_5

PEG_TXP13

PEG_RXP6

TV_Y

DVI_TX0+

DVI_TX1-

PEG_A_TXN_0

PEG_RXP13

THERMATRIP_VGA#

PEG_TXP6

PEG_RXP5

PEG_A_TXN_9

PEG_RXP7

PEG_RXP5

PEG_RXP1

PEG_TXP5

PEG_A_TXN_8

PEG_A_TXP_6

VGA_GRN

PEG_RXP3

PEG_A_TXN_14PEG_TXN14

PEG_RXN[0..15]

PEG_RXN10

PEG_RXN9

PEG_RXN2

PEG_A_TXN_6

PEG_A_TXN_15 PEG_RXP7

PEG_RXP11

PEG_RXN2

PEG_RXN10

TV_C

PEG_TXN13

PEG_RXP10

PEG_RXP4

PEG_TXN6

PEG_A_TXP_4

PEG_A_TXN_3

PEG_TXN1

PEG_RXN14

PEG_A_TXP_1

PEG_A_TXP_9PEG_TXP9

PEG_A_TXN_1

CLK_PCIE_VGA

PEG_A_TXP_13

PEG_A_TXP_0

PEG_TXN8

PEG_RXP2

VGA_BLU

PEG_RXN0

PEG_RXN8

PEG_A_TXP_8

PEG_RXN8

PEG_RXN5

PEG_RXN4

DVI_SCLK_L

PEG_RXP8

PEG_RXN1

PEG_RXN5

PEG_RXN11

RUNPWROK

DVI_TX2-

PEG_A_TXP_12

DVI_CLK-

PEG_TXP3

PEG_RXP11

PEG_RXP8

PEG_RXP3

PEG_RXN0

PEG_TXN12

PEG_TXN10

DVI_SDAT_L

VGA_RED

PEG_TXN9

PEG_A_TXN_7

PEG_A_TXP_3

PEG_TXN4

PEG_A_TXN_5

PEG_RXP0

PEG_TXN15

PEG_TXP7

PLTRST_VGA#

PEG_TXP0

PEG_RXN13

PEG_RXN15

SMBDAT_VGA

PEG_TXN11

PEG_RXP0

PEG_RXN12

SMBCLK_VGA

PEG_A_TXN_13

PEG_TXP12

DVI_CLK+

PEG_A_TXN_11

PEG_RXN12

PEG_TXP10

VDDM

GC_BL_SUSPEND

DAT_DDC2

PEG_RXP9

PEG_RXP15

PEG_A_TXP_2

PEG_TXP8

PEG_A_TXN_2

PEG_RXN13

PEG_RXN7

PEG_RXN1

PEG_RXP13

HSYNC

PEG_RXN6

PEG_RXN14

PEG_TXN0

PEG_RXP[0..15]

PEG_RXN15

PEG_RXP9

PEG_RXN6

CLK_PCIE_VGA#

PEG_TXN3

PEG_A_TXP_15PEG_TXP15

PEG_RXN9

TV_CVBS

PEG_TXP1

DVI_TX2+

PEG_TXN5

PEG_RXN3

PEG_RXP2

PEG_A_TXN_10

PEG_RXP4

PEG_RXP12

PEG_TXP2

PEG_A_TXP_11PEG_TXP11

PEG_RXP15

PEG_A_TXP_14

PEG_A_TXP_10

PEG_A_TXN_12

PEG_TXP4

CLK_DDC2

PEG_RXP14

PEG_RXN4

PEG_RXN7

PEG_TXN7

PEG_TXP14

PEG_RXP12

PEG_RXN11

PEG_RXP6PEG_A_TXP_7

PEG_RXP1

PEG_RXP10

VSYNC

PEG_RXN3

DVI_TX0-

DVI_TX1+

ICH_PCIE_WAKE#

PEG_TXN[0..15]

PEG_TXN1

PEG_TXN13

PEG_TXN10

PEG_TXN2

PEG_TXN7

PEG_TXN0

PEG_TXN6

PEG_TXN5

PEG_TXN11

PEG_TXN12

PEG_TXN15

PEG_TXN3

PEG_TXN9

PEG_TXN8

PEG_TXN14

PEG_TXN4

PEG_TXP5

PEG_TXP1

PEG_TXP0

PEG_TXP6

PEG_TXP2

PEG_TXP4

PEG_TXP8

PEG_TXP7

PEG_TXP3

PEG_TXP9

PEG_TXP13

PEG_TXP10

PEG_TXP12

PEG_TXP11

PEG_TXP14

PEG_TXP15

PEG_TXP[0..15]

DVI_SCLK_L

DVI_SDAT_L

DVI_DETECT

DVI_TX2+

DVI_SCLK

DVI_TX1-

DVI_TX0+

DVI_DETECT

DVI_SDAT

DVI_TX1+

DVI_CLK-

DVI_TX2-

DVI_SDAT

DVI_SCLK

DVI_TX0-

DVI_CLK+

PWR_SRC G_PWR_SRC

+5VALW

+15V

+1.5VRUN

G_PWR_SRC

+5VRUN

+3VRUN

+1.8VSUS

+2.5VRUN

+3VSUS

+5VRUN

+5VRUN

+5VRUN

+3VRUN

RUN_ON<34,38,39,42,44,45>

VGA_RED <19>

PLTRST_VGA# <20>

SMBDAT_VGA <35>

VSYNC <19>

VGA_GRN <19>

CLK_PCIE_VGA# <6>

SMBCLK_VGA <35>

TV_CVBS <19>

CLK_PCIE_VGA <6>

CLK_DDC2 <19>

GC_BL_SUSPEND <34>

RUNPWROK<35,39,43,46>

PEG_RXP[0..15] <12>

TV_C <19>

DAT_DDC2 <19>

THERMATRIP_VGA# <15>

VGA_BLU <19>

TV_Y <19>

PEG_RXN[0..15] <12>

HSYNC <19>

ICH_PCIE_WAKE# <22,34>

PEG_TXP[0..15]<12>

PEG_TXN[0..15]<12>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

VGA and DVI connector

18 50, 12, 2004

Compal Electronics, Inc.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R547

5.6K_0402_5%~D

12

R548

1K_0402_5%~D

12

C183 0.1U_0402_16V4Z~D

1 2

C518

0.1U_0603_25V7K~D

1

2

C647

10U_1210_25V6K~D

@

1

2

C125 0.1U_0402_16V4Z~D

1 2

C140 0.1U_0402_16V4Z~D

1 2

C174 0.1U_0402_16V4Z~D

1 2

C154 0.1U_0402_16V4Z~D

1 2

C512

0.1U_0603_25V7K~D

1

2

C66

220P_0402_50V7K~D

1

2

C185 0.1U_0402_16V4Z~D

1 2

C18

10U_0805_10V4M~D

1

2

C169 0.1U_0402_16V4Z~D

1 2

R462

100K_0402_5%~D

12

JVID

JAE_WB3M200VD1~D

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

61

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

79

81

81

83

83

85

85

87

87

89

89

91

91

93

93

95

95

97

97

99

99

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

125

125

127

127

129

129

131

131

133

133

135

135

137

137

139

139

141

141

143

143

145

145

147

147

149

149

151

151

153

153

155

155

157

157

159

159

161

161

163

163

165

165

167

167

169

169

171

171

173

173

175

175

177

177

179

179

181

181

183

183

185

185

187

187

189

189

191

191

193

193

195

195

197

197

199

199

201

201

22

44

66

88

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

42 42

44 44

46 46

48 48

50 50

52 52

54 54

56 56

58 58

60 60

62 62

64 64

66 66

68 68

70 70

72 72

74 74

76 76

78 78

80 80

82 82

84 84

86 86

88 88

90 90

92 92

94 94

96 96

98 98

100 100

102 102

104 104

106 106

108 108

110 110

112 112

114 114

116 116

118 118

120 120

122 122

124 124

126 126

128 128

130 130

132 132

134 134

136 136

138 138

140 140

142 142

144 144

146 146

148 148

150 150

152 152

154 154

156 156

158 158

160 160

162 162

164 164

166 166

168 168

170 170

172 172

174 174

176 176

178 178

180 180

182 182

184 184

186 186

188 188

190 190

192 192

194 194

196 196

198 198

200 200

202 202

203

203 204 204

205

205 206 206

C199 0.1U_0402_16V4Z~D

1 2

C151 0.1U_0402_16V4Z~D

1 2

C543

0.1U_0603_25V7K~D

1

2

C414

0.047U_0402_16V4Z~D

1

2

C141 0.1U_0402_16V4Z~D

1 2

C170 0.1U_0402_16V4Z~D

1 2

C142 0.1U_0402_16V4Z~D

1 2

C161 0.1U_0402_16V4Z~D

1 2

C175 0.1U_0402_16V4Z~D

1 2

C537

0.1U_0603_25V7K~D

1

2

C129 0.1U_0402_16V4Z~D

1 2

C123 0.1U_0402_16V4Z~D

1 2

C67

220P_0402_50V7K~D

1

2

C182 0.1U_0402_16V4Z~D

1 2

G

D

S

Q58

2N7002_SOT23~D

2

13

L86

BLM11A121S_0603~D

1 2

C187 0.1U_0402_16V4Z~D

1 2 C189 0.1U_0402_16V4Z~D

1 2

C409

0.047U_0402_16V4Z~D

1

2

R134

100K_0402_5%~D

1 2

G

D

S

Q44

2N7002_SOT23~D

2

13

C184 0.1U_0402_16V4Z~D

1 2

C149 0.1U_0402_16V4Z~D

1 2

C121 0.1U_0402_16V4Z~D

1 2

L87

BLM11A121S_0603~D

1 2

C150 0.1U_0402_16V4Z~D

1 2

D22

RB751V_SOD323~D

2 1

G

D

S

Q59

2N7002_SOT23~D

2

13

E

B

CQ57

MMBT3904_SOT23~D

2

3 1

C191 0.1U_0402_16V4Z~D

1 2

C145 0.1U_0402_16V4Z~D

1 2

C658

220P_0402_50V7K~D

1

2

L11

BLM31A260SPT_1206~D

12

R463

100K_0402_5%~D

1 2

C659

220P_0402_50V7K~D

1

2

C147 0.1U_0402_16V4Z~D

1 2

R545

10K_0402_5%~D

12

PJP11

PAD-OPEN 4x4m

1 2

C540

0.1U_0603_25V7K~D

1

2

Q42

SI4435DY_SO8~D

3 6

5

7

8

2

4

1

C143 0.1U_0402_16V4Z~D

1 2

C181 0.1U_0402_16V4Z~D

1 2

C17

0.1U_0402_16V4Z~D

1

2

C148 0.1U_0402_16V4Z~D

1 2

C162 0.1U_0402_16V4Z~D

1 2

C134 0.1U_0402_16V4Z~D

1 2

JDVI

JAE_DV2R029NDA

DATA2#

1

DATA2

2

SHIELD24

3

DATA4#

4

DATA4

5

DDCCLK

6

DDCDATA

7

DATA1#

9

DATA1

10

SHIELD13

11

DATA3#

12

CRT_VSYNC

8

CRT_R

C1

CRT_G

C2

G1

26

DATA3 13

VCC5 14

GND5 15

HPDET 16

DATA0# 17

DATA0 18

SHIELD5 19

DATA5# 20

DATA5 21

SHIELDCLK 22

CLK 23

CLK# 24

CRT_HSYNC C4

GND C5

G2 25

CRT_B C3

G3

27 G4 28

G5

29 G6 30

NC1

31 NC2 32

R546

5.6K_0402_5%~D

12

C417

0.047U_0402_16V4Z~D

1

2

C155 0.1U_0402_16V4Z~D

1 2

C535

0.1U_0603_25V7K~D

1

2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SPDIF

DAT_DDC2

BLUE

SP_DIFBSP_DIF

JVGA_HS

SPDIF_SHDN

VGA_BLU

VGA_RED

GREEN

JVGA_VS

RED

SVIDEO_Y

SP_DIF_E

SP_DIF_C

SVIDEO_C

SP_DIF_D

SVIDEO_CVBS

VGA_GRN

CLK_DDC2

M_ID2#

+5VRUN

+5VRUN

+3VRUN

+3VSUS

CRT_VCC

CRT_VCC

SPDIF_SHDN <25,34>

TV_Y<18>

VGA_RED<18>

VSYNC<18>

VGA_GRN<18>

CLK_DDC2<18>

TV_CVBS<18>

HSYNC<18>

VGA_BLU<18>

SPDIF<25>

DAT_DDC2<18>

TV_C<18>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

TV_OUT and CRT connector

19 50, 12, 2004

Compal Electronics, Inc.

A2

A1

K1

K2

DDA204U

Evaluate Package

CLOSE TO JSVID

Overlap R8,R1 & L6 for Pop Option

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R357

1K_0402_5%~D

@

12

C8

22P_0402_50V8J~D

@

1

2

JSVID

FOX_MH11777-WRUR6~D

2

4

6

3

5

1

9

8

7

D15

DA204U_SOT323~D

@

2

31

U1

SN74AHCT1G125DCKR_SC70-5~D

A

2Y4

P5

G

3

OE# 1

C2

10P_0402_50V8J~D

1

2

D16

DA204U_SOT323~D

@

2

31

C391

82P_0402_50V8J~D

@

1

2

D4

DA204U_SOT323~D

@

2

31

C392

33P_0402_50V8J~D

1

2

D3

DA204U_SOT323~D

@

2

31

L5

BLM18BB600SN1D_0603~D

1 2

R364

75_0402_5%~D

@

12

R5

75_0402_5%~D

@

12

C3

10P_0402_50V8J~D

1

2

R4

75_0402_5%~D

@

12

C393

33P_0402_50V8J~D

1

2

L71

BLM11A121S_0603~D

1 2

C11

0.01U_0402_16V7K~D

12

D1

RB751V_SOD323~D

21

L68

1.8UH_MDF1608A1R8K_10%_0603~D

1 2

R356

2.2K_0402_5%~D

1 2

R2

110_0603_1%~D

12

D14

DA204U_SOT323~D

@

2

31

D2

DA204U_SOT323~D

@

2

31

JVGA

FOX_DZ11A91-L8

6

11

1

7

12

2

8

13

3

9

14

4

10

15

5

18

19

R6

75_0402_5%~D

@

12

C6

10P_0402_50V8J~D

1

2

L4

BLM18BB600SN1D_0603~D

1 2

R358

1K_0402_5%~D

@

12

R3

2.2K_0402_5%~D

1 2

R7

220_0603_1%~D

12

L3

BLM18BB600SN1D_0603~D

1 2

R363

75_0402_5%~D

@

12

C10

22P_0402_50V8J~D

@

1

2

C4

0.01U_0402_16V7K~D

1

2

C384

82P_0402_50V8J~D

1

2

C5

0.1U_0402_16V4Z~D

1

2

L66

1.8UH_MDF1608A1R8K_10%_0603~D

1 2

C382

82P_0402_50V8J~D

1

2

R8

0_0805_5%~D

1 2

L67

1.8UH_MDF1608A1R8K_10%_0603~D

1 2

C1

300P_1808_3000V8K~D@

1

2

C385

22P_0402_50V8J~D

1

2

C383

82P_0402_50V8J~D

1

2

C386

22P_0402_50V8J~D

1

2

T18 PAD~D

C389

82P_0402_50V8J~D

@

1

2

R362

75_0402_5%~D

@

12

C9

22P_0402_50V8J~D

@

1

2

R1

0_0805_5%~D

12

C23

0.1U_0402_16V4Z~D

1

2

L6

TA08F010_4P~D@

1 8

4 5

C390

82P_0402_50V8J~D

@

1

2

L70

BLM11A121S_0603~D

1 2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CK_33M_ICHPCI

PCI_SERR#

PCI_DEVSEL#

PCI_PCIRST#

PCI_C_BE0#

PCIRSTB2#

CLK_ICH_TERM

PCI_REQ4#

PCI_PERR#

PCI_GNT1#

ICH_GPIO4_PIRQG#

PCI_PIRQB#

PCI_REQ5#

PCI_STOP#

PCI_C_BE1#

PCI_C_BE3#

ICH_GPIO3_PIRQF#

PCI_PIRQC#

PCI_REQ2#

ICH_GPIO2_PIRQE#

PCI_REQB#

PCI_FRAME#

PCI_REQ3#

PCI_PLOCK#

PCI_IRDY#

PCI_C_BE2#

PCI_REQ1#

PCI_REQ0#

PCI_PIRQD#

PCI_PIRQA#

PCI_PAR

PCI_GNT3#

PCI_TRDY#

ICH_GPIO5_PIRQH#

PLTRST# PCIRSTB1#

PLTRST#

CK_33M_ICHPCI

PCI_AD0

PCI_AD1

PCI_AD2

PCI_AD3

PCI_AD4

PCI_AD5

PCI_AD7

PCI_AD6

PCI_AD8

PCI_AD9

PCI_AD11

PCI_AD10

PCI_AD14

PCI_AD15

PCI_AD13

PCI_AD12

PCI_AD16

PCI_AD17

PCI_AD19

PCI_AD18

PCI_AD22

PCI_AD23

PCI_AD21

PCI_AD20

PCI_AD25

PCI_AD24

PCI_AD28

PCI_AD29

PCI_AD31

PCI_AD30

PCI_AD26

PCI_AD27ICH_GPIO4_PIRQG#

ICH_GPIO3_PIRQF#

ICH_GPIO2_PIRQE#

PCI_REQ0#

PCI_REQ1#

PCI_REQ3#

PCI_REQ4#

ICH_PME#

PCI_REQ2#

PCI_REQ5#

PCI_REQB#

PCI_GNT5#

PCI_GNT5#

PCI_PCIRST# PCIRSTB3#

PCI_GNT4#

PCI_PIRQB#

PCI_PIRQD#

PCI_PLOCK#

PCI_IRDY#

PCI_TRDY#

PCI_STOP#

PCI_FRAME#

COINCELL_R

PCI_DEVSEL#

PCI_PERR#

PCI_SERR#

PCI_PIRQC#

PCI_PIRQA#

ICH_GPIO5_PIRQH#

+3VRUN

+3VSUS

+3VRUN

+3VRUN

+3VRUN

+3VRUN

COINCELL

+3.3VX

+RTC_CELL

PCI_C_BE1# <29,31,33>

PCI_SERR# <29,31,33>

PCI_PAR <29,31,33>

PCI_IRDY# <29,31,33>

PCI_PERR# <29,31,33>

PCI_GNT1# <31>

PCI_PIRQC#<29,31>

PCI_C_BE3# <29,31,33>

PCI_FRAME#<29,31,33>

PCI_REQ1# <31>

PCI_C_BE2# <29,31,33>

PCI_DEVSEL# <29,31,33>

PCI_PIRQB#<31,33>

PCI_PIRQD#<31,33>

PCI_TRDY# <29,31,33>

PCI_GNT3# <33>

PCI_C_BE0# <29,31,33>

PCI_STOP# <29,31,33>

PCI_REQ3# <33>

PLTRST_LOM# <29>

PCI_AD[0..31]<29,31,33>

PLTRST# <22,24,37>

CK_33M_ICHPCI <6>

ICH_PME# <34>

PLTRST_SIO# <34>

PCIRST_CB# <31,33>

PCI_REQ4# <29>

PCI_GNT4# <29>

PLTRST_MCH# <10>

PLTRST_DELAY#<22,37> PLTRST_VGA# <18>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

ICH6(1/4)

20 50, 12, 2004

Compal Electronics, Inc.

Internal Pull-up.

Sample high destination is LPC.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R469

10_0402_5%~D

@

1 2

R470

0_0402_5%~D@

12

R4618.2K_0402_5%~D 1 2

RN4

8.2K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

R151

33_0402_5%~D

1 2

R4668.2K_0402_5%~D 1 2

R153

33_0402_5%~D

1 2

U13D

74VHC08MTC_TSSOP14~D

IN1

13

IN2

12 OUT 11

R4608.2K_0402_5%~D 1 2

C547

8.2P_0402_50V8J~D

@

1

2

R133

33_0402_5%~D

1 2

R4548.2K_0402_5%~D 1 2

R2518.2K_0402_5%~D 1 2 R4688.2K_0402_5%~D 1 2

U13A

74VHC08MTC_TSSOP14~D

IN1

1

IN2

2OUT 3

P14

G

7

U13C

74VHC08MTC_TSSOP14~D

IN1

10

IN2

9OUT 8

R4598.2K_0402_5%~D 1 2

R2558.2K_0402_5%~D 1 2

RN5

8.2K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

R152

33_0402_5%~D

1 2

C116

0.1U_0402_16V4Z~D

12

R2548.2K_0402_5%~D 1 2

U13B

74VHC08MTC_TSSOP14~D

IN1

4

IN2

5OUT 6

R154

33_0402_5%~D

1 2

R509

1K_0402_5%~D

12

RN6

8.2K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

R4808.2K_0402_5%~D 1 2

C596

1U_0603_10V4Z~D

1

2

D20

BAT54C_SOT23~D

2

3

1

Interrupt I/F

PCI

RESERVED

U16B

ICH6_BGA609~D

AD[0]

E2

AD[1]

E5

AD[2]

C2

AD[3]

F5

AD[4]

F3

AD[5]

E9

AD[6]

F2

AD[7]

D6

AD[8]

E6

AD[9]

D3

AD[10]

A2

AD[11]

D2

AD[12]

D5

AD[13]

H3

AD[14]

B4

AD[15]

J5

AD[16]

K2

AD[17]

K5

AD[18]

D4

AD[19]

L6

AD[20]

G3

AD[21]

H4

AD[22]

H2

AD[23]

H5

AD[24]

B3

AD[25]

M6

AD[26]

B2

AD[27]

K6

AD[28]

K3

AD[29]

A5

AD[30]

L1

AD[31]

K4

FRAME#

J3

REQ[0]# L5

GNT[0]# C1

REQ[1]# B5

GNT[1]# B6

REQ[2]# M5

GNT[2]# F1

REQ[3]# B8

GNT[3]# C8

REQ[4]#/GPI[40] F7

GNT[4]#/GPO[48] E7

REQ[5]#/GPI[1] E8

GNT[5]#/GPO[17] F6

REQ[6]#/GPI[0] B7

TRDY# J2

STOP# J1

PLTRST# R5

PCICLK G6

PME# P6

PIRQ[E]#/GPI[2] D9

PIRQ[F]#/GPI[3] C7

PIRQ[G]#GPI[4] C6

PIRQ[H]#/GPI[5] M3

GNT[6]#/GPO[16] D8

C/BE[0]# J6

C/BE[1]# H6

C/BE[2]# G4

C/BE[3]# G2

IRDY# A3

PAR E1

PCIRST# R2

DEVSEL# C3

PERR# E3

PLOCK# C5

SERR# G5

PIRQ[C]#

M1

SATA[1]TXP/RSVD[4]

AG4

PIRQ[A]#

N2

SATA[3]RXN/RSVD[5]

AC9

SATA[1]RXP/RSVD[2]

AD5

SATA[1]TXN/RSVD[3]

AF4

PIRQ[B]#

L2

PIRQ[D]#

L3

SATA[1]RXN/RSVD[1]

AC5

SATA[3]RXP/RSVD[6]

AD9

SATA[3]TXN/RSVD[7]

AF8

SATA[3]TXP/RSVD[8]

AG8

TP[3]/RSVD[9]

U3

R2538.2K_0402_5%~D 1 2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LPC_LFRAME#

ICH_RTCRST#

LPC_LDRQ0#

LPC_LDRQ1#

ICH_AC_SYNC_R

IDE_DD7

IDE_DD6

IDE_DIOR#

IDE_DD12

IDE_DCS1#

IDE_DD1

IDE_DD9

IDE_DD11

IDE_DD2

IDE_DD3

IDE_DD10

ICH_AC_SDIN1

IDE_DD4

IDE_DD8

IDE_DD14

ICH_AC_SDIN0

IDE_DIORDY

ICH_AC_SDOUT_R

IDE_DD0

IDE_DDACK#

ICH_AC_RST_R#

IDE_DD13

IDE_DIOW#

IDE_DD15

IDE_DD5

ICH_RTCX1

RDDREQIDE_DDREQ

LPC_LAD2

LPC_LAD1

LPC_LAD0

LPC_LAD3

IDE_DA1

IDE_DCS3#

IDE_DA2

IDE_DA0

SATA_TXP0_C

SATA_RXN0_C

SATA_RXP0_C

SATA_TXN0_C

ICH_RTCX2

CLK_PCIE_SATA#

CLK_PCIE_SATA

H_A20M#

H_INIT#

H_IGNNE#

H_INTR

H_NMI

H_SMI#

H_STPCLK#

H_CPUSLP#

H_DPSLP#

SIO_A20GATE

A20M#

IGNNE#

ICH4_INIT#

STPCLK#

SMI#

NMI

INTR

DPSLP#

CPUSLP#

H_PWRGOOD

THRMTRIP_ICH#

INTRUDER#

IDE_IRQ

SIO_RCIN#

H_DPRSLP#DPRSLP#

FERR#

ICH_AC_BITCLK_TERM

SATA_TXN0

SATA_TXP0SATA_TXP0_C

SATA_TXN0_C

INTRUDER#

ICH_AC_SYNC_R

ICH_AC_RST_R#

ICH_AC_SDOUT_R

H_FERR#

H_DPRSLP#

SATA_ACT#

+RTC_CELL

+VCCP

+RTC_CELL

+VCCP

ICH_SDOUT_MDC<27>

LPC_LDRQ0# <34>

LPC_LDRQ1# <34>

ICH_RST_MDC#<27>

ICH_SYNC_MDC<27>

IDE_DD[0..15] <24>

LPC_LFRAME# <34>

ICH_AC_SDIN0<25>

IDE_DDACK#<24>

IDE_DIOR#<24>

IDE_DCS3# <24>

IDE_DIOW#<24>

ICH_AC_SDIN1<27>

IDE_DCS1# <24>

IDE_DIORDY<24>

ICH_AC_BITCLK<25>

RDDREQ <24>

LPC_LAD[0..3] <34>

CLK_PCIE_SATA#<6> CLK_PCIE_SATA<6>

H_INTR <7>

H_INIT# <7>

H_DPSLP# <7>

H_NMI <7>

H_IGNNE# <7>

H_A20M# <7>

H_SMI# <7>

SIO_A20GATE <35>

H_STPCLK# <7>

H_CPUSLP# <7,10>

INTRUDER#<15>

IDE_IRQ<24>

H_DPRSLP# <7>

H_FERR# <7>

H_PWRGOOD <7>

SIO_RCIN# <34>

SATA_TXN0 <24>

SATA_TXP0 <24>

IDE_DA0 <24>

IDE_DA1 <24>

IDE_DA2 <24>

ICH_RST_AUDIO#<25>

ICH_SYNC_AUDIO<25>

ICH_SDOUT_AUDIO<25>

SATA_ACT#<37>

SATA_RXN0_C<24> SATA_RXP0_C<24>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

ICH6(2/4)

21 50, 12, 2004

Compal Electronics, Inc.

Package

9.6X4.06 mm

Near ICH6 side.

Note : R169 Do not populate for

Dothan-A, Populte for Dothan-B.

Note : R168 populate 56 ohm for

Dothan-A, Populte zero ohm for

Dothan-B.

Note : R423 must be stuff for

Dothan-A, no-stuff for Dothan-B.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R204

10M_0402_5%~D

12

R25033_0402_5%~D

1 2

R182

100K_0402_5%~D

12

C571

10P_0402_50V8J~D

@

1

2

R170 0_0402_5%~D

12

C476 0.01U_0402_16V7K~D

1 2

R158 0_0402_5%~D

12

R419 0_0402_5%~D

12

CMOS_CLR

SHORT PADS~D

1

122

R164 75_0402_5%~D

1 2

R252

33_0402_5%~D

1 2

R161

56_0402_5%~D@

12

R177

24.9_0603_1%~D

1 2

R248

33_0402_5%~D

1 2

R160

56_0402_5%~D

12

R266

33_0402_5%~D

1 2

R473

10_0402_5%~D

@

1 2

R167 0_0402_5%~D

12

RTC LAN SATAAC-97/AZALIA

LPC

CPU

IDE

U16A

ICH6_BGA609~D

RTCX1

Y1

RTCX2

Y2

RTCRST#

AA2

INTRUDER#

AA3

INTVRMEN

AA5

EE_CS

D12

EE_SHCLK

B12

EE_DOUT

D11

EE_DIN

F13

LAN_CLK

F12

LAN_RSTSYNC

B11

LANRXD[0]

E12

LANRXD[1]

E11

LANRXD[2]

C13

LANTXD[0]

C12

LANTXD[1]

C11

LANTXD[2]

E13

ACZ_BIT_CLK

C10

ACZ_SYNC

B9

ACZ_RST#

A10

ACZ_SDIN[0]

F11

ACZ_SDIN[1]

F10

ACZ_SDIN[2]

B10

ACZ_SDO

C9

SATALED#

AC19

SATA[0]RXN

AE3

SATA[0]RXP

AD3

SATA[0]TXN

AG2

SATA[0]TXP

AF2

SATA[2]RXN

AD7

SATA[2]RXP

AC7

SATA[2]TXN

AF6

SATA[2]TXP

AG6

SATA_CLKN

AC2

SATA_CLKP

AC1

SATARBIAS#

AG11

SATARBIAS

AF11

IORDY

AF16

IDEIRQ

AB16

DDACK#

AB15

DIOW#

AC14

DIOR#

AE16

LAD[0]/FWH[0] P2

LAD[1]/FWH[1] N3

LAD[2]/FWH[2] N5

LAD[3]/FWH[3] N4

LDRQ[0]# N6

LDRQ[1]#/GPI[41] P4

LFRAME#/FWH[4] P3

A20GATE AF22

A20M# AF23

CPUSLP# AE27

DPRSLP#/TP[4] AE24

DPSLP#/TP[2] AD27

FERR# AF24

CPUPWRGD/GPO[49] AG25

IGNNE# AG26

INIT3_3V# AE22

INIT# AF27

INTR AG24

RCIN# AD23

NMI AF25

SMI# AG27

STPCLK# AE26

THRMTRIP# AE23

DA[0] AC16

DA[1] AB17

DA[2] AC17

DCS1# AD16

DCS3# AE17

DD[0] AD14

DD[1] AF15

DD[2] AF14

DD[3] AD12

DD[4] AE14

DD[5] AC11

DD[6] AD11

DD[7] AB11

DD[8] AE13

DD[9] AF13

DD[10] AB12

DD[11] AB13

DD[12] AC13

DD[13] AE15

DD[14] AG15

DD[15] AD13

DDREQ AB14

R169 0_0402_5%~D@

12

R159 0_0402_5%~D

12

R435

0_0402_5%~D

1 2

C188

12P_0603_50V8J~D

12

C172

0.1U_0402_16V4Z~D

1 2

R420 0_0402_5%~D

12

C506

33P_0402_50V8J~D

1

2

R423 0_0402_5%~D

12

X3

32.768KHZ_12.5P_MC-306~D

1 2

R265

33_0402_5%~D

1 2

R168 56_0402_5%~D

12

C467 0.01U_0402_16V7K~D

1 2

C203

12P_0603_50V8J~D

12

R425 0_0402_5%~D

12

R24933_0402_5%~D

1 2 R166 0_0402_5%~D

12

R184

180K_0402_5%~D

1 2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DPRSLPVR

ICH_SUSCLK

IMVP_PWRGD

ICH_RI#

H_STP_PCI#

DPRSLPVR

USBP0-

USBP0+

USBP1+

USBP2+

USBP3+

USBP1-

USBP2-

USBP5+

USBP4+

USBP3-

USBP4-

USBP5-

USBRBIAS

USB_OC1#

USB_OC0#

USB_OC2#

USB_OC4#

USB_OC3#

DMI_TXN0

DMI_TXN1

DMI_TXP0

DMI_TXP1

DMI_RXN0

DMI_RXN1

DMI_RXP1

DMI_RXP0

ICH_BATLOW#

SIO_SLP_S5#

SIO_SLP_S3#

PLTRST#

SIO_PWRBTN#

ICH_SMBDATA

ICH_SMBCLK

ICH_SMLINK1

ICH_SMLINK0

IRQ_SERIRQ

H_STP_CPU#

SUSPWROK

SYS_RESET#

PM_BMBUSY#

USB2P0_SMI#

CLKRUN#

CK_14M_ICH

CK_48M_ICH

CK_14M_ICH_TERM

CK_48M_ICH_TERM

CK_14M_ICH

CK_48M_ICH

MCH_SYNC#

SPKR

LINKALERT#

ICH_SMBDATA

ICH_SMLINK1

ICH_SMLINK0

ICH_SMBCLK

SIO_EXT_SMI#

SIO_EXT_SCI#

DMI_IRCOMP

CLK_PCIE_ICH#

CLK_PCIE_ICH

SIO_THRM#

USBP7+

USBP6+

USBP6-

USBP7-

USB_OC7#

ICH_PWRGD

LINKALERT#

SYS_RESET#

USB2P0_SMI#

ICH_BATLOW#

ICH_PCIE_WAKE#

SIO_THRM#

MCH_SYNC#

IRQ_SERIRQ

LCD_BIST_EN

USB_OC5#

USB_OC6#

CLKRUN#

DMI_TXN2

DMI_TXN3

DMI_TXP2

DMI_TXP3

DMI_RXN3

DMI_RXN2

DMI_RXP3

DMI_RXP2

USB_OC1#

USB_OC0#

USB_OC3#

USB_OC2#

USB_OC6#

USB_OC7#

USB_OC4#

USB_OC5#

PCIE_TXN1_C

PCIE_TXP1_C

PCIE_RXP1_C

PCIE_RXN1_C

PCIE_TXN1_C

PCIE_TXP1_C

PCIE_TXN1

PCIE_TXP1

GPIO24SIO_EXT_WAK#

SIO_EXT_WAK# GPI12

+3VRUN

+3VSUS

+3VSUS

+3VSUS

+1.5VRUN

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VRUN

+3VRUN

+3VRUN

+3VSUS

+3VRUN

+3VSUS

+3VRUN

SIO_EXT_SMI#<34>

SIO_EXT_SCI#<34>

SIO_EXT_WAK#<34>

H_STP_PCI#<6>

H_STP_CPU#<6,46>

IMVP_PWRGD<10,39,46>

USBP0+ <28>

USBP4+ <28>

USBP5- <28>

USBP3+ <31>

USBP5+ <28>

USBP4- <28>

USBP3- <31>

USBP0- <28>

USBP2+ <28>

USBP2- <28>

USBP1+ <28>

USBP1- <28>

IRQ_SERIRQ<31,34>

SIO_SLP_S3#<34>

SIO_SLP_S5#<34>

ICH_PWRGD<39>

SIO_PWRBTN#<34>

SUSPWROK<15,39>

CLKRUN#<29,31,33,34>

CK_48M_ICH<6>

CK_14M_ICH<6>

ICH_SMBCLK<6>

ICH_SMBDATA<6>

CLK_PCIE_ICH# <6>

CLK_PCIE_ICH <6>

PM_BMBUSY#<10>

SIO_THRM#<34>

ICH_PCIE_WAKE#<18,34>

USBP6+ <28>

USBP7- <28>

USBP7+ <28>

USBP6- <28>

PLTRST#<20,24,37>

SPKR<25>

DMI_RXN0 <10>

DMI_RXP0 <10>

DMI_TXN0 <10>

DMI_TXP0 <10>

DMI_RXN1 <10>

DMI_TXN1 <10>

DMI_RXP1 <10>

DMI_RXN2 <10>

DMI_TXP1 <10>

DMI_TXP2 <10>

DMI_RXP2 <10>

DMI_TXN2 <10>

DMI_RXN3 <10>

DMI_RXP3 <10>

DMI_TXP3 <10>

DMI_TXN3 <10>

USB_OC4# <28>

USB_OC7# <28>

DPRSLPVR<46>

USB_OC0# <28>

USB_OC5# <28>

USB_OC6# <28>

PLTRST_DELAY#<20,37>

PCIE_RXN1_C <37>

PCIE_RXP1_C <37>

PCIE_TXN1 <37>

PCIE_TXP1 <37>

USB_OC1# <28>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

ICH6(3/4)

22 50, 12, 2004

Compal Electronics, Inc.

(PCI Express Wake Event)

KAPALUA system can't boot issue

May need pulldown for DPRSLPVR in case

the ICH6m does not set this value in time

for boot.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R479

22.6_0603_1%~D

1 2

R443

680_0402_5%~D

1 2

R467 24.9_0603_1%~D

1 2

R163 10K_0402_5%~D

1 2

R471

10_0402_5%~D

@

1 2

R440

10K_0402_5%~D

1 2

T27

PAD~D

C661 0.1U_0402_10V7K~D

1 2

C567

4.7P_0402_50V8C~D

@

1

2

R446

10K_0402_5%~D

1 2

T28 PAD~D

R173

10K_0402_5%~D

12

R165

100K_0402_5%~D

@

12

R442

10K_0402_5%~D

1 2

R549

0_0402_5%~D

1 2

R441

8.2K_0402_5%~D

1 2

R198

10K_0402_5%~D

12

R197

10K_0402_5%~D

12

R178

1K_0402_5%~D

@

1 2

R432

10K_0402_5%~D

1 2

RN8

10K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

R172

10K_0402_5%~D@1 2

R90

0_0402_5%~D@

1 2

R445

10K_0402_5%~D

1 2

R437

10K_0402_5%~D

1 2

R431

10K_0402_5%~D

1 2

RN7

10K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

T26 PAD~D

R91 0_0402_5%~D

1 2

C662 0.1U_0402_10V7K~D

1 2

R174 33_0402_5%~D

1 2

R171

10K_0402_5%~D

1 2

C558

4.7P_0402_50V8C~D

@

1

2

PCI-EXPRESSDIRECT MEDIA INTERFACE

USB

CLOCK GPIO

POWER MGT

U16C

ICH6_BGA609~D

RI#

T2

SATA[0]GP/GPI[26]

AF17

SATA[1]GP/GPI[29]

AE18

SATA[2]GP/GPI[30]

AF18

SATA[3]GP/GPI[31]

AG18

SMBCLK

Y4

SMBDATA

W5

LINKALERT#

Y5

SMLINK[0]

W4

SMLINK[1]

U6

MCH_SYNC#

AG21

SPKR

F8

SUS_STAT#/LPCPD#

W3

SYS_RESET#

U2

BM_BUSY#/GPI[6]

AD19

GPI[7]

AE19

GPI[8]

R1

STP_PCI#/GPO[18]

AC21

GPO[19]

AB21

STP_CPU#/GPO[20]

AD22

GPO[21]

AD20

GPO[23]

AD21

GPIO[24]

V3

GPIO[25]

P5

GPIO[27]

R3

GPIO[28]

T3

CLKRUN#/GPIO[32]

AF19

GPIO[33]

AF20

GPIO[34]

AC18

WAKE#

U5

SERIRQ

AB20

THRM#

AC20

CLK14

E10

CLK48

A27

SUSCLK

V6

SLP_S3#

T4

SLP_S4#

T5

SLP_S5#

T6

PWROK

AA1

DPRSLPVR/TP[1]

AE20

LAN_RST#

V5

BATLOW#/TP[0]

V2

PWRBTN#

U1

VRMPWRGD

AF21

RSMRST#

Y3

PERn[1] H25

PERp[1] H24

PETn[1] G27

PETp[1] G26

PERn[2] K25

PERp[2] K24

PETn[2] J27

PETp[2] J26

SMBALERT#/GPI[11]

W6

GPI[12]

M2

GPI[13]

R6

PERn[3] M25

PERp[3] M24

PETn[3] L27

PETp[3] L26

PERn[4] P24

PERp[4] P23

PETn[4] N27

PETp[4] N26

DMI[0]RXN T25

DMI[0]RXP T24

DMI[0]TXN R27

DMI[0]TXP R26

DMI[1]RXN V25

DMI[1]RXP V24

DMI[1]TXN U27

DMI[1]TXP U26

DMI[2]RXN Y25

DMI[2]RXP Y24

DMI[2]TXN W27

DMI[2]TXP W26

DMI[3]RXN AB24

DMI[3]RXP AB23

DMI[3]TXN AA27

DMI[3]TXP AA26

DMI_CLKN AD25

DMI_CLKP AC25

DMI_ZCOMP F24

DMI_IRCOMP F23

OC[4]#/GPI[9] C23

OC[5]#/GPI[10] D23

OC[6]#/GPI[14] C25

OC[7]#/GPI[15] C24

OC[0]# C27

OC[1]# B27

OC[2]# B26

OC[3]# C26

USBP[0]N C21

USBP[0]P D21

USBP[1]N A20

USBP[1]P B20

USBP[2]N D19

USBP[3]N A18

USBP[3]P B18

USBP[4]N E17

USBP[4]P D17

USBP[5]P A16

USBP[5]N B16

USBP[6]N C15

USBP[6]P D15

USBP[7]N A14

USBP[7]P B14

USBP[2]P C19

USBRBIAS# A22

USBRBIAS B22

R474

10_0402_5%~D

@

1 2

R429

10K_0402_5%~D

1 2

R434

10K_0402_5%~D

1 2

R448

10K_0402_5%~D

12

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH6_VCCPLL

ICH6_VCCPLL

ICH_V5REF_SUS

ICH_V5REF_SUS

ICH_V5REF_RUN

ICH_V5REF_RUN

ICH_V5REF_SUS

ICH_V5REF_RUN

+1.5VRUN_L

+3VSUS

+3VRUN

+3VSUS+5VSUS

+5VRUN

+VCCP

+3VSUS

+1.5VRUN

+1.5VRUN

+3VRUN

+1.5VSUS

+1.5VRUN

+1.5VRUN

+1.5VRUN

+3VSUS

+1.5VRUN

+3VRUN

+3VSUS

+RTC_CELL

+3VRUN

+3VRUN

+RTC_CELL

+3VRUN

+5VSUS

+5VALW

+1.5VRUN

+1.5VSUS

+1.5VRUN

+2.5VRUN

+3VRUN

+1.5VRUN

+1.5VRUN

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

ICH6(4/4)

23 50, 12, 2004

Compal Electronics, Inc.

Near PIN AG5

Near PIN AG9

Near PIN AE1

Near PIN

E26, E27

Near PIN

AC27

Near PIN AG10

Near PIN F27(C968),

P27(C949), AB27(C950)

Near PIN A25

Replacing by this circuit?

Near PIN U7

Near PIN A24

Near PIN AA19

Near PIN AG23

Near PIN AB18

Near PIN

A2-A6, D1-H1

Near PIN

AG13, AG16

Near PIN A17

DELL CONFIDENTIAL/PROPRIETARY

Note: Intel will update design guide.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

L80

BLM11A601S_0603~D

1 2

C522

0.1U_0402_16V4Z~D

1 2

C568

0.1U_0402_16V4Z~D

1

2

PCIE

COREIDE

PCIUSB

SATA

USB CORE

PCI/IDE RBP

U16E

ICH6_BGA609~D

VCC1_5[1]

AA22

VCC1_5[2]

AA23

VCC1_5[3]

AA24

VCC1_5[4]

AA25

VCC1_5[5]

AB25

VCC1_5[6]

AB26

VCC1_5[7]

AB27

VCC1_5[8]

F25

VCC1_5[9]

F26

VCC1_5[10]

F27

VCC1_5[11]

G22

VCC1_5[12]

G23

VCC1_5[13]

G24

VCC1_5[14]

G25

VCC1_5[15]

H21

VCC1_5[16]

H22

VCC1_5[17]

J21

VCC1_5[18]

J22

VCC1_5[19]

K21

VCC1_5[20]

K22

VCC1_5[21]

L21

VCC1_5[22]

L22

VCC1_5[23]

M21

VCC1_5[24]

M22

VCC1_5[25]

N21

VCC1_5[26]

N22

VCC1_5[27]

N23

VCC1_5[28]

N24

VCC1_5[29]

N25

VCC1_5[30]

P21

VCC1_5[31]

P25

VCC1_5[32]

P26

VCC1_5[33]

P27

VCC1_5[34]

R21

VCC1_5[35]

R22

VCC1_5[36]

T21

VCC1_5[37]

T22

VCC1_5[38]

U21

VCC1_5[39]

U22

VCC1_5[40]

V21

VCC1_5[41]

V22

VCC1_5[42]

W21

VCC1_5[43]

W22

VCC1_5[44]

Y21

VCC1_5[45]

Y22

VCC1_5[46]

AA6

VCC1_5[47]

AB4

VCC1_5[48]

AB5

VCC1_5[49]

AB6

VCC1_5[50]

AC4

VCC1_5[51]

AD4

VCC1_5[52]

AE4

VCC1_5[53]

AE5

VCC1_5[54]

AF5

VCC1_5[55]

AG5

VCC1_5[56]

AA7

VCC1_5[57]

AA8

VCC1_5[58]

AA9

VCC1_5[59]

AB8

VCC1_5[60]

AC8

VCC1_5[61]

AD8

VCC1_5[62]

AE8

VCC1_5[63]

AE9

VCC1_5[64]

AF9

VCC1_5[65]

AG9

VCCDMIPLL

AC27

VCC3_3[1]

E26

VCCSATAPLL

AE1

VCC3_3[22]

AG10

VCCLAN3_3/VCCSUS3_3[1]

A13

VCCLAN3_3/VCCSUS3_3[2]

F14

VCCLAN3_3/VCCSUS3_3[3]

G13

VCCLAN3_3/VCCSUS3_3[4]

G14

VCCSUS3_3[1]

A11

VCCSUS3_3[2]

U4

VCCSUS3_3[3]

V1

VCCSUS3_3[4]

V7

VCCSUS3_3[5]

W2

VCCSUS3_3[6]

Y7

VCCSUS3_3[7]

A17

VCCSUS3_3[8]

B17

VCCSUS3_3[9]

C17

VCCSUS3_3[10]

F18

VCCSUS3_3[11]

G17

VCCSUS3_3[12]

G18

VCC1_5[98] F9

VCC1_5[97] U17

VCC1_5[96] U16

VCC1_5[95] U14

VCC1_5[93] U11

VCC1_5[94] U12

VCC1_5[92] T17

VCC1_5[91] T11

VCC1_5[90] P17

VCC1_5[89] P11

VCC1_5[88] M17

VCC1_5[87] M11

VCC1_5[86] L17

VCC1_5[85] L16

VCC1_5[84] L14

VCC1_5[83] L12

VCC1_5[82] L11

VCC1_5[81] AA21

VCC1_5[80] AA20

VCC1_5[79] AA19

VCC3_3[21] AA10

VCC3_3[20] AG19

VCC3_3[19] AG16

VCC3_3[18] AG13

VCC3_3[17] AD17

VCC3_3[16] AC15

VCC3_3[15] AA17

VCC3_3[14] AA15

VCC3_3[13] AA14

VCC3_3[12] AA12

VCC3_3[11] P1

VCC3_3[10] M7

VCC3_3[9] L7

VCC3_3[8] L4

VCC3_3[7] J7

VCC3_3[6] H7

VCC3_3[5] H1

VCC3_3[4] E4

VCC3_3[3] B1

VCC3_3[2] A6

VCCSUS1_5[3] U7

VCCSUS1_5[2] R7

VCCSUS1_5[1] G19

VCC1_5[78] G20

VCC1_5[77] F20

VCC1_5[76] E24

VCC1_5[75] E23

VCC1_5[74] E22

VCC1_5[73] E21

VCC1_5[72] E20

VCC1_5[71] D27

VCC1_5[70] D26

VCC1_5[69] D25

VCC1_5[68] D24

VCC1_5[67] G8

VCC2_5[2] P7

VCC2_5[4] AB18

V5REF[2] AA18

V5REF[1] A8

V5REF_SUS F21

VCCUSBPLL A25

VCCSUS3_3[20] A24

VCCRTC AB3

VCCLAN1_5/VCCSUS1_5[2] G11

VCCLAN1_5/VCCSUS1_5[1] G10

V_CPU_IO[3] AG23

V_CPU_IO[2] AD26

V_CPU_IO[1] AB22

VCCSUS3_3[19] G16

VCCSUS3_3[18] G15

VCCSUS3_3[17] F16

VCCSUS3_3[16] F15

VCCSUS3_3[15] E16

VCCSUS3_3[14] D16

VCCSUS3_3[13] C16

C494

0.1U_0402_16V4Z~D

1 2

C538

1U_0603_10V4Z~D

1

2

C472

0.1U_0402_16V4Z~D

1 2

C492

0.1U_0402_16V4Z~D

1

2

R472

10_0402_5%~D@

1 2

C542

0.1U_0402_16V4Z~D

1

2

C511

0.1U_0402_16V4Z~D

1

2

C524

0.1U_0402_16V4Z~D

1

2

C488

0.1U_0402_16V4Z~D

1

2

C554

0.1U_0402_16V4Z~D

1 2

C551

0.1U_0402_16V4Z~D

1

2

C493

0.1U_0402_16V4Z~D

1

2

C550

0.1U_0402_16V4Z~D

1 2

D19

RB751V_SOD323~D

@

21

R477

1K_0402_5%~D@

1 2

C555

0.1U_0402_16V4Z~D

1 2

C536

0.1U_0402_16V4Z~D

1 2

C502

0.1U_0402_16V4Z~D

1 2

C564

0.1U_0402_16V4Z~D

1

2

C549

0.1U_0402_16V4Z~D

1

2

C557

0.1U_0402_16V4Z~D

1

2

C561

0.1U_0402_16V4Z~D

1

2

C487

0.1U_0402_16V4Z~D

1

2

L82

BLM21PG600SN1D_0805~D

1 2

C501

0.1U_0402_16V4Z~D

1

2

C565

0.1U_0402_16V4Z~D

1 2

C498

0.1U_0402_16V4Z~D

1 2

C471

0.1U_0402_16V4Z~D

1

2

C546

0.1U_0402_16V4Z~D

1

2

C570

0.1U_0402_16V4Z~D

1

2

C566

0.01U_0402_16V7K~D

1 2

C499

0.01U_0402_16V7K~D

1 2

C473

0.1U_0402_16V4Z~D

@

1 2

C475

0.1U_0402_16V4Z~D

1

2

C474

0.1U_0402_16V4Z~D

1

2

C521

0.1U_0402_16V4Z~D

1 2

C548

0.1U_0402_16V4Z~D

1 2

R438

1_0402_5%~D

1 2

D17

RB751V_SOD323~D@

21

C480

0.1U_0402_16V4Z~D

1

2

C491

0.01U_0402_16V7K~D

1

2

C553

0.1U_0402_16V4Z~D

1 2

R478

10_0402_5%~D

1 2

C569

0.1U_0402_16V4Z~D

1

2

C516

0.1U_0402_16V4Z~D

1

2

U16D

ICH6_BGA609~D

VSS[86] F4

VSS[85] F22

VSS[84] F19

VSS[83] F17

VSS[81] E19

VSS[82] E25

VSS[80] E18

VSS[79] E15

VSS[78] E14

VSS[76] D22

VSS[75] D20

VSS[74] D18

VSS[73] D14

VSS[72] D13

VSS[71] D10

VSS[70] D1

VSS[69] C4

VSS[68] C22

VSS[67] C20

VSS[66] C18

VSS[65] C14

VSS[64] B25

VSS[63] B24

VSS[62] B23

VSS[61] B21

VSS[60] B19

VSS[59] B15

VSS[58] B13

VSS[57] AG7

VSS[56] AG3

VSS[55] AG22

VSS[54] AG20

VSS[53] AG17

VSS[52] AG14

VSS[51] AG12

VSS[50] AG1

VSS[49] AF7

VSS[48] AF3

VSS[47] AF26

VSS[46] AF12

VSS[45] AF10

VSS[44] AF1

VSS[43] AE7

VSS[42] AE6

VSS[41] AE25

VSS[40] AE21

VSS[39] AE2

VSS[38] AE12

VSS[37] AE11

VSS[36] AE10

VSS[35] AD6

VSS[34] AD24

VSS[33] AD2

VSS[32] AD18

VSS[31] AD15

VSS[29] AD1

VSS[30] AD10

VSS[28] AC6

VSS[27] AC3

VSS[26] AC26

VSS[25] AC24

VSS[24] AC23

VSS[23] AC22

VSS[22] AC12

VSS[21] AC10

VSS[20] AB9

VSS[19] AB7

VSS[18] AB2

VSS[17] AB19

VSS[16] AB10

VSS[15] AB1

VSS[14] AA4

VSS[13] AA16

VSS[12] AA13

VSS[11] AA11

VSS[10] A9

VSS[9] A7

VSS[8] A4

VSS[7] A26

VSS[6] A23

VSS[5] A21

VSS[4] A19

VSS[3] A15

VSS[2] A12

VSS[1] A1

VSS[172]

E27

VSS[171]

Y6

VSS[170]

Y27

VSS[169]

Y26

VSS[168]

Y23

VSS[167]

W7

VSS[166]

W25

VSS[165]

W24

VSS[164]

W23

VSS[163]

W1

VSS[162]

V4

VSS[161]

V27

VSS[160]

V26

VSS[159]

V23

VSS[158]

U25

VSS[157]

U24

VSS[156]

U23

VSS[155]

U15

VSS[154]

U13

VSS[153]

T7

VSS[152]

T27

VSS[151]

T26

VSS[150]

T23

VSS[149]

T16

VSS[148]

T15

VSS[147]

T14

VSS[146]

T13

VSS[145]

T12

VSS[144]

T1

VSS[143]

R4

VSS[142]

R25

VSS[141]

R24

VSS[140]

R23

VSS[139]

R17

VSS[138]

R16

VSS[137]

R15

VSS[136]

R14

VSS[135]

R13

VSS[134]

R12

VSS[133]

R11

VSS[132]

P22

VSS[131]

P16

VSS[130]

P15

VSS[129]

P14

VSS[128]

P13

VSS[127]

P12

VSS[126]

N7

VSS[125]

N17

VSS[124]

N16

VSS[123]

N15

VSS[122]

N14

VSS[121]

N13

VSS[120]

N12

VSS[119]

N11

VSS[118]

N1

VSS[117]

M4

VSS[116]

M27

VSS[115]

M26

VSS[114]

M23

VSS[113]

M16

VSS[112]

M15

VSS[111]

M14

VSS[110]

M13

VSS[109]

M12

VSS[108]

L25

VSS[107]

L24

VSS[106]

L23

VSS[105]

L15

VSS[104]

L13

VSS[103]

K7

VSS[102]

K27

VSS[101]

K26

VSS[100]

K23

VSS[99]

K1

VSS[98]

J4

VSS[97]

J25

VSS[96]

J24

VSS[95]

J23

VSS[94]

H27

VSS[93]

H26

VSS[92]

H23

VSS[91]

G9

VSS[90]

G7

VSS[89]

G21

VSS[88]

G12

VSS[77] D7

VSS[87]

G1

C552

0.1U_0402_16V4Z~D

1 2

C469

0.1U_0402_16V4Z~D

1

2

C574

1U_0603_10V4Z~D

1

2

C556

0.1U_0402_16V4Z~D

1 2

C562

0.1U_0402_16V4Z~D

1

2

+

C514

220U_D2_4VM

1

2

R162

10_0402_5%~D

1 2

C468

0.1U_0402_16V4Z~D

1

2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

IDE_HDD0

IDE_HDD1

IDE_HDD2

IDE_HDD3

IDE_HDD4

IDE_HDD5

IDE_HDD6

IDE_HDD7

IDE_HDD8

IDE_HDD9

IDE_HDD10

IDE_HDD11

IDE_HDD12

IDE_HDD13

IDE_HDD14

IDE_HDD15

IDE_HDA0

IDE_HDA1

IDE_HDA2

IDE_HCS0#

IDE_HCS1#

IDE_HINTRQ

IDE_HDMACK#

IDE_HIORDY

IDE_HDIOR#

IDE_HDIOW#

IDE_HDREQ

XTLIN

VSS_SATA

VSS_SATA

IDE_HIORDY IDE_HINTRQ

CNFG1

CNFG0

CNFG2

XTLOUT

IDE_HDREQ

IDE_IRQ

IDE_DIORDY

IDE_HDD12

IDE_HDD10

IDE_HRESET#

IDE_HINTRQ

IDE_HDD1

IDE_HCS1#

IDE_HDD8

IDE_HDIOW#

IDE_HDD15

IDE_HDREQ

IDE_HDD3 IDE_HDD13

IDE_HDD5 IDE_HDD9

IDE_HDA2IDE_HDA0

IDE_HDD0

IDE_HDD11

IDE_HDMACK#

IDE_HIORDY

IDE_HDD7

IDE_HDD2

IDE_HDD6

IDE_HDD14

IDE_HDD4

IDE_HCS0#

IDE_HDA1

IDE_HDIOR#

IDE_DD11

IDE_DD12

IDE_DD13

IDE_DD14

ATAIOSEL

ATAIOSEL

CNFG2

CNFG1

CNFG0

VSS_SATA

IDE_HIOCS16#

RPDDACK#

SATA_RXN0

SATA_RXP0

SATA_RXN0

SATA_RXP0

IDE_DD6

IDE_DD3

IDE_DD4

IDE_DD2

IDE_DD5

IDE_DD13

IDE_DD1 IDE_DD14

IDE_DD11

IDE_DD10

IDE_DD15

IDE_DD0

IDE_DD9

IDE_DD12

RPDDACK#

SEC_CSEL

PDIAG#

IDE_DD7 IDE_DD8

IDE_DD5

IDE_DD1

IDE_DD6

IDE_DD9

IDE_DD3

IDE_DD10

IDE_DD7

IDE_DD4

IDE_DD8

IDE_DD2

IDE_DD0

IDE_DD15

CDROM_ACT#

XTLOUTXTLIN

+3VRUN_SATA

IDE_HRESET#

+5VHDD

+5VHDD

+3VRUN

+3VRUN

+1.8VRUN

+3VRUN +1.8VRUN +3VRUN

+3VRUN

+3VRUN +3VRUN +3VRUN

+3VRUN

+5VHDD

+3VRUN

+5VMOD

+5VMOD

+5VMOD

+5VMOD

+5VMOD

SATA_TXP0 <21>

SATA_TXN0 <21>

IDE_DD[0..15] <21>

PLTRST# <20,22,37>

IDE_DDACK#<21>

SATA_RXN0_C <21>

SATA_RXP0_C <21>

IDE_RST_MOD<34>

RDDREQ <21>

IDE_DIOW#<21> IDE_DIORDY<21>

IDE_DCS1#<21> IDE_DCS3# <21>

IDE_DIOR# <21>

IDE_DA1<21> IDE_DA2 <21>

IDE_IRQ<21>

IDE_DA0<21>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

SATA to PATA BRIDGE & CD-ROM CONN.

24 50, 12, 2004

Compal Electronics, Inc.

Reference clock configuration

T4 T3

0

0

1

1

0

0

1

1

20MHz

25MHz

30MHz

40MHz

*

Layout Notes:

Place close to 88SA8040

SATA to PATA Bridge

HDD Connector

Pin No. Settings

SATATEST0

SATATEST1

SATATEST2

SATATEST3

SATATEST4

SATATEST5

SATATEST6

SATATEST7

33

34

35

36

37

38

39

40

NC

0

1

Int. PU/PD

PD

PD

PD

PD

PD

PD

PU

PU NC

NC

NC

NC

NC

NC

0

PU / PD is internal pull-up or pull-down 100Kohm

Pin Name

CFG0

CFG1

CFG2

20

19

18 PD

PD

PU

Place near 88SA8040

Layout Note: W=80 mils

CD-ROM Connector

Layout Note: Place close to CD-ROM CONN.

DELL CONFIDENTIAL/PROPRIETARY

1

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

JHDD

FOX_HH99223-SA_REVERS~D

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

22

44

66

88

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

42 42

44 44

R284

10K_0402_5%~D

@

1 2

C368

1000P_0402_50V7K~D

1

2

R281

10K_0402_5%~D

1 2

C295

4.7U_0805_10V4Z~D

1

2

C594

0.1U_0402_16V4Z~D

1

2

X7

25MHz_20P_1BX25000CK1A~D

1 2

C304

1000P_0402_50V7K~D

1

2

R296 10K_0402_5%~D

1 2

R523 100K_0402_5%~D

1 2

C314

0.1U_0402_16V4Z~D

1

2

R488 10K_0402_5%~D

@

1 2

C309

0.1U_0402_16V4Z~D

1

2

T40 PAD~D

R303

4.7K_0402_5%~D

12

R489 10K_0402_5%~D

@

1 2

C592

33P_0402_50V8J~D

1

2

R298

10K_0402_5%~D

1 2

R487 10K_0402_5%~D@

1 2

C370

0.1U_0402_16V4Z~D

1

2

R493

0_0402_5%~D

12

C482

0.01U_0402_16V7K~D

12

R486 10K_0402_5%~D

1 2

T41 PAD~D

R317

5.6K_0402_5%~D

1 2

R175

4.7K_0402_5%~D

1 2

C307

0.1U_0402_16V4Z~D

1

2

R291

10K_0402_5%~D

@

1 2

Parallel ATA

UART

SATA

Config & Debug

Power

U28

88SA8040_TQFP64~D

HDD0

62

HDD1

64

HDD3

5HDD2

2

HDD4

7

HDD5

11

HDD6

13

HDD7

15

HDD8

14

HDD9

12

HDD10

10

HDD11

6

HDD12

3

TX_P 32

TX_M 31

RX_P 27

HDD14

63

RX_M 28

HDD15

61

RST# 17

T0 33

T1 34

T2 35

T3 36

T4 37

T5 38

T6 39

T7 40

CNFG2 20

CNFG1 19

CNFG0 18

ATAIOSEL 21

XTLIN/OSC 22

XTLOUT 23

ISET 26

VDDIO_0 4

VDDIO_1 44

VDD_0 9

VDD_1 41

VDD_2 56

VAA1 24

VAA2 29

VSS2 30

GND_0 8

GND_1 42

GND_2 57

HDA0

50

HDA1

51

HDA2

49

HCS0#

48

HCS1#

47

HIOCS16#

52

HINTRQ

53

HDMACK#

54

HIORDY

55

HDIOR#

58

HDIOW#

59

HDMARQ

60

HRESET#

16

HPDIAG#

46

UAO

45

UAI

43

VSS1 25

HDD13

1

C322

4.7U_0805_10V4Z~D

1

2

C486

0.01U_0402_16V7K~D

12

C363

10U_0805_10V4M~D

1

2

R275 12.1K_0603_1%~D

12

R280

10K_0402_5%~D@

1 2

R496 10K_0402_5%~D

1 2

C586

0.1U_0402_16V4Z~D

1

2

R484

10K_0402_5%~D

12

R276

10K_0402_5%~D@

1 2

R283

10K_0402_5%~D@

1 2

R499 33_0402_5%~D

1 2

C595

0.1U_0402_16V4Z~D

1

2

R485 10K_0402_5%~D

1 2

R278

10K_0402_5%~D@

1 2

R325

22_0402_5%~D

1 2

C306

0.1U_0402_16V4Z~D

1

2

C350

47P_0402_50V8J~D

1 2

C367

0.1U_0402_16V4Z~D

1 2

C305

0.01U_0402_16V7K~D

1

2

C316

2.2U_0805_10V6K~D

1

2

JMOD

SUYIN_80095AR-050G1T~D

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

22

44

66

88

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

42 42

44 44

46 46

48 48

50 50

C588

4.7U_0805_10V4Z~D

1

2

R520

100K_0402_5%~D

1 2

C593

33P_0402_50V8J~D

1

2

C365

1U_0603_10V4Z~D

1

2

R273

10K_0402_5%~D

1 2

R306 470_0402_5%~D

1 2

R494

1M_0402_5%~D

1 2

R524

470_0402_5%~D

1 2

L45

BLM31A260SPT_1206~D

1 2

R279

10K_0402_5%~D@

1 2

R285

510_0402_5%~D@

12

R436

8.2K_0402_5%~D

12

C587

0.1U_0402_16V4Z~D

1

2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AC97VREFI

R_ICH_AC_BITCLK

CAP2

SPK_SHUTDOWN#

HP_OUT_R

ICH_AC_SDOUT_TERM

R_ICH_AC_SDIN0

EAPD

HP_COMM

SPDIF_SHDN

VREFOUT

ICH_SDOUT_AUDIO

CNB_MICIN

AFLT2

AUDIO_AVDD_ON TPS793333_BYPASS

AFLT1

SPDIF

HP_OUT_L

Z2403 PC_BEEP

9750_PHONE

PC_BEEP

CK_14M_CODEC

CK_14M_CODEC_TERM

XTL_24M-

XTL_24M+

XTL_24M-

ICH_RST_AUDIO#

ICH_SDOUT_AUDIO

ICH_SYNC_AUDIO

Z2402

Z2401

Z2404

+3VRUN

VDDA

VDDA

+5VSUS

VDDA

+3VRUN

SPDIF_SHDN<19,34>

AUD_LINE_OUT_L <26>

SPK_SHUTDOWN#<26,27>

ICH_AC_SDIN0<21>

EAPD<26>

ICH_SDOUT_AUDIO<21>

MDC_AC_BITCLK<27>

NB_MICIN <26>

ICH_SYNC_AUDIO<21>

AUD_LINE_OUT_R <26>

AUDIO_AVDD_ON<35>

HP_OUT_R <26>

SPDIF<19>

ICH_AC_BITCLK<21>

HP_OUT_L <26>

CBS_SPK<31>

SPKR<22>

CK_14M_CODEC<6>

AUD_MONO_OUT <27>

ICH_RST_AUDIO#<21>

BEEP<34>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

AC97 CODEC

25 50, 12, 2004

Compal Electronics, Inc.

W=30 mil

VDDA=3.3V

Pin46

CID1 Pin3

XTL_OUT

CLOCK SOURCE Pin45

CID0

GND

GND

GND

GND

OPENOPEN

OPEN OPEN

1K

1K1K

1K

14.318 MHz

27 MHz

48 MHz

24.576 MHz

TRACE>15 mil

45

2

single gate TTL

31

PACKAGE : 8X4.5X1.5mm

22P for

Crystal Only

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R235

33_0402_5%~D

1 2

C222

0.33U_0603_10V7K~D

1 2

R210

0_0402_5%~D

1 2

C245

22P_0402_50V8J~D

@

1 2

C544

0.1U_0402_16V4Z~D

1

2

C252

0.1U_0402_16V4Z~D

1 2

C248

10P_0402_50V8J~D@

1 2

C97

1U_0603_10V4Z~D@

1

2

C196 820P_0603_50V7K~D

1 2

C541

2.2U_0805_10V6K~D

@

1

2

C192

1000P_0402_50V7K~D

1

2

R221

0_0402_5%~D

12

C194

0.1U_0402_16V4Z~D

1

2

C268

27P_0603_50V8J~D

@

1

2

R105

8.2K_0402_5%~D@

12

R233

33_0402_5%~D

1 2

X5

24.576 MHz_20P_1BX24576CC1A~D

@

1 2

C246

22P_0402_50V8J~D

@

1 2

STAC9751

U19

STAC9751TG_TQFP48~D

PC_BEEP 12

PHONE 13

AUX_L 14

AUX_R 15

VIDEO_L 16

VIDEO_R 17

CD_L 18

CD_GND 19

CD_R 20

MIC1 21

MIC2 22

LINE_IN_L 23

LINE_IN_R 24

SDATA_OUT

5

BIT_CLK

6

SDATA_IN

8

SYNC

10 RESET#

11

XTL_IN

2

XTL_OUT

3

LOUT_L 35

LOUT_R 36

MONO_OUT 37

CID0

45 CID1

46

GPIO0/NC

43

GPIO1/NC

44

HP_OUT_L 39

HP_COMM 40

HP_OUT_R 41

EAPD

47

NC/FLTOUT

34

NC/FLTIN

33

CAP2

32

NC/BPCFG

31

AFLT2

30

AFLT1

29

VREFOUT

28

VREF

27

DVDD1 1

DVDD2 9

AVDD1 25

AVDD2 38

DVSS1

4

DVSS2

7

AVSS1

26

AVSS2

42

SPDIF

48

C101

0.047U_0402_16V4Z~D

1

2

U9

TPS793333DBVR_SOT23-5~D@

IN

1OUT 5

GND

2

EN

3BYPASS 4

C249

10P_0402_50V8J~D@

1 2

R220

0_0402_5%~D

12

C244

22P_0402_50V8J~D@

1

2

R115

10K_0402_5%~D

1 2

R219

33_0402_5%~D@

12

C96

0.1U_0402_16V4Z~D

1

2

C98

0.1U_0402_16V4Z~D

1

2

L16

BLM11A121S_0603~D

1 2

R222

47_0402_5%~D@

1 2

C195

1U_0603_10V4Z~D

1

2

U8B

SN74LVC2G86DCTR_SSOP8~D

2A

5

2B

6

G

4

2Y 3

P8

C81

0.1U_0402_16V4Z~D

1

2

C258

22P_0402_50V8J~D

@

1

2

R234

33_0402_5%~D

1 2

R212

1K_0402_5%~D@

1 2

C247

10P_0402_50V8J~D@

1 2

C99

0.01U_0402_16V7K~D@

1

2

C115

0.1U_0402_16V4Z~D@

1

2

C190

2.2U_0805_10V6K~D

1

2

R214

1K_0402_5%~D@

1 2

C198 0.1U_0402_16V4Z~D

@1 2

C197 820P_0603_50V7K~D

1 2

C545

0.1U_0402_16V4Z~D

1

2

C266

27P_0603_50V8J~D

@

1

2

L25

BLM31A260SPT_1206~D

1 2

C251

1000P_0402_50V7K~D

@

1

2

C92

0.1U_0402_16V4Z~D@

1

2

C217

0.1U_0402_16V4Z~D

1 2

R215

10K_0402_5%~D

12

C93

2.2U_0805_10V6K~D

1

2

C193

1000P_0402_50V7K~D

1

2

C205

0.1U_0402_16V4Z~D

1 2

U8A

SN74LVC2G86DCTR_SSOP8~D

1A

1

1B

2

G

4

1Y 7

P8

C267

27P_0603_50V8J~D

@

1

2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

INT_SPK_R1

INT_SPK_L2

EMICIN

INT_SPK_R2

INT_SPK_L1

AUD_GAIN0

AUD_GAIN1

INT_SPK_R1

INT_SPK_R2

INT_SPK_L1

INT_SPK_L2

AUD_GAIN0

AUD_GAIN1

+5VAMPVCC

BYPASS

HP_NB_SENSE

HP_SPK_L1

HP_SPK_R1HP_NB_SENSE

AUD_LINE_IN_R

AUD_LINE_IN_L

HP_SPK_L2

HP_SPK_R2

INT_SPK_L1

INT_SPK_L2

INT_SPK_R2

INT_SPK_R1

COINCELL

INT_SPK_R1

INT_SPK_R2

INT_SPK_L1

INT_SPK_L2

+5VRUN

+5VRUN

+5VRUN

+3VRUN

+5VRUN

+3VRUN

+3VRUN

COINCELL

NB_MUTE<34>

SPK_SHUTDOWN#<25,27>

EAPD<25>

AUD_LINE_OUT_R<25>

AUD_LINE_OUT_L<25>

NB_MICIN<25>

HP_NB_SENSE<34>

HP_OUT_L<25>

HP_OUT_R<25>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Amplifier and Phone Jack

26 50, 12, 2004

Compal Electronics, Inc.

TRACE>15 mil

60mil single end

connection near JACK

W=40mils

Gain Setting

GAIN0 INPUTAV(inv)GAIN1

21.6dB

15.6dB

6dB

1

0

10dB

25K ohm

45K ohm

70K ohm

90K ohm

IMPEDANCE

11

0

0

0

*

1

Added new

Amplifier, same as

Nimitz

LINE OUT

Place close to connector

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C633

0.1U_0402_16V4Z~D

@

1

2

D13

DA204U_SOT323~D

@

2

31

C269

10U_0805_10V4M~D

1

2

D10

DA204U_SOT323~D

@

2

31

G

D

SQ43

2N7002_SOT23~D

2

13

C223

1U_0603_10V4Z~D

1 2

C500

100P_0402_50V8J~D

1

2

JSPK

E&T_3801-04

1

12

23

34

4

L79

BLM11A121S_0603~D

12

C533

100P_0402_50V8J~D

1

2

R465

1.33K_0603_1%~D

12

C632

0.1U_0402_16V4Z~D

@

1

2

G

D

SQ41

2N7002_SOT23~D

2

13

C572

0.1U_0402_16V4Z~D

1

2

JCOIN

E&T_3801-02~D

1

1

2

2

C221

1U_0603_10V4Z~D

1

2

R231

10K_0402_5%~D@

12

C630

0.1U_0402_16V4Z~D

@

1

2

R223

10K_0402_5%~D@

12

C573

0.1U_0402_16V4Z~D

1

2

C507

100P_0402_50V8J~D

1

2

L77

BLM11A121S_0603~D

12

R464

2K_0402_5%

12

C534

4.7U_0805_10V4Z~D

1

2

JMIC

FOX_JA6333L-1ST-TR

1

2

3

4

5

6

L83

BLM11A121S_0603~D

12

U21

TPA6017A2PWPR_TSSOP20~D

GND4

1GND3

11 GND2

13 GND1

20

VDD 16

PVDD1 15

RIN-

17

BYPASS 10

NC 12

LOUT- 8

LOUT+ 4

ROUT- 14

ROUT+ 18

RIN+

7

LIN-

5

LIN+

9

GAIN0 2

GAIN1 3

PVDD2 6

SHUTDOWN

19

L81

BLM11A121S_0603~D

12

C517

100P_0402_50V8J~D

1 2

C276

0.47U_0603_16V7K~D

1

2

C260

0.01U_0402_16V7K~D

1 2

D11

DA204U_SOT323~D

@

2

31

C264

0.01U_0402_16V7K~D

1 2

R218

10K_0402_5%~D

12

C283

0.1U_0402_16V4Z~D

@

1

2

C204

1U_0603_10V4Z~D

1

2

C539

100P_0402_50V8J~D

1

2

C271

0.01U_0402_16V7K~D

1 2

C631

0.1U_0402_16V4Z~D

@

1

2

C458

100P_0402_50V8J~D

1

2

JAUDO

FOX_JA6333L-1ST-TR

1

2

3

4

5

6

R449

100_0402_5%~D

1 2

U18

MAX4411ETP-T_TQFN20~D

C1P

1

PGND

2

C1N

3

NC-4 4

PVss

5

NC-6 6

SVss

7

NC-8 8

OUTL 9

SVDD 10

INR

15

SHDNR#

14

INL

13

NC-12 12

OUTR 11

NC-20 20

PVDD 19

SHDNL#

18

SGND

17

NC-16 16

C563

0.01U_0402_16V7K~D

1 2

C216

1U_0603_10V4Z~D

1 2

C272

0.1U_0402_16V4Z~D

1

2

L84

BLM21AF121SN1D_0805~D

1 2

R447

100K_0402_5%~D

1 2

R216

10K_0402_5%~D

12

R236

10K_0402_5%~D

12

D12

DA204U_SOT323~D

@

2

31

C229

1U_0603_10V4Z~D

1

2

G

D

SQ45

2N7002_SOT23~D

2

13

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USBP2_D-

USBP2_D+

COEX3

HW_RADIO_DIS#

COEX2_WLAN_ACTIVE

COEX1_BT_ACTIVE

ICH_AC_SDOUT_MDCTERM

ICH_SDOUT_MDC

MDC_AC_BITCLK_TERM

MDC_AC_BITCLK

MDC_SDIN

SUB_SHUTDOWN#

SUB_GAIN1

SUB_GAIN0

SUB_GAIN0

SUB_GAIN1

SUB_OUT2

SUB_OUT1SUBOUT1

SUBOUT2 SUBOUT1

SUBOUT2

SUB_SHUTDOWN#

ICH_SYNC_MDC

ICH_SDOUT_MDC

ICH_RST_MDC#

SUB_VREF

SUB_VREF

SUBOUT1

SUBOUT2

SUB_DETECT#

SUB_OUT1

SUB_OUT2

MODE

MODE

SUB_OUT2_P

SUB_OUT1_N

SUB_SHUTDOWN#

SUBOUT2

SUBOUT1

+3VSUS

+3VRUN

+15V

+15V

+15V

+15V

+3VRUN

+3VRUN

+15V

+15V

+3VRUN

BT_ACTIVE<37>

USBP2_D+<28> USBP2_D-<28>

HW_RADIO_DIS#<33,35>

COEX1_BT_ACTIVE<33>

COEX2_WLAN_ACTIVE<33>

ICH_RST_MDC#<21>

ICH_SYNC_MDC<21>

ICH_AC_SDIN1<21>

AUD_MONO_OUT<25>

MDC_AC_BITCLK <25>

ICH_SDOUT_MDC<21>

SUB_DETECT#<34>

SPK_SHUTDOWN#<25,26>

AUD_MONO_OUT<25>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

SUBWOOFER,BT PORT and MDC

27 50, 12, 2004

Compal Electronics, Inc.

W=20 mil

Place near BT

Gain Setting

GAIN0 GAIN1 Amplifier gain(db) INPUT

0

1

12dB

23.6dB

36dB

IMPEDANCE

241K ohm

168K ohm

104K ohm

33K ohm

18dB0

0

0

1 1

1

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C378

1000P_0402_50V7K~D

1

2

R144

10K_0402_5%~D

12

U33

TPA3001D1PWP_TSSOP24~D

INN

1

INP

2

GAIN0

3

GAIN1

4

SHDN

5

PGND

6

VCLAMP

7

BSN 8

PVCC 9

OUTN 10

OUTN 11

PGND

12

PGND

13

OUTP 14

OUTP 15

PVCC 16

BSP 17

AGND

18

AGND

19

ROSC

20

COSC

21

BYPASS

22

VREF

23

VCC

24 R532

51_0603_1%~D

1 2

C273

10P_0402_50V8J~D@

1 2

C224

4.7U_0805_10V4Z~D

1

2

C634

0.22U_0603_10V7K~D

1 2

R536

100K_0402_5%~D@

12

R514

15K_0402_5%

@

12

+

C354

150U_4B_16VM~D@

1

2

R12

0_0805_5%~D@

1 2

+

C646

150U_4B_16VM~D

1

2

R349

0_0805_5%~D

1 2

Q51

DTC144EKA_SOT23~D@

2

13

C635

1000P_0402_50V7K~D

1 2

G

D

S

Q12

2N7002_SOT23~D

2

13

D8

DA204U_SOT323~D

@

2

31

C219

0.1U_0402_16V4Z~D

1

2

R537

100K_0402_5%~D

12

C235

10P_0402_50V8J~D@

1

2

C377

1000P_0402_50V7K~D

1

2

R213

10_0402_5%~D@

1 2

+

C372

150U_4B_16VM~D@

1

2

R538

100K_0402_5%~D@

12

D6

B130-13_SMA~D

2 1

R205

10_0402_5%~D@

1 2

C625

1U_0805_25V4Z~D

1

2

U10C

SN74LVC3G14DCTR_SSOP8~D@

P8

A

3Y5

G

4

R202

33_0402_5%~D

1 2

R531

51_0603_1%~D

1 2

C201

10P_0402_50V8J~D@

1

2

R539

1.21K_0603_1%~D

1 2

+

C619

150U_4B_16VM~D@

1

2

R534

120K_0402_5%~D

12

L65

BLM21PG600SN1D_0805~D

1 2

C615

10U_1210_25V6K~D

1

2

C381

1000P_0402_50V7K~D

@

1

2

T17

PAD~D

C624

1U_0805_25V4Z~D

1 2

C645

1U_0805_25V4Z~D

@

1

2

R535

100K_0402_5%~D

12

JBT

E&T_3702-10-1~D

1

2

3

4

5

6

7

8

9

10

11

12

U11

TC7SH08FU_SSOP5~D

B

1

A

2

G

3

O4

P5

C623

1U_0805_25V4Z~D

1 2

C281

10P_0402_50V8J~D@

1 2

C616

0.47U_0603_16V7K~D@

1 2

C626

1U_0805_25V4Z~D

1 2

C629

0.22U_0603_10V7K~D

1 2

C636

1U_0805_25V4Z~D

1

2

R521

4.7K_0402_5%~D

@

12

R345

10K_0402_5%~D

12

C627

220P_0402_50V7K~D

1

2

R79

0_0805_5%~D@

1 2

C637

0.056U_0603_10V7K~D

1 2

+

C353

150U_4B_16VM~D@

1

2

L64

BLM21PG600SN1D_0805~D

1 2

R541

1K_0402_5%~D

@

1 2

U31

TDA1517ATW_HTSSOP20~D@

IN1+

3

IN2-

18

SVRR

5

VP1

15

VP2

16

OUT2B 13

SGND 4

PGND1 10

PGND2 11

MODE

17

NC1 1

NC2 2

NC3 6

NC4 7

NC5 14

NC6 19

NC7 20

OUT1A 8

OUT1B 9

OUT2A 12

Connector for MDC Rev1.5

JMDC

TYCO_1-179397-2~D

GND1

1

IAC_SDATA_OUT

3

GND2

5

IAC_SYNC

7

IAC_SDATA_IN

9

IAC_RESET#

11

RES0 2

RES1 4

3.3V 6

GND3 8

GND4 10

IAC_BITCLK 12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

C380

1000P_0402_50V7K~D@

1

2

D9

DA204U_SOT323~D

@

2

31

C621

0.22U_1206_25V7M~D

1 2

C617

0.1U_0603_25V7K~D@

1

2

D7

B130-13_SMA~D

2 1

JWOFR

E&T_3801-04

1

12

23

34

4

C280

10P_0402_50V8J~D@

1 2

C622

0.22U_1206_25V7M~D

1 2

R155

10K_0402_5%~D

12

R346

0_0805_5%~D

1 2

C379

0.1U_0402_16V4Z~D

1 2

C628

1U_0805_25V4Z~D

1

2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USBP1_D-

CBS_CAD15_L

USBP1_D+

USBP0_D+

USBP5_D-

USBP2_D-

USBP0_D-

USBP2_D+

CBS_CAD13_L

USBP4_D-

USBP5_D+

USBP6_D-

USBP6_D+

USBP7_D-

USBP7_D+

USBP0_D-

USBP0_GND

USBP0_D+

USBP6_D+

USBP6_D-

USBP6_GND

USBP6_VCC

USBP7_GND

USBP7_D-

USBP7_VCC

USBP7_D+

USBP4_D+

USBP4_D-

USBP5_D-

USBP4_GND

USBP5_VCC

USBP5_GND

USBP4_VCC

USBP4_D+

USBP5_D+

USB_BACK_EN#

USB_OC6#

USB_OC7#

USB_SIDE_EN#

USB_OC4#

USB_OC5#

USB_SIDE_EN#

USB_OC0#

USBP0_VCC

USBP1_D-

USBP1_D+

USBP1_VCC

USBP1_GND

USB_OC1#

USBP0_PWR

USBP6_PWR

USBP7_PWR

USBP4_PWR

USBP5_PWR

+5VSUS

USBP6_PWR

USBP7_PWR

+5VSUS

USBP4_PWR

USBP5_PWR

USBP0_PWR

+5VSUS

USBP1_PWR

USBP1_PWR

USBP2-<22>

USBP5-<22>

USBP1-<22>

USBP5+<22>

USBP1+<22>

USBP4-<22>

USBP4+<22>

USBP0-<22>

USBP2+<22>

USBP0+<22>

USB_BACK_EN#<34>

USB_OC6# <22>

USB_OC7# <22>

USB_SIDE_EN#<34>

USB_OC4# <22>

USB_OC5# <22>

USB_SIDE_EN#<34>

USB_OC0# <22>

USBP2_D- <27>

USBP2_D+ <27>

CBS_CAD15<31>

CBS_CAD13<31>

CBS_CAD15_L <32>

CBS_CAD13_L <32>

USBP6-<22>

USBP6+<22>

USBP7-<22>

USBP7+<22>

USB_OC1# <22>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

USB 2.0 PORT

28 50, 12, 2004

Compal Electronics, Inc.

2

3BlueTooth

1

4NEW CARD

USB PORT#

0

DESTINATION

5

7

6

JUSB1 (Top)

PLACE CHOKE

NEAR

CONNECTOR

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

JUSB2 (Top)

JUSB2 (Bottom)

JUSB3 (Top)

JUSB3 (Bottom)

JUSB1 (Bottom)

C7

0.1U_0402_16V4Z~D

1

2

+

C21

150U _D2_6.3VM~D

1

2

L39

BLM21PG600SN1D_0805~D

1 2

C576

0.1U_0402_16V4Z~D

1

2

L69 DLW21SN900SQ2_0805~D@

1

1

4

433

22

U22

TPS2062DR_SO8~D

GND

1

IN

2

EN1#

3

EN2#

4

OC1# 8

OUT1 7

OUT2 6

OC2# 5

L10

BLM21PG600SN1D_0805~D

1 2

L38 DLW21SN900SQ2_0805~D@

1

1

4

433

22

R10

0_0402_5%~D

1 2

C388

47P_0402_50V8J~D

@

1

2

R361

0_0402_5%~D

1 2

L36

BLM21PG600SN1D_0805~D

1 2

R366

0_0402_5%~D

1 2

+

C278

150U _D2_6.3VM~D

1

2

C259

10U_1206_16V4Z~D

1

2

L2

BLM21PG600SN1D_0805~D

1 2

C285

10U_1206_16V4Z~D

1

2

JUSB3

JST_SM8B-SRSS~D

1

12

23

34

4

5

56

67

78

8

99

10 10

L14

BLM21PG600SN1D_0805~D

1 2

C375

47P_0402_50V8J~D

@

1

2

C387

47P_0402_50V8J~D

@

1

2

C274

47P_0402_50V8J~D

@

1

2

R247

0_0402_5%~D

1 2

L72 DLW21SN900SQ2_0805~D@

1

1

4

433

22

JUSB2

FOX_UB11123-8Z4-HT~D

A_VCC

A1

A_D-

A2

A_D+

A3

A_GND

A4

B_VCC

B1

B_D-

B2

B_D+

B3

B_GND

B4

G1

9

G2

10

G3

11

G4

12

L12

BLM21PG600SN1D_0805~D

1 2

JUSB1

FOX_UB11123-8Z4-HT~D

A_VCC

A1

A_D-

A2

A_D+

A3

A_GND

A4

B_VCC

B1

B_D-

B2

B_D+

B3

B_GND

B4

G1

9

G2

10

G3

11

G4

12

C265

47P_0402_50V8J~D

@

1

2

C575

0.1U_0402_16V4Z~D

1

2

C394

47P_0402_50V8J~D

@

1

2

R238

0_0402_5%~D

1 2

L42

BLM21PG600SN1D_0805~D

1 2

C87

0.1U_0402_16V4Z~D

1

2

R342

0_0402_5%~D

1 2

L40 DLW21SN900SQ2_0805~D@

1

1

4

433

22

C395

47P_0402_50V8J~D

@

1

2

C286

47P_0402_50V8J~D

@

1

2

L44

BLM21PG600SN1D_0805~D

1 2

R269

0_0402_5%~D

1 2

L41 DLW21SN900SQ2_0805~D@

1

1

4

433

22

C15

0.1U_0402_16V4Z~D

1

2

+

C88

150U _D2_6.3VM~D

1

2

C262

47P_0402_50V8J~D

@

1

2

R246

0_0402_5%~D

1 2

U20

TPS2062DR_SO8~D

GND

1

IN

2

EN1#

3

EN2#

4

OC1# 8

OUT1 7

OUT2 6

OC2# 5

C277

47P_0402_50V8J~D

@

1

2

+

C19

150U _D2_6.3VM~D

1

2

R341

0_0402_5%~D

1 2

C14

47P_0402_50V8J~D

@

1

2

L9

BLM21PG600SN1D_0805~D

1 2

C282

47P_0402_50V8J~D

@

1

2

C16

0.1U_0402_16V4Z~D

1

2

+

C12

150U _D2_6.3VM~D

1

2

L17

BLM21PG600SN1D_0805~D

1 2

R237

0_0402_5%~D

1 2 C275

47P_0402_50V8J~D

@

1

2

L59 DLW21SN900SQ2_0805~D@

1

1

4

433

22

R365

0_0402_5%~D

1 2

C261

0.1U_0402_16V4Z~D

1

2

C374

47P_0402_50V8J~D

@

1

2

L8 DLW21SN900SQ2_0805~D@

1

1

4

433

22

C279

0.1U_0402_16V4Z~D

1

2

L7

BLM21PG600SN1D_0805~D

1 2

R9

0_0402_5%~D

1 2

R245

0_0402_5%~D

1 2

L1

BLM21PG600SN1D_0805~D

1 2

R243

0_0402_5%~D

1 2

U2

TPS2062DR_SO8~D

GND

1

IN

2

EN1#

3

EN2#

4

OC1# 8

OUT1 7

OUT2 6

OC2# 5

C41

10U_1206_16V4Z~D

1

2

C13

47P_0402_50V8J~D

@

1

2

+

C250

150U _D2_6.3VM~D

1

2

C263

47P_0402_50V8J~D

@

1

2

R360

0_0402_5%~D

1 2

L43 DLW21SN900SQ2_0805~D@

1

1

4

433

22

R268

0_0402_5%~D

1 2

C47

0.1U_0402_16V4Z~D

1

2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_C_BE1#

PCI_REQ4#

PCI_AD17

PCI_STOP#

PCI_AD29

PCI_C_BE0#

PCI_AD26

PCI_TRDY# LAN_TRST#

V_1P2_PLLVDD_PHY

XTALI

PCI_AD7

LAN_CTRL_1P2V

PCI_AD27

PCI_AD21

PLTRST_LOM#

LAN_CTRL_2P5V

PCI_AD25

PCI_AD13

LAN_EEDATA_SPROM_CS

LAN_ACT#

PCI_AD10

LAN_EEPROM_W

PCI_PAR

PCI_SERR#

PCI_AD1

PCI_AD3

PCI_C_BE2#

CK_33M_LANPCI

PCI_C_BE3#

PCI_FRAME#

PCI_AD20

PCI_IRDY#

PCI_AD12

PCI_AD0

LAN_AUXPWR

PCI_PERR#

LAN_TX3+

PCI_AD16

LINK_10#

PCI_AD18

PCI_GNT4#

PCI_PIRQC#

PCI_AD30

XTALO

PCI_AD4

LAN_TX3-

LAN_TX2-

PCI_AD9

PCI_AD31

PCI_AD14

PCI_AD22

PCI_AD15

PCI_AD11

PCI_AD28

PCI_AD19

PCI_AD16

PCI_AD5

LAN_EECLK_SPROM_CLK

LAN_TX2+

PCI_AD8

PCI_DEVSEL#

LINK_100#

LAN_RDAC

PCI_AD24

PCI_AD23

VAUX_LAN

PCI_AD6

PCI_AD2

LAN_TX0-

LAN_TX0+

LAN_TX1+

LAN_TX1-

LAN_IDSEL

LAN_SPROM_DOUT

SYS_PME#

CLK_82540_TERMCK_33M_LANPCI

5705M_LOWPWR

NC_LAN_N9

5705M_CLOCKRUN

LAN_BIAS

Z2702

LAN_EEPROM_W

LAN_SPROM_DIN

LAN_CTRL_2P5V

LAN_CTRL_1P2V

NC_LAN_P9

LAN_SPROM_DOUT

V_1P2_PLLVDD_PHY

LAN_EEDATA_SPROM_CS

LAN_EECLK_SPROM_CLK

AVDD2P5

LAN_EECLK_SPROM_CLK

LAN_EEDATA_SPROM_CS

AVDD1P2

LAN_SPROM_DIN

V_2P5_LAN

V_2P5_LAN

V_3P3_LAN

V_2P5_LAN

V_1P2_LAN

V_3P3_LAN

V_3P3_LAN

V_3P3_LAN

V_2P5_LAN

V_1P2_LAN

V_1P2_LAN

+3V_LOM_PCI

V_1P2_LAN

V_3P3_LAN

V_2P5_LAN

V_3P3_LAN

V_2P5_LAN

V_2P5_LAN

V_2P5_LAN

V_1P2_LAN

+3VSRC

V_3P3_LAN +3VRUN

+3V_LOM_PCI

+3V_LOM_PCI

V_3P3_LAN

PCI_IRDY#<20,31,33>

LAN_TX2+ <30>

PCI_C_BE1#<20,31,33>

PCI_SERR#<20,31,33>

PCI_TRDY#<20,31,33>

CK_33M_LANPCI<6>

PCI_AD[0..31]<20,31,33>

SYS_PME#<31,33,34>

LAN_ACT# <30>

PCI_GNT4#<20>

LINK_10# <30>

PCI_REQ4#<20>

PCI_DEVSEL#<20,31,33>

PCI_FRAME#<20,31,33>

PCI_C_BE3#<20,31,33> PCI_C_BE2#<20,31,33>

ENAB_3VLAN<38>

PCI_PERR#<20,31,33>

LINK_100# <30>

PCI_C_BE0#<20,31,33>

LAN_TX3- <30>

LAN_TX2- <30>

LAN_TX3+ <30>

PCI_PAR<20,31,33>

PLTRST_LOM#<20> PCI_PIRQC#<20,31>

PCI_STOP#<20,31,33>

LAN_TX0- <30>

LAN_TX0+ <30>

LAN_TX1- <30>

LAN_TX1+ <30>

CLKRUN#<22,31,33,34>

LAN_LOW_PWR <35>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

LAN Controller (BCM4401)

29 50, 12, 2004

Compal Electronics, Inc.

2

BCP69

4

C

1E

3

C

B

for 4401 :1.27K

for 5705M:1.24K

R136

For 5705M only

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Note: Place these components

as closeto the chip as possible.

For 4401 only

Note: Place these components

as closeto the chip as possible.

Note: Place these components

as closeto the chip as possible.

R540

R72

10K_0402_5%~D

12

C411

0.1U_0402_16V4Z~D

1

2

L26

BLM11A601S_0603~D

@

12

L23

BLM11A601S_0603~D

@

1 2

C45

10U_0805_10V4M~D

1

2

C43

0.1U_0402_16V4Z~D

1

2

C91

0.1U_0402_16V4Z~D

1

2

C24

0.01U_0402_16V7K~D

1

2

C32

0.1U_0402_16V4Z~D

1

2

C76

0.1U_0402_16V4Z~D

1

2

C30

0.1U_0402_16V4Z~D

1

2

Q38

BCP69_SOT223~D@

3

1

2

4

C61

0.1U_0402_16V4Z~D

@

1

2

R135

4.7K_0603_1%~D

12

C35

0.1U_0402_16V4Z~D

1

2

C37

0.1U_0402_16V4Z~D

1

2

BCM4401

U5B

BCM4401KFB_FBGA196~D

VDDC_E12

E12

VDDC_H5

H5

VDDC_H6

H6

VDDC_H7

H7

VDDC_H8

H8

VDDC_J5

J5

VDDC_J6

J6

VDDC_J7

J7

VDDC_J8

J8

VDDC_J9

J9

VDDC_J10

J10

VDDC_K5

K5

VDDC_K6

K6

VDDC_K7

K7

VDDC_K8

K8

VDDC_K9

K9

VDDC_K10

K10

VDDC_L5

L5

VDDC_L10

L10

VDDC_M14

M14

VDDC_N14

N14

VDDC_P8

P8

VDDC_P12

P12

VDDC_P13

P13

VDDC_P14

P14

CSTSCHG

C8

CLKRUN

H4

NC_H10

H10

NC_J4

J4

NC_K4

K4

NC_J11

J11

NC_K11

K11

NC_L7

L7

NC_L8

L8

VDDIO_A11

A11

VDDIO_F11

F11

VDDIO_K12

K12

VDDIO_L12

L12

VDDP_K14

K14

VDDP_L13

L13

VDDP_P11

P11

VDDIO-PCI_A7

A7

VDDIO-PCI_B3

B3

VDDIO-PCI_C5

C5

VDDIO-PCI_E1

E1

VDDIO-PCI_E4

E4

VDDIO-PCI_G1

G1

VDDIO-PCI_K3

K3

VDDIO-PCI_L4

L4

VDDIO-PCI_N6

N6

VDDIO-PCI_P2

P2

VSS_B7 B7

VSS_D4 D4

VSS_D5 D5

VSS_D6 D6

VSS_D7 D7

VSS_D8 D8

VSS_D9 D9

VSS_E2 E2

VSS_E5 E5

VSS_E6 E6

VSS_E7 E7

VSS_E8 E8

VSS_E9 E9

VSS_F5 F5

VSS_F6 F6

VSS_F7 F7

VSS_F8 F8

VSS_F9 F9

VSS_F10 F10

VSS_G4 G4

VSS_G5 G5

VSS_G6 G6

VSS_G7 G7

VSS_G8 G8

VSS_G9 G9

VSS_G10 G10

VSS_H9 H9

VSS_K2 K2

VSS_L6 L6

VSS_L9 L9

VSS_M6 M6

VSS_M12 M12

VSS_M13 M13

VSS_N1 N1

VSS_N12 N12

VSS_N13 N13

NC_L11 L11

NC_L14 L14

NC_M8 M8

NC_M9 M9

LOW_POWER M11

NC_N8 N8

NC_N9 N9

NC_P9 P9

AVDDL_F12 F12

AVDDL_F13 F13

AVDD_F14 F14

AVDD_A13 A13

R60

1K_0402_5%~D

@

12

BCM4401

U5A

BCM4401KFB_FBGA196~D

AD31

B8

AD30

A8

AD29

C7

AD28

C6

AD27

B6

AD26

B5

AD25

A5

AD24

B4

AD23

B2

AD22

B1

AD21

C1

AD20

D3

AD19

D2

AD18

D1

AD17

E3

AD16

K1

AD15

L2

AD14

L1

AD13

M3

AD12

M2

AD11

M1

AD10

N2

AD9

N3

AD8

P3

AD7

N4

AD6

P4

AD5

M5

AD4

N5

AD3

P5

AD2

P6

AD1

M7

AD0

N7

CBE3

C4

CBE2

F3

CBE1

L3

CBE0

M4

IDSEL

A4

FRAME

F2

IRDY

F1

TRDY

G3

DEVSEL

H3

STOP

H1

PERR

J2

SERR

A2

PAR

J1

PCI_CLK

A3

INTA

H2

PCI_RST

C2

GNT

J3

REQ

C3

VAUXPRSNT

J12

M66EN

F4

PME

A6

TRD3+ E13

TRD3- E14

TRD2+ D13

TRD2- D14

TRD1+ C13

TRD1- C14

TRD0+ B13

TRD0- B14

REGSUP12 B9

REGCTL12 B10

REGSEN12 A9

REGSUP25 B11

REGCTL25 C11

REGSEN25 C10

VESD1 P1

VESD2 G2

VESD3 A1

EEDATA P10

EECLK M10

GPIO0 H12

GPIO1 K13

GPIO2 J13

LINKLEDB G13

SPD100LEDB H13

SPD1000LEDB G12

TRAFFICLEDB G14

PLLVDD2 H14

NC P7

TCK C12

TDI D12

TDO B12

TMS A12

TRST D11

SMB_CLK A10

SMB_DATA C9

BIASVDD A14

RDAC D10

SO G11

SI E10

SCLK E11

CS H11

XTALVDD J14

XTALO N10

XTALI N11

C103

0.1U_0402_16V4Z~D

1

2

C50

0.1U_0402_16V4Z~D

1

2

X1

25MHz_20P_1BX25000CK1A~D

12

C34

0.1U_0402_16V4Z~D

1

2

C114

8.2P_0402_50V8J~D@

1 2

C33

0.1U_0402_16V4Z~D

@

1

2

C26

27P_0402_50V8J 1

2

C22

4.7U_0805_10V4Z~D

@

1

2

C63

0.1U_0402_16V4Z~D

1

2

R29

0_0402_5%~D@

1 2

R39

4.7K_0402_5%~D

12

S

G

D

Q13

SI3456DV-T1_TSOP6~D

3

6

245

1

R130

10_0402_5%~D@

12

C104

0.1U_0402_16V4Z~D

1

2

L22

BLM11A601S_0603~D

1 2

C52

0.1U_0402_16V4Z~D

@

1

2

U3

AT93C46-10SI-2.7_SO8~D

CS

1

SK

2

DI

3

DO

4

VCC 8

NC 7

ORG 6

GND 5

L28

BLM31A260SPT_1206~D

1 2

C46

0.1U_0402_16V4Z~D

1

2

C25

27P_0402_50V8J 1

2

C421

10U_0805_10V4M~D

1

2

C113

10U_0805_10V4M~D

1

2

R33

10K_0402_5%~D

12

C86

1U_0603_10V4Z~D

1

2

C404

4.7U_0805_10V4Z~D

@

1

2

C29

0.1U_0402_16V4Z~D

1

2

C59

0.1U_0402_16V4Z~D

1

2

L13

BLM11A601S_0603~D

1 2

C73

0.1U_0402_16V4Z~D

1

2

C109

1000P_0402_50V7K~D

1

2

R35

1K_0402_5%~D@

1 2

C70

2.2U_0805_10V6K~D

1

2

C56

0.1U_0402_16V4Z~D

1

2

R34 0_0402_5%~D

1 2

R540

0_0402_5%~D

1 2

R77

0_0402_5%~D

1 2

C60

10U_0805_10V4M~D

@

1

2

C80

0.1U_0402_16V4Z~D

1

2

Q36

BCP69_SOT223~D@

3

1

2

4

C402

0.1U_0402_16V4Z~D

@

1

2

R128

100_0402_5%~D

1 2

R30

0_0402_5%~D

1 2

R136

1.27K_0603_1%~D

12

C36

0.1U_0402_16V4Z~D

1

2

U6

AT24C256_SO8~D@

A0 1

A1 2

NC 3

GND 4

VCC

8

WP

7

SCL

6

SDA

5

C105

0.1U_0402_16V4Z~D

1

2

R32 0_0402_5%~D

1 2

C108

0.1U_0402_16V4Z~D

1

2

C68

0.1U_0402_16V4Z~D

@

1

2

C82

0.1U_0402_16V4Z~D

1

2

C58

10U_0805_10V4M~D

1

2

C31

0.1U_0402_16V4Z~D

1

2

L18

BLM11A601S_0603~D

1 2

C102

0.1U_0402_16V4Z~D

@

1

2

C55

4.7U_0805_10V4Z~D

1

2

C71

0.1U_0402_16V4Z~D

1

2

C27

10U_0805_10V4M~D

1

2

L27

BLM11A601S_0603~D

12

R69

4.7K_0402_5%~D@

12

C48

0.1U_0402_16V4Z~D

1

2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LAN_ACTLED_YEL#

LED_10_GRN#

LED_100_ORG#

LED_10_GRN# LED_100_ORG#LAN_ACTLED_YEL#

V_2P5_LAN

V_3P3_LAN

V_3P3_LAN V_3P3_LANV_3P3_LAN

LAN_TX0+<29>

LAN_TX2-<29>

LAN_TX2+<29>

LAN_TX0-<29>

LAN_TX1+<29>

LAN_TX3+<29>

LAN_TX3-<29>

LINK_10#<29> LINK_100#<29>LAN_ACT#<29>

LAN_TX1-<29>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

LAN Transfomer and RJ45

30 50, 12, 2004

Compal Electronics, Inc.

Layout Notice : Place

termination as close as

chip as possible

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Place these caps as close

to the center tap pins

of the mag/connector.

R52

200_0402_5%~D

12

C397 0.01U_0402_16V7K~D

1

2

R23

49.9_0603_1%~D

@

1 2

C398 0.01U_0402_16V7K~D

1

2

R22

49.9_0603_1%~D

@

1 2

R351

0_0402_5%~D

1 2

R27

49.9_0603_1%~D

1 2

R353

0_0402_5%~D

1 2

1000pF 2KV

4 X 75 OHMS

1CT:1CT

1CT:1CT

1CT:1CT

1CT:1CT

TRP1P

TRP1N

TRP2P

TRP2N

TRP3P

TRP3N

TRP4P

TRP4N

JLOM

TYCO_1368398-1~D

TRD1P

11

TRCT1

12

TRD1N

10

TRD2P

4

TRCT2

6

TRD2N

5

TRD3P

3

TRCT3

1

TRD3N

2

TRD4P

8

TRCT4

7

TRD4N

9

YELLOW

13

COMMON0

14

COMMON1

16

GREEN

17

ORANGE

15

SHIELD0

18

SHIELD1

19

20

20

21

21

R377

200_0402_5%~D

12

R24

49.9_0603_1%~D

@

1 2

C40

0.1U_0402_16V4Z~D

@

1

2

R21

49.9_0603_1%~D

@

1 2

R28

49.9_0603_1%~D

1 2

C399 0.01U_0402_16V7K~D

1

2

R25

49.9_0603_1%~D

1 2

C396 0.01U_0402_16V7K~D

1

2

R350

10K_0402_5%~D

1 2

R354

0_0402_5%~D

1 2

R355

10K_0402_5%~D

1 2

R352

10K_0402_5%~D

1 2

C39

0.1U_0402_16V4Z~D

@

1

2

R26

49.9_0603_1%~D

1 2

C28

0.1U_0402_16V4Z~D

1

2

C38

0.1U_0402_16V4Z~D

1

2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

R5C841XI

R5C841XO

CBS_CSTSCHNG

CBS_CCLKRUN#

CBS_CCLK_INTERNAL

CBS_CINT#

CBS_CRST#

CBS_CAUDIO

IEEE1394_TPAN0

CBS_RSVD/A18

IEEE1394_TPAP0

IEEE1394_TPBP0

IEEE1394_TPBN0

IEEE1394_TPBIAS0

CBS_RSVD/D14

CBS_RSVD/D2

CBS_CCD2#_INTERNAL

CBS_CCD1#_INTERNAL

CBS_CVS2

CBS_CVS1

PCI_AD29

PCI_AD30

PCI_AD28

PCI_AD31

PCI_AD26

PCI_AD25

PCI_AD27

PCI_AD22

PCI_AD23

PCI_AD20

PCI_AD24

PCI_AD21

PCI_AD18

PCI_AD17

PCI_AD19

PCI_AD14

PCI_AD16

PCI_AD13

PCI_AD15

PCI_AD12

PCI_AD11

PCI_AD10

PCI_AD9

PCI_AD7

PCI_AD6

PCI_AD8

PCI_AD4

PCI_AD5

PCI_AD1

PCI_AD2

PCI_AD3

PCI_AD0

PCI_C_BE3#

PCI_C_BE0#

PCI_C_BE2#

PCI_C_BE1#

PCI_PAR

PCI_FRAME#

PCI_STOP#

PCI_DEVSEL#

PCI_TRDY#

PCI_IRDY#

PCI_AD17 CBS_IDSEL

PCI_REQ1#

PCI_GNT1#

PCI_PERR#

PCI_SERR#

CBS_GRST#

PCIRST_CB#

IEEE1394_TPBIAS0

IEEE1394_TPBN0

CK33M_CBS_TERM

TPA0+

TPB0+

TPA0-

TPB0-

Z3008

CK_33M_CBPCI

CBS_CC/BE3#

CBS_CC/BE2#

CBS_CC/BE0#

CBS_CC/BE1#

CBS_CPAR

CBS_CDEVSEL#

CBS_CTRDY#

CBS_CFRAME#

CBS_CIRDY#

CBS_CSTOP#

CBS_CPERR#

CBS_CSERR#

CBS_CREQ#

CBS_CGNT#

SD_EN

CBS_CBLOCK#

CBS_GRST#

CBS_SPK

IEEE1394_TPBP0

IEEE1394_TPAP0

IEEE1394_TPAN0

SD_EN

R5C841XI

R5C841XO

CBS_CRST#

+3VRUN

+3VSUS

+3V_PHY

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+SD_VCC

VPPEN0<32> VPPEN1<32>

VCC5EN#<32> VCC3EN#<32>

SD_CMD <32>

CLKRUN#<22,29,33,34>

SD_DATA0 <32>

SD_DATA1 <32>

SD_DATA2 <32>

SD_DATA3 <32>

CBS_CCLKRUN# <32>

CBS_CSTSCHNG <32>

CBS_CCLK <32>

CBS_CRST# <32>

CBS_CINT# <32>

CBS_CAUDIO <32>

CBS_RSVD/D2 <32>

CBS_RSVD/D14 <32>

CBS_RSVD/A18 <32>

CBS_CCD2# <32>

CBS_CCD1# <32>

CBS_CVS1 <32>

CBS_CVS2 <32>

PCI_AD[0..31]<20,29,33>

PCI_C_BE3#<20,29,33>

PCI_C_BE1#<20,29,33> PCI_C_BE0#<20,29,33>

PCI_C_BE2#<20,29,33>

PCI_PAR<20,29,33>

SYS_PME#<29,33,34>

PCI_TRDY#<20,29,33> PCI_FRAME#<20,29,33>

PCI_IRDY#<20,29,33> PCI_STOP#<20,29,33> PCI_DEVSEL#<20,29,33>

PCI_GNT1#<20> PCI_REQ1#<20>

PCI_PERR#<20,29,33> PCI_SERR#<20,29,33>

PCIRST_CB#<20,33>

CK_33M_CBPCI<6>

CBS_CAD0 <32>

CBS_CAD19 <32>

CBS_CAD17 <32>

CBS_CAD18 <32>

CBS_CAD15 <28>

CBS_CAD12 <32>

CBS_CAD14 <32>

CBS_CAD11 <32>

CBS_CAD10 <32>

CBS_CAD9 <32>

CBS_CAD8 <32>

CBS_CAD7 <32>

CBS_CAD6 <32>

CBS_CAD5 <32>

CBS_CAD4 <32>

CBS_CAD3 <32>

CBS_CAD2 <32>

CBS_CAD1 <32>

CBS_CAD31 <32>

CBS_CAD29 <32>

CBS_CAD27 <32>

CBS_CAD23 <32>

CBS_CAD24 <32>

CBS_CAD28 <32>

CBS_CAD26 <32>

CBS_CAD21 <32>

CBS_CAD20 <32>

CBS_CAD30 <32>

CBS_CAD25 <32>

CBS_CAD13 <28>

CBS_CAD16 <32>

CBS_CAD22 <32>

CBS_CC/BE3# <32>

CBS_CC/BE1# <32>

CBS_CC/BE2# <32>

CBS_CC/BE0# <32>

CBS_CPAR <32>

CBS_CREQ# <32>

CBS_CGNT# <32>

CBS_CSERR# <32>

CBS_CPERR# <32>

CBS_CFRAME# <32>

CBS_CTRDY# <32>

CBS_CSTOP# <32>

CBS_CIRDY# <32>

CBS_CBLOCK# <32>

CBS_CDEVSEL# <32>

PCI_PIRQC#<20,29>

PCI_PIRQD#<20,33>

IRQ_SERIRQ<22,34>

USBP3+<22> USBP3-<22>

PCI_PIRQB#<20,33>

CB_HWSPND#<34> CBS_SPK<25>

SD_DET# <32>

SD_WP <32>

SD_CLK <32>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

CardBus Controller(R5C841)

31 50, 12, 2004

Compal Electronics, Inc.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Layout Note: Shield GND for SD_CLK

Layout Note: Place close to R5C841

and Shield GND for these signals

Layout Note: Shield GND

for USBP3+ and USBP3-

Layout Note: Place close to 1394 CONN.

Layout Note: Place close to R5C841

Layout Note: Shield GND for

IEEE1394_TPA and TPB

Layout Note: Shield GND for

CBS_CAD13 and CBS_CAD15

Layout Note: Shield GND for

CBS_CCLK_INTERNAL and CBS_CCLK

Layout Note: Place close to R5C841

and Shield GND for SD_CLK

For RICHO R5C841 Review Control

REV. Date

12/18/030.1

C400

0.01U_0402_16V7K~D

1

2

C256

22P_0402_50V8J~D

12

C243

0.01U_0402_16V7K~D

1

2

J1394

SUYIN_020115FR004S502ZL~D

1

2

3

4 5

6

R188

100K_0402_5%~D

12

R241

56.2_0603_1%~D

12

R261

5.1K_0603_1%~D

1 2

R242 0_0402_5%~D

1 2

R333 10K_0402_5%~D

1 2

R193 100K_0402_5%~D

1 2

X4

24.576MHz_16P_1BG24576CKIA~D

1 2

R195

100K_0402_5%~D

12

R192100_0402_5%~D

1 2

R191

10K_0603_1%~D

1 2

R73

0_0402_5%~D

1 2

R186

100K_0402_5%~D

12

R5C841

U17B

R5C841_PBGA208~D

CPS

D11

TPAP1

B10

TPAP0

B12

TPAN0

A12

TPBP0

B13

TPBN0

A13

TPBIAS0

D12

XO

B16 XI

A16

TPAN1

A10

TPBP1

B11

TPBN1

A11

VREF

D13

REXT

B14

MDIO00 B1

MDIO01 A2

MDIO02 A3

MDIO03 B3

MDIO04 B4

MDIO05 A5

MDIO06 B5

MDIO07 D5

MDIO08 A6

MDIO09 B6

MDIO10 D6

MDIO11 E6

MDIO12 A7

MDIO13 B7

MDIO14 D7

MDIO15 E7

MDIO16 A8

MDIO17 B8

MDIO18 D8

MDIO19 E8

FIL0

A14

TPBIAS1

D10

USBDP

V14

USBDM

W14

VPPEN0

V13

VPPEN1

W13

VCC5EN#

R13

VCC3EN#

T13

REGEN#

R7

R211

0_0402_5%~D

1 2

R196

10_0402_5%~D

@

12

R183 0_0402_5%~D@

1 2

C236

270P_0402_50V7K~D

@

1

2

C290

0.33U_0603_10V7K~D

1

2

R217

0_0402_5%~D

1 2

R229

56.2_0603_1%~D

12

R185 10K_0402_5%~D@

1 2

C657

1U_0603_10V4Z~D

1

2

C284

270P_0402_50V7K~D

1

2

R232 0_0402_5%~D

1 2

R543

10K_0402_5%~D

12

R74 10K_0402_5%~D

1 2

C171

4.7P_0402_50V8C~D

@

1

2

R190 10K_0402_5%~D

1 2

R230 47_0402_5%~D

12

R239

56.2_0603_1%~D

12

R227 0_0402_5%~D

1 2

U34

RT9701-CB_SOT23-5

VIN

3

VIN/CE

4VOUT 1

VOUT 5

GND

2

C234 0.01U_0402_16V7K~D

1 2

R244

56.2_0603_1%~D

12

R194 10K_0402_5%~D

1 2

R240 0_0402_5%~D

1 2

R5C841

U17A

R5C841_PBGA208~D

AD31

M2

AD30

M1

AD29

N5

AD28

N4

AD27

N2

AD26

N1

AD25

P5

AD24

P4

AD23

R4

AD22

R2

AD21

R1

AD20

T2

AD19

T1

AD18

U2

AD17

U1

AD16

V1

AD15

T7

AD14

V7

AD13

W7

AD12

R8

AD11

T8

AD10

V8

AD9

W8

AD8

R9

AD7

V9

AD6

W9

AD5

T11

AD4

V11

AD3

W11

AD2

T12

AD1

V12

AD0

W12

PAR

V6

DEVSEL#

T5

FRAME#

V3

GNT#

M5

IDSEL

P1

IRDY#

V4

PERR#

W5

REQ#

M4

SERR#

T6

STOP#

V5

TRDY#

W4

CCLK/CADR16 L19

CCLKRUN#/WP(IOIS16#) A18

CRST#/RESET H19

RESERVED/CDATA2 C19

RESERVED/CDATA14 W18

RESERVED/CADR18 N16

CAD31/CDATA10 B19

CAD30/CDATA9 C18

CAD29/CDATA1 D19

CAD28/CDATA8 D18

CAD27/CDATA0 E19

CAD26/CADR0 E16

CAD25/CADR1 F18

CAD24/CADR2 F15

CAD23/CADR3 G18

CAD22/CADR4 G15

CAD21/CADR5 H18

CAD20/CADR6 H15

CAD19/CADR25 J18

CAD18/CADR7 J16

CAD17/CADR24 J15

CAD16/CADR17 P16

CAD15/IOWR# P19

CAD14/CADR9 R19

CAD13/IORD# P18

CAD12/CADR11 R18

CAD11/OE# T19

CAD10/CE2# T18

CAD9/CADR10 U19

CAD8/CDATA15 U18

CAD7/CDATA7 W17

CAD6/CDATA13 V17

CAD5/CDATA6 W16

CAD4/CDATA12 V16

CAD3/CDATA5 W15

CAD2/CDATA11 V15

CAD1/CDATA4 T15

CAD0/CDATA3 R14

CC/BE3#/REG# F16

CC/BE2#/CADR12 K18

CC/BE1#/CADR8 P15

CC/BE0#/CE1# V19

CPAR/CADR13 N15

CAUDIO/BVD2(SPKR#/LED) F19

RESERVED/CADR19 N19

CCD1#/CD1# T14

CCD2#/CD2# D15

CDEVSEL#/CADR21 L18

CFRAME#/CADR23 K16

CGNT#/WE# M15

CINT#/RDY(IREQ#) M18

CIRDY#/CADR15 K15

CREQ#/INPACK# G19

CSTOP#/CADR20 M16

CSTSCHG/BVD1(STSCHG#/RI#) E18

CTRDY#/CADR22 L16

CVS1/VS1# R16

CVS2/VS2# H16

PCICLK

K1

PCIRST#

L4

GBRST#

G2

CPERR#/CADR14 N18

CSERR#/WAIT# G16

HWSPND#

F2

CLKRUN#

L5

INTA#

J2

C/BE3#

P2

C/BE2#

W2

C/BE1#

W6

C/BE0#

T9

INTB#

K4

INTC#

K2

UDIO0/SERIRQ#

J4

UDIO1

H1

UDIO2

H2

UDIO3

H4

UDIO4

H5

UDIO5

G1

RI_OUT#/PME#

G4

SPKROUT

F1

TEST

F4

L37

857CM-0009~D@

11

22

33

44

5

5

6

6

7

7

8

8

C253

0.01U_0402_16V7K~D

1

2

C218

270P_0402_50V7K~D

@

1

2

C255

22P_0402_50V8J~D

12

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CBS_CAD18

CBS_CAD29

CBS_CAD6

CBS_CAD24

CBS_CAD12

CBS_CAD5

CBS_CAD14

CBS_CAD3

CBS_CAD20

CBS_CAD31

CBS_CAD4

CBS_CAD8

CBS_CAD27

CBS_CAD30

CBS_CAD1

CBS_CAD7

CBS_CAD26

CBS_CAD2

CBS_CAD22

CBS_CAD25

CBS_CAD28

CBS_CAD19

CBS_CAD11

CBS_CAD21

CBS_CAD16

CBS_CAD10

CBS_CAD9

CBS_CAD0

CBS_CAD17

CBS_CAD23

CBS_CAD1

CBS_CAD3

CBS_CAD5

CBS_CAD12

CBS_CAD14

CBS_CINT#

CBS_CGNT#

CBS_CIRDY#

CBS_CCLK

CBS_CCLKRUN#

CBS_RSVD/D2

CBS_CAD9

CBS_CC/BE2#

CBS_CAD11

CBS_CC/BE0#

CBS_CC/BE1#

CBS_CPAR

CBS_CPERR#

CBS_CAD18

CBS_CAD20

CBS_CAD21

CBS_CAD22

CBS_CAD23

CBS_CAD24

CBS_CAD25

CBS_CAD26

CBS_CAD27

CBS_CAD29

CBS_CAD7

CBS_CAD0

CBS_CAD30

CBS_CCD2#

CBS_CAD13_L

CBS_CAD15_L

CBS_CAD16

CBS_RSVD/A18

CBS_CAD17

CBS_CVS2

CBS_CAD19

CBS_CAD28

CBS_CAD31

CBS_CSTSCHNG

CBS_CREQ#

CBS_CC/BE3#

CBS_CAUDIO

CBS_CRST#

CBS_CSERR#

CBS_CTRDY#

CBS_CFRAME#

CBS_CBLOCK#

CBS_CSTOP#

CBS_CDEVSEL#

CBS_CVS1

CBS_RSVD/D14

CBS_CAD10

CBS_CAD8

CBS_CCD1#

CBS_CAD6

CBS_CAD4

CBS_CAD2

CBS_VPP

CBS_VCC+3VSUS

+5VSUS

+3V_PHY

+3VSUS

+3VSUS

+3V_PHY

+3VRUN

+3VSUS

+3VSUS

+SD_VCC

CBS_VCC

CBS_VPP

CBS_VCC

CBS_VPP CBS_VPP

CBS_VCC

+SD_VCC

+SD_VCC

CBS_CAD0 <31>

CBS_CAD1 <31>

CBS_CAD2 <31>

CBS_CAD3 <31>

CBS_CAD4 <31>

CBS_CAD5 <31>

CBS_CAD6 <31>

CBS_CAD7 <31>

CBS_CAD8 <31>

CBS_CAD9 <31>

CBS_CAD10 <31>

CBS_CAD11 <31>

CBS_CAD12 <31>

CBS_CAD14 <31>

CBS_CAD16 <31>

CBS_CAD17 <31>

CBS_CAD31 <31>

CBS_CAD30 <31>

CBS_CAD18 <31>

CBS_CAD19 <31>

CBS_CAD20 <31>

CBS_CAD29 <31>

CBS_CAD28 <31>

CBS_CAD21 <31>

CBS_CAD27 <31>

CBS_CAD26 <31>

CBS_CAD25 <31>

CBS_CAD24 <31>

CBS_CAD23 <31>

CBS_CAD22 <31>

VPPEN0<31> VPPEN1<31>

VCC3EN#<31> VCC5EN#<31>

CBS_CCD2# <31>

CBS_RSVD/A18 <31>

CBS_CVS2 <31>

CBS_CINT#<31> CBS_CGNT#<31>

CBS_CIRDY#<31> CBS_CCLK<31>

CBS_CCLKRUN#<31> CBS_RSVD/D2<31>

CBS_CC/BE2#<31>

CBS_CC/BE1#<31>

CBS_CC/BE0#<31>

CBS_CPAR<31>

CBS_CPERR#<31>

CBS_CAUDIO <31>

CBS_CSTSCHNG <31>

CBS_CREQ# <31>

CBS_CC/BE3# <31>

CBS_CRST# <31>

CBS_CSERR# <31>

CBS_CTRDY# <31>

CBS_CFRAME# <31>

CBS_CBLOCK# <31>

CBS_CSTOP# <31>

CBS_CDEVSEL# <31>

CBS_RSVD/D14 <31>

CBS_CVS1 <31>

CBS_CCD1# <31>

CBS_CAD13_L <28>

CBS_CAD15_L <28>

SD_CMD<31>

SD_DATA3<31>

SD_DATA0<31> SD_DATA1<31> SD_DATA2<31>

SD_DET#<31>

SD_CLK<31>

SD_WP<31>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

CardBus/SD card Socket

32 50, 12, 2004

Compal Electronics, Inc.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Layout Note: Place close to SD CONN.

Place close to JCBUS

C240

10U_0805_10V4M~D

1

2

C410

0.01U_0402_16V7K~D

1

2

C652

0.47U_0603_16V7K~D

1

2

C178

0.01U_0402_16V7K~D

1

2

U14

R5331V002-E2-FA_SSOP16~D

VCC3IN

11

NC 10

VCC5_EN

1

EN0

3

EN1

4

FLG

5

VCCOUT 12

VCCOUT 14

VCC5IN

15

VCC3_EN

2

VPPOUT 8

NC 7

NC 6

GND

16

VCC5IN

13

VCCOUT 9

C176

10U_0805_10V4M~D

1

2

JSD

Molex_SD-67840-0002~D

CD/DAT3

1

CMD

2

VSS1

3

VDD

4

CLK

5

VSS2

6

DAT0

7

DAT1

8

DAT2

9

WP

12 WP_VSS

11

DETECT#

10

GND1 13

GND2 14

GND3 15

GND4 16

C227

10U_0805_10V4M~D

1

2

C225

0.01U_0402_16V7K~D

1

2

C202

0.01U_0402_16V7K~D

1

2

C656

1000P_0402_50V7K~D

1

2

C655

1000P_0402_50V7K~D

1

2

C413

10U_0805_10V4M~D

1

2

C648

1U_0603_10V4Z~D

1

2

C239

0.01U_0402_16V7K~D

1

2

R5C841

U17C

R5C841_PBGA208~D

VCC_3V1

F5

VCC_3V2

G5

VCC_3V3

J19

VCC_3V4

K19

VCC_PCI3V1

W3

VCC_PCI3V2

R11

VCC_PCI3V3

R12

VCC_MD3V

A4

VCC_RIN1

R6

VCC_RIN2

E13

VCC_ROUT1

L1

AGND1

A9

AGND2

B9

AGND3

D9

VCC_ROUT2

E14

AVCC_PHY1

E10

AVCC_PHY2

E11

AVCC_PHY3

A17

GND1

J1

GND2

J5

GND3

K5

GND4

E9

GND5

R10

GND6

T10

GND7

V10

GND8

W10

GND9

L15

GND10

M19

NC1 L2

NC2 C1

NC3 D1

NC4 E1

NC5 C2

NC6 D2

NC7 E2

NC8 E4

NC9 E12

AVCC_PHY4

B17

AGND4

D14

AGND5

A15

AGND6

B15

+

C654

22U_D2_6.3VM~D

1

2

C156

0.1U_0402_16V4Z~D

1

2

C649

0.01U_0402_16V7K~D

1

2

C351

0.1U_0402_16V4Z~D

1

2

C179

0.1U_0402_16V4Z~D

1

2

JCBUS

FOX_QT600806-7121_LT~D

A_CAD0

1

A_CAD1

2

A_CAD3

3

A_CAD5

4

GND0

5

A_CAD7

6

A_PCI_C/BE0#

7

A_CAD9

8

A_CAD11

9

GND1

10

A_CAD12

11

A_CAD14

12

A_PCI_C/BE1#

13

A_CPAR

14

GND2

15

A_CPERR#

16

A_CGNT#

17

A_CINT#

18

+AVCC0

19

GND3

20

+AVPP0

21

A_CCLK

22

A_CIRDY

23

A_PCI_C/BE2#

24

GND4

25

A_CAD18

26

A_CAD20

27

A_CAD21

28

A_CAD22

29

GND5

30

A_CAD23

31

A_CAD24

32

A_CAD25

33

A_CAD26

34

GND6

35

A_CAD27

36

A_CAD29

37

CB_A_D2

38

A_CCLKRUN#

39

GND7

40

GND15 80

A_CCD1# 79

A_CAD2 78

A_CAD4 77

A_CAD6 76

GND14 75

CB_A_D14 74

A_CAD8 73

A_CAD10 72

A_CVS1 71

GND13 70

A_CAD13 69

A_CAD15 68

A_CAD16 67

CB_A_A18 66

GND12 65

A_CBLOCK# 64

A_CSTOP# 63

A_CDEVSEL# 62

+AVCC1 61

GND11 60

+AVPP1 59

A_CTRDY# 58

A_CFRAME# 57

A_CAD17 56

GND10 55

A_CAD19 54

A_CVS2 53

A_CRST# 52

A_CSERR# 51

GND9 50

A_CREQ# 49

A_PCI_C/BE3# 48

A_CAUDIO 47

A_CSTSCHG 46

GND8 45

A_CAD28 44

A_CAD30 43

A_CAD31 42

A_CCD2# 41

C653

0.47U_0603_16V7K~D

1

2

C177

0.1U_0402_16V4Z~D

1

2

C650

0.01U_0402_16V7K~D

1

2

C164

0.1U_0402_16V4Z~D

1

2

C509

0.1U_0402_16V4Z~D

1

2

R78

33K_0402_5%~D

12

C228

0.01U_0402_16V7K~D

1

2

C254

0.01U_0402_16V7K~D

1

2

L31

BLM21A601SPT_0805~D

1 2

C412

0.01U_0402_16V7K~D

1

2

C206

0.01U_0402_16V7K~D

1

2

C200

10U_0805_10V4M~D

1

2

C651

0.01U_0402_16V7K~D

1

2

C660

0.1U_0402_16V4Z~D

1

2

C241

0.01U_0402_16V7K~D

1

2

C220

0.01U_0402_16V7K~D

1

2

C355

0.1U_0402_16V4Z~D

1

2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_AD27

PCI_AD10

PCI_AD21

PCI_AD17

PCI_TRDY#

PCI_AD8

PCI_PIRQD#

PCI_AD28

PCI_AD18

PCI_AD0

PCI_AD15

MPCIACT#

PCI_AD31

PCI_AD2

PCI_PIRQB#

PCI_AD13

PCI_FRAME#

PCI_AD29

HW_RADIO_DIS#

PCI_AD29

PCI_AD26

PCI_AD8

PCI_C_BE2#

PCI_AD20

PCI_AD24

PCI_AD14

PCI_AD6

PCI_REQ3#

PCI_AD30

PCI_AD9

PCI_AD28

PCI_SERR# PCI_STOP#

PCI_AD6

PCI_AD27

PCI_AD18

PCI_AD16

PCI_AD16

PCI_AD23

PCI_AD13

PCI_PERR#

PCI_C_BE3#

PCI_AD12

PCI_AD7

PCI_GNT3#

PCI_AD31

PCI_AD5

CK_33M_MINPCI_TERM

PCI_AD4

PCI_AD2

PCI_AD5

PCI_AD23

PCI_AD3

PCI_AD7

PCI_AD30

PCI_AD3

PCI_AD1

PCI_AD19

PCI_AD1

PCI_AD20

PCI_AD21

PCI_C_BE1#

PCI_AD24

PCI_AD12

PCI_AD22

PCI_AD9

PCI_AD10

PCI_DEVSEL#

PCI_AD14

PCI_AD19

PCI_AD26

MINIDSEL

PCI_AD25

PCI_AD17

PCI_AD19

PCI_AD25

PCI_AD11

PCI_PAR

PCI_AD0

PCI_AD15

PCI_C_BE0#

PCI_AD22

PCI_AD4

PCI_IRDY#

PCI_AD11

CLKRUN#

PCIRST_CB#CK_33M_MINIPCI

CK_33M_MINIPCI

SYS_PME#

LED_WLAN24

LED_WLAN5

LED_WLAN24

LED_WLAN5

DEBUG_OUT

+5VRUN

+3VRUN

V_3P3_LAN

+5VRUN

V_3P3_LAN +3VSUS

+3VRUN+3VRUN +3VRUN

+3VALW

PCI_PIRQB# <20,31>

PCI_STOP# <20,29,31>

PCI_PAR <20,29,31>

PCI_IRDY#<20,29,31>

PCI_GNT3# <20>

PCI_DEVSEL# <20,29,31>

PCI_PIRQD#<20,31>

HW_RADIO_DIS#<27,35>

PCI_SERR#<20,29,31>

PCI_C_BE0# <20,29,31>

PCI_REQ3#<20>

PCI_TRDY# <20,29,31>

PCI_C_BE3#<20,29,31>

PCIRST_CB# <20,31>

PCI_PERR#<20,29,31>

PCI_C_BE2#<20,29,31>

PCI_FRAME# <20,29,31>

PCI_C_BE1#<20,29,31>

PCI_AD[0..31]<20,29,31>

CLKRUN#<22,29,31,34>

COEX1_BT_ACTIVE <27>

CK_33M_MINIPCI<6>

COEX2_WLAN_ACTIVE<27>

SYS_PME# <29,31,34>

LED_WLAN_OUT <37>

DEBUG_ENABLE<34>

DEBUG_OUT <34>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

MINIPCI

33 50, 12, 2004

Compal Electronics, Inc.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C131

0.047U_0402_16V4Z~D

1

2

R146 0_0402_5%~D

1 2 R147

10K_0402_5%~D

@

12

JPCI

AMP_1318644-1~D

RING 2

TIP

1

8PMJ-1 4

8PMJ-3

3

8PMJ-2 6

8PMJ-6

5

8PMJ-4 8

8PMJ-7

7

8PMJ-5 10

8PMJ-8

9

LED2_YELP 12

LED1_GRNP

11

LED2_YELN 14

LED1_GRNN

13

RESERVED 16

CHSGND

15

5V 18

INTB#

17

INTA# 20

3.3V

19

RESERVED 22

RESERVED

21

3.3VAUX 24

GROUND

23

RST# 26

CLK

25

3.3V 28

GROUND

27

GNT# 30

REQ#

29

GROUND 32

3.3V

31

PME# 34

AD31

33

RESERVED 36

AD29

35

AD30 38

GROUND

37

3.3V 40

AD27

39

AD28 42

AD25

41

AD26 44

RESERVED

43

AD24 46

C/BE3#

45

IDSEL 48

AD23

47

GROUND 50

GROUND

49

AD22 52

AD21

51

AD20 54

AD19

53

PAR 56

GROUND

55

AD18 58

AD17

57

AD16 60

C/BE2#

59

GROUND 62

IRDY#

61

FRAME# 64

3.3V

63

TRDY# 66

CLKRUN#

65

STOP# 68

SERR#

67

3.3V 70

GROUND

69

DEVSEL# 72

PERR#

71

GROUND 74

C/BE1#

73

AD15 76

AD14

75

AD13 78

GROUND

77

AD11 80

AD12

79

GROUND 82

AD10

81

AD9 84

GROUND

83

C/BE0# 86

AD8

85

3.3V 88

AD7

87

AD6 90

3.3V

89

AD4 92

AD5

91

AD2 94

RESERVED

93

AD0 96

AD3

95

RESERVED 98

5V

97

RESERVED 100

AD1

99

GROUND 102

GROUND

101

M66EN 104

AC_SYNC

103

AC_SDATA_OUT 106

AC_SDATA_IN

105

AC_CODEC_ID0# 108

AC_BIT_CLK

107

AC_RESET# 110

AC_CODEC_ID1#

109

RESERVED 112

MOD_AUDIO_MON

111

GROUND 114

AUDIO_GND

113

SYS_AUDIO_IN 116

SYS_AUDIO_OUT

115

SYS_AUDIO_IN GND 118

SYS_AUDIO_OUT GND

117

AUDIO_GND 120

AUDIO_GND

119

MCPIACT# 122

RESERVED

121

3.3VAUX 124

VCC5A

123

C136

0.1U_0402_16V4Z~D

1

2

U12

TC7SH32FU_SSOP5~D

INB

1

INA

2O4

P5

G

3

C158

0.047U_0402_16V4Z~D

1

2

R150

10K_0402_5%~D

1 2

C133

0.047U_0402_16V4Z~D

1

2

R139 10K_0402_5%~D

12

C470

0.047U_0402_16V4Z~D

1

2

R179

10_0402_5%~D@

1 2

C153

0.047U_0402_16V4Z~D

1

2

C159

0.047U_0402_16V4Z~D

1

2

R149 100K_0402_5%~D

1 2

R145

100_0402_5%~D

1 2

R138 200_0402_5%~D

1 2

C130

0.047U_0402_16V4Z~D

1

2C152

0.047U_0402_16V4Z~D

1

2

C132

0.047U_0402_16V4Z~D

1

2

C135

0.1U_0402_16V4Z~D

1

2

C157

4.7P_0402_50V8C~D

@

1

2

R148 100K_0402_5%~D

1 2

R181

0_0402_5%~D

1 2

C137

0.1U_0402_16V4Z~D

1

2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

KAGND

KSO_17

SYS_PME#

VAUX_EN

LID_CL#

KSO17

HP_NB_SENSE

CB_HWSPND#

USB_BACK_EN#

ATF_INT#

NB_MUTE

SIO_EXT_SMI#

BEEP

SIO_EXT_SCI#

SIO_EXT_WAK#

SIO_RCIN#

DEBUG_OUT

SYS_PME#

SIO_SLP_S5#

LID_CL_SIO#

ATF_INT#

SIO_SLP_S3#

SPDIF_SHDN

SIO_PWRBTN#

SUS_ON

RUN_ON

ICH_PME#

SIO_THRM#

GC_BL_SUSPEND

MODC_EN#

HDDC_EN#

254VCC0

KPLLVCC

LPC_LFRAME#

IRQ_SERIRQ

CLKRUN#

LPC_LAD1

LPC_LAD0

LPC_LAD2

LPC_LAD3

PLTRST_SIO#

LPC_LDRQ1#

CK_33M_SIOPCI

CK_14M_SIO

CK_14M_SIO_TERM

CK_33M_SIOPCI_TERM

LPC_LDRQ0#

CK_14M_SIO

CK_33M_SIOPCI

5V_CAL_SIO#

ICH_PCIE_WAKE#

USB_SIDE_EN#

IDE_RST_MOD

DEBUG_ENABLE

DEBUG_ENABLE

LID_CL_SIO#

TXD0

TXD0

+3VALW

+3VALW

+3.3VX

+3VRUN

+3VRUN+3VALW

+3VRUN

+3VALW

+3VRUN

+5VSUS

KSO_17<36> VAUX_EN<38>

USB_BACK_EN#<28>

LID_CL# <36>

CB_HWSPND#<31> HP_NB_SENSE<26>

SIO_EXT_WAK#<22>

SIO_EXT_SMI#<22>

NB_MUTE<26> SIO_RCIN#<21>

SIO_EXT_SCI#<22>

BEEP<25>

DEBUG_OUT<33>

ATF_INT#<15>

SIO_SLP_S3#<22>

SIO_SLP_S5#<22>

SYS_PME#<29,31,33>

SPDIF_SHDN<19,25>

SUS_ON<38,39,44>

ICH_PME#<20> SIO_THRM#<22>

SIO_PWRBTN#<22> RUN_ON<18,38,39,42,44,45>

MODC_EN#<38>

GC_BL_SUSPEND<18>

HDDC_EN#<38>

CLKRUN# <22,29,31,33>

LPC_LFRAME# <21>

IRQ_SERIRQ <22,31>

LPC_LAD[0..3] <21>

PLTRST_SIO# <20>

LPC_LDRQ1# <21>

LPC_LDRQ0# <21>

CK_14M_SIO<6>

CK_33M_SIOPCI<6>

5V_CAL_SIO#<15>

ICH_PCIE_WAKE#<18,22>

USB_SIDE_EN#<28>

IDE_RST_MOD<24>

SUB_DETECT#<27>

DEBUG_ENABLE<33>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

SIO LPC47N354(1/2)

34 50, 12, 2004

Compal Electronics, Inc.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Note: For system debug

pin4 connect to serial port pin3

R517 10K_0402_5%~D

1 2

C352

0.1U_0402_16V4Z~D

1

2

T34 PAD~D

R502

10_0402_5%~D@

12

R290 10K_0402_5%~D

1 2

C599

0.1U_0402_16V4Z~D

1

2

T13PAD~D

R501

0_0402_5%~D

12

T32 PAD~D

C349

0.1U_0402_16V4Z~D

1

2

C598

4.7P_0402_50V8C~D@

1

2

T14 PAD~D

C373

0.1U_0402_16V4Z~D

1

2

R300 10K_0402_5%~D

1 2

J1397

1.5mm SMT~D@

11

22

33

D21

RB751V_SOD323~D

2 1

R321

10K_0402_5%~D

12

R330

10K_0402_5%~D

12

C601

0.1U_0402_16V4Z~D

1

2

T38 PAD~D

T46 PAD~D

C364

0.1U_0402_16V4Z~D

1

2

R503

10_0402_5%~D@

12

T6 PAD~D

L85

BLM11A121S_0603~D

1 2

R329

10_0402_5%~D

12

C600

0.1U_0402_16V4Z~D

1

2

R288 10K_0402_5%~D

1 2

R320

10K_0402_5%~D

12

C597

4.7P_0402_50V8C~D@

1

2

L46

BLM11A121S_0603~D

1 2

R324

100K_0402_5%~D

12

R289 10K_0402_5%~D

1 2

T16 PAD~D

T31 PAD~D

R338

10K_0402_5%~D

1 2

C614

0.1U_0402_16V4Z~D

1

2

T35 PAD~D

U36

TC7SH04FU_SSOP5~D@

IN A

2

OUT Y 4

NC

1

GND

3

VCC 5

C362

0.047U_0402_10V7K~D

1

2

LPC47N354

256 - LBGA

GPIO

COM1

LPT

GND

MACALLEN III

LPC

8051

GPIO

VCC

LPC INTERFACE

IR

CLOCK

U24A

LPC47N354_LBGA256~D

SGPIO30

F13

SGPIO31

F14

SGPIO32

E16

SGPIO33

E15

SGPIO34

E12

SGPIO35

E13

SGPIO36

D16

SGPIO37

D15

LGPIO50

T5

LGPIO51

N6

LGPIO52

L6

LGPIO53

R6

LGPIO54

T6

LGPIO55

L7

LGPIO56

P7

LGPIO57

N7

LGPIO60/SPCLK

A15

LGPIO61/SPDOUT

D13

LGPIO62/SPDIN

A14

LGPIO63

C12

LGPIO64

B13

LGPIO65

A13

LGPIO66

D12

LGPIO67

F11

LGPIO70

B12

LGPIO71

A12

LGPIO72

C11

LGPIO73

D11

LGPIO74

E11

LGPIO75

A11

LGPIO76

F10

LGPIO77

C10

VCCO/BAT

E2

EC_SCI/SPDIN J12

SER_IRQ T4

CLKRUN# P5

SGPIO40

C16

SGPIO41

B16

SGPIO42

C15

SGPIO43

A16

SGPIO44

D14

SGPIO45

C14

SGPIO46

C13

SGPIO47

B14

VCC2_5/PLL

R5

VSS13/PLL

P6

LAD0 M3

LAD1 R1

LAD2 T1

LAD3 P3

LDRQ0# M6

LDRQ1# R3

LFRAME# N4

LRESET# L2

DLAD0 N2

DLAD1 P1

DLAD2 P2

DLAD3 N3

DLDRQ1# R2

DLFRAME# T2

DSER_IRQ R4

DCLKRUN# T3

RXD1 K1

TXD1 K5

DSR K2

RTS K4

CTS K3

DTR K6

RI B10

DCD L1

GPIO10/WK_SE14/IRMODE/IRRX3B H15

IRRX K14

IRTX M4

GPIOB2/SLCTIN J4

GPIOB1/INIT J5

GPIOC0/PD0 J1

GPIOC1/PD1 H2

GPIOC2/PD2 H1

GPIOC3/PD3 H3

GPIOC4/PD4 H4

GPIOC5/PD5 H5

GPIOC6/PD6 H6

GPIOC7/PD7 H8

OUTD0/SLCT F1

OUTD1/PE G5

OUTD2/BUSY G1

OUTD3/ACK H7

OUTD4/ERROR J6

GPIOB0/STROBE K7

GPIOB3/ALF J7

AGND F3

PCI_CLK

L3

CLOCKI

L4

GPIO83/32KHZ_OUT

B2

VCC1_1

M7

VCC1_2

B11

VCC1_3

R13

VCC1_4

H12

VCC1_5

E14

VCC1_6

B7

VCC1_7

A1

VCC1_8

L11

VCC2_1

G2

VCC2_2

P4

VCC2_3

J2

VCC2_4

M2

VSS1 C2

VSS2 G4

VSS3 N5

VSS4 R15

VSS5 B15

VSS6 G9

VSS7 J3

VSS8 N1

VSS9 T10

VSS10 J11

VSS11 G14

VSS12 B6

R340 0_0402_5%~D

1 2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DAT_KBD

PBAT_PRES#

IN6

IN5

IN5

CLK_KBD

SIO_MSCLK

SIO_MSDAT

CLK_SM1

XOSEL

BAT1_LED#

BAT2_LED#

HW_RADIO_DIS#

FAN2_TACH

FAN2_PWM

RUNPWROK

SIO_A20GATE

RESET_OUT#

FAN1_PWM

SMBDAT_VGA

DAT_SMB

FAN1_TACH

PBAT_SMBDAT

SMBCLK_VGA

PBAT_SMBCLK

CLK_SMB

SMBUS_DATA

SMBUS_CLK

BREATH_LED

EEPROM_WC

SMBDAT_VGA

SMBCLK_VGA

PBAT_SMBDAT

PBAT_SMBCLK

LAN_LOW_PWR

LAN_LOW_PWR

CHG_PBATT

SMBUS_CLK

SMBUS_DATA

FRD#

FWR#

FCS#

SIO_KAH_PGM

KSO16

NUM_LED#

CAP_LED#

SRL_LED#

NB_PSID

THERMTRIP_SIO

H_PROCHOT_SIO#

FPVCC

ALWON

VCC1RST#

ACAV_IN

SYSOPT1

SYSOPT0

POWER_SW#POWER_SW_IN#

AUDIO_AVDD_ON

SIO_FA3

KSO1

SIO_FD6

SIO_FA0

SIO_FA6

KSO8

SIO_FD2

SIO_FD0

KSO11

KSI1

SIO_FA1

KSI0

PBAT_ALARM#

KSO2

SIO_FA12

KSO7

KSI6

KSO0

SIO_FA19

SIO_FA16

SIO_FD1

SIO_FA4

KSI5

KSO15

SIO_FA10

SIO_FD7

KSO9

DAT_SM1 CLK_32KX2

KSO6 SIO_FA11

KSO12

SIO_FA18

KSI3

KSO3

KSO4

SIO_FD4

SIO_FA5

DAT_KBD

KSO10

SIO_FA9

KSO13

SIO_FA8

KSI2

SIO_FD3

KSI7

SIO_FA14

SIO_FA13

CLK_32KX1

SIO_FA2

CLK_KBD

KSO14

SIO_FA17

KSI4

KSO5

SIO_FA7

SIO_FA15

SIO_FD5

PBAT_ALARM#

CHG_PBATT

CLK_SMB

DAT_SMB

POWER_SW_IN#

FPVCC

BID1

BID3

BID2

BID0

BID0

BID1

BID2

BID3

PS_ID_DISABLE#

IN2

IN2

IN6

CLK_SM1

CLK_SM2

DAT_SM1

DAT_SM2

DAT_SM2

CLK_SM2

H_PROCHOT_SIO#

PROCHOT_SFTON

+3VALW+3VALW

+5VRUN

+3VALW

+3VALW

+3VALW

+5VALW

+3.3VX

+3VALW

+3VRUN

+3VALW

+5VALW

+3VALW

+3VALW

+VCCP

+VCCP

PBAT_PRES#<42>

KSI[0..7]<36>

KSO[0..15]<36>

PBAT_ALARM#<42>

SMBCLK_VGA <18>

EEPROM_WC <36>

FAN1_PWM <15>

FAN1_TACH <15>

SIO_FA[0..19] <36>

DAT_SMB <15,36>

BAT1_LED# <37>

PBAT_SMBCLK <42,47>

PBAT_SMBDAT <42,47>

FAN2_PWM <15>

SIO_FD[0..7] <36>

BREATH_LED <37>

SIO_A20GATE <21>

BAT2_LED# <37>

FCS# <36>

FRD# <36>

RUNPWROK <18,39,43,46>

HW_RADIO_DIS# <27,33>

FAN2_TACH <15>

FWR# <36>

CLK_SMB <15,36>

RESET_OUT# <39>

SMBDAT_VGA <18>

LAN_LOW_PWR <29>

KSO16<36>

NB_PSID<41>

SRL_LED#<37> NUM_LED#<37> CAP_LED#<37>

ALWON <44>

VCC1RST# <36>

ACAV_IN <47>

THERMTRIP_SIO<15>

POWER_SW# <15,37>

AUDIO_AVDD_ON <25>

CHG_PBATT <47>

PS_ID_DISABLE#<41>

DAT_SM2<36> CLK_SM2<36>

DAT_SM2<36> CLK_SM2<36>

M_LED_C<36> M_LED_B<36> M_LED_A<36>

H_PROCHOT# <7>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

SIO LPC47N354(2/2)

35 50, 12, 2004

Compal Electronics, Inc.

3.8X12.1mm

1

0

BID0BID3

X01

X00

REV

BID2 BID1

0

0

0

0

0

0

Level shifter

DELL CONFIDENTIAL/PROPRIETARY

LPC47N354 A Rev Anomaly -

Touch Pad IMCLK and IMDAT signals are inverted

Note: SMSC errata

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R511

10K_0402_5%~D

@

1 2

T7 PAD~D

T39 PAD~D

R519

10K_0402_5%~D

1 2

R504

10K_0402_5%~D

1 2

R409

56_0402_5%~D

1 2

R515

10K_0402_5%~D

1 2

R339

4.7K_0402_5%~D

1 2

R311

10K_0402_5%~D

@

1 2

R507

10K_0402_5%~D

@

1 2

R510 10K_0402_5%~D

1 2

R299

4.7K_0402_5%~D

1 2

E

B

CQ39

MMBT3904_SOT23~D

1

2

3

R525

22K_0402_5%~D

1 2

C339

22P_0402_50V8J~D

1 2

R508 10K_0402_5%~D

12

R318

10K_0402_5%~D

1 2

R327 100K_0402_5%~D

1 2

R335 10K_0402_5%~D

1 2

T11 PAD~D

T37 PAD~D

R528

1K_0402_5%~D

@

12

T36 PAD~D

T8 PAD~D

R334 10K_0402_5%~D

1 2

R527

10K_0402_5%~D

12

X6

32.768KHZ_12.5P_MC-306~D

12

R336

8.2K_0402_5%~D

1 2

R301

4.7K_0402_5%~D

12

R323

10K_0402_5%~D

@

12

R513

4.7K_0402_5%~D

1 2

R500

4.7K_0402_5%~D

1 2

R526

8.2K_0402_5%~D

1 2

R337

22K_0402_5%~D

1 2

R319 10K_0402_5%~D@

1 2

R322

4.7K_0402_5%~D

12

T9 PAD~D

R505 0_0402_5%~D

1 2

R506 10K_0402_5%~D

1 2

R512

10K_0402_5%~D

1 2

R516

10K_0402_5%~D

1 2

R297

4.7K_0402_5%~D

12

R491

1K_0402_5%~D

12

T33 PAD~D

R312 10K_0402_5%~D

1 2

C338

22P_0402_50V8J~D

1 2

R331 100K_0402_5%~D

1 2

C609

0.1U_0402_16V4Z~D

1

2

R326

10K_0402_5%~D

12

R410

56_0402_5%~D

1 2

R304

100K_0402_5%~D

1 2

LPC47N354

256 - LBGA

GPIO

K/B

MISC

MACALLEN III

FLASH

U24B

LPC47N354_LBGA256~D

IN0 (WK_EE4)

A9

IN1 (WK_EE2)

B9

IN2 (WK_EE3)

B8

IN3 (GPWKUP)

A8

IN5 (WK_SE01)

C8

IN6 (WK_SE05)

D8

IN7 (WK_EE1)

E8

FPGM L10

TEST_PIN K12

XOSEL E4

GPIO0 (WK_SE02)

H13

GPIO1 (WK_SE03)

H11

GPIO2 (WK_SE04)

H10

GPIO3 (TRIGGER)

G10

GPIO7 (WK_SE06)

G13

GPIO8 (WK_SE12)/IRRX2

J14

GPIO9 (WK_SE13)/IRTX2

J16

GPIO17 (WK_SE23)/A20M

G11

GPIO20 (WK_SE25)/PS2CLK/8051RX

F15

GPIO21 (WK_SE26)/PS2DAT/8051TX

F12

GPIO84

B5

GPIO85

E5

GPIO86

D5

GPIO87

A4

GPIO90

B4

GPIO91

C5

GPIO92

A3

GPIO93

A2

GPIO96

C3

GPIO97

D3

GPIOA0

B1

GPIOA1

D4

GPIOA2

C1

MSCLK/SPCLK

D10

MSDATA/SPDOUT

E10

EMCLK

G6

EMDAT

G3

GPIO94/IMCLK

B3

GPIO95/IMDAT

C4

KCLK

M1

KDAT

M5

GPIO6 (WK_SE11)/IRMODE/IRRX3A

G15

GPIO5 (WK_SE10)/KSO15

G12

GPIO4 (WK_SE07)/KSO14

G16

KSO13/GPIO18(WK_SE27)

R7

KSO12/OUT8/KBRST

T7

KSO11

K8

KSO10

J8

KSO9

L8

KSO8

M8

KSO7

N8

KSO6

P8

KSO5

T8

KSO4

R8

KSO3

R9

KSO2

T9

KSO1

P9

KSO0

N9

KSI7

M9

KSI6

L9

KSI5

K9

KSI4

K10

KSI3

M10

KSI2

R10

KSI1

N10

KSI0

P10

XTAL1

E1

XTAL2

D1

SYSOPT0/GPIO80 K15

SYSOPT1/GPIO81 K16

BAT_LED J9

PWR_LED J10

GPIOA3/WINDMON E3

TESTA F2

VCC1RST# D2

RESET_OUT L5

PWRGD K13

ACAV_IN F4

POWER_SW_IN# F5

ALWON F6

OUT0 D7

OUT1/IRQ8 C7

OUT2/FRD F7

OUT3/FWR A6

OUT4 E6

OUT5/KBRST D6

OUT6 C6

OUT7/SMI E7

OUT8/KBRST A7

OUT9/PWM2 G7

OUT10/PWM0 G8

OUT11/PWM1 F8

AB1A_CLK C9

AB1B_DATA F9

AB1B_CLK E9

AB1A_DATA D9

GPIO11 (WK_SE15)/AB2A_DATA H16

GPIO12 (WK_SE16)/AB2A_CLK H14

GPIO13 (WK_SE17)/AB2B_DATA J15

GPIO14 (WK_SE20)/AB2B_CLK J13

GPIO15 (WK_SE21)/FAN_TACH1 A10

GPIO16 (WK_SE22)/FAN_TACH2 H9

GPIO82/FAN_TACH3 A5

GPIO19 (WK_SE24) F16

FA0 N12

FA1 T13

FA2 P12

FA3 T14

FA4 T15

FA5 R16

FA6 N13

FA7 P16

FA8 M14

FA9 N15

FA10 N16

FA11 M13

FA12 L12

FA13 M15

FA14 M16

FA15 L14

FA16 L13

FA17 L15

FA18 L16

FA19 K11

FA20 R14

FA21 T16

FA22 P13

FRD P14

FWR N14

FCS P15

FD7 M12

FD6 R12

FD5 T12

FD4 P11

FD3 N11

FD2 M11

FD1 R11

FD0 T11

T15 PAD~D

R518

10K_0402_5%~D

1 2

T10 PAD~D

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DAT_SMB

SIO_FA3

SIO_FD5

SIO_FA1

SIO_FA7

SIO_FA15

SIO_FD3

CLK_SM2

SIO_FA2

VCC1RST#

SIO_FA4

SIO_FA18

FRD#

SIO_FA8

SIO_FA16

SIO_FA11

SIO_FD2

SIO_FA5

CLK_SMB

SIO_FD7

DAT_SM2

SIO_FD1

SIO_FA12

SIO_FD0

SIO_FA9

FWR#

FCS#

SIO_FA17

SIO_FA0

SIO_FA13

SIO_FA6

SIO_FA14

SIO_FA19

SIO_FD4

SIO_FA10

FWH_RST

SIO_FD6

EEPROM_WC

FWH_RST

KSO4

KSO1

KSO8

KSI7

KSI4

KSI7

KSO14

KSO7

KSO13

KSI0

KSI3

KSO11

KSI2

KSO2

KSO9

KSO9

KSI1

KSO1

KSO12

KSO15

KSI2

KSI3

KSO16

KSO15

KSO0

KSI6

KSO10

KSI4

KSO13

KSO6

KSI5

KSO5

KSO8

KSO3

KSI6

KSO5

TP_DATA

TP_CLK

KSO7

KSI1

KSO14

KSO10

KSO2

KSI5

KSO3

KSI0

KSO4

KSO6

KSO0

KSO12

KSO11

TP_DATA

TP_CLK

KSI2

KSI6

KSI5

KSI0

KSI1

KSI3

KSI4

+3VALW

+5VRUN

+3VALW+3VALW

+3VALW

+3VALW +5VRUN

FCS#<35>

DAT_SMB <15,35>

FWR#<35>

KSI[0..7]<35>

VCC1RST# <35>

DAT_SM2<35>

SIO_FA[0..19]<35>

FRD#<35>

CLK_SM2<35>

SIO_FD[0..7] <35>

CLK_SMB <15,35>

EEPROM_WC <35>

KSO[0..15]<35>

KSO16<35>

LID_CL#<34>

KSO_17<34> M_LED_A<35> M_LED_B<35> M_LED_C<35>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

INT KB

36 50, 12, 2004

Compal Electronics, Inc.

SUB_6782U SMbus address A2

LPC47N354 A Rev Anomaly - Touch Pad IMCLK and IMDAT signals are inverted

Note: SMSC errata

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

LCM & Direct play SW & T PAD

CN2

100P_1206_8P4C_50V8~D

@

1 8

2 7

3 6

4 5

L53 BLM15AG221PN1D_0402~D

1 2

C360

0.1U_0402_16V4Z~D

1

2

L52 BLM15AG221PN1D_0402~D

1 2

C590

0.1U_0402_16V4Z~D

1

2

L48

BLM11A601S_0603~D

1 2

R533

0_0402_5%~D

12

L54 BLM15AG221PN1D_0402~D

1 2

L61BLM15AG221PN1D_0402~D 12

L56 BLM15AG221PN1D_0402~D

1 2

C366

100P_0402_50V8J~D

@

1

2

U27

AT24C04N-10SI-2.7_SO8~D

NC

1

A1

2

A2

3

VSS

4

VCC 8

WP 7

SCL 6

SDA 5

R302

10K_0402_5%~D@

1 2

C358

10P_0402_50V8J~D

1

2

L57BLM15AG221PN1D_0402~D 12

R316

4.7K_0402_5%~D

12

R495

0_0402_5%~D

12

L60BLM15AG221PN1D_0402~D 12

L58

BLM31A260SPT_1206~D

1 2

CN3

100P_1206_8P4C_50V8~D

@

1 8

2 7

3 6

4 5

R315

4.7K_0402_5%~D

12

JLCM

ACES_87216-2012

1

122

3

344

5

566

7

788

9

910 10

12 12

14 14

11

11

13

13

15

15 16 16

17

17

19

19 18 18

20 20

L51 BLM15AG221PN1D_0402~D

1 2

C361

0.1U_0402_16V4Z~D

1

2

L63BLM15AG221PN1D_0402~D 12

JKYBD

JAE_FK2S030W11~D

1

3

5

7

11

9

13

15

17

19

21

23

25

27

29

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

31

32

33

34

L50 BLM15AG221PN1D_0402~D

1 2

CN4

100P_1206_8P4C_50V8~D

@

1 8

2 7

3 6

4 5

C376

0.1U_0402_16V4Z~D

1

2

CN5

100P_1206_8P4C_50V8~D

@

1 8

2 7

3 6

4 5

C359

10P_0402_50V8J~D

1

2

L47

BLM11A601S_0603~D

1 2

CN6

100P_1206_8P4C_50V8~D

@

1 8

2 7

3 6

4 5

C356

10P_0402_50V8J~D

1

2

U32

SST39VF080-70-4C-EI_TSOP40~D

A0

21

A1

20

A2

19

A3

18

A4

17

A5

16

A6

15

A7

14

A8

8

A9

7

A10

36

A11

6

A12

5

A13

4

A14

3

A15

2

A16

1

A18

13

CE#

22

OE#

24

D0 25

D1 26

D2 27

D3 28

D4 32

D5 33

D6 34

D7 35

GND 39

A17

40

WE#

9

VCC 30

VCC 31

GND 23

A19

37

NC 29

NC 38

VPP 11

RP#/RESET# 10

WP#/RY/BY# 12

C369

0.1U_0402_16V4Z~D

1

2

CN1

100P_1206_8P4C_50V8~D

@

1 8

2 7

3 6

4 5

C357

10P_0402_50V8J~D

1

2

L55 BLM15AG221PN1D_0402~D

1 2

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CAP_LED

Z3901

SRL_LED

R_BT_MPCI_ACT

BT_MPCI_ACTIVE

R_SRL

ACTLED

NUM_LEDR_NUM

BREATH_LED_B

BT_ACTIVE

R_BAT1_LED

Z3902

BAT1_LED

R_BAT2_LED BAT2_LED

R_CAP

R_BREATH_LED

R_PIDEACT

RJ_TIP

RJ_RING

RJ_TIP

RJ_RING

LED_WLAN_OUT

R_BREATH_LED

ACTLED

BAT1_LED

BAT2_LED

R_BT_MPCI_ACT

NUM_LED

SRL_LED

CAP_LED

POWER_SW#

POWER_SW_EMI

PCIE_RXN1

PCIE_RXP1

PCIE_RXN1_C

PCIE_RXP1_C

PCIE_TXN1

PCIE_TXP1

PCIE_RXN1

PCIE_RXP1

TUNR_PLTRST#

CLK_PCIE_TV#

CLK_PCIE_TV

CVBS_Y

Chroma_Pb

Audio_L

Audio_R

Luma_Pr

Chroma_Pb

TV_Luma_Pr

Luma_Pr

TV_Audio_R

TV_CVBS_Y

CVBS_Y

Audio_R

Audio_L

TV_Luma_Pr

TV_CVBS_Y

TV_Chroma_Pb TV_Chroma_Pb

TV_Audio_R

TV_Audio_L

TV_Audio_L

+5VALW

+3VALW

+3VRUN

+3VALW

+3VRUN

+5VALW

+5VRUN+3VRUN

SRL_LED#<35>

CAP_LED#<35>

BT_ACTIVE<27>

BAT2_LED#<35>

BAT1_LED#<35>

BREATH_LED<35>

NUM_LED#<35>

SATA_ACT#<21>

LED_WLAN_OUT<33> POWER_SW#<15,35>

PCIE_RXN1_C <22>

PCIE_RXP1_C <22>

PCIE_TXN1 <22>

PCIE_TXP1 <22>

PLTRST# <20,22,24>

PLTRST_DELAY# <20,22>

CLK_PCIE_TV<6> CLK_PCIE_TV#<6>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

JLED

37 50, 12, 2004

Compal Electronics, Inc.

1

32

DTA114YKA

OUT

GNDIN

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

CLOSE TO JSVID

C439

33P_0402_50V8J~D

@

1

2

R13

470_0402_5%~D

12

L75

1.8UH_MDF1608A1R8K_10%_0603~D

1 2

JLED

E&T_3801-12-1~D

1

2

3

4

5

6

7

8

9

10

11

12

13

14

C420

22P_0402_50V8J~D

1

2

10K

47K Q4

DTA114YKA_SC59~D

2

1 3

JTUNR

SUYIN_800160FA020S200ZR~D

1

122

3

344

5

566

7

788

9

910 10

12 12

14 14

11

11

13

13

15

15 16 16

17

17

19

19 18 18

20 20

R15

470_0402_5%~D

12

L76

1.8UH_MDF1608A1R8K_10%_0603~D

1 2

10K

47K Q5

DTA114YKA_SC59~D

2

1 3

C424

22P_0402_50V8J~D

@

1

2

C442

33P_0402_50V8J~D

1

2

R18

470_0402_5%~D

12

JPHON

SUYIN_100002FR006G202ZU~D

1

1

2

2

GND1

3

GND2

4

R556

0_0402_5%~D

1 2

C610

33P_0402_50V8J~D

@

1

2

C664 0.1U_0402_10V7K~D

1 2

R372

150_0402_5%~D

1 2

C434

22P_0402_50V8J~D

@

1

2

JTV2

E&T_3801-08-1~D

11

22

33

44

55

66

99

10

10

77

88

R14

470_0402_5%~D

12

10K

47K Q3

DTA114YKA_SC59~D

2

1 3

L73

1.8UH_MDF1608A1R8K_10%_0603~D

1 2

L88

1.8UH_MDF1608A1R8K_10%_0603~D

1 2

R16

470_0402_5%~D

12

R373

10K_0402_5%~D

1 2

C431

22P_0402_50V8J~D

1

2

R17

470_0402_5%~D

12

R371

150_0402_5%~D

1 2

JWIRE

E&T_3802-02-1~D

1

2

R370

10K_0402_5%~D

1 2

10K

47K Q1

DTA114YKA_SC59~D

2

1 3

L74

1.8UH_MDF1608A1R8K_10%_0603~D

1 2

E

B

CQ33

MMBT3904_SOT23~D

1

2

3

C663 0.1U_0402_10V7K~D

1 2

C419

22P_0402_50V8J~D

1

2

10K

47K Q6

DTA114YKA_SC59~D

2

1 3

JTV1

FOX_MH11777-WRUR6~D

2

4

6

3

5

1

9

8

7

10

11

R375

0_0402_5%~D@

1 2

C438

33P_0402_50V8J~D

1

2

E

B

CQ32

MMBT3904_SOT23~D

1

2

3

R555

0_0402_5%~D@

1 2

10K

47K Q2

DTA114YKA_SC59~D

2

1 3

C433

22P_0402_50V8J~D

@

1

2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MOD_EN

HDD_EN

Z4005

Z4006

Z4007

N21917830

Z4008

Z4009

Z4010

SUS_ON

RUN_ON_5V#

RUN_ON_5V#

RUN_ENABLE

Z4015

Z4018

SUSPWROK_5V#

SUSPWROK_5V

+5VSUS

+5VHDD

+3VSRC

+5VSUS

+VCC_CORE

+3VRUN

+1.5VSUS

+15V

+15V

+5VSUS

+5VRUN

+5VMOD

+0.9V_DDR_VTT +3VRUN

+3VSRCPWR_SRC

+3VSUS

PWR_SRC

PWR_SRC

PWR_SRC

+1.5VRUN +VCCP +1.8VRUN

+1.8VRUN

+1.8VSUS

+15V

+5VALW

+1.5VSUS

+1.5VRUN

+1.5VSUS +1.8VSUS+5VALW

MODC_EN#<34>

HDDC_EN#<34>

VAUX_EN<34>

ENAB_3VLAN <29>

SUS_ON<34,39,44>

RUN_ON<18,34,39,42,44,45>

SUSPWROK_5V <44,45>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

POWER CONTROL

38 50, 12, 2004

Compal Electronics, Inc.

+5VHDD Source

2

+1.5VRUN Source

+5VMOD Source

2

+3VRUN Source

Run Planes Enable

+5VRUN Source

1

2

1

2

1

1 1

11

2

1

2 2

1

+3VSUS Source

1

+1.8VRUN Source

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R522

10K_0402_5%~D

@

12

Q17

SI4810DY_SO8~D

36

5

7

82

4

1

R267

200K_0402_5%~D

12

G

D

S

Q14

2N7002_SOT23~D@

2

13

R274

100K_0402_5%~D

12

S

G

D

Q52

SI3456DV-T1_TSOP6~D

3

6

245

1

C327

0.01U_0402_25V7K~D

1

2

Q53

DTC144EKA_SOT23~D

2

13

R310

100K_0402_5%~D

12

Q20

DTC144EKA_SOT23~D

2

13

R87

22_0805_5%~D@

12

G

D

S

Q16

2N7002_SOT23~D

2

13

C321

4.7U_0805_10V4Z~D

1

2

S

G

D

Q21

SI3456DV-T1_TSOP6~D

3

6

245

1

Q55

SI4800DY-T1_SO8~D

36

5

7

82

4

1

R347

100K_0402_5%~D

12

R88

22_0805_5%~D@

12

C618

4.7U_0805_10V4Z~D

1

2

S

G

DQ19

SI3456DV-T1_TSOP6~D

3

6

2

4 5

1

R270

470K_0402_5%~D

12

G

D

S

Q25

2N7002_SOT23~D@

2

13

C403

4.7U_0805_10V4Z~D

1

2

R309

22_0805_5%~D@

12

R262

200K_0402_5%~D

12

R127

22_0805_5%~D@

12

R89

100K_0402_5%~D@

12

R530

100K_0402_5%~D

12

C315

4.7U_1206_16V6K~D

1

2

R529

100K_0402_5%~D

12

G

D

S

Q24

2N7002_SOT23~D

2

13

R384

10K_0402_5%~D

@

12

C371

0.01U_0402_25V7K~D

1

2

G

D

S

Q29

2N7002_SOT23~D

2

13

R277

10K_0402_5%~D

@

12

4700P_0402_25V7K~D

C348

1

2

G

D

S

Q30

2N7002_SOT23~D

2

13

C620

4.7U_1206_16V6K~D

1

2

C347

4.7U_0805_10V4Z~D

1

2

R313

22_0805_5%~D@

12

R305

10K_0402_5%~D

@

12

R314

100K_0402_5%~D

12

C288

0.1U_0402_16V4Z~D

1

2

G

D

S

Q23

2N7002_SOT23~D

2

13

G

D

S

Q31

2N7002_SOT23~D@

2

13

R343

470K_0402_5%~D

12

G

D

S

Q22

2N7002_SOT23~D@

2

13

R225

47_0805_5%~D@

12

G

D

S

Q11

2N7002_SOT23~D@

2

13

G

D

S

Q27

2N7002_SOT23~D@

2

13

Q18

SI4810DY_SO8~D

36

5

7

82

4

1

R308

22_0805_5%~D@

12

R344

200K_0402_5%~D

12

G

D

S

Q34

2N7002_SOT23~D@

2

13

R258

470K_0402_5%~D

12

G

D

S

Q15

2N7002_SOT23~D

2

13

R287

100K_0402_5%~D

12

R307

47_0805_5%~D@

12

C303

4.7U_0805_10V4Z~D

1

2

R348

100K_0402_5%~D

12

G

D

S

Q26

2N7002_SOT23~D@

2

13

S

G

D

Q35

SI3456DV-T1_TSOP6~D@

3

6

245

1

S

G

DQ28

SI3456DV-T1_TSOP6~D

3

6

2

4 5

1

G

D

S

Q48

2N7002_SOT23~D@

2

13

Create PDF with GO2PDF for free, if you wish to remove this line, click here to buy Virtual PDF Printer

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RUNPWROK

IMVP_PWRGD

5VRUNRC

RUNPWROK

SUS_ON

1.5VSUS_PWRGD

1.5VSUS_PWRGD

ICH_PWRGD

ICH_PWRGD#

+3VSUS

+3VRUN

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+1.5VSUS

+3VALW

+3VSUS

RUNPWROK <18,35,43,46>

ITP_DBRESET#<7>

RESET_OUT#<35>

ICH_PWRGD <22>

IMVP_PWRGD<10,22,46>

SUSPWROK <15,22>

RUN_ON<18,34,38,42,44,45>

2P5V_PWRGD<42>

SUS_ON<34,38,44>

ICH_PWRGD# <15>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Power Good

39 50, 12, 2004

Compal Electronics, Inc.

+3VSUS

+3VSUS

+3VSUS

DELL CONFIDENTIAL/PROPRIETARY

+3VSUS

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

U29B

74VHC08MTC_TSSOP14~D

IN1

4

IN2

5OUT 6

C591

0.1U_0402_16V4Z~D

1

2

U26C

SN74LVC3G14DCTR_SSOP8~D

P8

A

3Y5

G

4

U30D

74VHC08MTC_TSSOP14~D

IN1

13

IN2

12 OUT 11

E

B

CQ50

MMBT3904_SOT23~D

1

2

3

R492

100K_0402_5%~D

12

R490

100K_0402_5%~D

12

U26B

SN74LVC3G14DCTR_SSOP8~D

P8

A

6Y2

G

4

C585

0.1U_0402_16V4Z~D

1 2

G

D

S

Q60

2N7002_SOT23~D

2

13

R550

100K_0402_5%~D

12

C584

0.1U_0402_16V4Z~D

1

2

R293

0_0402_5%~D@

1 2

R498

0_0402_5%~D

1 2

U30C

74VHC08MTC_TSSOP14~D

IN1

10

IN2

9OUT 8

C589

0.1U_0402_16V4Z~D

1 2

R482

10K_0402_5%~D

12

R497

0_0402_5%~D

@

1 2

U26A

SN74LVC3G14DCTR_SSOP8~D

P8

A

1Y7

G

4

U30B

74VHC08MTC_TSSOP14~D

IN1

4

IN2

5OUT 6

U29C

74VHC08MTC_TSSOP14~D

IN1

10

IN2

9OUT 8

U29D

74VHC08MTC_TSSOP14~D

IN1

13

IN2

12 OUT 11

U29A

74VHC08MTC_TSSOP14~D

IN1

1

IN2

2OUT 3

P14

G

7

R292

0_0402_5%~D

1 2

U30A

74VHC08MTC_TSSOP14~D

IN1

1

IN2

2OUT 3

P14

G

7

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

PAD and Standoff

40 50, 12, 2004

Compal Electronics, Inc.

Fiducial Mark

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

FD11

SMD40M80@

1

FD15

FIDUCAL@

1

FD3

SMD40M80@

1

H16

C315D110@

1

FD8

SMD40M80@

1

H26

C236D110@

1

CLP4

EMI_CLIP~D@

GND 1

FD12

FIDUCAL@

1

CLP10

EMI_CLIP~D@

GND

1

H29

C276D126@

1

FD5

SMD40M80@

1

H25

C315D91@

1

MYLAR(ZZZ)

MY1

MYLAR_CARDBUS~D@

NC

1

FD10

SMD40M80@

1

FD6

SMD40M80@

1

MYLAR(ZZZ)

MY2

MYLAR_HDD~D@

NC

1

H17

C315D110@

1

H6

C315D126@

1

H12

C236D110@

1

THERM PAD

TPAD3

THERMAL_PAD_VRAM~D@

NC

1

H4

C315D126@

1

H30

C134D134N@

1

CARDBUS CAGE

CAGE1

FCI_57996-001(W/SC)~D

NC

1

H19

C315D110@

1

FD4

SMD40M80@

1

FD14

FIDUCAL@

1

FD1

SMD40M80@

1

MYLAR(ZZZ)

MY5

MYLAR_MINIPCI~D@

NC

1

H14

C236D110@

1

FD7

SMD40M80@

1

FD13

FIDUCAL@

1

H9

C315D126@

1

THERM PAD

TPAD2

THERMAL_PAD_VGA~D@

NC

1

H20

C236D110@

1

H2

C315D126@

1

H22

C315D91@

1

BARE PCB

PCB

DAQ20_LA-2171 _REV0 _M/B~D

NC

1

H15

C315D209@

1

H18

C315D209@

1

FD21

FIDUCAL@

1

H13

C236D110@

1

CLP13

EMI_CLIP~D@

GND 1

MYLAR(ZZZ)

MY9

MYLAR_BATTERY~D@

NC

1

H28

C276D110@

1

THERM PAD

TPAD1

THERMAL_PAD_MCH~D@

NC

1

MYLAR(ZZZ)

MY8

MYLAR_MCH_BOTTOM~D@

NC

1

FD17

SMD40M80@

1

H24

C315D91@

1

H3

C276D126@

1

H5

C276D126@

1

FD9

SMD40M80@

1

MYLAR(ZZZ)

MY4

MYLAR_DIMMB~D@

NC

1

FD16

FIDUCAL@

1

H23

C315D91@

1

FD18

SMD40M80@

1

MYLAR(ZZZ)

MY7

MYLAR_MCH_TOP~D@

NC

1

MYLAR(ZZZ)

MY6

MYLAR_DOCK_FRAME~D@

NC

1

H7

C276D126@

1

CLP11

EMI_CLIP~D@

GND

1

H32

C276D110@

1

H8

C315D126@

1

H10

C315D126@

1

H21

C236D110@

1

H27

C236D110@

1

H31

O181X134D181X134N@

1

MYLAR(ZZZ)

MY3

MYLAR_DIMMA~D@

NC

1

CLP18

EMI_CLIP~D@

GND

1

FD2

SMD40M80@

1

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RTC_SHDN#

DCIN+

DCIN-

PS_IDPWR_ID

PQ_G

PS_ID

DC_IN

+3.3VX

+DC_IN

+3VALW PWR_SRC

+5VALW

+5VALW

NB_PSID <35>

PS_ID_DISABLE# <35>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

+DCIN

41 50, 12, 2004

Compal Electronics, Inc.

+3.3VRTC Source

NOTE: "THE POINT LOCATED

AT PS MODULE

THE POINT

DC_IN+ Source

Z-series AC Adaptor

Connctor

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

MAX1615EUK_SOT23-5~D

PU2

IN

1

GND

2

OUT 3

5/3+ 4

#SHDN

5

PR78

2.2K_0402_5%~D

1 2

PL2

FBM-L18-453215-900LMA90T_1812~D@

1 2

PD8

EC10QS04_SOD106~D

2 1

PR69

100K_0402_5%~D

1 2

PL1

FBM-L18-453215-900LMA90T_1812~D@1 2

PR68

100K_0402_1%~D

1 2

PD9

DA204U_SOT323~D

@

2

3

1

PC33

10U_1206_6.3V7K~D

12

PC34

0.1U_0805_50V7M~D

12

G

D

S

PQ12

2N7002_SOT23~D

2

1 3

PR11

100K_0402_5%~D

12

PC3

0.47U_1812_50V7M~D

1 2

PC1

10U_1210_25V7K~D

12

PC45

0.1U_0805_50V7M~D

12

HRS_HR33-DL-7~D

PJDC1

Low_PWR 1

DC+_1 2

DC+_2 3

DC-_1 4

DC-_2 5

GND_1

6

GND_2

7

GND_3

8

GND_4

9

MH1

MH2

PC48

0.01U_0402_25V7K~D

12

C

B

EPQ10

MMBT3904_SOT23~D

2

3 1

PL15

BLM11A121S_0603~D

12

PR75

0_0402_5%~D

1 2

PR62

15K_0402_1%~D

1 2

PQ1 SI4825DY_SO8~D

3 6

5

7

8

2

4

1

PL3

OC8070-A301~D

3

1 4

2

PR57

0_0402_5%~D

1 2

PR16

150K_0402_5%~D

12

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Z4304

Z4305

Z4306

2P5V_PWRGD

PBATT+

+3VALW

+3VALW

+2.5VRUN+2.5VRUNP

+3VSUS

+3VSRC +2.5VRUNP

+VCHGR

NC_TEST6

PBAT_SMBDAT <35,47> PBAT_PRES# <35>

PBAT_SMBCLK <35,47>

PBAT_ALARM# <35>

2P5V_PWRGD<39>

RUN_ON<18,34,38,39,44,45>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Battery Conn./+2.5V

42 50, 12, 2004

Compal Electronics, Inc.

Primary Battery Connector

ESD Diodes

1

2

3

4

5

6

7

8

9

SUYIN_20175A-09G1

TOP view

R1=R2* (Vo/ 0.8 -1), R2:25K~100K.

+2.5VRUN

EMI team suggest

DELL CONFIDENTIAL/PROPRIETARY

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

PD19

DA204U_SOT323~D@

2

3

1

PR156

10K_0402_5%~D

12

PC130

0.1U_0402_10V6K~D

12

PD17

DA204U_SOT323~D@

2

3

1

PC14

10U_1206_6.3V7K~D

12

PR166

10K_0402_1%~D

1 2

PR33

10K_0402_5%~D

12

PL13

FBM-L18-453215-900LMA90T_1812~D

1 2

PR164

100_0402_5%~D

1 2

PC15

0.1U_0805_25V7K~D

12

PR155

100_0402_5%~D

1 2

PJBAT

SUYIN_200275MR009G516ZL~D

BATT1+ 1

SMB_CLK 3

SMB_DAT 4

BATT_PRES# 5

SYSPRES# 6

BATT2- 9

GND

10

GND

11

BATT2+ 2

BATT_VOLT 7

BATT1- 8

PR31

30.9K_0402_1%~D

12

MAX1806EUA25_8UMAX~D

PU1

IN

1

IN

2

POK

3

SHDN#

4GND1 5

SET 6

OUT 7

OUT 8

GND2 9

PD21

DA204U_SOT323~D@

2

3

1

PC16

1U_0805_10V7K~D

12

PC40

2200P_0402_50V7K~D

12

PR161

100_0402_5%~D

1 2

PJP4

PAD-OPEN 4x4m

1 2

PC13

0.1U_0805_25V7K~D

12

PR32

0_0603_5%~D@

1 2

PD20

DA204U_SOT323~D@

2

3

1

PR30

66.5K_0402_1%

12

PC41

0.1U_0805_50V7M~D

1 2

PR162

100_0402_5%~D

1 2

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A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

1.05V_BST2

1.5V_BST2

MAX1845_VCC

1.5V_DH

1.5V_DL

1.5V_BST

1.5V_LX

VCCP_PWRGD

MAX1845_VCC

1.5V_V+ 1.05V_BST

1.05V_DH

1.05V_LX

1.05V_DL

1.05V_OUT

1.05V_FB

MAX1845_REF

1.5V_FB

1.5V_OUT

SUSPWROK_1P8V

+VCCP_1P05VP

PWR_SRC

+5VSUS

+1.5VSUSP

+1.5VSUSP

+VCCP

+1.5VSUS

+VCCP_1P05VP

+3VSUS

NC_TEST1 NC_TEST2

RUNPWROK<18,35,39,46>

VCCP_PWRGD<46>

SUSPWROK_1P8V<45>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

+1.5VSUSP /+VCCP_1P05VP

43 50, 12, 2004

Compal Electronics, Inc.

+1.5VSUSP / +VCCP_1P05VP

Design current 3A for +1.5VSUSP

Design current 5A for +VCCP_1P05VPPeak current 4.034A for +1.5VSUSP

Peak current 7.124A for +VCCP_1P05VP

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

PR100

0_0603_5%~D

12

PR90

150K_0402_1%~D

12

PC53

0.1U_0603_25V7K~D

1 2

PR97

1K_0402_1%~D

12

PC9

2200P_0402_50V7K~D

12

PD12

EP10QY03~D

2 1

PC70

1000P_0402_50V7K~D

@

12

PJP1

PAD-OPEN 4x4m

1 2

PR91

100K_0402_5%~D

12

PQ15

IRF7811A_SO8~D

3 6

5

7

8

2

4

1

PR86

0_0603_5%~D

1 2

PJP2

PAD-OPEN 4x4m

1 2

PL4

1.8U +-30% DC104C-919AS-1R8N 9.5A~D

1 2

PC50

10U_1206_25V6M~D

1

2

PC73

0.1U_0805_25V7K~D

12

PR99

280K_0402_1%~D

12

PR96

20K_0402_1%~D

12

PC67

4.7U_0805_6.3V6K~D

1 2

PU4

MAX1845EEI_QSOP28~D

OUT2

15

BST2

19

FB2

14

CS2

16

VDD 21

UVP

9

SKIP

6

V+

4

GND

23

ON1

11

DH1 26

LX1 27

ILIM2 13

DL1 24

VCC 22

PGOOD

7

FB1 2

ON2

12

ILIM1 3

OVP

8

REF 10

LX2

17

DL2

20

TON 5

CS1 28

BST1 25

DH2

18

OUT1 1+

PC10

330U_D2E_2.5VM~D

1

2

PD5

EP10QY03~D

2 1

PR107

0_0603_5%~D@

1 2

PC8

10U_1206_25V6M~D

1

2

PR104

0_0402_5%~D

12

PR80

0_0603_5%~D

1 2

PD10

RB751V-40_SOD323~D

21

SI4814DY_SO8~D

PQ2

D1 2

G1

8

G2 3

S1/D2

5

D1 1

S1/D2

7

S2 4

S1/D2

6

PD11

RB751V-40_SOD323~D

2 1

PR87

0_0603_5%~D@

1 2

PC69

0.1U_0805_25V7K~D

12

PR94

0_0402_5%~D

@

1 2

PR101

0_0402_5%~D

12

PC65

1U_0603_6.3V6M~D

12

PL5

3U_SPC-07040-3R0_5A_30%~D

1 2

PD13

RB751V-40_SOD323~D

21

PR108

10K_0402_1%~D

12

PR92

20_0603_1%~D

1 2

PR98

90.9K_0402_1%~D

12

+

PC11

330U_D2E_2.5VM~D

@

1

2

PR109

20K_0402_1%~D

12

+

PC12

220U_D_2.5VM~D

1

2

PR24

0_0603_5%~D

1 2

PC129

1000P_0402_50V7K~D

12

PQ16

FDS6676S_SO8~D

3 6

5

7

8

2

4

1

PC68

0.1U_0805_50V7M~D

12

PC7

0.1U_0603_25V7K~D

12

PC52

0.1U_0805_50V7M~D

12

PC49

2200P_0402_50V7K~D

12

PL14

FBM-L11-322513-151LMAT_1210~D

1 2

PR89

90.9K_0402_1%~D

12

PC51

10U_1206_25V6M~D

1

2

PC66

1U_0603_10V6K~D

12

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TON

BST3

BST5

ILIM5

BST_5BST_3

PRO#

ILIM3

REF

LX3

FB5

DH5

DH3

DL3

DL5

REF

PRO#

TON

ILIM5

ILIM3

FB3

LX5

MAX1999_SKIP#

SUS_ON

PWR_SRC

+5VSUSP

+5VALW

+3VALW

VCC_MAX1999

+3VSRCP

VCC_MAX1999

+3VSRCP

+5VSUS

+15V

+3VSRCP

+15VP

+5VSUSP

+3VSRC

VCC_MAX1999

+15VP

+5VSUSP

NC_TEST3

NC_TEST4

THERM_STP#<15>

SUS_ON<34,38,39>

SUSPWROK_5V <38,45>

ALWON<35>

RUN_ON <18,34,38,39,42,45>

SUS_ON<34,38,39>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

+3.3V/+5V/+15V

44 50, 12, 2004

Compal Electronics, Inc.

Place these CAPs

close to FETs

Adding SKIP control

Place these CAPs

close to FETs

(150mA,Via NO.= 2)

(6A,240mils ,Via NO.= 12)

(4A,160mils ,Via NO.= 8)

Design current 3.4A for +3.3VSRC

Design current 4A for +5VSUS

DC/DC +3V/ +5V/ +15V

Peak current 4.758A for +3VSRCP

Peak current 5.7A for +5VSUSP

Note: check the power consumption of +15V plane

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

PR120

0_0402_5%~D

@

1 2

PR147

1K_0402_5%~D

1 2

PC38

1000P_0402_50V7K~D

@

12

PR61

2K_0402_1%~D

1 2

PJP8

PAD-OPEN 4x4m

1 2

PC98

10U_1206_25V6M~D

1

2

PU6

MAX1999EEI_QSOP28~D

SHDN

6

BST3

28

DH3

26

LX3

27

DL3

24

OUT3

22

LX5 15

DL5 19

FB5 9

PRO 10

ILIM5 11

ILIM3 5

REF 8

V+

20

VCC

17

LDO5 18

BST5 14

DH5 16

OUT5 21

N.C. 1

TON 13

GND 23

SKIP

12

LDO3

25

FB3

7

ON3

3

ON5

4

PGOOD 2

PC29

0.1U_0603_25V7K~D

12

PL20

FBM-L11-322513-151LMAT_1210~D

1 2

PL10

10U_SPC-1204P-100_4.5A_20%~D

1 2

PR48

47_0603_5%~D

12

PR125

1.07K_0402_1%~D

1 2

PR121

4.7_1206_5%~D

1 2

PJP9

PAD-OPEN 4x4m

1 2

PC107

0.1U_0805_50V7M~D

12

PC26

1U_0603_10V6K~D

12

PC120

1U_0805_10V7K~D

12

PC28

4.7U_1206_25V6K~D

12

PJ3800CS_SO8~D

PU8

SCP

2FB 8

VCC

3

OUT 5

-IN

1

OSC 7

BR/CTL

4GND 6

PR138

0_0402_5%~D@12

PR144

0_0402_5%~D

1 2

PC91

1U_0603_10V6K~D

12

PL9

5.6U_CEP125-5R6MC_8.8A_20%~D

12

PR59

0_0402_5%~D

1 2

PD7

RB717F_SOT323~D

2

31

PJP13

PAD-OPEN 4x4m

1 2

PC119

0.1U_0805_50V7M~D

12

PR124

0_0603_5%~D

12

PC106

0.1U_0805_50V7M~D

12

PC116

0.1U_0603_25V7K~D

12

PR141

30.1K_0402_1%~D

1 2

PC90

22U_1206_6.3VAM~D

12

PR142

57.6K_0402_1%~D

1 2

PR143

0_0402_5%~D

1 2

PR122

30.9K_0402_1%~D

1 2

PL11

22U_SPC_06704_22R0_1.5A_30%~D

12

PR146

147K_0402_1%~D

1 2

PC94

10U_1206_6.3V7K~D

12

PC113

2200P_0402_50V7K~D

12

PC111

270P_0402_25V8K~D

12

S

G

DPQ30

SI3442DV_TSOP6~D

3

6

2

4 5

1

PR136

0_0402_5%~D12

PR54

0_0603_5%~D@

1 2

PC31

0.1U_0603_25V7K~D

1 2

PC110

0.1U_0603_25V7K~D

12

PR149

0_0402_5%~D

@

1 2

PR123

0_0402_5%~D

1 2

PR135

3.01K_0402_1%~D

1 2

PC96

1000P_0603_50V8J~D@12

PR60

240K_0402_5%~D

1 2 PC95

4.7U_1206_25V6K~D

12

PC121

0.1U_0805_50V7M~D

12

PR58

0_0402_5%~D

@

1 2

PR145

0_0402_5%~D

@

1 2

+

PC92

15U_D2_25M_R90~D

1

2

PC128

10U_1206_25V6M~D

1

2

PD15

EC31QS04~D

2 1

PR157

150_0603_1%~D

1 2

+

PC27

330U_D3L_6.3VM_R25~D

1

2

PR56

0_0603_5%~D

1 2

PR137

0_0402_5%~D

@

12

PR140

100K_0402_5%~D

1 2

PC97

10U_1206_25V6M~D

1

2

PR148

147K_0402_1%~D

1 2

PR55

0_0603_5%~D@

1 2

+

PC39

330U_D3L_6.3VM_R25~D

1

2

PC93

0.1U_0603_25V7K~D

12

SI4814DY_SO8~D

PQ29

D1 2

G1

8

G2 3

S1/D2

5

D1 1

S1/D2

7

S2 4

S1/D2

6

PR49

0_0603_5%~D

1 2

PC99

2200P_0402_50V7K~D

12

PR126

0_0603_5%~D

1 2

PQ32

SI4800DY-T1_SO8~D

3 6

5

7

8

2

4

1

PQ27

SI4810DY_SO8~D

3 6

5

7

8

2

4

1

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1.8V_LX

1.8V_DH

1.8V_DL

1.8V_REF

AVDD

+0.9V_PWRGD

1.8V_FB

1.8V_0.9V_PWR_SRC

1.8V_0.9V_PWR_SRC

PWR_SRC

+1.8VSUS

+5VSUS

+0.9V_DDR_VTTP

NC_TEST5

+1.8VSUSP

+1.8VSUSP +1.8VSUS

+0.9V_DDR_VTT

+0.9V_DDR_VTTP

+5VSUS

+5VSUS

V_DDR_MCH_REF <10,16,17>

RUN_ON <18,34,38,39,42,44>

SUSPWROK_5V <38,44>

SUSPWROK_1P8V <43>

Title

Size Document Number Rev

Date: Sheet of

Board Number LA2111 0.1

+1.8VSUSP/ +0.9V_DDR_VT

45 50, 12, 2004

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

+1.8VSUSP/ +0.9V_DDR_VTT

DDR2 Termination

(3A,200mils ,Via NO.=6)

(8A,320mils ,Via NO.=16)

Design current 1.05A for +0.9V_DDR_VTTP

Peak current 1.5A for +0.9V_DDR_VTTP

Design current 7A for +1.8V_SUSP

Peak current 10.1A for +1.8VSUSP

PC81

2200P_0402_50V7K~D

12

PR46

470K_0402_5%~D

1 2

PC131

10U_1206_6.3V7K~D

@

12

PR38

150K_0402_1%~D

12

PL8

2.2U_SPC-1205P-2R2B_13A_30%~D

1 2

PC79

10U_1206_25V6M~D

1

2

PJP7

PAD-OPEN 4x4m

1 2

PD14

RB751V-40_SOD323~D

21

+

PC86

150U _D2_6.3VM~D

@

1

2

PJP6

PAD-OPEN 4x4m

1 2

PC83

0.1U_0603_25V7K~D

12

PC87

0.1U_0603_25V7K~D

12

PC22

4.7U_0805_6.3V6K~D

1 2

PC74

0.22U_0603_16V7K~D

12

PC21

22U_1206_6.3VAM~D

1

2

PR116

27.4K_0603_1%~D

12

PQ24

FDS6676S_SO8~D

3 6

5

7

8

2

4

1

+

PC23

330U_D2E_2.5VM~D

1

2PC82

0.1U_0603_25V7K~D

1 2

PR45 0_0402_5%~D

12

PU5

MAX8550ETI_TQFN28~D

SKIP

25

VDD 22

PGND1

23

LX

19

AVDD 26

REF

3

TON

1

OVP/ UVP 2

SS

8

GND

24

POK1 5

POK2 6

VTT 12

STBY 7

SHDNB 28

VOUT

16 REFIN 14

FB

15

VTTR 10

ILIM

4

PGND2 11

DH

18

DL

21

VTTS 9

SHDNA 27

VIN 17

BST

20

VTTI 13

PR35

10_0402_5%~D

1 2

PC78

0.1U_0805_50V7M~D

12

PC20

22U_1206_6.3VAM~D

1

2

PC75

10U_1206_6.3V7K~D

12

+

PC24

330U_D2E_2.5VM~D

1

2

PR34

470K_0402_5%~D

1 2

PC25

0.1U_0603_25V7K~D

12

PR113

0_0603_5%~D

1 2

PR37

100K_0402_5%~D

1 2

PC17

22U_1206_6.3VAM~D

1

2

PJP12

PAD-OPEN 4x4m

1 2

G

D

S

PQ23

2N7002_SOT23~D 2

13

PR40

20_0603_1%~D

1 2

PR41

100K_0402_1%~D

1 2

PC80

1U_0603_10V6K~D

1 2

PR118

17.4K_0402_1%~D

12

PC76

10U_1206_25V6M~D

1

2

PR36 0_0402_5%~D

12

PC19

1000P_0402_50V7K~D

1 2

PR42 0_0402_5%~D

12

PR117

0_0603_5%~D@1 2

PL17

FBM-L11-322513-151LMAT_1210~D

12

PC18

1U_0603_6.3V6M~D

12

PQ25

IRF7811A_SO8~D

3 6

5

7

8

2

4

1

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8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

H H

G G

F F

E E

D D

C C

B B

A A

VID0

VID1

MAX1987_VCC

VID5

VID4

VID3

VID2

CPU_PWR_SRC

MAX1987_REFMAX1987_REF

PWR_SRC

CPU_PWR_SRC

+VCC_CORE

+VCC_CORE

CPU_PWR_SRC

+VCC_CORE

+5VRUN

+3VRUN

+3VRUN

+3VRUN

+5VRUN

+5VRUN

MAX1987_VCC

MAX1987_VCC

CLK_ENABLE#<6>

CLK_ENABLE#<6>

DPRSLPVR<22>

VCCP_PWRGD<43>

CLK_ENABLE#<6>

VID4<8> VID3<8>

VID1<8>

IMVP_PWRGD<10,22,39>

VID2<8>

H_STP_CPU#<6,22>

DPRSLPVR<22>

VID5<8>

H_PSI#<8>

RUNPWROK<18,35,39,43>

VID0<8>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

+VCORE

46 50, 12, 2004

Compal Electronics, Inc.

VID 0

VID 5

0

VID 4 VID 2

VID

1

VID 1

111

0 1

1

0

0

1

VID 3

100

1

Vcore

0.748

V

1.484

100.956

1.308

10

1

1 0 11

1

The C4 Mode voltage

is 0.748V, S2 open

PBOOT voltage seeting up on 1.212V

Output Capatitors in H/W, ESR=3m ohms

(a): START-UP and SHUTDOWN(SUS=LOW,RUNPWROK=LOW):2mV/us

(b): ENTER SUSPEND (SUS=HIGH,RUNPWROK=HIGH): 8.6mV/us

(c): EXIT SUSPEND (SUS=LOW, RUNPWROK=HIGH): 24.7mV/us

TRANSITION TIMING:

Change PR82:30.1k. Delete PR22/PQ8/PQ17/PQ7/PQ18/PR20/PR26/PR23

PR22/PQ8/PQ17/PQ7/PQ18/PR20/PR26/PR23 and PR19 are only for YONAH CPU.

and PR19 for BANIAS and DOTHAN

Remote Vcore sense

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

PR71

0_0402_5%~D

12

PR79

0_0402_5%~D

@

12

PR106

1K_0402_1%~D

1 2

PR26

0_0402_5%~D@

12

PQ19

IRF7821_S08~D

S

1

S

3G

4

D8

D7

D6

D5

S

2

PU3

MAX1987ETM_TQFN48~D

TIME

1

TON

2

B0

3B1

4B2

5

S0

6S1

7S2

8

SHDN#

9

REF

10

ILIM

11

VCC 12

GND 13

CCV

14

POS

15

NEG

16

CCI 17

FB 18

OAIN- 19

OAIN+ 20

PSI#

21

SYSOK

22

IMVPOK

23

CLKEN#

24

D5

25

D4

26

D3

27

D2

28

D1

29

D0

30

DD0# 31

BSTM 32

LXM 33

DHM 34

DLM 35

VDD 36

PGND 37

DLS 38

DHS 39

LXS 40

BSTS 41

SUS

43

DPSLP#

44

CMN 46

CSN 47

V+ 42

CMP 45

CSP 48

PQ20

IRF7821_S08~D

S

1

S

3G

4

D8

D7

D6

D5

S

2

PC47

100P_0402_50V8K~D

12

PR25

0_0402_5%~D@

12

PC60

0.1U_0603_25V7K~D

12

PR12

0_0402_5%~D

@

12

PR93

0_0603_5%~D

1 2

PC5

10U_1206_6.3V7K~D

12

PR72

0_0402_5%~D

@

12

G

D

S

PQ8

2N7002_SOT23~D@

2

13

PC55

10U_1210_25V7K~D

1

2

PC43

470P_0402_50V7K~D

1 2

PR18

0_0402_5%~D@

12

PC71

0.01U_0402_25V7K~D

12

PR22

100K_0402_1%~D@1 2

G

D

S

PQ7

2N7002_SOT23~D@

2

13

PR23

100K_0402_1%~D@1 2

PC44

1U_0603_10V6K~D

12

PR4 0_0402_5%~D

12

PD1

RB751V-40_SOD323~D

21

PR82

30.1K_0402_1%~D

12

PC62

0.1U_0603_25V7K~D

12

PC57

10U_1210_25V7K~D

1

2

PR10

2.2_0603_5%~D

1 2

PR105

1K_0402_1%~D

1 2

PR13

0_0402_5%~D

12

PR84 0_0402_5%~D

12

PC61

0.1U_0603_25V7K~D

12

PQ21

IRF7821_S08~D

S

1

S

3G

4

D8

D7

D6

D5

S

2

PR64

10K_0402_5%~D

@

12

PR67

3.01K_0402_1%~D

12

PR15

0_0402_5%~D@

12

PR102

1K_0402_1%~D

1 2

PR29

0.001_2512_5%~D

1 2

PL7

0.7U_ETQP2H0R7BFL_29A_20%~D

12

PR9

0_0402_5%~D@

1 2

G

D

S

PQ17

2N7002_SOT23~D@

2

13

PC58

10U_1210_25V7K~D

1

2

PR63

10_0805_5%~D

12

PD2

RB751V-40_SOD323~D

2 1

PC6

0.1U_0603_25V7K~D

12

PR7

20.5K_0402_1%~D12

PR21

2.2_0603_5%~D

12

PC56

10U_1210_25V7K~D

1

2

PR66

1.91K_0603_1%~D

12

PR88

10K_0402_1%~D

12

PR20

15K_0402_1%~D

@

12

PC59

10U_1210_25V7K~D

1

2

PR3

100K_0402_1%~D12

PR5

1.24K_0603_1%~D

12

PR74

0_0402_5%~D

@

12

PR83 0_0402_5%~D

12

PR17

0_0402_5%~D

12

PL16

FBM-L18-453215-900LMA90T_1812~D

12

PR1 0_0402_5%~D@12

PC72

0.01U_0402_25V7K~D

12

PR103

1K_0402_1%~D

1 2

PL6

0.7U_ETQP2H0R7BFL_29A_20%~D

1 2

PR28

0.001_2512_5%~D

1 2

PD4

EC31QS04~D

@

2 1

PR14

0_0402_5%~D

12

PQ6

IRF7832_SO8~D

S

1

S

3G

4

D8

D7

D6

D5

S

2

PC54

10U_1210_25V7K~D

1

2

PR2

1M_0402_1%~D

1 2

PR19

36K_0402_5%

@

12

PR65

10K_0402_1%~D

12

PC42

270P_0402_25V8K~D

12

PR85

0_0402_5%~D@

12

PR6

100K_0402_1%~D

12

PD3

EC31QS04~D

@

2 1

PR8

0_0402_5%~D

1 2

PQ4

IRF7832_SO8~D

S

1

S

3G

4

D8

D7

D6

D5

S

2

PR110

3.01K_0402_1%~D

12

G

D

S

PQ18

2N7002_SOT23~D@

2

13

PC64

2200P_0402_50V7K~D

12

PQ5

IRF7832_SO8~D

S

1

S

3G

4

D8

D7

D6

D5

S

2

PC63

2200P_0402_50V7K~D

12

PC4

0.1U_0603_25V7K~D

12

PR27

100K_0402_1%~D@1 2

PC2

0.22U_0603_16V7K~D

12

PQ22

IRF7821_S08~D

S

1

S

3G

4

D8

D7

D6

D5

S

2

PR95

0_0603_5%~D

1 2

PQ3

IRF7832_SO8~D

S

1

S

3G

4

D8

D7

D6

D5

S

2

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MAX1535_CCI

MAX1535_CCS

CHVREF

CSSP

CHG_CS

CSSN

MAX1535_CCV

MAX1535_DAC

CHVREF

CHVREF

MAX1535_LX

TM

CSIN

CSIP

TH

DLO

PDL

PDL

AC_IN

PDS

PDS

ACAV_IN

ACAV_IN

DLOV

+VCHGR

+DC_IN

+VCHGR

+5VALW

PWR_SRC+SDC_IN

PBAT_SMBDAT <35,42>

PBAT_SMBCLK <35,42>

CHG_PBATT<35>

ACAV_IN<35>

Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Charger

47 50, 12, 2004

Compal Electronics, Inc.

Connect GND side of PC150, PC151, PC152 to GND through 1 via.

Adress : 12H

IMAX=1.6135V

Maximum charger current=8A

VMAX=2.625V

Maximum charger voltage=13.12V

Reserver H-side MOSFET

+DC_IN discharge path

Vin Detector

High 17.859 V

Low 16.988 V

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

PR76

0.01_2512_1%~D

1 2

PC108

1U_0603_6.3V6M~D

1 2

PQ14 SI4825DY_SO8~D

36

5

7

82

4

1

PR159

0_0402_5%~D

1 2

G

D

S

PQ11

2N7002_SOT23~D

2

13

PC123

0.1U_0603_25V7M~D

@

1 2

PC32

0.01U_0402_25V7K~D

1 2

PR81

100K_0402_5%~D

12

PR50

0.01_2512_1%~D

1 2

PC109

1U_0805_10V7K~D

12

PR150

0_0402_5%~D

1 2

PC35

10U_1210_25V7K~D

1

2

PC126

0.1U_0603_25V7K~D

12

PC88

0.1U_0805_50V7M~D

1 2

PR70

10K_0402_5%~D

1 2

PZD1

RLZ4.3B_LL34~D

12

PR51

150K_0603_1%~D

1 2

PC112

1U_1206_25V7K~D

1 2

PR158

0_0402_5%~D

1 2

PR129

182K_0402_1%~D

1 2

PC127

0.1U_0603_25V7K~D

@

1 2

PC124

1U_0805_25V4Z~D

12

PR73

10K_0402_5%~D

12

PC114

0.1U_0603_25V7K~D

12

PR77

0_0402_5%~D@

1 2

PR134

0_0402_5%~D

12

PQ26

SI4835DY_SO8~D@

36

5

7

82

4

1

PR153

10K_0402_1%~D

1 2

PC36

10U_1210_25V7K~D

1

2

PC37

10U_1210_25V7K~D

1

2

PC30

0.1U_0603_25V7K~D

1 2

PC117

0.1U_0603_25V7M~D

@

1

2

PR127

10K_0402_1%~D

1 2

PR52

20K_0603_1%~D

12

FDS6670S_SO8~D

PQ31

3 6

5

7

8

2

4

1

PR151

59K_0402_1%~D

1 2

PC122

1500P_0402_50V7K~D

1 2

PC89

2200P_0402_50V7K~D

12

PR154

100K_0402_5%~D

1 2

PC101

10U_1210_25V7K~D

1

2

PC104

0.01U_0402_25V7K~D

12

PC46

10U_1210_25V7K~D

1

2

PR128

182K_0402_1%~D

1 2

PC100

10U_1210_25V7K~D

1

2

PC115

1000P_0402_50V7K~D

@

1 2

PR130

280K_0402_1%~D

12

G

D

SPQ13

2N7002_SOT23~D

2

13

PR163

0_0805_5%~D

12

PQ28

SI4835DY_SO8~D

36

5

7

82

4

1

PD16

EC31QS04~D

@

2 1

PR132

10K_0402_5%~D

12

PC125

0.1U_0603_25V7K~D

@

1 2

G

D

S

PQ33

2N7002_SOT23~D

2

13

PR53

681K_0402_1%~D

1 2

PR139

0_0402_5%~D

1 2

PL12

5.6U_CEP125-5R6MC_8.8A_20%~D

1 2

PR152

10K_0402_1%~D

1 2

PR160

33_0402_5%~D

1 2

PL19

FBM-L18-453215-900LMA90T_1812~D

12

PC103

1000P_0402_50V7K~D

12

PC105

0.01U_0402_25V7K~D

12

PC118

1U_0805_10V7K~D

1 2

PD18

RB751V-40_SOD323~D

2 1

PC102

10U_1210_25V7K~D

1

2

PU7

MAX1535AX_QFN32~D

DHI 26

CSIN 20

DLO 23

SDA 14

CCS

6

CCV

8

CSSP 29

PDS

31

THM

13

VDD

12

SRC

27

ACIN

3

ACOK

32

DCIN

1

CCI

7

LDO 2

VMAX 9

BATT

19

DLOV 24

PDL

30

DHIV 25

CSSN 28

SCL 15

INT

16

CSIP 21

PGND 22

DAC

11

REF

4

GND

18

IMAX

10

GND

5

I.C.

17

PQ9 SI4825DY_SO8~D

3 6

5

7

8

2

4

1

PR131

102K_0402_1%~D

12

PR133

0_0402_5%~D

12

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Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Changed-List History

48 50, 12, 2004

Compal Electronics, Inc.

Version Change List ( P. I. R. List )

Item Issue DescriptionDate Request

Owner Solution Description Rev.Page#

1M00

2

Title

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

Change cardbus controller to TI PCI4515.Dell

VGA/B &

DVI CONN.

31&32 Change U162

18

Cardbus

10/16/03

Dell Add DVI connector. Add JDVI

25

28

40

Subwoofer

LED/B

SATA Bridge Dell

Dell

Dell

Add SATA to PATA circuit. Add page 25

Add page 28

Removed IR circuit. Delete U52

Add subwoofer circuit.

M00

M00

M00

M00

Removed internal MIC circuit.

Change LAN controller (U164) from 5751M to 4401.

Add pop option for the 5705 like Kapalua/Lindbergh board.

Depop 1394 choke, L142 and pop bypass

resistors, R1025, R1026, R1027, R1028

Change schematic revision from M00 to X00.

Dell

Dell

Dell

Dell

10/17/03

10/17/03

10/17/03

10/17/03

10/15/03

10/16/03

10/16/03

10/16/03

27

31&32

33

1

X00

X00

X00

X00Cover page

Cardbus

LOM

Amplifier &

Phone JACK

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

40 Compal01/07/04 X01Pop CLP4,5,10,11,13 and depop CLP18For EMI requirement.

PAD & ME &

spare parts

22

37

Dell

Dell

01/08/04

01/08/04

Compal40 PAD & ME &

spare parts 01/08/04

X01

X01

X01Pop H12,H13,H14,H17,H20,H21,H26,H27Added ME standoff.

Delete T4,T5,T29,T30 and add C661,C662

Add C663,C664

ICH6(3/4)

LED/B &

TV TUNER

Connected PCIE channel 1 to TV-Tuner connector.

Connected TV tuner signals.

01/28/0432 CardBus(2/2) Fixed SD card issue. The pin11 of JSD need to be connected to GND

and pin 12 need to be connected to U17 pin b3. X01

10

6

7&10

Alviso(1/5) 01/28/04

01/28/04

01/28/04

Dell

Dell

Dell

Clock Generator

Dothan(1/2)

&Alviso(1/5)

From Intel Message.

Per Intel and ICS recommendation.

Per the Intel Check list 1.301

Change C124 from 220pF to 0.1uF and move capacitor

as close as possible to the HVREF pin (pin J11 of U15).

Connect the SATA clock to SRC4 and connect the VGA clock to SRC1.

Change R397 and R114 to 75 ohm.

X01

X01

X01

01/29/04

Compal

Compal36 The BIOS debug connector is for bring up only. Delete JDBUG.

Internal K/B

& LCM CONN. X01

1 Cover page 01/29/04 Compal Change schematic revision from X00 to X01. X01

X01Compal01/29/04Macallen(2/2)35 Board ID X01. Pop R318 and depop R319.

X0134 01/29/04 CompalMacallen(1/2) Reserved a inverter for serial port debug. Add U36 and T13.

01/30/04 Compal Delete CLP5 and add H32 X0140 PAD & ME &

spare parts This clip have interferenced with screw hole.

37 02/02/04 Compal X01

LED/B &

TV TUNER The indicative LED of HDD doesn't work well. Remove R12 and connect the pin3 of Q2 to +3VRUN.

37 LED/B &

TV TUNER 02/04/04 Dell Changed JTUNR pin definitions Added PCIRST#, CLK_PCIE_TV/TV# signals

6 Dell02/04/04Clock Generator Added PCIE clock connection to JTUNR Added R551, R552, R553, R554

X01

X01

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Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Changed-List History

49 50, 12, 2004

Compal Electronics, Inc.

Solution Description Rev.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Page# Title

DELL CONFIDENTIAL/PROPRIETARY

Version Change List ( P. I. R. List )

Item Issue DescriptionDate Request

Owner

37 LED/B &

TV TUNER 02/05/04 Dell Changed JTUNR PCIRST# to PLTRST# or PLTRST_DELY# Pop Option Added R555, R556

26 X01

35

27 Macallen(2/2) 02/05/04 Dell Improves the rise time of the SMBUS signals. Allbatteryvendors and

Compal agree to the change per Youseff Dauo. Change battery SMBUS pullups, R336 and R526, from 22K to 8.2k. X01

28

29

5

13&23

SMBus Diagram

Alviso(4/5)

&ICH6(4/4)

02/05/04

02/05/04

Dell Add a SMbus device address table in the Schematic.

Panasonic has phase out SGA2022114L.

X01

X01Change C510,C514 from SGA2022114L to SGA2022110L.Compal

30

31

32

02/06/04

02/06/04

02/06/04

Dell

Dell

Dell

38 Power control

VGA/B &

DVI CONN.

Subwoofer

18

27

X01

X01

X01

SUSPWROK_5V no longer controls the switching FET for +3VSUS.

Add bulk capacitor to G_PWR_SRC.

Add 0 ohm pop options to make it easier to

switch between both subwoofer amps.

Removed R256 and R257.

Add C647, but nopop.

Add R12,R79 for pop options.

33

34

37

28 USB 2.0 PORT

02/06/04

02/06/04

Dell

Dell

TV tuner solution for X01 gerber.

Change the single USB port in the back to dual stack.

Change JTV1,JTV2 and JTUNR pin definitions.

JTV1 is a 8pin MINI DIN CONN.

Add L14,L17,C88,C87 and change the P/N of JUSB1.

X01

X01

LED/B &

TV TUNER

35 39 Dell02/09/04

Power

Sequence X01Change R482 from 330ohm to 10K. Change R490 from 10k to 100K.

Delays 1.5VSUS power good so that it comes up after 1.5VSUS

is completely up.

36 37 LED/B &

TV TUNER 02/09/04 Dell Add L73,L74,L75,L76,L88,C438,C442,C419,C420,C431,C433,C434,C424

,C439,C610

Add EMI pi-filters for 5 AV signals. X01

37 38 Power control 02/10/04 Dell Decrease Rdson for +1.5SUS to +1.5RUN switching FET. Add Q55 and nopop Q35. X01

35 02/11/04Macallen(2/2) Delete RN28 and RN29.

Backout workaround for SMSC errata item. Connect

CLK_SM2 and DAT_SM2 appropriately.

Dell

38 X01

ICH6(3/4) SIO_EXT_WAK# signal leakage to +3VRUN via GPI12 of

ICH6M when system is into S3 status.

22 02/11/04 Dell Added R90, R91 (0 ohm pop option)

39 X01

40 02/11/04 Dell38 Power control X01

Add drain FETs for +1.5VSUS and +1.8VSUS. FETs to drain power

plane when system is turned off. Added R87~R89, Q31, Q34, Q48

41

42

Dell02/11/0418 ME team decided to use JAE DVI-I connector (with shielding) instead of

Suyin DVI-D connector (without shielding) for EA/SST build this time.

System auto power on issue.

Change the P/N of JDVI

Change C609 from 1uF to 0.1uF and R504 from 100K to 10K ohm.

VGA/B &

DVI CONN.

02/11/04 Compal

X01

X0135 Macallen(2/2)

43 02/11/04 X01Compal Change the footprint of Q13,Q19,Q21,Q28,Q35,Q47,Q52,Q7Reduce the pad width by compal's DFX requirement.

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Title

Size Document Number Rev

Date: Sheet of

LA-2171 0.2

Power-Changed-List History

50 50, 12, 2004

Compal Electronics, Inc.

Version Change List ( P. I. R. List ) for Power Circuit

Solution Description Rev.

18

19

20

21

7

8

9

10

11

12

Page#

1

2

13

14

15

16

Compal2003/10/14Charger selector49

Title

5

6

Item Issue DescriptionDate

22

Request

Owner

23

24

17

0.0

25

Modify charger selector circuit.

3

4

Need to discuss.

42 PSID & +3VX 2003/10/15 Compal Modify PSID circuit same as Nimitas. And add current limit resistor on

RTC charger. Add ESD solution on PSID, and limit RTC charge current. 0.0

44 +15VP 2003/11/4 Compal +15VP current rating is not enough for subwoofer Use MB3800 Boost IC to genearte +15VP from +5VSUSP X00

47 Charger Compal2003/11/5 That has leakage current from battery goes through PQ22 and PQ44 to

DC_IN. Move Adaptor current sense PR144 after PQ24 and before PWR_SRC.

That is same as Nimitaz. X00

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

44 +15VP 2003/12/11 Compal Test +15VP on Demon board.The output ripple voltage is large

and improve efficiency. Add PC128 10U_1206_25V,change PQ30 from SI2302DS to SI3442DV,

change PR157 form 392_0603_1% to 150_0603_1%, no-pop PC96. M00

45 2004/2/1 DELL+1.8VSUSP X01Change DDRII DC-DC solution for cost down. Using MAXIM MAX8550 .

Compal2004/2/143 VCCP_1p05VP has two 330uF caps on it(PC10, PC11), Laguna

only has one. Do we need two? Can de-populate PC11,and test is OK. X01+VCCP_1P05VP

45 2004/2/5 Compal+1.8VSUSP Voltage divider setting is error, the FB regulate on 0.7V. Change PR116 from 45.3K_0402_1% to 27.4K_0603_1%.

Change PC22 from 1U_0603_6.3V to 4.7U_0805_6.3V X01

46 +VCC_CORE 2004/2/5 Compal Choke height is over mechnical height limitation X01Change PL6 and PL7 from 0.6U_HK_AE26A0R6 to 0.7U_ETQP2H0R7BFL.

46 +VCC_CORE 2004/2/6 Compal EMI broad band test is over 1~2 db Change PR10 and PR21 from 0_0603_5% to 2.2_0603_5%. X01

41

45

PS_ID 2004/2/11 DELL Open issue #60 Change PS_ID pullup resistor, PR78, from 1.5K to 2.2K Change PR78 from 1.5K_0603_1% to 2.2K_0402_5%. X01

+0.9V_DDR_VTTP 2004/2/11 DELL Open issue#63 Please add a 10uf, 1206 package capacitor at the output

of PU5 pin 12, +0.9V_DDR_VTTP. Add and reserve PC131 10U_1206_6.3V7K. X01

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