Compal LA 2771 Schematics. Www.s Manuals.com. R0.8 Schematics

User Manual: Compal LA-2771 - Schematics. Free.

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Page Count: 54

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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Cover Page
Custom
153Tuesday, August 30, 2005
2005/03/01 2005/04/06
REV:0.8
Compal confidential
Schematics Document
AMD K8 with
ATI RS480M+ATI SB400
2005-08-29
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A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Block Diagram
Custom
253Tuesday, August 30, 2005
2005/03/01 2005/04/06
LPC BUS
File Name : LA-2771
page 9,10
Compal confidential
USB conn X3
Thermal Sensor
ADM1032
CardBus Controller
Audio CKT
AMOM
page 34
BT Conn
PCI BUS
Clock Generator
ICS 951412
page 16
CRT & TV OUT
LVDS Panel
Interface
page 17
page 18
AMP & Audio Jack
page 33
page 4, 5, 6, 7
page 27
Slot 0
page 26
Card reader
page 19, 20, 21, 22
Memory BUS(DDR)
Power Circuit DC/DC
Fan Control
SPR CONN.
page 40
DC/DC Interface CKT.
TI PCI7411/PCI1510
2. 5V DDR- 400
page 8,10
DDR-SO-DIMM-0
BANK 0, 1, 2, 3
754 pin
A-Link Express
page 32
MODEM
AMOM
2 x PCIE
ATI-SB400
page 11, 12, 13, 14
564 BGA
2. 5V DDR- 400
New Card
Connector
page 27
PATA HDD
Connector
1 x PCIE
AC-LINK
page 24
page 24
page 25,26,27
page 31
page 37, 38
page 39
page 35
ATI-RS480M
DDR-SO-DIMM-1
BANK 0, 1, 2, 3
page 35
page 34
3.3V 33 MHz
Power On/Off CKT.
page 4
page 29
RTL 8100CL
RJ45 CONN
LAN
page 29
Int.KBD
ENE KB910/L
page 42
page 35
Touch Pad
page 41
BIOS
Mobile
AMD Athlon 64
Power OK CKT.
RTC CKT.
705 BGA
CDROM
Connector
page 43~49
HT 16x16 1000MHZ
page 4
*RJ45 CONN
*MIC IN JACK
*LINE OUT JACK
*1394 CONN
*SPDIF CONN
*DC JACK
*TVOUT CONN
*USB CONN x1
*CIR x1
page 19
USB2.0
ATA-100
Primary IDE
Side Port(VRAM)
16M x 16
page 15
MINI PCI
page 30
page 25
1394
TV tuner
page 34
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A
1 1
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Notes List
Custom
353Tuesday, August 30, 2005
2005/03/01 2005/04/06
A
A
LPC I/F
PCI to PCI
OHCI#1 USB
OHCI#1 USB
EHCI USB
SATA#1
SATA#2
PCI Devices
B
AC97 MODEM B
INTERNAL
EXTERNAL
IDSEL # PIRQREQ/GNT #
A
DEVICE
D
D
D
IDE
AC97 AUDIO
LAN
CARD BUS & 1394
Wireless LAN
O MEANS ON
X MEANS OFF
AD20
AD18
AD22
3
2
1
E,H
F
G
SMBUS
+1.25V
State
+1.5VS
+5V
S5 S4/AC don't exist
S5 S4/AC
+5VALW
S0
O
O
O
O
X
+2.5VDDA
Voltage Rails
S3
+3VS
X
+12VALW
X
+3VALW
+2.5V
+5VS
S1
O
+2.5VS
+CPU_CORE
+1.8VS
+1.8VALW
OO
OO
X
XX
+1.2V_HT
power
plane
HAL10 17"
HAL20 FF 15.4"
HAL20 DF 15.4"
VRAM@ , SAMSUNG@, HYNIX@, 2HDD@ ,7411@ ,EXP@ ,17_EXP@ ,CIR@
,D@ ,DOCK@,WL_LED@
EXP@, C@ ,DOCK@ ,15.4@(LED), CIR@, WLAN@, 15_EXP@
BOM STATUS :
VRAM@ ,VRAMIC@, SAMSUNG@, HYNIX@, 2HDD@ ,7411@ ,EXP@ ,17_EXP@
,15_EXO@,CIR@ ,D@, C@, 15.4@, DOCK@, WL_LED@
45@ ( for 45 level RTC battery )
VRAM@ , SAMSUNG@, HYNIX@, 2HDD@ ,7411@ ,EXP@ ,15_EXP@ ,CIR@
,C@ ,DOCK@,WL_LED@, 15.4@(LED)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
H_CADIP[0..15]
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CLKIP0
H_CLKIP1
H_CLKIN1
H_CLKIN0
H_CTLIN0
LVREF1
H_CTLIP0 H_CTLOP0
H_CTLON0
H_CLKON1
H_CLKOP1
H_CLKON0
H_CLKOP0
H_CADIN15
H_CADIN14
H_CADIN13
H_CADIP14
H_CADIP13
H_CADIN12
H_CADIP12
H_CADIN10
H_CADIN11
H_CADIP10
H_CADIP11
H_CADIN9
H_CADIP7
H_CADIN7
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN6
H_CADIN4
H_CADIN5
H_CADIP5
H_CADIP4
H_CADIP6
H_CADIN3
H_CADIN1
H_CADIP3
H_CADIP1
H_CADIN2
H_CADIP2
H_CADIN0
H_CADIP0
H_CADIP15
H_CADON3
H_CADON10
H_CADON9
H_CADON1
H_CADOP15
H_CADOP14
H_CADOP13
H_CADOP12
H_CADOP11
H_CADOP10
H_CADOP9
H_CADOP8
H_CADOP7
H_CADOP1
H_CADOP6
H_CADOP5
H_CADOP4
H_CADOP3
H_CADOP2
H_CADOP0
H_CADON15
H_CADON14
H_CADON13
H_CADON12
H_CADON11
H_CADON8
H_CADON7
H_CADON6
H_CADON5
H_CADON4
H_CADON2
H_CADON0
LVREF0 LDTSTOP#
THERMDC_CPU
THERMDA_CPU
THERMDA_CPU
THERMDC_CPU
EC_SMD_2
EC_SMC_2
FAN1_ON
FAN1
H_CADIP[0..15]<11>
H_CADON[0..15] <11>H_CADIN[0..15]<11>
H_CADOP[0..15] <11>
H_CLKIN1<11>
H_CLKIN0<11> H_CLKIP0<11>
H_CTLIN0<11>
H_CLKIP1<11>
H_CTLIP0<11>
H_CLKOP1 <11>
H_CTLOP0 <11>
H_CLKON0 <11>
H_CLKON1 <11>
H_CLKOP0 <11>
H_CTLON0 <11>
LDTSTOP# <13,19>
THERMDA_CPU <6>
THERMDC_CPU <6>
EC_SMC_2<37,38>
EC_SMD_2<37,38>
FAN_SPEED1<37,38>
EN_FAN1<37,38>
+1.2V_HT
+2.5VS
+1.2V_HT
+3VS
B+
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Claw Harmmer & Fan
Custom
453Tuesday, August 30, 2005
2005/03/01 2005/04/06
W=15mil
Thermal Sensor
ADM1032
Fan Control Circuit
R3
150K_0402_5%
12
R7 44.2_0603_1%
1 2
JP2
ACES_85205-0300
1
2
3
R1
10K_0402_5%
1 2
C4 10U_0805_10V4Z
1
2
C5
1000P_0402_50V7K
@
1
2
LA-2771 REV 0
ZZZ1
C7
2200P_0402_50V7K
1
2
S
GD
Q1
SI3456DV-T1_TSOP6
3
6
2
4 5
1
C3
1000P_0402_50V7K
@
1
2
R4 49.9_0402_1%
12
U1A
LM358A_SO8
+IN
3
-IN
2OUT 1
P8
G
4
R8
680_0402_5%
1 2
D1
1N4148_SOT23
1
3
2
R6 44.2_0603_1%
12
R2
100K_0402_5%
1 2
C2
0.1U_0402_16V4Z
12
C6
0.1U_0402_16V4Z
1
2
U2
ADM1032AR_SOP8
VDD 1
ALERT#
6
THERM# 4
GND
5
D+ 2
D- 3
SCLK
8
SDATA
7
HTT Interface
Claw Hammer-DTR
JP1A
FOX_PZ75403-2941-42
L0_CADOUT_L0 F29
L0_CADOUT_L1 F27
L0_CADOUT_L2 H29
L0_CADOUT_L3 H27
L0_CADOUT_L4 K27
L0_CADOUT_L5 M29
L0_CADOUT_L6 M27
L0_CADOUT_L7 P29
L0_CADOUT_L8 E27
L0_CADOUT_L9 F25
L0_CADOUT_L10 G27
L0_CADOUT_L11 H25
L0_CADOUT_L12 K25
L0_CADOUT_L13 L27
L0_CADOUT_L14 M25
L0_CADOUT_L15 N27
L0_CADOUT_H0 E29
L0_CADOUT_H1 F28
L0_CADOUT_H2 G29
L0_CADOUT_H3 H28
L0_CADOUT_H4 K28
L0_CADOUT_H5 L29
L0_CADOUT_H6 M28
L0_CADOUT_H7 N29
L0_CADOUT_H8 E26
L0_CADOUT_H9 E25
L0_CADOUT_H10 G26
L0_CADOUT_H11 G25
L0_CADOUT_H12 J25
L0_CADOUT_H13 L26
L0_CADOUT_H14 L25
L0_CADOUT_H15 N26
L0_CLKOUT_L0 K29
L0_CLKOUT_L1 J27
L0_CLKOUT_H0 J29
L0_CLKOUT_H1 J26
L0_CTLOUT_L0 P27
L0_CTLOUT_L1 P25
L0_CTLOUT_H0 P28
L0_CTLOUT_H1 N25
L0_CADIN_L0
AD28
L0_CADIN_L1
AC29
L0_CADIN_L2
AB28
L0_CADIN_L3
AA29
L0_CADIN_L4
W29
L0_CADIN_L5
V28
L0_CADIN_L6
U29
L0_CADIN_L7
T28
L0_CADIN_L8
AC25
L0_CADIN_L9
AC26
L0_CADIN_L10
AA25
L0_CADIN_L11
AA26
L0_CADIN_L12
W26
L0_CADIN_L13
U25
L0_CADIN_L14
U26
L0_CADIN_L15
R25
L0_CADIN_H0
AD27
L0_CADIN_H1
AD29
L0_CADIN_H2
AB27
L0_CADIN_H3
AB29
L0_CADIN_H4
Y29
L0_CADIN_H5
V27
L0_CADIN_H6
V29
L0_CADIN_H7
T27
L0_CADIN_H8
AD25
L0_CADIN_H9
AC27
L0_CADIN_H10
AB25
L0_CADIN_H11
AA27
L0_CADIN_H12
W27
L0_CADIN_H13
V25
L0_CADIN_H14
U27
L0_CADIN_H15
T25
L0_CLKIN_L0
Y28
L0_CLKIN_L1
W25
L0_CLKIN_H0
Y27
L0_CLKIN_H1
Y25
L0_CTLIN_L0
R29
L0_CTLIN_L1
R26
L0_CTLIN_H0
T29
L0_CTLIN_H1
R27
L0_REF1
AF27
L0_REF0
AE26 LDTSTOP_L AJ27
R5 49.9_0402_1%
12
C1
10U_1206_16V4Z
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_CLK7
DDR_CLK6
DDR_CLK5
DDR_CLK4
DDR_CLK7#
DDR_CLK6#
DDR_CLK5#
DDR_CLK4#DDR_CLK4#
DDR_CLK4
DDR_CLK6#
DDR_CLK6
DDR_SDQ63
DDR_SDQ62
DDR_SDQ61
DDR_SDQ60
DDR_SDQ59
DDR_SDQ58
DDR_SDQ57
DDR_SDQ56
DDR_SDQ55
DDR_SDQ54
DDR_SDQ51
DDR_SDQ52
DDR_SDQ53
DDR_SDQ50
DDR_SDQ47
DDR_SDQ46
DDR_SDQ49
DDR_SDQ48
DDR_SDQ45
DDR_SDQ43
DDR_SDQ44
DDR_SDQ39
DDR_SDQ38
DDR_SDQ42
DDR_SDQ41
DDR_SDQ37
DDR_SDQ40
DDR_SDQ36
DDR_SDQ33
DDR_SDQ32
DDR_SDQ31
DDR_SDQ30
DDR_SDQ35
DDR_SDQ29
DDR_SDQ34
DDR_SDQ28
DDR_SDQ27
DDR_SDQ24
DDR_SDQ22
DDR_SDQ26
DDR_SDQ23
DDR_SDQ25
DDR_SDQ21
DDR_SDQ20
DDR_SDQ19
DDR_SDQ18
DDR_SDQ16
DDR_SDQ17
DDR_SDQ12
DDR_SDQ15
DDR_SDQ11
DDR_SDQ10
DDR_SDQ14
DDR_SDQ13
DDR_SDQ9
DDR_SDQ2
DDR_SDQ8
DDR_SDQ1
DDR_SDQ7
DDR_SDQ6
DDR_SDQ5
DDR_SDQ4
DDR_SDQ3
DDR_SDQ0
DDR_SDM6
DDR_SDM5
DDR_SDM4
DDR_SDM7
DDR_SDM3
DDR_SDM2
DDR_SDM1
DDR_SDM0
MEMZN
MEMZP
DDR_SDQS2
DDR_SDQS5
DDR_SDQS1
DDR_SDQS6
DDR_SDQS7
DDR_SDQS3
DDR_SDQS0
DDR_SDQS4
DDR_SMAA12
DDR_SMAA1
DDR_SMAA6
DDR_SMAA0
DDR_SMAA4
DDR_SMAA5
DDR_SMAA2
DDR_SMAA8
DDR_SMAA10
DDR_SMAA9
DDR_SMAA3
DDR_SMAA11
DDR_SMAA7
DDR_SMAA13
DDR_CLK5#
DDR_CLK5
DDR_CLK7#
DDR_CLK7
DDR_CKE0
DDR_CKE1
DDR_SBSA0
DDR_SBSA1
DDR_SCS#0
DDR_SCS#1
DDR_SMAB12
DDR_SMAB1
DDR_SMAB6
DDR_SMAB0
DDR_SMAB4
DDR_SMAB5
DDR_SMAB2
DDR_SMAB8
DDR_SMAB10
DDR_SMAB9
DDR_SMAB3
DDR_SMAB11
DDR_SMAB7
DDR_SMAB13
DDR_SRASA#
DDR_SCASA#
DDR_SWEA#
DDR_SRASB#
DDR_SCASB#
DDR_SWEB#
DDR_SSB0
DDR_SBSB1
DDR_SCS#2
DDR_SCS#3
DDR_CLK4 <9>
DDR_CLK4# <9>
DDR_CLK6 <9>
DDR_CLK6# <9>
DDR_SDQ[0..63]<8>
DDR_SDQS[0..7]<8>
DDR_SMAA[0..13] <8>
DDR_CLK5# <8>
DDR_CLK5 <8>
DDR_CKE1 <9>
DDR_CLK7# <8>
DDR_CLK7 <8>
DDR_CKE0 <8>
DDR_SCS#1 <8>
DDR_SCS#0 <8>
DDR_SBSA1 <8>
DDR_SBSA0 <8>
DDR_SMAB[0..13] <9>
DDR_SWEA# <8>
DDR_SCASA# <8>
DDR_SRASA# <8>
DDR_SWEB# <9>
DDR_SCASB# <9>
DDR_SRASB# <9>
DDR_SBSB1 <9>
DDR_SBSB0 <9>
DDR_SCS#3 <9>
DDR_SCS#2 <9>
DDR_SDM[0..7]<8>
+2.5V
+1.25VREF_CPU
+1.25VREF_CPU
+2.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Claw Harmmer/DDR
Custom
553Tuesday, August 30, 2005
2005/03/01 2005/04/06
50 mil width/20 mil space
R1034.8_0603_1%
12
R16
1K_0402_1%
12
R17
1K_0402_1%
12
DDR Memory
A CHANGEL ADDRESSB CHANGEL ADDRESS
Claw Hammer-DTR
JP1B
FOX_PZ75403-2941-42
MEMCKEA AE8
MEMCKEB AE7
MEMCLK_L0 P4
MEMCLK_L1 P5
MEMCLK_L2 K4
MEMCLK_L3 V4
MEMCLK_L4 AE10
MEMCLK_L5 AG8
MEMCLK_L6 E11
MEMCLK_L7 C10
MEMCLK_H0 P3
MEMCLK_H1 R5
MEMCLK_H2 K5
MEMCLK_H3 V3
MEMCLK_H4 AF10
MEMCLK_H5 AF8
MEMCLK_H6 E12
MEMCLK_H7 D10
MEMCS_L0 E5
MEMCS_L1 C4
MEMCS_L2 E6
MEMCS_L3 D6
MEMCS_L4 E7
MEMCS_L5 E8
MEMCS_L6 C8
MEMCS_L7 D8
MEMRASA_L H5
MEMWEA_L G5
MEMCASA_L D4
MEMBANKA0 H3
MEMBANKA1 K3
MEMDATA0
AJ16 MEMDATA1
AJ14 MEMDATA2
AJ12 MEMDATA3
AG11 MEMDATA4
AJ15 MEMDATA5
AH15 MEMDATA6
AJ11 MEMDATA7
AH11 MEMDATA8
AJ10 MEMDATA9
AJ9 MEMDATA10
AH5 MEMDATA11
AG5 MEMDATA12
AH9 MEMDATA13
AJ7 MEMDATA14
AJ6 MEMDATA15
AJ5 MEMDATA16
AJ3 MEMDATA17
AH3 MEMDATA18
AF1 MEMDATA19
AE2 MEMDATA20
AJ4 MEMDATA21
AG3 MEMDATA22
AE3 MEMDATA23
AE1 MEMDATA24
AD1 MEMDATA25
AC2 MEMDATA26
Y1 MEMDATA27
W2 MEMDATA28
AC3 MEMDATA29
AC1 MEMDATA30
W3 MEMDATA31
W1 MEMDATA32
M1 MEMDATA33
L2 MEMDATA34
J2 MEMDATA35
G3 MEMDATA36
L1 MEMDATA37
L3 MEMDATA38
G1 MEMDATA39
G2 MEMDATA40
F1 MEMDATA41
E3 MEMDATA42
B3 MEMDATA43
A3 MEMDATA44
E1 MEMDATA45
E2 MEMDATA46
A4 MEMDATA47
C5 MEMDATA48
B5 MEMDATA49
A5 MEMDATA50
A9 MEMDATA51
C11 MEMDATA52
A6 MEMDATA53
C7 MEMDATA54
B9 MEMDATA55
A10 MEMDATA56
A11 MEMDATA57
C13 MEMDATA58
A15 MEMDATA59
A17 MEMDATA60
B11 MEMDATA61
A12 MEMDATA62
B15 MEMDATA63
A16
MEMDQS0
AJ13 MEMDQS1
AJ8 MEMDQS2
AJ2 MEMDQS3
AB1 MEMDQS4
J1 MEMDQS5
D1 MEMDQS6
A8 MEMDQS7
A14 MEMDQS8
T1 MEMDQS9
AH13 MEMDQS10
AH7 MEMDQS11
AG1 MEMDQS12
AA1 MEMDQS13
H1 MEMDQS14
C2 MEMDQS15
A7 MEMDQS16
A13 MEMDQS17
R1
MEMZN
D14
MEMZP
C14
MEMVREF1
AG12
MEMADDA13 E10
MEMADDA12 AE6
MEMADDA11 AF3
MEMADDA10 M5
MEMADDA9 AE5
MEMADDA8 AB5
MEMADDA7 AD3
MEMADDA6 Y5
MEMADDA5 AB4
MEMADDA4 Y3
MEMADDA3 V5
MEMADDA2 T5
MEMADDA1 T3
MEMADDA0 N5
MEMRASB_L H4
MEMCASB_L F5
MEMWEB_L F4
MEMBANKB1 L5
MEMBANKB0 J5
MEMADDB_B13 E9
MEMADDB_B12 AF6
MEMADDB_B11 AF4
MEMADDB_B10 M4
MEMADDB_B9 AD5
MEMADDB_B8 AC5
MEMADDB_B7 AD4
MEMADDB_B6 AA5
MEMADDB_B5 AB3
MEMADDB_B4 Y4
MEMADDB_B3 W5
MEMADDB_B2 U5
MEMADDB_B1 T4
MEMADDB_B0 M3
MEMCHECK7 N3
MEMCHECK6 N1
MEMCHECK5 U3
MEMCHECK4 V1
MEMCHECK3 N2
MEMCHECK2 P1
MEMCHECK1 U1
MEMCHECK0 U2
R13 120_0402_5%
1 2
R15 120_0402_5%
1 2
R1134.8_0603_1%
12
C9
1000P_0402_50V7K
1
2
R14 120_0402_5%
1 2
R12 120_0402_5%
1 2
C8
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_PWRGD
TRST#
TDI
TCK
TDO
DBRDY
DBREQ#
H_RST_CPU#
FBCLKOUT#
FBCLKOUT
DBREQ#
H_THERMTRIP_S#
TDI
TRST#
TCK
DBRDY
CLKIN#
CLKIN
CPU_COREFB
CPU_COREFB#
SCANSHENA
SCANSHENB
SCANEN
SCANCLK2
SCANCLK1
BRN#
BP0
BP1
TP_CPU_BP2
TP_K8_C15
TP_CPU_BP3
TP_K8_AF24
TP_K8_AE24
SINCHN
BPSCLK
BPSCLK#
CLAW_ANALOG2
CLAW_ANALOG3
CLAW_ANALOG0
CLAW_ANALOG1
TP_M_RESET#
TP_K8_D22
TP_K8_C22
TMS
TMS
TDO
VDDIO_SENSE
VDDIOFB_L
VDDIOFB_H
VID1
VID2
VID4
VID3
VID0
+VDDA
H_PWRGD
THERMDA_CPU
THERMDC_CPU
TP_K8_A28
TP_K8_AJ28
H_RST#
SCANSHENB
SCANEN
SCANCLK1
SCANCLK2
VTT_SENSE
H_THERMTRIP_S# H_THERMTRIP#
SUSP
H_RST#
H_RST#<19>
CPU_COREFB<48> CPU_COREFB#<48>
CPUCLK0_H<16>
CPUCLK0_L<16>
VID4<48> VID3<48> VID2<48> VID1<48> VID0<48>
H_PWRGD<19>
THERMDA_CPU<4> THERMDC_CPU<4>
H_THERMTRIP# <20>
SUSP <41,47>
+2.5VS
+2.5VS
+2.5VS
+2.5VS
+2.5V
+2.5V
+2.5VDDA
+1.25V
+1.25V
+1.25V
+1.25V
+3VS +2.5VDDA
+2.5VS
+1.25V
+1.2V_HT
+1.2V_HT
+2.5VS
+2.5VS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Claw Harmmer(MISC)
Custom
653Tuesday, August 30, 2005
2005/03/01 2005/04/06
Place 169 Ohm within 0.5" from CPU
Route as DIF 5/5/5/20
Place within 0.5" from CPU
Route as 80 Ohm DIFF impedence 8/5/20
Route as DIFF pair 10/5/10
50 mil/20 mil
Near Power Supply
250 mil
07/11 change for reduce H_RST# glitch
C39
0.01U_0402_16V7K@
1
2
C16
4.7U_0805_6.3V6K
1
2
R38
560_0402_5% @ 12
T8PAD
T5 PAD
C42
4.7U_0805_6.3V6K
1
2
R35
560_0402_5% @ 12
R28 680_0402_5%
12
T15 PAD
T17PAD
C41
0.22U_0603_10V7K
1
2
R36
560_0402_5% @
12
C28
0.22U_0603_10V7K
1
2
R37
560_0402_5% @
12
T6PAD
C35
3300P_0402_50V7K
1
2
R33 680_0402_5%
1 2
R27 820_0402_5%
1 2
T12 PAD
C32 3900P_0402_50V7K
12
+
C10
220U_D2_2.5VM
1
2
RP1
680_1206_8P4R_5%
1 8
2 7
3 6
4 5
C27
0.22U_0603_10V7K
1
2
T4PAD
C19
4.7U_0805_6.3V6K
1
2
C49
0.22U_0603_10V7K
1
2
C34
4.7U_0805_6.3V6K
1
2
C46
0.22U_0603_10V7K
1
2
L1
LQG21F4R7N00_0805
1 2
R24
0_0805_5%
1 2
R29 680_0402_5%
1 2
R30 680_0402_5%
1 2
T16 PAD
C48
0.22U_0603_10V7K
1
2
R31 680_0402_5%
1 2
C30
0.22U_0603_10V7K
1
2
R19
680_0402_5%
12
C26
0.22U_0603_10V7K
1
2
G
D
S
Q61
2N7002_SOT23
2
13
C17
4.7U_0805_6.3V6K
1
2
R25 820_0402_5%
1 2
C24
0.22U_0603_10V7K
1
2
C38
1U_0603_10V4Z
1
2
T10 PAD
T14 PAD
C13
4.7U_0805_6.3V6K
1
2
C40
0.22U_0603_10V7K
1
2
T9 PAD
C12
4.7U_0805_6.3V6K
1
2
C36
0.22U_0603_10V7K
1
2
C22
0.22U_0603_10V7K
1
2
C20
4.7U_0805_6.3V6K
1
2
C31 3900P_0402_50V7K
12
C45
0.22U_0603_10V7K
1
2
R40
560_0402_5%@12
+
C11
220U_D2_2.5VM
1
2
+
C33
100U_6.3V_M
1
2
C21 0.001U_0402_50V7M@1 2
R32
100_0402_5%
@
12
C37
1U_0603_10V4Z@ 1
2
C14
4.7U_0805_6.3V6K
1
2
C23
0.22U_0603_10V7K
1
2
R20
10K_0402_5%
12
R41
560_0402_5%@
12
R18
1K_0402_5%
12
C15
4.7U_0805_6.3V6K
1
2
R22
169_0402_1%
12
T3 PAD
R34 680_0402_5%
1 2
C25
0.22U_0603_10V7K
1
2
+
C43
100U_D2_10VM
1
2
C29
0.22U_0603_10V7K
1
2
C47
0.22U_0603_10V7K
1
2
Q2
MMBT3904_SOT23
2
3 1
C44
0.22U_0603_10V7K
1
2
J1
JOPEN
1 2
SAMTEC_ASP-68200-07
JP3
2
4
6
8
10
12
14
16
18
20
22
2423
21
19
17
15
13
11
9
7
5
3
1
26
T7 PAD
T2 PAD
R39
560_0402_5% @
12
T11 PADR26 680_0402_5%
12
U3
G914E_SOT23-5@
IN
1
GND
2
SHDN
3BYP 4
OUT 5
T18PAD
JTAG
Miscellaneous
Clock
Debug
Claw Hammer-DTR
JP1C
FOX_PZ75403-2941-42
NC B13
NC B7
NC C3
NC K1
NC R2
NC AA3
NC F3
NC C23
NC AG7
NC AE22
NC C24
NC A25
NC C9
NC AE23
NC AF23
NC AF22
NC AF21
NC C1
NC J3
NC R3
NC AA2
NC D3
NC AG2
NC B18
NC AH1
NC AE21
NC C20
NC AG4
NC C6
NC AG6
NC AE9
NC AG9
NC AF18
NC AJ23
NC AH23
NC AE24
NC AF24
NC C15
NC AG18
NC AH18
NC AG17
NC AJ18
NC C18
NC A19
NC D20
NC C21
NC D18
NC C19
NC B19
NC D22
NC C22
TMS
E20
TCK
E17
TRST_L
B21
TDI
A21
TDO
A22
COREFB_H
A23
COREFB_L
A24
CORE_SENSE
B23
THERMDA
A26
THERMDC
A27
KEY1
A28
KEY0
AJ28
RESET_L
AF20
PWROK
AE18
VLDT0_A
D29
VLDT0_A
D27
VLDT0_A
D25
VLDT0_A
C28
VLDT0_A
C26
VLDT0_A
B29
VLDT0_A
B27
VLDT0_B AH29
VLDT0_B AH27
VLDT0_B AG28
VLDT0_B AG26
VLDT0_B AF29
VLDT0_B AE28
VLDT0_B AF25
VTT_A
D17
VTT_A
A18
VTT_A
B17
VTT_A
C17
VTT_A
C16
VTT_B AG15
VTT_B AF16
VTT_B AG16
VTT_B AH16
VTT_B AJ17
VTT_SENSE AE13
THERMTRIP_L
A20
NC E13
NC C12
NC E14
NC D12
NC AG10
CLKIN_H
AJ21
CLKIN_L
AH21
FBCLKOUT_H
AH19
FBCLKOUT_L
AJ19
VDDIOFB_H
AE12
VDDIOFB_L
AF12
VDDIO_SENSE
AE11
VDDA1
AH25
VDDA2
AJ25
VID4
AG13
VID3
AF14
VID2
AG14
VID1
AF15
VID0
AE15
DBRDY
AH17
DBREQ_L
AE19
C18
4.7U_0805_6.3V6K
1
2
T13 PAD
R2380.6_0402_1%
1 2
T1 PAD
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+2.5V
+2.5V
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+2.5V
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Claw Harmmer(Power)
Custom
753Tuesday, August 30, 2005
2005/03/01 2005/04/06
Near Socket
CPU Decouping Capacitor
Close to socket
Loop Bandwidth
KHz Bulk Cappacitance
uF
900050
0.9m ohm
2300020
Total
ESR
2.5m ohm
(AMD)
1500
2.5m ohm
* 300
4 in Socket Cavity
2 on backside under Socket
In Socket Cavity
For EMI require
POWER
JP1E
FOX_PZ75403-2941-42
VSS
B2
VSS
AH20
VSS
AB21
VSS
W22
VSS
M23
VSS
L24
VSS
AG25
VSS
AG27
VSS
D2
VSS
AF2
VSS
W6
VSS
Y7
VSS
AA8
VSS
AB9
VSS
AA10
VSS
J12
VSS
B14
VSS
Y15
VSS
AE16
VSS
J18
VSS
G20
VSS
R20
VSS
U20
VSS
W20
VSS
AA20
VSS
AC20
VSS
AE20
VSS
AG20
VSS
AJ20
VSS
D21
VSS
F21
VSS
H21
VSS
K21
VSS
M21
VSS
P21
VSS
T21
VSS
V21
VSS
Y21
VSS
AD21
VSS
AG21
VSS
B22
VSS
E22
VSS
G22
VSS
J22
VSS
L22
VSS
N22
VSS
R22
VSS
U22
VSS
AG29
VSS
AA22
VSS
AC22
VSS
AG22
VSS
AH22
VSS
AJ22
VSS
D23
VSS
F23
VSS
H23
VSS
K23
VSS
P23
VSS
T23
VSS
V23
VSS
Y23
VSS
AB23
VSS
AD23
VSS
AG23
VSS
E24
VSS
G24
VSS
J24
VSS
N24
VSS
R24
VSS
U24
VSS
W24
VSS
AA24
VSS
AC24
VSS
AG24
VSS
AJ24
VSS
B25
VSS
C25
VSS
B26
VSS
D26
VSS
H26
VSS
M26
VSS
T26
VSS
Y26
VSS
AD26
VSS
AF26
VSS
AH26
VSS
C27
VSS
B28
VSS
D28
VSS
G28
VSS L28
VSS R28
VSS W28
VSS AC28
VSS AF28
VSS AH28
VSS C29
VSS F2
VSS H2
VSS K2
VSS M2
VSS P2
VSS T2
VSS V2
VSS Y2
VSS AB2
VSS AD2
VSS AH2
VSS B4
VSS AH4
VSS B6
VSS G6
VSS J6
VSS L6
VSS N6
VSS R6
VSS U6
VSS AA6
VSS AC6
VSS AH6
VSS F7
VSS H7
VSS K7
VSS M7
VSS P7
VSS T7
VSS V7
VSS AB7
VSS AD7
VSS B8
VSS G8
VSS J8
VSS L8
VSS N8
VSS R8
VSS U8
VSS W8
VSS AC8
VSS AH8
VSS F9
VSS H9
VSS K9
VSS M9
VSS P9
VSS T9
VSS V9
VSS Y9
VSS AD9
VSS B10
VSS G10
VSS J10
VSS L10
VSS N10
VSS R10
VSS U10
VSS W10
VSS AC10
VSS AH10
VSS F11
VSS H11
VSS K11
VSS Y11
VSS AB11
VSS AD11
VSS B12
VSS G12
VSS AA12
VSS AC12
VSS AH12
VSS F13
VSS H13
VSS K13
VSS Y13
VSS AB13
VSS AD13
VSS AF17
VSS G14
VSS J14
VSS AA14
VSS AC14
VSS AE14
VSS D16
VSS E15
VSS
F15
VSS
H15
VSS K15
VSS AB15
VSS AD15
VSS AH14
VSS E16
VSS G16
VSS J16
VSS AA16
VSS AC16
VSS AE29
VSS E18
VSS F17
VSS H17
VSS K17
VSS Y17
VSS
AB17
VSS
AD17
VSS
B16
VSS
G18
VSS
AA18
VSS
AC18
VSS
D19
VSS
F19
VSS
H19
VSS
K19
VSS
Y19
VSS
AB19
VSS
AD19
VSS
AF19
VSS
J20
VSS
L20
VSS
N20
VSS AJ26
C724
1000P_0402_50V7K
@
1
2
C68
4.7U_0805_6.3V6K
1
2
C60
10U_0805_10V4Z
1
2
C65
4.7U_0805_6.3V6K
1
2
C58
10U_0805_10V4Z
1
2
C77
4.7U_0805_6.3V6K
1
2
+
C53
330U_D_2VM_R15
1
2
+
C55
330U_D_2VM_R15@
1
2
C69
4.7U_0805_6.3V6K
1
2
C57
10U_0805_10V4Z
1
2
C76
0.22U_0603_10V7K
1
2
C79
0.22U_0603_10V7K
1
2
C64
4.7U_0805_6.3V6K
1
2
+
C52
330U_D_2VM_R15@
1
2
C74
0.22U_0603_10V7K
1
2
+
C54
330U_D_2VM_R15
1
2
C70
4.7U_0805_6.3V6K
1
2
C73
0.22U_0603_10V7K
1
2
C59
10U_0805_10V4Z
1
2
POWER
JP1D
FOX_PZ75403-2941-42
VDDIO E4
VDDIO G4
VDDIO J4
VDDIO L4
VDDIO N4
VDDIO R4
VDDIO U4
VDDIO W4
VDDIO AA4
VDDIO AC4
VDDIO AE4
VDDIO D5
VDDIO AF5
VDDIO F6
VDDIO H6
VDDIO K6
VDDIO M6
VDDIO P6
VDDIO T6
VDDIO V6
VDDIO Y6
VDDIO AB6
VDDIO AD6
VDDIO D7
VDDIO G7
VDDIO J7
VDDIO AA7
VDDIO AC7
VDDIO AF7
VDDIO F8
VDDIO H8
VDDIO AB8
VDDIO AD8
VDDIO D9
VDDIO G9
VDDIO AC9
VDDIO AF9
VDDIO F10
VDDIO AD10
VDDIO D11
VDDIO AF11
VDDIO F12
VDDIO AD12
VDDIO D13
VDDIO AF13
VDDIO F14
VDDIO AD14
VDDIO F16
VDDIO AD16
VDDIO D15
VDD
L7
VDD
AC15
VDD
H18
VDD
B20
VDD
E21
VDD
H22
VDD
J23
VDD
H24
VDD
F26
VDD
N7
VDD
L9
VDD
V10
VDD
G13
VDD
K14
VDD
Y14
VDD
AB14
VDD
G15
VDD
J15
VDD
AA15
VDD
H16
VDD
K16
VDD
Y16
VDD
AB16
VDD
G17
VDD
J17
VDD
AA17
VDD
AC17
VDD
AE17
VDD
F18
VDD
K18
VDD
Y18
VDD
AB18
VDD
AD18
VDD
AG19
VDD
E19
VDD
G19
VDD
AC19
VDD
AA19
VDD
J19
VDD
F20
VDD
H20
VDD
K20
VDD
M20
VDD
P20
VDD
T20
VDD
V20
VDD
Y20
VDD
AB20
VDD
AD20
VDD
G21
VDD
J21
VDD
L21
VDD
N21
VDD
R21
VDD
U21
VDD
W21
VDD
AA21
VDD
AC21
VDD
F22
VDD
K22
VDD
M22
VDD
P22
VDD
T22
VDD
V22
VDD
Y22
VDD
AB22
VDD
AD22
VDD
E23
VDD
G23
VDD
L23
VDD
N23
VDD
R23
VDD
U23
VDD
W23
VDD
AA23
VDD
AC23
VDD
B24
VDD
D24
VDD
F24
VDD
K24
VDD
M24
VDD
P24
VDD
T24
VDD
V24
VDD
Y24
VDD
AB24
VDD
AD24
VDD
AH24
VDD
AE25
VDD
K26
VDD
P26
VDD
V26
VDD U28
VDD AA28
VDD AE27
VDD R7
VDD U7
VDD W7
VDD K8
VDD M8
VDD P8
VDD T8
VDD V8
VDD Y8
VDD J9
VDD N9
VDD R9
VDD U9
VDD W9
VDD AA9
VDD H10
VDD K10
VDD M10
VDD P10
VDD T10
VDD Y10
VDD AB10
VDD G11
VDD J11
VDD AA11
VDD AC11
VDD H12
VDD K12
VDD Y12
VDD AB12
VDD J13
VDD AA13
VDD AC13
VDD H14
VDD N28
VDD AB26
VDD E28
VDD J28
C67
4.7U_0805_6.3V6K
1
2
C61
10U_0805_10V4Z
1
2
C84
0.22U_0603_10V7K
1
2
C78
4.7U_0805_6.3V6K
1
2
C80
0.22U_0603_10V7K
1
2
C56
10U_0805_10V4Z
1
2
+
C51
820U_E9_2_5V_M_R7
1
2
+
C50
820U_E9_2_5V_M_R7
1
2
C721
1000P_0402_50V7K
@
1
2
C66
4.7U_0805_6.3V6K
1
2
C75
0.22U_0603_10V7K
1
2
C82
0.22U_0603_10V7K
1
2
C63
0.1U_0402_16V4Z
1
2
C81
0.22U_0603_10V7K
1
2
C722
1000P_0402_50V7K
@
1
2
C72
0.22U_0603_10V7K
1
2
C71
0.22U_0603_10V7K
1
2
C723
1000P_0402_50V7K
@
1
2
C83
0.22U_0603_10V7K
1
2
C62
1000P_0402_50V7K
1
2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
DDR_DM2
DDR_DQ60
DDR_DQ15
DDR_DM1
DDR_DQ14
DDR_DQ13
DDR_DQ9
DDR_DQ12
DDR_DQ10
DDR_DQS1
DDR_DQ11
DDR_DQ8
DDR_SMAA13
DDR_CKE0
DDR_SCS#1
DDR_SCS#0
DDR_DQ23
DDR_DQ20
DDR_DQ18
DDR_DQ17
DDR_DQS2
DDR_DQ19
DDR_DQ16
DDR_DQ21
DDR_DQ22
DDR_CKE0
DDR_DQ54
DDR_DQ51
DDR_DQ53
DDR_DQS6
DDR_DQ49
DDR_SCASA#
DDR_SWEA#
DDR_SMAA1
DDR_SMAA8
DDR_SMAA7
DDR_SMAA9
DDR_SMAA12
DDR_SMAA3
DDR_SMAA10
DDR_SMAA11
DDR_SMAA2
DDR_SMAA4
DDR_SRASA#
DDR_SMAA13
DDR_SMAA6
DDR_SBSA0DDR_DQ27
DDR_DQ26
DDR_DQ29
DDR_SMAA5
DDR_DQ30
DDR_DQS3
DDR_DQ24
DDR_DQ28 DDR_DQ25
DDR_DQ31
DDR_DM3
DDR_SBSA1
DDR_DQ55
DDR_DQ52
DDR_DQ50 DDR_DM6
DDR_DQ48
DDR_SMAA2
DDR_SMAA6
DDR_SBSA1
DDR_CKE0
DDR_SCS#0
DDR_SMAA8
DDR_SBSA0
DDR_SMAA7
DDR_SMAA3
DDR_SMAA11
DDR_SCASA#
DDR_SMAA9
DDR_SMAA10
DDR_SCS#1
DDR_SMAA12
DDR_SRASA#
DDR_SMAA5 DDR_SMAA4
DDR_SMAA1
DDR_SWEA#
DDR_SMAA0
DDR_DQ42
DDR_DQ46
DDR_DQ44
DDR_DQ40
DDR_DQS5
DDR_DQ41
DDR_DQ47
DDR_DQ45
DDR_DQ43
DDR_DM5
DDR_DQS0
DDR_DQ3
DDR_DQ5 DDR_DQ1
DDR_DM0
DDR_DQ2
DDR_DQ7
DDR_DQ0 DDR_DQ4
DDR_DQ6
DDR_DQS4
DDR_DQ37DDR_DQ32
DDR_DQ34
DDR_DQ38
DDR_DQS7
DDR_DQ62
DDR_DQ57
DDR_DQ58
DDR_DQ33DDR_DQ36
DDR_DQ35
DDR_DQ39
DDR_DM4
DDR_DM7
DDR_DQ56
DDR_DQ63DDR_DQ59
DDR_DQ61
DDR_SMAA0
DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DM[0..7]
DDR_SDQ[0..63]
DDR_SMAA[0..13]
DDR_SDQS[0..7]
DDR_SDM[0..7]
DDR_SDQ63
DDR_SDQ62
DDR_SDQ58
DDR_SDQ59 DDR_DQ63
DDR_DQ58
DDR_DQ59
DDR_DQ62
DDR_SDQ61
DDR_SDQ57
DDR_SDM7
DDR_SDQS7
DDR_DQ61
DDR_DQ57
DDR_DM7
DDR_DQS7
DDR_SDQ51
DDR_SDQ55
DDR_SDQ60
DDR_SDQ56 DDR_DQ51
DDR_DQ55
DDR_DQ60
DDR_DQ56
DDR_SDQS6
DDR_SDM6
DDR_SDQ54
DDR_SDQ50
DDR_DM6
DDR_DQ54
DDR_DQ50
DDR_DQS6
DDR_SDQ53
DDR_SDQ48
DDR_SDQ52
DDR_SDQ49 DDR_DQ52
DDR_DQ53
DDR_DQ48
DDR_DQ49
DDR_SDQ46
DDR_SDQ42
DDR_SDQ43
DDR_SDQ47 DDR_DQ43
DDR_DQ46
DDR_DQ47
DDR_DQ42
DDR_SDM5
DDR_SDQS5
DDR_SDQ44
DDR_SDQ45
DDR_DQS5
DDR_DM5
DDR_DQ45
DDR_DQ44
DDR_SDQ39
DDR_SDQ40
DDR_SDQ41
DDR_SDQ35 DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ35
DDR_SDQ38
DDR_SDM4
DDR_SDQS4
DDR_SDQ34 DDR_DQ38
DDR_DQS4
DDR_DM4
DDR_DQ34
DDR_SDQ33
DDR_SDQ36
DDR_SDQ32
DDR_SDQ37
DDR_DQ33
DDR_DQ36
DDR_DQ37
DDR_DQ32
DDR_SDQ26
DDR_SDQ30
DDR_SDQ31
DDR_SDQ27
DDR_DQ26
DDR_DQ31
DDR_DQ30
DDR_DQ27
DDR_SDQ29
DDR_SDQ24
DDR_SDM3
DDR_SDQS3 DDR_DQ24
DDR_DQS3
DDR_DQ29
DDR_DM3
DDR_SDQ28
DDR_SDQ22
DDR_SDQ23
DDR_SDQ25 DDR_DQ25
DDR_DQ28
DDR_DQ22
DDR_DQ23
DDR_SDQ18
DDR_SDQ19
DDR_SDM2
DDR_SDQS2
DDR_DQ19
DDR_DQ18
DDR_DQS2
DDR_DM2
DDR_SDQ17
DDR_SDQ20
DDR_SDQ21
DDR_SDQ16
DDR_DQ21
DDR_DQ17
DDR_DQ20
DDR_DQ16
DDR_SDQ14
DDR_SDQ10
DDR_SDQ11
DDR_SDQ15 DDR_DQ10
DDR_DQ11
DDR_DQ15
DDR_DQ14
DDR_SDM1
DDR_SDQ13
DDR_SDQ12
DDR_SDQS1 DDR_DQS1
DDR_DQ13
DDR_DM1
DDR_DQ12
DDR_SDQ8
DDR_SDQ9
DDR_SDQ6
DDR_SDQ7
DDR_DQ9
DDR_DQ8
DDR_DQ6
DDR_DQ7
DDR_SDQ2
DDR_SDM0
DDR_SDQS0
DDR_SDQ3 DDR_DQ2
DDR_DM0
DDR_DQS0
DDR_DQ3
DDR_SDQ0
DDR_SDQ4
DDR_SDQ5
DDR_SDQ1
DDR_DQ4
DDR_DQ1
DDR_DQ5
DDR_DQ0
SB_SDAT<9,16,20,28> SB_SCLK<9,16,20,28>
DDR_CKE0<5>
DDR_SBSA0<5>
DDR_SCS#0<5>
DDR_CLK5<5> DDR_CLK5#<5>
DDR_SBSA1 <5>
DDR_CLK7# <5>
DDR_SWEA#<5>
DDR_CLK7 <5>
DDR_SCASA# <5>
DDR_SRASA# <5>
DDR_SCS#1 <5>
DDR_DQS[0..7] <9>
DDR_DQ[0..63] <9>
DDR_DM[0..7] <9>DDR_SDM[0..7]<5>
DDR_SMAA[0..13]<5>
DDR_SDQS[0..7]<5>
DDR_SDQ[0..63]<5>
+2.5V
+1.25VREF_MEM
+2.5V
+3VS
+1.25V
+1.25VREF_MEM
+2.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
DDR-SODIMM0
Custom
853Tuesday, August 30, 2005
2005/03/01 2005/04/06
Note:
DDR_SMAA13 Recommend for AMD
40mil
SO-DIMM0
Layout note
Place these resistors
close to DIMM0,
all trace length<500 mil
RP3
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
R4568_0402_5%
1 2
RP8
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP16
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
JP4
AMP_1565918-1
VREF
1
VSS
3
DQ0
5
DQ1
7
VDD
9
DQS0
11
DQ2
13
VSS
15
DQ3
17
DQ8
19
VDD
21
DQ9
23
DQS1
25
VSS
27
DQ10
29
DQ11
31
VDD
33
CK0
35
CK0#
37
VSS
39
DQ16
41
DQ17
43
VDD
45
DQS2
47
DQ18
49
VSS
51
DQ19
53
DQ24
55
VDD
57
DQ25
59
DQS3
61
VSS
63
DQ26
65
DQ27
67
VDD
69
CB0
71
CB1
73
VSS
75
DQS8
77
CB2
79
VDD
81
CB3
83
DU
85
VSS
87
CK2
89
CK2#
91
VDD
93
CKE1
95
DU/A13
97
A12
99
A9
101
VSS
103
A7
105
A5
107
A3
109
A1
111
VDD
113
A10/AP
115
BA0
117
WE#
119
S0#
121
DU
123
VSS
125
DQ32
127
DQ33
129
VDD
131
DQS4
133
DQ34
135
VSS
137
DQ35
139
DQ40
141
VDD
143
VREF 2
VSS 4
DQ4 6
DQ5 8
VDD 10
DM0 12
DQ6 14
VSS 16
DQ7 18
DQ12 20
VDD 22
DQ13 24
DM1 26
VSS 28
DQ14 30
DQ15 32
VDD 34
VDD 36
VSS 38
VSS 40
DQ20 42
DQ21 44
VDD 46
DM2 48
DQ22 50
VSS 52
DQ23 54
DQ28 56
VDD 58
DQ29 60
DM3 62
VSS 64
DQ30 66
DQ31 68
VDD 70
CB4 72
CB5 74
VSS 76
DM8 78
CB6 80
VDD 82
CB7 84
DU/RESET# 86
VSS 88
VSS 90
VDD 92
VDD 94
CKE0 96
DU/BA2 98
A11 100
A8 102
VSS 104
A6 106
A4 108
A2 110
A0 112
VDD 114
BA1 116
RAS# 118
CAS# 120
S1# 122
DU 124
VSS 126
DQ36 128
DQ37 130
VDD 132
DM4 134
DQ38 136
VSS 138
DQ39 140
DQ44 142
VDD 144
DQ41
145
DQS5
147
VSS
149
DQ42
151
DQ43
153
VDD
155
VDD
157
VSS
159
VSS
161
DQ48
163
DQ49
165
VDD
167
DQS6
169
DQ50
171
VSS
173
DQ51
175
DQ56
177
VDD
179
DQ57
181
DQS7
183
VSS
185
DQ58
187
DQ59
189
VDD
191
SDA
193
SCL
195
VDD_SPD
197
VDD_ID
199
DQ45 146
DM5 148
VSS 150
DQ46 152
DQ47 154
VDD 156
CK1# 158
CK1 160
VSS 162
DQ52 164
DQ53 166
VDD 168
DM6 170
DQ54 172
VSS 174
DQ55 176
DQ60 178
VDD 180
DQ61 182
DM7 184
VSS 186
DQ62 188
DQ63 190
VDD 192
SA0 194
SA1 196
SA2 198
DU 200
RP10
47_0804_8P4R_5%
18 27 36 45
R4768_0402_5%
1 2
R4668_0402_5%
1 2
R49
1K_0402_1%
12
R48
1K_0402_1%
12
RP23
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP18
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP5
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP24
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP20
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP21
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP11
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP22
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP12
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP13
47_0804_8P4R_5%
18 27 36 45
R4347_0402_5%
1 2
RP4
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
C86
0.1U_0402_16V4Z
1
2
RP17
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
R4447_0402_5%
1 2
RP7
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP6
47_0804_8P4R_5%
18 27 36 45
R4247_0402_5%
1 2
C85
0.1U_0402_16V4Z
1
2
C87
1000P_0402_50V7K
1
2
RP2
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP15
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP14
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP9
47_0804_8P4R_5%
18 27 36 45
RP19
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP25
10_0804_8P4R_5%
1 8
2 7
3 6
4 5
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_DQ15
DDR_DQ14
DDR_DQ9
DDR_DQ12
DDR_DQS1
DDR_DQS0
DDR_DQ3
DDR_DQ5
DDR_DQ7
DDR_DQ0
DDR_DM1
DDR_CKE1 DDR_CKE1
DDR_SCS#2 DDR_SCS#3
DDR_SMAB12
DDR_SMAB9
DDR_SMAB7
DDR_SMAB5
DDR_SMAB3
DDR_SMAB1
DDR_SMAB10
DDR_SMAB11
DDR_SMAB8
DDR_SMAB6
DDR_SMAB4
DDR_SMAB2
DDR_SMAB0
DDR_SBSB0 DDR_SBSB1
DDR_SRASB#
DDR_SCASB#DDR_SWEB#
DDR_DQ13
DDR_DQ10
DDR_DQ11
DDR_DQ8
DDR_DQ1
DDR_DM0
DDR_DQ2
DDR_DQ4
DDR_DQ6
DDR_DQ20
DDR_DQ18
DDR_DQ17
DDR_DQS2
DDR_DQ19
DDR_DQ27
DDR_DQ26
DDR_DQS3
DDR_DQ24
DDR_DQ28
DDR_DM2
DDR_DQ23
DDR_DQ16
DDR_DQ21
DDR_DQ22
DDR_DQ29
DDR_DQ30
DDR_DQ25
DDR_DQ31
DDR_DM3
DDR_DQ60
DDR_SMAB13
DDR_DQ54
DDR_DQ51
DDR_DQ53
DDR_DQ52
DDR_DM6
DDR_DQ42
DDR_DQ41
DDR_DQ45
DDR_DQ43
DDR_DM5
DDR_DQ37
DDR_DQ62
DDR_DQ57
DDR_DQ33
DDR_DQ35
DDR_DQ39
DDR_DM4
DDR_DM7
DDR_DQ63
DDR_DQS6
DDR_DQ49
DDR_DQ55
DDR_DQ50
DDR_DQ48
DDR_DQ46
DDR_DQ44
DDR_DQ40
DDR_DQS5
DDR_DQ47
DDR_DQS4
DDR_DQ32
DDR_DQ34
DDR_DQ38
DDR_DQS7
DDR_DQ58
DDR_DQ36
DDR_DQ56
DDR_DQ59
DDR_DQ61
DDR_CKE1
DDR_SCS#2
DDR_SCS#3
DDR_SCASB#
DDR_SWEB#
DDR_SMAB13
DDR_DQS[0..7]
DDR_DQ[0..63]
DDR_SMAB[0..13]
DDR_DM[0..7]
DDR_DQ0
DDR_DQ5
DDR_DQS0
DDR_DQ3
DDR_DQ7
DDR_DQ9
DDR_DQ12
DDR_DQS1
DDR_DQ14
DDR_DQ15
DDR_DQ20
DDR_DQ17
DDR_DQS2
DDR_DQ18
DDR_DQ19
DDR_DQ28
DDR_DQ24
DDR_DQS3
DDR_DQ26
DDR_DQ27
DDR_DQ32
DDR_DQ36
DDR_DQS4
DDR_DQ34
DDR_DQ40
DDR_DQ44
DDR_DQS5
DDR_DQ49
DDR_DQ47
DDR_DQ46
DDR_DQ48
DDR_DQ61
DDR_DQS7
DDR_DQ58
DDR_DQ59
DDR_DQS6
DDR_DQ50
DDR_DQ55
DDR_DQ56
DDR_DQ38
DDR_DQ13
DDR_DM1
DDR_DQ10
DDR_DQ4
DDR_DQ11
DDR_DQ1
DDR_DM0
DDR_DQ6
DDR_DQ2
DDR_DQ8
DDR_DQ29
DDR_DM3
DDR_DQ30
DDR_DQ31
DDR_DQ37
DDR_DQ33
DDR_DM4
DDR_DQ39
DDR_DQ35
DDR_DQ41
DDR_DQ16
DDR_DQ21
DDR_DM2
DDR_DQ22
DDR_DQ42
DDR_DQ43
DDR_DQ53
DDR_DQ52
DDR_DQ23
DDR_DQ25
DDR_DM6
DDR_DQ54
DDR_DQ51
DDR_DQ60
DDR_DQ57
DDR_DM7
DDR_DQ62
DDR_DQ63
DDR_DQ45
DDR_DM5
DDR_SMAB1
DDR_SMAB8
DDR_SMAB7
DDR_SMAB9
DDR_SMAB12
DDR_SMAB3
DDR_SMAB10
DDR_SMAB11
DDR_SMAB2
DDR_SMAB4
DDR_SRASB#
DDR_SMAB6
DDR_SBSB0
DDR_SMAB5
DDR_SBSB1
DDR_SMAB0
SB_SDAT<8,16,20,28> SB_SCLK<8,16,20,28>
DDR_CLK4<5> DDR_CLK4#<5>
DDR_CKE1<5>
DDR_SCS#2<5> DDR_SCASB# <5>
DDR_SRASB# <5>
DDR_SBSB1 <5>
DDR_SBSB0<5> DDR_SWEB#<5> DDR_SCS#3 <5>
DDR_CLK6# <5>
DDR_CLK6 <5>
DDR_SMAB[0..13]<5>
DDR_DQS[0..7]<8>
DDR_DM[0..7]<8>
DDR_DQ[0..63]<8>
+1.25V
+2.5V +2.5V +1.25VREF_MEM
+3VS
+3VS
+1.25V
+1.25V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
DDR-SODIMM1
Custom
953Tuesday, August 30, 2005
2005/03/01 2005/04/06
DIMM1
20 mil width
Place these resistor
close by DIMM1,
all trace length
Max=0.8"
Layout note
Place these resistor
closely DIMM1,
all trace
length<=800mil
Layout note
Note:
DDR_SMAA13 Recommend for AMD
RP42
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP29
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP33
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
R5247_0402_5%
1 2
C88
0.1U_0402_16V4Z
1
2
RP27
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP44
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP31
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
R5468_0402_5%
1 2
RP35
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP41
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP32
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
R5047_0402_5%
1 2
RP38
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP40
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP26
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
JP5
TYCO_1470804-2
VREF
1
VSS
3
DQ0
5
DQ1
7
VDD
9
DQS0
11
DQ2
13
VSS
15
DQ3
17
DQ8
19
VDD
21
DQ9
23
DQS1
25
VSS
27
DQ10
29
DQ11
31
VDD
33
CK0
35
CK0#
37
VSS
39
DQ16
41
DQ17
43
VDD
45
DQS2
47
DQ18
49
VSS
51
DQ19
53
DQ24
55
VDD
57
DQ25
59
DQS3
61
VSS
63
DQ26
65
DQ27
67
VDD
69
CB0
71
CB1
73
VSS
75
DQS8
77
CB2
79
VDD
81
CB3
83
DU
85
VSS
87
CK2
89
CK2#
91
VDD
93
CKE1
95
DU/A13
97
A12
99
A9
101
VSS
103
A7
105
A5
107
A3
109
A1
111
VDD
113
A10/AP
115
BA0
117
WE#
119
S0#
121
DU
123
VSS
125
DQ32
127
DQ33
129
VDD
131
DQS4
133
DQ34
135
VSS
137
DQ35
139
DQ40
141
VDD
143
VREF 2
VSS 4
DQ4 6
DQ5 8
VDD 10
DM0 12
DQ6 14
VSS 16
DQ7 18
DQ12 20
VDD 22
DQ13 24
DM1 26
VSS 28
DQ14 30
DQ15 32
VDD 34
VDD 36
VSS 38
VSS 40
DQ20 42
DQ21 44
VDD 46
DM2 48
DQ22 50
VSS 52
DQ23 54
DQ28 56
VDD 58
DQ29 60
DM3 62
VSS 64
DQ30 66
DQ31 68
VDD 70
CB4 72
CB5 74
VSS 76
DM8 78
CB6 80
VDD 82
CB7 84
DU/RESET# 86
VSS 88
VSS 90
VDD 92
VDD 94
CKE0 96
DU/BA2 98
A11 100
A8 102
VSS 104
A6 106
A4 108
A2 110
A0 112
VDD 114
BA1 116
RAS# 118
CAS# 120
S1# 122
DU 124
VSS 126
DQ36 128
DQ37 130
VDD 132
DM4 134
DQ38 136
VSS 138
DQ39 140
DQ44 142
VDD 144
DQ41
145
DQS5
147
VSS
149
DQ42
151
DQ43
153
VDD
155
VDD
157
VSS
159
VSS
161
DQ48
163
DQ49
165
VDD
167
DQS6
169
DQ50
171
VSS
173
DQ51
175
DQ56
177
VDD
179
DQ57
181
DQS7
183
VSS
185
DQ58
187
DQ59
189
VDD
191
SDA
193
SCL
195
VDD_SPD
197
VDD_ID
199
DQ45 146
DM5 148
VSS 150
DQ46 152
DQ47 154
VDD 156
CK1# 158
CK1 160
VSS 162
DQ52 164
DQ53 166
VDD 168
DM6 170
DQ54 172
VSS 174
DQ55 176
DQ60 178
VDD 180
DQ61 182
DM7 184
VSS 186
DQ62 188
DQ63 190
VDD 192
SA0 194
SA1 196
SA2 198
DU 200
RP43
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
R5568_0402_5%
1 2
RP28
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP34
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP48
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
R5368_0402_5%
1 2
RP46
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP37
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP36
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP30
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP47
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP45
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP39
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP49
68_0804_8P4R_5%
1 8
2 7
3 6
4 5
R5147_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+1.25V
+1.25V
+1.25V
+1.25V
+1.25V
+1.25V
+2.5V
+2.5V
+2.5V
+1.25V
+2.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
DDR Decoupling
Custom
10 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V
Near DIMMs
C132
0.1U_0402_16V4Z
1
2
C160
0.1U_0402_16V4Z
1
2
C140
0.1U_0402_16V4Z
1
2
C130
0.1U_0402_16V4Z
1
2
C133
0.1U_0402_16V4Z
1
2
C99
0.1U_0402_16V4Z
1
2
C159
0.1U_0402_16V4Z
1
2
C158
0.1U_0402_16V4Z
1
2
C91
4.7U_0805_6.3V6K
1
2
C116
0.1U_0402_16V4Z
1
2
C144
0.1U_0402_16V4Z
1
2
C96
0.1U_0402_16V4Z
1
2
C103
0.1U_0402_16V4Z
1
2
C156
0.1U_0402_16V4Z
1
2
C137
0.1U_0402_16V4Z
1
2
C131
0.1U_0402_16V4Z
1
2
C104
0.1U_0402_16V4Z
1
2
C139
0.1U_0402_16V4Z
1
2
C154
0.1U_0402_16V4Z
1
2
C150
0.1U_0402_16V4Z
1
2
C125
0.1U_0402_16V4Z
1
2
C151
0.1U_0402_16V4Z
1
2
C136
0.1U_0402_16V4Z
1
2
C162
0.1U_0402_16V4Z
1
2
C143
0.1U_0402_16V4Z
1
2
C107
0.1U_0402_16V4Z
1
2
C106
0.1U_0402_16V4Z
1
2
C129
0.1U_0402_16V4Z
1
2
C105
0.1U_0402_16V4Z
1
2
C124
0.1U_0402_16V4Z
1
2
C149
0.1U_0402_16V4Z
1
2
C95
0.1U_0402_16V4Z
1
2
C141
0.1U_0402_16V4Z
1
2
C102
0.1U_0402_16V4Z
1
2
C109
0.1U_0402_16V4Z
1
2
C153
0.1U_0402_16V4Z
1
2
C101
0.1U_0402_16V4Z
1
2
C94
10U_0805_10V4Z
1
2
C115
0.1U_0402_16V4Z
1
2
C126
0.1U_0402_16V4Z
1
2
C119
0.1U_0402_16V4Z
1
2
C157
0.1U_0402_16V4Z
1
2
C142
0.1U_0402_16V4Z
1
2
+
C89
330U_6.3V_M
1
2
C152
0.1U_0402_16V4Z
1
2
C135
0.1U_0402_16V4Z
1
2
C128
0.1U_0402_16V4Z
1
2
C93
10U_0805_10V4Z
1
2
C110
0.1U_0402_16V4Z
1
2
C148
0.1U_0402_16V4Z
1
2
C146
0.1U_0402_16V4Z
1
2
C147
0.1U_0402_16V4Z
1
2
C98
0.1U_0402_16V4Z
1
2
+
C90
330U_6.3V_M
1
2
C161
0.1U_0402_16V4Z
1
2
C114
0.1U_0402_16V4Z
1
2
C113
0.1U_0402_16V4Z
1
2
C127
0.1U_0402_16V4Z
1
2
C108
0.1U_0402_16V4Z
1
2
C155
0.1U_0402_16V4Z
1
2
C123
0.1U_0402_16V4Z
1
2
C100
0.1U_0402_16V4Z
1
2
C118
0.1U_0402_16V4Z
1
2
C97
0.1U_0402_16V4Z
1
2
C117
0.1U_0402_16V4Z
1
2
C120
0.1U_0402_16V4Z
1
2
C134
0.1U_0402_16V4Z
1
2
C122
0.1U_0402_16V4Z
1
2
C121
0.1U_0402_16V4Z
1
2
C111
0.1U_0402_16V4Z
1
2
C92
4.7U_0805_6.3V6K
1
2
C145
0.1U_0402_16V4Z
1
2
C112
0.1U_0402_16V4Z
1
2
C138
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CLKIP0
H_CLKIN0
H_CTLIN0
H_CTLIP0
H_CADIN[0..15]
H_CADIP[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADOP15
H_CADOP14
H_CADOP12
H_CADOP11
H_CADON15
H_CADON14
H_CADON12
H_CADON11
H_CADON13
H_CADOP13
H_CADON10
H_CADOP10
H_CADON9
H_CADOP9
H_CADOP8
H_CADON8
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADON3
H_CADOP3
H_CADOP2
H_CADON2
H_CADON0
H_CADOP0
H_CADON1
H_CADOP1
H_CADIN15
H_CADIP15
H_CADIN14
H_CADIP14
H_CADIN13
H_CADIP13
H_CADIN12
H_CADIP12
H_CADIP11
H_CADIN11
H_CADIN10
H_CADIP10
H_CADIN9
H_CADIP9
H_CADIN8
H_CADIP8
H_CADIN7
H_CADIP7
H_CADIN6
H_CADIP6
H_CADIN5
H_CADIP5
H_CADIN4
H_CADIP4
H_CADIN3
H_CADIP3
H_CADIN2
H_CADIP2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0
H_CLKOP0
H_CLKON0
H_CLKON1
H_CLKOP1
H_CTLOP0
H_CTLON0
H_CLKIN1
H_CLKIP1
MEM_VREF
MPVDD
NMDA56
NMDA2
NMDA1
NMDA0
NMDA10
NMDA4
NMDA3
NMDA9
NMDA12
NMDA13
NMDA15
NMDA11
NMDA30
NMDA28
NMDA31
NMDA26
NMDA24
NMDA16
NMDA18
NMDA19
NMDA20
NMDA7
NMDA17
NMDA21
NMDA22
NMDA29
NMDA14
NMDA25
NMDA6
NMDA27
NMDA23
NMDA8
NMDA5
NMDA34
NMDA38
NMDA39
NMDA37
NMDA32
NMDA33
NMDA41
NMDA42
NMDA35
NMDA47
NMDA36
NMDA40
NMDA43
NMDA44
NMDA45
NMDA46
NMDA58
NMDA61
NMDA57
NMDA62
NMDA63
NMDA49
NMDA50
NMDA59
NMDA48
NMDA60
NMDA52
NMDA53
NMDA51
NMDA54
NMDA55
NMAA1
NMAA3
NMAA2
NMAA0
NMAA5
NMAA6
NMAA7
NMAA4
NMAA8
NMAA13
NMAA11
NMAA9
NMAA10
NMAA12
NDQSA3
NDQMA3
NDQMA1
NDQMA2
NDQMA0
NDQSA2
NDQSA0
NMAA14
NDQMA4
NDQMA5
NDQMA6
NDQMA7
NMCASA#
NMWEA#
NMCSA0#
NMCKEA
NMRASA#
NMCLKA0
NMCLKA0#
NDQSA1
NDQSA4
NDQSA5
NDQSA6
NDQSA7
NMDA[0..63]
NDQSA[0..7]
NMAA[0..14]
NDQMA[0..7]
H_CADIP[0..15]<4>
H_CADON[0..15]<4>
H_CADIN[0..15]<4>
H_CADOP[0..15]<4>
H_CLKIN0 <4>
H_CLKIP0 <4>
H_CTLIN0 <4>
H_CTLIP0 <4>
H_CLKON0<4> H_CLKOP0<4>
H_CLKOP1<4> H_CLKON1<4>
H_CTLOP0<4> H_CTLON0<4>
H_CLKIN1 <4>
H_CLKIP1 <4>
NMCSA0#<15> NMWEA#<15>
NMCKEA<15>
NMRASA#<15> NMCASA#<15>
NMCLKA0<15> NMCLKA0#<15>
NDQSA[0..7]<15>
NDQMA[0..7]<15>
NMAA[0..14]<15>
NMDA[0..63]<15>
+1.2V_HT
+1.8VS
+2.5VS
+2.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
RS480M-HT/VMEM
Custom
11 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
MEM_VREF , MPVDD (20mils)
C164 0.47U_0603_16V7K
1 2
R56 49.9_0402_1%
1 2
C167
1U_0603_10V4Z
1 2
MEM_A I/F
U4B
216RS480M_BGA706
MEM_A0
AF17
MEM_A1
AK17
MEM_A2
AH16
MEM_A3
AF16
MEM_A4
AJ22
MEM_A5
AJ21
MEM_A6
AH20
MEM_A7
AH21
MEM_A8
AK19
MEM_A9
AH19
MEM_A10
AJ17
MEM_A11
AG16
MEM_A12
AG17
MEM_A13
AH17
MEM_A14
AJ18
MEM_DM0
AG26
MEM_DM1
AJ29
MEM_DM2
AE21
MEM_DM3
AH24
MEM_DM4
AH12
MEM_DM5
AG13
MEM_DM6
AH8
MEM_DM7
AE8
MEM_DQS1P
AH30
MEM_DQS2P
AG20
MEM_DQS3P
AJ25
MEM_DQS4P
AH13
MEM_DQS5P
AF14
MEM_DQS6P
AJ7
MEM_DQS7P
AG8
MEM_DQS0N
AG25
MEM_DQS1N
AH29
MEM_DQS2N
AF21
MEM_DQS3N
AK25
MEM_DQS4N
AJ12
MEM_DQS5N
AF13
MEM_DQS6N
AK7
MEM_DQS7N
AF9
MEM_RAS#
AE17
MEM_CAS#
AH18
MEM_WE#
AE18
MEM_CS#
AJ19
MEM_CKE
AF18
MEM_CKP
AK16
MEM_CKN
AJ16
MEM_CAP1
AE28
MEM_CAP2
AJ4
MEM_VMODE
AJ20
MEM_VREF
AK20
MPVDD
AJ15
MPVSS
AJ14
MEM_DQ0 AF28
MEM_DQ1 AF27
MEM_DQ2 AG28
MEM_DQ3 AF26
MEM_DQ4 AE25
MEM_DQ5 AE24
MEM_DQ6 AF24
MEM_DQ7 AG23
MEM_DQ8 AE29
MEM_DQ9 AF29
MEM_DQ10 AG30
MEM_DQ11 AG29
MEM_DQ12 AH28
MEM_DQ13 AJ28
MEM_DQ14 AH27
MEM_DQ15 AJ27
MEM_DQ16 AE23
MEM_DQ17 AG22
MEM_DQ18 AF23
MEM_DQ19 AF22
MEM_DQ20 AE20
MEM_DQ21 AG19
MEM_DQ22 AF20
MEM_DQ23 AF19
MEM_DQ24 AH26
MEM_DQ25 AJ26
MEM_DQ26 AK26
MEM_DQ27 AH25
MEM_DQ28 AJ24
MEM_DQ29 AH23
MEM_DQ30 AJ23
MEM_DQ31 AH22
MEM_DQ32 AK14
MEM_DQ33 AH14
MEM_DQ34 AK13
MEM_DQ35 AJ13
MEM_DQ36 AJ11
MEM_DQ37 AH11
MEM_DQ38 AJ10
MEM_DQ39 AH10
MEM_DQ40 AE15
MEM_DQ41 AF15
MEM_DQ42 AG14
MEM_DQ43 AE14
MEM_DQ44 AE12
MEM_DQ45 AF12
MEM_DQ46 AG11
MEM_DQ47 AE11
MEM_DQ48 AJ9
MEM_DQ49 AH9
MEM_DQ50 AJ8
MEM_DQ51 AK8
MEM_DQ52 AH7
MEM_DQ53 AJ6
MEM_DQ54 AH6
MEM_DQ55 AJ5
MEM_DQ56 AG10
MEM_DQ57 AF11
MEM_DQ58 AF10
MEM_DQ59 AE9
MEM_DQ60 AG7
MEM_DQ61 AF8
MEM_DQ62 AF7
MEM_DQ63 AE7
MEM_COMPP AH5
MEM_COMPN AD30
MEM_DQS0P
AF25
C166
0.1U_0402_16V4Z
1
2
R60 1K_0402_5%
1 2
C165
0.1U_0402_16V4Z
1
2
R59
1K_0402_1%
12
R63
1K_0402_1%
12
C163 0.47U_0603_16V7K
1 2
HYPER TRANSPORT CPU
I/F
U4A
216RS480M_BGA706
HT_RXCAD15P
T26
HT_RXCAD15N
R26
HT_RXCAD14P
U25
HT_RXCAD14N
U24
HT_RXCAD13P
V26
HT_RXCAD13N
U26
HT_RXCAD12P
W25
HT_RXCAD12N
W24
HT_RXCAD11P
AA25
HT_RXCAD11N
AA24
HT_RXCAD10P
AB26
HT_RXCAD10N
AA26
HT_RXCAD9P
AC25
HT_RXCAD9N
AC24
HT_RXCAD8P
AD26
HT_RXCAD8N
AC26
HT_RXCAD7P
R29
HT_RXCAD7N
R28
HT_RXCAD6P
T30
HT_RXCAD6N
R30
HT_RXCAD5P
T28
HT_RXCAD5N
T29
HT_RXCAD4P
V29
HT_RXCAD4N
U29
HT_RXCAD3P
Y30
HT_RXCAD3N
W30
HT_RXCAD2P
Y28
HT_RXCAD2N
Y29
HT_RXCAD1P
AB29
HT_RXCAD1N
AA29
HT_RXCAD0P
AC29
HT_RXCAD0N
AC28
HT_RXCLK1P
Y26
HT_RXCLK1N
W26
HT_RXCLK0P
W29
HT_RXCLK0N
W28
HT_RXCTLP
P29
HT_RXCTLN
N29
HT_RXCALN
D27
HT_RXCALP
E27
HT_TXCAD15P R24
HT_TXCAD15N R25
HT_TXCAD14P N26
HT_TXCAD14N P26
HT_TXCAD13P N24
HT_TXCAD13N N25
HT_TXCAD12P L26
HT_TXCAD12N M26
HT_TXCAD11P J26
HT_TXCAD11N K26
HT_TXCAD10P J24
HT_TXCAD10N J25
HT_TXCAD9P G26
HT_TXCAD9N H26
HT_TXCAD8P G24
HT_TXCAD8N G25
HT_TXCAD7P L30
HT_TXCAD7N M30
HT_TXCAD6P L28
HT_TXCAD6N L29
HT_TXCAD5P J29
HT_TXCAD5N K29
HT_TXCAD4P H30
HT_TXCAD4N H29
HT_TXCAD3P E29
HT_TXCAD3N E28
HT_TXCAD2P D30
HT_TXCAD2N E30
HT_TXCAD1P D28
HT_TXCAD1N D29
HT_TXCAD0P B29
HT_TXCAD0N C29
HT_TXCLK1P L24
HT_TXCLK1N L25
HT_TXCLK0P F29
HT_TXCLK0N G29
HT_TXCTLP M29
HT_TXCTLN M28
HT_TXCALP B28
HT_TXCALN A28
R58 49.9_0402_1%
1 2
R64 61.9_0402_1%
1 2
R62 61.9_0402_1%
1 2
R61
0_0805_5%
1 2
R57 100_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1NSB_TX1N_C
SB_RX0N
SB_RX0P
SB_TX1P_C
SB_TX0P_C
SB_TX0N_C
SB_RX1N
SB_RX1P
PCIE_RX1P
PCIE_RX1N
PCIE_RX0P
PCIE_RX0N
PCIE_TX1P
PCIE_TX1NPCIE_TX1N_C
PCIE_TX1P_C
PCIE_TX0P
PCIE_TX0NPCIE_TX0N_C
PCIE_TX0P_C
SB_TX0P <19>
SB_TX0N <19>
SB_TX1P <19>
SB_TX1N <19>
SB_RX0P<19> SB_RX0N<19>
SB_RX1P<19> SB_RX1N<19>
PCIE_RX0P<28> PCIE_RX0N<28>
PCIE_RX1P<28> PCIE_RX1N<28>
PCIE_TX0P <28>
PCIE_TX0N <28>
PCIE_TX1P <28>
PCIE_TX1N <28>
+1.2V_HT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
RS480M PCIE/DVI Controller
Custom
12 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
R68 82.5_0402_1%
1 2
R66 8.25K_0402_1% 1 2
C171 0.1U_0402_16V4Z
1 2
PCIE I/F TO VIDEO
PCIE I/F TO SB
PCIE I/F TO SLOT
U4C
216RS480M_BGA706
GFX_RX0P
D8
GFX_RX0N
D7
GFX_RX1P
D5
GFX_RX1N
D4
GFX_RX2P
E4
GFX_RX2N
F4
GFX_RX3P
G5
GFX_RX3N
G4
GFX_RX4P
H4
GFX_RX4N
J4
GFX_RX5P
H5
GFX_RX5N
H6
GFX_RX6P
G1
GFX_RX6N
G2
GFX_RX7P
K5
GFX_RX7N
K4
GFX_RX8P
L4
GFX_RX8N
M4
GFX_RX9P
N5
GFX_RX9N
N4
GFX_RX10P
P4
GFX_RX10N
R4
GFX_RX11P
P5
GFX_RX11N
P6
GFX_RX12P
P2
GFX_RX12N
R2
GFX_RX13P
T5
GFX_RX13N
T4
GFX_RX14P
U4
GFX_RX14N
V4
GFX_RX15P
W1
GFX_RX15N
W2
GPP_RX0P
AE1
GPP_RX0N
AE2
GPP_RX1P
AB2
GPP_RX1N
AC2
GPP_RX2P
AB5
GPP_RX2N
AB4
GPP_RX3P
Y4
GPP_RX3N
AA4
SB_RX0P
AG1
SB_RX0N
AH1
SB_RX1P
AC5
SB_RX1N
AC6
PCE_ISET
AH3
PCE_TXISET
AJ3
GFX_TX0P A7
GFX_TX0N B7
GFX_TX1P B6
GFX_TX1N B5
GFX_TX2P A5
GFX_TX2N A4
GFX_TX3P B3
GFX_TX3N B2
GFX_TX4P C1
GFX_TX4N D1
GFX_TX5P D2
GFX_TX5N E2
GFX_TX6P F2
GFX_TX6N F1
GFX_TX7P H2
GFX_TX7N J2
GFX_TX8P J1
GFX_TX8N K1
GFX_TX9P K2
GFX_TX9N L2
GFX_TX10P M2
GFX_TX10N M1
GFX_TX11P N1
GFX_TX11N N2
GFX_TX12P R1
GFX_TX12N T1
GFX_TX13P T2
GFX_TX13N U2
GFX_TX14P V2
GFX_TX14N V1
GFX_TX15P Y2
GFX_TX15N AA2
GPP_TX0P AD2
GPP_TX0N AD1
GPP_TX1P AA1
GPP_TX1N AB1
GPP_TX2P Y5
GPP_TX2N Y6
GPP_TX3P W5
GPP_TX3N W4
SB_TX0P AF2
SB_TX0N AG2
SB_TX1P AC4
SB_TX1N AD4
PCE_PCAL AH2
PCE_NCAL AJ2
C172 0.1U_0402_16V4Z
1 2
C168 0.1U_0402_16V4Z
17_EXP@
1 2
C169 0.1U_0402_16V4Z
17_EXP@
1 2
C173 0.1U_0402_16V4Z
1 2
C170 0.1U_0402_16V4Z
1 2
R65 10K_0402_1% 1 2
C691 0.1U_0402_16V4Z
15_EXP@
1 2
R67 150_0402_1%
1 2
C692 0.1U_0402_16V4Z
15_EXP@
1 2
LVDSA1-
LVDSA0+
LVDSA1+
LVDSA0-
LVDSA2-
LVDSA2+
LVDSB0+
LVDSB0-
LVDSB1+
LVDSB1-
LVDSB2+
LVDSB2-
LVDSBC+
LVDSBC-
LVDSAC-
LVDSAC+
CRT_R
CRT_G
CRT_B
TV_CRMA
TV_LUMA
TV_COMPS
CRT_VSYNC
CRT_HSYNC
3VDDCCL
3VDDCDA
AVDD
AVDDI
AVDDQ
+NB_PLLVDD
+NB_HTPVDD
NB_RST#
NB_PWRGD
LDTSTOP#
ALLOW_LDTSTOP
NB_REFCLK
BMREQ#
HTREFCLK
LPVDD
LVDDR18D
SBLINKCLK
SBLINKCLK#
EDID_CLK_LCD
EDID_CLK_LCD
EDID_DAT_LCD
EDID_DAT_LCD
LVDDR18A
ENABLT
+NB_VDDR3
SUS_STAT# ENVDD
LVDSA0+ <17>
LVDSA0- <17>
LVDSA1+ <17>
LVDSA1- <17>
LVDSA2+ <17>
LVDSA2- <17>
LVDSB0+ <17>
LVDSB0- <17>
LVDSB1+ <17>
LVDSB1- <17>
LVDSB2+ <17>
LVDSB2- <17>
LVDSBC+ <17>
LVDSBC- <17>
LVDSAC+ <17>
LVDSAC- <17>
CRT_B<18>
CRT_R<18> CRT_G<18>
TV_LUMA<18,40> TV_CRMA<18,40>
TV_COMPS<18,40>
CRT_HSYNC<18> CRT_VSYNC<18>
3VDDCDA<18> 3VDDCCL<18>
NB_RST#<19,24,28,35>
NB_PWRGD<42> LDTSTOP#<4,19>
ALLOW_LDTSTOP<19>
NB_REFCLK<16>
BMREQ#<19>
HTREFCLK <16>
SBLINKCLK <16>
SBLINKCLK# <16>
ENVDD <17>
ENABLT <17,37,38>
EDID_CLK_LCD<17>
EDID_DAT_LCD <17>
SUS_STAT#<20>
+3VS
+1.8VS
+1.8VS
+1.8VS
+3VS
+1.8VS
+1.8VS
+1.8VS
+3VS
+1.8VS
+2.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
RS480M VIDEO_IF/CLOCK GEN
Custom
13 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
NB STRAPS(Internal pull up)
Low, SIDE PORT MEMORY ENABLE
High, SIDE PORT MEMORY DISABLE
DEF_GPIO0:SIDE PORT EN#
High, LOAD ROM STRAP DISABLE
DEF_GPIO1:LOAD ROM STRAPS #
Low, LOAD ROM STRAP ENABLE
AVDD , AVDDI , AVDDQ , +NB_PLLVDD , +NB_HTPVDD
+NB_VDDR3 , LPVDD , LVDDR18D , LVDDR18A (20mils)
C181
1U_0603_10V4Z
1
2
L9
FBML10160808121LMT_0603
1 2
R75 10K_0402_5%
12
C174
0.1U_0402_16V4Z
1
2
L3
FBML10160808121LMT_0603
1 2
C187
1U_0603_10V4Z
1
2
PM
CLOCKs
LVDS
CRT/TVOUT
PLL PWR
MIS.
U4D
216RS480M_BGA706
AVDD1
B27
AVDD2
C27
AVSSN1
D26
AVSSN2
D25
AVDDDI
C24
AVSSDI
B24
AVDDQ
E24
AVSSQ
D24
C
B25
Y
A25
COMP
A24
RED
C25
GREEN
A26
BLUE
B26
DAC_VSYNC
A11
DAC_HSYNC
B11
RSET
C26
DAC_SCL
E11
DAC_SDA
F11
PLLVDD
A14
PLLVSS
B14
HTPVDD
M23
HTPVSS
L23
SYSRESET#
D14
POWERGOOD
B15
LDTSTOP#
B12
ALLOW_LDTSTOP
C12
SUS_STAT#
AH4
VDDR3_1
H13
VDDR3_2
H12
OSCIN
A13
OSCOUT
B13
TVCLKIN
B9
DFT_GPIO0/RSV
F12
DFT_GPIO1/RSV
E13
DFT_GPIO2/RSV
D13
BMREQb
F10
I2C_CLK
C10
I2C_DATA
C11
THERMALDIODE_P
AF4
THERMALDIODE_N
AE4
TXOUT_U0P D18
TXOUT_U0N C18
TXOUT_U1P B19
TXOUT_U1N A19
TXOUT_U2P D19
TXOUT_U2N C19
TXOUT_U3P D20
TXOUT_U3N C20
TXOUT_L0P B16
TXOUT_L0N A16
TXOUT_L1P D16
TXOUT_L1N C16
TXOUT_L2P B17
TXOUT_L2N A17
TXOUT_L3P E17
TXOUT_L3N D17
TXCLK_UP B20
TXCLK_UN A20
TXCLK_LP B18
TXCLK_LN C17
LPVDD E18
LPVSS F17
LVDDR18D E19
LVDDR18A_1 G20
LVDDR18A_2 H20
LVSSR1 G19
LVSSR2 E20
LVSSR3 F20
LVSSR4 H18
LVSSR5 G18
LVSSR6 F19
LVSSR7 H19
LVSSR8 F18
LVDS_DIGON E14
LVDS_BLON F14
LVDS_BLEN F13
GFX_CLKP B8
GFX_CLKN A8
HTTSTCLK P23
HTREFCLK N23
SB_CLKP E8
SB_CLKN E7
DFT_GPIO3/RSV C13
DFT_GPIO4/RSV C14
DFT_GPIO5/RSV C15
TMDS_HPD A10
STRP_DATA E10
DDC_DATA B10
TESTMODE E12
L2
FBML10160808121LMT_0603
1 2
R72
1K_0402_5%
12
C183
1U_0603_10V4Z
1
2
R554
150_0603_1%
1 2
L7
FBML10160808121LMT_0603
1 2
C188
1U_0603_10V4Z
1 2
R69 715_0402_1%
1 2
C185
1U_0603_10V4Z
1
2
R71
5.6K_0402_5%
1 2
L4
FBML10160808121LMT_0603
1 2
T21 PAD
C175
0.1U_0402_16V4Z
1
2
C176
10U_0805_10V4Z
1
2
C177
1U_0603_10V4Z
1
2
C178
0.1U_0402_16V4Z
1
2
R70
2.2K_0402_5%
12
C182
0.1U_0402_16V4Z
1
2
L5
FBML10160808121LMT_0603
1 2
T20PAD
C180
10U_0805_10V4Z
1
2
R453
1K_0402_5%
@
12
R82
4.7K_0402_5%
1 2
C184
0.1U_0402_16V4Z
1
2
R74 10K_0402_5%
1 2
R81
4.7K_0402_5%
1 2
L6
FBML10160808121LMT_0603
1 2
R76 3K_0402_5%
1 2
C186
10U_0805_10V4Z
1
2
C179
1U_0603_10V4Z
1
2
R80 4.7K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSS30
VSS89
VSSA22
VSSA59
VDDHT31
VDDHT30
VDD18
VDDA18_13
VDDA12_13
VDDA18
VDDA12_13
VDDA18_13
VSSA59
VDDHT30
VDDHT31
VSS30
VSSA22
VSS89
+1.2V_HT
+1.8VS
+1.2V_HT
+2.5VS
+1.8VS
+1.2V_HT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
RS480M Power/GND
Custom
14 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
07/04 for +1.2V_HT ripple
2005.08.11 for ATI Suggestion
2005.08.11 for ATI Suggestion
C203 0.1U_0402_16V4Z
1 2
C258 1U_0402_6.3V4Z
1 2
C2160.1U_0402_16V4Z
12
C2180.1U_0402_16V4Z
12
C211 0.1U_0402_16V4Z
1 2
C2350.1U_0402_16V4Z
12
C263
4.7U_0805_6.3V6K
1
2
C197 1U_0402_6.3V4Z
1 2
C2520.1U_0402_16V4Z
12
C2440.1U_0402_16V4Z
12
C2200.1U_0402_16V4Z
12
C225 22U_1206_10V4Z
1 2
C246 0.1U_0402_16V4Z
1 2
C198 0.1U_0402_16V4Z
1 2
C2170.1U_0402_16V4Z
12
C2410.1U_0402_16V4Z
12
C2310.1U_0402_16V4Z
12
C214 0.1U_0402_16V4Z
1 2
C2370.1U_0402_16V4Z
12
C247 0.1U_0402_16V4Z
1 2
C2421U_0402_6.3V6K
12 C2001U_0402_6.3V6K
12
+
C702 100U_D2_6.3M_R45 @
1 2
C260 0.1U_0402_16V4Z
1 2
C2590.1U_0402_16V4Z
12
C2570.1U_0402_16V4Z
12
C251 1U_0402_6.3V4Z
1 2
C2290.1U_0402_16V4Z
12
C201 0.1U_0402_16V4Z
1 2
C195 0.1U_0402_16V4Z
1 2
C2190.1U_0402_16V4Z
12
C248 1U_0402_6.3V4Z
1 2
C264
4.7U_0805_6.3V6K
1
2
C206 0.1U_0402_16V4Z
1 2
C2210.1U_0402_16V4Z
12
GROUND
U4F
216RS480M_BGA706
VSS1
G10
VSS2
G12
VSS3
AD29
VSS4
AD27
VSS5
AC27
VSS6
G15
VSS7
G14
VSS8
Y24
VSS9
G13
VSS10
E9
VSS11
D15
VSS12
D9
VSS13
AD9
VSS14
G11
VSS15
F16
VSS16
G30
VSS17
AB28
VSS18
AB25
VSS19
D12
VSS20
AD24
VSS21
AA28
VSS22
G17
VSS23
Y23
VSS24
AC9
VSS25
R19
VSS26
Y27
VSS27
C28
VSS28
G16
VSS29
F25
VSS30
B30
VSS31
T24
VSS32
F26
VSS33
W27
VSS34
D11
VSS35
H11
VSS36
AD25
VSS37
H17
VSS38
H10
VSS39
H16
VSS40
H14
VSS41
E16
VSS42
D10
VSS43
E15
VSS44
F15
VSS45
U15
VSS46
V14
VSS47
R15
VSS48
T14
VSS49
N15
VSS50
V12
VSS51
N13
VSS52
P14
VSS53
U17
VSS54
T16
VSS55
R17
VSS56
P12
VSS57
T12
VSS58
R13
VSS59
W13
VSS60
W17
VSS61
P18
VSS62
V18
VSS63
M18
VSS64
U13
VSS65
N17
VSS66
W15
VSS67
V16
VSS68
T18
VSS69
M14
VSS70
M12
VSS71
M16
VSS72
P16
VSS73
U19
VSS74
AC16
VSS75
AG18
VSS76
AC23
VSS77
AD8
VSS78
AD11
VSS79
AD13
VSS80
AD16
VSS81
AD19
VSS82
AD23
VSS83
AG5
VSS84
AG6
VSS85
AG21
VSS86
AD17
VSS87
AG15
VSS88
AG12
VSS89
AF30
VSS90
AG24
VSS91
AG9
VSS92
AC19
VSS93
AG27
VSS94
AC11
VSS95
AD7
VSS96
AJ30
VSS97
AC21
VSS98
AK5
VSS99
AK10
VSS100
AC13
VSS101
AD21
VSS102
AK22
VSS103
AK29
VSS104
W19
VSS105
AE26
VSS106
AE27
VSS107
T27
VSS108
R27
VSS109
AD28
VSS110
F24
VSS111
F27
VSS112
G28
VSSA1 R5
VSSA2 AE5
VSSA3 V5
VSSA4 N3
VSSA5 F7
VSSA6 F5
VSSA7 R3
VSSA8 AA6
VSSA9 T3
VSSA10 M6
VSSA11 C5
VSSA12 F8
VSSA13 M8
VSSA14 Y8
VSSA15 V3
VSSA16 C3
VSSA17 W3
VSSA18 K8
VSSA19 D3
VSSA20 C6
VSSA21 AA3
VSSA22 A2
VSSA23 AB3
VSSA24 P8
VSSA25 J6
VSSA26 C8
VSSA27 AD3
VSSA28 V8
VSSA29 F3
VSSA30 AE3
VSSA31 AF3
VSSA32 M5
VSSA33 AB7
VSSA34 G3
VSSA35 B4
VSSA36 P7
VSSA37 AA5
VSSA38 C9
VSSA39 C7
VSSA40 J5
VSSA41 R6
VSSA42 J3
VSSA43 AD5
VSSA44 D6
VSSA45 C4
VSSA46 K3
VSSA47 AB8
VSSA48 T7
VSSA49 Y7
VSSA50 AD6
VSSA51 K7
VSSA52 H7
VSSA53 M3
VSSA54 V6
VSSA55 H8
VSSA56 C2
VSSA57 AG3
VSSA58 L6
VSSA59 AJ1
VSSA60 M7
VSSA61 V7
VSSA62 F6
VSSA63 E6
VSSA64 U5
VSSA65 U6
VSSA66 E5
VSSA67 L5
VSSA68 T8
VSS113 F28
VSS114 H28
VSS115 M24
VSS116 J28
VSS117 N19
VSS118 K28
VSS119 T23
VSS120 L27
VSS122 M27
VSS123 H24
VSS124 N28
VSS125 P25
VSS126 P28
VSS127 E26
VSS128 K25
VSS129 U28
VSS130 V25
VSS131 V28
VSS132 R23
R84
0_0805_5%
12
C2390.1U_0402_16V4Z
12
C2340.1U_0402_16V4Z
12
C2321U_0402_6.3V6K
12
C261
4.7U_0805_6.3V6K
1
2
C194 0.1U_0402_16V4Z
1 2
C254 1U_0402_6.3V4Z
1 2
C2360.1U_0402_16V4Z
12
C2300.1U_0402_16V4Z
12
C262
4.7U_0805_6.3V6K
1
2
C213 0.1U_0402_16V4Z
1 2
C2280.1U_0402_16V4Z
12
C2380.1U_0402_16V4Z
12
C2220.1U_0402_16V4Z
12
POWER
U4E
216RS480M_BGA706
VDD_HT1
N27
VDD_HT2
U27
VDD_HT3
V27
VDD_HT4
G27
VDD_HT5
V24
VDD_HT6
H27
VDD_HT7
K24
VDD_HT8
AB24
VDD_HT9
P27
VDD_HT10
J27
VDD_HT11
AA27
VDD_HT12
K27
VDD_HT13
P24
VDD_HT14
AB27
VDD_HT15
AB23
VDD_HT16
V23
VDD_HT17
G23
VDD_HT18
E23
VDD_HT19
W23
VDD_HT20
K23
VDD_HT21
J23
VDD_HT22
H23
VDD_HT23
U23
VDD_HT24
AA23
VDD_HT25
D23
VDD_HT26
F23
VDD_HT27
C23
VDD_HT28
B23
VDD_HT29
A23
VDD_HT30
A29
VDD_HT31
AC30
VDD_MEM1
AK23
VDD_MEM2
AK28
VDD_MEM3
AK11
VDD_MEM4
AK4
VDD_MEM5
AE30
VDD_MEM6
AC14
VDD_MEM7
AD12
VDD_MEM8
AC18
VDD_MEM9
AC20
VDD_MEM10
AD10
VDD_MEM11
AD14
VDD_MEM12
AD15
VDD_MEM13
AD20
VDD_MEM14
AC10
VDD_MEM15
AD18
VDD_MEM16
AC12
VDD_MEM17
AD22
VDD_MEM18
AC22
VDD_MEMCK
AH15
VDD18_1
H15
VDD18_2
AC17
VDD18_3
AC15
VDD_CORE47
B21
VDD_CORE46
C21
VDD_CORE45
A22
VDD_CORE44
B22
VDD_CORE43
C22
VDD_CORE42
F21
VDD_CORE41
F22
VDD_CORE40
E21
VDD_CORE39
G21
VDDA12_14 H9
VDDA12_1 AA7
VDDA12_2 G9
VDDA12_3 U8
VDDA12_4 N7
VDDA12_5 N8
VDDA12_6 U7
VDDA12_7 F9
VDDA12_8 AA8
VDDA12_9 G8
VDDA12_10 G7
VDDA12_11 J8
VDDA12_12 J7
VDDA12_13 B1
VDDA18_1 AG4
VDDA18_2 R8
VDDA18_3 AC8
VDDA18_4 AC7
VDDA18_5 AF6
VDDA18_6 AE6
VDDA18_7 L8
VDDA18_8 W8
VDDA18_9 W7
VDDA18_10 L7
VDDA18_11 R7
VDDA18_12 AF5
VDDA18_13 AK2
VDD_CORE1 N16
VDD_CORE2 M13
VDD_CORE3 M15
VDD_CORE4 W16
VDD_CORE5 N18
VDD_CORE6 P19
VDD_CORE7 N12
VDD_CORE8 P15
VDD_CORE9 N14
VDD_CORE10 M17
VDD_CORE11 T19
VDD_CORE12 G22
VDD_CORE13 R12
VDD_CORE14 P13
VDD_CORE15 R14
VDD_CORE16 V19
VDD_CORE17 R18
VDD_CORE18 U16
VDD_CORE19 U12
VDD_CORE20 T13
VDD_CORE21 U14
VDD_CORE22 T17
VDD_CORE23 U18
VDD_CORE24 E22
VDD_CORE25 R16
VDD_CORE26 V13
VDD_CORE27 T15
VDD_CORE28 P17
VDD_CORE29 W18
VDD_CORE30 D22
VDD_CORE31 W12
VDD_CORE32 V15
VDD_CORE33 W14
VDD_CORE34 V17
VDD_CORE35 M19
VDD_CORE36 H22
VDD_CORE37 H21
VDD_CORE38 D21
C196 0.1U_0402_16V4Z
1 2
C249 0.1U_0402_16V4Z
1 2
C2400.1U_0402_16V4Z
12
C2240.1U_0402_16V4Z
12
C202 1U_0402_6.3V6K
1 2
C2230.1U_0402_16V4Z
12
C227 22U_1206_10V4Z
1 2
C245 0.1U_0402_16V4Z
1 2
C193 0.1U_0402_16V4Z 1 2
C2550.1U_0402_16V4Z
12
L10
FBML10160808121LMT_0603
1 2
C209 1U_0402_6.3V4Z
1 2
C190 22U_1206_10V4Z
1 2
C2070.1U_0402_16V4Z
12
C192 1U_0603_10V4Z
1 2
C2050.1U_0402_16V4Z
12
C204 0.1U_0402_16V4Z
1 2
C2260.1U_0402_16V4Z
12
C212 0.1U_0402_16V4Z
1 2
C19122U_1206_10V4Z
12
C2501U_0603_10V4Z
12
C210 1U_0603_10V4Z
1 2
C256 1U_0402_6.3V4Z
1 2
C199 0.1U_0402_16V4Z
1 2
C208 0.1U_0402_16V4Z
1 2
C2330.1U_0402_16V4Z
12
C2430.1U_0402_16V4Z
12
C21522U_1206_10V4Z
12
C2530.1U_0402_16V4Z
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NMAA1
NMAA2
NMAA0
NMAA3
NMAA6
NMAA4
NMAA5
NMAA7
NMAA10
NMAA13
NMAA8
NMAA11
NMAA9
NMAA14
NMAA13
NMAA14
NMAA13
NMAA14
NMDA41
NMAA13
NMDA42
NMDA47
NMDA40
NMDA43
NMDA44
NMDA45
NMAA14
NMCKEA
NMCKEA
NMCKEA
NMCLKA0#
NMCLKA0#
NMCLKA0 NMCLKA0
NMCLKA0#
NMCLKA0
NMCASA#
NMCSA0#
NMWEA#
NMRASA# NMCASA#
NMCSA0#
NMWEA#
NMRASA#
NMCASA#
NMCSA0#
NMWEA#
NMRASA#
NMAA12
NMCASA#
NMAA10
NDQMA6
NMCKEA
NMCSA0#
NMWEA#
NMRASA#
NMDA49
NMAA11
NMAA12
NMDA50
NMDA48
NMDA55
NMDA54
NMDA53
NMDA52
NMDA51
NDQMA7
NMAA10
NMAA11
NMAA12
NMDA2
NMDA0
NMDA1
NMDA4
NMDA3
NMDA7
NMDA6
NDQMA0
NMDA5
NDQSA0
NMDA10
NMDA9
NMDA12
NMDA15
NMDA11
NMDA13
NDQMA1
NMDA14
NMDA8
NDQSA1
NMDA16
NMDA18
NMDA20
NMDA19
NMDA17
NMDA21
NMDA22
NDQMA2
NMDA23
NDQSA2
NMDA28
NMDA30
NMDA26
NMDA31
NMDA24
NDQSA3
NDQMA3
NMDA29
NMDA25
NMDA27
NMDA34
NMDA38
NMDA39
NMDA37
NMDA32
NMDA33
NMDA35
NMDA36
NDQSA4
NDQMA4
NMDA46
NDQSA5
NDQMA5
NMDA58
NMDA56
NMDA61
NMDA57
NMDA62
NMDA63
NMDA59
NMDA60
VREF_1
NMAA10
NMAA11
NMAA12
NMCLKA0
NMCLKA0#
NMCLKA0
NMCLKA0#
VREF_2VREF_1
NDQSA6
NDQSA7
NMAA1
NMAA2
NMAA0
NMAA3
NMAA6
NMAA4
NMAA5
NMAA7
NMAA8
NMAA9
NMDA[0..63]
NDQSA[0..7]
NMAA[0..14]
NMAA1
NMAA2
NMAA0
NMAA3
NMAA6
NMAA4
NMAA5
NMAA7
NMAA8
NMAA9
VREF_2
NMAA1
NMAA2
NMAA0
NMAA6
NMAA3
NMAA4
NMAA5
NMAA8
NMAA7
NMAA9
NDQMA[0..7]
NDQSA[0..7]<11>
NDQMA[0..7]<11>
NMAA[0..14]<11>
NMCKEA <11>
NMDA[0..63]<11>
NMWEA# <11>
NMCSA0# <11>
NMCASA# <11>
NMRASA# <11>
NMCLKA0 <11>
NMCLKA0# <11>
+2.5VS
+2.5VS
+2.5VS +2.5VS
+2.5VS
+2.5VS
+2.5VS
+2.5VS
+2.5VS +2.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
VGA DDR
Custom
15 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
(20mil)
(20mil)
07/04 For EMI
R87
1K_0402_1%
VRAM@
12
C267
0.1U_0402_16V4Z
VRAM@
1
2
C271
0.1U_0402_16V4Z
VRAM@
1
2
C740
1000P_0402_50V7K
VRAM@
1
2
R85
1K_0402_1%
VRAM@
12
C272
0.1U_0402_16V4Z
VRAM@
1
2
C274
0.1U_0402_16V4Z
VRAM@
1
2
C288
0.1U_0402_16V4Z
VRAM@
1
2
C283
0.1U_0402_16V4Z
VRAM@
1
2
C742
220P_0402_50V8J
VRAM@
1
2
C739
1000P_0402_50V7K
VRAM@
1
2
X76 VRAM
ZZZ
SAMSUNG X76 VRAMSAMSUNG@
C273
0.1U_0402_16V4Z
VRAM@
1
2
U8
HY5DU561622CT-4_TSOPII66@
VSS2 66
VSS1 48
VDD1 18
VDD2 33
VDD0 1
VSS0 34
A0
29
A1
30
A2
31
A3
32
A4
35
A5
36
A6
37
A7
38
A8
39
A9
40
AP/A10
28
A11
41
A12
42
VDDQ0 3
VDDQ1 9
VDDQ2 15
VDDQ3 55
VDDQ4 61
NC0 14
NC1 17
NC2 19
NC3 25
NC4 43
NC5 50
NC6 53
VSSQ0 6
VSSQ1 12
VSSQ2 52
VSSQ3 58
VSSQ4 64
LDQS0
16
LDM1
20
DQ0
2
DQ1
4
DQ2
5
DQ3
7
DQ4
8
DQ5
10
DQ6
11
DQ7
13
CS# 24
RAS# 23
CAS# 22
WE# 21
UDQS0
51
UDM1
47
DQ8
54
DQ9
56
DQ10
57
DQ11
59
DQ12
60
DQ13
62
DQ14
63
DQ15
65
VREF
49 BA0 26
BA1 27
CK 45
CK# 46
CKE 44
X76 VRAM
ZZZ
HYNIX X76 VRAMHYNIX@
C282
0.1U_0402_16V4Z
VRAM@
1
2
C276
10U_0805_10V4Z
VRAM@
1
2
C738
220P_0402_50V8J
VRAM@
1
2
C743
1000P_0402_50V7K
VRAM@
1
2
C265
10U_0805_10V4Z
VRAM@
1
2
R86
1K_0402_1%
VRAM@
12
U7
HY5DU561622CT-4_TSOPII66@
VSS2 66
VSS1 48
VDD1 18
VDD2 33
VDD0 1
VSS0 34
A0
29
A1
30
A2
31
A3
32
A4
35
A5
36
A6
37
A7
38
A8
39
A9
40
AP/A10
28
A11
41
A12
42
VDDQ0 3
VDDQ1 9
VDDQ2 15
VDDQ3 55
VDDQ4 61
NC0 14
NC1 17
NC2 19
NC3 25
NC4 43
NC5 50
NC6 53
VSSQ0 6
VSSQ1 12
VSSQ2 52
VSSQ3 58
VSSQ4 64
LDQS0
16
LDM1
20
DQ0
2
DQ1
4
DQ2
5
DQ3
7
DQ4
8
DQ5
10
DQ6
11
DQ7
13
CS# 24
RAS# 23
CAS# 22
WE# 21
UDQS0
51
UDM1
47
DQ8
54
DQ9
56
DQ10
57
DQ11
59
DQ12
60
DQ13
62
DQ14
63
DQ15
65
VREF
49 BA0 26
BA1 27
CK 45
CK# 46
CKE 44
C277
0.1U_0402_16V4Z
VRAM@
1
2
C281
0.1U_0402_16V4Z
VRAM@
1
2
U6
HY5DU561622CT-4_TSOPII66@
VSS2 66
VSS1 48
VDD1 18
VDD2 33
VDD0 1
VSS0 34
A0
29
A1
30
A2
31
A3
32
A4
35
A5
36
A6
37
A7
38
A8
39
A9
40
AP/A10
28
A11
41
A12
42
VDDQ0 3
VDDQ1 9
VDDQ2 15
VDDQ3 55
VDDQ4 61
NC0 14
NC1 17
NC2 19
NC3 25
NC4 43
NC5 50
NC6 53
VSSQ0 6
VSSQ1 12
VSSQ2 52
VSSQ3 58
VSSQ4 64
LDQS0
16
LDM1
20
DQ0
2
DQ1
4
DQ2
5
DQ3
7
DQ4
8
DQ5
10
DQ6
11
DQ7
13
CS# 24
RAS# 23
CAS# 22
WE# 21
UDQS0
51
UDM1
47
DQ8
54
DQ9
56
DQ10
57
DQ11
59
DQ12
60
DQ13
62
DQ14
63
DQ15
65
VREF
49 BA0 26
BA1 27
CK 45
CK# 46
CKE 44
R90
56_0402_5%
VRAM@
12
C741
220P_0402_50V8J
VRAM@
1
2
C744
1000P_0402_50V7K
VRAM@
1
2
C266
10U_0805_10V4Z
VRAM@
1
2
C285
0.1U_0402_16V4Z
VRAM@
1
2
C268
0.1U_0402_16V4Z
VRAM@
1
2
C286
0.1U_0402_16V4Z
VRAM@
1
2
C269
0.1U_0402_16V4Z
VRAM@
1
2
C280
0.1U_0402_16V4Z
VRAM@
1
2
C270
0.1U_0402_16V4Z
VRAM@
1
2
C279
0.1U_0402_16V4Z
VRAM@
1
2
C737
220P_0402_50V8J
VRAM@ 1
2
R89
56_0402_5%
VRAM@
12
C284
0.1U_0402_16V4Z
VRAM@
1
2
U9
HY5DU561622CT-4_TSOPII66@
VSS2 66
VSS1 48
VDD1 18
VDD2 33
VDD0 1
VSS0 34
A0
29
A1
30
A2
31
A3
32
A4
35
A5
36
A6
37
A7
38
A8
39
A9
40
AP/A10
28
A11
41
A12
42
VDDQ0 3
VDDQ1 9
VDDQ2 15
VDDQ3 55
VDDQ4 61
NC0 14
NC1 17
NC2 19
NC3 25
NC4 43
NC5 50
NC6 53
VSSQ0 6
VSSQ1 12
VSSQ2 52
VSSQ3 58
VSSQ4 64
LDQS0
16
LDM1
20
DQ0
2
DQ1
4
DQ2
5
DQ3
7
DQ4
8
DQ5
10
DQ6
11
DQ7
13
CS# 24
RAS# 23
CAS# 22
WE# 21
UDQS0
51
UDM1
47
DQ8
54
DQ9
56
DQ10
57
DQ11
59
DQ12
60
DQ13
62
DQ14
63
DQ15
65
VREF
49 BA0 26
BA1 27
CK 45
CK# 46
CKE 44
C287
0.01U_0402_16V7K
VRAM@
1 2
C289
0.1U_0402_16V4Z
VRAM@
1
2
C278
0.1U_0402_16V4Z
VRAM@
1
2
R88
1K_0402_1%
VRAM@
12
C275
10U_0805_10V4Z
VRAM@
1
2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
+3V_VDD
XTALIN_CLK
XTALOUT_CLK
SB_SCLK
SB_SDAT
PCIECLK0_R
PCIECLK0#_R
SBSRCCLK_R
SBSRCCLK#_R
SBLINKCLK_R
SBLINKCLK#_R
PCIECLK0
PCIECLK0#
SBSRCCLK
SBSRCCLK#
SBLINKCLK
SBLINKCLK#
CPUCLK0H
CPUCLK0L
PCIECLK0#
PCIECLK0
SBSRCCLK
SBSRCCLK#
SBLINKCLK
SBLINKCLK#
FS2
FS0
FS1
FS2
FS0
FS1
NC_CLKSEL0#
NC_CLKSEL1#
PCIECLK1_R
PCIECLK1#_R PCIECLK1
PCIECLK1#
PCIECLK1#
PCIECLK1
SB_SDAT<8,9,20,28> SB_SCLK<8,9,20,28>
PCIECLK0 <28>
PCIECLK0# <28>
SBSRCCLK <19>
SBSRCCLK# <19>
SBLINKCLK <13>
SBLINKCLK# <13>
NB_REFCLK<13>
CLK_48M_CB <25>
USBCLK_EXT <20>
SB_OSC_INT <20>
CPUCLK0_H <6>
CPUCLK0_L <6>
NC_CLKSEL0#<28>
HTREFCLK <13>
PCIECLK1 <28>
PCIECLK1# <28>
+3VS +3V_CLK +3VS+3V_VDD
+3V_CLK
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Clock Generator
Custom
16 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
+3V_CLK (40 mils)
100.00
1 1 1
1 0 1
1 0 0
0 1 1
0 0 1
PCIFS0 HTT
200.00
133.33
60.00 30.00
0 1 0
0 0 0
*
100.00
Reserved
73.12
Hi-Z
100.00 Normal HAMMER operation
100.00
Hi-Z
100.00
100.00
Reserved
33.33
100.00
33.33
Reserved
Reserved
Reserved
48.00
48.00
48.00
48.00
48.00
USB
48.00
48.00
[2:1] COMMENT
66.66
36.56
FS1 CPU
X/3 X/6
SRCCLK
Hi-Z
FS2
33.33
66.66 Reserved
66.66
100.00
220.00
180.00
EXT CLK FREQUENCY SELECT TABLE(MHZ)
X
Express Card(17)
A link Express
A link Express
+3V_VDD (20mils)
Express Card(15.4)
R469 33_0402_5%
15_EXP@
1 2
R106 475_0402_1%
1 2
R100 49.9_0402_1%
1 2
R108 49.9_0402_1%
1 2
R101 33_0402_5%
1 2
R91 15_0402_1%
1 2
R110 49.9_0402_1%
1 2
L12
CHB2012U121_0805
12
C300
22P_0402_50V8J
1 2
R111
10K_0402_5%
@
1 2
L13
CHB2012U121_0805
12
R120
10K_0402_5%
12
U10
ICS951412AGLFT_TSSOP56
X1
1
X2
2
VDDCPU
43
GND
5
VDDSRC
14
PCICLK0 50
VDDSRC
21
VDD_PCI
51
CPUCLK8C1 40
CPUCLK8T1 41
VDDSRC
35
CPUCLK8C0 44
CPUCLK8T0 45
IREF
37
GNDA 38
VDDA 39
SRCCLKT7 12
VDD48
3
SRCCLKC7 13
VDDATI
32
SRCCLKT6 16
SRCCLKC6 17
SRCCLKT5 18
SRCCLKC5 19
SRCCLKT4 22
SRCCLKC4 23
SRCCLKT3 24
SRCCLKC3 25
ATIGCLKT1 27
ATIGCLKC1 28
ATIGCLKT0 30
ATIGCLKC0 29
NC
6
FS0/REF0 54
FS1/REF1 53
FS2 9
SDATA
8SCLK
7
REF2
52
GND
55
GNDSRC
36
GNDATI
31
GNDSRC
26
GNDSRC
20
HTTCLK0 47
USB_48MHz 4
CLKREQA#
10 CLKREQB#
11
GNDSRC
15
GNDPCI
49
GNDHTT
46
GNDCPU
42
VDDHTT
48
SRCCLKT0 34
SRCCLKC0 33
VDDREF
56
R471 33_0402_5%
15_EXP@
1 2
R95 33_0402_5%
17_EXP@
1 2
C296
0.1U_0402_16V4Z
1
2
C290
0.1U_0402_16V4Z
1
2
C294
0.1U_0402_16V4Z
1
2
R114 33_0402_5% @ 1 2
C298
0.1U_0402_16V4Z
1
2
C293
0.1U_0402_16V4Z
1
2
C297
0.1U_0402_16V4Z
1
2
R99 33_0402_5%
1 2
R470 49.9_0402_1%
15_EXP@
1 2
R115 33_0402_5%
1 2
R122
8.2K_0402_5% @
12
C291
10U_0805_10V4Z
1
2
R98 49.9_0402_1%
1 2
C299
2.2U_0805_10V4Z
1 2
R113 33_0402_5%
1 2
C292
10U_0805_10V4Z
1
2
R119
10K_0402_5%
12
L11
CHB2012U121_0805
1 2
R96 49.9_0402_1%
17_EXP@
1 2
R472 49.9_0402_1%
15_EXP@
1 2
R116
51.1_0402_1%
12
R93 33_0402_5%
17_EXP@
1 2
R123
8.2K_0402_5% @
12
R118
10K_0402_5%
12
R92 15_0402_1%
1 2
C301
22P_0402_50V8J
1 2
R109 33_0402_5%
1 2
R112 33_0402_5%
1 2
R121
8.2K_0402_5%@
12
R107 33_0402_5%
1 2
C295
0.1U_0402_16V4Z
1
2
R97 33_0402_5%
1 2
Y1
14.31818MHz_20P_1BX14318BE1A
12
R94 49.9_0402_1%
17_EXP@
1 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
DISPOFF#
ENVDD
WIRELESS_LED
WL_LED#
WL_LED#
EDID_DAT_LCD
EDID_CLK_LCD
LVDSB1+
LVDSB1-
DAC_BRIG
INVT_PWM
DISPOFF#
LVDSBC+
LVDSBC-
+LCDVDD
LVDSA0+
LVDSA0-
LVDSAC-
LVDSAC+
LVDSA2-
LVDSA2+
LVDSB2+
LVDSB2-
LVDSA1-
LVDSA1+
LVDSB0+
LVDSB0-
ENABLT<13,37,38>
BKOFF#<37,38>
ENVDD<13>
WIRELESS_LED<30,34,35>
LVDSB1+<13> LVDSB1-<13>
LVDSBC-<13> LVDSBC+<13>
INVT_PWM<37,38>
EDID_CLK_LCD<13> EDID_DAT_LCD<13>
DAC_BRIG<37,38>
LVDSA0+ <13>
LVDSA0- <13>
LVDSAC+ <13>
LVDSAC- <13>
LVDSA2- <13>
LVDSA2+ <13>
LVDSB2- <13>
LVDSB2+ <13>
LVDSA1- <13>
LVDSA1+ <13>
LVDSB0- <13>
LVDSB0+ <13>
+3VS
INVPWR_B+B+
+3VS
+LCDVDD
+LCDVDD +5VALW
INVPWR_B+
+5VS
+LCDVDD
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
LVDS Panel Interface
Custom
17 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
LCD Panel & inverter Connector
5/6 Add current limit resister
L15 0_0805_5%@1 2
D3
CH751H-40_SC76
21
JP6
ACES_88242-4000
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
1
13
35
57
79
911
11 13
13 15
15 17
17 19
19 21
21 23
23 25
25 27
27 29
29 31
31 33
33 35
35 37
37 39
39 GND 42
GND
41
R130
100K_0402_5%
1 2
G
D
S
Q5
SI2301BDS_SOT23
2
1 3
R124
4.7K_0402_5%
1 2
Q7
DTC124EK_SC59
2
13
R128
100K_0402_5%
WL_LED@
1 2
C306
4.7U_0805_10V4Z
1
2
L14 0_0805_5%
1 2
C305
4.7U_0805_10V4Z
1
2
C302
0.01U_0402_16V7K
1
2
R127
1K_0402_5%
WL_LED@
1 2
G
D
S
Q6
2N7002_SOT23
2
13
C304
0.1U_0402_16V4Z
1
2
C303
0.047U_0402_16V4Z
1
2
R581
150_0402_5%
WL_LED@
1 2
R129
100_0402_1%
12
Q4
MMBT3904_SOT23
WL_LED@
2
3 1
D2
CH751H-40_SC76
21
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
COMPS_CL
TV_CRMA
TV_COMPS
TV_LUMA
CRMA_CL
LUMA_CL
TVGND
CRT_G
CRT_HSYNCRFL
+CRTVDD
3VDDCCL
3VDDCDACRT_HSYNC
CRT_VSYNC
CRT_B
CRT_VSYNCRFL
CRT_R
CRTL_G
CRTL_R
CRTL_B
CRT_HSYNC_R
CRT_VSYNC_R
M_SEN#
TV_LUMA<13,40>
TV_CRMA<13,40>
TV_COMPS<13,40>
CRT_R<13>
CRT_G<13>
CRT_B<13>
3VDDCDA <13>
3VDDCCL <13>
CRT_HSYNC<13>
CRT_VSYNC<13>
M_SEN#<37,38>
+3VS
+CRTVDD
+CRTVDD
+R_CRT_VCC
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
CRT Connector & TV-OUT CONN
Custom
18 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
S-Video
TV-Out Connector
CRT CONNECTOR
+R_CRT_VCC , +CRTVDD (40mils)
6/11 change D6 from RB411to RB491(higher
current rating)
C319
270P_0402_50V7K
1
2
C316
10P_0402_50V8K
1
2
R138
4.7K_0402_5%
R133
75_0402_5%
1 2
R135 4.7K_0402_5%
C324
330P_0402_50V7K
1
2
R139
4.7K_0402_5%
C322
330P_0402_50V7K
1
2
R553 33_0402_5%
R552 33_0402_5%
C317
220P_0402_25V8K
1
2
C321
270P_0402_50V7K
1
2
JP8
SUYIN_070112FR015S222XU
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
16
17
F1
1.1A_6VDC_FUSE
21
JP9
SUYIN_030006FR007T107ZL
1
1
2
2
3
3
4
4
5
5
6
6
7
7GND 8
GND 9
C320
270P_0402_50V7K
1
2
R140
75_0402_1%
12
R131
75_0402_5%
1 2
C311
22P_0402_25V8K
1
2
G
D
S
Q9
2N7002_SOT23
2
1 3
R142
75_0402_1%
12
C308
10P_0402_50V8K
1
2
L23
FLM1608081R8K_0603
1 2
L16
FCM2012C-800_0805
1 2
R143
0_0805_5%
1 2
C312
22P_0402_25V8K
1
2
C309
10P_0402_50V8K
1
2
C310
10P_0402_50V8K
1
2
C314
0.1U_0402_16V4Z
1 2
L20
FBM-L11-160808-800LMT_0603
1 2
L21
FLM1608081R8K_0603
1 2
R137
20_0402_5%
1 2
L18
FCM2012C-800_0805
1 2
L17
FCM2012C-800_0805
1 2
G
D
S
Q8
2N7002_SOT23
2
1 3
L22
FLM1608081R8K_0603
1 2
D6
RB491D_SOT23
2 1
R141
75_0402_1%
12
L19
FBM-L11-160808-800LMT_0603
1 2
C323
330P_0402_50V7K
1
2
R132
75_0402_5%
1 2
U11
74AHCT1G125GW_SOT353-5
A
2Y4
OE# 1
G
3P5
R136
20_0402_5%
1 2
C307
0.1U_0402_16V4Z
1
2
R134 4.7K_0402_5%
U12
74AHCT1G125GW_SOT353-5
A
2Y4
OE# 1
G
3P5
C313
22P_0402_25V8K
1
2
C318 220P_0402_25V8K
1
2
C315
10P_0402_50V8K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD1
PCI_AD0
PCI_AD7
PCI_AD11
PCI_AD9
PCI_AD10
PCI_AD13
PCI_AD5
PCI_AD6
PCI_AD8
PCI_AD14
PCI_AD18
PCI_AD20
PCI_AD16
PCI_AD15
PCI_AD17
PCI_AD19
PCI_AD12
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD29
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD27
PCI_AD30
PCI_AD28
PCI_AD31
PCI_AD[0..31]
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PCI_PIRQB#
PCI_PIRQC#
PCI_TRDY#
PCI_STOP#
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
PCI_CBE#0
PCI_FRAME#
PCI_DEVSEL#
PCI_IRDY#
PCI_PAR
PCI_SERR#
PCI_REQ#3
PCI_REQ#4
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_SERR#
PCI_PAR
PCI_DEVSEL#
LOCK#
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
A_RST#
SBSRCCLK
SBSRCCLK#
ALLOW_LDTSTOP
PCICLK0_R
PCICLK2_R
PCICLK3_R
PCICLK4_R
PCICLK9_R
PCICLKFB
A_RST#
PCIRST#
PCI_CLKRUN#
LOCK#
LPC_AD1
LPC_AD2
LPC_AD0
LPC_FRAME#
LPC_AD3
LDRQ1#
LDRQ0#
PCI_PERR#
SIRQ
RTC_CLK
AUTO_ON#
H_RST#
PCI_PIRQF#
PCI_PIRQE#
PCI_PIRQH#
SB_32KHI
PCIE_PVDD
PCIE_VDDR
PCIE_VDDR
LDTSTOP#
BMREQ#
H_PWRGD
SB_TX3P
SB_TX2N
SB_TX3N PCI_RST#
PCI_GNT#5
PCI_GNT#6
PCI_REQ#5
PCI_REQ#6
PCI_PIRQG#
PCI_PIRQE#
PCI_PIRQG#
PCI_PIRQA#
PCI_PIRQF#
PCI_PIRQH#
PCI_PIRQD#
SB_TX2P
CLK_PCI_SIO_R
CLK_PCI6
CLK_PCI7
CLK_PCI8
PCI_GNT#2
PCI_GNT#1
PCI_GNT#0
PCI_GNT#3
PCI_REQ#5
PCI_GNT#5
PCI_GNT#4
PCI_REQ#4
PCI_REQ#6
PCI_GNT#6
LDRQ1#
LDRQ0#
LPC_AD1
LPC_AD2
LPC_AD0
LPC_AD3
SIRQ
SB_32KH0
PCI_PERR#
PCI_CLKRUN#
PCICLK1_R
PCI_AD[0..31] <23,25,29,30>
PCI_REQ#1 <29>
PCI_REQ#2 <25>
PCI_GNT#1 <29>
PCI_GNT#2 <25>
PCI_GNT#3 <30>
PCI_TRDY# <25,29,30>
PCI_STOP# <25,29,30>
PCI_CBE#0 <25,29,30>
PCI_CBE#1 <25,29,30>
PCI_CBE#2 <25,29,30>
PCI_CBE#3 <25,29,30>
PCI_FRAME# <25,29,30>
PCI_DEVSEL# <25,29,30>
PCI_IRDY# <25,29,30>
PCI_PAR <25,29,30>
PCI_SERR# <25,29,30>
PCI_REQ#3 <30>
SB_RX0P<12> SB_RX0N<12> SB_RX1P<12> SB_RX1N<12>
SB_TX0P<12> SB_TX0N<12> SB_TX1P<12> SB_TX1N<12>
SBSRCCLK<16> SBSRCCLK#<16>
ALLOW_LDTSTOP<13>
CLK_PCI_PCM <25>
CLK_PCI_LAN <23,29>
CLK_PCI_MINI <23,30>
CLK_PCI_EC <23,37,38>
LPC_FRAME# <35,37,38>
LPC_AD1 <35,37,38>
LPC_AD2 <35,37,38>
LPC_AD0 <35,37,38>
LPC_AD3 <35,37,38>
PCI_PERR# <25,29,30>
SIRQ <25,35,37,38>
AUTO_ON# <23>
BMREQ#<13>
H_PWRGD<6>
LDTSTOP#<4,13>
LDRQ0# <35>
RTC_CLK <23>
PCI_RST# <25,27,29,30,35,37,38>
H_RST#<6>
PCI_PIRQF#<30> PCI_PIRQE#<25>
PCI_PIRQG#<29>
NB_RST# <13,24,28,35>
PCI_PIRQH#<25>
CLK_PCI_SIO_R <23,35>
CLK_PCI6 <23>
CLK_PCI7 <23>
CLK_PCI8 <23>
PCI_CLKRUN# <35>
CLK_PCI_TPM <35>
+3VS
+3VALW
+RTCVCC
+1.8VS
+1.8VS
+RTCVCC BATT1.1
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
SB400-PCI_EXP/PCI/LPC/RTC
Custom
19 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
W=20mils
+-
W=20mils
PCIE_PVDD (20mils)
PCIE_VDDR (40mils)
5/11 EMI change
R167 100K_0402_5%
1 2
C338 0.1U_0402_16V4Z
1 2
R161
8.2K_0402_5%
1 2
RP52
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
C342 0.1U_0402_16V4Z
1 2
R151 49.9_0402_1%
1 2
C333 0.1U_0402_16V4Z
1 2
R148 39_0402_5%
1 2
C346
0.1U_0402_16V4Z
R165 10K_0402_5%
1 2
R147 39_0402_5%
1 2
R156 49.9_0402_1%
1 2
C343 0.1U_0402_16V4Z
1 2
R170 100K_0402_5%
1 2
C325 0.01U_0402_16V7K
1 2
C336 0.1U_0402_16V4Z
1 2
C340 0.1U_0402_16V4Z
1 2
R155 33_0402_5%
1 2
JP10
SUYIN_060003FA002TX00NL~D
+
1-2
C341 0.1U_0402_16V4Z
1 2
U44B
SN74LVC125APWLE_TSSOP14
I
5O6
OE# 4
R163 10K_0402_5%
1 2
R174
1K_0402_5%
1 2
RP54
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP56
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
R145 8.2K_0402_5%
1 2
L24
FBM-L11-321611-260-LMT_1206
12
R149 39_0402_5%
1 2
R164 10K_0402_5%
1 2
C328 0.01U_0402_16V7K
1 2
C326 0.01U_0402_16V7K
1 2
R171
20M_0603_5%
1 2
C337 0.1U_0402_16V4Z
1 2
RP55
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
C335 22U_1206_10V4Z
1 2
R153 49.9_0402_1%
1 2
C330 0.1U_0402_16V4Z
1 2
R157 150_0402_1%
12
R154 49.9_0402_1%
1 2
C339 0.1U_0402_16V4Z
1 2
C345
18P_0402_50V8J
1 2
J2
JOPEN
1 2
R152
8.2K_0402_5%
12
R173
20M_0603_5%
12
R144
33_0402_5%
1 2
C331 1U_0603_10V4Z
1 2
C332 10U_0805_10V4Z
1 2
R158 150_0402_1%
12
RP50
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5 C329 0.1U_0402_16V4Z@
1 2
RP53
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
C347
1U_0603_10V4Z
1
2
L25
FBM-L11-321611-260-LMT_1206
12
R172 100K_0402_5%
1 2
C344
18P_0402_50V8J
1 2
R159 4.12K_0402_1%
12
RP51
8.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
R146 39_0402_5%
1 2
R451 39_0402_5%@ 1 2
R150 22_0402_5%
1 2
R166
8.2K_0402_5%
12
R162
8.2K_0402_5%
1 2
BATT1
CR2032 RTC BATTERY
U44A
SN74LVC125APWLE_TSSOP14
I
2O3
OE# 1
P14
G
7
Y2
32.768KHZ_12.5PF_6H03200468
OUT
4
IN
1
NC 3
NC 2
PCI EXPRESS INTERFACE
SB400
PCI INTERFACE
LPC
RTC
CPU
XTAL
PCI CLKS
U14A
CHS-215SB400-02_BGA564
A_RST#
AH8
PCIE_RCLKP
L27
PCIE_RCLKN
M27
PCIE_TX0P
M30
PCIE_TX0N
N30
PCIE_TX1P
K30
PCIE_TX1N
L30
PCIE_TX2P
H30
PCIE_TX2N
J30
PCIE_TX3P
F30
PCIE_TX3N
G30
PCIE_RX0P
M29
PCIE_RX0N
N29
PCIE_RX1P
M28
PCIE_RX1N
N28
PCIE_RX2P
J29
PCIE_RX2N
K29
PCIE_RX3P
J28
PCIE_RX3N
K28
PCIE_CALRP
G27
PCIE_CALRN
H27
PCIE_CALI
G28
PCIE_PVDD
R30
PCIE_VDDR_1
F26
PCIE_VDDR_2
R29
PCIE_VDDR_3
G26
PCIE_VDDR_4
P26
PCIE_VDDR_5
K26
PCIE_VDDR_6
L26
PCIE_VDDR_7
P28
PCIE_VDDR_8
N26
PCIE_VDDR_9
P27
PCIE_VSS_1
H28
PCIE_VSS_2
F29
PCIE_VSS_3
H29
PCIE_VSS_4
H26
PCIE_VSS_5
F27
PCIE_VSS_6
G29
PCIE_VSS_7
L29
PCIE_VSS_8
J26
PCIE_VSS_9
L28
PCIE_VSS_10
J27
PCIE_VSS_11
N27
PCIE_VSS_12
M26
PCIE_VSS_13
K27
PCIE_VSS_14
P29
PCIE_VSS_15
P30
CPU_STP#/DPSLP#
AJ8
PCI_STP#
AK7
INTA#
AG5
INTB#
AH5
INTC#
AJ5
INTD#
AH6
INTE#/GPIO33
AJ6
INTF#/GPIO34
AK6
INTG#/GPIO35
AG7
INTH#/GPIO36
AH7
X1
B2
X2
B1
CPU_PG/LDT_PG
C29
INTR/LINT0
A28
NMI/LINT1
C28
INIT#
B29
SMI#
D29
SLP#/LDT_STP#
E4
IGNNE#
B30
A20M#
F28
FERR#
E28
STPCLK#/ALLOW_LDTSTP
E29
LDT_PG/SSMUXSEL/GPIO0
D25
DPRSLPVR
E27
BMREQ#
D27
LDT_RST#
D28
PCICLK0 L4
PCICLK1 L3
PCICLK2 L2
PCICLK3 L1
PCICLK4 M4
PCICLK5 M3
PCICLK6 M2
PCICLK7 M1
PCICLK8 N4
PCICLK9 N3
PCICLK_FB N2
PCIRST# AJ7
AD0/ROMA18 W3
AD1/ROMA17 Y2
AD2/ROMA16 W4
AD3/ROMA15 Y3
AD4/ROMA14 V1
AD5/ROMA13 Y4
AD6/ROMA12 V2
AD7/ROMA11 W2
AD8/ROMA9 AA4
AD9/ROMA8 V4
AD10/ROMA7 AA3
AD11/ROMA6 U1
AD12/ROMA5 AA2
AD13/ROMA4 U2
AD14/ROMA3 AA1
AD15/ROMA2 U3
AD16/ROMD0 T4
AD17/ROMD1 AC1
AD18/ROMD2 R2
AD19/ROMD3 AD4
AD20/ROMD4 R3
AD21/ROMD5 AD3
AD22/ROMD6 R4
AD23/ROMD7 AD2
AD24 P2
AD25 AE3
AD26 P3
AD27 AE2
AD28 P4
AD29 AF2
AD30 N1
AD31 AF1
CBE0#/ROMA10 V3
CBE1#/ROMA1 AB4
CBE2#/ROMWE# AC2
CBE3# AE4
FRAME# T3
DEVSEL#/ROMA0 AC4
IRDY# AC3
TRDY#/ROMOE# T2
PAR/ROMA19 U4
STOP# T1
PERR# AB2
SERR# AB3
REQ0# AF4
REQ1# AF3
REQ2# AG2
REQ3#/PDMA_REQ0# AG3
REQ4#/PLL_BP33/PDMA_REQ1# AH1
REQ5#/GPIO13 AH2
REQ6#/GPIO31 AH3
GNT0# AJ2
GNT1# AK2
GNT2# AJ3
GNT3#/PLL_BP66/PDMA_GNT0# AK3
GNT4#/PLL_BP50/PDMA_GNT1# AG4
GNT5#/GPIO14 AH4
GNT6#/GPIO32 AJ4
CLKRUN# AG1
LOCK# AB1
LAD0 AG25
LAD1 AH25
LAD2 AJ25
LAD3 AH24
LFRAME# AG24
LDRQ0# AH26
LDRQ1# AG26
SERIRQ AK27
RTCCLK C2
RTC_IRQ#/ACPWR_STRAP F3
VBAT A2
RTC_GND A1
R169
10K_0402_5%
12
C327 0.01U_0402_16V7K
1 2
R168 100K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP4-
USBP0+
USBP0-
USBP1+
USBP1-
OVCUR#0
AC97_RST#
OVCUR#4
USBP6+
USBP6-
EC_SMI#
SUS_STAT#
AVDDRX
AVDDTX
AVDDRX
AVDDTX
AC97_SDIN2
AC97_BITCLK
SB_SPDIFO
AVDDC
AVDDC
H_THERMTRIP#
SLP_S3#
SLP_S5#
PWRBTN_OUT#
NC_CP#
SB_PWRGD
SLP_S3#
SLP_S5#
EC_GA20
KB_RST#
PCIE_PME#
EC_RSMRST#
SB_OSC_INT
AGP_STP#
AGP_BUSY#
SB_SPKR
SB_SCLK
SB_SDAT
SB_SCLK
SB_SDAT
AC97_BITCLK
AC97_SDIN0
AC97_SDIN1
AC97_SDIN2
AC97_RST#
AC97_SDIN1
EC_FLASH#
EC_FLASH# EC_THERM#
NC_CP#
LPC_SMI#
LPC_SMI#
EXP_RST#
USBP5-
USBP5+
USBP4+
AC97_SDIN0
USB_VREFOUT
SB_OSC_INT
14M_X2
14M_X2
EC_SCI#
EC_SWI#
BT_ON#
WL_ON
BT_DET#BT_DET#
PCIE_PME#
BT_ON#
SYS_RESET#
SYS_RESET#
AGP_STP#
AGP_BUSY#
S3_STATE
S3_STATE
USBP7+
USBP7-
KB_RST#
EC_RSMRST#
USBP3-
USBP3+
LID_OUT#
OVCUR#3
EXP_RST#
USBP0- <34>
USBP0+ <34>
USBP1+ <40>
USBP1- <40>
USBP4- <35>
USBP6- <34>
USBP6+ <34>
AC97_RST#<31>
AC97_BITCLK<31>
SB_SPDIFO<23,40>
H_THERMTRIP#<6>
SLP_S3#<37,38> SLP_S5#<37,38>
PWRBTN_OUT#<37,38> SB_PWRGD<42>
EC_RSMRST#<37,38>
SB_OSC_INT<16>
SB_SPKR<31>
SB_SDAT<8,9,16,28> SB_SCLK<8,9,16,28>
AC97_SDOUT<23,31>
EC_THERM#<37,38>
EC_SMI# <37,38>
EC_FLASH#<39>
OVCUR#0 <34>
OVCUR#4 <35>
EC_GA20<37,38> KB_RST#<37,38>
USBP5- <35>
USBP4+ <35>
USBP5+ <35>
USBCLK_EXT <16>
AC97_SYNC<31>
AC97_SDIN0<31>
EC_SCI# <37,38>
EC_SWI#<37,38>
WL_ON<30>
BT_DET# <34>
PCIE_PME#<28>
BT_ON# <34>
NC_CP#<28>
SUS_STAT#<13>
USBP7- <28>
USBP7+ <28>
USBP3- <34>
USBP3+ <34>
OVCUR#3 <34>
LID_OUT# <37,38>
EXP_RST#<28>
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
SB400-USB/ACPI/AC97/GPIO
Custom
20 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
GPIO11GPIO12
HYNIX 128MB
No VRAM
SAMSUMG 128MB
Reserved
0
1
1
1
00
10
Right side USB
Docking
Left side USB
Left side USB
Bluetooth
AVDDC (20mils)
AVDDTX , AVDDRX (40mils)
check ATI for 2'nd hdd
*
Express Card 15.4
Right side USB
R195 10K_0402_5%
1 2
R192 10K_0402_5%
1 2
R557 10K_0402_5%@1 2
R198 10K_0402_5%
1 2
C356 1U_0603_10V4Z
1 2
R181 4.7K_0402_5%
1 2
R207 10K_0402_5%
1 2
C364 0.1U_0402_16V4Z
1 2
R179 4.7K_0402_5%
1 2
C354 0.1U_0402_16V4Z
1 2
C355 10U_0805_10V4Z
1 2
R197 10K_0402_5%
1 2
R182 4.7K_0402_5%
1 2
R191 2.2K_0402_5%
1 2
L27 FBM-L11-321611-260-LMT_1206
12
R205 10K_0402_5%
1 2
R212
1M_0402_5%
@
1 2
R202 10K_0402_5%
1 2
Y4
14.31818MHz_20P_1BX14318BE1A @
12
R188 10K_0402_5%
1 2
C352 0.1U_0402_16V4Z
1 2
R186 10K_0402_5%
1 2
USB INTERFACE
SB400
USB PWR
CLK / RST
ACPI/WAKE UP EVENTS
GPIOAC97 (NOT USED)
U14B
CHS-215SB400-02_BGA564
TALERT#/TEMP_ALERT#/GPIO10
C6
BLINK/GPM6#
D5
PCI_PME#/GEVENT4#
C4
RI#/EXTEVNT0#
D3
SLP_S3#
B4
SLP_S5#
E3
PWR_BTN#
B3
PWR_GOOD
C3
SUS_STAT#
D4
TEST1
F2
TEST0
E2
GA20IN
AJ26
KBRST#
AJ27
SMBALERT#/THRMTRIP#/GEVENT2#
D6
LPC_PME#/GEVENT3#
C5
LPC_SMI#/EXTEVNT1#
A25
VOLT_ALERT#/S3_STATE/GEVENT5#
D8
SYS_RESET#/GPM7#
D7
WAKE#/GEVENT8#
D2
RSMRST#
D1
14M_X1/OSC
A23
14M_X2
B23
SIO_CLK
AK24
ROM_CS#/GPIO1
B25
GHI#/GPIO6
C25
VGATE/GPIO7
C23
AGP_STP#/GPIO4
D24
AGP_BUSY#/GPIO5
D23
FANOUT0/GPIO3
A27
SPKR/GPIO2
C24
SCL0/GPOC0#
A26
SDA0/GPOC1#
B26
DDC1_SCL/GPIO9
B27
DDC1_SDA/GPIO8
C26
DDC2_SCL/GPIO11
C27
DDC2_SDA/GPIO12
D26
NC1
J2
NC4
K3
NC3
J3
NC2
K2
AC_BITCLK
G1
AC_SDOUT
G2
AC_SDIN0
H4
AC_SDIN1
G3
AC_SDIN2
G4
AC_SYNC
H1
AC_RST#
H3
SPDIF_OUT
H2
48M_X1/USBCLK A15
48M_X2 B15
USB_RCOMP C15
USB_VREFOUT D16
USB_ATEST1 C16
USB_ATEST0 D15
USB_OC0#/GPM0# B8
USB_OC1#/GPM1# C8
USB_OC2#/FANOUT1/GPM2# C7
USB_OC3#/GPM3# B7
USB_OC4#/GPM4# B6
USB_OC5#/GPM5# A6
USB_OC6#/FAN_ALERT#/GEVENT6# B5
USB_OC7#/CASE_ALERT#/GEVENT7# A5
USB_HSDP7+ A11
USB_HSDM7- B11
USB_HSDP6+ A10
USB_HSDM6- B10
USB_HSDP5+ A14
USB_HSDM5- B14
USB_HSDP4+ A13
USB_HSDM4- B13
USB_HSDP3+ A18
USB_HSDM3- B18
USB_HSDP2+ A17
USB_HSDM2- B17
USB_HSDP1+ A21
USB_HSDM1- B21
USB_HSDP0+ A20
USB_HSDM0- B20
AVDDTX_0 C21
AVDDTX_1 C18
AVDDTX_2 D13
AVDDTX_3 D10
AVDDRX_0 D20
AVDDRX_1 D17
AVDDRX_2 C14
AVDDRX_3 C11
AVDDC A16
AVSSC B16
AVSS_USB_1 A9
AVSS_USB_2 A12
AVSS_USB_3 A19
AVSS_USB_4 A22
AVSS_USB_5 B9
AVSS_USB_6 B12
AVSS_USB_7 B19
AVSS_USB_8 B22
AVSS_USB_9 C9
AVSS_USB_10 C10
AVSS_USB_11 C12
AVSS_USB_12 C13
AVSS_USB_13 C17
AVSS_USB_14 C19
AVSS_USB_15 C20
AVSS_USB_16 C22
AVSS_USB_17 D9
AVSS_USB_18 D11
AVSS_USB_19 D12
AVSS_USB_20 D14
AVSS_USB_21 D18
AVSS_USB_22 D19
AVSS_USB_23 D21
AVSS_USB_24 D22
R177 10K_0402_5% 1 2
R187 10K_0402_5%
1 2
C361 20P_0402_50V8J @
1 2
R204 10K_0402_5%
1 2
R190 2.2K_0402_5%
1 2
R184 10K_0402_5%
1 2
R208 10K_0402_5%
1 2
R206 10K_0402_5%@
1 2
C363 1U_0603_10V4Z
1 2
L28 FBM-L11-321611-260-LMT_1206
12
C358 0.1U_0402_16V4Z
1 2
R178 4.7K_0402_5%
1 2
R211 33_0402_5%
1 2
R199 10K_0402_5%
1 2
R194 10K_0402_5%
1 2
C359 0.1U_0402_16V4Z
1 2
R18311.8K_0603_1% 1 2
R196 10K_0402_5%
1 2
R203 10K_0402_5%
1 2
C357 20P_0402_50V8J@
1 2
R200 10K_0402_5%
1 2
C351 1U_0603_10V4Z
1 2
L26 FBM-L11-321611-260-LMT_1206
12
T19 PAD
R185 10K_0402_5%
1 2
C360 0.1U_0402_16V4Z
1 2
R209 8.2K_0402_5%
1 2
R189 10K_0402_5%
1 2
C350 10U_0805_10V4Z
1 2
D7
CH751H-40_SC76
2 1
R556 10K_0402_5%@ 1 2
C362 10U_0805_10V4Z
1 2
R210 33_0402_5%
1 2
C353 0.1U_0402_16V4Z
1 2
R193 10K_0402_5%
1 2
R201 10K_0402_5%@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PD_D1
PD_D0
PD_D2
PD_D3
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15
PD_D4
PD_D5
PD_D6
PD_D7
PD_D[0..15]
PD_A0
PD_A1
PD_A2
PD_CS#3
PD_CS#1
PD_IOW#
PD_IOR#
PD_DACK#
PD_IRQA
PD_IORDY
PD_DREQ#
SD_SBA0
SD_SBA2
SD_SBA1
SD_SCS3#
SD_SCS1#
SD_SIOR#
SD_SIOW#
SD_DACK#
SD_IRQA
SD_IORDY
SD_DREQ#
SD_D0
SD_D2
SD_D1
SD_D3
SD_D4
SD_D5
SD_D6
SD_D7
SD_D8
SD_D10
SD_D9
SD_D11
SD_D15
SD_D14
SD_D13
SD_D12
SD_D[0..15]
PD_D[0..15] <24>
PD_IRQA <24>
PD_IORDY <24>
PD_A0 <24>
PD_A1 <24>
PD_A2 <24>
PD_CS#1 <24>
PD_CS#3 <24>
PD_IOR# <24>
PD_IOW# <24>
PD_DACK# <23,24>
PD_DREQ# <24>
SD_SBA0 <24>
SD_SBA1 <24>
SD_SBA2 <24>
SD_SCS1# <24>
SD_SCS3# <24>
SD_SIOR# <24>
SD_SIOW# <24>
SD_DACK# <24>
SD_IRQA <24>
SD_IORDY <24>
SD_DREQ# <24>
SD_D[0..15] <24>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
SB400-IDE/SATA
Custom
21 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
SECONDARY ATA 66/100
PRIMARY ATA 66/100
SB400
SERIAL ATA POWER
SERIAL ATA
U14C
CHS-215SB400-02_BGA564
SATA_TX0+
AK22
SATA_TX0-
AJ22
SATA_RX0-
AK21
SATA_RX0+
AJ21
SATA_TX1+
AK19
SATA_TX1-
AJ19
SATA_RX1-
AK18
SATA_RX1+
AJ18
SATA_TX2+
AK14
SATA_TX2-
AJ14
SATA_RX2-
AK13
SATA_RX2+
AJ13
SATA_TX3+
AK11
SATA_TX3-
AJ11
SATA_RX3-
AK10
SATA_RX3+
AJ10
SATA_CAL
AJ15
SATA_X1
AJ16
SATA_X2
AK16
SATA_ACT#
AK8
PLLVDD_SATA
AH15
XTLVDD_SATA
AH16
AVDD_SATA_1
AG10
AVDD_SATA_2
AG14
AVDD_SATA_3
AH12
AVDD_SATA_4
AG12
AVDD_SATA_5
AG18
AVDD_SATA_6
AG21
AVDD_SATA_7
AH18
AVDD_SATA_8
AG20
AVSS_SATA_1
AG9
AVSS_SATA_2
AF10
AVSS_SATA_3
AF11
AVSS_SATA_4
AF12
AVSS_SATA_5
AF13
AVSS_SATA_6
AF14
AVSS_SATA_7
AF15
AVSS_SATA_8
AF16
AVSS_SATA_9
AF17
AVSS_SATA_10
AF18
AVSS_SATA_11
AF19
AVSS_SATA_12
AF20
AVSS_SATA_13
AF21
AVSS_SATA_14
AF22
AVSS_SATA_15
AH9
AVSS_SATA_16
AG11
AVSS_SATA_17
AG15
AVSS_SATA_18
AG17
AVSS_SATA_19
AG19
AVSS_SATA_20
AG22
AVSS_SATA_21
AG23
AVSS_SATA_22
AF9
AVSS_SATA_23
AH17
AVSS_SATA_24
AH23
AVSS_SATA_25
AH13
AVSS_SATA_26
AH20
AVSS_SATA_27
AK9
AVSS_SATA_28
AJ12
AVSS_SATA_29
AK17
AVSS_SATA_30
AK23
AVSS_SATA_31
AH10
AVSS_SATA_32
AJ23
PIDE_IORDY AD30
PIDE_IRQ AE28
PIDE_A0 AD27
PIDE_A1 AC27
PIDE_A2 AD28
PIDE_DACK# AD29
PIDE_DRQ AE27
PIDE_IOR# AE30
PIDE_IOW# AE29
PIDE_CS1# AC28
PIDE_CS3# AC29
PIDE_D0 AF29
PIDE_D1 AF27
PIDE_D2 AG29
PIDE_D3 AH30
PIDE_D4 AH28
PIDE_D5 AK29
PIDE_D6 AK28
PIDE_D7 AH27
PIDE_D8 AG27
PIDE_D9 AJ28
PIDE_D10 AJ29
PIDE_D11 AH29
PIDE_D12 AG28
PIDE_D13 AG30
PIDE_D14 AF30
PIDE_D15 AF28
SIDE_IORDY V29
SIDE_IRQ T27
SIDE_A0 T28
SIDE_A1 U29
SIDE_A2 T29
SIDE_DACK# V30
SIDE_DRQ U28
SIDE_IOR# W29
SIDE_IOW# W30
SIDE_CS1# R27
SIDE_CS3# R28
SIDE_D0/GPIO15 V28
SIDE_D1/GPIO16 W28
SIDE_D2/GPIO17 Y30
SIDE_D3/GPIO18 AA30
SIDE_D4/GPIO19 Y28
SIDE_D5/GPIO20 AA28
SIDE_D6/GPIO21 AB28
SIDE_D7/GPIO22 AB27
SIDE_D8/GPIO23 AB29
SIDE_D9/GPIO24 AA27
SIDE_D10/GPIO25 Y27
SIDE_D11/GPIO26 AA29
SIDE_D12/GPIO27 W27
SIDE_D13/GPIO28 Y29
SIDE_D14/GPIO29 V27
SIDE_D15/GPIO30 U27
AVSS_SATA_33 AG13
AVSS_SATA_34 AH22
AVSS_SATA_35 AK12
AVSS_SATA_36 AH11
AVSS_SATA_37 AJ17
AVSS_SATA_38 AH14
AVSS_SATA_39 AH19
AVSS_SATA_40 AJ20
AVSS_SATA_41 AH21
AVSS_SATA_42 AJ9
AVSS_SATA_43 AG16
AVSS_SATA_44 AK15
AVSS_SATA_45 AK20
AVDD_CK
V5_VREF
+3VS
+1.8VS
+3VALW
+1.8VALW
+1.2V_HT
+1.8VS
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
SB400-Power/GND
Custom
22 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
V5_VREF (20mils)
AVDD_CK(40mils)
C374 0.1U_0402_16V4Z
1 2
C400 0.1U_0402_16V4Z
1 2
C388 0.1U_0402_16V4Z
1 2
C381 0.1U_0402_16V4Z
1 2
C382 0.1U_0402_16V4Z
1 2
C404 0.1U_0402_16V4Z
1 2
C391 0.1U_0402_16V4Z
1 2
C384 22U_1206_10V4Z
1 2
C403 10U_0805_10V4Z
1 2
C399 0.1U_0402_16V4Z
1 2
C406 0.1U_0402_16V4Z
1 2
C367 0.1U_0402_16V4Z
1 2
C393 0.1U_0402_16V4Z
1 2
R213
1K_0402_5%
1 2
D8
CH751H-40_SC76
2 1
C379 0.1U_0402_16V4Z
1 2
C389 0.1U_0402_16V4Z
1 2
C409 0.1U_0402_16V4Z
1 2
C387 0.1U_0402_16V4Z
1 2
C390 0.1U_0402_16V4Z
1 2
C385 0.1U_0402_16V4Z
1 2
C365 22U_1206_10V4Z
1 2
C370 0.1U_0402_16V4Z
1 2
SB400
POWER
U14D
CHS-215SB400-02_BGA564
VDDQ_1
A30
VDDQ_2
D30
VDDQ_3
E24
VDDQ_4
E25
VDDQ_5
J5
VDDQ_6
K1
VDDQ_7
K5
VDDQ_8
N5
VDDQ_9
P5
VDDQ_10
R1
VDDQ_11
U5
VDDQ_12
U26
VDDQ_13
U30
VDDQ_14
V5
VDDQ_15
V26
VDDQ_16
Y1
VDDQ_17
Y26
VDDQ_18
AA5
VDDQ_19
AA26
VDDQ_20
AB5
VDDQ_21
AC30
VDDQ_22
AD5
VDDQ_23
AD26
VDDQ_24
AE1
VDDQ_25
AE5
VDDQ_26
AE26
VDDQ_27
AF6
VDDQ_28
AF7
VDDQ_29
AF24
VDDQ_30
AF25
VDDQ_31
AK1
VDDQ_32
AK4
VDDQ_33
AK26
VDDQ_34
AK30
VDD_1
M12
VDD_2
M13
VDD_3
M18
VDD_4
M19
VDD_5
N12
VDD_6
N13
VDD_7
N18
VDD_8
N19
VDD_9
V12
VDD_10
V13
VDD_11
V18
VDD_12
V19
VDD_13
W12
VDD_14
W13
VDD_15
W18
VDD_16
W19
S5_3.3V_1
A3
S5_3.3V_2
A7
S5_3.3V_3
E6
S5_3.3V_4
E7
S5_3.3V_5
E1
S5_3.3V_6
F5
S5_1.8V_1
E9
S5_1.8V_2
E10
S5_1.8V_3
E20
S5_1.8V_4
E21
USB_PHY_1.8V_1
E13
USB_PHY_1.8V_2
E14
USB_PHY_1.8V_3
E16
USB_PHY_1.8V_4
E17
CPU_PWR
C30
V5_VREF
AG6
AVDDCK
A24
AVSSCK
B24
VSS_1
A4
VSS_2
A8
VSS_3
A29
VSS_4
B28
VSS_5
C1
VSS_6
E5
VSS_7
E8
VSS_8
E11
VSS_9
E12
VSS_10
E15
VSS_11
E18
VSS_12 E19
VSS_13 E22
VSS_14 E23
VSS_15 E26
VSS_16 E30
VSS_17 F1
VSS_18 F4
VSS_19 G5
VSS_20 H5
VSS_21 J1
VSS_22 J4
VSS_23 K4
VSS_24 L5
VSS_25 M5
VSS_26 P1
VSS_27 R5
VSS_28 R26
VSS_29 T5
VSS_30 T26
VSS_31 T30
VSS_32 W1
VSS_33 W5
VSS_34 W26
VSS_35 Y5
VSS_36 AB26
VSS_37 AB30
VSS_38 AC5
VSS_39 AC26
VSS_40 AD1
VSS_41 AF5
VSS_42 AF8
VSS_43 AF23
VSS_44 AF26
VSS_45 AG8
VSS_46 AJ1
VSS_47 AJ24
VSS_48 AJ30
VSS_49 AK5
VSS_50 AK25
VSS_51 M14
VSS_52 M15
VSS_53 M16
VSS_54 M17
VSS_55 N14
VSS_56 N15
VSS_57 N16
VSS_58 N17
VSS_59 P12
VSS_60 P13
VSS_61 P14
VSS_62 P15
VSS_63 P16
VSS_64 P17
VSS_65 P18
VSS_66 P19
VSS_67 R12
VSS_68 R13
VSS_69 R14
VSS_70 R15
VSS_71 R16
VSS_72 R17
VSS_73 R18
VSS_74 R19
VSS_75 T12
VSS_76 T13
VSS_77 T14
VSS_78 T15
VSS_79 T16
VSS_80 T17
VSS_81 T18
VSS_82 T19
VSS_83 U12
VSS_84 U13
VSS_85 U14
VSS_86 U15
VSS_87 U16
VSS_88 U17
VSS_89 U18
VSS_90 U19
VSS_91 V14
VSS_92 V15
VSS_93 V16
VSS_94 V17
VSS_95 W14
VSS_96 W15
VSS_97 W16
VSS_98 W17
L29
FBM-L11-321611-260-LMT_1206
12
C397 22U_1206_10V4Z
1 2
C416 0.1U_0402_16V4Z
1 2
C394 0.1U_0402_16V4Z
1 2
C396 0.1U_0402_16V4Z
1 2
C407 0.1U_0402_16V4Z
12
C375 0.1U_0402_16V4Z
1 2
C412
1U_0603_10V4Z
1
2
C376 0.1U_0402_16V4Z
1 2
C401 0.1U_0402_16V4Z
1 2
C383 22U_1206_10V4Z
1 2
C402 0.1U_0402_16V4Z
1 2
C413
0.1U_0402_16V4Z
1
2
C415 1U_0603_10V4Z
1 2
C405 0.1U_0402_16V4Z
1 2
C378 0.1U_0402_16V4Z
1 2
C411 0.1U_0402_16V4Z
1 2
C408 0.1U_0402_16V4Z
1 2
C395 0.1U_0402_16V4Z
1 2
C368 0.1U_0402_16V4Z
1 2
C373 0.1U_0402_16V4Z
1 2
C386 0.1U_0402_16V4Z
1 2
C366 0.1U_0402_16V4Z
1 2
C371 0.1U_0402_16V4Z
1 2
C398 0.1U_0402_16V4Z
1 2
C369 0.1U_0402_16V4Z
1 2
C414 10U_0805_10V4Z
1 2
C380 0.1U_0402_16V4Z
1 2
C372 0.1U_0402_16V4Z
1 2
C410 0.1U_0402_16V4Z
1 2
C392 0.1U_0402_16V4Z
1 2
C377 0.1U_0402_16V4Z
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_MINI
CLK_PCI_EC
CLK_PCI6
CLK_PCI8
CLK_PCI_SIO_R
SB_SPDIFO
CLK_PCI7
AC97_SDOUT
RTC_CLK
AUTO_ON#
PD_DACK#
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
CLK_PCI_LAN
CLK_PCI8<19>
CLK_PCI_SIO_R<19,35>
CLK_PCI_MINI<19,30>
RTC_CLK<19> SB_SPDIFO<20,40>
AUTO_ON#<19> AC97_SDOUT<20,31>
CLK_PCI7<19>
CLK_PCI_EC<19,37,38>
CLK_PCI6<19>
PD_DACK#<21,24>
PCI_AD30<19,25,29,30> PCI_AD31<19,25,29,30>
PCI_AD29<19,25,29,30> PCI_AD28<19,25,29,30>
PCI_AD26<19,25,29,30>
PCI_AD24<19,25,29,30>
PCI_AD27<19,25,29,30>
PCI_AD25<19,25,29,30>
PCI_AD23<19,25,29,30>
CLK_PCI_LAN<19,29>
+3VALW +3VS +3VALW +3VS +3VS +3VS +3VS +3VS +3VS +3VS
+3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Hardware Trap
Custom
23 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
INTERNAL
RTC
USE
DEBUG
STRAPS
CLK_PCI_MINI
CPU I/F = K8
AUTO
PWR
ON
EXTERNAL
RTC (NOT
SUPPORTED
W/ IT8712 )
CLK_PCI6
SIO 24MHz
PCI_CLK8
ROM TYPE
PULL
HIGH
CLK_PCI_SIO
USB PHY
PWRDOWN
DISABLE
DEFAULT
PCIE_CM_SET
High
SIO 48MHz
DEFAULT
DEFAULT
48MHz OSC
MODE
MANUAL
PWR ON
PULL
LOW
DEFAULT
CLK_PCI_EC
PCIE_CM_SET
LOW
RTC_CLK
DEFAULT
L,L = FWH ROM
H,H = PCI ROM
AC97_SDOUT SB_SPDIFO
IGNORE
DEBUG
STRAPS
48MHz XTAL
MODE
CLK_PCI7
L,H = NORMAL LPC ROM
DEFAULT DEFAULT
CPU I/F = P4
DEFAULT
AUTO_ON#
H,L = PMC LPC ROM
USB PHY
PWRDOWN
ENABLE
ACPWRON
REQUIRED STRAPS
PCI_AD23
DEBUG STRAPS
PCI_AD25 PCI_AD24
USE EEPROM
PCIE STRAPS
USE DEFAULT
PCIE STRAPS
DEFAULT
PCI_AD29
BYPASS
ACPI
BCLK
USE
ACPI
BCLK
DEFAULT
PD_DACK#
USE IDE
PLL
USE
LONG
RESET
USE
SHORT
RESET
USE PCI
PLL
DEFAULT
BYPASS IDE
PLL
PULL
HIGH
PCI_AD31 PCI_AD30
DEFAULT
BYPASS
PCI PLL
PCI_AD27 PCI_AD26
PULL
LOW
PCI_AD28
DEFAULT
INTERNAL
48MHz
EXTERNAL
48MHz
CLK_PCI_LAN
RESERVEDRESERVED RESERVED RESERVED RESERVED
DEFAULT
PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5
R225
10K_0402_5%@
12
R239
10K_0402_5%
12
R252
10K_0402_5%
12
R244
10K_0402_5%
12
R226
10K_0402_5%
12
R235
10K_0402_5%
12
R253
10K_0402_5%
12
R217
10K_0402_5%
@
12
R218
10K_0402_5%
12
R249
10K_0402_5%
@
12
R228
10K_0402_5%
@
12
R240
10K_0402_5%
@
12
R251
10K_0402_5%
12
R254
10K_0402_5%
@
12
R247
10K_0402_5%
@
12
R233
10K_0402_5%
@
12
R234
10K_0402_5%@
12
R245
1K_0402_5%
@
12
R220
10K_0402_5%
12
R224
10K_0402_5%
@
12
R223
10K_0402_5%
12
R215
10K_0402_5%
@
12
R243
10K_0402_5%
@
12
R236
10K_0402_5%
12
R227
10K_0402_5%
12
R222
10K_0402_5%
@
12
R214
10K_0402_5%
12
R241
10K_0402_5%
@
12
R216
10K_0402_5%
12
R232
10K_0402_5%
12
R231
10K_0402_5%
@
12
R229
10K_0402_5%
@
12
R238
10K_0402_5%
12
R250
10K_0402_5%
12
R221
10K_0402_5%
12
R230
10K_0402_5%
@
12
R237
10K_0402_5%
12
R242
10K_0402_5%
@
12
R246
10K_0402_5%
@
12
R248
10K_0402_5%
@
12
R219
10K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PD_D[0..15]
SD_D12
SD_D8
SD_D11
SD_DREQ#
SD_SIOR#
SD_D13
SD_D15
SD_D9
SD_D10
SD_D14
SD_DACK#
PDIAG#
SD_SCS3#
SD_SBA2
CDROM_R
HDD_LED#
CD_LED#
PD_D7
PD_D5
PD_D4
PD_D6
PD_D3
NB_RST#
PD_D1
PD_D0
PD_D2
HDD_LED#
PD_A1
PD_A0
PD_CS#1
PD_DACK#
PD_IOW#
PD_DREQ#
PD_IRQA
PD_IORDY
PD_IOR#
SD_D[0..15]
PD_D7
PD_D5
PD_D4
PD_D6
PD_D3
NB_RST#
PD_D1
PD_D0
PD_D2
PD_A1
PD_A0
PD_CS#1
PD_DACK#
PD_IOW#
PD_DREQ#
PD_IRQA
PD_IORDY
PD_IOR#
HDD_LED#
PD_D8
PD_D13
PD_D12
PD_D11
PD_D15
PD_D14
PD_D9
PD_D10
PCSEL
PD_A2
PD_CS#3
PD_D8
PD_D13
PD_D12
PD_D11
PD_D15
PD_D14
PD_D9
PD_D10
PCSEL_S
PD_A2
PD_CS#3
PD_IOW# PD_IOR#
SD_SIOW# SD_SIOR#
CD_AGND
NB_RST#
SD_D7
SD_D5
SD_D6
SD_D2
SD_D1
SD_D4
SD_D3
SD_D0
CD_LED#
SD_SBA1
SD_SCS1#
SD_SBA0
SD_IORDY
SD_SIOW#
SD_IRQA
SEC_CSEL
CDROM_L
PDIAG PDIAG
ACT_LED#
PD_D[0..15]<21>
CDROM_R <31>
SD_DREQ# <21>
SD_SIOR# <21>
SD_DACK# <21>
SD_SBA2 <21>
SD_SCS3# <21>
NB_RST#<13,19,28,35>
PD_DREQ#<21>
PD_IOR#<21> PD_IOW#<21>
PD_IRQA<21> PD_DACK#<21,23>
PD_CS#1<21> PD_A0<21> PD_A1<21>
PD_IORDY<21>
SD_D[0..15]<21>
PD_A2 <21>
PD_CS#3 <21>
NB_RST#<13,19,28,35> CD_AGND<31> CDROM_L<31>
SD_SIOW#<21>
SD_IRQA<21>
SD_SCS1#<21> SD_SBA0<21> SD_SBA1<21>
SD_IORDY<21>
ACT_LED <36>
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS +5VS
+5VS
+5VS +5VS
+5VS
+5VS
+5VS
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
HDD/CDROM
Custom
24 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
Main HDD
Pin4 of CD_ROM connector is NC
if use Pioneer ODD(DVD Dual
DVR-K12TBC/DVR-K13TBC)
W=80mils
Second HDD
EMI
EMI
07/11 for defined by different ODD vender.
R258
100K_0402_5%
12
C425
10U_0805_10V4Z
1
2
R572
10K_0402_5%
@
1 2
JP12
SUYIN_200138FR044G213ZL
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
GND
45 GND 46
D10
CH751H-40_SC76
21
C424
0.1U_0402_16V4Z
2HDD@
1
2
C429
0.1U_0402_16V4Z
12
+
C719
100U_C_4VM
@
1
2
C725
1000P_0402_50V7K
@
1
2
C418
1U_0603_10V4Z
1
2
R256
10K_0402_5%
2HDD@
1 2
C423
0.1U_0402_16V4Z
2HDD@
1
2
R260 100K_0402_5%@
1 2
C417
10U_0805_10V4Z
1
2
C427
0.1U_0402_16V4Z
1
2
C726
1000P_0402_50V7K
@
1
2R255
470_0402_5%
1 2
+
C720
100U_C_4VM
@
1
2
C727
1000P_0402_50V7K
@
1
2
C422
1U_0603_10V4Z
2HDD@
1
2
JP11
SUYIN_200138FR044G213ZL
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
GND
45 GND 46
C428
0.1U_0402_16V4Z
1
2
C419
0.1U_0402_16V4Z
1
2
C421
10U_0805_10V4Z
2HDD@
1
2
C728
1000P_0402_50V7K
@
1
2
R262
470_0402_5%
12
R261
100K_0402_5%
@
1 2
JP13
SUYIN_800059MR050S119ZL
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
45
45 46 46
47
47 48 48
49
49 50 50
GND
51 GND 52
GND 54
GND
53
C426
1U_0603_10V4Z
1
2
D9
CH751H-40_SC76
21
C420
0.1U_0402_16V4Z
1
2
R257
100K_0402_5%
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_AD31
PCI_AD5
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
X_IN
X_OUT
X_IN
X_OUT
PCI_PAR
PCI_FRAME#
PCI_TRDY#
PCI_IRDY#
PCI_STOP#
PCI_DEVSEL#
PCI_PERR#
PCI_SERR#
PCI_REQ#2
PCI_GNT#2
PCI_RST#
PCI_PIRQE#
SIRQ
CARD_LED
PCI_AD20
MSD3_SDD3_SMD3
MSCLK_SDCLK_SMELWP#
SDD0_SMD4
SDD1_SMD5
SDD2_SMD6
SDD3_SMD7
SDCMD_SMALE
SM_RB#
SD_CD#
MS_CD#
SM_CD#
SDWP#_SMCE#
SMCLE
PHY_TEST
+VDDPLL
CNA
PCI_PIRQH#
SDCLK_SMRE#
CLK_48M_CB
XTPA0-
XTPA0+
XTPBIAS0
XTPB1+
XTPB0-
XTPB0+
XTPBIAS1
CPS
XTPB1-
XTPA1+
XTPA1-
XTPA1-
XTPA1+
XTPB1+
XTPB1-
XTPBIAS1
CLK_PCI_PCM
PCM_SPK
MSD2_SDD2_SMD2
MSD1_SDD1_SMD1
MSD0_SDD0_SMD0
MC_PWRON#
CLK_48M_CB
+VDDPLL
MSBS_SDCMD_SMWE#
PCI_PAR <19,29,30>
PCI_PERR# <19,29,30>
PCI_SERR# <19,29,30>
PCI_FRAME# <19,29,30>
PCI_TRDY# <19,29,30>
PCI_IRDY# <19,29,30>
PCI_STOP# <19,29,30>
PCI_REQ#2 <19>
PCI_GNT#2 <19>
CLK_PCI_PCM <19>
PCI_RST# <19,27,29,30,35,37,38>
PCI_DEVSEL# <19,29,30>
PCI_PIRQE# <19>
SIRQ <19,35,37,38>
PCI_CBE#[0..3] <19,29,30>
PCI_AD[0..31] <19,23,29,30>
PCI_PIRQH# <19>
PCM_SPK <31>
VCCD1#<27>
CARD_LED <26,36>
XTPA1+<40> XTPA1-<40> XTPB1+<40> XTPB1-<40>
SD_CD#<26> MS_CD#<26> SM_CD#<26>
MC_PWRON#<26>
MSCLK_SDCLK_SMELWP#<26>
MSD3_SDD3_SMD3<26> MSD2_SDD2_SMD2<26> MSD1_SDD1_SMD1<26> MSD0_SDD0_SMD0<26>
SDCMD_SMALE<26> SDD0_SMD4<26> SDD1_SMD5<26> SDD2_SMD6<26> SDD3_SMD7<26> SDWP#_SMCE#<26>
SMCLE<26>
CLK_48M_CB<16>
SDCLK_SMRE#<26>
SM_RB#<26>
MSBS_SDCMD_SMWE#<26>
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
PCI7411(1/3)
Custom
25 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
when VR_EN# is low, internal
regulator is actived
put C445 as close to
controller as possible
CLOSE TO CHIP
07/04 for EMI
C443
1U_0603_10V4Z
7411@
1
2
C444
220P_0603_50V8J
7411@
1
2
C442
10P_0402_25V8K
1 2
C432
0.01U_0402_16V7K
7411@
1
2
R295
56.2_0603_1%
7411@
12
C447
10P_0402_50V8J
7411@
R464
4.7K_0402_5% 7411@
1 2
R265
10K_0402_5%
7411@
12
R293
56.2_0603_1%
7411@ 12
R296
1M_0402_5%
7411@
C435
10U_0805_10V4Z
7411@
1
2
JP15
SUYIN_020204FR004S506ZL
11
22
33
44
GND1 5
GND2 6
GND3 7
GND4 8
R291 10K_0402_5%
7411@1 2
R279
10_0402_5%
1 2
PCI7411
U17B
PCI7411GHK_PBGA288
SPKROUT L7
SUSPEND# R2
VSSPLL
P14
VSSPLL
T17
VDPLL_15 T18
VR_PORT M19
VR_PORT H1
VCCP W10
VCCP W3
VDPLL_33 V19
AGND
N12
AGND
U14
AGND
U16
AVDD R13
AVDD R14
AVDD V17
AD31 U2
AD30 V1
AD29 V2
AD28 U3
AD27 W2
AD26 V3
AD25 U4
AD24 V4
AD23 V5
AD22 U5
AD21 R6
AD20 P6
AD19 W6
AD18 V6
AD17 U6
AD16 R7
AD15 V9
AD14 U9
AD13 R9
AD12 N9
AD11 V10
AD10 U10
AD9 R10
AD8 N10
AD7 V11
AD6 U11
AD5 R11
AD4 W12
AD3 V12
AD2 U12
AD1 N11
AD0 W13
C/BE3# W4
C/BE2# W7
C/BE1# W9
C/BE0# W11
PAR P9
FRAME# V7
TRDY# R8
IRDY# U7
STOP# W8
DEVSEL# N8
IDSEL W5
PERR# V8
SERR# U8
REQ# U1
GNT# T2
MFUNC0 N3
MFUNC1 M5
MFUNC2 P1
MFUNC3 P2
MFUNC4 P3
MFUNC5 N5
MFUNC6 R1
PCICLK P5
PCIRST# R3
GRST# T1
RI_OUT#/PME# T3
CLK_48
M1
PHY_TEST_MA
R17
MC_PWR_CTRL_0
F1
MC_PWR_CTRL_1
F2
SD_CD#
E3
MS_CD#
F5
SM_CD#
F6
MS_CLK/SD_CLK/SM_EL_WP#
G5
MS_BS/SD_CMD/SM_WE#
F3
MS_DATA3/SD_DAT3/SM_D3
H5
MS_DATA2/SD_DAT2/SM_D2
G3
MS_DATA1/SD_DAT1/SM_D1
G2
MS_SDIO(DATA0)/SD_DAT0/SM_D0
G1
SD_CLK/SM_RE#/SC_GPIO1
J5
SD_CMD/SM_ALE/SC_GPIO2
J3
SD_DAT0/SM_D4/SC_GPIO6
H3
SD_DAT1/SM_D5/SC_GPIO5
J6
SD_DAT2/SM_D6/SC_GPIO4
J1
SD_DAT3/SM_D7/SC_GPIO3
J2
SD_WP/SM_CE#
H7
SM_CLE/SC_GPIO0
J7
SM_R/B
K1
SM_PHYS_WP#/SC_FCB
K2
RSVD
L2
RSVD
K5
RSVD
K3
RSVD
K7
RSVD
L1
RSVD
L3
RSVD
L5
TEST0
P12
NC
W17
RSVD
T19
R0
U18
R1
U19
TPBIAS0
U15
TPA0P
V15
TPA0N
W15
TPB0P
V14
TPB0N
W14
TPBIAS1
U17
TPA1P
V18
TPA1N
W18
TPB1P
V16
TPB1N
W16
CPS
M11
CNA
P15
XO
R19
XI
R18
PC0(TEST1)
R12
PC1(TEST2)
U13
PC2(TEST3)
V13
SCL M3
SDA M2
VR_EN# H2
R284
56.2_0603_1%
7411@
12
R294
56.2_0603_1%
7411@
12
R285
4.7K_0402_5%
7411@
1 2
R281
6.34K_0402_1%
7411@
1 2
R274 220_0402_5%@1 2
R289 220_0402_5%7411@1 2
C440
10P_0402_25V8K
@
1
2
C433
0.01U_0402_16V7K
7411@
1
2
C446
1U_0603_10V4Z
7411@
1
2
R297
5.1K_0603_1%
7411@
12
X1
24.576MHZ_16P_XSL024576FG1H
7411@
12
R275
100_0402_5%
7411@
1 2
R282 4.7K_0402_5%
7411@
1 2
R287
10K_0402_5%
7411@
1 2
R292
56.2_0603_1%
7411@ 12
R272
10K_0402_5%
7411@
1 2
C448
10P_0402_50V8J
7411@
R9
0_0402_5%
7411@
1 2
R276
4.7K_0402_5%
7411@
1 2
C445
0.1U_0402_16V4Z
7411@
1 2
R288
5.1K_0603_1%
7411@
12
R271
10_0402_5%
@
12
R283
56.2_0603_1%
7411@
12
R290 220_0402_5%
7411@1 2
R286 4.7K_0402_5%
7411@
1 2
C437 0.1U_0402_16V4Z
7411@
1
2
C430
10U_0805_10V4Z
7411@
1
2
R278
56.2_0603_1%
7411@
12
C449
220P_0603_50V8J
7411@
1
2
R277
56.2_0603_1%
7411@
12
R273 220_0402_5%7411@ 1 2
C434
1U_0603_10V4Z
7411@
1
2
C438 0.1U_0402_16V4Z7411@
1
2
C431
1U_0603_10V4Z
7411@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CARD_LED
SD_CD#
SM_CD#
SDWP#_SMCE#
SM_RB#
MSD3_SDD3_SMD3
MSCLK_SDCLK_SMELWP#
MSBS_SDCMD_SMWE#
MS_CD#
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
SDD0_SMD4
SDD1_SMD5
SDD3_SMD7
SDD2_SMD6
SDWP#_SMCE#
SD_CD#
SM_CD#
MSBS_SDCMD_SMWE#
SDCMD_SMALE
SMCLE
SM_PHYS_WP#
SM_CD#
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSCLK_SDCLK_SMELWP#
MC_PWRON#
SD_CD#
MS_CD#
MC_PWRON#
SM_CTRL#
MC_PWRON#
SM_RB#
SDCLK_SMRE#
SDWP#_SMCE#
MSD3_SDD3_SMD3
MSD2_SDD2_SMD2
MSD1_SDD1_SMD1
MSD0_SDD0_SMD0
MSBS_SDCMD_SMWE#
MSCLK_SDCLK_SMELWP#
SDWP#_SMCE#<25>
SM_RB#<25>
CARD_LED<25,36>
MC_PWRON#<25>
SD_CD# <25>
SM_CD# <25>
MSD0_SDD0_SMD0<25> MSD1_SDD1_SMD1<25> MSD2_SDD2_SMD2<25> MSD3_SDD3_SMD3<25> SDD0_SMD4<25> SDD1_SMD5<25> SDD2_SMD6<25> SDD3_SMD7<25>
MSCLK_SDCLK_SMELWP#<25>
SDCMD_SMALE<25>
SMCLE<25>
MS_CD#<25>
SDCLK_SMRE#<25>
MSBS_SDCMD_SMWE#<25>
SDWP#_SMCE#<25>
+3VS
+VCC_5IN1
+VCC_SM
+VCC_5IN1
+VCC_SM
+VCC_5IN1
+VCC_SM
+VCC_SM+VCC_5IN1+3VS
+VCC_SM
+3VS +VCC_5IN1
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
PCI7411(2/3)
Custom
26 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
07/11 change net name
07/11 change net name
07/11 change net name
07/11 change net name
07/25 for XD log
8/23 Relocate Damping resistor to
solve Sandisk Card issue
G
D
S
Q51
2N7002_SOT23
7411@
2
13
R264
47K_0603_5%
7411@
12
R573
10K_0402_1%
@
1 2
R551
47K_0603_5%
7411@
12
R46122_0402_5% 7411@
12
R546
100K_0402_5%
7411@
1 2
U51
AATI4610AIGV-T1_SOT23-5
@
OUT 1
ON# 4
SET
3
IN
5
GND 2
R269
330_0402_5%
7411@
1 2
C690
0.1U_0402_16V4Z
7411@
1
2
R46022_0402_5% 7411@
12
G
D
S
Q12
2N7002_SOT23
7411@
2
13
D31
CH751H-40_SC76
@
2 1
C687
0.1U_0402_16V4Z
7411@
1
2
G
D
S
Q50
SI2301BDS_SOT23
7411@
2
13
D33
CH751H-40_SC76
7411@
21
C436
10U_0805_10V4Z
7411@
1
2
R45822_0402_5% 7411@
12
C698
10U_0805_10V4Z
7411@
1
2
R46222_0402_5% 7411@
12
5 IN 1 CONN
JP14
TAITN_R007-N3P-15-S
SM_WP-IN / XD_WP-IN
35
SM-D4 / XD-D4
21
MS-DATA3 18
MS-DATA0 15
SD-DAT2 12
SD-DAT0 7
SD-CMD 10
MS-DATA1 14
SM-D6 / XD-D6
23
SD-DAT3 11
SD-DAT1 6
SD-WP-SW 5
#SM-ALE / XD-ALE
37
SM-D0
34
SD_CLK 8
SM-D2 / XD-D2
32
SM_-VCC / XD_-VCC
29
MS-INS 17
MS-DATA2 16
MS-SCLK 19
SM-LVD
25
#SM_-RE / XD_-RE
27 MS-BS 13
SM-D5 / XD-D5
22
#SM_-CD
30
SM-D7 / XD-D7
24
SM-D1 / XD-D1
33
#SM_-CE / XD_-CE
28
#SM_R/-B / XD_R/-B
26
SM-D3 / XD-D3
31
SD-VCC 9
#SM_-WE / XD_-WE
36
MS-VCC 20
SM-CD-COM
2
SM-CLE / XD-CLE
38
GND 1
SD-CD-SW 42
SD-CD-COM 41
XD-VCC 40
XD-CD 39
SM-CD-SW
3
NC 4
SM-WP-SW
43
GND 44
D30
CH751H-40_SC76
@
2 1
R457
100K_0402_5%
@
1 2
R45922_0402_5% 7411@
12
R544
100K_0402_5%
7411@
1 2
R26633_0402_5% 7411@
12
C689
0.1U_0402_16V4Z
7411@
1
2
C439
0.1U_0402_16V4Z
7411@
1
2
C688
0.1U_0402_16V4Z
7411@
1
2
R549
10K_0402_5%
1 2
R550
10K_0402_5%
1 2
D32
CH751H-40_SC76
7411@
21
G
D
S
Q11
SI2301BDS_SOT23
7411@
2
13
R456
0_0402_5%
7411@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPS_DATA
TPS_CLK
TPS_LATCH
S1_A13
S1_A23
S1_A22
S1_A15
S1_A20
S1_A21
S1_A19
S1_A14
S1_WAIT#
S1_INPACK#
S1_WE#
S1_BVD1
S1_WP
S1_RDY#
S1_RST
S1_BVD2
S1_CD1#
S1_CD2#
S1_VS1
S1_VS2
S1_A12
S1_D14
S1_REG#
S1_A8
S1_CE1#
S1_D2
S1_A18
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_A9
S1_A11
S1_A10
S1_OE#
S1_D13
S1_D10
S1_D9
S1_D1
S1_D8
S1_D15
S1_D7
S1_IOWR#
S1_D6
S1_D12
S1_D5
S1_IORD#
S1_D11
S1_D4
S1_D3
S1_CE2#
S1_D0
S1_A0
S1_A1
S1_A2
S1_A16 S1_CLK
S1_CD1# S1_CD2#
PCI_RST#
TPS_DATA
TPS_DATA
TPS_LATCH
TPS_CLK
TPS_CLK
TPS_LATCH
VCCD1#
S1_VS2
S1_BVD1
S1_BVD2
S1_D14
S1_WAIT#
S1_CE2#
S1_D15
S1_A19
S1_A24
S1_INPACK#
S1_A21
S1_A23
S1_A20
S1_IORD#
S1_VS1
S1_CD2#
S1_D9
S1_A25
S1_A17
S1_CD1#
S1_D10
S1_IOWR#
S1_D11
S1_D13
S1_A18
S1_A22
S1_D12
S1_RST
S1_D8
S1_REG#
S1_A3
S1_D5
S1_A12
S1_A6
S1_D0
S1_A4
+S1_VCC
S1_WE#
S1_D6
S1_A1
S1_D4
S1_A8
S1_A13
+S1_VPP
S1_A10
S1_A16
S1_A15
S1_D3
S1_A9
S1_D7
S1_D1
S1_OE#
S1_A7
S1_CE1#
S1_RDY#
S1_WP
S1_D2
S1_A5
S1_A11
S1_A0
S1_A14
S1_A2
PCI_RST#<19,25,29,30,35,37,38>
VCCD1# <25>
+3VS+S1_VCC
+3VS +3VS
+S1_VCC +5VS
+S1_VCC
+3VS
+S1_VPP
+5VS
+3VS
+S1_VPP
+S1_VCC
+S1_VCC
+S1_VPP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
PCI7411(3/3)
Custom
27 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
CardBus Power Switch
close to card bus conn
C454
0.01U_0402_16V7K
7411@
1
2
C461
4.7U_0805_10V4Z
7411@
1 2
U18
SNP1X21DBR SSOP-24 7411@
5V 1
5V 2
DATA
3
CLOCK
4
LATCH
5
NC8 6
12V 7
AVPP
8
AVCC
9
AVCC
10 GND 11
RESET#
12
NC4 24
NC5 23
NC6 22
SHDN#
21
12V 20
NC0
19
NC2
18 NC1
17
NC7 16
OC#
15 NC3 14
3.3V 13
C452
0.1U_0402_16V4Z
7411@
1
2
C459
0.01U_0402_16V7K
7411@
1
2
C471
10P_0402_50V8J
7411@
U47
TPS2211AIDBR_SSOP16
@
VCCD0 1
VCCD1 2
3.3V
3
3.3V
4
5V
5
5V
6
GND
7
OC 8
12V
9
VPP 10
VCC 11
VCC 12
VCC 13
VPPD1 14
VPPD0 15
SHDN
16
C453
0.01U_0402_16V7K
7411@
1
2
C450
1U_0603_10V4Z
7411@
1
2
C460
0.1U_0402_16V4Z
7411@
1 2
C468
0.1U_0402_16V4Z
7411@
1 2
PCI 7411
U17A
PCI7411GHK_PBGA288
7411@
A_CRST#/A_RESET
A6
A_CAUDIO/A_BVD2(SPKR#)
A2
A_USB_EN#
E2
B_USB_EN#
E1
A_CAD31/A_D10
D1
A_CAD30/A_D9
C1
A_CAD29/A_D1
D3
A_CAD28/A_D8
C2
A_CAD27/A_D0
B1
A_CAD26/A_A0
B4
A_CAD25/A_A1
A4
A_CAD24/A_A2
E6
A_CAD23/A_A3
B5
A_CAD22/A_A4
C6
A_CAD21/A_A5
B6
A_CAD20/A_A6
G9
A_CAD19/A_A25
C7
A_CAD18/A_A7
B7
A_CAD17/A_A24
A7
A_CAD16/A_A17
A10
A_CAD15/A_IOWR#
E11
A_CAD14/A_A9
G11
A_CAD13/A_IORD#
C11
A_CAD12/A_A11
B11
A_CAD11/A_OE#
C12
A_CAD10/A_CE2#
B12
A_CAD9/A_A10
A12
A_CAD8/A_D15
E12
A_CAD7/A_D7
C13
A_CAD6/A_D13
F12
A_CAD5/A_D6
A13
A_CAD4/A_D12
C14
A_CAD3/A_D5
E13
A_CAD2/A_D11
A14
A_CAD1/A_D4
B14
A_CAD0/A_D3
E14
A_CC/BE3#/A_REG#
C5
A_CC/BE2#/A_A12
F9
A_CC/BE1#/A_A8
B10
A_CC/BE0#/A_CE1#
G12
A_CPAR/A_A13
G10
A_CFRAME#/A_A23
C8
A_CTRDY#/A_A22
A8
A_CIRDY#/A_A15
B8
A_CSTOP#/A_A20
A9
A_CDEVSEL#/A_A21
C9
A_CBLOCK#/A_A19
E10
A_CPERR#/A_A14
F10
A_CSERR#/A_WAIT#
B3
A_CREQ#/A_INPACK#
E7
A_CGNT#/A_WE#
B9
A_CSTSCHG/A_BVD1(STSCHG/RI)
B2
A_CCLKRUN#/A_WP(IOIS16)
C3
A_CCLK/A_A16
E9
A_CINT#/A_READY(IREQ)
C4
A_CCD1#/A_CD1#
C15
A_CCD2#/A_CD2#
E5
A_CVS1/A_VS1#
A3
A_CVS2/A_VS2#
E8
A_CRSVD/A_D14
B13
A_CRSVD/A_D2
D2
A_CRSVD/A_A18
C10
GND
G7
GND
G8
GND
G13
GND
H13
GND
J9
GND
J10
GND
J11
GND
K9
GND
K10
GND
K11
GND
L8
GND
L9
GND
L10
GND
L11
GND
L12
GND
M8
VCCA A5
VCCA A11
VCC H8
VCC H9
VCC H10
VCC H11
VCC H12
VCC J8
VCC M7
VCC J12
VCC M9
VCC M10
VCC M12
VCC K8
VCC K12
VCC N7
RSVD D19
RSVD K19
DATA N1
CLOCK L6
LATCH N2
RSVD B15
RSVD A16
RSVD B16
RSVD A17
RSVD C16
RSVD D17
RSVD C19
RSVD D18
RSVD E17
RSVD E19
RSVD G15
RSVD F18
RSVD H14
RSVD H15
RSVD G17
RSVD K17
RSVD L13
RSVD K18
RSVD L15
RSVD L17
RSVD L18
RSVD L19
RSVD M17
RSVD M14
RSVD M15
RSVD N19
RSVD N18
RSVD N15
RSVD M13
RSVD P18
RSVD P17
RSVD P19
RSVD F15
RSVD G18
RSVD K14
RSVD M18
RSVD K13
RSVD G19
RSVD H17
RSVD J13
RSVD J17
RSVD H19
RSVD J19
RSVD J18
RSVD B18
RSVD E18
RSVD J15
RSVD F14
RSVD A18
RSVD H18
RSVD B19
RSVD F17
RSVD C17
RSVD N13
RSVD B17
RSVD C18
RSVD F19
RSVD N17
RSVD A15
RSVD K15
SANTA_130609-1_LT
JP16
GND 1
DATA3 2
DATA4 3
DATA5 4
DATA6 5
DATA7 6
CE1# 7
ADD10 8
OE# 9
ADD11 10
ADD9 11
ADD8 12
ADD13 13
ADD14 14
WE# 15
READY 16
VCC 17
VPP 18
ADD16 19
ADD15 20
ADD12 21
ADD7 22
ADD6 23
ADD5 24
ADD4 25
ADD3 26
ADD2 27
ADD1 28
ADD0 29
DATA0 30
DATA1 31
DATA2 32
WP 33
GND 34
GND 35
CD1# 36
DATA11 37
DATA12 38
DATA13 39
DATA14 40
DATA15 41
CE2# 42
VS1# 43
IORD# 44
IOWR# 45
ADD17 46
ADD18 47
ADD19 48
ADD20 49
ADD21 50
VCC 51
VPP 52
ADD22 53
ADD23 54
ADD24 55
ADD25 56
VS2# 57
RESET 58
WAIT# 59
INPACK# 60
REG# 61
BVD2 62
BVD1 63
DATA8 64
DATA9 65
DATA10 66
CD2# 67
GND 68
GND
69
GND
70
C463
4.7U_0805_10V4Z
7411@
1 2
C465
0.1U_0402_16V4Z
7411@
1
2
C466
0.1U_0402_16V4Z
7411@
1 2
C469
4.7U_0805_10V4Z
7411@
1 2
C464
0.1U_0402_16V4Z
7411@
1
2
C457
0.01U_0402_16V7K
7411@
1
2
C451
0.1U_0402_16V4Z
7411@
1
2
C455
1U_0603_10V4Z
7411@
1
2
R299
33_0402_5%
7411@
1 2
R454
10K_0402_5%
@
1 2
C470
10P_0402_50V8J
7411@
C458
0.1U_0402_16V4Z
7411@
1
2
C462
0.1U_0402_16V4Z
7411@
1 2
C456
0.1U_0402_16V4Z
7411@
1
2
C467
4.7U_0805_10V4Z
7411@
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCIE_PME#_R
USB7+
PERST#
NC_CP#
NC_CP#
PCIE_TX0P
PCIE_RX0N
PCIE_RX0P
PCIE_TX0N
PCIECLK0#
PCIECLK0
SB_SCLK
SB_SDAT
NB_RST#
SUSP#
SYSON PERST#
NC_CLKSEL0#NC_CP#
PCIE_PME#_R
USBP7-
USBP7+
PERST#
NC_CP#
NC_CP#
PCIE_TX1P
PCIE_RX1N
PCIE_RX1P
PCIE_TX1N
PCIECLK1#
PCIECLK1
SB_SCLK
SB_SDAT
USBP7-
USBP7+ USB7-
RCLKEN
NC_CLKSEL0#
NC_CLKSEL0#
PCIE_TX0P<12> PCIE_TX0N<12>
PCIECLK0#<16> PCIECLK0<16>
PCIE_PME#<20>
PCIE_RX0P<12> PCIE_RX0N<12>
SB_SDAT<8,9,16,20> SB_SCLK<8,9,16,20>
NB_RST#<13,19,24,35>
SUSP#<37,38,39,41>
NC_CLKSEL0# <16>NC_CP#<20>
PCIE_TX1P<12> PCIE_TX1N<12>
PCIECLK1#<16> PCIECLK1<16>
PCIE_RX1P<12> PCIE_RX1N<12>
SB_SDAT<8,9,16,20> SB_SCLK<8,9,16,20>
SYSON<37,38,41,46>
USBP7+<20> USBP7-<20>
EXP_RST#<20>
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+1.5VS_PEC
+3VS
+1.5VS_PEC
+3VALW
+1.5VS
+3VS_PEC
+3V_PEC +3VS
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+1.5VS_PEC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Express Card
Custom
28 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
Near to Express Card slot. 17
Express Card Power Switch
Near to Express Card slot. 15.4
close to JP36
U20
TPS2231PWPR_PWP24
EXP@
GND
11
OC# 23
3.3Vin1
5
3.3Vin2
6
1.5Vin1
18
1.5Vin2
19
3.3Vaux_in
21
3.3Vout1 7
3.3Vout2 8
Aux_out 20
1.5Vout1 16
1.5Vout2 17
CPUSB#
14
CPPE#
15
STBY#
4
SHDN#
3RCLKEN 22
PERST# 9
NC1
1
NC2
10
NC3
12
NC4
13
NC5
24
SYSRST#
2
C478
4.7U_0805_10V4Z
17_EXP@
1
2
C472
0.1U_0402_16V4Z
EXP@
12
C696
0.1U_0402_16V4Z
15_EXP@
1
2
JP36
FOX_1CH4110C
GND
1
USB_D-
2
USB_D+
3
CPUSB#
4
RSV
5
RSV
6
SMB_CLK
7
SMB_DATA
8
+1.5V
9
+1.5V
10
WAKE#
11
+3.3VAUX
12
PERST#
13
+3.3V
14
+3.3V
15
CLKREQ#
16
CPPE#
17
REFCLK-
18
REFCLK+
19
GND
20
PERn0
21
PERp0
22
GND
23
PETn0
24
PETp0
25
GND
26
GND
27
GND
28
C479
0.1U_0402_16V4Z
17_EXP@
1
2
C717
0.1U_0402_16V4Z
17_EXP@
1
2
R302
10K_0402_5%
EXP@
1 2
R306
0_0402_5%
EXP@
1 2
R474
0_0402_5%17_EXP@
1 2
C697
4.7U_0805_10V4Z
15_EXP@
1
2
C480
4.7U_0805_10V4Z
17_EXP@
1
2
C481
0.1U_0402_16V4Z
17_EXP@
1
2
R473 0_0402_5%17_EXP@
1 2
G
D
S
Q14
2N7002_SOT23
@
2
13
C694
0.1U_0402_16V4Z
15_EXP@
1
2
C476
0.1U_0402_16V4Z
EXP@ 12
G
D
S
Q55
2N7002_SOT23
EXP@
2
13
C695
4.7U_0805_10V4Z
15_EXP@
1
2
C482
4.7U_0805_10V4Z
17_EXP@
1
2
C718
0.1U_0402_16V4Z
15_EXP@
1
2
JP17
FOX_1CH4110C
GND
1
USB_D-
2
USB_D+
3
CPUSB#
4
RSV
5
RSV
6
SMB_CLK
7
SMB_DATA
8
+1.5V
9
+1.5V
10
WAKE#
11
+3.3VAUX
12
PERST#
13
+3.3V
14
+3.3V
15
CLKREQ#
16
CPPE#
17
REFCLK-
18
REFCLK+
19
GND
20
PERn0
21
PERp0
22
GND
23
PETn0
24
PETp0
25
GND
26
GND
27
GND
28
C474
0.1U_0402_16V4Z
EXP@
12
C693
4.7U_0805_10V4Z
15_EXP@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_X1 LAN_X2
CLK_PCI_LAN
PCI_AD[0..31]
LINK_100#
PCI_AD22
PCI_CBE#0
PCI_AD30
PCI_AD23
PCI_AD19
LAN_IDSEL
PCI_AD13
PCI_AD11
PCI_AD2
PCI_FRAME#
PCI_AD18
PCI_AD5
PCI_IRDY#
PCI_AD25
PCI_AD22
PCI_AD15
PCI_RST#
PCI_AD3
PCI_CBE#1
PCI_AD10
PCI_AD8
PCI_SERR#
PCI_STOP#
PCI_AD27
PCI_AD1
PCI_AD0
PCI_REQ#1
PCI_AD6
PCI_AD4
PCI_PERR#
PCI_AD17
PCI_AD12
PCI_AD9
PCI_AD7
PCI_PIRQG#
PCI_DEVSEL#
PCI_AD28
PCI_AD16
PCI_AD14
PCI_GNT#1
PCI_CBE#2
PCI_PAR
PCI_TRDY#
PCI_CBE#3
PCI_AD31
PCI_AD26
PCI_AD29
PCI_AD24
PME_EC#
PCI_AD21
PCI_AD20
CLK_PCI_LAN
LINK_100#
ACTIVITY#
LAN_EECLK
LAN_EEDO
LAN_EEDI
LAN_EECS
LAN_X1
LAN_X2
RXIN-/MDI1-
RXIN+/MDI1+
CTRL25
CTRL25
V_12P
MDO1+
MDO1-
MDO0+
MDO0-
RXIN-/MDI1-
RXIN+/MDI1+
TXD-/MDI0-
TXD+/MDI0+ MDO0-
MDO0+
MDO1-
MDO1+
TXD+/MDI0+
TXD+/MDI0+
RXIN-/MDI1-
TXD-/MDI0-
TXD-/MDI0-
RXIN+/MDI1+
ACTIVITY#
RJ45_GNDMCT0
MCT1
PCI_AD[0..31]<19,23,25,30>
PCI_REQ#1<19> PCI_GNT#1<19>
PCI_RST#<19,25,27,30,35,37,38>
PCI_PAR<19,25,30>
PCI_FRAME#<19,25,30>
PCI_TRDY#<19,25,30>
PCI_DEVSEL#<19,25,30> PCI_STOP#<19,25,30>
PCI_SERR#<19,25,30>
PCI_IRDY#<19,25,30>
PCI_PERR#<19,25,30>
PCI_PIRQG#<19>
PCI_CBE#1<19,25,30> PCI_CBE#2<19,25,30>
PCI_CBE#0<19,25,30>
PCI_CBE#3<19,25,30>
CLK_PCI_LAN<19,23>
PME_EC#<30,37,38>
MDO0+ <40>
MDO0- <40>
MDO1+ <40>
MDO1- <40>
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
V2.5_LAN
+3VALW
+3VALW
V2.5_LAN
V2.5_LAN
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
LAN-8100CL
Custom
29 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
R313 5.6K for 8100CL
close to chip
close to magnetic
07/04 for EMI
07/11 Swap net for HP request
C490
0.01U_0402_16V7K
12
R315 100_0402_5%
1 2
R308
3.6K_0402_5%
1 2
R311 1K_0402_5%
1 2
C496
0.01U_0402_16V7K
12
R318
10K_0402_5%
1 2 C491
0.1U_0402_16V4Z
1
2
C484
4.7U_0805_10V4Z
1
2
PCI I/F
Power LAN I/F
U21
RTL8100CL_LQFP128
AD0
104
AD1
103
AD2
102
AD3
98
AD4
97
AD5
96
AD6
95
AD7
93
AD8
90
AD9
89
AD10
87
AD11
86
AD12
85
AD13
83
AD14
82
AD15
79
AD16
59
AD17
58
AD18
57
AD19
55
AD20
53
AD21
50
AD22
49
AD23
47
AD24
43
AD25
42
AD26
40
AD27
39
AD28
37
AD29
36
AD30
34
AD31
33
C/BE#3
44
IDSEL
46
C/BE#2
60
FRAME#
61
IRDY#
63
TRDY#
67
DEVSEL#
68
STOP#
69
PERR#
70
SERR#
75
PAR
76
C/BE#1
77 C/BE#0
92
ISOLATE# 23
EECS 106
RTSET 127
RTT3/CRTL18 125
PME#
31
LED0 117
LED1 115
LED2 114
X2 122
INTA#
25
RST#
27
CLK
28
GNT#
29 REQ#
30
TXD+/MDI0+ 1
TXD-/MDI0- 2
RXIN+/MDI1+ 5
RXIN-/MDI1- 6
AUX/EEDI 109
EESK 111
NC/VSS 9
NC/AVDDH 10
NC/HSDAC+ 11
NC/VSS 13
NC/MDI2+ 14
NC/MDI2- 15
NC/M66EN 88
NC/MDI3+ 18
NC/MDI3- 19
NC/GND 22
NC/VDD18 24
NC/GND 48
NC/GND 62
CLKRUN#
65
NC/SMBCLK 72
NC/GND 73
NC/SMBDATA 74
NC/VDD18 110
NC/GND 112
NC/GND 118
NC/HV 120
NC/HG 123
NC/LG2 124
NC/LV2 126
NC/VDD18 45
NC/VDD18 64
VDD33 41
VDD33 56
VDD33 71
VDD33 84
VDD33 94
VDD33 107
AVDD33/AVDDL 3
AVDD33/AVDDL 20
AVDD33/AVDDL 7
VDD25/VDD18 54
VDD25/VDD18 78
VDD25/VDD18 99
AVDD25/HSDAC- 12
CTRL25 8
GND/VSS
4
GND/VSS
17
GND/VSSPST
21
GND
35
GND/VSSPST
38
GND/VSSPST
51
GND
52
GND/VSSPST
66
GND
80
GND/VSSPST
81
GND/VSSPST
91
GND
100
GND/VSSPST
101
GND/VSSPST
119
GND/VSS
128
VDD33 26
X1 121
NC/VDD18 116
VDD25/VDD18 32
LWAKE 105
EEDO 108
NC/LED3 113
NC/AVDDL 16
U22
AT93C46-10SI-2.7_SO8
CS
1SK
2DI
3DO
4
VCC 8
NC 7
NC 6
GND 5
C498
0.1U_0402_16V4Z
1
2
C495
0.1U_0402_16V4Z
1
2
C483
1U_0603_10V4Z
12
R319
49.9_0402_1%
12
U23
NS0013_16P
RD+
1RD-
2CT
3
CT
6TD+
7TD-
8TX- 9
TX+ 10
CT 11
CT 14
RX- 15
RX+ 16
R322
10_0402_5%
12
C504
10P_0402_50V8K
1
2
R307
300_0603_5%
1 2
C494
0.1U_0402_16V4Z
1
2
R313 5.6K_0603_1%
1 2
C505
0.1U_0402_16V4Z
1
2
C499
0.1U_0402_16V4Z
1
2
C488
27P_0402_50V8J
1
2
JP18
SUYIN_100073FR012S100ZL
PR1-
2
PR1+
1
PR2+
3
PR3+
4
PR3-
5
PR2-
6
PR4+
7
PR4-
8
Green LED+
9
Green LED-
10
Amber LED+
11
Amber LED-
12
SHLD1 13
SHLD2 14
SHLD4 16
SHLD3 15
C492
0.1U_0402_16V4Z
1
2
R309
300_0603_5%
1 2
C485 0.1U_0402_16V4Z
1
2
C493
0.1U_0402_16V4Z
1
2
C487
0.1U_0402_16V4Z
1 2
R320
49.9_0402_1%
12
Q15
2SB1188_SC62
1
2 3
C489
27P_0402_50V8J
1
2
R316
49.9_0402_1%
12
Y5
25MHZ_16P_XSL025000FK1H
12
R314
75_0402_5%
12
R317
49.9_0402_1%
12
C500
0.1U_0402_16V4Z
1
2
C497
0.1U_0402_16V4Z
1
2
R310
75_0402_5%
12
R312 15K_0402_5%
1 2
C502
0.1U_0402_16V4Z
1
2
C501
0.1U_0402_16V4Z
1
2
C486
1000P_1206_2KV7K
12
R323
0_0402_5%
1 2
C503
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CH_DATA
PME_EC#
PCI_PIRQF#
PCI_AD25
PCI_AD5
PCI_SERR#
PCI_AD23
PCI_CBE#2
PCI_IRDY#
PCI_AD1
PCI_AD19CLK_PCI_MINI
PCI_AD28
PCI_AD14
PCI_REQ#3
PCI_AD3
PCI_AD8
PCI_GNT#3
PCI_AD31
WL_ON
PCI_AD7
PCI_AD30
PCI_AD27
PCI_AD17
PCI_AD12
PCI_AD29
PCI_PERR#
PCI_PIRQF#
PCI_RST#
PCI_AD10
PCI_AD21
CLK_PCI_MINI
PCI_AD18
PCI_AD16
PCI_STOP#
PCI_AD26
PCI_AD13
PCI_AD0
PCI_AD22
PCI_PAR
PCI_AD2
PCI_DEVSEL#
PCI_AD11
PCI_AD20
PCI_FRAME#
PCI_AD9
PCI_AD15
PCI_AD4
PCI_CBE#0
PCI_AD6
PCI_TRDY#
PCI_CBE#1
PCI_CBE#3
CH_CLK
MINI_LED
PCI_AD18
PCI_AD24
PCI_AD14<19,25,29>
PCI_GNT#3 <19>
PCI_AD18 <19,25,29>
PCI_PERR#<19,25,29>
PCI_AD16 <19,25,29>
PCI_AD3<19,25,29>
PCI_AD29<19,23,25,29>
PCI_AD21<19,25,29>
PCI_PAR <19,25,29>
PCI_AD20 <19,25,29>
PCI_PIRQF#<19>
PCI_AD15 <19,25,29>
PCI_AD17<19,25,29>
PCI_AD5<19,25,29>
PCI_CBE#2<19,25,29>
PCI_SERR#<19,25,29>
PCI_AD11 <19,25,29>
PCI_AD23<19,23,25,29>
PCI_AD8<19,25,29>
PCI_AD28 <19,23,25,29>
PCI_STOP# <19,25,29>
PCI_AD2 <19,25,29>
PCI_AD12<19,25,29>
PCI_AD26 <19,23,25,29>
PCI_AD9 <19,25,29>
PCI_AD31<19,23,25,29>
PCI_RST# <19,25,27,29,35,37,38>
PCI_AD30 <19,23,25,29>
PCI_AD7<19,25,29>
PCI_AD25<19,23,25,29>
PCI_AD10<19,25,29>
PCI_REQ#3<19>
PCI_IRDY#<19,25,29>
PCI_AD6 <19,25,29>
PCI_CBE#0 <19,25,29>
WL_ON<20>
PCI_AD0 <19,25,29>
PCI_DEVSEL# <19,25,29>
PCI_FRAME# <19,25,29>
PCI_TRDY# <19,25,29>
PCI_AD27<19,23,25,29>
PCI_AD13 <19,25,29>
PCI_AD22 <19,25,29>
PCI_AD19<19,25,29>
PCI_AD4 <19,25,29>
PCI_AD1<19,25,29>
CLK_PCI_MINI<19,23>
PCI_CBE#1<19,25,29>
CH_CLK <34>
PCI_CBE#3<19,25,29> CH_DATA<34>
WIRELESS_LED<17,34,35>
PME_EC# <29,37,38>
PCI_AD24 <19,23,25,29>
+5VS
+3VS
+3VALW
+5VS
+5VS
+3VALW
+3VALW
+5VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Mini PCI
Custom
30 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
W = 40 mils
W=40mils
LAN RESERVED LAN RESERVED
TIP
W = 40 mils
W = 40 mils
IDSEL : AD18
RING
W = 30 mils
W = 30 mils
W = 30 mils
07/04 for EMI
R327
10K_0402_5%
@
1 2
R326 10K_0402_5%
1 2
R325
10_0402_5%
12
R328
10K_0402_5%
1 2
C515 1000P_0402_50V7K
1
2
C512
10P_0402_50V8K
1
2
D11
1N4148_SOT23
1
3
2
C511
4.7U_0805_10V4Z
1
2
C506
4.7U_0805_10V4Z
1
2
C518
1000P_0402_50V7K @
1
2
C514
0.1U_0402_16V4Z
1
2
C517
0.1U_0402_16V4Z
1
2
C509
0.1U_0402_16V4Z
1
2
KEY KEY
JP19
QTC_C102A-052B11
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
45
45 46 46
47
47 48 48
49
49 50 50
51
51 52 52
53
53 54 54
55
55 56 56
57
57 58 58
59
59 60 60
61
61 62 62
63
63 64 64
65
65 66 66
67
67 68 68
69
69 70 70
71
71 72 72
73
73 74 74
75
75 76 76
77
77 78 78
79
79 80 80
81
81 82 82
83
83 84 84
85
85 86 86
87
87 88 88
89
89 90 90
91
91 92 92
93
93 94 94
95
95 96 96
97
97 98 98
99
99 100 100
101
101 102 102
103
103 104 104
105
105 106 106
107
107 108 108
109
109 110 110
111
111 112 112
113
113 114 114
115
115 116 116
117
117 118 118
119
119 120 120
121
121 122 122
123
123 124 124
128
128 127
127
R324 100_0402_5%
1 2
C510
1000P_0402_50V7K
1
2
C516
4.7U_0805_10V4Z
@
1
2
C513
4.7U_0805_10V4Z
1
2
C508
0.1U_0402_16V4Z
1
2
C507
1000P_0402_50V7K
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CDROM_R_R
MONO_IN MONO_IN1 MONO_INR
MIC_IN
AC97_RST#
AC97_SDOUT
RCOSC1
LINE_OUTL
LINE_OUTR
CDROM_R_L
CDGNDA CD_GNA
CDROM_RC_R
CDROM_RC_L
MONO_INR
SPDIFO
AC97_SYNC
DOCK_L+
DOCK_R+
DOCK_LOUT_R
DOCK_LOUT_L
REF_FLT
VREF_SCA
VC_SCA
DOCK_L+
DOCK_R+
DIB_DATAN<32>
DIB_DATAP<32>
PWRCLKP<32>
PWRCLKN<32>
AC97_SDOUT<20,23>
AC97_SDIN0<20>
AC97_RST#<20>
AC97_BITCLK<20>
LINE_OUTL <33>
LINE_OUTR <33>
CDROM_L <24>
CD_AGND <24>
CDROM_R <24>
MUTE_LED<34,35,40>
HP_PLUG_D <33>
MIC <35>
SPDIFO <35,40>
AC97_SYNC<20>
SB_SPKR <20>PCM_SPK<25>
GNDA <33,35,40>
DOCK_LOUT_R <40>
DOCK_LOUT_L <40>
JACK_DET_D <33>
MUTE_GATE<37,38>
+VDDA_CODEC
+3VAMP_CODEC
+VDDA_CODEC
+5VS
+CODEC_REF
+3VALW
+3VAMP_CODEC
+CODEC_REF
+3VDD_CODEC
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
AMOM_codec
Custom
31 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
For Layout:
Place decoupling caps near the
power pins of SmartAMC
device.
W=40Mil 250mA (3.33V)
GNDAGND
cap. high 5.7mm
5/10 HP requirement
close to dock side
GPIO4 GPIO5
00
01
10
11
disable HP-out
disable EQ/HP-out(sys HP only)
enable HP-out
disable EQ/HP-0ut(sys HP only)
5/13 HP requirement
07/25 Audio POP issue
8/23 reseve C700, slowly turn on Q59/Q60
8/23 Change to DGND
8/23 Change to DGND
+
C731 100U_6.3V_M
1 2
R338
0_1206_5%
@
1 2
R348 4.7K_0402_5%
1 2
R589 0_0402_5%@
1 2
C529
0.1U_0402_16V4Z
1
2
R345 4.7K_0402_5%
1 2
C520
10U_0805_10V4Z
1
2
D12
CH751H-40_SC76
21
G
D
S
Q59
2N7002_SOT23
2
1 3
C527
0.1U_0402_16V4Z
@
1 2
R353 33_0402_5%
1 2
R344 0_0402_5%
1 2
X2
24.576MHZ_16P_XSL024576FG1H
1 2
R357
33_0402_5%
1 2
R342
3K_0402_5%
12
C539 2.2U_0603_6.3V4Z
12
+
C730 100U_6.3V_M
1 2
R330
0_0402_5%
1 2
C526
0_0402_5%
@
1 2
C536
150P_0402_50V8J
1
2
R346 0_0402_5%
1 2
Q17
MMBT3904_SOT23
2
3 1
C521
0.1U_0402_16V4Z
1
2
C535
1U_0603_10V4Z
1
2
G
D
S
Q60
2N7002_SOT23
2
1 3
R349 0_0402_5%
1 2
C533
0.1U_0402_16V4Z
1
2
R335
560_0402_5%
1 2
R567 33_0805_5%
1 2
U24
SI9182DH-AD_MSOP8
VIN
4
SD
8
VOUT 5
GND 3
SENSE or ADJ 6
ERROR
7CNOISE 1
DELAY
2
C530
0.1U_0402_16V4Z
1
2
R331
47K_0603_1%
1 2
C519
1U_0603_10V4Z
1 2
C534
0.1U_0402_16V4Z
1
2
C531
0.1U_0402_16V4Z
1
2C662
0.1U_0402_16V4Z
1 2
C547 15P_0402_50V8J
1 2
G
D
S
Q58
2N7002_SOT23
2
1 3
R329
10K_0402_1%
12
R336
560_0402_5%
1 2
C546 15P_0402_50V8J
1 2
R569 33_0805_5%
1 2
R333
27K_0603_1%
12
R356 10K_0402_5% @ 1 2
C538 2.2U_0603_6.3V4Z
12
D36
CH751H-40_SC76
21
R334
2.4K_0402_5%
1 2
C522
1U_0603_10V4Z
1
2
R343 0_0402_5%
1 2
R588
1K_0402_5%
1 2
R332
10K_0402_5%
12
C524
0.01U_0402_16V7K
1
2
R341
249K_0402_1%
12
R568 1K_0402_5%
1 2
C545
0.1U_0402_16V4Z
1
2
C532
0.1U_0402_16V4Z
1
2
C523
0.1U_0402_16V4Z
@
1
2
R351
2.7K_0402_5%
12
R350
4.7K_0402_5%
12
C700
1U_0603_10V4Z
@1
2
R555 0_0402_5%@
1 2
R347 2.7K_0402_5%
1 2
R352
4.7K_0402_5%
12
C540 2.2U_0603_6.3V4Z
12
R587 10K_0402_5% @ 1 2
Q16
MMBT3904_SOT23
2
3 1
U25
CX20468-31_TQFP48
RCOSC1
1
GNDC2
2
DIB_DATAN
3
DIB_DATAP
4
VDD5 5
GND8
6
PWRCLKP
7
PWRCLKN
8
GNDC9
9
VDDC10 10
ID0#
11
ID1#
12
DSPKOUT
13
EAPD
14
SDATA_OUT
15
SYNC
16
AC_RESET#
17
VDDC18 18
GNDC19
19
AC_ONLY
20
SDATA_IN0
21
BIT_CLK
22
XTLI 25
XTLO 24
AVSS_CLK
26
VDD_CLK 23
LINE_IN_L 27
LINE_IN_R 28
MIC_IN 29
CD_IN_L 30
CD_IN_GND 31
CD_IN_R 32
AVDD33 33
MBIAS/AVDD 34
AGND35
35
VREF_SCA 36
VC_SCA 37
REF_FLT 38
HP_OUT_L 42
HP_OUT_R 43
LINE_OUT_L 39
LINE_OUT_R 40
AGND41
41
AVDD44 44
PC_BEEP
45
S_PDIF 46
GPIO_4 47
GPIO_5 48
R354 33_0402_5%
1 2
C542
0.1U_0402_16V4Z
1
2
R590
0_0402_5%
@
1 2
R570 1K_0402_5%
1 2
R339
0_0805_5%
1 2
C544
1U_0603_10V4Z
1
2
C525
0.1U_0402_16V4Z
@
1 2
C528
10U_0805_10V4Z
1
2
R355 4.7K_0402_5%@ 12
C543
0.1U_0402_16V4Z
1
2
R337
0_1206_5%
1 2
R340
0_0805_5%
1 2
C537 10U_0805_10V4Z
1 2
C541
150P_0402_50V8J
1
2
Vref_LSD
BR908_AC1
BR908_CC
MOD_RINGRING_2
EIC
RXI-1
DIB_P1
BRIDGE_CCVZ
TXF
EIF
TIP_2
PCLK
CLK
PWR+
CLK2
DIB_P2
DIB_N2DIB_N1
Vc_LSD
RAC1
TAC1
TIP_2
RBias
EIO
TXO
RAC1/RING
RXI
TRDC
TAC1/TIP
MOD_TIP
DIB_DATAP<31>
DIB_DATAN<31>
PWRCLKN<31>
PWRCLKP<31>
DGND_LSD
VDD
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSD
DGND_LSD AGND_LSD
VDD
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSD
GND
GND
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
AMOM_modem
Custom
32 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
Check 0.047u or 10p cap
C906 and C908 must be Y3 type
Capacitors for Nordic
Countries only
Use 59K_0402_1% for MR954
MTP34 1
E
B
C
MQ906
PMBTA42_SOT23
2
3 1
MBR908A
BAV99DW-7_SOT363
1
26
MJ1B
HEADER8@
11
22
33
44
55
66
77
88
MTP62
1
MTP61 1
MC962
47P_0603_50V8J
1
2
MC976
0.001U_0402_50V7M
1
2
MBR906
MMBD3004S_SOT23
2
3
1
MBR908B
BAV99DW-7_SOT363
4
5
3
MTP30
1
MR906 6.8M_0805_5%
1 2
MTP71
1
MQ904
FZT458TA_SOT223
3
1
2
4
MTP67
1
MTP68
1
MC922 10P_1808_3KV
1 2
MTP24
1
MR922
0_0402_5%
1 2
MC970
0.1U_0402_10V6K
1
2
MTP38
1
MFB906
MMZ1608D301BT_0603
1 2
MTP60
1
MR924
0_0402_5%
1 2
MTP73
1
MU902
CX20493-58_QFN28
DVdd 24
TRDC 12
RXI 9
EIC 11
VRef
4
Vc
3
RAC1 21
TAC1 20
RBias 5
VZ 10
TXF 13
TXO 14
EIO 17
EIF 16
DGnd
23
AGnd
6
AVdd 2
CLK
26
DIB_P
27
DIB_N
28
PWR+
7
GPIO1 1
DC_GND
15
RAC2 19
TAC2 18
NC3
25 NC2
22 NC1
8
PADDLE
29
MTP37
1
MC978
0.1U_0402_10V6K
1 2
MC908
470P_1808_3KV
1
2
MC918
0.1U_0603_16V7K
1
2
MTP27
1
MJ1
HEADER8@
11
22
33
44
55
66
77
88
MTP35
1
MTP29
1
MTP49
1
MTP22
1
MTP63
1
MR902
1M_0805_5%
1 2
MR928
27_0805_5%
12
MC944
0.1U_0402_10V6K
1
2
MR908
348K_0805_1%
1 2
MC902 0.033U_1206_100V7K
1 2
MC924 10P_1808_3KV
1 2
MR910
237K_0805_1%
1 2
MC958
0.015U_0603_25V7K
1 2
SECPRI
MT922
30U_82154R_1%_1:1.67@
2 3
41
MR938
110_0603_5%
12
MTP33
1
MTP28
1
MC906
470P_1808_3KV
1
2
E
B
C
MQ902
PMBTA42_SOT23
2
3 1
MC930
2.2U_0805_10V6K
1
2
MC928
0.1U_0402_10V6K
1
2
MC974
0.001U_0402_50V7M@
1
2
MTP42
1
MTP31
1
MTP58
1
MTP25
1
MC910
0.047U_1206_100V7K
1 2
MTP59
1
MC940
1U_0603_6.3V6M
1
2
MTP66
1
MTP40 1
MC966
0.01U_0805_100V7M
1 2
MTP64
1
MTP39
1
MTP69
1
MC926
10P_0402_50V8J
1 2
MRV902
TB3100M-13-01_SMB
11
2
2
MTP52
1
MJ2
E&T_3800-02
1
2
MTP23
1
MTP26
1
MFB904
MMZ1608D301BT_0603
1 2
MR954
59K_0402_1%
1 2
MTP32
1
MTP41
1
MTP72
1
MR932
15K_0402_5%
1 2
MFB902
MMZ1608D301BT_0603
1 2
SECPRI
MT902
30U_82154R_1%_1:1.67
2 3
41
MC904 0.033U_1206_100V7K
1 2 MBR904
MMBD3004S_SOT23
2
31
MTP36
1
MTP65
1
MR904
1M_0805_5%
12
MTP70
1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LINE_C_OUTL
SPKR+
SE
HP_C_OUTR
HP_C_OUTL
SPKR-
SPKL+
SPKL-
LINE_C_OUTR
SPKR+
SPKL-
SPKR-
SPKL+
EC_MUTE#
JACK_DETHP_PLUG
SE
HP_PLUG
JACK_DET
JACK_DET#HP_PLUG#
LINE_OUTR<31>
LINE_OUTL<31>
SPKL+ <35>
SPKR+ <35>
EC_MUTE#<37,38>
HP_PLUG#<35> JACK_DET#<40> JACK_DET_D <31>HP_PLUG_D <31>
+5VS
+5VS+5VAMP
+5VS
+5VS+5VS
+5VS
+3VS+5VS+5VS +3VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
AMP & Audio jack
Custom
33 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
SE/BTL#
0
0
0
0
1XX
4.1 dB
HEADPHONE OUT/LINE OUT
Av(inv)
1
GAIN1
1
Gain Settings
1 0
GAIN0
0
0
6 dB
0
1
21.6 dB
15.6 dB
* 10 dB
10 dB
5/13 HP requirement
G
D
S
Q24
2N7002_SOT23
2
13
R363
100K_0402_5%
12
C558
0.47U_0603_10V7K
1
2
R571
100K_0402_5%
12
C549
0.1U_0402_16V4Z
1
2
G
D
S
Q56
2N7002_SOT23
2
13
C555 0.47U_0603_16V7K
1 2
G
D
S
Q52
2N7002_SOT23
2
13
R365
100K_0402_5%
@
12
G
D
S
Q54
2N7002_SOT23
2
13
R586
100K_0402_5%
12
C550
0.1U_0402_16V4Z
1
2
R367
100K_0402_5%
12
R359
100K_0402_5%
12
R366
100K_0402_5%
12
U26
TPA0312PWP_TSSOP24
PVDD1 7
PVDD2 18
RLINEIN
23
RHPIN
20
PC-BEEP
14
SHUTDOWN#
22
VDD 19
GND4
24 GND3
13
ROUT+ 21
ROUT- 16
RIN
8
GND2
12 GND1
1
LOUT+ 4
LOUT- 9
SE/BTL# 15
HP/LINE# 17
LIN
10
LHPIN
6
LLINEIN
5
BYPASS 11
GAIN0 2
GAIN1 3
R358
100K_0402_5%
12
R362
0_1206_5%
1 2
JP22
ACES_85205-0400
1
1
2
2
3
3
4
4
R364
100K_0402_5%
@
12
G
D
S
Q53
2N7002_SOT23
2
13
C735
0.1U_0402_16V4Z
1
2
G
D
S
Q57
2N7002_SOT23
2
13
C562
47P_0402_50V8J
@
1
2
C553 0.47U_0603_16V7K
1 2
C548
10U_0805_10V4Z
1
2
R368
100K_0402_5%
12
C554 0.47U_0603_16V7K
1 2
C556 0.047U_0603_16V7K
1 2
R433
100K_0402_5%
12
C551 0.047U_0603_16V7K
1 2
U52
TC7SH32FU_SSOP5
I0
2
I1
1O4
G
3P5
C560
47P_0402_50V8J
@
1
2
C557 0.47U_0603_16V7K
1 2
C561
47P_0402_50V8J
@
1
2
R434
100K_0402_5%
12
C552 0.47U_0603_16V7K
1 2
C559
47P_0402_50V8J
@
1
2
USBP6+
USBP6-
+3V_BT
OVCUR#2
WIRELESS_LED_BT
BT_DET#
OVCUR#3
OVCUR#3
USBP0+_R
USBP3-_R
USBP3+_R
USBP0-_R
USBP0-_R USBP3-USBP3-_R
USBP0+ USBP0+_R
USBP0-
USBP3+_R USBP3+
USBP6+<20> USBP6-<20>
OVCUR#0 <20>
BT_ON#<20>
CH_CLK<30>
WIRELESS_LED<17,30,35>
BT_DET#<20>
OVCUR#3 <20>
CH_DATA<30>
USBP3+ <20>
USBP3- <20>
USBP0+<20>
USBP0-<20>
KSI0<35,37,38>
KSI1<35,37,38>
KSI4<35,37,38>
ON/OFFBTN#<35>
KSI3<35,37,38>
KSO17<35,37,38>
WIRELESS_LED<17,30,35>
NUMLED#<35,37,38>
MUTE_LED<31,35,40>
VOL_UP#<35,37,38>
VOL_DWN#<35,37,38>
LID_SW#<35,37,38>
PWR_ACTIVE#<35,37,38>
PA_LED_ALW<35,36,38>
PR_LED_ALW<35,36>
PA_LED<35,36>
PR_LED<35,36>
PA_LED_VS<35,36>
PR_LED_VS<35,36>
+3VALW
+USB_VCCB
+5V
+USB_VCCC
+5V
+USB_VCCB
+USB_VCCC
+USB_VCCB
+USB_VCCB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
Bluetooth & USB CONN
Custom
34 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
BT CONNECTOR
USB CONNECTOR 0/3 (Left side)
5/4 reserve
W=40mils
07/05 for EMI 07/05 for EMI
W=40mils
2005.08.11 for EMI solution
C565
0.1U_0402_16V4Z
12
C7600.1U_0402_16V4Z
@
12
+
C575
100U_6.3V_M
1
2
C582
1U_0603_10V4Z
1
2
C7560.1U_0402_16V4Z
@
12
C7710.1U_0402_16V4Z
@
12
JP23
SUYIN_020122MR008S573ZR
1
1
2
2
3
3
4
4
55
66
77
88
GND
9
GND
10
GND
11
GND
12
R376 100_0402_5%
1 2
C566
0.47U_0603_16V7K
1
2
L33
WCM2012F2S-900T04_0805
1
122
33
4
4
R374
20K_0402_5%
@
12
C7660.1U_0402_16V4Z
@
12
R564
0_0603_5%@
1 2
C7640.1U_0402_16V4Z
@
12
U28
AATI4610AIGV-T1_SOT23-5
OUT 1
ON# 4
SET
3
IN
5
GND 2
G
D
S
Q18
AO3413_SOT23
2
13
C7540.1U_0402_16V4Z
@
12
R560 0_0402_5%
1 2
D35
IP4220CZ6_SO6@
D2+ 4
D1- 6
VCC 5
D1+
1
GND
2
D2-
3
R375 100_0402_5%
1 2
C569
1000P_0402_50V7K
1
2
C7670.1U_0402_16V4Z
@
12
L34 WCM2012F2S-900T04_0805
11
2
2
3
344
R369
10K_0402_5%
12
C7630.1U_0402_16V4Z
@
12
C574
0.47U_0603_16V7K
@
1
2
R559 0_0402_5%
1 2
U29
AATI4610AIGV-T1_SOT23-5
@
OUT 1
ON# 4
SET
3
IN
5
GND 2
R562 0_0402_5%
1 2
C7580.1U_0402_16V4Z
@
12
R372
10K_0402_5%
@
12
C568
0.1U_0402_16V4Z
1
2
C7680.1U_0402_16V4Z
@
12
R561 0_0402_5%
1 2
R370
4.7K_0402_1%
1 2
C7620.1U_0402_16V4Z
@
12
+
C567
100U_6.3V_M
1
2
C7550.1U_0402_16V4Z
@
12
C7590.1U_0402_16V4Z
@
12
C577
1000P_0402_50V7K
1
2
JP25
ACES_87213-0800
1
1
3
3
5
5
6
6
4
4
2
2
7
7
8
8
C578
1000P_0402_50V7K
@
1
2
C7690.1U_0402_16V4Z
@
12
C570
1000P_0402_50V7K
1
2
R563
0_0402_5%
12
R373
4.7K_0402_1%
@
1 2
C7530.1U_0402_16V4Z
@
12
C576
0.1U_0402_16V4Z
1
2
R371
20K_0402_5%
12
C7610.1U_0402_16V4Z
@
12
D28
1N4148_SOT23
1
3
2
C573
0.1U_0402_16V4Z
@
12
C7570.1U_0402_16V4Z
@
12
C7700.1U_0402_16V4Z
@
12
C581
1U_0603_10V4Z
1 2
C7650.1U_0402_16V4Z
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO[0..17]
ON/OFFBTN#
ON/OFF#
EC_ON
CLK_PCI_SIO
PCI_RST#
LPC_AD0
LPC_AD3
LDRQ0#
LPC_FRAME#
LPC_AD2
LPC_AD1
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
CLK_PCI_TPM
LPC_FRAME#
NB_RST#
SIRQ
PCI_CLKRUN#
CIR_IN
KSI[0..7]
KSI4
KSI7
KSO1
KSI0
KSO6
KSO0
KSO7
KSI3
KSI1
KSO12
KSO3
KSI6
KSO4
KSO13
KSO2
KSO5
KSO8
KSO9
KSO11
KSO15
KSO14
KSO10
KSI5
KSI2
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSI4
KSI5
KSI1
KSI3
KSI6
KSO15
KSO17
KSO12
KSO10
KSI2
KSO9
KSO14
KSO13
KSO11
KSO7
KSO8
KSO16
KSI7
KSI0
KSO0
KSO15
KSO17
KSO4
KSO5
KSO3
KSO13
KSO9
KSO10
KSI2
KSO1
KSI7
KSO11
KSO7
KSI3
KSI5
KSO2
KSO0
KSO16
KSO6
KSO14
KSI4
KSI6
KSO12
KSI1
KSO8
KSI0
KSO2
KSO0
KSO11
KSO12
KSI7
KSI0
KSO10
KSO8
KSO6
KSI5
KSO5
KSI4
KSO4
KSO14
KSI1
KSO1
KSI6
KSI3
KSO3
KSO15
KSI2
KSO9
KSO7
KSO13
PWR_ACTIVE#
PA_LED_ALW
NUMLED#
MUTE_LED
KSI4
KSO17
VOL_UP#
VOL_DWN#
ON/OFFBTN#
KSI0
KSI1
KSI3
LID_SW#
PR_LED_ALW
PA_LED
PR_LED
PA_LED_VS
PR_LED_VS
WIRELESS_LED
MIC
USBP4-
USBP4+
SPDIFO
DOCK_MIC
USBP5-
USBP5+
OVCUR#4
HP_PLUG#
SPKR+
SPKL+
TP_CLK
TP_DATA
KSO[0..17] <34,37,38>
EC_PWR_ON# <43>
EC_ON<37,38,45>
ON/OFF# <37,38>
PCI_RST# <19,25,27,29,30,37,38>
LPC_FRAME# <19,37,38>
SIRQ <19,25,37,38>
LDRQ0# <19>
LPC_AD[0..3] <19,37,38>
CLK_PCI_SIO_R <19,23>
CIR_IN<37,38,40>
KSI[0..7] <34,37,38>
LPC_AD0<19,37,38>
PCI_CLKRUN#<19> SIRQ<19,25,37,38> NB_RST#<13,19,24,28> LPC_FRAME#<19,37,38> CLK_PCI_TPM<19>
LPC_AD3<19,37,38> LPC_AD2<19,37,38> LPC_AD1<19,37,38>
PWR_ACTIVE#<34,37,38>
PA_LED_ALW<34,36,38>
NUMLED#<34,37,38> MUTE_LED<31,34,40>
KSI0<34,37,38> KSI1<34,37,38> KSI3<34,37,38> KSI4<34,37,38>
VOL_UP#<34,37,38>
VOL_DWN#<34,37,38> LID_SW#<34,37,38>
PR_LED_ALW<34,36>
PA_LED<34,36> PR_LED<34,36>
PA_LED_VS<34,36> PR_LED_VS<34,36>
WIRELESS_LED<17,30,34>
MIC<31>
DOCK_MIC<40>
USBP4+<20> USBP4-<20>
SPDIFO<31,40>
USBP5+<20> USBP5-<20>
OVCUR#4<20>
HP_PLUG#<33>
SPKL+<33> SPKR+<33>
TP_DATA<37,38> TP_CLK<37,38>
ON/OFFBTN#<34>
+3VL
+3VL
+3VS
+3VS
+3VS
+3VS
LDO5
+3VS
+5VS
+5VALW
+5V
+5VS
+5V
+5V
+5VS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
KBD,ON/OFF,T/P,LED/B,DEBUG
Custom
35 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
INT_KBD CONN.( TYPE "D" KB)
Power BTN
WHEN R=33K,Vbe=0.8V
WHEN R=0,Vbe=1.35V
FOR LPC SIO DEBUG PORT
Base I/O Address
* 1 = 04Eh
0 = 02Eh
TPM(reserve)
Consumer IR
15.4 ( TYPE "C" KB)
TP to MB CONN
Audio board conn
Switch board conn
5/3 pin swap
5/3 change
5/3 change
5/9 change
2005/07/21
8/23 Add +3VALW power rail
for Boxster lid Switch
C584 100P_0402_50V8JD@
1 2
C607 100P_0402_50V8JD@ 1 2
R384
4.7K_0402_5%
@
12
C678 100P_0402_50V8J C@1 2
C608
4.7U_0805_6.3V6K
CIR@
1
2
C603 100P_0402_50V8JD@ 1 2
C673 100P_0402_50V8J C@1 2
C666 100P_0402_50V8J C@1 2
JP29
ACES_87213-2000
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
C587 100P_0402_50V8JD@ 1 2
C589 100P_0402_50V8JD@ 1 2
C664 100P_0402_50V8J C@1 2
C597 100P_0402_50V8JD@ 1 2
C686 100P_0402_50V8J C@1 2
C611
0.1U_0402_16V4Z
@
1
2
C682 100P_0402_50V8J C@1 2
C591 100P_0402_50V8JD@ 1 2
C592 100P_0402_50V8JD@ 1 2
C667 100P_0402_50V8J C@1 2
C604 100P_0402_50V8JD@ 1 2
C669 100P_0402_50V8J C@1 2
C676 100P_0402_50V8J C@1 2
R582
18K_0402_5%
1 2
C606 100P_0402_50V8JD@ 1 2
D14
RLZ20A_LL34
12
C583 100P_0402_50V8JD@ 1 2
JP27
ACES_85201-2605
1
12
23
34
45
56
67
78
89
910
10 11
11 12
12 13
13 14
14 15
15 16
16 17
17 18
18 19
19 20
20 21
21 22
22 23
23 24
24 25
25 26
26
C671 100P_0402_50V8J C@1 2
C600 100P_0402_50V8JD@ 1 2
R379
100_0402_5%
CIR@
12
R583
2K_0402_5%
1 2
C672 100P_0402_50V8J C@1 2
C683 100P_0402_50V8J C@1 2
JP20
ACES_85201-2405
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
JP30
ACES_85201-2005
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
13 13
14 14
16 16
17 17
18 18
15 15
20 20
19 19
C595
1000P_0402_50V7K
1
2
C601 100P_0402_50V8JD@ 1 2
R452
10K_0402_5%
@
1 2
R378
4.7K_0402_5%
12
C596 100P_0402_50V8JD@ 1 2
C685 100P_0402_50V8J C@1 2
C598 100P_0402_50V8JD@ 1 2
C610
0.1U_0402_16V4Z
@
1
2
C701 0.1U_0402_10V6K@ 1 2
C663 100P_0402_50V8J C@1 2
R380
10K_0402_5%
@
12
C679 100P_0402_50V8J C@1 2
C605 100P_0402_50V8JD@ 1 2
R382
10K_0402_5%
@
12
C585 100P_0402_50V8JD@ 1 2
R377 100K_0402_5%
1 2
C590 100P_0402_50V8JD@ 1 2
Q19
DTC124EK_SC59
O1
G
3
I
2
C613
0.1U_0402_16V4Z
@
1
2
C680 100P_0402_50V8J C@1 2
D13
DAN202U_SC70
1
3
2
C675 100P_0402_50V8J C@1 2
JP28
ACES_85201-2505
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
C660 100P_0402_50V8JD@ 1 2
C677 100P_0402_50V8J C@1 2
C602 100P_0402_50V8JD@ 1 2
TPM
SLD 9630 TT 1.1
U31
SLD9630TT_TSSOP28
@
GND
4
GND
10
GND
18
GND
24
VDD 5
VDD 11
LAD0
2
LAD1
3
LAD2
6
LAD3
7
LCLK
8
LFRAME#
13
LRESET#
27
SERIRQ
12
CLKRUN#
23
BADDR
20
NC 1
NC 14
NC 15
NC 28
VDD 25
VDDC 19
TESTEN 17
TESTIO 16
PACCESS 21
PENABLE 22
CLKOVD 9
LPCPD# 26
R385
10K_0402_5%
@
12
R386
22_0402_5%
@
1 2
C609
0.1U_0402_10V6K
CIR@
1
2
C588 100P_0402_50V8JD@ 1 2
R383
4.7K_0402_5%
@
12
C684 100P_0402_50V8J C@1 2
JP35
ACES_87152-0807
1
2
3
4
5
6
7
8
C594 100P_0402_50V8JD@ 1 2
C665 100P_0402_50V8J C@1 2
C670 100P_0402_50V8J C@1 2
R381
300_0402_5%
@
12
C612
0.1U_0402_16V4Z
@
1
2
C599 100P_0402_50V8JD@ 1 2
G
D
S
Q20
2N7002_SOT23@
2
13
C661 100P_0402_50V8JD@ 1 2
C593 100P_0402_50V8JD@ 1 2
C681 100P_0402_50V8J C@1 2
C586 100P_0402_50V8JD@ 1 2
C668 100P_0402_50V8J C@1 2
U30
TSOP6236TR_4P
CIR@
OUT
4Vs
3GND 1
GND 2
C674 100P_0402_50V8J C@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAPSLED# PR_LED_VSPA_LED_VS
PMLED_1#
BATLED_0#
CARD_LED
ACT_LED
CAPSLED# PA_LED_VS
PMLED_1#<37,38>
BATLED_0#<37,38>
ACT_LED<24>
CAPSLED#<37,38>
CARD_LED<25,26>
PR_LED <34,35>PA_LED <34,35>
PA_LED_ALW <34,35,38>
PA_LED_VS <34,35>
PR_LED_VS <34,35>
PR_LED_ALW <34,35>
PA_LED_VS <34,35> PR_LED_VS <34,35>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
INDICATE LED
Custom
36 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
FOR POWER BUTTON BACKLIGHT SYSTEM POWER FOR POWER BUTTON BACKLIGHT SYSTEM POWER
For PA For PR
"Vertical" "Right Angle"
for 15.4 PA
"Right Angle"
5/4 change
"Vertical"
5/10 change
R392
150_0402_5%
12
R397
150_0402_5%
PA@
1 2
D18
HT-170NBQA_0805
21
D25
17-21UYOC/S530-A2/TR8_ORG
PR@
21
D24
17-21UYOC/S530-A2/TR8_ORG
15.4@
21
R468
1K_0402_5%
7411@
12
R394
680_0402_5%
15.4@
1 2
D21
HT-170NBQA_0805
21
R393
150_0402_5%
1 2
D23
HT-170NBQA_0805
D@
21
R389
680_0402_5%
15.4@
1 2
D20
HT-170NBQA_0805
21
R391
680_0402_5%
15.4@
12
R390
150_0402_5%
1 2
R396
680_0402_5%
15.4@
1 2
D34
HT-170NBQA_0805
15.4@
21
R566
680_0402_5%
PR@
1 2
R395
150_0402_5%
D@
1 2
D22
12-21UYOC/S530-A2/TR8_YEL
15.4@
2
13
R574
150_0402_5%
15.4@
1 2
D26
HT-110NBQA_0805
PA@
21
D17
12-21UYOC/S530-A2/TR8_YEL
15.4@
2
13
Q21
MMBT3904_SOT23
7411@
2
3 1
D19
12-21UYOC/S530-A2/TR8_YEL
15.4@
2
13
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
KBA5
BID
PS2_DATA
PS2_CLK
KBD_DATA
KBD_CLK
EC_TINIT#
GPIO6
GPIO5
KBA1
KBA3
SUSP#
EC_RSMRST#
URXD
EC_TINIT#
UTXD
KB_RST#
KSI0
KBD_CLK
KBD_DATA
TP_CLK
LPC_AD1
KSI1
LPC_AD2
KSI3
EC_RST#
PS2_CLK
SIRQ
LPC_AD0
LPC_FRAME#
PS2_DATA
LPC_AD3
KSI6
TP_DATA
KSI2
CRY1
ENABLT
EC_SMI#
CLK_PCI_EC
BKOFF#
SYSON
LID_SW#
CRY2
EC_MUTE#
VR_ON
EC_SCI#
GPIO6
GPIO5
PWR_ACTIVE#
BATLED_0#
PMLED_1#
BATT_OVP
NUMLED#
LID_OUT#
FSTCHG
ACOFF
CIR_IN
ACIN
PWRBTN_OUT#
DAC_BRIG
PME_EC#
ECAGND
DOCK_VOL_UP#
DOCK_VOL_DWN#
ADB6
KBA7
KBA6
KBA2
KBA1
ADB1
ADB0
KBA3
ADB5
ADB4
ADB3
ADB2
KBA4
KBA18
ADB7
KBA16
KBA10
KBA12
KBA5
KBA17
KBA15
KBA11
KBA0
KBA8
KBA14
KBA13
KBA9
EC_SMD_1
CAPSLED#
EC_SMC_1
BID
INVT_PWM
ON/OFF#
SLP_S3#
SLP_S5#
EC_ON
KBA19
EN_FAN1
CONA#
IREF
EC_GA20
ECAGND
ADP_IR
PCI_RST#
EC_THERM#
EC_SMD_2
EC_SMC_2
FAN_SPEED1
CRY2
CRY1
VOL_DWN#
VOL_UP#
EC_SWI#
KSI7
KSI4
KSI5
KBA[0..19]
ADB[0..7]
KSI[0..7]
TP_DATA
TP_CLK
FSEL#
FWR#
FRD#
AIR_ACIN
KSO17
VLDT_EN
M_SEN#
UTXD
URXD
KSO15
KSO10
KSO[0..17]
KSO11
KSO8
KSO14
KSO13
KSO5
KSO6
KSO0
KSO12
KSO4
KSO16
KSO9
KSO1
KSO2
KSO3
KSO7
LPC_FRAME#<19,35,38>
LPC_AD1<19,35,38> LPC_AD2<19,35,38>
LPC_AD0<19,35,38>
SIRQ<19,25,35,38>
CLK_PCI_EC<19,23,38>
KSO[0..17]<34,35,38>
TP_DATA<35,38> SUSP# <28,38,39,41>
ENABLT<13,17,38>
EC_SMI#<20,38>
VR_ON <38,48>
BKOFF#<17,38>
EC_GA20<20,38>
EC_RSMRST#<20,38>
EC_MUTE#<33,38>
KB_RST#<20,38>
TP_CLK<35,38>
LPC_AD3<19,35,38>
SYSON <28,38,41,46>
EC_RST#<38>
LID_SW# <34,35,38>
PMLED_1# <36,38>
PWR_ACTIVE# <34,35,38>
BATLED_0# <36,38>
EC_SCI#<20,38>
ADP_I <44>
PME_EC# <29,30,38>
ON/OFF# <35,38>
CAPSLED#<36,38>
EC_ON <35,38,45>
DAC_BRIG <17,38>
INVT_PWM <17,38>
SLP_S5# <20,38>
PWRBTN_OUT# <20,38>
EN_FAN1 <4,38>
LID_OUT# <20,38>
EC_SMC_1 <38,39,49>
SLP_S3# <20,38>
EC_SMD_1 <38,39,49>
ACOFF <38,44>
IREF <38,44>
CIR_IN <35,38,40>
CONA#<38,40>
BATT_TEMP <38,49>
BATT_OVP <38,44>
FSTCHG<38,44>
BID <38>
ADP_IR <38>
NUMLED#<34,35,38>
DOCK_VOL_UP#<38,40>
DOCK_VOL_DWN# <38,40>
PCI_RST# <19,25,27,29,30,35,38>
EC_THERM# <20,38>
EC_SMC_2 <4,38>
EC_SMD_2 <4,38>
FAN_SPEED1 <4,38>
CRY1<38> CRY2<38>
ECAGND <38>
VOL_DWN# <34,35,38>
VOL_UP#<34,35,38> EC_SWI#<20,38>
KBA[0..19]<38,39>
ADB[0..7]<38,39>
KSI[0..7]<34,35,38>
UTXD <38>
FSEL# <38,39>
FRD# <38,39>
FWR# <38,39>
URXD <38>
AIR_ACIN <38,44>
VLDT_EN <38,42>
M_SEN#<18,38>
MUTE_GATE <31,38>
ACIN <38,43,45>
+3VL
+5VS
+5VS
+3VL
+3VL
+3VL +EC_AVCC
+3VL
+5V
LDO5
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
EC KB910
Custom
37 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
EC DEBUG port
5/3 change 5/3 change
5/3 change
5/3 change
5/3 change
Cayenne 17"
R409
R406
Boxter 15.4"
High
Low
Board ID
6/27 change
R404
10K_0402_5%
910@
1 2
R406
1K_0402_5%
D@
12
R411
10K_0402_5% 12
R408
10K_0402_5%
910@ 12
Y6
32.768KHZ_12.5P_1TJS125DJ2A073
OUT 4
IN 1
NC
3
NC
2
R409
1K_0402_5%
C@
12
C617
0.22U_0603_10V7K
1
2
R410
10K_0402_5%
12
J3
JOPEN
12
R400
47K_0402_5%
1 2
R401
10K_0402_5%
@
1 2
Host interface
Key matrix scan
PS2 interface
AD Input or GPI
DA output or GPO
PWM
or GPOW
GPIO2
GPWU or GPI
SM BUS
GPIO1
GPIO0
BIOS I/F
PWR/GND
FAN/PWM
U32
KB910_LQFP176
910@
GPIO02/GA20
5
GPIO03/KBRST#
6
LAD0/FWH0
15
LAD1/FWH1
14
LAD2/FWH2
13
LAD3/FWH3
10
ECRST#
19
LFRAME#
9SERIRQ
7
LCLK
18
ECSCI#
31
GPIO09
22
NUMLOCK#/GPIO0A
23
GPIO04
8
VCC0 16
VCC1 34
VCC2 45
VCC3 123
VCC4 136
VCCA 95
VCCBAT 161
KSI0/GPIK0
71
KSI1/GPIK1
72
KSI2/GPIK2
73
KSI3/GPIK3
74
KSI4/GPIK4
77
KSI5/GPIK5
78
KSI6/GPIK6
79
KSI7/GPIK7
80
KSO0/GPOK0
49
KSO1/GPOK1
50
KSO2/GPOK2
51
KSO3/GPOK3
52
KSO4/GPOK4
53
KSO5/GPOK5
56
KSO6/GPOK6
57
KSO7/GPOK7
58
KSO8/GPOK8
59
KSO9/GPOK9
60
KSO10/GPOK10
61
KSO11/GPOK11
64
KSO12/GPOK12
65
KSO13/GPOK13
66
KSO14/GPOK14
67
KSO15/GPOK15
68
GPIO21/E51RXD/ISPCLK 106
A20/GPIO23 108
GPIO22/E51TXD/ISPDAT 107
GPIO24 109
PSCLK1
110
PSDAT1
111
PSCLK2
114
PSDAT2
115
PSCLK3
116
PSDAT3
117
GPIO25 118
GPIO26 119
XCLKI
158
XCLKO
160
AD0/GPIAD0 81
AD1/GPIAD1 82
AD2/GPIAD2 83
AD3/GPIAD3 84
AD4/GPIAD4 87
AD5/GPIAD5 88
AD6/GPIAD6 89
AD7/GPIAD7 90
GPIO1C/XIOCCS# 93
GPIO1D/XIODCS# 94
DA0/GPODA0 99
DA1/GPODA1 100
DA2/GPODA2 101
DA3/GPODA3 102
PWM0/GPOW0 32
PWM1/GPOW1 33
PWM2/GPOW2/FAN1PWM 36
PWM3/GPOW3 37
PWM4/GPOW4 38
PWM5/GPOW5 39
PWM6/GPOW6 40
PWM7/GPOW7/FAN2PWM 43
KSO16/GPOK16
153
KSO17/GPOK17
154
GPIO2B 162
SCL1 163
SDA1 164
LRST#/GPIO2C 165
GPIO2D 168
SCL2 169
SDA2 170
FANFB1/TOUT1/GPIO2E 171
GPWU6/TIN1 172
TOUT2/GPIO2F 175
GPWU7/TIN2/FANFB2 176
DA4/GPODA4 1
GPWU0 2
GPWU4 44
GPIO0B
24
CLKRUN#/GPIO0C
25
AGND 96
GND1 17
GND2 35
GND3 46
GND4 122
BATGND 159
GPWU1 26
GPWU2 29
GPWU3 30
VCC5 157
VCC6 166
GND6 167
GND7 137
SCROLLLOCK#/GPIO0F
41
DA5/GPODA5 42
CAPLOCK#/GPIO11
54
FNLOCK#/GPIO12
55
GPIO13
62
GPIO14
63
GPIO15
69
GPIO16
70
GPIO17
75
GPWU5 76
GPIO27 148
GPIO28 149
GPIO29 155
GPIO2A 156
GPIO00/E51IT0
3
GPIO01/E51IT1
4
GPIO0D
27
GPIO0E
28
GPIO10
48
DA7/GPODA7 174
DA6/GPODA6 47
GPIO06/FANFB3/DPLL_TP 12
GPIO07
20
GPIO08
21
GPIO18/XIO8CS# 85
GPIO19/XIO9CS# 86
GPIO1A/XIOACS# 91
GPIO1B/XIOBCS# 92
GPIO1E/XIOECS# 97
GPIO1F/XIOFCS# 98
GPIO05/FAN3PWM/TEST_TP 11
D0
138
D1
139
D2
140
D3
141
D4
144
D5
145
D6
146
D7
147
RD#
150
WR#
151
IOCS#
152
MEMCS#
173
A0
124
A1/XIOP_TP
125
A2
126
A3
127
A4/DMRP_TP
128
A13
129 A12
130
A5/EMWB_TP
131
A6
132
A7
133
A11
134 A10
135
A14
121
A15
120
A16
113
A17
112
A18
104
A19
103
A8
143
A9
142
GPIO20/E51CS#/ISPEN_TP 105
R405
10K_0402_5%
910@
12
R413
10K_0402_5%
910@
12
R414
10K_0402_5%
910@
12
R412
10K_0402_5%
910@
12
C616
0.01U_0402_16V7K
1 2
C618
0.1U_0402_16V4Z
1
2
C619
10P_0402_50V8K
1
2
JP31
ACES_85205-0400
11
22
33
44
R407
10K_0402_5%
910@
12
C614
1U_0603_10V6K
910@
1
2
R399
10K_0402_5%
1 2
R402
10K_0402_5%
@
1 2
C620
10P_0402_50V8K
1
2
R403
10K_0402_5%
910@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_VOL_UP#
UTXD
EC_MUTE#
PCI_RST#
CIR_IN
EC_SMC_2
EC_SMD_2
EC_SMC_1
EC_SMD_1
FRD#
EC_SMI#
FSEL#
PWR_ACTIVE#
ECAGND
ECAGND
URXD
TP_DATA
ADB1
TP_CLK
ADB0
ADB5
ADB6
ADB3
ADB7
KBA7
KBA3
KBA1
ADB4
ADB2
KBA2
KBA4
KBA6
KBA0
KBA5
KBA9
KBA10
KBA11
KBA15
KBA13
KBA14
KBA8
KBA17
KBA16
KBA18
KBA12
KBA19
FRD#
FWR#
EC_ON
ACIN
EC_THERM#
FSTCHG
BATT_TEMP
ON/OFF#
ADB[0..7]
KBA[0..19]
BATT_OVP
DAC_BRIG
EN_FAN1
ACOFF
INVT_PWM
IREF
FAN_SPEED1
VR_ON
FSEL#
CONA#
ADP_IR
LPC_AD0
LPC_AD1
EC_GA20
LPC_AD2
KB_RST#
LPC_AD3
SIRQ
LPC_FRAME#
CLK_PCI_EC
KSI3
KSI0
KSI1
KSI5
KSI6
KSI2
EC_SMD_1
KSO16
KSI7
KSI4
LID_SW#
EC_SMC_2
EC_SMC_1
EC_SMD_2
EC_SWI#
EC_SMI#
EC_RSMRST#
CRY2
PME_EC#
SLP_S3#
SUSP#
PWRBTN_OUT#
CRY1
SYSON
NUMLED#
CAPSLED#
BATLED_0#
BKOFF#
SLP_S5#
PMLED_1#
EC_RST#
EC_SCI#
LID_OUT#
CLK_PCI_EC
DOCK_VOL_UP#
DOCK_VOL_DWN#
VOL_UP#
VOL_DWN#
KSO1
KSO[0..16]
KSO10
KSO8
KSO3
KSO6
KSO4
KSO9
KSO5
KSO0
KSO7
KSO2
KSO11
KSI[0..7]
KSO12
KSO13
KSO14
KSO15
VOL_UP#
DOCK_VOL_DWN#
AIR_ACIN
VLDT_EN
KSO17
BID
VOL_DWN#
LID_SW# ENABLT
PME_EC#
ACIN_2
ACINACIN_2
M_SEN#
EC_GA20<20,37>
LPC_AD0<19,35,37>
KB_RST#<20,37>
LPC_FRAME#<19,35,37> SIRQ<19,25,35,37>
CLK_PCI_EC<19,23,37>
LPC_AD3<19,35,37> LPC_AD2<19,35,37> LPC_AD1<19,35,37>
KSO[0..16]<35,37>
EC_SCI#<20,37>
PCI_RST#<19,25,27,29,30,35,37>
EC_SMD_2<4,37>
EC_SMD_1<37,39,49> EC_SMC_1<37,39,49>
EC_SMC_2<4,37>
LID_SW#<34,35,37>
BKOFF#<17,37>
EC_SWI#<20,37>
SLP_S5#<20,37> EC_SMI#<20,37>
SUSP#<28,37,39,41>
SLP_S3#<20,37>
PME_EC#<29,30,37>
PWRBTN_OUT#<20,37>
SYSON<28,37,41,46>
EC_RSMRST#<20,37>
LID_OUT#<20,37>
NUMLED#<34,35,37>
CAPSLED#<36,37>
PMLED_1#<36,37>
BATLED_0#<36,37>
TP_DATA <35,37>
TP_CLK <35,37>
FSEL# <37,39>
FRD# <37,39>
FWR# <37,39>
EC_ON <35,37,45>
ACIN <37,43,45>
EC_THERM# <20,37>
ON/OFF# <35,37>
FSTCHG <37,44>
BATT_TEMP <37,49>
BATT_OVP <37,44>
DAC_BRIG <17,37>
EN_FAN1 <4,37>
IREF <37,44>
INVT_PWM <17,37>
ACOFF <37,44>
FAN_SPEED1 <4,37>
VR_ON <37,48>
ADB[0..7] <37,39>
KBA[0..19] <37,39>
CONA# <37,40>
ECAGND <37>
EC_RST#<37>
ADP_IR <37>
CRY2<37> CRY1<37>
PWR_ACTIVE# <34,35,37>
EC_MUTE# <33,37>
CIR_IN <35,37,40>
URXD<37>
DOCK_VOL_UP# <37,40>
UTXD<37>
KSI[0..7]<34,35,37>
VOL_UP# <34,35,37>
DOCK_VOL_DWN# <37,40>
AIR_ACIN <37,44>
KSO17<34,35,37>
BID <37>
VOL_DWN# <34,35,37>
VLDT_EN <37,42>
ENABLT <13,17,37>
PA_LED_ALW<34,35,36>
MUTE_GATE <31,37>
M_SEN# <18,37>
+EC_AVCC+3VL
+3VL +EC_AVCC
+3VL
+3VL
+5VALW
+3VS
+3VL
+3VLLDO3
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
EC KB910L
Custom
38 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
5/3 change
5/3 change
5/3 change
5/3 change
Close to PR184
5/3 change
4/27 change
4/27 pop
High : PA
Low : PR
5/11 add
07/04 for EMI
07/28 for lower power consumption
8/23 reseve R600, currently M_SEN# isn't used
R421
10K_0402_5%
1 2
C621
4.7U_0805_6.3V6K
1
2
RP57
10K_0804_8P4R_5%
18 27 36 45
RP58
10K_0804_8P4R_5%
18 27 36 45
C626
0.1U_0402_16V4Z
1
2
R585
2K_0402_5%
1 2
R420
10K_0402_5%
1 2
R419
10K_0402_5%
1 2
R415
10_0402_5%
12
R418
10K_0402_5%
1 2
C625
0.1U_0402_16V4Z
1
2
R596
0_0402_5%
@
1 2
C622
0.1U_0402_16V4Z
1
2
R575
4.7K_0402_5%
1 2
C624
0.01U_0402_16V7K
1
2
L31
FBML10160808121LMT_0603
1 2
R600 0_0402_5%@
1 2
R584
1K_0402_5%
12
C623
0.1U_0402_16V4Z
1
2
R576
0_0805_5%
1 2
R577
0_0805_5%
@
1 2
C628
15P_0402_50V8J
1
2
L30
FBML10160808121LMT_0603
1 2
Host
PS2 interface
DA output or GPO
SM BUS
PWR
FAN/PWM
INTERFACE
key Matrix
scan
AD INtput or GPI
Address
BUS
Data
BUS
U33
KB910L_LQFP144
LPC AD0/LAD0
12 LPC AD1/LAD1
10 LPC AD2/LAD2
9LPC AD3/LAD3
6
PM_CLKRUN#/ CLKRUN#
44
LPC_FRAME# / LFRAME#
5SERIRQ
3
CLK_PCI_EC/PCICLK
14
BATT LOW LED#/ E51MR0
101
VCC/ EC VCC 11
VCC / EC VCC 26
VCC 127
VCC 141
EC_AVCC / AVCC 75
KSI0/GPIO30
63
KSI1/GPIO31
64
KSI2/GPI032
65
KSI3/GPIO33
66
KSI4/GPIO34
67
KSI5/GPI035
68
KSI6/GPIO36
69
KSI7/GPIO37
70
KSO0/GPIO20
47
KSO1/GPIO21
48
KSO2/GPIO22
49
KSO3/GPIO23
50
KSO4/GPIO24
51
KSO5/GPIO25
52
KSO6/GPIO26
53
KSO7/GPIO27
54
KSO8/GPIO28
55
KSO9/GPIO29
56
KSO10/GPIO2A
57
KSO11/GPIO2B
58
KSO12/GPIO2C
59
KSO13/GPIO2D
60
KSO14/GPIO2E
61
KSO15/GPIO2F
62
KBRST#/GPIO01/KBRST#
2
PM SLP S3#/GPIO04
8BKOFF#/GPIO03
7
PM SLP S05#/ GPIO07
17
PSCLK1 91
PSDAT1 92
PSCLK2 93
PSDAT2 94
PSCLK3 95
PSDAT3 96
LID SW#/ GPIO0A
20
SUSP#/GPIO0B
21
XCLKO
140
XCLKI
138
BATTEMP/AD0/GPIO38 71
BATT OVP/AD1/GPIO39 72
ADP_I/AD2/GPIO3A 73
AD BID0/AD3/GPIO3B 74
DAC_BRIG/DA0/GPIO3D 76
EN DFAN1/DA1/GPIO3D 78
IREF2/DA2 79
EN DFAN2/DA3/ GPIO3F 80
INVT_PWM/GPIO0F/PWM1 25
BEEP#/GPIO10/PWM2 27
GPIO57/GPIO57 137
EC SMC1/GPIO44/SCL1
85
GPIO58/GPIO58 142
GPIO59/GPIO59 143
EC SMC2/GPIO46/SCL2
87 EC SMD2/ GPIO47/SDA2
88
FAN SPEED1/GPIO14/FANFB1 32
FSEL#/SELMEM# 144
FAN SPEED2/GPIO15/FANFB2 33
GND
13
GND
28
GND
39
GND
103
EC RST#/ ECRST#
42
AC IN/ GPIO1C 43
PCMRST#/GPIO1E 45
WL OFF#/GPIO1F 46
PBTN_OUT#/GPIO0C
22
ONOFF/GPIO18 36
FRD#/RD# 135
FWR#/WR# 136
BATT CHGI LED#/ E51CS#
99
CAPS LED#/ E51TMR1
100
EC ON/ GPIO1B 41
ACOFF/GPIO18/PWM4 31
ARROW LED#/ E51 INT0
102
OUT BEEP/GPIO12/PWM3 30
ADB0/D0 125
ADB1/D1 126
ADB2/D2 128
ADB3/ D3 130
ADB4/D4 131
KBA0/A0 111
KBA1/A1 112
KBA2/A2 113
KBA3/A3 114
KBA4/A4 115
KBA13/A13 124
KBA12/A12 123
KBA5/A5 116
KBA6/A6 117
KBA7/A7 118
KBA11/A11 122
KBA10/A10 121
KBA14/A14 110
KBA15/A15 109
KBA16/A16 108
KBA17/A17 107
KBA18/A18 106
KBA19/A19 98
KBA8/A8 119
KBA9/A9 120
GA20/ GPIO00/GA20
1
VCC / EC VCC 37
VCC / EC VCC 105
AGND
77
GND
129 GND
139
PCIRST#
15
EC URXD/KSO16/GPIO48
89
EC UTXD/KSO17/GPIO49
90
ADB5/D5 132
ADB6/D6 133
ADB7/D7 134
EC_RSMRST#/ GPIO02
4
EC LID OUT#/GPIO06
16
EC SMI#/GPIO08
18
EC SWI#/GPIO09
19
EC PME#/GPIO0D
23
ECTHERM#/GPIO11 29
SYSON/GPIO56/ E51 INT1
104
ALI/MH#/GPIO40 81
FSTCHG/GPIO41 82
VR ON/ GPIO42 83
SELIO2#/ GPIO43 84
EC SMD1/GPIO44/SDA1
86
SELIO#/ GPIO50 97
PWRLED#/ GPIO19
38
PCM_SPK#/EMAIL_LED#/ GPIO16
34
SB_SPKR/PWR_SUSP_LED#/ GPIO17
35
NUMLED#/ GPIO1A
40
EC SCI#/SCI#/GPIO0E
24
KBA5
FWE#
KBA12
KBA[0..19]
ADB2
KBA3
KBA8
KBA0
KBA17
ADB5
KBA1
ADB0
KBA11
KBA6 KBA13
ADB1
KBA15
ADB6
KBA10
ADB7
KBA4
FSEL#
KBA7
ADB[0..7]
ADB3
KBA16
KBA2
KBA9
KBA14
KBA18
ADB4
FRD#
ADB3
ADB2
KBA19
RESET#
KBA13
KBA9
ADB4
KBA0
ADB6
KBA15
FSEL#KBA2
KBA6
ADB7
ADB5
FRD#KBA4
KBA10
KBA11
KBA5
KBA7
KBA1
KBA12
ADB1
KBA18
KBA16
KBA8
FWE#
KBA3
KBA17
KBA14
ADB0
KBA17
ADB7
KBA2
KBA18
ADB4
ADB0
KBA12
KBA10
RESET#
KBA7
ADB6
KBA16
FSEL#
ADB3
KBA15
FWE#
KBA14
ADB1
KBA19
KBA3
KBA4
KBA9
KBA6
ADB5
KBA5
KBA0
KBA13
KBA8
ADB2
KBA1
KBA11
FRD#
FWE#
EC_SMC_1<37,38,49>
ADB[0..7]<37,38>
EC_FLASH# <20>
FWR# <37,38>
EC_SMD_1<37,38,49>
KBA[0..19]<37,38>
FSEL#<37,38> FRD#<37,38>
SUSP# <28,37,38,41>
+3VL
+3VLE+3VLE
+3VL
+3VL
+3VALW
+3VL
+3VL
LDO3
+3VALW
+3VLE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
BIOS & EC I/O Port
Custom
39 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
5/3 change
5/3 change
5/3 change
5/3 change
5/3 change
5/4 change
G
D
S
Q22
2N7002_SOT23
@
2
1 3
R423
100K_0402_5%
12
R422
10K_0402_5%
@
12
R425
100K_0402_5%
12
R424
100K_0402_5%
@
1 2
U37
AT24C16AN-10SI-2.7_SO8
A0 1
A1 2
SDA
5SCL
6
VCC
8
A2 3
GND 4
WP
7
R579
0_0402_5%
1 2
C631
0.1U_0402_16V4Z
1
2
U35A
SN74LVC32APWLE_TSSOP14 @
A1
B2
O
3
P14
G
7
JP32
SUYIN-80065A-040G2T
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R580
0_0402_5%
@
1 2
U34
SST39VF040-70-4C-NH_PLCC32
A18
1
A16
2
A15
3
A12
4
A7
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
12
DQ0
13
DQ1
14
DQ2
15
DQ3 17
DQ4 18
DQ5 19
DQ6 20
DQ7 21
CE# 22
A10 23
OE# 24
A11 25
A9 26
A8 27
A13 28
A14 29
WE# 31
VDD 32
VSS
16
A17 30 C629
0.1U_0402_16V4Z
1
2
R578
0_0402_5%
1 2
C630
0.1U_0402_16V4Z
@1
2
U36
SST39VF080-70_TSOP40 @
A0
21
A1
20
A2
19
A3
18
A4
17
A5
16
A6
15
A7
14
A8
8
A9
7
A10
36
A11
6
A12
5
A13
4
A14
3
A15
2
A16
1
A18
13
CE#
22
OE#
24
D0 25
D1 26
D2 27
D3 28
D4 32
D5 33
D6 34
D7 35
GND1 39
A17
40
WE#
9
VCC1 30
VCC0 31
GND0 23
A19
37
NC0 29
NC1 38
NC 11
RP# 10
READY/BUSY# 12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DOCK_PRESENT
DOCK_PRES_GND
DOCK_LOUT_L_R
XTPB1-
XTPA1+
V_Bat
MUTE_LED
CIR_IN
MDO0+
XTPA1-
JACK_DET#
MDO1-
MDO1+
DOCK_MIC
MDO0-
DOCK_PRES_GND
DOCK_PRESENT
XTPB1+
SPDIFO_L
TV_LUMA_R
DOCK_LOUT_R_R
TV_COMPS_R
USBP1+
USBP1-
TV_CRMA_R
DOCK_LOUT_R_R
DOCK_LOUT_L_R
TV_COMPS_R
TV_LUMA_R
TV_CRMA_R
CONA#<37,38>
MUTE_LED<31,34,35>
SPDIFO<31,35>
XTPB1+<25>
MDO0- <29>
DOCK_VOL_DWN# <37,38>
CIR_IN <35,37,38>
DOCK_MIC <35>
V_Bat <44>
MDO1+<29>
SB_SPDIFO<20,23>
MDO1-<29>
USBP1- <20>
MDO0+ <29>
DOCK_VOL_UP# <37,38>
XTPA1+<25>
USBP1+ <20>
XTPB1-<25>
XTPA1-<25>
JACK_DET#<33>
DOCK_LOUT_R <31>
DOCK_LOUT_L <31>
TV_LUMA <13,18>
TV_COMPS <13,18>
TV_CRMA <13,18>
+5V
DOCKVINDOCK_VIN
+3VALW
+5VS
+5V +5V
DOCKVINDOCKVIN
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
DOCK CONN
Custom
40 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
Tampa 2
EMI
07/07 for EMI
07/07 for EMI
R595
0_0603_5%
12
Q23
MMBT3904_SOT23
DOCK@
2
3 1
C745
1000P_0402_50V7K
@
1
2
R592
0_0402_5%
1 2
C633
1000P_0402_50V7K
DOCK@
1
2
C751
270P_0402_25V8K
@
1
2
R426
22_0402_5%
DOCK@
1 2
L32
KC FBM-L18-453215-900LMA90T_1812
DOCK@
1 2
R593
0_0603_5%
12
C746
1000P_0402_50V7K
@
1
2
C748
330P_0402_50V7K
@
1
2
R428
22_0402_5%
@
1 2
R430
10K_0402_5%
DOCK@
12
JP33
FOX_QL11293-H212CR-FR
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
54 54
56 56
58 58
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
GND 60
GND
59
R594
0_0603_5%
12
C747
270P_0402_25V8K
@
1
2
C752
330P_0402_50V7K
@
1
2
C634
1000P_0402_50V7K
DOCK@
1
2
C749
270P_0402_25V8K
@
1
2
C635
1000P_0402_50V7K
DOCK@
1
2
R429
200_0402_5%
DOCK@
1 2
C632
1000P_0402_50V7K
DOCK@
1
2
R427 100_0402_5% DOCK@ 1 2
C636
0.1U_0402_16V4Z
DOCK@ 1
2
C637
10U_0805_10V4Z
DOCK@
1
2
C638
1000P_0402_50V7K
@
1
2
C729
1000P_0402_50V7K
@
1
2
C750
330P_0402_50V7K
@
1
2
R4321K_0402_5% DOCK@
12
R431
200_0402_5%
DOCK@
12
R591
0_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
I
I
J
J
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
SYSON#
SUSON
SUSP
SUSP
SUSP
SYSON#
SUSP
RUNON
SUSPRUNON
SYSON#
RUNON
SUSPRUNON
SYSON#SYSON#
SYSON28,37,38,46SUSP#28,37,38,39
SUSP6,47 SYSON#47
+5VALW
+5V
B+
+5VALW
+5VS
B+
+5VALW
+5VALW
+1.8VALW +1.8VS+2.5V +2.5VS
+3VALW +3VS
+1.25V +2.5V
+5VALW
+5VALW
+3VALW
+5VALW
+3VALW
+3VALW
+3VS +3VS
+1.8VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
DC/DC Interface & Hole
Custom
41 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
+5VALW to +5V Transfer
+5VALW to +5VS Transfer
+1.8VALW to +1.8VS Transfer
+2.5V to +2.5VS Transfer
+3VALW to +3VS Transfer
07/11 change
U41
SI4800DY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
C732
0.1U_0402_16V4Z
@
1
2
C733
0.1U_0402_16V4Z
@
1
2
+
C703
100U_C_4VM
@
1
2
CF3
1
H13
HOLEA
1
H34
HOLEA
1
C648
0.1U_0402_16V4Z
1
2
CF4
1
C639
10U_0805_10V4Z 1
2
H29
HOLEA
1
R442
10_0805_5%
12
CF7
1
H15
HOLEA
1
FM3
1
C654
10U_0805_10V4Z
1
2
C652
0.1U_0402_16V4Z
1
2
R446
470_0402_5%
12
FM2
1
H25
HOLEA
1
H17
HOLEA
1
C641
0.1U_0402_16V4Z
1
2
R445
470_0402_5%
12
CF2
1
G
D
S
Q32
2N7002_SOT23
2
13
H32
HOLEA
1
H6
HOLEA
1
H26
HOLEA
1
CF8
1
G
D
S
Q35
2N7002_SOT23
2
13
H30
HOLEA
1
C646
10U_0805_10V4Z
1
2
CF5
1
+
C705
100U_C_4VM
@
1
2
G
D
S
Q28
2N7002_SOT23
2
13
H16
HOLEA
1
H19
HOLEA
1
G
D
S
Q34
2N7002_SOT23
2
13
G
D
S
Q27
2N7002_SOT23
2
13
H33
HOLEA
1
U39
SI4800DY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
C653
10U_0805_10V4Z
1
2
R435
10K_0402_5%
12
C734
0.1U_0402_16V4Z
@
1
2
H8
HOLEA
1
U38
SI4800DY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
H31
HOLEA
1
CF9
1
G
D
S
Q30
2N7002_SOT23
2
13
H12
HOLEA
1
H28
HOLEA
1
C645
0.1U_0402_16V4Z
1
2
C656
0.01U_0402_16V7K 1
2
C642
0.01U_0402_16V7K
1
2
H27
HOLEA
1
FM5
1
CF1
1
H4
HOLEA
1
G
D
S
Q26
2N7002_SOT23
2
13
H3
HOLEA
1
FM4
1
R439
470_0402_5%
12
R440
470_0402_5%
@
12
H1
HOLEA
1
U40
SI4800DY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
+
C704
100U_C_4VM
@
1
2
CF12
1
H20
HOLEA
1
R437
470_0402_5%
12
H5
HOLEA
1
R444
22K_0402_5%
12
R443
470_0402_5%
12
G
D
S
Q31
2N7002_SOT23
2
13
R438
100K_0402_5%
12
FM1
1
C655
0.1U_0402_16V4Z
1
2
C643
10U_0805_10V4Z 1
2
H10
HOLEA
1
G
D
S
Q29
2N7002_SOT23
@
2
13
FM6
1
R441
100K_0402_5%
12
H11
HOLEA
1
CF6
1
C644
10U_0805_10V4Z
1
2
H23
HOLEA
1
CF11
1
H9
HOLEA
1
U42
SI4800DY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
CF10
1
R436
47K_0402_5%
12
H7
HOLEA
1
H14
HOLEA
1
C647
10U_0805_10V4Z
1
2
C649
0.01U_0402_16V7K
1
2
G
D
S
Q25
2N7002_SOT23
2
13
C640
10U_0805_10V4Z
1
2
C650
10U_0805_10V4Z
1
2
C651
10U_0805_10V4Z
1
2
G
D
S
Q33
2N7002_SOT23
2
13
H22
HOLEA
1
H2
HOLEA
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VLDT_EN
VLDT_EN VLDT_EN#
NB_PWRGD 13
VLDT_EN37,38 SB_PWRGD 20
VLDT_EN# 47
+3VALW
+3VALW +3VALW +3VALW
+3VL
+3VALW
+3VALW
+3VL +3VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
P_OK
Custom
42 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
T1
T2
VLDT_EN
NB_PWRGD
SB_PWRGD
note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms,
SUSP# goes to low after SB_PWRGD goes to low for power
down.
SUSP#
+1.8VS
U44D
SN74LVC125APWLE_TSSOP14
I
12 O11
OE# 13
R449
10_0402_5%
1 2
R448
200K_0402_5%
1 2
U43D
SN74LVC14APWLE_TSSOP14
O8
I
9
P14
G
7
R450
10K_0402_5%
12
C657
0.1U_0402_16V4Z
1
2
U43E
SN74LVC14APWLE_TSSOP14
O10
I
11
P14
G
7
U43F
SN74LVC14APWLE_TSSOP14
O12
I
13
P14
G
7
U35C
SN74LVC32APWLE_TSSOP14
A
9
B
10 O8
P14
G
7
C658
0.1U_0402_16V4Z
1
2
R447
470K_0402_5%
1 2
U43B
SN74LVC14APWLE_TSSOP14
O4
I
3
P14
G
7
U35B
SN74LVC32APWLE_TSSOP14
A
4
B
5O6
P14
G
7
U44C
SN74LVC125APWLE_TSSOP14
I
9O8
OE# 10
U43C
SN74LVC14APWLE_TSSOP14
O6
I
5
P14
G
7
C659
0.47U_0603_16V7K
1
2
U43A
SN74LVC14APWLE_TSSOP14
O2
I
1
P14
G
7
U35D
SN74LVC32APWLE_TSSOP14
A
12
B
13 O11
P14
G
7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CHGRTCP
ADPIN
N36
N37
N33
N39
N50
N34
N62
PACIN
N35
N40N41
N30
N31
PACIN
N29
N32
N38
EC_PWR_ON#<35>
ACIN <37,38,45>
PACIN <44>
MAINPWON<45,49>
ACON<44>
+3VALW
+5VALW
+2.5VP
+3VALWP
+1.8VALW
+1.2V_HTP
+5VALWP +1.8VALWP
+2.5V +1.2V_HT
+1.25V
+1.25VP
VIN
ADPIN
RTCVREF
VIN
BATT+
CHGRTC
B+
VS
+1.5VSP +1.5VS
DOCK_VIN
VIN VIN
RTCVREF
VS
B+
VS
VL
+5VALWP
VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771 0.8
Custom
43 53Tuesday, August 30, 2005
2005/03/01 2006/03/01
3.3V
Detector
DCIN / Precharge
3.3V
18.234 17.841 17.449
17.597 17.210 16.813
Vin Detector : Cayenne
Precharge detector
14.805 14.333 13.872
13.355 12.933 12.465
BATT
Detector
7.558 7.333 7.112
6.108 5.933 5.704
ACIN : Cayenne
Precharge detector
12.384 12.000 11.624
10.927 10.600 10.223
ACIN : Boxster
Cayenne : PR21=200K
Boxster : PR21=300K
14.352 13.950 13.555
13.818 13.411 13.000
Vin Detector : Boxster
Cayenne : PR5=22K; PR6=19.6K
Boxster : PR5=47K; PR6=27K
8/29 Change to 0.022uF
for AC Off issue
PR16
1M_0402_1%
12
PC7
1000P_0402_50V7K
12
PC5
0.01U_0603_50V7K
12
PR3
10K_0805_5%
12
PD4
1N4148_SOD80
1 2
PJP6
JUMP_43X118@
1
122
PC9
0.1U_0603_25V7K
12
PJP21
JUMP_43X118@
1
122
PJP4
JUMP_43X118@
1
122
PR17
200_0603_5%
12
PJP7
JUMP_43X118@
1
122
PD29
SBM1040-13_POWERMITE3@
1
2
3
1
2
3
4
PCN1
ACES_88290-0400M
PC4
1000P_0402_50V7K
12
PR1
1M_0603_0.5%
1 2
PR23
1M_0402_1%
12
PJP24
JUMP_43X39@
11
2
2
PR24
10K_0603_5%
12
PC1
100P_0402_50V8J
12
PD5
RB715F_SOT323
2
31
PR6
19.6K_0603_0.1%
12
PC3
100P_0402_50V8J
12
PC8
0.22U_1206_25V7K
12
PR20
200_0603_5%@
1 2
PR7
10K_0603_5%
12
PR9
10K_0603_5%
12
PR11
47_1206_5%
12
PC10
1U_0805_50V4Z
12
PR183
47_1206_5%
1 2
PR21
200K_0603_1%
12
PR14
22K_0603_5%
1 2
PR12
1K_1206_5%
1 2
PJP1
JUMP_43X118@
1
122
PR10
1K_1206_5%
1 2
PU1A
LM393M_SO8
+
3
-
2O1
P8
G
4
PJP2
JUMP_43X118@
1
122
PR5
22K_0603_1%
1 2
PJP5
JUMP_43X118@
1
122
PL1
FBM-L18-453215-900LMA90T_1812
1 2
PC2
1000P_0402_50V7K
12
PC13
0.1U_0603_25V7K
12
PR2
82.5K_0603_0.1%
12
PU2
G920AT24U_SOT89
IN 2
GND
1
OUT
3
PR18
280K_0603_1%
12
PU1B
LM393M_SO8
+5
-6
O
7
P8
G
4
PD3
1N4148_SOD80
12
PZD1
RLZ4.3B_LL34
12
PD1
SBM1040-13_POWERMITE3@
1
2
3
PR8
1K_1206_5%
1 2
PR13
100K_0603_1%
12
PC6
0.022U_0603_25V7K
12
PR22
1.5M_0603_1%
12
PC12
1000P_0402_50V7K
12
PC11
4.7U_0805_6.3V6K
12
PJP3
JUMP_43X118@
1
122
PJP10
JUMP_43X118@
1
122
PJP8
JUMP_43X118@
1
122
PQ1
TP0610K_SOT23
13
2
PR19
200_0603_5%@
1 2
PJP9
JUMP_43X118@
1
122
G
D
S
PQ2
2N7002_SOT23
2
13
PJP20
JUMP_43X118@
1
122
PR15
10K_0603_5%
1 2
PC14
1000P_0603_50V7K
12
PR4
1K_0603_5%
1 2
PD2
1N4148_SOD80
12
PQ3
DTC115EUA_SC70
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
N49
3887FB2
DIS
3887+INE1
3887FB3
3887+INE2
N1
PACIN
ACOFF#
N12
N13
3887CS
N11
ACON
3887-INE2
3887-INE1
N14
N15
N16
3887VH
3887CS
3887FB1
3887RT
3887VCC(O)
3887+INC1
3887OUT
3887OUTD
3887OUTC1
3887-INE3
3887-INC1
N17
N18
3887CS
N19
N20
3887VREF
N21
ACOFF#
ACOFF <37,38>
IREF<37,38>
BATT_OVP<37,38>
FSTCHG<37,38>
ADP_I<37>
PACIN<43>
ACON<43>
AIR_ACIN<37,38>
V_Bat<40>
VIN
BATT+
P3
B+
B++
BATT++
+3VALWP
VS
VIN
P2
VIN
RTCVREF
VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771 0.8
Custom
44 53Tuesday, August 30, 2005
2005/03/01 2006/03/01
Charger
Iadp=0~3.0A
CC=0.4~3.0A
IREF=0.548~3.288V
IREF=1.096*Icharge
4.2V
(17V+-5%)
5.0V
Battery OVP voltage :
3S2P/3S3P : 13.5V--> BATT_OVP= 2.0V
(BAT_OVP=0.1112*VMB)
4S2P : 18V--> BATT_OVP= 2.0V
(BAT_OVP=0.14753 *BATT+)
BATT_OVP Select
4S2P PR55 = 0_0603_5%
3S2P/3S3P PR55 = 40.2K_0603_1%
BATT_Charge Voltage Select
4S2P CV=16.8V PR44 = 49.9K_0603_0.1% PR45=150K_0603_0.1%
3S2P/3S3P CV=12.6V PR44 = 150K_0603_0.1% PR45=300K_0603_0.1%
Charger
Cayenne : PR34=2.74k
Boxster : PR34=4.7K
PR31
10K_0402_1%
12
PC19 2200P_0402_50V7K
1 2
PR52
10K_0603_5%
12
PD10
SKS30-04AT_TSMA
2 1
PC33
0.01U_0402_25V7Z
12
PR39
0.02_2512_1%
12
PZD2
RLZ4.3B_LL34
12
PC22
0.1U_0402_16V7K
12
PQ4
AO4407_SO8
3 6
5
7
8
2
4
1
PD9
SKS30-04AT_TSMA@
2 1
PR33
31.6K_0603_1%
12
PC23
0.1U_0603_25V7K
1 2
PR188
47K_0402_5%
12
PC24
0.1U_0402_16V7K
12
PR47
47K_0603_5%
12
PR40
10K_0603_1%
12
PR29
0_0402_5%
1 2
G
D
S
PQ8
2N7002_SOT23
2
13
PC32
0.01U_0402_25V7Z
12
PC25
1500P_0603_50V7K
1 2
PC26 0.1U_0603_25V7K
1 2
PJP12
JUMP_43X118@
1
122
PR48
499K_0603_1%
12
PD30
SKS30-04AT_TSMA
21
PQ7
DTC115EUA_SC70
2
13
PC31
0.1U_0402_16V7K
12
47K
47K
PQ40
DTA144EUA_SC70
2
1 3
PR43
100K_0603_1%
12
PQ39
AO4407_SO8
36
5
7
82
4
1
PC28
4.7U_1206_25V6K
12
PU4B
LM358ADR_SO8
+5
-6
0
7
PR26
15K_0603_5%
12
PR44
49.9K_0603_0.1%
12
PQ5
AO4407_SO8
3 6
5
7
8
2
4
1
PR42
174K_0603_1%
1 2
PC27
1500P_0603_50V7K
1 2
G
D
S
PQ42
2N7002_SOT23
2
13
PR28
47K_0603_5%
1 2
PR37
1K_0603_1%
1 2
PU4A
LM358ADR_SO8
+3
-2
0
1
P8
G
4
PR35
11K_0402_1%
12
PR34
2.74K_0402_1%
1 2
PR41
47K_0603_1%
1 2
PR49
10K_0603_5%
12
PQ41
DTC115EUA_SC70
2
13
PC16
4.7U_1206_25V6K
12
PC156
0.1U_0603_25V7K
12
PR51
42.2K_0603_1%
12
PQ9
DTC115EUA_SC70
2
13
PR55
0_0603_5%
12
PC15
4.7U_1206_25V6K
12
PR32
150K_0402_1%
12
PC17
0.1U_0603_25V7K
12
PR54
105K_0603_0.5%
12
PR46
340K_0603_1%
12
PC18
2200P_0402_50V7K
12
PR27
200K_0402_5%
12
PR30
10K_0603_5%
12
G
D
S
PQ10
2N7002_SOT23
2
13
PC20
0.1U_0603_25V7K
1 2 PQ6
AO4407_SO8
36
5
7
82
4
1
PC21
0.01U_0603_50V7K
1 2
PL2
15U_PLFC1045P-150A_3.7A_20%
1 2
PU3
MB3887_SSOP24
-INC2
1
OUTC2
2
+INE2
3
-INE2
4
+INC2 24
GND 23
CS 22
VCC(o) 21
FB2
5
VREF
6
FB1
7
-INE1
8
+INE1
9
OUTC1
10
OUTD
11
-INC1
12
OUT 20
VH 19
VCC 18
RT 17
-INE3 16
FB3 15
CTL 14
+INC1 13
PC30
4.7U_1206_25V6K
12
PR36
3K_0603_5%
1 2
PQ11
DTC115EUA_SC70
2
13
PR45
150K_0603_0.1%
12
PR53
10.2K_0603_1%
1 2
PR25
0.02_2512_1%
12
PD8
1SS355_SOD323
1 2
PD31
SKS30-04AT_TSMA
21
PC29
4.7U_1206_25V6K
12
PR38
68K_0603_5%
1 2
PR50
4.22K_0603_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FB5
2VREF_1999
LX3
BST5B BST3B
N56
N57
DH3
ILIM5
ILIM3
N63
N58 3HG
LX5
DH5
BST5A
BST3A
DL5
FB3
DL3
N60
5HG
LDO3P
N59
N61
MAINPWON
ACIN
<38,44>
ACINEC_ON
1999_B++
+3VALWP
VL
+5VALWP
B+
1999_B++
P2
P2
2VREF_1999
VL
VL
LDO3
LDO5
LDO3P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771 0.8
Custom
45 53Tuesday, August 30, 2005
2005/03/01 2006/03/01
+3VALWP/+5VALWP
+3VALWP/+5VALWP
PR179
0_0402_5%
1 2
PC150
1U_1206_25V7K
@
12
PR171
499K_0402_1%
1 2
PC153
0.047U_0603_16V7K
12
PC146
1U_0603_10V6K
1 2
PC145
4.7U_1206_25V6K
12
PC139
4.7U_1206_25V6K
12
PD26
CHP202U_SC70
1
3
2
PR176
0_0402_5%
1 2
PR185
0_0805_5%
1 2
PC151
0.22U_0603_16V7K
12
G
D
S
PQ37
2N7002_SOT23
2
13
PR165
47_0402_5%
1 2
G
D
S
PQ38
2N7002_SOT23
2
13
PC147
4.7U_0805_6.3V6K
12
PR173
10.2K_0402_1%@
1 2
PR175
10K_0402_5%
1 2
PR178
0_0402_5%
1 2
PC136
0.1U_0603_25V7K
12
PR181
806K_0603_1%
12
PL12
10UH_D104C-919AS-100M_4.5A_20%
12
PC152
4.7U_0805_6.3V6K
12 PC148
0.1U_0603_25V7K
12
PD27
SKUL30-02AT_SMA
@
2 1
PL11
10UH_D104C-919AS-100M_4.5A_20%
12
PR184
0_0805_5%
1 2
PR172
499K_0402_1%
1 2
PR167
0_0402_5%
1 2
PR177
3.57K_0402_1%@
1 2
G
D
S
PQ36
2N7002_SOT23
2
13
PR166
4.7_1206_5%
12
PU12
MAX8734AEEI+_QSOP28
LX5
15
DL5
19
BST5
14
DH5
16
OUT5
21
FB5
9
SHDN#
6
ON5
4
GND
23
ILIM5 11
DH3 26
LX3 27
TON 13
DL3 24
OUT3 22
FB3 7
PGOOD 2
SKIP#
12
ON3
3
REF
8
PRO#
10 VCC 17
V+ 20
ILIM3 5
BST3 28
LDO3
25
LD05 18
N.C.
1
PR163
0_0402_5%
1 2
PR187
100K_0402_5%
1 2
PJP23
JUMP_43X118@
11
2
2
PC143
4.7U_1206_25V6K
12
PC138
4.7U_1206_25V6K
12
SI4914DY-T1-E3 SO8
PQ32
D1
2G1 8
G2
3
S1/D2 5
D1
1
S1/D2 7
S2
4S1/D2 6
PR164
0_0402_5%
1 2
+
PC154
220U_6.3VM_R15
PR182
0_0402_5%
12
+
PC155
220U_6.3VM_R15
PC137
0.1U_0603_25V7K
12
PC140
2200P_0402_50V7K
12
PQ34
SI4810BDY-T1-E3 SO8
S
1
S
2
S
3
G
4
D8
D7
D6
D5
PR174
47K_0402_5%
12
PR170
0_0402_5%
1 2
PC142
4.7U_1206_25V6K
12
PQ33
SI4800BDY-T1-E3_SO8
S
1
S
2
S
3
G
4
D8
D7
D6
D5
PR168
118K_0402_1%
1 2
PC144
2200P_0402_50V7K
12
PD28
SKUL30-02AT_SMA
@
2 1
PC141
0.1U_0402_16V7K
12
PR169
200K_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAX8743B_SKIP#
BST1.8
FB2.5
LX2.5LX1.8 DH2.5
BST2.5
MAX8743_VCCB
MAX8743_B++
VDDB
2.5ON
BST2.5A
DH1.8
MAX8743B_ILIM2
FB1.8
MAX8743_VCCB
1.8ON
DH1.8A DH2.5A
MAX8743B_V+
BST1.8A
DL1.8 DL2.5
MAX8743B_ILIM1
MAX8743B_REF
SYSON <37,38,41>
+3VALWP
B+
+1.8VALWP
+5VALWP
+2.5VP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771 0.8
Custom
46 53Tuesday, August 30, 2005
2005/03/01 2006/03/01
+1.8VALWP/+2.5VP
1.936V
1.365V
+1.8VALWP/+2.5VP
PC59
2200P_0402_50V7K
12
PC77
0.22U_0603_16V7K
12
PD16
CHP202U_SC70
1
3
2
PC72
4.7U_0805_6.3V6K
12
PR88
0_0402_5%
1 2
PR96
150K_0603_1%
12
PL5
4.7UH_PLFC1045P-4R7A_5.5A_30%
1 2
PR89
0_0402_5%
12
PC63
2200P_0402_50V7K
12
PR81
0_0603_5%
1 2
PD18
SKS10-04AT_TSMA@
2 1
PR95
0_0402_5%@
1 2
PC64
4.7U_1206_25V6K
12
+
PC131
220U_6.3VM_R15
PC66
4.7U_0805_6.3V6K
12
PR91
0_0402_5%
12
PR93
3.3K_0603_1%
12
PR85
0_0402_5%@
12
PR84
0_0402_5%
1 2
PR87
15K_0402_1%@
12
PC62
4.7U_1206_25V6K
12
PC68
1U_0603_16V6K
12
PR83
0_0402_5%
1 2
PC69
0.1U_0603_25V7K
12
PR92
0_0402_5%
12
PD17
SKS10-04AT_TSMA@
2 1
PC74
4.7U_0805_6.3V6K
12
+
PC132
220U_6.3VM_R15
PQ17
SI4800BDY-T1-E3_SO8
S
1S
2S
3G
4
D8
D7
D6
D5
PR82
20_0603_1%
12
PQ18
SI4810BDY-T1-E3 SO8
S
1S
2S
3G
4
D8
D7
D6
D5
PC65
4.7U_1206_25V6K
12
PC70
0.1U_0603_25V7K
12
PC67
0.1U_0603_25V7K
12
PC75
100P_0402_50V8K@
12
PJP15
JUMP_43X118@
1
122
PC60
4.7U_1206_25V6K
12
PR94
69.8K_0603_1%
12
PC76
100P_0402_50V8K@
12
PR97
100K_0603_1%
12
PR98
0_0402_5%
12
PR86
0_0402_5%
1 2
PR90
0_0402_5%
1 2
PC61
4.7U_1206_25V6K
12
SI4914DY-T1-E3 SO8
PQ16
D1
2G1 8
G2
3
S1/D2 5
D1
1
S1/D2 7
S2
4S1/D2 6
PL4
5U_TPRH6D38-5R0M-N_2.9A_20%
1 2
PU6
MAX8743EEI_QSOP28
OUT2 15
BST2 19
FB2 14
CS2 16
VDD 21
UVP 9
SKIP
6
V+ 4
GND
23
ON1
11
DH1
26
LX1
27
ILIM2 13
DL1
24
VCC 22
PGOOD 7
FB1
2ON2 12
ILIM1 3
OVP
8
REF
10
LX2 17
DL2 20
TON 5
CS1
28
BST1
25
DH2 18
OUT1
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VIN1.25
N4
VREF1.25
N6
BOOT1.2
FB1.2
OCSET1.2
APW7057_VCC
PHASE1.2
VIN1.5
N9
UGATE1.21UGATE1.2
LGATE1.2
VREF1.5
N5
SYSON#<41>
VLDT_EN#<42>
SUSP
+3VALW
+1.25VP
+2.5V
+5VALW
+5VALW
+3VALW
+1.5VSP
+1.8VS
+1.2V_HTP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771 0.8
Custom
47 53Tuesday, August 30, 2005
2005/03/01 2006/03/01
+1.2V_HTP/+1.5VSP/+1.25VP
+1.2VSP/+1.5VP/+1.25VSP
PR99
2K_0402_1%
12
+
PC133
220U_6.3VM_R15
G
D
S
PQ22
2N7002_SOT23
2
13
PU8
APL5331KAC-TR_SO8
VOUT
4
NC 5
GND
2
VREF
3
VIN
1VCNTL 6
NC 7
NC 8
TP 9
PC95
0.1U_0402_16V7K@
1 2
PR105
10_0603_5%@
1 2
PR103
0_0402_5%
1 2
PJP18
JUMP_43X39@
1
122
PJP17
JUMP_43X118@
1
122
PR161
0_0402_5%
12
PR106
6.49K_0402_1%
1 2
PD19
1N4148_SOD80
1 2
PU7
APL5331KAC-TR_SO8
VOUT
4
NC 5
GND
2
VREF
3
VIN
1VCNTL 6
NC 7
NC 8
TP 9
PL6
2.0UH_PLC-0735-2R0_5A_30%
1 2
PR110
10K_0402_1%
1 2
PU9
APW7057KC-TRL_SOP8
BOOT 1
LGATE 4
UGATE 2
FB
6
PHASE 8
GND
3
OCSET
7
VCC 5
PC78
10U_1206_6.3V7K
12
PC86
10U_1206_6.3V7K
12
PC96
0.1U_0402_16V7K
1 2
PR100
3.3K_0603_1%
12
PC92
0.1U_0402_16V7K
12
G
D
S
PQ20
2N7002_SOT23
2
13
PQ21
SI4800BDY-T1-E3_SO8
S
1S
2S
3G
4
D8
D7
D6
D5
PQ24
SI4810BDY-T1-E3 SO8
S
1S
2S
3G
4
D8
D7
D6
D5
PC82
0.1U_0402_16V7K
12
PC85
0.1U_0402_16V7K@
12
PC83
0.1U_0402_16V7K
12
PC80
10U_1206_6.3V7K
12
PR109
5.1K_0402_1%
1 2
PR104
10K_0402_1%
12
PC84
10U_1206_6.3V7K
12
PC88
1U_0603_6.3V6M
12
PC79
1U_0603_10V6K
1 2
PC87
0.1U_0402_16V7K@
12
PJP16
JUMP_43X118@
1
122
PJP19
JUMP_43X118@
11
2
2
+
PC134
220U_6.3VM_R15
PR108
0_0402_5%
1 2
PC81
1U_0603_10V6K
1 2
G
D
S
PQ19
2N7002_SOT23
2
13
PC91
470P_0402_50V8J
12
PR102
3.3K_0603_1%
12
PR101
0_0402_5%
1 2
PC89
22U_1206_6.3V6M
12
PC90
22U_1206_6.3V6M
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1544VCC
D4
D3
D0
D1
D2
1544OVP
1544VCC
1544BSTM
1544BSTMA
1544DHM 1544DHMA
1544DLM
1544CMP
1544CMN
1544OAIN+
N25
1544OAIN-
1544CCI
1544DHS
1544BSTS
1544CSP
1544CSN
1544TON
1544TIME
1544CCV
1544REF
1544ILIM
1544OFS1544REF
1544SHDN#
N26
1544DHMB
1544BSTSA
1544GNDS
N55
N3
1544VROK
1544REF
1544OAIN+
1544OAIN+
1544LXM
1544DLS
1544SUS
1544LXS
1544FB
N47
N48
VID0<6>
VID4<6>
VID3<6>
VID1<6>
VID2<6>
VGATE
VR_ON
3
8>
CPU_COREFB
<6>
CPU_COREFB#
<6>
+3VS
+5VS B+
CPU_B+
+5VS
+CPU_CORE
CPU_B+
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771 0.8
Custom
48 53Tuesday, August 30, 2005
2005/03/01 2006/03/01
CPU VCC SENSE
Near CPU GND
+CPU_CORE
PC107
0.47U_0603_16V7K
1 2
PU10
MAX1544ETL
TIME
1
TON
2
SUS
3
S0
4
S1
5
SHDN#
6
OFS
7
REF
8
ILIM
9
VCC
10
GND
11
CCV
12
GNDS 13
CCI 14
FB 15
OAIN- 16
OAIN+ 17
SKIP
18
OVP
19
D4
20
D3
21
D2
22
D1
23
D0
24
VROK
25
BSTM 26
LXM 27
DHM 28
DLM 29
VDD 30
PGND 31
DLS 32
DHS 33
LXS 34
BSTS 35
V+ 36
CMP 37
CMN 38
CSN 39
CSP 40
PD22
1SS355_SOD323
1 2
PC114
1000P_0402_50V7K
1 2
PR115
2.2_0402_5%
1 2
PC103
2.2U_0603_6.3V6K
1 2
PR137
121K_0402_1%
1 2
PR145
820_0402_5%
1 2
PQ27
FDS6676AS_SO8
3 6
5
7
8
2
4
1
PR127
499_0402_1%
12
PR142
0_0402_5%
1 2
PD23
SKS30-04AT_TSMA
2 1
PR113 0_0402_5%
12
PR111 10_0402_5%
12
+
PC135
68U_25V_M
1
2
PR132
60.4K_0603_1%
12
PC113
100P_0402_50V8J
12
PQ26
FDS6676AS_SO8
3 6
5
7
8
2
4
1
PC115
2200P_0402_50V7K
12
PC123
1000P_0402_50V7K@
12
PR138
2.2_0402_5%
1 2
PL8
.56UH_MPC1040LR56_ 23A_20%
1 2
PC120
0.47U_0603_16V7K
1 2
PR129 1.82K_0402_1%
1 2
PR120 0_0402_5%
12
PR114 0_0402_5%
12
PC116
4.7U_1206_25V6K
12
PQ29
FDS6676AS_SO8
3 6
5
7
8
2
4
1
PR140
0_0402_5%
12
PR112 10K_0402_5%
12
PR139
80.6K_0402_1%
1 2
PR141
100_0402_5%
12
PC108
680P_0603_50V8J
12
+
PC98
68U_25V_M
1
2
PD21
SKS30-04AT_TSMA
2 1
PQ30
FDS6676AS_SO8
3 6
5
7
8
2
4
1
PQ25
FDS6294_SO8
3 6
5
7
8
2
4
1
PC117
4.7U_1206_25V6K
12
PR123
4.7_1206_5%
1 2
PC105
0.01U_0402_50V4Z
12
PC110
270P_0402_50V7K
1 2
PL7
FBM-L18-453215-900LMA90T_1812
1 2
PC111 470P_0402_50V8J
1 2
PR124
820_0402_5%
12
PR128
0_0402_5%
1 2
PR125 0_0402_5%
1 2
PC109
1000P_0402_50V7K
@
1 2
PR144
4.7_1206_5%
1 2
PC101
0.01U_0402_50V4Z
12
PR136
71.5K_0402_1%
1 2
PC102
2200P_0402_50V7K
12
PL9
.56UH_MPC1040LR56_ 23A_20%
1 2
PC119
0.22U_0603_16V7K
12
PR130
0_0402_5%
12
PR122 0_0402_5%
12
PC106
0.22U_0603_16V7K
12
PC112
0.22U_0603_16V7K
1 2 PR135
1.82K_0402_1%
1 2
PC121
680P_0603_50V8J
12
PR116 0_0402_5%
12
PC99
4.7U_1206_25V6K
12
PC104
1U_0603_10V6K
1 2
PQ28
FDS6294_SO8
3 6
5
7
8
2
4
1
PR118 0_0402_5%
12
PR133 820_0402_5%
1 2
PC100
4.7U_1206_25V6K
12
PR134
200K_0402_1%
1 2
PR121
10_0402_5%
@
12
PR131
100K_0402_5%@
1 2
PC122
1000P_0402_50V7K@
12
PD20
1SS355_SOD323
1 2
PR159
0_0402_5%
12
PC118
0.01U_0402_50V4Z
12
PR119
0.001_2512_5%
1 2
PR143
10_0402_5%
@
12
PR146
820_0402_5%
1 2
PR126
499_0402_1%
12
PR117
0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
N10
N28
OTPREF
BATT_TEMP
BATT+
N27
SMC
SMD
N22
TS
MAINPWON
<43,46>
BATT_TEMP <37,38>
EC_SMC_1 <37,38,39>
EC_SMD_1 <37,38,39>
VS
VL
VL
VL
BATT++ BATT+
+3VALWP
VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771 0.8
Custom
49 53Tuesday, August 30, 2005
2005/03/01 2006/03/01
CPU
Recovery at 50 +-3 degree C
PH1 under CPU botten side :
CPU thermal protection at 90 +-3 degree C
Battery Connect/OTP
SMART
Battery:
1.BATT+
2.SMBD
3.SMBC
4.Res
5.Temp
6.GND
PJPB1 battery connector
BATTERY CONN
PC127
0.22U_0603_16V7K
12
PR157
20K_0603_1%
12
PR153
470K_0402_1%
12
PC126
0.1U_0603_25V7K
12
PR156
470K_0402_1%
1 2
PH1
100K_0603_1%_TH11-4H104FT
12
PU11A
LM393M_SO8
+
3
-
2O1
P8
G
4
PR158
470K_0402_1%
12
PR154
0_0402_5%
12
PR155
215K_0603_1%
1 2
PR152
470K_0402_1%
1 2
PC124
0.01U_0402_25V7Z
12
PU11B
LM393M_SO8
+
5
-
6O7
P8
G
4
PC128
1000P_0402_50V7K
12
PR147
1K_0402_5%
1 2
PR151
100_0402_5%
1 2
PR149
6.49K_0402_1%
1 2
PC125
1000P_0402_50V7K
12
PR150
100_0402_5%
1 2
PR162
0_0402_5%@
1 2
PCN2
SUYIN_200045MR006G110ZR
BATT+ 1
SMD 2
SMC 3
RES 4
Temp 5
GND 6
G
7
G
8
G
D
S
PQ31
2N7002_SOT23
2
13
PL10
FBM-L18-453215-900LMA90T_1812
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R e v
Date: Sheet of
PWR PIR
50 53Tuesday, August 30, 2005
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 1
Reason for change PG# Modify List B.Ver#Item
Power section
1
Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
45 Change 3/5VALWP regulator from MAX1902 to MAX1999
2Change PCN1 from SP02000AO00 to DC040001P00. 2005.04.08Change PCN1 from SP020022200 to SP020024800. 49
2005.04.08
Add the functionality to turn on the system on from Off
and S4 with the consumer IR.
0.8
3 Because EMI test fail Change CPU_CORE HI-SIDE MOS from
AO4408 to FDS6294, LOW-SIDE from AO4410 to FDS6676AS 2005.05.18
48
4Because V_bat to Calgary havn a leakage current,
cause precharge can't finisn. 44 Add PD30 and PD31 to supply the V_bat power. 2005.06.09
5 Add air-adapter detector 44 Add PU4 to detector air-adapter in. 2005.07.02
6 Adjust the MB3887 CC to CP response cause the adapter OCP. 44 Change the PR31 from 100k_0402_1% to 10k_0402_1%
Change the PR34 from 10k_0402_1% to 2.74k_0402_1%
Change the PC21 from 4700p_0603_50V to 0.01u_0603_50v
2005.07.29
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
HW PIR
Custom
51 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
0.2
1HP Jack + SPDIF change type
<2005.04.18>
M.B. Ver.
0.2
0.2
0.2
Reason for change PAGE Modify ListFixed IssueItem
Support CIR wake up from battery mode
0.2
0.2
0.2
31 , 33 Del : U27 , C563 , C564
Add: Q52 , Q53 , Q54 , Q56 , Q57 , R571 , C730 , C731 , R567 , R569 , R568 , R570
24 , 37 ,
38 , 41 ,
35
12VALW change to B+
+3VALW change to LDO3 , +5VALW change to LDO5
3for Marvell express card Rest timing 20 , 28 Add: Q55
4for some HDD's LED alway on 24 Del: D29 , R259 , Q10
5for card bus can't work 27 S1_VCC and S1_VPP change to +S1_VCC and +S1_VPP
6For nissan common design 35 JP28 and JP29 pin swap
7For keyboard issue 37 Del: D27
<2005.04.27>
1wake up from LAN 38 Add: R575(Pull UP PME_EC#)
<2005.05.3>
2For VOL_UP,DOWN function issue 38 POP: R418,R419,R420,R421
1For CIR wake up 38 Add: R576, R577 to option
<2005.05.4>
139EC 910L include portion circuit Add: R578 , Del:C630 , R422 , Q22 , U35A
2ME change LED type 36 D18,D20,D21 from right angle change to vertical type
117 Add: R581 current limit resisterAdd wireless LED current limit resister
<2005.05.6>
0.3
0.3
0.3
0.3
0.3
0.3
<2005.05.9>
1TP conn pin reverse 35 Pin swap
<2005.05.10>
136 D25 from right angle change to vertical typeME change LED type
2HP requirement from 75 ohm change to 33 ohm 33 R567 , R569 from 75 ohm change to 33 ohm
3For nissan common design 35 Add: R582 , R583
<2005.05.11>
1For 2 way and 4 way touch pad 36 Add: R584 , R585
<2005.06.10>
update JP23 dual USB connector to reverse type
DFX modification for Rev0.4 MB
Change MR954, MC928, MR924, MR922, MR932, MC944, MC970,
MC976, MC978, MC926 to correct pad size with Compal layout rule
0.4
update USB connector to reverse type
Change D6 form RB411 to RB491
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
HW PIR
Custom
52 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
1
<2005.06.27>
M.B. Ver.Reason for change PAGE Modify ListFixed IssueItem
1
2
3
4
6
0.5
For clear H_RST# glitch 41
0.5
0.5
0.5
0.5
0.5
0.5
For +1.8VS EMI
For +1.2V_HT power ripple
For +2.5VS EMI
Change R61, R84 value from 0 ohm to 120 ohm11
14
15
15
25
29
Change C197, C209, C254, C248, C251, C256, C258 value
from 0.1U 16V4Z 0402 to 1U 6.3V4Z 0402
<2005.07.04>
Add C737, C738, C741, C742 220P 50V8J 0402
Add C739, C740, C743, C744 1000P 50V7K 0402For +2.5VS EMI
For CardBus chip PCI_CLK EMI mount R279 and C442
<2005.07.07>
<2005.07.11>
For LAN chip PCI_CLK EMI
For Mini-PCI_CLK EMI
For dock Docking audio noise
Add Q61
Mount R322 and C504
30 Mount R325 and C512
7
5
1
31 Add Q58, R589, Q60, R590, Q59, R589
1
<2005.07.05> For USB EMI 34 Add L33, L34
change R561,R559,R562,R560 size from 0603 to 040234For USB EMI
2
2
3
1
For Dock_LOUTR/L EMI 40 Add R591, C745, R592, C746
For Docking TV_out signals EMI Add R593, C747, R594, C748,C749, C750, R595, C751, C75240
40For accelerate +2.5VS discharge speed change R442 size and value from 470_0402 to 10_0805
8
For EC K/B chip PCI_CLK EMI 30 Mount R415 and C628
2
For LAN lamp 29 Swap Activity and Link Lamp
<2005.07.25>
1
2
3
4
1
For SanDisk SD 256M card could not work issue 25 delete U48 Quick switch reserve schematics
Delete R463, R465, R466, R476, R268For SanDisk SD 256M card could not work issue 25
For SanDisk SD 256M card could not work issue
For SanDisk SD 256M card could not work issue
For lower power consumption
26
26
Delete R270, R267, R547, R548
Mount R550 and R549
Add and un-mount R596
<2005.07.28> 38
2
For CRT Assy 18 change CRT footprint
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-2771
0.8
HW PIR
Custom
53 53Tuesday, August 30, 2005
2005/03/01 2005/04/06
1
<2005.08.11>
M.B. Ver.Reason for change PAGE Modify ListFixed IssueItem
2
3
4
6
0.5
41
0.5
0.5
0.8
0.8
Add C753~C771 total 19 pcs11
14 Change C200, C202, C242, C232
from 0.1U 16V4Z 0402 to 1U 6.3V4K 0402
Delete R24, R125, R21 , R73 , R263, R565
7
5
1
1
2
2
3
1
8
2
1
2
3
4
1
2
Delect all reserve 0 ohm resistors.
For EMI solution on switch connector
For ATI suggestion on RS480
<2005.08.23> Relocate damping resistor to solve Sandisk issue Relocate R266, R458, R459, R460, R461, R462
Change from AGND to DGND for Codec precision improvement Change Q16/Q17 pin3 and R334 pin2 to DGND
Add +3VALW power rail for Boxster lid switch use Add +3VALW to JP28 pin25
0.8
Reserve C700, for soft start if necessary
Reserve R600 M_SEN#, currently this signal isn't used
0.8
0.8
Reserve C700
Reserve R600
38
31
35
31
26
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