Compal LA 4231P Schematics. Www.s Manuals.com. R0.2 Schematics

User Manual: Compal LA-4231P - Schematics. Free.

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Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

Cover Sheet

Custom

149Thursday, January 10, 2008

2007/1/15 2008/1/15

Schematic Document

Crestline + ICH8

Rev:0.2

Compal Confidential

2007 / 11 / 14

Compal Electronics, Inc.

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Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

Block diagram

Custom

249Thursday, January 10, 2008

2007/1/15 2008/1/15

File Name : LA-4231P

Compal confidential

Thermal Sensor

ADM1032ARMZ

Clock Generator

ICS 9LPRS365

Fan conn

Mobile Merom

uFCPGA-478 CPU

FSB

667/800MHz 1.05V

H_A#(3..35)

H_D#(0..63)

FCBGA 1299

Intel Crestline MCH

DMI X4

BANK 0, 1, 2, 3

DDR2-SO-DIMM X2

DDR2 667MHz 1.8V

Dual Channel

LPC BUS

CardBus Controller

O2MICRO OZ129

CDROM Conn.

PCI

mBGA-676

Intel ICH8

Touch Pad CONN. Int.KBD

ENE KB926

10/100/1000 LAN

RJ45/11 CONN

PCI-E BUS

SATA HDD Connector

SATA Master

SATA Slave

1394

C-Link

CK505

ALC268

Audio CKT AMP & Audio Jack

USB conn x 4

Felica Conn

USB2.0

Azalia

Mic

FingerPrinter

BT Conn

SMB 13.3

TSSOP-64

Express Card

Camera

Power On/Off CKT.

DC/DC Interface CKT.

Power Circuit DC/DC

RTC CKT.

Power OK CKT.

Express Card

TPM CONN

Mini-Card-2

BIOS(System/EC)

Mini-Card-1

(WLAN) Mini-Card-2

Compal Electronics, Inc.

CRT

LVDS Panel Interface

nVidia

NB8M-GS

VRAM x 2

Media Card

REALTEK

RTL8111C-GR

P.15

P.15

P.4

P.4

P.4,5,6

P.7,8,9,10,11,12P.34,35,36,37

P.38

P.40

P.22

P.24 P.24 P.28

P.13,14

P.16

P.17,18,19,20

P.29

P.29P.31P.31

P.29

P.18

P.21

P.21

P.25 P.26

P.24

P.28

P.32

P.32

P.32

P.32

P.32

ZZZ1

PCB

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A

B

B

C

C

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D

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E

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Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

Notes

Custom

349Thursday, January 10, 2008

2007/1/15 2008/1/15

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

CardBus

AD21

EC SM Bus1 address

Device

ADM1032

EC SM Bus2 address

Device

Smart Battery

0

PIRQE/PIRQF/PIRQG

EEPROM(24C16/02)

4D0001 011X b?

1010 000X b?

(24C04) 1011 000Xb?

ICH7 SM Bus address

Device

Clock Generator

(ICS ICS9LPR310)

Address

Address Address

1101 001Xb?

STATE SIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

ON

ON

ON

ON

ON

ON

ON ON

ON

ON

ON

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

LOW

LOW LOW LOW LOW

LOWLOWLOW

LOW

LOW

LOW

HIGH HIGH HIGH HIGH

HIGHHIGHHIGH

HIGH

HIGH

HIGH

Board ID Table for AD channel

DDRII DIMM0

1001 000Xb?

DDRII DIMM2

1001 010Xb?

Vcc 3.3V +/- 5%

100K +/- 5%Ra / Rc

Board ID

Rb / Rd V min

0

1

2

3

0

8.2K +/- 5%

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

0.503 V

0.819 V

0.538 V

0.875 V

AD_BID

V typ

AD_BID

V

AD_BID

max

18K +/- 5%

33K +/- 5%

56K +/- 5%

100K +/- 5%

200K +/- 5%

3.300 V

0 V 0 V

4

5

6

7NC

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

1.185 V 1.264 V

BOARD ID Table

Board ID

0

1

2

3

4

5

6

7

PCB Revision

0.1

BTO Option Table

BTO Item BOM Structure

0.2

O MEANS ON

X MEANS OFF

O

X

Voltage Rails

S3

+3VS

X

X

+3VALW

+5VS

O

+CPU_CORE

+1.8VS

OO

X

XX

+VCCP

power

plane

CLOCK

O

O

O

X

X

O

O

O

O

X

S5 S4/ Battery only

XXX

+3V

O MEANS ON X MEANS OFF

+1.25VS

+B

State

+1.5VS

+1.8V

S5 S4/AC & Battery

don't exist

S5 S4/AC

+5VALW

S0

O

O

S3 : STR

S4 : STD

S5 : SOFT OFF

Compal Electronics, Inc.

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

EC_SMB_CK2

EC_SMB_DA2

H_THERMDA

H_THERMDC

THERM#

EC_SMB_DA2

EC_SMB_CK2

H_PROCHOT# OCP#

THERM_SCI#

H_PROCHOT#

H_REQ#2

H_DBSY#

H_ADS#H_A#3

H_A#22

H_A#19

XDP_TRST#

H_REQ#4

H_ADSTB#0

H_A#18

H_TRDY#H_REQ#3

H_INTR

H_HITM#

H_A#6

H_A#26

H_FERR#

H_DRDY#

CLK_CPU_BCLK

CLK_CPU_BCLK#

H_A#4

H_A#23

H_A#32

H_BR0#

XDP_BPM#1

H_A#7

H_A#13

H_THERMDC

XDP_TCK

H_RS#1

H_LOCK#

H_A#5

H_A#25

H_A#21

H_A#10

H_A#34

H_NMI

H_DEFER#

H_REQ#0

XDP_DBRESET#

H_BPRI#

H_ADSTB#1

H_A#9

H_A#31

H_A#35

XDP_BPM#2

XDP_TMS

H_RESET#

XDP_BPM#5

XDP_BPM#4

H_INIT#

H_A#30

H_A#24

H_A#16

H_A#11

H_RS#2

H_IGNNE#

XDP_BPM#0

H_REQ#1

H_A#8

H_A#28

H_STPCLK#

H_SMI#

XDP_BPM#3

XDP_TDO

XDP_TDI

H_A#27

H_A#20

H_A#15

H_THERMTRIP#

H_RS#0

H_HIT#

H_BNR#

H_A20M#

H_A#17

H_A#12

H_A#33

H_THERMDA

H_A#29

H_A#14 H_IERR#

XDP_TDI

XDP_TMS

XDP_TCK

XDP_BPM#5

XDP_TRST#

EN_DFAN1

H_RESET#

FAN1_POWER

EC_SMB_DA229,31,35

EC_SMB_CK229,31,35

OCP# 19

H_A#[3..16]7

H_ADSTB#07

H_REQ#07 H_REQ#17 H_REQ#27

H_REQ#47 H_A#[17..35]7

H_ADSTB#17

H_A20M#18 H_FERR#18 H_IGNNE#18

H_STPCLK#18 H_INTR18 H_NMI18 H_SMI#18

H_ADS# 7

H_BNR# 7

H_BPRI# 7

H_BR0# 7

H_THERMTRIP# 7,18

CLK_CPU_BCLK 16

CLK_CPU_BCLK# 16

EC_THERM# 19,29

H_RESET# 7

H_TRDY# 7

H_DEFER# 7

H_DRDY# 7

H_DBSY# 7

H_INIT# 18

H_LOCK# 7

H_HIT# 7

H_HITM# 7

XDP_DBRESET# 19

H_REQ#37

FAN_SPEED129

EN_DFAN129

H_RS#0 7

H_RS#1 7

H_RS#2 7

+3VS

+3VS

+VCCP

+VCCP

+VCCP

+3VS

+VCCP

+5VS

+VCCP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

Merom(1/3)-AGTL+/XDP

Custom

449Thursday, January 10, 2008

2007/1/15 2008/1/15

Thermal Sensor EMC1402-1-ACZL-TR

Address:100_1100

H_THERMDA, H_THERMDC routing together,

Trace width / Spacing = 10 / 10 mil

FAN1

FAN1 Control and Tachometer

XDP Reserve

40mil

Add on 1003

H_THRMTRIP# should connect

to ICH8 and GMCH without

T-ing (No stub)

Compal Electronics, Inc.

R61

10K_0402_5%

12

U3

RT9027BPS SO 8P

VEN

1

VIN

2

GND 5

GND 6

GND 8

VO

3

VSET

4

GND 7

R171 39_0402_1%

1 2

R114 56_0402_5%

12

R350

10K_0402_5%

1 2

T29

R354

10K_0402_5%@

12

T47

R108

56_0402_5%@

12

R89

56_0402_5%

12

C76

10U_1206_16V4Z~N

12

C77 10U_1206_16V4Z~N

1 2

R172 150_0402_1%

1 2

C69

1000P_0402_50V7K~N

12

T28

T48

R182 560_0402_5%

1 2

R41

54.9_0402_1%

@

1 2

ADDR GROUP 0 ADDR GROUP 1

CONTROL

XDP/ITP SIGNALS

H CLK

THERMAL

RESERVED

ICH

JP2A

Merom Ball-out Rev 1a

conn@

A[10]#

N3

A[11]#

P5

A[12]#

P2

A[13]#

L2

A[14]#

P4

A[15]#

P1

A[16]#

R1

A[17]#

Y2

A[18]#

U5

A[19]#

R3

A[20]#

W6

A[21]#

U4

A[22]#

Y5

A[23]#

U1

A[24]#

R4

A[25]#

T5

A[26]#

T3

A[27]#

W2

A[28]#

W5

A[29]#

Y4

A[3]#

J4

A[30]#

U2

A[31]#

V4

RSVD[01]

M4

RSVD[02]

N5

RSVD[03]

T2

RSVD[04]

V3

RSVD[05]

B2

RSVD[06]

C3

RSVD[07]

D2

RSVD[08]

D22

A[4]#

L5

A[5]#

L4

A[6]#

K5

A[7]#

M3

A[8]#

N2

A[9]#

J1

A20M#

A6

ADS# H1

ADSTB[0]#

M1

ADSTB[1]#

V1

RSVD[09]

D3

BCLK[0] A22

BCLK[1] A21

BNR# E2

BPM[0]# AD4

BPM[1]# AD3

BPM[2]# AD1

BPM[3]# AC4

BPRI# G5

BR0# F1

DBR# C20

DBSY# E1

DEFER# H5

DRDY# F21

FERR#

A5

HIT# G6

HITM# E4

IERR# D20

IGNNE#

C4

INIT# B3

LINT0

C6

LINT1

B4

LOCK# H4

PRDY# AC2

PREQ# AC1

PROCHOT# D21

REQ[0]#

K3

REQ[1]#

H2

REQ[2]#

K2

REQ[3]#

J3

REQ[4]#

L1

RESET# C1

RS[0]# F3

RS[1]# F4

RS[2]# G3

SMI#

A3

STPCLK#

D5

TCK AC5

TDI AA6

TDO AB3

THERMTRIP# C7

THERMDA A24

THERMDC B25

TMS AB5

TRDY# G2

TRST# AB6

A[32]#

W3

A[33]#

AA4

A[34]#

AB2

A[35]#

AA3

RSVD[10]

F6

R170 27_0402_5%

1 2

R362 54.9_0402_1%

@

1 2

JFAN1

ACES_85205-03001

conn@

1

1

2

2

3

3

GND

4

GND

5

C94

0.01U_0402_16V7K 1

2

R355

0_0402_5%

@ 12

E

B

C

Q11

MMBT3904_SOT23

@

2

3 1

T27

U2

EMC1402-2-ACZL-TR MSOP 8P

VDD

1

ALERT# 6

THERM#

4GND 5

D+

2

D-

3

SCLK 8

SDATA 7

C423

2200P_0402_50V7K~N

1 2

T33

C424

0.1U_0402_16V4Z~N

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

V_CPU_GTLREF

H_D#4

H_D#14

H_D#10

H_D#9

H_D#3

H_D#13

H_D#6

H_D#2

H_D#8

H_D#12

H_D#1

H_D#5

H_D#7

H_D#11

H_D#0

H_D#15

H_D#27

H_D#25

H_D#31

H_D#24

H_D#20

H_D#30

H_D#23

H_D#19

H_D#29

H_D#16

H_D#18

H_D#22

H_D#26

H_D#28

H_D#17

H_D#21

H_DINV#0

H_DINV#1 H_DINV#3

H_DINV#2

H_DSTBN#2

H_DSTBP#2

H_DSTBP#1

H_DSTBN#1

H_DSTBP#0

H_DSTBN#0

H_DSTBN#3

H_DSTBP#3

H_D#48

H_D#56

H_D#52

H_D#59

H_D#63

H_D#55

H_D#51

H_D#62

H_D#58

H_D#54

H_D#50

H_D#57

H_D#61

H_D#53

H_D#49

H_D#60

COMP0

COMP2

COMP3

COMP1

CPU_BSEL2

CPU_BSEL1

CPU_BSEL0 H_CPUSLP#

H_DPSLP#

H_DPRSTP#

H_PSI#

V_CPU_GTLREF

TEST1

TEST2

VSSSENSE

VCCSENSE

H_DPWR#

H_D#47

H_D#43

H_D#42

H_D#37

H_D#34

H_D#33

H_D#39

H_D#38

H_D#41

H_D#40

H_D#35

H_D#36

H_D#45

H_D#44

H_D#32

H_D#46

TEST3

TEST5

TEST4

H_PWRGOOD

VSSSENSE

VCCSENSE

TEST6

VCCSENSE 49

VSSSENSE 49

H_D#[0..15]7

H_DSTBN#07 H_DSTBP#07 H_DINV#07 H_D#[16..31]7

H_DSTBN#17 H_DSTBP#17 H_DINV#17

CPU_BSEL016 CPU_BSEL116 CPU_BSEL216

H_D#[32..47] 7

H_DSTBN#2 7

H_DSTBP#2 7

H_DINV#2 7

H_D#[48..63] 7

H_DSTBN#3 7

H_DSTBP#3 7

H_DINV#3 7

H_DPRSTP# 7,18,49

H_DPSLP# 18

H_CPUSLP# 7

H_DPWR# 7

H_PSI# 49

CPU_VID0 49

CPU_VID1 49

CPU_VID2 49

CPU_VID3 49

CPU_VID4 49

CPU_VID5 49

CPU_VID6 49

H_PWRGOOD 18

+VCCP

+VCCP

+1.5VS

+CPU_CORE +CPU_CORE

+CPU_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

Merom(2/3)-AGTL+/PWR

Custom

549Thursday, January 10, 2008

2007/1/15 2008/1/15

Close to CPU pin AD26

within 500mils.

CPU_BSEL CPU_BSEL2 CPU_BSEL1

166

200

01

0

1

CPU_BSEL0

1

0

Resistor placed within

0.5" of CPU pin.Trace

should be at least 25

mils away from any other

toggling signal.

COMP[0,2] trace width is

18 mils. COMP[1,3] trace

width is 4 mils.

Length match within 25 mils.

The trace width/space/other is

20/7/25.

Close to CPU pin

within 500mils.

Near pin B26

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

Compal Electronics, Inc.

R86

1K_0402_1%

12

JP2C

Merom Ball-out Rev 1a

.

conn@

VCC[001]

A7

VCC[002]

A9

VCC[003]

A10

VCC[004]

A12

VCC[005]

A13

VCC[006]

A15

VCC[007]

A17

VCC[008]

A18

VCC[009]

A20

VCC[010]

B7

VCC[011]

B9

VCC[012]

B10

VCC[013]

B12

VCC[014]

B14

VCC[015]

B15

VCC[016]

B17

VCC[017]

B18

VCC[018]

B20

VCC[019]

C9

VCC[020]

C10

VCC[021]

C12

VCC[022]

C13

VCC[023]

C15

VCC[024]

C17

VCC[025]

C18

VCC[026]

D9

VCC[027]

D10

VCC[028]

D12

VCC[029]

D14

VCC[030]

D15

VCC[031]

D17

VCC[032]

D18

VCC[033]

E7

VCC[034]

E9

VCC[035]

E10

VCC[036]

E12

VCC[037]

E13

VCC[038]

E15

VCC[039]

E17

VCC[040]

E18

VCC[041]

E20

VCC[042]

F7

VCC[043]

F9

VCC[044]

F10

VCC[045]

F12

VCC[046]

F14

VCC[047]

F15

VCC[048]

F17

VCC[049]

F18

VCC[050]

F20

VCC[051]

AA7

VCC[052]

AA9

VCC[053]

AA10

VCC[054]

AA12

VCC[055]

AA13

VCC[056]

AA15

VCC[057]

AA17

VCC[058]

AA18

VCC[059]

AA20

VCC[060]

AB9

VCC[061]

AC10

VCC[062]

AB10

VCC[063]

AB12

VCC[064]

AB14

VCC[065]

AB15

VCC[066]

AB17

VCC[067]

AB18

VCC[068] AB20

VCC[069] AB7

VCC[070] AC7

VCC[071] AC9

VCC[072] AC12

VCC[073] AC13

VCC[074] AC15

VCC[075] AC17

VCC[076] AC18

VCC[077] AD7

VCC[078] AD9

VCC[079] AD10

VCC[080] AD12

VCC[081] AD14

VCC[082] AD15

VCC[083] AD17

VCC[084] AD18

VCC[085] AE9

VCC[086] AE10

VCC[087] AE12

VCC[088] AE13

VCC[089] AE15

VCC[090] AE17

VCC[091] AE18

VCC[092] AE20

VCC[093] AF9

VCC[094] AF10

VCC[095] AF12

VCC[096] AF14

VCC[097] AF15

VCC[098] AF17

VCC[099] AF18

VCC[100] AF20

VCCA[01] B26

VCCP[03] J6

VCCP[04] K6

VCCP[05] M6

VCCP[06] J21

VCCP[07] K21

VCCP[08] M21

VCCP[09] N21

VCCP[10] N6

VCCP[11] R21

VCCP[12] R6

VCCP[13] T21

VCCP[14] T6

VCCP[15] V21

VCCP[16] W21

VCCSENSE AF7

VID[0] AD6

VID[1] AF5

VID[2] AE5

VID[3] AF4

VID[4] AE3

VID[5] AF3

VID[6] AE2

VSSSENSE AE7

VCCA[02] C26

VCCP[01] G21

VCCP[02] V6

T49

+

C140

330U_V_2.5VM

1

2

R87

54.9_0402_1%

12

C412

10U_0805_10V4Z~N

1

2

R173

27.4_0402_1%

12

DATA GRP 0 DATA GRP 1

DATA GRP 2DATA GRP 3

MISC

JP2B

Merom Ball-out Rev 1a

conn@

COMP[0] R26

COMP[1] U26

COMP[2] AA1

COMP[3] Y1

D[0]#

E22

D[1]#

F24

D[10]#

J24

D[11]#

J23

D[12]#

H22

D[13]#

F26

D[14]#

K22

D[15]#

H23

D[16]#

N22

D[17]#

K25

D[18]#

P26

D[19]#

R23

D[2]#

E26

D[20]#

L23

D[21]#

M24

D[22]#

L22

D[23]#

M23

D[24]#

P25

D[25]#

P23

D[26]#

P22

D[27]#

T24

D[28]#

R24

D[29]#

L25

D[3]#

G22

D[30]#

T25

D[31]#

N25

D[32]# Y22

D[33]# AB24

D[34]# V24

D[35]# V26

D[36]# V23

D[37]# T22

D[38]# U25

D[39]# U23

D[4]#

F23

D[40]# Y25

D[41]# W22

D[42]# Y23

D[43]# W24

D[44]# W25

D[45]# AA23

D[46]# AA24

D[47]# AB25

D[48]# AE24

D[49]# AD24

D[5]#

G25

D[50]# AA21

D[51]# AB22

D[52]# AB21

D[53]# AC26

D[54]# AD20

D[55]# AE22

D[56]# AF23

D[57]# AC25

D[58]# AE21

D[59]# AD21

D[6]#

E25

D[60]# AC22

D[61]# AD23

D[62]# AF22

D[63]# AC23

D[7]#

E23

D[8]#

K24

D[9]#

G24

TEST5

AF1

DINV[0]#

H25

DINV[1]#

N24

DINV[2]# U22

DINV[3]# AC20

DPRSTP# E5

DPSLP# B5

DPWR# D24

DSTBN[0]#

J26

DSTBN[1]#

L26

DSTBN[2]# Y26

DSTBN[3]# AE25

DSTBP[0]#

H26

DSTBP[1]#

M26

DSTBP[2]# AA26

DSTBP[3]# AF24

GTLREF

AD26

PSI# AE6

PWRGOOD D6

SLP# D7

TEST3

C24

BSEL[0]

B22

BSEL[1]

B23

BSEL[2]

C21

TEST2

D25

TEST4

AF26

TEST6

A26

TEST1

C23

T14

R90 1K_0402_5%@

1 2

R359

100_0402_1%

1 2

R85

2K_0402_1%

12

T15

C409

0.01U_0402_16V7K~N

1

2

R174

54.9_0402_1%

12

R91 1K_0402_5%@

1 2

R88

27.4_0402_1%

12

R360

100_0402_1%

1 2

T13

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+CPU_CORE

+VCCP

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

Merom(3/3)-GND&Bypass

Custom

649Thursday, January 10, 2008

2007/1/15 2008/1/15

Place these inside

socket cavity on L8

(North side

Secondary)

ESR <= 1.5m ohm

Capacitor > 1980uF

Near CPU CORE regulator

Compal Electronics, Inc.

10uF 0805 X5R -> 85 degree.

High Frequence Decoupling

Place these caps inside

the CPU socket cavity.

( Left side on Top ).

Place these caps inside

the CPU socket cavity.

Place these caps inside

the CPU socket cavity.

( Right side on Top side).

Place these caps inside

the CPU socket cavity.

( Left side on Bottom ).

( Right side on Bottom ).

Place these caps inside

the CPU socket.

( Left side on Top ).

Place these caps inside

the CPU socket.

( Right side on Top ).

C1172

10U_0805_6.3V6M

1

2

+

C190

330U_V_2.5VM

1

2

C1159

10U_0805_6.3V6M

1

2

C1157

10U_0805_6.3V6M

1

2

C1180

10U_0805_6.3V6M

1

2

C1153

10U_0805_6.3V6M

1

2

+

C426

330U_V_2.5VM

1

2

C1176

10U_0805_6.3V6M

1

2

C183

0.1U_0402_10V6K

1

2

C1163

10U_0805_6.3V6M

1

2

C1181

10U_0805_6.3V6M

1

2

C209

0.1U_0402_10V6K

1

2

C1158

10U_0805_6.3V6M

1

2

C1168

10U_0805_6.3V6M

1

2

+

C212

220U_D2_4VY_R15M

1

2

C1170

10U_0805_6.3V6M

1

2

C210

0.1U_0402_10V6K

1

2

C1166

10U_0805_6.3V6M

1

2

C1179

10U_0805_6.3V6M

1

2

C184

0.1U_0402_10V6K

1

2

C1171

10U_0805_6.3V6M

1

2

C1173

10U_0805_6.3V6M

1

2

C1169

10U_0805_6.3V6M

1

2

+

C429

330U_V_2.5VM

@

1

2

C1174

10U_0805_6.3V6M

1

2

C1175

10U_0805_6.3V6M

1

2

C1160

10U_0805_6.3V6M

1

2

C185

0.1U_0402_10V6K

1

2

C1177

10U_0805_6.3V6M

1

2

C1161

10U_0805_6.3V6M

1

2

+

C207

330U_V_2.5VM

1

2

C1152

10U_0805_6.3V6M

1

2

C1150

10U_0805_6.3V6M

1

2

C1156

10U_0805_6.3V6M

1

2

C1178

10U_0805_6.3V6M

1

2

C1167

10U_0805_6.3V6M

1

2

C1154

10U_0805_6.3V6M

1

2

C1151

10U_0805_6.3V6M

1

2

C1155

10U_0805_6.3V6M

1

2

C1165

10U_0805_6.3V6M

1

2

C208

0.1U_0402_10V6K

1

2

C1164

10U_0805_6.3V6M

1

2

JP2D

Merom Ball-out Rev 1a

.

conn@

VSS[082] P6

VSS[148] AE11

VSS[002]

A8

VSS[003]

A11

VSS[004]

A14

VSS[005]

A16

VSS[006]

A19

VSS[007]

A23

VSS[008]

AF2

VSS[009]

B6

VSS[010]

B8

VSS[011]

B11

VSS[012]

B13

VSS[013]

B16

VSS[014]

B19

VSS[015]

B21

VSS[016]

B24

VSS[017]

C5

VSS[018]

C8

VSS[019]

C11

VSS[020]

C14

VSS[021]

C16

VSS[022]

C19

VSS[023]

C2

VSS[024]

C22

VSS[025]

C25

VSS[026]

D1

VSS[027]

D4

VSS[028]

D8

VSS[029]

D11

VSS[030]

D13

VSS[031]

D16

VSS[032]

D19

VSS[033]

D23

VSS[034]

D26

VSS[035]

E3

VSS[036]

E6

VSS[037]

E8

VSS[038]

E11

VSS[039]

E14

VSS[040]

E16

VSS[041]

E19

VSS[042]

E21

VSS[043]

E24

VSS[044]

F5

VSS[045]

F8

VSS[046]

F11

VSS[047]

F13

VSS[048]

F16

VSS[049]

F19

VSS[050]

F2

VSS[051]

F22

VSS[052]

F25

VSS[053]

G4

VSS[054]

G1

VSS[055]

G23

VSS[056]

G26

VSS[057]

H3

VSS[058]

H6

VSS[059]

H21

VSS[060]

H24

VSS[061]

J2

VSS[062]

J5

VSS[063]

J22

VSS[064]

J25

VSS[065]

K1

VSS[066]

K4

VSS[067]

K23

VSS[068]

K26

VSS[069]

L3

VSS[070]

L6

VSS[071]

L21

VSS[072]

L24

VSS[073]

M2

VSS[074]

M5

VSS[075]

M22

VSS[076]

M25

VSS[077]

N1

VSS[078]

N4

VSS[079]

N23

VSS[080]

N26

VSS[081]

P3 VSS[162] A25

VSS[161] AF21

VSS[160] AF19

VSS[159] AF16

VSS[158] AF13

VSS[157] AF11

VSS[156] AF8

VSS[155] AF6

VSS[154] A2

VSS[153] AE26

VSS[152] AE23

VSS[151] AE19

VSS[083] P21

VSS[084] P24

VSS[085] R2

VSS[086] R5

VSS[087] R22

VSS[088] R25

VSS[089] T1

VSS[090] T4

VSS[091] T23

VSS[092] T26

VSS[093] U3

VSS[094] U6

VSS[095] U21

VSS[096] U24

VSS[097] V2

VSS[098] V5

VSS[099] V22

VSS[100] V25

VSS[101] W1

VSS[102] W4

VSS[103] W23

VSS[104] W26

VSS[105] Y3

VSS[107] Y21

VSS[108] Y24

VSS[109] AA2

VSS[110] AA5

VSS[111] AA8

VSS[112] AA11

VSS[113] AA14

VSS[114] AA16

VSS[115] AA19

VSS[116] AA22

VSS[117] AA25

VSS[118] AB1

VSS[119] AB4

VSS[120] AB8

VSS[121] AB11

VSS[122] AB13

VSS[123] AB16

VSS[124] AB19

VSS[125] AB23

VSS[126] AB26

VSS[127] AC3

VSS[128] AC6

VSS[129] AC8

VSS[130] AC11

VSS[131] AC14

VSS[132] AC16

VSS[133] AC19

VSS[134] AC21

VSS[135] AC24

VSS[136] AD2

VSS[137] AD5

VSS[138] AD8

VSS[139] AD11

VSS[140] AD13

VSS[141] AD16

VSS[142] AD19

VSS[143] AD22

VSS[144] AD25

VSS[145] AE1

VSS[146] AE4

VSS[106] Y6

VSS[001]

A4

VSS[149] AE14

VSS[150] AE16

VSS[147] AE8

VSS[163] AF25

C1162

10U_0805_6.3V6M

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_SWNGH_VREF

PM_EXTTS#0

PM_EXTTS#1

DDR_CKE0_DIMMA

DDR_CKE1_DIMMA

DDR_CKE3_DIMMB

DDR_CS1_DIMMA#

DDR_CKE2_DIMMB

DDR_CS0_DIMMA#

DDR_CS3_DIMMB#

DDR_CS2_DIMMB#

CLK_MCH_3GPLL#

CLK_MCH_3GPLL

PLT_RST# PLT_RST#_R

M_CLK_DDR3

M_CLK_DDR#0

M_CLK_DDR#1

M_CLK_DDR#2

M_CLK_DDR2

M_CLK_DDR0

M_CLK_DDR1

SMRCOMP_VOH

SMRCOMP_VOL

M_ODT1

SMRCOMP#

M_ODT3

M_ODT0

M_ODT2

SMRCOMP

+DDR_MCH_REF

SMRCOMP_VOL

MCH_SSCDREFCLK

MCH_SSCDREFCLK#

CLK_MCH_DREFCLK

CLK_MCH_DREFCLK#

CFG7

CFG5

CFG13

CFG9

CFG16

CFG19

CFG12

CFG20

MCH_CLKSEL0

MCH_CLKSEL1

MCH_CLKSEL2

MCH_ICH_SYNC#

CLKMCHREQ#

H_DPRSTP#

DPRSLPVR

PM_EXTTS#1

PM_BMBUSY#

THERMTRIP#

PM_EXTTS#0

PLT_RST#_R

CL_CLK0

CL_DATA0

CL_RST#

H_SCOMP#

H_DSTBP#0

H_DSTBN#1

H_D#39

H_D#37

H_D#34

H_D#22

H_D#12

H_D#11

H_ADSTB#0

H_A#24

H_A#10

H_RS#0

H_DSTBN#0H_D#58

H_D#54

H_D#4

H_D#13

H_D#20

H_ADSTB#1

H_A#7

H_A#3

H_A#11

H_DSTBP#2

H_D#6

H_D#25

H_D#1

H_A#16

H_REQ#0

H_D#44

H_A#19

H_A#17

H_RCOMP

H_A#35

H_DSTBP#1

H_D#43

H_D#35

H_REQ#3

H_BNR#

H_A#13

H_CPUSLP#

H_SWNG

H_HITM#

H_DSTBN#3

H_DINV#1

H_D#62

H_D#57

H_D#56

H_D#60

H_A#14

H_RCOMP

H_VREF

H_HIT#

H_D#38

H_D#17

H_A#31

H_DPWR#

H_D#32

H_D#50

H_D#10

H_A#20

H_A#12

H_A#33

H_DSTBP#3

H_DINV#3

H_D#59

H_D#5

H_D#33

H_REQ#4

H_DEFER#

H_D#55

H_D#47

H_D#45

H_D#28

H_D#27

H_D#19

H_D#16

CLK_MCH_BCLK#

H_A#9

H_A#6

H_D#49

H_D#15

H_D#40

H_REQ#2

H_D#0

H_BR0#

H_A#27

H_A#22

H_A#15

H_A#34

H_A#32

H_REQ#1

H_LOCK#

H_DRDY#

H_DINV#0

H_D#61

H_D#26

H_D#23

H_A#8

H_A#25

H_RS#2

H_D#7

H_D#14

H_D#8

H_D#30

CLK_MCH_BCLK

H_A#28

H_RS#1

H_TRDY#

H_DSTBN#2

H_D#63

H_D#52

H_D#48

H_D#36

H_D#31

H_D#29

H_A#4

H_A#30

H_A#29

H_DINV#2

H_D#41

H_D#24

H_D#21

H_D#18

H_D#9

H_BPRI#

H_ADS#

H_A#5

H_A#23

H_D#53

H_D#46

H_D#42

H_DBSY#

H_A#21

H_A#18

H_SCOMP

H_D#51

H_D#3

H_D#2

H_A#26

H_RESET#

DMI_TXN0

DMI_TXN1

DMI_TXN2

DMI_TXN3

DMI_TXP0

DMI_TXP1

DMI_TXP2

DMI_TXP3

DMI_RXN0

DMI_RXN1

DMI_RXN2

DMI_RXN3

DMI_RXP0

DMI_RXP1

DMI_RXP2

DMI_RXP3

CL_VREF CL_VREF

PM_POK_R

PM_POK_R

M_PWROK

SMRCOMP_VOH

M_CLK_DDR#3

+DDR_MCH_REF

CLK_MCH_DREFCLK

CLK_MCH_DREFCLK#

MCH_SSCDREFCLK

MCH_SSCDREFCLK#

H_D#[0..63]5

H_CPUSLP#5

H_DINV#0 5

H_DINV#1 5

H_DINV#2 5

H_DINV#3 5

H_DSTBN#0 5

H_DSTBN#1 5

H_DSTBN#2 5

H_DSTBN#3 5

H_DSTBP#0 5

H_DSTBP#1 5

H_DSTBP#2 5

H_DSTBP#3 5

DDR_CKE0_DIMMA 13

DDR_CKE1_DIMMA 13

DDR_CKE2_DIMMB 14

DDR_CKE3_DIMMB 14

DDR_CS0_DIMMA# 13

DDR_CS1_DIMMA# 13

DDR_CS2_DIMMB# 14

DDR_CS3_DIMMB# 14

CLK_MCH_3GPLL 16

CLK_MCH_3GPLL# 16

PLT_RST#17,19,22,24,28,29,34

H_A#[3..35] 4

H_ADS# 4

H_ADSTB#1 4

H_ADSTB#0 4

H_BPRI# 4

H_BNR# 4

H_DEFER# 4

H_BR0# 4

H_DBSY# 4

CLK_MCH_BCLK 16

CLK_MCH_BCLK# 16

H_DPWR# 5

H_DRDY# 4

H_HIT# 4

H_HITM# 4

H_LOCK# 4

H_TRDY# 4

M_CLK_DDR0 13

M_CLK_DDR1 13

M_CLK_DDR2 14

M_CLK_DDR3 14

M_CLK_DDR#0 13

M_CLK_DDR#1 13

M_CLK_DDR#2 14

M_ODT0 13

M_ODT1 13

M_ODT2 14

M_ODT3 14

MCH_SSCDREFCLK 16

MCH_SSCDREFCLK# 16

MCH_CLKSEL016 MCH_CLKSEL116 MCH_CLKSEL216

CFG59

CFG99

CFG79

CFG139 CFG129

CFG169

CFG209 CFG199

DMI_TXP0 19

DMI_RXN0 19

DMI_RXP0 19

DMI_TXN0 19

CLKMCHREQ# 16

MCH_ICH_SYNC# 19

PM_BMBUSY#19

DPRSLPVR19,49

H_DPRSTP#5,18,49 PM_EXTTS#013

CL_CLK0 19

CL_DATA0 19

H_RS#2 4

H_REQ#3 4

H_RS#1 4

H_REQ#2 4

H_RS#0 4

H_REQ#1 4

H_REQ#4 4

H_REQ#0 4

DMI_TXN1 19

DMI_TXN2 19

DMI_TXN3 19

DMI_TXP1 19

DMI_TXP2 19

DMI_TXP3 19

DMI_RXN1 19

DMI_RXN2 19

DMI_RXN3 19

DMI_RXP1 19

DMI_RXP2 19

DMI_RXP3 19

PM_EXTTS#114

PM_PWROK19,29

CFG89

CLK_MCH_DREFCLK 16

CLK_MCH_DREFCLK# 16

H_THERMTRIP#4,18

DDR_A_MA1413 DDR_B_MA1414

CL_RST# 19

M_PWROK 19

VGATE19,29,49

M_CLK_DDR#3 14

H_RESET#4

+VCCP

+VCCP

+VCCP

+3VS

+1.8V

+1.8V

+1.25VM_AXD

+1.8V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

CRESTLINE(1/6)-AGTL+/DMI/DDR2

Custom

749Thursday, January 10, 2008

2007/1/15 2008/1/15

Layout Note:

H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20

NA lead free

Near B3 pinwithin 100 mils from NB

layout note:

Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces

For Calero: 80.6ohm

For Crestline: 20ohm

12 mil

Layout Note:

+DDR_MCH_REF

trace width and

spacing is 20/20.

close to NB

Compal Electronics, Inc.

R77

20K_0402_5%

12

R333

1K_0402_1%

12

R323

100_0402_1%

12

R325

54.9_0402_1%

12

R679 0_0402_5% VGA@

12

C404

0.01U_0402_25V7K~N

1

2

T16 PAD

T38PAD

R111 100_0402_5%

1 2

R43

1K_0402_1%

12

C398

2.2U_0603_106K

1

2

T41 PAD

C403

2.2U_0603_106K

1

2

R84

0_0402_5%

12

R678 0_0402_5% VGA@

12

R680 0_0402_5% VGA@

12

R332

3.01K_0402_1%

12

R328 20_0402_1%

12

T12 PAD

T42 PAD

R681 0_0402_5% VGA@

12

R45

1K_0402_1%

12

R100

1K_0402_1%

12

T39PAD

R329 20_0402_1%

12

R82

10K_0402_5%

12

T37PAD

R56 0_0402_5%

12

R102 0_0402_5%

12

R326

54.9_0402_1%

12

T5PAD

C386

0.1U_0402_16V4Z~N

1

2

R331

1K_0402_1%

12

C391

0.1U_0402_16V4Z~N

1

2

T40PAD

HOST

U4A

CRESTLINE_1p0 UMA@

H_A#_10 G17

H_A#_11 C14

H_A#_12 K16

H_A#_13 B13

H_A#_14 L16

H_A#_15 J17

H_A#_16 B14

H_A#_17 K19

H_A#_18 P15

H_A#_19 R17

H_A#_20 B16

H_A#_21 H20

H_A#_22 L19

H_A#_23 D17

H_A#_24 M17

H_A#_25 N16

H_A#_26 J19

H_A#_27 B18

H_A#_28 E19

H_A#_29 B17

H_A#_3 J13

H_A#_30 B15

H_A#_31 E17

H_A#_4 B11

H_A#_5 C11

H_A#_6 M11

H_A#_7 C15

H_A#_8 F16

H_A#_9 L13

H_ADS# G12

H_ADSTB#_0 H17

H_ADSTB#_1 G20

H_BNR# C8

H_BPRI# E8

H_BREQ# F12

HPLL_CLK# AM7

H_CPURST#

B6

HPLL_CLK AM5

H_D#_0

E2

H_REQ#_2 A11

H_REQ#_3 H13

H_D#_1

G2

H_D#_10

M10

H_D#_20

M3

H_D#_30

W3

H_D#_40

AB2

H_D#_50

AJ14

H_D#_60

AE5

H_D#_8

N8

H_D#_9

H2

H_DBSY# C10

H_D#_11

N12

H_D#_12

N9

H_D#_13

H5

H_D#_14

P13

H_D#_15

K9

H_D#_16

M2

H_D#_17

W10

H_D#_18

Y8

H_D#_19

V4

H_D#_2

G7

H_D#_21

J1

H_D#_22

N5

H_D#_23

N3

H_D#_24

W6

H_D#_25

W9

H_D#_26

N2

H_D#_27

Y7

H_D#_28

Y9

H_D#_29

P4

H_D#_3

M6

H_D#_31

N1

H_D#_32

AD12

H_D#_33

AE3

H_D#_34

AD9

H_D#_35

AC9

H_D#_36

AC7

H_D#_37

AC14

H_D#_38

AD11

H_D#_39

AC11

H_D#_4

H7

H_D#_41

AD7

H_D#_42

AB1

H_D#_43

Y3

H_D#_44

AC6

H_D#_45

AE2

H_D#_46

AC5

H_D#_47

AG3

H_D#_48

AJ9

H_D#_49

AH8

H_D#_5

H3

H_D#_51

AE9

H_D#_52

AE11

H_D#_53

AH12

H_D#_54

AJ5

H_D#_55

AH5

H_D#_56

AJ6

H_D#_57

AE7

H_D#_58

AJ7

H_D#_59

AJ2

H_D#_6

G4

H_D#_61

AJ3

H_D#_62

AH2

H_D#_63

AH13

H_D#_7

F3

H_DEFER# D6

H_DINV#_0 K5

H_DINV#_1 L2

H_DINV#_2 AD13

H_DINV#_3 AE13

H_DPWR# H8

H_DRDY# K7

H_DSTBN#_0 M7

H_DSTBN#_1 K3

H_DSTBN#_2 AD2

H_DSTBN#_3 AH11

H_DSTBP#_0 L7

H_DSTBP#_1 K2

H_DSTBP#_2 AC2

H_DSTBP#_3 AJ10

H_SCOMP

W1

H_AVREF

B9

H_DVREF

A9

H_TRDY# B7

H_HIT# E4

H_HITM# C6

H_LOCK# G10

H_REQ#_0 M14

H_REQ#_1 E13

H_REQ#_4 B12

H_A#_32 C18

H_A#_33 A19

H_A#_34 B19

H_A#_35 N19

H_SWING

B3

H_CPUSLP#

E5

H_RCOMP

C2

H_RS#_0 E12

H_RS#_1 D7

H_RS#_2 D8

H_SCOMP#

W2

R99

392_0402_1%

12

R46

2K_0402_1%

12

R322

221_0603_1%

12

C181

0.1U_0402_16V4Z~N

1

2

T10PAD

R42

1K_0402_1%

12

C66

0.1U_0402_16V4Z~N

1

2

R83

10K_0402_5%

12

T9PAD T8PAD

PM

MISC

NC

DDR MUXINGCLK

DMI

CFGRSVD

GRAPHICS VID

ME

U4B

CRESTLINE_1p0 UMA@

SM_CK_0 AV29

SM_CK_1 BB23

RSVD28

BF23

SM_CK_3 BA25

SM_CK#_0 AW30

SM_CK#_1 BA23

RSVD29

BG23

SM_CK#_3 AW25

SM_CKE_0 BE29

SM_CKE_1 AY32

SM_CKE_3 BD39

SM_CKE_4 BG37

SM_CS#_0 BG20

SM_CS#_1 BK16

SM_CS#_2 BG16

SM_CS#_3 BE13

RSVD34

BH39

SM_ODT_0 BH18

SM_ODT_1 BJ15

SM_ODT_2 BJ14

SM_ODT_3 BE16

SM_RCOMP BL15

SM_RCOMP# BK14

SM_VREF_0 AR49

SM_VREF_1 AW4

CFG_18

L32

CFG_19

N33

CFG_2

N24

CFG_0

P27

CFG_1

N27

CFG_20

L35

CFG_3

C21

CFG_4

C23

CFG_5

F23

CFG_6

N23

CFG_7

G23

CFG_8

J20

CFG_9

C20

CFG_10

R24

CFG_11

L23

CFG_12

J23

CFG_13

E23

CFG_14

E20

CFG_15

K23

CFG_16

M20

CFG_17

M24

PM_BM_BUSY#

G41

PM_EXT_TS#_0

L36

PM_EXT_TS#_1

J36

PWROK

AW49

RSTIN#

AV20

DPLL_REF_CLK B42

DPLL_REF_CLK# C42

DPLL_REF_SSCLK H48

DPLL_REF_SSCLK# H47

DMI_RXN_0 AN47

DMI_RXN_1 AJ38

DMI_RXN_2 AN42

DMI_RXN_3 AN46

DMI_RXP_0 AM47

DMI_RXP_1 AJ39

DMI_RXP_2 AN41

DMI_RXP_3 AN45

DMI_TXN_0 AJ46

DMI_TXN_1 AJ41

DMI_TXN_2 AM40

DMI_TXN_3 AM44

DMI_TXP_0 AJ47

DMI_TXP_1 AJ42

DMI_TXP_2 AM39

DMI_TXP_3 AM43

RSVD10

AR37

RSVD12

AL36 RSVD11

AM36

RSVD13

AM37

RSVD22

BJ20

RSVD23

BK22

RSVD24

BF19

RSVD25

BH20

RSVD26

BK18

PM_DPRSTP#

L39

SM_CK_4 AV23

SM_CK#_4 AW23

RSVD30

BC23

RSVD31

BD24

RSVD35

AW20

RSVD36

BK20

RSVD5

AR12

RSVD6

AR13

RSVD7

AM12

RSVD8

AN13

RSVD1

P36

RSVD2

P37

RSVD3

R35

RSVD4

N35

GFX_VID_0 E35

GFX_VID_1 A39

GFX_VID_2 C38

GFX_VID_3 B39

GFX_VR_EN E36

RSVD27

BJ18

SM_RCOMP_VOH BK31

SM_RCOMP_VOL BL31

THERMTRIP#

N20

DPRSLPVR

G36

RSVD9

J12

CL_CLK AM49

CL_DATA AK50

CL_PWROK AT43

CL_RST# AN49

CL_VREF AM50

RSVD37

C48

RSVD38

D47

RSVD39

B44

RSVD40

C44

RSVD32

BJ29

RSVD33

BE24

RSVD21

B51

NC_1

BJ51

NC_2

BK51

NC_3

BK50

NC_4

BL50

NC_5

BL49

NC_6

BL3

NC_7

BL2

NC_8

BK1

NC_9

BJ1

NC_10

E1

NC_11

A5

NC_12

C51

NC_13

B50

NC_14

A50

NC_15

A49

SDVO_CTRL_CLK H35

SDVO_CTRL_DATA K36

CLK_REQ# G39

RSVD14

D20

ICH_SYNC# G40

RSVD20

H10

RSVD41

A35

RSVD42

B37

RSVD43

B36

RSVD44

B34

RSVD45

C34 PEG_CLK# K45

PEG_CLK K44

TEST_1 A37

NC_16

BK2 TEST_2 R32

R101 0_0402_5%@12

R324

24.9_0402_1%

12

T4PAD

C400

0.01U_0402_25V7K~N

1

2

T11 PAD

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_DQS#6

DDR_B_D63

DDR_B_D48

DDR_A_MA8

DDR_A_MA5

DDR_A_DQS#1

DDR_A_CAS#

DDR_A_BS0

DDR_A_D6

DDR_A_D52

DDR_A_D35

DDR_A_D27

DDR_A_D26

DDR_A_D16 DDR_B_DQS0

DDR_B_DM5

DDR_B_D60

DDR_B_D53

DDR_B_D20

DDR_B_D17

DDR_B_D11

DDR_B_D10

DDR_A_MA12

DDR_A_DQS#5

DDR_A_DM7

DDR_A_D55

DDR_A_D5

DDR_A_D45

DDR_A_D29

DDR_A_D1

DDR_B_DQS7

DDR_B_CAS#

DDR_B_D62

DDR_B_D19

DDR_A_MA13

DDR_A_DQS5

DDR_A_DM6

DDR_A_BS1

DDR_A_D48

DDR_A_D44

DDR_A_D20

DDR_A_D14

DDR_B_MA5

DDR_B_DQS#0

DDR_B_BS0

DDR_B_D50

DDR_B_D41

DDR_B_D23

DDR_A_D47

DDR_A_D39

DDR_A_D31

DDR_B_WE#

DDR_B_MA1

DDR_B_DM2

DDR_B_DM0

DDR_B_D33

DDR_B_D24

DDR_A_MA4

DDR_A_DQS7

DDR_A_D40

DDR_A_D38

DDR_A_D37

DDR_A_D2

DDR_B_MA7

DDR_B_MA13

DDR_B_D55

DDR_B_D32

DDR_B_D29

DDR_B_D28

DDR_B_D21

DDR_A_MA11

DDR_A_DQS#4

DDR_A_DQS#0

DDR_A_DM5

DDR_A_BS2

DDR_A_D63

DDR_A_D50

DDR_A_D19

DDR_A_D17

DDR_B_D8

DDR_B_D61

DDR_A_DQS4

DDR_A_DM4

DDR_A_D62

DDR_A_D54

DDR_A_D36

DDR_A_D11

DDR_B_DQS#5

DDR_B_DQS#3

DDR_B_DQS4

DDR_B_BS2

DDR_B_D54

DDR_B_D52

DDR_B_D25

DDR_A_MA6

DDR_A_MA2

DDR_A_D9

DDR_A_D4

SB_RCVEN#

DDR_B_MA8

DDR_B_DQS6

DDR_B_DQS5

DDR_B_DM4

DDR_B_DM3

DDR_B_D5

DDR_B_D34

DDR_B_D14

DDR_B_D0

DDR_A_MA3

DDR_A_MA0

DDR_A_D34

DDR_A_D18

DDR_B_MA2

DDR_B_MA10DDR_B_D42

DDR_B_D39

DDR_B_D38

DDR_B_D36

DDR_A_RAS#

DDR_A_MA10

DDR_A_DQS#3

DDR_A_D60

DDR_A_D46

DDR_A_D42

DDR_A_D28

DDR_B_MA4

DDR_B_D7

DDR_B_D6

DDR_B_D46

DDR_B_D30

DDR_B_D18DDR_A_DQS3

DDR_A_DQS0

DDR_A_DM0

DDR_A_D59

DDR_A_D58

DDR_A_D15

DDR_B_DM6

DDR_B_D57

DDR_B_D4

DDR_B_D35

DDR_B_D27

DDR_B_D2

DDR_B_D1

DDR_A_MA1

DDR_A_D43

DDR_A_D41

DDR_A_D24

DDR_B_MA9

DDR_B_MA12

DDR_B_MA11

DDR_B_DQS3

DDR_B_DQS2

DDR_B_DM1

DDR_B_D56

DDR_B_D37

DDR_B_D16

DDR_B_D12

DDR_A_WE#

DDR_A_DQS1

DDR_A_D51

DDR_A_D22

DDR_A_D12

DDR_A_D0

DDR_B_DQS#2

DDR_B_DQS#1

DDR_B_D59

DDR_B_D51

DDR_B_D47

DDR_A_MA9

DDR_A_DQS#2

DDR_A_DQS2

DDR_A_D7

DDR_A_D61

DDR_A_D56

DDR_A_D32

DDR_A_D30

DDR_A_D21

DDR_B_RAS#

DDR_B_BS1

DDR_B_D9

DDR_B_D45

DDR_B_D43

DDR_B_D40

DDR_B_D15

DDR_A_DQS#6

DDR_A_DM2

DDR_A_D53

DDR_A_D49

DDR_A_D10

DDR_B_MA0

DDR_B_DQS#7

DDR_B_D58

DDR_B_D44

DDR_B_D3

DDR_B_D13

DDR_A_MA7

DDR_A_DQS#7

DDR_A_DQS6

DDR_A_DM3

DDR_A_DM1

DDR_A_D8

DDR_A_D57

DDR_B_MA6

DDR_B_MA3

DDR_B_DQS#4

DDR_B_DQS1

DDR_B_DM7

DDR_B_D49

DDR_B_D31

DDR_B_D26

DDR_B_D22

SA_RCVEN#

DDR_A_D33

DDR_A_D3

DDR_A_D25

DDR_A_D23

DDR_A_D13

DDR_A_BS#0 13

DDR_A_BS#1 13

DDR_A_BS#2 13

DDR_A_DQS[0..7] 13

DDR_A_DQS#[0..7] 13

DDR_A_MA[0..13] 13

DDR_A_RAS# 13

DDR_A_D[0..63]13

DDR_B_BS#0 14

DDR_B_BS#1 14

DDR_B_BS#2 14

DDR_B_DM[0..7] 14

DDR_B_DQS[0..7] 14

DDR_B_DQS#[0..7] 14

DDR_B_MA[0..13] 14

DDR_B_RAS# 14

DDR_B_D[0..63]14

DDR_A_DM[0..7] 13

DDR_A_CAS# 13 DDR_B_CAS# 14

DDR_A_WE# 13

DDR_B_WE# 14

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

CRESTLINE((2/6)-DDR2 A/B CH

Custom

849Thursday, January 10, 2008

2007/1/15 2008/1/15

Compal Electronics, Inc.

DDR SYSTEM MEMORY A

U4D

CRESTLINE_1p0

SA_DQ_0

AR43

SA_DQ_1

AW44

SA_DQ_10

BG47

SA_DQ_11

BJ45

SA_DQ_12

BB47

SA_DQ_13

BG50

SA_DQ_14

BH49

SA_DQ_15

BE45

SA_DQ_16

AW43

SA_DQ_17

BE44

SA_DQ_18

BG42

SA_DQ_19

BE40

SA_DQ_2

BA45

SA_DQ_20

BF44

SA_DQ_21

BH45

SA_DQ_22

BG40

SA_DQ_23

BF40

SA_DQ_24

AR40

SA_DQ_25

AW40

SA_DQ_26

AT39

SA_DQ_27

AW36

SA_DQ_28

AW41

SA_DQ_29

AY41

SA_DQ_3

AY46

SA_DQ_30

AV38

SA_DQ_31

AT38

SA_DQ_32

AV13

SA_DQ_33

AT13

SA_DQ_34

AW11

SA_DQ_35

AV11

SA_DQ_36

AU15

SA_DQ_37

AT11

SA_DQ_38

BA13

SA_DQ_39

BA11

SA_DQ_4

AR41

SA_DQ_40

BE10

SA_DQ_41

BD10

SA_DQ_42

BD8

SA_DQ_43

AY9

SA_DQ_44

BG10

SA_DQ_45

AW9

SA_DQ_46

BD7

SA_DQ_47

BB9

SA_DQ_48

BB5

SA_DQ_49

AY7

SA_DQ_5

AR45

SA_DQ_50

AT5

SA_DQ_51

AT7

SA_DQ_52

AY6

SA_DQ_53

BB7

SA_DQ_54

AR5

SA_DQ_55

AR8

SA_DQ_56

AR9

SA_DQ_57

AN3

SA_DQ_58

AM8

SA_DQ_59

AN10

SA_DQ_6

AT42

SA_DQ_60

AT9

SA_DQ_61

AN9

SA_DQ_62

AM9

SA_DQ_63

AN11

SA_DQ_7

AW47

SA_DQ_8

BB45

SA_DQ_9

BF48

SA_BS_0 BB19

SA_BS_1 BK19

SA_BS_2 BF29

SA_CAS# BL17

SA_DM_0 AT45

SA_DM_1 BD44

SA_DM_2 BD42

SA_DM_3 AW38

SA_DM_4 AW13

SA_DM_5 BG8

SA_DM_6 AY5

SA_DQS_0 AT46

SA_DQS_1 BE48

SA_DQS_2 BB43

SA_DQS_3 BC37

SA_DQS_4 BB16

SA_DQS_5 BH6

SA_DQS_6 BB2

SA_DQS_7 AP3

SA_DM_7 AN6

SA_DQS#_0 AT47

SA_DQS#_1 BD47

SA_DQS#_2 BC41

SA_DQS#_3 BA37

SA_DQS#_4 BA16

SA_DQS#_5 BH7

SA_DQS#_6 BC1

SA_DQS#_7 AP2

SA_MA_0 BJ19

SA_MA_1 BD20

SA_MA_10 BC19

SA_MA_11 BE28

SA_MA_12 BG30

SA_MA_13 BJ16

SA_MA_2 BK27

SA_MA_3 BH28

SA_MA_4 BL24

SA_MA_5 BK28

SA_MA_6 BJ27

SA_MA_7 BJ25

SA_MA_8 BL28

SA_MA_9 BA28

SA_RAS# BE18

SA_RCVEN# AY20

SA_WE# BA19

T6 T7

DDR SYSTEM MEMORY B

U4E

CRESTLINE_1p0

SB_DQ_0

AP49

SB_DQ_1

AR51

SB_DQ_10

BA49

SB_DQ_11

BE50

SB_DQ_12

BA51

SB_DQ_13

AY49

SB_DQ_14

BF50

SB_DQ_15

BF49

SB_DQ_16

BJ50

SB_DQ_17

BJ44

SB_DQ_18

BJ43

SB_DQ_19

BL43

SB_DQ_2

AW50

SB_DQ_20

BK47

SB_DQ_21

BK49

SB_DQ_22

BK43

SB_DQ_23

BK42

SB_DQ_24

BJ41

SB_DQ_25

BL41

SB_DQ_26

BJ37

SB_DQ_27

BJ36

SB_DQ_28

BK41

SB_DQ_29

BJ40

SB_DQ_3

AW51

SB_DQ_30

BL35

SB_DQ_31

BK37

SB_DQ_32

BK13

SB_DQ_33

BE11

SB_DQ_34

BK11

SB_DQ_35

BC11

SB_DQ_36

BC13

SB_DQ_37

BE12

SB_DQ_38

BC12

SB_DQ_39

BG12

SB_DQ_4

AN51

SB_DQ_40

BJ10

SB_DQ_41

BL9

SB_DQ_42

BK5

SB_DQ_43

BL5

SB_DQ_44

BK9

SB_DQ_45

BK10

SB_DQ_46

BJ8

SB_DQ_47

BJ6

SB_DQ_48

BF4

SB_DQ_49

BH5

SB_DQ_5

AN50

SB_DQ_50

BG1

SB_DQ_51

BC2

SB_DQ_52

BK3

SB_DQ_53

BE4

SB_DQ_54

BD3

SB_DQ_55

BJ2

SB_DQ_56

BA3

SB_DQ_57

BB3

SB_DQ_58

AR1

SB_DQ_59

AT3

SB_DQ_6

AV50

SB_DQ_60

AY2

SB_DQ_61

AY3

SB_DQ_62

AU2

SB_DQ_63

AT2

SB_DQ_7

AV49

SB_DQ_8

BA50

SB_DQ_9

BB50

SB_BS_0 AY17

SB_BS_1 BG18

SB_BS_2 BG36

SB_CAS# BE17

SB_DM_0 AR50

SB_DM_1 BD49

SB_DM_2 BK45

SB_DM_3 BL39

SB_DM_4 BH12

SB_DM_5 BJ7

SB_DM_6 BF3

SB_DM_7 AW2

SB_DQS_0 AT50

SB_DQS_1 BD50

SB_DQS_2 BK46

SB_DQS_3 BK39

SB_DQS_4 BJ12

SB_DQS_5 BL7

SB_DQS_6 BE2

SB_DQS_7 AV2

SB_DQS#_0 AU50

SB_DQS#_1 BC50

SB_DQS#_2 BL45

SB_DQS#_3 BK38

SB_DQS#_4 BK12

SB_DQS#_5 BK7

SB_DQS#_6 BF2

SB_DQS#_7 AV3

SB_MA_0 BC18

SB_MA_1 BG28

SB_MA_10 BG17

SB_MA_11 BE37

SB_MA_12 BA39

SB_MA_13 BG13

SB_MA_2 BG25

SB_MA_3 AW17

SB_MA_4 BF25

SB_MA_5 BE25

SB_MA_6 BA29

SB_MA_7 BC28

SB_MA_8 AY28

SB_MA_9 BD37

SB_RAS# AV16

SB_RCVEN# AY18

SB_WE# BC17

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3VDDCCL

3VDDCDA

BIA_PWM

GMCH_ENBKL

GMCH_LVDDEN

GMCH_EDID_CLK_LCD

GMCH_EDID_DAT_LCD

PEGCOMP

CTRL_CLK

CTRL_DATA

CRT_B

GMCH_LVDSA1+

GMCH_LVDSA2+

GMCH_LVDSA0+

GMCH_LVDSA1-

GMCH_LVDSA2-

GMCH_LVDSA0-

GMCH_LVDSAC-

GMCH_LVDSAC+

CRT_G

CRT_R

CRT_HSYNC

CRT_VSYNC

GMCH_EDID_DAT_LCD

GMCH_EDID_CLK_LCD

CTRL_CLK

CTRL_DATA

PEG_NRX_GTX_P2

PEG_NRX_GTX_P3

PEG_NRX_GTX_P5

PEG_NRX_GTX_P6

PEG_NRX_GTX_P8

PEG_NRX_GTX_P9

PEG_NRX_GTX_P11

PEG_NRX_GTX_P12

PEG_NRX_GTX_P14

PEG_NRX_GTX_P15

PEG_NRX_GTX_P0

PEG_NRX_GTX_P1

PEG_NRX_GTX_P4

PEG_NRX_GTX_P7

PEG_NRX_GTX_P10

PEG_NRX_GTX_P13

PEG_TXP15

PEG_TXP14

PEG_TXP13

PEG_TXP12

PEG_TXP8

PEG_TXP9

PEG_TXP4

PEG_TXP5

PEG_TXP6

PEG_TXP10

PEG_TXP11

PEG_TXP7

PEG_TXP0

PEG_TXP1

PEG_TXP2

PEG_TXP3

PEG_NTX_GRX_P10

PEG_NTX_GRX_P4

PEG_NTX_GRX_P5

PEG_NTX_GRX_P7

PEG_NTX_GRX_P2

PEG_NTX_GRX_P6

PEG_NTX_GRX_P3

PEG_NTX_GRX_P11

PEG_NTX_GRX_P14

PEG_NTX_GRX_P12

PEG_NTX_GRX_N4

PEG_NTX_GRX_P9

PEG_NTX_GRX_P13

PEG_NTX_GRX_P1

PEG_NTX_GRX_P0

PEG_NTX_GRX_P8

PEG_NTX_GRX_N3

PEG_NTX_GRX_N12

PEG_NTX_GRX_N10

PEG_NTX_GRX_N7

PEG_NTX_GRX_P15

PEG_NTX_GRX_N9

PEG_NTX_GRX_N6

PEG_NTX_GRX_N0

PEG_NTX_GRX_N1

PEG_TXN5

PEG_NTX_GRX_N15

PEG_NTX_GRX_N14

PEG_NTX_GRX_N2

PEG_NTX_GRX_N5

PEG_TXN11 PEG_NTX_GRX_N11

PEG_TXN12

PEG_TXN13

PEG_TXN10

PEG_NTX_GRX_N8

PEG_NTX_GRX_N13

PEG_TXN14

PEG_TXN4

PEG_TXN6

PEG_TXN1

PEG_TXN0

PEG_TXN15

PEG_TXN7

PEG_TXN8

PEG_TXN2

PEG_TXN3

PEG_TXN9

PEG_NRX_GTX_N10

PEG_NRX_GTX_N8

PEG_NRX_GTX_N2

PEG_NRX_GTX_N0

PEG_NRX_GTX_N4

PEG_NRX_GTX_N9

PEG_NRX_GTX_N6

PEG_NRX_GTX_N3

PEG_NRX_GTX_N12

PEG_NRX_GTX_N7

PEG_NRX_GTX_N15

PEG_NRX_GTX_N13

PEG_NRX_GTX_N14

PEG_NRX_GTX_N1

PEG_NRX_GTX_N11

PEG_NRX_GTX_N5

CFG137

CFG127

CFG97

CFG77

CFG207

CFG197

CFG167

CFG87

GMCH_EDID_DAT_LCD15

CFG57

BIA_PWM15 GMCH_ENBKL15

GMCH_LVDDEN15

GMCH_LVDSAC+15

GMCH_LVDSA0+15 GMCH_LVDSA1+15 GMCH_LVDSA2+15

GMCH_LVDSA0-15 GMCH_LVDSA1-15 GMCH_LVDSA2-15

GMCH_LVDSAC-15

CRT_VSYNC15

CRT_HSYNC15

GMCH_EDID_CLK_LCD15

PEG_NRX_GTX_P[0..15] 34

PEG_NRX_GTX_N[0..15] 34

PEG_NTX_GRX_N[0..15] 34

PEG_NTX_GRX_P[0..15] 34

CRT_B15 CRT_G15 CRT_R15

3VDDCCL15 3VDDCDA15

+3VS

+VCCP

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

CRESTLINE((3/6)-VGA/LVDS/TV

Custom

949Thursday, January 10, 2008

2007/1/15 2008/1/15

CFG9

0 = Normal mode

1 = Low Power mode

(PCIE Graphics Lane Reversal)

CFG[2:0] FSB Freq select

Reserved

Reserved

ReservedCFG[15:14]

Strap Pin Table

CFG[19:18] have internal pull down

CFG[17:3] have internal pull up

ReservedCFG[18:17]

(Lane number in Order)

Others = Reserved

011 = FSB 667MHz

010 = FSB 800MHz

11 = Normal Operation

10 = All Z Mode Enabled

01 = XOR Mode Enabled

*

1 = Reverse Lane

0 = Reverse Lane

SDVO_CTRLDATA

1 = Enabled

1 = SDVO Device Present

0 = Normal Operation

0 = No SDVO Device Present

(Default)

*

0 = Disabled

*

0 = DMI x 2

00 = Reserved

*

*

*

*

1 = PCIE/SDVO are operating simu.

0 = Only PCIE or SDVO is operational. *

1 = Normal Operation

1 = DMI x 4

0 = Reserved

1 = Mobile CPU

CFG5 (DMI select)

CFG19 (DMI Lane Reversal)

CFG16 (FSB Dynamic ODT)

CFG6

CFG7 (CPU Strap)

CFG20 (PCIE/SDVO concurrent)

CFG[11:10]

CFG[13:12] (XOR/ALLZ)

CFG8 (Low power PCIE) *

For Calero: 255ohm

For Crestline:1.3kohm

For Calero: 1.5Kohm

For Crestline:2.4kohm

PEGCOMP trace width

and spacing is 20/25 mils.

Note: CRT / TV-out should route to JP30 first then to the JP1 & JP2 on system side.

Compal Electronics, Inc.

C562 0.1U_0402_16V7KVGA@

1 2

C558 0.1U_0402_16V7KVGA@

1 2

R6575_0402_1%

1 2

C563 0.1U_0402_16V7KVGA@

1 2

C567 0.1U_0402_16V7KVGA@

1 2

C548 0.1U_0402_16V7KVGA@

1 2

R58 4.02K_0402_1%@

1 2

R76

0_0402_5%

VGA@

C539 0.1U_0402_16V7KVGA@

1 2

R81 10K_0402_5%UMA@

1 2

C568 0.1U_0402_16V7KVGA@

1 2

R682

0_0402_5%

VGA@

1 2

R684

0_0402_5%

VGA@

1 2

R95

24.9_0402_1%

1 2

C553 0.1U_0402_16V7KVGA@

1 2

R6875_0402_1%

1 2

C555 0.1U_0402_16V7KVGA@

1 2

R677

0_0402_5%

VGA@

1 2

R675

0_0402_5%

VGA@

1 2

C552 0.1U_0402_16V7KVGA@

1 2

R94 2.4K_0402_1% 12

R483

2.2K_0402_5%

UMA@

1 2

C545 0.1U_0402_16V7KVGA@

1 2

R80 10K_0402_5%UMA@

1 2

C538 0.1U_0402_16V7KVGA@

1 2

C546 0.1U_0402_16V7KVGA@

1 2

R74

150_0402_1%

UMA@

1 2

R57 4.02K_0402_1%@

1 2

R59 4.02K_0402_1%@

1 2

C544 0.1U_0402_16V7KVGA@

1 2

C560 0.1U_0402_16V7KVGA@

1 2

C537 0.1U_0402_16V7KVGA@

1 2

R55 4.02K_0402_1%@

1 2

C565 0.1U_0402_16V7KVGA@

1 2

C566 0.1U_0402_16V7KVGA@

1 2

C561 0.1U_0402_16V7KVGA@

1 2

R676

0_0402_5%

VGA@

1 2

R74

0_0402_5%

VGA@

R72 4.02K_0402_1%@

1 2

C550 0.1U_0402_16V7KVGA@

1 2

R75

0_0402_5%

VGA@

C547 0.1U_0402_16V7KVGA@

1 2

R63 4.02K_0402_1%@

1 2

LVDS

PCI-EXPRESS GRAPHICS

TV VGA

U4C

CRESTLINE_1p0

PEG_COMPI N43

PEG_COMPO M43

PEG_RX#_0 J51

PEG_RX#_1 L51

PEG_RX#_2 N47

PEG_RX#_3 T45

PEG_RX#_4 T50

PEG_RX#_5 U40

PEG_RX#_6 Y44

PEG_RX#_7 Y40

PEG_RX#_8 AB51

PEG_RX#_9 W49

PEG_RX#_10 AD44

PEG_RX#_11 AD40

PEG_RX#_12 AG46

PEG_RX#_13 AH49

PEG_RX#_14 AG45

PEG_RX#_15 AG41

PEG_RX_0 J50

PEG_RX_1 L50

PEG_RX_2 M47

PEG_RX_3 U44

PEG_RX_4 T49

PEG_RX_5 T41

PEG_RX_6 W45

PEG_RX_7 W41

PEG_RX_8 AB50

PEG_RX_9 Y48

PEG_RX_10 AC45

PEG_RX_11 AC41

PEG_RX_12 AH47

PEG_RX_13 AG49

PEG_RX_14 AH45

PEG_RX_15 AG42

PEG_TX#_0 N45

PEG_TX#_10 AC46

PEG_TX#_3 N51

PEG_TX#_4 R50

PEG_TX#_5 T42

PEG_TX#_6 Y43

PEG_TX#_7 W46

PEG_TX#_8 W38

PEG_TX#_9 AD39

PEG_TX#_1 U39

PEG_TX#_11 AC49

PEG_TX#_12 AC42

PEG_TX#_13 AH39

PEG_TX#_14 AE49

PEG_TX#_15 AH44

PEG_TX#_2 U47

PEG_TX_0 M45

PEG_TX_1 T38

PEG_TX_2 T46

PEG_TX_3 N50

PEG_TX_4 R51

PEG_TX_5 U43

PEG_TX_6 W42

PEG_TX_7 Y47

PEG_TX_8 Y39

PEG_TX_9 AC38

PEG_TX_10 AD47

PEG_TX_11 AC50

PEG_TX_12 AD43

PEG_TX_13 AG39

PEG_TX_14 AE50

PEG_TX_15 AH43

L_CTRL_CLK

E39

L_CTRL_DATA

E40

L_DDC_CLK

C37

L_DDC_DATA

D35

L_VDD_EN

K40

LVDS_IBG

L41

LVDS_VBG

L43

LVDS_VREFH

N41

LVDS_VREFL

N40

LVDSA_CLK#

D46

LVDSA_CLK

C45

LVDSA_DATA#_0

G51

LVDSA_DATA#_1

E51

LVDSA_DATA#_2

F49

LVDSA_DATA_1

E50

LVDSA_DATA_2

F48

LVDSB_CLK#

D44

LVDSB_CLK

E42

LVDSB_DATA#_0

G44

LVDSB_DATA#_1

B47

LVDSB_DATA#_2

B45

LVDSB_DATA_1

A47

LVDSB_DATA_2

A45

L_BKLT_EN

H39

TVA_DAC

E27

TVB_DAC

G27

TVC_DAC

K27

TVA_RTN

F27

TVB_RTN

J27

TVC_RTN

L27

CRT_BLUE

H32

CRT_BLUE#

G32

CRT_DDC_CLK

K33

CRT_DDC_DATA

G35

CRT_GREEN

K29

CRT_GREEN#

J29

CRT_HSYNC

F33

CRT_TVO_IREF

C32

CRT_RED

F29

CRT_RED#

E29

CRT_VSYNC

E33

LVDSA_DATA_0

G50

LVDSB_DATA_0

E44

L_BKLT_CTRL

J40

TV_DCONSEL_0

M35

TV_DCONSEL_1

P33

R70 4.02K_0402_1%@

1 2

C564 0.1U_0402_16V7KVGA@

1 2

R76

150_0402_1%

UMA@

1 2

C549 0.1U_0402_16V7KVGA@

1 2

C542 0.1U_0402_16V7KVGA@

1 2

C559 0.1U_0402_16V7KVGA@

1 2

C543 0.1U_0402_16V7KVGA@

1 2

C540 0.1U_0402_16V7KVGA@

1 2

R73 4.02K_0402_1%@

1 2

R6775_0402_1%

1 2

C554 0.1U_0402_16V7KVGA@

1 2

R683

0_0402_5%

VGA@

1 2

C557 0.1U_0402_16V7KVGA@

1 2

C556 0.1U_0402_16V7KVGA@

1 2

C551 0.1U_0402_16V7KVGA@

1 2

C541 0.1U_0402_16V7KVGA@

1 2

R66 4.02K_0402_1%@

1 2

R484

2.2K_0402_5%

UMA@

1 2

R334

1.3K_0402_1%

12

R75

150_0402_1%

UMA@

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.25VM_A_SM

+V1.25VS_AXF

+1.25VS

+1.25VS_DMI

+1.8V_SM_CK

+3VS_HV

+VCC_PEG

+1.25VS_PEGPLL

+1.25VS

+1.25VM_AXD

+1.25VM_A_SM_CK

+3VS_PEG_BG

+3VS

+1.8V_TXLVDS

+3VS

+3VS_DAC_BG

+3VS

+3VS_DAC_CRT

+3VS

+3VS_TVDACA

+3VS

+3VS_TVDACB

+3VS

+3VS_TVDACC

+1.8V

+1.8V_LVDS

+1.5VS

+3VS_TVDACA

+3VS_TVDACB

+3VS_TVDACC

+1.25VM_HPLL

+1.5VS_TVDAC

+1.8V_LVDS

+1.5VS_QDAC

+1.8V_TXLVDS

+1.25VM_MPLL

+1.25VS_DPLLB

+1.25VM_HPLL

+1.25VS_DPLLA

+3VS_DAC_BG

VCCSYNC

+3VS

+3VS_DAC_CRT

+1.8V_TXLVDS

+1.8V

+1.25VM_HPLL

+1.25VS

+1.25VM_MPLL

+1.25VS

+VCCP

+1.25VS_PEGPLL +1.25VS

+1.25VS

+V1.25VS_AXF

+1.25VS

+1.25VS_DMI +1.8V

+1.8V_SM_CK

+1.25VS_DPLLA

+1.25VS_DPLLB

+1.25VS

+1.25VS

+1.5VS

+1.5VS_TVDAC

+VCCP

+3VS

+VCCP_D

+3VS_HV

+VCC_PEG

+1.25VS_PEGPLL

+VCCP

+1.5VS_QDAC

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

CRESTLINE(4/6)-PWR

Custom

10 49Thursday, January 10, 2008

2007/1/15 2008/1/15

20 mils

40 mils

20mils

0317 change value

Compal Electronics, Inc.

Take off 0ohm 0805

because Layout

C72

1U_0603_10V4Z

1

2

POWER

CRTPLLA PEGA SMTV

D TV/CRTLVDS

VTTLF

PEG SM CK AXD

AXF

VTT

DMI

HV

A CK A LVDS

U4H

CRESTLINE_1p0 UMA@

VTT_19 T2

VTT_20 R3

VTT_21 R2

VTT_22 R1

VCCD_CRT

M32

VCCA_PEG_BG

K50

VCCA_PEG_PLL

U51

VCCA_CRT_DAC_1

A33

VCCA_CRT_DAC_2

B33

VCCA_DPLLA

B49

VCCA_DPLLB

H49

VCCA_HPLL

AL2

VCCA_LVDS

A41

VCCA_MPLL

AM2

VCCA_TVA_DAC_1

C25

VCCA_TVA_DAC_2

B25

VCCA_TVB_DAC_1

C27

VCCA_TVB_DAC_2

B27

VCCA_TVC_DAC_1

B28

VCCA_TVC_DAC_2

A28

VCCD_PEG_PLL

U48

VTT_15 T7

VTT_16 T6

VTT_17 T5

VTT_18 T3

VTT_12 T11

VTT_13 T10

VTT_14 T9

VCCSYNC

J32

VCCD_HPLL

AN2

VTT_1 U13

VTT_2 U12

VTT_4 U9

VTT_5 U8

VTT_6 U7

VTT_7 U5

VTT_8 U3

VTT_9 U2

VTT_10 U1

VTT_11 T13

VTT_3 U11

VCCA_SM_CK_1

BC29

VCCA_SM_CK_2

BB29

VCCA_DAC_BG

A30

VCCD_TVDAC

L29

VTTLF1 A7

VTTLF2 F2

VTTLF3 AH1

VCC_RXR_DMI_1 AH50

VCC_RXR_DMI_2 AH51

VCC_SM_CK_1 BK24

VCC_SM_CK_2 BK23

VCC_SM_CK_3 BJ24

VCC_SM_CK_4 BJ23

VCCD_LVDS_1

J41

VCCD_QDAC

N28

VCC_AXD_2 AU28

VCC_AXD_3 AU24

VCC_AXD_5 AT25

VCC_AXF_1 B23

VCC_AXF_2 B21

VCC_AXF_3 A21

VCCA_SM_1

AW18

VCCA_SM_2

AV19

VCCA_SM_3

AU19

VCCA_SM_4

AU18

VCCA_SM_5

AU17

VCCA_SM_7

AT22

VCCA_SM_8

AT21

VCCA_SM_9

AT19

VCC_DMI AJ50

VCC_TX_LVDS A43

VSSA_DAC_BG

B32

VSSA_LVDS

B41

VSSA_PEG_BG

K49

VCC_HV_1 C40

VCC_HV_2 B40

VCC_PEG_1 AD51

VCCA_SM_10

AT18

VCCA_SM_11

AT17

VCCA_SM_NCTF_1

AR17

VCCA_SM_NCTF_2

AR16

VCCD_LVDS_2

H42

VCC_PEG_2 W50

VCC_PEG_3 W51

VCC_PEG_4 V49

VCC_PEG_5 V50

VCC_AXD_NCTF AR29

VCC_AXD_4 AT29

VCC_AXD_6 AT30

VCC_AXD_1 AT23

C56

2.2U_0805_16V4Z

1

2

C122

1U_0603_10V4Z

@

1

2

C399

0.1U_0402_16V4Z~N

1

2

R64

0_0805_5%

1 2

C383

0.47U_0603_10V7K

1

2

R109

0_0603_5%

UMA@

12

C97

0.022U_0402_16V7K~N

UMA@

1

2

C413

0_0402_5%

VGA@

C98

0_0402_5%

VGA@

L11

BLM18PG181SN1D_0603

UMA@

12

C382

0.47U_0603_10V7K

1

2

D7

CH751H-40PT_SOD323-2

2 1

C380

0.1U_0402_16V4Z~N

1

2

C373

4.7U_0805_10V4Z~N

1

2

C401

0.022U_0402_16V7K~N

UMA@

1

2

C187

10U_0805_10V4Z~N

UMA@

1

2

L12

BLM18PG121SN1D_0603

12

C408

4.7U_0805_10V4Z~N

UMA@

1

2

R53

0_0603_5%

UMA@

12

+

C68

150U_B2_6.3VM_R45M

1

2

R97

0_0805_5%

1 2

C63

0.1U_0402_16V4Z~N

1

2

C411

0.1U_0402_16V4Z~N

UMA@

1

2

C174

0.1U_0402_16V4Z~N

UMA@

1

2

C402

0.1U_0402_16V4Z~N

UMA@

1

2

C123

0.1U_0402_16V4Z~N

1

2

L9

MBK2012121YZF_0805

12

R62

0_0603_5%

UMA@

12

C141

0_0402_5%

VGA@

C141

0.1U_0402_16V4Z~N

UMA@

1

2

C173

0.1U_0402_16V4Z~N

UMA@

1

2

C407

0.022U_0402_16V7K~N

UMA@

1

2

C175

0.1U_0402_16V4Z~N

1

2

+

C370

330U_V_2.5VM

1

2

L10

BLM18PG181SN1D_0603

UMA@

12

C180

0.1U_0402_16V4Z~N

1

2

R71

0_0603_5%

12

C114

0.1U_0402_16V4Z~N

1

2

C385

0.47U_0603_10V7K

1

2

C98

0.1U_0402_16V4Z~N

UMA@

1

2

C406

0_0402_5%

VGA@

R349

0_0603_5% UMA@

12

C410

0.1U_0402_16V4Z~N

1

2

C179

10U_0805_10V4Z~N

1

2

+

C417

220U_D2_4VY_R15M

1

2

R50

0_0805_5%

1 2

C95

0.1U_0402_16V4Z~N

UMA@

1

2

C407

0_0402_5%

VGA@

C115

0.022U_0402_16V7K~N

1

2

R330

0_0603_5%

1 2

C414

1000P_0402_50V7K~N

UMA@

1

2

C384

4.7U_0805_10V4Z~N

1

2

R92

0_0603_5%

UMA@

12

C176

0.1U_0402_16V4Z~N

1

2

C83

4.7U_0805_6.3V6K

1

2

C104

22U_0805_6.3V4Z

1

2

C413 1000P_0402_50V7K~N

UMA@

1

2

C113

0.022U_0402_16V7K~N

UMA@

1

2

R69

0_0603_5%

UMA@

12

C103

1U_0402_6.3V4Z

@

1

2

+

C191

220U_D2_4VY_R15M

UMA@

1

2

U4

CRESTLINE_1p0

VGA@

L14

10U_FLC-453232-100K_0.25A_10%

UMA@

1 2

C381

10U_0805_10V4Z~N

1

2

R60

0_0805_5%

1 2

C395

10U_0603_6.3V6M

1

2

C174

0_0402_5%

VGA@

R54

0_0603_5%

UMA@

12

R79

10_0402_5%

12

C96

0_0402_5%

VGA@

C182

10U_0805_10V4Z~N

UMA@

1

2

C405

0.1U_0402_16V4Z~N

UMA@

1

2

R327

0_0805_5%

1 2

C96

0.1U_0402_16V4Z~N

UMA@

1

2

C173

0_0402_5%

VGA@

C186

0_0603_5%

VGA@

L13

10U_FLC-453232-100K_0.25A_10%

UMA@

1 2

C416

10U_0805_10V4Z~N

1

2

+

C418

220U_D2_4VY_R15M

UMA@

1

2

C116

0.022U_0402_16V7K~N

UMA@

1

2

C178

22U_0805_6.3VAM

UMA@

1

2

R674 0_0402_5%VGA@

12

C62

10U_0805_10V4Z~N

1

2

C82

22U_0805_6.3V4Z

1

2

R103

0_0603_5%

1 2

R93

0_0402_5%

12

R673 0_0402_5% UMA@

12

C394

10U_0805_10V4Z~N

1

2

C402

0_0402_5%

VGA@

L29

MBK2012121YZF_0805

12

C65

0.47U_0603_10V7K

1

2

C186

1U_0603_10V4Z

UMA@

1

2

C397

1U_0603_10V4Z

1

2

C95

0_0402_5%

VGA@

C406

0.022U_0402_16V7K~N

UMA@

1

2

C87

1U_0603_10V4Z

1

2

C396

22U_0805_6.3V4Z

1

2

C88

10U_0805_10V4Z~N

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCSM_LF1

VCCSM_LF7

VCCSM_LF2

VCCSM_LF3

VCCSM_LF6

VCCSM_LF4

VCCSM_LF5

+VCCP

+VCCP

+1.8V

+VCCP

+VCCP

+VCCP

+VCCP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

CRESTLINE((5/6)-PWR/GND

Custom

11 49Thursday, January 10, 2008

2007/1/15 2008/1/15

370mil

160mil

Compal Electronics, Inc.

C102

0.1U_0402_16V4Z~N

1

2

C144

0.22U_0402_10V4Z~N

12

+

C57

330U_V_2.5VM

UMA@

1

2

C146 0.47U_0402_6.3V6K

1

2

C86

0.22U_0402_10V4Z~N

UMA@

12

C117

0.1U_0402_16V4Z~N

1

2

C142

0.1U_0402_16V4Z~N

1

2

C164

0.01U_0402_16V7K~N

1

2

C100

10U_0805_10V4Z~N

UMA@

1

2

+

C148

330U_V_2.5VM

1

2

POWER

VCC CORE

VCC SMVCC GFX

VCC GFX NCTF

VCC SM LF

U4G

CRESTLINE_1p0 UMA@

VCC_5

AC32

VCC_6

AK32

VCC_7

AJ31

VCC_8

AJ28

VCC_9

AH32

VCC_10

AH31

VCC_11

AH29

VCC_12

AF32

VCC_2

AT34

VCC_4

AC31

VCC_SM_10

BA35

VCC_SM_20

BF33

VCC_SM_30

BJ34

VCC_SM_6

AW35

VCC_SM_7

AY35

VCC_SM_8

BA32

VCC_SM_9

BA33

VCC_SM_11

BB33

VCC_SM_12

BC32

VCC_SM_13

BC33

VCC_SM_14

BC35

VCC_SM_15

BD32

VCC_SM_16

BD35

VCC_SM_17

BE32

VCC_SM_18

BE33

VCC_SM_19

BE35

VCC_SM_2

AU33

VCC_SM_21

BF34

VCC_SM_22

BG32

VCC_SM_23

BG33

VCC_SM_24

BG35

VCC_SM_25

BH32

VCC_SM_26

BH34

VCC_SM_27

BH35

VCC_SM_28

BJ32

VCC_SM_29

BJ33

VCC_SM_3

AU35

VCC_SM_31

BK32

VCC_SM_32

BK33

VCC_SM_33

BK34

VCC_SM_34

BK35

VCC_AXG_NCTF_10 U17

VCC_AXG_NCTF_11 U19

VCC_AXG_NCTF_12 U20

VCC_AXG_NCTF_13 U21

VCC_AXG_NCTF_14 U23

VCC_AXG_NCTF_15 U26

VCC_AXG_NCTF_16 V16

VCC_AXG_NCTF_17 V17

VCC_AXG_NCTF_18 V19

VCC_AXG_NCTF_19 V20

VCC_AXG_NCTF_2 T18

VCC_AXG_NCTF_20 V21

VCC_AXG_NCTF_21 V23

VCC_AXG_NCTF_22 V24

VCC_AXG_NCTF_23 Y15

VCC_AXG_NCTF_24 Y16

VCC_AXG_NCTF_25 Y17

VCC_AXG_NCTF_26 Y19

VCC_AXG_NCTF_27 Y20

VCC_AXG_NCTF_28 Y21

VCC_AXG_NCTF_29 Y23

VCC_AXG_NCTF_3 T19

VCC_AXG_NCTF_30 Y24

VCC_AXG_NCTF_31 Y26

VCC_AXG_NCTF_32 Y28

VCC_AXG_NCTF_33 Y29

VCC_AXG_NCTF_34 AA16

VCC_AXG_NCTF_35 AA17

VCC_AXG_NCTF_36 AB16

VCC_AXG_NCTF_37 AB19

VCC_AXG_NCTF_38 AC16

VCC_AXG_NCTF_39 AC17

VCC_AXG_NCTF_4 T21

VCC_AXG_NCTF_40 AC19

VCC_AXG_NCTF_41 AD15

VCC_AXG_NCTF_42 AD16

VCC_AXG_NCTF_43 AD17

VCC_AXG_NCTF_44 AF16

VCC_AXG_NCTF_45 AF19

VCC_AXG_NCTF_46 AH15

VCC_AXG_NCTF_47 AH16

VCC_AXG_NCTF_48 AH17

VCC_AXG_NCTF_49 AH19

VCC_AXG_NCTF_5 T22

VCC_AXG_NCTF_50 AJ16

VCC_AXG_NCTF_51 AJ17

VCC_AXG_NCTF_52 AJ19

VCC_AXG_NCTF_53 AK16

VCC_AXG_NCTF_54 AK19

VCC_AXG_NCTF_55 AL16

VCC_AXG_NCTF_56 AL17

VCC_AXG_NCTF_57 AL19

VCC_AXG_NCTF_58 AL20

VCC_AXG_NCTF_59 AL21

VCC_AXG_NCTF_6 T23

VCC_AXG_NCTF_60 AL23

VCC_AXG_NCTF_61 AM15

VCC_AXG_NCTF_62 AM16

VCC_AXG_NCTF_63 AM19

VCC_AXG_NCTF_65 AM21

VCC_AXG_NCTF_66 AM23

VCC_AXG_NCTF_67 AP15

VCC_AXG_NCTF_68 AP16

VCC_AXG_NCTF_69 AP17

VCC_AXG_NCTF_7 T25

VCC_AXG_NCTF_70 AP19

VCC_AXG_NCTF_71 AP20

VCC_AXG_NCTF_72 AP21

VCC_AXG_NCTF_8 U15

VCC_AXG_NCTF_9 U16

VCC_SM_35

BL33

VCC_SM_4

AV33

VCC_SM_5

AW33

VCC_AXG_NCTF_1 T17

VCC_1

AT35

VCC_SM_1

AU32

VCC_AXG_1

R20

VCC_AXG_2

T14

VCC_AXG_3

W13

VCC_AXG_4

W14

VCC_AXG_5

Y12

VCC_AXG_6

AA20

VCC_AXG_7

AA23

VCC_AXG_8

AA26

VCC_AXG_9

AA28

VCC_AXG_10

AB21

VCC_AXG_11

AB24

VCC_AXG_12

AB29

VCC_AXG_13

AC20

VCC_AXG_14

AC21

VCC_AXG_15

AC23

VCC_AXG_16

AC24

VCC_AXG_17

AC26

VCC_AXG_18

AC28

VCC_AXG_19

AC29

VCC_AXG_20

AD20

VCC_AXG_21

AD23

VCC_AXG_22

AD24

VCC_AXG_23

AD28

VCC_AXG_24

AF21

VCC_AXG_25

AF26

VCC_AXG_27

AH20

VCC_AXG_28

AH21

VCC_AXG_29

AH23

VCC_AXG_30

AH24

VCC_AXG_NCTF_73 AP23

VCC_AXG_NCTF_74 AP24

VCC_AXG_NCTF_75 AR20

VCC_AXG_NCTF_76 AR21

VCC_AXG_NCTF_77 AR23

VCC_AXG_NCTF_78 AR24

VCC_AXG_NCTF_79 AR26

VCC_13

R30

VCC_AXG_31

AH26

VCC_AXG_33

AJ20

VCC_AXG_34

AN14

VCC_SM_LF1 AW45

VCC_SM_LF2 BC39

VCC_SM_LF3 BE39

VCC_SM_LF4 BD17

VCC_SM_LF5 BD4

VCC_SM_LF6 AW8

VCC_SM_LF7 AT6

VCC_AXG_26

AA31

VCC_AXG_32

AD31

VCC_3

AH28

VCC_AXG_NCTF_64 AM20

VCC_SM_36

AU30

VCC_AXG_NCTF_80 V26

VCC_AXG_NCTF_81 V28

VCC_AXG_NCTF_82 V29

VCC_AXG_NCTF_83 Y31

C81 0.22U_0603_10V7K~N

1

2

C147

22U_0805_6.3V4Z

1

2

C120

0.1U_0402_16V4Z~N

1

2

C118

22U_0805_6.3V4Z

1

2

C67 0.22U_0603_10V7K~N

1

2

C121

10U_0805_10V4Z~N

1

2

C78

1U_0603_10V4Z UMA@

1

2

C79

10U_0805_10V4Z~N

UMA@

1

2

+

C374

220U_D2_4VY_R15M

1

2

C101

0.47U_0603_10V7K

UMA@

1

2

C143

0.22U_0402_10V4Z~N

12

C161

0.22U_0402_10V4Z~N

12

C80

0.1U_0402_16V4Z~N

UMA@

1

2

C163 1U_0603_10V4Z

1

2

C162

10U_0805_10V4Z~N

1

2

POWER

VCC NCTF

VSS NCTF

VSS SCBVCC AXM

VCC AXM NCTF

U4F

CRESTLINE_1p0 UMA@

VCC_NCTF_1

AB33

VCC_NCTF_20

AK37

VCC_NCTF_29

AP35

VCC_NCTF_42

U31

VCC_NCTF_9

AF33

VCC_NCTF_10

AF36

VCC_NCTF_11

AH33

VCC_NCTF_12

AH35

VCC_NCTF_13

AH36

VCC_NCTF_14

AH37

VCC_NCTF_15

AJ33

VCC_NCTF_17

AK33

VCC_NCTF_18

AK35

VCC_NCTF_19

AK36

VCC_NCTF_2

AB36

VCC_NCTF_24

AL33

VCC_NCTF_25

AL35

VCC_NCTF_3

AB37

VCC_NCTF_30

AP36

VCC_NCTF_31

AR35

VCC_NCTF_32

AR36

VCC_NCTF_38

T30

VCC_NCTF_39

T34

VCC_NCTF_40

T35

VCC_NCTF_41

U29

VCC_NCTF_4

AC33

VCC_NCTF_43

U32

VCC_NCTF_44

U33

VCC_NCTF_45

U35

VCC_NCTF_46

U36

VCC_NCTF_48

V33

VCC_NCTF_49

V36

VCC_NCTF_50

V37

VCC_NCTF_5

AC35

VCC_NCTF_6

AC36

VCC_NCTF_7

AD35

VSS_NCTF_1 T27

VSS_NCTF_2 T37

VSS_NCTF_3 U24

VSS_NCTF_4 U28

VSS_NCTF_5 V31

VSS_NCTF_6 V35

VSS_NCTF_8 AB17

VSS_NCTF_9 AB35

VSS_NCTF_10 AD19

VCC_NCTF_8

AD36

VSS_NCTF_7 AA19

VSS_NCTF_11 AD37

VSS_NCTF_12 AF17

VSS_NCTF_14 AK17

VSS_NCTF_16 AM24

VSS_NCTF_17 AP26

VSS_NCTF_19 AR15

VSS_NCTF_20 AR19

VSS_NCTF_21 AR28

VCC_NCTF_33

Y32

VCC_AXM_4 AK24

VCC_AXM_5 AK23

VCC_AXM_6 AJ26

VCC_AXM_7 AJ23

VCC_AXM_NCTF_1

AL24

VCC_AXM_NCTF_2

AL26

VCC_AXM_NCTF_3

AL28

VCC_AXM_NCTF_4

AM26

VCC_AXM_NCTF_5

AM28

VCC_AXM_NCTF_6

AM29

VCC_AXM_NCTF_7

AM31

VCC_AXM_NCTF_10

AP29

VCC_AXM_NCTF_11

AP31

VCC_AXM_NCTF_17

AR31

VCC_NCTF_34

Y33

VCC_NCTF_35

Y35

VCC_NCTF_36

Y36

VCC_NCTF_37

Y37 VSS_SCB1 A3

VSS_SCB2 B2

VSS_SCB3 C1

VSS_SCB4 BL1

VSS_SCB5 BL51

VSS_SCB6 A51

VCC_NCTF_26

AA33

VCC_NCTF_27

AA35

VCC_NCTF_28

AA36

VCC_NCTF_16

AJ35

VCC_NCTF_21

AD33

VSS_NCTF_13 AF35

VCC_NCTF_22

AJ36

VCC_AXM_3 AK29

VCC_AXM_NCTF_14

AL29

VCC_AXM_NCTF_15

AL31

VCC_AXM_NCTF_16

AL32

VSS_NCTF_15 AM17

VCC_AXM_NCTF_8

AM32

VCC_AXM_NCTF_9

AM33

VCC_NCTF_23

AM35

VSS_NCTF_18 AP28

VCC_AXM_NCTF_12

AP32

VCC_AXM_NCTF_13

AP33

VCC_AXM_NCTF_18

AR32

VCC_AXM_NCTF_19

AR33

VCC_AXM_2 AT31

VCC_AXM_1 AT33

VCC_NCTF_47

V32

C145 1U_0603_10V4Z

1

2

C71 0.1U_0402_16V4Z~N

1

2

C165

22U_0805_6.3V4Z

1

2

R78

0_0603_5%

1 2

C99

0.1U_0402_16V4Z~N

UMA@

1

2

C70 0.1U_0402_16V4Z~N

1

2

C119

0.22U_0402_10V4Z~N

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

CRESTLINE((6/6)-PWR/GND

Custom

12 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Compal Electronics, Inc.

VSS

U4J

CRESTLINE_1p0 UMA@

VSS_199

C46

VSS_200

C50

VSS_201

C7

VSS_202

D13

VSS_203

D24

VSS_204

D3

VSS_205

D32

VSS_206

D39

VSS_207

D45

VSS_208

D49

VSS_209

E10

VSS_210

E16

VSS_211

E24

VSS_212

E28

VSS_213

E32

VSS_214

E47

VSS_215

F19

VSS_216

F36

VSS_217

F4

VSS_218

F40

VSS_219

F50

VSS_220

G1

VSS_221

G13

VSS_222

G16

VSS_223

G19

VSS_224

G24

VSS_225

G28

VSS_226

G29

VSS_227

G33

VSS_228

G42

VSS_229

G45

VSS_230

G48

VSS_231

G8

VSS_232

H24

VSS_233

H28

VSS_234

H4

VSS_235

H45

VSS_236

J11

VSS_237

J16

VSS_238

J2

VSS_239

J24

VSS_240

J28

VSS_241

J33

VSS_242

J35

VSS_243

J39

VSS_245

K12

VSS_246

K47

VSS_247

K8

VSS_248

L1

VSS_249

L17

VSS_250

L20

VSS_251

L24

VSS_252

L28

VSS_253

L3

VSS_254

L33

VSS_255

L49

VSS_256

M28

VSS_257

M42

VSS_258

M46

VSS_259

M49

VSS_260

M5

VSS_261

M50

VSS_262

M9

VSS_263

N11

VSS_264

N14

VSS_265

N17

VSS_266

N29

VSS_267

N32

VSS_268

N36

VSS_269

N39

VSS_270

N44

VSS_271

N49

VSS_272

N7

VSS_273

P19

VSS_274

P2

VSS_275

P23

VSS_276

P3

VSS_277

P50

VSS_278

R49

VSS_279

T39

VSS_280

T43

VSS_281

T47

VSS_282

U41

VSS_283

U45

VSS_284

U50

VSS_287 W11

VSS_288 W39

VSS_289 W43

VSS_290 W47

VSS_291 W5

VSS_292 W7

VSS_293 Y13

VSS_294 Y2

VSS_295 Y41

VSS_285

V2

VSS_286

V3

VSS_296 Y45

VSS_297 Y49

VSS_298 Y5

VSS_299 Y50

VSS_300 Y11

VSS_301 P29

VSS_302 T29

VSS_303 T31

VSS_304 T33

VSS_305 R28

VSS_306 AA32

VSS_307 AB32

VSS_308 AD32

VSS_309 AF28

VSS_310 AF29

VSS_311 AT27

VSS_312 AV25

VSS_313 H50

VSS

U4I

CRESTLINE_1p0 UMA@

VSS_1

A13

VSS_198 C41

VSS_2

A15

VSS_3

A17

VSS_4

A24

VSS_5

AA21

VSS_6

AA24

VSS_7

AA29

VSS_8

AB20

VSS_9

AB23

VSS_10

AB26

VSS_11

AB28

VSS_12

AB31

VSS_13

AC10

VSS_14

AC13

VSS_15

AC3

VSS_16

AC39

VSS_17

AC43

VSS_19

AD1

VSS_20

AD21

VSS_21

AD26

VSS_22

AD29

VSS_23

AD3

VSS_24

AD41

VSS_25

AD45

VSS_26

AD49

VSS_27

AD5

VSS_28

AD50

VSS_29

AD8

VSS_30

AE10

VSS_31

AE14

VSS_32

AE6

VSS_33

AF20

VSS_34

AF23

VSS_35

AF24

VSS_36

AF31

VSS_37

AG2

VSS_38

AG38

VSS_39

AG43

VSS_40

AG47

VSS_41

AG50

VSS_42

AH3

VSS_43

AH40

VSS_44

AH41

VSS_45

AH7

VSS_46

AH9

VSS_47

AJ11

VSS_48

AJ13

VSS_49

AJ21

VSS_50

AJ24

VSS_51

AJ29

VSS_52

AJ32

VSS_53

AJ43

VSS_54

AJ45

VSS_55

AJ49

VSS_56

AK20

VSS_57

AK21

VSS_58

AK26

VSS_59

AK28

VSS_60

AK31

VSS_61

AK51

VSS_62

AL1

VSS_63

AM11

VSS_64

AM13

VSS_65

AM3

VSS_66

AM4

VSS_67

AM41

VSS_68

AM45

VSS_69

AN1

VSS_70

AN38

VSS_71

AN39

VSS_72

AN43

VSS_73

AN5

VSS_74

AN7

VSS_75

AP4

VSS_76

AP48

VSS_77

AP50

VSS_78

AR11

VSS_79

AR2

VSS_80

AR39

VSS_81

AR44

VSS_82

AR47

VSS_83

AR7

VSS_84

AT10

VSS_85

AT14

VSS_86

AT41

VSS_87

AT49

VSS_97

AW1

VSS_100 AW24

VSS_101 AW29

VSS_102 AW32

VSS_103 AW5

VSS_104 AW7

VSS_105 AY10

VSS_106 AY24

VSS_107 AY37

VSS_108 AY42

VSS_109 AY43

VSS_110 AY45

VSS_111 AY47

VSS_112 AY50

VSS_113 B10

VSS_114 B20

VSS_115 B24

VSS_116 B29

VSS_117 B30

VSS_118 B35

VSS_119 B38

VSS_120 B43

VSS_121 B46

VSS_122 B5

VSS_123 B8

VSS_124 BA1

VSS_125 BA17

VSS_126 BA18

VSS_127 BA2

VSS_128 BA24

VSS_129 BB12

VSS_130 BB25

VSS_131 BB40

VSS_132 BB44

VSS_133 BB49

VSS_134 BB8

VSS_135 BC16

VSS_136 BC24

VSS_137 BC25

VSS_138 BC36

VSS_139 BC40

VSS_140 BC51

VSS_141 BD13

VSS_142 BD2

VSS_143 BD28

VSS_144 BD45

VSS_145 BD48

VSS_146 BD5

VSS_147 BE1

VSS_148 BE19

VSS_149 BE23

VSS_150 BE30

VSS_151 BE42

VSS_152 BE51

VSS_153 BE8

VSS_154 BF12

VSS_155 BF16

VSS_156 BF36

VSS_157 BG19

VSS_158 BG2

VSS_159 BG24

VSS_160 BG29

VSS_161 BG39

VSS_162 BG48

VSS_163 BG5

VSS_164 BG51

VSS_165 BH17

VSS_166 BH30

VSS_167 BH44

VSS_168 BH46

VSS_169 BH8

VSS_170 BJ11

VSS_171 BJ13

VSS_172 BJ38

VSS_173 BJ4

VSS_174 BJ42

VSS_175 BJ46

VSS_176 BK15

VSS_177 BK17

VSS_178 BK25

VSS_179 BK29

VSS_88

AU1

VSS_89

AU23

VSS_90

AU29

VSS_91

AU3

VSS_92

AU36

VSS_93

AU49

VSS_94

AU51

VSS_95

AV39

VSS_96

AV48

VSS_99

AW16 VSS_98

AW12

VSS_180 BK36

VSS_182 BK44

VSS_184 BK8

VSS_186 BL13

VSS_188 BL22

VSS_18

AC47

VSS_191 C12

VSS_193 C19

VSS_195 C29

VSS_197 C36

VSS_181 BK40

VSS_183 BK6

VSS_185 BL11

VSS_187 BL19

VSS_189 BL37

VSS_190 BL47

VSS_192 C16

VSS_194 C28

VSS_196 C33

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_D1

DDR_A_D49

DDR_A_D23

DDR_A_D22

DDR_A_D48

M_CLK_DDR#1

M_CLK_DDR#0

M_CLK_DDR1

M_CLK_DDR0

DDR_CKE1_DIMMA

DDR_A_MA3

DDR_A_MA10

DDR_A_MA1

ICH_SM_CLK

DDR_CS0_DIMMA#DDR_A_WE#

DDR_A_MA5

DDR_A_MA12 DDR_A_MA7DDR_A_MA9

DDR_A_DQS1

DDR_A_D26

DDR_A_D27

DDR_A_D16

DDR_A_D17

DDR_A_D8

DDR_A_DM2

DDR_A_DM1

DDR_A_DM3

DDR_A_DQS2

DDR_A_DQS0

ICH_SM_DA

DDR_A_DQS7

DDR_A_DQS6

DDR_A_DQS4

DDR_A_DM0

DDR_CS1_DIMMA#

DDR_A_MA8

DDR_CKE0_DIMMA

DDR_A_MA6

DDR_A_MA4

DDR_A_MA0

DDR_A_MA2

DDR_A_MA11

DDR_A_D53

DDR_A_D21

DDR_A_D20

DDR_A_RAS#

DDR_A_BS#1

DDR_A_CAS#

DDR_A_D3

DDR_A_DM4

DDR_A_DM6

DDR_A_D55

DDR_A_D52

DDR_A_DQS5

DDR_A_MA13

DDR_A_DM7

DDR_A_DM5

DDR_A_D2

DDR_A_BS#2

DDR_A_BS#0

DDR_A_DQS#4

DDR_A_DQS#3

DDR_A_DQS3

DDR_A_DQS#2

DDR_A_DQS#1

DDR_A_DQS#0

DDR_A_DQS#7

DDR_A_DQS#6

DDR_A_DQS#5

DDR_A_BS#1

DDR_A_MA0

DDR_A_RAS#

DDR_A_MA5

M_ODT1

DDR_CS0_DIMMA#

DDR_A_MA8

M_ODT1

DDR_CS1_DIMMA# DDR_A_MA13

M_ODT0

DDR_A_V M_ODT0

DDR_A_D19

DDR_A_D18

DDR_A_D60

DDR_A_D61

DDR_A_D35

DDR_A_D57

DDR_A_D25

DDR_A_D13

DDR_A_D12

+DDR_MCH_REF1

DDR_A_D56

DDR_A_D9

DDR_A_D51

DDR_A_D63

DDR_A_D36

DDR_A_D58

DDR_A_D42

DDR_A_D37

DDR_A_D54

DDR_A_D50

DDR_A_D5

DDR_A_D4

DDR_A_D14

DDR_A_D11

DDR_A_D10DDR_A_D15

DDR_A_D28

DDR_A_D30

DDR_A_D31

DDR_A_D7

DDR_A_D6

DDR_A_D45

DDR_A_D40

DDR_A_D44

DDR_A_D24

DDR_A_D29

DDR_A_D62

DDR_A_D59

DDR_A_D47

DDR_A_D46

DDR_A_D43

DDR_A_D41

DDR_A_D0

DDR_A_BS#2

DDR_CKE0_DIMMA

DDR_A_MA7

DDR_A_MA12

DDR_A_MA9

DDR_A_MA4

DDR_A_MA2

DDR_CKE1_DIMMA

DDR_A_MA1

DDR_A_MA3

DDR_A_MA10

DDR_A_BS#0

DDR_A_CAS#

DDR_A_WE#

DDR_A_MA6

DDR_A_D38

DDR_A_D39

DDR_A_D34

DDR_A_D33

DDR_A_D32

DDR_A_MA14

DDR_A_MA14

DDR_A_V

+DDR_MCH_REF1

DDR_A_MA11

DDR_A_DQS[0..7]8

DDR_A_DQS#[0..7]8

DDR_A_DM[0..7]8

DDR_A_D[0..63]8

DDR_CKE0_DIMMA7

DDR_A_MA[0..13]8

DDR_A_BS#08

DDR_A_BS#28

DDR_A_CAS#8

DDR_A_WE#8

DDR_CS1_DIMMA#7

M_ODT17

M_CLK_DDR#0 7

M_CLK_DDR0 7

DDR_A_BS#1 8

DDR_CKE1_DIMMA 7

DDR_CS0_DIMMA# 7

DDR_A_RAS# 8

M_ODT0 7

M_CLK_DDR#1 7

ICH_SM_DA14,16,19,24

M_CLK_DDR1 7

ICH_SM_CLK14,16,19,24

PM_EXTTS#0 7

DDR_A_MA14 7

+DDR_MCH_REF114

+3VS

+1.8V

+0.9VS

+1.8V

+1.8V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

DDR2 SO-DIMM I

Custom

13 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Close to VREF pins of SO-DIMM

Layout Note:

Place these resistor

closely JP41,all

trace length Max=1.5"

Layout Note:

Place near JDIM1

Layout Note:

Place one cap close to every 2 pullup

resistors terminated to +0.9V

SO-DIMM A

REVERSE

Bottom side

Layout Note:

+DDR_MCH_REF

trace width and

spacing is 20/20.

close to connector

Compal Electronics, Inc.

RP6

56_0404_4P2R_5%

1 4

2 3

RP13

56_0404_4P2R_5%

1 4

2 3

R32

10K_0402_5%

12

C220

0.1U_0402_16V4Z

1

2

C169

2.2U_0603_6.3V6K

1

2

RP5

56_0404_4P2R_5%

1 4

2 3

C107

0.1U_0402_16V4Z

1

2

C151

0.1U_0402_16V4Z

1

2

RP23 56_0404_4P2R_5%

14 23

RP17 56_0404_4P2R_5%

14 23

C106

0.1U_0402_16V4Z

1

2

RP8 56_0404_4P2R_5%

14 23

R96 56_0402_5%

1 2

C125

0.1U_0402_16V4Z

1

2

C128

0.1U_0402_16V4Z

1

2

C168

0.1U_0402_16V4Z

1

2

JDIM2

FOX_ASOA426-M2RN-7F

VREF

1

VSS

3

DQ0

5

DQ1

7

VSS

9

DQS0#

11

DQS0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

VSS

41

DQ16

43

DQ17

45

VSS

47

DQS2#

49

DQS2

51

VSS

53

DQ18

55

DQ19

57

VSS

59

DQ24

61

DQ25

63

VSS

65

DM3

67

NC

69

VSS

71

DQ26

73

DQ27

75

VSS

77

CKE0

79

VDD

81

NC

83

BA2

85

VDD

87

A12

89

A9

91

A8

93

VDD

95

A5

97

A3

99

A1

101

VDD

103

A10/AP

105

BA0

107

WE#

109

VDD

111

CAS#

113

NC/S1#

115

VDD

117

NC/ODT1

119

VSS

121

DQ32

123

DQ33

125

VSS

127

DQS4#

129

DQS4

131

VSS

133

DQ34

135

DQ35

137

VSS

139

DQ40

141

DQ41

143

VSS

145

DM5

147

VSS

149

DQ42

151

DQ43

153

VSS

155

DQ48

157

DQ49

159

VSS

161

NC,TEST

163

VSS

165

DQS6#

167

DQS6

169

VSS

171

DQ50

173

DQ51

175

VSS

177

DQ56

179

DQ57

181

VSS

183

DM7

185

VSS

187

DQ58

189

DQ59

191

VSS

193

SDA

195

SCL

197

VDDSPD

199

VSS 2

DQ4 4

DQ5 6

VSS 8

DM0 10

VSS 12

DQ6 14

DQ7 16

VSS 18

DQ12 20

DQ13 22

VSS 24

DM1 26

VSS 28

CK0 30

CK0# 32

VSS 34

DQ14 36

DQ15 38

VSS 40

VSS 42

DQ20 44

DQ21 46

VSS 48

NC 50

DM2 52

VSS 54

DQ22 56

DQ23 58

VSS 60

DQ28 62

DQ29 64

VSS 66

DQS3# 68

DQS3 70

VSS 72

DQ30 74

DQ31 76

VSS 78

NC/CKE1 80

VDD 82

NC/A15 84

NC/A14 86

VDD 88

A11 90

A7 92

A6 94

VDD 96

A4 98

A2 100

A0 102

VDD 104

BA1 106

RAS# 108

S0# 110

VDD 112

ODT0 114

NC/A13 116

VDD 118

NC 120

VSS 122

DQ36 124

DQ37 126

VSS 128

DM4 130

VSS 132

DQ38 134

DQ39 136

VSS 138

DQ44 140

DQ45 142

VSS 144

DQS5# 146

DQS5 148

VSS 150

DQ46 152

DQ47 154

VSS 156

DQ52 158

DQ53 160

VSS 162

CK1 164

CK1# 166

VSS 168

DM6 170

VSS 172

DQ54 174

DQ55 176

VSS 178

DQ60 180

DQ61 182

VSS 184

DQS7# 186

DQS7 188

VSS 190

DQ62 192

DQ63 194

VSS 196

SA0 198

SA1 200

RP22 56_0404_4P2R_5%

14 23

RP1

56_0404_4P2R_5%

1 4

2 3

C166

2.2U_0603_6.3V6K

1

2

RP16 56_0404_4P2R_5%

14 23

C105

2.2U_0603_6.3V6K

1

2

C153

0.1U_0402_16V4Z

1

2

C127

0.1U_0402_16V4Z

1

2

C149

2.2U_0603_6.3V6K

1

2

C58

0.1U_0402_16V4Z

1

2

C201

2.2U_0805_16V4Z

1

2

RP14

56_0404_4P2R_5%

1 4

2 3

RP15 56_0404_4P2R_5%

14 23

RP2 56_0404_4P2R_5%

14 23

RP7

56_0404_4P2R_5%

1 4

2 3

C167

0.1U_0402_16V4Z

1

2

R31

10K_0402_5%

12

C129

0.1U_0402_16V4Z

1

2

R144

1K_0402_1%

12

C154

0.1U_0402_16V4Z

1

2

C130

0.1U_0402_16V4Z

1

2

R143

1K_0402_1%

12

C59

2.2U_0603_6.3V6K

1

2

C126

0.1U_0402_16V4Z

1

2

C124

2.2U_0603_6.3V6K

1

2

C206

0.1U_0402_16V4Z~N

1

2

C150

0.1U_0402_16V4Z

1

2

+

C84

330U 2.5V Y D2

@

1

2

C108

0.1U_0402_16V4Z

1

2

C131

0.1U_0402_16V4Z

1

2

C152

0.1U_0402_16V4Z

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_RAS#

DDR_CS2_DIMMB#

DDR_B_MA11

DDR_CKE3_DIMMB

DDR_B_MA2

DDR_B_MA4

DDR_B_BS#1

DDR_B_MA0

DDR_B_MA6

DDR_B_MA7

M_ODT3

DDR_CS3_DIMMB#

DDR_B_WE#

DDR_B_MA5

DDR_B_MA8

DDR_B_V

DDR_B_MA1

DDR_B_CAS#

DDR_B_MA3

DDR_B_BS#0

DDR_B_MA10

DDR_B_MA9

DDR_B_MA12

DDR_CKE2_DIMMB

DDR_B_MA14

DDR_B_V

DDR_B_BS#2

DDR_B_D60

DDR_B_DM5

DDR_B_D45

DDR_B_DM2

DDR_B_D21

DDR_B_D40

DDR_B_CAS#

DDR_B_D11

DDR_B_D62

DDR_B_MA4

DDR_B_D27

DDR_B_DQS2

DDR_B_D10

DDR_B_DQS1

DDR_B_D0

DDR_B_D55

DDR_B_BS#1

DDR_B_MA7

DDR_B_MA11

DDR_CKE3_DIMMB

DDR_B_D24

DDR_B_D22

DDR_B_D7

DDR_B_D6

DDR_B_D30

DDR_B_D1

DDR_B_D47

DDR_B_MA6

DDR_B_D26

M_CLK_DDR2

DDR_B_D12

DDR_B_DM0

DDR_B_D28

DDR_B_DQS0

DDR_B_DM6

DDR_B_D5

DDR_B_D3

DDR_B_DQS3

M_CLK_DDR#2

DDR_B_D41

M_ODT3

DDR_B_WE#

DDR_B_D8

DDR_B_D2

DDR_B_D57

DDR_B_D50

DDR_B_D37

DDR_B_D29

DDR_B_D14

DDR_B_MA5

DDR_B_D51

DDR_B_D42

DDR_B_D38

DDR_B_MA0

DDR_B_D32

DDR_B_MA3

DDR_B_D46

DDR_B_DQS5

DDR_B_BS#0

DDR_B_MA9

DDR_B_D31

ICH_SM_CLK

DDR_B_D58

DDR_B_D43

DDR_B_D34

DDR_B_MA12

DDR_CKE2_DIMMB

DDR_B_D25

DDR_B_DQS6

DDR_B_D49

DDR_B_D48

DDR_CS2_DIMMB#

DDR_B_MA2

DDR_B_D16

DDR_B_D4

DDR_CS3_DIMMB#

DDR_B_BS#2

DDR_B_DM3

DDR_B_DQS7

M_CLK_DDR#3

DDR_B_D53

DDR_B_D59

DDR_B_D23

DDR_B_D33

DDR_B_DQS#1

DDR_B_D36

DDR_B_MA14

DDR_B_DQS4

DDR_B_DQS#4

DDR_B_DQS#0

ICH_SM_DA

DDR_B_DM7

DDR_B_D61

DDR_B_D39

DDR_B_MA13

M_ODT2

DDR_B_D35

DDR_B_MA10

DDR_B_D19

DDR_B_DQS#2

+DDR_MCH_REF1

DDR_B_D63

M_CLK_DDR3

DDR_B_D56

DDR_B_DQS#6

DDR_B_DM4

DDR_B_RAS#

DDR_B_DQS#3

DDR_B_MA8

DDR_B_D18

DDR_B_D20

DDR_B_D9

DDR_B_D54

DDR_B_D52

DDR_B_DQS#5

DDR_B_D15

DDR_B_DM1

DDR_B_DQS#7

DDR_B_D44

DDR_B_D13

DDR_B_MA1

DDR_B_D17

M_ODT2

DDR_B_MA13

DDR_B_DQS#[0..7]8

DDR_B_DQS[0..7]8

DDR_B_D[0..63]8

DDR_B_MA[0..13]8

DDR_B_DM[0..7]8

DDR_CKE3_DIMMB 7

DDR_CS2_DIMMB# 7

+DDR_MCH_REF1 13

DDR_B_WE#8

DDR_B_BS#1 8

DDR_B_RAS# 8

DDR_B_CAS#8

M_ODT37

DDR_CKE2_DIMMB7

DDR_CS3_DIMMB#7

DDR_B_BS#28

DDR_B_BS#08

M_ODT2 7

M_CLK_DDR3 7

M_CLK_DDR#3 7

M_CLK_DDR2 7

M_CLK_DDR#2 7

PM_EXTTS#1 7

ICH_SM_DA13,16,19,24 ICH_SM_CLK13,16,19,24

DDR_B_MA14 7

+3VS

+3VS

+1.8V

+0.9VS

+1.8V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

DDR2 SO-DIMM II

Custom

14 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Close to VREF pins of SO-DIMM

Bottom side

SO-DIMM B

REVERSE

Layout Note:

Place near JDIM2

Layout Note:

Place one cap close to every 2 pullup

resistors terminated to +0.9VS

Layout Note:

Place these resistor

closely JP42,all

trace length Max=1.5"

Compal Electronics, Inc.

C135

0.1U_0402_16V4Z

1

2

C172

0.1U_0402_16V4Z

1

2

C177

2.2U_0603_6.3V6K

1

2

C138

2.2U_0603_6.3V6K

1

2

RP9

56_0404_4P2R_5%

1 4

2 3

RP18

56_0404_4P2R_5%

1 4

2 3

RP10

56_0404_4P2R_5%

1 4

2 3

C110

0.1U_0402_16V4Z

1

2

C136

0.1U_0402_16V4Z

1

2

RP12

56_0404_4P2R_5%

1 4

2 3

RP26 56_0404_4P2R_5%

14 23

C158

0.1U_0402_16V4Z

1

2

C112

2.2U_0603_6.3V6K

1

2

C133

0.1U_0402_16V4Z

1

2

C109

0.1U_0402_16V4Z

1

2

C132

0.1U_0402_16V4Z

1

2

C155

0.1U_0402_16V4Z

1

2

C111

0.1U_0402_16V4Z

1

2

RP24 56_0404_4P2R_5%

14 23

+

C189

330U 2.5V Y D2

@

1

2

RP21 56_0404_4P2R_5%

14 23

C156

0.1U_0402_16V4Z

1

2

RP4 56_0404_4P2R_5%

14 23

R34

10K_0402_5%

12

C160

2.2U_0603_6.3V6K

1

2

R33

10K_0402_5%

1 2

C137

0.1U_0402_16V4Z

1

2

C157

0.1U_0402_16V4Z

1

2

C159

0.1U_0402_16V4Z

1

2

JDIM1

FOX_AS0A426-NARN-7F~N

VREF

1

VSS

3

DQ0

5

DQ1

7

VSS

9

DQS0#

11

DQS0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

VSS

41

DQ16

43

DQ17

45

VSS

47

DQS2#

49

DQS2

51

VSS

53

DQ18

55

DQ19

57

VSS

59

DQ24

61

DQ25

63

VSS

65

DM3

67

NC

69

VSS

71

DQ26

73

DQ27

75

VSS

77

CKE0

79

VDD

81

NC

83

BA2

85

VDD

87

A12

89

A9

91

A8

93

VDD

95

A5

97

A3

99

A1

101

VDD

103

A10/AP

105

BA0

107

WE#

109

VDD

111

CAS#

113

NC/S1#

115

VDD

117

NC/ODT1

119

VSS

121

DQ32

123

DQ33

125

VSS

127

DQS4#

129

DQS4

131

VSS

133

DQ34

135

DQ35

137

VSS

139

DQ40

141

DQ41

143

VSS 2

DQ4 4

DQ5 6

VSS 8

DM0 10

VSS 12

DQ6 14

DQ7 16

VSS 18

DQ12 20

DQ13 22

VSS 24

DM1 26

VSS 28

CK0 30

CK0# 32

VSS 34

DQ14 36

DQ15 38

VSS 40

VSS 42

DQ20 44

DQ21 46

VSS 48

NC 50

DM2 52

VSS 54

DQ22 56

DQ23 58

VSS 60

DQ28 62

DQ29 64

VSS 66

DQS3# 68

DQS3 70

VSS 72

DQ30 74

DQ31 76

VSS 78

NC/CKE1 80

VDD 82

NC/A15 84

NC/A14 86

VDD 88

A11 90

A7 92

A6 94

VDD 96

A4 98

A2 100

A0 102

VDD 104

BA1 106

RAS# 108

S0# 110

VDD 112

ODT0 114

NC/A13 116

VDD 118

NC 120

VSS 122

DQ36 124

DQ37 126

VSS 128

DM4 130

VSS 132

DQ38 134

DQ39 136

VSS 138

DQ44 140

DQ45 142

VSS 144

VSS

145

DM5

147

VSS

149

DQ42

151

DQ43

153

VSS

155

DQ48

157

DQ49

159

VSS

161

NC,TEST

163

VSS

165

DQS6#

167

DQS6

169

VSS

171

DQ50

173

DQ51

175

VSS

177

DQ56

179

DQ57

181

VSS

183

DM7

185

VSS

187

DQ58

189

DQ59

191

VSS

193

SDA

195

SCL

197

VDDSPD

199

DQS5# 146

DQS5 148

VSS 150

DQ46 152

DQ47 154

VSS 156

DQ52 158

DQ53 160

VSS 162

CK1 164

CK1# 166

VSS 168

DM6 170

VSS 172

DQ54 174

DQ55 176

VSS 178

DQ60 180

DQ61 182

VSS 184

DQS7# 186

DQS7 188

VSS 190

DQ62 192

DQ63 194

VSS 196

SAO 198

SA1 200

C134

0.1U_0402_16V4Z

1

2

C139

2.2U_0603_6.3V6K

1

2

RP19 56_0404_4P2R_5%

14 23

RP3

56_0404_4P2R_5%

1 4

2 3

C170

0.1U_0402_16V4Z

1

2

C221

2.2U_0805_16V4Z

1

2

R335 56_0402_5%

1 2

RP11

56_0404_4P2R_5%

1 4

2 3

RP25

56_0404_4P2R_5%

14 23

C60

2.2U_0603_6.3V6K

1

2

C222

0.1U_0402_16V4Z

1

2

RP20 56_0404_4P2R_5%

14 23

C61

0.1U_0402_16V4Z

1

2

C171

0.1U_0402_16V4Z

1

2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

CRT_R_C

CRT_B_C

CRT_GND

CRT_R_L

VGA_DDC_DATA_C

CRT_G_C

CRT_GND

VGA_DDC_DATA_C

CRT_G_L

HSYNC_L

VGA_DDC_CLK_C

VSYNC_L

VGA_DDC_CLK_C

CRT_B_L

BIA_PWM

CRT_GND

D_CRT_HSYNC

D_CRT_VSYNC

CRT_HSYNC CRT_HSYNC_B

CRT_VSYNC_BCRT_VSYNC

BKOFF#

EC_ENBKL

EC_ENBKL

DISPOFF#

EDID_CLK_LCD

INVT_PWM

DISPOFF#

DAC_BRIG

INVPWR_B+

EDID_DAT_LCD

LVDSAC-

LVDSAC+

LVDSA0+

LVDSA0-

LVDSA1-

LVDSA1+

LVDSA2+

LVDSA2-

LVDSAC-

LVDSAC+

LVDSA1-

LVDSA0+

LVDSA0-

LVDSA2+

LVDSA1+

LVDSA2-

EDID_DAT_LCD

EDID_CLK_LCD

GMCH_EDID_DAT_LCD

GMCH_EDID_CLK_LCD

VGA_LVDSAC-

VGA_LVDSAC+

VGA_LVDSA1-

VGA_LVDSA0-

VGA_LVDSA0+

VGA_LVDSA1+

VGA_LVDSA2-

VGA_LVDSA2+

EDID_CLK_LCD

EDID_DAT_LCD

LVDSAC-

LVDSAC+

VGA_DAT_LCD

VGA_CLK_LCD

LVDSA1+

LVDSA0-

LVDSA1-

LVDSA0+

LVDSA2+

LVDSA2-

GMCH_LVDSAC-

GMCH_LVDSAC+

GMCH_LVDSA1-

GMCH_LVDSA0-

GMCH_LVDSA2-

GMCH_LVDSA0+

GMCH_LVDSA1+

GMCH_LVDSA2+

+LCDVDD

GMCH_LVDDEN

VGA_LVDDEN

MIC_DIAG

MIC_CLK

+3VS

INVT_PWM

LCD_TSTLCD_CBL_DET#

LCD_VCC_TEST_EN

MIC_SIG

BIA_PWM9

MSEN#29

VGA_CRT_R34

VGA_CRT_G34

VGA_CRT_B34

CRT_R9

CRT_G9

CRT_B9

VGA_DDCDATA34

VGA_DDCCLK34

3VDDCDA9

3VDDCCL9

CRT_HSYNC9

CRT_VSYNC9

VGA_HSYNC34

VGA_VSYNC34

GMCH_LVDDEN9

BKOFF#29

GMCH_ENBKL9

G7X_ENBKL34VGA_LVDDEN34

DAC_BRIG 29

INVT_PWM 29

VGA_LVDSAC+35

GMCH_EDID_CLK_LCD 9

VGA_LVDSA2+35

GMCH_LVDSA2+ 9

GMCH_LVDSA2- 9

GMCH_LVDSA0+ 9

VGA_LVDSA1+35

VGA_DAT_LCD34 VGA_CLK_LCD34

VGA_LVDSA0-35

VGA_LVDSA2-35

VGA_LVDSA0+35

GMCH_LVDSA1- 9

GMCH_LVDSA1+ 9

GMCH_LVDSA0- 9

VGA_LVDSA1-35

VGA_LVDSAC-35

GMCH_LVDSAC- 9

GMCH_LVDSAC+ 9

GMCH_EDID_DAT_LCD 9

EC_ENBKL29

MIC_CLK25 MIC_SIG25

MIC_DIAG29

USB20_P819 USB20_N819

LCD_TST 29LCD_CBL_DET#29

LCD_VCC_TEST_EN

2

9

+CRT_VCC

+5VS

+CRT_VCC

+CRT_VCC

+3VS+CRT_VCC +3VS+CRT_VCC +3VS

+3VS

+3VS

+3VS

+LCDVDD

+3VS +LCDVDD

+3VS

+5VS

B+

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

CRT CONN/LCD CONN

Custom

15 49Thursday, January 10, 2008

2007/1/15 2008/1/15

W=40mils

DDC_MD2

W=40mils

原本為

10K

原本為

4.7K

L C D

For EMI

C R T

Compal Electronics, Inc.

C R T

Close to GMCH Close to VGA

W=60milsW=60mils

R8

150_0402_1%

12

R615 0_0402_5%

VGA@

12

C6

22P_0402_50V8J

@

1

2

R613 0_0402_5%

VGA@

12

R620 0_0402_5%

UMA@

12

C369

0.1U_0402_16V7K~N

1

2

C38

0.1U_0402_16V4Z@

1

2

R624 0_0402_5%

VGA@

12

C18 0.1U_0402_16V4Z

1 2

R652

100K_0402_5%

UMA@

C1

4.7P_0402_50V8C

1

2

R597 0_0402_5%UMA@

1 2

R630 0_0402_5% VGA@

1 2

R21

4.7K_0402_5%

12

R645 0_0402_5% VGA@

1 2

R598 0_0402_5%UMA@

1 2

D26

CH751H-40_SC76

21

R10

2.2K_0402_5%

1 2

R7

150_0402_1%

12

R603 0_0402_5% VGA@

1 2

R651

0_0402_5%VGA@

12

R628 0_0402_5%

UMA@

12

C7

100P_0402_50V8J

1

2

R14

2.2K_0402_5%

1 2

R337 30_0402_5%

UMA@

1 2

R614 0_0402_5%

VGA@

12

C251

220P_0402_50V7K

1 2

C2

4.7P_0402_50V8C

1

2

D25

CH751H-40_SC76@

21

R621 0_0402_5%

UMA@

12

R13

2.2K_0402_5%

1 2

R635 0_0402_5% VGA@

1 2

C34

0.1U_0603_50V4Z

1

2

R625 0_0402_5%

VGA@

12

L5 FBMA-L11-201209-221LMA30T_0805

1 2

R602 0_0402_5% VGA@

1 2

C8

22P_0402_50V8J

@

1

2

R599 0_0402_5%UMA@

1 2

C349

100P_0402_50V8J

1

2

L24 0_0603_5%

1 2

R12

2K_0402_5%

1 2

C345

100P_0402_50V8J

1

2

R314

0_0805_5%

12

R632 0_0402_5%

VGA@

12

F7

1.1A_6VDC_FUSE

21

C348

15P_0402_50V8J

1

2

R570 0_0402_5%UMA@

1 2

JCRT1

SUYIN_070549FR015S208CR

CONN@

6

11

1

7

12

2

8

13

3

9

14

4

10

15

5

16

17

U5

74AHCT1G125GW_SOT353-5

A

2Y4

OE# 1

G

3P5

D9

CH751H-40PT_SOD323-2 UMA@

2 1

R9

2K_0402_5%

1 2

R631 0_0402_5%

VGA@

12

R544 0_0402_5%UMA@

1 2

G

D

S

Q1

BSS138_NL_SOT23

2

1 3

L3

BK1608LL121-T 0603

1 2

R595 0_0402_5%UMA@

1 2

R633 0_0402_5% VGA@

1 2

U6

74AHCT1G125GW_SOT353-5

A

2Y4

OE# 1

G

3P5

L4

BK1608LL121-T 0603

1 2

G

D

S

Q3

BSS138_NL_SOT23

2

1 3

R15

10K_0402_5%

12

R634 0_0402_5% VGA@

1 2

R655

0_0402_5%UMA@

12

C9

22P_0402_50V8J

@

1

2

R20 10_0402_5%@

12

C4

100P_0402_50V8J

1

2

D17

RB411DT146 SOT23

2 1

R652

2.2K_0402_5%

VGA@

R644 0_0402_5% VGA@

1 2

C344

0.1U_0402_16V4Z

1

2

C17 0.1U_0402_16V4Z

1 2

R619 0_0402_5%

UMA@

12

R508 0_0402_5%UMA@

1 2

R596 0_0402_5%UMA@

1 2

L2

BK1608LL121-T 0603

1 2

L25 0_0603_5%

1 2

C346

0.1U_0402_16V4Z

@

1

2

R2

150_0402_1%

12

R604 0_0402_5% VGA@

1 2

R600 0_0402_5%UMA@

1 2

C32

0.1U_0603_50V4Z

1

2

R662

0_0402_5%

12

R319 10K_0402_5%

12

R6

0_0805_5%

12

C372

0.1U_0402_16V7K~N

1

2

R601 0_0402_5% VGA@

1 2

C363

4.7U_0805_6.3V6K~N

1

2

C36

1U_0603_10V4Z@

1

2

U53

AOZ1320CI-04_SOT23-6

GND 2

EN

3NC 4

IN

6OUT 1

GND

5

C195

220P_0402_50V7K

1 2

R510 0_0402_5%UMA@

1 2

C347

15P_0402_50V8J

1

2

D8

CH751H-40PT_SOD323-2 VGA@

2 1

R336 30_0402_5%

UMA@

1 2

R629 0_0402_5%

UMA@

12

C3

4.7P_0402_50V8C

1

2

JP4

ACES_88242-4001~N

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

22

44

66

88

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

GND

41 GND 42

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FSC

FSA

FSB

R_PCIE_SATA

SSCDREFCLK

R_PCIE_SATA#

R_MCH_3GPLL

R_MCH_3GPLL#

CLK_XTAL_IN

CLK_XTAL_OUT

FSB

FSC

FSA

R_CPU_BCLK

R_CPU_BCLK#

R_MCH_BCLK

R_MCH_BCLK#

R_PCIE_EXPR

R_PCIE_EXPR#

R_CLK_PCIE_MCard

R_CLK_PCIE_MCard#

R_PCIE_ICH

R_PCIE_ICH#

ITP_EN

PCI2_TME

PCI2_TME

MCH_REQ

SATA_REQ

PCI_CLK3 R_CLKREQ#_H

R_CLKREQ#_G

SSCDREFCLK#

CLK_XTAL_IN

CLK_XTAL_OUT

R_CLK_Rob

R_CLK_Rob#

27_SEL

27_SEL

ITP_EN

R_MCH_DREFCLK

R_MCH_DREFCLK#

R_PCIE_LAN

R_PCIE_LAN#

R_CLKREQ#_E

R_CLKREQ#_F

CPU_BSEL25

MCH_CLKSEL2 7

CPU_BSEL15

MCH_CLKSEL1 7

CPU_BSEL05

MCH_CLKSEL0 7

H_STP_PCI# 19

H_STP_CPU# 19

ICH_SM_CLK 13,14,19,24

CLK_CPU_BCLK# 4

CLK_CPU_BCLK 4

CLK_MCH_BCLK# 7

CLK_MCH_BCLK 7

ICH_SM_DA 13,14,19,24

CLK_PCIE_SATA 18

CLK_PCIE_SATA# 18

CLK_14M_ICH19

CLK_48M_ICH19

CK_PWRGD 19

CLK_PCIE_EXPR 28

CLK_PCIE_EXPR# 28

CLK_PCIE_MCARD# 24

CLK_PCIE_MCARD 24

CLKMCHREQ#7

CLKSATAREQ#19

MCARD_REQ#G 24

CLK_DEBUG_PORT24

CLK_PCI_ICH17

CLK_PCI_EC29

CLK_MCH_DREFCLK 7

CLK_MCH_DREFCLK# 7

CLK_PCIE_ICH 19

CLK_PCIE_ICH# 19

CLK_PCIE_Rob# 24

CLK_PCIE_Rob 24

CLK_EN# 49

CLK_PCI_TPM29

MCH_SSCDREFCLK 7

MCH_SSCDREFCLK# 7

CLK_PCIE_VGA 34

CLK_PCIE_VGA# 34

CLK_PCI_CB40

CLK_MCH_3GPLL 7

CLK_MCH_3GPLL# 7

CLK_PCIE_LAN# 22

CLK_PCIE_LAN 22

MCARD_REQ#E 24

MCARD_REQ#F 22

EXPR_CARD_REQ# 28

+VCCP

+3VM_CK505

+3VM_CK505

+3VM_CK505

+3VS

+1.25VM_CK505

+1.25VS

+1.25VM_CK505

+1.25VM_CK505

+3VS

+3VS

+3VS

+3VS

+3VM_CK505

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

Clock generator

Custom

16 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Stuff

Stuff

FSB Frequency Selet:

No Stuff

No Stuff

667MHz

CPU Driven

No Stuff

Stuff

800MHz

*

(Default)

1

1000

CLKSEL1

100

1

PCI

MHz

200

0

SRC

MHz

33.3

CPU

MHz

CLKSEL2

33.30

FSLA

CLKSEL0

166

FSLC

1

FSLB

Place close to U7

1 = Enable SRC0 & 27MHz

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

For 27_SEL, 0 = Enable DOT96 & SRC1,

For PCI2_EN, 0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed

R1107 R1135 R1083

R1074 R1086 R1098 R1113 R1139

R1083

R1128

R1098

R1074R1086

R1107

R1113

R1139 R1135R1135 R1139

R1083

R1074

R1086

R1107

R1098

R1113

R1135 R1139

R1128

R1128

Routing the trace at least 10mil

Placed

within 500

mils of

CK505M

Compal Electronics, Inc.

Y3

14.31818MHZ_16P

12

R20133_0402_1%

1 2

R376 0_0402_5%@1 2

R200

10K_0402_5%

12 R398

475_0402_1%

12

R208 0_0402_5%

1 2

R25812_0402_5%

1 2

R25933_0402_5%

1 2

C476

0.1U_0402_16V4Z~N

1

2

R402

2.2K_0402_5%

12

R374 10K_0402_5%

1 2

R247 0_0402_5%

1 2

C459

22U_0805_6.3V4Z

1

2

R26033_0402_5%

1 2

C257

18P_0402_50V8J~N

1

2

R212 0_0402_5%

1 2

R210 0_0402_5%

1 2

C460

0.1U_0402_16V4Z~N

1

2

R399 10K_0402_5%

1 2

R211 0_0402_5%

1 2

R23510K_0402_5%

12

C463

0.1U_0402_16V4Z~N

1

2

R205 0_0402_5%

1 2

R410

0_0402_5%

1 2

R268

10K_0402_5%

UMA@

1 2

R185

1K_0402_5%

1 2

R492

10K_0402_5%

VGA@

1 2

R395 10K_0402_5%

1 2

R204 0_0402_5%

1 2

R241 0_0402_5%UMA@

1 2

R251 0_0402_5%

1 2

R243 0_0402_5%UMA@

1 2

C479

10U_0805_10V4Z~N

1

2

R237475_0402_1%

1 2

R199

0_0402_5%

12

R23912_0402_5%

12

C464

0.1U_0402_16V4Z~N

1

2

C462

0.1U_0402_16V4Z~N

1

2

R209 0_0402_5%

1 2

R261 0_1206_5%

1 2

R240

10K_0402_5%

1 2

R25733_0402_5%

1 2

R248 0_0402_5%

1 2

C475

0.1U_0402_16V4Z~N

1

2

R233475_0402_1%

1 2

R379

1K_0402_5%

1 2

C480

0.1U_0402_16V4Z~N

1

2

R385 10K_0402_5%

1 2

R236

10K_0402_5%

1 2

R344 0_0402_5%VGA@

1 2

R411

1K_0402_5%

1 2

R242 0_0402_5%UMA@

1 2

R396

475_0402_1%

12

R23410K_0402_5%

12

R252 0_0402_5%

1 2

R375

475_0402_1%

12

R184

0_0402_5%

@1 2

R238

10K_0402_5%

@

1 2

R386

475_0402_1%

12

R202 0_0402_5%

1 2

C474

22U_0805_6.3V4Z

1

2

C461

0.1U_0402_16V4Z~N

1

2

R397 0_1206_5%

1 2

R493 0_0402_5%VGA@

1 2

C477

0.1U_0402_16V4Z~N

1

2

R244 0_0402_5%UMA@

1 2

R203 0_0402_5%

1 2

C265

18P_0402_50V8J~N

1

2

R213 0_0402_5%

1 2

C473

0.1U_0402_16V4Z~N

1

2

R378

0_0402_5%

@

1 2 R377

1K_0402_5%

1 2

C478

0.1U_0402_16V4Z~N

1

2

U7

ICS9LPRS365BGLFT_TSSOP64

X1

60

X2

59

USB_48MHZ/FSLA

10

GND

19

VDDPLL3

16

PCI1/CR#_B

3

FSLB/TEST_MODE

57

PCI3

5

VDDSRC_IO

26

SDATA 63

GND48

11

VDD48

9

PCI2/TME

4

SRC6 41

SRC7#/CR#_E 43

PCI_STOP# 38

GNDSRC

23

GNDCPU

52

SRC7/CR#_F 44

SRC9# 31

SRC8#/CPU2_ITP# 46

SRC8/CPU2_ITP 47

SRC10 34

CPU0 54

PCI0/CR#_A

1

PCI4/27_Select

6

VDDSRC_IO

36

VDDPLL3_IO

20 VDD96_IO

12

VDDPCI

2

GNDSRC

42

GND

15

SCLK 64

NC 48

GNDPCI

8

CPU_STOP# 37

PCI_F5/ITP_EN

7

SRC9 30

CPU1#_F 50

SRC11#/CR#_G 32

SRC11/CR#_H 33

REF0/FSLC/TEST_SEL

62

CPU0# 53

CPU1_F 51

VDDREF

61

GNDREF

58

VDDSRC_IO

45

SRC10# 35

VDDCPU_IO

49

SRC4# 28

SRC1/SE1/27MHz_NonSS 17

SRC2/SATA 21

SRC2#/SATA# 22

VDDCPU

55

GNDSRC

29

SRC1#/SE2/27MHz_SS 18

SRC0/DOT96 13

SRC3/CR#_C 24

SRC3#/CR#_D 25

SRC6# 40

SRC4 27

VDDSRC

39

SRC0#/DOT96# 14

CK_PWRGD/PD# 56

R40133_0402_5%

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SPI_CS1#_RPCI_GNT0# PLT_RST#

PCI_PLTRST#

PCI_RST#

PCI_PIRQB#

PCI_GNT0#

PCI_AD16

PCI_AD8

PCI_DEVSEL#

PCI_AD19

PCI_AD3

PCI_PIRQE#

PCI_CBE#0

PCI_REQ3#

PCI_AD5

PCI_AD28

PCI_AD10

PCI_AD4

PCI_STOP#

PCI_REQ1#

PCI_AD30

PCI_CBE#1

PCI_AD25

PCI_AD22

PCI_AD7

PCI_PIRQF#

PCI_PIRQA#

PCI_PLTRST#

PCI_FRAME#

PCI_PCIRST#

PCI_AD24

PCI_AD12

PCI_AD1 PCI_REQ0#

PCI_AD13

PCI_AD11

PCI_AD0

PCI_CBE#2

PCI_AD21

PCI_AD18

PCI_IRDY#

PCI_CBE#3

PCI_AD26

PCI_AD23

CLK_PCI_ICH

PCI_PIRQD#

PCI_AD2

PCI_TRDY#

PCI_PIRQG#

PCI_SERR#

PCI_AD15

PCI_GNT3#

PCI_PAR

PCI_AD31

PCI_AD27

PCI_AD20

PCI_AD6

CLK_PCI_ICH

PCI_PCIRST#

PCI_PERR#

PCI_GNT3#

PCI_REQ2#

PCI_AD29

PCI_AD17

PCI_AD14

PCI_AD9

PCI_PIRQC#

PCI_PLOCK#

EC_PME#

PCI_REQ2#

PCI_REQ3#

PCI_PIRQD#

PCI_DEVSEL#

PCI_TRDY#

PCI_FRAME#

PCI_STOP#

PCI_PLOCK#

PCI_IRDY#

PCI_PERR#

PCI_SERR#

PCI_PIRQA#

PCI_PIRQC#

PCI_PIRQB#

PCI_REQ0#

PCI_REQ1#

PCI_PIRQE#

PCI_PIRQG#

PCI_PIRQH#

PCI_PIRQF#

PCI_PIRQH#

PCI_AD[0..31]40

PCI_CBE#0 40

PCI_CBE#1 40

PCI_CBE#2 40

PCI_CBE#3 40

PLT_RST# 7,19,22,24,28,29,34

SPI_CS1#_R19

PCI_IRDY# 40

PCI_FRAME# 40

PCI_PERR#

EC_PME# 29

PCI_TRDY# 40

PCI_DEVSEL# 40

PCI_STOP# 40

PCI_PAR 40

CLK_PCI_ICH 16

PCI_SERR#

PCI_PIRQF#

PCI_REQ0# 40

PCI_GNT0# 40

PCI_PIRQG# 40

PCI_RST# 21,40

+3VALW

+3VALW

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

ICH8(1/4)-PCI/INT

Custom

17 49Thursday, January 10, 2008

2007/1/15 2008/1/15

0

1

1

Boot BIOS Location

PCI

PCI_GNT0# SPI_CS#1

0

1

Boot BIOS Strap

*

LPC

SPI

Place closely pin B10

A16 swap override Strap

PCI_GNT3# Low= A16 swap override Enble

High= Default*

1

Check if use LPC?

Compal Electronics, Inc.

R188

1K_0402_5%

@

12

R191 8.2K_0402_5%

1 2

R165 8.2K_0402_5%

1 2

R189

1K_0402_5%

@

12

C470

8.2P_0402_50V@

1

2

R389 8.2K_0402_5%

1 2

R190 8.2K_0402_5%

1 2

R122

0_0402_5%

12

R166 8.2K_0402_5%

1 2

R218 8.2K_0402_5%

1 2

R215 8.2K_0402_5%

1 2

R217 8.2K_0402_5%

1 2

R193 8.2K_0402_5%

1 2

R221 8.2K_0402_5%

1 2

R178 8.2K_0402_5%

1 2

R187

0_0402_5%

12

R112

100K_0402_5%

12

U10

MC74VHC1G08DFT2G SC70 5P

@

B

2

A

1Y4

P5

G

3

PCI

Interrupt I/F

U8B

ICH8M REV 1.0

AD0

D20

AD1

E19

AD2

D19

AD3

A20

AD4

D17

AD5

A21

AD6

A19

AD7

C19

AD8

A18

AD9

B16

AD10

A12

AD11

E16

AD12

A14

AD13

G16

AD14

A15

AD15

B6

AD16

C11

AD17

A9

AD18

D11

AD19

B12

AD20

C12

AD21

D10

AD22

C7

AD23

F13

AD24

E11

AD25

E13

AD26

E12

AD27

D8

AD28

A6

AD29

E8

AD30

D6

AD31

A3

REQ0# A4

GNT0# D7

REQ1#/GPIO50 E18

GNT1#/GPIO51 C18

REQ2#/GPIO52 B19

GNT2#/GPIO53 F18

REQ3#/GPIO54 A11

GNT3#/GPIO55 C10

C/BE0# C17

C/BE1# E15

C/BE2# F16

C/BE3# E17

IRDY# C8

PAR D9

PCIRST# G6

DEVSEL# D16

PERR# A7

PLOCK# B7

SERR# F10

STOP# C16

TRDY# C9

FRAME# A17

PLTRST# AG24

PCICLK B10

PME# G7

PIRQA#

F9

PIRQB#

B5

PIRQC#

C5

PIRQD#

A10 PIRQH#/GPIO5 B3

PIRQG#/GPIO4 F12

PIRQF#/GPIO3 G11

PIRQE#/GPIO2 F8

R216 8.2K_0402_5%

1 2

R388 8.2K_0402_5%

1 2

R214 8.2K_0402_5%

12

R167 8.2K_0402_5%

1 2

R220 8.2K_0402_5%

1 2

U9

MC74VHC1G08DFT2G SC70 5P

@

B

2

A

1Y4

P5

G

3

R164 8.2K_0402_5%

1 2

R186

100K_0402_5%

12

R168 8.2K_0402_5%

1 2

R192 8.2K_0402_5%

1 2

R219 8.2K_0402_5%

1 2

R179

1K_0402_5%

@

12

R390

10_0402_5% @

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_INIT#

H_IGNNE#

H_NMI

H_STPCLK#

H_DPRSTP#H_DPRSTP_R#

H_SMI#

H_FERR#

H_PWRGOOD

KB_RST#

H_FERR#

GATEA20

ICH_RTCX1

SM_INTRUDER#

ICH_INTVRMEN

LAN100_SLP

SATA_LED#

CLK_PCIE_SATA#

CLK_PCIE_SATA

LPC_AD0

LPC_AD3

LPC_AD2

LPC_AD1

LPC_FRAME#

LPC_DRQ0#

H_A20M#

GATEA20

H_INTR

KB_RST#

IDE_DD14

IDE_DD15

IDE_DD13

IDE_DD10

IDE_DD12

IDE_DD11

IDE_DD9

IDE_DD6

IDE_DD8

IDE_DD7

IDE_DD4

IDE_DD5

IDE_DD3

IDE_DD2

IDE_DD1

IDE_DD0

IDE_DA1

IDE_DA2

IDE_DA0

IDE_DCS1#

IDE_DCS3#

IDE_DIOR#

IDE_DIOW#

IDE_DDACK#

IDE_DIORDY

IDE_IRQ

IDE_DIORDY

IDE_IRQ

IDE_DDREQ

ACZ_SDOUT

ICH_RTCX2

HDA_BITCLK_R

HDA_SYNC_R

HDA_SDOUT_R

ICH_RTCRST#

LAN100_SLP

ICH_INTVRMEN

SM_INTRUDER#

THRMTRIP_ICH#

ICH_RTCX1

ICH_RTCX2

PSATA_ITX_DRX_P0_C

PSATA_ITX_DRX_N0_C

PSATA_IRX_DTX_P0_C

PSATA_IRX_DTX_N0_C

PSATA_ITX_DRX_P0_C

PSATA_ITX_DRX_N0_C

PSATA_ITX_DRX_P0

PSATA_ITX_DRX_N0

ADC_ACZ_SDIN0

HDA_RST_R#

GLAN_COMP

SATA_LED#

ICH_RSVD

ODD_IRX_DTX_N0_C

ODD_IRX_DTX_P0_C

ODD_ITX_DRX_N0_C

ODD_ITX_DRX_P0_C

ODD_ITX_DRX_N0_C

ODD_ITX_DRX_P0_C

ODD_ITX_DRX_N0

ODD_ITX_DRX_P0

H_DPSLP# 5

H_DPRSTP# 5,7,49

H_FERR# 4

H_PWRGOOD 5

H_IGNNE# 4

H_INIT# 4

H_NMI 4

H_SMI# 4

H_STPCLK# 4

H_THERMTRIP# 4,7

CLK_PCIE_SATA#16 CLK_PCIE_SATA16

LPC_AD[0..3] 24,29

LPC_FRAME# 24,29

H_A20M# 4

GATEA20 29

H_INTR 4

KB_RST# 29

IDE_DA0 21

IDE_DA1 21

IDE_DA2 21

IDE_DCS1# 21

IDE_DCS3# 21

IDE_DDACK# 21

IDE_DIOW# 21

IDE_DIOR# 21

IDE_DIORDY 21

IDE_IRQ 21

IDE_DDREQ 21

ACZ_RST#25

PSATA_IRX_DTX_N0_C21 PSATA_IRX_DTX_P0_C21

PSATA_ITX_DRX_N021

PSATA_ITX_DRX_P021

IDE_DD[0..15] 21

SATA_LED#31

ACZ_BITCLK25

ICH_RSVD 19

ACZ_SYNC25

ACZ_SDOUT25

ADC_ACZ_SDIN025

ODD_IRX_DTX_N0_C21 ODD_IRX_DTX_P0_C21

ODD_ITX_DRX_N0

ODD_ITX_DRX_P0

+3VS

+VCCP

+VCCP

+RTCVCC

+3VS

+3VS

+RTCVCC

+1.5VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

ICH8(2/4)_LAN,HD,IDE,LPC

Custom

18 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Within 500 mils

XOR CHAIN ENTRANCE STRAP:RSVD

placed within 2" from ICH8M

within 2" from R1557

close ICH8

XOR Chain Entrance Strap

DescriptionICH RSVD HDA SDOUT

RSVD

Enter XOR Chain

Normal Operation (Default)

Set PCIE port config bit 1

00

0

0

1

1

11

Compal Electronics, Inc.

close ICH8

C415

10P_0402_50V8J~N

1

2

RTCLAN / GLAN

IHDA

SATA

IDE

LPCCPU

U8A

ICH8M REV 1.0

RTCX1

AG25

RTCX2

AF24

INTVRMEN

AF25

INTRUDER#

AD22

GLAN_CLK

B24

LAN_RSTSYNC

D22

LAN_RXD0

C21

LAN_RXD1

B21

LAN_RXD2

C22

LAN_TXD0

D21

LAN_TXD1

E20

LAN_TXD2

C20

HDA_BIT_CLK

AJ16

HDA_SYNC

AJ15

HDA_RST#

AE14

HDA_SDIN0

AJ17

HDA_SDIN1

AH17

HDA_SDIN2

AH15

HDA_SDOUT

AE13

SATALED#

AF10

SATA0RXN

AF6

SATA0RXP

AF5

SATA0TXN

AH5

SATA0TXP

AH6

SATA1RXN

AG3

SATA1RXP

AG4

SATA1TXN

AJ4

SATA1TXP

AJ3

SATA_CLKN

AB7

SATA_CLKP

AC6

SATARBIAS#

AG1

SATARBIAS

AG2

DA0 AA4

DA1 AA1

DA2 AB3

DCS1# Y6

DCS3# Y5

DD0 V1

DD1 U2

DD2 V3

DD3 T1

DD4 V4

DD5 T5

DD6 AB2

DD7 T6

DD8 T3

DD9 R2

DD10 T4

DD11 V6

DD12 V5

DD13 U1

DD14 V2

DD15 U6

DDREQ W5

IORDY Y1

IDEIRQ Y3

DDACK# Y2

DIOW# W3

DIOR# W4

FWH0/LAD0 E5

FWH1/LAD1 F5

FWH2/LAD2 G8

FWH3/LAD3 F6

LDRQ0# G9

LDRQ1#/GPIO23 E6

FWH4/LFRAME# C4

A20GATE AF13

A20M# AG26

DPRSTP# AF26

DPSLP# AE26

FERR# AD24

CPUPWRGD/GPIO49 AG29

IGNNE# AF27

INIT# AE24

INTR AC20

RCIN# AH14

SMI# AG28

NMI AD23

STPCLK# AA24

THRMTRIP# AE27

RTCRST#

AF23

GLAN_DOCK#/GPIO13

AH21

GLAN_COMPO

C25 GLAN_COMPI

D25

HDA_SDIN3

AD13

SATA2TXN

AE4

SATA2RXN

AF2

SATA2TXP

AE3

SATA2RXP

AF1

TP8 AA23

HDA_DOCK_EN#/GPIO33

AE10

HDA_DOCK_RST#/GPIO34

AG14

LAN100_SLP

AD21

C419

10P_0402_50V8J~N

1

2

R356 33_0402_5%

1 2

R124

20K_0402_5%

1 2

R346 33_0402_5%

1 2

C188

1U_0603_10V6K

1

2

R130 24_0402_1%

1 2

R341

10M_0402_5%

1 2

R146 8.2K_0402_5%

1 2

R352

1K_0402_5%

@12

R145 4.7K_0402_5%

1 2

R139 330K_0402_1%

1 2 R156

56_0402_5%

12

JOPEN1

@

1 2

Y2

32.768KHZ_12.5PF_1TJS125BJ4A421P

OUT 4

IN 1

NC

3

NC

2

R163

10K_0402_5%

12

R353 33_0402_5%

1 2

R141 330K_0402_1%

1 2

R358

24.9_0402_1%

1 2

R131

56_0402_5%

12

R181 24.9_0402_1%

1 2

R127

10K_0402_5%

12

T36 PAD

R110 33_0402_5%

1 2

C192 3900P_0402_50V7K

1 2

R129 0_0402_5%

12

R357

1K_0402_5%

@

12

R140 1M_0402_5%

1 2

C193 3900P_0402_50V7K

1 2 T19PAD

C323 3900P_0402_50V7K

@

1 2

T35 PAD

C325 3900P_0402_50V7K

@

1 2

R13510K_0402_5%

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CL_CLK0

CL_DATA0

CL_VREF1_ICH

MCH_ICH_SYNC#

CL_VREF0_ICH

DPRSLPVR

USB_OC#8

USB_OC#9

SERIRQ

ICH_PCIE_WAKE#

XDP_DBRESET#

PM_BMBUSY#

H_STP_PCI#

ICH_SUSCLK

CL_RST#1

ICH_RI#

PCI_CLKRUN#

SERIRQ

EC_THERM#

VRMPWRGD

SST_CTL

SB_SPKR

ICH_RSVD

CLK_48M_ICH

CLK_14M_ICH

SLP_S4#

SLP_S5#

SLP_S3#

PM_PWROK

CLK_14M_ICHCLK_48M_ICH

USB_OC#4

USB_OC#5

USB_OC#0

USB_OC#1

USB_OC#2

CLK_PCIE_ICH

CLK_PCIE_ICH#

DMI_IRCOMP

USB20_N0

USB20_N1

USB20_P1

USB20_P0

USB20_P5

USBRBIAS

DPRSLPVR

CLKSATAREQ#

ICH_LOW_BAT#

PBTN_OUT#

EC_THERM#

DMI_TXN0

DMI_TXN1

DMI_TXN2

DMI_TXN3

DMI_TXP0

DMI_TXP1

DMI_TXP2

DMI_TXP3

DMI_RXN0

DMI_RXN1

DMI_RXN2

DMI_RXN3

DMI_RXP0

DMI_RXP1

DMI_RXP2

DMI_RXP3

USB20_P8

USB20_N9

USB20_P9

USB20_N8

H_STP_CPU#

USB_OC#3

SB_SPKR

ICH_SMB_DATA

USB20_N7

USB20_P7

USB20_N2

USB20_N3

USB20_P3

USB20_P2

EC_SMI#

EC_SCI#

EC_LID_OUT#

ICH_SMB_CLK

CK_PWRGD_R CK_PWRGD

USB_OC#4

USB_OC#9

USB_OC#5

USB_OC#1

USB_OC#8

USB_OC#0

USB_OC#2

ME_SMB_DA

ME_SMB_CK

ICH_SMB_DATA

ICH_SMB_CLK

PM_RSMRST#

OCP#

USB_OC#3

LAN_WOL_EN

EC_SWI#

OCP#

PCIE_C_TXP3

PCIE_RXN3

PCIE_C_TXN3

PCIE_RXP3

PCIE_C_TXP2

PCIE_C_TXN2

PCIE_RXP2

PCIE_RXN2

PCIE_C_TXP4

PCIE_RXN4

PCIE_C_TXN4

PCIE_RXP4

GLAN_RXP

GLAN_TXP_C

GLAN_RXN

GLAN_TXN_C

ICH_PCIE_WAKE#

ICH_RI#

XDP_DBRESET#

CL_RST#1

ICH_LOW_BAT#

M_PWROK

M_PWROK

EC_LID_OUT# VGATE

EC_RSMRST# PM_RSMRST#

USB_OC#7

USB_OC#7

VRMPWRGD

USB20_N5

USB20_N4

USB20_P4

USB20_N6

USB20_P6

XDP_DBRESET#4

PM_BMBUSY#7

H_STP_PCI#16 H_STP_CPU#16

ICH_PCIE_WAKE#24,28

DMI_RXP0 7

DMI_RXN0 7

DMI_TXP0 7

DMI_TXN0 7

CL_CLK0 7

CL_DATA0 7

CL_RST# 7

MCH_ICH_SYNC#7

DPRSLPVR 7,49

SERIRQ29

EC_THERM#4,29

CLK_48M_ICH 16

CLK_14M_ICH 16

SLP_S3# 29

SLP_S4# 29

PM_PWROK 7,29

PBTN_OUT# 29

CLK_PCIE_ICH# 16

CLK_PCIE_ICH 16

USB20_N1 32

USB20_P1 32

USB20_N0 32

USB20_P0 32

USB20_P5 28

CLKSATAREQ#16

M_PWROK 7

DMI_RXP1 7

DMI_RXN1 7

DMI_TXP1 7

DMI_TXN1 7

DMI_RXP2 7

DMI_RXN2 7

DMI_TXP2 7

DMI_TXN2 7

DMI_RXP3 7

DMI_RXN3 7

DMI_TXP3 7

DMI_TXN3 7

USB20_N9 32

USB20_P9 32

USB20_N8 15

USB20_P8 15

PCI_CLKRUN#29,40

EC_LID_OUT#29

CK_PWRGD 16

USB20_N7 32

USB20_P7 32

USB20_N3 32

USB20_P3 32

USB20_N2 32

USB20_P2 32

EC_SMI#29 EC_SCI#29

ICH_SM_CLK13,14,16,24

ICH_SM_DA13,14,16,24

PLT_RST# 7,17,22,24,28,29,34

USB_OC#032

USB_OC#232

ACIN 29,43,44

EC_SWI#29

OCP#4

LAN_WOL_EN 29

PCIE_RXN424

PCIE_TXN424 PCIE_TXP424

PCIE_RXP424

PCIE_RXN324

PCIE_TXN324 PCIE_TXP324

PCIE_RXP324

PCIE_TXN228 PCIE_RXP228 PCIE_RXN228

PCIE_TXP228

USB_OC#132

SPI_CS1#_R17

ICH_SMB_DATA28 ICH_SMB_CLK28

SLP_S5# 29

VGATE7,29,49

EC_RSMRST#29

ICH_RSVD18

GLAN_RXN22 GLAN_RXP22

GLAN_TXP22 GLAN_TXN22

SB_SPKR25

USB20_N5 28

USB20_N4 24

USB20_P4 24

USB20_N6 32

USB20_P6 32

USB_OC#332

+3VS

+3VS

+3VALW

+1.5VS

+3VS

+3VALW +3VS

+3VALW

+5VS

+3VS

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

ICH8(3/4)_PM,USB,GPIO

Custom

19 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Place closely pin AG9Place closely pin G5

Within 500 mils

Within 500 mils

low-->default

High -->No boot

GLAN

modify follow intel check list-1003

Express Card

Robson

WLAN

USB2

FingerPrinter

USB0

Express Card

BlueTooth

Camera

Felica

USB1

RSMRST# -> CLPWROK -> PWROK

Compal Electronics, Inc.

Mini Card0

ESATA+USB

T45PAD

C4370.1U_0402_16V7K~N 12

R138 8.2K_0402_5%

12

R125

10_0402_5%@

12

R115 8.2K_0402_5%

1 2

T30PAD

R150 10K_0402_5%

1 2

C4360.1U_0402_16V7K~N 12

R151 1K_0402_5%

1 2

T44 PAD

R148 10K_0402_5%

1 2

R128

10K_0402_5%

1 2

R180

453_0402_1%

12

RP27

10K_1206_8P4R_5%

18 27 36 45

PCI-Express

Direct Media Interface

USB

SPI

U8D

ICH8M REV 1.0

PERN1

P27

PERP1

P26

PETN1

N29

PETP1

N28

PERN2

M27

PERP2

M26

PETN2

L29

PETP2

L28

PERN3

K27

PERP3

K26

PETN3

J29

PETP3

J28

PERN4

H27

PERP4

H26

PETN4

G29

PETP4

G28

PERN5

F27

PERP5

F26

PETN5

E29

PETP5

E28

PERN6/GLAN_RXN

D27

PERP6/GLAN_RXP

D26

PETN6/GLAN_TXN

C29

PETP6/GLAN_TXP

C28

DMI0RXN V27

DMI0RXP V26

DMI0TXN U29

DMI0TXP U28

DMI1RXN Y27

DMI1RXP Y26

DMI1TXN W29

DMI1TXP W28

DMI2RXN AB26

DMI2RXP AB25

DMI2TXN AA29

DMI2TXP AA28

DMI3RXN AD27

DMI3RXP AD26

DMI3TXN AC29

DMI3TXP AC28

DMI_CLKN T26

DMI_CLKP T25

DMI_ZCOMP Y23

DMI_IRCOMP Y24

OC0#

AJ19

OC1#/GPIO40

AG16

OC2#/GPIO41

AG15

OC3#/GPIO42

AE15

OC4#/GPIO43

AF15

OC5#/GPIO29

AG17

OC6#/GPIO30

AD12

OC7#/GPIO31

AJ18

USBP0N G3

USBP0P G2

USBP1N H5

USBP1P H4

USBP2N H2

USBP2P H1

USBP3N J3

USBP3P J2

USBP4N K5

USBP4P K4

USBP5N K2

USBP5P K1

USBP6N L3

USBP6P L2

USBP7N M5

USBP7P M4

USBRBIAS# F2

USBRBIAS F3

SPI_CLK

C23

SPI_CS0#

B23

SPI_CS1#

E22

SPI_MOSI

D23

SPI_MISO

F21

OC8#

AD14

OC9#

AH18

USBP8P M1

USBP8N M2

USBP9N N3

USBP9P N2

T20PAD

C196

4.7P_0402_50V8C@

1

2

R134 10K_0402_5% @

1 2

R158 10K_0402_5%

1 2

R3390_0402_5%

12

R120

100K_0402_5%

1 2

R107

2.2K_0402_5%

12

SATA

SMB

SYS

GPIO

GPIO

GPIO

Clocks

Power MGTController Link

MISC

U8C

ICH8M REV 1.0

SATA0GP/GPIO21 AJ12

SATA1GP/GPIO19 AJ10

SATA2GP/GPIO36 AF11

SATA3GP/GPIO37 AG11

SMBCLK

AJ26

SMBDATA

AD19

LINKALERT#

AG21

SMLINK0

AC17

SMLINK1

AE19

SUS_STAT#/LPCPD#

F4

SYS_RESET#

AD15

BMBUSY#/GPIO0

AG12

TACH1/GPIO1

AJ8

TACH2/GPIO6

AJ9

TACH3/GPIO7

AH9

GPIO8

AE16

GPIO12

AC19

SMBALERT#/GPIO11

AG22

TACH0/GPIO17

AG8

GPIO18

AH12

SCLOCK/GPIO22

AG10

SATACLKREQ#/GPIO35

AG13

STP_PCI#/GPIO15

AE20

STP_CPU#/GPIO25

AG18

SLOAD/GPIO38

AF9

SDATAOUT0/GPIO39

AJ11

CLKRUN#/GPIO32

AH11

SDATAOUT1/GPIO48

AD10

WAKE#

AE17

SERIRQ

AF12

THRM#

AC13

VRMPWRGD

AJ20

CLK14 AG9

CLK48 G5

SUSCLK D3

SLP_S3# AG23

SLP_S4# AF21

SLP_S5# AD18

PWROK AE23

DPRSLPVR/GPIO16 AJ14

BATLOW# AE21

PWRBTN# C2

LAN_RST# AH20

RSMRST# AG27

RI#

AF17

S4_STATE#/GPIO26 AH27

QRT_STATE0/GPIO27

AH25

QRT_STATE1/GPIO28

AD16

TP7

AJ22

CK_PWRGD E1

CLPWROK E3

SLP_M# AJ25

GPIO20

AE11 CL_CLK0 F23

CL_CLK1 AE18

CL_DATA0 F22

CL_DATA1 AF19

CL_VREF0 D24

CL_VREF1 AH23

CL_RST# AJ23

ME_EC_ALERT/GPIO10 AJ24

WOL_EN/GPIO9 AG19

EC_ME_ALERT/GPIO14 AF22

MEM_LED/GPIO24 AJ27

SPKR

AD9

TP3

AJ21

MCH_SYNC#

AJ13

R123 0_0402_5%

1 2

T43 PAD

R176 0_0402_5%

1 2

C4540.1U_0402_16V7K~N 12

R121 10K_0402_5%

1 2

T34 PAD

R347

8.2K_0402_5%

1 2

R1042.2K_0402_5%

12

R175

10_0402_5%@

12

G

D

S

Q10

SSM3K7002FU_SC70-3

2

13

R345 0_0402_5%

1 2

R137

10K_0402_5%

1 2

T46 PAD

R149 8.2K_0402_5%@ 1 2

R105

2.2K_0402_5%

12

R195 3.24K_0402_1%

1 2

C4500.1U_0402_16V7K~N 12

R132 10K_0402_5%@1 2

C229

4.7P_0402_50V8C@

1

2

C4350.1U_0402_16V7K~N 12

R118 10K_0402_5%

12

R117 499_0402_1%@

1 2

C451

0.1U_0402_16V7K~N 12

R106

2.2K_0402_5%

12

G

D

S

Q9

SSM3K7002FU_SC70-3

2

13

R348 8.2K_0402_5%

1 2

RP28

10K_1206_8P4R_5%

18 27 36 45

C452

0.1U_0402_16V7K~N 12

T17PAD

R342

100K_0402_5%

1 2

T18PAD

C4550.1U_0402_16V7K~N 12

R136

10K_0402_5%

1 2

R119 10K_0402_5%

1 2

R152 24.9_0402_1%

1 2

C234

0.1U_0402_16V4Z~N

1

2

R177 22.6_0402_1%

1 2

R157 0_0402_5%

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH_V5REF_SUS

VCCSUS1_5_ICH_2

VCCSUS1_5_ICH_1

VCCCL1_05_ICH

VCC_LAN1_05_INT_ICH_1

VCC_LAN1_05_INT_ICH_2

ICH_V5REF_RUN

TP_VCCSUS1.05_INT_ICH1

TP_VCCSUS1.05_INT_ICH2

ICH_V5REF_RUN

ICH_V5REF_SUS

+VCCP

+1.25VS

+3VS

+3VALW

+3VS

+RTCVCC

+1.5VS

+3VS

+3VALW

+3VALW

+3VS

+3VS

+3VS

+3VS

+1.5VS

+1.5VS

+1.5VS

+1.5VS

+1.5VS

+3VS

+3VS

+1.5VS

+1.5VS

+5VS +3VS

+3VALW+5VALW

+1.5VS

+1.5VS

+VCCP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

ICH8(4/4)_POWER&GND

Custom

20 49Thursday, January 10, 2008

2007/1/15 2008/1/15

(SATA)

(DMI)

40 mils

20 mils

20 mils

20 mils

0316 change design

Compal Electronics, Inc.

L15

CHB1608U301_0603

1 2

C214

0.1U_0402_16V4Z~N

1

2

R159

100_0402_5%

12

C216

0.1U_0402_16V4Z~N

1

2

C224

0.1U_0402_16V4Z~N

1

2

C202

0.1U_0402_16V4Z~N

1

2

D18

CH751H-40PT_SOD323-2

21

C428

1U_0603_10V4Z

1

2

C200

10U_0805_6.3V6M

1

2

T31

C457

4.7U_0805_10V4Z~N

@

1

2

C225 10U_0805_6.3V6M

1

2

T24

C197

0.1U_0402_16V4Z~N

1

2

L30

CHB1608U301_0603

1 2

C227 0.1U_0402_16V4Z~N

1

2

C425

22U_0805_6.3V4Z

1

2

C230

0.1U_0402_16V4Z~N

1

2

C218

0.1U_0402_16V4Z~N

1

2

C430

10U_0805_6.3V6M

1

2

C231

0.1U_0402_16V4Z~N

1

2

C233

0.1U_0402_16V4Z~N

1

2

C194

0.1U_0402_16V4Z~N

1

2

T22

C198

0.1U_0402_16V4Z~N

1

2

CORE

VCCA3GP ATXARX

IDE

USB CORE

PCI

GLAN POWER

VCCP_COREVCCPSUSVCCPUSB

U8F

ICH8M REV 1.0

V5REF[1]

A16

V5REF[2]

T7

V5REF_SUS

G4

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AA26

VCC1_5_B[03]

AA27

VCC1_5_B[04]

AB27

VCC1_5_B[05]

AB28

VCC1_5_B[06]

AB29

VCC1_5_B[07]

D28

VCC1_5_B[08]

D29

VCC1_5_B[09]

E25

VCC1_5_B[10]

E26

VCC1_5_B[11]

E27

VCC1_5_B[12]

F24

VCC1_5_B[13]

F25

VCC1_5_B[14]

G24

VCC1_5_B[15]

H23

VCC1_5_B[16]

H24

VCC1_5_B[17]

J23

VCC1_5_B[18]

J24

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T23

VCC1_5_B[36]

T24

VCC1_5_B[37]

T27

VCC1_5_B[38]

T28

VCC1_5_B[39]

T29

VCC1_5_B[40]

U24

VCC3_3[01] AF29

VCCDMIPLL R29

VCC1_5_A[01]

AE7

VCC1_5_A[02]

AF7

VCC1_5_A[03]

AG7

VCC1_5_A[04]

AH7

VCC1_5_A[05]

AJ7

VCCSATAPLL

AJ6

VCC3_3[02] AD2

VCC1_5_A[06]

AC1

VCC1_5_A[07]

AC2

VCC1_5_A[08]

AC3

VCC1_5_A[09]

AC4

VCC1_5_A[10]

AC5

VCCUSBPLL

D1

VCCLAN1_05[1]

F17

VCCLAN1_05[2]

G18

VCC1_05[01] A13

VCC1_05[02] B13

VCC1_05[03] C13

VCC1_05[04] C14

VCC1_05[05] D14

VCC1_05[06] E14

VCC1_05[07] F14

VCC1_05[08] G14

VCC1_05[09] L11

VCC1_05[10] L12

VCC1_05[11] L14

VCC1_05[12] L16

VCC1_05[13] L17

VCC1_05[14] L18

VCC1_05[15] M11

VCC1_05[16] M18

VCC1_05[17] P11

VCC1_05[18] P18

VCC1_05[19] T11

VCC1_05[20] T18

VCCLAN3_3[1]

F19

VCCLAN3_3[2]

G20

VCCHDA AC12

VCCSUSHDA AD11

V_CPU_IO[1] AC23

V_CPU_IO[2] AC24

VCC3_3[07] AA3

VCC3_3[08] U7

VCC3_3[09] V7

VCC3_3[10] W1

VCC3_3[11] W6

VCC3_3[12] W7

VCC3_3[13] Y7

VCC3_3[15] B15

VCC3_3[16] B18

VCC3_3[17] B4

VCC3_3[18] B9

VCC3_3[19] C15

VCC3_3[20] D13

VCC3_3[21] D5

VCC3_3[22] E10

VCC3_3[23] E7

VCC3_3[24] F11

VCCRTC

AD25

VCCSUS3_3[02] AC18

VCCSUS3_3[03] AC21

VCCSUS3_3[04] AC22

VCCSUS3_3[05] AG20

VCCSUS3_3[06] AH28

VCCSUS3_3[07] P6

VCCSUS3_3[08] P7

VCCSUS3_3[09] C1

VCCSUS3_3[10] N7

VCCSUS3_3[11] P1

VCCSUS3_3[12] P2

VCCSUS3_3[13] P3

VCCSUS3_3[14] P4

VCCSUS3_3[15] P5

VCCSUS3_3[16] R1

VCCSUS3_3[17] R3

VCCSUS3_3[18] R5

VCC1_5_A[11]

AC10

VCC1_5_A[12]

AC9

VCC1_5_A[13]

AA5

VCC1_5_A[14]

AA6

VCC1_5_A[15]

G12

VCC1_5_A[16]

G17

VCCSUS1_05[1] J6

VCCSUS1_05[2] AF20

VCC1_5_A[20]

F1

VCC1_5_A[21]

L6

VCC1_5_A[22]

L7

VCC1_5_A[23]

M6

VCC1_5_A[24]

M7

VCCSUS3_3[01] C3

VCC3_3[14] A8

VCC1_5_A[25]

W23

VCC1_05[22] U18

VCC1_05[27] V17

VCC1_05[25] V14

VCC1_05[23] V11

VCC1_05[21] U11

VCC1_05[28] V18

VCC1_05[26] V16

VCC1_05[24] V12

VCCGLAN1_5[4]

B27

VCCGLAN1_5[2]

A27

VCCGLAN1_5[5]

B28

VCCGLAN1_5[3]

B26

VCCGLAN1_5[1]

A26

VCCGLAN3_3

B25

VCCGLANPLL

A24

VCC3_3[06] AF8

VCC3_3[03] AC8

VCC3_3[05] AE8

VCC3_3[04] AD8

VCCSUS3_3[19] R6

VCC1_5_A[17]

H7

VCCSUS1_5[1] AC16

VCC1_5_A[19]

AD7 VCC1_5_A[18]

AC7

VCCSUS1_5[2] J7

VCC_DMI[2] AE29

VCC_DMI[1] AE28

VCCCL1_05 G22

VCCCL3_3[2] G21

VCCCL3_3[1] F20

VCCCL1_5 A22

VCC1_5_B[45]

W25

VCC1_5_B[43]

V24

VCC1_5_B[41]

U25

VCC1_5_B[46]

Y25

VCC1_5_B[44]

V25

VCC1_5_B[42]

V23

C422

1U_0603_10V4Z

1

2

T26

C427

2.2U_0603_6.3V4Z~N

1

2

C199

0.1U_0402_16V4Z~N

1

2T25

C438

0.1U_0402_16V4Z~N

1

2

C258

0.47U_0603_10V7K

1

2

R361

10_0402_5%

12

C205

0.1U_0402_16V4Z~N

1

2

C431

0.01U_0402_16V7K~N

1

2

L17

CHB1608U301_0603

1 2

+

C219

220U_D2_4VY_R15M

1

2

D10

CH751H-40PT_SOD323-2

21

C217

4.7U_0603_6.3V6M

1

2

T32

C261

2.2U_0603_106K

1

2

L16

CHB1608U301_0603

1 2

C421

10U_0805_6.3V6M

1

2

C232

0.1U_0402_16V4Z~N

1

2

C203

0.1U_0402_16V4Z~N

1

2

C252

10U_0805_6.3V6M

1

2

C420

1U_0603_10V4Z

1

2

U8E

ICH8M REV 1.0

VSS[001]

A23

VSS[002]

A5

VSS[003]

AA2

VSS[004]

AA7

VSS[005]

A25

VSS[006]

AB1

VSS[007]

AB24

VSS[008]

AC11

VSS[009]

AC14

VSS[010]

AC25

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AD17

VSS[014]

AD20

VSS[015]

AD28

VSS[016]

AD29

VSS[017]

AD3

VSS[018]

AD4

VSS[019]

AD6

VSS[020]

AE1

VSS[021]

AE12

VSS[022]

AE2

VSS[023]

AE22

VSS[024]

AD1

VSS[025]

AE25

VSS[026]

AE5

VSS[027]

AE6

VSS[028]

AE9

VSS[029]

AF14

VSS[030]

AF16

VSS[031]

AF18

VSS[032]

AF3

VSS[033]

AF4

VSS[034]

AG5

VSS[035]

AG6

VSS[036]

AH10

VSS[037]

AH13

VSS[038]

AH16

VSS[039]

AH19

VSS[040]

AH2

VSS[041]

AF28

VSS[042]

AH22

VSS[043]

AH24

VSS[044]

AH26

VSS[045]

AH3

VSS[046]

AH4

VSS[047]

AH8

VSS[048]

AJ5

VSS[049]

B11

VSS[050]

B14

VSS[051]

B17

VSS[052]

B2

VSS[053]

B20

VSS[054]

B22

VSS[055]

B8

VSS[056]

C24

VSS[057]

C26

VSS[058]

C27

VSS[059]

C6

VSS[060]

D12

VSS[061]

D15

VSS[062]

D18

VSS[063]

D2

VSS[064]

D4

VSS[065]

E21

VSS[066]

E24

VSS[067]

E4

VSS[068]

E9

VSS[069]

F15

VSS[070]

E23

VSS[071]

F28

VSS[072]

F29

VSS[073]

F7

VSS[074]

G1

VSS[075]

E2

VSS[076]

G10

VSS[077]

G13

VSS[078]

G19

VSS[079]

G23

VSS[080]

G25

VSS[081]

G26

VSS[082]

G27

VSS[083]

H25

VSS[084]

H28

VSS[085]

H29

VSS[086]

H3

VSS[087]

H6

VSS[088]

J1

VSS[089]

J25

VSS[090]

J26

VSS[091]

J27

VSS[092]

J4

VSS[093]

J5

VSS[094]

K23

VSS[095]

K28

VSS[096]

K29

VSS[097]

K3

VSS[099] K7

VSS[100] L1

VSS[101] L13

VSS[102] L15

VSS[103] L26

VSS[104] L27

VSS[105] L4

VSS[106] L5

VSS[107] M12

VSS[108] M13

VSS[109] M14

VSS[110] M15

VSS[111] M16

VSS[112] M17

VSS[113] M23

VSS[114] M28

VSS[115] M29

VSS[116] M3

VSS[117] N1

VSS[118] N11

VSS[119] N12

VSS[120] N13

VSS[121] N14

VSS[122] N15

VSS[123] N16

VSS[124] N17

VSS[125] N18

VSS[126] N26

VSS[127] N27

VSS[128] N4

VSS[129] N5

VSS[130] N6

VSS[131] P12

VSS[132] P13

VSS[133] P14

VSS[134] P15

VSS[135] P16

VSS[136] P17

VSS[137] P23

VSS[138] P28

VSS[139] P29

VSS[140] R11

VSS[141] R12

VSS[142] R13

VSS[143] R14

VSS[144] R15

VSS[145] R16

VSS[146] R17

VSS[147] R18

VSS[148] R28

VSS[149] R4

VSS[150] T12

VSS[151] T13

VSS[152] T14

VSS[153] T15

VSS[154] T16

VSS[155] T17

VSS[156] T2

VSS[157] U12

VSS[158] U13

VSS[159] U14

VSS[160] U15

VSS[161] U16

VSS[162] U17

VSS[163] U23

VSS[164] U26

VSS[165] U27

VSS[166] U3

VSS[167] U5

VSS[168] V13

VSS[169] V15

VSS[170] V28

VSS[171] V29

VSS[172] W2

VSS[173] W26

VSS[174] W27

VSS[175] Y28

VSS[176] Y29

VSS[177] Y4

VSS[178] AB4

VSS_NCTF[01] A1

VSS_NCTF[02] A2

VSS_NCTF[03] A28

VSS_NCTF[04] A29

VSS_NCTF[05] AH1

VSS_NCTF[06] AH29

VSS_NCTF[07] AJ1

VSS_NCTF[08] AJ2

VSS_NCTF[09] AJ28

VSS_NCTF[10] AJ29

VSS_NCTF[11] B1

VSS_NCTF[12] B29

VSS[179] AB23

VSS[180] AB5

VSS[181] AB6

VSS[182] AD5

VSS[183] U4

VSS[098]

K6

VSS[184] W24

T21

C215

0.1U_0402_16V7K~N

1

2

L32

CHB1608U301_0603

@

1 2

C204

0.1U_0402_16V4Z~N

1

2

C226

0.1U_0402_16V4Z~N

1

2

C458

1U_0603_10V4Z

@

1

2

C213

0.1U_0402_16V4Z~N

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PSATA_ITX_DRX_N0

PSATA_ITX_DRX_P0

ODD_IRX_DTX_N0

ODD_IRX_DTX_P0

ODD_ITX_DRX_P0

ODD_ITX_DRX_N0

IDE_DD8

IDE_DD7

IDE_DD9

IDE_DD6

IDE_DD10

IDE_DD5

IDE_DD11

IDE_DD4

IDE_DD12

IDE_DD3

ODD_ACT_LED#

IDE_DD13

SD_CSEL

IDE_DD2

IDE_DD14

IDE_DD1

IDE_DD15

IDE_DD0

PCI_RST#

PDIAG#

PSATA_ITX_DRX_P018

PSATA_IRX_DTX_N0_C18

PSATA_IRX_DTX_P0_C18

PSATA_ITX_DRX_N018

IDE_DD[0..15] 18

ODD_ITX_DRX_P018

ODD_IRX_DTX_N0_C18

ODD_IRX_DTX_P0_C18

ODD_ITX_DRX_N018

PCI_RST#17,40

IDE_DDREQ18

IDE_DIOR#18 IDE_DIOW#18

IDE_DIORDY18 IDE_DDACK#18 IDE_IRQ18 IDE_DA118

IDE_DA018 IDE_DA218 IDE_DCS1#18 IDE_DCS3#18

ODD_ACT_LED#31

+5VS

+5VS

+5VS

+5VS

+5VS

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

HDD/CDROM

Custom

21 49Thursday, January 10, 2008

2007/1/15 2008/1/15

SATA HDD CONN

Close to ODD Conn

CDROM CONN

else SD_CSEL= Low

then SD_CSEL= Floating

If CDROM is Slave

close JODD1

RESERVE(SATA ODD NET)

Close to SATA HDD

80mils

C574

10U_0805_10V4Z~N

1

2

C392 3900P_0402_50V7K

12

C377

0.1U_0402_16V7K~N

1

2

C503

0.1U_0402_16V4Z

1

2

C327 3900P_0402_50V7K

@

1 2

JODD1

ACES_88512-4541

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

GND

46

GND

47

R428

10K_0402_5%

@12

C499

1000P_0402_50V7K~N

1

2

+

C575

150U_B2_6.3VM_R45M

1

2

R429

100K_0402_5%

12

C498

10U_0805_10V4Z

1

2

C506

1U_0603_10V4Z

1

2

C326 3900P_0402_50V7K

@

1 2

C376

1000P_0402_50V7K~N

1

2

R286470_0402_5%

1 2

JSATA1

SUYIN_127043FB022G345ZR_NR

CONN@

GND

1

A+

2

A-

3

GND

4

B-

5

B+

6

GND

7

VCC3.3

8

VCC3.3

9

VCC3.3

10

GND

11

GND

12

GND

13

VCC5

14

VCC5

15

VCC5

16

GND

17

RESERVED

18

GND

19

VCC12

20

VCC12

21

VCC12

22 GND 23

GND 24

C296

0.1U_0402_16V7K~N

1

2

C520 47P_0402_50V8J

12

R448 0_0402_5%

1 2

C393 3900P_0402_50V7K

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LAN_MDIP3

LAN_MDIP2

LAN_MDIN1

LAN_MDIN2

LAN_MDIP1

LAN_MDIN3

LAN_MDIN0

LAN_MDIP0

LAN_EECS

LAN_EEDO

LAN_EECLK

LAN_EEDI

GLAN_RXP_C

GLAN_RXN_C

GLAN_TXN

GLAN_TXP

LAN_AVDD33

ISOLATEB

LAN_XTAL1

LAN_XTAL2

EN_WOL

LAN_DVDD15

V_DAC

V_DAC

V_DAC

LAN_MDIN0

LAN_MDIN3

LAN_MDIP2

LAN_MDIN2

LAN_MDIP3

LAN_MDIP1

LAN_MDIN1

RJ45_TX3+

RJ45_TX3-

RJ45_RX1-

RJ45_RX1+

RJ45_TX0-

RJ45_TX0+

V_DAC

RJ45_TX2+

RJ45_TX2-

LAN_MDIP0

LAN_LED3

LAN_LED2

LAN_LED1

LAN_LED0

RJ45_RX1-

RJ45_TX3-

RJ45_RX1+

RJ45_TX2+

RJ45_TX0-

RJ45_TX2-

RJ45_TX3+

RJ45_TX0+

LAN_LED2

LAN_LED3

LAN_LED1

LAN_LED3

LED1_LED3

LED2_LED3

LAN_ACTIVITY#LAN_LED0

LINK_10_1000#

LINK_100_1000#

LED2_LED3

LED1_LED3

CLK_PCIE_LAN#16

CLK_PCIE_LAN16

PLT_RST#7,17,19,24,28,29,34

PCIE_PME#29

EN_WOL# 29

GLAN_TXN19

GLAN_TXP19

GLAN_RXP19

MCARD_REQ#F16

GLAN_RXN19

+LAN_IO

+LAN_IO

+LAN_VDD

+LAN_VDD

+LAN_VDD

+LAN_VDD

+LAN_IO

+LAN_IO

+3VS

+LAN_IO

+LAN_IO

+3VALW

B+_BIAS

+LAN_IO

+LAN_VDD

+LAN_IO

+LAN_VDD

+LAN_IO

+LAN_IO

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

Broadcom BCM5787M

Custom

22 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Compal Electronics, Inc.

L92, C788, C778

close to U28(Pin 1) <200mil

1.5A

60mil

60mil

C966,C967 close to U28(PIN63)

30mil

R906

1.5M_0402_5%

@

1 2

C8030.1U_0402_10V7K~N

1

2

C788

0.1U_0402_10V7K~N

1

2

L56

FBML10160808121LMT_0603

12

R970

220_0402_5%

1 2

C792

0.1U_0402_10V7K~N

1

2

C784 0.01U_0402_16V7K

1 2

R498

1K_0402_5%

1 2

D44

CH751H-40PT_SOD323-2

21

R496

470K_0402_5%

1 2

C7980.1U_0402_10V7K~N

1

2

C6980.1U_0402_10V7K~N

1

2

C7800.1U_0402_10V7K~N

1

2

C805

15P_0402_50V8J

1

2

C7000.1U_0402_10V7K~N

1

2

U43

AT93C46-10SU-2.7 SO 8P

@

CS

1SK

2DI

3DO

4

VCC 8

NC 7

NC 6

GND 5

L46

FBMA-L11-322513-201LMA40T_1210

1 2

R968

220_0402_5%

1 2

C793 0.1U_0402_16V7K~N

1 2

C804

0.1U_0402_10V7K~N

1

2

C791

15P_0402_50V8J

1

2

Y6

25MHZ_12P_X8A025000FC1H-H

1 2

C787

0.1U_0402_10V7K~N

1

2

C799 0.01U_0402_16V7K

1 2

C7790.1U_0402_10V7K~N

1

2

C790

1U_0603_10V6K

1

2

C801

0.1U_0402_16V7K~N

@

1

2

S

GD

Q59

SI3456BDV-T1-E3_TSOP6

3

6

245

1

C571 0.1U_0402_16V7K~N

1 2

T51

BOTH_GST5009-LF

TCT1

1

TD1+

2

TD1-

3

TCT2

4

TD2+

5

TD2-

6MX2- 19

MX2+ 20

MCT2 21

MX1- 22

MX1+ 23

MCT1 24

TCT3

7

TD3+

8

TD3-

9

TCT4

10

TD4+

11

TD4-

12

MCT3 18

MX3+ 17

MX3- 16

MCT4 15

MX4+ 14

MX4- 13

C778

22U_1206_6.3V6M

1

2

C570 0.1U_0402_16V7K~N

12

C569 0.1U_0402_16V7K~N

12

C777

22U_1206_6.3V6M

1

2

R315 0_0402_5%

1 2

RP38

75_1206_8P4R_5%

18 27 36 45

R317 0_0402_5%

1 2

C5720.1U_0402_10V7K~N

1

2

JLAN2

C-1775553

CONN@

PR1-

2

PR1+

1

PR2+

3

PR3+

4

PR3-

5

PR2-

6

PR4+

7

PR4-

8

Orange LED-

9

Green LED-

11

Yellow LED+

12

Yellow LED-

13

GND 14

GND 15

Green-Orange LED+

10

R316 0_0402_5%

1 2

R497 2.49K_0402_1%

1 2

C781

0.1U_0402_10V7K~N

1

2

C8100.1U_0402_10V7K~N

1

2

C783

22U_1206_6.3V6M

1

2

L92

4.7UH_1098AS-4R7M_1.3A_20%

1 2

R499

15K_0402_5%

1 2

C789 0.1U_0402_16V7K~N

1 2

G

D

S

Q58

SSM3K7002FU_SC70-3

2

13

D41

CH751H-40PT_SOD323-2

21

C573 0.01U_0402_16V7K

1 2

C8000.1U_0402_10V7K~N

1

2

R494 3.6K_0402_5%

1 2

C7820.1U_0402_10V7K~N

1

2

R495

0_0402_5%

@

1 2

L55

FBML10160808121LMT_0603

12

D42

CH751H-40PT_SOD323-2

21

C802

0.1U_0402_10V7K~N

1

2

R969

220_0402_5%

1 2

C637 0.1U_0402_16V7K~N

1 2

C812

22U_1206_6.3V6M

@

1

2

R318 0_0402_5%

1 2

C807 0.01U_0402_16V7K

1 2

U28

RTL8111C-GR_QFN64_9X9

PERSTB

20

HSOP

29

HSON

30

HSIP

23

HSIN

24

REFCLK_P

26

REFCLK_N

27

MDIP2 9

MDIN2 10

MDIP3 12

MDIN3 13

EEDO 45

EEDI/AUX 47

EESK 48

EECS 44

LED3 54

LED2 55

LED1 56

LED0 57

MDIN1 7

MDIP1 6

MDIN0 4

MDIP0 3

SROUT12

1

VDDSR 63

RSET

64

LANWAKEB

19

ISOLATEB

36

CKTAL1

60

CKTAL2

61

DVDD12 21

EVDD12 22

EVDD12 28

DVDD12 32

DVDD12 38

DVDD12 43

DVDD12 49

DVDD12 52

FB12

5

ENSR

62

VDD33 16

VDD33 37

VDD33 46

VDD33 53

AVDD33 2

AVDD12 8

AVDD12 11

AVDD12 14

IGPIO 50

OGPIO 51

AVDD12 58

AVDD33 59

CLKREQB

33

NC

15

NC

17

NC

18

NC

34

NC

35

NC

39

NC

40

NC

41

NC

42

EGND

31

EGND

25

EXPOSE_PAD

65

D43

CH751H-40PT_SOD323-2

21

C794

1000P_1206_2KV7K

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

CLK_PCIE_Rob#

CLK_PCIE_Rob

PCIE_C_RXP3

PCIE_C_RXN3PCIE_RXN3

PCIE_RXP3

ROB_REQE#

PCIE_TXN3

PCIE_TXP3

PWR_BLUE_LED#

DISK_BUSY

BATT_CHG_LED#

LPC_AD1

LPC_AD3

LPC_AD0

LPC_AD2

PLT_RST#

BATT_LOW_LED#

WL_OFF#

PCIE_RXN4 PCIE_C_RXN4

PCIE_RXP4 PCIE_C_RXP4

ICH_PCIE_WAKE#

PCIE_TXN4

CH_DATA MINI_PIN3

PCIE_TXP4

CH_CLK MINI_PIN4

USB20_N4

MCARD_REQ#G

USB20_P4

LED_WWAN#

LED_WLAN#

CLK_PCIE_Rob16

CLK_PCIE_Rob#16

PCIE_TXN319

PCIE_TXP319

MCARD_REQ#E16

PCIE_RXP319 PCIE_RXN319 PLT_RST# 7,17,19,22,28,29,34

PWR_BLUE_LED#29,31

BATT_CHG_LED#29

LPC_FRAME# 18,29

LPC_AD[0..3] 18,29

CLK_DEBUG_PORT16

BATT_LOW_LED#29

CLK_PCIE_MCARD#16

CLK_PCIE_MCARD16

WL_OFF#29,32

LED_WLAN#31

PLT_RST#7,17,19,22,28,29,34 PCIE_RXN419

PCIE_RXP419

ICH_SM_CLK13,14,16,19

PCIE_TXN419

ICH_PCIE_WAKE#19,28

ICH_SM_DA13,14,16,19

CH_DATA32

PCIE_TXP419

CH_CLK32

USB20_N419

MCARD_REQ#G16

USB20_P419

+1.5VS

+3VS

+1.5VS +3VS

+3VS +1.5VS

+5VALW

+5VALW

+3VALW

+3VS+1.5VS

+3VS

+3VS

+1.5VS

+1.5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

Mini-Card/LED

Custom

24 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Mini-Express Card---WLAN

Power status(Left)

Compal Electronics, Inc.

Roboson

R406 0_0402_5%

12

JMINI1

FOX_AS0B226-S52N-7F~N

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

GND1

53

22

44

66

88

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

42 42

44 44

46 46

48 48

50 50

52 52

GND2 54

R343 0_0402_5%

12

C489

0.1U_0402_16V4Z~N

1

2

C500

0.01U_0402_16V7K~N

1

2

R404 0_0402_5%

1 2

R380 0_0402_5%@1 2 R279 0_0402_5%

1 2

T23 PAD

R444 0_0402_5%

1 2

C321

4.7U_0805_10V4Z~N

1

2

T61PAD

R282 0_0402_5%

1 2

LED1

12-21-BHC-ZL1M2RY-2C BLUE

12

C485

0.01U_0402_16V7K~N

1

2

C320

4.7U_0805_10V4Z~N

1

2

JMINI2

FOX_AS0B246-S50U-7F

GND1

53

GND2

54

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

46

46

47

47

48

48

49

49

50

50

51

51

52

52

R280 0_0402_5%

1 2

R471

200_0603_5%

1 2

R290 0_0402_5%

1 2

C488

0.01U_0402_16V7K~N

1

2

R287 0_0402_5%

1 2

C298

0.01U_0402_16V7K~N

1

2

R288 0_0402_5%

1 2

R381 0_0402_5%@1 2 R283 0_0402_5%

1 2

R373 0_0402_5%

12

C294

0.01U_0402_16V7K~N

1

2

R403 0_0402_5%

1 2

R472

200_0603_5%

1 2

R281 0_0402_5%

1 2

C312

0.1U_0402_16V4Z~N

1

2

C456

4.7U_0805_10V4Z~N

1

2

Y

B

LED2

12-22/Y2BHC-A30/2C_Y/B~D

3

21

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AC97_VREF

EAPD

C_MIC1

HP_JD

C_MIC2

LINEL

LINER

HP_LOUT

HP_ROUT

PLUG_IN#

SENSE_A

MONO_IN

MIC_SIG_R

MONO_IN

MIC_SIG

MIC_CLK

HP_JD

MIC_SIG_R

ACZ_BITCLK 18

ACZ_RST#18

ADC_ACZ_SDIN0 18

MIC_JD26

MIC126

MIC226

AMP_RIGHT 26

AMP_LEFT 26

HP_RIGHT 26

HP_LEFT 26

PLUG_IN26

PLUG_IN#26

ACZ_SYNC18

ACZ_SDOUT18

EAPD26

BEEP29

SB_SPKR19

MIC_SIG15

MIC_CLK 15

+AVDD_AC97

+MIC1_VREFO_R

+MIC1_VREFO_L

+VDDA

+5VS

+VDDA +3VS

+3VS

+VDDA

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

1.0

HD Audio Codec_ALC268

25 49Thursday, January 10, 2008

Compal Electronics, Inc.

2007/08/052006/08/05

20mil40mil

AGND

10mil

10mil

10mil

SPK_SEL HIGH: HARMAN

LOW: NO-BRAND

DGND

HD Audio Codec

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)

SENSE A

5.1K

10K

20K

39.2K

5.1K

10K

20K

39.2K

SENSE B

PORT-D (PIN 35, 36)

PORT-C (PIN 23, 24)

PORT-B (PIN 21, 22)

PORT-A (PIN 39, 41)

PORT-H (PIN 45, 46)

PORT-G (PIN 43, 44)

Sense Pin Impedance Codec Signals

Moat Bridge

Adjustable Output

Regulator for CODEC

40mil

For EMI

R505,R504

close to PIN13

close to CODEC

EC Beep

ICH Beep

G

D

S

Q68

SSM3K7002FU_SC70-3

@

2

13

R369

47K_0402_5%

1 2

C862

0.1U_0402_16V4Z

1

2

R905 0_0603_1%

1 2

L94

FBM-L11-160808-800LMT_0603

1 2

R898

100K_0402_5%

@

1 2

C869 1000P_0402_50V7K~N

C872 1000P_0402_50V7K~N

R884 6.8K_0603_5%

1 2

U49

ALC268-GR_LQFP48

NC

14

NC

15

MIC2_R

17

MIC2_L

16

LINE1_L

23

LINE1_R

24

CD_L

18

CD_R

20

CD_GND

19

MIC1_L

21

MIC1_R

22

SENSE A

13

PCBEEP

12

LINE_OUT_L 35

LINE_OUT_R 36

MONO_OUT 37

RESET#

11

SYNC

10

BIT_CLK 6

SDATA_OUT

5

SDATA_IN 8

GPIO0

2

GPIO3

3

LINE1_VREFO 29

MIC2_VREFO 30

MIC1_VREFO_L 28

VREF 27

DVDD 1

DVDD_IO 9

AVDD1 25

AVDD2 38

MIC1_VREFO_R 32

DMIC_CLK 46

EAPD

47

SPDIFO

48

DVSS1

4

DVSS2

7

GPIO1 31

NC 33

SENSE B

34

NC 43

NC 44

NC 45

JDREF 40

AVSS1 26

AVSS2 42

HP_OUT_L 39

HP_OUT_R 41

C302

1U_0603_10V4Z

1 2

R893 20K_0402_1%

1 2

C

BE

Q21

2SC2411K_SC59

1

2

3

C876 2.2U_0603_10V6K

1 2

R891 0_0402_5%

1 2

R881 6.8K_0603_5%

1 2

R885 0_0603_5%

1 2

R886 0_0603_5%

1 2

R371

10K_0402_5%

12

R894 0_0402_5%

12

C861

0.1U_0402_16V4Z

1

2

C863

0.1U_0402_16V4Z

1

2

R900

10K_0603_1%

1 2

C308

1U_0603_10V4Z

1 2

R384

2.4K_0402_5%

1 2

R902 0_0603_1%

1 2

R367

10K_0402_5%

12

C882

0.1U_0402_16V7K~N

R368

560_0402_5%

1 2

R370

10K_0402_5%

12

C301

1U_0603_10V4Z

1 2

C864

0.1U_0402_16V4Z

1

2

C884 0.1U_0402_16V7K~N

1

2

R412 0_0402_5%

1 2

C877 2.2U_0603_10V6K

1 2

R363

47K_0402_5%

1 2

R904 0_0603_1%

1 2

C860

10U_1206_16V4Z

1

2

C865

10U_1206_16V4Z

1

2

D22

CH751H-40PT SOD323

2 1

C879

10U_0805_10V4Z

1

2

C526 220P_0402_50V7K

@

1 2

C873 1000P_0402_50V7K~N

R364

560_0402_5%

1 2

R892

39.2K _0402_1%

12

R415 0_0402_5%

1 2

C867 1000P_0402_50V7K~N

C883 4.7U_0805_10V4Z~N

1

2

R895

20K_0402_1%

12

C305

1U_0603_10V4Z

1 2

C875 10P_0402_50V8J~N

@

1 2

R877

0_0603_5%

1 2

R309 0_0402_5%

12

U50

RT9198-4GPBG SOT-23 5P 4.75V

VIN

1

GND

2

SHDN#

3BP 4

VOUT 5

C527

220P_0402_50V7K

@

1

2

C881

4.7U_0805_10V4Z

G

D

S

Q69

SSM3K7002FU_SC70-3

@

2

13

R903 0_0603_1%

1 2

R897

100K_0402_5%

@

1 2

R889

10_0402_5%

@

12

R890 0_0402_5%

1 2

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

HPR

SPK_1

SPK_2

HP_OUTR

HP_OUTL

HP_R

HP_L

INTSPK_1

INTSPK_2

MIC-2

MIC-1

HP_INR HPINR

HP_INL HPINL

HP_OUTR

HP_OUTL

PLUG_IN

HP_MUTE#

EAPD

PLUG_IN

EAPD

PLUG_IN#

AMP_L

AMP_R

INTSPK_1

EC_MUTE HP_MUTE#

INTSPK_2

HPL

AMP_RIGHT25

HP_RIGHT25

HP_LEFT25

EC_MUTE29

EAPD

25

PLUG_IN#25

MIC_JD25

PLUG_IN25

AMP_LEFT25

MIC225

MIC125

+5VS

+5VS

+3VS

+3VS

+3VS

+MIC1_VREFO_L

+MIC1_VREFO_R

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

AMP/Audio Jack

Custom

26 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Speaker Connector

HEADPHONE OUT JACK

MICROPHONE IN JACK

W=40Mil

Reserve the 0 ohm resistor.

for voltage filtering

GAIN0 GAIN1 GAIN

00

0

0

1

1

1

6dB

10dB

15.6dB

21.6dB1

*

Change to 100p from 0.01u for EMI

-1012

Compal Electronics, Inc.

C339 2.2U_0603_6.3V6K

1 2

R310 0_0402_5%

12

R302 0_0402_5%

12

R293

0_0402_5%

12

U20

P3017THF B0 TSSOP 20P

GND4

1GND3

11 GND2

13 GND1

20

VDD 16

PVDD1 15

RIN-

17

BYPASS 10

NC 12

LOUT- 8

LOUT+ 4

ROUT- 14

ROUT+ 18

RIN+

7

LIN-

5

LIN+

9

GAIN0 2

GAIN1 3

PVDD2 6

SHUTDOWN

19

GNDA

21

C522

0.47U_0603_10V7K

1 2

C524 220P_0402_50V7K

1

2

R461 10K_0402_5%

1 2

U21

MC74VHC1G08DFT2G SC70 5P

@

B

2

A

1Y4

P5

G

3

C316

1U_0603_10V4Z

1

2

R458 10K_0402_5%

1 2

JHP1

FOX_JA6333L-B3S0-7F~N

1

2

3

4

5

6 7

8

9

10

L22 CHB2012U170_0805

1 2

R311 0_0402_5%

12

R301 47_0402_5%

1 2

R307 2.2K_0402_5%

1 2

JSPK2

ACES_88266-0200

1

1

2

2G1 3

G2 4

R306 2.2K_0402_5%

1 2

C329

470P_0402_50V7K

1

2

R300 47_0402_5%

1 2

C317

1U_0603_10V4Z

1

2

L35 CHB2012U170_0805

1 2

R462

0_0603_5%

12

R457 0_0603_5%

1 2

R450

100K_0402_5%

@

12

R449

1K_0402_1%

12

L34 CHB2012U170_0805

1 2

C521

0.47U_0603_10V7K

1 2

R305

1K_0402_5%@

12

C338 2.2U_0603_6.3V6K

1 2

R4633K_0402_5%

12

R456 0_0603_5%

1 2

C331

0.47U_0603_10V7K

1 2

R460 10K_0402_5%@1 2

G

D

S

Q43

SSM3K7002FU_SC70-3

@

2

13

R451

2.7K_0402_5%

@

1 2

R299

1K_0402_5%@

12

D12

SM05T1G_SOT23-3~D

@

2

3

1

L23 CHB2012U170_0805

1 2

C523 1U_0603_10V4Z

1 2

D23

SM05T1G_SOT23-3~D @

2

3

1

JMIC1

FOX_JA6333L-B3S0-7F~N

1

2

3

4

5

6 7

8

9

10

R459 10K_0402_5%@1 2

C333

0.47U_0603_16V4Z

1

2

R298 10K_0402_5%

1 2

R4643K_0402_5%

12

D16

SM05T1G_SOT23-3~D

@

2

3

1

C519

100P_0402_50V8J

1

2

C330

470P_0402_50V7K

1

2

C318

0.1U_0402_16V4Z

1

2

U22

S IC TPA4411MRTJR QFN 20P

C1P

1

PGND

2

C1N

3

NC-4 4

PVss

5

NC-6 6

SVss

7

NC-8 8

OUTL 9

SVDD 10

INR

15

SHDNR#

14

INL

13

NC-12 12

OUTR 11

NC-20 20

PVDD 19

SHDNL#

18

SGND

17

NC-16 16

D14 CH751H-40_SC76

@

2 1

C518

10U_0805_10V4Z

1

2

C525

220P_0402_50V7K

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SUSP#

PERST#

PLT_RST#

EXPR_CARD_REQ#

PCIE_PME#_R

PERST#

CPUSB#

EXPR_CPUSB#

USB20_N5

USB20_P5

PCIE_TXP2

PCIE_RXN2

PCIE_RXP2

PCIE_TXN2

CLK_PCIE_EXPR#

CLK_PCIE_EXPR

ICH_SMB_CLK

ICH_SMB_DATA

USB20_N5_R

USB20_P5_R

EXPR_CPUSB#

CPUSB#

SYSON

PLT_RST#7,17,19,22,24,29,34

SUSP#29,41,46,47,48 CLK_PCIE_EXPR#16 CLK_PCIE_EXPR16

ICH_PCIE_WAKE#19,24

ICH_SMB_DATA19 ICH_SMB_CLK19

USB20_P519 USB20_N519

PCIE_TXP219 PCIE_TXN219

PCIE_RXN219 PCIE_RXP219

EXPR_CARD_REQ#16

SYSON29,41,46

+1.5VS

+3VALW

+3VS

+1.5VS_PEC

+3VS_PEC

+3V_PEC

+3VS_PEC

+1.5VS_PEC

+3V_PEC

+1.5VS_PEC

+3VS_PEC

+1.5VS_PEC

+3V_PEC

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

EXPRESS CARD

Custom

28 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Express card

Express Card Power Switch

+3V_CARD Max. 1300mA, Average 1000mA

+1.5V_CARD Max. 650mA, Average 500mA

Compal Electronics, Inc.

C89

4.7U_0805_10V4Z~N

1

2

C90

0.1U_0402_16V4Z~N

1

2

C75

0.1U_0402_16V4Z~N

1

2

R48 0_0402_5%

1 2

R47 0_0402_5%

1 2

JEXP1

FOX_1CH4312C-TB_LB

CONN@

GND

1

USB_D-

2

USB_D+

3

CPUSB#

4

RSV

5

RSV

6

SMB_CLK

7

SMB_DATA

8

+1.5V

9

+1.5V

10

WAKE#

11

+3.3VAUX

12

PERST#

13

+3.3V

14

+3.3V

15

CLKREQ#

16

CPPE#

17

REFCLK-

18

REFCLK+

19

GND

20

PERn0

21

PERp0

22

GND

23

PETn0

24

PETp0

25

GND

26

GND

27

GND

28

GND

29

GND

30

C91 0.1U_0402_16V4Z~N

12

R37

0_0402_5%

1 2

U11

P2231NF_QFN20

3.3Vin

2

3.3Vin

43.3Vout 3

3.3Vout 5

SYSRST#

6

SHDN#

20

STBY#

1

PERST# 8

OC# 19

RCLKEN

18

AUX_IN

17 AUX_OUT 15

CPPE#

10

CPUSB#

9

NC 16

GND 7

1.5Vin

12

1.5Vin

14 1.5Vout 11

1.5Vout 13

C85 0.1U_0402_16V4Z~N

12

C73

4.7U_0805_10V4Z~N

1

2

C74 0.1U_0402_16V4Z~N

12

C92

0.1U_0402_16V4Z~N

1

2

C93

4.7U_0805_10V4Z~N

1

2

SPI_CLK_R

SPI_CS#

SPI_SO

SPI_SI

EC_TX_P80_DATA

EC_RX_P80_CLK

FSEL#SPICS#

IREF

DAC_BRIG

EN_DFAN1

BATT_OVP

BATT_CHG_LED#

SYSON

EC_RSMRST#

EC_ON

ACIN

VR_ON

FSTCHG

ON_OFF

BKOFF#

SPI_CLK

FAN_SPEED1

XCLKO

ECAGND

XCLKI

EC_LID_OUT#

EC_SWI#

SLP_S4#

FWR#SPI_SI

FRD#SPI_SO

EC_ENBKL

EC_MUTE

LAN_WOL_EN

ADP_I

GATEA20

KB_RST#

SERIRQ

LPC_FRAME#

LPC_AD3

LPC_AD2

LPC_AD1

LPC_AD0

CLK_PCI_EC

CLK_PCI_EC PLT_RST#

EC_RST#

EC_SCI#

PCI_CLKRUN#

KSI6

KSI1

KSI0

KSI5

KSI2

KSI[0..7]

KSI3

KSI7

KSI4

KSO12

KSO14

KSO15

KSO6

KSO13

KSO11

KSO[0..15]

KSO4

KSO0

KSO3

KSO8

KSO5

KSO1

KSO9

KSO7

KSO10

KSO2

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_DA2

EC_SMB_CK2

SLP_S3#

SLP_S5#

EC_SMI#

LID_SW#

EC_PME#

EN_WOL#

BATT_TEMP ECAGND

AD_BID

AD_BID

TP_DATA

ICH_PWROK

MSEN#

ECAGND

XCLKO XCLKI

TP_CLK

TP_DATA

EC_MUTE

EC_SMB_CK2

EC_SMB_DA1

EC_SMB_DA2

EC_SMB_CK1

ICH_PWROK

VGATE

M_PWROK_EC

TP_CLK

EC_PME#

SPI_PULLDOWN

SPI_CLK_R

ACOFF

BEEP

LID_SW#

SUSP#

PBTN_OUT#

EC_FB_SCLK_R

EC_FB_SDATA_R

EC_THERM#

TOUCHKEY_TINT

VGA_ON

MIC_DIAG

WL_OFF#

VGA_THER

EC_FB_SDATA_R

EC_FB_SCLK_R

PSID_DISABLE#

PS_ID

MIC_DIAG

SPI_CS#FSEL#SPICS#

FRD#SPI_SO SPI_SO

FWR#SPI_SI

SPI_CLKSPI_CLK_R

SPI_SI

LCD_TST

LCD_CBL_DET#

VGATE

LCD_CBL_DET#

LCD_TST

LCD_VCC_TEST_EN

BATT_LOW_LED#

PWR_BLUE_LED#

NUMLED# USB_EN

SCRLED#

W_DISABLE#

CAPSLED#

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

LPC_FRAME#

SERIRQ

PCI_CLKRUN#

BT_OFF#

DAC_BRIG 15

EN_DFAN1 4

IREF 44

BATT_CHG_LED# 24

SYSON 28,41,46

EC_RSMRST# 19

EC_THERM# 4,19

EC_ON 31

ACIN 19,43,44

VR_ON 49

FSTCHG 44

ON_OFF31

BKOFF# 15

FAN_SPEED14

EC_LID_OUT# 19

EC_SWI# 19

EC_MUTE 26

KB_RST#18 GATEA2018

SERIRQ19 LPC_FRAME#18,24

LPC_AD218,24 LPC_AD118,24

LPC_AD318,24

LPC_AD018,24

CLK_PCI_EC16 PLT_RST#7,17,19,22,24,28,34

EC_SCI#19 PCI_CLKRUN#19,40

KSI[0..7]31

EC_SMB_CK150 EC_SMB_DA150 EC_SMB_CK24,31,35 EC_SMB_DA24,31,35

SLP_S3#19 SLP_S5#19 EC_SMI#19

CB_PME#40

EC_PME#17

INVT_PWM 15

EN_WOL# 22

BATT_TEMP 50

TP_CLK 31

TP_DATA 31

LAN_WOL_EN19

SLP_S4# 19

PM_PWROK 7,19

CHGVADJ 44

PCIE_PME#22

MSEN# 15

KSO[0..15]31

ACOFF 44

BEEP 25

BATT_OVP 50

ADP_I 44

SUSP# 28,41,46,47,48

PBTN_OUT# 19

TOUCHKEY_TINT 31

VGA_ON 47

MIC_DIAG 15

EC_ENBKL 15

WL_OFF# 24,32

VGA_THER 34

PS_ID 43

PSID_DISABLE# 43

VGATE 7,19,49

LCD_CBL_DET# 15

LCD_TST 15

LCD_VCC_TEST_EN 15

BATT_LOW_LED# 24

PWR_BLUE_LED#24,31

EC_FB_SDATA31 EC_FB_SCLK31

NUMLED#31

USB_EN 32

SCRLED# 31

W_DISABLE# 32

CAPSLED# 31

PLT_RST#7,17,19,22,24,28,34

CLK_PCI_TPM 16

BT_OFF#

+3VALW

+3VALW

+3VALW +EC_AVCC

+3VALW

+3VALW

+3VALW

+3VALW+EC_AVCC

+5VS

+3VALW

+3VS

+5VALW

+3VALW

+3VALW

+3VS

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

BIOS & EC I/O Port

Custom

29 49Thursday, January 10, 2008

2007/1/15 2008/1/15

20mils

Board ID

M/B rev:0.1; 0.2; 0.3; 1.0

Voltage:0.0; 0.4; 0.8; 1.0

2007-09-19 change Brd ID

Ra

Rb

SPI Flash (8Mb*1)

SPI Flash connect

Compal Electronics, Inc.

TPM 1.2 Conn

0.5A per each pin

12mA

REED Switch

For ENE

C281

0.1U_0402_16V4Z~N

1

2

R277

10K_0402_5%

1 2

L19FBM-11-160808-601-T_0603

12

R278

20M_0603_5%@1 2

R414 0_0402_5%@

1 2

R269 4.7K_0402_5%@12

C285

0.1U_0402_16V4Z~N

1

2

R407 0_0402_5%@1 2

R263 4.7K_0402_5% 12

C291

1000P_0402_50V7K~N

1

2

R413 0_0402_5%

1 2

R416 0_0402_5%

1 2

R228

47K_0402_5%

1 2

X2

32.768KHZ_12.5P_1TJS125BJ2A251

OUT 4

IN 1

NC

3

NC

2

C481

1000P_0402_50V7K~N

1

2

T56PAD

R276 4.7K_0402_5%

12

C507

0.1U_0402_16V4Z~N

@

1 2

U1

APX9132ATI-TRL_SOT23-3

GND

1

VDD 2

VOUT

3

T57PAD

R274 4.7K_0402_5% 12

C292

15P_0402_50V8J

C272

0.1U_0402_16V4Z

1

2

R417 0_0402_5%

1 2

C277

0.1U_0402_16V4Z~N

1

2

R27515_0402_5%

1 2

R265 4.7K_0402_5%

12

C493

0.1U_0402_16V4Z~N

1

2

C273 0.01U_0402_16V7K

1 2

R266 0_0402_5%

1 2

R272

10_0402_5%@

12

C270 0.1U_0402_16V4Z

12

U37

W25X80-VSSI-G_SO8

CS#

1

DO

2

WP#

3

GND

4

VCC 8

HOLD# 7

CLK 6

DIO 5

R271

10K_0402_5%

1 2

R43815_0402_5%

1 2

JBIOS1

E&T_2941-G08N-00E~D

ME@

1

122

3

344

5

566

7

788

R439 15_0402_5%

12

R232

47K_0402_5%

1 2

R304 4.7K_0402_5% 12

R231

15K_0402_5%

1 2

R408 0_0402_5%

1 2

R405

10K_0402_5%

1 2

C268

0.1U_0402_16V4Z

1

2

R42015_0402_5%

1 2

C322 4.7U_0603_6.3V

1 2

R303 4.7K_0402_5% 12

LPC & MISC

Int. K/B

Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

U29

KB926QFA1_LQFP128

GA20/GPIO00

1

KBRST#/GPIO01

2

SERIRQ#

3

LFRAME#

4

LAD3

5

PM_SLP_S3#/GPIO04

6

LAD2

7

LAD1

8

VCC 9

LAD0

10

GND

11

PCICLK

12

PCIRST#/GPIO05

13

PM_SLP_S5#/GPIO07

14

EC_SMI#/GPIO08

15

LID_SW#/GPIO0A

16

SUSP#/GPIO0B

17

PBTN_OUT#/GPIO0C

18

EC_PME#/GPIO0D

19

SCI#/GPIO0E

20

INVT_PWM/PWM1/GPIO0F 21

VCC 22

BEEP#/PWM2/GPIO10 23

GND

24

EC_THERM#/GPIO11

25

FANPWM1/GPIO12 26

ACOFF/FANPWM2/GPIO13 27

FAN_SPEED1/FANFB1/GPIO14

28

FANFB2/GPIO15

29

EC_TX/GPIO16

30

EC_RX/GPIO17

31

ON_OFF/GPIO18

32

VCC 33

PWR_LED#/GPIO19

34

GND

35

NUMLED#/GPIO1A

36

ECRST#

37

CLKRUN#/GPIO1D

38

KSO0/GPIO20

39

KSO1/GPIO21

40

KSO2/GPIO22

41

KSO3/GPIO23

42

KSO4/GPIO24

43

KSO5/GPIO25

44

KSO6/GPIO26

45

KSO7/GPIO27

46

KSO8/GPIO28

47

KSO9/GPIO29

48

KSO10/GPIO2A

49

KSO11/GPIO2B

50

KSO12/GPIO2C

51

KSO13/GPIO2D

52

KSO14/GPIO2E

53

KSO15/GPIO2F

54

KSI0/GPIO30

55

KSI1/GPIO31

56

KSI2/GPIO32

57

KSI3/GPIO33

58

KSI4/GPIO34

59

KSI5/GPIO35

60

KSI6/GPIO36

61

KSI7/GPIO37

62

BATT_TEMP/AD0/GPIO38 63

BATT_OVP/AD1/GPIO39 64

ADP_I/AD2/GPIO3A 65

AD3/GPIO3B 66

AVCC 67

DAC_BRIG/DA0/GPIO3C 68

AGND

69

EN_DFAN1/DA1/GPIO3D 70

IREF/DA2/GPIO3E 71

DA3/GPIO3F 72

CIR_RX/GPIO40 73

CIR_RLC_TX/GPIO41 74

AD4/GPIO42 75

SELIO2#/AD5/GPIO43 76

SCL1/GPIO44

77

SDA1/GPIO45

78

SCL2/GPIO46

79

SDA2/GPIO47

80

KSO16/GPIO48

81

KSO17/GPIO49

82

PSCLK1/GPIO4A 83

PSDAT1/GPIO4B 84

PSCLK2/GPIO4C 85

PSDAT2/GPIO4D 86

TP_CLK/PSCLK3/GPIO4E 87

TP_DATA/PSDAT3/GPIO4F 88

FSTCHG/SELIO#/GPIO50 89

BATT_CHGI_LED#/GPIO52 90

CAPS_LED#/GPIO53 91

BATT_LOW_LED#/GPIO54 92

SUSP_LED#/GPIO55 93

GND

94

SYSON/GPIO56 95

VCC 96

SDICS#/GPXOA00 97

SDICLK/GPXOA01 98

SDIDO/GPXOA02 99

EC_RSMRST#/GPXO03 100

EC_LID_OUT#/GPXO04 101

EC_ON/GPXO05 102

EC_SWI#/GPXO06 103

ICH_PWROK/GPXO06 104

BKOFF#/GPXO08 105

WL_OFF#/GPXO09 106

GPXO10 107

GPXO11 108

SDIDI/GPXID0 109

PM_SLP_S4#/GPXID1 110

VCC 111

ENBKL/GPXID2 112

GND

113

GPXID3 114

GPXID4 115

GPXID5 116

GPXID6 117

GPXID7 118

SPIDI/RD# 119

SPIDO/WR# 120

VR_ON/XCLK32K/GPIO57 121

XCLK1

122

XCLK0

123 V18R 124

VCC 125

SPICLK/GPIO58 126

AC_IN/GPIO59 127

SPICS# 128

R437 10K_0402_5%

12

C269

1000P_0402_50V7K~N

1

2

C482

0.1U_0402_16V4Z~N

1

2

JTPM1

ACES_88018-124L

GND1

1

IAC_SDATA_OUT

3

GND2

5

IAC_SYNC

7

IAC_SDATA_IN

9

IAC_RESET#

11

RES0 2

RES1 4

3.3V 6

GND3 8

GND4 10

IAC_BITCLK 12

GND

13

GND

14

GND

15

GND

16

GND

17

GND

18

R270

10K_0402_5%

1 2

R264 4.7K_0402_5%

12

C314

0.1U_0402_16V4Z~N

1 2

C297

15P_0402_50V8J

R262 4.7K_0402_5% 12

R256 0_0402_5%

1 2

C282

15P_0402_50V8J

@

1

2

L18

FBM-11-160808-601-T_0603

12

R308 10K_0402_5%

1 2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

PWR_ON-OFF_BTN# 51ON#

ODD_ACT_LED#

KSI[0..7]

KSI0

KSO15

KSO14

KSO13

KSO12

KSO11

KSO10

KSI1

KSI3

KSO8

KSI2

KSO9

KSI6

KSI7

KSO0

KSO5

KSO7

KSI5

KSO4

KSO6

KSO3

KSO2

KSI4

KSO1

KSO[0..15]

EC_ON

IDE_ACT_LED#

KSO0

KSI0

KSI1

KSI2

KSI3

KSI4

KSI5

KSI6

KSI7

KSO1

KSO2

KSO3

KSO4

KSO5

KSO6

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

TP_DATA

PWR_ON-OFF_BTN#

LED_WLAN#

BLUETOOTH_LED#

PWR_BLUE_LED#

TOUCHKEY_TINT

IDE_ACT_LED#

NUMLED#

SATA_LED#

TP_CLK

CAPSLED#

SCRLED#

FN_SCLK

FB_SDATA

ON_OFF 29

51ON# 43

SATA_LED#18

ODD_ACT_LED#21

TP_CLK29 TP_DATA29

EC_ON29

KSO[0..15]29

KSI[0..7]29

EC_SMB_DA24,29,35

EC_SMB_CK24,29,35

EC_FB_SDATA29

EC_FB_SCLK29

LED_WLAN#24

BLUETOOTH_LED#32

PWR_BLUE_LED#24,29 TOUCHKEY_TINT29

NUMLED#29 CAPSLED#29 SCRLED#29

+3VALW

+3VALW

+3VS

+5VS

+3VALW

+3VS

+3VS_FUN

+3VS_FUN

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

PWR_OK/BTN/TP

Custom

31 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Power Button

INT_KBD CONN.

For EMI

TP/B TO M/B

Function/B CONN.

Touch PAD/B CONN.

Compal Electronics, Inc.

For ENE

For Cypress

Adjustable Output

Regulator for ENE sensor

G

D

S

Q26

SSM3K7002FU_SC70-3

2

13

C446 100P_0402_25V8K

R622 0_0402_5%

@

1 2

D24

SM05T1G_SOT23-3~D

@

2

3

1

C235 100P_0402_25V8K

C246 100P_0402_25V8K

R291

0_0402_5%

1 2

C243 100P_0402_25V8K

C442 100P_0402_25V8K

C309100P_0402_25V8K

@

1

2

C245 100P_0402_25V8K

C441 100P_0402_25V8K

C448 100P_0402_25V8K

C445 100P_0402_25V8K

JP1

ACES_88514-0441

1

12

23

34

4G1

5G2

6

C239 100P_0402_25V8K

R606 0_0402_5%

1 2

C236 100P_0402_25V8K

C238 100P_0402_25V8K

C55

0.1U_0402_16V4Z

@

12

C447 100P_0402_25V8K

JFN1

ACES_88512-1641

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

GND

17

GND

18

R880

0_0603_5%

@1 2

C300

0.01U_0402_16V7K

1

2

C313

1000P_0402_50V7K~N

1

2

U33

MC74VHC1G08DFT2G SC70 5P

B

2

A

1Y4

P5

G

3

R901

10K_0603_1%

1 2

JKB1

ACES_88514-2601

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

GND1

27

GND2

28

C249 100P_0402_25V8K

C250

1U_0402_6.3V4Z

1

2

D15

CHN202UPT SC-70

2

3

1

R296

4.7K_0402_5%

@

1 2

C310100P_0402_25V8K

@1

2

R611 0_0402_5%

1 2

C240 100P_0402_25V8K

C286

680P_0603_50V8J

@

12

R617 0_0402_5%@

1 2

C449 100P_0402_25V8K

U54

RT9198-33PBR SOT-23 5P

VIN

1

GND

2

SHDN#

3BP 4

VOUT 5

C247 100P_0402_25V8K

D13

RLZ20A_LL34

12

C241 100P_0402_25V8K

C237 100P_0402_25V8K

C287

680P_0603_50V8J

@

12

R297

100K_0402_5%

1 2

C248 100P_0402_25V8K

R612 0_0402_5%

1 2

C242 100P_0402_25V8K

C443 100P_0402_25V8K

C324 4.7U_0603_6.3V

1 2

R618 0_0402_5%

@

1 2

C444 100P_0402_25V8K

C244 100P_0402_25V8K

USB_N0

USB_P0

USB20_N9

USB20_P9

LEC

USB_N0

USB_P0

USB20_N0

USB20_P0

USB20_P6

USB20_N6

BT_ACTIVE

BT_OFF#

USB_EN#

USB_EN#

USB_EN#

SUSP

SUSP

SUSP

USB_EN#

USB_EN

USB_OC#0 19

USB_OC#1 19

USB20_N919 USB20_P919

USB20_N619 USB20_P619

USB20_N119 USB20_P119

USB20_N219 USB20_P219

USB20_P019

USB20_N019

USB20_N319 USB20_P319

W_DISABLE#29

USB_OC#3 19

USB_OC#2 19

USB20_P719 USB20_N719

CH_CLK24 BT_OFF#

CH_DATA24

BLUETOOTH_LED#31

SUSP40,41,48

USB_EN29

+USB_AS+5VALW

+USB_BS

+5VALW

+3VS

+USB_AS

+5VS

+USB_CS

+USB_AS

+USB_BS

+USB_CS

+5VALW

+3VS

+3VS

+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

USB/BlueTooth/FP/Felcia

Custom

32 49Thursday, January 10, 2008

2007/1/15 2008/1/15

80 mils

80 mils

Fingerprint

Felica Conn

Compal Electronics, Inc.

W=80mils

Daughter board on right side

W=60mils

W=60mils

80 mils

Bluetooth

C64

0.1U_0402_16V4Z

1

2

U13

RT9711PS SO 8P

GND

1

IN

2

OC# 5

OUT 6

OUT 8

IN

3

EN#

4

OUT 7

JP3

ACES_87213-1200G

CONN@

1

12

23

34

45

56

67

78

89

910

10 11

11 12

12

GND1

13 GND2

14

R36

30K_0402_5%

12

R3 0_0402_5%

12

C315

10U_0805_10V4Z

1

2

U12

RT9711PS SO 8P

GND

1

IN

2

OC# 5

OUT 6

OUT 8

IN

3

EN#

4

OUT 7

G

D

S

Q8

SSM3K7002FU_SC70-3

2

13

D21

CM1293-04SO_SOT23-6

@

CH3 6

Vp 5

CH4 4

CH2

3

Vn

2

CH1

1

G

D

S

Q4

SSM3K7002FU_SC70-3

2

13

R1 0_0402_5%

12

+

C434

150U_B2_6.3VM_R45M

1

2

JBT1

ACES_88460-1001

9

9

10

10

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

GND

11

GND

12

JFP1

ACES_88512-0641

1

1

2

2

3

3

4

4

5

5

6

6

GND

7

GND

8

JUSBP2

ALLTO_C10797-10403-L

GND

1

D+

2

D-

3

VCC

4

GND1

5

GND2

6

GND3

7

GND4

8

T62PAD

R44 0_0402_5%

1 2

G

D

S

Q14

SSM3K7002FU_SC70-3

2

13

TP1

U14

RT9711PS SO 8P

GND

1

IN

2

OC# 5

OUT 6

OUT 8

IN

3

EN#

4

OUT 7

R38

30K_0402_5%

12

JFE1

ACES_88512-0641

1

12

23

34

45

56

6GND

7GND

8

L1 WCM2012F2S-900T04_0805@

1

122

33

4

4

D19

CM1293-04SO_SOT23-6

@

CH3 6

Vp 5

CH4 4

CH2

3

Vn

2

CH1

1

R154

100K_0402_5%

@

12

C223

0.1U_0402_16V4Z

R155

30K_0402_5%

12

R222

10K_0402_5%

1 2

C253

0.1U_0402_16V4Z

1

2

G

D

S

Q13

SSM3K7002FU_SC70-3

2

13

C228

0.1U_0402_16V4Z

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

OSC_OUT OSC_SPREAD

XTALIN

PEX_CFG3

XTALOUT

PLT_RST#

CLK_PCIE_VGA#

CLK_PCIE_VGA

G7X_ENBKL

OSC_SPREAD

OSC_OUT

VGA_HSYNC

VGA_VSYNC

DACA_RSET

DACAVREF

VGA_CRT_R

VGA_CRT_B

VGA_CRT_G

VGA_DDCDATA

VGA_DDCCLK

VGA_DAT_LCD

VGA_CLK_LCD

PCI_DEVID4

IFPAB_VPROBE

IFPCD_VPROBE

VGA_LVDDEN

VGA_CRT_R

VGA_CRT_G

THER_ALERT#

NV_INVTPWM

PCI_IOBAR

RAM_CFG3

RAM_CFG2

PCI_DEVID0

PCI_DEVID1

PCI_DEVID2

RAM_CFG1

RAM_CFG0

PCI_DEVID3

PEG_NTX_GRX_P[0..15]

PEG_NTX_GRX_N[0..15]

PEG_NRX_GTX_P[0..15]

PEG_NTX_GRX_P2

PEG_NTX_GRX_N2

PEG_NTX_GRX_N3

PEG_NTX_GRX_P3

PEG_NTX_GRX_N1

PEG_NTX_GRX_P1

PEG_NTX_GRX_P0

PEG_NTX_GRX_N0

PEG_NTX_GRX_N4

PEG_NTX_GRX_P4

PEG_NTX_GRX_P5

PEG_NTX_GRX_N5

PEG_NTX_GRX_N6

PEG_NTX_GRX_P6

PEG_NTX_GRX_P7

PEG_NTX_GRX_N7

PEG_NTX_GRX_N8

PEG_NTX_GRX_P8

PEG_NTX_GRX_P9

PEG_NTX_GRX_N9

PEG_NTX_GRX_N10

PEG_NTX_GRX_P10

PEG_NTX_GRX_N11

PEG_NTX_GRX_P11

PEG_NTX_GRX_N12

PEG_NTX_GRX_P13

PEG_NTX_GRX_N13

PEG_NTX_GRX_P12

PEG_NTX_GRX_P14

PEG_NTX_GRX_N14

PEG_NTX_GRX_P15

PEG_NTX_GRX_N15

PEG_NRX_GTX_N12

PEG_NRX_GTX_P12 PEG_NRX_C_GTX_N12

PEG_NRX_GTX_P13

PEG_NRX_GTX_N13

PEG_NRX_GTX_P9

PEG_NRX_GTX_N15

PEG_NRX_GTX_P15

PEG_NRX_GTX_N14

PEG_NRX_GTX_P14

PEG_NRX_GTX_P0

PEG_NRX_C_GTX_N13

PEG_NRX_C_GTX_P14

PEG_NRX_C_GTX_N14

PEG_NRX_C_GTX_P0

PEG_NRX_C_GTX_N0

PEG_NRX_C_GTX_N1

PEG_NRX_C_GTX_N15

PEG_NRX_C_GTX_P1

PEG_NRX_C_GTX_P2

PEG_NRX_C_GTX_P3

PEG_NRX_C_GTX_N3

PEG_NRX_GTX_P4

PEG_NRX_C_GTX_N2

PEG_NRX_GTX_N0

PEG_NRX_GTX_N6

PEG_NRX_GTX_P6

PEG_NRX_GTX_N2

PEG_NRX_GTX_P2

PEG_NRX_GTX_P3

PEG_NRX_GTX_N3

PEG_NRX_GTX_N4

PEG_NRX_C_GTX_N6

PEG_NRX_C_GTX_N4

PEG_NRX_C_GTX_P4

PEG_NRX_C_GTX_P5

PEG_NRX_C_GTX_N7

PEG_NRX_C_GTX_P8

PEG_NRX_C_GTX_N8

PEG_NRX_GTX_N10

PEG_NRX_GTX_P10

PEG_NRX_C_GTX_P9

PEG_NRX_C_GTX_N10

PEG_NRX_C_GTX_P10

PEG_NRX_C_GTX_P11

PEG_NRX_C_GTX_N11

PEG_NRX_C_GTX_P12

PEG_NRX_GTX_N7

PEG_NRX_C_GTX_P13

PEG_NRX_C_GTX_N5

PEG_NRX_GTX_N1

PEG_NRX_GTX_P1

PEG_NRX_GTX_P11

PEG_NRX_GTX_N11

PEG_NRX_C_GTX_P15

PEG_NRX_C_GTX_P6

PEG_NRX_GTX_P8

PEG_NRX_GTX_N8

PEG_NRX_GTX_P5

PEG_NRX_GTX_N5

VGA_CRT_B

VGA_DAT_LCD

VGA_CLK_LCD

PEG_NRX_C_GTX_P7PEG_NRX_GTX_P7

PEG_NRX_C_GTX_N9PEG_NRX_GTX_N9

PEG_NRX_GTX_N[0..15]

I2CB_SCL

I2CB_SDA

I2CB_SCL

I2CB_SDA

VGA_THER

PLT_RST#7,17,19,22,24,28,29

PCI_DEVID2 37

PCI_DEVID0 37

PCI_DEVID1 37

RAM_CFG2 37

RAM_CFG3 37

RAM_CFG0 37

RAM_CFG1 37

PCI_DEVID3 37

VGA_HSYNC 15

VGA_VSYNC 15

VGA_CRT_R 15

VGA_CRT_G 15

VGA_CRT_B 15

VGA_DDCDATA 15

VGA_DDCCLK 15

THER_ALERT#

PCI_DEVID4 37

PEX_CFG3 37

VGA_DAT_LCD 15

VGA_CLK_LCD 15

PEG_NTX_GRX_N[0..15]9

PEG_NTX_GRX_P[0..15]9

PEG_NRX_GTX_P[0..15]9

PEG_NRX_GTX_N[0..15]9

CLK_PCIE_VGA16 CLK_PCIE_VGA#16

VGA_LVDDEN 15

G7X_ENBKL 15

VGA_THER 29

+3VS

+3VS

+3VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

NB8M-GS Main

Custom

34 49Thursday, January 10, 2008

2006/07/10 2007/07/10

Compal Electronics, Inc.

External Spread Spectrum

BAR2_SIZE

0

1

<---LVDS

<---CRT

32Mb(Default)

16Mb

NB8M

PCI_IOBAR

0

1Enable(Default)

Disable

NB8M

If External Spread Spectrum not stuff than stuff resistor

VGA termination, close chip

For Internal Thermal

Sensor

HDMI

HDCP

R540 150_0402_1%VGA@

1 2

C611 0.1U_0402_16V7KVGA@

1 2

C586 0.1U_0402_16V7KVGA@

1 2

C593 0.1U_0402_16V7KVGA@

1 2

C609 0.1U_0402_16V7KVGA@

1 2

C597 0.01U_0402_16V7K

VGA@

1 2

C595 0.1U_0402_16V7KVGA@

1 2

R534 2K_0402_5%VGA@ 1 2

R554 22_0402_5%

VGA@

1 2

C608 0.1U_0402_16V7KVGA@

1 2

R542 10K_0402_5%VGA@12

R535 2.2K_0402_5%

@

1 2

R54910K_0402_5% VGA@ 12

C596 0.1U_0402_16V7KVGA@

1 2

C585 0.1U_0402_16V7KVGA@

1 2

C588 0.1U_0402_16V7KVGA@

1 2

C610 0.1U_0402_16V7KVGA@

1 2

R284

2.2K_0402_5% VGA@

1 2

C583 0.1U_0402_16V7K

VGA@

1 2

C612 0.1U_0402_16V7KVGA@

1 2

C616

18P_0402_50V8J

VGA@

1

2

C584 0.1U_0402_16V7K

VGA@

1 2

TP54

PAD

C592 0.1U_0402_16V7KVGA@

1 2

C605 0.1U_0402_16V7KVGA@

1 2

R537 10K_0402_5%

VGA@

12

C582 0.1U_0402_16V7KVGA@

1 2

TP55

PAD

R538 124_0603_1%

VGA@

1 2

R550

22_0402_5%

VGA@

1 2

C604 0.1U_0402_16V7KVGA@

1 2

C613 0.1U_0402_16V7KVGA@

1 2

R552

10K_0402_5%

@

12

C590 0.1U_0402_16V7KVGA@

1 2

C581 0.1U_0402_16V7KVGA@

1 2

R648 10K_0402_5%VGA@

12

C603 0.1U_0402_16V7KVGA@

1 2

R649 10K_0402_5%VGA@

12

U42

ASM3P1819N-SR_SO8

VGA@

XOUT

8

REF 5

MODOUT 4

XIN

1

VDD

7

NC 3

PD# 6

VSS

2

C617

18P_0402_50V8J

VGA@

1

2

R656 10K_0402_5%VGA@

12

C615

0.01U_0402_16V7K @

12

R553

10K_0402_5%

@

12

TP53

PAD

C618 0.1U_0402_16V4Z

VGA@

1 2

C594 0.1U_0402_16V7KVGA@

1 2

Y5

27MHZ_16PF_X7T027000BG1H-V~D

VGA@

GND

4

IN

1

OUT 3

GND 2

R142

2.2K_0402_5%

VGA@

1 2

C599 0.1U_0402_16V7KVGA@

1 2

C600 0.1U_0402_16V7KVGA@

1 2

TP56

PAD

R285

2.2K_0402_5%

VGA@

1 2

R541 150_0402_1%VGA@

1 2

C614

0.01U_0402_16V7K @

12

C607 0.1U_0402_16V7KVGA@

1 2

C601 0.1U_0402_16V7KVGA@

1 2

T52

PAD

C587 0.1U_0402_16V7KVGA@

1 2

C606 0.1U_0402_16V7KVGA@

1 2

C602 0.1U_0402_16V7KVGA@

1 2

C589 0.1U_0402_16V7KVGA@

1 2

C591 0.1U_0402_16V7KVGA@

1 2

R616

200_0402_5%@

1 2

C598 0.1U_0402_16V7KVGA@

1 2

TP52

PAD

R539 150_0402_1%VGA@

1 2

DVO / GPIO

PCI EXPRESS

TEST

CLK

Part 1 of 5

DACsI2C

U38A

G72M_BGA533 VGA@

PEX_RX0

AF1

PEX_RX0_N

AG2

PEX_RX1

AG3

PEX_RX1_N

AG4

PEX_RX2

AF4

PEX_RX2_N

AF5

PEX_RX3

AG6

PEX_RX3_N

AG7

PEX_RX4

AF7

PEX_RX4_N

AF8

PEX_RX5

AG9

PEX_RX5_N

AG10

PEX_RX6

AF10

PEX_RX6_N

AF11

PEX_RX7

AG12

PEX_RX7_N

AG13

PEX_RX8

AG15

PEX_RX8_N

AG16

PEX_RX9

AF16

PEX_RX9_N

AF17

PEX_RX10

AG18

PEX_RX10_N

AG19

PEX_RX11

AF19

PEX_RX11_N

AF20

PEX_RX12

AG21

PEX_RX12_N

AG22

PEX_RX13

AF22

PEX_RX13_N

AF23

PEX_RX14

AG24

PEX_RX14_N

AG25

PEX_RX15

AG26

PEX_RX15_N

AF27

PEX_TX0

AD5

PEX_TX0_N

AD6

PEX_TX1

AE6

PEX_TX1_N

AE7

PEX_TX2

AD7

PEX_TX2_N

AC7

PEX_TX3

AE9

PEX_TX3_N

AE10

PEX_TX4

AD10

PEX_TX4_N

AC10

PEX_TX5

AE12

PEX_TX5_N

AE13

PEX_TX6

AD13

PEX_TX6_N

AC13

PEX_TX7

AC15

PEX_TX7_N

AD15

PEX_TX8

AE15

PEX_TX8_N

AE16

PEX_TX9

AC18

PEX_TX9_N

AD18

PEX_TX10

AE18

PEX_TX10_N

AE19

PEX_TX11

AC21

PEX_TX11_N

AD21

PEX_TX12

AE21

PEX_TX12_N

AE22

PEX_TX13

AD22

PEX_TX13_N

AD23

PEX_TX14

AF25

PEX_TX14_N

AE25

PEX_TX15

AE24

PEX_TX15_N

AD24

PEX_REFCLK

AE3

PEX_REFCLK_N

AE4

PEX_RST_N

AC6

XTALIN

B1

XTALOUT

C2

XTALOUTBUFF

C3

XTALSSIN

C1

GPIO0 A9

GPIO1 D9

GPIO2 A10

GPIO3 B10

GPIO4 C10

GPIO5 C12

GPIO6 B12

GPIO7 A12

GPIO8 A13

GPIO9 B13

GPIO10 B15

GPIO11 A15

GPIO12 B16

MIOBD0 G2

MIOBD1 G3

MIOBD2 J2

MIOBD3 J1

MIOBD4 K4

MIOBD5 K1

MIOBD6 M2

MIOBD7 M1

MIOBD8 N1

MIOBD9 N2

MIOBD10 N3

MIOBD11 R3

MIOB_HSYNC G4

MIOB_VSYNC F1

MIOB_DE G1

MIOB_CTL3 F2

MIOB_CLKIN R2

MIOB_CLKOUT K2

MIOB_CLKOUT_N K3

MIOB_VREF J4

DACA_HSYNC AD4

DACA_VSYNC AC4

DACA_RED AE1

DACA_BLUE AD2

DACA_GREEN AD1

DACA_IDUMP U9

DACA_RSET AD3

DACA_VREF AB4

DACB_RED F4

DACB_BLUE D5

DACB_GREEN E4

DACB_IDUMP L9

DACB_RSET D6

DACB_VREF E7

I2CA_SCL D10

I2CA_SDA E10

I2CB_SCL F9

I2CB_SDA F10

I2CC_SCL E9

I2CC_SDA D8

I2CH_SCL C7

I2CH_SDA B7

IFPAB_VPROBE N6

IFPCD_VPROBE M5

JTAG_TCK AE27

JTAG_TDI AD27

JTAG_TDO AE26

JTAG_TMS AD26

JTAG_TRST_N AD25

TESTMODE D7

PEX_TSTCLK_OUT AF13

PEX_TSTCLK_OUT_N AF14

DACB_HSYNC E6

DACB_VSYNC F5

R273

2.2K_0402_5%

VGA@

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FBA_RST

EC_SMB_CK2

VGA_LVDSA1+

VGA_LVDSA1-

VGA_LVDSA0+

VGA_LVDSA2-

VGA_LVDSA2+

VGA_LVDSA0-

SUB_VENDOR

PEX_PLL_TERM

PEX_CFG0

PEX_CFG1

SLOT_CLOCK_CFG

FBADQS#[0..7]

FBADQM#[0..7]

FBADQS[0..7]

FBAA[0..11]

FBAD[0..63]

FBBA[2..5]

VGA_LVDSAC-

VGA_LVDSAC+

FBADQS6

FBADQM#7

FBAD48

FBAD34

FBAD28

FBAD7

FBAA7

FBAA8

FBBA5

FBAD61

FBAD37

FBAD22

FBAD14

FBAD5

FBAD43

FBAD40

FBAD29

FBAD15

FBADQS#1

FBADQM#4

FBADQM#3

FBAA6

FBAD32

FBAD18

FBAD17

FBADQS#2

FBAD47

FBAD9

FB_VREF1

FBADQS#6

FBA_RST_R

FBAD62

FBAD58

FBAD36

FBAD25

FBAD20

FBAD13

FBADQS0

FBAA4

FBAWE#

FBBA3

FBAD54

FBAD38

FBAD30

FBAD4

FBADQM#1

FBAA9

FBA_BA2

FBAD31

FBADQS#7

FBAD52

FBAD46

FBAD24

FBAD8

FBADQS3

FBADQS#4

FBADQS#0

FBAA11

FBAD57

FBAD50

FBAD39

FBAD35

FBAD27

FBAD12

FBADQS7

FBADQS4

FBADQS2

FBAA2

FBAA3

FBAD60

FBAD53

FBAD3

FBAD1

FBAD0

FBA_DEBUG

FBAA10

FBBA2

FBACS0#

FBAD45

FBAD10

FBADQS#5

FBA_BA1

FBAD55

FBAD51

FBAD42

FBAD23

FBADQS5

FBADQS1

FBADQS#3

FBADQM#6

FBADQM#0

FBAA5

FBAD56

FBAD49

FBAD26

FBARAS#

FBA_CKE

FBBA4

FBAA0

FBAD63

FBAD59

FBAD21

FBAD2

FBACAS#

FBAD44

FBAD16

FBADQM#5

FBADQM#2

FBA_BA0

FBAA1

FBAD41

FBAD33

FBAD19

FBAD11

FBAD6

FBA_RST EC_SMB_DA2

PEX_CFG2

CMD14

FBAD[0..63] 38

FBBA[2..5] 38

FBADQS[0..7] 38

FBADQM#[0..7] 38

FBAA[0..11] 38

FBAWE# 38

FBA_CKE 38

FBARAS# 38

FBACLK0 38

FBACLK0# 38

FBACLK1 38

FBACLK1# 38

FBADQS#[0..7] 38

FBA_RST 38

VGA_LVDSA0-15 VGA_LVDSA0+15

VGA_LVDSA1-15 VGA_LVDSA1+15

VGA_LVDSA2-15 VGA_LVDSA2+15

VGA_LVDSAC-15 VGA_LVDSAC+15 PEX_PLL_TERM 37

PEX_CFG1 37

PEX_CFG0 37FBA_BA2 38

FBA_BA0 38

FBACAS# 38

FBA_BA1 38

FBACS0# 38

SUB_VENDOR 37

PEX_CFG2 37

EC_SMB_DA2 4,29,31

EC_SMB_CK2 4,29,31

+1.8VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

NB8M-GS Memory

Custom

35 49Thursday, January 10, 2008

2006/07/10 2007/07/10

Compal Electronics, Inc.

FB_VREF1=0.5 x FBVDD

15mil

SHARE REFERENCE CLOCKSLOT_CLOCK_CFG

0

1Enable(Default)

Disable

HDMI

Part 3 of 5

LVDS/TMDS

NC

GENERAL

SERIAL

U38C

G72M_BGA533 VGA@

IFPA_TXC_N

U4 IFPA_TXC

T4 MIO_A_D0 A2

MIO_A_D2 A3

MIO_A_D4 A4

MIO_A_D1 B3

MIO_A_D5 B4

MIO_A_D6 B6

MIO_A_HSYNC C4

MIO_A_D8 C6

GPIO13 C13

MIO_A_D3 D4

NC_2 D12

GPIO14 E12

MIO_A_VDDQ_0 F6

I2CS_SCL F12

MIO_A_D9 G5

MIO_A_VDDQ_1 G6

MIO_A_VDDQ_2 J6

MIO_A_D7 P4

MIO_A_D10 V4

IFPA_TXD0

N4

IFPA_TXD0_N

N5

IFPA_TXD1

R5

IFPA_TXD1_N

R4

IFPA_TXD2

T5

IFPA_TXD2_N

T6

IFPA_TXD3

R6

IFPA_TXD3_N

P6

IFPB_TXC

W5

IFPB_TXC_N

W6

IFPB_TXD4

W3

IFPB_TXD4_N

W2

IFPB_TXD5

AA2

IFPB_TXD5_N

AA3

IFPB_TXD6

AB1

IFPB_TXD6_N

AA1

IFPB_TXD7

AB3

IFPB_TXD7_N

AB2

IFPAB_RSET

U6

IFPC_TXC

V1

IFPC_TXC_N

W1

IFPC_TXD0

T1

IFPC_TXD0_N

R1

IFPC_TXD1

T3

IFPC_TXD1_N

T2

IFPC_TXD2

V2

IFPC_TXD2_N

V3

IFPCD_RSET

J3

BUFRST_N A6

STEREO F7

SWAPRDY A7

THERMDN C9

THERMDP B9

ROM_SCLK D2

ROM_SI F3

ROM_SO D3

ROMCS_N D1

I2CS_SDA F11

R567

1K_0402_1%

@

12

MEMORY INTERFACE

Part 2 of 5

U38B

G72M_BGA533 VGA@

FBAD0

A26

FBAD1

C24

FBAD2

B24

FBAD3

A24

FBAD4

C22

FBAD5

A25

FBAD6

B25

FBAD7

D23

FBAD8

G22

FBAD9

J23

FBAD10

E24

FBAD11

F23

FBAD12

J24

FBAD13

F24

FBAD14

G23

FBAD15

H24

FBAD16

D16

FBAD17

E16

FBAD18

D17

FBAD19

F18

FBAD20

E19

FBAD21

E18

FBAD22

D20

FBAD23

D19

FBAD24

A18

FBAD25

B18

FBAD26

A19

FBAD27

B19

FBAD28

D18

FBAD29

C19

FBAD30

C16

FBAD31

C18

FBAD32

N26

FBAD33

N25

FBAD34

R25

FBAD35

R26

FBAD36

R27

FBAD37

T25

FBAD38

T27

FBAD39

T26

FBAD40

AB23

FBAD41

Y24

FBAD42

AB24

FBAD43

AB22

FBAD44

AC24

FBAD45

AC22

FBAD46

AA23

FBAD47

AA22

FBAD48

T24

FBAD49

T23

FBAD50

R24

FBAD51

R23

FBAD52

R22

FBAD53

T22

FBAD54

N23

FBAD55

P24

FBAD56

AA24

FBAD57

AA27

FBAD58

AA26

FBAD59

AB25

FBAD60

AB26

FBAD61

AB27

FBAD62

AA25

FBAD63

W25

FBA_CMD0 G27

FBA_CMD1 D25

FBA_CMD2 F26

FBA_CMD3 F25

FBA_CMD4 G25

FBA_CMD5 J25

FBA_CMD6 J27

FBA_CMD7 M26

FBA_CMD8 C27

FBA_CMD9 C25

FBA_CMD10 D24

FBA_CMD11 N27

FBA_CMD12 G24

FBA_CMD13 J26

FBA_CMD14 M27

FBA_CMD15 C26

FBA_CMD16 M25

FBA_CMD17 D26

FBA_CMD18 D27

FBA_CMD19 K26

FBA_CMD20 K25

FBA_CMD21 K24

FBA_CMD22 F27

FBA_CMD23 K27

FBA_CMD24 G26

FBA_CMD25 B27

FBA_CMD26 N24

FBADQM0 D21

FBADQM1 F22

FBADQM2 F20

FBADQM3 A21

FBADQM4 V27

FBADQM5 W22

FBADQM6 V22

FBADQM7 V24

FBADQS_RN0 A22

FBADQS_RN1 E22

FBADQS_RN2 F21

FBADQS_RN3 B21

FBADQS_RN4 V26

FBADQS_RN5 W23

FBADQS_RN6 V23

FBADQS_RN7 W27

FBADQS_WP0 B22

FBADQS_WP1 D22

FBADQS_WP2 E21

FBADQS_WP3 C21

FBADQS_WP4 V25

FBADQS_WP5 W24

FBADQS_WP6 U24

FBADQS_WP7 W26

FB_VREF A16

FBA_CLK0 L24

FBA_CLK0_N K23

FBA_CLK1 M22

FBA_CLK1_N N22

FBA_CMD27 M23

NC M24

FBA_DEBUG K22

R560 0_0402_5%VGA@

1 2

R572 10K_0402_5%VGA@ 1 2

C621

0.1U_0402_16V4Z

VGA@

1

2

R565 1K_0402_5%@

1 2

C622

0.1U_0402_16V4Z

@

1

2

R571

10K_0402_5%

VGA@

12

R564 1K_0402_5%@

1 2

R568

0_0402_5%

@

1 2

R561 2K_0402_5%VGA@

1 2

R562

10K_0402_5%

VGA@

12

T54

PAD

R566

1K_0402_1%

@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+NV_PLLVDD

+PLLVDD

+FBA_PLLAVDD

+DACA_VDD

+DACA_VDD

+PLLVDD

+H_PLLVDD

+FBA_PLLAVDD

+PEX_PLLAVDD

+PEX_PLLAVDD

+PEX_PLLDVDD

+IFPAB_PLLVDD

+IFPA_IOVDD

+IFPAB_PLLVDD

+NV_PLLVDD

+PEX_PLLDVDD

+PEX_PLLAVDD_L

+H_PLLVDD

+IFPA_IOVDD

+VGA_CORE

+3VS

+3VS

+3VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.2VS

+1.2VS

+1.2VS

+1.2VS

+1.2VS

+1.8VS

+VGA_CORE

+VGA_CORE

+3VS

+VGA_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

NB8M-GS Power

Custom

36 49Thursday, January 10, 2008

2006/07/10 2007/07/10

Compal Electronics, Inc.

30mA

40mA

1400mA

40mA

8mA

Average to place around +VGA_CORE

plane.

L39

MBK1608121YZF_0603

VGA@

1 2

C635

0.1U_0402_16V4Z

VGA@

1

2

R116

10K_0402_5%VGA@

1 2

C688

4700P_0402_25V7K

VGA@

1

2

C626

0.1U_0402_16V4Z

VGA@

1

2

C657

0.47U_0402_6.3V6K

VGA@

1

2

C667

0.1U_0402_16V4Z

VGA@

1

2

C630

0.1U_0402_16V4Z

VGA@

1

2

C673

4.7U_0603_6.3V

VGA@

1

2

C681

4700P_0402_25V7K

VGA@

1

2

C693

0.1U_0402_16V4Z

VGA@

1

2

C628

0.1U_0402_16V4Z

VGA@

1

2

C664

0.1U_0402_16V4Z

VGA@

1

2

Part 4 of 5

POWER

U38D

G72M_BGA533 VGA@

VDD_27

T16

VDD_28

T17

VDD_29

U12

VDD_30

U13

VDD_31

U15

VDD_32

U16

VDD_33

W13

VDD_34

W15

VDD_35

W16

VDD_17

N17 VDD_16

N11 VDD_15

N9 VDD_14

M17 VDD_13

M16 VDD_12

M15

VDD_26

T15

VDD_6

L16

VDD_10

M13

VDD_5

L15 VDD_4

L13 VDD_3

L12 VDD_2

J11 VDD_1

J10 VDD_0

J9

VDD_11

M14

VDD_18

R9

VDD_19

R11

VDD_20

R17

VDD_21

T9

VDD_22

T11

VDD_23

T12

VDD_24

T13

VDD_25

T14

VDD_9

M12

PEX_IOVDD_0 W17

PEX_IOVDD_1 W18

PEX_IOVDD_2 AB10

PEX_IOVDD_3 AB11

PEX_IOVDD_4 AB14

VDD_7

M9

VDD_8

M11

PEX_IOVDD_5 AB15

VDD_LP_0

W9

VDD_LP_1

W10

VDD33_0

F13

VDD33_1

F14

VDD33_2

J12

VDD33_3

J13

VDD33_4

J15

VDD33_5

J16 PLLVDD H4

FBA_PLLAVDD D13

H_PLLVDD D14

FBCAL_PD_VDDQ D15

FBVTT_0

E15

FBVTT_1

F15

FBVTT_2

F16

FBVTT_3

J17

FBVTT_4

J18

FBVTT_5

L19

FBVTT_6

N19

FBVTT_7

R19

FBVTT_8

U19

FBVTT_9

W19

PEX_IOVDDQ_0 AA4

PEX_IOVDDQ_1 AB5

PEX_IOVDDQ_2 AB6

PEX_IOVDDQ_3 AB7

PEX_IOVDDQ_4 AB8

PEX_IOVDDQ_5 AB9

PEX_IOVDDQ_6 AB12

PEX_IOVDDQ_7 AB13

PEX_IOVDDQ_8 AB16

PEX_IOVDDQ_9 AB17

PEX_IOVDDQ_10 AB18

PEX_PLLAVDD Y6

PEX_PLLDVDD AA5

MIOB_VDDQ_0 K5

MIOB_VDDQ_1 K6

MIOB_VDDQ_2 L6

MIOBCAL_PD_VDDQ J5

IFPA_IOVDD W4

IFPB_IOVDD Y4

IFPC_IOVDD L4

IFPAB_PLLVDD V5

IFPCD_PLLVDD M4

DACA_VDD AE2

DACB_VDD F8

FBVDDQ_0 F17

FBVDDQ_1 F19

FBVDDQ_2 J19

FBVDDQ_3 J22

FBVDDQ_4 L22

FBVDDQ_5 M19

FBVDDQ_6 P22

FBVDDQ_7 T19

FBVDDQ_8 U22

FBVDDQ_9 Y22

NC

D11

VDD_LP_3

W12 VDD_LP_2

W11

PEX_IOVDD_6 AB20

PEX_IOVDD_7 AB21

PEX_IOVDDQ_11 AB19

PEX_IOVDDQ_12 AC9

PEX_IOVDDQ_13 AC11

PEX_IOVDDQ_14 AC12

PEX_IOVDDQ_15 AC16

PEX_IOVDDQ_16 AC17

PEX_IOVDDQ_17 AC19

PEX_IOVDDQ_18 AC20

C658

0.47U_0402_6.3V6K

VGA@

1

2

C652

0.47U_0402_6.3V6K

VGA@

1

2

C659

0.47U_0402_6.3V6K

VGA@

1

2

C624

0.1U_0402_16V4Z

VGA@

1

2

C651

0.47U_0402_6.3V6K

VGA@

1

2

C670

0.022U_0402_16V7K

VGA@

1

2

L40

MBK1608121YZF_0603

VGA@

1 2

C642

1U_0402_6.3V4K

VGA@

1

2

C631

1U_0402_6.3V4K

VGA@

1

2

L37

MBK1608121YZF_0603

VGA@

1 2

C699

0.1U_0402_16V4Z

VGA@

1

2L48

MBK1608121YZF_0603

VGA@

12

C680

470P_0402_50V7K

VGA@

1

2

R573

45.3_0402_1%~DVGA@ 1 2

C627

0.1U_0402_16V4Z

VGA@

1

2

C695

4.7U_0603_6.3V

VGA@

1

2

C660

1U_0805_10V7K

VGA@

1

2

C691

4700P_0402_25V7K

VGA@

1

2

C636

0.1U_0402_16V4Z

VGA@

1

2

C640

0.1U_0402_16V4Z

VGA@

1

2

C643

1U_0402_6.3V4K

VGA@

1

2

C654

0.1U_0402_16V4Z

VGA@

1

2

C701

470P_0402_50V7K

VGA@

1

2

C632

1U_0402_6.3V4K

VGA@

1

2

L47

MBK1608121YZF_0603

VGA@

12

C647

4.7U_0603_6.3V

VGA@

1

2

C625

0.1U_0402_16V4Z

VGA@

1

2

C655

4.7U_0805_10V4Z

VGA@

1

2

C702

4.7U_0805_10V4Z

VGA@

1

2C692

4.7U_0603_6.3V

VGA@

1

2

C672

4700P_0402_25V7K

VGA@

1

2

R292 10K_0402_5%

VGA@

12

C650

0.47U_0402_6.3V6K

VGA@

1

2

R574

0_0603_5%

VGA@

1 2

C694

4700P_0402_25V7K

VGA@

1

2

C629

0.1U_0402_16V4Z

VGA@

1

2

C689

4.7U_0603_6.3V

VGA@

1

2

C649

0.47U_0402_6.3V6K

VGA@

1

2

C656

1U_0805_10V7K VGA@

1

2

L43

MBK1608121YZF_0603

VGA@

12

C646

4.7U_0603_6.3V

VGA@

1

2

C662

0.1U_0402_16V4Z

VGA@

1

2

C687

470P_0402_50V7K

VGA@

1

2

C704

2.2U_0603_6.3V6K

VGA@

1

2

R113

10K_0402_5%

VGA@

1 2

C653

0.01U_0402_16V7K

VGA@

1

2

C666

1U_0603_10V4Z

VGA@

1

2

C623

1U_0805_10V7K

VGA@

1

2

C641

0.1U_0402_16V4Z

VGA@

1

2

C676

1U_0402_6.3V4Z

VGA@

1

2

C663

0.01U_0402_16V7K

VGA@

1

2

C675

4700P_0402_25V7K

VGA@

1

2

L42

MBK1608121YZF_0603

VGA@

12

C678

1U_0402_6.3V4Z

VGA@

1

2

C679

22U_0805_6.3V4Z

VGA@

1

2

C671

470P_0402_50V7K

VGA@

1

2

C690

470P_0402_50V7K

VGA@

1

2

C669

0.47U_0402_6.3V6K

VGA@

1

2

C674

4700P_0402_25V7K

VGA@

1

2

C677

4700P_0402_25V7K

VGA@

1

2

C703

4700P_0402_25V7K

VGA@

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_DEVID0

PCI_DEVID2

PCI_DEVID1

RAM_CFG3

PEX_CFG1

PEX_CFG0

RAM_CFG1

RAM_CFG2

RAM_CFG0

PEX_PLL_TERM

PEX_CFG2

PEX_CFG3

PCI_DEVID4

SUB_VENDOR

PCI_DEVID3

RAM_CFG034 RAM_CFG134 RAM_CFG234 RAM_CFG334 PCI_DEVID034 PCI_DEVID134 PCI_DEVID234 PCI_DEVID334

PEX_CFG035 PEX_CFG135

PEX_PLL_TERM35

PEX_CFG235

PCI_DEVID434

PEX_CFG334

SUB_VENDOR35

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

NB8M-GS GND & STRAP

Custom

37 49Thursday, January 10, 2008

2006/07/10 2007/07/10

Compal Electronics, Inc.

G73M-xxxx8

VBIOS on card (pull high) 0

VBIOS with system BIOS (pull down)

RAM_CFG[3:0]

PEX_PLL_TERM MIO_A_D0

Value

STRAPS PIN DESCRIPTION

PEX_CFG[3:0]

MIOAD

[9,8,6]

SUB_VENDOR

0001

0

MIO_A_D1

G72MV-0x01D7

0111

TBD/TBD

VIPD[5:3]PCI_DEVID[3:0] G72M-0x01D8

MIOA_HSYNC

0111

Value

R17

R12HALF

FULL 32M

R16

R11

16M

RAM TypeBandwidth

R20, R19

Infineon

Hynix

Samsung

Vendor

R18, R21

R18, R19

NB8M-GS : 0X0427

Infineon GDDR2(400): SA00000S800 (HYB18T256161AFL-25)

Samsung GDDR2 (400): SA00000FG10 (K4N56163QF-ZC25)

Infineon GDDR2(350): SA00000T700 (HYB18T256161AF-28)

Samsung GDDR2 (350): SA00000TB00 (K4N56163QF-ZC2A)

Hynix GDDR2 (400): SA00000FF10 (HY5PS561621AFP-25) Hynix GDDR2 (350): SA00000TJ00 (HY5PS561621AFP-28)

(10*12.5)

(11*13)

(8*13)

SUB_VENDOR

0

1BIOS ROM is present(Default)

N0 VIDEO BIOS ROM

Package

NB8M-SE : 0X0428

1000

Recommended for G8x

0001 ---> Qimonda 16Mx32

0010 ---> Hynix 16Mx32

0011 ---> Samsung 16Mx32

MIOAD0

MIOAD1

MIOAD8

MIOAD9

0011

PCI-E PLL termination

0---->Enable (Default)

1---->Disable

MIOBD_HSYNC

R578

10K_0402_5%

VGA@

12

R582

2K_0402_5%

VGA@

12

R588

2K_0402_5%

@

12

R575 2K_0402_5%

VGA@

1 2

R589

2K_0402_5%

@

12

R590

2K_0402_5%

@

12

GND

Part 5 of 5

U38E

G72M_BGA533

VGA@

GND_0

B2

GND_1

B5

GND_2

B8

GND_3

B11

GND_4

B14

GND_5

B17

GND_6

B20

GND_7

B23

GND_8

B26

GND_9

E2

GND_10

E5

GND_11

E8

GND_12

E11

GND_13

E14

GND_14

E17

GND_15

E20

GND_16

E23

GND_17

E26

GND_19

H2

GND_20

H6

GND_21

H23

GND_22

H26

GND_23

J14

GND_24

K9

GND_25

K19

GND_26

L2

GND_27

L5

GND_28

L11

GND_29

L14

GND_30

L17

GND_31

L23

GND_32

L26

GND_33

N12

GND_34

N13

GND_35

N14

GND_36

N15

GND_37

N16

GND_38

P2

GND_39

P5

GND_40

P9

GND_41

P11

GND_42

P12

GND_43

P13

GND_44

P14

GND_45

P15

GND_46

P16

GND_47

P17

GND_48

P19

GND_49

P23

GND_50

P26

GND_51

R12

GND_52

R13

GND_53

R14

GND_54

R15

GND_55

R16

GND_56

U2

GND_57

U5

GND_58

U11

GND_59

U14

FBCAL_PU_GND E13

FBCAL_TERM_GND H22

FBA_PLLGND C15

PLLGND H5

PEX_PLLGND AA6

MIOBCAL_PU_GND M3

IFPAB_PLLGND V6

IFPCD_PLLGND M6

GND_85 AF2

GND_86 AF3

GND_87 AF6

GND_88 AF9

GND_89 AF12

GND_90 AF15

GND_91 AF18

GND_92 AF21

GND_93 AF24

GND_94 AF26

GND_60 U17

GND_61 U23

GND_62 U26

GND_63 V9

GND_64 V19

GND_65 W14

GND_66 Y2

GND_67 Y5

GND_68 Y23

GND_69 Y26

GND_70 AC2

GND_71 AC8

GND_72 AC14

GND_73 AC23

GND_74 AC26

GND_75 AD8

GND_76 AD9

GND_77 AD11

GND_78 AD12

GND_79 AD14

GND_80 AD16

GND_81 AD17

GND_82 AD19

GND_83 AD20

GND_84 AC5

R586

2K_0402_5%

VGA@

12

R587

2K_0402_5%

@

12

R576

24.9_0402_1%

VGA@1 2

R605 40.2_0402_1%

VGA@ 12

R594

10K_0402_5%

VGA@

12

R581

2K_0402_5%

VGA@

12

R592

10K_0402_5%

@

12

R577

10K_0402_5%

VGA@

12

R585

2K_0402_5%

@

12

R584

2K_0402_5%

@

12

T53

PAD

R591

10K_0402_5%

@

12

R583

2K_0402_5%

VGA@

12

R579

10K_0402_5%

@

12

R580

10K_0402_5%

@

12

R593

10K_0402_5%

VGA@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FBAD[0..63]

FBADQS#[0..7]

DQMA#[0..7]

FBADQS[0..7]

FBACS0#

FBA_CKE

FBACLK0#

FBAWE#

FBARAS#

+VREFA0

+VREFA1

+VREFA1

+VREFA0

FBACLK0

FBAA0

FBAA4

FBA_BA0

FBAA5

FBAA1

FBAA8

FBAA6

FBAA9

FBAA10

FBAA7

FBAA11

FBAA2

FBA_BA1

FBAA3

FBA_BA2

FBAA[0..11]

FBADQM#1

FBADQS1

FBADQS#0

FBADQS0

FBADQM#0

FBADQM#2

FBADQS#2

FBADQS3

FBADQS2

FBADQS#3

FBADQS#1

FBBA[2..5]

FBACAS# FBARAS#

FBADQS6

FBAA9

FBA_BA2

FBADQS7

FBA_BA0

FBBA3

FBA_CKE

FBAA7

FBAWE#

+VREFA3

+VREFA2

FBADQM#6

FBADQS#5

FBADQM#7

FBAA6

FBAA1

FBAA0

FBADQM#4

FBA_BA1

FBAA10

FBADQS#4

FBACS0#

FBBA2

FBACAS#

FBADQM#5

FBAA8

FBADQS#7

FBADQS#6

FBADQS5

FBAA11

FBBA5

FBBA4

FBADQS4

FBACLK1

FBAD16

FBAD18

FBAD17

FBAD19

FBAD20

FBAD21

FBAD22

FBAD23

FBAD42

FBAD40

FBAD41

FBAD43

FBAD46

FBAD44

FBAD47

FBAD45

FBAD27

FBAD25

FBAD24

FBAD26

FBAD31

FBAD28

FBAD30

FBAD29

FBAD2

FBAD3

FBAD7

FBAD1

FBAD6

FBAD4

FBAD5

FBAD0

FBAD34

FBAD32

FBAD39

FBAD36

FBAD35

FBAD38

FBAD37

FBAD33

FBAD56

FBAD58

FBAD62

FBAD61

FBAD57

FBAD59

FBAD63

FBAD60

FBAD9

FBAD10

FBAD12

FBAD11

FBAD14

FBAD8

FBAD13

FBAD15

FBAD51

FBAD49

FBAD55

FBAD53

FBAD52

FBAD48

FBAD54

FBAD50

FBACLK1#

FBA_RST

FBADQM#3

FBA_BA1

FBA_BA0

FBA_BA2

+VREFA2

+VREFA3

FBA_RST

FBACLK0

FBACLK0#

FBACLK1

FBACLK1#

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

FBAD[0..63]35

FBADQS#[0..7]35

FBADQS[0..7]35

FBADQM#[0..7]35

FBAA[0..11]35

FBBA[2..5]35

FBA_RST35

FBARAS#35 FBACAS#35 FBAWE#35 FBACS0#35

FBA_CKE35

FBA_BA035

FBA_BA135

FBA_BA235

FBACLK0#35

FBACLK035

FBACLK135

FBACLK1#35

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Compal Electronics, Inc.

LA-4231P

0.1

VRAM GDDR3 A

38 49

Thursday, January 10, 2008

2007/02/12 2008/02/12

GDDR3 BGA MEMORY GDDR3 BGA MEMORY

R908

1.05K_0402_1%

VGA@

12

C899

0.1U_0402_16V4Z

VGA@

1

2

C909

0.1U_0402_16V4Z

VGA@

1

2

C898

0.1U_0402_16V4Z

VGA@

1

2

C906

0.01U_0402_16V7K

VGA@

1

2

C914

10U_0805_10V4Z

VGA@

1

2

U51

K4J52324QE-BC14_FBGA136~D

VGA@

DQ0 B2

DQ1 B3

DQ2 C2

DQ3 C3

DQ4 E2

DQ5 F3

DQ6 F2

DQ7 G3

DQ8 B11

DQ9 B10

DQ10 C11

DQ11 C10

DQ12 E11

DQ13 F10

DQ14 F11

DQ15 G10

DQ16 M11

DQ17 L10

DQ18 N11

DQ19 M10

DQ20 R11

DQ21 R10

DQ22 T11

DQ23 T10

DQ24 M2

DQ25 L3

DQ26 N2

DQ27 M3

DQ28 R2

DQ29 R3

DQ30 T2

DQ31 T3

A0

K4

A1

H2

A2

K3

A3

M4

A4

K9

A5

H11

A6

K10

A7

L9

A8/AP

K11

A9

M9

A10

K2

A11

L4

BA0

G4

BA1

G9

DM0

E3

DM1

E10

DM2

N10

DM3

N3

WDQS0

D2

WDQS1

D11

WDQS2

P11

WDQS3

P2

VREF

H1

VREF

H12

RFU1

J2

RFU2

J3

RAS#

H3

CAS#

F4

WE#

H9

CS#

F9

CKE

H4

CK

J11

CK#

J10

VDDQ R1

VDDQ R4

VDDQ R9

VDDQ R12

VDDQ V1

VDDQ V12

VDD

A2

VDD

A11

VDDQ A1

VDDQ A12

VDDQ C1

VDDQ C4

VDDQ C9

VDDQ C12

VDDQ E1

VDDQ E4

VDDQ E9

VDDQ E12

VDDQ J4

VDDQ J9

VDDQ N1

VDDQ N4

VDDQ N9

VDDQ N12

VSSQ B1

VSSQ B4

VSSQ B9

VSSQ B12

VSSQ D1

VSSQ D4

VSSQ D9

VSSQ D12

VSSQ G2

VSSQ G11

VSSQ L2

VSSQ L11

VSSQ P1

VSSQ P4

VSSQ P9

VSSQ P12

VSSQ T1

VSSQ T4

VSSQ T9

VSSQ T12

VSS

A3

VSS

A10

VSS

G1

VSS

G12

VSS

L1

VSS

L12

VSS

V3

VSS

V10

VDD

F1

VDD

F12

VDD

M1

VDD

M12

VDD

V2

VDD

V11

ZQ

A4

MF

A9

RDQS0

D3

RDQS1

D10

RDQS2

P10

RDQS3

P3

VSSA

J1

VSSA

J12

VDDA K1

VDDA K12

SEN

V4

RESET

V9

BA2

H10

C892

0.1U_0402_16V4Z

VGA@

1

2

R920 243_0402_1%

VGA@

1 2

C889

0.1U_0402_16V4Z

VGA@

1

2

C911

0.1U_0402_16V4Z

VGA@

1

2

C912

1U_0402_6.3V4Z

VGA@

1

2

C907

0.01U_0402_16V7K

VGA@

1

2

C902

1U_0402_6.3V4Z

VGA@

1

2

U52

K4J52324QE-BC14_FBGA136~D

VGA@

DQ0 B2

DQ1 B3

DQ2 C2

DQ3 C3

DQ4 E2

DQ5 F3

DQ6 F2

DQ7 G3

DQ8 B11

DQ9 B10

DQ10 C11

DQ11 C10

DQ12 E11

DQ13 F10

DQ14 F11

DQ15 G10

DQ16 M11

DQ17 L10

DQ18 N11

DQ19 M10

DQ20 R11

DQ21 R10

DQ22 T11

DQ23 T10

DQ24 M2

DQ25 L3

DQ26 N2

DQ27 M3

DQ28 R2

DQ29 R3

DQ30 T2

DQ31 T3

A0

K4

A1

H2

A2

K3

A3

M4

A4

K9

A5

H11

A6

K10

A7

L9

A8/AP

K11

A9

M9

A10

K2

A11

L4

BA0

G4

BA1

G9

DM0

E3

DM1

E10

DM2

N10

DM3

N3

WDQS0

D2

WDQS1

D11

WDQS2

P11

WDQS3

P2

VREF

H1

VREF

H12

RFU1

J2

RFU2

J3

RAS#

H3

CAS#

F4

WE#

H9

CS#

F9

CKE

H4

CK

J11

CK#

J10

VDDQ R1

VDDQ R4

VDDQ R9

VDDQ R12

VDDQ V1

VDDQ V12

VDD

A2

VDD

A11

VDDQ A1

VDDQ A12

VDDQ C1

VDDQ C4

VDDQ C9

VDDQ C12

VDDQ E1

VDDQ E4

VDDQ E9

VDDQ E12

VDDQ J4

VDDQ J9

VDDQ N1

VDDQ N4

VDDQ N9

VDDQ N12

VSSQ B1

VSSQ B4

VSSQ B9

VSSQ B12

VSSQ D1

VSSQ D4

VSSQ D9

VSSQ D12

VSSQ G2

VSSQ G11

VSSQ L2

VSSQ L11

VSSQ P1

VSSQ P4

VSSQ P9

VSSQ P12

VSSQ T1

VSSQ T4

VSSQ T9

VSSQ T12

VSS

A3

VSS

A10

VSS

G1

VSS

G12

VSS

L1

VSS

L12

VSS

V3

VSS

V10

VDD

F1

VDD

F12

VDD

M1

VDD

M12

VDD

V2

VDD

V11

ZQ

A4

MF

A9

RDQS0

D3

RDQS1

D10

RDQS2

P10

RDQS3

P3

VSSA

J1

VSSA

J12

VDDA K1

VDDA K12

SEN

V4

RESET

V9

BA2

H10

C897

0.1U_0402_16V4Z

VGA@

1

2

C910

0.1U_0402_16V4Z

VGA@

1

2

R912

2.49K_0402_1%

VGA@

12

C903

10U_0805_10V4Z

VGA@

1

2

C905

1000P_0402_50V7K

VGA@

1

2

C895

0.01U_0402_16V7K

VGA@

1

2

C900

0.1U_0402_16V4Z

VGA@

1

2

C891

0.1U_0402_16V4Z

VGA@

1

2

R919 243_0402_1%

VGA@

1 2

C887

0.01U_0402_16V7K

VGA@

1

2

C908

0.1U_0402_16V4Z

VGA@

1

2

C904

22U_0805_6.3V6M

VGA@

1

2

R917

1.05K_0402_1%

VGA@

12

C890

0.1U_0402_16V4Z

VGA@

1

2

C886

0.01U_0402_16V7K

VGA@

1

2

C896

0.01U_0402_16V7K

VGA@

1

2

C901

1U_0402_6.3V4Z

VGA@

1

2

C913

1U_0402_6.3V4Z

VGA@

1

2

R918

2.49K_0402_1%

VGA@

12

R610

243_0402_1%

VGA@

12

C894

1000P_0402_50V7K

VGA@

1

2

C915

22U_0805_6.3V6M

VGA@

1

2

R607

243_0402_1%

VGA@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SDD2

SDD1

SDD0

SDD3

PCI_RST#

CLK_PCI_CB

XD_D4

XDD7_MSD1

XDALE

XDCLE

XD_D6

PCI_PIRQG#

XD_D5

CB_PME#

MMCD4

MMCD5

MMCD6

MMCD7

XDD2_MSD0

XDD1_MSD2

XDD0_MSD3

XDD3_MSBS

PCI_AD26

PCI_AD30

PCI_AD31

PCI_AD28

PCI_AD29

PCI_AD23

PCI_AD27

PCI_AD25

PCI_AD22

PCI_AD21

PCI_AD18

PCI_AD17

PCI_AD20

PCI_AD24

PCI_AD19

PCI_AD16

PCI_AD14

PCI_AD13

PCI_AD15

PCI_AD11

PCI_AD12

PCI_AD10

PCI_AD6

PCI_AD9

PCI_AD7

PCI_AD5

PCI_AD8

PCI_AD2

PCI_AD1

PCI_AD4

PCI_CBE#0

PCI_CBE#1

PCI_CBE#3

PCI_AD3

PCI_AD0

PCI_CBE#2

SDCD#

XDRB#

XDCE#

MSCD#

IEEE1394_TPAP0

IEEE1394_TPAN0

IEEE1394_TPBP0

IEEE1394_TPBN0

IEEE1394_TPBIAS0

SD_WP

CLK_PCI_CB

OZ129XI

OZ129XO

PCI_PAR

PCI_FRAME#

PCI_STOP#

PCI_DEVSEL#

PCI_TRDY#

PCI_IRDY#

XDCD#

XDWE#

CBS_IDSELPCI_AD21

SD_CMD

XDWP#

XDRE#

PCI_REQ0#

SDCLK_MSCLK

PCI_GNT0#

IEEE1394_TPBIAS0

IEEE1394_TPAP0

IEEE1394_TPBP0

IEEE1394_TPBN0

IEEE1394_TPAN0

MC_3V#

XDD3_MSBS

MSCD#

XDD2_MSD0

XDD7_MSD1

XDD1_MSD2

XDD0_MSD3

XDD0_MSD3

XDD1_MSD2

XDD2_MSD0

XDD3_MSBS

XD_D4

XD_D6

XD_D5

XDD7_MSD1

XDWE#

XDWP#

XDALE

XDCD#

XDRB#

XDCE#

XDRE#

XDCLE

XDD0

XDD1

XDD2

XDD3

XDD4

XDD5

XDD6

XDD7

XDWE

XDWP

XD_ALE

XDCD

XDRB

XDCE

XD_CLE

XDRE

SDDAT0

SDDAT1

SDDAT2

SDCD

SDDAT4

SDDAT6

SDDAT5

SDDAT7

SDDAT3

SDWP

SDCMD

MSBS

MSINS

MSDATA0

MSDATA1

MSDATA2

MSDATA3

MSCLK

SDCLK

MMCD4

SDD0

SDD1

SDD3

MMCD5

SDD2

SD_WP

SD_CMD

SDCD#

MMCD6

MMCD7

SDCLK_MSCLK

SDCLK_MSCLK

SDCLK

MSCLK

OZ129XI

OZ129XO

+3VS_PHY

MC_3V#

MC_3V#

PCI_AD[0..31]17

PCI_CBE#017 PCI_CBE#117 PCI_CBE#217 PCI_CBE#317

PCI_PAR17

PCI_FRAME#17

PCI_TRDY#17 PCI_IRDY#17

PCI_STOP#17

PCI_DEVSEL#17

PCI_GNT0#17 PCI_REQ0#17

PCI_RST#17,21

CLK_PCI_CB16

PCI_CLKRUN#19,29

PCI_PIRQG#17 CB_PME#29

SUSP32,41,48

+3VS

+3VS

+1.8VS_CB

+3VS_PHY

+3VS

+3VS_CR +3VS_CR

+3VS_CR

+3VS

+1.8V

+3VS

+3VS_CR

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4131P

0.1

OZ129_Card Reader / 1394

Custom

40 40Thursday, January 10, 2008

2007/09/01 2008/09/01

LED behave:

Idel ---------> low

Accress data --> always high

Compal Electronics, Inc.

Layout Note: Place close to

OZ129 and Shield GND.

Layout Note: Place close to OZ129 Chipset.

C1188

1U 10V Z Y5V 0603

1

2

R937 0_0402_5%~D

1 2

C1186

0.01U_0402_25V7K~N

1

2

R878

0_0603_5%

1 2

R944 0_0402_5%~D

1 2

C1139

4.7U_0805_10V4Z

C1141

4.7U_0805_10V4Z

R932

470_0402_5%

12

R835

5.1K_0402_1%

1 2

R714 22_0402_5%

1 2

R693 0_0402_5%~D

1 2

R965 0_0402_5%~D

1 2

R939 0_0402_5%~D

1 2

R967 0_0402_5%~D

1 2

R951 0_0402_5%~D

1 2

R956 0_0402_5%~D

1 2

G

D

S

Q82 SSM3K7002FU_SC70-3

2

13

C819

15P_0402_50V8J

12

C1142

0.1U_0402_10V6K

1

2

R520 5.9K_0402_1%

1 2

C925

4.7U_0805_10V4Z

OZ129

U46

OZ129TN_LQFP128_14X14

PCI_RST#

1

NC 2

PME#

3

MC_3V# 4

IDSEL

5

CLKRUN#

6

VCC3.3 7

NC 8

NC 9

NC 10

INTA#

11

GND

12

NC 13

VCC1.8 14

VCC1.8 15

GND

16

PCI_REQ#

17

PCI_GNT#

18

AD31

19

AD30

20

AD29

21

AD28

22

AD27

23

AD26

24

AD25

25

PCI_VCC 26

AD24

27

C/BE3#

28

AD23

29

AD22

30

AD21

31

AD20

32

GND

33

AD19

34

AD18

35

AD17

36

AD16

37

C/BE2#

38

FRAME#

39

IRDY#

40

TRDY#

41

DEVSEL#

42

STOP#

43

PAR

44

PCI_CLK

45

C/BE1#

46

AD15

47

AD14

48

AD13

49

AD12

50

AD11

51

AD10

52

AD9

53

AD8

54

C/BE0#

55

PCI_VCC 56

AD7

57

AD6

58

AD5

59

AD4

60

AD3

61

AD2

62

AD1

63

AD0

64

NC 128

NC 127

NC 126

VCC1.8 125

GND

124 GND

123

VCC3.3 122

GND

121 VCC1.8 120

XD_CE# 119

XD_CLE 118

SD_WP 117

GND

116 GND

115

SD_CD# 114

SD_CLK/MS_CLK 113

SD_D2 112

SD_D3 111

SD_CMD 110

XD_ALE 109

SD_D0 108

SD_D1 107

MEDIA_LED

106

XD_WE# 105

GND

104

VCC3.3 103

VCC3.3 102

XD_RE# 101

XD_RB# 100

MS_CD# 99

XD_WPO# 98

XD_CD# 97

MS_D3/XD_D0 96

MS_D1/XD_D7 95

MS_D2/XD_D1 94

XD_D6 93

VCC1.8 92

VCC1.8 91

MS_D0/XD_D2 90

XD_D5 89

MS_BS/XD_D3 88

XD_D4 87

PHY_TEST1 86

PHY_TEST0 85

XO 84

XI 83

AGND

82

AVCC 81

AGND

80

AVCC 79

REF 78

AGND

77

TPBIAS 76

TPA+ 75

TPA- 74

AVCC 73

TPB+ 72

TPB- 71

AGND

70

AGND

69

GND

68

AVCC 67

GND

66

AGND

65

7 IN 1 CONN

JSD1

TAITW_R015-A10-LM

XD-WP

33

XD-D4

7

MS-DATA3 24

MS-DATA0 17

SD-DAT2 30

SD-DAT0 14

SD-CMD 25

MS-DATA1 15

XD-D6

5SD-DAT3 29

SD-DAT1 12

7in1-GND

31

XD-ALE

35

XD-D0

32

SD_CLK 20

XD-D2

9

MS-INS 22

MS-DATA2 19

MS-SCLK 26

XD-RE

38

MS-BS 13

XD-D5

6

7in1-GND

11

XD-D7

4

XD-D1

10

XD-CE

37

XD-R/B

39

XD-D3

8

7in1-GND

42

XD-WE

34

MS-VCC 28

SD-DAT7 16

XD-CLE

36

SD-DAT6 18

SD-VCC 21

XD-VCC

3

XD-CD

40 SD-CD 1

SD-WP 2

7in1-GND

41

SD-DAT5 23

SD-DAT4 27

R943 0_0402_5%~D

1 2

C823

4.7P_0402_50V8C

@

1

2

R879

0_0603_5%

1 2

C878

1U 10V Z Y5V 0603

1

2

R952 0_0402_5%~D

1 2

R936 0_0402_5%~D

1 2

C824

270P_0402_50V7K

1

2

R962 0_0402_5%~D

1 2

C1136

4.7U_0805_10V4Z

R963 0_0402_5%~D

1 2

R831

56.2_0402_1%

12

R961 0_0402_5%~D

1 2

R964 0_0402_5%~D

1 2

C1149

10P_0402_50V8J

@

1

2

R874 0_0402_5%~D

1 2

G

D

S

Q81

AO3413_SOT23-3

2

1 3

R950 0_0402_5%~D

1 2

R949 0_0402_5%~D

1 2

R957 0_0402_5%~D

1 2

R960 0_0402_5%~D

1 2

R850 100K_0402_5%@

12

R942

22K_0402_5%

R955 0_0402_5%~D

1 2

R873 0_0402_5%~D

1 2

C1140

0.1U_0402_10V6K

1

2

R966 0_0402_5%~D

1 2

R946 0_0402_5%~D

1 2

R947 0_0402_5%~D

1 2

R691

100_0402_5%

1 2

R941 0_0402_5%~D

1 2

R938 0_0402_5%~D

1 2

J139A1

SUYIN_020204FR004S506ZL~D

conn@

TPA+

4

TPA-

3

TPB+

2

TPB-

1

GND 5

GND 6

GND 7

GND 8

R830

56.2_0402_1%

12

R948 0_0402_5%~D

1 2

C822

15P_0402_50V8J

12

R959 0_0402_5%~D

1 2

R834

56.2_0402_1%

12

R945 0_0402_5%~D

1 2

G

D

S

Q35

AO3413_SOT23

2

13

C1137

0.1U_0402_10V6K

1

2

C1138

0.1U_0402_10V6K

1

2

R958 0_0402_5%~D

1 2

C922

0.1U_0402_10V6K

1

2

X3

24.576MHz_16P_1BG24576CKIA~D

1 2

C821

1U_0603_10V4Z

1

2

R713 22_0402_5%

1 2

R953 0_0402_5%~D

1 2

R833

56.2_0402_1%

12

C1187

1U 10V Z Y5V 0603

1

2

R954 0_0402_5%~D

1 2

R666

100K_0402_5%

1 2

C926

0.1U_0402_10V6K

1

2

C1146

10P_0402_50V8J

@

1

2

R940 0_0402_5%~D

1 2

R832

10_0402_5%~D

@

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

SUSP

SUSP SUSPSUSP

SUSP

SYSON#

SUSP#

SYSON#

RUNON 3VS_GATE RUNON 5VS_GATE

SUSP

SUSPSUSP

1.8VS ON 1.8VS_GATE

SUSP

VGA_PWGOD

SUSP

SYSON

VGA_PWGOD#

VGA_PWGOD#

VGA_PWGOD#

SUSP

SUSP#28,29,46,47,48

SUSP32,40,48

SYSON28,29,46

VGA_PWGOD47

+5VS+5VALW

+5VS

+3VS+3VALW

+1.5VS

B+_BIAS

+CPU_CORE

+1.8V +3VS

+5VALW

+3VALW

+0.9VS

+VCCP

+3VALW

+1.8VS+1.2VS +VGA_CORE

+1.8VS+1.8V

B+_BIAS

+5VALW

+1.25VS

+1.8VS_CB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

DC/DC Circuits

Custom

41 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Discharge circuit-1

+5VALW to +5VS Transfer+3VALW to +3VS Transfer

Compal Electronics, Inc.

VGA Discharge circuit

4.7A

+1.8V to +1.8VS Transfer

SYSON -> SUSP# -> VGA_ON->VGA_PWGOD

R372

470_0402_5%

12

C271

10U_0805_10V4Z~N

1

2

C279

0.01U_0402_25V7K~N

1

2

C465

0.1U_0402_16V4Z~N

1

2

G

D

S

Q34

SSM3K7002FU_SC70-3

2

13

C696

0.01U_0402_25V7K~N

VGA@

1

2

R338

10K_0402_5%

1 2

G

D

S

Q33

SSM3K7002FU_SC70-3

2

13

R646

470_0402_5%

VGA@

12

G

D

S

Q37

SSM3K7002FU_SC70-3

2

13

G

D

S

Q38

SSM3K7002FU_SC70-3

2

13

U39

SI4800DY_SO8

S1

S2

S3

G4

D

8

D

7

D

6

D

5

R409

100K_0402_5%

12

R267

47K_0402_5%

1 2

C283

10U_0805_10V4Z~N

1

2

R559

47K_0402_5%

VGA@

1 2

R383

470_0402_5%

12

C264

0.01U_0402_25V7K~N

1

2

R340

100K_0402_5%

12

R668

100K_0402_5%

VGA@

12

G

D

S

Q32

SSM3K7002FU_SC70-3

2

13

U41

SI4800DY_SO8

VGA@

S1

S2

S3

G4

D

8

D

7

D

6

D

5

C284

0.1U_0402_16V4Z~N

1

2

G

D

S

Q18

SSM3K7002FU_SC70-3

2

13

R647

470_0402_5%

VGA@

12

C211 0.1U_0402_16V4Z~N

1 2

R198

330K_0402_5%

12

R133

470_0402_5%

12

G

D

S

Q48

SSM3K7002FU_SC70-3

VGA@

2

13

G

D

S

Q49

SSM3K7002FU_SC70-3

VGA@

2

13

C727

10U_0805_10V4Z~N

VGA@

1

2

G

D

S

Q12

SSM3K7002FU_SC70-3

2

13

G

D

S

Q50

SSM3K7002FU_SC70-3

2

13

R391

470_0402_5%

12

C728

0.1U_0402_16V4Z~N

VGA@

1

2

R609

470_0402_5%

VGA@

12

G

D

S

Q61

SSM3K7002FU_SC70-3

VGA@

2

13

G

D

S

Q39

SSM3K7002FU_SC70-3

2

13

G

D

S

Q42

SSM3K7002FU_SC70-3

2

13

R197

100K_0402_5%

1 2

R536

470_0402_5%

12

C256

10U_0805_10V4Z~N

1

2

R365

10K_0402_5%

1 2

R608

100K_0402_5%

VGA@

1 2

C697

10U_0805_10V4Z~N

VGA@

1

2

R351

470_0402_5%

12

R665

0_0402_5%@

1 2

R551

100K_0402_5%

12

C278

10U_0805_10V4Z~N

1

2

G

D

S

Q62

SSM3K7002FU_SC70-3

VGA@

2

13

R382

470_0402_5%

12

U40

SI4800DY_SO8

S1

S2

S3

G4

D

8

D

7

D

6

D

5

G

D

S

Q65

SSM3K7002FU_SC70-3

VGA@

2

13

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

Screws

Custom

42 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Compal Electronics, Inc.

H_4P3

H_2P8

H_3P8

H_2P8

H_3P3

H_2P5

H19

HOLEA@

1

H3

HOLEA@

1

H9

HOLEA@

1

H7

HOLEA@

1

H12

HOLEA@

1

FD3

FIDUCAL

@

1

FD1

FIDUCAL

@

1

H26

HOLEA@

1

H21

HOLEA@

1

H24

HOLEA@

1

FD6

FIDUCAL

@

1

FD4

FIDUCAL

@

1

H22

HOLEA@

1

H17

HOLEA@

1

H16

HOLEA@

1

H15

HOLEA@

1

H23

HOLEA@

1

H10

HOLEA@

1

H4

HOLEA@

1

FD2

FIDUCAL

@

1

H14

HOLEA@

1

H11

HOLEA@

1

H18

HOLEA@

1

H2

HOLEA@

1

H5

HOLEA@

1

FD5

FIDUCAL

@

1

FD8

FIDUCAL

@

1

FD7

FIDUCAL

@

1

H6

HOLEA@

1

H1

HOLEA@

1

H8

HOLEA@

1

H25

HOLEA@

1

H13

HOLEA@

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CHGRTCP

N35

N40N41

DOCK_PSID

DOCK_PSID

51ON#31

ACIN 19,29,44

PS_ID 29

PSID_DISABLE# 29

VIN

VS

BATT+

RTCVREF

+3VALW

+5VALW

+VCCP

+0.9VS

+1.5VSP +1.5VS

+0.9VSP

+1.8V

+VCCPP

+5VALWP

+3VALWP

+1.8VP

+1.25VS

+1.25VSP

+VGA_CORE

+VGA_COREP

+1.2VS

+1.2VSP

VIN VIN

RTCVREF

VS

VIN

ADPIN

+5VALW

+5VALW

+3VALW+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

JAL80

0.2

<Title>

Custom

43 9Thursday, January 10, 2008

2006/10/1 2007/5/01

DCIN / Precharge

3.3V

L-->H 18.234 17.841 17.449

H-->L 17.597 17.210 16.813

Vin Detector

Max. typ. Min.

PJP9

JUMP_43X118@

1

122

PL16

FBM-L11-160808-601LMT 0603~D

12

PD3

RLS4148_LL34-2

1 2

PR215

15K_0402_1%~D

1 2

PJP11

JUMP_43X118@

1

122

G

D

S

PQ53 RHU002N06_SOT323-3

2

1 3

PJP12

JUMP_43X118@

1

122

PC164

0.22U_1206_25V7K

12

PR203

33_1206_5%

12

PR192

1K_0402_5%~D

1 2

PC158

100P_0402_50V8J~D

12

PJP14

JUMP_43X118@

1

122

PR206

22K_0402_5%~D

1 2

PR209

2.2K_0402_5%~D

1 2

PR191

10K_0402_5%~D

12

PR216

10K_0402_1%~D@

1 2

PJP3

JUMP_43X118@

1

122

PR198

10K_0402_5%~D

12

PJPDC1

ACES_88299-0600

@

11

33

44

55

66

GND 8

22

GND 7

PR188

56K_0402_5%~D@

1 2

PC160

100P_0402_50V8J~D

12

PC287

1000P_0402_50V7K~D

12

PR205

100K_0402_5%~D

12

PR189

1M_0402_1%~N

1 2

PC156

2200P_0402_50V7K~D

@

1 2

PR190

82.5K_0402_1%~D

12

PR214

10K_0402_1%~D

12

PC163

1000P_0402_50V7K~D

12

PR194

19.6K_0402_1%~D

12

PR208

0_0402_5%~D

@

1 2

PJP5

JUMP_43X118@

1

122

PJP1

JUMP_43X118@

1

122

PC157

1000P_0402_50V7K~D

12

PU12B

LM393DR_SO8

+

5

-

6O7

P8

G

4

PU12A

LM393DR_SO8

+

3

-

2O1

P8

G

4

E

B

C

PQ54

MMST3904-7-F_SOT323~D

2

3 1

PJP13

JUMP_43X118@

1

122

PJP2

JUMP_43X118@

1

122

PC159

1000P_0402_50V7K~D

12

PD5

DA204U_SOT323~D

2

3

1

PR207

200_0805_5%

12

PC162

0.1U_0402_16V7K~D

12

PJP6

JUMP_43X118@

1

122

PD4

CH751H-40PT_SOD323-2

2 1

PC165

0.1U_0603_25V7K~D

12

PR213

100K_0402_1%~D

1 2

PL17

FBMA-L11-322513-151LMA50T_1210

1 2

PD1

RLZ4.3B_LL34

12

PR193

22K_0402_1%~D

1 2

PJP7

JUMP_43X118@

1

122

PD7

SM24_SOT23

@

2

3

1

PJP8

JUMP_43X118@

1

122

PC161

0.01U_0402_25V7K~D

12

PR195

10K_0402_5%~D

12

PQ50

TP0610K-T1-E3_SOT23-3

32.8

2

13

PU14G920AT24U_SOT89-3

IN 2

GND

1

OUT

3

PR212

33_0402_5%~D

1 2

PC166

4.7U_0805_6.3V6K~N

12

PD6

DA204U_SOT323~D

@

2

3

1

PC286

100P_0402_50V8J~D

12

PJP10

JUMP_43X118@

1

122

PJP4

JUMP_43X118@

1

122

PC167

1U_0805_25V4Z~D

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

DL_CHG

ACSET

CELLS

REGN

/BATDRV

ACDET

DH_CHG

OVPSET

/BATDRV

LX_CHG

CELLS

VADJ

CHG_B+

CHGEN#

CHGEN#

ACSET

Z4012

VADJ

REGN

ACGOOD#

ACGOOD#

IREF 29

ACOFF 29

FSTCHG29

ACIN 19,29,43

3cell/4cell# 50

ADP_I29

CHGVADJ29

BATT+

VIN

VREF

VREF

VREF

B+

VREF

VREF

B+_BIAS

+5VALW

B+

+COINCELL

+RTCVCC

RTC_VREF

RTCVREF

+COINCELL

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.2

Charger

B

44 9Thursday, January 10, 2008

2006/10/1 2007/5/01

Compal Electronics, Inc.

JAL80 ****

Cells selector

90W adapter

Input UVP : 16.98V

Icharge=(Vsrset/Vvdac)*(0.1/PR222)=3.3A

Fsw : 300KHz

Iadapter=(Vacset/Vvdac)*(0.1/PR217)=3.65A

GND

VREF

3 Cell

4 Cell

CELLS

Input OVP : 22.3V

CP setting

ICHG setting

IREF Current

2.968V 3A

COIN RTC Battery

Move to power schematic

PR1

1K_0402_5%~D

12

PC181

10U_1206_25V6M~D

12

PC179

0.1U_0603_25V7K~D

1 2

PL18

10UH_SIL1045RA-100PF_4.5A_30%

1 2

PQ57

FDS8884_SO8

3 6

5

7

8

2

4

1

PJP24

ACES_85204-02001

1

1

2

2

G1

3

G2

4

PC176

0.1U_0603_25V7K~D

@

12

PC185

0.1U_0402_16V7K~D

1 2

PC187

0.1U_0603_25V7K~D

@

12

PC192

100P_0402_50V8J~D

12

PD9

1SS355_SOD323-2

32.8

12

PR231

49.9K_0402_1%~D

12

PR236

470K_0402_5%~D

1 2

PC2921000P_0402_50V7K~D

12

PR224

56.2K_0402_1%

1 2

PR228

100K_0402_1%~D

1 2

PR238

220K_0402_5%

1 2

PR234

100K_0402_1%~D

12

G

D

S

PQ61

SSM3K7002F_SC59-3

2

13

PQ56

FDS4435BZ_SO8

S

1

S

2

S

3

G

4

D8

D7

D6

D5

PC193

0.1U_0805_25V7M~N

1 2

PQ60

SI2301BDS-T1-E3_SOT23-3

2

1 3

PR230

100K_0402_1%~D

12

PC1

1U_0603_10V4Z~D

1

2

PQ58

FDS4435BZ_SO8

S1

S2

S3

G4

D

8D

7D

6D

5

PR272

1_1210_5%~D

12

G

D

S

PQ62

SSM3K7002F_SC59-3

@

2

13

PC194

0.1U_0603_25V7K~D

12

PD8

RLS4148_LL34-2

12

PC188

1U_0603_10V6K~D

12

PR233

10_0603_5%~D

1 2

PC190

0.1U_0603_25V7K~D

12

PR339

1_1210_5%~D

12

G

D

S

PQ65

SSM3K7002F_SC59-3

2

13

PR51

0_0402_5%~D@

12

PR54

10K_0402_1%~D

12

PQ59

FDS6690AS_NL_SO8

3 6

5

7

8

2

4

1

PJP15

JUMP_43X118@

11

2

2

PC178

0.1U_0603_25V7K~D

12

PC1724.7U_1206_25V6K~D

1 2

PC180

10U_1206_25V6M~D

1 2

PC175

0.1U_0402_16V7K~D

1 2

PC184

0.47U_0603_16V7K~N

1 2

PU15

BQ24751ARHDR_QFN28_5X5

ACN

2

ACP

3

CHGEN

1

ACSET

6

IADAPT 15

VADJ

12

PGND 22

ACDET

5

ACOP

7

BAT 17

BATDRV

14

CELLS 20

SRN 18

SRP 19

LODRV 23

ACDRV

4

VREF

10

LEARN 21

SRSET 16

AGND

9

VDAC

11

OVPSET

8

ACGOOD

13

PVCC 28

HIDRV 26

PH 25

BTST 27

REGN 24

TP 29

PC191

0.01U_0402_25V7K~D

@

12

PC174

0.01U_0402_25V7K~D

1 2

PR219

100K_0402_1%~D

12

PR227

54.9K_0402_1%

1 2

PR222

0.02_2512_1%

1

3

4

2

PQ55

FDS4435BZ_SO8

S1

S2

S3

G4

D

8

D

7

D

6

D

5

PC169

2.2U_0805_25V6K

1 2

PC177

0.1U_0805_25V7K

1 2

PC170

0.01U_0603_50V7K~D

1 2

PC1734.7U_1206_25V6K~D

1 2

PR229

100K_0402_1%~D

1 2

PR237

100K_0402_1%~D

1 2

PR239

220K_0402_5%

1 2

PR223

54.9K_0402_1%

1 2

PR235

100_0805_5%~D

1 2

G

D

S

PQ64

RHU002N06_SOT323-3

2

13

PR232

100K_0402_1%~D

@

1 2

PR226

340K_0402_1%~D

1 2

PC186

0.1U_0603_25V7K~D

12

PC1714.7U_1206_25V6K~D

1 2

PD2

BAT54CW_SOT323~D

27.4

3

2

1

PR225

100K_0402_1%~D

12

PR53

4.32K_0402_1%~D

1 2

PR221

340K_0402_1%~D

1 2

PR218

100K_0402_1%~D

12

PQ63

TP0610K-T1-E3_SOT23-3

32.8

2

13

PC189

0.1U_0603_25V7K~D

12

PC168

0.01U_0402_25V7K~D

1 2

PR220

2.2_0603_5%~D

1 2

PC2931000P_0402_50V7K~D

12

PC183

1U_0603_10V6K~D

12

PR217

0.015_2512_1%

1

3

4

2

PC182

0.01U_0402_25V7K~D

@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ILIM2

BST3A BST5A

DL5

FB3

2VREF_ISL6237

2VREF_ISL6237

DH5DH3

LX3

FB5

ILM1

DL3

LX5

MAINPWON50

POK

VL

VL

ISL6237_B+

VS

+3VALWP

+5VALWP

B+

VL

2VREF_ISL6237

ISL6237_B+

VL

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

JAL80

0.2Custom

45 9

Thursday, January 10, 2008

2006/10/1 2007/05/30

Compal Electronics, Inc.

+3VALWP, +5VALWP

Rds(on) = 15m ohm(max) ; Rds(on) = 12m ohm(typical)

Rds(on) = 15m ohm(max) ; Rds(on) = 12m ohm(typical)

3.3VALWP

Imax=6A

Iocp=9A

5VALWP

Imax=6A

Iocp=9A

PL21

4.7UH_SIL104R-4R7PF_5.7A_30%

12

PR257

806K_0603_1%

1 2

PR260

47K_0402_5%~D@

1 2

PU16

ISL6237IRZ-T_QFN32_5X5

UGATE2

26

BOOT2

24

PHASE2

25

LGATE2

23

OUT2

30

REFIN2

32

TON

2

LDOREFIN

8

NC

20

EN_LDO

4

EN2

27

EN1

14

POK1 13

POK2 28

PVCC 19

VCC 3

SKIP 29

LDO 7

ILIM2 31

BYP 9

OUT1 10

GND

21

PGND 22

LGATE1 18

PHASE1 16

BOOT1 17

UGATE1 15

VIN 6

NC

5

REF

1

FB1 11

ILIM1 12

TP

33

+

PC210

330U_D3L_6.3VM_R25M

1

2

PR249 0_0402_5%~D@

12

PR259

0_0402_5%~D

12

PR241

4.7_1206_5%~D

@

12

PC201

0.1U_0603_25V7K~D

1 2

PC199

4.7U_1206_25V6K~D

12

PQ69

AO4712_SO8

3 6

5

7

8

2

4

1

PJP20

JUMP_43X118@

1

122

PC195

4.7U_1206_25V6K~D

12

PR254

0_0402_5%~D

@

1 2

PR251

100K_0402_1%~D

1 2

PL20

4.7UH_SIL104R-4R7PF_5.7A_30%

1 2

PC212

0.22U_0603_25V7-K

1 2

PR248

10K_0402_1%~D

1 2

PC214

0.047U_0402_16V7K~N

@

12

PC198

4.7U_1206_25V6K~D

12

PD10

RLZ5.1B_LL34

1 2

PC202

1U_0603_10V6K~D

1 2

PC213

0.047U_0603_16V7K~D

12

PR247

10K_0402_1%~D

@

1 2

PR244

0_0402_5%~D

1 2

PC285

1U_0603_10V6K~D

12

PD16

1SS355TE-17_SOD323-2

1 2

PQ67

AO4466_SO8

3 6

5

7

8

2

4

1

PC205

0.1U_0603_25V7K~D

1 2

PR240

0_0805_5%

1 2

PR243

0_0603_5%~D

12

PR253

255K_0402_1%

12

PC206

680P_0603_50V7K~D

@

12

PR246

61.9K_0402_1%~D

1 2

PC196

4.7U_1206_25V6K~D

12

PR250 0_0402_5%~D

1 2

PR242

4.7_1206_5%~D

@

12

PR252

200K_0402_5%~D

1 2

PC197

2200P_0402_50V7K~D

12

PC200

2200P_0402_50V7K~D

12

PC203

4.7U_0805_6.3V6K~N

12

PR245

0_0603_5%~D

12

+

PC204

330U_D3L_6.3VM_R25M

1

2

PQ79

TP0610K-T1-E3_SOT23-3

2

1 3

PC207

1U_0603_10V6K~D

1 2

PR256

0_0402_5%~D

1 2

PQ68

AO4712_SO8

3 6

5

7

8

2

4

1

PC211 0.22U_0603_10V7K~D

1 2

PQ66

AO4466_SO8

3 6

5

7

8

2

4

1

PC209

680P_0603_50V7K~D

@

12

PR258

0_0402_5%~D

@

12

PC208

0.1U_0603_25V7K~D

1 2

PR255

255K_0402_1%

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

UG_1.8V

LX_1.8V

BST_1.8V

LG_1.8V

VCCPP_EN

UG_VCCPP

LG_VCCPP

LX_VCCPP

VCCPP_EN

BST_VCCPP

SUSP#28,29,41,47,48

SYSON 28,29,41

+1.8VP

ISL6228_B+

+5VALWP

+VCCPP

+5VALWP

ISL6228_B+

ISL6228_B+ ISL6228_B+

+5VALWP +5VALWP

+5VALWP

+5VALWP

B+ ISL6228_B+

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.2

+1.8VP/+VCCPP

46 9

Thursday, January 10, 2008

2006/10/1 2007/5/01

JAL80

DCR 15m ohm(max)

DCR 15m ohm(max)

VCCPP

Imax=7A

Iocp=11.59A 1.8VP

Imax=9A

Iocp=12.31A

PGOOD1 PGOOD2

串

1K

電組

上

@

+

PC251

220U_D2_4VM

1

2

PC257

1U_0402_6.3V6K~D

1 2

PR296

3.3K_0402_5%~D

1 2

+

PC260

220U_D2_4VM

1

2

PC248

0.033U_0402_16V7K~D

1 2

PR314

0_0402_5%~D

12

PC252

0.01U_0402_25V7K~D@

1 2

PQ74

AO4466_SO8

3 6

5

7

8

2

4

1

PC244

1000P_0402_50V7K~D

12

PC240

1U_0402_6.3V6K~D

12

PQ75

AO4712_SO8

3 6

5

7

8

2

4

1

PR288

2.2_0603_1%~D

12

PJP21

JUMP_43X118@

1

122

PR309

24K_0402_1%~D

1 2

PC241

0.1U_0603_25V7K~D

12

PC249

4.7U_1206_25V6K~D

12

PR301

3.3K_0402_5%~D

12

PR289

2.2_0603_1%~D

1 2

PR297

68K_0402_1%

12

PR290

1K_0402_1%~D

@

12

PC291

680P_0402_50K X7R~D

12

PC262

0.01U_0402_25V7K~D

@

12

PU18

ISL6228HRTZ-T_QFN28_4X4

FSET2 1

VIN2 2

VCC2 3

VCC1 4

VIN1 5

FSET1 6

PGOOD1 7

FB1

8

VO1

9

OCSET1

10

EN1

11

PHASE1

12

UGATE1

13

BOOT1

14

PVCC1

15

LGATE1

16

PGND1

17

PGND2

18

LGATE2

19

PVCC2

20

BOOT2

21

UGATE2 22

PHASE2 23

EN2 24

OCSET2 25

VO2 26

FB2 27

PGOOD2 28

GND_T 29

PR295

90.9K_0402_1%~N

1 2

PR306

0_0603_5%~D

1 2

PC247

4.7U_1206_25V6K~D

12

PR307

0_0402_5%~D

1 2

PC255

680P_0603_50V8J~D

12

PC250

4.7U_1206_25V6K~D

12

PL27

1.5UH_MPL73-1R5_9A_20%

1 2

PR311

0_0603_5%~D

1 2

PQ76

AO4466_SO8

3 6

5

7

8

2

4

1

PR291

10_0603_1%

12

PQ77

AO4712_SO8

3 6

5

7

8

2

4

1

PR313

0_0603_5%~D

1 2

PR292

10_0603_1%

12

PR302

68K_0402_1%

1 2

PC261

680P_0603_50V8J~D

12

PR298

22.6K_0402_1%

1 2

PR310

0_0603_5%~D

12

PR293

22K_0402_1%~D

1 2

PC253

4.7U_1206_25V6K~D

12

PC246

1000P_0402_25V8J

1 2

PC259

0.1U_0402_16V7K~D

1 2

PR300

34K_0402_1%

1 2

PR303

24K_0402_1%~D

1 2

PC243

1000P_0402_50V7K~D

12

PC245

1000P_0402_25V8J

12

PC290

470P_0402_50V8J~D

12

PR299

1K_0402_1%~D

@

12

PR305

22.6K_0402_1%

1 2

PC254

0.022U_0402_16V7K~D

1 2

PL26

1.5UH_MPL73-1R5_9A_20%

1 2

PC239

1U_0402_6.3V6K~D

12

PC258

1U_0402_6.3V6K~D

1 2

PR312

4.7_1206_5%~D

12

PC256

0.1U_0402_16V7K~D

12

PC242

0.1U_0603_25V7K~D

12

PR294

18.2K_0402_1%~D

1 2

PR308

4.7_1206_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

UG_VGA

LX_VGA

BST_VGA

LG_VGA

1.5V_EN

UG_1.5V

LG_1.5V

LX_1.5V

1.5V_EN

BST_1.5V

SUSP#28,29,41,46,48

VGA_ON 29

VGA_PWGOD 41

+VGA_COREP

ISL6228_B++

+5VALWP

+1.5VSP

+5VALWP

B+

ISL6228_B++

ISL6228_B++

ISL6228_B++ ISL6228_B++

+5VALWP +5VALWP

+5VALWP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.2

+1.5VP/+VGA

47 9

Thursday, January 10, 2008

2006/10/1 2007/5/01

JAL80

DCR 15m ohm(max)

DCR 15m ohm(max)

1.5VP

Imax=5A

Iocp=9.13A +VGA (1.15V)

Imax=9A

Iocp=12.31A

PGOOD1 PGOOD2

串

1K

電組

上

@

PC218

0.1U_0603_25V7K~D

VGA@

12

PR262

2.2_0603_1%~D

VGA@

1 2

PR269

3.3K_0402_5%~D

1 2

PC216

1U_0402_6.3V6K~D

VGA@

12

PC228

0.01U_0402_25V7K~DVGA@

1 2

+

PC233

220U_D2_4VM

VGA@

1

2

PR268

45.3K_0402_1%~D

1 2

PC217

0.1U_0603_25V7K~D

12

PU17

ISL6228HRTZ-T_QFN28_4X4

FSET2 1

VIN2 2

VCC2 3

VCC1 4

VIN1 5

FSET1 6

PGOOD1 7

FB1

8

VO1

9

OCSET1

10

EN1

11

PHASE1

12

UGATE1

13

BOOT1

14

PVCC1

15

LGATE1

16

PGND1

17

PGND2

18

LGATE2

19

PVCC2

20

BOOT2

21

UGATE2 22

PHASE2 23

EN2 24

OCSET2 25

VO2 26

FB2 27

PGOOD2 28

GND_T 29

PR286

2.2_0603_5%~D

VGA@

12

PR261

2.2_0603_1%~D

12

PC225

4.7U_1206_25V6K~D

12

PR270

68K_0402_1%

12

PR274

3.3K_0402_5%~D

VGA@

12

PC223

4.7U_1206_25V6K~D

12

PR277

10_0402_5%~D

VGA@

1 2

PQ73

AO4712_SO8

VGA@

3 6

5

7

8

2

4

1

PR279

0_0603_5%~D

1 2

PQ71

AO4712_SO8

3 6

5

7

8

2

4

1

PL24

1.5UH_MPL73-1R5_9A_20%

VGA@

1 2

PC238

0.01U_0402_25V7K~D

@

12

PC226

4.7U_1206_25V6K~D

VGA@

12

PR275

71.5K_0402_1%~D

VGA@

1 2

PC231

680P_0603_50V8J~D

@

12

PC215

1U_0402_6.3V6K~D

12

PR265

10_0603_1%

VGA@

12

PR280

0_0402_5%~D

VGA@

1 2

PR264

10_0603_1%

12

PR284

0_0603_5%~D

VGA@

1 2

PR267

18.2K_0402_1%~D

VGA@

1 2

PQ70

AO4466_SO8

3 6

5

7

8

2

4

1

PR266

22K_0402_1%~D

1 2

PC237

680P_0603_50V8J~D

VGA@

12

PR271

17.8K_0402_1%~D

1 2

PR283

0_0603_5%~D

12

PC224

0.033U_0402_16V7K~D

1 2

PJP22

JUMP_43X118@

1

122

PR276

24K_0402_1%~D

VGA@

1 2

PC234

0.1U_0402_16V7K~D

VGA@

1 2

PC222

1000P_0402_25V8J

VGA@

1 2

PR273

78.7K_0402_1%~D

VGA@

1 2

PC220

1000P_0402_50V7K~D

VGA@

12

PC229

4.7U_1206_25V6K~D

VGA@

12

PR285

4.7_1206_5%~DVGA@

12

PC221

1000P_0402_25V8J

12

PR278

17.8K_0402_1%~D

1 2

PR282

24K_0402_1%~D

VGA@

1 2

PC219

1000P_0402_50V7K~D

12

PC235

1U_0402_6.3V6K~D

1 2

PL23

1.5UH_MPL73-1R5_9A_20%

1 2

PC236

1U_0402_6.3V6K~D

VGA@

1 2

PR263

1K_0402_1%~D

@

12

PC230

0.022U_0402_16V7K~D

VGA@

1 2

+

PC227

220U_6.3V_M

1

2

PQ72

AO4466_SO8

VGA@

3 6

5

7

8

2

4

1

PR281

4.7_1206_5%~D@

12

PC232

0.1U_0402_16V7K~D

12

PR287

0_0402_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SUSP32,40,41

SUSP#28,29,41,46,47

SUSP#28,29,41,46,47

+3VALW

+0.9VSP

+1.8V

+1.5VS+5VALW

+1.25VSP

+1.5VS+5VALW

+1.2VSP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

JAL80

0.2Custom

48 9

Thursday, January 10, 2008

2005/10/1 2007/05/30

Compal Electronics, Inc.

+1.25VSP / +0.9VSP/ +1.2VSP

PC273

1U_0603_10V6K~D

12

PU19

APL5913-KAC-TRL_SO8~N

VGA@

GND

1

VOUT 3

POK

7

EN

8

VCNTL 6

VIN 5

VOUT 4

FB 2

VIN 9

PC268

4.7U_0805_6.3V6K~N

12

PR322

1.15K_0402_1%

12

PC265

0.01U_0402_25V7K~D

VGA@

12

PC270

0.1U_0402_16V7K~D

12

PR318

0_0402_5%~D

1 2

PU20

APL5331KAC-TRL_SO8~N

VOUT

4

NC 5

GND

2

VREF

3

VIN

1VCNTL 6

NC 7

NC 8

TP 9

PU21

APL5913-KAC-TRL_SO8~N

GND

1

VOUT 3

POK

7

EN

8

VCNTL 6

VIN 5

VOUT 4

FB 2

VIN 9

PJP16

JUMP_43X118@

1

122

PC263

1U_0603_10V6K~D

VGA@

12

PR323

2.05K_0402_1%~D

12

PC272

0.1U_0402_16V7K~D

@

12

PC275

0.01U_0402_25V7K~D

12

PR317

1K_0402_1%~D

12

PR321

0_0402_5%~D

1 2

PR316

1K_0402_1%~D

VGA@

12

PC264

1U_0603_10V6K~D

VGA@

12

PC277

0.1U_0402_16V7K~D

@

12

PC276

1U_0603_10V6K~D

12

PC266

1U_0603_10V6K~D

VGA@

12

PR320

1K_0402_1%~D

12

PC274

1U_0603_10V6K~D

12

PC271

1U_0603_10V6K~D

12

PR315

0_0402_5%~D

VGA@

1 2

PJP17

JUMP_43X118@

11

2

2

PC269

0.1U_0402_16V7K~D

@

12

PJP18

JUMP_43X118@

1

122

G

D

S

PQ78

RHU002N06_SOT323-3

2

13

PR319

2K_0402_1%~D

VGA@

12

PC267

1U_0603_10V6K~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

UGATE_CPU2

LGATE_CPU2

VSUM

VSUM

BOOT_CPU1

UGATE_CPU1

LGATE_CPU1

BOOT_CPU2

PHASE_CPU2

VR_TT#

ISEN1

VCC_PRM

VCC_PRM

VCC_PRM

PHASE_CPU1

VSUM

ISEN1

ISEN2

ISEN2

CPU_VID4

5

CPU_VID3

5

CPU_VID5

5

CPU_VID2

5

CPU_VID1

5

CPU_VID0

5

CPU_VID6

5

VR_ON

29

DPRSLPVR7,19

H_DPRSTP#5,7,18

CLK_EN#16

VGATE7,19,29

H_PSI#5

VCCSENSE5

VSSSENSE5

POW_MON

+3VS

+3VS

+5VS

+CPU_B+

+5VS

+CPU_CORE

B+

+CPU_B+

+CPU_B+

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4121P

0.1

+CPU_CORE

Custom

49 9Thursday, January 10, 2008

2007/1/15 2008/1/15

Compal Electronics, Inc.

PC125

10U_1206_25V6M~D

12

PC139

0.1U_0603_25V7K~D

12

PR171

3.65K_1206_1%

12

PR156

1.91K_0402_1%~D

12

PR174 1_0603_5%~D

1 2

PR154 0_0402_5%~D

1 2

PC127

10U_1206_25V6M~D

@

12

PC117

0.01U_0402_25V7K~D

12

PQ44

FDS6676AS_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PC136

1U_0603_10V6K~D

12

PH2

100K_0603_1%_TH11-4H104FT@

1 2

PR158

4.7_1206_5%~D

12

PC145

0.22U_0603_16V7K~D

12

PR166 11.5K_0402_1%~D

1 2

PR1490_0402_5%~D

12

PC119

0.01U_0402_25V7K~D

12

PQ46

SI7686DP-T1-E3_SO8

3 5

2

4

1

PC140 0.022U_0603_25V7K

1 2

PR159

3.65K_1206_1%

12

PQ43

SI7686DP-T1-E3_SO8

3 5

2

4

1

PC134 470P_0402_50V7K~D

12

PC121

1U_0603_10V6K~D

12

PC132 1000P_0402_50V7K~D

1 2

PR186 1K_0402_1%~D

1 2

PR162 0_0402_5%~D@

1 2

PC114

10U_1206_25V6M~D

12

PR177

255_0402_1%~D

1 2

PR173 0_0402_5%~D@

1 2

PC133

680P_0603_50V8J~D

12

PL15

P_0.36H_ETQP4LR36WFC_24A_20%

12

PR185

11K_0402_1%~D

12

PC1290.068U_0603_50V7K~N

1 2

PC122

0.22U_0603_10V7K~D

1 2

PR172

1_0402_5%~D

12

PR142

1_0603_5%~D

1 2

PR170

10K_0402_1%~D

12

PC112

5600P_0402_25V7K

@

12

PR180 0_0402_5%~D

1 2

ISL6262ACRZ-T_QFN48_7X7

PU11

29.1

PGOOD

1

PSI#

2

PMON

3

RBIAS

4

VR_TT#

5

NTC

6

SOFT

7

OCSET

8

VW

9

COMP

10

FB

11

FB2

12

VDIFF

13

VSEN

14

RTN

15

DROOP

16

DFB

17

VO

18

VSUM

19

VIN

20

GND

21

VDD

22

ISEN2

23

ISEN1

24

NC 25

BOOT2 26

UGATE2 27

PHASE2 28

PGND2 29

LGATE2 30

PVCC 31

LGATE1 32

PGND1 33

PHASE1 34

UGATE1 35

BOOT1 36

VID0 37

VID1 38

VID2 39

VID3 40

VID4 41

VID5 42

VID6 43

VR_ON 44

DPRSLPVR 45

DPRSTP# 46

CLK_EN# 47

3V3 48

GND 49

PC126

10U_1206_25V6M~D

12

PR168

4.7_1206_5%~D

12

PR155

2.2_0603_5%~D

1 2

PR165 4.22K_0402_1%@

1 2

PC118

1U_0603_10V6K~D

12

PC142

0.022U_0603_25V7K

12

PC130

0.22U_0603_10V7K~D

1 2

PC124

0.22U_0603_16V7K~D

1 2

PC1280.015U_0402_16V7K@

1 2

PC115

10U_1206_25V6M~D

@

12

PR157

499_0402_1%~D

1 2

PC116

10U_1206_25V6M~D

12

PR1510_0402_5%~D

12

PL13

FBMA-L18-453215-900LMA90T_1812

1 2

PC137 220P_0402_50V7K~D

1 2

PH3

10KB_0603_ERTJ1VR103J

1 2

PR144 0_0402_5%~D

1 2

PQ48

FDS6676AS_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PC135

0.22U_0603_16V7K~D

1 2

PR1480_0402_5%~D

12

PR181 10K_0402_1%~D

1 2

PC146 0.22U_0603_10V7K~D

12

PR145 0_0402_5%~D

1 2

PR1470_0402_5%~D

12

PR167

2.2_0603_5%~D

1 2

PR161

1_0402_5%~D

12

PR1520_0402_5%~D

12

PC141

0.022U_0603_25V7K

@

12

PR1500_0402_5%~D

12

PC1471U_0603_10V6K~D

1 2

PQ47

FDS6676AS_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PR179 1K_0402_1%~D

1 2

PR182

2.61K_0402_1%~D

12

PC120

1U_0603_10V6K~D

12

PR178

10_0603_5%~D

1 2

PC144 0.068U_0603_50V7K~N

1 2

PR169 6.81K_0402_1%~D

1 2

PR164 147K_0402_1%~D

1 2

PR176

1K_0402_1%~D

12

PQ45

FDS6676AS_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PR153

0_0402_5%~D

12

PR160

10K_0402_1%~D

12

PR187 3.57K_0402_1%~D

1 2

PL14

P_0.36H_ETQP4LR36WFC_24A_20%

12

PR183 0_0402_5%~D

1 2

PC131

1000P_0402_50V7K~D

1 2

PR143 499_0402_1%~D

1 2

PC143 180P_0402_50V8J~D

1 2

+

PC155

100U_25V_M

1

2

PR1460_0402_5%~D

12

PC123

680P_0603_50V8J~D

12

+

PC113

100U_25V_M

1

2

PC138 1000P_0402_50V7K~D

1 2

PR175 97.6K_0402_1%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3cell/4cell#

BATT_TEMP

BATT+

BATT++

MAINPWON 45

BATT_TEMP 29

EC_SMB_DA1 29

EC_SMB_CK1 29

3cell/4cell# 44

BATT_OVP29

VL

VL VS

VL

+3VALWP

BATT++

BATT+

+3VALWP

BATT+

VS

+3VALWP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

JAL80

0.2Custom

50 9

Thursday, January 10, 2008

2005/10/1 2007/05/30

Compal Electronics, Inc.

Battery Connect/OTP

BATTERY CONN

CPU

CPU

Recovery at 50 +-3 degree C

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C

Place clsoe to EC pin

PJPB1 battery connector

SMART

Battery:

1.BAT+

2.BAT+

3.ID

4.B/I

5.TS

6.SMD

7.SMC

8.GND

9.GND

BATT-OVP=0.111*BATT+

LI-3S :13.5V----BATT-OVP=1.5V

PD11

1SS355_SOD323-2

1 2

PR327

6.49K_0402_1%~D

1 2

PR337

86.6K_0402_1%

12

PR331

10.7K_0402_1%~D

12

PR329

100_0402_5%~D

1 2

PR334

205K_0402_1%~D

1 2

PC278

0.01U_0402_25V7K~D

12

PC283

1000P_0402_50V7K~D

12

PR324

47K_0402_5%~D

1 2

PR332

499K_0402_1%~D

12

PD14

DA204U_SOT323~D

@

2

3

1

PD12

DA204U_SOT323~D

@

2

3

1

PC288

100P_0402_50V8J~D

12

PC284

1U_0603_10V6K~D

12

PR336

150K_0402_1%~D

1 2

PC280

0.1U_0402_16V7K~D

@

1 2

PR326

1K_0402_5%~D

12

PR333

147K_0402_1%~D

1 2

PH4

100K_0603_1%_TH11-4H104FT

12

PC289

100P_0402_50V8J~D

12

PD15

DA204U_SOT323~D

@

2

3

1

PU22B

LM358ADR_SO8

+5

-6

0

7

P8

G

4

PC282

0.01U_0402_25V7K~D

12

PR338

150K_0402_1%~D

12

PL28

HCB4532KF-800T90_1812

1 2

PC279

1000P_0402_50V7K~D

12

PJP19

SUYIN_200275MR009G186ZL

@

11

33

44

55

66

88

99

22

77

GND

11 GND

10

PR325

1K_0402_5%~D

1 2

PR328

100_0402_5%~D

1 2

PC281

0.1U_0603_25V7K~D

1 2

PR335

61.9K_0402_1%~D

1 2

PD13

DA204U_SOT323~D

@

2

3

1

PR330

453K_0402_1%~D

12

PU22A

LM358ADR_SO8

+

3

-

201

P8

G

4

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-4231P

0.1

EE PIR-1

Custom

51 49Thursday, January 10, 2008

2007/1/15 2008/1/15

Page 1/1

Solution Description Rev.Page# Title

Version Change List ( P. I. R. List )

Item Issue DescriptionDate Request

Owner

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

Compal Electronics, Inc.

40 P40-OZ129_Card Reader/1394 07/10/30 compal CardBus vendor change CardBus R5C833 change to OZ129 0.2

29 P29-EC KB926/REED SW/TPM1.2 07/10/30 compal Change pull up resistance Change EC pin17,18 pull up to 4.7Kohm 0.2

29 P29-EC KB926/REED SW/TPM1.2 07/10/30 compal Need pull up NET MIC_DIAG pull up R to 10Kohm 3VS 0.2

0.229 P29-EC KB926/REED SW/TPM1.2 07/10/30 compal board rev update to 0.2 R231 change to 15K & R232 pop

13,14 DDR2 SODIMM-I,II Socket compal Change Capacitance Change C84,C189 to SGA00002680 330U 0.2

29 P29-EC KB926/REED SW/TPM1.2 compal EC update rev EC change to 926C 0.2

28 P28-Express card compal

07/10/30

07/10/30

07/10/30

Express card can't detect POWER IC(U11) ADD PIN10 CPUSB# PIN9 EXPR_CPUSB#S 0.2

32 P32-USB/ BlueTooth/

FP/ Felica 07/10/30 compal BLUETOOTH CONN USB+- change 0.2Bluetooth can't detect

42 P42-Screws 07/10/30 compal FIDUCAL no enough ADD FIDUCAL*4 0.2

41 P41-DC/DC Interface 07/10/30 compal Need pull down SYSON pull down 10K ohm 0.2

41 P41-DC/DC Interface 07/11/12 compal USB can't detect SUSP change to 5VALW(Q32) 0.2

06 P06-Merom(3/3)-GND/Bypass 07/11/12 compal Change CPU High Frequence Decoupling Capacitance C195 change to C1150~C1181 0.2

41 P41-DC/DC Interface 07/11/13 compal +1.8VS Discharge circuit Q65 net change to VGA_PWGOD# 0.2+1.8VS Discharge error

41 P41-DC/DC Interface 07/11/16 compal Delete Remove SIM card connector 0.2

42 P42-Screws 07/11/16 compal Change Holea size Change Holea size 2.5 to 2.8, change 3.5 to 3.8 0.2

31 P31-PWR_OK/ BTN/ KB /

TouchPad 07/11/21 compal Change Touch PAD/B connector Touch PAD/B connector change net 0.2

15 P15-CRT Conn.& LCD Conn. 07/11/21 compal Add LCD control pin Add LCD control pin LCD_CBL_DET# & LCD_TST & LCD_VCC_TEST_EN 0.2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

LA-3682P

0.1

PW PIR-1

Custom

52 9Thursday, January 10, 2008

2007/1/15 2008/1/15

Page 1/1

Solution Description Rev.Page# Title

Version Change List ( P. I. R. List )

Item Issue DescriptionDate Request

Owner

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

4

28

29

30

31

32

Compal Electronics, Inc.

41 +3VALWP/+5VALWP 07/11/19 COMPAL When in the DC-mode , shut down the system ,5valwp output not turn off ADD PQ79 to turn off 5VALWP wehn shut down the system in the DC-mode

change charge voltage can to adjustCOMPAL07/12/26Charge44 Change PR53 from 15K to 4.3K

COMPAL Increase Resistor 0ohm on CPU_CORE high side gate for EMI request

49 CPU_CORE 07/12/26 ADD PR163 PR184

+3VALWP/+5VALWP

45 07/12/26 COMPAL The schematic location is wrong DEL PL19

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