Compal LA 5051P Schematics. Www.s Manuals.com. R0.3 Schematics

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Page Count: 47

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A
B
B
C
C
D
D
E
E
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4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
Cover Page
B
146Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
AMD Griffin Processor with RS780M+SB700
KBYF0 Schematics Document
REV:0.3
Compal Confidential
(With ATI MXM/B)
2009-01-22
ZZZ1
PCB
DA60000B600-*
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBKC0 LA-5051P
0.3
Block Diagrams
B
246Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
Power On/Off CKT.
Touch Pad
page 32
CRT Conn.
LPC BUS
page 33
Compal Confidential
BGA-528
page 18
MDC 1.5
Conn
page 34
Int.KBD
page 31
BANK 0, 1, 2, 3
USB Conn
x4
A link
Express2
DC/DC Interface CKT.
AMD S1G2 Processor
page 32
3.3V 48MHz
Hyper Transport Link
16 x 16
Clock Generator
ICS9LPRS488B
page 30
CIR
Fan Control
Power Circuit DC/DC
uPGA-638 Package
page 32
200pin DDRII-SO-DIMM X2
page 37
ATI RS780M
EC ROM
page 5
1.8V DDRII 667/800
page 4,5,6,7
page 31
HDA Codec
ALC272
page 15
Memory BUS(DDRII)
BGA-528
HD Audio
page 36
page 10,11,12,13
ATI SB700
Thermal Sensor
page 8,9
page 19,20,21,22,23
page 31
ENE KB926
Audio AMP
TPA6017
LCD Conn.
Bluetooth
Conn
3.3V 24MHz
Phone Jack x2
Model Name : KBYF0
RTC CKT.
page 19
page 16
Dual Channel
page 34
page 39,40,41
42,43,44,45
S-ATA
page 24
SATA HDD
Conn.
page 28
USB/B Conn.
ADM1032
page 31
BTN/B Conn.
port 0
USB port 0,1,2,6
CMOS
Camera
USB port 0,1,2,6
USB
page 31
LED/B Conn. SATA ODD
Conn.
page 24
page 17
HDMI Conn.
PCI-Express 16x
MXM III VGA/B
RJ45
LAN(GbE)
B5784M
page 26
MINI Card x2
TV-Tuner WLAN
page 27
page 28
PCI-Express 1x
port 2
USB port 3 USB port 12 USB port4
port 3port 1,2
page 14
page 29 page 16 page 29
5 in 1
Socket
page 25
Mono AMP
(for Woofer)
page 34
Digital/Analog MIC.
Int. MIC
page 33
File Name: LA-5051P
page 31
Media/B Conn.
page 31
FUN/B Conn.
page 21
BIOS ROM
SPI
Card Reader
RTS5159
page 25
port1
page 24
Second SATA
HDD Conn.
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
Notes List
B
346Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
Voltage Rails
VIN
B+
+CPU_CORE_0
+1.1VS
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
1.05V switched power rail
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
EC SM Bus1 address
Device
ADI ADM1032
S1 S3 S5
ON OFF
ON
N/A N/A N/A
N/AN/AN/A
Power Plane Description
OFF
OFF
ON
OFF
OFF
OFF
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
OFFON
ON
ON
ON
OFF
ON*
OFF
OFF
ON
EC SM Bus2 address
Device
Smart Battery
ON
EEPROM(24C16/02)
1001 100X b0001 011X b
1010 000X b
OFF OFF
SB700
SM Bus 0 address
Device
Clock Generator
(ICS9LPRS365)
Address
Address Address
1101 001Xb
ON ON*
ON OFF OFF
STATE SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
Board ID / SKU ID Table for AD channel
ON
OFF
OFF
DDR DIMM0
1001 000Xb
DDR DIMM2
1001 010Xb
Vcc 3.3V +/- 5%
100K +/- 5%Ra/Rc/Re
Board ID
Rb / Rd / Rf V min
0
1
2
3
0
8.2K +/- 5%
0 V
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
0.503 V
0.819 V
0.538 V
0.875 V
AD_BID
Vtyp
AD_BID
V
AD_BID
max
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
3.300 V
0 V 0 V
4
5
6
7NC
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
2.200 V
3.300 V
2.341 V
1.185 V 1.264 V
Board ID
0
1
2
3
4
5
6
7
PCB Revision
0.1
+0.9V 0.9V switched power rail for DDR terminator
+RTCVCC RTC power
+1.5VS
+1.8VS 1.8V switched power rail
+2.5VS
+5VS
+3VS
+5VALW
+1.8V
2.5V for CPU_VDDA and MXM/B
+3VALW
1.8V power rail for CPU VDDIO and DDR
3.3V always on power rail
5V always on power rail
3.3V switched power rail
5V switched power rail
+VSB VSB always on power rail ON ON*
ONON
ON
ON
1.5V power rail for PCIE Card
BOARD ID Table BTO Option Table
BTO Item BOM Structure
VGA@
UMA@
Discrete
MXM GMT G781-1
1001 101X b
UMA
+1.2V_HT 1.25V switched power rail ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON ON
No PCI device
Minicard
Minicard
Device Address
Lan
1001 101X b
CPU SB
SB700
SM Bus 1 address
ON
+NB_CORE OFFOFFON1.0V~1.1V switched power rail for NB VDDC
ON
+CPU_CORE_1 Core voltage for CPU ON OFF OFF
+CPU_CORE_NB Core voltage for CPU ON OFF OFF
PROJECT ID Table
Board ID
0
1
2
3
4
5
6
7
PROJECT
KBKC0 (SJM70)
KBYF0 (SJV70)
0.2
0.3 0.4 1.0*
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_CADIN1
H_CADIN0
H_CADIP3
H_CADIN2
H_CADIP2
H_CADIP1
H_CADIN3
H_CADIP4
H_CADIN5
H_CADIN4
H_CADIP5
H_CADIN6
H_CADIN8
H_CADIN7
H_CADIN9
H_CADIP8
H_CADIP6
H_CADIP7
H_CADIN10
H_CADIP10
H_CADIN11
H_CADIP11
H_CADIP9
H_CADIN13
H_CADIN12
H_CADIP14
H_CADIP12
H_CADIN14
H_CADIP0
H_CADIN15
H_CADIP15
H_CADIP13
H_CADON15
H_CTLON0
H_CTLOP0H_CTLIP0
H_CTLIN0
H_CLKIN0
H_CLKIP1
H_CLKIP0
H_CLKIN1
H_CTLIP1 H_CTLON1H_CTLIN1 H_CTLOP1
H_CLKON1
H_CADOP13
H_CADON2
H_CADON3
H_CADON9
H_CADON6
H_CADON0
H_CADOP11
H_CADOP8
H_CADOP6
H_CADON13
H_CADOP1
H_CADOP2
H_CADOP4
H_CADOP5
H_CADON12
H_CADON7
H_CADON5
H_CLKOP0
H_CLKOP1
H_CADON10
H_CADON8
H_CADON4
H_CADON1
H_CADOP12
H_CADOP15
H_CLKON0
H_CADOP9
H_CADOP10
H_CADOP14
H_CADOP7
H_CADOP3
H_CADOP0
H_CADON14
H_CADON11
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADIP[0..15]
+1.2V_HT
+1.2V_HT
+1.2V_HT
H_CADIP[0..15]<10>
H_CADIN[0..15]<10>
H_CADOP[0..15] <10>
H_CADON[0..15] <10>
H_CLKIP0<10> H_CLKIN0<10> H_CLKIP1<10> H_CLKIN1<10>
H_CTLIP0<10> H_CTLIN0<10> H_CTLIP1<10> H_CTLIN1<10>
H_CLKOP0 <10>
H_CLKON0 <10>
H_CLKOP1 <10>
H_CLKON1 <10>
H_CTLOP0 <10>
H_CTLON0 <10>
H_CTLOP1 <10>
H_CTLON1 <10>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
AMD CPU S1G2 HT I/F
Custom
446Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
250 mil
VLDT=500mA
Athlon 64 S1
Processor Socket
Near CPU Socket
VLDT CAP.
C518
0.22U_0603_16V4Z
1
2
C533 4.7U_0805_10V4Z
1 2
HT LINK
JCPU1A
6090022100G_B
CONN@
VLDT_A3
D4 VLDT_A2
D3 VLDT_A1
D2 VLDT_A0
D1
VLDT_B3 AE5
VLDT_B2 AE4
VLDT_B1 AE3
VLDT_B0 AE2
L0_CADIN_H15
N5
L0_CADIN_L15
P5
L0_CADIN_H14
M3
L0_CADIN_L14
M4
L0_CADIN_H13
L5
L0_CADIN_L13
M5
L0_CADIN_H12
K3
L0_CADIN_L12
K4
L0_CADIN_H11
H3
L0_CADIN_L11
H4
L0_CADIN_H10
G5
L0_CADIN_L10
H5
L0_CADIN_H9
F3
L0_CADIN_L9
F4
L0_CADIN_H8
E5
L0_CADIN_L8
F5
L0_CADIN_H7
N3
L0_CADIN_L7
N2
L0_CADIN_H6
L1
L0_CADIN_L6
M1
L0_CADIN_H5
L3
L0_CADIN_L5
L2
L0_CADIN_H4
J1
L0_CADIN_L4
K1
L0_CADIN_H3
G1
L0_CADIN_L3
H1
L0_CADIN_H2
G3
L0_CADIN_L2
G2
L0_CADIN_H1
E1
L0_CADIN_L1
F1
L0_CADIN_H0
E3
L0_CADIN_L0
E2
L0_CADOUT_H15 T4
L0_CADOUT_L15 T3
L0_CADOUT_H14 V5
L0_CADOUT_L14 U5
L0_CADOUT_H13 V4
L0_CADOUT_L13 V3
L0_CADOUT_H12 Y5
L0_CADOUT_L12 W5
L0_CADOUT_H11 AB5
L0_CADOUT_L11 AA5
L0_CADOUT_H10 AB4
L0_CADOUT_L10 AB3
L0_CADOUT_H9 AD5
L0_CADOUT_L9 AC5
L0_CADOUT_H8 AD4
L0_CADOUT_L8 AD3
L0_CADOUT_H7 T1
L0_CADOUT_L7 R1
L0_CADOUT_H6 U2
L0_CADOUT_L6 U3
L0_CADOUT_H5 V1
L0_CADOUT_L5 U1
L0_CADOUT_H4 W2
L0_CADOUT_L4 W3
L0_CADOUT_H3 AA2
L0_CADOUT_L3 AA3
L0_CADOUT_H2 AB1
L0_CADOUT_L2 AA1
L0_CADOUT_H1 AC2
L0_CADOUT_L1 AC3
L0_CADOUT_H0 AD1
L0_CADOUT_L0 AC1
L0_CLKIN_H1
J5
L0_CLKIN_L1
K5
L0_CLKIN_H0
J3
L0_CLKIN_L0
J2
L0_CTLIN_H1
P3
L0_CTLIN_L1
P4
L0_CTLIN_H0
N1
L0_CTLIN_L0
P1
L0_CLKOUT_H1 Y4
L0_CLKOUT_L1 Y3
L0_CLKOUT_H0 Y1
L0_CLKOUT_L0 W1
L0_CTLOUT_H1 T5
L0_CTLOUT_L1 R5
L0_CTLOUT_H0 R2
L0_CTLOUT_L0 R3
C535
4.7U_0805_10V4Z
1
2
C534
4.7U_0805_10V4Z
1
2
C517
180P_0402_50V8J
1
2
C520
0.22U_0603_16V4Z
1
2
C516
180P_0402_50V8J
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRB_SMA10
DDRB_SMA7
DDRB_SMA1
DDRB_SMA12
DDRB_SMA6
DDRB_SMA11
DDRB_SMA0
DDRB_SMA9
DDRB_SMA15
DDRB_SMA3
DDRB_SMA5
DDRB_SMA8
DDRB_SMA13
DDRB_SMA2
DDRB_SMA4
DDRB_CKE1
DDRB_SDQ0
DDRB_CKE0
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS7
DDRB_SDQS7#
DDRB_SDQS3
DDRB_SDQS3#
DDRA_CLK1
DDRA_CLK1#
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7#
DDRA_SDQS7
MBMZP
MBMZN VTT_SENSE
DDRA_CLK0
DDRA_CLK0#
+MCH_REF
DDRB_ODT0
DDRB_ODT1
DDRA_ODT1
DDRA_ODT0
DDRB_CLK0#
DDRB_CLK0
DDRB_CLK1
DDRB_CLK1#DDRA_CLK1#
DDRA_CLK0#
DDRA_CLK0
DDRA_CLK1
DDRA_CKE0
DDRA_CKE1
DDRB_SDM6
DDRB_SDM4
DDRB_SDM2
DDRB_SDM0
DDRB_SDM5
DDRB_SDM3
DDRB_SDM1
DDRB_SDM7 DDRA_SDM6
DDRA_SDM5
DDRA_SDM4
DDRA_SDM3
DDRA_SDM2
DDRA_SDM1
DDRA_SDM0
DDRA_SDM7
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRA_SWE#
DDRA_SCAS#
DDRA_SRAS#
DDRA_SBS2#
DDRA_SBS1#
DDRA_SBS0#
DDRA_SMA15
DDRA_SMA12
DDRA_SMA14
DDRA_SMA13
DDRA_SMA11
DDRA_SMA10
DDRA_SMA6
DDRA_SMA1
DDRA_SMA7
DDRA_SMA2
DDRA_SMA3
DDRA_SMA8
DDRA_SMA5
DDRA_SMA4
DDRA_SMA9
DDRA_SMA0
DDRB_SMA14
DDRA_SCS1# DDRB_SCS0#
DDRB_SCS1#
DDRA_SCS0#
+MCH_REF
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
+1.8V
+0.9V+0.9V
+1.8V
DDRA_ODT0<8> DDRA_ODT1<8>
DDRA_SCS0#<8> DDRA_SCS1#<8>
DDRA_CKE0<8> DDRA_CKE1<8>
DDRA_CLK0<8> DDRA_CLK0#<8> DDRA_CLK1<8> DDRA_CLK1#<8>
DDRA_SMA[15..0]<8>
DDRA_SBS0#<8> DDRA_SBS1#<8> DDRA_SBS2#<8>
DDRA_SRAS#<8> DDRA_SCAS#<8> DDRA_SWE#<8>
DDRB_ODT0 <9>
DDRB_ODT1 <9>
DDRB_SCS0# <9>
DDRB_SCS1# <9>
DDRB_CKE0 <9>
DDRB_CKE1 <9>
DDRB_CLK0 <9>
DDRB_CLK0# <9>
DDRB_CLK1 <9>
DDRB_CLK1# <9>
DDRB_SMA[15..0] <9>
DDRB_SDM[7..0]<9>
DDRB_SDQS0<9> DDRB_SDQS0#<9> DDRB_SDQS1<9> DDRB_SDQS1#<9> DDRB_SDQS2<9> DDRB_SDQS2#<9> DDRB_SDQS3<9> DDRB_SDQS3#<9> DDRB_SDQS4<9> DDRB_SDQS4#<9> DDRB_SDQS5<9> DDRB_SDQS5#<9> DDRB_SDQS6<9> DDRB_SDQS6#<9> DDRB_SDQS7<9> DDRB_SDQS7#<9>
DDRB_SBS0# <9>
DDRB_SBS1# <9>
DDRB_SBS2# <9>
DDRB_SRAS# <9>
DDRB_SCAS# <9>
DDRB_SWE# <9>
DDRB_SDQ[63..0]<9> DDRA_SDQ[63..0] <8>
DDRA_SDM[7..0] <8>
DDRA_SDQS0 <8>
DDRA_SDQS0# <8>
DDRA_SDQS1 <8>
DDRA_SDQS1# <8>
DDRA_SDQS2 <8>
DDRA_SDQS2# <8>
DDRA_SDQS3 <8>
DDRA_SDQS3# <8>
DDRA_SDQS4 <8>
DDRA_SDQS4# <8>
DDRA_SDQS5 <8>
DDRA_SDQS5# <8>
DDRA_SDQS6 <8>
DDRA_SDQS6# <8>
DDRA_SDQS7 <8>
DDRA_SDQS7# <8>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
AMD CPU S1G2 DDRII I/F
Custom
546Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
Athlon 64 S1
Processor
Socket
Athlon 64 S1
Processor Socket
Place them close to CPU within 1"
Processor DDR2 Memory Interface
C244
1.5P_0402_50V9C
1
2
MEM:DATA
JCPU1C
6090022100G_B
CONN@
MB_DATA63
AD11 MB_DATA62
AF11 MB_DATA61
AF14 MB_DATA60
AE14 MB_DATA59
Y11 MB_DATA58
AB11 MB_DATA57
AC12 MB_DATA56
AF13 MB_DATA55
AF15 MB_DATA54
AF16 MB_DATA53
AC18 MB_DATA52
AF19 MB_DATA51
AD14 MB_DATA50
AC14 MB_DATA49
AE18 MB_DATA48
AD18 MB_DATA47
AD20 MB_DATA46
AC20 MB_DATA45
AF23 MB_DATA44
AF24 MB_DATA43
AF20 MB_DATA42
AE20 MB_DATA41
AD22 MB_DATA40
AC22 MB_DATA39
AE25 MB_DATA38
AD26 MB_DATA37
AA25 MB_DATA36
AA26 MB_DATA35
AE24 MB_DATA34
AD24 MB_DATA33
AA23 MB_DATA32
AA24 MB_DATA31
G24 MB_DATA30
G23 MB_DATA29
D26 MB_DATA28
C26 MB_DATA27
G26 MB_DATA26
G25 MB_DATA25
E24 MB_DATA24
E23 MB_DATA23
C24 MB_DATA22
B24 MB_DATA21
C20 MB_DATA20
B20 MB_DATA19
C25 MB_DATA18
D24 MB_DATA17
A21 MB_DATA16
D20 MB_DATA15
D18 MB_DATA14
C18 MB_DATA13
D14 MB_DATA12
C14 MB_DATA11
A20 MB_DATA10
A19 MB_DATA9
A16 MB_DATA8
A15 MB_DATA7
A13 MB_DATA6
D12 MB_DATA5
E11 MB_DATA4
G11 MB_DATA3
B14 MB_DATA2
A14 MB_DATA1
A11 MB_DATA0
C11
MA_DATA63 AA12
MA_DATA62 AB12
MA_DATA61 AA14
MA_DATA60 AB14
MA_DATA59 W11
MA_DATA58 Y12
MA_DATA57 AD13
MA_DATA56 AB13
MA_DATA55 AD15
MA_DATA54 AB15
MA_DATA53 AB17
MA_DATA52 Y17
MA_DATA51 Y14
MA_DATA50 W14
MA_DATA49 W16
MA_DATA48 AD17
MA_DATA47 Y18
MA_DATA46 AD19
MA_DATA45 AD21
MA_DATA44 AB21
MA_DATA43 AB18
MA_DATA42 AA18
MA_DATA41 AA20
MA_DATA40 Y20
MA_DATA39 AA22
MA_DATA38 Y22
MA_DATA37 W21
MA_DATA36 W22
MA_DATA35 AA21
MA_DATA34 AB22
MA_DATA33 AB24
MA_DATA32 Y24
MA_DATA31 H22
MA_DATA30 H20
MA_DATA29 E22
MA_DATA28 E21
MA_DATA27 J19
MA_DATA26 H24
MA_DATA25 F22
MA_DATA24 F20
MA_DATA23 C23
MA_DATA22 B22
MA_DATA21 F18
MA_DATA20 E18
MA_DATA19 E20
MA_DATA18 D22
MA_DATA17 C19
MA_DATA16 G18
MA_DATA15 G17
MA_DATA14 C17
MA_DATA13 F14
MA_DATA12 E14
MA_DATA11 H17
MA_DATA10 E17
MA_DATA9 E15
MA_DATA8 H15
MA_DATA7 E13
MA_DATA6 C13
MA_DATA5 H12
MA_DATA4 H11
MA_DATA3 G14
MA_DATA2 H14
MA_DATA1 F12
MA_DATA0 G12
MB_DM7
AD12 MB_DM6
AC16 MB_DM5
AE22 MB_DM4
AB26 MB_DM3
E25 MB_DM2
A22 MB_DM1
B16 MB_DM0
A12
MB_DQS_H7
AF12
MB_DQS_L7
AE12
MB_DQS_H6
AE16
MB_DQS_L6
AD16
MB_DQS_H5
AF21
MB_DQS_L5
AF22
MB_DQS_H4
AC25
MB_DQS_L4
AC26
MB_DQS_H3
F26
MB_DQS_L3
E26
MB_DQS_H2
A24
MB_DQS_L2
A23
MB_DQS_H1
D16
MB_DQS_L1
C16
MB_DQS_H0
C12
MB_DQS_L0
B12
MA_DM7 Y13
MA_DM6 AB16
MA_DM5 Y19
MA_DM4 AC24
MA_DM3 F24
MA_DM2 E19
MA_DM1 C15
MA_DM0 E12
MA_DQS_H7 W12
MA_DQS_L7 W13
MA_DQS_H6 Y15
MA_DQS_L6 W15
MA_DQS_H5 AB19
MA_DQS_L5 AB20
MA_DQS_H4 AD23
MA_DQS_L4 AC23
MA_DQS_H3 G22
MA_DQS_L3 G21
MA_DQS_H2 C22
MA_DQS_L2 C21
MA_DQS_H1 G16
MA_DQS_L1 G15
MA_DQS_H0 G13
MA_DQS_L0 H13
C447
1.5P_0402_50V9C
1
2
C509
1.5P_0402_50V9C
1
2
R78
1K_0402_1%
1 2
T2PAD
@
C178
1.5P_0402_50V9C
1
2
C181
0.1U_0402_16V4Z
1
2
T17PAD
@
MEM:CMD/CTRL/CLK
JCPU1B
CONN@
VTT1
D10
VTT2
C10
VTT3
B10
VTT4
AD10
VTT5 W10
VTT6 AC10
VTT7 AB10
VTT8 AA10
VTT9 A10
MA1_ODT1
V19 MA1_ODT0
U21 MA0_ODT1
V22 MA0_ODT0
T19
MB1_ODT0 Y26
MB0_ODT1 W23
MB0_ODT0 W26
RSVD_M2 B18
MB1_CS_L0 U22
MB0_CS_L1 W25
MB0_CS_L0 V26
MA0_CS_L1
U19
MA1_CS_L1
V20 MA1_CS_L0
U20
MA0_CS_L0
T20
MA_ADD15
K19 MA_ADD14
K24 MA_ADD13
V24 MA_ADD12
K20 MA_ADD11
L22 MA_ADD10
R21 MA_ADD9
K22 MA_ADD8
L19 MA_ADD7
L21 MA_ADD6
M24 MA_ADD5
L20 MA_ADD4
M22 MA_ADD3
M19 MA_ADD2
N22 MA_ADD1
M20 MA_ADD0
N21
MA_BANK2
J21 MA_BANK1
R23 MA_BANK0
R20
MA_RAS_L
R19
MA_CAS_L
T22
MA_WE_L
T24
MEMZP
AF10
MEMZN
AE10 VTT_SENSE Y10
MEMVREF W17
MA_CLK_H3
P19
MA_CLK_L3
P20
MA_CLK_H2
Y16
MA_CLK_L2
AA16
MA_CLK_H1
E16
MA_CLK_L1
F16
MA_CLK_H0
N19
MA_CLK_L0
N20
MB_CLK_H3 R26
MB_CLK_L3 R25
MB_CLK_H2 AF18
MB_CLK_L2 AF17
MB_CLK_H1 A17
MB_CLK_L1 A18
MB_CLK_H0 P22
MB_CLK_L0 R22
MA_CKE0
J22
MA_CKE1
J20 MB_CKE0 J25
MB_CKE1 H26
MB_ADD15 J24
MB_ADD14 J23
MB_ADD13 W24
MB_ADD12 L25
MB_ADD11 L26
MB_ADD10 T26
MB_ADD9 K26
MB_ADD8 M26
MB_ADD7 L24
MB_ADD6 N25
MB_ADD5 L23
MB_ADD4 N26
MB_ADD3 N23
MB_ADD2 P26
MB_ADD1 N24
MB_ADD0 P24
MB_BANK2 J26
MB_BANK1 U26
MB_BANK0 R24
MB_RAS_L U25
MB_CAS_L U24
MB_WE_L U23
RSVD_M1
H16
T5 PAD @
R352 39.2_0402_1%
1 2
R79
1K_0402_1%
1 2
R343 39.2_0402_1%
1 2
C189
1000P_0402_50V7K
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CPU_DBRDY
CPU_TDO
CPU_TMS
CPU_TCK
CPU_TDI
CPU_TRST#
CPU_DBREQ#
CPU_HTREF0
CPU_HTREF1
TEST25_L
CPU_DBRDY
CPU_TMS
TEST25_H
CPU_TEST19_PLLTEST0
CPU_CLKIN_SC_P
CPU_THERMTRIP#_R
LDT_RST#
H_PWRGD
LDT_STOP#
THERMDA_CPU
LDT_STOP#
THERMDC_CPU
CPU_SID
CPU_SIC
CPU_LDT_REQ#
CPU_CLKIN_SC_N
CPU_TDI
CPU_TRST#
CPU_TCK CPU_DBREQ#
CPU_TDO
CPU_SVC
CPU_SVD
CPU_TEST12_SCANSHIFTENB
CPU_TEST20_SCANCLK2
CPU_TEST21_SCANEN
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST29_L_FBCLKOUT_N
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST14_BP0
CPU_TEST15_BP1
CPU_TEST28_L_PLLCHRZ_N
CPU_TEST28_H_PLLCHRZ_P
LDT_RST#
H_PWRGD
LDT_RST#
CPU_TEST23_TSTUPD
CPU_MEMHOT#_1.8V
CPU_SVC
CPU_SVD
CPU_TEST27_SINGLECHAIN
H_PROCHOT#
THERMDA_CPU
THERMDC_CPU
EC_SMB_CK2
EC_SMB_DA2
H_P ROCHOT#
MAINPWON
H_THERMTRIP#CPU_THERMTRIP#_R
CPU_SIC
CPU_SID
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
CPU_VDD0_FB_H
CPU_VDD0_FB_L
CPU_VDD1_FB_H
CPU_VDD1_FB_L
CPU_VDD0_FB_L
CPU_VDD0_FB_H
CPU_VDD1_FB_H
CPU_VDD1_FB_L
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
CPU_TEST18_PLLTEST1
HDT_RST#
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
HDT_RST#
CPU_TEST21_SCANEN
CPU_TEST24_SCANCLK1
CPU_TEST20_SCANCLK2
TEST25_H TEST25_L
CPU_TEST10
CPU_TEST10
CPU_TEST23_TSTUPD
CPU_TEST22_SCANSHIFTEN
CPU_TEST18_PLLTEST1
CPU_TEST19_PLLTEST0
+1.8V
+1.2V_HT
+2.5VDDA
+2.5VS
+3VS
+1.8V
+1.8VS
+1.8VS
+1.8VS
+3VS
+1.8V
+1.8V
+3VS
+1.8V
+1.8V
+1.8V
+CPU_CORE_0
+CPU_CORE_1
+CPU_CORE_NB
+1.8V
+1.8VS +1.8VS
+1.2V_HT
CLK_CPU_BCLK<15>
CLK_CPU_BCLK#<15> CPU_LDT_REQ#<11>
LDT_RST#<19>
H_PWRGD<19>
LDT_STOP#<11,19>
CPU_VDD0_FB_H<44> CPU_VDD0_FB_L<44>
CPU_VDD1_FB_H<44> CPU_VDD1_FB_L<44>
CPU_SID_SB<20>
CPU_SIC_SB<20>
EC_SMB_DA1 <14,30,38>
EC_SMB_CK1 <14,30,38>
EC_SMB_CK2 <30>
EC_SMB_DA2 <30>
SB_PWRGD <20,32>
MAINPWON <38,39>
H_THERMTRIP# <20>
CPU_SVC <44>
CPU_SVD <44>
CPU_VDDNB_FB_H <44>
CPU_VDDNB_FB_L <44>
H_PROCHOT# <19>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
AMD CPU S1G2 CTRL
Custom
646Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
HDT Connector
NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY.
0718 AMD --> 1K ohm
Place close to CPU wihtin 1.5"
VDDA=300mA
as short as possible
route as differential
testpoint under package
A:Need to re-Link "SGN00000200"
+1.8V sense no support
2200p change to
1000p for ADT7421
Address:100_1101
FDV301N, the Vgs is:
min = 0.65V
Typ = 0.85V
Max = 1.5V
EC is PU to 5VALW
2.09V for Gate
Address:100_1100
Close to CPU
Close to CPU
CPU internal thermal sensor
C449 3300p for tigris
T9PAD
@
R415 1K_0402_5%
1 2
R86 44.2_0402_1%
1 2
C531 3900P_0402_50V7K
1 2
R531 300_0402_5% @
1 2
T27 PAD @
T30
PAD@
R358 300_0402_5%
1 2
R351
20K_0402_5%
@12
R92 10_0402_5%
1 2
R361
390_0402_5%
12
U8
NC7SZ08P5X_NL_SC70-5@
B2
A1
Y
4
P5
G
3
C554
0.01U_0402_16V7K
@
1
2
T23 PAD @
R129300_0402_5%
12
R113
300_0402_5%
1 2
R357 300_0402_5%
1 2
C532 3900P_0402_50V7K
1 2
C245
0.01U_0402_16V7K
@
1
2
R80 10_0402_5%
1 2
R567 0_0402_5%@
1 2
R538 300_0402_5%
1 2
C436 0.1U_0402_16V4Z
@
1 2
JP29
ACES_85201-1005N
@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
GND
11
GND
12
R118220_0402_5%
@
12
JCPU1D
6090022100G_B
VDDA1
F8
VDDA2
F9
RESET_L
B7
PWROK
A7
LDTSTOP_L
F10
SIC
AF4
SID
AF5
HT_REF1
P6 HT_REF0
R6
VDD0_FB_H
F6
VDD0_FB_L
E6 VDDIO_FB_H W9
VDDIO_FB_L Y9
THERMTRIP_L AF6
PROCHOT_L AC7
RSVD2
A5
LDTREQ_L
C6
SVC A6
SVD A4
RSVD6 C5
RSVD4
B5
RSVD1
A3
CLKIN_H
A9
CLKIN_L
A8
DBRDY
G10
TMS
AA9
TCK
AC9
TRST_L
AD9
TDI
AF9
DBREQ_L E10
TDO AE9
TEST25_H
E9
TEST25_L
E8
TEST19
G9 TEST18
H10
RSVD8 AA7
TEST9
C2
TEST17 D7
TEST16 E7
TEST15 F7
TEST14 C7
TEST12
AC8
TEST7 C3
TEST6
AA6
THERMDC W7
THERMDA W8
VDD1_FB_H
Y6
VDD1_FB_L
AB6
TEST29_H C9
TEST29_L C8
TEST24
AE7
TEST23
AD7
TEST22
AE8
TEST21
AB8
TEST20
AF7
TEST28_H J7
TEST28_L H8
TEST27
AF8
ALERT_L
AE6
TEST10 K8
TEST8 C4
RSVD3
B3
RSVD5
C1
VDDNB_FB_H H6
VDDNB_FB_L G6
RSVD7 D5
KEY2 W18
MEMHOT_L AA8
RSVD10 H18
RSVD9 H19
KEY1 M11
T26 PAD @
T15PAD
@
L33
FBM_L11_201209_300L_0805
1 2
T29
PAD@
R365
390_0402_5%
12
T7PAD
@
R356 1K_0402_5%
@
1 2
SAMTEC_ASP-68200-07
JP1
@
2
4
6
8
10
12
14
16
18
20
22
2423
21
19
17
15
13
11
9
7
5
3
1
26
R335 0_0402_5%@
1 2
E
B
C
Q32
MMBT3904_NL_SOT23-3
2
3 1
R420
300_0402_5%
1 2
T22 PAD @
R93 0_0402_5%
1 2
G
D
S
Q30 FDV301N_NL_SOT23-3@
2
13
R370 0_0402_5%
1 2
T16PAD
@
R112220_0402_5%
@
12
G
D
S
Q31 FDV301N_NL_SOT23-3@
2
13
R409
169_0402_1%
12
T8PAD
@
R101 10_0402_5%
1 2
R532 300_0402_5% @
1 2
T3PAD
@
R419
300_0402_5%
1 2
C261
0.22U_0603_16V4Z
1
2
C446
0.1U_0402_16V4Z
1
2
R535 300_0402_5%
@
1 2
R353
300_0402_5%
12
R107
300_0402_5%
@
1 2
U27
ADM1032ARMZ_MSOP8
VDD
1
ALERT# 6
THERM#
4GND 5
D+
2
D-
3
SCLK 8
SDATA 7
R98
300_0402_5%@
1 2
T25 PAD @
C2644.7U_0805_10V4Z
<BOM Structure>
1
2
R95 10_0402_5%
1 2 R337
0_0402_5%
@
12
R108
300_0402_5% @
1 2
R569 0_0402_5%@
1 2
R82 44.2_0402_1%
1 2
C449
2200P_0402_50V7K
1 2
C255
3300P_0402_50V7K
1
2
T21 PAD @
R537 300_0402_5%
@
1 2
R81 10_0402_5%
1 2
T10 PAD @
C553
0.01U_0402_16V7K
@
1
2
R360
34.8K_0402_1%~N
@12
R533 300_0402_5% @
1 2
T28 PAD @
T4PAD
@
R565 0_0402_5%@
1 2
R418 0_0402_5%
1 2
T6PAD
@
R105
300_0402_5%
@
1 2
R416 1K_0402_5%
1 2
R539 300_0402_5%
1 2
R115220_0402_5%
@
12
T24 PAD @
R119220_0402_5%
@
12
R334 0_0402_5%
1 2
R364 10K_0402_5%
1 2
R106 10_0402_5%
1 2
+
C282
150U_D2_6.3VM
1
2
R564 0_0402_5%@
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+CPU_CORE_0
+0.9V
+CPU_CORE_0
+CPU_CORE_0
+CPU_CORE_0
+1.8V
+1.8V
+1.8V
+1.8V +1.8V
+0.9V
+0.9V
+CPU_CORE_NB
+1.8V
+1.8V
+CPU_CORE_1
+CPU_CORE_1
+CPU_CORE_1
+CPU_CORE_1
+CPU_CORE_NB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
AMD CPU S1G2 PWR & GND
Custom
746Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
A: Add C165 and C176
to follow AMD Layout
review recommand for
EMI
Between CPU Socket and DIMM
180PF Qt'y follow the distance between
CPU socket and DIMM0. <2.5inch>
Under CPU Socket
Athlon 64 S1
Processor Socket
Near CPU Socket
VTT decoupling.
VDD(+CPU_CORE) decoupling.
VDDIO decoupling. +CPU_CORE_NB decoupling.
C: Change to NBO CAP
C: Change to NBO CAP
Under CPU Socket
Near CPU Socket Right side.
Near CPU Socket Left side.
Near Power Supply
Athlon 64 S1
Processor Socket
C165
0.22U_0603_16V4Z
1
2
C207
22U_0805_6.3V6M
1
2
C221
22U_0805_6.3V6M
1
2
C191
180P_0402_50V8J
1
2
C172
180P_0402_50V8J
1
2
C166
0.22U_0603_16V4Z
1
2
C541
4.7U_0805_10V4Z
1
2
C169
4.7U_0805_10V4Z
1
2
C225
22U_0805_6.3V6M
1
2
C537
1000P_0402_50V7K
1
2
C164
180P_0402_50V8J
1
2
C515
0.22U_0603_16V4Z
1
2
C163
0.01U_0402_25V4Z
1
2
C216
0.22U_0603_16V4Z
1
2
C184
0.01U_0402_25V4Z
1
2
C170
4.7U_0805_10V4Z
1
2
+
C78
330U_X_2VM_R6M
1
2
C543
180P_0402_50V8J
1
2
C217
0.01U_0402_25V4Z
1
2
+
C233
220U_D2_4VM_R15
1
2
C234
0.22U_0603_16V4Z
1
2
C141
4.7U_0805_10V4Z
1
2
C195
0.22U_0603_16V4Z
1
2
C219
180P_0402_50V8J
1
2
C273
22U_0805_6.3V6M
1
2
C144
0.22U_0603_16V4Z
1
2
+
C79
330U_X_2VM_R6M
1
2
C168
4.7U_0805_10V4Z
1
2C528
1000P_0402_50V7K
1
2
C223
22U_0805_6.3V6M
1
2
C200
22U_0805_6.3V6M
1
2
C514
0.22U_0603_16V4Z
1
2
C179
180P_0402_50V8J
1
2
C182
180P_0402_50V8J
1
2
C173
1000P_0402_50V7K
1
2
C206
22U_0805_6.3V6M
1
2
C540
180P_0402_50V8J
1
2
C198
22U_0805_6.3V6M
1
2
C238
180P_0402_50V8J
1
2
C237
180P_0402_50V8J
1
2
C239
180P_0402_50V8J
1
2
C162
0.01U_0402_25V4Z
1
2
+
C281
220U_D2_4VM_R15
1
2
C530
4.7U_0805_10V4Z
1
2
C186
22U_0805_6.3V6M
1
2
C148
0.22U_0603_16V4Z
1
2
C201
22U_0805_6.3V6M
1
2
+
C77
330U_X_2VM_R6M
1
2
C214
22U_0805_6.3V6M
1
2
C146
4.7U_0805_10V4Z
1
2
C235
0.22U_0603_16V4Z
1
2
JCPU1E
6090022100G_B
VDD1_25 AC4
VDD1_26 AD2
VDD0_1
G4
VDD0_2
H2
VDD0_3
J9
VDD0_4
J11
VDD0_5
J13
VDD0_7
K6
VDD0_8
K10
VDD0_9
K12
VDD0_10
K14
VDD0_11
L4
VDD0_12
L7
VDD0_13
L9
VDD0_14
L11
VDD0_15
L13
VDD0_17
M2
VDD0_18
M6
VDD0_19
M8
VDD0_20
M10
VDD0_21
N7
VDD0_22
N9
VDD0_23
N11
VDD1_1 P8
VDD1_2 P10
VDD1_3 R4
VDD1_4 R7
VDD1_5 R9
VDD1_6 R11
VDD1_7 T2
VDD1_8 T6
VDD1_9 T8
VDD1_10 T10
VDD1_11 T12
VDD1_12 T14
VDD1_13 U7
VDD1_14 U9
VDD1_15 U11
VDD1_16 U13
VDD1_18 V6
VDD1_19 V8
VDD1_20 V10
VDD1_21 V12
VDD1_22 V14
VDD1_23 W4
VDD1_24 Y2
VDD0_6
J15
VDDNB_1
K16
VDD0_16
L15
VDDNB_2
M16
VDDNB_3
P16
VDDNB_4
T16
VDD1_17 U15
VDDNB_5
V16
VDDIO1
H25
VDDIO2
J17
VDDIO3
K18
VDDIO4
K21
VDDIO5
K23
VDDIO6
K25
VDDIO7
L17
VDDIO8
M18
VDDIO9
M21
VDDIO10
M23
VDDIO11
M25
VDDIO12
N17 VDDIO13 P18
VDDIO14 P21
VDDIO15 P23
VDDIO16 P25
VDDIO17 R17
VDDIO18 T18
VDDIO19 T21
VDDIO20 T23
VDDIO21 T25
VDDIO22 U17
VDDIO23 V18
VDDIO24 V21
VDDIO25 V23
VDDIO26 V25
VDDIO27 Y25
JCPU1F
6090022100G_B
VSS1
AA4
VSS2
AA11
VSS3
AA13
VSS4
AA15
VSS5
AA17
VSS6
AA19
VSS7
AB2
VSS8
AB7
VSS9
AB9
VSS10
AB23
VSS11
AB25
VSS12
AC11
VSS13
AC13
VSS14
AC15
VSS15
AC17
VSS16
AC19
VSS17
AC21
VSS18
AD6
VSS19
AD8
VSS20
AD25
VSS21
AE11
VSS22
AE13
VSS23
AE15
VSS24
AE17
VSS25
AE19
VSS26
AE21
VSS27
AE23
VSS28
B4
VSS29
B6
VSS30
B8
VSS31
B9
VSS32
B11
VSS33
B13
VSS34
B15
VSS35
B17
VSS36
B19
VSS37
B21
VSS38
B23
VSS39
B25
VSS40
D6
VSS41
D8
VSS42
D9
VSS43
D11
VSS44
D13
VSS45
D15
VSS46
D17
VSS47
D19
VSS48
D21
VSS49
D23
VSS50
D25
VSS51
E4
VSS52
F2
VSS53
F11
VSS54
F13
VSS55
F15
VSS56
F17
VSS57
F19
VSS58
F21
VSS59
F23
VSS60
F25
VSS61
H7
VSS62
H9
VSS63
H21
VSS64
H23
VSS65
J4
VSS66 J6
VSS67 J8
VSS68 J10
VSS69 J12
VSS70 J14
VSS71 J16
VSS72 J18
VSS73 K2
VSS74 K7
VSS75 K9
VSS76 K11
VSS77 K13
VSS78 K15
VSS79 K17
VSS80 L6
VSS81 L8
VSS82 L10
VSS83 L12
VSS84 L14
VSS85 L16
VSS86 L18
VSS87 M7
VSS88 M9
VSS89 AC6
VSS90 M17
VSS91 N4
VSS92 N8
VSS93 N10
VSS94 N16
VSS95 N18
VSS96 P2
VSS97 P7
VSS98 P9
VSS99 P11
VSS100 P17
VSS101 R8
VSS102 R10
VSS103 R16
VSS104 R18
VSS105 T7
VSS106 T9
VSS107 T11
VSS108 T13
VSS109 T15
VSS110 T17
VSS111 U4
VSS112 U6
VSS113 U8
VSS114 U10
VSS115 U12
VSS116 U14
VSS117 U16
VSS118 U18
VSS119 V2
VSS120 V7
VSS121 V9
VSS122 V11
VSS123 V13
VSS124 V15
VSS125 V17
VSS126 W6
VSS127 Y21
VSS128 Y23
VSS129 N6
C167
4.7U_0805_10V4Z
1
2
C174
1000P_0402_50V7K
1
2
C226
22U_0805_6.3V6M
1
2
C230
0.22U_0603_16V4Z
1
2
+
C80
330U_X_2VM_R6M
1
2
C196
22U_0805_6.3V6M
1
2
+
C218
220U_D2_4VM_R15
@
1
2
C220
0.22U_0603_16V4Z
1
2
C175
180P_0402_50V8J
1
2
C224
22U_0805_6.3V6M
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRA_SDQ[63..0]
DDRA_SMA[15..0]
DDRA_SDM[7..0]
DDRA_SDQ54
DDRA_SDQ10
DDRA_SDQ47
DDRA_SDQ22
DDRA_SDQ9
DDRA_SDQ23
DDRA_SDQ42
DDRA_SDQ34
DDRA_SDQ49
DDRA_SDQ48
DDRA_SDQ61
DDRA_SDQ60
DDRA_SDQ43
DDRA_SDQ35
DDRA_SDQ27
DDRA_SDQ26
DDRA_SDQ17
DDRA_SDQ16
DDRA_SDQ7
DDRA_SDM6
DDRA_SDM1
DDRA_SDQ40
DDRA_SDQS4
DDRA_SDQS2
DDRA_SDQS1
DDRA_SDQS6
DDRA_SDQS4#
DDRA_SDQS1#
DDRA_SDQS6#
DDRA_SDQ21
DDRA_SDQ20
DDRA_SDQ1
DDRA_SCAS#
DDRA_SRAS#
DDRA_SWE#
DDRA_SMA3
DDRA_SMA7
DDRA_SMA2
DDRA_SMA0
DDRA_SMA6
DDRA_SMA1
DDRA_SMA10
DDRA_SMA12
DDRA_SMA5
DDRA_SMA9
DDRA_SMA8
DDRA_SMA4
DDRA_SMA11
DDRA_SCS0#
DDRA_SCS1#
DDRA_CKE1DDRA_CKE0
DDRA_CLK0
DDRA_CLK0#
DDRA_SBS0# DDRA_SBS1#
DDRA_SMA13
DDRA_SDM3
DDRA_SDQS5
DDRA_SDQ55
DDRA_SDQS5#
DDRA_CLK1
DDRA_CLK1#
DDRA_SDM5
DDRA_SDQS7
DDRA_SDM0
DDRA_SDQS7#
DDRA_SDQ5
DDRA_SDQ59
DDRA_SDQ58
DDRA_SDQ36
DDRA_SDQ44
DDRA_SDQ28
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ8
DDRA_SDQ62
DDRA_SDQ63
DDRA_SDM7
DDRA_ODT1
DDRA_ODT0
DDRA_SDM2
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQ2
DDRA_SDQS3
DDRA_SDQ3
DDRA_SDQS3#
DDRA_SDM4
ICH_SMBCLK0
ICH_SMBDATA0
DDRA_SDQ4
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ45
DDRA_SDQ37
DDRA_SDQ6
DDRA_SDQ38
DDRA_SDQ46
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ39
DDRA_SDQ25 DDRA_SDQ29
DDRA_SDQ11
DDRA_SDQ24
DDRA_SBS2#
DDRA_SDQ51
DDRA_SDQ50
DDRA_SDQ0
DDRA_SDQ15
DDRA_SDQ14
DDRA_SMA14
DDRA_SDQ12
DDRA_SDQ32
DDRA_SDQ13
DDRA_SDQ41
DDRA_SDQS2#
DDRA_SDQ33
DDRA_SMA15
DDRA_SMA3
DDRA_SMA15
DDRA_SMA11
DDRA_SMA6
DDRA_SMA7
DDRA_SCAS#
DDRA_SMA0
DDRA_CKE0
DDRA_SBS1#
DDRA_SMA5
DDRA_SBS2#
DDRA_SBS0#
DDRA_SRAS#
DDRA_SCS0#
DDRA_SMA8
DDRA_SCS1#
DDRA_SMA4
DDRA_SMA14
DDRA_SMA10
DDRA_ODT0
DDRA_SMA9
DDRA_ODT1
DDRA_SMA2
DDRA_CKE1
DDRA_SMA1
DDRA_SMA13
DDRA_SMA12
DDRA_SWE#
+V_DDR_MCH_REF
+1.8V
+1.8V +1.8V
+3VS
+V_DDR_MCH_REF
+3VS
+1.8V
+0.9V
+V_DDR_MCH_REF
+1.8V
+0.9V
DDRA_SDQS0#<5> DDRA_SDQS0<5>
DDRA_SDQS1#<5> DDRA_SDQS1<5>
DDRA_SDQS2#<5> DDRA_SDQS2<5>
DDRA_CKE0<5>
DDRA_SBS2#<5>
DDRA_SBS0#<5> DDRA_SWE#<5>
DDRA_SCAS#<5> DDRA_SCS1#<5>
DDRA_ODT1<5>
DDRA_SDQS4#<5> DDRA_SDQS4<5>
DDRA_SDQS6#<5> DDRA_SDQS6<5>
ICH_SMBDATA0<9,15,20,28> ICH_SMBCLK0<9,15,20,28>
DDRA_CLK0 <5>
DDRA_CLK0# <5>
DDRA_SDQS3# <5>
DDRA_SDQS3 <5>
DDRA_CKE1 <5>
DDRA_SBS1# <5>
DDRA_SRAS# <5>
DDRA_SCS0# <5>
DDRA_ODT0 <5>
DDRA_SDQS5# <5>
DDRA_SDQS5 <5>
DDRA_CLK1 <5>
DDRA_CLK1# <5>
DDRA_SDQS7# <5>
DDRA_SDQS7 <5>
DDRA_SDQ[63..0] <5>
DDRA_SDM[7..0] <5>
DDRA_SMA[15..0] <5>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
DDRII SO-DIMM 0
Custom
846Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
RESERVE
+V_DDR_MCH_REF BUFFER CIRCUIT
DIMM1 REV H:5.2mm (BOT)
C119
0.1U_0402_16V4Z
1
2
C161 0.1U_0402_16V4Z
1 2
RP12
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
JDIMM1
FOX_AS0A426-M2RN-7F
CONN@
VREF
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DQS0#
11
DQS0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
VSS
41
DQ16
43
DQ17
45
VSS
47
DQS2#
49
DQS2
51
VSS
53
DQ18
55
DQ19
57
VSS
59
DQ24
61
DQ25
63
VSS
65
DM3
67
NC
69
VSS
71
DQ26
73
DQ27
75
VSS
77
CKE0
79
VDD
81
NC
83
BA2
85
VDD
87
A12
89
A9
91
A8
93
VDD
95
A5
97
A3
99
A1
101
VDD
103
A10/AP
105
BA0
107
WE#
109
VDD
111
CAS#
113
NC/S1#
115
VDD
117
NC/ODT1
119
VSS
121
DQ32
123
DQ33
125
VSS
127
DQS4#
129
DQS4
131
VSS
133
DQ34
135
DQ35
137
VSS
139
DQ40
141
DQ41
143
VSS
145
DM5
147
VSS
149
DQ42
151
DQ43
153
VSS
155
DQ48
157
DQ49
159
VSS
161
NC,TEST
163
VSS
165
DQS6#
167
DQS6
169
VSS
171
DQ50
173
DQ51
175
VSS
177
DQ56
179
DQ57
181
VSS
183
DM7
185
VSS
187
DQ58
189
DQ59
191
VSS
193
SDA
195
SCL
197
VDDSPD
199
VSS 2
DQ4 4
DQ5 6
VSS 8
DM0 10
VSS 12
DQ6 14
DQ7 16
VSS 18
DQ12 20
DQ13 22
VSS 24
DM1 26
VSS 28
CK0 30
CK0# 32
VSS 34
DQ14 36
DQ15 38
VSS 40
VSS 42
DQ20 44
DQ21 46
VSS 48
NC 50
DM2 52
VSS 54
DQ22 56
DQ23 58
VSS 60
DQ28 62
DQ29 64
VSS 66
DQS3# 68
DQS3 70
VSS 72
DQ30 74
DQ31 76
VSS 78
NC/CKE1 80
VDD 82
NC/A15 84
NC/A14 86
VDD 88
A11 90
A7 92
A6 94
VDD 96
A4 98
A2 100
A0 102
VDD 104
BA1 106
RAS# 108
S0# 110
VDD 112
ODT0 114
NC/A13 116
VDD 118
NC 120
VSS 122
DQ36 124
DQ37 126
VSS 128
DM4 130
VSS 132
DQ38 134
DQ39 136
VSS 138
DQ44 140
DQ45 142
VSS 144
DQS5# 146
DQS5 148
VSS 150
DQ46 152
DQ47 154
VSS 156
DQ52 158
DQ53 160
VSS 162
CK1 164
CK1# 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
SAO 198
SA1 200
GND
203 GND 204
C55
0.1U_0402_16V4Z
1
2
C155
0.1U_0402_16V4Z
1
2
R148
1K_0402_1%
1 2
RP18
47_0804_8P4R_5%
18 27 36 45
R314 10K_0402_5%
1 2
RP9
47_0804_8P4R_5%
18 27 36 45
R141
1K_0402_1%
1 2
C197
0.1U_0402_16V4Z
1
2
C180 0.1U_0402_16V4Z
1 2
R315 10K_0402_5%
1 2
C213 0.1U_0402_16V4Z
1 2
C222 0.1U_0402_16V4Z
1 2
C413
4.7U_0805_10V4Z
1
2
C194 0.1U_0402_16V4Z
1 2
C113
0.1U_0402_16V4Z
1
2
C414
0.1U_0402_16V4Z
1
2
C156 0.1U_0402_16V4Z
1 2
RP23
47_0804_8P4R_5%
18 27 36 45
RP17
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
C256
1000P_0402_50V7K
1
2
C159 0.1U_0402_16V4Z
1 2
C190 0.1U_0402_16V4Z
1 2
C128
0.1U_0402_16V4Z
1
2
C157 0.1U_0402_16V4Z
1 2
C199 0.1U_0402_16V4Z
1 2
C151
0.1U_0402_16V4Z
1
2
RP15
47_0804_8P4R_5%
18 27 36 45
RP20
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
C257
1U_0402_6.3V4Z
1
2
C152 0.1U_0402_16V4Z
1 2
C211 0.1U_0402_16V4Z
1 2
C124
0.1U_0402_16V4Z
1
2
C187 0.1U_0402_16V4Z
1 2
C154 0.1U_0402_16V4Z
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRB_SDQ[63..0]
DDRB_SMA[15..0]
DDRB_SDM[7..0]
DDRB_SMA14
DDRB_SDQ20
DDRB_SDQ39
DDRB_SDQ38
DDRB_SDQ29
DDRB_CLK1
DDRB_CLK1#
DDRB_SDQ24
DDRB_CLK0
DDRB_SDQ51
DDRB_CLK0#
DDRB_SDQ50
DDRB_SDQ31
DDRB_SDQ28
DDRB_SDQ61
ICH_SMBCLK0
ICH_SMBDATA0
DDRB_SDQ27
DDRB_SDQ57
DDRB_SDQ26 DDRB_SDQ30
DDRB_SBS2#
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQ40
DDRB_SDQS4
DDRB_SDQS6
DDRB_SDQS4#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQ41
DDRB_SDQS6#
DDRB_SDQ11
DDRB_SDQ10
DDRB_SDQ1
DDRB_SDQ0
DDRB_SMA3
DDRB_SWE#
DDRB_SCAS#
DDRB_SMA9
DDRB_SMA5
DDRB_SMA12
DDRB_SMA10
DDRB_SMA1
DDRB_CKE0
DDRB_SCS1#
DDRB_SMA8
DDRB_SDM3
DDRB_SBS0#
DDRB_SDQ25
DDRB_SDQ35
DDRB_SDQ34
DDRB_SDM5
DDRB_SDQ18
DDRB_SDQ49
DDRB_SDQ48
DDRB_SDQ9
DDRB_SDQ8
DDRB_SDQ19
DDRB_SDM7
DDRB_SDQ43
DDRB_ODT1
DDRB_SDQ42
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ33
DDRB_SDQ32
DDRB_SDQ56
DDRB_SDQ3
DDRB_SDQ37
DDRB_SDQ7
DDRB_SDQ6
DDRB_SDM6
DDRB_SDM1
DDRB_SRAS#
DDRB_SMA7
DDRB_SMA2
DDRB_SMA0
DDRB_SMA6
DDRB_SMA4
DDRB_SMA11
DDRB_SCS0#
DDRB_CKE1
DDRB_SBS1#
DDRB_SMA13
DDRB_SDQ54
DDRB_SDQS5
DDRB_SDQ55
DDRB_SDQ44
DDRB_SDQS5#
DDRB_SDQ45
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQS7
DDRB_SDM0
DDRB_SDQS7#
DDRB_SDQ5
DDRB_SDQ62
DDRB_SDQ63
DDRB_ODT0
DDRB_SDM2
DDRB_SDQ60
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDM4
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ36
DDRB_SDQ4
DDRB_SDQ16 DDRB_SDQ21
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ17
DDRB_SMA15
DDRB_SCAS#
DDRB_SMA7
DDRB_SMA3
DDRB_SMA1
DDRB_SWE#
DDRB_SBS2#
DDRB_SMA15
DDRB_CKE1
DDRB_SCS1#
DDRB_CKE0
DDRB_SMA2
DDRB_SMA10
DDRB_SBS1#
DDRB_SMA14
DDRB_ODT1
DDRB_SMA4
DDRB_SMA13
DDRB_SBS0#
DDRB_ODT0
DDRB_SMA11
DDRB_SRAS#
DDRB_SMA0
DDRB_SMA6
DDRB_SCS0#
DDRB_SMA5
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
+V_DDR_MCH_REF
+1.8V +1.8V
+3VS
+V_DDR_MCH_REF
+0.9V +1.8V
+3VS
+V_DDR_MCH_REF
DDRB_SDQS0#<5> DDRB_SDQS0<5>
DDRB_SDQS1#<5> DDRB_SDQS1<5>
DDRB_SDQS2#<5> DDRB_SDQS2<5>
DDRB_CKE0<5>
DDRB_SBS2#<5>
DDRB_SBS0#<5> DDRB_SWE#<5>
DDRB_SCAS#<5> DDRB_SCS1#<5>
DDRB_ODT1<5>
DDRB_SDQS4#<5> DDRB_SDQS4<5>
DDRB_SDQS6#<5> DDRB_SDQS6<5>
DDRB_CLK0 <5>
DDRB_CLK0# <5>
DDRB_SDQS3# <5>
DDRB_SDQS3 <5>
DDRB_CKE1 <5>
DDRB_SBS1# <5>
DDRB_SRAS# <5>
DDRB_SCS0# <5>
DDRB_ODT0 <5>
DDRB_SDQS5# <5>
DDRB_SDQS5 <5>
DDRB_CLK1 <5>
DDRB_CLK1# <5>
DDRB_SDQS7# <5>
DDRB_SDQS7 <5>
ICH_SMBDATA0<8,15,20,28> ICH_SMBCLK0<8,15,20,28>
DDRB_SDQ[63..0] <5>
DDRB_SDM[7..0] <5>
DDRB_SMA[15..0] <5>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
DDRII SO-DIMM 1
Custom
946Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
DIMM1 REV H:9.2mm (BOT)
C3388
22U_0805_6.3V6M
@
1
2
C215 0.1U_0402_16V4Z
1 2
RP16
47_0804_8P4R_5%
18 27 36 45
C203 0.1U_0402_16V4Z
12
C160 0.1U_0402_16V4Z
1 2
C153 0.1U_0402_16V4Z
1 2
C204 0.1U_0402_16V4Z
12
RP14
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
RP10
47_0804_8P4R_5%
18 27 36 45
C202
1000P_0402_25V8J
1
2
C176 0.1U_0402_16V4Z
1 2
C185 0.1U_0402_16V4Z
12
RP22
47_0804_8P4R_5%
18 27 36 45
C193 0.1U_0402_16V4Z
1 2
C292
0.1U_0402_16V4Z
1
2
R331 10K_0402_5%
1 2
RP19
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
JDIMM2
FOX_AS0A426-MARG-7F
CONN@
VREF
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DQS0#
11
DQS0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
VSS
41
DQ16
43
DQ17
45
VSS
47
DQS2#
49
DQS2
51
VSS
53
DQ18
55
DQ19
57
VSS
59
DQ24
61
DQ25
63
VSS
65
DM3
67
NC
69
VSS
71
DQ26
73
DQ27
75
VSS
77
CKE0
79
VDD
81
NC
83
BA2
85
VDD
87
A12
89
A9
91
A8
93
VDD
95
A5
97
A3
99
A1
101
VDD
103
A10/AP
105
BA0
107
WE#
109
VDD
111
CAS#
113
NC/S1#
115
VDD
117
NC/ODT1
119
VSS
121
DQ32
123
DQ33
125
VSS
127
DQS4#
129
DQS4
131
VSS
133
DQ34
135
DQ35
137
VSS
139
DQ40
141
DQ41
143
VSS 2
DQ4 4
DQ5 6
VSS 8
DM0 10
VSS 12
DQ6 14
DQ7 16
VSS 18
DQ12 20
DQ13 22
VSS 24
DM1 26
VSS 28
CK0 30
CK0# 32
VSS 34
DQ14 36
DQ15 38
VSS 40
VSS 42
DQ20 44
DQ21 46
VSS 48
NC 50
DM2 52
VSS 54
DQ22 56
DQ23 58
VSS 60
DQ28 62
DQ29 64
VSS 66
DQS3# 68
DQS3 70
VSS 72
DQ30 74
DQ31 76
VSS 78
NC/CKE1 80
VDD 82
NC/A15 84
NC/A14 86
VDD 88
A11 90
A7 92
A6 94
VDD 96
A4 98
A2 100
A0 102
VDD 104
BA1 106
RAS# 108
S0# 110
VDD 112
ODT0 114
NC/A13 116
VDD 118
NC 120
VSS 122
DQ36 124
DQ37 126
VSS 128
DM4 130
VSS 132
DQ38 134
DQ39 136
VSS 138
DQ44 140
DQ45 142
VSS 144
VSS
145
DM5
147
VSS
149
DQ42
151
DQ43
153
VSS
155
DQ48
157
DQ49
159
VSS
161
NC,TEST
163
VSS
165
DQS6#
167
DQS6
169
VSS
171
DQ50
173
DQ51
175
VSS
177
DQ56
179
DQ57
181
VSS
183
DM7
185
VSS
187
DQ58
189
DQ59
191
VSS
193
SDA
195
SCL
197
VDDSPD
199
DQS5# 146
DQS5 148
VSS 150
DQ46 152
DQ47 154
VSS 156
DQ52 158
DQ53 160
VSS 162
CK1 164
CK1# 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
SAO 198
SA1 200
GND
201 GND 202
RP21
47_0804_8P4R_5%
18 27 36 45
C205 0.1U_0402_16V4Z
12
R327 10K_0402_5%
1 2
C210 0.1U_0402_16V4Z
1 2
RP11
47_0804_8P4R_5%
1 8
2 7
3 6
4 5
C209 0.1U_0402_16V4Z
1 2
C158 0.1U_0402_16V4Z
12
C171 0.1U_0402_16V4Z
12
C188 0.1U_0402_16V4Z
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_GTX_MRX_N0
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9
PCIE_GTX_MRX_P1
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10
PCIE_GTX_MRX_N15
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P11
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P11
PCIE_GTX_MRX_P3
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_GRX_P12
SB_RX0P
PCIE_MTX_GRX_N12
PCIE_GTX_MRX_P4
SB_RX0N
SB_RX1P
SB_RX1N
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13PCIE_MTX_GRX_N13
PCIE_GTX_MRX_N5
PCIE_MTX_GRX_P13
PCIE_GTX_MRX_P5
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_GTX_MRX_N6
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P14
PCIE_GTX_MRX_P7
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P15
PCIE_ITX_PRX_P1
PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P2
PCIE_GTX_MRX_P10
PCIE_ITX_PRX_N2
PCIE_GTX_MRX_N10
PCIE_ITX_PRX_P3
PCIE_ITX_PRX_N3
PCIE_GTX_MRX_N12
PCIE_PTX_C_IRX_P1
PCIE_GTX_MRX_P12
PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P3
PCIE_GTX_MRX_N13
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P2
PCIE_PTX_C_IRX_N2
PCIE_GTX_MRX_N14
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
SB_TX2P_C
SB_TX2N_C
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P0PCIE_MTX_GRX_P0
SB_TX3P_C
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
SB_TX3N_C
PCIE_MTX_GRX_N0
SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P1
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P3
H_CADIN[0..15]
H_CADIP[0..15]
H_CADOP[0..15]
H_CADON[0..15]
SB_TX1N_C
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4 PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P7
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIN2
H_CADIP2
H_CADIN3
H_CADIP3
H_CLKIP0
H_CLKIN0
H_CTLIN0
H_CTLIP0
H_CLKON0
H_CLKOP1
H_CTLON0
H_CADIN4
H_CADIP4
H_CADIN5
H_CADIP5
H_CADIN6
H_CADIP6
H_CADIN7
H_CADIP7
H_CADIN8
H_CADIP8
H_CADIN9
H_CADIP9
H_CADIN10
H_CADIP10
H_CLKOP0
H_CLKON1
H_CTLOP0
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIN13
H_CADIP13
H_CADIN14
H_CADIP14
H_CADIN15
H_CADIP15
H_CADOP0
H_CLKIN1
H_CADON0
H_CLKIP1
H_CADOP1
H_CADON1
H_CTLIP1
H_CTLIN1
H_CADON2
H_CTLOP1
H_CADOP2
H_CTLON1
H_CADOP3
H_CADON3
H_CADON4
H_CADOP4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADON10
H_CADOP10
H_CADON9
H_CADOP9
H_CADOP8
H_CADON8
H_CADIP0
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P3 HDMI_CLK+_UMA
HDMI_CLK-_UMA
HDMI_TX0+_UMA
HDMI_TX0-_UMA
HDMI_TX1+_UMA
HDMI_TX1-_UMA
HDMI_TX2+_UMA
HDMI_TX2-_UMA
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N14
PCIE_GTX_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1 PCIE_GTX_MRX_P2
PCIE_GTX_MRX_N2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3 PCIE_GTX_MRX_N3
PCIE_GTX_C_MRX_P4 PCIE_GTX_MRX_N4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6 PCIE_GTX_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7 PCIE_GTX_MRX_N7
PCIE_GTX_MRX_P8
PCIE_GTX_MRX_P9
PCIE_GTX_C_MRX_N9 PCIE_GTX_MRX_N9
PCIE_GTX_MRX_P11
PCIE_GTX_C_MRX_N11 PCIE_GTX_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14 PCIE_GTX_MRX_P14
PCIE_GTX_C_MRX_P15 PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N1
PCIE_GTX_MRX_N8
+1.1VS
PCIE_GTX_C_MRX_P[0..15]<14>
PCIE_GTX_C_MRX_N[0..15]<14>
PCIE_MTX_C_GRX_P[0..15] <14>
PCIE_MTX_C_GRX_N[0..15] <14>
PCIE_PTX_C_IRX_P1<28> PCIE_PTX_C_IRX_N1<28> PCIE_PTX_C_IRX_P2<28> PCIE_PTX_C_IRX_N2<28> PCIE_PTX_C_IRX_P3<26> PCIE_PTX_C_IRX_N3<26>
SB_RX0P<19> SB_RX0N<19> SB_RX1P<19> SB_RX1N<19> SB_RX2P<19> SB_RX2N<19> SB_RX3P<19> SB_RX3N<19>
SB_TX0P <19>
SB_TX0N <19>
SB_TX1P <19>
SB_TX1N <19>
SB_TX2P <19>
SB_TX2N <19>
SB_TX3P <19>
SB_TX3N <19>
PCIE_ITX_C_PRX_P1 <28>
PCIE_ITX_C_PRX_N1 <28>
PCIE_ITX_C_PRX_P2 <28>
PCIE_ITX_C_PRX_N2 <28>
PCIE_ITX_C_PRX_P3 <26>
PCIE_ITX_C_PRX_N3 <26> H_CADOP[0..15]<4>
H_CADON[0..15]<4>
H_CADIP[0..15] <4>
H_CADIN[0..15] <4>
H_CLKOP0<4> H_CLKON0<4> H_CLKOP1<4> H_CLKON1<4>
H_CTLOP0<4> H_CTLON0<4> H_CTLOP1<4> H_CTLON1<4>
H_CLKIP0 <4>
H_CLKIN0 <4>
H_CLKIP1 <4>
H_CLKIN1 <4>
H_CTLIP0 <4>
H_CTLIN0 <4>
H_CTLIP1 <4>
H_CTLIN1 <4>
HDMI_CLK+_UMA <17>
HDMI_CLK-_UMA <17>
HDMI_TX0+_UMA <17>
HDMI_TX0-_UMA <17>
HDMI_TX1+_UMA <17>
HDMI_TX2+_UMA <17>
HDMI_TX1-_UMA <17>
HDMI_TX2-_UMA <17>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
RS780-HT/PCIE
Custom
10 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
GLAN
WLAN
DP0 GFX_TX0,TX1,TX2 and TX3
RS780M Display Port Support (muxed on GFX)
DP1 GFX_TX4,TX5,TX6 and TX7
AUX0 and HPD0
AUX1 and HPD1
0718 Place within 1"
layout 1:2 0718 Place within 1"
layout 1:2
TV Tuner
C901 0.1U_0402_10V7KUMA@
1 2
C481 0.1U_0402_16V7KVGA@
1 2
C693 0.1U_0402_16V7K VGA@
1 2
C464 0.1U_0402_16V7KVGA@
1 2
C711 0.1U_0402_16V7K VGA@
1 2
C684 0.1U_0402_16V7K VGA@
1 2
C694 0.1U_0402_16V7K VGA@
1 2
C704 0.1U_0402_16V7K VGA@
1 2
C683 0.1U_0402_16V7K VGA@
1 2
C271 0.1U_0402_16V7K
1 2
C462 0.1U_0402_16V7KVGA@
1 2
C468 0.1U_0402_16V7K VGA@
1 2
C897 0.1U_0402_10V7KUMA@
1 2
C705 0.1U_0402_16V7K VGA@
1 2
R76
301_0402_1%
1 2
C21 0.1U_0402_16V7K
1 2
R33 1.27K_0402_1%
1 2
C463 0.1U_0402_16V7KVGA@
1 2
C695 0.1U_0402_16V7K VGA@
1 2
C686 0.1U_0402_16V7K VGA@
1 2
C696 0.1U_0402_16V7K VGA@
1 2
C900 0.1U_0402_10V7KUMA@
1 2
C706 0.1U_0402_16V7K VGA@
1 2
C450 0.1U_0402_16V7K VGA@
1 2
C685 0.1U_0402_16V7K VGA@
1 2
C470 0.1U_0402_16V7KVGA@
1 2
C20 0.1U_0402_16V7K
1 2
C31 0.1U_0402_16V7K
1 2
PART 1 OF 6
HYPER TRANSPORT CPU I/F
U25A
RS780M_FCBGA528
HT_RXCAD15P
U19
HT_RXCAD15N
U18
HT_RXCAD14P
U20
HT_RXCAD14N
U21
HT_RXCAD13P
V21
HT_RXCAD13N
V20
HT_RXCAD12P
W21
HT_RXCAD12N
W20
HT_RXCAD11P
Y22
HT_RXCAD11N
Y23
HT_RXCAD10P
AA24
HT_RXCAD10N
AA25
HT_RXCAD9P
AB25
HT_RXCAD9N
AB24
HT_RXCAD8P
AC24
HT_RXCAD8N
AC25
HT_RXCAD7P
N24
HT_RXCAD7N
N25
HT_RXCAD6P
P25
HT_RXCAD6N
P24
HT_RXCAD5P
P22
HT_RXCAD5N
P23
HT_RXCAD4P
T25
HT_RXCAD4N
T24
HT_RXCAD3P
U24
HT_RXCAD3N
U25
HT_RXCAD2P
V25
HT_RXCAD2N
V24
HT_RXCAD1P
V22
HT_RXCAD1N
V23
HT_RXCAD0P
Y25
HT_RXCAD0N
Y24
HT_RXCLK1P
AB23
HT_RXCLK1N
AA22
HT_RXCLK0P
T22
HT_RXCLK0N
T23
HT_RXCTL0P
M22
HT_RXCTL0N
M23
HT_RXCTL1P
R21
HT_RXCTL1N
R20
HT_RXCALP
C23
HT_RXCALN
A24
HT_TXCAD15P P18
HT_TXCAD15N M18
HT_TXCAD14P M21
HT_TXCAD14N P21
HT_TXCAD13P M19
HT_TXCAD13N L18
HT_TXCAD12P L19
HT_TXCAD12N J19
HT_TXCAD11P J18
HT_TXCAD11N K17
HT_TXCAD10P J20
HT_TXCAD10N J21
HT_TXCAD9P G20
HT_TXCAD9N H21
HT_TXCAD8P F21
HT_TXCAD8N G21
HT_TXCAD7P K23
HT_TXCAD7N K22
HT_TXCAD6P K24
HT_TXCAD6N K25
HT_TXCAD5P J25
HT_TXCAD5N J24
HT_TXCAD4P H23
HT_TXCAD4N H22
HT_TXCAD3P F23
HT_TXCAD3N F22
HT_TXCAD2P F24
HT_TXCAD2N F25
HT_TXCAD1P E24
HT_TXCAD1N E25
HT_TXCAD0P D24
HT_TXCAD0N D25
HT_TXCLK1P L21
HT_TXCLK1N L20
HT_TXCLK0P H24
HT_TXCLK0N H25
HT_TXCTL0P M24
HT_TXCTL0N M25
HT_TXCTL1P P19
HT_TXCTL1N R18
HT_TXCALP B24
HT_TXCALN B25
C707 0.1U_0402_16V7K VGA@
1 2
C461 0.1U_0402_16V7KVGA@
1 2
C455 0.1U_0402_16V7KVGA@
1 2
C454 0.1U_0402_16V7KVGA@
1 2
C465 0.1U_0402_16V7KVGA@
1 2
C459 0.1U_0402_16V7KVGA@
1 2
C902 0.1U_0402_10V7KUMA@
1 2
C697 0.1U_0402_16V7K VGA@
1 2
C471 0.1U_0402_16V7KVGA@
1 2
C265 0.1U_0402_16V7K
1 2
C688 0.1U_0402_16V7K VGA@
1 2
C295 0.1U_0402_16V7K
1 2
C698 0.1U_0402_16V7K VGA@
1 2 C475 0.1U_0402_16V7KVGA@
1 2
C476 0.1U_0402_16V7KVGA@
1 2
C708 0.1U_0402_16V7K VGA@
1 2
R75
301_0402_1%
1 2
C687 0.1U_0402_16V7K VGA@
1 2
C268 0.1U_0402_16V7K
1 2
C903 0.1U_0402_10V7KUMA@
1 2
C467 0.1U_0402_16V7K VGA@
1 2
C466 0.1U_0402_16V7K VGA@
1 2
C22 0.1U_0402_16V7K
1 2
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F SB
U25B
RS780M_FCBGA528
SB_TX3P AD5
SB_TX3N AE5
GPP_TX2P AA2
GPP_TX2N AA1
GPP_TX3P Y1
GPP_TX3N Y2
SB_RX3P
W5
SB_RX3N
Y5
GPP_RX2P
AD1
GPP_RX2N
AD2
GPP_RX3P
V5
GPP_RX3N
W6
SB_TX0P AD7
SB_TX0N AE7
SB_TX1P AE6
SB_TX1N AD6
SB_RX0P
AA8
SB_RX0N
Y8
SB_RX1P
AA7
SB_RX1N
Y7
PCE_CALRP(PCE_BCALRP) AC8
PCE_CALRN(PCE_BCALRN) AB8
SB_TX2N AC6
SB_RX2P
AA5
SB_RX2N
AA6 SB_TX2P AB6
GPP_RX0P
AE3
GPP_RX0N
AD4
GPP_RX1P
AE2
GPP_RX1N
AD3
GPP_TX0P AC1
GPP_TX0N AC2
GPP_TX1P AB4
GPP_TX1N AB3
GFX_RX0P
D4
GFX_RX0N
C4
GFX_RX1P
A3
GFX_RX1N
B3
GFX_RX2P
C2
GFX_RX2N
C1
GFX_RX3P
E5
GFX_RX3N
F5
GFX_RX4P
G5
GFX_RX4N
G6
GFX_RX5P
H5
GFX_RX5N
H6
GFX_RX6P
J6
GFX_RX6N
J5
GFX_RX7P
J7
GFX_RX7N
J8
GFX_RX8P
L5
GFX_RX8N
L6
GFX_RX9P
M8
GFX_RX9N
L8
GFX_RX10P
P7
GFX_RX10N
M7
GFX_RX11P
P5
GFX_RX11N
M5
GFX_RX12P
R8
GFX_RX12N
P8
GFX_RX13P
R6
GFX_RX13N
R5
GFX_RX14P
P4
GFX_RX14N
P3
GFX_RX15P
T4
GFX_RX15N
T3
GFX_TX0P A5
GFX_TX0N B5
GFX_TX1P A4
GFX_TX1N B4
GFX_TX2P C3
GFX_TX2N B2
GFX_TX3P D1
GFX_TX3N D2
GFX_TX4P E2
GFX_TX4N E1
GFX_TX5P F4
GFX_TX5N F3
GFX_TX6P F1
GFX_TX6N F2
GFX_TX7P H4
GFX_TX7N H3
GFX_TX8P H1
GFX_TX8N H2
GFX_TX9P J2
GFX_TX9N J1
GFX_TX10P K4
GFX_TX10N K3
GFX_TX11P K1
GFX_TX11N K2
GFX_TX12P M4
GFX_TX12N M3
GFX_TX13P M1
GFX_TX13N M2
GFX_TX14P N2
GFX_TX14N N1
GFX_TX15P P1
GFX_TX15N P2
GPP_TX4P Y4
GPP_TX4N Y3
GPP_TX5P V1
GPP_TX5N V2
GPP_RX4P
U5
GPP_RX4N
U6
GPP_RX5P
U8
GPP_RX5N
U7
C260 0.1U_0402_16V7K
1 2
C699 0.1U_0402_16V7K VGA@
1 2
C290 0.1U_0402_16V7K
1 2
C480 0.1U_0402_16V7KVGA@
1 2
C690 0.1U_0402_16V7K VGA@
1 2
C456 0.1U_0402_16V7KVGA@
1 2 C473 0.1U_0402_16V7KVGA@
1 2
C700 0.1U_0402_16V7K VGA@
1 2
C710 0.1U_0402_16V7K VGA@
1 2
C899 0.1U_0402_10V7KUMA@
1 2
C689 0.1U_0402_16V7K VGA@
1 2
C30 0.1U_0402_16V7K
1 2
C479 0.1U_0402_16V7KVGA@
1 2
C452 0.1U_0402_16V7K VGA@
1 2
C474 0.1U_0402_16V7KVGA@
1 2
R31 2K_0402_1%
1 2
C904 0.1U_0402_10V7KUMA@
1 2
C262 0.1U_0402_16V7K
1 2
C451 0.1U_0402_16V7K VGA@
1 2
C681 0.1U_0402_16V7K VGA@
1 2
C701 0.1U_0402_16V7K VGA@
1 2
C23 0.1U_0402_16V7K
1 2
C460 0.1U_0402_16V7KVGA@
1 2
C692 0.1U_0402_16V7K VGA@
1 2
C702 0.1U_0402_16V7K VGA@
1 2
C680 0.1U_0402_16V7K VGA@
1 2
C691 0.1U_0402_16V7K VGA@
1 2
C478 0.1U_0402_16V7KVGA@
1 2
C477 0.1U_0402_16V7KVGA@
1 2
C709 0.1U_0402_16V7K VGA@
1 2
C682 0.1U_0402_16V7K VGA@
1 2
C458 0.1U_0402_16V7KVGA@
1 2
C472 0.1U_0402_16V7KVGA@
1 2
C898 0.1U_0402_10V7KUMA@
1 2
C263 0.1U_0402_16V7K
1 2
C453 0.1U_0402_16V7K VGA@
1 2
C457 0.1U_0402_16V7KVGA@
1 2
C469 0.1U_0402_16V7K VGA@
1 2
C703 0.1U_0402_16V7K VGA@
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
GMCH_LCD_DATA
GMCH_TZCLK-
GMCH_TZCLK+
CLK_SBLINK_BCLK
CLK_SBLINK_BCLK#
+NB_HTPVDD
+AVDD2
+AVDDQ
+VDDLTP18
+VDDLTP18
NB_THERMAL_DC
+VDDLT18
NB_THERMAL_DA
AUX_CAL
GMCH_TXCLK-
GMCH_TXCLK+
GMCH_TXOUT0+
GMCH_TXOUT1-
GMCH_TXOUT1+
GMCH_TXOUT2-
GMCH_TXOUT2+
GMCH_TXOUT0-
NB_RESET#PLT_RST#
NB_OSC_14.318M
DAC_RSET
CLK_NBGFX
CLK_NBGFX#
+NB_PLLVDD
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
GMCH_LCD_CLK
GMCH_CRT_R
GMCH_CRT_B
GMCH_ENVDD
GMCH_CRT_VSYNC
GMCH_CRT_G
GMCH_CRT_HSYNC
NB_ALLOW_LDTSTOP
NB_LDTSTOP#
+VDDLT18
CLK_NBHT
CLK_NBHT#
GMCH_TZOUT1-
GMCH_TZOUT2-
GMCH_TZOUT2+
GMCH_TZOUT1+
GMCH_TZOUT0+
GMCH_TZOUT0-
SUS_STAT#
SUS_STAT_R#
GMCH_LCD_DATA
GMCH_LCD_CLK
NB_PWRGD_R
NB_LDTSTOP#
GMCH_CRT_CLK
GMCH_CRT_DATA
GMCH_DDC_CLK
GMCH_DDC_DATA
POWER_SEL
UMA_HPD
GMCH_DDC_CLK
GMCH_DDC_DATA
NB_PWRGD_R
GMCH_CRT_DATA
NB_ALLOW_LDTSTOP
GMCH_CRT_CLK
+AVDD1
ENBKL
+3VS
+NB_PLLVDD
+NB_HTPVDD
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+NB_HTPVDD+1.8VS
+1.8VS
+VDDA18PCIEPLL
+VDDA18HTPLL
+1.8VS
+VDDA18HTPLL
+VDDA18PCIEPLL
+1.1VS
+1.8VS
+1.1VS +NB_PLLVDD
+3VS
+1.8VS +3VS
+3VS
+1.8VS +1.8VS +3VS+1.8VS
+5VS +3VS
GMCH_CRT_R<18>
GMCH_CRT_G<18>
GMCH_CRT_B<18>
GMCH_CRT_HSYNC<13,18> GMCH_CRT_VSYNC<13,18> GMCH_CRT_CLK<18> GMCH_CRT_DATA<18>
PLT_RST#<13,19,26,28,30>
CLK_NBHT<15> CLK_NBHT#<15>
NB_OSC_14.318M<15>
CLK_NBGFX<15> CLK_NBGFX#<15>
CLK_SBLINK_BCLK<15> CLK_SBLINK_BCLK#<15>
GMCH_LCD_CLK<16> GMCH_LCD_DATA<16>
GMCH_DDC_DATA<17> GMCH_DDC_CLK<17>
POWER_SEL<41>
AUX_CAL<13>
NB_PWRGD<20>
LDT_STOP#<6,19>
CPU_LDT_REQ#<6>
ALLOW_LDTSTOP<19>
NB_THERMAL_DC <21>
NB_THERMAL_DA <21>
SUS_STAT_R# <13>
SUS_STAT# <20>
GMCH_ENVDD <16>
ENBKL <14,30>
GMCH_TXCLK+ <16>
GMCH_TXCLK- <16>
GMCH_TZCLK+ <16>
GMCH_TZCLK- <16>
GMCH_TZOUT2- <16>
GMCH_TZOUT2+ <16>
GMCH_TZOUT1- <16>
GMCH_TZOUT1+ <16>
GMCH_TZOUT0- <16>
GMCH_TZOUT0+ <16>
GMCH_TXOUT0+ <16>
GMCH_TXOUT0- <16>
GMCH_TXOUT1+ <16>
GMCH_TXOUT1- <16>
GMCH_TXOUT2+ <16>
GMCH_TXOUT2- <16>
UMA_HPD <17>
UMA_PNL_PWM <16>
BKOFF# <16,30>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
RS780 VEDIO/CLK GEN
Custom
11 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
NB temp to SB
Strap pin
Strap pin
AVDD=100mA
Strap pin
For RS780M A13
140
R540 1k for RS880M
C99
2.2U_0603_6.3V4Z
1
2
L7
FBM-L11-201209-300LMA30T_0805
1 2
C106
2.2U_0603_6.3V4Z
1
2
L17
MBK2012221YZF 0805
1 2
R71 150_0402_1%
1 2 L14
FBM-L11-201209-300LMA30T_0805
1 2
R332
0_0402_5%
1 2
R359
1.8K_0402_5%
1 2
G
D
S
Q56 FDV301N_NL_SOT23-3
@
2
13
R59 715_0402_1%
1 2
C69
2.2U_0603_6.3V4Z
1
2
G
D
S
Q28 FDV301N_NL_SOT23-3
@
2
13
R347 0_0402_5%@
1 2
R511 4.7K_0402_5%
1 2
R846 0_0402_5% @
1 2
C84
2.2U_0603_6.3V4Z
1
2
R330 0_0402_5%
UMA@
1 2
L42
MBC1608121YZF_0603
1 2
L12
FBM-L11-201209-300LMA30T_0805
1 2
PART 3 OF 6
PM
CLOCKs PLL PWR
MIS.
CRT/TVOUT
LVTM
U25C
RS780M_FCBGA528
VDDA18HTPLL
H17
SYSRESETb
D8
POWERGOOD
A10
LDTSTOPb
C10
ALLOW_LDTSTOP
C12
REFCLK_P/OSCIN(OSCIN)
E11
PLLVDD(NC)
A12
HPD(NC) D10
DDC_CLK0/AUX0P(NC)
A8 DDC_DATA0/AUX0N(NC)
B8
THERMALDIODE_P AE8
THERMALDIODE_N AD8
I2C_CLK
B9
STRP_DATA
B10
GFX_REFCLKP
T2
GFX_REFCLKN
T1
GPP_REFCLKP
U1
GPP_REFCLKN
U2
PLLVDD18(NC)
D14
PLLVSS(NC)
B12
TXOUT_L0P(NC) A22
TXOUT_L0N(NC) B22
TXOUT_L1P(NC) A21
TXOUT_L1N(NC) B21
TXOUT_L2P(NC) B20
TXOUT_L2N(DBG_GPIO0) A20
TXOUT_L3P(NC) A19
TXOUT_U0P(NC) B18
TXOUT_L3N(DBG_GPIO2) B19
TXOUT_U0N(NC) A18
TXOUT_U1P(PCIE_RESET_GPIO3) A17
TXOUT_U1N(PCIE_RESET_GPIO2) B17
TXOUT_U2P(NC) D20
TXOUT_U2N(NC) D21
TXOUT_U3P(PCIE_RESET_GPIO5) D18
TXOUT_U3N(NC) D19
TXCLK_LP(DBG_GPIO1) B16
TXCLK_LN(DBG_GPIO3) A16
TXCLK_UP(PCIE_RESET_GPIO4) D16
TXCLK_UN(PCIE_RESET_GPIO1) D17
VDDLTP18(NC) A13
VSSLTP18(NC) B13
C_Pr(DFT_GPIO5)
E17
Y(DFT_GPIO2)
F17
COMP_Pb(DFT_GPIO4)
F15
RED(DFT_GPIO0)
G18
TMDS_HPD(NC) D9
I2C_DATA
A9
TESTMODE D13
HT_REFCLKN
C24 HT_REFCLKP
C25
SUS_STAT#(PWM_GPIO5) D12
GREEN(DFT_GPIO1)
E18
BLUE(DFT_GPIO3)
E19
DAC_VSYNC(PWM_GPIO6)
B11 DAC_HSYNC(PWM_GPIO4)
A11
DAC_RSET(PWM_GPIO1)
G14
AVDD1(NC)
F12
AVDD2(NC)
E12
REDb(NC)
G17
GREENb(NC)
F18
AVDDDI(NC)
F14
AVSSDI(NC)
G15
AVDDQ(NC)
H15
AVSSQ(NC)
H14
VDDLT18_2(NC) B15
VDDLT33_1(NC) A14
VDDLT33_2(NC) B14
VSSLT1(VSS) C14
VSSLT2(VSS) D15
VDDLT18_1(NC) A15
VSSLT3(VSS) C16
VSSLT4(VSS) C18
VSSLT5(VSS) C20
LVDS_DIGON(PCE_TCALRP) E9
LVDS_BLON(PCE_RCALRP) F7
LVDS_ENA_BL(PWM_GPIO2) G12
VSSLT6(VSS) E20
VDDA18PCIEPLL1
D7
VDDA18PCIEPLL2
E7
BLUEb(NC)
F19
AUX_CAL(NC)
C8
GPPSB_REFCLKP(SB_REFCLKP)
V4
GPPSB_REFCLKN(SB_REFCLKN)
V3
DDC_DATA1/AUX1N(NC)
A7 DDC_CLK1/AUX1P(NC)
B7
DAC_SCL(PCE_RCALRN)
F8
DAC_SDA(PCE_TCALRN)
E8
REFCLK_N(PWM_GPIO3)
F11
VSSLT7(VSS) C22
RSVD
G11
R350 0_0402_5%@
1 2
R570
0_0402_5%
1 2
L41
MBK2012221YZF 0805
1 2
R40
4.7K_0402_5%
1 2
C433
2.2U_0603_6.3V4Z
1
2
R414
0_0402_5%
1 2
C75
22U_0805_6.3V6M
1
2
R34
4.7K_0402_5%
1 2
R333
300_0402_5%
1 2
R328
1.27K_0402_1%
UMA@
1 2
R64 133_0402_1%
1 2
R329 4.7K_0402_5%
1 2
L10
MBK2012221YZF 0805
1 2
R512 4.7K_0402_5%
1 2
R26 10K_0402_5%@
1 2
C65
22U_0805_6.3V6M
1
2
C443
4.7U_0805_10V4Z
1
2
R530
2.2K_0402_5%
@
12
C442
0.1U_0402_16V4Z
1
2
R338
300_0402_5%
@
1 2
R318 4.7K_0402_5%@
1 2
G
D
S
Q29 FDV301N_NL_SOT23-3
@
2
13
R319
0_0402_5%
1 2
R63 150_0402_1%
1 2
L46
MBC1608121YZF_0603
1 2
R847 0_0402_5%
1 2
R313
1.27K_0402_1%
UMA@
1 2
R325 4.7K_0402_5%
1 2
R534
4.7K_0402_5%
@
1 2
C118
2.2U_0603_6.3V4Z
1
2
C439
2.2U_0603_6.3V4Z
1
2
R324
4.7K_0402_5%
@
1 2
R317 0_0402_5%UMA@
1 2
R540
300_0402_5%
1 2
R571
0_0402_5%
1 2
L6
MBK2012221YZF 0805
1 2
R323 4.7K_0402_5%@
1 2
R316 0_0402_5%
1 2
R41 10K_0402_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+VDDA11PCIE
+VDDHTTX
+VDDHTRX
+VDDHT
+VDDA18PCIE
+1.1VS
+1.8VS
+1.1VS
+1.8VS
+1.2V_HT
+1.1VS
+3VS+1.8VS
+1.1VS
+1.8VS
+NB_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
RS780 PWR/GND
Custom
12 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
2A
2A
2A
2A
VDDA_12=2.5A
VDD_CORE=5A
0.68A
0.68A
0.6A
1.1A
7.6A
0.64A
shape add
C1120.1U_0402_16V4Z
1
2
C131
0.1U_0402_16V4Z
1
2
C1040.1U_0402_16V4Z
1
2
C88
22U_0805_6.3V6M
1
2
C82 0.1U_0402_16V4Z
1 2
C136
0.1U_0402_16V4Z
1
2
L5 0_0805_5%
1 2
C116
0.1U_0402_16V4Z
1
2
C139
0.1U_0402_16V4Z
1
2
C114
0.1U_0402_16V4Z
1
2
C73 0.1U_0402_16V4Z
1 2
C1030.1U_0402_16V4Z
1
2
L9
FBMA-L11-201209-221LMA30T_0805
12
C34 22U_0805_6.3V6M
+
C32 330U_D2E_2.5VM
1
2
C87
0.1U_0402_16V4Z
1
2
C1010.1U_0402_16V4Z
1
2
L21
FBMA-L11-201209-221LMA30T_0805
12
C81 1U_0402_6.3V4Z
1 2
C150
22U_0805_6.3V6M
1
2
C93
0.1U_0402_16V4Z
1
2
C92
22U_0805_6.3V6M
1
2
C970.1U_0402_16V4Z
1
2
C72
22U_0805_6.3V6M
1
2
+
C33
330U_D2E_2.5VM
1
2
C134
0.1U_0402_16V4Z
1
2
+
C29
330U_D2E_2.5VM
1
2
C940.1U_0402_16V4Z
1
2
C127
0.1U_0402_16V4Z
1
2
C121
0.1U_0402_16V4Z
1
2
C3822U_0805_6.3V6M
1
2
C86 1U_0402_6.3V4Z
1 2
C74 1U_0402_6.3V4Z
1 2
PART 6/6
GROUND
U25F
RS780M_FCBGA528
VSSAHT1
A25
VSSAHT2
D23
VSSAHT3
E22
VSSAHT4
G22
VSSAHT5
G24
VSSAHT6
G25
VSSAHT7
H19
VSSAHT8
J22
VSSAHT9
L17
VSSAHT10
L22
VSSAHT11
L24
VSSAHT12
L25
VSSAHT13
M20
VSSAHT14
N22
VSSAHT15
P20
VSSAHT16
R19
VSSAHT17
R22
VSSAHT18
R24
VSSAHT19
R25
VSSAHT21
U22
VSSAHT22
V19
VSSAHT23
W22
VSSAHT24
W24
VSSAHT25
W25
VSSAHT26
Y21
VSSAHT27
AD25
VSS2 D11
VSS3 G8
VSS4 E14
VSS5 E15
VSS7 J12
VSS8 K14
VSS9 M11
VSS10 L15
VSS11
L12
VSS12
M14
VSS13
N13
VSS14
P12
VSS15
P15
VSS16
R11
VSS17
R14
VSS18
T12
VSS19
U14
VSS20
U11
VSS21
U15
VSS22
V12
VSS23
W11
VSS24
W15
VSS25
AC12
VSS26
AA14
VSS27
Y18
VSS28
AB11
VSS29
AB15
VSS30
AB17
VSS31
AB19
VSS32
AE20
VSSAPCIE1 A2
VSSAPCIE2 B1
VSSAPCIE3 D3
VSSAPCIE4 D5
VSSAPCIE5 E4
VSSAPCIE6 G1
VSSAPCIE7 G2
VSSAPCIE8 G4
VSSAPCIE9 H7
VSSAPCIE10 J4
VSSAPCIE11 R7
VSSAPCIE12 L1
VSSAPCIE13 L2
VSSAPCIE14 L4
VSSAPCIE15 L7
VSS34
K11
VSSAPCIE16 M6
VSSAPCIE17 N4
VSSAPCIE18 P6
VSSAPCIE19 R1
VSSAPCIE20 R2
VSSAPCIE21 R4
VSSAPCIE22 V7
VSSAPCIE23 U4
VSSAPCIE24 V8
VSSAPCIE25 V6
VSSAPCIE26 W1
VSSAPCIE27 W2
VSSAPCIE28 W4
VSSAPCIE29 W7
VSSAPCIE30 W8
VSSAPCIE31 Y6
VSSAPCIE32 AA4
VSSAPCIE33 AB5
VSSAPCIE34 AB1
VSSAPCIE35 AB7
VSSAPCIE36 AC3
VSSAPCIE37 AC4
VSSAPCIE38 AE1
VSSAPCIE39 AE4
VSSAPCIE40 AB2
VSS1 AE14
VSSAHT20
H20
VSS33
AB21
VSS6 J15
C91
0.1U_0402_16V4Z
1
2
C432
1U_0402_6.3V4Z
1
2
C89
0.1U_0402_16V4Z
1
2
C35 22U_0805_6.3V6M
C85 1U_0402_6.3V4Z
1 2
L3 0_0805_5%
1 2
C109
22U_0805_6.3V6M
1
2
C135
0.1U_0402_16V4Z
1
2
C1020.1U_0402_16V4Z
1
2
C3622U_0805_6.3V6M
1
2
L16
FBMA-L11-201209-221LMA30T_0805
12
L4 0_0805_5%
1 2
C147
0.1U_0402_16V4Z
1
2
SBD_MEM/DVO_I/F
PAR 4 OF 6
U25D
RS780M_FCBGA528
MEM_A0(NC)
AB12
MEM_A1(NC)
AE16
MEM_A2(NC)
V11
MEM_A3(NC)
AE15
MEM_A4(NC)
AA12
MEM_A5(NC)
AB16
MEM_A6(NC)
AB14
MEM_A7(NC)
AD14
MEM_A8(NC)
AD13
MEM_A9(NC)
AD15
MEM_A10(NC)
AC16
MEM_A11(NC)
AE13
MEM_A12(NC)
AC14
MEM_A13(NC)
Y14
MEM_BA0(NC)
AD16
MEM_BA1(NC)
AE17
MEM_BA2(NC)
AD17
MEM_RASb(NC)
W12
MEM_CASb(NC)
Y12
MEM_WEb(NC)
AD18
MEM_CSb(NC)
AB13
MEM_CKE(NC)
AB18
MEM_ODT(NC)
V14
MEM_CKP(NC)
V15
MEM_CKN(NC)
W14
MEM_DM0(NC) W17
MEM_DM1/DVO_D8(NC) AE19
MEM_DQS0P/DVO_IDCKP(NC) Y17
MEM_DQS0N/DVO_IDCKN(NC) W18
MEM_DQS1P(NC) AD20
MEM_DQS1N(NC) AE21
MEM_DQ0/DVO_VSYNC(NC) AA18
MEM_DQ1/DVO_HSYNC(NC) AA20
MEM_DQ2/DVO_DE(NC) AA19
MEM_DQ3/DVO_D0(NC) Y19
MEM_DQ4(NC) V17
MEM_DQ5/DVO_D1(NC) AA17
MEM_DQ6/DVO_D2(NC) AA15
MEM_DQ7/DVO_D4(NC) Y15
MEM_DQ8/DVO_D3(NC) AC20
MEM_DQ9/DVO_D5(NC) AD19
MEM_DQ10/DVO_D6(NC) AE22
MEM_DQ11/DVO_D7(NC) AC18
MEM_DQ12(NC) AB20
MEM_DQ13/DVO_D9(NC) AD22
MEM_DQ14/DVO_D10(NC) AC22
MEM_DQ15/DVO_D11(NC) AD21
MEM_COMPP(NC)
AE12
MEM_COMPN(NC)
AD12 MEM_VREF(NC) AE18
IOPLLVDD18(NC) AE23
IOPLLVSS(NC) AD23
IOPLLVDD(NC) AE24
C1070.1U_0402_16V4Z
1
2
C95
0.1U_0402_16V4Z
1
2
C96 0.1U_0402_16V4Z
1
2
C123
0.1U_0402_16V4Z
1
2
PART 5/6
POWER
U25E
RS780M_FCBGA528
VDDHT_1
J17
VDDHT_2
K16
VDDHT_3
L16
VDDHT_4
M16
VDDHT_5
P16
VDDHT_6
R16
VDDHT_7
T16
VDDHTTX_1
AE25
VDDHTTX_2
AD24
VDDHTTX_3
AC23
VDDHTTX_4
AB22
VDDHTTX_5
AA21
VDDHTTX_6
Y20
VDDHTTX_7
W19
VDDHTTX_8
V18
VDDHTRX_1
H18
VDDHTRX_2
G19
VDDHTRX_3
F20
VDDHTRX_4
E21
VDDHTRX_5
D22
VDD18_1
F9
VDD18_2
G9
VDD18_MEM1(NC)
AE11
VDD18_MEM2(NC)
AD11
VDDA18PCIE_1
J10
VDDA18PCIE_2
P10
VDDA18PCIE_3
K10
VDDA18PCIE_10
Y9
VDDA18PCIE_11
AA9
VDDA18PCIE_12
AB9
VDDA18PCIE_13
AD9
VDDA18PCIE_14
AE9
VDDA18PCIE_6
W9
VDDA18PCIE_7
H9
VDDPCIE_1 A6
VDDPCIE_2 B6
VDDPCIE_3 C6
VDDPCIE_4 D6
VDDPCIE_5 E6
VDDPCIE_6 F6
VDDPCIE_7 G7
VDDPCIE_8 H8
VDDPCIE_9 J9
VDDA18PCIE_4
M10
VDDA18PCIE_5
L10
VDDC_1 K12
VDDC_2 J14
VDDC_3 U16
VDDPCIE_11 M9
VDDC_4 J11
VDDC_5 K15
VDDPCIE_10 K9
VDDC_6 M12
VDDC_7 L14
VDDC_8 L11
VDDC_9 M13
VDDC_10 M15
VDDC_11 N12
VDDC_12 N14
VDDC_13 P11
VDDC_14 P13
VDDC_15 P14
VDDC_16 R12
VDDC_17 R15
VDDC_18 T11
VDDC_19 T15
VDDC_20 U12
VDDC_21 T14
VDD33_1(NC) H11
VDD33_2(NC) H12
VDD_MEM1(NC) AE10
VDD_MEM2(NC) AA11
VDD_MEM3(NC) Y11
VDD_MEM4(NC) AD10
VDD_MEM6(NC) AC10
VDD_MEM5(NC) AB10
VDDA18PCIE_8
T10
VDDC_22 J16
VDDPCIE_12 L9
VDDA18PCIE_9
R10
VDDPCIE_13 P9
VDDPCIE_14 R9
VDDPCIE_15 T9
VDDPCIE_16 V9
VDDPCIE_17 U9
VDDA18PCIE_15
U10
VDDHTRX_6
B23
VDDHTRX_7
A23
VDDHTTX_9
U17
VDDHTTX_10
T17
VDDHTTX_11
R17
VDDHTTX_12
P17
VDDHTTX_13
M17
C1100.1U_0402_16V4Z
1
2
C117
0.1U_0402_16V4Z
1
2
L25
FBMA-L11-201209-221LMA30T_0805
12
C431
1U_0402_6.3V4Z
@
1
2
C130
22U_0805_6.3V6M
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+3VS
+3VS
GMCH_CRT_VSYNC<11,18>
AUX_CAL<11>
PLT_RST# <11,19,26,28,30>SUS_STAT_R#<11>
GMCH_CRT_HSYNC<11,18>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
RS780 STRAPS
Custom
13 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
Enables the Test Debug Bus using GPIO. (VSYNC)
1 : Disable (RS780)
0 : Enable (Rs780)
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
DFT_GPIO1: LOAD_EEPROM_STRAPS
RS780 DFT_GPIO1
RS780 use HSYNC to enable SIDE PORT RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)
0. Enable (RS780)
1 : Disable(RS780)
RS780 use HSYNC to enable SIDE PORT
D17
CH751H-40_SC76@
2 1
R45 3K_0402_5%@12
R320 150_0402_1%@1 2
R340 3K_0402_5%
12
R339 3K_0402_5%
@12
R46 3K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_TXOUT1+
VGA_TXCLK-
VGA_TXCLK+
CLK_PCIE_VGA
CLK_PCIE_VGA#
VGA_PRSNT_L
VGA_CRT_B
VGA_CRT_G
VGA_CRT_R
VGA_HPD
VGA_TZCLK-
VGA_TZCLK+
VGA_TZOUT2-
VGA_TZOUT0+
VGA_TZOUT1+
VGA_TZOUT0-
VGA_TZOUT1-
VGA_TZOUT2+
VGA_TXOUT1-
VGA_TXOUT0+
VGA_TXOUT2-
VGA_TXOUT0-
VGA_TXOUT2+
HDMI_TX0-_VGA
HDMI_TX0+_VGA
HDMI_TX2-_VGA
HDMI_TX2+_VGA
HDMI_CLK-_VGA
HDMI_CLK+_VGA
VGA_HDMI_SCLK
VGA_HDMI_SDATA
HDMI_TX1-_VGA
HDMI_TX1+_VGA
VGA_RST#
VGA_DDC_CLK
VGA_DDC_DATA
TH_OVERT#
VGA_DISABLE#
VGA_PWRGD
VGA_HDMI_CEC
VGA_WAKE#
I2CC_SCL
I2CC_SDA
TH_OVERT#
D_EC_SMB_CK1
D_EC_SMB_DA1
ENVDD
AC_BATT#
VGA_PWRGD
VGA_WAKE#
VGA_ON
VGA_PRSNT_R
VGA_DISABLE#
AC_BATT#
VGA_HDMI_CEC
D_EC_SMB_CK1
D_EC_SMB_DA1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
+3VS +5VS
+3VS
+MXM_B+
B+
+3VS
+3VS
+5VS
+MXM_B++MXM_B+
+3VS
+3VS
+3VS
+3VS
+3VS
+5VS
EC_SMB_DA1<6,30,38>
EC_SMB_CK1<6,30,38>
PCIE_MTX_C_GRX_N[0..15]<10>
PCIE_MTX_C_GRX_P[0..15]<10>
PCIE_GTX_C_MRX_N[0..15]<10>
PCIE_GTX_C_MRX_P[0..15]<10>
EC_ACIN <30>
I2CC_SCL<16> I2CC_SDA<16>
CLK_PCIE_VGA<15> CLK_PCIE_VGA#<15>
VGA_TZCLK-<16> VGA_TZCLK+<16>
VGA_PRSNT_R <21>
VGA_PWRGD <30>
VGA_ON <32>
TH_OVERT# <30>
ENVDD<16> ENBKL<11,30>
I2CC_SDA<16> I2CC_SCL<16>
VGA_TZOUT2-<16> VGA_TZOUT2+<16>
VGA_TZOUT1-<16> VGA_TZOUT1+<16>
VGA_TZOUT0+<16> VGA_TZOUT0-<16>
VGA_HDMI_SDATA<17> VGA_HDMI_SCLK<17>
VGA_PRSNT_L<21>
VGA_RST# <19>
VGA_DDC_DATA <18>
VGA_DDC_CLK <18>
VGA_CRT_VSYNC <18>
VGA_CRT_HSYNC <18>
VGA_CRT_R <18>
VGA_CRT_G <18>
VGA_CRT_B <18>
VGA_TXCLK- <16>
VGA_TXCLK+ <16>
VGA_TXOUT2- <16>
VGA_TXOUT2+ <16>
VGA_TXOUT1- <16>
VGA_TXOUT1+ <16>
VGA_TXOUT0- <16>
VGA_TXOUT0+ <16>
VGA_HPD <17>
HDMI_TX0+_VGA<17> HDMI_TX0-_VGA<17>
HDMI_TX1+_VGA<17> HDMI_TX1-_VGA<17>
HDMI_TX2+_VGA<17> HDMI_TX2-_VGA<17>
HDMI_CLK-_VGA<17> HDMI_CLK+_VGA<17>
VGA_PNL_PWM<16>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
MXM Connector
B
14 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
Increase the rise time
Ps. Module have 4.7K Pull-UP
160mil(4A)
160mil(4A)
40mil(1A)
(Pull-UP 10K at PCH)
(Reserved)
(Reserved)
(Reserved)
SYSTEM
100mil(2.5A, 5VIA)
LVDS DDC Module have 4.7K
Pull-UP
VGA_PWRGD/TH_OVERT# Connect to EC
R245
1K_0402_5%
VGA@
12
R97 10K_0402_5%@
1 2
R291
0_0402_5% VGA@
1 2
R114 10K_0402_5%VGA@
1 2
L75
FBMA-L11-201209-221LMA30T_0805
VGA@
1 2
R22 4.3K_0402_5% VGA@
1 2
D27
CH751H-40PT_SOD323-2
VGA@
2 1
C912
0.1U_0402_16V4Z
@
1
2
R336
4.7K_0402_5%
@
12
R23 4.3K_0402_5%VGA@
1 2
JMXM2B
JAE_MM70-314-310B1-1
GND
167 GND 166
GND
173 GND 172
GND
179 GND 178
GND
185 GND 184
VGA_DDC_DAT 190
PEX_RX2#
169
PEX_RX1#
175
PEX_RX0#
181
PEX_TX2# 168
PEX_TX1# 174
PEX_TX0# 180
PEX_RX0
183
PEX_RX1
177
PEX_RX2
171
PEX_TX0 182
PEX_TX1 176
PEX_TX2 170
PEX_REFCLK#
187 PEX_CLK_REQ# 186
PEX_REFCLK
189 PEX_RST# 188
GND
191
RSVD
193 VGA_DDC_CLK 192
VGA_VSYNC 194
VGA_HSYNC 196
VGA_RED 200
VGA_GREEN 202
GND 206
GND 212
GND 218
GND 224
LVDS_LTX1# 226
LVDS_LTX2# 220
LVDS_LTX3# 214
LVDS_LCLK# 208
GND 230
GND 236
GND 242
GND 248
LVDS_LTX0# 232
DP_D_L0# 238
DP_D_L1# 244
DP_D_L2# 250
DP_D_L2 252
DP_D_L1 246
DP_D_L0 240
LVDS_LTX0 234
LVDS_LTX1 228
LVDS_LTX2 222
LVDS_LTX3 216
LVDS_LCLK 210
VGA_BLUE 204
GND 198
RSVD
195
RSVD
201
GND
207
GND
213
GND
219
GND
225
GND
231
GND
237
GND
243
GND
249
LVDS_UCLK#
203
LVDS_UTX3#
209
LVDS_UTX2#
215
LVDS_UTX1#
221
RSVD
197
RSVD
199
LVDS_UTX1
223
LVDS_UTX2
217
LVDS_UTX3
211
LVDS_UCLK
205
LVDS_UTX0#
227
DP_C_L0#
233
DP_C_L1#
239
DP_C_L2#
245
LVDS_UTX0
229
DP_C_L0
235
DP_C_L1
241
DP_C_L2
247
DP_C_L3#
251
DP_C_L3
253
GND
255
DP_C_AUX#
257 GND 254
DP_D_L3# 256
DP_C_AUX
259 DP_D_L3 258
RSVD
261 GND 260
RSVD
263 DP_D_AUX# 262
RSVD
265 DP_D_AUX 264
RSVD
267 DP_C_HPD 266
RSVD
269 DP_D_HPD 268
RSVD
271 RSVD 270
RSVD
273 RSVD 272
RSVD
275 RSVD 274
RSVD
277 GND 276
RSVD
279 DP_B_L0# 278
RSVD
281 DP_B_L0 280
RSVD
283
DP_A_L0
289
DP_A_L1
295
DP_A_L2
301
DP_A_L3
307
GND
309
DP_A_AUX#
311
DP_A_AUX
313
PRSNT_L#
314
GND
285
GND
291
GND
297
GND
303
GND 282
GND 288
GND 294
GND 300
DP_B_HPD 306
DP_A_HPD 308
3V3 310
3V3 312
DP_B_L1# 284
DP_B_L2# 290
DP_B_L3# 296
DP_B_AUX# 302
DP_A_L0#
287
DP_A_L1#
293
DP_A_L3#
305
DP_A_L2#
299
DP_B_AUX 304
DP_B_L3 298
DP_B_L2 292
DP_B_L1 286
GND
315 GND 316
R292
0_0402_5%
@
12
R128 10K_0402_5%@
1 2
L74
FBMA-L11-201209-221LMA30T_0805
VGA@
1 2
C183
0.1U_0402_16V4Z
VGA@
1
2
R322
4.7K_0402_5%
@
12
R142 10K_0402_5%@
1 2
G
D
S
Q70
2N7002_SOT23
VGA@
2
1 3
C399
10U_0805_6.3V6M
VGA@
1
2
C911
68P_0402_50V8J
VGA@
1
2
G
D
S
Q69
2N7002_SOT23
VGA@
2
1 3
E1 E2
E3 E4
JMXM2A
JAE_MM70-314-310B1-1
PRSNT_R# 42
WAKE# 44
PWR_GOOD 46
PWR_EN 48
RSVD 50
RSVD 52
RSVD 54
RSVD 56
PWR_LEVEL 58
TH_OVERT# 60
TH_ALERT# 62
TH_PWM 64
GPIO0 66
GPIO1 68
GPIO2 70
SMB_DAT 72
SMB_CLK 74
GND 76
OEM 78
OEM 80
OEM 82
OEM 84
GND 86
PEX_TX15# 88
PEX_TX15 90
GND 92
PEX_TX14# 94
PEX_TX14 96
GND 98
PEX_TX13# 100
PEX_TX13 102
GND 104
PEX_TX12# 106
PEX_TX12 108
GND 110
PEX_TX11# 112
PEX_TX11 114
GND 116
PEX_TX10# 118
PEX_TX10 120
GND 122
PEX_TX9# 124
PEX_TX9 126
GND 128
PEX_TX8# 130
PEX_TX8 132
GND 134
PEX_TX7# 136
PEX_TX7 138
GND 140
PEX_TX6# 142
PEX_TX6 144
GND 146
PEX_TX5# 148
PEX_TX5 150
GND 152
PEX_TX4# 154
PEX_TX4 156
GND 158
PEX_TX3# 160
PEX_TX3 162
GND 164
PWR_SRC
1
5V
41
5V
43
5V
45
5V
47
5V
49
GND
51
GND
53
GND
55
GND
57
PEX_STD_SW#
59
VGA_DISABLE#
61
PNL_PWR_EN
63
PNL_BL_EN
65
PNL_BL_PWM
67
HDMI_CEC
69
DVI_HPD
71
LVDS_DDC_DAT
73
LVDS_DDC_CLK
75
GND
77
OEM
79
OEM
81
OEM
83
OEM
85
GND
87
PEX_RX15#
89
PEX_RX15
91
GND
93
PEX_RX14#
95
PEX_RX14
97
GND
99
PEX_RX13#
101
PEX_RX13
103
GND
105
PEX_RX12#
107
PEX_RX12
109
GND
111
PEX_RX11#
113
PEX_RX11
115
GND
117
PEX_RX10#
119
PEX_RX10
121
GND
123
PEX_RX9#
125
PEX_RX9
127
GND
129
PEX_RX8#
131
PEX_RX8
133
GND
135
PEX_RX7#
137
PEX_RX7
139
GND
141
PEX_RX6#
143
PEX_RX6
145
GND
147
PEX_RX5#
149
PEX_RX5
151
GND
153
PEX_RX4#
155
PEX_RX4
157
GND
159
PEX_RX3#
161
PEX_RX3
163
GND
165
PWR_SRC
3
PWR_SRC
5
PWR_SRC
7
PWR_SRC
9
PWR_SRC
11
PWR_SRC
13
PWR_SRC
15
PWR_SRC
19 PWR_SRC
17
GND
37
GND
23
GND
29 GND
27
GND
33
GND
25
GND
31
GND
21
GND
39
GND
35
PWR_SRC 10
PWR_SRC 2
PWR_SRC 18
PWR_SRC 20
PWR_SRC 14
PWR_SRC 16
PWR_SRC 6
PWR_SRC 12
PWR_SRC 8
PWR_SRC 4
GND 24
GND 30
GND 26
GND 40
GND 36
GND 34
GND 38
GND 28
GND 22
GND 32
R305
0_0402_5%
@
1 2
C910
680P_0603_50V7K
VGA@
1
2
C418
4.7U_0805_10V4Z
VGA@
1
2
C909
0.1U_0603_25V7K
VGA@
1
2
R96 10K_0402_5%VGA@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_SMBCLK0
ICH_SMBDATA0
CLK_SRC0
CLK_SRC0#
CLK_ATIG1
CLK_ATIG1#
CLK_ATIG0
CLK_ATIG0#
MINI2_CLKREQ#
MINI1_CLKREQ#
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_HTT
CLK_HTT#
SEL_27
CLK_XTAL_IN
CLK_XTAL_OUT
CLK_48M_USB CLK_48M_USB_R
CLK_XTAL_IN
CLK_XTAL_OUT
SEL_HT66
SEL_SATA
NB_OSC_14.318M
SRC_SLOW
CLK_NBHT#
CLK_NBHT
CLK_NBGFX
CLK_NBGFX#
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_CPU#
CLK_CPU
CLK_SRC3#
CLK_SRC3
CLK_SRC2
CLK_SRC2#
SRC_SLOW
+CLK_VDDA
CLK_SBLINK_BCLK#
CLK_SBLINK_BCLKCLK_SB_SRC0
CLK_SB_SRC0#
CLK_SBSRC_BCLK#
CLK_SBSRC_BCLKCLK_SB_SRC1
CLK_SB_SRC1#
CLK_14M_SIO
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI2
CLK_PCIE_MINI2#
CLK_SD_48M_RCLK_SD_48M
SB_14M_OSC SEL_HT66
SEL_SATA
+3VS_CLK
+VDDCLK_IO
+3VS_CLK
+3VS_CLK
+3VS_CLK
+VDDCLK_IO
+1.2V_HT
+3VS_CLK
+3VS
+3VS_CLK
+3VS_CLK
+3VS_CLK
MINI1_CLKREQ#<28>
MINI2_CLKREQ#<28>
NB_OSC_14.318M<11>
CLK_14M_SIO<30>
CLK_48M_USB<20>
ICH_SMBCLK0 <8,9,20,28>
ICH_SMBDATA0 <8,9,20,28>
CLK_CPU_BCLK <6>
CLK_CPU_BCLK# <6>
CLK_NBHT <11>
CLK_NBHT# <11>
CLK_NBGFX <11>
CLK_NBGFX# <11>
CLK_PCIE_VGA <14>
CLK_PCIE_VGA# <14>
CLK_PCIE_LAN <26>
CLK_PCIE_LAN# <26>
CLK_PCIE_MINI1 <28>
CLK_PCIE_MINI1# <28>
CLK_PCIE_MINI2 <28>
CLK_PCIE_MINI2# <28>
CLK_SBLINK_BCLK <11>
CLK_SBLINK_BCLK# <11>
CLK_SBSRC_BCLK <19>
CLK_SBSRC_BCLK# <19>
CLK_SD_48M<25>
SB_14M_OSC<19>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
Clock generator
Custom
15 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
GLAN
VGA chip(Dis)
NB GFX
CPU
REQ0# FOR SRC1
100M DIFF
GPPSB_REFCLK 100M DIFF 100M DIFF
100M DIFF(IN/OUT)*
HT_REFCLKP
RS740 RX780 RS780
NB CLOCK INPUT TABLE
NC
66M SE(SINGLE END)
NC 100M DIFF
100M DIFF 100M DIFF
100M DIFF
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
NB CLOCKS
NC NC vref
HT_REFCLKN
100M DIFF
REFCLK_P
100M DIFF
REFCLK_N
NC
GFX_REFCLK
GPP_REFCLK
100M DIFF
NEW CARD
MINI2
LAN
SRC 0
MINI1
SRC 1
SRC 2
SRC 3
configure as single-ended 66MHz output
SEL_SATA
SEL_HTT66
* default SPREAD 100M SATA SRC6 output
1
*0
1*
0
configure as differential 100MHz output
100M SATA SRC6 output
configure as 27M and 27M_SS output
NB_OSC_14.318M 1
*0 configure as SRC_7 output
1U CLOSE PIN 69
MiniCard_2
MiniCard_1
REQ2# FOR SRC2
REQ3# FOR SRC3
NB A LINK
SB RCLK
External 14MHz CLK for SB710
R522 33_0402_5%
12
R220 8.2K_0402_5%
12
C360
22P_0402_50V8J
1
2
C326
0.1U_0402_16V4Z
1
2
R206 0_0402_5%
1 2
C343 0.1U_0402_16V4Z
12
R201 8.2K_0402_5%
1 2
C316
0.1U_0402_16V4Z
1
2
Y4
14.31818MHZ_20P_6X1430004201
12 R210
8.2K_0402_5%
@
12
C669
1U_0603_10V6K
@
1
2
R226 0_0402_5%
1 2
C319
0.1U_0402_16V4Z
1
2
R225 0_0402_5%
1 2
R263 0_0402_5%
1 2
C313
22U_0805_10V4Z
1
2
R223 0_0402_5%
1 2
R238
8.2K_0402_5%
1 2
R222 0_0402_5%
1 2
R262 0_0402_5%
1 2
C361
0.1U_0402_16V4Z
1
2
R503
FBMA-L11-160808-601LMT 0603
1 2
R235
8.2K_0402_5%
1 2
R192
FBMA-L11-201209-601LMT 0805
1 2
R230
FBMA-L11-201209-601LMT 0805
1 2
R234
8.2K_0402_5% @
1 2
C311
22U_0805_10V4Z
1
2
C364
0.1U_0402_16V4Z
1
2
R239 0_0402_5%
1 2
C346
0.1U_0402_16V4Z
1
2
C348
22U_0805_10V4Z
1
2
C323
0.1U_0402_16V4Z
1
2
R240 0_0402_5%
1 2
R197
8.2K_0402_5%
12
C362
0.1U_0402_16V4Z
1
2
R237
8.2K_0402_5%
@
1 2
R213 0_0402_5%
1 2
ICS 9LPRS488
U20
ICS9LPRS488AKLFT_MLF72_10x10
SMBCLK 1
SMBDAT 2
VDDDOT
3
SRC7C_LPRS/27MHz_NS 4
SRC7T_LPRS/27MHz_SS 5
GNDDOT
6
SRC5C_LPRS 7
SRC5T_LPRS 8
SRC4C_LPRS 9
SRC4T_LPRS 10
GNDSRC
11
VDDSRC_IO
12
SRC3C_LPRS 13
SRC3T_LPRS 14
SRC2C_LPRS 15
SRC2T_LPRS 16
VDDSRC
17
VDDSRC_IO
18
GNDSRC
19
SRC1C_LPRS 20
SRC1T_LPRS 21
SRC0C_LPRS 22
SRC0T_LPRS 23
CLKREQ0 #
24
ATIG2C_LPRS 25
ATIG2T_LPRS 26
GNDATIG
27
VDDATIG_IO
28
VDDATIG
29
ATIG1C_LPRS 30
ATIG1T_LPRS 31
ATIG0C_LPRS 32
ATIG0T_LPRS 33
SB_SRC1C_LPRS 34
SB_SRC1T_LPRS 35
GNDSB_SRC
36
GND48
72
48MHz_0
71
48MHz_1
70
VDD48
69
X2
68
X1
67
GNDREF
66
REF0/SEL_HTT66
65
REF1/SEL_SATA
64
REF2/SEL_27
63
VDDREF
62
VDDHTT
61
HTT0T_LPRS / 66 M 60
HTT0C_LPRS / 66 M 59
GNDHTT
58
PD# 57
CPUKG0T_LPRS 56
CPUKG0C_LPRS 55
VDDCPU
54
VDDCPU_IO
53
GNDCPU
52
CLKREQ1#
51
CLKREQ2#
50
VDDA
49
GNDA
48
GNDSATA
47
SRC6T/SATAT_LPRS 46
SRC6C/SATAC_LPRS 45
VDDSATA
44
CLKREQ3#
43
CLKREQ4#
42
SB_SRC_SLOW# 41
SB_SRC0T_LPRS 40
SB_SRC0C_LPRS 39
VDDSB_SRC
38
VDDSB_SRC_IO
37
GNDPAD
73
R214
261_0402_1%@
12
R227 0_0402_5%
VGA@
1 2
C365
0.1U_0402_16V4Z
1
2
C322
0.1U_0402_16V4Z
1
2
C363
0.1U_0402_16V4Z
1
2
R218 0_0402_5%
1 2
C344
0.1U_0402_16V4Z
1
2
R229 0_0402_5%VGA@
1 2
R251 33_0402_5%
@
12 R256 0_0402_5%
1 2
C325
0.1U_0402_16V4Z
1
2
C321
0.1U_0402_16V4Z
1
2
R199 0_0402_5%
1 2
R231 100_0402_5%
1 2
R255 0_0402_5%
1 2
R200 0_0402_5%
1 2
R190
FBMA-L11-201209-601LMT 0805
1 2
C339
0.1U_0402_16V4Z
1
2
R243 33_0402_5%
12
R232 200_0402_1%
1 2
C324
0.1U_0402_16V4Z
1
2
C368
22P_0402_50V8J
1
2
R244 33_0402_5%
12
C350
1U_0402_6.3V4Z
1
2
R215 0_0402_5%
1 2
R205 8.2K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DAC_BRIG
INVT_PWM
DISPOFF#
TXOUT1-
TXOUT1+
TXOUT0-
TXOUT0+
TXCLK+
TXCLK-
TXOUT2+
TXOUT2-
GMCH_ENVDD
ENVDD
TXOUT1-
TZOUT2+
TXCLK-
TXOUT2+
TXOUT1+
TXCLK+
TXOUT2-
TZOUT0+
TZOUT0-
TZOUT1-
TZCLK-
TZCLK+
TZOUT2-
TZOUT1+
GMCH_LCD_DATA
GMCH_LCD_CLKI2CC_SCL
I2CC_SDA
DAC_BRIG
INVT_PWM
DISPOFF#
I2CC_SCL
I2CC_SDA
TZOUT1+
TZOUT1-
TZOUT0+
TZOUT0-
TZCLK+
TZCLK-
TZOUT2+
TZOUT2-
GMCH_TXOUT2-
GMCH_TXOUT2+
GMCH_TXOUT1-
GMCH_TXOUT1+
GMCH_TXOUT0+
GMCH_TXCLK+
GMCH_TXOUT0-
GMCH_TXCLK-
GMCH_TZOUT0+
GMCH_TZOUT0-
GMCH_TZCLK+
GMCH_TZCLK-
GMCH_TZOUT1+
GMCH_TZOUT1-
GMCH_TZOUT2+
GMCH_TZOUT2-
USB20_N3
USB20_P3
VGA_TXOUT1+
VGA_TXOUT2+
VGA_TXCLK+
VGA_TZOUT0+
VGA_TZOUT1+
VGA_TZCLK+
VGA_TXOUT0+
VGA_TXOUT1-
VGA_TXOUT2-
VGA_TXOUT0-
VGA_TXCLK-
VGA_TZCLK-
VGA_TZOUT0-
VGA_TZOUT1-
TXOUT1+
TXOUT0+
TXOUT2+
TXCLK+
TZOUT0+
TZOUT1+
TZCLK+
TXOUT1-
TXOUT0-
TXCLK-
TXOUT2-
TZOUT1-
TZOUT0-
TZCLK-
TZOUT2-
TZOUT2+ VGA_TZOUT2-
VGA_TZOUT2+
TXOUT0-
TXOUT0+
INVT_PWM
INVT_PWM
DISPOFF#BKOFF#
USB20_CMOS_N3
USB20_CMOS_P3
USB20_CMOS_P3
USB20_N3
USB20_P3
USB20_CMOS_N3
+3VS
+LCDVDD
+3VS
+LCDVDD
+LCDVDD
+3VALW
+INVPWR_B+
+INVPWR_B+
B+ +LCDVDD
+3VS
+3VS
+3VALW
GMCH_ENVDD<11>
ENVDD<14>
BKOFF#<11,30>
I2CC_SCL<14> I2CC_SDA<14>
USB20_N3<20> USB20_P3<20>
DAC_BRIG <30>
INVT_PWM <30>
VGA_TXOUT0+ <14>
VGA_TXOUT0- <14>
VGA_TXOUT1+ <14>
VGA_TXOUT1- <14>
VGA_TXOUT2+ <14>
VGA_TXOUT2- <14>
VGA_TXCLK+ <14>
VGA_TXCLK- <14>
VGA_TZOUT0+ <14>
VGA_TZOUT0- <14>
VGA_TZOUT1+ <14>
VGA_TZOUT1- <14>
VGA_TZCLK+ <14>
VGA_TZCLK- <14>
GMCH_LCD_CLK <11>
GMCH_LCD_DATA <11>
GMCH_TXOUT0- <11>
GMCH_TXOUT0+ <11>
GMCH_TXOUT1- <11>
GMCH_TXOUT1+ <11>
GMCH_TXOUT2- <11>
GMCH_TXOUT2+ <11>
GMCH_TXCLK- <11>
GMCH_TXCLK+ <11>
GMCH_TZOUT0- <11>
GMCH_TZOUT0+ <11>
GMCH_TZOUT1- <11>
GMCH_TZOUT1+ <11>
GMCH_TZOUT2- <11>
GMCH_TZOUT2+ <11>
GMCH_TZCLK- <11>
GMCH_TZCLK+ <11>
VGA_TZOUT2- <14>
VGA_TZOUT2+ <14>
VGA_PNL_PWM<14>
UMA_PNL_PWM<11>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
LVDS & DVI Connector
B
16 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
LCD POWER CIRCUIT
LCD/PANEL BD. Conn.
W=60mils
W=60mils
W=60mils
W=40mils
RP25 0_0404_4P2R_5%VGA@
1 4
2 3
RP5 0_0404_4P2R_5%UMA@
1 4
2 3
R7
100K_0402_5%
VGA@
12
RP1 0_0404_4P2R_5%UMA@
1 4
2 3
RP2 0_0404_4P2R_5%UMA@
1 4
2 3
RP8 0_0404_4P2R_5%UMA@
1 4
2 3
C7
0.1U_0402_16V4Z
1
2
Q2B
2N7002DW-T/R7_SOT363-6
3
5
4
C4
10U_0805_10V4Z
1
2
RP24 0_0404_4P2R_5%VGA@
1 4
2 3
Q2A
2N7002DW-T/R7_SOT363-6
61
2
RP28 0_0404_4P2R_5%VGA@
1 4
2 3
RP31 0_0404_4P2R_5%VGA@
1 4
2 3
R574 0_0603_5%
1 2
RP26 0_0404_4P2R_5%VGA@
1 4
2 3
R6 0_0402_5%UMA@
1 2
L22
WCM2012F2S-900T04_0805
<>
1
122
33
4
4
C5
4.7U_0805_10V4Z
1
2
C13
68P_0402_50V8J
1
2
R575 0_0603_5%@
1 2
R3 1K_0402_5%
12
RP30 0_0404_4P2R_5%VGA@
1 4
2 3
R1 0_0402_5%
@
1 2
C11 220P_0402_50V7K
1 2
RP6 0_0404_4P2R_5%UMA@
1 4
2 3
C12
680P_0402_50V7K
1
2
C2
4.7U_0805_10V4Z
1
2
R610 0_0402_5%@
1 2
L1
KC FBM-L11-201209-221LMAT_0805
12
C8 220P_0402_50V7K
1 2
RP27 0_0404_4P2R_5%VGA@
1 4
2 3
C6
0.1U_0402_16V4Z
1
2
R8
4.7K_0402_5%
@
12
RP29 0_0404_4P2R_5%VGA@
1 4
2 3
C10 0.1U_0402_16V4Z
1
2
R2 0_0402_5%
@
1 2
RP3 0_0404_4P2R_5%UMA@
1 4
2 3
R611 0_0402_5%@
1 2
R612 0_0402_5%
1 2 C9 220P_0402_50V7K
1 2
C3
0.047U_0402_16V7K
1
2
R4 0_0402_5%VGA@
1 2
RP13 0_0404_4P2R_5%UMA@
1 4
2 3
R9
100K_0402_5%
12
D2
RB751V_SOD323
@
21
R5
300_0603_5%
12
JLVDS
ACES_87242-4001-09
CONN@
11
2
233
4
455
6
677
8
899
10
10 11 11
12
12 13 13
14
14
17 17
18
18 19 19
21 21
22
22 23 23
24
24 25 25
26
26 27 27
28
28 29 29
30
30 31 31
32
32 33 33
34
34 35 35
36
36 37 37
38
38 39 39
40
40 GMD 41
GND
42
15 15
20
20
16
16
RP7 0_0404_4P2R_5%UMA@
1 4
2 3
L2
KC FBM-L11-201209-221LMAT_0805
12
G
D
S
Q1
AO3413_SOT23-3
2
1 3
RP4 0_0404_4P2R_5%UMA@
1 4
2 3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDMI_R_CK-HDMI_C_CLK-
HDMI_R_D0-HDMI_C_TX0-
HDMI_C_TX0+ HDMI_R_D0+
HDMI_C_CLK+ HDMI_R_CK+
HDMI_R_D1-HDMI_C_TX1-
HDMI_R_D2-HDMI_C_TX2-
HDMI_C_TX2+ HDMI_R_D2+
HDMI_C_TX1+ HDMI_R_D1+
HDMI_R_CK-
HDMI_R_D1+
HDMI_R_D1-
HDMI_R_D2-
HDMI_R_CK+
HDMI_R_D2+
HDMI_R_D0+
HDMI_R_D0-
HDMI_HPD
HDMI_SCLK
HDMI_SDATA
HDMI_SDATA
VGA_HDMI_SCLK_R HDMI_SCLK
VGA_HDMI_SDATA_R
HDMI_HPD
HDMI_C_TX1-
HDMI_C_TX2-
HDMI_C_TX0+
HDMI_C_TX2+
HDMI_C_TX1+
HDMI_C_CLK+
HDMI_C_CLK-
HDMI_C_TX0-
HDMI_R_D1-
HDMI_R_D1+
HDMI_R_CK-
HDMI_R_CK+
HDMI_R_D2-
HDMI_R_D2+
HDMI_R_D0-
HDMI_R_D0+
VGA_HDMI_SDATA
GMCH_DDC_DATA
VGA_HDMI_SCLK
GMCH_DDC_CLK
HDMI_C_TX1-
HDMI_C_TX2-
HDMI_C_TX0+
HDMI_C_TX2+
HDMI_C_TX1+
HDMI_C_CLK+
HDMI_C_CLK-
HDMI_C_TX0-
VGA_HDMI_SCLK_R
VGA_HDMI_SDATA_R
HDMI_SCLK
HDMI_SDATA
+5VS
+HDMI_5V_OUT
+HDMI_5V_OUT
+HDMI_5V_OUT
+3VS
+HDMI_5V_OUT
+3VS
+5VS
+5VS
+5VS
+5VS
+5VS
+3VS
VGA_HPD <14>
UMA_HPD <11>
HDMI_CLK+_VGA<14>
HDMI_CLK-_VGA<14>
HDMI_TX0+_VGA<14>
HDMI_TX0-_VGA<14>
HDMI_TX1+_VGA<14>
HDMI_TX1-_VGA<14>
HDMI_TX2+_VGA<14>
HDMI_TX2-_VGA<14>
GMCH_DDC_DATA<11>
VGA_HDMI_SDATA<14>
VGA_HDMI_SCLK<14>
GMCH_DDC_CLK<11>
HDMI_CLK+_UMA<10>
HDMI_CLK-_UMA<10>
HDMI_TX0+_UMA<10>
HDMI_TX0-_UMA<10>
HDMI_TX1+_UMA<10>
HDMI_TX1-_UMA<10>
HDMI_TX2+_UMA<10>
HDMI_TX2-_UMA<10>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
DVI/HDMI Connector
Custom
17 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
Place closed to JHDMI1
W=40mils
DDC to HDMI CONN
reserve HDMI I2C ESD diode
715-Ω for RS880M
Q46B
2N7002DW-T/R7_SOT363-6
3
5
4
C717 0.1U_0402_16V7KVGA@
1 2
R855 0_0402_5% @
1 2
R579
4.7K_0402_5%
UMA@
12
C712 0.1U_0402_16V7KVGA@
1 2
R853 0_0402_5%UMA@
1 2
C713 0.1U_0402_16V7KVGA@
1 2
R877 750_0402_1%UMA@
1 2
U39
SN74AHCT1G125GW_SOT353-5
A
2Y4
OE# 1
G
3P5
L52
WCM-2012-900T_0805@
1
122
33
4
4
G
D
S
Q49
BSH111 1N_SOT23-3
2
13
G
D
S
Q50
BSH111 1N_SOT23-3
2
13
R385 0_0402_5%
1 2
R880 0_0402_5%VGA@
1 2
R386 0_0402_5%
1 2
R867
499_0402_1%
VGA@
R860 0_0402_5%UMA@
1 2
JHDMI1
SUYIN_100042MR019SX53ZL
CONN@
D2+
1D2_shield
2D2-
3D1+
4D1_shield
5D1-
6D0+
7D0_shield
8D0-
9CK+
10 CK_shield
11 CK-
12 CEC
13 Reserved
14 SCL
15 SDA
16 DDC/CEC_GND
17 +5V
18 HP_DET
19
GND 20
GND 21
GND 22
GND 23
C914
0.1U_0402_16V4Z
1
2
F1
1.1A_6VDC_FUSE
21
R857 0_0402_5%
1 2
R390 0_0402_5%
1 2
C718 0.1U_0402_16V7KVGA@
1 2
R854 0_0402_5% @
1 2
Q46A
2N7002DW-T/R7_SOT363-6
6 1
2
C714 0.1U_0402_16V7KVGA@
1 2
R871
499_0402_1%
VGA@
L50
WCM-2012-900T_0805@
1
122
33
4
4
R850
100K_0402_5%
1 2
C177
0.1U_0402_16V4Z
1
2
R866
499_0402_1%
VGA@
Q47B
2N7002DW-T/R7_SOT363-6
3
5
4
R861 0_0402_5%UMA@
1 2
C719 0.1U_0402_16V7KVGA@
1 2
R383 0_0402_5%
1 2
R580
4.7K_0402_5%
UMA@
12
C913
0.1U_0402_16V4Z 1
2
R382 0_0402_5%
1 2
R869
499_0402_1%
VGA@
R863 0_0402_5%UMA@
1 2
R856 0_0402_5% @
1 2
R867 750_0402_1%UMA@
1 2
R879 0_0402_5%UMA@
1 2
R862 0_0402_5%UMA@
1 2
Q47A
2N7002DW-T/R7_SOT363-6
6 1
2
R387 0_0402_5%
1 2
R866 750_0402_1%UMA@
1 2
R881 0_0402_5%UMA@
1 2
D6
RB491D_SC59-3
2 1
C715 0.1U_0402_16V7KVGA@
1 2
R874
499_0402_1%
VGA@
L51
WCM-2012-900T_0805@
1
122
33
4
4
R878 0_0402_5%VGA@
1 2
R871 750_0402_1%UMA@
1 2
R851 0_0402_5%VGA@
1 2
R858 0_0402_5%UMA@
1 2
R869 750_0402_1%UMA@
1 2
R877
499_0402_1%
VGA@
R864 0_0402_5%UMA@
1 2
R384 0_0402_5%
1 2
R388 0_0402_5%
1 2
R87
6.8K_0402_5%
12
R876 750_0402_1%UMA@
1 2
R84
6.8K_0402_5%
12
R876
499_0402_1%
VGA@
C716 0.1U_0402_16V7KVGA@
1 2
R872 750_0402_1%UMA@
1 2
L53
WCM-2012-900T_0805@
1
122
33
4
4
R872
499_0402_1%
VGA@
R845 2.2K_0402_5%
12
R865 0_0402_5%UMA@
1 2
R874 750_0402_1%UMA@
1 2
R859 0_0402_5%UMA@
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CRT_VSYNC_2
CRT_HSYNC
CRT_HSYNC_2
CRT_VSYNC D_CRT_VSYNC
CRT_R_2
DSUB_12
DSUB_15
CRT_R
CRT_G
CRT_B
CRT_G_2
CRT_B_2
CRT_G_1
CRT_R_1
CRT_B_1
GMCH_CRT_HSYNC
GMCH_CRT_VSYNC
GMCH_CRT_G
GMCH_CRT_B
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_G
VGA_CRT_B
VGA_CRT_R
CRT_G
CRT_B
CRT_HSYNC
CRT_VSYNC
CRT_R
CRT_R
CRT_G
CRT_B
CRT_HSYNC
GMCH_CRT_R
D_CRT_HSYNC
DSUB_12
DSUB_15
CRT_VSYNC
GMCH_CRT_DATA
GMCH_CRT_CLK
+CRT_VCC+R_CRT_VCC
+5VS
+CRT_VCC
+CRT_VCC
+CRT_VCC
+3VS
+CRT_VCC
+3VS
GMCH_CRT_VSYNC<11,13>
GMCH_CRT_HSYNC<11,13>
GMCH_CRT_G<11>
GMCH_CRT_R<11>
GMCH_CRT_B<11>
VGA_CRT_VSYNC<14>
VGA_CRT_HSYNC<14>
VGA_CRT_R<14>
VGA_CRT_G<14>
VGA_CRT_B<14>
VGA_DDC_DATA <14>
VGA_DDC_CLK <14>
CRT_DET# <20>
GMCH_CRT_DATA <11>
GMCH_CRT_CLK <11>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
CRT Connector
B
18 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
W=40mils
CRT Connector W=40mils
Place closed to chipset
Place closed to chipset
change to 47pf for ATI M66/M7x
check with MXM board
public board write w/o PH
C67 0.1U_0402_16V4Z
1 2
U3
SN74AHCT1G125DCKR_SC70-5
A
2Y4
OE# 1
G
3P5
R368
33_0402_5%
12
L15 0_0805_5%
1 2
R371 0_0402_5%
UMA@
12
C115
5P_0402_50V8C
@
1
2
R378
0_0402_5%
UMA@ 12
R30
100K_0402_5%
1 2
C125
100P_0402_50V8J
1
2
R27 0_0402_5%VGA@
1 2
R17 0_0402_5%
UMA@
1 2
F2
1.1A_6VDC_FUSE
21
C430
0.1U_0402_16V4Z
1
2
C120
5P_0402_50V8C
1
2
L23 FCM2012C-800_0805
1 2
G
D
S
Q53
BSH111 1N_SOT23-3VGA@
2
1 3
R374 10_0402_5%
VGA@
1 2
C105
5P_0402_50V8C
@
1
2
R369
33_0402_5%
12
R379 0_0402_5%
VGA@12
C90
100P_0402_50V8J
@
1
2
L18 FCM2012C-800_0805
1 2
U4
SN74AHCT1G125DCKR_SC70-5
A
2Y4
OE# 1
G
3P5
R372 0_0402_5%
UMA@
12
R367
6.8K_0402_5%
12
L13 FCM2012C-800_0805
1 2
R376 10_0402_5%
VGA@
1 2
R380 0_0402_5%
VGA@12
C145
6P_0402_50V8D
1
2
R375 10_0402_5%
VGA@
1 2
R70
150_0402_1%
12
L24 0_0805_5%
1 2
R35 0_0402_5%VGA@
1 2
C140
5P_0402_50V8C
1
2
G
G
JCRT1
SUYIN_070546FR015S233ZR
CONN@
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
16
17
C98
100P_0402_50V8J
@
1
2
C83
100P_0402_50V8J
1
2
R373 0_0402_5%
UMA@
12
R74
150_0402_1%
12
C129
6P_0402_50V8D
1
2
R366
6.8K_0402_5%
12
L8 FCM1608C-121T_0603
1 2
R326
4.7K_0402_5%
VGA@
12
L20 0_0805_5%
1 2
C66 0.1U_0402_16V4Z
1 2
R36
4.7K_0402_5%
VGA@
12
C76
100P_0402_50V8J
1
2
R18 0_0402_5%
UMA@
1 2
C100
5P_0402_50V8C
1
2
C108
6P_0402_50V8D
1
2
C133
5P_0402_50V8C
@
1
2
D18
RB491D_SC59-3
2 1
R54
150_0402_1%
12
G
D
S
Q52
BSH111 1N_SOT23-3
VGA@
2
1 3
R381 0_0402_5%
UMA@ 12
L11 FCM1608C-121T_0603
1 2
R13 10K_0402_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_TX0N
SB_TX1N
SB_TX0P
SB_TX1P
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
H_PWRGD
A_RST#
SERIRQ
RTC_CLK
SB_32KHI
SB_32KHO
CLK_SBSRC_BCLK
CLK_SBSRC_BCLK#
A_RST#
+SB_PCIEVDD
LPC_AD1
LPC_FRAME#
LPC_AD2
LPC_AD3
LPC_AD0
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C
LDT_RST#
LDT_STOP#
A_RST# PLT_RST#
SB_32KHI
SB_32KHO
PCI_CLK2
PCI_CLK4
PCI_CLK5
ALLOW_LDTSTOP
H_PROCHOT#
+RTCVCC_R
A_RST# VGA_RST#
CLK_PCI_EC
PCI_AD25
PCI_AD24
PCI_AD26
PCI_AD23
PCI_AD27
PCI_AD28
PCI_CLK3
H_PWRGD H_PWRGD_L
LPC_DRQ1#
LPCCLK1
SB_14M_OSC
+PCIE_VDDR
+1.2V_HT
+3VALW
+CHGRTC
+RTCBATT
+RTCVCC
+3VALW
+1.8VS +3VS
+RTCVCC
SB_RX0P<10> SB_RX0N<10> SB_RX1P<10> SB_RX1N<10> SB_RX2P<10> SB_RX2N<10> SB_RX3P<10> SB_RX3N<10>
SB_TX0P<10> SB_TX0N<10> SB_TX1P<10> SB_TX1N<10> SB_TX2P<10> SB_TX2N<10> SB_TX3P<10> SB_TX3N<10>
PLT_RST# <11,13,26,28,30>
VGA_RST# <14>
CLK_SBSRC_BCLK<15> CLK_SBSRC_BCLK#<15>
ALLOW_LDTSTOP<11> H_PROCHOT#<6> H_PWRGD<6> LDT_STOP#<6,11> LDT_RST#<6>
LPC_FRAME# <30>
LPC_DRQ1# <30>
SERIRQ <30>
LPC_AD3 <30>
LPC_AD2 <30>
LPC_AD1 <30>
LPC_AD0 <30> LPCCLK1 <23,30>
CLK_PCI_EC <23,30>
PM_CLKRUN# <30>
PCI_AD28 <23>
PCI_AD27 <23>
PCI_AD26 <23>
PCI_AD25 <23>
PCI_AD24 <23>
PCI_AD23 <23>
H_PWRGD_L <44>
PCI_CLK5 <23>
PCI_CLK4 <23>
PCI_CLK3 <23>
PCI_CLK2 <23>
RTC_CLK <23>
SB_14M_OSC<15>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
SB700-PCIE/PCI/ACPI/LPC/RTC
Custom
19 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
W=20mils
Close to SB
STRAP PIN
EC & Debug
Close to SB
STRAP PIN
for Clear CMOS
Change Capacitors to correct RTC timeing
External 14MHz CLK for SB710
R185 33_0402_5%@12
C274 0.1U_0402_16V7K
1 2
R184 510_0402_5%
1 2
T18PAD@
C293
1U_0402_6.3V4Z
1
2
C267 0.1U_0402_16V7K
1 2
T13PAD @
C279 0.1U_0402_16V7K
1 2
C297
0.1U_0402_16V4Z
1
2
R154 8.2K_0402_5%@
1 2
R120 22_0402_5%
1 2
C523
10U_0805_10V4Z
1
2
C212
12P_0402_50V8J
1 2
C192
12P_0402_50V8J
1 2
R127 1M_0402_5%
@
1 2
C289
0.1U_0402_16V4Z
1
2
C287 0.1U_0402_16V7K
1 2
R85
20M_0603_5%
12
C266 0.1U_0402_16V7K
1 2
C275 0.1U_0402_16V7K
1 2
C278 0.1U_0402_16V7K
1 2
R394
4.7K_0402_5%
1 2
C524
1U_0402_6.3V4Z
1
2
U12
NC7SZ08P5X_NL_SC70-5
B
2
A
1Y4
P5
G
3
R180 0_0402_5%
1 2
T11PAD@
R179 33_0402_5%
@
12
R149 562_0402_1%
12
R83 20M_0402_5%@
1 2
C294
0.1U_0402_16V4Z
12
X2
32.768KHZ_12.5P_MC-306
OUT
4
IN
1
NC 3
NC 2
G
D
S
Q35 FDV301N_NL_SOT23-3
2
13
C298
0.1U_0402_16V4Z
12
R178 1K_0402_5%
12
D10
BAS40-04_SOT23-3
1
2
3
C272 0.1U_0402_16V7K
1 2
R143 2.05K_0402_1%
12
J1
0_0603_5%
@
1 2
T12PAD @
U13
NC7SZ08P5X_NL_SC70-5
B
2
A
1Y4
P5
G
3
PCI EXPRESS INTERFACE
Part 1 of 5
SB700
PCI INTERFACE
LPC
RTC
CPU
RTC XTAL
PCI CLKS
CLOCK GENERATOR
U10A
218S7EALA11FG_BGA528_SB700
A_RST#
N2
PCIE_RX2P
R20
PCIE_RX2N
R21
PCIE_RX3P
R18
PCIE_TX3N
T22 PCIE_TX3P
T23 PCIE_TX2N
U24 PCIE_TX2P
U25
PCIE_RX1P
U19
PCIE_RX1N
V19
PCIE_RX0P
U22
PCIE_RX0N
U21
PCIE_TX1N
V25 PCIE_TX1P
V24 PCIE_TX0N
V22 PCIE_TX0P
V23
PCIE_RCLKP/NB_LNK_CLKP
N25
PCIE_RCLKN/NB_LNK_CLKN
N24
PCIE_CALRP
T25
PCIE_CALRN
T24
PCIE_PVDD
P24
GPP_CLK1N
L19
X1
A3
X2
B3
VBAT B2
GPP_CLK0N
J18
GPP_CLK2P
M19
ALLOW_LDTSTP
F23
CPU_HT_CLKN
M18
GPP_CLK2N
M20
SLT_GFX_CLKP
M23
CPU_HT_CLKP
P17
LDT_RST#
G24
PCICLK0 P4
PCICLK1 P3
PCICLK2 P1
PCICLK3 P2
PCIRST# N1
CBE0# W2
CBE1# U7
CBE2# AA7
CBE3# Y1
FRAME# AA6
DEVSEL# W5
IRDY# AA5
TRDY# Y5
PAR U6
STOP# W6
PERR# W4
REQ0# AC3
REQ1# AD4
REQ2# AB7
REQ3#/GPIO70 AE6
GNT0# AD2
GNT1# AE4
GNT2# AD5
GNT3#/GPIO72 AC6
SERR# V7
CLKRUN# AD6
LAD0 H24
LAD1 H23
LAD2 J25
LAD3 J24
LFRAME# H25
LDRQ0# H22
SERIRQ V15
PCICLK4 T4
LPCCLK0 G22
LPCCLK1 E22
AD0 U2
AD1 P7
AD2 V4
AD3 T1
AD4 V3
AD5 U1
AD6 V1
AD7 V2
AD8 T2
AD9 W1
AD10 T9
AD12 R7
AD13 R5
AD14 U8
AD15 U5
AD16 Y7
AD17 W8
AD18 V9
AD19 Y8
AD20 AA8
AD21 Y4
AD22 Y3
AD23 Y2
AD24 AA2
AD25 AB4
AD26 AA1
AD27 AB3
AD28 AB2
AD29 AC1
AD30 AC2
AD31 AD1
AD11 R6
REQ4#/GPIO71 AB6
GNT4#/GPIO73 AE5
LDRQ1#/GNT5#/GPIO68 AB8
GPP_CLK1P
L20
RTCCLK C3
PCIE_RX3N
R17
INTE#/GPIO33 AD3
INTF#/GPIO34 AC4
INTG#/GPIO35 AE2
INTH#/GPIO36 AE3
LOCK# V5
PCIE_PVSS
P25
PCICLK5/GPIO41 T3
BMREQ#/REQ5#/GPIO65 AD7
NB_HT_CLKP
M24
LDT_PG
F22
LDT_STP#
G25
GPP_CLK3N
P22
INTRUDER_ALERT# C2
NB_DISP_CLKP
K23
25M_48M_66M_OSC
L18
GPP_CLK0P
J19
NB_HT_CLKN
M25
SLT_GFX_CLKN
M22
GPP_CLK3P
N22
25M_X1
J21
25M_X2
J20
NB_DISP_CLKN
K22
PROCHOT#
F24
L59
MBC1608121YZF_0603
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
EC_RSMRST#
ICH_SMBCLK0
ICH_SMBDATA0
SB_TEST2
SB_TEST1
SB_TEST0
ICH_SMBCLK1
ICH_SMBDATA1
SUS_STAT#
SB_PCIE_WAKE#
NB_PWRGD
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
CRT_DET
EC_LID_OUT#
GPIO16
USB20_P12
SB_PCIE_WAKE#
H_THERMTRIP#
USB20_N4
USB20_N6
USB_OC#2
HDA_BITCLK CPU_SIC_SB
ICH_SMBDATA1
EC_GA20
SB_TEST1
PM_SLP_S5#
PM_SLP_S3#
USB20_P0
USB_RCOMP
GPIO17
USB20_N12
HDA_SDIN1
SB_TEST0
USB20_P6
USB20_N1
SB_PWRGD
USB20_P5
SB_TEST2
CRT_DET
EC_KBRST#
HDARST#
CPU_SID_SB
HDA_SDOUT
NB_PWRGD
SUS_STAT#
USB20_N0
USB20_P4
USB20_N5ICH_SMBCLK0
EC_RSMRST#
EC_SCI#
USB20_P3
HDA_SYNC
EC_SWI#
USB20_N3
HDA_SDIN0
CLK_48M_USB
EC_SMI#
ICH_SMBCLK1
SB_SPKR
PBTN_OUT#
HDA_SDIN2
SKU_ID
ICH_SMBDATA0
USB20_N8
USB20_P8
EC_LID_OUT#
USB20_P2_2
USB20_P2_1
USB20_N2_1
USB20_P1
USB20_N2
USB20_P2
USB20_N2_2
USB_OC#6
USB_OC#1
+3VS
+3VALW
+3VALW
+3VS
+3VS
+3VS
+3VALW
EC_SWI#<30>
PM_SLP_S3#<30> PM_SLP_S5#<30> PBTN_OUT#<30> SB_PWRGD<6,32> SUS_STAT#<11>
EC_GA20<30> EC_KBRST#<30> EC_SCI#<30> EC_SMI#<30>
SB_PCIE_WAKE#<26,28>
H_THERMTRIP#<6> NB_PWRGD<11>
EC_RSMRST#<30>
SB_SPKR<33>
ICH_SMBCLK0<8,9,15,28>
ICH_SMBCLK1<26>
USB_OC#2<24,29> USB_OC#1<29>
HDA_BITCLK_AUDIO<33> HDA_BITCLK_MDC<32> HDA_SDOUT_MDC<32> HDA_SDOUT_AUDIO<33> HDA_SDIN0<33> HDA_SDIN1<32>
HDA_SYNC_MDC<32> HDA_SYNC_AUDIO<33>
HDARST#<23>
CRT_DET#<18>
CLK_48M_USB <15>
USB20_P5 <28>
USB20_N5 <28>
USB20_P4 <25>
USB20_N4 <25>
USB20_P3 <16>
USB20_N3 <16>
USB20_N1 <29>
USB20_P0 <29>
USB20_N0 <29>
USB20_P12 <29>
USB20_N12 <29>
USB20_P6 <29>
USB20_N6 <29>
GPIO16 <23>
ICH_SMBDATA0<8,9,15,28>
CPU_SID_SB <6>
HDA_RST_MDC#<32>
ICH_SMBDATA1<26>
CPU_SIC_SB <6>
GPIO17 <23>
HDA_RST_AUDIO#<33>
USB20_P8 <28>
USB20_N8 <28>
EC_LID_OUT#<30>
USB20_P2_1 <24>
USB20_N2_1 <24>
USB20_P2_2 <29>
USB20_N2_2 <29>
USB20_P1 <29>
USB_OC#6<29>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
SB700 USB/HD audio
Custom
20 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
USB-0 Ext.USB/B
USB-6 HS-USB
USB-3 USB Camera
USB-8 MiniCard(WLAN)
USB-12 Bluetooth
SB700 has internal PD
USB-2 USB (eSATA) for SJM70
USB-4 Card Reader
STRAP PIN
STRAP PIN
STRAP PIN
demo circuit LID use RI#
USB-1 Ext.USB/B
UMA
DIS
SKU-ID R509 R510
POP
POP
High: CRT Plugged
SB Power Domain :S5
USB-5 MiniCard(TV)
Ext.USB/B for SJV70
R133 2.2K_0402_5%@
1 2
R536 100K_0402_5%@
1 2
R132 2.2K_0402_5%@
1 2
R514 10K_0402_5%@
1 2
R51 0_0402_5%JV70@
1 2
USB 2.0
Part 4 of 5
SB700
ACPI / WAKE UP EVENTS
GPIO
HD AUDIO
USB OC
USB 1.1
USB MISC
INTEGRATED uC
INTEGRATED uC
U10D
218S7EALA11FG_BGA528_SB700
USBCLK/14M_25M_48M_OSC C8
USB_RCOMP G8
USB_OC6#/IR_TX1/GEVENT6#
B9
USB_HSD5P C12
USB_HSD5N D12
USB_HSD4P B12
USB_HSD4N A12
USB_HSD3P G12
USB_HSD3N G14
USB_HSD2P H14
USB_HSD2N H15
USB_HSD1P A13
USB_HSD1N B13
USB_HSD0P B14
USB_HSD0N A14
USB_OC4#/IR_RX0/GPM4#
A8
USB_OC3#/IR_RX1/GPM3#
A9
USB_OC1#/GPM1#
F8 USB_OC2#/GPM2#
E5
USB_HSD7P G11
USB_HSD7N H12
USB_HSD6P E12
USB_HSD6N E14
USB_OC0#/GPM0#
E4
DDR3_RST#/GEVENT7#
G5
SATA_IS0#/GPIO10
AE18
AZ_SDIN3/GPIO46
M3
PCI_PME#/GEVENT4#
E1
RI#/EXTEVNT0#
E2
SLP_S3#
F5
SLP_S5#
G1
PWR_BTN#
H2
PWR_GOOD
H1
SUS_STAT#
K3
TEST1
H4
TEST0
H3
GA20IN/GEVENT0#
Y15
KBRST#/GEVENT1#
W15
SMBALERT#/THRMTRIP#/GEVENT2#
J6
LPC_PME#/GEVENT3#
K4
LPC_SMI#/EXTEVNT1#
K24
S3_STATE/GEVENT5#
F1
SYS_RESET#/GPM7#
J2
WAKE#/GEVENT8#
H6
RSMRST#
D3
CLK_REQ3#/SATA_IS1#/GPIO6
AD18
NB_PWRGD
W14
SMARTVOLT1/SATA_IS2#/GPIO4
AA19
SMARTVOLT2/SHUTDOWN#/GPIO5
Y19
SPKR/GPIO2
W21
SCL0/GPOC0#
AA18
SDA0/GPOC1#
W18
DDC1_SCL/GPIO9
AA20
DDC1_SDA/GPIO8
Y18
AZ_BITCLK
M1
AZ_SDOUT
M2
AZ_SYNC
L6
AZ_RST#
M4
USB_HSD9P A11
USB_HSD9N B11
USB_HSD8P C10
USB_HSD8N D10
LLB#/GPIO66
C1
AZ_DOCK_RST#/GPM8#
L5
SLP_S2/GPM9#
H7
USB_OC5#/IR_TX0/GPM5#
B8
BLINK/GPM6#
F2
SCL1/GPOC2#
K1
SDA1/GPOC3#
K2
TEST2
H5
CLK_REQ0#/SATA_IS3#/GPIO0
W17
AZ_SDIN2/GPIO44
L8 AZ_SDIN1/GPIO43
J8 AZ_SDIN0/GPIO42
J7
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
V17
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
W20
USB_FSD13P E6
USB_FSD13N E7
USB_FSD12P F7
USB_FSD12N E8
USB_HSD11P H11
USB_HSD11N J10
USB_HSD10P E11
USB_HSD10N F11
IMC_GPIO9 B18
IMC_PWM0/IMC_GPIO10 F21
SCL2/IMC_GPIO11 D21
SDA2/IMC_GPIO12 F19
SCL3_LV/IMC_GPIO13 E20
SDA3_LV/IMC_GPIO14 E21
IMC_PWM1/IMC_GPIO15 E19
IMC_PWM2/IMC_GPO16 D19
IMC_PWM3/IMC_GPO17 E18
IMC_GPIO18 G20
IMC_GPIO19 G21
IMC_GPIO20 D25
IMC_GPIO21 D24
IMC_GPIO22 C25
IMC_GPIO23 C24
IMC_GPIO24 B25
IMC_GPIO25 C23
IMC_GPIO0
H19
IMC_GPIO1
H20
SPI_CS2#/IMC_GPIO2
H21
IDE_RST#/F_RST#/IMC_GPO3
F25
IMC_GPIO4
D22
IMC_GPIO5
E24
IMC_GPIO6
E25
IMC_GPIO7
D23
IMC_GPIO8 A18
IMC_GPIO26 B24
IMC_GPIO27 B23
IMC_GPIO28 A23
IMC_GPIO29 C22
IMC_GPIO30 A22
IMC_GPIO31 B22
IMC_GPIO32 B21
IMC_GPIO33 A21
IMC_GPIO34 D20
IMC_GPIO35 C20
IMC_GPIO36 A20
IMC_GPIO37 B20
IMC_GPIO38 B19
IMC_GPIO39 A19
IMC_GPIO40 D18
IMC_GPIO41 C18
R510 2.2K_0402_5%
UMA@
1 2
R130 2.2K_0402_5%
@
1 2
R144 33_0402_5%
1 2
R150 33_0402_5%
1 2
R146 33_0402_5%
1 2
R52 0_0402_5% JV70@
1 2
R136 2.2K_0402_5%
1 2
R152 33_0402_5%
1 2
R410 2.2K_0402_5%
1 2
R135 2.2K_0402_5%
1 2
R513 10K_0402_5%@
1 2
R413 2.2K_0402_5%
1 2
T14PAD
@
R147 33_0402_5%
1 2
R417
10K_0402_5%
@
1 2
R131 2.2K_0402_5%@
1 2
R406
100K_0402_5%
1 2
R153 33_0402_5%
1 2
C232
22P_0402_50V8J @
1 2
R509 2.2K_0402_5%VGA@
1 2
R53 0_0402_5% @
1 2
R134 10K_0402_5%
1 2
R137 10K_0402_5%
1 2
R515 10K_0402_5%@
1 2
R145 33_0402_5%
1 2
R124 2.2K_0402_5%
1 2
R10933_0402_5%@1 2
R151 33_0402_5%
1 2
R50 0_0402_5% @
1 2
G
D
S
Q36
2N7002_SOT23
2
13
R40511.8K_0402_1%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SATA_STX_DRX_N0
SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P0
SATA_X2
SATA_X1
EC_THERM#
SATA_X2
SATA_X1
SATA_CAL
SATA_LED#
+SB_AVDD
NB_THERMAL_DC_R
NB_THERMAL_DA_R NB_THERMAL_DA
NB_THERMAL_DC+PLLVDD_SATA
+XTLVDD_SATA
ACIN
SATA_DTX_C_SRX_P1
SATA_DTX_C_SRX_N1
SATA_STX_DRX_N1
SATA_STX_DRX_P1SATA_STX_R_DRX_P1
SATA_STX_R_DRX_N1
SB_SI_SPI_SO
SB_SO_SPI_SI
SB_SPICLK
SB_HOLD#
SB_SPICS# SB_SPICLK
SB_SO_SPI_SI
SB_SI_SPI_SO
SB_HOLD#
SB_SPICS#
+SB_SPI_VCC
ACIN
SATA_STX_R_DRX_N2
SATA_STX_R_DRX_P2 SATA_STX_DRX_P2
SATA_STX_DRX_N2
SATA_DTX_C_SRX_N2
SATA_DTX_C_SRX_P2
VGA_PRSNT_R
VGA_PRSNT_L
VGA_PRSNT_R
VGA_PRSNT_L
SATA_STX_DRX_P0
+3VS
+1.2V_HT
+3VS
+3VALW
+3VS
+3VALW
+3VALW
+3VALWS
+3VS
SATA_STX_DRX_P0<24> SATA_STX_DRX_N0<24>
SATA_DTX_C_SRX_N0<24> SATA_DTX_C_SRX_P0<24>
SATA_STX_R_DRX_P1<24> SATA_STX_R_DRX_N1<24>
SATA_DTX_C_SRX_N1<24> SATA_DTX_C_SRX_P1<24>
SATA_LED#<31>
NB_THERMAL_DC <11>
NB_THERMAL_DA <11>
EC_THERM# <30>
ACIN <30,36,37,40>
SATA_DTX_C_SRX_N2<24> SATA_DTX_C_SRX_P2<24>
SATA_STX_R_DRX_N2<24> SATA_STX_R_DRX_P2<24>
VGA_PRSNT_R <14>
VGA_PRSNT_L <14>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
SB700 SATA/IDE/SPI
Custom
21 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
pop after bring up
Port Number
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Primary master
Secondary master
Primary slave
Secondary slave
Primary (Secondary) master
Primary (Secondary) slave
Pri/SEC,Mas/Slave assignment SATA drive controlled by
SATA controler
SATA controler
SATA controler
SATA controler
PATA controler
PATA controler
If use, Un-pop R545
ODD
S- HDD
HDD
R412 1K_0402_1%
12
ATA 66/100/133
Part 2 of 5
SB700
SATA PWR SERIAL ATA
SPI ROM
HW MONITOR
U10B
218S7EALA11FG_BGA528_SB700
IDE_IORDY AA24
IDE_IRQ AA25
IDE_A0 Y22
IDE_A1 AB23
IDE_A2 Y23
IDE_DACK# AB24
IDE_DRQ AD25
IDE_IOR# AC25
IDE_IOW# AC24
IDE_CS1# Y25
IDE_CS3# Y24
IDE_D0/GPIO15 AD24
IDE_D1/GPIO16 AD23
IDE_D2/GPIO17 AE22
IDE_D3/GPIO18 AC22
IDE_D4/GPIO19 AD21
IDE_D5/GPIO20 AE20
IDE_D6/GPIO21 AB20
IDE_D7/GPIO22 AD19
IDE_D8/GPIO23 AE19
IDE_D9/GPIO24 AC20
IDE_D10/GPIO25 AD20
IDE_D11/GPIO26 AE21
IDE_D12/GPIO27 AB22
IDE_D13/GPIO28 AD22
IDE_D14/GPIO29 AE23
IDE_D15/GPIO30 AC23
XTLVDD_SATA
W12
PLLVDD_SATA
AA11
SATA_TX2P
AB12
SATA_TX2N
AC12
SATA_RX2P
AD12 SATA_RX2N
AE12
SATA_TX3P
AD13
SATA_TX3N
AE13
SATA_RX3P
AC14 SATA_RX3N
AB14
SATA_TX0P
AD9
SATA_TX0N
AE9
SATA_RX0N
AB10
SATA_RX0P
AC10
SATA_TX1P
AE10
SATA_TX1N
AD10
SATA_RX1N
AD11
SATA_RX1P
AE11
SATA_CAL
V12
SATA_X1
Y12
SATA_X2
AA12
SATA_ACT#/GPIO67
W11
SPI_DI/GPIO12 G6
SPI_DO/GPIO11 D2
SPI_CLK/GPIO47 D1
SPI_HOLD#/GPIO31 F4
SPI_CS1#/GPIO32 F3
FANOUT1/GPIO48 M5
FANOUT2/GPIO49 M7
FANIN0/GPIO50 P5
FANIN1/GPIO51 P8
FANIN2/GPIO52 R8
LAN_RST#/GPIO13 U15
ROM_RST#/GPIO14 J1
VIN0/GPIO53 A4
VIN1/GPIO54 B4
VIN2/GPIO55 C4
VIN3/GPIO56 D4
VIN4/GPIO57 D5
VIN5/GPIO58 D6
VIN6/GPIO59 A7
VIN7/GPIO60 B7
TEMPIN0/GPIO61 B6
TEMPIN1/GPIO62 A6
TEMPIN2/GPIO63 A5
TEMPIN3/TALERT#/GPIO64 B5
FANOUT0/GPIO3 M8
AVDD F6
AVSS G7
TEMP_COMM C6
SATA_TX4P
AE14
SATA_TX4N
AD14
SATA_RX4N
AD15
SATA_RX4P
AE15
SATA_TX5P
AB16
SATA_TX5N
AC16
SATA_RX5N
AE16
SATA_RX5P
AD16
C488
2.2U_0603_6.3V4Z
1
2
C560
1U_0402_6.3V4Z
1
2
U44
NC7SZ08P5X_NL_SC70-5
@
B2
A1
Y
4
P5
G
3
R547
10K_0402_5%
@
1 2
Y325MHZ_20P
12
C562
2.2U_0603_6.3V4Z
1
2
L34
BLM18PG121SN1D_0603
12
R549
0_0603_5%
@ 12
C28410P_0402_50V8J
12
R260 0_0402_5%@
1 2
R296 10K_0402_5%
1 2
C667 0.1U_0402_16V4Z @
1 2
R176
10M_0402_5%
12
C545
0.1U_0402_16V4Z
1
2
R548
10K_0402_5%
@
1 2
R342 4.99_0402_1%
1 2
R411 10K_0402_5%
1 2
R181 4.99_0402_1%
1 2
R104 100K_0402_5%
1 2
R182 4.99_0402_1%
1 2
D30 RB751V_SOD323
@
2 1
L61
BLM18PG121SN1D_0603
12
R183 4.99_0402_1%
1 2
R261 0_0402_5%@
1 2
R111 0_0402_5%
@
1 2
R110 0_0402_5%
@
1 2
C296
1U_0402_6.3V4Z
1
2
C229
10P_0402_50V8J
@
1
2
C28310P_0402_50V8J
12
R546
1K_0402_5%
@
1 2
R295 10K_0402_5%
1 2
C546
0.1U_0402_16V4Z
1
2
C492
0.1U_0402_16V4Z
1
2
U23
MX25L8005M2C-15G_SOP8
@
CE#
1
SO 2
WP#
3
VSS
4SI 5
SCK 6
HOLD#
7
VDD 8
C670
0.1U_0402_16V4Z
@
1 2
L55
BLM18PG121SN1D_0603
12
R545 0_0402_5%
@
1 2
D7 RB751V_SOD323
2 1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+AVDDCK_1.2V
+1.2V_CKVDD
+AVDDCK_3.3V
+V5_VREF
+AVDDCK_3.3V
+AVDDCK_1.2V
+AVDDC
+1.2_USB
+S5_3V
+S5_1.2V
+3VS
+1.2V_HT
+1.2V_HT
+3VALW
+3VS
+3VS
+5VS
+1.2V_HT
+1.2V_HT
+3VS
+PCIE_VDDR
+1.2V_SATA
+3VALW
+AVDD_USB
+1.2VALW
+1.2VALW
+1.2V_HT
+3VALW
+1.2VALW
+SB_VDD
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
SB700 power/GND
Custom
22 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
FOR SB700 ALL issue
A12 Will change to +1.2V_HT
C5012.2U_0603_6.3V4Z
12
C5000.1U_0402_16V4Z
12
C248 10U_0603_6.3V6M
C556 1U_0402_6.3V4Z
1 2
C563 10U_0603_6.3V6M
R138 FBMA-L11-201209-221LMA30T_0805
1 2
C240 1U_0402_6.3V4Z
12
L32
FBMA-L11-201209-221LMA30T_0805
12
C251 0.1U_0402_16V4Z
1 2
C508 0.1U_0402_16V4Z
1 2
C4960.1U_0402_16V4Z
12
C5100.1U_0402_16V4Z
12
C550 1U_0402_6.3V4Z
1 2
R578 1K_0402_5%
12
L29
FBMA-L11-201209-221LMA30T_0805
12
C557 10U_0603_6.3V6M
@
L56 FBMA-L11-160808-221LMT 0603
C2470.1U_0402_16V4Z
12
C49010U_0603_6.3V6M
C549 1U_0402_6.3V4Z
1 2
C5190.1U_0402_16V4Z
12
C497 1U_0402_6.3V4Z
1 2
L54
FBMA-L11-160808-221LMT 0603
C544 0.1U_0402_16V4Z@
1 2
C552 0.1U_0402_16V4Z
1 2
C254 10U_0603_6.3V6M
C25210U_0603_6.3V6M
C505 1U_0402_6.3V4Z
1 2
C5211U_0402_6.3V4Z
12
R1721K_0402_5%
12
C228 10U_0603_6.3V6M
C40110U_0603_6.3V6M
C2411U_0402_6.3V4Z
12
C276 10U_0603_6.3V6M
C5031U_0402_6.3V4Z
12
C558 10U_0603_6.3V6M
@
C24310U_0603_6.3V6M
C551 0.1U_0402_16V4Z
@
1 2
L57
FBMA-L11-160808-221LMT 0603
C5110.1U_0402_16V4Z
12
L31 FBMA-L11-160808-221LMT 0603
C5121U_0402_6.3V4Z
12
C568 10U_0603_6.3V6M
Part 3 of 5
SB700
POWER
PCI/GPIO I/O
CORE S0
3.3V_S5 I/OCORE S5
A-LINK I/O
SATA I/O
USB I/O
PLL CLKGEN I/O
IDE/FLSH I/O
U10C
218S7EALA11FG_BGA528_SB700
VDDQ_2
M9
VDDQ_6
U17
VDDQ_3
T15
VDDQ_11
AB5
VDDQ_1
L9
VDDQ_4
U9
VDDQ_5
U16
VDDQ_12
AB21
VDDQ_10
AA4
VDDQ_7
V8
VDDQ_8
W7
VDDQ_9
Y6
S5_3.3V_1 A17
S5_3.3V_2 A24
S5_3.3V_3 B17
S5_3.3V_4 J4
S5_3.3V_5 J5
S5_1.2V_2 G4
S5_1.2V_1 G2
USB_PHY_1.2V_1 A10
USB_PHY_1.2V_2 B10
V5_VREF AE7
AVDDCK_3.3V J16
AVDDCK_1.2V K17
AVDDC E9
AVDDTX_0
A16
AVDDTX_1
B16
AVDDTX_2
C16
AVDDTX_3
D16
AVDDTX_5
E17 AVDDTX_4
D17
AVDDRX_2
F18
AVDDRX_0
F15
AVDDRX_5
G18 AVDDRX_4
G17
PCIE_VDDR_4
P21 PCIE_VDDR_3
P20
PCIE_VDDR_7
R25
PCIE_VDDR_2
P19
PCIE_VDDR_5
R22
PCIE_VDDR_1
P18
PCIE_VDDR_6
R24
AVDD_SATA_1
AA14
AVDD_SATA_4
AB18
AVDD_SATA_2
AA15
AVDD_SATA_3
AA17
AVDD_SATA_5
AC18
AVDD_SATA_6
AD17
AVDD_SATA_7
AE17
VDD_1 L15
VDD_2 M12
VDD_3 M14
VDD_4 N13
VDD_5 P12
VDD_6 P14
VDD_7 R11
VDD_9 T16
VDD_8 R15
AVDDRX_1
F17
AVDDRX_3
G15
VDD33_18_2
AA21
VDD33_18_4
AE25 VDD33_18_3
AA22
VDD33_18_1
Y20
CKVDD_1.2V_2 L22
CKVDD_1.2V_1 L21
CKVDD_1.2V_4 L25
CKVDD_1.2V_3 L24
S5_3.3V_7 L2
S5_3.3V_6 L1
C525 1U_0402_6.3V4Z
1 2
C502 0.1U_0402_16V4Z
12
C236 10U_0603_6.3V6M
C5041U_0402_6.3V4Z
12
C547 1U_0402_6.3V4Z
1 2
C249 1U_0402_6.3V4Z
1 2
R399
FBMA-L11-201209-221LMA30T_0805@
1 2
C493 0.1U_0402_16V4Z
1 2
C559 0.1U_0402_16V4Z
1 2
C2530.1U_0402_16V4Z
12
C4872.2U_0603_6.3V4Z
12
C536 1U_0402_6.3V4Z
1 2
L30
FBMA-L11-160808-221LMT 0603
C565 10U_0603_6.3V6M
C5261U_0402_6.3V4Z
12
C277
0.1U_0402_16V4Z
1
2
C542 1U_0402_6.3V4Z
1 2
C227 10U_0603_6.3V6M
C529 1U_0402_6.3V4Z
1 2
L60
FBMA-L11-201209-221LMA30T_0805
12
C548 0.1U_0402_16V4Z@
1 2
C538 0.1U_0402_16V4Z
1 2
C4941U_0402_6.3V4Z
12
L28 FBMA-L11-160808-221LMT 0603
C527 1U_0402_6.3V4Z
1 2
C231 1U_0402_6.3V4Z
12
D9 RB751V_SOD323
21
C4951U_0402_6.3V4Z
12
C242 10U_0603_6.3V6M
C250 0.1U_0402_16V4Z
1 2
C291
1U_0603_10V4Z
1
2
C2462.2U_0603_6.3V4Z
12
C489 0.1U_0402_16V4Z
1 2
SB700
GROUND
Part 5 of 5
218S7EALA11FG_BGA528_SB700
U10E
VSS_4 D7
VSS_2 A25
VSS_21 M13
VSS_10 K16
VSS_11 L4
VSS_1 A2
VSS_17 L16
VSS_8 K9
VSS_9 K11
VSS_46 AB1
VSS_13 L10
VSS_14 L11
VSS_15 L12
VSS_16 L14
VSS_18 M6
VSS_19 M10
VSS_20 M11
VSS_22 M15
VSS_23 N4
VSS_26 P6
VSS_27 P9
VSS_28 P10
VSS_29 P11
VSS_32 R1
VSS_33 R2
VSS_34 R4
VSS_36 R10
VSS_37 R12
VSS_3 B1
VSS_35 R9
VSS_30 P13
AVSS_SATA_15
AB13
AVSS_SATA_18
AC8
AVSS_SATA_5
V11
AVSS_SATA_11
Y17
AVSS_SATA_19
AD8
VSS_31 P15
VSS_24 N12
AVSS_SATA_14
AB11
AVSS_SATA_2
U10
AVSS_SATA_3
U11
AVSS_SATA_1
T10
AVSS_SATA_17
AB17
AVSS_SATA_4
U12
AVSS_SATA_12
AA9
AVSS_SATA_6
V14
AVSS_SATA_10
Y14
AVSS_SATA_7
W9
AVSS_SATA_8
Y9
AVSS_SATA_16
AB15
AVSS_SATA_20
AE8
AVSS_SATA_13
AB9
AVSS_USB_5
D9
AVSS_USB_8
D14
AVSS_USB_4
D8 AVSS_USB_3
C14
AVSS_USB_6
D11
AVSS_USB_7
D13
AVSS_USB_2
B15
AVSS_USB_21
K10
AVSS_USB_10
E15
AVSS_USB_20
J15
AVSS_USB_22
K12
AVSS_USB_11
F12
AVSS_USB_12
F14
AVSS_USB_23
K14
AVSS_USB_16
J9 AVSS_USB_15
H17
AVSS_USB_19
J14
AVSS_USB_14
H9
AVSS_USB_1
A15
AVSS_USB_24
K15
VSS_12 L7
AVSS_USB_17
J11
AVSS_USB_18
J12
VSS_7 H8
VSS_25 N14
VSS_6 G19
AVSS_USB_13
G9
AVSS_USB_9
D15
AVSSCK L17
PCIE_CK_VSS_3
J22
PCIE_CK_VSS_14 U20
PCIE_CK_VSS_13 U18
PCIE_CK_VSS_12 T17
PCIE_CK_VSS_18 W19
PCIE_CK_VSS_6
M17
PCIE_CK_VSS_11 R19
PCIE_CK_VSS_8
P16 PCIE_CK_VSS_7
M21
PCIE_CK_VSS_17 V21
PCIE_CK_VSS_16 V20
PCIE_CK_VSS_15 V18
VSS_50 AE24
PCIE_CK_VSS_21 W25
PCIE_CK_VSS_19 W22
PCIE_CK_VSS_20 W24
AVSSC
F9
PCIE_CK_VSS_2
J17 PCIE_CK_VSS_1
H18
PCIE_CK_VSS_4
K25
VSS_5 F20
PCIE_CK_VSS_5
M16
PCIE_CK_VSS_9 P23
PCIE_CK_VSS_10 R16
VSS_49 AE1
VSS_44 V6
VSS_45 Y21
VSS_42 U4
VSS_48 AB25
VSS_47 AB19
VSS_41 T14
VSS_43 U14
VSS_38 R14
VSS_39 T11
VSS_40 T12
AVSS_SATA_9
Y11
C499 0.1U_0402_16V4Z
1 2
C561 10U_0603_6.3V6M
C491 1U_0402_6.3V4Z
1 2
C507 0.1U_0402_16V4Z
12
C522 1U_0402_6.3V4Z
1 2
C513 1U_0402_6.3V4Z
1 2
C5060.1U_0402_16V4Z
12
R391 FBMA-L11-201209-221LMA30T_0805
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
CLK_PCI_EC
LPCCLK1
RTC_CLK
HDARST#
GPIO17
GPIO16
+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW
PCI_CLK2<19> PCI_CLK3<19> PCI_CLK4<19> PCI_CLK5<19>
CLK_PCI_EC<19,30> LPCCLK1<19,30> RTC_CLK<19> HDARST#<20> GPIO17<20> GPIO16<20>
PCI_AD28<19> PCI_AD27<19> PCI_AD26<19> PCI_AD25<19> PCI_AD24<19> PCI_AD23<19>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
SB700 STRAPS
Custom
23 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
RESERVED
DEBUG STRAPS
PCI_AD25 PCI_AD24
USE EEPROM
PCIE STRAPS
USE DEFAULT
PCIE STRAPS
DEFAULT
BYPASS
ACPI
BCLK
USE ACPI
BCLK
DEFAULT
USE IDE
PLL
USE
LONG
RESET
USE
SHORT
RESET
USE PCI
PLL
DEFAULT
BYPASS IDE
PLL
PULL
HIGH
DEFAULT
BYPASS
PCI PLL
PCI_AD27 PCI_AD26
PULL
LOW
DEFAULT
PCI_AD28
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
PCI_AD23
LPC_CLK0
ENABLE PCI
MEM BOOT
EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)
DEFAULT
GP17
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
DISABLE PCI
MEM BOOT
PULL
LOW
PULL
HIGH
REQUIRED STRAPS
INTERNAL
RTC
DEFAULT
RTC_CLKLPC_CLK1
CLKGEN
ENABLED
DEFAULT
CLKGEN
DISABLED
AZ_RST_CD#
EC
ENABLED
EC
DISABLED
DEFAULT
GP16
PCI_CLK2
BOOTFAIL
TIMER
ENABLED
DEFAULT
BOOTFAIL
TIMER
DISABLED
PCI_CLK3
RESERVED
DEFAULT
IGNORE
DEBUG
STRAPS
USE
DEBUG
STRAPS
PCI_CLK4 PCI_CLK5
RESERVED
L,H = LPC ROM (Default L,NC)
H,H = Reserved
H,L = SPI ROM
L,L = FWH ROM
Internal pull up
CLK_PCI_PCM CLK_PCI_DBG
CLK_PCI_EC
R116
10K_0402_5%
@
12
R161
10K_0402_5%
@
12
R160
10K_0402_5%
@
12
R125
10K_0402_5%
@
12
R155
10K_0402_5%
@
12
R126
2.2K_0402_5%
@
12
R103
2.2K_0402_5%
12
R159
10K_0402_5%
@
12
R167
2.2K_0402_5%
@
12
R140
10K_0402_5%
12
R117
10K_0402_5%
12
R164
2.2K_0402_5%
@
12
R102
2.2K_0402_5%
@
12
R157
10K_0402_5%
12
R169
2.2K_0402_5%
@
12
R121
10K_0402_5%
@
12
R166
2.2K_0402_5%
@
12
R158
10K_0402_5%
@
12
R122
10K_0402_5%
12
R99
2.2K_0402_5%
12
R100
2.2K_0402_5%
@
12
R139
10K_0402_5%
@
12
R168
2.2K_0402_5%
@
12
R162
10K_0402_5%
@
12
R165
2.2K_0402_5%
@
12
R156
10K_0402_5%
12
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
SATA_STX_RC_DRX_P0
SATA_STX_RC_DRX_N0
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0
SATA_STX_R_DRX_N1
SATA_STX_RC_DRX_P1
SATA_DTX_C_SRX_N1
SATA_DTX_C_SRX_P1
SATA_STX_RC_DRX_N1
SATA_DTX_SRX_N1
SATA_STX_R_DRX_P1
SATA_DTX_SRX_P1
SATA_DTX_C_SRX_N2
SATA_DTX_C_SRX_P2
SATA_STX_R_DRX_P2
SATA_DTX_SRX_N2
SATA_STX_R_DRX_N2
SATA_STX_RC_DRX_P2
SATA_DTX_SRX_P2
SATA_STX_RC_DRX_N2
USB20_N2_R
USB20_P2_R
USB20_N2_R
USB20_P2_R
USB20_N2_1
USB20_P2_1 USB20_N2_R
USB20_P2_R
SATA_PTX_RPI_DRX_N0
SATA_DTX_RPI_PRX_N0SATA_DTX_RPO_PRX_N0 SATA_DTX_RPI_PRX_P0
SATA_PTX_RPO_DRX_P0
SATA_DTX_RPO_PRX_P0
SATA_PTX_RPO_DRX_N0
SATA_PTX_RPI_DRX_P0
SATA_DTX_RPI_PRX_N0
SATA_DTX_RPI_PRX_P0
SATA_PTX_RPO_DRX_P0
SATA_PTX_RPO_DRX_N0
SATA1_CE
SATA1_CE
SATA_STX_DRX_N0
SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P0
SATA_STX_DRX_P0
+3VS
+5VS
+3VS_HDD1
+3VS_HDD1
+5VS
+3VS_HDD2
+3VS
+5VS
+5VS
+3VS_HDD2
+5VS
+USB_VCCA
+5VS
+USB_VCCA
+5VALW
+3VALW
+1.5VS+1.5VS
+1.5VS
+1.5VS
SATA_STX_R_DRX_N1 <21>
SATA_STX_R_DRX_P1 <21>
SATA_DTX_C_SRX_N1 <21>
SATA_DTX_C_SRX_P1 <21>
SATA_STX_R_DRX_P2 <21>
SATA_DTX_C_SRX_N2 <21>
SATA_STX_R_DRX_N2 <21>
SATA_DTX_C_SRX_P2 <21>
SYSON#<29,36,43>
USB_OC#2 <20,29>
USB20_P2_1<20>
USB20_N2_1<20>
SATA_STX_DRX_N0 <21>
SATA_STX_DRX_P0 <21>
SATA_DTX_C_SRX_N0 <21>
SATA_DTX_C_SRX_P0 <21>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
HDD & ODD Connector
B
24 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
Pleace near HD CONN
Pleace near HD CONN (JSATA1)
Pleace near HD CONN
Pleace near HD CONN (JSATA3)
Placea caps. near ODD CONN.
W=60mils
ODD
Second-HDD
HDD
80mil
Adjust HDD1 CHA I/O EQ
Adjust HDD1 CHB I/O EQ
Adjust HDD1 PCH TX Swing
HDD1 Redriver Chip Enable
C614
10U_0805_10V4Z
1
2
R679 470K_0402_5%@12
C570
1000P_0402_50V7K
@
1
2
R404 0_0402_5%@
1 2
C421
0.1U_0402_16V4Z
1
2
+
C806
150U_Y_6.3VM
1
2
C378 0.01U_0402_16V7K
1 2
C333
0.1U_0402_16V4Z
1
2
R389 0_0402_5%
@
1 2
C299 0.01U_0402_16V7K
1 2
C332 0.01U_0402_16V7K
1 2
C573
10U_0805_10V4Z
1
2
C345 0.01U_0402_16V7K
1 2
C617 0.01U_0402_16V7K@1 2
C423
1U_0603_10V4Z
@
1
2
C807
1000P_0402_50V7K
1
2
R426
10K_0402_5%
@
1 2
C574
1000P_0402_50V7K
1
2
C302 0.01U_0402_16V7K
1 2
R228
10K_0402_5%
1 2
C395
1000P_0402_50V7K
1
2
C576
0.1U_0402_16V4Z
1
2
C808
0.1U_0402_16V4Z
1
2
R677 470K_0402_5%@12
R403 0_0402_5%@
1 2
C300 0.01U_0402_16V7K
1 2
C424
1000P_0402_50V7K
@
1
2
JSATA3
OCTEK_SAT-22SB1G_RV
CONN@
GND 1
A+ 2
A- 3
GND 4
B- 5
B+ 6
GND 7
VCC3.3 8
VCC3.3 9
VCC3.3 10
GND 11
GND 12
GND 13
VCC5 14
VCC5 15
VCC5 16
GND 17
RESERVED 18
GND 19
VCC12 20
VCC12 21
VCC12 22
G1 23
G2 24
C347 0.01U_0402_16V7K
1 2
C379 0.01U_0402_16V7K
1 2
C301 0.01U_0402_16V7K
1 2
C482
10U_0805_10V4Z
1
2
C622 0.01U_0402_16V7K@1 2
R242
100K_0402_5%
12
R349 0_0805_5%
12
C384 0.01U_0402_16V7K
1 2
C575
1U_0402_6.3V4Z
1
2
C340
4.7U_0805_10V4Z
1
2
C396
1U_0402_6.3V4Z
1
2
JUSB4
SUYIN_020173MR004S512ZL
VCC
1
D-
2
D+
3
GND
4
GND1
5
GND2
6
C483
0.1U_0402_16V4Z
1
2
R402 0_0402_5%@
1 2
R676 470K_0402_5%@12
R348 0_0805_5%
12
R425 470_0402_5%@
1 2
U2
PI2EQX3231BLZHE_TQFN20_3P5X4P5
@
VDD1
2
AI+
3
AI-
4
GND1 5
VDD2
6
BO+
7
BO-
8
VDD3 9
B_EQ
10 A_EM
20
AO+ 18
AO- 17
GND2 16
VDD4 15
BI+ 14
BI- 13
GND3 12
B_EM
11
A_EQ
1
CE 19
GND4 21
JSATA2
OCTEK_0709015-SD001_RVCONN@
GND 1
A+ 2
A- 3
GND 4
B- 5
B+ 6
GND 7
DP 8
+5V 9
+5V 10
MD 11
GND 12
GND 13
GND
14 GND
15
R680 470K_0402_5%@12
JSATA1
SUYIN_127043FR022G226ZL_NR
<BOM Structure>
GND 1
A+ 2
A- 3
GND 4
B- 5
B+ 6
GND 7
V33 8
V33 9
V33 10
GND 11
GND 12
GND 13
V5 14
V5 15
V5 16
GND 17
Reserved 18
GND 19
V12 20
V12 21
V12 22
C485
0.1U_0402_16V4Z
@
1
2
C386
10U_0805_10V4Z
1
2
C620 0.01U_0402_16V7K@1 2
C486
0.1U_0402_16V4Z
1
2
C580
1U_0603_10V4Z
1
2
C611
0.1U_0402_16V4Z
@
1
2
R401 0_0402_5%@
1 2
C567
0.1U_0402_16V4Z
1
2
C591
0.1U_0402_16V4Z
1
2
C419
0.1U_0402_16V4Z
@
1
2
D39
PJDLC05_SOT23~D
2
3
1
C610
1U_0402_6.3V4Z
@
1
2
C336 0.01U_0402_16V7K
1 2
C618 0.01U_0402_16V7K@1 2
C612
0.1U_0402_16V4Z
@
1
2
L37
WCM2012F2S-900T04_0805
<>
1
122
33
4
4
C569
1U_0603_10V4Z
@
1
2
U30
TPS2061DRG4_SO8
GND
1
IN
2
FLG 5
OUT 6
OUT 8
IN
3
EN#
4
OUT 7
C369 0.01U_0402_16V7K
1 2
C420
0.1U_0402_16V4Z
1
2
R377 0_0402_5%@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDCLK_XDD1_MSCLK_L
XDCLE
XDCE#
XDALE
SDDAT4_XDWP#_MSD7
SDDAT5_XDD0_MSD6
SDDAT6_XDD7_MSD3
SDDAT7_XDD2_MSD2
SDDAT2_XDRE#
SDDAT3_XDWE#
XD_RDY
SDDAT4_XDWP#_MSD7
SDDAT5_XDD0_MSD6
SD_CMD
SDCLK_XDD1_MSCLK
SDDAT0_XDD6_MSD0
XDD4_SDDAT1
SDDAT2_XDRE#
SDDAT3_XDWE#
SDDAT6_XDD7_MSD3
MS_INS#
SDDAT7_XDD2_MSD2
SDDAT0_XDD6_MSD0
SDDAT1_XDD3_MSD1
XDCD
XDD5_MSBS
XDD4_SDDAT1
SDWP
XDCD
RST#
SDDAT5_XDD0_MSD6
SDDAT6_XDD7_MSD3
SDCLK_XDD1_MSCLK
SDDAT7_XDD2_MSD2
SDDAT0_XDD6_MSD0
XTLI
MODE_SEL
CARD_AGND
USB20_N4
USB20_P4
SDDAT1_XDD3_MSD1
XDD5_MSBS
XDD4_SDDAT1
SDDAT4_XDWP#_MSD7
SDDAT3_XDWE#
XDALE
+XDPWR_SDPWR_MSPWR
+REG18_PLL
XDCLE
XDCE#
SDDAT2_XDRE#
XD_RDY
XTAL_CTR
SDCD
XTLO
+REG18
SDCD
SDWP
SDCLK_XDD1_MSCLK
XDD5_MSBS
MS_INS#
SDDAT6_XDD7_MSD3
SDDAT0_XDD6_MSD0
SDDAT1_XDD3_MSD1
SDDAT7_XDD2_MSD2
SD_CMD
MODE_SEL
RST#
XTLI
XTLO
SDCLK_XDD1_MSCLK
+CARDPWR
+3VS
+CARDPWR
+CARDPWR
+3VS
+CARDPWR
+XDPWR_SDPWR_MSPWR
+XDPWR_SDPWR_MSPWR
+3VS
+3VALW
CLK_SD_48M<15>
USB20_P4<20> USB20_N4<20>
5IN1_LED#<31>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
Card Reader JMB385
Custom
25 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
40~60 mil
Vender suggesttion
EMI
Internal 200K Pull UP
R396 NC for RTS5158E
R396 stuff for RTS5159
C592 0.1U_0402_16V4Z
12
C603
10U_0805_10V4Z
1
2
C600 6P_0402_50V8D
@
1 2
R395
100K_0402_5%
@
1 2
RTS5158E-GR_LQFP48_7X7
U14
XD_D5_SP5 25
SD_DAT1/XD_D3/MS_D1_SP6 26
SD_DAT0/XD_D6/MS_D0_SP7 27
SD_DAT7/XD_D2/MS_D2_SP8 28
MS_INS#_SP9 29
NC 30
SD_DAT6/XD_D7/MS_D3_SP10 31
DGND
32
D3V3
33
SD_CLK/XD_D1/MS_CLK_SP11 34
SD_DAT5/XD_D0/MS_D6_SP12 35
SD_CMD 36
AV_PLL
1
RREF
2
NC
3
DM
4
DP
5
AGND
6
NC
7
3V3_IN
8
CARD_3V3
9
VREG 10
D3V3
11
DGND
12
XTAL_CTR 13
GPIO0
14
EEDO 15
EECS 16
EESK 17
EEDI 18
XD_CD#_SP1 19
SD_WP_SP2 20
SD_CD#_SP3 21
MS_D4 22
XD_D4/SD_DAT1_SP4 23
MS_D5 24
SD_DAT4/XD_WP#/MS_D7_SP13 37
XD_RDY_SP14 38
SD_DAT3/XD_WE#_SP15 39
SD_DAT2/XD_RE#_SP16 40
XD_ALE_SP17 41
XD_CE#_SP18 42
XD_CLE_SP19 43
RST#
44
MODE_SEL
45
AGND
46
XTLO
47
XTLI
48
R396
0_0402_5%
12
C597 6P_0402_50V8D
@
1 2
C596
47P_0402_50V8J
@
1
2
C342
0.1U_0402_16V4Z
1
2
R42
100K_0402_5%
1 2
R284 0_0603_5%
12
R354 0_0402_5%
12
R843 0_0603_5%
@
1 2
R397
33_0402_5%
@
12
R400 0_0603_5%
1 2
C595
1U_0402_6.3V4Z
1
2
R844 0_0603_5%
1 2
C484
0.1U_0402_16V4Z
1
2
R398 0_0402_5%
1 2
7 IN 1 CONN
JP56
TAITW_R015-A10-LM_NR
XD-WP
33
XD-D4
7
MS-DATA3 24
MS-DATA0 17
SD-DAT2 30
SD-DAT0 14
SD-CMD 25
MS-DATA1 15
XD-D6
5SD-DAT3 29
SD-DAT1 12
XD-ALE
35
XD-D0
32
SD_CLK 20
XD-D2
9
MS-INS 22
MS-DATA2 19
MS-SCLK 26
XD-RE
38
MS-BS 13
XD-D5
6
XD-D7
4
XD-D1
10
XD-CE
37
XD-R/B
39
XD-D3
8
XD-WE
34
MS-VCC 28
7IN1 GND
11
XD-CLE
36
7IN1 GND
31
SD-VCC 21
XD-VCC
3
XD-CD
40 SD-CD-SW 1
SD-WP-SW 2
7IN1 GND
41
7IN1 GND
42
SD-DAT4 27
SD-DAT5 23
SD-DAT6 18
SD-DAT7 16
R363 6.19K_0402_1%
12
R362 0_0402_5%
12
C598
22P_0402_50V8J
@
1
2
R393 0_0402_5%
1 2
C604
22P_0402_50V8J@
1
2
C593
4.7U_0603_6.3V6K
@
1
2
C599
0.1U_0402_16V4Z
1
2
C341 1U_0402_6.3V4Z
1 2
R392
0_0603_5%
1 2
Y2
12MHZ_16PF_6X12000012
@
12
C594
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+LAN_PCIEVDD
+LAN_PCIEPLLVDD
+1.2V_VDDCIO
+LAN_PCIEVDD
LAN_LINK#
LAN_ACTIVITY#
LAN_XTALI
LAN_XTALO
XTALO
LAN_MIDI1+
LAN_MIDI0+
LAN_MIDI0-
+LAN_AVDDL
+LAN_PCIEVDD
+LAN_PCIEPLLVDD
+LAN_AVDD
+LAN_GPHYPLLVDD
LAN_PME#
+LAN_AVDDL
LAN_MIDI3+
LAN_MIDI3-
LAN_MIDI2+
+LAN_AVDD
LAN_RDAC
LAN_MIDI1-
+LAN_AVDD
LAN_MIDI2-
LAN_REGCTL12
SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN
LAN_REGCTL12
+3V_LAN_R
+LAN_BIASVDD
+LAN_XTALVDD
SPROM_CLK
SPROM_DOUT
SPROM_DIN
SPROM_WP
+LAN_AVDDL
CLK_PCIE_LAN
CLK_PCIE_LAN#
ENERGY_DET
+LAN_GPHYPLLVDD
PCIE_PTX_IRX_P3
PCIE_PTX_IRX_N3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3
LAN_PME#
PLT_RST# LAN_RESET#
LAN_PME#
LAN_SMBCLK
LAN_SMBDATA
SPROM_WP
LAN_XTALI
XTALO
+LAN_AVDDL
LAN_SMBDATA
LAN_SMBCLK
+1.2V_VDDCIO
+3VS
+3V_LAN
+3V_LAN
+3V_LAN
+1.2V_LAN
+3V_LAN
+3V_LAN
+3V_LAN
+3V_LAN+3V_LAN
+3V_LAN
+1.2V_VDDCIO
+3V_LAN
+3V_LAN
+1.2V_LAN
+3V_LAN
+3V_LAN
+3V_LAN
+3VALW +3V_LAN
+1.2V_LAN
+1.2V_LAN
+1.2V_LAN
+1.2V_LAN
+3V_LAN
+1.2V_VDDCIO
+3V_LAN
+3V_LAN
+3V_LAN
CLK_PCIE_LAN#<15>
CLK_PCIE_LAN<15>
ENERGY_DET<30>
PCIE_ITX_C_PRX_N3<10>
PCIE_ITX_C_PRX_P3<10>
PCIE_PTX_C_IRX_N3<10>
PCIE_PTX_C_IRX_P3<10>
PLT_RST#<11,13,19,28,30>
SB_PCIE_WAKE#<20,28> EC_PME#<30>
ICH_SMBDATA1<20>
ICH_SMBCLK1<20>
LAN_MIDI1+ <27>
LAN_MIDI2+ <27>
LAN_LINK# <27>
LAN_ACTIVITY# <27>
LAN_MIDI3+ <27>
LAN_MIDI3- <27>
LAN_MIDI2- <27>
LAN_MIDI1- <27>
LAN_MIDI0+ <27>
LAN_MIDI0- <27>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
BCM5764M_5787M
Custom
26 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
20mil
20mil
20mil
20mil
20mil
60mil
5784
Q4A
2N7002DW-T/R7_SOT363-6
@
6 1
2
R25
0_0402_5%
12
C444
0.1U_0402_16V4Z
1
2
R321
4.7K_0402_5%
1 2
R29 4.7K_0402_5%
1 2
C448
0.1U_0402_16V4Z
1
2
U24
AT24C64AN-10SU-2.7_SO8
A0
1
A1
2
A2
3
GND
4
VCC 8
WP 7
SCL 6
SDA 5
C137
27P_0402_50V8J
1
2
R12 1_1206_1%
1 2
R16
4.7K_0402_5%
12
R66 1.24K_0402_1%
1 2
R73
200_0402_1%
12
C428
0.1U_0402_16V4Z
1
2
R77 0_1206_5%
1 2 R309 1_1206_1%
1 2
C409
0.1U_0402_16V4Z
1
2
C445
4.7U_0805_10V4Z
1
2
C416
4.7U_0805_10V4Z
1
2
R311
4.7K_0402_5%
1 2
C71
0.1U_0402_16V4Z
1
2
C410
0.1U_0402_16V4Z
1
2
R308 0_0402_5%@12
C438
0.1U_0402_16V4Z
1
2
R24
0_0402_5%
12
C441
4.7U_0805_10V4Z
1
2
U5
BCM5764MKML_QFN68
VDDIO 6
VDDIO 15
VDDIO 19
VDDIO 56
VDDIO 61
VDDP 17
VDDP/DC 68
VDDC 5
VDDC 13
VDDC 20
VDDC 34
VDDC 55
VDDC 60
VMAIN_PRSNT
53
XTALI
21
XTALO
22
XTALVDD 23
VAUX_PRSNT
54
UART_MODE
9
AVDD/DC 38
AVDD/AVDDL 45
AVDD/DC 52
AVDDL 39
AVDDL/T1_P 44
AVDDL/T2_P 46
AVDDL 51
BIASVDD 36
PCIE_PLLVDD 30
PCIE_VDD/PLL 27
PCIE_VDD 33
CLKREQ
11
CS 62
ENERGY_DET
59
GPHY_PLLVDD
35
GPIO_0(SERIAL_DO)
4
GPIO_1(SERIAL_DI)
7
GPIO_2
8
LINKLED 2
LOW PWR
3
PCIE_REFCLK_N
28
PCIE_REFCLK_P
29
PCIE_RXD_N
32
PCIE_RXD_P
31
PCIE_TXD_N
25
PCIE_TXD_P
26
PERST
10
WAKE
12
RDAC 37
REG_GND/S_IDDQ
16
REGCTL12 14
REGCTL25/12_IO 18
SCLK(EECLK) 65
SI 63
SMB_CLK
58
SMB_DATA
57
SO(EEDATA) 64
SPD1000LED 67
SPD100LED 1
TRAFFICLED 66
TRD0_N 41
TRD0_P 40
TRD1_N/AVDD 42
TRD1_P/T1_N 43
TRD2_N/AVDD 48
TRD2_P/T2_N 47
TRD3_N 49
TRD3_P 50
PCIE_GND/VDD
24 E- PAD 69
R67 0_0402_5%
1 2
L39
BLM18AG601SN1D_0603
1 2
L48
BLM18AG601SN1D_0603
1 2
C28
0.1U_0402_16V4Z
1
2
R60 4.7K_0402_5%
1 2
R20 1K_0402_5%
1 2
R15 0_0402_5% @
1 2
R19 0_0402_5% @
1 2
C434
0.1U_0402_16V4Z
1
2
R61 0_0402_5%
1 2
C27
4.7U_0805_10V4Z
1
2
C142 0.1U_0402_16V7K
1 2
R14
4.7K_0402_5%
12
C412
4.7U_0805_10V4Z
1
2
R47 0_0402_5%
1 2
L45
BLM18AG601SN1D_0603
1 2
C417
0.1U_0402_16V4Z
1
2
C422
0.1U_0402_16V4Z
1
2
R21 1K_0402_5%
1 2
C437
0.1U_0402_16V4Z
1
2
C678
0.1U_0402_16V4Z
1
2
L47
BLM18AG601SN1D_0603
1 2
C440
0.1U_0402_16V4Z
1
2
C426
0.1U_0402_16V4Z
1
2
C111
0.1U_0402_16V4Z
1
2
L19
BLM18AG601SN1D_0603
1 2
L38
BLM18AG601SN1D_0603
1 2
C68
10U_0805_10V4Z
1
2
Q4B
2N7002DW-T/R7_SOT363-6
@
3
5
4
L43
BLM18AG601SN1D_0603
1 2
Y1
25MHZ_20P
1 2
R37 10K_0402_5%
1 2
C126
0.1U_0402_16V4Z
1
2
C143 0.1U_0402_16V7K
1 2
C37
0.1U_0402_16V4Z
1
2
C138
27P_0402_50V8J
1
2
C132
0.1U_0402_16V4Z
1
2
C427
0.1U_0402_16V4Z
1
2
Q3
MMJT9435T1G_SOT223
1
2 3
4
C149
4.7U_0805_10V4Z
1
2
C39
0.1U_0402_16V4Z
1
2
R312
4.7K_0402_5%
1 2
C70
0.1U_0402_16V4Z
1
2
C122
4.7U_0805_10V4Z
1
2
R56 0_0402_5%@
1 2
C415
0.1U_0402_16V4Z
1
2
R299
4.7K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RJ45_GND LANGND
RJ45_MIDI2-
RJ45_MIDI2+
RJ45_MIDI1+
RJ45_MIDI3-
RJ45_MIDI3+
RJ45_MIDI0-
RJ45_MIDI1-
RJ45_MIDI0+
LAN_LINK#
RJ45_MIDI3-
RJ45_MIDI3+
RJ45_MIDI0-
RJ45_MIDI0+
RJ45_MIDI2-
RJ45_MIDI2+
RJ45_MIDI1-
RJ45_MIDI1+
LAN_MIDI3-
LAN_MIDI0+
LAN_MIDI0-
LAN_MIDI1+
LAN_MIDI1-
LAN_ACTIVITY#
LAN_LINK#
LAN_MIDI2-
LAN_MIDI2+
LAN_MIDI3+ LAN_ACTIVITY#
RJ45_GND
+3V_LAN
+3V_LAN
LAN_LINK#<26>
LAN_MIDI0+<26> LAN_MIDI0-<26>
LAN_MIDI1+<26> LAN_MIDI1-<26>
LAN_MIDI2+<26> LAN_MIDI2-<26>
LAN_MIDI3+<26> LAN_MIDI3-<26> LAN_ACTIVITY#<26>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
LAN Magnetic & RJ45/RJ11
B
27 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
40mil
40mil
Guide Pin
For EMI
Place close to TCT pin
C24
0.1U_0402_16V4Z
1
2
C398
68P_0402_50V8J
@
1 2
R298 1K_0402_5%
12
R300
75_0402_1%
12
C403
0.1U_0402_16V4Z
1
2
JRJ45
SUYIN_100073FR012G101ZL
conn@
PR1-
2
PR1+
1
PR2+
3
PR3+
4
PR3-
5
PR2-
6
PR4+
7
PR4-
8
Green LED+
9
Green LED-
10
Yellow LED+
11
Yellow LED-
12
SHLD1 13
SHLD2 14
R304
75_0402_1%
12
R307 1K_0402_5%
12
T1
350uH_GSL5009LF-1
TCT1
1
TD1+
2
TD1-
3
TCT2
4
TD2+
5
TD2-
6
TCT3
7
TD3+
8
TD3-
9
TCT4
10
TD4+
11
TD4-
12
MCT1 24
MX1+ 23
MX1- 22
MCT2 21
MX2+ 20
MX2- 19
MCT3 18
MX3+ 17
MX3- 16
MCT4 15
MX4+ 14
MX4- 13
C406
0.1U_0402_16V4Z
1
2
R302
75_0402_1%
12
R504
0_0603_5%
@
12
C405
68P_0402_50V8J
@
1 2
C400
0.1U_0402_16V4Z
1
2
C397
220P_0402_50V7K
1 2
C402
0.1U_0402_16V4Z
1
2
C26
4.7U_0805_10V4Z
1
2
C25
1000P_1206_2KV7K
1 2
R303
75_0402_1%
12
C408
220P_0402_50V7K
1 2
R505
0_0603_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
WL_OFF#
PLT_RST#
ICH_SMBCLK0
ICH_SMBDATA0
WLAN_BT_CLK
WLAN_BT_DATA
USB20_P8
USB20_N8
MINI1_CLKREQ#
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2
E51RXD_P80CLK
E51TXD_P80DATA_R
MINI1_LED#
SB_PCIE_WAKE#
E51TXD_P80DATA_R
SB_PCIE_WAKE#
CLK_PCIE_MINI2
CLK_PCIE_MINI2#
MINI2_CLKREQ#
WLAN_BT_CLK
WLAN_BT_DATA
PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1
PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P1
E51RXD_P80CLK
PLT_RST#
ICH_SMBCLK0
ICH_SMBDATA0
USB20_N5
USB20_P5
+3VS
+3VS
+1.5VS
+3VS+3VS +1.5VS
+3VS
+3VALW
+3VALW
+3VS
+3VS
+1.5VS
+1.5VS
+3VS
+3VS
+3VALW
+3VS
SB_PCIE_WAKE#<20,26> WLAN_BT_DATA<29> WLAN_BT_CLK<29>
MINI1_CLKREQ#<15>
CLK_PCIE_MINI1#<15> CLK_PCIE_MINI1<15>
PCIE_PTX_C_IRX_N2<10> PCIE_PTX_C_IRX_P2<10>
PCIE_ITX_C_PRX_N2<10> PCIE_ITX_C_PRX_P2<10>
E51TXD_P80DATA<30> E51RXD_P80CLK<30>
WL_OFF# <30>
PLT_RST# <11,13,19,26,30>
ICH_SMBCLK0 <8,9,15,20>
ICH_SMBDATA0 <8,9,15,20>
USB20_N8 <20>
USB20_P8 <20>
MINI1_LED# <30>
WLAN_BT_DATA<29> WLAN_BT_CLK<29>
MINI2_CLKREQ#<15>
CLK_PCIE_MINI2#<15> CLK_PCIE_MINI2<15>
PCIE_PTX_C_IRX_N1<10> PCIE_PTX_C_IRX_P1<10>
PCIE_ITX_C_PRX_N1<10> PCIE_ITX_C_PRX_P1<10> USB20_N5 <20>
USB20_P5 <20>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
MINI CARD (WLAN & TV-Tuner)
B
28 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
Mini Card Power Rating
+3VS
+3V
+1.5VS
Primary Power (mA)
Peak Normal
1000
330
500
750
250
375
Auxiliary Power (mA)
Normal
250 (wake enable)
5 (Not wake enable)
Power
For Wireless LAN
(9~16mA)
H=5.2 mm
For TV-Tuner/HW MPEG
H=9.2 mm
C387
4.7U_0805_10V4Z
@
1
2
JMINI2
FOX_AS0B226-S99N-7F
CONN@
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
45
45 46 46
47
47 48 48
49
49 50 50
51
51 52 52
1
122
G1
53
G2
54
G3
55
G3
56
R278 0_0603_5%
@
1 2
C615
0.1U_0402_16V4Z
1
2
R469 0_0402_5%
1 2
C389
0.1U_0402_16V4Z
@
1
2
C613
0.1U_0402_16V4Z
1
2
R550
100K_0402_5%
@
12
C385
0.1U_0402_16V4Z
1
2
C609
4.7U_0805_10V4Z
1
2
R344 0_0603_5%@
1 2
C390
4.7U_0805_10V4Z
1
2
R279 0_0603_5%
1 2
R345 0_0603_5%
@
1 2
C383
4.7U_0805_10V4Z
@
1
2
C381
0.1U_0402_16V4Z
1
2
R498 0_0402_5%@
1 2
JMINI1
FOX_AS0B226-S52N-7F~N
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
R282 0_0402_5%@
1 2
C380
0.1U_0402_16V4Z
@
1
2
C382
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BT_ON#
USB20_P12
USB20_N12
WLAN_BT_DATA
WLAN_BT_CLK
USB_OC#6
+USB_VCCB
USB20_N6_1
USB20_P6_1
SYSON#
USB20_P1
USB20_N1
USB_OC#1
USB20_N0
USB20_P0
USB20_N2_2
USB20_P2_2
SYSON#
USB_OC#2
USB20_N6_1
USB20_P6_1
USB20_P6_1
USB20_N6_1
USB20_P6
USB20_N6
USB_OC#1
USB_OC#2
+3VALW +3VS
+BT_VCC
+BT_VCC
+USB_VCCB
+5VALW
+3VALW
+USB_VCCB
+5VALW
+5VALW
+3VALW
+3VALW
BT_ON#<30>
USB20_P12<20> USB20_N12<20>
WLAN_BT_DATA<28> WLAN_BT_CLK<28>
SYSON#<24,36,43>
USB_OC#6 <20>
SYSON#<24,36,43>
USB20_N0<20> USB20_P0<20>
USB20_N1<20> USB20_P1<20>
USB_OC#1<20>
SYSON#<24,36,43>
USB20_N2_2<20> USB20_P2_2<20>
USB_OC#2<20,24>
USB20_N6<20>
USB20_P6<20>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
NEW CARD & USB Connector
B
29 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
Bluetooth Conn.
W=40mils
80mil
W=80mils
right
Right Up
2 PORT
1 PORT FOR JV70
HS USB PORT
R421
100K_0402_5%
12
+
C539
150U_D2_6.3VM
1
2
C555
4.7U_0805_10V4Z
1
2
R452
300_0603_5%
12
R422 10K_0402_5%
1 2
R520
100K_0402_5%
@
12
R408 0_0402_5%@
1 2
L58
WCM2012F2S-900T04_0805
<>
1
122
33
4
4
G
D
S
Q42
2N7002_SOT23
2
13
JUSB3
SUYIN_020173MR004S512ZL
VCC
1
D-
2
D+
3
GND
4
GND1
5
GND2
6
C608
0.1U_0402_16V4Z
@
1
2
U29
TPS2061DRG4_SO8
GND
1
IN
2
FLG 5
OUT 6
OUT 8
IN
3
EN#
4
OUT 7
C334
1U_0603_10V4Z
1
2
R516
100K_0402_5%
12
R407 0_0402_5%@
1 2
C320
0.1U_0402_16V4Z
JP54
E&T_3703-E12N-03R
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
G1
13
G2
14
C330
0.1U_0402_16V4Z
D21
PJDLC05_SOT23~D
2
3
1
C607
0.1U_0402_16V4Z
1
2
C327
4.7U_0805_10V4Z
1
2
JP55
E-T_3703-E08N-03R
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
GND 9
GND 10
C566
0.1U_0402_16V4Z
1
2
G
D
S
Q16
AO3413_SOT23-3
2
1 3
JP10
ACES_87213-0800G
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
GND 9
GND 10
C335
0.1U_0402_16V4Z
R202 10K_0402_5%
1 2
C498
470P_0402_50V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
E51RXD_P80CLK
E51TXD_P80DATA
EC_CRY1 EC_CRY2
EC_SMB_DA1
EC_SMB_CK1
KSO[0..17]
KSI[0..7]
EC_RCIRRX
KSI1
KSI6
KSI5
KSI7
KSO1
KSO0
KSO2
KSO4
KSO3
KSO5
KSO6
KSO7
KSO8
KSO12
KSO10
KSO13
KSO11
KSO9
KSO15
KSO14
KSI2
KSI0
KSI3
KSI4
EC_CRY2
EC_CRY1
LPC_AD0
LPC_AD1
SERIRQ
LPC_AD3
LPC_AD2
LPC_FRAME#
PLT_RST#
CLK_PCI_EC
TP_DATA
TP_CLK
EC_SMB_DA2
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
INVT_PWM_R
BEEP#
NUM_LED#
CAPS_LED#
ENBKL
BKOFF#_R
EC_SMI#
FSTCHG
EC_SCI#
EC_LID_OUT#
ON/OFF
PM_SLP_S3#
ACIN
PM_SLP_S5# EC_ON
IREF
DAC_BRIG
EN_DFAN1
EC_PWROK
EC_RCIRRX
TH_OVERT#
VR_ON
SYSON
BT_ON#
EC_SWI#
EC_GA20
EC_KBRST#
AD_BID0
ECAGND
BATT_OVP
BATT_TEMP
EC_RSMRST#
FAN_SPEED1
BATT_GRN_LED#
BATT_AMB_LED#
BT_LED#
E51RXD_P80CLK
E51TXD_P80DATA
+EC_VCCA
ECAGND
ECAGND
KSO16
VGATE
EC_SPICLK
PM_CLKRUN#
KSO17
WL_OFF#
EC_SO_SPI_SI
EC_SI_SPI_SO
EC_SPICS#/FSEL#
ACOFF
EC_PME#
TP_DATA
TP_CLK
ADP_I
3S/4S#
EAPD
EC_MUTE
PWR_SUSP_LED
PWR_LED
EC_VLDT_EN
65W/90W#
3S/4S#
65W/90W#
BATT_OVP
ACIN
BATT_TEMP
PBTN_OUT#
SUSP#
CALIBRATE#
EC_THERM#
ENERGY_DET
AD_PID0
AD_PID0
CLK_14M_SIO
LPC_AD0
LPC_AD1
LPC_AD3
PLT_RST#
LPC_FRAME#
LPC_AD2
SERIRQ
LPC_DRQ1#
EC_SMB_DA2
EC_SMB_CK2
BT_ON#
VR_ON
ESB_DATA
ESB_CLK
ESB_DATA
VGA_PWRGD
LID_SW#
EC_SMB_CK2
EC_SMB_DA2
ESB_CLK
ESB_DATA
EC_I2C_INT2_R
EC_I2C_INT1_R
EC_I2C_INT1_R
LID_SW#
EC_I2C_INT2_R
EC_PME#
AD_BID0
PLT_RST#
PM_CLKRUN#
KSO1
KSO2
MINI1_LED#
ESB_CLK
EC_SPICS#/FSEL#
EC_SPICLK
ON/OFF
BKOFF#_R
+3VALW
+3VALW
+5VS
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+5VS +3VS
+3VS
+3VALW
EC_GA20<20>
EC_KBRST#<20> SERIRQ<19>
LPC_FRAME#<19> LPC_AD3<19> LPC_AD2<19> LPC_AD1<19> LPC_AD0<19>
CLK_PCI_EC<19,23> PLT_RST#<11,13,19,26,28>
EC_SCI#<20>
PM_CLKRUN#<19>
RCIRRX<32>
EC_SMB_CK1<6,14,38> EC_SMB_DA1<6,14,38>
EC_SMB_DA2<6> EC_SMB_CK2<6>
PM_SLP_S3#<20> PM_SLP_S5#<20> EC_SMI#<20>
TH_OVERT#<14>
ENERGY_DET<26> FAN_SPEED1<35> BT_ON#<29>
ON/OFF<32>
PWR_SUSP_LED<31> NUM_LED#<31>
CLK_14M_SIO <15>
LPC_DRQ1# <19>
LPCCLK1 <19,23>
KSI[0..7] <31>
KSO[0..17] <31>
BEEP# <33>
ACOFF <40>
E51TXD_P80DATA <28>
E51RXD_P80CLK <28>
BATT_TEMP <38>
BATT_OVP <40>
ADP_I <40>
DAC_BRIG <16>
EN_DFAN1 <35>
IREF <40>
CALIBRATE# <40>
EC_MUTE <34>
BT_LED# <31>
TP_CLK <31>
TP_DATA <31>
3S/4S# <40>
65W/90W# <40>
EC_VLDT_EN <32>
EC_SI_SPI_SO <31>
EC_SO_SPI_SI <31>
EC_SPICLK <31>
EC_SPICS#/FSEL# <31>
FSTCHG <40>
BATT_GRN_LED# <31>
CAPS_LED# <31>
BATT_AMB_LED# <31>
PWR_LED <31>
SYSON <36,42>
VR_ON <44>
ACIN <21,36,37,40>
EC_RSMRST# <20>
EC_LID_OUT# <20>
EC_ON <32>
EC_SWI# <20>
EC_PWROK <32>
WL_OFF# <28>
VGATE <44>
ENBKL <11,14>
EAPD <33>
EC_THERM# <21>
SUSP# <32,36,43>
PBTN_OUT# <20>
VGA_PWRGD <14>
EC_I2C_INT2<31> EC_I2C_INT1<31>
ESB_EC_CK2<31>
ESB_EC_DA2<31>
ESB_EC_CK2<31>
ESB_EC_DA2<31>
LID_SW# <32>
EC_PME# <26>
EC_ACIN <14>
MEDIA_LED#_OUT <31>
MINI1_LED# <28>
MEDIA_LED#_IN <31>
FAN_PWM <35>
BKOFF# <11,16>
INVT_PWM <16>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
EC ENE KB926
B
30 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
For EC Tools
Analog Board ID definition,
Please see page 3.
Ra
Rb
20mil
Place on RAM door
VGATE(A32)
Ra
Rb
LPC debug port
No EC change, so Keep the board ID = 0.3
Pin 74--ENE RST(R) or CY INT(R)
Pin16--ENE RST(L) or CY INT(L)
R188 47K_0402_5%
12
R478 0_0402_5%
ENE@
12
R246 100K_0402_5%
12
R524 0_0402_5%
1 2
R204 10K_0402_5%
@
1 2
C337
0.1U_0402_16V4Z
1
2
C40 100P_0402_50V8J@
12
C351
0.1U_0402_16V4Z
1
2
D11
RB751V_SOD323
21
C355 100P_0402_50V8J
12
R217 2.2K_0402_5%
1 2
R198
10K_0402_5%
1 2
R287 47K_0402_5%
1 2
R187
18K_0402_5%
1 2
R241 4.7K_0402_5%
@
1 2
C354
4.7U_0805_10V4Z
1
2
R211 10K_0402_5%
1 2
C308
0.1U_0402_16V4Z
1
2
C357
1000P_0402_50V7K
1
2
R216 2.2K_0402_5%
1 2
R288 10K_0402_5%
1 2
C353
15P_0402_50V8J
ENE@
1
2
R614 0_0402_5%
1 2
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
U16
KB926QFB1_LQFP128_14X14
GA20/GPIO00
1
KBRST#/GPIO01
2
SERIRQ#
3
LFRAME#
4
LAD3
5
PM_SLP_S3#/GPIO04
6
LAD2
7
LAD1
8
VCC 9
LAD0
10
GND
11
PCICLK
12
PCIRST#/GPIO05
13
PM_SLP_S5#/GPIO07
14
EC_SMI#/GPIO08
15
LID_SW#/GPIO0A
16
SUSP#/GPIO0B
17
PBTN_OUT#/GPIO0C
18
EC_PME#/GPIO0D
19
SCI#/GPIO0E
20
INVT_PWM/PWM1/GPIO0F 21
VCC 22
BEEP#/PWM2/GPIO10 23
GND
24
EC_THERM#/GPIO11
25
FANPWM1/GPIO12 26
ACOFF/FANPWM2/GPIO13 27
FAN_SPEED1/FANFB1/GPIO14
28
FANFB2/GPIO15
29
EC_TX/GPIO16
30
EC_RX/GPIO17
31
ON_OFF/GPIO18
32
VCC 33
PWR_LED#/GPIO19
34
GND
35
NUMLED#/GPIO1A
36
ECRST#
37
CLKRUN#/GPIO1D
38
KSO0/GPIO20
39
KSO1/GPIO21
40
KSO2/GPIO22
41
KSO3/GPIO23
42
KSO4/GPIO24
43
KSO5/GPIO25
44
KSO6/GPIO26
45
KSO7/GPIO27
46
KSO8/GPIO28
47
KSO9/GPIO29
48
KSO10/GPIO2A
49
KSO11/GPIO2B
50
KSO12/GPIO2C
51
KSO13/GPIO2D
52
KSO14/GPIO2E
53
KSO15/GPIO2F
54
KSI0/GPIO30
55
KSI1/GPIO31
56
KSI2/GPIO32
57
KSI3/GPIO33
58
KSI4/GPIO34
59
KSI5/GPIO35
60
KSI6/GPIO36
61
KSI7/GPIO37
62
BATT_TEMP/AD0/GPIO38 63
BATT_OVP/AD1/GPIO39 64
ADP_I/AD2/GPIO3A 65
AD3/GPIO3B 66
AVCC 67
DAC_BRIG/DA0/GPIO3C 68
AGND
69
EN_DFAN1/DA1/GPIO3D 70
IREF/DA2/GPIO3E 71
DA3/GPIO3F 72
CIR_RX/GPIO40 73
CIR_RLC_TX/GPIO41 74
AD4/GPIO42 75
SELIO2#/AD5/GPIO43 76
SCL1/GPIO44
77
SDA1/GPIO45
78
SCL2/GPIO46
79
SDA2/GPIO47
80
KSO16/GPIO48
81
KSO17/GPIO49
82
PSCLK1/GPIO4A 83
PSDAT1/GPIO4B 84
PSCLK2/GPIO4C 85
PSDAT2/GPIO4D 86
TP_CLK/PSCLK3/GPIO4E 87
TP_DATA/PSDAT3/GPIO4F 88
FSTCHG/SELIO#/GPIO50 89
BATT_CHGI_LED#/GPIO52 90
CAPS_LED#/GPIO53 91
BATT_LOW_LED#/GPIO54 92
SUSP_LED#/GPIO55 93
GND
94
SYSON/GPIO56 95
VCC 96
SDICS#/GPXOA00 97
SDICLK/GPXOA01 98
SDIDO/GPXOA02 99
EC_RSMRST#/GPXO03 100
EC_LID_OUT#/GPXO04 101
EC_ON/GPXO05 102
EC_SWI#/GPXO06 103
ICH_PWROK/GPXO06 104
BKOFF#/GPXO08 105
WL_OFF#/GPXO09 106
GPXO10 107
GPXO11 108
SDIDI/GPXID0 109
PM_SLP_S4#/GPXID1 110
VCC 111
ENBKL/GPXID2 112
GND
113
GPXID3 114
GPXID4 115
GPXID5 116
GPXID6 117
GPXID7 118
SPIDI/RD# 119
SPIDO/WR# 120
VR_ON/XCLK32K/GPIO57 121
XCLK1
122
XCLK0
123 V18R 124
VCC 125
SPICLK/GPIO58 126
AC_IN/GPIO59 127
SPICS# 128
C312
0.1U_0402_16V4Z
1
2
L36
FBM-L11-160808-800LMT_0603
12
R207 4.7K_0402_5%
1 2
R258 100K_0402_5%
@
1 2
R209
100K_0402_5%
1 2
R474 0_0402_5%
CY@
12
JP11
ACES_85205-0400
@
11
22
33
44
R208 4.7K_0402_5%
1 2
R552 100K_0402_5%
12
R221 4.7K_0402_5%
1 2
C317
0.1U_0402_16V4Z
1
2
R224 4.7K_0402_5%
1 2
C359
15P_0402_50V8J
1
2
R475 0_0402_5%
CY@
12
R203
100K_0402_5%
@
1 2
C46 100P_0402_50V8J
12
C331
22P_0402_50V8J@
12
X1
32.768KHZ_12.5P_MC-306
OUT 4
IN 1
NC
3
NC
2
R551 100K_0402_5%
12
R219 33_0402_5%@
12
L35
FBM-L11-160808-800LMT_0603
1 2
R286 47K_0402_5%
1 2
JP28
ACES_85201-20051
@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
R479 0_0402_5%
12
C304 100P_0402_50V8J
12
R521 0_0402_5%
1 2
C305 0.01U_0402_16V7K
12
R561 4.7K_0402_5%
1 2
C315
0.1U_0402_16V4Z
1
2
R473 8.2K_0402_5% @
1 2
C356
1000P_0402_50V7K
1
2
R562 4.7K_0402_5%
1 2
C306 0.1U_0402_16V4Z
12
R480 0_0402_5%
12
R477 0_0402_5%
ENE@
12
C41 100P_0402_50V8J @
12
R189
100K_0402_5%
1 2
C358
15P_0402_50V8J
1
2
C303 100P_0402_50V8J
12
C307
0.1U_0402_16V4Z
1
2
R523 0_0402_5%
1 2
KSO[0..17]
KSI[0..7]
KSI1
KSI6
KSI5
KSI7
KSO1
KSO0
KSO2
KSO4
KSO3
KSO5
KSO6
KSO7
KSO8
KSO12
KSO10
KSO13
KSO11
KSO9
KSO15
KSO14
KSI2
KSI0
KSI3
KSI4
KSO16
KSO17
SPI_WP#
SPI_HOLD#
EC_SPICS#/FSEL#
EC_SI_SPI_SO
EC_SPICLK
EC_SO_SPI_SI
+SPI_VCC
SPI_WP#
+SPI_VCC
SPI_HOLD#
EC_SPICS#/FSEL#
KSO16
KSO17
KSO4
KSO5
KSO6
KSO7
KSO13
KSO14
KSO15
KSO12
ESB_EC_CK2
ESB_EC_DA2
SATA_LED#
ESB_EC_DA2
ESB_EC_CK2
TP_DATA
BTN_L
BTN_RBTN_L
MEDIA_LED#_IN
PWR_SUSP_LED#
PWR_LED#
PWR_SUSP_LED#
PWR_LED#
BATT_GRN_LED#
BATT_AMB_LED#
MEDIA_LED#_OUT
PWR_LED# PWR_SUSP_LED#
KSO0
KSO3
KSO2
KSO1
KSO8
KSO9
KSO11
KSO10
KSI5
KSI4
KSI6
KSI7
KSI1
KSI3
KSI2
KSI0
BTN_L
TP_CLK
BTN_R
BTN_R
+3VALW
+3VALW
+3VS+5VS
+3VS+5VS
+3VS
+5VS
+3VS
+5VALW
+5VALW
+5VALW
+5VALW
+5VALW
+5VALW
EC_SPICS#/FSEL#<30>
SATA_LED# <21>
5IN1_LED# <25>
KSO[0..17] <30>
EC_SPICLK <30>
EC_SO_SPI_SI <30>
ESB_EC_CK2<30> ESB_EC_DA2<30>
ESB_EC_CK2<30> ESB_EC_DA2<30>
EC_SI_SPI_SO <30>
KSI[0..7] <30>
MEDIA_LED#_IN<30>
EC_I2C_INT1<30>
EC_I2C_INT2<30>
BATT_GRN_LED# <30>
BATT_AMB_LED# <30>
NUM_LED# <30>
MEDIA_LED#_OUT <30>
CAPS_LED# <30>
BT_LED# <30>
PWR_SUSP_LED<30>PWR_LED<30>
ON/OFFBTN# <32>
TP_DATA <30>
TP_CLK <30>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
BIOS, I/O Port & K/B Connector
Custom
31 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
To TP/B Conn.
(Left)
(Right)
INT_KBD Conn.
Reserved for BIOS simulator.
Footprint SO8
To Media/B Conn.
To LED/B Conn.
For EMI
CAP Sansor right
CAP Sansor lift for JM70
Need Check
Left Right
Left Right
JM70 JV70
1.HDD 1.HDD
JV70
JM70JM70
CAP Sansor up for JV70
Color Need ConfirmColor Need Confirm
TO POWER BTN/B for JV70
JM70
2.BT_LED2.BT_LED
3.CAP LED
4.NUM_LED
4.NUM_LED
3.CAP LED
JKB1
ACES_88747-2601
KSI7
1KSI6
2KSI5
3KSI4
4KSI3
5KSI2
6KSI1
7KSI0
8KSO17
9KSO16
10 KSO15
11 KSO14
12 KSO13
13 KSO12
14 KSO11
15 KSO10
16 KSO9
17 KSO8
18 KSO7
19 KSO6
20 KSO5
21 KSO4
22 KSO3
23 KSO2
24 KSO1
25 KSO0
26
G1 27
G2 28
R449 240_0402_5%
R271 4.7K_0402_5%
1 2 R268 0_0402_5%
1 2
R587300_0402_5%1 2
CP3
100P_1206_8P4C_50V8
2
3
4 5
6
7
81
C374 0.1U_0402_16V4Z
1 2
R233 4.7K_0402_5%
1 2
SW2
EVQPLHA15_4P
JV70@
3
2
1
4
5
6
R247
100K_0402_5%
1 2
CP4
100P_1206_8P4C_50V8
2
3
4 5
6
7
81
D8
PSOT24C-LF-T7_SOT23-3
2
3
1
B
A
LED1
HT-297UD/CB _BLUE/AMB_0603
2 1
4 3
C905
33P_0402_50V8K
@
C56 100P_0402_50V8J
1 2
U38
NC7SZ08P5X_NL_SC70-5
B2
A1
Y
4
P5
G
3
C43
100P_0402_50V8J
@1
2
C42
100P_0402_50V8J
@1
2
C907
33P_0402_50V8K
U18
MX25L8005M2C-15G_SOP8
CE#
1
SO 2
WP#
3
VSS
4SI 5
SCK 6
HOLD#
7
VDD 8
R588300_0402_5%1 2
SW1
EVQPLHA15_4P
JV70@
3
2
1
4
5
6
B
A
LED2
HT-297UD/CB _BLUE/AMB_0603
2 1
4 3
R563300_0402_5% @
1 2
JP45
ACES_88266-02001
11
22
G2 4
G1 3
CP6
100P_1206_8P4C_50V8
2
3
4 5
6
7
81
R269 0_0402_5%
1 2
U19
MX25L1005AMC-12G_SOP8
@
CE#
1
SO 2
WP#
3
VSS
4SI 5
SCK 6
HOLD#
7
VDD 8
R450 453_0402_1%
1 2
C915
0.1U_0402_16V4Z
1
2
SW5
EVQPLHA15_4P
JM70@
3
2
1
4
5
6
R273 0_0603_5%
1 2
C906
33P_0402_50V8K
@
JP13
ACES_87151-1207G
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
G13
13
G14
14
R446 453_0402_1%
1 2
Q20A
2N7002DW-T/R7_SOT363-6
61
2
CP2
100P_1206_8P4C_50V8
2
3
4 5
6
7
81
R451 240_0402_5%
C57 100P_0402_50V8J
1 2
C908
33P_0402_50V8K
C45
100P_0402_50V8J
@1
2
JP12
ACES_85201-0605
CONN@
11
22
33
44
55
66
7
7
8
8
JP2
ACES_85201-0605
CONN@
1
12
23
34
45
56
6
77
88
C259
100P_0402_50V8J
@1
2
R447 240_0402_5%
Q20B
2N7002DW-T/R7_SOT363-6
3
5
4
JP6
ACES_85201-0605
CONN@
1
12
23
34
45
56
6
77
88
SW4
EVQPLHA15_4P
JM70@
3
2
1
4
5
6
C258
100P_0402_50V8J
@
1
2
B
A
LED3
HT-297UD/CB _BLUE/AMB_0603
JM70@
2 1
4 3
CP1
100P_1206_8P4C_50V8
2
3
4 5
6
7
81
R448 453_0402_1%
1 2
R264
100K_0402_5%
1 2
CP5
100P_1206_8P4C_50V8
2
3
4 5
6
7
81
R582300_0402_5% @
1 2
R236 0_0402_5%
1 2
C208
0.1U_0402_16V4Z
@
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
EC_ON
51ON# HDA_SDIN1_MDC
SUSP#
ON/OFFBTN#
SUSP#
RCIRRX
EC_VLDT_EN
ON/OFFBTN#
SUSP#
LID_R
LID_R
ON/OFFBTN#
+3VS
+3VALW
+3VALW+3VALW
+3VS
+3VALW +3VALW
+3VALW +3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
ON/OFFBTN#<31> HDA_SDIN1<20>
HDA_RST_MDC#<20>
EC_PWROK<30>
SUSP<36>
EC_VLDT_EN<30>
SUSP#<30,36,43>
VGA_ON <14>
VLDT_EN <36,41,42>
SB_PWRGD <6,20>
HDA_SYNC_MDC<20>
HDA_SDOUT_MDC<20>
ON/OFF <30>
51ON# <37> HDA_BITCLK_MDC <20>
RCIRRX <30>
EC_ON<30>
LID_SW# <30>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
Power OK, Reset and RTC Circuit, TP
B
32 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
Power ON Circuit
Power Button
Bottom Side
ON/OFF switch
For South Bridge
For +VCCP/+1.05VS
HDA MDC Conn.
20mil
For EMI
TOP Side
CIR
EMI Notice
HDA_SNC_MDC ,HDA_SDOUT_MDC DONT Cross Mode
(Hall Effect Switch)
Lid Switch
JV70 JM70
JM70
JM70
C349
1U_0805_25V4Z
1
2
R253 0_0402_5%
1 2
R249
180K_0402_5%
12
IR1
TSOP36236TR_4P
JM70@
GND
1Vs
3OUT 4
GND 2
D12
DAN202UT106_SC70-3
2
3
1
D22
PJDLC05_SOT23~D
@
2
3
1
C373
0.22U_0603_16V7K
VGA@ 1
2
U28
A3212ELHLT-T_SOT23W-3
JV70@
VDD 2
OUTPUT 3
GND
1
R280
0_0402_5%
12
U21A
SN74LVC14APWLE_TSSOP14
O2
I
1
P14
G
7
C644
1000P_0402_50V7K
JM70@
1
2
C352
0.1U_0402_16V4Z
1 2
C601
10P_0402_50V8J
1
2
Connector for MDC Rev1.5
JMDC1
ACES_88018-124G
CONN@
GND1
1
IAC_SDATA_OUT
3
GND2
5
IAC_SYNC
7
IAC_SDATA_IN
9
IAC_RESET#
11
RES0 2
RES1 4
3.3V 6
GND3 8
GND4 10
IAC_BITCLK 12
GND
13
GND
14
GND
15
GND
16
GND
17
GND
18
SW3
SMT1-05-A_4P
JM70@
3
2
1
4
5
6
R285
47K_0402_5%
12
C602
0.1U_0402_16V4Z
1
2
D13
RLZ20A_LL34
12
C377
0.1U_0402_16V4Z
1
2
C394
1U_0603_10V4Z
1
2
R272
10K_0402_1%
12
R266
0_0402_5%
1 2
U31
A3212ELHLT-T_SOT23W-3
JM70@
VDD 2
OUTPUT 3
GND
1
R194
100K_0402_5%
1 2
C393
22P_0402_50V8J
1
2
R254 0_0402_5%@
1 2
D31
CH751H-40PT_SOD323-2
21
R196
10K_0402_5%
1 2
R250 0_0402_5%
1 2
R11 10K_0603_5%@
1 2
U21F
SN74LVC14APWLE_TSSOP14
O12
I
13
P14
G
7
R252 0_0402_5%@
1 2
R267
0_0402_5%
@
1 2
C329
1000P_0402_50V7K
1
2
G
D
S
Q15
2N7002_SOT23
2
13
U21E
SN74LVC14APWLE_TSSOP14
O10
I
11
P14
G
7
R257
330K_0402_5%VGA@
R501
100_0805_5%
JM70@
12
R283 0_0402_5%
1 2
D14
RB751V_SOD323
21
G
D
S
Q19
2N7002_SOT23
2
13
U21D
SN74LVC14APWLE_TSSOP14
O8
I
9
P14
G
7
C645
4.7U_0805_10V4Z
JM70@
1
2
U21C
SN74LVC14APWLE_TSSOP14
O6
I
5
P14
G
7
R281 33_0402_5%
1 2
R301 10K_0603_5%@
1 2
D16 RB751V_SOD323
VGA@
21
U21B
SN74LVC14APWLE_TSSOP14
O4
I
3
P14
G
7
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
DMIC_CLKLINE_R
DMIC_CLK_R
DMIC_DATA_R
INT_MIC
DMIC_DATA
WOOFER_MONO
DMIC_CLK_R
DMIC_DATA_RDMIC_DATA
DMIC_CLK
LINE_L
MONO_IN
SENSE A
SENSE B
MIC1_L
MIC1_R
MONO_IN
HDA_SDIN0_AUDIO
+3VS_DVDD
MIC2_C_L
AMP_RIGHT
AMP_LEFT
MIC2_C_R
HP_L
INT_MIC_RINT_MIC
CODEC_VREF
MIC1_C_L
MIC1_C_R
+VDDA
HP_R
+MIC1_VREFO_L
+3VS
+MIC2_VREFO
+VDDA
+3VS
+AVDD_AC97
+VDDA
+VDDA
+MIC2_VREFO
+5VS +5VAMP
BEEP#<30>
SB_SPKR<20>
MIC1_L<34>
MIC1_R<34>
LINEIN_PLUG#<34>
MIC_PLUG#<34> HP_PLUG#<34>
HDA_RST_AUDIO#<20>
HDA_SYNC_AUDIO<20>
HDA_SDOUT_AUDIO<20>
LINE_L<34>
LINE_R<34>
EAPD<30>
SPDIF<34>
AMP_LEFT <34>
AMP_RIGHT <34>
HDA_SDIN0 <20>
HP_R <34>
HP_L <34>
HDA_BITCLK_AUDIO <20>
WOOFER_MONO <34>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
HD Audio Codec ALC268
B
33 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
C939 C940 must close
codec
15mil
For EMI
DEL SPDIF_HDMI
DMIC Conn.
PCI Beep
EC Beep
For EMI
GND GNDA
10mil
10mil
HD Audio Codec
10mil
40mil
10mil
AGND
DGND
Codec Regulator
4.75v
SENSE A
10K
PORT-E (PIN 14, 15)
PORT-F (PIN 16, 17)
5.1K
20K
39.2K
10K
5.1K
20K
39.2K
PORT-C (PIN 23, 24)
PORT-B (PIN 21, 22)
PORT-A (PIN 39, 41)
SENSE B
PORT-D (PIN 35, 36)
Sense Pin Impedance Codec Signals
PORT-H (PIN 45, 46)
PORT-G (PIN 43, 44)
GND GNDA
Digital MIC for JM70
Analog MIC for JV70
60mil 40mil
(output = 300 mA)
C918
0.1U_0402_16V4Z
C676
220P_0402_50V8J
@
1
2
R481
0_0603_5%
DMIC@
C920
1U_0402_6.3V4Z
1 2
R902 0_0805_5%
1 2
C
BE
Q73
2SC2411K_SOT23
1
2
3
C937 4.7U_0805_6.3V6K
1 2
R896 0_0402_5%
1 2
R602 10K_0402_1%
1 2
R892 0_0402_5%
1 2
C924
0.1U_0402_16V4Z
1
2
R482
0_0603_5%
DMIC@
R903 0_0805_5%
1 2
R900 0_0805_5%
1 2
C921
0.22U_0402_6.3V6K
12
C923
1U_0402_6.3V4Z
1 2
R897 0_0402_5%
1 2
R895 5.11K_0402_1%
1 2
R471 FBM-11-160808-700T_0603AMIC@
C926
0.1U_0402_16V4Z
1
2
C934 4.7U_0805_6.3V6KJM70@
1 2
C939
2.2U_0603_6.3V4Z
1 2
R886 2.4K_0402_1%
1 2
R883 0_0805_5%
@
1 2
L76
MBK1608121YZF_0603
1 2
C929
0.1U_0402_16V4Z
1
2
R904 0_0805_5%
1 2
C922
1U_0402_6.3V4Z
1 2
C935 4.7U_0805_6.3V6KJM70@
1 2
C916 1U_0402_6.3V4Z
1 2
C928
0.1U_0402_16V4Z
1
2
L69
KC FBM-L11-201209-221LMAT_0805
1 2
R472
2.2K_0402_5%
AMIC@
12
JP41
ACES_88266-04001
CONN@
1
1
2
2
3
3
4
4G1 5
G2 6
R889
1K_0402_1%
1 2
R893 33_0402_5%
1 2
C941
0.1U_0402_16V4Z
1
2
R882
10K_0402_5%
12
U58
G9191-475T1U_SOT23-5
IN
1
GND
2
SHDN
3
OUT 5
BYP 4
L70
KC FBM-L11-201209-221LMAT_0805
1 2
C936
10P_0402_50V8J
1 2
C919
4.7U_0805_10V4Z
C931
10U_0805_10V4Z
1
2
C940
2.2U_0603_6.3V4Z
1
2
C942
10U_0805_10V4Z
1
2
R884
10K_0402_5%
12
R894 20K_0402_1%
12
L77
FBM-L11-160808-800LMT_0603
1 2
C927
10U_0805_10V4Z
1
2
D68
SM05T1G_SOT23-3
@
2
3
1
R470 FBM-11-160808-700T_0603AMIC@
U59
ALC272-GR_LQFP48_7X7
LINE2_L
14
LINE2_R
15
MIC2_R
17
MIC2_L
16
LINE1_L
23
LINE1_R
24
LINE1_VREFO
18
LINE2_VREFO
20
MIC2_VREFO
19
MIC1_L
21
MIC1_R
22
SENSE A
13
PCBEEP_IN
12
LOUT1_L 35
LOUT_R 36
MONO_OUT 37
RESET#
11
SYNC
10
BITCLK 6
SDATA_OUT
5
SDATA_IN 8
GPIO0/DMIC_DATA1/2
2
GPIO1/DMIC_DATA3/4
3
CBP 29
CBN 30
MIC1_VREFO 28
VREF 27
DVDD 1
DVDD_IO 9
AVDD1 25
AVDD2 38
HPOUT_R 32
DMIC_CLK1/2 46
EAPD
47
SPDIFO1
48
DVSS1
4
DVSS2
7
CPVEE 31
HPOUT_L 33
SENSE B
34
NC 43
DMIC_CLK3/4 44
SPDIFO2 45
JDREF 40
AVSS1 26
AVSS2 42
LOUT2_L 39
LOUT2_R 41
C932 4.7U_0805_6.3V6K
1 2
C917
4.7U_0805_10V4Z
C925
10U_0805_10V4Z
1
2
R885
560_0402_5%
1 2
R888
10K_0402_5%
12
C675
220P_0402_50V8J
@
1
2
R901 0_0805_5%
1 2
R890
1K_0603_1%JM70@ 12
R898
20K_0402_1%
12
C938 4.7U_0805_6.3V6K
1 2
D67
RB751V_SOD323
2 1
R887
560_0402_5%
1 2
C605
220P_0402_50V7K
AMIC@
1
2
R891
1K_0603_1%JM70@ 12
R899 0_0805_5%
1 2
C933 4.7U_0805_6.3V6K
1 2
C930
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SPKR+
SPKR-
SPKL-
SPKL+
SPKL-
SPKR-
EC_MUTE
GAIN0
GAIN1
AMP_C_RIGHT
AMP_C_LEFT
HP_PLUG#
SPK_L-
WOOFER_MONO
WOOFER_IN+
WOOFER_IN-
SPKL+
WOOFER+
MIC1_R_L
WOOFER-
SPKR+
MIC2_R_1
MIC2_L_1
MIC_PLUG#
LINE_R
MIC1_L_L
EC_MUTE
SPDIF_PLUG#
SPDIF_PLUG#
MIC2_L_1
MIC2_R_1
LINE_R_R
LINE_L_R
HP_R
HP_L HPOUT_L_1
HPOUT_R_1 HPOUT_R_2
HPOUT_L_2
SPDIF
LINEIN_PLUG#
SPK_L+
SPK_R-
SPK_R+
LINE_L
EC_MUTE <30>
+MIC1_VREFO_L +MIC1_VREFO_L
+5VSPDIF
+5VAMP
+5VAMP
+5VAMP+5VAMP
+5VAMP
+5VAMP
+5VAMP
+5VSPDIF
AMP_RIGHT<33>
AMP_LEFT<33>
WOOFER_MONO<33>
EC_MUTE<30>
LINE_R<33>
LINE_L<33>
MIC1_R<33>
MIC1_L<33>
LINEIN_PLUG#<33>
MIC_PLUG#<33>
SPDIF<33>
HP_PLUG# <33>
HP_R<33>
HP_L<33>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
Amplifier & Audio Jack
B
34 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
LINE-IN JACK
Keep 10 mil width
JONS
JONS
S/PDIF Out JACK
LINE Out/Headphone Out
20mil
Int. Speaker Conn.
20mil
Gain = 5.1dB(BTL Mode)
Fc(low)= 2KHz
Fc(high)= 482Hz
30mil MIC JACK
2007/12/07
Check with EC
Left
JM70
JM70
D61 PJDLC05_SOT23~D@
2
31
R519 1.8K_0402_5%JM70@
1 2
D69
SM05_SOT23
@
2
3
1
R911 1K_0603_1%
1 2
D65
SM05_SOT23
@
2
3
1
D66
SM05_SOT23
@
2
3
1
C759
330P_0402_50V7K
1
2
C948
0.47U_0603_16V4Z
1 2
D70
SM05_SOT23
@
2
3
1
C764
220P_0402_50V7K
JM70@
1
2
C944
0.1U_0402_16V4Z
1
2
R625
100K_0402_5%
1 2
JP3
ACES_88266-04001
CONN@
1
1
2
2
3
3
4
4G1 5
G2 6
L65 FBM-11-160808-700T_0603
1 2
R905
100K_0402_5%
1 2
C651
0.068U_0603_16V7K
JM70@
1
2
R619 0_0603_5%
1 2
C656 0.01U_0603_50V7KJM70@
1 2
C947
0.47U_0603_16V4Z
1 2
R645
2.2K_0402_5%
12
D71
SM05_SOT23
@
2
3
1
C760
330P_0402_50V7K
1
2
L66 FBM-11-160808-700T_0603
1 2
D72 PJDLC05_SOT23~D@
2
31
R467
100K_0402_5%
1 2
R906
100K_0402_5%
@
1 2
C943
10U_0805_10V4Z
1
2
JMIC1
SINGA_2SJ-S351-015
1
2
3
4
5
6
L64 FBM-11-160808-700T_0603JM70@ 1 2
R517
1K_0402_1%
JM70@
1 2
G
D
S
Q38
2N7002_SOT23
2
13
C762
100P_0402_50V8J
1
2
G
D
S
Q39
AO3413_SOT23-3
2
1 3
C671
10U_0805_10V4Z
JM70@
1
2
DRIVE
IC
JHP1
SINGA_2SJ-A373-H01
CONN@
1
1
2
2
8
8
9
9
10
10 GND 6
GND 7
3
3
4
4
5
5
R907 0_0402_5%
1 2
C652
0.1U_0603_25V7K
JM70@
1
2
R633 56.2_0603_1%
1 2
D60
PJDLC05_SOT23~D
@
2
31
JP17
ACES_88266-02001
CONN@
1
1
2
2
G2
4G1
3
L44 FBM-11-160808-700T_0603JM70@ 1 2
R617 0_0603_5%
1 2
R518
4.7K_0402_1%
JM70@
1 2
L62 FBM-11-160808-700T_0603
1 2
JLINE1
SINGA_2SJ-S351-015
JM70@
1
2
3
4
5
6
C946
0.47U_0603_16V4Z
1 2
C763
220P_0402_50V7K
JM70@
1
2
D28
RB751V-40TE17_SOD323-2
1 2
R910 0_0402_5%
1 2
U43
APA3011XA-TRL_MSOP8
JM70@
VDD
6
Vo+ 5
Vo- 8
GND 7
IN+
3
IN-
4
SHUTDOWN# 1
BYPASS
2
TPA6017A2PWP_TSSOP20
U60
GND4
1GND3
11 GND2
13 GND1
20
VDD 16
PVDD1 15
RIN-
17
BYPASS 10
NC 12
LOUT- 8
LOUT+ 4
ROUT- 14
ROUT+ 18
RIN+
7
LIN-
5
LIN+
9
GAIN0 2
GAIN1 3
PVDD2 6
SHUTDOWN
19
GND5
21
R908
100K_0402_5%
@
1 2
G
D
S
Q40 2N7002_SOT23
2
13
C606
2.2U_0603_6.3V4Z
JM70@
1
2
R618 0_0603_5%
1 2
L63 FBM-11-160808-700T_0603
1 2
C949
0.1U_0402_16V4Z
1 2
D29
RB751V-40TE17_SOD323-2
1 2
C945
0.47U_0603_16V4Z
1 2
C771
220P_0402_50V7K
1
2
C950
0.47U_0603_16V4Z
1
2
R616 0_0603_5%
1 2
C770
220P_0402_50V7K
1
2
C654
0.33U_0603_16V4Z
JM70@
1 2
R912 1K_0603_1%
1 2
R626
100K_0402_5%
1 2
R634 56.2_0603_1%
1 2
R647
2.2K_0402_5%
12
R909
100K_0402_5%
1 2
+VCC_FAN1
EN_DFAN1
+VCC_FAN1
EN_FAN1_R
+5VS
+3VS
+5VS
EN_DFAN1
<
30>
FAN_SPEED1<30>
FAN_PWM<30>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
FAN & Screw Hole
B
35 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
FAN1 Conn
40mil
Change to SC1BAS16000
R355 close to JP32
H39
H_3P2
@
1
FD6
@
FIDUCIAL_C40M80
1
H18
H_3P2
@
1
H5
H_3P0
@
1
R310
10K_0402_5%
12
H25
H_3P2
@
1
H28
H_4P1X4P6N
@
1
R355
0_0603_5%
@
1 2
H40
H_3P2
@
1
H20
H_4P2
@
1
R346 0_0603_5%
1 2
FD1
@
FIDUCIAL_C40M80
1
JP32
ACES_85205-03001
CONN@
1
2
3
H43
H_10P0N
@
1
FD5
@
FIDUCIAL_C40M80
1
H41
H_3P2
@
1
H26
H_3P2
@
1
C435 10U_0805_10V4Z
1 2
H10
H_3P0
@
1
H6
H_3P0
@
1
H21
H_4P2
@
1
H3
H_3P0
@
1
H12
H_3P0
@
1
FD3
@
FIDUCIAL_C40M80
1
H19
H_4P2
@
1
C769
0.047U_0402_16V7K
12
H7
H_3P0
@
1
H11
H_3P0
@
1
H1
H_3P0
@
1
C429
10U_0805_10V4Z
1 2
C425
1000P_0402_50V7K
1 2
FD2
@
FIDUCIAL_C40M80
1
C411
1000P_0402_50V7K
1
2
H27
H_3P2
@
1
H9
H_3P0
@
1
H31
H_4P1N
@
1
D20
BAS16_SOT23-3
1 2
R815
330_0402_5%
1 2
H32
H_3P2
@
1
D19
1SS355_SOD323-2
12
FD4
@
FIDUCIAL_C40M80
1
H35
H_3P2
@
1
H22
H_4P2
@
1
H8
H_3P0
@
1
H23
H_3P2
@
1
H29
H_3P0
@
1
U26
G990P11U_SOP8
VEN
1
VIN
2
GND 5
GND 6
GND 8
VO
3
VSET
4
GND 7
H38
H_3P2
@
1
H2
H_3P0
@
1
H4
H_3P0
@
1
H17
H_3P2
@
1
H42
H_3P0
@
1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSP
SUSP
SUSP
SYSON
SUSP5VS_GATE
SUSP
SUSP
SUSP SUSP SYSON# SYSON#
SYSON#
VLDT_EN#
VLDT_EN#
VLDT_EN#
5VS_GATE
1.8VS_GATE
1.2V_GATE
VLDT_EN#
ACIN
ACIN
ACIN
+5VALW
+5VALW
+5VALW
+3VALW
+1.8V
+3VS
+VSB
+1.8VS
+VSB
+5VS
+1.5VS +2.5VS +1.8V+0.9V
+1.2VALW
+VSB
+1.2V_HT
+5VALW
+1.1VS
SYSON#<24,29,43>
SUSP<32>
ACIN<21,30,37,40>
SYSON<30,42>
SUSP#<30,32,43>
VLDT_EN<32,41,42>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
DC Interface
B
36 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
+3VALW TO +3VS
+5VALW TO +5VS
+1.8V to +1.8VS
AO4430
AO4430
C15
1U_0603_10V4Z
1
2
R543
1M_0402_5%
1 2
G
D
S
Q45
2N7002_SOT23
2
13
C376
10U_0805_10V4Z
1
2
G
D
S
Q27
2N7002_SOT23
2
13
R163
470_0603_5%
1 2
U1
SI4856ADY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
R275
10K_0402_5%
12
R306
150K_0402_5%
12
R10
470_0603_5%
1 2
G
D
S
Q44
2N7002_SOT23
2
13
G
D
S
Q37
2N7002_SOT23
2
13
U11
SI4856ADY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
G
D
S
Q58
2N7002_SOT23
2
13
R170
470_0603_5%
1 2
R173
470_0603_5%
1 2
C318
10U_0805_10V4Z
1
2
R424
510K_0402_5%
12
G
D
S
Q10
2N7002_SOT23
2
13
G
D
S
Q24
2N7002_SOT23
2
13
C286
10U_0805_10V4Z
1
2
G
D
S
Q9
2N7002_SOT23
2
13
G
D
S
Q22
2N7002_SOT23
2
13
C314
1U_0603_10V4Z
1
2
G
D
S
Q25
2N7002_SOT23
2
13
G
D
S
Q14
2N7002_SOT23
2
13
G
D
S
Q43
2N7002_SOT23
@
2
13
R212
200K_0402_5%
12
R270
470_0603_5%
1 2
G
D
S
Q11
2N7002_SOT23
2
13
R186
10K_0402_5%
12
G
D
S
Q26
2N7002_SOT23
2
13
U15
AO4468_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
C285
10U_0805_10V4Z
1
2
R544
470_0603_5%
1 2
C375
10U_0805_10V4Z
1
2
R193
470_0603_5%
1 2
G
D
S
Q12
2N7002_SOT23
2
13
C14
10U_0805_10V4Z
1
2
C310
10U_0805_10V4Z
1
2
R177
100K_0402_5%
1 2
G
D
S
Q57
2N7002_SOT23
2
13
R276
100K_0402_5%
1 2
R191
100K_0402_5%
1 2
C309
10U_0805_10V4Z
1
2
R171
100K_0402_5%
12
C388
1U_0603_10V4Z
1
2
G
D
S
Q51
2N7002_SOT23
2
13
C270
1U_0603_10V4Z
1
2
U22
AO4468_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
C407
0.1U_0603_25V7K
1
2
G
D
S
Q13
2N7002_SOT23
2
13
C328
0.1U_0603_25V7K
1
2
C269
10U_0805_10V4Z
1
2
R542
1M_0402_5%
1 2
C564
0.1U_0603_25V7K
1
2
R541
1M_0402_5%
@
1 2
C16
10U_0805_10V4Z
1
2
R277
470_0603_5%
1 2
R423
470_0603_5%
1 2
C391
10U_0805_10V4Z
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DC_IN_S1
N1
N2
CHGRTCP
+RTCBATT
VIN
+3VALWP +3VALW
+5VALWP
+VSBP +VSB
+0.9V+0.9VP
+1.1VS+1.1VSP
+1.8VP +1.8V
+5VALW
+2.5VS+2.5VSP
+1.2VALWP +1.2VALW
VIN
VS
BATT+
RTCVREF
+CHGRTC
VS
VINVIN
RTCVREF
+1.5VS+1.5VSP
+NB_COREP +NB_CORE
+RTCBATT
51ON#<32>
ACIN <21,30,36,40>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
DCIN & DETECTOR
37 46Tuesday, February 03, 2009
Compal Electronics, Inc.
2009/11/032008/11/03
(120mA,40mils ,Via NO.= 2)
(8.61A,400mils ,Via NO.= 20)
(2A,80mils ,Via NO.= 4)(8.61A,400mils ,Via NO.= 20)
(1.9A,80mils ,Via NO.=4)
(12.06A,480mils ,Via NO.=24)
(1.0A,40mils ,Via NO.=2)
(3.94A,160mils ,Via NO.=8)
3.3V
KBKC0_KBYF0
Min. Typ Max.
H-->L 16.976V 17.525V 17.728V
L-->H 17.430V 17.901V 18.384V
Vin Dectector
(8.8A,360mils ,Via NO.=18) (1.0A,40mils ,Via NO.=2)
-+
RTC Battery
SP093MX0000
PC10
1U_0805_25V4Z
12
PC5
0.1U_0603_25V7K
12
PR5
22K_0402_5%
1 2
PJ9
JUMP_43X118@
11
2
2
PC2
100P_0402_50V8J
12
PJ10
JUMP_43X118@
11
2
2
PR197
10K_0402_1%
1 2
PR3
84.5K_0402_1%
12
PU1A
LM358DT_SO8
+3
-2
0
1
P8
G
4
PD5
RLS4148_LL34-2
12
PJ8
JUMP_43X118@
11
2
2
PQ1
TP0610K-T1-E3_SOT23-3
2
13
PJ3
JUMP_43X118@
11
2
2
PR710K_0402_5%
12
PR11
200_0603_5%
1 2
PD4
RLS4148_LL34-2
1 2
PL1
SMB3025500YA_2P
1 2
PC1
1000P_0402_50V7K
12
PJ6
JUMP_43X39 @
11
2
2
PR13
22K_0402_1%
1 2
PR4
0_0402_5%
1 2
PR16
560_0603_5%
1 2
PR10
68_1206_5%
12
PC8
0.1U_0603_25V7K
12
PR15
560_0603_5%
1 2
1
2
G
G3
PJP1
SINGA_2DC-G756I200
PJ7
JUMP_43X118@
11
2
2
PR2
10K_0402_5%
@
12
PC6
1000P_0402_50V7K
12
PC9
10U_0805_10V4Z
12
PJ5
JUMP_43X79@
11
2
2
PJ11
JUMP_43X118@
11
2
2
PC3
1000P_0402_50V7K
12
PD3
RLZ4.3B_LL34
12
PC4
100P_0402_50V8J
12
PR1
1M_0402_1%
1 2
PR6
20K_0402_1%
12
PJ2
JUMP_43X118@
11
2
2
PR8
10K_0402_5%
1 2
PC172
0.1U_0402_25V6
1 2
PU2 G920AT24U_SOT89-3
IN 2
GND
1
OUT
3
PR14
200_0603_5%
12
PC7
0.22U_0603_25V7K
12
PR12
100K_0402_1%
12
PJ4
JUMP_43X118@
11
2
2
PBJ1
MAXEL_ML1220T10@
12
PR9
68_1206_5%
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
TM_REF1
TM_REF1
EC_SMDA
EC_SMCA
BATT+
VMB
VL
VL
VL
VL
VL
VL
B+ +VSBP
VL
+3VALWP
VL
BATT_TEMP <30>
EC_SMB_CK1 <6,14,30>
EC_SMB_DA1 <6,14,30>
POK<39,41>
MAINPWON <6,39>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
BATTERY CONN / OTP
38 46Tuesday, February 03, 2009
Compal Electronics, Inc.
2009/11/032008/11/03
PH2 near main Battery CONN :
Recovery at 56 degree C
BAT. thermal protection at 92 degree C
Recovery at 56 degree C
CPU thermal protection at 92 degree C
PH1 under CPU botten side :
KBKC0_KBYF0
PR30
12K_0402_1%
@
1 2
PC11
0.1U_0603_25V7K
12
PQ2
DTC115EUA_SC70-3
2
13
PR34
0_0402_5%
1 2
PC18
0.22U_0603_16V7K
@
12
PC13
0.01U_0402_25V7K
12
PH1
100K_0603_1%_TH11-4H104FT
12
PR26
1K_0402_1%
12
PU3A
LM393DG_SO8
+
3
-
2O1
P8
G
4
PH2
100K_0603_1%_TH11-4H104FT
@
12
PR20
100_0402_1%
1 2
PR33
100K_0402_1%
1 2
PR28
100K_0402_1%
@
1 2
PC12
1000P_0402_50V7K
12
PR29
100K_0402_1%
12
G
D
S
PQ4
SSM3K7002F_SC59-3
2
13
PR27
100K_0402_1%
@
1 2
PD7
RLS4148_LL34-2
@
12
PR21
100_0402_1%
1 2
PD6
RLS4148_LL34-2
12
PC15
1000P_0402_50V7K
12
PR23
100K_0402_1%
12
PR31
22K_0402_1%
1 2
PR24
6.49K_0402_1%
12
PJP2
SUYIN_200275MR007G161ZL
1
2
3
4
5
6
7
8
9
PC16
0.22U_0603_25V7K
@
12
PR19
8.87K_0402_1%
1 2
PR17
47K_0402_1%
1 2
PC17
0.1U_0603_25V7K
@
12
PQ3
TP0610K-T1-E3_SOT23-3
2
13
PR22
10.7K_0402_1%
12
PU3B
LM393DG_SO8
+
5
-
6O7
P8
G
4
PR32
12K_0402_1%
@
12
PC19
0.1U_0402_16V7K
@
12
PR18
47K_0402_1%
1 2
PL2
SMB3025500YA_2P
1 2
PR25
100K_0402_1%
12
PC14
0.22U_0603_16V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
2VREF_ISL6237
DH5
ILIM2
BST3A
DH3
BST5A
LX5
DL5
FB5
ILM1
FB3
2VREF_ISL6237
DL3
LX3
VL
VL
ISL6237_B+
VS
+3VALWP
+5VALWP
B+
VL
2VREF_ISL6237
ISL6237_B+
VL
POK <38,41>
MAINPWON<6,38>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
+5V/+3V
Custom
39 46
Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
+3.3VALWP Ipeak=8.444A ; Imax=5.91A
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
Vlimit=(5E-06 * 330K)/10=165mV
Ilimit=165mV/18m ~ 165mV/15m
=9.167A ~ 11A
Iocp=Ilimit+Delta I/2
=9.721A ~ 11.554A
Delta I=1.108A (Freq=300KHz)
+5VALWP Ipeak=8.444A ; Imax=5.91A
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
Vlimit=(5E-06 * 330K)/10=165mV
Ilimit=165mV/18m ~ 165mV/15m
=9.167A ~ 11A
Iocp=Ilimit+Delta I/2
=9.7285A ~ 11.5615A
Delta I=1.123A (Freq=400KHz)
KBKC0_KBYF0
PC29
1U_0603_10V6K
1 2
PR48
330K_0402_1%
12
PD8
RLZ5.1B_LL34
1 2
PC36 0.22U_0603_10V7K
1 2
PQ5
AO4466_SO8
3 6
5
7
8
2
4
1
PC39
0.047U_0402_16V7K
@
12
PC32
0.1U_0603_25V7K
1 2
PC37
0.22U_0603_25V7K
1 2
PR47
200K_0402_5%
1 2
PQ6
AO4466_SO8
3 6
5
7
8
2
4
1
PR37
4.7_1206_5%
12
PR54
0_0402_5%
12
PC33
680P_0603_50V7K
12
PR53
0_0402_5%
12
PR45 0_0402_5%
1 2
PR35
0_0805_5%
1 2
PC24
4.7U_1206_25V6K
12
PQ8
AO4712_SO8
3 6
5
7
8
2
4
1
PR40
0_0402_5%
1 2
PC31
0.1U_0603_25V7K
1 2
PQ7
AO4712_SO8
3 6
5
7
8
2
4
1
PD12
1SS355_SOD323-2
12
PC34
680P_0603_50V7K
12
+
PC30
330U_6.3V_M
1
2
PR51
0_0402_5%
1 2
PR42
10K_0402_1%
@
1 2
PR55
47K_0402_5%
@
1 2
PC21
4.7U_1206_25V6K
12
PC20
4.7U_1206_25V6K
12
PC26
0.1U_0603_25V7K
1 2
+
PC35
330U_6.3V_M
1
2
PL3
10UH_MSCDRI-104A-100M-E_4.6A_20%
12
PC38
0.047U_0402_16V7K
12
PC23
4.7U_1206_25V6K
12
PR52
806K_0603_1%
1 2
PR44 0_0402_5%@
12
PR38
2.2_0603_5%
12
PQ38
TP0610K-T1-E3_SOT23-3
2
1 3
PC25
2200P_0402_50V7K
12
PC28
4.7U_0805_6.3V6K
12
PR39
2.2_0603_5%
12
PR36
4.7_1206_5%
12
PC171
0.1U_0402_25V6
12
PU4
ISL6237IRZ-T_QFN32_5X5
UGATE2
26
BOOT2
24
PHASE2
25
LGATE2
23
OUT2
30
REFIN2
32
TON
2
LDOREFIN
8
NC
20
EN_LDO
4
EN2
27
EN1
14
POK1 13
POK2 28
PVCC 19
VCC 3
SKIP 29
LDO 7
ILIM2 31
BYP 9
OUT1 10
GND
21
PGND 22
LGATE1 18
PHASE1 16
BOOT1 17
UGATE1 15
VIN 6
NC
5
REF
1
FB1 11
ILIM1 12
TP
33
PL15
FBMA-L11-322513-151LMA50T_1210
1 2
PR43
10K_0402_1%
1 2
PR49
330K_0402_1%
12
PR41
61.9K_0402_1%
1 2
PR46
100K_0402_1%
1 2
PC22
2200P_0402_50V7K
12
PR50
0_0402_5%
@
1 2
PL4
10UH_MSCDRI-104A-100M-E_4.6A_20%
1 2
PC27
1U_0603_10V6K
1 2
PC163
1U_0603_6.3V6M
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
/BATDRV
ACGOOD#
CELLS
CHG_B+
ACSET
DH_CHG
CHGEN#
24751_VREF
ACDET
PVCC
ACDRV
SE_CHG-
OVPSET
/BATDRV
ACP
DL_CHG
ACN
ACGOOD#
SRSET
CELLS
SE_CHG+
LX_CHG
REGN
CHGEN#
BTST
REGN
VADJ
ACSET
ACSET
VADJ
PQ14_GATE
PQ14_GATE
ACOFF
VMB
VS
BATT+
VIN
24751_VREF
24751_VREF
24751_VREF
24751_VREF
B+
24751_VREF
24751_VREF
RTCVREF
24751_VREF 24751_VREF
3S/4S# <30>
ACOFF <30>
ADP_I <30>
65W/90W#<30>
Calibrate#<30> FSTCHG<30>
IREF <30>
ACIN <21,30,36,37>
BATT_OVP<30>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
CHARGER
40 46Tuesday, February 03, 2009
Compal Electronics, Inc.
2009/11/032008/11/03
BATT-OVP=0.111*BATT+
LI-3S :13.5V----BATT-OVP=1.5V
Cells selector
90W adapter
Input UVP : 17.26V
Icharge=(Vsrset/Vvdac)*(0.1/PR36)
Fsw : 300KHz
Iadapter=(Vacset/Vvdac)*(0.1/PR48)=4.04A
GND
VREF
3 Cell
4 Cell
CELLS
Input OVP : 22.3V
ICHG setting
Charger ADJ Calibrate#
4.0V L
4.1V
4.2V
L
H
PR80 PR85
@0
887K 221K
LI-4S :18V----BATT-OVP=1.998V
CP setting
Iadapter=(Vacset/Vvdac)*(0.1/PR48)=2.90A
65W adapter
CC=0.2~4.26A
Iref=0.77448*Icharge
Iref=0.155~3.3V
887K 221K KBKC0_KBYF0
PR78
499K_0402_1%
12
PR79
10K_0402_1%
1 2
G
D
S
PQ18
SSM3K7002F_SC59-3
2
13
PC65
100P_0402_50V8J
12
PU1B
LM358DT_SO8
+5
-6
0
7
P8
G
4
PC174
0.1U_0402_25V6
12
PC64
0.01U_0402_25V7K
@
12
PC67
0.01U_0402_25V7K
12
PC56
680P_0603_50V8J
12
PR182
3.3_1210_5%
12
PC46
0.1U_0402_16V7K
1 2
PR194
100K_0402_1%
12
PR59
100K_0402_1%
12
PR72
100K_0402_1%
1 2
G
D
S
PQ39
SSM3K7002F_SC59-3
2
13
PR183
100K_0402_1%
12
PR80
887K_0402_1%
12
PQ12
AO4407A_SO8
36
5
7
82
4
1
PR62
0.02_2512_1%
1
3
4
2
G
D
S
PQ17
SI2301BDS-T1-E3_SOT23-3
2
13
PC50
2.2U_0805_25V6K
12
PC52
10U_1206_25V6M
12
G
D
S
PQ40
SSM3K7002F_SC59-3
2
13
PR60
340K_0402_1%
1 2
G
D
S
PQ15
SSM3K7002F_SC59-3
2
13
PC49
0.1U_0603_25V7K
@
12
PR73
17.4K_0402_1%
12
PD10
RLS4148_LL34-2
12
PR61
2.2_0603_5%
1 2
PQ14
SI2301BDS-T1-E3_SOT23-3
2
1 3
PC51
0.1U_0603_25V7K
1 2
PC61
1U_0603_10V6K
12
PJ13
JUMP_43X118@
11
2
2
PL5
10UH_PCMB104T-100MS_6A_20%
1 2
G
D
S
PQ19
RHU002N06_SOT323-3
2
13
PC43
4.7U_1206_25V6K
1 2
PR69
47K_0402_1%
1 2
PQ10
AO4407A_SO8
3 6
5
7
8
2
4
1
PR70 0_0402_5%@
1 2
PR56
0.015_2512_1%
1
3
4
2
PR74
100K_0402_1%
12
PR195
340K_0402_1%
12
PC48
0.1U_0603_25V7K
1 2
PR83
100K_0402_1%
1 2
PR196
200K_0402_1%
12
PR75
100K_0402_1%
@
1 2
PR188
0_0402_5%
@
1 2
PC66
0.01U_0402_25V7K
12
PR71
100K_0402_1%
1 2
PC62
0.1U_0603_25V7K
12
PR85
221K_0402_1%
12
PC59
0.1U_0603_25V7K
12
PC47
0.1U_0603_25V7K
12
PC60
0.1U_0603_25V7K
@
12
PC57
0.47U_0603_16V7K
1 2
PR68
54.9K_0402_1%
1 2
PC40
0.01U_0402_25V7K
1 2
PR77
340K_0402_1%
12
PC63
0.1U_0603_25V7K
12
PC173
0.1U_0402_25V6
12
PC44
0.01U_0402_25V7K
1 2
PR81
105K_0402_1%
12
PC42
4.7U_1206_25V6K
1 2
PC168
0.1U_0402_16V7K
1 2
PC45
2200P_0402_25V7K
1 2
G
D
S
PQ37
SSM3K7002F_SC59-3
2
13
PR64
54.9K_0402_1%
1 2
PR66
100K_0402_1%
12
PR76
10_0603_5%
1 2
G
D
S
PQ16
SSM3K7002F_SC59-3
@
2
13
PQ13
AO4466_SO8
3 6
5
7
8
2
4
1
PC58
0.1U_0402_16V7K
1 2
PR65
4.7_1206_5%
12
PR189
4.3K_0402_5%
@
12
PC55
1U_0603_10V6K
12
PR84
100K_0402_1%
12
PR57
100K_0402_1%
12
PU5
BQ24751ARHDR_QFN28_5X5
ACN
2
ACP
3
CHGEN
1
ACSET
6
IADAPT 15
VADJ
12
PGND 22
ACDET
5
ACOP
7
BAT 17
BATDRV
14
CELLS 20
SRN 18
SRP 19
LODRV 23
ACDRV
4
VREF
10
LEARN 21
SRSET 16
AGND
9
VDAC
11
OVPSET
8
ACGOOD
13
PVCC 28
HIDRV 26
PH 25
BTST 27
REGN 24
TP 29
PR58
3.3_1210_5%
12
PQ9
AO4407A_SO8
36
5
7
82
4
1
PQ11
AO4466_SO8
3 6
5
7
8
2
4
1
PC53
10U_1206_25V6M
12
PR82
0_0402_5%
1 2
PR67
340K_0402_1%
1 2
PD13
RLZ24B_LL34
@
1 2
PC169
10U_1206_25V6M
12
PR63
64.9K_0402_1%
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
BST_1.2V
LG_1.2V
FB1_NB_COREP
1.2V_EN
1.2V_EN
UG_NB_COREP
LG_NB_COREP
LX_NB_COREP
NB_COREP_EN
BST_NB_COREP
NB_COREP_EN
FB2_1.2V
LX_1.2V
UG_1.2V
ISL6228_B+
+5VALW+5VALW
B+ ISL6228_B+
ISL6228_B+ ISL6228_B+
+5VALW +5VALW
+1.2VALWP
+5VALW
+NB_COREP
ISL6228_B+
FB1_NB_COREP
POWER_SEL<11>
VLDT_EN<32,36,42>
POK<38,39>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
NB_COREP / 1.2VSB
41 46Tuesday, February 03, 2009
Compal Electronics, Inc.
2009/11/032008/11/03
1.1VP Ipeak=8.9A ; Imax=6.23A
DCR=6m ohm (max)
Rocset=(Iocp*DCR)/10E-06=7.68K ohm
Iocp=9.846A(1.3*DCR)
Csen=L/(Rocset*DCR)=0.022uF
Freq=303KHz
Rfset=1/(1.5E-10 * Freq)=22K
1.2VP Ipeak=3.94A ; Imax=2.758A
DCR=10m ohm (max)
Rocset=(Iocp*DCR)/10E-06=6.65K ohm
Iocp=5.542A(1.2*DCR)
Csen=L/(Rocset*DCR)=0.027uF
Freq=366KHz
Rfset=1/(1.5E-10 * Freq)=18.2K
POWER_SEL
HIGH 1.0V
1.1VLOW
+1.1V
KBKC0_KBYF0
PR102
71.5K_0402_1%
1 2
PL8
1.8UH_1164AY-1R8N=P3_9.5A_30%
1 2
PC76
1000P_0402_25V8J
12
PC68
1U_0402_6.3V6K
12
PR86
12K_0402_1%
@
1 2
AO4932_SO8
PQ23
D2 2
G2
8
G1 3
S2/D1
5
D2 1
S2/D1
7
S1 4
S2/D1
6
PR95
18.2K_0402_1%
1 2
PR108
2.2_0603_5%
12
PC89
0.1U_0402_16V7K
1 2
PC90
0.1U_0402_10V7K
12
PR89
2.2_0603_1%
1 2
PR110
4.7_1206_5%
12
+
PC83
330U_D2E_2.5VM
1
2
PR103
8.06K_0402_1%
1 2
PR91
0_0402_5%
@
1 2
PC85
680P_0603_50V8J
12
+
PC87
330U_6.3V_M
1
2
PR106
4.7_1206_5%
12
PR96
3.3K_0402_5%
1 2
PC71
0.1U_0603_25V7K
12
PR98
90.9K_0402_1%
12
PR111
47K_0402_1%
12
+
PC164
220U_25V_M
1
2
PC75
1000P_0402_50V7K
12
PR107
8.06K_0402_1%
1 2
PC93
0.01U_0402_25V7K
@
12
PL14
HCB4532KF-800T90_1812
1 2
PC91
1U_0402_6.3V6K
1 2
PL7
1.2UH_1164AY-1R2N=P3_9.8A_30%
1 2
PC78
4.7U_1206_25V6K
12
PC86
0.1U_0402_16V7K
12
PC74
1000P_0402_50V7K
12
PR94
22K_0402_1%
1 2
PR87
10K_0402_1%
@
12
PR100
66.5K_0402_1%
1 2
PR93
10_0603_1%
12
PU6
ISL6228HRTZ-T_QFN28_4X4
FSET2 1
VIN2 2
VCC2 3
VCC1 4
VIN1 5
FSET1 6
PGOOD1 7
FB1
8
VO1
9
OCSET1
10
EN1
11
PHASE1
12
UGATE1
13
BOOT1
14
PVCC1
15
LGATE1
16
PGND1
17
PGND2
18
LGATE2
19
PVCC2
20
BOOT2
21
UGATE2 22
PHASE2 23
EN2 24
OCSET2 25
VO2 26
FB2 27
PGOOD2 28
GND_T 29
PC77
1000P_0402_25V8J
1 2
PR88
2.2_0603_1%
12
PQ22
AO4466_SO8
3 6
5
7
8
2
4
1
G
D
S
PQ21
SSM3K7002F_SC59-3
@
2
13
PR97
102K_0402_1%
1 2
G
D
S
PQ20
SSM3K7002F_SC59-3
@
2
13
PC70
0.1U_0603_25V7K
12
PC72
0.1U_0402_16V7K
@
12
PR99
7.87K_0402_1%
1 2
PQ24
FDS6670AS_NL_SO8
S
3D6
D5
D7
D8
S
2
G4
S
1
PC81
4.7U_1206_25V6K
12
PC82
0.022U_0402_16V7K
1 2
PR114
0_0402_5%
12
PR92
10_0603_1%
12
PC79
4.7U_1206_25V6K
12
PR101
3.3K_0402_5%
12
PC92
1U_0402_6.3V6K
1 2
PC69
1U_0402_6.3V6K
12
PC84
4.7U_1206_25V6K
12
PR112
2.2_0603_5%
1 2
PC170
0.1U_0402_25V6
12
PR104
7.87K_0402_1%
1 2
PC73
0.01U_0402_25V7K
@
12
PC88
680P_0603_50V8J
12
PR90
0_0402_5%
@
1 2
PC80
0.022U_0402_16V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_1.8V-1
DL_1.8V
LX_1.8V
DH_1.8V
51117_B+
BST_1.8V
VLDT_EN
+5VALW
+1.8VP
+5VALW
B+
+5VALW
+1.1VSP
+1.2VALW
SYSON<30,36>
VLDT_EN<32,36,41>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
1.8VSP/+1.1VSP
42 46Tuesday, February 03, 2009
Compal Electronics, Inc.
2009/11/032008/11/03
VFB=0.75V
Vo=VFB*(1+PR120/PR121)=1.8V
Ton=19E-12*Ron*(((2/3)*Vo+100mV)/Vin)+50ns=3.1E-07
Freq=305KHz
Cesr=15m ohm
Ipeak=12.6A Imax=8.82A
Delta I=((19-1.8)*(1.8/19))/(L*Freq)=5.332A
Vtrip=Rtrip*10uA=0.24V
Iocp-min=Vtrip/Rdsonmax*1.4+2.666=17.573A
Iocp-max=Vtrip/Rdsontyp*1.2+2.666=26.908A
Iocp=17.573~26.908A
KBKC0_KBYF0
PC97
0.1U_0402_16V7K
@
12
PR119
17.4K_0402_1%
12
PR187
47K_0402_5%
12
PR116
0_0402_5%
1 2
PQ26
AO4466_SO8
3 6
5
7
8
2
4
1
PR190
4.7_1206_5%
12
PC103
4.7U_0805_6.3V6K
@
12
+
PC98
330U_6.3V_M
1
2
PR121
10K_0402_1%
12
PC99
47P_0402_50V8J
@
1 2
PR118
0_0603_1%
1 2
PL9
1.2UH_1164AY-1R2N=P3_9.8A_30%
1 2
PC100
4.7U_0805_10V6K
12
PR122
0_0402_5%
@
1 2
PU8
APL5912-KAC-TRL_SO8
@
GND
1
VOUT 4
POK
7
EN
8
VCNTL 6
VIN 5
VOUT 3
FB 2
VIN 9
PR120
14K_0402_1%
1 2
PC105
22U_0805_6.3V6M
@
12
PQ27
FDS6670AS_NL_SO8
S
3D6
D5
D7
D8
S
2
G
4
S
1
PR186
47K_0402_5%
@
12
PC104
0.01U_0402_25V7K
@
12
PJ15
JUMP_43X79
@
11
2
2
PJ14
JUMP_43X118@
11
2
2
PR115
200K_0402_5%
1 2
PR123
1.3K_0402_1%
@
12
PC101
1U_0603_10V6K
12
PC106
1U_0603_10V6K
@
12
PC160
680P_0603_50V8J
12
PC94
4.7U_1206_25V6K
12
PC102
1U_0402_6.3V6K
@
12
PR117
0_0603_1%
1 2
PU7
TPS51117RGYR_QFN14_3.5x3.5
VOUT
3
V5FILT
4
EN_PSV 1
TON
2
VFB
5
PGOOD
6DRVL 9
DRVH 13
LL 12
GND
7
PGND
8
TRIP 11
V5DRV 10
VBST 14
TP 15
PC96
0.1U_0603_25V7K
1 2
PC95
4.7U_1206_25V6K
12
PR124
3K_0402_1%
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8V
+3VALW
+0.9VP
+3VS
+2.5VSP
+5VALW
+3VS
+1.8V
+1.5VSP
+5VALW
SYSON#<24,29,36>
SUSP#
<
30,32,36>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
0.9VP//1.5VSP/2.5VSP
43 46Tuesday, February 03, 2009
Compal Electronics, Inc.
2009/11/032008/11/03
KBKC0_KBYF0
PU9
APL5915KAI-TRL_SO8
GND
1
VOUT 4
POK
7
EN
8
VCNTL 6
VIN 5
VOUT 3
FB 2
VIN 9
PC115
4.7U_0805_6.3V6K
12
PR133
1.74K_0402_1%
12
PJ17
JUMP_43X79@
11
2
2
PR130
10K_0402_1%
1 2
PR126
2.15K_0402_1%
12
PR132
1.54K_0402_1%
12
PC109
0.01U_0402_25V7K
12
PC114
1U_0402_6.3V6K
12
PC119
22U_0805_6.3V6M
12
PR125
10K_0402_1%
1 2
PC117
0.01U_0402_25V7K
12
PC108
4.7U_0805_6.3V6K
12
PC121
0.1U_0402_16V7K
12
PC111
0.1U_0402_16V7K
12
PR129
1K_0402_1%
12
PC118
0.1U_0402_16V7K@
12
PR127
1K_0402_1%
12
G
D
S
PQ28
SSM3K7002F_SC59-3
@
2
13
PR185
47K_0402_5%
@
12
PC110
22U_0805_6.3V6M
12
PC107
1U_0402_6.3V6K
12
PC112
1U_0402_6.3V6K
12
PR131
0_0402_5%
@
1 2
PJ18
JUMP_43X79@
11
2
2
PU10
APL5331KAC-TRL_SO8
VOUT
4
NC 5
GND
2
VREF
3
VIN
1VCNTL 6
NC 7
NC 8
TP 9
PJ16
JUMP_43X79@
11
2
2
PR184
47K_0402_5%
@
12
PC120
10U_0805_6.3V6M
12
PC116
0.1U_0402_16V7K
12
PU11
APL5915KAI-TRL_SO8
GND
1
VOUT 4
POK
7
EN
8
VCNTL 6
VIN 5
VOUT 3
FB 2
VIN 9
PC113
4.7U_0805_6.3V6K
1 2
PR128
1K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BOOT0
FB_0
PHASE_NB
UGATE_NB
PHASE_NB
BOOT1
BOOT_NB
+CPU_CORE_1
+CPU_CORE_NB
ISN0
LGATE_NB
DIFF_1
UGATE_NB
BOOT_NB
LGATE0
ISP1
UGATE0
UGATE1
VSEN1
VSEN0
BOOT1
RTN0
PHASE0
LGATE1
PHASE1
PHASE1
PHASE0
UGATE0
BOOT0
ISN1
LGATE_NB
PHASE_NB
ISP0
LGATE0
UGATE1
LGATE1
ISN1
ISP1
+CPU_CORE_0
VW0
ISP0
ISN0
COMP0
VW1
COMP1FB_1
DIFF_0
RTN1 +CPU_CORE_1
CPU_B+
+CPU_CORE_0
CPU_B+
+CPU_CORE_NB
CPU_B+
CPU_B+
+5VS +3VS
B+
+5VS
+5VS
+1.8V
CPU_SVD<6>
CPU_SVC<6>
VR_ON<30>
H_PWRGD_L<19>
VGATE<30>
CPU_VDD0_FB_H<6>
CPU_VDD0_FB_L<6>
CPU_VDD1_FB_L<6>
CPU_VDD1_FB_H<6>
CPU_VDDNB_FB_H <6>
CPU_VDDNB_FB_L <6>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
+CPU_CORE
Custom
44 46
Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
+CPU_CORE_1
Design Current: 12.6A
Max current: 18A
OCP_min:24A
+VDDNB
Design Current: 2.1A
Max current: 3A
OCP_min:5A
+CPU_CORE_0
Design Current: 12.6A
Max current: 18A
OCP_min:24A
KBKC0_KBYF0
PR139
2_0603_5%
1 2
PR147
105K_0402_1%
12
PQ30
AO4712_SO8
3 6
5
7
8
2
4
1
PC149
1000P_0402_50V7K
12
PR148
10_0402_5%
1 2
PC155
2200P_0402_50V7K
12
PR177
54.9K_0402_1%
12
PR160
0_0402_5%
12
PL11
3.3UH_SIQB74B-3R3PF_5.9A_20%
1 2
PR180
54.9K_0402_1%
12
PC124
10U_1206_25V6M
12
PH4
10K_0603_5%_TSM1A103J4302RE
@
12
PC150
1200P_0402_50V7K
12
PR181
6.81K_0402_1%
12
+
PC130
220U_D2_4VM
1
2
PQ35
AO4456_SO8
3 6
5
7
8
2
4
1
PR179
1K_0402_5%
12
PR175
255_0402_1%
12
PC142
680P_0603_50V7K
12
PR170
4.02K_0402_1%
1 2
PQ36
AO4456_SO8
3 6
5
7
8
2
4
1
PR138
4.7_1206_5%
12
PC148
180P_0402_50V8J
12
PR165
0_0402_5%12
PR143
0_0402_5%
12
PQ32
AO4456_SO8
3 6
5
7
8
2
4
1
PC136
680P_0603_50V7K
12
PR198
100K_0402_5%
@
12
PR141
0_0402_5%
12
PC123
1200P_0402_50V7K
12
PR157
34.8K_0402_1%
12
PR192 0_0402_5% @
1 2
PR154
4.7_1206_5%
12
PL13
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
3
4
2
PC152
0.01U_0402_25V7K
12
PR145
0_0402_5%
12
PC132
0.1U_0603_25V7K
12
PR171
0_0402_5%
12
PC138
1U_0603_16V6K
12
PC140
10U_1206_25V6M
12
PR149
105K_0402_1%@
12
PR164
0_0402_5%12
PQ31
SI7686DP-T1-E3_SO8
3 5
2
4
1
PC143
0.1U_0402_16V7K
12
PC153
0.01U_0402_25V7K
12
PC127
1000P_0402_50V7K
12
PR161
10_0402_5%
12
PC157
2200P_0402_50V7K
12
PR167
10_0402_5%
1 2
PR172
10_0402_5%12
PR150
2.2_0603_5%
1 2
PR136
2.2_0603_5%
1 2
PC144
4700P_0402_25V7K
12
PR155
4.02K_0402_1%
1 2
PC156
2200P_0402_50V7K
12
PR135
2_0603_5%
1 2
PL12
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
3
4
2
PC141
0.22U_0603_10V7K
1 2
PR176
1K_0402_5%
12
PR134
44.2K_0402_1%
12
PR140
10_0402_5%
1 2
PR163
2.2_0603_5%
1 2
PC145
180P_0402_50V8J
12
PQ33
AO4456_SO8
3 6
5
7
8
2
4
1
PC133
10U_1206_25V6M
12
PC131
680P_0603_50V7K
12
PR137
22K_0402_1%
12
PR168
16.2K_0402_1%
1 2
PC122
33P_0402_50V8K
12
PQ29
AO4466_SO8
3 6
5
7
8
2
4
1
PR142
11.3K_0402_1%
12
PR146
10K_0402_1%@
12
PC135
0.22U_0603_10V7K
1 2
PR158
82.5K_0402_1%
12
PL10
HCB4532KF-800T90_1812
1 2
PC139
10U_1206_25V6M
12
PQ34
SI7686DP-T1-E3_SO8
3 5
2
4
1
PR152 0_0402_5%
12
PC134
10U_1206_25V6M
12
PR153 0_0402_5%
1 2
+
PC125
220U_25V_M
1
2
PR169
4.7_1206_5%
12
PC147
4700P_0402_25V7K
12
PR166
10_0402_5%
1 2
PR151
16.2K_0402_1%
1 2
PR178
6.81K_0402_1%
12
PH3
10K_0603_5%_TSM1A103J4302RE
@
12
PU12
ISL6265IRZ-T_QFN48_6X6~D
PWROK
3
SVD
4
OFS/VFIXEN
1
PGOOD
2
SVC
5
ENABLE
6
OCSET
8
VDIFF1
19
RTN1
17
VSEN0
15
VW1
22
RTN0
16
ISN0
14
VW0
12
COMP0
11
RBIAS
7
FB0
10
COMP1
21
ISP1
23
FB1
20
VSEN1
18
VDIFF0
9
ISN1
24
ISP0
13
BOOT1 25
UGATE1 26
PHASE1 27
PGND1 28
LGATE1 29
PVCC 30
LGATE0 31
PGND0 32
PHASE0 33
UGATE0 34
BOOT0 35
BOOT_NB 36
UGATE_NB 37
PHASE_NB 38
LGATE_NB 39
PGND_NB 40
OCSET_NB 41
RTN_NB 42
VSEN_NB 43
FSET_NB 44
COMP_NB 45
FB_NB 46
VCC 47
VIN 48
TP
49
PC154
0.01U_0402_25V7K
12
PR174
255_0402_1%
12
PC128
0.1U_0603_25V7K
12
PR156 0_0402_5%
12
PR173
10_0402_5%
@
12
PC146
1000P_0402_50V7K
12
PC129
0.22U_0603_10V7K
1 2
PR159
10_0402_5%
@
12
PC151
1200P_0402_50V7K
12
PR144
105K_0402_1%@
12
PC137
0.1U_0402_16V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.3
PIR List
Custom
45 46
Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 1
for PWR
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
KBKC0_KBYF0
0.1 to DVT
0.1
0.1
0.1
0.1
0.1
40 08, 12/24
Change PR38,PR39,PR108,PR112,PR136,PR150,PR163 from
SD013000080 to SD013220B80.
EMI request. EMI request.
EMI request. EMI request. 40 Add PC170,PC171,PC172,PC173,PC174 SE00000G880
S CER CAP 0.1U 25V K X5R 0402
EMI request. EMI request.
EMI request. EMI request.
39 Add PL15 SM010016410 S SUPPRE_ KC FBMA-L11-322513-
151LMA50T
41 Add PL14 SM010018210 S SUPPRE_ TAI-TECH HCB4532KF
-800T90 1812
Link CIS error. Link CIS error. 40
Change PQ9, PQ10, PQ12 from SB944070000
S TR AO4407 1P SO8 W/D to SB00000DL00
S TR AO4407A 1P SO8
Change PC30 from SGA19331360 S POLY C 330U 6.3V M
D3L ESR25M TPE H2.8 to SF000001G00
S_A-P_CAP 330U 6.3V M 6.3X5.7 LESR14M ME
cost down cost down
cost downcost down
cost downcost down
Change PC35 from SGA20151320 S POLY C 150U 6.3V M
D2E TPE ESR18 H1.8 to SF000001G00
S_A-P_CAP 330U 6.3V M 6.3X5.7 LESR14M ME
40
400.1
0.1
Change PC87, PC98 from SGA19331D00 S POLY C 330U 2.5V M
D2 TPE LESR15M H1.8 to SF000001G00 S_A-P_CAP 330U
6.3V M 6.3X5.7 LESR14M ME
41,
42
schematic update. schematic update. 0.1 44 Delete PR198 SD028100380 S RES 1/16W 100K +-5% 0402
to DVT08, 12/24
to DVT08, 12/24
to DVT08, 12/24
to DVT08, 12/24
to DVT08, 12/24
to DVT08, 12/24
to DVT08, 12/24
to DVT08, 12/24
layout space too small. layout space too small. 0.1 41 08, 12/24 to DVT
Change PQ23 from SB00000CG00 S TR AO4466
1N SO8 to SB00000BG00 S TR AO4932 2N SO8
Delete PQ25 SB00000AJ00 S TR AO4712 1N SO8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
KBYF0 LA-5051P
0.3
HW PIR
46 46Tuesday, February 03, 2009
2008/11/03 2009/11/03
Compal Electronics, Inc.
NO DATE PAGE MODIFICATION LIST PURPOSE
-----------------------------------------------------------------------------------------------------------------------------------------------
12/17 p.12 L3,L4 change from bead to 0 Ohm
12/17 P.17 Add R858~R865 for VGA HDMI
12/17 P.18 R374,R375,R376 change from 0 ohm to 10 ohm
12/17 P.20 R50 ,R53 change from JV70@ to @
12/17 P.20 R51 ,R52 change from JM70@ to JV70@
12/17 P.24 JP18 change from ESATA to USB port
12/17 P.25 R396 change from 10K to 0 Ohm
12/17 P.31 C905~C907 change from 0.1u to 33P
12/17 P.31 U19 change from mount to @ ; U18 change from @ to mount
12/17 P.32 D22 change from mount to @
12/18 P.24 SATA re-driver IC reserved
12/22 P.8 Add c124,c128,c151,c155,c55,c119,c113,c197 0.1uF EMI request
12/22 P.30 Add c40 c41 100P EMI request
12/22 P.30 Add c42,c43,c45 EMI request
12/22 P.37~p.45 upgrade PWR schematic
12/22 P.30 Add C65 22uF for CRT flicker
12/23 P.21 Delete R174,R175
01/16
01/16
01/16 P.16 Add r611,r612 connect to INVT_PWM
P.11 Add r347 connect to BKOFF#
Vari-Bright reserved
Vari-Bright reserved
P.30 add r288 BKOFF# 4.7k pull low
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