Compal LA 5154P Schematics. Www.s Manuals.com. R1.0 Schematics

User Manual: Motherboard Compal LA-5154P NAT02 - Schematics. Free.

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A

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E

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Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Cover Page

Custom

1 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Cover Page

Custom

1 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Cover Page

Custom

1 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Intel Arrandale Processor with DDRIII + Ibex Peak-M

NAT02 M/B Schematics Document

REV:1.0

Compal Confidential

2009-11-26

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Block Diagrams

Custom

2 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Block Diagrams

Custom

2 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Block Diagrams

Custom

2 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Block Diagram

Int.KBD &

BL

Dig. MIC

+5VS

USB[x]USB[x]

+VDDA

VCORE

CHARGER

DC IN

DC/DC Interface

1.5V/0.75V

BATT IN

3V/5V

Compal confidential

Model : NAT01

BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8

DDRIII-DIMM X2

+1.5V

+5VS

+3VS

FAN

SPI

Speaker

Azalia Codec

92HD73C

+3VS

S-HDD-2

+5VS

1.1VS_VTTPower Sequence

+3VS

Mini Card 1

+1.5VS

WWAN

CardBus

OZ888GS0

+3VS

Mini Card 3

+3VS

TV Tuner

+3VS

Mini Card 2

PCI Express BUS

+1.5VS+1.5VS

WLAN

USB[x]

IEEE1394

LVDS CONN

VGA

DPD

DP CONN

+5VS

CRT CONN

LVDS

8 IN 1 CONN

+3VS

Flash ROM

16Mx1sector

PCIE1PCIE2PCIE3

+LCDVDD

+3.3V_ALW

Charge USB/E-SATA

Ports X1

+5VALW

Right behind side.

Right Front Side.

Touch Pad

ENE KBC

+3VALW

+RTC_CELL

KB926QFD3

LPC BUS

+3VS

33MHz

+5VS

HDMI CONN

DPB

S-HDD-1

+5VS

E-ODD

+3VS

+5VS

AMP

B+

MAX9736A

Subwoofer

AMP

B+

MAX9736A

HeadPhone &

MIC Jack

+3VS

MAX4411x2

AMP

Express Card

Touch Screen

Camera

+1.8VS

Bluetooth

USB Port X1

+5V_ALW

USB Port1 X1

+5V_ALW

P.14

P.35

P.35

P.37

P.36

P.11,12

P.30

P.30

P.32

P.30

P.29 P.29 P.29

P.25 P.26

P.26

P.25

P.31

P.31

P.32P.32

P.28

P.28 P.27 P.27

P.40

P.33 P.47

P.45

P.46 P.44

P.42P.41

GFX_Core/1.05V 1.05V/1.8V

P.43P.48

To Card-reader subboard

To Card-reader

subboard

To Single USB

subboard

P.30

P.30

P.30

P.30

Processor

Arrandale

(UMA)

Intel

page 5,6,7,8,9,10

rPGA988A

6.4G/8.5G/10.6G

100M/133M/166M(CFD)

Dual Channel

1.5V DDRIII 800/1066/1333

Memory BUS(DDRIII)

133/120/100/96/14.318MHZ to PCH

48MHZ to CardReader

Clock Generator

IDT: 9LRS3199AKLFT

SILEGO: SLG8SP587

page 13

DMI x4

100MHz

1GB/s x4

3.3V 48MHz

USBx14

100MHz

SATA x 6

RJ45

RTL8111DL

+3VALW

P.24

port 4

port 5

port 1port 0

(GEN1 1.5GT/S ,GEN2 3GT/S)

page 06

CPU XDP

133MHz

PCH

Ibex Peak-M

Intel

page 15,16,17 18,19,

20,21,22,23

3.3V 24MHz

HD Audio

page 15

SPI

SPI ROM x1

32Mbit

100MHz

PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S)

+CPU_CORE

+1.05VS

+1.1VS_VTT

+0.75VS

+3VS

FFS

P.14

+3VS

SB3526

page 32

To Cap Sensor

subboard

100MHz

FDI x8

2.7GT/s

(UMA)

HDMI

Level Shift

P.36

P.25

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Notes List

B

3 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Notes List

B

3 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Notes List

B

3 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

USB Port Table

1101 0010b

ON OFF OFF

+0.75VS 0.75V switched power rail for DDR terminator

+RTCVCC RTC power

+1.5VS

+1.8VS 1.8V switched power rail

+5VS

+3VS

+5VALW

+3VALW 3.3V always on power rail

5V always on power rail

3.3V switched power rail

5V switched power rail

B+_BIAS B+ always on power rail ON ON*

ONON

ON

ON

EC SM Bus1 address

Device

OFF

DDR DIMM0

1001 000Xb

DDR DIMM1

1001 010Xb

+1.1VS_VTT 1.1V switched power rail (1.05 for AUB CPU) ON OFF OFF

1.5V switched power rail

+CPU_CORE

STATE SIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

Ibex SM Bus address

Device

Clock Generator

(9LRS3191AKLFT, SLG8SP585)

Address

Address Address

Voltage Rails

VIN

B+

+1.05VS

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

1.05V switched power rail for PCH

External PCI Devices

Device IDSEL#

REQ#/GNT#

Interrupts

ON

OFF

OFF

ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

OFFON

ON

ON

ON ON*

OFF

OFF

BTO Option Table

BTO Item BOM Structure

ON

ON

ON

ON

ON

ON

ON ON

ON

ON

ON

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

LOW

LOW LOW LOW LOW

LOWLOWLOW

LOW

LOW

LOW

HIGH HIGH HIGH HIGH

HIGHHIGHHIGH

HIGH

HIGH

HIGH

ON ON*

ON OFF OFF

+LAN_IO 3.3V power rail for LAN ON ON

S1 S3 S5

ON

ON OFF

N/A N/A N/A

N/AN/AN/A

Power Plane Description

EC SM Bus2 address

Device

Smart Battery

OFF

OFF

+1.5V 1.5V power rail for DDRIII ON ON OFF

0001 011X b

ON*

USB&ESATA

USB board

Reader/BD

USB Port

NC

Device

WLAN

WWAN

WPAN

Express

NC

Touch screen

Bluetooth

Camera

0

1

2

3

4

5

6

7

8

9

10

11

+1.1VS

1.1V power rail for PCIE of GUP

ON OFF OFF

+VGFX_CORE

Core voltage for Graphic ON OFFOFF

OFF

Free Fall Sensor

CPU XDP

PCH XDP

WWAN

WLAN

Express Card

XDCP_ISL90727

XDCP_ISL90728

0101 110Xb

0111 110Xb

Vcc 3.3V +/- 5%

100K +/- 1%Ra

Board ID

Rb V min

X00

X01

X02

MP

0

8.2K +/- 1%

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

0.503 V

0.819 V

0.538 V

0.875 V

AD_BID

V typ

AD_BID

V

AD_BID

max

18K +/- 1%

33K +/- 1%

56K +/- 1%

100K +/- 1%

200K +/- 1%

3.300 V

0 V 0.100 V

NC

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

1.185 V 1.264 V

Board ID / SKU ID Table for AD channel

VGA

M96

M96

M96

M96

Madison

Madison

Madison

Madison

X02

X01

X00

MP

remove

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Power Rail

Custom

4 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Power Rail

Custom

4 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Power Rail

Custom

4 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

BATTERY

B+

ADAPTER

65000mA

15000mA

12800mA

CHARGER

5700mA

8881mA

913mA

?mA

8400mA 2000mA 8677mA160mA 20mA

ISL62883HRZ-T

VR_ON

(PU13)

ISL62881HRZ-T

GFXVR_PWRGD

(PU22)

+CPU_CORE

+GFX_CORE

ISL6268CAZ-T

SYSON

(PU10) +1.5V RT9026

SUSP#

(PU10) +0.75VS

RT9025

(PU12) +1.1VS

TPS51117RGYR

SUSP#

(PU6) +1.05VS

TPS51427

SUSP#

(PU5)

+5VALW

ISL6268CAZ-T

(PU8) +1.1VS_VTT

15000mA

SUSP#

TPS51117RGYR

(PU7) +1.8VS

2500mA

SUSP#

RUNON

+5VS

SI4800BDY

(U22)

+CRT_VCC

FUSE

TPS2062ADR

(U17)

+5V_CHGUSB

USB_EN#

+3VALW

EN_EOL#

SI3456BDY

(Q3)

+LAN_IO

EN_EOL#

RTL8111DL

(U9)

+LAN_VDD

+1.05VS_CK505

0 Ohm

SUSP

FBM-11-160808-601-T

(L29)

+EC_AVCC

SUSP

SI4800BDY

(U21)

+3VS

+3VS_CK505

+DVDD_AUDIO

0 Ohm

0 Ohm

+3V_WLAN

0 Ohm

+AVDD_AUDIO

0 Ohm

0 Ohm

+5VS_KBL

+3V_WLAN

0 Ohm

VDDEN

SI2310BDS-T1-E3

(Q25)

+LCDVDD

EN_EOL#

SI2310BDS

(Q34)

+3VS_DELAY

SI4800BDY

(U25) +1.5VS

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PEG_IRCOMP

EXP_RBIAS

H_FDI_TXP0

H_FDI_TXP1

H_FDI_TXP2

H_FDI_TXP3

H_FDI_TXP4

H_FDI_TXP5

H_FDI_TXP6

H_FDI_TXP7

H_FDI_TXN0

H_FDI_TXN1

H_FDI_TXN2

H_FDI_TXN3

H_FDI_TXN4

H_FDI_TXN5

H_FDI_TXN6

H_FDI_TXN7

CFG3

CFG6

CFG5

CFG4

CFG7

CFG10

CFG9

CFG8

CFG11

CFG15

CFG14

CFG13

CFG12

CFG18

CFG17

CFG16

CFG0

CFG1

CFG2

DMI_PTX_HRX_N0<17>

DMI_PTX_HRX_N1<17>

DMI_PTX_HRX_N2<17>

DMI_PTX_HRX_N3<17>

DMI_PTX_HRX_P0<17>

DMI_PTX_HRX_P1<17>

DMI_PTX_HRX_P3<17>

DMI_PTX_HRX_P2<17>

DMI_HTX_PRX_N0<17>

DMI_HTX_PRX_N1<17>

DMI_HTX_PRX_N2<17>

DMI_HTX_PRX_N3<17>

DMI_HTX_PRX_P0<17>

DMI_HTX_PRX_P1<17>

DMI_HTX_PRX_P2<17>

DMI_HTX_PRX_P3<17>

H_FDI_FSYNC0<17>

H_FDI_FSYNC1<17>

H_FDI_INT<17>

H_FDI_LSYNC0<17>

H_FDI_LSYNC1<17>

H_FDI_TXN0<17>

H_FDI_TXN1<17>

H_FDI_TXN2<17>

H_FDI_TXN3<17>

H_FDI_TXN4<17>

H_FDI_TXN5<17>

H_FDI_TXN6<17>

H_FDI_TXN7<17>

H_FDI_TXP0<17>

H_FDI_TXP1<17>

H_FDI_TXP2<17>

H_FDI_TXP3<17>

H_FDI_TXP4<17>

H_FDI_TXP5<17>

H_FDI_TXP6<17>

H_FDI_TXP7<17>

H_DIMMA_REF<11>

H_DIMMB_REF<12>

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (1/6) DMI,FDI,PEG

Custom

5 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (1/6) DMI,FDI,PEG

Custom

5 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (1/6) DMI,FDI,PEG

Custom

5 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

*1:Disabled; No Physical Display Port

attached to Embedded Display Port

0:Enabled; An external Display Port

device is connected to the Embedded

Display Port

*:Default

CFG4 - Display Port Presence

*1 :Normal Operation

0 :Lane Numbers Reversed

15 -> 0, 14 -> 1, ...

CFG0 - PCI-Express Configuration Select

CFG3 - PCI-Express Static Lane Reversal

*1:Single PEG

0:Bifurcation enabled

UMA

Remove PCIE-16X

UMA

(SA_DIMM_VREF)

(SB_DIMM_VREF)

WW41 Recommend not pull down

PCIE2.0 Jitter is over on ES1

T101

PAD

@T101

PAD

@

R649

0_0402_5%~D

@

R649

0_0402_5%~D

@12

R212

0_0402_5%~D

@

R212

0_0402_5%~D

@

1 2

T97

PAD

@T97

PAD

@

R213

0_0402_5%~D

@

R213

0_0402_5%~D

@

1 2

T98

PAD

@T98

PAD

@

R1038

3.01K_0402_1%~D

@R1038

3.01K_0402_1%~D

@

1 2

PCI EXPRESS -- GRAPHICS

DMI Intel(R) FDI

JCPU1A

IC,AUB_CFD_rPGA,R0P9

CONN@

PCI EXPRESS -- GRAPHICS

DMI Intel(R) FDI

JCPU1A

IC,AUB_CFD_rPGA,R0P9

CONN@

DMI_RX#[0]

A24

DMI_RX#[1]

C23

DMI_RX#[2]

B22

DMI_RX#[3]

A21

DMI_RX[0]

B24

DMI_RX[1]

D23

DMI_RX[2]

B23

DMI_RX[3]

A22

DMI_TX#[0]

D24

DMI_TX#[1]

G24

DMI_TX#[2]

F23

DMI_TX#[3]

H23

DMI_TX[0]

D25

DMI_TX[1]

F24

DMI_TX[3]

G23 DMI_TX[2]

E23

FDI_TX#[0]

E22

FDI_TX#[1]

D21

FDI_TX#[2]

D19

FDI_TX#[3]

D18

FDI_TX#[4]

G21

FDI_TX#[5]

E19

FDI_TX#[6]

F21

FDI_TX#[7]

G18

FDI_TX[0]

D22

FDI_TX[1]

C21

FDI_TX[2]

D20

FDI_TX[3]

C18

FDI_TX[4]

G22

FDI_TX[5]

E20

FDI_TX[6]

F20

FDI_TX[7]

G19

FDI_FSYNC[0]

F17

FDI_FSYNC[1]

E17

FDI_INT

C17

FDI_LSYNC[0]

F18

FDI_LSYNC[1]

D17

PEG_ICOMPI B26

PEG_ICOMPO A26

PEG_RBIAS A25

PEG_RCOMPO B27

PEG_RX#[0] K35

PEG_RX#[1] J34

PEG_RX#[2] J33

PEG_RX#[3] G35

PEG_RX#[4] G32

PEG_RX#[5] F34

PEG_RX#[6] F31

PEG_RX#[7] D35

PEG_RX#[8] E33

PEG_RX#[9] C33

PEG_RX#[10] D32

PEG_RX#[11] B32

PEG_RX#[12] C31

PEG_RX#[13] B28

PEG_RX#[14] B30

PEG_RX#[15] A31

PEG_RX[0] J35

PEG_RX[1] H34

PEG_RX[2] H33

PEG_RX[3] F35

PEG_RX[4] G33

PEG_RX[5] E34

PEG_RX[6] F32

PEG_RX[7] D34

PEG_RX[8] F33

PEG_RX[9] B33

PEG_RX[10] D31

PEG_RX[11] A32

PEG_RX[12] C30

PEG_RX[13] A28

PEG_RX[14] B29

PEG_RX[15] A30

PEG_TX#[0] L33

PEG_TX#[1] M35

PEG_TX#[2] M33

PEG_TX#[3] M30

PEG_TX#[4] L31

PEG_TX#[5] K32

PEG_TX#[6] M29

PEG_TX#[7] J31

PEG_TX#[8] K29

PEG_TX#[9] H30

PEG_TX#[10] H29

PEG_TX#[11] F29

PEG_TX#[12] E28

PEG_TX#[13] D29

PEG_TX#[14] D27

PEG_TX#[15] C26

PEG_TX[0] L34

PEG_TX[1] M34

PEG_TX[2] M32

PEG_TX[3] L30

PEG_TX[4] M31

PEG_TX[5] K31

PEG_TX[6] M28

PEG_TX[7] H31

PEG_TX[8] K28

PEG_TX[9] G30

PEG_TX[10] G29

PEG_TX[11] F28

PEG_TX[12] E27

PEG_TX[13] D28

PEG_TX[14] C27

PEG_TX[15] C25

RESERVED

JCPU1E

IC,AUB_CFD_rPGA,R0P9

CONN@

RESERVED

JCPU1E

IC,AUB_CFD_rPGA,R0P9

CONN@

CFG[0]

AM30

CFG[1]

AM28

CFG[2]

AP31

CFG[3]

AL32

CFG[4]

AL30

CFG[5]

AM31

CFG[6]

AN29

CFG[7]

AM32

CFG[8]

AK32

CFG[9]

AK31

CFG[10]

AK28

CFG[11]

AJ28

CFG[12]

AN30

CFG[13]

AN32

CFG[14]

AJ32

CFG[15]

AJ29

CFG[16]

AJ30

CFG[17]

AK30

RSVD34 AH25

RSVD35 AK26

RSVD38 AJ26

RSVD_NCTF_42 AT3

RSVD39 AJ27

RSVD_NCTF_40 AP1

RSVD_NCTF_41 AT2

RSVD_NCTF_43 AR1

RSVD_TP_86

H16

RSVD45 AL28

RSVD46 AL29

RSVD47 AP30

RSVD48 AP32

RSVD49 AL27

RSVD50 AT31

RSVD51 AT32

RSVD52 AP33

RSVD53 AR33

RSVD_NCTF_54 AT33

RSVD_NCTF_55 AT34

RSVD_NCTF_56 AP35

RSVD_NCTF_57 AR35

RSVD58 AR32

RSVD_NCTF_30

C35

RSVD_NCTF_31

B35

RSVD_NCTF_28

A34

RSVD_NCTF_29

A33

RSVD27

J28 RSVD26

J29

RSVD16

A19 RSVD15

B19

RSVD17

A20

RSVD18

B20

RSVD20

T9 RSVD19

U9

RSVD22

AB9 RSVD21

AC9

RSVD_NCTF_23

C1

RSVD_NCTF_24

A3

RSVD_TP_66 AA5

RSVD_TP_67 AA4

RSVD_TP_68 R8

RSVD_TP_71 AA2

RSVD_TP_72 AA1

RSVD_TP_73 R9

RSVD_TP_69 AD3

RSVD_TP_74 AG7

RSVD_TP_70 AD2

RSVD_TP_75 AE3

RSVD_TP_76 V4

RSVD_TP_77 V5

RSVD_TP_78 N2

RSVD_TP_81 W3

RSVD_TP_82 W2

RSVD_TP_83 N3

RSVD_TP_79 AD5

RSVD_TP_84 AE5

RSVD_TP_80 AD7

RSVD_TP_85 AD9

RSVD36 AL26

RSVD_NCTF_37 AR2

RSVD1

AP25

RSVD2

AL25

RSVD3

AL24

RSVD4

AL22

RSVD5

AJ33

RSVD6

AG9

RSVD7

M27

RSVD8

L28

RSVD9

J17

RSVD10

H17

RSVD11

G25

RSVD12

G17

RSVD13

E31

RSVD14

E30

RSVD32 AJ13

RSVD33 AJ12

RSVD_TP_59 E15

RSVD_TP_60 F15

KEY A2

RSVD62 D15

RSVD63 C15

RSVD64 AJ15

RSVD65 AH15

VSS AP34

R613

750_0402_1%~D

R613

750_0402_1%~D

1 2

R1037

3.01K_0402_1%~D

@R1037

3.01K_0402_1%~D

@

1 2

R1035

3.01K_0402_1%~D @

R1035

3.01K_0402_1%~D @

1 2

R1036

3.01K_0402_1%~D @

R1036

3.01K_0402_1%~D @

1 2

T99

PAD

@T99

PAD

@

R648

0_0402_5%~D

@

R648

0_0402_5%~D

@12

T100

PAD

@T100

PAD

@

T102

PAD

@T102

PAD

@

R605

49.9_0402_1%~D

R605

49.9_0402_1%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_PWRGOOD_R

PBTN_OUT#_XDP

XDP_TDI

XDP_TMS

XDP_TRST#

XDP_TCLK

XDP_DBRESET#

CLK_CPU_XDP#

CLK_CPU_XDP

H_RESET#_R

XDP_TDO

H_CPUPWRGD

XDP_PREQ#

XDP_PRDY#

XDP_OBS0

XDP_OBS1

XDP_OBS2

XDP_OBS3

XDP_OBS5

XDP_OBS4

XDP_OBS7

XDP_OBS6

H_PWRGD_XDP

XDP_TMS

XDP_TRST#

XDP_TDI_R

XDP_PREQ#

XDP_TCLK

XDP_TDI_R XDP_TDI

XDP_TDOXDP_TDO_M

XDP_TDI_M

XDP_TDO_R

SMB_DATA_S3

SMB_CLK_S3

H_CPURST#

H_RESET#_R

SM_RCOMP_1

SM_RCOMP_2

H_COMP3

H_COMP1

H_PWRGD_XDP H_PWRGD_XDP_R

H_COMP0

H_COMP2

SKTOCC#_R

XDP_DBRESET#

PLT_RST#_R

H_CATERR#

H_PECI_R

PM_EXTTS#1_R

PM_EXTTS#0

CLK_CPU_BCLK_R

CLK_CPU_BCLK#_R

CLK_CPU_ITP_R

CLK_CPU_ITP#_R

H_PROCHOT#

XDP_OBS0XDP_OBS0_R

CLK_CPU_XDP

CLK_CPU_XDP#

H_THERMTRIP#_R

XDP_OBS1XDP_OBS1_R

XDP_OBS2XDP_OBS2_R

XDP_OBS3XDP_OBS3_R

XDP_OBS4XDP_OBS4_R

XDP_OBS5XDP_OBS5_R

XDP_OBS6XDP_OBS6_R

XDP_OBS7XDP_OBS7_R

H_CPURST#

CLK_CPU_DMI_R

CLK_CPU_DMI#_R

XDP_PRDY#

H_PM_SYNC_R

XDP_PREQ#

XDP_TCLK

XDP_TMS

XDP_TRST#

PM_DRAM_PWRGD_R

SM_RCOMP_0

XDP_TDI_R

XDP_TDO_R

XDP_TDO_M

XDP_TDI_M

XDP_DBR#_R

SM_RCOMP_1

SM_RCOMP_2

SM_RCOMP_0

H_COMP3

H_COMP1

H_COMP0

H_COMP2

H_CATERR#

H_PROCHOT#

H_CPURST#

H_CPUPWRGD_1

H_CPUPWRGD_0

PM_DRAM_PWRGD_R

CLK_CPU_DP_R

CLK_CPU_DP#_R

SMB_CLK_S3

SMB_DATA_S3

PM_DRAM_PWRGD_R

PBTN_OUT#<17,31>

H_VTTPWRGD<45>

PLT_RST#<19,24,27,28,30,31>

H_PECI<20>

H_THERMTRIP#<20>

PM_EXTTS#0_1 <11,12>

H_PM_SYNC<17>

H_CPUPWRGD<20>

PM_DRAM_PWRGD<17>

CLK_CPU_DMI# <16>

CLK_CPU_DMI <16>

CLK_CPU_BCLK# <20>

CLK_CPU_BCLK <20>

XDP_DBRESET# <17>

H_PROCHOT#<46>

PCI_PLTRST# <19>

CLK_CPU_DP# <16>

CLK_CPU_DP <16>

PCH_SMBDATA<11,12,16>

PCH_SMBCLK<11,12,16>

1.5V_PWRGD<44>

SM_DRAMRST# <11,12>

DDR_RST_GATE <11,12,20>

+1.1VS_VTT

+1.1VS_VTT

+3VS

+1.1VS_VTT

+1.1VS_VTT

+1.1VS_VTT

+1.1VS_VTT

+1.5V

+3VS

+3VS

+3VS

+3VS

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (2/6) CLK,JTAG

Custom

6 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (2/6) CLK,JTAG

Custom

6 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (2/6) CLK,JTAG

Custom

6 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

XDP Connector

Scan Chain

(Default)

CPU Only

GMCH Only

STUFF -> R653, R657, R662

NO STUFF -> R655, R660

STUFF -> R653, R655

NO STUFF -> R657, R660, R662

NO STUFF -> R653, R655, R657

STUFF -> R660, R662

JTAG MAPPING

[Calpella] Platform – Design Guide -

Addendum / Update – Rev. 1.52

Leakage Issue

WW51.4 CRB Board Rework/workaround- Rev 0.1

has changed the resistors in RSTIN#

R656 51_0402_1%~D@R656 51_0402_1%~D@

1 2

R607 0_0402_5%~DR607 0_0402_5%~D

1 2

R1064

1K_0402_5%~D

R1064

1K_0402_5%~D

1 2

R1044 0_0402_5%~DR1044 0_0402_5%~D

1 2

R1136

10K_0402_5%~D

R1136

10K_0402_5%~D

1 2

R1050 0_0402_5%~DR1050 0_0402_5%~D

1 2

R610 0_0402_5%~DR610 0_0402_5%~D

1 2

RU84 0_0402_5%~DRU84 0_0402_5%~D

1 2

R1055

3K_0402_1%~D

@R1055

3K_0402_1%~D

@

12

R668 0_0402_5%~DR668 0_0402_5%~D

1 2

JP8

SAMTE_BSH-030-01-L-D-ACONN@

JP8

SAMTE_BSH-030-01-L-D-ACONN@

GND0

1

OBSFN_A0

3

OBSFN_A1

5

GND2

7

OBSDATA_A0

9

OBSDATA_A1

11

GND4

13

OBSDATA_A2

15

OBSDATA_A3

17

GND6

19

OBSFN_B0

21

OBSFN_B1

23

GND8

25

OBSDATA_B0

27

OBSDATA_B1

29

GND10

31

OBSDATA_B2

33

OBSDATA_B3

35

GND12

37

PW RGOOD/HOOK0

39

HOOK1

41

VCC_OBS_AB

43

HOOK2

45

HOOK3

47

GND14

49

SDA

51

SCL

53

TCK1

55

TCK0

57

GND16

59

GND1 2

OBSFN_C0 4

OBSFN_C1 6

GND3 8

OBSDATA_C0 10

OBSDATA_C1 12

GND5 14

OBSDATA_C2 16

OBSDATA_C3 18

GND7 20

OBSFN_D0 22

OBSFN_D1 24

GND9 26

OBSDATA_D0 28

OBSDATA_D1 30

GND11 32

OBSDATA_D2 34

OBSDATA_D3 36

GND13 38

ITPCLK/HOOK4 40

ITPCLK#/HOOK5 42

VCC_OBS_CD 44

RESET#/HOOK6 46

DBR#/HOOK7 48

GND15 50

TD0 52

TRST# 54

TDI 56

TMS 58

GND17 60

RU83 0_0402_5%~DRU83 0_0402_5%~D

1 2

R1063

1K_0402_5%~D

R1063

1K_0402_5%~D

1 2

R1103

750_0402_1%~D

R1103

750_0402_1%~D

1 2

R1040 10K_0402_5%~DR1040 10K_0402_5%~D

1 2

R316

0_0402_5%~D

R316

0_0402_5%~D

1 2

R1042

0_0402_5%~D

R1042

0_0402_5%~D

1 2

R1062 68_0402_5%~D@R1062 68_0402_5%~D@

1 2

T5 PAD @

T5 PAD @

R1039

0_0402_5%~D

R1039

0_0402_5%~D

1 2

R1046 0_0402_5%~DR1046 0_0402_5%~D

1 2

R667 0_0402_5%~D

@

R667 0_0402_5%~D

@

1 2

R661 0_0402_5%~DR661 0_0402_5%~D

1 2

R1065

51_0402_1%~D

R1065

51_0402_1%~D

1 2

R290

1.5K_0402_1%~D

R290

1.5K_0402_1%~D

12

R650 49.9_0402_1%~DR650 49.9_0402_1%~D

1 2

R284 0_0402_5%~DR284 0_0402_5%~D

1 2

R1052

750_0402_1%~D

R1052

750_0402_1%~D

12

R263

0_0402_5%~D

R263

0_0402_5%~D

1 2

R363 0_0402_5%~DR363 0_0402_5%~D

1 2

R480

4.7K_0402_5%~D

R480

4.7K_0402_5%~D

1 2

R606 0_0402_5%~DR606 0_0402_5%~D

1 2

R663

0_0402_5%~D

R663

0_0402_5%~D

12

R1051 0_0402_5%~DR1051 0_0402_5%~D

1 2

R647 130_0402_1%~DR647 130_0402_1%~D

1 2

R669 51_0402_1%~D@R669 51_0402_1%~D@

1 2

G

D

S

Q53

2N7002LT1G_SOT23-3

G

D

S

Q53

2N7002LT1G_SOT23-3

2

1 3

T104 PAD @

T104 PAD @

R289

1.5K_0402_1%~D

R289

1.5K_0402_1%~D

1 2

R658 20_0402_1%~DR658 20_0402_1%~D

1 2

R300

0_0402_5%~D

R300

0_0402_5%~D

1 2

R662 0_0402_5%~D@R662 0_0402_5%~D@

1 2

R657 51_0402_1%~D@R657 51_0402_1%~D@

1 2

R654 0_0402_5%~DR654 0_0402_5%~D

1 2

G

D

S

Q52

2N7002LT1G_SOT23-3

G

D

S

Q52

2N7002LT1G_SOT23-3

2

1 3

R1045

0_0402_5%~D

R1045

0_0402_5%~D

1 2

T103 PAD @

T103 PAD @

R653 51_0402_1%~D@R653 51_0402_1%~D@

1 2

R362

0_0402_5%~D

@

R362

0_0402_5%~D

@

1 2

R645 100_0402_1%~DR645 100_0402_1%~D

1 2

R1099

4.7K_0402_5%~D

R1099

4.7K_0402_5%~D

1 2

G

D

S

Q36BSS138_SOT23~D

G

D

S

Q36BSS138_SOT23~D

2

13

R1054

1.1K_0402_1%~D

@R1054

1.1K_0402_1%~D

@

12

R1041 0_0402_5%~DR1041 0_0402_5%~D

1 2

R234 49.9_0402_1%~DR234 49.9_0402_1%~D

1 2

U69

74AHC1G08GW_SOT353-5~D

U69

74AHC1G08GW_SOT353-5~D

IN1

1

IN2

2

G

3

O4

P5

R1048 0_0402_5%~DR1048 0_0402_5%~D

1 2

R288 10K_0402_5%~DR288 10K_0402_5%~D

1 2

R646 24.9_0402_1%~DR646 24.9_0402_1%~D

1 2

C315

0.1U_0402_16V4Z~D

@

C315

0.1U_0402_16V4Z~D

@

1

2

R651 51_0402_1%~DR651 51_0402_1%~D

1 2

R1121 0_0402_5%~D@R1121 0_0402_5%~D@

1 2

CLOCKS

MISC THERMAL PWR MANAGEMENT

DDR3

MISC

JTAG & BPM

JCPU1B

IC,AUB_CFD_rPGA,R0P9

CONN@

CLOCKS

MISC THERMAL PWR MANAGEMENT

DDR3

MISC

JTAG & BPM

JCPU1B

IC,AUB_CFD_rPGA,R0P9

CONN@

SM_RCOMP[1] AM1

SM_RCOMP[2] AN1

SM_DRAMRST# F6

SM_RCOMP[0] AL1

BCLK# B16

BCLK A16

BCLK_ITP# AT30

BCLK_ITP AR30

PEG_CLK# D16

PEG_CLK E16

DPLL_REF_SSCLK# A17

DPLL_REF_SSCLK A18

CATERR#

AK14

COMP3

AT23

PECI

AT15

PROCHOT#

AN26

THERMTRIP#

AK15

RESET_OBS#

AP26

VCCPW RGOOD_1

AN14

VCCPW RGOOD_0

AN27

SM_DRAMPW ROK

AK13

VTTPW RGOOD

AM15

RSTIN#

AL14

PM_EXT_TS#[0] AN15

PM_EXT_TS#[1] AP15

PRDY# AT28

PREQ# AP27

TCK AN28

TMS AP28

TRST# AT27

TDI AT29

TDO AR27

TDI_M AR29

TDO_M AP29

DBR# AN25

BPM#[0] AJ22

BPM#[1] AK22

BPM#[2] AK24

BPM#[3] AJ24

BPM#[4] AJ25

BPM#[5] AH22

BPM#[6] AK23

BPM#[7] AH23

COMP2

AT24

PM_SYNC

AL15

TAPPW RGOOD

AM26

COMP1

G16

COMP0

AT26

SKTOCC#

AH24

R1061 68_0402_5%~DR1061 68_0402_5%~D

1 2

R1053 49.9_0402_1%~DR1053 49.9_0402_1%~D

1 2

R1060 0_0402_5%~DR1060 0_0402_5%~D

1 2

R1043

0_0402_5%~D

R1043

0_0402_5%~D

1 2

R659 20_0402_1%~DR659 20_0402_1%~D

1 2

C1142

0.1U_0402_10V6K~D

C1142

0.1U_0402_10V6K~D

1 2

R1049 0_0402_5%~DR1049 0_0402_5%~D

1 2

R1047 0_0402_5%~DR1047 0_0402_5%~D

1 2

R609 0_0402_5%~DR609 0_0402_5%~D

1 2

R655 0_0402_5%~DR655 0_0402_5%~D

1 2

R365

1K_0402_5%~D

R365

1K_0402_5%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_D63

DDR_A_D62

DDR_A_D8

DDR_A_D5

DDR_A_D4

DDR_A_D3

DDR_A_D7

DDR_A_D6

DDR_A_D59

DDR_A_D58

DDR_A_D57

DDR_A_D56

DDR_A_D47

DDR_A_D46

DDR_A_D43

DDR_A_D42

DDR_A_D41

DDR_A_D40

DDR_A_D45

DDR_A_D44

DDR_A_D39

DDR_A_D38

DDR_A_D35

DDR_A_D34

DDR_A_D33

DDR_A_D32

DDR_A_D37

DDR_A_D36

DDR_A_D61

DDR_A_D60

DDR_A_D2

DDR_A_D1

DDR_A_D0

DDR_A_D55

DDR_A_D54

DDR_A_D51

DDR_A_D50

DDR_A_D49

DDR_A_D48

DDR_A_D53

DDR_A_D52

DDR_A_D31

DDR_A_D30

DDR_A_D27

DDR_A_D26

DDR_A_D25

DDR_A_D24

DDR_A_D15

DDR_A_D14

DDR_A_D11

DDR_A_D10

DDR_A_D9

DDR_A_D13

DDR_A_D12

DDR_A_D29

DDR_A_D28

DDR_A_D23

DDR_A_D22

DDR_A_D19

DDR_A_D18

DDR_A_D17

DDR_A_D16

DDR_A_D21

DDR_A_D20

DDR_A_BS2

DDR_A_BS1

DDR_A_BS0

DDR_A_WE#

DDR_A_RAS#

DDR_A_CAS#

DDR_A_MA14

DDR_A_MA0

DDR_A_MA1

DDR_A_MA4

DDR_A_MA2

DDR_A_MA3

DDR_A_MA5

DDR_A_MA6

DDR_A_MA7

DDR_A_MA8

DDR_A_MA9

DDR_A_MA12

DDR_A_MA13

DDR_A_MA11

DDR_A_MA10

DDR_A_MA15

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#3

DDR_A_DQS#2

DDR_A_DQS#5

DDR_A_DQS#4

DDR_A_DQS#6

DDR_A_DQS#7

DDR_A_DQS0

DDR_A_DQS2

DDR_A_DQS3

DDR_A_DQS1

DDR_A_DQS4

DDR_A_DQS5

DDR_A_DQS6

DDR_A_DQS7

DDR_A_DM7

DDR_A_DM5

DDR_A_DM2

DDR_A_DM1

DDR_A_DM6

DDR_A_DM4

DDR_A_DM0

DDR_A_DM3

DDR_B_D32

DDR_B_D33

DDR_B_D36

DDR_B_D37

DDR_B_D38

DDR_B_D39

DDR_B_D48

DDR_B_D49

DDR_B_D52

DDR_B_D53

DDR_B_D54

DDR_B_D55

DDR_B_D50

DDR_B_D51

DDR_B_D56

DDR_B_D57

DDR_B_D60

DDR_B_D61

DDR_B_D62

DDR_B_D63

DDR_B_D58

DDR_B_D59

DDR_B_D34

DDR_B_D35

DDR_B_D40

DDR_B_D41

DDR_B_D44

DDR_B_D45

DDR_B_D46

DDR_B_D47

DDR_B_D42

DDR_B_D43

DDR_B_D0

DDR_B_D1

DDR_B_D4

DDR_B_D5

DDR_B_D6

DDR_B_D7

DDR_B_D16

DDR_B_D17

DDR_B_D20

DDR_B_D21

DDR_B_D22

DDR_B_D23

DDR_B_D18

DDR_B_D19

DDR_B_D24

DDR_B_D25

DDR_B_D28

DDR_B_D29

DDR_B_D30

DDR_B_D31

DDR_B_D26

DDR_B_D27

DDR_B_D2

DDR_B_D3

DDR_B_D8

DDR_B_D9

DDR_B_D12

DDR_B_D13

DDR_B_D14

DDR_B_D15

DDR_B_D10

DDR_B_D11

DDR_B_MA2

DDR_B_MA3

DDR_B_MA10

DDR_B_MA11

DDR_B_MA8

DDR_B_MA9

DDR_B_MA0

DDR_B_MA6

DDR_B_MA7

DDR_B_MA1

DDR_B_MA4

DDR_B_MA5

DDR_B_MA14

DDR_B_MA12

DDR_B_MA13

DDR_B_MA15

DDR_B_DQS#5

DDR_B_DQS#7

DDR_B_DQS#3

DDR_B_DQS#4

DDR_B_DQS#1

DDR_B_DQS#0

DDR_B_DQS#6

DDR_B_DQS#2

DDR_B_DQS7

DDR_B_DQS0

DDR_B_DQS5

DDR_B_DQS4

DDR_B_DQS3

DDR_B_DQS6

DDR_B_DQS2

DDR_B_DQS1

DDR_B_DM3

DDR_B_DM0

DDR_B_DM1

DDR_B_DM5

DDR_B_DM6

DDR_B_DM7

DDR_B_DM2

DDR_B_DM4

DDR_B_BS2

DDR_B_BS1

DDR_B_BS0

DDR_B_CAS#

DDR_B_WE#

DDR_B_RAS#

DDR_A_BS0<11>

DDR_A_BS1<11>

DDR_A_BS2<11>

DDR_A_CAS#<11>

DDR_A_RAS#<11>

DDR_A_WE#<11>

DDR_B_BS0<12>

DDR_B_BS1<12>

DDR_B_BS2<12>

DDR_B_CAS#<12>

DDR_B_RAS#<12> DDR_B_WE#<12>

DDR_A_CLK0 <11>

DDR_A_CLK1 <11>

DDR_B_CLK0 <12>

DDR_B_CLK1 <12>

DDR_A_CLK0# <11>

DDR_A_CLK1# <11>

DDR_B_CLK0# <12>

DDR_B_CLK1# <12>

DDR_A_CKE0 <11>

DDR_A_CKE1 <11>

DDR_B_CKE0 <12>

DDR_B_CKE1 <12>

DDR_A_CS0# <11>

DDR_A_CS1# <11>

DDR_B_CS0# <12>

DDR_B_CS1# <12>

DDR_A_ODT0 <11>

DDR_A_ODT1 <11>

DDR_B_ODT0 <12>

DDR_B_ODT1 <12>

DDR_B_MA[0..15]<12> DDR_B_DQS[0..7]<12>

DDR_B_DQS#[0..7]<12>

DDR_B_DM[0..7]<12>

DDR_B_D[0..63]<12>

DDR_A_D[0..63]<11>

DDR_A_DM[0..7]<11>

DDR_A_DQS#[0..7]<11>

DDR_A_DQS[0..7]<11>

DDR_A_MA[0..15]<11>

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (3/6) DDRIII

B

7 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (3/6) DDRIII

B

7 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (3/6) DDRIII

B

7 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

DDR SYSTEM MEMORY A

JCPU1C

IC,AUB_CFD_rPGA,R0P9

CONN@

DDR SYSTEM MEMORY A

JCPU1C

IC,AUB_CFD_rPGA,R0P9

CONN@

SA_BS[0]

AC3

SA_BS[1]

AB2

SA_BS[2]

U7

SA_CAS#

AE1

SA_RAS#

AB3

SA_WE#

AE9

SA_CK[0] AA6

SA_CK[1] Y6

SA_CK#[0] AA7

SA_CK#[1] Y5

SA_CKE[0] P7

SA_CKE[1] P6

SA_CS#[0] AE2

SA_CS#[1] AE8

SA_ODT[0] AD8

SA_ODT[1] AF9

SA_DM[0] B9

SA_DM[1] D7

SA_DM[2] H7

SA_DM[3] M7

SA_DM[4] AG6

SA_DM[5] AM7

SA_DM[6] AN10

SA_DM[7] AN13

SA_DQS[0] C8

SA_DQS#[0] C9

SA_DQS[1] F9

SA_DQS#[1] F8

SA_DQS[2] H9

SA_DQS#[2] J9

SA_DQS[3] M9

SA_DQS#[3] N9

SA_DQS[4] AH8

SA_DQS#[4] AH7

SA_DQS[5] AK10

SA_DQS#[5] AK9

SA_DQS[6] AN11

SA_DQS#[6] AP11

SA_DQS[7] AR13

SA_DQS#[7] AT13

SA_MA[0] Y3

SA_MA[1] W1

SA_MA[2] AA8

SA_MA[3] AA3

SA_MA[4] V1

SA_MA[5] AA9

SA_MA[6] V8

SA_MA[7] T1

SA_MA[8] Y9

SA_MA[9] U6

SA_MA[10] AD4

SA_MA[11] T2

SA_MA[12] U3

SA_MA[13] AG8

SA_MA[14] T3

SA_MA[15] V9

SA_DQ[0]

A10

SA_DQ[1]

C10

SA_DQ[2]

C7

SA_DQ[3]

A7

SA_DQ[4]

B10

SA_DQ[5]

D10

SA_DQ[6]

E10

SA_DQ[7]

A8

SA_DQ[8]

D8

SA_DQ[9]

F10

SA_DQ[10]

E6

SA_DQ[11]

F7

SA_DQ[12]

E9

SA_DQ[13]

B7

SA_DQ[14]

E7

SA_DQ[15]

C6

SA_DQ[16]

H10

SA_DQ[17]

G8

SA_DQ[18]

K7

SA_DQ[19]

J8

SA_DQ[20]

G7

SA_DQ[21]

G10

SA_DQ[22]

J7

SA_DQ[23]

J10

SA_DQ[24]

L7

SA_DQ[25]

M6

SA_DQ[26]

M8

SA_DQ[27]

L9

SA_DQ[28]

L6

SA_DQ[29]

K8

SA_DQ[30]

N8

SA_DQ[31]

P9

SA_DQ[32]

AH5

SA_DQ[33]

AF5

SA_DQ[34]

AK6

SA_DQ[35]

AK7

SA_DQ[36]

AF6

SA_DQ[37]

AG5

SA_DQ[38]

AJ7

SA_DQ[39]

AJ6

SA_DQ[40]

AJ10

SA_DQ[41]

AJ9

SA_DQ[42]

AL10

SA_DQ[43]

AK12

SA_DQ[44]

AK8

SA_DQ[45]

AL7

SA_DQ[46]

AK11

SA_DQ[47]

AL8

SA_DQ[48]

AN8

SA_DQ[49]

AM10

SA_DQ[50]

AR11

SA_DQ[51]

AL11

SA_DQ[52]

AM9

SA_DQ[53]

AN9

SA_DQ[54]

AT11

SA_DQ[55]

AP12

SA_DQ[56]

AM12

SA_DQ[57]

AN12

SA_DQ[58]

AM13

SA_DQ[59]

AT14

SA_DQ[60]

AT12

SA_DQ[61]

AL13

SA_DQ[62]

AR14

SA_DQ[63]

AP14

DDR SYSTEM MEMORY - B

JCPU1D

IC,AUB_CFD_rPGA,R0P9

CONN@

DDR SYSTEM MEMORY - B

JCPU1D

IC,AUB_CFD_rPGA,R0P9

CONN@

SB_BS[0]

AB1

SB_BS[1]

W5

SB_BS[2]

R7

SB_CAS#

AC5

SB_RAS#

Y7

SB_WE#

AC6

SB_CK[0] W8

SB_CK[1] V7

SB_CK#[0] W9

SB_CK#[1] V6

SB_CKE[0] M3

SB_CKE[1] M2

SB_CS#[0] AB8

SB_CS#[1] AD6

SB_ODT[0] AC7

SB_ODT[1] AD1

SB_DM[0] D4

SB_DM[1] E1

SB_DM[2] H3

SB_DM[3] K1

SB_DM[4] AH1

SB_DM[5] AL2

SB_DM[6] AR4

SB_DM[7] AT8

SB_DQS[4] AG2

SB_DQS#[4] AH2

SB_DQS[5] AL5

SB_DQS#[5] AL4

SB_DQS[6] AP5

SB_DQS#[6] AR5

SB_DQS[7] AR7

SB_DQS#[7] AR8

SB_DQS[0] C5

SB_DQS#[0] D5

SB_DQS[1] E3

SB_DQS#[1] F4

SB_DQS[2] H4

SB_DQS#[2] J4

SB_DQS[3] M5

SB_DQS#[3] L4

SB_MA[0] U5

SB_MA[1] V2

SB_MA[2] T5

SB_MA[3] V3

SB_MA[4] R1

SB_MA[5] T8

SB_MA[6] R2

SB_MA[7] R6

SB_MA[8] R4

SB_MA[9] R5

SB_MA[10] AB5

SB_MA[11] P3

SB_MA[12] R3

SB_MA[13] AF7

SB_MA[14] P5

SB_MA[15] N1

SB_DQ[0]

B5

SB_DQ[1]

A5

SB_DQ[2]

C3

SB_DQ[3]

B3

SB_DQ[4]

E4

SB_DQ[5]

A6

SB_DQ[6]

A4

SB_DQ[7]

C4

SB_DQ[8]

D1

SB_DQ[9]

D2

SB_DQ[10]

F2

SB_DQ[11]

F1

SB_DQ[12]

C2

SB_DQ[13]

F5

SB_DQ[14]

F3

SB_DQ[15]

G4

SB_DQ[16]

H6

SB_DQ[17]

G2

SB_DQ[18]

J6

SB_DQ[19]

J3

SB_DQ[20]

G1

SB_DQ[21]

G5

SB_DQ[22]

J2

SB_DQ[23]

J1

SB_DQ[24]

J5

SB_DQ[25]

K2

SB_DQ[26]

L3

SB_DQ[27]

M1

SB_DQ[28]

K5

SB_DQ[29]

K4

SB_DQ[30]

M4

SB_DQ[31]

N5

SB_DQ[32]

AF3

SB_DQ[33]

AG1

SB_DQ[34]

AJ3

SB_DQ[35]

AK1

SB_DQ[36]

AG4

SB_DQ[37]

AG3

SB_DQ[38]

AJ4

SB_DQ[39]

AH4

SB_DQ[40]

AK3

SB_DQ[41]

AK4

SB_DQ[42]

AM6

SB_DQ[43]

AN2

SB_DQ[44]

AK5

SB_DQ[45]

AK2

SB_DQ[46]

AM4

SB_DQ[47]

AM3

SB_DQ[48]

AP3

SB_DQ[49]

AN5

SB_DQ[50]

AT4

SB_DQ[51]

AN6

SB_DQ[52]

AN4

SB_DQ[53]

AN3

SB_DQ[54]

AT5

SB_DQ[55]

AT6

SB_DQ[56]

AN7

SB_DQ[57]

AP6

SB_DQ[58]

AP8

SB_DQ[59]

AT9

SB_DQ[60]

AT7

SB_DQ[61]

AP9

SB_DQ[62]

AR10

SB_DQ[63]

AT10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_VTTVID1

VCCSENSE_R

VSSSENSE_R

VCCSENSE

VSSSENSE

VSS_SENSE_VTT

H_PSI#

CPU_VID2

CPU_VID3

CPU_VID0

CPU_VID6

H_DPRSLPVR

CPU_VID4

CPU_VID5

CPU_VID1

H_PSI# <46>

CPU_VID0 <46>

CPU_VID1 <46>

CPU_VID2 <46>

CPU_VID3 <46>

CPU_VID4 <46>

CPU_VID5 <46>

CPU_VID6 <46>

H_DPRSLPVR <46>

VCCSENSE <46>

VSSSENSE <46>

VTT_SENSE <45>

IMVP_IMON <46>

H_VTTVID1 <45>

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+1.1VS_VTT

+1.1VS_VTT

+CPU_CORE

+1.1VS_VTT

+1.1VS_VTT

+CPU_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (4/6) PWR,Bypass

Custom

8 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (4/6) PWR,Bypass

Custom

8 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (4/6) PWR,Bypass

Custom

8 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

(Place these capacitors between inductor and socket on Bottom)

(Place these capacitors on CPU cavity, Bottom Layer)

(Place these capacitors on CPU cavity, Bottom Layer)

H_VTTVID1 = low, 1.1V

H_VTTVID1 = high, 1.05V

48A Continuous 18A

(Place these capacitors under CPU socket, top layer)

VTT Rail

Auburndale +1.1VS_VTT=1.05V

Clarksfield +1.1VS_VTT=1.1V

Peak 21A

WW15 MOW

R0.3 modify

close to CPU side.

CSC (Current Sense Configuration)

8/25

R1.0 modify

2X470uF

TOP side (under inductor)

4 x 470uF(4.5mohm@100kHz; 4.0mohm@SRF)

16X10uF 3m ohm/16

4X470uF 4m ohm/4

3m ohm/12

C,uF

MLCC 0805 X5R

+CPU-CORE

Decoupling

16X22uF

ESR, mohm

SPCAP,Polymer

Stuffing Option

+

C1012

470U_D2_2VM_R4.5M~OK

+

C1012

470U_D2_2VM_R4.5M~OK

1

2

R1075 1K_0402_1%~DR1075 1K_0402_1%~D

1 2

R1074 1K_0402_1%~DR1074 1K_0402_1%~D

1 2

C201

10U_0805_6.3V6M~D

C201

10U_0805_6.3V6M~D

1

2

C1042

22U_0805_6.3V6M~OK

C1042

22U_0805_6.3V6M~OK

1

2

+

C263

470U_D2_2VM_R4.5M~OK

@

+

C263

470U_D2_2VM_R4.5M~OK

@

1

2

C1041

22U_0805_6.3V6M~OK

C1041

22U_0805_6.3V6M~OK

1

2

R343 1K_0402_1%~D@R343 1K_0402_1%~D@

1 2

R608 0_0402_5%~DR608 0_0402_5%~D

1 2

C233

10U_0805_6.3V6M~D

C233

10U_0805_6.3V6M~D

1

2

C222

22U_0805_6.3V6M~OK

C222

22U_0805_6.3V6M~OK

1

2

R644 100_0402_1%~DR644 100_0402_1%~D

1 2

C1557 1000P_0402_50V7K~D@C1557 1000P_0402_50V7K~D@

1 2

+

C167

470U_D2_2VM_R4.5M~OK

@

+

C167

470U_D2_2VM_R4.5M~OK

@

1

2

C203

10U_0805_6.3V6M~D

C203

10U_0805_6.3V6M~D

1

2

R1078 1K_0402_1%~DR1078 1K_0402_1%~D

1 2

C232

10U_0805_6.3V6M~D

C232

10U_0805_6.3V6M~D

1

2

C1043

22U_0805_6.3V6M~OK

C1043

22U_0805_6.3V6M~OK

1

2

C213

10U_0805_6.3V6M~D

C213

10U_0805_6.3V6M~D

1

2

+

C533

470U_D2_2VM_R4.5M~OK

+

C533

470U_D2_2VM_R4.5M~OK

1

2

R1066 1K_0402_1%~DR1066 1K_0402_1%~D

1 2

POWER

CPU CORE SUPPLY

1.1V RAIL POWER

SENSE LINES

CPU VIDS

JCPU1F

IC,AUB_CFD_rPGA,R0P9

CONN@

POWER

CPU CORE SUPPLY

1.1V RAIL POWER

SENSE LINES

CPU VIDS

JCPU1F

IC,AUB_CFD_rPGA,R0P9

CONN@

ISENSE AN35

VTT_SENSE B15

PSI# AN33

VID[0] AK35

VID[1] AK33

VID[2] AK34

VID[3] AL35

VID[4] AL33

VID[5] AM33

VID[6] AM35

PROC_DPRSLPVR AM34

VTT_SELECT G15

VCC_SENSE AJ34

VSS_SENSE_VTT A15

VCC1

AG35

VCC2

AG34

VCC3

AG33

VCC4

AG32

VCC5

AG31

VCC6

AG30

VCC7

AG29

VCC8

AG28

VCC9

AG27

VCC10

AG26

VCC11

AF35

VCC12

AF34

VCC13

AF33

VCC14

AF32

VCC15

AF31

VCC16

AF30

VCC17

AF29

VCC18

AF28

VCC19

AF27

VCC20

AF26

VCC21

AD35

VCC22

AD34

VCC23

AD33

VCC24

AD32

VCC25

AD31

VCC26

AD30

VCC27

AD29

VCC28

AD28

VCC29

AD27

VCC30

AD26

VCC31

AC35

VCC32

AC34

VCC33

AC33

VCC34

AC32

VCC35

AC31

VCC36

AC30

VCC37

AC29

VCC38

AC28

VCC39

AC27

VCC40

AC26

VCC41

AA35

VCC42

AA34

VCC43

AA33

VCC44

AA32

VCC45

AA31

VCC46

AA30

VCC47

AA29

VCC48

AA28

VCC49

AA27

VCC50

AA26

VCC51

Y35

VCC52

Y34

VCC53

Y33

VCC54

Y32

VCC55

Y31

VCC56

Y30

VCC57

Y29

VCC58

Y28

VCC59

Y27

VCC60

Y26

VCC61

V35

VCC62

V34

VCC63

V33

VCC64

V32

VCC65

V31

VCC66

V30

VCC67

V29

VCC68

V28

VCC69

V27

VCC70

V26

VCC71

U35

VCC72

U34

VCC73

U33

VCC74

U32

VCC75

U31

VCC76

U30

VCC77

U29

VCC78

U28

VCC79

U27

VCC80

U26

VCC81

R35

VCC82

R34

VCC83

R33

VCC84

R32

VCC85

R31

VCC86

R30

VCC87

R29

VCC88

R28

VCC89

R27

VCC90

R26

VCC91

P35

VCC92

P34

VCC93

P33

VCC94

P32

VCC95

P31

VCC96

P30

VCC97

P29

VCC98

P28

VCC99

P27

VCC100

P26

VTT0_33 AF10

VTT0_34 AE10

VTT0_35 AC10

VTT0_36 AB10

VTT0_37 Y10

VTT0_38 W10

VTT0_39 U10

VTT0_40 T10

VTT0_41 J12

VTT0_42 J11

VTT0_1 AH14

VTT0_2 AH12

VTT0_3 AH11

VTT0_4 AH10

VTT0_5 J14

VTT0_6 J13

VTT0_7 H14

VTT0_8 H12

VTT0_9 G14

VTT0_10 G13

VTT0_11 G12

VTT0_12 G11

VTT0_13 F14

VTT0_14 F13

VTT0_15 F12

VTT0_16 F11

VTT0_17 E14

VTT0_18 E12

VTT0_19 D14

VTT0_20 D13

VTT0_21 D12

VTT0_22 D11

VTT0_23 C14

VTT0_24 C13

VTT0_25 C12

VTT0_26 C11

VTT0_27 B14

VTT0_28 B12

VTT0_29 A14

VTT0_30 A13

VTT0_31 A12

VTT0_32 A11

VSS_SENSE AJ35

VTT0_43 J16

VTT0_44 J15

C159

10U_0805_6.3V6M~D

C159

10U_0805_6.3V6M~D

1

2

C214

10U_0805_6.3V6M~D

C214

10U_0805_6.3V6M~D

1

2

C245

10U_0805_6.3V6M~D

C245

10U_0805_6.3V6M~D

1

2

+

C251

470U_D2_2VM_R4.5M~OK

+

C251

470U_D2_2VM_R4.5M~OK

1

2

C183

10U_0805_6.3V6M~D

C183

10U_0805_6.3V6M~D

1

2

+

C1011

330U_X_2VM_R6M~OK

@

+

C1011

330U_X_2VM_R6M~OK

@

1

2

C192

10U_0805_6.3V6M~D

C192

10U_0805_6.3V6M~D

1

2

R347 1K_0402_1%~DR347 1K_0402_1%~D

1 2

C1063

22U_0805_6.3V6M~OK

C1063

22U_0805_6.3V6M~OK

1

2

C1037

22U_0805_6.3V6M~OK

C1037

22U_0805_6.3V6M~OK

1

2

C1038

22U_0805_6.3V6M~OK

C1038

22U_0805_6.3V6M~OK

1

2

R1079 1K_0402_1%~D@R1079 1K_0402_1%~D@

1 2

+

C1010

330U_X_2VM_R6M~OK

+

C1010

330U_X_2VM_R6M~OK

1

2

C174

10U_0805_6.3V6M~D

C174

10U_0805_6.3V6M~D

1

2

C185

10U_0805_6.3V6M~D

C185

10U_0805_6.3V6M~D

1

2

R1073 1K_0402_1%~D@R1073 1K_0402_1%~D@

1 2

+

C1009

330U_X_2VM_R6M~OK

+

C1009

330U_X_2VM_R6M~OK

1

2

C195

10U_0805_6.3V6M~D

C195

10U_0805_6.3V6M~D

1

2C191

10U_0805_6.3V6M~D

C191

10U_0805_6.3V6M~D

1

2

R1070 1K_0402_1%~DR1070 1K_0402_1%~D

1 2

R348 1K_0402_1%~D@R348 1K_0402_1%~D@

1 2

R643 100_0402_1%~DR643 100_0402_1%~D

1 2

C212

10U_0805_6.3V6M~D

C212

10U_0805_6.3V6M~D

1

2

C200

10U_0805_6.3V6M~D

C200

10U_0805_6.3V6M~D

1

2

R1077 1K_0402_1%~D@R1077 1K_0402_1%~D@

1 2

C199

10U_0805_6.3V6M~D

C199

10U_0805_6.3V6M~D

1

2

C211

10U_0805_6.3V6M~D

C211

10U_0805_6.3V6M~D

1

2

R641 0_0402_5%~DR641 0_0402_5%~D

1 2

C1035

22U_0805_6.3V6M~OK

C1035

22U_0805_6.3V6M~OK

1

2

R1076 1K_0402_1%~D@R1076 1K_0402_1%~D@

1 2

C223

10U_0805_6.3V6M~D

C223

10U_0805_6.3V6M~D

1

2

R1069 1K_0402_1%~D@R1069 1K_0402_1%~D@

1 2

C190

10U_0805_6.3V6M~D

C190

10U_0805_6.3V6M~D

1

2

C1040

22U_0805_6.3V6M~OK

C1040

22U_0805_6.3V6M~OK

1

2

R1072 1K_0402_1%~DR1072 1K_0402_1%~D

1 2

C239

10U_0805_6.3V6M~D

C239

10U_0805_6.3V6M~D

1

2

C194

10U_0805_6.3V6M~D

C194

10U_0805_6.3V6M~D

1

2

C1034

22U_0805_6.3V6M~OK

C1034

22U_0805_6.3V6M~OK

1

2

R1080 1K_0402_1%~DR1080 1K_0402_1%~D

1 2

C208

10U_0805_6.3V6M~D

C208

10U_0805_6.3V6M~D

1

2

C1036

22U_0805_6.3V6M~OK

C1036

22U_0805_6.3V6M~OK

1

2

R1068 1K_0402_1%~DR1068 1K_0402_1%~D

1 2

C1062

22U_0805_6.3V6M~OK

C1062

22U_0805_6.3V6M~OK

1

2

C240

22U_0805_6.3V6M~OK

C240

22U_0805_6.3V6M~OK

1

2

C1039

22U_0805_6.3V6M~OK

C1039

22U_0805_6.3V6M~OK

1

2

+

C1044

470U_D2_2VM_R4.5M~OK

+

C1044

470U_D2_2VM_R4.5M~OK

1

2

R1067 1K_0402_1%~D@R1067 1K_0402_1%~D@

1 2

R1071 1K_0402_1%~D@R1071 1K_0402_1%~D@

1 2

R642 0_0402_5%~DR642 0_0402_5%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.8VS_VCCSFR

GFXVR_DPRSLPVR_R

VCC_AXG_SENSE <48>

VSS_AXG_SENSE <48>

GFXVR_VID_0 <48>

GFXVR_VID_1 <48>

GFXVR_VID_2 <48>

GFXVR_VID_3 <48>

GFXVR_VID_4 <48>

GFXVR_VID_5 <48>

GFXVR_VID_6 <48>

GFXVR_EN <48>

GFXVR_DPRSLPVR <48>

GFXVR_IMON <48>

+1.1VS_VTT

+1.8VS

+1.1VS_VTT

+1.1VS_VTT

+1.1VS_VTT

+VGFX_CORE

+1.5V_CPU_DDR +1.5V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (5/6) PWR

Custom

9 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (5/6) PWR

Custom

9 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (5/6) PWR

Custom

9 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

15A

3A

0.6A

UMA

UMA

11/17 follow Intel suggest to change RU93 to 470 ohm

C1033

0.1U_0402_16V7K~D

C1033

0.1U_0402_16V7K~D

1 2

C158

22U_0805_6.3V6M~OK

C158

22U_0805_6.3V6M~OK

1

2

C180

2.2U_0603_6.3V6K~D

C180

2.2U_0603_6.3V6K~D

1

2

C1143

0.1U_0402_16V7K~D

C1143

0.1U_0402_16V7K~D

1 2

C179

22U_0805_6.3V6M~OK

C179

22U_0805_6.3V6M~OK

1

2

C1144

0.1U_0402_16V7K~D

C1144

0.1U_0402_16V7K~D

1 2

C202

1U_0402_6.3V4Z~D

C202

1U_0402_6.3V4Z~D

1

2

CU5

22U_0805_6.3V6M~OK

CU5

22U_0805_6.3V6M~OK

1

2

C165

22U_0805_6.3V6M~OK

C165

22U_0805_6.3V6M~OK

1

2

CU6

10U_0805_6.3V6M~D

CU6

10U_0805_6.3V6M~D

1

2

C184

22U_0805_6.3V6M~OK

C184

22U_0805_6.3V6M~OK

1

2

+

CU51

330U_X_2VM_R6M~OK

@

+

CU51

330U_X_2VM_R6M~OK

@

1

2

C175

1U_0402_6.3V4Z~D

C175

1U_0402_6.3V4Z~D

1

2

C1145

0.1U_0402_16V7K~D

C1145

0.1U_0402_16V7K~D

1 2

C193

1U_0402_6.3V4Z~D

C193

1U_0402_6.3V4Z~D

1

2

CU4

22U_0805_6.3V6M~OK

CU4

22U_0805_6.3V6M~OK

1

2

C178

22U_0805_6.3V6M~OK

C178

22U_0805_6.3V6M~OK

1

2

C160

10U_0805_6.3V6M~D

C160

10U_0805_6.3V6M~D

1

2

C224

22U_0805_6.3V6M~OK

C224

22U_0805_6.3V6M~OK

1

2

C177

22U_0805_6.3V6M~OK

C177

22U_0805_6.3V6M~OK

1

2

C196

1U_0402_6.3V4Z~D

C196

1U_0402_6.3V4Z~D

1

2

RU1 0_0402_5%~DRU1 0_0402_5%~D

1 2

PJP12

JUMP_43X118@

PJP12

JUMP_43X118@

1

122

C216

1U_0402_6.3V4Z~D

C216

1U_0402_6.3V4Z~D

1

2

R228

0.022_0805_1%~OK

R228

0.022_0805_1%~OK

1 2

PJP13

JUMP_43X118@

PJP13

JUMP_43X118@

1

122

RU93 470_0402_5%~DRU93 470_0402_5%~D

1 2

+

CU52

330U_X_2VM_R6M~OK

+

CU52

330U_X_2VM_R6M~OK

1

2

C209

1U_0402_6.3V4Z~D

C209

1U_0402_6.3V4Z~D

1

2

C168

4.7U_0805_10V4Z~D

C168

4.7U_0805_10V4Z~D

1

2

C176

22U_0805_6.3V6M~OK

C176

22U_0805_6.3V6M~OK

1

2

PJP14

JUMP_43X118@

PJP14

JUMP_43X118@

1

122

+

C250

330U_D2_2V_Y~OK

+

C250

330U_D2_2V_Y~OK

1

2

POWER

GRAPHICS VIDs

GRAPHICS

DDR3 - 1.5V RAILS

FDI PEG & DMI

SENSE

LINES

1.1V1.8V

JCPU1G

IC,AUB_CFD_rPGA,R0P9

CONN@

POWER

GRAPHICS VIDs

GRAPHICS

DDR3 - 1.5V RAILS

FDI PEG & DMI

SENSE

LINES

1.1V1.8V

JCPU1G

IC,AUB_CFD_rPGA,R0P9

CONN@

GFX_VID[0] AM22

GFX_VID[1] AP22

GFX_VID[2] AN22

GFX_VID[3] AP23

GFX_VID[4] AM23

GFX_VID[5] AP24

GFX_VID[6] AN24

GFX_VR_EN AR25

GFX_DPRSLPVR AT25

GFX_IMON AM24

VAXG_SENSE AR22

VSSAXG_SENSE AT22

VAXG1

AT21

VAXG2

AT19

VAXG3

AT18

VAXG4

AT16

VAXG5

AR21

VAXG6

AR19

VAXG7

AR18

VAXG8

AR16

VAXG9

AP21

VAXG10

AP19

VAXG11

AP18

VAXG12

AP16

VAXG13

AN21

VAXG14

AN19

VAXG15

AN18

VAXG16

AN16

VAXG17

AM21

VAXG18

AM19

VAXG19

AM18

VAXG20

AM16

VAXG21

AL21

VAXG22

AL19

VAXG23

AL18

VAXG24

AL16

VAXG25

AK21

VAXG26

AK19

VAXG27

AK18

VAXG28

AK16

VAXG29

AJ21

VAXG30

AJ19

VAXG31

AJ18

VAXG32

AJ16

VAXG33

AH21

VAXG34

AH19

VAXG35

AH18

VAXG36

AH16

VTT1_45

J24

VTT1_46

J23

VTT1_47

H25

VTT1_48

K26

VTT1_49

J27

VTT1_50

J26

VTT1_51

J25

VTT1_52

H27

VTT1_53

G28

VTT1_54

G27

VTT1_55

G26

VTT1_56

F26

VTT1_57

E26

VTT1_58

E25

VDDQ1 AJ1

VDDQ2 AF1

VDDQ3 AE7

VDDQ4 AE4

VDDQ5 AC1

VDDQ6 AB7

VDDQ7 AB4

VDDQ8 Y1

VDDQ9 W7

VDDQ10 W4

VDDQ11 U1

VDDQ12 T7

VDDQ13 T4

VDDQ14 P1

VDDQ15 N7

VDDQ16 N4

VDDQ17 L1

VDDQ18 H1

VTT0_59 P10

VTT0_60 N10

VTT0_61 L10

VTT0_62 K10

VCCPLL1 L26

VCCPLL2 L27

VCCPLL3 M26

VTT1_63 J22

VTT1_64 J20

VTT1_65 J18

VTT1_66 H21

VTT1_67 H20

VTT1_68 H19

CU1

10U_0805_6.3V6M~D

CU1

10U_0805_6.3V6M~D

1

2

C182

1U_0402_6.3V4Z~D

C182

1U_0402_6.3V4Z~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (6/6) VSS

Custom

10 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (6/6) VSS

Custom

10 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PROCESSOR (6/6) VSS

Custom

10 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

VSS

NCTF

JCPU1I

IC,AUB_CFD_rPGA,R0P9

CONN@

VSS

NCTF

JCPU1I

IC,AUB_CFD_rPGA,R0P9

CONN@

VSS161

K27

VSS162

K9

VSS163

K6

VSS164

K3

VSS165

J32

VSS166

J30

VSS167

J21

VSS168

J19

VSS169

H35

VSS170

H32

VSS171

H28

VSS172

H26

VSS173

H24

VSS174

H22

VSS175

H18

VSS176

H15

VSS177

H13

VSS178

H11

VSS179

H8

VSS180

H5

VSS181

H2

VSS182

G34

VSS183

G31

VSS184

G20

VSS185

G9

VSS186

G6

VSS187

G3

VSS188

F30

VSS189

F27

VSS190

F25

VSS191

F22

VSS192

F19

VSS193

F16

VSS194

E35

VSS195

E32

VSS196

E29

VSS197

E24

VSS198

E21

VSS199

E18

VSS200

E13

VSS201

E11

VSS202

E8

VSS203

E5

VSS204

E2

VSS205

D33

VSS206

D30

VSS207

D26

VSS208

D9

VSS209

D6

VSS210

D3

VSS211

C34

VSS212

C32

VSS213

C29

VSS214

C28

VSS215

C24

VSS216

C22

VSS217

C20

VSS218

C19

VSS219

C16

VSS220

B31

VSS221

B25

VSS222

B21

VSS223

B18

VSS224

B17

VSS225

B13

VSS226

B11

VSS227

B8

VSS228

B6

VSS229

B4

VSS230

A29

VSS_NCTF1 AT35

VSS_NCTF2 AT1

VSS_NCTF3 AR34

VSS_NCTF4 B34

VSS_NCTF5 B2

VSS_NCTF6 B1

VSS_NCTF7 A35

VSS231

A27

VSS232

A23

VSS233

A9

VSS

JCPU1H

IC,AUB_CFD_rPGA,R0P9

CONN@

VSS

JCPU1H

IC,AUB_CFD_rPGA,R0P9

CONN@

VSS1

AT20

VSS2

AT17

VSS3

AR31

VSS4

AR28

VSS5

AR26

VSS6

AR24

VSS7

AR23

VSS8

AR20

VSS9

AR17

VSS10

AR15

VSS11

AR12

VSS12

AR9

VSS13

AR6

VSS14

AR3

VSS15

AP20

VSS16

AP17

VSS17

AP13

VSS18

AP10

VSS19

AP7

VSS20

AP4

VSS21

AP2

VSS22

AN34

VSS23

AN31

VSS24

AN23

VSS25

AN20

VSS26

AN17

VSS27

AM29

VSS28

AM27

VSS29

AM25

VSS30

AM20

VSS31

AM17

VSS32

AM14

VSS33

AM11

VSS34

AM8

VSS35

AM5

VSS36

AM2

VSS37

AL34

VSS38

AL31

VSS39

AL23

VSS40

AL20

VSS41

AL17

VSS42

AL12

VSS43

AL9

VSS44

AL6

VSS45

AL3

VSS46

AK29

VSS47

AK27

VSS48

AK25

VSS49

AK20

VSS50

AK17

VSS51

AJ31

VSS52

AJ23

VSS53

AJ20

VSS54

AJ17

VSS55

AJ14

VSS56

AJ11

VSS57

AJ8

VSS58

AJ5

VSS59

AJ2

VSS60

AH35

VSS61

AH34

VSS62

AH33

VSS63

AH32

VSS64

AH31

VSS65

AH30

VSS66

AH29

VSS67

AH28

VSS68

AH27

VSS69

AH26

VSS70

AH20

VSS71

AH17

VSS72

AH13

VSS73

AH9

VSS74

AH6

VSS75

AH3

VSS76

AG10

VSS77

AF8

VSS78

AF4

VSS79

AF2

VSS80

AE35

VSS81 AE34

VSS82 AE33

VSS83 AE32

VSS84 AE31

VSS85 AE30

VSS86 AE29

VSS87 AE28

VSS88 AE27

VSS89 AE26

VSS90 AE6

VSS91 AD10

VSS92 AC8

VSS93 AC4

VSS94 AC2

VSS95 AB35

VSS96 AB34

VSS97 AB33

VSS98 AB32

VSS99 AB31

VSS100 AB30

VSS101 AB29

VSS102 AB28

VSS103 AB27

VSS104 AB26

VSS105 AB6

VSS106 AA10

VSS107 Y8

VSS108 Y4

VSS109 Y2

VSS110 W35

VSS111 W34

VSS112 W33

VSS113 W32

VSS114 W31

VSS115 W30

VSS116 W29

VSS117 W28

VSS118 W27

VSS119 W26

VSS120 W6

VSS121 V10

VSS122 U8

VSS123 U4

VSS124 U2

VSS125 T35

VSS126 T34

VSS127 T33

VSS128 T32

VSS129 T31

VSS130 T30

VSS131 T29

VSS132 T28

VSS133 T27

VSS134 T26

VSS135 T6

VSS136 R10

VSS137 P8

VSS138 P4

VSS139 P2

VSS140 N35

VSS141 N34

VSS142 N33

VSS143 N32

VSS144 N31

VSS145 N30

VSS146 N29

VSS147 N28

VSS148 N27

VSS149 N26

VSS150 N6

VSS151 M10

VSS152 L35

VSS153 L32

VSS154 L29

VSS155 L8

VSS156 L5

VSS157 L2

VSS158 K34

VSS159 K33

VSS160 K30

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_D12

DDR_A_CKE0

DDR_A_D59

DDR_A_D6

DDR_A_MA3

SMBCLK

DDR_A_CS1#

DDR_A_D39

DDR_A_BS1

DDR_A_DQS0

DDR_A_WE#

DDR_A_MA7

DDR_A_MA0

DDR_A_DM2

DDR_A_DM1

DDR_A_DQS7

DDR_A_D0

DDR_A_D57

DDR_A_D46

DDR_A_D28

DDR_A_DM0

DDR_A_D19

DDR_A_DQS#5

DDR_A_D51

DDR_A_D4

DDR_A_DM4

DDR_A_D30

DDR_A_DQS2

DDR_A_D44DDR_A_D44

DDR_A_RAS#

DDR_A_D33

DDR_A_D58

DDR_A_DM5

DDR_A_DQS3

DDR_A_MA8

DDR_A_CS0#

DDR_A_D10

DDR_A_MA6

DDR_A_D3

DDR_A_MA10

DDR_A_DQS#7

DDR_A_D1

DDR_A_DQS#6

DDR_A_D40

DDR_A_MA9

DDR_A_D16

DDR_A_D29

DDR_A_DQS#4

DDR_A_D52

DDR_A_DM3

DDR_A_DQS5

DDR_A_D54

DDR_A_D49

DDR_A_BS2

DDR_A_D45

DDR_A_D9

DDR_A_DM7

DDR_A_D7

DDR_A_MA1

DDR_A_D13

DDR_A_D20

DDR_A_D60

DDR_A_BS0

DDR_A_CAS#

DDR_VREF_CA_DIMMA

DDR_A_ODT0

DDR_A_D37

DDR_A_MA5

DDR_A_DQS#1

DDR_A_MA14

DDR_A_D55

DDR_A_MA4

DDR_A_D21

DDR_A_D62

DDR_A_D24

DDR_A_D15

DDR_A_D23

DDR_A_D56

DDR_A_D53

DDR_A_D47

DDR_A_D18

DDR_A_ODT1

DDR_A_D43

DDR_A_D34

DDR_A_CLK1

DDR_A_CLK1#

DDR_A_D48

SMBDATA

DDR_A_DQS#2

DDR_A_D11

DDR_A_D38

DDR_A_CLK0

DDR_A_CLK0#

DDR_A_DQS#3

DDR_A_D32

DDR_A_D8

DDR_A_DQS1

DDR_A_MA13

DDR_A_MA11

DDR_A_D50

DDR_A_D61

DDR_A_MA2

DDR_A_D41

DDR_A_D17

DDR_A_D36

DDR_A_D26

DDR_A_D63

DDR_A_D2

DDR_A_D5

DDR_A_D22

DDR_A_D25

DDR_A_DQS6

DDR_A_D35

DDR_A_D14

DDR_A_MA12

DDR_A_DQS#0

DDR_A_DQS4

DDR_A_DM6

DDR_A_D42

DDR_A_CKE1

PM_EXTTS#0_1

DDR_A_MA15

+V_DDR3_DIMMA_REF

PP_S4GT_Q_0

PP_S4GT

VREF_RW_POT0

PCH_SMBDATA

VREF_POT0_R

PCH_SMBCLK

PP_S4GT

VREF_OPAMP_POT0

VREF_POT0_R

VREF_DQA

PCH_SMBDATA

PCH_SMBCLK

DDR_A_D27 DDR_A_D31

+V_DDR3_DIMMA_REF2

SM_DRAMRST#

DDR_A_CKE0<7>

DDR_A_CS1#<7>

DDR_A_BS1 <7>

DDR_A_WE#<7>

DDR_A_RAS# <7>

SM_DRAMRST# <6,12>

DDR_A_CS0# <7>

DDR_A_BS2<7>

DDR_A_BS0<7>

DDR_A_CAS#<7> DDR_A_ODT0 <7>

DDR_A_ODT1 <7>

DDR_A_CLK1# <7>

DDR_A_CLK1 <7>

DDR_A_CLK0<7>

DDR_A_CLK0#<7>

DDR_A_CKE1 <7>

SMBDATA <12,13,14,16>

SMBCLK <12,13,14,16>

H_DIMMA_REF<5>

PP_S4GT<12>

PM_SLP_S4#<17>

DDR_A_DQS#[0..7]<7>

DDR_A_DQS[0..7]<7>

DDR_A_D[0..63]<7>

DDR_A_DM[0..7]<7>

DDR_A_MA[0..15]<7>

PCH_SMBCLK<6,12,16>

PCH_SMBDATA<6,12,16>

PM_EXTTS#0_1 <6,12>

DDR_RST_GATE <6,12,20>

H_DIMMA_REF <5>

+0.75VS

+1.5V +1.5V

+V_DDR3_DIMMA_REF2

+3VS

+1.5V

+0.75VS

+V_DDR3_DIMMA_REF

+1.5V

+5VALW

+1.5V

+3V

+5VALW

+V_DDR3_DIMMA_REF

+V_DDR3_DIMMA_REF2 +V_DDR3_DIMMB_REF2

+V_DDR3_DIMMA_REF2

+1.5V

+V_DDR3_DIMMB_REF+V_DDR3_DIMMA_REF

+V_DDR3_DIMMA_REF

+1.5V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DDRIII-SODIMM SLOT1

Custom

11 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DDRIII-SODIMM SLOT1

Custom

11 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DDRIII-SODIMM SLOT1

Custom

11 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Standard Type

DDR3 SO-DIMM A

Layout Note: Place these 4 Caps near Command

and Control signals of DIMMA

Layout Note:

Place near JDIMM1.203 & JDIMM1.204

Layout Note:

Place near JDIMM1

M2 Circuit

M1 Circuit M3 Circuit

2008/9/8 #400755

Calpella Clarksfield

DDR3 SO-DIMM

VREFDQ Platform

Design Guide Change Details

M1 Circuit

R1247

1K_0402_1%~D

R1247

1K_0402_1%~D

12

U46A

LM358DT_SO8

@U46A

LM358DT_SO8

@

+

3

-

201

P8

G

4

R227 0_0402_5%~D@R227 0_0402_5%~D@

1 2

JDIMM1

FOX_AS0A626-U4RN-7F

CONN@

JDIMM1

FOX_AS0A626-U4RN-7F

CONN@

VREF_DQ

1VSS1 2

VSS2

3DQ4 4

DQ0

5DQ5 6

DQ1

7VSS3 8

VSS4

9DQS#0 10

DM0

11 DQS0 12

VSS5

13 VSS6 14

DQ2

15 DQ6 16

DQ3

17 DQ7 18

VSS7

19 VSS8 20

DQ8

21 DQ12 22

DQ9

23 DQ13 24

VSS9

25 VSS10 26

DQS#1

27 DM1 28

DQS1

29 RESET# 30

VSS11

31 VSS12 32

DQ10

33 DQ14 34

DQ11

35 DQ15 36

VSS13

37 VSS14 38

DQ16

39 DQ20 40

DQ17

41 DQ21 42

VSS15

43 VSS16 44

DQS#2

45 DM2 46

DQS2

47 VSS17 48

VSS18

49 DQ22 50

DQ18

51 DQ23 52

DQ19

53 VSS19 54

VSS20

55 DQ28 56

DQ24

57 DQ29 58

DQ25

59 VSS21 60

VSS22

61 DQS#3 62

DM3

63 DQS3 64

VSS23

65 VSS24 66

DQ26

67 DQ30 68

DQ27

69 DQ31 70

VSS25

71 VSS26 72

A12/BC#

83 A11 84

A9

85 A7 86

VDD5

87 VDD6 88

A8

89 A6 90

CKE0

73 CKE1 74

VDD1

75 VDD2 76

NC1

77 A15 78

BA2

79 A14 80

VDD3

81 VDD4 82

A5

91 A4 92

VDD7

93 VDD8 94

A3

95 A2 96

A1

97 A0 98

VDD9

99 VDD10 100

CK0

101 CK1 102

CK0#

103 CK1# 104

VDD11

105 VDD12 106

A10/AP

107 BA1 108

BA0

109 RAS# 110

VDD13

111 VDD14 112

WE#

113 S0# 114

CAS#

115 ODT0 116

VDD15

117 VDD16 118

A13

119 ODT1 120

S1#

121 NC2 122

VDD17

123 VDD18 124

NCTEST

125 VREF_CA 126

VSS27

127 VSS28 128

DQ32

129 DQ36 130

DQ33

131 DQ37 132

VSS29

133 VSS30 134

DQS#4

135 DM4 136

DQS4

137 VSS31 138

VSS32

139 DQ38 140

DQ34

141 DQ39 142

DQ35

143 VSS33 144

VSS34

145 DQ44 146

DQ40

147 DQ45 148

DQ41

149 VSS35 150

VSS36

151 DQS#5 152

DM5

153 DQS5 154

VSS37

155 VSS38 156

DQ42

157 DQ46 158

DQ43

159 DQ47 160

VSS39

161 VSS40 162

DQ48

163 DQ52 164

DQ49

165 DQ53 166

VSS41

167 VSS42 168

DQS#6

169 DM6 170

DQS6

171 VSS43 172

VSS44

173 DQ54 174

DQ50

175 DQ55 176

DQ51

177 VSS45 178

VSS46

179 DQ60 180

DQ56

181 DQ61 182

DQ57

183 VSS47 184

VSS48

185 DQS#7 186

DM7

187 DQS7 188

VSS49

189 VSS50 190

DQ58

191 DQ62 192

DQ59

193 DQ63 194

VSS51

195 VSS52 196

SA0

197 EVENT# 198

VDDSPD

199 SDA 200

SA1

201 SCL 202

VTT1

203 VTT2 204

G1

205 G2 206

C204

10U_0805_6.3V6M~D

C204

10U_0805_6.3V6M~D

1

2

R1081

10K_0402_5%~D

R1081

10K_0402_5%~D

12

C163

1U_0402_6.3V4Z~D

@C163

1U_0402_6.3V4Z~D

@

1

2

C220

0.1U_0402_16V4Z~D

C220

0.1U_0402_16V4Z~D

1

2

R221

2.2_0402_5%~D

@R221

2.2_0402_5%~D

@

1 2

C230

2.2U_0603_6.3V4Z~D

C230

2.2U_0603_6.3V4Z~D

1

2

+

C197

330U_D2_2V_Y~OK

+

C197

330U_D2_2V_Y~OK

1

2

C205

10U_0805_6.3V6M~D

C205

10U_0805_6.3V6M~D

1

2

C112

2.2U_0805_16V4Z~D

C112

2.2U_0805_16V4Z~D

1

2

R1056 0_0402_5%~DR1056 0_0402_5%~D

1 2

C164

1U_0402_6.3V4Z~D

@C164

1U_0402_6.3V4Z~D

@1

2

C1064

0.1U_0402_16V4Z~D

C1064

0.1U_0402_16V4Z~D

1

2

R178 0_0402_5%~DR178 0_0402_5%~D

1 2

R169

1K_0402_1%~D

R169

1K_0402_1%~D

12

R1057 10K_0402_5%~DR1057 10K_0402_5%~D

1 2

R179 0_0402_5%~DR179 0_0402_5%~D

1 2

R56

1K_0402_5%~D

R56

1K_0402_5%~D

1 2

C1014

2.2U_0603_6.3V4Z~D

C1014

2.2U_0603_6.3V4Z~D

1

2

R220

10_0402_5%~D

@R220

10_0402_5%~D

@

12

C1017

10U_0805_6.3V6M~D

C1017

10U_0805_6.3V6M~D

1

2

C153

1U_0402_6.3V4Z~D

@C153

1U_0402_6.3V4Z~D

@

1 2

R226

100K_0402_5%~D

@R226

100K_0402_5%~D

@

12

R170

1K_0402_1%~D

R170

1K_0402_1%~D

12

R222

12.1K_0402_1%~D

@R222

12.1K_0402_1%~D

@

12

R313

100K_0402_5%~D

@R313

100K_0402_5%~D

@

1 2

U45

ISL90727WIE627Z-TK_SC70-6

@U45

ISL90727WIE627Z-TK_SC70-6

@

RH 6

SDA 4

RW 5

VDD

1

GND

2

SCL

3

C281

1U_0603_10V4Z~D

C281

1U_0603_10V4Z~D

1

2

Q48A

2N7002DW-7-F_SOT363-6~D

@Q48A

2N7002DW-7-F_SOT363-6~D

@

61

2

C276

0.1U_0402_16V4Z~D

C276

0.1U_0402_16V4Z~D

1

2

Q48B

2N7002DW-7-F_SOT363-6~D

@Q48B

2N7002DW-7-F_SOT363-6~D

@

3

5

4

C187

10U_0805_6.3V6M~D

C187

10U_0805_6.3V6M~D

1

2

C170

10U_0805_6.3V6M~D

C170

10U_0805_6.3V6M~D

1

2

C186

10U_0805_6.3V6M~D

C186

10U_0805_6.3V6M~D

1

2

C280

1U_0603_10V4Z~D

C280

1U_0603_10V4Z~D

1

2

C1046

0.1U_0402_16V4Z~D

C1046

0.1U_0402_16V4Z~D

1

2

C1045

0.1U_0402_16V4Z~D

C1045

0.1U_0402_16V4Z~D

1

2

R230

1M_0402_5%~D

@R230

1M_0402_5%~D

@

12

C1016

1U_0603_10V4Z~D

C1016

1U_0603_10V4Z~D

1

2

R1229

0_0402_5%~D

@

R1229

0_0402_5%~D

@

1 2

C1013

0.1U_0402_16V4Z~D

C1013

0.1U_0402_16V4Z~D

1

2

R223

12.1K_0402_1%~D

@R223

12.1K_0402_1%~D

@

12

G

D

S

Q37

BSS138_SOT23~D

G

D

S

Q37

BSS138_SOT23~D

2

1 3

C124

0.1U_0402_16V4Z~D

C124

0.1U_0402_16V4Z~D

1

2

R1245

0_0402_5%~D

@

R1245

0_0402_5%~D

@

1 2

R1246

0_0402_5%~D

@

R1246

0_0402_5%~D

@

1 2

C1015

1U_0603_10V4Z~D

C1015

1U_0603_10V4Z~D

1

2

C171

10U_0805_6.3V6M~D

C171

10U_0805_6.3V6M~D

1

2

R1248

1K_0402_1%~D

R1248

1K_0402_1%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_CKE1DDR_B_CKE0

PP_S4GT_Q_1

PP_S4GT

PCH_SMBDATA

VREF_POT1_R

VREF_RW_POT1

PCH_SMBCLK

VREF_OPAMP_POT1

PCH_SMBDATA

PCH_SMBCLK

VREF_POT1_R

DDR_B_DQS6

DDR_B_D52

DDR_B_CS1#

DDR_B_MA13

DDR_B_CAS#

DDR_B_MA7

DDR_B_D21

DDR_B_D10

DDR_B_DQS0

DDR_B_D63

DDR_B_D54

DDR_B_D41

DDR_B_D39

DDR_B_MA1

DDR_B_DM3

DDR_B_DQS#2

SMBDATA

DDR_B_D49

DDR_B_DQS5

DDR_B_D35

DDR_B_D32

DDR_B_MA0

DDR_B_MA11

DDR_B_MA15

DDR_B_D26

DDR_B_D17

DDR_B_D33

DDR_B_D25

DDR_B_D8

DDR_B_D46

DDR_B_D38

DDR_B_DQS#4

DDR_B_D19

DDR_B_D16

DDR_B_DQS1

DDR_B_D5

DDR_B_D4

VREF_DQB

DDR_B_MA2

DDR_B_MA6

DDR_B_D7

SMBCLK

DDR_B_D62

DDR_B_DQS#6

DDR_B_D37

DDR_B_MA10

DDR_B_DQS#3

DDR_B_D22

DDR_B_D6

DDR_B_D51

DDR_B_D34

DDR_B_RAS#

DDR_B_BS1

DDR_B_MA3

DDR_B_DM1

DDR_B_DM0

DDR_B_D57

DDR_B_DM4

DDR_B_MA9

DDR_B_D15

DDR_B_DM7

DDR_B_D61

DDR_B_CLK1#

DDR_B_DQS3

DDR_B_D29

DDR_B_D23

DDR_B_D1

PM_EXTTS#0_1

DDR_B_D58

DDR_B_D48

DDR_B_D43

DDR_B_D36

DDR_B_ODT0

DDR_B_CLK0#

DDR_B_MA14

DDR_B_MA8

DDR_B_D20

SM_DRAMRST#

DDR_B_DQS#1

DDR_B_D9

DDR_B_DQS7

DDR_B_D42

DDR_B_DQS#5

DDR_B_ODT1

DDR_B_CS0#

DDR_B_BS0

DDR_B_CLK0

DDR_B_D14

DDR_B_D56

DDR_B_D40

DDR_B_D44

DDR_B_DQS4

DDR_B_D24

DDR_B_D28

DDR_B_DQS2

DDR_B_DM2

DDR_B_D12

DDR_B_D2

DDR_B_D0

DDR_B_DQS#7

DDR_B_D53

DDR_B_DM5

DDR_B_WE#

DDR_B_CLK1

DDR_B_D55

DDR_B_DM6

DDR_B_D47

DDR_VREF_CA_DIMMB

DDR_B_MA12

DDR_B_MA5

DDR_B_D11

DDR_B_D13

DDR_B_D3

DDR_B_D59

DDR_B_D60

DDR_B_D50

DDR_B_BS2

DDR_B_D31

DDR_B_D30

DDR_B_D18

DDR_B_DQS#0

DDR_B_D45

DDR_B_MA4

DDR_B_D27

+V_DDR3_DIMMB_REF

+V_DDR3_DIMMB_REF2

DDR_B_DQS#[0..7]<7>

DDR_B_DQS[0..7]<7>

DDR_B_D[0..63]<7>

DDR_B_MA[0..15]<7>

DDR_B_DM[0..7]<7>

DDR_B_CKE1 <7>DDR_B_CKE0<7>

DDR_B_CS1#<7>

DDR_B_BS1 <7>

DDR_B_WE#<7>

DDR_B_RAS# <7>

SM_DRAMRST# <6,11>

DDR_B_CS0# <7>

DDR_B_BS2<7>

DDR_B_BS0<7>

DDR_B_CAS#<7> DDR_B_ODT0 <7>

DDR_B_ODT1 <7>

DDR_B_CLK1# <7>

DDR_B_CLK1 <7>

DDR_B_CLK0<7>

DDR_B_CLK0#<7>

SMBDATA <11,13,14,16>

SMBCLK <11,13,14,16>

H_DIMMB_REF<5>

PP_S4GT<11>

PCH_SMBCLK<6,11,16>

PCH_SMBDATA<6,11,16>

PM_EXTTS#0_1 <6,11>

DDR_RST_GATE <6,11,20>

H_DIMMB_REF <5>

+0.75VS

+1.5V

+1.5V

+V_DDR3_DIMMB_REF2

+3VS

+V_DDR3_DIMMB_REF

+1.5V

+0.75VS

+1.5V

+3V

+5VALW

+V_DDR3_DIMMB_REF

+1.5V

+V_DDR3_DIMMB_REF2

+1.5V

+V_DDR3_DIMMB_REF

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DDRIII-SODIMM SLOT2

12 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DDRIII-SODIMM SLOT2

12 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DDRIII-SODIMM SLOT2

12 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

DDR3 SO-DIMM B

Standard Type

2008/9/8 #400755

Calpella Clarksfield

DDR3 SO-DIMM

VREFDQ Platform

Design Guide Change Details

Layout Note:

Place near JDIMM2

Layout Note:

Place near JDIMM2.203 & JDIMM2.204

Layout Note: Place these 4 Caps near Command

and Control signals of DIMMA

M2 Circuit

M3 Circuit

M1 Circuit

M1 Circuit

M1 Circuit

C1048

0.1U_0402_16V4Z~D

C1048

0.1U_0402_16V4Z~D

1

2

C128

1U_0402_6.3V4Z~D

@C128

1U_0402_6.3V4Z~D

@

1

2

R1059 10K_0402_5%~DR1059 10K_0402_5%~D

1 2

C188

10U_0805_6.3V6M~D

C188

10U_0805_6.3V6M~D

1

2

C173

10U_0805_6.3V6M~D

C173

10U_0805_6.3V6M~D

1

2

R165 0_0402_5%~DR165 0_0402_5%~D

1 2

R1249

1K_0402_1%~D

R1249

1K_0402_1%~D

12

R193

2.2_0402_5%~D

@R193

2.2_0402_5%~D

@

1 2

C1018

1U_0603_10V4Z~D

C1018

1U_0603_10V4Z~D

1

2

C172

10U_0805_6.3V6M~D

C172

10U_0805_6.3V6M~D

1

2

R194

10_0402_5%~D

@R194

10_0402_5%~D

@

12

C221

0.1U_0402_16V4Z~D

C221

0.1U_0402_16V4Z~D

1

2

C1047

0.1U_0402_16V4Z~D

C1047

0.1U_0402_16V4Z~D

1

2

C231

2.2U_0603_6.3V4Z~D

C231

2.2U_0603_6.3V4Z~D

1

2

R1230

1K_0402_1%~D

R1230

1K_0402_1%~D

12

U8

ISL90728WIE627Z-TK_SC70-6

@U8

ISL90728WIE627Z-TK_SC70-6

@

RH 6

SDA 4

RW 5

VDD

1

GND

2

SCL

3

R1231

1K_0402_1%~D

R1231

1K_0402_1%~D

12

R196

12.1K_0402_1%~D

@R196

12.1K_0402_1%~D

@

12

C1020

2.2U_0603_6.3V4Z~D

C1020

2.2U_0603_6.3V4Z~D

1

2

C156

1U_0402_6.3V4Z~D

@C156

1U_0402_6.3V4Z~D

@1

2

R186 0_0402_5%~D@R186 0_0402_5%~D@

1 2

C283

1U_0603_10V4Z~D

C283

1U_0603_10V4Z~D

1

2

C1050

0.1U_0402_16V4Z~D

C1050

0.1U_0402_16V4Z~D

1

2

C206

10U_0805_6.3V6M~D

C206

10U_0805_6.3V6M~D

1

2

R1082 10K_0402_5%~DR1082 10K_0402_5%~D

1 2

G

D

S

Q49

2N7002LT1G_SOT23-3

@

G

D

S

Q49

2N7002LT1G_SOT23-3

@

2

13

G

D

S

Q44

BSS138_SOT23~D

G

D

S

Q44

BSS138_SOT23~D

2

1 3

JDIMM2

FOX_AS0A626-U8RN-7F

CONN@

JDIMM2

FOX_AS0A626-U8RN-7F

CONN@

VREF_DQ

1VSS1 2

VSS2

3DQ4 4

DQ0

5DQ5 6

DQ1

7VSS3 8

VSS4

9DQS#0 10

DM0

11 DQS0 12

VSS5

13 VSS6 14

DQ2

15 DQ6 16

DQ3

17 DQ7 18

VSS7

19 VSS8 20

DQ8

21 DQ12 22

DQ9

23 DQ13 24

VSS9

25 VSS10 26

DQS#1

27 DM1 28

DQS1

29 RESET# 30

VSS11

31 VSS12 32

DQ10

33 DQ14 34

DQ11

35 DQ15 36

VSS13

37 VSS14 38

DQ16

39 DQ20 40

DQ17

41 DQ21 42

VSS15

43 VSS16 44

DQS#2

45 DM2 46

DQS2

47 VSS17 48

VSS18

49 DQ22 50

DQ18

51 DQ23 52

DQ19

53 VSS19 54

VSS20

55 DQ28 56

DQ24

57 DQ29 58

DQ25

59 VSS21 60

VSS22

61 DQS#3 62

DM3

63 DQS3 64

VSS23

65 VSS24 66

DQ26

67 DQ30 68

DQ27

69 DQ31 70

VSS25

71 VSS26 72

A12/BC#

83 A11 84

A9

85 A7 86

VDD5

87 VDD6 88

A8

89 A6 90

CKE0

73 CKE1 74

VDD1

75 VDD2 76

NC1

77 A15 78

BA2

79 A14 80

VDD3

81 VDD4 82

A5

91 A4 92

VDD7

93 VDD8 94

A3

95 A2 96

A1

97 A0 98

VDD9

99 VDD10 100

CK0

101 CK1 102

CK0#

103 CK1# 104

VDD11

105 VDD12 106

A10/AP

107 BA1 108

BA0

109 RAS# 110

VDD13

111 VDD14 112

WE#

113 S0# 114

CAS#

115 ODT0 116

VDD15

117 VDD16 118

A13

119 ODT1 120

S1#

121 NC2 122

VDD17

123 VDD18 124

NCTEST

125 VREF_CA 126

VSS27

127 VSS28 128

DQ32

129 DQ36 130

DQ33

131 DQ37 132

VSS29

133 VSS30 134

DQS#4

135 DM4 136

DQS4

137 VSS31 138

VSS32

139 DQ38 140

DQ34

141 DQ39 142

DQ35

143 VSS33 144

VSS34

145 DQ44 146

DQ40

147 DQ45 148

DQ41

149 VSS35 150

VSS36

151 DQS#5 152

DM5

153 DQS5 154

VSS37

155 VSS38 156

DQ42

157 DQ46 158

DQ43

159 DQ47 160

VSS39

161 VSS40 162

DQ48

163 DQ52 164

DQ49

165 DQ53 166

VSS41

167 VSS42 168

DQS#6

169 DM6 170

DQS6

171 VSS43 172

VSS44

173 DQ54 174

DQ50

175 DQ55 176

DQ51

177 VSS45 178

VSS46

179 DQ60 180

DQ56

181 DQ61 182

DQ57

183 VSS47 184

VSS48

185 DQS#7 186

DM7

187 DQS7 188

VSS49

189 VSS50 190

DQ58

191 DQ62 192

DQ59

193 DQ63 194

VSS51

195 VSS52 196

SA0

197 EVENT# 198

VDDSPD

199 SDA 200

SA1

201 SCL 202

VTT1

203 VTT2 204

G1

205 G2 206

C189

10U_0805_6.3V6M~D

C189

10U_0805_6.3V6M~D

1

2

U46B

LM358DT_SO8

@U46B

LM358DT_SO8

@

+

5

-

607

P8

G

4

C277

0.1U_0402_16V4Z~D

C277

0.1U_0402_16V4Z~D

1

2

C207

10U_0805_6.3V6M~D

C207

10U_0805_6.3V6M~D

1

2

+

C198

330U_D2_2V_Y~OK

+

C198

330U_D2_2V_Y~OK

1

2

R1250

1K_0402_1%~D

R1250

1K_0402_1%~D

12

C1019

1U_0603_10V4Z~D

C1019

1U_0603_10V4Z~D

1

2

R321

100K_0402_5%~D

@R321

100K_0402_5%~D

@

1 2

R1058 0_0402_5%~DR1058 0_0402_5%~D

1 2

C122

0.1U_0402_16V4Z~D

C122

0.1U_0402_16V4Z~D

1

2

R166 0_0402_5%~DR166 0_0402_5%~D

1 2

C1049

0.1U_0402_16V4Z~D

C1049

0.1U_0402_16V4Z~D

1

2

C298

10U_0805_6.3V6M~D

C298

10U_0805_6.3V6M~D

1

2

C282

1U_0603_10V4Z~D

C282

1U_0603_10V4Z~D

1

2

R197

12.1K_0402_1%~D

@R197

12.1K_0402_1%~D

@

12

C110

2.2U_0805_16V4Z~D

C110

2.2U_0805_16V4Z~D

1

2

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

CLK_BUF_DREF_96M

CLK_BUF_DREF_96M#

H_STP_CPU#

CLK_XTAL_OUT

CLK_XTAL_IN

CK505_PW RGD

REF_0/CPU_SEL

CLK_BUF_CPU_BCLK_R

CLK_BUF_CPU_BCLK#_R

CLK_BUF_CPU_BCLK

CLK_BUF_CPU_BCLK#

H_STP_CPU#

CLK_BUF_DREF_96M_R

CLK_BUF_DREF_96M#_R

CLK_BUF_PCIE_SATA

SMBCLK

SMBDATA

CLK_BUF_PCIE_SATA_R

CK505_PW RGD

CLK_BUF_CPU_DMI#_RCLK_BUF_CPU_DMI#

CLK_BUF_PCIE_SATA#_RCLK_BUF_PCIE_SATA#

CLK_BUF_CPU_DMI_RCLK_BUF_CPU_DMI

CLK_XTAL_OUT

CLK_XTAL_IN

REF_0/CPU_SEL

CLK_BUF_DREF_96M<16>

CLK_BUF_DREF_96M#<16>

CLK_BUF_PCIE_SATA#<16>

CLK_BUF_PCIE_SATA<16>

CLK_BUF_CPU_DMI#<16>

CLK_BUF_CPU_BCLK <16>

CLK_BUF_CPU_BCLK# <16>

CLK_BUF_ICH_14M <16>

SMBCLK <11,12,14,16>

SMBDATA <11,12,14,16>

CLK_ENABLE# <46>

VGATE <17,31,46>

CLK_BUF_CPU_DMI<16>

+CLK_VDD

+CLK_VDD

+CLK_VDDSRC

+1.05VS

+CLK_VDDSRC

+CLK_VDDSRC +CLK_VDD

+3VS

+CLK_VDD

+CLK_VDD

+CLK_VDDSRC

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Clock Generator (CK505)

Custom

13 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Clock Generator (CK505)

Custom

13 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Clock Generator (CK505)

Custom

13 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

1

CPU_1PIN 30 CPU_0

0 133MHz

(Default) 133MHz

100MHz 100MHz

Clock Generator

Silego Have Internal Pull-Up

Integrated 33ohm Resistor

Integrated 33ohm Resistor

IDT: 9LRS3191AKLFT

SILEGO: SLG8SP585

IDT Have Internal Pull-Down

Integrated 33ohm Resistor

R1.0 modify

C1057

0.1U_0402_16V4Z~D

C1057

0.1U_0402_16V4Z~D

1

2

C979

0.1U_0402_16V4Z~D

C979

0.1U_0402_16V4Z~D

1

2

R632

0_0402_5%~D

@

R632

0_0402_5%~D

@

1 2

C1052

10U_0805_10V4Z~D

C1052

10U_0805_10V4Z~D

1

2

C1060 33P_0402_50V8J~DC1060 33P_0402_50V8J~D

12

C1055

0.1U_0402_16V4Z~D

C1055

0.1U_0402_16V4Z~D

1

2

G

D

S

Q45

2N7002LT1G_SOT23-3

G

D

S

Q45

2N7002LT1G_SOT23-3

2

13

C1109

10P_0402_50V8J~D

@

C1109

10P_0402_50V8J~D

@

1 2

R631

10K_0402_5%~D

R631

10K_0402_5%~D

1 2

R1011 0_0402_5%~DR1011 0_0402_5%~D

1 2

Y6

14.31818MHz_20P_FSX8L14.318181M20FDB~OK

Y6

14.31818MHz_20P_FSX8L14.318181M20FDB~OK

12

C1054

0.1U_0402_16V4Z~D

C1054

0.1U_0402_16V4Z~D

1

2

R1010 0_0402_5%~DR1010 0_0402_5%~D

1 2

L80

FBMA-L11-201209-221LMA30T_0805

L80

FBMA-L11-201209-221LMA30T_0805

12

R634 10K_0402_5%~DR634 10K_0402_5%~D

1 2

CU54

47P_0402_50V8J~D

@CU54

47P_0402_50V8J~D

@

1

2

R633 33_0402_5%~DR633 33_0402_5%~D

1 2

U49

SLG8SP587VTR_QFN32_5X5

U49

SLG8SP587VTR_QFN32_5X5

CPU_1# 19

SATA

10

CKPWRGD/PD# 25

DOT_96#

4

CPU_0# 22

XTAL_OUT 27

VSS_REF 26

VDD_CPU 24

CPU_0 23

27MHZ_SS

7

XTAL_IN 28

27MHZ

6

USB_48

8

CPU_1 20

VSS_CPU 21

VDD_CPU_IO 18

VDD_USB_48

1

VSS_48M

2

REF_0/CPU_SEL 30

SDA 31

SCL 32

VDD_27

5

VSS_27M

9

SATA#

11

VSS_SRC

12

SRC_1

13

SRC_1#

14

VDD_SRC_IO

15

VDD_SRC 17

VDD_REF 29

DOT_96

3

CPU_STOP#

16

TGND

33

C1061

10U_0805_10V4Z~D

C1061

10U_0805_10V4Z~D

1

2

R1004 0_0402_5%~DR1004 0_0402_5%~D

1 2

R1009 0_0402_5%~DR1009 0_0402_5%~D

1 2

C1053

0.1U_0402_16V4Z~D

C1053

0.1U_0402_16V4Z~D

1

2

CU53

47P_0402_50V8J~D

@CU53

47P_0402_50V8J~D

@

1

2

L79

FBMA-L11-201209-221LMA30T_0805

L79

FBMA-L11-201209-221LMA30T_0805

12

C1056

0.1U_0402_16V4Z~D

C1056

0.1U_0402_16V4Z~D

1

2

R1008 0_0402_5%~DR1008 0_0402_5%~D

1 2

C1058

0.1U_0402_16V4Z~D

C1058

0.1U_0402_16V4Z~D

1

2

R1006 0_0402_5%~DR1006 0_0402_5%~D

1 2

C1051

10U_0805_10V4Z~D

C1051

10U_0805_10V4Z~D

1

2

C1059 33P_0402_50V8J~DC1059 33P_0402_50V8J~D

12

R1005 0_0402_5%~DR1005 0_0402_5%~D

1 2

R627 10K_0402_5%~DR627 10K_0402_5%~D

1 2

R1007 0_0402_5%~DR1007 0_0402_5%~D

1 2

C1065

10U_0805_10V4Z~D

C1065

10U_0805_10V4Z~D

1

2

R1141

1M_0402_5%~D

@R1141

1M_0402_5%~D

@

12

R1140 10K_0402_5%~D

@

R1140 10K_0402_5%~D

@

1 2

+FAN1_POWER

EN_DFAN1

PWR_ON-OFF_BTN#

FAN_SPEED1<31>

EN_DFAN1<31>

SMBCLK<11,12,13,16>

SMBDATA<11,12,13,16>

ACCEL_INT#<19>

PWR_ON-OFF_BTN# <32>

+3VS

+5VS

+FAN1_POWER

+3VS

+3VS

+3VS

+3VS

+3VS +3VS_ACL_IO

+3VS_ACL_IO

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

FAN & Screw Hole

B

14 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

FAN & Screw Hole

B

14 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

FAN & Screw Hole

B

14 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

FAN Control circuit

40mil

Must be placed in the center of the system.

Free Fall Sensor

P/N : SA000039C00 (S IC DE351DLTR LGA 14P MOTION SENSOR)

for debug only

TOPBTN

Power Button

DE351DLTR

U50

DE351DLTR_LGA14_3X5

DE351DLTR

U50

DE351DLTR_LGA14_3X5

VDD_IO

1

GND 2

RSVD 3

GND 4

GND 5

VDD

6

CS

7

INT 1

8

INT 2

9GND 10

RSVD 11

SDO

12

SDA / SDI / SDO

13

SCL / SPC

14

R1135 10K_0402_5%~D

R1135 10K_0402_5%~D

1 2

U7

RT9027BPS_SO8

U7

RT9027BPS_SO8

VEN

1

VIN

2

GND 5

GND 6

GND 8

VO

3

VSET

4

GND 7

C96 10U_1206_16V4Z~DC96 10U_1206_16V4Z~D

1 2

R141

10K_0402_5%~D

R141

10K_0402_5%~D

12

R1134

0_0603_5%~D

R1134

0_0603_5%~D

1 2

C77

10U_1206_16V4Z~D

C77

10U_1206_16V4Z~D

12

C1066

0.1U_0402_16V4Z~D

C1066

0.1U_0402_16V4Z~D 1

2

SWO1

SMT1-05_4P

@

SWO1

SMT1-05_4P

@

3

2

1

4

5

6

C91

1000P_0402_50V7K~D

C91

1000P_0402_50V7K~D

12

C98

0.1U_0402_16V4Z~D

C98

0.1U_0402_16V4Z~D 1

2

SWO2

SMT1-05_4P

@

SWO2

SMT1-05_4P

@

3

2

1

4

5

6

C1067

10U_0805_10V4Z~D

C1067

10U_0805_10V4Z~D

1

2

JFAN1

MOLEX_53261-0371~D

CONN@

JFAN1

MOLEX_53261-0371~D

CONN@

1

1

2

2

3

3G5

G4

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

PCH_INTVRMEN

SM_INTRUDER#

PCH_SRTCRST#

HDA_BITCLK_PCH

HDA_SYNC_PCH

HDA_RST_PCH#

HDA_SDOUT_PCH

PCH_JTAG_TMS

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_RST#

PCH_JTAG_TCK

SPI_W P1#

PCH_SPI_MISO_1

PCH_SPI_CS0#

SPI_HOLD1#

PCH_SPI_CLK_1

PCH_SPI_MOSI_1

LPC_AD0

LPC_FRAME#

LPC_AD3

LPC_AD2

LPC_AD1

SERIRQ

SATA_COMP

PCH_SATALED#

PCH_SPI_MOSI

PCH_SPI_CS0#_R

PCH_SPKR

PCH_SPKR

SERIRQ

PCH_SPI_MOSI

PCH_SPI_CS0#

PCH_SPI_MISO_1 PCH_SPI_MISO

PCH_SPI_CLK_1

PCH_SPI_MOSI_1

PCH_SPI_CLKPCH_SPI_CLK

HDA_SYNC_PCH

HDA_BITCLK_PCH

HDA_RST_PCH#

HDA_SDOUT_PCH

PCH_JTAG_RST#

PCH_JTAG_TMS

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_TCK

SATA_ITX_DRX_P0

SATA_ITX_DRX_N0

PCH_RTCRST#

SATA_ITX_DRX_P4

SATA_ITX_DRX_N4

SATA_ITX_DRX_N1

SATA_ITX_DRX_P1

SATA_ITX_DRX_P5

SATA_ITX_DRX_N5

HDA_BITCLK_AUDIO

PCH_SPI_CLK_2

PCH_SPI_CLKPCH_SPI_CLK

PCH_SPI_CS1# PCH_SPI_CS1#_R

PCH_SPI_MISO_2

PCH_SPI_MISO

PCH_SPI_MOSI_2

PCH_SPI_MOSI

SPI_W P2#

PCH_SPI_MISO_2

PCH_SPI_CS1#

SPI_HOLD2#

PCH_SPI_CLK_2

PCH_SPI_MOSI_2

HDA_SDIN0<25>

LPC_FRAME# <27,31>

LPC_AD0 <27,31>

LPC_AD1 <27,31>

LPC_AD2 <27,31>

LPC_AD3 <27,31>

SERIRQ <31>

PCH_SPKR<25>

HDA_SYNC_AUDIO<25>

HDA_SDOUT_AUDIO<25>

HDA_RST_AUDIO#<25>

HDA_BITCLK_AUDIO<25>

SATA_ITX_C_DRX_P5 <30>

SATA_IRX_DTX_P5 <30>

SATA_ITX_C_DRX_N5 <30>

SATA_IRX_DTX_N5 <30>

SATA_ITX_C_DRX_N4 <29>

SATA_IRX_DTX_P4 <29>

SATA_ITX_C_DRX_P4 <29>

SATA_IRX_DTX_N4 <29>

SATA_ITX_C_DRX_N1 <29>

SATA_IRX_DTX_N1 <29>

SATA_ITX_C_DRX_P1 <29>

SATA_IRX_DTX_P1 <29>

SATA_ITX_C_DRX_N0 <29>

SATA_IRX_DTX_P0 <29>

SATA_ITX_C_DRX_P0 <29>

SATA_IRX_DTX_N0 <29>

TOUCHKEY_TINT<31,32>

+RTCVCC

+RTCVCC

+RTCVCC

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+1.05VS

+3V

+1.05VS

+3VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (1/9) SATA,HDA,SPI, LPC

Custom

15 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (1/9) SATA,HDA,SPI, LPC

Custom

15 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (1/9) SATA,HDA,SPI, LPC

Custom

15 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

INTVRMEN - Integrated SUS 1.1V VRM Enable

High - Enable Internal VRs

close to RAM door

close to RAM door

SATA for ODD

SATA for HDD1

enable iTPM: SPI_MOSI High

HDA for AUDIO

RC Delay 18~25mS

RC Delay 18~25mS

CRB 1.0 Change to 4.7K

SATA for HDD2

SATA for eSATA

2008 Intel MOW36/MOW50

MP mount R1130, R1131,

R1132, R1133 and remove

others

TDO:

Reserved on ES1 Sample

Mount R1104, R1105 on ES2 Sample

From PCH EDS 5.16, SATA port2 & 3

are not available in all sku.

SPI Flash

(32Mbit/4Mbyte)

Change to SA000021A0L

GPIO33 pull down only for ME disable

R1232 1K_0402_5%~D@R1232 1K_0402_5%~D@

1 2

R1111 4.7K_0402_5%~DR1111 4.7K_0402_5%~D

1 2

R51 330K_0402_5%~DR51 330K_0402_5%~D

1 2

RU903.3K_0402_5%~D

@

RU903.3K_0402_5%~D

@

12

R1133 51_0402_1%~D@R1133 51_0402_1%~D@

1 2

R1105 100_0402_1%~DR1105 100_0402_1%~D

1 2

R139 37.4_0402_1%~OKR139 37.4_0402_1%~OK

1 2

C963 0.01U_0402_16V7K~DC963 0.01U_0402_16V7K~D

12

R1083 33_0402_5%~DR1083 33_0402_5%~D

1 2

R46

20K_0402_1%~D

R46

20K_0402_1%~D

1 2

R1100

10M_0402_5%~D

R1100

10M_0402_5%~D

12

RU89 33_0402_5%~D@RU89 33_0402_5%~D@

1 2

R77 10K_0402_5%~D@R77 10K_0402_5%~D@

1 2

R565 33_0402_5%~DR565 33_0402_5%~D

1 2

R1107 100_0402_1%~DR1107 100_0402_1%~D

1 2

RU87 15_0402_5%~D@RU87 15_0402_5%~D@

1 2

X2

32.768KHZ_12.5PF_Q13MC14610002

X2

32.768KHZ_12.5PF_Q13MC14610002

OSC 4

OSC 1

NC

3

NC

2

C9610.01U_0402_16V7K~D C9610.01U_0402_16V7K~D

1 2

R1131 51_0402_1%~D@R1131 51_0402_1%~D@

1 2

C964 0.01U_0402_16V7K~DC964 0.01U_0402_16V7K~D

12

C9620.01U_0402_16V7K~D C9620.01U_0402_16V7K~D

1 2

R129 10K_0402_5%~DR129 10K_0402_5%~D

1 2

R584 0_0402_5%~DR584 0_0402_5%~D

1 2

U29

MX25L3205DM2I-12G_SO8~D

U29

MX25L3205DM2I-12G_SO8~D

CLK 6

GND

4DIO 5

DO

2

/WP

3

VCC 8

/HOLD 7

/CS

1

R571 15_0402_5%~DR571 15_0402_5%~D

1 2

R36

20K_0402_1%~D

R36

20K_0402_1%~D

1 2

C9660.01U_0402_16V7K~D C9660.01U_0402_16V7K~D

1 2

C1110

10P_0402_50V8J~D

@

C1110

10P_0402_50V8J~D

@

1 2

R115

10K_0402_5%~D

R115

10K_0402_5%~D

1 2

ME1 @ME1 @

12

R64 1M_0402_5%~DR64 1M_0402_5%~D

1 2

R1110

3.3K_0402_5%~D

R1110

3.3K_0402_5%~D

1 2

R1109 10K_0402_5%~DR1109 10K_0402_5%~D

1 2

C9680.01U_0402_16V7K~D C9680.01U_0402_16V7K~D

1 2

R1108 20K_0402_1%~DR1108 20K_0402_1%~D

1 2

RU86 0_0402_5%~D@RU86 0_0402_5%~D@

1 2

T110

PAD

@T110

PAD

@

R1085 33_0402_5%~DR1085 33_0402_5%~D

1 2

C15

1U_0603_10V6K~D

C15

1U_0603_10V6K~D

1 2

CMOS1

@

CMOS1

@

12

RTCIHDA

SATA LPC

SPI JTAG

REV1.0

U47A

IBEXPEAK-M_FCBGA1071~D

RTCIHDA

SATA LPC

SPI JTAG

REV1.0

U47A

IBEXPEAK-M_FCBGA1071~D

RTCX1

B13

RTCX2

D13

INTVRMEN

A14

INTRUDER#

A16

HDA_BCLK

A30

HDA_SYNC

D29

HDA_RST#

C30

HDA_SDIN0

G30

HDA_SDIN1

F30

HDA_SDIN2

E32

HDA_SDO

B29

SATALED# T3

FWH0 / LAD0 D33

FWH1 / LAD1 B33

FWH2 / LAD2 C32

FWH3 / LAD3 A32

LDRQ1# / GPIO23 F34

FWH4 / LFRAME# C34

LDRQ0# A34

RTCRST#

C14

HDA_SDIN3

F32

HDA_DOCK_EN# / GPIO33

H32

HDA_DOCK_RST# / GPIO13

J30

SRTCRST#

D17

SATA0RXN AK7

SATA0RXP AK6

SATA0TXN AK11

SATA0TXP AK9

SATA1RXN AH6

SATA1RXP AH5

SATA1TXN AH9

SATA1TXP AH8

SATA2RXN AF11

SATA2RXP AF9

SATA2TXN AF7

SATA2TXP AF6

SATA3RXN AH3

SATA3RXP AH1

SATA3TXN AF3

SATA3TXP AF1

SATA4RXN AD9

SATA4RXP AD8

SATA4TXN AD6

SATA4TXP AD5

SATA5RXN AD3

SATA5RXP AD1

SATA5TXN AB3

SATA5TXP AB1

SATAICOMPI AF15

SPI_CLK

BA2

SPI_CS0#

AV3

SPI_CS1#

AY3

SPI_MOSI

AY1

SPI_MISO

AV1

SATA0GP / GPIO21 Y9

SATA1GP / GPIO19 V1

JTAG_TCK

M3

JTAG_TMS

K3

JTAG_TDI

K1

JTAG_TDO

J2

TRST#

J4

SERIRQ AB9

SPKR

P1

SATAICOMPO AF16

R1130 51_0402_1%~D@R1130 51_0402_1%~D@

1 2

R11223.3K_0402_5%~D R11223.3K_0402_5%~D

12

C9650.01U_0402_16V7K~D C9650.01U_0402_16V7K~D

1 2

R1086 33_0402_5%~DR1086 33_0402_5%~D

1 2

R82

10K_0402_5%~D

R82

10K_0402_5%~D

12

R1120

1K_0402_5%~D

@

R1120

1K_0402_5%~D

@

1 2

T111

PAD

@T111

PAD

@

R1084 33_0402_5%~DR1084 33_0402_5%~D

1 2

R1102 100_0402_1%~DR1102 100_0402_1%~D

1 2

R1132 51_0402_1%~D@R1132 51_0402_1%~D@

1 2

RU91

3.3K_0402_5%~D@

RU91

3.3K_0402_5%~D@

1 2

R116 10K_0402_5%~D@R116 10K_0402_5%~D@

1 2

R1024 0_0402_5%~DR1024 0_0402_5%~D

1 2

C398

18P_0402_50V8J~D

C398

18P_0402_50V8J~D

12

RU88 15_0402_5%~D@RU88 15_0402_5%~D@

1 2

C9670.01U_0402_16V7K~D C9670.01U_0402_16V7K~D

1 2

R1106 200_0402_5%~DR1106 200_0402_5%~D

1 2

C402

18P_0402_50V8J~D

C402

18P_0402_50V8J~D

12

R173 1K_0402_5%~D@R173 1K_0402_5%~D@

1 2

R1104 200_0402_5%~D R1104 200_0402_5%~D

1 2

R1101 200_0402_5%~DR1101 200_0402_5%~D

1 2

R111

10K_0402_5%~D

R111

10K_0402_5%~D

12

U68

MX25L1605AM2C-12G_SO8@

U68

MX25L1605AM2C-12G_SO8@

CS#

1

SO

2

WP#

3

GND

4

VCC 8

HOLD# 7

SCLK 6

SI 5

C13

1U_0603_10V6K~D

C13

1U_0603_10V6K~D

1 2

R575 15_0402_5%~DR575 15_0402_5%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

R_CLK_PCIE_EXPR

R_CLK_PCIE_EXPR#

EC_LID_OUT#

PCH_GPIO60

PCH_GPIO74

XCLK_RCOMP

EC_LID_OUT#

PCH_GPIO60

PCH_GPIO74

PCH_GPIO56

PCH_GPIO44

PCH_GPIO56

R_CLK_PCIE_WAN

R_CLK_PCIE_WAN#

R_CLK_PCIE_WLAN#

R_CLK_PCIE_WLAN

PCH_GPIO18

PCH_GPIO73

PCH_GPIO73

PCH_GPIO25

PCH_GPIO20

PCIE_IRX_GLANTX_N6

PCIE_ITX_GLANRX_P6

PCIE_ITX_GLANRX_N6

PCIE_IRX_GLANTX_P6

PCIE_IRX_WLANTX_P2

PCIE_IRX_WLANTX_N2

PCIE_ITX_WLANRX_P2

PCIE_ITX_WLANRX_N2

PCIE_IRX_WPANTX_P3

PCIE_IRX_WPANTX_N3

PCIE_ITX_WPANRX_P3

PCIE_ITX_WPANRX_N3

PCIE_IRX_WANTX_P1

PCIE_IRX_WANTX_N1

PCIE_ITX_WANRX_P1

PCIE_ITX_WANRX_N1

PCIE_IRX_CBTX_N4

PCIE_IRX_CBTX_P4

PCIE_ITX_CBRX_N4

PCIE_ITX_CBRX_P4

PCIE_IRX_EXPTX_P5

PCIE_IRX_EXPTX_N5

PCIE_ITX_EXPRX_P5

PCIE_ITX_EXPRX_N5

PCH_GPIO18

R_CLK_PCIE_WPAN#

R_CLK_PCIE_WPAN

PCH_GPIO20

R_CLK_PCIE_CB#

R_CLK_PCIE_CB

PCH_GPIO25

PCH_GPIO26

R_CLK_PCIE_GLAN#

R_CLK_PCIE_GLAN

PCH_GPIO44

PCH_GPIO26

PEG_CLKREQ#_R

SMBCLK

SMBDATAPCH_SMBDATA

PCH_SMBCLK

EC_SMB_DA2

EC_SMB_CK2

PCH_SML1CLK

PCH_SML1DAT

PCH_SML1DAT

PCH_SML1CLK

WWAN_CLKREQ# PCH_GPIO73

CB_CLKREQ# PCH_GPIO25

EXP_CLKREQ# PCH_GPIO26 GLAN_CLKREQ# PCH_GPIO44

XTAL25_IN

XTAL25_OUT

PCH_SMBDATA <6,11,12>

PCH_SMBCLK <6,11,12>

CLK_CPU_DMI <6>

CLK_BUF_DREF_96M# <13>

CLK_BUF_DREF_96M <13>

CLK_BUF_CPU_BCLK# <13>

CLK_BUF_CPU_BCLK <13>

CLK_BUF_CPU_DMI# <13>

CLK_BUF_CPU_DMI <13>

CLK_BUF_PCIE_SATA# <13>

CLK_BUF_PCIE_SATA <13>

CLK_BUF_ICH_14M <13>

CLK_PCI_FB <19>

CLK_CPU_DMI# <6>

CLK_PCIE_EXPR#<28>

CLK_PCIE_EXPR<28>

EC_LID_OUT# <31>

CLK_PCIE_WAN#<27>

CLK_PCIE_WAN<27>

WWAN_CLKREQ#<27>

CLK_PCIE_WLAN<27>

CLK_PCIE_WLAN#<27>

WLAN_CLKREQ#<27>

PCIE_IRX_GLANTX_N6<24>

PCIE_IRX_GLANTX_P6<24>

PCIE_ITX_C_GLANRX_N6<24>

PCIE_ITX_C_GLANRX_P6<24>

PCIE_IRX_WLANTX_N2<27>

PCIE_IRX_WLANTX_P2<27>

PCIE_ITX_C_WLANRX_N2<27>

PCIE_ITX_C_WLANRX_P2<27>

PCIE_IRX_WPANTX_N3<28>

PCIE_IRX_WPANTX_P3<28>

PCIE_ITX_C_WPANRX_N3<28>

PCIE_ITX_C_WPANRX_P3<28>

PCIE_IRX_WANTX_N1<27>

PCIE_IRX_WANTX_P1<27>

PCIE_ITX_C_WANRX_N1<27>

PCIE_ITX_C_WANRX_P1<27>

PCIE_IRX_CBTX_P4<30>

PCIE_IRX_CBTX_N4<30>

PCIE_ITX_C_CBRX_N4<30>

PCIE_ITX_C_CBRX_P4<30>

PCIE_IRX_EXPTX_P5<28>

PCIE_IRX_EXPTX_N5<28>

PCIE_ITX_C_EXPRX_N5<28>

PCIE_ITX_C_EXPRX_P5<28>

CLK_PCIE_WPAN#<28>

CLK_PCIE_WPAN<28>

WPAN_CLKREQ#<28>

CLK_PCIE_CB#<30>

CLK_PCIE_CB<30>

CB_CLKREQ#<30>

EXP_CLKREQ#<28>

CLK_PCIE_GLAN<24>

CLK_PCIE_GLAN#<24>

GLAN_CLKREQ#<24>

SMBDATA <11,12,13,14>

SMBCLK <11,12,13,14>

EC_SMB_CK2 <27,28,31>

EC_SMB_DA2 <27,28,31>

CLK_CPU_DP# <6>

CLK_CPU_DP <6>

+3V

+3VS

+1.05VS

+3VS

+3VS

+3VS

+3VS

+3V

+3VS

+3VS

+3V

+3V

+3V

+3VS

+3VS

+3VS +3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (2/9) PCIE, SMBUS, CLK

Custom

16 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (2/9) PCIE, SMBUS, CLK

Custom

16 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (2/9) PCIE, SMBUS, CLK

Custom

16 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

2. Level Shift1, Pull-Up to +3VS

CLOCK GEN, DIMM1, DIMM2, FFS

3. Level Shift2, Pull-Up to +3VS

CPU & PCH XDP

1. Connect Directly

XDCP of DDR3

10/100/1G LAN -->

MiniWLAN -->

MiniWPAN -->

MiniWWAN -->

Card Reader -->

Express card -->

MiniWWAN -->

MiniWLAN -->

MiniWPAN -->

Card Reader -->

Express card -->

10/100/1G LAN -->

Remove

Note: ADD 25MHz

crystal for Display Clock Integration

Buffer Mode check is need or not

XTAL25_IN should be pulled to

GND using a 0Ω resistor.

(Calpella_Schematic_Checklist_Rev1.6)

R0.3 Modify

C1026 0.1U_0402_16V7K~DC1026 0.1U_0402_16V7K~D

12

G

D

S

Q65

2N7002LT1G_SOT23-3

@

G

D

S

Q65

2N7002LT1G_SOT23-3

@

2

13

C973 0.1U_0402_16V7K~DC973 0.1U_0402_16V7K~D

12

C1023 0.1U_0402_16V7K~DC1023 0.1U_0402_16V7K~D

12

G

D

S

Q57

2N7002LT1G_SOT23-3

G

D

S

Q57

2N7002LT1G_SOT23-3

2

1 3

Y2

25MHZ_20P

Y2

25MHZ_20P

12

R563 0_0402_5%~DR563 0_0402_5%~D

1 2

R1022 10K_0402_5%~DR1022 10K_0402_5%~D

1 2

C971 0.1U_0402_16V7K~DC971 0.1U_0402_16V7K~D

12

C1025 0.1U_0402_16V7K~DC1025 0.1U_0402_16V7K~D

12

C1028

27P_0402_50V8J~D

C1028

27P_0402_50V8J~D

1 2

R95 10K_0402_5%~DR95 10K_0402_5%~D

1 2

R76 0_0402_5%~DR76 0_0402_5%~D

1 2

R551 0_0402_5%~DR551 0_0402_5%~D

1 2

C1022 0.1U_0402_16V7K~DC1022 0.1U_0402_16V7K~D

12

R1013 0_0402_5%~DR1013 0_0402_5%~D

1 2

C1021 0.1U_0402_16V7K~DC1021 0.1U_0402_16V7K~D

12

R550 0_0402_5%~DR550 0_0402_5%~D

1 2

R1207 10K_0402_5%~D

@

R1207 10K_0402_5%~D

@

1 2

T113PAD @

T113PAD @

R1206 10K_0402_5%~D

@

R1206 10K_0402_5%~D

@

1 2

PCI-E*

SMBus

Controller

From CLK BUFFER PEG

Clock Flex

Link

REV1.0

U47B

IBEXPEAK-M_FCBGA1071~D

PCI-E*

SMBus

Controller

From CLK BUFFER PEG

Clock Flex

Link

REV1.0

U47B

IBEXPEAK-M_FCBGA1071~D

PERN1

BG30

PERP1

BJ30

PERN2

AW 30

PERP2

BA30

PERN3

AU30

PERP3

AT30

PERN4

BA32

PERP4

BB32

PERN5

BF33

PERP5

BH33

PERN6

BA34

PERP6

AW 34

PERN7

AT34

PERP7

AU34

PERN8

BG34

PERP8

BJ34

PETN1

BF29

PETP1

BH29

PETN2

BC30

PETP2

BD30

PETN3

AU32

PETP3

AV32

PETN4

BD32

PETP4

BE32

PETN5

BG32

PETP5

BJ32

PETN6

BC34

PETP6

BD34

PETN7

AU36

PETP7

AV36

PETN8

BG36

PETP8

BJ36

SMBALERT# / GPIO11 B9

SMBCLK H14

SMBDATA C8

SML0CLK C6

SML0DATA G8

CLKOUT_PCIE0N

AK48

CLKOUT_PCIE0P

AK47

CLKOUT_PCIE1N

AM43

CLKOUT_PCIE1P

AM45

CLKOUT_PCIE2N

AM47

CLKOUT_PCIE2P

AM48

CLKOUT_PCIE3N

AH42

CLKOUT_PCIE3P

AH41

CLKOUT_PCIE4N

AM51

CLKOUT_PCIE4P

AM53

CLKOUT_PCIE5N

AJ50

CLKOUT_PCIE5P

AJ52

SML0ALERT# / GPIO60 J14

CL_CLK1 T13

CL_DATA1 T11

CL_RST1# T9

CLKIN_BCLK_N AP3

CLKIN_BCLK_P AP1

CLKIN_DMI_N AW24

CLKIN_DMI_P BA24

CLKIN_DOT_96N F18

CLKIN_DOT_96P E18

CLKIN_SATA_N / CKSSCD_N AH13

CLKIN_SATA_P / CKSSCD_P AH12

XTAL25_IN AH51

XTAL25_OUT AH53

REFCLK14IN P41

CLKIN_PCILOOPBACK J42

CLKOUT_PEG_A_N AD43

CLKOUT_PEG_A_P AD45

PEG_A_CLKRQ# / GPIO47 H1

PCIECLKRQ0# / GPIO73

P9

PCIECLKRQ1# / GPIO18

U4

PCIECLKRQ2# / GPIO20

N4

PCIECLKRQ3# / GPIO25

A8

PCIECLKRQ4# / GPIO26

M9

PCIECLKRQ5# / GPIO44

H6

CLKOUTFLEX0 / GPIO64 T45

CLKOUTFLEX1 / GPIO65 P43

CLKOUTFLEX2 / GPIO66 T42

CLKOUTFLEX3 / GPIO67 N50

CLKOUT_DMI_N AN4

CLKOUT_DMI_P AN2

PEG_B_CLKRQ# / GPIO56

P13

CLKOUT_PEG_B_P

AK51 CLKOUT_PEG_B_N

AK53

SML1ALERT# / GPIO74 M14

SML1CLK / GPIO58 E10

SML1DATA / GPIO75 G12

XCLK_RCOMP AF38

CLKOUT_DP_P / CLKOUT_BCLK1_P AT3

CLKOUT_DP_N / CLKOUT_BCLK1_N AT1

R635

4.7K_0402_5%~D

R635

4.7K_0402_5%~D

1 2

C1027

27P_0402_50V8J~D

C1027

27P_0402_50V8J~D

1 2

R1204 10K_0402_5%~D

@

R1204 10K_0402_5%~D

@

1 2

C974 0.1U_0402_16V7K~DC974 0.1U_0402_16V7K~D

12

R1016 0_0402_5%~DR1016 0_0402_5%~D

1 2

R53

2.2K_0402_5%~D

R53

2.2K_0402_5%~D

12

R1147

2.2K_0402_5%~D

R1147

2.2K_0402_5%~D

12

R1112 10K_0402_5%~DR1112 10K_0402_5%~D

1 2

R1014 0_0402_5%~DR1014 0_0402_5%~D

1 2

R1205 10K_0402_5%~D

@

R1205 10K_0402_5%~D

@

1 2

R1087 10K_0402_5%~DR1087 10K_0402_5%~D

1 2

G

D

S

Q67

2N7002LT1G_SOT23-3

@

G

D

S

Q67

2N7002LT1G_SOT23-3

@

2

13

R84 10K_0402_5%~DR84 10K_0402_5%~D

1 2

C970 0.1U_0402_16V7K~DC970 0.1U_0402_16V7K~D

12

R1020 0_0402_5%~DR1020 0_0402_5%~D

1 2

R78 10K_0402_5%~DR78 10K_0402_5%~D

1 2

G

D

S

Q58

2N7002LT1G_SOT23-3

G

D

S

Q58

2N7002LT1G_SOT23-3

2

1 3

R1203 10K_0402_5%~D

@

R1203 10K_0402_5%~D

@

1 2

R1019 0_0402_5%~DR1019 0_0402_5%~D

1 2

R81 10K_0402_5%~DR81 10K_0402_5%~D

1 2

R1018 0_0402_5%~DR1018 0_0402_5%~D

1 2

C1024 0.1U_0402_16V7K~DC1024 0.1U_0402_16V7K~D

12

R52

2.2K_0402_5%~D

R52

2.2K_0402_5%~D

12

R93 0_0402_5%~DR93 0_0402_5%~D

1 2

R43 10K_0402_5%~DR43 10K_0402_5%~D

1 2

R1017 0_0402_5%~DR1017 0_0402_5%~D

1 2

R1123 0_0402_5%~DR1123 0_0402_5%~D

1 2

G

D

S

Q66

2N7002LT1G_SOT23-3

@

G

D

S

Q66

2N7002LT1G_SOT23-3

@

2

13

R127 90.9_0402_1%~DR127 90.9_0402_1%~D

1 2

C969 0.1U_0402_16V7K~DC969 0.1U_0402_16V7K~D

12

R1023 10K_0402_5%~DR1023 10K_0402_5%~D

1 2

R1149

2.2K_0402_5%~D

R1149

2.2K_0402_5%~D

12

R1124 0_0402_5%~DR1124 0_0402_5%~D

1 2

G

D

S

Q64

2N7002LT1G_SOT23-3

@

G

D

S

Q64

2N7002LT1G_SOT23-3

@

2

13

R638

4.7K_0402_5%~D

R638

4.7K_0402_5%~D

1 2

R54 10K_0402_5%~DR54 10K_0402_5%~D

1 2

R1012 0_0402_5%~DR1012 0_0402_5%~D

1 2

R1113 10K_0402_5%~DR1113 10K_0402_5%~D

1 2

T112PAD @

T112PAD @

R1021 0_0402_5%~DR1021 0_0402_5%~D

1 2

G

D

S

Q47

2N7002LT1G_SOT23-3

G

D

S

Q47

2N7002LT1G_SOT23-3

2

1 3

R1209 10K_0402_5%~D

@

R1209 10K_0402_5%~D

@

1 2

R1015 0_0402_5%~DR1015 0_0402_5%~D

1 2

R1208 10K_0402_5%~D@R1208 10K_0402_5%~D@

1 2

G

D

S

Q46

2N7002LT1G_SOT23-3

G

D

S

Q46

2N7002LT1G_SOT23-3

2

1 3

C972 0.1U_0402_16V7K~DC972 0.1U_0402_16V7K~D

12

R558 0_0402_5%~DR558 0_0402_5%~D

1 2

R1210 10K_0402_5%~D

@

R1210 10K_0402_5%~D

@

1 2

R548

1M_0402_5%~D

R548

1M_0402_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DMI_COMP

XDP_DBRESET#

SYS_PWROK_R

PCH_RSMRST#

LAN_RST#

SUS_PW R_ACK

PBTN_OUT#

PCH_GPIO72

EC_SW I#

SLP_S5#

PM_SLP_DSW#

PM_SLP_LAN#

ICH_PCIE_W AKE#

PM_CLKRUN#

ICH_PWROK

SYS_PWROK

VGATE

LAN_RST#

SYS_PWROK

PCH_RSMRST#

SYS_PWROK

ICH_PWROK

PCH_ACIN

PCH_GPIO61

PCH_GPIO62

PM_SLP_M#

EC_SW I#

PCH_GPIO72

SUS_PW R_ACK

XDP_DBRESET#

PM_SLP_LAN#

ICH_PCIE_W AKE#

VGATE

SYS_PWROK

PM_CLKRUN#

SLP_S5#

PM_SLP_S4#

H_FDI_TXP0

H_FDI_TXP1

H_FDI_TXP2

H_FDI_TXP3

H_FDI_TXP4

H_FDI_TXP5

H_FDI_TXP6

H_FDI_TXP7

H_FDI_TXN0

H_FDI_TXN1

H_FDI_TXN2

H_FDI_TXN3

H_FDI_TXN4

H_FDI_TXN5

H_FDI_TXN6

H_FDI_TXN7

PM_DRAM_PWRGD<6>

PBTN_OUT#<6,31>

PM_SLP_S4# <11>

SLP_S3# <31>

ICH_PCIE_W AKE# <24,27,28,31>

H_PM_SYNC <6>

XDP_DBRESET#<6>

ICH_PWROK <31>

EC_RSMRST# <31>

ACIN<25,31,40,41>

DMI_HTX_PRX_N0<5>

DMI_HTX_PRX_N1<5>

DMI_HTX_PRX_N2<5>

DMI_HTX_PRX_N3<5>

DMI_HTX_PRX_P0<5>

DMI_HTX_PRX_P1<5>

DMI_HTX_PRX_P3<5>

DMI_HTX_PRX_P2<5>

DMI_PTX_HRX_N0<5>

DMI_PTX_HRX_N1<5>

DMI_PTX_HRX_N2<5>

DMI_PTX_HRX_N3<5>

DMI_PTX_HRX_P0<5>

DMI_PTX_HRX_P1<5>

DMI_PTX_HRX_P2<5>

DMI_PTX_HRX_P3<5>

VGATE <13,31,46>

PM_SLP_S5# <31>

SUS_PW R_ACK<31>

EC_TX_P80_DATA<27,31>

H_FDI_FSYNC1 <5>

H_FDI_INT <5>

H_FDI_LSYNC0 <5>

H_FDI_LSYNC1 <5>

H_FDI_FSYNC0 <5>

H_FDI_TXN0 <5>

H_FDI_TXN1 <5>

H_FDI_TXN3 <5>

H_FDI_TXN2 <5>

H_FDI_TXN5 <5>

H_FDI_TXN4 <5>

H_FDI_TXN7 <5>

H_FDI_TXN6 <5>

H_FDI_TXP1 <5>

H_FDI_TXP0 <5>

H_FDI_TXP3 <5>

H_FDI_TXP2 <5>

H_FDI_TXP4 <5>

H_FDI_TXP5 <5>

H_FDI_TXP7 <5>

H_FDI_TXP6 <5>

+3VS

+3V

+3V

+3VS

+1.05VS+3V

+3V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (3/9) DMI, FDI, PM

Custom

17 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (3/9) DMI, FDI, PM

Custom

17 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (3/9) DMI, FDI, PM

Custom

17 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

No used Integrated LAN,

connecting LAN_RST# to GND

10/2 Intel suggestion change to 10K

UMA

T4

PAD

@T4

PAD

@

R39

2.2K_0402_5%~D

R39

2.2K_0402_5%~D

12

R27 4.7K_0402_5%~DR27 4.7K_0402_5%~D

1 2

T2

PAD

@T2

PAD

@

R1211 10K_0402_5%~DR1211 10K_0402_5%~D

1 2

R590

49.9_0402_1%~D

R590

49.9_0402_1%~D

1 2

D3A

BAV99DW-7_SOT363

D3A

BAV99DW-7_SOT363

1

2

6

R58 0_0402_5%~DR58 0_0402_5%~D

12

R110 10K_0402_5%~D

@

R110 10K_0402_5%~D

@

1 2

T8

PAD

@T8

PAD

@

U2

TC7SH08FUF_SSOP5

U2

TC7SH08FUF_SSOP5

B2

A1

Y

4

P5

G

3

R72 10K_0402_5%~DR72 10K_0402_5%~D

1 2

C1125

0.1U_0402_10V6K~D

C1125

0.1U_0402_10V6K~D

1 2

R70 0_0402_5%~D@R70 0_0402_5%~D@

12

R41 10K_0402_5%~DR41 10K_0402_5%~D

1 2

R1125 8.2K_0402_5%~D

@

R1125 8.2K_0402_5%~D

@

1 2

DMI

FDI

System Power Management

REV1.0

U47C

IBEXPEAK-M_FCBGA1071~D

DMI

FDI

System Power Management

REV1.0

U47C

IBEXPEAK-M_FCBGA1071~D

DMI0RXN

BC24

DMI1RXN

BJ22

DMI2RXN

AW20

DMI3RXN

BJ20

DMI0RXP

BD24

DMI1RXP

BG22

DMI2RXP

BA20

DMI3RXP

BG20

DMI0TXN

BE22

DMI1TXN

BF21

DMI2TXN

BD20

DMI3TXN

BE18

DMI0TXP

BD22

DMI1TXP

BH21

DMI2TXP

BC20

DMI3TXP

BD18

DMI_ZCOMP

BH25

DMI_IRCOMP

BF25

FDI_RXN0 BA18

FDI_RXN1 BH17

FDI_RXN2 BD16

FDI_RXN3 BJ16

FDI_RXN4 BA16

FDI_RXN5 BE14

FDI_RXN6 BA14

FDI_RXN7 BC12

FDI_RXP0 BB18

FDI_RXP1 BF17

FDI_RXP2 BC16

FDI_RXP3 BG16

FDI_RXP4 AW16

FDI_RXP5 BD14

FDI_RXP6 BB14

FDI_RXP7 BD12

FDI_FSYNC0 BF13

FDI_FSYNC1 BH13

FDI_LSYNC0 BJ12

FDI_LSYNC1 BG14

FDI_INT BJ14

PMSYNCH BJ10

TP23 N2

SLP_M# K8

SLP_S3# P12

SLP_S4# H7

SLP_S5# / GPIO63 E4

SYS_RESET#

T6

SYS_PWROK

M6

PWRBTN#

P5

RI#

F14

WAKE# J12

SUS_STAT# / GPIO61 P8

SUSCLK / GPIO62 F3

ACPRESENT / GPIO31

P7

LAN_RST#

A10

MEPWROK

K5

BATLOW# / GPIO72

A6

PWROK

B17

CLKRUN# / GPIO32 Y1

SUS_PWR_DN_ACK / GPIO30

M1

RSMRST#

C16

DRAMPWROK

D9

SLP_LAN# / GPIO29 F6

R55 1K_0402_5%~DR55 1K_0402_5%~D

1 2

R1114 10K_0402_5%~DR1114 10K_0402_5%~D

1 2

C

B

E

Q50

MMBT3906_SOT23-3

C

B

E

Q50

MMBT3906_SOT23-3

1

2

3

R1234

0_0402_5%~D

@

R1234

0_0402_5%~D

@

12

R66 10K_0402_5%~DR66 10K_0402_5%~D

1 2

D3B

BAV99DW-7_SOT363

D3B

BAV99DW-7_SOT363

4

5

3

R69 10K_0402_5%~D

@

R69 10K_0402_5%~D

@

1 2

R1115 10K_0402_5%~DR1115 10K_0402_5%~D

1 2

U62

74AHC1G08GW _SOT353-5~D

U62

74AHC1G08GW _SOT353-5~D

IN1

1

IN2

2

G

3

O4

P5

R31 10K_0402_5%~DR31 10K_0402_5%~D

1 2

T7

PAD

@T7

PAD

@

R32

10K_0402_5%~D

R32

10K_0402_5%~D

12

R1088 8.2K_0402_5%~DR1088 8.2K_0402_5%~D

1 2

D50

CH751H-40PT_SOD323-2~D

D50

CH751H-40PT_SOD323-2~D

21

R1233 0_0402_5%~D@R1233 0_0402_5%~D@

12

R30 0_0402_5%~D

@

R30 0_0402_5%~D

@

12

R37 0_0402_5%~D@R37 0_0402_5%~D@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CRT_IREF

DP_HPD

DP_DDC_DATA

DP_DDC_CLK

IGPU_BKLT_EN

LCTLA_CLK

LCTLB_DATA

LVDS_DDC_CLK

LVDS_DDC_DATA

LVDS_B0+

LVDS_B1-

LVDS_B2-

LVDS_B1+

LVDS_B2+

LVDS_B0-

CRT_DDC_DATA

CRT_DDC_CLK

VGA_CRT_B

VGA_CRT_R

VGA_CRT_G

LVDS_A1-

LVDS_A2-

LVDS_A0+

LVDS_A2+

LVDS_A0-

LVDS_A1+

LVDS_ACLK-

LVDS_ACLK+

LVDS_BCLK-

LVDS_BCLK+

LCTLA_CLK

LCTLB_DATA

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

LVDS_DDC_CLK

LVDS_DDC_DATA

CRT_DDC_CLK

CRT_DDC_DATA

IGPU_BKLT_EN

LVDS_IBG

LVD_VREF

PCH_DPB_HPD

PCH_DPB_N3

PCH_DPB_P0

PCH_DPB_P1

PCH_DPB_N2

PCH_DPB_P3

PCH_DPB_N0

PCH_DPB_N1

PCH_DPB_P2

DP_AUX#

DP_AUX

VGA_LVDDEN

SDVO_SDATA

DP_DDC_DATA

SDVO_SCLK

DP_DDC_CLK

DP_HPD <37>

DISP_A3P_VGA <37>

DISP_A3N_VGA <37>

DISP_A2P_VGA <37>

DISP_A2N_VGA <37>

DISP_A1P_VGA <37>

DISP_A1N_VGA <37>

DISP_A0N_VGA <37>

DISP_A0P_VGA <37>

DP_DDC_DATA <37>

DP_DDC_CLK <37>

VGA_LVDDEN<35>

VGA_PW M<35>

LVDS_DDC_DATA<35>

LVDS_DDC_CLK<35>

LVDS_B1-<35>

LVDS_B1+<35>

LVDS_B2-<35>

LVDS_B2+<35>

LVDS_B0+<35>

LVDS_B0-<35>

CRT_DDC_CLK<35>

CRT_DDC_DATA<35>

VGA_CRT_R<35>

VGA_CRT_B<35>

VGA_CRT_G<35>

LVDS_A1-<35>

LVDS_A1+<35>

LVDS_A2-<35>

LVDS_A2+<35>

LVDS_A0-<35>

LVDS_A0+<35>

LVDS_ACLK+<35>

LVDS_ACLK-<35>

LVDS_BCLK+<35>

LVDS_BCLK-<35>

CRT_VSYNC<35>

CRT_HSYNC<35>

PCH_TMDS_D1# <36>

PCH_TMDS_CK# <36>

PCH_TMDS_D1 <36>

PCH_TMDS_CK <36>

PCH_DPB_HPD <36>

SDVO_SCLK <36>

SDVO_SDATA <36>

PCH_TMDS_D2# <36>

PCH_TMDS_D2 <36>

PCH_TMDS_D0# <36>

PCH_TMDS_D0 <36>

IGPU_BKLT_EN<31>

DP_AUX# <37>

DP_AUX <37>

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (4/9) LVDS, CRT, DPI

Custom

18 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (4/9) LVDS, CRT, DPI

Custom

18 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (4/9) LVDS, CRT, DPI

Custom

18 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Display Port

change to 2.2k follow Intel checklist ver.1.6

HDMI D2

HDMI D1

HDMI D0

HDMI CLK

RU6 2.2K_0402_5%~DRU6 2.2K_0402_5%~D

1 2

CU9 0.1U_0402_16V7K~DCU9 0.1U_0402_16V7K~D

12

RU10 2.2K_0402_5%~DRU10 2.2K_0402_5%~D

1 2

RU85 100K_0402_5%~DRU85 100K_0402_5%~D

1 2

RU12 150_0402_1%~DRU12 150_0402_1%~D

1 2

RU4 0_0402_5%~DRU4 0_0402_5%~D

1 2

RU7 2.2K_0402_5%~DRU7 2.2K_0402_5%~D

1 2

CU10 0.1U_0402_16V7K~DCU10 0.1U_0402_16V7K~D

12

RU8 10K_0402_5%~DRU8 10K_0402_5%~D

1 2

CU11 0.1U_0402_16V7K~DCU11 0.1U_0402_16V7K~D

12

RU9 10K_0402_5%~DRU9 10K_0402_5%~D

1 2

RU5 100K_0402_5%~DRU5 100K_0402_5%~D

1 2

LVDS

Digital Display Interface

CRT

REV1.0

U47D

IBEXPEAK-M_FCBGA1071~D

<BOM Structure>

LVDS

Digital Display Interface

CRT

REV1.0

U47D

IBEXPEAK-M_FCBGA1071~D

<BOM Structure>

L_BKLTCTL

Y48

L_BKLTEN

T48

L_CTRL_CLK

AB46

L_CTRL_DATA

V48

L_DDC_CLK

AB48

L_DDC_DATA

Y45

L_VDD_EN

T47

LVDSA_CLK#

AV53

LVDSA_CLK

AV51

LVDSA_DATA#0

BB47

LVDSA_DATA#1

BA52

LVDSA_DATA#2

AY48

LVDSA_DATA#3

AV47

LVDSA_DATA0

BB48

LVDSA_DATA1

BA50

LVDSA_DATA2

AY49

LVDSA_DATA3

AV48

LVDSB_CLK#

AP48

LVDSB_CLK

AP47

LVDSB_DATA#0

AY53

LVDSB_DATA#1

AT49

LVDSB_DATA#2

AU52

LVDSB_DATA#3

AT53

LVDSB_DATA0

AY51

DDPB_0N BD42

DDPB_1N BJ42

LVD_VREFH

AT43

LVD_VREFL

AT42

DDPD_2N BF37

DDPD_3N BE36

DDPB_2N BB40

DDPB_3N AW38

DDPC_0N BE40

DDPC_1N BF41

DDPC_2N BD38

DDPC_3N BB36

DDPD_0N BJ40

DDPD_1N BJ38

DDPB_0P BC42

DDPB_1P BG42

DDPD_2P BH37

DDPD_3P BD36

DDPB_2P BA40

DDPB_3P BA38

LVDSB_DATA1

AT48

LVDSB_DATA2

AU50

LVDSB_DATA3

AT51

LVD_IBG

AP39

LVD_VBG

AP41

DDPC_1P BH41

DDPC_0P BD40

DDPC_2P BC38

DDPC_3P BA36

DDPD_0P BG40

DDPD_1P BG38

CRT_BLUE

AA52

CRT_DDC_CLK

V51

CRT_DDC_DATA

V53

CRT_GREEN

AB53

CRT_HSYNC

Y53

CRT_IRTN

AB51

CRT_RED

AD53

CRT_VSYNC

Y51

DAC_IREF

AD48

SDVO_CTRLCLK T51

SDVO_CTRLDATA T53

DDPC_CTRLCLK Y49

DDPC_CTRLDATA AB49

DDPD_CTRLCLK U50

DDPD_CTRLDATA U52

DDPB_AUXN BG44

DDPC_AUXN BE44

DDPD_AUXN BC46

DDPB_AUXP BJ44

DDPC_AUXP BD44

DDPD_AUXP BD46

DDPB_HPD AU38

DDPC_HPD AV40

DDPD_HPD AT38

SDVO_TVCLKINP BG46

SDVO_TVCLKINN BJ46

SDVO_STALLP BG48

SDVO_STALLN BJ48

SDVO_INTP BH45

SDVO_INTN BF45

RU101 2.2K_0402_5%~DRU101 2.2K_0402_5%~D

1 2

RU14 150_0402_1%~DRU14 150_0402_1%~D

1 2

RU3 2.37K_0402_1%~DRU3 2.37K_0402_1%~D

1 2

CU12 0.1U_0402_16V7K~DCU12 0.1U_0402_16V7K~D

12

R126

1K_0402_0.5%~D

R126

1K_0402_0.5%~D

12

RU102 2.2K_0402_5%~DRU102 2.2K_0402_5%~D

1 2

RU94 2.2K_0402_5%~DRU94 2.2K_0402_5%~D

1 2

CU7 0.1U_0402_16V7K~DCU7 0.1U_0402_16V7K~D

12

RU2 100K_0402_5%~DRU2 100K_0402_5%~D

1 2

RU13 150_0402_1%~DRU13 150_0402_1%~D

1 2

CU13 0.1U_0402_16V7K~DCU13 0.1U_0402_16V7K~D

12

CU8 0.1U_0402_16V7K~DCU8 0.1U_0402_16V7K~D

12

RU11 2.2K_0402_5%~DRU11 2.2K_0402_5%~D

1 2

RU95 2.2K_0402_5%~DRU95 2.2K_0402_5%~D

1 2

CU14 0.1U_0402_16V7K~DCU14 0.1U_0402_16V7K~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_GNT3#

PCI_GNT1#

PCI_GNT0#

PCI_PIRQG#

PCI_PIRQF#

PCI_PIRQH#

USBP0-

USBP0+

USBP1-

USBP1+

USBP2-

USBP2+

USB_OC7#

USB_OC4#

USB_OC5#

USB_OC6#

USB_OC0#_R

USB_OC3#

USB_OC1#_R

PCI_PIRQA#

PCI_PIRQC#

PCI_PIRQD#

PCI_PIRQB#

USB_BIAS

PCI_PLTRST#

PCI_REQ0#

PCI_REQ1#

PCI_REQ2#

PCI_REQ3#

PCI_SERR#

PCI_TRDY#

PCI_DEVSEL#

PCI_FRAME#

PCI_IRDY#

PCI_STOP#

PCI_PERR#

PCI_PLOCK#

PCI_GNT3#

PCI_GNT0#

PCI_GNT1#

USBP10-

USBP10+

R_CLK_PCI_FB

R_CLK_PCI_EC

PCI_REQ0#

PCI_PIRQB#

PCI_PIRQF#

PCI_REQ3#

PCI_PIRQA#

PCI_PIRQC#

PCI_SERR#

PCI_PIRQG#

PCI_IRDY#

PCI_TRDY#

PCI_DEVSEL#

PCI_FRAME#

PCI_REQ2#

PCI_PIRQD#

PCI_REQ1#

PCI_PIRQH#

PCI_PERR#

PCI_PLOCK#

PCI_STOP#

USB_OC2#_R

USBP4-

USBP4+

USBP3-

USBP8-

USBP3+

USBP8+

USBP5-

USBP5+

USB_OC4#

USB_OC5#

USB_OC6#

USB_OC7#

USBP11+

USBP11-

USBP9+

USBP9-

USB_OC3#

USB_OC0#_R

USB_OC2#_R

USB_OC1#_R

R_CLK_DEBUG_PORT

PCI_PLTRST#

PLT_RST#

CLK_PCI_EC

CLK_PCI_FB

ACCEL_INT#

NV_RCOMP

NV_ALE

NV_CLE

USBP1- <30>

USBP1+ <30>

USBP2- <30>

USBP2+ <30>

USBP0- <30>

USBP0+ <30>

ESATA_USB_OC# <30>

USB_OC2# <30>

USBP10- <30>

USBP10+ <30>

CLK_PCI_FB<16>

USB_OC1# <30>

CLK_PCI_EC<31>

USBP4- <27>

USBP4+ <27>

USBP3- <28>

USBP8- <28>

USBP3+ <28>

USBP8+ <28>

USBP5- <27>

USBP5+ <27>

PLT_RST# <6,24,27,28,30,31>

USBP11+ <30>

USBP11- <30>

USBP9+ <32>

USBP9- <32>

CLK_DEBUG_PORT<27>

ACCEL_INT#<14>

PCI_PLTRST#<6>

+3VS

+3V

+3VS

+3V

+VCCQ_NAND

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (5/9) PCI, USB, VRAM

Custom

19 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (5/9) PCI, USB, VRAM

Custom

19 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (5/9) PCI, USB, VRAM

Custom

19 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

A16 swap override Strap/Top-Block

PCI_GNT#3

Swap Override jumper

Low = A16 swap

High = Default

Boot BIOS Strap

PCI_GNT#0 PCI_GNT#1

Boot BIOS Location

0 0

Reserved (NAND)

PCI

SPI

LPC

0 1

1 0

1 1

*

OC[0..3] use for EHCI 1

OC[4..7] use for EHCI 2

EHCI 1

EHCI 2

USB&ESATA

USB board

Reader board

USB Port

NC

Device

WLAN

WWAN

WPAN

Express

NC

Touch screen

Bluetooth

Camera

0

1

2

3

4

5

6

7

8

9

10

11

2008/1/6 2009MOW01 change to 22 ohm

Link to INT of G sensor

From PCH EDS 5.18, USB port6 & 7

are not available in all sku.

NV_CLE

DMI Termination Voltage

Set to Vcc when HIGH

Set to Vss when LOW

Danbury Technology Enabled

NV_ALE

High = Enabled

Low = Disabled

R172 1K_0402_5%~D@R172 1K_0402_5%~D@

1 2

R75 1K_0402_5%~D@R75 1K_0402_5%~D@

1 2

T115

PAD

@T115

PAD

@

T116

PAD

@T116

PAD

@

RP5

8.2K_1206_8P4R_5%~D

RP5

8.2K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

C1112

10P_0402_50V8J~D

@

C1112

10P_0402_50V8J~D

@

1 2

R67 0_0402_5%~DR67 0_0402_5%~D

1 2

RP7

10K_1206_8P4R_5%~D

RP7

10K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

R1116 22_0402_5%~DR1116 22_0402_5%~D

1 2

T117

PAD

@T117

PAD

@

R1239 8.2K_0402_5%~D

R1239 8.2K_0402_5%~D

1 2

R1139

1U_0402_6.3V6K~D

R1139

1U_0402_6.3V6K~D

12

R99 22_0402_5%~DR99 22_0402_5%~D

1 2

R83 1K_0402_5%~D@R83 1K_0402_5%~D@

1 2

C1111

10P_0402_50V8J~D

@

C1111

10P_0402_50V8J~D

@

1 2

U44

MC74VHC1G08DFT2G SC70 5P

U44

MC74VHC1G08DFT2G SC70 5P

B

2

A

1Y4

P5

G

3

R28 0_0402_5%~DR28 0_0402_5%~D

1 2

RP9

8.2K_1206_8P4R_5%~D

RP9

8.2K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

C976

0.1U_0402_16V4Z~D

C976

0.1U_0402_16V4Z~D

1

2

RP4

8.2K_1206_8P4R_5%~D

RP4

8.2K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

R1031 22_0402_5%~DR1031 22_0402_5%~D

1 2

R48 0_0402_5%~DR48 0_0402_5%~D

1 2

T118

PAD

@T118

PAD

@

RP6

8.2K_1206_8P4R_5%~D

RP6

8.2K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

RP8

8.2K_1206_8P4R_5%~D

RP8

8.2K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

R63

22.6_0402_1%~D

R63

22.6_0402_1%~D

1 2

R1030 0_0402_5%~D

@

R1030 0_0402_5%~D

@

12

T114

PAD

@T114

PAD

@

RP10

10K_1206_8P4R_5%~D

RP10

10K_1206_8P4R_5%~D

1 8

2 7

3 6

4 5

R1117 1K_0402_5%~D@R1117 1K_0402_5%~D@

1 2

R167 1K_0402_5%~D@R167 1K_0402_5%~D@

1 2

PCI

NVRAM

USB

REV1.0

U47E

IBEXPEAK-M_FCBGA1071~D

PCI

NVRAM

USB

REV1.0

U47E

IBEXPEAK-M_FCBGA1071~D

AD0

H40

AD1

N34

AD2

C44

AD20

C42

AD21

K46

AD22

M51

AD23

J52

AD24

K51

AD25

L34

AD26

F42

AD27

J40

AD28

G46

AD29

F44

AD3

A38

AD30

M47

AD31

H36

AD4

C36

AD5

J34

AD6

A40

AD7

D45

AD8

E36

AD9

H48

C/BE0#

J50

C/BE1#

G42

C/BE2#

H47

C/BE3#

G34

PCIRST#

K6

PERR#

E50

PIRQA#

G38

PIRQB#

H51

PIRQC#

B37

PIRQD#

A44

PLOCK#

D49

PLTRST#

D5

PME#

M7

REQ0#

F51

REQ1# / GPIO50

A46

REQ2# / GPIO52

B45

REQ3# / GPIO54

M53

SERR#

E44

STOP#

D41

TRDY#

C48

NV_ALE BD3

NV_CE#0 AY9

NV_CE#1 BD1

NV_CE#2 AP15

NV_CE#3 BD8

NV_CLE AY6

NV_DQS0 AV9

NV_DQS1 BG8

NV_DQ0 / NV_IO0 AP7

NV_DQ1 / NV_IO1 AP6

NV_DQ10 / NV_IO10 BD6

NV_DQ11 / NV_IO11 BB7

NV_DQ12 / NV_IO12 BC8

NV_DQ13 / NV_IO13 BJ8

NV_DQ14 / NV_IO14 BJ6

NV_DQ15 / NV_IO15 BG6

NV_DQ2 / NV_IO2 AT6

NV_DQ3 / NV_IO3 AT9

NV_DQ4 / NV_IO4 BB1

NV_DQ5 / NV_IO5 AV6

NV_DQ6 / NV_IO6 BB3

NV_DQ7 / NV_IO7 BA4

NV_DQ8 / NV_IO8 BE4

NV_DQ9 / NV_IO9 BB6

NV_RB# AV7

NV_RCOMP AU2

NV_W R#0_RE# AY8

NV_W R#1_RE# AY5

NV_W E#_CK0 AV11

NV_W E#_CK1 BF5

USBP0N H18

USBP0P J18

USBP10N A22

USBP10P C22

USBP11N G24

USBP11P H24

USBP12N L24

USBP12P M24

USBP13N A24

USBP13P C24

USBP1N A18

USBP1P C18

USBP2N N20

USBP2P P20

USBP3N J20

USBP3P L20

USBP4N F20

USBP4P G20

USBP5N A20

USBP5P C20

USBP6N M22

USBP7N B21

USBP7P D21

USBP8N H22

USBP8P J22

USBP9N E22

USBP9P F22

USBRBIAS# B25

USBRBIAS D25

USBP6P N22

AD10

E40

AD11

C40

AD12

M48

AD13

M45

AD14

F53

AD15

M40

AD16

M43

AD17

J36

AD18

K48

AD19

F40

DEVSEL#

F46

FRAME#

C46

GNT0#

F48

GNT1# / GPIO51

K45

GNT2# / GPIO53

F36

GNT3# / GPIO55

H53

PIRQE# / GPIO2

B41

PIRQF# / GPIO3

K53

PIRQG# / GPIO4

A36

PIRQH# / GPIO5

A48

IRDY#

A42

PAR

H44

OC0# / GPIO59 N16

OC1# / GPIO40 J16

OC2# / GPIO41 F16

OC3# / GPIO42 L16

OC4# / GPIO43 E14

OC5# / GPIO9 G16

OC6# / GPIO10 F12

OC7# / GPIO14 T15

CLKOUT_PCI0

N52

CLKOUT_PCI1

P53

CLKOUT_PCI2

P46

CLKOUT_PCI3

P51

CLKOUT_PCI4

P48

R153 32.4_0402_1%~OKR153 32.4_0402_1%~OK

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GATEA20

GATEA20

KB_RST#

KB_RST#

H_THERMTRIP#THRMTRIP_PCH#

PCH_GPIO36

PCH_GPIO37

PCH_GPIO49

PCH_GPIO16

PCH_GPIO49

PCH_GPIO37

PCH_GPIO36

PCH_GPIO35

LAN_LOPW EN

PCH_GPIO34

PCH_GPIO0

PCH_GPIO0

PCH_GPIO1PCH_GPIO1

LAN_CABDT

PCH_GPIO15

PCH_GPIO22

PCH_GPIO27

PCH_GPIO28

VGA_PRSNT_R#

VGA_PRSNT_L#

VGA_PRSNT_L#

VGA_PRSNT_R#

PCH_GPIO48

PCH_GPIO48

PCH_GPIO57

H_THERMTRIP#

PCH_GPIO45

PCH_GPIO46

PCH_GPIO34

GPIO17

GPIO17

PCH_GPIO16

PCH_GPIO22

TP24_SST

EC_SCI#

EC_SMI#

LAN_LOPW EN

LAN_CABDT

PCH_GPIO27

PCH_GPIO46

PCH_GPIO35

PCH_GPIO28

EC_SCI#

PCH_GPIO15

EC_SMI#

PCH_GPIO57

PCH_GPIO45

GATEA20 <31>

KB_RST# <31>

H_CPUPWRGD <6>

H_THERMTRIP# <6>

H_PECI <6>

CLK_CPU_BCLK <6>

CLK_CPU_BCLK# <6>

MAINPWON <42,47>

EC_SCI#<31>

EC_SMI#<31>

LAN_LOPW EN<24>

LAN_CABDT<24>

PCH_GPIO49<31>

DDR_RST_GATE<6,11,12>

+3VS

+1.1VS_VTT

+3VS

+1.1VS_VTT

+3V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (6/9) GPIO, CPU, MISC

Custom

20 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (6/9) GPIO, CPU, MISC

Custom

20 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (6/9) GPIO, CPU, MISC

Custom

20 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

(Do not pull high)

(Rev:1.0 GPIO24 Only)

WW46 Platform/Design Updates

2008/11/17 54.9 1% ->56 5%

R1.0 modify

GPIO27 (Have internal Pull-High)

High: VCCVRM VR Enable

Low: VCCVRM VR Disable

10/7 Not Use PCH_GPIO15 PU 1K to +3V

T121PAD @

T121PAD @

R73 10K_0402_5%~DR73 10K_0402_5%~D

1 2

R1126 10K_0402_5%~DR1126 10K_0402_5%~D

1 2

T120PAD @

T120PAD @

R133 10K_0402_5%~DR133 10K_0402_5%~D

1 2

R61 10K_0402_5%~DR61 10K_0402_5%~D

1 2

R47 10K_0402_5%~DR47 10K_0402_5%~D

1 2

R183 56_0402_1%~DR183 56_0402_1%~D

12

R107 10K_0402_5%~DR107 10K_0402_5%~D

1 2

R59 10K_0402_5%~DR59 10K_0402_5%~D

1 2

R128 10K_0402_5%~DR128 10K_0402_5%~D

1 2

R1119 10K_0402_5%~DR1119 10K_0402_5%~D

1 2

R1129 10K_0402_5%~DR1129 10K_0402_5%~D

1 2

R1127 10K_0402_5%~DR1127 10K_0402_5%~D

1 2

R117 10K_0402_5%~DR117 10K_0402_5%~D

1 2

R1032 10K_0402_5%~DR1032 10K_0402_5%~D

1 2

T122PAD @

T122PAD @

T6

PAD

@T6

PAD

@

R68 10K_0402_5%~DR68 10K_0402_5%~D

1 2

R1128 10K_0402_5%~DR1128 10K_0402_5%~D

1 2

R86 1K_0402_5%~DR86 1K_0402_5%~D

1 2

R175 56_0402_1%~DR175 56_0402_1%~D

12

R121 10K_0402_5%~DR121 10K_0402_5%~D

1 2

R106 10K_0402_5%~DR106 10K_0402_5%~D

1 2

R101 10K_0402_5%~DR101 10K_0402_5%~D

1 2

R1118 10K_0402_5%~DR1118 10K_0402_5%~D

1 2

R87 10K_0402_5%~DR87 10K_0402_5%~D

1 2

T123PAD @

T123PAD @

R134 10K_0402_5%~D@R134 10K_0402_5%~D@

1 2

T119PAD @

T119PAD @

R100 10K_0402_5%~DR100 10K_0402_5%~D

1 2

GPIO

MISC

NCTF

RSVD

CPU

REV1.0

U47F

IBEXPEAK-M_FCBGA1071~D

GPIO

MISC

NCTF

RSVD

CPU

REV1.0

U47F

IBEXPEAK-M_FCBGA1071~D

GPIO27

AB12

GPIO28

V13

GPIO24

H10

GPIO57

F8

LAN_PHY_PWR_CTRL / GPIO12

K9

VSS_NCTF_1

A4

VSS_NCTF_2

A49

VSS_NCTF_3

A5

VSS_NCTF_4

A50

VSS_NCTF_5

A52

VSS_NCTF_6

A53

VSS_NCTF_7

B2

VSS_NCTF_8

B4

VSS_NCTF_9

B52

VSS_NCTF_10

B53

VSS_NCTF_11

BE1

VSS_NCTF_12

BE53

VSS_NCTF_13

BF1

VSS_NCTF_14

BF53

VSS_NCTF_15

BH1

VSS_NCTF_16

BH2

VSS_NCTF_17

BH52

VSS_NCTF_18

BH53

VSS_NCTF_19

BJ1

VSS_NCTF_20

BJ2

VSS_NCTF_21

BJ4

VSS_NCTF_22

BJ49

VSS_NCTF_23

BJ5

VSS_NCTF_24

BJ50

VSS_NCTF_25

BJ52

VSS_NCTF_26

BJ53

VSS_NCTF_27

D1

VSS_NCTF_28

D2

VSS_NCTF_29

D53

VSS_NCTF_30

E1

VSS_NCTF_31

E53

TACH2 / GPIO6

D37

TACH0 / GPIO17

F38

TACH3 / GPIO7

J32

TP9 M18

TP10 N18

TP11 AJ24

TP12 AK41

SATA3GP / GPIO37

AB13

SATA5GP / GPIO49

AA4

SCLOCK / GPIO22

Y7

SLOAD / GPIO38

V3

SDATAOUT0 / GPIO39

P3

SDATAOUT1 / GPIO48

AB6

A20GATE U2

PROCPWRGD BE10

RCIN# T1

PECI BG10

THRMTRIP# BD10

GPIO8

F10

CLKOUT_PCIE6N AH45

CLKOUT_PCIE6P AH46

PCIECLKRQ6# / GPIO45

H3

CLKOUT_PCIE7N AF48

CLKOUT_PCIE7P AF47

PCIECLKRQ7# / GPIO46

F1

TP5 AY46

TP4 AY45

TP6 AV43

TP7 AV45

BMBUSY# / GPIO0

Y3

TP16 M30

TP17 N30

NC_1 AB45

NC_2 AB38

NC_3 AB42

NC_4 AB41

GPIO15

T7

TACH1 / GPIO1

C38

TP13 AK42

TP3 BB22

TP1 BA22

TP2 AW22

TP14 M32

TP15 N32

SATA2GP / GPIO36

AB7

NC_5 T39

INIT3_3V# P6

STP_PCI# / GPIO34

M11

SATACLKREQ# / GPIO35

V6

SATA4GP / GPIO16

AA2

TP24 C10

TP8 AF13

CLKOUT_BCLK0_N / CLKOUT_PCIE8N AM3

CLKOUT_BCLK0_P / CLKOUT_PCIE8P AM1

TP19 AA23

TP18 H12

C1559 0.047U_0402_16V4Z~DC1559 0.047U_0402_16V4Z~D

1 2

R120 10K_0402_5%~DR120 10K_0402_5%~D

1 2

R184

330_0402_5%~D@

R184

330_0402_5%~D@

1 2

C

B

E

Q51

2SC2411K_SOT23

@

C

B

E

Q51

2SC2411K_SOT23

@

1

2

3

R62 10K_0402_5%~DR62 10K_0402_5%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+VCCAPLL_EXP

+VCCADAC

+VCCAPLL_FDI

+VCC_DMI

+VCCTX_LVDS

+VCCA_LVDS

+3VS

+1.1VS_VTT

+3VS

+3VS

+VCCVRM +1.5VS

+1.8VS

+1.8VS+VCCQ_NAND

+VCCVRM

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+3VS

+1.8VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (7/9) PWR

Custom

21 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (7/9) PWR

Custom

21 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (7/9) PWR

Custom

21 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

60mA

All Ibex Peak-M Power rails with netnames +1.1VS and

+1.1V rails are actually +1.05VS and +1.05V rails

Near AB34

Near AT16

Near AE50

Near AB24

Near AN20

Near AK13

Near AM8

69mA

300mA

156mA

6mA

61mA

35mA

59mA

85mA

1524mA

42mA

3208mA

Near AB24

Top Side

CRB 0.9 is 180 ohm @ 100MHz

DG0.8 is 600 ohm FB (Page 290)

DG 0.8 is 1uH Inductor (Page 291)

DG 0.8 is 1uH Inductor (Page 291)

Have Internal VRM (DG0.8 Page 293)

Have Internal VRM (DG0.8 Page 293)

Intel suggest follow CRB 8/21

Near AN35

1uH inductor, 405mA

1uH inductor, 405mA

Follow Intel suggestion 8/21

Top Side

Change to 0 ohm

for discrete

35mA

Near AP43

0.1uH inductor, 200mA

UMA

change to 47U

change to 2ohm

R189 0.022_0805_1%~OK@R189 0.022_0805_1%~OK@

1 2

L9

2_0603_5%~D

L9

2_0603_5%~D

1 2

C80

1U_0402_6.3V4Z~D

C80

1U_0402_6.3V4Z~D

1

2

C79

0.1U_0402_16V4Z~D

C79

0.1U_0402_16V4Z~D

1

2

CU16

0.01U_0402_16V7K~D

CU16

0.01U_0402_16V7K~D

1

2

R188 0.022_0805_1%~OKR188 0.022_0805_1%~OK

1 2

C72

0.01U_0402_16V7K~D

C72

0.01U_0402_16V7K~D

1

2

C1029

10U_0805_10V4Z~D

@

C1029

10U_0805_10V4Z~D

@

1

2

C69

0.1U_0402_16V4Z~D

C69

0.1U_0402_16V4Z~D

1

2

C63

1U_0402_6.3V4Z~D

C63

1U_0402_6.3V4Z~D

1

2

C85

1U_0402_6.3V4Z~D

C85

1U_0402_6.3V4Z~D

1

2

C97

0.1U_0402_16V4Z~D

C97

0.1U_0402_16V4Z~D

1

2

R125

0_0402_5%~D

@

R125

0_0402_5%~D

@

12

C90

1U_0402_6.3V4Z~D

C90

1U_0402_6.3V4Z~D

1

2

CU17

22U_0805_6.3V6M~OK

CU17

22U_0805_6.3V6M~OK

1

2

L81

1UH_CBC2012T1R0M_20%~D

@L81

1UH_CBC2012T1R0M_20%~D

@

1 2

R174 0_0805_5%~D@R174 0_0805_5%~D@

1 2

L40

1UH_CBC2012T1R0M_20%~D

L40

1UH_CBC2012T1R0M_20%~D

1 2

RU15 0.022_0805_1%~OKRU15 0.022_0805_1%~OK

1 2

C107

10U_0805_10V4Z~D

C107

10U_0805_10V4Z~D

1

2

C978

10U_0805_10V4Z~D

@

C978

10U_0805_10V4Z~D

@

1

2

POWER

VCC CORE

DMI

PCI E*

CRTLVDS

FDI

NAND / SPI HVCMOS

REV1.0

U47G

IBEXPEAK-M_FCBGA1071~D

POWER

VCC CORE

DMI

PCI E*

CRTLVDS

FDI

NAND / SPI HVCMOS

REV1.0

U47G

IBEXPEAK-M_FCBGA1071~D

VCCCORE[1]

AB24

VCCCORE[2]

AB26

VCCCORE[3]

AB28

VCCCORE[4]

AD26

VCCCORE[5]

AD28

VCCCORE[6]

AF26

VCCCORE[7]

AF28

VCCCORE[8]

AF30

VCCCORE[9]

AF31

VCCCORE[10]

AH26

VCCCORE[11]

AH28

VCCCORE[12]

AH30

VCCCORE[13]

AH31

VCCCORE[14]

AJ30

VCCCORE[15]

AJ31

VCCPNAND[4] AK19

VCCPNAND[3] AK20

VCCIO[27]

AN23

VCCIO[28]

AN24

VCCIO[29]

AN26

VCCIO[30]

AN28

VCCIO[54]

AN30

VCCIO[55]

AN31

VCCIO[33]

AT26

VCCIO[34]

AT28

VCCIO[35]

AU26

VCCIO[36]

AU28

VCCIO[37]

AV26

VCCIO[38]

AV28

VCCIO[39]

AW26

VCCIO[40]

AW28

VCCIO[41]

BA26

VCCIO[42]

BA28

VCCIO[43]

BB26

VCCIO[44]

BB28

VCCIO[45]

BC26

VCCIO[46]

BC28

VCCIO[47]

BD26

VCCIO[48]

BD28

VCCIO[49]

BE26

VCCIO[50]

BE28

VCCIO[51]

BG26

VCCIO[52]

BG28

VCCIO[53]

BH27

VCCIO[31]

BJ26

VCCIO[32]

BJ28

VCCADAC[1] AE50

VCCADAC[2] AE52

VCCTX_LVDS[1] AP43

VCCTX_LVDS[2] AP45

VCCALVDS AH38

VCCVRM[2] AT24

VCCVRM[1]

AT22

VCCAPLLEXP

BJ24

VCCFDIPLL

BJ18

VCCPNAND[6] AK13

VCCPNAND[5] AK15

VCCPNAND[7] AM12

VCCPNAND[8] AM13

VCCIO[24]

AK24 VCCTX_LVDS[4] AT45

VCCTX_LVDS[3] AT46

VSSA_DAC[1] AF53

VSSA_LVDS AH39

VSSA_DAC[2] AF51

VCCIO[1]

AM23

VCC3_3[2] AB34

VCC3_3[3] AB35

VCC3_3[4] AD35

VCC3_3[1]

AN35

VCCME3_3[1] AM8

VCCME3_3[2] AM9

VCCME3_3[3] AP11

VCCME3_3[4] AP9

VCCPNAND[2] AK16

VCCPNAND[9] AM15

VCCPNAND[1] AM16

VCCDMI[1] AT16

VCCDMI[2] AU16

VCCIO[25]

AN20

VCCIO[26]

AN22

R182 0_0805_5%~D@R182 0_0805_5%~D@

1 2

LU1

0.1UH_MLF1608DR10KT_10%_1608

LU1

0.1UH_MLF1608DR10KT_10%_1608

12

CU15

0.01U_0402_16V7K~D

CU15

0.01U_0402_16V7K~D

1

2

R138 0.022_0805_1%~OKR138 0.022_0805_1%~OK

1 2

C64

47U_0805_4V6M~D

C64

47U_0805_4V6M~D

1

2

C95

1U_0402_6.3V4Z~D

C95

1U_0402_6.3V4Z~D

1

2

C58

0.1U_0402_16V4Z~D

C58

0.1U_0402_16V4Z~D

1

2

C94

0.1U_0402_16V4Z~D

C94

0.1U_0402_16V4Z~D

12

C83

1U_0402_6.3V4Z~D

C83

1U_0402_6.3V4Z~D

1

2

C114

10U_0805_10V4Z~D

C114

10U_0805_10V4Z~D

1

2

R181 0.022_0805_1%~OKR181 0.022_0805_1%~OK

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+PCH_VCCD6W

+1.1VS_VCCACLK

+VCCSST

+VCCSUS

+VCCRTCEXT

+VCC5REFSUS

+VCC5REF

+VCCSATAPLL

PCH_VCCME16

PCH_VCCME13

PCH_VCCME14

PCH_VCCME15

SBPWR_EN#<33>

+VCCVRM

+VCCADPLLA

+VCCADPLLB

+3V

+3VS

+1.1VS_VTT

+RTCVCC

+3V

+5V

+5VS

+3V

+3VS

+3VS

+3VS

+VCCVRM

+3V

+VCCADPLLB

+VCCADPLLA

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+1.05VS

+5VALW

+5V

+1.05VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (8/9) PWR

Custom

22 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (8/9) PWR

Custom

22 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (8/9) PWR

Custom

22 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

All Ibex Peak-M Power rails with netnames +1.1VS and

+1.1V rails are actually +1.05VS and +1.05V rails

Near V9

Near AT18

Near V12

Near Y22

Near Y20

Near F24

Near K49

Near V15

Near AD13

Near A26

Near V24

Near AK1

Near A12

Near P18

Near AH23Near AJ35Near AH35

Near AF23

Near AP51

Near L30

Near AB19

Near U23

Near BD51

Near BB51

163mA

1998mA

344mA

52mA

357mA

73mA

72mA

2mA

>1mA

>1mA

6mA

32mA

> 1mA

Near J38

DG 0.8 is 10uH Inductor (Page 290)

Have Internal VRM (DG0.8 Page 293)

DG 0.8 is 10uH Inductor (Page 291)

Have Internal VRM (DG0.8 Page 293)

Follow Intel suggestion

10uH inductor, 120mA

10uH inductor, 120mA

10uH inductor, 120mA

10uH inductor, 120mA

Follow Intel

Suggestion 8/21

Follow Intel

Suggestion 8/21

Change to 1U for power

sequence issue on ICH9

Near AD38 Near V39

Follow Intel design

L83

10UH_LB2012T100MR_20%~D

L83

10UH_LB2012T100MR_20%~D

1 2

R1156

0_0402_5%~D

R1156

0_0402_5%~D

12

C19

1U_0402_6.3V4Z~D

C19

1U_0402_6.3V4Z~D

1

2

C40

22U_0805_6.3V6M~OK

C40

22U_0805_6.3V6M~OK

1

2

C70

1U_0402_6.3V4Z~D

C70

1U_0402_6.3V4Z~D

1

2

C89

0.1U_0402_16V4Z~D

C89

0.1U_0402_16V4Z~D

1

2

R109 0_0603_5%~DR109 0_0603_5%~D

1 2

C56

0.1U_0402_16V4Z~D

C56

0.1U_0402_16V4Z~D

1 2

R124

0_0603_5%~D

@R124

0_0603_5%~D

@

1 2

C54

1U_0402_6.3V4Z~D

C54

1U_0402_6.3V4Z~D

1

2

C46

0.1U_0402_16V4Z~D

C46

0.1U_0402_16V4Z~D

1

2

L13

10UH_LB2012T100MR_20%~D

@L13

10UH_LB2012T100MR_20%~D

@

1 2

L82

10UH_LB2012T100MR_20%~D

L82

10UH_LB2012T100MR_20%~D

1 2

+

C1030

220U_D2_4VM_R15~D

+

C1030

220U_D2_4VM_R15~D

1

2

C48

22U_0805_6.3V6M~OK

C48

22U_0805_6.3V6M~OK

1

2

POWER

SATA

USB

Clock and Miscellaneous

HDA

CPU

PCI/GPIO/LPC

RTC PCI/GPIO/LPC

REV1.0

U47J

IBEXPEAK-M_FCBGA1071~D

POWER

SATA

USB

Clock and Miscellaneous

HDA

CPU

PCI/GPIO/LPC

RTC PCI/GPIO/LPC

REV1.0

U47J

IBEXPEAK-M_FCBGA1071~D

DCPSUSBYP

Y20

VCCME[1]

AD38

VCCME[2]

AD39

VCCME[3]

AD41

VCCME[5]

AF41

VCCME[6]

AF42

VCCSUSHDA L30

VCCSUS3_3[28] U23

VCCIO[56] V23

VCCIO[13] AD19

VCCIO[14] AF20

VCCIO[15] AF19

VCCME[7]

V39

VCCME[8]

V41

VCCME[9]

V42

VCCME[10]

Y39

VCCME[11]

Y41

VCCME[12]

Y42

V5REF K49

VCC3_3[8] J38

VCC3_3[9] L38

VCC3_3[10] M36

VCC3_3[11] N36

VCC3_3[12] P36

VCC3_3[13] U35

VCCRTC

A12

VCCSUS3_3[27] A26

VCCSUS3_3[26] A28

VCCSUS3_3[25] B27

VCCSUS3_3[24] C26

VCCSUS3_3[23] C28

VCCSUS3_3[22] E26

VCCSUS3_3[21] E28

VCCSUS3_3[20] F26

VCCSUS3_3[19] F28

VCCSUS3_3[18] G26

VCCSUS3_3[17] G28

VCCSUS3_3[16] H26

VCCSUS3_3[15] H28

VCCSUS3_3[14] J26

VCCSUS3_3[13] J28

VCCSUS3_3[12] L26

VCCSUS3_3[11] L28

VCCSUS3_3[10] M26

VCCSUS3_3[9] M28

VCCSUS3_3[8] N26

VCCSUS3_3[7] N28

VCCSUS3_3[6] P26

VCCSUS3_3[5] P28

VCCSUS3_3[4] U24

VCCSUS3_3[3] U26

VCCSUS3_3[2] U28

VCCSUS3_3[1] V28

VCCIO[11] AD20

VCCIO[20] AD22

VCCIO[10] AH19

VCCADPLLA[2]

BB53

VCCADPLLB[1]

BD51

VCCIO[22]

AJ35

V5REF_SUS F24

VCCIO[16] AH20

VCCIO[17] AB19

VCCIO[18] AB20

VCCIO[19] AB22

VCCIO[12] AF22

VCC3_3[14] AD13

VCCIO[9] AH22

VCCVRM[4] AT20

DCPSUS

Y22

VCCIO[2]

AF34

VCCIO[3]

AH34

VCCLAN[1]

AF23

VCCLAN[2]

AF24

VCCADPLLA[1]

BB51

VCCADPLLB[2]

BD53

VCCVRM[3]

AU24

VCCACLK[1]

AP51

VCCACLK[2]

AP53

DCPRTC

V9

VCCIO[4]

AF32

VCCME[4]

AF43

VCCIO[23]

AH35

VCCIO[21]

AH23

DCPSST

V12 VCCSATAPLL[2] AK1

VCCSATAPLL[1] AK3

VCCME[13] AA34

VCCME[14] Y34

VCCME[15] Y35

VCCME[16] AA35

VCC3_3[5]

V15

VCC3_3[6]

V16

VCC3_3[7]

Y16

VCCSUS3_3[29]

P18

VCCSUS3_3[30]

U19

VCCSUS3_3[31]

U20

VCCSUS3_3[32]

U22

VCCIO[5] V24

VCCIO[6] V26

VCCIO[7] Y24

VCCIO[8] Y26

V_CPU_IO[1]

AT18

V_CPU_IO[2]

AU18

R118 0_0603_5%~DR118 0_0603_5%~D

1 2

LU9

10UH_LB2012T100MR_20%~D

LU9

10UH_LB2012T100MR_20%~D

1 2

C49

1U_0402_6.3V4Z~D

C49

1U_0402_6.3V4Z~D

1

2

C99

0.1U_0402_16V4Z~D

C99

0.1U_0402_16V4Z~D

1

2

C104

1U_0402_6.3V4Z~D

C104

1U_0402_6.3V4Z~D

1

2

C74

1U_0402_6.3V4Z~D

C74

1U_0402_6.3V4Z~D

1

2

C38

0.1U_0402_16V4Z~D

C38

0.1U_0402_16V4Z~D

1

2

R131

0_0402_5%~D

R131

0_0402_5%~D

12

C25

0.1U_0402_16V4Z~D

C25

0.1U_0402_16V4Z~D

1

2

R569

0_0402_5%~D

@

R569

0_0402_5%~D

@

12

C92

10U_0805_10V4Z~D

@

C92

10U_0805_10V4Z~D

@

1

2

D48

CH751H-40PT_SOD323-2~D

D48

CH751H-40PT_SOD323-2~D

21

L84

10UH_LB2012T100MR_20%~D

@L84

10UH_LB2012T100MR_20%~D

@

1 2

C113

4.7U_0805_10V4Z~D

C113

4.7U_0805_10V4Z~D

1

2

CU66

1U_0402_6.3V4Z~D

CU66

1U_0402_6.3V4Z~D

1

2

D49

CH751H-40PT_SOD323-2~D

D49

CH751H-40PT_SOD323-2~D

21

C60

22U_0805_6.3V6M~OK

C60

22U_0805_6.3V6M~OK

1

2

C36

1U_0402_6.3V6K~D

C36

1U_0402_6.3V6K~D

12

C67

0.1U_0402_16V4Z~D

C67

0.1U_0402_16V4Z~D

1 2

CU65

1U_0402_6.3V4Z~D

CU65

1U_0402_6.3V4Z~D

1

2

R102 0_0603_5%~DR102 0_0603_5%~D

1 2

C1074

0.1U_0402_16V4Z~D

C1074

0.1U_0402_16V4Z~D

1

2

C28

1U_0402_6.3V6K~D

C28

1U_0402_6.3V6K~D

12

C75

1U_0402_6.3V4Z~D

@

C75

1U_0402_6.3V4Z~D

@

1

2

C24

0.1U_0402_16V4Z~D

C24

0.1U_0402_16V4Z~D

1

2

CU64

1U_0402_6.3V4Z~D

CU64

1U_0402_6.3V4Z~D

1

2

C47

0.1U_0402_16V4Z~D

C47

0.1U_0402_16V4Z~D

1

2

C57

0.1U_0402_16V4Z~D

C57

0.1U_0402_16V4Z~D

1

2

C84

10U_0805_10V4Z~D

@

C84

10U_0805_10V4Z~D

@

1

2

C65

1U_0402_6.3V4Z~D

@

C65

1U_0402_6.3V4Z~D

@

1

2

R92 0_0603_5%~DR92 0_0603_5%~D

1 2

C37 1U_0402_6.3V4Z~DC37 1U_0402_6.3V4Z~D

1 2

C1031

0.1U_0402_16V4Z~D

C1031

0.1U_0402_16V4Z~D

1

2

C73

1U_0402_6.3V4Z~D

C73

1U_0402_6.3V4Z~D

1

2

R97

10_0402_5%~D

R97

10_0402_5%~D

1 2

C53

0.1U_0402_16V4Z~D

C53

0.1U_0402_16V4Z~D

1

2

C50

0.1U_0402_16V4Z~D

C50

0.1U_0402_16V4Z~D

1 2

+

C1032

220U_D2_4VM_R15~D

+

C1032

220U_D2_4VM_R15~D

1

2

C51

0.1U_0402_16V4Z~D

C51

0.1U_0402_16V4Z~D

1 2

G

D

S

Q62

AO3413_SOT23-3

G

D

S

Q62

AO3413_SOT23-3

2

1 3

C66

1U_0402_6.3V4Z~D

C66

1U_0402_6.3V4Z~D

1

2

C86

1U_0402_6.3V4Z~D

@

C86

1U_0402_6.3V4Z~D

@

1

2

C78

1U_0402_6.3V4Z~D

C78

1U_0402_6.3V4Z~D

1

2

R49

10_0402_5%~D

R49

10_0402_5%~D

1 2

C109

1U_0402_6.3V4Z~D

C109

1U_0402_6.3V4Z~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (9/9) VSS

Custom

23 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (9/9) VSS

Custom

23 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PCH (9/9) VSS

Custom

23 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

REV1.0

U47H

IBEXPEAK-M_FCBGA1071~D

REV1.0

U47H

IBEXPEAK-M_FCBGA1071~D

VSS[1]

AA19

VSS[2]

AA20

VSS[3]

AA22

VSS[5]

AA24

VSS[6]

AA26

VSS[7]

AA28

VSS[8]

AA30

VSS[9]

AA31

VSS[10]

AA32

VSS[11]

AB11

VSS[12]

AB15

VSS[13]

AB23

VSS[14]

AB30

VSS[15]

AB31

VSS[16]

AB32

VSS[17]

AB39

VSS[18]

AB43

VSS[19]

AB47

VSS[20]

AB5

VSS[21]

AB8

VSS[22]

AC2

VSS[23]

AC52

VSS[24]

AD11

VSS[25]

AD12

VSS[26]

AD16

VSS[27]

AD23

VSS[28]

AD30

VSS[29]

AD31

VSS[30]

AD32

VSS[31]

AD34

VSS[33]

AD42

VSS[34]

AD46

VSS[35]

AD49

VSS[36]

AD7

VSS[37]

AE2

VSS[38]

AE4

VSS[39]

AF12

VSS[43]

AF35

VSS[44]

AP13

VSS[46]

AF45

VSS[47]

AF46

VSS[48]

AF49

VSS[49]

AF5

VSS[50]

AF8

VSS[51]

AG2

VSS[52]

AG52

VSS[53]

AH11

VSS[54]

AH15

VSS[55]

AH16

VSS[56]

AH24

VSS[57]

AH32

VSS[59]

AH43

VSS[60]

AH47

VSS[61]

AH7

VSS[62]

AJ19

VSS[63]

AJ2

VSS[64]

AJ20

VSS[65]

AJ22

VSS[66]

AJ23

VSS[67]

AJ26

VSS[68]

AJ28

VSS[69]

AJ32

VSS[70]

AJ34

VSS[71]

AT5

VSS[72]

AJ4

VSS[73]

AK12

VSS[76]

AK26

VSS[77]

AK22

VSS[78]

AK23

VSS[79]

AK28

VSS[80] AK30

VSS[81] AK31

VSS[82] AK32

VSS[83] AK34

VSS[84] AK35

VSS[85] AK38

VSS[86] AK43

VSS[87] AK46

VSS[88] AK49

VSS[89] AK5

VSS[90] AK8

VSS[91] AL2

VSS[92] AL52

VSS[93] AM11

VSS[96] AM20

VSS[97] AM22

VSS[98] AM24

VSS[99] AM26

VSS[100] AM28

VSS[102] AM30

VSS[103] AM31

VSS[104] AM32

VSS[105] AM34

VSS[106] AM35

VSS[107] AM38

VSS[108] AM39

VSS[109] AM42

VSS[110] AU20

VSS[111] AM46

VSS[112] AV22

VSS[113] AM49

VSS[114] AM7

VSS[116] BB10

VSS[117] AN32

VSS[118] AN50

VSS[119] AN52

VSS[120] AP12

VSS[121] AP42

VSS[122] AP46

VSS[123] AP49

VSS[124] AP5

VSS[125] AP8

VSS[126] AR2

VSS[127] AR52

VSS[128] AT11

VSS[131] AT32

VSS[132] AT36

VSS[133] AT41

VSS[134] AT47

VSS[135] AT7

VSS[136] AV12

VSS[137] AV16

VSS[138] AV20

VSS[139] AV24

VSS[140] AV30

VSS[141] AV34

VSS[142] AV38

VSS[143] AV42

VSS[144] AV46

VSS[145] AV49

VSS[146] AV5

VSS[147] AV8

VSS[148] AW14

VSS[149] AW18

VSS[150] AW2

VSS[151] BF9

VSS[152] AW32

VSS[153] AW36

VSS[154] AW40

VSS[155] AW52

VSS[156] AY11

VSS[157] AY43

VSS[158] AY47

VSS[40]

Y13

VSS[42]

AU4

VSS[45]

AN34

VSS[115] AA50

VSS[0]

AB16

VSS[58]

AV18

VSS[32]

AU22

VSS[4]

AM19

VSS[74]

AM41

VSS[75]

AN19

VSS[41]

AH49

VSS[129] BA12

VSS[130] AH48

VSS[101] BA42

VSS[95] AD24

VSS[94] BB44

REV1.0

U47I

IBEXPEAK-M_FCBGA1071~D

REV1.0

U47I

IBEXPEAK-M_FCBGA1071~D

VSS[159]

AY7

VSS[160]

B11

VSS[161]

B15

VSS[162]

B19

VSS[163]

B23

VSS[164]

B31

VSS[165]

B35

VSS[166]

B39

VSS[167]

B43

VSS[168]

B47

VSS[169]

B7

VSS[170]

BG12

VSS[171]

BB12

VSS[172]

BB16

VSS[173]

BB20

VSS[174]

BB24

VSS[175]

BB30

VSS[176]

BB34

VSS[177]

BB38

VSS[178]

BB42

VSS[179]

BB49

VSS[180]

BB5

VSS[181]

BC10

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC32

VSS[187]

BC36

VSS[188]

BC40

VSS[189]

BC44

VSS[190]

BC52

VSS[191]

BH9

VSS[192]

BD48

VSS[193]

BD49

VSS[194]

BD5

VSS[195]

BE12

VSS[196]

BE16

VSS[197]

BE20

VSS[198]

BE24

VSS[199]

BE30

VSS[200]

BE34

VSS[201]

BE38

VSS[202]

BE42

VSS[203]

BE46

VSS[204]

BE48

VSS[205]

BE50

VSS[206]

BE6

VSS[207]

BE8

VSS[208]

BF3

VSS[209]

BF49

VSS[210]

BF51

VSS[211]

BG18

VSS[212]

BG24

VSS[213]

BG4

VSS[214]

BG50

VSS[215]

BH11

VSS[216]

BH15

VSS[217]

BH19

VSS[218]

BH23

VSS[219]

BH31

VSS[220]

BH35

VSS[221]

BH39

VSS[222]

BH43

VSS[223]

BH47

VSS[224]

BH7

VSS[225]

C12

VSS[226]

C50

VSS[227]

D51

VSS[228]

E12

VSS[229]

E16

VSS[230]

E20

VSS[231]

E24

VSS[232]

E30

VSS[233]

E34

VSS[234]

E38

VSS[235]

E42

VSS[236]

E46

VSS[237]

E48

VSS[264] K47

VSS[265] K7

VSS[266] L14

VSS[267] L18

VSS[268] L2

VSS[269] L22

VSS[270] L32

VSS[271] L36

VSS[272] L40

VSS[273] L52

VSS[274] M12

VSS[275] M16

VSS[276] M20

VSS[277] N38

VSS[278] M34

VSS[279] M38

VSS[280] M42

VSS[281] M46

VSS[282] M49

VSS[283] M5

VSS[284] M8

VSS[285] N24

VSS[286] P11

VSS[288] P22

VSS[289] P30

VSS[290] P32

VSS[291] P34

VSS[292] P42

VSS[293] P45

VSS[294] P47

VSS[295] R2

VSS[296] R52

VSS[297] T12

VSS[298] T41

VSS[299] T46

VSS[300] T49

VSS[301] T5

VSS[302] T8

VSS[303] U30

VSS[304] U31

VSS[305] U32

VSS[306] U34

VSS[307] P38

VSS[308] V11

VSS[309] P16

VSS[310] V19

VSS[311] V20

VSS[312] V22

VSS[313] V30

VSS[314] V31

VSS[315] V32

VSS[316] V34

VSS[238]

E6

VSS[239]

E8

VSS[240]

F49

VSS[241]

F5

VSS[242]

G10

VSS[243]

G14

VSS[244]

G18

VSS[245]

G2

VSS[246]

G22

VSS[247]

G32

VSS[248]

G36

VSS[249]

G40

VSS[250]

G44

VSS[251]

G52

VSS[317] V35

VSS[318] V38

VSS[319] V43

VSS[320] V45

VSS[321] V46

VSS[322] V47

VSS[323] V49

VSS[324] V5

VSS[325] V7

VSS[326] V8

VSS[327] W2

VSS[328] W52

VSS[329] Y11

VSS[330] Y12

VSS[331] Y15

VSS[332] Y19

VSS[333] Y23

VSS[334] Y28

VSS[335] Y30

VSS[336] Y31

VSS[337] Y32

VSS[338] Y38

VSS[339] Y43

VSS[340] Y46

VSS[342] Y5

VSS[343] Y6

VSS[344] Y8

VSS[341] P49

VSS[345] P24

VSS[287] AD15

VSS[252]

AF39

VSS[253]

H16

VSS[254]

H20

VSS[255]

H30

VSS[256]

H34

VSS[257]

H38

VSS[258]

H42

VSS[346] T43

VSS[347] AD51

VSS[348] AT8

VSS[349] AD47

VSS[350] Y47

VSS[351] AT12

VSS[352] AM6

VSS[353] AT13

VSS[354] AM5

VSS[355] AK45

VSS[356] AK39

VSS[366] AV14

VSS[262] K11

VSS[263] K43

VSS[259] H49

VSS[260] H5

VSS[261] J24

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

LAN_LED2

LAN_LED3

V_DAC

V_DAC

V_DAC

LAN_MDIN0

LAN_MDIP0

LAN_MDIN3

LAN_MDIP3

LAN_MDIN2

LAN_MDIP2

LAN_MDIN1

RJ45_TX3+

RJ45_TX3-

RJ45_RX1-

LAN_MDIP1

V_DAC

RJ45_RX1+

RJ45_TX0-

RJ45_TX0+

RJ45_TX2+

RJ45_TX2-

+LAN_DVDD12

LAN_LED1

LAN_LED3

PCIE_IRX_C_GLANTX_P6

PCIE_IRX_C_GLANTX_N6

PCIE_ITX_C_GLANRX_N6

PCIE_ITX_C_GLANRX_P6

LAN_CKTAL2

LAN_CKTAL2

LAN_CKTAL1

LAN_CKTAL1

LAN_LED1

LAN_LED3

LAN_MDIP3

LAN_MDIP2

LAN_MDIN1

LAN_MDIN2

LAN_MDIP1

LAN_MDIN3

LAN_MDIN0

LAN_MDIP0

ISOLATEB

LED1_LED3LED2_LED3

LAN_MDIN1

LAN_MDIP1

LAN_MDIN0

LAN_MDIN2

LAN_MDIP0

LAN_MDIP2

LAN_MDIN3

LAN_MDIP3

RJ45_RX1-

RJ45_RX1+

RJ45_TX0-

RJ45_TX2-

RJ45_TX2+

RJ45_TX3-

RJ45_TX0+

RJ45_TX3+

LED1_LED3 LINK_100_1000#

LED2_LED3 LINK_10_1000#

LAN_LED0 LAN_ACTIVITY#

LAN_LED0

LAN_LED2

EN_WOL

PCIE_IRX_GLANTX_P6<16>

PCIE_IRX_GLANTX_N6<16>

PCIE_ITX_C_GLANRX_P6<16>

PCIE_ITX_C_GLANRX_N6<16>

CLK_PCIE_GLAN<16>

CLK_PCIE_GLAN#<16>

GLAN_CLKREQ#<16>

ICH_PCIE_WAKE#<17,27,28,31>

PLT_RST#<6,19,27,28,30,31>

EN_WOL#<31>

LAN_CABDT<20>

LAN_LOPWEN<20>

+LAN_IO

+3VALW

B+_BIAS

+LAN_VDD

+LAN_IO

+LAN_DVDD12

+3VS

+LAN_IO

+LAN_DVDD12

+LAN_VDD

+LAN_VDD

+LAN_IO

+LAN_IO

+LAN_IO

+LAN_IO

+LAN_DVDD12

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Gigabit LAN_RTL8111DL

Custom

24 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Gigabit LAN_RTL8111DL

Custom

24 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Gigabit LAN_RTL8111DL

Custom

24 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

W=60mils

W=60mils

( Should be place within 200 mils )

These caps close to U9: Pin 10, 13, 30, 36, 39

These caps close to U9: Pin 4

W=60mils

W=60mils

( Should be place within 200 mils )

These components close to U9: Pin 48

LEDS1-0

LED0

LED1

LED2

LED3

0 0 0 1 1 0 1 1

Tx / Rx

LINK100

LINK10

LINK1000

Tx / Rx

LINK10 /100 / 1000

LINK10 / 100

LINK1000

Tx

LINK

Rx

FULL

LINK10 / ACT

LINK100 / ACT

FULL

LINK1000 / ACT

These caps close to U9: Pin 44.45

These caps close to U9: Pin 1.29, 37, 40

W=30mils W=30mils

These caps close to U9: Pin 19

LINK OK

12/11 reserve for EMI as Dell Tony request.

W=40mils

R0.3 Modify

S

G

D

Q3

SI3456BDV-T1-E3_TSOP6~D

S

G

D

Q3

SI3456BDV-T1-E3_TSOP6~D

3

6

2

45

1

TS1

BOTH_GST5009-LF

TS1

BOTH_GST5009-LF

TCT1

1

TD1+

2

TD1-

3

TCT2

4

TD2+

5

TD2-

6MX2- 19

MX2+ 20

MCT2 21

MX1- 22

MX1+ 23

MCT1 24

TCT3

7

TD3+

8

TD3-

9

TCT4

10

TD4+

11

TD4-

12

MCT3 18

MX3+ 17

MX3- 16

MCT4 15

MX4+ 14

MX4- 13

R244

220_0402_5%~D

R244

220_0402_5%~D

1 2

R236

470K_0402_5%

R236

470K_0402_5%

12

C293

0.1U_0402_10V6K~D

C293

0.1U_0402_10V6K~D

1

2

C289

0.1U_0402_10V6K~D

C289

0.1U_0402_10V6K~D

1

2

R245

220_0402_5%~D

R245

220_0402_5%~D

1 2

C304 0.1U_0402_16V7K~DC304 0.1U_0402_16V7K~D

12

C878 6.8PF_0402_50V9~DC878 6.8PF_0402_50V9~D

1 2

R239 2.49K_0402_1%R239 2.49K_0402_1%

1 2

C876 6.8PF_0402_50V9~DC876 6.8PF_0402_50V9~D

1 2

C305 0.1U_0402_16V7K~DC305 0.1U_0402_16V7K~D

12

C958

2200P_0402_50V7K~D

C958

2200P_0402_50V7K~D

1

2

R1033 0_0402_5%~D

@

R1033 0_0402_5%~D

@

1 2

C291

0.1U_0402_10V6K~D

C291

0.1U_0402_10V6K~D

1

2

R235

0_0603_5%~D

R235

0_0603_5%~D

12

C288

0.1U_0402_10V6K~D

C288

0.1U_0402_10V6K~D

1

2

C318

33P_0402_50V8J~D

C318

33P_0402_50V8J~D

1

2

C319

33P_0402_50V8J~D

C319

33P_0402_50V8J~D

1

2

Y3

25MHZ_20P_1BX25000CK1A

Y3

25MHZ_20P_1BX25000CK1A

1 2

R947

3.6K_0402_5%

R947

3.6K_0402_5%

12

C285

22U_1206_6.3V6M~D

@

C285

22U_1206_6.3V6M~D

@

1

2

C877 6.8PF_0402_50V9~DC877 6.8PF_0402_50V9~D

1 2

D4

CH751H-40PT_SOD323-2~D

D4

CH751H-40PT_SOD323-2~D

21

C296

0.1U_0402_10V6K~D

C296

0.1U_0402_10V6K~D

1

2

C306

0.1U_0402_10V6K~D

C306

0.1U_0402_10V6K~D

1

2

D7

CH751H-40PT_SOD323-2~D

D7

CH751H-40PT_SOD323-2~D

21

C322 0.01U_0402_16V7K~DC322 0.01U_0402_16V7K~D

1 2

C874 6.8PF_0402_50V9~DC874 6.8PF_0402_50V9~D

1 2

R884

0_0603_5%~D

R884

0_0603_5%~D

12

R1142

1.5M_0402_5%~D

R1142

1.5M_0402_5%~D

12

C294

0.1U_0402_10V6K~D

C294

0.1U_0402_10V6K~D

1

2

D5

CH751H-40PT_SOD323-2~D

D5

CH751H-40PT_SOD323-2~D

21

D6

CH751H-40PT_SOD323-2~D

D6

CH751H-40PT_SOD323-2~D

21

C310 1U_0603_10V6K~DC310 1U_0603_10V6K~D

1 2

C286

22U_1206_6.3V6M~D

C286

22U_1206_6.3V6M~D

1

2

C302

0.1U_0402_10V6K~D

@C302

0.1U_0402_10V6K~D

@

1

2

C287

0.1U_0402_10V6K~D

C287

0.1U_0402_10V6K~D

1

2

C323

1000P_1206_2KV7K

C323

1000P_1206_2KV7K

1

2

JRJ45

FOX_JM3611A-R4953B-7F

CONN@

JRJ45

FOX_JM3611A-R4953B-7F

CONN@

PR1-

2

PR1+

1

PR2+

3

PR3+

4

PR3-

5

PR2-

6

PR4+

7

PR4-

8

Yellow LED+

10

Orange LED-

11

Yellow LED+

12

Yellow LED-

13

GND 15

GND 14

Green LED-

9

C308

22U_1206_6.3V6M~D

C308

22U_1206_6.3V6M~D

1

2

L11

4.7UH_1008HC-472EJFS-A_5%_1008

L11

4.7UH_1008HC-472EJFS-A_5%_1008

1 2

R240 1K_0402_5%~DR240 1K_0402_5%~D

1 2

C307

22U_1206_6.3V6M~D

C307

22U_1206_6.3V6M~D

1

2

RTL8111DL

U9

RTL8111DL-GR_LQFP48_7X7

RTL8111DL

U9

RTL8111DL-GR_LQFP48_7X7

AVDD33 1

MDIP0 2

MDIN0 3

FB12 4

MDIP1 5

MDIN1 6

GND

7

MDIP2 8

MDIN2 9

AVDD12 10

MDIP3 11

MDIN3 12

RSET

46

SROUT12 48

GND

47

CKTAL2

42 CKTAL1

41

AVDD33 40

VDDSR 44

LED0 38

VDD33 37

ENSR 43

DVDD12 13

GND

14

HSIP

15

HSIN

16

REFCLK_P

17

REFCLK_N

18

EVDD12 19

HSOP

20

HSON

21

EGND

22

GPO

23

NC

24

LED1/EESK 35

LED2/EEDI/AUX 34

LED3/EEDO 33

EECS 32

DVDD12 36

GND

31

DVDD12 30

VDD33 29

ISOLATEB

28

PERSTB

27

LANWAKEB

26

CLKREQB

25

AVDD12 39

VDDSR 45

C321 0.01U_0402_16V7K~DC321 0.01U_0402_16V7K~D

1 2

C290

0.1U_0402_10V6K~D

C290

0.1U_0402_10V6K~D

1

2

C324 0.01U_0402_16V7K~DC324 0.01U_0402_16V7K~D

1 2

C292

0.1U_0402_10V6K~D

C292

0.1U_0402_10V6K~D

1

2

C303

0.01U_0402_16V7K~D

@C303

0.01U_0402_16V7K~D

@

1

2

R246

220_0402_5%~D

R246

220_0402_5%~D

1 2

G

D

S

Q4

PMF3800SN_SC70-3

G

D

S

Q4

PMF3800SN_SC70-3

2

13

R942 0_0805_5%~DR942 0_0805_5%~D

12

C880 6.8PF_0402_50V9~DC880 6.8PF_0402_50V9~D

1 2

C873 6.8PF_0402_50V9~DC873 6.8PF_0402_50V9~D

1 2

C295

0.1U_0402_10V6K~D

C295

0.1U_0402_10V6K~D

1

2

R241 0_0402_5%~D@R241 0_0402_5%~D@

1 2

C284

1U_0603_10V6K~D

C284

1U_0603_10V6K~D

1

2

RP1

75_1206_8P4R_5%

RP1

75_1206_8P4R_5%

18

27

36

45

C875 6.8PF_0402_50V9~DC875 6.8PF_0402_50V9~D

1 2

C320 0.01U_0402_16V7K~DC320 0.01U_0402_16V7K~D

1 2

R242 15K_0402_5%R242 15K_0402_5%

1 2

L10

FBMA-L11-322513-201LMA40T_1210

L10

FBMA-L11-322513-201LMA40T_1210

1 2

C309

0.1U_0402_10V6K~D

C309

0.1U_0402_10V6K~D

1

2

C311 1U_0603_10V6K~DC311 1U_0603_10V6K~D

1 2

C879 6.8PF_0402_50V9~DC879 6.8PF_0402_50V9~D

1 2

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

HDA_SDIN0_R

SENSE_A

SENSE_B

+AVDD_AUDIO

EAPD#

HP1_CD_L

HP1_CD_R

HP2_CD_L

HP2_CD_R

SPK_CD_L

SPK_CD_R

MIC_CD_L

MIC_CD_R

HP1_AMP_R

HP1_AMP_LHP_AMP_MUTE#

HP2_AMP_R

HP2_AMP_LHP_AMP_MUTE#

HP1_AMP_R

HP1_AMP_L HP1_AMP_L1_JKHP1_AMP_L1

HP1_AMP_R1 HP1_AMP_R1_JK

HP2_AMP_R

HP2_AMP_L HP2_AMP_L1_JKHP2_AMP_L1

HP2_AMP_R1 HP2_AMP_R1_JK

MIC_CD_R1_JK

MIC_CD_L1_JKMIC_CD_L

MIC_CD_R

MIC_CD_L1

MIC_CD_R1

HP1_AMP_L1_JK

HP1_AMP_R1_JK

MIC_CD_L1_JK

MIC_CD_R1_JK

HP2_AMP_L1_JK

HP2_AMP_R1_JK

BEEP_C#

SB_SPKR_C

MIC_JD

SENSE_B

HP2_JD

HP1_JD

SENSE_A

HP1_JD

MIC_JD

HP2_JD

PC_BEEP

PC_BEEP

HP1_JD

HP2_JD

HP_JD

HP1_CD_L2

HP1_CD_R2

HP1_CD_L1

HP1_CD_R1

HP2_CD_L2

HP2_CD_R2HP2_CD_R1

HP2_CD_L1

EC_SUB_MUTE#

EAPD#

EA_EC_SPK_MUTE#

EA_EC_SUB_MUTE#

EC_SPK_HP_MUTE#

EAPD#

HP_JD

EA_EC_SPK_MUTE#

HP_JD

EA_EC_SUB_MUTE#

HP_JD

HP_AMP_MUTE#

EA_EC_SPK_MUTE#

HP_JD#

HP2_CD_R

HP2_CD_L

HP1_CD_L

HP1_CD_R

HDA_BITCLK_AUDIO<15>

HDA_SDIN0<15>

HDA_SDOUT_AUDIO<15>

HDA_SYNC_AUDIO<15>

HDA_RST_AUDIO#<15>

PCH_SPKR<15>

DMIC_CLK<30>

DMIC0<30>

BEEP#<31> PC_BEEP <26>

SPK_CD_L <26>

SPK_CD_R <26>

ACIN <17,31,40,41>

EC_SPK_HP_MUTE#<31>

EC_SUB_MUTE#<31>

SUB_AMP_MUTE# <26>

SPK_AMP_MUTE# <26>

+DVDD_AUDIO+3VS +5VS+AVDD_AUDIO

+MIC1_VREFO

+3VS

+3VS

+MIC1_VREFO

+3VS +3VS

+AVDD_AUDIO

+3VS

+AVDD_AUDIO

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HD Audio_IDT92HD73C

Custom

25 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HD Audio_IDT92HD73C

Custom

25 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HD Audio_IDT92HD73C

Custom

25 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Reserved for TEST

GND AGND

Int. Speaker and

Sub woofer

Rear or MIC

Place close to Jack

Center

Place close to Jack

Front

+MIC1_VREFO W=10 mil

75mA 132mA

Place close to Jack

1226 Modify

Int. 60k pull up.

1226 Modify

1226 Modify

R0.3 Modify

R0.3 Modify

R0.3 Modify

R1.0 Modify

R1.0 Modify

G

D

S

Q43

PMF3800SN_SC70-3

G

D

S

Q43

PMF3800SN_SC70-3

2

13

C1118

0.1U_0402_10V6K~D

C1118

0.1U_0402_10V6K~D

1 2

C1108

270P_0402_50V7K~D

C1108

270P_0402_50V7K~D

1 2

R248

0_0603_5%~D

R248

0_0603_5%~D

12

C342

100P_0402_50V8J~D

@

C342

100P_0402_50V8J~D

@

1

2

Q42B

2N7002DW-7-F_SOT363-6~D

Q42B

2N7002DW-7-F_SOT363-6~D

3

5

4

C334

10U_0603_6.3V6M~D

C334

10U_0603_6.3V6M~D

1

2

R545

5.1K_0402_1%~D

R545

5.1K_0402_1%~D

1 2

R247

0_0603_5%~D

R247

0_0603_5%~D

12

C353

100P_0402_50V8J~D

C353

100P_0402_50V8J~D

1

2

U11

92HD73C1X5PRGXC1X8_QFP48_7X7

U11

92HD73C1X5PRGXC1X8_QFP48_7X7

PORTE_L 14

PORTE_R 15

PORTF_R 17

PORTF_L 16

PORTC_L 23

PORTC_R 24

PORTI_L

18

PORTI_R

20 PORTI_C

19

PORTB_L 21

PORTB_R 22

SENSE_A

13

PCBEEP

12

PORTD_L 35

PORTD_R 36

VREFOUT-A 37

RESET#

11

SYNC

10

BITCLK

6

SDO

5

SDI_CODEC

8

VOL_UP/DMIC_CLK/GPIO1

2

DVDD_IO 3

VREFOUT-C 29

DMIC1/GPIO5

30

VREFOUT-B 28

VREFFILT 27

DVDD_CORE 1

DVDD_CORE 9

AVDD1 25

AVDD2 38

SENSE_C

32

PORTH_R 46

EAPD/SPDIF IN/GPIO0

47

SPDIF OUT0 48

VOL_DN/DMIC_0/GPIO2

4

DVSS

7

VREFOUT-E 31

CAP2 33

SENSE_B

34

PORTG_L 43

PORTG_R 44

PORTH_L 45

SPDIF OUT1/GPIO3 40

AVSS1

26

AVSS2

42

PORTA_L 39

PORTA_R 41

C354

2.2U_0805_10V7K~D

C354

2.2U_0805_10V7K~D

R1217 20K_0402_1%~DR1217 20K_0402_1%~D

1 2

C341

100P_0402_50V8J~D

@

C341

100P_0402_50V8J~D

@

1

2

C357

1000P_0402_50V7K~D

C357

1000P_0402_50V7K~D

1

2

R264

499K_0402_1%~D

R264

499K_0402_1%~D

1 2

C352

100P_0402_50V8J~D

C352

100P_0402_50V8J~D

1

2

R257

4.7K_0402_5%~D

R257

4.7K_0402_5%~D

12

R256

4.7K_0402_5%~D

R256

4.7K_0402_5%~D

12

C351

1U_0603_10V4Z~D

C351

1U_0603_10V4Z~D

1

2

R1220

10K_0402_5%~D

R1220

10K_0402_5%~D

12

D31

PACDN042Y3R_SOT23-3~D@

D31

PACDN042Y3R_SOT23-3~D@

2

3

1

C355

2.2U_0805_10V7K~D

C355

2.2U_0805_10V7K~D

D53

CH751H-40PT_SOD323-2~D

D53

CH751H-40PT_SOD323-2~D

2 1

C331

0.1U_0402_10V6K~D

C331

0.1U_0402_10V6K~D

1

2

R261

68_0603_1%~D

R261

68_0603_1%~D

1 2

C337

2.2U_0805_10V7K~D

C337

2.2U_0805_10V7K~D

L16

BLM18BD601SN1D_0603~D

L16

BLM18BD601SN1D_0603~D

1 2

C946

0.1U_0402_16V4Z~D

C946

0.1U_0402_16V4Z~D

1 2

R262

68_0603_1%~D

R262

68_0603_1%~D

1 2

R543

5.1K_0402_1%~D

R543

5.1K_0402_1%~D

1 2

C335

1U_0402_6.3V6K~D

C335

1U_0402_6.3V6K~D

1

2

SHLD1

SHLD2

NPTH1

NPTH2

JHP1

FOX_JA6333L-B5S4-7F

CONN@

SHLD1

SHLD2

NPTH1

NPTH2

JHP1

FOX_JA6333L-B5S4-7F

CONN@

1

2

3

4

5

6

7

8

9

10

C945

0.1U_0402_16V4Z~D

C945

0.1U_0402_16V4Z~D

1 2

C356

1000P_0402_50V7K~D

C356

1000P_0402_50V7K~D

1

2

SHLD1

SHLD2

NPTH1

NPTH2

JHP2

FOX_JA6333L-B5S4-7F

CONN@

SHLD1

SHLD2

NPTH1

NPTH2

JHP2

FOX_JA6333L-B5S4-7F

CONN@

1

2

3

4

5

6

7

8

9

10

R1221

2K_0402_1%~D

R1221

2K_0402_1%~D

1 2

C336

2.2U_0805_10V7K~D

C336

2.2U_0805_10V7K~D

R249 33_0402_5%~DR249 33_0402_5%~D

1 2

L15

BLM18BD601SN1D_0603~D

L15

BLM18BD601SN1D_0603~D

1 2

C1120 270P_0402_50V7K~DC1120 270P_0402_50V7K~D

1 2

C327

0.1U_0402_10V6K~D

C327

0.1U_0402_10V6K~D

1

2

C345 1000P_0402_50V7K~DC345 1000P_0402_50V7K~D

1 2

C343

1000P_0402_50V7K~D

C343

1000P_0402_50V7K~D

1

2

R1219 10K_0402_5%~DR1219 10K_0402_5%~D

1 2

C325

1U_0603_10V4Z~D

C325

1U_0603_10V4Z~D

1

2

R546

20K_0402_1%~D

R546

20K_0402_1%~D

12

U12

MAX4411ETP+T_TQFN20_4X4

U12

MAX4411ETP+T_TQFN20_4X4

C1P

1

PGND

2

C1N

3

NC-4 4

PVss

5

NC-6 6

SVss

7

NC-8 8

OUTL 9

SVDD 10

INR

15

SHDNR#

14

INL

13

NC-12 12

OUTR 11

NC-20 20

PVDD 19

SHDNL#

18

SGND

17

NC-16 16

PAD 21

L19

BLM18BD601SN1D_0603~D

L19

BLM18BD601SN1D_0603~D

1 2

L18

BLM18BD601SN1D_0603~D

L18

BLM18BD601SN1D_0603~D

1 2

U58

74AHC1G08GW_SOT353-5~D

U58

74AHC1G08GW_SOT353-5~D

IN1

1

IN2

2

G

3

O4

P5

R1163 0_0402_5%~D

@

R1163 0_0402_5%~D

@

1 2

G

D

S

Q69

PMF3800SN_SC70-3

G

D

S

Q69

PMF3800SN_SC70-3

2

13

R269 0_0805_5%~D@R269 0_0805_5%~D@1 2

C344

1000P_0402_50V7K~D

C344

1000P_0402_50V7K~D

1

2

C330

1U_0402_6.3V6K~D

C330

1U_0402_6.3V6K~D

1

2

C350

2.2U_0603_10V7K~D

C350

2.2U_0603_10V7K~D

1 2

C339

1U_0603_10V4Z~D

C339

1U_0603_10V4Z~D

12

C865

1000P_0402_50V7K~D

C865

1000P_0402_50V7K~D

1

2

R978

100K_0402_5%~D

R978

100K_0402_5%~D

12

C1121 270P_0402_50V7K~DC1121 270P_0402_50V7K~D

1 2

U60

74AHC1G08GW_SOT353-5~D

U60

74AHC1G08GW_SOT353-5~D

IN1

1

IN2

2

G

3

O4

P5

C349

2.2U_0603_10V7K~D

C349

2.2U_0603_10V7K~D

1 2

R547

39.2K_0402_1%

R547

39.2K_0402_1%

12

R1218 10K_0402_5%~DR1218 10K_0402_5%~D

1 2

C1119

0.1U_0402_10V6K~D

C1119

0.1U_0402_10V6K~D

1 2

R268 0_0805_5%~DR268 0_0805_5%~D

1 2

R1241 0_0402_5%~DR1241 0_0402_5%~D

1 2

R1213

2K_0402_1%~D

R1213

2K_0402_1%~D

1 2

C360

1U_0603_10V4Z~D

C360

1U_0603_10V4Z~D

1

2

R1222

2K_0402_1%~D

R1222

2K_0402_1%~D

1 2

R266

499K_0402_1%~D

R266

499K_0402_1%~D

1 2

U59

74AHC1G08GW_SOT353-5~D

U59

74AHC1G08GW_SOT353-5~D

IN1

1

IN2

2

G

3

O4

P5

R1240 0_0402_5%~DR1240 0_0402_5%~D

1 2

D32

PACDN042Y3R_SOT23-3~D@

D32

PACDN042Y3R_SOT23-3~D@

2

3

1

U57

74AHC1G08GW_SOT353-5~D

U57

74AHC1G08GW_SOT353-5~D

IN1

1

IN2

2

G

3

O4

P5

R251

68_0603_1%~D

R251

68_0603_1%~D

1 2

C333

1U_0402_6.3V6K~D

C333

1U_0402_6.3V6K~D

1

2

C866

1000P_0402_50V7K~D

C866

1000P_0402_50V7K~D

1

2

C332

10U_0603_6.3V6M~D

C332

10U_0603_6.3V6M~D

1

2

Q42A

2N7002DW-7-F_SOT363-6~D

Q42A

2N7002DW-7-F_SOT363-6~D

61

2

C358 1U_0603_10V4Z~DC358 1U_0603_10V4Z~D

1 2

U56

74AHC1G08GW_SOT353-5~D

U56

74AHC1G08GW_SOT353-5~D

IN1

1

IN2

2

G

3

O4

P5

R270 0_0805_5%~D@R270 0_0805_5%~D@1 2

R971

100K_0402_5%~D

R971

100K_0402_5%~D

12

U53

TC7SZ02FU_SSOP5

U53

TC7SZ02FU_SSOP5

INB

1

INA

2

P5

G

3

Y4

R1214 10K_0402_5%~DR1214 10K_0402_5%~D

1 2

C1117

0.1U_0402_10V6K~D

C1117

0.1U_0402_10V6K~D

1 2

C326

0.1U_0402_10V6K~D

C326

0.1U_0402_10V6K~D

1

2

C1107

270P_0402_50V7K~D

C1107

270P_0402_50V7K~D

1 2

C348

10U_0603_6.3V6M~D

C348

10U_0603_6.3V6M~D

1

2

C338 1U_0603_10V4Z~DC338 1U_0603_10V4Z~D

1 2

C1075 0.1U_0402_10V6K~D

C1075 0.1U_0402_10V6K~D

1 2

SHLD1

SHLD2

NPTH1

NPTH2

JMIC1

FOX_JA6333L-B5S4-7F

CONN@

SHLD1

SHLD2

NPTH1

NPTH2

JMIC1

FOX_JA6333L-B5S4-7F

CONN@

1

2

3

4

5

6

7

8

9

10

R544

39.2K_0402_1%

R544

39.2K_0402_1%

12

R979

100K_0402_5%~D

R979

100K_0402_5%~D

12

R1212

2K_0402_1%~D

R1212

2K_0402_1%~D

1 2

C1086

0.1U_0402_16V4Z~D

C1086

0.1U_0402_16V4Z~D

1 2

L17

BLM18BD601SN1D_0603~D

L17

BLM18BD601SN1D_0603~D

1 2

C1087

0.1U_0402_16V4Z~D

C1087

0.1U_0402_16V4Z~D

1 2

R267

10K_0402_5%~D@

R267

10K_0402_5%~D@

1 2

D33

PACDN042Y3R_SOT23-3~D@

D33

PACDN042Y3R_SOT23-3~D@

2

3

1

C328

0.1U_0402_10V6K~D

C328

0.1U_0402_10V6K~D

1

2

C347

1U_0402_6.3V6K~D

C347

1U_0402_6.3V6K~D

1

2

R252

68_0603_1%~D

R252

68_0603_1%~D

1 2

L14

BLM18BD601SN1D_0603~D

L14

BLM18BD601SN1D_0603~D

1 2

U10

MAX4411ETP+T_TQFN20_4X4

U10

MAX4411ETP+T_TQFN20_4X4

C1P

1

PGND

2

C1N

3

NC-4 4

PVss

5

NC-6 6

SVss

7

NC-8 8

OUTL 9

SVDD 10

INR

15

SHDNR#

14

INL

13

NC-12 12

OUTR 11

NC-20 20

PVDD 19

SHDNL#

18

SGND

17

NC-16 16

PAD 21

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AMP_SPK_JK_L+

AMP_SPKR-

AMP_SPKL+_LAMP_SPKL+

AMP_SPK_JK_L-

AMP_SPK_JK_R-

AMP_SPK_JK_R+

AMP_SPK_JK_L+

AMP_SPK_JK_R+AMP_SPKR+

AMP_SPK_JK_R-

AMP_SPKR+_R

AMP_SPK_JK_L-

SPK_AMP_MUTE_R#

AMP_SPKL-

AMP_SW-

AMP_SW-

AMP_SW+

SUB_FB_L2

SUB_FB_L3

SUB_IN_L

SUB_FB_L SUB_FB_L1

SUB_FB_L4 AMP_SW+ AMP_SW_JK+

SUB_IN_R

SUB_CD_R2SUB_CD_R1SPK_CD_R

SPK_CD_L

SUB_CD_R

SUB_CD_L

SUB_FB_L

AMP_SW_JK-

SPK_CD_R SPK_CD_R4

SPK_CD_R2

SPK_CD_R3SPK_CD_R1

SPK_CD_R2_FBL

PC_BEEP

SPK_CD_L2

SPK_CD_L4SPK_CD_L3SPK_CD_L

PC_BEEP_1

SPK_CD_L1

SPKER_CD_L2_FBL

PC_BEEP PC_BEEP_2

SPK_AMP_MUTE_R#

SPK_AMP_MUTE#

SUB_AMP_MUTE#

SUB_AMP_MUTE_R#

SUB_AMP_MUTE_R#

SPK_CD_R<25>

SPK_CD_L<25>

PC_BEEP<25>

SPK_CD_R<25>

PC_BEEP<25>

SPK_CD_L<25>

SPK_AMP_MUTE#<25>

SUB_AMP_MUTE#<25>

B+

+3VS

B+

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Sub woofer / Speaker AMP

Custom

26 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Sub woofer / Speaker AMP

Custom

26 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Sub woofer / Speaker AMP

Custom

26 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

1A/40mil

Internal Regulator Output.

Internal 2V Bias.

19V

Speaker Connector

15 mils trace

High-Pass Filiter,fc=500Hz, Av=1.45V/V

Mono Select. Set MONO high for mono mode.

For filterless modualation/spread-spectrum mode

1A/40mil

Internal Regulator Output.

Internal 2V Bias.

High-Pass Filiter,fc=100 Hz, 500Hz, Av=1.45V/V

For filterless modualation/spread-spectrum mode

SUB WOOFER amp impedance of JBL is 4 ohm.

Speaker amp impedance of JBL is 4 ohm.

R0.3 add

R0.3 Modify

R0.3 Modify

R0.3 Modify

R1.0 add

U14

MAX9736AETJ+T_TQFN32_7X7

U14

MAX9736AETJ+T_TQFN32_7X7

NC2 8

NC3 17

PVDD1

27

NC1 7

OUTL-2 2

OUTL-1 1

OUTL+2 32

OUTL+1 31

OUTR+1 25

OUTR+2 26

OUTR-1 23

OUTR-2 24

PVDD2

30

PGND1

29 PGND2

28

FB_L

5

IN_L

6

FB_R

19

IN_R

18

VS

16

AGND

13

AGND

14

SHDN#

10

REGEN

11

MUTE#

9

MODE

20

MONO

4

REG

15

COM

12 BOOT 3

C1P

22

C1N

21 EP 33

C1105

1U_0603_25V6-K~D

C1105

1U_0603_25V6-K~D

1

2

L88

BLM18PG181SN1_0603~D

L88

BLM18PG181SN1_0603~D

1 2

R1198

6.49K_0402_1%~D

R1198

6.49K_0402_1%~D

1 2

C914

0.022U_0402_25V7K~D

C914

0.022U_0402_25V7K~D

1 2

C1558

2.2U_0603_10V6K~D

C1558

2.2U_0603_10V6K~D

1

2

L69

BLM18PG181SN1_0603~D

L69

BLM18PG181SN1_0603~D

1 2

C912 0.1U_0402_10V6K~DC912 0.1U_0402_10V6K~D

1 2

C903

22U_1210_25V6K~D

C903

22U_1210_25V6K~D

1

2

L67

BLM18PG181SN1_0603~D

L67

BLM18PG181SN1_0603~D

1 2

C906

330P_0402_50V7K~D

C906

330P_0402_50V7K~D

1

2

D20

PESD24VS2UT_SOT23-3~D

@D20

PESD24VS2UT_SOT23-3~D

@

2

3

1

R904 17.8K_0402_1%R904 17.8K_0402_1%

1 2

C911 1U_0603_10V6K~D

C911 1U_0603_10V6K~D

1 2

C1103

0.1U_0603_50V4Z~D

C1103

0.1U_0603_50V4Z~D

1

2

R1568

330K_0402_5%

R1568

330K_0402_5%

1 2

C907

330P_0402_50V7K~D

C907

330P_0402_50V7K~D

1

2

C1099 0.01U_0402_16V7K~DC1099 0.01U_0402_16V7K~D

1 2

C908 0.1U_0402_10V6K~DC908 0.1U_0402_10V6K~D

1 2

R1196

100K_0402_1%~D

R1196

100K_0402_1%~D

1 2

C923

1U_0603_25V6-K~D

C923

1U_0603_25V6-K~D

1

2

C1095

1U_0603_10V6K~D

C1095

1U_0603_10V6K~D

1 2

R905

11K_0402_1%

R905

11K_0402_1%

1 2

R1202 0_0402_5%~DR1202 0_0402_5%~D

1 2

C1088

330P_0402_50V7K~D

C1088

330P_0402_50V7K~D

1

2

R907

182K_0402_1%

R907

182K_0402_1%

1 2

R1195

10K_0402_1%~D

R1195

10K_0402_1%~D

1 2

JWFER1

MOLEX_53398-0271~D

JWFER1

MOLEX_53398-0271~D

1

1

2

2

G1

3

G2

4

R902

182K_0402_1%

R902

182K_0402_1%

1 2

R1200

15.8K_0402_1%

R1200

15.8K_0402_1%

1 2

U13

MAX9736AETJ+T_TQFN32_7X7

U13

MAX9736AETJ+T_TQFN32_7X7

NC2 8

NC3 17

PVDD1

27

NC1 7

OUTL-2 2

OUTL-1 1

OUTL+2 32

OUTL+1 31

OUTR+1 25

OUTR+2 26

OUTR-1 23

OUTR-2 24

PVDD2

30

PGND1

29 PGND2

28

FB_L

5

IN_L

6

FB_R

19

IN_R

18

VS

16

AGND

13

AGND

14

SHDN#

10

REGEN

11

MUTE#

9

MODE

20

MONO

4

REG

15

COM

12 BOOT 3

C1P

22

C1N

21 EP 33

R906

182K_0402_1%

R906

182K_0402_1%

1 2

D21

PESD24VS2UT_SOT23-3~D

@D21

PESD24VS2UT_SOT23-3~D

@

2

3

1

C1094

330P_0402_50V7K~D

C1094

330P_0402_50V7K~D

1

2

C1106

1U_0603_25V6-K~D

C1106

1U_0603_25V6-K~D

1

2

C1091

22U_1210_25V6K~D

C1091

22U_1210_25V6K~D

1

2

C917

330P_0402_50V7K~D

C917

330P_0402_50V7K~D

1

2

R900

11K_0402_1%

R900

11K_0402_1%

1 2

L86

22UH_LQH55PN220MR0L_0.85A_20%~D

L86

22UH_LQH55PN220MR0L_0.85A_20%~D

1 2

C1097

0.047U_0402_16V7K~D

C1097

0.047U_0402_16V7K~D

1 2

C1089

22U_1210_25V6K~D

C1089

22U_1210_25V6K~D

1

2

D59

SDMK0340L-7-F_SOD323-2~D

D59

SDMK0340L-7-F_SOD323-2~D

1 2

R1201

9.09K_0402_1%~D

R1201

9.09K_0402_1%~D

1 2

C1090

22U_1210_25V6K~D

C1090

22U_1210_25V6K~D

1

2

L70

BLM18PG181SN1_0603~D

L70

BLM18PG181SN1_0603~D

1 2

C913

2200P_0402_25V7K~D

C913

2200P_0402_25V7K~D

1 2

R903

16.5K_0402_1%

R903

16.5K_0402_1%

1 2

R1567

330K_0402_5%

R1567

330K_0402_5%

1 2

R1199

9.09K_0402_1%~D

R1199

9.09K_0402_1%~D

1 2

C1093

0.1U_0603_50V4Z~D

C1093

0.1U_0603_50V4Z~D

1

2

C1553

2.2U_0603_10V6K~D

C1553

2.2U_0603_10V6K~D

1

2

R1194

11.5K_0402_1%

R1194

11.5K_0402_1%

1 2

C1101

0.1U_0402_16V7K~D

C1101

0.1U_0402_16V7K~D

1

2

C1104

1U_0603_25V6-K~D

C1104

1U_0603_25V6-K~D

1

2

C1092

0.1U_0603_50V4Z~D

C1092

0.1U_0603_50V4Z~D

1

2

C909

2200P_0402_25V7K~D

C909

2200P_0402_25V7K~D

1 2

C925

1U_0603_25V6-K~D

C925

1U_0603_25V6-K~D

1

2

L85

22UH_LQH55PN220MR0L_0.85A_20%~D

L85

22UH_LQH55PN220MR0L_0.85A_20%~D

1 2

C902

22U_1210_25V6K~D

C902

22U_1210_25V6K~D

1

2

R910 0_0402_5%~DR910 0_0402_5%~D

1 2

R901

182K_0402_1%

R901

182K_0402_1%

1 2

L87

BLM18PG181SN1_0603~D

L87

BLM18PG181SN1_0603~D

1 2

C1100 0.47U_0603_10V7K~DC1100 0.47U_0603_10V7K~D

1 2

JSPK1

MOLEX_53261-0471

CONN@

JSPK1

MOLEX_53261-0471

CONN@

1

1

2

2

3

3

4

4G5 5

G6 6

C924

0.1U_0603_50V4Z~D

C924

0.1U_0603_50V4Z~D

1

2

C915 1U_0603_10V6K~D

C915 1U_0603_10V6K~D

1 2

C926

1U_0603_25V6-K~D

C926

1U_0603_25V6-K~D

1

2

R1197

20K_0402_1%~D

R1197

20K_0402_1%~D

1 2

R908

16.5K_0402_1%

R908

16.5K_0402_1%

1 2

C901

22U_1210_25V6K~D

C901

22U_1210_25V6K~D

1

2

C910

0.022U_0402_25V7K~D

C910

0.022U_0402_25V7K~D

1 2

L68

BLM18PG181SN1_0603~D

L68

BLM18PG181SN1_0603~D

1 2

C1102

0.1U_0805_50V7M~D

C1102

0.1U_0805_50V7M~D

12

C921

330P_0402_50V7K~D

C921

330P_0402_50V7K~D

1

2

C1098 0.47U_0603_10V7K~DC1098 0.47U_0603_10V7K~D

1 2

C922

0.1U_0805_50V7M~D

C922

0.1U_0805_50V7M~D

12

C1096

0.047U_0402_16V7K~D

C1096

0.047U_0402_16V7K~D

1 2

C905

0.1U_0603_50V4Z~D

C905

0.1U_0603_50V4Z~D

1

2

C904

0.1U_0603_50V4Z~D

C904

0.1U_0603_50V4Z~D

1

2

D60

SDMK0340L-7-F_SOD323-2~D

D60

SDMK0340L-7-F_SOD323-2~D

1 2

R909 17.8K_0402_1%R909 17.8K_0402_1%

1 2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

ICH_PCIE_W AKE#

WW AN_CLKREQ#

WW AN_RADIO_OFF#

PLT_RST#

USBP5_D+

UIM_CLK

UIM_RST

UIM_DATA

USBP5_D-

UIM_CLK

CLK_PCIE_W AN

CLK_PCIE_W AN#

UIM_DATA

UIM_RST

USBP4_D-

USBP4_D+

ICH_PCIE_W AKE#

CLK_PCIE_W LAN

WLAN_CLKREQ#

WLAN_RADIO_OFF#

COEX1_WLAN_ACTIVE

LPC_AD3

LPC_AD2

LPC_AD1

LPC_AD0

USBP5_D+

USBP5_D-

USBP4_D+

USBP4_D-

BT_ACTIVE

PCIE_IRX_W LANTX_N2

PCIE_ITX_C_WLANRX_N2

PCIE_IRX_W LANTX_P2

PCIE_ITX_C_WLANRX_P2

PCIE_IRX_W ANTX_N1

PCIE_IRX_W ANTX_P1

PCIE_ITX_C_WANRX_N1

PCIE_ITX_C_WANRX_P1

CLK_PCIE_W LAN#

WPAN_ACTIVE

UIM_VPP

COEX1_WLAN_ACTIVE

UIM_VPP

EC_SMB_CK2 <16,28,31>

EC_SMB_DA2 <16,28,31>

LPC_AD[0..3] <15,31>

LPC_FRAME# <15,31>

PLT_RST#<6,19,24,28,30,31>

PCIE_IRX_W LANTX_N2<16>

PCIE_ITX_C_WLANRX_P2<16>

PCIE_ITX_C_WLANRX_N2<16>

PCIE_IRX_W LANTX_P2<16>

PCIE_ITX_C_WANRX_N1<16>

PCIE_ITX_C_WANRX_P1<16>

PCIE_IRX_W ANTX_P1<16>

PCIE_IRX_W ANTX_N1<16>

CLK_PCIE_W LAN<16>

WLAN_CLKREQ#<16>

CLK_PCIE_W AN#<16>

CLK_PCIE_W AN<16>

WW AN_CLKREQ#<16>

EC_SMB_CK2 <16,28,31>

EC_SMB_DA2 <16,28,31>

ICH_PCIE_W AKE#<17,24,28,31>

ICH_PCIE_W AKE#<17,24,28,31>

PLT_RST# <6,19,24,28,30,31>

PLT_RST# <6,19,24,28,30,31>

WW AN_RADIO_OFF# <31>

WLAN_RADIO_OFF# <31>

CLK_PCIE_W LAN#<16>

COEX2_WLAN_ACTIVE<28,30>

WPAN_ACTIVE<28>

BT_ACTIVE<30>

USBP5+ <19>

USBP5- <19>

USBP4- <19>

USBP4+ <19>

CLK_DEBUG_PORT<19>

EC_RX_P80_DATA<31>

EC_TX_P80_DATA<17,31>

+1.5VS +3VS

+3VS

+UIM_PWR

+UIM_PWR

+3V_W LAN +1.5VS +3V_W LAN

+1.5VS

+1.5VS

+3VS

+3V_W LAN

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Mini Card_WLAN/WWAN

Custom

27 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Mini Card_WLAN/WWAN

Custom

27 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Mini Card_WLAN/WWAN

Custom

27 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

WWAN

Place as close as JSIM1

WLAN

Link ok

Don't forget to remove R287 or

disble debug port when doing

SIM Pre-test and before RTS.

R02 Modify

For EC debug pin

R914 0_0402_5%~DR914 0_0402_5%~D

1 2

R287 0_0402_5%~DR287 0_0402_5%~D

1 2

R912 0_0402_5%~DR912 0_0402_5%~D

1 2

R919 0_0402_5%~DR919 0_0402_5%~D

1 2

R997

10K_0402_5%~D

R997

10K_0402_5%~D

12

JW LAN1

TYCO_1775838-1~D

CONN@

JW LAN1

TYCO_1775838-1~D

CONN@

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

GND1

53

22

44

66

88

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

42 42

44 44

46 46

48 48

50 50

52 52

GND2 54

R285 0_0402_5%~DR285 0_0402_5%~D

1 2

C1116

47P_0402_50V8J~D

@

C1116

47P_0402_50V8J~D

@

1

2

C405

4.7U_0805_10V4Z~D

C405

4.7U_0805_10V4Z~D

1

2

D41

SRV05-4.TCT_SOT23-6~D

D41

SRV05-4.TCT_SOT23-6~D

2

3

1

4

6

5

C1113

47P_0402_50V8J~D

@

C1113

47P_0402_50V8J~D

@

1

2

R286 0_0402_5%~DR286 0_0402_5%~D

1 2

C409

4.7U_0805_10V4Z~D

C409

4.7U_0805_10V4Z~D

1

2

JW WAN1

TYCO_1775838-1~D

CONN@

JW WAN1

TYCO_1775838-1~D

CONN@

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

GND1

53

22

44

66

88

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

42 42

44 44

46 46

48 48

50 50

52 52

GND2 54

+

C956

330U_D2E_6.3VM_R25~D

+

C956

330U_D2E_6.3VM_R25~D

1

2

C412

4.7U_0805_10V4Z~D

C412

4.7U_0805_10V4Z~D

1

2

R923 0_0402_5%~DR923 0_0402_5%~D

1 2

JSIM1

MOLEX_475531001

CONN@

JSIM1

MOLEX_475531001

CONN@

VCC 1

RST 2

CLK 3

GND

5

VPP

6

I/O

7

NC

8NC 4

GND

9

GND

10

C408

.1U_0402_16V7K~D

C408

.1U_0402_16V7K~D

1

2

C404

.1U_0402_16V7K~D

C404

.1U_0402_16V7K~D

1

2

L72

DLW21SN121SQ2L_4P~D

@L72

DLW21SN121SQ2L_4P~D

@

11

44

3

3

2

2

R924 0_0402_5%~DR924 0_0402_5%~D

1 2

R913 0_0402_5%~DR913 0_0402_5%~D

1 2

R925 0_0402_5%~DR925 0_0402_5%~D

1 2

R922 0_0402_5%~DR922 0_0402_5%~D

1 2

C407

0.01U_0402_16V7K~D

C407

0.01U_0402_16V7K~D

1

2

R921 0_0402_5%~DR921 0_0402_5%~D

1 2

R920 0_0402_5%~DR920 0_0402_5%~D

1 2

C415

.1U_0402_16V7K~D

C415

.1U_0402_16V7K~D

1

2

R915 0_0402_5%~DR915 0_0402_5%~D

1 2

JP10@JP10@

1 2

R323 100K_0402_5%~DR323 100K_0402_5%~D

1 2

C1114

47P_0402_50V8J~D

@

C1114

47P_0402_50V8J~D

@

1

2

C413

.1U_0402_16V7K~D

C413

.1U_0402_16V7K~D

1

2

C411

33P_0402_50V8J~D

C411

33P_0402_50V8J~D

C416

4.7U_0805_10V4Z~D

C416

4.7U_0805_10V4Z~D

1

2

R916 0_0402_5%~DR916 0_0402_5%~D

1 2

C414

0.01U_0402_16V7K~D

C414

0.01U_0402_16V7K~D

1

2

D40

BAT54C-7-F_SOT23~D

D40

BAT54C-7-F_SOT23~D

2

3

1

C417

0.01U_0402_16V7K~D

C417

0.01U_0402_16V7K~D

1

2

C418

0.01U_0402_16V7K~D

C418

0.01U_0402_16V7K~D

1

2

R911 0_0402_5%~DR911 0_0402_5%~D

1 2

R291 0_0402_5%~DR291 0_0402_5%~D

1 2

R917 0_0402_5%~DR917 0_0402_5%~D

1 2

C403

0.01U_0402_16V7K~D

C403

0.01U_0402_16V7K~D

1

2

L71

DLW21SN121SQ2L_4P~D

@L71

DLW21SN121SQ2L_4P~D

@

11

44

3

3

2

2

C410

33P_0402_50V8J~D

C410

33P_0402_50V8J~D

R918 0_0402_5%~DR918 0_0402_5%~D

1 2

C1115

47P_0402_50V8J~D

@

C1115

47P_0402_50V8J~D

@

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USBP3_D-

USBP3_D+

USBP3_D-

USBP3_D+

ICH_PCIE_WAKE#

WPAN_RADIO_OFF#

CLK_PCIE_WPAN#

CLK_PCIE_WPAN

WPAN_CLKREQ#

PCIE_IRX_WPANTX_N3

PCIE_IRX_WPANTX_P3

PCIE_ITX_C_WPANRX_N3

PCIE_ITX_C_WPANRX_P3

PCIE_ITX_C_EXPRX_N5

PCIE_ITX_C_EXPRX_P5

PCIE_IRX_EXPTX_P5

PCIE_IRX_EXPTX_N5

EC_SMB_CK2

USBP8+

USBP8-

EXP_CLKREQ#

PERST#

EXPR_CPUSB#

EC_SMB_DA2

CLK_PCIE_EXPR

CLK_PCIE_EXPR#

WPAN_ACTIVE_R

PLT_RST#

EXPR_CPUSB#

CPPE#

PERST#

CPPE#

EC_SMB_CK2 <16,27,31>

EC_SMB_DA2 <16,27,31>PCIE_ITX_C_WPANRX_N3<16>

PCIE_ITX_C_WPANRX_P3<16>

PCIE_IRX_WPANTX_N3<16>

PCIE_IRX_WPANTX_P3<16>

PCIE_ITX_C_EXPRX_N5<16>

PCIE_ITX_C_EXPRX_P5<16>

PCIE_IRX_EXPTX_N5<16>

PCIE_IRX_EXPTX_P5<16>

CLK_PCIE_WPAN<16>

CLK_PCIE_WPAN#<16>

WPAN_CLKREQ#<16>

EC_SMB_CK2<16,27,31>

EC_SMB_DA2<16,27,31>

CLK_PCIE_EXPR#<16>

CLK_PCIE_EXPR<16>

EXP_CLKREQ#<16>

ICH_PCIE_WAKE#<17,24,27,31>

ICH_PCIE_WAKE#<17,24,27,31>

PLT_RST# <6,19,24,27,30,31>

PLT_RST#<6,19,24,27,30,31>

COEX2_WLAN_ACTIVE<27,30>

WPAN_ACTIVE<27>

WPAN_RADIO_OFF# <31>

USBP3- <19>

USBP3+ <19>

SYSON<31,33,44>

SUSP#<31,33,43,44,45>

USBP8-<19>

USBP8+<19>

+3VS+3VS +1.5VS

+3VS

+1.5VS

+3VS_CARD_AUX

+1.5VS_CARD

+3VS_CARD

+1.5VS_CARD

+3VS_CARD_AUX

+3VALW

+3VS_CARD

+3VS

+1.5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Mini Card_WPAN / Express

Custom

28 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Mini Card_WPAN / Express

Custom

28 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Mini Card_WPAN / Express

Custom

28 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

WPAN Card

Express Card

(1A)

(0.5A)

+1.5V_CARD Max. 650mA , Average 500mA

+3V_CARD Max. 1300mA, Average 1000mA

Express Card Power

Switch

U16

P2231NL E2_QFN20_4X4

U16

P2231NL E2_QFN20_4X4

3.3Vin

2

3.3Vin

17 3.3Vout 3

3.3Vout 15

SYSRST#

6

SHDNZ

20

STBYZ

1

PERSTZ 8

OCZ 19

RCLKEN

18

AUX_IN

12 AUX_OUT 11

CPPE#

10

CPUSB#

9NC 16

GND 7

NC 14

NC 13

NC 5

NC 4

JWPAN1

TYCO_1775838-1~D

JWPAN1

TYCO_1775838-1~D

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

GND1

53

22

44

66

88

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

42 42

44 44

46 46

48 48

50 50

52 52

GND2 54

C420

0.047U_0402_16V4Z~D

C420

0.047U_0402_16V4Z~D

1

2

C419

0.047U_0402_16V4Z~D

C419

0.047U_0402_16V4Z~D

1

2

R1162 0_0402_5%~DR1162 0_0402_5%~D

1 2

C430

4.7U_0805_10V4Z~D

C430

4.7U_0805_10V4Z~D

1

2

C434

0.1U_0402_16V4Z~D

C434

0.1U_0402_16V4Z~D

1

2

C423

0.1U_0402_16V4Z~D

C423

0.1U_0402_16V4Z~D

1

2

C433

0.1U_0402_16V4Z~D

C433

0.1U_0402_16V4Z~D

1

2

C427

0.1U_0402_16V4Z~D

C427

0.1U_0402_16V4Z~D

1

2

JEXP1

TAITW_PXPXAE-000LBS2ZZ4N0_NR

CONN@

JEXP1

TAITW_PXPXAE-000LBS2ZZ4N0_NR

CONN@

GND

1

USB-

2

USB+

3

CPUSB#

4

REV

5

REV

6

SMBCLK

7

SMBDATE

8

+1.5V

9

+1.5V

10

WAKE#

11

+3.3VAUX

12

PERST#

13

+3.3V

14

+3.3V

15

CLKREQ#

16

CPPE#

17

REFCLK-

18

REFCLK+

19

GND

20

PERn0

21

PERp0

22

GND

23

PETn0

24

PETp0

25

GND

26

G1

27

G2

28

G3

29

G4

30

C424

0.1U_0402_16V4Z~D

C424

0.1U_0402_16V4Z~D

1

2

C431

0.1U_0402_16V4Z~D

C431

0.1U_0402_16V4Z~D

1

2

R292 0_0402_5%~DR292 0_0402_5%~D

1 2

C435

4.7U_0805_10V4Z~D

C435

4.7U_0805_10V4Z~D

1

2

R2950_0402_5%~D R2950_0402_5%~D

12

R294 0_0402_5%~DR294 0_0402_5%~D

1 2

R293 0_0402_5%~DR293 0_0402_5%~D

1 2

R298 0_0402_5%~DR298 0_0402_5%~D

1 2

C425

4.7U_0603_6.3V6M~D

C425

4.7U_0603_6.3V6M~D

1

2

C428

4.7U_0805_10V4Z~D

C428

4.7U_0805_10V4Z~D

1

2

R2960_0402_5%~D R2960_0402_5%~D

12

C432

0.1U_0402_16V4Z~D

C432

0.1U_0402_16V4Z~D

1

2

C421

0.047U_0402_16V4Z~D

C421

0.047U_0402_16V4Z~D

1

2

C429

0.1U_0402_16V4Z~D

C429

0.1U_0402_16V4Z~D

1

2

L26

DLW21SN121SQ2L_4P~D

@L26

DLW21SN121SQ2L_4P~D

@

11

44

3

3

2

2

C422

0.047U_0402_16V4Z~D

C422

0.047U_0402_16V4Z~D

1

2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

ESATA_ITX_DRX_N1

SATA_IRX_C_DTX_P1

SATA_IRX_C_DTX_N1

ESATA_ITX_C_DRX_P1

ESATA_ITX_DRX_P1

ESATA_ITX_C_DRX_N1

ESATA_IRX_DTX_N1

ESATA_IRX_DTX_P1

SATA_ITX_C_DRX_P1

SATA_ITX_C_DRX_N1

SATA_ITX_R_DRX_P1

ESATA_IRX_DTX_P1

ESATA_IRX_DTX_N1

SATA_IRX_DTX_P1

SATA_IRX_DTX_N1

SATA_ITX_C_DRX_P1

SATA_ITX_C_DRX_N1

SATA_IRX_R_DTX_P1

ESATA_ITX_C_DRX_P1

ESATA_ITX_C_DRX_N1

SATA_IRX_R_DTX_N1

SATA_ITX_R_DRX_N1

ESATA_ITX_C_DRX_N1

ESATA_ITX_C_DRX_P1

ESATA_IRX_C_DTX_N1ESATA_IRX_DTX_N1

ESATA_IRX_C_DTX_P1ESATA_IRX_DTX_P1

SATA_IRX_C_DTX_N4

SATA_ITX_C_DRX_N4

SATA_ITX_C_DRX_P4

SATA_IRX_C_DTX_P4

ESATA_ITX_DRX_N0

SATA_IRX_C_DTX_P0

SATA_IRX_C_DTX_N0

ESATA_ITX_C_DRX_P0

ESATA_ITX_DRX_P0

ESATA_ITX_C_DRX_N0

ESATA_IRX_DTX_N0

ESATA_IRX_DTX_P0

SATA_ITX_C_DRX_P0

SATA_ITX_C_DRX_N0

SATA_ITX_R_DRX_P0

ESATA_IRX_DTX_P0

ESATA_IRX_DTX_N0

SATA_IRX_DTX_P0

SATA_IRX_DTX_N0

SATA_ITX_C_DRX_P0

SATA_ITX_C_DRX_N0

SATA_IRX_R_DTX_P0

ESATA_ITX_C_DRX_P0

ESATA_ITX_C_DRX_N0

SATA_IRX_R_DTX_N0

SATA_ITX_R_DRX_N0

ESATA_IRX_C_DTX_N0

ESATA_ITX_C_DRX_N0

ESATA_ITX_C_DRX_P0

ESATA_IRX_DTX_N0

ESATA_IRX_DTX_P0 ESATA_IRX_C_DTX_P0

SATA_ITX_C_DRX_P1<15>

SATA_ITX_C_DRX_N1<15>

SATA_IRX_DTX_P1<15>

SATA_IRX_DTX_N1<15>

SATA_ITX_C_DRX_P0<15>

SATA_ITX_C_DRX_N0<15>

SATA_IRX_DTX_P0<15>

SATA_IRX_DTX_N0<15>

SATA_ITX_C_DRX_P4<15>

SATA_ITX_C_DRX_N4<15>

SATA_IRX_DTX_N4<15>

SATA_IRX_DTX_P4<15>

+SATA_PWR1

+SATA_PWR1

+5VS

+5VS

+5VS

+5VS

+5VS

+5VS

+1.8VS +SATA_PWR1

+SATA_PWR

+SATA_PWR

+SATA_PWR

+1.8VS +SATA_PWR

+SATA_PWR1

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

ODD/SATA HDD

Custom

29 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

ODD/SATA HDD

Custom

29 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

ODD/SATA HDD

Custom

29 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Place close U55 pin 21 & pin22

Place close U55 pin 2 & pin3

SATA HDD (On board)

Close to JSATA1.

SATA ODD CONN

SATA HDD

Close to ODD Conn

Close to JSATA2.

0 1

0

1

1 1

no equalization

[0:2.5dB] @ 1.6 GHz

[2.5:4.5dB] @ 1.6 GHz

[4.5:6.5dB] @ 1.6 GHz

Equalizer Selection

Compliance Channel

*

SEL0_ [A:B] SEL1_ [A:B]

0 0

Kink pin kink hole pin

HDD Conn.(REV.) –FOXCONN–SP01000LC0L layout Tyco–SP01000E70L layout

pin

1x

1.2x

Swing

Output Swing Control

0dB

-3.5dB

De-emphasis

Output De-emphasis Adjustment

SEL3_ [A:B]

1

0

* *

SEL2_ [A:B]

0

1

Place close U67 pin 21 & pin22

Place close U67 pin 2 & pin3

R0.3 depop

R0.3 change to SA00002YQ0L (S IC PI2EQX3201BLZFEX TQFN 36P)

R0.3 change to SA00002YQ0L (S IC PI2EQX3201BLZFEX TQFN 36P)

R1171 0_0402_5%~D@R1171 0_0402_5%~D@1 2

C453

0.1U_0402_16V7K~D

C453

0.1U_0402_16V7K~D

1

2

R1177 0_0402_5%~DR1177 0_0402_5%~D

1 2

RU82 0_0402_5%~D@RU82 0_0402_5%~D@1 2

C1084 0.01U_0402_16V7K~DC1084 0.01U_0402_16V7K~D

1 2

R1182 0_0402_5%~D@R1182 0_0402_5%~D@1 2

RU60 0_0402_5%~D@RU60 0_0402_5%~D@1 2

C1078

0.1U_0402_16V4Z~D

C1078

0.1U_0402_16V4Z~D

1

2

RU63 0_0402_5%~D@RU63 0_0402_5%~D@1 2

C1082

4700P_0402_25V7K~D

C1082

4700P_0402_25V7K~D

12

C448

1000P_0402_50V7K~D

C448

1000P_0402_50V7K~D

1

2

R1181 0_0402_5%~DR1181 0_0402_5%~D

1 2

RU75 0_0402_5%~DRU75 0_0402_5%~D

1 2

R1188 0_0402_5%~D@R1188 0_0402_5%~D@1 2

R1176 0_0402_5%~DR1176 0_0402_5%~D

1 2

RU77 5.1K_0402_1%~DRU77 5.1K_0402_1%~D

1 2

C449 0.01U_0402_25V7K~DC449 0.01U_0402_25V7K~D

12

R1191 0_0402_5%~D@R1191 0_0402_5%~D@1 2

JODD1

MOLEX_47639-3000_13P

CONN@

JODD1

MOLEX_47639-3000_13P

CONN@

GND

1

A+

2

A-

3

GND

4

B-

5

B+

6

GND

7

DP

8

V5

9

V5

10

MD

11

GND

12

GND

13

G1 14

G2 15

G3 16

RU79 5.1K_0402_1%~DRU79 5.1K_0402_1%~D

1 2

C446

0.1U_0402_16V7K~D

C446

0.1U_0402_16V7K~D

1

2

RU64 0_0402_5%~D@RU64 0_0402_5%~D@1 2

RU71 0_0402_5%~DRU71 0_0402_5%~D

1 2

RU80 470_0402_5%~D@RU80 470_0402_5%~D@1 2

C454

0.1U_0402_16V7K~D

C454

0.1U_0402_16V7K~D

1

2

R1172 0_0402_5%~D@R1172 0_0402_5%~D@1 2

R1174 0_0402_5%~D@R1174 0_0402_5%~D@1 2

R1192 0_0402_5%~D@R1192 0_0402_5%~D@1 2

JP11

@

JP11

@

1 2

R1170 0_0402_5%~D@R1170 0_0402_5%~D@1 2

RU66

470_0402_5%~D

RU66

470_0402_5%~D

12

CU48 0.01U_0402_25V7K~DCU48 0.01U_0402_25V7K~D

12

JP12

@

JP12

@

1 2

R1184 0_0402_5%~D@R1184 0_0402_5%~D@1 2

C452

10U_0805_10V4Z~D

C452

10U_0805_10V4Z~D

1

2

CU47

4700P_0402_25V7K~D

CU47

4700P_0402_25V7K~D

12

C439

1U_0603_10V4Z~D

C439

1U_0603_10V4Z~D

1

2

CU49 0.01U_0402_25V7K~DCU49 0.01U_0402_25V7K~D

12

RU70 0_0402_5%~D@RU70 0_0402_5%~D@1 2

CU46 0.01U_0402_16V7K~DCU46 0.01U_0402_16V7K~D

1 2

R1186 0_0402_5%~D@R1186 0_0402_5%~D@1 2

R1189 5.1K_0402_1%~DR1189 5.1K_0402_1%~D

1 2

RU73 0_0402_5%~DRU73 0_0402_5%~D

1 2

JSATA2

TYCO_1770615-3~D

JSATA2

TYCO_1770615-3~D

GND

1

RX+

2

RX-

3

GND

4

TX-

5

TX+

6

GND

7

3.3V

8

3.3V

9

3.3V

10

GND

11

GND

12

GND

13

5V

14

5V

15

5V

16

GND

17

Reserved

18

GND

19

12V

20

12V

21

12V

22 GND1 23

GND2 24

C1083 0.01U_0402_16V7K~DC1083 0.01U_0402_16V7K~D

1 2

RU68 0_0402_5%~D@RU68 0_0402_5%~D@1 2

CU38

10U_1206_16V4Z~D

CU38

10U_1206_16V4Z~D

1

2

CU40

0.1U_0402_16V4Z~D

CU40

0.1U_0402_16V4Z~D

1

2

R1168 0_0402_5%~D@R1168 0_0402_5%~D@1 2

C441

1000P_0402_50V7K~D

C441

1000P_0402_50V7K~D

1

2

CU44

4700P_0402_25V7K~D

CU44

4700P_0402_25V7K~D

12

RU67 0_0402_5%~DRU67 0_0402_5%~D

1 2

RU76 0_0402_5%~D@RU76 0_0402_5%~D@1 2

C1080

0.1U_0402_16V4Z~D

C1080

0.1U_0402_16V4Z~D

1

2

R1190 470_0402_5%~D@R1190 470_0402_5%~D@1 2

C1079

0.1U_0402_16V4Z~D

C1079

0.1U_0402_16V4Z~D

1

2

U67

PI2EQX3201BZFEX_TQFN36_6X5

U67

PI2EQX3201BZFEX_TQFN36_6X5

AI+

2

AI-

3

BI+ 22

BI- 21

SEL0_A

34

SEL0_B

13

SEL1_A

33

SEL1_B

14

SEL2_A

32

SEL2_B

15

AO+ 27

AO- 26

AGND 24

GND 4

GND 9

VDD 1

VDD 6

VDD 10

VDD 23

VDD 28

AVDD 5

BO+

7

EN_B

29 EN_A

30

SEL3_B

16 SEL3_A

31

BO-

8

OUT+ 17

OUT- 18

SD_A 36

GND 20

GND 25

SD_B 35

IREF

19

CLKIN+

11

CLKIN-

12 PAD 37

JSATA1

MOLEX_47662-2000_NR

MOLEX_47662-2000_22P-T

SP010812230

CONN@

JSATA1

MOLEX_47662-2000_NR

MOLEX_47662-2000_22P-T

SP010812230

CONN@

GND

1

A+

2

A-

3

GND

4

B-

5

B+

6

GND

7

V33

8

V33

9

V33

10

GND

11

GND

12

GND

13

V5

14

V5

15

V5

16

GND

17

Reserved

18

GND

19

V12

20

V12

21

V12

22

GND 23

GND 24

GND 25

U55

PI2EQX3201BZFEX_TQFN36_6X5

U55

PI2EQX3201BZFEX_TQFN36_6X5

AI+

2

AI-

3

BI+ 22

BI- 21

SEL0_A

34

SEL0_B

13

SEL1_A

33

SEL1_B

14

SEL2_A

32

SEL2_B

15

AO+ 27

AO- 26

AGND 24

GND 4

GND 9

VDD 1

VDD 6

VDD 10

VDD 23

VDD 28

AVDD 5

BO+

7

EN_B

29 EN_A

30

SEL3_B

16 SEL3_A

31

BO-

8

OUT+ 17

OUT- 18

SD_A 36

GND 20

GND 25

SD_B 35

IREF

19

CLKIN+

11

CLKIN-

12 PAD 37

R1185 0_0402_5%~DR1185 0_0402_5%~D

1 2

CU41

0.1U_0402_16V4Z~D

CU41

0.1U_0402_16V4Z~D

1

2

RU74 0_0402_5%~D@RU74 0_0402_5%~D@1 2

C445

10U_0805_10V4Z~D

C445

10U_0805_10V4Z~D

1

2

C455

1000P_0402_50V7K~D

C455

1000P_0402_50V7K~D

1

2

RU59 0_0402_5%~D@RU59 0_0402_5%~D@1 2

R1175 0_0402_5%~D@R1175 0_0402_5%~D@1 2

RU61 0_0402_5%~D@RU61 0_0402_5%~D@1 2

RU81 0_0402_5%~D@RU81 0_0402_5%~D@1 2

C437 0.01U_0402_16V7K~DC437 0.01U_0402_16V7K~D

1 2

R1169 0_0402_5%~D@R1169 0_0402_5%~D@1 2

CU42

0.1U_0402_16V4Z~D

CU42

0.1U_0402_16V4Z~D

1

2

C1085

4700P_0402_25V7K~D

C1085

4700P_0402_25V7K~D

12

R1193

470_0402_5%~D

R1193

470_0402_5%~D

12

CU45 0.01U_0402_16V7K~DCU45 0.01U_0402_16V7K~D

1 2

RU58 0_0402_5%~D@RU58 0_0402_5%~D@1 2

C1081

0.1U_0402_16V4Z~D

C1081

0.1U_0402_16V4Z~D

1

2

C1077

0.1U_0402_16V4Z~D

C1077

0.1U_0402_16V4Z~D

1

2

RU57 0_0402_5%~D@RU57 0_0402_5%~D@1 2

R1183 0_0402_5%~DR1183 0_0402_5%~D

1 2

R1178 0_0402_5%~D@R1178 0_0402_5%~D@1 2

CU39

0.1U_0402_16V4Z~D

CU39

0.1U_0402_16V4Z~D

1

2

RU78 0_0402_5%~D@RU78 0_0402_5%~D@1 2

C1076

10U_1206_16V4Z~D

C1076

10U_1206_16V4Z~D

1

2

R1180 0_0402_5%~DR1180 0_0402_5%~D

1 2

C447

0.1U_0402_16V7K~D

C447

0.1U_0402_16V7K~D

1

2

C438

10U_0805_10V4Z~D

C438

10U_0805_10V4Z~D

1

2

RU69 0_0402_5%~DRU69 0_0402_5%~D

1 2

RU72 0_0402_5%~D@RU72 0_0402_5%~D@1 2

R1179 0_0402_5%~D@R1179 0_0402_5%~D@1 2

RU62 0_0402_5%~D@RU62 0_0402_5%~D@1 2

C450 0.01U_0402_25V7K~DC450 0.01U_0402_25V7K~D

12

R1187 5.1K_0402_1%~DR1187 5.1K_0402_1%~D

1 2

R1173 0_0402_5%~D@R1173 0_0402_5%~D@1 2

C436 0.01U_0402_16V7K~DC436 0.01U_0402_16V7K~D

1 2

CU43

0.1U_0402_16V4Z~D

CU43

0.1U_0402_16V4Z~D

1

2

C440

0.1U_0402_16V4Z~D

C440

0.1U_0402_16V4Z~D

1

2

RU65 0_0402_5%~DRU65 0_0402_5%~D

1 2

ESATA_USB_OC#

PWRSHARE_OE#

USB_CHARGE_D+

USB_CHARGE_D- USBP0_R_D-

USBP0_R_D+

USBP10+

USBP10-

USBP11-

USBP11+

DMIC_CLK

DMIC0

USBP_P11

USBP_N11

BT_DET# BT_ACTIVE

COEX2_WLAN_ACTIVE

BT_OFF# USBP10+

BT_RADIO_OFF# USBP10-

DMIC_CLK

DMIC0

USBP_P11

USBP_N11

USBP0_D-

USBP0_D+

BT_ACTIVE

CB_CLKREQ#

PLT_RST#

PCIE_IRX_CBTX_P4

PCIE_IRX_CBTX_N4

PCIE_ITX_C_CBRX_P4

CLK_PCIE_CB

PCIE_ITX_C_CBRX_N4

CLK_PCIE_CB#

USB_DETECT

ESATA_ITX_DRX_N

SATA_IRX_C_DTX_P5

SATA_IRX_C_DTX_N5

ESATA_ITX_C_DRX_P

ESATA_ITX_DRX_P

ESATA_ITX_C_DRX_N

ESATA_IRX_DTX_N

ESATA_IRX_DTX_P

SATA_ITX_C_DRX_P5

SATA_ITX_C_DRX_N5

SATA_ITX_R_DRX_P5

ESATA_IRX_DTX_P

ESATA_IRX_DTX_N

SATA_IRX_DTX_P5

SATA_IRX_DTX_N5

SATA_ITX_C_DRX_P5

SATA_ITX_C_DRX_N5

SATA_IRX_R_DTX_P5

ESATA_ITX_C_DRX_P

ESATA_ITX_C_DRX_N

SATA_IRX_R_DTX_N5

SATA_ITX_R_DRX_N5

USB_DETECT

USB_DETECT#

USBP0_R_D+

USBP0_D-

USBP0_D+

USBP0_R_D-

ESATA_IRX_C_DTX_P

ESATA_IRX_C_DTX_N

ESATA_ITX_C_DRX_P

ESATA_ITX_C_DRX_N

ESATA_IRX_DTX_N

ESATA_IRX_DTX_P

USBP0+<19>

USBP0-<19>

USB_OC2#<19>

ESATA_USB_OC# <19>

PWRSHARE_EN#<31>

PWRSHARE_OE# <31>

DMIC0<25>

USBP11+<19>

USBP11-<19>

DMIC_CLK<25>

USBP10- <19>

USBP10+ <19>

BT_RADIO_OFF#<31>

BT_OFF#<31>

BT_ACTIVE <27>

COEX2_WLAN_ACTIVE<27,28>

USBP2-<19>

USBP2+<19>

BATT_CHG_LED#<31>

BATT_LOW_LED#<31>

USB_EN#<31>

USBP1+<19>

USBP1-<19>

USB_EN#<31>

CLK_PCIE_CB#<16>

CLK_PCIE_CB<16>

CB_CLKREQ#<16>

PLT_RST#<6,19,24,27,28,31>

USB_OC1#<19>

PCIE_ITX_C_CBRX_P4<16>

PCIE_ITX_C_CBRX_N4<16>

PCIE_IRX_CBTX_P4<16>

PCIE_IRX_CBTX_N4<16>

BT_DET#<31>

SATA_ITX_C_DRX_P5<15>

SATA_ITX_C_DRX_N5<15>

SATA_IRX_DTX_P5<15>

SATA_IRX_DTX_N5<15>

USB_DETECT#<32>

+5V_CHGUSB

+5VALW

+3VALW

+5V_CHGUSB

+3VS

+5VALW

+3VS

+3VS

+5V_CHGUSB

+3VS

+5VALW

+ESATA_PWR

+ESATA_PWR

+ESATA_PWR

+1.8VS +ESATA_PWR

+5V_CHGUSB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

USB/BlueTooth/Camera/ESATA

Custom

30 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

USB/BlueTooth/Camera/ESATA

Custom

30 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

USB/BlueTooth/Camera/ESATA

Custom

30 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

X

H

S Function

L

Disconnect

OE#

D=1D

H

L

L

S Logic"1" Work from BKT

D=2D

Camera Conn

to Single USB boardBluetooth

Place close JCAM1

Place close JESA1

Layout note: Pin5 thru

individual via to GND layer

Cardreader Connector

1x

1.2x

0 1

0

Swing

1

1 1

no equalization

[0:2.5dB] @ 1.6 GHz

Output Swing Control

0dB

-3.5dB

[2.5:4.5dB] @ 1.6 GHz

De-emphasis

Output De-emphasis Adjustment

SEL3_ [A:B]

[4.5:6.5dB] @ 1.6 GHz

1

0

*

*

Equalizer Selection

Compliance Channel

SEL2_ [A:B]

*

SEL0_ [A:B] SEL1_ [A:B]

0

1

0 0

Place close U40 pin 21 & pin22

Place close U40 pin 2 & pin3

R0.3 depop

R0.3 depop

R0.3 change to SA00002YQ0L (S IC PI2EQX3201BLZFEX TQFN 36P)

ESATA

R1.0 modify

C943 0.01U_0402_16V7K~DC943 0.01U_0402_16V7K~D

1 2

C938

0.1U_0402_16V4Z~D

C938

0.1U_0402_16V4Z~D

1

2

R958 0_0402_5%~D@R958 0_0402_5%~D@1 2

R301

43.2K_0402_1%~D

R301

43.2K_0402_1%~D

1 2

C461

0.1U_0402_16V4Z~D

C461

0.1U_0402_16V4Z~D

1

2

C463

10U_0805_10V4Z~D

C463

10U_0805_10V4Z~D

1

2

R951 0_0402_5%~D@R951 0_0402_5%~D@1 2

JCARD1

FOX_GS12301-1011A-9F~D

CONN@

JCARD1

FOX_GS12301-1011A-9F~D

CONN@

1

12

23

34

45

56

67

78

89

910

10 11

11 12

12 13

13 14

14 15

15 16

16 17

17 18

18 19

19 20

20 21

21 22

22 23

23 24

24 25

25 26

26 27

27 28

28 29

29 30

30

G1 31

G2 32

G3 33

G4 34

L28 BLM18BB221SN1D_2P~DL28 BLM18BB221SN1D_2P~D

12

C458

100P_0402_50V8J~D

C458

100P_0402_50V8J~D

1

2

R955 0_0402_5%~DR955 0_0402_5%~D

1 2

R968 470_0402_5%~D@R968 470_0402_5%~D@1 2

R961 0_0402_5%~DR961 0_0402_5%~D

1 2

C464 4700P_0402_25V7K~DC464 4700P_0402_25V7K~D

12

U17

TPS2062ADR_SO8~D

U17

TPS2062ADR_SO8~D

GND

1

IN

2

EN1#

3

EN2#

4

OC1# 8

OUT1 7

OUT2 6

OC2# 5

R1166 0_0402_5%~D@R1166 0_0402_5%~D@1 2

R303

100K_0402_5%~D

R303

100K_0402_5%~D

12

L27 WCM2012F2S-900T04_0805@L27 WCM2012F2S-900T04_0805@

1

122

33

4

4

R964 0_0402_5%~D@R964 0_0402_5%~D@1 2

C937

0.1U_0402_16V4Z~D

C937

0.1U_0402_16V4Z~D

1

2

JP13

@

JP13

@

1 2

R952 0_0402_5%~D@R952 0_0402_5%~D@1 2

R960 0_0402_5%~D@R960 0_0402_5%~D@1 2

R965 10K_0402_1%~DR965 10K_0402_1%~D

1 2

R954 0_0402_5%~DR954 0_0402_5%~D

1 2

C466

0.1U_0402_16V4Z~D

C466

0.1U_0402_16V4Z~D

1 2

R1167 0_0402_5%~D@R1167 0_0402_5%~D@1 2

USB

ESATA

JESA1

FOX_3Q3813C-RB1C3B-7F

CONN@

USB

ESATA

JESA1

FOX_3Q3813C-RB1C3B-7F

CONN@

VBUS

1

D-

2

D+

3

GND

4

GND

5

A+

6

A-

7

GND

8

B-

9

B+

10

GND

11

GND 14

GND 15

GND 16

GND 17

DET1

12

DET2

13

R966 0_0402_5%~D@R966 0_0402_5%~D@1 2

C456 47P_0402_50V8J~D

@

C456 47P_0402_50V8J~D

@

1 2

R963 0_0402_5%~DR963 0_0402_5%~D

1 2

C936

0.1U_0402_16V4Z~D

C936

0.1U_0402_16V4Z~D

1

2

U18

TS3USB221RSER_QFN10_2x1P5~D

U18

TS3USB221RSER_QFN10_2x1P5~D

D+ 8

2D+

3

GND

5OE# 6

S9

1D-

2

VCC 10

1D+

1

D- 7

2D-

4

JSUSB1

FCI_10089709-010010-LF

CONN@

JSUSB1

FCI_10089709-010010-LF

CONN@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

G1

11

G2

12

R1165 0_0402_5%~D@R1165 0_0402_5%~D@1 2

+

C460

150U_D2_6.3VM~D

+

C460

150U_D2_6.3VM~D

1

2

C939

0.1U_0402_16V4Z~D

C939

0.1U_0402_16V4Z~D

1

2

R962 0_0402_5%~D@R962 0_0402_5%~D@1 2

R304

49.9K_0402_1%~D

R304

49.9K_0402_1%~D

1 2

JBT1

HRS_DF12(3.0)-14DP-0.5V(86)~D

JBT1

HRS_DF12(3.0)-14DP-0.5V(86)~D

1

122

3

344

5

566

7

788

9

910 10

GND

15 GND 16

11

11 12 12

13

13 14 14

R299 0_0402_5%~DR299 0_0402_5%~D

12

G

D

S

Q63

PMF3800SN_SC70-3

@

G

D

S

Q63

PMF3800SN_SC70-3

@

2

13

C465 4700P_0402_25V7K~DC465 4700P_0402_25V7K~D

12

R1164 0_0402_5%~D@R1164 0_0402_5%~D@1 2

R967 10K_0402_1%~DR967 10K_0402_1%~D

1 2

R970 0_0402_5%~D@R970 0_0402_5%~D@1 2

C940

0.1U_0402_16V4Z~D

C940

0.1U_0402_16V4Z~D

1

2

R950 0_0402_5%~D@R950 0_0402_5%~D@1 2

C457 47P_0402_50V8J~D

@

C457 47P_0402_50V8J~D

@

1 2

R995

10K_0402_5%~D

@R995

10K_0402_5%~D

@

1 2

L89 WCM2012F2S-900T04_0805@L89 WCM2012F2S-900T04_0805@

1

122

33

4

4

R956 0_0402_5%~D@R956 0_0402_5%~D@1 2

R949 0_0402_5%~D@R949 0_0402_5%~D@1 2

JCAM1

MOLEX_48227-0701

CONN@

JCAM1

MOLEX_48227-0701

CONN@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

GND

8

GND

9

R957 0_0402_5%~D@R957 0_0402_5%~D@1 2

R1571 0_0402_5%~DR1571 0_0402_5%~D

1 2

U40

PI2EQX3201BZFEX_TQFN36_6X5

U40

PI2EQX3201BZFEX_TQFN36_6X5

AI+

2

AI-

3

BI+ 22

BI- 21

SEL0_A

34

SEL0_B

13

SEL1_A

33

SEL1_B

14

SEL2_A

32

SEL2_B

15

AO+ 27

AO- 26

AGND 24

GND 4

GND 9

VDD 1

VDD 6

VDD 10

VDD 23

VDD 28

AVDD 5

BO+

7

EN_B

29 EN_A

30

SEL3_B

16 SEL3_A

31

BO-

8

OUT+ 17

OUT- 18

SD_A 36

GND 20

GND 25

SD_B 35

IREF

19

CLKIN+

11

CLKIN-

12 PAD 37

C935

10U_0805_10V4Z~D

C935

10U_0805_10V4Z~D

1

2

D34

CM1293-04SO_SOT23-6@

D34

CM1293-04SO_SOT23-6@

CH3 6

Vp 5

CH4 4

CH2

3

Vn

2

CH1

1

C462

0.1U_0402_16V4Z~D

C462

0.1U_0402_16V4Z~D

1

2

D35

CM1293-04SO_SOT23-6@

D35

CM1293-04SO_SOT23-6@

CH3 6

Vp 5

CH4 4

CH2

3

Vn

2

CH1

1

R1572 0_0402_5%~DR1572 0_0402_5%~D

1 2

C942 0.01U_0402_16V7K~DC942 0.01U_0402_16V7K~D

1 2

R305

49.9K_0402_1%~D

R305

49.9K_0402_1%~D

1 2

R969 0_0402_5%~D@R969 0_0402_5%~D@1 2

R953

390_0402_5%

R953

390_0402_5%

12

C459

100P_0402_50V8J~D

C459

100P_0402_50V8J~D

1

2

R302

75K_0402_1%

R302

75K_0402_1%

1 2

R297 0_0402_5%~DR297 0_0402_5%~D

12

R959 0_0402_5%~D@R959 0_0402_5%~D@1 2

C944

4700P_0402_25V7K~D

C944

4700P_0402_25V7K~D

12

C941

4700P_0402_25V7K~D

C941

4700P_0402_25V7K~D

12

EC_PWM

FAN_SPEED1

EN_WOL#

ACOFF

BEEP#

AD_BID

TP_DATA

TP_CLK

TP_DATA

BT_OFF#

EC_SMB_CK2

EC_SMB_DA2

MSEN#

FSEL#SPICS#

IREF

EC_RX_P80_DATA

EN_DFAN1

PCIE_PME#

GFXVR_PWRGD

GATEA20

VGATE

KB_RST#

WWAN_RADIO_OFF#

SERIRQ

LPC_FRAME#LPC_FRAME#

MSEN#

LPC_AD2

LPC_AD3

LPC_AD1

LPC_AD0

CLK_PCI_EC

CLK_PCI_EC

PLT_RST#

EC_ENBKL

LCD_TST

EC_SCI#

PWR_BTN_LED#

KSI6

KSI[0..7]

KSI0

KSI2

KSI1

KSI5

KSI7

KSO13

KSO15

KSI4

KSI3

KSO14

KSO12

KSO7

KSO16

KSO0

KSO9

KSO[0..18]

KSO6

KSO3

KSO4

KSO11

KSO1

KSO10

KSO2

KSO8

BATT_LOW_LED#

EC_LID_OUT#

SUSP#

PBTN_OUT#

BATT_CHG_LED#

EC_SMB_CK2

EC_SMB_DA2

EC_SMB_CK1

EC_SMB_DA1

SYSON

PM_SLP_S5#

SLP_S3# EC_RSMRST#

XCLKO

XCLKI

ECAGND

FWR#SPI_SI

FRD#SPI_SO

EC_SMI# EC_ON

EC_ACIN

VR_ON

PCIE_PME#

FSTCHG

ON_OFF

BKOFF#

SPI_CLK

TP_CLK

ECAGND

ICH_PWROK

EC_RST#

EC_RST#

FSEL#SPICS#

SPI_SOFRD#SPI_SO

FWR#SPI_SISPI_SI

+SPI_R

SPI_CS#

SPI_CLK_R

SPI_CLK_R

USB_EN#

BT_DET#

KSO17

KB_BL_PWM#

EN_KBL#

EN_KBL#

SPI_SO

SPI_CS#

SPI_SI

SPI_CLK_R

+SPI_R

+SPI_R

KSO18

KSO5

WLAN_RADIO_OFF#

EC_SMB_DA1

EC_SMB_CK1

KSO5

ECAGND

BT_RADIO_OFF#

LCD_VCC_TEST_EN

PS_ID

BKLT_KB_DET#

WPAN_RADIO_OFF#

USB_DET#_DELAY

PWRSHARE_EN#

EC_SUB_MUTE#

LCD_TST

LID_SW# BT_RADIO_OFF#

PWRSHARE_OE#

EC_SPK_HP_MUTE#

EC_FB_SDATA

EC_FB_SCLK

EC_FB_SCLK

EC_FB_SDATA

TOUCHKEY_TINT

EC_TX_P80_DATA

ADP_I

BATT_TEMP

AD_BID

BATT_OVP

XCLKIXCLKO

CP_SEL

EC_ENBKL

EC_ACIN

SBPWR_EN

SPI_CLK_R

PCH_GPIO49

USB_DET#_DELAY

ECAGND

KSO1

KSO2

SUS_PWR_ACK_R

KSI4

LPC_FRAME#<15,27>

LPC_AD3<15,27>

LPC_AD2<15,27>

LPC_AD1<15,27>

LPC_AD0<15,27>

SERIRQ<15>

EC_LID_OUT# <16>

PLT_RST#<6,19,24,27,28,30>

PBTN_OUT# <6,17>

ACIN <17,25,40,41>

VGATE <13,17,46>

ICH_PWROK <17>

EC_RSMRST# <17>

ICH_PCIE_WAKE#<17,24,27,28>

SLP_S3#<17>

PM_SLP_S5#<17>

CLK_PCI_EC<19>

EC_SMI#<20>

EC_SCI#<20>

GATEA20<20>

VR_ON <46>

KB_RST#<20>

KSI[0..7]<32>

KSO[0..18]<32>

TOUCHKEY_TINT<15,32>

EC_SMB_CK1<47>

EC_SMB_CK2<16,27,28>

EC_SMB_DA2<16,27,28>

LID_SW#<32>

EC_FB_SCLK<32>

EC_FB_SDATA<32>

PWR_BTN_LED#<32>

EN_KBL#<32>

WLAN_RADIO_OFF#<27>

EC_TX_P80_DATA<17,27>

KB_BL_PWM#<32>

EC_RX_P80_DATA<27>

ON_OFF<32>

FAN_SPEED1<14>

EC_SPK_HP_MUTE# <25>

MSEN# <35>

FSTCHG <41>

BT_OFF# <30>

EN_WOL# <24>

WPAN_RADIO_OFF# <28>

GFXVR_PWRGD <48>

KSO5 <32>

TP_CLK <32>

USB_EN# <30>

LCD_TST <35>

CHGVADJ <41>

IREF <41>

PWRSHARE_OE# <30>

BATT_TEMP <47>

ADP_I <41>

BATT_OVP <47>

EC_PWM <35>

BEEP# <25>

PWRSHARE_EN# <30>

ACOFF <41>

SYSON <28,33,44>

BKLT_KB_DET# <32>

PS_ID <40>

SUSP# <28,33,43,44,45>

BT_DET# <30>

BKOFF# <35>

WWAN_RADIO_OFF# <27>

LCD_VCC_TEST_EN <35>

EC_ON <32>

BT_RADIO_OFF# <30>

BATT_CHG_LED# <30>

BATT_LOW_LED# <30>

EC_SUB_MUTE# <25>

EN_DFAN1 <14>

TP_DATA <32>

IGPU_BKLT_EN <18>

USB_DET#_DELAY <32>

EC_SMB_DA1<47>

CP_SEL <41>

SBPWR_EN <33>

PCH_GPIO49 <20>

SUS_PWR_ACK <17>

+3VALW

+EC_AVCC

+3VALW

+5VS

+3VALW

+3VS

+3VALW

+3VALW

+3VALW

+3VALW+EC_AVCC

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

EC_KB926/BIOS/Reed SW

Custom

31 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

EC_KB926/BIOS/Reed SW

Custom

31 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

EC_KB926/BIOS/Reed SW

Custom

31 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Board ID

Ra

Rb

SPI Flash (1Mbit/128Kbyte)

VCC 3.3V+/-5% 0.6V~1.6V

Ra

Board ID

20mils

0 +/- 5%

8.2K+/- 5%

18K +/- 5%

Rb

100K

0 V

0.250V

0.503V

D3 Version : P/N : SA00001J580

Place under u20

EC Adam_Yang request

Follow the suggestion of EC team to

follow JAT10 setting.

*

*

*

place close U19

*

*

R0.3 Modify

**

VGA

X00

X01

X02

R0.3 modify

R1.0 modify

R0.3 modify

R0.3 modify

R0.3 Modify

For ENE strape pin

UMA

UMA

UMA

*

R1.0 modify

Add 47K pull high

MP UMA 33K +/- 5% 0.819V

C477

0.1U_0402_16V4Z~D

C477

0.1U_0402_16V4Z~D

1

2

R322 47K_0402_5%R322 47K_0402_5%

1 2

R315 2.2K_0402_5%~DR315 2.2K_0402_5%~D

12

R557

0_0402_5%~D

R557

0_0402_5%~D

1 2

GG

Y5

32.768KHZ_12.5PF_QTFM28-32768K1

GG

Y5

32.768KHZ_12.5PF_QTFM28-32768K1

1

2

4

3

R314 2.2K_0402_5%~DR314 2.2K_0402_5%~D

12

R334

15_0402_5%~D

R334

15_0402_5%~D

1 2

R318 2.2K_0402_5%~DR318 2.2K_0402_5%~D

12

R1569 0_0402_5%~DR1569 0_0402_5%~D

1 2

C472

1000P_0402_50V7K~D

C472

1000P_0402_50V7K~D

1

2

C484

0.1U_0402_16V4Z~D

C484

0.1U_0402_16V4Z~D

1

2

R326 4.7K_0402_5%~DR326 4.7K_0402_5%~D

12

C483

22P_0402_50V8J~D

<BOM Structure>

C483

22P_0402_50V8J~D

<BOM Structure>

12

R325 4.7K_0402_5%~DR325 4.7K_0402_5%~D

12

C471

1000P_0402_50V7K~D

C471

1000P_0402_50V7K~D

1

2

R948 200K_0402_5%R948 200K_0402_5%

1 2

R308 47K_0402_5%R308 47K_0402_5%

1 2

C476 0.01U_0402_16V7K~DC476 0.01U_0402_16V7K~D

1 2

C479

33P_0402_50V8J~D

C479

33P_0402_50V8J~D

C469

0.1U_0402_16V4Z~D

C469

0.1U_0402_16V4Z~D

1

2

R309 47K_0402_5%R309 47K_0402_5%

1 2

R330

22_0402_5%~D

R330

22_0402_5%~D

12

R320 4.7K_0402_5%~DR320 4.7K_0402_5%~D

12

C478

15P_0402_50V8J~D

@C478

15P_0402_50V8J~D

@

1

2

C482 0.1U_0402_16V4Z~DC482 0.1U_0402_16V4Z~D

12

L30

BLM18BD601SN1D_0603~D

L30

BLM18BD601SN1D_0603~D

12

R1215

10K_0402_5%~D

R1215

10K_0402_5%~D

1 2

R311

100K_0402_5%~D

R311

100K_0402_5%~D

1 2

R307 470_0402_5%~DR307 470_0402_5%~D

1 2

R333

15_0402_5%~D

R333

15_0402_5%~D

12

L29

BLM18BD601SN1D_0603~D

L29

BLM18BD601SN1D_0603~D

12

R339 4.7K_0402_5%~DR339 4.7K_0402_5%~D

12

R977 0_0402_5%~DR977 0_0402_5%~D

1 2

R1237 10K_0402_5%~D@R1237 10K_0402_5%~D@12

R306 10K_0402_5%~DR306 10K_0402_5%~D

12

R926 10K_0402_5%~DR926 10K_0402_5%~D

12

JP1

E&T_2941-G08N-00E~D

CONN@

JP1

E&T_2941-G08N-00E~D

CONN@

1

122

3

344

5

566

7

788

R324 10K_0402_5%~DR324 10K_0402_5%~D

1 2

C470

0.1U_0402_16V4Z~D

C470

0.1U_0402_16V4Z~D

1

2

C475 0.1U_0402_16V4Z~DC475 0.1U_0402_16V4Z~D

12

R319 4.7K_0402_5%~D@R319 4.7K_0402_5%~D@12

C474

0.1U_0402_16V4Z~D

C474

0.1U_0402_16V4Z~D

1

2

C1122

22P_0402_50V8J~D

C1122

22P_0402_50V8J~D

1

2

R342 4.7K_0402_5%~DR342 4.7K_0402_5%~D

12

R312

33K_0402_5%~D

R312

33K_0402_5%~D

1 2

R327

10_0402_5%~D

@R327

10_0402_5%~D

@

12

U20

MX25L1005AMC-12G_SO8

U20

MX25L1005AMC-12G_SO8

CS#

1

SO

2

WP#

3

GND

4

VCC 8

HOLD# 7

SCLK 6

SI 5

C473

1000P_0402_50V7K~D

C473

1000P_0402_50V7K~D

1

2

C481

33P_0402_50V8J~D

C481

33P_0402_50V8J~DC468

0.1U_0402_16V4Z~D

C468

0.1U_0402_16V4Z~D

1

2

R328

20M_0603_5%@

R328

20M_0603_5%@

1 2

C480 1U_0603_10V4Z~DC480 1U_0603_10V4Z~D

1 2

R317 2.2K_0402_5%~DR317 2.2K_0402_5%~D

12

R332

15_0402_5%~D

R332

15_0402_5%~D

1 2

C467

0.1U_0402_16V4Z~D

C467

0.1U_0402_16V4Z~D

1

2

R331

15_0402_5%~D

R331

15_0402_5%~D

12

C522 0.01U_0402_16V7K~DC522 0.01U_0402_16V7K~D

1 2

R329

10K_0402_5%~D

R329

10K_0402_5%~D

12

LPC & MISC

Int. K/B

Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

U19

KB926QFD3_LQFP128

LPC & MISC

Int. K/B

Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

U19

KB926QFD3_LQFP128

GA20/GPIO00

1

KBRST#/GPIO01

2

SERIRQ#

3

LFRAME#

4

LAD3

5

PM_SLP_S3#/GPIO04

6

LAD2

7

LAD1

8

VCC 9

LAD0

10

GND

11

PCICLK

12

PCIRST#/GPIO05

13

PM_SLP_S5#/GPIO07

14

EC_SMI#/GPIO08

15

LID_SW#/GPIO0A

16

SUSP#/GPIO0B

17

PBTN_OUT#/GPIO0C

18

EC_PME#/GPIO0D

19

SCI#/GPIO0E

20

INVT_PWM/PWM1/GPIO0F 21

VCC 22

BEEP#/PWM2/GPIO10 23

GND

24

EC_THERM#/GPIO11

25

FANPWM1/GPIO12 26

ACOFF/FANPWM2/GPIO13 27

FAN_SPEED1/FANFB1/GPIO14

28

FANFB2/GPIO15

29

EC_TX/GPIO16

30

EC_RX/GPIO17

31

ON_OFF/GPIO18

32

VCC 33

PWR_LED#/GPIO19

34

GND

35

NUMLED#/GPIO1A

36

ECRST#

37

CLKRUN#/GPIO1D

38

KSO0/GPIO20

39

KSO1/GPIO21

40

KSO2/GPIO22

41

KSO3/GPIO23

42

KSO4/GPIO24

43

KSO5/GPIO25

44

KSO6/GPIO26

45

KSO7/GPIO27

46

KSO8/GPIO28

47

KSO9/GPIO29

48

KSO10/GPIO2A

49

KSO11/GPIO2B

50

KSO12/GPIO2C

51

KSO13/GPIO2D

52

KSO14/GPIO2E

53

KSO15/GPIO2F

54

KSI0/GPIO30

55

KSI1/GPIO31

56

KSI2/GPIO32

57

KSI3/GPIO33

58

KSI4/GPIO34

59

KSI5/GPIO35

60

KSI6/GPIO36

61

KSI7/GPIO37

62

BATT_TEMP/AD0/GPIO38 63

BATT_OVP/AD1/GPIO39 64

ADP_I/AD2/GPIO3A 65

AD3/GPIO3B 66

AVCC 67

DAC_BRIG/DA0/GPIO3C 68

AGND

69

EN_DFAN1/DA1/GPIO3D 70

IREF/DA2/GPIO3E 71

DA3/GPIO3F 72

CIR_RX/GPIO40 73

CIR_RLC_TX/GPIO41 74

AD4/GPIO42 75

SELIO2#/AD5/GPIO43 76

SCL1/GPIO44

77

SDA1/GPIO45

78

SCL2/GPIO46

79

SDA2/GPIO47

80

KSO16/GPIO48

81

KSO17/GPIO49

82

PSCLK1/GPIO4A 83

PSDAT1/GPIO4B 84

PSCLK2/GPIO4C 85

PSDAT2/GPIO4D 86

TP_CLK/PSCLK3/GPIO4E 87

TP_DATA/PSDAT3/GPIO4F 88

FSTCHG/SELIO#/GPIO50 89

BATT_CHGI_LED#/GPIO52 90

CAPS_LED#/GPIO53 91

BATT_LOW_LED#/GPIO54 92

SUSP_LED#/GPIO55 93

GND

94

SYSON/GPIO56 95

VCC 96

SDICS#/GPXOA00 97

SDICLK/GPXOA01 98

SDIDO/GPXOA02 99

EC_RSMRST#/GPXO03 100

EC_LID_OUT#/GPXO04 101

EC_ON/GPXO05 102

EC_SWI#/GPXO06 103

ICH_PWROK/GPXO06 104

BKOFF#/GPXO08 105

WL_OFF#/GPXO09 106

GPXO10 107

GPXO11 108

SDIDI/GPXID0 109

PM_SLP_S4#/GPXID1 110

VCC 111

ENBKL/GPXID2 112

GND

113

GPXID3 114

GPXID4 115

GPXID5 116

GPXID6 117

GPXID7 118

SPIDI/RD# 119

SPIDO/WR# 120

VR_ON/XCLK32K/GPIO57 121

XCLK1

122

XCLK0

123 V18R 124

VCC 125

SPICLK/GPIO58 126

AC_IN/GPIO59 127

SPICS# 128

D54

CH751H-40PT_SOD323-2~D

D54

CH751H-40PT_SOD323-2~D

2 1

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

KSI[0..7]

KSO[0..18]

BKLT_KB_DET

BKLT_KB_DET#

KB_BL_PWM

BKLT_KB_DET

EN_KBL

USBP9+

USBP9-

PWR_LED+

PWR_BTN_LED#

PWR_ON-OFF_BTN#

+HALL_VCC

LID_SW#

+HALL_VCC

LID_SW#

PWR_ON-OFF_BTN#

USBP9-

USBP9+

TOUCHKEY_TINT

FB_SCLK

FB_SDATA

FB_SDATA

FB_SCLK

KSO12

KSO13

KSI3

KSI6

KSI2

KSO0

KSO3

KSO2

KSI1

KSO11

KSO15

KSI0

KSO9

KSO18

KSO14

KSO8

KSO10

KSO16

KSO6

KSO5

KSI4

KSO17

KSO1

KSO4

KSI5

KSI7

KSO7

USB_DETECT#

51ON#

KSI2

KSI3

KSI4

KSI5

KSI6

KSI7

KSO0

KSO1

KSO2

KSO3

KSO6

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

KSO4

KSO5

KSO16

KSO17

KSO18

KSI0

KSI1

TP_DATA

TP_CLK

USB_DET#_DELAY

EC_ON

51ON#

PWR_BTN_LED#<31>

KSO[0..18]<31>

KSI[0..7]<31>

EN_KBL#<31>

KB_BL_PWM#<31>

EC_FB_SCLK<31>

USBP9-<19>

USBP9+<19>

TP_CLK<31>

LID_SW#<31>

TP_DATA<31>

EC_FB_SDATA<31>

TOUCHKEY_TINT<15,31>

BKLT_KB_DET# <31>

USB_DET#_DELAY <31>

51ON# <40>

USB_DETECT#<30>

EC_ON<31>

ON_OFF <31>

51ON# <40>

PWR_ON-OFF_BTN#<14>

+5VS_KBL

+5VS

B+_BIAS

+5VS_KBL

+3VS

+3VS

+3VS

+5VS

+5VALW

+3VALW

+3VS

+5VS +3VS

RTCVREF RTCVREF RTCVREF RTCVREF

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PWROK/BTN/KB/Touch Pad

Custom

32 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PWROK/BTN/KB/Touch Pad

Custom

32 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PWROK/BTN/KB/Touch Pad

Custom

32 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

INT_KB_Conn.1

Touch PAD/B Conn.

Keyboard back light

Touch Screen Connector

20mil

20mil

20mil

20mil

To power board

Place close JTCH1

Place close JPBTN1

Cap Sensor

CLOSE TO U48

Power share

For EMI

R0.3 Modify

R0.3 Modify

R0.3 Modify

R0.3 Modify

Power Button Circuit

R0.3 Modify

C493 100P_0402_50V8J~D@C493 100P_0402_50V8J~D@

C503 100P_0402_50V8J~D@C503 100P_0402_50V8J~D@

D11

BAT54C-7-F_SOT23~D

D11

BAT54C-7-F_SOT23~D

2

3

1

C511 100P_0402_50V8J~D@C511 100P_0402_50V8J~D@

R1143

10K_0402_1%~D

R1143

10K_0402_1%~D

12

R930

100K_0402_5%~D

R930

100K_0402_5%~D

12

C489 100P_0402_50V8J~D@C489 100P_0402_50V8J~D@

D51

SDMK0340L-7-F

D51

SDMK0340L-7-F

2 1

C496 100P_0402_50V8J~D@C496 100P_0402_50V8J~D@

C486 100P_0402_50V8J~D@C486 100P_0402_50V8J~D@

C500 100P_0402_50V8J~D@C500 100P_0402_50V8J~D@

JPBTN1

MOLEX_53261-0471

CONN@

JPBTN1

MOLEX_53261-0471

CONN@

1

1

2

2

3

3

4

4G5 5

G6 6

R896

200_0402_5%~D

R896

200_0402_5%~D

1 2

C490 100P_0402_50V8J~D@C490 100P_0402_50V8J~D@

C506 100P_0402_50V8J~D@C506 100P_0402_50V8J~D@

R934 10K_0402_5%~DR934 10K_0402_5%~D

1 2

L77 BLM18BD601SN1D_0603~DL77 BLM18BD601SN1D_0603~D

1 2

JKB1

JAE_FL4S030HB3R3000

CONN@

JKB1

JAE_FL4S030HB3R3000

CONN@

1

1

4

4

2

2

5

5

3

3

8

8

7

7

6

6

10

10

9

9

11

11 12

12 13

13 14

14

17

17

16

16

19

19 20

20

15

15

22

22

21

21

18

18

23

23

25

25

24

24

26

26 27

27 28

28 29

29 30

30

GND 31

GND 32

C488 100P_0402_50V8J~D@C488 100P_0402_50V8J~D@

C502 100P_0402_50V8J~D@C502 100P_0402_50V8J~D@

F1

0.75A_24V_1812L075-24DR~OK

@

F1

0.75A_24V_1812L075-24DR~OK

@

12

R928

300K_0402_5%

R928

300K_0402_5%

1 2

C959

33P_0402_50V8J~D

C959

33P_0402_50V8J~D

1 2

R1238

0_0402_5%~D

R1238

0_0402_5%~D

1 2

C501 100P_0402_50V8J~D@C501 100P_0402_50V8J~D@

JTCH1

JST_SM08B-SURS-TF(LF)(SN)~D

CONN@

JTCH1

JST_SM08B-SURS-TF(LF)(SN)~D

CONN@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

G1

9G2 10

R337

10K_0402_5%~D

R337

10K_0402_5%~D

12

R1003 0_0402_5%~D@R1003 0_0402_5%~D@

1 2

C498 100P_0402_50V8J~D@C498 100P_0402_50V8J~D@

D55

PESD5V2S2UT_SOT23-3~D

D55

PESD5V2S2UT_SOT23-3~D

2

3

1

C509 100P_0402_50V8J~D@C509 100P_0402_50V8J~D@

R1236 0_0402_5%~DR1236 0_0402_5%~D

1 2

G

D

S

Q39

MMBF170LT1G 1N SOT23-3

G

D

S

Q39

MMBF170LT1G 1N SOT23-3

2

13

R335

100K_0402_5%~D

R335

100K_0402_5%~D

1 2

C510 100P_0402_50V8J~D@C510 100P_0402_50V8J~D@

L78 BLM18BD601SN1D_0603~DL78 BLM18BD601SN1D_0603~D

1 2

C492 100P_0402_50V8J~D@C492 100P_0402_50V8J~D@C491 100P_0402_50V8J~D@C491 100P_0402_50V8J~D@

JCAP1

TYCO_2041084-6

CONN@

JCAP1

TYCO_2041084-6

CONN@

1

12

23

34

45

56

6

G1 7

G2 8

C507 100P_0402_50V8J~D@C507 100P_0402_50V8J~D@

JTP1

TYCO_2041084-6~D

CONN@

JTP1

TYCO_2041084-6~D

CONN@

1

1

2

2

3

3

4

4

5

5

6

6G1 7

G2 8

G

D

S

Q6

PMF3800SN_SC70-3

G

D

S

Q6

PMF3800SN_SC70-3

2

13

R1144

220K_0402_5%

R1144

220K_0402_5%

12

S

G

D

Q38

SI3456BDV-T1-E3 1N TSOP6 W/D

S

G

D

Q38

SI3456BDV-T1-E3 1N TSOP6 W/D

3

6

2

45

1

C521

0.1U_0402_16V4Z~D

C521

0.1U_0402_16V4Z~D

1

2

D36

CM1293-04SO_SOT23-6@

D36

CM1293-04SO_SOT23-6@

CH3 6

Vp 5

CH4 4

CH2

3

Vn

2

CH1

1

C505 100P_0402_50V8J~D@C505 100P_0402_50V8J~D@

C495 100P_0402_50V8J~D@C495 100P_0402_50V8J~D@

D30

PESD24VS2UT_SOT23-3~D

D30

PESD24VS2UT_SOT23-3~D

2

3

1

R336

0_0402_5%~D

R336

0_0402_5%~D

1 2

C494 100P_0402_50V8J~D@C494 100P_0402_50V8J~D@

C499 100P_0402_50V8J~D@C499 100P_0402_50V8J~D@

C960

33P_0402_50V8J~D

C960

33P_0402_50V8J~D

1 2

C504 100P_0402_50V8J~D@C504 100P_0402_50V8J~D@

D58

SDMK0340L-7-F

@D58

SDMK0340L-7-F

@

21

JKBL1

TYCO_2041084-4

CONN@

JKBL1

TYCO_2041084-4

CONN@

1

1

2

2

3

3

4

4GND 6

GND 5

C487 100P_0402_50V8J~D@C487 100P_0402_50V8J~D@

R931

2M_0402_5%~D

R931

2M_0402_5%~D

1 2

C514

100P_0402_50V8J~D

C514

100P_0402_50V8J~D

1

2

G

D

S

Q56

2N7002LT1G_SOT23-3

G

D

S

Q56

2N7002LT1G_SOT23-3

2

13

C508 100P_0402_50V8J~D@C508 100P_0402_50V8J~D@

R929

0_0805_5%~D

R929

0_0805_5%~D

1 2

R927

10K_0402_5%~D

R927

10K_0402_5%~D

12

C485 100P_0402_50V8J~D@C485 100P_0402_50V8J~D@

C497 100P_0402_50V8J~D@C497 100P_0402_50V8J~D@

G

D

S

Q40

PMF3800SN_SC70-3

G

D

S

Q40

PMF3800SN_SC70-3

2

13

D56

PESD5V2S2UT_SOT23-3~D

D56

PESD5V2S2UT_SOT23-3~D

2

3

1

C1068

0.1U_0402_16V4Z~D

C1068

0.1U_0402_16V4Z~D

1

2

C927

0.1U_0402_16V4Z~D

C927

0.1U_0402_16V4Z~D

1

2

C512

0.1U_0402_16V4Z~D

C512

0.1U_0402_16V4Z~D

1

2

C513

100P_0402_50V8J~D

C513

100P_0402_50V8J~D

1

2

D52

SDMK0340L-7-F

D52

SDMK0340L-7-F

2 1

C928

1U_0603_10V6K~D

C928

1U_0603_10V6K~D

1

2

C1069

2.2U_0603_10V7K~D

C1069

2.2U_0603_10V7K~D

12

G

D

S

Q41

MMBF170LT1G 1N SOT23-3

G

D

S

Q41

MMBF170LT1G 1N SOT23-3

2

13

U51

TC7SZ14FU_SSOP5~D

U51

TC7SZ14FU_SSOP5~D

Y4

P5

G

3

A

2NC

1

R933 0_0402_5%~DR933 0_0402_5%~D

1 2

R1145

100K_0402_5%~D

R1145

100K_0402_5%~D

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

SUSP

SUSP SUSP

SYSON#

SUSP

SYSON

SUSP

SYSON#

SUSP#

SUSP

SUSP

SUSP

SBPWR_EN#

3V_GATE

SBPWR_EN

SBPWR_EN#

SBPWR_EN#

SUSP

SUSP

SUSP

SUSP

SUSP

SYSON<28,31,44>

SUSP#<28,31,43,44,45>

SBPWR_EN<31>

SBPWR_EN#<22>

1.5VS_DDR_PWRGD <44>

+5VS+5VALW

+5VS

+3VS+3VALW

B+_BIAS

+3VS

+5VALW

+5VALW

+0.75VS

B+_BIAS

+1.5V

+1.5VS

+1.5V +1.05VS +1.1VS_VTT

+3VALW +3V

B+_BIAS

+5VALW

+3V

B+_BIAS

B+_BIAS +1.5V +1.5V_CPU_DDR

+1.5V_CPU_DDR

+3VALW

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DC/DC Interface

Custom

33 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DC/DC Interface

Custom

33 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DC/DC Interface

Custom

33 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Discharge Circuit

+5VALW to +5VS Transfer

+3VALW to +3VS Transfer

+1.5V to +1.5VS Transfer

7.69A

8.73A

+3VALW to +3V Transfer (PCH AUX Power)

169mA

R0.3 modify

R0.3 modify

+1.5V to +1.5VS_DDR Transfer

R1.0 modify

R1.0 modify

Q55

Si4634 1N SO8

Q55

Si4634 1N SO8

16

5

7

8

2

4

3

R379

100K_0402_5%~D

R379

100K_0402_5%~D

12

R338

330K_0402_5%

R338

330K_0402_5%

12

G

D

S

Q15

PMF3800SN_SC70-3

G

D

S

Q15

PMF3800SN_SC70-3

2

13

U22

AO4468 1N SO8

U22

AO4468 1N SO8

16

5

7

8

2

4

3

G

D

S

Q60

PMF3800SN_SC70-3

G

D

S

Q60

PMF3800SN_SC70-3

2

13

R353

470_0402_5%~D

R353

470_0402_5%~D

12

C519

0.1U_0402_16V4Z~D

C519

0.1U_0402_16V4Z~D

1

2

R1157

2M_0402_5%~D

R1157

2M_0402_5%~D

12

C531

10U_0805_10V4Z~D

C531

10U_0805_10V4Z~D

1

2

G

D

S

Q17

PMF3800SN_SC70-3

G

D

S

Q17

PMF3800SN_SC70-3

2

13

R1153

0_0402_5%~D

R1153

0_0402_5%~D

1 2

C1148

0.01U_0402_25V7K~D

C1148

0.01U_0402_25V7K~D

1

2

U64

74AHC1G08GW_SOT353-5~D

U64

74AHC1G08GW_SOT353-5~D

IN1

1

IN2

2

G

3

O4

P5

R1216

330K_0402_5%

R1216

330K_0402_5%

12

G

D

S

Q21

PMF3800SN_SC70-3

G

D

S

Q21

PMF3800SN_SC70-3

2

13

G

D

S

Q16

PMF3800SN_SC70-3

G

D

S

Q16

PMF3800SN_SC70-3

2

13

Q73

Si4634 1N SO8

Q73

Si4634 1N SO8

S1

S2

S3

G4

D

8

D

7

D

6

D

5

C1073

0.01U_0402_25V7K~D

C1073

0.01U_0402_25V7K~D

1

2

G

D

S

Q61

PMF3800SN_SC70-3

G

D

S

Q61

PMF3800SN_SC70-3

2

13

R358

470_0603_5%

R358

470_0603_5%

12

C1071

0.1U_0402_16V4Z~D

C1071

0.1U_0402_16V4Z~D

1

2

R361

10K_0402_5%~D

R361

10K_0402_5%~D

1 2

C518

10U_0805_10V4Z~D

C518

10U_0805_10V4Z~D

1

2

R1034

470_0603_5%

R1034

470_0603_5%

1 2

R341

390K_0402_5%

@

R341

390K_0402_5%

@

12

C516

0.1U_0402_16V4Z~D

C516

0.1U_0402_16V4Z~D

1

2

R1235

2M_0402_5%~D

R1235

2M_0402_5%~D

12

C524

0.01U_0402_25V7K~D

C524

0.01U_0402_25V7K~D

1

2

G

D

S

Q11

PMF3800SN_SC70-3

G

D

S

Q11

PMF3800SN_SC70-3

2

13

R1155

470_0402_5%~D

R1155

470_0402_5%~D

12

R346

470K_0402_5%

R346

470K_0402_5%

12

C520

10U_0805_10V4Z~D

C520

10U_0805_10V4Z~D

1

2

G

D

S

Q75

PMF3800SN_SC70-3

G

D

S

Q75

PMF3800SN_SC70-3

2

13

R1154

10K_0402_5%~D

R1154

10K_0402_5%~D

1 2

R1151

100K_0402_5%~D

R1151

100K_0402_5%~D

12

R349

20K_0402_1%~D

R349

20K_0402_1%~D

12

R356

470_0402_5%~D

R356

470_0402_5%~D

12

U52

SI4800BDY-T1-E3_SO8

U52

SI4800BDY-T1-E3_SO8

36

5

7

8

2

4

1

G

D

S

Q59

PMF3800SN_SC70-3

G

D

S

Q59

PMF3800SN_SC70-3

2

13

G

D

S

Q10

PMF3800SN_SC70-3

G

D

S

Q10

PMF3800SN_SC70-3

2

13

G

D

S

Q13

PMF3800SN_SC70-3

G

D

S

Q13

PMF3800SN_SC70-3

2

13

R352

470_0402_5%~D

R352

470_0402_5%~D

12

JP9@JP9@

1 2

R344

470K_0402_5%

R344

470K_0402_5%

12

C1070

10U_0805_10V4Z~D

C1070

10U_0805_10V4Z~D

1

2

R1158

2M_0402_5%~D

R1158

2M_0402_5%~D

12

C532

470P_0402_50V7K~D

C532

470P_0402_50V7K~D

1

2

G

D

S

Q54

PMF3800SN_SC70-3

G

D

S

Q54

PMF3800SN_SC70-3

2

13

C1147

0.01U_0402_25V7K~D

C1147

0.01U_0402_25V7K~D

1

2

R1152

330K_0402_5%

R1152

330K_0402_5%

12

C525

0.01U_0402_25V7K~D

C525

0.01U_0402_25V7K~D

1

2

C534

470P_0402_50V7K~D

C534

470P_0402_50V7K~D

1

2

G

D

S

Q68

PMF3800SN_SC70-3

G

D

S

Q68

PMF3800SN_SC70-3

2

13

R345

20K_0402_1%~D

R345

20K_0402_1%~D

12

R360

100K_0402_5%~D

R360

100K_0402_5%~D

12

U21

AO4468 1N SO8

U21

AO4468 1N SO8

16

5

7

8

2

4

3

G

D

S

Q19

PMF3800SN_SC70-3

G

D

S

Q19

PMF3800SN_SC70-3

2

13

R354

100K_0402_5%~D

R354

100K_0402_5%~D

12

G

D

S

Q74

PMF3800SN_SC70-3

G

D

S

Q74

PMF3800SN_SC70-3

2

13

R355

10K_0402_5%~D

R355

10K_0402_5%~D

1 2

G

D

S

Q12

PMF3800SN_SC70-3

G

D

S

Q12

PMF3800SN_SC70-3

2

13

C1146

0.1U_0402_10V6K~D

C1146

0.1U_0402_10V6K~D

1 2

C517

10U_0805_10V4Z~D

C517

10U_0805_10V4Z~D

1

2

G

D

S

Q20

PMF3800SN_SC70-3

G

D

S

Q20

PMF3800SN_SC70-3

2

13

R1252 0_0402_5%~D

@

R1252 0_0402_5%~D

@

12

G

D

S

Q7

PMF3800SN_SC70-3

G

D

S

Q7

PMF3800SN_SC70-3

2

13

R359

470_0402_5%~D

R359

470_0402_5%~D

12

C536

10U_0805_10V4Z~D

C536

10U_0805_10V4Z~D

1

2

R396

100K_0402_5%~D

R396

100K_0402_5%~D

1 2

C1072

10U_0805_10V4Z~D

C1072

10U_0805_10V4Z~D

1

2

R340

2M_0402_5%~D

R340

2M_0402_5%~D

12

C515

10U_0805_10V4Z~D

C515

10U_0805_10V4Z~D

1

2

R364

220_0402_5%~D

R364

220_0402_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Screws

Custom

34 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Screws

Custom

34 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Screws

Custom

34 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

H_3P1

H_1P6N

H_3P0

H_3P2

H_4P0

H_3P0X4P0

H_2P2

H_2P5

H21

HOLEA@

H21

HOLEA@

1

H2

HOLEA@

H2

HOLEA@

1

FD2

FIDUCAL

@

FD2

FIDUCAL

@

1

H9

HOLEA@

H9

HOLEA@

1

H35

HOLEA@

H35

HOLEA@

1

PCB

ZZZ

PCB

ZZZ

H20

HOLEA@

H20

HOLEA@

1

H12

HOLEA@

H12

HOLEA@

1

H27

HOLEA@

H27

HOLEA@

1

H10

HOLEA@

H10

HOLEA@

1

H8

HOLEA@

H8

HOLEA@

1

H19

HOLEA@

H19

HOLEA@

1

H6

HOLEA@

H6

HOLEA@

1

H5

HOLEA@

H5

HOLEA@

1

FD4

FIDUCAL

@

FD4

FIDUCAL

@

1

FD1

FIDUCAL

@

FD1

FIDUCAL

@

1

H23

HOLEA@

H23

HOLEA@

1

H3

HOLEA@

H3

HOLEA@

1

H29

HOLEA@

H29

HOLEA@

1

H14

HOLEA@

H14

HOLEA@

1

H25

HOLEA@

H25

HOLEA@

1

H18

HOLEA@

H18

HOLEA@

1

H7

HOLEA@

H7

HOLEA@

1

H15

HOLEA@

H15

HOLEA@

1

H36

HOLEA@

H36

HOLEA@

1

H26

HOLEA@

H26

HOLEA@

1

H11

HOLEA@

H11

HOLEA@

1

H4

HOLEA@

H4

HOLEA@

1

H28

HOLEA@

H28

HOLEA@

1

H17

HOLEA@

H17

HOLEA@

1

H16

HOLEA@

H16

HOLEA@

1

H24

HOLEA@

H24

HOLEA@

1

FD3

FIDUCAL

@

FD3

FIDUCAL

@

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CRT_DDC_DATA_C

CRT_DDC_CLK_C

D_CRT_HSYNC HSYNC_L

VSYNC_L

CRT_HSYNC

CRT_VSYNC

CRT_R_L

CRT_G_L

CRT_B_L

D_CRT_VSYNC

MSEN#

CRT_R_L

CRT_DDC_DATA_C

CRT_G_L

HSYNC_L

CRT_B_L

VSYNC_L

CRT_DDC_CLK_C

BKOFF# DISPOFF#

CRT_R

CRT_G

CRT_B

LCD_TST

EDID_CLK_LCD

EDID_DATA_LCD

LVDS_A0-

LVDS_A0+

LVDS_A1-

LVDS_A1+

LVDS_A2-

LVDS_A2+

LVDS_ACLK-

LVDS_B1-

LVDS_B1+

LVDS_B2-

LVDS_B2+

LVDS_BCLK-

INVT_PWM

DISPOFF#

LVDS_B0+

LVDS_BCLK+

PWR_SRC_ON

LVDS_B0-

LVDS_ACLK++LCDVDDVGA_LVDDEN

LCD_VCC_TEST_EN

CRT_B

INVT_PWM

VGA_CRT_R<18>

VGA_CRT_G<18>

VGA_CRT_B<18>

CRT_DDC_DATA<18>

CRT_DDC_CLK<18>

CRT_HSYNC<18>

CRT_VSYNC<18>

MSEN#<31>

BKOFF#<31>

VGA_PWM<18>

LVDS_BCLK+<18>

LVDS_BCLK-<18>

LVDS_B2+<18>

LVDS_B2-<18>

LVDS_B1+<18>

LVDS_B1-<18>

LVDS_B0+<18>

LVDS_B0-<18>

LVDS_ACLK+<18>

LVDS_ACLK-<18>

LVDS_A2+<18>

LVDS_A2-<18>

LVDS_A1+<18>

LVDS_A0-<18>

LVDS_A0+<18>

LVDS_A1-<18>

LVDS_DDC_DATA<18>

LVDS_DDC_CLK<18>

LCD_TST<31>

EC_PWM<31>

VGA_LVDDEN<18>

LCD_VCC_TEST_EN<31>

+3VS +CRT_VCC+3VS +CRT_VCC+3VS

+CRT_VCC

+CRT_VCC

+5VS +CRT_VCC

+3VS

+3VS

+LCDVDD

+3VS

+3VS +3VS

+LCDVDD

B+

+INV_PWR_SRC

+INV_PWR_SRC

B+ +INV_PWR_SRC

+LCDVDD

+LCDVDD +5V

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

VGA / LVDS

Custom

35 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

VGA / LVDS

Custom

35 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

VGA / LVDS

Custom

35 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

W=40mils

W=40mils

C R T

For EMI

W=60mils

R02: Reserve for EMI

(Place close to JLVDS1)

R02: Add

40mil

40mil

R0.3 Modify

R0.3 Modify

W=60mils

W=60mils

reserve for RF request

R1.0 Modify

D14

DAN217_SC59-3

D14

DAN217_SC59-3

2

3

1

C1130 5P_0402_50V8C

@

C1130 5P_0402_50V8C

@1 2

LU8 BLM18BB470SN1D_2P~DLU8 BLM18BB470SN1D_2P~D

1 2

D16

DAN217_SC59-3

D16

DAN217_SC59-3

2

3

1

CU58

10P_0402_50V8J~D

@

CU58

10P_0402_50V8J~D

@

12

R375 0_0402_5%~DR375 0_0402_5%~D

12

R370

2.2K_0402_5%~D

R370

2.2K_0402_5%~D

1 2

R1243

100K_0402_5%~D

R1243

100K_0402_5%~D

12

R376

470_0805_5%

R376

470_0805_5%

1 2

G

D

S

Q22

PMF3800SN_SC70-3

G

D

S

Q22

PMF3800SN_SC70-3

2

13

C1128 5P_0402_50V8C

@

C1128 5P_0402_50V8C

@1 2

U54

74AHC1G32GW_SOT353-5~D

U54

74AHC1G32GW_SOT353-5~D

INB

2

INA

1

O4

P5

G

3

D19

CH751H-40PT_SOD323-2~D

D19

CH751H-40PT_SOD323-2~D

21

R380

10K_0402_5%~D

R380

10K_0402_5%~D

12

R369

2.2K_0402_5%~D

R369

2.2K_0402_5%~D

1 2

R374 0_0402_5%~DR374 0_0402_5%~D

12

R372

2K_0402_1%~D

R372

2K_0402_1%~D

1 2

C547

15P_0402_50V8J~D

C547

15P_0402_50V8J~D

1

2

C1129 5P_0402_50V8C

@

C1129 5P_0402_50V8C

@1 2

C541

10P_0402_50V8J~D

C541

10P_0402_50V8J~D

12

R1161

0_0603_5%~D

R1161

0_0603_5%~D

1 2

R944

0_0402_5%~D

@R944

0_0402_5%~D

@

12

NC

D17

BAT1000-7-F_SOT23-3~D

NC

D17

BAT1000-7-F_SOT23-3~D

2 1

3

L31 BLM18BB470SN1D_2P~DL31 BLM18BB470SN1D_2P~D

1 2

S

G

D

Q70

SI3457BDV-T1-E3_TSOP6~D

S

G

D

Q70

SI3457BDV-T1-E3_TSOP6~D

3

6

2

4 5

1

R371

2K_0402_1%~D

R371

2K_0402_1%~D

1 2

CU56

10P_0402_50V8J~D

@

CU56

10P_0402_50V8J~D

@

12

R373

10K_0402_5%~D

R373

10K_0402_5%~D

1 2

R394

10K_0402_5%~D

@R394

10K_0402_5%~D

@

12

G

D

S

Q26

BSS138_SOT23~D

G

D

S

Q26

BSS138_SOT23~D

2

13

D15

DAN217_SC59-3

D15

DAN217_SC59-3

2

3

1

R1242

100K_0402_5%~D

R1242

100K_0402_5%~D

12

C543

100P_0402_50V8J~D

C543

100P_0402_50V8J~D

1

2

G

D

S

Q24

SSM3K7002FU_SC70-3~D

G

D

S

Q24

SSM3K7002FU_SC70-3~D

2

13

G

D

S

Q23

PMF3800SN_SC70-3

G

D

S

Q23

PMF3800SN_SC70-3

2

13

C546

0.1U_0402_16V4Z~D

C546

0.1U_0402_16V4Z~D

1 2

LU6 BLM18BB470SN1D_2P~DLU6 BLM18BB470SN1D_2P~D

1 2

C542

10P_0402_50V8J~D

C542

10P_0402_50V8J~D

12

C535

1U_0603_10V6K~D

C535

1U_0603_10V6K~D

1

2

CU550.1U_0402_16V4Z~D CU550.1U_0402_16V4Z~D

12

U26

74AHCT1G125GW_SOT353-5

U26

74AHCT1G125GW_SOT353-5

A

2Y4

OE# 1

G

3P5

D37

BAT54C-7-F_SOT23~D

D37

BAT54C-7-F_SOT23~D

2

3

1

G

D

S

Q71

SSM3K7002FU_SC70-3~D

G

D

S

Q71

SSM3K7002FU_SC70-3~D

2

13

JLVDS1

JAE_FI-G40SB-VF25-R2000

CONN@

JLVDS1

JAE_FI-G40SB-VF25-R2000

CONN@

1

12

23

34

45

56

67

78

89

910

10 11

11 12

12 13

13 14

14 15

15 16

16 17

17 18

18 19

19 20

20 21

21 22

22 23

23 24

24 25

25 26

26 27

27 28

28 29

29 30

30 31

31 32

32 33

33 34

34 35

35 36

36 37

37 38

38 39

39 40

40

G1 41

G2 42

G3 43

G4 44

G5 45

G6 46

G7 47

G8 48

G9 49

R378

56K_0402_5%

R378

56K_0402_5%

12

C537

22P_0402_50V8J~D

@

C537

22P_0402_50V8J~D

@

1

2

L32 BLM18BB470SN1D_2P~DL32 BLM18BB470SN1D_2P~D

1 2

R945

0_0402_5%~D

@R945

0_0402_5%~D

@

12

G

D

S

Q25

AO3413_SOT23-3

6.5

G

D

S

Q25

AO3413_SOT23-3

6.5

2

1 3

C549

0.1U_0402_16V4Z~D

C549

0.1U_0402_16V4Z~D

1

2

R382

4.7K_0402_5%~D

R382

4.7K_0402_5%~D

12

LU7 BLM18BB470SN1D_2P~DLU7 BLM18BB470SN1D_2P~D

1 2

C1127

0.1U_0603_50V4Z~D

C1127

0.1U_0603_50V4Z~D

1

2

G

G

JCRT1

TYCO_1775763-2

CONN@

G

G

JCRT1

TYCO_1775763-2

CONN@

6

11

1

7

12

2

8

13

3

9

14

4

10

15

5

16

17

C545

0.1U_0402_16V4Z~D

C545

0.1U_0402_16V4Z~D

1 2

R377

47K_0402_5%

R377

47K_0402_5%

1 2

R368

150_0402_1%~D

R368

150_0402_1%~D

12

CU63

470P_0402_50V7K~D

@CU63

470P_0402_50V7K~D

@

1

2

C539

22P_0402_50V8J~D

@

C539

22P_0402_50V8J~D

@

1

2

CU57

10P_0402_50V8J~D

@

CU57

10P_0402_50V8J~D

@

12

R381 0_0805_5%~D@R381 0_0805_5%~D@1 2

C551

0.1U_0402_16V4Z~D

C551

0.1U_0402_16V4Z~D

1

2

U27

74AHCT1G125GW_SOT353-5

U27

74AHCT1G125GW_SOT353-5

A

2Y4

OE# 1

G

3P5

C1126

1000P_0402_50V7K~D

C1126

1000P_0402_50V7K~D

1

2

C544

100P_0402_50V8J~D

C544

100P_0402_50V8J~D

1

2

C1131 5P_0402_50V8C

@

C1131 5P_0402_50V8C

@1 2

R366

150_0402_1%~D

R366

150_0402_1%~D

12

C548

15P_0402_50V8J~D

C548

15P_0402_50V8J~D

1

2

C540

10P_0402_50V8J~D

C540

10P_0402_50V8J~D

12

R1160

0_0603_5%~D

R1160

0_0603_5%~D

1 2

C538

22P_0402_50V8J~D

@

C538

22P_0402_50V8J~D

@

1

2

L33 BLM18BB470SN1D_2P~DL33 BLM18BB470SN1D_2P~D

1 2

R367

150_0402_1%~D

R367

150_0402_1%~D

12

C550

4.7U_0805_10V4Z~D

C550

4.7U_0805_10V4Z~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HDMI_HPD

HDMI_R_CK-

HDMI_R_D1+

HDMI_R_D1-

HDMI_R_D2-

HDMI_R_CK+

HDMI_R_D2+

HDMI_R_D0+

HDMI_R_D0-

HDMI_SCLK

HDMI_SDATA

OE#

HDMI_HPD

HDMI_SDATA

HDMI_SCLK

HDMI_R_CK-HDMI_CLK-

HDMI_R_D0-HDMI_TX0-

HDMI_TX0+ HDMI_R_D0+

HDMI_CLK+ HDMI_R_CK+

HDMI_R_D1-HDMI_TX1-

HDMI_R_D2-HDMI_TX2-

HDMI_TX2+ HDMI_R_D2+

HDMI_TX1+ HDMI_R_D1+

OC_S1

OC_S0

OC_S2

OC_S3

SDVO_SDATA

SDVO_SCLK

EC_DVI_DET

HDMI_HPD

OE#

EC_DVI_DET

EQ_S0

EQ_S1

+5VS_HDMI

HDMI_TX2-

HDMI_TX2+

HDMI_TX1-

HDMI_TX1+

HDMI_CLK-

HDMI_CLK+

HDMI_TX0-

HDMI_TX0+

IN_D4+

IN_D4-

IN_D3+

IN_D3-

IN_D2+

IN_D2-

IN_D1+

IN_D1-

SDVO_SCLK<18>

SDVO_SDATA<18>

PCH_DPB_HPD<18>

PCH_TMDS_D1 <18>

PCH_TMDS_D2# <18>

PCH_TMDS_D2 <18>

PCH_TMDS_D1# <18>

PCH_TMDS_D0# <18>

PCH_TMDS_D0 <18>

PCH_TMDS_CK <18>

PCH_TMDS_CK# <18>

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+5VS

+5VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HDMI

Custom

36 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HDMI

Custom

36 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HDMI

Custom

36 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

internal pull down

Change RU29 to 3.4K for ASM1442

Reserve RU37 4.7K pull high for ASM1442

Add RU25 4.7K pull down for ASM1442

Change U63 to SA00003GT00

Unpop RU28,RU32

Pop RU30,RU33

CU22

0.1U_0402_16V4Z~D

CU22

0.1U_0402_16V4Z~D

1

2

CU19

0.1U_0402_16V4Z~D

CU19

0.1U_0402_16V4Z~D

1

2

RU46 0_0402_5%~D@RU46 0_0402_5%~D@

1 2

RU49 10K_0402_5%~D@RU49 10K_0402_5%~D@

1 2

CU20

0.1U_0402_16V4Z~D

CU20

0.1U_0402_16V4Z~D

1

2

RU18

100K_0402_5%~D

RU18

100K_0402_5%~D

12

RU45 0_0402_5%~D@RU45 0_0402_5%~D@

1 2

ASM1442_QFN48_7X7

U63

ASM1442_QFN48_7X7

U63

VCC3V

2

ANALOG1(REXT)

6

HPD_SOURCE

7

SDA_SOURCE

8

SCL_SOURCE

9

ANALOG2

10

GND

12 GND

5GND

1

GND

18

GND

24

GND

27

GND

31

GND

36

GND

37

GND

43

VCC3V

11

VCC3V

15

VCC3V

21

VCC3V

26

VCC3V

33

VCC3V

40

VCC3V

46

FUNCTION1

3

FUNCTION2

4

OUT_D4+

13

OUT_D4-

14

OUT_D3+

16

OUT_D3-

17

OUT_D2+

19

IN_D4+ 48

IN_D4- 47

IN_D3+ 45

IN_D3- 44

IN_D2+ 42

IN_D2- 41

IN_D1- 38

OE* 25

SCL_SINK 28

SDA_SINK 29

HPD_SINK 30

DDC_EN 32

OUT_D2-

20

OUT_D1+

22

OUT_D1-

23

IN_D1+ 39

FUNCTION3 34

FUNCTION4 35

THERMAL_GND 49

CU24

0.1U_0402_16V4Z~D

CU24

0.1U_0402_16V4Z~D

1

2

RU106 68_0402_5%~D

@

RU106 68_0402_5%~D

@

1 2

CU26

0.1U_0402_16V4Z~D

CU26

0.1U_0402_16V4Z~D

1

2

LU2

MURATA DLW 21SN900HQ2L

LU2

MURATA DLW 21SN900HQ2L

1

122

33

4

4

RU44 0_0402_5%~D@RU44 0_0402_5%~D@

1 2

LU5

MURATA DLW 21SN900HQ2L

LU5

MURATA DLW 21SN900HQ2L

1

122

33

4

4

CU23

0.1U_0402_16V4Z~D

CU23

0.1U_0402_16V4Z~D

1

2

RU27 0_0402_5%~DRU27 0_0402_5%~D

1 2

RU20 2.2K_0402_5%~DRU20 2.2K_0402_5%~D

12

RU19 0_0402_5%~D@RU19 0_0402_5%~D@

1 2

RU29 3.4K_0402_1%~DRU29 3.4K_0402_1%~D

1 2

CU60 0.5P_0402_50V8

@

CU60 0.5P_0402_50V8

@

1 2

RU25 4.7K_0402_5%~DRU25 4.7K_0402_5%~D

1 2

RU40 0_0402_5%~D@RU40 0_0402_5%~D@

1 2

CU21

0.1U_0402_16V4Z~D

CU21

0.1U_0402_16V4Z~D

1

2

JHDMI1

FOX_QJ5119L-NVBT-7F

CONN@

JHDMI1

FOX_QJ5119L-NVBT-7F

CONN@

D2+

1D2_shield

2D2-

3D1+

4D1_shield

5D1-

6D0+

7D0_shield

8D0-

9CK+

10 CK_shield

11 CK-

12 CEC

13 Reserved

14 SCL

15 SDA

16 DDC/CEC_GND

17 +5V

18 HP_DET

19

GND 20

GND 21

GND 22

GND 23

RU104 68_0402_5%~D

@

RU104 68_0402_5%~D

@

1 2

RU37 4.7K_0402_5%~D@RU37 4.7K_0402_5%~D@

1 2

RU17

10K_0402_5%~D

RU17

10K_0402_5%~D

12

RU38 0_0402_5%~D@RU38 0_0402_5%~D@

1 2

RU113 0_0402_5%~DRU113 0_0402_5%~D

1 2

RU21 10K_0402_5%~D@RU21 10K_0402_5%~D@

1 2

LU4

MURATA DLW 21SN900HQ2L

LU4

MURATA DLW 21SN900HQ2L

1

122

33

4

4

RU22 2.2K_0402_5%~DRU22 2.2K_0402_5%~D

12

RU35 0_0402_5%~D@RU35 0_0402_5%~D@

1 2

LU3

MURATA DLW 21SN900HQ2L

LU3

MURATA DLW 21SN900HQ2L

1

122

33

4

4

RU114 0_0402_5%~DRU114 0_0402_5%~D

1 2

G

D

S

QU1

2N7002LT1G_SOT23-3

G

D

S

QU1

2N7002LT1G_SOT23-3

2

13

RU33 10K_0402_5%~DRU33 10K_0402_5%~D

1 2

RU31 0_0402_5%~D@RU31 0_0402_5%~D@

1 2

RU111 0_0402_5%~DRU111 0_0402_5%~D

1 2

RU32 10K_0402_5%~D@RU32 10K_0402_5%~D@

1 2

RU48

0_0402_5%~D

RU48

0_0402_5%~D

1 2

RU112 0_0402_5%~DRU112 0_0402_5%~D

1 2

RU24 0_0402_5%~D@RU24 0_0402_5%~D@

1 2

FU1

1.5A_6V_1206L150PR~D

@FU1

1.5A_6V_1206L150PR~D

@

1 2

RU30 10K_0402_5%~DRU30 10K_0402_5%~D

1 2

CU59 0.5P_0402_50V8

@

CU59 0.5P_0402_50V8

@

1 2

RU109 0_0402_5%~DRU109 0_0402_5%~D

1 2

RU28 10K_0402_5%~D@RU28 10K_0402_5%~D@

1 2

RU34 2.2K_0402_5%~DRU34 2.2K_0402_5%~D

12

RU103 68_0402_5%~D

@

RU103 68_0402_5%~D

@

1 2

RU92

0_1206_5%

RU92

0_1206_5%

12

RU110 0_0402_5%~DRU110 0_0402_5%~D

1 2

CU61 0.5P_0402_50V8

@

CU61 0.5P_0402_50V8

@

1 2

RU36 2.2K_0402_5%~DRU36 2.2K_0402_5%~D

12

RU47 10K_0402_5%~D@RU47 10K_0402_5%~D@

1 2

RU107 0_0402_5%~DRU107 0_0402_5%~D

1 2

RU105 68_0402_5%~D

@

RU105 68_0402_5%~D

@

1 2

CU18

0.1U_0402_16V4Z~D

CU18

0.1U_0402_16V4Z~D

1

2

CU50

1U_0402_6.3V6K~D

CU50

1U_0402_6.3V6K~D

1 2

CU62 0.5P_0402_50V8

@

CU62 0.5P_0402_50V8

@

1 2

RU108 0_0402_5%~DRU108 0_0402_5%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DISP_A1N

DISP_A1P

DISP_A2N

DISP_A2P

DISP_A3N

DISP_A3P

DISP_A0P

DISP_A1N

DISP_A1P

DISP_A2N

DISP_A2P

DISP_A3N

DISP_A3P

DISP_HD

DISP_A0N

DISP_A0P

DISP_A0N

DISP_CEC

DP_AUX_SW

DP_AUX#_SW

+3VS_DP

DISP_A0NDISP_A0N

DISP_A0PDISP_A0P

DISP_A1PDISP_A1P

DISP_A1N DISP_A1N

DISP_A2N DISP_A2N

DISP_A2P DISP_A2P

DISP_A3P DISP_A3P

DISP_A3N DISP_A3N

DP_DDC_DATA

DP_DDC_CLK

DP_AUX#_SW

DP_DDC_DATA

DP_DDC_CLK

DP_AUX#_C

DP_AUX_SW

DP_CA_DET# DP_CA_DET

DP_CA_DET

DP_AUX_C

DISP_HDDISP_HD

DISP_HD

DISP_HD

DISP_A0N_VGA<18>

DISP_A0P_VGA<18>

DISP_A1N_VGA<18>

DISP_A1P_VGA<18>

DISP_A2N_VGA<18>

DISP_A3P_VGA<18>

DISP_A3N_VGA<18>

DISP_A2P_VGA<18>

DP_DDC_CLK<18>

DP_DDC_DATA<18>

DP_AUX<18>

DP_AUX#<18>

DP_HPD<18>

DP_HPD <18>

DP_HPD<18>

+3VS

+3VS_DP

+3VS

+5VS

+5VS

+3VS

+3VS

+5VS

+3VS +3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Display Port

Custom

37 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Display Port

Custom

37 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Display Port

Custom

37 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Co-lay

Place close JDP1

DPB_CA_DET= 1 TMDS Signaling

DPB_CA_DET= 0 DP Signaling

SW for MB side

1225 modify it.

Follow Intel HPD design rev 1.6

Vgs <=1.5 V

Reserve near connector

G

D

S

QU6

BSS138_SOT23~D

@

G

D

S

QU6

BSS138_SOT23~D

@

2

13

8

D38

RCLAMP0524P.TCT~D

@

8

D38

RCLAMP0524P.TCT~D

@

4

5

1

6

2

7

3

10

9

RETURN

GND

CONFIG1

GND

GND

GND

HPD

CONFIG2

GND

DP_PWR

LANE3_N

LANE3_P

LANE1_N

LANE1_P

LANE2_P

LANE2_N

AUXCH_P

AUXCH_N

LANE0_N

LANE0_P

GROUND

JDP1

FOX_3V102P1-RB2BT-8F

CONN@

RETURN

GND

CONFIG1

GND

GND

GND

HPD

CONFIG2

GND

DP_PWR

LANE3_N

LANE3_P

LANE1_N

LANE1_P

LANE2_P

LANE2_N

AUXCH_P

AUXCH_N

LANE0_N

LANE0_P

GROUND

JDP1

FOX_3V102P1-RB2BT-8F

CONN@

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

8

D39

RCLAMP0524P.TCT~D

@

8

D39

RCLAMP0524P.TCT~D

@

4

5

1

6

2

7

3

10

9

CU36

0.1U_0402_10V7K~D

CU36

0.1U_0402_10V7K~D

1 2

C566 0.1U_0402_10V6K~DC566 0.1U_0402_10V6K~D

12

C563 0.1U_0402_10V6K~DC563 0.1U_0402_10V6K~D

12

R943 1M_0402_5%~DR943 1M_0402_5%~D

12

C573 22U_0805_6.3V6M~DC573 22U_0805_6.3V6M~D

1

2

U66

NC7SZ04P5X_NL_SC70-5~D

U66

NC7SZ04P5X_NL_SC70-5~D

A2

Y

4

P5

NC 1

G

3

C564 0.1U_0402_10V6K~DC564 0.1U_0402_10V6K~D

12

CU37

0.1U_0402_10V7K~D

CU37

0.1U_0402_10V7K~D

12

C952

10U_0805_10V4Z~D

C952

10U_0805_10V4Z~D

1

2

RU97 100K_0402_5%~DRU97 100K_0402_5%~D

1 2

F2

1.5A_6V_1206L150PR~D

F2

1.5A_6V_1206L150PR~D

1 2

U70

SN74CBTD3306CPWR_TSSOP8~D

U70

SN74CBTD3306CPWR_TSSOP8~D

1OE#

1

GND 4

2OE#

7

2A

51B 3

1A

2

2B 6

VCC 8

RU99

10K_0402_5%~D

@RU99

10K_0402_5%~D

@

12

C568 0.1U_0402_10V6K~DC568 0.1U_0402_10V6K~D

12

RU100

100K_0402_5%~D

RU100

100K_0402_5%~D

12

RU115

110K_0402_1%~D

@RU115

110K_0402_1%~D

@

12

CU34

0.1U_0402_10V7K~D

CU34

0.1U_0402_10V7K~D

12

C561 0.1U_0402_10V6K~DC561 0.1U_0402_10V6K~D

12

G

D

S

QU5

BSS138_SOT23~D

@

G

D

S

QU5

BSS138_SOT23~D

@

2

13

R416 5.1M_0402_5%R416 5.1M_0402_5%

12

RU96 100K_0402_5%~DRU96 100K_0402_5%~D

1 2

RU56

2.2K_0402_5%~D

RU56

2.2K_0402_5%~D

12

G

D

S

QU4

BSS138_SOT23~D

G

D

S

QU4

BSS138_SOT23~D

2

13

C570 0.1U_0402_10V6K~DC570 0.1U_0402_10V6K~D

12

U65

SN74CBTD3306CPWR_TSSOP8~D

U65

SN74CBTD3306CPWR_TSSOP8~D

1OE#

1

GND 4

2OE#

7

2A

51B 3

1A

2

2B 6

VCC 8

C953

0.1U_0402_16V4Z~D

C953

0.1U_0402_16V4Z~D

1

2

C562 0.1U_0402_10V6K~DC562 0.1U_0402_10V6K~D

12

C572 0.1U_0402_10V6K~DC572 0.1U_0402_10V6K~D

1

2

CU33

0.1U_0402_10V7K~D

CU33

0.1U_0402_10V7K~D

12

RU116

0_0402_5%~D

@RU116

0_0402_5%~D

@

1 2

CU35

0.1U_0402_10V7K~D

CU35

0.1U_0402_10V7K~D

12

RU55

2.2K_0402_5%~D

RU55

2.2K_0402_5%~D

12

C569 0.1U_0402_10V6K~DC569 0.1U_0402_10V6K~D

12

R409 0_1206_5%~D@R409 0_1206_5%~D@12

RU98

100K_0402_5%~D

@RU98

100K_0402_5%~D

@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HW PIR

Custom

38 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HW PIR

Custom

38 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HW PIR

Custom

38 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Page 1

Page 1Page 1

Page 1

Solu tio n D escrip tion

Solu tion D escrip tionSolu tion D escrip tion

Solu tion D escrip tion R ev.

R ev.R ev.

R ev .P a ge #

P a ge #P ag e#

P a ge # T it le

TitleTitle

Title

V ersion Change L ist ( P . I. R . L ist )

V ersion Change L ist ( P . I. R . L ist )V ersion Change L ist ( P . I. R . L ist )

V ersion Change L ist ( P . I. R . L ist )

Item

ItemItem

Item Issue D escrip tion

Issue D escrip tionIssue D escrip tion

Issue D escrip tionD ate

D ateD ate

D ate R equ est

R equ estR e qu est

R equ est

O w n er

O w n erO w n er

O w n er

01 08

Compal2009/07/22

PROCESSOR (4/6) PWR,Bypass

Design change for IMVP6.5 current gain

R343 un-pop,R1072 pop,R1074 pop,R1073 unpop,R1075 pop,R1076 un-pop Rev02 (X01)

02 16

PCH (2/9) PCIE, SMBUS, CLK

2009/08/10 Compal XTAL25_IN should be pulled to GND using a 0Ω resistor. Pop C1027 with a 0 ohm resister

0603

+1.5V and resert 2009/08/10 Compal

Reduce S3 state Power Add U63,Q36,R290,R310,R1103,R1136,C1142

Rev02 (X01)

Rev02 (X01)

04 09

Separate +1.5V power 2009/08/10 Compal

Reduce S3 state Power Add PJP12,PJP13,PJP14,C1033,C1143,C1144,C1145

Rev02 (X01)

05 11

VrefDQ 2009/08/10 Compal

VrefDQ should be Maintained within SPEC during S3 Add Q37,R313

Rev02 (X01)

06 12

VrefDQ 2009/08/10 Compal

VrefDQ should be Maintained within SPEC during S3 Add Q44,R321

Rev02 (X01)

07 20

DDR_RST_GATE 2009/08/10 Compal

DDR_RST_GATE from GPIO46 Add GPIO46

Rev02 (X01)

08 33

VDDQ 2009/08/10 Compal

Processor VDDQ should be turned off in S3 Add Q73,Q11,R346,R349,R1158,C534,C536

Rev02 (X01)

09 15

GPIO1D 2009/08/18 Compal

ADD EC GPIO1D to PCH GPIO33 Add GPIO33

Rev02 (X01)

Compal2009/08/25

Sub woofer / Speaker AMP

26

Reserve Subwoofer delay circuit for mute Reserve D60, R1568, C1558

C318,C319,C479,C481 BOM change to SE071330J8L

(S CER CAP 33P 50V +-5% NPO 0402)

Follow crystal vendor's recommend

Compal2009/08/25

24,31

6

PROCESSOR (2/6) CLK,JTAG 2009/08/25 Compal Intel S3 solution disable POP R1054,R1055,R1121; Depop Q36,R290,R1103

11,12

33

DC/DC Interface 2009/08/25

2009/08/25 Compal

Compal

Intel S3 solution disable

Intel S3 solution disable

Depop Q37,Q44,R56

Depop Q73

Q73 BOM change to SB000001Y8L

R358 BOM change to SD013470080 (S RES 1/10W 470 +-5% 0603)

10

11

12

13

14

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

15

VGA / LVDS

35

2009/08/25 Compal to improve +LCDVDD voltage quality. Pop C550 Rev02 (X01)

16

EC_KB926/BIOS/Reed SW

31

2009/08/25 Compal Board ID change R312 BOM change to 8.2K Rev02 (X01)

17 31

EC_KB926/BIOS/Reed SW 2009/08/25 Compal Reserve a 0ohm resister on SUS_PWR_ACK from PCH to EC Reserve R1569 on SUS_PWR_ACK Rev02 (X01)

18

Compal2009/09/01

35

In common with MV Rev02 (X01)

Q71 BOM change to SB00000960L

20

2009/09/21 Compal S3 POWER Reduction update from Intel Reserve C1559 on DDR_RST_GATE Rev03 (X02)

30

Reserve common choke on USB0

2009/09/21 Compal Reserve L89,R1571,R1572 Rev03 (X02)

19

20

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HW PIR

Custom

39 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HW PIR

Custom

39 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

HW PIR

Custom

39 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Page 1

Page 1P age 1

Page 1

Solu tion D escrip tion

Solu tion D escrip tionSolu tion D escrip tion

Solu tion D escrip tion R ev .

R ev.R ev.

R ev .P a ge #

P a ge #P ag e#

P a ge # T it le

TitleTitle

Title

V ersion Change L ist ( P . I. R . L ist )

V ersion Change L ist ( P . I. R . L ist )V ersion Change L ist ( P . I. R . L ist )

V ersion Change L ist ( P . I. R . L ist )

Item

ItemItem

Item Issue D escrip tion

Issue D escrip tionIssue D escrip tion

Issue D escrip tionD ate

D ateD ate

D ate R eq uest

R equ estR e qu est

R equ est

O w n er

O w n erO w n er

O w n er

22

21

20

19

18

17

16

15

14

13

12

11

10

09

08

07

06

05

04

03

02

01

23

24

25

30

2009/09/21 Compal Add ESATA re-driver Unpop R1164,R1165,R1166,R1167,R949,R950,R951,R952

pop JP13,C941,C944,C942,C943 Rev03 (X02)

33

2009/09/21 Compal Q55,Q73 BOM change to SB00000DA0L Rev03 (X02)

8

2009/09/21 Compal BOM reason C1009,C1010 BOM change to SGA00002U1L Rev03 (X02)

HD Audio_IDT92HD73C

25

2009/09/21 Compal

BOM change for C336,C337,C354,C355

Rev03 (X02)

26

Sub woofer/Speaker AMP 2009/09/21 Compal implement Subwoofer delay circuit for mute Pop D60,C1558 R1568 change to 330K Rev03 (X02)

37

Display Port 2009/09/21 Compal Follow Intel HPD design Rev03 (X02)

remove RU98,RU99;add RU115; change QU4 to SB50138008L

22

PCH (8/9) PWR 2009/09/21 Compal Follow Intel design Add LU9,CU64,CU65,CU66 Rev03 (X02)

DDRIII SO-DIMM

11,12

2009/10/08 Compal Add M3 solution Pop R166,R178 Rev03 (X02)

31

EC 2009/10/12 Compal Add R322 47K ohm pull highFor ENE issue Rev03 (X02)

ESATA

17

PCH 2009/10/15 Compal Bom reason Change U2 SA007080B90 to SA007080100 Rev03 (X02)

19

PCH 2009/10/16 Compal Design follow NAT01 Change R1139 SD02810038L to SE000000K8L

31

EC 2009/10/22 Compal Change Board ID Change R312 SD02882018L to SD02818028L

Rev03 (X02)

Rev03 (X02)

32

Touch Screen 2009/11/02 Compal Add R1236 Rev03 (X02)

Add for Touch Screen issue

30

Camera 2009/11/02 Compal improve 888MHZ noise Add C458,C459 Rev10 (A00)

27

WLAN 2009/11/05 Compal for EC debug pin Add R323 100K pull down

9

Rev10 (A00)

Rev10 (A00)

Change RU93 to 470ohm

2009/11/05 Compal

PWR Intel suggest to reduce GFX voltage overshoot

26

Sub woofer/Speaker Amp 2009/11/16 Compal Follow NAT01 design Change C922 & C1102 to 0.1uF Rev10 (A00)

31

EC 2009/11/19 Compal Change Board ID Change R312 SD02818028L to SD02833028L Rev10 (A00)

36

HDMI 2009/11/24 Compal Change HDMI level shift Change U63 to SA00003GT00 Rev10 (A00)

36

36

HDMI

HDMI

2009/11/24

2009/11/24

Compal

Compal

Add RU25 4.7K pull down for ASM1442

Reserve RU37 4.7K pull high for ASM1442

For HDMI Deep color mode

For HDMI Deep color mode

Rev10 (A00)

Rev10 (A00)

Rev10 (A00)

36

HDMI 2009/11/24 Compal For HDMI Level shift ASM1442 Change RU29 to 3.4K for ASM1442

Unpop RU28,RU32 , Pop RU30,RU33For HDMI Deep color mode

Compal2009/11/24

HDMI

36

Rev10 (A00)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CHGRTCP

DOCK_PSIDPSID

DOCK_PSID

MAX1615_IN

MAX1615_#SHDN

VinDe_Out

VinDe_IN3N41

VinDe_Ref

PS_ID <31>

51ON#<32>

ACIN <17,25,31,41>

VIN

ADPIN

+5VALW

+5VALW

+3VALW+5VALW

VIN

VS

BATT+

RTCVREF

VIN VIN

RTCVREF

VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DCIN/Precharger

Custom

40 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DCIN/Precharger

Custom

40 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

DCIN/Precharger

Custom

40 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

L-->H 18.234 17.841 17.449

H-->L 17.597 17.210 16.813

Vin Detector

Max. typ. Min.

3.3V

PL1

FBMA-L18-453215-900LMA90T_1812~D

PL1

FBMA-L18-453215-900LMA90T_1812~D

1 2

PC4

100P_0402_50V8J~D

PC4

100P_0402_50V8J~D

12

PR191

82.5K_0402_1%~D

@PR191

82.5K_0402_1%~D

@

12

PR208

68_1206_5%~D

PR208

68_1206_5%~D

12

PD6

DA204U_SOT323~D

@

PD6

DA204U_SOT323~D

@

2

3

1

PC6

100P_0402_50V8J~D

PC6

100P_0402_50V8J~D

12

PC5

1000P_0402_50V7K~D

PC5

1000P_0402_50V7K~D

12

PR202

1M_0402_1%~D

@PR202

1M_0402_1%~D

@

1 2

PC193

2200P_0402_50V7K~D

@

PC193

2200P_0402_50V7K~D

@

1 2

PC7

1000P_0402_50V7K~D

PC7

1000P_0402_50V7K~D

12

PR193

22K_0402_1%~D

@PR193

22K_0402_1%~D

@

1 2

PR20

15K_0402_1%~D

PR20

15K_0402_1%~D

1 2

PR204

56K_0402_5%~D

@PR204

56K_0402_5%~D

@

1 2

PR13

200_0805_5%

PR13

200_0805_5%

12

PC3

1000P_0402_50V7K~D

PC3

1000P_0402_50V7K~D

12

PR19

10K_0402_1%~D

PR19

10K_0402_1%~D

12

PL2

BLM18BD102SN1D_0603~D

PL2

BLM18BD102SN1D_0603~D

12

PD4

DA204U_SOT323~D

PD4

DA204U_SOT323~D

2

3

1

PJPDC1

MOLEX_87438-0743

@PJPDC1

MOLEX_87438-0743

@

11

33

44

55

22

66

77

PC13

4.7U_0805_6.3V6K~D

PC13

4.7U_0805_6.3V6K~D

12

PR10

68_1206_5%~D

PR10

68_1206_5%~D

12

PC191

1000P_0402_50V7K~D

@PC191

1000P_0402_50V7K~D

@

12

PQ1

TP0610K-T1-E3_SOT23-3

27.4

PQ1

TP0610K-T1-E3_SOT23-3

27.4

2

13

PR21

10K_0402_1%~D

@PR21

10K_0402_1%~D

@

1 2

PD2

RLS4148_LL34-2

PD2

RLS4148_LL34-2

1 2

PR206

19.6K_0402_1%~D

@

PR206

19.6K_0402_1%~D

@

12

PC192

0.01U_0402_25V7K~D

@

PC192

0.01U_0402_25V7K~D

@

12

PC12

0.1U_0603_25V7K~D

PC12

0.1U_0603_25V7K~D

12

PU17A

LM393DR_SO8

@PU17A

LM393DR_SO8

@

+

3

-

2O1

P8

G

4

PC11

0.22U_0603_25V7K~D

PC11

0.22U_0603_25V7K~D

1 2

PJP1

JUMP_43X118@

PJP1

JUMP_43X118@

1

122

PR205

10K_0402_5%~D

@PR205

10K_0402_5%~D

@

12

E

B

C

PQ3

MMST3904-7-F_SOT323~D

E

B

C

PQ3

MMST3904-7-F_SOT323~D

2

3 1

PR11

100K_0402_5%~D

PR11

100K_0402_5%~D

12

PR12

22K_0402_5%~D

PR12

22K_0402_5%~D

1 2

PD1

RLZ4.3B_LL34

@PD1

RLZ4.3B_LL34

@

12

PR203

10K_0402_5%~D

@PR203

10K_0402_5%~D

@

12

PD5

SM24_SOT23

@PD5

SM24_SOT23

@

2

3

1

PR201

10K_0402_5%~D

@PR201

10K_0402_5%~D

@

12

PR16

2.2K_0402_5%~D

PR16

2.2K_0402_5%~D

1 2

PR17

33_0402_5%~D

PR17

33_0402_5%~D

1 2

PD3

RLS4148_LL34-2

PD3

RLS4148_LL34-2

12

PR15

0_0402_5%~D

@PR15

0_0402_5%~D

@

1 2

PR14 0_0402_5%~DPR14 0_0402_5%~D

1 2

PR18

100K_0402_1%~D

PR18

100K_0402_1%~D

1 2

PR192

1K_0402_5%~D

@PR192

1K_0402_5%~D

@

1 2

PC2

100P_0402_50V8J~D

PC2

100P_0402_50V8J~D

12

PU17B

LM393DR_SO8

@PU17B

LM393DR_SO8

@

+

5

-

6O7

P8

G

4

G

D

S

PQ2

FDV301N_NL_SOT23-3~D

G

D

S

PQ2

FDV301N_NL_SOT23-3~D

2

1 3

PC194

.1U_0402_16V7K~D

32.3

@

PC194

.1U_0402_16V7K~D

32.3

@

12

MAX1615EUK+_SOT23-5~D

PU3

MAX1615EUK+_SOT23-5~D

PU3

IN 1

GND

2

OUT

3

5/3+

4#SHDN 5

PC14

1U_0805_25V4Z~D

PC14

1U_0805_25V4Z~D

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

GATE

DL_CHG

SRP

SRN

VADJ

REGN

ACSET

REGN

/BATDRV

ACN

ACP

ACDET

DH_CHG

SRSET

OVPSET

ACDRV_CHG#

/BATDRV

LX_CHG

CELLS

VADJ

CHGEN#

ACSET

ACGOOD#

Z4012

GATE

ACOFF

CHGEN#

CHG_B+

ACGOOD#

CP_SEL

PVCC_CHG

CHGVADJ<31>

FSTCHG<31>

ACOFF <31>

IREF <31>

ADP_I<31>

ACIN <17,25,31,40>

CP_SEL<31>

BATT+

VIN

VREF

+3VALW

B+

VREF

VREF

B+_BIAS

+5VALW

B+

+COINCELL

+RTCVCC

RTCVREF

RTCVREF

VREF

VREF

+COINCELL

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Charger

B

41 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Charger

B

41 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

Charger

B

41 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

90W adapter

Input UVP : 16.98V

Icharge=(Vsrset/Vvdac)*(0.1/PR29)=3.3A

Fsw : 300KHz

Iadapter=(Vacset/Vvdac)*(0.1/PR22)=4.16A

Input OVP : 22.3V

CP setting

ICHG setting

IREF Current

3.3V 3.3A

COIN RTC Battery

PC34

0.47U_0603_16V7K~D

PC34

0.47U_0603_16V7K~D

1 2

PR28

340K_0402_1%~D

PR28

340K_0402_1%~D

1 2

PR34

340K_0402_1%~D

PR34

340K_0402_1%~D

1 2

PC26

0.1U_0603_25V7K~D

PC26

0.1U_0603_25V7K~D

12

PC20

0.022U_0603_50V7~D

PC20

0.022U_0603_50V7~D

1 2

PC24

.1U_0402_16V7K~D

PC24

.1U_0402_16V7K~D

1 2

PC28

0.1U_0603_25V7K~D

PC28

0.1U_0603_25V7K~D

1 2

PR32

4.7_1206_5%~D

PR32

4.7_1206_5%~D

12

PC37

0.1U_0603_25V7K~D

PC37

0.1U_0603_25V7K~D

12

PR88

0_0402_5%~D

PR88

0_0402_5%~D

1 2

PR26

100K_0402_1%~D

PR26

100K_0402_1%~D

12

PD9

BAT54CW_SOT323~D

PD9

BAT54CW_SOT323~D

3

2

1

PR27

3.3_1210_5%~D

PR27

3.3_1210_5%~D

12

PC1892200P_0402_50V7K~D PC1892200P_0402_50V7K~D

12

PR31

54.9K_0402_1%

PR31

54.9K_0402_1%

1 2

PR86

0_0402_5%~D@

PR86

0_0402_5%~D@

12

PR49

200K_0402_1%~D

PR49

200K_0402_1%~D

12

PC1880.1U_0603_25V7K~D PC1880.1U_0603_25V7K~D

12

PQ7

FDS6675BZ_SO8

PQ7

FDS6675BZ_SO8

S1

S2

S3

G4

D

8D

7D

6D

5

PC190

0.1U_0402_10V7K~D

@

PC190

0.1U_0402_10V7K~D

@

12

PC100 1000P_0603_50V7~D@PC100 1000P_0603_50V7~D@

12

PJPRTC

MOLEX_53398-0271_2P

@PJPRTC

MOLEX_53398-0271_2P

@

1

1

2

2

G1

3

G2

4

PJP17

JUMP_43X118@

PJP17

JUMP_43X118@

11

2

2

PR46

100_0805_5%~D

PR46

100_0805_5%~D

1 2

PQ5

SI4459ADY_SO8

PQ5

SI4459ADY_SO8

S

1

S

2

S

3

G

4

D8

D7

D6

D5

PC36

.1U_0402_16V7K~D

PC36

.1U_0402_16V7K~D

1 2

PQ9

SI2301BDS-T1-E3_SOT23-3

PQ9

SI2301BDS-T1-E3_SOT23-3

2

1 3

PC44

0.1U_0805_25V7M~N

PC44

0.1U_0805_25V7M~N

1 2

PC39

1U_0603_10V6K~D

PC39

1U_0603_10V6K~D

12

PD7

RLS4148_LL34-2

PD7

RLS4148_LL34-2

12

PC25

0.022U_0603_50V7~D

PC25

0.022U_0603_50V7~D

1 2

PC38

0.1U_0603_25V7K~D

PC38

0.1U_0603_25V7K~D

12

PQ6

FDS8884_SO8

PQ6

FDS8884_SO8

3 6

5

7

8

2

4

1

PR90 4.7_1206_5%~DPR90 4.7_1206_5%~D

12

PR50

100K_0402_1%~D

PR50

100K_0402_1%~D

12

PC27

0.1U_0603_25V7K~D

PC27

0.1U_0603_25V7K~D

12

G

D

S

PQ25

SSM3K7002FU_SC70-3

G

D

S

PQ25

SSM3K7002FU_SC70-3

2

13

PC33

0.01U_0402_25V7K~D

@PC33

0.01U_0402_25V7K~D

@

12

PR42

47K_0402_1%~D

PR42

47K_0402_1%~D

1 2

PC30

10U_1206_25V6M~D

PC30

10U_1206_25V6M~D

1 2

G

D

S

PQ15

SSM3K7002FU_SC70-3

G

D

S

PQ15

SSM3K7002FU_SC70-3

2

13

PR53

340K_0402_1%~D

PR53

340K_0402_1%~D

12

PC41

0.1U_0603_25V7K~D

PC41

0.1U_0603_25V7K~D

12

PQ4

FDS6675BZ_SO8

PQ4

FDS6675BZ_SO8

S1

S2

S3

G4

D

8

D

7

D

6

D

5

PC224.7U_0805_25V6K~D PC224.7U_0805_25V6K~D

1 2

PC214.7U_0805_25V6K~D PC214.7U_0805_25V6K~D

1 2

PR51

47K_0402_1%~D

PR51

47K_0402_1%~D

1 2

PC15

0.01U_0402_25V7K~D

PC15

0.01U_0402_25V7K~D

1 2

PL3

10U_919AS-100M-P3_4.5A_20%

PL3

10U_919AS-100M-P3_4.5A_20%

1 2

PC45

.1U_0402_16V7K~D

PC45

.1U_0402_16V7K~D

1 2

PR22

0.015_2512_1%

PR22

0.015_2512_1%

1

3

4

2

PC46

1U_0603_10V4Z~D

PC46

1U_0603_10V4Z~D

1

2

PC181000P_0402_50V7K~D PC181000P_0402_50V7K~D

12

G

D

S

PQ16

SSM3K7002FU_SC70-3

G

D

S

PQ16

SSM3K7002FU_SC70-3

2

13

PR41

47K_0402_1%~D

PR41

47K_0402_1%~D

12

PR25

2.2_0603_5%~D

PR25

2.2_0603_5%~D

1 2

PC16

0.01U_0603_50V7K~D

PC16

0.01U_0603_50V7K~D

1 2

PC31

10U_1206_25V6M~D

PC31

10U_1206_25V6M~D

12

PQ8

FDS6690AS_NL_SO8

PQ8

FDS6690AS_NL_SO8

3 6

5

7

8

2

4

1

PR40

100K_0402_1%~D

PR40

100K_0402_1%~D

12

PC47

0.1U_0603_25V7K~D

PC47

0.1U_0603_25V7K~D

12

PR37 1K_0603_5%~DPR37 1K_0603_5%~D

12

PR39

10_0603_5%~D

PR39

10_0603_5%~D

1 2

G

D

S

PQ14

SSM3K7002FU_SC70-3

G

D

S

PQ14

SSM3K7002FU_SC70-3

2

13

PC171000P_0402_50V7K~D PC171000P_0402_50V7K~D

12

PR30

60.4K_0402_1%

PR30

60.4K_0402_1%

12

PR38

51.1K_0402_1%~D

PR38

51.1K_0402_1%~D

12

PD8

1SS355TE-17_SOD323-2

PD8

1SS355TE-17_SOD323-2

12

PC42

0.01U_0402_25V7K~D

@PC42

0.01U_0402_25V7K~D

@

12

PR36

100K_0402_1%~D

PR36

100K_0402_1%~D

1 2

PC19

2.2U_0805_25V6K

PC19

2.2U_0805_25V6K

1 2

PR24

100K_0402_1%~D

PR24

100K_0402_1%~D

12

PR35

54.9K_0402_1%

PR35

54.9K_0402_1%

1 2

PC35

680P_0603_50V7K~D

PC35

680P_0603_50V7K~D

12

PR29

0.02_2512_1%

PR29

0.02_2512_1%

1

3

4

2

PR52

220K_0402_5%

PR52

220K_0402_5%

1 2

PR54

220K_0402_5%

PR54

220K_0402_5%

1 2

PQ12

TP0610K-T1-E3_SOT23-3

32.8

PQ12

TP0610K-T1-E3_SOT23-3

32.8

2

13

G

D

S

PQ13

SSM3K7002FU_SC70-3

G

D

S

PQ13

SSM3K7002FU_SC70-3

2

13

PR44

210K_0402_1%~D

PR44

210K_0402_1%~D

1 2

PC29

1U_0603_10V6K~D

PC29

1U_0603_10V6K~D

12

PR48

470K_0402_5%~D

PR48

470K_0402_5%~D

1 2

PR23

3.3_1210_5%~D

PR23

3.3_1210_5%~D

12

PC40

0.1U_0603_25V7K~D

PC40

0.1U_0603_25V7K~D

12

PR87

0_0402_5%~D

PR87

0_0402_5%~D

1 2

PC32

10U_1206_25V6M~D

PC32

10U_1206_25V6M~D

12

PR45

499K_0402_1%~D

PR45

499K_0402_1%~D

12

PC234.7U_0805_25V6K~D PC234.7U_0805_25V6K~D

1 2

PR47

1K_0402_5%~D

PR47

1K_0402_5%~D

12

PR43

0_0402_5%~D@

PR43

0_0402_5%~D@

12

PR33

100K_0402_1%~D

PR33

100K_0402_1%~D

12

PR89

143K_0402_1%~D

PR89

143K_0402_1%~D

1 2

PC43

100P_0402_50V8J~D

PC43

100P_0402_50V8J~D

12

G

D

S

PQ11

SSM3K7002FU_SC70-3

G

D

S

PQ11

SSM3K7002FU_SC70-3

2

13

PU4

BQ24751ARHDR_QFN28_5X5

PU4

BQ24751ARHDR_QFN28_5X5

ACN

2

ACP

3

CHGEN

1

ACSET

6

IADAPT 15

VADJ

12

PGND 22

ACDET

5

ACOP

7

BAT 17

BATDRV

14

CELLS 20

SRN 18

SRP 19

LODRV 23

ACDRV

4

VREF

10

LEARN 21

SRSET 16

AGND

9

VDAC

11

OVPSET

8

ACGOOD

13

PVCC 28

HIDRV 26

PH 25

BTST 27

REGN 24

TP 29

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ILIM2

BST3A

LX5

BST5A

DL5

FB3

2VREF_TPS51427

2VREF_TPS51427

DH5DH3

EN_LDO

LX3

FB5

ILM1

TPS51427_EN2

TPS51427_EN1

DL3

MAINPWON

<20,47>

VL

VL

TPS51427_B+

VS

+3VALWP

B+

+5VALWP

VL

TPS51427_B+

2VREF_TPS51427

VL

+3VALW

+5VALW

+5VALW P

+3VALW P

VS

B+

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+3VALWP/+5VALWP

Custom

42 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+3VALWP/+5VALWP

Custom

42 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+3VALWP/+5VALWP

Custom

42 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Rds(on) = 11.5m ohm(max)

Rds(on) = 9m ohm(typical)

Rds(on) = 11.5m ohm(max) ;

Rds(on) = 9m ohm(typical)

5VALWP

Thermai Design Current=6.88A

OCP min=9A

Fsw=400K

3.3VALWP

Thermal Design Current=8.5A

OCP min=11A

Fsw=300K

PC197

0.1U_0603_25V7K~D

PC197

0.1U_0603_25V7K~D

12

PC52

4.7U_0805_25V6K~D

PC52

4.7U_0805_25V6K~D

1 2

PJP24

PAD-OPEN 2x2m~D

@PJP24

PAD-OPEN 2x2m~D

@

2 1

PQ18

SI4686DY-T1-E3_SO8

PQ18

SI4686DY-T1-E3_SO8

3 6

5

7

8

2

4

1

PR61

61.9K_0402_1%~D

PR61

61.9K_0402_1%~D

1 2

PC54

0.1U_0603_25V7K~D

PC54

0.1U_0603_25V7K~D

1 2

PR75

0_0402_5%~D

@PR75

0_0402_5%~D

@

12

+

PC63

330U_D_6.3VM_R18M~D

+

PC63

330U_D_6.3VM_R18M~D

1

2

PR67

200K_0402_5%~D

PR67

200K_0402_5%~D

1 2

PR59

2.2_0603_5%~D

PR59

2.2_0603_5%~D

1 2

PC66

1U_0603_10V6K~D

PC66

1U_0603_10V6K~D

12

PQ17

SI4686DY-T1-E3_SO8

PQ17

SI4686DY-T1-E3_SO8

3 6

5

7

8

2

4

1

PD17

1SS355TE-17_SOD323-2

@PD17

1SS355TE-17_SOD323-2

@

1 2

PC57

0.1U_0603_25V7K~D

PC57

0.1U_0603_25V7K~D

1 2

PC58

680P_0603_50V7K~D

PC58

680P_0603_50V7K~D

12

PR64 0_0402_5%~D@PR64 0_0402_5%~D@

12

PR63

10K_0402_1%~D

PR63

10K_0402_1%~D

1 2

PQ20

FDS6670AS_NL_SO8

PQ20

FDS6670AS_NL_SO8

S

3D6

D5

D7

D8

S

2

G

4

S

1

PL5

2.2UH_MPLC1040L2R2_11A_20%~D

PL5

2.2UH_MPLC1040L2R2_11A_20%~D

12

PR70

0_0402_5%~D

@PR70

0_0402_5%~D

@

1 2

PJP9

JUMP_43X118@

PJP9

JUMP_43X118@

1

122

PR93

100K_0402_5%~D

@PR93

100K_0402_5%~D

@

1 2

PR73

0_0402_5%~D

PR73

0_0402_5%~D

12

PR66

100K_0402_1%~D

PR66

100K_0402_1%~D

1 2

PR57

0_0402_5%~D

PR57

0_0402_5%~D

1 2

PQ24

TP0610K-T1-E3_SOT23-3

@PQ24

TP0610K-T1-E3_SOT23-3

@

2

13

PC65

0.22U_0603_25V7K~D

PC65

0.22U_0603_25V7K~D

1 2

PC56

4.7U_0805_6.3V6K~D

PC56

4.7U_0805_6.3V6K~D

12

PC84

0.1U_0603_25V7K~D

PC84

0.1U_0603_25V7K~D

12

PC49

4.7U_0805_25V6K~D

PC49

4.7U_0805_25V6K~D

1 2

PC51

4.7U_0805_25V6K~D

PC51

4.7U_0805_25V6K~D

1 2

PC62

680P_0603_50V7K~D

PC62

680P_0603_50V7K~D

12

PR58

4.7_1206_5%~D

PR58

4.7_1206_5%~D

12

PQ10

DTC115EUA_SC70-3

@PQ10

DTC115EUA_SC70-3

@

2

13

PR71

0_0402_5%~D

PR71

0_0402_5%~D

1 2

PC59

1U_0603_10V6K~D

PC59

1U_0603_10V6K~D

1 2

PR55

0_0805_5%

PR55

0_0805_5%

1 2

PC80

0.1U_0402_10V7K~D

PC80

0.1U_0402_10V7K~D

12

PU5

ISL6237IRZ-T_QFN32_5X5

PU5

ISL6237IRZ-T_QFN32_5X5

UGATE2

26

BOOT2

24

PHASE2

25

LGATE2

23

OUT2

30

REFIN2

32

TON

2

LDOREFIN

8

NC

20

EN_LDO

4

EN2

27

EN1

14

POK1 13

POK2 28

PVCC 19

VCC 3

SKIP 29

LDO 7

ILIM2 31

BYP 9

OUT1 10

GND

21

PGND 22

LGATE1 18

PHASE1 16

BOOT1 17

UGATE1 15

VIN 6

NC

5

REF

1

FB1 11

ILIM1 12

TP

33

PC67

0.047U_0603_16V7K~D

PC67

0.047U_0603_16V7K~D

12

PR72

806K_0603_1%

PR72

806K_0603_1%

1 2

PL23

FBMA-L18-453215-900LMA90T_1812

PL23

FBMA-L18-453215-900LMA90T_1812

1 2

PD10

RLZ5.1B_LL34

PD10

RLZ5.1B_LL34

1 2

PC48

4.7U_0805_25V6K~D

PC48

4.7U_0805_25V6K~D

1 2

PC61

0.1U_0603_25V7K~D

PC61

0.1U_0603_25V7K~D

1 2

PC50

2200P_0402_50V7K~D

PC50

2200P_0402_50V7K~D

12

+

PC60

330U_D_6.3VM_R18M~D

+

PC60

330U_D_6.3VM_R18M~D

1

2

PC68

0.047U_0402_16V7K~N

@

PC68

0.047U_0402_16V7K~N

@

12

PC79

0.1U_0402_10V7K~D

PC79

0.1U_0402_10V7K~D

12

PD11

1SS355TE-17_SOD323-2

PD11

1SS355TE-17_SOD323-2

1 2

PL4

2.2UH_MPLC1040L2R2_11A_20%~D

PL4

2.2UH_MPLC1040L2R2_11A_20%~D

1 2

PJP7

JUMP_43X118@

PJP7

JUMP_43X118@

1

122

PJP11

JUMP_43X118@

PJP11

JUMP_43X118@

1

122

PR68

210K_0402_1%~D

PR68

210K_0402_1%~D

12

PC55

1U_0603_10V6K~D

PC55

1U_0603_10V6K~D

1 2

PR91

100K_0402_5%~D

@

PR91

100K_0402_5%~D

@

12

PJP5

JUMP_43X118@

PJP5

JUMP_43X118@

1

122

PR74

47K_0402_5%~D

@PR74

47K_0402_5%~D

@

1 2

PQ19

FDS6670AS_NL_SO8

PQ19

FDS6670AS_NL_SO8

S

3D6

D5

D7

D8

S

2

G4

S

1

PR62

10K_0402_1%~D

@

PR62

10K_0402_1%~D

@

1 2

PR56

4.7_1206_5%~D

PR56

4.7_1206_5%~D

12

PR60

2.2_0603_5%~D

PR60

2.2_0603_5%~D

1 2

PC53

2200P_0402_50V7K~D

PC53

2200P_0402_50V7K~D

12

PR65 0_0402_5%~DPR65 0_0402_5%~D

1 2

PR69

255K_0402_1%~D

PR69

255K_0402_1%~D

12

PC64 0.22U_0603_10V7K~DPC64 0.22U_0603_10V7K~D

1 2

PQ21

TP0610K-T1-E3_SOT23-3

PQ21

TP0610K-T1-E3_SOT23-3

2

1 3

PR92

100K_0402_5%~D

@

PR92

100K_0402_5%~D

@

12

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

EN_VCCP

TRIP_VCCP

V5DRV_VCCP

LX_VCCP

UG_VCCP

BST_VCCP

TON_VCCP

FB_VCCP

V5FILT_VCCP

VCCP_B++

SUSP#<28,31,33,44,45>

B+

+1.05VSP

+5VALW

+5VALW

+1.05VS

+1.05VSP

+1.8VS

+1.8VSP

+3VALW

+5VALW

+1.8VSP

SUSP#<28,31,33,44,45>

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+1.05VSP/+1.8VSP

Custom

43 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+1.05VSP/+1.8VSP

Custom

43 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+1.05VSP/+1.8VSP

Custom

43 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

+1.05VSP

Thermal Desig Current=5A

OCP min=9A

Fsw=300KHz

+1.8VSP

Thermal Desig Current=0.69A

+

PC73

220U_D2_4VM

+

PC73

220U_D2_4VM

1

2

PC75

680P_0603_50V7K~D

PC75

680P_0603_50V7K~D

12

PC170

1U_0402_6.3V6K~D

PC170

1U_0402_6.3V6K~D

12

PC69

10U_1206_25V6M~D

PC69

10U_1206_25V6M~D

12

PC85

0.1U_0603_25V7K~D

PC85

0.1U_0603_25V7K~D

12

PC87

1000P_0402_50V7K~D

PC87

1000P_0402_50V7K~D

12

PR82

0_0603_5%~D

PR82

0_0603_5%~D

12

PC74

4.7U_0805_6.3V6K~D

PC74

4.7U_0805_6.3V6K~D

12

PQ23

FDS6670AS_NL_SO8

PQ23

FDS6670AS_NL_SO8

S

3D6

D5

D7

D8

S

2

G

4

S

1

PR76

267K_0402_1%~D

PR76

267K_0402_1%~D

1 2

PJP10

JUMP_43X118

@PJP10

JUMP_43X118

@

1

122

PR77

0_0402_5%~D

PR77

0_0402_5%~D

12

PL6

2.2UH_MPLC1040L2R2_11A_20%~D

PL6

2.2UH_MPLC1040L2R2_11A_20%~D

1 2

PJP23

JUMP_43X118

@PJP23

JUMP_43X118

@

1

122

PU13 RT9025PU13 RT9025

PGOOD 1

VIN

3VOUT 6

5

NC

ADJ 7

8

GND

VDD

4

EN

2

9

GND

PC88

10U_1206_25V6M~D

PC88

10U_1206_25V6M~D

12

PR84

8.66K_0402_1%~D

PR84

8.66K_0402_1%~D

12

PQ22

SI4686DY-T1-E3_SO8

PQ22

SI4686DY-T1-E3_SO8

3 6

5

7

8

2

4

1

PR85

21.5K_0402_1%~D

PR85

21.5K_0402_1%~D

12

PC72

.1U_0402_16V7K~D

@PC72

.1U_0402_16V7K~D

@

12

PC70

10U_1206_25V6M~D

PC70

10U_1206_25V6M~D

12

PC171

0.1U_0402_16V7K~D

@PC171

0.1U_0402_16V7K~D

@

12

PR95 0_0402_5%~DPR95 0_0402_5%~D

1 2

PR81

10K_0402_1%~D

PR81

10K_0402_1%~D

1 2

PR97

806_0402_1%~D

PR97

806_0402_1%~D

12

PC78

47P_0402_50V8J~D

@PC78

47P_0402_50V8J~D

@

12

PC172

10U_1206_25V6M~D

PC172

10U_1206_25V6M~D

12

PU6

TPS51117RGYR_QFN14_3.5x3.5

PU6

TPS51117RGYR_QFN14_3.5x3.5

VOUT

3

V5FILT

4

EN_PSV 1

TON

2

VFB

5

PGOOD

6DRVL 9

DRVH 13

LL 12

GND

7

PGND

8

TRIP 11

V5DRV 10

VBST 14

TP 15

PJP25

JUMP_43X118

@PJP25

JUMP_43X118

@

1

122

PC86

2200P_0402_50V7K~D

PC86

2200P_0402_50V7K~D

12

PJP20

PAD-OPEN 4x4m

@PJP20

PAD-OPEN 4x4m

@

12

PC77

4.7U_0805_10V6K~D

PC77

4.7U_0805_10V6K~D

12

PR78

2.2_0603_5%~D

PR78

2.2_0603_5%~D

1 2

PR96

1K_0402_1%~D

PR96

1K_0402_1%~D

12

PR83

4.7_1206_5%~D

PR83

4.7_1206_5%~D

12

PR80

300_0603_5%~D

PR80

300_0603_5%~D

1 2

PJP28

JUMP_43X118

@PJP28

JUMP_43X118

@

1

122

PC76

1U_0603_10V6K~D

PC76

1U_0603_10V6K~D

12

PC71 0.1U_0603_25V7K~DPC71 0.1U_0603_25V7K~D

1 2

PC126

10U_1206_25V6M~D

PC126

10U_1206_25V6M~D

12

PC81

0.1U_0402_10V7K~D

PC81

0.1U_0402_10V7K~D

12

PR79

30.1K_0402_1%~D

PR79

30.1K_0402_1%~D

12

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

6268_1.5VP

6268_1.5VP

LG_1.5VP

ISEN_1.5VP

PHASE_1.5VP

UG_1.5VP

BOOT_1.5VP

6268_1.5VP

6268_1.5VP_B+

SYSON<28,31,33>

1.5V_PW RGD<6>

SUSP# <28,31,33,43,45>

1.5VS_DDR_PW RGD <33>

+3VALW

+0.75VSP

+1.5VP

+1.5VP +1.5V

+0.75VSP +0.75VS

B+

+1.5VP

+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+1.5VSP/+0.75VSP

Custom

44 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+1.5VSP/+0.75VSP

Custom

44 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+1.5VSP/+0.75VSP

Custom

44 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

+0.75VSP

Thermal Design Current:0.7A

Peak current:1A

Vout=VDDQSNS/2=1.5V/2=0.75V

+1.5VP

1.5VP

Thermal Design Current=12.8A

OCP min=16A

Fsw=300KHz

PR131

0_0402_5%~D

@PR131

0_0402_5%~D

@

12

PC219

10U_0805_6.3V6M~D

PC219

10U_0805_6.3V6M~D

12

PR222

0_0603_5%~D

PR222

0_0603_5%~D

12

PC140

1U_0603_10V6K~D

PC140

1U_0603_10V6K~D

12

PC221

0.1U_0402_10V7K~D

PC221

0.1U_0402_10V7K~D

12

PC224

68P_0402_50V8J~D

PC224

68P_0402_50V8J~D

12

PC138

4.7U_0805_6.3V6K~D

PC138

4.7U_0805_6.3V6K~D

12

PC220

10U_0805_6.3V6M~D

PC220

10U_0805_6.3V6M~D

12

PR228

33K_0402_1%~D

PR228

33K_0402_1%~D

12

PC222

.1U_0402_16V7K~D

@

PC222

.1U_0402_16V7K~D

@

12

PC211

0.1U_0603_25V7K~D

PC211

0.1U_0603_25V7K~D

12

PC216

2.2U_0603_6.3V6K~D

PC216

2.2U_0603_6.3V6K~D

1 2

PC214

10U_1206_25V6M~D

PC214

10U_1206_25V6M~D

12

PU10

RT9026_MSOP10

PU10

RT9026_MSOP10

GND 8

VDDQSNS

1

VTT

3

VLDOIN

2

VIN 10

PGND

4

S3 7

VTTREF 6

S5 9

VTTSNS

5

GND

11

PQ52

FDMS8670S_ POWER56-8~D

PQ52

FDMS8670S_ POWER56-8~D

4

1

2

3 5

PC223

680P_0603_50V7K~D

PC223

680P_0603_50V7K~D

12

PC139

4.7U_0805_6.3V6K~D

@

PC139

4.7U_0805_6.3V6K~D

@

12

PR220

10K_0402_1%~D

PR220

10K_0402_1%~D

12

PR225

0_0402_5%~D

PR225

0_0402_5%~D

1 2

+

PC226

330U_Y_2.5VM

+

PC226

330U_Y_2.5VM

1

2

PC228

0.01U_0402_25V7K~D

PC228

0.01U_0402_25V7K~D

12

PC144

0.1U_0402_16V7K~D

@PC144

0.1U_0402_16V7K~D

@

12

PL24

FBMA-L18-453215-900LMA90T_1812

PL24

FBMA-L18-453215-900LMA90T_1812

1 2

PJP22

JUMP_43X118

@PJP22

JUMP_43X118

@

1

122

PR229

45.3K_0402_1%~D

PR229

45.3K_0402_1%~D

12

+

PC225

330U_Y_2.5VM

+

PC225

330U_Y_2.5VM

1

2

PC218

2.2U_0603_6.3V6K~D

PC218

2.2U_0603_6.3V6K~D

12

PC217

0.1U_0603_25V7K~D

@PC217

0.1U_0603_25V7K~D

@

12

PC215

0.1U_0603_25V7K~D

PC215

0.1U_0603_25V7K~D

1 2

PL15

1UH_FDUE1040D-1R0M-P3_21.3A_20%

PL15

1UH_FDUE1040D-1R0M-P3_21.3A_20%

1 2

PR226

3.01K_0402_1%~D

PR226

3.01K_0402_1%~D

1 2

PC141

10U_0805_10V6K~D

PC141

10U_0805_10V6K~D

12

PC227

2200P_0402_50V7K~D

PC227

2200P_0402_50V7K~D

12

PR221

2.2_0603_5%~D

PR221

2.2_0603_5%~D

1 2

PR231

1K_0402_1%~D

PR231

1K_0402_1%~D

12

PC213

10U_1206_25V6M~D

PC213

10U_1206_25V6M~D

12

PQ51

FDMS8670S_ POWER56-8~D

PQ51

FDMS8670S_ POWER56-8~D

4

1

2

3 5

PC143

0.1U_0402_16V7K~D

PC143

0.1U_0402_16V7K~D

12

PR227

4.7_1206_5%~D

PR227

4.7_1206_5%~D

12

PR224 4.7_0603_5%~DPR224 4.7_0603_5%~D

1 2

PC212

2200P_0402_50V7K~D

PC212

2200P_0402_50V7K~D

12

PU19

ISL6268CAZ-T_SSOP16

PU19

ISL6268CAZ-T_SSOP16

EN

5

BOOT 15

PVCC 14

VIN

3

VCC

4

PGOOD 2

PHASE 1

UG 16

LG 13

PGND 12

VO

10

COMP

6

FB

7

FSET

9

ISEN 11

GND 8

PJP18

JUMP_43X118

@PJP18

JUMP_43X118

@

1

122

PR130

0_0402_5%~D

PR130

0_0402_5%~D

12

PQ50

FDMS8692_POW ER56-8-5~D

PQ50

FDMS8692_POW ER56-8-5~D

3 5

2

4

1

PR230

1.5K_0402_1%~D

PR230

1.5K_0402_1%~D

1 2

PC142

10U_0805_10V6K~D

PC142

10U_0805_10V6K~D

12

PJP21

PAD-OPEN 2x2m~D

@PJP21

PAD-OPEN 2x2m~D

@

2 1

PR223

0_0603_5%~D

PR223

0_0603_5%~D

12

PJP35

JUMP_43X118

@PJP35

JUMP_43X118

@

1

122

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

6268_1.1VS_VTTP

LG_1.1VS_VTTP

ISEN_1.1VS_VTTP

PHASE_1.1VS_VTTP

UG_1.1VS_VTTP

BOOT_1.1VS_VTTP

6268_1.1VS_VTTP

6268_1.1VS_VTTP_B+

6268_1.1VS_VTTP

SUSP#<28,31,33,43,44>

H_VTTPWRGD

<6>

VTT_SENSE <8>

H_VTTVID1 <8>

H_VTTVID1<8>

B+

+1.1VS_VTTP

+5VALW

+1.1VS_VTT

+1.1VS_VTTP

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+1.1VS_VTTP

Custom

45 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+1.1VS_VTTP

Custom

45 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+1.1VS_VTTP

Custom

45 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

+1.1VS_VTTP

1.1VS_VTTP

Thermal Design Current=18A

OCP min=24A

Fsw=300KHz

H_VTTVID1 = "High" , Vo = 1.05V

H_VTTVID1 = "Low" , Vo = 1.1V

PC231

10U_1206_25V6M~D

PC231

10U_1206_25V6M~D

12

PC286

10U_1206_25V6M~D

PC286

10U_1206_25V6M~D

12

PR305

10_0402_5%~D

PR305

10_0402_5%~D

12

PJP33

JUMP_43X118@

PJP33

JUMP_43X118@

1

122

PR250

10K_0402_5%~D

PR250

10K_0402_5%~D

1 2

PC237

10U_0805_6.3V6M~D

PC237

10U_0805_6.3V6M~D

12

PR232

9.31K_0402_1%~D

PR232

9.31K_0402_1%~D

12

PJP32

JUMP_43X118@

PJP32

JUMP_43X118@

1

122

+

PC244

330U_Y_2.5VM

+

PC244

330U_Y_2.5VM

1

2

PC229

0.1U_0603_25V7K~D

PC229

0.1U_0603_25V7K~D

12

PR238

4.75K_0402_1%~D

PR238

4.75K_0402_1%~D

1 2

PR246

10K_0402_5%~D

PR246

10K_0402_5%~D

1 2

PR242

1.5K_0402_1%~D

PR242

1.5K_0402_1%~D

1 2

PC242

68P_0402_50V8J~D

PC242

68P_0402_50V8J~D

12

PR240

33K_0402_1%~D

PR240

33K_0402_1%~D

12

PC239

0.1U_0402_10V7K~D

PC239

0.1U_0402_10V7K~D

12

PC238

10U_0805_6.3V6M~D

PC238

10U_0805_6.3V6M~D

12

PR236 4.7_0603_5%~DPR236 4.7_0603_5%~D

1 2

PU20

ISL6268CAZ-T_SSOP16

PU20

ISL6268CAZ-T_SSOP16

EN

5

BOOT 15

PVCC 14

VIN

3

VCC

4

PGOOD 2

PHASE 1

UG 16

LG 13

PGND 12

VO

10

COMP

6

FB

7

FSET

9

ISEN 11

GND 8

PC247

0.068U_0402_16V7K~D

PC247

0.068U_0402_16V7K~D

1 2

PL22

FBMA-L18-453215-900LMA90T_1812

PL22

FBMA-L18-453215-900LMA90T_1812

1 2

PC232

10U_1206_25V6M~D

PC232

10U_1206_25V6M~D

12

PC236

2.2U_0603_6.3V6K~D

PC236

2.2U_0603_6.3V6K~D

12

PR327

2.7K_0402_1%~D

PR327

2.7K_0402_1%~D

12

PR237

0_0402_5%~D

PR237

0_0402_5%~D

1 2

PC246

0.01U_0402_25V7K~D

PC246

0.01U_0402_25V7K~D

12

PR234

0_0603_5%~D

PR234

0_0603_5%~D

12

PR239

4.7_1206_5%~D

PR239

4.7_1206_5%~D

12

PC234

2.2U_0603_6.3V6K~D

PC234

2.2U_0603_6.3V6K~D

1 2

PR235

0_0603_5%~D

PR235

0_0603_5%~D

12

PQ55

FDMS8670S_ POWER56-8~D

PQ55

FDMS8670S_ POWER56-8~D

4

1

2

3 5

+

PC243

330U_Y_2.5VM

+

PC243

330U_Y_2.5VM

1

2

PR243

2K_0402_1%~D

PR243

2K_0402_1%~D

12

PJP31

JUMP_43X118@

PJP31

JUMP_43X118@

1

122

PL16

1UH_FDUE1040D-1R0M-P3_21.3A_20%

PL16

1UH_FDUE1040D-1R0M-P3_21.3A_20%

1 2

PC241

680P_0603_50V7K~D

PC241

680P_0603_50V7K~D

12

PQ54

FDMS8670S_ POWER56-8~D

PQ54

FDMS8670S_ POWER56-8~D

4

1

2

3 5

G

D

S

PQ57

SSM3K7002FU_SC70-3

G

D

S

PQ57

SSM3K7002FU_SC70-3

2

13

PR241

45.3K_0402_1%~D

PR241

45.3K_0402_1%~D

12

PC235

0.1U_0603_25V7K~D

@PC235

0.1U_0603_25V7K~D

@

12

PR249

10K_0402_5%~D

PR249

10K_0402_5%~D

1 2

PC240

.1U_0402_16V7K~D

@PC240

.1U_0402_16V7K~D

@

12

PR233

2.2_0603_5%~D

PR233

2.2_0603_5%~D

1 2

PQ53

FDMS8692_POWER56-8-5~D

PQ53

FDMS8692_POWER56-8-5~D

3 5

2

4

1

PC248

0.01U_0402_16V7K~D

PC248

0.01U_0402_16V7K~D

12

PC230

2200P_0402_50V7K~D

PC230

2200P_0402_50V7K~D

12

PC245

2200P_0402_50V7K~D

PC245

2200P_0402_50V7K~D

12

PR251

100K_0402_5%~D

PR251

100K_0402_5%~D

1 2

PR248

10K_0402_5%~D

PR248

10K_0402_5%~D

1 2

PC233

0.1U_0603_25V7K~D

PC233

0.1U_0603_25V7K~D

1 2

G

D

S

PQ56

SSM3K7002FU_SC70-3

G

D

S

PQ56

SSM3K7002FU_SC70-3

2

13

PR247

17.8K_0402_1%~D

PR247

17.8K_0402_1%~D

1 2

PR245

17.8K_0402_1%~D

@PR245

17.8K_0402_1%~D

@

1 2

PR244

0_0402_5%~D

PR244

0_0402_5%~D

1 2

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

H H

G G

F F

E E

D D

C C

B B

A A

BOOT1_1

H_PROCHOT#_R

LGATE1

V2N

BOOT2 BOOT2_2

UGATE2

PHASE1

VSSSENSE

V1N

CLK_ENABLE#

LGATE2

V2N

V1N

PHASE2

BOOT1

UGATE1

CPU_VID0<8>

CPU_VID1<8>

CPU_VID2<8>

CPU_VID3<8>

CPU_VID4<8>

CPU_VID5<8>

CPU_VID6<8>

H_DPRSLPVR<8>

VR_ON<31>

CLK_ENABLE#<13>

VGATE<13,17,31>

H_PROCHOT#<6>

VCCSENSE <8>

VSSSENSE<8>

IMVP_IMON<8>

H_PSI#<8>

+CPU_B+

B+

+CPU_B+

+5VS

+3VS

+5VS

+CPU_B+

+1.1VS_VTT

+1.1VS_VTT

+CPU_CORE

+CPU_CORE

+CPU_CORE

VSUM-

VSUM-

VSUM-

ISEN2

ISEN2

ISEN1

ISEN1

VSUM+

VSUM+

VSUM+

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+CPU_CORE

C

46 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+CPU_CORE

C

46 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

+CPU_CORE

C

46 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Layout Note:

PH3 place near Phase1 L-MOS

Layout Note:

Place near Phase1 Choke

OCP calculation: Assume DCR=0.88mOhm

G1=Rn/(Rn+Rsum/3),

where Rn=PR224//(PR171+PH5); Rsum=PR143,PR215

DROOP=2*(DCR/2)*G1*Rdroop/Ri=1.896mOhm

where Rdroop=PR161;Ri=PR212

Iocp=42.7u*Rdroop/DROOP=~68A.

Iccmax= TBD

I_TDC=TDB

OCP=68A, Intel spec=TDB

PR257 0_0402_5%~DPR257 0_0402_5%~D

1 2

PQ59

FDMS8670S_ POWER56-8~D

PQ59

FDMS8670S_ POWER56-8~D

G

2

D3

S

1

PR269

0_0402_5%~D

PR269

0_0402_5%~D

1 2

PC277

0.33U_0603_10V7K~D

PC277

0.33U_0603_10V7K~D

PR253 0_0402_5%~DPR253 0_0402_5%~D

1 2

PC271

0.1U_0603_25V7K~D

PC271

0.1U_0603_25V7K~D

12

PC275

0.22U_0603_10V7K~D

PC275

0.22U_0603_10V7K~D

1 2

PC287

10U_1206_25V6K~D

PC287

10U_1206_25V6K~D

12

PH5

10K_0603_1%_ERTJ1VG103FA~D

PH5

10K_0603_1%_ERTJ1VG103FA~D

1 2

PQ65

FDMS8692_POWER56-8-5~D

PQ65

FDMS8692_POWER56-8-5~D

4

1

2

3 5

PC252

10U_1206_25V6K~D

PC252

10U_1206_25V6K~D

12

PR261 499_0402_1%~DPR261 499_0402_1%~D

1 2

PC283

680P_0603_50V7K~D

PC283

680P_0603_50V7K~D

12

PC266

0.22U_0402_10V6K~D

PC266

0.22U_0402_10V6K~D

12

PR291

2.2_0603_5%~D

PR291

2.2_0603_5%~D

12

PR272

147K_0402_1%~D

PR272

147K_0402_1%~D

1 2

PR301

0_0402_5%~D

@PR301

0_0402_5%~D

@

1 2

PR292 0_0402_5%~DPR292 0_0402_5%~D

1 2

PC273

10U_1206_25V6K~D

PC273

10U_1206_25V6K~D

12

PR303 10_0402_5%~DPR303 10_0402_5%~D

1 2

PC264

10P_0402_50V8J~D

PC264

10P_0402_50V8J~D

1 2

PR302 0_0402_5%~DPR302 0_0402_5%~D

1 2

PR256 0_0402_5%~DPR256 0_0402_5%~D

1 2

PC270

0.033U_0603_16V7K~D

PC270

0.033U_0603_16V7K~D

12

PC274

10U_1206_25V6K~D

PC274

10U_1206_25V6K~D

12

PR264

1_0402_5%~D

PR264

1_0402_5%~D

12

PR296

10K_0402_5%~D

PR296

10K_0402_5%~D

12

PC265

150P_0402_50V8J~D

PC265

150P_0402_50V8J~D

1 2

PR288

12.1K_0402_1%~D

PR288

12.1K_0402_1%~D

12

PC280

0.01U_0402_16V7K~D

PC280

0.01U_0402_16V7K~D

12

PR294

4.7_1206_5%~D

PR294

4.7_1206_5%~D

12

PR278

249K_0402_1%~D

@PR278

249K_0402_1%~D

@

12

PR266

10K_0402_5%~D

PR266

10K_0402_5%~D

12

PL17

FBMA-L18-453215-900LMA90T_1812~D

PL17

FBMA-L18-453215-900LMA90T_1812~D

1 2

PH4

470K_0402_5%_ERTJ0EV474J~D

PH4

470K_0402_5%_ERTJ0EV474J~D

12

PC250

2200P_0402_50V7K~D

PC250

2200P_0402_50V7K~D

12

PR284 0_0402_5%~DPR284 0_0402_5%~D

1 2

PQ60

FDMS8670S_ POWER56-8~D

PQ60

FDMS8670S_ POWER56-8~D

G

2

D3

S

1

+

PC253

100U_25V_M~D

+

PC253

100U_25V_M~D

1

2

PR297

1_0402_5%~D

PR297

1_0402_5%~D

12

PC261

1000P_0402_50V7K~D

PC261

1000P_0402_50V7K~D

12

+

PC255

100U_25V_M~D

@

+

PC255

100U_25V_M~D

@

1

2

PR285

412K_0402_1%~D

PR285

412K_0402_1%~D

1 2

PR295

3.65K_0603_1%~D

PR295

3.65K_0603_1%~D

12

PL19

0.36UH_ETQP4LR36ZFC_28A_20%~D

PL19

0.36UH_ETQP4LR36ZFC_28A_20%~D

1

3

4

2

PR283 0_0402_5%~DPR283 0_0402_5%~D

1 2

PU21

ISL62883HRZ-T_QFN40_5X5~D

PU21

ISL62883HRZ-T_QFN40_5X5~D

PGOOD

1

PSI#

2

RBIAS

3

VR_TT#

4

NTC

5

VW

6

COMP

7

FB

8

VIN

17

ISEN1

11

VSEN

12

RTN

13

ISUM-

14

ISUM+

15

VDD

16

VSSP1 22

LGATE1 23

PWM3 24

VCCP 25

LGATE2 26

VSSP2 27

PHASE2 28

UGATE2 29

VID0 31

VID1 32

VID2 33

VID3 34

VID5 36

VID6 37

VR_ON 38

ISEN3

9

ISEN2

10

IMON

18

BOOT1

19

UGATE1

20

AGND

41

PHASE1 21

BOOT2 30

DPRSLPVR 39

CLK_EN# 40

VID4 35

PC278

0.022U_0603_25V7K~D

PC278

0.022U_0603_25V7K~D

12

PQ61

FDMS8692_POWER56-8-5~D

PQ61

FDMS8692_POWER56-8-5~D

4

1

2

3 5

PR281 0_0402_5%~DPR281 0_0402_5%~D

1 2

PR265

1.91K_0402_1%~D

PR265

1.91K_0402_1%~D

1 2

PC257

680P_0603_50V7K~D

PC257

680P_0603_50V7K~D

12

PC267

0.22U_0402_10V6K~D

PC267

0.22U_0402_10V6K~D

12

PC284

1200P_0402_50V7K~D

@PC284

1200P_0402_50V7K~D

@

1 2

PR286 0_0402_5%~DPR286 0_0402_5%~D

1 2

PC263

390P_0402_50V7K~D

PC263

390P_0402_50V7K~D

1 2

PC256

0.22U_0603_10V7K~D

PC256

0.22U_0603_10V7K~D

1 2

PR274 0_0402_5%~DPR274 0_0402_5%~D

1 2

PR277 0_0402_5%~DPR277 0_0402_5%~D

1 2

PC268

1U_0603_10V6K~D

PC268

1U_0603_10V6K~D

12

PQ62

FDMS8670S_ POWER56-8~D

PQ62

FDMS8670S_ POWER56-8~D

G

2

D3

S

1

PC281

1000P_0402_50V7K~D

PC281

1000P_0402_50V7K~D

12

PQ58

FDMS8692_POWER56-8-5~D

PQ58

FDMS8692_POWER56-8-5~D

4

1

2

3 5

PC282

330P_0402_50V7K~D

PC282

330P_0402_50V7K~D

12

PR271 0_0402_5%~DPR271 0_0402_5%~D

1 2

PR255 0_0402_5%~DPR255 0_0402_5%~D

1 2

PR304

100_0402_1%~D

@PR304

100_0402_1%~D

@

1 2

PR300

11K_0402_1%~D

PR300

11K_0402_1%~D

12

PR299

0_0402_5%~D

PR299

0_0402_5%~D

12

PR273 68_0402_5%~DPR273 68_0402_5%~D

1 2

PC262

1U_0603_10V6K~D

PC262

1U_0603_10V6K~D

12

PR290

82.5_0402_1%~D

PR290

82.5_0402_1%~D

12

PR276 4.02K_0402_1%~DPR276 4.02K_0402_1%~D

1 2

PR259

2.2_0603_5%~D

PR259

2.2_0603_5%~D

12

PR293

2.87K_0402_1%~D

PR293

2.87K_0402_1%~D

12

PR258 0_0402_5%~DPR258 0_0402_5%~D

1 2

PR268

1.91K_0402_1%~D

PR268

1.91K_0402_1%~D

12

PR298

1.15K_0402_1%~D

PR298

1.15K_0402_1%~D

1 2

PC272

2200P_0402_50V7K~D

PC272

2200P_0402_50V7K~D

12

PR282

3.4K_0402_1%~D

PR282

3.4K_0402_1%~D

1 2

PC251

10U_1206_25V6K~D

PC251

10U_1206_25V6K~D

12

PR275

0_0402_5%~D

PR275

0_0402_5%~D

1 2

PR260 0_0402_5%~DPR260 0_0402_5%~D

1 2

PC259 56P_0402_50V8~D@PC259 56P_0402_50V8~D@

1 2

PC258

1U_0603_10V6K~D

PC258

1U_0603_10V6K~D

1 2

PR280

562_0402_1%~D

PR280

562_0402_1%~D

1 2

PR254 0_0402_5%~DPR254 0_0402_5%~D

1 2

PC276

2700P_0402_50V7K~D

PC276

2700P_0402_50V7K~D

12

PR289 10_0402_5%~DPR289 10_0402_5%~D

1 2

PR252 0_0402_5%~DPR252 0_0402_5%~D

1 2

PQ64

FDMS8692_POWER56-8-5~D

PQ64

FDMS8692_POWER56-8-5~D

4

1

2

3 5

PC285

.1U_0402_16V7K~D

PC285

.1U_0402_16V7K~D

12

PC279

330P_0402_50V7K~D

PC279

330P_0402_50V7K~D

12

PR262

4.7_1206_5%~D

PR262

4.7_1206_5%~D

12

PC269

0.22U_0603_25V7K~D

PC269

0.22U_0603_25V7K~D

12

PL18

0.36UH_ETQP4LR36ZFC_28A_20%~D

PL18

0.36UH_ETQP4LR36ZFC_28A_20%~D

1

3

4

2

PR267

0_0402_5%~D

@PR267

0_0402_5%~D

@

1 2

PR263

3.65K_0603_1%~D

PR263

3.65K_0603_1%~D

12

PC260

22P_0402_50V8J~D

PC260

22P_0402_50V8J~D

1 2

PR279

8.06K_0402_1%~D

PR279

8.06K_0402_1%~D

12

PC249

0.1U_0603_25V7K~D

PC249

0.1U_0603_25V7K~D

12

+

PC254

100U_25V_M~D

+

PC254

100U_25V_M~D

1

2

PR287 1_0402_5%~DPR287 1_0402_5%~D

1 2

PQ63

FDMS8670S_ POWER56-8~D

PQ63

FDMS8670S_ POWER56-8~D

G

2

D3

S

1

PR270 100K_0402_5%~D@PR270 100K_0402_5%~D@

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

OTP_IN OTP_IN+

OTP_IN-

OTP_OUT

BATT_IN

BATT_TEMP

BATT+

BATT_B/I

BATT_SMD

BATT++

BATT_SMC

BATT_OUT

BATT_TEMP <31>

EC_SMB_DA1 <31>

EC_SMB_CK1 <31>

BATT_OVP<31>

MAINPWON <20,42>

VL

VL VS

VL

+3VALWP

BATT++

BATT+

BATT+

VS

+3VALWP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

BATTERY CONN

Custom

47 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

BATTERY CONN

Custom

47 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

BATTERY CONN

Custom

47 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

CPU

SMART

SMARTSMART

SMART

Battery:

Battery:Battery:

Battery:

9.BAT+

9.BAT+9.BAT+

9.BAT+

8.BAT+

8.BAT+8.BAT+

8.BAT+

7.ID

7.ID7.ID

7.ID

6.B/I

6.B/I6.B/I

6.B/I

5.TS

5.TS5.TS

5.TS

4.SMD

4.SMD4.SMD

4.SMD

3.SMC

3.SMC3.SMC

3.SMC

2.GND

2.GND2.GND

2.GND

1.GND

1.GND1.GND

1.GND

CPU

Recovery at 50 +-3 degree C

PH3 under CPU botten side :

CPU thermal protection at 90 +-3 degree C

Place clsoe to EC pin

PJPB1 battery connector

Battery Connect/OTP

BATT_OVP=0.08338*BATT+

LI-3S :13.5V----BATT_OVP=1.126V

PC166

0.1U_0603_25V7K~D

PC166

0.1U_0603_25V7K~D

1 2

PU12B

LM358ADR_SO8

PU12B

LM358ADR_SO8

+5

-6

0

7

P8

G

4

PC169

1U_0603_10V6K~D

PC169

1U_0603_10V6K~D

12

PD14

DA204U_SOT323~D

@

PD14

DA204U_SOT323~D

@

2

3

1

PJPB1

SUYIN_200275MR009F50PZR~D

PJPB1

SUYIN_200275MR009F50PZR~D

11

33

44

55

66

88

99

22

77

GND 10

GND 11

PD12

DA204U_SOT323~D

@

PD12

DA204U_SOT323~D

@

2

3

1

PC161

100P_0402_50V8J~D

PC161

100P_0402_50V8J~D

12

PR179

100_0402_5%~D

PR179

100_0402_5%~D

1 2

PC162

1000P_0402_50V7K~D

PC162

1000P_0402_50V7K~D

12

PR181

453K_0402_1%~D

PR181

453K_0402_1%~D

12

PR187

10K_0402_1%~D

PR187

10K_0402_1%~D

1 2

PH3

100K_0402_1%_NCP15WF104F03RC

PH3

100K_0402_1%_NCP15WF104F03RC

12

PD13

DA204U_SOT323~D

@

PD13

DA204U_SOT323~D

@

2

3

1

PR185

205K_0402_1%~D

PR185

205K_0402_1%~D

1 2

PR188

150K_0402_1%~D

PR188

150K_0402_1%~D

1 2

PC165

.1U_0402_16V7K~D

@PC165

.1U_0402_16V7K~D

@

1 2

PC163

0.01U_0402_25V7K~D

PC163

0.01U_0402_25V7K~D

12

PR180

100_0402_5%~D

PR180

100_0402_5%~D

1 2

PR190

150K_0402_1%~D

PR190

150K_0402_1%~D

12

PR183

499K_0402_1%~D

PR183

499K_0402_1%~D

12

PD16

1SS355TE-17_SOD323-2

PD16

1SS355TE-17_SOD323-2

1 2

PR177

1K_0402_5%~D

PR177

1K_0402_5%~D

12 PR184

147K_0402_1%~D

PR184

147K_0402_1%~D

1 2

PR176

1K_0402_5%~D

PR176

1K_0402_5%~D

1 2

PC164

100P_0402_50V8J~D

PC164

100P_0402_50V8J~D

12

PU12A

LM358ADR_SO8

PU12A

LM358ADR_SO8

+

3

-

201

P8

G

4

PR186

61.9K_0402_1%~D

PR186

61.9K_0402_1%~D

1 2

PR175

1K_0402_5%~D

PR175

1K_0402_5%~D

1 2

PD15

DA204U_SOT323~D

@

PD15

DA204U_SOT323~D

@

2

3

1

PL13

FBMA-L18-453215-900LMA90T_1812~D

PL13

FBMA-L18-453215-900LMA90T_1812~D

1 2

PC168

1000P_0402_50V7K~D

PC168

1000P_0402_50V7K~D

12

PR178

6.49K_0402_1%~D

PR178

6.49K_0402_1%~D

1 2

PC167

0.01U_0402_25V7K~D

PC167

0.01U_0402_25V7K~D

12

PR182

10.7K_0402_1%~D

PR182

10.7K_0402_1%~D

12

PR189

86.6K_0402_1%

PR189

86.6K_0402_1%

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GFX_B+

ISUM-

ISUM+

BST_GFX

DL_GFX

LX_GFX

DH_GFX

ISUM+

ISUM-

GFXVR_VID_0 <9>

GFXVR_VID_1 <9>

GFXVR_VID_2 <9>

GFXVR_VID_3 <9>

GFXVR_VID_4 <9>

GFXVR_VID_5 <9>

GFXVR_VID_6 <9>

GFXVR_EN <9>

GFXVR_DPRSLPVR <9>

GFXVR_IMON <9>

VSS_AXG_SENSE <9>

VCC_AXG_SENSE<9>

VSS_AXG_SENSE<9>

GFXVR_PW RGD<31>

B+

+5VALW

+VGFX_CORE

+VGFX_CORE

+5VALW

+VGFX_COREP

+VGFX_COREP +VGFX_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

+GFX_COREP

48 49

Thursday, November 26, 2009

2009/09/21 2010/09/21

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

+GFX_COREP

48 49

Thursday, November 26, 2009

2009/09/21 2010/09/21

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

+GFX_COREP

48 49

Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

+GFX_COREP

TDC 15.4 A

OCP Current 27A

NAT02 M/B LA-5154P Schematic

PC297

0.33U_0603_10V7K~D

PC297

0.33U_0603_10V7K~D

1 2

PR306

9.76K_0402_1%~D

PR306

9.76K_0402_1%~D

12

PU22

ISL62881HRZ-T_QFN28_4X4

PU22

ISL62881HRZ-T_QFN28_4X4

FB

6

CLK_EN#

1

PGOOD

2

ISUM+ 10

ISUM 9

VID5

25

VID1 21

LGATE 18

VSSP 17

VID2

22

UGATE 15

RTN 8

RBIAS

3

VW

4

COMP

5

VID0 20

VCCP 19

VID3

23

VID4

24

VID6

26

VR_ON

27

DPRSLPVR

28

VSEN

7

VDD 11

VIN 12

IMON 13

BOOT 14

PHASE 16

AGND 29

PC301

10U_1206_25V6M~D

PC301

10U_1206_25V6M~D

12

+

PC106

330U_Y_2VM

+

PC106

330U_Y_2VM

1

2

PR3160_0402_5%~D PR3160_0402_5%~D

1 2

PC290

10U_1206_25V6M~D

PC290

10U_1206_25V6M~D

12

PR309

4.87K_0402_1%~D

PR309

4.87K_0402_1%~D

12

PL21

0.45UH_ETQP4LR45XFC_25A_20%

PL21

0.45UH_ETQP4LR45XFC_25A_20%

1

3

4

2

PQ45

FDMS8670S_ POWER56-8~D

PQ45

FDMS8670S_ POWER56-8~D

4

1

2

3 5

PC302

10U_0603_6.3V6M~D

PC302

10U_0603_6.3V6M~D

1 2

PQ44

FDMS8670S_ POWER56-8~D

PQ44

FDMS8670S_ POWER56-8~D

4

1

2

3 5

PC185

0.01U_0402_16V7K~D

PC185

0.01U_0402_16V7K~D

1 2

PC183

0.22U_0402_10V5K~D

PC183

0.22U_0402_10V5K~D

1 2

PR3200_0402_5%~D PR3200_0402_5%~D

1 2

PC184

0.1U_0402_10V7K~D

@PC184

0.1U_0402_10V7K~D

@

1 2

PR217

0_0603_5%~D

PR217

0_0603_5%~D

1 2

PC200

100P_0402_50V8J~D

PC200

100P_0402_50V8J~D

12

PC179

0.22U_0402_10V5K~D

PC179

0.22U_0402_10V5K~D

12

PH6

10KB_0603_5%_ERTJ1VR103J

PH6

10KB_0603_5%_ERTJ1VR103J

1 2

PR326

0_0603_5%~D

PR326

0_0603_5%~D

1 2

PQ43

FDMS8692_POWER56-8-5~D

PQ43

FDMS8692_POWER56-8-5~D

4

1

2

3 5

PQ46

FDMS8692_POWER56-8-5~D

@

PQ46

FDMS8692_POWER56-8-5~D

@

4

1

2

3 5

PR3150_0402_5%~D PR3150_0402_5%~D

1 2

PR3130_0402_5%~D PR3130_0402_5%~D

1 2

PC296

0.033U_0603_16V7K~D

PC296

0.033U_0603_16V7K~D

12

PC295

0.22U_0603_25V7K~D

PC295

0.22U_0603_25V7K~D

12

PR216

4.7_1206_5%~D

PR216

4.7_1206_5%~D

12

PR324

82.5_0402_1%~D

PR324

82.5_0402_1%~D

1 2

PR3170_0402_5%~D PR3170_0402_5%~D

1 2

PR218

3.65K_0805_1%~D

PR218

3.65K_0805_1%~D

12

PR3250_0402_5%~D PR3250_0402_5%~D

1 2

PR219

0_0402_5%

PR219

0_0402_5%

12

PC174

330P_0402_50V7K~D

PC174

330P_0402_50V7K~D

12

PR209

1_0603_5%~D

PR209

1_0603_5%~D

12

PC298

1000P_0402_50V7K~D

PC298

1000P_0402_50V7K~D

1 2

PR308

2.61K_0402_1%~D

PR308

2.61K_0402_1%~D

1 2

PR210

24K_0402_1%~D

PR210

24K_0402_1%~D

12

PC299

330P_0402_50V7K~D

PC299

330P_0402_50V7K~D

1 2

PC180

680P_0603_50V7K~D

PC180

680P_0603_50V7K~D

12

PR310

8.06K_0402_1%~D

PR310

8.06K_0402_1%~D

12

PJP37

JUMP_43X118@

PJP37

JUMP_43X118@

11

2

2

PR3230_0402_5%~D PR3230_0402_5%~D

1 2

PC300

2200P_0402_50V7K~D

PC300

2200P_0402_50V7K~D

12

PR212

2.2_0603_5%~D

PR212

2.2_0603_5%~D

1 2

PR307

825K_0402_1%~D

PR307

825K_0402_1%~D

1 2

PR215

47K_0402_1%~D

PR215

47K_0402_1%~D

12

+

PC105

330U_Y_2VM

+

PC105

330U_Y_2VM

1

2

PC182

15P_0402_50V8J~D

PC182

15P_0402_50V8J~D

1 2

PC289

10U_1206_25V6M~D

PC289

10U_1206_25V6M~D

12

PC288

0.1U_0402_10V7K~D

PC288

0.1U_0402_10V7K~D

12

PC177

68P_0402_50V8J~D

PC177

68P_0402_50V8J~D

1 2

PR3190_0402_5%~D PR3190_0402_5%~D

1 2

PR213

10_0402_5%~D

PR213

10_0402_5%~D

1 2

PR314

10K_0402_1%~D

PR314

10K_0402_1%~D

12

PL20

FBMA-L18-453215-900LMA90T_1812~D

PL20

FBMA-L18-453215-900LMA90T_1812~D

1 2

PR321

1.87K_0402_1%~D

PR321

1.87K_0402_1%~D

1 2

PR311

11K_0402_1%~D

PR311

11K_0402_1%~D

1 2

PC294

1U_0603_10V6K~D

PC294

1U_0603_10V6K~D

12

PR211

10_0402_5%~D

PR211

10_0402_5%~D

1 2

PC178

1000P_0402_50V7K~D

PC178

1000P_0402_50V7K~D

1 2

PJP36

JUMP_43X118

@

PJP36

JUMP_43X118

@

11

2

2

PR3180_0402_5%~D PR3180_0402_5%~D

1 2

PC292

0.1U_0603_25V7K~D

PC292

0.1U_0603_25V7K~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PWR PIR-1

Custom

49 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PWR PIR-1

Custom

49 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

NAT02 M/B LA-5154P Schematic

1.0

PWR PIR-1

Custom

49 49Thursday, November 26, 2009

2009/09/21 2010/09/21

Compal Electronics, Inc.

Page 1

Page 1P age 1

Page 1

Solu tion D escrip tion

Solu tion D escrip tionSolu tion D escrip tion

Solu tion D escrip tion R ev.

R ev.R ev.

R ev .P a ge #

P a ge #P ag e#

P a ge # T it le

TitleTitle

Title

V ersion Change L ist ( P . I. R . L ist )

V ersion Change L ist ( P . I. R . L ist )V ersion Change L ist ( P . I. R . L ist )

V ersion Change L ist ( P . I. R . L ist )

Item

ItemItem

Item Issue D escrip tion

Issue D escrip tionIssue D escrip tion

Issue D escrip tionD ate

D ateD ate

D ate R equ est

R equ estR e qu est

R equ est

O w n er

O w n erO w n er

O w n er

01 P51 +1.1VS_VTTP 08/31 Lin Will Slove EMI Add PL22 and Change PR233 form 0 ohm to 2.2 ohm.

02 P53 +CPU_Core 08/31 Lin Will Slove EMI Change PR259 and PR291 from 0 ohm to 2.2 ohm.

03 P55 +GFX_COREP 08/31 Lin Will Adjust load-line and Imon Change PR306 form 9.54K to 9.76K, PR210 from 22.3K

to 24K and PC296 from 0.22uF to 0.033uF.

04 P55 +GFX_COREP 08/31 Lin Will Adjust output voltage ripple and thermal dispation Add PQ46 and change PC289, PC290, PC301 from 4.7uF to

10uF, and PC105, PC106 from 330uF 9mohm to 330uF 6mohm.

X01

X01

X01

X01

05 P43 +1.05VSP/+0.75VSP 10/14 Lin Will Slove the IC input power sequence. Change TPS51117 V5FILT and V5DRV from 5VS to 5VALW. X02

06 P42 +3VALWP/+5VALWP 10/14 Lin Will Slove EMI. Change PJP19 to PL23, and PR59, PR60 from 0 ohm to

2.2 ohm. X02

07 P44 +1.5VSP/+0.75VSP 10/14 Lin Will Slove EMI. Change PJP29 to PL24. X02

08 P45 +1.1VS_VTTP 11/20 Lin Will Low down the power consumption. Change PR232 from 43.2K to 9.31K, and add PR327 2.7K. X03

09 P41/P42 Charger

+3VALWP/+5VALWP 11/20 Lin Will 1206 size shortage issue. Change SE142475K8L(1206) to SE000006R8L(0805), and

SE041224K8L(1206) to SE000005Z8L(0603). X03

10 P42 +3VALWP/+5VALWP 11/20 Lin Will When adapter inserts and pulls out quickly two

twice, it will make TPS51427 out of electricity.

Add PR91,PR92,PR93 100K, PQ24 TP0610K, PQ10 DTC115EUA,

and PD17 1SS355TE-17. But all unpop.

Change PU5 to ISL6237, and add PJP24.

X03

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