Compal LA 5573P Schematics. Www.s Manuals.com. R1.0 Schematics

User Manual: Motherboard Compal LA-5573P NAL22, NAL22, NAL24 - Schematics. Free.

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B

C

D

E

COMPAL CONFIDENTIAL
1

MODEL NAME : NAL22/23/24
PCB NO : LA-5573P ( DAA00001G00)
BOM P/N : 43177531LXX

1

M10 Margaux DIS/ASICS
rPGA Auburndale/Clarksfield
+FCBGA PCH IBEXPEAK-M
+ N10M-NS-B/N10P-GLM/N10P-GLM4

2010-01-21

2

2

REV : 1.0(A00)
@ : Nopop Component
7@ : N10P-GLM VID
8@ : N10M-NS-B & N10P-GLM4 VID
9@ : N10P-GLM4 only
3

MB Type

BOM P/N

Asics DIS N10P
1@

Margaux DIS N10M
2@

TCM
W(3@)

3

TPM
W/O(4@)

W(5@)

*

*

Margaux DIS, TPM EN,TCM DIS

43177531L01

*

Margaux DIS, TCM EN,TPM DIS

43177531L02

*

Margaux DIS, ALL TPM DISABLE

43177531L03

*

Asics GLM, TPM EN,TCM DIS

43177531L11

*

Asics GLM, TCM EN,TPM DIS

43177531L12

*

Asics GLM, ALL TPM DISABLE

43177531L13

*

*

Asics GLM4, TPM EN,TCM DIS

43177531L21

*

*

Asics GLM4, TCM EN,TPM DIS

43177531L22

*

Asics GLM4, ALL TPM DISABLE

43177531L23

*

*
*

BOM CONFIG

W/O(6@)

2@,4@,5@,8@
*

2@,3@,6@,8@

*

2@,4@,6@,8@
1@,4@,5@,7@

*

*
*

*

1@,3@,6@,7@

*

1@,4@,6@,7@
1@,4@,5@,8@,9@

*

*
*

*

1@,3@,6@,8@,9@

*

1@,4@,6@,8@,9@

4

4

MB PCB
Part Number

DELL CONFIDENTIAL/PROPRIETARY

Description

DAA00001G00

PCB 0AH LA-5573P REV0 M/B DIS

Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Cover Sheet
Size

B

C

D

Rev
0.1

LA-5573P
Date:

A

Document Number
Thursday, January 21, 2010

Sheet
E

1

of

69

A

B

C

Block Diagram
Compal confidential
Model : NAL22
CRT CONN
+5V_RUN
1

VGA

+3.3V_M

Auburndale/Clarksfield
4MB (Socket G1)
PGA CPU

+1.5V_MEM

Memory BUS
(DDR3) +1.5V_MEM 800Mhz/1066MHz

page 13,14
+V_DDR_REF

DMI

+V_DDR_REF

Lane x 4

USB[11]

PCIE-E 16X

Camera

+5V_RUN

INTEL

+1.5V_MEM_GFX
+1.05V_RUN_VTT_GFX
page 24-27

IBEXPEAK-M

+5V_RUN page 26

DP CONN

page 37

USB[2,3] L SIDE

+1.05V_RUN_VTT

page 26

PCMCIA
SLOT

48MHz

IEEE1394

USB[0,10] R SIDE

page 33

DAI

page 36
On IO/B

+3.3V_RUN page 33

SATA5

2

USB1 : Right side pair bottom

USB Ports X2
+5V_ALW

CardBus
R5U242

SD/MMC
CONN

USB[8,9]

USB3 Rear Right pair bottom

USB0 : Right side pair top

+3.3V_RUN page 34

page 38

page 37

page 15-22

+3.3V_ALW_PCH

USB2 : Left side pair top

USB Ports X2
+5V_ALW

+1.05V_M

On IO/B

E-SATA

+3.3V_RUN

+1.8V_RUN

+5V_RUN

Trough eDP Cable

page 24

SATA Repeater
SN75LVCP412

SATA4

1060pin BGA

DOCKING
PORT

DDRIII-DIMM X2
+1.5V_MEM

+GPU_CORE

DPB

1

BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8

page 7-12

N10M/N10P
29X29

+3.3V_RUN
page 24

page6

+FAN1_VOUT
page 23

988A pins

+1.05V_1.1V_RUN_VTT

DPC

2

+3.3V_RUN

page 23

+VCC_CORE

VGA

DP Repeater eDP
DP119

DP Switch
PI3VDP8200

+1.05V_VCCP
page 8,15

FAN
R3P TPF3000

+VCC_GFXCORE
+5V_ALW
+3.3V_RUN
+PWR_SRC page 24

Clock Generator
SLG8SP585

CPU/PCH XDP Port

Thermal

+3.3V_RUN
page 27

eDP CONN

E

GUARDIAN III
EMC4002

Video Switch
PI3V712-AZLE

page 27

D

+1.05V_RUN_VTT /100MHz

PCIE
PCIE3
HD Audio I/F

+3.3V_RUN page 33-34

DOCK LPC BUS

PCI Express BUS

+1.05V_RUN_VTT /100MHz

PCIE5

PCIE2

EXPRESS SATA/PCIE
Card
MUX PI2DBS212

USB[7]

+3.3V_RUN_WWAN_PWR
+1.5V_RUN
page 36

+1.5V_RUN
page 36

page 35

Mini Card 3
PCIE\BKT
+3.3V_RUN
+1.5V_RUN
page 36

USB[4]

USB[13]

SATA Repeater
SN75LVCP412

W25Q64VSSIG
+3.3V_M

LPC BUS

RFID

USBH
SMBUS

SATA2

+3.3V_M

page 53

page

Biometric
0.75V
4

Touch Pad

+5V_MOD
page 28

+3.3V_RUN
page 28

BC BUS

3V/5V
page 47

+5V_RUN

page 29

HeadPhone &
MIC Jack

+5V_HDD

RJ45

+3.3V_RUN

WiFi ON/OFF

SMSC SIO
ECE5028

TI
TLV320AIC3004

MDC
+3V_SUS
page 34

+3.3V_ALW page 39

+3.3V_RUN page 29

On IO/B

DOCK

On IO/B

Dig. MIC

+3.3V_ALW

RJ11

page 49

page 51

PWR SELECT

1.1V

page 54

Trough LVDS Cable

Int.KBD &
Stick

4

Trough Cable

DELL CONFIDENTIAL/PROPRIETARY

page 50

Compal Electronics, Inc.

CHARGER

1.5V

page 52

page 48

Power On/Off
SW & LED page

DC IN & BATT IN
page 46

Title

Block Diagram

DC/DC Interface
42

Size

page 41

B

Document Number

Rev
0.1

LA-5573P
Date:

A

3

+3.3V_RUN

S-HDD

DOCK LPC BUS

BC BUS
40
ECE1077

Stick

+3.3V_LAN pg 30

page 29

+3.3V_HDD
page 28

+RTC_CELL
+3.3V_ALW page 40

page 30

LAN SWITCH
PI3L720

INT.Speaker

Azalia Codec
92HD81B1

+3.3V_RUN page 36

VCORE (IMVP-6)

+1.0V_LAN

page 15

32M 4K sector

Trough Cable

+VCC_GFXCORE

E-Module

+3.3V_LAN

SATA0

SATA Repeater
SN75LVCP412

W25X64VSSIG

SMSC KBC
MEC5045

USB[1]

page 33

page 15

64M 4K sector

+3V_RUN
33MHz

+3.3V_RUN
+2.5V_RUN
+1.2V_RUN page 31,32

+5V_RUN
+3.3V_RUN page 32

+3.3V_RUN
page 35

SATA1

page 32

USH TPM1.2
BCM5882

USB[5]

TDA8034HN

Smartpage
Card
32

SPI

China TPM1.2
SSX35BCB

Mini Card 1
WWAN

+3.3V_WLAN

+3.3V_RUN

3

PCIE1

Mini Card2
WLAN

Intel Hanksville
82577LM

S-ATA 0/1/4/5 3GB/s

Option

C

D

Thursday, January 21, 2010

Sheet
E

2

of

69

5

4

3

2

POWER STATES

USB PORT#
SLP
S3#

SLP
S4#

SLP
S5#

S4
STATE#

SLP
M#

S0 (Full ON) / M0

HIGH

HIGH

HIGH

HIGH

HIGH

S3 (Suspend to RAM) / M1

LOW

HIGH

HIGH

HIGH

S4 (Suspend to DISK) / M1

LOW

LOW

HIGH

S5 (SOFT OFF) / M1

LOW

LOW

S3 (Suspend to RAM) / M-OFF

LOW

S4 (Suspend to DISK) / M-OFF
S5 (SOFT OFF) / M-OFF

Signal
State

D

C

1

ALWAYS
PLANE

M
PLANE

SUS
PLANE

RUN
PLANE

ON

ON

ON

ON

HIGH

ON

ON

ON

LOW

HIGH

ON

ON

LOW

LOW

HIGH

ON

HIGH

HIGH

HIGH

LOW

LOW

LOW

HIGH

LOW

LOW

LOW

LOW

LOW

CLOCKS

0

JUSB1 (Ext Right Side Bottom)

ON

1

JUSB1 (Ext Right Side Top)

OFF

OFF

2

JESA1 (Ext Left Side Top)

OFF

OFF

OFF

3

JESA1 (Ext Left Side Bottom)

ON

OFF

OFF

OFF

4

WLAN

ON

OFF

ON

OFF

OFF

5

WWAN

LOW

ON

OFF

OFF

OFF

OFF

6

Bluetooth

LOW

ON

OFF

OFF

OFF

OFF

7

USH->BIO

8

DOCKING

9

DOCKING

10

Express card

11

Camera

12

NA

13

WPAN/NVMHCI

PCH

PM TABLE

power
plane

DESTINATION

+15V_ALW

+3.3V_SUS

+5V_RUN

+3.3V_M

+5V_ALW

+1.5V_MEM

+3.3V_RUN

+1.05V_M +1.05V_M

+3.3V_ALW_PCH

+1.8V_RUN

+3.3V_RTC_LDO

+1.5V_RUN

+3.3V_M
(M-OFF)

+0.75V_DDR_VTT

D

C

+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN

State

B

S0

ON

ON

ON

ON

ON

S3

ON

ON

OFF

ON

OFF

Lane 1

MINI CARD-1 WWAN

S5 S4/AC

ON

OFF

OFF

ON

OFF

Lane 2

MINI CARD-2 WLAN

S5 S4/AC don't exist

OFF

OFF

OFF

OFF

OFF

Lane 3

Card Bus

Lane 4

EXPRESS CARD

Lane 5

MINI CARD-3 PCIE/BKT

Lane 6

10/100/1G LAN

Lane 7

None

Lane 8

None

PCI EXPRESS

DESTINATION

B

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Index and Config.
Size

4

3

2

Rev
0.1

LA-5573P
Date:

5

Document Number
Thursday, January 21, 2010

Sheet
1

3

of

69

EN_INVPWR

3

FDC654P
Q17

2

+BL_PWR_SRC
TPS51318
(PU3)
DDR_ON

ADAPTER
D

1

MODC_EN

4

HDDC_EN

5

SI3456BDV
(Q32)

SI3456BDV
(Q29)

+5V_HDD

+5V_MOD

D

+1.5V_MEM
TPS51728
(PU17)

BATTERY

+GPU_CORE

ALWON

NTMS4107
(Q151)
SN060898
(PU2)

CHARGER

TPS51100
(PU7)
0.75V_DDR_VTT_ON

DGPI_PWR_EN

RUN_ON

+PWR_SRC

+0.75V_DDR_VTT

+1.5V_RUN
+15V_ALW

C

+5V_ALW

C

RUN_ON

MAX17007
(PU10)

TPS51318
(PU8)

SI3456BDV
(Q47)

SI3456
(Q2)

M_ON

RUN_ON

AUX_ON

SUS_ON

STS11NF30L
(Q60)

+5V_RUN
SI3456BDV
(Q66)

NTMS4107
(Q61)

B

+3.3V_ALW_PCH

+3.3V_SUS

+3.3V_LAN

+3.3V_RUN

+3.3V_M

REGCTL_PNP10

+1.05V_M
Pop option

RUN_ON

+1.8V_RUN +1.05V_1.1V_RUN_VTT

STS11NF30L
(Q55)

Pop option

+3.3V_WLAN
+VCC_CORE

SI3456BDV
(Q54)

SIO_SLP_M#

H_VTTPWRGD

ISL8014
(PU6)

RUN_ON

B

IMVP_VR_ON

ISL62883
(PU11)

PCH_ALW

AUX_EN_WOWL

+3.3V_ALW

+3.3V_M

DCP69
(Q45)

STS11NF30L
(Q183)

Pop option

+1.05V_M
A

A

Pop option

+1.0V_LAN
+1.05V_RUN

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Power Rail
Size

4

3

2

Rev
0.1

LA-5573P
Date:

5

Document Number
Thursday, January 21, 2010

Sheet
1

4

of

69

5

4

3

2

1

2.2K

+3.3V_ALW_PCH

2.2K
H14

MEM_SMBCLK

202

C8

MEM_SMBDATA

200

2.2K

+3.3V_ALW_PCH

2.2K

G12

C6

LAN_SMBCLK

28

G8

LAN_SMBDATA

31

200

SMBUS Address [TBD]

XDP1

SMBUS Address [TBD]

D

53
51

3A

DIMMB

SMBUS Address [C8]

LOM

E10

A5

SMBUS Address [TBD]

202

PCH
D

DIMMA

SML1_SMBDATA

2.2K

SML1_SMBCLK

2.2K

+3.3V_ALW_PCH 2.2K

B6

53

3A

B4

DOCK_SMB_CLK

A3

DOCK_SMB_DAT

1A

51

+3.3V_ALW

2.2K

129

+3.3V_RUN

2.2K
DOCKING
SMBUS Address [TBD]

2.2K

2N7002

14

2N7002

13

G Sensor

SMBUS Address [TBD]

+3.3V_ALW

2.2K
B5

LCD_SMBCLK

21

A4

LCD_SMDATA

20

1B
1B

2.2K
SMBUS Address [TBD]

127

1A

C

XDP2

LCD
(JeDP1)

SMBUS Address [TBD]

BATTERY
CONN

SMBUS Address [TBD]

C

2.2K

+3.3V_ALW

2.2K
1C
1C

KBC

A56
B59

PBAT_SMBCLK
PBAT_SMBDAT

100 ohm

7

100 ohm

6

2.2K

+3.3V_ALW

2.2K

2.2K

1E

A50

USH_SMBCLK

27

1E

B53

USH_SMBDAT

29

2.2K
USH

SMBUS Address [TBD]

10

EXP_SMBDATA

11

2.2K

2B

A49

CARD_SMBCLK

2B

B52

CARD_SMBDAT

MEC 5035

Express card

SMBUS Address [TBD]

+3.3V_ALW

2.2K

B

+3.3V_SUS

EXP_SMBCLK

B

2.2K
2.2K

+3.3V_ALW

B50

CHARGER_SMBCLK

10

A47

CHARGER_SMBDAT

9

1G
1G

Charger

SMBUS Address [TBD]

2.2K
2.2K

+3.3V_RUN

0 ohm

0 ohm

B7

CKG_SMBDAT

32

A7

CKG_SMBCLK

31

2D

SMBUS Address [TBD]

CLK GEN

2D

2.2K
2.2K

A

B49

DAI_SMBCLK_Q

B48

DAI_SMBDAT_Q

2A
2A

2.2K

+3.3V_ALW

+3.3V_RUN

2.2K

A

2N7002

8

2N7002

9

A/D,D/A
converter

SMBUS Address [TBD]

Compal Electronics, Inc.
Title

2N7002
2N7002

DAI_GPU_R3P_SMBCLK

18

DAI_GPU_R3P_SMBDAT

19

SMBUS TOPOLOGY
R3P

Size

SMBUS Address [TBD]

4

3

Rev
0.1

LA-5573P
Date:

5

Document Number

2

Thursday, January 21, 2010

Sheet
1

5

of

69

5

4

3

2

1

+3.3V_RUN

+CLK_VDD_IO CAN BE RANGE FROM 1.05V TO 3V
+CK_VDD_MAIN

+3.3V_RUN

+CLK_VDD_IO
H_STP_CPU#

L89

D

+1.05V_RUN

2

1

2

1

2

C9
0.1U_0402_16V4Z~D

1

C10
0.1U_0402_16V4Z~D

2

C7
0.1U_0402_16V4Z~D

2

1
C6

2

1

0.1U_0402_16V4Z~D

2

1

C5
0.1U_0402_16V4Z~D

2

1

C4
0.1U_0402_16V4Z~D

1

C3
0.1U_0402_16V4Z~D

2

C2
10U_0805_10V4Z~D

1

2
L2
BLM18AG601SN1D_0603~D

1
R92

2
10K_0402_5%~D

D

1

C8
10U_0805_10V4Z~D

1
2
BLM18AG601SN1D_0603~D

CLKREF
1
@C1707
@
C1707
10P_0402_50V8J~D

2

EMI

+CK_VDD_MAIN
+CLK_VDD_IO
U1

1
5
C

15
18
17
24
29

VDD_DOT
VDD_27

CPU_0

23

CPU_0#

22

CPU_1

20

BUF_BCLK

CPU_1#

19

BUF_BCLK#

10

BUF_CKSSCD

11

BUF_CKSSCD#

13

BUF_EXP

14

BUF_EXP#

VDDSRC_IO
VDDCPU_IO
VDDSRC_3.3
VDDCPU_3.3
VDDREF_3.3

SRC_1/SATA
SRC_1/SATA#
40 CKG_FFS_SMBDAT

CKG_FFS_SMBDAT 31

40 CKG_FFS_SMBCLK

CKG_FFS_SMBCLK 32

H_STP_CPU#

16

SDA

SRC_2

SCL

SRC_2#
DOT_96

CPU_STOP#
DOT_96#

C

3

DOT96

4

DOT96#

6

CLK_NV

7

CLK_NVSS

1
R11
1
R13

CLK_BUF_BCLK
2
0_0402_5%~D
CLK_BUF_BCLK#
2
0_0402_5%~D

1
R1181
1
R1180

CLK_BUF_CKSSCD
2
0_0402_5%~D
CLK_BUF_CKSSCD#
2
0_0402_5%~D

1
R49
1
R52

CLK_BUF_EXP
2
0_0402_5%~D
CLK_BUF_EXP#
2
0_0402_5%~D

1
R37
1
R38

CLK_BUF_DOT96
2
0_0402_5%~D
CLK_BUF_DOT96#
2
0_0402_5%~D

CLK_BUF_BCLK 16
CLK_BUF_BCLK# 16
CLK_BUF_CKSSCD 16
CLK_BUF_CKSSCD# 16
CLK_BUF_EXP 16
CLK_BUF_EXP# 16

CLK_BUF_DOT96 16
CLK_BUF_DOT96# 16
+3.3V_RUN

27MHz

R17

2 0_0402_5%~D

1

CLK_XTAL_IN

28

CLK_XTAL_OUT

27

CLK_PCH_14M

R33

1

CLKREF
2
33_0402_5%~D

30

CLK_NV_27M 53

R132
1K_0402_5%~D

CLK_NVSS_27M 53

XTAL_IN

R369
100_0402_5%~D
1
2

XTAL_OUT

B

16 CLK_PCH_14M

CLK_NV_27M
2
33_0402_5%~D
CLK_NVSS_27M
2
33_0402_5%~D

2

C17
27P_0402_50V8J~D
2
1

2

1

27MHz_SS

1
@ R43
1
@ R39

1

CKPWRGD/PD#

VSS_DOT
VSS_27
VSS_SATA
VSS_SRC
VSS_CPU
VSS_REF
EP

REF_0/CPU_SEL

2
8
9
12
21
26
33

50

1

25

D

3

CLK_PWRGD
X1
14.318MHZ_16PF_7A14300083~D
2
1
C16
27P_0402_50V8J~D

S

B

Q136
SSM3K7002FU_SC70-3~D

2
G

CLK_EN#

CLK_PWRGD

SLG8SP585VTR_QFN32_5X5~D
+3.3V_RUN

+1.05V_RUN

@ U23
NC7SZ04P5X_NL_SC70-5~D

2

P

2

REF_O/CPU_SEL
CPU1

1(0.7~1.5v)

100MHz

100MHz

0 (DEFULT)

133MHz

133MHz

A

Y

@ R372
0_0402_5%~D
1
2

4

2

R23
10K_0402_5%~D

CPU0

3

1

PIN 30

G

2

CLKREF

NC

5

@ C1392
0.1U_0402_16V4Z~D

1

1

1
@ R41
4.7K_0402_5%~D

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Clock Generator
Size

4

3

2

Rev
0.1

LA-5573P
Date:

5

Document Number
Thursday, January 21, 2010

Sheet
1

6

of

69

5

4

3

2

1

JCPUI

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

B24
D23
B23
A22

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

17
17
17
17

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

17
17
17
17

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

D24
G24
F23
H23

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

17
17
17
17

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

D25
F24
E23
G23

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_GND

E22
D21
D19
D18
G21
E19
F21
G18

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

D22
C21
D20
C18
G22
E20
F20
G19

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

F17
E17
C17

FDI_INT
FDI_LSYNC[0]
FDI_LSYNC[1]

B26
A26
B27
A25

PEG_IRCOMP_R R1084

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

PEG_CRX_GTX_N0
PEG_CRX_GTX_N1
PEG_CRX_GTX_N2
PEG_CRX_GTX_N3
PEG_CRX_GTX_N4
PEG_CRX_GTX_N5
PEG_CRX_GTX_N6
PEG_CRX_GTX_N7
PEG_CRX_GTX_N8
PEG_CRX_GTX_N9
PEG_CRX_GTX_N10
PEG_CRX_GTX_N11
PEG_CRX_GTX_N12
PEG_CRX_GTX_N13
PEG_CRX_GTX_N14
PEG_CRX_GTX_N15

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

PEG_CRX_GTX_P0
PEG_CRX_GTX_P1
PEG_CRX_GTX_P2
PEG_CRX_GTX_P3
PEG_CRX_GTX_P4
PEG_CRX_GTX_P5
PEG_CRX_GTX_P6
PEG_CRX_GTX_P7
PEG_CRX_GTX_P8
PEG_CRX_GTX_P9
PEG_CRX_GTX_P10
PEG_CRX_GTX_P11
PEG_CRX_GTX_P12
PEG_CRX_GTX_P13
PEG_CRX_GTX_P14
PEG_CRX_GTX_P15

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

PEG_CTX_GRX_C_N0
PEG_CTX_GRX_C_N1
PEG_CTX_GRX_C_N2
PEG_CTX_GRX_C_N3
PEG_CTX_GRX_C_N4
PEG_CTX_GRX_C_N5
PEG_CTX_GRX_C_N6
PEG_CTX_GRX_C_N7
PEG_CTX_GRX_C_N8
PEG_CTX_GRX_C_N9
PEG_CTX_GRX_C_N10
PEG_CTX_GRX_C_N11
PEG_CTX_GRX_C_N12
PEG_CTX_GRX_C_N13
PEG_CTX_GRX_C_N14
PEG_CTX_GRX_C_N15

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_P1
PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_P4
PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_P8
PEG_CTX_GRX_C_P9
PEG_CTX_GRX_C_P10
PEG_CTX_GRX_C_P11
PEG_CTX_GRX_C_P12
PEG_CTX_GRX_C_P13
PEG_CTX_GRX_C_P14
PEG_CTX_GRX_C_P15

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

1

R1147
1K_0402_5%~D

2

F18
D17

FDI_FSYNC[0]
FDI_FSYNC[1]

Intel(R) FDI

C

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI

A24
C23
B22
A21

PCI EXPRESS -- GRAPHICS

D

17
17
17
17

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS

B

REV1.0
TYCO_CALPELLA_AUBURNDALE

EXP_RBIAS

R1129

1

2 49.9_0402_1%~D

1

2 750_0402_1%~D

K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9

PEG_CRX_GTX_N[0..15] 53

PEG_CRX_GTX_P[0..15] 53

PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]

PEG_CTX_GRX_P[0..15] 53
PEG_CTX_GRX_N[0..15] 53

PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_N0

C1666 2

1 0.1U_0402_10V7K~D
C1667 2
1 0.1U_0402_10V7K~D

PEG_CTX_GRX_P0
PEG_CTX_GRX_N0

PEG_CTX_GRX_C_P1
PEG_CTX_GRX_C_N1

C1668 2

1 0.1U_0402_10V7K~D
C1669 2
1 0.1U_0402_10V7K~D

PEG_CTX_GRX_P1
PEG_CTX_GRX_N1

PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_N2

C1670 2

1 0.1U_0402_10V7K~D
C1671 2
1 0.1U_0402_10V7K~D

PEG_CTX_GRX_P2
PEG_CTX_GRX_N2

PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_N3

C1672 2

1 0.1U_0402_10V7K~D
C1673 2
1 0.1U_0402_10V7K~D

PEG_CTX_GRX_P3
PEG_CTX_GRX_N3

PEG_CTX_GRX_C_P4
PEG_CTX_GRX_C_N4

C1674 2

1 0.1U_0402_10V7K~D
C1675 2
1 0.1U_0402_10V7K~D

PEG_CTX_GRX_P4
PEG_CTX_GRX_N4

PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_N5

C1676 2

1 0.1U_0402_10V7K~D
C1677 2
1 0.1U_0402_10V7K~D

PEG_CTX_GRX_P5
PEG_CTX_GRX_N5

PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_N6

C1678 2

1 0.1U_0402_10V7K~D
C1679 2
1 0.1U_0402_10V7K~D

PEG_CTX_GRX_P6
PEG_CTX_GRX_N6

PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_N7

C1680 2

1 0.1U_0402_10V7K~D
C1681 2
1 0.1U_0402_10V7K~D

PEG_CTX_GRX_P7
PEG_CTX_GRX_N7

PEG_CTX_GRX_C_P8
PEG_CTX_GRX_C_N8

C1682 1

2 0.1U_0402_10V7K~D
C1683 1
2 0.1U_0402_10V7K~D

PEG_CTX_GRX_P8
PEG_CTX_GRX_N8

PEG_CTX_GRX_C_P9
PEG_CTX_GRX_C_N9

C1684 1

2 0.1U_0402_10V7K~D
C1685 1
2 0.1U_0402_10V7K~D

PEG_CTX_GRX_P9
PEG_CTX_GRX_N9

PEG_CTX_GRX_C_P10 C1686 1
PEG_CTX_GRX_C_N10

2 0.1U_0402_10V7K~D
C1687 1
2 0.1U_0402_10V7K~D

PEG_CTX_GRX_P10
PEG_CTX_GRX_N10

PEG_CTX_GRX_C_P11 C1688 1
PEG_CTX_GRX_C_N11

2 0.1U_0402_10V7K~D
C1689 1
2 0.1U_0402_10V7K~D

PEG_CTX_GRX_P11
PEG_CTX_GRX_N11

PEG_CTX_GRX_C_P12 C1690 1
PEG_CTX_GRX_C_N12

2 0.1U_0402_10V7K~D
C1691 1
2 0.1U_0402_10V7K~D

PEG_CTX_GRX_P12
PEG_CTX_GRX_N12

PEG_CTX_GRX_C_P13 C1692 1
PEG_CTX_GRX_C_N13

2 0.1U_0402_10V7K~D
C1693 1
2 0.1U_0402_10V7K~D

PEG_CTX_GRX_P13
PEG_CTX_GRX_N13

PEG_CTX_GRX_C_P14 C1694 1
PEG_CTX_GRX_C_N14

2 0.1U_0402_10V7K~D
C1695 1
2 0.1U_0402_10V7K~D

PEG_CTX_GRX_P14
PEG_CTX_GRX_N14

PEG_CTX_GRX_C_P15 C1696 1
PEG_CTX_GRX_C_N15

2 0.1U_0402_10V7K~D
C1697 1
2 0.1U_0402_10V7K~D

PEG_CTX_GRX_P15
PEG_CTX_GRX_N15

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

D

VSS
C

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

NCTF

JCPUA
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

AT35
AT1
AR34
B34
B2
B1
A35

B

REV1.0
TYCO_CALPELLA_AUBURNDALE

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

Title

Auburndale (1/6)
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

7

of

69

5

4

+3.3V_ALW2

1

2

2
0.1U_0402_16V4Z~D
1
5
2

O
IN2

Q205
PMST3904_SOT323-3~D

2
B

R879
1.5K_0402_1%~D

E

+1.5V_CPU_VDDQ

H_CPUPWRGD

2

R880
750_0402_1%~D

+1.05V_1.1V_RUN_VTT

AH24

SKTOCC#

H_CATERR#

AK14

CATERR#

AT15

AN26

H_THERMTRIP#_R AK15

1
2
R1286
0_0402_5%~D

PROCHOT#

THERMTRIP#

PEG_CLK
PEG_CLK#

E16
D16

CPU_EXP
CPU_EXP#

DPLL_REF_SSCLK
DPLL_REF_SSCLK#

A18
A17

SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]

AL15

2
0_0402_5%~D
2 VCCPWRGOOD_1_R
0_0402_5%~D

AN14

19 H_CPUPWRGD

1
R1087

2 VCCPWRGOOD_0_R
0_0402_5%~D

AN27

17 PM_DRAM_PWRGD

1
R878

2 PM_DRAM_PWRGD_R
0_0402_5%~D

AK13

H_VTTPWRGD

AM15

H_PWRGD_XDP

AM26

PCH_PLTRST#_R

AL14

VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK
VTTPWRGOOD
TAPPWRGOOD

CFG10
CFG11

CFG10
CFG11

10
10

CFG4
CFG5

CFG4
CFG5

10
10

CFG6
CFG7

CFG6
CFG7

10
10

TCK
TMS
TRST#
TDI
TDO
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

D

CLK_CPU_ITP
CLK_CPU_ITP#
XDP_RST#_R 2
XDP_DBRESET#

1 H_CPURST#
@ R7
@R7
1K_0402_5%~D

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS

C

R1136 1
1
R1137

2 0_0402_5%~D
CLK_CPU_EXP 16
2
CLK_CPU_EXP# 16
0_0402_5%~D
1
2
@ R1469
0_0402_5%~D
Q199

+3.3V_RUN
XDP_DBRESET#

F6

DDR3_DRAMRST#_CPU

AL1
AM1
AN1

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

AN15
AP15

PM_EXTTS#

3

1

DDR3_DRAMRST# 13,14

2
1
R60
1K_0402_5%~D

For production stuffing,
Intel recommend stuffing R67

R1504
100K_0402_5%~D

+1.05V_1.1V_RUN_VTT
XDP_TCLK
@

DDR_HVREF_RST_GATE 13,14,40

2
R67

1
51_0402_1%~D

XDP_TMS
@
XDP_TDI_R

1

2

AT28
AP27

XDP_PRDY#
XDP_PREQ#

AN28
AP28
AT27

XDP_TCLK
XDP_TMS
XDP_TRST#

AT29
AR27
AR29
AP29

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

AN25

XDP_DBRESET#_R

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R

@

C1888
0.1U_0402_16V4Z~D

XDP_PREQ#
@
XDP_TDO
@

2
R64
2
R65
2
R1149
2
R3

1
51_0402_1%~D
1
51_0402_1%~D
1
51_0402_5%~D
1
51_0402_1%~D

B

2
1
@ R1241
0_0402_5%~D
1
2
@ R780 1
2
@ R781 1
2
@ R782 1
2
@ R783 1
2
@ R784 1
2
@ R785 1
2
@ R22 1
2
@ R24

XDP_DBRESET# 15,17

0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7

@ R1153
0_0402_5%~D
1
2

XDP_TDI_R

@ R1154
0_0402_5%~D
1
2

XDP_TDO_M

RSTIN#

JTAG MAPPING
XDP_TDI

XDP_TRST#

2
1
@ R66
51_0402_1%~D

XDP_TDO

@ R1157
0_0402_5%~D

REV1.0
R1143
750_0402_1%~D

TYCO_CALPELLA_AUBURNDALE

1

Refer to CRB 1.51

10
10

For ESD concern, please put near CPU

2

1
2
18,32,34,36,39,40 PCH_PLTRST#_EC
R1144
1.5K_0402_1%~D

PM_SYNC

10
10

CFG2
CFG3

Scan Chain

Stuff -> R1153,R1156,R1157

(Default)

No stuff -> R1154,R1155

2

49 H_VTTPWRGD

RESET_OBS#

CFG0
CFG1

CFG2
CFG3

1

AP26

JTAG & BPM

H_PM_SYNC

PWR MANAGEMENT

B

1
R1088

17 H_PM_SYNC
1
39,50 IMVP_PWRGD
@R12
@
R12
1
R1290

PRDY#
PREQ#

2 H_CPURST#_R
0_0402_5%~D

10
10

BSS138_SOT23~D

place R1286 near CPU
H_CPURST#

CFG8
CFG9

CFG0
CFG1

CLK_CPU_BCLK 19
CLK_CPU_BCLK# 19

G

H_PROCHOT#

PECI

CLK_CPU_ITP
CLK_CPU_ITP#

CFG8
CFG9

2

COMP0

AR30
AT30

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17

SAMTE_BSH-030-01-L-D-A

2

AT26

CPU_DETECT#

A16
B16

BCLK_ITP
BCLK_ITP#

2 0_0402_5%~D
2
0_0402_5%~D

1

H_COMP0

BCLK
BCLK#

CLOCKS

COMP1

H_PECI

50 H_PROCHOT#

23 H_THERMTRIP#

COMP2

G16

R1132 1
1
R1133

GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16

D

H_PECI

AT24

H_COMP1

CPU_BCLK
CPU_BCLK#

S

19

H_COMP2

THERMAL

H_CATERR#

COMP3

DDR3
MISC

40 CPU_DETECT#

AT23

XDP_TCLK

Keep R1132, R1133, R1136, R1137
for slew rate control.

JCPUB
H_COMP3

C

39

15 DDR_XDP_SMBDAT_R
15 DDR_XDP_SMBCLK_R

Refer to Intel S3 circuit

H_THERMTRIP#
2
56_0402_5%~D
H_CATERR#
2
49.9_0402_1%~D
H_PROCHOT#
2
68_0402_1%~D
H_CPURST#_R
2
68_0402_1%~D

MISC

1
R1285
1
R1232
1
R1233
1
@ R1234

XDP_OBS4
XDP_OBS5

XDP_OBS6
XDP_OBS7
@ R6
1K_0402_5%~D
H_CPUPWRGD_XDP
1
2
CFD_PWRBTN#_XDP
1
2
15,17 SIO_PWRBTN#_R
@ R68
0_0402_5%~D
H_PWRGD_XDP
1
2 PWRGD_XDP_R
@ R19
0_0402_5%~D

2

PM_DRAM_PWRGD_R
1
2
@ R1511
1.1K_0402_1%~D

1

1

C1877
0.22U_0402_6.3V6K~D

XDP_OBS2
XDP_OBS3

23

@ R1145
12.4K_0402_1%~D

2

3

2 1.8K_0402_5%~D

PM_EXTTS#

XDP_OBS0
XDP_OBS1

1

1.5V_CPU_VDDQ_PWRGD_R

2

+1.05V_1.1V_RUN_VTT

@ JXDP1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

XDP_PREQ#
XDP_PRDY#

3

C

1

2

+1.05V_1.1V_RUN_VTT

@

Place near JXDP1

4

1

S

IN1

1

2

1

1

3

Q207
BSS138_SOT23~D

R25
10K_0402_5%~D

P

D

U141
74AHC1G08GW_SOT353-5~D

@

G

1

2

1
2

R1487

1.5V_CPU_VDDQ_PWRGD

+1.05V_1.1V_RUN_VTT

2

1
1.5V_PWRGD

1.5V_CPU_VDDQ_PWRGD# 2
G

R1483
1K_0402_5%~D

1

C1879

C20
0.1U_0402_16V4Z~D

D

1

+1.05V_1.1V_RUN_VTT
C19
0.1U_0402_16V4Z~D

R1481
10K_0402_5%~D
R1482
100K_0402_5%~D

+1.5V_CPU_VDDQ

2

+3.3V_ALW

1

+3.3V_ALW2

3

1.5V_PWRGD 42

@ R1155
0_0402_5%~D
1
2

XDP_TDI_M

CPU Only

Stuff -> R1153,R1154
No stuff -> R1154,R1155,R1157

@R1156
@
R1156
0_0402_5%~D
1
2

XDP_TDO_R

PCH Only

Stuff -> R1155,R1156
No stuff -> R1153,R1154,R1157

4

R1142
130_0402_1%~D
2
1

R1141
24.9_0402_1%~D
2
1

A

R1140
100_0402_1%~D
2
1

1
2

1
2

2

R1095
49.9_0402_1%~D

R1094
49.9_0402_1%~D

R1093
20_0402_1%~D

R1235
20_0402_1%~D
5

1

SM_RCOMP2
SM_RCOMP1
SM_RCOMP0

1

H_COMP0
H_COMP1
H_COMP2
H_COMP3

2

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3

2

Title

Auburndale (2/6)
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

8

of

69

5

4

3

2

JCPUC

JCPUD

C

B

13 DDR_A_BS0
13 DDR_A_BS1
13 DDR_A_BS2

13 DDR_A_CAS#
13 DDR_A_RAS#
13 DDR_A_WE#

A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

AC3
AB2
U7

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#

AE1
AB3
AE9

M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

Y6
Y5
P6

M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA

SA_CS#[0]
SA_CS#[1]

AE2
AE8

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#

SA_ODT[0]
SA_ODT[1]

AD8
AF9

M_ODT0
M_ODT1

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

M_CLK_DDR0 13
M_CLK_DDR#0 13
DDR_CKE0_DIMMA 13

M_CLK_DDR1 13
M_CLK_DDR#1 13
DDR_CKE1_DIMMA 13

DDR_CS0_DIMMA# 13
DDR_CS1_DIMMA# 13

M_ODT0
M_ODT1

13
13

DDR_A_DM[0..7]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

B9
D7
H7
M7
AG6
AM7
AN10
AN13

14 DDR_B_D[0..63]

13

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

C9
F8
J9
N9
AH7
AK9
AP11
AT13

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

C8
F9
H9
M9
AH8
AK10
AN11
AR13

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

13

13

DDR_A_MA[0..15] 13
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

14 DDR_B_BS0
14 DDR_B_BS1
14 DDR_B_BS2
14 DDR_B_CAS#
14 DDR_B_RAS#
14 DDR_B_WE#

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

AB1
W5
R7

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#

AC5
Y7
AC6

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#

W8
W9
M3

M_CLK_DDR2
M_CLK_DDR#2
DDR_CKE2_DIMMB

V7
V6
M2

M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB

SB_CS#[0]
SB_CS#[1]

AB8
AD6

DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

SB_ODT[0]
SB_ODT[1]

AC7
AD1

M_ODT2
M_ODT3

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

D4
E1
H3
K1
AH1
AL2
AR4
AT8

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

D5
F4
J4
L4
AH2
AL4
AR5
AR8

DDR_B_DQS#[0..7]

14

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

C5
E3
H4
M5
AG2
AL5
AP5
AR7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_DQS[0..7]

14

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]

M_CLK_DDR2 14
M_CLK_DDR#2 14
DDR_CKE2_DIMMB 14

D

M_CLK_DDR3 14
M_CLK_DDR#3 14
DDR_CKE3_DIMMB 14

DDR_CS2_DIMMB# 14
DDR_CS3_DIMMB# 14

M_ODT2
M_ODT3

14
14
DDR_B_DM[0..7]

14

C

DDR SYSTEM MEMORY - B

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AA6
AA7
P7

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

13 DDR_A_D[0..63]

DDR SYSTEM MEMORY A

D

1

DDR_B_MA[0..15] 14
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

B

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

REV1.0
TYCO_CALPELLA_AUBURNDALE

REV1.0
TYCO_CALPELLA_AUBURNDALE

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

Title

Auburndale (3/6)
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

9

of

69

5

4

3

2

1

JCPUE

RSVD_NCTF_40
RSVD_NCTF_41
RSVD_NCTF_42
RSVD_NCTF_43

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18

AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

RESERVED

8
8
8
8
8
8
8
8
8
8
8
8
@T18
@
T18
@T19
@
T19
@T20
@
T20
@T21
@
T21
@T22
@
T22
@T23
@
T23
@T24
@
T24

C

@

R831
0_0402_5%~D
2
1

R830
0_0402_5%~D
2
1

H_RSVD17
H_RSVD18

@

B19
A19

RSVD15
RSVD16

A20
B20

RSVD17
RSVD18

U9
T9
AC9
AB9

C1
A3

J29
J28
A34
A33
C35
B35

RSVD19
RSVD20
RSVD21
RSVD22

RSVD_NCTF_23
RSVD_NCTF_24

RSVD26
RSVD27
RSVD_NCTF_28
RSVD_NCTF_29
RSVD_NCTF_30
RSVD_NCTF_31

CFG0

AJ26
AJ27

AP1
AT2

PAD~D T41 @

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65

E15
F15
A2
D15
C15
AJ15
AH15

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

VSS

D

R1107
3.01K_0402_1%~D
@

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

PAD~D T26 @

1

RSVD38
RSVD39

PAD~D T40 @

AL26
AR2

2

RSVD36
RSVD_NCTF_37

AH25
AK26

PCI-Express Configuration Select

CFG0

1 : Single PEG
0 : Bifurcation enable

CFG3

1

DIMM0_VREF_R
DIMM1_VREF_R

RSVD34
RSVD35

PAD~D T31 @
PAD~D T32 @

R1108
3.01K_0402_1%~D
@

2

DIMM0_VREF
DIMM1_VREF

13 DIMM0_VREF
14 DIMM1_VREF

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14

AJ13
AJ12

C

PCI-Express Static Lane Reversal

CFG3

1 : Normal Operation
0 : Lane Number Reversed
15->0, 14->1 ...

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

CFG4

1

D

R84
0_0402_5%~D
1
2
1
2
R86
0_0402_5%~D

AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30

@R1109
@
R1109
3.3K_0402_1%~D

AP34

2

RSVD32
RSVD33

Populate R84,R86 for Intel DDR3
VREFDQ multiple methods M3

REV1.0

B

B

TYCO_CALPELLA_AUBURNDALE

Display Port Presence

CFG4

1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Auburndale (4/6)
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5572P
Sheet
1

10

of

69

5

4

3

2

1

JCPUF

+VCC_CORE

1
C31
22U_0805_6.3VAM~D

2

2

C28
22U_0805_6.3VAM~D

1
C34
22U_0805_6.3VAM~D

2

C35
22U_0805_6.3VAM~D

1
C36
22U_0805_6.3VAM~D

2

C37
22U_0805_6.3VAM~D

C

1

1
C44
10U_0805_4VAM~D

2

C45
10U_0805_4VAM~D

2

1

2

1
@C50
@
C50
10U_0805_4VAM~D

2

@ C46
10U_0805_4VAM~D

C47
10U_0805_4VAM~D

2

1

2

2

@C48
@
C48
10U_0805_4VAM~D

C53
10U_0805_4VAM~D

1
C57
10U_0805_4VAM~D

1

2

1

2

2

1

2

@C52
@
C52
10U_0805_4VAM~D

1
C56
10U_0805_4VAM~D

1

1
C51
10U_0805_4VAM~D

2

1

2

1

2

C59
10U_0805_4VAM~D

1
C54
10U_0805_4VAM~D

C49
10U_0805_4VAM~D

2

1
C55
10U_0805_4VAM~D

2

C58
10U_0805_4VAM~D

B

+VCC_CORE

1
+

1
C63
330U_D_2VM_R4.5M~D

2 3

+

1
C62
330U_D_2VM_R4.5M~D

2 3

+

2 3

1
C61
330U_D_2VM_R4.5M~D

+

C60
330U_D_2VM_R4.5M~D

2 3

1
C1196
10U_0805_4VAM~D

2

1
C1204
10U_0805_4VAM~D

2

C1197
10U_0805_4VAM~D

2

1

1

C1198
10U_0805_4VAM~D
2

2

D

C1199
10U_0805_4VAM~D

1

2

1

2

C1200
10U_0805_4VAM~D

1

2

1
C1103
22U_0805_6.3V6M~D

2

+1.05V_1.1V_RUN_VTT

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

CPU CORE SUPPLY

+VCC_CORE

1

PSI#
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

1

2

AN33

H_PSI#

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

VID0
VID1
VID2
VID3
VID4
VID5
VID6
H_DPRSLPVR_R

C

1

C1083
22U_0805_6.3V6M~D

2

H_PSI#

50

VID0
VID1
VID2
VID3
VID4
VID5
VID6
1
R1115

50
50
50
50
50
50
50

2
0_0402_5%~D

H_DPRSLPVR

B

50

VTT_SELECT = low, 1.1V
VTT_SELECT

G15

CPU_VTT_SELECT 49

VTT_SELECT = high, 1.05V
+VCC_CORE

1

2

1
C27
22U_0805_6.3VAM~D

C1085
22U_0805_6.3V6M~D

2

1
C30
22U_0805_6.3VAM~D

2

C1087
22U_0805_6.3V6M~D

1

2

1
C26
22U_0805_6.3VAM~D

ISENSE

AN35

IMVP_IMON

VCC_SENSE
VSS_SENSE

AJ34
AJ35

VCCSENSE
VSSSENSE

B15
A15

VTT_SENSE

VTT_SENSE
VSS_SENSE_VTT

IMVP_IMON

R1116
100_0402_1%~D

23,50

2

1
C29
22U_0805_6.3VAM~D

2

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

VCCSENSE
VSSSENSE

1

2

1
C25
22U_0805_6.3VAM~D

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

VTT_SENSE

49

R1236
100_0402_1%~D

2

1

2

1.1V RAIL POWER

1
C24
22U_0805_6.3VAM~D

POWER

2

+1.05V_1.1V_RUN_VTT

18A
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

CPU VIDS

1

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

SENSE LINES

D

52A

C1082
22U_0805_6.3V6M~D

+VCC_CORE

50
50

Place R1116 and R1117 near CPU
Route VCCSENSE and VSSSENSE trace at
27.4 ohms, 7 mils spacing

+VCC_CORE
A

1

1

+ 1@ C66
330U_D_2VM_R4.5M~D

2 3

+

Margaux DIS-->330uFx4 (C60-C63)
Asics/Asics II-->330uFx5 (C60-C63,C66)
@ C64
470U_D2_2V-M~D

A

REV1.0
TYCO_CALPELLA_AUBURNDALE
DELL CONFIDENTIAL/PROPRIETARY

2 3

Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Auburndale (5/6)
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

11

of

69

5

4

3

2

1

+1.5V_CPU_VDDQ Source

Q201B
DMN66D0LDW-7_SOT363-6~D
4

5

1

@

1

C1873
4700P_0402_25V7K~D

6

2

2

2

2
3

RUN_ON_CPU1.5VS3

1

R1471
20K_0402_5%~D

1
2
RUN_ON_CPU1.5VS3#

+1.5V_CPU_VDDQ
1
2
3

4

8
7
6
5
R1480
100K_0402_5%~D

R1472
100K_0402_5%~D
D

Q200
AO4728L_SO8~D

+15V_ALW
1

+3.3V_ALW2

C1872
10U_0805_10V4Z~D

+1.5V_MEM

@ R1473
1
2
0_0402_5%~D
R1474
1
2
0_0402_5%~D

40 CPU1.5V_S3_GATE

Q201A
DMN66D0LDW-7_SOT363-6~D

2
1

34,39,42,47,62 RUN_ON

RUN_ON_CPU1.5VS3# 42

GRAPHICS VIDs

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

AM22
AP22
AN22
AP23
AM23
AP24
AN24

GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON

AR25
AT25
AM24

T175
T178

1 0.1U_0402_10V7K~D

C1876

2

1 0.1U_0402_10V7K~D

C1878

2

1 0.1U_0402_10V7K~D

1

1

2

- 1.5V RAILS
1.1V

+

PAD-OPEN 4x4m
C1165
330U_D2_2VM_R6M~D

2

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

VSS

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

D

C

B

+1.8V_RUN

2

1

2

1

2

C1117
22U_0805_6.3V6M~D

1

C65
4.7U_0603_6.3V6M~D

2

REV1.0
TYCO_CALPELLA_AUBURNDALE

C67
2.2U_0603_6.3V6K~D

1

C1116
1U_0402_6.3V6K~D

2

C1115
1U_0402_6.3V6K~D

1.8V

2

L26
L27
M26
1

TYCO_CALPELLA_AUBURNDALE

2

1

2

+1.05V_1.1V_RUN_VTT

C1112
22U_0805_6.3V6M~D

600mA
VCCPLL1
VCCPLL2
VCCPLL3

1

2

1

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

+1.05V_1.1V_RUN_VTT
1

C1111
22U_0805_6.3V6M~D

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

J22
J20
J18
H21
H20
H19

2

2

1

+1.5V_MEM

@PJP58
@
PJP58

C1100
1U_0402_6.3V6K~D

2

1

2

1

C1099
1U_0402_6.3V6K~D

1

2

1

C1098
1U_0402_6.3V6K~D

2

1

C1108
10U_0805_4VAM~D

P10
N10
L10
K10

1

2

PAD-OPEN 4x4m

C1102
22U_0805_6.3V6M~D

DDR3

+1.5V_CPU_VDDQ

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

C1097
1U_0402_6.3V6K~D

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

REV1.0
A

1 0.1U_0402_10V7K~D

2

@PJP57
@
PJP57

C1107
10U_0805_4VAM~D

PEG & DMI

VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

2

C1875

1
2
R1465
1K_0402_5%~D

2

K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25

C1874

1

VTT0_59
VTT0_60
VTT0_61
VTT0_62

+1.05V_1.1V_RUN_VTT

PAD~D
PAD~D

C1101
22U_0805_6.3V6M~D

VTT1_45
VTT1_46
VTT1_47

FDI

J24
J23
H25

AR22
AT22

C1096
1U_0402_6.3V6K~D

+1.05V_1.1V_RUN_VTT

B

VAXG_SENSE
VSSAXG_SENSE

6A

POWER

C

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

GRAPHICS

AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16

SENSE
LINES

JCPUG

JCPUH
AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Auburndale (6/6)
Size
Date:

5

4

3

2

Document Number

Rev
0.1

LA-5573P
Thursday, January 21, 2010

Sheet
1

12

of

69

3

Populate R87 for Intel DDR3
VREFDQ multiple methods M1

9 DDR_A_DQS#[0..7]

R87
1

+V_DDR_REF_QA

9 DDR_A_DM[0..7]

D

2

DDR_A_D0
DDR_A_D1
1

DDR_A_DM0

2

DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17

+1.5V_MEM
1

@ R1477
1

0_0402_5%~D
2

DDR_A_DQS#2
DDR_A_DQS2

R660
1K_0402_1%~D

DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25

S

D

2

Q202
AO3420L_SOT23-3~D
1

3

DIMM0_VREF 10

1

+V_DDR_REF_QA

2

2

2

DDR_A_DM3
DDR_A_D26
DDR_A_D27

R1485
100K_0402_5%~D

G

R670
1K_0402_1%~D

1

+1.5V_MEM
JDIMMA

C1120

9 DDR_A_MA[0..15]

1
C1119

9 DDR_A_DQS[0..7]

+1.5V_MEM

0_0402_5%~D
2
0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

9 DDR_A_D[0..63]

2

VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS

VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

JDIMMA H=5.2

DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0

+1.5V_MEM

DDR_A_D6
DDR_A_D7

R1476
1K_0402_5%~D

DDR_A_D12
DDR_A_D13

D

DDR_A_DM1
DDR3_DRAMRST#

DDR3_DRAMRST# 8,14

DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31

1

DDR_HVREF_RST_GATE 8,14,40

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

1

4

2

5

9 DDR_CKE0_DIMMA
9

C

DDR_A_BS2

Layout Note:
Place near JDIMMA

+1.5V_MEM

2

1

9
C1124

C1123

2

1

0.1U_0402_16V4Z~D

C1122

1

0.1U_0402_16V4Z~D

2

0.1U_0402_16V4Z~D

C1121

0.1U_0402_16V4Z~D

1

9 M_CLK_DDR0
9 M_CLK_DDR#0

9
9

DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#

2
9 DDR_CS1_DIMMA#

2

Layout Note:
Place near JDIMMA.203,204

2

C1141

2

1

1

2

C1142
2.2U_0603_6.3V6K~D

1
C1138

2

10U_0603_6.3V6M~D

2

1

C1137
1U_0402_6.3V6K~D

2

1

C1136
1U_0402_6.3V6K~D

2

1

C1135
1U_0402_6.3V6K~D

1

C1134
1U_0402_6.3V6K~D

A

+3.3V_RUN

0.1U_0402_16V4Z~D

+0.75V_DDR_VTT

205

GND1

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

GND2

206

DDR_CKE1_DIMMA

DDR_CKE1_DIMMA 9

DDR_A_MA15
DDR_A_MA14
C

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1

M_CLK_DDR1 9
M_CLK_DDR#1 9
DDR_A_BS1 9
DDR_A_RAS# 9
DDR_CS0_DIMMA# 9
M_ODT0
9
M_ODT1

9
+V_DDR_REF

DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45

2

1

2

B

DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
DDR_XDP_SMBDAT
DDR_XDP_SMBCLK

DDR_XDP_SMBDAT 14,15,16,28
DDR_XDP_SMBCLK 14,15,16,28

+0.75V_DDR_VTT
A

FOX_AS0A626-U4SN-7F

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

DDRIII-SODIMM SLOT1
Size

4

3

2

Document Number

Rev
0.1

LA-5573P
Date:

5

1

C1133

2

CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT

C1132

+

CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT

0.1U_0402_16V4Z~D

1

C1125
330U_SX_2VY~D

2

1
C1131

2

1

10U_0603_6.3V6M~D
C1130

2

1

10U_0603_6.3V6M~D
C1129

2

1

10U_0603_6.3V6M~D
C1128

2

1

10U_0603_6.3V6M~D
C1127

1

10U_0603_6.3V6M~D
C1126

10U_0603_6.3V6M~D

B

73
75
77
DDR_A_BS2
79
81
DDR_A_MA12
83
DDR_A_MA9
85
87
DDR_A_MA8
89
DDR_A_MA5
91
93
DDR_A_MA3
95
DDR_A_MA1
97
99
M_CLK_DDR0
101
M_CLK_DDR#0
103
105
DDR_A_MA10
107
DDR_A_BS0
109
111
DDR_A_WE#
113
DDR_A_CAS#
115
117
DDR_A_MA13
119
DDR_CS1_DIMMA#
121
123
125
127
DDR_A_D32
129
DDR_A_D33
131
133
DDR_A_DQS#4
135
DDR_A_DQS4
137
139
DDR_A_D34
141
DDR_A_D35
143
145
DDR_A_D40
147
DDR_A_D41
149
151
DDR_A_DM5
153
155
DDR_A_D42
157
DDR_A_D43
159
161
DDR_A_D48
163
DDR_A_D49
165
167
DDR_A_DQS#6
169
DDR_A_DQS6
171
173
DDR_A_D50
175
DDR_A_D51
177
179
DDR_A_D56
181
DDR_A_D57
183
185
DDR_A_DM7
187
189
DDR_A_D58
191
DDR_A_D59
193
195
1
2
197
R1182 10K_0402_5%~D199
1
2
201
R1183 10K_0402_5%~D203
+0.75V_DDR_VTT

2.2U_0603_6.3V6K~D

+1.5V_MEM

DDR_CKE0_DIMMA

Thursday, January 21, 2010

Sheet
1

13

of

69

5

4

3

R88
1

+V_DDR_REF_QB

0.1U_0402_16V4Z~D

+1.5V_MEM

2

DDR_B_D0
DDR_B_D1
1

2

DDR_B_DM0
C1144

9 DDR_B_DQS[0..7]

1
C1143

2.2U_0603_6.3V6K~D

Populate R88 for Intel DDR3
VREFDQ multiple methods M1

9 DDR_B_DM[0..7]
D

0_0402_5%~D
2

DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9

9 DDR_B_MA[0..15]

DDR_B_DQS#1
DDR_B_DQS1

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

DDR_B_D10
DDR_B_D11

+1.5V_MEM
1

@ R1478
1

DDR_B_D16
DDR_B_D17

0_0402_5%~D
2

DDR_B_DQS#2
DDR_B_DQS2

R668
1K_0402_1%~D
Q203
2

DDR_B_D18
DDR_B_D19

S

D

AO3420L_SOT23-3~D
3

DDR_B_D24
DDR_B_D25

DIMM1_VREF 10
2

1

DDR_B_DM3

2

1

+V_DDR_REF_QB

R1486
100K_0402_5%~D

G

R671
1K_0402_1%~D

DDR_B_D26
DDR_B_D27

1

2

DDR_HVREF_RST_GATE 8,13,40

DDR_CKE2_DIMMB

9 DDR_CKE2_DIMMB
9
C

DDR_B_BS2

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

Layout Note:
Place near JDIMMB

DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

2

1

C1148

0.1U_0402_16V4Z~D

1

C1147

2

0.1U_0402_16V4Z~D

1

C1146

C1145

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

M_CLK_DDR2
M_CLK_DDR#2

9 M_CLK_DDR2
9 M_CLK_DDR#2

+1.5V_MEM

1

2

9

DDR_B_BS0

9
9

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#

9 DDR_CS3_DIMMB#

+
2

DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57

Layout Note:
Place near JDIMMB.203,204

DDR_B_DM7
DDR_B_D58
DDR_B_D59
+3.3V_RUN
1

+3.3V_RUN
+0.75V_DDR_VTT
1

C1163

2

C1162

1

2.2U_0603_6.3V6K~D

2

0.1U_0402_16V4Z~D

2

1

C1161
1U_0402_6.3V6K~D

2

1

C1160
1U_0402_6.3V6K~D

2

1

C1159
1U_0402_6.3V6K~D

1

C1158
1U_0402_6.3V6K~D

A

R1185
10K_0402_5%~D

R1184
10K_0402_5%~D

1

2

2

+0.75V_DDR_VTT

CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT

205

GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

GND2

206

DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0

JDIMMB H=9.2

DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR_B_DM1
DDR3_DRAMRST#

D

DDR3_DRAMRST# 8,13

DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31

DDR_CKE3_DIMMB

DDR_CKE3_DIMMB 9

DDR_B_MA15
DDR_B_MA14
C

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#

M_CLK_DDR3 9
M_CLK_DDR#3 9
DDR_B_BS1 9
DDR_B_RAS# 9

DDR_CS2_DIMMB#
DDR_CS2_DIMMB# 9
M_ODT2
M_ODT2
9
M_ODT3

M_ODT3

9
+V_DDR_REF

DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45

1

2

2

B

DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
DDR_XDP_SMBDAT
DDR_XDP_SMBCLK

DDR_XDP_SMBDAT 13,15,16,28
DDR_XDP_SMBCLK 13,15,16,28

+0.75V_DDR_VTT

A

FOX_AS0A626-U8SN-7F

2

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

DDRIII-SODIMM SLOT2
Size

4

3

2

Document Number

Rev
0.1

LA-5573P
Date:

5

1
C1157

2

C1149
330U_SX_2VY~D

2

1
1

C1155

2

1

10U_0603_6.3V6M~D
C1154

2

1

10U_0603_6.3V6M~D
C1153

1

10U_0603_6.3V6M~D
C1152

2

10U_0603_6.3V6M~D
C1151

10U_0603_6.3V6M~D
C1150

10U_0603_6.3V6M~D

2

1

DDR_B_D40
DDR_B_D41

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS

C1156

DDR_B_D34
DDR_B_D35

VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS

0.1U_0402_16V4Z~D

DDR_B_DQS#4
DDR_B_DQS4

+1.5V_MEM

1

+1.5V_MEM
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

2.2U_0603_6.3V6K~D

DDR_B_D32
DDR_B_D33

B

1

JDIMMB

9 DDR_B_DQS#[0..7]
9 DDR_B_D[0..63]

2

Thursday, January 21, 2010

Sheet
1

14

of

69

4

3

CMOS setting

1

Clear ME RTC Registers

Open

Keep ME RTC Registers

@ R62
10K_0402_5%~D
2

Shunt

+RTC_CELL

19,31 CONTACTLESS_DET#
19
GPIO37
19,37 EN_ESATA_RPTR#
19,39 TEMP_ALERT#
19 ROUSH_PAID_TS_DET#
19 SIO_EXT_SCI#_R

PCH_AZ_SYNC

1

1

D

R120
100K_0402_5%~D
@

PCH_INTVRMEN
C296
12P_0402_50V8J~D
2
1

PCH_RTCX1

4

3

C297
12P_0402_50V8J~D
2
1
1
1

2

1

2
2
1
C300
27P_0402_50V8J~D

1

2

1

2

2

37 PCH_AZ_MDC_BITCLK
@
ME1
1
C298

29

29 PCH_AZ_CODEC_SYNC
29 PCH_AZ_CODEC_RST#
29 PCH_AZ_CODEC_BITCLK

1

C302
27P_0402_50V8J~D

C14

RTCRST#

D17

SRTCRST#

INTRUDER#

A16

INTRUDER#

PCH_INTVRMEN

A14

INTVRMEN

2 PCH_AZ_SDOUT
33_0402_5%~D
2 PCH_AZ_SYNC
33_0402_5%~D
2 PCH_AZ_RST#
33_0402_5%~D
2 PCH_AZ_BITCLK
33_0402_5%~D

PCH_AZ_BITCLK

PCH_AZ_RST#
2
33_0402_5%~D

37 PCH_AZ_MDC_SDIN1

1
R242

39

PCH_AZ_CODEC_SDIN0

G30

PCH_AZ_MDC_SDIN1

F30

1

200 MIL SO8

R804

PCH_JTAG_TCK

M3

200_0402_5%~D 2

1

R807

PCH_JTAG_TMS

K3

200_0402_5%~D 2

1

R805

PCH_JTAG_TDI

K1

200_0402_5%~D 2

1

R806

PCH_JTAG_TDO

J2

PCH_JTAG_RST#

J4

T174

1

1

C328
1
2

R298
3.3K_0402_5%~D

0.1U_0402_16V4Z~D
R299
3.3K_0402_5%~D

2
2
0_0402_5%~D

3
4

/CS

VCC

DO

/HOLD

/WP

CLK

GND

DIO

8

PCH_SPI_CLK

BA2

PCH_SPI_CS0#

AV3

PCH_SPI_CS1#

AY3

PCH_SPI_DO

7
6

PCH_SPI_CLK

5

PCH_SPI_DO

PCH_SPI_DIN 1
R1247

C34

LPC_LFRAME#

LDRQ0#
LDRQ1# / GPIO23

A34
F34

LPC_LDRQ0#
LPC_LDRQ1#

SERIRQ

AB9

IRQ_SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

HDA_SDO
HDA_DOCK_EN# / GPIO33
HDA_DOCK_RST# / GPIO13

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

JTAG_TCK

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

JTAG_TMS

31,32,39,40
31,32,39,40
31,32,39,40
31,32,39,40

C1205
1
2

32Mb Flash ROM

JTAG_TDO
TRST#

SPI_WP#_SEL 1
@ R1060

TDO
TMS

R1238
3.3K_0402_5%~D

U13
1

/CS

VCC

8

2

DO

/HOLD

7

3

/WP

CLK

6

PCH_SPI_CLK

4

GND

DIO

5

PCH_SPI_DO

TDI

2

PCH_SPI_DIN
2
0_0402_5%~D

XDP_DBRESET# 8,17
PCH_JTAG_TDO
PCH_JTAG_RST#_R 1
2 PCH_JTAG_RST#
PCH_JTAG_TDI
@ R117
PCH_JTAG_TMS
0_0402_5%~D

Ref.

ES1

R806

No Stuff

R1315
R807

ES2

TCK
TRST#

IRQ_SERIRQ

+3.3V_RUN
R265
10K_0402_5%~D
2
1

31,32,39,40

AK7
AK6
AK11
AK9

PSATA_PRX_DTX_N0_C 28
PSATA_PRX_DTX_P0_C 28
PSATA_PTX_DRX_N0_C 28
PSATA_PTX_DRX_P0_C 28

AH6
AH5
AH9
AH8

SATA_ODD_PRX_DTX_N1_C
SATA_ODD_PRX_DTX_P1_C
SATA_ODD_PTX_DRX_N1_C
SATA_ODD_PTX_DRX_P1_C

C

HDD

28
28
28
28

ODD

AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1

SATA_PRX_WWANTX_N3_C 35
SATA_PRX_WWANTX_P3_C 35
SATA_PTX_WWANRX_N3_C 35
SATA_PTX_WWANRX_P3_C 35

AD9
AD8
AD6
AD5

ESATA_PRX_DTX_N4_C 37
ESATA_PRX_DTX_P4_C 37
ESATA_PTX_DRX_N4_C 37
ESATA_PTX_DRX_P4_C 37

E-SATA

AD3
AD1
AB3
AB1

SATA_PRX_DKTX_N5_C 38
SATA_PRX_DKTX_P5_C 38
SATA_PTX_DKRX_N5_C 38
SATA_PTX_DKRX_P5_C 38

DOCKED

SATAICOMPO
SATAICOMPI

Mini card2

B

+1.05V_RUN

AF16
R1201
SATA_COMP

AF15

1

2
+3.3V_RUN

SPI_CS0#
SPI_CS1#

SATALED#

T3

SATA_ACT#_R

R382
43K_0402_5%~D

SATA_ACT#_R 43

SPI_MOSI

SATA0GP / GPIO21

SPI_MISO

SATA1GP / GPIO19

Y9

HDD_DET#_R

V1

GPIO19

R131
1
2
0_0402_5%~D
2
1
R58
10K_0402_5%~D

PCH JTAG Disable

HDD_DET#

ES1

ES2

200 ohm

No Stuff

No Stuff

100 ohm

200 ohm

200 ohm

+3.3V_RUN
@R264
@
R264
1K_0402_5%~D
2
1

All

No Stuff

No Stuff

No Stuff

No Stuff

No Stuff

No Stuff

No Stuff

No Stuff

R1281

100 ohm

100 ohm

No Stuff

No Stuff

No Stuff

R805

200 ohm

200 ohm

20K ohm

No Stuff

No Stuff

R1282

100 ohm

100 ohm

10K ohm

No Stuff

No Stuff

R804

51 ohm

51 ohm

51 ohm

51 ohm

No Stuff

R808

20K ohm

20K ohm

No Stuff

No Stuff

R1316

10K ohm

10K ohm

No Stuff

No Stuff

3

28

+3.3V_RUN

Production

No Reboot Strap
Low = Default
A

SPKR
High = No Reboot

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PCH (1/8)
Size

Document Number

Rev
0.1

LA-5573P
Date:

4

PLTRST_XDP# 18

LPC_LDRQ0# 39
LPC_LDRQ1# 39

W25Q32BVSSIG_SO8~D
5

PLTRST1#_XDP
XDP_DBRESET#

SPI_CLK

AV1

0.1U_0402_16V4Z~D
1

1

200 MIL SO8

2

PCH_SPI_CS1#

+3.3V_ALW_PCH

@ R118
1K_0402_5%~D
PLTRST1#_XDP 1
2

LPC_LFRAME# 31,32,39,40

SPKR

PCH Pin

+3.3V_M

R1237
3.3K_0402_5%~D

XDP_FN14
XDP_FN15

BD82QM57-SLGZQ-B3_FCBGA1071~D

PCH JTAG Enable

W25Q64BVSSIG_SO8~D

D

XDP_FN12
XDP_FN13

JTAG_TDI

AY1

2 PCH_SPI_DIN_R
33_0402_5%~D

SPI_WP#_SEL 39

A

XDP_FN10
XDP_FN11

2

2

1

FWH4 / LFRAME#

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

37.4_0402_1%~D

U12

PCH_SPI_DIN
SPI_WP#_SEL 1
@ R1246

1

PAD~D

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

HDA_SDIN0

J30

2

64Mb Flash ROM

D33
B33
C32
A32

HDA_RST#

H32

USB_MCARD3_DET#

2
1
R1281
100_0402_5%~D
2
1
R1282
100_0402_5%~D
2
1
R1315
100_0402_5%~D

B

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

SPKR

B29

ME_FWP
36 USB_MCARD3_DET#

51_0402_1%~D

2

Stuff R128,no stuff R123
when production

PCH_SPI_CS0#

HDA_SYNC

C30

PCH_AZ_SDOUT
2
33_0402_5%~D

ME_FWP

R123
0_0603_5%~D

For iAMT

HDA_BCLK

F32

2

+3.3V_M

A30
D29

E32

37 PCH_AZ_MDC_SDOUT
+3.3V_ALW_PCH

XDP_FN8
XDP_FN9

IRQ_SERIRQ

SPKR
1
R240

XDP_FN16
XDP_FN17

SAMTE_BSH-030-01-L-D-A

SRTCRST#

PCH_AZ_SYNC
2
33_0402_5%~D

29 PCH_AZ_CODEC_SDIN0
1
R234
1
R235
1
R239
1
R241

PCH_RTCRST#

P1

37 PCH_AZ_MDC_RST#

CMOS place near DIMM

R236
33_0402_5%~D
1
2
1
R238

37 PCH_AZ_MDC_SYNC

@
CMOS1 SHORT PADS~D
1
2
C299
1U_0402_6.3V6K~D

SHORT PADS~D
2
1U_0402_6.3V6K~D

29 PCH_AZ_CODEC_SDOUT

RTCX1
RTCX2

1M_0402_5%~D

1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17

1

R226

2

B13
D13

20K_0402_5%~D

C

1

PCH_RTCX2

20K_0402_1%~D

R225

@ JXDP2
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16

V1.5

R223
0_0402_5%~D
1
2

2

R224

add R1532/1533

U73A
2

Y1
32.768K_12.5PF_Q13MC30610018~D

+RTC_CELL

R222
10M_0402_5%~D

NC NC

2

1

On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low

INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable Internal VRs

1

2

2

R217
330K_0402_1%~D

+3.3V_ALW_PCH

2

ME_CLR1 TPM setting

1

+3.3V_ALW_PCH
1
3
5
7
1
XDP_FN0
9
XDP_FN1
@ C1375
11
0.1U_0402_16V4Z~D
13
2
XDP_FN2
15
XDP_FN3
17
19
21
23
25
XDP_FN4
27
XDP_FN5
29
31
XDP_FN6
33
XDP_FN7
35
37
RESET_OUT#
39
17,40 RESET_OUT#
41
1
2 PCH_PWRBTN#_XDP
8,17 SIO_PWRBTN#_R
@ R69
0_0402_5%~D
43
45
8 DDR_XDP_SMBDAT_R
47
8 DDR_XDP_SMBCLK_R
0_0402_5%~D
49
DDR_XDP_SMBDAT_R
@R1532
@
R1532 1
51
2
13,14,16,28 DDR_XDP_SMBDAT
DDR_XDP_SMBCLK_R
@R1533
@
R1533 1
2
53
13,14,16,28 DDR_XDP_SMBCLK
0_0402_5%~D
55
PCH_JTAG_TCK
57
Disconnect XDP trace,
59

XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
XDP_FN16
XDP_FN17

33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

LPC

+3.3V_RUN

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

SATA

Keep CMOS

@ R78
@ R91
@ R101
@ R102
@ R103
@ R104
@ R105
@ R106
@ R107
@ R108
@ R109
@ R110
@ R111
@ R112
@ R113
@ R114
@ R115
@ R116

RTC

Open

USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
PCMCLK_REQ#
LANCLK_REQ#
HDD_DET#_R
GPIO19
CONTACTLESS_DET#
GPIO37
EN_ESATA_RPTR#
TEMP_ALERT#
ROUSH_PAID_TS_DET#
SIO_EXT_SCI#_R

18 USB_OC0#_R
18 USB_OC1#_R
18 USB_OC2#
18 USB_OC3#
18 USB_OC4#
18 USB_OC5#
18 USB_OC6#
18 USB_OC7#
16,34 PCMCLK_REQ#
16,30 LANCLK_REQ#

IHDA

Clear CMOS

SPI

Shunt

2

JTAG

5

CMOS_CLR1

2

Thursday, January 21, 2010

Sheet
1

15

of

69

5

4

3

2

1

2

+3.3V_RUN

MEM_SMBCLK

@ Q190A
DMN66D0LDW-7_SOT363-6~D
DDR_XDP_SMBCLK
1

DDR_XDP_SMBCLK 13,14,15,28

5

6

D

MEM_SMBDATA

3

DDR_XDP_SMBDAT

4

DDR_XDP_SMBDAT 13,14,15,28

D

@ Q190B
DMN66D0LDW-7_SOT363-6~D
U73B
V1.5

AU30
AT30
AU32
AV32

PERN3
PERP3
PETN3
PETP3

C1008 1
C1009 1

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

PCIE_PRX_EXPTX_N4
PCIE_PRX_EXPTX_P4
PCIE_PTX_EXPRX_N4
PCIE_PTX_EXPRX_P4

BA32
BB32
BD32
BE32

PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5

36 PCIE_PRX_WPANTX_N5
36 PCIE_PRX_WPANTX_P5
36 PCIE_PTX_WPANRX_N5_C
36 PCIE_PTX_WPANRX_P5_C

C1025 1
C1024 1

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

PCIE_PRX_WPANTX_N5 BF33
PCIE_PRX_WPANTX_P5 BH33
PCIE_PTX_WPANRX_N5 BG32
PCIE_PTX_WPANRX_P5 BJ32

30
30
30
30

C326 1
C327 1

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

PCIE_PRX_GLANTX_N6
PCIE_PRX_GLANTX_P6
PCIE_PTX_GLANRX_N6
PCIE_PTX_GLANRX_P6

PCIE_PRX_GLANTX_N6
PCIE_PRX_GLANTX_P6
PCIE_PTX_GLANRX_N6_C
PCIE_PTX_GLANRX_P6_C

BA34
AW34
BC34
BD34

PERN6
PERP6
PETN6
PETP6

AT34
AU34
AU36
AV36

PERN7
PERP7
PETN7
PETP7

BG34
BJ34
BG36
BJ36
AK48
AK47
1
R122

+3.3V_ALW_PCH

10/100/1G LAN --->

30 CLK_PCIE_LAN#
30 CLK_PCIE_LAN

2
10K_0402_5%~D

R1198 1
R1199 1

2 0_0402_5%~D
2 0_0402_5%~D

PCMCIA--->
B

MiniWPAN (Mini Card 3)--->

Express card--->

MiniWLAN (Mini Card 2)--->

MiniWWAN (Mini Card 1)--->

36 CLK_PCIE_MINI3#
36 CLK_PCIE_MINI3
+3.3V_ALW_PCH
36 MINI3CLK_REQ#
34 CLK_PCIE_EXP#
34 CLK_PCIE_EXP
+3.3V_ALW_PCH
34 EXPCLK_REQ#
36 CLK_PCIE_MINI2#
36 CLK_PCIE_MINI2
+3.3V_ALW_PCH
36 MINI2CLK_REQ#

36 CLK_PCIE_MINI1#
36 CLK_PCIE_MINI1
+3.3V_ALW_PCH
36 MINI1CLK_REQ#

PCIE_LAN#
PCIE_LAN
LANCLK_REQ#

15,30 LANCLK_REQ#
33 CLK_PCIE_PCM#
33 CLK_PCIE_PCM
+3.3V_RUN
15,34 PCMCLK_REQ#

PCIECLKREQ0#

R1293
R1294

1 0_0402_5%~D
1 0_0402_5%~D
2
10K_0402_5%~D

2
2
1
R876

PCIE_PCM#
PCIE_PCM
PCMCLK_REQ#

2
2
2

1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D

PCIE_MINI3#
PCIE_MINI3

R1205
R1206
R523

2
2
2

1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D

PCIE_EXP#
PCIE_EXP

R1203
R1196
R45

2
2
2

1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D

PCIE_MINI2#
PCIE_MINI2

R1195
R1202
R40

2
2
2

1 0_0402_5%~D
1 0_0402_5%~D
1 10K_0402_5%~D

PCIE_MINI1#
PCIE_MINI1

R1297
R1302
R61

MINI3CLK_REQ#

EXPCLK_REQ#

MINI2CLK_REQ#

MINI1CLK_REQ#

P9
AM43
AM45
U4
AM47
AM48
N4
AH42
AH41
A8
AM51
AM53
M9
AJ50
AJ52
H6
AK53
AK51
P13

MEM_SMBCLK

C8

MEM_SMBDATA

2
0_0402_5%~D

+3.3V_ALW_PCH
SML0ALERT# / GPIO60
SML0CLK

C6

LAN_SMBCLK

SML0DATA

G8

LAN_SMBDATA

SML1ALERT# / GPIO74

M14

SML1CLK / GPIO58

E10

SML1_SMBCLK

SML1DATA / GPIO75

G12

SML1_SMBDATA

CL_CLK1

T13

PCH_CL_CLK1

CL_DATA1

T11

PCH_CL_DATA1

CL_RST1#

T9

PCH_CL_RST1#

PEG_A_CLKRQ# / GPIO47

PERN8
PERP8
PETN8
PETP8

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P

CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

PCIECLKRQ2# / GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P

REFCLK14IN

PCIECLKRQ3# / GPIO25

CLKIN_PCILOOPBACK

CLKOUT_PCIE4N
CLKOUT_PCIE4P

XTAL25_IN
XTAL25_OUT

PCIECLKRQ4# / GPIO26

XCLK_RCOMP

CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5# / GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56

J14

CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67

H1
AD43
AD45
AN4
AN2

SML1_SMBCLK

LAN_SMBCLK 30

1
R1178
1
R1179

SML1_SMBDATA

LAN_SMBDATA 30

2
2.2K_0402_5%~D
2
2.2K_0402_5%~D

SML1_SMBCLK 40
+3.3V_ALW_PCH

SML1_SMBDATA 40
MEM_SMBCLK

PCH_CL_CLK1 36

2
@ R252
2
@ R255
PCH_SMB_ALERT# 2
R1175

1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
10K_0402_5%~D

LAN_SMBCLK

1
2.2K_0402_5%~D
1
2.2K_0402_5%~D

MEM_SMBDATA

PCH_CL_DATA1 36
PCH_CL_RST1# 36

@ R1
10K_0402_5%~D
PEG_A_CLKRQ#
1
2
1
2
CLK_REQ#
R55
0_0402_5%~D
CLK_PCIE_VGA#
CLK_PCIE_VGA# 53
CLK_PCIE_VGA
CLK_PCIE_VGA 53
CLK_CPU_EXP#
CLK_CPU_EXP# 8
CLK_CPU_EXP
CLK_CPU_EXP 8

53

C

+3.3V_LAN

2
R309
2
R377

LAN_SMBDATA

AT1
AT3
AW24
BA24

CLK_BUF_EXP#
CLK_BUF_EXP

AP3
AP1

CLK_BUF_BCLK#
CLK_BUF_BCLK

F18
E18

CLK_BUF_DOT96#
CLK_BUF_DOT96

AH13
AH12

CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD

P41

CLK_PCH_14M

J42

CLK_PCI_LOOPBACK

AH51
AH53

XTAL25_IN
XTAL25_OUT

AF38

1
R686

CLK_BUF_EXP# 6
CLK_BUF_EXP 6
CLK_BUF_BCLK# 6
CLK_BUF_BCLK 6
CLK_BUF_DOT96# 6
CLK_BUF_DOT96 6
CLK_BUF_CKSSCD# 6
CLK_BUF_CKSSCD 6

B

CLK_PCH_14M 6
CLK_PCI_LOOPBACK 18

R379
0_0402_5%~D
2
1

2
90.9_0402_1%~D

@ R685
1M_0402_5%~D

+1.05V_RUN

T45

SIO_14M

R1223

2

1 22_0402_5%~D

CLK_SIO_14M 39

P43

PCI_TCM

3@ R1220

2

1 22_0402_5%~D

CLK_PCI_TPM_CHA 32

T42

PCI_TPM

R1219

2

1 22_0402_5%~D

2

1 22_0402_5%~D

N50 JETWAY_14M @ R910

CLK_PCI_TPM 31
JETWAY_CLK14M 32

@ Y6
25MHZ_18PF_1Y725000CE1A~D
2
1

2

1

PCIE_PRX_PCMTX_N3
PCIE_PRX_PCMTX_P3
PCIE_PTX_PCMRX_N3
PCIE_PTX_PCMRX_P3

H14

R381
0_0402_5%~D

1

@

2

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

2
0_0402_5%~D

1
R54

12P_0402_50V8J~D
C1168

C1373 1
C1374 1

PERN2
PERP2
PETN2
PETP2

1
R51
PCH_SMB_ALERT#

1

PCIE_PRX_WLANTX_N2 AW30
PCIE_PRX_WLANTX_P2 BA30
PCIE_PTX_WLANRX_N2 BC30
PCIE_PTX_WLANRX_P2 BD30

SMBus

PCIE_PRX_EXPTX_N4
PCIE_PRX_EXPTX_P4
PCIE_PTX_EXPRX_N4_C
PCIE_PTX_EXPRX_P4_C

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

B9

2

10/100/1G LAN --->

34
34
34
34

SMBDATA

C320 1
C321 1

Link

C

PCIE_PRX_PCMTX_N3
PCIE_PRX_PCMTX_P3
PCIE_PTX_PCMRX_N3_C
PCIE_PTX_PCMRX_P3_C

SMBCLK

Controller

MiniPCIE
(Mini Card 3)--->

33
33
33
33

SMBALERT# / GPIO11

PEG

Express card--->

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

PERN1
PERP1
PETN1
PETP1

From CLK BUFFER

PCMCIA--->

36
36
36
36

C317 1
C319 1

PCIE_PRX_WANTX_N1 BG30
PCIE_PRX_WANTX_P1 BJ30
PCIE_PTX_WANRX_N1 BF29
PCIE_PTX_WANRX_P1 BH29

Clock Flex

MiniWLAN (Mini Card 2)--->

PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1_C
PCIE_PTX_WANRX_P1_C

PCI-E*

MiniWWAN (Mini Card 1)--->

35
35
35
35

BD82QM57-SLGZQ-B3_FCBGA1071~D

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PCH (2/8)
Size

Document Number

Rev
0.1

LA-5573P
Date:
5

4

3

2

Thursday, January 21, 2010

Sheet
1

16

of

69

5

4

3

2

1

D

D

+3.3V_ALW_PCH
+3.3V_RUN
ME_SUS_PWR_ACK

2
R269

1
10K_0402_5%~D

PCH_PCIE_WAKE#

2
R268

1
10K_0402_5%~D

SIO_SLP_LAN#

2
R380

1
10K_0402_5%~D

PCH_RI#

2
R267

1
10K_0402_5%~D

CLKRUN#

2
R282

1
8.2K_0402_5%~D

Intel request DDPB can not support eDP
U73D

7
7
7
7

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

7
7
7
7

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

BD24
BG22
BA20
BG20

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

BE22
BF21
BD20
BE18

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

BD22
BH21
BC20
BD18

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

+1.05V_RUN
BH25
R385
1

DMI_COMP_R

2

BF25

DMI_ZCOMP

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1

DMI_IRCOMP
FDI_LSYNC0

49.9_0402_1%~D

FDI_LSYNC1
R48

1

2 8.2K_0402_5%~D

PCH_RSMRST#

R260 1

2 10K_0402_5%~D

8,15 XDP_DBRESET#

XDP_DBRESET#

T6

1
R253

SYS_PWROK
2
0_0402_5%~D

M6

15,40 RESET_OUT#

1
R254

PCH_PWROK
2
0_0402_5%~D

B17

40 PM_MEPWROK

1
R256

PM_MEPWROK_R
2
0_0402_5%~D

K5

1
R257

LAN_RST#
2
0_0402_5%~D

B

PM_DRAM_PWRGD

8 PM_DRAM_PWRGD
40 PCH_RSMRST#
40 ME_SUS_PWR_ACK
8,15 SIO_PWRBTN#_R
1
R53

40 SIO_PWRBTN#
40 AC_PRESENT

PCH_RSMRST#
ME_SUS_PWR_ACK
SIO_PWRBTN#_R
2
0_0402_5%~D
AC_PRESENT

A10
D9
C16
M1
P5
P7

SYS_RESET#

WAKE#

SYS_PWROK
PWROK
MEPWROK
LAN_RST#
DRAMPWROK
RSMRST#

CLKRUN# / GPIO32

System Power Management

PCH_PWROK

SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63

PWRBTN#
ACPRESENT / GPIO31

SLP_S3#

AB46
V48

L_CTRL_CLK
L_CTRL_DATA

AP39
AP41

LVD_IBG
LVD_VBG

BJ14

AV53
AV51

AT43
AT42

BF13
BB47
BA52
AY48
AV47

BH13
BJ12
BG14

J12
Y1

BB48
BA50
AY49
AV48

PCH_PCIE_WAKE#

AP48
AP47
PCH_PCIE_WAKE# 39

CLKRUN#

CLKRUN#

P8

SUS_STAT#/LPCPD#

T173

PAD~D

F3

SUSCLK

T179

PAD~D

T2

PAD~D

E4

SIO_SLP_S5#

H7

SIO_SLP_S4#

P12

SIO_SLP_S3#

K8

SIO_SLP_M#

2 PCH_BATLOW#
8.2K_0402_5%~D
PCH_RI#

A

A6
F14

BATLOW# / GPIO72

PMSYNCH

RI#

SLP_LAN# / GPIO29

H_PM_SYNC

SDVO_TVCLKINN
SDVO_TVCLKINP

BJ46
BG46

SDVO_STALLN
SDVO_STALLP

BJ48
BG48

SDVO_INTN
SDVO_INTP

BF45
BH45

SDVO_CTRLCLK
SDVO_CTRLDATA

LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

AY51
AT48
AU50
AT51

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

AA52
AB53
AD53

CRT_BLUE
CRT_GREEN
CRT_RED

DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA

PAD~D
V51
V53

SIO_SLP_S4# 39
PAD~D

SIO_SLP_S3# 39

Y53
Y51

PAD~D

AD48
AB51

PAD~D
H_PM_SYNC 8

F6

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

CRT_DDC_CLK
CRT_DDC_DATA

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

CRT_HSYNC
CRT_VSYNC

SIO_SLP_M# 39,48

N2
BJ10

V1.5

DAC_IREF
CRT_IRTN

R672
1K_0402_5%~D

C

T51
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

B

U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

BD82QM57-SLGZQ-B3_FCBGA1071~D

2

1
R275

32,39,40

SIO_SLP_S5# 40

T6
+3.3V_ALW_PCH

AY53
AT49
AU52
AT53

CRT_IREF
TP23

L_BKLTCTL

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

T5
SLP_M#

Y48

L_DDC_CLK
L_DDC_DATA

T4

SUS_PWR_DN_ACK / GPIO30

L_BKLTEN
L_VDD_EN

AB48
Y45

T3
SLP_S4#

T48
T47

Digital Display Interface

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

BC24
BJ22
AW20
BJ20

1

7
7
7
7

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

FDI

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI

C

7
7
7
7

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

CRT

V1.5

LVDS

U73C

A

BD82QM57-SLGZQ-B3_FCBGA1071~D
SIO_SLP_LAN#

SIO_SLP_LAN# 30,39

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PCH (3/8)
Size

Document Number

Rev
0.1

LA-5573P
Date:
5

4

3

2

Thursday, January 21, 2010

Sheet
1

17

of

69

5

4

3

2

1

Stuff: R78,R89,R101~R116

+3.3V_RUN

PCH XDP ENABLE
RP3
1
2
3
4

No Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130

PCI_DEVSEL#
PCI_PIRQA#
PCI_PLOCK#
PCI_PERR#

8
7
6
5

Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
PCH XDP DISABLE

8.2K_1206_8P4R_5%~D

No Stuff: R78,R89,R101~R116

RP4
PCI_TRDY#
PCI_FRAME#
PCI_REQ1#
PCI_PIRQD#

U73E

G38
H51
B37
A44

PIRQA#
PIRQB#
PIRQC#
PIRQD#

PCI_REQ0#
PCI_REQ1#
BT_DET#

F51
A46
B45
M53

PCI_GNT0#
PCI_GNT1#
PCIE_MCARD3_DET#
PCI_GNT3#

F48
K45
F36
H53

LVDS_CBL_DET#
24 LVDS_CBL_DET#
SD_DET#
33
SD_DET#
CAM_MIC_CBL_DET#
24 CAM_MIC_CBL_DET#
FFS_PCH_INT
1
2
R632
0_0402_5%~D
@ R121 1
2 0_0402_5%~D PCH_PCIRST#

B41
K53
A36
A48

PCI_PIRQB#
PCI_REQ0#

8
7
6
5

PCI_SERR#

8.2K_1206_8P4R_5%~D
RP6
1
2
3
4

PCI_IRDY#
PCI_STOP#
LVDS_CBL_DET#
PCI_PIRQC#

8
7
6
5

8.2K_1206_8P4R_5%~D

C

1
R212

CAM_MIC_CBL_DET#
2
8.2K_0402_5%~D

1
R590

BT_DET#
2
8.2K_0402_5%~D

1
R786

SD_DET#
2
8.2K_0402_5%~D

1

PCI_GNT3#

R863
4.7K_0402_5%~D
@
2

36 PCIE_MCARD2_DET#
41
BT_DET#

36 PCIE_MCARD3_DET#

A16 swap override Strap/Top-Block
28,40 HDD_FALL_INT

Swap Override jumper

PCI_SERR#
PCI_PERR#

Low = A16 swap
PCI_GNT#3

K6
E44
E50

High = Default
B

PCI_IRDY#

R124
R100
R97
R94
R14

53 PLTRST_GPU#
31 PLTRST_USH#
33 PLTRST_R5U242#
15 PLTRST_XDP#
30 PLTRST_LAN#

1
1
1
1
1

2
2
2
2
2

0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

39 CLK_PCI_5028
40 CLK_PCI_MEC
38 CLK_PCI_DOCK
16 CLK_PCI_LOOPBACK
+3.3V_RUN

PCI_PLOCK#

D49

PCI_STOP#
PCI_TRDY#

D41
C48
M7

R1216
R1217
R1215
R63

PCI_DEVSEL#
PCI_FRAME#

A42
H44
F46
C46

2

PCH_PLTRST#

D5

PCI_5028
PCI_MEC
PCI_DOCK

N52
P53
P46
P51
P48

1 22_0402_5%~D
1 22_0402_5%~D
2 22_0402_5%~D

2
2
1

1 22_0402_5%~D PCI_LOOPBACKOUT

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

NV_ALE
NV_CLE

BD3
AY6

NV_RCOMP

AU2

NV_RB#

AV7

NV_WR#0_RE#
NV_WR#1_RE#

AY8
AY5

NV_WE#_CK0
NV_WE#_CK1

@ R872
10K_0402_5%~D
NV_ALE

Danbury Technology Enabled
High = Enabled (Default)
NV_ALE
Low = Disabled
NV_ALE
NV_CLE

+VCCPNAND
C

@R866
@R866
1K_0402_5%~D

AV11
BF5

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
PCIRST#
SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAME#
PLOCK#

USBRBIAS#
STOP#
TRDY#

USBRBIAS

PME#
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+

B25

USBRBIAS

USBP13USBP13+

D25
N16
J16
F16
L16
E14
G16
F12
T15

USB_OC0#_R
USB_OC1#_R

USBP0- 37
USBP0+ 37
USBP1- 37
USBP1+ 37
USBP2- 37
USBP2+ 37
USBP3- 37
USBP3+ 37
USBP4- 36
USBP4+ 36
USBP5- 36
USBP5+ 36
USBP6- 41
USBP6+ 41
USBP7- 31
USBP7+ 31
USBP8- 38
USBP8+ 38
USBP9- 38
USBP9+ 38
USBP10- 34
USBP10+ 34
USBP11- 24
USBP11+ 24

----->Right Side Bottom
----->Right Side Top
----->Left Side Top
----->Left Side Bottom
----->WLAN
----->WWAN
----->Blue Tooth
----->BIO
----->DOCK
----->DOCK
----->Express Card
----->Camera

USBP13- 36
USBP13+ 36

----->PCIE/BKT

NV_CLE

DMI Termination Voltage
Set to Vss when LOW
NV_CLE
Set to Vcc when HIGH

+3.3V_ALW_PCH
RP1
USB_OC0#
USB_OC1#
USB_OC3#
USB_OC4#

Within 500 mils

USB_OC5#
USB_OC6#
USB_OC7#
USB_OC2#

1

2
R303
22.6_0402_1%~D
R71
R77

1
1

2 0_0402_5%~D
2 0_0402_5%~D
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

4
3
2
1

5
6
7
8

B

10K_1206_8P4R_5%~D
RP2
4
5
3
6
2
7
1
8
10K_1206_8P4R_5%~D

37
37
15
15
15
15
15
15

USB_OC0#_R 15
USB_OC1#_R 15

BD82QM57-SLGZQ-B3_FCBGA1071~D

C40
1

+VCCPNAND

AV9
BG8

1

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

RP5
1
2
3
4

NV_DQS0
NV_DQS1

D

AY9
BD1
AP15
BD8

2

C/BE0#
C/BE1#
C/BE2#
C/BE3#

+3.3V_RUN

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

1

J50
G42
H47
G34

8.2K_1206_8P4R_5%~D

V1.5

2

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

NVRAM

H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36

USB

8
7
6
5

PCI

1
2
3
4

D

2

4

PCH_PLTRST#_EC

Boot BIOS Strap

PCH_PLTRST#_EC 8,32,34,36,39,40

G

O

A

PCI_GNT0#

PCI_GNT#1

TC7SH08FU_SSOP5~D

PCI_GNT#0

Boot BIOS Location
PCI_GNT1#

0

0

LPC

0

1

Reserved (NAND)

1

0

PCI

1

1

SPI

2

@

R93
1K_0402_5%~D

A

1

B

2

R79
1K_0402_5%~D
2
1

1

3

PCH_PLTRST#
A

P

5

0.1U_0402_16V4Z~D
U11

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

@

Title

PCH (4/8)
Size

*
4

3

Rev
0.1

LA-5573P
Date:

5

Document Number

2

Thursday, January 21, 2010

Sheet
1

18

of

69

5

4

3

2

1

D

D

Y3
C38

GPIO6

D37

GPIO7

J32

SIO_EXT_SMI#

F10

PM_LANPHY_ENABLE

39 SIO_EXT_WAKE#
15,37 EN_ESATA_RPTR#
1

2

@ R99

29 SPEAKER_DET#

SIO_EXT_SMI#

1K_0402_5%~D

39,62 DGPU_PWROK

15,31 CONTACTLESS_DET#

1

R1284
8.2K_0402_5%~D
@
2

36 USB_MCARD1_DET#

15

GPIO37

FFS_INT2

15,39 TEMP_ALERT#

+3.3V_ALW_PCH

37

IO_LOOP

K9

LAN_PHY_PWR_CTRL / GPIO12

A20GATE

T7

GPIO15

SIO_A20GATE

GPIO8

AM3

CLK_CPU_BCLK#

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

AM1

CLK_CPU_BCLK

DGPU_PWROK

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

ROUSH_PAID_TS_DET#

V13

GPIO28

GPIO34

M11

STP_PCI# / GPIO34

USB_MCARD1_DET#

V6

CONTACTLESS_DET#
GPIO37

BG10

H_PECI
SIO_RCIN#

PROCPWRGD

BE10

H_CPUPWRGD

THRMTRIP#

BD10

PCH_THRMTRIP#_R

BA22

AB13

SATA3GP / GPIO37

TP2

AW22

SLOAD / GPIO38

TP3

BB22

SDATAOUT0 / GPIO39

TP4

PCIECLKRQ6# / GPIO45

TP5

P3

USB_MCARD2_DET#

H3
F1

FFS_INT2

AB6

TEMP_ALERT#

AA4

IO_LOOP

F8

B

1
R95
1
R1489
1
R1490
1
R1491

CONTACTLESS_DET#
1
10K_0402_5%~D
GPIO37
1
10K_0402_5%~D
EN_ESATA_RPTR#
1
10K_0402_5%~D
TEMP_ALERT#
1
10K_0402_5%~D
GPIO34
1
10K_0402_5%~D
SPEAKER_DET#
2
8.2K_0402_5%~D
GPIO1
2
10K_0402_5%~D
GPIO6
2
10K_0402_5%~D
GPIO7
2
10K_0402_5%~D

PCIECLKRQ7# / GPIO46

TP6

SDATAOUT1 / GPIO48

TP7

SATA5GP / GPIO49 / TEMP_ALERT#

TP8

GPIO57

TP9

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

TP11

RSVD

A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53

NCTF

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

CLK_CPU_BCLK 8
H_PECI

8

SIO_RCIN#

40

2
R230
2
R231

1
8.2K_0402_5%~D
1
10K_0402_5%~D

1
R272

2
10K_0402_5%~D

+1.05V_1.1V_RUN_VTT

R237
56_0402_5%~D

H_CPUPWRGD 8

1

TP1

TPM_ID1

SIO_EXT_SCI#

CLK_CPU_BCLK# 8

GPIO35
SATA2GP / GPIO36

V3

SIO_RCIN#

SIO_A20GATE 40

T1

PECI
RCIN#

AB7

TPM_ID0

All NCTF pins should have thick
traces at 45°from the pad.

2
R1242
2
R1243
2
R1244
2
R1245
2
R1544

SIO_A20GATE

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

2 SIO_EXT_WAKE#
2.2K_0402_5%~D
2 GPIO46
10K_0402_5%~D

+3.3V_RUN

U2

TACH0 / GPIO17

TP10
1
R1530
1
R1309

+3.3V_RUN

AF48
AF47

SATA4GP / GPIO16

GPIO46
28

CLKOUT_PCIE7N
CLKOUT_PCIE7P

TACH3 / GPIO7

F38

TP_ONDIE_PLL_VR

36 USB_MCARD2_DET#

TACH2 / GPIO6

AA2

+3.3V_ALW_PCH

Internal pull up GPIO27 to
enable VccVRM

AH45
AH46

SPEAKER_DET#

TP_ONDIE_PLL_VR

C

CLKOUT_PCIE6N
CLKOUT_PCIE6P

TACH1 / GPIO1

EN_ESATA_RPTR#

36 PCIE_MCARD1_DET#

15 ROUSH_PAID_TS_DET#

BMBUSY# / GPIO0

MISC

GPIO1

CPU

40 SIO_EXT_SMI#
30 PM_LANPHY_ENABLE

V1.5

1

SIO_EXT_SCI#

U73F

GPIO

40 SIO_EXT_SCI#

R130
0_0402_5%~D
1
2

2

15 SIO_EXT_SCI#_R

TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24

2

C33
0.1U_0402_16V4Z~D

C

+3.3V_ALW_PCH

AY45
AY46

ROUSH_PAID_TS_DET# 1
R74

2
10K_0402_5%~D

AV43

SIO_EXT_SMI#

1
R274

2
10K_0402_5%~D

IO_LOOP

2
R835

1
100K_0402_5%~D

AV45
AF13
M18
N18
AJ24
AK41
AK42
M32
N32
M30

B

N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6

INIT3_3V#

PAD~D

T7 @

C10

BD82QM57-SLGZQ-B3_FCBGA1071~D
+3.3V_RUN

1

1
4@ R787
20K_0402_5%~D
2

A

TPM_ID1
6@

TPM_ID0
1

R922
10K_0402_5%~D

2

TPM_ID0

5@

China TPM

3@ R339
2.2K_0402_5%~D

TPM_ID1

0

0

0

1

USH1.0 (For SSI)

1

0

USH2.0

1

1

No TPM, No China TPM

2

1

A

R273
10K_0402_5%~D

2

+3.3V_RUN

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

-----> will use MEMO control pop R339
& de-pop R787 when USH1.0 enable
for SSI build only

Title

PCH (5/8)
Size

Document Number

Rev
0.1

LA-5573P
Date:
5

4

3

2

Thursday, January 21, 2010

Sheet
1

19

of

69

5

4

3

2

1

PCH Power Rail Table
+1.05V_RUN

CRT

VSSA_DAC[2]

VSSA_LVDS

LVDS

VCCIO[24]

2

1

2

C84
1U_0402_6.3V6K~D

2

1

C83
1U_0402_6.3V6K~D

2

1

C82
1U_0402_6.3V6K~D

2

1

C81
1U_0402_6.3V6K~D

1

C80
10U_0805_4VAM~D

C

1

2

C85
0.1U_0402_10V7K~D

+3.3V_RUN

AN30
AN31
AN35
+VCCAFDI_VRM

AT22

Place C22 Near BJ18 pin
1
B

C22
1U_0402_6.3V6K~D

BJ18
AM23

+1.05V_RUN

HVCMOS

VCCFDIPLL

V_CPU_IO

1.1/1.05

< 1 (mA)

V5REF

5

< 1 (mA)

V5REF_Sus

5

< 1 (mA)

Vcc3_3

3.3

0.357

VccAClk

1.1

0.052

VccADAC

3.3

0.069

VccADPLLA

1.1

0.068

VccADPLLB

1.1

0.069

VccapllEXP

1.1

0.04

VccCore

1.1

1.432

VccDMI

1.1

0.058

AH39
AP43
AP45
AT46
AT45

AB34

VCC3_3[3]

AB35

VCC3_3[4]

AD35

+3.3V_RUN

VCCVRM[2]

AT24

C93
0.1U_0402_10V7K~D

VCCDMI[1]

AT16

VCCDMI[2]

AU16

1
2
R391
0_0603_5%~D

+1.05V_+1.5V_1.8V_RUN

C1140 near pin AT16

VccDMI

1.1

0.061

VccFDIPLL

1.1

0.037

VccIO

1.1

3.062

VccLAN

1.1

0.32

VccME

1.1

1.849

C1140
1U_0402_6.3V6K~D
+VCCPNAND

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

VccME3_3

3.3

0.085

@ R489
0_0805_5%~D
2

+3.3V_RUN

VccpNAND

1.8

0.156

1

+1.8V_RUN

VccRTC

3.3

2 (mA)

VccSATAPLL

1.1

0.031

VccSus3_3

3.3

0.163

3.3

0.006

1

1

2

2
R495
0_0805_5%~D

VccSusHDA
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

C

+1.05V_1.1V_RUN_VTT
1

2

VCCVRM[1]

S0 Iccmax
Current (A)

D

+1.5V_1.8V_RUN_VCCADMI_VRM

VCC3_3[1]

Voltage

AH38

VCC3_3[2]

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

Voltage Rail

AF51

2

VCCIO[54]
VCCIO[55]

VCCIO[1]

AF53

1

DMI

+1.05V_RUN

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]

PCI E*

2 @

VCCAPLLEXP

NAND / SPI

AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

FDI

C78
1U_0402_6.3V6K~D

1

AE52

VCCALVDS

Place C78 Near BJ24 pin
BJ24

VCCADAC[2]
VSSA_DAC[1]

+1.05V_RUN

AK24

VCCADAC[1]

AE50

C94
0.1U_0402_10V7K~D

2

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

POWER
V1.5

VCC CORE

2

D

1

C77
1U_0402_6.3V6K~D

1

C1139
10U_0805_4VAM~D

U73G
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31

+3.3V_RUN

AM8
AM9
AP11
AP9

+3.3V_M

VccVRM

1

2 @

2

C95
0.1U_0402_10V7K~D

1.8 / 1.5

0.196

VccVRM

1.05

< 1 (mA)

VccALVDS

3.3

< 1 (mA)

VccTX_LVDS

1.8

0.059

B

BD82QM57-SLGZQ-B3_FCBGA1071~D

+1.05V_+1.5V_1.8V_RUN
R390
0_0603_5%~D
1
2

+VCCAFDI_VRM

+1.5V_RUN

+1.05V_+1.5V_1.8V_RUN
@
2

+1.8V_RUN

+1.05V_RUN

R96
1

+1.05V_+1.5V_1.8V_RUN

0_0603_5%~D

2
1
R387
0_0603_5%~D

2
1
@ R80
@R80
0_0603_5%~D
A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PCH (6/8)
Size

Document Number

Rev
0.1

LA-5573P
Date:
5

4

3

2

Thursday, January 21, 2010

Sheet
1

20

of

69

5

4

3

2

1

Place C39 Near AP51 pin

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

Y41

VCCME[11]

Y42

+VCCRTCEXT

V9

1
C103
0.1U_0402_10V7K~D

1

2

1

2

1
B

2

R690
0_0805_5%~D
1
2
1

2
+3.3V_RUN

R691
0_0805_5%~D
1
2

C759
0.1U_0402_10V7K~D

+3.3V_ALW_PCH

1

2 @

2 @

BD51
BD53
AH23
AJ35
AH35
AF34
AH34
AF32

1

2

+3.3V_ALW_VCCPSUS

BB51
BB53

C1883
1U_0402_6.3V6K~D

C138
1U_0402_6.3V6K~D

2

C108
1U_0402_6.3V6K~D

+1.05V_RUN

1

C677
0.1U_0402_10V7K~D

Place C105 Near BB51 pin
C106 Near BD51 pin

C139
C1881
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D

+1.05V_RUN

1

AU24

+1.05V_+1.5V_1.8V_RUN

C217
0.1U_0402_10V7K~D

2

+VCCSST

V12

+DCPSUS

Y22

P18
U19
U20
U22

V15
+3.3_RUN_VCCPCORE

V16
Y16

C760
0.1U_0402_10V7K~D

1

2

AU18

VCCVRM[3]
VCCADPLLA[1]
VCCADPLLA[2]
VCCADPLLB[1]
VCCADPLLB[2]
VCCIO[21]
VCCIO[22]
VCCIO[23]

1

A

2

1

2

A12

VCCIO[56]

F24

+PCH_V5REF_SUS

V5REF

K49

+PCH_V5REF_RUN

VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]

VCCIO[2]
VCC3_3[14]

J38

1
2

R57
20K_0402_5%~D

C18
0.1U_0402_10V7K~D

S

D

2

1

+3.3V_ALW_PCH

D16
RB751S40T1_SOD523-2~D

+3.3V_ALW_VCCPUSB

+PCH_V5REF_SUS

2

C342
1U_0603_10V6K~D

Follow DG 1.11
+5V_RUN +3.3V_RUN
+1.05V_RUN

C

R311
100_0402_5%~D

D15
RB751S40T1_SOD523-2~D
+PCH_V5REF_RUN

1

+3.3V_RUN

R517
0_0805_5%~D
2
1

+3.3V_RUN_VCCPPCI

L38

D

1

2

V5REF_SUS

2
G

+5V_ALW_PCH

R313
100_0402_5%~D

1

V23

VCC3_3[8]

2

C335
1U_0603_10V6K~D

1

M36
2

N36

C356
0.1U_0402_10V7K~D
+3.3V_RUN

P36
U35

1

AD13

2

C1203
0.1U_0402_10V7K~D

VCCIO[3]
VCCIO[4]
VCCSATAPLL[1]
VCCSATAPLL[2]

DCPSST

DCPSUS

VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]

VCC3_3[5]
VCC3_3[6]
VCC3_3[7]

V_CPU_IO[1]
V_CPU_IO[2]

VCCVRM[4]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

+RTC_CELL

C783
0.1U_0402_10V7K~D

1

C763
4.7U_0603_6.3V6K~D
2
2

C781
0.1U_0402_10V7K~D

1

AT18

C113
0.1U_0402_10V7K~D

+V_CPU_IO

C777
0.1U_0402_10V7K~D

2

DCPRTC

U23

VCCIO[9]

1

+1.05V_1.1V_RUN_VTT R692
0_0603_5%~D
1
2

VCCME[12]

VCCSUS3_3[28]

+3.3V_ALW_PCH

1

V39

R500
0_0603_5%~D
2
1

2

2

VCCME[6]

2

1

42 ALW_ENABLE

2

VCCME[5]

AF42

C96
1U_0402_6.3V6K~D

+3.3V_ALW_VCCPUSB

1

3

Q10
SSM3K7002FU_SC70-3~D

1

2

1

1

2

C101
1U_0402_6.3V6K~D

C112
22U_0805_6.3V6M~D

2 @

VCCME[4]

AF41

+1.05V_RUN

+5V_ALW_PCH

R651
0_0603_5%~D
2
1

2

C

1

VCCME[3]

AF43

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

+1.05V_RUN_VCCUSBCORE

VCCRTC

VCCSUSHDA

BD82QM57-SLGZQ-B3_FCBGA1071~D

AK3
AK1

+VCCSATAPLL
1

C610
1U_0402_6.3V6K~D

2

1

2

AD41

HDA

Place C117 Near V39 pin

2 @

C102
1U_0402_6.3V6K~D

1

1

C111
22U_0805_6.3V6M~D

2

C116
22U_0805_6.3V6M~D

1

+1.05V_M_VCCEPW
1

VCCME[2]

V24
V26
Y24
Y26

C99
0.1U_0402_10V7K~D

AD39

VCCME[1]

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

R499
0_0603_5%~D
2
1

C97
0.1U_0402_10V7K~D

2

Place C116 Near AD38 pin

DCPSUSBYP

USB

AD38

Clock and Miscellaneous

1
C110
0.1U_0402_10V7K~D

VCCLAN[2]

SATA

R674
0_0805_5%~D
1
2

+TP_PCH_VCCDSW Y20

C117
22U_0805_6.3V6M~D

+1.05V_M

AF24

VCCLAN[1]

RTC

2

AF23

VCCACLK[2]

PCI/GPIO/LPC

+1.05V_M_VCCAUX
1

C100
1U_0402_6.3V6K~D

1
2
R669
0_0603_5%~D

VCCACLK[1]

CPU

D

AP53

PCI/GPIO/LPC

AP51

2 @

+1.05V_M

+5V_ALW

POWER
V1.5

1

U73J

Place C610 Near AK3 pin

2 @

AH22
AT20

B

+1.05V_+1.5V_1.8V_RUN
R557
0_0805_5%~D
2
1

AH19
+VCCIO

AD20
AF22

1

AD19
AF20
AF19
AH20

2

AB19
AB20
AB22
AD22
AA34
Y34
Y35
AA35

+1.05V_RUN

C611
1U_0402_6.3V6K~D

C39
1U_0402_6.3V6K~D

+VCCACLK
1

+1.05V_M

+VCCME_13
+VCCME_14
+VCCME_15
+VCCME_16

R559
R573
R591
R592

2
2
2
1

+VCCSUSHDA

L30
1

2

1
1
1
2

0_0603_5%~D
0_0603_5%~D
0_0603_5%~D
0_0603_5%~D

2
1
R650
0_0603_5%~D

+3.3V_ALW_PCH

A

C672
1U_0402_6.3V6K~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PCH (7/8)
Size

Document Number

Rev
0.1

LA-5573P
Date:
5

4

3

2

Thursday, January 21, 2010

Sheet
1

21

of

69

5

4

3

2

1

U73I

D

AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42

U73H
AB16
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28

C

B

VSS[0]

V1.5

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

BD82QM57-SLGZQ-B3_FCBGA1071~D

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

V1.5

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

D

C

B

A

A

BD82QM57-SLGZQ-B3_FCBGA1071~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PCH (8/8)
Size

Document Number

Rev
0.1

LA-5573P
Date:
5

4

3

2

Thursday, January 21, 2010

Sheet
1

22

of

69

5

4

3

2

1

+5V_RUN
+3.3V_M

PWM

@

SMCLK
SMDATA

20

GND
GND
GND

PWM
N/C

2

2 0.27_1210_1%~D

PHASE_W_R
PHASE_V_R
PHASE_U_R

@ R531
@ R534
@ R535

2 0_0805_5%~D PHASE_W
2 0_0805_5%~D PHASE_V
2 0_0805_5%~D PHASE_U

1
1
1

2

9 @ R1463 1
12
13
14

2 1U_0402_6.3V6K~D

1

@ C434 1

7

8
15
21

2

VGA_THERMDN 2

2

C1706
470P_0402_50V7K~D
VGA_THERMDN 54

Place Capacitor close to Guardian Chip
D

JFAN1
FAN1_DET#
+FAN1_VOUT
FAN1_TACH_FB

R5071
R5161
R5191
R5291

2
2
2
2

0_0402_5%~D PHASE_U
0_0805_5%~D PHASE_V
0_0402_5%~D PHASE_W
0_0805_5%~D MOT_COM

1
2
3
4

1
2
3 G1
4 G2

5
6

MOLEX_53398-0471~D
IMVP_IMON

R998
1

11,50

MAX8731_IINP 51

4.7K_0402_5%~D

1
3

1

6

TPF3000-BP-TR_QFN20_4X4~D

THERMATRIP1#

VGA_THERMDP 54
1

+FAN1_VOUT
FAN1_TACH_FB

+3.3V_RUN
C219
22U_0805_6.3VAM~D

1

@

MOT_COM

@ R156
10K_0402_5%~D
2
1

FAN1_TACH_FB
FAN_OK

1
2

D2
RB751S40T1_SOD523-2~D

R134
8.2K_0402_5%~D

C_FILT
PARAM_SEL1
PARAM_SEL2
I_RET
PARAM_SEL3
PARAM_SEL4 PHASE_W
PHASE_V
MOT_COM
PHASE_U

@ R536
1
2 MOT_COM_R 10
0_0805_5%~D
18
29,40,53 DAI_GPU_R3P_SMBCLK
19
29,40,53 DAI_GPU_R3P_SMBDAT

2

1

@

TACH
FAN_OKAY

VDD
VDD

16
3
4
5
R1462
15K_0402_5%~D

@

2

+3.3V_M

2

@ U140
11
17

Close to U140 pin 17

+1.05V_1.1V_RUN_VTT
R135
C
2.2K_0402_5%~D
1
2
2
B
Q5 E
PMST3904_SOT323-3~D

1

1
2
+5V_RUN

R1458
15K_0402_5%~D

Close to U140 pin 11

2

VGA_THERMDP
R142
10K_0402_5%~D

@

R138
27K_0402_5%~D
2
1

2

@

1

2

@

1

Discrete
@ R136
10K_0402_5%~D

C73
4.7U_0603_10V6K~D

@

1

C406
0.01U_0402_16V7K~D

D

1

C72
4.7U_0603_10V6K~D

2

C391
0.01U_0402_16V7K~D

1

+5V_RUN

R1457
0_0402_5%~D
2
1

+5V_RUN

1

2

C218
0.1U_0402_16V4Z~D

8 H_THERMTRIP#

40 BC_DAT_EMC4002

Place under CPU

R1408
0_0402_5%~D

1

2

1

2
B
E Q8
MMBT3904WT1G_SC70-3~D

C224
2200P_0402_50V7K~D

2

C

2

3

Diode circuit at DP2/DN2 is used
for skin temp sensor (placed
optimally
@ C223
100P_0402_50V8K~D
between CPU, MCH and MEM).

1

40 BC_CLK_EMC4002
Place C223 close to the Q8 as possible
Place C224, close to the Guardian pins as possible

1

C

C

U3
BC_DAT_EMC4002
BC_CLK_EMC4002

1

C
Q7
MMBT3904WT1G_SC70-3~D

2

1
2
B

3

1
C222 @
100P_0402_50V8K~D

Place C221 close to the
Guardian pins as possible.

C221

E
2

2200P_0402_50V7K~D

Place C222 close to Q7 as
possible.

2

C
@ C227
@C227
100P_0402_50V8K~D
R1218

+3.3V_M

1

C228
2200P_0402_50V7K~D

2
B
Q9
MMBT3904WT1G_SC70-3~D
2 22_0402_5%~D
3

Place C227 close
to Q9

1

1

Q9 Place near DIMM

1

36
35

REM_DIODE2_P
REM_DIODE2_N

38
37

REM_DIODE3_P
REM_DIODE3_N

41
40

+VCC_4002

+RTC_CELL
1

C229
0.1U_0402_16V4Z~D

2

1

+3.3V_M

4
21

C230
1U_0402_6.3V6K~D

2

REM_DIODE1_P
REM_DIODE1_N

+3.3V_M

40 PCH_PWRGD#

1
R146 1
R148

R137
8.2K_0402_5%~D

2
18
2 10K_0402_5%~D 17
1K_0402_5%~D
THERMATRIP1#
22
THERMATRIP2#
23
THERMATRIP3#
24
VSET

42

1

B

DP4/DN8
DN4/DP8

DP2
DN2

DP5/DN9
DN5/DP9

DP3/DN7
DN3/DP7

DP6/VREF_T2
DN6/VIN2

39
48
45
44
43

VGA_THERMDP
VGA_THERMDN

47
46
1
2

GPU_IMON
2
R141

VDD
ATF_INT#/BC-LINK_IRQ#
POWER_SW#
ACAVAIL_CLR
THERMTRIP_SIO/PWM1/GPIO5
SYS_SHDN#
VDD_PWRGD
3V_PWROK#
RTC_PWR3V

THERMTRIP1#
THERMTRIP2#
THERMTRIP3#

LDO_SHDN#

VSET

LDO_POK

ADDR_MODE/XEN

LDO_SET

12
26
27
20
25

19

1
10K_0402_5%~D

62

ACAV_IN

PWM

2
R211

+3.3V_M

BC_INT#_EMC4002 40

POWER_SW#

40,51,52

2
R145
1
@ R147

1
+3.3V_M
10K_0402_5%~D
THERM_STP#
2
+RTC_CELL
47K_0402_1%~D

45

1
10K_0402_5%~D

34
33

B

LDO_SET
1

3
6
5

2

1

2

1

2

+FAN1_VOUT

7
8

FAN1_TACH_FB

VDDH2
VDDH2

VDDL1

VDDL2

15
14

FAN_OUT1
FAN_OUT1

LDO_OUT/FAN_OUT2
LDO_OUT/FAN_OUT2

TACH1/GPIO3
CLK_IN/GPIO2

EC_32KHZ_OUT

49

40 EC_32KHZ_OUT

VDDH1
VDDH1

32
31

+3.3V_M

R154
1K_0402_5%~D

28

2

1

9

C237
10U_0805_10V4Z~D

2

1
4.7K_0402_5%~D

+3.3V_RUN
C236
0.1U_0402_16V4Z~D

1

Rset=953,Tp=88degree

C235
10U_0805_10V4Z~D

2

2

C220
0.1U_0402_16V4Z~D

C234
0.1U_0402_16V4Z~D

C231
0.1U_0402_16V4Z~D

DP1/VREF_T
DN1/THERM

VIN1
VCP1
VCP2

TACH2/GPIO4
PWM2/GPIO1

29
30
16
13

FAN1_DET#
FAN1_DET# @ R594 1

0_0402_5%~D
2
PM_EXTTS# 8

2
R1498

1
10K_0402_5%~D

FAN_OK

VSS

THERMATRIP2#

2
R150

+VCC_4002

+5V_RUN
R151
953_0402_1%~D
2

2

1

SMDATA/BC-LINK_DATA
SMCLK/BC-LINK_CLK

2

E

1

1

10
11

EMC4002-HZH C_QFN48_7X7~D

+3.3V_M
+3.3V_RUN

*

THERMATRIP3#

10K

C

THERM_B3 2
B

Q188
PMST3904_SOT323-3~D

1

E

3

<= 4.7K +/- 5%

2

C240
0.1U_0402_16V4Z~D

2N3904

2F(r/w)

2N3904

2E(r/w)

18K

Thermistor

2F(r/w)

>= 33K

Thermistor

2E(r/w)

5

U68
TC7SH08FU_SSOP5~D
POWER_SW#
4 O

P

SMBUS
Address

B

G

For Remote1
mode

2

Pull-up Resistor
on ADDR_MODE/XEN

C1050
0.1U_0402_16V4Z~D
1
2

A

1

DOCK_PWR_SW# 40

2

POWER_SW_IN# 40
A

3

R155
8.2K_0402_5%~D

1

R1402
2.2K_0402_5%~D
2
1

R1401
A

8.2K_0402_5%~D
2
1

1

+RTC_CELL

DELL CONFIDENTIAL/PROPRIETARY

53 THERMTRIP_VGA#

Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

FAN & Thermal Sensor
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

23

of

69

5

4

3

2

1

LCD Power
JEDP1

1
Q13A
DMN66D0LDW-7_SOT363-6~D

1
@ R166
0_0402_5%~D

LCD_SMBCLK 40
LCD_SMBDAT 40
+3.3V_RUN
ALS_INT#
39

39 LCD_VCC_TEST_EN

3

2

BIA_PWM_GPU 53

USBP11-

4

@ L59
DLW21SN121SQ2L_4P~D
1
2 2
4

3

@ R360 1
@ R279 1
@ R1027 1
@ R1029 1
@ R1030 1
@ R1031 1
R1028 1

B

2
2
2
2
2
2
2

20K_0402_5%~D
20K_0402_5%~D
20K_0402_5%~D
20K_0402_5%~D
20K_0402_5%~D
4.99K_0402_1%~D
20K_0402_5%~D
20K_0402_5%~D
20K_0402_5%~D
20K_0402_5%~D
20K_0402_5%~D
4.99K_0402_1%~D
100K_0402_5%~D

3

2
3
4

D

40mil
6
5
2
1

4

2
0_0402_5%~D

1
R513

2
0_0402_5%~D

1

@

2

eDP Repeater

+BL_PWR_SRC

1
R167
100K_0402_5%~D

2

C247
0.1U_0603_50V4Z~D

C

PWR_SRC_ON
Q18
SSM3K7002FU_SC70-3~D

+3.3V_RUN

54 DPD_GPU_LANE_P1
54 DPD_GPU_LANE_N1
EDP_LANE_P0
EDP_LANE_N0

DP119_EN
VOD_CTL
VOD_CTL0
EQ_CTL
PRECTL
PUP5K
DP119_EN
VOD_CTL
VOD_CTL0
EQ_CTL
PRECTL
PDN5K
DPD_GPU_EDP_HPD

EDP_LANE_P1
EDP_LANE_N1

2 0.1U_0402_10V7K~D DPD_EDP_LANE_P0_C
2 0.1U_0402_10V7K~D DPD_EDP_LANE_N0_C

2
3

C350 1
C266 1

2 0.1U_0402_10V7K~D DPD_EDP_LANE_P1_C
2 0.1U_0402_10V7K~D DPD_EDP_LANE_N1_C

5
6

C271 2
C358 2

1 0.1U_0402_10V7K~D DPD_EDP_LANE_P0_RP 26
1 0.1U_0402_10V7K~D DPD_EDP_LANE_N0_RP 25

OUT 0(p)
OUT 0(n)

C359 2
C225 2

1 0.1U_0402_10V7K~D DPD_EDP_LANE_P1_RP 23
1 0.1U_0402_10V7K~D DPD_EDP_LANE_N1_RP 22

OUT1 (p)
OUT1 (n)

X1EDP & DP119 co-lay circuit: (Defult DP119)
X1EDP->R356,R1031,R336,R279,R1029==>POP
R328,R338==>De-POP
DP119->R356,R1031,R336,R279,R1029==>De-POP
R328,R338==>POP

DP119_EN
EQ_CTL

14
15

VOD_CTL
PRECTL

31
33
1
7
21
32
37

IN 0(p)
IN 0(n)

VCC
VCC

4
24

IN 1(p)
IN 1(n)
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

EN
EQ_CTL
VOD_CTL
PRECTL
GND
GND
GND
GND
Thermal Pad(GND)

8
9
10
11
12
13
16
17
18
19
20
27
28
29
30
34
35
36

1

2

2
1
47K_0402_5%~D

3

S

1
R168

1

2
G

C265 1
C351 1

D

U46

+3.3V_RUN

2
2
2
2
2
2

40mil

USBP11_D-

USBP11_D+

54 DPD_GPU_LANE_P0
54 DPD_GPU_LANE_N0

1
1
1
1
1
1

+PWR_SRC

3

1
R457

PRTR5V0U2X_SOT143-4~D

R361
R328
@ R336
R338
R357
@ R356

Q17
FDC654P_SSOT6~D

USBP11_D+

S

USBP11-

1

G

18

USBP11+

3

29

USBP11+

1

DMIC0

18

C196
0.1U_0402_16V4Z~D

IO2

+CAMERA_VDD

29

D48
SD05.TCT_SOD323-2~D
2
1

D49
SD05.TCT_SOD323-2~D
2
1

BREATH_BLUE_LED 43
BATT_YELLOW_LED 43
BATT_BLUE_LED 43

DMIC_CLK

C200
0.1U_0402_16V4Z~D

IO1

3

Q15
PDTC124EU_SC70-3~D

C248
1000P_0402_50V7K~D

BREATH_BLUE_LED
BATT_YELLOW_LED
BATT_BLUE_LED

4

D

CAM_MIC_CBL_DET# 18

DMIC0

VCC

2

BAT54CW_SOT323-3~D

+CAMERA_VDD

DMIC_CLK

EN_LCDPWR

1

2

2

ALS_INT#

CAM_MIC_CBL_DET#
USBP11_D+
USBP11_D-

1
1

R165
10K_0402_5%~D

1

3

2

2
LCD_SMBCLK
LCD_SMBDAT

5

D3
39,53 ENVDD_GPU

1

0.1U_0603_50V4Z~D

2

2
1

+3.3V_RUN

+BL_PWR_SRC
C246 1

+15V_ALW

2

1

Close to JEDP1.18,19

I-PEX_20505-044E-011G

2

2

DPD_GPU_EDP_AUX 54
DPD_GPU_EDP_AUX# 54

@

USBP11_D-

1

+LCDVDD
LCD_TST
1
2
LCD_TST
39
R667
1K_0402_5%~D
DPD_GPU_EDP_HPD
DPD_GPU_EDP_HPD 53

C

@ U50
1 GND

+3.3V_RUN

6 2

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

SI3456BDV-T1-E3_TSOP6~D
+LCDVDD
+3.3V_ALW
6
4
5
2
1
R158
1
100K_0402_5%~D
C241
0.1U_0402_16V4Z~D
2

+15V_ALW
+LCDVDD

C242
0.1U_0402_25V4Z~D

C295 1
C314 1

+LCDVDD

+LCDVDD

Q13B
DMN66D0LDW-7_SOT363-6~D

MB_EDP_AUX
MB_EDP_AUX#

1
0_0402_5%~D
1
0_0402_5%~D

G

EDP_LANE_N0
EDP_LANE_P0

2
R180
1
2
2.2K_0402_5%~D @ R181
1
2.2K_0402_5%~D

S

LCD_SMBCLK
2
R548
LCD_SMBDAT
2
R549

D

LVDS_CBL_DET# 18

EDP_LANE_N1
EDP_LANE_P1

R162
100K_0402_5%~D

CONNTST
GND
LANE1_N
LANE1_P
GND
LANE0_N
LANE0_P
GND
AUX_CH_P
AUX_CH_N
GND
LCD_VCC
LCD_VCC
LCD_VCC
TEST
GND
HPD
BL_GND
BL_GND
BL_PWR
BL_PWR
BL_PWR
BL_PWR
BL_GND
BL_GND
BL_PWM
SMBUS_CLK
SMBUS_DATA
ALS_VCC
ALS_INT#
GND
CAM_MIC_CBL_DET#
USB+
USBUSB_VCC
MIC_CLK
MIC_GND
MIC_DAT
GND
PWR_LED
BATT2_LED
BATT1_LED
GND
CONNTST

R161
130_0402_5%~D

D

LVDS_CBL_DET#

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

MGND1
MGND2
MGND3
MGND4
MGND5
MGND6
MGND7
MGND8
MGND9
MGND10
MGND11
MGND12
MGND13

C244
0.1U_0402_16V4Z~D

45
46
47
48
49
50
51
52
53
54
55
56
57

Q12

2

40

FDC654P: P CHANNAL

EN_INVPWR

EN_INVPWR

Panel backlight power control by EC

VOD_CTL0

B

PUP5K
PDN5K

SN75DP119RHHR_QFN36_6X6~D

For Webcam

@

R995

1

2

0_0603_5%~D
+CAMERA_VDD
R997
0_0603_5%~D
2
1

D

+3.3V_RUN

VOD (mV)

2

Q132
PMV45EN_SOT23-3~D

1

G

300
+15V_ALW

1

1

2

S

1

C250
10U_1206_16V4Z~D

2

C249
0.1U_0402_16V4Z~D

1

Refer to SN75DP119RHHR rev. 0P35
+CAMERA_VDD_R 3

2

R169
100K_0402_5%~D

C1043
0.1U_0402_16V4Z~D

400

39

CCD_OFF

CCD_OFF

1

2

600
D

S

2
G

Q133
SSM3K7002FU_SC70-3~D

Webcam PWR CTRL

3

A

*

800

PRE (dB)

PRECTL

VOD_CTL

2.5

0

0

6

VCC/2

8.5

1

0

0

3.5

1

0

0

2
0

0
VCC/2

VCC/2

5.5

EQ gain (dB)
0

0

3

*

6

EQ_CTL
0
VCC/2
1

VCC/2
VCC/2

VCC/2

PWR Down

1

OUT2 DIS

1

1

MODE

1

* OUT1 OUT2 EN

DP119_EN
0
VCC/2

A

1

1

2

DELL CONFIDENTIAL/PROPRIETARY

C1044
0.1U_0402_25V4Z~D

Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

eDP & CAM Conn
Size
Date:

5

4

3

2

Document Number

Rev
0.1

LA-5573P
Thursday, January 21, 2010

Sheet
1

24

of

69

5

4

3

AUX/DDC SW for E-DOCK

D

2

1

+3.3V_RUN
2

D

1
C337
0.1U_0402_16V4Z~D

54 DPC_GPU_AUX/DDC

C272
0.1U_0402_10V7K~D
DPC_AUX_C
2
1

38 DPC_DOCK_AUX
54 DPC_GPU_AUX#/DDC

2
C274

38 DPC_DOCK_AUX#

U86
1
2

DPC_DOCK_AUX

3

DPC_AUX#_C
1
0.1U_0402_10V7K~D
DPC_DOCK_AUX#

BE0
A0

VCC
BE3

B0

A3

14
13
12

BE1
A1

6

B1

A2

9

7

GND

B2

8

B3
BE2

DPC_GPU_AUX/DDC 54

11
10

4
5

1

DPC_GPU_AUX#/DDC 54

R996

2

DPC_CA_DET
1M_0402_5%~D

PI3C3125LEX_TSSOP14~D

+5V_RUN

P

C

2

A
3

G

38 DPC_CA_DET

DPC_CA_DET

1

C277
0.1U_0402_16V4Z~D

5

1

NC

2

Y

4

C

DPC_CA_DET#

U8
NC7SZ04P5X_NL_SC70-5~D

B

B

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

DP SW
Size

Document Number

Rev
0.1

LA-5573P
Date:
5

4

3

2

Thursday, January 21, 2010

Sheet
1

25

of

69

2

1

Display port Dip Connector

2
1
R185
1
R186
1
R797

DPB_MB_HPD
DPB_MB_AUX#

MBDP_LANE_P3
MBDP_LANE_N2

DPB SW for MB & DOCK

MBDP_LANE_P2
MBDP_LANE_N1
U9

54 DPB_GPU_LANE_P1
54 DPB_GPU_LANE_N1

C309 2
C301 2

1 0.1U_0402_10V7K~D DPB_LANE_P1_C
1 0.1U_0402_10V7K~D DPB_LANE_N1_C

1
2

54 DPB_GPU_LANE_P2
54 DPB_GPU_LANE_N2

C315 2
C318 2

1 0.1U_0402_10V7K~D DPB_LANE_P2_C
1 0.1U_0402_10V7K~D DPB_LANE_N2_C

4
5

54 DPB_GPU_LANE_P3
54 DPB_GPU_LANE_N3

C338 2
C322 2

1 0.1U_0402_10V7K~D DPB_LANE_P3_C
1 0.1U_0402_10V7K~D DPB_LANE_N3_C

6
7

C90
C91

1 0.1U_0402_10V7K~D DPB_AUX_C
1 0.1U_0402_10V7K~D DPB_AUX#_C

8
9

54 DPB_GPU_AUX/DDC
54 DPB_GPU_AUX#/DDC

2
2

DPB_MB_HPD
DPB_DOCK_HPD

38 DPB_DOCK_HPD
1
C1597

DPB_AUX_C
2
100P_0402_50V8J~D
38 DPB_DOCK_CA_DET
DPB_AUX#_C
2
100P_0402_50V8J~D

DP_PRIORITY

35

OUT1_1P
OUT1_1N

IN_P2
IN_N2

OUT1_2P
OUT1_2N

IN_P3
IN_N3

OUT1_3P
OUT1_3N

IN_P4
IN_N4

OUT1_4P
OUT1_4N

AUXP_S
AUXN_S
HPD1
HPD2
CAD1
CAD2
SDA_S
SCL_S
HPDSEL

SCL1
SDA1

OUT2_1P
OUT2_1N
OUT2_2P
OUT2_2N
OUT2_3P
OUT2_3N
OUT2_4P
OUT2_4N

R190
100K_0402_5%~D

@PAD~D T30
@PAD~D T27

14
15

@PAD~D T28
@PAD~D T29

34
16

SCL2
SDA2

EQ_S0/SDA_CTL
OEB/SCL_CNTL
EQ_S1/I2C_Address
12C_CTL_EN

HPD_S

@PAD~D T37

54

@PAD~D T38
@PAD~D T39

52
53
44
31
20
3

+3.3V_RUN

2

1

2

C107
0.1U_0402_10V7K~D

2

1

C98
0.1U_0402_10V7K~D

1

C104
0.1U_0402_10V7K~D

2

C92
0.1U_0402_10V7K~D

1

DPB_MB_LANE_P0 C278
DPB_MB_LANE_N0 C279

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

MBDP_LANE_P0
MBDP_LANE_N0

30
29

DPB_MB_LANE_P1 C280
DPB_MB_LANE_N1 C281

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

MBDP_LANE_P1
MBDP_LANE_N1

25
24

DPB_MB_LANE_P2 C282
DPB_MB_LANE_N2 C283

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

MBDP_LANE_P2
MBDP_LANE_N2

22
21

DPB_MB_LANE_P3 C284
DPB_MB_LANE_N3 C285

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

MBDP_LANE_P3
MBDP_LANE_N3

19
18

DPB_MB_AUX
DPB_MB_AUX#

49
48

DPB_DOCK_P0
DPB_DOCK_N0

C286
C287

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

46
45

DPB_DOCK_P1
DPB_DOCK_N1

C288
C289

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

43
42

DPB_DOCK_P2
DPB_DOCK_N2

C290
C291

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

41
40

DPB_DOCK_P3
DPB_DOCK_N3

C292
C293

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

38
37

DPB_DOCK_AUX
DPB_DOCK_AUX#

12

DPB_GPU_HPD

CEC_S
CEC1
CEC2
VDD4
VDD3
VDD2
VDD1

MBDP_LANE_P1
MBDP_LANE_N0
MBDP_LANE_P0

21
22
23
24

GND
GND
GND
GND

MOLEX_105088-0001

DPB_DOCK_LANE_P0 38
DPB_DOCK_LANE_N0 38
DPB_DOCK_LANE_P1 38
DPB_DOCK_LANE_N1 38
DPB_DOCK_LANE_P2 38
DPB_DOCK_LANE_N2 38
DPB_DOCK_LANE_P3 38
DPB_DOCK_LANE_N3 38

DPB_DOCK_AUX 38
DPB_DOCK_AUX# 38
DPB_GPU_HPD 53
A

CAD_S

+3.3V_RUN

33
32

2

39 DP_PRIORITY

A

26
27
11
10

54 DPB_GPU_AUX#/DDC
54 DPB_GPU_AUX/DDC

Place C1597,C1598 close
to U9 pin8 & pin9

1

1
C1598

DPB_MB_CA_DET
DPB_DOCK_CA_DET

17
36

IN_P1
IN_N1

DP_PWR
RTN
HP_DET
AUX_CHGND
AUX_CH+
GND
CA_DET
LAN3LAN3_shield
LAN3+
LAN2LAN2_shield
LAN2+
LAN1LAN1_shield
LAN1+
LAN0LAN0_shield
LAN0+

P1_OC1
P1_OC0
P2_OC1
P2_OC0
Vbias
GND
GPAD

28

T25 PAD~D @

13
23

T33 PAD~D @
T34 PAD~D @

50
47

T35 PAD~D @

+3.3V_RUN
1

1 0.1U_0402_10V7K~D DPB_LANE_P0_C 55
1 0.1U_0402_10V7K~D DPB_LANE_N0_C 56

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

R1495
4.7K_0402_5%~D
2

C316 2
C312 2

2

JDP1

DPB_MB_AUX
DPB_MB_P14
DPB_MB_CA_DET
MBDP_LANE_N3

54 DPB_GPU_LANE_P0
54 DPB_GPU_LANE_N0

1

C1075
10U_0805_10V4Z~D

R1024

2

C275

2

B

0.1U_0402_10V7K~D

2

1

+VDISPLAY_VCC

1

DPB_DOCK_CA_DET
1M_0402_5%~D
DPB_MB_AUX
100K_0402_5%~D
2 DPB_MB_CA_DET
1M_0402_5%~D
2 DPB_MB_HPD
100K_0402_5%~D
2 DPB_MB_P14
5.1M_0603_1%~D

1
R1010

1

DPB_MB_AUX#
2
100K_0402_5%~D

1
R278

B

@

1

F1
1.5A_6V_1206L150PR~D

R184
0_1206_5%~D

+3.3V_RUN

2

+3.3V_RUN

51
39
57

PI3VDP8200ZBEX_TQFN56_8X8~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

Display port
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
1

Sheet

26

of

69

1

2
3

1
3

NC
+5V_RUN_CRT

1

1
3

2

2
1

2

R174
150_0402_1%~D
2
1

R173
150_0402_1%~D
2
1

2

+CRT_VCC

1

2

C254
1U_0402_6.3V6K~D

R172
150_0402_1%~D
2
1

D8
BAT1000-7-F_SOT23-3~D

R171
0_1206_5%~D

2

1

C253
2P_0402_50V8C~D

2

1

C252
2P_0402_50V8C~D

2

1

C251
2P_0402_50V8C~D

2

1

C996
12P_0402_50V8J~D

1

C518
12P_0402_50V8J~D

2

C390
12P_0402_50V8J~D

1

@ F2
5A_125V_R451005.MRL~D

BLUE_CRT

1
2
L61
27NH_LL1608-FSL27NJ_5%~D
1
2
L62
27NH_LL1608-FSL27NJ_5%~D
1
2
L63
27NH_LL1608-FSL27NJ_5%~D

+5V_RUN

@

1

RED_CRT
GREEN_CRT

3

2

+3.3V_RUN

@

2

@

D7
DA204U_SOT323-3~D

D6
DA204U_SOT323-3~D

D5
DA204U_SOT323-3~D

1

2

JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

R

+5V_RUN_SYNC
G
1
2

1
2

1
2

2

@ R176
1K_0402_5%~D

@ R175
1K_0402_5%~D

R793
2.2K_0402_5%~D

R794
2.2K_0402_5%~D

1

B

JVGA_HS
B
+CRT_VCC
JVGA_VS
M_ID2#

DAT_DDC2_CRT
CLK_DDC2_CRT

B

16
17

SUYIN_070546FR015H358ZR~D

1

HSYNC_CRT

1
R177

VSYNC_CRT

1
R178

L11
BLM18AG121SN1D_0603~D
2 HSYNC_L2 1
2
0_0402_5%~D

2
HSYNC_BUF

A

1

2

A
3

+3.3V_RUN

1

2

1

2

1

2

1

2

1

2

1

2

C264
0.1U_0402_16V4Z~D

APR/SPR

C263
0.1U_0402_16V4Z~D

A=B2

C262
0.1U_0402_16V4Z~D

MB

1

C261
0.1U_0402_16V4Z~D

Source

A=B1

C260
0.1U_0402_16V4Z~D

Chanel

0

C259
10U_0805_10V4Z~D

SEL1/SEL2

Y

HSYNC_CRT

4

U5
74AHCT1G125GW_SOT353-5~D
A

2

C270
0.1U_0402_16V4Z~D
VSYNC_BUF

PI3V712-AZLEX_TQFN32_6X3~D

2
1K_0402_5%~D

1

G

2

3

VSYNC_DOCK 38
HSYNC_DOCK 38
RED_DOCK
38
GREEN_DOCK 38
BLUE_DOCK 38
DAT_DDC2_DOCK 38
CLK_DDC2_DOCK 38

G

3
11
28
31
33

A

1
R179

OE#

VSYNC_DOCK
HSYNC_DOCK
RED_DOCK
GREEN_DOCK
BLUE_DOCK
DAT_DDC2_DOCK
CLK_DDC2_DOCK

+5V_RUN_SYNC

2

1

26
24
21
19
17
13
15

1

C269
0.1U_0402_16V4Z~D

5

GND
GND
GND
GND
GPAD

0B2
1B2
2B2
3B2
4B2
5B2
6B2

D9
SDM10U45-7_SOD523-2~D
1

SEL2

VSYNC_BUF
HSYNC_BUF
RED_CRT
GREEN_CRT
BLUE_CRT
DAT_DDC2_CRT
CLK_DDC2_CRT

OE#

30

27
25
22
20
18
12
14

P

CRT_SWITCH

+5V_RUN

4
16
23
29
32

5

39 CRT_SWITCH

VDD
VDD
VDD
VDD
VDD
0B1
1B1
2B1
3B1
4B1
5B1
6B1

A5
A6

2

@

P

9
10

53 GPU_CRT_DAT_DDC
53 GPU_CRT_CLK_DDC

SEL1

1

C268
12P_0402_50V8J~D

8

A0
A1
A2
A3
A4

@

+3.3V_RUN

U131
1
2
5
6
7

C267
12P_0402_50V8J~D

2

53 GPU_CRT_VSYNC
53 GPU_CRT_HSYNC
53 GPU_CRT_RED
53 GPU_CRT_GRN
53 GPU_CRT_BLU

0.1U_0402_16V4Z~D

2 VSYNC_L2 1
2
0_0402_5%~D
L12
BLM18AG121SN1D_0603~D

1

VGA SW for MB/DOCK

C258
2

Y

VSYNC_CRT

4

U6
74AHCT1G125GW_SOT353-5~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

CRT/Video switch
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
1

Sheet

27

of

69

3

2

1

+5VMOD Source
+15V_ALW

1 0.01U_0402_16V7K~D

SATA_ODD_PRX_DTX_P1

5
14
15

GND1
GND2

Q31A
DMN66D0LDW-7_SOT363-6~D

TYCO_2-1759838-8
39

2

MODC_EN

1

1

Pleace near ODD CONN

R319
100K_0402_5%~D

1

2

+5V_MOD

+5V_RUN
PJP15

1

2

1

2

@ PAD-OPEN 4x4m

2

Main SATA +5V Default

S

R318
100K_0402_5%~D

2
10K_0402_5%~D

DP
+5V
+5V
MD
GND
GND

D

Q29
SI3456BDV-T1-E3_TSOP6~D

3

C379
10U_0805_10V4Z~D

1
R1239

+3.3V_RUN

8
9
10
11
12
13

+5V_MOD

3

ODD_DET#

ODD_DET#

D
G
2 MOD_EN

C378
0.1U_0603_50V4Z~D

40

R316
100K_0402_5%~D

R317
100K_0402_5%~D

1

C375 2

GND
RX+
RXGND
TXTX+
GND

2

SATA_ODD_PRX_DTX_N1

1

SATA_ODD_PTX_DRX_P1
SATA_ODD_PTX_DRX_N1

1 0.01U_0402_16V7K~D

4

15 SATA_ODD_PRX_DTX_P1_C

1 0.01U_0402_16V7K~D
1 0.01U_0402_16V7K~D

C374 2

+5V_ALW

Q31B
DMN66D0LDW-7_SOT363-6~D

2

15 SATA_ODD_PRX_DTX_N1_C

C311 2
C310 2

2

1

C377
0.1U_0402_16V4Z~D

2

C376
1000P_0402_50V7K~D

1

15 SATA_ODD_PTX_DRX_P1_C
15 SATA_ODD_PTX_DRX_N1_C

+3.3V_ALW2

6

+5V_MOD

D

1
2
3
4
5
6
7

1

JSATA1

2

For ODD

1
2
5
6

4

4

5

+3.3V_RUN

PSATA_PRX_DTX_P0_C

2
C1382

PSATA_PRX_DTX_N0_C

15 PSATA_PRX_DTX_N0_C

2

5
4
3
13
17
18
19
21

RX_1P
RX_1N
TX_2P
TX_2N

PE1
PE2

GND
GND
GND
GND
GND
PAD

TX_1P
TX_1N
RX_2N
RX_2P

2

2
1

1

C

9
8
15
14

PSATA_PTX_DRX_P0_RP
PSATA_PTX_DRX_N0_RP

12
11

PSATA_PRX_DTX_N0_RP
PSATA_PRX_DTX_P0_RP
R1303
0_0402_5%~D
2
1
2
1

C1385

1
2

2

0_0402_5%~D

1

6
10
16
20

0_0402_5%~D

1

2
C324

15 PSATA_PRX_DTX_P0_C

PSATA_PTX_DRX_P0
0.01U_0402_16V7K~D
PSATA_PTX_DRX_N0
0.01U_0402_16V7K~D
1 PSATA_PRX_DTX_P0
0.01U_0402_16V7K~D
1 PSATA_PRX_DTX_N0
0.01U_0402_16V7K~D

2
C323

PSATA_PTX_DRX_N0_C

15 PSATA_PTX_DRX_N0_C

VCC
VCC
VCC
VCC

R1305

PSATA_PTX_DRX_P0_C

15 PSATA_PTX_DRX_P0_C
C

EN

@

R1308

2
U96

7

1

C1384
0.1U_0402_16V4Z~D

1

C1383
0.01U_0402_16V7K~D

HDD Repeater

SN75LVCP412ARTJR_QFN20_4X4~D

@

Free Fall Sensor

+3.3V_RUN

R1304
0_0402_5%~D

HDD PWR
+5V_ALW

1

2

DE351DLTR8_LGA14_3X5~D

39

Disconnect to EC SSMBUS trace,
add R1534/1535

For HDD Temp.

2

HDDC_EN

R323
100K_0402_5%~D

2

1
2
5
6
1

2

+5V_RUN
PJP16

1
1

3

4
1

+5V_HDD

2

Q34A
DMN66D0LDW-7_SOT363-6~D

4

+3.3V_RUN

Q32
SI3456BDV-T1-E3_TSOP6~D

3
S

5
3
11

G
HDD_EN_5V

R322
100K_0402_5%~D

7

SDO
SDA / SDI / SDO
SCL / SPC
RSVD
CS
RSVD

D

R321
100K_0402_5%~D

C383
10U_0805_10V4Z~D

12
13
14

INT 1
INT 2

2
4
5
10

C382
0.1U_0603_50V4Z~D

HDD_SMBDAT_R
2
20_0402_5%~D HDD_SMBCLK_R
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D

1
R1528
1
R1529

13,14,15,16 DDR_XDP_SMBCLK

8
9

GND
GND
GND
GND

Q34B
DMN66D0LDW-7_SOT363-6~D

HDD_FALL_INT
FFS_INT2

VDD_IO
VDD

2

1
6

1
@ R1534 1
@ R1535

40 HDD_SMBDAT
40 HDD_SMBCLK

B

R320
100K_0402_5%~D

DE351DLTR

18,40 HDD_FALL_INT

3,14,15,16 DDR_XDP_SMBDAT

1

+3.3V_ALW2
U139

6

2

1

1

1

2

C436
0.1U_0402_16V4Z~D

C435
10U_0805_10V4Z~D

1

+15V_ALW

2

@ PAD-OPEN 4x4m

B

Open

+5V_HDD Source

1
R445
1
R463

HDD_SMBDAT_R
2
2.2K_0402_5%~D
HDD_SMBCLK_R
2
2.2K_0402_5%~D

PSATA_PTX_DRX_P0_RP
PSATA_PTX_DRX_N0_RP

C308 2
C307 2

1 0.01U_0402_16V7K~D
1 0.01U_0402_16V7K~D

SATA_PTX_DRX_P0
SATA_PTX_DRX_N0

PSATA_PRX_DTX_N0_RP
PSATA_PRX_DTX_P0_RP

2
C380 2
C381

1
1 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

+5V_HDD

+3.3V_RUN

HDD_DET#

1

15

HDD_DET#
+5V_HDD

FFS_INT2_Q

2

G

2

@ R329
100K_0402_5%~D

FFS_INT2

3

1
D

A

FFS_INT2

S

19

1

2

D10
Q118
SDM10U45-7_SOD523-2~D
SSM3K7002FU_SC70-3~D

FFS_INT2_Q

+5V_HDD

2

JSATA2
+3.3V_RUN

GND
RX+
RXGND
TXTX+
GND
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
Reserved
GND
12V
12V
12V

GND1
GND2

23
24

FOX_LD2122H-S4SL6_RV
A

1

2

C385
0.1U_0402_16V4Z~D

2

C384
1000P_0402_50V7K~D

1

Main SATA +5V Default

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

Pleace near HDD CONN
5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3

2

ODD/HDD CONNECTOR
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

28

of

69

2

1

Speaker Connector

1
2
@ D1

V I/O

6

2

Ground V BUS

5

3

V I/O

4

V I/O

2

INT_SPK_L+
+5V_RUN

1

INT_SPK_L-

11

HDA_RST#

2
4
46

@

48
1
R1296

+3.3V_RUN
39 AUD_NB_MUTE

2
10K_0402_5%~D

47

35

HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT_A_or_F

DMIC_CLK/GPIO1
DMIC0/GPIO2

HP1_PORT_B_L
HP1_PORT_B_R

31
32

PORT_C_L
PORT_C_R
VREFOUT_C

19
20
24

SPKR_PORT_D_L+
SPKR_PORT_D_L-

DMIC1/GPIO0/SPDIF_OUT_1
SPKR_PORT_D_RSPKR_PORT_D_R+

SPDIF_OUT_0
EAPD

PORT_E_L
PORT_E_R
PORT_F_L
PORT_F_R

CAP-

1
36
C453
4.7U_0603_6.3V6M~D

7
33
30
26
42

Close to U16 pin5

Close to U16 pin6
49

2

+3.3V_RUN

AUD_HP_OUT_L 37
AUD_HP_OUT_R 37

INT_SPK_L+
INT_SPK_L-

40
41

C1894 1

CAP2

PVSS

V-

DAP

VREG

R18
0_0402_5%~D
1
2
XTALI_12MHZ

1

DAI_GPU_R3P_SMBDAT 9
I2S_LRCLK

3

6

GPAD

33
1

X4

4

VDD ST/OE

1

3

OUT

2

GND

12MHZ_15PF_SIT8102ACL3333E12T~D

2 1U_0603_10V6K~D
2 1U_0603_10V6K~D

B

Close pin 32
+1.8V_RUN

DVSS

TLV320AIC3004IRHBR_QFN32_5X5~D

DAI_GPU_R3P_SMBCLK

DAI_GPU_R3P_SMBDAT

1

2

DAI_GPU_R3P_SMBCLK

23,40,53

DAI_GPU_R3P_SMBDAT

23,40,53

1
10M_0402_5%~D

@ R1090
C410
1
1
C411

1U_0603_10V6K~D
2 AUD_DOCK_HP_L_C
2 AUD_DOCK_HP_R_C
1U_0603_10V6K~D

DOCK_MIC_IN_L_C
DOCK_MIC_IN_R_C

R1091 1
R1092 1

2 2K_0402_1%~D
2 2K_0402_1%~D

1
10M_0402_5%~D

AUD_DOCK_MIC_IN_L_R
AUD_DOCK_MIC_IN_R_R

22

CAP2

C1896 1
C1897 1

21

VREFFILT

2

1

2

1

C389

0.1U_0402_16V4Z~D

C394

0.1U_0402_16V4Z~D

2
R327
2
R828

2 1000P_0402_50V7K~D
2 1000P_0402_50V7K~D

1
510K_0402_5%~D
1
510K_0402_5%~D

SPKR

15

BEEP

40

34

Resistor

37

SENSE_A

SENSE_B

1

Pull-up to AVDD

@

U17

16

Place closely to Pin 34
AUD_SENSE_B

37,39
39 DOCK_HP_DET

1
2

2

2

DAI_BCLK#

38

2Y#

5

DAI_LRCK#

38

I2S_DO

6

7

DAI_DO#

38

9

DAI_12MHZ#

38

10
12
14

+3.3V_RUN

2

1
R345
1K_0402_5%~D

R354
100K_0402_5%~D

3

3

2A

XTALI_12MHZ

39 EN_I2S_NB_CODEC#

2

1Y#

4

1
15

3A

3Y#

4A

4Y#

5A
6A
OE1#
OE2#

5Y#
6Y#

11

GND

A

+3.3V_RUN
I2S_DI#

13
8

D20
DA204U_SOT323-3~D

@
CD74HC366M96_SO16~D

2

3

1
2
2

Q40A
DMN66D0LDW-7_SOT363-6~D

5
4

AUD_HP_NB_SENSE

6

2

2
4

1

5
Q38B
DMN66D0LDW-7_SOT363-6~D

1

1

1

1
2

2
6

3

1
1
2

2
Q38A
DMN66D0LDW-7_SOT363-6~D

1

C420
1000P_0402_50V7K~D

R355
100K_0402_5%~D

R351
20K_0402_1%~D

+3.3V_RUN

R352
39.2K_0402_1%~D

2

+3.3V_RUN

R353
100K_0402_5%~D

R349
20K_0402_1%~D

R348
39.2K_0402_1%~D

R350
100K_0402_5%~D

1

C417
1000P_0402_50V7K~D

+3.3V_RUN

3

1A

I2S_LRCLK

1

AUD_SENSE_A

R347
2.49K_0402_1%~D
2
1

@

2

+VDDA_AVDD

1

R346
2.49K_0402_1%~D
2
1

Place closely to Pin 13.

VCC

@

I2S_BCLK
+VDDA_AVDD

A

@

1

2.49K

2

SPDIFOUT1 (DMIC0)

1

SPDIFOUT0

2

5.11K

2

DMIC0

D55
DA204U_SOT323-3~D

PORT C

+3.3V_RUN

D19
DA204U_SOT323-3~D

10K

+3.3V_RUN

D18
DA204U_SOT323-3~D

PORT F

3

2

PORT B (HP1)

3

2

20K

1

2

1

D17
DA204U_SOT323-3~D

2

2
@ C412
@C412
10P_0402_50V8J~D

1

PORT E

2

1
@C416
@C416
0.1U_0402_10V7K~D

1

PORT A (HP0)

3

2

1

39.2K

1

1

92HD81B1B5NLGXUAX8_QFN48_7X7~D

C413
0.1U_0402_16V7K~D

1

37 AUD_MIC_SWITCH

WCLK

2

AUD_DOCK_HP_L_R
AUD_DOCK_HP_R_R

AUD_PC_BEEP

VREFFILT

RESET#

DAI_GPU_R3P_SMBCLK 8

2

25

DVSS
AVSS
AVSS
AVSS

LINEL
LINER

31

RST#

1

2
@R1089
@
R1089
C408 1
C409 1

21

10
12

AUD_DOCK_MIC_IN_L
AUD_DOCK_MIC_IN_R

12

17
26

DRVSS

BCLK
DIN
MCLK

AUD_DOCK_HP_L_C
AUD_DOCK_HP_R_C

2 1000P_0402_50V7K~D

R340 2K_0402_1%~D
1
2
1
2
R342 2K_0402_1%~D

AUD_DOCK_HP_OUT_L
AUD_DOCK_HP_OUT_R

AVSS1
AVSS2

SDA

2
4
1

2 1000P_0402_50V7K~D

C1895 1

INT_SPK_RINT_SPK_R+

15
16
17
18

SCL

I2S_BCLK
I2S_DI#
XTALI_12MHZ

2
43
44

20
19
22
23
28
11
13
14
16
15
30

IOVDD

2

AUD_EXT_MIC_L 37
AUD_EXT_MIC_R 37
+VREFOUT

@ R343
@R343
10_0402_5%~D

2

@ R344
@R344
47_0402_5%~D

2

2

1

2

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

DVDD

7

I2S_DO
AUD_DOCK_MIC_IN_L_R
AUD_DOCK_MIC_IN_R_R

5
27
29

PCH_AZ_CODEC_BITCLK

1

PCH_AZ_CODEC_SDOUT

PC_BEEP
CAP+
MONO_OUT

2

28
29
23

1

C415
1U_0603_10V6K~D

2

HDA_SYNC

C414
10U_0805_10V6K~D

1

2

HDA_SDO

10

AUD_SENSE_A
AUD_SENSE_B

C455
4.7U_0603_6.3V6M~D

1

HDA_SDI

5

13
14

1

2

C457
4.7U_0603_6.3V6M~D

C676
150P_0402_50V8J~D

DMIC0

C679
150P_0402_50V8J~D

24

8

SENSE_A
SENSE_B

2

@

DOUT
LEFT_LO
RIGHT_LO

DRVDD
DRVDD

C459
1U_0603_10V6K~D

L4
BLM18BB221SN1D_2P~D
1
2 DMIC_CLK_R

DMIC_CLK

HDA_BITCLK

2

1

@

AVDD

C430
0.1U_0402_10V7K~D

24

6

PVDD
PVDD

39
45

2

C1067
4700P_0402_25V7K~D

PCH_AZ_CODEC_RST#

15 PCH_AZ_CODEC_RST#

DVDD_IO

27
38

C432
0.1U_0402_10V7K~D

15 PCH_AZ_CODEC_SYNC

3

AVDD
AVDD

1

1
2
BLM21PG600SN1D_0805~D
C400
10U_0805_10V6K~D

PCH_AZ_CODEC_SDOUT

15 PCH_AZ_CODEC_SDOUT

DVDD

+VDDA_PVDD
C456
1U_0603_10V6K~D

1
R332

15 PCH_AZ_CODEC_SDIN0

PCH_AC_SDIN0_R
2
33_0402_5%~D

DVDD_CORE

9

25

32

+1.8V_RUN

L3

C401
0.1U_0402_10V7K~D

PCH_AZ_CODEC_BITCLK

15 PCH_AZ_CODEC_BITCLK

1

U15
+3.3V_RUN_I2S_VDD

+3.3V_RUN_IOVDD

C1066
4700P_0402_25V7K~D

2

1

C454
1U_0603_10V6K~D

2

U16

C399
0.1U_0402_10V7K~D

2

1

C403
10U_0805_10V6K~D

1

C404
0.1U_0402_10V7K~D

C402
1U_0603_10V6K~D

2

C405
0.1U_0402_10V7K~D

1

1

2

+5V_RUN
L77
BLM21PG600SN1D_0805~D
+VDDA_AVDD
1
2

+CODEC_DVDD_CORE

1

2

L18
BLM18EG601SN1D_2P~D
1
2

+3.3V_RUN

+3.3V_RUN

B

2

1

18
24

IP4223CZ6_SO6~D
+3.3V_RUN

1

C393
1U_0603_10V6K~D

V I/O

2

1

C392
0.1U_0402_10V7K~D

INT_SPK_R-

1

2

1

C463
1U_0603_10V6K~D

Place close to JSPK1

2

1

C431
0.1U_0402_10V7K~D

2

2

1

Close pin 25

C397
1U_0603_10V6K~D

1

TYCO_1775765-6~D

INT_SPK_R+

1

RST#

1
2
@R50
@
R50
33_0402_5%~D

C398
0.1U_0402_10V7K~D

2

PCH_AZ_CODEC_RST#

GND
GND

Close pin 18

C428
10U_0805_10V6K~D

2

1

@ C426
100P_0402_50V8J~D

1

@ C425
100P_0402_50V8J~D

2

@ C424
100P_0402_50V8J~D

@ C423
100P_0402_50V8J~D

2

1

Close pin 24
2
1
L70
47UH_CBMF1608T470K_10%~D

C433
0.1U_0402_10V7K~D

7
8

R365
100K_0402_5%~D

C458
1U_0603_10V6K~D

19 SPEAKER_DET#

+3.3V_RUN

1
2
3
4
5
6

C429
0.1U_0402_10V7K~D

1
2
3
4
5
6

INT_SPK_L+
INT_SPK_LINT_SPK_R+
INT_SPK_R-

1

+3.3V_RUN

JSPK1

15 mils trace

DAI_DI
DOCK_MIC_DET

38

39

Q40B
DMN66D0LDW-7_SOT363-6~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

Azalia (HD) Codec
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
1

Sheet

29

of

69

5

4

3

2

1

1
R371
0_1210_5%~D

2

R699
10K_0402_5%~D

1

+1.05V_M for VC10 not the
correct or complete
implementation to connect to
+1.05V SVR.

1

Trace=12mil
REGCTL_PNP10

LAN_DISABLE#_R

1
2
R42
0_0402_5%~D

3

4

+3.3V_LAN_OUT

15
19
29

+3.3V_LAN_OUT_R

LED0
LED1
LED2

TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK

32
34
33
35

JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCK

LED

1

26
27
25

T176
T177

C427
10P_0402_50V8J~D
1
2

C

9
10

XTAL_OUT
XTAL_IN

LAN_TEST_EN

30

TEST_EN

RES_BIAS

12

RBIAS

2
1
R1200
3.01K_0402_1%~D

1

2
1
R59
1K_0402_5%~D

1

2

C476
33P_0402_50V8J~D

2

C475
33P_0402_50V8J~D

Y2
25MHZ_18PF_1Y725000CE1A~D
1
2

XTALO
XTALI

JTAG

PAD~D @
PAD~D @

VDD3P3_15
VDD3P3_19
VDD3P3_29

1 3.01K_0402_1%~D
1
3.01K_0402_1%~D

1
R693
0_0603_5%~D

+1.0V_LAN

R694
0_0603_5%~D
2
1

VDD1P0_43

43

+1.0V_LAN_3

R695 2

1 0_0603_5%~D

VDD1P0_11

11

+1.0V_LAN_2

R696 2

1 0_0603_5%~D

VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8

40
22
16
8

+1.0V_LAN

1

2

1

2

1

2

1

2

1

2

@ R119
0_0805_5%~D
1
2

C

REGCTL_PNP10
+1.0V_LAN_2

49

+1.0V_LAN_3

WG82577LM-SLGWR-A3_QFN48_6X6~D
1

2

R1200 Resistor Value:
3.01 kohm for Hanksville-M LOM
2.37 kohm for Hanksville-D LOM

+1.0V_LAN_4

1

2

1

2

1

2

+3.3V_M

2

Need to verify A3 silicon drive
power before removing C427
KDS crystal vender verify
driving level in A3

2

C786
1U_0603_10V6K~D

+1.0V_LAN_4

+1.05V_M

+1.0V_LAN

1

47
46
37

7

D

Q45
DCP69A-13_SOT223-3~D

+3.3V_LAN

VDD1P0_47
VDD1P0_46
VDD1P0_37

CTRL_1P0

2

1
2

2

VSS_EPAD

1

2
4

VDD3P3_OUT

2

@ R56
10K_0402_5%~D

+RSVD_VCC3P3_1 R70 2
+RSVD_VCC3P3_2
2
R1291

1
2
5

LAN_DISABLE_N

LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#

2

1

6

RSVD_VCC3P3_1
RSVD_VCC3P3_2
VDD3P3_IN

39 LAN_DISABLE#_R

1

C803
0.1U_0402_10V7K~D

2

SMBus Device Address 0xC8

VCT

1
2
R73
0_0402_5%~D

C800
0.1U_0402_10V7K~D

SMB_CLK
SMB_DATA

C477
0.1U_0402_10V7K~D

28
31

+3.3V_LAN_R
Trace=12mil

C474
10U_0805_10V4Z~D

19 PM_LANPHY_ENABLE

LAN_SMBCLK
LAN_SMBDATA

16 LAN_SMBCLK
16 LAN_SMBDATA

SMBUS

R44
10K_0402_5%~D

2

LAN_TX3+
LAN_TX3-

2

3

23
24

1

C1118
0.01U_0402_16V7K~D

LAN_TX2+
LAN_TX2-

2

20
21

R72
4.99K_0402_1%~D

C480
0.1U_0402_10V7K~D

MDI_PLUS3
MDI_MINUS3

LAN_TX1+
LAN_TX1-

C802
0.1U_0402_10V7K~D

PERp
PERn

MDI_PLUS2
MDI_MINUS2

17
18

C479
0.1U_0402_10V7K~D

41
42

PETp
PETn

LAN_TX0+
LAN_TX0-

C801
0.1U_0402_10V7K~D

38
39

MDI_PLUS1
MDI_MINUS1

13
14

C478
0.1U_0402_10V7K~D

1 PCIE_PRX_GLANTX_P6_C
0.1U_0402_10V7K~D
1 PCIE_PRX_GLANTX_N6_C
0.1U_0402_10V7K~D

PE_CLKP
PE_CLKN

MDI

44
45

MDI_PLUS0
MDI_MINUS0

1

16 PCIE_PRX_GLANTX_N6
16 PCIE_PTX_GLANRX_P6_C
16 PCIE_PTX_GLANRX_N6_C

CLK_PCIE_LAN
CLK_PCIE_LAN#

CLK_REQ_N
PE_RST_N

PCIE

2
C451
2
C452

16 PCIE_PRX_GLANTX_P6
+3.3V_LAN

48
36

2

C466
4.7U_0603_6.3V6M~D

16 CLK_PCIE_LAN
16 CLK_PCIE_LAN#

LANCLK_REQ#

2

C465
4.7U_0603_6.3V6M~D

15,16 LANCLK_REQ#
18 PLTRST_LAN#

D

1

U79

1

C806
0.1U_0402_10V7K~D

TP_LAN_JTAG_TMS
2
10K_0402_5%~D
TP_LAN_JTAG_TCK
2
10K_0402_5%~D

1
@R75
@
R75
1
@R76
@
R76

R370
0_1210_5%~D
1
2

C805
10U_0805_6.3V6M~D

+3.3V_LAN
+3.3V_RUN

C804
0.1U_0402_10V7K~D

+3.3V_LAN

@ R373
0_1210_5%~D

+3.3V_LAN
1
13
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#

FROM NIC

DOCKED

DOCK_LOM_TRD1+
DOCK_LOM_TRD1-

27
26

DOCK_LOM_TRD2+
DOCK_LOM_TRD2-

SEL

C2+
C2-

LEDA0
LEDA1
LEDA2

C3+
C3-

23
22

DOCK_LOM_TRD3+
DOCK_LOM_TRD3-

LEDC0
LEDC1
LEDC2

19
20
40

DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#

PD

DOCK_LOM_TRD0+ 38
DOCK_LOM_TRD0- 38

17,39 SIO_SLP_LAN#

R2
0_0402_5%~D
1
2

2

1
2
@R47
@
R47
0_0402_5%~D

DOCK_LOM_TRD1+ 38
DOCK_LOM_TRD1- 38
DOCK_LOM_TRD2+ 38
DOCK_LOM_TRD2- 38

D
1

2

S

2

+3.3V_LAN

DOCK_LOM_TRD3+ 38
DOCK_LOM_TRD3- 38

A

DOCK_LOM_ACTLED_YEL# 38
DOCK_LOM_SPD100LED_ORG# 38
DOCK_LOM_SPD10LED_GRN# 38

@

PAD_GND
2

1: TO DOCK
0: TO RJ45

G

32
31

AUX_ON

TO
DOCK

PI3L720ZHEX_TQFN42_9X3P5~D

@

R394
10K_0402_5%~D

43

C1+
C1-

DOCK_LOM_TRD0+
DOCK_LOM_TRD0-

40

R393
10K_0402_5%~D

5

A3-

36
35

LAN_ACTLED_YEL# 37
LED_100_ORG# 37
LED_10_GRN# 37

R392
10K_0402_5%~D

Layout Notice : Place bead as
close PI3L500 as possible

15
16
42

C0+
C0-

5

SW_LAN_TX3+ 37
SW_LAN_TX3- 37

2

ENAB_3VLAN

1

@

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

LOM_ACTLED_YEL#
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#

Intel Intel 82577/82578 (Hanksville) / LAN SW
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
5

4

C481
0.1U_0402_10V7K~D

12

A3+

LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#

SW_LAN_TX2+ 37
SW_LAN_TX2- 37

C482
10U_0805_6.3V6M~D

LAN_TX3-R

DOCKED

A2-

17
18
41

3

11

LEDB0
LEDB1
LEDB2

2

10

LAN_TX3+R

A2+

SW_LAN_TX3+
SW_LAN_TX3-

3

LAN_TX2-R

LAN_TX3+ 1
2
L26
22NH_0603CS-220EJTS_5%~D
LAN_TX31
2
L27
22NH_0603CS-220EJTS_5%~D

B3+
B3-

SW_LAN_TX2+
SW_LAN_TX2-

25
24

4

9

A1-

29
28

1

1

LAN_TX2+R

B2+
B2-

R1311
100K_0402_5%~D

SW_LAN_TX1+ 37
SW_LAN_TX1- 37
2

LAN_TX2+ 1
2
L24
22NH_0603CS-220EJTS_5%~D
LAN_TX21
2
L25
22NH_0603CS-220EJTS_5%~D

A1+

SW_LAN_TX1+
SW_LAN_TX1-

6

7

34
33

1

6

LAN_TX1-R

B1+
B1-

1

LAN_TX1+R

A0-

R1310
100K_0402_5%~D

SW_LAN_TX0+ 37
SW_LAN_TX0- 37

2

LAN_TX1+ 1
2
L22
22NH_0603CS-220EJTS_5%~D
LAN_TX11
2
L23
22NH_0603CS-220EJTS_5%~D

A0+

SW_LAN_TX0+
SW_LAN_TX0-

1

3

38
37

2

LAN_TX0-R

B0+
B0-

4

C1414
2200P_0402_50V7K~D

2

Q184B
DMN66D0LDW-7_SOT363-6~D

A

DOCKED

LAN_TX0+R

B

6
5
2
1

1

+3.3V_ALW2

Q184A
DMN66D0LDW-7_SOT363-6~D

39

LAN_TX0+ 1
2
L20
22NH_0603CS-220EJTS_5%~D
LAN_TX01
2
L21
22NH_0603CS-220EJTS_5%~D

+3.3V_LAN

SI3456BDV-T1-E3_TSOP6~D
+15V_ALW

1

U25

Q2

+3.3V_ALW

LAN ANALOG
SWITCH
39
30
21
14
8
4
1

1

VDD
VDD
VDD
VDD
VDD
VDD
VDD

1

2

C462
0.1U_0402_16V4Z~D

2

C461
0.1U_0402_16V4Z~D

1

B

C460
0.1U_0402_16V4Z~D

2

3

2

Sheet
1

30

of

69

5

4

SC_TEST

BCM5882_SCCLK
AUX1UC
BCM5882_GPIO25
BCM5882_GPIO26
BCM5882_SCDET
BCM5882_IO
BCM5882_SCRST

2

2

0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

UART_RX/GPIO0
R894
0_0402_5%~D
1
2

1

1
1
1
1
1
1
1

1
1
3

2
1

2
1

1

2

1

CLKOUT

D3

CLKOUT

RSTOUT_N

C1

SPI_RST

POR_MONITOR

J13

POR_MONITOR
SWV
PLL_TESTOUT

E3

SCANACCMODE

E2

SECURE_BOOT

USH_TESTMODE

D1

TESTMODE

SWV

K11

J14

POR_EXTR

PLL_TESTOUT

C13

HF_RX_TEST0
R907
0_0402_5%~D
1
2

UART_TX/GPIO1

CONTACTLESS_DET#
SCC_CMDVCC_N_R
BCM5882_GPIO15
CLKDIV2

SBOOT

POR_EXTR

D

GPIO_4
GPIO_14
GPIO_15
GPIO_16

SCANACCMODE

2

T156 PAD~D
T155 PAD~D

T157 PAD~D

HF_RX_TEST2
R908
0_0402_5%~D
1
2

BCM5882KFBG-ES-B0_FBGA196~D

HF_RX_TEST1
2 0_0402_5%~D
2 0_0402_5%~D

+2.5V_ALW_AVDD

1

T154 PAD~D

HF_RX_TEST3

2
1 SCC_CMDVCC_N
0_0402_5%~D

2

1

U32C

RFTAG_VRXP
RFTAG_VRXN

BCM5882
A6
B6

HF_RFIDTAG_VRX_P
HF_RFIDTAG_VRX_N

HF_TX_P
HF_TX_N

A8
B8

RFREADER_TXP1
RFREADER_TXN1

C5

HF_RFIDTAG_VTX

HF_RX_P
HF_RX_N

A10
B10

RFREADER_RXP
RFREADER_RXN

HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3

B9
C9
C10
E9

HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3

HF_TX_AVDD1P2
HF_RX_AVDD1P2
HF_RX_ADC_AVDD1P2

D7
F8
D10

+RFID_AVDD1P2

HF_RX_AVDD2P5
HF_TX_AVDD2P5

F9
A7

+RFID_AVDD2P5

HF_TX_AVDD3P3_D8
HF_TX_AVDD3P3_B7

D8
B7

+RFID_AVDD3P3

HF_TX_AVSS_C7
HF_TX_AVSS_C8
HF_TX_AVSS_E7

C7
C8
E7

C595 should be placed
closer to pin A5
2

1

1

2

1

2

1
C595

A5
2
0.01U_0402_25V7K~D
B4

+1.2V_ALW_AVDD
+2.5V_ALW_AVDD

SBOOT
POR_EXTR

+3.3V_ALW

CLK
UART

2
G

Smart Card

PAD~D T158

C1177
10U_0603_6.3V6M~D

C609
15P_0402_50V8J~D

2

L14
J1
D2
C2
B1

R775

+1.2V_ALW_AVDD

BCM5882KFBG-ES-B0_FBGA196~D

1

2

2
2
2
2
2
2
2
+SC_PWR

C1021
4.7U_0603_6.3V6M~D

27.12MHZ_12PF_1N227120CC0B~D
C608
12P_0402_50V8J~D

1

LPC
SPI
SM BUS
Smard Card

ALDO_PWRDN

All XTAL components and traces should be
placed/layout on top layer. The gnd/pwr
layer below will provide shielding from
27.12Mhz interference which might affect
cellular certification.

OVSTB

37

@

CORE_PWRDN

R472
R533
R767
R766
R774
R608
R771

R497 1
R496 1

XO

E1

FP_RESET#

CLKDIV1

@

P1
E12

M11
M12
F2
F1
M2
L11
M10
N14
P14
L10

SC_CLK
SC_FCB
SC_SEL5V_GPIO_25
SC_SEL18V_GPIO_26
SC_DET
SC_IO
SC_RST
SC_PWR_N14
SC_PWR_P14
SC_VCC

C606
1U_0402_6.3V6K~D

GND

4

JTAG_RST#_USH
R897
0_0402_5%~D
1
2

C605
1U_0402_6.3V6K~D

3

JTAG_TMS_USH

OVSTB

UART_TX/GPIO1
UART_RX/GPIO0

@

IDDQ_EN

JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRSTN
JTCE

@

WAKEUP_N

K1

JTCE_USH

@R1501
@
R1501
1K_0402_5%~D

L7

JTAG_TDO_USH
R896
0_0402_5%~D
1
2

T145PAD~D
T148PAD~D
T149PAD~D
T150PAD~D

L1
M1
N1
N2
L3
L2

NC
JTAG_CLK_USH
JTAG_TDI_USH
JTAG_TDO_USH
JTAG_TMS_USH
JTAG_RST#_USH

JTAG

2

D

S

BCMGPIO_10
BCMGPIO_11
BCMGPIO_12
BCMGPIO_13

RST_N

D4
C4
B3
A3

UART_TX_GPIO_1
UART_RX_GPIO_0
UART_CTS_GPIO_2
UART_RTS_GPIO_3

@

C3
B2
A2
A1

R476
5.1M_0402_5%~D

2

GND

OUT

REFCLK_XTALIN
REFCLK_XTALOUT

G1

JTCE_USH

R485
4.7K_0402_5%~D

1

SSP_CLK1_GPIO_10
SSP_FSS1_GPIO_11
SSP_RXD1_GPIO_12
SSP_TXD1_GPIO_13

+3.3V_ALW

IN

BCM5882
G14
F14

@

SMBCLK
SMBDAT
SMBALERT_N
SMB_GPIO_0
SMB_GPIO_1

Y3

2

SPI_CLK
SPI_CS
SPI_RXD
SPI_TXD

C1176
10U_0603_6.3V6M~D

1

G3
G2
H1
H2

C602
1U_0402_6.3V6K~D

XI

LRESET_N_GPIO_17
LPCEN
LPCPD_N_GPIO_24

REF_XIN

2
10M_0402_5%~D

SSP_CLK0_GPIO_6
SSP_FSS0_GPIO_7
SSP_RXD0_GPIO_8
SSP_TXD0_GPIO_9

JTAG_CLK_USH
R895
0_0402_5%~D
1
2
JTAG_TDI_USH

C601
1U_0402_6.3V6K~D

@

1
R486

USBH_OC1

+3.3V_ALW

R899 @
0_0402_5%~D

R1049

USBH_DN_1
USBH_UP_1
USBH_OC_1

P11
P12
P10

FP_USBD- 37
FP_USBD+ 37
2
1
R844
4.7K_0402_5%~D

@

USH_PWR_STATE#_R
2
0_0402_5%~D
1
2
R738
1K_0402_5%~D
1
2
R739
1K_0402_5%~D
1
2
R743
1K_0402_5%~D

R481
0_0402_5%~D
1
2 REF_XOUT

C

LCLK
LAD0_GPIO_20
LAD1_GPIO_21
LAD2_GPIO_22
LAD3_GPIO_23
LFRAME_N_GPIO_18
LSERIRQ_GPIO_19

M9
L9
K9
M7
N8

2 150_0402_5%~D
SMB_GPIO1

P7
P8
P9

@

PAD~D T147

1

39 USH_PWR_STATE#

P2
N3
M4
K5
N4
K4
L4

FP_USBDFP_USBD+
USBH_OC0#

USBH_DN_0
USBH_UP_0
USBH_OC_0

USBD_DN
USBD_UP
USBD_ATTACH_GPIO_27

@

@

C589
4.7P_0402_50V8C~D

1

2 JTAG_RST#_USH
1K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D

1
R737
1
6@ R483

P5
P6
N7

2 0_0402_5%~D PLTRST1#_USH M3
USH_LPCEN
M5
LPD#
N6

R466 1
2 0_0402_5%~D
USH_SMBCLK
USH_SMBDAT
BCM5882_ALERT#
SC_DET
R1460 1

32,39 SP_TPM_LPC_EN
40 USH_SMBCLK
40 USH_SMBDAT
39 BCM5882_ALERT#

USBP7-_R
USBP7+_R
USB_GPIO27

R615 1
2 0_0402_5%~D
R618 1
2 0_0402_5%~D
R619 1
2 0_0402_5%~D
R620 1
2 0_0402_5%~D
R621 1
2 0_0402_5%~D
2 0_0402_5%~D IRQ_SERIRQ_R

R1048 1

RST_N

BCM5882

@@@@

1

R468
0_0402_5%~D
1
2
1
2
R469
0_0402_5%~D

CLK_PCI_TPM
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
R842 1

@

U32D
REF_XIN
REF_XOUT

U32A

USBP7USBP7+

PLTRST_USH#

18 PLTRST_USH#

R744
10_0402_5%~D

2

2USB_GPIO27
18
G
18

16 CLK_PCI_TPM
15,32,39,40 LPC_LAD0
15,32,39,40 LPC_LAD1
15,32,39,40 LPC_LAD2
15,32,39,40 LPC_LAD3
15,32,39,40 LPC_LFRAME#
15,32,39,40 IRQ_SERIRQ

CLK_PCI_TPM

PCI_TPM_TERM

Q209
SSM3K7002FU_SC70-3~D

S

2 RST_N
4.7K_0402_5%~D
2 OVSTB
4.7K_0402_5%~D
2 FP_RESET#
4.7K_0402_5%~D

1
R810
1
R484
1
R1034

R1496
4.7K_0402_5%~D

D

1

@

2 PLTRST1#_USH
10K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D
2 LPD#
4.7K_0402_5%~D
2 IRQ_SERIRQ_R
4.7K_0402_5%~D
USH_SMBCLK
2
2.2K_0402_5%~D
USH_SMBDAT
2
2.2K_0402_5%~D
2 BCM5882_ALERT#
2.2K_0402_5%~D
2 USH_PWR_STATE#
4.7K_0402_5%~D
2 USBH_OC1
4.7K_0402_5%~D

1
@ R1059
1
5@ R841
1
@ R474
1
R843
1
R490
1
R626
1
R629
1
R630
1
R637

2

2

+3.3V_ALW

@

+3.3V_ALW

D

3

+3.3V_ALW_PCH
Q208
SI2301BDS-T1-E3_SOT23-3~D
2
0_0402_5%~D
2
1
3
1.5K_0402_5%~D

USB_GPIO27
1
@ R1503
USBP7+
1
R470

HF_RFIDTAG_VREF
HF_RFIDTAG_DVDD1P2

C6
E6

HF_RFIDTAG_AVDD2P5_C6
HF_RFIDTAG_AVDD2P5_E6

D6
B5

HF_RFIDTAG_AVSS_D6
HF_RFIDTAG_AVSS_B5

A4

HF_RFIDTAG_DVSS

C

SCC_CMDVCC_N_R
BCM5882_SCRST
2
1SCC_CMDVCC_N
@ R776
BCM5882_GPIO25
0_0402_5%~D BCM5882_GPIO26

@

PAD~D T143

3
5
2
4

PORadj
CLKDIV1
CLKDIV2
RSTIN
CMDVCCN
EN_5V/3VN
EN_1.8VN

VDD(intf)
VDD

1
17

VDDP

16

VCC

15

RST
CLK
I/O
AUX1
AUX2
PRESN

14
13
9
10
11
8

AUX1UC
AUX2UC
BCM5882_IO
BCM5882_SCDET

21
22
20
19

AUX1UC
AUX2UC
I/OUC
OFFN

BCM5882_SCCLK

23

XTAL1

XTAL2

24

25

GPAD

GND

12

1
1
1
1
1
1

2

1

2

1

1
+3.3V_ALW

1
2 SPI_RST
4.7K_0402_5%~D

2

+3.3V_ALW

/WP

CLK

6

SPI_CLK

GND

DIO

5

4

1
2
3
4

D
C
RESET#
S#

5

8
7
6
5

1
R341

4

2
4.7K_0402_5%~D

NOPOP

D28,D29

POP

D31-D34

BCM5882_GPIO15

SPI_TXD
BCM5882_GPIO15

W25X32VSSIG_SO8~D

Q
VSS
VCC
W#

2
RFREADER_TXN1

L72
150NH_LLQ1608-FR15G_2%~D
1
2

NOPOP
150P

3

+3.3V_ALW

C1071
390P_0603_50V8G~D

1
2

SPI_RXD

M45PE16-VMW6TG_SO8W8~D

FCI_10089709-010010LF~D

RFID
1
2
3
4
5
6

POP
NOPOP

2

2

1

15,19 CONTACTLESS_DET#

+2.5V_ALW_AVDD
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD2P5
L36
1

2

3

2

1

2

1

1

2

2

C1886
390P_0603_50V8G~D

1

2

7
8

Hardware enable for USH TPM:Populate R841,
No Stuff R483.
Hardware disable for USH TPM:No Stuff
R841, Populate R483

+1.2V_ALW_AVDD
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD1P2
L37
1

1
2
3
4
5 G1
6 G2

TYCO_2041084-6~D

@ D34
DA204U_SOT323-3~D

+3.3V_ALW
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD3P3
L38
1

RFREADER_TXP1_PI

1

2

1

2

2

DELL CONFIDENTIAL/PROPRIETARY
1

2

C629
0.1U_0402_16V4Z~D

SPI_RST

C1887
390P_0603_50V8G~D

C628
1U_0603_10V6K~D

7

2

C627
1U_0603_10V6K~D

8

/HOLD

3K

R634

3K
NOPOP

C626
0.1U_0402_16V4Z~D

VCC

DO

2

RFREADER_TXN1_PI

C625
1U_0603_10V6K~D

/CS

2

B

JCS1

C624
1U_0603_10V6K~D

1

SPI_RXD

3K

C641,C647 NOPOP

U34
SPI_TXD
SPI_CLK
SPI_RST
SPI_CS

1

R633
15K_0402_1%~D

C632
0.1U_0402_16V4Z~D

GND
GND

R494,R498 NOPOP
R555,R633

@ U19
SPI_CS

1

@ D32
DA204U_SOT323-3~D

C643
1U_0603_10V7K~D
RFREADER_RXN_C
1
2

RFID MODE
Component VOLTAGE CURRENT

Place C718 close +3.3V_ALW
to U33 pin15

E8
D9

BCM5882KFBG-ES-B0_FBGA196~D

1
2

C631
1U_0603_10V6K~D

11
12

1

1
R1510

BCM5882_GPIO15
3

2

C630
3.3U_0603_10V6K~D

R1468
1.5K_0402_5%~D

2

C1070
390P_0603_50V8G~D

3
1

3

+3.3V_ALW

C644
0.1U_0402_16V4Z~D

1

SC_IO
SC_C8
SC_DET
2

1
2
3
4
5
6
7
8
9
10

+3.3V_ALW

@ D31
DA204U_SOT323-3~D

C1015
10P_0402_50V8J~D

+SC_VCC

SC_VCC should be 3X wide as
regular SC trace width to carry
~60mA max. current per ISO spec
C1031 and C646 should be p
laced very close to SC cage pin

1
2
3
4
5
6
7
8
9
10

SC_RST
SC_CLK
SC_IO
SC_C4
SC_C8
SC_DET

A9
B11

1

@ D33
DA204U_SOT323-3~D RFREADER_RXN

JSC1
SC_RST
SC_CLK
SC_C4

RFREADER_TXP1

3

+3.3V_ALW

HF_RX_AVSS_A9
HF_RX_AVSS_B11
HF_RX_ADC_AVSS1
HF_RX_ADC_AVSS2

L71
150NH_LLQ1608-FR15G_2%~D
1
2

2
0_0402_5%~D
22_0402_5%~D
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

C633
10P_0402_50V8J~D

1

2
2
2
2
2
2

C718
.47U_0402_6.3V6-K~D

A

2

C646
0.22U_0402_6.3V6K~D

2

@ C1031
10U_0805_10V4Z~D

1

2

R555
15K_0402_1%~D
C639
1U_0603_10V7K~D
RFREADER_RXP
RFREADER_RXP_C
1
2

+SC_VCC
R773
R772
R491
R493
R492
R1459

TDA8034HN_HVQFN24_4X4~D

+SC_VCC

1
1

1

1

18
6
7

2

2

PORADJ
CLKDIV1
CLKDIV2

2

R488
3.3M_0402_5%~D

+5V_ALW

C709
10U_0805_10V6M~D

B

2

1

C1014
0.1U_0402_16V4Z~D

2
U33

1

C706
10U_0805_10V6M~D

1

C620
0.1U_0402_16V4Z~D

2 PORADJ
4.7K_0402_5%~D
2 CLKDIV2
4.7K_0402_5%~D

C622
0.1U_0402_16V4Z~D

1
@ R538
1
R553

2 PORADJ
4.7K_0402_5%~D
2 CLKDIV1
4.7K_0402_5%~D

1
R537
1
R532

2

+3.3V_ALW

Compal Electronics, Inc.
Title

USH BCM5882 (1/2)
Size

Document Number

Rev
0.1

LA-5573P
Date:

Thursday, January 21, 2010

Sheet
1

31

of

69

A

5

4

3

2

+3.3V_ALW

2

1

2

C1178
10U_0603_6.3V6M~D

2

1

C593
1U_0402_6.3V6K~D

1

1

C592
1U_0402_6.3V6K~D

1

2

C1179
10U_0603_6.3V6M~D

1

2

C619
1U_0402_6.3V6K~D

1

2

C618
1U_0402_6.3V6K~D

1

2

C617
1U_0402_6.3V6K~D

1

2

C616
1U_0402_6.3V6K~D

2

C615
1U_0402_6.3V6K~D

C614
1U_0402_6.3V6K~D

1

+1.2V_ALW_PLL
C613
1U_0402_6.3V6K~D

2

1

1

2

U32B

+1.2V_ALW_PLL
+1.2V_ALW_AVDD
+2.5V_ALW_AVDD
+3.3V_ALW

D

1

1

2

A14

USH BCM5882 and China TCM Z8H172T Option
Ref Des TCM Enable
TPM Enable
ALL TPM/TCM Disable

TCM circuit

All 3@

USH_LPCEN
SIO 5028 ->SP_TPM_LPC_EN
PCH GPIO39 ->TPM_ID1
C

PCH GPIO38 ->TPM_ID0

C1027
0.1U_0402_16V4Z~D

@

PU R841

@

POP

@

PD R483

POP

@

@

PU R788

@

@

@

+VDDC_5882

PU R787

@

@

POP

PD R339

POP

POP

@

PU R273

POP

POP

@

PD R922

@

@

POP

+3.3V_ALW

+VDDC_5882

2

2

1

C599
1U_0402_6.3V6K~D

1

1

C1180
10U_0603_6.3V6M~D

2

1

C598
1U_0402_6.3V6K~D

1

1

2

C877
1U_0402_6.3V6K~D

China TCM: NationZ & Jetway co-lay

C873
1U_0402_6.3V6K~D

2

2

C597
1U_0402_6.3V6K~D

1

C596
1U_0402_6.3V6K~D

2

LOW:Power Down Mode
High:Working Mode

+1.2V_ALW_PLL

1

@

POP

2

BCM5882
AVDD_1P2I_REF
AVDD_1P2O_A11
AVDD_1P2O_A12

AVSS_LDO12

AVDD_2P5I
AVDD_2P5O_E10
AVDD_2P5O_E11

AVSS_LDO25_B13
AVSS_LDO25_C12
AVSS_PLL

AVDD25_LDO12_A13
AVDD25_LDO12_B12

AVSS_REF
PLL_AVSS

AVDD25_PLL_A14
PLL_DVSS

D11

+SC_PWR

PART/PIN

H13
E10
E11
A13
B12

C1017
4.7U_0603_6.3V6M~D

1

2

C612
1U_0402_6.3V6K~D

1

2

C875
1U_0402_6.3V6K~D

1

2

C638
1U_0402_6.3V6K~D

1

2

C637
1U_0402_6.3V6K~D

1

2

C636
1U_0402_6.3V6K~D

2

C635
1U_0402_6.3V6K~D

1

C621
1U_0402_6.3V6K~D

2

H14
A11
A12

OTP_PWR

D14
E14
C14

PLL_AVDD_1P2I
PLL_AVDD_1P2O
PLL_DVDD_1P2I

D13
F3
J4
J5
J6
J7
J8
J10
J11
K7
K8

VDDC_D13
VDDC_F3
VDDC_J4
VDDC_J5
VDDC_J6
VDDC_J7
VDDC_J8
VDDC_J10
VDDC_J11
VDDC_K7
VDDC_K8

E4
J2
K3
L8
N10

VDDO_33_E4
VDDO_33_J2
VDDO_33_K3
VDDO_33_L8
VDDO_33_N10

M13
N13
L6
M6
K10
K12
L12
L13
D5
E5
N5

D

B14
F13
D12
E13

AVDD33_LDO25

P13

G4
H3
H4
J3

C11
B13
C12

VDDO_33CORE_G4
VDDO_33CORE_H3
VDDO_33CORE_H4
VDDO_33CORE_J3
VDDO_33SC_M13
VDDO_33SC_N13
VDDO_LPC_L6
VDDO_LPC_M6
VDDO_SC_K10
VDDO_SC_K12
VDDO_SC_L12
VDDO_SC_L13

POR_AVSS

G13

VSSC_F4
VSSC_F5
VSSC_F6
VSSC_F7
VSSC_F10
VSSC_F11
VSSC_F12
VSSC_G5
VSSC_G6
VSSC_G7
VSSC_G8
VSSC_G9
VSSC_G10
VSSC_G11
VSSC_G12
VSSC_H5
VSSC_H6
VSSC_H7
VSSC_H8
VSSC_H9
VSSC_H10
VSSC_H11
VSSC_H12
VSSC_J9
VSSC_J12
VSSC_K2
VSSC_K6
VSSC_K13
VSSC_K14
VSSC_L5
VSSC_M8
VSSC_M14
VSSC_N9
VSSC_N11
VSSC_N12
VSSC_P3
VSSC_P4

F4
F5
F6
F7
F10
F11
F12
G5
G6
G7
G8
G9
G10
G11
G12
H5
H6
H7
H8
H9
H10
H11
H12
J9
J12
K2
K6
K13
K14
L5
M8
M14
N9
N11
N12
P3
P4

C

VDDO_VAR_D5
VDDO_VAR_E5
VESD
BCM5882KFBG-ES-B0_FBGA196~D

+3.3V_RUN
3@ U24
B

B

LPC_LFRAME#_R
PCI_RST#_R

3@ R909 1

2 0_0402_5%~D

CLKRUN#_R
TCM_BA1
TCM_BA0

LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP
BA_1
BA_0

NC_5
NC_12
NC_13

JETWAY_CLK14M

1
2
6
8
14

JETWAY_CLK14M 16

3@

@

TCM_BA0
TCM_BA1

POP

NationZ

R1026, R1023, C23, C1174

Jetway

C1175, R910
2

1

3@

3@

@

A

R1026
1K_0402_5%~D

TCM Vender

2

R1023
1K_0402_5%~D

@ C1175
0.1U_0402_16V4Z~D

1

R1025
10K_0402_5%~D

2

A

1

3@

+3.3V_RUN

2

SSX44-B_TSSOP28~D

2

JETWAY_PIN5

1

JETWAY_PIN5

1

3@

R1022
10K_0402_5%~D

NC_1
NC_2
NC_6
NC_8
NC_P

5
12
13

2

C23
1U_0402_6.3V6K~D

21
22
16
27
15
7
3
9

1

3@

1

2 0_0402_5%~D
2 0_0402_5%~D

GND_11
GND_18
GND_25
GND_4

2
11
18
25
4

2

3@ R905 1
3@ R906 1

LPCPD#
LAD0
LAD1
LAD2
LAD3

1

C_TPM_LPC_EN28
LPC_LAD0_R
26
LPC_LAD1_R
23
LPC_LAD2_R
20
LPC_LAD3_R
17

3@

2

0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

1

2
2
2
2
2

2

1
1
1
1
1

1

R893
R901
R902
R903
R904

C1174
10U_0603_6.3V6M~D

16 CLK_PCI_TPM_CHA
15,31,39,40 LPC_LFRAME#
8,18,34,36,39,40 PCH_PLTRST#_EC
+3.3V_RUN
15,31,39,40 IRQ_SERIRQ
17,39,40 CLKRUN#
1
2
@R1210
@
R1210
4.7K_0402_5%~D

3@
3@
3@
3@
3@

C1173
0.1U_0402_16V4Z~D

SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

C1172
0.1U_0402_16V4Z~D

31,39
15,31,39,40
15,31,39,40
15,31,39,40
15,31,39,40

10
19
24

C1171
0.1U_0402_16V4Z~D

VDD_0
VDD_1
VDD_2

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

USH BCM5882 (2/2)
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

32

of

69

5

4

3

2

1

+3.3V_RUN

C645,Close to U94.C10
2

C603,Close to U94.J4/K3

1

RXP
RXN

M12
L9
L10
L11

PERST#
RXC
CPO
RREF

PCIe / Power /
1394 / MultiCard

R8 Close to U94
SDCLK/MMC_CLK
need shield GND

C707,C705,R1148 as close
as possible to U94

SDCLK/MMC_CLK

R8

1
1
1

SDCMD/MMCCMD R34

1

SDDAT3/MMCDAT3 R32
SDDAT2/MMCDAT2 R31

1
1

SDWP
H13
2 0_0402_5%~D SDDAT1/MMCDAT1_RH12
2 0_0402_5%~D SDDAT0/MMCDAT0_RG13
MMCDAT7
G12
MMCDAT6
F13
2 22_0402_5%~D SDCLK/MMC_CLK_R F12
D12
MMCDAT5
D10
2 0_0402_5%~D SDCMD/MMCCMD_R C13
MMCDAT4
C12
2 0_0402_5%~D SDDAT3/MMCDAT3_RB13
2 0_0402_5%~D SDDAT2/MMCDAT2_RC11
A13
B12
A12

+3.3V_RUN_CARD
D13

SD18C

MFCD0#
MFCD1#
MFCD2#

K11
L12
A7
B7
C6
D11
E12
E13
K4
L8
M9
N9
L5

AGND0
AGND1
GND0
GND1
GND2
GND3
GND4
GND5
GND8
GND9
GND10
GND11
GND12

2
1

2

1

2

NC
NC
NC

7
6
10

2

1

@

2

1

SD Conn.
Pitch=0.5
JSD1

18

SD_DET#

+3.3V_RUN_CARD

C701,C702 Close to U94.D7

SD_DET#
SDWP
SDCD#/MMCCD#
SDDAT1/MMCDAT1
SDDAT0/MMCDAT0
MMCDAT7
MMCDAT6

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

SDCLK/MMC_CLK

+3.3V_RUN

1

MMCDAT5
SDCMD/MMCCMD
MMCDAT4
SDDAT3/MMCDAT3
SDDAT2/MMCDAT2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

C

2
17
18

G1
G2

C703,Close to U94.D13

C1889
1U_0402_6.3V6K~D
HRS_FH12-16S-0P5SH(55)~D

2

R46:
For R5U241 should be 0 ohm,
R5U242 should be 1uF
2A Current Capacity Required
between R5U242 and SD Card Slot

only for MMC/SD

TPBIAS0

2
A

2

FLG
GND

Place close to
JSD1.9
C21 need to change
47uF for R5U242

R5U242-ES3-CSP144P_CSP144~D
TPAP0
TPAN0
TPBP0
TPBN0

1

2

B

TPAP0
TPAN0
TPBP0
TPBN0

37
37
37
37

1

1

MFIO SD8 XD MS8
BS
00
WP D7
01
D1 D6
D1
D0 D5
02
D7 D4
03
D5
D6 D3
04
D0
05 CLK D2
D1
06
D4
07
D5 D0
08 CMD WP# D2
09
D4 WE# D6
10
D3 ALE D3
D2 CLE
11
- CE#
12
- RE# D7
13
- R/B# CLK
14

1

VCC3_EN
VCC5_EN

2

2
C700
10U_0805_10V4Z~D

USBDP
USBDM

MFIO Pin Assignment Table

8

R1464
150K_0402_5%~D

R399
54.9_0402_1%~D

H1
H2

1

2

1

R398
54.9_0402_1%~D

F11
G11
G10

2

1

D8

+CBS_VPP
VPPOUT

C493
0.33U_0603_10V7K~D

SDCD#/MMCCD#
B

MFIO00
MFIO01
MFIO02
MFIO03
MFIO04
MFIO05
MFIO06
MFIO07
MFIO08
MFIO09
MFIO10
MFIO11
MFIO12
MFIO13
MFIO14

2

1

1

2

C705
1500P_0402_7K~D
2
1

C707
0.022U_0402_16V7K~D

2

SDDAT1/MMCDAT1 R36
SDDAT0/MMCDAT0 R35

2

1

D7

MF_VOUT

R1148
5.1K_0402_1%~D

2
1

C491
10P_0402_50V8J~D

N10
M10

2

1

1

1

PLTRST_R5U242#

CPO
RREF

1

VCC3EN#
VCC5EN#

EN0
EN1

D

+3.3V_RUN_CARD
+PCIE_PHY

2

TXP
TXN

AVCC_3V

1

3
4

2

R5531V002-E2-FA_SSOP16~D

C767
0.1U_0402_16V4Z~D

1
M13
M11
N11

PCIE_VIN0
PCIE_VIN1
PCIE_VIN2

2

1

C8
J3

PCIE_VOUT0
PCIE_VOUT1
REFCLKP
REFCLKN

1

R401
54.9_0402_1%~D

Z3008
2

2

2

R403
54.9_0402_1%~D

2
C494
270P_0402_50V7K~D

1

R407
5.1K_0402_1%~D
1

16 PCIE_PTX_PCMRX_P3_C
16 PCIE_PTX_PCMRX_N3_C

18 PLTRST_R5U242#
RXC

VCC3EN#
VCC5EN#

C21
47U_0805_6.3V6M~D

PCIE_PRX_PCMTX_P3_C N12
PCIE_PRX_PCMTX_N3_C N13

2 0.1U_0402_10V7K~D
2 0.1U_0402_10V7K~D

2

C702
1U_0402_6.3V6K~D

16 PCIE_PRX_PCMTX_P3
16 PCIE_PRX_PCMTX_N3

C710 1
C713 1

1

C701
0.1U_0402_16V4Z~D

N8
M8

16 CLK_PCIE_PCM
16 CLK_PCIE_PCM#

C710,C713 as close
as possible to U94

TPAP0
TPAN0
TPBIAS0
TPBP0
TPBN0
CPS

C699
0.1U_0402_16V4Z~D

1
2
R1146
0_0402_5%~D

A5
B5
C7
A6
B6
D4

C10
J4
K3

VCC_3V0
VCC_3V1
VCC_3V2

C703
0.1U_0402_16V4Z~D

+3.3V_RUN

TPAP0
TPAN0
TPBIAS0
TPBP0
TPBN0
CPS

XI
XO

C645
0.1U_0402_16V4Z~D

1
0_0402_5%~D

A8
B8

C698
0.1U_0402_16V4Z~D

2
R421

C515
15P_0402_50V8J~D

C

34
34

VPPEN0
VPPEN1

U94A
R5U241_XI
R5U241_XO

C603
0.1U_0402_16V4Z~D

1

VPPEN0
VPPEN1

9
14
12

VCC5IN
VCC5IN

5
16

C697
0.1U_0402_16V4Z~D

1

X3
24.576MHZ_12PF_X5H024576FC1H~D
2

34
34

+3.3V_RUN

C695
0.1U_0402_16V4Z~D

C514
15P_0402_50V8J~D

2

2

U94.M13
U94.M11/N11
U94.J3
U94.C8

13
15

2
VCCOUT
VCCOUT
VCCOUT

@

C500
0.01U_0402_16V7K~D

Crystal close to U94

to
to
to
to

VCC3IN

C499
0.1U_0402_16V4Z~D

C695,Close
C697,Close
C698,Close
C699,Close

11

1

C497
10U_0805_10V4Z~D

C498
1U_0402_6.3V6K~D

1

D

1
U27

C496
0.1U_0402_16V4Z~D

2
+5V_RUN

+CBS_VCC

C495
1U_0402_6.3V6K~D

1

Close to U94

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R5U242 (1/2)
Size
Date:

5

4

3

2

Document Number

Rev
0.1

LA-5573P
Thursday, January 21, 2010

Sheet
1

33

of

69

5

4

3

2

1

+1.5V_CARD
+1.5V_RUN

C

2

C708
1U_0603_25V6-K~D

VPPEN1
VPPEN0
VCC3EN#
VCC5EN#

D9
E10
F10
E11

VPPEN1
VPPEN0
VCC3EN#
VCC5EN#

40 CARD_SMBDAT

40 CARD_SMBCLK

1
@ R791

18

USBP10-

1
@ R792
4 4

USBP10+

1

1

GND7
GND8

71
72

1

2
0_0402_5%~D
3 3

2

RCLKEN
CARD_RESET#

C

2

2

R947
100K_0402_5%~D
JEXP1
39 EXPRCRD_DET#
USBP10_DUSBP10_D+
CPUSB#
CARD_SMBCLK
CARD_SMBDAT

CBS_CCD1#
CBS_CAD2
CBS_CAD4
CBS_CAD6
CBS_DATA14
CBS_CAD8
CBS_CAD10
CBS_CVS1
CBS_CAD13
CBS_CAD15
CBS_CAD16
CBS_DATA18
CBS_CBLOCK#
CBS_CSTOP#
CBS_CDEVSEL#
CBS_CTRDY#
CBS_CFRAME#
CBS_CAD17
CBS_CAD19
CBS_CVS2
CBS_CRST#
CBS_CSERR#
CBS_CREQ#
CBS_CC/BE3#
CBS_CAUDIO
CBS_CSTSCHNG
CBS_CAD28
CBS_CAD30
CBS_CAD31
CBS_CCD2#

PCIE_WAKE#

+CBS_VPP

1

2

+CBS_VCC
+CBS_VPP

1

2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

G1

G2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

+3.3V_CARDAUX

CARD_RESET#
EXPRCRD_CPPE#

EXPCLK_REQ# 16

CLK_PCIE_EXP# 16
CLK_PCIE_EXP 16

1

2

PCIE_PRX_EXPTX_N4 16
PCIE_PRX_EXPTX_P4 16

B

PCIE_PTX_EXPRX_N4_C 16
PCIE_PTX_EXPRX_P4_C 16

32

LOTES_YEA-BTB-020-130K13

Close to JCBUS1 Pin18/52

+CBS_VCC

1

2

1

2

1

2

A

Close to JCBUS1 pin23,63

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

MOLEX_48315-0013_RT
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R5U242 (2/2)
Size

4

3

2

Document Number

Rev
0.1

LA-5573P
Date:

5

2

CPUSB#

C543
10U_0805_10V4Z~D

GND5
GND6

2
0_0402_5%~D

36,39 PCIE_WAKE#
+3.3V_CARD

C542
0.01U_0402_16V7K~D

69
70

2

7

1

+3.3V_ALW

C541
0.01U_0402_16V7K~D

A

CBS_CCLK
CBS_CIRDY#
CBS_CC/BE2#
CBS_CAD18
CBS_CAD20
CBS_CAD21
CBS_CAD22
CBS_CAD23
CBS_CAD24
CBS_CAD25
CBS_CAD26
CBS_CAD27
CBS_CAD29
CBS_DATA2
CBS_CCLKRUN#

GND

1

D

+1.5V_CARD: Max. 650mA, Average 500mA
+3.3V_CARD: Max. 1300mA, Average 1000mA

C1005
0.1U_0402_16V4Z~D

+CBS_VCC
+CBS_VPP

CPPE#

8
16

2

+1.5V_CARD

C769
0.1U_0402_10V7K~D

CBS_CAD0
CBS_CAD1
CBS_CAD3
CBS_CAD5
CBS_CAD7
CBS_CC/BE0#
CBS_CAD9
CBS_CAD11
CBS_CAD12
CBS_CAD14
CBS_CC/BE1#
CBS_CPAR
CBS_CPERR#
CBS_CGNT#
CBS_CINT#

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

NC

+3.3V_CARDAUX

2

1

CARD_SMBDAT

L64
DLW21SN900SQ2_0805~D

GND3
CCD1#
CAD2
CAD4
CAD6
CB_D14
CAD8
CAD10
CVS1
CAD13
CAD15
CAD16
CB_D18
CBLOCK#
CSTOP#
CDEVSEL#
VCC
VPP2
CTRDY#
CFRAME#
CAD17
CAD19
CVS2
CRST#
CSERR#
CREQ#
CCBE3#
CAUDIO
CSTSCHG
CAD28
CAD30
CAD31
CCD2#
GND4

PERST#

STBY#

CARD_SMBCLK

JCBUS1
GND1
CAD0
CAD1
CAD3
CAD5
CAD7
CCBE0#
CAD9
CAD11
CAD12
CAD14
CCBE1#
CPAR
CPERR#
CGNT#
CINT#
VCC
VPP1
CCLK
CIRDY#
CCBE2#
CAD18
CAD20
CAD21
CAD22
CAD23
CAD24
CAD25
CAD26
CAD27
CAD29
CB_D2
CCLKRUN#
GND2

SHDN#

15
19

1

Express Card BTB Conn.

18

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

OC#

2

TPS2231MRGPR-1_QFN20_4X4~D

R5U242-ES3-CSP144P_CSP144~D

B

18

1

CBS_CAD11
CBS_CGNT#
CBS_CAD10
CBS_CC/BE0#
CBS_CC/BE3#
CBS_CRST#
CBS_CSERR#
CBS_CCLKRUN#
CBS_CINT#
CBS_CAUDIO
CBS_CSTSCHNG
CBS_CVS2
CBS_CVS1
CBS_CCD2#
CBS_CCD1#
CBS_CREQ#
CBS_CAD13
CBS_CAD15

9

+3.3V_SUS

1

C1
F4
D3
D5
L4
N1
N2
L7
G4
L6
K7
K5
E4
K8
D6
K6
D1
E1

10

CPUSB#

AUX_OUT

SYSRST#

1

3
5

C1004
0.1U_0402_16V4Z~D

33
33
33
33

VPPEN1
VPPEN0
VCC3EN#
VCC5EN#

OE#
WE#
CE2#
CE1#
REG#
RESET
WAIT#
WP#/IOIS16#
RDY/IREQ#
BVD2
BVD1
VS2#
VS1#
CD2#
CD1#
INPACK#
IORD#
IOWR#

EXPRCRD_CPPE#

C1007
0.1U_0402_16V4Z~D

Power-On-Reset: GBRST#
(Global Reset)
Note: De-asserted BEFORE
PERST# de-assertion

2 0_0402_5%~D

AUX_IN

2

2

1

@ R687 1

1

3.3Vout
3.3Vout

2

1

2

PWR_ON_RST

B1
B2
B3
C4
B4
M7
M6
M5
A1
A2
A3
A4
C5
N7
N6
N5

EXPRCRD_STBY_R#

2

1

2

R1150
47K_0402_1%~D

CDATA15
CDATA14
CDATA13
CDATA12
CDATA11
CDATA10
CDATA9
CDATA8
CDATA7
CDATA6
CDATA5
CDATA4
CDATA3
CDATA2
CDATA1
CDATA0

CBS_CAD8
CBS_DATA14
CBS_CAD6
CBS_CAD4
CBS_CAD2
CBS_CAD31
CBS_CAD30
CBS_CAD28
CBS_CAD7
CBS_CAD5
CBS_CAD3
CBS_CAD1
CBS_CAD0
CBS_DATA2
CBS_CAD29
CBS_CAD27

2 0_0402_5%~D
2 0_0402_5%~D

2

1
2
1
@ R1152
47K_0402_5%~D

39 EXPRCRD_PWREN#

R684 1
@ R683 1

R127
2.2K_0402_5%~D

+3.3V_RUN

20
12,39,42,47,62 RUN_ON
39 EXPRCRD_STDBY#

R126
2.2K_0402_5%~D

CARDBUS / MEDIA CARD / SD Card

TEST

6

3.3Vin
3.3Vin

11
13

C1003
10U_0805_6.3V6M~D

K10

17
PCH_PLTRST#_EC

8,18,32,36,39,40 PCH_PLTRST#_EC

1.5Vout
1.5Vout

C1002
0.1U_0402_16V4Z~D

PWR_ON_RST
SROM: SPKROUT
Pull-Hi: Disable
Pull-Lo: Enable (Default)

UDIO0
UDIO1
UDIO2
UDIO3
UDIO4
UDIO5
SPKROUT
WAKE#
GBRST#

CBS_CCLK

2
4

2

1.5Vin
1.5Vin

+3.3V_CARD

C1001
0.1U_0402_16V4Z~D

SPKROUT

NC
GND

1

U52
12
14

1

C1016
10U_0805_6.3V6M~D

15,16 PCMCLK_REQ#

K13
K12
J13
J12
J11
H11
J10
L13
K9

2
R410
0_0402_5%~D

2

1

C1006
0.1U_0402_16V4Z~D

R81
0_0402_5%~D
1
2

R410 Close to U94, CBS_CCLK need shield GND

2

1

C1012
10U_0805_6.3V6M~D

H10
B10

2

1

C1000
0.1U_0402_16V4Z~D

R1151
47K_0402_5%~D

1
1

C997
0.1U_0402_16V4Z~D

D

+3.3V_RUN

C135
0.1U_0402_16V4Z~D

+3.3V_RUN

GND
GND
GND
GND
GND
GND

CBS_CAD19
CBS_CAD17
CBS_CFRAME#
CBS_CTRDY#
CBS_CDEVSEL#
CBS_CSTOP#
CBS_CBLOCK#
CBS_DATA18
CBS_CAD16
CBS_CCLK_R
CBS_CIRDY#
CBS_CPERR#
CBS_CPAR
CBS_CC/BE2#
CBS_CAD12
CBS_CAD9
CBS_CAD14
CBS_CC/BE1#
CBS_CAD18
CBS_CAD20
CBS_CAD21
CBS_CAD22
CBS_CAD23
CBS_CAD24
CBS_CAD25
CBS_CAD26

C134
0.1U_0402_16V4Z~D

C9
A10
A9
B9
B11
A11

L2
K2
H4
J1
G3
F3
G2
F2
E2
H3
J2
G1
F1
K1
C2
C3
D2
E3
L1
M1
M2
L3
M3
N3
N4
M4

CADR25
CADR24
CADR23
CADR22
CADR21
CADR20
CADR19
CADR18
CADR17
CADR16
CADR15
CADR14
CADR13
CADR12
CADR11
CADR10
CADR9
CADR8
CADR7
CADR6
CADR5
CADR4
CADR3
CADR2
CADR1
CADR0

C999
0.1U_0402_16V4Z~D

+3.3V_SUS

U94B

Thursday, January 21, 2010

Sheet
1

34

of

69

4

3

2

For Asics placement estimate
4
5

PCIE_PTX_WWANRX_N1_C_SW
PCIE_PTX_WWANRX_P1_C_SW

6
7

MCARD_PCIE_SATA#

3

A1+
A1-

VDD
VDD
VDD
VDD
VDD
VDD

9
11
13
19
26
28

B0+
B0B1+
B1C0+
C0C1+
C1-

24
23
22
21
18
17
16
15

SEL

1
10
12
14
20
25
27
29

GND
GND
GND
GND
GND
GND
GND
TPAD

NC
NC

1@ C1714
0.1U_0402_16V4Z~D

1

PCIE_PTX_WWANRX_P1_C_R

1

PCIE_PTX_WWANRX_N1_C_R

1

PCIE_PRX_WWANTX_P1_R

1

PCIE_PRX_WWANTX_N1_R

SEL

2
1@C450
1@
C450

SATA_PRX_WWANTX_N3_C
1
0.01U_0402_16V7K~D

SATA_PRX_WWANTX_N3_C 15

2
1@ C1393

SATA_PTX_WWANRX_N3_C
1
0.01U_0402_16V7K~D

SATA_PTX_WWANRX_N3_C 15

2
1@ C1394

SATA_PTX_WWANRX_P3_C
1
0.01U_0402_16V7K~D

SATA_PTX_WWANRX_P3_C 15

2
8

2@ R1347 2
0_0402_5%~D
2@ R1348 2
0_0402_5%~D
2@ R1349 2
0_0402_5%~D
2@ R1350 2
0_0402_5%~D

1
1
1

C

4
1

D

S

1
2

1

2

2

B

2

2

R450
100K_0402_5%~D

1

R1525
20K_0402_5%~D

1
2
6
Q192A
DMN66D0LDW-7_SOT363-6~D
2
39 MCARD_PCIE_BKT_PWREN

G

D

S
G

1
2
3
4

1

G

1
2
6

1
2

R1523
20K_0402_5%~D

D

S

1

4

3

1
2
3

1
2
6
1

1

2

5

4
Q50
SI3456BDV-T1-E3_TSOP6~D

C553
4700P_0402_25V7K~D

1

+3.3V_PCIE_BKT

6
5
2
1

Q192B
DMN66D0LDW-7_SOT363-6~D

R437
100K_0402_5%~D

+3.3V_ALW
R436
100K_0402_5%~D

Q53A
DMN66D0LDW-7_SOT363-6~D
2
39 AUX_EN_WOWL

+15V_ALW

4
Q47
SI3456BDV-T1-E3_TSOP6~D

C551
4700P_0402_25V7K~D

2

5

Q53B
DMN66D0LDW-7_SOT363-6~D

1

+3.3V_WLAN

6
5
2
1

R435
100K_0402_5%~D

Q51
SI3456BDV-T1-E3_TSOP6~D

+3.3V_ALW

+3.3V_RUN

Power Control for Mini card3

3

Power Control for Mini card2

1

A=C

2

A=B

1

@ R504
@R504
0_0805_5%~D
1
2

4

PCIE_PRX_WANTX_N1 16
PCIE_PRX_WANTX_P1 16
PCIE_PTX_WANRX_N1_C 16
PCIE_PTX_WANRX_P1_C 16

1

Function

0

R431
100K_0402_5%~D

6
5
2
1

D

SATA_PRX_WWANTX_P3_C 15

R432
100K_0402_5%~D

+3.3V_PCIE_SATA_WAN

C571
4700P_0402_25V7K~D

R452
100K_0402_5%~D

Q193B
DMN66D0LDW-7_SOT363-6~D

5
Q193A
DMN66D0LDW-7_SOT363-6~D
2
39 MCARD_WWAN_PWREN

R453
100K_0402_5%~D

R451
100K_0402_5%~D

B

+3.3V_ALW

The pin-out of the SATA Mini Card module
was changed. The change was the RX& RX+ were swapped on the module.

SATA_PRX_WWANTX_P3_C
1
0.01U_0402_16V7K~D

+15V_ALW
+15V_ALW

2

3

Power Control for Mini card1

2

3

C

1

SATA_PRX_WWANTX_P3
2
SATA_PRX_WWANTX_N3 1@ C449
SATA_PTX_WWANRX_N3
SATA_PTX_WWANRX_P3

PI2DBS212ZHEX_TQFN28_5P5X3P5~D

2@ R1322 2
0_0402_5%~D
2@ R1323 2
0_0402_5%~D
2@ R1324 2
0_0402_5%~D
2@ R1326 2
0_0402_5%~D

1

1

36,39 MCARD_PCIE_SATA#

A0+
A0-

R1524
20K_0402_5%~D

36 PCIE_PTX_WWANRX_N1_C_SW
36 PCIE_PTX_WWANRX_P1_C_SW

D

1@ U138

PCIE_PRX_WWANTX_N1_SW
PCIE_PRX_WWANTX_P1_SW

36 PCIE_PRX_WWANTX_N1_SW
36 PCIE_PRX_WWANTX_P1_SW

1@ C1715
0.1U_0402_16V4Z~D

Impedance please keep 90 ohm

1

PCIE/SATA SW for Mini card1
+1.5V_RUN

2

5

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

PCIE/SATA SW & PCIE PWR
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

35

of

69

5

4

+3.3V_ALW_PCH

3

+3.3V_RUN

1
@R428
@
R428

2

1

+3.3V_ALW_PCH

2
0_0402_5%~D
PCIE_MCARD1_DET#

USB_MCARD2_DET# 2
R447

PCIE_MCARD2_DET# 1
R449
MCARD_PCIE_SATA# 1
R455

1
100K_0402_5%~D

+1.5V_RUN

2

C

1

2

WLAN_RADIO_DIS#_R

2

2 PCIE_MCARD2_DET#
0_0402_5%~D

Mini WWAN H=5.2

53

GND1

Mini WLAN H=4

+3.3V_PCIE_SATA_WAN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

USB_MCARD1_DET#
1
@ R741
+3.3V_WLAN
+1.5V_RUN
+SIM_PWR

UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

16 MINI2CLK_REQ#

WWAN_RADIO_DIS#
1
2
R442
0_0402_5%~D

WWAN_RADIO_DIS# 39
PCH_PLTRST#_EC 8,18,32,34,39,40

16 CLK_PCIE_MINI2#
16 CLK_PCIE_MINI2
40 HOST_DEBUG_RX
40
MSCLK

USBP5USBP5+
USB_MCARD2_DET#
LED_WWAN_OUT#
1
R840

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2

16 PCIE_PRX_WLANTX_N2
16 PCIE_PRX_WLANTX_P2
USBP5- 18
USBP5+ 18
USB_MCARD2_DET# 19
LED_WWAN_OUT# 43

WIMAX_LED#
2
0_0402_5%~D

1
@ C552
33P_0402_50V8J~D

For WIMAX LED debug

PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C

16 PCIE_PTX_WLANRX_N2_C
16 PCIE_PTX_WLANRX_P2_C

COEX2_WLAN_ACTIVE

PCIE_MCARD1_DET#

19 PCIE_MCARD1_DET#

2

16 PCH_CL_CLK1
16 PCH_CL_DATA1
1
16 PCH_CL_RST1#
R448

2 PCH_CL_RST1#_R
0_0402_5%~D

53

+1.5V_RUN

750

+3.3Vaux

+-9%

330

250

+1.5V

+-5%

500

375

2

250 (Wake enable)
5 (Not wake enable)

2

1

2

1

@

2

1

2

1

2

1

2

+1.5V_RUN

2

1
+
2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1

PCIE_MCARD1_DET# 1
@ R439
USB_MCARD1_DET#
1
R438
1

2
100K_0402_5%~D
2
100K_0402_5%~D

2

C1705 4700P_0402_25V7K~D
HOST_DEBUG_TX 40
WLAN_RADIO_DIS#_R
2
1 PCH_PLTRST#_EC
R444
0_0402_5%~D

USBP4USBP4+
USB_MCARD1_DET#
WIMAX_LED#
LED_WLAN_OUT#
1
@ R1409

USBP4- 18
USBP4+ 18
USB_MCARD1_DET# 19

MSDATA

USB_MCARD3_DET#

1
@ R742

2 PCIE_MCARD3_DET#
0_0402_5%~D

+3.3V_PCIE_BKT
PCIE_WAKE#
COEX2_WLAN_ACTIVE R454 1
2 0_0402_5%~D

1
2
3
4

UIM_RESET
UIM_CLK
C573
1U_0402_6.3V6K~D

1

2

5
6
7
8
9
10

VCC
RST
CLK
NC

GND
VPP
I/O
NC
GND
GND
MOLEX_475531001

UIM_VPP
UIM_DATA

1

UIM_CLK

1
R458

3

2

@

1

2

1

2

1

2

1

2

1

2

53

C585
4.7U_0603_6.3V6M~D

2

1

C584
0.1U_0402_16V4Z~D

2

1

C583
0.1U_0402_16V4Z~D

1

+3.3V_PCIE_BKT
C582
0.047U_0402_16V4Z~D

2

@

C581
0.047U_0402_16V4Z~D

1

C580
0.1U_0402_16V4Z~D

2

@

C579
0.047U_0402_16V4Z~D

SRV05-4.TCT_SOT23-6~D

1

C578
0.047U_0402_16V4Z~D

2

UIM_DATA

4

@

+1.5V_RUN

C577
33P_0402_50V8J~D

1

2
100K_0402_5%~D

+SIM_PWR

C576
33P_0402_50V8J~D

2

@

C575
33P_0402_50V8J~D

A

C574
33P_0402_50V8J~D

1

5

PCIE_MCARD3_DET#

18 PCIE_MCARD3_DET#

UIM_VPP

+3.3V_RUN
2

PCIE_PTX_WPANRX_N5_C
PCIE_PTX_WPANRX_P5_C

16 PCIE_PTX_WPANRX_N5_C
16 PCIE_PTX_WPANRX_P5_C
6

CLK_PCIE_MINI3#
CLK_PCIE_MINI3

PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5

16 PCIE_PRX_WPANTX_N5
16 PCIE_PRX_WPANTX_P5

UIM_RESET

MINI3CLK_REQ#

16 MINI3CLK_REQ#
16 CLK_PCIE_MINI3#
16 CLK_PCIE_MINI3

U31

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

WPAN Noise
USB_MCARD3_DET#

PCIE/BKT Card H=4

JSIM1

40

@

1

+3.3V_PCIE_BKT
2

JMINI3
B

C

LED_WLAN_OUT# 43

2
0_0402_5%~D

TYCO_1775861-1~D

NA

SIM Card Push-Push

+SIM_PWR

1

C554
330U_D2E_6.3VM_R25~D

1000

1

C562
4.7U_0603_6.3V6M~D

+-9%

Normal

C561
0.1U_0402_16V4Z~D

Normal

C560
0.1U_0402_16V4Z~D

Aux Power
1

Peak

C559
0.047U_0402_16V4Z~D

+3.3V

Primary Power

C558
0.047U_0402_16V4Z~D

Voltage
Tolerance

C557
0.1U_0402_16V4Z~D

+
2

PWR
Rail

C556
0.047U_0402_16V4Z~D

2

C563
330U_D2E_6.3VM_R25~D

2

1

C568
33P_0402_50V8J~D

2

1

C567
22U_0805_6.3VAM~D

2

C566
33P_0402_50V8J~D

C565
0.047U_0402_16V4Z~D

C564
0.047U_0402_16V4Z~D

2

1

1

C555
0.047U_0402_16V4Z~D

+3.3V_PCIE_SATA_WAN

+3.3V_WLAN

+3.3V_RUN

2PCIE_MCARD1_DET#
0_0402_5%~D

+3.3V_WLAN
JMINI2

PCIE_WAKE#
1
2 0_0402_5%~D
1
2 0_0402_5%~D

34,39 PCIE_WAKE#
COEX2_WLAN_ACTIVE R440
COEX1_BT_ACTIVE
R441

41 COEX2_WLAN_ACTIVE
41 COEX1_BT_ACTIVE

TYCO_1775861-1~D

1

2
100K_0402_5%~D

D

+3.3V_PCIE_SATA_WAN
JMINI1
1 1
3 3
5 5
MINI1CLK_REQ#
7 7
16 MINI1CLK_REQ#
9 9
CLK_PCIE_MINI1#
11 11
16 CLK_PCIE_MINI1#
CLK_PCIE_MINI1
13 13
16 CLK_PCIE_MINI1
15 15
17 17
19 19
21 21
PCIE_PRX_WWANTX_N1_SW
23 23
35 PCIE_PRX_WWANTX_N1_SW
PCIE_PRX_WWANTX_P1_SW
25 25
35 PCIE_PRX_WWANTX_P1_SW
27 27
29 29
PCIE_PTX_WWANRX_N1_C_SW
31 31
35 PCIE_PTX_WWANRX_N1_C_SW
PCIE_PTX_WWANRX_P1_C_SW
33 33
35 PCIE_PTX_WWANRX_P1_C_SW
35 35
PCIE_MCARD2_DET#
37 37
18 PCIE_MCARD2_DET#
39 39
41 41
43 43
45 45
47 47
49 49
MCARD_PCIE_SATA#
51 51
35,39 MCARD_PCIE_SATA#

1

1
R443

D21
RB751S40T1_SOD523-2~D

USB_MCARD2_DET# 1
@ R740

C570
0.047U_0402_16V4Z~D

1

C569
33P_0402_50V8J~D

D

39 WLAN_RADIO_DIS#

2
100K_0402_5%~D
2
100K_0402_5%~D

1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

C572
4700P_0402_25V7K~D
B

+1.5V_RUN

Confirm with DELL about UWB

UWB_RADIO_DIS#
2
1 PCH_PLTRST#_EC
R456
0_0402_5%~D

USBP13USBP13+
USB_MCARD3_DET#

UWB_RADIO_DIS# 39

USBP13- 18
USBP13+ 18
USB_MCARD3_DET# 15
2
R266

1
100K_0402_5%~D

+3.3V_ALW_PCH

54

TYCO_1775861-1~D
A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Mini Card
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

36

of

69

5

4

15 ESATA_PTX_DRX_P4_C
15 ESATA_PTX_DRX_N4_C
15 ESATA_PRX_DTX_P4_C

@ R1513
0_0402_5%~D
1
2 EN_ESATA_RPTR#

2

IO1

IO2

3

+3.3V_RUN
FP_USB_D+

3

S

2

18

USBP2+
USBP2-

USBP2+
USBP2-

1

1

2

USBP2_D+
USBP2_D-

2

18

USBP3+

USBP3+

18

L31
HCMC0805-900MFS_4P~D
4 4
3 3

USBP3-

USBP3-

1

1

1

2

USBP3_D+

2
0_0402_5%~D

1
@ R425

2
0_0402_5%~D

1
@ R427

2
0_0402_5%~D

1
+
2

1

2

USBP3_DUSBP3_D+

1
2
3
4

USBP2_DUSBP2_D+

5
6
7
8

2 SATA_PTX_DRX_P4
0.01U_0402_16V7K~D
2 SATA_PTX_DRX_N4
0.01U_0402_16V7K~D
2 SATA_PRX_DTX_N4
0.01U_0402_16V7K~D
2 SATA_PRX_DTX_P4
0.01U_0402_16V7K~D

JIO1

+5V_ALW

WIRELESS_ON#/OFF
LAT_ON_SW_BTN#

TPBP0
TPBN0

2
USBP3_D+

GND
A+
ESATA
AGND
BB+
GND

16
17
18
19

G1
G2
G3
G4

1

3

V I/O

V I/O

Ground V BUS
V I/O

V I/O

USBP2_D+

5
4

+5V_ALW_USB
USBP3_D-

PCH_AZ_MDC_SDIN1

PCH_AZ_MDC_SYNC
15 PCH_AZ_MDC_SYNC
1
2 MDC_SDIN
PCH_AZ_MDC_RST1#
R10
33_0402_5%~D

GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK

2
4
6
8
10
12

2

Place close
to JIO1.36

1

4

2

2

W=20 mil
PCH_AZ_MDC_BITCLK

PCH_AZ_MDC_BITCLK 15
1

2
TYCO_1-1775149-2~D

Connector for MDC Rev1.5
LID_CL#

2

B

+3.3V_ALW_PCH
PCH_AZ_MDC_SDOUT

15 PCH_AZ_MDC_SDOUT

1
3
5
7
9
11

13
14
15
16
17
18

Place close
to JIO1.30

1

1

PCH_AZ_MDC_RST1#

3

Q35
SSM3K7002FU_SC70-3~D

JMDC1

33
33

+LOM_VCT_IO

1

R1301
0_0402_5%~D

MDC CONN. H=5.5, Pitch=0.8

R15
C15
10_0402_5%~D
10P_0402_50V8J~D
PCH_AZ_MDC_BITCLK 2
1 BITCLK_TERM
1
2
PCH_AZ_MDC_SDOUT 2

1

SDOUT_TERM

@ R16
10_0402_5%~D

1

1

2

A

2

@C32
@
C32
10P_0402_50V8J~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

USB 2.0 PORT
Size

3

2

Document Number

Rev
0.1

LA-5573P
Date:

5

ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP

39 MDC_RST_DIS#

C685
0.1U_0402_16V4Z~D

2

9
10
11
12
13
14
15

IP4223CZ6_SO6~D

15 PCH_AZ_MDC_SDIN1

@C712
@
C712
1U_0402_6.3V6K~D

Place close
to JIO1.13

+VREFOUT
1

RX_2N
RX_2P

62

C634
0.1U_0402_16V4Z~D

2

C768
0.1U_0402_16V4Z~D

1

A

ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP

12
11

+5V_ALW
6

LOTES_YEA-BTB-018-160K12

+3.3V_LAN

15
14

C

15 PCH_AZ_MDC_RST#
1

33
33

TPBP0
TPBN0

TX_1P
TX_1N

A_VBUS
A_DA_D+
A_GND
USB
B_VBUS
B_DB_D+
B_GND

@ D4
USBP2_D-

WIRELESS_ON#/OFF 39
LAT_ON_SW_BTN# 40
AUD_HP_NB_SENSE 29,39

TPAP0
TPAN0

GND
GND
GND
GND
GND
PAD

FCI_10100446-003RLF

AUD_HP_OUT_L 29
AUD_HP_OUT_R 29
TPAP0
TPAN0

9
8

1

G2

AUD_EXT_MIC_L 29
AUD_EXT_MIC_R 29

LID_CL#

PE1
PE2

2

G1

DETECT_GND

+VREFOUT
AUD_MIC_SWITCH 29
LAN_ACTLED_YEL# 30
LED_10_GRN# 30
LED_100_ORG# 30
LID_CL#
39,43
+LOM_VCT_IO
USB_SIDE_EN# 39
USB_OC0#
18

TX_2P
TX_2N

3
13
17
18
19
21

C13
0.1U_0402_16V4Z~D

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

5
4

C12
4.7U_0603_6.3V6M~D

61

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

6
10
16
20

GND
GND
GND
GND
GND
GND

B

1
30 SW_LAN_TX3+
3
30 SW_LAN_TX35
7
30 SW_LAN_TX29
30 SW_LAN_TX2+
11
13
30 SW_LAN_TX1+
15
30 SW_LAN_TX117
19
30 SW_LAN_TX021
30 SW_LAN_TX0+
23
25
+3.3V_LAN
27
29
18
USBP0+
31
18
USBP033
35
18
USBP1+
37
18
USBP139
41
43
45
47
BREATH_BLUE_LED_SNIFF 49
43 BREATH_BLUE_LED_SNIFF
POWER_SW#_MB
51
40,41 POWER_SW#_MB
53
1
+3.3V_ALW
C623
55
0.1U_0402_16V4Z~D
57
59
19
IO_LOOP
2

VCC
VCC
VCC
VCC

JESA1

ESATA_PTX_DRX_P4_RP
1
C1376
ESATA_PTX_DRX_N4_RP
1
C1377
ESATA_PRX_DTX_N4_RP
1
C549
ESATA_PRX_DTX_P4_RP
1
C550

I/O board 60 pin CONN.

RX_1P
RX_1N

EN

D

@

+5V_ESATA/USB2

C548
0.1U_0402_16V4Z~D

1
@ R426

C588
150U_D2_6.3VY_R15M~D

2
0_0402_5%~D

2

1
2

2

@

SN75LVCP412ARTJR_QFN20_4X4~D

USBP3_D-

2

1
@ R424

1

C545
0.1U_0402_16V4Z~D

@ Q210
SSM3K7002FU_SC70-3~D

+

18

7

ESATA_PTX_DRX_P4
0.01U_0402_16V7K~D
ESATA_PTX_DRX_N4
0.01U_0402_16V7K~D
1 ESATA_PRX_DTX_P4
0.01U_0402_16V7K~D
1 ESATA_PRX_DTX_N4
0.01U_0402_16V7K~D
1

D

1

C

ESATA_PTX_DRX_P4_C 2
C304
ESATA_PTX_DRX_N4_C 2
C303
ESATA_PRX_DTX_P4_C 2
C1380
ESATA_PRX_DTX_N4_C 2
C1381

+5V_ESATA/USB3

ESATA_PWRSAVE 2
G

PRTR5V0U2X_SOT143-4~D

L30
HCMC0805-900MFS_4P~D
4 4
3 3

2

1

FP_USB_D-

1

1

2

4

15 ESATA_PRX_DTX_N4_C

EN_ESATA_RPTR# 15,19

C544
150U_D2_6.3VY_R15M~D

VCC

1

GND

2

0_0402_5%~D
U95

U51
1

@ R1497
0_0402_5%~D
1
2 ESATA_PWRSAVE

EN_ESATA_RPTR

39 EN_ESATA_RPTR

+3.3V_RUN Place close to
JBIO1.1

TYCO_2041070-6~D

1

R1494

R1300
0_0402_5%~D
2
1
2
1

2

ESATA Repeater

TPS2560DRCR-PG1.1_SON10_3X3~D

0_0402_5%~D

31

+3.3V_RUN

R1299

FP_RESET#

18

0_0402_5%~D

1

USB_OC1#

R28 1
2
24.9K_0402_1%~D

R1298

+3.3V_RUN
FP_USB_DFP_USB_D+

C770
0.1U_0402_16V4Z~D

1
2
3
4
5
6
7
8

2

USB_OC1#

10
9
8
7
6
11

C1379
0.1U_0402_16V4Z~D

2

+3.3V_RUN
JBIO1

39 ESATA_USB_PWR_EN#

GND FAULT1#
IN
OUT1
IN
OUT2
EN1#
ILIM
EN2# FAULT#2
T-PAD

C1378
0.01U_0402_16V7K~D

Fingerprint CONN. 105 degree

1

U53
1
2
3
4
5

+5V_ALW_USB

C547
10U_1206_16V4Z~D

1

C546
0.1U_0402_16V4Z~D

+5V_RUN Place close to
JBIO1.6

D

1
2
3
4
5
6
GND
GND

PJP23
JUMP_43X79
2 2
1 1

FP_USB_D-

3

3

2
0_0402_5%~D
2
0_0402_5%~D

R325
100K_0402_5%~D

+5V_ALW
4

1
R422
1
R423

+5V_ESATA/USB2

S

4

+5V_ESATA/USB3
FP_USB_D+

D

31 FP_USBD-

@ L29
DLW21SN121SQ2L_4P~D
1
2 2

1

2
G

1

2

R326
10K_0402_5%~D

31 FP_USBD+

3

Thursday, January 21, 2010

Sheet
1

37

of

69

2

1

JDOCK1
DOCK_DET_1
30 DOCK_LOM_SPD10LED_GRN#
26 DPB_DOCK_CA_DET

DPB_DOCK_CA_DET

26 DPB_DOCK_LANE_P0
26 DPB_DOCK_LANE_N0
26 DPB_DOCK_LANE_P1
26 DPB_DOCK_LANE_N1
26 DPB_DOCK_LANE_P2
26 DPB_DOCK_LANE_N2
26 DPB_DOCK_LANE_P3
26 DPB_DOCK_LANE_N3
DPB_DOCK_AUX
DPB_DOCK_AUX#

26 DPB_DOCK_AUX
26 DPB_DOCK_AUX#
26 DPB_DOCK_HPD

DPB_DOCK_HPD
+NBDOCK_DC_IN_SS
1

C985
0.033U_0402_16V7K~D

B

Close to DOCK
Its for Enhance ESD on dock issue.

BLUE_DOCK

27 BLUE_DOCK
2
27

RED_DOCK

RED_DOCK

GREEN_DOCK

27 GREEN_DOCK
27 HSYNC_DOCK
27 VSYNC_DOCK

+3.3V_RUN

1

40

DAI_DI
DAI_DO#

3

DPB_DOCK_AUX

5

39
39

D_LAD0
D_LAD1

39
39

D_LAD2
D_LAD3

39
39

+3.3V_RUN

D_LFRAME#
D_CLKRUN#

4

6

29 DAI_12MHZ#

39
39

1

Q211A
DMN66D0LDW-7_SOT363-6~D
DPB_DOCK_CA_DET
2

18 CLK_PCI_DOCK

2

1

R1506
2.2K_0402_5%~D

D_SERIRQ
D_DLDRQ1#

2
0_0402_5%~D

D
Q212
SSM3K7002FU_SC70-3~D

40 DOCK_PWR_BTN#

S

1
@ R1520
1

2
D64

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_GPU_LANE_P1 54
DPC_GPU_LANE_N1 54

DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2

C360 2
C362 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_GPU_LANE_P2 54
DPC_GPU_LANE_N2 54

DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3

C364 2
C363 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_GPU_LANE_P3 54
DPC_GPU_LANE_N3 54

DPC_DOCK_AUX
DPC_DOCK_AUX#

DPC_GPU_DOCK_HPD
ACAV_DOCK_SRC# 52

2
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5

2
C586 2
C587
1
C306 1
C305

SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5

1
1 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
2
2 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D

SATA_PRX_DKTX_P5_C 15
SATA_PRX_DKTX_N5_C 15

B

Close to DOCK
Its for Enhance ESD on dock issue.

SATA_PTX_DKRX_P5_C 15
SATA_PTX_DKRX_N5_C 15

USBP9+ 18
USBP9- 18
CLK_KBD 40
DAT_KBD 40

BREATH_LED# 40,43
DOCK_LOM_ACTLED_YEL# 30
DOCK_LOM_TRD0+ 30
DOCK_LOM_TRD0- 30
DOCK_LOM_TRD1+ 30
DOCK_LOM_TRD1- 30

+LOM_VCT
1

+LOM_VCT
DOCK_LOM_TRD2+ 30
DOCK_LOM_TRD2- 30

2

C42
1U_0402_6.3V6K~D

DOCK_DET#

+3.3V_ALW
R1038
100K_0402_5%~D
1
2

DOCK_LOM_TRD3+ 30
DOCK_LOM_TRD3- 30
DOCK_DCIN_IS+ 51
DOCK_DCIN_IS- 51
D71
RB751S40T1_SOD523-2~D
1
2

DOCK_POR_RST# 40
DOCK_DET_R#

DOCK_DET#

39

+DOCK_PWR_BAR

1

2

1

2

@

Reserve for EMI test
A

DPB_DOCK_HPD

DPC_GPU_DOCK_HPD

+3.3V_RUN
1

1

4

6

C986
0.033U_0402_16V7K~D

USBP8+ 18
USBP8- 18

DPC_DOCK_AUX

5
Q213A
DMN66D0LDW-7_SOT363-6~D
DPC_CA_DET
2

DPC_GPU_DOCK_HPD 53

1

DAT_DDC2_DOCK 27
CLK_DDC2_DOCK 27

149
150
151
152
159
160
161
162
163
164

DPC_DOCK_AUX 25
DPC_DOCK_AUX# 25

2

3

JAE_WD2F144WB1

C355 2
C313 2

Q216
SSM3K7002FU_SC70-3~D

2
G
Q213B
DMN66D0LDW-7_SOT363-6~D

2

Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G

DPC_GPU_LANE_P0 54
DPC_GPU_LANE_N0 54

DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1

CLK_PCI_DOCK

2

1
R1518
100K_0402_5%~D

Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

R796
100K_0402_5%~D

S

2
0_0402_5%~D

2

153
154
155
156
157
158

PWR2
PWR2
PWR2
GND2

C361 2
C357 2

R798
100K_0402_5%~D

D

3

R1519
100K_0402_5%~D

2

@

SM24.TCT_SOT23-3~D

1

1

+3.3V_ALW2

2

R1507
2.2K_0402_5%~D

1

GND1
PWR1
PWR1
PWR1

DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0

C1033
0.1U_0603_50V4Z~D

+15V_ALW

1

C1034
0.1U_0603_50V4Z~D

C1898
4.7U_0805_25V6K~D

+3.3V_RUN

145
146
147
148

DOCK_AC_OFF 39,52
DOCK_LOM_SPD100LED_ORG# 30
DPC_CA_DET 25

DPC_CA_DET

C1899
4.7U_0805_25V6K~D

+DOCK_PWR_BAR

DPB_DOCK_AUX#

A

SLICE_BAT_PRES#

39,44,52 SLICE_BAT_PRES#

3

3

2
G

40 DOCK_SMB_CLK
40 DOCK_SMB_DAT
40,44 DOCK_SMB_ALERT#
44 DOCK_PSID

1

1

1
@ R1517

DOCK_AC_OFF

1

1

Q214
SSM3K7002FU_SC70-3~D

2
G
Q211B
DMN66D0LDW-7_SOT363-6~D

2

29
29

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

@ R462
10_0402_5%~D
2

1
3

S

2

D

2
0_0402_5%~D

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

2

1

1
@ R1516

R1515
100K_0402_5%~D

R1514
100K_0402_5%~D

DAI_BCLK#
DAI_LRCK#

2

R1505
2.2K_0402_5%~D
+3.3V_ALW2

29
29

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

1

+15V_ALW

40
CLK_MSE
DAT_MSE

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

1

2

@C590
@C590
4.7P_0402_50V8C~D

2

1

R1508
2.2K_0402_5%~D

1

D

3

1
@R1521
@
R1521

S

2
0_0402_5%~D

Compal Electronics, Inc.

Q215
SSM3K7002FU_SC70-3~D

2
G

Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DPC_DOCK_AUX#
2

DOCKING CONN
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
1

Sheet

38

of

69

5

4

3

2

1

+3.3V_ALW
PCIE_WAKE#
2
10K_0402_5%~D
SLICE_BAT_PRES#
2
100K_0402_5%~D
DCIN_CBL_DET#
2
100K_0402_5%~D

1
R501
1
R503
1
R862

+3.3V_ALW

1

2

1
C1072
10U_0805_10V4Z~D

2

C648
0.1U_0402_16V4Z~D

1

2

C652
0.1U_0402_16V4Z~D

1

1

C649
0.1U_0402_10V7K~D
2

2

C650
0.1U_0402_16V4Z~D
D

VGA_ID_DISC
VGA_ID_UMA

1
@R522
@
R522
1
R558

2
100K_0402_5%~D
2
100K_0402_5%~D

VGA_ID_UMA

VGA_ID_DISC

Discrete

0

1

UMA

1

0

SG

1

1

30 LAN_DISABLE#_R
43
CAP_LED#
43 SYS_LED_MASK#
24 ALS_INT#
19 SIO_EXT_WAKE#
37 EN_ESATA_RPTR
17 PCH_PCIE_WAKE#
36 WLAN_RADIO_DIS#
36 WWAN_RADIO_DIS#
53 GPU_CLKDWN

36 UWB_RADIO_DIS#

B17
B18

LAN_DISABLE#_R
SYS_LED_MASK#
ALS_INT#
R526 1
2 0_0402_5%~D
EN_ESATA_RPTR
PCH_PCIE_WAKE#
WLAN_RADIO_DIS#

B47
A45
B48
A46
B49
A47
B50
A48

WWAN_RADIO_DIS#
GPU_CLKDWN

A53
B57

VGA_ID_UMA
VGA_ID_DISC
UWB_RADIO_DIS#
R528
10K_0402_5%~D
2
1

BCM5882_ALERT#

B58
A55
B59
A56
B60
A57
B61
A58
B62
A59

GPIOI[7]
GPIOI[4]
GPIOI[3]

LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ

LPC

GPIOD[1]
GPIOD[2]
GPIOD[3]/VBUS_DET
GPIOD[4]/OCS1_N
GPIOD[5]/OCS2_N
GPIOD[6]/OCS3_N
GPIOD[7]/OCS4_N

CLKI (14.318 MHz)

GPIOH[6]
GPIOH[7]

VSS

GPIOG[0]
GPIOG[1]
GPIOG[2]
GPIOG[3]
GPIOG[4]
GPIOG[5]
GPIOG[6]
GPIOG[7]

DLPC

DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLK_RUN#
DLDRQ1#
DSER_IRQ

SYSOPT1/GPIOH[2]
SYSOPT0/GPIOH[3]
PWRGD
GPIOF[7]
GPIOF[6]
GPIOF[5]
GPIOF[4]

OUT65
GPIOJ[4]
VSS
GPIOK[7]
VSS
VSS
VSS
VSS
VSS
GPIOJ[1]

IRTX
IRRX
GPIOF[3]/IRMODE/IRRX3B
GPIOF[2]/IRTX2
GPIOF[1]/IRRX2
GPIOF[0]/IRMODE/IRRX3A

2
1
R514
1K_0402_5%~D

A63
B65
A61

DOCK_AC_OFF_EC

ACAV_IN_NB

C1051
0.1U_0402_16V4Z~D
1
2

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
CLK_PCI_5028
CLKRUN#
LPC_LDRQ0#
LPC_LDRQ1#
IRQ_SERIRQ

A32

CLK_SIO_14M

1
100K_0402_5%~D

2
R518

1
100K_0402_5%~D

0.75V_DDR_VTT_ON 2
R520
PBATT_OFF
2
R521

1
100K_0402_5%~D
1
100K_0402_5%~D

C

40,51,52

ACAV_IN_NB

1

B

2

A

O

SIO_SLP_S3# 17
SIO_SLP_S4# 17

A27
A26
B26
B25
A21
B22
A28
B20
A23
A22
B21

2
R515

CPU_VTT_ON

D_DLDRQ1#

+3.3V_ALW

4
2
1
D65
RB751S40T1_SOD523-2~D

U69
TC7SH08FU_SSOP5~D

DOCK_AC_OFF 38,52

R1078
33K_0402_5%~D

LPC_LAD[0..3] 15,31,32,40

LPC_LFRAME# 15,31,32,40
PCH_PLTRST#_EC 8,18,32,34,36,40
CLK_PCI_5028 18
CLKRUN# 17,32,40
LPC_LDRQ0# 15
LPC_LDRQ1# 15
IRQ_SERIRQ 15,31,32,40
CLK_SIO_14M 16

CLK_SIO_14M

CLK_PCI_5028

B51
D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_LFRAME#
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ

B29
B28
A25
A24
B23
A19
B24
A20

D_LAD0
38
D_LAD1
38
D_LAD2
38
D_LAD3
38
D_LFRAME# 38
D_CLKRUN# 38
D_DLDRQ1# 38
D_SERIRQ 38

A4

RUNPWROK_R1

B56

SP_TPM_LPC_EN

ME_FWP

@R506
@
R506
10_0402_5%~D

1
@C654
@
C654
4.7P_0402_50V8C~D

R1130
10K_0402_5%~D
1

1

2

C656
4.7P_0402_50V8C~D

2

+3.3V_RUN

SP_TPM_LPC_EN 31,32

GPIO_PSID_SELECT 44

+3.3V_ALW

SPI_WP#_SEL 15

1

2

R527
10_0402_5%~D
B

@ R649
1K_0402_5%~D

C657
4.7U_0603_6.3V6M~D

R524
100K_0402_5%~D

+3.3V_RUN
1

A6
A9
A12
A18
B27
B39
A44
B64
A64

2

TP_DET#

41

R1288
8.2K_0402_5%~D

C1

ECE5028-LZY_DQFN132_11X11~D

B19

RUN_ON

D_SERIRQ

IMVP_VR_ON 50
IMVP_PWRGD 8,50
0.75V_DDR_VTT_ON 47

AUX_EN_WOWL 35

1
10K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D

D_CLKRUN#

DOCK_AC_OFF_EC 52

EP

31 BCM5882_ALERT#

SLICE_BAT_PRES#

TEST

1
2
R509
0_0402_5%~D
0.75V_DDR_VTT_ON
8mil

2
R1531
2
R510
2
R511
2
R512

+3.3V_RUN

DP_PRIORITY 26
1.8V_RUN_PWRGD 47
RUN_ON
12,34,42,47,62

RUN_ON
CPU_CATERR#

ME_FWP

1

VGA_ID_DISC
2
100K_0402_5%~D
VGA_ID_UMA
2
100K_0402_5%~D

1
R875
1
@ R881

B

B33
B15
A15
B16
A16

GPIO

TEST_PIN

DP_PRIORITY

B66
A62
A60
B46 +CAP_LDO
B67

2

DOCK_HP_DET 29
CRT_SWITCH 27
ME_FWP
15

1
100K_0402_5%~D

2

38,44,52 SLICE_BAT_PRES#

DGPU_PWR_EN
VCORE_LL_SELECT
MCARD_PCIE_BKT_PWREN
HDDC_EN
MODC_EN

GPIOI[6]
GPIOI[5]
GPIOI[2]
CAP_LDO
GPIOJ[0]

SIO_SLP_LAN# 17,30

DOCK_HP_DET
CRT_SWITCH
ME_FWP

2
R756

1

+3.3V_ALW

B32
A31

SIO_SLP_LAN#

TP_DET#

2

62 DGPU_PWR_EN
50 VCORE_LL_SELECT
35 MCARD_PCIE_BKT_PWREN
28
HDDC_EN
28
MODC_EN

ALS_INT#
2
2.2K_0402_5%~D

1
R258

LID_CL_SIO#
CPU_VTT_ON

A5
B6
A7
B7
A8
B9
A10
B10
A11
B12

1

17,48

1

49 CPU_VTT_ON

USB_SIDE_EN#
EN_I2S_NB_CODEC#
USH_PWR_STATE#
EN_DOCK_PWR_BAR

GPIOJ[2]
GPIOJ[3]
GPIOJ[6]
GPIOJ[5]
GPIOK[0]
GPIOK[1]
GPIOK[3]
GPIOK[2]
GPIOK[5]
GPIOK[6]

DOCK_MIC_DET 29
TEMP_ALERT# 15,19
SIO_SLP_M#

2

+3.3V_RUN

ENVDD_GPU
LCD_TST
PSID_DISABLE#
PANEL_BKEN_DGPU
DOCKED
DOCK_DET#
AUD_NB_MUTE
MCARD_WWAN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR_EN#

GPIOB[0]/INIT#
GPIOB[1]/SLCTIN#
GPIOC[2]/SLCT
GPIOC[3]/PE
GPIOC[4]/BUSY
GPIOC[5]/ACK#
GPIOC[6]/ERROR#
GPIOC[7]/ALF#
GPIOD[0]/STROBE#
GPIOC[1]/PD7
GPIOC[0]/PD6
GPIOB[7]/PD5
GPIOB[6]/PD4
GPIOB[5]/PD3
GPIOB[4]/PD2
GPIOB[3]/PD1
GPIOB[2]/PD0

GFX_MEM_VTT_ON

SIO_SLP_M#

1

24,53 ENVDD_GPU
24
LCD_TST
44 PSID_DISABLE#
53 PANEL_BKEN_DGPU
30
DOCKED
38 DOCK_DET#
29 AUD_NB_MUTE
35 MCARD_WWAN_PWREN
24 LCD_VCC_TEST_EN
24 CCD_OFF
29,37 AUD_HP_NB_SENSE
37 ESATA_USB_PWR_EN#

A33
B36
A34
B37
A35
B38
A36
A37
B40
A38
B41
A39
B42
A40
B43
A41
B44

DGPU_PWROK
MCARD_PCIE_SATA#
EXPRCRD_DET#

B63

2

37 USB_SIDE_EN#
29 EN_I2S_NB_CODEC#
31 USH_PWR_STATE#
52 EN_DOCK_PWR_BAR

GPIOE[0]/RXD
GPIOE[1]/TXD
GPIOE[2]/RTS#
GPIOE[3]/DSR#
GPIOE[4]/CTS#
GPIOE[5]/DTR#
GPIOE[6]/RI#
GPIOE[7]/DCD#

GPIOI[1]

2

55 GFX_MEM_VTT_ON

A1
B2
A2
B3
A3
B45
A42
B4

GPIO

DOCK_MIC_DET
TEMP_ALERT#

+3.3V_ALW

1

19,62 DGPU_PWROK
35,36 MCARD_PCIE_SATA#
34 EXPRCRD_DET#

GPIOH[0]
GPIOH[1]
GPIOH[4]
GPIOH[5]
BC_INT#
BC_DAT
BC_CLK

WIRELESS_ON#/OFF
BT_RADIO_DIS#
EXPRCRD_PWREN#
EXPRCRD_STDBY#
BC_INT#_ECE5028
BC_DAT_ECE5028
BC_CLK_ECE5028

ECE5028-LZY

B68
B35
B34
B1
B5
B8
B11

5

WIRELESS_ON#/OFF
2
100K_0402_5%~D
SP_TPM_LPC_EN
2
10K_0402_5%~D
LCD_TST
2
100K_0402_5%~D
PANEL_BKEN_DGPU
2
10K_0402_5%~D
SYS_LED_MASK#
2
10K_0402_5%~D
DGPU_PWR_EN
2
100K_0402_5%~D
GFX_MEM_VTT_ON
2
100K_0402_5%~D

1
R874
1
@ R788
1
R816
1
R505
1
R658
1
R1318
1
R1319

B13
A13
B14
A14
A29
B31
A30

DCIN_CBL_DET#
PBATT_OFF
MDC_RST_DIS#
PCIE_WAKE#

+3.3V_ALW

NC
NC
NC
NC
VCC1
GPIOJ[7]
GPIOK[4]

P

37 WIRELESS_ON#/OFF
41 BT_RADIO_DIS#
34 EXPRCRD_PWREN#
34 EXPRCRD_STDBY#
40 BC_INT#_ECE5028
40 BC_DAT_ECE5028
40 BC_CLK_ECE5028

GPIOA[0]
GPIOA[1]
GPIOA[2]
GPIOA[3]
GPIOA[4]
GPIOA[5]
GPIOA[6]
GPIOA[7]

G

+3.3V_RUN

B52
A49
B53
A50
B54
A51
B55
A52

3

USB_SIDE_EN#
2
10K_0402_5%~D
ESATA_USB_PWR_EN#
2
10K_0402_5%~D

1
R502
1
R923

PBAT_PRES#

C653
0.1U_0402_16V4Z~D

44 PBAT_PRES#
43 SCRL_LED#
43
NUM_LED#
44 DCIN_CBL_DET#
52
PBATT_OFF
37 MDC_RST_DIS#
34,36 PCIE_WAKE#

VCC1
VCC1
VCC1
VCC1

U35

+3.3V_ALW2

C

A17
B30
A43
A54

D

LID_CL_SIO#

R525
10_0402_5%~D
2
1

LID_CL#

LID_CL#

37,43

2

1
+1.05V_1.1V_RUN_VTT
R1289
C
2.2K_0402_5%~D
1
2
2
B
Q182 E
PMST3904_SOT323-3~D
1

CPU_CATERR#
2

1

3

A

2

C655
0.047U_0402_16V4Z~D
A

C1372
0.1U_0402_16V4Z~D

8 H_CATERR#

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

ECE5028
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

39

of

69

5

4

3

2

1

1

+RTC_CELL

R539
100K_0402_5%~D

2

LAT_ON_SW#
ALWON
VCI_IN1#
POWER_SW_IN#
ACAV_IN
DOCK_PWR_SW#

ALWON

1
1 0_0402_5%~D
0_0402_5%~D

1
2
2

DAT_MSE

2

+3.3V_RUN
CKG_FFS_SMBDAT
R578
10K_0402_5%~D

23

1

1
2.2K_0402_5%~D
1
2.2K_0402_5%~D

FWP#

@ R586
10K_0402_5%~D

45

B

1=JTAG interface Reset disabled
0=Reset JTAG interface
2

HDD_SMBDAT 28
HDD_SMBCLK 28

+RTC_CELL

+RTC_CELL

ACAV_IN

23,51,52

VCI_IN1#

1

2
R657

2

1
100K_0402_5%~D

@ C1884
1U_0402_6.3V6K~D

LAT_ON_SW#

1
R1492

2
10K_0402_5%~D

LAT_ON_SW_BTN# 37

C1885
1U_0402_6.3V6K~D

+3.3V_ALW

1

@

X00
X01
X02
X03

1

JTAG1
@SHORT PADS~D
@

2

2

A

2

240K 4700p
130K 4700p
33K 4700p
4.3K 4700p
2K 4700p
1K 4700p
4700p
4700p

REV

1

C919

2

R98

A00

DELL CONFIDENTIAL/PROPRIETARY

D

Compal Electronics, Inc.

Q189
SSM3K7002FU_SC70-3~D

2
G
3

2
R540
2
R542

CKG_FFS_SMBCLK

2

1
2
1

PCH_PWRGD#

1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D

+3.3V_ALW

2
1

C671
4.7U_0603_6.3V6M~D
8mil

2
R640
100K_0402_5%~D

2
R569
2
R570
2
R571
2
R572

1

15mil

BOARD_ID

1
8.2K_0402_5%~D

JTAG_RST#
R98
1K_0402_5%~D

1

4

CLK_MSE

R560
100K_0402_5%~D

2

2

+5V_RUN

1

1

1
100K_0402_5%~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D

@ R5

1

A59
B63
A60
A63
B67
B1
A1

2
R1512
2
R565
2
R567

RESET_OUT#

DOCK_SMB_DAT 38
DOCK_SMB_CLK 38
LCD_SMBDAT 24
LCD_SMBCLK 24
CKG_FFS_SMBDAT 6
CKG_FFS_SMBCLK 6
DAI_GPU_R3P_SMBDAT 23,29,53
DAI_GPU_R3P_SMBCLK 23,29,53
CHARGER_SMBDAT 51
CHARGER_SMBCLK 51
CARD_SMBDAT 34
CARD_SMBCLK 34
USH_SMBDAT 31
USH_SMBCLK 31

2
@ R446 2
@ R508

+3.3V_M

RESET_OUT#

DOCK_SMB_DAT

DAT_KBD
DOCK_SMB_DAT
DOCK_SMB_CLK
LCD_SMBDAT
LCD_SMBCLK
CKG_FFS_SMBDAT
CKG_FFS_SMBCLK
DAI_GPU_R3P_SMBDAT
DAI_GPU_R3P_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
CARD_SMBDAT
CARD_SMBCLK
USH_SMBDAT
USH_SMBCLK

A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50

MEC5045-LZY_DQFN132_11X11~D

2

PCH_PWRGD#

18,28

DOCK_SMB_CLK

EP

VR_CAP[1]

VSS_RO

C1

B54

B66

CPU_DETECT#
HDD_FALL_INT

2

A

5

DOCK_SMB_ALERT#
38,44
FFS_INT1
@ R635 2 DOCK_SMB_ALERT#
1
CPU_DETECT#
0_0402_5%~D
CPU_DETECT# 8
ME_SUS_PWR_ACK
ME_SUS_PWR_ACK 17
1.5V_SUS_PWRGD
1.5V_SUS_PWRGD 46
PM_MEPWROK
PM_MEPWROK 17
1.05V_M_PWRGD
1.05V_M_PWRGD 48
ALW_PWRGD_3V_5V
ALW_PWRGD_3V_5V 45
ODD_DET#
ODD_DET#
28
RESET_OUT#
RESET_OUT# 15,17
M_ON
M_ON
42,48
PCH_RSMRST#
PCH_RSMRST# 17
AC_PRESENT
AC_PRESENT 17
SIO_PWRBTN#
SIO_PWRBTN# 17

+3.3V_ALW

2
2

1

B64

A11
A22
B35
A41
A58
A52
B3
A26

23 EC_32KHZ_OUT

@ C673
4.7P_0402_50V8C~D

BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#

XTAL1
XTAL2
GPIO160/32KHZ_OUT

NC1
NC2
NC3
NC4
NC5
NC6
NC7
2

C675
33P_0402_50V8J~D

2
10K_0402_5%~D
C

DELL PWR SW INF

@ R588
10_0402_5%~D

1

GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK

MASTER CLOCK
A61
A62
B62

B17
B34
A46
A48
B51
A64
B68
NC NC

1
R1231

+3.3V_ALW

B2
A2
B8
B18
A8
B9
A9
A14
B15
A17
B39
A44
B47
A54
B58

SMBUS INTERFACE

HOST INTERFACE

1
1

+3.3V_ALW_PCH
AC_PRESENT

CLK_KBD

GPIO011/nSMI
GPIO061/LPCPD#
LDRQ#
SER_IRQ
LRESET#
PCI_CLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
CLKRUN#
GPIO100/nEC_SCI

1

C674
33P_0402_50V8J~D

2

= Amber LED
= Blue LED

C1040
0.1U_0402_16V4Z~D

3

1

R585
100_0402_1%~D

4

2

8,13,14

CPU1.5V_S3_GATE 12
MSDATA
36
MSCLK
36
SIO_A20GATE 19
PS_ID
44
Bat2
BAT1_LED#
43
BAT2_LED#
43 Bat1

20mA drive pins

C919
4700P_0402_25V7K~D

1

R85
1K_0402_5%~D

24

DDR_HVREF_RST_GATE

DOCK_PWR_BTN# 38

2 C670
1U_0402_6.3V6K~D

+3.3V_ALW

CHIPSET_ID for BID
function

2
10K_0402_5%~D

1

A6
A27
B29
A28
B30
A29
B31
A30
B32
A31
B33
A32
A33

CLK_PCI_MEC

MEC_XTAL2

1
1 R554

2

@ C669
1U_0402_6.3V6K~D

1

SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC
IRQ_SERIRQ
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#

Place closely pin A29

Y4
32.768K_12.5PF_Q13MC30610018~D

CPU1.5V_S3_GATE
MSDATA
MSCLK
SIO_A20GATE
PS_ID
BAT1_LED#
BAT2_LED#
FWP#

DOCK_PWR_SW#

R550
100K_0402_5%~D

R579
10K_0402_5%~D

32 KHz
Clock
Same as Laguna

23 DOCK_PWR_SW#

SYSTEM_ID
DDR_HVREF_RST_GATE

D

1

2

BC_CLK_ECE1077
BC_DAT_ECE1077
BC_INT#_ECE1077
BEEP
SIO_SLP_S5#
ACAV_IN_NB

GPIO123/BCM_A_CLK
GPIO122/BCM_A_DAT
GPIO121/BCM_A_INT#
GPIO022/BCM_B_CLK
GPIO023/BCM_B_DAT
GPIO024/BCM_B_INT#
GPIO044/BCM_C_CLK
GPIO043/BCM_C_DAT
GPIO042/BCM_C_INT#
GPIO047/LSBCM_D_CLK
GPIO046/LSBCM_D_DAT
GPIO045/LSBCM_D_INT#
GPIO032/GPTP-IN3/BCM_E_CLK
GPIO31/GPTP-OUT2/BCM_E_DAT
GPIO30/GPTP-IN2/BCM_E_INT#

ACES_85204-06001~D

MEC_XTAL1

GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO26/GPTP-IN1
GPIO27/GPTP-OUT1
GPIO041
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4

BC-LINK
A43
B45
A42
A12
B13
A13
B20
A18
B19
A20
B21
A19
A16
B16
A15

MEC_XTAL1
1
0_0402_5%~D

2
R587

C651
0.1U_0402_16V4Z~D

2

DDR_ON
46,47
HOST_DEBUG_TX 36
HOST_DEBUG_RX 36

POWER_SW#_MB 37,41

+RTC_CELL

1

R1131
10K_0402_5%~D
2
1

EN_INVPWR

2
10K_0402_5%~D

GENERAL PURPOSE I/O

B12

MEC_XTAL2

SYSTEM_ID
BOARD_ID
DDR_ON
HOST_DEBUG_TX
HOST_DEBUG_RX
RUNPWROK
EN_INVPWR

A10
B10
B14
B44
B46
B26
A25
B36
B37
B38
A34
A35
A36
A40
B43
A45
A55
A57
B61
B65

1
R541

C659
1U_0402_6.3V6K~D

FAN PWM & TACH
GPIO050/FAN_TACH1
GPIO051/FAN_TACH2
GPIO052/FAN_TACH3
GPIO053/PWM0
GPIO054/PWM1
GPIO055/PWM2
GPIO056/PWM3

VSS[2]
VSS[5]
VSS[7]
VSS[8]

JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO

GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
GPIO021/RC_ID1
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
GPIO020/RC_ID2
GPIO110/PS2_CLK2/GPTP-IN6
GPIO025/UART_CLK
GPIO111/PS2_DAT2/GPTP-OUT6
GPIO120/UART_TX
GPIO112/PS2_CLK1A
GPIO124/GPTP-OUT5/UART_RX
GPIO113/PS2_DAT1A
VCC_PRWGD
GPIO114/PS2_CLK0A
GPIO060/KBRST
GPIO115/PS2_DAT0A
GPIO101/ECGP_SCLK
GPIO154/I2C1C_DATA/PS2_CLK1B
GPIO103/ECGP_SIN
GPIO155/I2C1C_CLK/PS2_DAT1B
GPIO105/ECGP_SOUT
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
JTAG INTERFACE
GPIO116/MSDATA
GPIO145/JTAG_TDI
GPIO117/MSCLK
GPIO146/I2C1K_CLK/JTAG_TDO
GPIO127/A20M
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
GPIO153/LED3
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
GPIO156/LED1
JTAG_RST#
GPIO157/LED2
nFWP

AGND

2
1

1
2

1

1

1
2

2

2

R583
10K_0402_5%~D

1
2
3
4
5
6

R584
10K_0402_5%~D

R582
10K_0402_5%~D

R581
10K_0402_5%~D

G1
G2

1
2
3
4
5
6

R580
49.9_0402_1%~D

@ JP2

7
8

VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]

VBAT
15,31,32,39 IRQ_SERIRQ
8,18,32,34,36,39 PCH_PLTRST#_EC
18 CLK_PCI_MEC
15,31,32,39 LPC_LFRAME#
15,31,32,39 LPC_LAD0
15,31,32,39 LPC_LAD1
15,31,32,39 LPC_LAD2
15,31,32,39 LPC_LAD3
17,32,39 CLKRUN#
19 SIO_EXT_SCI#

+3.3V_ALW

RUNPWROK

MISC INTERFACE

B27
B60
B11
B28

1

1

1

1
2

2

2

2

19 SIO_EXT_SMI#
19 SIO_RCIN#

ACES_85204-06001~D

B

41 BC_CLK_ECE1077
41 BC_DAT_ECE1077
41 BC_INT#_ECE1077
29
BEEP
17 SIO_SLP_S5#
39,51,52 ACAV_IN_NB

2

2

@ C658
1U_0402_6.3V6K~D

C918
4700P_0402_25V7K~D

HOST_DEBUG_TX
HOST_DEBUG_RX

2
2 0_0402_5%~D
0_0402_5%~D

B22
A21
B23
B24
A23
B25
A24

2

1

C668
0.1U_0402_16V4Z~D

R574
100K_0402_5%~D

MSCLK
MSDATA
1
R593 1
R577

R575
10K_0402_5%~D

G1
G2

1
2
3
4
5
6

R1410
10K_0402_5%~D

7
8

1
2
3
4
5
6

R576
10K_0402_5%~D

@ JDEG1

@

DOCK_POR_RST#
SUS_ON
AUX_ON
BREATH_LED#
PCH_ALW_ON
KYBRD_BKLT_PWM

BC_CLK_ECE5028
BC_DAT_ECE5028
BC_INT#_ECE5028
BC_CLK_EMC4002
BC_DAT_EMC4002
BC_INT#_EMC4002

39 BC_CLK_ECE5028
39 BC_DAT_ECE5028
39 BC_INT#_ECE5028
23 BC_CLK_EMC4002
23 BC_DAT_EMC4002
23 BC_INT#_EMC4002

+3.3V_ALW

A51
B55
B56
A53
B57

2

1

C667
0.1U_0402_16V4Z~D

38 DOCK_POR_RST#
42 SUS_ON
30
AUX_ON
38,43 BREATH_LED#
42 PCH_ALW_ON
41 KYBRD_BKLT_PWM

JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
C1053
0.1U_0402_16V4Z~D
1
2

2

1

C666
0.1U_0402_16V4Z~D

MSDATA
1
10K_0402_5%~D
M_ON
1
100K_0402_5%~D
AUX_ON
2
2.7K_0402_5%~D
DDR_ON
2
100K_0402_5%~D
SUS_ON
2
100K_0402_5%~D
PCH_ALW_ON
2
100K_0402_5%~D
DOCK_POR_RST#
2
100K_0402_5%~D
EN_INVPWR
2
100K_0402_5%~D

2
R589
2
R561
1
R563
1
R564
1
R566
1
R568
1
R1046
1
R595

2

1

C665
0.1U_0402_16V4Z~D

R27

2

1

+3.3V_RUN

PS/2 INTERFACE
A5
B6
A37
B40
A38
B41
A39
B42
B59
A56

2

1

C664
0.1U_0402_16V4Z~D

16 SML1_SMBDATA
16 SML1_SMBCLK
41
CLK_TP_SIO
41
DAT_TP_SIO
38 CLK_KBD
38
DAT_KBD
38 CLK_MSE
38
DAT_MSE
44 PBAT_SMBDAT
44 PBAT_SMBCLK

DAI_GPU_R3P_SMBDAT
2
2.2K_0402_5%~D
DAI_GPU_R3P_SMBCLK
2
2.2K_0402_5%~D

1

SML1_SMBDATA
SML1_SMBCLK
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK

1

C663
10U_0805_10V4Z~D

U36

+3.3V_RUN

1

1

2

PBAT_SMBDAT
2
2.2K_0402_5%~D
PBAT_SMBCLK
2
2.2K_0402_5%~D
LPC_LDRQ#_MEC
1
100K_0402_5%~D
CHARGER_SMBDAT
2
2.2K_0402_5%~D
CHARGER_SMBCLK
2
2.2K_0402_5%~D

R26

C660
0.1U_0402_16V4Z~D

C662
0.1U_0402_16V4Z~D

+RTC_CELL_VBAT
1

1
2
R544
0_0402_5%~D

2
1
R551
1
R552
2
@ R837
1
R29
1
R30

1

+3.3V_ALW

+RTC_CELL

C661
0.1U_0402_16V4Z~D

D

POWER_SW_IN#

23 POWER_SW_IN#

BC_DAT_ECE5028
2
100K_0402_5%~D
BC_DAT_EMC4002
1
100K_0402_5%~D
BC_DAT_ECE1077
1
100K_0402_5%~D
DOCK_SMB_ALERT#
1
10K_0402_5%~D

1
R543
2
R545
2
R546
2
R547

C

1

2

+3.3V_ALW

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

S

3

2

Title

EMC5045
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

40

of

69

5

4

3

2

BlueTooth

1

+3.3V_RUN
C1703
1
2

D

D

0.1U_0402_16V4Z~D

Touch Pad
JBT

1

1
2
3
4
5
6
7
8
9
10
11
12
G1
G2

@ FAN
Part Number

@ Speak

1

2

Part Number

@SM CARD BODY
Part Number
SP070007V0L

JTP1

2

40 BC_CLK_ECE1077
40 BC_DAT_ECE1077
40 BC_INT#_ECE1077
+3.3V_ALW
+3.3V_RUN
+5V_RUN
+5V_ALW
40 KYBRD_BKLT_PWM

Place close to
JTP1.5,6

39

TP_DET#

TP_CLK
TP_DATA
KYBRD_BKLT_PWM
TP_DET#

G1
G2

1

2

HRS_FH12-16S-0P5SH(55)~D

1

1

POWER_SW#_MB

1

1

2

2

Part Number

@C684
@
C684
100P_0402_50V8J~D

2

Description
B

1

DC02000840L
PWRSW1
@SHORT PADS~D

H-CONN SET ZJX
MB-B/T-TP-FP

@ LVDS cable
Part Number

on Top

DC020003Y0L

Description
H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)

@ LVDS cable
Part Number
1

1

2

2

DC02000870L

Description
H-CONN SET ZJX
MB-LCD 14 WXGA+(-2ch)

@ RTC BATT
Part Number

PWRSW2
@SHORT PADS~D

Place on Bottom
@

GC20323MX00

Description
BATT CR2032 3V
220MAH MAXELL

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Place close to JTP1 connector

Touch PAD/Int KB/LID
Size

4

3

Document Number

Rev
0.1

LA-5573P
Date:

5

Description
H-CONN SET ZGX
MB-MDC

@

2

2

D54
SD05.TCT_SOD323-2~D

D53
SD05.TCT_SOD323-2~D
@

A

PCMCIA TYCO
1759096-1

@ T/P wire set cable
37,40 POWER_SW#_MB

+5V_ALW

2

TP_CLK
TP_DATA

Part Number
DC02000CS0L

@ Place

1

Description

@ MDC wire set cable

Power Switch for debug

+5V_RUN

C1413
0.1U_0402_16V4Z~D

17
18

DC000001Q0L

C678
0.1U_0402_16V4Z~D

B

C771
0.1U_0402_16V4Z~D

1

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

Description
S SOCKET TYCO 1770551-1
10P H5.9 SMART

@PCMCIA BODY

Touch Pad Conn. Pitch=0.5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

SPK PACK ZJX 2.0W 4 OHM FG

PK230003Q0L

Part Number

+3.3V_ALW

Description
C

100P_0402_50V8J~D

@C1334
@
C1334

2

10K_0402_5%~D

1

Description
FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA

DC28A000800

E&T_3703-E12N-03R

CLK_TP_SIO 40
R1407
33P_0402_50V8J~D

2

USBP6USBP6+

C1704

2

1
2
3
4
5
6
7
8
9
10
11
12
13
14

DAT_TP_SIO 40
CLK_TP_SIO

1

COEX2_WLAN_ACTIVE

18
18

C683
10P_0402_50V8J~D

2

1

C682
10P_0402_50V8J~D

2

1

C681
10P_0402_50V8J~D

1

C680
10P_0402_50V8J~D

C

DAT_TP_SIO

43 BT_ACTIVE
39 BT_RADIO_DIS#
36 COEX2_WLAN_ACTIVE

1

2 100_0603_5%~D

COEX1_BT_ACTIVE

2

2 100_0603_5%~D

R1546 1

2

2
R1545 1

TP_CLK

R614
4.7K_0402_5%~D

TP_DATA

R613
4.7K_0402_5%~D

1

+3.3V_ALW

18
BT_DET#
36 COEX1_BT_ACTIVE

2

Thursday, January 21, 2010

Sheet
1

41

of

69

A

5

4

3

+5VRUN Source

6

1

2

2

4
6

1

R606
100K_0402_5%~D
2
1

D

D

S

1

2
G
S

Q64
SSM3K7002FU_SC70-3~D

D

Q152
SSM3K7002FU_SC70-3~D

2
S

2
G

1
3

2
1

S

2
G

D

3

D

Q1
SSM3K7002FU_SC70-3~D

2

1

2

1
R1307
20K_0402_5%~D
2

1

1

1
1

@

3

1
3

1
3

S

2

2

2

2
1
3

1

1

1

1
2

1
2
1

1
3

S

D

2
G

S

1

C1412
2200P_0402_50V7K~D

D

2
G

D

2
G

Q78
SSM3K7002FU_SC70-3~D

S

@

1.05V_RUN_ENABLE

+1.05V_RUN

4

+1.05V_M Q183
SI4164DY-T1-GE3_SO8~D
8
1
7
2
R1306
6
3
100K_0402_5%~D
5

R624
22_0603_5%~D

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

B

+15V_ALW

+DDR_CHG

S

S

D

2
G

12 RUN_ON_CPU1.5VS3#

Q204
SSM3K7002FU_SC70-3~D

@

C1191
4700P_0402_25V7K~D

C1411
10U_0805_10V4Z~D

1

+0.75V_DDR_VTT

R1479
220_0402_5%~D
+1.5V_CPU_VDDQ_CHG

2

+1.5V_CPU_VDDQ

Q80
SSM3K7002FU_SC70-3~D

D

2
G

@ R636
39_0402_5%~D
+1.05V_RUN_CHG

RUN_ON_ENABLE#

R625
39_0603_5%~D

Q79
SSM3K7002FU_SC70-3~D

1

+1.05V_RUN

+3.3V_RUN_CHG

@

Q77
SSM3K7002FU_SC70-3~D

3

+3.3V_RUN

@ R623
1K_0402_5%~D
+1.5V_RUN_CHG

D

Q76
SSM3K7002FU_SC70-3~D

Q81
SSM3K7002FU_SC70-3~D

ALW_ON_3.3V# 2
G

2

+1.05V_RUN Source

+1.5V_RUN

@ R622
1K_0402_5%~D
+5V_RUN_CHG

+3.3V_SUS_CHG
@

S

Q82
SSM3K7002FU_SC70-3~D
@ R628
1K_0402_5%~D
+3.3V_ALWPCH_CHG

@ R627
1K_0402_5%~D

A

D

2
G

2

S

+3.3V_ALW_PCH

3

+3.3V_SUS

1

1

D

2
G

Discharg Circuit
+5V_RUN

1

D
G
3

2
1

S

2
G

3

1

D

1.5V_RUN_ENABLE

1

2

M_ON_3.3V#

C696
4700P_0402_25V7K~D

3

4

6

1

4

R1224
100K_0402_5%~D

2

@

+1.5V_RUN

6
5
2
1

1

R616
39_0603_5%~D

Q72
SSM3K7002FU_SC70-3~D

M_ON_3.3V# 5

2

3

2

1

1

S

1
G

1

Q151

SI3456BDV-T1-E3_TSOP6~D

+15V_ALW

+3.3V_M_CHG

M_ENABLE

3

2

1

4

Q68B
DMN66D0LDW-7_SOT363-6~D

Q68A
DMN66D0LDW-7_SOT363-6~D
2
40,48
M_ON

+1.5V_RUN Source

+3.3V_M
+1.5V_MEM

6
5
2
1

R612
20K_0402_5%~D

2

+3.3V_M

C694
10U_0805_10V4Z~D

R611
100K_0402_5%~D

R610
100K_0402_5%~D

+3.3V_ALW2

Discharg Circuit

Q66

SI3456BDV-T1-E3_TSOP6~D

C

C693
470P_0402_50V7K~D

S

1

+3.3VM Source
+3.3V_ALW
+15V_ALW

SUS_ON_3.3V#

2

@ R1500
0_0402_5%~D
RUN_ON_CPU1.5VS3# 1
2

@

2

R1225
20K_0402_5%~D

3

RUN_ON_ENABLE#

3

Q206
R1499
BSS138_SOT23~D
0_0402_5%~D
1
2
2
G

C692
4700P_0402_25V7K~D

1

3.3V_RUN_ENABLE

1

R607
20K_0402_5%~D

0.75V_VR_EN 47

1

2

100K_0402_5%~D

2

1

8 1.5V_PWRGD

+3.3V_RUN

2

1

R1484

4

1
2

2

3
4

6

1

2

D

1

D
G
3

1
2

5

Q62A
DMN66D0LDW-7_SOT363-6~D
2
40
SUS_ON

1

Q61
NTMS4107NR2G_SO8~D
8
1
7
2
6
3
5

+15V_ALW

R605
20K_0402_5%~D

Q62B
DMN66D0LDW-7_SOT363-6~D
SUS_ON_3.3V#

R600
20K_0402_5%~D

+3.3V_RUN Source
+3.3V_ALW

4
C690
10U_0805_10V4Z~D

2

6
5
2
1

SUS_ENABLE

R604
100K_0402_5%~D

2

S

1

+3.3V_ALW Q60
SI3456BDV-T1-E3_TSOP6~D +3.3V_SUS

R603
100K_0402_5%~D

+3.3V_ALW2

B

1

Q56A
DMN66D0LDW-7_SOT363-6~D
2
12,34,39,47,62 RUN_ON

+3.3V_SUS Source

+15V_ALW

C

5

C691
10U_0805_10V4Z~D

4

RUN_ON_ENABLE#

C688
3300P_0402_50V7K~D

2

1

2

Q56B
DMN66D0LDW-7_SOT363-6~D

5

Q57A
DMN66D0LDW-7_SOT363-6~D
2
40 PCH_ALW_ON

5V_RUN_ENABLE

1

1

R599
100K_0402_5%~D

+5V_RUN

C1190
10U_0805_10V4Z~D

ALW_ON_3.3V#

1

R601
20K_0402_5%~D

2

2

3
2

Q57B
DMN66D0LDW-7_SOT363-6~D

1

C689
2200P_0402_50V7K~D

C687
10U_0805_10V4Z~D

3

2

ALW_ENABLE

21 ALW_ENABLE

1

S
4

G

1

R598
100K_0402_5%~D

+5V_ALW Q55
SI4164DY-T1-GE3_SO8~D
8
1
7
2
R597
6
3
100K_0402_5%~D
5

C686
10U_0805_10V4Z~D

6
5
2
1

1

+3.3V_ALW2

+15V_ALW

2

+3.3V_ALW2

4

Q54
+3.3V_ALW_PCH
SI3456BDV-T1-E3_TSOP6~D

3

+3.3V_ALW

D

+15V_ALW

R602
100K_0402_5%~D

1

+3.3V_ALW_PCH Source

DC/DC Interface

D

2

4

3

2

Title

POWER CONTROL
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

42

of

69

@ H3
H_2P8

@ H4
H_2P8

@ H5
H_2P8

@ H6
H_3P2

@ H13
H_3P2

@ H16
H_3P2

1
@ H10
H_3P0

@ H11
H_3P2

@ H12
H_3P2

@ H19
H_5P0

@ H20
H_5P0

@ H21
H_5P3

FIDUCIAL MARK~D

@ H22
H_5P3

@ FD3
1
FIDUCIAL MARK~D

1

1

1

1

1

1

1

1

@ FD2
1

1

GND

1

@ H9
H_3P0

1

2

D

@ FD4
1

1

MASK_BASE_LEDS#

@ H8
H_3P0

1

Q92
PDTA114EU_SC70-3~D

FIDUCIAL MARK~D

@ H24
@ H25
H_2P5X3P1 H_2P5X3P1

1

@ H7
H_3P0

SATA_ACT# 2

1

@ FD1
1

CLIP1
EMI_CLIP

@ H23
H_6P1

G

Q93
SSM3K7002FU_SC70-3~D

Fiducial Mark

EMI CLIP

@ H17
H_3P2

3

2

D

S

3

15 SATA_ACT#_R

D

@ H15
H_3P2

1

1

1

1

1

R654
10K_0402_5%~D

@ H14
H_3P2

1

@ H1
H_2P8

+5V_RUN

1

1

1

HDD LED solution for Blue LED

2

1

+3.3V_RUN

3

1

4

1

5

2 SATA_LED
1K_0402_5%~D

1
R659

2

1

+5V_ALW

FIDUCIAL MARK~D

3

D42
LTST-C191ZBKT-Q_BLUE~D

2

2

3

NUM_LED#

2

39

2

SCRL_LED#

R_NUM_LED#
2
1K_0402_5%~D

1
R596

1

1

R_SCRL_LED#
2
1K_0402_5%~D

+3.3V_ALW

3

2
G
Q150
SSM3K7002FU_SC70-3~D

2

6

+5V_ALW

2

1

1

BATT_BLUE

2
1K_0402_5%~D

R665

3

2

D

S

4

Q142

Q144B
DMN66D0LDW-7_SOT363-6~D

5

3

1

MASK_BASE_LEDS#

2

1
+3.3V_ALW

D61
LTST-C191ZBKT-Q_BLUE~D

3

R1007

WWAN LED solution for Blue LED

1

+3.3V_ALW

6

1

1

1

0.1U_0402_16V4Z~D

2

5

+3.3V_ALW

2

Q94
PDTA114EU_SC70-3~D
1

2

3

2

1

BREATH_LED#_R

1

0.1U_0402_16V4Z~D

U65
O

A

2

P

5
2

B

3

37,39 LID_CL#

1

2

4

MASK_BASE_LEDS#

G

LID_CL#

TC7SH08FU_SSOP5~D

Q134B
DMN66D0LDW-7_SOT363-6~D
4
3 2

5

Q137
PDTA114EU_SC70-3~D

4

3

1

BREATH_BLUE_LED
2
1K_0402_5%~D

1

39 SYS_LED_MASK#

R664

BREATH_BLUE_LED

24

3

+5V_ALW

Q135B
DMN66D0LDW-7_SOT363-6~D
4
3 2
Q138
PDTA114EU_SC70-3~D

A

MASK_BASE_LEDS#
1
R1001

BREATH_BLUE_LED_SNIFF
2
150_0402_5%~D

BREATH_BLUE_LED_SNIFF

37

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

24

1

4

C1061
1

BATT_YELLOW_LED

+5V_ALW

5

NC
Y

U42
NC7SZ04P5X_NL_SC70-5~D

6

G

A
3

+3.3V_ALW
A

24

3

1
1

5
P

2

2

R999
100K_0402_5%~D

2
1

2
0.1U_0402_16V4Z~D

1

1
R90
47K_0402_5%~D

38,40 BREATH_LED#

SYS_LED_MASK#

R1003
150_0402_5%~D
1
2

+5V_ALW
R1000
100K_0402_5%~D

1

2

2

6
C1060

Q135A
DMN66D0LDW-7_SOT363-6~D

X
0
1

Q134A
DMN66D0LDW-7_SOT363-6~D

LID_CL#

0
1
1

BATT_BLUE_LED

Q140
PDTA114EU_SC70-3~D

+5V_ALW

+3.3V_ALW

39 SYS_LED_MASK#

2

39 SYS_LED_MASK#

LED Circuit Control Table

Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)

1

1

LTST-C191ZBKT-Q_BLUE~D

WPAN LED solution for Blue LED

SYS_LED_MASK#

B

R1002
1K_0402_5%~D
1
2

G

1
R661

D43
2

Q143
SSM3K7002FU_SC70-3~D

5
Q145B
DMN66D0LDW-7_SOT363-6~D
2 WPAN_LED
1K_0402_5%~D

+3.3V_ALW

R1005
100K_0402_5%~D

BAT1_LED

4

U64
NC7SZ04P5X_NL_SC70-5~D

D

2

Y

3

A

3

2

2

4

P
1

BAT1_LED#

S

3

2

NC

P

3
3

Q95
SSM3K7002FU_SC70-3~D

MASK_BASE_LEDS#


BAT1_LED#

G

4

1

3

Y

G

A

40

G

R748
2

2
10K_0402_5%~D

1

BT_ACTIVE

D

BT_ACTIVE

S

41

U117
NC7SZ04P5X_NL_SC70-5~D

NC

5

R82
47K_0402_5%~D
1

C1337
1
2

Q101
PDTA114EU_SC70-3~D
R666
150_0402_5%~D
1
2

C1059

1

+5V_RUN

B

2
Q145A
DMN66D0LDW-7_SOT363-6~D

+3.3V_RUN

100K_0402_5%~D

2

+3.3V_ALW

0.1U_0402_16V4Z~D

S

39 SYS_LED_MASK#

1

1

1
R125

2

D

2
G

Q139
PDTA114EU_SC70-3~D

G

2 WWAN_LED
1K_0402_5%~D

1

3

YEL
LTST-C155TBJSKT_Blue/YEL~D

2

4

2

G

Q115
PDTA114EU_SC70-3~D

D

2

MASK_BASE_LEDS#

1

SSM3K7002FU_SC70-3~D
S

1

Y

U63
NC7SZ04P5X_NL_SC70-5~D

2

BATT_YELLOW 4

3

A

+5V_ALW

2

2

R1004
100K_0402_5%~D

BAT2_LED
3

P
BAT2_LED#

G

3

40

BAT2_LED#

NC

2

5

1

Battery LED
D46
BLUE

1
0.1U_0402_16V4Z~D

S
C

Q99
PDTA114EU_SC70-3~D
1

1

1

D

MASK_BASE_LEDS#

C1058

R89
47K_0402_5%~D

+5V_RUN

3

1
D59
LTST-C191ZBKT-Q_BLUE~D

2
Q144A
DMN66D0LDW-7_SOT363-6~D

+3.3V_RUN
1

R1006
100K_0402_5%~D
1
2

+5V_ALW

WLAN LED solution for Blue LED

Q116
SSM3K7002FU_SC70-3~D

2

+5V_ALW

2 WLAN_LED
2
1
1K_0402_5%~D
LTST-C191ZBKT-Q_BLUE~D

1
R663

36 LED_WWAN_OUT#

1
D58
LTST-C191ZBKT-Q_BLUE~D

1
R655

R206
100K_0402_5%~D

2

Q122
PDTA114EU_SC70-3~D

D45

C

1
D57
LTST-C191ZBKT-Q_BLUE~D

1

Q97
PDTA114EU_SC70-3~D

MASK_BASE_LEDS#

2

Q121
PDTA114EU_SC70-3~D

2

1

1

Keyboard Status LED
R_CAP_LED#
2
1K_0402_5%~D

1
R556

3

1

G

Q98
SSM3K7002FU_SC70-3~D

39

2

1

3

36 LED_WLAN_OUT#

D67
SDM10U45-7_SOD523-2~D

D

S

2

R662
100K_0402_5%~D

1

1

3

Q120
PDTA114EU_SC70-3~D

3

CAP_LED#

3

39
+5V_RUN

Q141
SSM3K7002FU_SC70-3~D

+3.3V_WLAN

2

Title

PAD and Standoff
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5573P
Sheet
1

43

of

69

5

4

3

2

1

+COINCELL

1

COIN RTC Battery

2

PR1
1K_0402_5%~D
+3.3V_RTC_LDO

Z4012

JRTC1
1
2
3

+COINCELL

+3.3V_ALW

RB715F_SOT323~D
PL1
FBMA-L18-453215-900LMA90T_1812~D
1
2

PR4
100_0402_5%~D
1
2

Z4304
Z4305
Z4306

PR3
100_0402_5%~D
1
2

PR5
100_0402_5%~D
1
2

PBAT_SMBCLK
PBAT_SMBDAT

40
40

1

PC1
1U_0603_10V4Z~D

2

PJP1
1
PC2
0.1U_0603_25V7K~D
2
1

2

PBATT+

Move to power schematic

PAD-OPEN 4x4m

PBAT_PRES#

39

PQ1
FDN338P_NL_SOT23-3~D
2

3

PD6
1

PBATT1
SUYIN_200275MR009G50PZR

1

PC3
2200P_0402_50V7K~D
2
1

GND
GND
9
8
7
6
5
4
3
2
1

+3.3V_ALW

PR2
10K_0402_1%~D
2
1

@

PBATT+_C
11
10
9
8
7
6
5
4
3
2
1

D

1

PD1

PD4
DA204U_SOT323~D
3
1
2

PD3
DA204U_SOT323~D
3
1
2

PD2
DA204U_SOT323~D
3
1
2

Primary Battery Connector

@

4
5

+RTC_CELL

ESD Diodes

@

1
2 G1
3 G2

MOLEX_53398-0371~D

3

2

D

1

3

DOCK_SMB_ALERT#

38,40

2
2

RB751V-40_SOD323-2~D

GND

38,39,52

PR7
1
2
0_0402_5%~D

SLICE_BAT_PRES#

C

2

1

C

PC4
1500P_0402_7K~D

+5V_ALW

2
G

2

1

DOCK_PSID

2
NB_PSID_TS5A63157

3

NO

IN

GND

V+

NC

COM

6

GPIO_PSID_SELECT

5

+5V_ALW

4

PS_ID

39

40

+5V_ALW

PD9
DA204U_SOT323~D
3
1
2

1
2

3

PR12
10K_0402_1%~D

1

PQ3
MMST3904-7-F_SOT323~D
E

@
PR14
1

@

2

PSID_DISABLE#

39

10K_0402_5%~D

39

PC5
.47U_0402_6.3V6-K~D
1
2

DCIN_CBL_DET#

PU1
38

TS5A63157DCKR_SC70-6~D

PQ2
FDV301N_NL_SOT23-3~D

C

2
B

PR13
15K_0402_1%~D
1
2

1

GND

PR15
0_0402_5%~D
1
2
B

3
1

@

@
PD8
SM24_SOT23

GND

+5V_ALW

2

3

PD10
DA204U_SOT323~D

2

+5V_ALW

3

PR10
33_0402_5%~D
1
2

PR9
2.2K_0402_5%~D
1
2

1
PR11
100K_0402_1%~D
1
2

NB_PSID

D

PL2
BLM18BD102SN1D_0603~D
2
1

S

1
2
0_0402_5%~D

1

PR8

PD7
DA204U_SOT323~D
3

+3.3V_ALW

@

B

DC_IN+ Source

@

+DC_IN

PL3
FBMJ4516HS720NT_1806~D
1
2

+DC_IN_SS
PQ4
FDS6679AZ_SO8~D
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D

@

PL4
FBMJ4516HS720NT_1806~D
1
2

1
2

PC11
10U_1206_25V6M~D

PR17
4.7K_0805_5%~D
2
1

PC8
0.1U_0603_25V7K~D
2
1

52

PC7
0.1U_0603_25V7K~D
2
1

SOFT_START_GC

PC10
0.1U_0603_25V7K~D
2
1

PR16
2

1M_0402_5%~D

2

PC13
0.1U_0603_25V7K~D
2
1

MOLEX_87438-0743

A

2

PR20
1

10K_0402_5%~D

PR19
1M_0402_5%~D
2
1

+DCIN_JACK

@

PC6
0.022U_0805_50V7K~D
1
2

-DCIN_JACK

@ PR18
4.7K_0805_5%~D
2
1

1
2
3
4
5
6
7

1
2
3
4
5
6
7

PC9
0.1U_0603_25V7K~D
2
1

1
PJPDC1

PD11
VZ0603M260APT_0603
PC12
0.1U_0603_25V7K~D
2
1

1

+DC_IN

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

+DCIN
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5772P
Sheet
1

44

of

69

5

4

3

2

1

+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP/ +3.3V_RTC_LDO

+DC1_PWR_SRC
PJP2
1

+PWR_SRC

2

PC24
10U_1206_25V6M~D
2
1

2

1

PC23
10U_1206_25V6M~D
2
1

PC22
10U_1206_25V6M~D

PC20
2200P_0402_50V7K~D
2
1
S
S
S
3
2
1

PQ8
SI4800BDY-T1-E3_SO8~D

D
D
D
D

5
6
7
8

PC31
0.1U_0402_10V7K~D
2
1

C

+3.3V_ALWP

@

2

@

PC39
330U_D3L_6.3VM_R25~D

+3.3V_ALW_LGATE

PR39
2.2_1206_1%~D

PC38
0.1U_0402_10V7K~D
2
1

G

2

2

PC33
1000P_0603_50V7K~D

PR35
0_0402_5%~D
2
1

1

GNDA_3V5V

3

PAD

17
18
19
20
21
22
23
24

PR38
1_0603_5%~D
+3.3V_ALW_BOOT 1
2

+3.3V_ALWP
PL6

4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
1
2

PR41
0_0402_5%~D
2
1

1@

GNDA_3V5V
PR37
1_0603_5%~D
1
2+5V_ALW_BOOT

G

3.3 Volt +/-5%
Thermal Design Current: 4.96A
Peak current: 7.09A
OCP_MIN:8.5 A

1

AON6706L_1N_DFN8

SN0608098_QFN32_5X5~D

4

GNDA_3V5V

PQ10
SI4134DY-T1-GE3_SO8~D

2

33

PC36
0.1U_0603_25V7K~D
2
1

3
D
G
S

@

PQ9

1

@

PR36
2.2_1206_1%~D
2@ PQ9
FDMS7692_NL_POWER56-8~D

PC32
1000P_0603_50V7K~D
2
2
1

+5V_ALW_PHASE

1

2

PR34
0_0402_5%~D
2
1

+

PR40
0_0402_5%~D
2
1

1

PC35
0.1U_0402_10V7K~D
2
1

PC34
330U_D3L_6.3VM_R25~D

+5V_ALWP

@

PR31
294K_0402_1%~D
1
2
+3.3V_OUT2
2 PR33 0_0402_5%~D
1
POK2
EN_3V_5V
+3.3V_ALW_UGATE
+3.3V_ALW_PHASE

32
31
30
29
28
27
26
25

D

EN_3V_5V
+5V_ALW_UGATE

REFIN2
TRIP2
VOUT2
SKIPSEL
PGOOD2
EN2
DRVH2
LL2

S

PL5

PR30
@
1
2
0_0402_5%~D

1

+5V_FB1
2
POK1

VSW
VOUT1
VFB1
TRIP1
PGOOD1
EN1
DRVH1
LL1

1

2@ PR32
261K_0402_1%~D
1

9
10
11
12
13
14
15
16

@ PR28
0_0603_5%~D

2

1@

PR29
0_0402_5%~D

REFIN2

158K_1%_0402

GNDA_3V5V

3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
1
2

PU2

+5V_ALWP

LDOREFIN
LDO
VIN
VREF3
EN_LDO
V5FILT
TONSEL
VREF2

GNDA_3V5V

8
7
6
5
4
3
2
1

PR32

GNDA_3V5V

2

VBST1
DRVL1
V5DRV
SECFB
GND
PGND
DRVL2
VBST2

@

4

1

SECFB

+5V_ALWP
C

PC30
0.1U_0402_10V7K~D
2
1

1@

2@ PQ7
SI4134DY-T1-GE3_SO8~D
1
2
3
5

AON6428L_1N_DFN8

PC29
0.1U_0603_25V7K~D
1
2

1

LDOREFIN
PQ7

5V_3V_REF

2

GNDA_3V5V

+5V_ALW2P
VIN
+3.3V_ALW2
EN_3V_5V

@ PR27
0_0402_5%~D
1
2

+3.3V_RTC_LDO

@

PC28
1U_0603_10V6K~D
2
1

@ PR26
0_0402_5%~D
1
2

PC37
0.1U_0603_25V7K~D

PC27
1U_0603_10V6K~D
2
1

PR25
0_0402_5%~D
2
1

PC26
0.1U_0603_25V7K~D
2
1

PQ9 pop-option
DSC 2@ FDMS7692
ASICS & ASICS2 1@ AON6706L

D

@ PR24
10_0603_5%~D
2
1

PAD-OPEN1x1m

+3.3V_ALW2

PQ7 pop-option
DSC 2@ SI4134DY
ASICS & ASICS2 1@ AON6428L

PR32
DSC 2@ 261K_ohm
ASICS 1@ 158K_ohm

+5V_VCC1
2

PC21
0.1U_0805_50V7M~D
2
1

PJP3
1

+5V_ALW2

PC25
4.7U_0805_6.3V6K~D
2
1

PC19
10U_1206_25V6M~D
2
1

PC18
10U_1206_25V6M~D
2
1

@ PC17
10U_1206_25V6M~D
2
1

PC16
0.1U_0805_50V7M~D
2
1

PC15
2200P_0402_50V7K~D
2
1

5 Volt +/-5%
Thermal Design Current:7.13A
Peak Current:10.19A
OCP_MIN:11.2A

PR23
0_0805_5%~D
1
2

PR22
0_0805_5%~D
1
2

PAD-OPEN 4x4m
D

1
+
2

+5V_ALW_LGATE
GNDA_3V5V

+5V_ALW2

PD14
BAT54CW_SOT323~D

VOUT2=3.3V
L=3uF
Fsw=300KHz
D=0.173
Input Ripple Current=TDC*(D*(1-D))^0.5=3.23A
Output ripple current=(19-3.3)*0.173/3u/300K=3.04A
Output ripple Voltage=1.96*18=54.72mV

@

POK2

B

PR45
0_0402_5%~D
2
1

BAT54SW-7-F_SOT323-3~D

POK1

ALW_PWRGD_3V_5V

40

2

+15V_ALWP

(100mA,20mils ,Via NO.=1)
PJP8
+3.3V_ALW

PAD-OPEN 4x4m
PJP9
1
2

2

1

PR49
39K_0402_5%~D
1

2

PC44
0.1U_0603_25V7K~D
2
1

+15V_ALW

PAD-OPEN1x1m

2

PR48
200K_0402_1%~D
2
1

PJP7
+5V_ALW

PAD-OPEN 4x4m

+3.3V_ALWP

PAD-OPEN1x1m
GNDA_3V5V

PD13

PR46
0_0402_5%~D
2
1

+3.3V_ALWP

2

ALWON

PAD-OPEN 4x4m
PJP6
1
2

1

+3.3V_ALWP

PR43
100K_0402_1%~D
1
2

2

1

PC42
0.1U_0603_25V7K~D
2
1
PR44
2K_0402_5%~D
2
1

23 THERM_STP#

+5V_ALWP

PC43
0.1U_0603_25V7K~D
1 1
2

2

3

PJP5
1

PD12
BAT54SW-7-F_SOT323-3~D

3

40

3

PJP4
1

PR47
200K_0402_5%~D
1
2

B

2

PR42
100K_0402_1%~D
1
2

+5V_ALWP

VOUT2=5V
L=3uF
Fsw=400KHz
D=0.256
Input Ripple Current=TDC*(D*(1-D))^0.5=3.11A
Output Ripple Current=(19-5)*0.263/3.3u/400K=2.82A
Output Ripple Voltage=3.1*18m=70.5mV

PC40
0.1U_0603_25V7K~D
1 1
2

PC41
4.7U_0603_6.3V6K~D
2
1

GNDA_3V5V
GNDA_3V5V

PAD-OPEN 4x4m
GNDA_3V5V

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

2

DC/DC +3V/ +5V
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5772P
Sheet
1

45

of

69

5

4

3

2

1

@ PL9
FBMJ4516HS720NT_1806~D
1
2
D

D

PJP11
1

2

+PWR_SRC

PC72
10U_1206_25V6M~D
2
1

PC71
10U_1206_25V6M~D
2
1

PC70
10U_1206_25V6M~D
2
1

PC69
0.1U_0805_50V7M~D
2
1

PC68
2200P_0402_50V7K~D
2
1

PAD-OPEN 4x4m

5
6
7
8
D
D
D
D
SW

VFB

V5IN

9

TPS51218DSCR_SON10_3X3~D

2

PR73
470K_0402_5%~D

2

4

4

3
2
1

1
11

TP

PQ12
SIR468DP_MLP8~D

6

DRVL

@

GNDA_1.5V

PR75
19.6K_0402_1%~D
1
2

2

GNDA_1.5V

GNDA_1.5V

C

+1.5V_SUS_P

+5V_ALW

3
2
1

RF

1

5

7
PC74
1U_0603_6.3V6M~D

4

PL10
0.45UH_ETQP4LR45XFC_25A_-25+20%~D
1
2

8

1
+
2

1
+
2

1

2

PC80
10U_0805_6.3V6M~D

DRVH

EN

PC79
10U_0805_6.3V6M~D

TRIP

G

PC78
0.1U_0402_10V7K~D
2
1

3

4

PC77
330U_D2E_2.5VM_R15~D

2

PC73
0.22U_0603_10V7K~D
1
2

PC76
330U_D2E_2.5VM_R15~D

GNDA_1.5V

PR70
0_0603_5%~D
1
2

PC75
1000P_0603_50V7K~D
1
2
1

PR72
0_0402_5%~D
1
2

10

PQ13
SIR468DP_MLP8~D

DDR_ON

VBST

5

40,47

PGOOD

5

C

1

PR74
2.2_1206_1%~D

PU5

PR71
39.2K_0402_1%~D
1
2

S
S
S

40 1.5V_SUS_PWRGD

PQ11
SI4162_SO8~D

3
2
1

1
2

100K_0402_1%~D
PR69

+3.3V_ALW

1

2

@

PR76

1.5 Volt +/-5%
Thermal Design Current: 11.6A
Peak current: 16.58A
OCP_MIN:18.23A

22.6K_0402_1%~D
2
1

B

B

PJP44
1

2

PAD-OPEN1x1m
GNDA_1.5V

PJP13
1

2

PAD-OPEN 4x4m
PJP17
+1.5V_SUS_P

1

+1.5V_MEM

2

A

A

PAD-OPEN 4x4m

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

+1.5V_MEM
Size

4

3

2

Rev
0.1

LA-4151P
Date:

5

Document Number
Thursday, January 21, 2010

Sheet
1

46

of

69

5

4

3

2

1

+1.8V_RUNP
PJP18

+3.3V_ALW
1

+1.8V_PWR_SRC

2

1.8 Volt +/-5%
Thermal Design Current: 0.951 A
Peak current: 1.359 A
OCP_MIN: 4.5A

1
PC83
0.1U_0603_25V7K~D
2
1

PR380
0_0603_5%~D

1

@
GNDA_1.8V

D

2

PC317 100P_0402_50V8J~D
2
1
@

PR379
0_0402_5%~D
2

D

PC82
10U_0805_6.3V6M~D
1
2

PC81
10U_0805_6.3V6M~D
1
2

PAD-OPEN 4x4m

2

1

1

12,34,39,42,62 RUN_ON

5

2

1

PL11
GNDA_1.8V

VIN

2
VIN

SYNCH

PU6

VDD

4

PR381

3

0_0402_5%~D

EN

TPAD

17

NC

16

LX

15

LX

14

NC

13

1.1UH_#A915AY-H-1R1M=P3_4.07A_20%

PL11 pop option
DSC (2@) use 2uH
ASICS & ASICS2 (1@) use 1.1uH

1@

PR77
24k_0402_1%~D
6

NC

7

PG

ISL8014IRZ-T_QFN16_4X4~D

2@ PL11
2UH_#A915AY-H-2R0M=P3_3.3A_20%
2
1

+1.8V_RUNP

GNDA_1.8V

PC87
47P_0402_50V8J~D
2
1

PC86
10U_0805_6.3V6M~D
1
2

PC85
10U_0805_6.3V6M~D
1
2

1
PR79
2

124K_0402_1%~D

1
2

@
PAD-OPEN1x1m

100K_0402_1%~D

2

+3.3V_RUN
2

PR81

1
2
1

GNDA_1.8V
@ PJP19
1

@

PR80
4.7_0805_5%~D

PGND
12

PGND
11

SGND

1

9

10K_0402_5%~D
PR78

10

2

SGND

VFB

PC324
150P_0402_50V8F~D
2
1

C

8
39 1.8V_RUN_PWRGD

PC84
680P_0603_50V8J~D

C

GNDA_1.8V
@
1

+1.8V_RUNP

PJP20
2

+1.8V_RUN

PAD-OPEN 4x4m

B

B

VOUT=1.8V
L=3.3uF
Fsw=290KHz
D=0.092
Input Ripple Current=TDC*(D*(1-D))^0.5=0.884A
Output Ripple Current=1.707A
Output Ripple Voltage=1.707*15m=20.5mV

+0.75V_DDR_VTT
DDR3 Termination
+5V_ALW

+0.75V_P
PC88
2
1

+V_DDR_REF

0.75Volt +/-5%
Thermal Design Current: 0.7A
Peak current: 1A

4.7U_0805_10V4Z~D
PU7

2

PAD-OPEN 2x2m~D
0_0402_5%~D
2

42 0.75V_VR_EN
A

7
1

2

PR83 0_0402_5%~D

PC93
0.1U_0603_25V7K~D
2
1

PR428
0_0402_5%~D
2
1

PC92
10U_0805_6.3V6M~D
1
2

@ PR82
1

39 0.75V_DDR_VTT_ON

1

9

VIN

VTT

VLDOIN

VTTSNS

VDDQSNS

VTTREF

S3
S5

PGND
GND
BP

5
6
4
8
11

TPS51100DGQRG4_MSOP10~D

PC91
10U_0805_6.3V6M~D
1
2

1 DC_1+0.75V_VTT_PWR_SRC

2

PC90
10U_0805_6.3V6M~D
1
2

PJP21
+1.5V_MEM

3

PC89
0.1U_0603_25V7K~D
1
2

10

PJP22
2

1

+0.75V_P

+0.75V_DDR_VTT
A

PAD-OPEN 2x2m~D

DELL CONFIDENTIAL/PROPRIETARY

40,46 DDR_ON

Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

+0.75V_DDR_VT/+1.8V_RUN
Size

Document Number

Date:

Thursday, January 21, 2010

Rev
0.1

LA-5772P
Sheet
1

47

of

69

5

4

3

2

1

D

D

1.05 Volt +/-5%
Thermal Design Current: 7.6A
Peack current: 10.9A
OCP_MIN: 11.9A

+1.05V_M_P

C

1

0_0402_5%~D
TPS_1.05_IMON
1

B

17,39 SIO_SLP_M#

@ PR92
2

M_ON

PR93
0_0402_5%~D
1
2
@ PR94
@PR94
0_0402_5%~D
1
2

1.33K_0402_1%~D

PC114
0.1U_0603_25V7K~D
2
1

PC113
0.1U_0603_25V7K~D
2
1

PC112
22U_1206_6.3V6M~D
2
1

@

1

1

@

PR91
100K_0402_1%~D
2
1

+3.3V_ALW
PR90

2.61K_0402_1%~D

2

PC104
0.1U_0603_25V7K~D

@ PR89
@PR89
7.68K_0805_1%~D

GNDA_1.05VM

40,42

@

PC111
22U_1206_6.3V6M~D
2
1

1
SN0905030RUW_QFN17_3P5X3P5~D

PL13
0.42UH_MPC0740LR42C_20A_25%~D
+1.05V_VX
2
1

GNDA_1.05VM

@ PR410
2

PC98
0.1U_0603_25V7K~D
2
1

+1.05V_VM_P

PC110
22U_1206_6.3V6M~D
2
1

10

1.05V_VM_EN
@PR85
@
PR85
1
2
22.1K_0402_1%~D

PGND
9

SW

11

IMON

2
0.22U_0603_10V7K~D

2

PR88
2K_0402_5%~D
1
2

PGND

PC103
PR87
1200P_0402_50V7K~D
0_0402_5%~D
1
2
1
2

MODE

2

PAD-OPEN 4x4m

PC109
22U_1206_6.3V6M~D
2
1

SS

1

PC108
22U_1206_6.3V6M~D
2
1

VOUT

6

13
12

+5V_ALW

@ PJP26

PC107
22U_1206_6.3V6M~D
2
1

5

8

PC101
100P_0402_50V8J~D
2
1
PC102
2
1

C

EN
FSET

1.05V_M_PWRGD

PC106
10U_1206_25V6M~D
2
1

VFB

14

PC105
10U_1206_25V6M~D
2
1

COMP

4

PGOOD

PC99
1

1

3

7

PC100
PR84
680P_0402_50V7K~D 5.6K_0402_5%~D
2
1
2
1

2200P_0402_50V7K~D

GNDA_1.05VM

PR378
3.3_0603_1%~D
1
2

2

GND

15

2

2

VBST

22.1K_0402_1%~D
PR86

VCCA

PC95
0.1U_0603_25V7K~D
2
1

16

VIN
1

VIN

17

1U_0402_6.3V6K~D

PU8

2

PC96
1

+3.3V_ALW

PC94
10U_1206_25V6M~D
2
1

PC97
10U_1206_25V6M~D
2
1

@ PL12
FBMJ4516HS720NT_1806~D
1
2

1.05V_M_PWRGD 40
PJP24
1

1.05V_VM_EN

B

2

PAD-OPEN 4x4m
PJP25
+1.05V_VM_P

1

+1.05V_M

2

PAD-OPEN 4x4m

@ PJP50
1

2

PAD-OPEN1x1m
GNDA_1.05VM

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

+1.05VM
Size

4

3

2

Rev
0.1

LA-4151P
Date:

5

Document Number
Thursday, January 21, 2010

Sheet
1

48

of

69

5

4

3

2

2

1.05 Volt +/-5%
Thermal Design Current: 18.72A
Peack current: 26.75A
OCP_MIN: 32.096A

1.1 Volt +/-5%
Thermal Design Current: 12.641A
Peack current: 18.059A
OCP_MIN: 21.67A

PR101
+5V_ALW
1

1

1

+5V_ALW

PC128
0.1U_0603_25V7K~D
2
1

PC126
PC127
0.1U_0603_25V7K~D
2
1

PC125
10U_1206_25VAK
1
2

PC124

10U_1206_25VAK
1
2

1
+
2

PC136
220U_SX_2VY_R9M~D

2

PC135
220U_SX_2VY_R9M~D

11

1

PC134
220U_SX_2VY_R9M~D

1

VTT_SENSE

2

1

2

+VTTP

C

1
+
2

PC143

PC142

2

2

PR120
1.58K_0402_1%

1

2

PR122
6.98K_0402_1%~D

1

PR110 PR120
Margaux UMA and SG 3.01K
Margaux DSC and ASICS 1.58K

2
PR123
0_0402_5%

2

PR129
10_0402_1%~D

1

PR113 PR122
Margaux UMA and SG 4.99K
Margaux DSC and ASICS 6.98K

B

11

1

VTT_FB2

1

3

VTT_SENSE

2

@ PR127
0_0402_5%
2
1

2
1

GNDA_VTT

PJP31

4

PR433
0_0402_5%~D

1

@ PR125
0_0402_5%

8 H_VTTPWRGD

2

5
3
2
1

2

2

PR124
9.31K_0402_1%~D

PR128
2.74K_0402_1%~D

4

MAX17007AGTI+_TQFN28_4X4~D

1

29

+5V_ALW

PC145
1000P_0402_50V7K~D
LG_VTT2
GNDA_VTT

28

FB2

1

GND_T

GNDA_VTT

PC144
0.22U_0402_6.3V6K

PQ18
BSC884N03MS_POWER56-8~D

CSL2

2 1

PGOOD2

27

PR126
0_0402_5%

24

+

PL17
0.56UH_MPC1040LR56C_23A_+-20%~D

PR434
10_0402_1%~D

CSH2

PHASE_VTT2

1

26

@

1

3
2
1

PGOOD1

2

12

1

VTT_B+

2

2
1

DL2
PR119
49.9K_0402_1%~D

4

19

2

6
1

GNDA_VTT

PQ73
MMST3904-7-F_SOT323-3~D
E

22
UG_VTT2

1

4

5

REFIN1

1

PR118
464K_0402_1%

PQ74A
DMN66D0LDW-7_SOT363-6~D

1
2
3
PQ74B

8

LX2
2

PR385
0_0402_5%~D

PR115
1
2
GNDA_VTT
10_0402_1%~D
1
PR116 2.2_0603_1%~D

23

DH2

PR117
40.2K_0402_1%~D

2

DMN66D0LDW-7_SOT363-6~D

1

PR397
100K_0402_5%~D
2
1
B

C

2
B
3

PR399
10K_0402_5%~D
1
2
PR398
100K_0402_5%~D
2
1

11 CPU_VTT_SELECT

PR396
100K_0402_5%~D

+5V_ALW

2 2

PC138
0.22U_0603_10V7K~D

1

VTT_FB2
+5V_ALW

1

21

2
PR114
0_0402_5%

10U_1206_25VAK
1
2

BST2

1

10U_1206_25VAK
1
2

REF

9

PC141

1

CSL1

2

10U_1206_25VAK
1
2

PC137
2200P_0402_50V7K~D
2
1

GNDA_VTT

EN2

1

1

25

2

2

GNDA_VTT

1

3

PR113
6.98K_0402_1%~D

PC140
0.1U_0603_25V7K~D
2
1

C

PC133
1000P_0402_50V7K~D
1
21
2

10

CSH1

4

PR386
10_0402_1%~D

20

PGND

PR121
4.7_0805_1%

EN1

2

PAD-OPEN 4x4m

2

4
11

1

PR110
1.58K_0402_1%
PR112
4.7_0805_1%

PR395
0_0402_5%~D
1
2

LG_VTT1

5

2

DL1
PR111 @
0_0402_5%
39 CPU_VTT_ON

17

1

SKIP

PHASE_VTT1

+PWR_SRC

@ PJP30

PL16
0.56UH_MPC1040LR56C_23A_+-20%~D

PC139
0.1U_0603_25V7K~D
2
1

5

14

4

PC146
820P_0402_50V7K~D
2
2
1

LX1

13

0.22U_0603_10V7K~D
UG_VTT1

1

DH1

1

1

PR109
0_0402_5%

ILIM2

220P_0402_50V8J~D

2

PR107
2.2_0603_1%~D
2 2
1

15

PC131
820P_0402_50V7K~D
2
2
1

3

PR106
2 200K_0402_1%~D
1
PC129

BST1

1

7

PQ17
SI4172DY-T1-GE3_SO8~D

2

2

PR105
2 200K_0402_1%~D
1

ILIM1

PC130
+VTTP

6

@

@ PL15
FBMJ4516HS720NT_1806~D
2
1

VTT_B+

PQ15
SI4172DY-T1-GE3_SO8~D

2

@ PR108
0_0402_5%

1

TON2

GNDA_VTT

+5V_ALW

1

TON1
GND

PQ16
BSC884N03MS_POWER56-8~D

16

5

2

@ PR104
0_0402_5%

3
2
1

1

5

2

PR103
0_0402_5%

VDD

1

VCC

4

18

PU10

10U_1206_25VAK
1
2

D

3
2
1

2

PC132
0.22U_0402_6.3V6K

1

D

PC122
2.2U_0603_10V6K~D

2

PC123
1U_0603_6.3V6M~D

10_0603_5%

@ PJP32
1

2

PAD-OPEN1x1m
PAD-OPEN 43X118
GNDA_VTT

GNDA_VTT
@ PJP33
1

2

PAD-OPEN 43X118
+1.05V_1.1V_RUN_VTT

+VTTP
@ PJP34
1

2

PAD-OPEN 43X118

@ PJP35
1

2

PAD-OPEN 43X118

A

A

Title