Compal LA 5573P Schematics. Www.s Manuals.com. R1.0 Schematics
User Manual: Motherboard Compal LA-5573P NAL22, NAL22, NAL24 - Schematics. Free.
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Page Count: 70
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Cover Sheet
169Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Cover Sheet
169Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Cover Sheet
169Thursday, January 21, 2010
Compal Electronics, Inc.
BOM P/N :
PCB NO :
COMPAL CONFIDENTIAL
MODEL NAME :
NAL22/23/24
M10 Margaux DIS/ASICS
rPGA Auburndale/Clarksfield
REV : 1.0(A00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-5573P ( DAA00001G00)
43177531LXX
2010-01-21
@ : Nopop Component
MB Type BOM P/N Margaux DIS N10M
Asics DIS N10P TCM TPM BOM CONFIG
2@,4@,5@,8@
2@,3@,6@,8@
2@,4@,6@,8@
Margaux DIS, TPM EN,TCM DIS
1@ 2@ W(3@) W(5@)W/O(4@) W/O(6@)
**
*
*
*
*
Margaux DIS, TCM EN,TPM DIS
Margaux DIS, ALL TPM DISABLE
+ N10M-NS-B/N10P-GLM/N10P-GLM4
+FCBGA PCH IBEXPEAK-M
7@ : N10P-GLM VID
8@ : N10M-NS-B & N10P-GLM4 VID
43177531L01 *
43177531L02 *
43177531L03 *
Asics GLM, TPM EN,TCM DIS
Asics GLM, TCM EN,TPM DIS
Asics GLM, ALL TPM DISABLE
43177531L11
43177531L12
43177531L13
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
Asics GLM4, TPM EN,TCM DIS
Asics GLM4, TCM EN,TPM DIS
Asics GLM4, ALL TPM DISABLE
43177531L21
43177531L22
43177531L23
1@,4@,5@,7@
1@,3@,6@,7@
1@,4@,6@,7@
1@,4@,5@,8@,9@
1@,3@,6@,8@,9@
1@,4@,6@,8@,9@
9@ : N10P-GLM4 only
Part Number Description
DAA00001G00 PCB 0AH LA-5573P REV0 M/B DIS
MB PCB
Part Number Description
DAA00001G00 PCB 0AH LA-5573P REV0 M/B DIS
MB PCB
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Block Diagram
269Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Block Diagram
269Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Block Diagram
269Thursday, January 21, 2010
Compal Electronics, Inc.
Clock Generator
Compal confidential
Model : NAL22
+3.3V_RUN
CPU/PCH XDP Port
+FAN1_VOUT
GUARDIAN III
EMC4002
Thermal
+3.3V_M
FAN
+1.05V_VCCP
DELL CONFIDENTIAL/PROPRIETARY
page 23
page 23
page6
page 8,15
PGA CPU
INTEL
DMI
Auburndale/Clarksfield
1060pin BGA
IBEXPEAK-M
+1.05V_1.1V_RUN_VTT
+3.3V_ALW_PCH
988A pins
4MB (Socket G1)
+1.8V_RUN
page 7-12
page 15-22
Block Diagram
page 40
Touch Pad
SMSC KBC
+3.3V_ALW
+RTC_CELL
MEC5045
VCORE (IMVP-6)
CHARGER
0.75V
page 49
page 51
page 52 page 46
1.5V
3V/5V
page 48
page 47
page 41
RJ11
Stick
Power On/Off
SW & LED
1.1V
page 50
page 42
page 36
Biometric
+3.3V_RUN
USBH
On IO/B
+1.05V_M
Mini Card 1
+3.3V_RUN_WWAN_PWR
WLAN
PCI Express BUS
MDC
HD Audio I/F
+1.5V_RUN +1.5V_RUNpage 36
WWAN
+1.05V_RUN_VTT /100MHz
HeadPhone &
MIC Jack
page 34
+3V_SUS
+3.3V_HDD
On IO/B
page 28
+5V_HDD
S-HDD
USB[4] USB[5]
+3.3V_RUN
RJ45
+1.05V_RUN_VTT /100MHz
PCIE
S-ATA 0/1/4/5 3GB/s
CardBus
page 33-34
+3.3V_WLAN
Mini Card2
+3.3V_RUN
R5U242
LPC BUS
+3V_RUN
33MHz
+1.2V_RUN page 31,32
BCM5882
USB[1]
USH
+3.3V_RUN
+2.5V_RUN
Smart Card
page 32
RFID
page 33
+5V_MOD
E-Module
page 28
BC BUS
Trough Cable
Dig. MIC
Trough LVDS Cable
INT.Speaker
page 29
+3.3V_ALW
ECE5028
page 39
DOCK LPC BUS
TPM1.2
China TPM1.2
TI
+3.3V_RUN page 29
DOCKTLV320AIC3004
page 29
92HD81B1
Azalia Codec
+3.3V_RUN
+5V_RUN
48MHz USB0 : Right side pair top
USB Ports X2
+5V_ALW
USB[0,10] R SIDE
page 36
+V_DDR_REF
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8
DDRIII-DIMM X2
+1.5V_MEM
page 13,14
USB1 : Right side pair bottom
BC BUS
+3.3V_LAN
pg 30
LAN SWITCH
PI3L720
82577LM
Intel Hanksville
page 30
+3.3V_LAN
+1.0V_LAN
On IO/B
+VCC_CORE
PCIE2 PCIE1
TDA8034HN
page 32
+3.3V_RUN
+5V_RUN
DC IN & BATT IN DC/DC Interface
Int.KBD &
Stick
page 40
ECE1077
+3.3V_ALW
SMBUS
SATA1 SATA0
SLG8SP585
WiFi ON/OFF
DOCKING
PORT
page 38
Option
Trough Cable
SMSC SIO
SATA5
USB[8,9]
DOCK LPC BUS
DAI
SSX35BCB
+1.5V_MEM
Lane x 4
Memory BUS
(DDR3)
+1.5V_MEM 800Mhz/1066MHz
PCMCIA
page 34
SLOT
+3.3V_RUN
SD/MMC
page 33
+3.3V_RUN
CONN
IEEE1394
page 33
page 32
+VCC_GFXCORE
page 53
PWR SELECT
page 54
EXPRESS
Card
+3.3V_RUN
+5V_RUN
DP CONN
page 26
eDP CONN
VGA
page 24
+5V_RUN
CRT CONN
eDP
page 27
Video Switch
PI3V712-AZLE
+3.3V_RUN
page 27
VGA
+5V_ALW
+PWR_SRC
+3.3V_RUN
DPB
DPC
+GPU_CORE
N10M/N10P
29X29
+1.5V_MEM_GFX
page 24-27
DP Switch
page 26
PI3VDP8200
+5V_RUN
PCIE5
USB[7]
On IO/B
PCIE3
+VCC_GFXCORE
+1.05V_RUN_VTT_GFX
page 36page 35
R3P TPF3000
DP Repeater
page 24
DP119
+3.3V_RUN
SATA Repeater
page 28
SN75LVCP412
+3.3V_RUN
page 15
+3.3V_M
W25X64VSSIG
32M 4K sector
SPI
page 15
+3.3V_M
W25Q64VSSIG
64M 4K sector
page 36
USB[13]
SATA/PCIE
MUX PI2DBS212
SATA2
page 35
SATA Repeater
+3.3V_RUN
SN75LVCP412
Mini Card 3
PCIE\BKT
+3.3V_RUN
+1.5V_RUN
USB2 : Left side pair top
+V_DDR_REF
Trough eDP Cable
+5V_ALW
page 37
USB Ports X2
USB[2,3] L SIDE
+5V_RUN
Camera
USB[11]
page 24
USB3 Rear Right pair bottom
page 37
SATA Repeater
+3.3V_RUN
SN75LVCP412
E-SATA
SATA4
+1.05V_RUN_VTT
PCIE-E 16X
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Index and Config.
369Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Index and Config.
369Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Index and Config.
369Thursday, January 21, 2010
Compal Electronics, Inc.
PM TABLE
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
MINI CARD-2 WLAN
MINI CARD-3 PCIE/BKT
PCI EXPRESS
Lane 1
DESTINATION
Lane 2
Lane 3
Lane 4
MINI CARD-1 WWAN
POWER STATES
S0 (Full ON) / M0
SLP
S3#
SLP
S5#
HIGH
Signal
State
SLP
S4#
HIGH HIGH HIGH
S4
STATE#
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
PLANE
RUN
PLANE
CLOCKS
ON ON ON
S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M1 ON ON OFF
SLP
M#
HIGH
HIGH
LOW HIGH HIGHLOW
S5 (SOFT OFF) / M1 ON ON OFFLOW LOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW LOW ON OFF OFF OFF OFF
S4 (Suspend to DISK) / M-OFF HIGH
Lane 5
Lane 6
Card Bus
10/100/1G LAN
+3.3V_M +3.3V_M
(M-OFF)
ON
ON
ON
ON
OFF
OFF
OFFOFF
+1.05V_RUN_VTT
+3.3V_SUS
+5V_ALW
+5V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
+1.5V_MEM
+0.75V_DDR_VTT
+1.5V_RUN
S0
S3
S5 S4/AC don't exist
+VCC_CORE
ON
power
plane
S5 S4/AC
State
OFFON
ON
ON
ON ON
OFF
OFF
OFF
OFFOFF
+15V_ALW
+3.3V_RTC_LDO
+1.05V_M
EXPRESS CARD
JESA1 (Ext Left Side Bottom)
JESA1 (Ext Left Side Top)
WLAN
WPAN/NVMHCI
WWAN
DOCKING8
9
USH->BIO
10 Express card
11
JUSB1 (Ext Right Side Top)
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
DOCKING
Camera
JUSB1 (Ext Right Side Bottom)
PCH
Lane 7
Lane 8 None
None
12
13
NA
Bluetooth
LOW
LOW
OFF
OFF
+1.05V_RUN
+1.05V_M
OFF
OFF
OFF
+1.8V_RUN
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Power Rail
469Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Power Rail
469Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Power Rail
469Thursday, January 21, 2010
Compal Electronics, Inc.
BATTERY
+PWR_SRC
ADAPTER
FDC654P +BL_PWR_SRC
EN_INVPWR
SI3456BDVSI3456BDV
HDDC_EN
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5V_MOD
MODC_EN
CHARGER
+3.3V_ALW
SN060898
ALWON
SI3456
+3.3V_LAN+3.3V_SUS
+1.0V_LAN
NTMS4107
RUN_ON
+3.3V_RUN
+5V_HDD
Q17
(Q29)(Q32)
(PU2)
(Q2)
DCP69
(Q45)
(Q61)
REGCTL_PNP10
+VCC_CORE
ISL62883
(PU11)
+1.05V_1.1V_RUN_VTT +1.05V_M
SIO_SLP_M#
(PU8)
TPS51318
SUS_ON
STS11NF30L
(Q60)
IMVP_VR_ON
SI3456BDV
+3.3V_M
(Q66)
M_ON
+3.3V_ALW_PCH
PCH_ALW
SI3456BDV
(Q54)
AUX_ON
+1.8V_RUN
RUN_ON
(PU6)
ISL8014
+3.3V_WLAN
SI3456BDV
(Q47)
AUX_EN_WOWL
STS11NF30L
(Q183)
+1.05V_RUN
TPS51728 +GPU_CORE
DGPI_PWR_EN
(PU17)
(PU10)
MAX17007
RUN_ON
+3.3V_M
Pop option
Pop option
+1.05V_M
Pop option
Pop option
RUN_ON
+5V_RUN
STS11NF30L
(Q55)
+15V_ALW
+5V_ALW
+1.5V_RUN
RUN_ON
NTMS4107
(Q151)
+1.5V_MEM
TPS51100
(PU7)
+0.75V_DDR_VTT
DDR_ON
TPS51318
(PU3)
0.75V_DDR_VTT_ON
H_VTTPWRGD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
SMBUS TOPOLOGY
569Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
SMBUS TOPOLOGY
569Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
SMBUS TOPOLOGY
569Thursday, January 21, 2010
Compal Electronics, Inc.
10
11
Express card
+3.3V_ALW
EXP_SMBCLK
EXP_SMBDATA
+3.3V_SUS
2.2K
2.2K SMBUS Address [TBD]
2.2K
2.2K
A49
B52
CARD_SMBCLK
CARD_SMBDAT
+3.3V_ALW_PCH
0 ohm0 ohm
18
A50
B53
B49
B48
31
28
1C
1C
B59
A56
+3.3V_ALW
2.2K
2.2K
100 ohm
100 ohm
BATTERY
CONN
7
6
SMBUS Address [TBD]
PBAT_SMBCLK
PBAT_SMBDAT
3A
+3.3V_ALW
129
127
SMBUS Address [TBD]
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT
DOCKING
2.2K
B4
A3
1A
1A
1E
1E
2B
2B
SMBUS Address [C8]
LOM
USH
A4
B5
20
21
SMBUS Address [TBD]
+3.3V_ALW
KBC
2.2K
2.2K
LCD_SMBCLK
LCD_SMDATA
1B
+3.3V_ALW
USH_SMBCLK
USH_SMBDAT
C8
H14
2A
2A
B7
A7
MEC 5035
+3.3V_RUN
2.2K
2.2K
2D
MEM_SMBDATA
2D
31
32
CKG_SMBDAT
CKG_SMBCLK
CLK GEN
SMBUS Address [TBD]
1B
53
51
SMBUS Address [TBD]
XDP1
SMBUS Address [TBD]
XDP2
53
51
8
9
2N7002
2N7002
DAI_SMBCLK_Q
DAI_SMBDAT_Q
A/D,D/A
converter
SMBUS Address [TBD]
+3.3V_ALW
2.2K
2.2K
200
DIMMA
SMBUS Address [TBD]
202
SML1_SMBDATA
PCH
SML1_SMBCLK
+3.3V_RUN
G Sensor
2.2K
2.2K
SMBUS Address [TBD]
MEM_SMBCLK
+3.3V_ALW_PCH
2.2K
2.2K
C6
G8
CHARGER_SMBCLK
CHARGER_SMBDAT
Charger
SMBUS Address [TBD]
+3.3V_ALW_PCH
2.2K
2.2K
B50
1G
1G
A47
LAN_SMBCLK
LAN_SMBDATA
3A
B6A5
DIMMB
SMBUS Address [TBD]
200
2N7002
2N7002
202
+3.3V_RUN
2.2K
2.2K
2N7002
2N7002 R3P
SMBUS Address [TBD]
27
29
DAI_GPU_R3P_SMBCLK
DAI_GPU_R3P_SMBDAT
19
SMBUS Address [TBD]
10
9
E10G12
+3.3V_ALW
2.2K
2.2K
(JeDP1)
LCD
14
13
2.2K
2.2K
2.2K
2.2K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_STP_CPU#
CLKREF
CLKREF
CLK_XTAL_IN
CLK_XTAL_OUT
CLKREFCLK_PCH_14M
BUF_BCLK
BUF_BCLK# CLK_BUF_BCLK#
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
DOT96#
DOT96
CLK_BUF_CKSSCD#
BUF_CKSSCD
BUF_CKSSCD#
CLK_BUF_CKSSCD
BUF_EXP
CLK_BUF_EXP#BUF_EXP#
CLK_BUF_EXP
CKG_FFS_SMBCLK
CKG_FFS_SMBDAT
CLK_PWRGD
H_STP_CPU#
CLK_NVSS CLK_NVSS_27M
CLK_NV CLK_NV_27M
CLK_PWRGD
+3.3V_RUN
+3.3V_RUN
+CK_VDD_MAIN
+1.05V_RUN
+CLK_VDD_IO
+1.05V_RUN
+CLK_VDD_IO
+CK_VDD_MAIN
+3.3V_RUN
+3.3V_RUN
CLK_BUF_DOT96 16
CLK_BUF_DOT96# 16
CLK_PCH_14M16
CLK_BUF_BCLK# 16
CLK_BUF_BCLK 16
CLK_BUF_CKSSCD# 16
CLK_BUF_CKSSCD 16
CLK_BUF_EXP 16
CLK_BUF_EXP# 16
CKG_FFS_SMBCLK40
CKG_FFS_SMBDAT40
CLK_NVSS_27M 53
CLK_NV_27M 53
CLK_EN#50
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Clock Generator
669Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Clock Generator
669Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Clock Generator
669Thursday, January 21, 2010
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
+CLK_VDD_IO CAN BE RANGE FROM 1.05V TO 3V
133MHz
PIN 30
0
CPU0
100MHz1
REF_O/CPU_SEL
EMI
(DEFULT) 133MHz
100MHz
CPU1
(0.7~1.5v)
L2
BLM18AG601SN1D_0603~D
L2
BLM18AG601SN1D_0603~D
1 2
R372
0_0402_5%~D
@R372
0_0402_5%~D
@
1 2
R13 0_0402_5%~DR13 0_0402_5%~D
1 2
C2
10U_0805_10V4Z~D
C2
10U_0805_10V4Z~D
1
2
C4
0.1U_0402_16V4Z~D
C4
0.1U_0402_16V4Z~D
1
2
L89
BLM18AG601SN1D_0603~D
L89
BLM18AG601SN1D_0603~D
1 2
C8
10U_0805_10V4Z~D
C8
10U_0805_10V4Z~D
1
2
C1392
0.1U_0402_16V4Z~D
@C1392
0.1U_0402_16V4Z~D
@
1
2
R1181 0_0402_5%~DR1181 0_0402_5%~D
1 2
C1707
10P_0402_50V8J~D
@C1707
10P_0402_50V8J~D
@
1
2
R11 0_0402_5%~DR11 0_0402_5%~D
1 2
R43 33_0402_5%~D@R43 33_0402_5%~D@1 2
R37 0_0402_5%~DR37 0_0402_5%~D
1 2
R92 10K_0402_5%~DR92 10K_0402_5%~D
1 2
C9
0.1U_0402_16V4Z~D
C9
0.1U_0402_16V4Z~D
1
2
C6
0.1U_0402_16V4Z~D
C6
0.1U_0402_16V4Z~D
1
2
R17 0_0402_5%~DR17 0_0402_5%~D
1 2
R132
1K_0402_5%~D
R132
1K_0402_5%~D
12
U1
SLG8SP585VTR_QFN32_5X5~D
U1
SLG8SP585VTR_QFN32_5X5~D
VDD_DOT
1
VDD_27
5
DOT_96 3
DOT_96# 4
VDDSRC_IO
15
VDDCPU_IO
18
CPU_0# 22
CPU_0 23
VDDSRC_3.3
17
VDDCPU_3.3
24
VDDREF_3.3
29
SRC_1/SATA 10
SRC_1/SATA# 11
27MHz 6
27MHz_SS 7
SRC_2 13
SRC_2# 14
CPU_1# 19
CPU_1 20
CPU_STOP#
16
SDA
31
SCL
32
CKPWRGD/PD#
25
REF_0/CPU_SEL
30
VSS_DOT 2
VSS_27 8
VSS_SATA 9
VSS_SRC 12
VSS_CPU 21
VSS_REF 26
EP 33
XTAL_IN
28
XTAL_OUT
27
C16
27P_0402_50V8J~D
C16
27P_0402_50V8J~D
12
R41
4.7K_0402_5%~D
@R41
4.7K_0402_5%~D
@
12
R39 33_0402_5%~D@R39 33_0402_5%~D@1 2
R369
100_0402_5%~D
R369
100_0402_5%~D
1 2
R23
10K_0402_5%~D
R23
10K_0402_5%~D
12
C3
0.1U_0402_16V4Z~D
C3
0.1U_0402_16V4Z~D
1
2
R33
33_0402_5%~D
R33
33_0402_5%~D
1 2
X1
14.318MHZ_16PF_7A14300083~D
X1
14.318MHZ_16PF_7A14300083~D
12
R49 0_0402_5%~DR49 0_0402_5%~D
1 2
C5
0.1U_0402_16V4Z~D
C5
0.1U_0402_16V4Z~D
1
2
C10
0.1U_0402_16V4Z~D
C10
0.1U_0402_16V4Z~D
1
2
R38 0_0402_5%~DR38 0_0402_5%~D
1 2
G
D
S
Q136
SSM3K7002FU_SC70-3~D
G
D
S
Q136
SSM3K7002FU_SC70-3~D
2
13
R52 0_0402_5%~DR52 0_0402_5%~D
1 2
U23
NC7SZ04P5X_NL_SC70-5~D
@U23
NC7SZ04P5X_NL_SC70-5~D
@
A
2Y4
P5
NC 1
G
3
C17
27P_0402_50V8J~D
C17
27P_0402_50V8J~D
12
R1180 0_0402_5%~DR1180 0_0402_5%~D
1 2
C7
0.1U_0402_16V4Z~D
C7
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CTX_PRX_N0
DMI_CRX_PTX_N2
DMI_CTX_PRX_P2
DMI_CTX_PRX_P1
DMI_CRX_PTX_N0
DMI_CRX_PTX_P0
DMI_CRX_PTX_N3
DMI_CTX_PRX_N3
DMI_CRX_PTX_P3
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_N1
DMI_CRX_PTX_N1
DMI_CTX_PRX_N2
EXP_RBIAS
PEG_IRCOMP_R
PEG_CRX_GTX_N10
PEG_CRX_GTX_N4
PEG_CRX_GTX_N13
PEG_CRX_GTX_N7
PEG_CRX_GTX_N6
PEG_CRX_GTX_N2
PEG_CRX_GTX_N1
PEG_CRX_GTX_N15
PEG_CRX_GTX_N5
PEG_CRX_GTX_N0
PEG_CRX_GTX_N9
PEG_CRX_GTX_N14
PEG_CRX_GTX_N8
PEG_CRX_GTX_N12
PEG_CRX_GTX_N3
PEG_CRX_GTX_N11
PEG_CRX_GTX_P13
PEG_CRX_GTX_P0
PEG_CRX_GTX_P5
PEG_CRX_GTX_P6
PEG_CRX_GTX_P2
PEG_CRX_GTX_P8
PEG_CRX_GTX_P4
PEG_CRX_GTX_P3
PEG_CRX_GTX_P7
PEG_CRX_GTX_P9
PEG_CRX_GTX_P15
PEG_CRX_GTX_P14
PEG_CRX_GTX_P10
PEG_CRX_GTX_P11
PEG_CRX_GTX_P12
PEG_CRX_GTX_P1
PEG_CTX_GRX_C_N14
PEG_CTX_GRX_C_N7
PEG_CTX_GRX_C_N0
PEG_CTX_GRX_C_N3
PEG_CTX_GRX_C_N1
PEG_CTX_GRX_C_N4
PEG_CTX_GRX_C_N8
PEG_CTX_GRX_C_N5
PEG_CTX_GRX_C_N2
PEG_CTX_GRX_C_N6
PEG_CTX_GRX_C_N9
PEG_CTX_GRX_C_N12
PEG_CTX_GRX_C_P1
PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_N15
PEG_CTX_GRX_C_N10
PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_N11
PEG_CTX_GRX_C_N13
PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_P8
PEG_CTX_GRX_C_P11
PEG_CTX_GRX_C_P14
PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_P10
PEG_CTX_GRX_C_P4
PEG_CTX_GRX_C_P12
PEG_CTX_GRX_C_P15
PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_P9
PEG_CTX_GRX_C_P13
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_P1
PEG_CTX_GRX_P0
PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_N3
PEG_CTX_GRX_C_N0 PEG_CTX_GRX_N0
PEG_CTX_GRX_C_N1
PEG_CTX_GRX_C_N2
PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_P4
PEG_CTX_GRX_C_N4
PEG_CTX_GRX_C_N6
PEG_CTX_GRX_C_N5
PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_P8
PEG_CTX_GRX_C_P9
PEG_CTX_GRX_C_N8
PEG_CTX_GRX_C_N7
PEG_CTX_GRX_C_P10
PEG_CTX_GRX_C_P11
PEG_CTX_GRX_C_N11
PEG_CTX_GRX_C_N9
PEG_CTX_GRX_C_N10
PEG_CTX_GRX_C_P12
PEG_CTX_GRX_C_N12
PEG_CTX_GRX_C_N13
PEG_CTX_GRX_C_P13
PEG_CTX_GRX_C_P14
PEG_CTX_GRX_C_N14
PEG_CTX_GRX_C_P15
PEG_CTX_GRX_C_N15
PEG_CTX_GRX_P1
PEG_CTX_GRX_N1
PEG_CTX_GRX_N2
PEG_CTX_GRX_P2
PEG_CTX_GRX_P3
PEG_CTX_GRX_P4
PEG_CTX_GRX_N3
PEG_CTX_GRX_N4
PEG_CTX_GRX_P5
PEG_CTX_GRX_P6
PEG_CTX_GRX_P7
PEG_CTX_GRX_N5
PEG_CTX_GRX_N7
PEG_CTX_GRX_N6
PEG_CTX_GRX_P8
PEG_CTX_GRX_P9
PEG_CTX_GRX_P10
PEG_CTX_GRX_N8
PEG_CTX_GRX_N9
PEG_CTX_GRX_P11
PEG_CTX_GRX_N12
PEG_CTX_GRX_P12
PEG_CTX_GRX_N11
PEG_CTX_GRX_N10
PEG_CTX_GRX_N13
PEG_CTX_GRX_P13
PEG_CTX_GRX_P14
PEG_CTX_GRX_P15
PEG_CTX_GRX_N14
PEG_CTX_GRX_N15
FDI_GND
DMI_CRX_PTX_P017
DMI_CRX_PTX_N317
DMI_CRX_PTX_P117
DMI_CRX_PTX_N117
DMI_CRX_PTX_P317
DMI_CRX_PTX_N217
DMI_CRX_PTX_P217
DMI_CRX_PTX_N017
DMI_CTX_PRX_N017
DMI_CTX_PRX_N117
DMI_CTX_PRX_N217
DMI_CTX_PRX_N317
DMI_CTX_PRX_P017
DMI_CTX_PRX_P117
DMI_CTX_PRX_P217
DMI_CTX_PRX_P317
PEG_CRX_GTX_N[0..15] 53
PEG_CRX_GTX_P[0..15] 53
PEG_CTX_GRX_N[0..15] 53
PEG_CTX_GRX_P[0..15] 53
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (1/6)
769Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (1/6)
769Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (1/6)
769Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C1668 0.1U_0402_10V7K~DC1668 0.1U_0402_10V7K~D
12
C1694 0.1U_0402_10V7K~DC1694 0.1U_0402_10V7K~D
1 2
C1691 0.1U_0402_10V7K~DC1691 0.1U_0402_10V7K~D
1 2
C1679 0.1U_0402_10V7K~DC1679 0.1U_0402_10V7K~D
12
C1670 0.1U_0402_10V7K~DC1670 0.1U_0402_10V7K~D
12
R1084 49.9_0402_1%~DR1084 49.9_0402_1%~D
1 2
C1676 0.1U_0402_10V7K~DC1676 0.1U_0402_10V7K~D
12
C1673 0.1U_0402_10V7K~DC1673 0.1U_0402_10V7K~D
12
C1688 0.1U_0402_10V7K~DC1688 0.1U_0402_10V7K~D
1 2
C1696 0.1U_0402_10V7K~DC1696 0.1U_0402_10V7K~D
1 2
C1686 0.1U_0402_10V7K~DC1686 0.1U_0402_10V7K~D
1 2
C1677 0.1U_0402_10V7K~DC1677 0.1U_0402_10V7K~D
12
C1685 0.1U_0402_10V7K~DC1685 0.1U_0402_10V7K~D
1 2
R1129 750_0402_1%~DR1129 750_0402_1%~D
1 2
C1675 0.1U_0402_10V7K~DC1675 0.1U_0402_10V7K~D
12
C1678 0.1U_0402_10V7K~DC1678 0.1U_0402_10V7K~D
12
C1666 0.1U_0402_10V7K~DC1666 0.1U_0402_10V7K~D
12
C1684 0.1U_0402_10V7K~DC1684 0.1U_0402_10V7K~D
1 2
C1690 0.1U_0402_10V7K~DC1690 0.1U_0402_10V7K~D
1 2
C1682 0.1U_0402_10V7K~DC1682 0.1U_0402_10V7K~D
1 2
C1697 0.1U_0402_10V7K~DC1697 0.1U_0402_10V7K~D
1 2
C1681 0.1U_0402_10V7K~DC1681 0.1U_0402_10V7K~D
12
C1692 0.1U_0402_10V7K~DC1692 0.1U_0402_10V7K~D
1 2
C1695 0.1U_0402_10V7K~DC1695 0.1U_0402_10V7K~D
1 2
C1671 0.1U_0402_10V7K~DC1671 0.1U_0402_10V7K~D
12
C1693 0.1U_0402_10V7K~DC1693 0.1U_0402_10V7K~D
1 2
C1667 0.1U_0402_10V7K~DC1667 0.1U_0402_10V7K~D
12
C1669 0.1U_0402_10V7K~DC1669 0.1U_0402_10V7K~D
12
PCI EXPRESS -- GRAPHICS
DMI Intel(R) FDI
REV1.0
JCPUA
TYCO_CALPELLA_AUBURNDALE
PCI EXPRESS -- GRAPHICS
DMI Intel(R) FDI
REV1.0
JCPUA
TYCO_CALPELLA_AUBURNDALE
DMI_RX#[0]
A24
DMI_RX#[1]
C23
DMI_RX#[2]
B22
DMI_RX#[3]
A21
DMI_RX[0]
B24
DMI_RX[1]
D23
DMI_RX[2]
B23
DMI_RX[3]
A22
DMI_TX#[0]
D24
DMI_TX#[1]
G24
DMI_TX#[2]
F23
DMI_TX#[3]
H23
DMI_TX[0]
D25
DMI_TX[1]
F24
DMI_TX[3]
G23 DMI_TX[2]
E23
FDI_TX#[0]
E22
FDI_TX#[1]
D21
FDI_TX#[2]
D19
FDI_TX#[3]
D18
FDI_TX#[4]
G21
FDI_TX#[5]
E19
FDI_TX#[6]
F21
FDI_TX#[7]
G18
FDI_TX[0]
D22
FDI_TX[1]
C21
FDI_TX[2]
D20
FDI_TX[3]
C18
FDI_TX[4]
G22
FDI_TX[5]
E20
FDI_TX[6]
F20
FDI_TX[7]
G19
FDI_FSYNC[0]
F17
FDI_FSYNC[1]
E17
FDI_INT
C17
FDI_LSYNC[0]
F18
FDI_LSYNC[1]
D17
PEG_ICOMPI B26
PEG_ICOMPO A26
PEG_RBIAS A25
PEG_RCOMPO B27
PEG_RX#[0] K35
PEG_RX#[1] J34
PEG_RX#[2] J33
PEG_RX#[3] G35
PEG_RX#[4] G32
PEG_RX#[5] F34
PEG_RX#[6] F31
PEG_RX#[7] D35
PEG_RX#[8] E33
PEG_RX#[9] C33
PEG_RX#[10] D32
PEG_RX#[11] B32
PEG_RX#[12] C31
PEG_RX#[13] B28
PEG_RX#[14] B30
PEG_RX#[15] A31
PEG_RX[0] J35
PEG_RX[1] H34
PEG_RX[2] H33
PEG_RX[3] F35
PEG_RX[4] G33
PEG_RX[5] E34
PEG_RX[6] F32
PEG_RX[7] D34
PEG_RX[8] F33
PEG_RX[9] B33
PEG_RX[10] D31
PEG_RX[11] A32
PEG_RX[12] C30
PEG_RX[13] A28
PEG_RX[14] B29
PEG_RX[15] A30
PEG_TX#[0] L33
PEG_TX#[1] M35
PEG_TX#[2] M33
PEG_TX#[3] M30
PEG_TX#[4] L31
PEG_TX#[5] K32
PEG_TX#[6] M29
PEG_TX#[7] J31
PEG_TX#[8] K29
PEG_TX#[9] H30
PEG_TX#[10] H29
PEG_TX#[11] F29
PEG_TX#[12] E28
PEG_TX#[13] D29
PEG_TX#[14] D27
PEG_TX#[15] C26
PEG_TX[0] L34
PEG_TX[1] M34
PEG_TX[2] M32
PEG_TX[3] L30
PEG_TX[4] M31
PEG_TX[5] K31
PEG_TX[6] M28
PEG_TX[7] H31
PEG_TX[8] K28
PEG_TX[9] G30
PEG_TX[10] G29
PEG_TX[11] F28
PEG_TX[12] E27
PEG_TX[13] D28
PEG_TX[14] C27
PEG_TX[15] C25
C1674 0.1U_0402_10V7K~DC1674 0.1U_0402_10V7K~D
12
R1147
1K_0402_5%~D
R1147
1K_0402_5%~D
1 2
C1687 0.1U_0402_10V7K~DC1687 0.1U_0402_10V7K~D
1 2
VSS
NCTF
REV1.0
JCPUI
TYCO_CALPELLA_AUBURNDALE
VSS
NCTF
REV1.0
JCPUI
TYCO_CALPELLA_AUBURNDALE
VSS161
K27
VSS162
K9
VSS163
K6
VSS164
K3
VSS165
J32
VSS166
J30
VSS167
J21
VSS168
J19
VSS169
H35
VSS170
H32
VSS171
H28
VSS172
H26
VSS173
H24
VSS174
H22
VSS175
H18
VSS176
H15
VSS177
H13
VSS178
H11
VSS179
H8
VSS180
H5
VSS181
H2
VSS182
G34
VSS183
G31
VSS184
G20
VSS185
G9
VSS186
G6
VSS187
G3
VSS188
F30
VSS189
F27
VSS190
F25
VSS191
F22
VSS192
F19
VSS193
F16
VSS194
E35
VSS195
E32
VSS196
E29
VSS197
E24
VSS198
E21
VSS199
E18
VSS200
E13
VSS201
E11
VSS202
E8
VSS203
E5
VSS204
E2
VSS205
D33
VSS206
D30
VSS207
D26
VSS208
D9
VSS209
D6
VSS210
D3
VSS211
C34
VSS212
C32
VSS213
C29
VSS214
C28
VSS215
C24
VSS216
C22
VSS217
C20
VSS218
C19
VSS219
C16
VSS220
B31
VSS221
B25
VSS222
B21
VSS223
B18
VSS224
B17
VSS225
B13
VSS226
B11
VSS227
B8
VSS228
B6
VSS229
B4
VSS230
A29
VSS_NCTF1 AT35
VSS_NCTF2 AT1
VSS_NCTF3 AR34
VSS_NCTF4 B34
VSS_NCTF5 B2
VSS_NCTF6 B1
VSS_NCTF7 A35
VSS231
A27
VSS232
A23
VSS233
A9
C1689 0.1U_0402_10V7K~DC1689 0.1U_0402_10V7K~D
1 2
C1680 0.1U_0402_10V7K~DC1680 0.1U_0402_10V7K~D
12
C1683 0.1U_0402_10V7K~DC1683 0.1U_0402_10V7K~D
1 2
C1672 0.1U_0402_10V7K~DC1672 0.1U_0402_10V7K~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_CPU_ITP#
H_COMP0
H_COMP1
H_CATERR#
H_PROCHOT#
H_CPURST#
H_CPURST#_R
SM_RCOMP1
SM_RCOMP2
XDP_TDI_R XDP_TDI
XDP_TDO
XDP_TDO_R
XDP_TCLK
XDP_DBRESET#
XDP_TRST#
XDP_TMS
CLK_CPU_ITP
H_CPURST#_R XDP_TMS
H_THERMTRIP#_R
XDP_TDO_R
H_PROCHOT#
H_PECI
H_COMP3
SM_RCOMP0
XDP_TRST#
SM_RCOMP0
XDP_TDI_M
H_CATERR#
XDP_TDO_M
CPU_DETECT#
XDP_TDI_R
PM_EXTTS#
H_VTTPWRGD
VCCPWRGOOD_0_R
PM_DRAM_PWRGD_R
CPU_BCLK#
H_PM_SYNC
XDP_TDI_M
XDP_TCLK
H_PWRGD_XDP
XDP_TDO_M
XDP_PRDY#
SM_RCOMP2
H_COMP2
XDP_PREQ#
CPU_BCLK
PCH_PLTRST#_R
SM_RCOMP1
H_COMP0
H_COMP3
H_COMP2
H_COMP1
XDP_TDO
XDP_TDI_R
XDP_PREQ#
VCCPWRGOOD_1_R
PM_DRAM_PWRGD_R
XDP_DBRESET#_R
CPU_EXP
CPU_EXP#
H_THERMTRIP#
CLK_CPU_ITP
CLK_CPU_ITP#
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
CFD_PWRBTN#_XDP
CFG1
CFG2
CFG0
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
XDP_TMS
CFG10
CFG11
XDP_PREQ#
XDP_PRDY#
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TCLK
H_CPUPWRGD
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
H_CPURST#H_PWRGD_XDP
H_CPUPWRGD_XDP
XDP_RST#_RPWRGD_XDP_R
XDP_OBS2
XDP_OBS3XDP_OBS3_R
XDP_OBS5_R
XDP_OBS2_R
XDP_OBS1_R
XDP_OBS0_R
XDP_OBS4_R XDP_OBS4
XDP_OBS7
XDP_OBS5
XDP_OBS6_R
XDP_OBS7_R
XDP_OBS6
XDP_OBS0
XDP_OBS1
DDR3_DRAMRST#_CPU
1.5V_CPU_VDDQ_PWRGD#
1.5V_CPU_VDDQ_PWRGD_R1.5V_CPU_VDDQ_PWRGD
1.5V_PWRGD
+1.05V_1.1V_RUN_VTT
+1.05V_1.1V_RUN_VTT
+1.05V_1.1V_RUN_VTT
+3.3V_RUN
+1.05V_1.1V_RUN_VTT
+1.05V_1.1V_RUN_VTT +1.05V_1.1V_RUN_VTT
+3.3V_ALW
+1.5V_CPU_VDDQ
+3.3V_ALW2+3.3V_ALW2
+1.5V_CPU_VDDQ
H_PM_SYNC17
CLK_CPU_BCLK# 19
CLK_CPU_BCLK 19
H_THERMTRIP#23
H_VTTPWRGD49
PM_DRAM_PWRGD17
H_PECI19
PCH_PLTRST#_EC18,32,34,36,39,40
CLK_CPU_EXP# 16
CLK_CPU_EXP 16
DDR3_DRAMRST# 13,14
XDP_DBRESET# 15,17
PM_EXTTS# 23
H_CPUPWRGD19
H_PROCHOT#50
H_CATERR#39
IMVP_PWRGD39,50
SIO_PWRBTN#_R15,17
CFG8 10
CFG9 10
CFG0 10
CFG1 10
CFG2 10
CFG3 10
CFG10 10
CFG11 10
CFG4 10
CFG5 10
CFG6 10
CFG7 10
DDR_HVREF_RST_GATE 13,14,40
1.5V_PWRGD 42
CPU_DETECT#40
DDR_XDP_SMBDAT_R15
DDR_XDP_SMBCLK_R15
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (2/6)
869Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (2/6)
869Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (2/6)
869Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
JTAG MAPPING
Scan Chain
(Default)
Stuff -> R1153,R1156,R1157
No stuff -> R1154,R1155
CPU Only Stuff -> R1153,R1154
No stuff -> R1154,R1155,R1157
PCH Only Stuff -> R1155,R1156
No stuff -> R1153,R1154,R1157
Place near JXDP1
Refer to CRB 1.51
Refer to Intel S3 circuit
place R1286 near CPU
Keep R1132, R1133, R1136, R1137
for slew rate control.
For ESD concern, please put near CPU
For production stuffing,
Intel recommend stuffing R67
R1469 0_0402_5%~D@R1469 0_0402_5%~D@
1 2
R1153
0_0402_5%~D
@R1153
0_0402_5%~D
@
1 2
R1155
0_0402_5%~D
@R1155
0_0402_5%~D
@
1 2
JXDP1
SAMTE_BSH-030-01-L-D-A
@JXDP1
SAMTE_BSH-030-01-L-D-A
@
GND0
1
OBSFN_A0
3
OBSFN_A1
5
GND2
7
OBSDATA_A0
9
OBSDATA_A1
11
GND4
13
OBSDATA_A2
15
OBSDATA_A3
17
GND6
19
OBSFN_B0
21
OBSFN_B1
23
GND8
25
OBSDATA_B0
27
OBSDATA_B1
29
GND10
31
OBSDATA_B2
33
OBSDATA_B3
35
GND12
37
PWRGOOD/HOOK0
39
HOOK1
41
VCC_OBS_AB
43
HOOK2
45
HOOK3
47
GND14
49
SDA
51
SCL
53
TCK1
55
TCK0
57
GND16
59
GND1 2
OBSFN_C0 4
OBSFN_C1 6
GND3 8
OBSDATA_C0 10
OBSDATA_C1 12
GND5 14
OBSDATA_C2 16
OBSDATA_C3 18
GND7 20
OBSFN_D0 22
OBSFN_D1 24
GND9 26
OBSDATA_D0 28
OBSDATA_D1 30
GND11 32
OBSDATA_D2 34
OBSDATA_D3 36
GND13 38
ITPCLK/HOOK4 40
ITPCLK#/HOOK5 42
VCC_OBS_CD 44
RESET#/HOOK6 46
DBR#/HOOK7 48
GND15 50
TD0 52
TRST# 54
TDI 56
TMS 58
GND17 60
R1095
49.9_0402_1%~D
R1095
49.9_0402_1%~D
12
C1888
0.1U_0402_16V4Z~D
C1888
0.1U_0402_16V4Z~D
1
2
R1232 49.9_0402_1%~DR1232 49.9_0402_1%~D
1 2
R6
1K_0402_5%~D
@R6
1K_0402_5%~D
@
1 2
R878 0_0402_5%~DR878 0_0402_5%~D
1 2
C20
0.1U_0402_16V4Z~D
@
C20
0.1U_0402_16V4Z~D
@
1
2
R785 0_0402_5%~D@R785 0_0402_5%~D@1 2
R60
1K_0402_5%~D
R60
1K_0402_5%~D
12
R879
1.5K_0402_1%~D
R879
1.5K_0402_1%~D
12
R1093
20_0402_1%~D
R1093
20_0402_1%~D
12
R25
10K_0402_5%~D
R25
10K_0402_5%~D
12
R1241
0_0402_5%~D
@R1241
0_0402_5%~D
@
12
R784 0_0402_5%~D@R784 0_0402_5%~D@
1 2
R1481
10K_0402_5%~D
R1481
10K_0402_5%~D
12
R1140
100_0402_1%~D
R1140
100_0402_1%~D
12
R1286
0_0402_5%~D
R1286
0_0402_5%~D
1 2
R1144
1.5K_0402_1%~D
R1144
1.5K_0402_1%~D
1 2
R1511
1.1K_0402_1%~D
@R1511
1.1K_0402_1%~D
@
1 2
R1142
130_0402_1%~D
R1142
130_0402_1%~D
12
C1879
0.1U_0402_16V4Z~D
C1879
0.1U_0402_16V4Z~D
1 2
G
D
S
Q207
BSS138_SOT23~D
G
D
S
Q207
BSS138_SOT23~D
2
13
R1487
1.8K_0402_5%~D
R1487
1.8K_0402_5%~D
1 2
R24 0_0402_5%~D@R24 0_0402_5%~D@
1 2
R1143
750_0402_1%~D
R1143
750_0402_1%~D
1 2
R1133 0_0402_5%~DR1133 0_0402_5%~D
1 2
R1482
100K_0402_5%~D
R1482
100K_0402_5%~D
12
R783 0_0402_5%~D@R783 0_0402_5%~D@1 2
C19
0.1U_0402_16V4Z~D
@
C19
0.1U_0402_16V4Z~D
@
1
2
R1233 68_0402_1%~DR1233 68_0402_1%~D
1 2
R1234 68_0402_1%~D@R1234 68_0402_1%~D@
1 2
R1136 0_0402_5%~DR1136 0_0402_5%~D
1 2
R12 0_0402_5%~D@R12 0_0402_5%~D@
1 2
R1088 0_0402_5%~DR1088 0_0402_5%~D
1 2
R1290 0_0402_5%~DR1290 0_0402_5%~D
1 2
R7
1K_0402_5%~D
@R7
1K_0402_5%~D
@
12
R1149 51_0402_5%~D@R1149 51_0402_5%~D@
12
R1145
12.4K_0402_1%~D
@R1145
12.4K_0402_1%~D
@
12
R1285 56_0402_5%~DR1285 56_0402_5%~D
1 2
R66
51_0402_1%~D
@R66
51_0402_1%~D
@12
R1235
20_0402_1%~D
R1235
20_0402_1%~D
12
R880
750_0402_1%~D
R880
750_0402_1%~D
12
R1504
100K_0402_5%~D
R1504
100K_0402_5%~D
1 2
R1137 0_0402_5%~DR1137 0_0402_5%~D
1 2
CLOCKS
MISC THERMAL PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
REV1.0
JCPUB
TYCO_CALPELLA_AUBURNDALE
CLOCKS
MISC THERMAL PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
REV1.0
JCPUB
TYCO_CALPELLA_AUBURNDALE
SM_RCOMP[1] AM1
SM_RCOMP[2] AN1
SM_DRAMRST# F6
SM_RCOMP[0] AL1
BCLK# B16
BCLK A16
BCLK_ITP# AT30
BCLK_ITP AR30
PEG_CLK# D16
PEG_CLK E16
DPLL_REF_SSCLK# A17
DPLL_REF_SSCLK A18
CATERR#
AK14
COMP3
AT23
PECI
AT15
PROCHOT#
AN26
THERMTRIP#
AK15
RESET_OBS#
AP26
VCCPWRGOOD_1
AN14
VCCPWRGOOD_0
AN27
SM_DRAMPWROK
AK13
VTTPWRGOOD
AM15
RSTIN#
AL14
PM_EXT_TS#[0] AN15
PM_EXT_TS#[1] AP15
PRDY# AT28
PREQ# AP27
TCK AN28
TMS AP28
TRST# AT27
TDI AT29
TDO AR27
TDI_M AR29
TDO_M AP29
DBR# AN25
BPM#[0] AJ22
BPM#[1] AK22
BPM#[2] AK24
BPM#[3] AJ24
BPM#[4] AJ25
BPM#[5] AH22
BPM#[6] AK23
BPM#[7] AH23
COMP2
AT24
PM_SYNC
AL15
TAPPWRGOOD
AM26
COMP1
G16
COMP0
AT26
SKTOCC#
AH24
C1877
0.22U_0402_6.3V6K~D
C1877
0.22U_0402_6.3V6K~D 1
2
R64 51_0402_1%~D@R64 51_0402_1%~D@
12
R780 0_0402_5%~D@R780 0_0402_5%~D@
1 2
R1094
49.9_0402_1%~D
R1094
49.9_0402_1%~D
12
R782 0_0402_5%~D@R782 0_0402_5%~D@
1 2
R1141
24.9_0402_1%~D
R1141
24.9_0402_1%~D
12
R68 0_0402_5%~D@R68 0_0402_5%~D@
1 2
E
B
C
Q205
PMST3904_SOT323-3~D
E
B
C
Q205
PMST3904_SOT323-3~D
2
3 1
R1157
0_0402_5%~D
@R1157
0_0402_5%~D
@
12
R1483
1K_0402_5%~D
R1483
1K_0402_5%~D
12
G
D
S
Q199
BSS138_SOT23~D
G
D
S
Q199
BSS138_SOT23~D
2
13
R19 0_0402_5%~D@R19 0_0402_5%~D@
1 2
R1132 0_0402_5%~DR1132 0_0402_5%~D
1 2
R67 51_0402_1%~D@R67 51_0402_1%~D@12
R781 0_0402_5%~D@R781 0_0402_5%~D@1 2
R65 51_0402_1%~D@R65 51_0402_1%~D@
12
R22 0_0402_5%~D@R22 0_0402_5%~D@
1 2
U141
74AHC1G08GW_SOT353-5~D
U141
74AHC1G08GW_SOT353-5~D
IN1
1
IN2
2
G
3
O4
P5
R1154
0_0402_5%~D
@R1154
0_0402_5%~D
@
1 2
R1087 0_0402_5%~DR1087 0_0402_5%~D
1 2
R1156
0_0402_5%~D
@R1156
0_0402_5%~D
@
1 2
R3 51_0402_1%~D@R3 51_0402_1%~D@12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D59
DDR_A_MA12
DDR_A_MA6
DDR_A_DQS#6
DDR_A_DM4
DDR_CKE0_DIMMA
M_CLK_DDR#1
DDR_A_D31
DDR_A_D9 DDR_CS0_DIMMA#
DDR_A_BS1
DDR_A_D50
DDR_A_D42
DDR_A_D29
DDR_CS1_DIMMA#
DDR_A_D51
DDR_A_D46
DDR_A_D36
DDR_A_D18
DDR_A_D4
DDR_A_MA9
DDR_A_DQS6
DDR_A_DQS0
DDR_A_DM2
M_ODT0
M_CLK_DDR#0
DDR_A_D58
DDR_A_D55
DDR_A_D14
DDR_A_MA15
DDR_A_MA11
DDR_A_DQS#4
DDR_A_DM5
M_CLK_DDR0
DDR_A_D24
DDR_A_D8
DDR_A_DM3
DDR_A_D63
DDR_A_D49
DDR_A_D41
DDR_A_D34
DDR_A_D28
DDR_A_D25
DDR_A_DQS#3
DDR_A_D35
DDR_A_D17
DDR_A_D13
DDR_A_D3
DDR_A_MA4
DDR_A_DQS#7
DDR_A_DQS4
DDR_A_DQS3
DDR_A_DM1
DDR_A_RAS#
DDR_A_D57
DDR_A_D54
DDR_A_D22
DDR_A_D21
DDR_A_D6
DDR_A_MA10
DDR_A_MA5
DDR_A_DQS#5
DDR_A_DQS#0
M_CLK_DDR1
DDR_A_D23
DDR_A_D7
DDR_A_MA14
DDR_A_MA2
DDR_A_DQS#1
DDR_A_DM7
DDR_A_DM0
DDR_A_BS2
DDR_A_D62
DDR_A_D48
DDR_A_D40
DDR_A_D33
DDR_A_D27
DDR_A_MA13
DDR_A_DQS#2
DDR_A_WE#
DDR_A_D44
DDR_A_D16
DDR_A_D12
DDR_A_D2
DDR_A_DQS5
DDR_A_DQS2
DDR_A_CAS#
DDR_A_D56
DDR_A_D53
DDR_A_D45
DDR_A_D38
DDR_A_D20
DDR_A_MA8
DDR_A_MA7
DDR_A_D60
DDR_A_D5
DDR_A_MA3
DDR_A_DM6
M_ODT1
DDR_CKE1_DIMMA
DDR_A_D61
DDR_A_D47
DDR_A_D39
DDR_A_D32
DDR_A_D26
DDR_A_D10
DDR_A_D0
DDR_A_DQS1
DDR_A_BS0
DDR_A_D43
DDR_A_D15
DDR_A_D11
DDR_A_D1
DDR_A_DQS7
DDR_A_D52
DDR_A_D37
DDR_A_D30
DDR_A_D19
DDR_A_MA1
DDR_A_MA0
DDR_B_D29
M_ODT3
DDR_B_RAS#
DDR_B_D59
DDR_B_D50
DDR_B_D49
DDR_B_D13
DDR_B_D11
DDR_B_DQS0
DDR_B_DQS#4
DDR_B_DM6
M_CLK_DDR#2
DDR_B_D19
DDR_B_D14
DDR_B_D3
DDR_B_MA6
DDR_B_DQS#7
DDR_B_DQS#5
DDR_CS2_DIMMB#
DDR_B_D55
DDR_B_D47
DDR_B_MA0
DDR_B_WE#
DDR_B_BS2
DDR_B_D52
DDR_B_D44
DDR_B_D41
DDR_B_D8
DDR_B_D5
DDR_B_MA3
DDR_B_DM3
DDR_B_DM1
DDR_CS3_DIMMB#
DDR_B_CAS#
DDR_B_D56
DDR_B_D48
DDR_B_D38
DDR_B_D35
DDR_B_D26
DDR_B_D25
DDR_B_D4
DDR_B_MA8
DDR_B_MA4
DDR_B_DQS#0
DDR_B_DQS6
DDR_B_DM5
DDR_B_D63
DDR_B_D34
DDR_B_D32
DDR_B_D10
DDR_B_MA2
DDR_B_DQS#2
DDR_B_DM4
DDR_CKE3_DIMMB
M_CLK_DDR2
DDR_B_BS1
DDR_B_D17
DDR_B_MA7
DDR_B_DQS5
DDR_B_D51
DDR_B_D40
DDR_B_D36
DDR_B_D31
DDR_B_D21
DDR_B_D20
DDR_B_D15
DDR_B_D7
DDR_B_MA11
DDR_B_DQS#1
DDR_B_DM0
DDR_B_D62
DDR_B_D46
DDR_B_D42
DDR_B_D18
DDR_B_D12
DDR_B_D1
DDR_B_MA15
DDR_B_MA12
DDR_B_DQS1
DDR_B_D53
DDR_B_D37
DDR_B_D22
DDR_B_MA13
DDR_B_MA5
DDR_B_DQS#6
DDR_B_DM2
DDR_CKE2_DIMMB
DDR_B_D57
DDR_B_D27
DDR_B_MA14
DDR_B_D54
DDR_B_D45
DDR_B_D39
DDR_B_D30
DDR_B_D9
DDR_B_DQS4
DDR_B_D60
DDR_B_D58
DDR_B_D33
DDR_B_D0
DDR_B_MA1
DDR_B_DQS7
M_ODT2
DDR_B_D61
DDR_B_D43
DDR_B_D28
DDR_B_MA9
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DM7
M_CLK_DDR#3
DDR_B_D23
DDR_B_MA10
DDR_B_D24
DDR_B_D16
DDR_B_D6
DDR_B_D2
DDR_B_DQS3
M_CLK_DDR3
DDR_B_BS0
DDR_A_D[0..63]13
DDR_A_BS013
DDR_A_BS113
DDR_A_BS213
DDR_A_WE#13
DDR_A_CAS#13
DDR_A_RAS#13
DDR_A_DQS[0..7] 13
DDR_A_DQS#[0..7] 13
DDR_A_DM[0..7] 13
DDR_B_D[0..63]14
DDR_B_BS214
DDR_B_BS114
DDR_B_WE#14
DDR_B_CAS#14
DDR_B_RAS#14
DDR_A_MA[0..15] 13
DDR_B_MA[0..15] 14
DDR_B_DM[0..7] 14
DDR_B_DQS[0..7] 14
DDR_B_DQS#[0..7] 14
M_CLK_DDR0 13
M_CLK_DDR1 13
M_CLK_DDR#0 13
M_CLK_DDR#1 13
DDR_CKE0_DIMMA 13
DDR_CKE1_DIMMA 13
DDR_CS0_DIMMA# 13
DDR_CS1_DIMMA# 13
M_ODT0 13
M_ODT1 13
DDR_CS2_DIMMB# 14
M_CLK_DDR2 14
DDR_CS3_DIMMB# 14
M_ODT3 14
M_CLK_DDR#3 14
DDR_B_BS014
DDR_CKE3_DIMMB 14
M_ODT2 14
M_CLK_DDR#2 14
M_CLK_DDR3 14
DDR_CKE2_DIMMB 14
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (3/6)
969Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (3/6)
969Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (3/6)
969Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DDR SYSTEM MEMORY A
REV1.0
JCPUC
TYCO_CALPELLA_AUBURNDALE
DDR SYSTEM MEMORY A
REV1.0
JCPUC
TYCO_CALPELLA_AUBURNDALE
SA_BS[0]
AC3
SA_BS[1]
AB2
SA_BS[2]
U7
SA_CAS#
AE1
SA_RAS#
AB3
SA_WE#
AE9
SA_CK[0] AA6
SA_CK[1] Y6
SA_CK#[0] AA7
SA_CK#[1] Y5
SA_CKE[0] P7
SA_CKE[1] P6
SA_CS#[0] AE2
SA_CS#[1] AE8
SA_ODT[0] AD8
SA_ODT[1] AF9
SA_DM[0] B9
SA_DM[1] D7
SA_DM[2] H7
SA_DM[3] M7
SA_DM[4] AG6
SA_DM[5] AM7
SA_DM[6] AN10
SA_DM[7] AN13
SA_DQS[0] C8
SA_DQS#[0] C9
SA_DQS[1] F9
SA_DQS#[1] F8
SA_DQS[2] H9
SA_DQS#[2] J9
SA_DQS[3] M9
SA_DQS#[3] N9
SA_DQS[4] AH8
SA_DQS#[4] AH7
SA_DQS[5] AK10
SA_DQS#[5] AK9
SA_DQS[6] AN11
SA_DQS#[6] AP11
SA_DQS[7] AR13
SA_DQS#[7] AT13
SA_MA[0] Y3
SA_MA[1] W1
SA_MA[2] AA8
SA_MA[3] AA3
SA_MA[4] V1
SA_MA[5] AA9
SA_MA[6] V8
SA_MA[7] T1
SA_MA[8] Y9
SA_MA[9] U6
SA_MA[10] AD4
SA_MA[11] T2
SA_MA[12] U3
SA_MA[13] AG8
SA_MA[14] T3
SA_MA[15] V9
SA_DQ[0]
A10
SA_DQ[1]
C10
SA_DQ[2]
C7
SA_DQ[3]
A7
SA_DQ[4]
B10
SA_DQ[5]
D10
SA_DQ[6]
E10
SA_DQ[7]
A8
SA_DQ[8]
D8
SA_DQ[9]
F10
SA_DQ[10]
E6
SA_DQ[11]
F7
SA_DQ[12]
E9
SA_DQ[13]
B7
SA_DQ[14]
E7
SA_DQ[15]
C6
SA_DQ[16]
H10
SA_DQ[17]
G8
SA_DQ[18]
K7
SA_DQ[19]
J8
SA_DQ[20]
G7
SA_DQ[21]
G10
SA_DQ[22]
J7
SA_DQ[23]
J10
SA_DQ[24]
L7
SA_DQ[25]
M6
SA_DQ[26]
M8
SA_DQ[27]
L9
SA_DQ[28]
L6
SA_DQ[29]
K8
SA_DQ[30]
N8
SA_DQ[31]
P9
SA_DQ[32]
AH5
SA_DQ[33]
AF5
SA_DQ[34]
AK6
SA_DQ[35]
AK7
SA_DQ[36]
AF6
SA_DQ[37]
AG5
SA_DQ[38]
AJ7
SA_DQ[39]
AJ6
SA_DQ[40]
AJ10
SA_DQ[41]
AJ9
SA_DQ[42]
AL10
SA_DQ[43]
AK12
SA_DQ[44]
AK8
SA_DQ[45]
AL7
SA_DQ[46]
AK11
SA_DQ[47]
AL8
SA_DQ[48]
AN8
SA_DQ[49]
AM10
SA_DQ[50]
AR11
SA_DQ[51]
AL11
SA_DQ[52]
AM9
SA_DQ[53]
AN9
SA_DQ[54]
AT11
SA_DQ[55]
AP12
SA_DQ[56]
AM12
SA_DQ[57]
AN12
SA_DQ[58]
AM13
SA_DQ[59]
AT14
SA_DQ[60]
AT12
SA_DQ[61]
AL13
SA_DQ[62]
AR14
SA_DQ[63]
AP14
DDR SYSTEM MEMORY - B
REV1.0
JCPUD
TYCO_CALPELLA_AUBURNDALE
DDR SYSTEM MEMORY - B
REV1.0
JCPUD
TYCO_CALPELLA_AUBURNDALE
SB_BS[0]
AB1
SB_BS[1]
W5
SB_BS[2]
R7
SB_CAS#
AC5
SB_RAS#
Y7
SB_WE#
AC6
SB_CK[0] W8
SB_CK[1] V7
SB_CK#[0] W9
SB_CK#[1] V6
SB_CKE[0] M3
SB_CKE[1] M2
SB_CS#[0] AB8
SB_CS#[1] AD6
SB_ODT[0] AC7
SB_ODT[1] AD1
SB_DM[0] D4
SB_DM[1] E1
SB_DM[2] H3
SB_DM[3] K1
SB_DM[4] AH1
SB_DM[5] AL2
SB_DM[6] AR4
SB_DM[7] AT8
SB_DQS[4] AG2
SB_DQS#[4] AH2
SB_DQS[5] AL5
SB_DQS#[5] AL4
SB_DQS[6] AP5
SB_DQS#[6] AR5
SB_DQS[7] AR7
SB_DQS#[7] AR8
SB_DQS[0] C5
SB_DQS#[0] D5
SB_DQS[1] E3
SB_DQS#[1] F4
SB_DQS[2] H4
SB_DQS#[2] J4
SB_DQS[3] M5
SB_DQS#[3] L4
SB_MA[0] U5
SB_MA[1] V2
SB_MA[2] T5
SB_MA[3] V3
SB_MA[4] R1
SB_MA[5] T8
SB_MA[6] R2
SB_MA[7] R6
SB_MA[8] R4
SB_MA[9] R5
SB_MA[10] AB5
SB_MA[11] P3
SB_MA[12] R3
SB_MA[13] AF7
SB_MA[14] P5
SB_MA[15] N1
SB_DQ[0]
B5
SB_DQ[1]
A5
SB_DQ[2]
C3
SB_DQ[3]
B3
SB_DQ[4]
E4
SB_DQ[5]
A6
SB_DQ[6]
A4
SB_DQ[7]
C4
SB_DQ[8]
D1
SB_DQ[9]
D2
SB_DQ[10]
F2
SB_DQ[11]
F1
SB_DQ[12]
C2
SB_DQ[13]
F5
SB_DQ[14]
F3
SB_DQ[15]
G4
SB_DQ[16]
H6
SB_DQ[17]
G2
SB_DQ[18]
J6
SB_DQ[19]
J3
SB_DQ[20]
G1
SB_DQ[21]
G5
SB_DQ[22]
J2
SB_DQ[23]
J1
SB_DQ[24]
J5
SB_DQ[25]
K2
SB_DQ[26]
L3
SB_DQ[27]
M1
SB_DQ[28]
K5
SB_DQ[29]
K4
SB_DQ[30]
M4
SB_DQ[31]
N5
SB_DQ[32]
AF3
SB_DQ[33]
AG1
SB_DQ[34]
AJ3
SB_DQ[35]
AK1
SB_DQ[36]
AG4
SB_DQ[37]
AG3
SB_DQ[38]
AJ4
SB_DQ[39]
AH4
SB_DQ[40]
AK3
SB_DQ[41]
AK4
SB_DQ[42]
AM6
SB_DQ[43]
AN2
SB_DQ[44]
AK5
SB_DQ[45]
AK2
SB_DQ[46]
AM4
SB_DQ[47]
AM3
SB_DQ[48]
AP3
SB_DQ[49]
AN5
SB_DQ[50]
AT4
SB_DQ[51]
AN6
SB_DQ[52]
AN4
SB_DQ[53]
AN3
SB_DQ[54]
AT5
SB_DQ[55]
AT6
SB_DQ[56]
AN7
SB_DQ[57]
AP6
SB_DQ[58]
AP8
SB_DQ[59]
AT9
SB_DQ[60]
AT7
SB_DQ[61]
AP9
SB_DQ[62]
AR10
SB_DQ[63]
AT10
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DIMM0_VREF_R
DIMM1_VREF_R
H_RSVD17
CFG0
CFG3
CFG4
H_RSVD18
DIMM0_VREF
DIMM1_VREF
CFG10
CFG11
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG12
CFG1
CFG2
CFG0
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
DIMM0_VREF13
DIMM1_VREF14
CFG08
CFG18
CFG28
CFG38
CFG48
CFG58
CFG68
CFG78
CFG88
CFG98
CFG108
CFG118
Title
Size Document Number Rev
Date: Sheet of
LA-5572P
0.1
Auburndale (4/6)
10 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5572P
0.1
Auburndale (4/6)
10 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5572P
0.1
Auburndale (4/6)
10 69Thursday, January 21, 2010
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
PCI-Express Configuration Select
CFG0 1 : Single PEG
0 : Bifurcation enable
PCI-Express Static Lane Reversal
CFG3 1 : Normal Operation
0 : Lane Number Reversed
15->0, 14->1 ...
Display Port Presence
CFG4 1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
Populate R84,R86 for Intel DDR3
VREFDQ multiple methods M3
R1108
3.01K_0402_1%~D
@
R1108
3.01K_0402_1%~D
@
12
T24 PAD~D@T24 PAD~D@
T26PAD~D @T26PAD~D @
T31PAD~D @T31PAD~D @
R1107
3.01K_0402_1%~D
@
R1107
3.01K_0402_1%~D
@
12
T23 PAD~D@T23 PAD~D@
RESERVED
REV1.0
JCPUE
TYCO_CALPELLA_AUBURNDALE
RESERVED
REV1.0
JCPUE
TYCO_CALPELLA_AUBURNDALE
CFG[0]
AM30
CFG[1]
AM28
CFG[2]
AP31
CFG[3]
AL32
CFG[4]
AL30
CFG[5]
AM31
CFG[6]
AN29
CFG[7]
AM32
CFG[8]
AK32
CFG[9]
AK31
CFG[10]
AK28
CFG[11]
AJ28
CFG[12]
AN30
CFG[13]
AN32
CFG[14]
AJ32
CFG[15]
AJ29
CFG[16]
AJ30
CFG[17]
AK30
RSVD34 AH25
RSVD35 AK26
RSVD38 AJ26
RSVD_NCTF_42 AT3
RSVD39 AJ27
RSVD_NCTF_40 AP1
RSVD_NCTF_41 AT2
RSVD_NCTF_43 AR1
RSVD_TP_86
H16
RSVD45 AL28
RSVD46 AL29
RSVD47 AP30
RSVD48 AP32
RSVD49 AL27
RSVD50 AT31
RSVD51 AT32
RSVD52 AP33
RSVD53 AR33
RSVD_NCTF_54 AT33
RSVD_NCTF_55 AT34
RSVD_NCTF_56 AP35
RSVD_NCTF_57 AR35
RSVD58 AR32
RSVD_NCTF_30
C35
RSVD_NCTF_31
B35
RSVD_NCTF_28
A34
RSVD_NCTF_29
A33
RSVD27
J28 RSVD26
J29
RSVD16
A19 RSVD15
B19
RSVD17
A20
RSVD18
B20
RSVD20
T9 RSVD19
U9
RSVD22
AB9 RSVD21
AC9
RSVD_NCTF_23
C1
RSVD_NCTF_24
A3
RSVD_TP_66 AA5
RSVD_TP_67 AA4
RSVD_TP_68 R8
RSVD_TP_71 AA2
RSVD_TP_72 AA1
RSVD_TP_73 R9
RSVD_TP_69 AD3
RSVD_TP_74 AG7
RSVD_TP_70 AD2
RSVD_TP_75 AE3
RSVD_TP_76 V4
RSVD_TP_77 V5
RSVD_TP_78 N2
RSVD_TP_81 W3
RSVD_TP_82 W2
RSVD_TP_83 N3
RSVD_TP_79 AD5
RSVD_TP_84 AE5
RSVD_TP_80 AD7
RSVD_TP_85 AD9
RSVD36 AL26
RSVD_NCTF_37 AR2
RSVD1
AP25
RSVD2
AL25
RSVD3
AL24
RSVD4
AL22
RSVD5
AJ33
RSVD6
AG9
RSVD7
M27
RSVD8
L28
SA_DIMM_VREF
J17
SB_DIMM_VREF
H17
RSVD11
G25
RSVD12
G17
RSVD13
E31
RSVD14
E30
RSVD32 AJ13
RSVD33 AJ12
RSVD_TP_59 E15
RSVD_TP_60 F15
KEY A2
RSVD62 D15
RSVD63 C15
RSVD64 AJ15
RSVD65 AH15
VSS AP34
T32PAD~D @T32PAD~D @
R830
0_0402_5%~D
@
R830
0_0402_5%~D
@
12
T19 PAD~D@T19 PAD~D@
T18 PAD~D@T18 PAD~D@
T22 PAD~D@T22 PAD~D@
T21 PAD~D@T21 PAD~D@
R84
0_0402_5%~D
R84
0_0402_5%~D
1 2
R1109
3.3K_0402_1%~D
@R1109
3.3K_0402_1%~D
@
12
R831
0_0402_5%~D
@
R831
0_0402_5%~D
@
12
T40PAD~D @T40PAD~D @
T41PAD~D @T41PAD~D @
R86
0_0402_5%~D
R86
0_0402_5%~D
1 2
T20 PAD~D@T20 PAD~D@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VID1
VID0
VID4
VID3
VID2
VID6
VID5
H_DPRSLPVR_R
IMVP_IMON
VCCSENSE
VSSSENSE
VTT_SENSE
H_PSI#
+VCC_CORE
+VCC_CORE
+1.05V_1.1V_RUN_VTT
+1.05V_1.1V_RUN_VTT
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
VID0 50
VID1 50
VID2 50
VID3 50
VID4 50
VID5 50
VID6 50 H_DPRSLPVR 50
IMVP_IMON 23,50
VSSSENSE 50
VCCSENSE 50
H_PSI# 50
VTT_SENSE 49
CPU_VTT_SELECT 49
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (5/6)
11 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (5/6)
11 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (5/6)
11 69Thursday, January 21, 2010
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Place R1116 and R1117 near CPU
Route VCCSENSE and VSSSENSE trace at
27.4 ohms, 7 mils spacing
VTT_SELECT = low, 1.1V
VTT_SELECT = high, 1.05V
52A 18A
Margaux DIS-->330uFx4 (C60-C63)
Asics/Asics II-->330uFx5 (C60-C63,C66)
C34
22U_0805_6.3VAM~D
C34
22U_0805_6.3VAM~D
1
2
C57
10U_0805_4VAM~D
C57
10U_0805_4VAM~D
1
2
+
C61
330U_D_2VM_R4.5M~D
+
C61
330U_D_2VM_R4.5M~D
1
2 3
C1198
10U_0805_4VAM~D
C1198
10U_0805_4VAM~D
1
2
+
C63
330U_D_2VM_R4.5M~D
+
C63
330U_D_2VM_R4.5M~D
1
2 3
C24
22U_0805_6.3VAM~D
C24
22U_0805_6.3VAM~D
1
2
C1082
22U_0805_6.3V6M~D
C1082
22U_0805_6.3V6M~D
1
2
C54
10U_0805_4VAM~D
C54
10U_0805_4VAM~D
1
2
C52
10U_0805_4VAM~D
@C52
10U_0805_4VAM~D
@
1
2
C26
22U_0805_6.3VAM~D
C26
22U_0805_6.3VAM~D
1
2
C1204
10U_0805_4VAM~D
C1204
10U_0805_4VAM~D
1
2
C36
22U_0805_6.3VAM~D
C36
22U_0805_6.3VAM~D
1
2
R1116
100_0402_1%~D
R1116
100_0402_1%~D
12
C48
10U_0805_4VAM~D
@C48
10U_0805_4VAM~D
@
1
2
C31
22U_0805_6.3VAM~D
C31
22U_0805_6.3VAM~D
1
2
C30
22U_0805_6.3VAM~D
C30
22U_0805_6.3VAM~D
1
2
C44
10U_0805_4VAM~D
C44
10U_0805_4VAM~D
1
2
+
C66
330U_D_2VM_R4.5M~D
1@
+
C66
330U_D_2VM_R4.5M~D
1@
1
2 3
C25
22U_0805_6.3VAM~D
C25
22U_0805_6.3VAM~D
1
2
C59
10U_0805_4VAM~D
C59
10U_0805_4VAM~D
1
2
C28
22U_0805_6.3VAM~D
C28
22U_0805_6.3VAM~D
1
2
C27
22U_0805_6.3VAM~D
C27
22U_0805_6.3VAM~D
1
2
C55
10U_0805_4VAM~D
C55
10U_0805_4VAM~D
1
2
POWER
CPU CORE SUPPLY
1.1V RAIL POWER
SENSE LINES
CPU VIDS
REV1.0
JCPUF
TYCO_CALPELLA_AUBURNDALE
POWER
CPU CORE SUPPLY
1.1V RAIL POWER
SENSE LINES
CPU VIDS
REV1.0
JCPUF
TYCO_CALPELLA_AUBURNDALE
ISENSE AN35
VTT_SENSE B15
PSI# AN33
VID[0] AK35
VID[1] AK33
VID[2] AK34
VID[3] AL35
VID[4] AL33
VID[5] AM33
VID[6] AM35
PROC_DPRSLPVR AM34
VTT_SELECT G15
VCC_SENSE AJ34
VSS_SENSE_VTT A15
VCC1
AG35
VCC2
AG34
VCC3
AG33
VCC4
AG32
VCC5
AG31
VCC6
AG30
VCC7
AG29
VCC8
AG28
VCC9
AG27
VCC10
AG26
VCC11
AF35
VCC12
AF34
VCC13
AF33
VCC14
AF32
VCC15
AF31
VCC16
AF30
VCC17
AF29
VCC18
AF28
VCC19
AF27
VCC20
AF26
VCC21
AD35
VCC22
AD34
VCC23
AD33
VCC24
AD32
VCC25
AD31
VCC26
AD30
VCC27
AD29
VCC28
AD28
VCC29
AD27
VCC30
AD26
VCC31
AC35
VCC32
AC34
VCC33
AC33
VCC34
AC32
VCC35
AC31
VCC36
AC30
VCC37
AC29
VCC38
AC28
VCC39
AC27
VCC40
AC26
VCC41
AA35
VCC42
AA34
VCC43
AA33
VCC44
AA32
VCC45
AA31
VCC46
AA30
VCC47
AA29
VCC48
AA28
VCC49
AA27
VCC50
AA26
VCC51
Y35
VCC52
Y34
VCC53
Y33
VCC54
Y32
VCC55
Y31
VCC56
Y30
VCC57
Y29
VCC58
Y28
VCC59
Y27
VCC60
Y26
VCC61
V35
VCC62
V34
VCC63
V33
VCC64
V32
VCC65
V31
VCC66
V30
VCC67
V29
VCC68
V28
VCC69
V27
VCC70
V26
VCC71
U35
VCC72
U34
VCC73
U33
VCC74
U32
VCC75
U31
VCC76
U30
VCC77
U29
VCC78
U28
VCC79
U27
VCC80
U26
VCC81
R35
VCC82
R34
VCC83
R33
VCC84
R32
VCC85
R31
VCC86
R30
VCC87
R29
VCC88
R28
VCC89
R27
VCC90
R26
VCC91
P35
VCC92
P34
VCC93
P33
VCC94
P32
VCC95
P31
VCC96
P30
VCC97
P29
VCC98
P28
VCC99
P27
VCC100
P26
VTT0_33 AF10
VTT0_34 AE10
VTT0_35 AC10
VTT0_36 AB10
VTT0_37 Y10
VTT0_38 W10
VTT0_39 U10
VTT0_40 T10
VTT0_41 J12
VTT0_42 J11
VTT0_1 AH14
VTT0_2 AH12
VTT0_3 AH11
VTT0_4 AH10
VTT0_5 J14
VTT0_6 J13
VTT0_7 H14
VTT0_8 H12
VTT0_9 G14
VTT0_10 G13
VTT0_11 G12
VTT0_12 G11
VTT0_13 F14
VTT0_14 F13
VTT0_15 F12
VTT0_16 F11
VTT0_17 E14
VTT0_18 E12
VTT0_19 D14
VTT0_20 D13
VTT0_21 D12
VTT0_22 D11
VTT0_23 C14
VTT0_24 C13
VTT0_25 C12
VTT0_26 C11
VTT0_27 B14
VTT0_28 B12
VTT0_29 A14
VTT0_30 A13
VTT0_31 A12
VTT0_32 A11
VSS_SENSE AJ35
VTT0_43 J16
VTT0_44 J15
C1085
22U_0805_6.3V6M~D
C1085
22U_0805_6.3V6M~D
1
2
+
C64
470U_D2_2V-M~D
@
+
C64
470U_D2_2V-M~D
@
1
2 3
C1103
22U_0805_6.3V6M~D
C1103
22U_0805_6.3V6M~D
1
2
C56
10U_0805_4VAM~D
C56
10U_0805_4VAM~D
1
2
+
C60
330U_D_2VM_R4.5M~D
+
C60
330U_D_2VM_R4.5M~D
1
2 3
C49
10U_0805_4VAM~D
C49
10U_0805_4VAM~D
1
2
+
C62
330U_D_2VM_R4.5M~D
+
C62
330U_D_2VM_R4.5M~D
1
2 3
C50
10U_0805_4VAM~D
@C50
10U_0805_4VAM~D
@
1
2
C51
10U_0805_4VAM~D
C51
10U_0805_4VAM~D
1
2
C1199
10U_0805_4VAM~D
C1199
10U_0805_4VAM~D
1
2
C29
22U_0805_6.3VAM~D
C29
22U_0805_6.3VAM~D
1
2
C46
10U_0805_4VAM~D
@C46
10U_0805_4VAM~D
@
1
2
C1200
10U_0805_4VAM~D
C1200
10U_0805_4VAM~D
1
2
C37
22U_0805_6.3VAM~D
C37
22U_0805_6.3VAM~D
1
2
C45
10U_0805_4VAM~D
C45
10U_0805_4VAM~D
1
2
C1196
10U_0805_4VAM~D
C1196
10U_0805_4VAM~D
1
2
C1083
22U_0805_6.3V6M~D
C1083
22U_0805_6.3V6M~D
1
2
C47
10U_0805_4VAM~D
C47
10U_0805_4VAM~D
1
2
C35
22U_0805_6.3VAM~D
C35
22U_0805_6.3VAM~D
1
2
C1197
10U_0805_4VAM~D
C1197
10U_0805_4VAM~D
1
2
C58
10U_0805_4VAM~D
C58
10U_0805_4VAM~D
1
2
R1115 0_0402_5%~DR1115 0_0402_5%~D
1 2
R1236
100_0402_1%~D
R1236
100_0402_1%~D
12
C1087
22U_0805_6.3V6M~D
C1087
22U_0805_6.3V6M~D
1
2
C53
10U_0805_4VAM~D
C53
10U_0805_4VAM~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUN_ON_CPU1.5VS3
RUN_ON_CPU1.5VS3#
+1.05V_1.1V_RUN_VTT
+1.8V_RUN
+1.05V_1.1V_RUN_VTT
+1.05V_1.1V_RUN_VTT
+1.05V_1.1V_RUN_VTT
+1.5V_MEM +1.5V_CPU_VDDQ
+15V_ALW+3.3V_ALW2
+1.5V_CPU_VDDQ
+1.5V_MEM
RUN_ON34,39,42,47,62
CPU1.5V_S3_GATE40
RUN_ON_CPU1.5VS3# 42
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (6/6)
12 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (6/6)
12 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Auburndale (6/6)
12 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
6A
600mA
+1.5V_CPU_VDDQ Source
C1111
22U_0805_6.3V6M~D
C1111
22U_0805_6.3V6M~D
1
2
R1471
20K_0402_5%~D
@
R1471
20K_0402_5%~D
@
12
C1876 0.1U_0402_10V7K~DC1876 0.1U_0402_10V7K~D
12
R1465
1K_0402_5%~D
R1465
1K_0402_5%~D
1 2
C1115
1U_0402_6.3V6K~D
C1115
1U_0402_6.3V6K~D
1
2
POWER
GRAPHICS VIDs
GRAPHICS
DDR3 - 1.5V RAILS
FDI PEG & DMI
SENSE
LINES
1.1V1.8V
REV1.0
JCPUG
TYCO_CALPELLA_AUBURNDALE
POWER
GRAPHICS VIDs
GRAPHICS
DDR3 - 1.5V RAILS
FDI PEG & DMI
SENSE
LINES
1.1V1.8V
REV1.0
JCPUG
TYCO_CALPELLA_AUBURNDALE
GFX_VID[0] AM22
GFX_VID[1] AP22
GFX_VID[2] AN22
GFX_VID[3] AP23
GFX_VID[4] AM23
GFX_VID[5] AP24
GFX_VID[6] AN24
GFX_VR_EN AR25
GFX_DPRSLPVR AT25
GFX_IMON AM24
VAXG_SENSE AR22
VSSAXG_SENSE AT22
VAXG1
AT21
VAXG2
AT19
VAXG3
AT18
VAXG4
AT16
VAXG5
AR21
VAXG6
AR19
VAXG7
AR18
VAXG8
AR16
VAXG9
AP21
VAXG10
AP19
VAXG11
AP18
VAXG12
AP16
VAXG13
AN21
VAXG14
AN19
VAXG15
AN18
VAXG16
AN16
VAXG17
AM21
VAXG18
AM19
VAXG19
AM18
VAXG20
AM16
VAXG21
AL21
VAXG22
AL19
VAXG23
AL18
VAXG24
AL16
VAXG25
AK21
VAXG26
AK19
VAXG27
AK18
VAXG28
AK16
VAXG29
AJ21
VAXG30
AJ19
VAXG31
AJ18
VAXG32
AJ16
VAXG33
AH21
VAXG34
AH19
VAXG35
AH18
VAXG36
AH16
VTT1_45
J24
VTT1_46
J23
VTT1_47
H25
VTT1_48
K26
VTT1_49
J27
VTT1_50
J26
VTT1_51
J25
VTT1_52
H27
VTT1_53
G28
VTT1_54
G27
VTT1_55
G26
VTT1_56
F26
VTT1_57
E26
VTT1_58
E25
VDDQ1 AJ1
VDDQ2 AF1
VDDQ3 AE7
VDDQ4 AE4
VDDQ5 AC1
VDDQ6 AB7
VDDQ7 AB4
VDDQ8 Y1
VDDQ9 W7
VDDQ10 W4
VDDQ11 U1
VDDQ12 T7
VDDQ13 T4
VDDQ14 P1
VDDQ15 N7
VDDQ16 N4
VDDQ17 L1
VDDQ18 H1
VTT0_59 P10
VTT0_60 N10
VTT0_61 L10
VTT0_62 K10
VCCPLL1 L26
VCCPLL2 L27
VCCPLL3 M26
VTT1_63 J22
VTT1_64 J20
VTT1_65 J18
VTT1_66 H21
VTT1_67 H20
VTT1_68 H19
R1480
100K_0402_5%~D
R1480
100K_0402_5%~D
12
C1116
1U_0402_6.3V6K~D
C1116
1U_0402_6.3V6K~D
1
2
T175 PAD~DT175 PAD~D
C1098
1U_0402_6.3V6K~D
C1098
1U_0402_6.3V6K~D
1
2
C1097
1U_0402_6.3V6K~D
C1097
1U_0402_6.3V6K~D
1
2
C1875 0.1U_0402_10V7K~DC1875 0.1U_0402_10V7K~D
12
R1474
0_0402_5%~D
R1474
0_0402_5%~D
1 2
Q201A
DMN66D0LDW-7_SOT363-6~D
Q201A
DMN66D0LDW-7_SOT363-6~D
61
2
Q200
AO4728L_SO8~D
Q200
AO4728L_SO8~D
4
7
8
6
5
1
2
3
R1472
100K_0402_5%~D
R1472
100K_0402_5%~D
12
Q201B
DMN66D0LDW-7_SOT363-6~D
Q201B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C65
4.7U_0603_6.3V6M~D
C65
4.7U_0603_6.3V6M~D
1
2
R1473
0_0402_5%~D
@R1473
0_0402_5%~D
@
1 2
T178 PAD~DT178 PAD~D
C1117
22U_0805_6.3V6M~D
C1117
22U_0805_6.3V6M~D
1
2
C1099
1U_0402_6.3V6K~D
C1099
1U_0402_6.3V6K~D
1
2
C1108
10U_0805_4VAM~D
C1108
10U_0805_4VAM~D
1
2
C1112
22U_0805_6.3V6M~D
C1112
22U_0805_6.3V6M~D
1
2
PJP58
PAD-OPEN 4x4m
@PJP58
PAD-OPEN 4x4m
@
1 2
C1102
22U_0805_6.3V6M~D
C1102
22U_0805_6.3V6M~D
1
2
C1096
1U_0402_6.3V6K~D
C1096
1U_0402_6.3V6K~D
1
2
C1878 0.1U_0402_10V7K~DC1878 0.1U_0402_10V7K~D
12
C1873
4700P_0402_25V7K~D
C1873
4700P_0402_25V7K~D
1
2
C1107
10U_0805_4VAM~D
C1107
10U_0805_4VAM~D
1
2
C1100
1U_0402_6.3V6K~D
C1100
1U_0402_6.3V6K~D
1
2
C1872
10U_0805_10V4Z~D
C1872
10U_0805_10V4Z~D
1
2
PJP57
PAD-OPEN 4x4m
@PJP57
PAD-OPEN 4x4m
@
1 2
C1874 0.1U_0402_10V7K~DC1874 0.1U_0402_10V7K~D
12
C67
2.2U_0603_6.3V6K~D
C67
2.2U_0603_6.3V6K~D
1
2
+
C1165
330U_D2_2VM_R6M~D
+
C1165
330U_D2_2VM_R6M~D
1
2
VSS
REV1.0
JCPUH
TYCO_CALPELLA_AUBURNDALE
VSS
REV1.0
JCPUH
TYCO_CALPELLA_AUBURNDALE
VSS1
AT20
VSS2
AT17
VSS3
AR31
VSS4
AR28
VSS5
AR26
VSS6
AR24
VSS7
AR23
VSS8
AR20
VSS9
AR17
VSS10
AR15
VSS11
AR12
VSS12
AR9
VSS13
AR6
VSS14
AR3
VSS15
AP20
VSS16
AP17
VSS17
AP13
VSS18
AP10
VSS19
AP7
VSS20
AP4
VSS21
AP2
VSS22
AN34
VSS23
AN31
VSS24
AN23
VSS25
AN20
VSS26
AN17
VSS27
AM29
VSS28
AM27
VSS29
AM25
VSS30
AM20
VSS31
AM17
VSS32
AM14
VSS33
AM11
VSS34
AM8
VSS35
AM5
VSS36
AM2
VSS37
AL34
VSS38
AL31
VSS39
AL23
VSS40
AL20
VSS41
AL17
VSS42
AL12
VSS43
AL9
VSS44
AL6
VSS45
AL3
VSS46
AK29
VSS47
AK27
VSS48
AK25
VSS49
AK20
VSS50
AK17
VSS51
AJ31
VSS52
AJ23
VSS53
AJ20
VSS54
AJ17
VSS55
AJ14
VSS56
AJ11
VSS57
AJ8
VSS58
AJ5
VSS59
AJ2
VSS60
AH35
VSS61
AH34
VSS62
AH33
VSS63
AH32
VSS64
AH31
VSS65
AH30
VSS66
AH29
VSS67
AH28
VSS68
AH27
VSS69
AH26
VSS70
AH20
VSS71
AH17
VSS72
AH13
VSS73
AH9
VSS74
AH6
VSS75
AH3
VSS76
AG10
VSS77
AF8
VSS78
AF4
VSS79
AF2
VSS80
AE35
VSS81 AE34
VSS82 AE33
VSS83 AE32
VSS84 AE31
VSS85 AE30
VSS86 AE29
VSS87 AE28
VSS88 AE27
VSS89 AE26
VSS90 AE6
VSS91 AD10
VSS92 AC8
VSS93 AC4
VSS94 AC2
VSS95 AB35
VSS96 AB34
VSS97 AB33
VSS98 AB32
VSS99 AB31
VSS100 AB30
VSS101 AB29
VSS102 AB28
VSS103 AB27
VSS104 AB26
VSS105 AB6
VSS106 AA10
VSS107 Y8
VSS108 Y4
VSS109 Y2
VSS110 W35
VSS111 W34
VSS112 W33
VSS113 W32
VSS114 W31
VSS115 W30
VSS116 W29
VSS117 W28
VSS118 W27
VSS119 W26
VSS120 W6
VSS121 V10
VSS122 U8
VSS123 U4
VSS124 U2
VSS125 T35
VSS126 T34
VSS127 T33
VSS128 T32
VSS129 T31
VSS130 T30
VSS131 T29
VSS132 T28
VSS133 T27
VSS134 T26
VSS135 T6
VSS136 R10
VSS137 P8
VSS138 P4
VSS139 P2
VSS140 N35
VSS141 N34
VSS142 N33
VSS143 N32
VSS144 N31
VSS145 N30
VSS146 N29
VSS147 N28
VSS148 N27
VSS149 N26
VSS150 N6
VSS151 M10
VSS152 L35
VSS153 L32
VSS154 L29
VSS155 L8
VSS156 L5
VSS157 L2
VSS158 K34
VSS159 K33
VSS160 K30
C1101
22U_0805_6.3V6M~D
C1101
22U_0805_6.3V6M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D10
DDR_A_D11
DDR_A_D18
DDR_A_D19
DDR_A_D21
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D32
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D45
DDR_A_D46
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_MA2
DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA4DDR_A_MA5
DDR_A_MA6DDR_A_MA8
DDR_A_MA7DDR_A_MA9
DDR_A_MA10
DDR_A_MA11DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
M_ODT0
M_ODT1
DDR_A_D63
DDR_A_MA15
DDR_A_D23
DDR_A_D31
DDR_A_D17
DDR_A_D9 DDR_A_D13
DDR_A_D20DDR_A_D16
DDR_A_D25
DDR_A_D30
DDR_A_D24
DDR_A_D14
DDR_A_D15
DDR_A_D12
DDR_A_D22
DDR_A_D39
DDR_A_D54
DDR_A_D33
DDR_A_D38
DDR_A_D47
DDR_A_D44
DDR_A_D48
DDR3_DRAMRST#
+V_DDR_REF_QA
DDR_XDP_SMBDAT
DDR_XDP_SMBCLK
+0.75V_DDR_VTT
+1.5V_MEM
+1.5V_MEM+1.5V_MEM
+3.3V_RUN
+0.75V_DDR_VTT
+0.75V_DDR_VTT
+V_DDR_REF
+1.5V_MEM
+V_DDR_REF_QA
+1.5V_MEM
+1.5V_MEM
DDR_A_D[0..63]9
DDR_A_DQS[0..7]9
DDR_A_MA[0..15]9
DDR_A_DM[0..7]9
DDR_A_DQS#[0..7]9
DDR_CKE0_DIMMA9
DDR_A_BS29
DDR_CS1_DIMMA#9
DDR_A_WE#9
DDR_A_CAS#9
DDR_A_BS09
DDR_A_BS1 9
M_ODT0 9
DDR_A_RAS# 9
M_CLK_DDR1 9
M_CLK_DDR#1 9M_CLK_DDR#09
M_CLK_DDR09
DDR_CKE1_DIMMA 9
DDR_CS0_DIMMA# 9
M_ODT1 9
DDR3_DRAMRST# 8,14
DDR_HVREF_RST_GATE 8,14,40
DIMM0_VREF 10
DDR_XDP_SMBDAT 14,15,16,28
DDR_XDP_SMBCLK 14,15,16,28
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DDRIII-SODIMM SLOT1
13 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DDRIII-SODIMM SLOT1
13 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DDRIII-SODIMM SLOT1
13 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:
Place near JDIMMA
Layout Note:
Place near JDIMMA.203,204
Populate R87 for Intel DDR3
VREFDQ multiple methods M1
JDIMMA H=5.2
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
JDIMMA
FOX_AS0A626-U4SN-7F
JDIMMA
FOX_AS0A626-U4SN-7F
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201 SCL 202
VTT
203 VTT 204
GND1
205 GND2 206
C1135
1U_0402_6.3V6K~D
C1135
1U_0402_6.3V6K~D
1
2
C1132
2.2U_0603_6.3V6K~D
C1132
2.2U_0603_6.3V6K~D
1
2
R670
1K_0402_1%~D
R670
1K_0402_1%~D
12
C1123
0.1U_0402_16V4Z~D
C1123
0.1U_0402_16V4Z~D
1
2
C1136
1U_0402_6.3V6K~D
C1136
1U_0402_6.3V6K~D
1
2
R1183 10K_0402_5%~DR1183 10K_0402_5%~D
1 2
R1476
1K_0402_5%~D
R1476
1K_0402_5%~D
12
C1137
1U_0402_6.3V6K~D
C1137
1U_0402_6.3V6K~D
1
2
C1142
2.2U_0603_6.3V6K~D
C1142
2.2U_0603_6.3V6K~D
1
2
C1124
0.1U_0402_16V4Z~D
C1124
0.1U_0402_16V4Z~D
1
2
R87 0_0402_5%~DR87 0_0402_5%~D
1 2
C1129
10U_0603_6.3V6M~D
C1129
10U_0603_6.3V6M~D
1
2
C1130
10U_0603_6.3V6M~D
C1130
10U_0603_6.3V6M~D
1
2
C1133
0.1U_0402_16V4Z~D
C1133
0.1U_0402_16V4Z~D
1
2
+
C1125
330U_SX_2VY~D
+
C1125
330U_SX_2VY~D
1
2
C1119
2.2U_0603_6.3V6K~D
C1119
2.2U_0603_6.3V6K~D
1
2
C1131
10U_0603_6.3V6M~D
C1131
10U_0603_6.3V6M~D
1
2
C1127
10U_0603_6.3V6M~D
C1127
10U_0603_6.3V6M~D
1
2
C1126
10U_0603_6.3V6M~D
C1126
10U_0603_6.3V6M~D
1
2
C1121
0.1U_0402_16V4Z~D
C1121
0.1U_0402_16V4Z~D
1
2
R1182 10K_0402_5%~DR1182 10K_0402_5%~D
1 2
G
D
S
Q202
AO3420L_SOT23-3~D
G
D
S
Q202
AO3420L_SOT23-3~D
2
1 3
C1138
10U_0603_6.3V6M~D
C1138
10U_0603_6.3V6M~D
1
2
R1485
100K_0402_5%~D
R1485
100K_0402_5%~D
1 2
C1122
0.1U_0402_16V4Z~D
C1122
0.1U_0402_16V4Z~D
1
2
C1128
10U_0603_6.3V6M~D
C1128
10U_0603_6.3V6M~D
1
2
C1120
0.1U_0402_16V4Z~D
C1120
0.1U_0402_16V4Z~D
1
2
C1134
1U_0402_6.3V6K~D
C1134
1U_0402_6.3V6K~D
1
2
R1477 0_0402_5%~D@R1477 0_0402_5%~D@
1 2
C1141
0.1U_0402_16V4Z~D
C1141
0.1U_0402_16V4Z~D
1
2
R660
1K_0402_1%~D
R660
1K_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_MA7
DDR_B_D22
DDR_B_D19
DDR_B_D20
DDR_B_D62
DDR_B_D59
DDR_CS3_DIMMB#
DDR_B_BS0
DDR_B_D27
DDR_B_D8
DDR_B_D52
M_ODT2
DDR_B_MA14
DDR_B_D57
DDR_B_DQS6
DDR_B_D43
DDR_B_DQS4
DDR_B_BS2
DDR_B_DQS#2
DDR3_DRAMRST#
DDR_B_DM1
DDR_B_D37
DDR_B_D36
DDR_B_MA6
DDR_B_D23
DDR_B_D21
DDR_B_D41
DDR_B_MA3
DDR_B_D24
DDR_B_D63
DDR_B_D44
DDR_B_DQS#3
DDR_B_D40
DDR_CKE2_DIMMB
DDR_B_D5
DDR_B_DQS1
DDR_B_D9
DDR_B_D54
DDR_B_D53
DDR_B_D46
DDR_CKE3_DIMMB
DDR_B_DM7
DDR_B_D50
DDR_B_D48
DDR_B_D14
DDR_B_D61
DDR_B_MA4
DDR_B_DM2
DDR_B_MA1
DDR_B_D45
DDR_B_D38
DDR_B_BS1
DDR_B_DQS3
DDR_B_WE#
DDR_B_D7
DDR_B_D6
DDR_B_D10
DDR_B_DQS#1
DDR_B_D55
DDR_B_D47
M_ODT3
DDR_B_D49
DDR_B_MA12
DDR_B_D15
DDR_B_D2
DDR_B_D0
M_CLK_DDR3
DDR_B_D28
DDR_B_DQS2
DDR_B_D4
DDR_B_RAS#
DDR_B_DM5
DDR_B_D34
DDR_B_D32
DDR_B_CAS#
DDR_B_D11
DDR_B_DM6DDR_B_DQS#6
DDR_B_MA8
DDR_B_D25
DDR_B_D1
DDR_B_DQS7
DDR_B_DQS#7
M_CLK_DDR#3
DDR_B_MA2
DDR_B_MA15
DDR_B_D29
DDR_B_DM3
DDR_B_DQS#5
DDR_B_DM4
DDR_B_MA11
DDR_B_D30
DDR_B_D51
DDR_B_D35
DDR_B_D33
M_CLK_DDR2
DDR_B_D12
DDR_B_DQS#0
DDR_B_D16
DDR_B_D60
DDR_B_MA5
DDR_B_D18
DDR_B_DM0
DDR_B_D39
DDR_B_MA0
DDR_B_D58
DDR_B_MA10
DDR_B_D26
DDR_B_D3
DDR_B_DQS5
DDR_CS2_DIMMB#
DDR_B_D31
DDR_B_D56
DDR_B_D42
DDR_B_DQS#4
DDR_B_MA13
M_CLK_DDR#2
DDR_B_MA9
DDR_B_D17
DDR_B_D13
DDR_B_DQS0
+V_DDR_REF_QB
DDR_XDP_SMBDAT
DDR_XDP_SMBCLK
+1.5V_MEM
+0.75V_DDR_VTT
+3.3V_RUN
+3.3V_RUN
+1.5V_MEM
+0.75V_DDR_VTT
+1.5V_MEM
+V_DDR_REF
+1.5V_MEM
+0.75V_DDR_VTT
+V_DDR_REF_QB
+1.5V_MEM
DDR_B_D[0..63]9
DDR_B_DQS[0..7]9
DDR_B_MA[0..15]9
DDR_B_DM[0..7]9
DDR_B_DQS#[0..7]9
DDR_B_CAS#9
DDR_CKE3_DIMMB 9
DDR_B_WE#9
DDR_CKE2_DIMMB9
DDR_B_BS09DDR_B_RAS# 9
DDR_B_BS1 9
DDR_B_BS29
M_ODT2 9
DDR_CS3_DIMMB#9
DDR_CS2_DIMMB# 9
M_CLK_DDR3 9
M_CLK_DDR#3 9
M_ODT3 9
M_CLK_DDR29
M_CLK_DDR#29
DDR3_DRAMRST# 8,13
DDR_HVREF_RST_GATE 8,13,40
DIMM1_VREF 10
DDR_XDP_SMBDAT 13,15,16,28
DDR_XDP_SMBCLK 13,15,16,28
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DDRIII-SODIMM SLOT2
14 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DDRIII-SODIMM SLOT2
14 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DDRIII-SODIMM SLOT2
14 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:
Place near JDIMMB
Layout Note:
Place near JDIMMB.203,204
Populate R88 for Intel DDR3
VREFDQ multiple methods M1
JDIMMB H=9.2
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
C1152
10U_0603_6.3V6M~D
C1152
10U_0603_6.3V6M~D
1
2
C1150
10U_0603_6.3V6M~D
C1150
10U_0603_6.3V6M~D
1
2
C1154
10U_0603_6.3V6M~D
C1154
10U_0603_6.3V6M~D
1
2
C1159
1U_0402_6.3V6K~D
C1159
1U_0402_6.3V6K~D
1
2
C1163
2.2U_0603_6.3V6K~D
C1163
2.2U_0603_6.3V6K~D
1
2
C1161
1U_0402_6.3V6K~D
C1161
1U_0402_6.3V6K~D
1
2
C1156
2.2U_0603_6.3V6K~D
C1156
2.2U_0603_6.3V6K~D
1
2
R671
1K_0402_1%~D
R671
1K_0402_1%~D
12
C1155
10U_0603_6.3V6M~D
C1155
10U_0603_6.3V6M~D
1
2
R1184
10K_0402_5%~D
R1184
10K_0402_5%~D
12
G
D
S
Q203
AO3420L_SOT23-3~D
G
D
S
Q203
AO3420L_SOT23-3~D
2
1 3
C1145
0.1U_0402_16V4Z~D
C1145
0.1U_0402_16V4Z~D
1
2
C1162
0.1U_0402_16V4Z~D
C1162
0.1U_0402_16V4Z~D
1
2
JDIMMB
FOX_AS0A626-U8SN-7F
JDIMMB
FOX_AS0A626-U8SN-7F
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201 SCL 202
VTT
203 VTT 204
GND1
205 GND2 206
C1147
0.1U_0402_16V4Z~D
C1147
0.1U_0402_16V4Z~D
1
2
R668
1K_0402_1%~D
R668
1K_0402_1%~D
12
C1144
0.1U_0402_16V4Z~D
C1144
0.1U_0402_16V4Z~D
1
2
C1158
1U_0402_6.3V6K~D
C1158
1U_0402_6.3V6K~D
1
2
C1146
0.1U_0402_16V4Z~D
C1146
0.1U_0402_16V4Z~D
1
2
C1153
10U_0603_6.3V6M~D
C1153
10U_0603_6.3V6M~D
1
2
C1151
10U_0603_6.3V6M~D
C1151
10U_0603_6.3V6M~D
1
2
C1160
1U_0402_6.3V6K~D
C1160
1U_0402_6.3V6K~D
1
2
C1157
0.1U_0402_16V4Z~D
C1157
0.1U_0402_16V4Z~D
1
2
C1143
2.2U_0603_6.3V6K~D
C1143
2.2U_0603_6.3V6K~D
1
2
R1486
100K_0402_5%~D
R1486
100K_0402_5%~D
1 2
C1148
0.1U_0402_16V4Z~D
C1148
0.1U_0402_16V4Z~D
1
2
R1185
10K_0402_5%~D
R1185
10K_0402_5%~D
12
R88 0_0402_5%~DR88 0_0402_5%~D
1 2
+
C1149
330U_SX_2VY~D
+
C1149
330U_SX_2VY~D
1
2
R1478 0_0402_5%~D@R1478 0_0402_5%~D@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_AZ_SDOUT
LPC_LDRQ1#
PCH_RTCX1
SPI_WP#_SEL
LPC_LDRQ0#
PCH_SPI_DIN
PCH_JTAG_TCK
PCH_SPI_CLK
PCH_AZ_RST#
SATA_COMP
PCH_SPI_CS1#
ME_FWP
PCH_AZ_BITCLK
SRTCRST#
PCH_AZ_SYNC
SATA_ACT#_R
PCH_RTCRST#
LPC_LAD0
PCH_INTVRMEN
PCH_JTAG_TDI
LPC_LAD3
INTRUDER#
PCH_AZ_SYNC
IRQ_SERIRQ
PCH_JTAG_TMS
PCH_SPI_CS1#
PCH_JTAG_TDO
PCH_SPI_DIN_R
PCH_INTVRMEN
PCH_SPI_CS0#
PCH_RTCX2
SPI_WP#_SEL
LPC_LAD2
LPC_LAD1
PCH_AZ_MDC_SDIN1
PCH_JTAG_RST#
LPC_LFRAME#
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_SPI_DIN
PCH_SPI_DIN
PCH_SPI_CS0#
PCH_SPI_DO
PCH_AZ_SDOUT
PCH_SPI_DO
PCH_AZ_BITCLK
PCH_SPI_CLK
HDD_DET#_R
GPIO19
IRQ_SERIRQ
SPKR
PLTRST1#_XDP
PCH_AZ_SYNC
XDP_FN15
PCH_PWRBTN#_XDP
XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMSPCH_JTAG_TCK
RESET_OUT#
PLTRST1#_XDP
PCH_JTAG_RST#PCH_JTAG_RST#_R
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN16
XDP_FN17
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
USB_OC4#
USB_OC2#
USB_OC5#
USB_OC3#
USB_OC7#
USB_OC6#
USB_OC0#_R
USB_OC1#_R
XDP_FN8
XDP_FN9
XDP_FN11
XDP_FN10
XDP_FN12
XDP_FN13
XDP_FN14
PCMCLK_REQ#
XDP_FN15
XDP_FN16
XDP_FN17
LANCLK_REQ#
HDD_DET#_R
GPIO19
CONTACTLESS_DET#
GPIO37
EN_ESATA_RPTR#
TEMP_ALERT#
SIO_EXT_SCI#_R
ROUSH_PAID_TS_DET#
XDP_FN2
XDP_FN1
XDP_FN4
XDP_FN6
XDP_FN5
XDP_FN3
XDP_FN0
XDP_FN7
USB_MCARD3_DET#
PCH_SPI_CLK
PCH_SPI_DO
DDR_XDP_SMBCLK_R
DDR_XDP_SMBDAT_R
+3.3V_ALW_PCH
+3.3V_M
+RTC_CELL
+3.3V_RUN
+3.3V_M
+1.05V_RUN
+3.3V_RUN
+RTC_CELL
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
PCH_AZ_MDC_SDIN137
PCH_AZ_MDC_RST#37
LPC_LFRAME# 31,32,39,40
PCH_AZ_CODEC_SDIN029
ME_FWP39
LPC_LDRQ1# 39
LPC_LAD3 31,32,39,40
PCH_AZ_CODEC_SYNC29
PCH_AZ_CODEC_SDOUT29
IRQ_SERIRQ 31,32,39,40
PCH_AZ_MDC_BITCLK37
LPC_LAD0 31,32,39,40
PCH_AZ_CODEC_RST#29
SPI_WP#_SEL 39
LPC_LAD1 31,32,39,40
SATA_ACT#_R 43
SPKR29
HDD_DET# 28
LPC_LAD2 31,32,39,40
LPC_LDRQ0# 39
PCH_AZ_MDC_SYNC37
PCH_AZ_MDC_SDOUT37
PCH_AZ_CODEC_BITCLK29
PLTRST_XDP# 18
PSATA_PRX_DTX_N0_C 28
PSATA_PRX_DTX_P0_C 28
PSATA_PTX_DRX_N0_C 28
PSATA_PTX_DRX_P0_C 28
SATA_ODD_PRX_DTX_N1_C 28
SATA_ODD_PRX_DTX_P1_C 28
SATA_ODD_PTX_DRX_N1_C 28
SATA_ODD_PTX_DRX_P1_C 28
SATA_PRX_DKTX_N5_C 38
SATA_PRX_DKTX_P5_C 38
SATA_PTX_DKRX_N5_C 38
SATA_PTX_DKRX_P5_C 38
ESATA_PRX_DTX_N4_C 37
ESATA_PRX_DTX_P4_C 37
ESATA_PTX_DRX_P4_C 37
ESATA_PTX_DRX_N4_C 37
XDP_DBRESET# 8,17
RESET_OUT#17,40
SIO_PWRBTN#_R8,17
CONTACTLESS_DET#19,31
PCMCLK_REQ#16,34
LANCLK_REQ#16,30
ROUSH_PAID_TS_DET#19
TEMP_ALERT#19,39
EN_ESATA_RPTR#19,37
GPIO3719
USB_OC3#18
USB_OC2#18
SIO_EXT_SCI#_R19
USB_OC6#18
USB_OC5#18
USB_OC4#18
USB_OC7#18
USB_OC1#_R18
USB_OC0#_R18
USB_MCARD3_DET#36
SATA_PRX_WWANTX_N3_C 35
SATA_PRX_WWANTX_P3_C 35
SATA_PTX_WWANRX_N3_C 35
SATA_PTX_WWANRX_P3_C 35
DDR_XDP_SMBDAT13,14,16,28
DDR_XDP_SMBCLK13,14,16,28
DDR_XDP_SMBDAT_R8
DDR_XDP_SMBCLK_R8
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (1/8)
15 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (1/8)
15 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (1/8)
15 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
32Mb Flash ROM
10K ohm
20K ohm
200 MIL SO8
ES1
No Stuff
R806
No Stuff
ES2
No Stuff
R1282
TDI
R807
R804
TDO
TMS
200 ohm
Ref.
No Stuff
200 MIL SO8
For iAMT
64Mb Flash ROM
No Stuff
100 ohm
100 ohm 100 ohm
200 ohm
R1315
No Stuff
100 ohm
ES2
No Stuff
R1281
ES1
No StuffR805
PCH Pin
No StuffNo Stuff
PCH JTAG Disable
200 ohm
INTVRMEN- Integrated SUS
1.1V VRM Enable
PCH JTAG Enable
TCK
200 ohm
100 ohm
No Stuff
51 ohm
No Stuff
200 ohm
TRST# R808
R1316
20K ohm
10K ohm
20K ohm
10K ohm No Stuff
No Stuff
No Stuff
No Stuff
SPKR
High = No Reboot
Low = Default
No Reboot Strap
ODD
HDD
E-SATA
DOCKED
Production
All
No Stuff
No Stuff
No Stuff
Stuff R128,no stuff R123
when production
CMOS settingCMOS_CLR1
Open
Clear CMOS
Shunt
ME_CLR1
Keep CMOS
TPM setting
Shunt
Keep ME RTC Registers
Clear ME RTC Registers
Open
High - Enable Internal VRs
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
CMOS place near DIMM
Mini card2
51 ohm 51 ohm 51 ohm
Disconnect XDP trace,
add R1532/1533
No Stuff
No Stuff
No Stuff
No Stuff
R239 33_0402_5%~DR239 33_0402_5%~D
1 2
R807200_0402_5%~D R807200_0402_5%~D 12
R225 20K_0402_5%~DR225 20K_0402_5%~D
1 2
U12
W25Q64BVSSIG_SO8~D
U12
W25Q64BVSSIG_SO8~D
CLK 6
GND
4DIO 5
DO
2
/WP
3
VCC 8
/HOLD 7
/CS
1
R224 20K_0402_1%~DR224 20K_0402_1%~D
1 2
R806200_0402_5%~D R806200_0402_5%~D 12
R114 33_0402_5%~D@R114 33_0402_5%~D@1 2
R1201
37.4_0402_1%~D
R1201
37.4_0402_1%~D
1 2
NCNC
Y1
32.768K_12.5PF_Q13MC30610018~D
NCNC
Y1
32.768K_12.5PF_Q13MC30610018~D
1 4
2 3
T174PAD~D T174PAD~D
R265
10K_0402_5%~D
R265
10K_0402_5%~D
12
R62
10K_0402_5%~D
@R62
10K_0402_5%~D
@
12
R382
43K_0402_5%~D
R382
43K_0402_5%~D
12
R115 33_0402_5%~D@R115 33_0402_5%~D@1 2
R103 33_0402_5%~D@R103 33_0402_5%~D@1 2
R1533
0_0402_5%~D
@R1533
0_0402_5%~D
@1 2
R235 33_0402_5%~DR235 33_0402_5%~D
1 2
R299
3.3K_0402_5%~D
R299
3.3K_0402_5%~D
12
R116 33_0402_5%~D@R116 33_0402_5%~D@1 2
C296
12P_0402_50V8J~D
C296
12P_0402_50V8J~D
12
R78 33_0402_5%~D@R78 33_0402_5%~D@1 2
R107 33_0402_5%~D@R107 33_0402_5%~D@1 2
R108 33_0402_5%~D@R108 33_0402_5%~D@1 2
R1281
100_0402_5%~D
R1281
100_0402_5%~D
12
JXDP2
SAMTE_BSH-030-01-L-D-A
@JXDP2
SAMTE_BSH-030-01-L-D-A
@
GND0
1
OBSFN_A0
3
OBSFN_A1
5
GND2
7
OBSDATA_A0
9
OBSDATA_A1
11
GND4
13
OBSDATA_A2
15
OBSDATA_A3
17
GND6
19
OBSFN_B0
21
OBSFN_B1
23
GND8
25
OBSDATA_B0
27
OBSDATA_B1
29
GND10
31
OBSDATA_B2
33
OBSDATA_B3
35
GND12
37
PWRGOOD/HOOK0
39
HOOK1
41
VCC_OBS_AB
43
HOOK2
45
HOOK3
47
GND14
49
SDA
51
SCL
53
TCK1
55
TCK0
57
GND16
59
GND1 2
OBSFN_C0 4
OBSFN_C1 6
GND3 8
OBSDATA_C0 10
OBSDATA_C1 12
GND5 14
OBSDATA_C2 16
OBSDATA_C3 18
GND7 20
OBSFN_D0 22
OBSFN_D1 24
GND9 26
OBSDATA_D0 28
OBSDATA_D1 30
GND11 32
OBSDATA_D2 34
OBSDATA_D3 36
GND13 38
ITPCLK/HOOK4 40
ITPCLK#/HOOK5 42
VCC_OBS_CD 44
RESET#/HOOK6 46
DBR#/HOOK7 48
GND15 50
TD0 52
TRST# 54
TDI 56
TMS 58
GND17 60
R805200_0402_5%~D R805200_0402_5%~D 12
R131
0_0402_5%~D
R131
0_0402_5%~D
1 2
R241 33_0402_5%~DR241 33_0402_5%~D
1 2
C302
27P_0402_50V8J~D
C302
27P_0402_50V8J~D
1
2
R236
33_0402_5%~D
R236
33_0402_5%~D
1 2
C328
0.1U_0402_16V4Z~D
C328
0.1U_0402_16V4Z~D
1 2
R240 33_0402_5%~DR240 33_0402_5%~D
1 2
R91 33_0402_5%~D@R91 33_0402_5%~D@1 2
RTCIHDA
SATA LPC
SPI JTAG
V1.5
U73A
BD82QM57-SLGZQ-B3_FCBGA1071~D
RTCIHDA
SATA LPC
SPI JTAG
V1.5
U73A
BD82QM57-SLGZQ-B3_FCBGA1071~D
RTCX1
B13
RTCX2
D13
INTVRMEN
A14
INTRUDER#
A16
HDA_BCLK
A30
HDA_SYNC
D29
HDA_RST#
C30
HDA_SDIN0
G30
HDA_SDIN1
F30
HDA_SDIN2
E32
HDA_SDO
B29
SATALED# T3
FWH0 / LAD0 D33
FWH1 / LAD1 B33
FWH2 / LAD2 C32
FWH3 / LAD3 A32
LDRQ1# / GPIO23 F34
FWH4 / LFRAME# C34
LDRQ0# A34
RTCRST#
C14
HDA_SDIN3
F32
HDA_DOCK_EN# / GPIO33
H32
HDA_DOCK_RST# / GPIO13
J30
SRTCRST#
D17
SATA0RXN AK7
SATA0RXP AK6
SATA0TXN AK11
SATA0TXP AK9
SATA1RXN AH6
SATA1RXP AH5
SATA1TXN AH9
SATA1TXP AH8
SATA2RXN AF11
SATA2RXP AF9
SATA2TXN AF7
SATA2TXP AF6
SATA3RXN AH3
SATA3RXP AH1
SATA3TXN AF3
SATA3TXP AF1
SATA4RXN AD9
SATA4RXP AD8
SATA4TXN AD6
SATA4TXP AD5
SATA5RXN AD3
SATA5RXP AD1
SATA5TXN AB3
SATA5TXP AB1
SATAICOMPI AF15
SPI_CLK
BA2
SPI_CS0#
AV3
SPI_CS1#
AY3
SPI_MOSI
AY1
SPI_MISO
AV1
SATA0GP / GPIO21 Y9
SATA1GP / GPIO19 V1
JTAG_TCK
M3
JTAG_TMS
K3
JTAG_TDI
K1
JTAG_TDO
J2
TRST#
J4
SERIRQ AB9
SPKR
P1
SATAICOMPO AF16
R58
10K_0402_5%~D
R58
10K_0402_5%~D
12
R113 33_0402_5%~D@R113 33_0402_5%~D@1 2
R1247 33_0402_5%~DR1247 33_0402_5%~D
1 2
C299 1U_0402_6.3V6K~DC299 1U_0402_6.3V6K~D
1 2
R1060 0_0402_5%~D@R1060 0_0402_5%~D@1 2
R1246 0_0402_5%~D@R1246 0_0402_5%~D@
1 2
R112 33_0402_5%~D@R112 33_0402_5%~D@1 2
C297
12P_0402_50V8J~D
C297
12P_0402_50V8J~D
12
R106 33_0402_5%~D@R106 33_0402_5%~D@1 2
R1237
3.3K_0402_5%~D
R1237
3.3K_0402_5%~D
12
R101 33_0402_5%~D@R101 33_0402_5%~D@1 2
R1238
3.3K_0402_5%~D
R1238
3.3K_0402_5%~D
12
R118
1K_0402_5%~D
@R118
1K_0402_5%~D
@
1 2
R234 33_0402_5%~DR234 33_0402_5%~D
1 2
C298 1U_0402_6.3V6K~DC298 1U_0402_6.3V6K~D
1 2
CMOS1 SHORT PADS~D
@
CMOS1 SHORT PADS~D
@
1
122
R105 33_0402_5%~D@R105 33_0402_5%~D@1 2
R226 1M_0402_5%~DR226 1M_0402_5%~D
1 2
R242 33_0402_5%~DR242 33_0402_5%~D
1 2
R1282
100_0402_5%~D
R1282
100_0402_5%~D
12
R123
0_0603_5%~D
R123
0_0603_5%~D
12
C300
27P_0402_50V8J~D
C300
27P_0402_50V8J~D
12
C1205
0.1U_0402_16V4Z~D
C1205
0.1U_0402_16V4Z~D
1 2
R80451_0402_1%~D R80451_0402_1%~D 12
R1315
100_0402_5%~D
R1315
100_0402_5%~D
12
ME1 SHORT PADS~D
@
ME1 SHORT PADS~D
@
1
122
R104 33_0402_5%~D@R104 33_0402_5%~D@1 2
R102 33_0402_5%~D@R102 33_0402_5%~D@1 2
R117
0_0402_5%~D
@R117
0_0402_5%~D
@
1 2
R217
330K_0402_1%~D
R217
330K_0402_1%~D
12
R111 33_0402_5%~D@R111 33_0402_5%~D@1 2
R109 33_0402_5%~D@R109 33_0402_5%~D@1 2
R298
3.3K_0402_5%~D
R298
3.3K_0402_5%~D
12
R238 33_0402_5%~DR238 33_0402_5%~D
1 2
R69 0_0402_5%~D@R69 0_0402_5%~D@1 2
R264
1K_0402_5%~D
@R264
1K_0402_5%~D
@
12
U13
W25Q32BVSSIG_SO8~D
U13
W25Q32BVSSIG_SO8~D
CLK 6
GND
4DIO 5
DO
2
/WP
3
VCC 8
/HOLD 7
/CS
1
R223
0_0402_5%~D
R223
0_0402_5%~D
1 2
R1532
0_0402_5%~D
@R1532
0_0402_5%~D
@1 2
R110 33_0402_5%~D@R110 33_0402_5%~D@1 2
R120
100K_0402_5%~D
@
R120
100K_0402_5%~D
@
12
C1375
0.1U_0402_16V4Z~D
@C1375
0.1U_0402_16V4Z~D
@
1
2
R222
10M_0402_5%~D
R222
10M_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_PTX_EXPRX_N4
PCIE_PTX_EXPRX_P4
PCIE_PRX_EXPTX_N4
PCIE_PRX_EXPTX_P4
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WANRX_P1
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1
PCIE_EXP#
PCIE_EXP
EXPCLK_REQ#
SML1_SMBCLK
SML1_SMBDATA
PCH_SMB_ALERT#
MEM_SMBDATA
LAN_SMBCLK
LAN_SMBDATA
CLK_PCH_14M
CLK_BUF_EXP#
CLK_BUF_BCLK
CLK_CPU_EXP#
XTAL25_IN
PCH_CL_RST1#
SML1_SMBCLK
CLK_BUF_CKSSCD#
PCH_CL_CLK1
SML1_SMBDATA
CLK_CPU_EXP
CLK_BUF_EXP
CLK_BUF_CKSSCD
XTAL25_OUT
PCH_CL_DATA1
CLK_BUF_DOT96
CLK_BUF_DOT96#
CLK_BUF_BCLK#
LAN_SMBCLK
LAN_SMBDATA
CLK_PCI_LOOPBACK
PCIECLKREQ0#
CLK_PCIE_VGA#
CLK_PCIE_VGA
MEM_SMBCLK
PCIE_PRX_GLANTX_P6
PCIE_PTX_GLANRX_N6
PCIE_PTX_GLANRX_P6
PCIE_PRX_GLANTX_N6
PCIE_PTX_PCMRX_N3
PCIE_PTX_PCMRX_P3
PCIE_PRX_PCMTX_N3
PCIE_PRX_PCMTX_P3
PCMCLK_REQ#
PCIE_PCM#
PCIE_PCM
PCIE_MINI2
MINI2CLK_REQ#
PCIE_MINI2#
PCIE_PTX_WPANRX_N5
PCIE_PTX_WPANRX_P5
PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_MINI3#
PCIE_MINI3
MINI3CLK_REQ#
MEM_SMBCLK
MEM_SMBDATA
PCH_SMB_ALERT#
SIO_14M
PCI_TCM
PCI_TPM
MINI1CLK_REQ#
PCIE_MINI1#
PCIE_MINI1
LANCLK_REQ#
PCIE_LAN#
PCIE_LAN
JETWAY_14M
MEM_SMBDATA
MEM_SMBCLK
PEG_A_CLKRQ#
DDR_XDP_SMBCLK
DDR_XDP_SMBDAT
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_LAN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
PCIE_PRX_WLANTX_P236
PCIE_PTX_WLANRX_N2_C36
PCIE_PRX_WANTX_N135
PCIE_PRX_WANTX_P135
PCIE_PRX_WLANTX_N236
PCIE_PTX_WANRX_N1_C35
PCIE_PTX_WANRX_P1_C35
PCIE_PTX_WLANRX_P2_C36
PCIE_PRX_EXPTX_N434
PCIE_PRX_EXPTX_P434
PCIE_PTX_EXPRX_N4_C34
PCIE_PTX_EXPRX_P4_C34
PCH_CL_DATA1 36
PCH_CL_CLK1 36
PCH_CL_RST1# 36
LAN_SMBCLK 30
LAN_SMBDATA 30
CLK_PCIE_EXP#34
CLK_PCIE_EXP34
CLK_CPU_EXP 8
CLK_CPU_EXP# 8
CLK_BUF_EXP 6
CLK_BUF_EXP# 6
CLK_BUF_BCLK 6
CLK_BUF_BCLK# 6
CLK_BUF_DOT96 6
CLK_BUF_DOT96# 6
CLK_BUF_CKSSCD 6
CLK_BUF_CKSSCD# 6
CLK_PCH_14M 6
CLK_PCI_LOOPBACK 18
SML1_SMBCLK 40
SML1_SMBDATA 40
CLK_PCIE_VGA 53
CLK_PCIE_VGA# 53
PCIE_PRX_GLANTX_N630
PCIE_PTX_GLANRX_N6_C30
PCIE_PRX_GLANTX_P630
PCIE_PTX_GLANRX_P6_C30
EXPCLK_REQ#34
PCIE_PRX_PCMTX_N333
PCIE_PRX_PCMTX_P333
PCIE_PTX_PCMRX_N3_C33
PCIE_PTX_PCMRX_P3_C33
CLK_PCIE_PCM#33
CLK_PCIE_PCM33
PCMCLK_REQ#15,34
CLK_PCIE_MINI236
CLK_PCIE_MINI2#36
MINI2CLK_REQ#36
PCIE_PRX_WPANTX_N536
PCIE_PRX_WPANTX_P536
PCIE_PTX_WPANRX_N5_C36
PCIE_PTX_WPANRX_P5_C36
CLK_PCIE_MINI3#36
CLK_PCIE_MINI336
MINI3CLK_REQ#36
CLK_SIO_14M 39
CLK_PCI_TPM_CHA 32
CLK_PCI_TPM 31
CLK_PCIE_MINI136
CLK_PCIE_MINI1#36
MINI1CLK_REQ#36
LANCLK_REQ#15,30
CLK_PCIE_LAN#30
CLK_PCIE_LAN30
CLK_REQ# 53
JETWAY_CLK14M 32
DDR_XDP_SMBDAT 13,14,15,28
DDR_XDP_SMBCLK 13,14,15,28
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (2/8)
16 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (2/8)
16 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (2/8)
16 69Thursday, January 21, 2010
Compal Electronics, Inc.
Express card--->
MiniWWAN (Mini Card 1)--->
MiniWLAN (Mini Card 2)--->
DELL CONFIDENTIAL/PROPRIETARY
10/100/1G LAN --->
PCMCIA--->
PCMCIA--->
Express card--->
MiniWLAN (Mini Card 2)--->
MiniWPAN (Mini Card 3)--->
MiniWWAN (Mini Card 1)--->
10/100/1G LAN --->
MiniPCIE
(Mini Card 3)--->
C1009 0.1U_0402_10V7K~DC1009 0.1U_0402_10V7K~D
1 2
C1008 0.1U_0402_10V7K~DC1008 0.1U_0402_10V7K~D
1 2
R1199 0_0402_5%~DR1199 0_0402_5%~D
1 2
R1178 2.2K_0402_5%~DR1178 2.2K_0402_5%~D
1 2
R51 0_0402_5%~DR51 0_0402_5%~D
1 2
PCI-E*
SMBus
Controller
From CLK BUFFER PEG
Clock Flex
Link
V1.5
U73B
BD82QM57-SLGZQ-B3_FCBGA1071~D
PCI-E*
SMBus
Controller
From CLK BUFFER PEG
Clock Flex
Link
V1.5
U73B
BD82QM57-SLGZQ-B3_FCBGA1071~D
PERN1
BG30
PERP1
BJ30
PERN2
AW30
PERP2
BA30
PERN3
AU30
PERP3
AT30
PERN4
BA32
PERP4
BB32
PERN5
BF33
PERP5
BH33
PERN6
BA34
PERP6
AW34
PERN7
AT34
PERP7
AU34
PERN8
BG34
PERP8
BJ34
PETN1
BF29
PETP1
BH29
PETN2
BC30
PETP2
BD30
PETN3
AU32
PETP3
AV32
PETN4
BD32
PETP4
BE32
PETN5
BG32
PETP5
BJ32
PETN6
BC34
PETP6
BD34
PETN7
AU36
PETP7
AV36
PETN8
BG36
PETP8
BJ36
SMBALERT# / GPIO11 B9
SMBCLK H14
SMBDATA C8
SML0CLK C6
SML0DATA G8
CLKOUT_PCIE0N
AK48
CLKOUT_PCIE0P
AK47
CLKOUT_PCIE1N
AM43
CLKOUT_PCIE1P
AM45
CLKOUT_PCIE2N
AM47
CLKOUT_PCIE2P
AM48
CLKOUT_PCIE3N
AH42
CLKOUT_PCIE3P
AH41
CLKOUT_PCIE4N
AM51
CLKOUT_PCIE4P
AM53
CLKOUT_PCIE5N
AJ50
CLKOUT_PCIE5P
AJ52
SML0ALERT# / GPIO60 J14
CL_CLK1 T13
CL_DATA1 T11
CL_RST1# T9
CLKIN_BCLK_N AP3
CLKIN_BCLK_P AP1
CLKIN_DMI_N AW24
CLKIN_DMI_P BA24
CLKIN_DOT_96N F18
CLKIN_DOT_96P E18
CLKIN_SATA_N / CKSSCD_N AH13
CLKIN_SATA_P / CKSSCD_P AH12
XTAL25_IN AH51
XTAL25_OUT AH53
REFCLK14IN P41
CLKIN_PCILOOPBACK J42
CLKOUT_PEG_A_N AD43
CLKOUT_PEG_A_P AD45
PEG_A_CLKRQ# / GPIO47 H1
PCIECLKRQ0# / GPIO73
P9
PCIECLKRQ1# / GPIO18
U4
PCIECLKRQ2# / GPIO20
N4
PCIECLKRQ3# / GPIO25
A8
PCIECLKRQ4# / GPIO26
M9
PCIECLKRQ5# / GPIO44
H6
CLKOUTFLEX0 / GPIO64 T45
CLKOUTFLEX1 / GPIO65 P43
CLKOUTFLEX2 / GPIO66 T42
CLKOUTFLEX3 / GPIO67 N50
CLKOUT_DMI_N AN4
CLKOUT_DMI_P AN2
PEG_B_CLKRQ# / GPIO56
P13
CLKOUT_PEG_B_P
AK51 CLKOUT_PEG_B_N
AK53
SML1ALERT# / GPIO74 M14
SML1CLK / GPIO58 E10
SML1DATA / GPIO75 G12
XCLK_RCOMP AF38
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3
CLKOUT_DP_N / CLKOUT_BCLK1_N AT1
R255 2.2K_0402_5%~D@R255 2.2K_0402_5%~D@12
Q190B
DMN66D0LDW-7_SOT363-6~D
@Q190B
DMN66D0LDW-7_SOT363-6~D
@
3
5
4
R910 22_0402_5%~D@R910 22_0402_5%~D@12
C326 0.1U_0402_10V7K~DC326 0.1U_0402_10V7K~D
1 2
R685
1M_0402_5%~D
@R685
1M_0402_5%~D
@
12
C327 0.1U_0402_10V7K~DC327 0.1U_0402_10V7K~D
1 2
R1195 0_0402_5%~DR1195 0_0402_5%~D
12
R523 10K_0402_5%~DR523 10K_0402_5%~D
12
C1024 0.1U_0402_10V7K~DC1024 0.1U_0402_10V7K~D
1 2
Q190A
DMN66D0LDW-7_SOT363-6~D
@Q190A
DMN66D0LDW-7_SOT363-6~D
@
6 1
2
C1374 0.1U_0402_10V7K~DC1374 0.1U_0402_10V7K~D
1 2
R1203 0_0402_5%~DR1203 0_0402_5%~D
12
R1293 0_0402_5%~DR1293 0_0402_5%~D
12
R122 10K_0402_5%~DR122 10K_0402_5%~D
1 2
R54 0_0402_5%~DR54 0_0402_5%~D
1 2
R381
0_0402_5%~D
R381
0_0402_5%~D
12
R1205 0_0402_5%~DR1205 0_0402_5%~D
12
R1294 0_0402_5%~DR1294 0_0402_5%~D
12
R55 0_0402_5%~DR55 0_0402_5%~D
1 2
R1179 2.2K_0402_5%~DR1179 2.2K_0402_5%~D
1 2
R309 2.2K_0402_5%~DR309 2.2K_0402_5%~D
12
R1223 22_0402_5%~DR1223 22_0402_5%~D
12
R1302 0_0402_5%~DR1302 0_0402_5%~D
12
C1168
12P_0402_50V8J~D
@
C1168
12P_0402_50V8J~D
@
1
2
R1206 0_0402_5%~DR1206 0_0402_5%~D
12
R61 10K_0402_5%~DR61 10K_0402_5%~D
12
C319 0.1U_0402_10V7K~DC319 0.1U_0402_10V7K~D
1 2
C1025 0.1U_0402_10V7K~DC1025 0.1U_0402_10V7K~D
1 2
C1373 0.1U_0402_10V7K~DC1373 0.1U_0402_10V7K~D
1 2
R252 2.2K_0402_5%~D@R252 2.2K_0402_5%~D@12
R1202 0_0402_5%~DR1202 0_0402_5%~D
12
R1220 22_0402_5%~D3@ R1220 22_0402_5%~D3@ 12
R1175 10K_0402_5%~DR1175 10K_0402_5%~D
12
R379
0_0402_5%~D
R379
0_0402_5%~D
12
Y6
25MHZ_18PF_1Y725000CE1A~D
@Y6
25MHZ_18PF_1Y725000CE1A~D
@
12
C320 0.1U_0402_10V7K~DC320 0.1U_0402_10V7K~D
1 2
R686 90.9_0402_1%~DR686 90.9_0402_1%~D
1 2
R40 10K_0402_5%~DR40 10K_0402_5%~D
12
R876 10K_0402_5%~DR876 10K_0402_5%~D
1 2
R1198 0_0402_5%~DR1198 0_0402_5%~D
1 2
R45 10K_0402_5%~DR45 10K_0402_5%~D
12
C321 0.1U_0402_10V7K~DC321 0.1U_0402_10V7K~D
1 2
R1196 0_0402_5%~DR1196 0_0402_5%~D
12
R1297 0_0402_5%~DR1297 0_0402_5%~D
12
R1
10K_0402_5%~D
@R1
10K_0402_5%~D
@
1 2
R377 2.2K_0402_5%~DR377 2.2K_0402_5%~D
12
C317 0.1U_0402_10V7K~DC317 0.1U_0402_10V7K~D
1 2
R1219 22_0402_5%~DR1219 22_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_PCIE_WAKE#
PCH_PCIE_WAKE#
CLKRUN#
CLKRUN#
SUS_STAT#/LPCPD#
SIO_SLP_LAN#
SIO_SLP_LAN#
XDP_DBRESET#
PCH_RSMRST#
ME_SUS_PWR_ACK
ME_SUS_PWR_ACK
AC_PRESENT
PCH_BATLOW#
PCH_RI#
PCH_RI#
DMI_COMP_R
PM_DRAM_PWRGD
PM_MEPWROK_R
LAN_RST#
DMI_CRX_PTX_P0
DMI_CRX_PTX_N1
DMI_CTX_PRX_P2
DMI_CRX_PTX_P1
DMI_CRX_PTX_N2
DMI_CTX_PRX_P0
DMI_CRX_PTX_P3
DMI_CRX_PTX_N0
DMI_CTX_PRX_N1
DMI_CRX_PTX_P2
DMI_CTX_PRX_P3
DMI_CTX_PRX_N3
DMI_CTX_PRX_N2
DMI_CRX_PTX_N3
DMI_CTX_PRX_P1
DMI_CTX_PRX_N0
SUSCLK
SYS_PWROK
PCH_PWROK
CRT_IREF
PCH_PWROK
SIO_PWRBTN#_R
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_M#SIO_PWRBTN#_R
PCH_RSMRST#
H_PM_SYNC
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+1.05V_RUN
PCH_PCIE_WAKE# 39
CLKRUN# 32,39,40
SIO_SLP_S5# 40
SIO_SLP_S3# 39
SIO_SLP_S4# 39
SIO_SLP_M# 39,48
H_PM_SYNC 8
SIO_SLP_LAN# 30,39
XDP_DBRESET#8,15
RESET_OUT#15,40
PCH_RSMRST#40
ME_SUS_PWR_ACK40
SIO_PWRBTN#40
AC_PRESENT40
PM_DRAM_PWRGD8
DMI_CTX_PRX_P37
DMI_CTX_PRX_P07
DMI_CTX_PRX_P27
DMI_CTX_PRX_P17
DMI_CRX_PTX_N07
DMI_CRX_PTX_N17
DMI_CRX_PTX_N27
DMI_CRX_PTX_N37
DMI_CTX_PRX_N07
DMI_CTX_PRX_N17
DMI_CTX_PRX_N27
DMI_CTX_PRX_N37
DMI_CRX_PTX_P07
DMI_CRX_PTX_P17
DMI_CRX_PTX_P27
DMI_CRX_PTX_P37
PM_MEPWROK40
SIO_PWRBTN#_R8,15
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (3/8)
17 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (3/8)
17 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (3/8)
17 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Intel request DDPB can not support eDP
R260 10K_0402_5%~DR260 10K_0402_5%~D
1 2
DMI
FDI
System Power Management
V1.5
U73C
BD82QM57-SLGZQ-B3_FCBGA1071~D
DMI
FDI
System Power Management
V1.5
U73C
BD82QM57-SLGZQ-B3_FCBGA1071~D
DMI0RXN
BC24
DMI1RXN
BJ22
DMI2RXN
AW20
DMI3RXN
BJ20
DMI0RXP
BD24
DMI1RXP
BG22
DMI2RXP
BA20
DMI3RXP
BG20
DMI0TXN
BE22
DMI1TXN
BF21
DMI2TXN
BD20
DMI3TXN
BE18
DMI0TXP
BD22
DMI1TXP
BH21
DMI2TXP
BC20
DMI3TXP
BD18
DMI_ZCOMP
BH25
DMI_IRCOMP
BF25
FDI_RXN0 BA18
FDI_RXN1 BH17
FDI_RXN2 BD16
FDI_RXN3 BJ16
FDI_RXN4 BA16
FDI_RXN5 BE14
FDI_RXN6 BA14
FDI_RXN7 BC12
FDI_RXP0 BB18
FDI_RXP1 BF17
FDI_RXP2 BC16
FDI_RXP3 BG16
FDI_RXP4 AW16
FDI_RXP5 BD14
FDI_RXP6 BB14
FDI_RXP7 BD12
FDI_FSYNC0 BF13
FDI_FSYNC1 BH13
FDI_LSYNC0 BJ12
FDI_LSYNC1 BG14
FDI_INT BJ14
PMSYNCH BJ10
TP23 N2
SLP_M# K8
SLP_S3# P12
SLP_S4# H7
SLP_S5# / GPIO63 E4
SYS_RESET#
T6
SYS_PWROK
M6
PWRBTN#
P5
RI#
F14
WAKE# J12
SUS_STAT# / GPIO61 P8
SUSCLK / GPIO62 F3
ACPRESENT / GPIO31
P7
LAN_RST#
A10
MEPWROK
K5
BATLOW# / GPIO72
A6
PWROK
B17
CLKRUN# / GPIO32 Y1
SUS_PWR_DN_ACK / GPIO30
M1
RSMRST#
C16
DRAMPWROK
D9
SLP_LAN# / GPIO29 F6
T2 PAD~DT2 PAD~D
T5 PAD~DT5 PAD~D
R267 10K_0402_5%~DR267 10K_0402_5%~D
12
T173 PAD~DT173 PAD~D
R672
1K_0402_5%~D
R672
1K_0402_5%~D
12
R269 10K_0402_5%~DR269 10K_0402_5%~D
12
R380 10K_0402_5%~DR380 10K_0402_5%~D
12
R275 8.2K_0402_5%~DR275 8.2K_0402_5%~D
1 2
R282 8.2K_0402_5%~DR282 8.2K_0402_5%~D
12
R254 0_0402_5%~DR254 0_0402_5%~D
1 2
R53 0_0402_5%~DR53 0_0402_5%~D
1 2
T3 PAD~DT3 PAD~D
R257 0_0402_5%~DR257 0_0402_5%~D
1 2
R385
49.9_0402_1%~D
R385
49.9_0402_1%~D
1 2
R256 0_0402_5%~DR256 0_0402_5%~D
1 2
T4 PAD~DT4 PAD~D
R268 10K_0402_5%~DR268 10K_0402_5%~D
12
R48 8.2K_0402_5%~DR48 8.2K_0402_5%~D
1 2
R253 0_0402_5%~DR253 0_0402_5%~D
1 2
LVDS
Digital Display Interface
CRT
V1.5
U73D
BD82QM57-SLGZQ-B3_FCBGA1071~D
LVDS
Digital Display Interface
CRT
V1.5
U73D
BD82QM57-SLGZQ-B3_FCBGA1071~D
L_BKLTCTL
Y48
L_BKLTEN
T48
L_CTRL_CLK
AB46
L_CTRL_DATA
V48
L_DDC_CLK
AB48
L_DDC_DATA
Y45
L_VDD_EN
T47
LVDSA_CLK#
AV53
LVDSA_CLK
AV51
LVDSA_DATA#0
BB47
LVDSA_DATA#1
BA52
LVDSA_DATA#2
AY48
LVDSA_DATA#3
AV47
LVDSA_DATA0
BB48
LVDSA_DATA1
BA50
LVDSA_DATA2
AY49
LVDSA_DATA3
AV48
LVDSB_CLK#
AP48
LVDSB_CLK
AP47
LVDSB_DATA#0
AY53
LVDSB_DATA#1
AT49
LVDSB_DATA#2
AU52
LVDSB_DATA#3
AT53
LVDSB_DATA0
AY51
DDPB_0N BD42
DDPB_1N BJ42
LVD_VREFH
AT43
LVD_VREFL
AT42
DDPD_2N BF37
DDPD_3N BE36
DDPB_2N BB40
DDPB_3N AW38
DDPC_0N BE40
DDPC_1N BF41
DDPC_2N BD38
DDPC_3N BB36
DDPD_0N BJ40
DDPD_1N BJ38
DDPB_0P BC42
DDPB_1P BG42
DDPD_2P BH37
DDPD_3P BD36
DDPB_2P BA40
DDPB_3P BA38
LVDSB_DATA1
AT48
LVDSB_DATA2
AU50
LVDSB_DATA3
AT51
LVD_IBG
AP39
LVD_VBG
AP41
DDPC_1P BH41
DDPC_0P BD40
DDPC_2P BC38
DDPC_3P BA36
DDPD_0P BG40
DDPD_1P BG38
CRT_BLUE
AA52
CRT_DDC_CLK
V51
CRT_DDC_DATA
V53
CRT_GREEN
AB53
CRT_HSYNC
Y53
CRT_IRTN
AB51
CRT_RED
AD53
CRT_VSYNC
Y51
DAC_IREF
AD48
SDVO_CTRLCLK T51
SDVO_CTRLDATA T53
DDPC_CTRLCLK Y49
DDPC_CTRLDATA AB49
DDPD_CTRLCLK U50
DDPD_CTRLDATA U52
DDPB_AUXN BG44
DDPC_AUXN BE44
DDPD_AUXN BC46
DDPB_AUXP BJ44
DDPC_AUXP BD44
DDPD_AUXP BD46
DDPB_HPD AU38
DDPC_HPD AV40
DDPD_HPD AT38
SDVO_TVCLKINP BG46
SDVO_TVCLKINN BJ46
SDVO_STALLP BG48
SDVO_STALLN BJ48
SDVO_INTP BH45
SDVO_INTN BF45
T179 PAD~DT179 PAD~D
T6 PAD~DT6 PAD~D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_SERR#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_PERR#
PCI_PLOCK#
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQB#
CAM_MIC_CBL_DET#
SD_DET#
CAM_MIC_CBL_DET#
PCI_REQ1#
PCI_REQ0#
BT_DET#
PCH_PLTRST#
PCH_PLTRST#_EC
USBP10+
USBP10-
USBP11+
USBP11-
USBP9+
USBP0-
USBP0+
USBP3+
USBP5+
USBP7+
USBP3-
USBP1-
USBP9-
USBP8-
USBP8+
USBP5-
USBP7-
USBP4-
USBP2+
USBP4+
USBP2-
USBP1+
USBRBIAS
USB_OC4#
USB_OC3#
USB_OC1#
USB_OC0#
USB_OC6#
USB_OC5#
USB_OC7#
PCI_GNT3#
PCI_GNT3#
NV_CLE
NV_CLE
NV_ALE
NV_ALE
USB_OC2#
PCI_LOOPBACKOUT
PCI_GNT0#
PCI_GNT1#
PCI_GNT0#
PCI_GNT1#
PCH_PLTRST#
PCI_DOCK
PCI_PIRQC#
PCI_REQ0#
PCI_DEVSEL#
PCI_PLOCK#
PCI_PERR#
PCI_PIRQB#
BT_DET#
USBP6+
USBP6-
USB_OC0#_R
USB_OC2#
USB_OC3#
USB_OC5#
USB_OC6#
USB_OC7#
USB_OC4#
USB_OC1#_R
PCI_IRDY#
LVDS_CBL_DET#
PCI_PIRQD#
PCI_STOP#
PCI_REQ1#
PCI_SERR#
PCI_FRAME#
PCI_TRDY#
PCI_PIRQA#
LVDS_CBL_DET#
USBP13+
USBP13-
PCIE_MCARD3_DET#
FFS_PCH_INT
PCI_MEC
PCI_5028
SD_DET#
PCH_PCIRST#
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
+VCCPNAND
+VCCPNAND
LVDS_CBL_DET#24
CAM_MIC_CBL_DET#24
SD_DET#33
PCIE_MCARD2_DET#36
PCH_PLTRST#_EC 8,32,34,36,39,40
USBP10+ 34
USBP10- 34
USBP11+ 24
USBP11- 24
USBP4+ 36
USBP5- 36
USBP3+ 37
USBP5+ 36
USBP4- 36
USBP3- 37
USBP2+ 37
USBP2- 37
USBP1+ 37
USBP1- 37
USBP0- 37
USBP0+ 37
USBP7+ 31
USBP7- 31
USBP8+ 38
USBP8- 38
USBP9+ 38
USBP9- 38
USB_OC0# 37
CLK_PCI_LOOPBACK16
PLTRST_LAN#30
PLTRST_XDP#15
CLK_PCI_DOCK38
BT_DET#41
USBP6- 41
USBP6+ 41
USB_OC1# 37
USBP13+ 36
USBP13- 36
PCIE_MCARD3_DET#36
USB_OC0#_R 15
USB_OC1#_R 15
USB_OC2# 15
USB_OC3# 15
USB_OC4# 15
USB_OC5# 15
USB_OC6# 15
USB_OC7# 15
HDD_FALL_INT28,40
CLK_PCI_MEC40
CLK_PCI_502839
PLTRST_R5U242#33
PLTRST_USH#31
PLTRST_GPU#53
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (4/8)
18 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (4/8)
18 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (4/8)
18 69Thursday, January 21, 2010
Compal Electronics, Inc.
----->BIO
----->Camera
----->Express Card
----->Blue Tooth
----->WLAN
----->Left Side Top
----->Right Side Bottom
----->Right Side Top
----->Left Side Bottom
----->WWAN
----->DOCK
----->DOCK
Within 500 mils
DELL CONFIDENTIAL/PROPRIETARY
A16 swap override Strap/Top-Block
PCI_GNT#3
Swap Override jumper
Low = A16 swap
High = Default
DMI Termination Voltage
NV_CLE Set to Vss when LOW
Set to Vcc when HIGH
Danbury Technology Enabled
NV_ALE
High = Enabled (Default)
Low = Disabled
Boot BIOS Strap
PCI_GNT#0PCI_GNT#1 Boot BIOS Location
00
Reserved (NAND)
PCI
SPI
LPC
01
10
11
*
PCH XDP ENABLE
PCH XDP DISABLE
No Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
Stuff: R78,R89,R101~R116
No Stuff: R78,R89,R101~R116
Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
----->PCIE/BKT
R71 0_0402_5%~DR71 0_0402_5%~D
1 2
R121 0_0402_5%~D@R121 0_0402_5%~D@1 2
R79
1K_0402_5%~D
@
R79
1K_0402_5%~D
@
12
R866
1K_0402_5%~D
@R866
1K_0402_5%~D
@
12
R77 0_0402_5%~DR77 0_0402_5%~D
1 2
R97 0_0402_5%~DR97 0_0402_5%~D
1 2
PCI
NVRAM
USB
V1.5
U73E
BD82QM57-SLGZQ-B3_FCBGA1071~D
PCI
NVRAM
USB
V1.5
U73E
BD82QM57-SLGZQ-B3_FCBGA1071~D
AD0
H40
AD1
N34
AD2
C44
AD20
C42
AD21
K46
AD22
M51
AD23
J52
AD24
K51
AD25
L34
AD26
F42
AD27
J40
AD28
G46
AD29
F44
AD3
A38
AD30
M47
AD31
H36
AD4
C36
AD5
J34
AD6
A40
AD7
D45
AD8
E36
AD9
H48
C/BE0#
J50
C/BE1#
G42
C/BE2#
H47
C/BE3#
G34
PCIRST#
K6
PERR#
E50
PIRQA#
G38
PIRQB#
H51
PIRQC#
B37
PIRQD#
A44
PLOCK#
D49
PLTRST#
D5
PME#
M7
REQ0#
F51
REQ1# / GPIO50
A46
REQ2# / GPIO52
B45
REQ3# / GPIO54
M53
SERR#
E44
STOP#
D41
TRDY#
C48
NV_ALE BD3
NV_CE#0 AY9
NV_CE#1 BD1
NV_CE#2 AP15
NV_CE#3 BD8
NV_CLE AY6
NV_DQS0 AV9
NV_DQS1 BG8
NV_DQ0 / NV_IO0 AP7
NV_DQ1 / NV_IO1 AP6
NV_DQ10 / NV_IO10 BD6
NV_DQ11 / NV_IO11 BB7
NV_DQ12 / NV_IO12 BC8
NV_DQ13 / NV_IO13 BJ8
NV_DQ14 / NV_IO14 BJ6
NV_DQ15 / NV_IO15 BG6
NV_DQ2 / NV_IO2 AT6
NV_DQ3 / NV_IO3 AT9
NV_DQ4 / NV_IO4 BB1
NV_DQ5 / NV_IO5 AV6
NV_DQ6 / NV_IO6 BB3
NV_DQ7 / NV_IO7 BA4
NV_DQ8 / NV_IO8 BE4
NV_DQ9 / NV_IO9 BB6
NV_RB# AV7
NV_RCOMP AU2
NV_WR#0_RE# AY8
NV_WR#1_RE# AY5
NV_WE#_CK0 AV11
NV_WE#_CK1 BF5
USBP0N H18
USBP0P J18
USBP10N A22
USBP10P C22
USBP11N G24
USBP11P H24
USBP12N L24
USBP12P M24
USBP13N A24
USBP13P C24
USBP1N A18
USBP1P C18
USBP2N N20
USBP2P P20
USBP3N J20
USBP3P L20
USBP4N F20
USBP4P G20
USBP5N A20
USBP5P C20
USBP6N M22
USBP7N B21
USBP7P D21
USBP8N H22
USBP8P J22
USBP9N E22
USBP9P F22
USBRBIAS# B25
USBRBIAS D25
USBP6P N22
AD10
E40
AD11
C40
AD12
M48
AD13
M45
AD14
F53
AD15
M40
AD16
M43
AD17
J36
AD18
K48
AD19
F40
DEVSEL#
F46
FRAME#
C46
GNT0#
F48
GNT1# / GPIO51
K45
GNT2# / GPIO53
F36
GNT3# / GPIO55
H53
PIRQE# / GPIO2
B41
PIRQF# / GPIO3
K53
PIRQG# / GPIO4
A36
PIRQH# / GPIO5
A48
IRDY#
A42
PAR
H44
OC0# / GPIO59 N16
OC1# / GPIO40 J16
OC2# / GPIO41 F16
OC3# / GPIO42 L16
OC4# / GPIO43 E14
OC5# / GPIO9 G16
OC6# / GPIO10 F12
OC7# / GPIO14 T15
CLKOUT_PCI0
N52
CLKOUT_PCI1
P53
CLKOUT_PCI2
P46
CLKOUT_PCI3
P51
CLKOUT_PCI4
P48
RP6
8.2K_1206_8P4R_5%~D
RP6
8.2K_1206_8P4R_5%~D
1 8
2 7
3 6
4 5
RP2
10K_1206_8P4R_5%~D
RP2
10K_1206_8P4R_5%~D
1 8
2 7
3 6
4 5
C40
0.1U_0402_16V4Z~D
C40
0.1U_0402_16V4Z~D
1 2
R1215 22_0402_5%~DR1215 22_0402_5%~D
1 2
RP5
8.2K_1206_8P4R_5%~D
RP5
8.2K_1206_8P4R_5%~D
1 8
2 7
3 6
4 5
R93
1K_0402_5%~D
@
R93
1K_0402_5%~D
@
12
RP4
8.2K_1206_8P4R_5%~D
RP4
8.2K_1206_8P4R_5%~D
1 8
2 7
3 6
4 5
RP3
8.2K_1206_8P4R_5%~D
RP3
8.2K_1206_8P4R_5%~D
1 8
2 7
3 6
4 5
R14 0_0402_5%~DR14 0_0402_5%~D
1 2
R63 22_0402_5%~DR63 22_0402_5%~D
12
R786 8.2K_0402_5%~DR786 8.2K_0402_5%~D
1 2
R124 0_0402_5%~DR124 0_0402_5%~D
1 2
R590 8.2K_0402_5%~DR590 8.2K_0402_5%~D
1 2
R632 0_0402_5%~DR632 0_0402_5%~D
1 2
R1216 22_0402_5%~DR1216 22_0402_5%~D
12
R94 0_0402_5%~DR94 0_0402_5%~D
1 2
RP1
10K_1206_8P4R_5%~D
RP1
10K_1206_8P4R_5%~D
1 8
2 7
3 6
4 5
R100 0_0402_5%~DR100 0_0402_5%~D
1 2
U11
TC7SH08FU_SSOP5~D
U11
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
R872
10K_0402_5%~D
@R872
10K_0402_5%~D
@
12
R863
4.7K_0402_5%~D
@
R863
4.7K_0402_5%~D
@
12
R212 8.2K_0402_5%~DR212 8.2K_0402_5%~D
1 2
R303
22.6_0402_1%~D
R303
22.6_0402_1%~D
1 2
R1217 22_0402_5%~DR1217 22_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SIO_A20GATE
SIO_A20GATE
CLK_CPU_BCLK#
CLK_CPU_BCLK
H_PECI
SIO_RCIN#
SIO_RCIN#
H_CPUPWRGD
PM_LANPHY_ENABLE
DGPU_PWROK
TPM_ID0
SPEAKER_DET#
IO_LOOP
TP_ONDIE_PLL_VR
SIO_EXT_SCI#
SIO_EXT_SMI#
TPM_ID0
GPIO37
CONTACTLESS_DET#
GPIO37
EN_ESATA_RPTR#
TEMP_ALERT#
TPM_ID1
SPEAKER_DET#
GPIO46
GPIO46
TP_ONDIE_PLL_VR
CONTACTLESS_DET#
EN_ESATA_RPTR#
TEMP_ALERT#
SIO_EXT_SCI#
VSS_NCTF_23
VSS_NCTF_14
VSS_NCTF_25
VSS_NCTF_2
VSS_NCTF_8
VSS_NCTF_26
VSS_NCTF_15
VSS_NCTF_27
VSS_NCTF_9
VSS_NCTF_3
VSS_NCTF_16
VSS_NCTF_24
VSS_NCTF_28
VSS_NCTF_10
VSS_NCTF_4
VSS_NCTF_31
VSS_NCTF_29
VSS_NCTF_17
VSS_NCTF_11
VSS_NCTF_30
VSS_NCTF_5
VSS_NCTF_18
VSS_NCTF_12
VSS_NCTF_6
VSS_NCTF_21
VSS_NCTF_19
VSS_NCTF_1
VSS_NCTF_22
VSS_NCTF_13
VSS_NCTF_7
VSS_NCTF_20
PCH_THRMTRIP#_R
TPM_ID1
SIO_EXT_SMI#
USB_MCARD2_DET#
USB_MCARD1_DET#
ROUSH_PAID_TS_DET#
ROUSH_PAID_TS_DET#
SIO_EXT_SMI#
INIT3_3V#
FFS_INT2
GPIO1
GPIO6
GPIO7
GPIO1
GPIO6
GPIO7
IO_LOOP
SIO_EXT_WAKE#
GPIO34
GPIO34
+3.3V_RUN
+1.05V_1.1V_RUN_VTT
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
SIO_A20GATE 40
CLK_CPU_BCLK# 8
CLK_CPU_BCLK 8
H_PECI 8
SIO_RCIN# 40
H_CPUPWRGD 8
PM_LANPHY_ENABLE30
SPEAKER_DET#29
SIO_EXT_SCI#40
IO_LOOP37
CONTACTLESS_DET#15,31
PCIE_MCARD1_DET#36
TEMP_ALERT#15,39
SIO_EXT_SMI#40
SIO_EXT_WAKE#39
USB_MCARD2_DET#36
USB_MCARD1_DET#36
GPIO3715
EN_ESATA_RPTR#15,37
ROUSH_PAID_TS_DET#15
SIO_EXT_SCI#_R15
DGPU_PWROK39,62
FFS_INT228
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (5/8)
19 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (5/8)
19 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (5/8)
19 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Internal pull up GPIO27 to
enable VccVRM
TPM_ID1TPM_ID0
0
1
0
0
01
11
China TPM
USH1.0 (For SSI)
USH2.0
No TPM, No China TPM
-----> will use MEMO control pop R339
& de-pop R787 when USH1.0 enable
for SSI build only
All NCTF pins should have thick
traces at 45°from the pad.
R1244 10K_0402_5%~DR1244 10K_0402_5%~D
12
R787
20K_0402_5%~D
4@ R787
20K_0402_5%~D
4@
12
R1544 10K_0402_5%~DR1544 10K_0402_5%~D
12
R237
56_0402_5%~D
R237
56_0402_5%~D
12
R922
10K_0402_5%~D
6@
R922
10K_0402_5%~D
6@
1 2
R1491 10K_0402_5%~DR1491 10K_0402_5%~D
1 2
R274 10K_0402_5%~DR274 10K_0402_5%~D
1 2
R95 8.2K_0402_5%~DR95 8.2K_0402_5%~D
1 2
R1242 10K_0402_5%~DR1242 10K_0402_5%~D
12
R231 10K_0402_5%~DR231 10K_0402_5%~D
12
R1309 10K_0402_5%~DR1309 10K_0402_5%~D
1 2
R1243 10K_0402_5%~DR1243 10K_0402_5%~D
12
R99 1K_0402_5%~D@R99 1K_0402_5%~D@
1 2
R74 10K_0402_5%~DR74 10K_0402_5%~D
1 2
R230 8.2K_0402_5%~DR230 8.2K_0402_5%~D
12
GPIO
MISC
NCTF
RSVD
CPU
V1.5
U73F
BD82QM57-SLGZQ-B3_FCBGA1071~D
GPIO
MISC
NCTF
RSVD
CPU
V1.5
U73F
BD82QM57-SLGZQ-B3_FCBGA1071~D
GPIO27
AB12
GPIO28
V13
GPIO24
H10
GPIO57
F8
LAN_PHY_PWR_CTRL / GPIO12
K9
VSS_NCTF_1
A4
VSS_NCTF_2
A49
VSS_NCTF_3
A5
VSS_NCTF_4
A50
VSS_NCTF_5
A52
VSS_NCTF_6
A53
VSS_NCTF_7
B2
VSS_NCTF_8
B4
VSS_NCTF_9
B52
VSS_NCTF_10
B53
VSS_NCTF_11
BE1
VSS_NCTF_12
BE53
VSS_NCTF_13
BF1
VSS_NCTF_14
BF53
VSS_NCTF_15
BH1
VSS_NCTF_16
BH2
VSS_NCTF_17
BH52
VSS_NCTF_18
BH53
VSS_NCTF_19
BJ1
VSS_NCTF_20
BJ2
VSS_NCTF_21
BJ4
VSS_NCTF_22
BJ49
VSS_NCTF_23
BJ5
VSS_NCTF_24
BJ50
VSS_NCTF_25
BJ52
VSS_NCTF_26
BJ53
VSS_NCTF_27
D1
VSS_NCTF_28
D2
VSS_NCTF_29
D53
VSS_NCTF_30
E1
VSS_NCTF_31
E53
TACH2 / GPIO6
D37
TACH0 / GPIO17
F38
TACH3 / GPIO7
J32
TP9 M18
TP10 N18
TP11 AJ24
TP12 AK41
SATA3GP / GPIO37
AB13
SATA5GP / GPIO49 / TEMP_ALERT#
AA4
SCLOCK / GPIO22
Y7
SLOAD / GPIO38
V3
SDATAOUT0 / GPIO39
P3
SDATAOUT1 / GPIO48
AB6
A20GATE U2
PROCPWRGD BE10
RCIN# T1
PECI BG10
THRMTRIP# BD10
GPIO8
F10
CLKOUT_PCIE6N AH45
CLKOUT_PCIE6P AH46
PCIECLKRQ6# / GPIO45
H3
CLKOUT_PCIE7N AF48
CLKOUT_PCIE7P AF47
PCIECLKRQ7# / GPIO46
F1
TP5 AY46
TP4 AY45
TP6 AV43
TP7 AV45
BMBUSY# / GPIO0
Y3
TP16 M30
TP17 N30
NC_1 AB45
NC_2 AB38
NC_3 AB42
NC_4 AB41
GPIO15
T7
TACH1 / GPIO1
C38
TP13 AK42
TP3 BB22
TP1 BA22
TP2 AW22
TP14 M32
TP15 N32
SATA2GP / GPIO36
AB7
NC_5 T39
INIT3_3V# P6
STP_PCI# / GPIO34
M11
GPIO35
V6
SATA4GP / GPIO16
AA2
TP24 C10
TP8 AF13
CLKOUT_BCLK0_N / CLKOUT_PCIE8N AM3
CLKOUT_BCLK0_P / CLKOUT_PCIE8P AM1
TP19 AA23
TP18 H12
R1489 10K_0402_5%~DR1489 10K_0402_5%~D
1 2
T7PAD~D @T7PAD~D @
R272 10K_0402_5%~DR272 10K_0402_5%~D
1 2
R273
10K_0402_5%~D
5@
R273
10K_0402_5%~D
5@
1 2
R1490 10K_0402_5%~DR1490 10K_0402_5%~D
1 2
R1530 2.2K_0402_5%~DR1530 2.2K_0402_5%~D
1 2
R130
0_0402_5%~D
R130
0_0402_5%~D
1 2
R1245 10K_0402_5%~DR1245 10K_0402_5%~D
12
R835 100K_0402_5%~DR835 100K_0402_5%~D
12
C33
0.1U_0402_16V4Z~D
C33
0.1U_0402_16V4Z~D
1
2
R339
2.2K_0402_5%~D
3@ R339
2.2K_0402_5%~D
3@
12
R1284
8.2K_0402_5%~D
@
R1284
8.2K_0402_5%~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCAFDI_VRM
+1.05V_+1.5V_1.8V_RUN
+VCCAFDI_VRM
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+3.3V_RUN
+1.5V_RUN
+1.8V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
+3.3V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.5V_1.8V_RUN_VCCADMI_VRM
+1.05V_1.1V_RUN_VTT
+3.3V_M
+3.3V_RUN
+1.8V_RUN
+1.05V_RUN
+VCCPNAND
+3.3V_RUN
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (6/8)
20 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (6/8)
20 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (6/8)
20 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
3.3
1.1
1.1
1.1
1.1
V_CPU_IO
V5REF
V5REF_Sus
Vcc3_3
VccAClk
VccADAC
VccADPLLA
VccADPLLB
VccapllEXP
Voltage Rail
VccCore
VccDMI
1.1/1.05
5
3.3
1.1
< 1 (mA)
< 1 (mA)
< 1 (mA)
0.357
0.052
0.069
0.068
0.069
0.04
1.432
0.058
5
Voltage
S0 Iccmax
Current (A)
1.1VccDMI 0.061
1.1
1.1VccFDIPLL 0.037
1.1VccIO 3.062
1.1VccLAN 0.32
1.1VccME 1.849
3.3VccME3_3 0.085
1.8 0.156VccpNAND
3.3VccRTC 2 (mA)
1.1VccSATAPLL 0.031
3.3VccSus3_3
3.3VccSusHDA
0.163
0.006
VccVRM 1.8 / 1.5 0.196
1.05VccVRM
VccALVDS 3.3
1.8VccTX_LVDS 0.059
< 1 (mA)
< 1 (mA)
PCH Power Rail Table
Place C78 Near BJ24 pin
Place C22 Near BJ18 pin
C1140 near pin AT16
R80
0_0603_5%~D
@R80
0_0603_5%~D
@
12
C84
1U_0402_6.3V6K~D
C84
1U_0402_6.3V6K~D
1
2
C78
1U_0402_6.3V6K~D
@
C78
1U_0402_6.3V6K~D
@
1
2
R495
0_0805_5%~D
R495
0_0805_5%~D
1 2
C95
0.1U_0402_10V7K~D
C95
0.1U_0402_10V7K~D
1
2
C83
1U_0402_6.3V6K~D
C83
1U_0402_6.3V6K~D
1
2
C94
0.1U_0402_10V7K~D
C94
0.1U_0402_10V7K~D
1
2
C77
1U_0402_6.3V6K~D
C77
1U_0402_6.3V6K~D
1
2
R96
0_0603_5%~D
@R96
0_0603_5%~D
@
12
POWER
VCC CORE
DMI
PCI E*
CRTLVDS
FDI
NAND / SPI HVCMOS
V1.5
U73G
BD82QM57-SLGZQ-B3_FCBGA1071~D
POWER
VCC CORE
DMI
PCI E*
CRTLVDS
FDI
NAND / SPI HVCMOS
V1.5
U73G
BD82QM57-SLGZQ-B3_FCBGA1071~D
VCCCORE[1]
AB24
VCCCORE[2]
AB26
VCCCORE[3]
AB28
VCCCORE[4]
AD26
VCCCORE[5]
AD28
VCCCORE[6]
AF26
VCCCORE[7]
AF28
VCCCORE[8]
AF30
VCCCORE[9]
AF31
VCCCORE[10]
AH26
VCCCORE[11]
AH28
VCCCORE[12]
AH30
VCCCORE[13]
AH31
VCCCORE[14]
AJ30
VCCCORE[15]
AJ31
VCCPNAND[4] AK19
VCCPNAND[3] AK20
VCCIO[27]
AN23
VCCIO[28]
AN24
VCCIO[29]
AN26
VCCIO[30]
AN28
VCCIO[54]
AN30
VCCIO[55]
AN31
VCCIO[33]
AT26
VCCIO[34]
AT28
VCCIO[35]
AU26
VCCIO[36]
AU28
VCCIO[37]
AV26
VCCIO[38]
AV28
VCCIO[39]
AW26
VCCIO[40]
AW28
VCCIO[41]
BA26
VCCIO[42]
BA28
VCCIO[43]
BB26
VCCIO[44]
BB28
VCCIO[45]
BC26
VCCIO[46]
BC28
VCCIO[47]
BD26
VCCIO[48]
BD28
VCCIO[49]
BE26
VCCIO[50]
BE28
VCCIO[51]
BG26
VCCIO[52]
BG28
VCCIO[53]
BH27
VCCIO[31]
BJ26
VCCIO[32]
BJ28
VCCADAC[1] AE50
VCCADAC[2] AE52
VCCTX_LVDS[1] AP43
VCCTX_LVDS[2] AP45
VCCALVDS AH38
VCCVRM[2] AT24
VCCVRM[1]
AT22
VCCAPLLEXP
BJ24
VCCFDIPLL
BJ18
VCCPNAND[6] AK13
VCCPNAND[5] AK15
VCCPNAND[7] AM12
VCCPNAND[8] AM13
VCCIO[24]
AK24 VCCTX_LVDS[4] AT45
VCCTX_LVDS[3] AT46
VSSA_DAC[1] AF53
VSSA_LVDS AH39
VSSA_DAC[2] AF51
VCCIO[1]
AM23
VCC3_3[2] AB34
VCC3_3[3] AB35
VCC3_3[4] AD35
VCC3_3[1]
AN35
VCCME3_3[1] AM8
VCCME3_3[2] AM9
VCCME3_3[3] AP11
VCCME3_3[4] AP9
VCCPNAND[2] AK16
VCCPNAND[9] AM15
VCCPNAND[1] AM16
VCCDMI[1] AT16
VCCDMI[2] AU16
VCCIO[25]
AN20
VCCIO[26]
AN22
C82
1U_0402_6.3V6K~D
C82
1U_0402_6.3V6K~D
1
2
R390
0_0603_5%~D
R390
0_0603_5%~D
1 2
R387
0_0603_5%~D
R387
0_0603_5%~D
12
C22
1U_0402_6.3V6K~D
@
C22
1U_0402_6.3V6K~D
@
1
2
C93
0.1U_0402_10V7K~D
C93
0.1U_0402_10V7K~D
1
2
C1139
10U_0805_4VAM~D
C1139
10U_0805_4VAM~D
1
2
R489
0_0805_5%~D
@R489
0_0805_5%~D
@
1 2
R391
0_0603_5%~D
R391
0_0603_5%~D
1 2
C85
0.1U_0402_10V7K~D
C85
0.1U_0402_10V7K~D
1
2
C80
10U_0805_4VAM~D
C80
10U_0805_4VAM~D
1
2
C81
1U_0402_6.3V6K~D
C81
1U_0402_6.3V6K~D
1
2
C1140
1U_0402_6.3V6K~D
C1140
1U_0402_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3.3V_ALW_VCCPUSB
+PCH_V5REF_RUN
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+PCH_V5REF_SUS
+3.3V_RUN_VCCPPCI
+VCCSATAPLL
+VCCIO
+VCCME_13
+VCCME_14
+VCCME_15
+VCCME_16
+VCCSUSHDA
+VCCACLK
+1.05V_M_VCCAUX
+1.05V_M_VCCEPW
+VCCRTCEXT
+1.05V_RUN_VCCUSBCORE
+VCCSST
+DCPSUS
+3.3V_ALW_VCCPSUS
+3.3_RUN_VCCPCORE
+V_CPU_IO
+TP_PCH_VCCDSW
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_VCCPUSB
+1.05V_RUN
+3.3V_RUN+5V_RUN
+3.3V_ALW_PCH+5V_ALW_PCH
+3.3V_RUN
+3.3V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
+1.05V_M
+3.3V_ALW_PCH
+1.05V_M
+1.05V_M
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+1.05V_1.1V_RUN_VTT
+RTC_CELL
+5V_ALW_PCH+5V_ALW
ALW_ENABLE42
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (7/8)
21 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (7/8)
21 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (7/8)
21 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Follow DG 1.11
Place C39 Near AP51 pin
Place C610 Near AK3 pin
Place C105 Near BB51 pin
C106 Near BD51 pin
Place C116 Near AD38 pin
Place C117 Near V39 pin
R499
0_0603_5%~D
R499
0_0603_5%~D
12
C112
22U_0805_6.3V6M~D
@
C112
22U_0805_6.3V6M~D
@
1
2
D15
RB751S40T1_SOD523-2~D
D15
RB751S40T1_SOD523-2~D
21
C39
1U_0402_6.3V6K~D
@
C39
1U_0402_6.3V6K~D
@
1
2
R592 0_0603_5%~DR592 0_0603_5%~D
1 2
R651
0_0603_5%~D
R651
0_0603_5%~D
12
C342
1U_0603_10V6K~D
C342
1U_0603_10V6K~D
1
2
C759
0.1U_0402_10V7K~D
C759
0.1U_0402_10V7K~D
1
2
C781
0.1U_0402_10V7K~D
C781
0.1U_0402_10V7K~D
1
2
C110
0.1U_0402_10V7K~D
C110
0.1U_0402_10V7K~D
1
2
C356
0.1U_0402_10V7K~D
C356
0.1U_0402_10V7K~D
1
2
C113
0.1U_0402_10V7K~D
C113
0.1U_0402_10V7K~D
1
2
D16
RB751S40T1_SOD523-2~D
D16
RB751S40T1_SOD523-2~D
21
R669
0_0603_5%~D
R669
0_0603_5%~D
1 2
C610
1U_0402_6.3V6K~D
@
C610
1U_0402_6.3V6K~D
@
1
2
C777
0.1U_0402_10V7K~D
C777
0.1U_0402_10V7K~D
1
2
C103
0.1U_0402_10V7K~D
C103
0.1U_0402_10V7K~D
1
2
C1881
1U_0402_6.3V6K~D
@
C1881
1U_0402_6.3V6K~D
@
1
2
C763
4.7U_0603_6.3V6K~D
C763
4.7U_0603_6.3V6K~D
1
2
R650
0_0603_5%~D
R650
0_0603_5%~D
12
C611
1U_0402_6.3V6K~D
C611
1U_0402_6.3V6K~D
1
2
C1203
0.1U_0402_10V7K~D
C1203
0.1U_0402_10V7K~D
1
2
C335
1U_0603_10V6K~D
C335
1U_0603_10V6K~D
1
2
C217
0.1U_0402_10V7K~D
C217
0.1U_0402_10V7K~D
1
2
C108
1U_0402_6.3V6K~D
C108
1U_0402_6.3V6K~D
1
2
C1883
1U_0402_6.3V6K~D
@
C1883
1U_0402_6.3V6K~D
@
1
2
R500
0_0603_5%~D
R500
0_0603_5%~D
12
C97
0.1U_0402_10V7K~D
C97
0.1U_0402_10V7K~D
1
2
R313
100_0402_5%~D
R313
100_0402_5%~D
12
R557
0_0805_5%~D
R557
0_0805_5%~D
12
R573 0_0603_5%~DR573 0_0603_5%~D
12
R311
100_0402_5%~D
R311
100_0402_5%~D
12
C783
0.1U_0402_10V7K~D
C783
0.1U_0402_10V7K~D
1
2
C102
1U_0402_6.3V6K~D
C102
1U_0402_6.3V6K~D
1
2
C677
0.1U_0402_10V7K~D
C677
0.1U_0402_10V7K~D
1
2
C18
0.1U_0402_10V7K~D
C18
0.1U_0402_10V7K~D
1
2
C100
1U_0402_6.3V6K~D
C100
1U_0402_6.3V6K~D
1
2
C111
22U_0805_6.3V6M~D
@
C111
22U_0805_6.3V6M~D
@
1
2
C760
0.1U_0402_10V7K~D
C760
0.1U_0402_10V7K~D
1
2
C138
1U_0402_6.3V6K~D
C138
1U_0402_6.3V6K~D
1
2
C99
0.1U_0402_10V7K~D
C99
0.1U_0402_10V7K~D
1
2
R674
0_0805_5%~D
R674
0_0805_5%~D
1 2
C139
1U_0402_6.3V6K~D
C139
1U_0402_6.3V6K~D
1
2
C116
22U_0805_6.3V6M~D
C116
22U_0805_6.3V6M~D
1
2
C96
1U_0402_6.3V6K~D
C96
1U_0402_6.3V6K~D
1
2
R690
0_0805_5%~D
R690
0_0805_5%~D
1 2
C672
1U_0402_6.3V6K~D
C672
1U_0402_6.3V6K~D
1
2
R591 0_0603_5%~DR591 0_0603_5%~D
12
R517
0_0805_5%~D
R517
0_0805_5%~D
12
R559 0_0603_5%~DR559 0_0603_5%~D
12
G
D
S
Q10
SSM3K7002FU_SC70-3~D
G
D
S
Q10
SSM3K7002FU_SC70-3~D
2
1 3
R692
0_0603_5%~D
R692
0_0603_5%~D
1 2
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
PCI/GPIO/LPC
RTC PCI/GPIO/LPC
V1.5
U73J
BD82QM57-SLGZQ-B3_FCBGA1071~D
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
PCI/GPIO/LPC
RTC PCI/GPIO/LPC
V1.5
U73J
BD82QM57-SLGZQ-B3_FCBGA1071~D
DCPSUSBYP
Y20
VCCME[1]
AD38
VCCME[2]
AD39
VCCME[3]
AD41
VCCME[5]
AF41
VCCME[6]
AF42
VCCSUSHDA L30
VCCSUS3_3[28] U23
VCCIO[56] V23
VCCIO[13] AD19
VCCIO[14] AF20
VCCIO[15] AF19
VCCME[7]
V39
VCCME[8]
V41
VCCME[9]
V42
VCCME[10]
Y39
VCCME[11]
Y41
VCCME[12]
Y42
V5REF K49
VCC3_3[8] J38
VCC3_3[9] L38
VCC3_3[10] M36
VCC3_3[11] N36
VCC3_3[12] P36
VCC3_3[13] U35
VCCRTC
A12
VCCSUS3_3[27] A26
VCCSUS3_3[26] A28
VCCSUS3_3[25] B27
VCCSUS3_3[24] C26
VCCSUS3_3[23] C28
VCCSUS3_3[22] E26
VCCSUS3_3[21] E28
VCCSUS3_3[20] F26
VCCSUS3_3[19] F28
VCCSUS3_3[18] G26
VCCSUS3_3[17] G28
VCCSUS3_3[16] H26
VCCSUS3_3[15] H28
VCCSUS3_3[14] J26
VCCSUS3_3[13] J28
VCCSUS3_3[12] L26
VCCSUS3_3[11] L28
VCCSUS3_3[10] M26
VCCSUS3_3[9] M28
VCCSUS3_3[8] N26
VCCSUS3_3[7] N28
VCCSUS3_3[6] P26
VCCSUS3_3[5] P28
VCCSUS3_3[4] U24
VCCSUS3_3[3] U26
VCCSUS3_3[2] U28
VCCSUS3_3[1] V28
VCCIO[11] AD20
VCCIO[20] AD22
VCCIO[10] AH19
VCCADPLLA[2]
BB53
VCCADPLLB[1]
BD51
VCCIO[22]
AJ35
V5REF_SUS F24
VCCIO[16] AH20
VCCIO[17] AB19
VCCIO[18] AB20
VCCIO[19] AB22
VCCIO[12] AF22
VCC3_3[14] AD13
VCCIO[9] AH22
VCCVRM[4] AT20
DCPSUS
Y22
VCCIO[2]
AF34
VCCIO[3]
AH34
VCCLAN[1]
AF23
VCCLAN[2]
AF24
VCCADPLLA[1]
BB51
VCCADPLLB[2]
BD53
VCCVRM[3]
AU24
VCCACLK[1]
AP51
VCCACLK[2]
AP53
DCPRTC
V9
VCCIO[4]
AF32
VCCME[4]
AF43
VCCIO[23]
AH35
VCCIO[21]
AH23
DCPSST
V12 VCCSATAPLL[2] AK1
VCCSATAPLL[1] AK3
VCCME[13] AA34
VCCME[14] Y34
VCCME[15] Y35
VCCME[16] AA35
VCC3_3[5]
V15
VCC3_3[6]
V16
VCC3_3[7]
Y16
VCCSUS3_3[29]
P18
VCCSUS3_3[30]
U19
VCCSUS3_3[31]
U20
VCCSUS3_3[32]
U22
VCCIO[5] V24
VCCIO[6] V26
VCCIO[7] Y24
VCCIO[8] Y26
V_CPU_IO[1]
AT18
V_CPU_IO[2]
AU18
R57
20K_0402_5%~D
R57
20K_0402_5%~D
12
C101
1U_0402_6.3V6K~D
C101
1U_0402_6.3V6K~D
1
2
C117
22U_0805_6.3V6M~D
C117
22U_0805_6.3V6M~D
1
2
R691
0_0805_5%~D
R691
0_0805_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (8/8)
22 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (8/8)
22 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCH (8/8)
22 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
V1.5
U73H
BD82QM57-SLGZQ-B3_FCBGA1071~D
V1.5
U73H
BD82QM57-SLGZQ-B3_FCBGA1071~D
VSS[1]
AA19
VSS[2]
AA20
VSS[3]
AA22
VSS[5]
AA24
VSS[6]
AA26
VSS[7]
AA28
VSS[8]
AA30
VSS[9]
AA31
VSS[10]
AA32
VSS[11]
AB11
VSS[12]
AB15
VSS[13]
AB23
VSS[14]
AB30
VSS[15]
AB31
VSS[16]
AB32
VSS[17]
AB39
VSS[18]
AB43
VSS[19]
AB47
VSS[20]
AB5
VSS[21]
AB8
VSS[22]
AC2
VSS[23]
AC52
VSS[24]
AD11
VSS[25]
AD12
VSS[26]
AD16
VSS[27]
AD23
VSS[28]
AD30
VSS[29]
AD31
VSS[30]
AD32
VSS[31]
AD34
VSS[33]
AD42
VSS[34]
AD46
VSS[35]
AD49
VSS[36]
AD7
VSS[37]
AE2
VSS[38]
AE4
VSS[39]
AF12
VSS[43]
AF35
VSS[44]
AP13
VSS[46]
AF45
VSS[47]
AF46
VSS[48]
AF49
VSS[49]
AF5
VSS[50]
AF8
VSS[51]
AG2
VSS[52]
AG52
VSS[53]
AH11
VSS[54]
AH15
VSS[55]
AH16
VSS[56]
AH24
VSS[57]
AH32
VSS[59]
AH43
VSS[60]
AH47
VSS[61]
AH7
VSS[62]
AJ19
VSS[63]
AJ2
VSS[64]
AJ20
VSS[65]
AJ22
VSS[66]
AJ23
VSS[67]
AJ26
VSS[68]
AJ28
VSS[69]
AJ32
VSS[70]
AJ34
VSS[71]
AT5
VSS[72]
AJ4
VSS[73]
AK12
VSS[76]
AK26
VSS[77]
AK22
VSS[78]
AK23
VSS[79]
AK28
VSS[80] AK30
VSS[81] AK31
VSS[82] AK32
VSS[83] AK34
VSS[84] AK35
VSS[85] AK38
VSS[86] AK43
VSS[87] AK46
VSS[88] AK49
VSS[89] AK5
VSS[90] AK8
VSS[91] AL2
VSS[92] AL52
VSS[93] AM11
VSS[96] AM20
VSS[97] AM22
VSS[98] AM24
VSS[99] AM26
VSS[100] AM28
VSS[102] AM30
VSS[103] AM31
VSS[104] AM32
VSS[105] AM34
VSS[106] AM35
VSS[107] AM38
VSS[108] AM39
VSS[109] AM42
VSS[110] AU20
VSS[111] AM46
VSS[112] AV22
VSS[113] AM49
VSS[114] AM7
VSS[116] BB10
VSS[117] AN32
VSS[118] AN50
VSS[119] AN52
VSS[120] AP12
VSS[121] AP42
VSS[122] AP46
VSS[123] AP49
VSS[124] AP5
VSS[125] AP8
VSS[126] AR2
VSS[127] AR52
VSS[128] AT11
VSS[131] AT32
VSS[132] AT36
VSS[133] AT41
VSS[134] AT47
VSS[135] AT7
VSS[136] AV12
VSS[137] AV16
VSS[138] AV20
VSS[139] AV24
VSS[140] AV30
VSS[141] AV34
VSS[142] AV38
VSS[143] AV42
VSS[144] AV46
VSS[145] AV49
VSS[146] AV5
VSS[147] AV8
VSS[148] AW14
VSS[149] AW18
VSS[150] AW2
VSS[151] BF9
VSS[152] AW32
VSS[153] AW36
VSS[154] AW40
VSS[155] AW52
VSS[156] AY11
VSS[157] AY43
VSS[158] AY47
VSS[40]
Y13
VSS[42]
AU4
VSS[45]
AN34
VSS[115] AA50
VSS[0]
AB16
VSS[58]
AV18
VSS[32]
AU22
VSS[4]
AM19
VSS[74]
AM41
VSS[75]
AN19
VSS[41]
AH49
VSS[129] BA12
VSS[130] AH48
VSS[101] BA42
VSS[95] AD24
VSS[94] BB44
V1.5
U73I
BD82QM57-SLGZQ-B3_FCBGA1071~D
V1.5
U73I
BD82QM57-SLGZQ-B3_FCBGA1071~D
VSS[159]
AY7
VSS[160]
B11
VSS[161]
B15
VSS[162]
B19
VSS[163]
B23
VSS[164]
B31
VSS[165]
B35
VSS[166]
B39
VSS[167]
B43
VSS[168]
B47
VSS[169]
B7
VSS[170]
BG12
VSS[171]
BB12
VSS[172]
BB16
VSS[173]
BB20
VSS[174]
BB24
VSS[175]
BB30
VSS[176]
BB34
VSS[177]
BB38
VSS[178]
BB42
VSS[179]
BB49
VSS[180]
BB5
VSS[181]
BC10
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC32
VSS[187]
BC36
VSS[188]
BC40
VSS[189]
BC44
VSS[190]
BC52
VSS[191]
BH9
VSS[192]
BD48
VSS[193]
BD49
VSS[194]
BD5
VSS[195]
BE12
VSS[196]
BE16
VSS[197]
BE20
VSS[198]
BE24
VSS[199]
BE30
VSS[200]
BE34
VSS[201]
BE38
VSS[202]
BE42
VSS[203]
BE46
VSS[204]
BE48
VSS[205]
BE50
VSS[206]
BE6
VSS[207]
BE8
VSS[208]
BF3
VSS[209]
BF49
VSS[210]
BF51
VSS[211]
BG18
VSS[212]
BG24
VSS[213]
BG4
VSS[214]
BG50
VSS[215]
BH11
VSS[216]
BH15
VSS[217]
BH19
VSS[218]
BH23
VSS[219]
BH31
VSS[220]
BH35
VSS[221]
BH39
VSS[222]
BH43
VSS[223]
BH47
VSS[224]
BH7
VSS[225]
C12
VSS[226]
C50
VSS[227]
D51
VSS[228]
E12
VSS[229]
E16
VSS[230]
E20
VSS[231]
E24
VSS[232]
E30
VSS[233]
E34
VSS[234]
E38
VSS[235]
E42
VSS[236]
E46
VSS[237]
E48
VSS[264] K47
VSS[265] K7
VSS[266] L14
VSS[267] L18
VSS[268] L2
VSS[269] L22
VSS[270] L32
VSS[271] L36
VSS[272] L40
VSS[273] L52
VSS[274] M12
VSS[275] M16
VSS[276] M20
VSS[277] N38
VSS[278] M34
VSS[279] M38
VSS[280] M42
VSS[281] M46
VSS[282] M49
VSS[283] M5
VSS[284] M8
VSS[285] N24
VSS[286] P11
VSS[288] P22
VSS[289] P30
VSS[290] P32
VSS[291] P34
VSS[292] P42
VSS[293] P45
VSS[294] P47
VSS[295] R2
VSS[296] R52
VSS[297] T12
VSS[298] T41
VSS[299] T46
VSS[300] T49
VSS[301] T5
VSS[302] T8
VSS[303] U30
VSS[304] U31
VSS[305] U32
VSS[306] U34
VSS[307] P38
VSS[308] V11
VSS[309] P16
VSS[310] V19
VSS[311] V20
VSS[312] V22
VSS[313] V30
VSS[314] V31
VSS[315] V32
VSS[316] V34
VSS[238]
E6
VSS[239]
E8
VSS[240]
F49
VSS[241]
F5
VSS[242]
G10
VSS[243]
G14
VSS[244]
G18
VSS[245]
G2
VSS[246]
G22
VSS[247]
G32
VSS[248]
G36
VSS[249]
G40
VSS[250]
G44
VSS[251]
G52
VSS[317] V35
VSS[318] V38
VSS[319] V43
VSS[320] V45
VSS[321] V46
VSS[322] V47
VSS[323] V49
VSS[324] V5
VSS[325] V7
VSS[326] V8
VSS[327] W2
VSS[328] W52
VSS[329] Y11
VSS[330] Y12
VSS[331] Y15
VSS[332] Y19
VSS[333] Y23
VSS[334] Y28
VSS[335] Y30
VSS[336] Y31
VSS[337] Y32
VSS[338] Y38
VSS[339] Y43
VSS[340] Y46
VSS[342] Y5
VSS[343] Y6
VSS[344] Y8
VSS[341] P49
VSS[345] P24
VSS[287] AD15
VSS[252]
AF39
VSS[253]
H16
VSS[254]
H20
VSS[255]
H30
VSS[256]
H34
VSS[257]
H38
VSS[258]
H42
VSS[346] T43
VSS[347] AD51
VSS[348] AT8
VSS[349] AD47
VSS[350] Y47
VSS[351] AT12
VSS[352] AM6
VSS[353] AT13
VSS[354] AM5
VSS[355] AK45
VSS[356] AK39
VSS[366] AV14
VSS[262] K11
VSS[263] K43
VSS[259] H49
VSS[260] H5
VSS[261] J24
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THERMATRIP1#
THERMATRIP2#
+VCC_4002
THERMATRIP1#
VSET
THERMATRIP3#
+FAN1_VOUT
REM_DIODE1_P
REM_DIODE1_N
LDO_SET
PWM
REM_DIODE3_N
REM_DIODE3_P
EC_32KHZ_OUT
FAN1_TACH_FB
BC_CLK_EMC4002
BC_DAT_EMC4002
POWER_SW#
POWER_SW#
THERMATRIP2#
THERM_B3
THERMATRIP3#
VGA_THERMDN
VGA_THERMDP
FAN1_TACH_FB
FAN_OK
PWM
MOT_COM_R
MOT_COM
PHASE_U
PHASE_V
PHASE_W
PHASE_W_R
PHASE_V_R
PHASE_U_R
+FAN1_VOUT
FAN1_TACH_FB
FAN1_DET#
+FAN1_VOUT
FAN1_TACH_FB
FAN1_DET#
PHASE_U
PHASE_V
PHASE_W
MOT_COM
FAN_OK
REM_DIODE2_N
REM_DIODE2_P
VGA_THERMDN
VGA_THERMDP
FAN1_DET#
+3.3V_M
+3.3V_M
+1.05V_1.1V_RUN_VTT
+RTC_CELL
+3.3V_M
+3.3V_M
+RTC_CELL
+3.3V_M
+5V_RUN
+3.3V_RUN
+RTC_CELL
+3.3V_M
+VCC_4002
+3.3V_M
+3.3V_RUN
+5V_RUN +5V_RUN
+5V_RUN
+5V_RUN
+3.3V_RUN
+3.3V_M
+3.3V_M
H_THERMTRIP#8
THERM_STP# 45
ACAV_IN 40,51,52
PCH_PWRGD#40
EC_32KHZ_OUT40
BC_INT#_EMC4002 40
BC_DAT_EMC400240
BC_CLK_EMC400240
DOCK_PWR_SW# 40
POWER_SW_IN# 40
MAX8731_IINP 51
IMVP_IMON 11,50
THERMTRIP_VGA#53
PM_EXTTS# 8
VGA_THERMDN 54
VGA_THERMDP 54
DAI_GPU_R3P_SMBCLK29,40,53
DAI_GPU_R3P_SMBDAT29,40,53
GPU_IMON 62
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
FAN & Thermal Sensor
23 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
FAN & Thermal Sensor
23 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
FAN & Thermal Sensor
23 69Thursday, January 21, 2010
Compal Electronics, Inc.
Q9 Place near DIMM
Place C227 close
to Q9
Place under CPU
Place C223 close to the Q8 as possible
Place C224, close to the Guardian pins as possible
Pull-up Resistor
on ADDR_MODE/XEN
<= 4.7K +/- 5% 2F(r/w)
10K 2E(r/w)
For Remote1
mode
2N3904
2N3904
18K
>= 33K
Thermistor
Thermistor
2F(r/w)
2E(r/w)
SMBUS
Address
Rset=953,Tp=88degree
*
Place Capacitor close to Guardian Chip
Discrete
Close to U140 pin 11 Close to U140 pin 17
Place C221 close to the
Guardian pins as possible.
Diode circuit at DP2/DN2 is used
for skin temp sensor (placed
optimally
between CPU, MCH and MEM).
Place C222 close to Q7 as
possible.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
D2
RB751S40T1_SOD523-2~D
D2
RB751S40T1_SOD523-2~D
2 1
C406
0.01U_0402_16V7K~D
@
C406
0.01U_0402_16V7K~D
@
1
2
C235
10U_0805_10V4Z~D
C235
10U_0805_10V4Z~D
1
2
C224
2200P_0402_50V7K~D
C224
2200P_0402_50V7K~D
1
2
R1401
8.2K_0402_5%~D
R1401
8.2K_0402_5%~D
12
R138
27K_0402_5%~D
@
R138
27K_0402_5%~D
@
12
C236
0.1U_0402_16V4Z~D
C236
0.1U_0402_16V4Z~D
1
2
R519 0_0402_5%~DR519 0_0402_5%~D
1 2
R146 10K_0402_5%~DR146 10K_0402_5%~D
1 2
C237
10U_0805_10V4Z~D
C237
10U_0805_10V4Z~D
1
2
C1050
0.1U_0402_16V4Z~D
C1050
0.1U_0402_16V4Z~D
1 2
C229
0.1U_0402_16V4Z~D
C229
0.1U_0402_16V4Z~D
1
2
C434 1U_0402_6.3V6K~D@C434 1U_0402_6.3V6K~D@1 2
R211 10K_0402_5%~DR211 10K_0402_5%~D
12
C230
1U_0402_6.3V6K~D
C230
1U_0402_6.3V6K~D
1
2
U3
EMC4002-HZH C_QFN48_7X7~D
U3
EMC4002-HZH C_QFN48_7X7~D
DP3/DN7
41
DN3/DP7
40
VCP1 48
ACAVAIL_CLR 27
VDDH1
5
FAN_OUT1
7
SMDATA/BC-LINK_DATA
10
SMCLK/BC-LINK_CLK
11
VSS
49
TACH2/GPIO4 16
VDD
4
3V_PWROK#
17
THERMTRIP1#
22
THERMTRIP2#
23
THERMTRIP3#
24
ATF_INT#/BC-LINK_IRQ# 12
RTC_PWR3V
21
VIN1 39
VDD_PWRGD
18 SYS_SHDN# 25
LDO_SHDN# 19
LDO_SET 33
LDO_OUT/FAN_OUT2 29
VDDH2 31
LDO_OUT/FAN_OUT2 30
VDDH2 32
ADDR_MODE/XEN
3
THERMTRIP_SIO/PWM1/GPIO5 20
LDO_POK 34
VDDL2 28
TACH1/GPIO3
15
DN2
37 DP2
38
DN1/THERM
35 DP1/VREF_T
36
POWER_SW# 26
VSET
42
VCP2 45
VDDH1
6
VDDL1
9
DN4/DP8 43
DP4/DN8 44
DN5/DP9 46
DP5/DN9 47
DP6/VREF_T2 1
FAN_OUT1
8
DN6/VIN2 2
PWM2/GPIO1 13
CLK_IN/GPIO2
14
E
B
C
Q9
MMBT3904WT1G_SC70-3~D
E
B
C
Q9
MMBT3904WT1G_SC70-3~D
2
3 1
R516 0_0805_5%~DR516 0_0805_5%~D
1 2
R145 10K_0402_5%~DR145 10K_0402_5%~D
12
R136
10K_0402_5%~D
@R136
10K_0402_5%~D
@
12
R141 10K_0402_5%~DR141 10K_0402_5%~D
12
R1457
0_0402_5%~D
@
R1457
0_0402_5%~D
@
12
R535 0_0805_5%~D@R535 0_0805_5%~D@1 2
R531 0_0805_5%~D@R531 0_0805_5%~D@1 2 JFAN1
MOLEX_53398-0471~D
JFAN1
MOLEX_53398-0471~D
1
1
2
2
3
3
4
4G1 5
G2 6
C231
0.1U_0402_16V4Z~D
C231
0.1U_0402_16V4Z~D
1
2
R1498 10K_0402_5%~DR1498 10K_0402_5%~D
12
E
B
C
Q188
PMST3904_SOT323-3~D
E
B
C
Q188
PMST3904_SOT323-3~D
2
3 1
R134
8.2K_0402_5%~D
R134
8.2K_0402_5%~D
12
R594 0_0402_5%~D@R594 0_0402_5%~D@1 2
C1706
470P_0402_50V7K~D
C1706
470P_0402_50V7K~D
1
2
R156
10K_0402_5%~D
@R156
10K_0402_5%~D
@
12
C219
22U_0805_6.3VAM~D
C219
22U_0805_6.3VAM~D
1
2
R137
8.2K_0402_5%~D
R137
8.2K_0402_5%~D
12
C218
0.1U_0402_16V4Z~D
C218
0.1U_0402_16V4Z~D
1
2
C228
2200P_0402_50V7K~D
C228
2200P_0402_50V7K~D
1
2
R151
953_0402_1%~D
R151
953_0402_1%~D
12
C240
0.1U_0402_16V4Z~D
C240
0.1U_0402_16V4Z~D
1
2
R148 1K_0402_5%~DR148 1K_0402_5%~D
1 2
R529 0_0805_5%~DR529 0_0805_5%~D
1 2
R1462
15K_0402_5%~D
@
R1462
15K_0402_5%~D
@
12
R147 47K_0402_1%~D@R147 47K_0402_1%~D@
1 2
C222
100P_0402_50V8K~D
@C222
100P_0402_50V8K~D
@
1
2
R1463 0.27_1210_1%~D@R1463 0.27_1210_1%~D@1 2
R1458
15K_0402_5%~D
@
R1458
15K_0402_5%~D
@
12
U68
TC7SH08FU_SSOP5~D
U68
TC7SH08FU_SSOP5~D B1
A2
G
3
O
4
P5
C220
0.1U_0402_16V4Z~D
C220
0.1U_0402_16V4Z~D
1
2
R507 0_0402_5%~DR507 0_0402_5%~D
1 2
U140
TPF3000-BP-TR_QFN20_4X4~D
@U140
TPF3000-BP-TR_QFN20_4X4~D
@
TACH 1
FAN_OKAY 2
PARAM_SEL2
3
PARAM_SEL3
4
PARAM_SEL4
5
N/C 6
C_FILT 7
GND 8
I_RET 9
MOT_COM
10
VDD
11
PHASE_W 12
PHASE_V 13
PHASE_U 14
GND 15
PARAM_SEL1
16
VDD
17
SMCLK
18
SMDATA
19
PWM
20 GND 21
C72
4.7U_0603_10V6K~D
@
C72
4.7U_0603_10V6K~D
@
1
2
R154
1K_0402_5%~D
R154
1K_0402_5%~D
12
R1218 22_0402_5%~DR1218 22_0402_5%~D
1 2
E
B
C
Q7
MMBT3904WT1G_SC70-3~D
E
B
C
Q7
MMBT3904WT1G_SC70-3~D
2
3 1
R135
2.2K_0402_5%~D
R135
2.2K_0402_5%~D
1 2
C234
0.1U_0402_16V4Z~D
C234
0.1U_0402_16V4Z~D
1
2
R998
4.7K_0402_5%~D
R998
4.7K_0402_5%~D
1 2
R536
0_0805_5%~D
@R536
0_0805_5%~D
@
1 2
R142
10K_0402_5%~D
R142
10K_0402_5%~D
12
R155
8.2K_0402_5%~D
R155
8.2K_0402_5%~D
12
E
B
C
Q5
PMST3904_SOT323-3~D
E
B
C
Q5
PMST3904_SOT323-3~D
2
3 1
C391
0.01U_0402_16V7K~D
@
C391
0.01U_0402_16V7K~D
@
1
2
R150 4.7K_0402_5%~DR150 4.7K_0402_5%~D
12
R1408
0_0402_5%~D
R1408
0_0402_5%~D
12
C227
100P_0402_50V8K~D
@C227
100P_0402_50V8K~D
@
1
2
E
B
C
Q8
MMBT3904WT1G_SC70-3~D
E
B
C
Q8
MMBT3904WT1G_SC70-3~D
2
3 1
C73
4.7U_0603_10V6K~D
@
C73
4.7U_0603_10V6K~D
@
1
2
C221
2200P_0402_50V7K~D
C221
2200P_0402_50V7K~D
1
2
C223
100P_0402_50V8K~D
@C223
100P_0402_50V8K~D
@
1
2
R1402
2.2K_0402_5%~D
R1402
2.2K_0402_5%~D
12
R534 0_0805_5%~D@R534 0_0805_5%~D@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CCD_OFF
EN_LCDPWR
USBP11_D+
USBP11_D+
USBP11_D-
PWR_SRC_ON
EN_INVPWR
DPD_GPU_EDP_HPD
+CAMERA_VDD_R
USBP11+
LVDS_CBL_DET#
MB_EDP_AUX
MB_EDP_AUX#
DPD_GPU_EDP_HPD
LCD_TST
EDP_LANE_N1
EDP_LANE_P1
EDP_LANE_N0
EDP_LANE_P0
USBP11-
BATT_YELLOW_LED
BATT_BLUE_LED
BREATH_BLUE_LED
USBP11_D-
DPD_EDP_LANE_N0_RP
DPD_EDP_LANE_P0_RPEDP_LANE_P0
EDP_LANE_N0
DPD_EDP_LANE_P1_RP
DPD_EDP_LANE_N1_RP
EDP_LANE_P1
EDP_LANE_N1
LCD_SMBCLK
LCD_SMBDAT
DPD_EDP_LANE_P0_C
DPD_EDP_LANE_N0_C
DPD_EDP_LANE_P1_C
DPD_EDP_LANE_N1_C
DMIC0
USBP11_D+
USBP11_D-
DMIC_CLK
LCD_SMBDAT
LCD_SMBCLK
ALS_INT#
CAM_MIC_CBL_DET#
PRECTL
VOD_CTL
DP119_EN
EQ_CTL
EQ_CTL
EQ_CTL
DP119_EN
PRECTL
PRECTL
VOD_CTL
DP119_EN
VOD_CTL
VOD_CTL0
VOD_CTL0
VOD_CTL0
PDN5K
PUP5K
PUP5K
PDN5K
+3.3V_RUN
+15V_ALW
+15V_ALW
+15V_ALW +3.3V_ALW
+LCDVDD
+LCDVDD
+PWR_SRC
+BL_PWR_SRC
+LCDVDD
+CAMERA_VDD
+3.3V_RUN
+CAMERA_VDD
+LCDVDD
+3.3V_RUN
+LCDVDD
+3.3V_RUN
+CAMERA_VDD
+3.3V_RUN
+BL_PWR_SRC
+3.3V_RUN
CCD_OFF39
EN_INVPWR40
USBP11+18
USBP11-18
LVDS_CBL_DET# 18
LCD_TST 39
BATT_YELLOW_LED 43
BREATH_BLUE_LED 43
BATT_BLUE_LED 43
LCD_VCC_TEST_EN39
ENVDD_GPU39,53
DPD_GPU_EDP_AUX 54
DPD_GPU_EDP_AUX# 54
DPD_GPU_LANE_N054
DPD_GPU_LANE_P054
DPD_GPU_EDP_HPD 53
DPD_GPU_LANE_N154
DPD_GPU_LANE_P154
DMIC_CLK 29
DMIC0 29
LCD_SMBCLK 40
LCD_SMBDAT 40
ALS_INT# 39
BIA_PWM_GPU 53
CAM_MIC_CBL_DET# 18
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
eDP & CAM Conn
24 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
eDP & CAM Conn
24 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
eDP & CAM Conn
24 69Thursday, January 21, 2010
Compal Electronics, Inc.
For Webcam
Webcam PWR CTRL
Panel backlight power control by EC
Close to JEDP1.18,19
LCD Power
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
FDC654P: P CHANNAL
40mil
40mil
eDP Repeater
VCC/2
1
VCC/2
VCC/2
OUT1 OUT2 EN
OUT2 DIS
PWR Down 0
VCC/2
1
VCC/2
Refer to SN75DP119RHHR rev. 0P35
1
1
VCC/2
MODE
0
0
0
VOD (mV)
300 0
EQ gain (dB)
PRE (dB)
2.5
63
6
8.5
600
400
0
2
1
VOD_CTL
DP119_EN
EQ_CTL
*
PRECTL
0
VCC/2
1
0
0
0
3.5
5.5
10800 *
0
VCC/2
1
*
X1EDP & DP119 co-lay circuit: (Defult DP119)
X1EDP->R356,R1031,R336,R279,R1029==>POP
R328,R338==>De-POP
DP119->R356,R1031,R336,R279,R1029==>De-POP
R328,R338==>POP
R360 20K_0402_5%~D@R360 20K_0402_5%~D@1 2
R166
0_0402_5%~D
@R166
0_0402_5%~D
@1 2
C358 0.1U_0402_10V7K~DC358 0.1U_0402_10V7K~D
12
C196
0.1U_0402_16V4Z~D
C196
0.1U_0402_16V4Z~D
1
2
C1043
0.1U_0402_16V4Z~D
C1043
0.1U_0402_16V4Z~D
1
2
R356 4.99K_0402_1%~D@R356 4.99K_0402_1%~D@1 2
Q15
PDTC124EU_SC70-3~D
Q15
PDTC124EU_SC70-3~D
2
13
C247
0.1U_0603_50V4Z~D
C247
0.1U_0603_50V4Z~D
1
2
R548 2.2K_0402_5%~DR548 2.2K_0402_5%~D
12
C295 0.1U_0402_10V7K~DC295 0.1U_0402_10V7K~D
1 2
C244
0.1U_0402_16V4Z~D
C244
0.1U_0402_16V4Z~D
1
2
R549 2.2K_0402_5%~DR549 2.2K_0402_5%~D
12
G
D
S
Q132
PMV45EN_SOT23-3~D
G
D
S
Q132
PMV45EN_SOT23-3~D
2
13
R1028 100K_0402_5%~DR1028 100K_0402_5%~D
1 2
C200
0.1U_0402_16V4Z~D
C200
0.1U_0402_16V4Z~D
1
2
C351 0.1U_0402_10V7K~DC351 0.1U_0402_10V7K~D
1 2
R336 20K_0402_5%~D@R336 20K_0402_5%~D@1 2
D3
BAT54CW_SOT323-3~D
D3
BAT54CW_SOT323-3~D
1
2
3
C248
1000P_0402_50V7K~D
C248
1000P_0402_50V7K~D
1
2
R667 1K_0402_5%~DR667 1K_0402_5%~D
1 2
C241
0.1U_0402_16V4Z~D
C241
0.1U_0402_16V4Z~D
1
2
R361 20K_0402_5%~DR361 20K_0402_5%~D
1 2
C359 0.1U_0402_10V7K~DC359 0.1U_0402_10V7K~D
12
C314 0.1U_0402_10V7K~DC314 0.1U_0402_10V7K~D
1 2
R997
0_0603_5%~D
R997
0_0603_5%~D
12
R161
130_0402_5%~D
R161
130_0402_5%~D
12
R180 0_0402_5%~DR180 0_0402_5%~D
12
R1027 20K_0402_5%~D@R1027 20K_0402_5%~D@1 2
R328 20K_0402_5%~DR328 20K_0402_5%~D
1 2
R181 0_0402_5%~D@R181 0_0402_5%~D@
12
C249
0.1U_0402_16V4Z~D
C249
0.1U_0402_16V4Z~D
1
2
R165
10K_0402_5%~D
R165
10K_0402_5%~D
12
R1031 4.99K_0402_1%~D@R1031 4.99K_0402_1%~D@1 2
G
D
S
Q18
SSM3K7002FU_SC70-3~D
G
D
S
Q18
SSM3K7002FU_SC70-3~D
2
1 3
Q13B
DMN66D0LDW-7_SOT363-6~D
Q13B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R1029 20K_0402_5%~D@R1029 20K_0402_5%~D@1 2
C246 0.1U_0603_50V4Z~DC246 0.1U_0603_50V4Z~D
1 2
S
G
D
Q17
FDC654P_SSOT6~D
S
G
D
Q17
FDC654P_SSOT6~D
3
6
2
4 5
1
R169
100K_0402_5%~D
R169
100K_0402_5%~D
12
C350 0.1U_0402_10V7K~DC350 0.1U_0402_10V7K~D
1 2
Q13A
DMN66D0LDW-7_SOT363-6~D
Q13A
DMN66D0LDW-7_SOT363-6~D
61
2
R279 20K_0402_5%~D@R279 20K_0402_5%~D@1 2
U46
SN75DP119RHHR_QFN36_6X6~D
U46
SN75DP119RHHR_QFN36_6X6~D
VCC 4
IN 1(p)
5
IN 1(n)
6
NC 8
NC 9
IN 0(p)
2
IN 0(n)
3
NC 16
VCC 24
NC 28
NC 36
GND
32
NC 27
GND
21
NC 13
GND
7GND
1
EN
14
EQ_CTL
15
PRECTL
33 VOD_CTL
31
NC 30
NC 29
OUT 0(p)
26
OUT 0(n)
25
OUT1 (p)
23
OUT1 (n)
22 NC 12
NC 11
NC 17
NC 34
NC 35
NC 10
NC 20
NC 19
Thermal Pad(GND)
37
NC 18
R1030 20K_0402_5%~D@R1030 20K_0402_5%~D@1 2
R162
100K_0402_5%~D
R162
100K_0402_5%~D
12
S
G
D
Q12
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q12
SI3456BDV-T1-E3_TSOP6~D
3
6
2
4 5
1
C1044
0.1U_0402_25V4Z~D
C1044
0.1U_0402_25V4Z~D
1
2
R167
100K_0402_5%~D
R167
100K_0402_5%~D
12
C271 0.1U_0402_10V7K~DC271 0.1U_0402_10V7K~D
12
R168 47K_0402_5%~DR168 47K_0402_5%~D
1 2
L59
DLW21SN121SQ2L_4P~D
@L59
DLW21SN121SQ2L_4P~D
@
1
1
4
433
22
C242
0.1U_0402_25V4Z~D
C242
0.1U_0402_25V4Z~D
1
2
R457 0_0402_5%~DR457 0_0402_5%~D
1 2
R158
100K_0402_5%~D
R158
100K_0402_5%~D
12
U50
PRTR5V0U2X_SOT143-4~D
@U50
PRTR5V0U2X_SOT143-4~D
@
GND
1
IO1
2
VCC 4
IO2 3
C266 0.1U_0402_10V7K~DC266 0.1U_0402_10V7K~D
1 2
R513 0_0402_5%~DR513 0_0402_5%~D
1 2
R357 20K_0402_5%~DR357 20K_0402_5%~D
1 2
G
D
S
Q133
SSM3K7002FU_SC70-3~D
G
D
S
Q133
SSM3K7002FU_SC70-3~D
2
13
R338 20K_0402_5%~DR338 20K_0402_5%~D
1 2
JEDP1
I-PEX_20505-044E-011G
JEDP1
I-PEX_20505-044E-011G
MIC_DAT 7
ALS_VCC 16
GND 14
PWR_LED 5
BATT1_LED 3
CONNTST 1
BL_PWR 23
BL_PWR 25
SMBUS_CLK 18
CAM_MIC_CBL_DET# 13
BL_GND 26
BL_GND 27
GND 29
LCD_VCC 31
LCD_VCC 33
AUX_CH_N 35
LANE1_N 42
LANE0_N 39
LANE1_P 41
GND 37
GND 6
ALS_INT# 15
USB+ 12
BATT2_LED 4
GND 2
BL_PWR 22
BL_PWR 24
SMBUS_DATA 17
BL_PWM 19
BL_GND 20
BL_GND 21
HPD 28
TEST 30
LCD_VCC 32
GND 34
AUX_CH_P 36
GND 43
GND 40
LANE0_P 38
CONNTST 44
MGND1
45
MGND2
46
MGND3
47
MGND4
48
MGND5
49
MGND6
50
MGND7
51
MGND8
52
MGND9
53
MGND10
54
MGND11
55
MGND12
56
MGND13
57
MIC_GND 8
USB_VCC 10
MIC_CLK 9
USB- 11
C225 0.1U_0402_10V7K~DC225 0.1U_0402_10V7K~D
12
C265 0.1U_0402_10V7K~DC265 0.1U_0402_10V7K~D
1 2
R995
0_0603_5%~D
@R995
0_0603_5%~D
@
1 2
D48
SD05.TCT_SOD323-2~D
@
D48
SD05.TCT_SOD323-2~D
@
2 1
D49
SD05.TCT_SOD323-2~D
@
D49
SD05.TCT_SOD323-2~D
@
2 1
C250
10U_1206_16V4Z~D
C250
10U_1206_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DPC_AUX_C
DPC_AUX#_C
DPC_DOCK_AUX
DPC_CA_DET#
DPC_CA_DET
DPC_CA_DET
DPC_DOCK_AUX#
+5V_RUN
+3.3V_RUN
DPC_DOCK_AUX#38
DPC_DOCK_AUX38
DPC_CA_DET38
DPC_GPU_AUX/DDC 54
DPC_GPU_AUX#/DDC 54
DPC_GPU_AUX/DDC54
DPC_GPU_AUX#/DDC54
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DP SW
25 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DP SW
25 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DP SW
25 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
AUX/DDC SW for E-DOCK
U8
NC7SZ04P5X_NL_SC70-5~D
U8
NC7SZ04P5X_NL_SC70-5~D
A
2Y4
P5
NC 1
G
3
U86
PI3C3125LEX_TSSOP14~D
U86
PI3C3125LEX_TSSOP14~D
B3 11
B1
6
BE1
4
A1
5
A2 9
GND
7
A3 12
VCC 14
B2 8
BE3 13
A0
2
B0
3
BE0
1
BE2 10
C272
0.1U_0402_10V7K~D
C272
0.1U_0402_10V7K~D
12
R996 1M_0402_5%~DR996 1M_0402_5%~D
1 2
C277
0.1U_0402_16V4Z~D
C277
0.1U_0402_16V4Z~D
12
C337
0.1U_0402_16V4Z~D
C337
0.1U_0402_16V4Z~D
12
C274 0.1U_0402_10V7K~DC274 0.1U_0402_10V7K~D
12
2
2
1
1
B B
A A
DPB_MB_CA_DET
DPB_MB_HPD
DPB_MB_P14
DPB_MB_P14
DPB_MB_AUX
DPB_MB_AUX#
DPB_MB_HPD
DPB_MB_CA_DET
MBDP_LANE_P0
MBDP_LANE_N0
MBDP_LANE_N1
MBDP_LANE_P1
MBDP_LANE_P2
MBDP_LANE_N2
MBDP_LANE_P3
MBDP_LANE_N3
DPB_MB_AUX#
DPB_MB_AUX
DPB_LANE_P0_C
DPB_LANE_N0_C
DPB_LANE_P1_C
DPB_LANE_N1_C
DPB_LANE_P3_C
DPB_LANE_N3_C
DPB_LANE_P2_C
DPB_LANE_N2_C
DPB_MB_HPD
DP_PRIORITY
DPB_DOCK_HPD
DPB_AUX_C
DPB_AUX#_C
DPB_MB_CA_DET
DPB_DOCK_CA_DET
MBDP_LANE_P0
MBDP_LANE_N0
MBDP_LANE_N1
MBDP_LANE_P1
MBDP_LANE_P2
MBDP_LANE_N2
DPB_GPU_HPD
MBDP_LANE_P3
MBDP_LANE_N3
DPB_DOCK_P3
DPB_DOCK_N3
DPB_DOCK_P1
DPB_DOCK_P2
DPB_DOCK_N2
DPB_DOCK_N1
DPB_DOCK_P0
DPB_DOCK_AUX
DPB_DOCK_AUX#
DPB_DOCK_N0
DPB_MB_LANE_P3
DPB_MB_LANE_N2
DPB_MB_LANE_P2
DPB_MB_LANE_N3
DPB_MB_LANE_N1
DPB_MB_LANE_P0
DPB_MB_LANE_P1
DPB_MB_LANE_N0
DPB_MB_AUX
DPB_MB_AUX#
DPB_DOCK_CA_DET
DPB_AUX_C
DPB_AUX#_C
+VDISPLAY_VCC
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN +3.3V_RUN
+3.3V_RUN
DPB_DOCK_HPD38
DPB_DOCK_CA_DET38
DP_PRIORITY39
DPB_GPU_HPD 53
DPB_DOCK_LANE_P0 38
DPB_DOCK_LANE_N0 38
DPB_DOCK_LANE_P1 38
DPB_DOCK_LANE_N1 38
DPB_DOCK_LANE_P2 38
DPB_DOCK_LANE_N2 38
DPB_DOCK_LANE_P3 38
DPB_DOCK_LANE_N3 38
DPB_DOCK_AUX 38
DPB_DOCK_AUX# 38
DPB_GPU_AUX#/DDC54
DPB_GPU_AUX/DDC54
DPB_GPU_LANE_N054
DPB_GPU_LANE_N254
DPB_GPU_LANE_P054
DPB_GPU_LANE_P254
DPB_GPU_AUX/DDC54
DPB_GPU_AUX#/DDC54
DPB_GPU_LANE_P154
DPB_GPU_LANE_N154
DPB_GPU_LANE_P354
DPB_GPU_LANE_N354
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Display port
26 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Display port
26 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Display port
26 69Thursday, January 21, 2010
Compal Electronics, Inc.
Display port Dip Connector
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DPB SW for MB & DOCK
Place C1597,C1598 close
to U9 pin8 & pin9
T35 PAD~D@
T35 PAD~D@
C301 0.1U_0402_10V7K~DC301 0.1U_0402_10V7K~D
12
C287 0.1U_0402_10V7K~DC287 0.1U_0402_10V7K~D
12
C338 0.1U_0402_10V7K~DC338 0.1U_0402_10V7K~D
12
R1024 100K_0402_5%~DR1024 100K_0402_5%~D
1 2
R1495
4.7K_0402_5%~D
R1495
4.7K_0402_5%~D
12
C292 0.1U_0402_10V7K~DC292 0.1U_0402_10V7K~D
12
C280 0.1U_0402_10V7K~DC280 0.1U_0402_10V7K~D
12
R1010 1M_0402_5%~DR1010 1M_0402_5%~D
1 2
C279 0.1U_0402_10V7K~DC279 0.1U_0402_10V7K~D
12
C312 0.1U_0402_10V7K~DC312 0.1U_0402_10V7K~D
12
C90 0.1U_0402_10V7K~DC90 0.1U_0402_10V7K~D
12
C284 0.1U_0402_10V7K~DC284 0.1U_0402_10V7K~D
12
C289 0.1U_0402_10V7K~DC289 0.1U_0402_10V7K~D
12
C286 0.1U_0402_10V7K~DC286 0.1U_0402_10V7K~D
12
T34 PAD~D@
T34 PAD~D@
C288 0.1U_0402_10V7K~DC288 0.1U_0402_10V7K~D
12
T29PAD~D
@T29PAD~D
@
C1075
10U_0805_10V4Z~D
C1075
10U_0805_10V4Z~D
1
2
C283 0.1U_0402_10V7K~DC283 0.1U_0402_10V7K~D
12
T27PAD~D
@T27PAD~D
@
C1597 100P_0402_50V8J~DC1597 100P_0402_50V8J~D
1 2
R190
100K_0402_5%~D
R190
100K_0402_5%~D
1 2
C291 0.1U_0402_10V7K~DC291 0.1U_0402_10V7K~D
12
C275
0.1U_0402_10V7K~D
C275
0.1U_0402_10V7K~D
1
2
C104
0.1U_0402_10V7K~D
C104
0.1U_0402_10V7K~D
1
2
T38PAD~D
@T38PAD~D
@
C1598 100P_0402_50V8J~DC1598 100P_0402_50V8J~D
1 2
C293 0.1U_0402_10V7K~DC293 0.1U_0402_10V7K~D
12
C278 0.1U_0402_10V7K~DC278 0.1U_0402_10V7K~D
12
C107
0.1U_0402_10V7K~D
C107
0.1U_0402_10V7K~D
1
2
C290 0.1U_0402_10V7K~DC290 0.1U_0402_10V7K~D
12
R797 5.1M_0603_1%~DR797 5.1M_0603_1%~D
1 2
C322 0.1U_0402_10V7K~DC322 0.1U_0402_10V7K~D
12
U9
PI3VDP8200ZBEX_TQFN56_8X8~D
U9
PI3VDP8200ZBEX_TQFN56_8X8~D
OEB/SCL_CNTL
15
OUT2_4N 40
HPD1
17
SDA1 18
SCL1 19
CAD1
26
OUT1_4N 21
OUT2_3P 43
OUT2_3N 42
OUT1_3P 25
SCL2 38
Vbias 51
OUT1_3N 24
12C_CTL_EN
16
IN_P1
55
IN_N1
56
IN_P2
1
IN_N2
2
IN_P3
4
HPD_S 12
P1_OC1 13
CAD_S 28
OUT1_2N 29
SDA2 37
HPD2
36
AUXP_S
8
AUXN_S
9
OUT2_4P 41
OUT1_1N 32
P1_OC0 23
OUT1_4P 22
P2_OC1 50
EQ_S1/I2C_Address
34
CAD2
27
EQ_S0/SDA_CTL
14
OUT1_1P 33
OUT1_2P 30
HPDSEL
35
GPAD 57
IN_N4
7IN_P4
6
IN_N3
5
SCL_S
10 SDA_S
11
CEC1
52
VDD1
3
OUT2_1N 48
VDD3
31 VDD4
44
OUT2_2P 46
OUT2_1P 49
P2_OC0 47
OUT2_2N 45
VDD2
20
CEC2
53
CEC_S
54
GND 39
C281 0.1U_0402_10V7K~DC281 0.1U_0402_10V7K~D
12
C318 0.1U_0402_10V7K~DC318 0.1U_0402_10V7K~D
12
C91 0.1U_0402_10V7K~DC91 0.1U_0402_10V7K~D
12
T33 PAD~D@
T33 PAD~D@
C316 0.1U_0402_10V7K~DC316 0.1U_0402_10V7K~D
12
C92
0.1U_0402_10V7K~D
C92
0.1U_0402_10V7K~D
1
2
C98
0.1U_0402_10V7K~D
C98
0.1U_0402_10V7K~D
1
2
C315 0.1U_0402_10V7K~DC315 0.1U_0402_10V7K~D
12
C285 0.1U_0402_10V7K~DC285 0.1U_0402_10V7K~D
12
T25 PAD~D@
T25 PAD~D@
JDP1
MOLEX_105088-0001
JDP1
MOLEX_105088-0001
DP_PWR
20
RTN
19
HP_DET
18
AUX_CH-
17
GND
16
AUX_CH+
15
GND
14
CA_DET
13
LAN3-
12
LAN3_shield
11
LAN3+
10
LAN2-
9
LAN2_shield
8
LAN2+
7
LAN1-
6
LAN1_shield
5
LAN1+
4
LAN0-
3
LAN0_shield
2
LAN0+
1
GND 24
GND 23
GND 22
GND 21
R185 1M_0402_5%~DR185 1M_0402_5%~D
1 2
R186 100K_0402_5%~DR186 100K_0402_5%~D
1 2
T30PAD~D
@T30PAD~D
@
F1
1.5A_6V_1206L150PR~D
F1
1.5A_6V_1206L150PR~D
1 2
T39PAD~D
@T39PAD~D
@
R278 100K_0402_5%~DR278 100K_0402_5%~D
1 2
T37PAD~D
@T37PAD~D
@
C282 0.1U_0402_10V7K~DC282 0.1U_0402_10V7K~D
12
C309 0.1U_0402_10V7K~DC309 0.1U_0402_10V7K~D
12
R184
0_1206_5%~D
@
R184
0_1206_5%~D
@
1 2
T28PAD~D
@T28PAD~D
@
2
2
1
1
B B
A A
JVGA_HS
RED_CRT
GREEN_CRT
HSYNC_L2
VSYNC_CRTVSYNC_BUF
HSYNC_BUF HSYNC_CRT
+5V_RUN_SYNC
VSYNC_CRT
HSYNC_CRT
+5V_RUN_CRT
DAT_DDC2_CRT
CLK_DDC2_CRT
G
B
JVGA_VS
R
+CRT_VCC
BLUE_CRT
M_ID2#
VSYNC_L2
DAT_DDC2_CRT
CLK_DDC2_CRT
CLK_DDC2_DOCK
HSYNC_DOCK
VSYNC_DOCK
BLUE_CRT
RED_CRT
GREEN_CRT
RED_DOCK
BLUE_DOCK
GREEN_DOCK
VSYNC_BUF
HSYNC_BUF
DAT_DDC2_DOCK
CRT_SWITCH
+5V_RUN
+CRT_VCC
+5V_RUN_SYNC
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
CRT_SWITCH39
RED_DOCK 38
GREEN_DOCK 38
BLUE_DOCK 38
DAT_DDC2_DOCK 38
CLK_DDC2_DOCK 38
HSYNC_DOCK 38
VSYNC_DOCK 38
GPU_CRT_VSYNC53
GPU_CRT_HSYNC53
GPU_CRT_RED53
GPU_CRT_GRN53
GPU_CRT_BLU53
GPU_CRT_DAT_DDC53
GPU_CRT_CLK_DDC53
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
CRT/Video switch
27 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
CRT/Video switch
27 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
CRT/Video switch
27 69Thursday, January 21, 2010
Compal Electronics, Inc.
VGA SW for MB/DOCK
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Source
APR/SPR
MBA=B1
A=B2
ChanelSEL1/SEL2
0
1
U6
74AHCT1G125GW_SOT353-5~D
U6
74AHCT1G125GW_SOT353-5~D
A
2Y4
P5
G
3
OE# 1
C390
12P_0402_50V8J~D
C390
12P_0402_50V8J~D
1
2
JCRT1
SUYIN_070546FR015H358ZR~D
JCRT1
SUYIN_070546FR015H358ZR~D
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
16
17
C254
1U_0402_6.3V6K~D
C254
1U_0402_6.3V6K~D
1
2
C253
2P_0402_50V8C~D
C253
2P_0402_50V8C~D
1
2
C268
12P_0402_50V8J~D
@
C268
12P_0402_50V8J~D
@
1
2
R794
2.2K_0402_5%~D
R794
2.2K_0402_5%~D
12
D5
DA204U_SOT323-3~D
@
D5
DA204U_SOT323-3~D
@
2
3
1
C996
12P_0402_50V8J~D
C996
12P_0402_50V8J~D
1
2
C251
2P_0402_50V8C~D
C251
2P_0402_50V8C~D
1
2
R178 0_0402_5%~DR178 0_0402_5%~D
1 2
R175
1K_0402_5%~D
@R175
1K_0402_5%~D
@
12
R173
150_0402_1%~D
R173
150_0402_1%~D
12
L12
BLM18AG121SN1D_0603~D
L12
BLM18AG121SN1D_0603~D
1 2
U131
PI3V712-AZLEX_TQFN32_6X3~D
U131
PI3V712-AZLEX_TQFN32_6X3~D
A0
1
A1
2
GND
3
VDD 4
A2
5
A3
6
A4
7
4B2 17
4B1 18
3B1 20
3B2 19
0B2 26
0B1 27
1B1 25
1B2 24
GND
31
VDD 32
A5
9
SEL1
8
A6
10
GND
11
5B1 12
5B2 13
6B1 14
2B2 21
2B1 22
VDD 23
VDD 29
GND
28
SEL2
30
6B2 15
VDD 16
GPAD
33
D7
DA204U_SOT323-3~D
@
D7
DA204U_SOT323-3~D
@
2
3
1
C258
0.1U_0402_16V4Z~D
C258
0.1U_0402_16V4Z~D
1
2
R179 1K_0402_5%~DR179 1K_0402_5%~D
1 2
R171
0_1206_5%~D
R171
0_1206_5%~D
1 2
D6
DA204U_SOT323-3~D
@
D6
DA204U_SOT323-3~D
@
2
3
1
R176
1K_0402_5%~D
@R176
1K_0402_5%~D
@
12
C267
12P_0402_50V8J~D
@
C267
12P_0402_50V8J~D
@
1
2
C252
2P_0402_50V8C~D
C252
2P_0402_50V8C~D
1
2
C518
12P_0402_50V8J~D
C518
12P_0402_50V8J~D
1
2
L62
27NH_LL1608-FSL27NJ_5%~D
L62
27NH_LL1608-FSL27NJ_5%~D
1 2
C259
10U_0805_10V4Z~D
C259
10U_0805_10V4Z~D
1
2
R793
2.2K_0402_5%~D
R793
2.2K_0402_5%~D
12
U5
74AHCT1G125GW_SOT353-5~D
U5
74AHCT1G125GW_SOT353-5~D
A
2Y4
P5
G
3
OE# 1
NC
D8
BAT1000-7-F_SOT23-3~D
NC
D8
BAT1000-7-F_SOT23-3~D
21
3
C264
0.1U_0402_16V4Z~D
C264
0.1U_0402_16V4Z~D
1
2
C270
0.1U_0402_16V4Z~D
C270
0.1U_0402_16V4Z~D
1 2
F2
5A_125V_R451005.MRL~D
@F2
5A_125V_R451005.MRL~D
@
1 2
C262
0.1U_0402_16V4Z~D
C262
0.1U_0402_16V4Z~D
1
2
C260
0.1U_0402_16V4Z~D
C260
0.1U_0402_16V4Z~D
1
2
D9
SDM10U45-7_SOD523-2~D
D9
SDM10U45-7_SOD523-2~D
21
C269
0.1U_0402_16V4Z~D
C269
0.1U_0402_16V4Z~D
1 2
C263
0.1U_0402_16V4Z~D
C263
0.1U_0402_16V4Z~D
1
2
L11
BLM18AG121SN1D_0603~D
L11
BLM18AG121SN1D_0603~D
1 2
R172
150_0402_1%~D
R172
150_0402_1%~D
12
R177 0_0402_5%~DR177 0_0402_5%~D
1 2
L63
27NH_LL1608-FSL27NJ_5%~D
L63
27NH_LL1608-FSL27NJ_5%~D
1 2
C261
0.1U_0402_16V4Z~D
C261
0.1U_0402_16V4Z~D
1
2
R174
150_0402_1%~D
R174
150_0402_1%~D
12
L61
27NH_LL1608-FSL27NJ_5%~D
L61
27NH_LL1608-FSL27NJ_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MOD_EN
SATA_ODD_PRX_DTX_N1
SATA_ODD_PTX_DRX_P1
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0PSATA_PRX_DTX_P0_RP
SATA_PT X_DRX_P0
SATA_PT X_DRX_N0
PSATA_PRX_DTX_N0_RP
HDD_DET#
HDD_EN_5V
SATA_ODD_PTX_DRX_N1
SATA_ODD_PRX_DTX_P1
PSATA_PT X_DRX_P0_RP
PSATA_PT X_DRX_N0_RP
FFS_INT2
HDD_FALL_INT
PSATA_PT X_DRX_N0_C
PSATA_PT X_DRX_P0_C
PSATA_PT X_DRX_P0_RP
PSATA_PRX_DTX_N0_RP
PSATA_PRX_DTX_P0_RP
PSATA_PRX_DTX_N0_C
PSATA_PRX_DTX_P0_C PSATA_PRX_DTX_P0
PSATA_PT X_DRX_P0
PSATA_PT X_DRX_N0
PSATA_PRX_DTX_N0
PSATA_PT X_DRX_N0_RP
HDD_SMBDAT_R
HDD_SMBCLK_R
ODD_DET#
FFS_INT2_Q
FFS_INT2_QFFS_INT2
HDD_SMBDAT_R
HDD_SMBCLK_R
+5V_MOD
+5V_ALW+15V_ALW
+3.3V_ALW 2
+5V_MOD +5V_RUN
+5V_MOD
+5V_HDD
+5V_HDD
+5V_HDD
+15V_ALW
+5V_ALW
+5V_RUN
+3.3V_ALW 2
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_HDD
+3.3V_RUN
+3.3V_RUN
MODC_EN39
SATA_ODD_PRX_DTX_N1_C15
SATA_ODD_PRX_DTX_P1_C15
ODD_DET#40
HDD_DET#15
HDDC_EN39
SATA_ODD_PTX_DRX_P1_C15
SATA_ODD_PTX_DRX_N1_C15
PSATA_PT X_DRX_P0_C15
PSATA_PT X_DRX_N0_C15
PSATA_PRX_DTX_P0_C15
PSATA_PRX_DTX_N0_C15
HDD_FALL_INT18,40
FFS_INT219
DDR_XDP_SMBDAT
3
,14,15,16
DDR_XDP_SMBCLK13,14,15,16
HDD_SMBDAT40
HDD_SMBCLK40
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
ODD/HDD CONNECTOR
28 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
ODD/HDD CONNECTOR
28 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
ODD/HDD CONNECTOR
28 69Thursday, January 21, 2010
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Pleace near ODD CONN
2
+5VMOD Source
For ODD
Main SATA +5V Default
Pleace near HDD CONN
For HDD Temp.
Main SATA +5V Default
Open
+5V_HDD Source
HDD PWR
DELL CONFIDENTIAL/PROPRIETARY
HDD Repeater
Free Fall Sensor
Disconnect to EC SSMBUS trace,
add R1534/1535
C1385 0.01U_0402_16V7K~DC1385 0.01U_0402_16V7K~D
12
C378
0.1U_0603_50V4Z~D
C378
0.1U_0603_50V4Z~D
1
2
R321
100K_0402_5%~D
R321
100K_0402_5%~D
12
C374 0.01U_0402_16V7K~DC374 0.01U_0402_16V7K~D
12
G
D
S
Q118
SSM3K7002FU_SC70-3~D
G
D
S
Q118
SSM3K7002FU_SC70-3~D
2
13
U96
SN75LVCP412ARTJR_QFN20_4X4~D
U96
SN75LVCP412ARTJR_QFN20_4X4~D
RX_1P
1
RX_1N
2VCC 20
GND
19
TX_2P
5
VCC 6
EN
7
PE2 8
PE1 9
VCC 10
GND
17
GND
18
RX_2P 11
RX_2N 12
GND
13 TX_1N 14
TX_1P 15
VCC 16
GND
3
TX_2N
4
PAD
21
D10
SDM10U45-7_SOD523-2~D
D10
SDM10U45-7_SOD523-2~D
21
C1383
0.01U_0402_16V7K~D
C1383
0.01U_0402_16V7K~D
1
2
Q34B
DMN66D0LDW-7_SOT363-6~D
Q34B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R445 2.2K_0402_5%~DR445 2.2K_0402_5%~D
1 2
R1529 0_0402_5%~DR1529 0_0402_5%~D
1 2
C308 0.01U_0402_16V7K~DC308 0.01U_0402_16V7K~D
12
R319
100K_0402_5%~D
R319
100K_0402_5%~D
12
Q34A
DMN66D0LDW-7_SOT363-6~D
Q34A
DMN66D0LDW-7_SOT363-6~D
61
2
C1384
0.1U_0402_16V4Z~D
C1384
0.1U_0402_16V4Z~D
1
2
R323
100K_0402_5%~D
R323
100K_0402_5%~D
12
C375 0.01U_0402_16V7K~DC375 0.01U_0402_16V7K~D
12
R1528 0_0402_5%~DR1528 0_0402_5%~D
1 2
C379
10U_0805_10V4Z~D
C379
10U_0805_10V4Z~D
1
2
C323 0.01U_0402_16V7K~DC323 0.01U_0402_16V7K~D
12
R1308 0_0402_5%~D
@
R1308 0_0402_5%~D
@
1 2
JSATA2
FOX_LD2122H-S4SL6_RV
JSATA2
FOX_LD2122H-S4SL6_RV
GND1 23
GND2 24
GND
1
RX+
2
RX-
3
GND
4
TX-
5
TX+
6
GND
7
3.3V
8
3.3V
9
3.3V
10
GND
11
GND
12
GND
13
5V
14
5V
15
5V
16
GND
17
Reserved
18
GND
19
12V
20
12V
21
12V
22
R1304
0_0402_5%~D
R1304
0_0402_5%~D
12
S
G
D
Q29
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q29
SI3456BDV-T1-E3_TSOP6~D
3
6
2
4 5
1
C380 0.01U_0402_16V7K~DC380 0.01U_0402_16V7K~D
12
R1239 10K_0402_5%~DR1239 10K_0402_5%~D
1 2
C435
10U_0805_10V4Z~D
C435
10U_0805_10V4Z~D
1
2
C324 0.01U_0402_16V7K~DC324 0.01U_0402_16V7K~D
12
C310 0.01U_0402_16V7K~DC310 0.01U_0402_16V7K~D
12
Q31B
DMN66D0LDW-7_SOT363-6~D
Q31B
DMN66D0LDW-7_SOT363-6~D
3
5
4
DE351DLTR
U139
DE351DLTR8_LGA14_3X5~D
DE351DLTR
U139
DE351DLTR8_LGA14_3X5~D
VDD_IO
1
GND 2
RSVD 3
GND 4
GND 5
VDD
6
CS
7
INT 1
8
INT 2
9GND 10
RSVD 11
SDO
12
SDA / SDI / SDO
13
SCL / SPC
14
C377
0.1U_0402_16V4Z~D
C377
0.1U_0402_16V4Z~D
1
2
R318
100K_0402_5%~D
R318
100K_0402_5%~D
12
C382
0.1U_0603_50V4Z~D
C382
0.1U_0603_50V4Z~D
1
2
Q31A
DMN66D0LDW-7_SOT363-6~D
Q31A
DMN66D0LDW-7_SOT363-6~D
61
2
PJP15
PAD-OPEN 4x4m@
PJP15
PAD-OPEN 4x4m@
1 2
R320
100K_0402_5%~D
R320
100K_0402_5%~D
12
PJP16
PAD-OPEN 4x4m@
PJP16
PAD-OPEN 4x4m@
1 2
R1305 0_0402_5%~DR1305 0_0402_5%~D
1 2
C384
1000P_0402_50V7K~D
C384
1000P_0402_50V7K~D
1
2
C381 0.01U_0402_16V7K~DC381 0.01U_0402_16V7K~D
12
R316
100K_0402_5%~D
R316
100K_0402_5%~D
12
R317
100K_0402_5%~D
R317
100K_0402_5%~D
12
R322
100K_0402_5%~D
R322
100K_0402_5%~D
12
C436
0.1U_0402_16V4Z~D
C436
0.1U_0402_16V4Z~D
1
2
R1303
0_0402_5%~D
@
R1303
0_0402_5%~D
@
12
R463 2.2K_0402_5%~DR463 2.2K_0402_5%~D
1 2
R1534 0_0402_5%~D@R1534 0_0402_5%~D@
1 2
C383
10U_0805_10V4Z~D
C383
10U_0805_10V4Z~D
1
2
C307 0.01U_0402_16V7K~DC307 0.01U_0402_16V7K~D
12
R329
100K_0402_5%~D
@R329
100K_0402_5%~D
@
12
R1535 0_0402_5%~D@R1535 0_0402_5%~D@
1 2
S
G
D
Q32
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q32
SI3456BDV-T1-E3_TSOP6~D
3
6
2
4 5
1
JSATA1
TYCO_2-1759838-8
JSATA1
TYCO_2-1759838-8
GND1 14
GND2 15
GND
1
RX+
2
RX-
3
GND
4
TX-
5
TX+
6
GND
7
DP
8
+5V
9
+5V
10
MD
11
GND
12
GND
13
C1382 0.01U_0402_16V7K~DC1382 0.01U_0402_16V7K~D
12
C385
0.1U_0402_16V4Z~D
C385
0.1U_0402_16V4Z~D
1
2
C311 0.01U_0402_16V7K~DC311 0.01U_0402_16V7K~D
12
C376
1000P_0402_50V7K~D
C376
1000P_0402_50V7K~D
1
2
2
2
1
1
B B
A A
AUD_SENSE_A
VREFFILT
CAP2
AUD_SENSE_A
I2S_LRCLK
I2S_BCLK
I2S_DO
I2S_DI#
AUD_SENSE_B
AUD_SENSE_B
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
DMIC_CLK_R
DAI_GPU_R3P_SMBCLK
DAI_GPU_R3P_SMBDAT
XTALI_12MHZ
+VDDA_AVDD
PCH_AZ_CODEC_SDOUT
PCH_AC_SDIN0_R
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_BITCLK
+CODEC_DVDD_CORE
+VDDA_PVDD
AUD_DOCK_HP_OUT_R AUD_DOCK_HP_R_R
AUD_DOCK_HP_L_RAUD_DOCK_HP_OUT_L
INT_SPK_L+
INT_SPK_R-
INT_SPK_R+
INT_SPK_L-
AUD_PC_BEEP
AUD_DOCK_MIC_IN_L_R
AUD_DOCK_MIC_IN_R_RDOCK_MIC_IN_R_C
DOCK_MIC_IN_L_C
AUD_DOCK_MIC_IN_R
AUD_DOCK_MIC_IN_L
RST#PCH_AZ_CODEC_RST#
I2S_LRCLK
+3.3V_RUN_IOVDD
I2S_BCLK
DAI_GPU_R3P_SMBDAT
DAI_GPU_R3P_SMBCLK
RST#
I2S_DI#
I2S_DO
XTALI_12MHZ
+3.3V_RUN_I2S_VDD
AUD_DOCK_HP_L_C
AUD_DOCK_MIC_IN_R_R
AUD_DOCK_MIC_IN_L_R
AUD_DOCK_HP_R_C
INT_SPK_L-
INT_SPK_L+INT_SPK_R+
INT_SPK_R-
AUD_DOCK_HP_L_C
AUD_DOCK_HP_R_C
INT_SPK_L+
INT_SPK_R+
INT_SPK_L-
INT_SPK_R-
XTALI_12MHZ
+VDDA_AVDD
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+VDDA_AVDD
+3.3V_RUN
+3.3V_RUN
+VREFOUT
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
+3.3V_RUN
+1.8V_RUN
+5V_RUN
+3.3V_RUN
AUD_HP_OUT_L 37
AUD_EXT_MIC_R 37
DMIC_CLK24
DMIC024
EN_I2S_NB_CODEC#39
DAI_DI 38
DOCK_MIC_DET 39DOCK_HP_DET39
DAI_GPU_R3P_SMBCLK 23,40,53
DAI_GPU_R3P_SMBDAT 23,40,53
AUD_HP_OUT_R 37
AUD_EXT_MIC_L 37
DAI_12MHZ# 38
DAI_DO# 38
DAI_LRCK# 38
DAI_BCLK# 38
PCH_AZ_CODEC_SDIN015
PCH_AZ_CODEC_SYNC15
PCH_AZ_CODEC_RST#15
PCH_AZ_CODEC_SDOUT15
PCH_AZ_CODEC_BITCLK15
AUD_MIC_SWITCH37 AUD_HP_NB_SENSE 37,39
AUD_NB_MUTE39
BEEP 40
SPKR 15
SPEAKER_DET#19
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Azalia (HD) Codec
29 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Azalia (HD) Codec
29 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Azalia (HD) Codec
29 69Thursday, January 21, 2010
Compal Electronics, Inc.
Close to U16 pin6
Place closely to Pin 13.
Close to U16 pin5
Place closely to Pin 34
Resistor SENSE_A SENSE_B
39.2K
20K
10K
5.11K
2.49K
PORT A (HP0)
PORT B (HP1)
PORT C
SPDIFOUT0
Pull-up to AVDD
PORT E
PORT F
DMIC0
SPDIFOUT1 (DMIC0)
Speaker Connector
15 mils trace
Place close to JSPK1
Close pin 24 Close pin 18 Close pin 25
Close pin 32
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
C409 1U_0603_10V6K~DC409 1U_0603_10V6K~D
1 2
C412
10P_0402_50V8J~D
@C412
10P_0402_50V8J~D
@
1
2
Q40A
DMN66D0LDW-7_SOT363-6~D
Q40A
DMN66D0LDW-7_SOT363-6~D
61
2
U17
CD74HC366M96_SO16~D
U17
CD74HC366M96_SO16~D
1A
2
OE1#
1
VCC
16
2A
4
3A
6
6A
14
4A
10
5A
12
GND 8
OE2#
15
6Y# 13
5Y# 11
4Y# 9
3Y# 7
2Y# 5
1Y# 3
C411 1U_0603_10V6K~DC411 1U_0603_10V6K~D
1 2
C426
100P_0402_50V8J~D
@C426
100P_0402_50V8J~D
@
1
2
L3
BLM21PG600SN1D_0805~D
L3
BLM21PG600SN1D_0805~D
1 2
C414
10U_0805_10V6K~D
C414
10U_0805_10V6K~D
1
2
Q40B
DMN66D0LDW-7_SOT363-6~D
Q40B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C425
100P_0402_50V8J~D
@C425
100P_0402_50V8J~D
@
1
2
C431
0.1U_0402_10V7K~D
C431
0.1U_0402_10V7K~D
1
2
R342 2K_0402_1%~DR342 2K_0402_1%~D
1 2
R50
33_0402_5%~D
@R50
33_0402_5%~D
@
1 2
D1
IP4223CZ6_SO6~D
@D1
IP4223CZ6_SO6~D
@
V I/O
1
V I/O
3
V I/O 6
V I/O 4
Ground
2V BUS 5
R340 2K_0402_1%~DR340 2K_0402_1%~D
1 2
X4
12MHZ_15PF_SIT8102ACL3333E12T~D
X4
12MHZ_15PF_SIT8102ACL3333E12T~D
ST/OE 1
GND 2
OUT
3
VDD
4
C401
0.1U_0402_10V7K~D
C401
0.1U_0402_10V7K~D
1
2
C415
1U_0603_10V6K~D
C415
1U_0603_10V6K~D
1
2
Q38B
DMN66D0LDW-7_SOT363-6~D
Q38B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C458
1U_0603_10V6K~D
C458
1U_0603_10V6K~D
1
2
L77
BLM21PG600SN1D_0805~D
L77
BLM21PG600SN1D_0805~D
1 2
L4
BLM18BB221SN1D_2P~D
L4
BLM18BB221SN1D_2P~D
1 2
U16
92HD81B1B5NLGXUAX8_QFN48_7X7~D
U16
92HD81B1B5NLGXUAX8_QFN48_7X7~D
DVDD_CORE
1
DVDD_IO
3
DMIC_CLK/GPIO1
2
DMIC0/GPIO2
4
SPKR_PORT_D_R- 43
SPKR_PORT_D_R+ 44
PVDD 45
DMIC1/GPIO0/SPDIF_OUT_1
46
HDA_SDO
5
HDA_BITCLK
6
DVSS
7
HDA_SDI
8
DVDD
9
HDA_SYNC
10
HDA_RST#
11
SPDIF_OUT_0
48
EAPD
47
MONO_OUT 25
AVDD 38
AVSS
26
PVSS
42
AVSS
33
AVDD 27
PVDD 39
SPKR_PORT_D_L- 41
VREG 37
VREFFILT 21
CAP2 22
HP0_PORT_A_L 28
VREFOUT_A_or_F 23
VREFOUT_C 24
HP0_PORT_A_R 29
CAP-
35
CAP+
36
SENSE_B 14
PORT_E_L 15
HP1_PORT_B_L 31
PORT_E_R 16
PORT_F_L 17
AVSS
30
PORT_F_R 18
PORT_C_L 19
PORT_C_R 20
PC_BEEP 12
HP1_PORT_B_R 32
SPKR_PORT_D_L+ 40
SENSE_A 13
V- 34
DAP
49
D17
DA204U_SOT323-3~D
@
D17
DA204U_SOT323-3~D
@
2
3
1
C679
150P_0402_50V8J~D
@
C679
150P_0402_50V8J~D
@
1
2
C1896 1000P_0402_50V7K~DC1896 1000P_0402_50V7K~D
1 2
Q38A
DMN66D0LDW-7_SOT363-6~D
Q38A
DMN66D0LDW-7_SOT363-6~D
61
2
D18
DA204U_SOT323-3~D
@
D18
DA204U_SOT323-3~D
@
2
3
1
R344
47_0402_5%~D
@R344
47_0402_5%~D
@
12
R365
100K_0402_5%~D
R365
100K_0402_5%~D
12
C408 1U_0603_10V6K~DC408 1U_0603_10V6K~D
1 2
C402
1U_0603_10V6K~D
C402
1U_0603_10V6K~D
1
2
C433
0.1U_0402_10V7K~D
C433
0.1U_0402_10V7K~D
1
2
C459
1U_0603_10V6K~D
C459
1U_0603_10V6K~D
1
2
R18
0_0402_5%~D
R18
0_0402_5%~D
1 2
C389 0.1U_0402_16V4Z~DC389 0.1U_0402_16V4Z~D
12
L70
47UH_CBMF1608T470K_10%~D
L70
47UH_CBMF1608T470K_10%~D
12
C392
0.1U_0402_10V7K~D
C392
0.1U_0402_10V7K~D
1
2
R350
100K_0402_5%~D
R350
100K_0402_5%~D
12
R1091 2K_0402_1%~DR1091 2K_0402_1%~D
1 2
C1897 1000P_0402_50V7K~DC1897 1000P_0402_50V7K~D
1 2
C454
1U_0603_10V6K~D
C454
1U_0603_10V6K~D
1
2
R1296 10K_0402_5%~DR1296 10K_0402_5%~D
1 2
R332 33_0402_5%~DR332 33_0402_5%~D
1 2
R355
100K_0402_5%~D
R355
100K_0402_5%~D
12
R353
100K_0402_5%~D
R353
100K_0402_5%~D
12
C1066
4700P_0402_25V7K~D
@
C1066
4700P_0402_25V7K~D
@
1
2
D55
DA204U_SOT323-3~D
@
D55
DA204U_SOT323-3~D
@
2
3
1
R828 510K_0402_5%~DR828 510K_0402_5%~D
12
C398
0.1U_0402_10V7K~D
C398
0.1U_0402_10V7K~D
1
2
C420
1000P_0402_50V7K~D
C420
1000P_0402_50V7K~D
1
2
R1092 2K_0402_1%~DR1092 2K_0402_1%~D
1 2
C1894 1000P_0402_50V7K~DC1894 1000P_0402_50V7K~D
1 2
R343
10_0402_5%~D
@R343
10_0402_5%~D
@
12
C393
1U_0603_10V6K~D
C393
1U_0603_10V6K~D
1
2
C432
0.1U_0402_10V7K~D
C432
0.1U_0402_10V7K~D
1
2
C463
1U_0603_10V6K~D
C463
1U_0603_10V6K~D
1
2
C399
0.1U_0402_10V7K~D
C399
0.1U_0402_10V7K~D
1
2
C456
1U_0603_10V6K~D
C456
1U_0603_10V6K~D
1
2
R347
2.49K_0402_1%~D
R347
2.49K_0402_1%~D
12
C423
100P_0402_50V8J~D
@C423
100P_0402_50V8J~D
@
1
2
D19
DA204U_SOT323-3~D
@
D19
DA204U_SOT323-3~D
@
2
3
1
C403
10U_0805_10V6K~D
C403
10U_0805_10V6K~D
1
2
C1895 1000P_0402_50V7K~DC1895 1000P_0402_50V7K~D
1 2
C413
0.1U_0402_16V7K~D
C413
0.1U_0402_16V7K~D
1
2
R349
20K_0402_1%~D
R349
20K_0402_1%~D
12
R1090 10M_0402_5%~D@R1090 10M_0402_5%~D@
12
JSPK1
TYCO_1775765-6~D
JSPK1
TYCO_1775765-6~D
1
1
2
2
3
3
4
4
5
5
6
6
GND
7
GND
8
R348
39.2K_0402_1%~D
R348
39.2K_0402_1%~D
12
C397
1U_0603_10V6K~D
C397
1U_0603_10V6K~D
1
2
R1089 10M_0402_5%~D@R1089 10M_0402_5%~D@
12
C417
1000P_0402_50V7K~D
C417
1000P_0402_50V7K~D
1
2
C400
10U_0805_10V6K~D
C400
10U_0805_10V6K~D
1
2
C428
10U_0805_10V6K~D
C428
10U_0805_10V6K~D
1
2
C394 0.1U_0402_16V4Z~DC394 0.1U_0402_16V4Z~D
12
R352
39.2K_0402_1%~D
R352
39.2K_0402_1%~D
12
C405
0.1U_0402_10V7K~D
C405
0.1U_0402_10V7K~D
1
2
C429
0.1U_0402_10V7K~D
C429
0.1U_0402_10V7K~D
1
2
R351
20K_0402_1%~D
R351
20K_0402_1%~D
12
C1067
4700P_0402_25V7K~D
@
C1067
4700P_0402_25V7K~D
@
1
2
C457
4.7U_0603_6.3V6M~D
C457
4.7U_0603_6.3V6M~D
1
2
L18
BLM18EG601SN1D_2P~D
L18
BLM18EG601SN1D_2P~D
1 2
C676
150P_0402_50V8J~D
C676
150P_0402_50V8J~D
1
2
C455
4.7U_0603_6.3V6M~D
C455
4.7U_0603_6.3V6M~D
1
2
R346
2.49K_0402_1%~D
R346
2.49K_0402_1%~D
12
C410 1U_0603_10V6K~DC410 1U_0603_10V6K~D
1 2
C430
0.1U_0402_10V7K~D
C430
0.1U_0402_10V7K~D
1
2
C404
0.1U_0402_10V7K~D
C404
0.1U_0402_10V7K~D
1
2
D20
DA204U_SOT323-3~D@
D20
DA204U_SOT323-3~D@
2
3
1
C424
100P_0402_50V8J~D
@C424
100P_0402_50V8J~D
@
1
2
C416
0.1U_0402_10V7K~D
@C416
0.1U_0402_10V7K~D
@
1
2
C453
4.7U_0603_6.3V6M~D
C453
4.7U_0603_6.3V6M~D
1
2
U15
TLV320AIC3004IRHBR_QFN32_5X5~D
U15
TLV320AIC3004IRHBR_QFN32_5X5~D
AVDD
25
DRVDD
24
LINEL
10
LINER
12
DRVSS 21
DVSS 6
NC 20
RESET#
31
BCLK
2
DVDD
32
IOVDD
7
DRVDD
18
DIN
4
MCLK
1
SCL
8
SDA
9
LEFT_LO 27
DOUT 5
RIGHT_LO 29
AVSS2 26
NC 23
NC 11
NC 30
NC 28
WCLK
3
NC 22
NC 13
NC 16
NC 15
NC 14
AVSS1 17
NC 19
GPAD 33
R354
100K_0402_5%~D
R354
100K_0402_5%~D
12
R345
1K_0402_5%~D
R345
1K_0402_5%~D
12
R327 510K_0402_5%~DR327 510K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_TX1-
LAN_TX1+
LAN_TX3-
LAN_TX0-
LAN_TX0+
+3.3V_LAN_OUT
+3.3V_LAN_OUT_R
+1.0V_LAN_4
+1.0V_LAN_3
+1.0V_LAN_2
+3.3V_LAN_R
REGCTL_PNP10
LANCLK_REQ#
LAN_TX2+
LAN_TX3+
LAN_TX2-
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_PRX_GLANTX_P6_C
PCIE_PRX_GLANTX_N6_C
LAN_SMBCLK
LAN_SMBDATA
LOM_ACTLED_YEL#
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
LAN_TEST_EN
RES_BIAS
XTALI
+1.0V_LAN_2 +1.0V_LAN_3 +1.0V_LAN_4
LAN_DISABLE#_R
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
+RSVD_VCC3P3_2
+RSVD_VCC3P3_1
REGCTL_PNP10
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
ENAB_3VLAN
XTALO
LOM_ACTLED_YEL#
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
DOCK_LOM_SPD100LED_ORG#
LED_10_GRN#
LED_100_ORG#
LAN_TX1-R
LAN_TX1+R
LAN_TX1-
LAN_TX1+
LAN_TX2-R
LAN_TX2+RLAN_TX2+
LAN_TX2-
LAN_TX3-R
LAN_TX3+RLAN_TX3+
LAN_TX3-
SW_LAN_TX0-
SW_LAN_TX0+
SW_LAN_TX1-
SW_LAN_TX1+
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3-
SW_LAN_TX3+
DOCK_LOM_TRD0-
DOCK_LOM_TRD0+
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
DOCK_LOM_TRD2-
DOCK_LOM_TRD2+
DOCK_LOM_TRD3-
DOCK_LOM_TRD3+
DOCK_LOM_ACTLED_YEL#
LAN_ACTLED_YEL#
DOCKED
LAN_TX0-RLAN_TX0-
LAN_TX0+RLAN_TX0+
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
+3.3V_LAN
+1.0V_LAN +1.0V_LAN
+1.0V_LAN
+3.3V_LAN
+3.3V_RUN
+3.3V_LAN
+3.3V_LAN+3.3V_ALW
+3.3V_LAN
+15V_ALW
+3.3V_ALW2
+1.05V_M
+3.3V_LAN
+3.3V_LAN
+3.3V_M
LANCLK_REQ#15,16
PLTRST_LAN#18
CLK_PCIE_LAN#16
CLK_PCIE_LAN16
PCIE_PRX_GLANTX_P616
PCIE_PTX_GLANRX_N6_C16
PCIE_PTX_GLANRX_P6_C16
PCIE_PRX_GLANTX_N616
LAN_SMBCLK16
LAN_SMBDATA16
PM_LANPHY_ENABLE19
LAN_DISABLE#_R39
AUX_ON40
SIO_SLP_LAN#17,39
SW_LAN_TX0- 37
SW_LAN_TX0+ 37
SW_LAN_TX1- 37
SW_LAN_TX1+ 37
SW_LAN_TX2+ 37
SW_LAN_TX2- 37
SW_LAN_TX3- 37
SW_LAN_TX3+ 37
DOCK_LOM_TRD0- 38
DOCK_LOM_TRD0+ 38
DOCK_LOM_TRD1+ 38
DOCK_LOM_TRD1- 38
DOCK_LOM_TRD2- 38
DOCK_LOM_TRD2+ 38
DOCK_LOM_TRD3- 38
DOCK_LOM_TRD3+ 38
DOCKED39
DOCK_LOM_ACTLED_YEL# 38
DOCK_LOM_SPD10LED_GRN# 38
DOCK_LOM_SPD100LED_ORG# 38
LAN_ACTLED_YEL# 37
LED_10_GRN# 37
LED_100_ORG# 37
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Intel Intel 82577/82578 (Hanksville) / LAN SW
30 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Intel Intel 82577/82578 (Hanksville) / LAN SW
30 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Intel Intel 82577/82578 (Hanksville) / LAN SW
30 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Trace=12mil
Trace=12mil
SMBus Device Address 0xC8
R1200 Resistor Value:
3.01 kohm for Hanksville-M LOM
2.37 kohm for Hanksville-D LOM
+1.05V_M for VC10 not the
correct or complete
implementation to connect to
+1.05V SVR.
FROM NIC DOCKED 1: TO DOCK
0: TO RJ45
LAN ANALOG
SWITCH
TO
DOCK
Layout Notice : Place bead as
close PI3L500 as possible
Need to verify A3 silicon drive
power before removing C427
KDS crystal vender verify
driving level in A3
C461
0.1U_0402_16V4Z~D
C461
0.1U_0402_16V4Z~D
1
2
U25
PI3L720ZHEX_TQFN42_9X3P5~D
U25
PI3L720ZHEX_TQFN42_9X3P5~D
SEL
13
A0+
2
A0-
3
A1+
6
A1-
7
A2+
9
A2-
10
A3+
11
B0+ 38
C0+ 36
B0- 37
C0- 35
B1+ 34
C1+ 32
B1- 33
C1- 31
B2+ 29
C2+ 27
B2- 28
C2- 26
B3+ 25
C3+ 23
B3- 24
C3- 22
A3-
12
LEDA0
15
LEDA1
16
LEDA2
42
LEDB0 17
LEDC0 19
LEDB1 18
LEDC1 20
LEDB2 41
LEDC2 40
PAD_GND
43
VDD 1
VDD 4
VDD 8
VDD 14
VDD 21
VDD 30
VDD 39
PD
5
L22 22NH_0603CS-220EJTS_5%~DL22 22NH_0603CS-220EJTS_5%~D
1 2
L20 22NH_0603CS-220EJTS_5%~DL20 22NH_0603CS-220EJTS_5%~D
1 2
R392
10K_0402_5%~D
@
R392
10K_0402_5%~D
@
12
R70 3.01K_0402_1%~DR70 3.01K_0402_1%~D
12
C478
0.1U_0402_10V7K~D
C478
0.1U_0402_10V7K~D
1
2
R2
0_0402_5%~D
R2
0_0402_5%~D
1 2
R73
0_0402_5%~D
R73
0_0402_5%~D
1 2
C477
0.1U_0402_10V7K~D
C477
0.1U_0402_10V7K~D
1
2
R1310
100K_0402_5%~D
R1310
100K_0402_5%~D
12
L25 22NH_0603CS-220EJTS_5%~DL25 22NH_0603CS-220EJTS_5%~D
1 2
C805
10U_0805_6.3V6M~D
C805
10U_0805_6.3V6M~D
1
2
C474
10U_0805_10V4Z~D
C474
10U_0805_10V4Z~D
1
2
L26 22NH_0603CS-220EJTS_5%~DL26 22NH_0603CS-220EJTS_5%~D
1 2
Y2
25MHZ_18PF_1Y725000CE1A~D
Y2
25MHZ_18PF_1Y725000CE1A~D
1 2
T177
PAD~D @T177
PAD~D @
R76 10K_0402_5%~D@R76 10K_0402_5%~D@
1 2 R699
10K_0402_5%~D
R699
10K_0402_5%~D
12
C465
4.7U_0603_6.3V6M~D
C465
4.7U_0603_6.3V6M~D
1
2
R59
1K_0402_5%~D
R59
1K_0402_5%~D
12
S
G
D
Q2
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q2
SI3456BDV-T1-E3_TSOP6~D
3
6
2
45
1
C802
0.1U_0402_10V7K~D
C802
0.1U_0402_10V7K~D
1
2
C804
0.1U_0402_10V7K~D
C804
0.1U_0402_10V7K~D
1
2
C786
1U_0603_10V6K~D
C786
1U_0603_10V6K~D
1
2
C427
10P_0402_50V8J~D
C427
10P_0402_50V8J~D
1 2
R394
10K_0402_5%~D
@
R394
10K_0402_5%~D
@
12
T176
PAD~D @T176
PAD~D @
C806
0.1U_0402_10V7K~D
C806
0.1U_0402_10V7K~D
1
2
R44
10K_0402_5%~D
R44
10K_0402_5%~D
12
PCIE
MDI
SMBUS
JTAG LED
U79
WG82577LM-SLGWR-A3_QFN48_6X6~D
PCIE
MDI
SMBUS
JTAG LED
U79
WG82577LM-SLGWR-A3_QFN48_6X6~D
RSVD_VCC3P3_1 1
RSVD_VCC3P3_2 2
LAN_DISABLE_N
3
VDD3P3_OUT 4
VDD3P3_IN 5
VCT 6
CTRL_1P0 7
VDD1P0_8 8
XTAL_OUT
9
XTAL_IN
10
VDD1P0_11 11
RBIAS
12
MDI_PLUS0 13
MDI_MINUS0 14
VDD3P3_15 15
VDD1P0_16 16
MDI_PLUS1 17
MDI_MINUS1 18
VDD3P3_19 19
MDI_PLUS2 20
MDI_MINUS2 21
VDD1P0_22 22
MDI_PLUS3 23
MDI_MINUS3 24
LED2
25
LED0
26
LED1
27
SMB_CLK
28
VDD3P3_29 29
TEST_EN
30
SMB_DATA
31
JTAG_TDI
32
JTAG_TMS
33 JTAG_TDO
34
JTAG_TCK
35
PE_RST_N
36
VDD1P0_37 37
PETp
38
PETn
39
VDD1P0_40 40
PERp
41
PERn
42
VDD1P0_43 43
PE_CLKP
44
PE_CLKN
45
VDD1P0_46 46
VDD1P0_47 47
CLK_REQ_N
48
VSS_EPAD 49
R693
0_0603_5%~D
R693
0_0603_5%~D
12
R47
0_0402_5%~D
@R47
0_0402_5%~D
@1 2
C475
33P_0402_50V8J~D
C475
33P_0402_50V8J~D
1
2
Q184B
DMN66D0LDW-7_SOT363-6~D
Q184B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C479
0.1U_0402_10V7K~D
C479
0.1U_0402_10V7K~D
1
2
R1200
3.01K_0402_1%~D
R1200
3.01K_0402_1%~D
12
C800
0.1U_0402_10V7K~D
C800
0.1U_0402_10V7K~D
1
2
L27 22NH_0603CS-220EJTS_5%~DL27 22NH_0603CS-220EJTS_5%~D
1 2
C462
0.1U_0402_16V4Z~D
C462
0.1U_0402_16V4Z~D
1
2
C466
4.7U_0603_6.3V6M~D
C466
4.7U_0603_6.3V6M~D
1
2
C476
33P_0402_50V8J~D
C476
33P_0402_50V8J~D
1
2
Q45
DCP69A-13_SOT223-3~D
Q45
DCP69A-13_SOT223-3~D
3
1
2
4
C803
0.1U_0402_10V7K~D
C803
0.1U_0402_10V7K~D
1
2
Q184A
DMN66D0LDW-7_SOT363-6~D
Q184A
DMN66D0LDW-7_SOT363-6~D
61
2
L24 22NH_0603CS-220EJTS_5%~DL24 22NH_0603CS-220EJTS_5%~D
1 2
R119
0_0805_5%~D
@R119
0_0805_5%~D
@
1 2
L23 22NH_0603CS-220EJTS_5%~DL23 22NH_0603CS-220EJTS_5%~D
1 2
R371
0_1210_5%~D
R371
0_1210_5%~D
12
C480
0.1U_0402_10V7K~D
C480
0.1U_0402_10V7K~D
1
2
C452 0.1U_0402_10V7K~DC452 0.1U_0402_10V7K~D
12
L21 22NH_0603CS-220EJTS_5%~DL21 22NH_0603CS-220EJTS_5%~D
1 2
C481
0.1U_0402_10V7K~D
C481
0.1U_0402_10V7K~D
1
2
R393
10K_0402_5%~D
@
R393
10K_0402_5%~D
@
12
R373
0_1210_5%~D
@R373
0_1210_5%~D
@
1 2
C482
10U_0805_6.3V6M~D
C482
10U_0805_6.3V6M~D
1
2
R72
4.99K_0402_1%~D
R72
4.99K_0402_1%~D
12
R696 0_0603_5%~DR696 0_0603_5%~D
12
C460
0.1U_0402_16V4Z~D
C460
0.1U_0402_16V4Z~D
1
2
C801
0.1U_0402_10V7K~D
C801
0.1U_0402_10V7K~D
1
2
R695 0_0603_5%~DR695 0_0603_5%~D
12
R56
10K_0402_5%~D
@R56
10K_0402_5%~D
@
12
R694
0_0603_5%~D
R694
0_0603_5%~D
12
R1291 3.01K_0402_1%~DR1291 3.01K_0402_1%~D
12
C451 0.1U_0402_10V7K~DC451 0.1U_0402_10V7K~D
12
R75 10K_0402_5%~D@R75 10K_0402_5%~D@
1 2
R1311
100K_0402_5%~D
R1311
100K_0402_5%~D
12
C1414
2200P_0402_50V7K~D
C1414
2200P_0402_50V7K~D
1
2
R370
0_1210_5%~D
R370
0_1210_5%~D
1 2
R42
0_0402_5%~D
R42
0_0402_5%~D
1 2
C1118
0.01U_0402_16V7K~D
C1118
0.01U_0402_16V7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC_CLK
SC_IO
SC_C8
SC_RST
SC_C4
SC_DET
SC_RST
SC_CLK
SC_IO
SC_C8
SC_C4
CLKDIV1
PORADJ
CLKDIV2
BCM5882_SCCLK
BCM5882_SCRST
SCC_CMDVCC_N_R
BCM5882_GPIO25
BCM5882_GPIO26
AUX1UC
BCM5882_IO
BCM5882_SCDET
SC_DET
SC_DET
USBP7-_R
USBP7+_R
USB_GPIO27
CLK_PCI_TPM
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
IRQ_SERIRQ_R
LPC_LFRAME#
PLTRST1#_USHPLTRST_USH#CLK_PCI_TPM
PCI_TPM_TERM
PLTRST1#_USH
USH_LPCEN
USH_LPCEN
LPD#
LPD#
USH_SMBCLK
USH_SMBDAT
BCM5882_ALERT#
USH_PWR_STATE#_R
FP_USBD-
FP_USBD+
USBH_OC0#
SPI_CLK
SPI_CS
IRQ_SERIRQ_R
BCM5882_GPIO15
SPI_CS
SPI_CLK
SPI_RST
SPI_TXD
BCM5882_GPIO15
SPI_RXD
SC_TEST
XOXI
REF_XIN
REF_XIN
REF_XOUT
RST_N
RST_N
JTAG_CLK_USH
JTAG_TDI_USH
JTAG_TDO_USH
JTAG_TMS_USH
JTAG_RST#_USH
JTAG_CLK_USH
JTAG_TDI_USH
JTAG_TDO_USH
JTAG_TMS_USH
JTAG_RST#_USH
JTCE_USH
JTCE_USH
OVSTB
OVSTB
SBOOT
SBOOT
POR_EXTR
POR_EXTR
UART_RX/GPIO0
UART_TX/GPIO1
CONTACTLESS_DET#
BCM5882_GPIO15
CLKOUT
SPI_RST
SWV
RFREADER_TXN1_PI
+RFID_AVDD2P5 +RFID_AVDD1P2+RFID_AVDD3P3
RFREADER_RXN
RFREADER_RXP
RFREADER_TXN1
RFREADER_TXP1
RFREADER_TXP1
RFREADER_RXP_C
RFREADER_TXN1
RFREADER_RXN_C
+RFID_AVDD1P2
+RFID_AVDD2P5
+RFID_AVDD3P3
FP_RESET#
JTAG_RST#_USH
USH_SMBCLK
USH_SMBDAT
BCM5882_ALERT#
USH_PWR_STATE#
PORADJ
BCM5882_GPIO25
SCC_CMDVCC_N
BCM5882_SCDET
BCM5882_IO
AUX1UC
AUX2UC
BCM5882_SCRST
BCM5882_SCCLK
BCM5882_GPIO26
CLKDIV1
CLKDIV2
PORADJ
REF_XOUT
HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3
HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3
SMB_GPIO1
USBH_OC1
USBH_OC1
RFTAG_VRXN
RFTAG_VRXP
CLKDIV1
CLKDIV2
BCMGPIO_10
BCMGPIO_11
BCMGPIO_12
BCMGPIO_13
USH_TESTMODE
SCANACCMODE
POR_MONITOR
PLL_TESTOUT
RFREADER_RXN
RFREADER_RXP
SPI_TXD
SPI_RXD
USH_LPCEN
UART_TX/GPIO1
UART_RX/GPIO0
SPI_RST
SPI_CLK
SPI_CS
SPI_TXD
SPI_RXD
BCM5882_GPIO15
SCC_CMDVCC_N_R
SCC_CMDVCC_N
USBP7+
USB_GPIO27
RFREADER_TXP1_PI
USB_GPIO27
SPI_RST
+SC_VCC
+SC_VCC
+3.3V_ALW
+3.3V_ALW
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+SC_PWR
+3.3V_ALW
+3.3V_ALW
+1.2V_ALW_AVDD+3.3V_ALW
+1.2V_ALW_AVDD
+2.5V_ALW_AVDD
+1.2V_ALW_AVDD
+2.5V_ALW_AVDD
+2.5V_ALW_AVDD
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+SC_VCC
+3.3V_ALW
+3.3V_ALW_PCH
+3.3V_ALW
USBP7-18
USBP7+18
CLK_PCI_TPM16
LPC_LAD015,32,39,40
LPC_LAD115,32,39,40
LPC_LAD215,32,39,40
LPC_LAD315,32,39,40
IRQ_SERIRQ15,32,39,40
LPC_LFRAME#15,32,39,40
PLTRST_USH#18
SP_TPM_LPC_EN32,39
FP_USBD- 37
FP_USBD+ 37
FP_RESET# 37
CONTACTLESS_DET#15,19
USH_SMBCLK40
USH_SMBDAT40
USH_PWR_STATE#39
BCM5882_ALERT#39
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
USH BCM5882 (1/2)
31 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
USH BCM5882 (1/2)
31 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
USH BCM5882 (1/2)
31 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Hardware enable for USH TPM:Populate R841,
No Stuff R483.
Hardware disable for USH TPM:No Stuff
R841, Populate R483
Component
R494,R498
RFID MODE
CURRENTVOLTAGE
R555,R633
R634
150P
C641,C647
D28,D29 POP
D31-D34
NOPOP
POP
NOPOP
NOPOP
NOPOP
NOPOP
NOPOP3K
3K
3K
Smart Card
RFID
SC_VCC should be 3X wide as
regular SC trace width to carry
~60mA max. current per ISO spec
C1031 and C646 should be p
laced very close to SC cage pin
C595 should be placed
closer to pin A5
All XTAL components and traces should be
placed/layout on top layer. The gnd/pwr
layer below will provide shielding from
27.12Mhz interference which might affect
cellular certification.
Place C718 close
to U33 pin15
R773 0_0402_5%~DR773 0_0402_5%~D
1 2
C706
10U_0805_10V6M~D
C706
10U_0805_10V6M~D
1
2
R843 4.7K_0402_5%~DR843 4.7K_0402_5%~D
1 2
T155 PAD~ D
@
T155 PAD~ D
@
C605
1U_0402_6.3V6K~D
C605
1U_0402_6.3V6K~D
1
2
R486 10M_0402_5%~D
@
R486 10M_0402_5%~D
@
1 2
C1177
10U_0603_6.3V6M~D
C1177
10U_0603_6.3V6M~D
1
2
R1496
4.7K_0402_5%~D
R1496
4.7K_0402_5%~D
1 2
U33
TDA8034HN_HVQFN24_4X4~D
U33
TDA8034HN_HVQFN24_4X4~D
AUX2 11
GND 12
CLK 13
CLKDIV2
7CLKDIV1
6
PRESN 8
VDD(intf) 1
VDD 17
AUX1UC
21
EN_5V/3VN
2
RSTIN
3
XTAL1
23
AUX2UC
22
RST 14
I/OUC
20
OFFN
19
PORadj
18
VDDP 16
I/O 9
EN_1.8VN
4
CMDVCCN
5VCC 15
AUX1 10
XTAL2 24
GPAD
25
JCS1
TYCO_2041084-6~D
JCS1
TYCO_2041084-6~D
1
1
2
2
3
3
4
4
5
5
6
6G1 7
G2 8
R490 2.2K_0402_5%~DR490 2.2K_0402_5%~D
1 2
R633
15K_0402_1%~D
R633
15K_0402_1%~D
12
T145PAD~D
@
T145PAD~D
@
T149PAD~D
@
T149PAD~D
@
R1468
1.5K_0402_5%~D
R1468
1.5K_0402_5%~D
1 2
R775
0_0402_5%~D
R775
0_0402_5%~D
12
L37
BLM18BB100SN1D_2P~D
L37
BLM18BB100SN1D_2P~D
12
R1501
1K_0402_5%~D
@R1501
1K_0402_5%~D
@
1 2
R844 4.7K_0402_5%~DR844 4.7K_0402_5%~D
12
C606
1U_0402_6.3V6K~D
C606
1U_0402_6.3V6K~D
1
2
R537 4.7K_0402_5%~DR537 4.7K_0402_5%~D
1 2
R538 4.7K_0402_5%~D@R538 4.7K_0402_5%~D@
1 2
R767 0_0402_5%~DR767 0_0402_5%~D
12
R618 0_0402_5%~DR618 0_0402_5%~D
1 2
R744
10_0402_5%~D
R744
10_0402_5%~D
12
C620
0.1U_0402_16V4Z~D
C620
0.1U_0402_16V4Z~D
1
2
T158PAD~D
@
T158PAD~D
@
R896
0_0402_5%~D
@
R896
0_0402_5%~D
@
1 2
C595 0.01U_0402_25V7K~DC595 0.01U_0402_25V7K~D
1 2
Y3
27.12MHZ_12PF_1N227120CC0B~D
Y3
27.12MHZ_12PF_1N227120CC0B~D
IN
1
GND
2
OUT 3
GND 4
R907
0_0402_5%~D
@
R907
0_0402_5%~D
@
1 2
C646
0.22U_0402_6.3V6K~D
C646
0.22U_0402_6.3V6K~D
1
2
C1015
10P_0402_50V8J~D
C1015
10P_0402_50V8J~D
1
2
T157 PAD~ D
@
T157 PAD~ D
@
L72
150NH_LLQ1608-FR15G_2%~D
L72
150NH_LLQ1608-FR15G_2%~D
1 2
T154 PAD~ D
@
T154 PAD~ D
@
R620 0_0402_5%~DR620 0_0402_5%~D
1 2
C1031
10U_0805_10V4Z~D
@C1031
10U_0805_10V4Z~D
@
1
2
BCM5882
U32C
BCM5882KFBG-ES-B0_FBGA196~D
BCM5882
U32C
BCM5882KFBG-ES-B0_FBGA196~D
HF_RFIDTAG_VRX_P
A6
HF_RFIDTAG_VTX
C5
HF_TX_P A8
HF_RX_TEST0 B9
HF_RFIDTAG_VRX_N
B6
HF_RFIDTAG_VREF
A5
HF_RFIDTAG_DVDD1P2
B4
HF_RFIDTAG_AVDD2P5_C6
C6
HF_RFIDTAG_AVSS_D6
D6
HF_RFIDTAG_DVSS
A4
HF_RFIDTAG_AVDD2P5_E6
E6
HF_RFIDTAG_AVSS_B5
B5
HF_TX_N B8
HF_RX_P A10
HF_RX_N B10
HF_RX_TEST1 C9
HF_RX_TEST2 C10
HF_RX_TEST3 E9
HF_TX_AVDD1P2 D7
HF_RX_AVDD1P2 F8
HF_RX_ADC_AVDD1P2 D10
HF_RX_AVDD2P5 F9
HF_TX_AVDD2P5 A7
HF_TX_AVDD3P3_D8 D8
HF_TX_AVDD3P3_B7 B7
HF_TX_AVSS_C7 C7
HF_TX_AVSS_C8 C8
HF_TX_AVSS_E7 E7
HF_RX_AVSS_A9 A9
HF_RX_AVSS_B11 B11
HF_RX_ADC_AVSS1 E8
HF_RX_ADC_AVSS2 D9
R469
0_0402_5%~D
R469
0_0402_5%~D
1 2
R555
15K_0402_1%~D
R555
15K_0402_1%~D
12
R553 4.7K_0402_5%~DR553 4.7K_0402_5%~D
1 2
D31
DA204U_SOT323-3~D
@D31
DA204U_SOT323-3~D
@
2
3
1
R743 1K_0402_5%~DR743 1K_0402_5%~D
1 2
G
D
S
Q209
SSM3K7002FU_SC70-3~D
G
D
S
Q209
SSM3K7002FU_SC70-3~D
2
13
C625
1U_0603_10V6K~D
C625
1U_0603_10V6K~D
1
2
R608 0_0402_5%~DR608 0_0402_5%~D
12
C1886
390P_0603_50V8G~D
C1886
390P_0603_50V8G~D
1
2
R772 22_0402_5%~DR772 22_0402_5%~D
1 2
C601
1U_0402_6.3V6K~D
C601
1U_0402_6.3V6K~D
1
2
C622
0.1U_0402_16V4Z~D
C622
0.1U_0402_16V4Z~D
1
2
R1459 0_0402_5%~DR1459 0_0402_5%~D
1 2
C718
.47U_0402_6.3V6-K~D
C718
.47U_0402_6.3V6-K~D
1
2
R738 1K_0402_5%~DR738 1K_0402_5%~D
1 2
C644
0.1U_0402_16V4Z~D
C644
0.1U_0402_16V4Z~D
1
2
R532 4.7K_0402_5%~DR532 4.7K_0402_5%~D
1 2
C608
12P_0402_50V8J~D
C608
12P_0402_50V8J~D
1
2
R615 0_0402_5%~DR615 0_0402_5%~D
1 2
R776
0_0402_5%~D
@R776
0_0402_5%~D
@
12
C1070
390P_0603_50V8G~D
C1070
390P_0603_50V8G~D
1
2
D32
DA204U_SOT323-3~D
@D32
DA204U_SOT323-3~D
@
2
3
1
C643
1U_0603_10V7K~D
C643
1U_0603_10V7K~D
1 2
R496 0_0402_5%~DR496 0_0402_5%~D
1 2
R1460 150_0402_5%~DR1460 150_0402_5%~D
1 2
U34
M45PE16-VMW6TG_SO8W8~D
U34
M45PE16-VMW6TG_SO8W8~D
D
1
C
2
RESET#
3
S#
4
Q8
VSS 7
VCC 6
W# 5
R630 4.7K_0402_5%~DR630 4.7K_0402_5%~D
1 2
R485
4.7K_0402_5%~D
R485
4.7K_0402_5%~D
1 2
R481
0_0402_5%~D
R481
0_0402_5%~D
1 2
R637 4.7K_0402_5%~DR637 4.7K_0402_5%~D
1 2
C1176
10U_0603_6.3V6M~D
C1176
10U_0603_6.3V6M~D
1
2
R483 4.7K_0402_5%~D6@ R483 4.7K_0402_5%~D6@
1 2
L71
150NH_LLQ1608-FR15G_2%~D
L71
150NH_LLQ1608-FR15G_2%~D
1 2
R766 0_0402_5%~DR766 0_0402_5%~D
12
R895
0_0402_5%~D
@
R895
0_0402_5%~D
@
1 2
R533 0_0402_5%~DR533 0_0402_5%~D
12
R619 0_0402_5%~DR619 0_0402_5%~D
1 2
R497 0_0402_5%~DR497 0_0402_5%~D
1 2
R488
3.3M_0402_5%~D
R488
3.3M_0402_5%~D
1 2
D33
DA204U_SOT323-3~D
@D33
DA204U_SOT323-3~D
@
2
3
1
T148PAD~D
@
T148PAD~D
@
R474 4.7K_0402_5%~D@R474 4.7K_0402_5%~D@
1 2
R739 1K_0402_5%~DR739 1K_0402_5%~D
1 2
C1071
390P_0603_50V8G~D
C1071
390P_0603_50V8G~D
1
2
R1510 4.7K_0402_5%~DR1510 4.7K_0402_5%~D
1 2
C628
1U_0603_10V6K~D
C628
1U_0603_10V6K~D
1
2
C627
1U_0603_10V6K~D
C627
1U_0603_10V6K~D
1
2
C709
10U_0805_10V6M~D
C709
10U_0805_10V6M~D
1
2
C589
4.7P_0402_50V8C~D
C589
4.7P_0402_50V8C~D
1
2
R629 2.2K_0402_5%~DR629 2.2K_0402_5%~D
1 2
R468
0_0402_5%~D
R468
0_0402_5%~D
1 2
C639
1U_0603_10V7K~D
C639
1U_0603_10V7K~D
1 2
R842 0_0402_5%~D@R842 0_0402_5%~D@
1 2
R492 0_0402_5%~DR492 0_0402_5%~D
1 2
C629
0.1U_0402_16V4Z~D
C629
0.1U_0402_16V4Z~D
1
2
C1887
390P_0603_50V8G~D
C1887
390P_0603_50V8G~D
1
2
C602
1U_0402_6.3V6K~D
C602
1U_0402_6.3V6K~D
1
2
R341 4.7K_0402_5%~DR341 4.7K_0402_5%~D
1 2
R899
0_0402_5%~D
@
R899
0_0402_5%~D
@
1 2
R621 0_0402_5%~DR621 0_0402_5%~D
1 2
R1048 0_0402_5%~DR1048 0_0402_5%~D
1 2
C632
0.1U_0402_16V4Z~D
C632
0.1U_0402_16V4Z~D
1
2
R908
0_0402_5%~D
@
R908
0_0402_5%~D
@
1 2
T156 PAD~ D
@
T156 PAD~ D
@
JSC1
FCI_10089709-010010LF~D
JSC1
FCI_10089709-010010LF~D
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
GND
11
GND
12
BCM5882
JTAG CLK
UART
U32D
BCM5882KFBG-ES-B0_FBGA196~D
BCM5882
JTAG CLK
UART
U32D
BCM5882KFBG-ES-B0_FBGA196~D
REFCLK_XTALIN
G14
RST_N
G1
JTAG_TCK
L1
REFCLK_XTALOUT
F14
JTAG_TDI
M1
JTAG_TDO
N1
JTAG_TMS
N2
JTAG_TRSTN
L3
JTCE
L2
OVSTB
E1
SCANACCMODE
E3
SECURE_BOOT
E2
TESTMODE
D1
POR_EXTR
J14
UART_TX_GPIO_1 D4
UART_RX_GPIO_0 C4
UART_CTS_GPIO_2 B3
UART_RTS_GPIO_3 A3
NC L14
GPIO_4 J1
GPIO_14 D2
GPIO_15 C2
GPIO_16 B1
CLKOUT D3
RSTOUT_N C1
POR_MONITOR J13
SWV K11
PLL_TESTOUT C13
C626
0.1U_0402_16V4Z~D
C626
0.1U_0402_16V4Z~D
1
2
C624
1U_0603_10V6K~D
C624
1U_0603_10V6K~D
1
2
C1014
0.1U_0402_16V4Z~D
C1014
0.1U_0402_16V4Z~D
1
2
D34
DA204U_SOT323-3~D
@D34
DA204U_SOT323-3~D
@
2
3
1
R1059 10K_0402_5%~D@R1059 10K_0402_5%~D@
1 2
C609
15P_0402_50V8J~D
C609
15P_0402_50V8J~D
1
2
R774 0_0402_5%~DR774 0_0402_5%~D
12
T150PAD~D
@
T150PAD~D
@
R841 4.7K_0402_5%~D5@ R841 4.7K_0402_5%~D5@
1 2
C633
10P_0402_50V8J~D
C633
10P_0402_50V8J~D
1
2
BCM5882
LPC
Smard Card
SPI
SM BUS
U32A
BCM5882KFBG-ES-B0_FBGA196~D
BCM5882
LPC
Smard Card
SPI
SM BUS
U32A
BCM5882KFBG-ES-B0_FBGA196~D
USBH_DN_0 P7
USBH_UP_0 P8
USBH_OC_0 P9
USBH_DN_1 P11
USBH_UP_1 P12
USBH_OC_1 P10
SSP_CLK0_GPIO_6 G3
SSP_FSS0_GPIO_7 G2
SSP_RXD0_GPIO_8 H1
SSP_TXD0_GPIO_9 H2
SSP_CLK1_GPIO_10 C3
SSP_FSS1_GPIO_11 B2
SSP_RXD1_GPIO_12 A2
SSP_TXD1_GPIO_13 A1
SC_CLK M11
SC_FCB M12
SC_SEL5V_GPIO_25 F2
SC_SEL18V_GPIO_26 F1
SC_DET M2
SC_IO L11
SC_RST M10
SC_PWR_N14 N14
SC_PWR_P14 P14
SC_VCC L10
USBD_DN
P5
USBD_UP
P6
USBD_ATTACH_GPIO_27
N7
LCLK
P2
LAD0_GPIO_20
N3
LAD1_GPIO_21
M4
LAD2_GPIO_22
K5
LAD3_GPIO_23
N4
LFRAME_N_GPIO_18
K4
LSERIRQ_GPIO_19
L4
LRESET_N_GPIO_17
M3
LPCEN
M5
LPCPD_N_GPIO_24
N6
SMBCLK
M9
SMBDAT
L9
SMBALERT_N
K9
SMB_GPIO_0
M7
CORE_PW RDN
P1
ALDO_PWRDN
E12
SMB_GPIO_1
N8
WAKEUP_N
L7
IDDQ_EN
K1
C631
1U_0603_10V6K~D
C631
1U_0603_10V6K~D
1
2
T147PAD~D
@
T147PAD~D
@
R626 2.2K_0402_5%~DR626 2.2K_0402_5%~D
1 2
R470 1.5K_0402_5%~DR470 1.5K_0402_5%~D
1 2
R472 0_0402_5%~DR472 0_0402_5%~D
12
R1503 0_0402_5%~D@R1503 0_0402_5%~D@
1 2
U19
W25X32VSSIG_SO8~D
@U19
W25X32VSSIG_SO8~D
@
CLK 6
GND
4DIO 5
DO
2
/WP
3
VCC 8
/HOLD 7
/CS
1
R466 0_0402_5%~DR466 0_0402_5%~D
1 2
C630
3.3U_0603_10V6K~D
C630
3.3U_0603_10V6K~D
1
2
R737 1K_0402_5%~DR737 1K_0402_5%~D
1 2
R491 100_0402_5%~DR491 100_0402_5%~D
1 2
G
D
S
Q208
SI2301BDS-T1-E3_SOT23-3~D
G
D
S
Q208
SI2301BDS-T1-E3_SOT23-3~D
2
1 3
C1021
4.7U_0603_6.3V6M~D
C1021
4.7U_0603_6.3V6M~D
1
2
R1034 4.7K_0402_5%~DR1034 4.7K_0402_5%~D
1 2
R894
0_0402_5%~D
@
R894
0_0402_5%~D
@
1 2
L36
BLM18BB100SN1D_2P~D
L36
BLM18BB100SN1D_2P~D
12
T143PAD~D
@
T143PAD~D
@
R1049 0_0402_5%~DR1049 0_0402_5%~D
1 2
L38
BLM18BB100SN1D_2P~D
L38
BLM18BB100SN1D_2P~D
12
R897
0_0402_5%~D
@
R897
0_0402_5%~D
@
1 2
R484 4.7K_0402_5%~DR484 4.7K_0402_5%~D
1 2
R493 0_0402_5%~DR493 0_0402_5%~D
1 2
R476
5.1M_0402_5%~D
R476
5.1M_0402_5%~D
1 2
R810 4.7K_0402_5%~DR810 4.7K_0402_5%~D
1 2
R771 0_0402_5%~DR771 0_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R
C_TPM_LPC_EN
LPC_LFRAME#_R
PCI_RST#_R
CLKRUN#_R
TCM_BA1
TCM_BA0
TCM_BA0
TCM_BA1
JETWAY_PIN5
JETWAY_PIN5
JETWAY_CLK14M
+1.2V_ALW_AVDD
+2.5V_ALW_AVDD
+1.2V_ALW_PLL
+1.2V_ALW_PLL
+1.2V_ALW_PLL
+3.3V_ALW
+VDDC_5882
+3.3V_ALW
+3.3V_ALW
+SC_PWR
+VDDC_5882
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
SP_TPM_LPC_EN31,39
LPC_LAD015,31,39,40
LPC_LAD215,31,39,40
LPC_LAD115,31,39,40
LPC_LAD315,31,39,40
CLK_PCI_TPM_CHA16
LPC_LFRAME#15,31,39,40
PCH_PLTRST#_EC8,18,34,36,39,40
IRQ_SERIRQ15,31,39,40
CLKRUN#17,39,40
JETWAY_CLK14M 16
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
USH BCM5882 (2/2)
32 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
USH BCM5882 (2/2)
32 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
USH BCM5882 (2/2)
32 69Thursday, January 21, 2010
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
LOW:Power Down Mode
High:Working Mode
USH BCM5882 and China TCM Z8H172T Option
All 3@ POP
POP
POP
@
@
@
@
@
@
PART/PIN Ref Des TCM Enable
TCM circuit
POP
SIO 5028 ->SP_TPM_LPC_EN
TPM Enable ALL TPM/TCM Disable
@
@
@
PU R787PCH GPIO39 ->TPM_ID1
PD R339 POP @
PU R841
PD R483
PU R273
PD R922
PU R788
@
@
@@
PCH GPIO38 ->TPM_ID0 POP
POP
POP
POP @
Jetway
R1026, R1023, C23, C1174
C1175, R910
NationZ
TCM Vender POP
USH_LPCEN
China TCM: NationZ & Jetway co-lay
R1025
10K_0402_5%~D
@
R1025
10K_0402_5%~D
@
12
C599
1U_0402_6.3V6K~D
C599
1U_0402_6.3V6K~D
1
2
R909 0_0402_5%~D3@ R909 0_0402_5%~D3@ 1 2
C1178
10U_0603_6.3V6M~D
C1178
10U_0603_6.3V6M~D
1
2
C1173
0.1U_0402_16V4Z~D
3@
C1173
0.1U_0402_16V4Z~D
3@
1
2
R1023
1K_0402_5%~D
3@
R1023
1K_0402_5%~D
3@
12
C875
1U_0402_6.3V6K~D
C875
1U_0402_6.3V6K~D
1
2
R904 0_0402_5%~D3@ R904 0_0402_5%~D3@ 1 2
C616
1U_0402_6.3V6K~D
C616
1U_0402_6.3V6K~D
1
2
C877
1U_0402_6.3V6K~D
C877
1U_0402_6.3V6K~D
1
2
C597
1U_0402_6.3V6K~D
C597
1U_0402_6.3V6K~D
1
2
C614
1U_0402_6.3V6K~D
C614
1U_0402_6.3V6K~D
1
2
R1026
1K_0402_5%~D
3@
R1026
1K_0402_5%~D
3@
12
C598
1U_0402_6.3V6K~D
C598
1U_0402_6.3V6K~D
1
2
C619
1U_0402_6.3V6K~D
C619
1U_0402_6.3V6K~D
1
2
R902 0_0402_5%~D3@ R902 0_0402_5%~D3@ 1 2
C636
1U_0402_6.3V6K~D
C636
1U_0402_6.3V6K~D
1
2
C593
1U_0402_6.3V6K~D
C593
1U_0402_6.3V6K~D
1
2
R906 0_0402_5%~D3@ R906 0_0402_5%~D3@ 1 2
C1171
0.1U_0402_16V4Z~D
3@
C1171
0.1U_0402_16V4Z~D
3@
1
2
C873
1U_0402_6.3V6K~D
C873
1U_0402_6.3V6K~D
1
2
C637
1U_0402_6.3V6K~D
C637
1U_0402_6.3V6K~D
1
2
C613
1U_0402_6.3V6K~D
C613
1U_0402_6.3V6K~D
1
2
C592
1U_0402_6.3V6K~D
C592
1U_0402_6.3V6K~D
1
2
U24
SSX44-B_TSSOP28~D
3@ U24
SSX44-B_TSSOP28~D
3@
LAD3
17 LAD2
20 LAD1
23 LAD0
26
LCLK
21
LFRAME#
22
LRESET#
16
SERIRQ
27
CLKRUN#
15
PP
7NC_1 1
NC_2 2
NC_6 6
NC_8 8
BA_0
9
VDD_0 10
VDD_1 19
VDD_2 24
GND_4 4
GND_11 11
GND_18 18
GND_25 25
BA_1
3
NC_5 5
NC_12 12
NC_13 13
NC_P 14
LPCPD#
28
C615
1U_0402_6.3V6K~D
C615
1U_0402_6.3V6K~D
1
2
C23
1U_0402_6.3V6K~D
3@
C23
1U_0402_6.3V6K~D
3@
1
2
C617
1U_0402_6.3V6K~D
C617
1U_0402_6.3V6K~D
1
2
C638
1U_0402_6.3V6K~D
C638
1U_0402_6.3V6K~D
1
2
C1180
10U_0603_6.3V6M~D
C1180
10U_0603_6.3V6M~D
1
2
C596
1U_0402_6.3V6K~D
C596
1U_0402_6.3V6K~D
1
2
C1017
4.7U_0603_6.3V6M~D
C1017
4.7U_0603_6.3V6M~D
1
2
C612
1U_0402_6.3V6K~D
C612
1U_0402_6.3V6K~D
1
2
C1027
0.1U_0402_16V4Z~D
C1027
0.1U_0402_16V4Z~D
1
2
BCM5882
U32B
BCM5882KFBG-ES-B0_FBGA196~D
BCM5882
U32B
BCM5882KFBG-ES-B0_FBGA196~D
AVDD_1P2I_REF
H14
AVDD_1P2O_A11
A11
AVDD_1P2O_A12
A12
AVDD_2P5I
H13
AVDD_2P5O_E10
E10
AVDD_2P5O_E11
E11
AVDD25_LDO12_A13
A13
AVDD25_LDO12_B12
B12
AVDD25_PLL_A14
A14
AVDD33_LDO25
D11
OTP_PWR
P13
PLL_AVDD_1P2I
D14
PLL_AVDD_1P2O
E14
PLL_DVDD_1P2I
C14
VDDC_D13
D13
VDDC_F3
F3
VDDC_J4
J4
VDDC_J5
J5
VDDC_J6
J6
VDDC_J10
J10
VDDC_J11
J11
VDDC_K7
K7
VDDC_K8
K8
VDDO_33_E4
E4
VDDO_33_J2
J2
VDDO_33_K3
K3
VDDO_33_L8
L8
VDDO_33_N10
N10
VDDO_33CORE_G4
G4
AVSS_LDO25_B13 B13
AVSS_REF F13
POR_AVSS G13
VSSC_F4 F4
VSSC_F5 F5
VSSC_F6 F6
AVSS_LDO12 C11
VSSC_F10 F10
VSSC_F7 F7
VDDC_J7
J7
VDDC_J8
J8
VDDO_33CORE_H3
H3
VDDO_33CORE_H4
H4
VDDO_33CORE_J3
J3
VDDO_33SC_M13
M13
VDDO_33SC_N13
N13
VDDO_LPC_L6
L6
VDDO_LPC_M6
M6
VDDO_SC_K10
K10
VDDO_SC_K12
K12
VDDO_SC_L12
L12
VDDO_SC_L13
L13
VDDO_VAR_D5
D5
VDDO_VAR_E5
E5
VESD
N5
AVSS_LDO25_C12 C12
AVSS_PLL B14
PLL_AVSS D12
PLL_DVSS E13
VSSC_F11 F11
VSSC_F12 F12
VSSC_G5 G5
VSSC_G6 G6
VSSC_G7 G7
VSSC_G8 G8
VSSC_G9 G9
VSSC_G10 G10
VSSC_G11 G11
VSSC_G12 G12
VSSC_H5 H5
VSSC_H6 H6
VSSC_H7 H7
VSSC_H8 H8
VSSC_H9 H9
VSSC_H10 H10
VSSC_H11 H11
VSSC_H12 H12
VSSC_J9 J9
VSSC_J12 J12
VSSC_K2 K2
VSSC_K6 K6
VSSC_K13 K13
VSSC_K14 K14
VSSC_L5 L5
VSSC_M8 M8
VSSC_M14 M14
VSSC_N9 N9
VSSC_N11 N11
VSSC_N12 N12
VSSC_P3 P3
VSSC_P4 P4
R901 0_0402_5%~D3@ R901 0_0402_5%~D3@ 1 2
R903 0_0402_5%~D3@ R903 0_0402_5%~D3@ 1 2
R1022
10K_0402_5%~D
@
R1022
10K_0402_5%~D
@
12
C1179
10U_0603_6.3V6M~D
C1179
10U_0603_6.3V6M~D
1
2
C635
1U_0402_6.3V6K~D
C635
1U_0402_6.3V6K~D
1
2
C1174
10U_0603_6.3V6M~D
3@
C1174
10U_0603_6.3V6M~D
3@
1
2
C1172
0.1U_0402_16V4Z~D
3@
C1172
0.1U_0402_16V4Z~D
3@
1
2
C1175
0.1U_0402_16V4Z~D
@C1175
0.1U_0402_16V4Z~D
@
1
2
C621
1U_0402_6.3V6K~D
C621
1U_0402_6.3V6K~D
1
2
C618
1U_0402_6.3V6K~D
C618
1U_0402_6.3V6K~D
1
2
R905 0_0402_5%~D3@ R905 0_0402_5%~D3@ 1 2
R1210 4.7K_0402_5%~D@R1210 4.7K_0402_5%~D@
1 2
R893 0_0402_5%~D3@ R893 0_0402_5%~D3@ 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPAN0
TPAP0
TPBP0
TPBIAS0
TPBN0
RREF
PLTRST_R5U242#
CPS
CPO
RXC
PCIE_PRX_PCMTX_N3_C
PCIE_PRX_PCMTX_P3_C
Z3008
TPBN0
TPBP0
TPAN0
TPAP0
TPBIAS0
R5U241_XO
R5U241_XI
VCC5EN#
VCC3EN#
VPPEN0
VPPEN1
SDDAT3/MMCDAT3_R
SDCMD/MMCCMD_R
SDCLK/MMC_CLK_R
SDDAT0/MMCDAT0_R
SDDAT1/MMCDAT1_R
SDDAT2/MMCDAT2_R
MMCDAT4
MMCDAT5
MMCDAT6
MMCDAT7
SDWP
SDCLK/MMC_CLK
SDWP
SDDAT2/MMCDAT2
SDCD#/MMCCD#
SDDAT3/MMCDAT3
SDDAT1/MMCDAT1
MMCDAT4
SDDAT0/MMCDAT0
SDCMD/MMCCMD
MMCDAT7
MMCDAT5
MMCDAT6
SDCLK/MMC_CLK
SD_DET#
SDDAT1/MMCDAT1
SDDAT0/MMCDAT0
SDCMD/MMCCMD
SDDAT3/MMCDAT3
SDDAT2/MMCDAT2
SDCD#/MMCCD#
+3.3V_RUN_CARD
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+CBS_VPP
+3.3V_RUN
+CBS_VCC
+5V_RUN
+3.3V_RUN_CARD
+PCIE_PHY
+3.3V_RUN_CARDPLTRST_R5U242#18
PCIE_PRX_PCMTX_P316
PCIE_PTX_PCMRX_N3_C16
PCIE_PTX_PCMRX_P3_C16
PCIE_PRX_PCMTX_N316
CLK_PCIE_PCM#16
CLK_PCIE_PCM16
VPPEN034
VPPEN134
VCC3EN#34
VCC5EN#34
SD_DET#18
TPAP0 37
TPAN0 37
TPBP0 37
TPBN0 37
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
R5U242 (1/2)
33 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
R5U242 (1/2)
33 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
R5U242 (1/2)
33 69Thursday, January 21, 2010
Compal Electronics, Inc.
Close to U94
CMD
10
09 D4
D3
D2
-
-
-
WP#
WE#
ALE
CLE
CE#
RE#
R/B#
D7
D6
D5
D4
D3
D2
D1
D0
BS
D4
D3
D2
-
-
-
D1
D0
D7
D6
CLK
-
D5
WP
-
MFIO Pin Assignment Table
MFIO SD8 MS8XD
01 D1
D0
D7
D6
CLK
-
00
03
02
04
06
05
07
12
13
D5
11
14
08
only for MMC/SD
Place close to
JSD1.9
C21 need to change
47uF for R5U242
C707,C705,R1148 as close
as possible to U94
C710,C713 as close
as possible to U94
C645,Close to U94.C10
C603,Close to U94.J4/K3
C695,Close to U94.M13
C697,Close to U94.M11/N11
C698,Close to U94.J3
C699,Close to U94.C8
SD Conn.
Pitch=0.5
R8 Close to U94
SDCLK/MMC_CLK
need shield GND
Crystal close to U94
C701,C702 Close to U94.D7
C703,Close to U94.D13
R46:
For R5U241 should be 0 ohm,
R5U242 should be 1uF
2A Current Capacity Required
between R5U242 and SD Card Slot
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
R1146
0_0402_5%~D
R1146
0_0402_5%~D
1 2
R34 0_0402_5%~DR34 0_0402_5%~D
1 2
C491
10P_0402_50V8J~D
C491
10P_0402_50V8J~D
1
2
C695
0.1U_0402_16V4Z~D
C695
0.1U_0402_16V4Z~D
1
2
R399
54.9_0402_1%~D
R399
54.9_0402_1%~D
12
R403
54.9_0402_1%~D
R403
54.9_0402_1%~D
12
C498
1U_0402_6.3V6K~D
C498
1U_0402_6.3V6K~D
1
2
C495
1U_0402_6.3V6K~D
C495
1U_0402_6.3V6K~D
1
2
C699
0.1U_0402_16V4Z~D
C699
0.1U_0402_16V4Z~D
1
2
R1464
150K_0402_5%~D
R1464
150K_0402_5%~D
12
U27
R5531V002-E2-FA_SSOP16~D
U27
R5531V002-E2-FA_SSOP16~D
VCC3IN
11
NC 10
VCC5_EN
1
EN0
3
EN1
4
FLG
5
VCCOUT 12
VCCOUT 14
VCC5IN
15
VCC3_EN
2
VPPOUT 8
NC 7
NC 6
GND
16
VCC5IN
13
VCCOUT 9
R398
54.9_0402_1%~D
R398
54.9_0402_1%~D
12
C767
0.1U_0402_16V4Z~D
C767
0.1U_0402_16V4Z~D
1
2
C494
270P_0402_50V7K~D
C494
270P_0402_50V7K~D 1
2
R401
54.9_0402_1%~D
R401
54.9_0402_1%~D
12
C645
0.1U_0402_16V4Z~D
C645
0.1U_0402_16V4Z~D
1
2
C496
0.1U_0402_16V4Z~D
C496
0.1U_0402_16V4Z~D
1
2
C698
0.1U_0402_16V4Z~D
C698
0.1U_0402_16V4Z~D
1
2
R421 0_0402_5%~DR421 0_0402_5%~D
12
C499
0.1U_0402_16V4Z~D
C499
0.1U_0402_16V4Z~D
1
2
R31 0_0402_5%~DR31 0_0402_5%~D
1 2
C713 0.1U_0402_10V7K~DC713 0.1U_0402_10V7K~D
1 2
C703
0.1U_0402_16V4Z~D
C703
0.1U_0402_16V4Z~D
1
2
R1148
5.1K_0402_1%~D
R1148
5.1K_0402_1%~D
12
C493
0.33U_0603_10V7K~D
C493
0.33U_0603_10V7K~D
1
2
R407
5.1K_0402_1%~D
R407
5.1K_0402_1%~D
1 2
C702
1U_0402_6.3V6K~D
C702
1U_0402_6.3V6K~D
1
2
C697
0.1U_0402_16V4Z~D
C697
0.1U_0402_16V4Z~D
1
2
R32 0_0402_5%~DR32 0_0402_5%~D
1 2
X3
24.576MHZ_12PF_X5H024576FC1H~D
X3
24.576MHZ_12PF_X5H024576FC1H~D
1 2
C710 0.1U_0402_10V7K~DC710 0.1U_0402_10V7K~D
1 2
C21
47U_0805_6.3V6M~D
C21
47U_0805_6.3V6M~D
1
2
C700
10U_0805_10V4Z~D
C700
10U_0805_10V4Z~D
1
2
C497
10U_0805_10V4Z~D
@
C497
10U_0805_10V4Z~D
@
1
2
C705
1500P_0402_7K~D
C705
1500P_0402_7K~D
1
2
C514
15P_0402_50V8J~D
C514
15P_0402_50V8J~D
12
R36 0_0402_5%~DR36 0_0402_5%~D
1 2
C515
15P_0402_50V8J~D
C515
15P_0402_50V8J~D
12
PCIe / Power /
1394 / MultiCard
U94A
R5U242-ES3-CSP144P_CSP144~D
PCIe / Power /
1394 / MultiCard
U94A
R5U242-ES3-CSP144P_CSP144~D
XO
B8 XI
A8 VCC_3V0 C10
PCIE_VOUT0 C8
PCIE_VOUT1 J3
PCIE_VIN0 M13
AVCC_3V D7
MF_VOUT D13
SD18C D8
GND0 A7
GND1 B7
GND2 C6
GND3 D11
GND9 L8
GND4 E12
GND5 E13
USBDP
H1
USBDM
H2
AGND0 K11
AGND1 L12
GND8 K4
GND10 M9
GND11 N9
PCIE_VIN1 M11
PCIE_VIN2 N11
VCC_3V1 J4
VCC_3V2 K3
GND12 L5
TPAP0
A5
TPAN0
B5
TPBIAS0
C7
TPBP0
A6
TPBN0
B6
CPS
D4
RXP
N10
RXN
M10
TXP
N12
TXN
N13
REFCLKP
N8
REFCLKN
M8
MFCD0#
F11
MFCD1#
G11
MFIO00
H13
MFIO01
H12
MFIO02
G13
MFIO03
G12
MFIO04
F13
MFIO05
F12
MFIO06
D12
MFIO07
D10
MFIO08
C13
MFIO09
C12
MFIO10
B13
MFIO11
C11
MFIO12
A13
MFIO13
B12
MFIO14
A12
PERST#
M12
RXC
L9
CPO
L10
RREF
L11
MFCD2#
G10
C1889
1U_0402_6.3V6K~D
C1889
1U_0402_6.3V6K~D
1
2
C707
0.022U_0402_16V7K~D
C707
0.022U_0402_16V7K~D
1
2
R35 0_0402_5%~DR35 0_0402_5%~D
1 2
C500
0.01U_0402_16V7K~D
@
C500
0.01U_0402_16V7K~D
@
1
2
R8 22_0402_5%~DR8 22_0402_5%~D
1 2
C603
0.1U_0402_16V4Z~D
C603
0.1U_0402_16V4Z~D
1
2
C701
0.1U_0402_16V4Z~D
C701
0.1U_0402_16V4Z~D
1
2
JSD1
HRS_FH12-16S-0P5SH(55)~D
JSD1
HRS_FH12-16S-0P5SH(55)~D
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
G1
17
G2
18
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CBS_CAD25
CBS_CAD18
CBS_CAD26
CBS_CAD20
CBS_CAD21
CBS_CAD24
CBS_CAD22
CBS_CAD14
CBS_CAD12
CBS_CAD9
CBS_CAD23
CBS_CAD15
CBS_CAD16
CBS_CAD17
CBS_CAD13
CBS_CAD11
CBS_CAD10
CBS_CAD6
CBS_CAD29
CBS_CAD4
CBS_CAD1
CBS_CAD0
CBS_CAD3
CBS_CAD27
CBS_CAD30
CBS_CAD7
CBS_CAD2
CBS_CAD5
CBS_CAD28
CBS_CAD31
CBS_CAD19
CBS_CAD8
SPKROUT
CARD_SMBDAT
CARD_SMBCLK
CBS_CC/BE0#
CBS_CC/BE3#
CBS_CC/BE1#
CBS_CC/BE2#
CBS_CCLKRUN#
CBS_CPAR
CBS_CSTSCHNG
CBS_CDEVSEL#
CBS_CTRDY#
CBS_CBLOCK#
CBS_CFRAME#
CBS_CIRDY#
CBS_CSTOP#
CBS_CPERR#
CBS_CSERR#
CBS_CREQ#
CBS_CGNT#
PWR_ON_RST
PWR_ON_RST
CBS_CCD2#
CBS_CCD1#
CBS_CRST#
VPPEN0
VPPEN1
VCC5EN#
VCC3EN#
CBS_CCLK_R
CBS_CINT#
CBS_CCLK
CBS_CAUDIO
CBS_DATA18
CBS_DATA14
CBS_DATA2
CBS_CVS2
CBS_CVS1
EXPRCRD_STBY_R#
PCH_PLTRST#_EC
CARD_RESET#
CBS_CCLK
CBS_CAD20
CBS_CAD18
CBS_CC/BE2#
CBS_CIRDY#
CBS_CAD21
CBS_CAD22
CBS_CAD24
CBS_CAD23
CBS_CAD25
CBS_CAD27
CBS_CAD26
CBS_CCLKRUN#
CBS_CAD29
CBS_DATA2
CBS_CAD0
CBS_CAD5
CBS_CAD3
CBS_CAD1
CBS_CAD7
CBS_CC/BE0#
CBS_CAD11
CBS_CAD9
CBS_CAD12
CBS_CAD14
CBS_CC/BE1#
CBS_CPAR
CBS_CINT#
CBS_CPERR#
CBS_CGNT#
CBS_DATA14
CBS_CAD2
CBS_CCD1#
CBS_CAD4
CBS_CAD6
CBS_CAD8
CBS_CVS1
CBS_CTRDY#
CBS_CAD17
CBS_CFRAME#
CBS_CAD19
CBS_CVS2
CBS_CSTOP#
CBS_CDEVSEL#
CBS_CAD10
CBS_CAD28
CBS_CC/BE3#
CBS_CSERR#
CBS_CREQ#
CBS_CRST#
CBS_CCD2#
CBS_CAD30
CBS_CAD31
CBS_DATA18
CBS_CAUDIO
CBS_CAD16
CBS_CSTSCHNG
CBS_CAD15
CBS_CAD13
CBS_CBLOCK#
CPUSB#
EXPRCRD_CPPE#
CARD_RESET#
USBP10_D+
USBP10_D-
CPUSB#
PCIE_WAKE#
CARD_SMBCLK
CARD_SMBDAT
EXPRCRD_CPPE#
+CBS_VCC
+CBS_VPP
+CBS_VCC
+CBS_VPP
+CBS_VCC
+CBS_VPP
+3.3V_CARD
+3.3V_SUS
+1.5V_RUN
+3.3V_CARDAUX
+1.5V_CARD
+3.3V_SUS +3.3V_RUN
+3.3V_CARD
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_CARDAUX
+1.5V_CARD
CARD_SMBDAT40
CARD_SMBCLK40
PCH_PLTRST#_EC8,18,32,36,39,40
EXPRCRD_PWREN#39
EXPRCRD_STDBY#39
VPPEN133
VPPEN033
VCC3EN#33
VCC5EN#33
EXPRCRD_DET#39
CLK_PCIE_EXP# 16
CLK_PCIE_EXP 16
PCIE_PRX_EXPTX_N4 16
PCIE_PRX_EXPTX_P4 16
PCIE_PTX_EXPRX_N4_C 16
PCIE_PTX_EXPRX_P4_C 16
EXPCLK_REQ# 16
USBP10+18
USBP10-18
PCIE_WAKE#36,39
PCMCLK_REQ#15,16
RUN_ON12,39,42,47,62
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
R5U242 (2/2)
34 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
R5U242 (2/2)
34 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
R5U242 (2/2)
34 69Thursday, January 21, 2010
Compal Electronics, Inc.
SROM: SPKROUT
Pull-Hi: Disable
Pull-Lo: Enable (Default)
+3.3V_CARD: Max. 1300mA, Average 1000mA
+1.5V_CARD: Max. 650mA, Average 500mA
Express Card BTB Conn.
Power-On-Reset: GBRST#
(Global Reset)
Note: De-asserted BEFORE
PERST# de-assertion
Close to JCBUS1 pin23,63
Close to JCBUS1 Pin18/52
R410 Close to U94, CBS_CCLK need shield GND
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
JEXP1
LOTES_YEA-BTB-020-130K13
JEXP1
LOTES_YEA-BTB-020-130K13
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
G1
31
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
G2 32
R687 0_0402_5%~D@R687 0_0402_5%~D@1 2
U52
TPS2231MRGPR-1_QFN20_4X4~D
U52
TPS2231MRGPR-1_QFN20_4X4~D
3.3Vin
2
3.3Vin
43.3Vout 3
3.3Vout 5
SYSRST#
6
SHDN#
20
STBY#
1
PERST# 8
OC# 19
RCLKEN
18
AUX_IN
17 AUX_OUT 15
CPPE#
10
CPUSB#
9
NC 16
GND 7
1.5Vin
12
1.5Vin
14 1.5Vout 11
1.5Vout 13
C1000
0.1U_0402_16V4Z~D
C1000
0.1U_0402_16V4Z~D
1
2
R1151
47K_0402_5%~D
R1151
47K_0402_5%~D
12
L64
DLW21SN900SQ2_0805~D
L64
DLW21SN900SQ2_0805~D
1
1
4
433
22
C1001
0.1U_0402_16V4Z~D
C1001
0.1U_0402_16V4Z~D
1
2
C1016
10U_0805_6.3V6M~D
C1016
10U_0805_6.3V6M~D
1
2
C769
0.1U_0402_10V7K~D
C769
0.1U_0402_10V7K~D
1
2
R410
0_0402_5%~D
R410
0_0402_5%~D
12
C135
0.1U_0402_16V4Z~D
C135
0.1U_0402_16V4Z~D
1
2
C999
0.1U_0402_16V4Z~D
C999
0.1U_0402_16V4Z~D
1
2
C1003
10U_0805_6.3V6M~D
C1003
10U_0805_6.3V6M~D
1
2
R1150
47K_0402_1%~D
R1150
47K_0402_1%~D
12
C1006
0.1U_0402_16V4Z~D
C1006
0.1U_0402_16V4Z~D
1
2
C541
0.01U_0402_16V7K~D
C541
0.01U_0402_16V7K~D
1
2
R792 0_0402_5%~D@R792 0_0402_5%~D@
1 2
R684 0_0402_5%~DR684 0_0402_5%~D
1 2
R947
100K_0402_5%~D
R947
100K_0402_5%~D
1 2
R791 0_0402_5%~D@R791 0_0402_5%~D@1 2
C1005
0.1U_0402_16V4Z~D
C1005
0.1U_0402_16V4Z~D
1
2
C134
0.1U_0402_16V4Z~D
C134
0.1U_0402_16V4Z~D
1
2
C1007
0.1U_0402_16V4Z~D
C1007
0.1U_0402_16V4Z~D
1
2
C997
0.1U_0402_16V4Z~D
C997
0.1U_0402_16V4Z~D
1
2
C543
10U_0805_10V4Z~D
C543
10U_0805_10V4Z~D
1
2
R1152
47K_0402_5%~D
@R1152
47K_0402_5%~D
@
12
CARDBUS / MEDIA CARD / SD Card
U94B
R5U242-ES3-CSP144P_CSP144~D
CARDBUS / MEDIA CARD / SD Card
U94B
R5U242-ES3-CSP144P_CSP144~D
VPPEN1
D9
IORD# D1
CDATA15 B1
VPPEN0
E10
CADR25 L2
IOWR# E1
VCC3EN#
F10
CDATA14 B2
OE# C1
CADR24 K2
CDATA13 B3
VCC5EN#
E11
WE# F4
CE2# D3
CDATA12 C4
CADR23 H4
CE1# D5
CDATA11 B4
REG# L4
CADR22 J1
CDATA10 M7
RESET N1
CDATA9 M6
WAIT# N2
CADR21 G3
WP#/IOIS16# L7
CDATA8 M5
CADR20 F3
RDY/IREQ# G4
CADR19 G2
CDATA7 A1
CADR18 F2
BVD2 L6
CDATA6 A2
CADR17 E2
CADR16 H3
CDATA5 A3
CADR15 J2
BVD1 K7
CADR14 G1
CADR13 F1
CDATA4 A4
CADR12 K1
CADR11 C2
CDATA3 C5
CADR10 C3
VS2# K5
CADR9 D2
CADR8 E3
CDATA2 N7
CADR7 L1
CADR6 M1
CDATA1 N6
CADR5 M2
VS1# E4
CADR4 L3
CADR3 M3
CDATA0 N5
CADR2 N3
CD2# K8
CADR1 N4
CADR0 M4
CD1# D6
INPACK# K6
GND
C9
GND
A9
GND
B9
GND
B11
GND
A11
NC
H10
GND
B10
UDIO0
K13
UDIO1
K12
UDIO2
J13
UDIO3
J12
UDIO4
J11
UDIO5
H11
SPKROUT
J10
WAKE#
L13
GBRST#
K9
TEST
K10
GND
A10
R683 0_0402_5%~D@R683 0_0402_5%~D@1 2
JCBUS1
MOLEX_48315-0013_RT
JCBUS1
MOLEX_48315-0013_RT
GND1
1
CAD0
2
CAD1
3
CAD3
4
CAD5
5
CAD7
6
CCBE0#
7
CAD9
8
CAD11
9
CAD12
10
CAD14
11
CCBE1#
12
CPAR
13
CPERR#
14
CGNT#
15
CINT#
16
VCC
17
VPP1
18
CCLK
19
CIRDY#
20
CCBE2#
21
CAD18
22
CAD20
23
CAD21
24
CAD24
27
CAD22
25
CAD23
26
CAD25
28
CAD26
29
CB_D2
32
CAD27
30
CAD29
31
CCLKRUN#
33
GND2
34
CCD1# 36
CAD2 37
CAD4 38
CAD6 39
CAD10 42
CB_D14 40
CAD8 41
CVS1 43
CAD13 44
CAD16 46
CAD15 45
CB_D18 47
CBLOCK# 48
CSTOP# 49
CDEVSEL# 50
VCC 51
VPP2 52
CTRDY# 53
CFRAME# 54
CAD17 55
CAD19 56
CVS2 57
CRST# 58
CCBE3# 61
CSERR# 59
CREQ# 60
CAUDIO 62
CSTSCHG 63
CAD31 66
CAD28 64
CAD30 65
CCD2# 67
GND4 68
GND3 35
GND5
69
GND6
70 GND7 71
GND8 72
C542
0.01U_0402_16V7K~D
C542
0.01U_0402_16V7K~D
1
2
C1012
10U_0805_6.3V6M~D
C1012
10U_0805_6.3V6M~D
1
2
C708
1U_0603_25V6-K~D
C708
1U_0603_25V6-K~D
1
2
C1002
0.1U_0402_16V4Z~D
C1002
0.1U_0402_16V4Z~D
1
2
C1004
0.1U_0402_16V4Z~D
C1004
0.1U_0402_16V4Z~D
1
2
R127
2.2K_0402_5%~D
R127
2.2K_0402_5%~D
12
R126
2.2K_0402_5%~D
R126
2.2K_0402_5%~D
12
R81
0_0402_5%~D
R81
0_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_PRX_WWANTX_P1_SW
PCIE_PRX_WWANTX_N1_SW
SATA_PRX_WWANTX_P3
SATA_PRX_WWANTX_N3
PCIE_PTX_WWANRX_N1_C_SW
SATA_PTX_WWANRX_N3_C
SATA_PTX_WWANRX_P3_C
SATA_PTX_WWANRX_P3
SATA_PTX_WWANRX_N3
MCARD_PCIE_SATA#
PCIE_PTX_WWANRX_P1_C_SW
PCIE_PTX_WWANRX_P1_C_R
PCIE_PTX_WWANRX_N1_C_R
PCIE_PRX_WWANTX_P1_R
PCIE_PRX_WWANTX_N1_R
SATA_PRX_WWANTX_N3_C
SATA_PRX_WWANTX_P3_C
+1.5V_RUN
+15V_ALW +3.3V_ALW +3.3V_PCIE_SATA_WAN +3.3V_RUN
+3.3V_WLAN+3.3V_ALW+15V_ALW +3.3V_ALW+15V_ALW +3.3V_PCIE_BKT
PCIE_PTX_WANRX_P1_C 16
PCIE_PTX_WANRX_N1_C 16
PCIE_PRX_WANTX_P1 16
PCIE_PRX_WANTX_N1 16
PCIE_PRX_WWANTX_P1_SW36
PCIE_PRX_WWANTX_N1_SW36
PCIE_PTX_WWANRX_N1_C_SW36
PCIE_PTX_WWANRX_P1_C_SW36
MCARD_WWAN_PWREN39
SATA_PTX_WWANRX_P3_C 15
SATA_PTX_WWANRX_N3_C 15
MCARD_PCIE_SATA#36,39
SATA_PRX_WWANTX_N3_C 15
SATA_PRX_WWANTX_P3_C 15
AUX_EN_WOWL39 MCARD_PCIE_BKT_PWREN39
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCIE/SATA SW & PCIE PWR
35 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCIE/SATA SW & PCIE PWR
35 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PCIE/SATA SW & PCIE PWR
35 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A=B
A=C
Function
SEL
0
1
PCIE/SATA SW for Mini card1
For Asics placement estimate
Impedance please keep 90 ohm
Power Control for Mini card1
The pin-out of the SATA Mini Card module
was changed. The change was the RX-
& RX+ were swapped on the module.
Power Control for Mini card2 Power Control for Mini card3
R1326
0_0402_5%~D
2@ R1326
0_0402_5%~D
2@ 12
S
G
D
Q50
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q50
SI3456BDV-T1-E3_TSOP6~D
3
6
2
45
1
R451
100K_0402_5%~D
R451
100K_0402_5%~D
12
R431
100K_0402_5%~D
R431
100K_0402_5%~D
12
R1350
0_0402_5%~D
2@ R1350
0_0402_5%~D
2@ 12
S
G
D
Q47
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q47
SI3456BDV-T1-E3_TSOP6~D
3
6
2
45
1
R453
100K_0402_5%~D
R453
100K_0402_5%~D
12
C551
4700P_0402_25V7K~D
C551
4700P_0402_25V7K~D
1
2
C449 0.01U_0402_16V7K~D1@ C449 0.01U_0402_16V7K~D1@
12
Q192B
DMN66D0LDW-7_SOT363-6~D
Q192B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R432
100K_0402_5%~D
R432
100K_0402_5%~D
12
S
G
D
Q51
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q51
SI3456BDV-T1-E3_TSOP6~D
3
6
2
45
1
R452
100K_0402_5%~D
R452
100K_0402_5%~D
12
Q192A
DMN66D0LDW-7_SOT363-6~D
Q192A
DMN66D0LDW-7_SOT363-6~D
61
2
R1323
0_0402_5%~D
2@ R1323
0_0402_5%~D
2@ 12
R1523
20K_0402_5%~D
R1523
20K_0402_5%~D
12
R1322
0_0402_5%~D
2@ R1322
0_0402_5%~D
2@ 12
Q53B
DMN66D0LDW-7_SOT363-6~D
Q53B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R1524
20K_0402_5%~D
R1524
20K_0402_5%~D
12
R1349
0_0402_5%~D
2@ R1349
0_0402_5%~D
2@ 12
R1324
0_0402_5%~D
2@ R1324
0_0402_5%~D
2@ 12
R435
100K_0402_5%~D
R435
100K_0402_5%~D
12
C1714
0.1U_0402_16V4Z~D
1@ C1714
0.1U_0402_16V4Z~D
1@ 1
2
Q53A
DMN66D0LDW-7_SOT363-6~D
Q53A
DMN66D0LDW-7_SOT363-6~D
61
2
R1525
20K_0402_5%~D
R1525
20K_0402_5%~D
12
C571
4700P_0402_25V7K~D
C571
4700P_0402_25V7K~D
1
2
R504
0_0805_5%~D
@R504
0_0805_5%~D
@
1 2
Q193B
DMN66D0LDW-7_SOT363-6~D
Q193B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R1347
0_0402_5%~D
2@ R1347
0_0402_5%~D
2@ 12
R450
100K_0402_5%~D
R450
100K_0402_5%~D
12
Q193A
DMN66D0LDW-7_SOT363-6~D
Q193A
DMN66D0LDW-7_SOT363-6~D
61
2
C1393 0.01U_0402_16V7K~D1@ C1393 0.01U_0402_16V7K~D1@
12
R436
100K_0402_5%~D
R436
100K_0402_5%~D
12
C450 0.01U_0402_16V7K~D1@ C450 0.01U_0402_16V7K~D1@ 12
R1348
0_0402_5%~D
2@ R1348
0_0402_5%~D
2@ 12
U138
PI2DBS212ZHEX_TQFN28_5P5X3P5~D
1@ U138
PI2DBS212ZHEX_TQFN28_5P5X3P5~D
1@
NC 2
SEL
3
A0+
4
A0-
5
VDD 26
GND
27
VDD 28
TPAD
29
VDD 13
GND
12
VDD 11
A1+
6
A1-
7
NC 8
VDD 9
C0+ 18
VDD 19
GND
20
B1- 21
B1+ 22
B0- 23
B0+ 24
GND
25
GND
10 GND
1
C1- 15
C1+ 16
C0- 17
GND
14
C553
4700P_0402_25V7K~D
C553
4700P_0402_25V7K~D
1
2
C1715
0.1U_0402_16V4Z~D
1@ C1715
0.1U_0402_16V4Z~D
1@
1
2
C1394 0.01U_0402_16V7K~D1@ C1394 0.01U_0402_16V7K~D1@ 12
R437
100K_0402_5%~D
R437
100K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
UIM_VPP
UIM_DATA
UIM_RESET
UIM_CLK
PCIE_MCARD2_DET#
USBP5-
USBP5+
WWAN_RADIO_DIS#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
MINI1CLK_REQ#
PCIE_PRX_WWANTX_N1_SW
PCIE_PRX_WWANTX_P1_SW
PCIE_PTX_WWANRX_N1_C_SW
PCIE_PTX_WWANRX_P1_C_SW
USBP4-
USBP4+PCIE_MCARD1_DET#
LED_WLAN_OUT#
PCIE_PRX_WLANTX_P2
PCIE_PRX_WLANTX_N2
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C
WLAN_RADIO_DIS#_R
PCH_PLTRST#_EC
PCIE_WAKE#
COEX2_WLAN_ACTIVE
PCIE_MCARD2_DET#
WLAN_RADIO_DIS#_R
COEX2_WLAN_ACTIVE
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
LED_WWAN_OUT#
WIMAX_LED#
WIMAX_LED#
UIM_RESET
UIM_CLK
UIM_VPP
PCIE_MCARD1_DET#
PCIE_MCARD1_DET#
PCH_CL_RST1#_R
COEX1_BT_ACTIVE
LED_WWAN_OUT#
USB_MCARD3_DET# PCIE_MCARD3_DET#
USBP13-
USBP13+
USB_MCARD3_DET#
PCH_PLTRST#_EC
PCIE_MCARD3_DET#
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
MINI3CLK_REQ#
PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_PTX_WPANRX_N5_C
PCIE_PTX_WPANRX_P5_C
COEX2_WLAN_ACTIVE
PCIE_WAKE#
UIM_DATA
PCIE_MCARD2_DET#USB_MCARD2_DET#
USB_MCARD2_DET#
PCIE_MCARD1_DET#USB_MCARD1_DET#
USB_MCARD1_DET#
MCARD_PCIE_SATA#
MCARD_PCIE_SATA#
UWB_RADIO_DIS#
USB_MCARD3_DET#
USB_MCARD1_DET#
USB_MCARD2_DET#
+1.5V_RUN
+3.3V_PCIE_SATA_WAN
+1.5V_RUN
+SIM_PWR
+3.3V_PCIE_SATA_WAN+3.3V_PCIE_SATA_WAN
+3.3V_WLAN
+1.5V_RUN
+3.3V_WLAN
+3.3V_RUN
+3.3V_WLAN
+1.5V_RUN
+SIM_PWR
+SIM_PWR
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_PCIE_BKT+3.3V_PCIE_BKT
+3.3V_RUN
+1.5V_RUN
+3.3V_PCIE_BKT
+1.5V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
PCIE_PRX_WWANTX_N1_SW35
PCIE_PRX_WWANTX_P1_SW35
PCIE_PTX_WWANRX_N1_C_SW35
PCIE_PTX_WWANRX_P1_C_SW35
CLK_PCIE_MINI116
CLK_PCIE_MINI1#16
MINI1CLK_REQ#16
WWAN_RADIO_DIS# 39
PCIE_MCARD2_DET#18
PCH_PLTRST#_EC 8,18,32,34,39,40
PCIE_MCARD1_DET#19
PCIE_PRX_WLANTX_P216
PCIE_PTX_WLANRX_P2_C16
PCIE_PRX_WLANTX_N216
PCIE_PTX_WLANRX_N2_C16
CLK_PCIE_MINI2#16
LED_WLAN_OUT# 43
CLK_PCIE_MINI216
MINI2CLK_REQ#16
WLAN_RADIO_DIS#39
LED_WWAN_OUT# 43
PCH_CL_RST1#16
PCH_CL_CLK116
PCH_CL_DATA116
HOST_DEBUG_TX 40
HOST_DEBUG_RX40
MSCLK40
MSDATA 40
PCIE_MCARD3_DET#18
MINI3CLK_REQ#16
CLK_PCIE_MINI3#16
CLK_PCIE_MINI316
USB_MCARD3_DET# 15
COEX2_WLAN_ACTIVE41
COEX1_BT_ACTIVE41
USB_MCARD2_DET# 19
USB_MCARD1_DET# 19
USBP4+ 18
USBP4- 18
USBP5- 18
USBP5+ 18
USBP13- 18
USBP13+ 18
PCIE_PTX_WPANRX_N5_C16
PCIE_PTX_WPANRX_P5_C16
PCIE_PRX_WPANTX_P516
PCIE_PRX_WPANTX_N516
MCARD_PCIE_SATA#35,39
PCIE_WAKE#34,39
UWB_RADIO_DIS# 39
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Mini Card
36 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Mini Card
36 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Mini Card
36 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+-9%
+3.3Vaux
+3.3V
Voltage
Tolerance
+1.5V
+-9%
+-5%
PWR
Rail
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
250 (Wake enable)
5 (Not wake enable)
NA
Mini WWAN H=5.2 Mini WLAN H=4
For WIMAX LED debug
WPAN Noise
PCIE/BKT Card H=4
SIM Card Push-Push
Confirm with DELL about UWB
R448 0_0402_5%~DR448 0_0402_5%~D
1 2
R741 0_0402_5%~D@R741 0_0402_5%~D@
1 2
C575
33P_0402_50V8J~D
@
C575
33P_0402_50V8J~D
@
1
2
C582
0.047U_0402_16V4Z~D
C582
0.047U_0402_16V4Z~D
1
2
C1705 4700P_0402_25V7K~DC1705 4700P_0402_25V7K~D
1 2
R840 0_0402_5%~DR840 0_0402_5%~D
1 2
R444 0_0402_5%~DR444 0_0402_5%~D
12
R742 0_0402_5%~D@R742 0_0402_5%~D@1 2
C567
22U_0805_6.3VAM~D
C567
22U_0805_6.3VAM~D
1
2
C564
0.047U_0402_16V4Z~D
C564
0.047U_0402_16V4Z~D
1
2
R439 100K_0402_5%~D@R439 100K_0402_5%~D@1 2
C585
4.7U_0603_6.3V6M~D
C585
4.7U_0603_6.3V6M~D
1
2
C583
0.1U_0402_16V4Z~D
C583
0.1U_0402_16V4Z~D
1
2
R447 100K_0402_5%~DR447 100K_0402_5%~D
12
C566
33P_0402_50V8J~D
C566
33P_0402_50V8J~D
1
2
JMINI1
TYCO_1775861-1~D
JMINI1
TYCO_1775861-1~D
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
C558
0.047U_0402_16V4Z~D
C558
0.047U_0402_16V4Z~D
1
2
C573
1U_0402_6.3V6K~D
C573
1U_0402_6.3V6K~D
1
2
C578
0.047U_0402_16V4Z~D
C578
0.047U_0402_16V4Z~D
1
2
R442 0_0402_5%~DR442 0_0402_5%~D
1 2
C561
0.1U_0402_16V4Z~D
C561
0.1U_0402_16V4Z~D
1
2
C577
33P_0402_50V8J~D
@
C577
33P_0402_50V8J~D
@
1
2
C572
4700P_0402_25V7K~D
C572
4700P_0402_25V7K~D
1
2
R456 0_0402_5%~DR456 0_0402_5%~D
12
R740 0_0402_5%~D@R740 0_0402_5%~D@
1 2
C569
33P_0402_50V8J~D
C569
33P_0402_50V8J~D
1
2
C552
33P_0402_50V8J~D
@C552
33P_0402_50V8J~D
@
1
2
C570
0.047U_0402_16V4Z~D
C570
0.047U_0402_16V4Z~D
1
2
JMINI3
TYCO_1775861-1~D
JMINI3
TYCO_1775861-1~D
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
R458 100K_0402_5%~DR458 100K_0402_5%~D
1 2
R438 100K_0402_5%~DR438 100K_0402_5%~D
1 2
C556
0.047U_0402_16V4Z~D
C556
0.047U_0402_16V4Z~D
1
2
C560
0.1U_0402_16V4Z~D
C560
0.1U_0402_16V4Z~D
1
2
C562
4.7U_0603_6.3V6M~D
C562
4.7U_0603_6.3V6M~D
1
2
C574
33P_0402_50V8J~D
@
C574
33P_0402_50V8J~D
@
1
2
R440 0_0402_5%~DR440 0_0402_5%~D
1 2
JMINI2
TYCO_1775861-1~D
JMINI2
TYCO_1775861-1~D
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
C576
33P_0402_50V8J~D
@
C576
33P_0402_50V8J~D
@
1
2
C568
33P_0402_50V8J~D
C568
33P_0402_50V8J~D
1
2
R455 100K_0402_5%~DR455 100K_0402_5%~D
1 2
C565
0.047U_0402_16V4Z~D
C565
0.047U_0402_16V4Z~D
1
2
C581
0.047U_0402_16V4Z~D
C581
0.047U_0402_16V4Z~D
1
2
C557
0.1U_0402_16V4Z~D
@
C557
0.1U_0402_16V4Z~D
@
1
2
R266 100K_0402_5%~DR266 100K_0402_5%~D
12
JSIM1
MOLEX_475531001
JSIM1
MOLEX_475531001
VCC
1
RST
2
CLK
3
GND 5
VPP 6
I/O 7
NC 8
NC
4
GND 9
GND 10
C555
0.047U_0402_16V4Z~D
C555
0.047U_0402_16V4Z~D
1
2
U31
SRV05-4.TCT_SOT23-6~D
U31
SRV05-4.TCT_SOT23-6~D
2
3
1
4
6
5
C580
0.1U_0402_16V4Z~D
@
C580
0.1U_0402_16V4Z~D
@
1
2
+
C563
330U_D2E_6.3VM_R25~D
+
C563
330U_D2E_6.3VM_R25~D
1
2
+
C554
330U_D2E_6.3VM_R25~D
@
+
C554
330U_D2E_6.3VM_R25~D
@
1
2
C559
0.047U_0402_16V4Z~D
C559
0.047U_0402_16V4Z~D
1
2
C579
0.047U_0402_16V4Z~D
C579
0.047U_0402_16V4Z~D
1
2
R454 0_0402_5%~DR454 0_0402_5%~D
1 2
R449 100K_0402_5%~DR449 100K_0402_5%~D
1 2
R1409 0_0402_5%~D@R1409 0_0402_5%~D@
1 2
R441 0_0402_5%~DR441 0_0402_5%~D
1 2
R443 100K_0402_5%~DR443 100K_0402_5%~D
1 2
D21
RB751S40T1_SOD523-2~D
D21
RB751S40T1_SOD523-2~D
21
R428 0_0402_5%~D@R428 0_0402_5%~D@
1 2
C584
0.1U_0402_16V4Z~D
C584
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FP_USB_D+
SATA_PTX_DRX_P4
FP_USB_D-
FP_USB_D+
FP_USB_D+
FP_USB_D-
USBP2_D-
USBP2_D+
USBP3_D+
USBP3_D-
SATA_PRX_DTX_P4
SATA_PRX_DTX_N4ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP
ESATA_PRX_DTX_N4_RP
ESATA_PTX_DRX_P4_RP
ESATA_PRX_DTX_P4_RP
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C ESATA_PRX_DTX_P4
ESATA_PTX_DRX_P4
ESATA_PTX_DRX_N4
ESATA_PRX_DTX_N4
ESATA_PTX_DRX_N4_RP
SATA_PTX_DRX_N4
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PTX_DRX_N4_C
ESATA_PTX_DRX_P4_C
+5V_ALW_USB
PCH_AZ_MDC_SYNC
PCH_AZ_MDC_SDOUT
PCH_AZ_MDC_SDIN1 MDC_SDIN
PCH_AZ_MDC_RST1# PCH_AZ_MDC_BITCLK
BITCLK_TERM
SDOUT_TERMPCH_AZ_MDC_SDOUT
PCH_AZ_MDC_BITCLK
PCH_AZ_MDC_RST1#
LID_CL#
WIRELESS_ON#/OFF
TPAP0
TPAN0
TPBP0
TPBN0
BREATH_BLUE_LED_SNIFF
POWER_SW#_MB
LID_CL#
LAT_ON_SW_BTN#
USB_OC1#
FP_USB_D-
USBP2_D- USBP2_D+
USBP3_D+ USBP3_D-
ESATA_PWRSAVEEN_ESATA_RPTR
USBP2_D+
USBP2-
USBP2+
USBP2_D- USBP3_D-
USBP3_D+
USBP3-
USBP3+
EN_ESATA_RPTR#
ESATA_PWRSAVE
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_ESATA/USB2
+5V_ESATA/USB3
+3.3V_RUN
+5V_ALW
+3.3V_ALW_PCH
+5V_ALW
+3.3V_LAN
+VREFOUT
+5V_ALW
+3.3V_LAN +VREFOUT +LOM_VCT_IO
+LOM_VCT_IO
+3.3V_ALW
+5V_ESATA/USB3 +5V_ESATA/USB2
+5V_ALW_USB
FP_USBD+31
FP_USBD-31
FP_RESET# 31
ESATA_PRX_DTX_P4_C15
ESATA_PRX_DTX_N4_C15
ESATA_PTX_DRX_P4_C15
ESATA_PTX_DRX_N4_C15
ESATA_USB_PWR_EN#39
PCH_AZ_MDC_SDOUT15
PCH_AZ_MDC_SYNC15
PCH_AZ_MDC_SDIN115
MDC_RST_DIS#39
PCH_AZ_MDC_RST#15
PCH_AZ_MDC_BITCLK 15
POWER_SW#_MB40,41
IO_LOOP19
SW_LAN_TX3+30
SW_LAN_TX3-30
SW_LAN_TX2-30
SW_LAN_TX2+30
SW_LAN_TX1-30
SW_LAN_TX1+30
SW_LAN_TX0+30
SW_LAN_TX0-30
USBP0+18
USBP0-18
USBP1+18
USBP1-18
AUD_EXT_MIC_L 29
AUD_EXT_MIC_R 29
LAN_ACTLED_YEL# 30
LED_10_GRN# 30
LED_100_ORG# 30
AUD_MIC_SWITCH 29
USB_SIDE_EN# 39
USB_OC0# 18
WIRELESS_ON#/OFF 39
AUD_HP_NB_SENSE 29,39
AUD_HP_OUT_L 29
AUD_HP_OUT_R 29
LID_CL# 39,43
TPAP0 33
TPAN0 33
TPBP0 33
TPBN0 33
BREATH_BLUE_LED_SNIFF43
LAT_ON_SW_BTN# 40
USB_OC1# 18
EN_ESATA_RPTR39
USBP3-18
USBP3+18
USBP2-18
USBP2+18
EN_ESATA_RPTR# 15,19
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
USB 2.0 PORT
37 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
USB 2.0 PORT
37 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
USB 2.0 PORT
37 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5V_RUN Place close to
JBIO1.6
+3.3V_RUN Place close to
JBIO1.1
ESATA Repeater
W=20 mil
MDC CONN. H=5.5, Pitch=0.8
DETECT_GND
Place close
to JIO1.13
Place close
to JIO1.30
Place close
to JIO1.36
I/O board 60 pin CONN.
Fingerprint CONN. 105 degree
R28
24.9K_0402_1%~D
R28
24.9K_0402_1%~D
1 2
C685
0.1U_0402_16V4Z~D
C685
0.1U_0402_16V4Z~D
1
2
R1299 0_0402_5%~DR1299 0_0402_5%~D
1 2
R1298 0_0402_5%~D
@
R1298 0_0402_5%~D
@
1 2
C13
0.1U_0402_16V4Z~D
C13
0.1U_0402_16V4Z~D
1
2
U95
SN75LVCP412ARTJR_QFN20_4X4~D
U95
SN75LVCP412ARTJR_QFN20_4X4~D
RX_1P
1
RX_1N
2VCC 20
GND
19
TX_2P
5
VCC 6
EN
7
PE2 8
PE1 9
VCC 10
GND
17
GND
18
RX_2P 11
RX_2N 12
GND
13 TX_1N 14
TX_1P 15
VCC 16
GND
3
TX_2N
4
PAD
21
C32
10P_0402_50V8J~D
@C32
10P_0402_50V8J~D
@
1 2
Connector for MDC Rev1.5
JMDC1
TYCO_1-1775149-2~D
Connector for MDC Rev1.5
JMDC1
TYCO_1-1775149-2~D
GND1
1
IAC_SDATA_OUT
3
GND2
5
IAC_SYNC
7
IAC_SDATA_IN
9
IAC_RESET#
11
RES0 2
RES1 4
3.3V 6
GND3 8
GND4 10
IAC_BITCLK 12
GND
13
GND
14
GND
15
GND
16
GND
17
GND
18
C768
0.1U_0402_16V4Z~D
C768
0.1U_0402_16V4Z~D
1
2
R427 0_0402_5%~D@R427 0_0402_5%~D@1 2
U51
PRTR5V0U2X_SOT143-4~D
U51
PRTR5V0U2X_SOT143-4~D
GND
1
IO1
2
VCC 4
IO2 3
R425 0_0402_5%~D@R425 0_0402_5%~D@1 2
JBIO1
TYCO_2041070-6~D
JBIO1
TYCO_2041070-6~D
11
22
33
44
55
66
GND 7
GND 8
R1301
0_0402_5%~D
R1301
0_0402_5%~D
12
C304 0.01U_0402_16V7K~DC304 0.01U_0402_16V7K~D
12
R1513
0_0402_5%~D
@R1513
0_0402_5%~D
@
1 2
D4
IP4223CZ6_SO6~D
@D4
IP4223CZ6_SO6~D
@
V I/O
1
V I/O
3
V I/O 6
V I/O 4
Ground
2V BUS 5
C770
0.1U_0402_16V4Z~D
C770
0.1U_0402_16V4Z~D
1
2
C549 0.01U_0402_16V7K~DC549 0.01U_0402_16V7K~D
1 2
R325
100K_0402_5%~D
R325
100K_0402_5%~D
12
C550 0.01U_0402_16V7K~DC550 0.01U_0402_16V7K~D
1 2
R15
10_0402_5%~D
R15
10_0402_5%~D
12
R16
10_0402_5%~D
@R16
10_0402_5%~D
@
12
R1300
0_0402_5%~D
@
R1300
0_0402_5%~D
@
12
C634
0.1U_0402_16V4Z~D
C634
0.1U_0402_16V4Z~D
1
2
L30
HCMC0805-900MFS_4P~D
L30
HCMC0805-900MFS_4P~D
1
1
4
433
22
C623
0.1U_0402_16V4Z~D
C623
0.1U_0402_16V4Z~D
1
2
C545
0.1U_0402_16V4Z~D
C545
0.1U_0402_16V4Z~D
1
2
C547
10U_1206_16V4Z~D
C547
10U_1206_16V4Z~D
1
2
+
C544
150U_D2_6.3VY_R15M~D
+
C544
150U_D2_6.3VY_R15M~D
1
2
L31
HCMC0805-900MFS_4P~D
L31
HCMC0805-900MFS_4P~D
1
1
4
433
22
C1376 0.01U_0402_16V7K~DC1376 0.01U_0402_16V7K~D
1 2
USB
ESATA
JESA1
FCI_10100446-003RLF
USB
ESATA
JESA1
FCI_10100446-003RLF
A_VBUS
1
A_D-
2
A_D+
3
A_GND
4
B_VBUS
5
B_D-
6
B_D+
7
B_GND
8
GND
9
A+
10
A-
11
GND
12
B-
13
B+
14
GND
15
G1
16
G2
17
G3
18
G4
19
R422 0_0402_5%~DR422 0_0402_5%~D
1 2
C712
1U_0402_6.3V6K~D
@C712
1U_0402_6.3V6K~D
@
1
2
C1381 0.01U_0402_16V7K~DC1381 0.01U_0402_16V7K~D
12
R1497
0_0402_5%~D
@R1497
0_0402_5%~D
@
1 2
R423 0_0402_5%~DR423 0_0402_5%~D
1 2
U53
TPS2560DRCR-PG1.1_SON10_3X3~D
U53
TPS2560DRCR-PG1.1_SON10_3X3~D
GND
1
IN
2
ILIM 7
OUT2 8
FAULT1# 10
IN
3
EN1#
4
OUT1 9
T-PAD 11
EN2#
5FAULT#2 6
R426 0_0402_5%~D@R426 0_0402_5%~D@
1 2
R10
33_0402_5%~D
R10
33_0402_5%~D
1 2
R326
10K_0402_5%~D
R326
10K_0402_5%~D
12
C1378
0.01U_0402_16V7K~D
C1378
0.01U_0402_16V7K~D
1
2
C303 0.01U_0402_16V7K~DC303 0.01U_0402_16V7K~D
12
C1380 0.01U_0402_16V7K~DC1380 0.01U_0402_16V7K~D
12
R424 0_0402_5%~D@R424 0_0402_5%~D@
1 2
JIO1
LOTES_YEA-BTB-018-160K12
JIO1
LOTES_YEA-BTB-018-160K12
G1
61 G2 62
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
54 54
56 56
58 58
60 60
G
D
S
Q35
SSM3K7002FU_SC70-3~D
G
D
S
Q35
SSM3K7002FU_SC70-3~D
2
1 3
L29
DLW21SN121SQ2L_4P~D
@L29
DLW21SN121SQ2L_4P~D
@
1
1
4
433
22
C15
10P_0402_50V8J~D
C15
10P_0402_50V8J~D
1 2
R1494
0_0402_5%~D
R1494
0_0402_5%~D
12
C1377 0.01U_0402_16V7K~DC1377 0.01U_0402_16V7K~D
1 2
C548
0.1U_0402_16V4Z~D
C548
0.1U_0402_16V4Z~D
1
2
G
D
S
Q210
SSM3K7002FU_SC70-3~D
@
G
D
S
Q210
SSM3K7002FU_SC70-3~D
@
2
13
C12
4.7U_0603_6.3V6M~D
C12
4.7U_0603_6.3V6M~D
1
2
PJP23
JUMP_43X79
PJP23
JUMP_43X79
11
2
2
C1379
0.1U_0402_16V4Z~D
C1379
0.1U_0402_16V4Z~D
1
2
+
C588
150U_D2_6.3VY_R15M~D
+
C588
150U_D2_6.3VY_R15M~D
1
2
C546
0.1U_0402_16V4Z~D
C546
0.1U_0402_16V4Z~D
1
2
2
2
1
1
B B
A A
DOCK_AC_OFF
DPC_CA_DET
RED_DOCK
GREEN_DOCK
BLUE_DOCK
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3
DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2
DPC_DOCK_LANE_N1
DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0
CLK_PCI_DOCK
DPC_GPU_DOCK_HPD
SLICE_BAT_PRES#
DPC_DOCK_AUX#
DPC_DOCK_AUX
DOCK_DET#
DOCK_DET_R#
DPC_DOCK_LANE_P1
DPB_DOCK_AUX
DPB_DOCK_AUX#
DPB_DOCK_CA_DET
DPB_DOCK_HPD
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
DPB_DOCK_HPD DPC_GPU_DOCK_HPD
DPB_DOCK_CA_DET
DPB_DOCK_AUX
DPB_DOCK_AUX#
DPC_DOCK_AUX#
DPC_CA_DET
DPC_DOCK_AUX
+DOCK_PWR_BAR
+DOCK_PWR_BAR
+LOM_VCT
+NBDOCK_DC_IN_SS
+3.3V_ALW
+LOM_VCT
+3.3V_ALW2
+15V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW2
+15V_ALW
+3.3V_RUN
DPC_CA_DET 25
DOCK_AC_OFF 39,52
RED_DOCK27
BLUE_DOCK27
GREEN_DOCK27
VSYNC_DOCK27
DAT_MSE40
CLK_MSE40
DAI_BCLK#29
DAI_LRCK#29
DAI_DI29
DAI_DO#29
DAI_12MHZ#29
D_LAD139
D_LAD039
D_LAD239
D_LAD339
D_LFRAME#39
D_CLKRUN#39
D_SERIRQ39
D_DLDRQ1#39
CLK_PCI_DOCK18
DOCK_SMB_CLK40
DOCK_SMB_DAT40
DOCK_SMB_ALERT#40,44
DOCK_PSID44
DOCK_PWR_BTN#40
DOCK_LOM_SPD10LED_GRN#30
HSYNC_DOCK27
DOCK_LOM_SPD100LED_ORG# 30
DAT_KBD 40
CLK_KBD 40
DOCK_LOM_TRD0+ 30
DOCK_LOM_TRD0- 30
DOCK_LOM_TRD2- 30
DOCK_LOM_TRD2+ 30
ACAV_DOCK_SRC# 52
CLK_DDC2_DOCK 27
DAT_DDC2_DOCK 27
SATA_PTX_DKRX_P5_C 15
SATA_PTX_DKRX_N5_C 15
SATA_PRX_DKTX_P5_C 15
BREATH_LED# 40,43
DOCK_LOM_ACTLED_YEL# 30
DOCK_LOM_TRD1- 30
DOCK_LOM_TRD1+ 30
DOCK_LOM_TRD3- 30
DOCK_LOM_TRD3+ 30
DOCK_DCIN_IS+ 51
DOCK_DCIN_IS- 51
DOCK_POR_RST# 40
SATA_PRX_DKTX_N5_C 15
USBP8- 18
USBP8+ 18
USBP9+ 18
USBP9- 18
SLICE_BAT_PRES#39,44,52 DOCK_DET# 39
DPB_DOCK_LANE_P026
DPB_DOCK_LANE_N026
DPB_DOCK_LANE_P126
DPB_DOCK_LANE_N126
DPB_DOCK_LANE_P226
DPB_DOCK_LANE_N226
DPB_DOCK_LANE_P326
DPB_DOCK_LANE_N326
DPB_DOCK_AUX26
DPB_DOCK_AUX#26
DPC_DOCK_AUX 25
DPC_DOCK_AUX# 25
DPB_DOCK_HPD26
DPB_DOCK_CA_DET26
DPC_GPU_DOCK_HPD 53
DPC_GPU_LANE_N0 54
DPC_GPU_LANE_P2 54
DPC_GPU_LANE_P1 54
DPC_GPU_LANE_N2 54
DPC_GPU_LANE_P0 54
DPC_GPU_LANE_N1 54
DPC_GPU_LANE_P3 54
DPC_GPU_LANE_N3 54
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DOCKING CONN
38 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DOCKING CONN
38 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
DOCKING CONN
38 69Thursday, January 21, 2010
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DOCK_DET_1
Close to DOCK
Its for Enhance ESD on dock issue. Close to DOCK
Its for Enhance ESD on dock issue.
Reserve for EMI test
C986
0.033U_0402_16V7K~D
C986
0.033U_0402_16V7K~D
1
2
Q213A
DMN66D0LDW-7_SOT363-6~D
Q213A
DMN66D0LDW-7_SOT363-6~D
61
2
C985
0.033U_0402_16V7K~D
C985
0.033U_0402_16V7K~D
1
2
C1899
4.7U_0805_25V6K~D
@
C1899
4.7U_0805_25V6K~D
@
1
2
Q211B
DMN66D0LDW-7_SOT363-6~D
Q211B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R1508
2.2K_0402_5%~D
R1508
2.2K_0402_5%~D
12
R1038
100K_0402_5%~D
R1038
100K_0402_5%~D
1 2
Q211A
DMN66D0LDW-7_SOT363-6~D
Q211A
DMN66D0LDW-7_SOT363-6~D
61
2
R1517 0_0402_5%~D@R1517 0_0402_5%~D@
1 2
JDOCK1
JAE_WD2F144WB1
JDOCK1
JAE_WD2F144WB1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
54 54
56 56
58 58
60 60
62 62
64 64
66 66
68 68
70 70
72 72
74 74
76 76
78 78
80 80
82 82
84 84
86 86
88 88
90 90
92 92
94 94
96 96
98 98
100 100
102 102
104 104
106 106
108 108
110 110
112 112
114 114
116 116
118 118
120 120
122 122
124 124
126 126
128 128
130 130
132 132
134 134
136 136
138 138
GND1
145
PWR1
146 PWR2 149
GND2 152
Shield_G
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G
157
Shield_G
158
139
139 140 140
141
141 142 142
143
143 144 144
PWR1
147
PWR1
148
PWR2 150
PWR2 151
Shield_G 159
Shield_G 160
Shield_G 161
Shield_G 162
Shield_G 163
Shield_G 164
R798
100K_0402_5%~D
R798
100K_0402_5%~D
1 2
C586 0.01U_0402_16V7K~DC586 0.01U_0402_16V7K~D
12
C363 0.1U_0402_10V7K~DC363 0.1U_0402_10V7K~D
12
C313 0.1U_0402_10V7K~DC313 0.1U_0402_10V7K~D
12
C361 0.1U_0402_10V7K~DC361 0.1U_0402_10V7K~D
12
C305 0.01U_0402_16V7K~DC305 0.01U_0402_16V7K~D
1 2
R1506
2.2K_0402_5%~D
R1506
2.2K_0402_5%~D
12
C1033
0.1U_0603_50V4Z~D
C1033
0.1U_0603_50V4Z~D
1
2
R1518
100K_0402_5%~D
R1518
100K_0402_5%~D
12
R1505
2.2K_0402_5%~D
R1505
2.2K_0402_5%~D
12
C362 0.1U_0402_10V7K~DC362 0.1U_0402_10V7K~D
12
R1516 0_0402_5%~D@R1516 0_0402_5%~D@
1 2
D71
RB751S40T1_SOD523-2~D
D71
RB751S40T1_SOD523-2~D
21
C355 0.1U_0402_10V7K~DC355 0.1U_0402_10V7K~D
12
C1898
4.7U_0805_25V6K~D
C1898
4.7U_0805_25V6K~D
1
2
G
D
S
Q214
SSM3K7002FU_SC70-3~D
G
D
S
Q214
SSM3K7002FU_SC70-3~D
2
13
C587 0.01U_0402_16V7K~DC587 0.01U_0402_16V7K~D
12
R1519
100K_0402_5%~D
R1519
100K_0402_5%~D
12
C364 0.1U_0402_10V7K~DC364 0.1U_0402_10V7K~D
12
C590
4.7P_0402_50V8C~D
@C590
4.7P_0402_50V8C~D
@
1
2
C306 0.01U_0402_16V7K~DC306 0.01U_0402_16V7K~D
1 2
C357 0.1U_0402_10V7K~DC357 0.1U_0402_10V7K~D
12
R1515
100K_0402_5%~D
R1515
100K_0402_5%~D
12
D64
SM24.TCT_SOT23-3~D
@
D64
SM24.TCT_SOT23-3~D
@
2
3
1
R462
10_0402_5%~D
@R462
10_0402_5%~D
@
12
G
D
S
Q212
SSM3K7002FU_SC70-3~D
G
D
S
Q212
SSM3K7002FU_SC70-3~D
2
13
G
D
S
Q216
SSM3K7002FU_SC70-3~D
G
D
S
Q216
SSM3K7002FU_SC70-3~D
2
13
R1507
2.2K_0402_5%~D
R1507
2.2K_0402_5%~D
12
R1521 0_0402_5%~D@R1521 0_0402_5%~D@
1 2
R1520 0_0402_5%~D@R1520 0_0402_5%~D@
1 2
C1034
0.1U_0603_50V4Z~D
C1034
0.1U_0603_50V4Z~D
1
2
C42
1U_0402_6.3V6K~D
C42
1U_0402_6.3V6K~D
1
2
R796
100K_0402_5%~D
R796
100K_0402_5%~D
1 2
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~D
12
R1514
100K_0402_5%~D
R1514
100K_0402_5%~D
12
G
D
S
Q215
SSM3K7002FU_SC70-3~D
G
D
S
Q215
SSM3K7002FU_SC70-3~D
2
13
Q213B
DMN66D0LDW-7_SOT363-6~D
Q213B
DMN66D0LDW-7_SOT363-6~D
3
5
4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_WAKE#
SLICE_BAT_PRES#
LID_CL#
CLK_PCI_5028CLK_SIO_14M
RUN_ON
TP_DET#
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
0.75V_DDR_VTT_ON
CPU_VTT_ON
PBATT_OFF
LCD_TST
DCIN_CBL_DET#
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
SYS_LED_MASK#
ACAV_IN_NB
RUNPWROK_R1
SYS_LED_MASK#
CPU_VTT_ON
ESATA_USB_PWR_EN# LPC_LAD3
IRQ_SERIRQ
RUN_ON
PCH_PLTRST#_EC
DOCK_HP_DET
LPC_LDRQ1#
CLKRUN#
LPC_LAD1
LPC_LAD2
D_LAD3
BC_CLK_ECE5028
MDC_RST_DIS#
AUD_HP_NB_SENSE
SP_TPM_LPC_EN
CRT_SWITCH
HDDC_EN
AUD_NB_MUTE
D_LAD1
D_DLDRQ1#
CLK_PCI_5028
LPC_LFRAME#
LAN_DISABLE#_R
DOCK_DET#
D_CLKRUN#
ME_FWP
MODC_EN
+CAP_LDO
D_LFRAME#
WIRELESS_ON#/OFF
LID_CL_SIO#
ME_FWP
WLAN_RADIO_DIS#
SLICE_BAT_PRES#
D_LAD0
D_LAD2
DOCK_MIC_DET
PSID_DISABLE#
USB_SIDE_EN#
LPC_LAD0
BC_INT#_ECE5028
EN_DOCK_PWR_BAR
D_SERIRQ
EXPRCRD_STDBY#
PBAT_PRES#
0.75V_DDR_VTT_ON
CLK_SIO_14M
LCD_VCC_TEST_EN
PCH_PCIE_WAKE#
LID_CL_SIO#
DCIN_CBL_DET#
DOCK_AC_OFF_EC
WWAN_RADIO_DIS#
CCD_OFF
LCD_TST
BC_DAT_ECE5028
PCIE_WAKE#
PBATT_OFF
DOCKED
EN_I2S_NB_CODEC#
LPC_LDRQ0#
EXPRCRD_PWREN#
USB_SIDE_EN#
ESATA_USB_PWR_EN#
DGPU_PWR_EN
DGPU_PWR_EN
BT_RADIO_DIS#
EXPRCRD_DET#
DP_PRIORITY
TEMP_ALERT#
SIO_SLP_M#
SIO_SLP_LAN#
CPU_CATERR#
CPU_CATERR#
MCARD_PCIE_BKT_PWREN
VGA_ID_DISC
VGA_ID_UMA
USH_PWR_STATE#
PANEL_BKEN_DGPU
PANEL_BKEN_DGPU
ALS_INT#
GFX_MEM_VTT_ON
ALS_INT#
MCARD_WWAN_PWREN
VGA_ID_DISC
VGA_ID_UMA
BCM5882_ALERT#
ENVDD_GPU
VCORE_LL_SELECT
DGPU_PWROK
MCARD_PCIE_SATA#
GFX_MEM_VTT_ON
GPU_CLKDWN
UWB_RADIO_DIS#
EN_ESATA_RPTR
VGA_ID_DISC
VGA_ID_UMA
ME_FWP
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW2
+3.3V_RUN
+3.3V_RUN
+1.05V_1.1V_RUN_VTT
+3.3V_RUN
+3.3V_ALW
LPC_LAD[0..3] 15,31,32,40
LPC_LFRAME# 15,31,32,40
CPU_VTT_ON49
BC_DAT_ECE502840
PSID_DISABLE#44
BC_INT#_ECE502840
PBAT_PRES#44
DOCKED30
SYS_LED_MASK#43
PCH_PCIE_WAKE#17
WLAN_RADIO_DIS#36
HDDC_EN28
WWAN_RADIO_DIS#36
BC_CLK_ECE502840
USB_SIDE_EN#37
TP_DET# 41
LID_CL# 37,43
RUN_ON 12,34,42,47,62
0.75V_DDR_VTT_ON 47
IMVP_VR_ON 50
IMVP_PWRGD 8,50
MODC_EN28
CRT_SWITCH 27
DOCK_HP_DET 29
EN_I2S_NB_CODEC#29
EN_DOCK_PWR_BAR52
DOCK_DET#38
SLICE_BAT_PRES#38,44,52
DOCK_MIC_DET 29
AUD_NB_MUTE29
SIO_EXT_WAKE#19
EXPRCRD_PWREN#34
EXPRCRD_STDBY#34
LCD_VCC_TEST_EN24
WIRELESS_ON#/OFF37
CAP_LED#43
SCRL_LED#43
NUM_LED#43
PBATT_OFF52
LCD_TST24
1.8V_RUN_PWRGD 47
MDC_RST_DIS#37
ME_FWP 15
DCIN_CBL_DET#44
ESATA_USB_PWR_EN#37
AUD_HP_NB_SENSE29,37
CCD_OFF24
LAN_DISABLE#_R30
ACAV_IN_NB 40,51,52
LPC_LDRQ0# 15
D_SERIRQ 38
D_DLDRQ1# 38
CLK_PCI_5028 18
D_LAD3 38
D_CLKRUN# 38
D_LAD1 38
LPC_LDRQ1# 15
PCH_PLTRST#_EC 8,18,32,34,36,40
D_LAD2 38
GPIO_PSID_SELECT 44
D_LFRAME# 38
IRQ_SERIRQ 15,31,32,40
CLK_SIO_14M 16
SP_TPM_LPC_EN 31,32
D_LAD0 38
CLKRUN# 17,32,40
DOCK_AC_OFF 38,52
SPI_WP#_SEL 15
DGPU_PWR_EN62
BT_RADIO_DIS#41
PCIE_WAKE#34,36
EXPRCRD_DET#34
DP_PRIORITY 26
TEMP_ALERT# 15,19
SIO_SLP_M# 17,48
SIO_SLP_LAN# 17,30
H_CATERR#8
AUX_EN_WOWL 35
SIO_SLP_S4# 17
SIO_SLP_S3# 17
MCARD_PCIE_BKT_PWREN35
USH_PWR_STATE#31
PANEL_BKEN_DGPU53
ALS_INT#24
DOCK_AC_OFF_EC 52
GFX_MEM_VTT_ON55
MCARD_WWAN_PWREN35
BCM5882_ALERT#31
ENVDD_GPU24,53
VCORE_LL_SELECT50
DGPU_PWROK19,62
MCARD_PCIE_SATA#35,36
GPU_CLKDWN53
UWB_RADIO_DIS#36
EN_ESATA_RPTR37
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
ECE5028
39 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
ECE5028
39 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
ECE5028
39 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
8mil
VGA_ID_DISCVGA_ID_UMA
01
01
11
UMA
Discrete
SG
R816 100K_0402_5%~DR816 100K_0402_5%~D
1 2
C653
0.1U_0402_16V4Z~D
C653
0.1U_0402_16V4Z~D
1
2
R875 100K_0402_5%~DR875 100K_0402_5%~D
1 2
R788 10K_0402_5%~D@R788 10K_0402_5%~D@
1 2
R258 2.2K_0402_5%~DR258 2.2K_0402_5%~D
1 2
R501 10K_0402_5%~DR501 10K_0402_5%~D
1 2
R510 100K_0402_5%~DR510 100K_0402_5%~D
12
R518 100K_0402_5%~DR518 100K_0402_5%~D
12
U69
TC7SH08FU_SSOP5~D
U69
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
R1289
2.2K_0402_5%~D
R1289
2.2K_0402_5%~D
1 2
C652
0.1U_0402_16V4Z~D
C652
0.1U_0402_16V4Z~D
1
2
R511 100K_0402_5%~DR511 100K_0402_5%~D
12
R923 10K_0402_5%~DR923 10K_0402_5%~D
1 2
C655
0.047U_0402_16V4Z~D
C655
0.047U_0402_16V4Z~D
1
2
R862 100K_0402_5%~DR862 100K_0402_5%~D
1 2
R1531 10K_0402_5%~DR1531 10K_0402_5%~D
12
R509 0_0402_5%~DR509 0_0402_5%~D
1 2
C654
4.7P_0402_50V8C~D
@C654
4.7P_0402_50V8C~D
@
1
2
R527
10_0402_5%~D
R527
10_0402_5%~D
12
R1130
10K_0402_5%~D
R1130
10K_0402_5%~D
12
R515 100K_0402_5%~DR515 100K_0402_5%~D
12
C650
0.1U_0402_16V4Z~D
C650
0.1U_0402_16V4Z~D
1
2
R505 10K_0402_5%~DR505 10K_0402_5%~D
1 2
R1318 100K_0402_5%~DR1318 100K_0402_5%~D
1 2
R1078
33K_0402_5%~D
R1078
33K_0402_5%~D
12
R502 10K_0402_5%~DR502 10K_0402_5%~D
1 2
R526 0_0402_5%~DR526 0_0402_5%~D
1 2
R658 10K_0402_5%~DR658 10K_0402_5%~D
1 2
C1072
10U_0805_10V4Z~D
C1072
10U_0805_10V4Z~D
1
2
R874 100K_0402_5%~DR874 100K_0402_5%~D
1 2
R756 100K_0402_5%~DR756 100K_0402_5%~D
12
R514
1K_0402_5%~D
R514
1K_0402_5%~D
12
R1288
8.2K_0402_5%~D
R1288
8.2K_0402_5%~D
12
R525
10_0402_5%~D
R525
10_0402_5%~D
12
R1319 100K_0402_5%~DR1319 100K_0402_5%~D
1 2
R649
1K_0402_5%~D
@R649
1K_0402_5%~D
@
1 2
R522 100K_0402_5%~D@R522 100K_0402_5%~D@1 2
R524
100K_0402_5%~D
R524
100K_0402_5%~D
12
R881 100K_0402_5%~D@R881 100K_0402_5%~D@
1 2
R558 100K_0402_5%~DR558 100K_0402_5%~D
1 2
R512 100K_0402_5%~DR512 100K_0402_5%~D
12
R521 100K_0402_5%~DR521 100K_0402_5%~D
12
E
B
C
Q182
PMST3904_SOT323-3~D
E
B
C
Q182
PMST3904_SOT323-3~D
2
3 1
C657
4.7U_0603_6.3V6M~D
C657
4.7U_0603_6.3V6M~D
1
2
C1372
0.1U_0402_16V4Z~D
C1372
0.1U_0402_16V4Z~D
1
2
R503 100K_0402_5%~DR503 100K_0402_5%~D
1 2
C656
4.7P_0402_50V8C~D
C656
4.7P_0402_50V8C~D
1
2
LPC
DLPC
GPIO
ECE5028-LZY
TEST
GPIO
U35
ECE5028-LZY_DQFN132_11X11~D
LPC
DLPC
GPIO
ECE5028-LZY
TEST
GPIO
U35
ECE5028-LZY_DQFN132_11X11~D
GPIOA[0]
B52
GPIOA[1]
A49
GPIOA[2]
B53
GPIOA[3]
A50
GPIOA[4]
B54
GPIOA[5]
A51
GPIOA[6]
B55
GPIOA[7]
A52
VCC1 B5
GPIOK[7] A12
GPIOJ[7] B8
VSS B27
GPIOK[4] B11
VSS A18
GPIOH[0]
B13
GPIOH[1]
A13
GPIOH[4]
B14
GPIOH[5]
A14
BC_INT#
A29
BC_DAT
B31
BC_CLK
A30
VCC1 A17
GPIOE[0]/RXD
A1
GPIOE[1]/TXD
B2
GPIOE[2]/RTS#
A2
GPIOE[3]/DSR#
B3
GPIOE[4]/CTS#
A3
GPIOE[5]/DTR#
B45
GPIOE[6]/RI#
A42
GPIOE[7]/DCD#
B4
CLKRUN# B20
DCLK_RUN# A19
SER_IRQ B21
DSER_IRQ A20
LRESET# B22
LFRAME# A21
DLFRAME# B23
LDRQ1# A22
DLDRQ1# B24
LDRQ0# A23
LAD3 B25
DLAD3 A24
LAD2 B26
DLAD2 A25
LAD1 A26
VCC1 B30
DLAD1 B28
LAD0 A27
DLAD0 B29
PCICLK A28
GPIOB[0]/INIT#
A33
GPIOB[1]/SLCTIN#
B36
GPIOC[2]/SLCT
A34
GPIOC[3]/PE
B37
GPIOC[4]/BUSY
A35
GPIOC[5]/ACK#
B38
GPIOC[6]/ERROR#
A36
GPIOC[7]/ALF#
A37
GPIOD[0]/STROBE#
B40
GPIOC[1]/PD7
A38
GPIOC[0]/PD6
B41
GPIOB[7]/PD5
A39
GPIOB[6]/PD4
B42
GPIOB[5]/PD3
A40
GPIOB[4]/PD2
B43
GPIOB[3]/PD1
A41
GPIOB[2]/PD0
B44
CLKI (14.318 MHz) A32
GPIOD[1]
B32
GPIOD[2]
A31
GPIOD[3]/VBUS_DET
B33
CAP_LDO B46
VCC1 A43
VSS B51
GPIOD[4]/OCS1_N
B15
GPIOD[5]/OCS2_N
A15
GPIOD[6]/OCS3_N
B16
GPIOD[7]/OCS4_N
A16
GPIOH[6]
B17
GPIOH[7]
B18
GPIOG[0]
B47
GPIOG[1]
A45
GPIOG[2]
B48
GPIOG[3]
A46
GPIOG[4]
B49
GPIOG[5]
A47
GPIOG[6]
B50
GPIOG[7]
A48
SYSOPT1/GPIOH[2]
A53
SYSOPT0/GPIOH[3]
B57
VCC1 A54
GPIOF[7]
B58
GPIOF[6]
A55
GPIOF[5]
B59
GPIOF[4]
A56
IRTX
B60
IRRX
A57
GPIOF[3]/IRMODE/IRRX3B
B61
GPIOF[2]/IRTX2
A58
GPIOF[1]/IRRX2
B62
GPIOF[0]/IRMODE/IRRX3A
A59
GPIOI[1] B63
GPIOI[2] A60
VSS A9
GPIOI[3] A61
GPIOI[4] B65
GPIOI[5] A62
GPIOI[6] B66
GPIOI[7] A63
GPIOJ[0] B67
GPIOJ[4] A6
GPIOJ[1] A64
VSS B64
VSS A44
VSS B39
GPIOJ[2] A5
GPIOJ[3] B6
GPIOJ[6] A7
GPIOJ[5] B7
GPIOK[0] A8
GPIOK[1] B9
GPIOK[3] A10
GPIOK[2] B10
GPIOK[5] A11
GPIOK[6] B12
PWRGD A4
OUT65 B56
TEST_PIN B19
NC B1
NC B34
NC B35
NC B68
EP
C1
R528
10K_0402_5%~D
R528
10K_0402_5%~D
12
C1051
0.1U_0402_16V4Z~D
C1051
0.1U_0402_16V4Z~D
1 2
R506
10_0402_5%~D
@R506
10_0402_5%~D
@
12
C648
0.1U_0402_16V4Z~D
C648
0.1U_0402_16V4Z~D
1
2
R520 100K_0402_5%~DR520 100K_0402_5%~D
12
D65
RB751S40T1_SOD523-2~D
D65
RB751S40T1_SOD523-2~D
2 1
C649
0.1U_0402_10V7K~D
C649
0.1U_0402_10V7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MEC_XTAL2
BC_DAT_ECE5028
JTAG_TDI
BC_DAT_EMC4002
BC_DAT_ECE1077
PBAT_SMBDAT
PBAT_SMBCLK
DOCK_SMB_ALERT#
DDR_ON
M_ON
AUX_ON
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
SUS_ON
PCH_ALW_ON
LPC_LDRQ#_MEC
DOCK_POR_RST#
CHARGER_SMBDAT
CHARGER_SMBCLK
RUNPWROK
PCH_PWRGD#
RESET_OUT#
SYSTEM_ID
CLK_PCI_MEC
JTAG_TDO
LPC_LAD0
CLK_PCI_MEC
PBAT_SMBCLK
SIO_EXT_SMI#
PCH_ALW_ON
JTAG_RST#
JTAG_TDI
+RTC_CELL_VBAT
DOCK_PWR_SW#
JTAG_CLK
KYBRD_BKLT_PW M
PBAT_SMBDAT
PCH_PLTRST#_EC
SIO_RCIN#
DOCK_PWR_SW#
CHARGER_SMBCLK
DOCK_SMB_CLK
LPC_LAD1
IRQ_SERIRQ
CLK_KBD
SYSTEM_ID
CLKRUN#
LPC_LDRQ#_MEC
DOCK_POR_RST#
FWP#
LPC_LFRAME#
JTAG_TDO
JTAG_RST#
LPC_LAD2
POW ER_SW _IN#
ACAV_IN
DAT_TP_SIO
SIO_EXT_SCI#
DOCK_SMB_DAT
CLK_MSE
POW ER_SW _IN#
DAT_KBD
JTAG_CLK
DAT_MSE
JTAG_TMS
ALWON
BREATH_LED#
CHARGER_SMBDAT
MEC_XTAL1
SUS_ON
JTAG_TMS
CLK_TP_SIO
SML1_SMBCLK
SML1_SMBDATA
RESET_OUT#
DOCK_SMB_CLK
DOCK_SMB_DAT
CKG_FFS_SMBDAT
CKG_FFS_SMBCLK
LCD_SMBDAT
LCD_SMBCLK
AC_PRESENT
CARD_SMBDAT
CARD_SMBCLK
USH_SMBCLK
USH_SMBDAT
MEC_XTAL2
MEC_XTAL1
LPC_LAD3
DAI_GPU_R3P_SMBDAT
DAI_GPU_R3P_SMBCLK
BOARD_ID
AUX_ON
BAT2_LED#
BAT1_LED#
SIO_A20GATE
MSDATA
MSCLK
PS_ID
FWP#
EN_INVPWR
DDR_ON
RUNPWROK
BOARD_ID
HOST_DEBUG_TX
HOST_DEBUG_RX
SIO_SLP_S5#
SIO_PWRBTN#
DOCK_SMB_ALERT#
ALW_PWRGD_3V_5V
1.5V_SUS_PWRGD
ME_SUS_PWR_ACK
PM_MEPWROK
1.05V_M_PWRGD
BEEP
AC_PRESENT
M_ON
PCH_RSMRST#
ACAV_IN_NB
RESET_OUT#
ODD_DET#
BC_DAT_ECE1077
BC_CLK_EMC4002
BC_INT#_EMC4002
BC_DAT_ECE5028
BC_INT#_ECE5028
BC_CLK_ECE5028
BC_DAT_EMC4002
BC_CLK_ECE1077
BC_INT#_ECE1077
DAI_GPU_R3P_SMBDAT
DAI_GPU_R3P_SMBCLK
LAT_ON_SW #
HOST_DEBUG_RX
HOST_DEBUG_TX
MSCLK
MSDATA
MSDATA
VCI_IN1#
VCI_IN1#
FFS_INT1
CKG_FFS_SMBDAT
CKG_FFS_SMBCLK
EN_INVPWR
CPU1.5V_S3_GATE
DDR_HVREF_RST_GATE
LAT_ON_SW #
CPU_DETECT#
CPU_DETECT#
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+5V_RUN
+RTC_CELL
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_M
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW _PCH
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+RTC_CELL
+RTC_CELL
LPC_LFRAME#15,31,32,39
PCH_PLTRST#_EC8,18,32,34,36,39
CLK_PCI_MEC18
IRQ_SERIRQ15,31,32,39
LPC_LAD115,31,32,39
LPC_LAD215,31,32,39
LPC_LAD315,31,32,39
CLKRUN#17,32,39
LPC_LAD015,31,32,39
CLK_TP_SIO41
DAT_TP_SIO41
CLK_KBD38
DAT_KBD38
DAT_MSE38
CLK_MSE38
PBAT_SMBDAT44
PBAT_SMBCLK44
BREATH_LED#38,43
SIO_EXT_SMI#19
SIO_RCIN#19
ALWON 45
CKG_FFS_SMBDAT 6
CKG_FFS_SMBCLK 6
DOCK_SMB_DAT 38
DOCK_SMB_CLK 38
POW ER_SW _IN#23 POWER_SW#_MB 37,41
DOCK_PWR_BTN# 38DOCK_PWR_SW#23
PCH_ALW_ON42
CARD_SMBCLK 34
CARD_SMBDAT 34
ACAV_IN 23,51,52
SUS_ON42
SIO_EXT_SCI#19
KYBRD_BKLT_PW M41
DOCK_POR_RST#38
CHARGER_SMBDAT 51
CHARGER_SMBCLK 51
PCH_PWRGD# 23
SML1_SMBDATA16
SML1_SMBCLK16
LCD_SMBCLK 24
LCD_SMBDAT 24
USH_SMBDAT 31
USH_SMBCLK 31
EC_32KHZ_OUT23
DAI_GPU_R3P_SMBDAT 23,29,53
DAI_GPU_R3P_SMBCLK 23,29,53
AUX_ON30
BAT1_LED# 43
BAT2_LED# 43
SIO_A20GATE 19
PS_ID 44
MSCLK 36
MSDATA 36
EN_INVPWR 24
DDR_ON 46,47
HOST_DEBUG_TX 36
HOST_DEBUG_RX 36
SIO_PWRBTN# 17
SIO_SLP_S5#17
DOCK_SMB_ALERT# 38,44
ALW_PWRGD_3V_5V 45
1.5V_SUS_PWRGD 46
ME_SUS_PWR_ACK 17
PM_MEPWROK 17
1.05V_M_PWRGD 48
BEEP29
M_ON 42,48
PCH_RSMRST# 17
ODD_DET# 28
ACAV_IN_NB39,51,52
AC_PRESENT 17
RESET_OUT# 15,17
BC_CLK_ECE107741
BC_INT#_ECE502839
BC_DAT_ECE502839
BC_CLK_ECE502839
BC_DAT_EMC400223
BC_INT#_EMC400223
BC_CLK_EMC400223
BC_INT#_ECE107741
BC_DAT_ECE107741
HDD_FALL_INT 18,28
HDD_SMBDAT 28
HDD_SMBCLK 28
CPU1.5V_S3_GATE 12
DDR_HVREF_RST_GATE 8,13,14
LAT_ON_SW _BTN# 37
CPU_DETECT# 8
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EMC5045
40 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EMC5045
40 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EMC5045
40 69Thursday, January 21, 2010
Compal Electronics, Inc.
32 KHz Clock
Same as Laguna
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely pin A29
1=JTAG interface Reset disabled
0=Reset JTAG interface
CHIPSET_ID for BID
function
8mil
15mil
Bat2 = Amber LED
Bat1 = Blue LED
20mA drive pins
X02
X01
X00
33K
4.3K
R98 C919
130K 4700p
REV
4700p
4700p
4700p
4700p
240K 4700p
2K
1K
4700p
4700p
X03
A00
R837 100K_0402_5%~D@R837 100K_0402_5%~D@
12
C659
1U_0402_6.3V6K~D
C659
1U_0402_6.3V6K~D
1
2
R541 10K_0402_5%~DR541 10K_0402_5%~D
1 2
R540 2.2K_0402_5%~DR540 2.2K_0402_5%~D
12
R565 2.2K_0402_5%~DR565 2.2K_0402_5%~D
12
R593 0_0402_5%~DR593 0_0402_5%~D
1 2
R547 10K_0402_5%~DR547 10K_0402_5%~D
12
R98
1K_0402_5%~D
R98
1K_0402_5%~D
1 2
C651
0.1U_0402_16V4Z~D
C651
0.1U_0402_16V4Z~D
1
2
R552 2.2K_0402_5%~DR552 2.2K_0402_5%~D
1 2
R563 2.7K_0402_5%~DR563 2.7K_0402_5%~D
1 2
R579
10K_0402_5%~D
R579
10K_0402_5%~D
12
R580
49.9_0402_1%~D
R580
49.9_0402_1%~D
12
C673
4.7P_0402_50V8C~D
@C673
4.7P_0402_50V8C~D
@
1
2
R1231 10K_0402_5%~DR1231 10K_0402_5%~D
1 2
R582
10K_0402_5%~D
R582
10K_0402_5%~D
12
R1131
10K_0402_5%~D
R1131
10K_0402_5%~D
12
R640
100K_0402_5%~D
R640
100K_0402_5%~D
12
R554 10K_0402_5%~DR554 10K_0402_5%~D
1 2
R564 100K_0402_5%~DR564 100K_0402_5%~D
1 2
R544
0_0402_5%~D
R544
0_0402_5%~D
1 2
JP2
ACES_85204-06001~D
@JP2
ACES_85204-06001~D
@
66
55
44
33
22
11
G2
8G1
7
R1046 100K_0402_5%~DR1046 100K_0402_5%~D
1 2
R542 2.2K_0402_5%~DR542 2.2K_0402_5%~D
12
R546 100K_0402_5%~DR546 100K_0402_5%~D
12
G
D
S
Q189
SSM3K7002FU_SC70-3~D
G
D
S
Q189
SSM3K7002FU_SC70-3~D
2
13
R589 10K_0402_5%~DR589 10K_0402_5%~D
12
C665
0.1U_0402_16V4Z~D
C665
0.1U_0402_16V4Z~D
1
2
PS/2 INTERFACE
JTAG INTERFACE
FAN PWM & TACH
BC-LINK
HOST INTERFACE
MASTER CLOCK
SMBUS INTERFACE
GENERAL PURPOSE I/O
MISC INTERFACE
DELL PWR SW INF
U36
MEC5045-LZY_DQFN132_11X11~D
PS/2 INTERFACE
JTAG INTERFACE
FAN PWM & TACH
BC-LINK
HOST INTERFACE
MASTER CLOCK
SMBUS INTERFACE
GENERAL PURPOSE I/O
MISC INTERFACE
DELL PWR SW INF
U36
MEC5045-LZY_DQFN132_11X11~D
GPIO012/I2C1H_DATA/I2C2D_DATA B7
GPIO013/I2C1H_CLK/I2C2D_CLK A7
GPIO021/RC_ID1 A10
VSS[2]
B27
GPIO025/UART_CLK B14
GPIO153/LED3 A55
GPIO060/KBRST A25
GPIO110/PS2_CLK2/GPTP-IN6
A37
GPIO111/PS2_DAT2/GPTP-OUT6
B40
GPIO112/PS2_CLK1A
A38
GPIO113/PS2_DAT1A
B41
GPIO114/PS2_CLK0A
A39
GPIO115/PS2_DAT0A
B42
GPIO117/MSCLK B43
GPIO127/A20M A45
GPIO145/JTAG_TDI
A51
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
B56
JTAG_RST#
B57
GPIO146/I2C1K_CLK/JTAG_TDO
B55
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
A53 GPIO156/LED1 A57
GPIO31/GPTP-OUT2/BCM_E_DAT
B16 GPIO032/GPTP-IN3/BCM_E_CLK
A16 GPIO045/LSBCM_D_INT#
A19
XTAL1
A61
XTAL2
A62
nFWP B65
VBAT B64
VTR[1] A11
VTR[2] A22
VTR[3] B35
VTR[4] A41
VTR[5] A58
GPIO160/32KHZ_OUT
B62
VCC_PRWGD B26
VSS[5]
B60
GPIO116/MSDATA A40
AGND
B66
VR_CAP[1]
B12
VSS_RO
B54 VTR[6] A52
GPIO006/I2C1B_CLK B5
GPIO005/I2C1B_DATA A4
GPIO004/I2C1A_CLK B4
GPIO003/I2C1A_DATA A3
GPIO130/I2C2A_DATA B48
GPIO131/I2C2A_CLK B49
GPIO132/I2C1G_DATA A47
GPIO140/I2C1G_CLK B50
GPIO154/I2C1C_DATA/PS2_CLK1B
B59
GPIO155/I2C1C_CLK/PS2_DAT1B
A56
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
A5
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
B6
GPIO141/I2C1F_DATA/I2C2B_DATA B52
GPIO142/I2C1F_CLK/I2C2B_CLK A49
GPIO143/I2C1E_DATA B53
GPIO144/I2C1E_CLK A50
GPIO052/FAN_TACH3
B23 GPIO051/FAN_TACH2
A21 GPIO050/FAN_TACH1
B22
GPIO056/PWM3
A24 GPIO055/PWM2
B25 GPIO054/PWM1
A23 GPIO053/PWM0
B24
GPIO102/HSPI_SCLK A34
GPIO105/ECGP_SOUT B38
GPIO101/ECGP_SCLK B36
GPIO104/HSPI_MISO A35
VTR[7] B3
VTR[8] A26
GPIO157/LED2 B61
NC1
B17
GPIO121/BCM_A_INT#
A42
GPIO022/BCM_B_CLK
A12
GPIO023/BCM_B_DAT
B13
GPIO024/BCM_B_INT#
A13
GPIO044/BCM_C_CLK
B20
GPIO043/BCM_C_DAT
A18
GPIO042/BCM_C_INT#
B19
GPIO047/LSBCM_D_CLK
A20
GPIO046/LSBCM_D_DAT
B21
BGPO0 A59
VCI_IN2 # B63
VCI_OUT A60
VCI_IN1 # A63
VCI_IN0 # B67
VCI_OVR D_IN B1
VCI_IN3 # A1
GPIO001/ECSPI_CS1 B2
GPIO002/ECSPI_CS2 A2
GPIO014/GPTP-IN7/HSPI_CS1 B8
GPIO040/GPTP-OUT3/HSPI_CS2 B18
GPIO015/GPTP-OUT7 A8
GPIO016/GPTP-IN8 B9
GPIO017/GPTP-OUT8 A9
GPIO26/GPTP-IN1 A14
GPIO27/GPTP-OUT1 B15
GPIO041 A17
GPIO107/nRESET_OUT B39
GPIO125/GPTP-IN5 A44
GPIO126 B47
GPIO151/GPTP-IN4 A54
GPIO152/GPTP-OUT4 B58
GPIO011/nSMI
A6
GPIO061/LPCPD#
A27
LDRQ#
B29
SER_IRQ
A28
LRESET#
B30
PCI_CLK
A29
LFRAME#
B31
LAD0
A30
LAD1
B32
LAD2
A31
LAD3
B33
CLKRUN#
A32
GPIO100/nEC_SCI
A33
EP
C1
GPIO123/BCM_A_CLK
A43
GPIO122/BCM_A_DAT
B45
GPIO30/GPTP-IN2/BCM_E_INT#
A15
NC2
B34
NC3
A46
NC4
A48
NC5
B51
NC6
A64
NC7
B68
VSS[7]
B11
VSS[8]
B28
GPIO020/RC_ID2 B10
GPIO120/UART_TX B44
GPIO124/GPTP-OUT5/UART_RX B46
GPIO106/HSPI_MOSI A36
GPIO103/ECGP_SIN B37
C668
0.1U_0402_16V4Z~D
C668
0.1U_0402_16V4Z~D
1
2
R569 4.7K_0402_5%~DR569 4.7K_0402_5%~D
12
R561 100K_0402_5%~DR561 100K_0402_5%~D
12
R551 2.2K_0402_5%~DR551 2.2K_0402_5%~D
1 2
R508 0_0402_5%~D@R508 0_0402_5%~D@
12
R85
1K_0402_5%~D
R85
1K_0402_5%~D
1 2
R29 2.2K_0402_5%~DR29 2.2K_0402_5%~D
1 2
C674
33P_0402_50V8J~D
C674
33P_0402_50V8J~D
1
2
R567 2.2K_0402_5%~DR567 2.2K_0402_5%~D
12
C663
10U_0805_10V4Z~D
C663
10U_0805_10V4Z~D
1
2
C660
0.1U_0402_16V4Z~D
C660
0.1U_0402_16V4Z~D
1
2
R581
10K_0402_5%~D
R581
10K_0402_5%~D
12
R587 0_0402_5%~DR587 0_0402_5%~D
12
R5 8.2K_0402_5%~D@R5 8.2K_0402_5%~D@
12
R575
10K_0402_5%~D
R575
10K_0402_5%~D
12
JDEG1
ACES_85204-06001~D
@JDEG1
ACES_85204-06001~D
@
66
55
44
33
22
11
G2
8G1
7
C666
0.1U_0402_16V4Z~D
C666
0.1U_0402_16V4Z~D
1
2
R539
100K_0402_5%~D
R539
100K_0402_5%~D
12
C1053
0.1U_0402_16V4Z~D
C1053
0.1U_0402_16V4Z~D
1 2
R543 100K_0402_5%~DR543 100K_0402_5%~D
1 2
JTAG1
@SHORT PADS~D
@
JTAG1
@SHORT PADS~D
@
11
2
2
R27 2.2K_0402_5%~DR27 2.2K_0402_5%~D
1 2
R1492 10K_0402_5%~DR1492 10K_0402_5%~D
1 2
C918
4700P_0402_25V7K~D
C918
4700P_0402_25V7K~D
1
2
C1884
1U_0402_6.3V6K~D
@C1884
1U_0402_6.3V6K~D
@
1 2
C671
4.7U_0603_6.3V6M~D
C671
4.7U_0603_6.3V6M~D
1
2
R574
100K_0402_5%~D
@
R574
100K_0402_5%~D
@
12
R585
100_0402_1%~D
@
R585
100_0402_1%~D
@
12
C658
1U_0402_6.3V6K~D
@C658
1U_0402_6.3V6K~D
@
1 2
R1410
10K_0402_5%~D
R1410
10K_0402_5%~D
12
C662
0.1U_0402_16V4Z~D
C662
0.1U_0402_16V4Z~D
1
2
R446 0_0402_5%~D@R446 0_0402_5%~D@
12
R571 4.7K_0402_5%~DR571 4.7K_0402_5%~D
12
R1512 100K_0402_5%~DR1512 100K_0402_5%~D
12
R657 100K_0402_5%~DR657 100K_0402_5%~D
12
NCNC
Y4
32.768K_12.5PF_Q13MC30610018~D
NCNC
Y4
32.768K_12.5PF_Q13MC30610018~D
1 4
2 3
R595 100K_0402_5%~DR595 100K_0402_5%~D
1 2
R545 100K_0402_5%~DR545 100K_0402_5%~D
12
R566 100K_0402_5%~DR566 100K_0402_5%~D
1 2
C670
1U_0402_6.3V6K~D
C670
1U_0402_6.3V6K~D
1
2
R550
100K_0402_5%~D
R550
100K_0402_5%~D
12
R572 4.7K_0402_5%~DR572 4.7K_0402_5%~D
12
R586
10K_0402_5%~D
@R586
10K_0402_5%~D
@
1 2
C919
4700P_0402_25V7K~D
C919
4700P_0402_25V7K~D
1
2
C667
0.1U_0402_16V4Z~D
C667
0.1U_0402_16V4Z~D
1
2
R584
10K_0402_5%~D
R584
10K_0402_5%~D
1 2
R577 0_0402_5%~DR577 0_0402_5%~D
1 2
C1040
0.1U_0402_16V4Z~D
C1040
0.1U_0402_16V4Z~D
1
2
R30 2.2K_0402_5%~DR30 2.2K_0402_5%~D
1 2
C675
33P_0402_50V8J~D
C675
33P_0402_50V8J~D
1
2
R570 4.7K_0402_5%~DR570 4.7K_0402_5%~D
12
R578
10K_0402_5%~D
R578
10K_0402_5%~D
1 2
R560
100K_0402_5%~D
R560
100K_0402_5%~D
12
R588
10_0402_5%~D
@R588
10_0402_5%~D
@
12
C661
0.1U_0402_16V4Z~D
C661
0.1U_0402_16V4Z~D
1
2
C1885
1U_0402_6.3V6K~D
C1885
1U_0402_6.3V6K~D
1
2
C669
1U_0402_6.3V6K~D
@C669
1U_0402_6.3V6K~D
@
1 2
R576
10K_0402_5%~D
R576
10K_0402_5%~D
12
R568 100K_0402_5%~DR568 100K_0402_5%~D
1 2
R26 2.2K_0402_5%~DR26 2.2K_0402_5%~D
1 2
R635
0_0402_5%~D
@R635
0_0402_5%~D
@
12
R583
10K_0402_5%~D
R583
10K_0402_5%~D
12
C664
0.1U_0402_16V4Z~D
C664
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP_DATA
TP_CLK
TP_CLK
TP_DATA
CLK_TP_SIO
DAT_TP_SIO
POWER_SW#_MB
COEX1_BT_ACTIVE
COEX2_WLAN_ACTIVE
TP_DATA
TP_CLK
KYBRD_BKLT_PWM
TP_DET#
+5V_RUN+3.3V_ALW
+3.3V_ALW
+5V_ALW
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+5V_RUN
+5V_ALW
CLK_TP_SIO 40
DAT_TP_SIO 40
POWER_SW#_MB37,40
BT_DET#18
USBP6-18
USBP6+18
BT_ACTIVE43
COEX1_BT_ACTIVE36
BT_RADIO_DIS#39
COEX2_WLAN_ACTIVE36
BC_CLK_ECE107740
BC_DAT_ECE107740
BC_INT#_ECE107740
KYBRD_BKLT_PWM40
TP_DET#39
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Touch PAD/Int KB/LID
41 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Touch PAD/Int KB/LID
41 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Touch PAD/Int KB/LID
41 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place close to JTP1 connector
Place on Top
Place on Bottom
Power Switch for debug
Place close to
JTP1.5,6
BlueTooth
Touch Pad
Touch Pad Conn. Pitch=0.5
R1545 100_0603_5%~DR1545 100_0603_5%~D
1 2
C1704
33P_0402_50V8J~D
C1704
33P_0402_50V8J~D
1
2
C684
100P_0402_50V8J~D
@C684
100P_0402_50V8J~D
@
1
2
R1546 100_0603_5%~DR1546 100_0603_5%~D
1 2
Part Number Description
SP070007V0L S SOCKET TYCO 1770551-1
10P H5.9 SMART
@SM CARD BODY
Part Number Description
SP070007V0L S SOCKET TYCO 1770551-1
10P H5.9 SMART
@SM CARD BODY
C680
10P_0402_50V8J~D
C680
10P_0402_50V8J~D
1
2
R613
4.7K_0402_5%~D
R613
4.7K_0402_5%~D
12
PWRSW1
@SHORT PADS~D
@
PWRSW1
@SHORT PADS~D
@
1
122
Part Number Description
DC02000CS0L H-CONN SET ZGX
MB-MDC
MDC wire set cable@
Part Number Description
DC02000CS0L H-CONN SET ZGX
MB-MDC
MDC wire set cable@
JBT
E&T_3703-E12N-03R
JBT
E&T_3703-E12N-03R
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
G1
13
G2
14
JTP1
HRS_FH12-16S-0P5SH(55)~D
JTP1
HRS_FH12-16S-0P5SH(55)~D
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
G1
17
G2
18
R614
4.7K_0402_5%~D
R614
4.7K_0402_5%~D
12
C1413
0.1U_0402_16V4Z~D
C1413
0.1U_0402_16V4Z~D
1
2
C678
0.1U_0402_16V4Z~D
C678
0.1U_0402_16V4Z~D
1
2
Part Number Description
DC02000870L H-CONN SET ZJX
MB-LCD 14 WXGA+(-2ch)
LVDS cable@
Part Number Description
DC02000870L H-CONN SET ZJX
MB-LCD 14 WXGA+(-2ch)
LVDS cable@
PWRSW2
@SHORT PADS~D
@
PWRSW2
@SHORT PADS~D
@
1
122
C683
10P_0402_50V8J~D
C683
10P_0402_50V8J~D
1
2
Part Number Description
DC000001Q0L PCMCIA TYCO
1759096-1
@PCMCIA BODY
Part Number Description
DC000001Q0L PCMCIA TYCO
1759096-1
@PCMCIA BODY
D54
SD05.TCT_SOD323-2~D
@
D54
SD05.TCT_SOD323-2~D
@
2 1
C771
0.1U_0402_16V4Z~D
C771
0.1U_0402_16V4Z~D
1
2
Part Number Description
DC020003Y0L H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)
LVDS cable@
Part Number Description
DC020003Y0L H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)
LVDS cable@
C681
10P_0402_50V8J~D
C681
10P_0402_50V8J~D
1
2
C1334
100P_0402_50V8J~D
@C1334
100P_0402_50V8J~D
@
1
2
C1703
0.1U_0402_16V4Z~D
C1703
0.1U_0402_16V4Z~D
1 2
R1407
10K_0402_5%~D
R1407
10K_0402_5%~D
12
Part Number Description
GC20323MX00 BATT CR2032 3V
220MAH MAXELL
RTC BATT@
Part Number Description
GC20323MX00 BATT CR2032 3V
220MAH MAXELL
RTC BATT@
D53
SD05.TCT_SOD323-2~D
@
D53
SD05.TCT_SOD323-2~D
@
2 1
Part Number Description
DC02000840L H-CONN SET ZJX
MB-B/T-TP-FP
T/P wire set cable@
Part Number Description
DC02000840L H-CONN SET ZJX
MB-B/T-TP-FP
T/P wire set cable@
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
Speak@
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
Speak@
Part Number Description
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
FAN@
Part Number Description
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
FAN@
C682
10P_0402_50V8J~D
C682
10P_0402_50V8J~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ALW_ENABLE
SUS_ON_3.3V#
SUS_ENABLE
M_ENABLE
5V_RUN_ENABLE
3.3V_RUN_ENABLE
+1.5V_RUN_CHG
+5V_RUN_CHG
+3.3V_RUN_CHG
RUN_ON_ENABLE#
SUS_ON_3.3V#
+3.3V_SUS_CHG
ALW_ON_3.3V#
+3.3V_ALWPCH_CHG
+3.3V_M_CHG
ALW_ON_3.3V#
M_ON_3.3V#
M_ON_3.3V#
1.5V_RUN_ENABLE
RUN_ON_ENABLE#
1.05V_RUN_ENABLE
+1.05V_RUN_CHG
+1.5V_CPU_VDDQ_CHG
+DDR_CHG
RUN_ON_ENABLE#
RUN_ON_CPU1.5VS3#
+15V_ALW+3.3V_ALW2 +5V_ALW
+5V_RUN
+15V_ALW
+3.3V_ALW2
+3.3V_ALW +3.3V_ALW_PCH
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW2
+15V_ALW
+3.3V_ALW
+3.3V_M
+3.3V_ALW2
+15V_ALW
+3.3V_RUN+3.3V_ALW
+15V_ALW
+3.3V_SUS
+1.5V_RUN +3.3V_RUN+5V_RUN
+3.3V_ALW_PCH
+3.3V_M
+1.5V_RUN
+1.5V_MEM
+15V_ALW
+15V_ALW +1.05V_M
+1.05V_RUN
+1.05V_RUN +1.5V_CPU_VDDQ +0.75V_DDR_VTT
RUN_ON12,34,39,47,62
PCH_ALW_ON40
SUS_ON40
M_ON40,48
ALW_ENABLE21
1.5V_PWRGD80.75V_VR_EN 47
RUN_ON_CPU1.5VS3#12
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
POWER CONTROL
42 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
POWER CONTROL
42 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
POWER CONTROL
42 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5VRUN Source
DC/DC Interface
+3.3V_ALW_PCH Source
+3.3V_SUS Source
+3.3VM Source
+3.3V_RUN Source
Discharg Circuit
Discharg Circuit +1.5V_RUN Source
+1.05V_RUN Source
G
D
S
Q80
SSM3K7002FU_SC70-3~D
@
G
D
S
Q80
SSM3K7002FU_SC70-3~D
@
2
13
G
D
S
Q82
SSM3K7002FU_SC70-3~D
@
G
D
S
Q82
SSM3K7002FU_SC70-3~D
@
2
13
R622
1K_0402_5%~D
@R622
1K_0402_5%~D
@
12
R602
100K_0402_5%~D
R602
100K_0402_5%~D
12
R1499
0_0402_5%~D
R1499
0_0402_5%~D
1 2
Q183
SI4164DY-T1-GE3_SO8~D
Q183
SI4164DY-T1-GE3_SO8~D
36
5
7
8
2
4
1
S
G
D
Q60
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q60
SI3456BDV-T1-E3_TSOP6~D
3
6
2
45
1
R597
100K_0402_5%~D
R597
100K_0402_5%~D
12
G
D
S
Q206
BSS138_SOT23~D
G
D
S
Q206
BSS138_SOT23~D
2
13
Q56B
DMN66D0LDW-7_SOT363-6~D
Q56B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R628
1K_0402_5%~D
@R628
1K_0402_5%~D
@
12
R605
20K_0402_5%~D
R605
20K_0402_5%~D
12
R606
100K_0402_5%~D
R606
100K_0402_5%~D
12
R1479
220_0402_5%~D
R1479
220_0402_5%~D
12
G
D
S
Q77
SSM3K7002FU_SC70-3~D
@
G
D
S
Q77
SSM3K7002FU_SC70-3~D
@
2
13
C1191
4700P_0402_25V7K~D
C1191
4700P_0402_25V7K~D
1
2
R625
39_0603_5%~D
R625
39_0603_5%~D
12
Q56A
DMN66D0LDW-7_SOT363-6~D
Q56A
DMN66D0LDW-7_SOT363-6~D
61
2
C694
10U_0805_10V4Z~D
C694
10U_0805_10V4Z~D
1
2
R1500
0_0402_5%~D
@R1500
0_0402_5%~D
@
1 2
C687
10U_0805_10V4Z~D
C687
10U_0805_10V4Z~D
1
2
R607
20K_0402_5%~D
@
R607
20K_0402_5%~D
@
12
G
D
S
Q72
SSM3K7002FU_SC70-3~D
G
D
S
Q72
SSM3K7002FU_SC70-3~D
2
13
Q57B
DMN66D0LDW-7_SOT363-6~D
Q57B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C696
4700P_0402_25V7K~D
C696
4700P_0402_25V7K~D
1
2
G
D
S
Q64
SSM3K7002FU_SC70-3~D
G
D
S
Q64
SSM3K7002FU_SC70-3~D
2
13
C686
10U_0805_10V4Z~D
C686
10U_0805_10V4Z~D
1
2
R1306
100K_0402_5%~D
R1306
100K_0402_5%~D
12
C692
4700P_0402_25V7K~D
C692
4700P_0402_25V7K~D
1
2
Q57A
DMN66D0LDW-7_SOT363-6~D
Q57A
DMN66D0LDW-7_SOT363-6~D
61
2
G
D
S
Q152
SSM3K7002FU_SC70-3~D
G
D
S
Q152
SSM3K7002FU_SC70-3~D
2
13
R1484
100K_0402_5%~D
R1484
100K_0402_5%~D
1 2
R599
100K_0402_5%~D
R599
100K_0402_5%~D
12
R627
1K_0402_5%~D
@R627
1K_0402_5%~D
@
12
G
D
S
Q81
SSM3K7002FU_SC70-3~D
@
G
D
S
Q81
SSM3K7002FU_SC70-3~D
@
2
13
Q62B
DMN66D0LDW-7_SOT363-6~D
Q62B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C691
10U_0805_10V4Z~D
C691
10U_0805_10V4Z~D
1
2
G
D
S
Q1
SSM3K7002FU_SC70-3~D
G
D
S
Q1
SSM3K7002FU_SC70-3~D
2
13
C693
470P_0402_50V7K~D
C693
470P_0402_50V7K~D
1
2
R600
20K_0402_5%~D
R600
20K_0402_5%~D
12
R611
100K_0402_5%~D
R611
100K_0402_5%~D
12
R1225
20K_0402_5%~D
R1225
20K_0402_5%~D
12
S
G
D
Q54
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q54
SI3456BDV-T1-E3_TSOP6~D
3
6
2
45
1
Q62A
DMN66D0LDW-7_SOT363-6~D
Q62A
DMN66D0LDW-7_SOT363-6~D
61
2
S
G
D
Q66
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q66
SI3456BDV-T1-E3_TSOP6~D
3
6
2
45
1
G
D
S
Q78
SSM3K7002FU_SC70-3~D
G
D
S
Q78
SSM3K7002FU_SC70-3~D
2
13
R612
20K_0402_5%~D
@
R612
20K_0402_5%~D
@
12
C688
3300P_0402_50V7K~D
C688
3300P_0402_50V7K~D
1
2
R1224
100K_0402_5%~D
R1224
100K_0402_5%~D
12
Q68B
DMN66D0LDW-7_SOT363-6~D
Q68B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C690
10U_0805_10V4Z~D
C690
10U_0805_10V4Z~D
1
2
R603
100K_0402_5%~D
R603
100K_0402_5%~D
12
G
D
S
Q204
SSM3K7002FU_SC70-3~D
G
D
S
Q204
SSM3K7002FU_SC70-3~D
2
13
R624
22_0603_5%~D
R624
22_0603_5%~D
12
S
G
D
Q151
SI3456BDV-T1-E3_TSOP6~D
S
G
D
Q151
SI3456BDV-T1-E3_TSOP6~D
3
6
2
45
1
C1190
10U_0805_10V4Z~D
C1190
10U_0805_10V4Z~D
1
2
R636
39_0402_5%~D
@R636
39_0402_5%~D
@
12
G
D
S
Q79
SSM3K7002FU_SC70-3~D
G
D
S
Q79
SSM3K7002FU_SC70-3~D
2
13
R610
100K_0402_5%~D
R610
100K_0402_5%~D
12
Q68A
DMN66D0LDW-7_SOT363-6~D
Q68A
DMN66D0LDW-7_SOT363-6~D
61
2
R1307
20K_0402_5%~D
R1307
20K_0402_5%~D
12
C689
2200P_0402_50V7K~D
C689
2200P_0402_50V7K~D
1
2
C1411
10U_0805_10V4Z~D
C1411
10U_0805_10V4Z~D
1
2
C1412
2200P_0402_50V7K~D
C1412
2200P_0402_50V7K~D
1
2
R623
1K_0402_5%~D
@R623
1K_0402_5%~D
@
12
R601
20K_0402_5%~D
R601
20K_0402_5%~D
12
R616
39_0603_5%~D
R616
39_0603_5%~D
12
R604
100K_0402_5%~D
R604
100K_0402_5%~D
12
Q55
SI4164DY-T1-GE3_SO8~D
Q55
SI4164DY-T1-GE3_SO8~D
36
5
7
8
2
4
1
G
D
S
Q76
SSM3K7002FU_SC70-3~D
@
G
D
S
Q76
SSM3K7002FU_SC70-3~D
@
2
13
R598
100K_0402_5%~D
R598
100K_0402_5%~D
12
Q61
NTMS4107NR2G_SO8~D
Q61
NTMS4107NR2G_SO8~D
36
5
7
8
2
4
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MASK_BASE_LEDS#
SATA_LED
SATA_ACT#
BREATH_BLUE_LED
BATT_BLUE
BATT_YELLOW
WWAN_LED
R_CAP_LED#
R_NUM_LED#
R_SCRL_LED#
BREATH_BLUE_LED_SNIFF
BREATH_LED#_R
MASK_BASE_LEDS#
BAT2_LED
BAT1_LED
WLAN_LED
MASK_BASE_LEDS#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
LID_CL#
SYS_LED_MASK#
MASK_BASE_LEDS#
BAT1_LED#
MASK_BASE_LEDS#
WPAN_LED
MASK_BASE_LEDS#
BT_ACTIVE
BAT2_LED#
+5V_RUN
+3.3V_RUN
+3.3V_ALW
+5V_ALW
+3.3V_ALW
+3.3V_RUN
+5V_RUN
+5V_ALW
+5V_ALW
+5V_ALW
+5V_ALW
+5V_ALW
+5V_ALW
+3.3V_ALW
+5V_ALW
+3.3V_ALW
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_WLAN
+5V_RUN
+5V_RUN
+3.3V_RUN
BREATH_LED#38,40
SATA_ACT#_R15
BREATH_BLUE_LED 24
BAT2_LED#40
BAT1_LED#40
BATT_BLUE_LED 24
BATT_YELLOW_LED 24
LED_WWAN_OUT#36
CAP_LED#39
NUM_LED#39
SCRL_LED#39
SYS_LED_MASK#39
SYS_LED_MASK#39
SYS_LED_MASK#39
SYS_LED_MASK#39
LED_WLAN_OUT#36
BT_ACTIVE41
BREATH_BLUE_LED_SNIFF 37
LID_CL#37,39
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PAD and Standoff
43 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PAD and Standoff
43 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
PAD and Standoff
43 69Thursday, January 21, 2010
Compal Electronics, Inc.
Fiducial Mark
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Battery LED
DELL CONFIDENTIAL/PROPRIETARY
WWAN LED solution for Blue LED
EMI CLIP
Keyboard Status LED
HDD LED solution for Blue LED
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
0
10
X
LED Circuit Control Table
Do not Mask LEDs (Lid Opened)
11
WLAN LED solution for Blue LED
WPAN LED solution for Blue LED
Q139
PDTA114EU_SC70-3~D
Q139
PDTA114EU_SC70-3~D
2
1 3
H13
H_3P2
@H13
H_3P2
@
1
U63
NC7SZ04P5X_NL_SC70-5~D
U63
NC7SZ04P5X_NL_SC70-5~D
A
2Y4
P5
NC 1
G
3
R1004
100K_0402_5%~D
R1004
100K_0402_5%~D
12
R655 1K_0402_5%~DR655 1K_0402_5%~D
1 2
Q134B
DMN66D0LDW-7_SOT363-6~D
Q134B
DMN66D0LDW-7_SOT363-6~D
3
5
4
D42
LTST-C191ZBKT-Q_BLUE~D
D42
LTST-C191ZBKT-Q_BLUE~D
12
FD3
FIDUCIAL MARK~D
@FD3
FIDUCIAL MARK~D
@
1
R556 1K_0402_5%~DR556 1K_0402_5%~D
1 2
Q101
PDTA114EU_SC70-3~D
Q101
PDTA114EU_SC70-3~D
2
1 3
H14
H_3P2
@H14
H_3P2
@
1
R999
100K_0402_5%~D
R999
100K_0402_5%~D
12
FD1
FIDUCIAL MARK~D
@FD1
FIDUCIAL MARK~D
@
1
Q135B
DMN66D0LDW-7_SOT363-6~D
Q135B
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q144A
DMN66D0LDW-7_SOT363-6~D
Q144A
DMN66D0LDW-7_SOT363-6~D
61
2
R206
100K_0402_5%~D
R206
100K_0402_5%~D
12
Q92
PDTA114EU_SC70-3~D
Q92
PDTA114EU_SC70-3~D
2
1 3
C1060
0.1U_0402_16V4Z~D
C1060
0.1U_0402_16V4Z~D
1 2
H9
H_3P0
@H9
H_3P0
@
1
Q97
PDTA114EU_SC70-3~D
Q97
PDTA114EU_SC70-3~D
2
1 3
H3
H_2P8
@H3
H_2P8
@
1
H20
H_5P0
@H20
H_5P0
@
1
G
D
S
Q93
SSM3K7002FU_SC70-3~D
G
D
S
Q93
SSM3K7002FU_SC70-3~D
2
13
Q134A
DMN66D0LDW-7_SOT363-6~D
Q134A
DMN66D0LDW-7_SOT363-6~D
61
2
H1
H_2P8
@H1
H_2P8
@
1
H6
H_3P2
@H6
H_3P2
@
1
H5
H_2P8
@H5
H_2P8
@
1
Q144B
DMN66D0LDW-7_SOT363-6~D
Q144B
DMN66D0LDW-7_SOT363-6~D
3
5
4
FD2
FIDUCIAL MARK~D
@FD2
FIDUCIAL MARK~D
@
1
G
D
S
Q142
SSM3K7002FU_SC70-3~D
G
D
S
Q142
SSM3K7002FU_SC70-3~D
2
13
H19
H_5P0
@H19
H_5P0
@
1
R662
100K_0402_5%~D
R662
100K_0402_5%~D
12
H16
H_3P2
@H16
H_3P2
@
1
Q135A
DMN66D0LDW-7_SOT363-6~D
Q135A
DMN66D0LDW-7_SOT363-6~D
61
2
H21
H_5P3
@H21
H_5P3
@
1
R654
10K_0402_5%~D
R654
10K_0402_5%~D
12
R82
47K_0402_5%~D
R82
47K_0402_5%~D
12
Q145A
DMN66D0LDW-7_SOT363-6~D
Q145A
DMN66D0LDW-7_SOT363-6~D
61
2
G
D
S
Q116
SSM3K7002FU_SC70-3~D
G
D
S
Q116
SSM3K7002FU_SC70-3~D
2
13
C1337
0.1U_0402_16V4Z~D
C1337
0.1U_0402_16V4Z~D
1 2
Q120
PDTA114EU_SC70-3~D
Q120
PDTA114EU_SC70-3~D
2
1 3
H12
H_3P2
@H12
H_3P2
@
1
G
D
S
Q143
SSM3K7002FU_SC70-3~D
G
D
S
Q143
SSM3K7002FU_SC70-3~D
2
13
Q137
PDTA114EU_SC70-3~D
Q137
PDTA114EU_SC70-3~D
2
1 3
H22
H_5P3
@H22
H_5P3
@
1
R596 1K_0402_5%~DR596 1K_0402_5%~D
1 2
FD4
FIDUCIAL MARK~D
@FD4
FIDUCIAL MARK~D
@
1
Q145B
DMN66D0LDW-7_SOT363-6~D
Q145B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R125 1K_0402_5%~DR125 1K_0402_5%~D
1 2
H10
H_3P0
@H10
H_3P0
@
1
R661 1K_0402_5%~DR661 1K_0402_5%~D
1 2
D43
LTST-C191ZBKT-Q_BLUE~D
D43
LTST-C191ZBKT-Q_BLUE~D
12
G
D
S
Q98
SSM3K7002FU_SC70-3~D
G
D
S
Q98
SSM3K7002FU_SC70-3~D
2
13
C1061
0.1U_0402_16V4Z~D
C1061
0.1U_0402_16V4Z~D
1 2
Q94
PDTA114EU_SC70-3~D
Q94
PDTA114EU_SC70-3~D
2
1 3
C1058
0.1U_0402_16V4Z~D
C1058
0.1U_0402_16V4Z~D
1 2
BLUE
YEL
D46
LTST-C155TBJSKT_Blue/YEL~D
BLUE
YEL
D46
LTST-C155TBJSKT_Blue/YEL~D
2 1
34
G
D
S
Q150
SSM3K7002FU_SC70-3~D
G
D
S
Q150
SSM3K7002FU_SC70-3~D
2
13
H4
H_2P8
@H4
H_2P8
@
1
Q99
PDTA114EU_SC70-3~D
Q99
PDTA114EU_SC70-3~D
2
1 3
G
D
S
Q141
SSM3K7002FU_SC70-3~D
G
D
S
Q141
SSM3K7002FU_SC70-3~D
2
13
R90
47K_0402_5%~D
R90
47K_0402_5%~D
12
H23
H_6P1
@H23
H_6P1
@
1
R1000
100K_0402_5%~D
R1000
100K_0402_5%~D
12
D45
LTST-C191ZBKT-Q_BLUE~D
D45
LTST-C191ZBKT-Q_BLUE~D
12
D67
SDM10U45-7_SOD523-2~D
D67
SDM10U45-7_SOD523-2~D
21
D61
LTST-C191ZBKT-Q_BLUE~D
D61
LTST-C191ZBKT-Q_BLUE~D
12
100K_0402_5%~D
R1005
100K_0402_5%~D
R1005
12
Q115
PDTA114EU_SC70-3~D
Q115
PDTA114EU_SC70-3~D
2
1 3
D57
LTST-C191ZBKT-Q_BLUE~D
D57
LTST-C191ZBKT-Q_BLUE~D
12
H17
H_3P2
@H17
H_3P2
@
1
H7
H_3P0
@H7
H_3P0
@
1
R666
150_0402_5%~D
R666
150_0402_5%~D
1 2
Q121
PDTA114EU_SC70-3~D
Q121
PDTA114EU_SC70-3~D
2
1 3
U117
NC7SZ04P5X_NL_SC70-5~D
<BOM Structure>
U117
NC7SZ04P5X_NL_SC70-5~D
<BOM Structure>
A
2Y4
P5
NC 1
G
3
G
D
S
Q95
SSM3K7002FU_SC70-3~D
G
D
S
Q95
SSM3K7002FU_SC70-3~D
2
13
R89
47K_0402_5%~D
R89
47K_0402_5%~D
12
R1007
100K_0402_5%~D
R1007
100K_0402_5%~D
1 2
CLIP1
EMI_CLIP
CLIP1
EMI_CLIP
GND 1
R664 1K_0402_5%~DR664 1K_0402_5%~D
1 2
D58
LTST-C191ZBKT-Q_BLUE~D
D58
LTST-C191ZBKT-Q_BLUE~D
12
H11
H_3P2
@H11
H_3P2
@
1
R1003
150_0402_5%~D
R1003
150_0402_5%~D
1 2
H24
H_2P5X3P1
@H24
H_2P5X3P1
@
1
H15
H_3P2
@H15
H_3P2
@
1
C1059
0.1U_0402_16V4Z~D
C1059
0.1U_0402_16V4Z~D
1 2
R663 1K_0402_5%~DR663 1K_0402_5%~D
1 2
R659 1K_0402_5%~DR659 1K_0402_5%~D
1 2
U64
NC7SZ04P5X_NL_SC70-5~D
U64
NC7SZ04P5X_NL_SC70-5~D
A
2Y4
P5
NC 1
G
3
D59
LTST-C191ZBKT-Q_BLUE~D
D59
LTST-C191ZBKT-Q_BLUE~D
12
R748
10K_0402_5%~D
<BOM Structure>
R748
10K_0402_5%~D
<BOM Structure>
12
R1006
100K_0402_5%~D
R1006
100K_0402_5%~D
1 2
Q122
PDTA114EU_SC70-3~D
Q122
PDTA114EU_SC70-3~D
2
1 3
H8
H_3P0
@H8
H_3P0
@
1
U65
TC7SH08FU_SSOP5~D
U65
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
R665 1K_0402_5%~DR665 1K_0402_5%~D
1 2
H25
H_2P5X3P1
@H25
H_2P5X3P1
@
1
Q138
PDTA114EU_SC70-3~D
Q138
PDTA114EU_SC70-3~D
2
1 3
R1001 150_0402_5%~DR1001 150_0402_5%~D
1 2
U42
NC7SZ04P5X_NL_SC70-5~D
U42
NC7SZ04P5X_NL_SC70-5~D
A
2Y4
P5
NC 1
G
3
Q140
PDTA114EU_SC70-3~D
Q140
PDTA114EU_SC70-3~D
2
1 3
R1002
1K_0402_5%~D
R1002
1K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NB_PSID_TS5A63157
+DC_IN
PBATT+_C
NB_PSID
+DCIN_JACK
-DCIN_JACK
Z4012
Z4304
Z4305
Z4306
+3.3V_ALW
GND
+5V_ALW
+5V_ALW
+DC_IN_SS
+5V_ALW
PBATT+
GND
+3.3V_ALW
+3.3V_ALW
+DC_IN
+5V_ALW
+COINCELL
+RTC_CELL
+3.3V_RTC_LDO
GND
+5V_ALW
+COINCELL
DOCK_SMB_ALERT# 38,40
SLICE_BAT_PRES#38,39,52
DCIN_CBL_DET# 39
PSID_DISABLE# 39
PBAT_PRES# 39
PBAT_SMBDAT 40
PBAT_SMBCLK 40
DOCK_PSID38 GPIO_PSID_SELECT 39
PS_ID 40
SOFT_START_GC 52
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
+DCIN
44 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
+DCIN
44 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
+DCIN
44 69Thursday, January 21, 2010
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
ESD Diodes
Primary Battery Connector
DC_IN+ Source
COIN RTC Battery
Move to power schematic
PR4
100_0402_5%~D
PR4
100_0402_5%~D
1 2
PC8
0.1U_0603_25V7K~D
PC8
0.1U_0603_25V7K~D
12
PU1
TS5A63157DCKR_SC70-6~D
PU1
TS5A63157DCKR_SC70-6~D
V+ 5
NC
3COM 4
GND
2
IN 6
NO
1
PC1
1U_0603_10V4Z~D
PC1
1U_0603_10V4Z~D
1
2
G
D
S
PQ2
FDV301N_NL_SOT23-3~D
G
D
S
PQ2
FDV301N_NL_SOT23-3~D
2
1 3
PC13
0.1U_0603_25V7K~D
PC13
0.1U_0603_25V7K~D
12
PC6
0.022U_0805_50V7K~D
PC6
0.022U_0805_50V7K~D
1 2
PL2
BLM18BD102SN1D_0603~D
PL2
BLM18BD102SN1D_0603~D
12
PR12
10K_0402_1%~D
PR12
10K_0402_1%~D
12
PR10
33_0402_5%~D
PR10
33_0402_5%~D
1 2
PR5
100_0402_5%~D
PR5
100_0402_5%~D
1 2
PD6
RB751V-40_SOD323-2~D
PD6
RB751V-40_SOD323-2~D
1 2
PR3
100_0402_5%~D
PR3
100_0402_5%~D
1 2
PJP1
PAD-OPEN 4x4m
PJP1
PAD-OPEN 4x4m
1 2
PR17
4.7K_0805_5%~D
PR17
4.7K_0805_5%~D
12
PR19
1M_0402_5%~D
PR19
1M_0402_5%~D
12
PBATT1
SUYIN_200275MR009G50PZR
PBATT1
SUYIN_200275MR009G50PZR
11
33
44
55
66
88
99
22
77
GND 10
GND 11
PD11
VZ0603M260APT_0603
@
PD11
VZ0603M260APT_0603
@
1
2
PC3
2200P_0402_50V7K~D
PC3
2200P_0402_50V7K~D
12
PR15
0_0402_5%~D
PR15
0_0402_5%~D
1 2
PR14
10K_0402_5%~D@
PR14
10K_0402_5%~D@
1 2
JRTC1
MOLEX_53398-0371~D
JRTC1
MOLEX_53398-0371~D
1
1
2
2
3
3G1 4
G2 5
PC11
10U_1206_25V6M~D
PC11
10U_1206_25V6M~D
12
PR20
10K_0402_5%~D
PR20
10K_0402_5%~D
1 2
PC7
0.1U_0603_25V7K~D
PC7
0.1U_0603_25V7K~D
12
PR9
2.2K_0402_5%~D
PR9
2.2K_0402_5%~D
1 2
PQ4
FDS6679AZ_SO8~D
PQ4
FDS6679AZ_SO8~D
S
1
S
2
S
3
G
4
D8
D7
D6
D5
PD3
DA204U_SOT323~D
@
PD3
DA204U_SOT323~D
@
2
3
1
2
1
3
PQ1
FDN338P_NL_SOT23-3~D
2
1
3
PQ1
FDN338P_NL_SOT23-3~D
2
1 3
PR16
1M_0402_5%~D
PR16
1M_0402_5%~D
12
PL1
FBMA-L18-453215-900LMA90T_1812~D
PL1
FBMA-L18-453215-900LMA90T_1812~D
1 2
PR11
100K_0402_1%~D
PR11
100K_0402_1%~D
1 2
PC12
0.1U_0603_25V7K~D
@
PC12
0.1U_0603_25V7K~D
@
12
PL4
FBMJ4516HS720NT_1806~D
PL4
FBMJ4516HS720NT_1806~D
1 2
PR13
15K_0402_1%~D
PR13
15K_0402_1%~D
1 2
PL3
FBMJ4516HS720NT_1806~D
PL3
FBMJ4516HS720NT_1806~D
1 2
PC5
.47U_0402_6.3V6-K~D
@
PC5
.47U_0402_6.3V6-K~D
@
1 2
PC2
0.1U_0603_25V7K~D
PC2
0.1U_0603_25V7K~D
12
PD8
SM24_SOT23
@
PD8
SM24_SOT23
@
2
3
1
PD1
RB715F_SOT323~D
PD1
RB715F_SOT323~D
3
2
1
PR8
0_0402_5%~D
@PR8
0_0402_5%~D
@
1 2
PR18
4.7K_0805_5%~D
@PR18
4.7K_0805_5%~D
@
12
PR7
0_0402_5%~D
PR7
0_0402_5%~D
1 2
PR1
1K_0402_5%~D
PR1
1K_0402_5%~D
12
PJPDC1
MOLEX_87438-0743
PJPDC1
MOLEX_87438-0743
11
33
44
55
22
66
77
PR2
10K_0402_1%~D
PR2
10K_0402_1%~D
12
PC9
0.1U_0603_25V7K~D
PC9
0.1U_0603_25V7K~D
12
PD7
DA204U_SOT323~D
PD7
DA204U_SOT323~D
2
3
1
PD10
DA204U_SOT323~D
@
PD10
DA204U_SOT323~D
@
2
3
1
PD2
DA204U_SOT323~D
@
PD2
DA204U_SOT323~D
@
2
3
1
PC10
0.1U_0603_25V7K~D
PC10
0.1U_0603_25V7K~D
12
E
B
C
PQ3
MMST3904-7-F_SOT323~D
E
B
C
PQ3
MMST3904-7-F_SOT323~D
2
3 1
PD9
DA204U_SOT323~D
@
PD9
DA204U_SOT323~D
@
2
3
1
PC4
1500P_0402_7K~D
PC4
1500P_0402_7K~D
12
PD4
DA204U_SOT323~D
@
PD4
DA204U_SOT323~D
@
2
3
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3.3V_ALWP+5V_ALWP
+5V_ALW_BOOT
+3.3V_ALW_LGATE
+3.3V_ALW_UGATE
SECFB
+3.3V_ALW_PHASE
EN_3V_5VEN_3V_5V
POK2
POK2
+3.3V_ALW_BOOT
+5V_ALW_LGATE
LDOREFIN
+3.3V_OUT2
+15V_ALWP
POK1
+5V_ALWP
+5V_FB1
REFIN2
POK1
+5V_ALW_UGATE
+5V_ALW_PHASE
VIN
+3.3V_ALW2
EN_3V_5V
+5V_ALW2P
+3.3V_ALWP
+PWR_SRC
+5V_ALWP
+5V_VCC1
+3.3V_ALWP
+3.3V_ALWP
+15V_ALW
+5V_ALW
+5V_ALWP
+3.3V_ALW
+5V_ALW2
+5V_ALWP
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
+3.3V_ALWP
GNDA_3V5V
+5V_ALW2
+DC1_PWR_SRC
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
+3.3V_ALW2
5V_3V_REF
+3.3V_RTC_LDO
ALWON40
THERM_STP#23
ALW_PWRGD_3V_5V 40
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
DC/DC +3V/ +5V
45 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
DC/DC +3V/ +5V
45 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
DC/DC +3V/ +5V
45 69Thursday, January 21, 2010
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP/ +3.3V_RTC_LDO
(100mA,20mils ,Via NO.=1)
VOUT2=3.3V
L=3uF
Fsw=300KHz
D=0.173
Input Ripple Current=TDC*(D*(1-D))^0.5=3.23A
Output ripple current=(19-3.3)*0.173/3u/300K=3.04A
Output ripple Voltage=1.96*18=54.72mV
5 Volt +/-5%
Thermal Design Current:7.13A
Peak Current:10.19A
OCP_MIN:11.2A
3.3 Volt +/-5%
Thermal Design Current: 4.96A
Peak current: 7.09A
OCP_MIN:8.5 A
VOUT2=5V
L=3uF
Fsw=400KHz
D=0.256
Input Ripple Current=TDC*(D*(1-D))^0.5=3.11A
Output Ripple Current=(19-5)*0.263/3.3u/400K=2.82A
Output Ripple Voltage=3.1*18m=70.5mV
PQ7 pop-option
DSC 2@ SI4134DY
ASICS & ASICS2 1@ AON6428L
PQ9 pop-option
DSC 2@ FDMS7692
ASICS & ASICS2 1@ AON6706L
PR32
DSC 2@ 261K_ohm
ASICS 1@ 158K_ohm
AON6428L_1N_DFN8
PQ7
1@
AON6428L_1N_DFN8
PQ7
1@
158K_1%_0402
PR32
1@
158K_1%_0402
PR32
1@
PJP7
PAD-OPEN1x1m
PJP7
PAD-OPEN1x1m
12
PR37
1_0603_5%~D
PR37
1_0603_5%~D
1 2
PD13
BAT54SW-7-F_SOT323-3~D
PD13
BAT54SW-7-F_SOT323-3~D
2
3
1
PR24
10_0603_5%~D
@PR24
10_0603_5%~D
@
12
PR39
2.2_1206_1%~D
PR39
2.2_1206_1%~D
1 2
PR25
0_0402_5%~D
PR25
0_0402_5%~D
12
PJP4
PAD-OPEN1x1m
PJP4
PAD-OPEN1x1m
1 2
+
PC34
330U_D3L_6.3VM_R25~D
+
PC34
330U_D3L_6.3VM_R25~D
1
2
PR29
0_0402_5%~D
PR29
0_0402_5%~D
12
PQ10
SI4134DY-T1-GE3_SO8~D
PQ10
SI4134DY-T1-GE3_SO8~D
G
2
D3
S
1
PR33 0_0402_5%~DPR33 0_0402_5%~D
12
PC24
10U_1206_25V6M~D
@
PC24
10U_1206_25V6M~D
@
12
PR41
0_0402_5%~D
@
PR41
0_0402_5%~D
@
12
PD14
BAT54CW_SOT323~D
PD14
BAT54CW_SOT323~D
3
2
1
PR40
0_0402_5%~D
PR40
0_0402_5%~D
12
PC38
0.1U_0402_10V7K~D
@
PC38
0.1U_0402_10V7K~D
@
12
PR23
0_0805_5%~D
PR23
0_0805_5%~D
1 2
PD12
BAT54SW-7-F_SOT323-3~D
PD12
BAT54SW-7-F_SOT323-3~D
2
3
1
PR48
200K_0402_1%~D
PR48
200K_0402_1%~D
12
PC18
10U_1206_25V6M~D
PC18
10U_1206_25V6M~D
12
+
PC39
330U_D3L_6.3VM_R25~D
+
PC39
330U_D3L_6.3VM_R25~D
1
2
PR36
2.2_1206_1%~D
PR36
2.2_1206_1%~D
1 2
PL5
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
PL5
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
1 2
PR38
1_0603_5%~D
PR38
1_0603_5%~D
1 2
PC35
0.1U_0402_10V7K~D
@
PC35
0.1U_0402_10V7K~D
@
12
PC43
0.1U_0603_25V7K~D
PC43
0.1U_0603_25V7K~D
1 2
PC33
1000P_0603_50V7K~D
PC33
1000P_0603_50V7K~D
12
PR49
39K_0402_5%~D
PR49
39K_0402_5%~D
1 2
PC16
0.1U_0805_50V7M~D
PC16
0.1U_0805_50V7M~D
12
PJP8
PAD-OPEN 4x4m
PJP8
PAD-OPEN 4x4m
1 2
PC40
0.1U_0603_25V7K~D
PC40
0.1U_0603_25V7K~D
1 2
PC19
10U_1206_25V6M~D
PC19
10U_1206_25V6M~D
12
PR44
2K_0402_5%~D
PR44
2K_0402_5%~D
12
PC22
10U_1206_25V6M~D
PC22
10U_1206_25V6M~D
12
PC25
4.7U_0805_6.3V6K~D
PC25
4.7U_0805_6.3V6K~D
12
PJP6
PAD-OPEN 4x4m
PJP6
PAD-OPEN 4x4m
1 2
PC42
0.1U_0603_25V7K~D
PC42
0.1U_0603_25V7K~D
12
PQ7
SI4134DY-T1-GE3_SO8~D
2@ PQ7
SI4134DY-T1-GE3_SO8~D
2@
4
1
2
3 5
PC27
1U_0603_10V6K~D
PC27
1U_0603_10V6K~D
12
AON6706L_1N_DFN8
PQ9
1@
AON6706L_1N_DFN8
PQ9
1@
PJP9
PAD-OPEN 4x4m
PJP9
PAD-OPEN 4x4m
1 2
PR43
100K_0402_1%~D
@
PR43
100K_0402_1%~D
@
1 2
PC15
2200P_0402_50V7K~D
PC15
2200P_0402_50V7K~D
12
PC41
4.7U_0603_6.3V6K~D
PC41
4.7U_0603_6.3V6K~D
12
PC44
0.1U_0603_25V7K~D
PC44
0.1U_0603_25V7K~D
12
PR31
294K_0402_1%~D
PR31
294K_0402_1%~D
1 2
PC30
0.1U_0402_10V7K~D
@
PC30
0.1U_0402_10V7K~D
@
12
PJP2
PAD-OPEN 4x4m
PJP2
PAD-OPEN 4x4m
1 2
PR47
200K_0402_5%~D
PR47
200K_0402_5%~D
1 2
PC36
0.1U_0603_25V7K~D
PC36
0.1U_0603_25V7K~D
12
PC20
2200P_0402_50V7K~D
PC20
2200P_0402_50V7K~D
12
PR42
100K_0402_1%~D
PR42
100K_0402_1%~D
1 2
PR32
261K_0402_1%~D
2@ PR32
261K_0402_1%~D
2@
1 2
PC26
0.1U_0603_25V7K~D
PC26
0.1U_0603_25V7K~D
12
PR45
0_0402_5%~D
PR45
0_0402_5%~D
12
PC23
10U_1206_25V6M~D
PC23
10U_1206_25V6M~D
12
PC17
10U_1206_25V6M~D
@PC17
10U_1206_25V6M~D
@
12
PR26
0_0402_5%~D
@PR26
0_0402_5%~D
@
1 2
PC37
0.1U_0603_25V7K~D
PC37
0.1U_0603_25V7K~D
12
PL6
4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
PL6
4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
1 2
PJP3
PAD-OPEN1x1m
PJP3
PAD-OPEN1x1m
1 2
PU2
SN0608098_QFN32_5X5~D
PU2
SN0608098_QFN32_5X5~D
VREF2 1
TONSEL 2
V5FILT 3
EN_LDO 4
VREF3 5
VIN 6
LDO 7
LDOREFIN 8
VSW
9
VOUT1
10
VFB1
11
TRIP1
12
PGOOD1
13
EN1
14
DRVH1
15
LL1
16
VBST1
17
DRVL1
18
V5DRV
19
SECFB
20
GND
21
PGND
22
DRVL2
23
VBST2
24
LL2 25
DRVH2 26
EN2 27
PGOOD2 28
SKIPSEL 29
VOUT2 30
TRIP2 31
REFIN2 32
PAD
33
PR30
0_0402_5%~D
@PR30
0_0402_5%~D
@
1 2
PQ9
FDMS7692_NL_POWER56-8~D
2@ PQ9
FDMS7692_NL_POWER56-8~D
2@
G2
D3
S
1
PC21
0.1U_0805_50V7M~D
PC21
0.1U_0805_50V7M~D
12
PC29
0.1U_0603_25V7K~D
PC29
0.1U_0603_25V7K~D
1 2
PC32
1000P_0603_50V7K~D
PC32
1000P_0603_50V7K~D
12
PR35
0_0402_5%~D
PR35
0_0402_5%~D
12
PR28
0_0603_5%~D
@PR28
0_0603_5%~D
@
1 2
PC31
0.1U_0402_10V7K~D
@
PC31
0.1U_0402_10V7K~D
@
12
PR27
0_0402_5%~D
@PR27
0_0402_5%~D
@
1 2
PR46
0_0402_5%~D
PR46
0_0402_5%~D
12
PQ8
SI4800BDY-T1-E3_SO8~D
PQ8
SI4800BDY-T1-E3_SO8~D
S
3D6
D5
D7
D8
S
2
G
4
S
1
PC28
1U_0603_10V6K~D
PC28
1U_0603_10V6K~D
12
PJP5
PAD-OPEN 4x4m
PJP5
PAD-OPEN 4x4m
1 2
PR22
0_0805_5%~D
PR22
0_0805_5%~D
1 2
PR34
0_0402_5%~D
@
PR34
0_0402_5%~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GNDA_1.5V
+5V_ALW
+3.3V_ALW
GNDA_1.5V
GNDA_1.5V
+1.5V_SUS_P +1.5V_MEM
+1.5V_SUS_P
GNDA_1.5V
+PWR_SRC
GNDA_1.5V
1.5V_SUS_PWRGD40
DDR_ON40,47
Title
Size Document Number Rev
Date: Sheet of
LA-4151P
0.1
+1.5V_MEM
46 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-4151P
0.1
+1.5V_MEM
46 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-4151P
0.1
+1.5V_MEM
46 69Thursday, January 21, 2010
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
1.5 Volt +/-5%
Thermal Design Current: 11.6A
Peak current: 16.58A
OCP_MIN:18.23A
PR73
470K_0402_5%~D
PR73
470K_0402_5%~D
12
PJP11
PAD-OPEN 4x4m
PJP11
PAD-OPEN 4x4m
1 2
+
PC76
330U_D2E_2.5VM_R15~D
+
PC76
330U_D2E_2.5VM_R15~D
1
2
PC68
2200P_0402_50V7K~D
PC68
2200P_0402_50V7K~D
12
PR69
100K_0402_1%~D
PR69
100K_0402_1%~D
12
PL10
0.45UH_ETQP4LR45XFC_25A_-25+20%~D
PL10
0.45UH_ETQP4LR45XFC_25A_-25+20%~D
1 2
PC73
0.22U_0603_10V7K~D
PC73
0.22U_0603_10V7K~D
1 2
PC71
10U_1206_25V6M~D
PC71
10U_1206_25V6M~D
12
PC70
10U_1206_25V6M~D
PC70
10U_1206_25V6M~D
12
PL9
FBMJ4516HS720NT_1806~D
@PL9
FBMJ4516HS720NT_1806~D
@
1 2
PC69
0.1U_0805_50V7M~D
PC69
0.1U_0805_50V7M~D
12
PQ13
SIR468DP_MLP8~D
PQ13
SIR468DP_MLP8~D
3 5
2
4
1
PR72
0_0402_5%~D
PR72
0_0402_5%~D
1 2
PR75
19.6K_0402_1%~D
PR75
19.6K_0402_1%~D
1 2
PQ12
SIR468DP_MLP8~D
PQ12
SIR468DP_MLP8~D
3 5
2
4
1
PR74
2.2_1206_1%~D
@
PR74
2.2_1206_1%~D
@
12
PC72
10U_1206_25V6M~D
PC72
10U_1206_25V6M~D
12
PR71
39.2K_0402_1%~D
PR71
39.2K_0402_1%~D
1 2
+
PC77
330U_D2E_2.5VM_R15~D
+
PC77
330U_D2E_2.5VM_R15~D
1
2
PJP44
PAD-OPEN1x1m
PJP44
PAD-OPEN1x1m
1 2
PC79
10U_0805_6.3V6M~D
PC79
10U_0805_6.3V6M~D
1
2
PC74
1U_0603_6.3V6M~D
PC74
1U_0603_6.3V6M~D
1
2
PR76
22.6K_0402_1%~D
PR76
22.6K_0402_1%~D
12
PR70
0_0603_5%~D
PR70
0_0603_5%~D
1 2
PJP13
PAD-OPEN 4x4m
PJP13
PAD-OPEN 4x4m
1 2
PJP17
PAD-OPEN 4x4m
PJP17
PAD-OPEN 4x4m
1 2
PU5
TPS51218DSCR_SON10_3X3~D
PU5
TPS51218DSCR_SON10_3X3~D
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
RF
5
VFB
4
PGOOD
1
TP 11
PC78
0.1U_0402_10V7K~D
PC78
0.1U_0402_10V7K~D
12
PC75
1000P_0603_50V7K~D
@
PC75
1000P_0603_50V7K~D
@
12
PC80
10U_0805_6.3V6M~D
PC80
10U_0805_6.3V6M~D
1
2
PQ11
SI4162_SO8~D
PQ11
SI4162_SO8~D
S
3D6
D5
D7
D8
S
2
G
4
S
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DC_1+0.75V_VTT_PWR_SRC
+1.8V_PWR_SRC
+0.75V_DDR_VTT
+0.75V_P
+0.75V_P
+5V_ALW
+1.5V_MEM
+V_DDR_REF
+1.8V_RUNP
+1.8V_RUN+1.8V_RUNP
GNDA_1.8V
GNDA_1.8V
GNDA_1.8V
GNDA_1.8V
+3.3V_RUN
+3.3V_ALW
GNDA_1.8V
0.75V_DDR_VTT_ON39
DDR_ON40,46
RUN_ON12,34,39,42,62
1.8V_RUN_PWRGD39
0.75V_VR_EN42
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
+0.75V_DDR_VT/+1.8V_RUN
47 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
+0.75V_DDR_VT/+1.8V_RUN
47 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
+0.75V_DDR_VT/+1.8V_RUN
47 69Thursday, January 21, 2010
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+0.75V_DDR_VTT
DDR3 Termination
0.75Volt +/-5%
Thermal Design Current: 0.7A
Peak current: 1A
1.8 Volt +/-5%
Thermal Design Current: 0.951 A
Peak current: 1.359 A
OCP_MIN: 4.5A
+1.8V_RUNP
VOUT=1.8V
L=3.3uF
Fsw=290KHz
D=0.092
Input Ripple Current=TDC*(D*(1-D))^0.5=0.884A
Output Ripple Current=1.707A
Output Ripple Voltage=1.707*15m=20.5mV
PL11 pop option
DSC (2@) use 2uH
ASICS & ASICS2 (1@) use 1.1uH
PR380
0_0603_5%~D
PR380
0_0603_5%~D
12
PC90
10U_0805_6.3V6M~D
PC90
10U_0805_6.3V6M~D
1 2
PR379
0_0402_5%~D
@
PR379
0_0402_5%~D
@
12
PR83 0_0402_5%~DPR83 0_0402_5%~D
1 2
PR79
124K_0402_1%~D
PR79
124K_0402_1%~D
12
PC84
680P_0603_50V8J~D
@
PC84
680P_0603_50V8J~D
@
12
PR78
10K_0402_5%~D
PR78
10K_0402_5%~D
1 2
PU6
ISL8014IRZ-T_QFN16_4X4~D
PU6
ISL8014IRZ-T_QFN16_4X4~D
VDD 3
SYNCH 4
NC 13
PGND
12 VIN 1
VIN 2
NC 16
LX 15
LX 14
PGND
11
SGND
10
VFB
8
EN
5
NC
6
PG
7
SGND
9
TPAD 17
PC85
10U_0805_6.3V6M~D
PC85
10U_0805_6.3V6M~D
1 2
1.1UH_#A915AY-H-1R1M=P3_4.07A_20%
PL11
1@
1.1UH_#A915AY-H-1R1M=P3_4.07A_20%
PL11
1@
PJP19
PAD-OPEN1x1m
@PJP19
PAD-OPEN1x1m
@
1 2
PU7
TPS51100DGQRG4_MSOP10~D
PU7
TPS51100DGQRG4_MSOP10~D
GND 8
VTTREF 6
S3
7
VTTSNS 5
VDDQSNS
1
VLDOIN
2
VTT 3
PGND 4
S5
9
VIN
10
BP 11
PL11
2UH_#A915AY-H-2R0M=P3_3.3A_20%
2@ PL11
2UH_#A915AY-H-2R0M=P3_3.3A_20%
2@
12
PR81
100K_0402_1%~D
PR81
100K_0402_1%~D
12
PC89
0.1U_0603_25V7K~D
PC89
0.1U_0603_25V7K~D
1 2
PJP21
PAD-OPEN 2x2m~D
PJP21
PAD-OPEN 2x2m~D
2 1
PC91
10U_0805_6.3V6M~D
PC91
10U_0805_6.3V6M~D
1 2
PC81
10U_0805_6.3V6M~D
PC81
10U_0805_6.3V6M~D
1 2
PC82
10U_0805_6.3V6M~D
PC82
10U_0805_6.3V6M~D
1 2
PC92
10U_0805_6.3V6M~D
PC92
10U_0805_6.3V6M~D
1 2
PR77
24k_0402_1%~D
PR77
24k_0402_1%~D
1 2
PC317 100P_0402_50V8J~D
@
PC317 100P_0402_50V8J~D
@
12
PC86
10U_0805_6.3V6M~D
PC86
10U_0805_6.3V6M~D
1 2
PC83
0.1U_0603_25V7K~D
PC83
0.1U_0603_25V7K~D
12
PJP18
PAD-OPEN 4x4m
PJP18
PAD-OPEN 4x4m
1 2
PC93
0.1U_0603_25V7K~D
PC93
0.1U_0603_25V7K~D
12
PR428
0_0402_5%~D
PR428
0_0402_5%~D
12
PR80
4.7_0805_5%~D
@
PR80
4.7_0805_5%~D
@
12
PC324
150P_0402_50V8F~D
PC324
150P_0402_50V8F~D
12
PR82 0_0402_5%~D@PR82 0_0402_5%~D@
1 2
PC88
4.7U_0805_10V4Z~D
PC88
4.7U_0805_10V4Z~D
12
PC87
47P_0402_50V8J~D
PC87
47P_0402_50V8J~D
12
PR381
0_0402_5%~D
PR381
0_0402_5%~D
12
PJP22
PAD-OPEN 2x2m~D
PJP22
PAD-OPEN 2x2m~D
2 1
PJP20
PAD-OPEN 4x4m
@PJP20
PAD-OPEN 4x4m
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_VX
1.05V_M_PWRGD
1.05V_VM_EN
TPS_1.05_IMON
1.05V_VM_EN
+1.05V_VM_P
+3.3V_ALW
+1.05V_M
+5V_ALW
+1.05V_VM_P
GNDA_1.05VM
GNDA_1.05VM
GNDA_1.05VM
+3.3V_ALW
GNDA_1.05VM
M_ON40,42
SIO_SLP_M#17,39
1.05V_M_PWRGD 40
Title
Size Document Number Rev
Date: Sheet of
LA-4151P
0.1
+1.05VM
48 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-4151P
0.1
+1.05VM
48 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-4151P
0.1
+1.05VM
48 69Thursday, January 21, 2010
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1.05 Volt +/-5%
Thermal Design Current: 7.6A
Peack current: 10.9A
OCP_MIN: 11.9A
+1.05V_M_P
PR89
7.68K_0805_1%~D
@PR89
7.68K_0805_1%~D
@
1 2
PC104
0.1U_0603_25V7K~D
@
PC104
0.1U_0603_25V7K~D
@
12
PC98
0.1U_0603_25V7K~D
PC98
0.1U_0603_25V7K~D
12
PC113
0.1U_0603_25V7K~D
PC113
0.1U_0603_25V7K~D
12
PR92
1.33K_0402_1%~D
@PR92
1.33K_0402_1%~D
@
12
PJP25
PAD-OPEN 4x4m
PJP25
PAD-OPEN 4x4m
1 2
PC109
22U_1206_6.3V6M~D
PC109
22U_1206_6.3V6M~D
12
PR88
2K_0402_5%~D
PR88
2K_0402_5%~D
1 2
PC103
1200P_0402_50V7K~D
PC103
1200P_0402_50V7K~D
1 2
PC95
0.1U_0603_25V7K~D
PC95
0.1U_0603_25V7K~D
12
PC96
1U_0402_6.3V6K~D
PC96
1U_0402_6.3V6K~D
12
PC100
680P_0402_50V7K~D
PC100
680P_0402_50V7K~D
12
PJP26
PAD-OPEN 4x4m
@PJP26
PAD-OPEN 4x4m
@
1 2
PC102
2200P_0402_50V7K~D
PC102
2200P_0402_50V7K~D
12
PC94
10U_1206_25V6M~D
PC94
10U_1206_25V6M~D
12
PC97
10U_1206_25V6M~D
PC97
10U_1206_25V6M~D
12
PR93
0_0402_5%~D
PR93
0_0402_5%~D
1 2
PR85
22.1K_0402_1%~D
@PR85
22.1K_0402_1%~D
@
1 2
PC111
22U_1206_6.3V6M~D
PC111
22U_1206_6.3V6M~D
12
PC112
22U_1206_6.3V6M~D
PC112
22U_1206_6.3V6M~D
12
PR378
3.3_0603_1%~D
PR378
3.3_0603_1%~D
1 2
PR90
2.61K_0402_1%~D
PR90
2.61K_0402_1%~D
12
PC99
0.22U_0603_10V7K~D
PC99
0.22U_0603_10V7K~D
1 2
PR94
0_0402_5%~D
@PR94
0_0402_5%~D
@
1 2
PR86
22.1K_0402_1%~D
PR86
22.1K_0402_1%~D
1 2
PC114
0.1U_0603_25V7K~D
PC114
0.1U_0603_25V7K~D
12
PR410 0_0402_5%~D@PR410 0_0402_5%~D@
12
PR84
5.6K_0402_5%~D
PR84
5.6K_0402_5%~D
12
PC101
100P_0402_50V8J~D
PC101
100P_0402_50V8J~D
12
PC108
22U_1206_6.3V6M~D
PC108
22U_1206_6.3V6M~D
12
PU8
SN0905030RUW_QFN17_3P5X3P5~D
PU8
SN0905030RUW_QFN17_3P5X3P5~D
SS
6
VCCA
1
GND
2
PGND
9
SW
8
VIN 17
VBST 15
FSET 12
MODE 11
VIN 16
IMON 10
PGND
7
COMP
3
VFB
4
VOUT
5
PGOOD 14
EN 13
PC105
10U_1206_25V6M~D
@
PC105
10U_1206_25V6M~D
@
12
PJP50
PAD-OPEN1x1m
@PJP50
PAD-OPEN1x1m
@
1 2
PR87
0_0402_5%~D
PR87
0_0402_5%~D
1 2
PC107
22U_1206_6.3V6M~D
PC107
22U_1206_6.3V6M~D
12
PL13
0.42UH_MPC0740LR42C_20A_25%~D
PL13
0.42UH_MPC0740LR42C_20A_25%~D
12
PC110
22U_1206_6.3V6M~D
PC110
22U_1206_6.3V6M~D
12
PJP24
PAD-OPEN 4x4m
PJP24
PAD-OPEN 4x4m
1 2
PC106
10U_1206_25V6M~D
@
PC106
10U_1206_25V6M~D
@
12
PR91
100K_0402_1%~D
PR91
100K_0402_1%~D
12
PL12
FBMJ4516HS720NT_1806~D
@PL12
FBMJ4516HS720NT_1806~D
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
UG_VTT1
LG_VTT1
PHASE_VTT1
VTT_B+
UG_VTT2
PHASE_VTT2
+VTTP
LG_VTT2
VTT_FB2
VTT_FB2
VTT_B+
GNDA_VTT
+5V_ALW
GNDA_VTT
+PWR_SRC
+VTTP
+VTTP +1.05V_1.1V_RUN_VTT
GNDA_VTT
GNDA_VTT
+5V_ALW
GNDA_VTT
+5V_ALW
+5V_ALW
GNDA_VTT
GNDA_VTT
GNDA_VTT
GNDA_VTT
+5V_ALW
GNDA_VTT
+5V_ALW
CPU_VTT_ON39
H_VTTPWRGD8
VTT_SENSE
11
CPU_VTT_SELECT11
VTT_SENSE
11
Title
Size Document Number Rev
Date: Sheet of
LA-5772P 1A
<Title>
C
49 69Thursday, January 21, 2010
Title
Size Document Number Rev
Date: Sheet of
LA-5772P 1A
<Title>
C
49 69Thursday, January 21, 2010
Title
Size Document Number Rev
Date: Sheet of
LA-5772P 1A
<Title>
C
49 69Thursday, January 21, 2010
1.1 Volt +/-5%
Thermal Design Current: 12.641A
Peack current: 18.059A
OCP_MIN: 21.67A
1.05 Volt +/-5%
Thermal Design Current: 18.72A
Peack current: 26.75A
OCP_MIN: 32.096A
PR110 PR120
Margaux UMA and SG 3.01K
Margaux DSC and ASICS 1.58K
PR113 PR122
Margaux UMA and SG 4.99K
Margaux DSC and ASICS 6.98K
PR114
0_0402_5%
PR114
0_0402_5%
1 2
PL15
FBMJ4516HS720NT_1806~D
@PL15
FBMJ4516HS720NT_1806~D
@
12
PR434
10_0402_1%~D
PR434
10_0402_1%~D
1 2
PJP35
PAD-OPEN 43X118
@PJP35
PAD-OPEN 43X118
@
1 2
PC138
0.22U_0603_10V7K~D
PC138
0.22U_0603_10V7K~D
1 2
PR126
0_0402_5%
PR126
0_0402_5%
1 2
PQ17
SI4172DY-T1-GE3_SO8~D
PQ17
SI4172DY-T1-GE3_SO8~D
3 5
2
4
1
PC133
1000P_0402_50V7K~D
PC133
1000P_0402_50V7K~D
1 2
PR103
0_0402_5%
PR103
0_0402_5%
1 2
PC123
1U_0603_6.3V6M~D
PC123
1U_0603_6.3V6M~D
1
2
PR101
10_0603_5%
PR101
10_0603_5%
1 2
PC146
820P_0402_50V7K~D
PC146
820P_0402_50V7K~D
12
PR105
200K_0402_1%~D
PR105
200K_0402_1%~D
12
PC125
10U_1206_25VAK
@
PC125
10U_1206_25VAK
@
1 2
PR395
0_0402_5%~D
PR395
0_0402_5%~D
1 2
PR116 2.2_0603_1%~DPR116 2.2_0603_1%~D
12
PR396
100K_0402_5%~D
PR396
100K_0402_5%~D
12
PC142
10U_1206_25VAK
@
PC142
10U_1206_25VAK
@
1 2
PJP31
PAD-OPEN1x1m
PJP31
PAD-OPEN1x1m
12
PR106
200K_0402_1%~D
PR106
200K_0402_1%~D
12
PR107
2.2_0603_1%~D
PR107
2.2_0603_1%~D
12
PR108
0_0402_5%
@PR108
0_0402_5%
@
1 2
PC131
820P_0402_50V7K~D
PC131
820P_0402_50V7K~D
12
PR386
10_0402_1%~D
PR386
10_0402_1%~D
1 2
PR124
9.31K_0402_1%~D
PR124
9.31K_0402_1%~D
12
PQ16
BSC884N03MS_POWER56-8~D
PQ16
BSC884N03MS_POWER56-8~D
3 5
2
4
1
E
B
C
PQ73
MMST3904-7-F_SOT323-3~D
E
B
C
PQ73
MMST3904-7-F_SOT323-3~D
2
3 1
PC140
0.1U_0603_25V7K~D
PC140
0.1U_0603_25V7K~D
12
PR113
6.98K_0402_1%~D
PR113
6.98K_0402_1%~D
1 2
+
PC135
220U_SX_2VY_R9M~D
+
PC135
220U_SX_2VY_R9M~D
1
2
PC139
0.1U_0603_25V7K~D
PC139
0.1U_0603_25V7K~D
12
PC145
1000P_0402_50V7K~D
PC145
1000P_0402_50V7K~D
1 2
PR109
0_0402_5%
PR109
0_0402_5%
1 2
PC122
2.2U_0603_10V6K~D
PC122
2.2U_0603_10V6K~D
12
PC137
2200P_0402_50V7K~D
PC137
2200P_0402_50V7K~D
12
PJP30
PAD-OPEN 4x4m
@PJP30
PAD-OPEN 4x4m
@
1 2
PR110
1.58K_0402_1%
PR110
1.58K_0402_1%
12
PR385
0_0402_5%~D
PR385
0_0402_5%~D
12
PR120
1.58K_0402_1%
PR120
1.58K_0402_1%
12
PR127
0_0402_5%
@PR127
0_0402_5%
@
12
PR115
10_0402_1%~D
PR115
10_0402_1%~D
1 2
PC129
0.22U_0603_10V7K~D
PC129
0.22U_0603_10V7K~D
1 2
PR123
0_0402_5%
PR123
0_0402_5%
1 2
PJP34
PAD-OPEN 43X118
@PJP34
PAD-OPEN 43X118
@
1 2
PQ18
BSC884N03MS_POWER56-8~D
PQ18
BSC884N03MS_POWER56-8~D
3 5
2
4
1
PC128
0.1U_0603_25V7K~D
PC128
0.1U_0603_25V7K~D
12
PJP33
PAD-OPEN 43X118
@PJP33
PAD-OPEN 43X118
@
1 2
PR104
0_0402_5%
@PR104
0_0402_5%
@
1 2
PR121
4.7_0805_1%
PR121
4.7_0805_1%
1 2
PR128
2.74K_0402_1%~D
PR128
2.74K_0402_1%~D
12
PC141
10U_1206_25VAK
PC141
10U_1206_25VAK
1 2
PR111
0_0402_5%
@PR111
0_0402_5%
@
1 2
PR398
100K_0402_5%~D
PR398
100K_0402_5%~D
12
PR118
464K_0402_1%
PR118
464K_0402_1%
12
PR117
40.2K_0402_1%~D
PR117
40.2K_0402_1%~D
12
PU10
MAX17007AGTI+_TQFN28_4X4~D
PU10
MAX17007AGTI+_TQFN28_4X4~D
REF
1
ILIM1
2
ILIM2
3
VCC 4
SKIP
5
TON1 6
TON2 7
REFIN1
8
CSL1 9
CSH1 10
EN1
11
PGOOD1
12
DH1 13
LX1 14
BST1 15
GND
16
DL1 17
VDD 18
DL2 19
PGND 20
BST2 21
LX2 22
DH2 23
PGOOD2
24
EN2
25
CSH2 26
CSL2 27
FB2 28
GND_T
29
PJP32
PAD-OPEN 43X118
@PJP32
PAD-OPEN 43X118
@
1 2
PR119
49.9K_0402_1%~D
PR119
49.9K_0402_1%~D
12
+
PC134
220U_SX_2VY_R9M~D
+
PC134
220U_SX_2VY_R9M~D
1
2
PC132
0.22U_0402_6.3V6K
PC132
0.22U_0402_6.3V6K
1 2
PC143
10U_1206_25VAK
PC143
10U_1206_25VAK
1 2
PR125
0_0402_5%
@PR125
0_0402_5%
@
12
PQ74B
DMN66D0LDW-7_SOT363-6~D
PQ74B
DMN66D0LDW-7_SOT363-6~D
34
5
PR397
100K_0402_5%~D
PR397
100K_0402_5%~D
12
PC127
0.1U_0603_25V7K~D
PC127
0.1U_0603_25V7K~D
12
PR433
0_0402_5%~D
PR433
0_0402_5%~D
12
PC144
0.22U_0402_6.3V6K
PC144
0.22U_0402_6.3V6K
1 2
PL16
0.56UH_MPC1040LR56C_23A_+-20%~D
PL16
0.56UH_MPC1040LR56C_23A_+-20%~D
1
3
4
2
PC126
10U_1206_25VAK
PC126
10U_1206_25VAK
1 2
PR122
6.98K_0402_1%~D
PR122
6.98K_0402_1%~D
1 2
PL17
0.56UH_MPC1040LR56C_23A_+-20%~D
PL17
0.56UH_MPC1040LR56C_23A_+-20%~D
1
3
4
2
PR112
4.7_0805_1%
PR112
4.7_0805_1%
1 2
PC124
10U_1206_25VAK
PC124
10U_1206_25VAK
1 2
PC130
220P_0402_50V8J~D
PC130
220P_0402_50V8J~D
12
PR129
10_0402_1%~D
PR129
10_0402_1%~D
1 2
PR399
10K_0402_5%~D
PR399
10K_0402_5%~D
1 2
PQ74A
DMN66D0LDW-7_SOT363-6~D
PQ74A
DMN66D0LDW-7_SOT363-6~D
61
2
PQ15
SI4172DY-T1-GE3_SO8~D
PQ15
SI4172DY-T1-GE3_SO8~D
3 5
2
4
1
+
PC136
220U_SX_2VY_R9M~D
+
PC136
220U_SX_2VY_R9M~D
1
2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
V2N
BOOT2 BOOT2_2
UGATE2
BOOT1_1
V1N
VR_TT#
CLK_EN#
BOOT1
VSUM+
VSUM-
VCCS
PHASE1
PHASE2
ISEN2
ISEN1
BOOT3 BOOT3_3
PHASE3
UGATE3
LGATE3
V3N
ISEN3
VSUM-
VSUM-
VSUM-
ISEN1
VSUM+
ISEN3
VSUM+
VSUM+
LGATE1
LGATE2
ISEN2
ISEN1
ISEN3
ISEN1
ISEN2
ISEN3
ISEN2
UGATE1
VSSS
VSUM-
+VCC_CORE
+CPU_PWR_SRC
+PWR_SRC
+CPU_PWR_SRC
+VCC_CORE
+5V_ALW
+3.3V_RUN
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
+5V_ALW
+CPU_PWR_SRC
GNDA_VCORE
+CPU_PWR_SRC
+VCC_CORE
+5V_ALW
+1.05V_1.1V_RUN_VTT
+1.05V_1.1V_RUN_VTT
+1.05V_1.1V_RUN_VTT
+1.05V_1.1V_RUN_VTT
+5V_ALW
GNDA_VCORE
GNDA_VCORE
VID011
VID111
VID211
VID311
VID411
VID511
VID611
IMVP_VR_ON39
H_DPRSLPVR11
IMVP_PWRGD8,39
H_PSI#11
VCCSENSE11
VSSSENSE11
IMVP_IMON 11,23
VSSSENSE 11
CLK_EN#6
H_PROCHOT#8
VCORE_LL_SELECT39
VCORE_LL_SELECT39
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
+VCORE
50 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
+VCORE
50 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
+VCORE
50 69Thursday, January 21, 2010
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Iccmax= 48A
I_TDC=33.6A
OCP=57.6 A, Intel spec=TDB
OCP calculation: Assume DCR=0.88mOhm
G1=Rn/(Rn+Rsum/3),
where Rn=PR137//(PR134+PH2); Rsum=PR105,PR218,PR142
DROOP=2*(DCR/3)*G1*Rdroop/Ri=1.91mOhm
where Rdroop=PR126;Ri=PR140
Iocp=60u*Rdroop/DROOP=~75A.
UMA&SG 1H/1L
DSC 1H/2L
ASICS 2H/2L
Catch resistors R1116 R1236
PR144 1K_0402_1%~D
@
PR144 1K_0402_1%~D
@
12
PC172
1U_0603_10V6K~D
PC172
1U_0603_10V6K~D
12
PR140 1K_0402_1%~D
PR140 1K_0402_1%~D
1 2
PQ72
SIR472DP-T1-E3_SO8~D
@PQ72
SIR472DP-T1-E3_SO8~D
@
3 5
2
4
1
PR135 1K_0402_1%~D
PR135 1K_0402_1%~D
12
PR171
562_0402_1%~D
PR171
562_0402_1%~D
1 2
PR172
3.65K_0603_1%~D
PR172
3.65K_0603_1%~D
1 2
PR192
0_0402_5%~D
@PR192
0_0402_5%~D
@
12
PC173
0.22U_0603_25V7K~D
PC173
0.22U_0603_25V7K~D
12
PR164 0_0402_5%~D
PR164 0_0402_5%~D
1 2
PR197
11K_0402_1%~D
PR197
11K_0402_1%~D
12
PQ70
SIR472DP-T1-E3_SO8~D
@PQ70
SIR472DP-T1-E3_SO8~D
@
3 5
2
4
1
PR168
0_0402_5%~D
@PR168
0_0402_5%~D
@
12
PR174
0_0402_5%~D
@PR174
0_0402_5%~D
@
12
PQ71
SIR472DP-T1-E3_SO8~D
@PQ71
SIR472DP-T1-E3_SO8~D
@
3 5
2
4
1
PC178
2200P_0402_50V7K~D
PC178
2200P_0402_50V7K~D
12
PR130 1K_0402_1%~D
@
PR130 1K_0402_1%~D
@
12
PL18
0.36UH_ ETQP4LR36AFC_28A_20%~D
PL18
0.36UH_ ETQP4LR36AFC_28A_20%~D
1
3
4
2
PR139 1K_0402_1%~D
@
PR139 1K_0402_1%~D
@
12
PR199
1_0402_5%~D
PR199
1_0402_5%~D
1 2
PQ21
SI7658ADP_MLP8~D
PQ21
SI7658ADP_MLP8~D
3 5
2
4
1
PH2
10K_0402_1%_ERTJ0EG103FA~D
PH2
10K_0402_1%_ERTJ0EG103FA~D
12
PC154
0.22U_0603_10V7K~D
PC154
0.22U_0603_10V7K~D
1 2
PC186
330P_0402_50V7K~D
PC186
330P_0402_50V7K~D
12
PC187
0.01U_0402_25V7K~D
PC187
0.01U_0402_25V7K~D
12
PC175
0.22U_0402_10V6K~D
PC175
0.22U_0402_10V6K~D
12
PR137 1K_0402_1%~D
@
PR137 1K_0402_1%~D
@
12
PR176 0_0402_5%~D
PR176 0_0402_5%~D
1 2
G
D
S
PQ69
RHU002N06_SOT323-3~D
G
D
S
PQ69
RHU002N06_SOT323-3~D
2
1 3
PC177
0.1U_0603_25V7K~D
PC177
0.1U_0603_25V7K~D
12
PR154
3.65K_0603_1%~D
PR154
3.65K_0603_1%~D
1 2
PQ19
SIR472DP-T1-E3_SO8~D
PQ19
SIR472DP-T1-E3_SO8~D
3 5
2
4
1
PR170
8.06K_0402_1%~D
PR170
8.06K_0402_1%~D
12
PR148 1K_0402_1%~D@PR148 1K_0402_1%~D@
1 2
PC166
1000P_0402_50V7K~D
PC166
1000P_0402_50V7K~D
12
PU11
ISL62883HRZ-T_QFN40_5X5~D
PU11
ISL62883HRZ-T_QFN40_5X5~D
PGOOD
1
PSI#
2
RBIAS
3
VR_TT#
4
NTC
5
VW
6
COMP
7
FB
8
VIN
17
ISEN1
11
VSEN
12
RTN
13
ISUM-
14
ISUM+
15
VDD
16
VSSP1 22
LGATE1 23
PWM3 24
VCCP 25
LGATE2 26
VSSP2 27
PHASE2 28
UGATE2 29
VID0 31
VID1 32
VID2 33
VID3 34
VID5 36
VID6 37
VR_ON 38
ISEN3
9
ISEN2
10
IMON
18
BOOT1
19
UGATE1
20
AGND
41
PHASE1 21
BOOT2 30
DPRSLPVR 39
CLK_EN# 40
VID4 35
PR143 1K_0402_1%~D
PR143 1K_0402_1%~D
12
PC156
1U_0603_10V6K~D
PC156
1U_0603_10V6K~D
1 2
PR167
51K_0402_1%~D
PR167
51K_0402_1%~D
1 2
PR195
619_0402_1%~D
PR195
619_0402_1%~D
1 2
PR165
4.02K_0402_1%~D
@PR165
4.02K_0402_1%~D
@
1 2
PR182 0_0402_5%~D
PR182 0_0402_5%~D
1 2
PC189
330P_0402_50V7K~D
PC189
330P_0402_50V7K~D
12
PC147
0.1U_0603_25V7K~D
PC147
0.1U_0603_25V7K~D
12
PC328
2200P_0402_50V7K~D
PC328
2200P_0402_50V7K~D
12
PC160
10U_1206_25VAK~D
PC160
10U_1206_25VAK~D
12
PC174
0.22U_0402_10V6K~D
PC174
0.22U_0402_10V6K~D
12
PC167
1U_0603_10V6K~D
PC167
1U_0603_10V6K~D
12
PC180
10U_1206_25VAK~D
PC180
10U_1206_25VAK~D
12
PR132 1K_0402_1%~DPR132 1K_0402_1%~D
12
PQ26
SI7658ADP_MLP8~D
PQ26
SI7658ADP_MLP8~D
3 5
2
4
1
PR161 1K_0402_1%~D
PR161 1K_0402_1%~D
1 2
PC155
680P_0603_50V8J~D
PC155
680P_0603_50V8J~D
12
PC150
10U_1206_25VAK~D
PC150
10U_1206_25VAK~D
12
PR149
51K_0402_1%~D
PR149
51K_0402_1%~D
1 2
PC184
0.47U_0603_16V7K~D
PC184
0.47U_0603_16V7K~D
12
PQ25
SIR472DP-T1-E3_SO8~D
PQ25
SIR472DP-T1-E3_SO8~D
3 5
2
4
1
PR183 0_0402_5%~D
PR183 0_0402_5%~D
1 2
PR133 1K_0402_1%~D
@
PR133 1K_0402_1%~D
@
12
PR145 1K_0402_1%~D
@
PR145 1K_0402_1%~D
@
12
PQ24
SI7658ADP_MLP8~D
PQ24
SI7658ADP_MLP8~D
3 5
2
4
1
PR166
0_0402_5%~D
@PR166
0_0402_5%~D
@
1 2
PR201
100_0402_5%~D
PR201
100_0402_5%~D
1 2
PL20
0.36UH_ ETQP4LR36AFC_28A_20%~D
PL20
0.36UH_ ETQP4LR36AFC_28A_20%~D
1
3
4
2
PR205
0_0402_5%~D
PR205
0_0402_5%~D
12
PC161
0.22U_0603_10V7K~D
PC161
0.22U_0603_10V7K~D
1 2
PR153
2.2_1206_1%~D
PR153
2.2_1206_1%~D
12
PR156
0_0402_5%~D
PR156
0_0402_5%~D
1 2
PL19
0.36UH_ ETQP4LR36AFC_28A_20%~D
PL19
0.36UH_ ETQP4LR36AFC_28A_20%~D
1
3
4
2
PC188
1000P_0402_50V7K~D
PC188
1000P_0402_50V7K~D
12
PC169
33P_0402_50V8J~D
PC169
33P_0402_50V8J~D
1 2
PC179
10U_1206_25VAK~D
PC179
10U_1206_25VAK~D
12
PR158
1K_0402_5%~D
@PR158
1K_0402_5%~D
@
1 2
PQ23
SI7658ADP_MLP8~D
PQ23
SI7658ADP_MLP8~D
3 5
2
4
1
PC159
10U_1206_25VAK~D
PC159
10U_1206_25VAK~D
12
PR181 1_0402_5%~D
PR181 1_0402_5%~D
1 2
PR203 27.4_0402_1%~D@PR203 27.4_0402_1%~D@
1 2
PC171
0.068U_0402_10V7K~D
PC171
0.068U_0402_10V7K~D
12
PR162 68_0402_5%~DPR162 68_0402_5%~D
1 2
PR204 27.4_0402_1%~D@PR204 27.4_0402_1%~D@
1 2
PR138 1K_0402_1%~D
@
PR138 1K_0402_1%~D
@
12
PR142
0_0603_5%~D
PR142
0_0603_5%~D
12
PC191
.1U_0402_16V7K~D
PC191
.1U_0402_16V7K~D
12
PR184
6.81K_0402_1%~D
PR184
6.81K_0402_1%~D
12
PR147 100_0402_5%~DPR147 100_0402_5%~D
1 2
PC182
680P_0603_50V8J~D
PC182
680P_0603_50V8J~D
12
PR432
34.8K_0402_1%~D
@
PR432
34.8K_0402_1%~D
@
1 2
PR131 1K_0402_1%~D
PR131 1K_0402_1%~D
12
PR188 0_0402_5%~D
PR188 0_0402_5%~D
1 2
PQ27
SI7658ADP_MLP8~D
PQ27
SI7658ADP_MLP8~D
3 5
2
4
1
PC176
0.22U_0402_10V6K~D
PC176
0.22U_0402_10V6K~D
12
PC185
0.047U_0603_25V7M~D
@PC185
0.047U_0603_25V7M~D
@
12
PR196
0_0402_5%~D
PR196
0_0402_5%~D
12
PC162
1U_0603_10V6K~D
PC162
1U_0603_10V6K~D
12
PR152
1.91K_0402_1%~D
PR152
1.91K_0402_1%~D
12
PR175
2.43K_0402_1%~D
PR175
2.43K_0402_1%~D
1 2
PJP38
PAD-OPEN1x1m
PJP38
PAD-OPEN1x1m
1 2
PR160
147K_0402_1%~D
PR160
147K_0402_1%~D
1 2
PR193
3.65K_0603_1%~D
PR193
3.65K_0603_1%~D
1 2
PC163 56P_0402_50VNPO~D@PC163 56P_0402_50VNPO~D@
1 2
PR191
2.2_1206_1%~D
PR191
2.2_1206_1%~D
12
PR388
5.1K_0402_1%~D
PR388
5.1K_0402_1%~D
1 2
PR150
0_0402_5%~D
@PR150
0_0402_5%~D
@
12
PC190
1200P_0402_50V7K~D
PC190
1200P_0402_50V7K~D
1 2
PR134 1K_0402_1%~D
PR134 1K_0402_1%~D
12
PR146 1K_0402_1%~D
PR146 1K_0402_1%~D
12
PC165
680P_0603_50V8J~D
PC165
680P_0603_50V8J~D
12
PR190
51K_0402_1%~D
PR190
51K_0402_1%~D
12
PJP37
PAD-OPEN 4x4m
PJP37
PAD-OPEN 4x4m
1 2
PR189
2.61K_0402_1%~D
PR189
2.61K_0402_1%~D
12
PR178
324K_0402_1%~D
PR178
324K_0402_1%~D
1 2
+
PC151
100U_25V_M~D
+
PC151
100U_25V_M~D
1
2
+
PC153
100U_25V_M~D
+
PC153
100U_25V_M~D
1
2
PR179
1_0402_5%~D
PR179
1_0402_5%~D
1 2
PQ22
SIR472DP-T1-E3_SO8~D
PQ22
SIR472DP-T1-E3_SO8~D
3 5
2
4
1
PC170
150P_0402_50V8J~D
PC170
150P_0402_50V8J~D
1 2
PR387
15K_0402_1%~D
PR387
15K_0402_1%~D
1 2
PR155
0_0402_5%~D
@PR155
0_0402_5%~D
@
12
PC168
390PF_0402_50V7K~D
PC168
390PF_0402_50V7K~D
1 2
PR198 0_0402_5%~DPR198 0_0402_5%~D
1 2
PC183
0.022U_0402_50V7~D
PC183
0.022U_0402_50V7~D
12
PR194
0_0402_5%~D
@PR194
0_0402_5%~D
@
12
G
D
S
PQ75
RHU002N06_SOT323-3~D
@
G
D
S
PQ75
RHU002N06_SOT323-3~D
@
2
13
PH1
470K_0402_5%_ERTJ0EV474J~D
@PH1
470K_0402_5%_ERTJ0EV474J~D
@
12
PR159 0_0402_5%~D
PR159 0_0402_5%~D
1 2
PR180 0_0402_5%~D
PR180 0_0402_5%~D
1 2
PR141 0_0402_5%~D
PR141 0_0402_5%~D
1 2
PC157
0.1U_0603_25V7K~D
PC157
0.1U_0603_25V7K~D
12
PR173
2.2_1206_1%~D
PR173
2.2_1206_1%~D
12
PC158
2200P_0402_50V7K~D
PC158
2200P_0402_50V7K~D
12
PR185
0_0603_5%~D
PR185
0_0603_5%~D
12
PR163
0_0603_5%~D
PR163
0_0603_5%~D
1 2
PQ20
SI7658ADP_MLP8~D
PQ20
SI7658ADP_MLP8~D
3 5
2
4
1
PR157
1_0402_5%~D
PR157
1_0402_5%~D
1 2
+
PC152
100U_25V_M~D
+
PC152
100U_25V_M~D
1
2
PC148
2200P_0402_50V7K~D
PC148
2200P_0402_50V7K~D
12
PC181
0.22U_0603_10V7K~D
PC181
0.22U_0603_10V7K~D
1 2
PC329
2200P_0402_50V7K~D
PC329
2200P_0402_50V7K~D
12
PU12
ISL6208CRZ-T_QFN8~D
PU12
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM
6
VCC
5
PWM
2
LGATE 4
GND
3
PHASE 7
UGATE 8
PR151 1.91K_0402_1%~D
PR151 1.91K_0402_1%~D
1 2
PR177 0_0402_5%~D
PR177 0_0402_5%~D
1 2
PC149
10U_1206_25VAK~D
PC149
10U_1206_25VAK~D
12
PC164
22P_0402_50V8J~D
@PC164
22P_0402_50V8J~D
@
1 2
PR136 1K_0402_1%~D
PR136 1K_0402_1%~D
12
PR169
249K_0402_1%~D
@PR169
249K_0402_1%~D
@
12
PR187
82.5_0402_1%~D
PR187
82.5_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CHG_UGATE
+VCHGR_B
CSSN_1
MAX8731_IINP
BOOT_D
+VCHGR_L
MAX8731_REF
VFB
MAX8731A_LDO
DCIN
CHG_LGATE
CSSP_1
MAX8731_REF
BOOT
MAX8731A_LDO
ACAV_IN
MAX8731_REF
MAX8731_REF
VCC
GNDA_CHG
+5V_ALW
+SDC_IN
+DC_IN +3.3V_ALW
+5V_ALW
+VCHGR
CHAGER_SRC
+VCHGR
+PWR_SRC
GNDA_CHG
GNDA_CHG
GNDA_CHG
+5V_ALW
GNDA_CHG
GNDA_CHG
GNDA_CHG
+SDC_IN
+DC_IN_SS
GNDA_CHG
CHARGER_SMBDAT40
ACAV_IN23,40,52
DOCK_DCIN_IS- 38
CHARGER_SMBCLK40
DOCK_DCIN_IS+ 38
ACAV_IN_NB 39,40,52
CSS_GC52
DC_BLOCK_GC 52
+CHGR_DC_IN52
DK_CSS_GC 52
MAX8731_IINP23
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
Charger
51 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
Charger
51 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
Charger
51 69Thursday, January 21, 2010
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Maximum charging current is 6.3A
E2 AC_OK=17.7 Volt
PR218
TI bq24745 = 316K
Intersil ISL88731 = 226K
Maxim MAX8731= 383K
PR231
100_0402_5%~D
PR231
100_0402_5%~D
1 2
PC211
56P_0402_50V8~D
PC211
56P_0402_50V8~D
1 2
PC218
1U_0603_10V6K~D
PC218
1U_0603_10V6K~D
12
PC221
10U_1206_25V6M~D
PC221
10U_1206_25V6M~D
12
PR214
100K_0402_1%~D
PR214
100K_0402_1%~D
12
PR247
42.2K_0402_1%~D
PR247
42.2K_0402_1%~D
12
PR218
316K_0402_1%~D
PR218
316K_0402_1%~D
1 2
PR241
10K_0402_1%~D
PR241
10K_0402_1%~D
12
PC233
100P_0402_50V8J~D
@
PC233
100P_0402_50V8J~D
@
12
PC225
0.1U_0603_25V7K~D
PC225
0.1U_0603_25V7K~D
1 2
PR217
0_0402_5%~D
PR217
0_0402_5%~D
1 2
PC219
0.1U_0402_10V7K~D
@
PC219
0.1U_0402_10V7K~D
@
12
G
D
S
PQ33B
NTGD4161PT1G_TSOP6~D
G
D
S
PQ33B
NTGD4161PT1G_TSOP6~D
3
42
PC214
1000P_0603_50V7K~D
PC214
1000P_0603_50V7K~D
12
PR229
10K_0402_5%~D
PR229
10K_0402_5%~D
1 2
PC212
120P_0402_50VNPO~D
PC212
120P_0402_50VNPO~D
1 2
PD17
BAT54HT1G_SOD323-2~D
PD17
BAT54HT1G_SOD323-2~D
12
PC210
3300P_0402_50V7K~D
@
PC210
3300P_0402_50V7K~D
@
12
PC193
0.1U_0603_25V7K~D
@
PC193
0.1U_0603_25V7K~D
@
12
PR227
4.7K_0402_5%~D
PR227
4.7K_0402_5%~D
12
PR212
0_0402_5%~D
PR212
0_0402_5%~D
12
PC204
10U_1206_25V6M~D
PC204
10U_1206_25V6M~D
12
PU14A
LM393DR_SO8~D
PU14A
LM393DR_SO8~D
+
3
-
2
O1
P
8G4
PC201
0.1U_0603_25V7K~D
PC201
0.1U_0603_25V7K~D
12
PR222
0_0402_5%~D
PR222
0_0402_5%~D
1 2
G
S
D
PQ31
NTR4502PT1G_SOT23-3~D
G
S
D
PQ31
NTR4502PT1G_SOT23-3~D
2
13
PQ36
SI4812BDY-T1-E3_SO8~D
PQ36
SI4812BDY-T1-E3_SO8~D
4
7
8
6
5
1
2
3
PQ28
SI4835DDY-T1-E3_SO8~D
PQ28
SI4835DDY-T1-E3_SO8~D
36
5
7
8
2
4
1
PR233
0_0402_5%~D
PR233
0_0402_5%~D
12
PR250
41.2K_0402_1%~D
@
PR250
41.2K_0402_1%~D
@
12
PR213
100K_0402_1%~D
PR213
100K_0402_1%~D
12
PR230
8.45K_0402_1%~D
@
PR230
8.45K_0402_1%~D
@
12
PC220
0.1U_0603_25V7K~D
PC220
0.1U_0603_25V7K~D
12
PC208
220P_0402_50V7K~D
@PC208
220P_0402_50V7K~D
@
12
PR238
47K_0402_1%~D
PR238
47K_0402_1%~D
12
PR246
22.6K_0402_1%~D
PR246
22.6K_0402_1%~D
12
PC205
10U_1206_25V6M~D
PC205
10U_1206_25V6M~D
12
PR220
2.2_0603_1%~D
PR220
2.2_0603_1%~D
1 2
G
S
D
PQ32
NTR4502PT1G_SOT23-3~D
G
S
D
PQ32
NTR4502PT1G_SOT23-3~D
2
13
PC194
47P_0402_50V8J~D
PC194
47P_0402_50V8J~D
12
PR234
4.7_1206_5%~D
PR234
4.7_1206_5%~D
1 2
PR215
10K_0402_1%~D
@
PR215
10K_0402_1%~D
@
12
PC213
220P_0402_50V8J~D
PC213
220P_0402_50V8J~D
12
PL21
5.6UH_HMU1356B-5R6-F_8A_20%~D
PL21
5.6UH_HMU1356B-5R6-F_8A_20%~D
12
3
PR219
49.9K_0402_1%~D
PR219
49.9K_0402_1%~D
12
G
D
S
PQ33A
NTGD4161PT1G_TSOP6~D
G
D
S
PQ33A
NTGD4161PT1G_TSOP6~D
1
65
PR237
232K_0402_1%~D
PR237
232K_0402_1%~D
12
PC217
0.01U_0402_25V7K~D
@
PC217
0.01U_0402_25V7K~D
@
12
PC223
10U_1206_25V6M~D
PC223
10U_1206_25V6M~D
12
PC226
100P_0402_50V8J~D
PC226
100P_0402_50V8J~D
12
PR224
1_0603_1%~D
PR224
1_0603_1%~D
12
PC207
0.1U_0402_10V7K~D
PC207
0.1U_0402_10V7K~D
12
PR392
1_0805_5%~D
PR392
1_0805_5%~D
1 2
PR235
1M_0402_1%~D
PR235
1M_0402_1%~D
1 2
PR209
10K_0402_5%~D
@PR209
10K_0402_5%~D
@
12
PR221
33_0603_1%~D
@PR221
33_0603_1%~D
@
1 2
PL27
FBMJ4516HS720NT_1806~D
@PL27
FBMJ4516HS720NT_1806~D
@
12
PR225
200K_0402_5%~D
PR225
200K_0402_5%~D
1 2
PR232
1.8K_1206_5%~D
@
PR232
1.8K_1206_5%~D
@
12
PC192
0.1U_0603_25V7K~D
@
PC192
0.1U_0603_25V7K~D
@
12
PC196
0.1U_0603_25V7K~D
PC196
0.1U_0603_25V7K~D
1 2
PR228
0.01_1206_1%~D
PR228
0.01_1206_1%~D
1
3
4
2
G
D
S
PQ37
RHU002N06_SOT323-3~D
@
G
D
S
PQ37
RHU002N06_SOT323-3~D
@
2
13
PC215
0.01U_0402_25V7K~D
@
PC215
0.01U_0402_25V7K~D
@
12
PC198
1U_0603_10V6K~D
@PC198
1U_0603_10V6K~D
@
1 2
PC206
1U_0603_10V6K~D
PC206
1U_0603_10V6K~D
1 2
PU14B
LM393DR_SO8~D
PU14B
LM393DR_SO8~D
+
5
-
6O7
P8
G
4
PR245
0_0402_5%~D
PR245
0_0402_5%~D
1 2
PC234
0.01U_0402_25V7K~D
@
PC234
0.01U_0402_25V7K~D
@
12
PC200
0.01U_0402_25V7K~D
PC200
0.01U_0402_25V7K~D
12
PJP39
PAD-OPEN 4x4m
PJP39
PAD-OPEN 4x4m
1 2
PC216
0.01U_0402_25V7K~D
@
PC216
0.01U_0402_25V7K~D
@
12
PQ35
SI4800BDY-T1-E3_SO8~D
PQ35
SI4800BDY-T1-E3_SO8~D
4
7
8
6
5
1
2
3
PC203
0.1U_0603_25V7K~D
PC203
0.1U_0603_25V7K~D
12
PR223
15.8K_0402_1%~D
@
PR223
15.8K_0402_1%~D
@
12
PC209
2200P_0402_50V7K~D
PC209
2200P_0402_50V7K~D
12
PQ34
SI4800BDY-T1-E3_SO8~D
PQ34
SI4800BDY-T1-E3_SO8~D
4
7
8
6
5
1
2
3
PU13
BQ24747RHDR_QFN28_5X5~D
PU13
BQ24747RHDR_QFN28_5X5~D
UGATE 24
CSOP 18
PHASE 23
VFB 15
SDA
9
VICM
8
ICREF 1
DCIN
22
ACIN
2
VDDSMB
11
SCL
10
ACOK
13
NC
14
BOOT 25
NC 16
EAO
4
VDDP 21
ICOUT 26
CSSP 28
CSON 17
PGND 19
LGATE 20
FBO
6
EAI
5
CSSN 27
VREF
3
CE
7
GND
12
TP
29
PC197
0.1U_0603_25V7K~D
PC197
0.1U_0603_25V7K~D
1 2
PR391
0_0402_5%~D
PR391
0_0402_5%~D
1 2
PR281
0_0402_5%~D
PR281
0_0402_5%~D
1 2
PJP40
PAD-OPEN1x1m
PJP40
PAD-OPEN1x1m
1 2
PC222
10U_1206_25V6M~D
PC222
10U_1206_25V6M~D
12
PR202
0.01_1206_1%~D
PR202
0.01_1206_1%~D
1
3
4
2
PD15
B540C-13-F_SMC2~D
PD15
B540C-13-F_SMC2~D
12
PR240
100K_0402_1%~D
@
PR240
100K_0402_1%~D
@
12
PR226
7.5K_0402_5%~D
PR226
7.5K_0402_5%~D
1 2
PC202
2200P_0402_50V7K~D
PC202
2200P_0402_50V7K~D
12
PC227
100P_0402_50V8J~D
PC227
100P_0402_50V8J~D
12
PC199
0.1U_0805_50V7M~D
PC199
0.1U_0805_50V7M~D
12
PC224
0.1U_0603_25V7K~D
PC224
0.1U_0603_25V7K~D
1 2
PR216
10K_0402_5%~D
PR216
10K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PBATT_IN_SS
DK_AC_OFF
BLKNG_MOSFET_GC
SL_BAT_PRES#
ERC2
ERC1
P33ALW
ACAVDK_SRC
ERC3
DK_AC_OFF_ENCD3301_SDC_IN
3301_ACAV_IN_NB
3301_PWRSRC
DSCHRG_MOSFET_GC
STSTART_DCBLOCK_GC
P50ALW
CD_PBATT_OFF
ACAVIN
CD3301_DCIN
P33ALW2
STSTART_DCBLOCK_GC
EN_DK_PWRBAR
PBATT+
+PWR_SRC
+DOCK_PWR_BAR
+VCHGR
+DOCK_PWR_BAR
+DC_IN_SS
+DC_IN
+SDC_IN
+3.3V_ALW2
+PWR_SRC
+3.3V_ALW
+5V_ALW
+NBDOCK_DC_IN_SS
+3.3V_ALW2
CSS_GC51
DK_CSS_GC51
+CHGR_DC_IN51
PBATT_OFF 39
DOCK_AC_OFF 38,39
ACAV_IN_NB 39,40,51
DOCK_AC_OFF_EC 39
SLICE_BAT_PRES# 38,39,44
SOFT_START_GC44
ACAV_DOCK_SRC#38
DC_BLOCK_GC51
ACAV_IN23,40,51
EN_DOCK_PWR_BAR 39
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
Selector
52 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
Selector
52 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5772P
0.1
Selector
52 69Thursday, January 21, 2010
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
'W/K/ŶƉƵƚĨƌŽŵE
ŵďĞĚĚĞĚŽŶƚƌŽůůĞƌ
PR274 0_0402_5%~DPR274 0_0402_5%~D
1 2
PR268 0_0402_5%~DPR268 0_0402_5%~D
1 2
PC239
0.047U_0603_25V7K~D
PC239
0.047U_0603_25V7K~D
12
PD21
RB751S40T1_SOD523-2~D
@PD21
RB751S40T1_SOD523-2~D
@
2 1
PD20
PDS5100H-13_POWERDI5-3~D
PD20
PDS5100H-13_POWERDI5-3~D
2
3
1
PR264 0_0402_5%~DPR264 0_0402_5%~D
1 2
PU18
CD3301RHHR_QFN36_6X6~D
PU18
CD3301RHHR_QFN36_6X6~D
DC_IN
1
SS_GC
2
ERC1
3
ACAVDK_SRC
4
GND
5
SDC_IN
6
DC_BLK_GC
7
ACAV_IN
8
SS_DCBLK_GC
16
CSS_GC
10
DK_CSS_GC
11
ERC3
12
ERC2
13
GND
14
PWR_SRC
15
BLKNG_MOSFET_GC 20
SL_BAT_PRES# 21
DK_AC_OFF_EN 22
GND 23
ACAV_IN_NB 24
DK_AC_OFF_EN 25
PBATT_OFF 26
P50ALW 27
PBatt+ 28
DSCHRG_MOSFET_GC 29
BLK_MOSFET_GC 30
NC 31
DK_PWRBAR 33
DC_IN_SS 34
CHARGERVR_DCIN 35
P33ALW2
9
EN_DK_PWRBAR
17
P33ALW
18
TP
37
NBDK_DCINSS 19
NC 36
GND 32
PC323
0.1U_0603_50V4Z~D
PC323
0.1U_0603_50V4Z~D
12
PC319
0.1U_0402_25V4Z~D
@
PC319
0.1U_0402_25V4Z~D
@
12
PQ45
FDS6679AZ_SO8~D
PQ45
FDS6679AZ_SO8~D
S1
S2
S3
G4
D
8
D
7
D
6
D
5
PC235
0.47U_0805_25V7K~D
PC235
0.47U_0805_25V7K~D
12
PR253
330K_0402_5%~D
PR253
330K_0402_5%~D
12
PR271 0_0402_5%~DPR271 0_0402_5%~D
1 2
PR261 0_0402_5%~DPR261 0_0402_5%~D
1 2
PR427
180_0402_1%~D
@PR427
180_0402_1%~D
@
12
PC321
1U_0603_25V6-K~D
PC321
1U_0603_25V6-K~D
12
PR252
1K_1206_5%~D
PR252
1K_1206_5%~D
12
PR278
0_0402_5%~D
PR278
0_0402_5%~D
1 2
PR277
0_0402_5%~D
PR277
0_0402_5%~D
1 2
PC238
0.1U_0603_25V7K~D
PC238
0.1U_0603_25V7K~D
12
PR276 0_0402_5%~DPR276 0_0402_5%~D
1 2
PR269 0_0402_5%~DPR269 0_0402_5%~D
1 2
PR265
330K_0402_5%~D
PR265
330K_0402_5%~D
1 2
PQ51
FDS6679AZ_SO8~D
PQ51
FDS6679AZ_SO8~D
S1
S2
S3
G4
D
8
D
7
D
6
D
5
PQ50
FDS6679AZ_SO8~D
PQ50
FDS6679AZ_SO8~D
S
1
S
2
S
3
G
4
D8
D7
D6
D5
PR263 0_0402_5%~DPR263 0_0402_5%~D
1 2
PR272 0_0402_5%~DPR272 0_0402_5%~D
1 2
PC237
0.1U_0603_25V7K~D
PC237
0.1U_0603_25V7K~D
12
PC236
2200P_0402_50V7K~D
PC236
2200P_0402_50V7K~D
12
PR280
0_0402_5%~D
PR280
0_0402_5%~D
1 2
PD19
B540C-13-F_SMC2~D
PD19
B540C-13-F_SMC2~D
12
PQ49
SI4835DDY-T1-E3_SO8~D
PQ49
SI4835DDY-T1-E3_SO8~D
36
5
7
8
2
4
1
PR262 47_0805_5%~DPR262 47_0805_5%~D
1 2
PR429
1M_0402_5%~D
@PR429
1M_0402_5%~D
@
1 2
PR315
0_0402_5%~D
PR315
0_0402_5%~D
1 2
PR430 0_0402_5%~DPR430 0_0402_5%~D
1 2
PR431
1M_0402_5%~D
PR431
1M_0402_5%~D
1 2
PR270 0_0402_5%~DPR270 0_0402_5%~D
1 2
PR409 100K_0402_5%~DPR409 100K_0402_5%~D
1 2
PR267 0_0402_5%~DPR267 0_0402_5%~D
1 2
PR273 0_0402_5%~DPR273 0_0402_5%~D
1 2
PR279
0_0402_5%~D
PR279
0_0402_5%~D
1 2
PC320
1U_0603_25V6-K~D
PC320
1U_0603_25V6-K~D
12
PR275 0_0402_5%~DPR275 0_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PLTRST_GPU#_R
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
GPU_CRT_GRN
GPU_CRT_BLU
GPU_CRT_RED
+DACB_VDD
+DACA_VDD
+DACA_VREF
+PLLVDD
+PLLVDD
+SP_PLLVDD
+SP_PLLVDD
PANEL_BKEN_DGPU
ENVDD_GPU
GPU_VID_2
GPU_CRT_CLK_DDC
GPU_CRT_DAT_DDC
HDCP_DAT
HDCP_CLK
DAI_GPU_R3P_SMBDAT
DAI_GPU_R3P_SMBCLK
GPU_VID_3
GPU_CRT_VSYNC
GPU_CRT_GRN
GPU_CRT_BLU
GPU_CRT_HSYNC
GPU_CRT_RED
PEG_CTX_GRX_N2
PEG_CTX_GRX_N1
PEG_CTX_GRX_N0
PEG_CTX_GRX_P1
PEG_CTX_GRX_P2
PEG_CTX_GRX_P4
PEG_CTX_GRX_N8
PEG_CTX_GRX_N5
PEG_CTX_GRX_P8
PEG_CTX_GRX_N6
PEG_CTX_GRX_P7
PEG_CTX_GRX_P3
PEG_CTX_GRX_N9
PEG_CTX_GRX_N7
PEG_CTX_GRX_P6
PEG_CTX_GRX_P5
PEG_CTX_GRX_N4
PEG_CTX_GRX_N3
PEG_CTX_GRX_N10
PEG_CTX_GRX_P9
PEG_CTX_GRX_N12
PEG_CTX_GRX_P15
PEG_CTX_GRX_N14
PEG_CTX_GRX_P14
PEG_CTX_GRX_N13
PEG_CTX_GRX_P0
PEG_CTX_GRX_N11
PEG_CTX_GRX_P11
PEG_CTX_GRX_P13
PEG_CTX_GRX_P12
PEG_CTX_GRX_P10
PEG_CTX_GRX_N15
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P0
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_N4
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_N15
PEG_CRX_GTX_P[0..15]
PEG_CRX_GTX_N[0..15]
PEG_CTX_GRX_P[0..15]
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_P11
PEG_CRX_GTX_P6
PEG_CRX_GTX_N9
PEG_CRX_GTX_N5
PEG_CRX_GTX_P12
PEG_CRX_GTX_N6
PEG_CRX_GTX_P0
PEG_CRX_GTX_P14
PEG_CRX_GTX_P4
PEG_CRX_GTX_N11
PEG_CRX_GTX_P7
PEG_CRX_GTX_N1
PEG_CRX_GTX_N8
PEG_CRX_GTX_P9
PEG_CRX_GTX_N14
PEG_CRX_GTX_P15
PEG_CRX_GTX_N7
PEG_CRX_GTX_P10
PEG_CRX_GTX_P2
PEG_CRX_GTX_N15
PEG_CRX_GTX_P13
PEG_CRX_GTX_P3
PEG_CRX_GTX_N3
PEG_CRX_GTX_N13
PEG_CRX_GTX_P5
PEG_CRX_GTX_N2
PEG_CRX_GTX_P8
PEG_CRX_GTX_N4
PEG_CRX_GTX_P1
PEG_CRX_GTX_N10
PEG_CRX_GTX_N12
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_N4
PEG_CTX_GRX_N[0..15]
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_N15
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_N0
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_P0
DPB_GPU_HPD
DPC_GPU_DOCK_HPD
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_27M_IN
HDCP_DAT
HDCP_CLK
THERMTRIP_VGA#
GPU_CRT_DAT_DDC
GPU_CRT_CLK_DDC
ENVDD_GPU
DPD_GPU_EDP_HPD
DAI_GPU_R3P_SMBDAT
DAI_GPU_R3P_SMBCLK
I2CC_SCL
I2CC_SDA
I2CB_SCL
I2CB_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
+DACA_VDD
BIA_PWM_GPU
BIA_PWM_GPU
GPU_VID_2
GPU_VID_3
GPU_VID_4
CLK_REQ#
GPU_VID_1
GPU_CLKDWN
CLK_27M_IN
NV_CLK_27M_OUT
NV_CLK_27M_OUT
+1.05V_RUN_VTT_GFX
+1.05V_RUN_VTT_GFX
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
GPU_CRT_RED 27
GPU_CRT_GRN 27
GPU_CRT_BLU 27
GPU_CRT_HSYNC 27
GPU_CRT_VSYNC 27
PEG_CRX_GTX_N[0..15]7
PEG_CTX_GRX_N[0..15]7
PEG_CRX_GTX_P[0..15]7
PEG_CTX_GRX_P[0..15]7DPB_GPU_HPD 26
DPC_GPU_DOCK_HPD 38
CLK_PCIE_VGA#16
CLK_PCIE_VGA16
PLTRST_GPU#18
CLK_NV_27M6
CLK_NVSS_27M6
ENVDD_GPU 24,39
PANEL_BKEN_DGPU 39
THERMTRIP_VGA# 23
GPU_CRT_CLK_DDC27
GPU_CRT_DAT_DDC27
DPD_GPU_EDP_HPD 24
DAI_GPU_R3P_SMBCLK23,29,40
DAI_GPU_R3P_SMBDAT23,29,40
BIA_PWM_GPU 24
GPU_VID_2 62
GPU_VID_3 62
GPU_VID_1 62
GPU_VID_462
CLK_REQ#16
GPU_CLKDWN 39
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P PCIE,GPIO,CLK,I2C
53 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P PCIE,GPIO,CLK,I2C
53 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P PCIE,GPIO,CLK,I2C
53 69Thursday, January 21, 2010
Compal Electronics, Inc.
Differential signal
CRT
150mA , 10mil
150mA , 10mil
Close to GPU
Stuff R1328 for
standard I2C ROM.
Stuff R1329 for
crypto ROM
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
330R 100MHZ
120mA
Close to PinClose to U106
Close to U106
R9 10K_0402_5%~DR9 10K_0402_5%~D
1 2
C1446 0.1U_0402_10V7K~DC1446 0.1U_0402_10V7K~D
12
R1364 2.2K_0402_5%~DR1364 2.2K_0402_5%~D
12
R1346 0_0402_5%~DR1346 0_0402_5%~D
1 2
C1858
1U_0402_6.3V6K~D
C1858
1U_0402_6.3V6K~D
1
2
R1355
10K_0402_5%~D
@
R1355
10K_0402_5%~D
@
12
C1451 0.1U_0402_10V7K~DC1451 0.1U_0402_10V7K~D
12
R1328
2.2K_0402_5%~D
R1328
2.2K_0402_5%~D
12
R1454 4.7K_0402_5%~DR1454 4.7K_0402_5%~D
1 2
C1448 0.1U_0402_10V7K~DC1448 0.1U_0402_10V7K~D
12
C1469 0.1U_0402_10V7K~DC1469 0.1U_0402_10V7K~D
12
C1468 0.1U_0402_10V7K~DC1468 0.1U_0402_10V7K~D
12
C1473 0.1U_0402_10V7K~DC1473 0.1U_0402_10V7K~D
12
R1379
10K_0402_5%~D
R1379
10K_0402_5%~D
12
R1369 150_0402_1%~DR1369 150_0402_1%~D
1 2
C1769
1U_0402_6.3V6K~D
C1769
1U_0402_6.3V6K~D
1
2
C1454 0.1U_0402_10V7K~DC1454 0.1U_0402_10V7K~D
12
C1869
0.1U_0402_10V7K~D
C1869
0.1U_0402_10V7K~D
1
2
R1363 2.2K_0402_5%~DR1363 2.2K_0402_5%~D
12
C1453 0.1U_0402_10V7K~DC1453 0.1U_0402_10V7K~D
12
DVO
PCI EXPRESS
CLK
Part 1 of 7
DACs
I2C
GPIO
U106A
N10P-GLM-A3_BGA969~D
DVO
PCI EXPRESS
CLK
Part 1 of 7
DACs
I2C
GPIO
U106A
N10P-GLM-A3_BGA969~D
PEX_RX0
AP17
PEX_RX0_N
AN17
PEX_RX1
AN19
PEX_RX1_N
AP19
PEX_RX2
AR19
PEX_RX2_N
AR20
PEX_RX3
AP20
PEX_RX3_N
AN20
PEX_RX4
AN22
PEX_RX4_N
AP22
PEX_RX5
AR22
PEX_RX5_N
AR23
PEX_RX6
AP23
PEX_RX6_N
AN23
PEX_RX7
AN25
PEX_RX7_N
AP25
PEX_RX8
AR25
PEX_RX8_N
AR26
PEX_RX9
AP26
PEX_RX9_N
AN26
PEX_RX10
AN28
PEX_RX10_N
AP28
PEX_RX11
AR28
PEX_RX11_N
AR29
PEX_RX12
AP29
PEX_RX12_N
AN29
PEX_RX13
AN31
PEX_RX13_N
AP31
PEX_RX14
AR31
PEX_RX14_N
AR32
PEX_RX15
AR34
PEX_RX15_N
AP34
PEX_TX0
AL17
PEX_TX0_N
AM17
PEX_TX1
AM18
PEX_TX1_N
AM19
PEX_TX2
AL19
PEX_TX2_N
AK19
PEX_TX3
AL20
PEX_TX3_N
AM20
PEX_TX4
AM21
PEX_TX4_N
AM22
PEX_TX5
AL22
PEX_TX5_N
AK22
PEX_TX6
AL23
PEX_TX6_N
AM23
PEX_TX7
AM24
PEX_TX7_N
AM25
PEX_TX8
AL25
PEX_TX8_N
AK25
PEX_TX9
AL26
PEX_TX9_N
AM26
PEX_TX10
AM27
PEX_TX10_N
AM28
PEX_TX11
AL28
PEX_TX11_N
AK28
PEX_TX12
AK29
PEX_TX12_N
AL29
PEX_TX13
AM29
PEX_TX13_N
AM30
PEX_TX14
AM31
PEX_TX14_N
AM32
PEX_TX15
AN32
PEX_TX15_N
AP32
PEX_REFCLK
AR16
PEX_REFCLK_N
AR17
PEX_RST_N
AM16
XTAL_IN
B1
XTAL_OUT
B2
XTAL_OUTBUFF
D1
XTAL_SSIN
D2
GPIO0 K1
GPIO1 K2
GPIO2 K3
GPIO3 H3
GPIO4 H2
GPIO5 H1
GPIO6 H4
GPIO7 H5
GPIO8 H6
GPIO9 J7
GPIO10 K4
GPIO11 K5
GPIO12 H7
MIOA_D0 N1
MIOA_D1 P4
MIOA_D2 P1
MIOA_D3 P2
MIOA_D4 P3
MIOA_D5 T3
MIOA_D6 T2
MIOA_D7 T1
MIOA_D8 U4
MIOA_D9 U1
MIOA_D10 U2
MIOA_D11 U3
MIOA_HSYNC N3
MIOA_VSYNC L3
MIOA_CLKOUT R4
MIOA_CLKOUT_N T4
MIOB_HSYNC W1
MIOB_VSYNC W2
MIOB_DE Y5
MIOB_CTL3 W3
MIOB_CLKIN AE1
MIOB_CLKOUT V4
MIOB_CLKOUT_N W4
MIOB_VREF AF1
DACA_HSYNC AM13
DACA_VSYNC AL13
DACA_RED AM15
DACA_BLUE AL14
DACA_GREEN AM14
DACA_RSET AK13
DACA_VREF AK12
PEX_TSTCLK_OUT
AJ17
PEX_TSTCLK_OUT_N
AJ18
I2CS_SDA
E1
I2CA_SCL
G1
I2CA_SDA
G4
I2CB_SCL
G3
I2CB_SDA
G2
I2CC_SCL
E3
I2CC_SDA
E4
GPIO13 J4
GPIO14 J6
I2CS_SCL
E2
GPIO15 L1
GPIO16 L2
GPIO17 L4
GPIO18 M4
GPIO19 L7
GPIO20 L5
GPIO21 K6
GPIO22 L6
GPIO23 M6
MIOA_D12 R6
MIOA_D13 T6
MIOA_D14 N6
MIOA_CLKIN N4
MIOB_D14 Y6
PEX_TERMP
AG21
I2CH_SCL
F6
I2CH_SDA
G6
DACB_RED AK4
DACB_GREEN AL4
DACB_BLUE AJ4
DACB_VREF AK6
DACB_RSET AH7
PEX_CLKREQ_N
AR13
DACB_HSYNC AM1
DACB_VSYNC AM2
MIOB_D0 Y1
MIOB_D1 Y2
MIOB_D2 Y3
MIOB_D3 AB3
MIOB_D4 AB2
MIOB_D5 AB1
MIOB_D6 AC4
MIOB_D7 AC1
MIOB_D8 AC2
MIOB_D9 AC3
MIOBD_10 AE3
MIOB_D11 AE2
MIOB_D12 U6
MIOB_D13 W6
MIOACAL_PD_VDDQ U5
MIOBCAL_PD_VDDQ AA7
MIOACAL_PU_GND T5
MIOBCAL_PU_GND AA6
MIOA_DE N2
MIOA_CTL3 P5
MIOA_VREF N5
PLLVDD
AE9
SP_PLLVDD
AF9
VID_PLLVDD
AD9
DACA_VDD AJ12
DACB_VDD AG7
R1455 4.7K_0402_5%~DR1455 4.7K_0402_5%~D
1 2
R1412
10K_0402_5%~D
R1412
10K_0402_5%~D
1 2
C1868
0.1U_0402_10V7K~D
C1868
0.1U_0402_10V7K~D
1
2
C1712
0.1U_0402_10V7K~D
C1712
0.1U_0402_10V7K~D
1
2
L96
100NH_LLQ1608-FR10G_2%~D
L96
100NH_LLQ1608-FR10G_2%~D
12
C1460 0.1U_0402_10V7K~DC1460 0.1U_0402_10V7K~D
12
C1735
1U_0402_6.3V6K~D
C1735
1U_0402_6.3V6K~D
1
2
L90
100NH_LLQ1608-FR10G_2%~D
L90
100NH_LLQ1608-FR10G_2%~D
12
R1325
124_0402_1%~D
R1325
124_0402_1%~D
12
R1351 2.49K_0402_1%~DR1351 2.49K_0402_1%~D
1 2
C1439 0.1U_0402_10V7K~DC1439 0.1U_0402_10V7K~D
12
R1414
10K_0402_5%~D
R1414
10K_0402_5%~D
1 2
C1458 0.1U_0402_10V7K~DC1458 0.1U_0402_10V7K~D
12
L92
BLM18PG331SN1D_2P~D
L92
BLM18PG331SN1D_2P~D
12
R1419 33_0402_5%~DR1419 33_0402_5%~D
1 2
R1354
10K_0402_5%~D
R1354
10K_0402_5%~D
12
R1336 2.2K_0402_5%~D@R1336 2.2K_0402_5%~D@1 2
C1466 0.1U_0402_10V7K~DC1466 0.1U_0402_10V7K~D
12
R1337 2.2K_0402_5%~D@R1337 2.2K_0402_5%~D@1 2
C1711
4.7U_0603_6.3V6K~D
C1711
4.7U_0603_6.3V6K~D
1
2
R1345 200_0402_1%~D@R1345 200_0402_1%~D@1 2
C1459 0.1U_0402_10V7K~DC1459 0.1U_0402_10V7K~D
12
R1357
10K_0402_5%~D
7@
R1357
10K_0402_5%~D
7@
12
C1443 0.1U_0402_10V7K~DC1443 0.1U_0402_10V7K~D
12
C1471 0.1U_0402_10V7K~DC1471 0.1U_0402_10V7K~D
12
R1420 10K_0402_5%~DR1420 10K_0402_5%~D
1 2
R1359 2.2K_0402_5%~DR1359 2.2K_0402_5%~D
1 2
C1710
1U_0402_6.3V6K~D
C1710
1U_0402_6.3V6K~D
1
2
C1465 0.1U_0402_10V7K~DC1465 0.1U_0402_10V7K~D
12
R1353 10K_0402_5%~DR1353 10K_0402_5%~D
1 2
C1461 0.1U_0402_10V7K~DC1461 0.1U_0402_10V7K~D
12
C1859
4.7U_0603_6.3V6K~D
C1859
4.7U_0603_6.3V6K~D
1
2
R1327 10K_0402_5%~DR1327 10K_0402_5%~D
1 2
C1463 0.1U_0402_10V7K~DC1463 0.1U_0402_10V7K~D
12
C1440 0.1U_0402_10V7K~DC1440 0.1U_0402_10V7K~D
12
C1860
1U_0402_6.3V6K~D
C1860
1U_0402_6.3V6K~D
1
2
R1416 10K_0402_5%~DR1416 10K_0402_5%~D
1 2
R1365 2.2K_0402_5%~DR1365 2.2K_0402_5%~D
12
R1417 10K_0402_5%~DR1417 10K_0402_5%~D
1 2
C1442 0.1U_0402_10V7K~DC1442 0.1U_0402_10V7K~D
12
C1447 0.1U_0402_10V7K~DC1447 0.1U_0402_10V7K~D
12
G
D
S
Q4
SSM3K7002FU_SC70-3~D
@
G
D
S
Q4
SSM3K7002FU_SC70-3~D
@
2
13
C1716
4700P_0402_25V7K~D
C1716
4700P_0402_25V7K~D
1
2
C1449 0.1U_0402_10V7K~DC1449 0.1U_0402_10V7K~D
12
C1867
470P_0402_50V7K~D
C1867
470P_0402_50V7K~D
1
2
R1367 150_0402_1%~DR1367 150_0402_1%~D
1 2
C1455 0.1U_0402_10V7K~DC1455 0.1U_0402_10V7K~D
12
R1360
10K_0402_5%~D
8@
R1360
10K_0402_5%~D
8@
12
C1450 0.1U_0402_10V7K~DC1450 0.1U_0402_10V7K~D
12
G1 G2
Y7
27MHZ_10PF_X3S027000BA1H-U~D
G1 G2
Y7
27MHZ_10PF_X3S027000BA1H-U~D
1
2
3
4
C1713
0.1U_0402_10V7K~D
C1713
0.1U_0402_10V7K~D
1
2
R1329
10K_0402_5%~D
@R1329
10K_0402_5%~D
@
12
C1441 0.1U_0402_10V7K~DC1441 0.1U_0402_10V7K~D
12
C1462 0.1U_0402_10V7K~DC1462 0.1U_0402_10V7K~D
12
C1718
4.7U_0603_6.3V6K~D
C1718
4.7U_0603_6.3V6K~D
1
2
C1470 0.1U_0402_10V7K~DC1470 0.1U_0402_10V7K~D
12
C1717
0.1U_0402_10V7K~D
C1717
0.1U_0402_10V7K~D
1
2
C1890
10P_0402_50V8J~D
C1890
10P_0402_50V8J~D
1
2
C1457 0.1U_0402_10V7K~DC1457 0.1U_0402_10V7K~D
12
R1522 0_0402_5%~DR1522 0_0402_5%~D
1 2
R1418 33_0402_5%~DR1418 33_0402_5%~D
1 2
R1317 0_0402_5%~D@R1317 0_0402_5%~D@
1 2
C1444 0.1U_0402_10V7K~DC1444 0.1U_0402_10V7K~D
12
R1373 2.2K_0402_5%~DR1373 2.2K_0402_5%~D
12
R617 0_0402_5%~D@R617 0_0402_5%~D@
1 2
C1456
0.1U_0402_10V7K~D
C1456
0.1U_0402_10V7K~D
1
2
C1719
4.7U_0603_6.3V6K~D
C1719
4.7U_0603_6.3V6K~D
1
2
C1891
10P_0402_50V8J~D
C1891
10P_0402_50V8J~D
1
2
C1464 0.1U_0402_10V7K~DC1464 0.1U_0402_10V7K~D
12
C1452 0.1U_0402_10V7K~DC1452 0.1U_0402_10V7K~D
12
R1375
10K_0402_5%~D
@
R1375
10K_0402_5%~D
@
12
C1472 0.1U_0402_10V7K~DC1472 0.1U_0402_10V7K~D
12
R1374
10K_0402_5%~D
7@
R1374
10K_0402_5%~D
7@
12
R1368 150_0402_1%~DR1368 150_0402_1%~D
1 2
R1361
10K_0402_5%~D
8@
R1361
10K_0402_5%~D
8@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GPU_TESTMODE
SPDIF_OUT_GPU
GPU_TESTMODE
ROM_SI_GPU
ROM_SO_GPU
ROM_SCLK_GPU
STRAP1
STRAP0
STRAP2
ROM_SCLK_GPU
ROM_SI_GPU
ROM_SO_GPU
SPDIF_OUT_GPU
DPB_GPU_AUX#/DDC
DPD_GPU_EDP_AUX#
DPD_GPU_EDP_AUX
DPB_GPU_AUX/DDC
DPC_GPU_AUX#/DDC
DPC_GPU_AUX/DDC
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
DPC_GPU_LANE_P238
DPC_GPU_LANE_P338
DPC_GPU_LANE_N238
DPC_GPU_LANE_N338
DPB_GPU_AUX/DDC26
DPB_GPU_AUX#/DDC26
DPD_GPU_EDP_AUX24
DPD_GPU_EDP_AUX#24
DPC_GPU_AUX/DDC25
DPC_GPU_AUX#/DDC25
DPC_GPU_LANE_P038
DPC_GPU_LANE_P138
DPC_GPU_LANE_N038
DPC_GPU_LANE_N138
VGA_THERMDN 23
VGA_THERMDP 23
GPU_VDD_SENSE 62
DPD_GPU_LANE_P024
DPD_GPU_LANE_P124
DPD_GPU_LANE_N024
DPD_GPU_LANE_N124
DPB_GPU_LANE_N026
DPB_GPU_LANE_N126
DPB_GPU_LANE_N226
DPB_GPU_LANE_N326
DPB_GPU_LANE_P026
DPB_GPU_LANE_P126
DPB_GPU_LANE_P226
DPB_GPU_LANE_P326
GPU_VSS_SENSE 62
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P DP, STRAP
54 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P DP, STRAP
54 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P DP, STRAP
54 69Thursday, January 21, 2010
Compal Electronics, Inc.
R1341
Asics
Margaux
R1332
10K N10P-GS
R1342 R1333
depop15Kdepop
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
IFPD for eDP & DP only
For Hynix 64Mx16 DDR3 part stuff R1343=15K
For Samsung 64Mx16 DDR3 part stuff R1343=20K
Hynix H5TQ1G63BFR-12C SA00003240L
For Hynix 64Mx16 DDR3 part stuff R1343=15K
For Samsung 64Mx16 DDR3 part stuff R1343=20K
Resistor Values
PU/PD
10K
PD
15K
20K
25K
PD
35K
45K
Bit3-Bit0
0001
0010
0011
1100
0110
1111
PD
PU
PD
PU
ROM_SO
ROM_SCLK
ROM_SI
STRAP2
STRAP1
STRAP0
Hynix H5TQ1G63BFR-12C SA00003240L
STRAP0
STRAP1
STRAP2
USER[3:0]
3GIO_PADCFG_LUT_ADR[3:0]
PCI_DEVID[3:0]
ROM_SI
ROM_SO
RAM_CFG[3:0]
XCLK_417, FB_0_BAR_SIZE, ALT_ADOOR, VGA_DEVICE
PCIDEVID_EXT, SUB_VENDOR, SLOT_CLK, PEX_PLL_ENROM_SCLK
R1330
45.3K_0402_1%~D
R1330
45.3K_0402_1%~D
1 2
R647 100K_0402_5%~DR647 100K_0402_5%~D
1 2
R1372 1K_0402_1%~DR1372 1K_0402_1%~D
1 2
R1333
15K_0402_1%~D
1@
R1333
15K_0402_1%~D
1@
1 2
Part 4 of 7
LVDS/TMDS
NC
GENERAL
SERIAL
TEST
U106D
N10P-GLM-A3_BGA969~D
Part 4 of 7
LVDS/TMDS
NC
GENERAL
SERIAL
TEST
U106D
N10P-GLM-A3_BGA969~D
IFPA_TXC_N
AM12 IFPA_TXC
AM11 NC_0 A2
NC_1 A7
NC_2 B7
NC_3 C5
NC_4 C7
NC_5 D5
NC_6 D6
NC_7 D7
NC_8 E5
NC_9 E7
NC_10 F4
NC_11 G5
NC_12 G11
NC_13 G12
NC_14 G14
NC_15 G15
NC_16 G27
NC_17 G28
NC_18 G24
NC_19 G25
NC_20 H32
NC_21 J18
NC_22 J19
IFPA_TXD0
AM8
IFPA_TXD0_N
AL8
IFPA_TXD1
AM10
IFPA_TXD1_N
AM9
IFPA_TXD2
AK10
IFPA_TXD2_N
AL10
IFPA_TXD3
AK11
IFPA_TXD3_N
AL11
IFPB_TXC
AP13
IFPB_TXC_N
AN13
IFPB_TXD4
AN8
IFPB_TXD4_N
AP8
IFPB_TXD5
AP10
IFPB_TXD5_N
AN10
IFPB_TXD6
AR11
IFPB_TXD6_N
AR10
IFPB_TXD7
AN11
IFPB_TXD7_N
AP11
IFPC_L0
AM7
IFPC_L0_N
AM6
IFPC_L1
AL5
IFPC_L1_N
AM5
IFPC_L2
AM3
IFPC_L2_N
AM4
IFPC_L3
AP1
IFPC_L3_N
AR2
IFPD_L0
AR8
IFPD_L0_N
AR7
IFPD_L1
AP7
IFPD_L1_N
AN7
NC_23 J25
NC_24 J26
NC_26 M7
NC_27 M29
NC_28 P6
NC_29 P29
IFPD_L2_N
AP5
IFPD_L3_N
AR4
IFPD_L2
AN5
IFPD_L3
AR5
IFPE_L0
AH6
IFPE_L0_N
AH5
IFPE_L1
AH4
IFPE_L1_N
AG4
IFPE_L2
AF4
IFPE_L2_N
AF5
IFPE_L3
AE6
IFPE_L3_N
AE5
IFPF_L0
AL2
IFPF_L0_N
AL3
IFPF_L1
AJ3
IFPF_L1_N
AJ2
IFPF_L2
AJ1
IFPF_L2_N
AH1
IFPF_L3
AH2
IFPF_L3_N
AH3
NC_30 R29
NC_31 U7
NC_32 V6
NC_33 Y4
NC_34 AA4
NC_35 AB4
NC_36 AB7
NC_37 AC5
NC_38 AD6
NC_39 AD29
NC_40 AE29
NC_41 AF6
NC_42 AG6
NC_43 AG20
NC_44 AG29
NC_45 AH29
NC_46 AJ5
NC_47 AK15
NC_48 AL7
STRAP0
W5
STRAP1
W7
STRAP2
V7
CEC
AB5
NC_25 L29
THERMDP B5
THERMDN B4
NC/SPDIF A5
ROM_CS_N C3
ROM_SI D3
ROM_SO C4
ROM_SCLK D4
IFPF_AUX_I2CZ_SCL
AF3
IFPF_AUX_I2CZ_SDA_N
AF2
IFPE_AUX_I2CY_SCL
AE4
IFPE_AUX_I2CY_SDA_N
AD4
IFPD_AUX_I2CX_SCL
AP4
IFPD_AUX_I2CX_SDA_N
AN4
IFPC_AUX_I2CW_SCL
AP2
IFPC_AUX_I2CW_SDA_N
AN3
VDD_SENSE_0 D35
VDD_SENSE_1 P7
VDD_SENSE_2 AD20
GND_SENSE_0 AD19
GND_SENSE_1 E35
GND_SENSE_2 R7
BUFRST_N
A4
MULTI_STRAP_REF0_GND N9
MULTI_STRAP_REF1_GND M9
TESTMODE AP35
JTAG_TCK AP14
JTAG_TDI AN14
JTAG_TDO AN16
JTAG_TMS AR14
JTAG_TRST_N AP16
R656 100K_0402_5%~DR656 100K_0402_5%~D
1 2
C1467
100P_0402_50V8K~D
@C1467
100P_0402_50V8K~D
@
1
2
R1424 1K_0402_1%~DR1424 1K_0402_1%~D
1 2
R1370 40.2K_0402_1%~DR1370 40.2K_0402_1%~D
1 2
TV2TV2
R1343
15K_0402_1%~D
R1343
15K_0402_1%~D
1 2
R1344
10K_0402_1%~D
R1344
10K_0402_1%~D
1 2
R646 100K_0402_5%~DR646 100K_0402_5%~D
1 2
R1334
4.99K_0402_1%~D
@
R1334
4.99K_0402_1%~D
@
1 2
R1331
34.8K_0402_1%~D
R1331
34.8K_0402_1%~D
1 2
R1338
10K_0402_5%~D
R1338
10K_0402_5%~D
12
R1366
36K_0402_5%~D
R1366
36K_0402_5%~D
1 2
TV5TV5
R1339
4.99K_0402_1%~D
@
R1339
4.99K_0402_1%~D
@
1 2
R648 100K_0402_5%~DR648 100K_0402_5%~D
1 2
R1421
10K_0402_5%~D
@R1421
10K_0402_5%~D
@
12
R1340
34.8K_0402_1%~D
@
R1340
34.8K_0402_1%~D
@
1 2
R653 100K_0402_5%~DR653 100K_0402_5%~D
1 2
R652 100K_0402_5%~DR652 100K_0402_5%~D
1 2
R1426 100K_0402_5%~D@R1426 100K_0402_5%~D@
1 2
R1332
24.9K_0402_1%~D
R1332
24.9K_0402_1%~D
1 2
R1371 40.2K_0402_1%~DR1371 40.2K_0402_1%~D
1 2
R1341
4.99K_0402_1%~D
@
R1341
4.99K_0402_1%~D
@
1 2
R1423 1K_0402_1%~DR1423 1K_0402_1%~D
1 2
TV4TV4
TV3TV3
R1342
15K_0402_1%~D
2@
R1342
15K_0402_1%~D
2@
1 2
R1335
4.99K_0402_1%~D
@
R1335
4.99K_0402_1%~D
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GFX_MEM_VTT_ON#
GFX_MEM_VTT_EN
1.05V_RUN_VTT_GFX#_EN
+GPU_CORE+GPU_CORE
+GPU_CORE
+GPU_CORE
+GPU_CORE
+15V_ALW+3.3V_ALW2 +1.5V_MEM
+1.5V_MEM_GFX
+15V_ALW +1.05V_M
+1.05V_RUN_VTT_GFX
GFX_MEM_VTT_ON39
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P GPU CORE, GND
55 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P GPU CORE, GND
55 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P GPU CORE, GND
55 69Thursday, January 21, 2010
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
NV DG for VDD Cap:
4700pF 10% X7R x2
0.01uF 10% X7R x6
0.022uF 10% X7R x4
0.047uF 10% X7R x3
0.22uF 10% X7R x2
1uF 10% X5R x1
4.7uF 10% X5R x1
+1.5V_MEM_GFX Source
+1.05V_RUN_VTT_GFX Source
Close to U106
Close to Pin
C717
10U_0805_10V4Z~D
C717
10U_0805_10V4Z~D
1
2
R643
100K_0402_5%~D
R643
100K_0402_5%~D
12
C1731
0.047U_0402_10V7K~D
C1731
0.047U_0402_10V7K~D
1
2
C1738
4700P_0402_25V7K~D
C1738
4700P_0402_25V7K~D
R642
100K_0402_5%~D
R642
100K_0402_5%~D
12
C1737
4700P_0402_25V7K~D
C1737
4700P_0402_25V7K~D
R644
20K_0402_5%~D
R644
20K_0402_5%~D
12
Q58
SI4164DY-T1-GE3_SO8~D
Q58
SI4164DY-T1-GE3_SO8~D
36
5
7
8
2
4
1
POWER
Part 7 of 7
U106G
N10P-GLM-A3_BGA969~D
POWER
Part 7 of 7
U106G
N10P-GLM-A3_BGA969~D
VDD_0
AB11
VDD_1
AB13
VDD_2
AB15
VDD_3
AB17
VDD_4
AB19
VDD_5
AB21
VDD_6
AB23
VDD_7
AB25
VDD_8
AC11
VDD_9
AC12
VDD_10
AC13
VDD_11
AC14
VDD_12
AC15
VDD_13
AC16
VDD_14
AC17
VDD_15
AC18
VDD_16
AC19
VDD_17
AC20
VDD_18
AC21
VDD_19
AC22
VDD_20
AC23
VDD_21
AC24
VDD_22
AC25
VDD_23
AD12
VDD_24
AD14
VDD_25
AD16
VDD_26
AD18
VDD_27
AD22
VDD_28
AD24
VDD_29
L11
VDD_30
L12
VDD_31
L13
VDD_32
L14
VDD_33
L15
VDD_34
L16
VDD_35
L17
VDD_36
L18
VDD_37
L19
VDD_38
L20
VDD_39
L21
VDD_40
L22
VDD_41
L23
VDD_42
L24
VDD_43
L25
VDD_44
M12
VDD_45
M14
VDD_46
M16
VDD_47
M18
VDD_48
M20
VDD_49
M22
VDD_50
M24
VDD_51
P11
VDD_52
P13
VDD_53
P15
VDD_54
P17
VDD_55
P19
VDD_81 V11
VDD_82 V13
VDD_83 V15
VDD_84 V17
VDD_85 V19
VDD_86 V21
VDD_87 V23
VDD_88 V25
VDD_89 W11
VDD_90 W12
VDD_91 W13
VDD_92 W14
VDD_93 W15
VDD_94 W16
VDD_95 W17
VDD_96 W18
VDD_97 W19
VDD_98 W20
VDD_99 W21
VDD_100 W22
VDD_101 W23
VDD_102 W24
VDD_103 W25
VDD_104 Y12
VDD_105 Y14
VDD_106 Y16
VDD_107 Y18
VDD_108 Y20
VDD_109 Y22
VDD_110 Y24
VDD_58 P25
VDD_59 R11
VDD_60 R12
VDD_61 R13
VDD_62 R14
VDD_63 R15
VDD_64 R16
VDD_65 R17
VDD_66 R18
VDD_67 R19
VDD_68 R20
VDD_69 R21
VDD_70 R22
VDD_71 R23
VDD_72 R24
VDD_73 R25
VDD_74 T12
VDD_75 T14
VDD_76 T16
VDD_77 T18
VDD_78 T20
VDD_79 T22
VDD_80 T24
VDD_56 P21
VDD_57 P23
C1728
0.022U_0402_25V7K~D
C1728
0.022U_0402_25V7K~D
1
2
C1730
0.047U_0402_10V7K~D
C1730
0.047U_0402_10V7K~D
1
2
C1734
0.022U_0402_25V7K~D
C1734
0.022U_0402_25V7K~D
1
2
C1722
22U_0805_6.3V6M~D
C1722
22U_0805_6.3V6M~D
1
2
C1726
0.22U_0603_10V7K~D
C1726
0.22U_0603_10V7K~D
1
2
C1744
1000P_0402_50V7K~D
C1744
1000P_0402_50V7K~D
C1723
22U_0805_6.3V6M~D
C1723
22U_0805_6.3V6M~D
1
2
R645
100K_0402_5%~D
R645
100K_0402_5%~D
12
C715
2200P_0402_50V7K~D
C715
2200P_0402_50V7K~D
1
2
C1727
0.22U_0603_10V7K~D
C1727
0.22U_0603_10V7K~D
1
2
Q197A
DMN66D0LDW-7_SOT363-6~D
Q197A
DMN66D0LDW-7_SOT363-6~D
61
2
C1739
1000P_0402_50V7K~D
C1739
1000P_0402_50V7K~D
GND
Part 6 of 7
U106F
N10P-GLM-A3_BGA969~D
GND
Part 6 of 7
U106F
N10P-GLM-A3_BGA969~D
GND_0
B3
GND_1
B6
GND_2
B9
GND_3
B12
GND_4
B15
GND_5
B21
GND_6
B24
GND_7
B27
GND_8
B30
GND_9
B33
GND_10
C2
GND_11
C34
GND_12
E6
GND_13
E9
GND_14
E12
GND_15
E15
GND_16
E18
GND_17
E24
GND_18
E27
GND_19
E30
GND_20
F2
GND_21
F31
GND_22
F34
GND_23
F5
GND_24
J2
GND_25
J5
GND_26
J31
GND_27
J34
GND_28
K9
GND_29
L9
GND_30
M2
GND_31
M5
GND_32
M11
GND_33
M13
GND_34
M15
GND_35
M17
GND_36
M19
GND_37
M21
GND_38
M23
GND_39
M25
GND_40
M31
GND_41
M34
GND_42
N11
GND_43
N12
GND_44
N13
GND_45
N14
GND_46
N15
GND_47
N16
GND_48
N17
GND_49
N18
GND_50
N19
GND_51
N20
GND_52
N21
GND_53
N22
GND_54
N23
GND_55
N24
GND_56
N25
GND_57
P12
GND_58
P14
GND_59
P16
GND_60
P18
GND_61
P20
GND_62
P22
GND_63
P24
GND_64
R2
GND_65
R5
GND_66
R31
GND_67
R34
GND_68
T11
GND_69
T13
GND_70
T15
GND_71
T17
GND_72
T19
GND_73
T21
GND_74
T23
GND_75
T25
GND_76
U11
GND_77
U12
GND_78
U13
GND_79
U14
GND_80
U15
GND_81
U16
GND_82
U17
GND_83
U18
GND_84
U19
GND_85
U20
GND_86
U21
GND_87
U22
GND_88
U23
GND_89
U24
GND_90
U25
GND_102 Y11
GND_103 Y13
GND_104 Y15
GND_105 Y17
GND_106 Y19
GND_107 Y21
GND_108 Y23
GND_109 Y25
GND_110 AA2
GND_111 AA5
GND_112 AA11
GND_113 AA12
GND_114 AA13
GND_115 AA14
GND_116 AA15
GND_117 AA16
GND_118 AA17
GND_119 AA18
GND_120 AA19
GND_121 AA20
GND_122 AA21
GND_123 AA22
GND_124 AA23
GND_125 AA24
GND_126 AA25
GND_127 AA34
GND_128 AB12
GND_129 AB14
GND_130 AB16
GND_131 AB18
GND_132 AB20
GND_133 AB22
GND_134 AB24
GND_135 AC9
GND_136 AD2
GND_137 AD5
GND_138 AD11
GND_139 AD13
GND_140 AD15
GND_141 AD17
GND_142 AD21
GND_143 AD23
GND_144 AD25
GND_145 AD31
GND_146 AD34
GND_147 AE11
GND_148 AE12
GND_149 AE13
GND_150 AE14
GND_151 AE15
GND_152 AE16
GND_153 AE17
GND_154 AE18
GND_155 AE19
GND_156 AE20
GND_157 AE21
GND_158 AE22
GND_159 AE23
GND_160 AE24
GND_161 AE25
GND_162 AG2
GND_163 AG5
GND_164 AG31
GND_165 AG34
GND_166 AK2
GND_167 AK5
GND_168 AK14
GND_169 AK31
GND_170 AK34
GND_171 AL6
GND_172 AL9
GND_173 AL12
GND_174 AL15
GND_175 AL18
GND_176 AL21
GND_177 AL24
GND_178 AL27
GND_179 AL30
GND_180 AN2
GND_91
V2
GND_92
V5
GND_93
V9
GND_94
V12
GND_95
V14
GND_96
V16
GND_101 V31
GND_181 AN34
GND_182 AP3
GND_183 AP6
GND_184 AP9
GND_185 AP12
GND_186 AP15
GND_187 AP18
GND_188 AP21
GND_189 AP24
GND_190 AP27
GND_191 AP30
GND_192 AP33
GND_97 V18
GND_98 V20
GND_99 V22
GND_100 V24
C1724
4.7U_0603_6.3V6K~D
C1724
4.7U_0603_6.3V6K~D
1
2
R641
20K_0402_5%~D
R641
20K_0402_5%~D
12
Q197B
DMN66D0LDW-7_SOT363-6~D
Q197B
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q59
SI4164DY-T1-GE3_SO8~D
Q59
SI4164DY-T1-GE3_SO8~D
36
5
7
8
2
4
1
C1743
1000P_0402_50V7K~D
C1743
1000P_0402_50V7K~D
C1732
0.022U_0402_25V7K~D
C1732
0.022U_0402_25V7K~D
1
2
C1740
1000P_0402_50V7K~D
C1740
1000P_0402_50V7K~D
C714
10U_0805_10V4Z~D
C714
10U_0805_10V4Z~D
1
2
C1729
0.047U_0402_10V7K~D
C1729
0.047U_0402_10V7K~D
1
2
G
D
S
Q198
SSM3K7002FU_SC70-3~D
G
D
S
Q198
SSM3K7002FU_SC70-3~D
2
13
C1742
1000P_0402_50V7K~D
C1742
1000P_0402_50V7K~D
C1725
1U_0402_6.3V6K~D
C1725
1U_0402_6.3V6K~D
1
2
C1733
0.022U_0402_25V7K~D
C1733
0.022U_0402_25V7K~D
1
2
C716
2200P_0402_50V7K~D
C716
2200P_0402_50V7K~D
1
2
C1741
1000P_0402_50V7K~D
C1741
1000P_0402_50V7K~D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+IFPEF_PLLVDD
+IFPEF_IOVDD
+PEX_PLLVDD
+IFPAB_PLLVDD
+IFPAB_IOVDD
+IFPCD_PLLVDD
+IFPCD_PLLVDD
+IFPCD_IOVDD
+IFPCD_IOVDD
+IFPEF_IOVDD
+IFPCD_PLLVDD
+IFPCD_IOVDD
+IFPEF_PLLVDD
+IFPEF_IOVDD
+3.3V_RUN
+1.05V_RUN_VTT_GFX
+1.05V_RUN_VTT_GFX
+3.3V_RUN
+3.3V_RUN
+1.05V_RUN_VTT_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.05V_RUN_VTT_GFX
+3.3V_RUN
+1.05V_RUN_VTT_GFX
+3.3V_RUN
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P Power
56 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P Power
56 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P Power
56 69Thursday, January 21, 2010
Compal Electronics, Inc.
Close to Pin
Close to Pin
20 MIL
Close to Pin
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2000mA
2000mA
120mA
285mA
220R 100MHZ
220mA
220R 100MHZ
285mA
220mA
220R 100MHZ
Close to Pin Close to Pin
Close to U106
Close to U106
R1430 1K_0402_1%~DR1430 1K_0402_1%~D
1 2
R1431 1K_0402_1%~DR1431 1K_0402_1%~D
1 2
C1114
22U_0805_6.3V6M~D
C1114
22U_0805_6.3V6M~D
1
2
C1784
0.1U_0402_10V7K~D
C1784
0.1U_0402_10V7K~D
1
2
C1756
0.1U_0402_10V7K~D
C1756
0.1U_0402_10V7K~D
1
2
C1579
1U_0402_6.3V6K~D
C1579
1U_0402_6.3V6K~D
1
2
R1428 10K_0402_1%~DR1428 10K_0402_1%~D
1 2
C1775
0.1U_0402_10V7K~D
C1775
0.1U_0402_10V7K~D
1
2
C1863
0.1U_0402_10V7K~D
C1863
0.1U_0402_10V7K~D
1
2
R1429 1K_0402_1%~DR1429 1K_0402_1%~D
1 2
C1512
0.1U_0402_10V7K~D
@C1512
0.1U_0402_10V7K~D
@
1
2
C1762
0.01U_0402_25V7K~D
C1762
0.01U_0402_25V7K~D
1
2
C1765
0.1U_0402_10V7K~D
C1765
0.1U_0402_10V7K~D
1
2
C1786
0.1U_0402_10V7K~D
C1786
0.1U_0402_10V7K~D
1
2
C1574
1U_0402_6.3V6K~D
C1574
1U_0402_6.3V6K~D
1
2
C1791
0.1U_0402_10V7K~D
C1791
0.1U_0402_10V7K~D
1
2
C1577
1U_0402_6.3V6K~D
C1577
1U_0402_6.3V6K~D
1
2
C1766
0.047U_0402_10V7K~D
C1766
0.047U_0402_10V7K~D
1
2
C1773
0.1U_0402_10V7K~D
C1773
0.1U_0402_10V7K~D
1
2
C1780
0.1U_0402_10V7K~D
C1780
0.1U_0402_10V7K~D
1
2
C1865
0.1U_0402_10V7K~D
C1865
0.1U_0402_10V7K~D
1
2
C1768
4.7U_0603_6.3V6K~D
C1768
4.7U_0603_6.3V6K~D
1
2
C1777
4.7U_0603_6.3V6K~D
C1777
4.7U_0603_6.3V6K~D
1
2
C1748
0.01U_0402_25V7K~D
C1748
0.01U_0402_25V7K~D
1
2
C1747
4.7U_0603_6.3V6K~D
C1747
4.7U_0603_6.3V6K~D
1
2
C1594
4.7U_0603_6.3V6K~D
C1594
4.7U_0603_6.3V6K~D
1
2
C1591
4.7U_0603_6.3V6K~D
C1591
4.7U_0603_6.3V6K~D
1
2
L79
10NH_LQW18AN10NJ00D_5%~D
L79
10NH_LQW18AN10NJ00D_5%~D
12
C1761
10U_0805_6.3V6M~D
C1761
10U_0805_6.3V6M~D
1
2
Part 5 of 7
POWER
U106E
N10P-GLM-A3_BGA969~D
Part 5 of 7
POWER
U106E
N10P-GLM-A3_BGA969~D
PEX_IOVDDQ_0 AG11
PEX_IOVDDQ_1 AG12
PEX_IOVDDQ_2 AG13
PEX_IOVDDQ_3 AG15
PEX_IOVDDQ_4 AG16
PEX_IOVDDQ_5 AG17
PEX_IOVDDQ_6 AG18
PEX_IOVDDQ_7 AG22
PEX_IOVDDQ_8 AG23
PEX_IOVDDQ_9 AG24
PEX_IOVDDQ_10 AG25
PEX_IOVDDQ_11 AG26
PEX_IOVDDQ_12 AJ14
PEX_IOVDDQ_13 AJ15
PEX_IOVDDQ_14 AJ19
PEX_IOVDDQ_15 AJ21
PEX_IOVDDQ_16 AJ22
PEX_IOVDDQ_17 AJ24
PEX_IOVDDQ_18 AJ25
PEX_IOVDDQ_19 AJ27
PEX_IOVDDQ_20 AK18
PEX_IOVDDQ_21 AK20
PEX_IOVDDQ_22 AK23
PEX_IOVDDQ_23 AK26
PEX_IOVDDQ_24 AL16
IFPA_IOVDD
AG9
IFPB_IOVDD
AG10
IFPC_IOVDD
AJ8
IFPD_IOVDD
AK8
IFPE_IOVDD
AE7
IFPF_IOVDD
AD7
IFPAB_PLLVDD
AK9
IFPC_PLLVDD
AJ9
IFPEF_PLLVDD
AJ6
IFPD_PLLVDD
AC6
FBVDDQ_0
J23
FBVDDQ_1
J24
FBVDDQ_2
J29
FBVDDQ_3
AA27
FBVDDQ_4
AA29
FBVDDQ_5
AA31
FBVDDQ_6
AB27
FBVDDQ_7
AB29
FBVDDQ_8
AC27
FBVDDQ_9
AD27
FBVDDQ_10
AE27
FBVDDQ_11
AJ28
FBVDDQ_12
B18
FBVDDQ_13
E21
FBVDDQ_14
G17
FBVDDQ_15
G18
FBVDDQ_16
G22
FBVDDQ_17
G8
FBVDDQ_18
G9
FBVDDQ_19
H29
FBVDDQ_20
J14
FBVDDQ_21
J15
FBVDDQ_22
J16
FBVDDQ_23
J17
FBVDDQ_24
J20
FBVDDQ_25
J21
FBVDDQ_26
J22
FBVDDQ_27
N27
FBVDDQ_28
P27 PEX_IOVDD_0 AK16
PEX_IOVDD_1 AK17
PEX_IOVDD_2 AK21
PEX_IOVDD_3 AK24
PEX_IOVDD_4 AK27
FBVDDQ_29
R27
FBVDDQ_30
T27
FBVDDQ_31
U27
FBVDDQ_32
U29
FBVDDQ_33
V27
FBVDDQ_34
V29
FBVDDQ_35
V34
FBVDDQ_36
W27
FBVDDQ_37
Y27
PEX_SVDD_3V3_0 AG19
PEX_SVDD_3V3_1 F7
VDD33_0 J10
VDD33_1 J11
VDD33_2 J12
VDD33_3 J13
VDD33_4 J9
PEX_PLLVDD AG14
MIOA_VDDQ_0 P9
MIOA_VDDQ_1 R9
MIOA_VDDQ_2 T9
MIOA_VDDQ_3 U9
MIOB_VDDQ_0 AA9
MIOB_VDDQ_1 AB9
MIOB_VDDQ_2 W9
MIOB_VDDQ_3 Y9
IFPAB_RSET
AJ11
IFPC_RSET
AK7
IFPD_RSET
AB6
IFPEF_RSET
AL1
C1866
0.1U_0402_10V7K~D
C1866
0.1U_0402_10V7K~D
1
2
C1778
0.1U_0402_10V7K~D
C1778
0.1U_0402_10V7K~D
1
2
C1746
0.01U_0402_25V7K~D
C1746
0.01U_0402_25V7K~D
1
2
L88 BLM18PG221SN1D_2P~DL88 BLM18PG221SN1D_2P~D
12
C1754
4.7U_0603_6.3V6K~D
C1754
4.7U_0603_6.3V6K~D
1
2
C1764
0.1U_0402_10V7K~D
C1764
0.1U_0402_10V7K~D
1
2
C1760
4.7U_0603_6.3V6K~D
C1760
4.7U_0603_6.3V6K~D
1
2
C1752
1U_0402_6.3V6K~D
C1752
1U_0402_6.3V6K~D
1
2
C1745
0.01U_0402_25V7K~D
C1745
0.01U_0402_25V7K~D
1
2
C1767
0.047U_0402_10V7K~D
C1767
0.047U_0402_10V7K~D
1
2
C1770
1U_0402_6.3V6K~D
C1770
1U_0402_6.3V6K~D
1
2
C1575
4.7U_0603_6.3V6K~D
C1575
4.7U_0603_6.3V6K~D
1
2
C1781
0.1U_0402_10V7K~D
C1781
0.1U_0402_10V7K~D
1
2
C1511
0.1U_0402_10V7K~D
@C1511
0.1U_0402_10V7K~D
@
1
2
L87 BLM18PG221SN1D_2P~DL87 BLM18PG221SN1D_2P~D
12
C1763
0.1U_0402_10V7K~D
C1763
0.1U_0402_10V7K~D
1
2
C1592
4.7U_0603_6.3V6K~D
C1592
4.7U_0603_6.3V6K~D
1
2
C1590
1U_0402_6.3V6K~D
C1590
1U_0402_6.3V6K~D
1
2
C1113
22U_0805_6.3V6M~D
C1113
22U_0805_6.3V6M~D
1
2
C1595
4.7U_0603_6.3V6K~D
C1595
4.7U_0603_6.3V6K~D
1
2
C1583
0.1U_0402_10V7K~D
C1583
0.1U_0402_10V7K~D
1
2
C1758
1U_0402_6.3V6K~D
C1758
1U_0402_6.3V6K~D
1
2
C1514
4.7U_0603_6.3V6K~D
C1514
4.7U_0603_6.3V6K~D
1
2
C1753
1U_0402_6.3V6K~D
C1753
1U_0402_6.3V6K~D
1
2
C1751
0.1U_0402_10V7K~D
C1751
0.1U_0402_10V7K~D
1
2
L84 BLM18PG221SN1D_2P~DL84 BLM18PG221SN1D_2P~D
12
C1783
0.1U_0402_10V7K~D
C1783
0.1U_0402_10V7K~D
1
2
C1787
0.1U_0402_10V7K~D
C1787
0.1U_0402_10V7K~D
1
2
C1779
0.1U_0402_10V7K~D
C1779
0.1U_0402_10V7K~D
1
2
C1774
0.1U_0402_10V7K~D
C1774
0.1U_0402_10V7K~D
1
2
C1576
4.7U_0603_6.3V6K~D
C1576
4.7U_0603_6.3V6K~D
1
2
C1513
4.7U_0603_6.3V6K~D
C1513
4.7U_0603_6.3V6K~D
1
2
C1870
0.1U_0402_10V7K~D
C1870
0.1U_0402_10V7K~D
1
2
C1593
1U_0402_6.3V6K~D
C1593
1U_0402_6.3V6K~D
1
2
C1757
0.1U_0402_10V7K~D
C1757
0.1U_0402_10V7K~D
1
2
R1456 10K_0402_1%~DR1456 10K_0402_1%~D
1 2
C1871
0.1U_0402_10V7K~D
C1871
0.1U_0402_10V7K~D
1
2
C1600
4.7U_0603_6.3V6K~D
C1600
4.7U_0603_6.3V6K~D
1
2
C1785
0.1U_0402_10V7K~D
C1785
0.1U_0402_10V7K~D
1
2
C1759
1U_0402_6.3V6K~D
C1759
1U_0402_6.3V6K~D
1
2
L83 BLM18PG221SN1D_2P~DL83 BLM18PG221SN1D_2P~D
12
C1776
1U_0402_6.3V6K~D
C1776
1U_0402_6.3V6K~D
1
2
C1749
0.047U_0402_10V7K~D
C1749
0.047U_0402_10V7K~D
1
2
C1755
10U_0805_6.3V6M~D
C1755
10U_0805_6.3V6M~D
1
2
C1750
0.1U_0402_10V7K~D
C1750
0.1U_0402_10V7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+FB_VREF
+FB_AVDD
FBA_CMD[0..30]
DQSA_RN[0..7]
DQSA_WP[0..7]
DQMA#[0..7]
FBAD[0..63]
FBAD22
FBAD21
FBAD20
FBAD6
FBAD7
FBAD9
FBAD8
FBAD12
FBAD4
FBAD14
FBAD13
FBAD15
FBAD11
FBAD10
FBAD5
FBAD29
FBAD28
FBAD17
FBAD25
FBAD16
FBAD36
FBAD24
FBAD27
FBAD31
FBAD23
FBAD19
FBAD30
FBAD18
FBAD26
FBAD52
FBAD38
FBAD39
FBAD43
FBAD35
FBAD46
FBAD37
FBAD42
FBAD34
FBAD45
FBAD41
FBAD33
FBAD40
FBAD44
FBAD32
FBAD63
FBAD53
FBAD59
FBAD62
FBAD58
FBAD49
FBAD61
FBAD57
FBAD51
FBAD60
FBAD56
FBAD54
FBAD50
FBAD48
FBAD55
FBAD0
FBAD2
FBAD1
FBAD3
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD0
FBA_CMD29
FBA_CMD30
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
DQMA#1
DQMA#4
DQMA#2
DQMA#0
DQMA#5
DQMA#6
DQMA#7
DQMA#3
DQSA_RN6
DQSA_RN5
DQSA_RN2
DQSA_RN4
DQSA_RN3
DQSA_RN1
DQSA_RN0
DQSA_RN7
DQSA_WP0
DQSA_WP5
DQSA_WP4
DQSA_WP1
DQSA_WP3
DQSA_WP6
DQSA_WP7
DQSA_WP2
CLKA1
CLKA1#
CLKA0
CLKA0#
+FB_AVDD
+FB_VREF
FBAD47
FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD7
FBCD6
FBCD9
FBCD8
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD17
FBCD16
FBCD19
FBCD18
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD27
FBCD26
FBCD29
FBCD28
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD37
FBCD36
FBCD39
FBCD38
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD47
FBCD46
FBCD49
FBCD48
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD57
FBCD56
FBCD59
FBCD58
FBCD61
FBCD60
FBCD63
FBCD62
DQSC_RN[0..7]
DQSC_WP[0..7]
FBC_CMD[0..30]
DQMC#[0..7]
FBCD[0..63]
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD29
FBC_CMD30
DQMC#1
DQMC#5
DQMC#3
DQMC#4
DQMC#2
DQMC#0
DQMC#6
DQMC#7
DQSC_RN0
DQSC_RN6
DQSC_RN5
DQSC_RN2
DQSC_RN4
DQSC_RN3
DQSC_RN1
DQSC_RN7
DQSC_WP0
DQSC_WP4
DQSC_WP6
DQSC_WP5
DQSC_WP1
DQSC_WP3
DQSC_WP7
DQSC_WP2
CLKC0
CLKC0#
CLKC1
CLKC1#
FBA_CMD27
FBA_CMD0
FBA_CMD28
FBA_CMD16
FBA_CMD25
FBC_CMD27
FBC_CMD0
FBC_CMD28
FBC_CMD16
FBC_CMD25
+1.5V_MEM_GFX
+1.05V_RUN_VTT_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
FBAD[0..63] 58,59
DQMA#[0..7] 58,59
DQSA_WP[0..7] 58,59
DQSA_RN[0..7] 58,59
FBA_CMD[0..30] 58,59
CLKA0 58
CLKA0# 58
CLKA1 59
CLKA1# 59
FBCD[0..63] 60,61
DQMC#[0..7] 60,61
DQSC_WP[0..7] 60,61
DQSC_RN[0..7] 60,61
FBC_CMD[0..30] 60,61
CLKC0 60
CLKC0# 60
CLKC1 61
CLKC1# 61
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P Memory
57 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P Memory
57 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
N10P Memory
57 69Thursday, January 21, 2010
Compal Electronics, Inc.
20 mil
12mil
A11
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
A7
A5
WE#
A2
A10
BA1
A5
CS1#_H
RAS#
A6
A0
A9
A8
BA1
BA2
A7
A13
A10
A11
CMD30
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
BA2
A13
CAS#
CMD15
A4
DATA Bus
Address
A3
A15
32..63
A3
A0
A2
0..31
A1
CS0#_L
WE#
BA0
A8
CMD0 CKE_L
A6
CMD1
ODT_L
CMD2
CMD3
A12
A1
A9
CMD4
CMD5
CMD6
CMD7
A4
CAS#CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CS0#_H
BA0
CKE_H
ODT_H
A14
RST
CS1#_L
RAS#
GPU CMD - Mirror Mode Mapping
A14
A15
RST
A12
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
L94 BLM18PG221SN1D_2P~DL94 BLM18PG221SN1D_2P~D
12
R1382
10K_0402_5%~D
R1382
10K_0402_5%~D
12
R1377
1.1K_0402_1%~D
@
R1377
1.1K_0402_1%~D
@
12
R1376
1.1K_0402_1%~D
@
R1376
1.1K_0402_1%~D
@
12
MEMORY INTERFACE
A
Part 2 of 7
U106B
N10P-GLM-A3_BGA969~D
MEMORY INTERFACE
A
Part 2 of 7
U106B
N10P-GLM-A3_BGA969~D
FBA_D0
L32
FBA_D1
N33
FBA_D2
L33
FBA_D3
N34
FBA_D4
N35
FBA_D5
P35
FBA_D6
P33
FBA_D7
P34
FBA_D8
K35
FBA_D9
K33
FBA_D10
K34
FBA_D11
H33
FBA_D12
G34
FBA_D13
G33
FBA_D14
E34
FBA_D15
E33
FBA_D16
G31
FBA_D17
F30
FBA_D18
G30
FBA_D19
G32
FBA_D20
K30
FBA_D21
K32
FBA_D22
H30
FBA_D23
K31
FBA_D24
L31
FBA_D25
L30
FBA_D26
M32
FBA_D27
N30
FBA_D28
M30
FBA_D29
P31
FBA_D30
R32
FBA_D31
R30
FBA_D32
AG30
FBA_D33
AG32
FBA_D34
AH31
FBA_D35
AF31
FBA_D36
AF30
FBA_D37
AE30
FBA_D38
AC32
FBA_D39
AD30
FBA_D40
AN33
FBA_D41
AL31
FBA_D42
AM33
FBA_D43
AL33
FBA_D44
AK30
FBA_D45
AK32
FBA_D46
AJ30
FBA_D47
AH30
FBA_D48
AH33
FBA_D49
AH35
FBA_D50
AH34
FBA_D51
AH32
FBA_D52
AJ33
FBA_D53
AL35
FBA_D54
AM34
FBA_D55
AM35
FBA_D56
AF33
FBA_D57
AE32
FBA_D58
AF34
FBA_D59
AE35
FBA_D60
AE34
FBA_D61
AE33
FBA_D62
AB32
FBA_D63
AC35
FBA_CMD0 V32
FBA_CMD1 W31
FBA_CMD2 U31
FBA_CMD3 Y32
FBA_CMD4 AB35
FBA_CMD5 AB34
FBA_CMD6 W35
FBA_CMD7 W33
FBA_CMD8 W30
FBA_CMD9 T34
FBA_CMD10 T35
FBA_CMD11 AB31
FBA_CMD12 Y30
FBA_CMD13 Y34
FBA_CMD14 W32
FBA_CMD15 AA30
FBA_CMD16 AA32
FBA_CMD17 Y33
FBA_CMD18 U32
FBA_CMD19 Y31
FBA_CMD20 U34
FBA_CMD21 Y35
FBA_CMD22 W34
FBA_CMD23 V30
FBA_CMD24 U35
FBA_CMD25 U30
FBA_CMD26 U33
FBA_DQM0 P32
FBA_DQM1 H34
FBA_DQM2 J30
FBA_DQM3 P30
FBA_DQM4 AF32
FBA_DQM5 AL32
FBA_DQM6 AL34
FBA_DQM7 AF35
FBA_DQS_RN0 L35
FBA_DQS_RN1 G35
FBA_DQS_RN2 H31
FBA_DQS_RN3 N32
FBA_DQS_RN4 AD32
FBA_DQS_RN5 AJ31
FBA_DQS_RN6 AJ35
FBA_DQS_RN7 AC34
FBA_DQS_WP0 L34
FBA_DQS_WP1 H35
FBA_DQS_WP2 J32
FBA_DQS_WP3 N31
FBA_DQS_WP4 AE31
FBA_DQS_WP5 AJ32
FBA_DQS_WP6 AJ34
FBA_DQS_WP7 AC33
FBA_CLK0 T32
FBA_CLK0_N T31
FBA_CLK1 AC31
FBA_CLK1_N AC30
FBA_CMD27 AB30
FBA_CMD28 AB33
FBA_CMD29 T33
FBA_CMD30 W29
FB_DLLAVDD
AG27
FB_PLLAVDD
AF27
FB_VREF
J27
FBA_DEBUG
T30
R1378 10K_0402_5%~DR1378 10K_0402_5%~D
12
MEMORY INTERFACE C
Part 3 of 7
U106C
N10P-GLM-A3_BGA969~D
MEMORY INTERFACE C
Part 3 of 7
U106C
N10P-GLM-A3_BGA969~D
FBC_D0
B13
FBC_D1
D13
FBC_D2
A13
FBC_D3
A14
FBC_D4
C16
FBC_D5
B16
FBC_D6
A17
FBC_D7
D16
FBC_D8
C13
FBC_D9
B11
FBC_D10
C11
FBC_D11
A11
FBC_D12
C10
FBC_D13
C8
FBC_D14
B8
FBC_D15
A8
FBC_D16
E8
FBC_D17
F8
FBC_D18
F10
FBC_D19
F9
FBC_D20
F12
FBC_D21
D8
FBC_D22
D11
FBC_D23
E11
FBC_D24
D12
FBC_D25
E13
FBC_D26
F13
FBC_D27
F14
FBC_D28
F15
FBC_D29
E16
FBC_D30
F16
FBC_D31
F17
FBC_D32
D29
FBC_D33
F27
FBC_D34
F28
FBC_D35
E28
FBC_D36
D26
FBC_D37
F25
FBC_D38
D24
FBC_D39
E25
FBC_D40
E32
FBC_D41
F32
FBC_D42
D33
FBC_D43
E31
FBC_D44
C33
FBC_D45
F29
FBC_D46
D30
FBC_D47
E29
FBC_D48
B29
FBC_D49
C31
FBC_D50
C29
FBC_D51
B31
FBC_D52
C32
FBC_D53
B32
FBC_D54
B35
FBC_D55
B34
FBC_D56
A29
FBC_D57
B28
FBC_D58
A28
FBC_D59
C28
FBC_D60
C26
FBC_D61
D25
FBC_D62
B25
FBC_D63
A25
FBC_CMD0 C17
FBC_CMD1 B19
FBC_CMD2 D18
FBC_CMD3 F21
FBC_CMD4 A23
FBC_CMD5 D21
FBC_CMD6 B23
FBC_CMD7 E20
FBC_CMD8 G21
FBC_CMD9 F20
FBC_CMD10 F19
FBC_CMD11 F23
FBC_CMD12 A22
FBC_CMD13 C22
FBC_CMD14 B17
FBC_CMD15 F24
FBC_CMD16 C25
FBC_CMD17 E22
FBC_CMD18 C20
FBC_CMD19 B22
FBC_CMD20 A19
FBC_CMD21 D22
FBC_CMD22 D20
FBC_CMD23 E19
FBC_CMD24 D19
FBC_CMD25 F18
FBC_CMD26 C19
FBC_DQM0 A16
FBC_DQM1 D10
FBC_DQM2 F11
FBC_DQM3 D15
FBC_DQM4 D27
FBC_DQM5 D34
FBC_DQM6 A34
FBC_DQM7 D28
FBC_DQS_RN0 B14
FBC_DQS_RN1 B10
FBC_DQS_RN2 D9
FBC_DQS_RN3 E14
FBC_DQS_RN4 F26
FBC_DQS_RN5 D31
FBC_DQS_RN6 A31
FBC_DQS_RN7 A26
FBC_DQS_WP0 C14
FBC_DQS_WP1 A10
FBC_DQS_WP2 E10
FBC_DQS_WP3 D14
FBC_DQS_WP4 E26
FBC_DQS_WP5 D32
FBC_DQS_WP6 A32
FBC_DQS_WP7 B26
FBC_CLK0 E17
FBC_CLK0_N D17
FBC_CLK1 D23
FBC_CLK1_N E23
FBC_CMD27 F22
FBC_CMD28 C23
FBC_CMD29 B20
FBC_CMD30 A20
FBCAL_PU_GND
L27
FBCAL_TERM_GND
M27
FBCAL_PD_VDDQ
K27
FBC_DEBUG G19
R1383
10K_0402_5%~D
1@ R1383
10K_0402_5%~D
1@
12
T152T152
T151T151
R1387
10K_0402_5%~D
R1387
10K_0402_5%~D
12
C1788
4.7U_0603_6.3V6K~D
C1788
4.7U_0603_6.3V6K~D
1
2
R1391
10K_0402_5%~D
1@ R1391
10K_0402_5%~D
1@
12
R1385
10K_0402_5%~D
1@ R1385
10K_0402_5%~D
1@
12
C1790
1U_0402_6.3V6K~D
C1790
1U_0402_6.3V6K~D
1
2
R1381
10K_0402_5%~D
1@ R1381
10K_0402_5%~D
1@
12
R1432 40.2_0402_1%~DR1432 40.2_0402_1%~D
1 2
R1435 10K_0402_5%~DR1435 10K_0402_5%~D
1 2
R1433 40.2_0402_1%~DR1433 40.2_0402_1%~D
1 2
R1436 40.2_0402_1%~D1@ R1436 40.2_0402_1%~D1@
1 2
R1388
10K_0402_5%~D
1@ R1388
10K_0402_5%~D
1@
12
R1384
10K_0402_5%~D
R1384
10K_0402_5%~D
12
C1502
0.01U_0402_25V7K~D
@
C1502
0.01U_0402_25V7K~D
@
1
2
R1386
10K_0402_5%~D
R1386
10K_0402_5%~D
12
R1380
10K_0402_5%~D
R1380
10K_0402_5%~D
12
T161T161
R1434 60.4_0402_1%~D2@ R1434 60.4_0402_1%~D2@
1 2
T162T162
T160T160
T153T153
C1789
4.7U_0603_6.3V6K~D
C1789
4.7U_0603_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLKA0#
CLKA0
CLKA0#
CLKA0
FBA_CMD28
+FBA_VREF0 +FBA_VREF0
CLKA0#
CLKA0
+FBA_VREF0
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD25
FBA_CMD26
FBA_CMD28
FBA_CMD30
FBA_CMD1
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD0 FBA_CMD0
FBA_CMD1
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD25
FBA_CMD26
FBA_CMD30
FBA_CMD[0..30]
FBAD21
FBAD20
FBAD22
FBAD6
FBAD7
FBAD11
FBAD8
FBAD14
FBAD4
FBAD12
FBAD13
FBAD15
FBAD9
FBAD10
FBAD5 FBAD28
FBAD31
FBAD17
FBAD26
FBAD16
FBAD27
FBAD25
FBAD24
FBAD23
FBAD19
FBAD30
FBAD18
FBAD29
FBAD0
FBAD2
FBAD1
FBAD3
FBAD[0..63]
DQMA#1DQMA#2
DQMA#0 DQMA#3
DQMA#[0..7]
DQSA_RN2
DQSA_RN3
DQSA_RN1
DQSA_RN0
DQSA_WP0
DQSA_WP1
DQSA_WP3
DQSA_WP2
DQSA_RN[0..7]
DQSA_WP[0..7]
FBA_CMD24 FBA_CMD24
FBA_CMD2FBA_CMD2
+1.5V_MEM_GFX
+1.5V_MEM_GFX +1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
FBA_CMD[0..30] 57,59
FBAD[0..63] 57,59
DQMA#[0..7] 57,59
DQSA_WP[0..7] 57,59
DQSA_RN[0..7] 57,59
CLKA057
CLKA0#57
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM A Lower
58 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM A Lower
58 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM A Lower
58 69Thursday, January 21, 2010
Compal Electronics, Inc.
Group2
Group0 Group3
Group1
Memory Partition A - Lower 32 bits
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C1800
1U_0402_6.3V6K~D
C1800
1U_0402_6.3V6K~D
1
2
R1389
1.1K_0402_1%~D
R1389
1.1K_0402_1%~D
12
R1437
243_0402_1%~D
R1437
243_0402_1%~D
12
C1796
0.1U_0402_10V7K~D
C1796
0.1U_0402_10V7K~D
1
2
C1596
0.01U_0402_25V7K~D
C1596
0.01U_0402_25V7K~D
1
2
R1393
243_0402_1%~D
R1393
243_0402_1%~D
1 2
C1794
0.1U_0402_10V7K~D
C1794
0.1U_0402_10V7K~D
1
2
R1390
1.1K_0402_1%~D
R1390
1.1K_0402_1%~D
12
C1793
1U_0402_6.3V6K~D
C1793
1U_0402_6.3V6K~D
1
2
C1801
0.1U_0402_10V7K~D
C1801
0.1U_0402_10V7K~D
1
2
C1799
1U_0402_6.3V6K~D
C1799
1U_0402_6.3V6K~D
1
2
C1792
1U_0402_6.3V6K~D
C1792
1U_0402_6.3V6K~D
1
2
C1805
0.1U_0402_10V7K~D
C1805
0.1U_0402_10V7K~D
1
2
C1795
0.1U_0402_10V7K~D
C1795
0.1U_0402_10V7K~D
1
2
96-BALL
SDRAM DDR3
U110
H5TQ1G63BFR-12C_FBGA96~D
96-BALL
SDRAM DDR3
U110
H5TQ1G63BFR-12C_FBGA96~D
WE#
L3
CS#
L2
CAS#
K3
RAS#
J3
CKE
K9
CK
J7
CK#
K7
DQSU
B7
BA0
M2
BA1
N8
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
VREFCA
M8
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
VREFDQ
H1
VDDQ E9
ZQ
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VSS G8
VDD G7
ODT
K1
VDD K2
A10/AP
L7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A11
R7
A12/BC#
N7
A13
T3
BA2
M3
NC
T7
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
NC
J1
NC
J9
NC
L1
NC
L9
A15
M7
C1804
0.1U_0402_10V7K~D
C1804
0.1U_0402_10V7K~D
1
2
C1803
0.1U_0402_10V7K~D
C1803
0.1U_0402_10V7K~D
1
2
R1438
243_0402_1%~D
R1438
243_0402_1%~D
12
C1798
0.1U_0402_10V7K~D
C1798
0.1U_0402_10V7K~D
1
2
C1797
0.1U_0402_10V7K~D
C1797
0.1U_0402_10V7K~D
1
2
96-BALL
SDRAM DDR3
U109
H5TQ1G63BFR-12C_FBGA96~D
96-BALL
SDRAM DDR3
U109
H5TQ1G63BFR-12C_FBGA96~D
WE#
L3
CS#
L2
CAS#
K3
RAS#
J3
CKE
K9
CK
J7
CK#
K7
DQSU
B7
BA0
M2
BA1
N8
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
VREFCA
M8
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
VREFDQ
H1
VDDQ E9
ZQ
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VSS G8
VDD G7
ODT
K1
VDD K2
A10/AP
L7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A11
R7
A12/BC#
N7
A13
T3
BA2
M3
NC
T7
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
NC
J1
NC
J9
NC
L1
NC
L9
A15
M7
C1802
0.1U_0402_10V7K~D
C1802
0.1U_0402_10V7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLKA1#
CLKA1
CLKA1#
CLKA1
+FBA_VREF1 +FBA_VREF1
+FBA_VREF1
FBA_CMD1FBA_CMD1
FBA_CMD3 FBA_CMD3
FBA_CMD4FBA_CMD4
FBA_CMD5 FBA_CMD5
FBA_CMD6 FBA_CMD6
FBA_CMD7 FBA_CMD7
FBA_CMD8 FBA_CMD8
FBA_CMD9 FBA_CMD9
FBA_CMD10 FBA_CMD10
FBA_CMD12 FBA_CMD12
FBA_CMD13 FBA_CMD13
FBA_CMD14 FBA_CMD14
FBA_CMD16 FBA_CMD16
FBA_CMD17 FBA_CMD17
FBA_CMD19 FBA_CMD19
FBA_CMD20 FBA_CMD20
FBA_CMD21 FBA_CMD21
FBA_CMD22 FBA_CMD22
FBA_CMD26 FBA_CMD26
FBA_CMD27 FBA_CMD27
FBA_CMD28 FBA_CMD28
FBA_CMD29 FBA_CMD29
FBA_CMD30 FBA_CMD30
FBA_CMD[0..30]
FBAD[0..63]
FBAD36
FBAD52
FBAD38
FBAD39
FBAD43
FBAD35
FBAD46
FBAD37
FBAD42
FBAD34
FBAD45
FBAD41
FBAD33
FBAD40
FBAD44
FBAD32
FBAD63
FBAD53
FBAD59
FBAD62
FBAD58
FBAD49
FBAD61
FBAD57
FBAD51
FBAD60
FBAD56
FBAD54
FBAD50
FBAD48
FBAD55FBAD47
DQMA#4
DQMA#5 DQMA#6
DQMA#7
DQMA#[0..7]
DQSA_RN6DQSA_RN5
DQSA_RN4 DQSA_RN7
DQSA_WP5
DQSA_WP4
DQSA_WP6
DQSA_WP7
DQSA_RN[0..7]
DQSA_WP[0..7]
CLKA1#
CLKA1
FBA_CMD11 FBA_CMD11
FBA_CMD24 FBA_CMD24
+1.5V_MEM_GFX +1.5V_MEM_GFX
+1.5V_MEM_GFX +1.5V_MEM_GFX
+1.5V_MEM_GFX
FBA_CMD[0..30] 57,58
FBAD[0..63] 57,58
DQMA#[0..7] 57,58
DQSA_WP[0..7] 57,58
DQSA_RN[0..7] 57,58
CLKA157
CLKA1#57
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM A Upper
59 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM A Upper
59 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM A Upper
59 69Thursday, January 21, 2010
Compal Electronics, Inc.
Group4
Group5
Group7
Group6
Memory Partition A - Upper 32 bits
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
R1440
243_0402_1%~D
R1440
243_0402_1%~D
12
R1395
1.1K_0402_1%~D
R1395
1.1K_0402_1%~D
12
R1399
243_0402_1%~D
R1399
243_0402_1%~D
1 2
C1809
0.1U_0402_10V7K~D
C1809
0.1U_0402_10V7K~D
1
2
C1816
0.1U_0402_10V7K~D
C1816
0.1U_0402_10V7K~D
1
2
C1813
1U_0402_6.3V6K~D
C1813
1U_0402_6.3V6K~D
1
2
R1396
1.1K_0402_1%~D
R1396
1.1K_0402_1%~D
12
C1814
1U_0402_6.3V6K~D
C1814
1U_0402_6.3V6K~D
1
2
C1815
0.1U_0402_10V7K~D
C1815
0.1U_0402_10V7K~D
1
2
R1439
243_0402_1%~D
R1439
243_0402_1%~D
12
96-BALL
SDRAM DDR3
U112
H5TQ1G63BFR-12C_FBGA96~D
96-BALL
SDRAM DDR3
U112
H5TQ1G63BFR-12C_FBGA96~D
WE#
L3
CS#
L2
CAS#
K3
RAS#
J3
CKE
K9
CK
J7
CK#
K7
DQSU
B7
BA0
M2
BA1
N8
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
VREFCA
M8
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
VREFDQ
H1
VDDQ E9
ZQ
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VSS G8
VDD G7
ODT
K1
VDD K2
A10/AP
L7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A11
R7
A12/BC#
N7
A13
T3
BA2
M3
NC
T7
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
NC
J1
NC
J9
NC
L1
NC
L9
A15
M7
C1812
0.1U_0402_10V7K~D
C1812
0.1U_0402_10V7K~D
1
2
C1631
0.01U_0402_25V7K~D
C1631
0.01U_0402_25V7K~D
1
2
C1818
0.1U_0402_10V7K~D
C1818
0.1U_0402_10V7K~D
1
2
C1817
0.1U_0402_10V7K~D
C1817
0.1U_0402_10V7K~D
1
2
C1810
0.1U_0402_10V7K~D
C1810
0.1U_0402_10V7K~D
1
2
C1806
1U_0402_6.3V6K~D
C1806
1U_0402_6.3V6K~D
1
2
96-BALL
SDRAM DDR3
U111
H5TQ1G63BFR-12C_FBGA96~D
96-BALL
SDRAM DDR3
U111
H5TQ1G63BFR-12C_FBGA96~D
WE#
L3
CS#
L2
CAS#
K3
RAS#
J3
CKE
K9
CK
J7
CK#
K7
DQSU
B7
BA0
M2
BA1
N8
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
VREFCA
M8
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
VREFDQ
H1
VDDQ E9
ZQ
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VSS G8
VDD G7
ODT
K1
VDD K2
A10/AP
L7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A11
R7
A12/BC#
N7
A13
T3
BA2
M3
NC
T7
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
NC
J1
NC
J9
NC
L1
NC
L9
A15
M7
C1808
0.1U_0402_10V7K~D
C1808
0.1U_0402_10V7K~D
1
2
C1819
0.1U_0402_10V7K~D
C1819
0.1U_0402_10V7K~D
1
2
C1807
1U_0402_6.3V6K~D
C1807
1U_0402_6.3V6K~D
1
2
C1811
0.1U_0402_10V7K~D
C1811
0.1U_0402_10V7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLKC0#
FBC_CMD28
CLKC0
+FBB_VREF0
FBC_CMD28
+FBB_VREF0
+FBB_VREF0
CLKC0#
CLKC0
FBC_CMD17
FBC_CMD22
FBC_CMD21
FBC_CMD20
FBC_CMD19
FBC_CMD18
FBC_CMD26
FBC_CMD25
FBC_CMD4
FBC_CMD3
FBC_CMD1
FBC_CMD0
FBC_CMD10
FBC_CMD9
FBC_CMD8
FBC_CMD7
FBC_CMD6
FBC_CMD5
FBC_CMD14
FBC_CMD13
FBC_CMD12
FBC_CMD30
FBC_CMD0
FBC_CMD1
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD25
FBC_CMD26
FBC_CMD30FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD7
FBCD6
FBCD9
FBCD8
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD17
FBCD23
FBCD19
FBCD18
FBCD20
FBCD21
FBCD22
FBCD16
FBCD24
FBCD25
FBCD27
FBCD26
FBCD29
FBCD28
FBCD30
FBCD31
DQSC_RN[0..7]
DQSC_WP[0..7]
FBC_CMD[0..30]
DQMC#[0..7]
FBCD[0..63]
DQSC_WP0 DQSC_WP1
DQSC_WP3 DQSC_WP2
DQSC_RN0
DQSC_RN2DQSC_RN3
DQSC_RN1
DQMC#1
DQMC#3 DQMC#2
DQMC#0
CLKC0
CLKC0#
FBC_CMD24 FBC_CMD24
FBC_CMD2FBC_CMD2
+1.5V_MEM_GFX
+1.5V_MEM_GFX +1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX +1.5V_MEM_GFX
+1.5V_MEM_GFX
FBCD[0..63] 57,61
DQSC_WP[0..7] 57,61
DQSC_RN[0..7] 57,61
FBC_CMD[0..30] 57,61
DQMC#[0..7] 57,61
CLKC057
CLKC0#57
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM C Lower
60 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM C Lower
60 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM C Lower
60 69Thursday, January 21, 2010
Compal Electronics, Inc.
Group0
Group3 Group2
Group1
Memory Partition C - Lower 32 bits
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C1821
1U_0402_6.3V6K~D
1@
C1821
1U_0402_6.3V6K~D
1@
1
2
R1445
243_0402_1%~D
1@ R1445
243_0402_1%~D
1@
12
C1826
0.1U_0402_10V7K~D
1@
C1826
0.1U_0402_10V7K~D
1@
1
2
C1834
0.1U_0402_10V7K~D
1@C1834
0.1U_0402_10V7K~D
1@
1
2
C1828
1U_0402_6.3V6K~D
1@
C1828
1U_0402_6.3V6K~D
1@
1
2
R1441
1.1K_0402_1%~D
1@ R1441
1.1K_0402_1%~D
1@
12
96-BALL
SDRAM DDR3
U134
H5TQ1G63BFR-12C_FBGA96~D
1@
96-BALL
SDRAM DDR3
U134
H5TQ1G63BFR-12C_FBGA96~D
1@
WE#
L3
CS#
L2
CAS#
K3
RAS#
J3
CKE
K9
CK
J7
CK#
K7
DQSU
B7
BA0
M2
BA1
N8
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
VREFCA
M8
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
VREFDQ
H1
VDDQ E9
ZQ
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VSS G8
VDD G7
ODT
K1
VDD K2
A10/AP
L7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A11
R7
A12/BC#
N7
A13
T3
BA2
M3
NC
T7
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
NC
J1
NC
J9
NC
L1
NC
L9
A15
M7
C1824
0.1U_0402_10V7K~D
1@
C1824
0.1U_0402_10V7K~D
1@
1
2
C1827
0.1U_0402_10V7K~D
1@
C1827
0.1U_0402_10V7K~D
1@
1
2
C1829
1U_0402_6.3V6K~D
1@
C1829
1U_0402_6.3V6K~D
1@
1
2
C1833
0.1U_0402_10V7K~D
1@
C1833
0.1U_0402_10V7K~D
1@
1
2
C1822
1U_0402_6.3V6K~D
1@
C1822
1U_0402_6.3V6K~D
1@
1
2
C1831
0.1U_0402_10V7K~D
1@
C1831
0.1U_0402_10V7K~D
1@
1
2
C1830
0.1U_0402_10V7K~D
1@
C1830
0.1U_0402_10V7K~D
1@
1
2
C1832
0.1U_0402_10V7K~D
1@
C1832
0.1U_0402_10V7K~D
1@
1
2
C1823
0.1U_0402_10V7K~D
1@
C1823
0.1U_0402_10V7K~D
1@
1
2
C1825
0.1U_0402_10V7K~D
1@
C1825
0.1U_0402_10V7K~D
1@
1
2
R1443
243_0402_1%~D
1@ R1443
243_0402_1%~D
1@
1 2
96-BALL
SDRAM DDR3
U135
H5TQ1G63BFR-12C_FBGA96~D
1@
96-BALL
SDRAM DDR3
U135
H5TQ1G63BFR-12C_FBGA96~D
1@
WE#
L3
CS#
L2
CAS#
K3
RAS#
J3
CKE
K9
CK
J7
CK#
K7
DQSU
B7
BA0
M2
BA1
N8
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
VREFCA
M8
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
VREFDQ
H1
VDDQ E9
ZQ
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VSS G8
VDD G7
ODT
K1
VDD K2
A10/AP
L7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A11
R7
A12/BC#
N7
A13
T3
BA2
M3
NC
T7
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
NC
J1
NC
J9
NC
L1
NC
L9
A15
M7
R1446
243_0402_1%~D
1@ R1446
243_0402_1%~D
1@
12
C1820
0.01U_0402_25V7K~D
1@
C1820
0.01U_0402_25V7K~D
1@
1
2
R1442
1.1K_0402_1%~D
1@ R1442
1.1K_0402_1%~D
1@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLKC1#
CLKC1
FBC_CMD28
+FBB_VREF1
FBC_CMD28
+FBB_VREF1
+FBB_VREF1
FBC_CMD1 FBC_CMD1
FBC_CMD3 FBC_CMD3
FBC_CMD4 FBC_CMD4
FBC_CMD5FBC_CMD5
FBC_CMD6FBC_CMD6
FBC_CMD7FBC_CMD7
FBC_CMD8FBC_CMD8
FBC_CMD9FBC_CMD9
FBC_CMD10FBC_CMD10
FBC_CMD12FBC_CMD12
FBC_CMD13 FBC_CMD13
FBC_CMD14FBC_CMD14
FBC_CMD16 FBC_CMD16
FBC_CMD17 FBC_CMD17
FBC_CMD19FBC_CMD19
FBC_CMD20FBC_CMD20
FBC_CMD21FBC_CMD21
FBC_CMD22FBC_CMD22
FBC_CMD26FBC_CMD26
FBC_CMD27FBC_CMD27
FBC_CMD29FBC_CMD29
FBC_CMD30FBC_CMD30
FBCD40
FBCD44
FBCD42
FBCD43
FBCD41
FBCD45
FBCD47
FBCD46
FBCD57
FBCD56
FBCD59
FBCD58
FBCD61
FBCD60
FBCD63
FBCD62
FBCD32
FBCD33
FBCD34
FBCD35
FBCD37
FBCD36
FBCD39
FBCD38
DQSC_RN[0..7]
DQSC_WP[0..7]
FBC_CMD[0..30]
DQMC#[0..7]
FBCD[0..63]
DQSC_WP6
DQSC_WP7
DQSC_RN6
DQSC_RN5
DQSC_RN4
DQSC_RN7
DQMC#5
DQMC#4 DQMC#6
DQMC#7
DQSC_WP4
DQSC_WP5
CLKC1
CLKC1#
CLKC1
CLKC1#
FBC_CMD11FBC_CMD11
FBC_CMD24 FBC_CMD24
FBCD50
FBCD52
FBCD53
FBCD54
FBCD55
FBCD49
FBCD51
FBCD48
+1.5V_MEM_GFX
+1.5V_MEM_GFX +1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX +1.5V_MEM_GFX
+1.5V_MEM_GFX
FBC_CMD[0..30] 57,60
DQMC#[0..7] 57,60
FBCD[0..63] 57,60
DQSC_WP[0..7] 57,60
DQSC_RN[0..7] 57,60
CLKC157
CLKC1#57
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM C Upper
61 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM C Upper
61 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
3.0
VRAM C Upper
61 69Thursday, January 21, 2010
Compal Electronics, Inc.
Group4
Group5
Group6
Memory Partition C - Upper 32 bits
Group7
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
R1449
243_0402_1%~D
1@ R1449
243_0402_1%~D
1@
1 2
R1447
1.1K_0402_1%~D
1@ R1447
1.1K_0402_1%~D
1@
12
C1850
0.1U_0402_10V7K~D
1@
C1850
0.1U_0402_10V7K~D
1@
1
2
C1835
0.01U_0402_25V7K~D
1@
C1835
0.01U_0402_25V7K~D
1@
1
2
C1847
0.1U_0402_10V7K~D
1@
C1847
0.1U_0402_10V7K~D
1@
1
2
R1448
1.1K_0402_1%~D
1@ R1448
1.1K_0402_1%~D
1@
12
C1848
0.1U_0402_10V7K~D
1@
C1848
0.1U_0402_10V7K~D
1@
1
2
C1838
1U_0402_6.3V6K~D
1@
C1838
1U_0402_6.3V6K~D
1@
1
2
C1841
0.1U_0402_10V7K~D
1@
C1841
0.1U_0402_10V7K~D
1@
1
2
C1843
0.1U_0402_10V7K~D
1@
C1843
0.1U_0402_10V7K~D
1@
1
2
C1849
0.1U_0402_10V7K~D
1@
C1849
0.1U_0402_10V7K~D
1@
1
2
C1840
0.1U_0402_10V7K~D
1@
C1840
0.1U_0402_10V7K~D
1@
1
2
C1842
0.1U_0402_10V7K~D
1@
C1842
0.1U_0402_10V7K~D
1@
1
2
C1839
0.1U_0402_10V7K~D
1@
C1839
0.1U_0402_10V7K~D
1@
1
2
R1451
243_0402_1%~D
1@ R1451
243_0402_1%~D
1@
12
C1846
0.1U_0402_10V7K~D
1@
C1846
0.1U_0402_10V7K~D
1@
1
2
C1845
1U_0402_6.3V6K~D
1@
C1845
1U_0402_6.3V6K~D
1@
1
2
C1837
1U_0402_6.3V6K~D
1@
C1837
1U_0402_6.3V6K~D
1@
1
2
C1844
1U_0402_6.3V6K~D
1@
C1844
1U_0402_6.3V6K~D
1@
1
2
96-BALL
SDRAM DDR3
U136
H5TQ1G63BFR-12C_FBGA96~D
1@
96-BALL
SDRAM DDR3
U136
H5TQ1G63BFR-12C_FBGA96~D
1@
WE#
L3
CS#
L2
CAS#
K3
RAS#
J3
CKE
K9
CK
J7
CK#
K7
DQSU
B7
BA0
M2
BA1
N8
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
VREFCA
M8
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
VREFDQ
H1
VDDQ E9
ZQ
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VSS G8
VDD G7
ODT
K1
VDD K2
A10/AP
L7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A11
R7
A12/BC#
N7
A13
T3
BA2
M3
NC
T7
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
NC
J1
NC
J9
NC
L1
NC
L9
A15
M7
R1450
243_0402_1%~D
1@ R1450
243_0402_1%~D
1@
12
96-BALL
SDRAM DDR3
U137
H5TQ1G63BFR-12C_FBGA96~D
1@
96-BALL
SDRAM DDR3
U137
H5TQ1G63BFR-12C_FBGA96~D
1@
WE#
L3
CS#
L2
CAS#
K3
RAS#
J3
CKE
K9
CK
J7
CK#
K7
DQSU
B7
BA0
M2
BA1
N8
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
VREFCA
M8
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
VREFDQ
H1
VDDQ E9
ZQ
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VSS G8
VDD G7
ODT
K1
VDD K2
A10/AP
L7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A11
R7
A12/BC#
N7
A13
T3
BA2
M3
NC
T7
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
NC
J1
NC
J9
NC
L1
NC
L9
A15
M7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LG_VGA2
UG_VGA1
LG_VGA1 LG_VGA1
VGA_B+
PHASE_VGA2
UG_VGA2
LG_VGA2
V5FILT
VREF
V5FILT
VGA_B+
GPUVSS
GPUVDD
TRIPSEL
SN-2
CSN2
CSP2
SN-1
CSN1
CSP1
GPUVSS
VREF
GPU_PWRGD
VREF
TON
TON
VREF
TRIPSEL
CSP2
CSN2
CSN1
CSP1
THAL#
PHASE_VGA1
GPU_VID_5
GPU_VID_6
GPU_VID_0
THAL#
GPUVDD
GPUVSS
+PWR_SRC
+GPU_COREP
+GPU_COREP
+GPU_CORE
GNDA_GPU
+5V_ALW
GNDA_GPU
GNDA_GPU
GNDA_GPU
GNDA_GPU
GNDA_GPU
+1.05V_RUN
GNDA_GPU
GNDA_GPU
+5V_RUN+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN +5V_RUN
GNDA_GPU
GNDA_GPU
+3.3V_RUN
GNDA_GPU
+5V_RUN
GNDA_GPU
+1.05V_RUN
GNDA_GPU
+3.3V_RUN
+5V_RUN
GNDA_GPU
+GPU_COREP
GNDA_GPU
GPU_IMON23
GPU_VID_253
GPU_VID_153
GPU_VID_453
GPU_VID_353
RUN_ON12,34,39,42,47
DGPU_PWR_EN39
DGPU_PWROK 19,39
GPU_VSS_SENSE54
GPU_VDD_SENSE54
Title
Size Document Number Rev
Date: Sheet of
<Doc> 3.0
<Title>
C
62 69Thursday, January 21, 2010
Title
Size Document Number Rev
Date: Sheet of
<Doc> 3.0
<Title>
C
62 69Thursday, January 21, 2010
Title
Size Document Number Rev
Date: Sheet of
<Doc> 3.0
<Title>
C
62 69Thursday, January 21, 2010
?V / ?V
thermal design current 23.19A
peak current 30A
PSI# pull high dual channel
PSI# pull low single channel
GPU_VID_0 GPU_VID_1 GPU_VID_2 GPU_VID_3 GPU_VID_4 GPU_VID_5 GPU_VID_6Voltage\VID
1
0.925
0.85
0.8
*
0
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
GPU_IMON setting
DSC (2@) 21.5K_ohm
ASICS (7@) 11.5K_ohm
ASICS2 (9@) 10.7K_ohm
Output Cap
DSC (2@) 330U_D2E_2.5VM_R9~D
ASICS / ASICS2 (1@) 330U_D2_2VM_R6M~D
*
ASICS defult voltage 0.925V
Margaux DSC & ASICS2
defult voltage 1V
*
PR344
10K_0402_5%~D
PR344
10K_0402_5%~D
1 2
PR403
0_0402_5%~D
PR403
0_0402_5%~D
1 2
PC291
0.1U_0603_25V7K~D
1@ PC291
0.1U_0603_25V7K~D
1@
12
PR423
0_0402_5%~D
PR423
0_0402_5%~D
12
PR422
0_0402_5%~D
2@ PR422
0_0402_5%~D
2@
12
PL25
0.56UH_MPC1040LR56C_23A_+-20%~D
1@ PL25
0.56UH_MPC1040LR56C_23A_+-20%~D
1@
1
3
4
2
+
PC298
330U_D2E_2.5VM_R9~D
2@
+
PC298
330U_D2E_2.5VM_R9~D
2@
1
2
PR424
0_0402_5%~D
PR424
0_0402_5%~D
12
PR370
43.2K_0402_1%~D
PR370
43.2K_0402_1%~D
1 2
PC297
0.022U_0402_25V7K~D
1@
PC297
0.022U_0402_25V7K~D
1@
1 2
PJP53
PAD-OPEN1x1m
PJP53
PAD-OPEN1x1m
12
PR362
357K_0402_1%~D
1@ PR362
357K_0402_1%~D
1@
1 2
PC290
0.1U_0603_25V7K~D
1@ PC290
0.1U_0603_25V7K~D
1@
12
PR358
0_0402_5%~D
@PR358
0_0402_5%~D
@
1 2
PC287
10U_1206_25VAK
1@ PC287
10U_1206_25VAK
1@
1 2
330U_D2_2VM_R6M~D
PC299
1@
330U_D2_2VM_R6M~D
PC299
1@
PQ63
SIR472DP-T1-E3_SO8~D
1@
PQ63
SIR472DP-T1-E3_SO8~D
1@
3 5
2
4
1
PC308
33P_0402_50V8J~D
PC308
33P_0402_50V8J~D
12
PR402
0_0402_5%~D
PR402
0_0402_5%~D
1 2
PR355
0_0402_5%~D
@
PR355
0_0402_5%~D
@
12
PC313
0.1U_0603_25V7K~D
PC313
0.1U_0603_25V7K~D
12
PQ65
SI7658ADP_MLP8~D
1@ PQ65
SI7658ADP_MLP8~D
1@
3 5
2
4
1
PR367
470_0402_5%
PR367
470_0402_5%
1 2
PQ64
SI7658ADP_MLP8~D
1@PQ64
SI7658ADP_MLP8~D
1@
3 5
2
4
1
PJP52
PAD-OPEN 43X118
@PJP52
PAD-OPEN 43X118
@
1 2
+
PC299
330U_D2E_2.5VM_R9~D
2@
+
PC299
330U_D2E_2.5VM_R9~D
2@
1
2
PR371
4.7_1206_5%~D
PR371
4.7_1206_5%~D
12
PR341
1.91K_0402_1%
PR341
1.91K_0402_1%
1 2
PR369
2.2_0603_1%~D
PR369
2.2_0603_1%~D
12
PR365
470_0402_5%
1@PR365
470_0402_5%
1@
1 2
PD28
RB751V-40_SOD323-2~D
PD28
RB751V-40_SOD323-2~D
1 2
PR364
470_0402_5%
1@PR364
470_0402_5%
1@
1 2
PL26
0.56UH_MPC1040LR56C_23A_+-20%~D
PL26
0.56UH_MPC1040LR56C_23A_+-20%~D
1
3
4
2
PC293
1000P_0402_50V7K~D
PC293
1000P_0402_50V7K~D
1 2
PC304
33P_0402_50V8J~D
1@ PC304
33P_0402_50V8J~D
1@
12
PR348
0_0402_5%~D
@
PR348
0_0402_5%~D
@
12
PD27
RB751V-40_SOD323-2~D
1@
PD27
RB751V-40_SOD323-2~D
1@
12
PR342
0_0402_5%~D
@
PR342
0_0402_5%~D
@
12
PR353
0_0402_5%~D
@
PR353
0_0402_5%~D
@
12
PC309
0.22U_0603_10V7K~D
PC309
0.22U_0603_10V7K~D
1 2
PC292
1U_0603_6.3V6M~D
PC292
1U_0603_6.3V6M~D
12
PC303
10U_0805_6.3V6M~D
PC303
10U_0805_6.3V6M~D
12
PR361
4.7_1206_5%~D
1@ PR361
4.7_1206_5%~D
1@
1 2
PJP56
PAD-OPEN 43X118
@PJP56
PAD-OPEN 43X118
@
1 2
PC296
0.22U_0603_10V7K~D
1@
PC296
0.22U_0603_10V7K~D
1@
1 2
PR421
0_0402_5%~D
2@ PR421
0_0402_5%~D
2@
12
PR359
22.6K_0402_1%~D
1@ PR359
22.6K_0402_1%~D
1@
12
PR404
0_0402_5%~D
PR404
0_0402_5%~D
1 2
PQ68
SIR472DP-T1-E3_SO8~D
PQ68
SIR472DP-T1-E3_SO8~D
35
2
4
1
PC294
0.22U_0402_6.3V6K
PC294
0.22U_0402_6.3V6K
12
PR406
0_0402_5%~D
PR406
0_0402_5%~D
1 2
PR339
0_0402_5%~D
PR339
0_0402_5%~D
12
330U_D2_2VM_R6M~D
PC300
1@
330U_D2_2VM_R6M~D
PC300
1@
PR400
0_0402_5%~D
PR400
0_0402_5%~D
1 2
PC316
10U_1206_25VAK
PC316
10U_1206_25VAK
1 2
PR347 0_0402_5%~DPR347 0_0402_5%~D
12
PC312
0.1U_0603_25V7K~D
PC312
0.1U_0603_25V7K~D
12
PR376 0_0402_5%~D@PR376 0_0402_5%~D@
1 2
PC310
3300P_0402_50V7K~D
PC310
3300P_0402_50V7K~D
1 2
PR408
10K_0402_5%~D
PR408
10K_0402_5%~D
12
PR356
249K_0402_1%~D
PR356
249K_0402_1%~D
1 2
PC295
820P_0402_50V7K~D
1@ PC295
820P_0402_50V7K~D
1@
12
PC314
10U_1206_25VAK
PC314
10U_1206_25VAK
1 2
PR405
0_0402_5%~D
PR405
0_0402_5%~D
1 2
PR338
0_0402_5%~D
@
PR338
0_0402_5%~D
@
12
PR420
0_0402_5%~D
2@ PR420
0_0402_5%~D
2@
1 2
11.5K_0402_1%~D
PR374
7@
11.5K_0402_1%~D
PR374
7@
PC311
820P_0402_50V7K~D
PC311
820P_0402_50V7K~D
1 2
+
PC300
330U_D2E_2.5VM_R9~D
2@
+
PC300
330U_D2E_2.5VM_R9~D
2@
1
2
PC327
68P_0402_50V8F~D
PC327
68P_0402_50V8F~D
1 2
330U_D2_2VM_R6M~D
PC298
1@
330U_D2_2VM_R6M~D
PC298
1@
PR340
0_0402_5%~D
@
PR340
0_0402_5%~D
@
12
PR389
0_0402_5%~D
1@ PR389
0_0402_5%~D
1@
12
PR373
22.6K_0402_1%~D
PR373
22.6K_0402_1%~D
1 2
PR354
4.02K_0402_1%~D
PR354
4.02K_0402_1%~D
1 2
PJP51
PAD-OPEN 4x4m
@PJP51
PAD-OPEN 4x4m
@
1 2
PR345 0_0402_5%~D@PR345 0_0402_5%~D@
12
PC289
10U_1206_25VAK
1@ PC289
10U_1206_25VAK
1@
1 2
PC305
33P_0402_50V8J~D
PC305
33P_0402_50V8J~D
12
PR363
43.2K_0402_1%~D
1@
PR363
43.2K_0402_1%~D
1@
1 2
PR401
0_0402_5%~D
PR401
0_0402_5%~D
1 2
PR374
21.5K_0402_1%~D
2@ PR374
21.5K_0402_1%~D
2@
1 2
PH4
150K_0402_5%_ ERTJ0EV154J~D
1@
PH4
150K_0402_5%_ ERTJ0EV154J~D
1@
1 2
PR366
470_0402_5%
PR366
470_0402_5%
1 2
PR349
0_0402_5%~D
PR349
0_0402_5%~D
12
PR350
0_0402_5%~D
@
PR350
0_0402_5%~D
@
12
PJP55
PAD-OPEN 43X118
@PJP55
PAD-OPEN 43X118
@
1 2
PH5
150K_0402_5%_ ERTJ0EV154J~D
PH5
150K_0402_5%_ ERTJ0EV154J~D
1 2
TPS51728RHAR_QFN40_6X6
PU17
TPS51728RHAR_QFN40_6X6
PU17
MODE
1
GND
2
CSP2
3
CSN2
4
CSN1
5
CSP1
6
GNDSNS
7
VSNS
8
THERM
9
VR_TT#
10
IMON
11
DPRSLPVR
12
PSI#
13
VID6
14
VID5
15
VID4
16
VID3
17
VID2
18
VID1
19
VID0
20
DRVH1 21
VBST1 22
LL1 23
DRVL1 24
PGND 25
V5IN 26
DRVL2 27
LL2 28
VBST2 29
DRVH2 30
TRIPSEL 31
OSRSEL 32
PGOOD 33
CLK_EN# 34
VR_ON 35
TONSEL 36
ISLEW 37
V5FILT 38
DROOP 39
VREF 40
GND 41
PR372
357K_0402_1%~D
PR372
357K_0402_1%~D
1 2
PC306
0.022U_0402_25V7K~D
PC306
0.022U_0402_25V7K~D
1 2
PC288
10U_1206_25VAK
1@ PC288
10U_1206_25VAK
1@
1 2
PR360
2.2_0603_1%~D
1@ PR360
2.2_0603_1%~D
1@
12
PQ67
SI7658ADP_MLP8~D
1@ PQ67
SI7658ADP_MLP8~D
1@
35
2
4
1
PQ66
SI7658ADP_MLP8~D
PQ66
SI7658ADP_MLP8~D
35
2
4
1
PR357
0_0402_5%~D
@
PR357
0_0402_5%~D
@
12
PR425
10_0402_5%~D
PR425
10_0402_5%~D
12
PR346
0_0402_5%~D
PR346
0_0402_5%~D
12
10.7K_0402_1%~D
PR374
9@
10.7K_0402_1%~D
PR374
9@
PR375
0_0402_5%~D
1@ PR375
0_0402_5%~D
1@
1 2
PR368
20K_0402_1%~D
PR368
20K_0402_1%~D
1 2
PR407
10K_0402_5%~D
PR407
10K_0402_5%~D
12
PC302
2200P_0402_50V7K~D
PC302
2200P_0402_50V7K~D
12
PR351
0_0402_5%~D
PR351
0_0402_5%~D
12
PR352
0_0402_5%~D
@
PR352
0_0402_5%~D
@
12
PL24
FBMJ4516HS720NT_1806~D
PL24
FBMJ4516HS720NT_1806~D
12
PC315
10U_1206_25VAK
PC315
10U_1206_25VAK
1 2
PR426
10_0402_5%~D
PR426
10_0402_5%~D
12
PC307
33P_0402_50V8J~D
1@ PC307
33P_0402_50V8J~D
1@
12
PJP54
PAD-OPEN 43X118
@PJP54
PAD-OPEN 43X118
@
1 2
PC301
0.1U_0402_10V7K~D
PC301
0.1U_0402_10V7K~D
12
PR411
10K_0402_5%~D
PR411
10K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Power Sequence
63 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Power Sequence
63 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
Power Sequence
63 69Thursday, January 21, 2010
Compal Electronics, Inc.
7
6
REGCTL_PNP10
7
+1.05V_M
6
VCCME
+3.3V_ALW
ISL8014 +1.8V_RUN
9
PCH_ALW_ON
8
SI3456BD
+3.3V_ALW
11
+3.3V_ALW_PCH
5
10
5
VCCSUS
+3.3V_ALW_PCH
PM_MEPWROK
SI3456BD +3.3V_SUS
SUS_ON
10
H_VTTPWRGD
+3.3V_ALW
DDR_ON
1.8VRUNPWROK 1.8V_RUN_PWRGD
2AC1BAT
2BAT
SLP_LAN#
1.05V_M_PWRGD
+1.05V_RUN
+1.05V_RUN_VTT
+1.05V_RUN
V_CPU_IO
ADAPTER
PCH_RSMRST#
SIO_SLP_LAN#
H_CPUPWRGD
VCCIO
12
+3.3V_ALW
NTMS4107 +3.3V_RUN
13
MEPWROK
VCC3_3
1.5V_SUS_PWRGD
VTTPWRGOOD
PM_MEPWROK
+3.3V_RUN PWROK
SIO_SLP_M#
IMVP_PWRGD
+3.3V_ALW
14
+3.3V_ALW
+3.3V_WLAN
RESET_OUT# 0.75V_DDR_VTT_ON
RESET_OUT#
AUX_EN_WOWL
14 TPS51100
BC BUS
+5V_ALW
DDR_ON
SI3456BD
M_ON ISL8014
+0.75V_DDR_VTT
+3.3V_ALW
PM_DRAM_PWRGD
+VCC_COREISL62883
IMVP_VR_ON
DRAMPWROK 15
ISL62881
RUN_ON
SM_DRAMPWROK
+1.5V_MEM
+1.5V_RUNSI3456BD
FDS8878
VCC
+5V_RUN
+VCC_CORE
PWRBTN# SIO_PWRBTN#
Power Button
DELL CONFIDENTIAL/PROPRIETARY
GFX_VR_ON
PM_DRAM_PWRGD
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5V_ALW
15
H_VTTPWRGD
MAX17007
+5V_ALW
H_CPUPWRGD
ALWON SN0608098
+15V_ALW
16 VCCPWRGD_0/1
CPU
+VCC_GFXCORE
SIO_SLP_LAN#
VAXG
EC 5045
SIO 5028
ALW_PWRGD_3V_5V
BAT54
16
FDS8878
+5V_ALW
VT357FCX
12
+5V_ALW
+1.5V_MEM
PROCPWRGD
BATTERY
PCH_PLTRST#
+1.05V_M
PLTRST#
17
1AC
SI3456BD +3.3V_M SIO_SLP_S4#
VCCME3_3
PCH_PLTRST#_R
17
VDDQ
DDR
VDDQ
+3.3V_M
RSTIN#
+3.3V_LAN
DCP69
3
RSMRST# PCH_RSMRST#
+3.3V_ALW
CPU_VTT_ON
4
+1.0V_LAN
4
SIO_SLP_S5#
+1.05V_RUN_VTT
VTT
+1.05V_RUN_VTT
SIO_SLP_S3#
+1.5V_MEM
VTT
SIO_SLP_S5#
+0.75V_DDR_VTT
SIO_SLP_S4#
SIO_SLP_S3#
PCH
SIO_SLP_M#
VCCDMI
+1.05V_RUN_VTT
SLP_S5#
SLP_S4#
82577 CTRL_1P0
+3.3V_LAN
SLP_S3#
SLP_M#
+3.3V_RUN
RUNPWROK
M_ON
5
SIO_SLP_LAN#
11
+GPU_COREISL62870
DGPU_PWR_EN
DGPU_PWROK
DGPU_PWROK
GPIO22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
64 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
64 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
64 69Thursday, January 21, 2010
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Item
ItemItem
Item Issue Description
Issue DescriptionIssue Description
Issue DescriptionDate
DateDate
Date Request
RequestRequest
Request
Owner
OwnerOwner
Owner Solution Description
Solution DescriptionSolution Description
Solution Description Rev.
Rev.Rev.
Rev.Page#
Page#Page#
Page# Title
TitleTitle
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
1 HW 6/30/2009 Add R1469, R1471-R1480, C1872-C1877, Q199-Q204, change R624 to 27 ohm,
pop Q78, add net DDR_HVREF_RST_GATE from U36.B36, CPU1.5V_S3_GATE from
U36.B37, change CPU VDDQ net name to +1.5V_CPU_VDDQ
2
8,12,13,
14,42
Intel
3HW
4HW
5HW
6HW
7HW
8HW
9
10
HW
11
HW
12
HW
13
14
HW
15
HW
17
X01
X00
X01
X01
X01
X01
X01
X01
X01
X01
18 HW
Intel S3 reduction circuit.
HW COMPAL6/30/200940 Board ID R98 change to 130k ohm X01
for derating concern Change R1001 from 82 to 150 ohm43 6/30/2009 COMPAL
Intel Follow CRB by Intel request R1286 needs to change to 0-ohm6/30/20098
6/30/2009 COMPAL MEMO implementation39,40 de-pop R1319, R595
Intel Intel S3 reduction circuit.7/01/20098Change R879 to 2k, R880 to 1.1k, add U141
X00
X00
Rdson concern by ADC Change Q55/Q58/Q59/Q183 to SI4164COMPAL7/01/200955
7/02/2009 Intel S3 reduction circuit.Intel8,42,47 Add R1481-R1484, Q205, Q206, Q207, C1877, PR428, change R879 to 1.5k,
R880 to 750 ohm, change net DDR_HVREF_RST_GATE to U36.A34,
CPU1.5V_S3_GATE to U36.A36
30 7/03/2009 COMPAL +3.3V_LAN enable control follow M09 De-pop R47
Intel S3 reduction circuit.DELL7/03/2009 De-pop R1473, separated +V_DDR_REF_Q for each SO-DIMM, The dividers
should use 1% part replacement for 5% as well
12
DELL7/08/2009HW Intel S3 reduction circuit. Add C1879, PJP57, PJP58, R1485, R1486, change Q205 to PMST3904, Q200 to
AO4728L, R624 to 22 ohm, connect RUN_ON_CPU1.5VS3# to Q78.2 Q204.2,
Intel
8,12,13,
14,42
7/09/2009 COMPAL Intel S3 reduction circuit. Add R14878
7/14/2009 COMPAL NVidia BIA_PWM implementation POP R165, de-pop R16624
COMPAL7/14/2009HW Depop JXDP1, JXDP2, JDEG1, JP2 circuit8,15 Depop all related components where are
located at 0 Z-hight area
X02
DELLHW24 ENVDD_PCH connection7/14/2009 Remove D91 and connect ENVDD_GPU to 5028.pin B38 X02
GPIO1,6,7 PU if not being usedIntel Add R1489-R1491 X0219 HW 7/14/200916
COMPAL7/14/2009HW Camera need to be changed from 7 to 8 pin24 Change JEDP1 pin definition X02
37 7/16/2009 COMPAL JTP1, JBIO1 power gnd pins redefined Change JTP1, JBIO1 pin definition X02
37,40 7/16/2009 SMSC19 HW LAT_ON_SW# needs to be added a 1uF cap Add @C1884, C1885, R1492, change R560 to 100K, JIO.32 change to
LAT_ON_SW_BTN#
X02
2320 HW 7/16/2009 R594 has to be a group with R3P circuit De-pop R594 for M09 fan solution X02SMSC
3121 HW 7/17/2009 Braodcom Found both PD R898 and PU R485 pop depopulate R898 for normal operation X02
22 HW 7/17/2009 X02COMPAL40 Board ID Change R98 to 62K ohm.
23 Braodcom7/17/2009HW31 RFID disable circuit remove Remove R1062-R1065 X02
24 28,37 HW 7/17/2009 TI Please reserve 1 resistor and connect
connector (Pin1 or 7) to MAX4951
Add R1493 & R1494 at pin 18 of U95 & U96 for power saving X02
25 HW 7/17/2009 +SC_VCC Capacitor (C718) Value Change Broadcom has recommneded changing the value of C718 from .47uF to 220nF31 Braodcom X02
26 HW 7/17/2009 Backdrive EA Failure on Margaux/ASICS42 Pop R625 and Q79 X02COMPAL
27 24 HW 7/17/2009 eDP repeater change to SN75DP119. update U46 circuit for eDP repeaterDELL X02
7/17/2009HW2328 R536 depop for 3P FAN, R1457 change to 0 ohm, R138 change to 27K ohmR3P circuit by SMSC requestCOMPAL X02
29 21 HW 7/17/2009 De-pop C105 & C106The PLLs aren’t used in a DIS system X02Intel
30 33 HW 7/17/2009 EA resultTXC C514, C515 have to change to 22pF X02
31 36,39 HW 7/22/2009 Reconnect the signal UWB_RADIO_DIS# connect UWB_RADIO_DIS# from EC5028.A56 to MINI3.20DELL X02
2332 De-pop R3P circuit component & pop M09 solutionChange FAN solution to M09DELL7/22/2009HW X02
33 42 7/23/2009 de-rating result fail Change Q61 from AO4456 to NTMS4107HW X02COMPAL
34 26 7/23/2009HW Pericom 8200 SW issue DVI can not work Add R1495 to pull up U9 pin 23 (P1_OC0) of Pericom 8200 SW with a 4.7K
ohm resistor to 3.3_RUN
PERICOM X02
35 24 HW 7/23/2009 eDP repeater DP119 vender review requestTI reserve pop option for X1EDP & DP119, change PU/PD to 20K. X02
36 28 HW 7/23/2009 We will never disable the power to HDD
redriver, go back connected in SSI
Remove R1493 & delete SATA_PWRSAVEDELL X02
37 18,28,40 7/23/2009HW There has been some confusion due to the
net name showing active low
change net name HDD_FALL_INT1# to HDD_FALL_INT to show correct polarityDELL X02
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5
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4
3
3
2
2
1
1
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C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
65 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
65 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
65 69Thursday, January 21, 2010
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Item
ItemItem
Item Issue Description
Issue DescriptionIssue Description
Issue DescriptionDate
DateDate
Date Request
RequestRequest
Request
Owner
OwnerOwner
Owner Solution Description
Solution DescriptionSolution Description
Solution Description Rev.
Rev.Rev.
Rev.Page#
Page#Page#
Page# Title
TitleTitle
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
38 29 HW 7/24/2009 DELL use the SiTimes part due to the cost savings change X4 from TXC to SiTimes. X02
39 31 HW 7/24/2009 connect pin-L10 of U32 to pin-5 of U33,
and disconnect pin-D2 from pin-5 of U33
pop R775, de-pop R776 X02Braodcom
40 33 HW 7/24/2009 fixed SD/MMC Clock overshoot and undershoot Changing R8 dumping from 0-ohm to 10-ohm X02COMPAL
41 31 HW 7/24/2009 BCM5880 Leakage Issue on Margaux Add Q208,Q209,R1496 circuit to fix. X02Braodcom
42 37,39 HW 7/27/2009 ESATA repeater power saving Add a 0 ohm jumper between EN pin and VDD, but no-pop it. Then connect
the EN pin to 5028.A47 with a 0 ohm jumper that is popped.
X02DELL
43 39 HW 7/27/2009 Sometimes VGA_ID_DISC and VGA_ID_UMA both
read as low
Change R875 and R881 to +3.3V_ALW rail.DELL X02
44 23 HW 7/27/2009 SMSC SMSC review feedback The pull-up source of the R150 should be changed to +VCC_4002 X02
45 31 HW 7/27/2009 NXP Better for decoupling noise Change C1015 ,C633 to 10pf X02
46 36 HW 7/27/2009 DELL For PCH GPIOs rail. PCIE_MCARD3_DET# & USB_MCARD1_DET# pull-ups (R458 & R438) need to change
from +3.3V_ALW_PCH rail to +3.3V_RUN rail
X02
47 11 HW 7/27/2009 Intel The VCC_Core de-coupling requirements for
Clarksfield XE processor
C60-64, C66 change to 470uF/4mOhm, C44-C59 change to 22uF(0805) X02
48 23,40 HW 7/29/2009 SMSC per SMSC 5045 AN 19.6, 4002 AN 16.11 R541, R554, R1492 should be 10K, R147 should be populate, Add R1498 X02
49 35 HW 7/29/2009 DELL Braidwood has been removed from Ibex Peak
platforms
De-pop JBW1 & R1453 X02
50 39 DELL change net name from RESERVED FOR ESATA to EN_ESATA_RPTRHW 7/29/2009 GPIO MAP update X02
51 42 HW Compal reserve R1500 & @R1499 0 ohm for Q206.2 from RUN_ON_CPU1.5VS3#
& RUN_ON_ENABLE#
7/29/2009 By Intel S3 timing concern X02
52 37 HW Intel Add @L30, @L31, R424-R4277/30/2009 Intel continues to recommend that all
pre-production and production motherboards
include common mode choke footprints to
enable a stuffing option in case a choke is
required to pass EMI testing
X02
53 31 HW Broadcom7/30/2009 Broadcom schematic review request pop R537; Remove C647, C641,R634, R498, R898; Add @C1886 & @C1887;
Remove L73, R631, C1026, R494, Short net RFREADER_TXN1_PI_R to
RFREADER_RXP_C; Remove C642, C640, change R487, R496 to 0 ohm;
Add @R1501; de-pop R496 & R497; JCS1 pin2 & pin3 and pin4 & pin5
should be short to carry higher current.
X02
7/30/2009HW3154 X02Reverse JSC1 pin definitionSolve smart card cage vender reverse pin
definition.
Compal
7/31/2009HW3155 X02The pin1 of R497 and R496 should be connected to GNDBroadcom schematic review requestBroadcom
KDS15,4056 KDS crystal EA result change DIS C296 & C297 to 12pF, C674, C675 to 33pF7/31/2009HW X02
57 For XDP debug concernIntel7/31/2009HW8,15 Populate all the resistors and leave out the connector X02
27 HW 8/03/2009 Compal
58 CRB EA result C251-C253 to 4.7pF; L61-L63 to 10-Ohm Bead ; De-pop C996, C518, C390 X02
23 HW 8/03/2009 Compal59 If populate R147 PU resistor for THERM_STP#,
it will impact ALWON signal at MEC 5045
De-pop R147 X02
60 15,40 KDS
HW 8/04/2009 KDS crystal EA result change DIS C427 change to 200 ohm, C514, C515 back to 15P and change X3
from CL=16pF to CL=12pF
X02
DELL8
61 X02change C1877 from 0.01uF to 0.22uF 0402 cap.fix the Intel S3 power up timing8/05/2009HW
62 28,37 HW 8/06/2009 Compal Per ESATA/SATA EA result X02pop R1301, R1304, de-pop R1298, R1308
8/06/2009HW2863 connect R1239.1 to +3.3V_RUN & pop R1239 X02ODD_DET# PU from +5V_MOD to +3.3V_RUNCompal
64 42 HW 8/06/2009 SMSC Watch dog timer may not be resetED when
4002 VDD_PWRGD is not completely at Logic Low
Pop R616 to 39 & pop Q72 X02
65 30 HW 8/10/2009 Intel Remove the VCT trace Remove @R562, @C41 X02
66 35 HW 8/10/2009 DELL Braidwood Removal on RAM Remove @JBW1, @C1851, @R1452, @R1453, @C1852, R1411 X02
67 31 HW 8/11/2009 Broadcom Broadcom review request Remove @R1061, Change C718 value to 470pF, change C646 value to 220pF.
pin2 of R470 should have a 0ohm but de-pop resistor to USB_GPIO27 net.
X02
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C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
66 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
66 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
66 69Thursday, January 21, 2010
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Item
ItemItem
Item Issue Description
Issue DescriptionIssue Description
Issue DescriptionDate
DateDate
Date Request
RequestRequest
Request
Owner
OwnerOwner
Owner Solution Description
Solution DescriptionSolution Description
Solution Description Rev.
Rev.Rev.
Rev.Page#
Page#Page#
Page# Title
TitleTitle
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
68 8 HW 8/11/2009 Intel Intel review request add @R1504 for DDR3_DRAMRST#_CPU PD & add C1888 for PM_DRAMRST# to slow
down gate of FET
X02
69 33 HW 8/11/2009 Richo Change pop option for R5U242 Change C21 from 10U to 47U, change R46 to C1889 (1uF) X02
70 38 HW 8/11/2009 Compal For DVI DOCK issue Add R1505-R1508 X02
71 21 HW 8/12/2009 Intel Follow CRB rev 1.6 schematic No stuff C111 and C112 X02
72 31 HW 8/12/2009 Broadcom Per Broadcom request pop R496 & R497 (0 ohm) X02
73 31 HW 8/12/2009 Compal Smart card EA result change R772 to 47 Ohm for resolving SC_CLK Rise/Fail timing issue X02
74 8 HW 8/12/2009 Follow Intel S3 white paper rev0.9 pop R1504 & change C1888 to 470pF X02Intel
75 37 HW 8/12/2009 DELL add a pull-up to +3.3V_ALW for IO_LOOP change R835.1 from +3.3V_ALW_PCH to +3.3V_ALW X02
76 37 HW 8/12/2009 Compal disconnect IO & DOCK VCT rename IO VCT to +LOM_VCT_IO & reserve C712 pad for test. X02
Broadcom8/13/2009HW3177 Per Broadcom request need to have 4.7K pull-up to 3.3V_ALW for BCM5882 pin-C1 "RSTOUT_N" X02
DELL78 8 HW 8/13/2009 Avoid a glitch for DDR_HVREF_RST_GATE,
please add a 1.1K 1% no-stuff pull-up to
+1.5V_CPU_VDDQ rail on the PM_DRAM_PWRGD_R
signal for a back-up option
change C1888 to 0.1u, add @R1511 for PM_DRAM_PWRGD_R X02
DELL79 8,45 HW 8/13/2009 CPU detection since the edge diode has been
removed from M'09
Add R1512 for CPU_DETECT# and connect JCPU.AH24 to U36.B18 X02
DELL3780 X02Add @R1513 & @Q210, pop R1494 and de-pop R1497, change net name from
GPIO16 to EN_ESATA_RPTR#
Invert the EN_ESATA_RPTR signal and connect
this to SATAGP4/GPIO16
8/14/2009HW
Solve 1394 impedance issueCompal8/14/20093381 HW Change R399, R400, R401, R403 to 54.9 ohm. X02
82 37 8/14/2009 Compal EMI solutionHW pop L30 & L31, de-pop R424-R427 X02
83 38 HW 8/17/2009 NV Solve DIV issue Add Q211-Q216, R1514-R1521 for SW DDC PU. X02
84 11 HW 8/17/2009 X02Compal PWR team request de-pop C66, C64, change C60-C63 to 330uF, C44-C59 to 10uF, can meet
Intel spec.
5585 add @R1522, @y7, @C1890, @C1891Reserve crystal for 27M.NV8/18/2009HW X02
86 26 8200 pin 8,9 add cpas to minimize noise Add C1597 & C1598HW 8/19/2009 Pericom X02
29 X02EMI solutionCOMPAL8/19/2009HW87 C676 to 150pF and R1295 to L4 (220 ohm), POP C1121-C1124, C1145-C1148
R8 change to 22 ohm, pop L64 & depop R791, R792
33,34 EMI solution for SD CLOCK & EXP card USB X0288 HW 8/20/2009 COMPAL
89 To meet Intel specDELL9/11/2009HW11 C60-C63, Margaux DIS-->330uF, Asics/Asics II-->470uF X02
27M crystal for NVHW5590 DELL9/11/2009 add Y7, C1890, C1891, R1522, R1417, de-pop R617, R1317, R43, R39 X02
HW21 Intel requestIntel9/11/200991 de-pop C39, C610 X02
31 HW 9/11/2009 change C718 from 470p to .47u, C646 from 220p to .22uBroadcom review feedbackBroadcom92 X02
HW 9/11/2009 Intel Follow Intel document request93 30 change R1502 to C427 10pF, C475, C476 to 33pF X02
Add PD 10k for Minicard PWRCompal9/11/2009HW35 Add R1523-R152594 X03
3195 Smart card connector DFM issue change JSC1 type (the same with Rothschild)Compal10/23/2009HW X03
96 54 HW 10/23/2009 NV JTAG_TRST#: Populate R1372 with 1K resistor. Change R1372 to 1K and pop X03
10/23/2009 X03Board IDCOMPALHW4097 Change R98 to 4.3K ohm.
98 17 HW 10/23/2009 Intel Intel schematic check list 2.0 request R268 change from 1k ohm to 10k ohm, R672 change from 0.5% to 5% X03
10/23/2009HW4099 X03
R561 and R1046 are too large it is recommend that no PU/PD be larger
than 100K
SMSC review feed backSMSC
100 12,42 HW 10/23/2009 avoid double bleed off +3.3V_M, +3.3V_RUN, +1.5V_CPU_VDDQ power plane discharge circuit have
been pop, de-pop R612, R607, R1471.
X03COMPAL
101 support WiMax LED status10/23/2009HW36 X03Need to populate R840DELL
102 16,32 HW 10/25/2009 Change R910 placement Please put R910 close to PCH not TCM chip X03COMPAL
103 41 HW 10/25/2009 COMPAL Touch Pad PU need to move from 5V to 3V X03R613, R614 change power rail from +5V_ALW to +3.3V_ALW
104 31 HW 10/28/2009 Broadcom For 5882-B0 request L71, L72 68nH, 2%, 400mA; C1070, C1071 1500pF, 2%, 50V; C1886, C1887
150pF, 2%, 50V
X03
105 29 HW 10/28/2009 IDT create a low pass filter with the pole set
at 36kHz to filter out of band noise
de-pop C1066 & C1067, R1090, R1089 ; R340 & R342, R1091 & R1092 change
to 2k, add C1894-C1897 1000pF.
X03
29110 JSPK1 Pin 2 and pin 4 swap, pin 3 and pin 5 swapME request for JSPK1 swapCOMPAL10/28/2009HW X03
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5
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4
3
3
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1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
67 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
67 69Thursday, January 21, 2010
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-5573P
0.1
EE PIR
67 69Thursday, January 21, 2010
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Item
ItemItem
Item Issue Description
Issue DescriptionIssue Description
Issue DescriptionDate
DateDate
Date Request
RequestRequest
Request
Owner
OwnerOwner
Owner Solution Description
Solution DescriptionSolution Description
Solution Description Rev.
Rev.Rev.
Rev.Page#
Page#Page#
Page# Title
TitleTitle
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
111 8,12,13,
15,16,28
HW 10/29/2009 DELL MEM SMBus design needs to change Move Q190 connection, add R1528,R1529, add net name DDR_XDP_CLK/DAT X03
31112 smart card clock resistorDELL10/29/2009HW Change R772 from 47 ohm to 22 ohm X03
113 COMPAL10/29/2009HW37 pop R15 with 10 ohm and C15 with 10pF X03EMI concern
HW36114 X03R447 pull up should change to +3.3V_ALW_PCHUSB_MCARD2_DET# change to +3.3V_ALW_PCHCOMPAL10/29/2009
40 HW115 COMPAL avoid RESET_OUT# double PD de-pop R5 X0310/29/2009
HW15116 X03pop C300, C302COMPAL11/02/2009 EMI, RF team concern
11/04/2009HW24117 change R161 from 470 to 130 ohm .LCD power sequencing issueCOMPAL X03
118 37 HW 11/05/2009 COMPAL EMI concern Change choke vender from Murata to Delta on L30,L31 X03
29119 X4 change from Sitime to TXC X03RF team concernCOMPAL11/05/2009HW
15120 RTC issueCOMPAL11/05/2009HW X03
121 U13 change from W25X32 to W25Q32For flash ROM EOL issueCOMPAL11/05/2009HW15 X03
Y1 & Y4 change from 30ppm to 10ppm.
122 PCH driving the siganl low at GPIO15 initialDELL11/09/2009HW19 X03add R1530 2.2K PU resistor to +3.3V_ALW_PCH on the SIO_EXT_WAKE# signal.
123 HW 11/10/2009 COMPAL By power team request55 Please pop 22u*2 at original reserved location C1722 and C1723. X03
add a 10K 5% PU to +3.3V_RUN on ME_FWPDELL11/10/2009HW39124 X03Add R1531
24, 53 HW 11/11/2009 NV By NV review request125 pop R180, de-pop R181; change GPU booting voltage setting, GPU_VID1:
@Q4, 7@R1374, 8@R1361, GPU_VID4:pop R1379, GPU VID2: 7@R1357, 8@R1360,
GPU_VID3: pop R1354
X03
15,28126 HW 11/13/2009 COMPAL To cut redundant trace for SMBUS Add @R1532/R1533/R1534/R1535 X03
By Intel check list requestIntel11/17/2009HW19127 Add R1544 for PCH GPIO34 X03
HW 12/24/2009 Compal To solve touch pad ESD issue41128 Change L41 and L42 to R1545 & R1546 with 100 ohm. X03
RF noise issue concernCompal12/24/2009 change Sitime 12MHz oscillator X4 to driver strength 1x X03
HW29129
Follow Intel check list rev2.0Intel12/24/2009 Change R224 to tolerance from 5% to 1% X03
HW15130
Wimax LED abnormal operation.12/24/2009 X03HW36
131 de-pop R1409
12/24/2009 Compal PWR team request132 11 HW X03Change C60-C63, add C66 to 330uF for Ascis/AsicsII
133 38 12/24/2009 CompalHW Simplo battery slice EMI issue Add C1898 and C1899(Depop,reserve for EMI test) A00
By Broadcom requestBraodcom12/24/200931134 A00Change L71,L72 from 68nH to 150nH, C1070,C1071 from 1500pF to
390pF.C1887, C1888 from 150pF to 390pF.
HW
DELL
Board IDDELL12/30/200940135 A00Change R98 from 4.3K to 1K for A00HW
Change R5U242 to rev ES3 Change U94 from ES2 to ES3 A00COMPAL12/30/200933,34136 HW
De-pop XDP & JTAG resistor A00de-pop C19,C20,R6,R7,R68,R19,R3,R1153,R1156,R1157,R66,R1241,R780-R785,
R22,R24,R78,R91,R101-R116,C1375,R69,R118,R123,R804,R807,R805,R806,R1281,
R1282,R1315
Intel12/30/20098,15137 HW
Change U95 U96 from 412 to 412A
Change Esata repeater for power saveCOMPAL A0001/15/2010HW28,37138
COMPAL EMI concern Change L61-L63 to 27nH, C251-C253 to 2P, pop C390, C518, C996 A00139 27 HW 01/15/2010
COMPAL No stuff MLCC caps to fix Acoustic noise de-pop C46, C48, C50, C52140 11 HW 01/18/2010 A00
For factory to do JTAG testCOMPALHW15141 A00Pop R123, R804-R807, R1281, R1282, R131501/21/2010
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Title
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Date: Sheet of
<Doc> 3.0
<Title>
C
68 69Thursday, January 21, 2010
Title
Size Document Number Rev
Date: Sheet of
<Doc> 3.0
<Title>
C
68 69Thursday, January 21, 2010
Title
Size Document Number Rev
Date: Sheet of
<Doc> 3.0
<Title>
C
68 69Thursday, January 21, 2010
Issue Description
Issue DescriptionIssue Description
Issue Description
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Item
ItemItem
Item Date
DateDate
Date Request
RequestRequest
Request
Owner
OwnerOwner
Owner Solution Description
Solution DescriptionSolution Description
Solution Description Rev.
Rev.Rev.
Rev.
Page#
Page#Page#
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TitleTitle
Title
1 50 +VCORE_DSC 6/12 Adjust Vimon
ASICS and ASICS2 Change PR184 to 7.5K
Dell
262
Graphic ASICS
6/19 TI Adjust compensation
DSC Change PR370 to 43.2K, PR372 to 357K, PR373 to 22.6K, PC 306 to 0.022uF
ASICS/ASICS2 Change PR370&PR363 to 43.2K, PR372&PR362 to 357K, PR373&PR359 to 22.6K, PC306&PC297 to 0.022uF
362
Graphic ASICS
6/19 TI
DSC, ASICS and ASICS2 Change PD26 to PC327 68pF
462
Graphic ASICS
6/19 TI
Adjust to operate single phase DSC PR364,PR365,PC304,PC307 unpop and add PR421&PR422 0_ohm to avoid PIN3,4 floating
Add PR420 0_ohm connect +5V_RUN to control PSI# for Single phase
Droop circuit add cap for filtering the
noise
562
Graphic ASICS
6/30 TI
add 0_ohm for cut power rail to debug
Add PR423 PR424 PR425 PR426
662
Graphic ASICS
7/01 TI CSS GC logic wrong issue Add PR427 180_ohm to GND
762
Graphic ASICS
7/2
Change PR374 and PC310 reference GND to
GPUVSS
ADC
Guangyong
090612
connect PR374 and PC310 pin1 to GPUVSS
+VCORE508 Dell /
intersil
7/14 change Cisense GND to VSUM-
PC174 PC175 PC176 pin2 connect to VSUM-
7/22Selector5210 un-pop PD21 add PR430
new version CD3301 (PG2.1) dont need PD21
TI
Selector
DOCK_AC_OFF_EC floating issue
add PR431TI7/22
9 52 Selector 7/16 Compal
Add 1M_ohm pull down to fix ACAV_IN_NB
oscillation when battery mode S5
Add PR429
5311
12 62 Graphic ASICS
Pin38 V5FILT is output pin. don't need to
connect to power rail.
Delete connection to +5V_RUN
8/3 TI
Dell / TI
8/13
Charger
5116 change PU13 from SA00001RK0L to SA00003KX0Lchange PU13 to BQ24747 to improve IC ESD
to change strong
+5V/+3.3V
+1.1VTT
+Vcore
charger
PR195 change to 619, PR175 change to 2.43K, PR387 change to 15K
PR184 change to 8.45K, add PR432 34.8K and PQ75 (PR432 and PQ75 un-pop Merle 0820)
PC171 change to 0.068uF, PC183 add 0.022uF
Adjust Imon and Load lineIntersil8/13+VCORE
50
14
15 49 +1.1VTT 8/13 Improve ESD PQ74 change SB57002528L to SB00000DH0LDELL
13
45 / 49
50 / 51
8/11 Compal /
EMC
solve EMI issue
pop PC32 PC33 PR36 PR39 PL15 PC155 PC165 PC182 PR153 PR173 PR191 PL24
add PL27
TI
17 48
+1.05V_VM_DSC
8/13
change PU8 to SN0905030
change from TPS51318 to SN0905030
18 45 +5V/+3.3V 8/17 TI/Compal adjust OCP setting
Change PR31 from 243K to 294K, PR32 from 232K to 261K(DSC) 158K(ASICS)
19 46 +1.5V_MEM_DSC 8/17 TI/Compal adjust OCP setting
Change PR71 from 61.9K to 39.2K
20 50 +VCORE 0820 Dell EMC
Add 2 2200pF caps. (jerry lin 0820)
Add PC328 PC329
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
<Doc> 3.0
<Title>
C
69 69Thursday, January 21, 2010
Title
Size Document Number Rev
Date: Sheet of
<Doc> 3.0
<Title>
C
69 69Thursday, January 21, 2010
Title
Size Document Number Rev
Date: Sheet of
<Doc> 3.0
<Title>
C
69 69Thursday, January 21, 2010
Issue Description
Issue DescriptionIssue Description
Issue Description
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Item
ItemItem
Item Date
DateDate
Date Request
RequestRequest
Request
Owner
OwnerOwner
Owner Solution Description
Solution DescriptionSolution Description
Solution Description Rev.
Rev.Rev.
Rev.
Page#
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TitleTitle
Title
TI/Compal10/23+DCIN4421
Change PR20 from 0_ohm to 10K.slow soft star to fast issue
+1.1VTT 10/23 Intel22 49
VTT power good voltage level change Change PR124 from 28.7K to 9.31K.
Change PR128 from 10K to 2.74K.
23 51 Charger 10/23 Compal EMI EMI solution
pop PC214 1000pF, PR234 4.7_ohm
24 49 10/23 Maxim fix VTT drop issue+1.1VTT
25 51 Charger 10/23 TI
Reduce CD3301 pin34 pin 35 peak current
Change PR392 to 0805 size.
ILIM = 30mV, un-pop PR104, PR103=0_ohm, PC130=220pF
PR110, PR120=1.58K_ohm ; PR113, PR122=6.98K_ohm ; PR114, PR123=0_ohm
Ceq PC132, PC144 =0.22uF ; Filter PC133, PC145=un-pop ; PR115, PR129=0_ohm
REF capacitor PC137 change to 2.2nF ; REFIN PR117, PR118 and PR119 increase by 10x
Add PR432, PR433 for dual remote sense
26 51 Charger 11/10 Compal
ACAV_IN_NB level adjust. (10/29) Change PR246 from 21.5K to 22.6K
11/17+Vcore5027 pop PC190 PR201
pop PC190 PR201 for improve 2nd source
FDIM
Compal
28 49 01/20 Maxim fix dual palse issue
pop filter PC133, PC145=1000p ; PR115, PR129=10_ohm
+1.1VTT
29 51 Charger 01/20 Compal
reduce surge current. (for CD3301) Change PR392 form 0_ohm to 1ohm
change PC199 from 1uF to 0.1uF
30 51 Charger 01/20 Compal
EMI can pass without this bead.
remove for cost saving.
un-pop PL27
6231 Graphic ASICS 8/3 Compal RF boardband issue
pop PC295 PC311 820pF , pop PR361 PR371 4.7ohm.
32 49 01/20 Compal
RF/EMI
fix RF boardband issue
change PC131 PC146 from 680pF to 820pF
+1.1VTT
