Compal LA 6141P Schematics. Www.s Manuals.com. R1.0 Schematics

User Manual: Notebook Gateway ID43 - Service manuals and Schematics, Disassembly / Assembly. Free.

Open the PDF directly: View PDF PDF.
Page Count: 55

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
1.0
Cover Page
B
154Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
1.0
Cover Page
B
154Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
1.0
Cover Page
B
154Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Champlain Processor with RS880M/SB820M/Park VGA
NELA5 Schematics Document
LA6141P REV: 1.0
Compal Confidential
2010-04-15
AMD Danube
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
1.0
Block Diagrams
B
254Wednesday, April 21, 2010
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
1.0
Block Diagrams
B
254Wednesday, April 21, 2010
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
1.0
Block Diagrams
B
254Wednesday, April 21, 2010
2008/10/06 2009/10/06
Compal Electronics, Inc.
Power On/Off CKT.
Touch Pad
LPC BUS
page 37
Compal Confidential
uFCBGA-528
Int.KBD
page 35
USB
conn
X 3
A link Express2
DC/DC Interface CKT.
AMD S1G4 Processor
page 36
3.3V 48MHz
Hyper Transport Link
16 x 16
page 36
EC I/O Buffer
Power Circuit
uPGA-638 Package
page 37
page 41
ATI RS880M
BIOS
page 6,7,8,9
page 35
HD Audio
page 12,13,14,15
ATI SB820M
page 25,26,27,28,29
page 35
ENE KB926
Bluetooth
Conn
3.3V 24.576MHz/48Mhz
Model Name : NELA5
RTC CKT.
page 25
page 38
page 41,42,43,44,45,46,
47,48,49,50,51
S-ATA
page 30
SATA HDD
Conn.
port 0
CMOS
Camera
USB port 1,2,3
USB
CDROM
Conn.
page 30
Mini
card
(WL)X1
port 1
USB port 5 USB port 14 USB port 8
page 33 page 22 page 33 page 32
Dual Channel
BANK 0, 1, 2, 3
204pin DDRIII-SO-DIMM X2
1.5V DDRIII 800~1333MHz
Memory BUS(DDR3)
page 10,11
page 8
Thermal Sensor
ADM1032
ATI M97
Park-XT
VRAM 1GB/512MB
128M/64M x16 x 4
PCI-Express x 16
DDR3
page 21
Page 16,17,18,19,20
uFCBGA-605
uFCBGA-962
HDA Codec
CX20672
Phone Jack x2
page 35
LED
page 36
LID SW / BTN/B
Gen2
Champlain
Danube
page 33
MINI Card 1
WLAN
page 32
GPP1GPP5
LAN Conn.
AR8131L
LAN(GbE)
LVDS
page 22
CRT
page 24
HDMI Conn.
page 23
Fan Control
page 40
<Option>
page 31
USB port 6
Card Reader
Gen1
Gen2
Side Port Memory
128MB
64M16 x 1
Side Port
page 15
Realtek
RTS5138
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NELA5 LA-6141P
0.1
CLOCK DISTRIBUTION
Custom
354Wednesday, April 21, 2010
2005/10/10 2010/03/12
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NELA5 LA-6141P
0.1
CLOCK DISTRIBUTION
Custom
354Wednesday, April 21, 2010
2005/10/10 2010/03/12
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NELA5 LA-6141P
0.1
CLOCK DISTRIBUTION
Custom
354Wednesday, April 21, 2010
2005/10/10 2010/03/12
GbE LAN
Atheros
AR8151
WLAN
Mini PCI Socket
A_SODIMM
S1G4
CPU SOCKET
EXTERNAL
CLK GEN.
SLG8SP626 / ICS9LPRS488
ATI
NB
RS880M
ATI
SB
SB820M
CPU_CLKP/N
200MHz
14.31818MHz
RTC SATA
VGA
ATI
Park
B_SODIMM
MEM_MA_CLK7_P/N
1066MHz
1066MHz
MEM_MA_CLK1_P/N
MEM_MB_CLK1_P/N
MEM_MB_CLK7_P/N
AMD
CLK_SBLINK_BCLK
100MHz
100MHz
CLK_NBGFX
100MHz
CLK_NBHT
14.318MHZ
CLK_NB_14.318M
AMD
AMD
AMD
CLK_SBSRC_BCLK
100MHz
CLK_48M_USB
48MHz
CLK_PEG_VGA
100MHz
WWAN
Mini PCI Socket
CardReader
100MHz
100MHz
100MHz
48MHz
CLK_PCIE_LAN
CLK_PCIE_MINI1
CLK_PCIE_WWAN
CLK_48M_SD
32.768K Hz 25MHz
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
Notes List
B
454Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
Notes List
B
454Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
Notes List
B
454Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
STATE SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
100K +/- 5%Ra/Rc/Re
Board ID
Rb / Rd / Rf V min
0
1
2
3
0
8.2K +/- 5%
0 V
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
0.503 V
0.819 V
0.538 V
0.875 V
AD_BID
V typ
AD_BID
V
AD_BID
max
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
3.300 V
0 V 0 V
4
5
6
7NC
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
2.200 V
3.300 V
2.341 V
1.185 V 1.264 V
Board ID
0
1
2
3
4
5
6
7
PCB Revision
BOARD ID Table BTO Option Table
BTO Item BOM Structure
1101 001Xb
OFF OFF
+0.9V 0.9V switched power rail for DDR terminator
+RTCVCC RTC power
+1.5VS
+1.8VS 1.8V switched power rail
+2.5VS
+5VS
+3VS
+5VALW
+1.8V
2.5V for CPU_VDDA
+3VALW
1.8V power rail for CPU VDDIO and DDR
3.3V always on power rail
5V always on power rail
3.3V switched power rail
5V switched power rail
+VSB VSB always on power rail ON ON*
ONON
ON
ON
EC SM Bus1 address
Device
SB820
SM Bus 1 address
ON
OFF
OFF
DDR DIMM1
1001 000Xb
DDR DIMM2
1001 010Xb
1.5V power rail for PCIE Card
+CPU_CORE_0
SB820
SM Bus 0 address
Device
Clock Generator
(SILEGO SLG8SP626)
Address
Address Address
Voltage Rails
VIN
B+
+1.1VS
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU (0.7-1.2V)
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
ON
+VGA_CORE OFFOFFON
1.1V switched power rail for NB VDDC & VGA
ON
+CPU_CORE_1 Core voltage for CPU (0.7-1.2V) ON OFF OFF
+CPU_CORE_NB Voltage for On-die Northbridge of CPU(0.8-1.1V) ON OFF OFF
ADI ADM1032 (CPU)
+1.2V_HT 1.2V switched power rail ON OFF OFF
ON ON*
ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON ON
S1 S3 S5
ON OFF
ON
N/A N/A N/A
N/AN/AN/A
Power Plane Description
EC SM Bus2 address
Device
Smart Battery
OFF
OFF
ON
OFF
OFF
OFF
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
OFFON
ON
ON
ON
OFF
ON*
OFF
OFF
ON
Device Address
ON
1001 100X b0001 011X b
0.95-1.2V switched power rail
HEX
98H
9AH
GMT G781-1 (GPU)
1001 101X b
16H
HEX
D2
HEX
90
94
Mini card
98H
SB-Temp Sensor
Project ID Table
Board ID
0
1
2
3
4
5
6
7
PCB Revision
BOM Config
PowerXpress(Muxless):VB@/UMALVDS@/UMAHDMI@/UMACRT@/SP@/BT@/VGA@/MUXLESS@/PARK@
PowerXpress (MUX): VGA@/PARK@/MUX@/BT@/SP@/VB@
UMA : VB@/UMALVDS@/UMAHDMI@/UMACRT@/UMA@/SP@/BT@
0.1
0.2
0.3
1.0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
POWER DELIVERY CHART
Custom
554Wednesday, April 21, 2010
2009/3/8 2010/03/12
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
POWER DELIVERY CHART
Custom
554Wednesday, April 21, 2010
2009/3/8 2010/03/12
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
POWER DELIVERY CHART
Custom
554Wednesday, April 21, 2010
2009/3/8 2010/03/12
PU10
APL5913
EC
ENE KB926
1.5V
0.75V
+1.5VS 500mA
+3.3VS 1A+3.3VS 300mA +3.3VALW 330mA
+3.3VS 3mA
+3.3VALW 30mA
SATA
+5V 45mA
+3.3VS 25mA
+3.3VALW 201mA
Audio AMP
TPA6017A2
+5V 25mA
+3.3 350mA
B+ 300mA
LCD panel
15.6"
+5V 3A
+3.3V
BATTERY
12.6V
PU5
CHARGER
ISL6261AHAZ-T
ICS9LPRS488B
+3.3V 400mA
AC ADAPTOR
19V 90W
LAN
Atheros AR8114
RAM DDRIII SODIMMX2
VDD_MEM 4A
FAN Control
APL5607
+5VS 500mA
Audio Codec
ALC272 RTC
Bettary
VTT_MEM 0.5A
+5V
Dual+1
2.5A
USB X3 Realtek
RTS5159 Mini Card
+1.1V
BATT+
VIN
VDD CORE 36A
VDDNB 4A
VDDIO 3A
VDDR 1.5A
VDDA 250mA
VLDT 1.5A
AMD CPU S1G4
0.7~1.3V
0.8~1.2V
2.5V
1.5V
1.05V
1.1V
VDDIO_AZ_S
VDDAN_11_PCIE 1A
SouthBridge AMD SB820M
VDDPL_33_PCIE 0.030A
VDDAN_33_USB_S 0.2A
VDDAN_11_SATA 0.8A
VDDIO_33_S
VDDIO_33_PCIGP 0.020A
VDDRF_GBE_S
VDDCR_11 1.1V 0.5A
VDDAN_11_USB_S 200mA
VDDIO_18_FC
VDDPL_33_SATA 0.020A
VDDAN_11_CLK 0.4A
VDDCR_11_USB_S 197mA
VDDIO_33_GBE_S
VDDCR_11_GBE_S
VDDIO_GBE_S
VDDCR_11_S 113mA
VDDPL_11_SYS_S
VDDPL_33_SYS
VDDPL_33_USB_S
VDDAN_33_S
VDDXL_33_S
1.1V_S5
1.1V_S0
3.3V_S5
3.3V_S0
No Use
VDDBT_RTC_G2.5~3.6V
BAT
VGA ATI Madison / Park
TSVDD 5 mA
PCIE_VDDC 2 A
SPV10 100 mA
MPV18 150 mA
DPLL_VDDC 125 mA
SPV18 50 mA
DPLL_PVDD 75 mA
DP[F:A]_PVDD 20 mA
VDDCI 4 A
VDDR1 TBD A
PCIE_PVDD 40 mA
PCIE_VDDR 400 mA
DP[F:A]_VDD18 330 mA
VDDC 29 A
VDD_CT 17 mA
VDDR3 60 mA
DP[F:A]_VDD10 230 mA
NorthBridge AMD RS880M
VDDPCIE 1.1A
VDDHTTX 0.68A
PLLs 0.1A
VDDC 1.0V-1.1V 7.6A
VDDHTRX+HT 0.68A
AVDD 0.125A
VDDA18 0.64A
VDDG33 0.06A
VDDG18 0.005A
VDD18_MEM 1.8V 0.005A
VDD_MEM 1.8V 0.23A
VDDLT18 0.22A
VDDLT33 0A
PLLs 0.23A
1.1V_S0
1.8V_S0
1.0~1.1V
3.3V_S0
No Use
VDD1DI 45 mA
VDD2DI 50 mA
AVDD 70 mA
VDDR4 TBD mA
A2VDDQ 1.5 mA
A2VDD 130 mA
1.0V
3.3V
0.85~1.1V
1.5V
1.8V
VRAM 1GB
64Mx16 (K4B1G1646E) * 8
1.5V 2.4 A
B+
PU15
ISL6265IRZ-T
+CPU_CORE
+NB_CORE
+CPU_CORE_NB
+GPU_CORE +VDDCI
+5VALW
+3VALW
PU4
SN0806081 RHBR
PU17
APW7138NITRL
PU8
RT8209BGQW
+1.5V
PU7
RT8209BGQW
+1.1VALW
PU6
RT8209BGQW
+1VSG
PU10
APL5913
+0.75VS
PU12
APL5915
+1.05VS
PU19
TSP51117RGYR
U35
SI4800BDY
+1.5VS
+1.5V
+3VS
+5VS
U36
SI4800BDY
+1.1VS
+1.1VS
+1.1VALW
+1.1VALW
+1.8VSP1
+3VALW
+1.5VS
U37
SI1800BDY
+1.5V
+2.5VS
PU16
APL5508-25DC
+1.8VSP2
PU14
APL5913
PU11
MP2121DQ
+1.8VS
U34
SI4800BDY
+INVPWR_B+
+USB_VCCA
+USB_VCCB
U25/U40
TPS2061DRG4
+CPU_CORE
+CPU_CORE_NB
+1.1VS
+1.05VS
Delay
+3VS_DELAY
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_CADIN1
H_CADIN0
H_CADIP3
H_CADIN2
H_CADIP2
H_CADIP1
H_CADIN3
H_CADIP4
H_CADIN5
H_CADIN4
H_CADIP5
H_CADIN6
H_CADIN8
H_CADIN7
H_CADIN9
H_CADIP8
H_CADIP6
H_CADIP7
H_CADIN10
H_CADIP10
H_CADIN11
H_CADIP11
H_CADIP9
H_CADIN13
H_CADIN12
H_CADIP14
H_CADIP12
H_CADIN14
H_CADIP0
H_CADIN15
H_CADIP15
H_CADIP13
H_CADON15
H_CADOP13
H_CADON2
H_CADON3
H_CADON9
H_CADON6
H_CADON0
H_CADOP11
H_CADOP8
H_CADOP6
H_CADON13
H_CADOP1
H_CADOP2
H_CADOP4
H_CADOP5
H_CADON12
H_CADON7
H_CADON5
H_CADON10
H_CADON8
H_CADON4
H_CADON1
H_CADOP12
H_CADOP15
H_CADOP9
H_CADOP10
H_CADOP14
H_CADOP7
H_CADOP3
H_CADOP0
H_CADON14
H_CADON11
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADIP[0..15]
H_CADON[0..15] 12H_CADIN[0..15]12
H_CADOP[0..15] 12
H_CLKIN012
H_CLKIN112
H_CLKIP112
H_CTLIN112
H_CLKIP012
H_CTLIP112 H_CTLOP1 12
H_CLKOP1 12
H_CADIP[0..15]12
H_CLKOP0 12
H_CLKON0 12
H_CLKON1 12
H_CTLON1 12
H_CTLOP0 12
H_CTLON0 12H_CTLIN012
H_CTLIP012
+1.1VS
+1.1VS
+1.1VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 HT I/F
Custom
654Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 HT I/F
Custom
654Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 HT I/F
Custom
654Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
250 mil
Near CPU Socket
VLDT CAP.
TBD
HT LINK
JCPU1A
FOX_PZ6382A-284S-41F_Champlian
CONN@
HT LINK
JCPU1A
FOX_PZ6382A-284S-41F_Champlian
CONN@
VLDT_A3
D4 VLDT_A2
D3 VLDT_A1
D2 VLDT_A0
D1
VLDT_B3 AE5
VLDT_B2 AE4
VLDT_B1 AE3
VLDT_B0 AE2
L0_CADIN_H15
N5
L0_CADIN_L15
P5
L0_CADIN_H14
M3
L0_CADIN_L14
M4
L0_CADIN_H13
L5
L0_CADIN_L13
M5
L0_CADIN_H12
K3
L0_CADIN_L12
K4
L0_CADIN_H11
H3
L0_CADIN_L11
H4
L0_CADIN_H10
G5
L0_CADIN_L10
H5
L0_CADIN_H9
F3
L0_CADIN_L9
F4
L0_CADIN_H8
E5
L0_CADIN_L8
F5
L0_CADIN_H7
N3
L0_CADIN_L7
N2
L0_CADIN_H6
L1
L0_CADIN_L6
M1
L0_CADIN_H5
L3
L0_CADIN_L5
L2
L0_CADIN_H4
J1
L0_CADIN_L4
K1
L0_CADIN_H3
G1
L0_CADIN_L3
H1
L0_CADIN_H2
G3
L0_CADIN_L2
G2
L0_CADIN_H1
E1
L0_CADIN_L1
F1
L0_CADIN_H0
E3
L0_CADIN_L0
E2
L0_CADOUT_H15 T4
L0_CADOUT_L15 T3
L0_CADOUT_H14 V5
L0_CADOUT_L14 U5
L0_CADOUT_H13 V4
L0_CADOUT_L13 V3
L0_CADOUT_H12 Y5
L0_CADOUT_L12 W5
L0_CADOUT_H11 AB5
L0_CADOUT_L11 AA5
L0_CADOUT_H10 AB4
L0_CADOUT_L10 AB3
L0_CADOUT_H9 AD5
L0_CADOUT_L9 AC5
L0_CADOUT_H8 AD4
L0_CADOUT_L8 AD3
L0_CADOUT_H7 T1
L0_CADOUT_L7 R1
L0_CADOUT_H6 U2
L0_CADOUT_L6 U3
L0_CADOUT_H5 V1
L0_CADOUT_L5 U1
L0_CADOUT_H4 W2
L0_CADOUT_L4 W3
L0_CADOUT_H3 AA2
L0_CADOUT_L3 AA3
L0_CADOUT_H2 AB1
L0_CADOUT_L2 AA1
L0_CADOUT_H1 AC2
L0_CADOUT_L1 AC3
L0_CADOUT_H0 AD1
L0_CADOUT_L0 AC1
L0_CLKIN_H1
J5
L0_CLKIN_L1
K5
L0_CLKIN_H0
J3
L0_CLKIN_L0
J2
L0_CTLIN_H1
P3
L0_CTLIN_L1
P4
L0_CTLIN_H0
N1
L0_CTLIN_L0
P1
L0_CLKOUT_H1 Y4
L0_CLKOUT_L1 Y3
L0_CLKOUT_H0 Y1
L0_CLKOUT_L0 W1
L0_CTLOUT_H1 T5
L0_CTLOUT_L1 R5
L0_CTLOUT_H0 R2
L0_CTLOUT_L0 R3
C4
0.22U_0603_16V4Z
C4
0.22U_0603_16V4Z
1
2
C6
180P_0402_50V8J
C6
180P_0402_50V8J
1
2
C1
10U_0805_10V4Z
C1
10U_0805_10V4Z
1
2
C7
10U_0805_10V4Z
C7
10U_0805_10V4Z
12
C3
0.22U_0603_16V4Z
C3
0.22U_0603_16V4Z
1
2
C2
10U_0805_10V4Z
C2
10U_0805_10V4Z
1
2C5
180P_0402_50V8J
C5
180P_0402_50V8J
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRB_SMA10
DDRB_SMA7
DDRB_SMA1
DDRB_SMA12
DDRB_SMA6
DDRB_SMA11
DDRB_SMA0
DDRB_SMA9
DDRB_SMA15
DDRB_SMA3
DDRB_SMA5
DDRB_SMA8
DDRB_SMA13
DDRB_SMA2
DDRB_SMA4
DDRB_CKE1
DDRB_SDQ0
DDRB_CKE0
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS7
DDRB_SDQS7#
DDRB_SDQS3
DDRB_SDQS3#
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7#
DDRA_SDQS7
MEMZP
MEMZN
MEM_VREF
DDRB_ODT0
DDRB_ODT1
DDRA_ODT1
DDRA_ODT0
DDRA_CKE0
DDRA_CKE1
DDRB_SDM6
DDRB_SDM4
DDRB_SDM2
DDRB_SDM0
DDRB_SDM5
DDRB_SDM3
DDRB_SDM1
DDRB_SDM7
DDRA_SDM6
DDRA_SDM5
DDRA_SDM4
DDRA_SDM3
DDRA_SDM2
DDRA_SDM1
DDRA_SDM0
DDRA_SDM7
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRA_SWE#
DDRA_SCAS#
DDRA_SRAS#
DDRA_SBS2#
DDRA_SBS1#
DDRA_SBS0#
DDRA_SMA15
DDRA_SMA12
DDRA_SMA14
DDRA_SMA13
DDRA_SMA11
DDRA_SMA10
DDRA_SMA6
DDRA_SMA1
DDRA_SMA7
DDRA_SMA2
DDRA_SMA3
DDRA_SMA8
DDRA_SMA5
DDRA_SMA4
DDRA_SMA9
DDRA_SMA0
DDRB_SMA14
DDRA_SCS1# DDRB_SCS0#
DDRB_SCS1#
DDRA_SCS0#
MEM_VREF
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
VTT_SENSE
DDRA_CLK0#
DDRA_CLK0
DDRA_CLK1#
DDRA_CLK1
DDRB_CLK0#
DDRB_CLK0
DDRB_CLK1
DDRB_CLK1#
MEM_MA_RST#
MEM_MB_RST#
DDRB_CKE1 11
DDRB_CKE0 11
DDRA_SCS0#10
DDRA_SCS1#10 DDRB_SCS0# 11
DDRB_SCS1# 11
DDRB_SDQ[63..0]11
DDRB_SDM[7..0]11 DDRA_SDM[7..0] 10
DDRA_SDQ[63..0] 10
DDRB_SDQS711
DDRB_SDQS7#11
DDRB_SDQS611
DDRB_SDQS511
DDRB_SDQS411
DDRB_SDQS311
DDRB_SDQS211
DDRB_SDQS111
DDRB_SDQS011
DDRB_SDQS6#11
DDRB_SDQS5#11
DDRB_SDQS4#11
DDRB_SDQS3#11
DDRB_SDQS2#11
DDRB_SDQS1#11
DDRB_SDQS0#11
DDRA_SDQS3 10
DDRA_SDQS2 10
DDRA_SDQS1 10
DDRA_SDQS0 10
DDRA_SDQS3# 10
DDRA_SDQS2# 10
DDRA_SDQS1# 10
DDRA_SDQS0# 10
DDRA_SDQS4 10
DDRA_SDQS4# 10
DDRA_SDQS5 10
DDRA_SDQS5# 10
DDRA_SDQS6 10
DDRA_SDQS6# 10
DDRA_SDQS7 10
DDRA_SDQS7# 10
DDRB_SRAS# 11
DDRB_SCAS# 11
DDRB_SWE# 11
DDRB_SBS0# 11
DDRB_SBS1# 11
DDRB_SBS2# 11
DDRA_SRAS#10
DDRA_SCAS#10
DDRA_SWE#10
DDRA_SBS0#10
DDRA_SBS1#10
DDRA_SBS2#10
DDRA_SMA[15..0]10 DDRB_SMA[15..0] 11
DDRB_ODT0 11
DDRB_ODT1 11
DDRA_ODT010
DDRA_ODT110
DDRA_CKE010
DDRA_CKE110
DDRA_CLK010
DDRA_CLK0#10
DDRA_CLK110
DDRA_CLK1#10
DDRB_CLK0 11
DDRB_CLK0# 11
DDRB_CLK1 11
DDRB_CLK1# 11
MEM_MA_RST#10
MEM_MB_RST# 11
+1.5V
+CPU_VDDR+CPU_VDDR
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 DDRII I/F
Custom
754Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 DDRII I/F
Custom
754Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 DDRII I/F
Custom
754Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Place them
close to CPU
within 1"
Processor DDR3 Memory Interface
VDDR: DDR3 under 1033MHz
set to 0.9V to save power
1.5A
12/07 reseve 10uF cap.(AMD)
R4 39.2_0402_1%R4 39.2_0402_1%
1 2
R5 39.2_0402_1%R5 39.2_0402_1%
1 2
MEM:CMD/CTRL/CLK
JCPU1B
FOX_PZ6382A-284S-41F_Champlian
CONN@
MEM:CMD/CTRL/CLK
JCPU1B
FOX_PZ6382A-284S-41F_Champlian
CONN@
VDDR1
D10
VDDR2
C10
VDDR3
B10
VDDR4
AD10
VDDR5 W10
VDDR6 AC10
VDDR7 AB10
VDDR8 AA10
VDDR9 A10
MA1_ODT1
V19 MA1_ODT0
U21 MA0_ODT1
V22 MA0_ODT0
T19
MB1_ODT0 Y26
MB0_ODT1 W23
MB0_ODT0 W26
MB_RESET_L B18
MB1_CS_L0 U22
MB0_CS_L1 W25
MB0_CS_L0 V26
MA0_CS_L1
U19
MA1_CS_L1
V20 MA1_CS_L0
U20
MA0_CS_L0
T20
MA_ADD15
K19 MA_ADD14
K24 MA_ADD13
V24 MA_ADD12
K20 MA_ADD11
L22 MA_ADD10
R21 MA_ADD9
K22 MA_ADD8
L19 MA_ADD7
L21 MA_ADD6
M24 MA_ADD5
L20 MA_ADD4
M22 MA_ADD3
M19 MA_ADD2
N22 MA_ADD1
M20 MA_ADD0
N21
MA_BANK2
J21 MA_BANK1
R23 MA_BANK0
R20
MA_RAS_L
R19
MA_CAS_L
T22
MA_WE_L
T24
MEMZP
AF10
MEMZN
AE10 VDDR_SENSE Y10
MEMVREF W17
MA_CLK_H4
P19
MA_CLK_L4
P20
MA_CLK_H7
Y16
MA_CLK_L7
AA16
MA_CLK_H1
E16
MA_CLK_L1
F16
MA_CLK_H5
N19
MA_CLK_L5
N20
MB_CLK_H4 R26
MB_CLK_L4 R25
MB_CLK_H7 AF18
MB_CLK_L7 AF17
MB_CLK_H1 A17
MB_CLK_L1 A18
MB_CLK_H5 P22
MB_CLK_L5 R22
MA_CKE0
J22
MA_CKE1
J20 MB_CKE0 J25
MB_CKE1 H26
MB_ADD15 J24
MB_ADD14 J23
MB_ADD13 W24
MB_ADD12 L25
MB_ADD11 L26
MB_ADD10 T26
MB_ADD9 K26
MB_ADD8 M26
MB_ADD7 L24
MB_ADD6 N25
MB_ADD5 L23
MB_ADD4 N26
MB_ADD3 N23
MB_ADD2 P26
MB_ADD1 N24
MB_ADD0 P24
MB_BANK2 J26
MB_BANK1 U26
MB_BANK0 R24
MB_RAS_L U25
MB_CAS_L U24
MB_WE_L U23
MA_RESET_L
H16
R1059
0_0402_5%
R1059
0_0402_5%
1 2
R1
1K_0402_1%
R1
1K_0402_1%
1 2
C8
1000P_0402_25V8J
C8
1000P_0402_25V8J
1
2
C1250
10U_0805_10V4Z
@
C1250
10U_0805_10V4Z
@1
2T1PAD T1PAD
R2
1K_0402_1%
R2
1K_0402_1%
1 2
MEM:DATA
JCPU1C
FOX_PZ6382A-284S-41F_Champlian
CONN@
MEM:DATA
JCPU1C
FOX_PZ6382A-284S-41F_Champlian
CONN@
MB_DATA63
AD11 MB_DATA62
AF11 MB_DATA61
AF14 MB_DATA60
AE14 MB_DATA59
Y11 MB_DATA58
AB11 MB_DATA57
AC12 MB_DATA56
AF13 MB_DATA55
AF15 MB_DATA54
AF16 MB_DATA53
AC18 MB_DATA52
AF19 MB_DATA51
AD14 MB_DATA50
AC14 MB_DATA49
AE18 MB_DATA48
AD18 MB_DATA47
AD20 MB_DATA46
AC20 MB_DATA45
AF23 MB_DATA44
AF24 MB_DATA43
AF20 MB_DATA42
AE20 MB_DATA41
AD22 MB_DATA40
AC22 MB_DATA39
AE25 MB_DATA38
AD26 MB_DATA37
AA25 MB_DATA36
AA26 MB_DATA35
AE24 MB_DATA34
AD24 MB_DATA33
AA23 MB_DATA32
AA24 MB_DATA31
G24 MB_DATA30
G23 MB_DATA29
D26 MB_DATA28
C26 MB_DATA27
G26 MB_DATA26
G25 MB_DATA25
E24 MB_DATA24
E23 MB_DATA23
C24 MB_DATA22
B24 MB_DATA21
C20 MB_DATA20
B20 MB_DATA19
C25 MB_DATA18
D24 MB_DATA17
A21 MB_DATA16
D20 MB_DATA15
D18 MB_DATA14
C18 MB_DATA13
D14 MB_DATA12
C14 MB_DATA11
A20 MB_DATA10
A19 MB_DATA9
A16 MB_DATA8
A15 MB_DATA7
A13 MB_DATA6
D12 MB_DATA5
E11 MB_DATA4
G11 MB_DATA3
B14 MB_DATA2
A14 MB_DATA1
A11 MB_DATA0
C11
MA_DATA63 AA12
MA_DATA62 AB12
MA_DATA61 AA14
MA_DATA60 AB14
MA_DATA59 W11
MA_DATA58 Y12
MA_DATA57 AD13
MA_DATA56 AB13
MA_DATA55 AD15
MA_DATA54 AB15
MA_DATA53 AB17
MA_DATA52 Y17
MA_DATA51 Y14
MA_DATA50 W14
MA_DATA49 W16
MA_DATA48 AD17
MA_DATA47 Y18
MA_DATA46 AD19
MA_DATA45 AD21
MA_DATA44 AB21
MA_DATA43 AB18
MA_DATA42 AA18
MA_DATA41 AA20
MA_DATA40 Y20
MA_DATA39 AA22
MA_DATA38 Y22
MA_DATA37 W21
MA_DATA36 W22
MA_DATA35 AA21
MA_DATA34 AB22
MA_DATA33 AB24
MA_DATA32 Y24
MA_DATA31 H22
MA_DATA30 H20
MA_DATA29 E22
MA_DATA28 E21
MA_DATA27 J19
MA_DATA26 H24
MA_DATA25 F22
MA_DATA24 F20
MA_DATA23 C23
MA_DATA22 B22
MA_DATA21 F18
MA_DATA20 E18
MA_DATA19 E20
MA_DATA18 D22
MA_DATA17 C19
MA_DATA16 G18
MA_DATA15 G17
MA_DATA14 C17
MA_DATA13 F14
MA_DATA12 E14
MA_DATA11 H17
MA_DATA10 E17
MA_DATA9 E15
MA_DATA8 H15
MA_DATA7 E13
MA_DATA6 C13
MA_DATA5 H12
MA_DATA4 H11
MA_DATA3 G14
MA_DATA2 H14
MA_DATA1 F12
MA_DATA0 G12
MB_DM7
AD12 MB_DM6
AC16 MB_DM5
AE22 MB_DM4
AB26 MB_DM3
E25 MB_DM2
A22 MB_DM1
B16 MB_DM0
A12
MB_DQS_H7
AF12
MB_DQS_L7
AE12
MB_DQS_H6
AE16
MB_DQS_L6
AD16
MB_DQS_H5
AF21
MB_DQS_L5
AF22
MB_DQS_H4
AC25
MB_DQS_L4
AC26
MB_DQS_H3
F26
MB_DQS_L3
E26
MB_DQS_H2
A24
MB_DQS_L2
A23
MB_DQS_H1
D16
MB_DQS_L1
C16
MB_DQS_H0
C12
MB_DQS_L0
B12
MA_DM7 Y13
MA_DM6 AB16
MA_DM5 Y19
MA_DM4 AC24
MA_DM3 F24
MA_DM2 E19
MA_DM1 C15
MA_DM0 E12
MA_DQS_H7 W12
MA_DQS_L7 W13
MA_DQS_H6 Y15
MA_DQS_L6 W15
MA_DQS_H5 AB19
MA_DQS_L5 AB20
MA_DQS_H4 AD23
MA_DQS_L4 AC23
MA_DQS_H3 G22
MA_DQS_L3 G21
MA_DQS_H2 C22
MA_DQS_L2 C21
MA_DQS_H1 G16
MA_DQS_L1 G15
MA_DQS_H0 G13
MA_DQS_L0 H13
C9
0.01U_0402_25V7K
C9
0.01U_0402_25V7K
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CPU_TDO
CPU_HTREF0
CPU_HTREF1
CPU_DBRDY
CPU_TMS
CPU_TEST19
CPU_CLKIN_SC_P
CPU_THERMTRIP#_R
LDT_RST#
H_PWRGD
LDT_STOP#
LDT_STOP#
CPU_CLKIN_SC_N
CPU_TDI
CPU_TRST#
CPU_TCK
CPU_DBREQ#
CPU_TDO
CPU_SVC
CPU_SVD
CPU_TEST20
CPU_TEST21
CPU_TEST24
CPU_TEST22
CPU_TEST29_L_FBCLKOUT_N
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST17
CPU_TEST16
CPU_TEST14
CPU_TEST15
LDT_RST#
H_PWRGD
LDT_RST#
CPU_SVC
CPU_SVD
CPU_TEST27
H_PROCHOT#
THERMDA_CPU
THERMDC_CPU
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
CPU_VDD0_FB_H
CPU_VDD0_FB_L
CPU_TEST18
HDT_RST#
CPU_TEST12
CPU_TEST25H
CPU_TEST25L
CPU_TEST20
CPU_TEST21
CPU_TRST#
CPU_TDI
CPU_TMS
CPU_TCK
CPU_DBRDY
THERMDA_CPU
THERMDC_CPU
H_PROCHOT#
CPU_TEST22
CPU_TEST24
CPU_DBREQ#
CPU_TEST25H
CPU_TEST25L
CPU_THERMTRIP#_R
CPU_TEST19
CPU_TEST18
CPU_TEST12
CPU_TEST27
CPU_VDD1_FB_L
CPU_VDD1_FB_H
CPU_TEST23
CPU_TEST23
CPU_SID
CPU_SIC
CPU_ALERT
SB_SID
SB_SIC
CPU_SID
CPU_SIC
EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA
EC_SMB_CK
H_PWRGD25
LDT_STOP#13,25
LDT_RST#25
SB_PWRGD 13,26,34
CPU_VDDNB_FB_H 50
CPU_VDDNB_FB_L 50
CPU_VDD0_FB_H50
CPU_VDD0_FB_L50
CLK_CPU_BCLK25
CLK_CPU_BCLK#25
EC_SMB_DA2 17,34
EC_SMB_CK2 17,34
CPU_SVD 50
CPU_SVC 50
H_PROCHOT_R# 25
H_THERMTRIP# 26
MAINPWON 42,43,47
CPU_VDD1_FB_H50
CPU_VDD1_FB_L50
SB_SID 26
SB_SIC 26
+1.1VS
+2.5VDDA
+2.5VS
+3VS
+1.5V
+1.5VS
+1.5VS
+1.5VS
+3VS
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 CTRL
Custom
854Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 CTRL
Custom
854Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 CTRL
Custom
854Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
VDDA=0.25A
Address
1001 100X b
Champlain: C1E
C1E: LDT_REQ# no connect
CLMC: LDT_REQ# connect to NB
LDT_RES# / MEMHOT#
no support in S1g4
PROCHOT:
Input: For HTC Function
Output: Over Temperature Condition
For SCAN connect use
11/10 Remove R36,R37,R38,R39
Follow CRB HDT design
12/03 add CPU_ALERT
DVT 0131 update C11 to SGA00002N80
PVT 20100304 change to 100pF
T0 SB
CPU internal thermal sensor
FDV301N, the Vgs is:
min = 0.65V
Typ = 0.85V
Max = 1.5V
2.09V for Gate
TO EC
TO EC
T0 SB
PVT 20100304 Add CPU Int. Thermal sensor circuit
Pre MP unstuff CPU Int. Thermal sensor circuit
PVT 20100312 add Res.
R8 0_0402_5%R8 0_0402_5%
1 2
R26 510_0402_5%@R26 510_0402_5%@
1 2
R1123 0_0402_5%
@
R1123 0_0402_5%
@
1 2
R24 0_0402_5%R24 0_0402_5%
1 2
R33 1K_0402_5%R33 1K_0402_5%
1 2
R40300_0402_5%
HDT@
R40300_0402_5%
HDT@
1 2
R1120
34.8K_0402_1%
@
R1120
34.8K_0402_1%
@
12
SAMTEC_ASP-68200-07
JP2
CONN@ SAMTEC_ASP-68200-07
JP2
CONN@
2
4
6
8
10
12
14
16
18
20
22
2423
21
19
17
15
13
11
9
7
5
3
1
26
R25 80.6_0402_1%R25 80.6_0402_1%
12
R35 1K_0402_5%R35 1K_0402_5%
1 2
JCPU1D
FOX_PZ6382A-284S-41F_Champlian
CONN@
JCPU1D
FOX_PZ6382A-284S-41F_Champlian
CONN@
VDDA1
F8
VDDA2
F9
RESET_L
B7
PWROK
A7
LDTSTOP_L
F10
SIC
AF4
SID
AF5
HT_REF1
P6 HT_REF0
R6
VDD0_FB_H
F6
VDD0_FB_L
E6 VDDIO_FB_H W9
VDDIO_FB_L Y9
THERMTRIP_L AF6
PROCHOT_L AC7
RSVD2
A5
LDTREQ_L
C6
SVC A6
SVD A4
RSVD6 C5
RSVD4
B5
RSVD1
A3
CLKIN_H
A9
CLKIN_L
A8
DBRDY
G10
TMS
AA9
TCK
AC9
TRST_L
AD9
TDI
AF9
DBREQ_L E10
TDO AE9
TEST25_H
E9
TEST25_L
E8
TEST19
G9 TEST18
H10
RSVD8 AA7
TEST9
C2
TEST17 D7
TEST16 E7
TEST15 F7
TEST14 C7
TEST12
AC8
TEST7 C3
TEST6
AA6
THERMDC W7
THERMDA W8
VDD1_FB_H
Y6
VDD1_FB_L
AB6
TEST29_H C9
TEST29_L C8
TEST24
AE7
TEST23
AD7
TEST22
AE8
TEST21
AB8
TEST20
AF7
TEST28_H J7
TEST28_L H8
TEST27
AF8
ALERT_L
AE6
TEST10 K8
TEST8 C4
RSVD3
B3
RSVD5
C1
VDDNB_FB_H H6
VDDNB_FB_L G6
RSVD7 D5
RSVD11 W18
MEMHOT_L AA8
RSVD10 H18
RSVD9 H19
VSS M11
T8PAD T8PAD
R30 1K_0402_5%R30 1K_0402_5%
1 2
R28 1K_0402_5%R28 1K_0402_5%
1 2
C1267
0.1U_0402_16V4Z@
C1267
0.1U_0402_16V4Z@
1 2
R22 510_0402_5%R22 510_0402_5%
1 2
R18
300_0402_5%
R18
300_0402_5%
1 2
R36 1K_0402_5%@R36 1K_0402_5%@
1 2
R1121 0_0402_5%
@
R1121 0_0402_5%
@
1 2
T3PAD T3PAD
R43
0_0402_5%@
R43
0_0402_5%@
1 2
R1136 0_0402_5%R1136 0_0402_5%
1 2
U1
ADM1032ARMZ_MSOP8
U1
ADM1032ARMZ_MSOP8
VDD
1
ALERT# 6
THERM#
4GND 5
D+
2
D-
3
SCLK 8
SDATA 7
C21 1.5P_0402_50V9CC21 1.5P_0402_50V9C
1 2
T6PAD T6PAD
R31 1K_0402_5%R31 1K_0402_5%
1 2
R29 1K_0402_5%R29 1K_0402_5%
1 2
R19 1K_0402_5%R19 1K_0402_5%
1 2
T7PAD T7PAD
G
D
S
Q86 FDV301N_NL_SOT23-3
@
G
D
S
Q86 FDV301N_NL_SOT23-3
@
2
13
R21
300_0402_5%
R21
300_0402_5%
1 2
R9 0_0402_5%@R9 0_0402_5%@
1 2
R1135 0_0402_5%R1135 0_0402_5%
1 2
R1119
20K_0402_5%
@
R1119
20K_0402_5%
@12
E
B
C
Q1
MMBT3904_NL_SOT23-3
E
B
C
Q1
MMBT3904_NL_SOT23-3
2
3 1
R11 300_0402_5%R11 300_0402_5%
1 2
R27 510_0402_5%R27 510_0402_5%
1 2
R16 44.2_0402_1%R16 44.2_0402_1%
1 2
R20 1K_0402_5%R20 1K_0402_5%
1 2
R15 44.2_0402_1%R15 44.2_0402_1%
1 2
U2
NC7SZ08P5X_NL_SC70-5
HDT@
U2
NC7SZ08P5X_NL_SC70-5
HDT@
B2
A1
Y
4
P5
G
3
R265 1K_0402_5%R265 1K_0402_5%
1 2
C15 3900P_0402_50V7KC15 3900P_0402_50V7K
1 2
R13 0_0402_5%R13 0_0402_5%
1 2
R7
1K_0402_5%
R7
1K_0402_5%
1 2
C16
3900P_0402_50V7K
C16
3900P_0402_50V7K
1 2
C18
0.01U_0402_25V4Z
@
C18
0.01U_0402_25V4Z
@
1
2
R1124 0_0402_5%
@
R1124 0_0402_5%
@
1 2
R32 1K_0402_5%R32 1K_0402_5%
1 2
T2 PADT2 PAD
C14
0.22U_0603_16V4Z
C14
0.22U_0603_16V4Z
1
2
T5PAD T5PAD
R17
300_0402_5%
R17
300_0402_5%
1 2
C124.7U_0805_10V4Z C124.7U_0805_10V4Z
1
2
R6
10K_0402_5%
R6
10K_0402_5%
12
R1122 0_0402_5%
@
R1122 0_0402_5%
@
1 2
C13
3300P_0402_50V7K
C13
3300P_0402_50V7K
1
2
R34 1K_0402_5%R34 1K_0402_5%
1 2
C20
0.1U_0402_16V4Z
C20
0.1U_0402_16V4Z
1
2
+
C11
150U_B2_6.3VM_R35M
+
C11
150U_B2_6.3VM_R35M
1
2
C17
0.01U_0402_25V4Z
@
C17
0.01U_0402_25V4Z
@
1
2
R14 1K_0402_5%R14 1K_0402_5%
1 2
R10
169_0402_1%
R10
169_0402_1%
12
G
D
S
Q85 FDV301N_NL_SOT23-3
@
G
D
S
Q85 FDV301N_NL_SOT23-3
@
2
13
L1
FBMA-L11-201209-221LMA30T_0805
L1
FBMA-L11-201209-221LMA30T_0805
1 2
R23 510_0402_5%@R23 510_0402_5%@
1 2
C19
0.01U_0402_25V4Z
@
C19
0.01U_0402_25V4Z
@
1
2
R12 1K_0402_5%R12 1K_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+CPU_CORE
+CPU_VDDR
+CPU_CORE
+CPU_CORE
+CPU_CORE
+1.5V
+1.5V
+1.5V
+1.5V +1.5V
+CPU_VDDR
+CPU_VDDR
+CPU_CORE_NB
+1.5V
+1.5V
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE_NB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 PWR & GND
Custom
954Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 PWR & GND
Custom
954Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
AMD CPU S1G3 PWR & GND
Custom
954Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Between CPU Socket and DIMM
180PF Qt'y follow the distance between
CPU socket and DIMM0. <2.5inch>
Under CPU Socket
Athlon 64 S1
Processor Socket
Near CPU Socket
VDDR decoupling.
VDD(+CPU_CORE) decoupling.
VDDIO decoupling.
+CPU_CORE_NB decoupling.
Under CPU Socket
Near CPU Socket Right side.
Near CPU Socket Left side.
Near Power Supply
Athlon 64 S1
Processor Socket
4A
36A
TBD
DVT 0131 change C56 to SGA00002N80
C45
22U_0805_6.3V6M
C45
22U_0805_6.3V6M
1
2
C29
22U_0805_6.3V6M
C29
22U_0805_6.3V6M
1
2
C81
1000P_0402_25V8J
C81
1000P_0402_25V8J
1
2
+
C24
330U_X_2VM_R6M
+
C24
330U_X_2VM_R6M
1
2
+
C25
330U_X_2VM_R6M
+
C25
330U_X_2VM_R6M
1
2
C30
22U_0805_6.3V6M
C30
22U_0805_6.3V6M
1
2
C355
0.22U_0603_16V4Z
C355
0.22U_0603_16V4Z
1
2
C52
0.22U_0603_16V4Z
C52
0.22U_0603_16V4Z
1
2
C69
180P_0402_50V8J
C69
180P_0402_50V8J
1
2
C74
4.7U_0805_10V4Z
C74
4.7U_0805_10V4Z
1
2
C62
1000P_0402_25V8J
C62
1000P_0402_25V8J
1
2
C47
0.22U_0603_16V4Z
C47
0.22U_0603_16V4Z
1
2
+
C56
150U_B2_6.3VM_R35M
+
C56
150U_B2_6.3VM_R35M
1
2
C67
0.1U_0402_16V7K
C67
0.1U_0402_16V7K
1
2
C72
4.7U_0805_10V4Z
C72
4.7U_0805_10V4Z
1
2
C28
22U_0805_6.3V6M
C28
22U_0805_6.3V6M
1
2
C48
180P_0402_50V8J
C48
180P_0402_50V8J
1
2
C57
4.7U_0805_10V4Z
C57
4.7U_0805_10V4Z
1
2
C64
0.01U_0402_25V4Z
C64
0.01U_0402_25V4Z
1
2
+
C26
330U_X_2VM_R6M
+
C26
330U_X_2VM_R6M
1
2
C44
22U_0805_6.3V6M
C44
22U_0805_6.3V6M
1
2
C79
0.22U_0603_16V4Z
C79
0.22U_0603_16V4Z
1
2
C354
0.22U_0603_16V4Z
C354
0.22U_0603_16V4Z
1
2
C49
22U_0805_6.3V6M
C49
22U_0805_6.3V6M
1
2
C36
0.22U_0603_16V4Z
C36
0.22U_0603_16V4Z
1
2
C58
4.7U_0805_10V4Z
C58
4.7U_0805_10V4Z
1
2
C63
180P_0402_50V8J
C63
180P_0402_50V8J
1
2
C39
0.22U_0603_16V4Z
C39
0.22U_0603_16V4Z
1
2
C77
4.7U_0805_10V4Z
C77
4.7U_0805_10V4Z
1
2
C66
0.1U_0402_16V7K
C66
0.1U_0402_16V7K
1
2
C83
180P_0402_50V8J
C83
180P_0402_50V8J
1
2
C82
180P_0402_50V8J
C82
180P_0402_50V8J
1
2
C80
1000P_0402_25V8J
C80
1000P_0402_25V8J
1
2
C32
22U_0805_6.3V6M
C32
22U_0805_6.3V6M
1
2
C70
180P_0402_50V8J
C70
180P_0402_50V8J
1
2
C51
0.22U_0603_16V4Z
C51
0.22U_0603_16V4Z
1
2
C54
0.22U_0603_16V4Z
C54
0.22U_0603_16V4Z
1
2
JCPU1F
FOX_PZ6382A-284S-41F_Champlian
CONN@
JCPU1F
FOX_PZ6382A-284S-41F_Champlian
CONN@
VSS1
AA4
VSS2
AA11
VSS3
AA13
VSS4
AA15
VSS5
AA17
VSS6
AA19
VSS7
AB2
VSS8
AB7
VSS9
AB9
VSS10
AB23
VSS11
AB25
VSS12
AC11
VSS13
AC13
VSS14
AC15
VSS15
AC17
VSS16
AC19
VSS17
AC21
VSS18
AD6
VSS19
AD8
VSS20
AD25
VSS21
AE11
VSS22
AE13
VSS23
AE15
VSS24
AE17
VSS25
AE19
VSS26
AE21
VSS27
AE23
VSS28
B4
VSS29
B6
VSS30
B8
VSS31
B9
VSS32
B11
VSS33
B13
VSS34
B15
VSS35
B17
VSS36
B19
VSS37
B21
VSS38
B23
VSS39
B25
VSS40
D6
VSS41
D8
VSS42
D9
VSS43
D11
VSS44
D13
VSS45
D15
VSS46
D17
VSS47
D19
VSS48
D21
VSS49
D23
VSS50
D25
VSS51
E4
VSS52
F2
VSS53
F11
VSS54
F13
VSS55
F15
VSS56
F17
VSS57
F19
VSS58
F21
VSS59
F23
VSS60
F25
VSS61
H7
VSS62
H9
VSS63
H21
VSS64
H23
VSS65
J4
VSS66 J6
VSS67 J8
VSS68 J10
VSS69 J12
VSS70 J14
VSS71 J16
VSS72 J18
VSS73 K2
VSS74 K7
VSS75 K9
VSS76 K11
VSS77 K13
VSS78 K15
VSS79 K17
VSS80 L6
VSS81 L8
VSS82 L10
VSS83 L12
VSS84 L14
VSS85 L16
VSS86 L18
VSS87 M7
VSS88 M9
VSS89 AC6
VSS90 M17
VSS91 N4
VSS92 N8
VSS93 N10
VSS94 N16
VSS95 N18
VSS96 P2
VSS97 P7
VSS98 P9
VSS99 P11
VSS100 P17
VSS101 R8
VSS102 R10
VSS103 R16
VSS104 R18
VSS105 T7
VSS106 T9
VSS107 T11
VSS108 T13
VSS109 T15
VSS110 T17
VSS111 U4
VSS112 U6
VSS113 U8
VSS114 U10
VSS115 U12
VSS116 U14
VSS117 U16
VSS118 U18
VSS119 V2
VSS120 V7
VSS121 V9
VSS122 V11
VSS123 V13
VSS124 V15
VSS125 V17
VSS126 W6
VSS127 Y21
VSS128 Y23
VSS129 N6
C38
180P_0402_50V8J
C38
180P_0402_50V8J
1
2
C33
22U_0805_6.3V6M
C33
22U_0805_6.3V6M
1
2
C37
0.01U_0402_25V4Z
C37
0.01U_0402_25V4Z
1
2
C42
22U_0805_6.3V6M
C42
22U_0805_6.3V6M
1
2
C65
0.01U_0402_25V4Z
C65
0.01U_0402_25V4Z
1
2
C78
0.22U_0603_16V4Z
C78
0.22U_0603_16V4Z
1
2
C71
4.7U_0805_10V4Z
C71
4.7U_0805_10V4Z
1
2
C35
22U_0805_6.3V6M
C35
22U_0805_6.3V6M
1
2
C76
4.7U_0805_10V4Z
C76
4.7U_0805_10V4Z
1
2
+
C23
330U_X_2VM_R6M
+
C23
330U_X_2VM_R6M
1
2
C55
22U_0805_6.3V6M
C55
22U_0805_6.3V6M
1
2
C60
0.22U_0603_16V4Z
C60
0.22U_0603_16V4Z
1
2
C53
0.22U_0603_16V4Z
C53
0.22U_0603_16V4Z
1
2
+
C27
330U_X_2VM_R6M
@
+
C27
330U_X_2VM_R6M
@
1
2
C68
180P_0402_50V8J
C68
180P_0402_50V8J
1
2
C46
0.22U_0603_16V4Z
C46
0.22U_0603_16V4Z
1
2
C41
180P_0402_50V8J
C41
180P_0402_50V8J
1
2
C61
1000P_0402_25V8J
C61
1000P_0402_25V8J
1
2
C73
4.7U_0805_10V4Z
C73
4.7U_0805_10V4Z
1
2
C31
22U_0805_6.3V6M
C31
22U_0805_6.3V6M
1
2
C59
0.22U_0603_16V4Z
C59
0.22U_0603_16V4Z
1
2
JCPU1E
FOX_PZ6382A-284S-41F_Champlian
CONN@
JCPU1E
FOX_PZ6382A-284S-41F_Champlian
CONN@
VDD1_25 AC4
VDD1_26 AD2
VDD0_1
G4
VDD0_2
H2
VDD0_3
J9
VDD0_4
J11
VDD0_5
J13
VDD0_7
K6
VDD0_8
K10
VDD0_9
K12
VDD0_10
K14
VDD0_11
L4
VDD0_12
L7
VDD0_13
L9
VDD0_14
L11
VDD0_15
L13
VDD0_17
M2
VDD0_18
M6
VDD0_19
M8
VDD0_20
M10
VDD0_21
N7
VDD0_22
N9
VDD0_23
N11
VDD1_1 P8
VDD1_2 P10
VDD1_3 R4
VDD1_4 R7
VDD1_5 R9
VDD1_6 R11
VDD1_7 T2
VDD1_8 T6
VDD1_9 T8
VDD1_10 T10
VDD1_11 T12
VDD1_12 T14
VDD1_13 U7
VDD1_14 U9
VDD1_15 U11
VDD1_16 U13
VDD1_18 V6
VDD1_19 V8
VDD1_20 V10
VDD1_21 V12
VDD1_22 V14
VDD1_23 W4
VDD1_24 Y2
VDD0_6
J15
VDDNB_1
K16
VDD0_16
L15
VDDNB_2
M16
VDDNB_3
P16
VDDNB_4
T16
VDD1_17 U15
VDDNB_5
V16
VDDIO1
H25
VDDIO2
J17
VDDIO3
K18
VDDIO4
K21
VDDIO5
K23
VDDIO6
K25
VDDIO7
L17
VDDIO8
M18
VDDIO9
M21
VDDIO10
M23
VDDIO11
M25
VDDIO12
N17 VDDIO13 P18
VDDIO14 P21
VDDIO15 P23
VDDIO16 P25
VDDIO17 R17
VDDIO18 T18
VDDIO19 T21
VDDIO20 T23
VDDIO21 T25
VDDIO22 U17
VDDIO23 V18
VDDIO24 V21
VDDIO25 V23
VDDIO26 V25
VDDIO27 Y25
C34
22U_0805_6.3V6M
C34
22U_0805_6.3V6M
1
2
C43
22U_0805_6.3V6M
C43
22U_0805_6.3V6M
1
2
+
C75
330U_X_2VM_R6M
+
C75
330U_X_2VM_R6M
1
2
C40
0.01U_0402_25V4Z
C40
0.01U_0402_25V4Z
1
2
C50
180P_0402_50V8J
C50
180P_0402_50V8J
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRA_SDQ[0..63]
DDRA_SMA[0..15]
DDRA_SDM[0..7]
DDRA_SDQ36
DDRA_SDQ63
DDRA_SDQ26
DDRA_SDQS6
DDRA_SDQ2
DDRA_SDQ5
DDRA_SDQ22
DDRA_SDQ25
DDRA_SDQ35
DDRA_SMA12
DDRA_SDQ14
DDRA_SDQS0#
DDRA_SDQS4
DDRA_SDM6
DDRA_SDQ42
DDRA_CKE1
DDRA_SDQ27
DDRA_SMA15
DDRA_SDQ31
DDRA_CKE0
DDRA_SDQ12
DDRA_SDQ59
DDRA_SMA3
DDRA_SDQ6
DDRA_SCS1#
DDRA_SDQ39
DDRA_SBS1#
DDRA_SWE#
DDRA_SMA7
DDRA_SDQS0
DDRA_SMA0
DDRA_SDM2
DDRA_SDQS7
DDRA_SDM1
DDRA_SDQ57
DDRA_SDQ46
DDRA_SDQ0
DDRA_SDQ28
DDRA_SDM0
DDRA_SDQS5#
DDRA_SDQ51
DDRA_SDQ19
DDRA_SDM4
DDRA_SDQ4
DDRA_SDQ30
DDRA_SDQS2
DDRA_SDQ44
DDRA_SRAS#
DDRA_SDQ33
DDRA_SDQ58
DDRA_SDM5
DDRA_SDQS3
DDRA_SMA8
DDRA_SCS0#
DDRA_SDQ10
DDRA_SMA6
DDRA_SMA10
DDRA_SDQ3
MEM_MA_RST#
DDRA_SDQS7#
DDRA_SDQS6#
DDRA_SDQ1
DDRA_SDQ40
DDRA_SMA9
DDRA_SDQ16
DDRA_SDQ29
DDRA_SDQS4#
DDRA_SDQ52
DDRA_SDM3
DDRA_SDQS5
DDRA_SDQ54
DDRA_SDQ49
DDRA_SBS2#
DDRA_SDQ45
DDRA_SDQ9
DDRA_SDM7
DDRA_SMA1
DDRA_SDQ7
DDRA_SDQ13
DDRA_SDQ20
DDRA_SDQ60
DDRA_SBS0#
DDRA_SCAS# DDRA_ODT0
DDRA_SDQ37
DDRA_SMA5
DDRA_SDQS1#
DDRA_SMA14
DDRA_SDQ55
DDRA_SMA4
DDRA_SDQ21
DDRA_SDQ62
DDRA_SDQ24
DDRA_SDQ15
DDRA_SDQ56
DDRA_SDQ23
DDRA_SDQ53
DDRA_SDQ47
DDRA_ODT1
DDRA_SDQ18
DDRA_SDQ43
DDRA_SDQ34
DDRA_CLK1
DDRA_CLK1#
DDRA_SDQ48
DDRA_SDQS2#
DDRA_SDQ11
DDRA_SDQ38
DDRA_CLK0
DDRA_CLK0#
DDRA_SDQ32
DDRA_SDQS3#
DDRA_SMA13
DDRA_SMA11
DDRA_SDQ50
DDRA_SDQ8
DDRA_SDQS1
DDRA_SDQ61
DDRA_SMA2
DDRA_SDQ41
DDRA_SDQ17
+VREF_DQ
+VREF_CA
DDRA_SMA[0..15] 7
DDRA_SDQ[0..63] 7
DDRA_SDM[0..7] 7
DDRA_CKE07
DDRA_SCS1#7
DDRA_SBS1# 7
DDRA_SWE#7
DDRA_SRAS# 7
DDRA_SCS0# 7
MEM_MA_RST# 7
DDRA_SBS2#7
DDRA_SBS0#7
DDRA_SCAS#7DDRA_ODT0 7
DDRA_ODT1 7
DDRA_CLK1# 7
DDRA_CLK1 7
DDRA_CLK07
DDRA_CLK0#7
DDRA_CKE1 7
SB_SMDAT0 11,26,32
SB_SMCLK0 11,26,32
DDRA_SDQS3 7
DDRA_SDQS0 7
DDRA_SDQS3# 7
DDRA_SDQS0# 7
DDRA_SDQS5 7
DDRA_SDQS5# 7
DDRA_SDQS7 7
DDRA_SDQS7# 7
DDRA_SDQS1#7
DDRA_SDQS17
DDRA_SDQS2#7
DDRA_SDQS27
DDRA_SDQS4#7
DDRA_SDQS47
DDRA_SDQS6#7
DDRA_SDQS67
+1.5V
+0.75VS
+3VS
+1.5V +1.5V
+3VS
+VREF_DQ
+VREF_DQ
+VREF_CA
+1.5V
+0.75VS
+1.5V+VREF_CA
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
DDRII SO-DIMM 1
Custom
10 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
DDRII SO-DIMM 1
Custom
10 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
DDRII SO-DIMM 1
Custom
10 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
DIMM_A STD H:8mm
<Address: 00>
Place near DIMM1
11/27 update
(0805 to 0603)
11/27 update
(0805 to 0603)
11/27 update
(0603 to 0402)
4.7u to 2.2u
11/27 remove 2.2U/0.1U
add 1u_0402
11/28 update DIMM conn (same as NEW70)
11/30 update DIMM conn(same as NEW75)
12/16 add Cap.
for +1.5V
C665
0.1U_0402_16V4Z
C665
0.1U_0402_16V4Z
1
2
C351
0.01U_0402_25V7K
C351
0.01U_0402_25V7K
1
2
C641
0.1U_0402_16V4Z
C641
0.1U_0402_16V4Z
1
2
C85
0.01U_0402_25V7K
C85
0.01U_0402_25V7K
1
2
C647
0.1U_0402_16V4Z
C647
0.1U_0402_16V4Z
1
2
C235
4.7U_0603_6.3V6K
@
C235
4.7U_0603_6.3V6K
@
1
2
C88
0.1U_0402_16V4Z
C88
0.1U_0402_16V4Z
1
2
C1257
0.1U_0402_16V4Z
C1257
0.1U_0402_16V4Z
1
2
C90
1U_0402_6.3V6K
C90
1U_0402_6.3V6K
1
2
C645
0.1U_0402_16V4Z
C645
0.1U_0402_16V4Z
1
2
R310
1K_0402_1%
R310
1K_0402_1%
1 2
JDIMM1
FOX_AS0A626-U8SN-7F
CONN@
JDIMM1
FOX_AS0A626-U8SN-7F
CONN@
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
C10
1000P_0402_25V8J
C10
1000P_0402_25V8J
1
2
R48
1K_0402_1%
R48
1K_0402_1%
1 2
R315
1K_0402_1%
R315
1K_0402_1%
1 2
C642
0.1U_0402_16V4Z
C642
0.1U_0402_16V4Z
1
2
R50 10K_0402_5%R50 10K_0402_5%
1 2
C87
0.1U_0402_16V4Z
C87
0.1U_0402_16V4Z
1
2
C664
0.1U_0402_16V4Z
C664
0.1U_0402_16V4Z
1
2
C1259
0.1U_0402_16V4Z
C1259
0.1U_0402_16V4Z
1
2
R49
1K_0402_1%
R49
1K_0402_1%
1 2
C84
4.7U_0603_6.3V6K
@
C84
4.7U_0603_6.3V6K
@
1
2
C640
0.1U_0402_16V4Z
C640
0.1U_0402_16V4Z
1
2
C89
1000P_0402_25V8J
C89
1000P_0402_25V8J
1
2
C1256
0.1U_0402_16V4Z
C1256
0.1U_0402_16V4Z
1
2
T9PAD T9PAD
C646
0.1U_0402_16V4Z
C646
0.1U_0402_16V4Z
1
2
C680
1000P_0402_25V8J
C680
1000P_0402_25V8J
1
2
R51
10K_0402_5%
R51
10K_0402_5%
12
C1258
0.1U_0402_16V4Z
C1258
0.1U_0402_16V4Z
1
2
C644
0.1U_0402_16V4Z
C644
0.1U_0402_16V4Z
1
2
C643
0.1U_0402_16V4Z
C643
0.1U_0402_16V4Z
1
2
C961
2.2U_0402_6.3V6M
C961
2.2U_0402_6.3V6M
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRB_SDQ[0..63]
DDRB_SMA[0..15]
DDRB_SDM[0..7]
+VREF_DQ
DDRB_SDQS6
DDRB_SDQ26
DDRB_SDQ63
DDRB_SDQ36
DDRB_SDQ35
DDRB_SDQ25
DDRB_SDQ22
DDRB_SDQ5
DDRB_SDQ2
DDRB_SDQS0#
DDRB_SDQ14
DDRB_SMA12
DDRB_CKE1
DDRB_SDQ42
DDRB_SDM6
DDRB_SDQS4
DDRB_SMA15
DDRB_SDQ27
DDRB_SDQ12
DDRB_CKE0
DDRB_SDQ31
DDRB_SMA3
DDRB_SDQ59
DDRB_SBS1#
DDRB_SDQ39
DDRB_SCS1#
DDRB_SDQ6
DDRB_SDQS0
DDRB_SMA7
DDRB_SWE#
DDRB_SMA0
DDRB_SDM2
DDRB_SDQ0
DDRB_SDQ46
DDRB_SDQ57
DDRB_SDM1
DDRB_SDQS7
DDRB_SDM0
DDRB_SDQ28
DDRB_SDM4
DDRB_SDQ19
DDRB_SDQ51
DDRB_SDQS5#
DDRB_SDQS2
DDRB_SDQ30
DDRB_SDQ4
DDRB_SDQ33
DDRB_SRAS#
DDRB_SDQ44
DDRB_SDQS3
DDRB_SDM5
DDRB_SDQ58
DDRB_SMA8
DDRB_SCS0#
DDRB_SMA10
DDRB_SMA6
DDRB_SDQ10
DDRB_SDQS6#
DDRB_SDQS7#
MEM_MB_RST#
DDRB_SDQ3
DDRB_SDQ16
DDRB_SMA9
DDRB_SDQ1
DDRB_SDQS4#
DDRB_SDQ29
DDRB_SDQ49
DDRB_SDQ54
DDRB_SDQS5
DDRB_SDM3
DDRB_SDQ9
DDRB_SDQ45
DDRB_SBS2#
DDRB_SDQ20
DDRB_SDQ13
DDRB_SDQ7
DDRB_SMA1
DDRB_SDM7
DDRB_SBS0#
DDRB_SDQ60
DDRB_SDQ37
DDRB_ODT0DDRB_SCAS#
DDRB_SDQ55
DDRB_SMA14
DDRB_SDQS1#
DDRB_SMA5
DDRB_SDQ21
DDRB_SMA4
DDRB_SDQ62
DDRB_SDQ15
DDRB_SDQ24
DDRB_SDQ47
DDRB_SDQ53
DDRB_SDQ23
DDRB_SDQ56
DDRB_SDQ43
DDRB_SDQ18
DDRB_ODT1
DDRB_CLK1#
DDRB_CLK1
DDRB_SDQ34
DDRB_SDQS2#
DDRB_SDQ48
DDRB_CLK0#
DDRB_CLK0
DDRB_SDQ11
DDRB_SDQ50
DDRB_SMA11
DDRB_SMA13
DDRB_SDQS3#
DDRB_SDQ32
DDRB_SMA2
DDRB_SDQ61
DDRB_SDQS1
DDRB_SDQ8
DDRB_SDQ17
DDRB_SDQ41
DDRB_SDQ40
DDRB_SDQ38
DDRB_SDQ52
+VREF_CA
DDRB_SMA[0..15] 7
DDRB_SDQ[0..63] 7
DDRB_SDM[0..7] 7
DDRB_SCS1#7
DDRB_CKE07
DDRB_SCS0# 7
DDRB_SRAS# 7
DDRB_SWE#7
DDRB_SBS1# 7
DDRB_SCAS#7
DDRB_SBS0#7
DDRB_SBS2#7
MEM_MB_RST# 7
DDRB_CLK1 7
DDRB_CLK1# 7
DDRB_ODT1 7
DDRB_ODT0 7
DDRB_CKE1 7
DDRB_CLK0#7
DDRB_CLK07
DDRB_SDQS27
DDRB_SDQS2#7
DDRB_SDQS47
DDRB_SDQS4#7
DDRB_SDQS67
DDRB_SDQS6#7
DDRB_SDQS0# 7
DDRB_SDQS0 7
DDRB_SDQS3# 7
DDRB_SDQS3 7
DDRB_SDQS5 7
DDRB_SDQS5# 7
DDRB_SDQS7 7
DDRB_SDQS7# 7
SB_SMDAT0 10,26,32
SB_SMCLK0 10,26,32
DDRB_SDQS1#7
DDRB_SDQS17
+VREF_DQ
+0.75VS
+1.5V+1.5V
+3VS
+VREF_DQ
+VREF_CA
+1.5V
+1.5V
+0.75VS
+VREF_CA
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
DDRII SO-DIMM 2
Custom
11 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
DDRII SO-DIMM 2
Custom
11 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
DDRII SO-DIMM 2
Custom
11 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
DIMM_B STD H:4mm
<Address: 01>
Place near DIMM2
11/27 update
(0805 to 0603)
11/27 update
(0805 to 0603)
11/27 update
(0603 to 0402)
4.7u to 2.2u
11/27 add 1u_0402
11/28 update DIMM conn(same as NEW70)
11/30 Update DIMM conn(same as NEW75)
C675
0.1U_0402_16V4Z
C675
0.1U_0402_16V4Z
1
2
R52 10K_0402_5%R52 10K_0402_5%
1 2
C668
0.1U_0402_16V4Z
C668
0.1U_0402_16V4Z
1
2
C676
0.1U_0402_16V4Z
C676
0.1U_0402_16V4Z
1
2
C682
1000P_0402_25V8J
C682
1000P_0402_25V8J
1
2
R53
10K_0402_5%
R53
10K_0402_5%
12
C669
0.1U_0402_16V4Z
C669
0.1U_0402_16V4Z
1
2
C677
0.1U_0402_16V4Z
C677
0.1U_0402_16V4Z
1
2
+
C86
330U_X_2VM_R6M@
+
C86
330U_X_2VM_R6M@
1
2
C670
0.1U_0402_16V4Z
C670
0.1U_0402_16V4Z
1
2
T10PAD T10PAD
JDIMM2
FOX_AS0A626-U4SN-7F
CONN@
JDIMM2
FOX_AS0A626-U4SN-7F
CONN@
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
C352
4.7U_0603_6.3V6K
@
C352
4.7U_0603_6.3V6K
@
1
2
C671
0.1U_0402_16V4Z
C671
0.1U_0402_16V4Z
1
2
C683
1000P_0402_25V8J
C683
1000P_0402_25V8J
1
2
C925
2.2U_0402_6.3V6M
C925
2.2U_0402_6.3V6M
1
2
C672
0.1U_0402_16V4Z
C672
0.1U_0402_16V4Z
1
2
C353
0.1U_0402_16V4Z
C353
0.1U_0402_16V4Z
1
2
C673
0.1U_0402_16V4Z
C673
0.1U_0402_16V4Z
1
2
C93
0.1U_0402_16V4Z
C93
0.1U_0402_16V4Z
1
2
C666
0.1U_0402_16V4Z
C666
0.1U_0402_16V4Z
1
2
C91
1U_0402_6.3V6K
C91
1U_0402_6.3V6K
1
2
C92
4.7U_0603_6.3V6K
@
C92
4.7U_0603_6.3V6K
@
1
2
C674
0.1U_0402_16V4Z
C674
0.1U_0402_16V4Z
1
2
C94
1000P_0402_25V8J
C94
1000P_0402_25V8J
1
2
C667
0.1U_0402_16V4Z
C667
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SB_TX2P_C
SB_TX2N_C
SB_TX3P_C
SB_TX3N_C
SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
H_CADIN[0..15]
H_CADIP[0..15]H_CADOP[0..15]
H_CADON[0..15]
SB_TX1N_C
H_CADIN0
H_CADIP1
H_CADIN1
HT_RXCALP
HT_RXCALN
H_CADIN2
H_CADIP2
H_CADIN3
H_CADIP3
HT_TXCALP
HT_TXCALN
H_CTLIN0
H_CTLIP0
H_CTLON0
H_CADIN4
H_CADIP4
H_CADIN5
H_CADIP5
H_CADIN6
H_CADIP6
H_CADIN7
H_CADIP7
H_CADIN8
H_CADIP8
H_CADIN9
H_CADIP9
H_CADIN10
H_CADIP10
H_CTLOP0
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIN13
H_CADIP13
H_CADIN14
H_CADIP14
H_CADIN15
H_CADIP15
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CTLIP1
H_CTLIN1
H_CADON2
H_CTLOP1
H_CADOP2
H_CTLON1
H_CADOP3
H_CADON3
H_CADON4
H_CADOP4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADON10
H_CADOP10
H_CADON9
H_CADOP9
H_CADOP8
H_CADON8
H_CADIP0
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_GRX_P8 PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N10 PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9
PCIE_MTX_C_GRX_N9
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P11
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_GRX_P10
PCIE_MTX_C_GRX_P13
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_MTX_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P13 PCIE_MTX_C_GRX_N13
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P15 PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P15
PCIE_MTX_GRX_P14
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
PCIE_MTX_GRX_P0 PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0PCIE_MTX_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1 PCIE_MTX_C_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_GRX_P4
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P6
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P5 PCIE_MTX_C_GRX_N5
PCIE_MTX_GRX_P7 PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P7
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N7
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_ITX_PRX_P0
PCIE_ITX_PRX_N0
PCIE_ITX_PRX_P1
PCIE_ITX_PRX_N1
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3
PCIE_ITX_C_PRX_N0
PCIE_ITX_C_PRX_P0PCIE_PTX_C_IRX_P3
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P0
PCIE_PTX_C_IRX_N0
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1
GPP0P
GPP0N
PCIE_MTX_GRX_N[0..3]
PCIE_MTX_GRX_P[0..3]
H_CADIP[0..15] 6
H_CADON[0..15]6H_CADIN[0..15] 6
H_CADOP[0..15]6
SB_RX1P25
SB_RX1N25
SB_RX0P25
SB_RX0N25 SB_TX0P 25
SB_TX1N 25
SB_TX0N 25
SB_TX1P 25
SB_RX3P25
SB_RX3N25
SB_RX2P25
SB_RX2N25 SB_TX2P 25
SB_TX2N 25
SB_TX3N 25
SB_TX3P 25
H_CLKIN0 6
H_CLKIP0 6
H_CTLIN0 6
H_CTLIP0 6
H_CLKON06
H_CLKOP06
H_CLKOP16
H_CLKON16
H_CTLOP06
H_CTLON06
H_CLKIN1 6
H_CLKIP1 6
H_CTLIN1 6
H_CTLIP1 6H_CTLOP16
H_CTLON16
PCIE_MTX_C_GRX_N[0..15] 16
PCIE_MTX_C_GRX_P[0..15] 16
PCIE_GTX_C_MRX_P[0..15]16
PCIE_GTX_C_MRX_N[0..15]16
PCIE_ITX_C_PRX_P0 33
PCIE_ITX_C_PRX_N0 33
PCIE_ITX_C_PRX_P1 32
PCIE_ITX_C_PRX_N1 32
PCIE_PTX_C_IRX_P033
PCIE_PTX_C_IRX_N033
PCIE_PTX_C_IRX_P132
PCIE_PTX_C_IRX_N132
PCIE_MTX_GRX_N[0..3] 23
PCIE_MTX_GRX_P[0..3] 23
+1.1VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
RS880-HT/PCIE
Custom
12 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
RS880-HT/PCIE
Custom
12 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
RS880-HT/PCIE
Custom
12 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
GLAN
WLAN
0718 Place within 1"
layout 1:2
0718 Place within 1"
layout 1:2
RS880 A11(SA000032710)
RS880 A11(SA000032710)
Reserve for LAN debug
R56,R57 close to R54,R55 C131,C132 close to C127,C128
11/06 for UMA HDMI signal
11/30
exchange net name
from PCIE_MTX_GRX_N(4~13,15)
to PCIE_MTX_GRX_P(4~13,15)
C110 0.1U_0402_16V7KMUX@C110 0.1U_0402_16V7KMUX@
1 2
R56 0_0402_5%
@
R56 0_0402_5%
@
1 2
C107 0.1U_0402_16V7KMUX@C107 0.1U_0402_16V7KMUX@
1 2
R61
301_0402_1%~D
R61
301_0402_1%~D
1 2
C102 0.1U_0402_16V7KMUX@C102 0.1U_0402_16V7KMUX@
1 2
C109 0.1U_0402_16V7KMUX@C109 0.1U_0402_16V7KMUX@
1 2
C117 0.1U_0402_16V7KVGA@C117 0.1U_0402_16V7KVGA@
1 2
C126 0.1U_0402_16V7KVGA@C126 0.1U_0402_16V7KVGA@
1 2
C101 0.1U_0402_16V7KMUX@C101 0.1U_0402_16V7KMUX@
1 2
C105 0.1U_0402_16V7KMUX@C105 0.1U_0402_16V7KMUX@
1 2
R57 0_0402_5%
@
R57 0_0402_5%
@
1 2
C125 0.1U_0402_16V7KVGA@C125 0.1U_0402_16V7KVGA@
1 2
C100 0.1U_0402_16V7KMUX@C100 0.1U_0402_16V7KMUX@
1 2
C120 0.1U_0402_16V7KVGA@C120 0.1U_0402_16V7KVGA@
1 2
C121 0.1U_0402_16V7KVGA@C121 0.1U_0402_16V7KVGA@
1 2
C114 0.1U_0402_16V7KVGA@C114 0.1U_0402_16V7KVGA@
1 2
C136 0.1U_0402_16V7KC136 0.1U_0402_16V7K
1 2
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F SB
U3B
RS780M_FCBGA528
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F SB
U3B
RS780M_FCBGA528
SB_TX3P AD5
SB_TX3N AE5
GPP_TX2P AA2
GPP_TX2N AA1
GPP_TX3P Y1
GPP_TX3N Y2
SB_RX3P
W5
SB_RX3N
Y5
GPP_RX2P
AD1
GPP_RX2N
AD2
GPP_RX3P
V5
GPP_RX3N
W6
SB_TX0P AD7
SB_TX0N AE7
SB_TX1P AE6
SB_TX1N AD6
SB_RX0P
AA8
SB_RX0N
Y8
SB_RX1P
AA7
SB_RX1N
Y7
PCE_CALRP(PCE_BCALRP) AC8
PCE_CALRN(PCE_BCALRN) AB8
SB_TX2N AC6
SB_RX2P
AA5
SB_RX2N
AA6 SB_TX2P AB6
GPP_RX0P
AE3
GPP_RX0N
AD4
GPP_RX1P
AE2
GPP_RX1N
AD3
GPP_TX0P AC1
GPP_TX0N AC2
GPP_TX1P AB4
GPP_TX1N AB3
GFX_RX0P
D4
GFX_RX0N
C4
GFX_RX1P
A3
GFX_RX1N
B3
GFX_RX2P
C2
GFX_RX2N
C1
GFX_RX3P
E5
GFX_RX3N
F5
GFX_RX4P
G5
GFX_RX4N
G6
GFX_RX5P
H5
GFX_RX5N
H6
GFX_RX6P
J6
GFX_RX6N
J5
GFX_RX7P
J7
GFX_RX7N
J8
GFX_RX8P
L5
GFX_RX8N
L6
GFX_RX9P
M8
GFX_RX9N
L8
GFX_RX10P
P7
GFX_RX10N
M7
GFX_RX11P
P5
GFX_RX11N
M5
GFX_RX12P
R8
GFX_RX12N
P8
GFX_RX13P
R6
GFX_RX13N
R5
GFX_RX14P
P4
GFX_RX14N
P3
GFX_RX15P
T4
GFX_RX15N
T3
GFX_TX0P A5
GFX_TX0N B5
GFX_TX1P A4
GFX_TX1N B4
GFX_TX2P C3
GFX_TX2N B2
GFX_TX3P D1
GFX_TX3N D2
GFX_TX4P E2
GFX_TX4N E1
GFX_TX5P F4
GFX_TX5N F3
GFX_TX6P F1
GFX_TX6N F2
GFX_TX7P H4
GFX_TX7N H3
GFX_TX8P H1
GFX_TX8N H2
GFX_TX9P J2
GFX_TX9N J1
GFX_TX10P K4
GFX_TX10N K3
GFX_TX11P K1
GFX_TX11N K2
GFX_TX12P M4
GFX_TX12N M3
GFX_TX13P M1
GFX_TX13N M2
GFX_TX14P N2
GFX_TX14N N1
GFX_TX15P P1
GFX_TX15N P2
GPP_TX4P Y4
GPP_TX4N Y3
GPP_TX5P V1
GPP_TX5N V2
GPP_RX4P
U5
GPP_RX4N
U6
GPP_RX5P
U8
GPP_RX5N
U7
C118 0.1U_0402_16V7KVGA@C118 0.1U_0402_16V7KVGA@
1 2
PART 1 OF 6
HYPER TRANSPORT CPU I/F
U3A
RS780M_FCBGA528
PART 1 OF 6
HYPER TRANSPORT CPU I/F
U3A
RS780M_FCBGA528
HT_RXCAD15P
U19
HT_RXCAD15N
U18
HT_RXCAD14P
U20
HT_RXCAD14N
U21
HT_RXCAD13P
V21
HT_RXCAD13N
V20
HT_RXCAD12P
W21
HT_RXCAD12N
W20
HT_RXCAD11P
Y22
HT_RXCAD11N
Y23
HT_RXCAD10P
AA24
HT_RXCAD10N
AA25
HT_RXCAD9P
AB25
HT_RXCAD9N
AB24
HT_RXCAD8P
AC24
HT_RXCAD8N
AC25
HT_RXCAD7P
N24
HT_RXCAD7N
N25
HT_RXCAD6P
P25
HT_RXCAD6N
P24
HT_RXCAD5P
P22
HT_RXCAD5N
P23
HT_RXCAD4P
T25
HT_RXCAD4N
T24
HT_RXCAD3P
U24
HT_RXCAD3N
U25
HT_RXCAD2P
V25
HT_RXCAD2N
V24
HT_RXCAD1P
V22
HT_RXCAD1N
V23
HT_RXCAD0P
Y25
HT_RXCAD0N
Y24
HT_RXCLK1P
AB23
HT_RXCLK1N
AA22
HT_RXCLK0P
T22
HT_RXCLK0N
T23
HT_RXCTL0P
M22
HT_RXCTL0N
M23
HT_RXCTL1P
R21
HT_RXCTL1N
R20
HT_RXCALP
C23
HT_RXCALN
A24
HT_TXCAD15P P18
HT_TXCAD15N M18
HT_TXCAD14P M21
HT_TXCAD14N P21
HT_TXCAD13P M19
HT_TXCAD13N L18
HT_TXCAD12P L19
HT_TXCAD12N J19
HT_TXCAD11P J18
HT_TXCAD11N K17
HT_TXCAD10P J20
HT_TXCAD10N J21
HT_TXCAD9P G20
HT_TXCAD9N H21
HT_TXCAD8P F21
HT_TXCAD8N G21
HT_TXCAD7P K23
HT_TXCAD7N K22
HT_TXCAD6P K24
HT_TXCAD6N K25
HT_TXCAD5P J25
HT_TXCAD5N J24
HT_TXCAD4P H23
HT_TXCAD4N H22
HT_TXCAD3P F23
HT_TXCAD3N F22
HT_TXCAD2P F24
HT_TXCAD2N F25
HT_TXCAD1P E24
HT_TXCAD1N E25
HT_TXCAD0P D24
HT_TXCAD0N D25
HT_TXCLK1P L21
HT_TXCLK1N L20
HT_TXCLK0P H24
HT_TXCLK0N H25
HT_TXCTL0P M24
HT_TXCTL0N M25
HT_TXCTL1P P19
HT_TXCTL1N R18
HT_TXCALP B24
HT_TXCALN B25
C132 0.1U_0402_16V7K@C132 0.1U_0402_16V7K@1 2
C115 0.1U_0402_16V7KVGA@C115 0.1U_0402_16V7KVGA@
1 2
C129 0.1U_0402_16V7KC129 0.1U_0402_16V7K
1 2
C123 0.1U_0402_16V7KVGA@C123 0.1U_0402_16V7KVGA@
1 2
C137 0.1U_0402_16V7KC137 0.1U_0402_16V7K
1 2
C96 0.1U_0402_16V7KMUX@C96 0.1U_0402_16V7KMUX@
1 2
R60
301_0402_1%~D
R60
301_0402_1%~D
1 2
C113 0.1U_0402_16V7KVGA@C113 0.1U_0402_16V7KVGA@
1 2
C124 0.1U_0402_16V7KVGA@C124 0.1U_0402_16V7KVGA@
1 2
C98 0.1U_0402_16V7KMUX@C98 0.1U_0402_16V7KMUX@
1 2
C128 0.1U_0402_16V7KC128 0.1U_0402_16V7K
1 2
R59 1.27K_0402_1%R59 1.27K_0402_1%
1 2
C122 0.1U_0402_16V7KVGA@C122 0.1U_0402_16V7KVGA@
1 2
C130 0.1U_0402_16V7KC130 0.1U_0402_16V7K
1 2
C119 0.1U_0402_16V7KVGA@C119 0.1U_0402_16V7KVGA@
1 2
C140 0.1U_0402_16V7KC140 0.1U_0402_16V7K
1 2
C127 0.1U_0402_16V7KC127 0.1U_0402_16V7K
1 2
C131 0.1U_0402_16V7K@C131 0.1U_0402_16V7K@
1 2
C139 0.1U_0402_16V7KC139 0.1U_0402_16V7K
1 2
C112 0.1U_0402_16V7KVGA@C112 0.1U_0402_16V7KVGA@
1 2
C95 0.1U_0402_16V7KMUX@C95 0.1U_0402_16V7KMUX@
1 2
C133 0.1U_0402_16V7KC133 0.1U_0402_16V7K
1 2
C134 0.1U_0402_16V7KC134 0.1U_0402_16V7K
1 2
C135 0.1U_0402_16V7KC135 0.1U_0402_16V7K
1 2
C108 0.1U_0402_16V7KMUX@C108 0.1U_0402_16V7KMUX@
1 2
C116 0.1U_0402_16V7KVGA@C116 0.1U_0402_16V7KVGA@
1 2
C103 0.1U_0402_16V7KMUX@C103 0.1U_0402_16V7KMUX@
1 2
R54 0_0402_5%R54 0_0402_5%
1 2
R58 2K_0402_1%R58 2K_0402_1%
1 2
C111 0.1U_0402_16V7KVGA@C111 0.1U_0402_16V7KVGA@
1 2
C106 0.1U_0402_16V7KMUX@C106 0.1U_0402_16V7KMUX@
1 2
C97 0.1U_0402_16V7KMUX@C97 0.1U_0402_16V7KMUX@
1 2
C99 0.1U_0402_16V7KMUX@C99 0.1U_0402_16V7KMUX@
1 2
C104 0.1U_0402_16V7KMUX@C104 0.1U_0402_16V7KMUX@
1 2
R55 0_0402_5%R55 0_0402_5%
1 2
C138 0.1U_0402_16V7KC138 0.1U_0402_16V7K
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
NB_RESET#
CLK_NBGFX
CLK_NBGFX#
GMCH_CRT_VSYNC
GMCH_CRT_HSYNC
NB_ALLOW_LDTSTOP
NB_LDTSTOP#
NB_ALLOW_LDTSTOP
+VDDLTP18
+VDDLT18
+VDDLT18
+AVDDDI
+NB_HTPVDD
DAC_RSET
+NB_PLLVDD
GMCH_LCD_CLK
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_LCD_DATA
POWER_SEL
+VDDLTP18
REFCLK_P
+AVDDQ
NB_PWRGD_R
+AVDD1
NB_PWRGD_R
ENBKL_WOVB
ENBKL_VB GMCH_ENBKL
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
GMCH_CRT_G
GMCH_CRT_B
GMCH_CRT_R
GMCH_CRT_CLK
GMCH_CRT_DATA
GMCH_CRT_CLK
GMCH_CRT_DATA
NB_PWRGD
GMCH_ENBKL
VGA_ENBKL
AUX0N
NB_LDTSTOP#
GMCH_HDMI_CLK
GMCH_HDMI_DATA
UMA_HDMI_DET
REFCLK_N
NB_PWRGD26
CLK_SBLINK_BCLK25
CLK_SBLINK_BCLK#25
CLK_NBHT25
CLK_NBHT#25
A_RST#15,25,34
SUS_STAT# 26
SUS_STAT_R# 15
ALLOW_LDTSTOP25
POWER_SEL46
SB_PWRGD8,26,34
GMCH_LCD_DATA22,36
GMCH_LCD_CLK22
GMCH_ENVDD 22
GMCH_CRT_R24
GMCH_CRT_G24
GMCH_CRT_B24
GMCH_CRT_HSYNC15,24
GMCH_CRT_VSYNC15,24
GMCH_TXOUT0+ 22
GMCH_TXOUT0- 22
GMCH_TXOUT1+ 22
GMCH_TXOUT1- 22
GMCH_TXOUT2+ 22
GMCH_TXOUT2- 22
GMCH_TXCLK+ 22
GMCH_TXCLK- 22
GMCH_CRT_DATA24
GMCH_CRT_CLK24
AUX0N36
VGA_ENBKL17
ENBKL 22,34
LDT_STOP#8,25
GMCH_HDMI_CLK23
GMCH_HDMI_DATA23
UMA_HDMI_DET 23
NB_DISP_CLKP25
NB_DISP_CLKN25
GMCH_INVT_PWM 22
+1.8VS
+1.8VS
+VDDA18HTPLL
+VDDA18PCIEPLL
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+3VS
+1.8VS
+1.8VS
+NB_PLLVDD
+NB_HTPVDD
+VDDA18PCIEPLL
+VDDA18HTPLL
+NB_HTPVDD+1.8VS
+1.1VS
+3VS
+NB_PLLVDD
+1.8VS
+3VS
+3VS
+1.8VS+1.8VS +1.8VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
RS880 VEDIO/CLK GEN
Custom
13 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
RS880 VEDIO/CLK GEN
Custom
13 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
RS880 VEDIO/CLK GEN
Custom
13 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Strap pin
POWER_SEL
HIGH 0.95V
1.1VLOW
RS880
To SB
125mA
20mA
4mA
65mA
20mA
20mA
120mA
15mA
300mA
RS880 A11(SA000032710)
If support VB, pop VB@ and reserve R71
PD on chip side
Wire-OR
AMD suggest Check if needed?
ĺ
11/07
checklist
is 110mA
11/10 for HDMI
11/10 FOR UMA HDMI DET.
11/15 for internal CLK gen
11/15 close to NB
11/15 close to NB, for internal CLK Gen
12/07 remove net CLK_NB_14.318M
remove CLK_NBGFX
(remove Ext. CLK)
12/08 remove EMI(Int. CLK Gen)
12/08 update BOM structure
PVT 20100309 update ENBKL_WOVB net
12/14 remove ext clk
12/14 update net name
12/14 ADD net name
12/14 update to Dual MOS
DVT 0131 change Q62 to SB570020410
C146
2.2U_0603_6.3V6K
C146
2.2U_0603_6.3V6K
1
2
R65 715_0402_1%R65 715_0402_1%
1 2
R966 0_0402_5%R966 0_0402_5%
1 2
C144
2.2U_0603_6.3V6K
C144
2.2U_0603_6.3V6K
1
2
U8
NC7SZ08P5X_NL_SC70-5
U8
NC7SZ08P5X_NL_SC70-5
B
2
A
1Y4
P5
G
3
L7
FBMA-L11-160808-221LMT 0603
L7
FBMA-L11-160808-221LMT 0603
1 2
PART 3 OF 6
PM
CLOCKs PLL PWR
MIS.
CRT/TVOUT
LVTM
U3C
RS780M_FCBGA528
PART 3 OF 6
PM
CLOCKs PLL PWR
MIS.
CRT/TVOUT
LVTM
U3C
RS780M_FCBGA528
VDDA18HTPLL
H17
SYSRESETb
D8
POWERGOOD
A10
LDTSTOPb
C10
ALLOW_LDTSTOP
C12
REFCLK_P/OSCIN(OSCIN)
E11
PLLVDD(NC)
A12
HPD(NC) D10
DDC_CLK0/AUX0P(NC)
A8 DDC_DATA0/AUX0N(NC)
B8
THERMALDIODE_P AE8
THERMALDIODE_N AD8
I2C_CLK
B9
STRP_DATA
B10
GFX_REFCLKP
T2
GFX_REFCLKN
T1
GPP_REFCLKP
U1
GPP_REFCLKN
U2
PLLVDD18(NC)
D14
PLLVSS(NC)
B12
TXOUT_L0P(NC) A22
TXOUT_L0N(NC) B22
TXOUT_L1P(NC) A21
TXOUT_L1N(NC) B21
TXOUT_L2P(NC) B20
TXOUT_L2N(DBG_GPIO0) A20
TXOUT_L3P(NC) A19
TXOUT_U0P(NC) B18
TXOUT_L3N(DBG_GPIO2) B19
TXOUT_U0N(NC) A18
TXOUT_U1P(PCIE_RESET_GPIO3) A17
TXOUT_U1N(PCIE_RESET_GPIO2) B17
TXOUT_U2P(NC) D20
TXOUT_U2N(NC) D21
TXOUT_U3P(PCIE_RESET_GPIO5) D18
TXOUT_U3N(NC) D19
TXCLK_LP(DBG_GPIO1) B16
TXCLK_LN(DBG_GPIO3) A16
TXCLK_UP(PCIE_RESET_GPIO4) D16
TXCLK_UN(PCIE_RESET_GPIO1) D17
VDDLTP18(NC) A13
VSSLTP18(NC) B13
C_Pr(DFT_GPIO5)
E17
Y(DFT_GPIO2)
F17
COMP_Pb(DFT_GPIO4)
F15
RED(DFT_GPIO0)
G18
TMDS_HPD(NC) D9
I2C_DATA
A9
TESTMODE D13
HT_REFCLKN
C24 HT_REFCLKP
C25
SUS_STAT#(PWM_GPIO5) D12
GREEN(DFT_GPIO1)
E18
BLUE(DFT_GPIO3)
E19
DAC_VSYNC(PWM_GPIO6)
B11 DAC_HSYNC(PWM_GPIO4)
A11
DAC_RSET(PWM_GPIO1)
G14
AVDD1(NC)
F12
AVDD2(NC)
E12
REDb(NC)
G17
GREENb(NC)
F18
AVDDDI(NC)
F14
AVSSDI(NC)
G15
AVDDQ(NC)
H15
AVSSQ(NC)
H14
VDDLT18_2(NC) B15
VDDLT33_1(NC) A14
VDDLT33_2(NC) B14
VSSLT1(VSS) C14
VSSLT2(VSS) D15
VDDLT18_1(NC) A15
VSSLT3(VSS) C16
VSSLT4(VSS) C18
VSSLT5(VSS) C20
LVDS_DIGON(PCE_TCALRP) E9
LVDS_BLON(PCE_RCALRP) F7
LVDS_ENA_BL(PWM_GPIO2) G12
VSSLT6(VSS) E20
VDDA18PCIEPLL1
D7
VDDA18PCIEPLL2
E7
BLUEb(NC)
F19
AUX_CAL(NC)
C8
GPPSB_REFCLKP(SB_REFCLKP)
V4
GPPSB_REFCLKN(SB_REFCLKN)
V3
DDC_DATA1/AUX1N(NC)
A7 DDC_CLK1/AUX1P(NC)
B7
DAC_SCL(PCE_RCALRN)
F8
DAC_SDA(PCE_TCALRN)
E8
REFCLK_N(PWM_GPIO3)
F11
VSSLT7(VSS) C22
RSVD
G11
C148
2.2U_0603_6.3V6K
C148
2.2U_0603_6.3V6K
1
2
R76 0_0402_5%VB@R76 0_0402_5%VB@
1 2
R71 0_0402_5%WOVB@R71 0_0402_5%WOVB@
1 2
R74
4.7K_0402_5%
R74
4.7K_0402_5%
12
L8
FBMA-L11-160808-221LMT 0603
L8
FBMA-L11-160808-221LMT 0603
1 2
C142
1U_0402_6.3V6K
C142
1U_0402_6.3V6K
1
2
R84
1.8K_0402_5%
R84
1.8K_0402_5%
1 2
R77 4.7K_0402_5%R77 4.7K_0402_5%
1 2
R67 0_0402_5%
@
R67 0_0402_5%
@
1 2
L5
FBMA-L11-160808-221LMT 0603
L5
FBMA-L11-160808-221LMT 0603
1 2
C684
0.1U_0402_16V4Z
C684
0.1U_0402_16V4Z
1 2
L3
FBMA-L11-160808-221LMT 0603
L3
FBMA-L11-160808-221LMT 0603
1 2
C153
2.2U_0603_6.3V6K
C153
2.2U_0603_6.3V6K
1
2
R75
4.7K_0402_5%
R75
4.7K_0402_5%
12
R87 140_0402_1%R87 140_0402_1%
1 2
R79 4.7K_0402_5%MUX@R79 4.7K_0402_5%MUX@
1 2
R149
4.7K_0402_5%
R149
4.7K_0402_5%
12
G
D
S
Q62
2N7002-7-F_SOT23
MUX@
G
D
S
Q62
2N7002-7-F_SOT23
MUX@
2
13
R82 2K_0402_5%R82 2K_0402_5%
1 2
R63
2.2K_0402_5%
R63
2.2K_0402_5%
1 2
R967 4.7K_0402_5%R967 4.7K_0402_5%
1 2
C150
2.2U_0603_6.3V6K
C150
2.2U_0603_6.3V6K
1
2
C152
1U_0402_6.3V6K
C152
1U_0402_6.3V6K
1
2
L6
FBMA-L11-160808-221LMT 0603
L6
FBMA-L11-160808-221LMT 0603
1 2
C155
1U_0402_6.3V6K
C155
1U_0402_6.3V6K
1
2C157
4.7U_0805_10V4Z
C157
4.7U_0805_10V4Z
1
2
L10
BLM18AG601SN1D_2P
L10
BLM18AG601SN1D_2P
1 2
R66 0_0402_5%R66 0_0402_5%
1 2
Q41B
DMN66D0LDW-7_SOT363-6
Q41B
DMN66D0LDW-7_SOT363-6
3
5
4
L2
FBMA-L11-160808-221LMT 0603
L2
FBMA-L11-160808-221LMT 0603
1 2
R106 4.7K_0402_5%R106 4.7K_0402_5%
12
R81 0_0402_5%R81 0_0402_5%
1 2
U4
NC7SZ08P5X_NL_SC70-5
U4
NC7SZ08P5X_NL_SC70-5
B
2
A
1Y4
P5
G
3
L4
FBMA-L11-160808-221LMT 0603
L4
FBMA-L11-160808-221LMT 0603
1 2
R91 0_0402_5%R91 0_0402_5%
1 2
Q41A
DMN66D0LDW-7_SOT363-6
Q41A
DMN66D0LDW-7_SOT363-6
61
2
C154
2.2U_0603_6.3V6K
C154
2.2U_0603_6.3V6K
1
2
C143
1U_0402_6.3V6K
C143
1U_0402_6.3V6K
1
2
C145
0.1U_0402_16V4Z
C145
0.1U_0402_16V4Z
1
2
R173 4.7K_0402_5%@R173 4.7K_0402_5%@12
R417
300_0402_5%
@
R417
300_0402_5%
@
1 2
C151
1U_0402_6.3V6K
C151
1U_0402_6.3V6K
1
2
C141
2.2U_0603_6.3V6K
C141
2.2U_0603_6.3V6K
1
2
C149
1U_0402_6.3V6K
C149
1U_0402_6.3V6K
1
2
R85 150_0402_1%R85 150_0402_1%
1 2
R80 4.7K_0402_5%MUX@R80 4.7K_0402_5%MUX@
1 2
R90
1K_0402_5%
R90
1K_0402_5%
12
R78 4.7K_0402_5%R78 4.7K_0402_5%
1 2
R64 0_0402_5%@R64 0_0402_5%@
1 2
R72 0_0402_5%VB@R72 0_0402_5%VB@
1 2
R68 300_0402_5%R68 300_0402_5%
12
C679
22U_0805_10V4Z
C679
22U_0805_10V4Z
1
2
R89 150_0402_1%R89 150_0402_1%
1 2
R968 4.7K_0402_5%R968 4.7K_0402_5%
1 2
R88 150_0402_1%R88 150_0402_1%
1 2
C156
0.1U_0402_16V4Z
C156
0.1U_0402_16V4Z
1
2
L9
FBMA-L11-160808-221LMT 0603
L9
FBMA-L11-160808-221LMT 0603
1 2
R73
4.7K_0402_5%
R73
4.7K_0402_5%
12
C147
1U_0402_6.3V6K
C147
1U_0402_6.3V6K
1
2
R965 0_0402_5%R965 0_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SPM_DQ11
SPM_DQ8
SPM_DQ9
SPM_DQ6
SPM_DQ10
SPM_DQ7
+IOPLLVDD18
+IOPLLVDD
SPM_MA5
SPM_MA2
SPM_ODT
SPM_WE#
SPM_CS#
SPM_RAS#
SPM_CKE
SPM_CAS#
SPM_DQ15
SPM_DQ12
SPM_DQ13
SPM_DQ14
VREFDA
+VDD_MEM
SPM_MA6
VREFDA
SPM_MA3
MEM_COMPP
SPM_CLK
SPM_CLK#
MEM_COMPN
SPM_MA0
SPM_DQS1#
SPM_DQS0
SPM_DQS0#
SPM_DQS1
SPM_MA12
SPM_MA9
SPM_MA13
SPM_MA10
SPM_MA7
SPM_MA11
SPM_MA8
SPM_DQ5
SPM_DQ2
SPM_DQ3
SPM_DQ0
SPM_DQ4
SPM_DQ1
SPM_MA4
SPM_MA[0..13]
+VDDA11PCIE
+VDDHTTX
SPM_MA1
SPM_DQ[0..15]
SPM_DM1
SPM_DM0
+VDDHT
+VDDA18PCIE
+VDDHTRX
SPM_BA1
SPM_BA2
SPM_BA0
SPM_RAS#15
SPM_BA015
SPM_BA115
SPM_BA215
SPM_DQS1# 15
SPM_DQS1 15
SPM_DQS0# 15
SPM_DQS0 15
SPM_CAS#15
SPM_DM1 15
SPM_DM0 15
SPM_WE#15
SPM_DQ[0..15] 15
SPM_CS#15
SPM_MA[0..13]15
SPM_CKE15
SPM_ODT15
SPM_CLK15
SPM_CLK#15
+1.1VS
+1.8VS
+1.8VS
+1.1VS
+1.1VS
+3VS
+1.1VS
+1.8VS
+NB_CORE
+1.8VS
+1.5VS
+1.5VS
+1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
RS880 PWR/GND
Custom
14 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
RS880 PWR/GND
Custom
14 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
RS880 PWR/GND
Custom
14 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
11/04 for Side Port power
5mA
600mA
15mA
700mA
10mA
1.3A
680mA
26mA
11/04 for Side Port power
RS880 A11(SA000032710)
RS880 A11(SA000032710)
700mA
RS880 A11(SA000032710)
11/04 checklist and CRB is different , check again
11/03 follow CRB
60mA
10A
2.5A
23mA
ĺ
11/07 100mA
ĺ
11/07
25mA
ĺ
11/07
checklist
is 400mA
12/11 update 11/24 Add net name
12/11 follow CRB
12/11 update
C1950.1U_0402_16V4Z C1950.1U_0402_16V4Z
1
2
C1161
0.1U_0402_16V4Z
SP@
C1161
0.1U_0402_16V4Z
SP@
1
2
C1830.1U_0402_16V4Z C1830.1U_0402_16V4Z
1
2
L13
FBMA-L11-201209-221LMA30T_0805
L13
FBMA-L11-201209-221LMA30T_0805
12
SBD_MEM/DVO_I/F
PAR 4 OF 6
U3D
RS780M_FCBGA528
SBD_MEM/DVO_I/F
PAR 4 OF 6
U3D
RS780M_FCBGA528
MEM_A0(NC)
AB12
MEM_A1(NC)
AE16
MEM_A2(NC)
V11
MEM_A3(NC)
AE15
MEM_A4(NC)
AA12
MEM_A5(NC)
AB16
MEM_A6(NC)
AB14
MEM_A7(NC)
AD14
MEM_A8(NC)
AD13
MEM_A9(NC)
AD15
MEM_A10(NC)
AC16
MEM_A11(NC)
AE13
MEM_A12(NC)
AC14
MEM_A13(NC)
Y14
MEM_BA0(NC)
AD16
MEM_BA1(NC)
AE17
MEM_BA2(NC)
AD17
MEM_RASb(NC)
W12
MEM_CASb(NC)
Y12
MEM_WEb(NC)
AD18
MEM_CSb(NC)
AB13
MEM_CKE(NC)
AB18
MEM_ODT(NC)
V14
MEM_CKP(NC)
V15
MEM_CKN(NC)
W14
MEM_DM0(NC) W17
MEM_DM1/DVO_D8(NC) AE19
MEM_DQS0P/DVO_IDCKP(NC) Y17
MEM_DQS0N/DVO_IDCKN(NC) W18
MEM_DQS1P(NC) AD20
MEM_DQS1N(NC) AE21
MEM_DQ0/DVO_VSYNC(NC) AA18
MEM_DQ1/DVO_HSYNC(NC) AA20
MEM_DQ2/DVO_DE(NC) AA19
MEM_DQ3/DVO_D0(NC) Y19
MEM_DQ4(NC) V17
MEM_DQ5/DVO_D1(NC) AA17
MEM_DQ6/DVO_D2(NC) AA15
MEM_DQ7/DVO_D4(NC) Y15
MEM_DQ8/DVO_D3(NC) AC20
MEM_DQ9/DVO_D5(NC) AD19
MEM_DQ10/DVO_D6(NC) AE22
MEM_DQ11/DVO_D7(NC) AC18
MEM_DQ12(NC) AB20
MEM_DQ13/DVO_D9(NC) AD22
MEM_DQ14/DVO_D10(NC) AC22
MEM_DQ15/DVO_D11(NC) AD21
MEM_COMPP(NC)
AE12
MEM_COMPN(NC)
AD12 MEM_VREF(NC) AE18
IOPLLVDD18(NC) AE23
IOPLLVSS(NC) AD23
IOPLLVDD(NC) AE24
C1870.1U_0402_16V4Z C1870.1U_0402_16V4Z
1
2
L15
FBMA-L11-201209-221LMA30T_0805
L15
FBMA-L11-201209-221LMA30T_0805
12
C1164
1U_0402_6.3V6K
SP@
C1164
1U_0402_6.3V6K
SP@
1
2
L11
FBMA-L11-201209-221LMA30T_0805
L11
FBMA-L11-201209-221LMA30T_0805
12
L12
FBMA-L11-201209-221LMA30T_0805
L12
FBMA-L11-201209-221LMA30T_0805
1 2
C1820.1U_0402_16V4Z C1820.1U_0402_16V4Z
1
2
C170
0.1U_0402_16V4Z
C170
0.1U_0402_16V4Z
1
2
R931
40.2_0402_1%SP@
R931
40.2_0402_1%SP@
1 2
C1168
2.2U_0603_6.3V6K
SP@C1168
2.2U_0603_6.3V6K
SP@
1 2
C192
0.1U_0402_16V4Z
C192
0.1U_0402_16V4Z
1
2
C162 10U_0805_10V4ZC162 10U_0805_10V4Z
1 2
L108
FBMA-L11-160808-221LMT 0603
SP@ L108
FBMA-L11-160808-221LMT 0603
SP@
12
C160 10U_0805_10V4ZC160 10U_0805_10V4Z
1 2
C198
0.1U_0402_16V4Z
C198
0.1U_0402_16V4Z
1
2
C174
4.7U_0805_10V4Z
C174
4.7U_0805_10V4Z
1
2
C1940.1U_0402_16V4Z C1940.1U_0402_16V4Z
1
2
C167
1U_0402_6.3V6K
C167
1U_0402_6.3V6K
1
2
C1166
0.1U_0402_16V4Z
SP@
C1166
0.1U_0402_16V4Z
SP@
1
2
C1160
0.1U_0402_16V4Z
SP@
C1160
0.1U_0402_16V4Z
SP@
1
2
C1163
4.7U_0805_10V4Z
SP@
C1163
4.7U_0805_10V4Z
SP@
1
2
C18410U_0805_10V4Z C18410U_0805_10V4Z
1
2
C169
0.1U_0402_16V4Z
C169
0.1U_0402_16V4Z
1
2
C1910.1U_0402_16V4Z C1910.1U_0402_16V4Z
1
2
R928
1K_0402_1%
SP@
R928
1K_0402_1%
SP@
1 2
C171 1U_0402_6.3V6KC171 1U_0402_6.3V6K
1 2
C163 4.7U_0805_10V4ZC163 4.7U_0805_10V4Z
1 2
L14
FBMA-L11-201209-221LMA30T_0805
L14
FBMA-L11-201209-221LMA30T_0805
12
C1930.1U_0402_16V4Z C1930.1U_0402_16V4Z
1
2
C165
4.7U_0805_10V4Z
C165
4.7U_0805_10V4Z
1
2
C181
4.7U_0805_10V4Z
C181
4.7U_0805_10V4Z
1
2
C1167
2.2U_0603_6.3V6K
SP@C1167
2.2U_0603_6.3V6K
SP@
1 2
C168 1U_0402_6.3V6KC168 1U_0402_6.3V6K
1 2
C178
1U_0402_6.3V6K
C178
1U_0402_6.3V6K
1
2
C199
0.1U_0402_16V4Z
C199
0.1U_0402_16V4Z
1
2
L107
FBMA-L11-160808-221LMT 0603
SP@L107
FBMA-L11-160808-221LMT 0603
SP@
12
C190
0.1U_0402_16V4Z
C190
0.1U_0402_16V4Z
1
2
C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z
1 2
PART 6/6
GROUND
U3F
RS780M_FCBGA528
PART 6/6
GROUND
U3F
RS780M_FCBGA528
VSSAHT1
A25
VSSAHT2
D23
VSSAHT3
E22
VSSAHT4
G22
VSSAHT5
G24
VSSAHT6
G25
VSSAHT7
H19
VSSAHT8
J22
VSSAHT9
L17
VSSAHT10
L22
VSSAHT11
L24
VSSAHT12
L25
VSSAHT13
M20
VSSAHT14
N22
VSSAHT15
P20
VSSAHT16
R19
VSSAHT17
R22
VSSAHT18
R24
VSSAHT19
R25
VSSAHT21
U22
VSSAHT22
V19
VSSAHT23
W22
VSSAHT24
W24
VSSAHT25
W25
VSSAHT26
Y21
VSSAHT27
AD25
VSS2 D11
VSS3 G8
VSS4 E14
VSS5 E15
VSS7 J12
VSS8 K14
VSS9 M11
VSS10 L15
VSS11
L12
VSS12
M14
VSS13
N13
VSS14
P12
VSS15
P15
VSS16
R11
VSS17
R14
VSS18
T12
VSS19
U14
VSS20
U11
VSS21
U15
VSS22
V12
VSS23
W11
VSS24
W15
VSS25
AC12
VSS26
AA14
VSS27
Y18
VSS28
AB11
VSS29
AB15
VSS30
AB17
VSS31
AB19
VSS32
AE20
VSSAPCIE1 A2
VSSAPCIE2 B1
VSSAPCIE3 D3
VSSAPCIE4 D5
VSSAPCIE5 E4
VSSAPCIE6 G1
VSSAPCIE7 G2
VSSAPCIE8 G4
VSSAPCIE9 H7
VSSAPCIE10 J4
VSSAPCIE11 R7
VSSAPCIE12 L1
VSSAPCIE13 L2
VSSAPCIE14 L4
VSSAPCIE15 L7
VSS34
K11
VSSAPCIE16 M6
VSSAPCIE17 N4
VSSAPCIE18 P6
VSSAPCIE19 R1
VSSAPCIE20 R2
VSSAPCIE21 R4
VSSAPCIE22 V7
VSSAPCIE23 U4
VSSAPCIE24 V8
VSSAPCIE25 V6
VSSAPCIE26 W1
VSSAPCIE27 W2
VSSAPCIE28 W4
VSSAPCIE29 W7
VSSAPCIE30 W8
VSSAPCIE31 Y6
VSSAPCIE32 AA4
VSSAPCIE33 AB5
VSSAPCIE34 AB1
VSSAPCIE35 AB7
VSSAPCIE36 AC3
VSSAPCIE37 AC4
VSSAPCIE38 AE1
VSSAPCIE39 AE4
VSSAPCIE40 AB2
VSS1 AE14
VSSAHT20
H20
VSS33
AB21
VSS6 J15
C175
0.1U_0402_16V4Z
C175
0.1U_0402_16V4Z
1
2
C1159
0.1U_0402_16V4Z
SP@
C1159
0.1U_0402_16V4Z
SP@
1
2
PART 5/6
POWER
U3E
RS780M_FCBGA528
PART 5/6
POWER
U3E
RS780M_FCBGA528
VDDHT_1
J17
VDDHT_2
K16
VDDHT_3
L16
VDDHT_4
M16
VDDHT_5
P16
VDDHT_6
R16
VDDHT_7
T16
VDDHTTX_1
AE25
VDDHTTX_2
AD24
VDDHTTX_3
AC23
VDDHTTX_4
AB22
VDDHTTX_5
AA21
VDDHTTX_6
Y20
VDDHTTX_7
W19
VDDHTTX_8
V18
VDDHTRX_1
H18
VDDHTRX_2
G19
VDDHTRX_3
F20
VDDHTRX_4
E21
VDDHTRX_5
D22
VDD18_1
F9
VDD18_2
G9
VDD18_MEM1(NC)
AE11
VDD18_MEM2(NC)
AD11
VDDA18PCIE_1
J10
VDDA18PCIE_2
P10
VDDA18PCIE_3
K10
VDDA18PCIE_10
Y9
VDDA18PCIE_11
AA9
VDDA18PCIE_12
AB9
VDDA18PCIE_13
AD9
VDDA18PCIE_14
AE9
VDDA18PCIE_6
W9
VDDA18PCIE_7
H9
VDDPCIE_1 A6
VDDPCIE_2 B6
VDDPCIE_3 C6
VDDPCIE_4 D6
VDDPCIE_5 E6
VDDPCIE_6 F6
VDDPCIE_7 G7
VDDPCIE_8 H8
VDDPCIE_9 J9
VDDA18PCIE_4
M10
VDDA18PCIE_5
L10
VDDC_1 K12
VDDC_2 J14
VDDC_3 U16
VDDPCIE_11 M9
VDDC_4 J11
VDDC_5 K15
VDDPCIE_10 K9
VDDC_6 M12
VDDC_7 L14
VDDC_8 L11
VDDC_9 M13
VDDC_10 M15
VDDC_11 N12
VDDC_12 N14
VDDC_13 P11
VDDC_14 P13
VDDC_15 P14
VDDC_16 R12
VDDC_17 R15
VDDC_18 T11
VDDC_19 T15
VDDC_20 U12
VDDC_21 T14
VDD33_1(NC) H11
VDD33_2(NC) H12
VDD_MEM1(NC) AE10
VDD_MEM2(NC) AA11
VDD_MEM3(NC) Y11
VDD_MEM4(NC) AD10
VDD_MEM6(NC) AC10
VDD_MEM5(NC) AB10
VDDA18PCIE_8
T10
VDDC_22 J16
VDDPCIE_12 L9
VDDA18PCIE_9
R10
VDDPCIE_13 P9
VDDPCIE_14 R9
VDDPCIE_15 T9
VDDPCIE_16 V9
VDDPCIE_17 U9
VDDA18PCIE_15
U10
VDDHTRX_6
B23
VDDHTRX_7
A23
VDDHTTX_9
U17
VDDHTTX_10
T17
VDDHTTX_11
R17
VDDHTTX_12
P17
VDDHTTX_13
M17
R930
100_0402_1% SP@
R930
100_0402_1% SP@
1 2
R929
1K_0402_1%
SP@
R929
1K_0402_1%
SP@
1 2
C177
0.1U_0402_16V4Z
C177
0.1U_0402_16V4Z
1
2
C1880.1U_0402_16V4Z C1880.1U_0402_16V4Z
1
2
C164
4.7U_0805_10V4Z
C164
4.7U_0805_10V4Z
1
2
C1162
0.1U_0402_16V4Z
SP@
C1162
0.1U_0402_16V4Z
SP@
1
2
C161
1U_0402_6.3V6K
C161
1U_0402_6.3V6K
1
2
C166
0.1U_0402_16V4Z
C166
0.1U_0402_16V4Z
1
2
C261
10U_0603_6.3V6M
@
C261
10U_0603_6.3V6M
@
1
2
C176
0.1U_0402_16V4Z
C176
0.1U_0402_16V4Z
1
2
C185
0.1U_0402_16V4Z
C185
0.1U_0402_16V4Z
1
2
C1165
0.1U_0402_16V4Z
SP@
C1165
0.1U_0402_16V4Z
SP@
1
2
C1800.1U_0402_16V4Z C1800.1U_0402_16V4Z
1
2
C19610U_0805_10V4Z C19610U_0805_10V4Z
1
2
+
C189 330U_D2E_2.5VM
+
C189 330U_D2E_2.5VM
1
2
C197
1U_0402_6.3V6K
C197
1U_0402_6.3V6K
1
2
C159
0.1U_0402_16V4Z
C159
0.1U_0402_16V4Z
1
2
C172 0.1U_0402_16V4ZC172 0.1U_0402_16V4Z
1 2
R932
40.2_0402_1%SP@
R932
40.2_0402_1%SP@
1 2
R927
0_0402_5%
SP@
R927
0_0402_5%
SP@
12
C186
0.1U_0402_16V4Z
C186
0.1U_0402_16V4Z
1
2
C179
4.7U_0805_10V4Z
C179
4.7U_0805_10V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPM_CLK
SPM_CLK#
SPM_DQ3
SPM_DQ4
SPM_DQ0
SPM_DQ1
SPM_DQ7
SPM_DQ6
SPM_DQ5
SPM_DQ13
SPM_DQ2
SPM_DQ11
SPM_DQ9
SPM_DQ12
SPM_DQ14
SPM_DQ15
SPM_DQ10
SPM_DQ8
SPM_MA13
SPM_MA[0..13]
SPM_DM1
SPM_MA11
SPM_MA12
SPM_MA4
SPM_MA2
SPM_MA1
SPM_MA0
SPM_DQS0#
SPM_MA10
SPM_DM0
SPM_MA7
SPM_DQS1#
SPM_MA3
SP_VREFDQ
SPM_MA9
SPM_ODT
SPM_DQS0
SPM_MA8
SP_VREFCA
SPM_MA5
SPM_DQS1
SPM_MA6
SPM_DQ[0..15]
SP_VREFCA SP_VREFDQ
SP_DDR3_RST#
SPM_DQS0#14
SPM_DQS1#14
SPM_MA[0..13]14
SP_DDR3_RST#26
SPM_BA014
SPM_BA214
SPM_BA114
SPM_CKE14
SPM_CS#14
SPM_RAS#14
SPM_CAS#14
SPM_WE#14
SPM_DQ[0..15]14
SPM_CLK14
SPM_CLK#14
SPM_DQS014
SPM_DQS114
SPM_DM014
SPM_DM114
GMCH_CRT_HSYNC13,24
A_RST# 13,25,34
GMCH_CRT_VSYNC13,24
SUS_STAT_R#13
SPM_ODT14
+3VS
+3VS
+1.5VS +1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
Side Port Memory
Custom
15 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
Side Port Memory
Custom
15 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
Side Port Memory
Custom
15 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
VRAM P/N :
Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)
Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )
11/03 follow CRB
Enable Side Port Memory
RS880: HSYNC#
0: Enable
1 : Disable
Side port and Strap setting
Enable Side Port Memory
Register Readback of strap:
NB_CLKCFG:CLK_TOP_SPARE_D[1]
Enables the Test Debug Bus using GPIO. (VSYNC)
1 : Disable
0 : Enable
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
Debug Mode
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
Load EEPROM Strap
DFT_GPIO1: LOAD_EEPROM_STRAPS
11/04 change bom structure for enable side port
11/04 check strap for side port again
Samsung K4W1G1646E-HC15
Samsung K4W1G1646E-HC12
Hynix H5TQ1G63BFR-14C
Hynix H5TQ1G63BFR-12C
64Mx16 600 MHz
Memory Configuration Vendor and Part Number Speed
600 MHz
600 MHz
600 MHz
64Mx16
64Mx16
64Mx16
11/06 Side Port Memory Vendor List
Reference AMD Recommended Vendor List
Document Number: RVL_RS880SPA9
September 16, 2009
11/10 follow CRB
12/11 update +1.5VS
12/11 update +1.5VS 12/11 update +1.5VS
12/11 update +1.5VS12/11 update +1.5VS
12/11 update +1.5VS
12/11 update +1.5VS
12/11 update Res.
same as CRB
12/11 update Res.
same as CRB
DVT 0119 update U9 BOM Structure
C469
10U_0603_6.3V6M
SP@C469
10U_0603_6.3V6M
SP@
1
2
R264 3K_0402_5%@R264 3K_0402_5%@
12
C1171
0.1U_0402_16V4Z
SP@
C1171
0.1U_0402_16V4Z
SP@
1
2
C440
0.1U_0402_16V4Z
SP@
C440
0.1U_0402_16V4Z
SP@
1
2
C470
10U_0603_6.3V6M
SP@C470
10U_0603_6.3V6M
SP@
1
2
R93 3K_0402_5%@R93 3K_0402_5%@
12
96-BALL
SDRAM DDR3
U9
K4B1G1646E-HC12_FBGA96
X76@
96-BALL
SDRAM DDR3
U9
K4B1G1646E-HC12_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
C1170 0.1U_0402_16V4Z
SP@
C1170 0.1U_0402_16V4Z
SP@
1
2
C448
1U_0402_6.3V6K
SP@
C448
1U_0402_6.3V6K
SP@
1
2
R92 3K_0402_5%R92 3K_0402_5%
12
R180
243_0402_1%
SP@R180
243_0402_1%
SP@
12
C1169 0.1U_0402_16V4Z
SP@
C1169 0.1U_0402_16V4Z
SP@
1
2
R94 3K_0402_5%
WOSP@
R94 3K_0402_5%
WOSP@
12
R197
1K_0402_1%
SP@
R197
1K_0402_1%
SP@
1 2
R95 3K_0402_5%
SP@
R95 3K_0402_5%
SP@ 12
R933 10K_0402_5%
SP@
R933 10K_0402_5%
SP@
1 2
R185
1K_0402_1%
SP@
R185
1K_0402_1%
SP@
1 2
D1
CH751H-40_SC76
@D1
CH751H-40_SC76
@
2 1
C468
10U_0603_6.3V6M
SP@C468
10U_0603_6.3V6M
SP@
1
2
C1172
0.1U_0402_16V4Z
SP@
C1172
0.1U_0402_16V4Z
SP@
1
2
C447
1U_0402_6.3V6K
SP@C447
1U_0402_6.3V6K
SP@
1
2
R196
1K_0402_1%
SP@
R196
1K_0402_1%
SP@
1 2
C471
10U_0603_6.3V6M
SP@C471
10U_0603_6.3V6M
SP@
1
2
C439 0.1U_0402_16V4Z
SP@
C439 0.1U_0402_16V4Z
SP@
1
2
R184
1K_0402_1%
SP@
R184
1K_0402_1%
SP@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_RST#
VGA_TXOUT0-
VGA_TXOUT0+
VGA_TXOUT1+
VGA_TXOUT1-
VGA_TXCLK-
VGA_TXCLK+
VGA_TXOUT2+
VGA_TXOUT2-
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_MRX_P11
PCIE_GTX_MRX_N11
PCIE_GTX_MRX_P12
PCIE_GTX_MRX_N12
PCIE_GTX_MRX_P13
PCIE_GTX_MRX_N14
PCIE_GTX_MRX_N7 PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P7PCIE_GTX_MRX_P7
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1
PCIE_GTX_MRX_N1
PCIE_GTX_MRX_P1
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P4PCIE_GTX_MRX_P4
PCIE_GTX_MRX_N4
PCIE_GTX_MRX_N8
PCIE_GTX_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P2
PCIE_GTX_MRX_N2
PCIE_GTX_MRX_P2
PCIE_GTX_MRX_N5 PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P5PCIE_GTX_MRX_P5
PCIE_GTX_MRX_N9
PCIE_GTX_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P0PCIE_GTX_MRX_P0
PCIE_GTX_MRX_N0
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P3PCIE_GTX_MRX_P3
PCIE_GTX_MRX_N3
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P6
PCIE_GTX_MRX_N6
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_P10
PCIE_GTX_MRX_N10 PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P10
PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N13
PCIE_GTX_MRX_P14
PCIE_GTX_MRX_N15 PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P11PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P7
VGA_RST#
CLK_PEG_VGA25
CLK_PEG_VGA#25
VGA_ENVDD 22
VGA_PNL_PWM 22
VGA_TXCLK+ 22
VGA_TXCLK- 22
VGA_TXOUT0- 22
VGA_TXOUT0+ 22
VGA_TXOUT1- 22
VGA_TXOUT1+ 22
VGA_TXOUT2+ 22
VGA_TXOUT2- 22
PCIE_MTX_C_GRX_N[0..15] 12
PCIE_MTX_C_GRX_P[0..15] 12
PCIE_GTX_C_MRX_P[0..15]12
PCIE_GTX_C_MRX_N[0..15]12
PLT_RST#25,32,33
PE_GPIO025
+1.0VSG
+3VSG
+3VSG
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_ PCIE / LVDS
Custom
16 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_ PCIE / LVDS
Custom
16 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_ PCIE / LVDS
Custom
16 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
MAD A12 (SA00003M300)
add for VB support.
For M96, AH16 is NC
For Mahatten need PD
GFX PCIE LANE REVERSAL
Pop for PX verify
PARK A11 (SA00003MC10)
DVT 0121 update D44,D45 to SC1H751H010
PARK A11 (SA00003MC70)-R3
Pre MP
C205 0.1U_0402_16V7K
VGA@
C205 0.1U_0402_16V7K
VGA@
1 2
R99 10K_0402_5%VGA@R99 10K_0402_5%VGA@
12
C213 0.1U_0402_16V7K
VGA@
C213 0.1U_0402_16V7K
VGA@
1 2
R100 2K_0402_1%VGA@R100 2K_0402_1%VGA@
1 2 D44
CH751H-40PT_SOD323-2
VGA@
D44
CH751H-40PT_SOD323-2
VGA@
21
C223 0.1U_0402_16V7K
VGA@
C223 0.1U_0402_16V7K
VGA@
1 2
C227 0.1U_0402_16V7K
VGA@
C227 0.1U_0402_16V7K
VGA@
1 2
C210 0.1U_0402_16V7K
VGA@
C210 0.1U_0402_16V7K
VGA@
1 2
C229 0.1U_0402_16V7K
VGA@
C229 0.1U_0402_16V7K
VGA@
1 2
C207 0.1U_0402_16V7K
VGA@
C207 0.1U_0402_16V7K
VGA@
1 2
C211 0.1U_0402_16V7K
VGA@
C211 0.1U_0402_16V7K
VGA@
1 2
R98 1.27K_0402_1%VGA@R98 1.27K_0402_1%VGA@
1 2
C209 0.1U_0402_16V7K
VGA@
C209 0.1U_0402_16V7K
VGA@
1 2
C225 0.1U_0402_16V7K
VGA@
C225 0.1U_0402_16V7K
VGA@
1 2
C226 0.1U_0402_16V7K
VGA@
C226 0.1U_0402_16V7K
VGA@
1 2
C203 0.1U_0402_16V7K
VGA@
C203 0.1U_0402_16V7K
VGA@
1 2
C216 0.1U_0402_16V7K
VGA@
C216 0.1U_0402_16V7K
VGA@
1 2
R492
2.2K_0402_5%
@
R492
2.2K_0402_5%
@
12
C219 0.1U_0402_16V7K
VGA@
C219 0.1U_0402_16V7K
VGA@
1 2
C222 0.1U_0402_16V7K
VGA@
C222 0.1U_0402_16V7K
VGA@
1 2
C204 0.1U_0402_16V7K
VGA@
C204 0.1U_0402_16V7K
VGA@
1 2
C221 0.1U_0402_16V7K
VGA@
C221 0.1U_0402_16V7K
VGA@
1 2
C215 0.1U_0402_16V7K
VGA@
C215 0.1U_0402_16V7K
VGA@
1 2
R96
10K_0402_5%
@
R96
10K_0402_5%
@
1 2
D45
CH751H-40PT_SOD323-2
VGA@ D45
CH751H-40PT_SOD323-2
VGA@
21
C218 0.1U_0402_16V7K
VGA@
C218 0.1U_0402_16V7K
VGA@
1 2
U5
PARK XT-M2 A11
PARK@U5
PARK XT-M2 A11
PARK@
C230 0.1U_0402_16V7K
VGA@
C230 0.1U_0402_16V7K
VGA@
1 2
C224 0.1U_0402_16V7K
VGA@
C224 0.1U_0402_16V7K
VGA@
1 2
C231 0.1U_0402_16V7K
VGA@
C231 0.1U_0402_16V7K
VGA@
1 2
R491
10K_0402_5%
VGA@
R491
10K_0402_5%
VGA@
12
C202 0.1U_0402_16V7K
VGA@
C202 0.1U_0402_16V7K
VGA@
1 2
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
216-0729002 A12 M96_BGA962
U5A
MAD@
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
216-0729002 A12 M96_BGA962
U5A
MAD@
NC#1
AJ21
NC#2
AK21
NC_PWRGOOD
AH16 PCIE_CALRN Y29
PCIE_CALRP Y30
PCIE_REFCLKN
AA36 PCIE_REFCLKP
AB35
PCIE_RX0N
Y37 PCIE_RX0P
AA38
PCIE_RX10N
K37 PCIE_RX10P
L38
PCIE_RX11N
J36 PCIE_RX11P
K35
PCIE_RX12N
H37 PCIE_RX12P
J38
PCIE_RX13N
G36 PCIE_RX13P
H35
PCIE_RX14N
F37 PCIE_RX14P
G38
PCIE_RX15N
E37 PCIE_RX15P
F35
PCIE_RX1N
W36 PCIE_RX1P
Y35
PCIE_RX2N
V37 PCIE_RX2P
W38
PCIE_RX3N
U36 PCIE_RX3P
V35
PCIE_RX4N
T37 PCIE_RX4P
U38
PCIE_RX5N
R36 PCIE_RX5P
T35
PCIE_RX6N
P37 PCIE_RX6P
R38
PCIE_RX7N
N36 PCIE_RX7P
P35
PCIE_RX8N
M37 PCIE_RX8P
N38
PCIE_RX9N
L36 PCIE_RX9P
M35
PERSTB
AA30
PCIE_TX0N Y32
PCIE_TX0P Y33
PCIE_TX10N L32
PCIE_TX10P L33
PCIE_TX11N L29
PCIE_TX11P L30
PCIE_TX12N K32
PCIE_TX12P K33
PCIE_TX13N J32
PCIE_TX13P J33
PCIE_TX14N K29
PCIE_TX14P K30
PCIE_TX15N H32
PCIE_TX15P H33
PCIE_TX1N W32
PCIE_TX1P W33
PCIE_TX2N U32
PCIE_TX2P U33
PCIE_TX3N U29
PCIE_TX3P U30
PCIE_TX4N T32
PCIE_TX4P T33
PCIE_TX5N T29
PCIE_TX5P T30
PCIE_TX6N P32
PCIE_TX6P P33
PCIE_TX7N P29
PCIE_TX7P P30
PCIE_TX8N N32
PCIE_TX8P N33
PCIE_TX9N N29
PCIE_TX9P N30
R97
10K_0402_5%
VGA@
R97
10K_0402_5%
VGA@
1 2
C201 0.1U_0402_16V7K
VGA@
C201 0.1U_0402_16V7K
VGA@
1 2
C206 0.1U_0402_16V7K
VGA@
C206 0.1U_0402_16V7K
VGA@
1 2
C200 0.1U_0402_16V7K
VGA@
C200 0.1U_0402_16V7K
VGA@
1 2
LVTMDP
LVDS CONTROL
216-0729002 A12 M96_BGA962
U5G
MAD@
LVTMDP
LVDS CONTROL
216-0729002 A12 M96_BGA962
U5G
MAD@
DIGON AJ27
TXCLK_LN_DPE3N AR34
TXCLK_LP_DPE3P AP34
TXCLK_UN_DPF3N AL36
TXCLK_UP_DPF3P AK35
TXOUT_L0N_DPE2N AU35
TXOUT_L0P_DPE2P AW37
TXOUT_L1N_DPE1N AU39
TXOUT_L1P_DPE1P AR37
TXOUT_L2N_DPE0N AR35
TXOUT_L2P_DPE0P AP35
TXOUT_L3N AP37
TXOUT_L3P AN36
TXOUT_U0N_DPF2N AK37
TXOUT_U0P_DPF2P AJ38
TXOUT_U1N_DPF1N AJ36
TXOUT_U1P_DPF1P AH35
TXOUT_U2N_DPF0N AH37
TXOUT_U2P_DPF0P AG38
TXOUT_U3N AG36
TXOUT_U3P AF35
VARY_BL AK27
C212 0.1U_0402_16V7K
VGA@
C212 0.1U_0402_16V7K
VGA@
1 2
C214 0.1U_0402_16V7K
VGA@
C214 0.1U_0402_16V7K
VGA@
1 2
C208 0.1U_0402_16V7K
VGA@
C208 0.1U_0402_16V7K
VGA@
1 2
C220 0.1U_0402_16V7K
VGA@
C220 0.1U_0402_16V7K
VGA@
1 2
C228 0.1U_0402_16V7K
VGA@
C228 0.1U_0402_16V7K
VGA@
1 2
C217 0.1U_0402_16V7K
VGA@
C217 0.1U_0402_16V7K
VGA@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VDD1DI
+AVDD
VGA_GPIO1
VGA_GPIO2
GENERICC
THM_ALERT#
SOUT_GPIO8
SIN_GPIO9
VGA_GPIO11
VGA_GPIO12
VGA_GPIO13
+DPLL_VDDC
GPU_THERM_D+
+VDD1DI
ROMSE_GPIO22
GPU_VID0
+DPLL_PVDD
VGA_GPIO0
GPU_VID1
XTALOUT
27MCLK
VGA_GPIO11
VGA_GPIO12
VGA_GPIO13
ROMSE_GPIO22
GENERICC
VGA_GPIO0
VGA_GPIO1
VGA_GPIO2
SOUT_GPIO8
SIN_GPIO9
+VGA_VREF
VGA_ENBKL
GPU_THERM_D-
+TSVDD
VGA_AC_DET
VGA_SMB_DA2
GPU_THERM_D-
VGA_SMB_CK2
GPU_THERM_D+
VRAM_ID3
VRAM_ID1
VRAM_ID2
VRAM_ID0
TRSTB
TCK
TMS
+AVDD
27MCLKXTALOUT
VGA_AC_DET
THM_ALERT#
EC_SMB_DA2
EC_SMB_CK2
VGA_SMB_DA2
VGA_SMB_CK2
H2SYNC
V2SYNC
VGA_CRT_B
VGA_CRT_VSYNC
VGA_CRT_HSYNC
VGA_CRT_DATA
VGA_CRT_G
VGA_CRT_CLK
V2SYNC
H2SYNC
VGA_CRT_R
VGA_HDMI_SDATA
VGA_HDMI_SCLK
VGA_CRT_CLK
VGA_CRT_DATA
VGA_LCD_DAT
VGA_LCD_CLK
VGA_HDMI_DET
+A2VDD
TCK
VRAM_ID1
VRAM_ID2
VRAM_ID3
VRAM_ID0
TRSTB
TMS
TESTEN
CLK_GPIO10
ROMSE_GPIO22
SOUT_GPIO8SIN_GPIO9
CLK_GPIO10
ACIN_R
GPU_VID049
VGA_ENBKL13
GPU_VID149
EC_SMB_CK2 8,34
EC_SMB_DA2 8,34
VGA_CRT_R 24
VGA_CRT_G 24
VGA_CRT_B 24
VGA_CRT_HSYNC 24
VGA_CRT_VSYNC 24
VGA_HDMI_TXC+ 23
VGA_HDMI_TXC- 23
VGA_HDMI_TXD0+ 23
VGA_HDMI_TXD0- 23
VGA_HDMI_TXD1+ 23
VGA_HDMI_TXD1- 23
VGA_HDMI_TXD2- 23
VGA_HDMI_TXD2+ 23
VGA_HDMI_SCLK 23
VGA_HDMI_SDATA 23
VGA_CRT_CLK 24
VGA_CRT_DATA 24
VGA_LCD_CLK22
VGA_LCD_DAT22
VGA_HDMI_DET23,26
VGA_DBCLK34
TESTEN 18
EC_ACIN34
ACIN34,41
+1.8VSG
+1.8VSG
+1.0VSG
+1.8VSG
+1.8VSG
+3VSG
+1.8VSG
+3VSG
+3VSG
+3VSG
+3VSG
+3VSG
+3VSG
+3VSG
+1.8VSG
+3VSG
+3VSG
+3VSG
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_Strape/DP/HDMI//CRT
C
17 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_Strape/DP/HDMI//CRT
C
17 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_Strape/DP/HDMI//CRT
C
17 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
GPIO11
GPIO12
GPIO13 GPIO13,12,11 (config 2,1,0) :
VIP_DEVICE_EN
1
VIP Device Strap Enable indicates to the software driver
Strap Name Pin Straps description <all internal PD>
001
50mA
BIOS_ROM_EN
Setting
GPIO22 Enable external BIOS ROM device
0: Diable, 1: Enable
00: No audio function; 10: Audio for DisplayPort only;
01: Audio for DisplayPort and HDMI if adapter is detected;
11: Audio for both DisplayPort and HDMI
0
1
0: Driver would ignore the value sampled on VHAD_0 during reset
a) If BIOS_ROM_EN = 1, then Config[2:0] defines
the ROM type.
b) If BIOS_ROM_EN = 0, then Config[2:0] defines
the primary memory aperture size.
120mA
150mA
20mA
70mA
45mA
AUD[1]
130mA
AUD(0)
memory apertures
CONFIG[3:0]
128 MB 000
256 MB 001 *
64 MB 010
HSYNC
VSYNC
GPIO9
11
VGA Disable determines
V2SYNC
CONFIG[2]
0: VGA Controller capacity enabled
CONFIG[1]
1: The device will not be recognized as the system’s VGA controller
CONFIG[0]
0
0
External VGA Thermal Sensor
NC on Park
FLASH ROM
HDMI
CRT
Not share via for other GND
Strap
1: VHAD_0 to determine whether or not a VIP slave device
VGA_DIS
TX_PWRS_ENB GPIO0 Transmitter Power Saving Enable
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
GPIO1TX_DEEMPH_EN PCI Express Transmitter De-emphasis Enable
0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)
BIF_GEN2_EN GPIO2 0= Advertises the PCI-E device as 2.5 GT/s capable at power-on
5.0 GT/s capability will be controlled by software
1= Advertises the PCI-E device as 5.0 GT/s capable at power-on 0
RESERVED H2SYNC
GPIO8
GPIO21
Internal use only. THIS PAD HAS AN INTERNAL
PULL-DOWN AND MUST BE 0 V AT RESET. The
pad may be left unconnected
NC on Park
NC on Park
NC on Park
Park NC pins
PD-Reset
NC on Park
Internal PD
1001 101X b
Address
A 1-Mbit serial EEPROM is
required on GDDR5 designs
DDR3 can be removed
For VGA boot unstable issue
1
64MX16
VRAM_ID2 VRAM_ID1 VRAM_ID0
VRAM
Samsung (SA000035720/K4W1G1646E-HC12)
O1 OO
Location VRAM_ID3
OO1
Park
(XT)
FLASH ROM
TYPE 1
11/12 ADD VGA ROM
DVT 0119 SET TO @
11/12 FOR VGA ROM
12/23 change Res. to 10k Ohm
1O
12/08 remove AND gate,add EC_ACIN net
12/15 update
12/15 update
20mA
12/15 update
12/08 add EC_ACIN net
12/17 add ACIN net
12/23 change Res. to 2.2kOhm
12/23 update R141.R142 Res.
DVT 0119
Remove R138,R139(NO NEED)
DVT 0125 unstuff R117,R110,D2,R1096
DVT 0128
Set to MUX@
DVT 0128 change to SB00000DH00
DVT 0131 R143,R144,R145
with MUX@
<4 pcs>
<4 pcs>
Hynix (SA000032420/H5TQ1G63BFR-12C)
Hynix (SA00003VS00/H5TQ2G63BFR-12C)
Samsung (SA00003MQ00/K4W2G1646B-HC12)
128MX16
11
1111
R102
4.7K_0402_5%
VGA@
R102
4.7K_0402_5%
VGA@
1 2
C256
1U_0402_6.3V6K
VGA@
C256
1U_0402_6.3V6K
VGA@
1
2
R135 249_0402_1%VGA@R135 249_0402_1%VGA@
1 2
R120
10K_0402_5%
VGA@R120
10K_0402_5%
VGA@
12
R128
10K_0402_5%
@
R128
10K_0402_5%
@
12
R136 10K_0402_5%MUX@ R136 10K_0402_5%MUX@
1 2
R129
10K_0402_5%
@
R129
10K_0402_5%
@
12
R113 10K_0402_5%@R113 10K_0402_5%@
1 2
Q5B
DMN66D0LDW-7_SOT363-6
VGA@Q5B
DMN66D0LDW-7_SOT363-6
VGA@
3
5
4
R115 10K_0402_5%VGA@ R115 10K_0402_5%VGA@
1 2
T12T12
L16
BLM18AG121SN1D_0603
VGA@
L16
BLM18AG121SN1D_0603
VGA@
12
R134 10K_0402_5%@R134 10K_0402_5%@
1 2
C240
1U_0402_6.3V6K
VGA@
C240
1U_0402_6.3V6K
VGA@
1
2
R125
10K_0402_5%
@
R125
10K_0402_5%
@
12
T11T11
C232
0.1U_0402_16V4Z
VGA@
C232
0.1U_0402_16V4Z
VGA@
1
2
R1088 0_0603_5%
VGA@
R1088 0_0603_5%
VGA@
12
C236
1U_0402_6.3V6K
VGA@
C236
1U_0402_6.3V6K
VGA@
1
2
Q5A DMN66D0LDW-7_SOT363-6
VGA@
Q5A DMN66D0LDW-7_SOT363-6
VGA@
61
2
Y1
27MHZ_16PF_X5H027000FG1H
VGA@Y1
27MHZ_16PF_X5H027000FG1H
VGA@
2 1
C262
18P_0402_50V8J
VGA@
C262
18P_0402_50V8J
VGA@
T17T17
C253
0.1U_0402_16V4Z
VGA@
C253
0.1U_0402_16V4Z
VGA@
1
2
R126
10K_0402_5%
@
R126
10K_0402_5%
@
12
R107 10K_0402_5%VGA@ R107 10K_0402_5%VGA@
1 2
R116 10K_0402_5%@R116 10K_0402_5%@
1 2
R597
0_0402_5%
VGA@
R597
0_0402_5%
VGA@
12
U6
ADM1032ARMZ-2REEL_MSOP8
VGA@U6
ADM1032ARMZ-2REEL_MSOP8
VGA@
VDD
1
ALERT# 6
THERM#
4GND 5
D+
2
D-
3
SCLK 8
SDATA 7
R421 10K_0402_5%
@
R421 10K_0402_5%
@
1 2
R104 10K_0402_5%VGA@ R104 10K_0402_5%VGA@
1 2
R124
10K_0402_5%
@
R124
10K_0402_5%
@
12
R130
10K_0402_5%
@
R130
10K_0402_5%
@
12
R969
0_0402_5%
@
R969
0_0402_5%
@
C259
1U_0402_6.3V6K
VGA@
C259
1U_0402_6.3V6K
VGA@
1
2
D2
CH751H-40PT_SOD323-2
@D2
CH751H-40PT_SOD323-2
@
21
R133 499_0402_1%VGA@R133 499_0402_1%VGA@
1 2
R1096 0_0402_5%
@
R1096 0_0402_5%
@
1 2
C258
10U_0603_6.3V6M
VGA@
C258
10U_0603_6.3V6M
VGA@
1
2
L17
BLM18AG121SN1D_0603
VGA@
L17
BLM18AG121SN1D_0603
VGA@
12
R137 10K_0402_5%MUX@ R137 10K_0402_5%MUX@
1 2
R101 2.2K_0402_5%
VGA@
R101 2.2K_0402_5%
VGA@
1 2
C239
0.1U_0402_16V4Z
VGA@
C239
0.1U_0402_16V4Z
VGA@
1
2
C233
2200P_0402_50V7K
VGA@
C233
2200P_0402_50V7K
VGA@
1 2
T14T14
R103
4.7K_0402_5%
VGA@
R103
4.7K_0402_5%
VGA@
1 2
C252
10U_0603_6.3V6M
VGA@
C252
10U_0603_6.3V6M
VGA@
1
2
R144 150_0402_1%MUX@ R144 150_0402_1%MUX@
1 2
R146 0_0402_5%
@
R146 0_0402_5%
@
1 2
U901
M25P10-AVMN6P
@U901
M25P10-AVMN6P
@
S
1
VCC
8
Q2
HOLD
7
VSS 4
D
5
C
6
W
3
R108 4.7K_0402_5%VGA@R108 4.7K_0402_5%VGA@
1 2
C263
18P_0402_50V8J
VGA@
C263
18P_0402_50V8J
VGA@
L21
BLM18AG121SN1D_0603
VGA@
L21
BLM18AG121SN1D_0603
VGA@
12
C260
0.1U_0402_16V4Z
VGA@
C260
0.1U_0402_16V4Z
VGA@
1
2
C250
0.1U_0402_16V4Z
VGA@
C250
0.1U_0402_16V4Z
VGA@
1
2
R123
10K_0402_5%
@
R123
10K_0402_5%
@
12
R147 10K_0402_5%
@
R147 10K_0402_5%
@
1 2
R109 10K_0402_5%@R109 10K_0402_5%@
1 2
R145 150_0402_1%MUX@ R145 150_0402_1%MUX@
1 2
C251
1U_0402_6.3V6K
VGA@
C251
1U_0402_6.3V6K
VGA@
1
2
R970
0_0402_5%@
R970
0_0402_5%@
R110 10K_0402_5%@R110 10K_0402_5%@
1 2
L23
BLM18AG121SN1D_0603
VGA@
L23
BLM18AG121SN1D_0603
VGA@
12
R111 10K_0402_5%@R111 10K_0402_5%@
1 2
R420 10K_0402_5%
@
R420 10K_0402_5%
@
1 2
R117 10K_0402_5%@R117 10K_0402_5%@
1 2
L20
BLM18AG121SN1D_0603
VGA@
L20
BLM18AG121SN1D_0603
VGA@
12
C1182
.1U_0402_16V7K
@
C1182
.1U_0402_16V7K
@
R105 4.7K_0402_5%VGA@R105 4.7K_0402_5%VGA@
1 2
R122 499_0402_1%VGA@R122 499_0402_1%VGA@
1 2
C237
0.1U_0402_16V4Z
VGA@
C237
0.1U_0402_16V4Z
VGA@
1
2
R1481M_0603_5%
VGA@
R1481M_0603_5%
VGA@
R119 10K_0402_5%@R119 10K_0402_5%@
1 2
R142 4.7K_0402_5%MUX@ R142 4.7K_0402_5%MUX@
1 2
C249
10U_0603_6.3V6M
VGA@
C249
10U_0603_6.3V6M
VGA@
1
2
R118 10K_0402_5%@R118 10K_0402_5%@
1 2
DPA
DPB
DPC
DPD
MUTI GFX
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
216-0729002 A12 M96_BGA962
U5B
MAD@
DPA
DPB
DPC
DPD
MUTI GFX
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
216-0729002 A12 M96_BGA962
U5B
MAD@
DMINUS
AG29
DPLL_PVDD
AM32
DPLL_PVSS
AN32
DPLL_VDDC
AN31
DPLUS
AF29
DVPCLK
AR1
DVPCNTL_0
AP8
DVPCNTL_1
AW8
DVPCNTL_2
AR3
DVPCNTL_MVP_0
AR8
DVPCNTL_MVP_1
AU8
DVPDATA_0
AU1
DVPDATA_1
AU3
DVPDATA_10
AV7
DVPDATA_11
AN7
DVPDATA_12
AV9
DVPDATA_13
AT9
DVPDATA_14
AR10
DVPDATA_15
AW10
DVPDATA_16
AU10
DVPDATA_17
AP10
DVPDATA_18
AV11
DVPDATA_19
AT11
DVPDATA_2
AW3
DVPDATA_20
AR12
DVPDATA_21
AW12
DVPDATA_22
AU12
DVPDATA_23
AP12
DVPDATA_3
AP6
DVPDATA_4
AW5
DVPDATA_5
AU5
DVPDATA_6
AR6
DVPDATA_7
AW6
DVPDATA_8
AU6
DVPDATA_9
AT7
GENERICA
AJ19
GENERICB
AK19
GENERICC
AJ20
GENERICD
AK20
GENERICE_HPD4
AJ24
GENERICF
AH26
GENERICG
AH24
GPIO_0
AH20
GPIO_1
AH18
GPIO_10_ROMSCK
AJ16
GPIO_11
AK16
GPIO_12
AL16
GPIO_13
AM16
GPIO_14_HPD2
AM14
GPIO_15_PWRCNTL_0
AM13
GPIO_16_SSIN
AK14
GPIO_17_THERMAL_INT
AG30
GPIO_18_HPD3
AN14
GPIO_19_CTF
AM17
GPIO_2
AN16
GPIO_20_PWRCNTL_1
AL13
GPIO_21_BB_EN
AJ14
GPIO_22_ROMCSB
AK13
GPIO_23_CLKREQB
AN13
GPIO_3_SMBDATA
AH23
GPIO_4_SMBCLK
AJ23
GPIO_5_AC_BATT
AH17
GPIO_6
AJ17
GPIO_7_BLON
AK17
GPIO_8_ROMSO
AJ13
GPIO_9_ROMSI
AH15
H2SYNC AD29
HPD1
AK24
HSYNC AC36
JTAG_TCK
AK23 JTAG_TDI
AN23
JTAG_TDO
AM24 JTAG_TMS
AL24
JTAG_TRSTB
AM23
NC_DDCDATA_AUX7N AK29
NC_DDCCLK_AUX7P AK30
TS_FDO
AK32
TSVDD
AJ32
TSVSS
AJ33
VREFG
AH13
VSS1DI AC34
VSS2DI AG32
XTALIN
AV33
XTALOUT
AU34
A2VDD AG33
A2VDDQ AD33
A2VSSQ AF33
AUX1N AL27
AUX1P AM27
AUX2N AM20
AUX2P AN20
AVDD AD34
AVSSQ AE34
BAF37
B2 AF30
B2B AF31
BB AE38
CAC32
COMP AF32
DDC1CLK AM26
DDC1DATA AN26
DDC2CLK AM19
DDC2DATA AL19
DDC6CLK AJ30
DDC6DATA AJ31
DDCDATA_AUX3N AM30
DDCCLK_AUX3P AL30
DDCDATA_AUX4N AM29
DDCCLK_AUX4P AL29
DDCDATA_AUX5N AM21
DDCCLK_AUX5P AN21
GAE36
G2 AD30
G2B AD31
GB AD35
RAD39
R2 AC30
R2B AC31
R2SET AA29
RB AD37
RSET AB34
SCL
AK26
SDA
AJ26
TX0M_DPA2N AR24
TX0M_DPC2N AR14
TX0P_DPA2P AT25
TX0P_DPC2P AT15
TX1M_DPA1N AV25
TX1M_DPC1N AV15
TX1P_DPA1P AU26
TX1P_DPC1P AU16
TX2M_DPA0N AR26
TX2M_DPC0N AR16
TX2P_DPA0P AT27
TX2P_DPC0P AT17
TX3M_DPB2N AU30
TX3M_DPD2N AR20
TX3P_DPB2P AV31
TX3P_DPD2P AT21
TX4M_DPB1N AT31
TX4M_DPD1N AV21
TX4P_DPB1P AR32
TX4P_DPD1P AU22
TX5M_DPB0N AU32
TX5M_DPD0N AR22
TX5P_DPB0P AT33
TX5P_DPD0P AT23
TXCAM_DPA3N AV23
TXCAP_DPA3P AU24
TXCBM_DPB3N AT29
TXCBP_DPB3P AR30
TXCCM_DPC3N AV13
TXCCP_DPC3P AU14
TXCDM_DPD3N AT19
TXCDP_DPD3P AU20
V2SYNC AC29
VDD1DI AC33
VDD2DI AG31
VSYNC AC38
YAD32
R143 150_0402_1%MUX@ R143 150_0402_1%MUX@
1 2
C238
22U_0805_6.3V6M
VGA@
C238
22U_0805_6.3V6M
VGA@
1
2
R131
10K_0402_5%
@
R131
10K_0402_5%
@
12
C245 0.1U_0402_16V4Z
VGA@
C245 0.1U_0402_16V4Z
VGA@
1 2
R1097 0_0402_5%@R1097 0_0402_5%@
1 2
C241
10U_0603_6.3V6M
VGA@
C241
10U_0603_6.3V6M
VGA@
1
2
R141 4.7K_0402_5%MUX@ R141 4.7K_0402_5%MUX@
1 2
R132 10K_0402_5%@R132 10K_0402_5%@
1 2
R140
715_0402_1%
VGA@
R140
715_0402_1%
VGA@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAB12
DQMB#5
B_BA2
CKEB1
CASB0#
DQMB#6
B_BA0
CASB1#
TEST_MCLK
MVREFDB
B_BA1
DQMB#7
RASB0#
TEST_YCLK
QSB#1
MVREFSB
RASB1#
CLKB1
MVREFSB
MDB51
MDB15
MDB16
MDB52
MDB17
MDB53
MDB18
MDB54
MDB19
MDB55
MDB20
MDB56
MDB21
MDB57
MDB22
MDB58
MDB23
MDB59
MDB24
MDB60
MDB25
MDB61
MDB26
MDB27
MDB62
MDB28
MDB63
MDB[0..63]
MDB29
MDB30
MDB31
MDB32
MDB0
MDB33
MDB34
MDB35
MDB36
MDB37
MDB1
MDB38
MDB39
MDB2
MDB40
MDB3
MDB41
MDB4
MDB42
MDB5
MDB6
MDB43
MDB7
MDB44
MDB8
MDB45
MDB9
MDB46
MDB10
MDB47
MDB11
MDB48
MDB12
MDB49
MDB13
MDB50
MDB14
MAB0
QSB#2
CLKB1#
MAB[0..12]
QSB#3
QSB#4
DQMB#1
QSB#5
MAB1
WEB0#
QSB#6
QSB#[0..7]
CSB0#_0
MAB2
B_BA[0..2]
TESTEN
DQMB#2
QSB#7
MAB3
WEB1#
MAB4
DQMB#0
MAB5
CSB1#_0
DQMB#3
MAB6
CLKB0
DQMB#[0..7]
MAB7
MAB8
CLKB0#
DQMB#4
MAB9
MAB10
QSB#0
MAB11
CKEB0
ODTB0
ODTB1
QSB1
QSB2
QSB[0..7]
QSB7
QSB3
QSB0
QSB4
QSB6
QSB5
MVREFDBMVREFDB
GCORE_SEN
TESTEN
MVREFSA
MVREFDA
MVREFDA
MVREFSA
MDB[0..63]21
QSB#[0..7] 21
QSB[0..7] 21
MAB[0..12] 21
B_BA[0..2] 21
DQMB#[0..7] 21
ODTB0 21
ODTB1 21
CLKB0 21
CLKB0# 21
CLKB1 21
CLKB1# 21
RASB1# 21
RASB0# 21
CSB1#_0 21
CASB1# 21
CASB0# 21
CSB0#_0 21
WEB1# 21
CKEB1 21
CKEB0 21
WEB0# 21
VRAM_RST# 21
MAB13 21
GCORE_SEN 49
TESTEN17
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
Memory
Custom
18 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
Memory
Custom
18 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
Memory
Custom
18 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
M96 no support
In M97, Medison and Park, AF28 is
FB_VDDC, AG28 is FB_VDDCI, AH29 is
FB_GND. GCORE_SEN and FB_GND
should route as differential pair Same
as VDDCI_SEN and FB_GND
M96 use 4.7K to
PD directly.
M96 Broadway
10k Ohm
SD028100280
680 Ohm
SD028680080
R168
R166
C270
68 pF
SE071680J80
DNI
4.7k Ohm
SD028470180
0 Ohm
SD028000080
1000 pF
SE074102K80
4.7k Ohm
SD028470180
R163
If use M96 upper resistor will
change to 100ohm for
MVREFDA/B and MVREFSA/B
If use M96 upper resistor will
change to 100ohm for
MVREFDA/B and MVREFSA/B
Park only support single channel
memory (channel B only)
Mahatten upper resistor use 40.2ohm
Mahatten upper resistor use
40.2ohm
11/04 delete channelA
12/07 change R166 to 51.1Ohm
change C270,R168 connection
12/15 update
R155 240_0402_1%
VGA@
R155 240_0402_1%
VGA@
1 2
C265
0.1U_0402_16V4Z
VGA@
C265
0.1U_0402_16V4Z
VGA@
1
2
MEMORY INTERFACE A
216-0729002 A12 M96_BGA962
U5C
MAD@
MEMORY INTERFACE A
216-0729002 A12 M96_BGA962
U5C
MAD@
DQA_0
C37
DQA_1
C35
DQA_10
C30
DQA_11
A30
DQA_12
F28
DQA_13
C28
DQA_14
A28
DQA_15
E28
DQA_16
D27
DQA_17
F26
DQA_18
C26
DQA_19
A26
DQA_2
A35
DQA_20
F24
DQA_21
C24
DQA_22
A24
DQA_23
E24
DQA_24
C22
DQA_25
A22
DQA_26
F22
DQA_27
D21
DQA_28
A20
DQA_29
F20
DQA_3
E34
DQA_30
D19
DQA_31
E18
DQA_32
C18
DQA_33
A18
DQA_34
F18
DQA_35
D17
DQA_36
A16
DQA_37
F16
DQA_38
D15
DQA_39
E14
DQA_4
G32
DQA_40
F14
DQA_41
D13
DQA_42
F12
DQA_43
A12
DQA_44
D11
DQA_45
F10
DQA_46
A10
DQA_47
C10
DQA_48
G13
DQA_49
H13
DQA_5
D33
DQA_50
J13
DQA_51
H11
DQA_52
G10
DQA_53
G8
DQA_54
K9
DQA_55
K10
DQA_56
G9
DQA_57
A8
DQA_58
C8
DQA_59
E8
DQA_6
F32
DQA_60
A6
DQA_61
C6
DQA_62
E6
DQA_63
A5
DQA_7
E32
DQA_8
D31
DQA_9
F30
MEM_CALRP1
M12
MVREFDA
L18
MVREFSA
L20
NC_MEM_CALRN0
L27
NC_MEM_CALRN1
N12
NC_MEM_CALRN2
AG12
NC_MEM_CALRP0
M27
NC_MEM_CALRP2
AH12
CASA0B K20
CASA1B K17
CKEA0 K21
CKEA1 J20
CLKA0 H27
CLKA0B G27
CLKA1 J14
CLKA1B H14
CSA0B_0 K24
CSA0B_1 K27
CSA1B_0 M13
CSA1B_1 K16
DQMA_0 A32
DQMA_1 C32
DQMA_2 D23
DQMA_3 E22
DQMA_4 C14
DQMA_5 A14
DQMA_6 E10
DQMA_7 D9
MAA_0 G24
MAA_1 J23
MAA_10 L13
MAA_11 G16
MAA_12 J16
MAA_13/BA2 H16
MAA_14/BA0 J17
MAA_15/BA1 H17
MAA_2 H24
MAA_3 J24
MAA_4 H26
MAA_5 J26
MAA_6 H21
MAA_7 G21
MAA_8 H19
MAA_9 H20
ODTA0 J21
ODTA1 G19
RASA0B K23
RASA1B K19
QSA_0/RDQSA_0 C34
QSA_1/RDQSA_1 D29
QSA_2/RDQSA_2 D25
QSA_3/RDQSA_3 E20
QSA_4/RDQSA_4 E16
QSA_5/RDQSA_5 E12
QSA_6/RDQSA_6 J10
QSA_7/RDQSA_7 D7
RSVD#1 AF28
RSVD#9 T8
RSVD#11 W8
RSVD#2 AG28
RSVD#3 AL31
RSVD#5 H23
RSVD#6 J19
QSA_0B/WDQSA_0 A34
QSA_1B/WDQSA_1 E30
QSA_2B/WDQSA_2 E26
QSA_3B/WDQSA_3 C20
QSA_4B/WDQSA_4 C16
QSA_5B/WDQSA_5 C12
QSA_6B/WDQSA_6 J11
QSA_7B/WDQSA_7 F8
WEA0B K26
WEA1B L15
R169
51.1_0402_1%
VGA@
R169
51.1_0402_1%
VGA@
12
R162 240_0402_1%
VGA@
R162 240_0402_1%
VGA@
1 2
R1092
100_0402_1%
VGA@
R1092
100_0402_1%
VGA@
12
R164 240_0402_1%
VGA@
R164 240_0402_1%
VGA@
1 2
R1090
100_0402_1%
VGA@
R1090
100_0402_1%
VGA@
12
R158 240_0402_1%
VGA@
R158 240_0402_1%
VGA@
1 2
R156
40.2_0402_1%
VGA@
R156
40.2_0402_1%
VGA@
12
C270
68P_0402_50V8J
VGA@
C270
68P_0402_50V8J
VGA@
1
2
MEMORY INTERFACE B
216-0729002 A12 M96_BGA962
U5D
MAD@
MEMORY INTERFACE B
216-0729002 A12 M96_BGA962
U5D
MAD@
DQB_0
C5
DQB_1
C3
DQB_10
J4
DQB_11
K6
DQB_12
K5
DQB_13
L4
DQB_14
M6
DQB_15
M1
DQB_16
M3
DQB_17
M5
DQB_18
N4
DQB_19
P6
DQB_2
E3
DQB_20
P5
DQB_21
R4
DQB_22
T6
DQB_23
T1
DQB_24
U4
DQB_25
V6
DQB_26
V1
DQB_27
V3
DQB_28
Y6
DQB_29
Y1
DQB_3
E1
DQB_30
Y3
DQB_31
Y5
DQB_32
AA4
DQB_33
AB6
DQB_34
AB1
DQB_35
AB3
DQB_36
AD6
DQB_37
AD1
DQB_38
AD3
DQB_39
AD5
DQB_4
F1
DQB_40
AF1
DQB_41
AF3
DQB_42
AF6
DQB_43
AG4
DQB_44
AH5
DQB_45
AH6
DQB_46
AJ4
DQB_47
AK3
DQB_48
AF8
DQB_49
AF9
DQB_5
F3
DQB_50
AG8
DQB_51
AG7
DQB_52
AK9
DQB_53
AL7
DQB_54
AM8
DQB_55
AM7
DQB_56
AK1
DQB_57
AL4
DQB_58
AM6
DQB_59
AM1
DQB_6
F5
DQB_60
AN4
DQB_61
AP3
DQB_62
AP1
DQB_63
AP5
DQB_7
G4
DQB_8
H5
DQB_9
H6
MVREFDB
Y12
MVREFSB
AA12
TESTEN
AD28
CASB0B W10
CASB1B AA10
CKEB0 U10
CKEB1 AA11
CLKB0 L9
CLKB0B L8
CLKB1 AD8
CLKB1B AD7
CLKTESTA
AK10
CLKTESTB
AL10
CSB0B_0 P10
CSB0B_1 L10
CSB1B_0 AD10
CSB1B_1 AC10
DQMB_0 H3
DQMB_1 H1
DQMB_2 T3
DQMB_3 T5
DQMB_4 AE4
DQMB_5 AF5
DQMB_6 AK6
DQMB_7 AK5
DRAM_RST AH11
MAB_0 P8
MAB_1 T9
MAB_10 AC8
MAB_11 AC9
MAB_12 AA7
MAB_13/BA2 AA8
MAB_14/BA0 Y8
MAB_15/BA1 AA9
MAB_2 P9
MAB_3 N7
MAB_4 N8
MAB_5 N9
MAB_6 U9
MAB_7 U8
MAB_8 Y9
MAB_9 W9
ODTB0 T7
ODTB1 W7
RASB0B T10
RASB1B Y10
QSB_0/RDQSB_0 F6
QSB_1/RDQSB_1 K3
QSB_2/RDQSB_2 P3
QSB_3/RDQSB_3 V5
QSB_4/RDQSB_4 AB5
QSB_5/RDQSB_5 AH1
QSB_6/RDQSB_6 AJ9
QSB_7/RDQSB_7 AM5
QSB_0B/WDQSB_0 G7
QSB_1B/WDQSB_1 K1
QSB_2B/WDQSB_2 P1
QSB_3B/WDQSB_3 W4
QSB_4B/WDQSB_4 AC4
QSB_5B/WDQSB_5 AH3
QSB_6B/WDQSB_6 AJ8
QSB_7B/WDQSB_7 AM3
WEB0B N10
WEB1B AB11
C1254
0.1U_0402_16V4Z
VGA@
C1254
0.1U_0402_16V4Z
VGA@
1
2
C267
0.1U_0402_16V4Z
VGA@
C267
0.1U_0402_16V4Z
VGA@
1
2
R1091
40.2_0402_1%
VGA@
R1091
40.2_0402_1%
VGA@
12
R163
4.7K_0402_5%
VGA@
R163
4.7K_0402_5%
VGA@
1 2
R165
100_0402_1%
VGA@
R165
100_0402_1%
VGA@
12
C1255
0.1U_0402_16V4Z
VGA@
C1255
0.1U_0402_16V4Z
VGA@
1
2
R151
40.2_0402_1%
VGA@
R151
40.2_0402_1%
VGA@
12
R1089
40.2_0402_1%
VGA@
R1089
40.2_0402_1%
VGA@
12
R161 10K_0402_5%
VGA@
R161 10K_0402_5%
VGA@
1 2
R153
100_0402_1%
VGA@
R153
100_0402_1%
VGA@
12
R160 240_0402_1%
VGA@
R160 240_0402_1%
VGA@
1 2
R159 240_0402_1%
VGA@
R159 240_0402_1%
VGA@
1 2
R170
51.1_0402_1%
VGA@
R170
51.1_0402_1%
VGA@
12
C269
0.1U_0402_16V4Z
VGA@C269
0.1U_0402_16V4Z
VGA@
1
2
R166
51.1_0402_1%
VGA@R166
51.1_0402_1%
VGA@
1 2
C268
0.1U_0402_16V4Z
VGA@C268
0.1U_0402_16V4Z
VGA@
1
2R168
10K_0402_5%
VGA@
R168
10K_0402_5%
VGA@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VDDR4_5
+VDD_CT
+SPV10
+VDDR3
+PCIE_VDDR
+PCIE_PVDD
+SPV_18
+MPV_18
+VGA_BIF
+VDDCI
+1.5VSG
+1.8VSG
+3VSG
+1.8VSG
+1.8VSG
+VGA_CORE
+1.0VSG
+1.8VSG
+VGA_CORE
+1.8VSG
+1.8VSG
+1.0VSG
+VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_Power/GND
Custom
19 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_Power/GND
Custom
19 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_Power/GND
Custom
19 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
60mA
5A
136mA
68mA
2A
400mA
136mA
170mA
2900mA
TBD
170mA
32mA
34.6A
For M96 SPV10=+GPU_CORE
For M97,Nahattan SPV10=+1.0VS
MPV18 For
Mahattan only
M97 and Mahattan VDDC and
VDDCI ball assignments are
different from M96, If M96 is
populated on this
design,VDDC and VDDCI
shoudl be shorted.
150mA
50mA
For M96 only,
Manhattan are NC pin
SPV18 For
Mahattan only Confirm ATI, for
Mahattan, it could be
connected to VGA_CORE
BIF_VDDCI (T27,N27) need
isolate VGA_CORE
*Confirm with AMD
11/05 for layout guideline
12/08 update C274 to 220u_B2
12/08 remove Cap.
12/08 remove Cap.
12/08 remove
Cap.
12/09 remove Cap.---ok
12/08 remove Cap.---ok
update C340 to 220u_B2
PVT 20100304 change to 330U
C293
1U_0402_6.3V6K
VGA@C293
1U_0402_6.3V6K
VGA@
1
2
C278
1U_0402_6.3V6K
VGA@C278
1U_0402_6.3V6K
VGA@
1
2
R569 0_0603_5%
VGA@
R569 0_0603_5%
VGA@
12
C318
1U_0402_6.3V6K
VGA@C318
1U_0402_6.3V6K
VGA@
1
2
C369
1U_0402_6.3V6K
VGA@C369
1U_0402_6.3V6K
VGA@
1
2
C372
1U_0402_6.3V6K
VGA@C372
1U_0402_6.3V6K
VGA@
1
2
C302
1U_0402_6.3V6K
VGA@C302
1U_0402_6.3V6K
VGA@
1
2
L97
FBMA-L11-201209-221LMA30T_0805
VGA@L97
FBMA-L11-201209-221LMA30T_0805
VGA@
12
C370
1U_0402_6.3V6K
VGA@
C370
1U_0402_6.3V6K
VGA@
1
2
C341
10U_0805_6.3V6M
VGA@C341
10U_0805_6.3V6M
VGA@
1
2
C316
1U_0402_6.3V6K
VGA@C316
1U_0402_6.3V6K
VGA@
1
2
L27
BLM18AG601SN1D_2P
VGA@L27
BLM18AG601SN1D_2P
VGA@
12
C359
10U_0603_6.3V6M
VGA@C359
10U_0603_6.3V6M
VGA@
1
2
C313
10U_0603_6.3V6M
VGA@C313
10U_0603_6.3V6M
VGA@
1
2
C276
1U_0402_6.3V6K
VGA@C276
1U_0402_6.3V6K
VGA@
1
2
C383
10U_0805_6.3V6M
VGA@C383
10U_0805_6.3V6M
VGA@
1
2
C333
1U_0402_6.3V6K
VGA@C333
1U_0402_6.3V6K
VGA@
1
2
C364
1U_0402_6.3V6K
VGA@C364
1U_0402_6.3V6K
VGA@
1
2
L25
BLM18AG121SN1D_0603
VGA@L25
BLM18AG121SN1D_0603
VGA@
12
C272
1U_0402_6.3V6K
VGA@C272
1U_0402_6.3V6K
VGA@
1
2
C294
1U_0402_6.3V6K
VGA@C294
1U_0402_6.3V6K
VGA@
1
2
L24
BLM18AG601SN1D_2P
VGA@L24
BLM18AG601SN1D_2P
VGA@
12
C275
1U_0402_6.3V6K
VGA@C275
1U_0402_6.3V6K
VGA@
1
2
C360
1U_0402_6.3V6K
VGA@C360
1U_0402_6.3V6K
VGA@
1
2
C336
10U_0603_6.3V6M
VGA@C336
10U_0603_6.3V6M
VGA@
1
2
C344
10U_0805_6.3V6M
VGA@C344
10U_0805_6.3V6M
VGA@
1
2
C314
1U_0402_6.3V6K
VGA@C314
1U_0402_6.3V6K
VGA@
1
2
C338
0.1U_0402_16V4Z
VGA@C338
0.1U_0402_16V4Z
VGA@
1
2
C329
1U_0402_6.3V6K
VGA@C329
1U_0402_6.3V6K
VGA@
1
2
C334
1U_0402_6.3V6K
VGA@C334
1U_0402_6.3V6K
VGA@
1
2
C367
1U_0402_6.3V6K
VGA@C367
1U_0402_6.3V6K
VGA@
1
2
C307
10U_0805_6.3V6M
VGA@C307
10U_0805_6.3V6M
VGA@
1
2
C310
1U_0402_6.3V6K
VGA@C310
1U_0402_6.3V6K
VGA@
1
2
C345
10U_0805_6.3V6M
VGA@C345
10U_0805_6.3V6M
VGA@
1
2
C281
1U_0402_6.3V6K
VGA@C281
1U_0402_6.3V6K
VGA@
1
2
C361
0.1U_0402_16V4Z
VGA@C361
0.1U_0402_16V4Z
VGA@
1
2
C283
0.1U_0402_16V4Z
VGA@C283
0.1U_0402_16V4Z
VGA@
1
2
C323
1U_0402_6.3V6K
VGA@C323
1U_0402_6.3V6K
VGA@
1
2
C303
1U_0402_6.3V6K
VGA@C303
1U_0402_6.3V6K
VGA@
1
2
C357
1U_0402_6.3V6K
VGA@C357
1U_0402_6.3V6K
VGA@
1
2
C312
1U_0402_6.3V6K
VGA@C312
1U_0402_6.3V6K
VGA@
1
2
C277
1U_0402_6.3V6K
VGA@C277
1U_0402_6.3V6K
VGA@
1
2
C311
1U_0402_6.3V6K
VGA@C311
1U_0402_6.3V6K
VGA@
1
2
C273
1U_0402_6.3V6K
VGA@C273
1U_0402_6.3V6K
VGA@
1
2
L31
BLM18AG121SN1D_0603
VGA@L31
BLM18AG121SN1D_0603
VGA@
12
C291
1U_0402_6.3V6K
VGA@C291
1U_0402_6.3V6K
VGA@
1
2
C379
0.1U_0402_16V4Z
VGA@C379
0.1U_0402_16V4Z
VGA@
1
2
C322
1U_0402_6.3V6K
VGA@C322
1U_0402_6.3V6K
VGA@
1
2
C376
1U_0402_6.3V6K
VGA@C376
1U_0402_6.3V6K
VGA@
1
2
C375
1U_0402_6.3V6K
VGA@C375
1U_0402_6.3V6K
VGA@
1
2
C324
1U_0402_6.3V6K
VGA@C324
1U_0402_6.3V6K
VGA@
1
2
C321
1U_0402_6.3V6K
VGA@C321
1U_0402_6.3V6K
VGA@
1
2
C382
10U_0805_6.3V6M
VGA@C382
10U_0805_6.3V6M
VGA@
1
2
L34
BLM18AG121SN1D_0603
VGA@L34
BLM18AG121SN1D_0603
VGA@
12
L32
BLM18AG121SN1D_0603
VGA@L32
BLM18AG121SN1D_0603
VGA@
12
C349
1U_0402_6.3V6K
VGA@C349
1U_0402_6.3V6K
VGA@
1
2
+
C340
330U_B2_2VM_R15M
VGA@
+
C340
330U_B2_2VM_R15M
VGA@
1
2
L26
BLM18AG121SN1D_0603
VGA@L26
BLM18AG121SN1D_0603
VGA@
12
C335
1U_0402_6.3V6K
VGA@C335
1U_0402_6.3V6K
VGA@
1
2
C327
1U_0402_6.3V6K
VGA@C327
1U_0402_6.3V6K
VGA@
1
2
L96
FBMA-L11-201209-221LMA30T_0805
VGA@L96
FBMA-L11-201209-221LMA30T_0805
VGA@
12
C271
1U_0402_6.3V6K
VGA@C271
1U_0402_6.3V6K
VGA@
1
2
C299
1U_0402_6.3V6K
VGA@C299
1U_0402_6.3V6K
VGA@
1
2
C374
1U_0402_6.3V6K
VGA@C374
1U_0402_6.3V6K
VGA@
1
2
C280
1U_0402_6.3V6K
VGA@C280
1U_0402_6.3V6K
VGA@
1
2
C317
1U_0402_6.3V6K
VGA@C317
1U_0402_6.3V6K
VGA@
1
2
C337
1U_0402_6.3V6K
VGA@C337
1U_0402_6.3V6K
VGA@
1
2
C377
10U_0603_6.3V6M
VGA@C377
10U_0603_6.3V6M
VGA@
1
2
C292
1U_0402_6.3V6K
VGA@C292
1U_0402_6.3V6K
VGA@
1
2
C285
1U_0402_6.3V6K
VGA@C285
1U_0402_6.3V6K
VGA@
1
2
L35
BLM18AG121SN1D_0603
VGA@L35
BLM18AG121SN1D_0603
VGA@
12
C326
1U_0402_6.3V6K
VGA@C326
1U_0402_6.3V6K
VGA@
1
2
C373
1U_0402_6.3V6K
VGA@C373
1U_0402_6.3V6K
VGA@
1
2
C363
0.1U_0402_16V4Z
VGA@C363
0.1U_0402_16V4Z
VGA@
1
2
C301
1U_0402_6.3V6K
VGA@C301
1U_0402_6.3V6K
VGA@
1
2
C356
10U_0603_6.3V6M
VGA@C356
10U_0603_6.3V6M
VGA@
1
2
C371
1U_0402_6.3V6K
VGA@C371
1U_0402_6.3V6K
VGA@
1
2
C315
0.1U_0402_16V4Z
VGA@C315
0.1U_0402_16V4Z
VGA@
1
2
C342
10U_0805_6.3V6M
VGA@C342
10U_0805_6.3V6M
VGA@
1
2
C289
10U_0805_6.3V6M
VGA@C289
10U_0805_6.3V6M
VGA@
1
2
C308
10U_0805_6.3V6M
VGA@C308
10U_0805_6.3V6M
VGA@
1
2
C365
0.1U_0402_16V4Z
VGA@C365
0.1U_0402_16V4Z
VGA@
1
2
C328
1U_0402_6.3V6K
VGA@C328
1U_0402_6.3V6K
VGA@
1
2
C290
1U_0402_6.3V6K
VGA@C290
1U_0402_6.3V6K
VGA@
1
2
C330
1U_0402_6.3V6K
VGA@C330
1U_0402_6.3V6K
VGA@
1
2
C362
1U_0402_6.3V6K
VGA@C362
1U_0402_6.3V6K
VGA@
1
2
C304
10U_0805_6.3V6M
VGA@C304
10U_0805_6.3V6M
VGA@
1
2
C296
1U_0402_6.3V6K
VGA@C296
1U_0402_6.3V6K
VGA@
1
2
C368
1U_0402_6.3V6K
VGA@C368
1U_0402_6.3V6K
VGA@
1
2
C286
1U_0402_6.3V6K
VGA@C286
1U_0402_6.3V6K
VGA@
1
2
C282
0.1U_0402_16V4Z
VGA@C282
0.1U_0402_16V4Z
VGA@
1
2
C325
1U_0402_6.3V6K
VGA@C325
1U_0402_6.3V6K
VGA@
1
2
C309
10U_0805_6.3V6M
VGA@C309
10U_0805_6.3V6M
VGA@
1
2
C366
10U_0603_6.3V6M
VGA@C366
10U_0603_6.3V6M
VGA@
1
2
C320
1U_0402_6.3V6K
VGA@C320
1U_0402_6.3V6K
VGA@
1
2
C306
10U_0805_6.3V6M
VGA@C306
10U_0805_6.3V6M
VGA@
1
2
C384
10U_0805_6.3V6M
VGA@C384
10U_0805_6.3V6M
VGA@
1
2
C331
1U_0402_6.3V6K
VGA@C331
1U_0402_6.3V6K
VGA@
1
2
C350
0.1U_0402_16V4Z
VGA@C350
0.1U_0402_16V4Z
VGA@
1
2
C305
10U_0805_6.3V6M
VGA@C305
10U_0805_6.3V6M
VGA@
1
2
POWER
PLL
PCIE
CORE
MEM I/O
MEM CLK
I/O
BACK BIAS
LEVEL
TRANSLATION
ISOLATED
CORE I/O
216-0729002 A12 M96_BGA962
U5E
MAD@
POWER
PLL
PCIE
CORE
MEM I/O
MEM CLK
I/O
BACK BIAS
LEVEL
TRANSLATION
ISOLATED
CORE I/O
216-0729002 A12 M96_BGA962
U5E
MAD@
PCIE_PVDD
AB37
NC_MPV18#1
H7
NC_MPV18#2
H8
NC_SPV18
AM10
PCIE_VDDC#1 G30
PCIE_VDDC#10 R28
PCIE_VDDC#11 T28
PCIE_VDDC#12 U28
PCIE_VDDC#2 G31
PCIE_VDDC#3 H29
PCIE_VDDC#4 H30
PCIE_VDDC#5 J29
PCIE_VDDC#6 J30
PCIE_VDDC#7 L28
PCIE_VDDC#8 M28
PCIE_VDDC#9 N28
PCIE_VDDR#1 AA31
PCIE_VDDR#2 AA32
PCIE_VDDR#3 AA33
PCIE_VDDR#4 AA34
PCIE_VDDR#5 V28
PCIE_VDDR#6 W29
PCIE_VDDR#7 W30
PCIE_VDDR#8 Y31
SPV10
AN9
SPVSS
AN10
VDDR1#1
AC7
VDDR1#10
G17
VDDR1#11
G20
VDDR1#12
G23
VDDR1#13
G26
VDDR1#14
G29
VDDR1#15
H10
VDDR1#16
J7
VDDR1#17
J9
VDDR1#18
K11
VDDR1#19
K13
VDDR1#2
AD11
VDDR1#20
K8
VDDR1#21
L12
VDDR1#22
L16
VDDR1#23
L21
VDDR1#24
L23
VDDR1#25
L26
VDDR1#26
L7
VDDR1#27
M11
VDDR1#28
N11
VDDR1#29
P7
VDDR1#3
AF7
VDDR1#30
R11
VDDR1#31
U11
VDDR1#32
U7
VDDR1#33
Y11
VDDR1#34
Y7
VDDR1#4
AG10
VDDR1#5
AJ7
VDDR1#6
AK8
VDDR1#7
AL9
VDDR1#8
G11
VDDR1#9
G14
VDDR3#1
AF23
VDDR3#2
AF24
VDDR3#3
AG23
VDDR3#4
AG24
VDDR5#1
AF13
VDDR5#2
AF15
VDDR5#3
AG13
VDDR5#4
AG15
VDDR4#1
AD12
VDDR4#2
AF11
VDDR4#3
AF12
VDDR4#4
AG11
VDDRHA
M20
VDDRHB
V12
VSSRHA
M21
VSSRHB
U12
VDD_CT#1
AF26
VDD_CT#2
AF27
VDD_CT#3
AG26
VDD_CT#4
AG27
VDDC#1 AA15
VDDC#10 AB21
VDDC#11 AB23
VDDC#12 AB26
VDDC#13 AB28
VDDC#14 AC12
VDDC#15 AC15
VDDC#16 AC17
VDDC#17 AC20
VDDC#18 AC22
VDDC#19 AC24
VDDC#2 AA17
VDDC#20 AC27
VDDC#21 AD13
VDDC#22 AD16
VDDC#23 AD18
VDDC#24 AD21
VDDC#25 AD23
VDDC#26 AD26
VDDC#27 AF17
VDDC#28 AF20
VDDC#29 AF22
VDDC#3 AA20
VDDC#30 AG16
VDDC#31 AG18
VDDC#32 AG21
VDDC#33 AH22
VDDC#34 M16
VDDC#35 M18
VDDC#36 M23
VDDC#37 M26
VDDC#38 N15
VDDC#39 N17
VDDC#4 AA22
VDDC#40 N20
VDDC#41 N22
VDDC#42 N24
VDDC#43 N27
VDDC#44 R13
VDDC#45 R16
VDDC#46 R18
VDDC#47 R21
VDDC#48 R23
VDDC#49 R26
VDDC#5 AA24
VDDC#50 T15
VDDC#51 T17
VDDC#52 T20
VDDC#53 T22
VDDC#54 T24
VDDC#55 T27
VDDC#56 U16
VDDC#57 U18
VDDC#58 U21
VDDC#59 U23
VDDC#6 AA27
VDDC#60 U26
VDDC#61 V15
VDDC#62 V17
VDDC#63 V20
VDDC#64 V22
VDDC#65 V24
VDDC#66 V27
VDDC#67 Y16
VDDC#68 Y18
VDDC#69 Y21
VDDC#7 AB13
VDDC#70 Y23
VDDC#71 Y26
VDDC#72 Y28
VDDC#8 AB16
VDDC#9 AB18
VDDCI#1 M15
VDDCI#2 N13
VDDCI#3 R12
VDDCI#4 T12
BBP#1
AA13
BBP#2
Y13 VDDC#73 AH27
VDDC#74 AH28
C298
1U_0402_6.3V6K
VGA@C298
1U_0402_6.3V6K
VGA@
1
2
C297
1U_0402_6.3V6K
VGA@C297
1U_0402_6.3V6K
VGA@
1
2
C279
1U_0402_6.3V6K
VGA@C279
1U_0402_6.3V6K
VGA@
1
2
C319
1U_0402_6.3V6K
VGA@C319
1U_0402_6.3V6K
VGA@
1
2
C284
1U_0402_6.3V6K
VGA@C284
1U_0402_6.3V6K
VGA@
1
2
+
C274
220U_B2_2.5VM_R15M
VGA@
+
C274
220U_B2_2.5VM_R15M
VGA@
1
2
C343
10U_0805_6.3V6M
VGA@C343
10U_0805_6.3V6M
VGA@
1
2
C378
1U_0402_6.3V6K
VGA@C378
1U_0402_6.3V6K
VGA@
1
2
C332
1U_0402_6.3V6K
VGA@C332
1U_0402_6.3V6K
VGA@
1
2
C295
1U_0402_6.3V6K
VGA@C295
1U_0402_6.3V6K
VGA@
1
2
C358
0.1U_0402_16V4Z
VGA@C358
0.1U_0402_16V4Z
VGA@
1
2
C300
1U_0402_6.3V6K
VGA@C300
1U_0402_6.3V6K
VGA@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DPE_PVDD
+DPA_PVDD
+DPF_PVDD
+DPA_VDD10
+DPE_VDD18
+DPD_VDD10
+DPE_VDD10
+DPB_VDD10
+DPA_PVDD
+DPA_PVDD
+DPC_VDD18
+DPA_VDD18
+DPB_VDD18+DPD_VDD18
+DPF_VDD10
+DPA_PVDD
+DPC_VDD10
+DPF_VDD18
FB_GND
+1.0VSG
+1.0VSG
+1.0VSG
+1.8VSG
+1.8VSG
+1.8VSG
+1.8VSG
+1.8VSG
+1.8VSG
+1.8VSG
+1.8VSG
+1.0VSG
+1.0VSG
+1.0VSG
+1.8VSG
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_Power/GND
Custom
20 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_Power/GND
Custom
20 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
M96_Power/GND
Custom
20 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Ball AW34 and AW35
are GND ball in M96,
but have another ball
name in Broadway,
that is XO_IN and
X0_IN2.
200mA
200mA
200mA
200mA
120mA
120mA
20mA
20mA
20mA
20mA
20mA
200mA
200mA
130mA
130mA
130mA
130mA
20mA
For M96 are NC pins
For M96 are NC pins For M96 are NC pins
For M96 are NC pins
For M96 are NC pins
For PX, leave NC when
SBIOS control PWR on/off
12/08 remove Res.
12/08 update BOM structure
12/08 remove Res.
12/15 update
DVT 0119 add FB_GND
C429
1U_0402_6.3V6K
VGA@C429
1U_0402_6.3V6K
VGA@
1
2
C433
10U_0603_6.3V6M
VGA@C433
10U_0603_6.3V6M
VGA@
1
2
L41
BLM18AG121SN1D_0603
VGA@L41
BLM18AG121SN1D_0603
VGA@
12
L42
BLM18AG121SN1D_0603
VGA@L42
BLM18AG121SN1D_0603
VGA@
12
C403
10U_0603_6.3V6M
VGA@C403
10U_0603_6.3V6M
VGA@
1
2
L52
BLM18AG121SN1D_0603
VGA@L52
BLM18AG121SN1D_0603
VGA@
12
L53
BLM18AG121SN1D_0603
VGA@L53
BLM18AG121SN1D_0603
VGA@
12
R402 0_0402_5%
VGA@
R402 0_0402_5%
VGA@
1 2
C413
1U_0402_6.3V6K
VGA@C413
1U_0402_6.3V6K
VGA@
1
2
C434
0.1U_0402_16V4Z
VGA@C434
0.1U_0402_16V4Z
VGA@
1
2
C397
10U_0603_6.3V6M
VGA@C397
10U_0603_6.3V6M
VGA@
1
2
C400
0.1U_0402_16V4Z
VGA@C400
0.1U_0402_16V4Z
VGA@
1
2
C427
10U_0603_6.3V6M
VGA@C427
10U_0603_6.3V6M
VGA@
1
2
L45
BLM18AG121SN1D_0603
VGA@L45
BLM18AG121SN1D_0603
VGA@
12
C391
10U_0603_6.3V6M
VGA@C391
10U_0603_6.3V6M
VGA@
1
2
C430
0.1U_0402_16V4Z
VGA@C430
0.1U_0402_16V4Z
VGA@
1
2
C399
1U_0402_6.3V6K
VGA@C399
1U_0402_6.3V6K
VGA@
1
2
C386
0.1U_0402_16V4Z
VGA@C386
0.1U_0402_16V4Z
VGA@
1
2
L37
BLM18AG121SN1D_0603
VGA@L37
BLM18AG121SN1D_0603
VGA@
12
C418
10U_0603_6.3V6M
VGA@C418
10U_0603_6.3V6M
VGA@
1
2
L36
BLM18AG121SN1D_0603
VGA@L36
BLM18AG121SN1D_0603
VGA@
12
C392
0.1U_0402_16V4Z
VGA@C392
0.1U_0402_16V4Z
VGA@
1
2
C395
0.1U_0402_16V4Z
VGA@C395
0.1U_0402_16V4Z
VGA@
1
2
L40
BLM18AG121SN1D_0603
VGA@L40
BLM18AG121SN1D_0603
VGA@
12
GND
216-0729002 A12 M96_BGA962
U5F
MAD@
GND
216-0729002 A12 M96_BGA962
U5F
MAD@
PCIE_VSS#1
AB39
PCIE_VSS#10
J31
PCIE_VSS#11
J34
PCIE_VSS#12
K31
PCIE_VSS#13
K34
PCIE_VSS#14
K39
PCIE_VSS#15
L31
PCIE_VSS#16
L34
PCIE_VSS#17
M34
PCIE_VSS#18
M39
PCIE_VSS#19
N31
PCIE_VSS#2
E39
PCIE_VSS#20
N34
PCIE_VSS#21
P31
PCIE_VSS#22
P34
PCIE_VSS#23
P39
PCIE_VSS#24
R34
PCIE_VSS#25
T31
PCIE_VSS#26
T34
PCIE_VSS#27
T39
PCIE_VSS#28
U31
PCIE_VSS#29
U34
PCIE_VSS#3
F34
PCIE_VSS#30
V34
PCIE_VSS#31
V39
PCIE_VSS#32
W31
PCIE_VSS#33
W34
PCIE_VSS#34
Y34
PCIE_VSS#35
Y39
PCIE_VSS#4
F39
PCIE_VSS#5
G33
PCIE_VSS#6
G34
PCIE_VSS#7
H31
PCIE_VSS#8
H34
PCIE_VSS#9
H39
VSS_MECH#1 A39
VSS_MECH#2 AW1
VSS_MECH#3 AW39
GND#1 A3
GND#10 AA6
GND#100 F13
GND#101
F15
GND#102
F17
GND#103
F19
GND#104
F21
GND#105
F23
GND#106
F25
GND#107
F27
GND#108
F29
GND#109
F31
GND#11 AB12
GND#110
F33
GND#111
F7
GND#112
F9
GND#113
G2
GND#114
G6
GND#115
H9
GND#116
J2
GND#117
J27
GND#118
J6
GND#119
J8
GND#12 AB15
GND#120
K14
GND#121
K7
GND#122
L11
GND#123
L17
GND#124
L2
GND#125
L22
GND#126
L24
GND#127
L6
GND#128
M17
GND#129
M22
GND#13 AB17
GND#130
M24
GND#131
N16
GND#132
N18
GND#133
N2
GND#134
N21
GND#135
N23
GND#136
N26
GND#137
N6
GND#138
R15
GND#139
R17
GND#14 AB20
GND#140
R2
GND#141
R20
GND#142
R22
GND#143
R24
GND#144
R27
GND#145
R6
GND#146
T11
GND#147
T13
GND#148
T16
GND#149
T18
GND#15 AB22
GND#150
T21
GND#151
T23
GND#152
T26
GND#153
U15
GND#154
U17
GND#155
U2
GND#156
U20
GND#157
U22
GND#158
U24
GND#159
U27
GND#16 AB24
GND#160
U6
GND#161
V11
GND#162
V16
GND#163
V18
GND#164
V21
GND#165
V23
GND#166
V26
GND#167
W2
GND#168
W6
GND#169
Y15
GND#17 AB27
GND#170
Y17
GND#171
Y20
GND#172
Y22
GND#173
Y24
GND#174
Y27
GND#18 AC11
GND#19 AC13
GND#2 A37
GND#20 AC16
GND#21 AC18
GND#22 AC2
GND#23 AC21
GND#24 AC23
GND#25 AC26
GND#26 AC28
GND#27 AC6
GND#28 AD15
GND#29 AD17
GND#3 AA16
GND#30 AD20
GND#31 AD22
GND#32 AD24
GND#33 AD27
GND#34 AD9
GND#35 AE2
GND#36 AE6
GND#37 AF10
GND#38 AF16
GND#39 AF18
GND#4 AA18
GND#40 AF21
GND#41 AG17
GND#42 AG2
GND#43 AG20
GND#44 AG22
GND#45 AG6
GND#46 AG9
GND#47 AH21
GND#48 AH29
GND#49 AJ10
GND#5 AA2
GND#50 AJ11
GND#51 AJ2
GND#52 AJ28
GND#53 AJ6
GND#54 AK11
GND#55 AK31
GND#56 AK7
GND#57 AL11
GND#58 AL14
GND#59 AL17
GND#6 AA21
GND#60 AL2
GND#61 AL20
GND#62 AL21
GND#63 AL23
GND#64 AL26
GND#65 AL32
GND#66 AL6
GND#67 AL8
GND#68 AM11
GND#69 AM31
GND#7 AA23
GND#70 AM9
GND#71 AN11
GND#72 AN2
GND#73 AN30
GND#74 AN6
GND#75 AN8
GND#76 AP11
GND#77 AP7
GND#78 AP9
GND#79 AR5
GND#8 AA26
GND#80 AW34
GND#81 B11
GND#82 B13
GND#83 B15
GND#84 B17
GND#85 B19
GND#86 B21
GND#87 B23
GND#88 B25
GND#89 B27
GND#9 AA28
GND#90 B29
GND#91 B31
GND#92 B33
GND#93 B7
GND#94 B9
GND#95 C1
GND#96 C39
GND#97 E35
GND#98 E5
GND#99 F11
GND#175
U13
GND#176
V13
C411
1U_0402_6.3V6K
VGA@C411
1U_0402_6.3V6K
VGA@
1
2
C414
10U_0603_6.3V6M
VGA@C414
10U_0603_6.3V6M
VGA@
1
2
L44
BLM18AG121SN1D_0603
VGA@L44
BLM18AG121SN1D_0603
VGA@
12
C394
10U_0603_6.3V6M
VGA@C394
10U_0603_6.3V6M
VGA@
1
2
C432
10U_0603_6.3V6M
VGA@C432
10U_0603_6.3V6M
VGA@
1
2
R175
150_0402_1%
VGA@
R175
150_0402_1%
VGA@
12
R179
150_0402_1%
VGA@
R179
150_0402_1%
VGA@
12
C385
10U_0603_6.3V6M
VGA@C385
10U_0603_6.3V6M
VGA@
1
2
R1098 0_0402_5%
VGA@
R1098 0_0402_5%
VGA@
1 2
L50
BLM18AG121SN1D_0603
VGA@L50
BLM18AG121SN1D_0603
VGA@
12
C388
10U_0603_6.3V6M
VGA@C388
10U_0603_6.3V6M
VGA@
1
2
L43
BLM18AG121SN1D_0603
VGA@L43
BLM18AG121SN1D_0603
VGA@
12
C436
0.1U_0402_16V4Z
VGA@C436
0.1U_0402_16V4Z
VGA@
1
2
C431
1U_0402_6.3V6K
VGA@C431
1U_0402_6.3V6K
VGA@
1
2
C412
0.1U_0402_16V4Z
VGA@C412
0.1U_0402_16V4Z
VGA@
1
2
C437
1U_0402_6.3V6K
VGA@C437
1U_0402_6.3V6K
VGA@
1
2
C402
10U_0603_6.3V6M
VGA@C402
10U_0603_6.3V6M
VGA@
1
2
L38
BLM18AG121SN1D_0603
VGA@L38
BLM18AG121SN1D_0603
VGA@
12
C404
0.1U_0402_16V4Z
VGA@C404
0.1U_0402_16V4Z
VGA@
1
2
C419
0.1U_0402_16V4Z
VGA@C419
0.1U_0402_16V4Z
VGA@
1
2
C435
1U_0402_6.3V6K
VGA@C435
1U_0402_6.3V6K
VGA@
1
2
C405
1U_0402_6.3V6K
VGA@C405
1U_0402_6.3V6K
VGA@
1
2
C428
0.1U_0402_16V4Z
VGA@C428
0.1U_0402_16V4Z
VGA@
1
2
R176
150_0402_1%
VGA@
R176
150_0402_1%
VGA@
1 2
C393
1U_0402_6.3V6K
VGA@C393
1U_0402_6.3V6K
VGA@
1
2
C438
10U_0603_6.3V6M
VGA@C438
10U_0603_6.3V6M
VGA@
1
2
C406
0.1U_0402_16V4Z
VGA@C406
0.1U_0402_16V4Z
VGA@
1
2
L39
BLM18AG121SN1D_0603
VGA@L39
BLM18AG121SN1D_0603
VGA@
12
C401
1U_0402_6.3V6K
VGA@C401
1U_0402_6.3V6K
VGA@
1
2
C408
10U_0603_6.3V6M
VGA@C408
10U_0603_6.3V6M
VGA@
1
2
C389
0.1U_0402_16V4Z
VGA@C389
0.1U_0402_16V4Z
VGA@
1
2
C410
0.1U_0402_16V4Z
VGA@C410
0.1U_0402_16V4Z
VGA@
1
2
L47
BLM18AG121SN1D_0603
VGA@L47
BLM18AG121SN1D_0603
VGA@
12
C407
1U_0402_6.3V6K
VGA@C407
1U_0402_6.3V6K
VGA@
1
2
C420
1U_0402_6.3V6K
VGA@C420
1U_0402_6.3V6K
VGA@
1
2
C409
10U_0603_6.3V6M
VGA@C409
10U_0603_6.3V6M
VGA@
1
2
C398
0.1U_0402_16V4Z
VGA@C398
0.1U_0402_16V4Z
VGA@
1
2
C387
1U_0402_6.3V6K
VGA@C387
1U_0402_6.3V6K
VGA@
1
2
DP PLL POWER
DP A/B POWERDP C/D POWER
DP E/F POWER
U5H
216-0729002 A12 M96_BGA962
MAD@
DP PLL POWER
DP A/B POWERDP C/D POWER
DP E/F POWER
U5H
216-0729002 A12 M96_BGA962
MAD@
DPA_PVDD AU28
DPA_PVSS AV27
DPA_VDD10#1 AP31
DPA_VDD10#2 AP32
NC_DPA_VDD18#1 AN24
NC_DPA_VDD18#2 AP24
DPA_VSSR#1 AN27
DPA_VSSR#2 AP27
DPA_VSSR#3 AP28
DPA_VSSR#4 AW24
DPA_VSSR#5 AW26
DPAB_CALR AW28
DPB_PVDD AV29
DPB_PVSS AR28
DPB_VDD10#1 AN33
DPB_VDD10#2 AP33
NC_DPB_VDD18#1 AP25
NC_DPB_VDD18#2 AP26
DPB_VSSR#1 AN29
DPB_VSSR#2 AP29
DPB_VSSR#3 AP30
DPB_VSSR#4 AW30
DPB_VSSR#5 AW32
DPC_PVDD AU18
DPC_PVSS AV17
DPC_VDD10#1
AP13
DPC_VDD10#2
AT13
NC_DPC_VDD18#1
AP20
NC_DPC_VDD18#2
AP21
DPC_VSSR#1
AN17
DPC_VSSR#2
AP16
DPC_VSSR#3
AP17
DPC_VSSR#4
AW14
DPC_VSSR#5
AW16
DPCD_CALR
AW18
DPD_PVDD AV19
DPD_PVSS AR18
DPD_VDD10#1
AP14
DPD_VDD10#2
AP15
NC_DPD_VDD18#1
AP22
NC_DPD_VDD18#2
AP23
DPD_VSSR#1
AN19
DPD_VSSR#2
AP18
DPD_VSSR#3
AP19
DPD_VSSR#4
AW20
DPD_VSSR#5
AW22
DPE_PVDD AM37
DPE_PVSS AN38
DPE_VDD10#1
AL33
DPE_VDD10#2
AM33
DPE_VDD18#1
AH34
DPE_VDD18#2
AJ34
DPE_VSSR#1
AN34
DPE_VSSR#2
AP39
DPE_VSSR#3
AR39
DPE_VSSR#4
AU37
DPE_VSSR#5
AW35
DPEF_CALR
AM39
NC_DPF_PVDD AL38
NC_DPF_PVSS AM35
DPF_VDD10#1
AK33
DPF_VDD10#2
AK34
DPF_VDD18#1
AF34
DPF_VDD18#2
AG34
DPF_VSSR#1
AF39
DPF_VSSR#2
AH39
DPF_VSSR#3
AK39
DPF_VSSR#4
AL34
DPF_VSSR#5
AM34
C396
1U_0402_6.3V6K
VGA@C396
1U_0402_6.3V6K
VGA@
1
2
C390
1U_0402_6.3V6K
VGA@C390
1U_0402_6.3V6K
VGA@
1
2
L51
BLM18AG121SN1D_0603
VGA@L51
BLM18AG121SN1D_0603
VGA@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDB[0..63]
DQMB#1
MAB11
MAB12
MAB4
MAB2
MAB1
MAB0
QSB#3
VRAM_RST#
MAB10
DQMB#3
MAB7
QSB#1
MAB3
VREFDB_Q1
MAB9
ODTB0_1
QSB3
MAB8
VREFCB_A1
MAB5
QSB1
MAB6
QSB#2
DQMB#2
QSB#0
QSB2
QSB0
DQMB#0
MAB8
VRAM_RST#
MAB12
MAB1
VREFDB_Q2
VREFCB_A2
MAB4
MAB7
MAB0
MAB10
MAB3
MAB5
MAB2
MAB9
MAB6
MAB11
QSB#4
DQMB#4
QSB#5
QSB4
QSB5
DQMB#5
ODTB1_1
MAB8
VRAM_RST#
MAB12
MAB1
VREFDB_Q3
VREFCB_A3
MAB4
MAB7
MAB0
MAB10
MAB3
MAB5
MAB2
MAB9
MAB6
MAB11
QSB#6
DQMB#6
QSB#7
QSB6
QSB7
DQMB#7
MAB8
VRAM_RST#
MAB12
MAB1
VREFDB_Q4
VREFCB_A4
MAB4
MAB7
MAB0
MAB10
MAB3
MAB5
MAB2
MAB9
MAB6
MAB11
MDB15
MDB14
MDB10
MDB9
MDB12
MDB13
MDB8
MDB11
MDB25
MDB24
MDB31
MDB29
MDB26
MDB27
MDB30
MDB28
MDB22
MDB21
MDB20
MDB19
MDB17
MDB23
MDB18
MDB16
MDB2
MDB5
MDB3
MDB7
MDB0
MDB6
MDB1
MDB4
MDB44
MDB41
MDB45
MDB43
MDB46
MDB37
MDB39
MDB32
MDB35
MDB38
MDB33
MDB40
MDB36
MDB34
MDB47
MDB42
MDB51
MDB55
MDB50
MDB58
MDB57
MDB61
MDB52
MDB53
MDB48
MDB60
MDB54
MDB49
MDB63
MDB56
MDB62
MDB59
MAB13 MAB13 MAB13 MAB13
VREFCB_A1 VREFCB_A2 VREFDB_Q2VREFDB_Q1
VREFDB_Q3VREFCB_A3 VREFCB_A4 VREFDB_Q4
CLKB1
CLKB1#CLKB1#
CLKB1
CLKB0#
CLKB0 CLKB0
CLKB0#
B_BA0
B_BA1
B_BA2 B_BA2
B_BA0
B_BA1
B_BA2
B_BA0
B_BA1
CKEB0
ODTB0_1
CSB0#_0
RASB0#
CASB0#
WEB0#
CKEB1
ODTB1_1
CSB1#_0
RASB1#
CASB1#
WEB1#
ODTB0
ODTB0_1
ODTB1_1
ODTB1
CLKB018
CLKB0#18
CLKB118
CLKB1#18
QSB#[7..0]18
QSB[7..0]18
DQMB#[7..0]18
MDB[0..63]18
MAB[13..0]18
VRAM_RST#18
CKEB118
B_BA018
B_BA118
B_BA218
CKEB018
CSB0#_018
WEB0#18
CASB0#18
RASB0#18
CSB1#_018
RASB1#18
CASB1#18
WEB1#18
ODTB018
ODTB118
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG +1.5VSG +1.5VSG+1.5VSG
+1.5VSG+1.5VSG+1.5VSG+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
+1.5VSG
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
VRAM_DDR3 / Channel B
Custom
21 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
VRAM_DDR3 / Channel B
Custom
21 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
VRAM_DDR3 / Channel B
Custom
21 54Wednesday, April 21, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Pull high for Madison and Park...
C512
10U_0603_6.3V6M
VGA@C512
10U_0603_6.3V6M
VGA@
1
2
C513
10U_0603_6.3V6M
VGA@C513
10U_0603_6.3V6M
VGA@
1
2
C495
1U_0402_6.3V6K
VGA@C495
1U_0402_6.3V6K
VGA@
1
2
R223
56_0402_1%
VGA@R223
56_0402_1%
VGA@
1 2
C489
1U_0402_6.3V6K
VGA@C489
1U_0402_6.3V6K
VGA@
1
2
C514
10U_0603_6.3V6M
VGA@C514
10U_0603_6.3V6M
VGA@
1
2
R228
4.99K_0402_1%
VGA@
R228
4.99K_0402_1%
VGA@
12
C501
1U_0402_6.3V6K
VGA@C501
1U_0402_6.3V6K
VGA@
1
2
C496
1U_0402_6.3V6K
VGA@C496
1U_0402_6.3V6K
VGA@
1
2
C497
1U_0402_6.3V6K
VGA@C497
1U_0402_6.3V6K
VGA@
1
2
C491
1U_0402_6.3V6K
VGA@C491
1U_0402_6.3V6K
VGA@
1
2
R212
4.99K_0402_1%
VGA@
R212
4.99K_0402_1%
VGA@
12
R220
0_0402_5%
VGA@
R220
0_0402_5%
VGA@
C499
1U_0402_6.3V6K
VGA@C499
1U_0402_6.3V6K
VGA@
1
2
96-BALL
SDRAM DDR3
U14
K4B1G1646E-HC12_FBGA96
X76@
96-BALL
SDRAM DDR3
U14
K4B1G1646E-HC12_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
R233
56_0402_1%
VGA@R233
56_0402_1%
VGA@
1 2
C487
1U_0402_6.3V6K
VGA@C487
1U_0402_6.3V6K
VGA@
1
2
R226
4.99K_0402_1%
VGA@
R226
4.99K_0402_1%
VGA@
12
C503
1U_0402_6.3V6K
VGA@C503
1U_0402_6.3V6K
VGA@
1
2
R213
4.99K_0402_1%
VGA@
R213
4.99K_0402_1%
VGA@
12
96-BALL
SDRAM DDR3
U16
K4B1G1646E-HC12_FBGA96
X76@
96-BALL
SDRAM DDR3
U16
K4B1G1646E-HC12_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
R216
4.99K_0402_1%
VGA@
R216
4.99K_0402_1%
VGA@
12
C485
0.01U_0402_25V7K
VGA@C485
0.01U_0402_25V7K
VGA@
1
2
R214
4.99K_0402_1%
VGA@
R214
4.99K_0402_1%
VGA@
12
C480
0.1U_0402_16V4Z
VGA@
C480
0.1U_0402_16V4Z
VGA@
1
2
C510
10U_0603_6.3V6M
VGA@C510
10U_0603_6.3V6M
VGA@
1
2
C490
1U_0402_6.3V6K
VGA@C490
1U_0402_6.3V6K
VGA@
1
2
C488
1U_0402_6.3V6K
VGA@C488
1U_0402_6.3V6K
VGA@
1
2
R221
56_0402_1%
VGA@R221
56_0402_1%
VGA@
1 2
R234
56_0402_1%
VGA@R234
56_0402_1%
VGA@
1 2
C481
0.1U_0402_16V4Z
VGA@
C481
0.1U_0402_16V4Z
VGA@
1
2
R224
4.99K_0402_1%
VGA@
R224
4.99K_0402_1%
VGA@
12
R235
56_0402_1%
VGA@R235
56_0402_1%
VGA@
1 2
C505
1U_0402_6.3V6K
VGA@C505
1U_0402_6.3V6K
VGA@
1
2
R208
243_0402_1%
VGA@
R208
243_0402_1%
VGA@
12
C482
0.1U_0402_16V4Z
VGA@
C482
0.1U_0402_16V4Z
VGA@
1
2
R225
4.99K_0402_1%
VGA@
R225
4.99K_0402_1%
VGA@
12
C498
1U_0402_6.3V6K
VGA@C498
1U_0402_6.3V6K
VGA@
1
2
R219
4.99K_0402_1%
VGA@
R219
4.99K_0402_1%
VGA@
12
R211
243_0402_1%
VGA@
R211
243_0402_1%
VGA@
12
R229
4.99K_0402_1%
VGA@
R229
4.99K_0402_1%
VGA@
12
R230
4.99K_0402_1%
VGA@
R230
4.99K_0402_1%
VGA@
12
R222
0_0402_5%
VGA@
R222
0_0402_5%
VGA@
R227
4.99K_0402_1%
VGA@
R227
4.99K_0402_1%
VGA@
12
C494
1U_0402_6.3V6K
VGA@C494
1U_0402_6.3V6K
VGA@
1
2
C500
1U_0402_6.3V6K
VGA@C500
1U_0402_6.3V6K
VGA@
1
2
C508
10U_0603_6.3V6M
VGA@C508
10U_0603_6.3V6M
VGA@
1
2
C493
1U_0402_6.3V6K
VGA@C493
1U_0402_6.3V6K
VGA@
1
2
C484
0.1U_0402_16V4Z
VGA@
C484
0.1U_0402_16V4Z
VGA@
1
2
R210
243_0402_1%
VGA@
R210
243_0402_1%
VGA@
12
C477
0.1U_0402_16V4Z
VGA@
C477
0.1U_0402_16V4Z
VGA@
1
2
96-BALL
SDRAM DDR3
U13
K4B1G1646E-HC12_FBGA96
X76@
96-BALL
SDRAM DDR3
U13
K4B1G1646E-HC12_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
C509
10U_0603_6.3V6M
VGA@C509
10U_0603_6.3V6M
VGA@
1
2
C511
10U_0603_6.3V6M
VGA@C511
10U_0603_6.3V6M
VGA@
1
2
C504
1U_0402_6.3V6K
VGA@C504
1U_0402_6.3V6K
VGA@
1
2
R218
4.99K_0402_1%
VGA@
R218
4.99K_0402_1%
VGA@
12
C479
0.1U_0402_16V4Z
VGA@
C479
0.1U_0402_16V4Z
VGA@
1
2R231
4.99K_0402_1%
VGA@
R231
4.99K_0402_1%
VGA@
12
C507
10U_0603_6.3V6M
VGA@C507
10U_0603_6.3V6M
VGA@
1
2
C486
1U_0402_6.3V6K
VGA@C486
1U_0402_6.3V6K
VGA@
1
2
R217
4.99K_0402_1%
VGA@
R217
4.99K_0402_1%
VGA@
12
C483
0.1U_0402_16V4Z
VGA@
C483
0.1U_0402_16V4Z
VGA@
1
2
C492
1U_0402_6.3V6K
VGA@C492
1U_0402_6.3V6K
VGA@
1
2
96-BALL
SDRAM DDR3
U15
K4B1G1646E-HC12_FBGA96
X76@
96-BALL
SDRAM DDR3
U15
K4B1G1646E-HC12_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
R215
4.99K_0402_1%
VGA@
R215
4.99K_0402_1%
VGA@
12
C506
0.01U_0402_25V7K
VGA@C506
0.01U_0402_25V7K
VGA@
1
2
R232
56_0402_1%
VGA@R232
56_0402_1%
VGA@
1 2
C478
0.1U_0402_16V4Z
VGA@
C478
0.1U_0402_16V4Z
VGA@
1
2
R209
243_0402_1%
VGA@
R209
243_0402_1%
VGA@
12
C502
1U_0402_6.3V6K
VGA@C502
1U_0402_6.3V6K
VGA@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DISPOFF#DISPOFF#BKOFF#
+3VS_SWITCH
BUS_SEL#
GMCH_ENVDD
VGA_ENVDD
I2CC_SCL
I2CC_SDA
TXOUT0-
TXOUT1-
TXOUT0+
TXOUT1+
TXOUT2-
TXOUT2+
TXCLK-
TXCLK+
BUS_SEL#
DISPOFF#
I2CC_SCL
I2CC_SDA
INVT_PWM
TXOUT1-
TXOUT1+
TXOUT0-
TXCLK+
TXOUT0+
TXCLK-
TXOUT2+
TXOUT2-
USB20_CMOS_N5
USB20_CMOS_P5
COLOR_ENG_EN
LOCAL_DIM
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_TXOUT0+
GMCH_TXOUT0-
GMCH_TXOUT1+
GMCH_TXOUT1-
GMCH_TXCLK-
GMCH_TXCLK+
GMCH_TXOUT2-
GMCH_TXOUT2+
VGA_LCD_DAT
VGA_LCD_CLK
VGA_TXOUT1+
VGA_TXOUT1-
VGA_TXOUT0+
VGA_TXOUT0-
VGA_TXOUT2-
VGA_TXOUT2+
VGA_TXCLK-
VGA_TXCLK+
BUS_SEL#
ENBKL
INVT_PWMINVT_PWM_L
TXOUT2-
I2CC_SDA
I2CC_SCL VGA_LCD_CLK
VGA_LCD_DAT
I2CC_SDA
I2CC_SCL GMCH_LCD_CLK
GMCH_LCD_DATA
TXOUT1-
TXOUT1+
VGA_TXCLK+
VGA_TXCLK-
VGA_TXOUT2+
VGA_TXOUT2-
VGA_TXOUT1+
GMCH_TXOUT2-
TXOUT1- GMCH_TXOUT1-
GMCH_TXOUT0-
GMCH_TXCLK-
GMCH_TXOUT2+
GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXCLK+
TXCLK-
TXOUT0-
TXOUT2-
TXOUT1+
TXCLK+
TXOUT0+
TXOUT2+
VGA_TXOUT1-
TXCLK-
TXCLK+
TXOUT0-
TXOUT0+ VGA_TXOUT0+
VGA_TXOUT0-
TXOUT2+
INVT_PWM
DISPOFF#
USB20_CMOS_P5
USB20_CMOS_N5
INVT_PWM
VGA_PNL_PWM
INVT_PWM
GMCH_INVT_PWM
EC_INVT_PWM
BUS_SEL
BUS_SEL#
BUS_SEL
BKOFF#34
PE_GPIO236
GMCH_ENVDD13
VGA_ENVDD16
USB20_P526
USB20_N526
COLOR_ENG_EN34
LOCAL_DIM34
BUS_SEL# 24,34
ENBKL13,34
GMCH_LCD_CLK 13
GMCH_LCD_DATA 13,36
VGA_LCD_CLK 17
VGA_LCD_DAT 17
VGA_TXCLK+ 16
VGA_TXCLK- 16
VGA_TXOUT2+ 16
VGA_TXOUT2- 16
VGA_TXOUT1+ 16
GMCH_TXOUT0+ 13
GMCH_TXOUT0- 13
GMCH_TXOUT1+ 13
GMCH_TXOUT1- 13
GMCH_TXOUT2+ 13
GMCH_TXOUT2- 13
GMCH_TXCLK+ 13
GMCH_TXCLK- 13
VGA_TXOUT1- 16
VGA_TXOUT0+ 16
VGA_TXOUT0- 16
EC_INVT_PWM34
GMCH_INVT_PWM13
VGA_PNL_PWM16
+3VS
+LCDVDD
+LCDVDD
+3VALW
+3VS
+3VS
+3VS
+INVPWR_B+
+LCDVDD
+3VS
+3VS
+3VS
+3VS
+INVPWR_B+ B+
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
LVDS Connector
B
22 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
LVDS Connector
B
22 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
LVDS Connector
B
22 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
LCD POWER CIRCUIT
W=60mils
W=60mils
L
H
B1
B2
DIS
UMA
SEL1
SEL2
<BUS>
<DDC>
HB2
UMA
LB1
DIS
11/30 update LVDS conn.
12/01 invert conn
LCD/LED PANEL Conn.
LVDS conn: ACES_50406-03071-001_30P-T
12/02 update schematic
remove inverter
check BOM structure
12/02
SW input1/input2 exchange
12/07 update SEL Table
12/08 update net name
PWR_SAVING to LOCAL_DIM
12/14 ADD
12/14 modify
12/14 remove
12/14 update to dual MOS
update R507 to 2.7K Ohm
12/23 change R1052 Res. to 1.5k
DVT 0121 update Q13 to SB934130020
For Layout
DVT 0131
update Q29 to SB570020410
PVT 20100311 update R253 to UMALVDS@
12/11 update Res.
12/07 update PX/VB support schematic
12/14 update dual MOS
<If pop, Remove R260>
Pop for PX verify
DVT 0128 set R1065 to MUX@
UMA ONLY
VGA ONLY
11/30 remove DAC_BRIG
DVT 0131 change D14 to SC300000B00
Place under U33
W=40mils
Pre MP
change to 10k
L59
FBMA-L11-201209-221LMA30T_0805
L59
FBMA-L11-201209-221LMA30T_0805
12
D14
CM1293-04SO_SOT23-6
@D14
CM1293-04SO_SOT23-6
@
CH3
6
Vp
5
CH4
4
CH2 3
Vn 2
CH1 1
Q87B
DMN66D0LDW-7_SOT363-6
MUX@
Q87B
DMN66D0LDW-7_SOT363-6
MUX@
3
5
4
D9
CH751H-40PT_SOD323-2
@D9
CH751H-40PT_SOD323-2
@
21
R1061
100K_0402_5%
MUX@
R1061
100K_0402_5%
MUX@
12
R316 0_0402_5%MUX@R316 0_0402_5%MUX@
1 2
RP3 0_0404_4P2R_5%UMALVDS@ RP3 0_0404_4P2R_5%UMALVDS@
1 4
2 3
G
D
S
Q13
AO3413_SOT23-3
G
D
S
Q13
AO3413_SOT23-3
2
1 3
Q87A
DMN66D0LDW-7_SOT363-6
MUX@
Q87A
DMN66D0LDW-7_SOT363-6
MUX@
61
2
R121
4.7K_0402_5%
@
R121
4.7K_0402_5%
@
12
G
D
S
Q29
2N7002-7-F_SOT23
MUX@
G
D
S
Q29
2N7002-7-F_SOT23
MUX@
2
13
R1052
1.5K_0402_5%
MUX@
R1052
1.5K_0402_5%
MUX@
12
Q82B
DMN66D0LDW-7_SOT363-6
MUX@
Q82B
DMN66D0LDW-7_SOT363-6
MUX@
3
5
4
R1064 0_0402_5%
@
R1064 0_0402_5%
@
1 2
RP1
0_0404_4P2R_5%UMALVDS@
RP1
0_0404_4P2R_5%UMALVDS@
1 4
2 3
Q83B
DMN66D0LDW-7_SOT363-6
MUX@
Q83B
DMN66D0LDW-7_SOT363-6
MUX@
3
5
4
C539
0.047U_0402_16V7K
C539
0.047U_0402_16V7K
1
2
R252 1K_0402_5%R252 1K_0402_5%
12
R1068 0_0402_5%
MUX@
R1068 0_0402_5%
MUX@
1 2
R172 0_0402_5% R172 0_0402_5%
1 2
RP8 0_0404_4P2R_5%DISO@RP8 0_0404_4P2R_5%DISO@
1 4
2 3
Q11A
DMN66D0LDW-7_SOT363-6
Q11A
DMN66D0LDW-7_SOT363-6
61
2
R1053 0_0402_5%
MUX@
R1053 0_0402_5%
MUX@
1 2
L58
FBMA-L11-201209-221LMA30T_0805
L58
FBMA-L11-201209-221LMA30T_0805
12
R253
4.7K_0402_5%
UMALVDS@
R253
4.7K_0402_5%
UMALVDS@
12
R2710_0402_5%
UMALVDS@
R2710_0402_5%
UMALVDS@
12
Q82A
DMN66D0LDW-7_SOT363-6
MUX@
Q82A
DMN66D0LDW-7_SOT363-6
MUX@
61
2
Q88A
DMN66D0LDW-7_SOT363-6
MUX@
Q88A
DMN66D0LDW-7_SOT363-6
MUX@
6 1
2
Q11B
DMN66D0LDW-7_SOT363-6
Q11B
DMN66D0LDW-7_SOT363-6
3
5
4
R251
10K_0402_5%
R251
10K_0402_5%
12
R319
10K_0402_5%
@
R319
10K_0402_5%
@
12
R1063
100K_0402_5%
MUX@
R1063
100K_0402_5%
MUX@
12
JLVDS1
ACES_50406-03071-001
CONN@
JLVDS1
ACES_50406-03071-001
CONN@
1
12
23
34
45
56
67
78
89
910
10 11
11 12
12 13
13 14
14 15
15 16
16 17
17 18
18 19
19 20
20 21
21 22
22 23
23 24
24 25
25 26
26 27
27 28
28 29
29 30
30
G1 31
G2 32
G3 33
G4 34
G5 35
R250
300_0603_5%
R250
300_0603_5%
12
C543 220P_0402_50V7KC543 220P_0402_50V7K
1 2
C545
68P_0402_50V8J
C545
68P_0402_50V8J
1
2
Q83A
DMN66D0LDW-7_SOT363-6
MUX@
Q83A
DMN66D0LDW-7_SOT363-6
MUX@
61
2
R1062
220_0402_5%
MUX@
R1062
220_0402_5%
MUX@
12
R2700_0402_5% DISO@ R2700_0402_5% DISO@ 12
R1065
10K_0402_5%
MUX@
R1065
10K_0402_5%
MUX@
12
R926
0_0603_5%
R926
0_0603_5%
12
R298 0_0402_5%R298 0_0402_5%
12
C540
4.7U_0805_10V4Z
C540
4.7U_0805_10V4Z
1
2
R260 0_0402_5%
@
R260 0_0402_5%
@
1 2
U68
PI3LVD400ZFEX_TQFN56_11X5
MUX@
U68
PI3LVD400ZFEX_TQFN56_11X5
MUX@
GND 33
5B2
34 4B2
35
5B1
36 4B1
37
VCC 38
GND 39
3B2
40
A0 2
A5 12
GND 13
A6 14
A7 15
GND 16
SEL 17
VCC 18
GND 1
A1 3
VCC 4
A8 19
A9 20
GND 21
8B1
22
9B1
23
GND 24
8B2
25
2B2
41
3B1
42 2B1
43
GND 44
1B2
45 0B2
46
1B1
47 0B1
48
GND 49
VCC 50
NC
51
NC
52
GND 53
SEL2
54
NC
5
GND 6
A2 7
A3 8
GND 9
VCC 10
A4 11
9B2
26
VCC 27
GND 28
7B2
29 6B2
30
7B1
31 6B1
32
GND 55
VCC 56
Thermal_GND
57
R174
0_0402_5%
@R174
0_0402_5%
@
1 2
RP2 0_0404_4P2R_5%DISO@RP2 0_0404_4P2R_5%DISO@
1 4
2 3
R359 0_0402_5%R359 0_0402_5%
12
RP6 0_0404_4P2R_5%DISO@RP6 0_0404_4P2R_5%DISO@
1 4
2 3
C1152
0.1U_0402_16V4Z
MUX@
C1152
0.1U_0402_16V4Z
MUX@
1
2
Q88B
DMN66D0LDW-7_SOT363-6
MUX@
Q88B
DMN66D0LDW-7_SOT363-6
MUX@
3
5
4
C538
4.7U_0805_10V4Z
C538
4.7U_0805_10V4Z
1
2
C541
0.1U_0402_16V4Z
C541
0.1U_0402_16V4Z
1
2
R261 0_0402_5%
@
R261 0_0402_5%
@
1 2
R2720_0402_5%
DISO@
R2720_0402_5%
DISO@
12
C1153
0.1U_0402_16V4Z
MUX@
C1153
0.1U_0402_16V4Z
MUX@
1
2
RP7 0_0404_4P2R_5%UMALVDS@ RP7 0_0404_4P2R_5%UMALVDS@
1 4
2 3
R507 2.7K_0402_5%R507 2.7K_0402_5%
1 2
R1128
10K_0402_5%
MUX@
R1128
10K_0402_5%
MUX@
12
C548 220P_0402_50V7KC548 220P_0402_50V7K
1 2
RP4 0_0404_4P2R_5%DISO@RP4 0_0404_4P2R_5%DISO@
1 4
2 3
C1154
4.7U_0603_6.3V6K
MUX@
C1154
4.7U_0603_6.3V6K
MUX@
1
2
RP5 0_0404_4P2R_5%UMALVDS@ RP5 0_0404_4P2R_5%UMALVDS@
1 4
2 3
C544
680P_0402_50V7K
C544
680P_0402_50V7K
1
2
R262 0_0402_5%
UMALVDS@
R262 0_0402_5%
UMALVDS@
1 2
R2690_0402_5%
UMALVDS@
R2690_0402_5%
UMALVDS@
12
R1060
4.7K_0402_5%
MUX@
R1060
4.7K_0402_5%
MUX@
12
R1127
10K_0402_5%
MUX@
R1127
10K_0402_5%
MUX@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
UMA_HDMI_DET
HDMI_C_TX1+
HDMI_R_CK-
HDMI_R_D0-
HDMI_R_D1+
HDMI_R_D2-
HDMI_SCLK
HDMI_SDATA
HDMI_R_CK+
HDMI_HPD
HDMI_R_D1-
HDMI_R_D0+
HDMI_R_D2+
HDMI_SDATA
HDMI_SCLK
HDMI_C_TX2-
HDMI_C_TX0-
HDMI_C_TX2+
HDMI_R_CK-
HDMI_R_CK+
HDMI_C_TX0+
HDMI_C_CLK-
HDMI_C_CLK+
HDMI_C_CLK+
HDMI_C_TX0- HDMI_R_D0-
HDMI_R_D0+
HDMI_R_D1-
HDMI_R_D2-
HDMI_R_D2+
HDMI_C_TX0+
HDMI_R_D1+
VGA_HDMI_DET
HDMI_HPD
HDMI_C_TX1-
HDMI_C_TX1+
HDMI_C_TX1-
HDMI_C_CLK-
HDMI_C_TX2+
HDMI_C_TX2-
HDMI_TX1+
HDMI_CLK+
HDMI_TX2-
HDMI_TX0-
HDMI_TX2+
HDMI_TX0+
HDMI_TX1-
HDMI_CLK-
HDMI_C_TX2+
HDMI_C_TX1+
HDMI_C_TX1-
HDMI_C_TX0+
HDMI_C_TX0-
HDMI_C_CLK+
HDMI_C_CLK-
HDMI_C_TX2-
HDMI_C_TX2+
HDMI_C_TX1+
HDMI_C_TX1-
HDMI_C_TX0+
HDMI_C_TX0-
HDMI_C_CLK+
HDMI_C_CLK-
HDMI_C_TX2-
+HDMI_5V_OUT_1
VGA_HDMI_SDATA17
VGA_HDMI_SCLK17
VGA_HDMI_TXD2-17
VGA_HDMI_TXD2+17
VGA_HDMI_TXD1-17
VGA_HDMI_TXD1+17
VGA_HDMI_TXD0-17
VGA_HDMI_TXD0+17
VGA_HDMI_TXC-17
VGA_HDMI_TXC+17
VGA_HDMI_DET17,26
PCIE_MTX_GRX_N012
PCIE_MTX_GRX_P012
PCIE_MTX_GRX_N112
PCIE_MTX_GRX_P112
PCIE_MTX_GRX_N212
PCIE_MTX_GRX_P212
PCIE_MTX_GRX_N312
PCIE_MTX_GRX_P312
GMCH_HDMI_CLK13
UMA_HDMI_DET13
GMCH_HDMI_DATA13
+5VS
+HDMI_5V_OUT
+HDMI_5V_OUT
+HDMI_5V_OUT
+3VSG
+3VSG
+HDMI_5V_OUT
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
HDMI Connector
Custom
23 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
HDMI Connector
Custom
23 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
HDMI Connector
Custom
23 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
11/03 ADD UMA HDMI / change BOM structure
VGA resistor is 499ohm, and UMA resistor is 715ohm?
Switchable connection?
<5V tolerant>
Place closed to JHDMI1
11/03 for UMA HDMI
12/08 add VGA 0Ohm Res.
11/03 change BOM structure
12/08 for UMA
W=40mils
Place closed to JHDMI1
Check 5V tolerant
11/03 fchange BOM structure
11/03 for UMA HDMI DET
DVT 0128 change to UMAHDMI@
Pre MP 20100406 stuff R938
11/03 Change BOM structure
11/10 Add 4.7k Ohm
HDMI conn: SUYIN_100042GR019M22LZR_19P-T
11/30 update HDMI conn.
PVT 20100311 update HDMI conn.
(SUYIN_100042GR019M23DZL_19P-T)
12/02 update HDMI_C_TX+ to HDMI_C_TX-
12/04 remove GPU 0Ohm resistor
12/08 for UMA
12/23 UMAHDMI@ USE 715Ohm
DVT 0119 remove R1068
DVT 0120 add Bypass Res.
DVT 0131 D3 with @, R1105 stuff,set D3 to SCSH491D010
DVT 0131
change D19 to SB570020410
PVT 20100311 update BOM structure
L63
WCM-2012-900T_0805
@
L63
WCM-2012-900T_0805
@
1
122
33
4
4
R1072
0_0402_5%
R1072
0_0402_5%
1 2
R299 0_0402_5%R299 0_0402_5%
1 2
G
D
S
Q19
2N7002-7-F_SOT23
G
D
S
Q19
2N7002-7-F_SOT23
2
13
R281 150K_0402_5%R281 150K_0402_5%
1 2
R938 0_0402_5%R938 0_0402_5%
12
R282 0_0402_5%
MUX@
R282 0_0402_5%
MUX@ 12
C1176 0.1U_0402_16V7KUMAHDMI@C1176 0.1U_0402_16V7KUMAHDMI@ 12
R935
4.7K_0402_5%
R935
4.7K_0402_5%
1 2
C557 0.1U_0402_16V7KMUX@C557 0.1U_0402_16V7KMUX@ 12
C549
0.1U_0402_16V4Z
C549
0.1U_0402_16V4Z
1
2
R301 0_0402_5%R301 0_0402_5%
1 2
G
D
S
Q17
BSH111 1N_SOT23-3
G
D
S
Q17
BSH111 1N_SOT23-3
2
13
R1105 0_0603_5%R1105 0_0603_5%
1 2
R287
499_0402_1%MUX@
R287
499_0402_1%MUX@
1 2
R954
0_0402_5%UMAHDMI@
R954
0_0402_5%UMAHDMI@
12
C1177 0.1U_0402_16V7KUMAHDMI@C1177 0.1U_0402_16V7KUMAHDMI@ 12
C1174 0.1U_0402_16V7KUMAHDMI@C1174 0.1U_0402_16V7KUMAHDMI@ 12
R280
0_0402_5%
@
R280
0_0402_5%
@
1 2
R292
499_0402_1%MUX@
R292
499_0402_1%MUX@
1 2
C553 0.1U_0402_16V7KMUX@C553 0.1U_0402_16V7KMUX@ 12
R955 0_0402_5%UMAHDMI@R955 0_0402_5%UMAHDMI@
12
C1178 0.1U_0402_16V7KUMAHDMI@C1178 0.1U_0402_16V7KUMAHDMI@ 12
R1070 0_0402_5%MUX@R1070 0_0402_5%MUX@ 12
R278 0_0402_5%
@
R278 0_0402_5%
@12
R295
499_0402_1%MUX@
R295
499_0402_1%MUX@
1 2
L61
WCM-2012-900T_0805
@
L61
WCM-2012-900T_0805
@
1
122
33
4
4
R1069
0_0402_5%
R1069
0_0402_5%
1 2
C1179 0.1U_0402_16V7KUMAHDMI@C1179 0.1U_0402_16V7KUMAHDMI@ 12
D3
CH491DPT_SOT23-3
@D3
CH491DPT_SOT23-3
@
2 1
C554 0.1U_0402_16V7KMUX@C554 0.1U_0402_16V7KMUX@ 12
R947
0_0402_5%UMAHDMI@
R947
0_0402_5%UMAHDMI@
12
R285 0_0402_5%R285 0_0402_5%
1 2
C550 0.1U_0402_16V7KMUX@C550 0.1U_0402_16V7KMUX@ 12
R937 0_0402_5%
UMAHDMI@
R937 0_0402_5%
UMAHDMI@
12
C1173 0.1U_0402_16V7KUMAHDMI@C1173 0.1U_0402_16V7KUMAHDMI@ 12
F1
1.1A_6VDC_FUSE
F1
1.1A_6VDC_FUSE
21
R300 0_0402_5%R300 0_0402_5%
1 2
C1180 0.1U_0402_16V7KUMAHDMI@C1180 0.1U_0402_16V7KUMAHDMI@ 12
R948 0_0402_5%UMAHDMI@R948 0_0402_5%UMAHDMI@
12
R284
10K_0402_5%
R284
10K_0402_5%
12
L60
WCM-2012-900T_0805
@
L60
WCM-2012-900T_0805
@
1
122
33
4
4
R953
4.7K_0402_5%
R953
4.7K_0402_5%
1 2
R283
365K_0402_1%
@
R283
365K_0402_1%
@
12
C556 0.1U_0402_16V7KMUX@C556 0.1U_0402_16V7KMUX@ 12
R277
2K_0402_5%
R277
2K_0402_5%
12
R949
0_0402_5%UMAHDMI@
R949
0_0402_5%UMAHDMI@
12
R290
499_0402_1%MUX@
R290
499_0402_1%MUX@
1 2
R276
2K_0402_5%
R276
2K_0402_5%
12
JHDMI1
SUYIN-100042GR019M23DZL
CONN@
JHDMI1
SUYIN-100042GR019M23DZL
CONN@
D2+
1D2_shield
2D2-
3D1+
4D1_shield
5D1-
6D0+
7D0_shield
8D0-
9CK+
10 CK_shield
11 CK-
12 CEC
13 Reserved
14 SCL
15 SDA
16 DDC/CEC_GND
17 +5V
18 HP_DET
19
G1 20
G2 21
G3 22
G4 23
G
D
S
Q16
BSH111 1N_SOT23-3
G
D
S
Q16
BSH111 1N_SOT23-3
2
13
R296 0_0402_5%R296 0_0402_5%
1 2
R936 0_0402_5%
UMAHDMI@
R936 0_0402_5%
UMAHDMI@
12
R950 0_0402_5%UMAHDMI@R950 0_0402_5%UMAHDMI@
12
E
B
C
Q18
MMBT3904_NL_SOT23-3
E
B
C
Q18
MMBT3904_NL_SOT23-3
2
3 1
C1175 0.1U_0402_16V7KUMAHDMI@C1175 0.1U_0402_16V7KUMAHDMI@ 12
R293
499_0402_1%MUX@
R293
499_0402_1%MUX@
1 2
R286
499_0402_1%MUX@
R286
499_0402_1%MUX@
1 2
R951
0_0402_5%UMAHDMI@
R951
0_0402_5%UMAHDMI@
12
R297 0_0402_5%R297 0_0402_5%
1 2
L62
WCM-2012-900T_0805
@
L62
WCM-2012-900T_0805
@
1
122
33
4
4
C552 0.1U_0402_16V7KMUX@C552 0.1U_0402_16V7KMUX@ 12
R1071 0_0402_5%MUX@R1071 0_0402_5%MUX@ 12
C551 0.1U_0402_16V7KMUX@C551 0.1U_0402_16V7KMUX@ 12
R952 0_0402_5%UMAHDMI@R952 0_0402_5%UMAHDMI@
12
R291 0_0402_5%R291 0_0402_5%
1 2
R289
499_0402_1%MUX@
R289
499_0402_1%MUX@
1 2
C555 0.1U_0402_16V7KMUX@C555 0.1U_0402_16V7KMUX@ 12
R274
10K_0402_5%
@
R274
10K_0402_5%
@
1 2
R934
4.7K_0402_5%
R934
4.7K_0402_5%
1 2
R275
10K_0402_5%
@
R275
10K_0402_5%
@
1 2
R279 0_0402_5%
@
R279 0_0402_5%
@12
R294
499_0402_1%MUX@
R294
499_0402_1%MUX@
1 2
R288 0_0402_5%R288 0_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DSUB_12
DSUB_15
CRT_R_2
DSUB_12
DSUB_15
CRT_G_2
CRT_B_2
CRT_HSYNC_1
CRT_VSYNC_1
CRT_HSYNC_2
CRT_VSYNC_2
CRT_HSYNC
CRT_CLK
CRT_B_1
CRT_G_1
CRT_R_1
CRT_VSYNC
CRT_R
CRT_G
CRT_B
GMCH_CRT_G
GMCH_CRT_HSYNC
GMCH_CRT_R
GMCH_CRT_B
GMCH_CRT_VSYNC
CRT_R
CRT_G
CRT_HSYNC
CRT_VSYNC
CRT_B
CRT_R
CRT_G
CRT_HSYNC
CRT_VSYNC
CRT_B
VGA_CRT_G
VGA_CRT_HSYNC
VGA_CRT_R
VGA_CRT_B
VGA_CRT_VSYNC
CRT_R
CRT_G
CRT_B
CRT_CLK
CRT_DATA
BUS_SEL#
CRT_HSYNC
CRT_VSYNC
GMCH_CRT_DATA
GMCH_CRT_CLK CRT_CLK
CRT_DATA
CRT_DATA
CRT_CLK
VGA_CRT_DATA
VGA_CRT_CLK
CRT_DATA
VGA_CRT_DATA
VGA_CRT_CLK
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_CRT_HSYNC
VGA_CRT_VSYNC
GMCH_CRT_R
GMCH_CRT_VSYNC
GMCH_CRT_HSYNC
GMCH_CRT_B
GMCH_CRT_G
GMCH_CRT_CLK
GMCH_CRT_DATA
CRT_DET# 26
BUS_SEL# 22,34
VGA_CRT_R17
VGA_CRT_G17
VGA_CRT_B17
VGA_CRT_HSYNC17
VGA_CRT_VSYNC17
VGA_CRT_DATA17
VGA_CRT_CLK17
GMCH_CRT_R13
GMCH_CRT_G13
GMCH_CRT_B13
GMCH_CRT_HSYNC13,15
GMCH_CRT_VSYNC13,15
GMCH_CRT_DATA13
GMCH_CRT_CLK13
+CRT_VCC
+3VS
+CRT_VCC+R_CRT_VCC
+5VS
+CRT_VCC
+CRT_VCC +CRT_VCC
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
CRT Connector
B
24 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
CRT Connector
B
24 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
CRT Connector
B
24 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Close to Conn side
W=40mils
CRT Connector
W=40mils
<NAL00 use>
For UMA Only
For VGA Only
Check 5V tolerant for DISO state
L
H
B1
B2
DIS
UMA
SEL1
SEL2
HB2
UMA
LB1
DIS
<BUS>
<DDC>
11/06 USE DUAL CHANNEL MOSFET , update BOM structure
11/28
change to NAL00-CRT
12/02 SW input1/input2 exchange
12/07 update SEL table
DVT 0131 change D7 to SCSH491D010
R407 0_0402_5%R407 0_0402_5%
12
D7
CH491DPT_SOT23-3
D7
CH491DPT_SOT23-3
2 1
R302 0_0402_5%DISO@R302 0_0402_5%DISO@ 12
L66 FCM2012CF-800T06_2PL66 FCM2012CF-800T06_2P
1 2
G
G
JCRT1
SUYIN_070546FR015S297ZR
CONN@
G
G
JCRT1
SUYIN_070546FR015S297ZR
CONN@
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
16
17
C565
100P_0402_50V8J
C565
100P_0402_50V8J
1
2
R83 0_0402_5%UMACRT@R83 0_0402_5%UMACRT@
12
L68
FCM2012CF-800T06_2P
L68
FCM2012CF-800T06_2P
1 2
R303 0_0402_5%DISO@R303 0_0402_5%DISO@ 12
L64 FCM2012CF-800T06_2PL64 FCM2012CF-800T06_2P
1 2
C571 0.1U_0402_16V4Z C571 0.1U_0402_16V4Z
1 2
C1156
0.1U_0402_16V4Z
MUX@
C1156
0.1U_0402_16V4Z
MUX@
1
2
R266 0_0402_5%UMACRT@R266 0_0402_5%UMACRT@
12
Q6A
DMN66D0LDW-7_SOT363-6
MUX@
Q6A
DMN66D0LDW-7_SOT363-6
MUX@
6 1
2
C1155
0.1U_0402_16V4Z
MUX@
C1155
0.1U_0402_16V4Z
MUX@
1
2
R304 0_0402_5%DISO@R304 0_0402_5%DISO@ 12
C566
10P_0402_50V8J
C566
10P_0402_50V8J
1
2
C563
10P_0402_50V8J
C563
10P_0402_50V8J
1
2
C568
68P_0402_50V8J
C568
68P_0402_50V8J
1
2
C1157
0.1U_0402_16V4Z
MUX@
C1157
0.1U_0402_16V4Z
MUX@
1
2
R267 0_0402_5%UMACRT@R267 0_0402_5%UMACRT@
12
R306 0_0402_5%DISO@R306 0_0402_5%DISO@ 12
Q6B
DMN66D0LDW-7_SOT363-6
MUX@
Q6B
DMN66D0LDW-7_SOT363-6
MUX@
3
5
4
R318
4.7K_0402_5%
R318
4.7K_0402_5%
12
R321 0_0402_5%
UMACRT@
R321 0_0402_5%
UMACRT@
12
F2
1.1A_6VDC_FUSE
F2
1.1A_6VDC_FUSE
21
R411 0_0402_5%DISO@R411 0_0402_5%DISO@ 12
C559
10P_0402_50V8J
C559
10P_0402_50V8J
1
2
C1158
0.1U_0402_16V4Z
MUX@
C1158
0.1U_0402_16V4Z
MUX@
1
2
R268 0_0402_5%UMACRT@R268 0_0402_5%UMACRT@
12
R309 0_0402_5%DISO@R309 0_0402_5%DISO@ 12
L67
FCM2012CF-800T06_2P
L67
FCM2012CF-800T06_2P
1 2
D4
PJDLC05C_SOT23-3
D4
PJDLC05C_SOT23-3
2
3
1
U19
74AHCT1G125GW_SOT353-5
U19
74AHCT1G125GW_SOT353-5
A
2Y4
OE# 1
G
3P5
R308
150_0402_1%
R308
150_0402_1%
12
R408 0_0402_5%R408 0_0402_5%
12
R412 0_0402_5%DISO@R412 0_0402_5%DISO@ 12
R273 0_0402_5%UMACRT@R273 0_0402_5%UMACRT@
12
C569 0.1U_0402_16V4Z C569 0.1U_0402_16V4Z
1 2
R307
150_0402_1%
R307
150_0402_1%
12
R406 0_0402_5%UMACRT@R406 0_0402_5%UMACRT@
12
C564
10P_0402_50V8J
C564
10P_0402_50V8J
1
2
D5
PJDLC05C_SOT23-3
D5
PJDLC05C_SOT23-3
2
3
1
R312 10K_0402_5% R312 10K_0402_5% 12
L65 FCM2012CF-800T06_2PL65 FCM2012CF-800T06_2P
1 2
R410 0_0402_5%UMACRT@R410 0_0402_5%UMACRT@
12
U69
PI3V712-AZLEX_TQFN32_6X3~D
MUX@
U69
PI3V712-AZLEX_TQFN32_6X3~D
MUX@
A0 1
A1 2
GND 3
VDD
4
A2 5
A3 6
A4 7
4B2
17
4B1
18 3B1
20
3B2
19
0B2
26
0B1
27
1B1
25
1B2
24
GND 31
VDD
32
A5 9
SEL1 8
A6 10
GND 11
5B1
12
5B2
13
6B1
14
2B2
21
2B1
22
VDD
23
VDD
29
GND 28
SEL2 30
6B2
15
VDD
16
GPAD 33
C560
10P_0402_50V8J
C560
10P_0402_50V8J
1
2
R311
100K_0402_5%
@
R311
100K_0402_5%
@
1 2
C567
10P_0402_50V8J
C567
10P_0402_50V8J
1
2
C558
0.1U_0402_16V4Z
C558
0.1U_0402_16V4Z
1
2
R305
140_0402_1%
R305
140_0402_1%
12
C562
10P_0402_50V8J
C562
10P_0402_50V8J
1
2
C570
68P_0402_50V8J
C570
68P_0402_50V8J
1
2
R409 0_0402_5%R409 0_0402_5%
12
U18
74AHCT1G125GW_SOT353-5
U18
74AHCT1G125GW_SOT353-5
A
2Y4
OE# 1
G
3P5
R317
4.7K_0402_5%
R317
4.7K_0402_5%
12
R323 0_0402_5%
UMACRT@
R323 0_0402_5%
UMACRT@
12
C561
10P_0402_50V8J
C561
10P_0402_50V8J
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C
A_RST#
LPC_CLK0_ECLPCCLK0
SB_32KHI
SB_32KHO
SB_32KHI
SB_32KHO
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29H_PWRGD
25M_CLK_X2
25M_CLK_X1
25M_CLK_X1
25M_CLK_X2
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
MINI1_CLKREQ#
SPM_ID0
SPM_ID1
SPM_ID0
SPM_ID1
FN_RESERVE1
FN_RESERVE1
A_RST#
PLT_RST#
VGA_PWRGD_R
VGA_PWRGD_R
VGA_PWRGD_R
VGA_PWRGD
SB_RX0P12
SB_RX0N12
SB_RX1P12
SB_RX1N12
SB_TX1P12
SB_TX1N12
SB_TX0P12
SB_TX0N12
SB_TX2P12
SB_TX2N12
SB_TX3P12
SB_TX3N12
SB_RX2P12
SB_RX2N12
SB_RX3P12
SB_RX3N12
LPC_CLK0_EC 29,34
LPC_CLK1 29
LPC_FRAME# 34
LPC_AD1 34
LPC_AD2 34
LPC_AD0 34
LPC_AD3 34
SERIRQ 34
ALLOW_LDTSTOP 13
H_PROCHOT_R# 8
H_PWRGD 8
LDT_STOP# 8,13
LDT_RST# 8
PCI_AD23 29
PCI_AD24 27,29
PCI_AD25 29
PCI_AD26 29
PCI_AD27 29
PCI_AD28 29
PCI_AD29 29
PCI_CLK2 29
PCI_CLK3 29
PCI_CLK4 29
PCI_CLK1 29
H_PWRGD_L 50
PE_GPIO0 16
PE_GPIO1 36
INT_VGA_EN# 36
PX_EN# 36
A_RST#13,15,34
NB_DISP_CLKP13
NB_DISP_CLKN13
CLK_NBHT13
CLK_NBHT#13
CLK_CPU_BCLK8
CLK_CPU_BCLK#8
CLK_PCIE_LAN33
CLK_PCIE_LAN#33
CLK_PCIE_MINI132
CLK_PCIE_MINI1#32
CLK_SD_48M31
CLK_PEG_VGA16
CLK_PEG_VGA#16
CLK_SBLINK_BCLK13
CLK_SBLINK_BCLK#13
MINI1_CLKREQ# 32
PLT_RST# 16,32,33
SB_GPIO_A_RST#26
VGA_PWRGD49
+1.1VS_PCIE
+RTCBATT
+RTCVCC
+CHGRTC
+1.5VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710-PCIE/PCI/ACPI/LPC/RTC
Custom
25 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710-PCIE/PCI/ACPI/LPC/RTC
Custom
25 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710-PCIE/PCI/ACPI/LPC/RTC
Custom
25 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
W=20mils
for Clear CMOS
Close to SB
level shift to ISL6265
ISL6265 PWROK input, TTL level: 0.8V~2.0V
When this pin is high, the SVI interface is
active and I2C protocol is running. While this
pin is low, the SVC, SVD, and VFIXEN input
states determine the pre-PWROK metal VID or
VFIX mode voltage. This pin must be low prior
to the ISL6265 PGOOD output going high
Power Xpress Support
PE_GPIO0 VGA RESET, H: Enable
PE_GPIO1 VGA PWR Enable, H: Enable
PE_GPIO2 MODE Switch, H: VGA , L: NB
PCI_AD24 : VDDR Voltage SW
AMD suggest add Crystal for Internal CLK GEN
SB820 A12(SA00003IW10)
11/15 for internal CLK gen
12/07 ok
12/07 ok
12/07 ok
12/07 ok
12/07 ok
12/07 ok
12/07 ok
different to NEW75
12/08 add GPP_CLK5
DVT 0127 update
12/14 remove bypass Res.
DVT 0119 remove WLAN CLK port3
DVT 0119
FOR Side port mem / function reserve
PVT 20100310
Add /update net for VGA_PWRGD/function reserve
AMD suggest add GPIO control gate
12/17 update Res.to 100k ohm
PVT 20100311
add AND gate circuit
Pre MP unstuff AND gate
O
RS880M
128MX16
<1 pcs>
<1 pcs>
64MX16
Hynix (SA000032420/H5TQ1G63BFR-12C)
Hynix (SA00003VS00/H5TQ2G63BFR-12C)
Samsung (SA00003MQ00/K4W2G1646B-HC12)
11
SIDE PORE MEM
Samsung (SA000035720/K4W1G1646E-HC12)
O1
Location
1
SPM_ID0
(AD12)
SPM_ID1
(AD17)
O
O
R333 510_0402_5%R333 510_0402_5%
1 2
C585
1U_0402_6.3V6K
C585
1U_0402_6.3V6K
1
2
Y6
25MHZ_20PF_7A25000012
Y6
25MHZ_20PF_7A25000012
12
R1131 10K_0402_5%@R1131 10K_0402_5%@
1 2
T21PAD T21PAD
R1075 0_0402_5%R1075 0_0402_5%
1 2
R320 0_0402_5%
MUX@
R320 0_0402_5%
MUX@
1 2
C577 0.1U_0402_16V7KC577 0.1U_0402_16V7K
1 2
R327 2K_0402_1%R327 2K_0402_1%
12
C689
27P_0402_50V8J
C689
27P_0402_50V8J
1 2
Y3
32.768KHZ_12.5PF_Q13MC14610002
Y3
32.768KHZ_12.5PF_Q13MC14610002
OSC 4
OSC 1
NC
3
NC
2
T4 PADT4 PAD
R1099 10K_0402_5%@R1099 10K_0402_5%@
1 2
R330 22_0402_5%R330 22_0402_5%
1 2
R332 20M_0402_5%@R332 20M_0402_5%@
1 2
R334
0_0603_5%
@
R334
0_0603_5%
@
1 2
C586
18P_0402_50V8J
C586
18P_0402_50V8J
1 2
C573 0.1U_0402_16V7KC573 0.1U_0402_16V7K
1 2
R331
1K_0402_5%
R331
1K_0402_5%
12
R427 0_0402_5%@R427 0_0402_5%@
1 2
R1100 10K_0402_5%@R1100 10K_0402_5%@
1 2
C578 0.1U_0402_16V7KC578 0.1U_0402_16V7K
1 2
R329
4.7K_0402_5%
R329
4.7K_0402_5%
1 2
G
D
S
Q21
FDV301N_NL_SOT23-3
G
D
S
Q21
FDV301N_NL_SOT23-3
2
13
C576 0.1U_0402_16V7KC576 0.1U_0402_16V7K
1 2
R1134 0_0402_5%R1134 0_0402_5%
1 2
R426
1M_0603_5%
R426
1M_0603_5%
C582
18P_0402_50V8J
C582
18P_0402_50V8J
1 2
R325 33_0402_5%R325 33_0402_5%
12
C581
0.1U_0402_16V4Z
C581
0.1U_0402_16V4Z
1 2
R1101 10K_0402_5%@R1101 10K_0402_5%@
1 2
C583
0.1U_0402_16V4Z
C583
0.1U_0402_16V4Z
1
2
C580 0.1U_0402_16V7KC580 0.1U_0402_16V7K
1 2
R1133 100K_0402_5%@R1133 100K_0402_5%@
1 2
R1102 10K_0402_5%@R1102 10K_0402_5%@
1 2
C575 0.1U_0402_16V7KC575 0.1U_0402_16V7K
1 2
U21
NC7SZ08P5X_NL_SC70-5
U21
NC7SZ08P5X_NL_SC70-5
B
2
A
1Y4
P5
G
3
R1103 10K_0402_5%@R1103 10K_0402_5%@
1 2
C572 150P_0402_50V8JC572 150P_0402_50V8J
1 2
R1132 0_0402_5%@R1132 0_0402_5%@
1 2
C574 0.1U_0402_16V7KC574 0.1U_0402_16V7K
1 2
D8
BAS40-04_SOT23-3
D8
BAS40-04_SOT23-3
1
2
3
R1104 10K_0402_5%@R1104 10K_0402_5%@
1 2
C1272
0.1U_0402_16V4Z
@
C1272
0.1U_0402_16V4Z
@
1 2
C584
0.1U_0402_16V4Z
C584
0.1U_0402_16V4Z
1
2
R328
100K_0402_5%
R328
100K_0402_5%
12
C688
27P_0402_50V8J
C688
27P_0402_50V8J
1 2
U904
NC7SZ08P5X_NL_SC70-5
@
U904
NC7SZ08P5X_NL_SC70-5
@
B
2
A
1Y4
P5
G
3
C579 0.1U_0402_16V7KC579 0.1U_0402_16V7K
1 2
R425 0_0402_5%R425 0_0402_5%
1 2
PCI EXPRESS INTERFACES
Part 1 of 5
SB800
PCI INTERFACELPC
RTC
PCI CLKS
CLOCK GENERATOR
CPU
U20A
SB820M_FCBGA605
PCI EXPRESS INTERFACES
Part 1 of 5
SB800
PCI INTERFACELPC
RTC
PCI CLKS
CLOCK GENERATOR
CPU
U20A
SB820M_FCBGA605
A_RST#
L1
A_RX2P
AC24
A_RX2N
AC25
A_RX3P
AB25
A_TX3N
AB27 A_TX3P
AB26 A_TX2N
AB28 A_TX2P
AB29
A_RX1P
AD25
A_RX1N
AD24
A_RX0P
AE24
A_RX0N
AE23
A_TX1N
AC29 A_TX1P
AC28 A_TX0N
AD27 A_TX0P
AD26
PCIE_RCLKP/NB_LNK_CLKP
M23
PCIE_RCLKN/NB_LNK_CLKN
P23
PCIE_CALRP
AD29
PCIE_CALRN
AD28
GPP_CLK1N
N28
VDDBT_RTC_G B1
GPP_CLK0N
L28
GPP_CLK2P
M29
CPU_HT_CLKN
T21
GPP_CLK2N
M28
SLT_GFX_CLKP
V23
CPU_HT_CLKP
V21
PCICLK0 W2
PCICLK1/GPO36 W1
PCICLK2/GPO37 W3
PCICLK3/GPO38 W4
PCIRST# V2
CBE0# AA8
CBE1# AD5
CBE2# AD8
CBE3# AA10
FRAME# AE8
DEVSEL# AB9
IRDY# AJ3
TRDY# AE7
PAR AC5
STOP# AF5
PERR# AE6
REQ0# AE11
REQ1#/GPIO40 AH5
REQ2#/CLK_REQ8#/GPIO41 AH4
REQ3#/CLK_REQ5#/GPIO42 AC12
GNT0# AD12
GNT1#/GPO44 AJ5
GNT2#/GPO45 AH6
GNT3#/CLK_REQ7#/GPIO46 AB12
SERR# AE4
CLKRUN# AB11
LAD0 J27
LAD1 J26
LAD2 H29
LAD3 H28
LFRAME# G28
LDRQ0# J25
SERIRQ/GPIO48 AB19
PCICLK4/14M_OSC/GPO39 Y1
LPCCLK0 H24
LPCCLK1 H25
AD0/GPIO0 AA1
AD1/GPIO1 AA4
AD2/GPIO2 AA3
AD3/GPIO3 AB1
AD4/GPIO4 AA5
AD5/GPIO5 AB2
AD6/GPIO6 AB6
AD7/GPIO7 AB5
AD8/GPIO8 AA6
AD9/GPIO9 AC2
AD10/GPIO10 AC3
AD12/GPIO12 AC1
AD13/GPIO13 AD1
AD14/GPIO14 AD2
AD15/GPIO15 AC6
AD16/GPIO16 AE2
AD17/GPIO17 AE1
AD18/GPIO18 AF8
AD19/GPIO19 AE3
AD20/GPIO20 AF1
AD21/GPIO21 AG1
AD22/GPIO22 AF2
AD23/GPIO23 AE9
AD24/GPIO24 AD9
AD25/GPIO25 AC11
AD26/GPIO26 AF6
AD27/GPIO27 AF4
AD28/GPIO28 AF3
AD29/GPIO29 AH2
AD30/GPIO30 AG2
AD31/GPIO31 AH3
AD11/GPIO11 AC4
LDRQ1#/CLK_REQ6#/GPIO49 AA18
GPP_CLK1P
N29
RTCCLK D2
A_RX3N
AB24
INTE#/GPIO32 AJ6
INTF#/GPIO33 AG6
INTG#/GPIO34 AG4
INTH#/GPIO35 AJ4
LOCK# AD7
NB_HT_CLKP
T26
GPP_CLK3N
V25
INTRUDER_ALERT# B2
NB_DISP_CLKP
U29
14M_25M_48M_OSC
L25
GPP_CLK0P
L29
NB_HT_CLKN
T27
SLT_GFX_CLKN
T23
GPP_CLK3P
T25
25M_X1
L26
25M_X2
L27
NB_DISP_CLKN
U28
GPP_CLK4P
L24
GPP_CLK4N
L23
GPP_CLK5P
P25
GPP_CLK5N
M25
GPP_CLK6P
P29
GPP_CLK6N
P28
GPP_CLK7P
N26
GPP_CLK7N
N27
GPP_CLK8P
T29
GPP_CLK8N
T28
GPP_TX0P
AA28
GPP_TX0N
AA29
GPP_TX1P
Y29
GPP_TX1N
Y28
GPP_TX2P
Y26
GPP_TX2N
Y27
GPP_TX3P
W28
GPP_TX3N
W29
GPP_RX0P
AA22
GPP_RX0N
Y21
GPP_RX1P
AA25
GPP_RX1N
AA24
GPP_RX2P
W23
GPP_RX2N
V24
GPP_RX3P
W24
GPP_RX3N
W25
PCIE_RST#
P1
ALLOW_LDTSTP/DMA_ACTIVE# G21
LDT_RST# J24
32K_X1 C1
32K_X2 C2
PROCHOT# H21
LDT_STP# G22
LDT_PG K19
R1130 10K_0402_5%@R1130 10K_0402_5%@
1 2
R335
20M_0603_5%
R335
20M_0603_5%
12
R326 590_0402_1%R326 590_0402_1%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CRT_DET
CRT_DET
SUS_STAT#
NB_PWRGD
H_THERMTRIP#
EC_RSMRST#
SKU_ID
SB_SMDAT0
SB_SMCLK0
EC_LID_OUT#
USB_OC#0
HDA_SYNC
HDA_SDIN1
HDA_SDIN0
HDA_BITCLK
USB_RCOMP
HDA_BITCLK
EC_RSMRST#
SB_SMCLK0
SB_SMDAT0
SUS_STAT#
HDA_SDIN0
HDA_SDIN1
EC_LID_OUT#
SB_PCIE_WAKE#
H_THERMTRIP#
GBE_MDIO
GBE_MDIO
HDA_RST#
GBE_COL
GBE_CRS
GBE_RXERR
GBE_PHY_INTR
GBE_PHY_INTR
USB20_P2
USB20_N2
USB20_N0
USB20_P0
USB20_N6
USB20_P6
USB20_P1
USB20_N1
USB20_P5
USB20_N5
USB20_N14
USB20_P14
USB20_N8
USB20_P8
HDA_SDOUT
SB_SMCLK1
SB_SMDAT1
SB_SMCLK1
SB_SMDAT1
VGA_HDMI_DET#
VGA_HDMI_DET#
VB_EN
PX_FN
VB_EN
SKU_ID
SB_GPIO_A_RST#
USB20_P3
USB20_N3
SP_DDR3_RST#_R
SATA_IS1#
MUXLESS_SEL
MUXLESS_SEL
PX_FN
LAN_CLKREQ#
ACF_EN
MUXLESS_SEL
ACF_EN
SB_SIC
SB_SID
SB_SIC
SB_SID
GBE_COL
GBE_CRS
GBE_RXERR
EC_SWI#34
CRT_DET#24
PM_SLP_S3#34
PM_SLP_S5#34
SUS_STAT#13
PBTN_OUT#34
SB_PWRGD8,13,34
EC_KBRST#34
EC_GA2034
EC_SMI#34
EC_SCI#34
EC_RSMRST#34
H_THERMTRIP#8
NB_PWRGD13
SB_PCIE_WAKE#32,33
SB_SMDAT010,11,32
SB_SMCLK010,11,32
SB_SPKR37
EC_LID_OUT#34
USB_OC#033
HDA_SYNC_AUDIO37
HDA_RST_AUDIO#37
HDA_SDIN037
HDA_SDOUT_AUDIO37
HDA_BITCLK_AUDIO37
CLK_48M_LAN 33
GPIO199 29
GPIO200 29
USB20_N0 33
USB20_P0 33
USB20_N6 31
USB20_P6 31
USB20_P1 33
USB20_N1 33
USB20_P5 22
USB20_N5 22
USB20_P2 33
USB20_N2 33
USB20_N14 33
USB20_P14 33
USB20_N8 32
USB20_P8 32
HDA_SDOUT29
VGA_HDMI_DET17,23
SB_GPIO_A_RST#25
USB20_P3 33
USB20_N3 33
SP_DDR3_RST#15
SATA_IS1#34
LAN_CLKREQ#33
SB_SIC 8
SB_SID 8
+3VALW
+3VS
+3VALW
+3VALW
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 USB/HD audio
Custom
26 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 USB/HD audio
Custom
26 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 USB/HD audio
Custom
26 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
SKU ID: 1-> VGA *
0-> UMA
STRAP PIN
EHCI1 / OHCI1
OHCI4
EHCI2 / OHCI2
EHCI13 / OHCI3
Cinfigure to output or Internal PU/PD
Ext USB1
Ext USB2
Ext USB3
CardReader
Mini1-WLAN
BT
Camera
<Wake Up support>
Check SW:
Check SW:
Cinfigure to output or Internal PU/PD
HPD for PX
0 -> DGPU
1 -> IGPU
PX Function: 1-> PX Enable
0-> PX Disable *
VB Function: 1-> VB Enable
0-> VB Disable *
SB820 A12(SA00003IW10)
Pop for PX verify
Ext USB4
11/05 add USB20_P3/N3
11/05 port 1~3 supply for EXT. USB/B
11/06 delete 3G USB
11/10 Remove OC#1/OC#2
11/10 For Side Port Memory Reset signal
11/11 SB820M internal PU , add or not?
12/02 add net for ODD EJECT
Muxless SEL: 1-> PX with Muxless
0-> PX with Mux *
12/07 for muxless sel
12/08 add CLK_MODE
DVT 0119 change CLK MODE to ACF_EN
DVT 0128 set R1066 to MUXLESS@
set R1073 to MUX@
12/07 for Int. CLK gen
(update net name)
ACF MODE SEL: 1-> ACF Enable
0->ACF Disable
DVT 0119
move net,
add
ACF_EN
net.
12/09 set net back
12/09 Follow AMD checklist
DVT 0128 set Q64 to MUX@
DVT 0131 set Q64 to SB570020410
DVT 0131 set Q22 to SB570020410
C587 100P_0402_25V8K
@
C587 100P_0402_25V8K
@
1 2
R418 2.2K_0402_5%VB@R418 2.2K_0402_5%VB@
1 2
R1073 2.2K_0402_5%
MUX@
R1073 2.2K_0402_5%
MUX@
1 2
R343 2.2K_0402_5%R343 2.2K_0402_5%
1 2
R1080 2.2K_0402_5%
@
R1080 2.2K_0402_5%
@
1 2
R355 10K_0402_5%R355 10K_0402_5%
1 2
R416 2.2K_0402_5%VGA@R416 2.2K_0402_5%VGA@
1 2
T23 PADT23 PAD
R1074 100K_0402_5%R1074 100K_0402_5%
12
R1081 2.2K_0402_5%
@
R1081 2.2K_0402_5%
@
1 2
R339 2.2K_0402_5%R339 2.2K_0402_5%
1 2
R352 10K_0402_5%R352 10K_0402_5%
1 2
R351 10K_0402_5%
@
R351 10K_0402_5%
@
1 2
T24 PADT24 PAD
R337 100_0402_5%
@
R337 100_0402_5%
@
1 2
USB 2.0
Part 4 of 5
SB800
ACPI / WAKE UP EVENTS
GPIO
HD AUDIO
USB OC USB 1.1 USB MISCEMBEDDED CTRL
EMBEDDED CTRL
GBE LAN
U20D
SB820M_FCBGA605
USB 2.0
Part 4 of 5
SB800
ACPI / WAKE UP EVENTS
GPIO
HD AUDIO
USB OC USB 1.1 USB MISCEMBEDDED CTRL
EMBEDDED CTRL
GBE LAN
U20D
SB820M_FCBGA605
USBCLK/14M_25M_48M_OSC A10
USB_OC6#/IR_TX1/GEVENT6#
D1
USB_HSD5P D16
USB_HSD5N C16
USB_HSD4P B14
USB_HSD4N A14
USB_HSD3P E18
USB_HSD3N E16
USB_HSD2P J16
USB_HSD2N J18
USB_HSD1P B17
USB_HSD1N A17
USB_HSD0P A16
USB_HSD0N B16
USB_OC4#/IR_RX0/GEVENT16#
D4
USB_OC3#/AC_PRES/TDO/GEVENT15#
E8
USB_OC1#/TDI/GEVENT13#
E7 USB_OC2#/TCK/GEVENT14#
F7
USB_HSD7P G12
USB_HSD7N G14
USB_HSD6P G16
USB_HSD6N G18
USB_OC0#/TRST#/GEVENT12#
F8
DDR3_RST#/GEVENT7#
H4
CLK_REQ4#/SATA_IS0#/GPIO64
AD19
AZ_SDIN3/GPIO170
M4
PCI_PME#/GEVENT4#
J2
RI#/GEVENT22#
K1
SLP_S3#
F1
SLP_S5#
H1
PWR_BTN#
F2
PWR_GOOD
H5
SUS_STAT#
G6
GBE_LED1/GEVENT9#
D7 GBE_LED0/GPIO183
D5
GA20IN/GEVENT0#
AD21
KBRST#/GEVENT1#
AE21
THRMTRIP#/SMBALERT#/GEVENT2#
J6
LPC_PME#/GEVENT3#
K2
LPC_SMI#/GEVENT23#
J29
GEVENT5#
H2
SYS_RESET#/GEVENT19#
J1
WAKE#/GEVENT8#
H6
RSMRST#
G1
CLK_REQ3#/SATA_IS1#/GPIO63
AA16
NB_PWRGD
AC19
SMARTVOLT1/SATA_IS2#/GPIO50
AB21
SMARTVOLT2/SHUTDOWN#/GPIO51
AJ21
SPKR/GPIO66
AF19
SCL0/GPIO43
AD22
SDA0/GPIO47
AE22
CLK_REQ2#/FANIN4/GPIO62
AH21
CLK_REQ1#/FANOUT4/GPIO61
AB18
GBE_CRS
T4 GBE_COL
T1
AZ_SYNC
N2
USB_HSD9P A13
USB_HSD9N B13
USB_HSD8P D13
USB_HSD8N C13
IR_LED#/LLB#/GPIO184
E1
IR_RX1/GEVENT20#
F3
USB_OC5#/IR_TX0/GEVENT17#
E4
BLINK/USB_OC7#/GEVENT18#
H3
SCL1/GPIO227
F5
SDA1/GPIO228
F4
CLK_REQ0#/SATA_IS3#/GPIO60
AC18
AZ_SDIN2/GPIO169
M1
AZ_SDIN0/GPIO167
L2
SATA_IS4#/FANOUT3/GPIO55
AF20
SATA_IS5#/FANIN3/GPIO59
AE19
USB_FSD1P/GPIO186 J10
USB_FSD1N H11
USB_FSD0P/GPIO185 H9
USB_FSD0N J8
USB_HSD11P E14
USB_HSD11N E12
USB_HSD10P J12
USB_HSD10N J14
KSO_17/GPIO226 B22
EC_PWM0/EC_TIMER0/GPIO197 F25
SCL2/GPIO193 D25
SDA2/GPIO194 F23
SCL3_LV/GPIO195 B26
SDA3_LV/GPIO196 E26
EC_PWM1/EC_TIMER1/GPIO198 E22
EC_PWM2/EC_TIMER2/GPIO199 F22
EC_PWM3/EC_TIMER3/GPIO200 E21
KSI_0/GPIO201 G24
KSI_1/GPIO202 G25
KSI_2/GPIO203 E28
KSI_3/GPIO204 E29
KSI_4/GPIO205 D29
KSI_5/GPIO206 D28
KSI_6/GPIO207 C29
KSI_7/GPIO208 C28
PS2_DAT/SDA4/GPIO187
E23
PS2_CLK/SCL4/GPIO188
E24
SPI_CS2#/GBE_STAT2/GPIO166
F21
FC_RST#/GPO160
G29
PS2KB_DAT/GPIO189
D27
PS2KB_CLK/GPIO190
F28
PS2M_DAT/GPIO191
F29
PS2M_CLK/GPIO192
E27
KSO_16/GPIO225 A22
KSO_0/GPIO209 B28
KSO_1/GPIO210 A27
KSO_2/GPIO211 B27
KSO_3/GPIO212 D26
KSO_4/GPIO213 A26
KSO_5/GPIO214 C26
KSO_6/GPIO215 A24
KSO_7/GPIO216 B25
KSO_8/GPIO217 A25
KSO_9/GPIO218 D24
KSO_10/GPIO219 B24
KSO_11/GPIO220 C24
KSO_12/GPIO221 B23
KSO_13/GPIO222 A23
KSO_14/GPIO223 D22
KSO_15/GPIO224 C22
USB_HSD13P B12
USB_HSD13N A12
USB_HSD12P F11
USB_HSD12N E11
GBE_TXD2
P9 GBE_TXD3
M5
GBE_MDCK
L6
GBE_MDIO
L5
GBE_RXCLK
T9
AZ_BITCLK
M3
AZ_SDOUT
N1
AZ_SDIN1/GPIO168
M2
AZ_RST#
P2
GBE_RXCTL/RXDV
T5
GBE_RXERR
V5
GBE_TXCLK
P5
GBE_RXD0
U2
GBE_RXD2
U3 GBE_RXD3
U1
GBE_TXCTL/TXEN
M7
GBE_PHY_PD
P4
GBE_PHY_RST#
M9
GBE_PHY_INTR
V7
SPI_CS3#/GBE_STAT1/GEVENT21#
D3
GBE_LED2/GEVENT10#
G5
GBE_TXD1
T7
GBE_RXD1
T2
GBE_TXD0
P7
GBE_STAT0/GEVENT11#
K3
TEST0
B3
TEST1/TMS
C4
TEST2
F6
CLK_REQG#/GPIO65/OSCIN
AA20
USB_RCOMP G19
R363 2.2K_0402_5%R363 2.2K_0402_5%
1 2
R341 100K_0402_5%R341 100K_0402_5%
1 2
G
D
S
Q22
2N7002-7-F_SOT23@
G
D
S
Q22
2N7002-7-F_SOT23@
2
13
R362 2.2K_0402_5%R362 2.2K_0402_5%
1 2
R413
100K_0402_5%
VGA@
R413
100K_0402_5%
VGA@
1 2
R348 33_0402_5%R348 33_0402_5%
1 2
T22 PADT22 PAD
G
D
S
Q64
2N7002-7-F_SOT23
MUX@
G
D
S
Q64
2N7002-7-F_SOT23
MUX@
2
13
R357 100K_0402_5%
@
R357 100K_0402_5%
@
1 2
R358 10K_0402_5%R358 10K_0402_5%
1 2
R956 0_0402_5%
SP@
R956 0_0402_5%
SP@ 12
R588 100K_0402_5%R588 100K_0402_5%
12
R346 33_0402_5%R346 33_0402_5%
1 2
R349 10K_0402_5%
@
R349 10K_0402_5%
@
1 2
R340 2.2K_0402_5%VGA@R340 2.2K_0402_5%VGA@
1 2
R350 10K_0402_5%
@
R350 10K_0402_5%
@
1 2
R342 2.2K_0402_5%R342 2.2K_0402_5%
1 2
R33811.8K_0402_1% R33811.8K_0402_1%
1 2
R370 100K_0402_5%R370 100K_0402_5%
12
R347 33_0402_5%R347 33_0402_5%
1 2
R356 10K_0402_5%R356 10K_0402_5%
1 2
R1066 2.2K_0402_5%
MUXLESS@
R1066 2.2K_0402_5%
MUXLESS@
1 2
R361 10K_0402_5%@R361 10K_0402_5%@
1 2
R336
100K_0402_5%
@
R336
100K_0402_5%
@
1 2
R354 10K_0402_5%R354 10K_0402_5%
1 2
R1067 100K_0402_5%R1067 100K_0402_5%
12
R344 4.7K_0402_5%R344 4.7K_0402_5%
1 2
R345 33_0402_5%R345 33_0402_5%
1 2
R353 10K_0402_5%R353 10K_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SATA_CALRP
SATA_CALRN
MEM_1V5
MEM_1V5
SATA_STX_DRX_N130
SATA_STX_DRX_P130
SATA_STX_DRX_N030
SATA_STX_DRX_P030
SATA_DTX_C_SRX_P130
SATA_DTX_C_SRX_N130
SATA_DTX_C_SRX_P030
SATA_DTX_C_SRX_N030
SATA_LED#35
EC_THERM# 34
VDDR_SW 46
PCI_AD2425,29
+1.1VS_SATA
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 SATA/IDE/SPI
Custom
27 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 SATA/IDE/SPI
Custom
27 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 SATA/IDE/SPI
Custom
27 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
HDD
ODD
Cinfigure to output or Internal PU/PD
Check SW:
For VDDR Voltage Switch, AMD suggest
PCI_AD24
1 : VDDR=1.05V
0 : VDDR=0.9V
MEM_1V5 is for gating the
glitch on PCI_AD24
SB820 A12(SA00003IW10)
Verify when PCBA back
(Pop R424 and remove PR160)
12/07 remove SB sata Xtal(AMD)
R364 1K_0402_1%R364 1K_0402_1%
12
T26 PADT26 PAD
U22
NC7SZ08P5X_NL_SC70-5
U22
NC7SZ08P5X_NL_SC70-5
B
2
A
1Y4
P5
G
3
C686
150P_0402_50V8J
C686
150P_0402_50V8J
1
2
R422 0_0402_5%R422 0_0402_5%
1 2
R365 931_0402_1%R365 931_0402_1%
12
R424 33_0402_5%R424 33_0402_5%
1 2
R366
0_0402_5%
@R366
0_0402_5%
@
1 2
R367 10K_0402_5%R367 10K_0402_5%
1 2
R423 0_0402_5%
@
R423 0_0402_5%
@
1 2
C685
0.1U_0402_16V4Z
C685
0.1U_0402_16V4Z
12
FLASH
Part 2 of 5
SB800
SERIAL ATA
SPI ROM
HW MONITOR
U20B
SB820M_FCBGA605
FLASH
Part 2 of 5
SB800
SERIAL ATA
SPI ROM
HW MONITOR
U20B
SB820M_FCBGA605
FC_CLK AH28
FC_FBCLKOUT AG28
FC_FBCLKIN AF26
FC_INT1/GPIOD144 AF29
FC_OE#/GPIOD145 AF28
FC_AVD#/GPIOD146 AG29
FC_INT2/GPIOD147 AH27
FC_WE#/GPIOD148 AG26
FC_CE1#/GPIOD149 AF27
FC_CE2#/GPIOD150 AE29
FC_ADQ0/GPIOD128 AJ27
FC_ADQ1/GPIOD129 AJ26
FC_ADQ2/GPIOD130 AH25
FC_ADQ3/GPIOD131 AH24
FC_ADQ4/GPIOD132 AG23
FC_ADQ5/GPIOD133 AH23
FC_ADQ6/GPIOD134 AJ22
FC_ADQ7/GPIOD135 AG21
FC_ADQ8/GPIOD136 AF21
FC_ADQ9/GPIOD137 AH22
FC_ADQ10/GPIOD138 AJ23
FC_ADQ11/GPIOD139 AF23
FC_ADQ12/GPIOD140 AJ24
FC_ADQ13/GPIOD141 AJ25
FC_ADQ14/GPIOD142 AG25
FC_ADQ15/GPIOD143 AH26
SATA_TX2P
AG12
SATA_TX2N
AF12
SATA_RX2P
AH12 SATA_RX2N
AJ12
SATA_TX3P
AH14
SATA_TX3N
AJ14
SATA_RX3P
AF14 SATA_RX3N
AG14
SATA_TX0P
AH9
SATA_TX0N
AJ9
SATA_RX0N
AJ8
SATA_RX0P
AH8
SATA_TX1P
AH10
SATA_TX1N
AJ10
SATA_RX1N
AG10
SATA_RX1P
AF10
SATA_CALRN
AA14
SATA_X1
AD16
SATA_X2
AC16
SATA_ACT#/GPIO67
AD11
FANOUT1/GPIO53 W6
FANOUT2/GPIO54 Y9
FANIN0/GPIO56 W7
FANIN1/GPIO57 V9
FANIN2/GPIO58 W8
VIN0/GPIO175 A3
VIN1/GPIO176 B4
VIN2/GPIO177 A4
VIN3/GPIO178 C5
VIN4/GPIO179 A7
VIN5/GPIO180 B7
VIN6/GBE_STAT3/GPIO181 B8
VIN7/GBE_LED3/GPIO182 A8
TEMPIN0/GPIO171 B6
TEMPIN1/GPIO172 A6
TEMPIN2/GPIO173 A5
TEMPIN3/TALERT#/GPIO174 B5
FANOUT0/GPIO52 W5
TEMP_COMM C7
SATA_TX4P
AG17
SATA_TX4N
AF17
SATA_RX4N
AJ17
SATA_RX4P
AH17
SATA_TX5P
AJ18
SATA_TX5N
AH18
SATA_RX5N
AH19
SATA_RX5P
AJ19
SPI_DI/GPIO164
J5
SPI_DO/GPIO163
E2
SPI_CLK/GPIO162
K4
SPI_CS1#/GPIO165
K9
ROM_RST#/GPIO161
G2
NC2 Y2
NC1 G27
SATA_CALRP
AB14
T25 PADT25 PAD
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+3VS
+1.1VS
+1.1VS
+3VALW
+1.1VS
+1.1VS_PCIE
+1.1VS_SATA
+3VALW
+AVDD_USB
+1.1VALW
+1.1VALW
+1.1VS_VDDC
+1.1VS_CKVDD
+1.1VS
+VDDIO_AZ
+VDDCR_USB
+VDDPL_11V
+VDDPL_3V
+VDDPL_3V_USB
+3V_HWM +VDDLX_3V
+3VALW
+VDDIO_AZ
+3VS+VDDPL_3V
+VDDPL_11V +1.1VALW +VDDPL_3V_USB +3VALW +3V_HWM +3VALW
+VDDPL_3V_PCIE
+VDDPL_3V_SATA
+VDDPL_3V_PCIE +3VS
+VDDPL_3V_SATA +3VS
+1.1VALW
+1.1V_USB
+3VALW
+3VALW
+VDDCR_USB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 power/GND
Custom
28 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 power/GND
Custom
28 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 power/GND
Custom
28 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
131mA
For 3V AZ device
check 220ohm bead
71mA
43mA
600mA
93mA
567mA
658mA
200mA
510mA
400mA
32mA
113mA
TBD
197mA
47mA
62mA
17mA
5mA
197mA
External Clock, connect to +1.1VS
directly, no need thick trace
check can be removed?
SB820 A12(SA00003IW10) SB820 A12(SA00003IW10)
11/07 790mA
11/07 78mA
11/07 0.15mA
11/07 49mA
11/07 115mA
11/07 534mA
ĺ
ĺ
ĺ
ĺ
ĺ
ĺ
ĺ11/07 16mA
ĺ11/07 58mA
ĺ11/07 46mA
ĺ11/07 65mA
ĺ11/10 382mA
ĺ11/07 12mA
ĺ
11/07
1350mA
ĺ
11/07 15mA
ĺ
11/07 11mA
ĺ
11/07
690mA
ĺ
11/07 5mA
Pre MP 0409
Add LDO
C619 1U_0402_6.3V6KC619 1U_0402_6.3V6K
1 2
L75 FBMA-L11-160808-221LMT 0603L75 FBMA-L11-160808-221LMT 0603
12
C612 1U_0402_6.3V6KC612 1U_0402_6.3V6K
1 2
C620 1U_0402_6.3V6KC620 1U_0402_6.3V6K
1 2
C593 0.1U_0402_16V4ZC593 0.1U_0402_16V4Z
1 2
L76
FBMA-L11-160808-221LMT 0603
L76
FBMA-L11-160808-221LMT 0603
12
C622 10U_0805_10V4ZC622 10U_0805_10V4Z
1 2
Part 3 of 5
SB800
POWER
PCI/GPIO I/O
CORE S03.3V_S5 I/O
CORE S5
PCI EXPRESSSERIAL ATA
USB I/O
PLL CLKGEN I/O
FLASH I/O
GBE LAN
U20C
SB820M_FCBGA605
Part 3 of 5
SB800
POWER
PCI/GPIO I/O
CORE S03.3V_S5 I/O
CORE S5
PCI EXPRESSSERIAL ATA
USB I/O
PLL CLKGEN I/O
FLASH I/O
GBE LAN
U20C
SB820M_FCBGA605
VDDIO_33_PCIGP_2
V6
VDDIO_33_PCIGP_6
AA2
VDDIO_33_PCIGP_3
Y19
VDDIO_33_PCIGP_11
AF7
VDDIO_33_PCIGP_1
AH1
VDDIO_33_PCIGP_4
AE5
VDDIO_33_PCIGP_5
AC21
VDDIO_33_PCIGP_12
AA19
VDDIO_33_PCIGP_10
AA9
VDDIO_33_PCIGP_7
AB4
VDDIO_33_PCIGP_8
AC8
VDDIO_33_PCIGP_9
AA7
VDDIO_33_S_1 A21
VDDIO_33_S_2 D21
VDDIO_33_S_3 B21
VDDIO_33_S_4 K10
VDDIO_33_S_5 L10
VDDCR_11_S_2 G26
VDDCR_11_S_1 F26
VDDCR_11_USB_S_1 A11
VDDCR_11_USB_S_2 B11
VDDPL_33_SYS M21
VDDPL_11_SYS_S L22
VDDAN_33_USB_S_1
A18
VDDAN_33_USB_S_4
B18
VDDAN_33_USB_S_2
A19
VDDAN_33_USB_S_5
B19
VDDPL_33_USB_S F19
VDDAN_33_USB_S_9
D18 VDDAN_33_USB_S_8
C20
VDDAN_33_USB_S_3
A20
VDDAN_33_USB_S_11
D20 VDDAN_33_USB_S_10
D19
VDDAN_11_PCIE_4
V27 VDDAN_11_PCIE_3
V26
VDDAN_11_PCIE_7
W22
VDDAN_11_PCIE_2
V22
VDDAN_11_PCIE_5
V28
VDDAN_11_PCIE_1
U26
VDDAN_11_PCIE_6
V29
VDDAN_11_SATA_1
AJ20
VDDAN_11_SATA_4
AF18
VDDAN_11_SATA_2
AH20
VDDAN_11_SATA_3
AG19
VDDAN_11_SATA_5
AE18
VDDAN_11_SATA_6
AD18
VDDAN_11_SATA_7
AE16
VDDCR_11_1 N13
VDDCR_11_2 R15
VDDCR_11_3 N17
VDDCR_11_4 U13
VDDCR_11_5 U17
VDDCR_11_6 V12
VDDCR_11_7 V18
VDDCR_11_9 W18
VDDCR_11_8 W12
VDDAN_33_USB_S_6
B20
VDDAN_33_USB_S_7
C18
VDDIO_18_FC_2
AE25
VDDIO_18_FC_4
AC22
VDDIO_18_FC_1
AF22
VDDAN_11_CLK_2 K29
VDDAN_11_CLK_1 K28
VDDAN_11_CLK_4 K26
VDDAN_11_CLK_3 J28
VDDCR_11_GBE_S_2 L9
VDDIO_33_S_6 J9
VDDAN_11_PCIE_8
W26
VDDPL_33_PCIE
AE28
VDDPL_33_SATA
AD14
VDDAN_33_HWM_S D6
VDDAN_11_CLK_5 J21
VDDAN_11_CLK_7 K21
VDDAN_11_USB_S_1
C11
VDDAN_11_USB_S_2
D11
VDDCR_11_GBE_S_1 L7
VDDIO_GBE_S_1 M6
VDDIO_33_GBE_S M10
VDDIO_GBE_S_2 P8
VDDIO_33_S_7 T6
VDDIO_33_S_8 T8
VDDXL_33_S L20
VDDRF_GBE_S V1
VDDIO_AZ_S M8
VDDIO_18_FC_3
AF24
VDDAN_11_CLK_6 J20
VDDAN_11_CLK_8 J22
VDDAN_33_USB_S_12
E19
C636
0.1U_0402_16V4Z
C636
0.1U_0402_16V4Z
1
2
C6082.2U_0603_6.3V6K C6082.2U_0603_6.3V6K 1 2
C6020.1U_0402_16V4Z C6020.1U_0402_16V4Z 12
C6030.1U_0402_16V4Z C6030.1U_0402_16V4Z 12
R371 0_0402_5%R371 0_0402_5%
1 2
R372 0_0402_5%R372 0_0402_5%
1 2
C5970.1U_0402_16V4Z C5970.1U_0402_16V4Z 12
L80
FBMA-L11-160808-221LMT 0603
L80
FBMA-L11-160808-221LMT 0603
12
C5980.1U_0402_16V4Z C5980.1U_0402_16V4Z 12
L77
FBMA-L11-160808-221LMT 0603
L77
FBMA-L11-160808-221LMT 0603
12
C623 0.1U_0402_16V4ZC623 0.1U_0402_16V4Z
12
C616 1U_0402_6.3V6KC616 1U_0402_6.3V6K
12
C59522U_0805_6.3V6M C59522U_0805_6.3V6M 1 2
APL5317
U905
APL5317
U905
GND 2
VIN 1
EN 3
FB
4
VOUT
5
C6001U_0402_6.3V6K C6001U_0402_6.3V6K 12
C591 22U_0805_6.3V6MC591 22U_0805_6.3V6M
1 2
L79
FBMA-L11-160808-221LMT 0603
L79
FBMA-L11-160808-221LMT 0603
12
C610 22U_0805_6.3V6MC610 22U_0805_6.3V6M
1 2
C628
0.1U_0402_16V4Z
C628
0.1U_0402_16V4Z
1
2
C621 0.1U_0402_16V4ZC621 0.1U_0402_16V4Z
1 2
C611 1U_0402_6.3V6KC611 1U_0402_6.3V6K
1 2
C613 0.1U_0402_16V4ZC613 0.1U_0402_16V4Z
1 2
C605 1U_0402_6.3V6KC605 1U_0402_6.3V6K
1 2
C6092.2U_0603_6.3V6K C6092.2U_0603_6.3V6K 1 2
L73 FBMA-L11-160808-221LMT 0603
@
L73 FBMA-L11-160808-221LMT 0603
@
12
C59010U_0805_10V4Z C59010U_0805_10V4Z 1 2
C632
0.1U_0402_16V4Z
C632
0.1U_0402_16V4Z
1
2
L122
FBMA-L11-160808-221LMT 0603
L122
FBMA-L11-160808-221LMT 0603
12
L70
FBMA-L11-201209-221LMA30T_0805
L70
FBMA-L11-201209-221LMA30T_0805
12
L74
FBMA-L11-160808-221LMT 0603
L74
FBMA-L11-160808-221LMT 0603
12
C614 0.1U_0402_16V4ZC614 0.1U_0402_16V4Z
1 2
C617 10U_0805_10V4ZC617 10U_0805_10V4Z
1 2
C618 10U_0805_10V4ZC618 10U_0805_10V4Z
1 2
C599 0.1U_0402_16V4ZC599 0.1U_0402_16V4Z
1 2
C635
2.2U_0603_6.3V6K
C635
2.2U_0603_6.3V6K
1
2
L81
FBMA-L11-160808-221LMT 0603
L81
FBMA-L11-160808-221LMT 0603
12
C5941U_0402_6.3V6K C5941U_0402_6.3V6K 12
L69
FBMA-L11-201209-221LMA30T_0805
L69
FBMA-L11-201209-221LMA30T_0805
12
C629
2.2U_0603_6.3V6K
C629
2.2U_0603_6.3V6K
1
2
C606 0.1U_0402_16V4ZC606 0.1U_0402_16V4Z
1 2
C592 0.1U_0402_16V4ZC592 0.1U_0402_16V4Z
1 2
R373 0_0402_5%R373 0_0402_5%
1 2
C5961U_0402_6.3V6K C5961U_0402_6.3V6K 12
C630
0.1U_0402_16V4Z
C630
0.1U_0402_16V4Z
1
2
C627 2.2U_0603_6.3V6KC627 2.2U_0603_6.3V6K
1 2
C634
2.2U_0603_6.3V6K
C634
2.2U_0603_6.3V6K
1
2
R374 0_0402_5%R374 0_0402_5%
1 2
L78
FBMA-L11-160808-221LMT 0603
L78
FBMA-L11-160808-221LMT 0603
12
SB800
GROUND
Part 5 of 5
SB820M_FCBGA605
U20E
SB800
GROUND
Part 5 of 5
SB820M_FCBGA605
U20E
VSS_4 E5
VSS_2 A28
VSS_21 J7
VSS_10 R13
VSS_11 R17
VSS_1 AJ2
VSS_17 V19
VSS_8 F24
VSS_9 N15
VSS_46 H7
VSS_13 P10
VSS_14 V11
VSS_15 U15
VSS_16 M18
VSS_18 M11
VSS_19 L12
VSS_20 L18
VSS_22 P3
VSS_23 V4
VSS_26 AB7
VSS_27 AC9
VSS_28 V8
VSS_29 W9
VSS_32 B29
VSS_33 U4
VSS_34 Y18
VSS_36 Y12
VSS_37 Y11
VSS_3 A2
VSS_35 Y10
VSS_30 W10
VSSIO_SATA_15
AH16
VSSIO_USB_25
K14
VSSIO_SATA_5
AE12
VSSIO_SATA_11
AG8
VSSIO_USB_26
K16
VSS_31 AJ28
VSS_24 AD6
VSSIO_SATA_14
AH13
VSSIO_SATA_2
Y16
VSSIO_SATA_3
AB16
VSSIO_SATA_1
Y14
VSSIO_SATA_17
AJ11
VSSIO_SATA_4
AC14
VSSIO_SATA_12
AH7
VSSIO_SATA_6
AE14
VSSIO_SATA_10
AF16
VSSIO_SATA_7
AF9
VSSIO_SATA_8
AF11
VSSIO_SATA_16
AJ7
VSSIO_USB_27
K18
VSSIO_SATA_13
AH11
VSSIO_USB_5
D10
VSSIO_USB_8
D17
VSSIO_USB_4
B9 VSSIO_USB_3
K11
VSSIO_USB_6
D12
VSSIO_USB_7
D14
VSSIO_USB_2
B10
VSSIO_USB_21
H18
VSSIO_USB_10
F9
VSSIO_USB_20
H16
VSSIO_USB_22
J11
VSSIO_USB_11
F12
VSSIO_USB_12
F14
VSSIO_USB_23
J19
VSSIO_USB_16
F18 VSSIO_USB_15
G11
VSSIO_USB_19
H14
VSSIO_USB_1
A9
VSSIO_USB_24
K12
VSS_12 T10
VSSIO_USB_18
H12
VSS_7 E6
VSS_25 AD4
VSS_6 E25
VSSIO_USB_13
F16
VSSIO_USB_9
E9
VSSPL_SYS M20
VSSIO_PCIECLK_3
M22
VSSIO_PCIECLK_14 H23
VSSIO_PCIECLK_13
J23
VSSIO_PCIECLK_18 AB23
VSSIO_PCIECLK_6
P22
VSSIO_PCIECLK_8
P26 VSSIO_PCIECLK_7
P24
VSSIO_PCIECLK_17 AA23
VSSIO_PCIECLK_16 AA21
VSSIO_PCIECLK_15 H26
VSS_50 N4
VSSIO_PCIECLK_21 AC26
VSSIO_PCIECLK_19 AD23
VSSIO_PCIECLK_20 AA26
VSSIO_PCIECLK_2
P20 VSSIO_PCIECLK_1
P21
VSSIO_PCIECLK_4
M24
VSS_5 D23
VSSIO_PCIECLK_5
M26
VSS_49 P6
VSS_44 M12
VSS_45 AF25
VSS_42 G8
VSS_48 V10
VSS_41 J4
VSS_43 G9
VSS_38 AA11
VSS_39 AA12
VSS_40 G4
VSSIO_SATA_9
AF13
EFUSE
Y4
VSSAN_HWM
D8
VSSIO_PCIECLK_25 AE26
VSSIO_USB_28
H19
VSSIO_PCIECLK_22 Y20
VSSIO_PCIECLK_23 W21
VSSIO_PCIECLK_24 W20
VSSIO_PCIECLK_9
T20
VSSIO_PCIECLK_10
T22
VSSIO_PCIECLK_11
T24
VSSIO_PCIECLK_12
V20
VSS_51 L4
VSS_52 L8
VSSXL
M19
VSS_47 AH29
VSSIO_PCIECLK_27 K20
VSSIO_PCIECLK_26 L21
VSSIO_USB_14
C9
VSSIO_USB_17
D9
VSSIO_SATA_19
AJ16 VSSIO_SATA_18
AJ13
C607 0.1U_0402_16V4ZC607 0.1U_0402_16V4Z
1 2
C637
2.2U_0603_6.3V6K
C637
2.2U_0603_6.3V6K
1
2
C638
2.2U_0603_6.3V6K
C638
2.2U_0603_6.3V6K
1
2
L71
FBMA-L11-201209-221LMA30T_0805
L71
FBMA-L11-201209-221LMA30T_0805
12
C633
2.2U_0603_6.3V6K
C633
2.2U_0603_6.3V6K
1
2
C604 22U_0805_6.3V6MC604 22U_0805_6.3V6M
1 2
C626 0.1U_0402_16V4ZC626 0.1U_0402_16V4Z
12
L72
FBMA-L11-201209-221LMA30T_0805
L72
FBMA-L11-201209-221LMA30T_0805
12
C615 1U_0402_6.3V6KC615 1U_0402_6.3V6K
12
C631
2.2U_0603_6.3V6K
C631
2.2U_0603_6.3V6K
1
2
C6011U_0402_6.3V6K C6011U_0402_6.3V6K 12
C678
1U_0402_6.3V6K
C678
1U_0402_6.3V6K
1 2
R376 0_0402_5%R376 0_0402_5%
1 2
C624 0.1U_0402_16V4ZC624 0.1U_0402_16V4Z
12
R369 0_0805_5%R369 0_0805_5%
1 2
C625 2.2U_0603_6.3V6KC625 2.2U_0603_6.3V6K
12
R375 0_0402_5%R375 0_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCI_AD2825
PCI_AD2725
PCI_AD2625
PCI_AD2525
PCI_AD2425,27
PCI_AD2325
PCI_CLK225
PCI_CLK325
PCI_CLK425
LPC_CLK0_EC25,34
LPC_CLK125
GPIO20026
GPIO19926
HDA_SDOUT26
PCI_CLK125
PCI_AD2925
+VDDIO_AZ +3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW
+3VS+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 STRAPS
Custom
29 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 STRAPS
Custom
29 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
SB710 STRAPS
Custom
29 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
DEBUG STRAPS
PCI_AD25 PCI_AD24
USE EEPROM
PCIE STRAPS
USE DEFAULT
PCIE STRAPS
DEFAULT
DISABLE ILA
AUTORUN
DEFAULT
USE FC PLLUSE PCI
PLL
DEFAULT
BYPASS
FC PLL
PULL
HIGH
DEFAULT
BYPASS
PCI PLL
PCI_AD27 PCI_AD26
PULL
LOW
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
PCI_AD23
GPIO200
PULL
LOW
PULL
HIGH
REQUIRED STRAPS
CLOCKGEN
ENABLE
LCP_CLK1LPC_CLK0
DEFAULT
GPIO199
DEFAULT
Performance
MODE
PCI_CLK1
DEFAULT
FORCE PCIE
GEN1
PCI_CLK2 PCI_CLK3
L,H = LPC ROM (Default L,NC)
H,H = Reserved
H,L = SPI ROM
L,L = FWH ROM
PCI_CLK4AZ_SDOUT
LOW POWER
MODE
ALLOW PCIE
GEN2
WATCHDOG
TIMER
ENABLE
WATCHDOG
TIMER
DISABLE
DEFAULT
USE
DEBUG
STRAP
IGNORE
DEBUG
STRAP
DEFAULT
EC
ENABLE
EC
DISABLE
CLOCKGEN
DISABLE
DISABLE PCI
MEM BOOT
DEFAULT
ENABLE PCI
MEM BOOT
ENABLE ILA
AUTORUN
Inter CLK
Gen Mode
Check Internal PU/PD
check default
Enable
Inter CLK
Gen Mode
Disable
Check AD29,AD28 strap function
DEFAULT DEFAULT
12/08 for Int. CLK Gen
R378
10K_0402_5%
@
R378
10K_0402_5%
@
12
R392
10K_0402_5%
@
R392
10K_0402_5%
@
12
R390
10K_0402_5%
@
R390
10K_0402_5%
@
12
R377
10K_0402_5%
@
R377
10K_0402_5%
@
12
R396
10K_0402_5%
R396
10K_0402_5%
12
R399
2.2K_0402_5%
@
R399
2.2K_0402_5%
@
12
R394
2.2K_0402_5%
@
R394
2.2K_0402_5%
@
12
R380
10K_0402_5%
@
R380
10K_0402_5%
@
12
R385
2.2K_0402_5%
R385
2.2K_0402_5%
12
R384
10K_0402_5%
@
R384
10K_0402_5%
@
12
R391
10K_0402_5%
R391
10K_0402_5%
12
R401
2.2K_0402_5%
@
R401
2.2K_0402_5%
@
12
R397
2.2K_0402_5%
@
R397
2.2K_0402_5%
@
12
R393
2.2K_0402_5%
R393
2.2K_0402_5%
12
R388
10K_0402_5%
R388
10K_0402_5%
12
R387
10K_0402_5%
R387
10K_0402_5%
12
R398
2.2K_0402_5%
@
R398
2.2K_0402_5%
@
12
R382
10K_0402_5%
@
R382
10K_0402_5%
@
12
R381
10K_0402_5%
R381
10K_0402_5%
12
R386
10K_0402_5%
R386
10K_0402_5%
12
R389
10K_0402_5%
R389
10K_0402_5%
12
R400
2.2K_0402_5%
@
R400
2.2K_0402_5%
@
12
R379
10K_0402_5%
@
R379
10K_0402_5%
@
12
R395
10K_0402_5%
R395
10K_0402_5%
12
R383
10K_0402_5%
R383
10K_0402_5%
12
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
SATA_STX_C_DRX_P1
SATA_DTX_SRX_P1
SATA_DTX_SRX_N1
SATA_STX_C_DRX_N1
+5VS_ODD
SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0
+5VS_HDD
+5VSODD_GATE
ODD_EJECT
+5VS_ODD
SATA_STX_DRX_N127
SATA_STX_DRX_P127
SATA_DTX_C_SRX_N127
SATA_DTX_C_SRX_P127
SATA_DTX_C_SRX_N027
SATA_DTX_C_SRX_P027
SATA_STX_DRX_N027
SATA_STX_DRX_P027
ODD_EJECT34
+5VS
+3VS
+5VS
+3VS
+5VS
+VSB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
HDD & ODD Connector
B
30 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
HDD & ODD Connector
B
30 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
HDD & ODD Connector
B
30 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
SATA HDD Conn.
SATA ODD Conn.
<NAV70 use>
ODD conn: SANTA_202801-1_13P-T
11/30 update ODD conn.
SYSTEM determine
OS
virtual BTN
Place caps. near ODD CONN.
80mils
CAP Sense
EJECT BTN
Cap sense ODD_BOT# : LOW
OPEN ODD DOOR
ODD_EJECT# Keep LOW
ODD power turn on
SATA PORT turn on
NO DISK
HAVE DISK
NO ACTION
ODD_EJECT# SET HIGH
ODD power off
SATA PORT turn off
ODD_EJECT# SET LOW
ODD power still ON
SATA PORT turn on
12/02 add ODD EJECT
DVT 0119 update R1054,Q80,Q81 PN
DVT 0131 update Q80,Q81 to SB570020410
DVT 0125 add PD Res.
C662
0.1U_0402_16V4Z
C662
0.1U_0402_16V4Z
1
2
G
D
S
Q81
2N7002-7-F_SOT23
G
D
S
Q81
2N7002-7-F_SOT23
2
13
C639
0.1U_0402_16V4Z
C639
0.1U_0402_16V4Z
1
2
C656 0.01U_0402_16V7KC656 0.01U_0402_16V7K
1 2
G
D
S
Q80
2N7002-7-F_SOT23
G
D
S
Q80
2N7002-7-F_SOT23
2
13
C663
1000P_0402_50V7K
C663
1000P_0402_50V7K
1
2
JODD1
SANTA_202801-1
CONN@
JODD1
SANTA_202801-1
CONN@
GND
1
A+
2
A-
3
GND
4
B-
5
B+
6
GND
7
DP
8
+5V
9
+5V
10
MD
11
GND
12
GND
13 GND 14
GND 15
C650 0.01U_0402_16V7KC650 0.01U_0402_16V7K
1 2
C657 0.01U_0402_16V7KC657 0.01U_0402_16V7K
1 2
R1109
4.7K_0402_5%
R1109
4.7K_0402_5%
12
C658 0.01U_0402_16V7KC658 0.01U_0402_16V7K
1 2
C655
1000P_0402_50V7K
C655
1000P_0402_50V7K
1
2
C659 0.01U_0402_16V7KC659 0.01U_0402_16V7K
1 2
R403 1K_0402_1%@R403 1K_0402_1%@
1 2
C652
10U_0805_10V4Z
C652
10U_0805_10V4Z
1
2
C651 0.01U_0402_16V7KC651 0.01U_0402_16V7K
1 2
C648 0.01U_0402_16V7KC648 0.01U_0402_16V7K
1 2
S
G
D
Q79
SI3456BDV-T1-E3_TSOP6
S
G
D
Q79
SI3456BDV-T1-E3_TSOP6
3
6
2
4 5
1
C660
10U_0805_10V4Z
C660
10U_0805_10V4Z
1
2
R1054
200K_0402_5%
R1054
200K_0402_5%
12
JHDD1
SANTA_192301-1
CONN@
JHDD1
SANTA_192301-1
CONN@
GND
1
A+
2
A-
3
GND
4
B-
5
B+
6
GND
7
V33
8
V33
9
V33
10
GND
11
GND
12
GND
13
V5
14
V5
15
V5
16
GND
17
Reserved
18
GND
19
V12
20
V12
21
V12
22 GND 23
GND 24
C661
1U_0402_6.3V6K
C661
1U_0402_6.3V6K
1
2
C654
0.1U_0402_16V4Z
C654
0.1U_0402_16V4Z
1
2
R1055
470_0603_5%
R1055
470_0603_5%
1 2
R404 0_0805_5%@R404 0_0805_5%@
1 2
C1246
0.1U_0402_16V4Z
C1246
0.1U_0402_16V4Z
1
2
C653
1U_0402_6.3V6K
C653
1U_0402_6.3V6K
1
2
R405 0_0805_5%R405 0_0805_5%
1 2
C649 0.01U_0402_16V7KC649 0.01U_0402_16V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDWE#_SDCD#
XDWP#
XDD0_SDCLK_MSD2
XDD1_MSD0
5IN1_LED#
XDD2_SDCMD
XDD3
XDD4_SDD3_MSD1
XDD5_SDD2
XDD6_MSBS
XD_D7
RREF
+CARDPWR
VREG
+3VS_CR
XD_CD#
XDDRY_SDWP_MSCLK
XDRE#_MSINS#
XDCE#_SDD1
XDCLE_SDD0
XDALE_MSD3
CLK_SD_48M_R
5IN1_LED#
XDD0_SDCLK_MSD2
XDD2_SDCMD
XDD1_MSD0
XDD3
XDD4_SDD3_MSD1
XDD5_SDD2
XD_D7
XDD6_MSBS
XDWE#_SDCD#
XDCE#_SDD1
XDCLE_SDD0
XDWP#
XDDRY_SDWP_MSCLK
XD_CD#
XDALE_MSD3
XDRE#_MSINS#
XDCLE_SDD0
XDCE#_SDD1
XDD5_SDD2
XDD0_SDCLK_MSD2
XDD4_SDD3_MSD1
XDD2_SDCMD
XDDRY_SDWP_MSCLK
XDWE#_SDCD#
XDD4_SDD3_MSD1
XDD1_MSD0
XDD0_SDCLK_MSD2
XDALE_MSD3
XDD6_MSBS
XDDRY_SDWP_MSCLK
XDRE#_MSINS#
XDDRY_SDWP_MSCLK
XDD0_SDCLK_MSD2
CLK_SD_48M_R
CLK_SD_48M 25
USB20_N626
USB20_P626
5IN1_LED# 35
+3VS +3VS_CR
+XDPWR_SDPWR_MSPWR
+3VS
+XDPWR_SDPWR_MSPWR+CARDPWR
+XDPWR_SDPWR_MSPWR+XDPWR_SDPWR_MSPWR
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NELA5 LA-6141P
1.0
USB CardReader&CONN
Custom
31 54Wednesday, April 21, 2010
2007/08/28 2006/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NELA5 LA-6141P
1.0
USB CardReader&CONN
Custom
31 54Wednesday, April 21, 2010
2007/08/28 2006/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
NELA5 LA-6141P
1.0
USB CardReader&CONN
Custom
31 54Wednesday, April 21, 2010
2007/08/28 2006/10/06
Compal Electronics, Inc.
Share Pin
Card Reader Connector
SP14
SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6
SP5
SP4
SP3
SP2
SP1
XD_CD#
XD_RDY
XD_RE#
XD_CE#
XD_CLE
XD_ALE
XD_WE#
XD_WP
XD_D0
XD_D2
XD_D1
XD_D3
XD_D4
XD_D6
XD_D5
SD_WP
SD_D1
SD_D0
SD_CD#
SD_CLK
SD_CMD
SD_D3
MS_CLK
MS_INS#
MS_D3
MS_D1
MS_D2
MS_D0
MS_BS
XD_D7
SD_D2
XD SD MS
RTS5138
C6, C7 close to connector
Card Reader Connector
30mil
12mil
10mil
30mil
30mil30mil
12/02 add net CLK_SD_48M_R
12/14 add close to JREAD1.22
12/15 update for EMI
close to JREAD1.17
EMI reserve
12/15 for EMI request
12/15 UPDATE
12/14 C1241 close to JREAD1.11
C1242 close to JREAD1.18
12/15 update for EMI
close to JREAD1.9
C1241
0.1U_0402_16V4Z
C1241
0.1U_0402_16V4Z
1
2
C1251
0.1U_0402_16V4Z
C1251
0.1U_0402_16V4Z
1
2
R1046 0_0805_5%R1046 0_0805_5%
1 2
C1240
0.1U_0402_16V4Z
C1240
0.1U_0402_16V4Z
1
2
U903
RTS5138-GR_QFN24_4X4
U903
RTS5138-GR_QFN24_4X4
REFE
1
DM
2
DP
3
3V3_IN
4
CARD_3V3
5
V18
6
XD_CD#
7
SP1
8
SP2
9
SP3
10
SP4
11
SP5
12 SP6 13
SP7 14
SP8 15
SP9 16
GPIO0 17
SP10 18
SP11 19
SP12 20
SP13 21
SP14 22
XD_D7 23
CLK_IN 24
EPAD
25
C1238
1U_0402_6.3V6K
C1238
1U_0402_6.3V6K
1
2
R1048
0_0402_5%@
R1048
0_0402_5%@
12
C1237 100P_0402_50V8JC1237 100P_0402_50V8J
12
C1239
4.7U_0805_10V4Z
C1239
4.7U_0805_10V4Z
1
2
R1045
0_0402_5%
R1045
0_0402_5%
12
R1047
100K_0402_5%
@
R1047
100K_0402_5%
@
1 2
JREAD1
T-SOL_144-1300302600_NR
CONN@
JREAD1
T-SOL_144-1300302600_NR
CONN@
XD08-WP
32
XD14-D4
26
MS7-DATA3 15
MS4-DATA0 10
SD9-DAT2 21
SD7-DAT0 4
SD2-CMD 16
MS3-DATA1 8
XD16-D6
24 SD1-DAT3 19
SD8-DAT1 3
XD06-ALE
34
XD10-D0
30
SD5-CLK 9
XD12-D2
28
MS6-INS 14
MS5-DATA2 12
MS8-SCLK 17
XD03-RE
37
MS2-BS 7
XD15-D5
25
XD17-D7
23
XD11-D1
29
XD04-CE
36
XD02-R/B
38
XD13-D3
27
XD07-WE
33
MS9-VCC 18
XD GND
31
XD05-CLE
35
XD GND
40
SD4-VDD 11
XD-VCC
22
XD01-CD
39
SD-CD 1
SD-WP 2
SD CD/W P GND
41
SD CD/W P GND
42 MS10-VSS 20
MS1-VSS 5
SD3-VSS 13
SD6-VSS 6
R1049
0_0402_5%@
R1049
0_0402_5%@
12
R1042 10K_0402_5%
@
R1042 10K_0402_5%
@
1 2
R1086
10_0402_5%
@
R1086
10_0402_5%
@
12
C1242
0.1U_0402_16V4Z
C1242
0.1U_0402_16V4Z
1
2
R1044
6.2K_0603_1%
R1044
6.2K_0603_1%
1 2
C1244
10P_0402_50V8J
@
C1244
10P_0402_50V8J
@
12
C1252
10P_0402_50V8J
@
C1252
10P_0402_50V8J
@
1
2
C1243
0.1U_0402_16V4Z
C1243
0.1U_0402_16V4Z
1
2
R1043 0_0805_5%R1043 0_0805_5%
1 2
C1245
10P_0402_50V8J
@
C1245
10P_0402_50V8J
@
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
WL_OFF#
PLT_RST#
SB_PCIE_WAKE#
E51RXD_P80CLK
E51TXD_P80DATA_R
3VS_MINI
3VS_MINI
+3V_WLAN
MINI1_SMBCLK
MINI1_SMBDAT
WIMAX_LED#
WLAN_LED# MINI1_LED#
PCIE_PTX_C_IRX_N112
PCIE_PTX_C_IRX_P112
PCIE_ITX_C_PRX_P112
PCIE_ITX_C_PRX_N112
SB_PCIE_WAKE#26,33
CLK_PCIE_MINI1#25
CLK_PCIE_MINI125
PLT_RST# 16,25,33
WL_OFF# 34
E51RXD_P80CLK34
USB20_N8 26
MINI1_LED# 35
USB20_P8 26
MINI1_CLKREQ#25
E51TXD_P80DATA34
SB_SMDAT0 10,11,26
SB_SMCLK0 10,11,26
+1.5VS
+3VS
+3VS
+1.5VS
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
MINI CARD (WLAN) / FP / Ext USB
B
32 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
MINI CARD (WLAN) / FP / Ext USB
B
32 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
MINI CARD (WLAN) / FP / Ext USB
B
32 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Power
Mini Card Power Rating
+3VS
+3V
+1.5VS
Primary Power (mA)
Peak Normal
1000
330
500
750
250
375
Auxiliary Power (mA)
Normal
250 (wake enable)
5 (Not wake enable)
(MINI1_LED#)
(9~16mA)
Mini-Express Card for WLAN
11/09 FOR WiMax/Wlan LED request
HAT00_MINI
SP01000I200
ACES_88913-5204_52P
11/28 update MINI conn.
11/30 update MINI footprint
DVT 0126 add PD Res(For EC)
PVT 20100310 Add Res.
PVT 20100312 connect to pin39,41
C708
4.7U_0805_10V4Z
C708
4.7U_0805_10V4Z
1
2
JMINI1
ACES_88913-5204
CONN@
JMINI1
ACES_88913-5204
CONN@
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
45
45 46 46
47
47 48 48
49
49 50 50
51
51 52 52
GND1
53 GND2 54
R1129 0_0603_5%R1129 0_0603_5%
1 2
C707
0.1U_0402_16V4Z
C707
0.1U_0402_16V4Z
1
2
C710
0.1U_0402_16V4Z
C710
0.1U_0402_16V4Z
1
2
R440 0_0402_5%@R440 0_0402_5%@
1 2
C709
0.1U_0402_16V4Z
C709
0.1U_0402_16V4Z
1
2
R441 0_0603_5%R441 0_0603_5%
1 2
R445
0_0402_5%
R445
0_0402_5%
1 2
C705
4.7U_0805_10V4Z
C705
4.7U_0805_10V4Z
1
2
R444 0_0603_5%
@
R444 0_0603_5%
@
1 2
D47
CHP202UPT_SOT323-3
D47
CHP202UPT_SOT323-3
2
3
1
C706
0.1U_0402_16V4Z
C706
0.1U_0402_16V4Z
1
2
R442 0_0603_5%@R442 0_0603_5%@
1 2
R1113
100K_0402_5%
R1113
100K_0402_5%
12
R443 0_0603_5%
@
R443 0_0603_5%
@
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+USB_VCCA
USB20_P0_R
USB20_P0
USB20_N0
USB20_N0_R
CLK_48M_LAN_R
SYSON#
USB20_P3
USB20_N3
USB20_P2
USB20_N2
USB20_N1
USB20_P1
USB20_N0_R
USB20_P0_R
BT_ON#34
USB_OC#0 26
SYSON#40 USB20_N026
USB20_P026
USB20_N14 26
USB20_P14 26
EC_PME# 34
LAN_CLKREQ# 26
PLT_RST# 16,25,32 SB_PCIE_WAKE# 26,32
CLK_48M_LAN 26
USB20_P2 26
USB20_N2 26
USB20_N1 26
USB20_P1 26
USB20_P3 26
USB20_N3 26
PCIE_PTX_C_IRX_N0 12
PCIE_PTX_C_IRX_P0 12
CLK_PCIE_LAN 25
CLK_PCIE_LAN# 25
PCIE_ITX_C_PRX_N0 12
PCIE_ITX_C_PRX_P0 12
+3VS
+BT_VCC
+3VALW
+USB_VCCA
+5VALW
+3VALW +USB_VCCA
+USB_VCCA
+BT_VCC
+3VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
BlueTooth / Int USB x2 /eSATA
B
33 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
BlueTooth / Int USB x2 /eSATA
B
33 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
BlueTooth / Int USB x2 /eSATA
B
33 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
W=40mils
80mil
W=80mils
To USB/B Connector
<NAL00 use>
SVPE, 4.4m, 17mohm
Bluetooth Conn.
11/05 remove Card Reader/B,3G/B,3G power,JUSB2 power switch(it will be build on JUSB2/B) ,
change JUSB2 conn. for NELA1 , add SB USB20_P/N3 for External USB port
CONFIRM LAN CON.
LAN CONN.
11/12 add Lan conn. 11/20 update pin Def.
11/28 check conn. OK
(same as NAL00)
NAL00-USB
DVT 0119 update BT conn.
12/01 update conn. footprint
12/02 add net name on JLAN1.13 (CLK_48M_LAN_R)
12/15 swap net
PVT 20100310 add Cap. for EMI request
12/02 update C711 capa.
12/02 reverse USB signal
DVT 0131 change D10 to SC300000B00
12/02 change USB pwr sw
DVT 0121 update Q24 to SB934130020
DVT 0131 change Q25 to SB570020410
C1269
0.1U_0402_16V4Z
C1269
0.1U_0402_16V4Z
1
2
R448 0_0402_5%@R448 0_0402_5%@
1 2
C721
4.7U_0805_10V4Z
BT@C721
4.7U_0805_10V4Z
BT@
1
2
R447 10K_0402_5%R447 10K_0402_5%
1 2
D10
CM1293-04SO_SOT23-6
D10
CM1293-04SO_SOT23-6
CH3
6
Vp
5
CH4
4
CH2 3
Vn 2
CH1 1
R454
300_0603_5%
BT@
R454
300_0603_5%
BT@
12
G
D
S
Q24
AO3413_SOT23-3
BT@
G
D
S
Q24
AO3413_SOT23-3
BT@
2
1 3
L83
WCM2012F2S-900T04_0805
L83
WCM2012F2S-900T04_0805
1
122
33
4
4
C1270
0.1U_0402_16V4Z
@
C1270
0.1U_0402_16V4Z
@
1
2
JUSB2
ACES_85201-1605N
CONN@
JUSB2
ACES_85201-1605N
CONN@
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
GND
17
GND
18
13 13
14 14
15 15
16 16
JBT1
ACES_87213-0400G
CONN@
JBT1
ACES_87213-0400G
CONN@
11
22
33
44
GND
5
GND
6
R453 10K_0402_5%
BT@
R453 10K_0402_5%
BT@
1 2
U24
RT9715BGS_SO8
U24
RT9715BGS_SO8
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
C1268
0.1U_0402_16V4Z
C1268
0.1U_0402_16V4Z
1
2
C714
0.1U_0402_16V4Z
C714
0.1U_0402_16V4Z
1
2
JLAN1
ACES_88460-1601
CONN@
JLAN1
ACES_88460-1601
CONN@
11
22
33
44
55
66
77
88
99
10 10
G2
18
G1
17
11 11
12 12
13 13
14 14
15 15
16 16
C719
1U_0402_6.3V6K
BT@
C719
1U_0402_6.3V6K
BT@
1
2
C713
4.7U_0805_10V4Z
C713
4.7U_0805_10V4Z
1
2
C722
0.1U_0402_16V4Z
BT@C722
0.1U_0402_16V4Z
BT@
R1002
0_0402_5%
@R1002
0_0402_5%
@
1 2
C720
0.1U_0402_16V4Z
BT@
C720
0.1U_0402_16V4Z
BT@
G
D
S
Q25
2N7002-7-F_SOT23
BT@
G
D
S
Q25
2N7002-7-F_SOT23
BT@
2
13
+
C711
150U_B2_6.3VM_R35M
+
C711
150U_B2_6.3VM_R35M
1
2
C712
470P_0402_50V7K
C712
470P_0402_50V7K
1
2
JUSB1
SUYIN_020133MB004S580ZL-C
CONN@
JUSB1
SUYIN_020133MB004S580ZL-C
CONN@
1
1
2
2
3
3
4
4
GND
5
GND
6
GND
7
GND
8
R446
100K_0402_5%
R446
100K_0402_5%
12
R1036 0_0402_5%@R1036 0_0402_5%@
1 2
R1037 0_0402_5%R1037 0_0402_5%
1 2
C718
0.1U_0402_16V4Z
BT@
C718
0.1U_0402_16V4Z
BT@
R451 0_0402_5%@R451 0_0402_5%@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
E51RXD_P80CLK
E51TXD_P80DATA
AD_BID0
KSI1
KSI6
KSI5
KSI7
KSO1
KSO0
KSO2
KSO4
KSO3
KSO5
KSO6
KSO7
KSO8
KSO12
KSO10
KSO13
KSO11
KSO9
KSO15
KSO14
KSI2
KSI0
KSI3
KSI4
EC_CRY2
EC_CRY1
LPC_AD0
LPC_AD1
SERIRQ
LPC_AD3
LPC_AD2
LPC_FRAME#
LPC_CLK0_EC
TP_DATA
TP_CLK
EC_SMB_DA2
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
BEEP#
BKOFF#
EC_SMI#
EC_SCI#
EC_LID_OUT#
ON/OFF
PM_SLP_S3#
ACIN
PM_SLP_S5#
EC_ON
IREF
EC_PWROK
VR_ON
SYSON
BT_ON#
EC_SWI#
EC_GA20
EC_KBRST#
AD_BID0
ECAGND
BATT_TEMP
EC_RSMRST#
FAN_SPEED1
BATT_BLUE_LED#
BATT_AMB_LED#
E51RXD_P80CLK
E51TXD_P80DATA
+EC_VCCA
ECAGND
ECAGND
KSO16
EC_SPICLK_L
KSO17
WL_OFF#
ACOFF
ADP_I
3S/4S#
EAPD
EC_MUTE#
PWR_LED
VLDT_EN
65W/90W#
3S/4S#
65W/90W#
ACIN
BATT_TEMP
PBTN_OUT#
SUSP#
CALIBRATE#
VGATE
EC_THERM#
VR_ON
EC_SMB_DA1
EC_SMB_CK1
AD_PID0
LID_SW#
EC_PME#
ENBKL
KSO1
KSO2
LID_SW#
KSI[0..7]
KSO[0..17]
EC_CRY1 EC_CRY2
EC_PME#
ENBKL
EC_PWROK
EC_INVT_PWM
AD_PID0
EC_SPICLK_L
TP_DATA
TP_CLK
EC_ESB_CK_R
EC_ESB_DA_R
EC_ESB_INT
FANPWM
ODD_EJECT
SATA_IS1#
SATA_IS1#
VGA_DBCLK
PWR_SUSP_LED
TP_PWM
LOCAL_DIM
EC_ESB_CK_R
EC_ESB_DA_R
INT_VGAPWR_ON
EC_ACIN
COLOR_ENG_EN
EC_ESB_INT
KB926_ID
COLOR_ENG_EN
LOCAL_DIM
KB926_ID
A_RST#
VGA_PWR_ON
BUS_SEL#
EC_SMB_DA2
EC_SMB_CK2
LPC_FRAME#25
LPC_AD225
LPC_AD025
LPC_AD325
LPC_AD125
SERIRQ25
A_RST#13,15,25
LPC_CLK0_EC25,29
TP_DATA 35
TP_CLK 35
EC_SMB_DA142
EC_SMB_CK28,17
EC_SMB_DA28,17
EC_SMB_CK142
BEEP# 37
FSTCHG 44
EC_SMI#26
BKOFF# 22
EC_SCI#26
EC_ON 36
ON/OFF36
PM_SLP_S3#26
PM_SLP_S5#26 EC_LID_OUT# 26
ACIN 17,41
IREF 44
VR_ON 50
SYSON 40,45
BT_ON#33
EC_SWI# 26
EC_KBRST#26
EC_GA2026
BATT_TEMP 42
EC_RSMRST# 26
FAN_SPEED139
E51RXD_P80CLK 32
E51TXD_P80DATA 32
WL_OFF# 32
EC_SPICS#/FSEL# 35
EC_SO_SPI_SI 35
EC_SI_SPI_SO 35
ACOFF 44,47
ADP_I 44
3S/4S# 44
EAPD 37
EC_MUTE# 37
PWR_LED 35
VLDT_EN 40,46
65W/90W# 44
PBTN_OUT# 26
SUSP# 40,44,48
CALIBRATE# 44
EC_THERM# 27
LID_SW# 35
EC_PME# 33
KSI[0..7] 35
KSO[0..17] 35
ENBKL 13,22
SB_PWRGD 8,13,26
EC_INVT_PWM22
VGATE 50
BATT_BLUE_LED# 35
BATT_AMB_LED# 35
EC_SPICLK 35
PWR_SAVE_LED# 35
FANPWM 39
ODD_EJECT30
SATA_IS1#26
VGA_DBCLK 17
PWR_SUSP_LED 35
TP_PWM35
LOCAL_DIM 22
EC_ESB_CK35
EC_ESB_DA35
INT_VGAPWR_ON 36
EC_ACIN 17
COLOR_ENG_EN22
EC_ESB_INT 35
EC_ESB_RST 35
VGA_PWR_ON 36,40,48,49
BUS_SEL# 22,24
+3VALW
+3VS
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+5VS
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
EC ENE KB926
B
34 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
EC ENE KB926
B
34 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
EC ENE KB926
B
34 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
For EC Tools
Ra
Rb
20mil
Place on MiniCard door
Analog Board ID definition
KB926 Rev:E0(SA00001J5A0)
Ra
Rb
Analog Project ID definition
Delay SUSP# 10ms
For Panel INV_PWM high
resolution request
Reserve for EMI, close to EC
12/02 for odd eject
11/06 add GPIO for Power save function
11/10 Remove WWAN_OFF#
12/08 add EC_ACIN
different to NEW75
11/20 For AL8131L
11/20 add EC_ESB_RST
to cap. sensor
12/12 REMOVE VGA_ON
PVT 2010 add net for PWM
11/26 remove BATT_OVP for PWR request
11/30 add net for LVDS
12/10 update net name
12/01 add FANPWM for FAN
PVT 20100309 add net for PWM
12/01 remove EN_DFAN1
12/02 add ODD_EJECT
11/06 for cap sensor
12/08 move PWR_SUSP_LED
12/07 add VGA_DBCLK
12/03 add TP_PWM
11/30 add INT_VGAPWR_ON net
High : D3
Low : E0
EC Version control
12/10 add EC id
DVT 0131 update EC version
12/10 for low PWR panel
12/10 add EC ID
DVT 0121
reserve Cap.(EMI request)
close to EC
DVT 0125
reserve Res.
DVT 0125 update Board ID
Pre MP 0406 update Board ID
DVT 0131 update EC to E0
Pre MP for EMI request
change to SM01000CP00
R471 2.2K_0402_5%R471 2.2K_0402_5%
1 2
JP7
ACES_85205-0400
@
JP7
ACES_85205-0400
@
11
22
33
44
R428 10K_0402_5%@R428 10K_0402_5%@
1 2
C734
0.1U_0402_16V4Z
C734
0.1U_0402_16V4Z
1
2
C739
15P_0402_50V8J
C739
15P_0402_50V8J
1
2
R465 4.7K_0402_5%R465 4.7K_0402_5%
1 2
R1056 4.7K_0402_5%R1056 4.7K_0402_5%
1 2
C736
4.7U_0805_10V4Z
C736
4.7U_0805_10V4Z
1
2
R461 33_0402_5%
@
R461 33_0402_5%
@
12
R472 2.2K_0402_5%R472 2.2K_0402_5%
1 2
R463
100K_0402_5%
@
R463
100K_0402_5%
@
1 2
R467 2.2K_0402_5%R467 2.2K_0402_5%
1 2
R475 100K_0402_5%R475 100K_0402_5%
12
R1085 100K_0402_5%R1085 100K_0402_5%
1 2
R468 2.2K_0402_5%R468 2.2K_0402_5%
1 2
R460 4.7K_0402_5%R460 4.7K_0402_5%
1 2
R470
56K_0402_5%
R470
56K_0402_5%
12
R1110 0_0402_5%VGA@R1110 0_0402_5%VGA@
12
R419 0_0402_5%R419 0_0402_5%
1 2
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
U26
KB926QFE0_LQFP128_14X14
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
U26
KB926QFE0_LQFP128_14X14
GA20/GPIO00
1
KBRST#/GPIO01
2
SERIRQ#
3
LFRAME#
4
LAD3
5
PM_SLP_S3#/GPIO04
6
LAD2
7
LAD1
8
VCC 9
LAD0
10
GND
11
PCICLK
12
PCIRST#/GPIO05
13
PM_SLP_S5#/GPIO07
14
EC_SMI#/GPIO08
15
LID_SW#/GPIO0A
16
SUSP#/GPIO0B
17
PBTN_OUT#/GPIO0C
18
EC_PME#/GPIO0D
19
SCI#/GPIO0E
20
INVT_PWM/PWM1/GPIO0F 21
VCC 22
BEEP#/PWM2/GPIO10 23
GND
24
EC_THERM#/GPIO11
25
FANPWM1/GPIO12 26
ACOFF/FANPWM2/GPIO13 27
FAN_SPEED1/FANFB1/GPIO14
28
FANFB2/GPIO15
29
EC_TX/GPIO16
30
EC_RX/GPIO17
31
ON_OFF/GPIO18
32
VCC 33
PWR_LED#/GPIO19
34
GND
35
NUMLED#/GPIO1A
36
ECRST#
37
CLKRUN#/GPIO1D
38
KSO0/GPIO20
39
KSO1/GPIO21
40
KSO2/GPIO22
41
KSO3/GPIO23
42
KSO4/GPIO24
43
KSO5/GPIO25
44
KSO6/GPIO26
45
KSO7/GPIO27
46
KSO8/GPIO28
47
KSO9/GPIO29
48
KSO10/GPIO2A
49
KSO11/GPIO2B
50
KSO12/GPIO2C
51
KSO13/GPIO2D
52
KSO14/GPIO2E
53
KSO15/GPIO2F
54
KSI0/GPIO30
55
KSI1/GPIO31
56
KSI2/GPIO32
57
KSI3/GPIO33
58
KSI4/GPIO34
59
KSI5/GPIO35
60
KSI6/GPIO36
61
KSI7/GPIO37
62
BATT_TEMP/AD0/GPIO38 63
BATT_OVP/AD1/GPIO39 64
ADP_I/AD2/GPIO3A 65
AD3/GPIO3B 66
AVCC 67
DAC_BRIG/DA0/GPIO3C 68
AGND
69
EN_DFAN1/DA1/GPIO3D 70
IREF/DA2/GPIO3E 71
DA3/GPIO3F 72
CIR_RX/GPIO40 73
CIR_RLC_TX/GPIO41 74
AD4/GPIO42 75
SELIO2#/AD5/GPIO43 76
SCL1/GPIO44
77
SDA1/GPIO45
78
SCL2/GPIO46
79
SDA2/GPIO47
80
KSO16/GPIO48
81
KSO17/GPIO49
82
PSCLK1/GPIO4A 83
PSDAT1/GPIO4B 84
PSCLK2/GPIO4C 85
PSDAT2/GPIO4D 86
TP_CLK/PSCLK3/GPIO4E 87
TP_DATA/PSDAT3/GPIO4F 88
FSTCHG/SELIO#/GPIO50 89
BATT_CHGI_LED#/GPIO52 90
CAPS_LED#/GPIO53 91
BATT_LOW_LED#/GPIO54 92
SUSP_LED#/GPIO55 93
GND
94
SYSON/GPIO56 95
VCC 96
SDICS#/GPXOA00 97
SDICLK/GPXOA01 98
SDIDO/GPXOA02 99
EC_RSMRST#/GPXO03 100
EC_LID_OUT#/GPXO04 101
EC_ON/GPXO05 102
EC_SWI#/GPXO06 103
ICH_PWROK/GPXO06 104
BKOFF#/GPXO08 105
WL_OFF#/GPXO09 106
GPXO10 107
GPXO11 108
SDIDI/GPXID0 109
PM_SLP_S4#/GPXID1 110
VCC 111
ENBKL/GPXID2 112
GND
113
GPXID3 114
GPXID4 115
GPXID5 116
GPXID6 117
GPXID7 118
SPIDI/RD# 119
SPIDO/WR# 120
VR_ON/XCLK32K/GPIO57 121
XCLK1
122
XCLK0
123 V18R 124
VCC 125
SPICLK/GPIO58 126
AC_IN/GPIO59 127
SPICS# 128
C731 0.01U_0402_16V7KC731 0.01U_0402_16V7K
12
C737 100P_0402_50V8JC737 100P_0402_50V8J
12
L84
BLM18AG601SN1D_2P
L84
BLM18AG601SN1D_2P
1 2
C1262 470P_0402_50V7K
@
C1262 470P_0402_50V7K
@
12
R1084 100K_0402_5%@R1084 100K_0402_5%@
12
C726
0.1U_0402_16V4Z
C726
0.1U_0402_16V4Z
1
2
C725
0.1U_0402_16V4Z
C725
0.1U_0402_16V4Z
1
2
C741 100P_0402_50V8JC741 100P_0402_50V8J
12
R473 47K_0402_5%R473 47K_0402_5%
1 2
R474 47K_0402_5%R474 47K_0402_5%
1 2
R959 2.2K_0402_5%R959 2.2K_0402_5%
1 2
R476 10K_0402_5%R476 10K_0402_5%
1 2
R488 100K_0402_5%R488 100K_0402_5%
12
R1083 100K_0402_5%R1083 100K_0402_5%
12
L85
BLM18AG601SN1D_2P
L85
BLM18AG601SN1D_2P
12
R459 100K_0402_5%R459 100K_0402_5%
12
R1138 2.2K_0402_5%@R1138 2.2K_0402_5%@
1 2
R462 47K_0402_5%R462 47K_0402_5%
12
C783 33P_0402_50V8K
@
C783 33P_0402_50V8K
@
R961 FBMA-11-100505-801T 0402R961 FBMA-11-100505-801T 0402
12
R958 4.7K_0402_5%R958 4.7K_0402_5%
1 2
C727
0.1U_0402_16V4Z
C727
0.1U_0402_16V4Z
1
2
R1137
2.2K_0402_5%@
R1137
2.2K_0402_5%@
1 2
C733 0.1U_0402_16V4ZC733 0.1U_0402_16V4Z
12
C729
1000P_0402_50V7K
C729
1000P_0402_50V7K
1
2
R957 4.7K_0402_5%R957 4.7K_0402_5%
1 2
C1181
15P_0402_50V8J
C1181
15P_0402_50V8J
12
R469
100K_0402_5%
R469
100K_0402_5%
1 2
R254 0_0402_5%R254 0_0402_5%
1 2
R464
100K_0402_5%
R464
100K_0402_5%
1 2
C735
0.1U_0402_16V4Z
C735
0.1U_0402_16V4Z
1
2
R466 4.7K_0402_5%R466 4.7K_0402_5%
1 2
C730
0.1U_0402_16V4Z
C730
0.1U_0402_16V4Z
1
2
R1082 100K_0402_5%R1082 100K_0402_5%
12
X1
32.768KHZ_12.5PF_Q13MC14610002
X1
32.768KHZ_12.5PF_Q13MC14610002
OSC 4
OSC 1
NC
3
NC
2
C732
22P_0402_50V8J@
C732
22P_0402_50V8J@
12
C724
0.1U_0402_16V4Z
C724
0.1U_0402_16V4Z
1
2
C740
15P_0402_50V8J
C740
15P_0402_50V8J
1
2
R960 FBMA-11-100505-801T 0402R960 FBMA-11-100505-801T 0402
12
R458 100K_0402_5%R458 100K_0402_5%
12
C728
1000P_0402_50V7K
C728
1000P_0402_50V7K
1
2
SPI_WP#
EC_SO_SPI_SI_R
+SPI_VCC
EC_SI_SPI_SO_R
EC_SPICLK_R
SPI_HOLD#
EC_SPICS#/FSEL#
EC_SO_SPI_SI_R
EC_SI_SPI_SO_R
EC_SPICLK_RSPI_WP#
SPI_HOLD#
EC_SPICS#/FSEL# +SPI_VCC
KSO[0..17]
KSI[0..7]
KSO16
KSO17
KSI3
KSO8
KSI2
KSO9
KSO14
KSO15
KSO13
KSO12
KSI0
KSO10
KSI1
KSO11
KSI6
KSI7
KSI5
KSO0
KSO5
KSO7
KSO4
KSO6
KSO3
KSI4
KSO2
KSO1
PWR_LED#
PWR_SUSP_LED#
MEDIA_LED#
ON/OFFBTN#
LID_SW#
PWR_LED#
PWR_SUSP_LED#
MEDIA_LED#
TP_CLK
TP_DATA
PWR_SAVE_LED#
KSI2
KSO0
KSI1
MINI1_LED#
KSI1
KSI6
KSI5
KSI7
KSO1
KSO0
KSO2
KSO4
KSO3
KSO5
KSO6
KSO7
KSO8
KSO12
KSO10
KSO13
KSO11
KSO9
KSO15
KSO14
KSI2
KSI0
KSI3
KSI4
KSO16
KSO17
BATT_BLUE_LED#
BATT_AMB_LED#
BATT_AMB_LED#
BATT_BLUE_LED#
BATT_AMB_LED#
BATT_BLUE_LED#
BATT_AMB_LED#
BATT_BLUE_LED#
EC_SPICS#/FSEL#34
EC_SPICLK 34
EC_SO_SPI_SI 34
EC_SI_SPI_SO 34
KSO[0..17] 34
KSI[0..7] 34
PWR_LED34
PWR_SUSP_LED34
5IN1_LED# 31
SATA_LED# 27
EC_ESB_RST 34
ON/OFFBTN# 36
LID_SW# 34
EC_ESB_INT 34
EC_ESB_CK 34
EC_ESB_DA 34
TP_DATA 34
TP_CLK 34
TP_PWM 34
PWR_SAVE_LED# 34
MINI1_LED# 32
BATT_BLUE_LED# 34
BATT_AMB_LED# 34
+3VALW
+3VALW
+3VS
+3VS
+3VALW
+3VS
+3VS
+3VS +5VS
+5VS +3VS
+3VS
+3VALW
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
BIOS, I/O Port & K/B Connector
B
35 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
BIOS, I/O Port & K/B Connector
B
35 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
BIOS, I/O Port & K/B Connector
B
35 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
(Left)
(Right)
LED/B LEFT PWR/B RIGHT
PWR SAVE BTN
KSI4
WLAN BTNKSI2
KSI3
KSO0
KSI1
11/05 add JLED1/JBTN1 for NELA1
remove JLED1 conn. pin4(Danube w/o 3G)
11/20 update conn. def.
(ODD_LED#/EC_ESB_RST)
12/03 add led for project id
KALH0_TP
SP01000LB00
ACES_85201-0605N_6P
11/28 update JTP1 Conn.
(change to KALH0 6p conn.)
11/30 update pcb footprint
DVT 0125 Resever JTP1
PVT 0310 Resever JTP1
12/03 update TP schematic,JTP1 same as NELA0
JALA0-I/O 12P
11/28 update JLED1/JBTN1 Conn.
(change to JALA0 12p conn.)
12/03 update net for project id
12/07 invert
KB pin
11/05 check PWR/B and MB side led qty
12/11 update LED (follow LED SPEC)
DVT 0126 update LED part
DVT 0131 update Blue LED
resistor to 100 Ohm
PVT 20100310 add Cap.
UD
NB
LED2
HT-210UD5/NB5 1206 AMBER/BLUE
UD
NB
LED2
HT-210UD5/NB5 1206 AMBER/BLUE
1
3
2
C770 100P_0402_50V8JC770 100P_0402_50V8J
1 2
C772 100P_0402_50V8JC772 100P_0402_50V8J
1 2
C751 100P_0402_50V8JC751 100P_0402_50V8J
1 2
UD
NB
LED4
HT-210UD5/NB5 1206 AMBER/BLUE
UD
NB
LED4
HT-210UD5/NB5 1206 AMBER/BLUE
1
3
2
R1115 100_0402_5%R1115 100_0402_5%
1 2
UD
NB
LED3
HT-210UD5/NB5 1206 AMBER/BLUE
UD
NB
LED3
HT-210UD5/NB5 1206 AMBER/BLUE
1
3
2
Q26A
DMN66D0LDW-7_SOT363-6
Q26A
DMN66D0LDW-7_SOT363-6
61
2
R481 0_0402_5%R481 0_0402_5%
1 2
R1039 0_0402_5%R1039 0_0402_5%
1 2
C756 100P_0402_50V8JC756 100P_0402_50V8J
1 2
Q26B
DMN66D0LDW-7_SOT363-6
Q26B
DMN66D0LDW-7_SOT363-6
3
5
4
C745
0.1U_0402_16V4Z
C745
0.1U_0402_16V4Z
C769 100P_0402_50V8JC769 100P_0402_50V8J
1 2
C758 100P_0402_50V8JC758 100P_0402_50V8J
1 2
C750 100P_0402_50V8JC750 100P_0402_50V8J
1 2
R1040 0_0402_5%R1040 0_0402_5%
1 2
C761 100P_0402_50V8JC761 100P_0402_50V8J
1 2
R1117 100_0402_5%R1117 100_0402_5%
1 2
C766 100P_0402_50V8JC766 100P_0402_50V8J
1 2
JTP1
ACES_85201-0605N
CONN@
JTP1
ACES_85201-0605N
CONN@
11
22
33
44
55
66
GND
7GND
8
R479 0_0603_5%R479 0_0603_5%
1 2
R487
100K_0402_5%
R487
100K_0402_5%
1 2
C757 100P_0402_50V8JC757 100P_0402_50V8J
1 2
R1041 0_0402_5%R1041 0_0402_5%
1 2
R477 100_0402_5%R477 100_0402_5%
1 2
C747 100P_0402_50V8JC747 100P_0402_50V8J
1 2
D13
PJDLC05C_SOT23-3
@
D13
PJDLC05C_SOT23-3
@
2
3
1
R482 4.7K_0402_5%R482 4.7K_0402_5%
1 2
C760 100P_0402_50V8JC760 100P_0402_50V8J
1 2
C755 100P_0402_50V8JC755 100P_0402_50V8J
1 2
R1116 300_0402_5%R1116 300_0402_5%
1 2
C768 100P_0402_50V8JC768 100P_0402_50V8J
1 2
R490
100K_0402_5%
R490
100K_0402_5%
1 2
C749 100P_0402_50V8JC749 100P_0402_50V8J
1 2
C767 100P_0402_50V8JC767 100P_0402_50V8J
1 2
R498 300_0402_5%R498 300_0402_5%
1 2
R484 0_0402_5%R484 0_0402_5%
1 2
C765 100P_0402_50V8JC765 100P_0402_50V8J
1 2
C1271
2.2U_0603_6.3V6K
@
C1271
2.2U_0603_6.3V6K
@
1
2
C1247
0.1U_0402_16V4Z
C1247
0.1U_0402_16V4Z
C762 100P_0402_50V8JC762 100P_0402_50V8J
1 2
R478 300_0402_5%R478 300_0402_5%
1 2
C752 100P_0402_50V8JC752 100P_0402_50V8J
1 2
R483 0_0402_5%R483 0_0402_5%
1 2
C754 100P_0402_50V8JC754 100P_0402_50V8J
1 2
R1118 300_0402_5%R1118 300_0402_5%
1 2
U28
MX25L1005AMC-12G_SOP8
@U28
MX25L1005AMC-12G_SOP8
@
CE#
1
SO 2
WP#
3
VSS
4SI 5
SCK 6
HOLD#
7
VDD 8
R499 100_0402_5%R499 100_0402_5%
1 2
R1058 300_0402_5%R1058 300_0402_5%
1 2
C742 0.1U_0402_16V4ZC742 0.1U_0402_16V4Z
1 2
JKB1
ACES_88747-2601
CONN@
JKB1
ACES_88747-2601
CONN@
KSI7 1
KSI6 2
KSI5 3
KSI4 4
KSI3 5
KSI2 6
KSI1 7
KSI0 8
KSO17 9
KSO16 10
KSO15 11
KSO14 12
KSO13 13
KSO12 14
KSO11 15
KSO10 16
KSO9 17
KSO8 18
KSO7 19
KSO6 20
KSO5 21
KSO4 22
KSO3 23
KSO2 24
KSO1 25
KSO0 26
G1
27
G2
28
C746
33P_0402_50V8K
@
C746
33P_0402_50V8K
@
C748 100P_0402_50V8JC748 100P_0402_50V8J
1 2
JBTN1
ACES_85201-1205
CONN@
JBTN1
ACES_85201-1205
CONN@
1
2
3
4
5
6
7
8
9
10
11
12
C753 100P_0402_50V8JC753 100P_0402_50V8J
1 2
C764 100P_0402_50V8JC764 100P_0402_50V8J
1 2
C1249
100P_0402_50V8J
@
C1249
100P_0402_50V8J
@
1
2
C763 100P_0402_50V8JC763 100P_0402_50V8J
1 2
C759 100P_0402_50V8JC759 100P_0402_50V8J
1 2
U27
MX25L1605DM2I-12G SOP 8P
SA00002TO00
U27
MX25L1605DM2I-12G SOP 8P
SA00002TO00
CS#
1
SO 2
WP#
3
GND
4SI 5
SCLK 6
HOLD#
7
VCC 8
B
LED5
HT-110NB5_BLUE
B
LED5
HT-110NB5_BLUE
21
3
C1248
100P_0402_50V8J
@
C1248
100P_0402_50V8J
@
1
2
U29
NC7SZ08P5X_NL_SC70-5
U29
NC7SZ08P5X_NL_SC70-5
B2
A1
Y
4
P5
G
3
R480 4.7K_0402_5%R480 4.7K_0402_5%
1 2
C771 100P_0402_50V8JC771 100P_0402_50V8J
1 2
R1038 0_0402_5%R1038 0_0402_5%
1 2
JLED1
ACES_85201-1205
CONN@
JLED1
ACES_85201-1205
CONN@
1
2
3
4
5
6
7
8
9
10
11
12
UD
NB
LED1
HT-210UD5/NB5 1206 AMBER/BLUE
UD
NB
LED1
HT-210UD5/NB5 1206 AMBER/BLUE
1
3
2
R4850_0402_5%
@
R4850_0402_5%
@
1 2
R486
100K_0402_5%
R486
100K_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
ON/OFFBTN#
VGA_PWR_ON_L
EN1
EN1#
EN1
EN1#
AUX0N PE_GPIO2
GPIO1_DELAY
GPIO1_DELAY
EC_ON
EC_ON34
ON/OFF 34
51ON# 41
VGA_PWR_ON 34,40,48,49PE_GPIO125
AUX0N13
INT_VGA_EN#25
PX_EN#25
GMCH_LCD_DATA13,22
PE_GPIO2 22
INT_VGAPWR_ON34
ON/OFFBTN#35
+3VALW
+3VALW+3VALW
+3VALW +3VALW
+3VALW +3VALW
+3VS
+3VS +3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
PBTN / VGA SEQUENCE
B
36 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
PBTN / VGA SEQUENCE
B
36 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
PBTN / VGA SEQUENCE
B
36 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
VGA Power ON Circuit
Power Button
%RWWRP6LGH
ON/OFF switch
7236LGH
For VGA Power on control
PE_GPIO1
VGA_PWR_ON
>1ms
For PX sequence, >1mS delay is required between
PE_GPIO1 and VGA_PWR_ON
PX_EN# AUX0N
EDP_DISABLED
I2C_DATA
EDP_ENABLED INT_VGA_EN# DISPLAY OUTPUT
IGP only mode
VGA only mode
PX (MUXED)
PX (MUXLESS)
1
11
1
0
0
00
XX
XX
XX
0/1 0/1
IGP( LVDS,EDP,VGA,DP)
VGA( LVDS,EDP,CRT,DP)
VGA/IGP(CRT, LVDS, EDP); MXM(DP)
IGP( LVDS,EDP,CRT,DP)
PX MODE SELECT CONTROL
Pop for PX verify
<AMD Suggestion>
Verify only
INT_VGA_EN# keeps HIGH if PX is enable
<If pop, Remove R509>
Pop for PX verify
12/08 for VGA SEQ.
12/14 update
12/14 remove
12/14 remove MOS
DVT 0121 update D46 to SC1H751H010
DVT 0131 Q74,Q75 with @
DVT 0125 unstuff Q71
DVT 0131 change Q71 to SB570020410
DVT 0131 change D12 to SC1N202U010
DVT 0131 change Q27 to SB570020410
DVT 0131 change Q70 to SB570020410
PVT 20100310 Remove SW3
Pre MP unstuff
Q73B
DMN66D0LDW-7_SOT363-6
@
Q73B
DMN66D0LDW-7_SOT363-6
@
3
5
4
D46 CH751H-40PT_SOD323-2
MUX@
D46 CH751H-40PT_SOD323-2
MUX@
21
G
D
S
Q70
2N7002-7-F_SOT23
@
G
D
S
Q70
2N7002-7-F_SOT23
@
2
13
U30E
SN74LVC14APWLE_TSSOP14
VGA@
U30E
SN74LVC14APWLE_TSSOP14
VGA@
O10
I
11
P14
G
7
U30D
SN74LVC14APWLE_TSSOP14
VGA@
U30D
SN74LVC14APWLE_TSSOP14
VGA@
O8
I
9
P14
G
7
Q74A
DMN66D0LDW-7_SOT363-6
@Q74A
DMN66D0LDW-7_SOT363-6
@
6 1
2
R496
10K_0402_5%
R496
10K_0402_5%
1 2
G
D
S
Q71
2N7002-7-F_SOT23
@
G
D
S
Q71
2N7002-7-F_SOT23
@
2
13
R493 10K_0603_5%@R493 10K_0603_5%@
1 2
U30F
SN74LVC14APWLE_TSSOP14
VGA@
U30F
SN74LVC14APWLE_TSSOP14
VGA@
O12
I
13
P14
G
7
R414
10K_0402_1%
VGA@R414
10K_0402_1%
VGA@
1 2
R514 0_0402_5%
@
R514 0_0402_5%
@
1 2
U30C
SN74LVC14APWLE_TSSOP14
VGA@
U30C
SN74LVC14APWLE_TSSOP14
VGA@
O6
I
5
P14
G
7
R495
100K_0402_5%
R495
100K_0402_5%
1 2
R415
31.6K_0402_1%
@
R415
31.6K_0402_1%
@
12
C775
0.1U_0402_16V4Z
@
C775
0.1U_0402_16V4Z
@
1
2
R500
100K_0402_5%
@
R500
100K_0402_5%
@
1 2
Q74B
DMN66D0LDW-7_SOT363-6
@Q74B
DMN66D0LDW-7_SOT363-6
@
3
5
4
C777
0.1U_0402_16V4Z
@
C777
0.1U_0402_16V4Z
@
1
2
R509
0_0402_5%
@
R509
0_0402_5%
@
1 2
U30B
SN74LVC14APWLE_TSSOP14
VGA@
U30B
SN74LVC14APWLE_TSSOP14
VGA@
O4
I
3
P14
G
7
Q75A
DMN66D0LDW-7_SOT363-6
@Q75A
DMN66D0LDW-7_SOT363-6
@
6 1
2
R502
100K_0402_5%
@
R502
100K_0402_5%
@
1 2
Q75B
DMN66D0LDW-7_SOT363-6
@
Q75B
DMN66D0LDW-7_SOT363-6
@
3
5
4
U30A
SN74LVC14APWLE_TSSOP14
VGA@
U30A
SN74LVC14APWLE_TSSOP14
VGA@
O2
I
1
P14
G
7
G
D
S
Q27
2N7002-7-F_SOT23
G
D
S
Q27
2N7002-7-F_SOT23
2
13
Q73A
DMN66D0LDW-7_SOT363-6
@
Q73A
DMN66D0LDW-7_SOT363-6
@
61
2
R505 0_0402_5%
VGA@
R505 0_0402_5%
VGA@
1 2
C778
0.1U_0402_16V4Z
VGA@
C778
0.1U_0402_16V4Z
VGA@
1
2
C773
1000P_0402_50V7K
C773
1000P_0402_50V7K
1
2
C776
0.1U_0402_16V4Z
VGA@
C776
0.1U_0402_16V4Z
VGA@
1 2
R501 0_0402_5%
@
R501 0_0402_5%
@
1 2
D12
CHN202UPT_SC70-3
D12
CHN202UPT_SC70-3
1
2
3
R494 10K_0603_5%@R494 10K_0603_5%@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MONO_IN
SENSE_A
+CLASSD_REF
+CLASSD_5V
+FILT_1.65V
+5VS_AVDD
+AVEE
+3VS_LDO_OUT
+3VS_DVDD
+3VS_DVDD
MONO_IN
SENSE_A
+FILT_1.8
+3VS_AUX
HDA_BITCLK_AUDIO
EC_MUTE#_R
HDA_RST_AUDIO#26
HDA_BITCLK_AUDIO26
SPKL+38
SPKL-38
SPKR+38
SPKR-38
BEEP#34
SB_SPKR26
HP_PLUG# 38
MIC_PLUG# 38
EC_MUTE#34
HDA_SYNC_AUDIO26
HDA_SDOUT_AUDIO26 HDA_SDIN026
EAPD34
HP_RIGHT 38
HP_LEFT 38
MIC_R 38
MIC_L 38
DMIC_DATA38 DMIC_CLK38
SPDIF38
+3VS
+5VS_AVDD
+3VS
+3VS_AUX
+MIC_BIASC
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 M/B LA-6141P Schematic
0.1
HD Audio Codec
Custom
37 54Wednesday, April 21, 2010
2009/11/23 2010/11/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 M/B LA-6141P Schematic
0.1
HD Audio Codec
Custom
37 54Wednesday, April 21, 2010
2009/11/23 2010/11/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 M/B LA-6141P Schematic
0.1
HD Audio Codec
Custom
37 54Wednesday, April 21, 2010
2009/11/23 2010/11/23
Compal Electronics, Inc.
GND GNDA
AVDD_3.3 pin is output of
internal LDO. Do NOT connect
to external supply.
Layout Note: Path from +5V to LPWR_5.0 and
RPWR_5.0 must be very low resistance ( <0.01 ohms).
Place bypass caps very close to device.
Note:
To support Wake-on-Jack,
the CODEC VAUX_3.3 pins
must be powered by a Standby supply.
EAPD active low
0=power down ex AMP
1=power up ex AMP
Sense resistors must be
connected same power
that is used for VAUX_3.3
10mil
10mil
40mil
10mil
10mil
20mil 10mil
80mil
10mil
10mil
if supply to VAUX_3.3 is
removed during system re-start.
Port Configuration
Port A: Headphone jack (jack shared with S/PDIF)
Port B: Internal analog mono mic (stereo option)
Port C: Microphone jack
Port G: Internal stereo speakers
Port J: Optional Internal stereo digital mic
Port H: S/PDIF (jack shared with headphone)
80mil
Headphone
MIC JACK
1202 update Audio footprint
12/15 FOR EMI request
12/15 change Bead to 0Ohm
12/15 change Bead to 0Ohm
12/15 update
12/15 update
Pre MP 0410 stuff D48,R1004
12/15 update
DVT 0125 update
12/15 update
12/15 update
12/15 update schematic
DVT 0121 add Res./Short pad (for EMI)
PVT for EMI request, Remove J1,J2,J3
,R1019,R1020,R1022, add 6 Caps.
DVT 0122 update R1007 to 30k
DVT 0126 reserve
Pre MP 0409
U902
CX20672-11Z_QFN40_6X6
U902
CX20672-11Z_QFN40_6X6
VDD_IO 7
VAUX_3.3 2
SDATA_OUT
4
BIT_CLK
5
SDATA_IN
6
DVDD_3.3 18
SYNC
8
RESET#
9
PORTA_L 22
PORTA_R 23
AVDD_3.3 27
PORTC_L 30
RPWR_5.0 15
LPWR_5.0 12
FLY_P 19
FLY_N 20
RIGHT-
14 RIGHT+
16
PORTB_L 34
B_BIAS 33
PORTB_R 35
DMIC_CLK
40
AVEE 21
C_BIAS 32
PORTC_R 31
FILT_1.65 29
LEFT-
13
GPIO1/SPK_MUTE#
37
DMIC_1/2
1
AVDD_5V 28
GPIO0/EAPD#
38
LEFT+
11
SENSE_A 36
CLASS-D_REF 17
AVDD_HP 26
FILT_1.8 3
PC_BEEP
10
GND
41
NC 24
NC 25
SPDIF
39
C1204
1U_0603_10V6K
C1204
1U_0603_10V6K
1
2
R1144 10K_0402_5%
@
R1144 10K_0402_5%
@
12
C1226
10U_0805_10V4Z
C1226
10U_0805_10V4Z
1
2
C1206
0.1U_0402_16V4Z
C1206
0.1U_0402_16V4Z
1
2
C1227 1U_0402_6.3V6KC1227 1U_0402_6.3V6K
1 2
R1011
10K_0402_5%
R1011
10K_0402_5%
12
C1253
22P_0402_50V8J
@C1253
22P_0402_50V8J
@
1
2
R1008
560_0402_5%
R1008
560_0402_5%
1 2
C1273 0.1U_0402_16V4ZC1273 0.1U_0402_16V4Z
1 2
C1278 0.1U_0402_16V4ZC1278 0.1U_0402_16V4Z
1 2
R1114 100_0603_1%
@
R1114 100_0603_1%
@
1 2
C1209
10U_0805_10V4Z
C1209
10U_0805_10V4Z
1
2
R1107 0_0805_5%R1107 0_0805_5%
1 2
R1006
560_0402_5%
R1006
560_0402_5%
1 2
C1210
10U_0805_10V4Z
C1210
10U_0805_10V4Z
1
2
R1095 0_0603_5%R1095 0_0603_5%
1 2
R1009 0_0402_5%
R1009 0_0402_5%
1 2
C1207
10U_0805_10V4Z
C1207
10U_0805_10V4Z
1
2
C1214
0.1U_0402_16V4Z
C1214
0.1U_0402_16V4Z
1
2
C1212
1U_0402_6.3V6K
C1212
1U_0402_6.3V6K
1
2
C1276 0.1U_0402_16V4ZC1276 0.1U_0402_16V4Z
1 2
C1197 1U_0402_6.3V6KC1197 1U_0402_6.3V6K
1 2
R1023 10K_0402_5%
R1023 10K_0402_5%
12
C1220
10U_0805_10V4Z
C1220
10U_0805_10V4Z
1
2
C1203
0.1U_0402_16V4Z
C1203
0.1U_0402_16V4Z
1
2
C
B
E
Q76
2SC2411K_SOT23-3
C
B
E
Q76
2SC2411K_SOT23-3
1
2
3
R1003
10K_0402_5%
R1003
10K_0402_5%
12
C1277 0.1U_0402_16V4ZC1277 0.1U_0402_16V4Z
1 2
R1010
0.1_1206_1%
R1010
0.1_1206_1%
12
R1014 0_0402_5%
R1014 0_0402_5%
1 2
C1275 0.1U_0402_16V4ZC1275 0.1U_0402_16V4Z
1 2
C1218
0.1U_0402_16V4Z
C1218
0.1U_0402_16V4Z
1
2
C1202
0.1U_0402_16V4Z
C1202
0.1U_0402_16V4Z
1
2
R1017 0_0805_5%
R1017 0_0805_5%
1 2
C1215
10U_0805_10V4Z
C1215
10U_0805_10V4Z
1
2
C1199
1U_0402_6.3V6K
C1199
1U_0402_6.3V6K
1 2
C1225
0.1U_0402_16V4Z
C1225
0.1U_0402_16V4Z
1
2
C1201
10U_0805_10V4Z
C1201
10U_0805_10V4Z
1
2
C1200
1U_0402_6.3V6K
C1200
1U_0402_6.3V6K
1 2
C1208
0.1U_0402_16V4Z
C1208
0.1U_0402_16V4Z
1
2
D48
CH751H-40PT_SOD323-2
D48
CH751H-40PT_SOD323-2
2 1
R1093 0_0603_5%R1093 0_0603_5%
1 2
C1211
0.1U_0402_16V4Z
C1211
0.1U_0402_16V4Z
1
2
C1274 0.1U_0402_16V4ZC1274 0.1U_0402_16V4Z
1 2
D49
CH751H-40PT_SOD323-2
D49
CH751H-40PT_SOD323-2
2 1
R1007 30K_0402_1%R1007 30K_0402_1%
1 2
R1013 0_0402_5%
R1013 0_0402_5%
1 2
R1094 0_0603_5%R1094 0_0603_5%
1 2
R1015 0_0402_5%R1015 0_0402_5%
1 2
C1213
0.1U_0402_16V4Z
C1213
0.1U_0402_16V4Z
1
2
R1005
10K_0402_5%
R1005
10K_0402_5%
12
C1198 1U_0402_6.3V6KC1198 1U_0402_6.3V6K
1 2
R1004
10K_0402_5%
R1004
10K_0402_5%
12
C1205
0.1U_0402_16V4Z
C1205
0.1U_0402_16V4Z
1
2
R1012 33_0402_5%
R1012 33_0402_5%
1 2
C1219
0.1U_0402_16V4Z
C1219
0.1U_0402_16V4Z
1
2
C1217
0.1U_0402_16V4Z
C1217
0.1U_0402_16V4Z
1
2
C1221
10U_0805_10V4Z
C1221
10U_0805_10V4Z
1
2
R1018
5.11K_0402_1%
R1018
5.11K_0402_1%
12
R1021
39.2K_0402_1%
R1021
39.2K_0402_1%
12
R1087
10_0402_5%
@
R1087
10_0402_5%
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPK_L_L-
SPK_L_L+
SPK_L_R+
SPK_L_R-
MIC_PLUG#
MIC_R_R
MIC_L_R
HP_PLUG#
MIC_PLUG#
MIC_R_1
DMIC_CLK
DMIC_DATA
HPOUT_L_1
HPOUT_R_1
SPDIF_PLUG#
HP_PLUG#
SPDIF_PLUG#
SPK_L-
SPK_R-
SPK_L+
SPK_R+
MIC_L_1
HPOUT_L_2
HPOUT_R_2
MIC_L_C
MIC_R_C
DMIC_CLK_R
DMIC_DATA_R
SPKL+37
SPKL-37
SPKR+37
SPKR-37
DMIC_CLK37
DMIC_DATA37
HP_LEFT37
HP_RIGHT37
HP_PLUG# 37
SPDIF37
MIC_PLUG#37
MIC_L37
MIC_R37
+MIC_BIASC
+3VS
+5VSPDIF
+5VSPDIF
+5VS_AVDD
+5VS_AVDD
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 M/B LA-6141P Schematic
0.1
Amplifier & Audio Jack
Custom
38 54Wednesday, April 21, 2010
2009/11/23 2010/11/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 M/B LA-6141P Schematic
0.1
Amplifier & Audio Jack
Custom
38 54Wednesday, April 21, 2010
2009/11/23 2010/11/23
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 M/B LA-6141P Schematic
0.1
Amplifier & Audio Jack
Custom
38 54Wednesday, April 21, 2010
2009/11/23 2010/11/23
Compal Electronics, Inc.
30mil
Int. Speaker Conn.
Headphone Out
SM010004010 300ma 70ohm@100mhz DCR 0.3
MIC JACK
For ESD 10/11
Digital MIC
20mil
S/PDIF Out JACK
30mil
SM010012010 300ma 120ohm@100mhz DCR 0.4
11/28 check conn. OK
(same as JALA0)
11/28 check conn. OK
(same as JALA0)
1202 update MIC conn.
1202 update HP conn.
1202 update HP connection
12/14 for layout
12/15 for EMI request
DVT 0131 change L121 to 0Ohm Resistor
1215 update
12/15 remove/bypass
12/15 update , close to conn.
12/15 update to 0603(PWR part)
DVT 0119 add 2.2u_0603 Cap.
12/17 update GNDA
12/17 update GNDA
12/17 update GNDA
DVT 0121 reserve Cap.(for EMI)
change D56 to SCA00000200
PVT 20100311 change Cap to 22p(EMI/Audio)
DVT 0121 reserve Res.(for EMI)
DVT 0121 update Q78 to SB934130020
12/15 update Res.
PVT 20100304 change to 39 Ohm
C1224
100P_0402_50V8J
@C1224
100P_0402_50V8J
@
1
2
L116
MBC1608121YZF_0603
L116
MBC1608121YZF_0603
1 2
R1024 39_0603_1%R1024 39_0603_1%
1 2
L117 MBC1608121YZF_0603L117 MBC1608121YZF_0603
1 2
Q77B
DMN66D0LDW-7_SOT363-6
Q77B
DMN66D0LDW-7_SOT363-6
3
5
4
C1260
2.2U_0603_6.3V6K
C1260
2.2U_0603_6.3V6K
1 2
R1027
100K_0402_5%
R1027
100K_0402_5%
1 2
R1029
2.2K_0402_5%
R1029
2.2K_0402_5%
12
R1025 39_0603_1%R1025 39_0603_1%
1 2
D54
PJDLC05C_SOT23-3
@
D54
PJDLC05C_SOT23-3
@
2
3
1
D55
PJDLC05C_SOT23-3
@
D55
PJDLC05C_SOT23-3
@
2
3
1
JHP1
TAITW_PJKAT1-08FNBT1TT4N0
CONN@
JHP1
TAITW_PJKAT1-08FNBT1TT4N0
CONN@
6
4
1
7
5
3
8
2
JSPK1
ACES_88266-04001
CONN@
JSPK1
ACES_88266-04001
CONN@
1
1
2
2
3
3
4
4G1 5
G2 6
L119
MBC1608121YZF_0603
L119
MBC1608121YZF_0603
1 2
L121 0_0402_5%L121 0_0402_5%
1 2
C1230
0.1U_0402_16V4Z
@
C1230
0.1U_0402_16V4Z
@
1 2
C1233
1000P_0402_50V7K
C1233
1000P_0402_50V7K
1
2
L112 FBMA-L11-160808-700LMT_2PL112 FBMA-L11-160808-700LMT_2P
1 2
C1232
220P_0402_50V7K
C1232
220P_0402_50V7K
1
2
C1264
22P_0402_50V8J
C1264
22P_0402_50V8J
1
2
C1263
22P_0402_50V8J
C1263
22P_0402_50V8J
1
2
C1229
330P_0402_50V7K
C1229
330P_0402_50V7K
1
2
R1033 0_0402_5%R1033 0_0402_5%
1 2
D56
PJSOT05C_SOT23-3
@
D56
PJSOT05C_SOT23-3
@
2
3
1
JDMIC1
ACES_88266-04001
CONN@
JDMIC1
ACES_88266-04001
CONN@
1
1
2
2
3
3
4
4G1 5
G2 6
C1261
2.2U_0603_6.3V6K
C1261
2.2U_0603_6.3V6K
1 2
L113 FBMA-L11-160808-700LMT_2PL113 FBMA-L11-160808-700LMT_2P
1 2
R1030 100_0603_1%R1030 100_0603_1%
1 2
C1231
220P_0402_50V7K
C1231
220P_0402_50V7K
1
2
D50
PJDLC05_SOT23~D
@
D50
PJDLC05_SOT23~D
@
2
3
1
R1108 0_0402_5%R1108 0_0402_5%
1 2
R1031 100_0603_1%R1031 100_0603_1%
1 2
C1228
330P_0402_50V7K
C1228
330P_0402_50V7K
1
2
L120 MBC1608121YZF_0603
L120 MBC1608121YZF_0603
1 2
L118
MBK1608121YZF_0603
L118
MBK1608121YZF_0603
1 2
Q77A
DMN66D0LDW-7_SOT363-6
Q77A
DMN66D0LDW-7_SOT363-6
61
2
D57
PJDLC05C_SOT23-3
@
D57
PJDLC05C_SOT23-3
@
2
3
1
C1234
1000P_0402_50V7K
C1234
1000P_0402_50V7K
1
2
L114
FBMA-L11-160808-700LMT_2P
L114
FBMA-L11-160808-700LMT_2P
1 2
R1026
100K_0402_5%
R1026
100K_0402_5%
1 2
C1235
1000P_0402_50V7K
C1235
1000P_0402_50V7K
1
2
G
D
S
Q78
AO3413_SOT23-3
G
D
S
Q78
AO3413_SOT23-3
2
1 3
R1028
2.2K_0402_5%
R1028
2.2K_0402_5%
12
JMIC1
SUYIN_010030FR006G109ZL
CONN@
JMIC1
SUYIN_010030FR006G109ZL
CONN@
6
5
3
2
1
4
L115
FBMA-L11-160808-700LMT_2P
L115
FBMA-L11-160808-700LMT_2P
1 2
D53
PJDLC05C_SOT23-3
@
D53
PJDLC05C_SOT23-3
@
2
3
1
C1236
1000P_0402_50V7K
C1236
1000P_0402_50V7K
1
2
+VCC_FAN1
+VCC_FAN1
FANPWM34
FAN_SPEED134
+5VS
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
FAN & Screw Hole
B
39 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
FAN & Screw Hole
B
39 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
FAN & Screw Hole
B
39 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
12/01 update FAN conn.
40mil
FAN1 Conn
PWM FAN
12/02 add H6
12/07 Remove H19/H20
H9
H_4P2
H9
H_4P2
1
C823
10U_0805_10V4Z
C823
10U_0805_10V4Z
1 2
FD4
FIDUCIAL_C40M80
FD4
FIDUCIAL_C40M80
1
FD1
FIDUCIAL_C40M80
FD1
FIDUCIAL_C40M80
1
R568
10K_0402_5%
R568
10K_0402_5%
12
H10
H_3P0
H10
H_3P0
1
H15
H_4P2
H15
H_4P2
1
H12
H_3P0
H12
H_3P0
1
H13
H_3P0
H13
H_3P0
1
H18
H_3P4
H18
H_3P4
1
H24
H_3P0
H24
H_3P0
1
H14
H_4P2
H14
H_4P2
1
H16
H_3P0
H16
H_3P0
1
C824
1000P_0402_50V7K
C824
1000P_0402_50V7K
1 2
H2
H_3P0
H2
H_3P0
1
D26 BAS16_SOT23-3@D26 BAS16_SOT23-3@
1 2
FD3
FIDUCIAL_C40M80
FD3
FIDUCIAL_C40M80
1
H21
H_3P0
H21
H_3P0
1
H4
H_3P0
H4
H_3P0
1
D25
1SS355_SOD323-2@
D25
1SS355_SOD323-2@
12
H23
H_4P1X4P4N
H23
H_4P1X4P4N
1
H6
H_6P0N
H6
H_6P0N
1
H5
H_4P2
H5
H_4P2
1
C825
1000P_0402_50V7K
C825
1000P_0402_50V7K
1
2
H25
H_3P0
H25
H_3P0
1
H7
H_4P2
H7
H_4P2
1
JFAN1
ACES_85205-0400
CONN@
JFAN1
ACES_85205-0400
CONN@
1
1
2
2
3
3
4
4
H26
H_4P2
H26
H_4P2
1
R566
0_0603_5%
R566
0_0603_5%
1 2
FD2
FIDUCIAL_C40M80
FD2
FIDUCIAL_C40M80
1
H8
H_4P2
H8
H_4P2
1
H3
H_4P0N
H3
H_4P0N
1
C821
10U_0805_10V4Z
C821
10U_0805_10V4Z
1
2
H1
H_3P0
H1
H_3P0
1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSP
SUSP
SUSP SUSP
SUSP
SYSON#VLDT_EN#
VLDT_EN#
VLDT_EN#
3VS_GATE
VGA_PWR_ON#
VLDT_EN#SYSON#
SUSP#
VGA_PWR_ON#
VGA_PWR_ON#
VGA_PWR_ON#
VGA_PWR_ON#
VLDT_EN#
VGA_PWR_ON#
VGA_PWR_ON#
SUSP
SUSP
SUSP
SUSP
5VS_GATE
3VS_GATE
1.1VS_GATE1.5VSG_GATE
1.8VSG_GATE
3VSG_GATE
VGA_PWR_ON
VGA_PWR_ON#
SYSON34,45
SYSON#33
VLDT_EN34,46
SUSP#34,44,48
SUSP47
VGA_PWR_ON34,36,48,49
+5VALW
+5VALW
+5VALW
+3VALW
+3VS
+5VS
+2.5VS
+1.8VS
+0.75VS
+5VALW
+VSB
+1.1VALW
+VSB
+1.1VS
+VSB
+1.0VSG +VGA_CORE
+CPU_VDDR+1.5V
+1.5VS+1.5V
+1.8VS +1.8VSG
+VSB
+5VALW
+NB_CORE
+1.5V
+VSB
+1.5VSG
+3VSG+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
DC Interface
B
40 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
DC Interface
B
40 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5 LA-6141P
0.1
DC Interface
B
40 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
+3VALW TO +3VS
+5VALW TO +5VS +1.1VALW TO +1.1VS
+1.5VS
+1.8VS to +1.8VSG
+1.5V to +1.5VSG
12/08 change to Dual channel MOS
DVT 0131 update Q59 part to SB934130020
12/08 change to Dual channel MOS
12/08 change to Dual channel MOS
12/08 change to Dual channel MOS
12/08 change to Dual channel MOS
12/12 update
12/12 update
12/12 update
12/07 remove vga_on inverse circuit
12/12 update
DVT 0131 change Q42 to SB570020410
12/07 remove PE_GPIO1 inverse circuit
12/14 update
DVT 0131 change Q40 to SB570020410
PVT 20100312 Add PVT 20100312 Add
PVT 20100312 Add
PVT 20100312 Add
PVT 20100312 Add
DVT 0131 change Q84 to SB570020410
DVT 0131 update Q58 part to SB934130020
DVT 0125 update +3VSG circuit same as NEW75
PVT 20100311 update C1265 to GND
+3VSG
Pre MP update
C828
10U_0805_10V4Z
C828
10U_0805_10V4Z
1
2
C854
10U_0805_10V4Z
VGA@
C854
10U_0805_10V4Z
VGA@
1
2
U37
SI4800BDY-T1-GE3_SO8
VGA@U37
SI4800BDY-T1-GE3_SO8
VGA@
36
5
7
8
2
4
1
C846
0.1U_0603_25V7K
VGA@
C846
0.1U_0603_25V7K
VGA@
1
2
R582
200K_0402_5%
R582
200K_0402_5%
12
R577
1K_0402_5%
R577
1K_0402_5%
12
U39
SI4800BDY-T1-GE3_SO8
U39
SI4800BDY-T1-GE3_SO8
36
5
7
8
2
4
1
R1143
0_0402_5%
VGA@
R1143
0_0402_5%
VGA@
1 2
R1140
0_0402_5%
R1140
0_0402_5%
1 2
Q9A
DMN66D0LDW-7_SOT363-6
Q9A
DMN66D0LDW-7_SOT363-6
61
2
C855
10U_0805_10V4Z
VGA@
C855
10U_0805_10V4Z
VGA@
1
2
R610
470_0603_5%
R610
470_0603_5%
1 2
Q57B
DMN66D0LDW-7_SOT363-6
Q57B
DMN66D0LDW-7_SOT363-6
3
5
4
Q30B
DMN66D0LDW-7_SOT363-6
Q30B
DMN66D0LDW-7_SOT363-6
3
5
4
C827
10U_0805_10V4Z
C827
10U_0805_10V4Z
1
2
Q47B
DMN66D0LDW-7_SOT363-6
VGA@
Q47B
DMN66D0LDW-7_SOT363-6
VGA@
3
5
4
Q33B
DMN66D0LDW-7_SOT363-6
Q33B
DMN66D0LDW-7_SOT363-6
3
5
4
C830
10U_0805_10V4Z
VGA@
C830
10U_0805_10V4Z
VGA@
1
2
C1265
0.1U_0603_25V7K
VGA@
C1265
0.1U_0603_25V7K
VGA@
1
2
Q34A
DMN66D0LDW-7_SOT363-6
VGA@
Q34A
DMN66D0LDW-7_SOT363-6
VGA@
61
2
R511
47K_0402_5%
R511
47K_0402_5%
12
Q39A
DMN66D0LDW-7_SOT363-6
Q39A
DMN66D0LDW-7_SOT363-6
61
2
R571
470_0603_5%
R571
470_0603_5%
1 2
C856
10U_0805_10V4Z
VGA@
C856
10U_0805_10V4Z
VGA@
1
2
R605
470_0603_5%
R605
470_0603_5%
1 2
R313
470_0603_5%
R313
470_0603_5%
1 2
Q51A
DMN66D0LDW-7_SOT363-6
VGA@
Q51A
DMN66D0LDW-7_SOT363-6
VGA@
61
2
R583
100K_0402_5%
R583
100K_0402_5%
1 2
R510 200K_0402_5%
VGA@
R510 200K_0402_5%
VGA@
1 2
Q44B
DMN66D0LDW-7_SOT363-6
Q44B
DMN66D0LDW-7_SOT363-6
3
5
4
C839
1U_0402_6.3V6K
C839
1U_0402_6.3V6K
1
2
R574
226K_0402_1%
R574
226K_0402_1%
1 2
R598
470_0603_5%
VGA@
R598
470_0603_5%
VGA@
1 2
R611
33K_0402_5%
VGA@R611
33K_0402_5%
VGA@
12
R489 200K_0402_5%
VGA@
R489 200K_0402_5%
VGA@
1 2
C836
1U_0402_6.3V6K
C836
1U_0402_6.3V6K
1
2
C842
10U_0805_10V4Z
C842
10U_0805_10V4Z
1
2
R572
470_0603_5%
VGA@
R572
470_0603_5%
VGA@
1 2
Q57A
DMN66D0LDW-7_SOT363-6
Q57A
DMN66D0LDW-7_SOT363-6
61
2
C690
10U_0805_6.3V6M
C690
10U_0805_6.3V6M
1
2
G
D
S
Q59
AO3413_SOT23-3
G
D
S
Q59
AO3413_SOT23-3
2
13
R1142
0_0402_5%
VGA@
R1142
0_0402_5%
VGA@
1 2
R570
100K_0402_5%
R570
100K_0402_5%
1 2
Q38A
DMN66D0LDW-7_SOT363-6
Q38A
DMN66D0LDW-7_SOT363-6
61
2
C829
1U_0402_6.3V6K
C829
1U_0402_6.3V6K
1
2
R579
470_0603_5%
R579
470_0603_5%
1 2
R1139 0_0402_5%R1139 0_0402_5%
1 2
R594
470_0603_5%
VGA@
R594
470_0603_5%
VGA@
1 2
R1141
0_0402_5%
R1141
0_0402_5%
1 2
C835
0.1U_0603_25V7K
VGA@
C835
0.1U_0603_25V7K
VGA@
1
2
R314
100K_0402_5%
R314
100K_0402_5%
1 2
U45
SI4800BDY-T1-GE3_SO8
VGA@U45
SI4800BDY-T1-GE3_SO8
VGA@
36
5
7
8
2
4
1
Q47A
DMN66D0LDW-7_SOT363-6
VGA@
Q47A
DMN66D0LDW-7_SOT363-6
VGA@
61
2
Q46B
DMN66D0LDW-7_SOT363-6
Q46B
DMN66D0LDW-7_SOT363-6
3
5
4
R604
470_0603_5%
R604
470_0603_5%
1 2
G
D
S
Q58
AO3413_SOT23-3
VGA@
G
D
S
Q58
AO3413_SOT23-3
VGA@
2
13
C834
0.1U_0603_25V7K
C834
0.1U_0603_25V7K
1
2
G
D
S
Q84
2N7002-7-F_SOT23
VGA@
G
D
S
Q84
2N7002-7-F_SOT23
VGA@
2
13
G
D
S
Q40
2N7002-7-F_SOT23
G
D
S
Q40
2N7002-7-F_SOT23
2
13
R580
10K_0402_5%
R580
10K_0402_5%
12
C840
10U_0805_10V4Z
C840
10U_0805_10V4Z
1
2
C837
10U_0805_10V4Z
C837
10U_0805_10V4Z
1
2
R590
470_0603_5%
R590
470_0603_5%
1 2
R578
470_0603_5%
R578
470_0603_5%
1 2
R1112
470_0603_5%
VGA@
R1112
470_0603_5%
VGA@
1 2
R60710K_0402_5%
VGA@
R60710K_0402_5%
VGA@
1 2
C852
0.1U_0603_25V7K
VGA@
C852
0.1U_0603_25V7K
VGA@
1
2
Q44A
DMN66D0LDW-7_SOT363-6
Q44A
DMN66D0LDW-7_SOT363-6
61
2
R503 47K_0402_5%
VGA@
R503 47K_0402_5%
VGA@ 12
C833
1U_0402_6.3V6K
VGA@
C833
1U_0402_6.3V6K
VGA@
1
2
R573
100K_0402_5%
R573
100K_0402_5%
12
C844
0.1U_0603_25V7K
C844
0.1U_0603_25V7K
1
2
C1266
10U_0805_6.3V6M
VGA@ C1266
10U_0805_6.3V6M
VGA@ 1
2
Q9B
DMN66D0LDW-7_SOT363-6
Q9B
DMN66D0LDW-7_SOT363-6
3
5
4
R581 47K_0402_5%R581 47K_0402_5%
1 2
U38
SI4800BDY-T1-GE3_SO8
U38
SI4800BDY-T1-GE3_SO8
36
5
7
8
2
4
1
Q38B
DMN66D0LDW-7_SOT363-6
Q38B
DMN66D0LDW-7_SOT363-6
3
5
4
Q33A
DMN66D0LDW-7_SOT363-6
Q33A
DMN66D0LDW-7_SOT363-6
61
2
R575 100K_0402_5%
VGA@
R575 100K_0402_5%
VGA@
1 2
R602
100K_0402_5%
VGA@
R602
100K_0402_5%
VGA@
1 2
C826
10U_0805_10V4Z
C826
10U_0805_10V4Z
1
2
C848
0.1U_0402_16V4Z
VGA@
C848
0.1U_0402_16V4Z
VGA@
1
2
U36
SI4800BDY-T1-GE3_SO8
U36
SI4800BDY-T1-GE3_SO8
36
5
7
8
2
4
1
G
D
S
Q42
2N7002-7-F_SOT23
VGA@
G
D
S
Q42
2N7002-7-F_SOT23
VGA@
2
13
R1111
100K_0402_5%
VGA@
R1111
100K_0402_5%
VGA@
1 2
R576
100K_0402_5%
R576
100K_0402_5%
1 2
R584
10K_0402_5%
R584
10K_0402_5%
12
Q34B
DMN66D0LDW-7_SOT363-6
VGA@
Q34B
DMN66D0LDW-7_SOT363-6
VGA@
3
5
4
Q46A
DMN66D0LDW-7_SOT363-6
Q46A
DMN66D0LDW-7_SOT363-6
61
2
C853
1U_0402_6.3V6K
VGA@
C853
1U_0402_6.3V6K
VGA@
1
2
Q39B
DMN66D0LDW-7_SOT363-6
Q39B
DMN66D0LDW-7_SOT363-6
3
5
4
C691
0.22U_0603_16V4Z
C691
0.22U_0603_16V4Z
1
2
C841
10U_0805_10V4Z
C841
10U_0805_10V4Z
1
2
C831
10U_0805_10V4Z
VGA@
C831
10U_0805_10V4Z
VGA@
1
2
C838
10U_0805_10V4Z
C838
10U_0805_10V4Z
1
2
Q51B
DMN66D0LDW-7_SOT363-6
VGA@
Q51B
DMN66D0LDW-7_SOT363-6
VGA@
3
5
4
R608
100K_0402_5%
VGA@
R608
100K_0402_5%
VGA@
12
C692
0.1U_0402_16V4Z VGA@
C692
0.1U_0402_16V4Z VGA@
1
2
R592
470_0603_5%
R592
470_0603_5%
1 2
R591
470_0603_5%
R591
470_0603_5%
1 2
C832
10U_0805_10V4Z
VGA@
C832
10U_0805_10V4Z
VGA@
1
2
G
D
S
Q8
SSM3K7002FU_SC70-3
VGA@
G
D
S
Q8
SSM3K7002FU_SC70-3
VGA@
2
13
C843
0.1U_0603_25V7K
C843
0.1U_0603_25V7K
1
2
R603
470_0603_5%
VGA@
R603
470_0603_5%
VGA@
1 2
Q30A
DMN66D0LDW-7_SOT363-6
Q30A
DMN66D0LDW-7_SOT363-6
61
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
N1
N2
CHGRTCP
+RTCBATT
PACINDC_IN_S1
51ON#36
ACIN17,34
PACIN44,47
+3VALWP +3VALW
+5VALWP
+VSBP +VSB
+0.75VS+0.75VSP
+1.5V+1.5VP
+1.1VALWP +1.1VALW
+5VALW
+NB_COREP +NB_CORE
VIN
VS
BATT+
RTCVREF
+CHGRTC
+RTCBATT
VIN
VS
VINVIN
RTCVREF
+2.5VSP +2.5VS
+VGA_COREP +VGA_CORE +CPU_VDDRP +CPU_VDDR
+1.8VS+1.8VSP1+1.0VSG+1.0VSGP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
DCIN & DETECTOR
Custom
41 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
DCIN & DETECTOR
Custom
41 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
DCIN & DETECTOR
Custom
41 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
3.3V
Min. Typ Max.
H-->L 16.976V 17.525V 17.728V
L-->H 17.430V 17.901V 18.384V
Vin Dectector
-+
(3.9A,160mils ,Via NO.= 8)
(5A,200mils ,Via NO.= 10)
(120mA,40mils ,Via NO.= 2)
(5A,200mils ,Via NO.=10)
(9.5A,400mils ,Via NO.=20)
(3A,120mils ,Via NO.=6)
(5.2A,220mils ,Via NO.=11)
(1.5A,60mils ,Via NO.= 3)
(3A,120mils ,Via NO.=6)
(25A,1000mils ,Via NO.=50)
(3A,120mils ,Via NO.=6)
SP02000GC00
PC4
100P_0402_50V8J
PC4
100P_0402_50V8J
12
PC6
1000P_0402_50V7K
PC6
1000P_0402_50V7K
12
PR17
560_0603_5%
PR17
560_0603_5%
1 2
PC69
0.1U_0402_16V7K
@PC69
0.1U_0402_16V7K
@
1 2
PJ26
JUMP_43X118
PJ26
JUMP_43X118
11
2
2
PJ9
JUMP_43X39
PJ9
JUMP_43X39
11
2
2
PR5
10K_0402_1%
PR5
10K_0402_1%
1 2
PC148
0.1U_0402_16V7K
@PC148
0.1U_0402_16V7K
@
1 2
PJ19
JUMP_43X118
PJ19
JUMP_43X118
11
2
2
PJ6
JUMP_43X118
PJ6
JUMP_43X118
11
2
2
PR14
22K_0402_1%
PR14
22K_0402_1%
1 2
PC9
0.1U_0402_16V7K
@PC9
0.1U_0402_16V7K
@
1 2
PD3
RLS4148_LL34-2
PD3
RLS4148_LL34-2
12
PC5
100P_0402_50V8J
PC5
100P_0402_50V8J
12
PJ1
JUMP_43X118
PJ1
JUMP_43X118
11
2
2
PR12
200_0603_5%
PR12
200_0603_5%
1 2
PD1
RLZ4.3B_LL34
PD1
RLZ4.3B_LL34
12
PR16
560_0603_5%
PR16
560_0603_5%
1 2
PC1
1000P_0402_50V7K
PC1
1000P_0402_50V7K
12
PJ11
JUMP_43X118
PJ11
JUMP_43X118
11
2
2
PC10
0.1U_0402_16V7K
@PC10
0.1U_0402_16V7K
@
1 2
PR7
20K_0402_1%
PR7
20K_0402_1%
12
PR11
68_1206_5%
PR11
68_1206_5%
12
PC14
0.1U_0603_25V7K
PC14
0.1U_0603_25V7K
12
PC7
0.1U_0402_16V7K
@PC7
0.1U_0402_16V7K
@
1 2
PJ5
JUMP_43X39
PJ5
JUMP_43X39
11
2
2
PL1
SMB3025500YA_2P
PL1
SMB3025500YA_2P
1 2
PR9
10K_0402_5%
PR9
10K_0402_5%
1 2
PR13
100K_0402_1%
PR13
100K_0402_1%
12
PU2
G920AT24U_SOT89-3
PU2
G920AT24U_SOT89-3
IN 2
GND
1
OUT
3
PBJ1
ML1220T13RE
45@
PBJ1
ML1220T13RE
45@
12
PJ20
JUMP_43X118
PJ20
JUMP_43X118
11
2
2
PR2
10K_0402_5%
PR2
10K_0402_5%
12
PC18
1U_0805_25V4Z
PC18
1U_0805_25V4Z
12
PC15
0.1U_0402_16V7K
@PC15
0.1U_0402_16V7K
@
1 2
PJ32
JUMP_43X118
PJ32
JUMP_43X118
11
2
2
PC13
0.22U_0603_25V7K
PC13
0.22U_0603_25V7K
12
PR4
22K_0402_5%
PR4
22K_0402_5%
1 2
PC2
0.1U_0603_25V7K
PC2
0.1U_0603_25V7K
12
PJ3
JUMP_43X118
PJ3
JUMP_43X118
11
2
2
PJP1
ACES_50305-00441-001
PJP1
ACES_50305-00441-001
11
22
33
44
GND 5
GND 6
PC70
0.1U_0402_25V6
PC70
0.1U_0402_25V6
1 2
PC3
1000P_0402_50V7K
PC3
1000P_0402_50V7K
12
PR3
84.5K_0402_1%
PR3
84.5K_0402_1%
12
PD2
RLS4148_LL34-2
PD2
RLS4148_LL34-2
1 2
PR10
68_1206_5%
PR10
68_1206_5%
12
PJ13
JUMP_43X118
PJ13
JUMP_43X118
11
2
2
PC16
0.1U_0402_16V7K
@PC16
0.1U_0402_16V7K
@
1 2
PJ21
JUMP_43X39
PJ21
JUMP_43X39
11
2
2
PC71
0.1U_0402_16V7K
@PC71
0.1U_0402_16V7K
@
1 2
PC12
0.1U_0402_16V7K
@PC12
0.1U_0402_16V7K
@
1 2
PJ8
JUMP_43X118
PJ8
JUMP_43X118
11
2
2
PR15
200_0603_5%
PR15
200_0603_5%
12
PR8
10K_0402_5%
PR8
10K_0402_5%
12
PQ1
TP0610K-T1-E3_SOT23-3
PQ1
TP0610K-T1-E3_SOT23-3
2
13
PU1A
LM393DR_SO8
PU1A
LM393DR_SO8
+3
-2
O
1
P8
G
4
PR1
1M_0402_1%
PR1
1M_0402_1%
1 2
PC8
0.1U_0402_16V7K
@PC8
0.1U_0402_16V7K
@
1 2
PJ22
JUMP_43X118
PJ22
JUMP_43X118
11
2
2
PC17
10U_0805_10V4Z
PC17
10U_0805_10V4Z
12
PC11
0.1U_0402_25V6
PC11
0.1U_0402_25V6
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
TS
EC_SMCA
B/I
BATT_S1
EC_SMDA
SPOK43,45
MAINPW ON 8,43,47
BATT_TEMP 34
EC_SMB_CK1 34
EC_SMB_DA1 34
B+ +VSBP
VL
VL
VL
+3VALWP
BATT+
VMB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
BATTERY CONN / OTP
Custom
42 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
BATTERY CONN / OTP
Custom
42 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
BATTERY CONN / OTP
Custom
42 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Recovery at 56 degree C
CPU thermal protection at 92 degree C
PH1 under CPU botten side :
<40,41>
<40,41>
PC25
0.1U_0603_25V7K
@
PC25
0.1U_0603_25V7K
@
12
PC24
0.22U_1206_25V7K
@
PC24
0.22U_1206_25V7K
@
12
PJP2
SUYIN_200275GR008G13GZR
CONN@
PJP2
SUYIN_200275GR008G13GZR
CONN@
11
33
44
55
66
88
22
77
GND 9
GND 10
PR24
6.49K_0402_1%
PR24
6.49K_0402_1%
12
PR29
100_0402_1%
PR29
100_0402_1%
1 2
PR39
0_0402_5%
PR39
0_0402_5%
1 2
PH2
100K_0402_1%_NCP15WF104F03RC
@PH2
100K_0402_1%_NCP15WF104F03RC
@
12
PR38
100K_0402_1%
PR38
100K_0402_1%
1 2
G
D
S
PQ4
2N7002W -T/R7_SOT323-3
G
D
S
PQ4
2N7002W -T/R7_SOT323-3
2
13
PC27
0.1U_0402_16V7K
@
PC27
0.1U_0402_16V7K
@
12
PC20
1000P_0402_50V7K
PC20
1000P_0402_50V7K
12
PR28
21K_0402_1%
PR28
21K_0402_1%
12
PR34
100K_0402_1%
PR34
100K_0402_1%
12
PR21
100K_0402_1%
@PR21
100K_0402_1%
@
1 2
PH1
100K_0402_1%_NCP15W F104F03RC
PH1
100K_0402_1%_NCP15W F104F03RC
12
PR169
47K_0402_1%
@PR169
47K_0402_1%
@
1 2
PL2
SMB3025500YA_2P
PL2
SMB3025500YA_2P
1 2
PC21
0.1U_0603_25V7K
PC21
0.1U_0603_25V7K
12
PR30 9.53K_0402_1%PR30 9.53K_0402_1%
12
PQ3 TP0610K-T1-E3_SOT23-3PQ3 TP0610K-T1-E3_SOT23-3
2
13
PR33
1K_0402_1%
PR33
1K_0402_1%
12
PR32
100_0402_1%
PR32
100_0402_1%
1 2
PU3
G718TM1U_SOT23-8
PU3
G718TM1U_SOT23-8
RHYST2 5
OT1
3
OT2
4
GND
2
VCC
1
TMSNS2 6
RHYST1 7
TMSNS1 8
PR27
10K_0402_1%
PR27
10K_0402_1%
1 2
PR261
1K_0402_5%
PR261
1K_0402_5%
12
PC19
0.01U_0402_25V7K
PC19
0.01U_0402_25V7K
12
PR36
22K_0402_1%
PR36
22K_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
2VREF_TPS51427
ILIM2
DH5
BST3A
DH3
BST5A
DL5
LX5LX3
FB5
FB3
2VREF_TPS51427
DL3
SPOK 42,45
MAINPWON8,42,47
VL
TPS51427_B+
VL
VS
+5VALWP
+3VALWP
TPS51427_B+
2VREF_TPS51427
VL
B+
VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
+5VALWP/+3VALWP
Custom
43 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
+5VALWP/+3VALWP
Custom
43 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
+5VALWP/+3VALWP
Custom
43 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
+3.3VALWP Ipeak=5.9A ; Imax=4.1A;Iocp=6.6A
Choke DCRmax=23m ohm,
Rds(on)=18m ohm(max) ; Rds(on)=15m
ohm(typical)
Vlimit=(5E-06 * 294K)/10=147mV
Ilimit=147mV/18m ~ 147mV/15m
=8.17A ~ 9.8A
Delta I=1.94A (Freq=300KHz)
Iocp=Ilimit+Delta I/2
=9.14A ~ 10.77A
+5VALWP Ipeak=7A ; Imax=5A;Iocp=8.4A
Choke DCRmax=23m ohm
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
Vlimit=(5E-06 * 330K)/10=165mV
Ilimit=165mV/18m ~ 165mV/15m
=9.167A ~ 11A
Delta I=1.96A (Freq=400KHz)
Iocp=Ilimit+Delta I/2
=9.729A ~ 11.562A
PR54
0_0402_5%
PR54
0_0402_5%
12
PR57
294K_0402_1%
PR57
294K_0402_1%
12
PD17
GLZ5.1B_LL34-2
PD17
GLZ5.1B_LL34-2
1 2
PR52
806K_0603_1%
PR52
806K_0603_1%
1 2
PR41
4.7_1206_5%
@PR41
4.7_1206_5%
@
12
PC122
2200P_0402_25V7K
PC122
2200P_0402_25V7K
1 2
PC31
10U_1206_25V6M
PC31
10U_1206_25V6M
12
PD16
1SS355_SOD323-2
PD16
1SS355_SOD323-2
12
PR60
330K_0402_1%
PR60
330K_0402_1%
12
PQ6
AO4466_SO8
PQ6
AO4466_SO8
3 6
5
7
8
2
4
1
PR48
0_0402_5%
PR48
0_0402_5%
1 2
PC120
2200P_0402_25V7K
PC120
2200P_0402_25V7K
1 2
PC43
0.1U_0603_25V7K
PC43
0.1U_0603_25V7K
1 2
PQ5
AO4466_SO8
PQ5
AO4466_SO8
3 6
5
7
8
2
4
1
PR50
0_0805_5%
PR50
0_0805_5%
1 2
PR49
66.5K_0402_1%
@
PR49
66.5K_0402_1%
@
1 2
PC37
680P_0402_50V7K
@PC37
680P_0402_50V7K
@
12
PC30
2200P_0402_50V7K
PC30
2200P_0402_50V7K
12
PC42
0.1U_0603_25V7K
PC42
0.1U_0603_25V7K
1 2
+
PC39
330U_D2E_6.3VM_R25M
+
PC39
330U_D2E_6.3VM_R25M
1
2
PR59 0_0402_5%@PR59 0_0402_5%@
12
PC46
0.047U_0402_16V7K
@PC46
0.047U_0402_16V7K
@
12
PU4
SN0806081RHBR_QFN32_5X5
PU4
SN0806081RHBR_QFN32_5X5
DRVH2
26
VBST2
24
LL2
25
DRVL2
23
VOUT2
30
REFIN2
32
TONSE
2
LDOREFIN
8
NC
20
EN_LDO
4
EN2
27
EN1
14
PGOOD1 13
PGOOD2 28
V5DRV 19
V5FILT 3
SKIPSEL 29
LDO 7
TRIP2 31
VSW 9
VOUT1 10
GND
21
PGND 22
DRVL1 18
LL1 16
VBST1 17
DRVH1 15
VIN 6
VREF3
5
VREF2
1
FB1 11
TRIP1 12
TP
33
PC29
4.7U_0603_6.3V6M
PC29
4.7U_0603_6.3V6M
12
PC41
1U_0603_10V6K
PC41
1U_0603_10V6K
1 2
PQ37
TP0610K-T1-E3_SOT23-3
PQ37
TP0610K-T1-E3_SOT23-3
2
1 3
PR56
0_0402_5%
@PR56
0_0402_5%
@
1 2
PR55
47K_0402_5%
@PR55
47K_0402_5%
@
1 2
PR47 0_0603_5%PR47 0_0603_5%
12
PC47 0.22U_0603_10V7KPC47 0.22U_0603_10V7K
1 2
PC143
1U_0603_10V6K
PC143
1U_0603_10V6K
1 2
PQ8
AO4712_SO8
PQ8
AO4712_SO8
3 6
5
7
8
2
4
1
PR51
0_0402_5%
PR51
0_0402_5%
1 2
PR53
0_0402_5%
PR53
0_0402_5%
12
PC44
0.22U_0603_25V7K
PC44
0.22U_0603_25V7K
1 2
PR58
200K_0402_5%
PR58
200K_0402_5%
1 2
PC40
0.1U_0603_25V7K
PC40
0.1U_0603_25V7K
1 2
PR45 0_0402_5%PR45 0_0402_5%
1 2
PR46
100K_0402_1%
PR46
100K_0402_1%
1 2
PR43
4.7_1206_5%
@
PR43
4.7_1206_5%
@
12
PC28
10U_1206_25V6M
PC28
10U_1206_25V6M
12
PL4
4.7UH_PCMC063T-4R7MN_5.5A_20%
PL4
4.7UH_PCMC063T-4R7MN_5.5A_20%
12
+
PC35
150U_V_6.3VM_R18
+
PC35
150U_V_6.3VM_R18
1
2
PR44
10K_0402_1%
@PR44
10K_0402_1%
@
1 2
PR40
0_0603_5%
PR40
0_0603_5%
12
PQ7
AO4712_SO8
PQ7
AO4712_SO8
3 6
5
7
8
2
4
1
PC45
2200P_0402_50V7K
PC45
2200P_0402_50V7K
12
PC36
1U_0603_10V6K
PC36
1U_0603_10V6K
1 2
PR42
0_0402_5%
PR42
0_0402_5%
12
PC38
0.047U_0402_16V7-K
PC38
0.047U_0402_16V7-K
12
PL3
4.7UH_PCMC063T-4R7MN_5.5A_20%
PL3
4.7UH_PCMC063T-4R7MN_5.5A_20%
1 2
PJ12
JUMP_43X118
PJ12
JUMP_43X118
11
2
2
PC34
680P_0402_50V7K
@
PC34
680P_0402_50V7K
@
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
6251VDD
6251VREF 6251aclim
ACON CHGCHG
ACOFF
6251_EN CSON
ACOFF
6251VDD
FSTCHG
6251VDD
SUSP#
6251VREF
CSOP
DCIN
PACIN
FSTCHG
BST_CHG
PACIN
DH_CHG
CSIP
DCIN
DL_CHG
CSIN
LX_CHG
6251VDDP
BST_CHGA
IREF34
ADP_I34
PACIN41,47
ACOFF34,47
CALIBRATE#34
SUSP# 34,40,48
FSTCHG 34
ACON47
3S/4S#34
65W/90W#34
VIN
VIN
BATT+
P2 P3
B+
CHG_B+
P3
VIN
B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
CHARGER
Custom
44 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
CHARGER
Custom
44 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
CHARGER
Custom
44 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
BATT Type Charging Voltage
(0x15)
Normal 3S LI-ON Cells 12600mV
CV mode
12.60V
wrong Value
<40,41>
-
Iada=0~4.74A(90W/19V=4.736A)
CP = 85%*Iada ; CP = 4.03A
Iada=0~4.74A(90W) CP= 85%*Iada; CP=4.03A
Iada=0~3.42A(65W) CP= 85%*Iada; CP=2.91A
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)
where Vaclm=1.464V (90W), Iinput=4.03A
PR84=12.1K;PR87=20K
where Vaclm=0.391(65W), Iinput=2.91A
PR84=12.1K;PR85=2.55K
IREF=0.7224*Icharge
CP mode
ADP_I = 19.9*3.42*0.95*0.02=1.29V
NELA5
PC52
0.1U_0603_25V7K
PC52
0.1U_0603_25V7K
12
PD12
RB751V-40TE17_SOD323-2
PD12
RB751V-40TE17_SOD323-2
12
PR94
200K_0402_1%
PR94
200K_0402_1%
12
PQ17 TP0610K-T1-E3_SOT23-3PQ17 TP0610K-T1-E3_SOT23-3
2
13
PR69
150K_0402_1%
PR69
150K_0402_1%
12
PR73
20_0402_5%
PR73
20_0402_5%
1 2
PC64
4.7U_0805_6.3V6K
PC64
4.7U_0805_6.3V6K
1 2
PC63
10U_1206_25V6M
PC63
10U_1206_25V6M
12
PC67
0.1U_0402_16V7K
PC67
0.1U_0402_16V7K
1 2
G
D
S
PQ54
2N7002W -T/R7_SOT323-3
G
D
S
PQ54
2N7002W -T/R7_SOT323-3
2
13
PC50
10U_1206_25V6M
PC50
10U_1206_25V6M
12
PQ15
AO4407A_SO8
PQ15
AO4407A_SO8
3 6
5
7
8
2
4
1
PD9
BAS40CW _SOT323-3
PD9
BAS40CW _SOT323-3
2
3
1
PL5
10UH_MMD-10DZ-100M-X1_6A_20%
PL5
10UH_MMD-10DZ-100M-X1_6A_20%
1 2
PR71
100K_0402_1%
PR71
100K_0402_1%
12
PR84
12.1K_0402_1%
PR84
12.1K_0402_1%
1 2
PR82
2.2_0603_5%
PR82
2.2_0603_5%
1 2
PR76
2_0402_5%
PR76
2_0402_5%
1 2
47K
47K
PQ19
PDTA144EU_SOT323-3
47K
47K
PQ19
PDTA144EU_SOT323-3
2
1 3
G
D
S
PQ56
2N7002W -T/R7_SOT323-3
G
D
S
PQ56
2N7002W -T/R7_SOT323-3
2
13
PR90
31.6K_0402_1%
PR90
31.6K_0402_1%
1 2
PR80
4.7_1206_5%
PR80
4.7_1206_5%
12
G
D
S
PQ23
2N7002W -T/R7_SOT323-3
G
D
S
PQ23
2N7002W -T/R7_SOT323-3
2
13
PR68
10K_0402_5%
PR68
10K_0402_5%
12
PR88
15.4K_0402_1%
PR88
15.4K_0402_1%
1 2
PC129
0.1U_0603_25V7K
PC129
0.1U_0603_25V7K
1 2
PR83
100K_0402_1%
PR83
100K_0402_1%
12
PR87
20K_0402_1%
PR87
20K_0402_1%
12
PR85
2.55K_0402_1%
PR85
2.55K_0402_1%
12
PL21 FBMA-L18-453215-900LMA90T_1812PL21 FBMA-L18-453215-900LMA90T_1812
1 2
PC49
2.2U_0603_6.3V6K
PC49
2.2U_0603_6.3V6K
12
PQ20
PDTC115EU_SOT323
PQ20
PDTC115EU_SOT323
2
13
PR86
4.7_0603_5%
PR86
4.7_0603_5%
1 2
PR72
20_0402_5%
PR72
20_0402_5%
1 2
PC53
0.047U_0603_16V7K
PC53
0.047U_0603_16V7K
1 2
PR79
22K_0402_5%
PR79
22K_0402_5%
1 2
PR65
10K_0402_1%
PR65
10K_0402_1%
1 2
G
D
S
PQ22
2N7002W -T/R7_SOT323-3
G
D
S
PQ22
2N7002W -T/R7_SOT323-3
2
13
PC60
0.01U_0402_25V7K
PC60
0.01U_0402_25V7K
12
PC127
0.1U_0603_25V7K
PC127
0.1U_0603_25V7K
12
PU5
ISL6251AHAZ-T_QSOP24
PU5
ISL6251AHAZ-T_QSOP24
EN
3
CELLS
4
VDD
1
ACSET
2
ICOMP
5
VCOMP
6
CHLIM
9
ACPRN 23
CSIP 19
UGATE 17
PHASE 18
BOOT 16
PGND 13
GND
12
ICM
7
VREF
8
VADJ
11
DCIN 24
CSIN 20
ACLIM
10
LGATE 14
VDDP 15
CSOP 21
CSON 22
PR70 47K_0402_5%PR70 47K_0402_5%
1 2
PQ55
AO4466_SO8
PQ55
AO4466_SO8
3 6
5
7
8
2
4
1
PR75 10K_0402_1%PR75 10K_0402_1%
1 2
PQ21
PDTC115EU_SOT323
PQ21
PDTC115EU_SOT323
2
13
PR78
0.02_1206_1%
PR78
0.02_1206_1%
1
3
4
2
PR66
100K_0402_1%
PR66
100K_0402_1%
12
PD8
1SS355TE-17_SOD323-2
PD8
1SS355TE-17_SOD323-2
1 2
PQ53
PDTC115EU_SOT323
PQ53
PDTC115EU_SOT323
2
13
PC56
5600P_0402_25V7K
PC56
5600P_0402_25V7K
1 2
PQ16
AO4407A_SO8
PQ16
AO4407A_SO8
3 6
5
7
8
2
4
1
PR67
200K_0402_1%
PR67
200K_0402_1%
1 2
PR64
100K_0402_1%
PR64
100K_0402_1%
12
PC54 6800P_0402_25V7KPC54 6800P_0402_25V7K
1 2
PC48
0.1U_0603_25V7K
PC48
0.1U_0603_25V7K
12
PC55
0.01U_0402_25V7K
PC55
0.01U_0402_25V7K
1 2
PD10
1SS355TE-17_SOD323-2
PD10
1SS355TE-17_SOD323-2
1 2
PC58
0.1U_0402_16V7K
PC58
0.1U_0402_16V7K
1 2
PC51
10U_1206_25V6M
PC51
10U_1206_25V6M
12
PR63
47K_0402_1%
PR63
47K_0402_1%
1 2
PR61
0.02_2512_1%
PR61
0.02_2512_1%
1
3
4
2
PR81
80.6K_0402_1%
PR81
80.6K_0402_1%
12
PC61
2200P_0402_25V7K
PC61
2200P_0402_25V7K
12
PC128
680P_0402_50V7K
PC128
680P_0402_50V7K
12
PQ18
PDTC115EU_SOT323
PQ18
PDTC115EU_SOT323
2
13
PC57
100P_0402_50V8J@
PC57
100P_0402_50V8J@
1 2
PQ14
AO4407A_SO8
PQ14
AO4407A_SO8
36
5
7
8
2
4
1
PR74
20_0402_5%
PR74
20_0402_5%
12
PC68
10U_1206_25V6M
PC68
10U_1206_25V6M
12
PQ57
AO4466_SO8
PQ57
AO4466_SO8
3 6
5
7
8
2
4
1
PR62
47K_0402_1%
PR62
47K_0402_1%
12
PC59
0.1U_0603_25V7K
PC59
0.1U_0603_25V7K
12
PD11
1SS355TE-17_SOD323-2
PD11
1SS355TE-17_SOD323-2
1 2
PC62
0.1U_0603_25V7K
PC62
0.1U_0603_25V7K
12
PR77
100_0402_1%
PR77
100_0402_1%
1 2
PQ24
PDTC115EU_SOT323
PQ24
PDTC115EU_SOT323
2
13
PR300 2.2_0603_5%PR300 2.2_0603_5%
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
BST_1.5V
DL_1.5V
LX_1.5V
DH_1.5V
1.5V_B+
BST_1.5V-1
BST_1.1VALW
LX_1.1VALW
DH_1.1VALW
1.1VALW_B+
BST_1.1VALW-1
DL_1.1VALW
SYSON34,40
SPOK42,43
+5VALW
+5VALW
+1.5VP
B+
+5VALW
+1.1VALWP
+5VALW
B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
1.5VP / 1.1VALWP
Custom
45 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
1.5VP / 1.1VALWP
Custom
45 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
1.5VP / 1.1VALWP
Custom
45 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm.
Ipeak=9.61A, Imax=6.73A, Iocp=11.53A
Delta I=((19-1.1)*(1.1/19))/(L*Fsw)=2.06A
=>1/2Delta I=1.03A
Vtripmax=Iocp*Rdson=11.53*5.6*1.3=0.084V
Rcs=Vtrip/9uA=0.084V/9uA=9.3K
choose Rcs=10K
Iocpmax=((10K*11uA)/0.0045)+1.03A=25A
Iocpmin=((10K*9uA)/(0.0056*1.3))+1.03A=13.39A
Iocp=13.39A~25A
<Vo=1.1V> VFB=0.75V
V=0.75*(1+4.7K/10K)=1.1V
Fsw=280KHz
<Vo=1.5V> VFB=0.75V
Vo=0.75*(1+10K/10K)=1.5V
Fsw=280KHz
DCR= 7.5 mohm
Cout ESR=17 mohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm
Ipeak=14.4A, Imax=10.08A, Iocp=17.28A
Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=3.9A
=>1/2Delta I=1.95A
Vtripmax=Iocp*Rdson=16.2*5.6*1.3=0.118V
Rcs=Vtrip/9uA=0.118V/9uA=13.1K
choose Rcs=13K
Iocpmax=((13K*11uA)/0.0045)+1.95A=32A
Iocpmin=((13K*9uA)/(0.0056*1.3))+1.95A=18A
Iocp=18A~32A
PC85
0.1U_0402_16V7K
@PC85
0.1U_0402_16V7K
@
12
PC89
47P_0402_50V8J@
PC89
47P_0402_50V8J@
1 2
+
PC76
330U_D2_2.5VY_R15M
+
PC76
330U_D2_2.5VY_R15M
1
2
PR106
226K_0402_1%
PR106
226K_0402_1%
1 2
PC78
680P_0603_50V7K
PC78
680P_0603_50V7K
12
PR100
4.7_1206_5%
PR100
4.7_1206_5%
12
PR98
2.2_0603_5%
PR98
2.2_0603_5%
1 2
PR104
8.45K_0402_1%
PR104
8.45K_0402_1%
12
PR112
13K_0402_1%
PR112
13K_0402_1%
1 2
PC83
4.7U_0805_25V6-K
PC83
4.7U_0805_25V6-K
12
PR110
4.7_1206_5%
PR110
4.7_1206_5%
12
PR108
2.2_0603_5%
PR108
2.2_0603_5%
1 2
PR105 0_0402_5%PR105 0_0402_5%
1 2
PQ28
AO4726L_SO8
PQ28
AO4726L_SO8
3
5
2
4
1
6
7
8
PR103
4.7K_0402_1%
PR103
4.7K_0402_1%
1 2
PQ26
AO4456_SO8
PQ26
AO4456_SO8
3 6
5
7
8
2
4
1
PQ25
AO4466_SO8
PQ25
AO4466_SO8
3 6
5
7
8
2
4
1
PR111
100_0603_1%
PR111
100_0603_1%
1 2
PC82
4.7U_0805_25V6-K
PC82
4.7U_0805_25V6-K
12
PC73
4.7U_0805_25V6-K
PC73
4.7U_0805_25V6-K
12
PR97
0_0402_5%
PR97
0_0402_5%
1 2
PR113
10K_0402_1%
PR113
10K_0402_1%
1 2
PC77
4.7U_0603_6.3V6K
PC77
4.7U_0603_6.3V6K
12
PL20 FBMA-L18-453215-900LMA90T_1812PL20 FBMA-L18-453215-900LMA90T_1812
1 2
PR96
255K_0402_1%
PR96
255K_0402_1%
1 2
PC72
4.7U_0805_25V6-K
PC72
4.7U_0805_25V6-K
12
PC87
4.7U_0603_6.3V6K
PC87
4.7U_0603_6.3V6K
12
PQ27
AO4466_SO8
PQ27
AO4466_SO8
3 6
5
7
8
2
4
1
+
PC86
330U_D2_2.5VY_R15M
+
PC86
330U_D2_2.5VY_R15M
1
2
PC88
680P_0603_50V7K
PC88
680P_0603_50V7K
12
PR114
10K_0402_1%
PR114
10K_0402_1%
12
PC79
47P_0402_50V8J@
PC79
47P_0402_50V8J@
1 2
PR102
10K_0402_1%
PR102
10K_0402_1%
1 2
PR109
30K_0402_5%
@PR109
30K_0402_5%
@
12
PC81
2200P_0402_50V7K
PC81
2200P_0402_50V7K
12
PR101
100_0603_1%
PR101
100_0603_1%
1 2
PR99
30K_0402_5%
@PR99
30K_0402_5%
@
12
PU6
RT8209BGQW _WQFN14_3P5X3P5
PU6
RT8209BGQW _WQFN14_3P5X3P5
VOUT
3
VDD
4
EN/DEM 1
TON
2
FB
5
PGOOD
6LGATE 9
UGATE 13
PHASE 12
GND
7
PGND
8
CS 11
VDDP 10
BOOT 14
NC 15
PC80
4.7U_0805_10V6K
PC80
4.7U_0805_10V6K
12
PC139
2200P_0402_50V7K
PC139
2200P_0402_50V7K
12
PL19 FBMA-L18-453215-900LMA90T_1812PL19 FBMA-L18-453215-900LMA90T_1812
1 2
PU7
RT8209BGQW _WQFN14_3P5X3P5
PU7
RT8209BGQW _WQFN14_3P5X3P5
VOUT
3
VDD
4
EN/DEM 1
TON
2
FB
5
PGOOD
6LGATE 9
UGATE 13
PHASE 12
GND
7
PGND
8
CS 11
VDDP 10
BOOT 14
NC 15
PL6
1UH_MMD-10DZ-1R0M-X1A_18A_20%
PL6
1UH_MMD-10DZ-1R0M-X1A_18A_20%
1 2
PC75
0.1U_0603_25V7K
PC75
0.1U_0603_25V7K
1 2
PC74
0.1U_0402_16V7K
@PC74
0.1U_0402_16V7K
@
12
PL7
1UH_MMD-10DZ-1R0M-X1A_18A_20%
PL7
1UH_MMD-10DZ-1R0M-X1A_18A_20%
1 2
PC90
4.7U_0805_10V6K
PC90
4.7U_0805_10V6K
12
PC84
0.1U_0603_25V7K
PC84
0.1U_0603_25V7K
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
BST_NB_CORE
DL_NB_CORE
FB1_NB_COREP
LX_NB_CORE
DH_NB_CORE
NB_CORE_B+
BST_NB_CORE-1
VLDT_EN
VLDT_EN34,40
POWER_SEL13
VDDR_SW27
+5VALW
+NB_COREP
+5VALW
B+
+3VS
+2.5VSP
+5VALW
FB1_NB_COREP
+1.5V
+CPU_VDDRP
+5VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
+NB_COREP/+2.5VS/+CPU_VDDRP
Custom
46 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
+NB_COREP/+2.5VS/+CPU_VDDRP
Custom
46 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
+NB_COREP/+2.5VS/+CPU_VDDRP
Custom
46 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
POWER_SEL
HIGH 0.95V
PR123= 17.4 Kohm
1.1VLOW
<Vo=1.1V> VFB=0.75V
V=0.75*(1+4.7K/10K)=1.1V
Fsw=280KHz
Cout ESR=15m ohm Rdson(max)=18m Rdson(typ)=15m
Ipeak=10A, Imax=7A, Iocp=12A
Delta I=((19-1.1)*(1.1/19))/(L*Fsw)=2.06A
=>1/2Delta I=1.03A
Vtripmax=Iocp*Rdson=12*5.6*1.3=0.087V
Rcs=Vtrip/9uA=0.087V/9uA=9.67K
choose Rcs=10K
Iocpmax=((10K*11uA)/0.0045)+1.03A=25A
Iocpmin=((10K*9uA)/(0.018*1.3))+1.03A=13.39A
Iocp=13.39A~25A
DCR= 7.5 mohm
VDDR_SW
HIGH 1.05V
0.9VLOW
PC97
680P_0603_50V7K
@PC97
680P_0603_50V7K
@
12
PC98
47P_0402_50V8J@
PC98
47P_0402_50V8J@
1 2
PR122
4.7K_0402_1%
PR122
4.7K_0402_1%
1 2
PU16
APL5508-25DC-TRL_SOT89-3
PU16
APL5508-25DC-TRL_SOT89-3
IN
2
GND
1
OUT 3
PC119
22U_0805_6.3V6M
PC119
22U_0805_6.3V6M
12
+
PC95
330U_D2_2.5VY_R15M
+
PC95
330U_D2_2.5VY_R15M
1
2
PR157
0_0402_5%
PR157
0_0402_5%
1 2
PC121
0.1U_0402_16V7K
PC121
0.1U_0402_16V7K
12
PR160
10K_0402_1%
PR160
10K_0402_1%
12
PC118
0.01U_0402_25V7K
PC118
0.01U_0402_25V7K
12
PR152
10K_0402_1%
@PR152
10K_0402_1%
@
12
PR154
31.6K_0402_1%
PR154
31.6K_0402_1%
12
PU8
RT8209BGQW _WQFN14_3P5X3P5
PU8
RT8209BGQW _WQFN14_3P5X3P5
VOUT
3
VDD
4
EN/DEM 1
TON
2
FB
5
PGOOD
6LGATE 9
UGATE 13
PHASE 12
GND
7
PGND
8
CS 11
VDDP 10
BOOT 14
NC 15
PU12
APL5915KAI-TRL_SO8
PU12
APL5915KAI-TRL_SO8
GND
1
VOUT 4
POK
7
EN
8
VCNTL 6
VIN 5
VOUT 3
FB 2
VIN 9
PR156
249K_0402_1%
PR156
249K_0402_1%
12
PJ24
JUMP_43X79@
PJ24
JUMP_43X79@
11
2
2
PR161
165K_0402_1%
PR161
165K_0402_1%
12
PC99
4.7U_0805_10V6K
PC99
4.7U_0805_10V6K
12
G
D
S
PQ43
SSM3K7002F_SC59-3
G
D
S
PQ43
SSM3K7002F_SC59-3
2
13
PR188
47K_0402_5%
@PR188
47K_0402_5%
@
12
PC125
0.1U_0402_25V6
PC125
0.1U_0402_25V6
12
PR131
10K_0402_1%
PR131
10K_0402_1%
12
PR119
4.7_1206_5%
@PR119
4.7_1206_5%
@
12
PC93
0.1U_0603_25V7K
PC93
0.1U_0603_25V7K
1 2
PC115
1U_0402_6.3V6K
PC115
1U_0402_6.3V6K
12
PQ29
AO4466_SO8
PQ29
AO4466_SO8
3 6
5
7
8
2
4
1
G
D
S
PQ58
SSM3K7002F_SC59-3
G
D
S
PQ58
SSM3K7002F_SC59-3
2
13
PR121
10K_0402_1%
PR121
10K_0402_1%
1 2
PC126
0.01U_0402_25V7K
PC126
0.01U_0402_25V7K
12
PQ30
AO4456_SO8
PQ30
AO4456_SO8
3 6
5
7
8
2
4
1
PC92
4.7U_0805_25V6-K
PC92
4.7U_0805_25V6-K
12
PC114
1U_0402_6.3V6K
PC114
1U_0402_6.3V6K
12
+
PC218
100U_25V_M
+
PC218
100U_25V_M
1
2
G
D
S
PQ44
SSM3K7002F_SC59-3
G
D
S
PQ44
SSM3K7002F_SC59-3
2
13
PC140
2200P_0402_50V7K
PC140
2200P_0402_50V7K
12
PR153
150_1206_5%
@PR153
150_1206_5%
@
12
PC91
4.7U_0805_25V6-K
PC91
4.7U_0805_25V6-K
12
PR158
23.2K_0402_1%
PR158
23.2K_0402_1%
1 2
PC96
4.7U_0603_6.3V6K
PC96
4.7U_0603_6.3V6K
12
PR117
0_0603_5%
PR117
0_0603_5%
1 2
PL8
1UH_MMD-10DZ-1R0M-X1A_18A_20%
PL8
1UH_MMD-10DZ-1R0M-X1A_18A_20%
1 2
PR123
17.4K_0402_1%
PR123
17.4K_0402_1%
12
PR159
10K_0402_5%
PR159
10K_0402_5%
1 2
PR155
10K_0402_1%
PR155
10K_0402_1%
1 2
PC116
4.7U_0805_6.3V6K
PC116
4.7U_0805_6.3V6K
12
PR116
100K_0402_5%
PR116
100K_0402_5%
1 2
PR115
309K_0402_1%
PR115
309K_0402_1%
1 2
PC113
4.7U_0805_6.3V6K
PC113
4.7U_0805_6.3V6K
12
PL22
FBMA-L18-453215-900LMA90T_1812
PL22
FBMA-L18-453215-900LMA90T_1812
1 2
PR120
100_0603_1%
PR120
100_0603_1%
1 2
PC94
0.1U_0402_16V7K
PC94
0.1U_0402_16V7K
12
PR118
30K_0402_5%
@PR118
30K_0402_5%
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PRG++
ACOFF34,44
ACON44
MAINPWON8,42,43
PACIN 41,44
SUSP40
+1.5V
+3VALW
+0.75VSP
VIN
RTCVREF
VL
VS
+5VALW
B+
B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
Percharge/+0.75VSP
Custom
47 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
Percharge/+0.75VSP
Custom
47 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
Percharge/+0.75VSP
Custom
47 54Wednesday, April 21, 2010
2007/09/20 2010/03/12
Compal Electronics, Inc.
Ipeak=1A, Imax=0.7A
Precharge detector
Min. typ. Max.
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V
Precharge detector
Min. typ. Max.
H-->L 6.138V 6.214V 6.359V
ACIN
L-->H 7.196V 7.349V 7.505V
BATT ONLY
G
D
S
PQ32
2N7002W-T/R7_SOT323-3
G
D
S
PQ32
2N7002W-T/R7_SOT323-3
2
13
PR134
1K_0402_1%
PR134
1K_0402_1%
12
PR135
2.2M_0402_5%
PR135
2.2M_0402_5%
12
PQ31
TP0610K-T1-E3_SOT23-3
PQ31
TP0610K-T1-E3_SOT23-3
2
13
PC101
1U_0603_6.3V6M
PC101
1U_0603_6.3V6M
12
PU9
APL5336KAI-TRL SOP
PU9
APL5336KAI-TRL SOP
VOUT
4
NC 5
GND
2
VREF
3
VIN
1VCNTL 6
NC 7
NC 8
TP 9
PD14
RB715F_SOT323-3
PD14
RB715F_SOT323-3
2
3
1
PR142
66.5K_0402_1%
@PR142
66.5K_0402_1%
@
12
PR136
499K_0402_1%
PR136
499K_0402_1%
12
PR130
1K_0402_1%
PR130
1K_0402_1%
12
PR140
34K_0402_1%
PR140
34K_0402_1%
12
PQ36
DTC115EUA_SC70-3
PQ36
DTC115EUA_SC70-3
2
13
PR137
100K_0402_1%
PR137
100K_0402_1%
12
PR127
1K_1206_5%
PR127
1K_1206_5%
1 2
PR128
100K_0402_5%
PR128
100K_0402_5%
12
PR124
1K_1206_5%
PR124
1K_1206_5%
1 2
PR133
300K_0402_5%
PR133
300K_0402_5%
1 2
PQ34
DTC115EUA_SC70-3
PQ34
DTC115EUA_SC70-3
2
13
PC100
4.7U_0805_6.3V6K
PC100
4.7U_0805_6.3V6K
1 2
PR141
47K_0402_5%
PR141
47K_0402_5%
12
PQ33
DTC115EUA_SC70-3
PQ33
DTC115EUA_SC70-3
2
13
PD13
LL4148_LL34-2
PD13
LL4148_LL34-2
12
PR126
1K_1206_5%
PR126
1K_1206_5%
1 2
PC107
0.01U_0402_25V7K
PC107
0.01U_0402_25V7K
12
PC105
0.1U_0603_25V7K
PC105
0.1U_0603_25V7K
12
PR138
191K_0402_1%
PR138
191K_0402_1%
12
PC104
0.22U_0402_10V4Z
PC104
0.22U_0402_10V4Z
12
PJ17
JUMP_43X79
PJ17
JUMP_43X79
11
2
2
PU1B
LM393DR_SO8
PU1B
LM393DR_SO8
+5
-6
O
7
P8
G
4
PR132
100K_0402_5%
PR132
100K_0402_5%
12
PR139
499K_0402_1%
PR139
499K_0402_1%
12
PR129
100K_0402_5%
PR129
100K_0402_5%
12
PR125
1K_1206_5%
PR125
1K_1206_5%
1 2
G
D
S
PQ35
SSM3K7002FU_SC70-3
G
D
S
PQ35
SSM3K7002FU_SC70-3
2
13
PC102
0.1U_0402_16V7K
PC102
0.1U_0402_16V7K
12
PC103
10U_0805_6.3V6M
PC103
10U_0805_6.3V6M
12
PC106
1000P_0402_50V7K
32.4
PC106
1000P_0402_50V7K
32.4
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_PWR_ON
EN_1.8V
LX_1.8V
SUSP#34,40,44
VGA_PWR_ON34,36,40,49
+3VALW
+1.8VSP1
+3VALW
+1.5V
+1.0VSGP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
B
+1.8VSP/+1.0VSGP
Custom
48 54Wednesday, April 21, 2010
2008/08/10 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
B
+1.8VSP/+1.0VSGP
Custom
48 54Wednesday, April 21, 2010
2008/08/10 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
B
+1.8VSP/+1.0VSGP
Custom
48 54Wednesday, April 21, 2010
2008/08/10 2010/03/12
Compal Electronics, Inc.
FB=0.8V
Ien=10uA, Vth=0.3V, notice
the res. and pull high
voltage from HW
12/14 Update by HW requuest
20100308 Change MP2121 to SY8033
PR143
4.7_1206_5%
PR143
4.7_1206_5%
12
PC154
22U_0805_6.3V6M
PC154
22U_0805_6.3V6M
1 2
PC144
22U_0805_6.3V6M
VGA@
PC144
22U_0805_6.3V6M
VGA@
12
PU10
APL5913-KAC-TRL_SO8
VGA@
PU10
APL5913-KAC-TRL_SO8
VGA@
VIN
9
EN
8
VCNTL
6
VIN
5
POK
7
GND
1
FB 2
VOUT 4
VOUT 3
PR172
22K_0402_5%
@PR172
22K_0402_5%
@
12
PU11
SY8033BDBC_DFN10_3X3
PU11
SY8033BDBC_DFN10_3X3
EN
5
PG 4
LX 3
FB 6
SVIN
8
TP
11
LX 2
PVIN
10
NC
7
PVIN
9
NC
1
PJ31
JUMP_43X79
VGA@
PJ31
JUMP_43X79
VGA@
11
2
2
PR145
61.9K_0402_1%
PR145
61.9K_0402_1%
12
PC157
0.1U_0402_25V6
@
PC157
0.1U_0402_25V6
@
12
PR147
124K_0402_1%
PR147
124K_0402_1%
12
PC146
1U_0402_6.3V6K
VGA@ PC146
1U_0402_6.3V6K
VGA@
12
PC145
0.022U_0402_25V7K
VGA@
PC145
0.022U_0402_25V7K
VGA@
12
PC147
1U_0402_6.3V6K
VGA@
PC147
1U_0402_6.3V6K
VGA@
12
PC117
22U_0805_6.3V6M
PC117
22U_0805_6.3V6M
12
PJ28
JUMP_43X79
@PJ28
JUMP_43X79
@
1
122
PR175
6.04K_0402_1%
VGA@ PR175
6.04K_0402_1%
VGA@
12
PC153
22P_0402_50V8J
@
PC153
22P_0402_50V8J
@
1 2
PR173
10K_0402_5%
VGA@ PR173
10K_0402_5%
VGA@
1 2
PL9
2.2UH_PCMC063T-2R2MN_8A_20%
PL9
2.2UH_PCMC063T-2R2MN_8A_20%
1 2
PR148
47K_0402_5%
@
PR148
47K_0402_5%
@
1 2
PC124
22U_0805_6.3V6M
PC124
22U_0805_6.3V6M
12
PC142
4.7U_0603_6.3V6K
VGA@
PC142
4.7U_0603_6.3V6K
VGA@
12
PR144 0_0402_5%PR144 0_0402_5%
12
PR174
1.54K_0402_1%
VGA@
PR174
1.54K_0402_1%
VGA@
12
PC155
680P_0603_50V7K
PC155
680P_0603_50V7K
12
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
ISEN_VCORE
DH_VCORE-1
LX_VCORE
7138_VCORE
DH_VCORE
BST_VCORE
7138_VCORE
DL_VCORE
GCORE_SEN
B+_core
GPU_VID0 17
GPU_VID1 17
VGA_PWR_ON34,36,40,48
GCORE_SEN 18
VGA_PWRGD25
+3VS
B+
+VGA_COREP
+5VS
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
VGA_COREP
C
49 54Wednesday, April 21, 2010
2007/12/18 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
VGA_COREP
C
49 54Wednesday, April 21, 2010
2007/12/18 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
VGA_COREP
C
49 54Wednesday, April 21, 2010
2007/12/18 2010/03/12
Compal Electronics, Inc.
VFB=0.6V
00
DCR=2.2m OHM
Rds(TYP)=2.3mohm;
Rds(max)=3.2mohm
VGA_CORE
F=1/(75*e-12*44.2)=300K
Ipeak=33A Imax=23.1A Iocp=39.6A
Rsenmax=(3.2*1.3*35)/20=8.112 Kohm choose
Rsen=8.2Kohm
Iocpmin=(8.2*20)/(3.2*1.3)=39.5A
11
Core Voltage Level
10
GPU_VID0 GPU_VID1
Madison
0
0.9 V
1
0.95 V
1.0V
1.05 V
ESR=15 mohm
00
11
Core Voltage Level
10
GPU_VID0 GPU_VID1
Park XT
0
0.93 V
1
1.0 V
1.05V
1.12 V
G
D
S
PQ41
2N7002W-T/R7_SOT323-3
VGA@
G
D
S
PQ41
2N7002W-T/R7_SOT323-3
VGA@
2
13
PC167
2.2U_0603_6.3V6K
VGA@
PC167
2.2U_0603_6.3V6K
VGA@
1 2
PR198
8.87K_0402_1%
PAK@ PR198
8.87K_0402_1%
PAK@
12
PR191
4.7_1206_5%
@
PR191
4.7_1206_5%
@
12
PR193
4.99K_0402_1%
VGA@
PR193
4.99K_0402_1%
VGA@
1 2
PQ38
TPCA8030-H_SOP-ADV8-5
VGA@PQ38
TPCA8030-H_SOP-ADV8-5
VGA@
4
5
1
2
3
PR185
0_0603_5%
VGA@
PR185
0_0603_5%
VGA@
12
PR202
10K_0402_5%
VGA@
PR202
10K_0402_5%
VGA@
1 2
PQ39
AO4726L_SO8
VGA@ PQ39
AO4726L_SO8
VGA@
3
5
2
4
1
6
7
8
PC171
680P_0603_50V7K
@
PC171
680P_0603_50V7K
@
12
+
PC169
330U_D2_2.5VY_R15M
VGA@
+
PC169
330U_D2_2.5VY_R15M
VGA@
1
2
PR183
0_0603_5%
VGA@
PR183
0_0603_5%
VGA@
1 2
PC172
22P_0402_50V8J
VGA@
PC172
22P_0402_50V8J
VGA@
12
PR198
9.53K_0402_1%
MAD@ PR198
9.53K_0402_1%
MAD@
PU998
APW7138NITRL_SSOP16
VGA@
PU998
APW7138NITRL_SSOP16
VGA@
EN
5
BOOT 15
PVCC 14
VIN
3
VCC
4
PGOOD 2
PHASE 1
UG 16
LG 13
PGND 12
VO
10
NC
6
FB
7
FSET
9
ISEN 11
GND 8
PC998
0.01U_0402_25V7K
@
PC998
0.01U_0402_25V7K
@
12
PC166
0.1U_0603_25V7K
VGA@
PC166
0.1U_0603_25V7K
VGA@
1 2
PR213
10K_0402_5%
@PR213
10K_0402_5%
@
1 2
PR190
8.2K_0402_1%
VGA@
PR190
8.2K_0402_1%
VGA@
1 2
PR197
43.2K_0402_1%
PAK@ PR197
43.2K_0402_1%
PAK@
1 2
G
D
S
PQ61
2N7002W-T/R7_SOT323-3
VGA@
G
D
S
PQ61
2N7002W-T/R7_SOT323-3
VGA@
2
13
PL13
HCB4532KF-800T90_1812
VGA@
PL13
HCB4532KF-800T90_1812
VGA@
1 2
PR210
10K_0402_5%VGA@
PR210
10K_0402_5%VGA@
1 2
PR298
0_0402_5%
VGA@
PR298
0_0402_5%
VGA@
12
PR177 20K_0402_1%
VGA@
PR177 20K_0402_1%
VGA@
1 2
PC175
4700P_0402_25V7K
VGA@
PC175
4700P_0402_25V7K
VGA@
12
PR195
22K_0402_1%
VGA@
PR195
22K_0402_1%
VGA@
12
PR204
10K_0402_1%
@PR204
10K_0402_1%
@
12
PC177
4700P_0402_25V7K
VGA@
PC177
4700P_0402_25V7K
VGA@
12
PR196
44.2K_0402_1%
VGA@
PR196
44.2K_0402_1%
VGA@
12
PL14
1UH_MMD-10DZ-1R0M-X1A_18A_20%
VGA@PL14
1UH_MMD-10DZ-1R0M-X1A_18A_20%
VGA@
1 2
PC168
2.2U_0603_6.3V6K
VGA@
PC168
2.2U_0603_6.3V6K
VGA@
12
PQ40
AO4726L_SO8
VGA@ PQ40
AO4726L_SO8
VGA@
3
5
2
4
1
6
7
8
G
D
S
PQ60
2N7002W-T/R7_SOT323-3
VGA@
G
D
S
PQ60
2N7002W-T/R7_SOT323-3
VGA@
2
13
PR205
10K_0402_1%
VGA@PR205
10K_0402_1%
VGA@
1 2
PR186
4.7_0603_5% VGA@
PR186
4.7_0603_5% VGA@
1 2
PC165
10U_1206_25V6M
VGA@
PC165
10U_1206_25V6M
VGA@
12
PC170
0.1U_0402_10V7K
VGA@
PC170
0.1U_0402_10V7K
VGA@
12
PR199
10K_0402_5%
VGA@
PR199
10K_0402_5%
VGA@
1 2
PR200
10K_0402_1%
@PR200
10K_0402_1%
@
1 2
PR206
10K_0402_1%
VGA@ PR206
10K_0402_1%
VGA@
1 2
PR301
10K_0402_5%
VGA@ PR301
10K_0402_5%
VGA@
12
PR201
31.6K_0402_1%
MAD@ PR201
31.6K_0402_1%
MAD@
PR184
0_0603_5%
VGA@
PR184
0_0603_5%
VGA@
1 2
PR297
10_0402_5%
VGA@
PR297
10_0402_5%
VGA@
1 2
PR201
25.5K_0402_1%
PAK@ PR201
25.5K_0402_1%
PAK@
12
PR212
10K_0402_5%
@PR212
10K_0402_5%
@
1 2
PC1000
2200P_0402_50V7K
VGA@
PC1000
2200P_0402_50V7K
VGA@
12
PR197
68.1K_0402_1%
MAD@ PR197
68.1K_0402_1%
MAD@
G
D
S
PQ42
2N7002W-T/R7_SOT323-3
VGA@
G
D
S
PQ42
2N7002W-T/R7_SOT323-3
VGA@
2
13
PC174
2200P_0402_25V7K
VGA@
PC174
2200P_0402_25V7K
VGA@
12
PR203
10K_0402_1%
VGA@ PR203
10K_0402_1%
VGA@
1 2
PC164
10U_1206_25V6M
VGA@
PC164
10U_1206_25V6M
VGA@
12
PR187
10K_0402_5%
@PR187
10K_0402_5%
@
1 2
PR207
10K_0402_1%
VGA@PR207
10K_0402_1%
VGA@
1 2
PR211
10K_0402_5%
VGA@
PR211
10K_0402_5%
VGA@
1 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
COMP0
UGATE_NB
+CPU_CORE
PHASE_NB
RTN1
RTN0
LGATE_NB
PHASE1
BOOT1
BOOT_NB
BOOT1
+CPU_CORE
+CPU_CORE_NB
PHASE0
UGATE1
ISN0
UGATE0
PHASE1
LGATE_NB
DIFF_1
LGATE1
DIFF_0
BOOT0
ISP0
UGATE0
PHASE0
VW1
LGATE0
ISN1
COMP1FB_1
VSEN1
PHASE_NB
UGATE1
LGATE1
ISP1
ISN1
ISP1
BOOT0
LGATE0
UGATE_NB
VW0
ISP0
ISN0
VSEN0
BOOT_NB
FB_0
PHASE_NB
CPU_VDDNB_FB_H 8
CPU_VDDNB_FB_L 8
CPU_VDD0_FB_H8
CPU_VDD0_FB_L8
CPU_VDD1_FB_L8
CPU_VDD1_FB_H8
H_PWRGD_L25
CPU_SVD8
CPU_SVC8
VR_ON34
VGATE34
+1.5VS
+CPU_CORE
CPU_B+
+CPU_CORE
CPU_B+
+CPU_CORE_NB
CPU_B+
CPU_B+
+5VS +3VS
B+
+5VS
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
+CPU_CORE
C
50 54
Wednesday, April 21, 2010
2008/04/16 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
+CPU_CORE
C
50 54
Wednesday, April 21, 2010
2008/04/16 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
+CPU_CORE
C
50 54
Wednesday, April 21, 2010
2008/04/16 2010/03/12
Compal Electronics, Inc.
+VDDNB
Design Current: 2.8A
Max current: 4A
OCP_min:5A
+CPU_CORE_0
Design Current: 25A
Max current: 35A
OCP_min:42A
NELA5
AO4932_SO8
PQ50
AO4932_SO8
PQ50
D2 2
G2
8
G1 3
S2/D1
5
D2 1
S2/D1
7
S1 4
S2/D1
6
PR244
0_0402_5%
PR244
0_0402_5%
12
PR214
44.2K_0402_1%
PR214
44.2K_0402_1%
12
PR259
54.9K_0402_1%
PR259
54.9K_0402_1%
12
PR231 0_0402_5% @PR231 0_0402_5% @
1 2
PR249
4.02K_0402_1%
PR249
4.02K_0402_1%
1 2
PR258
1K_0402_5%
PR258
1K_0402_5%
12
PR226
10_0402_5%
PR226
10_0402_5%
1 2
PR241
10_0402_5%
PR241
10_0402_5%
12
PC216
1200P_0402_50V7K
PC216
1200P_0402_50V7K
12
PR234 0_0402_5%PR234 0_0402_5%
12
PR253
255_0402_1%
PR253
255_0402_1%
12
PR230
0_0603_5%
PR230
0_0603_5%
1 2
PR227
105K_0402_1%
PR227
105K_0402_1%
12
PR219
2_0603_5%
PR219
2_0603_5%
1 2
PR223
105K_0402_1%@
PR223
105K_0402_1%@
12
PC205
0.01U_0402_25V7K
PC205
0.01U_0402_25V7K
12
PC209
0.1U_0402_16V7K
PC209
0.1U_0402_16V7K
12
PC203
10U_1206_25V6M
PC203
10U_1206_25V6M
12
PC210
4700P_0402_25V7K
PC210
4700P_0402_25V7K
12
PR255
1K_0402_5%
PR255
1K_0402_5%
12
PC199
0.22U_0603_10V7K
PC199
0.22U_0603_10V7K
1 2
PQ49
TPCA8028-H_SOP-ADVANCE8-5
PQ49
TPCA8028-H_SOP-ADVANCE8-5
4
1
2
3 5
PR222
0_0402_5%
PR222
0_0402_5%
12
PR233
4.7_1206_5%
PR233
4.7_1206_5%
12
PC213
4700P_0402_25V7K
PC213
4700P_0402_25V7K
12
PR257
6.81K_0402_1%
PR257
6.81K_0402_1%
12
PL16
3.3UH_SIQB74B-3R3PF_5.9A_20%
PL16
3.3UH_SIQB74B-3R3PF_5.9A_20%
1 2
PC208
680P_0603_50V7K
PC208
680P_0603_50V7K
12
PR224
0_0402_5%
PR224
0_0402_5%
12
PR246 10K_0402_1%PR246 10K_0402_1%
12
PL17
0.36UH_PCMC104T-R36MN1R17_30A_20%
PL17
0.36UH_PCMC104T-R36MN1R17_30A_20%
1 2
PR232
16.2K_0402_1%
PR232
16.2K_0402_1%
1 2
PR263
1K_0402_5%
@PR263
1K_0402_5%
@
12
PC187
2200P_0402_50V7K
PC187
2200P_0402_50V7K
12
PR216
22K_0402_1%
PR216
22K_0402_1%
12
PC214
180P_0402_50V8J
PC214
180P_0402_50V8J
12
PR247
16.2K_0402_1%
PR247
16.2K_0402_1%
1 2
PC217
1200P_0402_50V7K
PC217
1200P_0402_50V7K
12
PC183
33P_0402_50V8K
PC183
33P_0402_50V8K
12
PR229
2.2_0603_1%
PR229
2.2_0603_1%
1 2
PC197
0.01U_0402_25V7K
PC197
0.01U_0402_25V7K
12
PC201
0.1U_0402_16V7K
PC201
0.1U_0402_16V7K
12
PR262
1K_0402_5%
@PR262
1K_0402_5%
@
12
PR243
2.2_0603_1%
PR243
2.2_0603_1%
1 2
PL18
0.36UH_PCMC104T-R36MN1R17_30A_20%
PL18
0.36UH_PCMC104T-R36MN1R17_30A_20%
1 2
PR218
10_0402_5%
PR218
10_0402_5%
1 2
+
PC188
100U_25V_M
+
PC188
100U_25V_M
1
2
PR256
54.9K_0402_1%
PR256
54.9K_0402_1%
12
PR260
6.81K_0402_1%
PR260
6.81K_0402_1%
12
PR252 1K_0402_1%@PR252 1K_0402_1%@
12
PR215
2_0603_5%
PR215
2_0603_5%
1 2
PC1002
680P_0402_50V7K
PC1002
680P_0402_50V7K
12
PR228
105K_0402_1%@
PR228
105K_0402_1%@
12
+
PC192
220U_D2_4VM
+
PC192
220U_D2_4VM
1
2
PR235
4.02K_0402_1%
PR235
4.02K_0402_1%
1 2
PC212
1000P_0402_50V7K
PC212
1000P_0402_50V7K
12
PR250
0_0402_5%
PR250
0_0402_5%
12
PQ52
TPCA8028-H_SOP-ADVANCE8-5
@
PQ52
TPCA8028-H_SOP-ADVANCE8-5
@
4
1
2
3 5
PC195
10U_1206_25V6M
PC195
10U_1206_25V6M
12
PC194
0.1U_0603_16V7K
PC194
0.1U_0603_16V7K
12
PR240
0_0402_5%
PR240
0_0402_5%
1 2
PC186
0.01U_0402_25V7K
PC186
0.01U_0402_25V7K
12
PC191
0.22U_0603_10V7K
PC191
0.22U_0603_10V7K
1 2
PU15
ISL6265IRZ-T_QFN48_6X6~D
PU15
ISL6265IRZ-T_QFN48_6X6~D
PWROK
3
SVD
4
OFS/VFIXEN
1
PGOOD
2
SVC
5
ENABLE
6
OCSET
8
VDIFF1
19
RTN1
17
VSEN0
15
VW1
22
RTN0
16
ISN0
14
VW0
12
COMP0
11
RBIAS
7
FB0
10
COMP1
21
ISP1
23
FB1
20
VSEN1
18
VDIFF0
9
ISN1
24
ISP0
13
BOOT1 25
UGATE1 26
PHASE1 27
PGND1 28
LGATE1 29
PVCC 30
LGATE0 31
PGND0 32
PHASE0 33
UGATE0 34
BOOT0 35
BOOT_NB 36
UGATE_NB 37
PHASE_NB 38
LGATE_NB 39
PGND_NB 40
OCSET_NB 41
RTN_NB 42
VSEN_NB 43
FSET_NB 44
COMP_NB 45
FB_NB 46
VCC 47
VIN 48
TP
49
PR242 0_0402_5%PR242 0_0402_5%
12
PR237 0_0402_5%PR237 0_0402_5%
1 2
PQ46
TPCA8030-H_SOP-ADV8-5
PQ46
TPCA8030-H_SOP-ADV8-5
4
5
1
2
3
PC184
1200P_0402_50V7K
PC184
1200P_0402_50V7K
12
PC198
2200P_0402_50V7K
PC198
2200P_0402_50V7K
12
PC215
1000P_0402_50V7K
PC215
1000P_0402_50V7K
12
PQ51
TPCA8030-H_SOP-ADV8-5
PQ51
TPCA8030-H_SOP-ADV8-5
4
5
1
2
3
PC190
0.1U_0603_16V7K
PC190
0.1U_0603_16V7K
12
PQ48
TPCA8028-H_SOP-ADVANCE8-5
PQ48
TPCA8028-H_SOP-ADVANCE8-5
4
1
2
3 5
PC202
1U_0603_16V6K
PC202
1U_0603_16V6K
12
PR236 0_0402_5%PR236 0_0402_5%
12
PC204
10U_1206_25V6M
PC204
10U_1206_25V6M
12
PC193
680P_0603_50V7K
PC193
680P_0603_50V7K
12
PR221
13.7K_0402_1%
PR221
13.7K_0402_1%
12
PC206
2200P_0402_50V7K
PC206
2200P_0402_50V7K
12
PR251
10_0402_5%
PR251
10_0402_5%
12
PC200
680P_0603_50V7K
PC200
680P_0603_50V7K
12
PR248
4.7_1206_5%
PR248
4.7_1206_5%
12
PC211
180P_0402_50V8J
PC211
180P_0402_50V8J
12
PC189
1000P_0402_50V7K
PC189
1000P_0402_50V7K
12
PR217
4.7_1206_5%
PR217
4.7_1206_5%
12
PQ47
TPCA8028-H_SOP-ADVANCE8-5
@
PQ47
TPCA8028-H_SOP-ADVANCE8-5
@
4
1
2
3 5
PC185
10U_1206_25V6M
PC185
10U_1206_25V6M
12
PR225
10K_0402_1%@
PR225
10K_0402_1%@
12
PR220
0_0402_5%
PR220
0_0402_5%
12
PC196
10U_1206_25V6M
PC196
10U_1206_25V6M
12
PL15
HCB4532KF-800T90_1812
PL15
HCB4532KF-800T90_1812
1 2
PC1001
1000P_0402_50V7K
PC1001
1000P_0402_50V7K
12
PR254
255_0402_1%
PR254
255_0402_1%
12
PR245 10_0402_5%PR245 10_0402_5%
12
PC207
0.22U_0603_10V7K
PC207
0.22U_0603_10V7K
1 2
PR239
95.3K_0402_1%
PR239
95.3K_0402_1%
12
PR238
21.5K_0402_1%
PR238
21.5K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
PIR (PWR)
Custom
51 54Wednesday, April 21, 2010
2007/09/20 2008/09/20
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
PIR (PWR)
Custom
51 54Wednesday, April 21, 2010
2007/09/20 2008/09/20
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
PIR (PWR)
Custom
51 54Wednesday, April 21, 2010
2007/09/20 2008/09/20
Compal Electronics, Inc.
9HUVLRQFKDQJHOLVW3,5/LVW 3DJHRI
IRU3:5
5HDVRQIRUFKDQJH 5HY 3* 0RGLI\/LVW 'DWH 3KDVH)L[HG,VVXH,WHP
Combine the 2N7002 main source
to TOSHIBA 0.1 49 2010/02/01
Combine the 2N7002 main source
to TOSHIBA Change PQ35 to P/N SB000009610
0.1 49 2010/02/01Change PQ33,PQ34,PQ36 to P/N SB301150200
Combine the PDTC115EU main source
to Philip
Combine the 1SS355 main source
to PANJIT 0.1 45 Change PD16 to P/N SC100001K00 2010/02/01
Combine the 4148 main source
to PANJIT 0.1 49 Change PD13 to P/N SC100001Y80 2010/02/01
Combine the BAS40CW main source
to PANJIT 0.1 49 Change PD14 to P/N SCS00001200 2010/02/01
Change PR78 to meet the spec.
200PPM/C==>75PPM/C
0.1 46 Change PR78 to SD00000S110 2010/02/01
Decrease the CISS of L/S MOSFET
change the value from 6430 to 3940 pF
0.1 47 Change PQ28,PQ39,PQ40 to SB00000IP00(AO4726L) 2010/02/01
Meet ACER timeline efficiency spec Change the Choke from wire type to molding type
to improve the light load efficiency
0.1 47 Change PL6,PL8,PL14 to SH00000CN00(1.0uH) 2010/02/01 EVT_NELA5
EVT_NELA5
EVT_NELA5
EVT_NELA5
EVT_NELA5
EVT_NELA5
EVT_NELA5
EVT_NELA5
Change PC169 cap. to 470uF Prevent the output OVP when system change
from F/L==>N/L
0.1 51 Change PC169 to SGA20471D20 2010/02/01 EVT_NELA5
Combine the PDTC115EU main source
to Philip
Combine the 1SS355 main source
to PANJIT
Combine the 4148 main source
to PANJIT
Combine the BAS40CW main source
to PANJIT
Change PR78 to meet the spec.
200PPM/C==>75PPM/C
Meet ACER timeline efficiency spec
Change PJ23 to 90ohm Bead
Add PR80 PC128 snubber
Add resistor for H/L MOSFET Driver
Change boost resistor to 2.2ohm
Charger EMI solution 0.2 46 2010/03/15 DVT_NELA5

1.1VALW EMI solution 0.2 47 2010/03/15 DVT_NELA5

1.5VP EMI solution 0.2 47 2010/03/15 DVT_NELA5

ADD PC1001.PC1002 to CPU_B+ plane
for noise bypass
CPU_CORE EMI solution 0.2 52 2010/03/15 DVT_NELA5

Change 1.8VP solution from MP2121
to SY8033
Prevent the MP2121 ESD shutdown issue 0.2 50 2010/03/15 DVT_NELA5

Change PJ23 to 90ohm Bead
Add PR80 PC128 snubber
Add resistor for H/L MOSFET Driver
Change boost resistor to 2.2ohm
Change PJ14 to 90ohm Bead
Add PR100 PC78 snubber
Change boost resistor to 2.2ohm
Change PJ14 to 90ohm Bead
Add PR100 PC78 snubber
Change boost resistor to 2.2ohm
Change PJ15 to 90ohm Bead
Add PR110 PC88 snubber
Change boost resistor to 2.2ohm
Change PJ15 to 90ohm Bead
Add PR110 PC88 snubber
Change boost resistor to 2.2ohm
ADD PC1001.PC1002 to CPU_B+ plane
for noise bypass
Change 1.8VP solution from MP2121
to SY8033
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
HW PIR
B
52 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
HW PIR
B
52 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
HW PIR
B
52 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )
PCB
LA6141MB Rev0: DA80000IF00
FOR UMA HDMI
W/O SP
21
R286 715_0402_1%UMAHDMI@
21
R286 715_0402_1%UMAHDMI@
21
L107
0_0603_5%
WOSP@
21
L107
0_0603_5%
WOSP@
21
R287 715_0402_1%UMAHDMI@
21
R287 715_0402_1%UMAHDMI@
21
R289 715_0402_1%UMAHDMI@
21
R289 715_0402_1%UMAHDMI@
U9
H5TQ1G63BFR-12C_FBGA96
X76@U9
H5TQ1G63BFR-12C_FBGA96
X76@
21
L108
0_0603_5%
WOSP@
21
L108
0_0603_5%
WOSP@
21
R290 715_0402_1%UMAHDMI@
21
R290 715_0402_1%UMAHDMI@
21
R292 715_0402_1%UMAHDMI@
21
R292 715_0402_1%UMAHDMI@
21
R293 715_0402_1%UMAHDMI@
21
R293 715_0402_1%UMAHDMI@
21
R294 715_0402_1%UMAHDMI@
21
R294 715_0402_1%UMAHDMI@
21
R295 715_0402_1%UMAHDMI@
21
R295 715_0402_1%UMAHDMI@
21
C1159
0_0402_5%
WOSP@
21
C1159
0_0402_5%
WOSP@
ZZZ
PCB 047 LA-6141P REV0 M/B
ZZZ
PCB 047 LA-6141P REV0 M/B
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
HW PIR
B
53 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
HW PIR
B
53 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
HW PIR
B
53 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
PAGE MODIFICATION LIST PURPOSEPHASE
DVT P.33 Change JBT1 Conn. NA
Delete R1076,R1077,R1078,R1079P.25 Wlan clk port set to GPP5
Change Q80,Q81 part to SB570020110 , R1054 to SD028200380P.30 NA
AG28(FB_VDDC)/AH29(FB_GND) should route as differential pairAdd R1098 to GND on U5.AH29 P.20
Delete R138,R139 ,R1068 Use R274,R275 ,R1069P.17
U901,C1182,R970,Q74,Q75,U9with @ NAP.17
Add R1099 - R1104 For Side port memory type detect, reserve for unknow functionP.25
Stuff R469,change R470 to 18k ohm DVT Board IDP.34
Add C1260,C1261 2.2uF_0603 Cap. Audio codec (Ext. Mic)
Change Dual-Mosfet part to SB00000DH00 PANJIT Disqualitfy,(change Q5,Q34,Q47,Q51,Q6,Q82,Q30,Q33,Q38,Q73,Q74,Q75,Q9,Q39,Q44,Q46,Q57,Q11,Q83,Q26,Q41,Q77)
P.23 Add R1105,D3 with @ NA
Add/Reserve C1262,R1107,R1108,J2,J3,C1263,C1264 FOR EMI Request
P.38
P.37 Change R1007 to 30k ohm , C1198 to 1u_0402 Audio vender suggest
P.37 Reserve JTP1 NA
NA
Add R1109 ODD_EJECT PD Res.
Add R1110 with VGA@ for EC detect Muxless IGPU/DGPU mode P.34
Change D56 to SCA00000200 FOR EMI RequestP.38
Update +3VSG circuit For VGA thermal sensor functionP.40
P.30
Update C340,C274 part Description/value NAP.19
unstuff Q71,R117,R110,D2,R1096 NA
P.35 update Battery status LED circuit Dual LED module
P.32 add PD Res on JMINI1.49 EC Request
Reserve Res. to Audio CodecP.37 Reserve for Amp.
Set R136,R137,R1065,Q64,R1073,R143,R144,R145 to MUX@, R938 to UMAHDMI@
Set R1066 to MUXLESS@ MUXLESS FunctionP.26
update U26(EC) version to E0,stuff R0185 and unstuff R1084P.34
Change Q58,Q59,D3,D7,D12,D10,D14,C11,C56 Main source Q58,Q59 to SB934130020, D3,D7 to SCSH491D010, D12 to SC1N202U010, D10,D14 to SC300000B00, C11,C56 to SGA00002N80
Change Q19,Q22,Q25,Q27,Q29,Q40,Q42,Q62,Q64,Q70,Q71,Q80,Q81,Q84 to SB570020410
Change L121 to 0 Ohm resistorP.38
NA
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
HW PIR
B
54 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
HW PIR
B
54 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
NELA5
0.1
HW PIR
B
54 54Wednesday, April 21, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
PAGE MODIFICATION LIST PURPOSEPHASE
PVT change R1024,R1025 to 39Ohm Audio spec
change Q58 with VGA@
change C340 to 330U
change C21 to 1.5pF
Reserve CPU internal thermal circuit
Update LVDS PWM switch circuit,set R253 to UMALVDS@
Reverse JTP1 pin , reserve C1271(2.2u_0603) to TP_PWM with GND
Remove SW3
Add R1129(0_0603) to Wlan
P.38
P.40
P.19
P.8 CPU Ext. thermal sensor temp carzy issue-short solution
+3VSG circuit
P.8 Reserve Internal thermal sensor circuit
P.22 For LVDS PWM
P.35 TP module design
P.36 ME interfere
For Wlan power consumption measure P.32
Add VGA_PWRGD circuit,change FN_RESERVE to VGA_PWRGD_RP.25 AMD recomment
Reserve FN_RESERVE1 netP.25
Update +3VSG circuit,Add 0 Ohm Res. to PWR SW MOSFETP.40
R274,R275 with @,stuff R934,R935P.23
Change R1019,R1020,R1022,J1,J2,J3 to 0.1u_0402 Cap.P.37 For EMI request
For EMI requestchange C1263,C1264 to 22pFP.38
update JHDMI1 conn. footprintP.23
change SE100105Z80 to SE000000K80(1u/6.3v/0402 Y5V to X5R)
change SE103225Z80 to SE107225K80 (2.2u/6.3v/0603 Y5V to X5R)
HW Standard Part
HW Standard Part
Pre MP Change R969,R961 to Bead(SM01000CP00) For EMI requestP.34
Stuff R938P.23 PX MUX HDMI DGPU/IGPU SW
Change R470 to 56k Ohm Board IDP.34
Reserve EC_MUTE# PD Res.(R1144), stuff D48,R1004 Audio vender suggestionP.37
Add SB VDDCR_11_USB_S LDO circuit(Add U905,C678,L122), unstuff L73 AMD suggestionP.28
Change R574 to 226k Audio bobo sound issue,Fine tune +5VS sequenceP.40
Change U5 PN to SA00003MC70 update PARK PN to SA00003MC70(R3)P.16
unstuff U904,C1272,R1133,Q70,Q73,R500,R502,Q85,Q86,R1119,R1120,C1267 For Pre MP , unstuff unused part (VGA_PWRGD AND gate,CPU internal thermal sensor circuit)
Change R251 to 10k CMO panel +LCDVDD issue (garbage)P.22
www.s-manuals.com

Navigation menu