Compal LA 6611P Schematics. Www.s Manuals.com. R1.0 Schematics

User Manual: Motherboard Compal LA-6611P PAL70 - Schematics. Free.
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A

B

COMPAL CONFIDENTIAL
1

MODEL NAME : PAL70
PCB NO : LA-6611P (DAA00001W10)
BOM P/N : 43XXXXXXLXX

C

D

E

ϯD>>EϭϯΗhD
BGA Sandy Bridge +
FCBGA PCH Cougar Point-M

Items
R1 P/N
CPU 2.5G SA00004EL2L


CPU 2.6G SA00004EM2L


CPU 2.7G SA00004F02L


CPU 2.1G SA00004KP1L


PCH
 SA00004IW2L
LAN
SA00003SI4L
USH
SA00003AO1L

2010-01-21

R3 P/N
SA00004EL3L
SA00004EM3L
SA00004F03L
SA00004KP2L
SA00004IW3L
SA00003SI5L
SA00003AO2L

1

REV : 1.0(A00)

GPIO MAP Version 1010

@ : Nopop Component
dWD
DdǇƉĞ

dD

tŝƚŚ^W/

tŝƚŚd

ϱΛ

ϲΛ

KDWͬE

MB PCB

ϭΛ

ϯΛ

ϮΛ

ϰΛ

Part Number
DAA00001W00

2

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ϰϯϭϵϯϰϯϭ>Ϭϱ

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Ϯ͘ϳ'WhdWD/^ͬdDEͬtͬ^W/
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Description
PCB PAL70 LA6611

ϰϯϭϵϯϰϯϭ>ϭϳ

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4

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Cover Sheet
Size

B

C

D

Rev
1.0

LA-6611P
Date:

A

Document Number
Wednesday, January 26, 2011

Sheet
E

1

of

64

A

B

Block Diagram

C

D

E

Compal confidential Model: PAL70

Memory BUS (DDR3)

DDRIII-DIMM X2

1066/1333MHz

BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
page 12~13

Sandy Bridge

1

1

LVDS CONN
4MB (Socket G1)
BGA CPU

page 24

CRT CONN
/Kͬ

VGA

1023 pins

For MB/Dock
Video Switch
PI3V712-AZLE

BT

page 6~11

page 25

FDI

DMI

Lane x 8

Lane x 4

page 44

Camera

page 24

Trough LVDS Cable

LVDS
VGA

SATA Repeater
MAX4951BECTP+

SATA

E-SATA

page 14

DPB

HDMI CONN

USB

page 40

USB

page 39

COUGAR POINT-M

page 26
2

USB

INTEL

DPC
DPD

DOCKING
PORT

BGA

2

page 41
page 14~21
DAI

Card reader

USB

SDXC

SATA

OZ600FJ0LN
page 36

page 36

PCIE x1

HD Audio I/F

PCI Express BUS
PCIE

PCIE

EXPRESS 1/2 Mini Card
Card
Flash
page 38
3

1/2 Mini Card
WLAN

Full Mini Card
WWAN/UWB

China TPM1.2
SSX35BCB

page 37

page 37

page 35

page 37

USB

USB

USB

Smart
Card
page 34

page 7

page 14

Fingerprint
CONN page 23

FP_USB

3

page 30

HDD

Transformer

HeadPhone &
MIC Jack

page 28

page 33

page 14
/Kͬ

16M 4K sector

RJ45

DAI

USB

page 33

To Docking side
SATA Repeater

PCH ITP Port

page 14

Thermal
FAN

GUARDIAN III
EMC4022

MAX4951BECTP+

SMSC SIO
ECE5028

Dig.
MIC

page 29

BC BUS

page 42

page 22

Trough LVDS Cable

SMSC KBC
MEC5055

page 22

4

page 32

page 30

W25X16ZE

page 34~35

RFID

page 34

HDA Codec
92HD90B2

W25X64ZE

USH TPM1.2
BCM5882

LAN SWITCH
PI3L720

INT.Speaker
64M 4K sector

TDA8034HN

page 32

S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s

LPC BUS

USB

page 34

CPU ITP Port

DOCK LAN
SPI

Option

PCIE

PCIE

Intel Lewisville
82579LM

PCI Express BUS

DOCK LAN

WiFi ON/OFF

page 43

PCIE

E-Module

4

page 29

/Kͬ

DC/DC Interface

DELL CONFIDENTIAL/PROPRIETARY

page 45

Power On/Off
SW & LED page

TP CONN
page 44

Compal Electronics, Inc.

KB CONN

Title

page 44

UMA Block Diagram
Size

46

Rev
0.3

LA-6611P
Date:

A

Document Number

B

C

D

Wednesday, January 26, 2011

Sheet
E

2

of

64

5

4

3

2

1

POWER STATES
USB PORT#
Signal

SLP
S3#

SLP
S4#

SLP
S5#

S4
STATE#

SLP
M#

S0 (Full ON) / M0

HIGH

HIGH

HIGH

HIGH

HIGH

S3 (Suspend to RAM) / M1

LOW

HIGH

HIGH

HIGH

S4 (Suspend to DISK) / M1

LOW

LOW

HIGH

S5 (SOFT OFF) / M1

LOW

LOW

S3 (Suspend to RAM) / M-OFF

LOW

S4 (Suspend to DISK) / M-OFF
S5 (SOFT OFF) / M-OFF

State

D

ALWAYS
PLANE

M
PLANE

SUS
PLANE

RUN
PLANE

ON

ON

ON

ON

HIGH

ON

ON

ON

LOW

HIGH

ON

ON

LOW

LOW

HIGH

ON

HIGH

HIGH

HIGH

LOW

LOW

LOW

HIGH

LOW

LOW

LOW

LOW

LOW

DESTINATION

CLOCKS

0

JUSB1 (Ext Right Side)

ON

1

none

OFF

OFF

2

Right Side (ESATA)

OFF

OFF

OFF

3

none

ON

OFF

OFF

OFF

4

WLAN/WIMAX

ON

OFF

ON

OFF

OFF

5

WWAN/UWB

LOW

ON

OFF

OFF

OFF

OFF

6

Flash

LOW

ON

OFF

OFF

OFF

OFF

7

USH->BIO

8

DOCKING

9

DOCKING

10

Express card

11

Bluetooth

12

Camera

13

none

PCH

D

PM TABLE
C

power
plane

+15V_ALW

+3.3V_SUS

+5V_RUN

+3.3V_M

+5V_ALW

+1.5V_MEM

+3.3V_RUN

+1.05V_M +1.05V_M

+3.3V_ALW_PCH

+1.8V_RUN

+3.3V_RTC_LDO

+1.5V_RUN

+3.3V_M
(M-OFF)

Thickness
Thickness
(Material SPEC.) (Actuality)
Unit : mil
Unit : mil

+1.05V_RUN_VTT

SolderMask

min 0.4

0.50

+1.05V_RUN

Add Plating

1.30

1.05

Top/L1(signal)

0.5oz(0.68)

0.65

Prepreg

1080LRC

2.65

+VCC_CORE

State

0.5oz

0.65

Core

3mil

3.09

L3(IN1)

0.5oz

0.65

Prepreg

1080LRC+1080

5.1

L4(IN2)

1oz

1.35

Core

3mil

3.09

L5(GND2)

1oz

1.35

Prepreg

1080HRC

2.90

L6(IN3)

0.5oz

0.65

Core

6mil

6

L7(IN4)

0.5oz

0.65

Prepreg

1080HRC

2.90

DESTINATION

L8(VCC)

1oz

1.35

Core

3mil

3.09

SATA 0

HDD

L9(IN5)

1oz

1.35

Prepreg

1080LRC+1080

5.1

SATA 1

ODD/ E3 Module Bay

S0

B

ON

ON

ON

ON

ON

S3

ON

ON

OFF

ON

OFF

S5 S4/AC

ON

OFF

OFF

ON

OFF

S5 S4/AC don't exist

OFF

SATA

A

Stack up
Layer

+0.75V_DDR_VTT

OFF

OFF

OFF

OFF

C

L10(IN6)

0.5oz

0.65

Core

3mil

3.09

L11(GND3)

0.5oz

0.65

Prepreg

1080LRC

2.65

SATA 2

NA

SATA 3

NA

Bottom/L12(signal) 0.5oz(0.68)
Add Plating

1.30

SATA 4

ESATA

SolderMask

min 0.4

0.50

Overall Thickness

1.36mm+/-10%

53.36

SATA 5

Dock

USH

0

BIO

1

NA

PCI EXPRESS

0.65
1.05

DESTINATION

B

Lane 1

MINI CARD-1 WWAN

Lane 2

MINI CARD-2 WLAN

Lane 3

Express card

Lane 4

E3 Module Bay (USB3)

Lane 5

1/2vMINI CARD-3 PCIE

Lane 6

MMI

Lane 7

10/100/1G LOM

Lane 8

None

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Index and Config.
Size

4

3

2

Rev
0.3

LA-6611P
Date:

5

Document Number
Wednesday, January 26, 2011

Sheet
1

3

of

64

3

2

+V_DDR_REF
TPS51206
(PU5)

SI3456BDV
@(Q27)

+0.75V_DDR_VTT

ADAPTER

1

ODD_MOD

4

HDDC_EN

5

+1.05V_RU
N_VTT

SN1003055
(PU7)

SI3456BDV
(Q30)
SSM3K7002F
@(QH4)

D

+PWR_SRC

+5V_HDD

+1.5V_MEM

BATTERY

SN1003055
(PU3)

NTGS4144
(Q59)

+1.5V_RUN

D

+5V_MOD
ALW_ENABLE

AO4728L
(QC3)

+1.5V_CPU_VDDQ

SI4164DY
(Q63)

+5V_ALW_PCH
+1.05V_RUN

1.5V_RUN_ENABLE

+1.05V_M

SN1003055
(PU6)

CHARGER

+5V_ALW

MAX17020

ALWON

RUN_ON

(PU2)
C

C

+15V_ALW
+1.8V_RUN

RUN_ON

TPS51311

SI4164DY
(Q50)

(PU4)
PJP63

+0.8V_VCC_SA

SI3456BDV
(Q38)

SI3456BDV
(Q40)

S13456
(Q42)

+3.3V_WLAN

+3.3V_PCIE_WWAN

PCH_ALW_ON

SI3456
(Q34)

+3.3V_ALW_PCH

NTMS4920
(Q55)

SI3456BDV
(Q58)

SI3456BDV
(Q18)

+3.3V_RUN

+3.3V_M

+LCDVDD

RUN_ON

MCARD_PCIE_BKT_PWREN

AUX_ON

AUX_EN_WOWL

+3.3V_ALW

SI3456BDV
(Q49)

EN_LCDPWR

+VCC_GFXCORE

+5V_RUN

SUS_ON

A_ON

+VCC_CORE

FDC654P
(Q21)
EN_INVPWR

IMVP_VR_ON

B

ISL95870A
(PU13)
CPU_VTT_ON

MAX17511
(PU9)

SI3456BDV
(Q54)
MCARD_WWAN_PWREN

+3.3V_SUS

B

+BL_PWR_SRC

+3.3V_PCIE_FLASH

+3.3V_LAN

Pop option

+3.3V_RUN

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Power Rail
Size

4

3

2

Rev
0.3

LA-6611P
Date:

5

Document Number
Wednesday, January 26, 2011

Sheet
1

4

of

64

5

4

3

2

1

2.2K
SMBUS Address [0x9a]

+3.3V_ALW_PCH

2.2K
H14

MEM_SMBCLK

C9

MEM_SMBDATA

2N7002

DDR_XDP_WAN_SMBCLK

202

DDR_XDP_WAN_SMBDAT

200

DIMMA

SMBUS Address [A0]

DIMMB

SMBUS Address [A4]

2N7002
2.2K

202

PCH
D

+3.3V_LAN

2.2K

E14

C8

LAN_SMBCLK

28

G12

LAN_SMBDATA

31

LOM

200

D

SMBUS Address [C8]

M16
SML1_SMBDATA
SML1_SMBCLK

30

2.2K

WWAN

32

2.2K

SMBUS Address [TBD]

+3.3V_ALW_PCH
2.2K

A5
3A

2.2K

B6

2.2K

3A

2.2K
B4
1A
1A

A3

+3.3V_ALW
127

DOCK_SMB_CLK

129

DOCK_SMB_DAT

DOCKING

2.2K
C

2.2K
B5

LCD_SMBCLK

A4

LCD_SMDATA

1B
1B

+3.3V_RUN

SMBUS Address
APR_EC: 0x48
SPR_EC: 0x70
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13

14

G Sensor

13

SMBUS Address [TBD]

C

+LCD_VDD

Keep pull up only for PWM LCD
2.2K

KBC

2.2K
1C
1C

A56
B59

PBAT_SMBCLK
PBAT_SMBDAT

+3.3V_ALW
100 ohm

7

100 ohm

6

BATTERY
CONN

SMBUS Address [0x16]

USH

SMBUS Address [0xa4]

2.2K

2.2K

+3.3V_ALW

A50

USH_SMBCLK

M9

B53

USH_SMBDAT

L9

1E
1E
B

B

2.2K

2.2K

MEC 5055
2B

A49

CARD_SMBCLK

2B

B52

CARD_SMBDAT

+3.3V_ALW
7
8

Express card

SMBUS Address [TBD]

2.2K
2.2K

+3.3V_ALW

B50

CHARGER_SMBCLK

10

A47

CHARGER_SMBDAT

9

1G
1G

Charger

SMBUS Address [0x12]

2.2K
2.2K

+3.3V_ALW

B7

BAY_SMBDAT

31

A7

BAY_SMBCLK

32

2D
A

2D

E3 Module Bay

SMBUS Address [0xd2]

A

2.2K
2.2K

+3.3V_RUN

B49

DAI_SMBCLK

8

B48

DAI_SMBDAT

9

2A
2A

A/D,D/A
converter

Compal Electronics, Inc.
Title

SMBUS Address [0x30]

SMBUS TOPOLOGY
Size

Document Number

Rev
0.3

LA-6611P
Date:
5

4

3

2

Wednesday, January 26, 2011

Sheet
1

5

of

64

5

4

3

2

1

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U1I
U1A

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

N3
P7
P3
P11

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

K1
M8
N4
R2

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

K3
M7
P4
T3

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

16
16
16
16
16
16
16
16

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

U7
W11
W1
AA6
W6
V4
Y2
AC9

16
16
16
16
16
16
16
16

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

U6
W10
W3
AA7
W7
T4
AA3
AC8

16
16
16
16

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

16
16
16
16
16
16
16
16

FDI_INT

16 FDI_INT

FDI_LSYNC0
FDI_LSYNC1

16 FDI_LSYNC0
16 FDI_LSYNC1

AA11
AC12
U11
AA10
AG8

FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]

Intel(R) FDI

FDI_FSYNC0
FDI_FSYNC1

16 FDI_FSYNC0
16 FDI_FSYNC1

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC

;ϭͿWͺKDW/KƵƐĞϰŵŝůƚƌĂĐĞƚŽZϭ
;ϮͿWͺ/KDWKƵƐĞϭϮŵŝůƚŽZϭ
EDP_COMP

eDP_COMPIO
eDP_ICOMPO
eDP_HPD

AG4
AF4

eDP_AUX#
eDP_AUX

AC3
AC4
AE11
AE7

eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]

AC1
AA4
AE10
AE6

eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]

DP

B

AF3
AD2
AG11

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

G3
G1
G4

PEG_COMP
BG17
BG21
BG24
BG28
BG37
BG41
BG45
BG49
BG53
BG9
C29
C35
C40
D10
D14
D18
D22
D26
D29
D35
D4
D40
D43
D46
D50
D54
D58
D6
E25
E29
E3
E35
E40
F13
F15
F19
F29
F35
F40
F55
G48
G51
G6
G61
H10
H14
H17
H21
H4
H53
H58
J1
J49
J55
K11
K21
K51
K8
L16
L20
L22
L26
L30
L34
L38
L43
L48
L61
M11
M15

H22
J21
B22
D21
A19
D17
B14
D13
A11
B10
G8
A8
B6
H8
E5
K7
K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4

VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]

VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]

VSS

NCTF

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI

C

M2
P6
P1
P10

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

PCI EXPRESS -- GRAPHICS

D

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

16
16
16
16

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14

M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59

D

C

A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61

B

SANDY-BRIDGE_BGA1023~D
SANDY-BRIDGE_BGA1023~D

W'ŽŵƉĞŶƐĂƚŝŽŶ

WŽŵƉĞŶƐĂƚŝŽŶ

+1.05V_RUN_VTT

1

1

+1.05V_RUN_VTT

RC2
24.9_0402_1%~D

2

2

RC1
24.9_0402_1%~D

PEG_COMP
EDP_COMP

A

ĞWͺKDW/KĂŶĚ/KDWKƐŝŐŶĂůƐƐŚŽƵůĚďĞƐŚŽƌƚĞĚŶĞĂƌďĂůůƐĂŶĚ
ƌŽƵƚĞĚǁŝƚŚƚǇƉŝĐĂůŝŵƉĞĚĂŶĐĞфϮϱŵŽŚŵƐ

W'ͺ/KDW/ĂŶĚZKDWKƐŝŐŶĂůƐƐŚŽƵůĚďĞƐŚŽƌƚĞĚĂŶĚƌŽƵƚĞĚ
ǁŝƚŚͲŵĂǆůĞŶŐƚŚсϱϬϬŵŝůƐͲƚǇƉŝĐĂůŝŵƉĞĚĂŶĐĞсϰϯŵŽŚŵƐ
W'ͺ/KDWKƐŝŐŶĂůƐƐŚŽƵůĚďĞƌŽƵƚĞĚǁŝƚŚͲŵĂǆůĞŶŐƚŚсϱϬϬŵŝůƐ
ͲƚǇƉŝĐĂůŝŵƉĞĚĂŶĐĞсϭϰ͘ϱŵŽŚŵƐ

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

Title

Sandy Bridge (1/6)
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

6

of

64

5

4

3

2

16 PM_DRAM_PWRGD

4

SYS_PWROK_XDP

+1.05V_RUN_VTT

JXDP1 @
XDP_PREQ#
XDP_PRDY#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

WůĂĐĞŶĞĂƌ:yWϭ

2 PM_DRAM_PWRGD_CPU
130_0402_5%~D

1
RC28
RC64
39_0402_5%~D

H_CPUPWRGD
D

S

14,16 SIO_PWRBTN#_R
9 CFG0
16,42 SYS_PWROK

QC1
SSM3K7002FU_SC70-3~D

2
G

11,45 RUN_ON_CPU1.5VS3#

2

2

1

RUNPWROK_AND

UC2
74AHC1G09GW_TSSOP5~D

2

O
A

1 1

B

2

G

2
200_0402_5%~D

3

1
RC18

+3.3V_ALW_PCH

3

1

42,43 RUNPWROK
D

P

2

5

CC156
0.1U_0402_16V4Z~D
1
2

1

RC124
@RC124
@
1K_0402_5%~D

RC12
200_0402_5%~D

+3.3V_ALW_PCH

CC65
0.1U_0402_16V4Z~D

+1.5V_CPU_VDDQ

&ŽůůŽǁ'ZĞǀϬ͘ϳϭ^DͺZDWtZK<ƚŽƉŽůŽŐǇ

+1.05V_RUN_VTT

1

+3.3V_ALW_PCH

1

H_CPUPWRGD_XDP
CFD_PWRBTN#_XDP
XDP_HOOK2
SYS_PWROK_XDP
CLK_XDP
CLK_XDP#

RC5
RC6
RC7
@ RC9

1
1
1
1

2
2
2
2

RC8

1

2 1K_0402_5%~D XDP_RST#_R
XDP_DBRESET#

17 PLTRST_XDP#

1K_0402_5%~D
0_0402_5%~D
1K_0402_5%~D
0_0402_5%~D

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS

dŚĞƌĞƐŝƐƚŽƌĨŽƌ,KK<ϮƐŚŽƵůĚďĞƉůĂĐĞĚ
ƐƵĐŚƚŚĂƚƚŚĞƐƚƵďŝƐǀĞƌǇƐŵĂůůŽŶ&'ϬŶĞƚ

+1.05V_RUN_VTT

XDP_TCLK
H_THERMTRIP#
2
56_0402_5%~D
H_CATERR#
2
49.9_0402_1%~D
H_PROCHOT#
2
62_0402_5%~D

C49

PECI

PROCHOT#

2 H_THERMTRIP#_R
0_0402_5%~D

1
RC129

D45

THERMTRIP#

SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PWR MANAGEMENT

C48

PM_SYNC

B

2 VCCPWRGOOD_0_R
0_0402_5%~D

1
RC25

18 H_CPUPWRGD

PM_DRAM_PWRGD_CPU

B46

BE45

PCH_PLTRST#_R

D44

UNCOREPWRGOOD

SM_DRAMPWROK

RESET#

JTAG & BPM

PRDY#
PREQ#

H_PM_SYNC

2
2 0_0402_5%~D
0_0402_5%~D

CLK_CPU_DPLL 15
CLK_CPU_DPLL# 15

N59
N58

CLK_XDP_ITP
CLK_XDP_ITP#

TCK
TMS
TRST#
TDI
TDO

DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

CLK_XDP
CLK_XDP#

1
@ RC48
@RC48

AT30

DDR3_DRAMRST#_CPU

BF44
BE43
BG43

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

DĂǆϱϬϬŵŝůƐ

N53
N55

XDP_PRDY#
XDP_PREQ#

L56
L55
J58

XDP_TCLK
XDP_TMS
XDP_TRST#

M60
L59

XDP_TDI_R
XDP_TDO_R

K58

XDP_DBRESET#_R

2
0_0402_5%~D

3

^DͺZKDWϮͲͲхϭϱŵŝů
^DͺZKDWϭͬϬͲͲхϮϬŵŝů

ƉůĂĐĞZϭϮϵŶĞĂƌWh

16 H_PM_SYNC

1
RC16 1
RC17

1

CC177
0.047U_0402_16V4Z~D

ůŽƐĞƚŽhϭ
22 H_THERMTRIP#

CPU_DPLL
CPU_DPLL#

CLK_XDP_ITP @ RH1091

2 0_0402_5%~D

CLK_XDP_ITP# @ RH1081

2 0_0402_5%~D

CLK_CPU_ITP 15
CLK_CPU_ITP# 15

DDR_HVREF_RST
1

2

2
0_0402_5%~D
2
0_0402_5%~D

1
@ RC47

WhͬWĨŽƌ:d'ƐŝŐŶĂůƐ

@
@
@
@
@
@
@
@

G58
E55
E59
G55
G59
H60
J59
J61

2
RC26

T128
T131
T129
T130
T125
T126
T107
T127

XDP_DBRESET#

1
0_0402_5%~D

B

+3.3V_RUN

XDP_DBRESET# 14,16
XDP_DBRESET#
2
RC19

PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D

C

QC2
BSS138W-7-F_SOT323-3~D

RC46

43 DDR_HVREF_RST_GATE

1 RH107
1 RH106

DDR3_DRAMRST# 12

1

15 DDR_HVREF_RST_PCH

0_0402_5%~D 2
0_0402_5%~D 2

D

C45

AG3
AG1

G

H_PROCHOT#_R
56_0402_5%~D

CLK_CPU_DMI 15
CLK_CPU_DMI# 15

S

2

2
2 0_0402_5%~D
0_0402_5%~D

RC50
4.99K_0402_1%~D

1
RC57

1
RC13 1
RC15

CATERR#

THERMAL

A48

H_PECI

BCLK_ITP
BCLK_ITP#

CPU_DMI
CPU_DMI#

2

H_CATERR#

PROC_DETECT#

DPLL_REF_CLK
DPLL_REF_CLK#

J3
H2

1

42 CPU_DETECT#

PROC_SELECT#

BCLK
BCLK#

2

C57

CLOCKS

C

MISC

F49

43,53,55 H_PROCHOT#

27
28

MOLEX_52435-2671

EDS 1.0 SNB_IVB# -> PROC_SELECT#

18

D

U1B

DDR3
MISC

1
@ RC126
1
@ RC128
1
RC44

OBSFN_A0
OBSFN_A1
GND
OBSDATA_A[0]
OBSDATA_A[1]
GND
OBSDATA_A[2]
OBSDATA_A[3]
GND
HOOK0
HOOK1
HOOK2
HOOK3
HOOK4
HOOK5
VCCOBS_AB
HOOK6
HOOK7
GND
TDO
TRSTn
TDI
TMS
TCK1
GND
GND
GND
TCK0

1
1K_0402_5%~D
+1.05V_RUN_VTT

XDP_TDI_R

1
RC23

XDP_TDI
2
0_0402_5%~D

XDP_TDO_R

1
RC24

XDP_TDO
2
0_0402_5%~D

XDP_TMS

RC27 2

1 51_0402_1%~D

XDP_TDI_R

RC29 2

1 51_0402_1%~D

XDP_PREQ# @
@RC32
RC32 2

1 51_0402_1%~D

XDP_TDO

RC35 2

1 51_0402_1%~D

XDP_TCLK

RC40 2

1

XDP_TRST#

RC41 2

1

SANDY-BRIDGE_BGA1023~D

ƵĨĨĞƌĞĚƌĞƐĞƚƚŽWh

51_0402_1%~D

+3.3V_RUN
VCCPWRGOOD_0_R

5

1
2

1

1
2

ǀŽŝĚƐƚƵďŝŶƚŚĞWtZ'ƉĂƚŚǁŚŝůĞƉůĂĐŝŶŐƌĞƐŝƐƚŽƌƐZϮϱΘZϭϯϬ

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

3

RC11
0_0402_5%~D

UC1
SN74LVC1G07DCKR_SC70-5~D

1
2 PCH_PLTRST#_R
RC10
43_0402_5%~D
@

A

1

4PCH_PLTRST#_BUF

G

Y

2

1
2

1
2

5
A

P

NC

2

RC45
200_0402_1%~D

1

RC43
25.5_0402_1%~D

14,17 PCH_PLTRST#

SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
RC42
140_0402_1%~D

A

RC130
10K_0402_5%~D

RC4
75_0402_1%~D

2

CC140
0.1U_0402_16V4Z~D

1

51_0402_1%~D

+1.05V_RUN_VTT

4

3

2

Title

Sandy Bridge (2/6)
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

7

of

64

5

4

3

2

1

U1D
U1C

13 DDR_B_D[0..63]

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

C

B

12 DDR_A_BS0
12 DDR_A_BS1
12 DDR_A_BS2

12 DDR_A_CAS#
12 DDR_A_RAS#
12 DDR_A_WE#

AG6
AJ6
AP11
AL6
AJ10
AJ8
AL8
AL7
AR11
AP6
AU6
AV9
AR6
AP8
AT13
AU13
BC7
BB7
BA13
BB11
BA7
BA9
BB9
AY13
AV14
AR14
AY17
AR19
BA14
AU14
BB14
BB17
BA45
AR43
AW48
BC48
BC45
AR45
AT48
AY48
BA49
AV49
BB51
AY53
BB49
AU49
BA53
BB55
BA55
AV56
AP50
AP53
AV54
AT54
AP56
AP52
AN57
AN53
AG56
AG53
AN55
AN52
AG55
AK56

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

BD37
BF36
BA28

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#

BE39
BD39
AT41

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

AU36
AV36
AY26

M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA

SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]

AT40
AU40
BB26

M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA

SA_CS#[0]
SA_CS#[1]

BB40
BC41

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#

AY40
BA41

M_ODT0
M_ODT1

AL11
AR8
AV11
AT17
AV45
AY51
AT55
AK55

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

AJ11
AR10
AY11
AU17
AW45
AV51
AT56
AK54

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

BG35
BB34
BE35
BD35
AT34
AU34
BB32
AT32
AY32
AV32
BE37
BA30
BC30
AW41
AY28
AU26

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]

SA_ODT[0]
SA_ODT[1]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

M_CLK_DDR0 12
M_CLK_DDR#0 12
DDR_CKE0_DIMMA 12

M_CLK_DDR1 12
M_CLK_DDR#1 12
DDR_CKE1_DIMMA 12

DDR_CS0_DIMMA# 12
DDR_CS1_DIMMA# 12

M_ODT0
M_ODT1

12
12

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

12

12

DDR_A_MA[0..15] 12
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

13 DDR_B_BS0
13 DDR_B_BS1
13 DDR_B_BS2

13 DDR_B_CAS#
13 DDR_B_RAS#
13 DDR_B_WE#

D

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AL4
AL1
AN3
AR4
AK4
AK3
AN4
AR1
AU4
AT2
AV4
BA4
AU3
AR3
AY2
BA3
BE9
BD9
BD13
BF12
BF8
BD10
BD14
BE13
BF16
BE17
BE18
BE21
BE14
BG14
BG18
BF19
BD50
BF48
BD53
BF52
BD49
BE49
BD54
BE53
BF56
BE57
BC59
AY60
BE54
BG54
BA58
AW59
AW58
AU58
AN61
AN59
AU59
AU61
AN58
AR58
AK58
AL58
AG58
AG59
AM60
AL59
AF61
AH60

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

BG39
BD42
AT22

SB_BS[0]
SB_BS[1]
SB_BS[2]

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#

AV43
BF40
BD45

SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]

BA34
AY34
AR22

M_CLK_DDR2
M_CLK_DDR#2
DDR_CKE2_DIMMB

SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]

BA36
BB36
BF27

M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB

BE41
BE47

DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

DDR SYSTEM MEMORY B

12 DDR_A_D[0..63]

DDR SYSTEM MEMORY A

D

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

AT43
BG47

M_ODT2
M_ODT3

M_CLK_DDR2 13
M_CLK_DDR#2 13
DDR_CKE2_DIMMB 13

M_CLK_DDR3 13
M_CLK_DDR#3 13
DDR_CKE3_DIMMB 13

DDR_CS2_DIMMB# 13
DDR_CS3_DIMMB# 13

M_ODT2
M_ODT3

13
13

AL3
AV3
BG11
BD17
BG51
BA59
AT60
AK59

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS#[0..7]

13

AM2
AV1
BE11
BD18
BE51
BA61
AR59
AK61

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_DQS[0..7]

13

C

DDR_B_MA[0..15] 13
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

SB_CAS#
SB_RAS#
SB_WE#

BF32
BE33
BD33
AU30
BD30
AV30
BG30
BD29
BE30
BE28
BD43
AT28
AV28
BD46
AT26
AU22

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

B

SANDY-BRIDGE_BGA1023~D
SANDY-BRIDGE_BGA1023~D

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

Title

Sandy Bridge (3/6)
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

8

of

64

5

4

3

2

1

&'^ƚƌĂƉƐĨŽƌWƌŽĐĞƐƐŽƌ

2

D

@ RC51
1K_0402_1%~D

1

CFG2

D

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

U1E

H_CPU_RSVD3
2
49.9_0402_1%~D

PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D

+VCC_GFXCORE

1
@ RC122

H43
K43

VCC_VAL_SENSE
VSS_VAL_SENSE

H_CPU_RSVD1
H_CPU_RSVD2

H45
K45

VAXG_VAL_SENSE
VSSAXG_VAL_SENSE

H_CPU_RSVD1
2
49.9_0402_1%~D

EDS 1.0 RSVD_12 -> VCC_DIE_SENSE
TP_VCC_DIESENSE
PAD~D T22 @

+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D

B

T25
T26
T27
T28
T29
T30
T31
T32
T33
T34
T35
T36
T37
T38
T39
T40
T41
T42
T43
T44

@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@

F48

+DIMM0_1_VREF_CPU H48
+DIMM0_1_CA_CPU
K48
TP_CPU_RSVD8
TP_CPU_RSVD9
TP_CPU_RSVD10
TP_CPU_RSVD11
TP_CPU_RSVD12
TP_CPU_RSVD13
TP_CPU_RSVD14
TP_CPU_RSVD15
TP_CPU_RSVD16
TP_CPU_RSVD17
TP_CPU_RSVD18
TP_CPU_RSVD19
TP_CPU_RSVD20
TP_CPU_RSVD21
TP_CPU_RSVD22
TP_CPU_RSVD23
TP_CPU_RSVD24
TP_CPU_RSVD25
TP_CPU_RSVD26
TP_CPU_RSVD27

BA19
AV19
AT21
BB21
BB19
AY21
BA22
AY22
AU19
AU21
BD21
BD22
BD25
BD26
BG22
BE22
BG26
BE26
BF23
BE24

@ T45
@ T46

PAD~D
PAD~D

RSVD30
RSVD31
RSVD32
RSVD33

N42
L42
L45
L47

TP_CPU_RSVD30
TP_CPU_RSVD31
TP_CPU_RSVD32
TP_CPU_RSVD33

@
@
@
@

T47
T48
T49
T50

PAD~D
PAD~D
PAD~D
PAD~D

RSVD34
RSVD35
RSVD36
RSVD37
RSVD38

M13
M14
U14
W14
P13

TP_CPU_RSVD34
TP_CPU_RSVD35
TP_CPU_RSVD36
TP_CPU_RSVD37
TP_CPU_RSVD38

@
@
@
@
@

T51
T52
T53
T55
T109

PAD~D
PAD~D
PAD~D
PAD~D
PAD~D

RSVD39
RSVD40

AT49
K24

TP_CPU_RSVD39
TP_CPU_RSVD40

@ T110 PAD~D
@ T111 PAD~D

RSVD41
RSVD42
RSVD43
RSVD44

AH2
AG13
AM14
AM15

TP_CPU_RSVD41
TP_CPU_RSVD42
TP_CPU_RSVD43
TP_CPU_RSVD44

@
@
@
@

N50

TP_CPU_RSVD45

@ T116 PAD~D

CFG4
1

TP_CPU_RSVD28
TP_CPU_RSVD29

RSVD45

T112
T113
T114
T115

2

Display Port Presence Strap

CFG4

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

PAD~D
PAD~D
PAD~D
PAD~D

CFG6

VCC_DIE_SENSE

CFG5

RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

C

1 : Disabled; No Physical Display Port
attached to Embedded Display Port

DC_TEST_A4
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_C59
DC_TEST_A61
DC_TEST_C61
DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1

A4
C4
D3
D1
A58
A59
C59
A61
C61
D61
BD61
BE61
BE59
BG61
BG59
BG58
BG4
BG3
BE3
BG1
BE1
BD1

TP_DC_TEST_A4

@ T117 PAD~D

DC_TEST_C4_D3
TP_DC_TEST_D1
TP_DC_TEST_A58

@ T118 PAD~D
@ T119 PAD~D

@ RC53
1K_0402_1%~D

H_CPU_RSVD2
2
49.9_0402_1%~D
H_CPU_RSVD4
2
49.9_0402_1%~D
+DIMM0_1_VREF_CPU
1
1K_0402_5%~D
+DIMM0_1_CA_CPU
1
1K_0402_5%~D

BE7
BG7

@ RC54
1K_0402_1%~D

1
@ RC121
1
@ RC123
2
@ RC96
2
@ RC97

H_CPU_RSVD3
H_CPU_RSVD4

RSVD28
RSVD29

1

1
@ RC120
C

@ T17
@ T18
@ T15
@ T19
@ T9
@ T10
@ T12
@ T14
@ T21
@ T20

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]

1

+VCC_CORE

B50
C51
B54
D53
A51
C53
C55
H49
A55
H51
K49
K53
F53
G53
L51
F51
D52
L53

2

@ T13 PAD~D

@ RC52
1K_0402_1%~D

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

@ T11 PAD~D

2

CFG0

RESERVED

7

1:(Default) Normal Operation; Lane #
definition matches socket pin map definition
0:Lane Reversed

DC_TEST_A59_C59
DC_TEST_A61_C61
TP_DC_TEST_D61
TP_DC_TEST_BD61

@ T120 PAD~D
@ T121 PAD~D

PCIE Port Bifurcation Straps

DC_TEST_BE59_BE61
DC_TEST_BG59_BG61
TP_DC_TEST_BG58
TP_DC_TEST_BG4

@ T122 PAD~D
@ T123 PAD~D

11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG[6:5]

DC_TEST_BE3_BG3
DC_TEST_BE1_BG1
TP_DC_TEST_BD1

@ T124 PAD~D

B

10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

SANDY-BRIDGE_BGA1023~D

2

@ RC56
1K_0402_1%~D

1

CFG7

PEG DEFER TRAINING

CFG7

1: (Default) PEG Train immediately
following xxRESETB de assertion
0: PEG Wait for BIOS for training

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Sandy Bridge (4/6)
Size

4

3

2

Rev
0.3

LA-6611P
Date:

5

Document Number
Wednesday, January 26, 2011

Sheet
1

9

of

64

5

4

3

2

1

U1F
+1.05V_RUN_VTT

+VCC_CORE

8.5A

53A

2 3

D

+
2

1
+
2

C

1
RC60
75_0402_1%~D

EŽƚĞ͗WůĂĐĞƚŚĞWhƌĞƐŝƐƚŽƌƐĐůŽƐĞƚŽWh
ZϭϱϱϱĐůŽƐĞƚŽWhϯϬϬͲϭϱϬϬŵŝůƐ
2

PEG AND DDR

POWER

2

H_CPU_SVIDALRT#
1
RC61

2
43_0402_5%~D

RC62
2
1
0_0402_5%~D

53

+3.3V_ALW_PCH
1

+1.05V_RUN_VTT_F

VIDALERT_N

EŽƚĞ͗WůĂĐĞƚŚĞWh
ƌĞƐŝƐƚŽƌƐĐůŽƐĞƚŽWh
ZϭϱϱϴĐůŽƐĞƚŽWhϯϬϬͲϭϱϬϬŵŝůƐ

2

AM25
AN22
1

2

VIDALERT#
VIDSCLK
VIDSOUT

A44
B43
C44

+1.05V_RUN_VTT

H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT

Voltage Rail

Voltage

VCC

0.65-1.3

S0 Iccmax
Current (A)

1.05

VCCIO

8.5

+1.05V_RUN_VTT

33

0.0-1.1

VAXG
RC63
130_0402_1%~D
VIDSCLK

53

VIDSOUT
+VCC_CORE

VCCPLL

1.8

1.2

VDDQ

1.5

10

53

0.65-0.9

VCCSA
+1.5V_MEM

6

1.5

12-16

*

RC66
100_0402_1%~D

WůĂĐĞZϲϲĂŶĚZϳϬŶĞĂƌWh

CC131
470U_D2_2V-M~D

+

CC132
470U_D2_2V-M~D

2 3

VCC_SENSE
VSS_SENSE

VCCIO_SENSE
VSS_SENSE_VCCIO

F43
G43

VCCSENSE_R
VSSSENSE_R

2

1

A

RC67 1
RC68 1

2 0_0402_5%~D
2 0_0402_5%~D

VCCSENSE
VSSSENSE

AN16 VTT_SENSE_R RC1321
AN17 VSSIO_SENSE_R RC1331

2 0_0402_5%~D
2 0_0402_5%~D

VTT_SENSE
VTT_GND

RC70
100_0402_1%~D

52
52

53
53

*

Description

5A to Mem controller(+1.5V_CPU_VDDQ)
5-6A to 2 DIMMs/channel
2-5A to +1.5V_RUN & +0.75V_DDR_VTT
A

DELL CONFIDENTIAL/PROPRIETARY

SANDY-BRIDGE_BGA1023~D

Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Sandy Bridge (5/6)
Size

4

3

2

Document Number

Rev
0.3

LA-6611P
Date:

5

B

53

1

QUIET RAILS
SVID

VCCPQE[1]
VCCPQE[2]

CPU Power Rail Table

1

0_0402_5%~D

2

BC22

2

RC65
VCCIO_SEL

1
2 3

+

2

+1.05V_RUN_VTT

1

CC130
470U_D2_2V-M~D

1

2

+

2

RC69
10K_0402_5%~D

SENSE LINES

2 3

CC129
470U_D2_2V-M~D

1

1

1U_0402_6.3V6K~D
CC92

+

1

2

1U_0402_6.3V6K~D
CC91

W16
W17

1

330U_D2_2VM_R6M~D
CC108

2

1

1

330U_D2_2VM_R6M~D
CC107

2

1

10U_0603_6.3V6M~D
CC239

2

1

10U_0603_6.3V6M~D
CC232

2

1

10U_0603_6.3V6M~D
CC231

2

1

10U_0603_6.3V6M~D
CC230

2

1

10U_0603_6.3V6M~D
CC229

1

10U_0603_6.3V6M~D
CC228

2

10U_0603_6.3V6M~D
CC247

2

1

10U_0603_6.3V6M~D
CC246

2

10U_0603_6.3V6M~D
CC245

AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15

1

>ŽǁͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ
1

2

2

>ŽǁͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ

+1.05V_RUN_VTT

VCCIO50
VCCIO51

1

1

1U_0402_6.3V6K~D
CC90

2

2

1U_0402_6.3V6K~D
CC89

1

1

1U_0402_6.3V6K~D
CC78

2

2

1U_0402_6.3V6K~D
CC235

1

1

1U_0402_6.3V6K~D
CC93

2

2

1U_0402_6.3V6K~D
CC86

1

1

1U_0402_6.3V6K~D
CC226

2

2

1U_0402_6.3V6K~D
CC70

1

1

1U_0402_6.3V6K~D
CC109

2

2

1U_0402_6.3V6K~D
CC85

1

1

1U_0402_6.3V6K~D
CC227

2

2

1U_0402_6.3V6K~D
CC84

1

1

1U_0402_6.3V6K~D
CC237

2

2

1U_0402_6.3V6K~D
CC236

1

1

1U_0402_6.3V6K~D
CC83

2

1U_0402_6.3V6K~D
CC82

2

1

1U_0402_6.3V6K~D
CC234

1

1U_0402_6.3V6K~D
CC81

2

2

DŝĚͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ
1

VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]

1

1

1U_0402_6.3V6K~D
CC233

2

2

1U_0402_6.3V6K~D
CC80

1

1

1U_0402_6.3V6K~D
CC238

2

2

CC573
1U_0402_6.3V6K~D

1

2

22U_0805_6.3VAM~D
CC195

2

2

1

CC197
22U_0805_6.3VAM~D

1

1

22U_0805_6.3VAM~D
CC194

2

2

22U_0805_6.3VAM~D
CC193

1

1

22U_0805_6.3VAM~D
CC192

2

22U_0805_6.3VAM~D
CC190

2

1

22U_0805_6.3VAM~D
CC185

2

1

22U_0805_6.3VAM~D
CC188

1

2

22U_0805_6.3VAM~D
CC184

2

2

1

22U_0805_6.3VAM~D
CC189

1

1

22U_0805_6.3VAM~D
CC183

2

2

22U_0805_6.3VAM~D
CC187

1

1

22U_0805_6.3VAM~D
CC182

2

2

22U_0805_6.3VAM~D
CC186

1

1

22U_0805_6.3VAM~D
CC181

2

2

22U_0805_6.3VAM~D
CC119

1

1

22U_0805_6.3VAM~D
CC114

2

2

22U_0805_6.3VAM~D
CC118

1

1

22U_0805_6.3VAM~D
CC113

2

2

22U_0805_6.3VAM~D
CC117

1

22U_0805_6.3VAM~D
CC116

2

22U_0805_6.3VAM~D
CC115

1

2

1

22U_0805_6.3VAM~D
CC112

2

1

22U_0805_6.3VAM~D
CC111

B

22U_0805_6.3VAM~D
CC110

1

1

10U_0603_6.3V6M~D
CC244

DŝĚͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ

,ŝŐŚͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ

1U_0402_6.3V6K~D
CC243

2

2

CORE SUPPLY

2

@

1

CC158
2.2U_0402_6.3V6M~D

2

1

CC159
2.2U_0402_6.3V6M~D

1

CC160
2.2U_0402_6.3V6M~D

2

CC155
2.2U_0402_6.3V6M~D

1

2

1

CC196
2.2U_0402_6.3V6M~D

2

1

CC191
2.2U_0402_6.3V6M~D

2

1

CC106
2.2U_0402_6.3V6M~D

1

2

CC74
2.2U_0402_6.3V6M~D

@

2

1

CC198
2.2U_0402_6.3V6M~D

2

1

CC73
2.2U_0402_6.3V6M~D

1

CC121
2.2U_0402_6.3V6M~D

2

2

CC99
2.2U_0402_6.3V6M~D

1

1

CC88
2.2U_0402_6.3V6M~D

2

CC72
2.2U_0402_6.3V6M~D

2

CC98
2.2U_0402_6.3V6M~D

2

2

1

CC157
2.2U_0402_6.3V6M~D

1

1

CC71
2.2U_0402_6.3V6M~D

2

2

1

CC201
2.2U_0402_6.3V6M~D

2

@

CC154
2.2U_0402_6.3V6M~D

1

1

1

CC100
2.2U_0402_6.3V6M~D

2

@

2

CC87
2.2U_0402_6.3V6M~D

1

1

CC143
2.2U_0402_6.3V6M~D

2

2

CC97
2.2U_0402_6.3V6M~D

2

1

1

CC77
2.2U_0402_6.3V6M~D

1

2

CC127
2.2U_0402_6.3V6M~D

2

2

1

CC96
2.2U_0402_6.3V6M~D

1

1

CC123
2.2U_0402_6.3V6M~D

2

2

2

CC152
2.2U_0402_6.3V6M~D

1

1

1

CC125
2.2U_0402_6.3V6M~D

2

2

CC95
2.2U_0402_6.3V6M~D

1

CC151
2.2U_0402_6.3V6M~D

2

CC148
2.2U_0402_6.3V6M~D

1

2

1

CC76
2.2U_0402_6.3V6M~D

2

1

CC124
2.2U_0402_6.3V6M~D

1

CC122
2.2U_0402_6.3V6M~D

C

2

CC94
2.2U_0402_6.3V6M~D

2

CC104
2.2U_0402_6.3V6M~D

1

1

CC75
2.2U_0402_6.3V6M~D

2

CC67
2.2U_0402_6.3V6M~D

1

VCC[1]
VCC[2]
VCC[3]
VCC[4]
VCC[5]
VCC[6]
VCC[7]
VCC[8]
VCC[9]
VCC[10]
VCC[11]
VCC[12]
VCC[13]
VCC[14]
VCC[15]
VCC[16]
VCC[17]
VCC[18]
VCC[19]
VCC[20]
VCC[21]
VCC[22]
VCC[23]
VCC[24]
VCC[25]
VCC[26]
VCC[27]
VCC[28]
VCC[29]
VCC[30]
VCC[31]
VCC[32]
VCC[33]
VCC[34]
VCC[35]
VCC[36]
VCC[37]
VCC[38]
VCC[39]
VCC[40]
VCC[41]
VCC[42]
VCC[43]
VCC[44]
VCC[45]
VCC[46]
VCC[47]
VCC[48]
VCC[49]
VCC[50]
VCC[51]
VCC[52]
VCC[53]
VCC[54]
VCC[55]
VCC[56]
VCC[57]
VCC[58]
VCC[59]
VCC[60]
VCC[61]
VCC[62]
VCC[63]
VCC[64]
VCC[66]
VCC[67]
VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]

AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48

1U_0402_6.3V6K~D
CC79

,ŝŐŚͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ

VCCIO[1]
VCCIO[3]
VCCIO[4]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCIO[9]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]

1U_0402_6.3V6K~D
CC69

+VCC_CORE

D

A26
A29
A31
A34
A35
A38
A39
A42
C26
C27
C32
C34
C37
C39
C42
D27
D32
D34
D37
D39
D42
E26
E28
E32
E34
E37
E38
F25
F26
F28
F32
F34
F37
F38
F42
G42
H25
H26
H28
H29
H32
H34
H35
H37
H38
H40
J25
J26
J28
J29
J32
J34
J35
J37
J38
J40
J42
K26
K27
K29
K32
K34
K35
K37
K39
K42
L25
L28
L33
L36
L40
N26
N30
N34
N38

Wednesday, January 26, 2011

Sheet
1

10

of

64

4

3

1
@ RC77

2
0_0402_5%~D

1
RC79

2
0_0402_5%~D

2

2

QC4B
DMN66D0LDW-7_SOT363-6~D

5

1

43 CPU1.5V_S3_GATE

4

1

D

RUN_ON_CPU1.5VS3# 7,45

U1G
+VCC_GFXCORE

2

1

RUN_ON_CPU1.5VS3

A13
A17
A21
A25
A28
A33
A37
A40
A45
A49
A53
A9
AA1
AA13
AA50
AA51
AA52
AA53
AA55
AA56
AA8
AB16
AB18
AB21
AB48
AB61
AC10
AC14
AC46
AC6
AD17
AD20
AD4
AD61
AE13
AE8
AF1
AF17
AF21
AF47
AF48
AF50
AF51
AF52
AF53
AF55
AF56
AF58
AF59
AG10
AG14
AG18
AG47
AG52
AG61
AG7
AH4
AH58
AJ13
AJ16
AJ20
AJ22
AJ26
AJ30
AJ34
AJ38
AJ42
AJ45
AJ48
AJ7
AK1
AK52
AL10
AL13
AL17
AL21
AL25
AL28
AL33
AL36
AL40
AL43
AL47
AL61
AM13
AM20
AM22
AM26
AM30
AM34

нϭ͘ϱsͺWhͺsY^ŽƵƌĐĞ

@ CC202

2

1 0.1U_0402_10V7K~D

@ CC173

2

1 0.1U_0402_10V7K~D

CC149

2

1 0.1U_0402_10V7K~D

CC150

2

1 0.1U_0402_10V7K~D

+1.5V_MEM

,ŝŐŚͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ

2

1

2

1

2

1U_0402_6.3V6K~D
CC259

2

1

1U_0402_6.3V6K~D
CC258

2

1

1U_0402_6.3V6K~D
CC257

2

1

1U_0402_6.3V6K~D
CC256

2

1

1U_0402_6.3V6K~D
CC255

2

1

1U_0402_6.3V6K~D
CC254

2

1

1U_0402_6.3V6K~D
CC253

1

1U_0402_6.3V6K~D
CC252

- 1.5V RAILS

+1.5V_CPU_VDDQ

1

2

DŝĚͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ

2

1

2

1

2

10U_0603_6.3V6M~D
CC179

2

1

10U_0603_6.3V6M~D
CC178

2

1

10U_0603_6.3V6M~D
CC166

+
2

2

1

10U_0603_6.3V6M~D
CC165

1

2

1

10U_0603_6.3V6M~D
CC164

2

1

10U_0603_6.3V6M~D
CC163

1

10U_0603_6.3V6M~D
CC162

VDDQ[1]
VDDQ[2]
VDDQ[3]
VDDQ[4]
VDDQ[5]
VDDQ[6]
VDDQ[7]
VDDQ[8]
VDDQ[9]
VDDQ[10]
VDDQ[11]
VDDQ[12]
VDDQ[13]
VDDQ[14]
VDDQ[15]
VDDQ[16]
VDDQ[17]
VDDQ[18]
VDDQ[19]
VDDQ[20]
VDDQ[21]
VDDQ[22]
VDDQ[23]
VDDQ[24]
VDDQ[25]
VDDQ[26]

1U_0402_6.3V6K~D
CC251

B

нsͺ^DͺsZ&ƐŚŽƵůĚŚĂǀĞϭϬŵŝů
ƚƌĂĐĞǁŝĚƚŚ

5A
AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33

CC167
330U_D2_2VM_R6M~D

ϰͬϮϬZĞŵŽǀĞϮϲϱ͕ϭϳϯĚƵĞƚŽWŽǁĞƌĐŝƌĐƵŝƚĂůƌĞĂĚǇŚĂƐ
WϮϬϭ͕WϮϬϮ͕

AY43

10U_0603_6.3V6M~D
CC161

2

SM_VREF

>ŽǁͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ

2

+
2

L17
L21
N16
N20
N22
P17
P20
R16
R18
R21
U15
V16
V17
V18
V21
W20

VCCPLL[1]
VCCPLL[2]
VCCPLL[3]

VCCSA[1]
VCCSA[2]
VCCSA[3]
VCCSA[4]
VCCSA[5]
VCCSA[6]
VCCSA[7]
VCCSA[8]
VCCSA[9]
VCCSA[10]
VCCSA[11]
VCCSA[12]
VCCSA[13]
VCCSA[14]
VCCSA[15]
VCCSA[16]

SENSE LINES

1

BB3
BC1
BC4

SA RAIL

1

6A

CC172
330U_D2_2VM_R6M~D

2

+
2

10U_0603_6.3V6M~D
CC17

2

1

10U_0603_6.3V6M~D
CC170

2

1

10U_0603_6.3V6M~D
CC169

2

1

10U_0603_6.3V6M~D
CC168

2
0_0402_5%~D

2

1

10U_0603_6.3V6M~D
CC180

1
RC137

2

1

1U_0402_6.3V6K~D
CC260

2

1

1U_0402_6.3V6K~D
CC261

2

1

1U_0402_6.3V6K~D
CC262

1

1U_0402_6.3V6K~D
CC263

2

1U_0402_6.3V6K~D
CC264

1
A

2

1

CC176
330U_V_2.5MV~D

+VCC_SA

1

CC175
1U_0402_6.3V6K~D

2

CC174
1U_0402_6.3V6K~D

1

VCCDQ[1]
VCCDQ[2]

1

2

VDDQ_SENSE
VSS_SENSE_VDDQ

CC574
1U_0402_6.3V6K~D

+1.8V_RUN

VAXG_SENSE
VSSAXG_SENSE

1.8V RAIL

1.2A

SENSE
LINES

F45
G45

53 VCC_AXG_SENSE
53 VSS_AXG_SENSE

QUIET RAILS

+1.5V_CPU_VDDQ

AM28
AN26

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]

VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]

VSS

AM38
AM4
AM42
AM45
AM48
AM58
AN1
AN21
AN25
AN28
AN33
AN36
AN40
AN43
AN47
AN50
AN54
AP10
AP51
AP55
AP7
AR13
AR17
AR21
AR41
AR48
AR61
AR7
AT14
AT19
AT36
AT4
AT45
AT52
AT58
AU1
AU11
AU28
AU32
AU51
AU7
AV17
AV21
AV22
AV34
AV40
AV48
AV55
AW13
AW43
AW61
AW7
AY14
AY19
AY30
AY36
AY4
AY41
AY45
AY49
AY55
AY58
AY9
BA1
BA11
BA17
BA21
BA26
BA32
BA48
BA51
BB53
BC13
BC5
BC57
BD12
BD16
BD19
BD23
BD27
BD32
BD36
BD40
BD44
BD48
BD52
BD56
BD8
BE5
BG13

D

C

B

BC43
BA43
SANDY-BRIDGE_BGA1023~D

VCCSA_SENSE

VCCSA_VID[0]
VCCSA_VID[1]

U10

+VCCSA_SENSE 56

D48
D49 H_VCCSA_VID1_R 1
RC138

H_VCCSA_VID0
2
0_0402_5%~D

A

DELL CONFIDENTIAL/PROPRIETARY

H_VCCSA_VID0 56
H_VCCSA_VID1 56

Compal Electronics, Inc.
Title

Sandy Bridge (6/6)

+GND_VCC_SA 56

Size
SANDY-BRIDGE_BGA1023~D
4

Document Number

Rev
0.3

LA-6611P
Date:

5

U1H

3

+V_SM_VREF_CNT

GRAPHICS

2

1

1U_0402_6.3V6K~D
CC297

2

1

1U_0402_6.3V6K~D
CC294

2

1

1U_0402_6.3V6K~D
CC296

2

1

1U_0402_6.3V6K~D
CC293

2

1

1U_0402_6.3V6K~D
CC292

2

1

1U_0402_6.3V6K~D
CC291

2

1

1U_0402_6.3V6K~D
CC290

2

1

1U_0402_6.3V6K~D
CC289

2

1

1U_0402_6.3V6K~D
CC288

1

1U_0402_6.3V6K~D
CC287

2

1U_0402_6.3V6K~D
CC286

1

1

CC136
4700P_0402_25V7K~D

1U_0402_6.3V6K~D
CC250

DŝĚͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ

VAXG[1]
VAXG[2]
VAXG[3]
VAXG[4]
VAXG[5]
VAXG[6]
VAXG[7]
VAXG[8]
VAXG[9]
VAXG[10]
VAXG[11]
VAXG[12]
VAXG[13]
VAXG[14]
VAXG[15]
VAXG[16]
VAXG[17]
VAXG[18]
VAXG[19]
VAXG[20]
VAXG[21]
VAXG[22]
VAXG[23]
VAXG[24]
VAXG[25]
VAXG[26]
VAXG[27]
VAXG[28]
VAXG[29]
VAXG[30]
VAXG[31]
VAXG[32]
VAXG[33]
VAXG[34]
VAXG[35]
VAXG[36]
VAXG[37]
VAXG[38]
VAXG[39]
VAXG[40]
VAXG[41]
VAXG[42]
VAXG[43]
VAXG[44]
VAXG[45]
VAXG[46]
VAXG[47]
VAXG[48]
VAXG[49]
VAXG[50]
VAXG[51]
VAXG[52]
VAXG[53]
VAXG[54]
VAXG[55]
VAXG[56]

DDR3

2

AA46
AB47
AB50
AB51
AB52
AB53
AB55
AB56
AB58
AB59
AC61
AD47
AD48
AD50
AD51
AD52
AD53
AD55
AD56
AD58
AD59
AE46
N45
P47
P48
P50
P51
P52
P53
P55
P56
P61
T48
T58
T59
T61
U46
V47
V48
V50
V51
V52
V53
V55
V56
V58
V59
W50
W51
W52
W53
W55
W56
W61
Y48
Y61

POWER

2

1

10U_0603_6.3V6M~D
CC283

2

1

10U_0603_6.3V6M~D
CC282

2

1

10U_0603_6.3V6M~D
CC281

2

1

10U_0603_6.3V6M~D
CC280

2

1

CC147
22U_0805_6.3VAM~D

2

1

CC146
22U_0805_6.3VAM~D

1

CC145
22U_0805_6.3VAM~D

2

2

CC144
22U_0805_6.3VAM~D

1

CC138
22U_0805_6.3VAM~D

2

1

10U_0603_6.3V6M~D
CC285

2
C

10U_0603_6.3V6M~D
CC284

1

CC137
22U_0805_6.3VAM~D

2

1

@

33A

,ŝŐŚͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ
1

2

2
0_0402_5%~D
QC5
+V_SM_VREF_CNT
NTR4503NT1G_SOT23-3~D

1

1

RUN_ON_CPU1.5VS3

2

1
3

2

1
38,42,45,50 RUN_ON

QC4A
DMN66D0LDW-7_SOT363-6~D

1
@ RC134

RC78
100K_0402_5%~D

6 2

RUN_ON_CPU1.5VS3#

1

+V_DDR_REF

1
2
3

RC73
20K_0402_5%~D

RC74
100K_0402_5%~D

+1.5V_CPU_VDDQ
QC3
AO4728L_SO8~D
8
7
6
5

CC135
10U_0805_6.3V6M~D

RC72
100K_0402_5%~D

+3.3V_ALW2

2

+1.5V_MEM

2

+15V_ALW

4

5

3

2

Wednesday, January 26, 2011

Sheet
1

11

of

64

3

+DIMM0_1_VREF_DQ
RD11
@RD7
@
RD71

+V_DDR_REF
+DIMM0_1_VREF_CPU

8 DDR_A_MA[0..15]

2

1

2

ůůsZ&ƚƌĂĐĞƐƐŚŽƵůĚ
ŚĂǀĞϭϬŵŝůƚƌĂĐĞǁŝĚƚŚ

D

DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11

>ĂǇŽƵƚEŽƚĞ͗
WůĂĐĞŶĞĂƌ:/DD

EŽƚĞ͗
ŚĞĐŬǀŽůƚĂŐĞƚŽůĞƌĂŶĐĞŽĨ
sZ&ͺYĂƚƚŚĞ/DDƐŽĐŬĞƚ

+1.5V_MEM

2

1

DDR_A_DQS#2
DDR_A_DQS2

2

DDR_A_D24
DDR_A_D25

CD6
1U_0402_6.3V6K~D

2

1

CD5
1U_0402_6.3V6K~D

1

CD4
1U_0402_6.3V6K~D

2

DDR_A_D16
DDR_A_D17

DDR_A_D18
DDR_A_D19

CD3
1U_0402_6.3V6K~D

1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

DDR_A_D0
DDR_A_D1

CD2
0.1U_0402_16V4Z~D

WŽƉƵůĂƚĞZϭĨŽƌ/ŶƚĞůZϯ
sZ&YŵƵůƚŝƉůĞŵĞƚŚŽĚƐDϭ

CD1
2.2U_0603_6.3V6K~D

1

8 DDR_A_D[0..63]
8 DDR_A_DQS[0..7]

DDR_A_D26
DDR_A_D27

8 DDR_CKE0_DIMMA
8

DDR_CKE0_DIMMA

DDR_A_BS2

+1.5V_MEM

DDR_A_BS2
DDR_A_MA12
DDR_A_MA9

C

1

2

DDR_A_MA3
DDR_A_MA1

1
+

CD14

2

DDR_A_MA8
DDR_A_MA5
330U_SX_2VY~D
@ CD13

2

1

10U_0603_6.3V6M~D
CD12

2

1

10U_0603_6.3V6M~D
CD11

2

1

10U_0603_6.3V6M~D
CD10

2

1

10U_0603_6.3V6M~D
CD9

1

10U_0603_6.3V6M~D
CD8

2

10U_0603_6.3V6M~D
CD7

10U_0603_6.3V6M~D

1

8 M_CLK_DDR0
8 M_CLK_DDR#0

2

8

DDR_A_BS0

8
8

DDR_A_WE#
DDR_A_CAS#

8 DDR_CS1_DIMMA#

M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#

DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
+0.75V_DDR_VTT
DDR_A_D40
DDR_A_D41
B

2

1

2

CD20
1U_0402_6.3V6K~D

1

CD19
1U_0402_6.3V6K~D

2

CD18
1U_0402_6.3V6K~D

CD17
1U_0402_6.3V6K~D

2

1

DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57

DDR_A_D58
DDR_A_D59
RD21
1
RD3

2 10K_0402_5%~D
+3.3V_RUN
2
10K_0402_5%~D

+0.75V_DDR_VTT

2

1

2

CD22
2.2U_0603_6.3V6K~D

A

CD21
0.1U_0402_16V4Z~D

1

205

CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
GND1

CONN@
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
+1.5V_MEM

DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13

RD27
1K_0402_1%~D
DDR_A_D14
DDR_A_D15

DDR3_DRAMRST#_R

13 DDR3_DRAMRST#_R

1
RD28

2
1K_0402_1%~D

DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31

DDR_CKE1_DIMMA

DDR_CKE1_DIMMA 8

DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
C

DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1

M_CLK_DDR1 8
M_CLK_DDR#1 8
DDR_A_BS1 8
DDR_A_RAS# 8
DDR_CS0_DIMMA# 8
M_ODT0
8
+DIMM0_1_VREF_CA
M_ODT1
8

DDR_A_D36
DDR_A_D37

DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45

1

1

2

2

0_0402_5%~D 2

1 RD29

+V_DDR_REF

0_0402_5%~D 2

1 RD31 @

+DIMM0_1_CA_CPU

B

DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53

DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK

DDR_XDP_WAN_SMBDAT 13,15,28,37
DDR_XDP_WAN_SMBCLK 13,15,28,37

+0.75V_DDR_VTT

206

A

TYCO_2-2013022-2~D

/DD,сϰ͘Ϭŵŵ

DELL CONFIDENTIAL/PROPRIETARY

>ŝŶŬŽŶĞ

Compal Electronics, Inc.
Title

DDRIII-SODIMM SLOT1
Size

3

2

Document Number

Rev
0.3

LA-6611P
Date:

4

DDR3_DRAMRST# 7

DDR_A_D20
DDR_A_D21

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

D

DDR3_DRAMRST#_R

CD16
0.1U_0402_16V4Z~D

DDR_A_D32
DDR_A_D33

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS

1

ϮͲϯƚŽϭ/DDƐͬĐŚĂŶŶĞů

CD15
2.2U_0603_6.3V6K~D

>ĂǇŽƵƚEŽƚĞ͗
WůĂĐĞŶĞĂƌ:/DD͘ϮϬϯ͕ϮϬϰ

1

+1.5V_MEM
JDIMMA1

2 0_0402_5%~D
2 0_0402_5%~D

8 DDR_A_DQS#[0..7]

2

+1.5V_MEM

1

4

2

5

Wednesday, January 26, 2011

Sheet
1

12

of

64

5

4

3

2

1

ϮͲϯƚŽϭ/DDƐͬĐŚĂŶŶĞů
+DIMM0_1_VREF_DQ

+1.5V_MEM

+1.5V_MEM
JDIMMB1

WŽƉƵůĂƚĞZϭĨŽƌ/ŶƚĞůZϯ
sZ&YŵƵůƚŝƉůĞŵĞƚŚŽĚƐDϭ

8 DDR_B_D[0..63]
8 DDR_B_DQS[0..7]
D

1

2

1

2

8 DDR_B_MA[0..15]

CD24
0.1U_0402_16V4Z~D

8 DDR_B_DQS#[0..7]

CD23
2.2U_0603_6.3V6K~D

ůůsZ&ƚƌĂĐĞƐƐŚŽƵůĚ
ŚĂǀĞϭϬŵŝůƚƌĂĐĞǁŝĚƚŚ

DDR_B_D0
DDR_B_D1

DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1

EŽƚĞ͗
ŚĞĐŬǀŽůƚĂŐĞƚŽůĞƌĂŶĐĞŽĨ
sZ&ͺYĂƚƚŚĞ/DDƐŽĐŬĞƚ

DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19

>ĂǇŽƵƚEŽƚĞ͗
WůĂĐĞŶĞĂƌ:/DD

DDR_B_D24
DDR_B_D25

DDR_B_D26
DDR_B_D27

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT

CONN@
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13

D

DDR3_DRAMRST#_R

DDR3_DRAMRST#_R 12

DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21

DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31

+1.5V_MEM
DDR_CKE2_DIMMB

8 DDR_CKE2_DIMMB

2

1

2

CD28
1U_0402_6.3V6K~D

2

1

CD27
1U_0402_6.3V6K~D

1

CD26
1U_0402_6.3V6K~D

2

CD25
1U_0402_6.3V6K~D

1

C

8

DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

2

1
+
2

CD36
330U_SX_2VY~D

2

1

8

DDR_B_BS0

8
8

DDR_B_WE#
DDR_B_CAS#

8 DDR_CS3_DIMMB#

DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
B

DDR_B_D40
DDR_B_D41

>ĂǇŽƵƚEŽƚĞ͗
WůĂĐĞŶĞĂƌ:/DD͘ϮϬϯ͕ϮϬϰ

DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6

+0.75V_DDR_VTT

DDR_B_D50
DDR_B_D51

2

1

2

CD42
1U_0402_6.3V6K~D

2

1

CD41
1U_0402_6.3V6K~D

1

CD40
1U_0402_6.3V6K~D

2

CD39
1U_0402_6.3V6K~D

1

DDR_B_D56
DDR_B_D57

DDR_B_D58
DDR_B_D59

+3.3V_RUN
1
10K_0402_5%~D

1

2

1

2

CD44
2.2U_0603_6.3V6K~D

2

+0.75V_DDR_VTT
CD43
0.1U_0402_16V4Z~D

A

RD6
10K_0402_5%~D

2
RD5

1

+3.3V_RUN

205

GND1

GND1

DDR_CKE3_DIMMB

DDR_CKE3_DIMMB 8

DDR_B_MA15
DDR_B_MA14
C

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3

M_CLK_DDR3 8
M_CLK_DDR#3 8

DDR_B_BS1
DDR_B_RAS#

DDR_B_BS1 8
DDR_B_RAS# 8

DDR_CS2_DIMMB#
M_ODT2
M_ODT3

DDR_CS2_DIMMB# 8
M_ODT2
8
M_ODT3

8

DDR_B_D36
DDR_B_D37
1
DDR_B_D38
DDR_B_D39

2

DDR_B_D44
DDR_B_D45

+DIMM0_1_VREF_CA

1

2

CD38
0.1U_0402_16V4Z~D

DDR_B_D32
DDR_B_D33

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

CD37
2.2U_0603_6.3V6K~D

@ CD35
10U_0603_6.3V6M~D

2

1

CD34
10U_0603_6.3V6M~D

2

1

CD33
10U_0603_6.3V6M~D

2

1

CD32
10U_0603_6.3V6M~D

2

1

CD31
10U_0603_6.3V6M~D

1

CD30
10U_0603_6.3V6M~D

CD29
10U_0603_6.3V6M~D

2

M_CLK_DDR2
M_CLK_DDR#2

8 M_CLK_DDR2
8 M_CLK_DDR#2

+1.5V_MEM

1

DDR_B_BS2

DDR_B_BS2

CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT

B

DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53

DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK

DDR_XDP_WAN_SMBDAT 12,15,28,37
DDR_XDP_WAN_SMBCLK 12,15,28,37

+0.75V_DDR_VTT

206
A

TYCO_2-2013297-2~D

/DD,сϴŵŵ

>ŝŶŬŽŶĞ

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

DDRIII-SODIMM SLOT2
Size

4

3

2

Rev
0.3

LA-6611P
Date:

5

Document Number
Wednesday, January 26, 2011

Sheet
1

13

of

64

5

4

Clear CMOS

Open

Keep CMOS

2

+1.05V_RUN
@

17,35,37,38,42,43 PCH_PLTRST#_EC

+3.3V_ALW_PCH
2

Keep ME RTC Registers

PCH_AZ_SYNC_Q
SPKR

2

Open

+3.3V_RUN

RH66
1K_0402_5%~D

+RTC_CELL

PCH_AZ_SYNC

2
@ RH35

1
1

+3.3V_RUN

Low = Default

2

SIO_PWRBTN#_R
2
@ RH36

1

30 PCH_AZ_CODEC_RST#

N34

PCH_AZ_SYNC

L34

SPKR

T10

SPKR

PCH_AZ_RST#

K34

HDA_RST#

PCH_AZ_CODEC_SDIN0

E34

30 PCH_AZ_CODEC_BITCLK

1

@ CH101
27P_0402_50V8J~D

SPI_DIN32

A34
PCH_AZ_SDOUT

2
1K_0402_5%~D

@ T132 PAD~D

2

PCH_SPI_CS1_R#

29 USB30_SMI#

14
16
18

C36

USB30_SMI#

+3.3V_M
5@ C746
1
2

A36

N32

2

0.1U_0402_16V4Z~D

B

2 33_0402_5%~D SPI_DIN64

2

SPI_WP#0

3

2 0_0402_5%~D

4

VCC

DO

/HOLD

/WP

CLK

GND

DIO

8

1

/CS

7

SPI_HOLD#0

6

SPI_CLK64
SPI_DO64

5

J3

JTAG_TMS

PCH_JTAG_TDI

K5

JTAG_TDI

PCH_JTAG_TDO

H1

JTAG_TDO

2 R899 PCH_SPI_CLK

56_0402_5%~D 1
33_0402_5%~D 1

5@

2 R901 PCH_SPI_DO

2
3
4

/CS
DO(IO1)
/WP(IO2)
GND

VCC

U3

SATAICOMPO
SATAICOMPI

2

SATA3RBIAS

CH108
CH107
27P_0402_50V8J~D
27P_0402_50V8J~D
2
@
@

SPI_HOLD#1

6

SPI_CLK32 56_0402_5%~D 1

SPI_CS1#

5

SPI_DO32

2 R897

1
R944
33_0402_5%~D 1

ϮϬϬD/>^Kϴ
ϭϲDď&ůĂƐŚZKD

6@

2
0_0402_5%~D

5@

2 R900

6@

2
0_0402_5%~D

1
R943

PCH_SPI_CLK

PCH_SPI_DO

SPI_MOSI

C

29
29
29
29

KͬDŽĚƵůĞĂǇ

Y7
Y5
AD3
AD1

ESATA_PRX_DTX_N4_C 40
ESATA_PRX_DTX_P4_C 40
ESATA_PTX_DRX_N4_C 40
ESATA_PTX_DRX_P4_C 40

Y3
Y1
AB3
AB1

SATA_PRX_DKTX_N5_C 41
SATA_PRX_DKTX_P5_C 41
SATA_PTX_DKRX_N5_C 41
SATA_PTX_DKRX_P5_C 41
+1.05V_RUN

Y11
Y10

+SATA_COMP

1
RH40

2
37.4_0402_1%~D

+SATA3_COMP

1
RH42

2
49.9_0402_1%~D

1
RH46

2
750_0402_1%~D

Ͳ^d

K<

+1.05V_RUN

AB12

B

AB13
AH1

RBIAS_SATA3

P3

SATA_ACT#

+3.3V_RUN

RH30
10K_0402_5%~D
SATALED#

SPI_MOSI

SATA0GP / GPIO21

V14

HDD_DET#_R

SPI_MISO

SATA1GP / GPIO19

P1

BBS_BIT0_R

46
1
RH290

1

2
0_0402_5%~D

HDD_DET#

3

RH44 2

1 200_0402_1%~D

PCH_JTAG_TMS

RH45 2

1 200_0402_1%~D

PCH_JTAG_TDI

BSS138W-7-F_SOT323-3~D

+3.3V_RUN

^ͺ/dϬͲ/K^KKd^dZW/dϬ

PCH_JTAG_TDO

1 200_0402_1%~D

@

@

RH31
4.7K_0402_5%~D

BBS_BIT0_R

@

^dϬ'WWƐŝŵƵůĂƚĞƐƚŚĞĚƌŝǀĞƐƚĂƚƵƐ͘
&ŽƌƉƌŽƉĞƌĨƵŶĐƚŝŽŶŽĨƚŚĞŚŽƚƉůƵŐ͕
ƚŚŝƐZϭϱϵϳŵƵƐƚďĞΗEŽ^ŚƵŶƚΗ
ǁŚĞŶƌĞƐƉĞĐƚŝǀĞĚƌŝǀĞŝƐƌĞŵŽǀĞĚ
ĂŶĚΗ^ŚƵŶƚΗĂĨƚĞƌƚŚĞƌĞƐƉĞĐƚŝǀĞ
ĚƌŝǀĞŝƐƉůƵŐŐĞĚŝŶ͘

A

DELL CONFIDENTIAL/PROPRIETARY

PCH_SPI_DO

Compal Electronics, Inc.
Title

PCH (1/8)

,ŝŐŚ͗ŶĂďůĞ/ŶƚĞůŶƚŝͲdŚĞĨƚdĞĐŚŶŽůŽŐǇ
>ĞĨƚĨůŽĂƚŝŶŐ͗ŝƐĂďůĞ/ŶƚĞůŶƚŝͲdŚĞĨƚdĞĐŚŶŽůŽŐǇ

R943 colay R900 for TAA

Size

Document Number

Rev
0.3

LA-6611P
Date:
5

4

28

PCH_SATA_MOD_EN# 43

7,17 PCH_PLTRST#
PCH_JTAG_TCK

1 51_0402_1%~D

RH43 2

SATA_ACT#

QH1

RH59 2

+3.3V_RUN

5@

,

AB8
AB10
AF3
AF1

/ŶƚĞůƌĞǀŝĞǁĨĞĞĚďĂĐŬ

R944 colay R897 for TAA

7

CLK
DI(IO0)

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

1
RH28

SPI_CS0#

1

@
RH288
0_0603_5%~D

SPI_CLK32
1

34,35,42,43

AD7
AD5
AH5
AH4

BD82CPMS-QMVY-A1_FCBGA989~D

8

/HOLD(IO3)

W25Q16BVSSIG_SO8~D

R936 colay R895 for TAA

V4

PCH_SPI_DIN

IRQ_SERIRQ

SATA_ODD_PRX_DTX_N1_C
SATA_ODD_PRX_DTX_P1_C
SATA_ODD_PTX_DRX_N1_C
SATA_ODD_PTX_DRX_P1_C

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SPI_CLK

42
42

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

1

6@

2
0_0402_5%~D
2 0_0402_5%~D

PCH_SPI_DO

+3.3V_ALW_PCH_JTAG

5@

@ R896 1

T1

2

2
SPI_WP#_SEL

1

R892 5@
3.3K_0402_5%~D

1
R936

PCH_SPI_CS1#

+3.3V_ALW_PCH

0.1U_0402_16V4Z~D

PCH_SPI_CS1_R#
2
1
0_0402_5%~D
2 33_0402_5%~D SPI_DIN32 2

1

Y14

@ RH295
8.2K_0402_5%~D

R895 1

T3

PCH_SPI_CS0#

SPI_CLK64

C745
1
2

U53 X76ROM@
PCH_SPI_DIN

PCH_SPI_CLK

IRQ_SERIRQ

LPC_LDRQ0#
LPC_LDRQ1#

AM10
AM8
AP11
AP10

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

JTAG_TCK

V5

+3.3V_RUN

IRQ_SERIRQ 2
8.2K_0402_5%~D

LPC_LFRAME# 34,35,42,43

PSATA_PRX_DTX_N0_C 28
PSATA_PRX_DTX_P0_C 28
PSATA_PTX_DRX_N0_C 28
PSATA_PTX_DRX_P0_C 28

HDA_DOCK_RST# / GPIO13

H7

+3.3V_M

5@ R888
3.3K_0402_5%~D

A

HDA_DOCK_EN# / GPIO33

PCH_JTAG_TMS

5@

ϮϬϬD/>^Kϴ
ϲϰDď&ůĂƐŚZKD

R935 1

HDA_SDO

LPC_LDRQ0#
LPC_LDRQ1#

AM3
AM1
AP7
AP5

SATA3COMPI

W25Q64BVSSIG_SO8~D

PCH_SPI_CS1#

HDA_SDIN3

1

@ R898 1

HDA_SDIN2

D36
E36
K36

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA3RCOMPO

U52 X76ROM@
2 0_0402_5%~D PCH_SPI_CS0_R#1

5@

R894 1

HDA_SDIN1

R891 5@
3.3K_0402_5%~D

1
5@
R933 1

HDA_SDIN0

2

5@ R890
3.3K_0402_5%~D

HDA_SYNC

PCH_JTAG_TCK

TYCO_5-1775013-4~D

>ŝŶŬŽŶĞ

HDA_BCLK

2

G1 G2
G3 G4
G5 G6

1
@ RH287

2
1K_0402_5%~D

SERIRQ

SPI

JP1 CONN@
1
2 2
3
4 4
5
6 6
7
8 8
9
10 10
11 12 12

C34
1

INTVRMEN

PCH_AZ_BITCLK

G34

RH50

INTRUDER#

LDRQ0#
LDRQ1# / GPIO23

RH48
100_0402_1%~D
2
1
RH49
100_0402_1%~D
2
1
RH47
100_0402_1%~D

30 PCH_AZ_CODEC_SYNC

2 PCH_AZ_SDOUT
33_0402_5%~D
2 PCH_AZ_SYNC_Q
33_0402_5%~D
42
ME_FWP
2 PCH_AZ_RST#
+3.3V_ALW_PCH
33_0402_5%~D
2 PCH_AZ_BITCLK
33_0402_5%~D

1
RH29
1
RH26
1
RH27
1
RH25

27
28

1

C17

D

2

PCH_INTVRMEN

FWH4 / LFRAME#
SRTCRST#

34,35,42,43
34,35,42,43
34,35,42,43
34,35,42,43

S

K22

LPC_LFRAME#

D

G22

INTRUDER#

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

2
G

SRTCRST#

LPC

RTCRST#

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

1

SPKR

RTCX2

D20

C38
A38
B37
C37

2

30

C20

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

SATA 6G

2

2

PCH_RTCX2
PCH_RTCRST#

RTCX1

SATA

2
0_0402_5%~D

OBSFN_A0
OBSFN_A1
GND
OBSDATA_A[0]
OBSDATA_A[1]
GND
OBSDATA_A[2]
OBSDATA_A[3]
GND
HOOK0
HOOK1
HOOK2
HOOK3
HOOK4
HOOK5
VCCOBS_AB
HOOK6
HOOK7
GND
TDO
TRSTn
TDI
TMS
TCK1
GND
GND
GND
TCK0
MOLEX_52435-2671

A20

RTC

1
RH286

@
CMOS1 SHORT PADS~D
1
2
1U_0402_6.3V6K~D
CH4

SHORT PADS~D
2
1U_0402_6.3V6K~D

3

G

2
20K_0402_5%~D
2
20K_0402_5%~D
2
1M_0402_5%~D

1

PCH_JTAG_TCK

IHDA

1

PCH_JTAG_TDI
PCH_JTAG_TMS

RSMRST#_XDP
1K_0402_5%~D

RH2
10M_0402_5%~D

JTAG

2

1

UH4A
4
CH3
15P_0402_50V8J~D
2
1

30 PCH_AZ_CODEC_SDOUT

42 SPI_WP#_SEL

7,16 XDP_DBRESET#

PCH_RSMRST#
2
@ RH24

16,43 PCH_RSMRST#
YH1
32.768KHZ_12.5PF_Q13MC1461000~D
1
G 2

30 PCH_AZ_CODEC_SDIN0

PCH_SPI_CS0#

RSMRST#_XDP
XDP_DBRESET#

PCH_RTCX1

1

DK^ƉůĂĐĞŶĞĂƌ/DD

PCH_SPI_DIN

+3.3V_ALW_PCH

1
10K_0402_5%~D

1

2

1
CH5

1
RH22
1
RH23
1
RH11

+RTC_CELL

1

@
ME1

13
15
17

1K_0402_5%~D
2 1.05V_0.8V_PWROK_R
2 PCH_PWRBTN#_XDP
0_0402_5%~D

+3.3V_ALW_PCH

2

1

+3.3V_M

0_0402_5%~D
2

@ RH283
1
1
@ RH21

43,53 1.05V_0.8V_PWROK
7,16 SIO_PWRBTN#_R

2

2
1
2

KŶŝĞW>>sZŝƐƐƵƉƉůŝĞĚďǇ
ϭ͘ϱsǁŚĞŶƐĂŵƉůĞĚŚŝŐŚ͕ϭ͘ϴs
ǁŚĞŶƐĂŵƉůĞĚůŽǁ

/EdsZDEͲ/ŶƚĞŐƌĂƚĞĚ^h^ϭ͘ϭs
sZDŶĂďůĞ
Ύ ,ŝŐŚͲŶĂďůĞ/ŶƚĞƌŶĂůsZƐ
>ŽǁͲŶĂďůĞǆƚĞƌŶĂůsZƐ

1
3
5
7
9
11

@ RH284
RSMRST#_XDP 1

PCH_JTAG_TDO
2

@RH39
@
RH39
330K_0402_1%~D

SPI_CLK32
PCH_SPI_CS0#

,ϭĐůƐŽĞƚŽ:yWϮ
2

High = No Reboot

CH2
15P_0402_50V8J~D

SPI_DO32

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

1

PCH_AZ_SYNC

1 PCH_AZ_SYNC_Q
10K_0402_5%~D

2
RH37

SPKR

PCH_INTVRMEN

C

1

,ϲĐůƐŽĞƚŽ:yWϮ
2

JXDP2 @
+1.05V_RUN

@

1

SSM3K7002FU_SC70-3~D
QH7

No Reboot Strap

@ RH282
100K_0402_5%~D

RH38
330K_0402_1%~D

1
10K_0402_5%~D

3

D

Clear ME RTC Registers

S

Shunt

1
1M_0402_5%~D
G

D

2
RH41

1

ME_CLR1 TPM setting

1

+3.3V_ALW_PCH
CH1
0.1U_0402_16V4Z~D

Shunt

3

W,ͺͺ^zEŝƐƐĂŵƉůĞĚ
ĂƚƚŚĞƌŝƐŝŶŐĞĚŐĞŽĨZ^DZ^dηƉŝŶ͘
^ŽƐŝŐŶĂůƐŚŽƵůĚďĞWhƚŽƚŚĞ>tz^ƌĂŝů͘

CH6
0.1U_0402_16V4Z~D

CMOS setting

CMOS_CLR1

3

2

Wednesday, January 26, 2011

Sheet
1

14

of

64

5

4

3

2

1

2

+3.3V_RUN

MEM_SMBCLK

QH5A
DMN66D0LDW-7_SOT363-6~D
1

DDR_XDP_WAN_SMBCLK 12,13,28,37

5

6

MEM_SMBDATA

10/100/1G LAN --->

MiniWWAN (Mini Card 1)--->

10/100/1G LAN --->

PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_PTX_WPANRX_N5
PCIE_PTX_WPANRX_P5

36
36
36
36
32
32
32
32

PCIE_PRX_MMITX_N6
PCIE_PRX_MMITX_P6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6
PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7

37 CLK_PCIE_MINI1#
37 CLK_PCIE_MINI1
+3.3V_ALW_PCH
37 MINI1CLK_REQ#

32 CLK_PCIE_LAN#
32 CLK_PCIE_LAN

PCIE_PRX_EXPTX_N3
PCIE_PRX_EXPTX_P3
PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3

BG36
BJ36
AV34
AU34

PERN3
PERP3
PETN3
PETP3

PCIE_PRX_EMBTX_N4
PCIE_PRX_EMBTX_P4
PCIE_PTX_EMBRX_N4
PCIE_PTX_EMBRX_P4

BF36
BE36
AY34
BB34

PERN4
PERP4
PETN4
PETP4

PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_PTX_WPANRX_N5
PCIE_PTX_WPANRX_P5

BG37
BH37
AY36
BB36

PERN5
PERP5
PETN5
PETP5

PCIE_PRX_MMITX_N6
PCIE_PRX_MMITX_P6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6

BJ38
BG38
AU36
AV36

PERN6
PERP6
PETN6
PETP6

PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7

BG40
BJ40
AY40
BB40

PERN7
PERP7
PETN7
PETP7

BE38
BC38
AW38
AY38

PERN8
PERP8
PETN8
PETP8

2
RH3072
RH3082
RH81

1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D

PCIE_MINI1#
PCIE_MINI1

2
RH82 2
RH83

1
1 0_0402_5%~D
0_0402_5%~D

PCIE_LAN#
PCIE_LAN
LANCLK_REQ#

32 LANCLK_REQ#

MMI Card--->

B

MiniWPAN (Mini Card 3)--->

Express card--->

MiniWLAN (Mini Card 2)--->

36 CLK_PCIE_MMI#
36 CLK_PCIE_MMI
+3.3V_RUN
36 MMICLK_REQ#
37 CLK_PCIE_MINI3#
37 CLK_PCIE_MINI3
+3.3V_ALW_PCH
37 MINI3CLK_REQ#

MINI1CLK_REQ#

Y40
Y39
J2
AB49
AB47
M1

2
RH85 2
RH86 1
RH87

1
1 0_0402_5%~D
2 0_0402_5%~D
10K_0402_5%~D

PCIE_MMI#
PCIE_MMI
MMICLK_REQ#

V10

2
RH88 2
RH90 2
RH152

1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D

PCIE_MINI3#
PCIE_MINI3

Y37
Y36

MINI3CLK_REQ#

AA48
AA47

A8

eModule Bay--->

PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P

37 CLK_PCIE_MINI2#
37 CLK_PCIE_MINI2
+3.3V_ALW_PCH
37 MINI2CLK_REQ#

2
RH95 2
RH96 2
RH97

1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D

PCIE_MINI2#
PCIE_MINI2

V45
V46

MINI2CLK_REQ#

L14

CLKOUT_PCIE7N
CLKOUT_PCIE7P

CLK_BCLK_ITP# AK14
CLK_BCLK_ITP AK13

W/ZYƉŽǁĞƌƌĂŝů͗
ƐƵƐƉĞŶĚ͗Ϭϯϰϱϲϳ
ĐŽƌĞ͗ϭϮ

EMBCLK_REQ#

K12

SML1_SMBDATA

+3.3V_ALW_PCH

DDR_HVREF_RST_PCH 7
SML1_SMBCLK

1
RH298
SML1_SMBDATA
1
RH299
DDR_HVREF_RST_PCH
2
RH300
GPIO74
2
RH301
MEM_SMBCLK
2
RH302
MEM_SMBDATA
2
RH303
PCH_SMB_ALERT#
2
RH304
PEG_A_CLKRQ#
2
RH80

LAN_SMBCLK 32
LAN_SMBDATA 32

SML1_SMBCLK 43
SML1_SMBDATA 43

CL_CLK1
CL_DATA1

M7

PCH_CL_CLK1

T11

PCH_CL_DATA1

PCH_CL_DATA1 37

LAN_SMBCLK
CL_RST1#

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

P10

PCH_CL_RST1#

M10

PEG_A_CLKRQ#

2
2.2K_0402_5%~D
2
2.2K_0402_5%~D
1
1K_0402_5%~D
1
10K_0402_5%~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
10K_0402_5%~D
1
10K_0402_5%~D

ϴϮϱϳϳƌĞĨĞƌĞŶĐĞĚĞƐŝŐŶWhƚŽ
нϯ͘ϯsͺ

PCH_CL_CLK1 37

PCH_CL_RST1# 37

+3.3V_LAN

2
RH305
2
RH306

LAN_SMBDATA

1
2.2K_0402_5%~D
1
2.2K_0402_5%~D

AV22
AU22

CLK_CPU_DMI#
CLK_CPU_DMI

AM12
AM13

CLK_CPU_DPLL#
CLK_CPU_DPLL

CLKIN_DMI_N
CLKIN_DMI_P

BF18
BE18

CLK_BUF_DMI#
CLK_BUF_DMI

CLK_BUF_BCLK

CLKIN_GND1_N
CLKIN_GND1_P

BJ30
BG30

CLK_BUF_BCLK

CLK_BUF_DOT96#
CLK_BUF_DOT96

1
RH76 1
RH77

2
2 10K_0402_5%~D
10K_0402_5%~D

CLKIN_DOT_96N
CLKIN_DOT_96P

G24
E24

CLK_BUF_DOT96#
CLK_BUF_DOT96

CLK_BUF_CKSSCD#
1
CLK_BUF_CKSSCD
RH78 1
RH79

2
2 10K_0402_5%~D
10K_0402_5%~D

CLKIN_SATA_N
CLKIN_SATA_P

AK7
AK5

CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD

CLK_PCH_14M

2

CLKOUT_DMI_N
CLKOUT_DMI_P

REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT

C

AB37
AB38

CLK_CPU_DMI# 7
CLK_CPU_DMI 7
CLK_BUF_DMI#
CLK_BUF_DMI

CLK_CPU_DPLL# 7
CLK_CPU_DPLL 7

1
RH74 1
RH75

2
2 10K_0402_5%~D
10K_0402_5%~D

1

2
10K_0402_5%~D

RH91

K45

CLK_PCH_14M

H45

CLK_PCI_LOOPBACK

V47
V49

XTAL25_IN
XTAL25_OUT

1
RH183

B

10K_0402_5%~D

>K
C

37
37
37
37

PERN2
PERP2
PETN2
PETP2

E12

SMBCLK

2
0_0402_5%~D

CH18
10P_0402_50V8J~D

1/2vMINI CARD-3 PCIE
(Mini Card 3)--->

D

1
@ RH296

1

PCIE_PRX_EMBTX_N4
PCIE_PRX_EMBTX_P4
PCIE_PTX_EMBRX_N4
PCIE_PTX_EMBRX_P4

DDR_XDP_WAN_SMBDAT 12,13,28,37

2

E3 Module Bay--->

29
29
29
29

BE34
BF34
BB32
AY32

SMBALERT# / GPIO11

Link

PCIE_PRX_EXPTX_N3
PCIE_PRX_EXPTX_P3
PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2

PERN1
PERP1
PETN1
PETP1

SMBUS

EXPRESS Card--->

38
38
38
38

BG34
BJ34
AV32
AU32

Controller

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2

PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1

FLEX CLOCKS

37
37
37
37

PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1

CLOCKS

MiniWLAN (Mini Card 2)--->

37
37
37
37

4

UH4B

PCI-E*

MiniWWAN (Mini Card 1)--->

3

QH5B
DMN66D0LDW-7_SOT363-6~D

&ŽůůŽǁ'Ϭ͘ϵĞǀŝĐĞĚŽǁŶΘǆƉƌĞƐƐͬDŝŶŝĐĂƌĚ
ƚŽƉŽůŽŐǇ

D

4

3

2

Title

PCH (2/8)
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

15

of

64

5

4

3

2

1

SUS_STAT#/LPCPD#
2
10K_0402_5%~D

1
RH144

ME_SUS_PWR_ACK
2
10K_0402_5%~D

1
RH142

PCH_PCIE_WAKE#
2
10K_0402_5%~D

PCH_DPWROK

SIO_SLP_LAN#
2
10K_0402_5%~D

PCH_RSMRST#_R
2
0_0402_5%~D

1
@ RH321

SYS_PWROK
2
0_0402_5%~D

D

1
2

2

G_CLK_DDC2

1

6

DSWODVREN - On Die DSW VR Enable
RESET_OUT#

1
@ RH319

1
RH113

CONNECT FOR UMA

ME_SUS_PWR_ACK_R
1
RH323

2

1
@ RH318

NO CONNECT FOR DISCRETE

PCH_CRT_DDC_CLK

PCH_CRT_DDC_CLK 25

QH6A
DMN66D0LDW-7_SOT363-6~D

+3.3V_RUN

HIGH: RH127 STUFFED,
RH129 UNSTUFFED

SUSACK#_R
2
0_0402_5%~D

G_DAT_DDC2

QH6B
DMN66D0LDW-7_SOT363-6~D
PCH_CRT_DDC_DAT
3

4

PCH_RI#
2
10K_0402_5%~D

PCH_RSMRST#

1
RH322

2
10K_0402_5%~D

ME_SUS_PWR_ACK
1
@ RH145

+3.3V_RUN

LOW: RH129 STUFFED,
RH127 UNSTUFFED

2
10K_0402_5%~D

CLKRUN#
2
8.2K_0402_5%~D

Intel request DDPB can not support eDP

UH4C

6
6
6
6

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

BE24
BC20
BJ18
BJ20

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

AW24
AW20
BB18
AV18

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

AY24
AY20
AY18
AU18

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

AW16

FDI_INT

FDI_FSYNC0

AV12

FDI_FSYNC0

FDI_FSYNC1

BC10

FDI_FSYNC1

AV14

FDI_LSYNC0

BB10

FDI_LSYNC1

FDI_INT

+1.05V_RUN

DMI_COMP_R
2
49.9_0402_1%~D
RBIAS_CPY
2
750_0402_1%~D

1
RH111
1
RH112

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP
DMI2RBIAS

FDI_LSYNC0

BH21

FDI_LSYNC1

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

6
6
6
6
6
6
6
6

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

6
6
6
6
6
6
6
6

UH4D

24 BIA_PWM_PCH
24 LDDC_CLK_PCH
24 LDDC_DATA_PCH

RH1251

24 LCD_ACLK-_PCH
24 LCD_ACLK+_PCH

FDI_FSYNC0

6

FDI_FSYNC1

6

FDI_LSYNC0

6

FDI_LSYNC1

6

24 LCD_A0-_PCH
24 LCD_A1-_PCH
24 LCD_A2-_PCH

+RTC_CELL

42

SUSACK#

1
RH114
@RH114
@

2
0_0402_5%~D

7,14 XDP_DBRESET#

SUSACK#_R

C12

System Power Management

DSWVRMEN
SUSACK#

XDP_DBRESET# K3

SYS_RESET#

SYS_PWROK_R P12

SYS_PWROK

B

1
RH116

2
0_0402_5%~D

43 RESET_OUT#

1
RH117

2
0_0402_5%~D

43 PM_APWROK

1
RH118

2
0_0402_5%~D

7,42 SYS_PWROK

7 PM_DRAM_PWRGD
14,43 PCH_RSMRST#
43 ME_SUS_PWR_ACK

1
RH320
1
RH120
1
RH121

PCH_PWROK L22
PM_APWROK_R

L10

PM_DRAM_PWRGD_R B13
2
0_0402_5%~D
2
0_0402_5%~D

PCH_RSMRST#_R C21

2
0_0402_5%~D

ME_SUS_PWR_ACK_R K16

PWROK
APWROK
DRAMPWROK
RSMRST#

DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63

DSWODVREN

RH127

1

2 330K_0402_1%~D

1

2 330K_0402_1%~D

E22

@ RH129
PCH_DPWROK

B9

PCH_PCIE_WAKE#

N3

CLKRUN#

A18

CLKRUN#

SUS_STAT#/LPCPD#

T56

PAD~D

SUSCLK

T57

PAD~D

T58

PAD~D

H4

SIO_SLP_S4#

F4

SIO_SLP_S3#

SLP_S3#

1
RH122

SIO_PWRBTN#_R E20
2
0_0402_5%~D

PWRBTN#

SLP_A#

G10

SIO_SLP_A#

H20

ACPRESENT / GPIO31

SLP_SUS#

G16

SIO_SLP_SUS#

1
RH139

PCH_BATLOW#
2
8.2K_0402_5%~D

A10

BATLOW# / GPIO72

PMSYNCH
SLP_LAN# / GPIO29

RI#

AP14

H_PM_SYNC

K14

SIO_SLP_LAN#

L_CTRL_CLK
L_CTRL_DATA

LVD_IBG
2.37K_0402_1%~D

AF37
AF36

LVD_IBG
LVD_VBG

AE48
AE47

LVD_VREFH
LVD_VREFL

LCD_ACLK-_PCH
LCD_ACLK+_PCH

AK39
AK40

LVDSA_CLK#
LVDSA_CLK

LCD_A0-_PCH
LCD_A1-_PCH
LCD_A2-_PCH

AN48
AM47
AK47
AJ48

LCD_A0+_PCH
LCD_A1+_PCH
LCD_A2+_PCH

AN47
AM49
AK49
AJ47

25 PCH_CRT_BLU
25 PCH_CRT_GRN
25 PCH_CRT_RED

PAD~D
PAD~D

25 PCH_CRT_HSYNC
25 PCH_CRT_VSYNC

RH123
1
1
RH124

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP

SDVO_CTRLCLK
SDVO_CTRLDATA

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK

AH45
AH47
AF49
AF45

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

AH43
AH49
AF47
AF43

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED

N48
P49
T49

CRT_BLUE
CRT_GREEN
CRT_RED

G_CLK_DDC2
G_DAT_DDC2

T39
M40

CRT_DDC_CLK
CRT_DDC_DATA

20_0402_1%~D
2 HSYNC
2 VSYNC
20_0402_1%~D

M47
M49

CRT_HSYNC
CRT_VSYNC

DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

PAD~D
CRT_IREF

PAD~D

T43
T42

H_PM_SYNC 7

DAC_IREF
CRT_IRTN

AP43
AP45
AM42
AM40
C

AP39
AP40

P38
M39

PCH_SDVO_CTRLCLK 26
PCH_SDVO_CTRLDATA 26

AT49
AT47
AT40

HDMIB_PCH_HPD 26

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

TMDSB_PCH_N2 26
TMDSB_PCH_P2 26
TMDSB_PCH_N1 26
TMDSB_PCH_P1 26
TMDSB_PCH_N0 26
TMDSB_PCH_P0 26
TMDSB_PCH_CLK# 26
TMDSB_PCH_CLK 26

P46
P42

HDMI D2
HDMI D1
HDMI D0
HDMI CLK

PCH_DDPC_CTRLCLK 27
PCH_DDPC_CTRLDATA 27

AP47
AP49
AT38

DPC_PCH_DOCK_AUX# 27
DPC_PCH_DOCK_AUX 27
DPC_PCH_DOCK_HPD 41

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

DPC_PCH_LANE_N0
DPC_PCH_LANE_P0
DPC_PCH_LANE_N1
DPC_PCH_LANE_P1
DPC_PCH_LANE_N2
DPC_PCH_LANE_P2
DPC_PCH_LANE_N3
DPC_PCH_LANE_P3

M43
M36

41
41
41
41
41
41
41
41

B

PCH_DDPD_CTRLCLK 27
PCH_DDPD_CTRLDATA 27

AT45
AT43
BH41

DPD_PCH_DOCK_AUX# 27
DPD_PCH_DOCK_AUX 27
DPD_PCH_DOCK_HPD 41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

DPD_PCH_LANE_N0
DPD_PCH_LANE_P0
DPD_PCH_LANE_N1
DPD_PCH_LANE_P1
DPD_PCH_LANE_N2
DPD_PCH_LANE_P2
DPD_PCH_LANE_N3
DPD_PCH_LANE_P3

41
41
41
41
41
41
41
41

BD82CPMS-QMVY-A1_FCBGA989~D
RH126
1K_0402_0.5%~D

SIO_SLP_LAN# 32,42

2

PCH_RI#

E10

T45
P39

SIO_SLP_SUS# 42
T63

+3.3V_ALW_PCH

PAD~D

SIO_SLP_A# 42,51
T62

AC_PRESENT

43 AC_PRESENT

L_DDC_CLK
L_DDC_DATA

13" support one channel LVDS

SIO_SLP_S3# 42
T61

7,14 SIO_PWRBTN#_R
43 SIO_PWRBTN#

L_BKLTCTL

T40
K47

AF40
AF39

SIO_SLP_S4# 42
T60

SUSWARN#/SUSPWRDNACK/GPIO30

35,42,43

SIO_SLP_S5# 43
T59

SLP_S4#

P45

LDDC_CLK_PCH
LDDC_DATA_PCH

PCH_PCIE_WAKE# 42

N14

SIO_SLP_S5#

24 LCD_A0+_PCH
24 LCD_A1+_PCH
24 LCD_A2+_PCH

L_BKLTEN
L_VDD_EN

BIA_PWM_PCH

PCH_DPWROK 42

G8

D10

2

J47
M45

Minimum speacing of 20mils for LVD_IBG

6

FDI_INT

PANEL_BKEN_PCH
ENVDD_PCH

24 PANEL_BKEN_PCH
24,42 ENVDD_PCH

Digital Display Interface

6
6
6
6

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

LVDS

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

1

6
6
6
6

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

FDI

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

BC24
BE20
BG18
BG20

DMI

C

6
6
6
6

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

CRT

1
RH137

1
2.2K_0402_5%~D
1
2.2K_0402_5%~D

PCH_CRT_DDC_DAT 25

Disabled
1
RH140

+3.3V_RUN
PCH_SDVO_CTRLCLK
2
RH351
PCH_SDVO_CTRLDATA 2
RH352

Enabled (DEFAULT)
5

D

RH317
2.2K_0402_5%~D

RH316
2.2K_0402_5%~D

+3.3V_ALW_PCH

1

+3.3V_RUN

BD82CPMS-QMVY-A1_FCBGA989~D
A

A

1
RH131
1
RH132
1
RH133
1
RH134

2 PCH_CRT_BLU
150_0402_1%~D
2 PCH_CRT_GRN
150_0402_1%~D
2 PCH_CRT_RED
150_0402_1%~D
2 ENVDD_PCH
100K_0402_5%~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PCH (3/8)
Size

Document Number

Rev
0.3

LA-6611P
Date:
5

4

3

2

Wednesday, January 26, 2011

Sheet
1

16

of

64

5

4

3

2

1

+3.3V_RUN

1
RH324

PCI_PIRQA#
2
8.2K_0402_5%~D

1
RH325

PCI_PIRQB#
2
8.2K_0402_5%~D

UH4E

1
RH326

PCI_PIRQC#
2
8.2K_0402_5%~D

1
RH329

PCI_PIRQD#
2
8.2K_0402_5%~D

1
RH327

PCI_REQ1#
2
10K_0402_5%~D

1
RH330

LVDS_CBL_DET#
2
10K_0402_5%~D

1
RH331

CAM_MIC_CBL_DET#
2
10K_0402_5%~D

1
RH328

BT_DET#
2
10K_0402_5%~D
PCH_GPIO3
2
10K_0402_5%~D

1
@ RH332

BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

B21
M20
AY16
BG46

TP21
TP22
TP23
TP24

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6

RSVD

D

1

PCI_GNT3#
C

BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30

2

@ RH333
1K_0402_5%~D

A16 swap override Strap/Top-Block

Swap Override jumper
Low = A16 swap
PCI_GNT#3

TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40

High = Default

B

PIRQA#
PIRQB#
PIRQC#
PIRQD#

PCI_REQ1#
PCIE_MCARD2_DET#
BT_DET#

C46
C44
E40

REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

BBS_BIT1

D47
E42
F46

GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

G42
G40
C42
D44

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

PCI_GNT3#

28 HDD_FALL_INT
34
36
7
32
29

RH3351
RH3361
RH3371
RH3381
RH3391

PLTRST_USH#
PLTRST_MMI#
PLTRST_XDP#
PLTRST_LAN#
PLTRST_EMB#

2
2
2
2
2

LVDS_CBL_DET#
24 LVDS_CBL_DET#
PCH_GPIO3
CAM_MIC_CBL_DET#
24 CAM_MIC_CBL_DET#
FFS_PCH_INT
1
2
0_0402_5%~D
RH334
0_0402_5%~D
0_0402_5%~D
PAD~D T104 @
0_0402_5%~D
PCH_PLTRST#
0_0402_5%~D
0_0402_5%~D

42 CLK_PCI_5048
43 CLK_PCI_MEC
41 CLK_PCI_DOCK
15 CLK_PCI_LOOPBACK

RH160
RH102
RH103

2
2
1

1 22_0402_5%~D
1 22_0402_5%~D
2 22_0402_5%~D

PCI_5048
PCI_MEC
PCI_DOCK

RH105

2

1 22_0402_5%~D

PCI_LOOPBACKOUT

K10
C6
H49
H43
J48
K42
H40

PCI

K40
K38
H38
G38

USB

37 PCIE_MCARD2_DET#
44 BT_DET#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

AT10
BC8

RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

RSVD23
RSVD24

AV5
AV10

RSVD25

AT8

RSVD26
RSVD27

AY5
BA2

RSVD28
RSVD29

AT12
BF3

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS

D

AY7
AV7
AU3
BG4

C

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

USBP1USBP1+
USBP2USBP2+

USBP1USBP1+
USBP2USBP2+

USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+
USBP12USBP12+

39
39
40
40

USBP4- 37
USBP4+ 37
USBP5- 37
USBP5+ 37
USBP6- 37
USBP6+ 37
USBP7- 34
USBP7+ 34
USBP8- 41
USBP8+ 41
USBP9- 41
USBP9+ 41
USBP10- 38
USBP10+ 38
USBP11- 44
USBP11+ 44
USBP12- 24
USBP12+ 24

----->Right Side
----->Right Side (ESATA)
----->WLAN/WIMAX
----->WWAN/UWB
----->Flash
----->USH
----->DOCK
----->DOCK
----->Express Card
----->Blue Tooth
----->Camera
RPH1

USBRBIAS

C33

USB_OC0#
USB_OC1#
USB_OC3#
USB_OC4#

Within 500 mils

1

2
RH151
22.6_0402_1%~D

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

4
3
2
1

5
6
7
8

B33
10K_1206_8P4R_5%~D
RPH2
4
5
3
6
2
7
USB_OC2#
1
8

PME#
PLTRST#

B

+3.3V_ALW_PCH

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
SIO_EXT_SMI#

A14
K20
B17
C16
L16
A16
D14
C14

USB_OC0#
USB_OC1#

USB_OC5#
USB_OC6#

40
40

10K_1206_8P4R_5%~D
SIO_EXT_SMI#
1
2
10K_0402_5%~D
RH164

SIO_EXT_SMI# 43

BD82CPMS-QMVY-A1_FCBGA989~D

+3.3V_RUN

CH102
0.1U_0402_16V4Z~D
1
2

2

B

BBS_BIT1
O

A

4

PCH_PLTRST#_EC

PCH_PLTRST#_EC 14,35,37,38,42,43

SATA_SLPD
(BBS_BIT0)

A

Boot BIOS Location

1

1

G

PCH_PLTRST#

@ RH342
1K_0402_5%~D

TC7SH08FU_SSOP5~D
2

3

7,14 PCH_PLTRST#

BBS_BIT1

UH3

P

5

Boot BIOS Strap
A

0

0

LPC

0

1

Reserved (NAND)

1

0

PCI

1

1

SPI

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PCH (4/8)
Size

*
4

3

Rev
0.3

LA-6611P
Date:

5

Document Number

2

Wednesday, January 26, 2011

Sheet
1

17

of

64

5

4

3

2

1

+3.3V_RUN

+3.3V_ALW_PCH
SIO_EXT_SCI#
1
RH355
1
@ RH353

2
4.7K_0402_5%~D

1
RH263

2
10K_0402_5%~D

SLP_ME_CSW_DEV#
2
1K_0402_5%~D

+3.3V_RUN
D

D

PLL ON DIE VR ENABLE

UH4F
CONTACTLESS_DET#

Integrated Clock Chip Enable
ICC_EN#

PCH_GPIO69

H36

TACH2 / GPIO6

TACH6 / GPIO70

C41

PCIE_MCARD3_DET#

LEDB_DET#

E38

TACH3 / GPIO7

TACH7 / GPIO71

A40

USB_MCARD2_DET#

SIO_EXT_WAKE#

C10

GPIO8

PM_LANPHY_ENABLE

C4

PCH_GPIO15

G2

PCH_GPIO16

U2

PCIE_MCARD1_DET#
EXPRCRD_DET#

38 EXPRCRD_DET#
+3.3V_ALW_PCH

37 USB_MCARD1_DET#

GPIO15

A20GATE
PECI

SATA4GP / GPIO16
TACH0 / GPIO17

E8

GPIO24 / MEM_LED

PCH_GPIO34

K1

USB_MCARD1_DET#

K4
V8

SATA2GP / GPIO36
SATA3GP / GPIO37

Low - Intel ME Crypto Transport Layer Security (TLS)
cipher suite with no confidentiality
High - Intel ME Crypto Transport Layer Security (TLS)
cipher suite with confidentiality

TPM_ID0

N2

SLOAD / GPIO38

TPM_ID1

M3

SDATAOUT0 / GPIO39

FFS_INT2

V13

@RH174
@
RH174

PCH_GPIO37
2
10K_0402_5%~D

44

KB_DET#

KB_DET#

D6

VSS_NCTF_1

A4

VSS_NCTF_2

1

PCH_GPIO36
2
10K_0402_5%~D

Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.

SIO_RCIN#
PCIE_MCARD3_DET# 37

PCH_GPIO1

USB_MCARD2_DET# 37

PCH_GPIO34

P4

SIO_A20GATE

AU16

H_PECI_R

P5

SIO_RCIN#

AY11

H_CPUPWRGD

AY10

PCH_THRMTRIP#_R

T14

INIT3_3V#

AY1

DF_TVS

TS_VSS1

AH8

TS_VSS2

AK11

TS_VSS3

AH10

NC_1

SDATAOUT1 / GPIO48

VSS_NCTF_15

SATA5GP / GPIO49

VSS_NCTF_16

GPIO57

VSS_NCTF_17

2
0_0402_5%~D

2
0_0402_5%~D
SIO_RCIN#

7

GPIO27 (EXPRCRD_DET#)

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ƐƵƉƉůǇĨŽƌĂŶĂůŽŐƌĂŝůƐ͘EŽŶĞĞĚƚŽƵƐĞ
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>Žǁ;ϬͿсŝƐĂďůĞƐƚŚĞsĐĐsZD͘EĞĞĚƚŽƵƐĞŽŶͲďŽĂƌĚ
ĨŝůƚĞƌĐŝƌĐƵŝƚƐĨŽƌĂŶĂůŽŐƌĂŝůƐ͘

+1.05V_RUN_VTT
2
RH262

T106

1
56_0402_5%~D

1

PCH_GPIO69

CH97
0.1U_0402_16V4Z~D

1
RH260

2
1.5K_0402_1%~D

AK10
P37

NC_1

PAD~D T108 @

BG2

VSS_NCTF_15

BG48

VSS_NCTF_16

BH3

VSS_NCTF_17

BH47

VSS_NCTF_18

BJ4

VSS_NCTF_19

VSS_NCTF_19

A44

VSS_NCTF_2

VSS_NCTF_20

BJ44

VSS_NCTF_20

VSS_NCTF_3

A45

VSS_NCTF_3

VSS_NCTF_21

BJ45

VSS_NCTF_21

VSS_NCTF_4

A46

VSS_NCTF_4

VSS_NCTF_22

BJ46

VSS_NCTF_22

VSS_NCTF_5

A5

BJ5

VSS_NCTF_23

VSS_NCTF_6

A6

BJ6

VSS_NCTF_24

VSS_NCTF_7

B3

C2

VSS_NCTF_25

VSS_NCTF_8

VSS_NCTF_23

43

H_PECI

43

H_CPUPWRGD 7

PAD~D
@

PECI_EC

C

VSS_NCTF_1

VSS_NCTF_5

1
RH261

SIO_A20GATE 43

1
@ RH159

2

VSS_NCTF_18

VSS_NCTF_24

VSS_NCTF_7

VSS_NCTF_25

B47

VSS_NCTF_8

VSS_NCTF_26

C48

VSS_NCTF_26

VSS_NCTF_9

BD1

VSS_NCTF_9

VSS_NCTF_27

D1

VSS_NCTF_27

VSS_NCTF_10

BD49

VSS_NCTF_10

VSS_NCTF_28

D49

VSS_NCTF_28

VSS_NCTF_11

BE1

VSS_NCTF_11

VSS_NCTF_29

E1

VSS_NCTF_29

VSS_NCTF_12

BE49

VSS_NCTF_12

VSS_NCTF_30

E49

VSS_NCTF_30

VSS_NCTF_13

BF1

VSS_NCTF_13

VSS_NCTF_31

F1

VSS_NCTF_31

VSS_NCTF_14

BF49

VSS_NCTF_14

VSS_NCTF_32

F49

VSS_NCTF_32

Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.

B

+VCCDFTERM
RH149
2.2K_0402_5%~D

VSS_NCTF_6

B

@RH175
@
RH175

DF_TVS

TS_VSS4

NCTF

1

V3

INIT3_3V#

GPIO35

M5

TEMP_ALERT#

THRMTRIP#

STP_PCI# / GPIO34

PCH_GPIO37

FFS_INT2

PROCPWRGD

GPIO28

GPIO15

28

RCIN#

GPIO27

PCH_GPIO36

42 TEMP_ALERT#

SIO_A20GATE

EXPRCRD_DET#

SCLOCK / GPIO22

P8

CONTACTLESS_DET# 34

LAN_PHY_PWR_CTRL / GPIO12

T5

E16

SLP_ME_CSW_DEV#

42 SLP_ME_CSW_DEV#
PCH_GPIO15
2
1K_0402_5%~D

D40

MEDIA_DET#

MEDIA_DET#

37 PCIE_MCARD1_DET#

1
RH354

CONTACTLESS_DET#

B41

GPIO17

HIGH: DISABLED [DEFAULT]
LOW: ENABLED
31

C

C40

TACH5 / GPIO69

T7

BD82CPMS-QMVY-A1_FCBGA989~D

1

42 SIO_EXT_WAKE#
32 PM_LANPHY_ENABLE

SIO_EXT_WAKE#
2
10K_0402_5%~D

1
RH177

TACH4 / GPIO68

TACH1 / GPIO1

IO_LOOP#

IO_LOOP#

31 LEDB_DET#
+3.3V_ALW_PCH

BMBUSY# / GPIO0

A42

2
10K_0402_1%~D
1
10K_0402_5%~D
1
10K_0402_5%~D
1
10K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D

2

31

SIO_EXT_SCI# 1
2 SIO_EXT_SCI#_R
RH259
0_0402_5%~D
PCH_GPIO1

CPU/MISC

43 SIO_EXT_SCI#

GPIO

ENABLED - HIGH (RH238 UNSTUFFED) DEFAULT
DISABLED - LOW (RH238 STUFFED)

1
RH256
2
RH158
2
RH203
2
RH254
1
RH165
1
RH241

DF_TVS_R 1
RH150

DF_TVS
2
0_0402_5%~D

EĞĞĚƚŽŵŽĚŝĨǇĨŽůůŽǁdWDKDĐŽŶĨŝŐ͘
+3.3V_RUN

+3.3V_RUN

1

PCH_GPIO36
1
10K_0402_5%~D
PCH_GPIO37
1
1K_0402_1%~D
PCH_GPIO16
1
10K_0402_5%~D
TEMP_ALERT#
1
10K_0402_5%~D
MEDIA_DET#
2
10K_0402_5%~D
GPIO17
2
8.2K_0402_5%~D
IO_LOOP#
2
10K_0402_5%~D
LEDB_DET#
2
10K_0402_5%~D

DMI & FDI Termination Voltage
3@
RH268
20K_0402_5%~D

Set to Vss when LOW

China TPM

2

1

1@
RH267
10K_0402_5%~D

TPM_ID1
1

2@
RH270
10K_0402_5%~D

No TPM, No China TPM
4@
RH271
2.2K_0402_5%~D

USH2.0

TPM_ID0

TPM_ID1

0

0

0

1

1

1

NV_CLE
Set to Vcc when HIGH
A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

2

2

TPM_ID0

1

A

2
@ RH171
2
@ RH173
2
RH265
2
RH266
1
RH272
1
RH269
1
RH163
1
RH273

2

+3.3V_RUN

Title
+3.3V_ALW_PCH
2
RH170

PCH (5/8)
Size

KB_DET#
1
10K_0402_5%~D

Rev
0.3

LA-6611P
Date:

5

Document Number

4

3

2

Wednesday, January 26, 2011

Sheet
1

18

of

64

5

4

3

2

1

+3.3V_RUN

+1.05V_RUN

UH4G

LH1

POWER

+VCCADAC

CRT

VCCALVDS
VSSALVDS
VCCTX_LVDS[1]

VCCTX_LVDS[3]

1
RH247
@RH247
@

+VCCAPLLEXP BJ22

2

1

CH40
10U_0805_4VAM~D

1UH_LB2012T1R0M_20%~D
AN16
AN17

VCCIO[15]
VCCIO[16]

2 @

AN27
+1.05V_RUN
AP21

C

AP23

VCCIO[23]

BH29

2

VCCIO[24]

AP16

1
@ RH195

2
0.022_0805_1%

+VCCAPLL_FDI

BG6

1
AP36
AP37

VCC3_3[7]

V34

2

1

2

1

2

1.05

0.001

V5REF

5

0.001

V5REF_Sus

5

0.001

Vcc3_3

3.3

0.266

VccADAC3

3.3

0.001

VccADPLLA

1.05

0.08

VccADPLLB

1.05

0.08

VccCore

1.05

1.3

VccDMI

1.05

0.042

VccIO

1.05

2.925

VccASW

1.05

1.01
0.020

V_PROC_IO

2

CH43
0.1U_0402_10V7K~D

AT16

+1.05V_+1.5V_1.8V_RUN

VCCDMI[1]

AT20

VCCCLKDMI

VCCIO[26]

VCCDFTERM[1]

VCC3_3[3]

VCCVRM[2]
VccAFDIPLL

+1.05V_RUN_VTT
CH49 1

AB36

VCCDFTERM[2]

AG16

2 1U_0402_6.3V6K~D

VccSPI

3.3

+1.05V_RUN_CLKDMI
1
2
+1.05V_RUN
LH9
1
1
100NH_HK1608R10J-T_5%_0603~D

VccDSW3_3

3.3

0.003

2

+VCCDFTERM

1.8

0.19

VccRTC

3.3

2 (mA)

VccSus3_3

3.3

0.119

3.3

0.01

2

+VCCDFTERM

AG17

1
@ RH276

2
0_0805_5%~D

+3.3V_RUN

PJP52
VCCDFTERM[3]
VCCDFTERM[4]

AJ16

1

1

AJ17

2

CH52
0.1U_0402_10V7K~D

2

+1.8V_RUN

VccSusHDA

PAD-OPEN1x1m

VccVRM

+1.05V_RUN

AP17
AU20

B

VCCIO[27]
VCCDMI[2]

+3.3V_M

VCCSPI

+1.8V_RUN

2
RH197

1
0_0603_5%~D

2

2
@ RH198

1
0_0603_5%~D

CH54
1U_0402_6.3V6K~D

1.05

0.095

1.05

0.055

VccALVDS

3.3

0.001

VccTX_LVDS

1.8

0.06

B

1

+

@ CH41
330U_D2_2VM_R6M~D

2
2
@ RH199

VccSSC
VccDIFFCLKN

+1.05V_RUN

1
+1.05V_RUN

0.02

1

+1.05V_+1.5V_1.8V_RUN

/ŶƚĞůƌĞǀŝĞǁĨĞĞĚďĂĐŬ

1.05

V1

BD82CPMS-QMVY-A1_FCBGA989~D

+1.5V_RUN

0.16

1.8 / 1.5

VccClkDMI

+1.05V_RUN_VTT

D

+3.3V_RUN
1

VCCIO[25]

+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN

S0 Iccmax
Current (A)

C

FDI

CH51
0.1U_0402_10V7K~D

1

AM38

V33

VCCVRM[3]

VCCIO[21]
VCCIO[22]

AN34

Voltage

VCCIO[20]

AP26

AN33

+3.3V_RUN

VCCIO[19]

AP24

AT24

+1.8V_RUN_LVDS

AM37

VCC3_3[6]

LH8
100NH_HK1608R10J-T_5%_0603~D
2
1

@ CH106
10U_0603_4VAM~D

2

+1.8V_RUN

CH50
1U_0402_6.3V6K~D

2

1

CH48
1U_0402_6.3V6K~D

2

1

CH47
1U_0402_6.3V6K~D

2

1

CH46
1U_0402_6.3V6K~D

1

CH45
1U_0402_6.3V6K~D

2

CH44
10U_0805_4VAM~D

1

Voltage Rail

VCCIO[18]

DFT / SPI

AN26

PCH Power Rail Table
+3.3V_RUN

VCCIO[17]

VCCIO

AN21

2

AK37

VCCAPLLEXP

HVCMOS

+1.05V_RUN

50 mA

VCCTX_LVDS[4]

2

AK36

VCCIO[28]

DMI

AN19

2

2
1
BLM18PG181SN1_0603~D

CH105
22U_0805_6.3V6M~D

VCCTX_LVDS[2]

U47

1

CH104
0.01U_0402_16V7K~D

LVDS

VCC CORE

VSSADAC

1

CH103
0.01U_0402_16V7K~D

+1.05V_RUN

VCCADAC

1

CH36
10U_0805_4VAM~D

2

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]

U48

CH35
0.1U_0402_10V7K~D

2

1

CH31
1U_0402_6.3V6K~D

2

1

CH33
1U_0402_6.3V6K~D

2

1

CH32
1U_0402_6.3V6K~D

D

CH30
10U_0805_4VAM~D

1

AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31

CH34
0.01U_0402_16V7K~D

4.555A

+

@ CH42
330U_D2_2VM_R6M~D

2

1
0_0603_5%~D

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

PCH (6/8)
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

19

of

64

4

3

2

1

+1.05V_RUN

+VCCACLK

+5V_ALW

POWER

VCCIO[31]
1

1

+3.3V_RUN_VCC_CLKF33

T38

DCPSUSBYP

VCCIO[32]
VCCIO[33]

+VCCAPLL_CPY_PCH

BH23

+VCCSUS1

AL24

1

VCCSUS3_3[8]
VCCIO[14]
DCPSUS[3]

VCCSUS3_3[9]
VCCSUS3_3[10]

@

2

2

+1.05V_M

+1.05V_RUN_VCCA_A_DPL 1
@ RH279

2

1

2

AA26
AA27
AA29
AA31
AC26

CH69
1U_0402_6.3V6K~D

2

1

2

CH68
1U_0402_6.3V6K~D

1

CH67
1U_0402_6.3V6K~D

C

1

CH74
1U_0402_6.3V6K~D

2

CH73
10U_0805_6.3V6M~D

1

1

AA24

CH65
22U_0805_6.3VAM~D

1

+3.3V_RUN_VCC_CLKF33

CH64
22U_0805_6.3VAM~D

LH4
10UH_LBR2012T100M_20%~D
1
2

AC27

2 +1.05V_RUN_VCCA_B_DPL
0_0805_5%~D

+1.05V_RUN

+
2

1

2

VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]

VCCASW[11]
VCCASW[12]

AD31

VCCASW[13]

W29

VCCASW[14]

V5REF_SUS

VCCASW[15]

DCPSUS[4]
VCCSUS3_3[1]

+VCCRTCEXT
+1.05V_+1.5V_1.8V_RUN

V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCC3_3[1]
VCC3_3[8]

VCCASW[16]

2

CH78
0.1U_0402_10V7K~D

VCC3_3[4]

VCCASW[19]
VCCASW[20]

VCC3_3[2]

+1.05V_RUN_VCCA_B_DPL

VCCVRM[4]

VCCIO[13]

AF17
AF33
AF34
AG34

2 CH81
1U_0402_6.3V6K~D

1

2
+1.05V_RUN_VTT

2

T17
V19

DCPSUS[1]
DCPSUS[2]

BJ8

V_PROC_IO

A22

+RTC_CELL

VCCIO[2]

VCCIO[4]

2

1

2

AN23

+VCCA_USBSUS

AN24

P34

VCCASW[22]

VCCRTC

VCCASW[23]
VCCASW[21]

VCCSUSHDA

+PCH_V5REF_SUS

1

RH208
10_0402_5%~D

1
CH63
0.1U_0402_10V7K~D

CRB 0.7 10ohm 0603
trace width 20mil.

2

1
CH66
0.1U_0402_10V7K~D

+VCCA_USBSUS
+3.3V_ALW_PCH

+PCH_V5REF_RUN

1

N20

2

N22

1

P20
2

P22

C

@CH62
@CH62
1U_0402_6.3V6K~D

+3.3V_RUN
CH70
1U_0603_10V6K~D

+3.3V_RUN

+5V_RUN

1
AA16
2

W16

CH72
0.1U_0402_10V7K~D

+3.3V_RUN

DH3
RB751S40T1_SOD523-2~D

T34

+PCH_V5REF_RUN

1

AJ2
1
AF13
AH13
AH14

CH75
0.1U_0402_10V7K~D

1
CH71
1U_0603_10V6K~D

CH77
1U_0402_6.3V6K~D

+1.05V_RUN
@ LH5
10UH_LBR2012T100M_20%~D
1
2

+VCCSATAPLL

AK1
+1.05V_+1.5V_1.8V_RUN

2

1

2

AF14

RH213
10_0402_5%~D

+1.05V_RUN

B

1

AF11

CH80 @
10U_0805_6.3V6M~D
+1.05V_RUN

AC16
AC17
AD17

1

2

CH90
1U_0402_6.3V6K~D

2

1

+PCH_V5REF_SUS

+1.05V_M

BD82CPMS-QMVY-A1_FCBGA989~D

1

M26

DCPSST

CH83
1U_0402_6.3V6K~D

CH89
0.1U_0402_10V7K~D

2

+1.05V_M_VCCSUS

CH88
0.1U_0402_10V7K~D

2

1

V16

D

@

+5V_ALW_PCH

DH2
RB751S40T1_SOD523-2~D

+1.05V_RUN

+3.3V_ALW_PCH

2

VCCSSC

+VCCSST

1

CH87
0.1U_0402_10V7K~D

2

1

CH86
0.1U_0402_10V7K~D

A

CH85
4.7U_0603_6.3V6K~D

1

VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

@

2

VCCVRM[1]

MISC

1

CH84
0.1U_0402_10V7K~D

RH248
@RH248
@

2 +1.05V_M_VCCSUS
0.022_0805_1%

CH96
1U_0402_6.3V6K~D

1

VCCAPLLSATA

VCCIO[3]
AG33

+1.05V_M

VCCADPLLB

CPU

1

BF47

VCCADPLLA

RTC

2

CH79
1U_0402_6.3V6K~D

VCCIO[6]

HDA

1

2

T26

2
DCPRTC
VCCIO[12]

BD47

V24
P24

+3.3V_ALW_PCH
1

2

SATA

+1.05V_RUN_VCCA_A_DPL

2

+3.3V_RUN

+1.05V_RUN

B

V23

VCCASW[18]

W33

Y49

T24

VCCASW[17]

W31

N16

1

2

VCCIO[5]
1

T23

CH76
0.1U_0402_10V7K~D

2

1

VCCASW[4]

AD29

W26

CH93
1U_0402_6.3V6K~D

+
2

1

CH95
220U_B2_2.5VM_R35M~D

1

CH92
1U_0402_6.3V6K~D

LH7
10UH_LBR2012T100M_20%~D

VCCASW[3]

VCCASW[10]

W24

+1.05V_RUN_VCCA_B_DPL

2

CH94
220U_B2_2.5VM_R35M~D

1

+1.05V_RUN_VCCA_A_DPL

VCCIO[34]

AC31

W23

+3.3V_ALW_PCH

VCCASW[2]

AC29

W21
LH6
10UH_LBR2012T100M_20%~D
1
2

VCCASW[1]

PCI/GPIO/LPC

AA21

+3.3V_RUN

Clock and Miscellaneous

2

AA19

2

+3.3V_ALW_PCH
VCCSUS3_3[7]

VCCAPLLDMI2

VCCSUS3_3[6]

CH61
1U_0402_6.3V6K~D

T29

CH60
0.1U_0402_10V7K~D

AL29

2

2

T27

1

45 ALW_ENABLE

VCC3_3[5]

2

+1.05V_RUN

P28

@ QH4
SSM3K7002FU_SC70-3~D

CH59
0.1U_0402_10V7K~D

@ CH58
10U_0805_6.3V6M~D

@ CH57
0.1U_0402_10V7K~D

USB

@ LH3
10UH_LBR2012T100M_20%~D
1
2

V12

1

1

+PCH_VCCDSW

P26

RH278
20K_0402_5%~D

VCCDSW3_3

N26

CH98
0.1U_0402_10V7K~D

VCCIO[30]

2

T16

VCCIO[29]

1

+VCCDSW3_3

VCCACLK

2

2

CH55
0.1U_0402_10V7K~D

2

AD49

1

3

2

D

1

D

+1.05V_RUN

+5V_ALW_PCH

+1.05V_RUN

2
G

2
0_0402_5%~D
2
0_0402_5%~D

CH56
1U_0402_6.3V6K~D

1
RH201
1
@ RH253

2

2
0.022_0805_1%

UH4J

+3.3V_ALW2

1

1
RH200
@RH200
@

RH202
0_0402_5%~D
1
2

1

+3.3V_ALW_PCH

S

5

CH82
1U_0402_6.3V6K~D

T21
V21
T19

+3.3V_ALW_PCH

P32

1

2

A

CH91
0.1U_0402_10V7K~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PCH (7/8)
Size

Document Number

Rev
0.3

LA-6611P
Date:
5

4

3

2

Wednesday, January 26, 2011

Sheet
1

20

of

64

5

4

3

2

1

UH4I
AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3

UH4H
H5
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3

D

C

B

VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

BD82CPMS-QMVY-A1_FCBGA989~D

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

D

C

B

BD82CPMS-QMVY-A1_FCBGA989~D
A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

PCH (8/8)
Size

4

3

2

Rev
0.3

LA-6611P
Date:

5

Document Number
Wednesday, January 26, 2011

Sheet
1

21

of

64

5

4

3

2

1

D

D

+FAN1_VOUT
REM_DIODE1_P_4022

C270
2200P_0402_50V7K~D

1

REM_DIODE1_N_4022

C

2

1
2
3
4

BC_INT#_EMC4022

5
6

GND
GND

FAN1_TACH_FB

1

2

FAN1_DET#

2
R385
2
R402
2
R431

1
10K_0402_5%~D
1
10K_0402_5%~D
1
10K_0402_5%~D

TYCO_2-1775293-4~D

>ŝŶŬŽŶĞ

1
C271
2200P_0402_50V7K~D

2

1

1
3

2
B
Q13
MMBT3904WT1G_SC70-3~D

1
2
3
4

REM_DIODE3_P_4022

Q14
MMBT3904WT1G_SC70-3~D
2

C

E

E

2

@

B

1
@ C269
100P_0402_50V8J~D

C272
100P_0402_50V8J~D

1

C

3

ŝŽĚĞĐŝƌĐƵŝƚĂƚWϱͬEϱŝƐƵƐĞĚĨŽƌƐŬŝŶƚĞŵƉƐĞŶƐŽƌĂŶĚƉůĂĐĞ
ϮϳϮĐůŽƐĞƚŽYϭϰ;ƉůĂĐĞĚYϭϯĐůŽƐĞƚŽ:D/E/ϭĨŽƌttEĐĂƌĚͿ͘
ŝŽĚĞĐŝƌĐƵŝƚĂƚWϯͬEϯŝƐŶƵƐĞĚĨŽƌƐĞŶƐŽƌ^KͲ/DDƚĞŵƉ͘WůĂĐĞ
YϭϰŶĞĂƌ/DDϭĂŶĚƉůĂĐĞϮϲϵĐůŽƐĞƚŽYϭϯ

C219
22U_0805_6.3VAM~D

2

2
2
B
E Q12
MMBT3904WT1G_SC70-3~D

D2
RB751S40T1_SOD523-2~D
2
1

@ C286
100P_0402_50V8J~D

C

+3.3V_M

JFAN1 CONN@
FAN1_DET#
+FAN1_VOUT
FAN1_TACH_FB

1

1

3

WůĂĐĞƵŶĚĞƌWh

C

REM_DIODE3_N_4022

+5V_RUN

U9

1

1

2

+3.3V_M

R389
10K_0402_5%~D
VDD_PWRGD
1
2

2
3
6
13

VDDH
VDDH
VDDL
VDD_PWRGD

THERMTRIP2#
THERMTRIP3#

REM_DIODE1_N_4022
REM_DIODE1_P_4022

17

THERMATRIP2#

18

THERMATRIP3#

23
24

DN1/THERM
DP1/VREF_T

SYS_SHDN#

19

26
27

DN2/DP4
DP2/DN4

POWER_SW#

20

30
29

DP3/DN5
DN3/DP5

ACAVAIL_CLR
ATF_INT#/BC_IRQ#

21
9

1

2

C277
0.1U_0402_16V4Z~D

2

+3.3V_RUN
C275
10U_0805_6.3V6M~D

+3.3V_M

1

C305
0.1U_0402_16V4Z~D

2

C276
10U_0805_10V4Z~D

1

2

R395
8.2K_0402_5%~D
+1.05V_RUN_VTT

REM_DIODE3_P_4022
REM_DIODE3_N_4022
R387
4.7K_0402_5%~D
VCP2
2
1

THERMATRIP2#

1

R398
C
2.2K_0402_5%~D
1
2
2
B
Q15 E
PMST3904_SOT323-3~D

1

3

B

2

55 BQ24765_IINP
C278
0.1U_0402_16V4Z~D

31
25

VSET_4022

28

FAN1_TACH_FB

10

FAN1_DET#

11

THERM_STP#
POWER_SW#

1

ACAV_IN
BC_INT#_EMC4022

48

2
+RTC_CELL
47K_0402_1%~D

@R390
@
R390

43,55,57
ACAV_IN
BC_INT#_EMC4022 43
B

VCP
VIN
FAN_OUT
FAN_OUT

5
4

SMCLK/BC_CLK
SMDATA/BC_DATA

8
7

VSET

+FAN1_VOUT

7 H_THERMTRIP#

1

4022_PWN
2
10K_0402_5%~D

15

1
R391

2 3V_PWROK#
1K_0402_5%~D

12

GPIO3/PWM/THERMTRIP_SIO

3V_PWROK#

+VCC_4022

C281
0.1U_0402_16V4Z~D
1
2

2

ZĞƐƚсϭ͘ϰŝŶŬŽŶĞ

@ L8
DLW21SN121SQ2L_4P~D
1
2 2
3

FP_USB_D+
C

FP_USB_D-

3

2
0_0402_5%~D
2
0_0402_5%~D

ϮϴϱWůĂĐĞĐůŽƐĞƚŽ:/Kϭ͘ϭ

B

B

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

FP Conn.
Size

4

3

2

Rev
0.3

LA-6611P
Date:

5

Document Number
Wednesday, January 26, 2011

Sheet
1

23

of

64

5

4

3

2

1

LCD Power
JLVDS1 CONN@
45 G5
40 40
44 G4
39 39
43 G3
38 38
42 G2
37 37
41 G1
36 36
35 35
34 34
33 33
32 32
31 31
30 30
29 29
28 28
27 27
26 26
25 25
24 24
23 23
22 22
21 21
20 20
19 19
18 18
17 17
16 16
15 15
14 14
13 13
12 12
11 11
10 10
9 9
8 8
7 7
6 6
5 5
4 4
3 3
2 2
1 1

BLM18BB221SN1D_2P~D
D6
LCD_ACLK+_PCH 16
LCD_ACLK-_PCH 16

2

16,42 ENVDD_PCH

3

LCD_A1+_PCH 16
LCD_A1-_PCH 16

BIA_PWM_PCH 16

2

Close to JVDS1.34,35

1

3
3

2

2

Q22
SSM3K7002FU_SC70-3~D

2
2 2.2K_0402_5%~D LDDC_CLK_PCH

R426

1

2 2.2K_0402_5%~D LDDC_DATA_PCH

C

PWR_SRC_ON

1
R423

1

C296
0.1U_0603_50V4Z~D

2
1
47K_0402_5%~D

3

2
G

C304
0.1U_0402_16V4Z~D

2

1

R422
100K_0402_5%~D

RB751V-40GTE-17_SOD323-2~D

R424

+BL_PWR_SRC

S

1
C298
0.1U_0402_16V4Z~D

2

G

2

PANEL_BKEN_PCH 16

40mil

6
5
2
1

S

+3.3V_RUN

1

1

D69
RB751V-40GTE-17_SOD323-2~D
1
2
PANEL_BKEN_EC 42

R1138
100K_0402_5%~D
+3.3V_RUN

2

D

4

RB751V-40GTE-17_SOD323-2~D
D64
1

Q21
FDC654P-G_SSOT-6~D

+PWR_SRC

40mil
C297
1000P_0402_50V7K~D

BREATH_WHITE_LED 46
BATT_YELLOW_LED 46
BATT_WHITE_LED 46

2

D68
RB751V-40GTE-17_SOD323-2~D
1
2
BIA_PWM_EC 43

R1137
10K_0402_5%~D

3

1

1

DISP_ON

1

1

D63
BIA_PWM_LVDS

>ŝŶŬŽŶĞ

+LCDVDD

2

1

Q20
PDTC124EU_SC70-3~D

BAT54CW_SOT323-3~D

LCD_A0+_PCH 16
LCD_A0-_PCH 16
LDDC_DATA_PCH 16
LDDC_CLK_PCH 16
42
LCD_TST
+3.3V_RUN
+LCDVDD

BREATH_WHITE_LED
BATT_YELLOW_LED
BATT_WHITE_LED

2

D

LCD_A0+_PCH
LCD_A0-_PCH
LDDC_DATA_PCH
LDDC_CLK_PCH

EN_LCDPWR

1

1

LCD_A1+_PCH
LCD_A1-_PCH

42 LCD_VCC_TEST_EN

2

D

3

LCD_A2+_PCH 16
LCD_A2-_PCH 16

1

2

LCD_A2+_PCH
LCD_A2-_PCH

5
4

LVDS_CBL_DET# 17

LCD_ACLK+_PCH
LCD_ACLK-_PCH

2
1

BIA_PWM_LVDS

C292
0.1U_0402_16V4Z~D

C293
0.1U_0402_25V4Z~D

2

G

2

L83
DISP_ON
BIA_PWM_LVDS_L 1

1

2

Q19B
DMN66D0LDW-7_SOT363-6~D

0.1U_0603_50V4Z~D

R414
100K_0402_5%~D

+BL_PWR_SRC
C294 1

R413
130_0402_5%~D

CAM_MIC_CBL_DET# 17

6 2

30

+15V_ALW

1

DMIC_CLK

+LCDVDD
+CAMERA_VDD

USBP12_DUSBP12_D+
CAM_MIC_CBL_DET#

+3.3V_ALW

S

30

D

DMIC_CLK

DMIC0

AMPHE_LVDSS05400121
C

SI3456DDV-T1-GE3_TSOP6~D
+LCDVDD
6
4
5
2
R412
1
100K_0402_5%~D

+15V_ALW
DMIC0

Q19A
DMN66D0LDW-7_SOT363-6~D

D

Q18

WůĂĐĞŶĞĂƌƚŽ:>s^ϭ

43

EN_INVPWR

EN_INVPWR

FDC654P: P CHANNAL

Close to JLVDS1.33

Panel backlight power control by EC

For Webcam
B

B

+3.3V_RUN
+CAMERA_VDD

2

2
+15V_ALW

17

USBP12+

17

USBP12-

2

USBP12+

1

USBP12-

4

@ L10
DLW21SN121SQ2L_4P~D
1
2 2
4

3

3

1
R427

2
0_0402_5%~D

1
R428

2
0_0402_5%~D

USBP12_D+
USBP12_D-

0.1U_0402_25V4Z~D

1
C303

1
2
1

S

2
G

Q24
SSM3K7002FU_SC70-3~D

A

D

3

CCD_OFF

C301
0.1U_0402_16V4Z~D

1

R429
100K_0402_5%~D

CCD_OFF

1

G

2

Webcam PWR CTRL
42

D

S

1

C300
10U_0805_10V4Z~D

2

C299
0.1U_0402_16V4Z~D

1

3

Q23
PMV45EN_SOT23-3~D

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

LVDS & CAM Conn
Size

4

3

2

Rev
0.3

LA-6611P
Date:

5

Document Number
Wednesday, January 26, 2011

Sheet
1

24

of

64

2

1

B

B

VGA SW for MB/DOCK
+3.3V_RUN
U14
16 PCH_CRT_VSYNC
16 PCH_CRT_HSYNC
16 PCH_CRT_RED
16 PCH_CRT_GRN
16 PCH_CRT_BLU

PCH_CRT_VSYNC
PCH_CRT_HSYNC
PCH_CRT_RED
PCH_CRT_GRN
PCH_CRT_BLU

1
2
5
6
7

A0
A1
A2
A3
A4

CRT_SWITCH

8

SEL1

PCH_CRT_DDC_DAT
PCH_CRT_DDC_CLK

16 PCH_CRT_DDC_DAT
16 PCH_CRT_DDC_CLK

CRT_SWITCH

42 CRT_SWITCH

9
10
30

3
11
28
31
33

VDD
VDD
VDD
VDD
VDD

4
16
23
29
32

SEL2

0B1
1B1
2B1
3B1
4B1
5B1
6B1

27
25
22
20
18
12
14

VSYNC_BUF
HSYNC_BUF
RED_CRT
GREEN_CRT
BLUE_CRT
DAT_DDC2_CRT
CLK_DDC2_CRT

GND
GND
GND
GND
GPAD

0B2
1B2
2B2
3B2
4B2
5B2
6B2

26
24
21
19
17
13
15

VSYNC_DOCK
HSYNC_DOCK
RED_DOCK
GREEN_DOCK
BLUE_DOCK
DAT_DDC2_DOCK
CLK_DDC2_DOCK

A5
A6

VSYNC_BUF 31
HSYNC_BUF 31
RED_CRT
31
GREEN_CRT 31
BLUE_CRT
31
DAT_DDC2_CRT 31
CLK_DDC2_CRT 31
VSYNC_DOCK 41
HSYNC_DOCK 41
RED_DOCK
41
GREEN_DOCK 41
BLUE_DOCK 41
DAT_DDC2_DOCK 41
CLK_DDC2_DOCK 41

PI3V712-AZLEX_TQFN32_6X3~D
+3.3V_RUN

2

1

2

1

2

1

2

1

2

1

2

C321
0.01U_0402_16V7K~D

1

C320
0.1U_0402_16V4Z~D

APR/SPR

C319
0.1U_0402_16V4Z~D

A=B2

C318
0.01U_0402_16V7K~D

MB

1

C317
0.1U_0402_16V4Z~D

Source

A=B1

C316
10U_0805_6.3V6M~D

Chanel

0

SEL1/SEL2

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

CRT switch
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
2

1

Sheet

25

of

64

2

1

1
@ R451
L19
16 TMDSB_PCH_CLK

C352 2

1 0.1U_0402_10V7K~D TMDSB_PCH_C_CLK

1

16 TMDSB_PCH_CLK#

C353 2

1 0.1U_0402_10V7K~D TMDSB_PCH_C_CLK#

4

1

2
0_0402_5%~D
2

2

TMDSB_CON_CLK

3

3

TMDSB_CON_CLK#

F2
D4
BAT1000-7-F_SOT23-3~D 2A_8VDC_SMD1812P200TF

+5V_RUN

2
3

R1165
R449
R448
R450
R452
R453
R454
R455
R456

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

680_0402_5%~D
680_0402_5%~D
680_0402_5%~D
680_0402_5%~D
680_0402_5%~D
680_0402_5%~D
680_0402_5%~D
680_0402_5%~D

16 TMDSB_PCH_N0

C351 2

1 0.1U_0402_10V7K~D TMDSB_PCH_C_N0

1
4

1

2
0_0402_5%~D
2

4

3

2

TMDSB_CON_P0

3

TMDSB_CON_N0

Q26
SSM3K7002FU_SC70-3~D
3

16 TMDSB_PCH_P1

1 0.1U_0402_10V7K~D TMDSB_PCH_C_P1

1

1

2

2

TMDSB_CON_P1

16 TMDSB_PCH_N1

C349 2

1 0.1U_0402_10V7K~D TMDSB_PCH_C_N1

4

4

3

3

TMDSB_CON_N1

1

S

2

DLW21SN900HQ2L_0805_4P~D
1
2
@ R469
0_0402_5%~D

16 TMDSB_PCH_P2

C346 2

1 0.1U_0402_10V7K~D TMDSB_PCH_C_P2

16 TMDSB_PCH_N2

C347 2

1 0.1U_0402_10V7K~D TMDSB_PCH_C_N2

4

4

B

+VDISPLAY_VCC

2
0_0402_5%~D

C348 2

1
@ R470
L22
1 1

@
R5
0_1206_5%~D

3

2

JHDMI1 CONN@

2
0_0402_5%~D
2

1

C338
10U_0805_10V4Z~D

1
@ R468
L21

D

2
G

2

1 0.1U_0402_10V7K~D TMDSB_PCH_C_P0

C337
0.1U_0402_10V7K~D

+3.3V_RUN

16 TMDSB_PCH_P0

C350 2

DLW21SN900HQ2L_0805_4P~D
1
2
@ R466
0_0402_5%~D

1

B

TMDSB_PCH_C_P2
TMDSB_PCH_C_N2
TMDSB_PCH_C_P1
TMDSB_PCH_C_N1
TMDSB_PCH_C_P0
TMDSB_PCH_C_N0
TMDSB_PCH_C_CLK
TMDSB_PCH_C_CLK#

1
10K_0402_5%~D

1

2

2

1
@ R462
L20
HDMI_CEC

+5V_RUN_HDMI

1

1

+3.3V_RUN

NC

4

DLW21SN900HQ2L_0805_4P~D
1
2
@ R459
0_0402_5%~D

HDMIB_PCH_HPD_R

2

TMDSB_CON_P2

3

TMDSB_CON_N2

19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R
HDMI_CEC
TMDSB_CON_CLK#
TMDSB_CON_CLK

DLW21SN900HQ2L_0805_4P~D
1
2
@ R471
0_0402_5%~D

TMDSB_CON_N0
TMDSB_CON_P0
TMDSB_CON_N1
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2

HP_DET
+5V
Reserved
SDA
SCL
CEC
DDC/CEC_GND
CKCK+
CK_shield
D0D0+
D0_shield
D1D1+
D1_shield GND1
D2GND2
D2+
GND3
D2_shield GND4

20
21
22
23

FOX_QJC3N93-2140-7H

>ŝŶŬŽŶĞ

+3.3V_RUN
+5V_RUN_HDMI

PCH_SDVO_CTRLCLK_R

16 HDMIB_PCH_HPD

3

1

Q121
SSM3K7002FU_SC70-3~D

HDMIB_PCH_HPD_R

R1128
20K_0402_5%~D
2

PCH_SDVO_CTRLDATA_R

D

Q120B
DMN66D0LDW-7_SOT363-6~D

3

2
2.2K_0402_5%~D

A

S

PCH_SDVO_CTRLDATA 4

PCH_SDVO_CTRLDATA_R 1
R1583
G

16 PCH_SDVO_CTRLDATA

2
2.2K_0402_5%~D

1

6

2

1

PCH_SDVO_CTRLCLK_R
1
R1584

2

PCH_SDVO_CTRLCLK
5

16 PCH_SDVO_CTRLCLK

Q120A
DMN66D0LDW-7_SOT363-6~D

1

A

R1168
1M_0402_5%~D

2

+3.3V_RUN

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

HDMI port
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
1

Sheet

26

of

64

5

4

3

AUX/DDC SW for DPC to E-DOCK

2

+3.3V_RUN
2

1

AUX/DDC SW for DPD to E-DOCK

1

+3.3V_RUN

C356
0.1U_0402_16V4Z~D
C357
0.1U_0402_10V7K~D
DPC_AUX_C
2
1

41 DPC_DOCK_AUX
16 DPC_PCH_DOCK_AUX#

2
C360

41 DPC_DOCK_AUX#

U20
1
2

DPC_DOCK_AUX

BE0
A0

3

B0

4
5

DPC_AUX#_C
1
0.1U_0402_10V7K~D
DPC_DOCK_AUX#

VCC
BE3
A3

BE1
A1

6
7

B3
BE2

B1

A2

GND

B2

14
13
12

16 DPD_PCH_DOCK_AUX
PCH_DDPC_CTRLCLK 16

16 DPD_PCH_DOCK_AUX#
PCH_DDPC_CTRLDATA 16

2
C368

41 DPD_DOCK_AUX#

3
4
5

DPD_AUX#_C
1
0.1U_0402_10V7K~D
DPD_DOCK_AUX#

6

8

7

PI3C3125LEX_TSSOP14~D

C365
1

B1

A2

GND

B2

5

0.1U_0402_16V4Z~D

Y

4

12

PCH_DDPD_CTRLCLK 16

11
10
9

PCH_DDPD_CTRLDATA 16

8

+5V_RUN
C369
1

P

1

B3
BE2

DPC_CA_DET#

41 DPD_CA_DET

DPD_CA_DET

2

A

NC7SZ04P5X-G_SC70-5~D

3

3

A3

BE1
A1

D

14
13

U24
Y

4

DPD_CA_DET#

G

P
A

VCC
BE3

B0

U21

G

41 DPC_CA_DET

2

NC

5

2

0.1U_0402_16V4Z~D
DPC_CA_DET

BE0
A0

PI3C3125LEX_TSSOP14~D

+5V_RUN
2

1

U23
1
2

DPD_DOCK_AUX

41 DPD_DOCK_AUX

11
10
9

C367
0.1U_0402_10V7K~D
DPD_AUX_C
2
1

1

16 DPC_PCH_DOCK_AUX

NC

D

2

C366
0.1U_0402_16V4Z~D

NC7SZ04P5X-G_SC70-5~D

C

C

+3.3V_RUN

1
R487
1
R488
1
R489
1
R490

1
R491
1
R492

PCH_DDPC_CTRLCLK
2
2.2K_0402_5%~D
PCH_DDPC_CTRLDATA
2
2.2K_0402_5%~D
PCH_DDPD_CTRLCLK
2
2.2K_0402_5%~D
PCH_DDPD_CTRLDATA
2
2.2K_0402_5%~D

Intel WW18 Strapping option
Intel WW18 Strapping option

DPD_CA_DET
2
1M_0402_5%~D
DPC_CA_DET
2
1M_0402_5%~D

B

B

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

DP SW
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

27

of

64

5

4

3

2

1

D

D

JSATA1 CONN@
14 PSATA_PTX_DRX_P0_C
+3.3V_RUN

14 PSATA_PTX_DRX_N0_C
14 PSATA_PRX_DTX_N0_C

1

2

C388
0.1U_0402_16V4Z~D

2
C

C387
10U_0805_6.3V6M~D

1

14 PSATA_PRX_DTX_P0_C

&ƌĞĞ&Ăůů^ĞŶƐŽƌ

PSATA_PTX_DRX_P0
0.01U_0402_16V7K~D
1 PSATA_PTX_DRX_N0
0.01U_0402_16V7K~D
1 PSATA_PRX_DTX_N0
0.01U_0402_16V7K~D
1 PSATA_PRX_DTX_P0
0.01U_0402_16V7K~D

2

1

C383
PSATA_PTX_DRX_N0_C

2
C384

PSATA_PRX_DTX_N0_C

2
C386

PSATA_PRX_DTX_P0_C

2
C385

PJP64

+3.3V_RUN

1

2

+3.3V_RUN_HDD

PAD-OPEN1x1m
14 HDD_DET#

U26

HDD_DET#

DE351DLTR
1
6

HDD_FALL_INT
FFS_INT2

17 HDD_FALL_INT

PSATA_PTX_DRX_P0_C

8
9
12
13
14

12,13,15,37 DDR_XDP_WAN_SMBDAT
12,13,15,37 DDR_XDP_WAN_SMBCLK

7

VDD_IO
VDD
INT 1
INT 2

GND
GND
GND
GND

SDO
SDA / SDI / SDO
SCL / SPC
RSVD
CS
RSVD

+5V_HDD
2
4
5
10

FFS_INT2_Q

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

GND
RX+
RXGND
TXTX+
GND
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
Reserved
GND
12V
12V
12V

C

GND1
GND2

23
24

TYCO_1775770-3~D
3
11

>ŝŶŬŽŶĞ

+3.3V_RUN

DE351DLTR8_LGA14_3X5~D

+3.3V_RUN_HDD

2

1

2

1
C399
0.1U_0402_16V4Z~D

2

1

2

C396
0.1U_0402_16V4Z~D

1

+5V_HDD
C395
1000P_0402_50V7K~D

DDR_XDP_WAN_SMBDAT
2
10K_0402_5%~D
DDR_XDP_WAN_SMBCLK
2
10K_0402_5%~D
HDD_FALL_INT
2
100K_0402_5%~D

1
R501
1
R502
1
R503

C402

0.1U_0402_16V4Z~D

+3.3V_RUN

B

B

Pleace near HDD CONN

Pleace near HDD CONN

+5V_HDD Source
+5V_ALW
+15V_ALW
+5V_HDD

D

1

4

FFS_INT2

3

1

1

2

FFS_INT2_Q

2

RB751S40T1_SOD523-2~D

JUMP_43X79

Q29
SSM3K7002FU_SC70-3~D

R504
100K_0402_5%~D

A

2

2
3
4

6
1

1
2

@

2

FFS_INT2

D

R505
100K_0402_5%~D

@

2

1

D16
18

S

2

HDDC_EN

Q28A
DMN66D0LDW-7_SOT363-6~D

43

1

@

R506
@R506
@
100K_0402_5%~D

Q27 @
SI3456DDV-T1-GE3_TSOP6~D
+5V_HDD
+5V_RUN
PJP3
1 1
2 2

C394
10U_0805_10V4Z~D

5

C393
0.1U_0603_50V4Z~D

@

Q28B
DMN66D0LDW-7_SOT363-6~D

2

S

G

3

2

G

R500
100K_0402_5%~D HDD_EN_5V

A

1

1

1

@
R499
100K_0402_5%~D

1
2
5
6

+3.3V_RUN
+3.3V_ALW2

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

HDD CONNECTOR
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

28

of

64

5

4

3

2

1

&ŽƌK
JSATA2 CONN@
+5V_MOD

1
R510
1
R513

2 ZODD_WAKE#
10K_0402_5%~D
2 MOD_MD
10K_0402_5%~D

+3.3V_ALW_PCH

1
R514

0.1U_0402_10V7K~D 2

1 C409

PCIE_PTX_EMBRX_P4_C

15 PCIE_PTX_EMBRX_N4

0.1U_0402_10V7K~D 2

1 C408

PCIE_PTX_EMBRX_N4_C
+5V_MOD

EMBCLK_REQ#
PCIE_WAKE#
PLTRST_EMB#
BAY_SMBDAT
BAY_SMBCLK
MOD_SATA_PCIE#_DET

15 EMBCLK_REQ#
37,38,42 PCIE_WAKE#
17 PLTRST_EMB#
43,47 BAY_SMBDAT
43,47 BAY_SMBCLK
42 MOD_SATA_PCIE#_DET

2 USB30_SMI#
100K_0402_5%~D

+3.3V_ALW

C

1
R1177

1

1
2
5
6

2

MODC_EN

2

R512
100K_0402_5%~D

32
33

GND1
GND2

2

1

2

1

+5V
CLKREQ#
WAKE#
PERST#
SMB_DATA
SMB_CLK
HPD

MODC_EN

1

3

+5V_MOD

4

1

25
26
27
28
29
30
31

42

S

2

15 PCIE_PTX_EMBRX_P4

MODC_EN# 5

3

R511
100K_0402_5%~D

+3.3V_ALW

GND
REFCLK+
REFCLKGND
PETX+
PETXGND
GND
PERX+
PERXGND

Q31A
DMN66D0LDW-7_SOT363-6~D

15 PCIE_PRX_EMBTX_P4
15 PCIE_PRX_EMBTX_N4

14
15
16
17
18
19
20
21
22
23
24

D Q30
SI3456DDV-T1-GE3_TSOP6~D

G
2 MOD_EN

C401
10U_0805_10V4Z~D

15 CLK_PCIE_EMB
15 CLK_PCIE_EMB#

R509
100K_0402_5%~D

C400
0.1U_0603_50V4Z~D

Pleace near JSATA2

DP
+5V
+5V
MD
GND
GND

R507
100K_0402_5%~D

4

MOD_MD

+5V_ALW
D

+3.3V_ALW2

2

+5V_MOD

+15V_ALW

Q31B
DMN66D0LDW-7_SOT363-6~D

8
9
10
11
12
13

43 DEVICE_DET#

+5VMOD Source

6

SATA_PRX_DTX_N1
1
1 0.01U_0402_16V7K~D SATA_PRX_DTX_P1
0.01U_0402_16V7K~D

GND
A+
AGND
BB+
GND

1

SATA_ODD_PRX_DTX_N1_RP
2
SATA_ODD_PRX_DTX_P1_RP C391 2
C392

1
2
3
4
5
6
7

1

2

1 0.01U_0402_16V7K~D SATA_PTX_DRX_P1
1 0.01U_0402_16V7K~D SATA_PTX_DRX_N1

2

2

1

C398
0.1U_0402_16V4Z~D

D

C397
1000P_0402_50V7K~D

1

SATA_ODD_PTX_DRX_P1_RP C389 2
SATA_ODD_PTX_DRX_N1_RP C390 2

TYCO_2-2129116-1

2
10K_0402_5%~D

C

>ŝŝŶŬŽŶĞ
1

+3.3V_ALW

R515
100K_0402_5%~D

Q76

D

S

MOD_MD

3

2

SSM3K7002FU_SC70-3~D
ZODD_WAKE#

1

USB30_EN

ZODD_WAKE# 42

6
MOD_SATA_PCIE#_DET

Q123B

1

DMN66D0LDW-7_SOT363-6~D
USB30_SMI#
3

USB30_SMI# 14

USB30_EN

+3.3V_RUN

2

1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_P1

AOUTP
AOUTM
BINP
BINM

15
14

SATA_ODD_PTX_DRX_P1_RP
SATA_ODD_PTX_DRX_N1_RP

11
12

SATA_ODD_PRX_DTX_P1_RP
SATA_ODD_PRX_DTX_N1_RP

1
2
1
2

2
1

R1176
0_0402_5%~D

2

2
1

2
1

1

1
2

R1169 R1171

pop

TI
depop

R1170 R1172

2

depop

pop

@ R1175
10K_0402_5%~D

R1174
0_0402_5%~D

5

@ R1173
10K_0402_5%~D

1

MAX4951BECTP+TGH7_TQFN20_4X4~D

A

2

HDD_PE1
HDD_PE2

MAXIM

@ R495
0_0402_5%~D

GND
GND
GND
GND
EP

PA
PB

@ R496
0_0402_5%~D

HDD_EQ1
HDD_EQ2
+3.3V_RUN

3
13
17
19
21

BOUTM
BOUTP

1

C404

4
5

B

HDD_DEW1

2

1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_N1

9
8

1

2

AINP
AINM

X76@ R1172
10K_0402_5%~D

C405

1
2

2

1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_N1

1

1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_P1

2

HDD_DEW2

X76@ R1170
10K_0402_5%~D

14 SATA_ODD_PRX_DTX_P1_C

2

C406

6
10
16
20

@ R494
0_0402_5%~D

14 SATA_ODD_PRX_DTX_N1_C

C407

VCC
VCC
VCC
VCC

SA00003LH1L SA00003ZX0L

X76M@
@ R493
0_0402_5%~D

14 SATA_ODD_PTX_DRX_P1_C
14 SATA_ODD_PTX_DRX_N1_C

EN
CAD

X76M@

R1171
0_0402_5%~D

U25 X76M@
7
18

2

+3.3V_RUN

R1169
0_0402_5%~D

2

1

C382
0.1U_0402_16V4Z~D

1

C381
0.01U_0402_16V7K~D

^dZĞƉĞĂƚĞƌĨŽƌK

B

1

5

4

Q123A
DMN66D0LDW-7_SOT363-6~D

2

2

2

G

MODC_EN#

4

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3

2

ODD CONNECTOR
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

29

of

64

1

EŽƚĞƐ͗
<ĞĞƉWsƐƵƉƉůǇĂŶĚƐƉĞĂŬĞƌƚƌĂĐĞƐƌŽƵƚĞĚŽŶƚŚĞ'EƉůĂŶĞ͘
<ĞĞƉĂǁĂǇĨƌŽŵ'EĂŶĚŽƚŚĞƌĂŶĂůŽŐƐŝŐŶĂůƐ

PVDD
PVDD

I2S_LRCLK

18

I2S_DI#

24

19

2
1
@C978
@C978
0.1U_0402_10V7K~D

2

1

+3.3V_RUN

EAPD
DVSS
PVSS

CAP-

35

VREFFILT
CAP2
VVreg

21
22
34
37

AVSS1
AVSS
AVSS

GND

2

+3.3V_RUN

WŽƌƚ

R1087
100K_0402_5%~D

&ƵŶĐƚŝŽŶ



ǆƚĞƌŶĂůD/



,ĞĂƌWŚŽŶĞKƵƚ

dŝĞŶĂůŽŐ'ƌŽƵŶĚƚŽŝŐŝƚĂůŐƌŽƵŶĚƵŶĚĞƌ
ĐŽĚĞĐďǇĂƐŝŶŐůĞƉŽŝŶƚ

2

AUD_HP_NB_SENSE 31,42

Q107B
DMN66D0LDW-7_SOT363-6~D



ŽĐŬƵĚŝŽ



/ŶƚĞƌŶĂů^W<

2

1

EŽƚĞƐ
2

,ƵĚŝŽŝƚůŬ
,ƵĚŝŽŝƚů<ͬϮ

1

+3.3V_RUN

U73
16

I2S_BCLK

2

I2S_LRCLK

4

2

+3.3V_RUN

ϮϬ<

R1082
100K_0402_5%~D

ϭϬ<
ϱ͘ϭϭ<

WKZd;,WϬͿ
WKZd;,WϭͿ

WKZd
WKZd&
D/Ϭ

E
^W/&KhdϬ

14
42 EN_I2S_NB_CODEC#

2

1

1
15

R1110
1K_0402_5%~D

1A

1Y#

2A

2Y#

3A

3Y#

4A

4Y#

5A

5Y#

6A

6Y#

OE1#
OE2#

3
5

GND

DAI_BCLK#

41

DAI_LRCK#

41

7

DAI_DO# 41

9

DAI_12MHZ# 41

11

DAI_DI

+3.3V_RUN

A

41

I2S_DI#

13
8

@ D58
DA204U_SOT323-3~D

CD74HC366M96_SO16~D

^W/&Khdϭ;D/ϭͿ

2

3

6

2

10
12

ϯϵ͘Ϯ<

1

1

1
2

Ϯ͘ϰϵ<

5
1

2

Q106A
DMN66D0LDW-7_SOT363-6~D

4

1
2

R1080
20K_0402_1%~D

6

I2S_12MHZ

^E^ͺ

VCC

@ D57
DA204U_SOT323-3~D

R1081
100K_0402_5%~D
42 DOCK_HP_DET

R1079
39.2K_0402_1%~D

C979
1000P_0402_50V7K~D

1
+3.3V_RUN

^E^ͺ

2

1

I2S_DO

ZĞƐŝƐƚŽƌ

1

@ D56
DA204U_SOT323-3~D

+VDDA_AVDD
R1078
2.49K_0402_1%~D
2
1

AUD_SENSE_B

2

C284
0.1U_0402_16V4Z~D
+3.3V_RUN

ƐƵŐŐĞƐƚĞĚ
ƐĂŵƉůĞƌĂƚĞ
ϵϲ<,ǌ
ϰϴ<,ǌ
ϴϴ͘Ϯ<,ǌ
ϰϰ͘ϭ<,ǌ

2

1

1

2

PAD-OPEN1x1m

W>>ĐůŽĐŬ
ĚŝǀŝƐŽƌ
E
E
ϱ
ϭϬ

2

1

@ D55
DA204U_SOT323-3~D

&ƌĞƋƵĞŶĐǇ
;D,ǌͿ
Ϯϰ
ϭϮ
ϮϮ͘ϱϳϵϮ
ϭϭ͘Ϯϴϵϲ

1

C267
0.1U_0402_16V4Z~D
2
1

A

Place closely to Pin 14

2
+VREFOUT
1

26
30
33

@ D54
DA204U_SOT323-3~D

ϬϬϬ
ϬϬϭ
ϬϭϬ
Ϭϭϭ

R1095

C962
4.7U_0603_10V6K~D

WůĂĐĞϵϲϮĐůŽƐĞƚŽŽĚĞĐ
WůĂĐĞϵϲϯΕϵϲϲĐůŽƐĞƚŽŽĚĞĐ

C1103
0.1U_0402_10V7K~D

D><΀Ϯ͗Ϭ΁
Add for solve pop noise and detect issue

2

43

1
10K_0402_5%~D
1
10K_0402_5%~D

C283
0.1U_0402_16V4Z~D

PJP62
2

AUD_HP_NB_SENSE

1

ƉůĂĐĞĂƚ'EĂŶĚ'EƉůĂŶĞ

1

1
2
3
4

5

36

2
@ R1141
2
@ R1142

14

C1180
1U_0603_10V6K~D

2

CAP+

1
SPKR
100K_0402_5%~D
1
BEEP
100K_0402_5%~D

2
R1120

C966
10U_0805_10V6K~D

1

C980
1000P_0402_50V7K~D

R1086
20K_0402_1%~D

2
4
46
48

92HD90B2X5NLGXZAX8_QFN48_7X7~D

R1083
2.49K_0402_1%~D
2
1

AUD_SENSE_A

DMIC_CLK/GPIO 1
DMIC_0/GPIO 2
DMIC1/GPIO0/SPDIFOUT1
SPDIFOUT0//GPIO3/Aux_Out

2
R1119

C965
1U_0603_10V6K~D

7

SPKR_R
2
1
0.1U_0402_16V4Z~D
BEEP_R
2
1
C1114
0.1U_0402_16V4Z~D
DMIC_CLK_R1
2
DMIC_CLK
24
L82 BLM18BB221SN1D_2P~D
DMIC0
24
C1113

No Connect

47

49

Place closely to Pin 13.

I2S_DIN

No Connect

42
+VDDA_AVDD

I2S_LRCLK

AUD_PC_BEEP

C964
4.7U_0603_10V6K~D

R1099

I2S_DOUT

25
12

31

B

C963
4.7U_0603_10V6K~D

2
10K_0402_5%~D

PC_BEEP

20
@ C977
10P_0402_50V8J~D
42 AUD_NB_MUTE#

MONO_OUT

I2S_SCLK

2

1

1

INT_SPK_R+
INT_SPK_R-

3

2

@ R1076
10_0402_5%~D

PORTD_+R
PORTD_-R

2

17

INT_SPK_L+
INT_SPK_L-

3

I2S_DO_R
2
33_0402_5%~D

1
R1097

40
41
44
43

I2S_MCLK

2

1

AUD_HP_OUT_L 31
AUD_HP_OUT_R 31

1

16

2

1

MIC_IN_R

PORTD_+L
PORTD_-L

RESET#

1

2 1U_0402_6.3V6K~D

1

2

15

WůĂĐĞZϭϬϵϳĐůŽƐĞƚŽĐŽĚĞĐ

C1155

31
32

PORTB_L
PORTB_R

SDATA_IN

MIC_IN_L
MIC_IN_R

28
29
23

+VREFOUT
1
2
AUD_HP_OUT_L R1143 2.2K_0402_5%~D
AUD_HP_OUT_R

SDATA_OUT
SYNC

AUD_SENSE_A
AUD_SENSE_B

13
14

3

1

1

11

I2S_BCLK

PCH_AZ_CODEC_BITCLK

@ R1077
47_0402_5%~D

8

I2S_12MHZ

I2S_DO
PCH_AZ_CODEC_SDOUT

10

PCH_AZ_SDIN0_R
2
33_0402_5%~D
PCH_AZ_CODEC_RST#

PORTA_L
PORTA_R
VrefOut_A

BITCLK

2

+VDDA_PVDD

45
39

2

1
R1096

14 PCH_AZ_CODEC_RST#

Close to U72 pin6

PCH_AZ_CODEC_SYNC

WůĂĐĞZϭϬϵϲĐůŽƐĞƚŽĐŽĚĞĐ

14 PCH_AZ_CODEC_SDIN0

Close to U72 pin5

5

1

3

14 PCH_AZ_CODEC_SYNC

6

PCH_AZ_CODEC_SDOUT

2

3

14 PCH_AZ_CODEC_SDOUT

PCH_AZ_CODEC_BITCLK

SENSE_A
SENSE_B

2

1

14 PCH_AZ_CODEC_BITCLK

DVDD

2

2

9

2

1

C961
0.1U_0402_16V4Z~D

DVDD_IO

27
38

1

C960
10U_0805_10V6K~D

AVDD1
AVDD2

1

C959
0.1U_0402_16V4Z~D

3

2

DVDD_CORE

TYCO_2-1775765-4

B

2

U72
1

1

C958
10U_0805_10V6K~D

2

2

1

WůĂĐĞϵϱϭΕϵϲϭĐůŽƐĞƚŽŽĚĞĐ

C1173
0.1U_0402_16V4Z~D

2

2

1

C1172
1U_0603_10V6K~D

2

1

GND
GND

2

1

C957
0.1U_0402_16V4Z~D

1

C976 680P_0402_50V7K~D

1

C975 680P_0402_50V7K~D

2

C974 680P_0402_50V7K~D

C973 680P_0402_50V7K~D

1

2

1

C956
1U_0603_10V6K~D

5
6

1
2
3
4

C955
10U_0805_10V6K~D

1
2
3
4

C954
10U_0805_10V6K~D

INT_SPKL_L+
INT_SPKL_LINT_SPKR_R+
INT_SPKR_R-

2BLM18BD121SN1D_2P~D
2BLM18BD121SN1D_2P~D
2BLM18BD121SN1D_2P~D
2BLM18BD121SN1D_2P~D

1
1
1
1

C953
0.1U_0402_16V4Z~D

L78
L79
L80
L81

C952
1U_0603_10V6K~D

1

JSPK1 Conn@

INT_SPK_L+
INT_SPK_LINT_SPK_R+
INT_SPK_R-

C951
0.1U_0402_16V4Z~D

ϮϬŵŝůƐƚƌĂĐĞ

L77
BLM21PG600SN1D_0805~D
1
2
+5V_RUN

+VDDA_AVDD

1

>ŝŶŬŽŶĞ

^ƉĞĂŬĞƌŽŶŶĞĐƚŽƌ

1

/ŶƚĞƌŶĂů^ƉĞĂŬĞƌƐ,ĞĂĚĞƌ

+5V_RUN

1

+3.3V_RUN

2

sͺ/KƐŚŽƵůĚŵĂƚĐŚ
ǁŝƚŚ,ƵƐůĞǀĞů

0_0805_5%~D

2

WƵůůͲƵƉƚŽs

DELL CONFIDENTIAL/PROPRIETARY

DOCK_MIC_DET 42

Compal Electronics, Inc.

Q106B
DMN66D0LDW-7_SOT363-6~D
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

Azalia (HD) Codec
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
1

Sheet

30

of

64

5

4

3

2

1

D

D

SW1
43,44 POWER_SW#_MB

2

POWER_SW#_MB

1

4

/ͬKďŽĂƌĚKEE͘

3
SKRBAAE010_4P~D

>^ͲϲϲϭϭW
@ D23
3
PESD24VS2UT_SOT23-3~D
2

1

>ŝŶŬŽŶĞ
JIO1 CONN@

SW2
43 LAT_ON_SW_BTN#

LAT_ON_SW_BTN#

@

2

1

RED_CRT
25
25 GREEN_CRT
BLUE_CRT
25

SKRBAAE010_4P~D

25 DAT_DDC2_CRT
25 CLK_DDC2_CRT

RED_CRT
GREEN_CRT
BLUE_CRT
DAT_DDC2_CRT
CLK_DDC2_CRT

2
4
6
8
10
12
14
16
18
20
22

1
3
5
7
9
11
13
15
17
19
21

1
3
5
7
9
11
13
15
17
19
21

24
26
28

G2
G4
G6

G1
G3
G5

23
25
27

DETECT_GND

POWER & INSTANT ON SWITCH

C

IO_LOOP#

18
+5V_RUN

+5V_RUN
+3.3V_RUN

1
AUD_HP_OUT_R 30
AUD_HP_OUT_L 30
MIC_IN_R
30
AUD_HP_NB_SENSE 30,42

2

+3.3V_RUN

1

2

WůĂĐĞĐůŽƐĞ
ƚŽ:/Kϭ͘ϯ͕ϱ

C1002
0.1U_0402_16V4Z~D

3

VSYNC_BUF
HSYNC_BUF

C1000
0.1U_0402_16V4Z~D

4

25 VSYNC_BUF
25 HSYNC_BUF

2
4
6
8
10
12
14
16
18
20
22

WůĂĐĞĐůŽƐĞ
ƚŽ:/Kϭ͘ϳ

C

TYCO_8921155-1

ĞĨƵůƚŽŶ͕
t/Z>^^ͺKEͬK&&η͗
>Kt͗KE
,/',͗K&&

DĞĚŝĂŽĂƌĚ
>^ͲϲϲϭϯW

JMEDIA1 CONN@
18 MEDIA_DET#
42 WIRELESS_ON#/OFF
43
43
43

VOL_MUTE
VOL_DOWN
VOL_UP

MEDIA_DET#
WIRELESS_ON#/OFF

1
2
3
4
5
6
7
8
9
10

VOL_MUTE
VOL_DOWN
VOL_UP

1
2
3
4
5
6 G1
7 G2
8
9
10

11
12

TYCO_1-2041070-0~D

>ŝŶ<ŽŶĞ

B

B

>ŽĂƌĚǁŝƚŚ>ŝĚ
>^ͲϲϲϭϮW
JLED1 CONN@
18
LEDB_DET#
46
SATA_LED
BATT_WHITE
46
46 BATT_YELLOW
WLAN_LED
46
42,46 LID_CL#
+3.3V_ALW

LEDB_DET#
SATA_LED
BATT_WHITE
BATT_YELLOW
WLAN_LED
LID_CL#

1
2
3
4
5
6
7
8

1
2
3
4
5
6
7
8

G1
G2

9
10

TYCO_2041084-8
C457
0.1U_0402_10V7K~D

1

>ŝŶŬŽŶĞ

2

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

IO/Sniffer/LID
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

31

of

64

5

4

3

2

1

+3.3V_LAN
+3.3V_RUN
+3.3V_LAN
C478
0.1U_0402_10V7K~D
1
2

1

LOM_SPD100LED_ORG#

1

LOM_SPD10LED_GRN#

2

15 PCIE_PRX_GLANTX_N7
+3.3V_LAN

15 PCIE_PTX_GLANRX_P7

1
2
18 PM_LANPHY_ENABLE

1
R555

38
39
41
42

PETp
PETn
PERp
PERn

17
18

LAN_TX1+
LAN_TX1-

MDI_PLUS2
MDI_MINUS2

20
21

LAN_TX2+
LAN_TX2-

MDI_PLUS3
MDI_MINUS3

23
24

LAN_TX3+
LAN_TX3-

LAN_DISABLE#_R

3

SMB_CLK
SMB_DATA

RSVD_NC

1
2
5

RSVD_VCC3P3_1
RSVD_VCC3P3_2
VDD3P3_IN

LAN_DISABLE_N

4

VDD3P3_OUT
LED0
LED1
LED2

1
2

2

1

C471
33P_0402_50V8J~D

C470
33P_0402_50V8J~D

LAN_TEST_EN

30

RES_BIAS

12

+3.3V_LAN_OUT

Place R548, C462, C463 and L29 close to U31

JTAG

VDD1P0_43

43

VDD1P0_11

11

VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8

40
22
16
8

+1.0V_LAN

C464
1U_0603_10V6K~D
+3.3V_LAN
+1.0V_LAN

1

2

TEST_EN
RBIAS

7

CTRL_1P0

2

1

47
46
37

VDD1P0_47
VDD1P0_46
VDD1P0_37

XTAL_OUT
XTAL_IN

2

1

1

2

1

2

1

2

1

2

1

2

C1178
22U_0805_6.3V6M~D

9
10

JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCK

+3.3V_LAN

1

C1177
22U_0805_6.3V6M~D

Need to verify A3 silicon drive
power before removing C465
KDS crystal vender verify
driving level in A3

XTALO
XTALI

C

WůĂĐĞϭϭϳϴĐůŽƐĞƚŽƉŝŶϱ

REGCTL_PNP10

49

VSS_EPAD

R562
3.01K_0402_1%~D

1

R561
1K_0402_5%~D

1

2

2

C469
0.1U_0402_10V7K~D

2

1

C468
0.1U_0402_10V7K~D

Y3
25MHZ_18PF_7A25000110~D
1
2

32
34
33
35

1
1 4.7K_0402_1%~D
4.7K_0402_1%~D

2

2

26
27
25

+RSVD_VCC3P3_1
2
+RSVD_VCC3P3_2 R553 2
R554

C467
0.1U_0402_10V7K~D

C

REGCTL_PNP10

C466
0.1U_0402_10V7K~D

TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK

R1144
0_0402_5%~D
XTALO_R 1
2

+1.0V_LAN

Idc max=330mA

15
19
29

VDD3P3_15
VDD3P3_19
VDD3P3_29

LED

1

LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#

T142 PAD~D
T143 PAD~D

D

L29

6

42 LAN_DISABLE#_R
@ R557
10K_0402_5%~D

WLAN_LAN_DISB# 42

TC7SH08FU_SSOP5~D
U15

4.7UH_CBC2012T4R7M_20%~D
28
31

SMBus Device Address 0xC8

2
0_0402_5%~D

MDI_PLUS1
MDI_MINUS1

PE_CLKP
PE_CLKN

4

O
A

C463
0.1U_0402_10V7K~D

15 LAN_SMBCLK
15 LAN_SMBDATA

44
45

B

C1181
10U_0805_6.3V6M~D

15 PCIE_PTX_GLANRX_N7

R549
10K_0402_5%~D

CLK_PCIE_LAN
CLK_PCIE_LAN#
2
1 PCIE_PRX_GLANTX_P7_C
C458
0.1U_0402_10V7K~D
2
1 PCIE_PRX_GLANTX_N7_C
0.1U_0402_10V7K~D
C459
1
2 PCIE_PTX_GLANRX_P7_C
0.1U_0402_10V7K~D
C460
1
2 PCIE_PTX_GLANRX_N7_C
C461
0.1U_0402_10V7K~D
0_0402_5%~D
R551
1
2 LAN_SMBCLK_R
1
2 LAN_SMBDATA_R
R552
0_0402_5%~D

MDI_PLUS0
MDI_MINUS0

MDI

15 CLK_PCIE_LAN
15 CLK_PCIE_LAN#
15 PCIE_PRX_GLANTX_P7

13
14

CLK_REQ_N
PE_RST_N

PCIE

D

48
36

1
R1187

SMBUS

15 LANCLK_REQ#
17 PLTRST_LAN#

LAN_TX0+
LAN_TX0-

3

U31
LANCLK_REQ#_R
2
0_0402_5%~D

P

5

R547
10K_0402_5%~D

G

TP_LAN_JTAG_TMS
2
10K_0402_5%~D
TP_LAN_JTAG_TCK
2
10K_0402_5%~D

2

1
@ R545
1
@ R546

Note:
+1.0V_LAN will work at 0.95V to 1.15V

82579_QFN48_6X6~D

+1.0V_LAN POWER OPTIONS
Shared with PCH
1.05V SVR

R562 Resistor Value:
3.01 kohm for Hanksville-M LOM
2.37 kohm for Hanksville-D LOM

STUFF: R548
NO STUFF: L29

* Internal SRV
STUFF: L29
NO STUFF: R548

+3.3V_LAN

LAN_TX2-R

10

LAN_TX3+ 1
2
L36
12NH_0603CS-120EJTS_5%~D
LAN_TX31
2
L37
12NH_0603CS-120EJTS_5%~D

LAN_TX3+R

11

LAN_TX3-R

DOCKED

12
13

LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#

Layout Notice : Place bead as
close PI3L500 as possible

15
16
42
5
43

FROM NIC

DOCKED

SW_LAN_TX2+
SW_LAN_TX2-

A1-

B3+
B3-

25
24

SW_LAN_TX3+
SW_LAN_TX3-

A2+
A2-

LEDB0
LEDB1
LEDB2

17
18
41

LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#

A3+

C0+
C0-

36
35

DOCK_LOM_TRD0+
DOCK_LOM_TRD0-

32
31

DOCK_LOM_TRD1+
DOCK_LOM_TRD1-

27
26

DOCK_LOM_TRD2+
DOCK_LOM_TRD2-

23
22

DOCK_LOM_TRD3+
DOCK_LOM_TRD3-

19
20
40

DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#

A3-

C1+
C1-

SEL

C2+
C2-

LEDA0
LEDA1
LEDA2

C3+
C3LEDC0
LEDC1
LEDC2

PD

SW_LAN_TX2+ 33
SW_LAN_TX2- 33

5

SW_LAN_TX3+ 33
SW_LAN_TX3- 33
LAN_ACTLED_YEL# 33
LED_100_ORG# 33
LED_10_GRN# 33

43

AUX_ON

1
R566

2
2
0_0402_5%~D

DOCK_LOM_TRD0+ 41
DOCK_LOM_TRD0- 41

16,42 SIO_SLP_LAN#

1
@ R567

2
0_0402_5%~D

DOCK_LOM_TRD1+ 41
DOCK_LOM_TRD1- 41
DOCK_LOM_TRD2+ 41
DOCK_LOM_TRD2- 41

D

S
G

ENAB_3VLAN

1

2

1

2

1

2

DOCK_LOM_TRD3+ 41
DOCK_LOM_TRD3- 41

A

DOCK_LOM_ACTLED_YEL# 41
DOCK_LOM_SPD100LED_ORG# 41
DOCK_LOM_SPD10LED_GRN# 41

DELL CONFIDENTIAL/PROPRIETARY

PAD_GND

1: TO DOCK
0: TO RJ45

3

9

29
28

2

LAN_TX2+R

B2+
B2-

3

LAN_TX2+ 1
2
L34
12NH_0603CS-120EJTS_5%~D
LAN_TX21
2
L35
12NH_0603CS-120EJTS_5%~D

A1+

R565
100K_0402_5%~D

SW_LAN_TX1+ 33
SW_LAN_TX1- 33

4

7

1

6

LAN_TX1-R

SW_LAN_TX1+
SW_LAN_TX1-

B1+
B1-

2

LAN_TX1+R

34
33

A0-

R564
100K_0402_5%~D

SW_LAN_TX0+ 33
SW_LAN_TX0- 33

6

LAN_TX1+ 1
2
L33
12NH_0603CS-120EJTS_5%~D
LAN_TX11
2
L32
12NH_0603CS-120EJTS_5%~D

A0+

SW_LAN_TX0+
SW_LAN_TX0-

1

3

38
37

C476
0.1U_0402_10V7K~D

LAN_TX0-R

B0+
B0-

4

C477
2200P_0402_50V7K~D

2

Q35B
DMN66D0LDW-7_SOT363-6~D

A

DOCKED

LAN_TX0+R

B

6
5
2
1

1

+3.3V_ALW2

Q35A
DMN66D0LDW-7_SOT363-6~D

42

LAN_TX0+ 1
2
L30
12NH_0603CS-120EJTS_5%~D
LAN_TX01
2
L31
12NH_0603CS-120EJTS_5%~D

SI3456DDV-T1-GE3_TSOP6~D
+15V_ALW

C475
10U_0603_6.3V6M~D

U32

+3.3V_LAN

Q34

+3.3V_ALW

LAN ANALOG
SWITCH
39
30
21
14
8
4
1

1

VDD
VDD
VDD
VDD
VDD
VDD
VDD

1

2

C474
0.1U_0402_16V4Z~D

2

C473
0.1U_0402_16V4Z~D

1

B

C472
0.1U_0402_16V4Z~D

2

Compal Electronics, Inc.

TO
DOCK

PI3L720ZHEX_TQFN42_9X3P5~D

Title

Intel 82579 (Hanksville) / LAN SW
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
5

4

3

2

Sheet
1

32

of

64

5

4

3

2

1

T155

D

D

1:1

3

TDCT1

TX1+

+TRM_CT1
+TRM_CT2

1:1

TDCT2
TD2+

23
22

TXCT2

21

T1/B

TX2+

20

6

TX2-

19

NB_LAN_TX1-

TD2-

32 LAN_ACTLED_YEL#

T1/A

32 SW _LAN_TX2-

+TRM_CT3
+TRM_CT4

7

1:1
T1/B

TD3+

18

8

9
10
11

NB_LAN_TX2+

TD3TX3-

17

1

2

1

2

TDCT3

T1/A

TXCT3

16

TDCT4
TD4+

1:1

TXCT4

15

TX4+

14

T1/B

Z2808
NB_LAN_TX3+

1 75_0402_1%~D

1 75_0402_1%~D

2
R1111

350UH_H5120DNL~D

1 75_0402_1%~D

T1/A

2

NB_LAN_TX3-

R1112

13

TX4-

1 75_0402_1%~D

TD4-

2

12

2 150_0402_5%~D

Yellow LED+

LAN_ACTLED_YEL#_R 10

Yellow LED-

NB_LAN_TX3-

8

PR4-

NB_LAN_TX3+

7

PR4+

NB_LAN_TX1-

6

PR2-

NB_LAN_TX2-

5

PR3-

NB_LAN_TX2+

4

PR3+

NB_LAN_TX1+

3

PR2+

NB_LAN_TX0-

2

PR1-

NB_LAN_TX0+

1

PR1+

Z2806

32 LED_10_GRN#
32 SW _LAN_TX3-

R1089 1

9

NB_LAN_TX2-

2

2

C39
0.47U_0603_10V7K~D

2

C38
0.47U_0603_10V7K~D

32 SW _LAN_TX3+

1

2

Z2807
NB_LAN_TX1+

TX3+

1

1

Z2805

JLOM1 CONN@
32 SW _LAN_TX1-

32 SW _LAN_TX2+

C

NB_LAN_TX0-

TX1TXCT1

R1113

2

4
5

NB_LAN_TX0+

R1114

2

1

C37
0.47U_0603_10V7K~D

1

C36
0.47U_0603_10V7K~D

32 SW _LAN_TX1+

T1/A

24

470P_0402_50V7K~D
C1167

TD1-

T1/B

0.1U_0402_10V7K~D
C1106

32 SW _LAN_TX0-

2

+3.3V_LAN

TD1+

1U_0603_10V4Z~D
C1105

32 SW _LAN_TX0+

1

32 LED_100_ORG#

R1091
R1090

150_0402_5%~D

1

2

1

2 150_0402_5%~D

C

11

Green LED-

13

Orange LED-

12

Green-Orange LED+

GND

14

GND

15

TYCO_2010008-3

>ŝŶŬŽŶĞ

B

B

GND
CHASSIS

1
C1104

2 GND_CHASSIS
1000P_1808_3KV7K~D

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

RJ45
Size

Document Number

Date:

W ednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

33

of

64

5

G3
G2
H1
H2

SSP_CLK1_GPIO_10
SSP_FSS1_GPIO_11
SSP_RXD1_GPIO_12
SSP_TXD1_GPIO_13

C3
B2
A2
A1

USH_SMBCLK
USH_SMBDAT
BCM5882_ALERT#
2 150_0402_5%~D
2 SMB_GPIO1
0_0402_5%~D

M9
L9
K9
M7
N8

SMBCLK
SMBDAT
SMBALERT_N
SMB_GPIO_0
SMB_GPIO_1

IDDQ_EN

P1

CORE_PWRDN

E12

ALDO_PWRDN

BCM5882_SCCLK
1 0_0402_5%~D
M11R607 2
AUX1UC
M12R608 2
1 0_0402_5%~D
BCM5882_GPIO25
F2 R609 2
1 0_0402_5%~D
BCM5882_GPIO26
F1 R611 2
1 0_0402_5%~D
BCM5882_SCDET
1 0_0402_5%~D
M2 R614 2
BCM5882_IO
1 0_0402_5%~D
L11R616 2
BCM5882_SCRST
M10R620 2
1 0_0402_5%~D
N14
+SC_PWR
P14
SC_TEST
SCC_CMDVCC_N
L10
2
1
R623
0_0402_5%~D

HF_RX_TEST2
@ R618
0_0402_5%~D
1
2

2
1

2
1

SCC_CMDVCC_N_R

@

PAD~D T154

1
17

VDDP

16

VCC

15

RST
CLK
I/O
AUX1
AUX2
PRESN

14
13
9
10
11
8

BCM5882_SCRST
1SCC_CMDVCC_N
BCM5882_GPIO25
BCM5882_GPIO26

3
5
2
4

AUX1UC
AUX2UC
BCM5882_IO
BCM5882_SCDET

21
22
20
19

AUX1UC
AUX2UC
I/OUC
OFFN

BCM5882_SCCLK

23

XTAL1

XTAL2

24

25

GPAD

GND

12

RSTIN
CMDVCCN
EN_5V/3VN
EN_1.8VN

1

C1

SPI_RST

POR_MONITOR

J13

POR_MONITOR

T149PAD~D

SWV

K11

SWV

T151PAD~D
T153PAD~D

POR_EXTR

@ D26
DA204U_SOT323-3~D
C505
1
2

T144 PAD~D

C13 PLL_TESTOUT

PLL_TESTOUT

BCM5882
A6
B6

HF_RFIDTAG_VRX_P
HF_RFIDTAG_VRX_N

HF_TX_P
HF_TX_N

A8
B8

RFREADER_TXP1
RFREADER_TXN1

C5

HF_RFIDTAG_VTX

HF_RX_P
HF_RX_N

A10
B10

RFREADER_RXP
RFREADER_RXN

2

HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3

B9
C9
C10
E9

HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3

HF_TX_AVDD1P2
HF_RX_AVDD1P2
HF_RX_ADC_AVDD1P2

D7
F8
D10

+RFID_AVDD1P2

HF_RX_AVDD2P5
HF_TX_AVDD2P5

F9
A7

+RFID_AVDD2P5

HF_TX_AVDD3P3_D8
HF_TX_AVDD3P3_B7

D8
B7

+RFID_AVDD3P3

HF_TX_AVSS_C7
HF_TX_AVSS_C8
HF_TX_AVSS_E7

C7
C8
E7

A5
0.01U_0402_16V7K~D
B4

HF_RFIDTAG_VREF
HF_RFIDTAG_DVDD1P2

C6
E6

HF_RFIDTAG_AVDD2P5_C6
HF_RFIDTAG_AVDD2P5_E6

D6
B5

HF_RFIDTAG_AVSS_D6
HF_RFIDTAG_AVSS_B5

A4

HF_RFIDTAG_DVSS

1

2
2

1

HF_RX_AVSS_A9
HF_RX_AVSS_B11
HF_RX_ADC_AVSS1
HF_RX_ADC_AVSS2

2

1

0.1U_0402_16V4Z~D

1

2

B

Changed to 0.5 pitch same as JBIO1
JCS1CONN@
1 1
2 2
3 3
4 4
5 5
6 6
7 GND
8 GND

R555,R633

RFREADER_TXP1_PI

R644
15K_0402_1%~D

18 CONTACTLESS_DET#

CURRENT

R494,R498 NOPOP

L40
150NH_0805CS-331EKTS_2%
1
2

3K

3K

NOPOP

3K

NOPOP

RFREADER_TXN1

TYCO_2041070-6~D

2 SPI_RST
4.7K_0402_5%~D

1
R645

1

>ŝŶŬŽŶĞ

D28
DA204U_SOT323-3~D

+3.3V_ALW
L41
2

+2.5V_ALW_AVDD
L42
2

BLM18BB100SN1D_2P~D
1 +RFID_AVDD3P3

BLM18BB100SN1D_2P~D
1 +RFID_AVDD2P5

2
4.7K_0402_5%~D

1

2

2

1

1

2

3

2

1

2

1

1

2

2

2

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EŽ^ƚƵĨĨZϴϭϱ͘
,ĂƌĚǁĂƌĞĚŝƐĂďůĞĨŽƌh^,dWD͗EŽ^ƚƵĨĨZϱϴϯ͕
WŽƉƵůĂƚĞZϴϭϱ

+1.2V_ALW_AVDD
L43
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD1P2

1

2

1

2

2

1

2

C522
0.1U_0402_16V4Z~D

4

150NH_LLQ1608-FR15G_2%~D

POP
NOPOP

C514
1U_0603_10V6K~D

BCM5882_GPIO15
1
R647

POP

BCM5882_GPIO15

M45PE16-VMW6TG_SO8W8~D

TYCO_1-2041084-0~D

NOPOP

D31-D34

1

C521
1U_0603_10V6K~D

8
7
6
5

2

D28,D29

C520
0.1U_0402_16V4Z~D

Q
VSS
VCC
W#

2
L46

@

C519
1U_0603_10V6K~D

D
C
RESET#
S#

1
1

C518
1U_0603_10V6K~D

1
2
3
4

SPI_RXD

3

+3.3V_ALW

150P

C641,C647 NOPOP

@

2
U36

1

C512
390P_0603_50V8G~D

WůĂĐĞϱϬϴĐůŽƐĞƚŽ
hϯϰƉŝŶϭϱ

R634

C511
390P_0603_50V8G~D

+3.3V_ALW

C

A9
B11

RFREADER_RXN_C

RFID MODE
Component VOLTAGE

44

E8
D9

+3.3V_ALW

SPI_TXD
SPI_CLK
SPI_RST
SPI_CS

5

RSTOUT_N

BT_PRI_STATUS

RFREADER_TXN1_PI

CONN@

>ŝŶŬŽŶĞ

2

1
DA204U_SOT323-3~D

C517
0.1U_0402_16V4Z~D

GND
GND

1

1
2

2
@ D27

CLKOUT

BCM5882KFBG_FBGA196~D

3

+3.3V_ALW

C516
1U_0603_10V6K~D

11
12

2

RFTAG_VRXP
RFTAG_VRXN

+2.5V_ALW_AVDD

1

DA204U_SOT323-3~D
3

+3.3V_ALW

D3

TESTMODE

L39
150NH_0805CS-331EKTS_2%
1
2

RFREADER_TXP1

1

C515
3.3U_0603_10V6K~D

R646
1.5K_0402_5%~D

1
2
3
4
5
6
7
8
9
10

SC_RST
SC_CLK
SC_IO
SC_C4
SC_C8
SC_DET

J14

+1.2V_ALW_AVDD

RFREADER_RXP_C

0.1U_0402_16V4Z~D

3

C513
0.1U_0402_16V4Z~D

2

1
2
3
4
5
6
7
8
9
10

+SC_VCC

2

0_0402_5%~D
0_0402_5%~D

1

2

C507
10P_0402_50V8J~D

SC_RST
SC_CLK
SC_IO
SC_C4
SC_C8
SC_DET

1

SC_VCC should be 3X wide as
regular SC trace width to carry
~60mA max. current per ISO spec
C510 and C509 should be p
laced very close to SC cage pin
JSC1

0_0402_5%~D
22_0402_5%~D
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

CLKOUT

BCM5882KFBG_FBGA196~D

C487

R636
@ L45 15K_0402_1%~D
150NH_LLQ1608-FR15G_2%~D
1
2

C502
1
2

RFREADER_RXP
+3.3V_ALW

@ D25

2
2
2
2
2
2

C506
10P_0402_50V8J~D

1

2

+SC_VCC
1
1
1
1
1
1

C508
.47U_0402_6.3V6-K~D

A

2

C510
0.22U_0402_10V6K~D

2

@ C509
10U_0805_10V4Z~D

1

1

RFREADER_RXN

TDA8034HN_HVQFN24_4X4~D

+SC_VCC

2

1

R638
R639
R640
R641
R642
R643

POR_EXTR

C504
390P_0603_50V8G~D

@ R637
0_0402_5%~D

VDD(intf)
VDD

1

C503
390P_0603_50V8G~D

2

PORadj
CLKDIV1
CLKDIV2

2

CONTACTLESS_DET#
SCC_CMDVCC_N_R
BCM5882_GPIO15

1

18
6
7

1

D

J1
D2
C2
B1

2

PORADJ
CLKDIV1
CLKDIV2

2

+5V_ALW

C501
10U_0805_10V6M~D

B

2

1

C500
0.1U_0402_16V4Z~D

2
U34

1

1

R634
3.3M_0402_5%~D

1

C499
10U_0805_10V6M~D

2 PORADJ
4.7K_0402_5%~D
2 CLKDIV2
4.7K_0402_5%~D

C498
0.1U_0402_16V4Z~D

1
@
1

R633

C497
0.1U_0402_16V4Z~D

R631

2

1

23
44

L14

GPIO_4
GPIO_14
GPIO_15
GPIO_16

2

+3.3V_ALW

2 PORADJ
4.7K_0402_5%~D
2 CLKDIV1
4.7K_0402_5%~D

1

2

SECURE_BOOT

SBOOT
POR_EXTR

+3.3V_ALW
1
R632
1
R635

1

2

E2
D1

ϰϴϳƐŚŽƵůĚďĞƉůĂĐĞĚ
ĐůŽƐĞƌƚŽƉŝŶϱ

C491
10U_0603_6.3V6M~D

C493
15P_0402_50V8J~D

2

1

C489
4.7U_0603_6.3V6K~D

1

2

C496
1U_0402_6.3V6K~D

2

C488
1U_0402_6.3V6K~D

GND

27.12MHZ_12PF_1N227120CC0B~D
C492
12P_0402_50V8J~D

+3.3V_ALW

R630
5.1M_0402_5%~D

2

GND

3
4

R629
4.7K_0402_5%~D

1

OUT

C490
10U_0603_6.3V6M~D

IN

2

2
2

+2.5V_ALW_AVDD
C495
1U_0402_6.3V6K~D

1

+1.2V_ALW_AVDD
C494
1U_0402_6.3V6K~D

Y4
XI

BCM5882KFBG_FBGA196~D

SCANACCMODE

FP_RESET#
BT_COEX_STATUS2

U33C
R625 1
R628 1

All XTAL components and traces should be
placed/layout on top layer. The gnd/pwr
layer below will provide shielding from
27.12Mhz interference which might affect
cellular certification.

OVSTB

E3

@

HF_RX_TEST3

2 REF_XOUT
0_0402_5%~D
REF_XIN

E1

USH_TESTMODE
2

SC_CLK
SC_FCB
SC_SEL5V_GPIO_25
SC_SEL18V_GPIO_26
SC_DET
SC_IO
SC_RST
SC_PWR_N14
SC_PWR_P14
SC_VCC

OVSTB
SCANACCMODE
SBOOT

HF_RX_TEST1

1

WAKEUP_N

K1

HF_RX_TEST0
@ R621
0_0402_5%~D
1
2

PAD~D T145

R626
1K_0402_5%~D

L7

T146PAD~D
T147PAD~D
T148PAD~D
T150PAD~D

JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRSTN
JTCE

@ R601
0_0402_5%~D

JTCE_USH

BCMGPIO_10
BCMGPIO_11
BCMGPIO_12
BCMGPIO_13

2

LRESET_N_GPIO_17
LPCEN
LPCPD_N_GPIO_24

JTAG_RST#_USH
@ R605
0_0402_5%~D
1
2

L1
M1
N1
N2
L3
L2

NC
JTAG_CLK_USH
JTAG_TDI_USH
JTAG_TDO_USH
JTAG_TMS_USH
JTAG_RST#_USH
JTCE_USH

JTAG_TMS_USH

JTAG

SSP_CLK0_GPIO_6
SSP_FSS0_GPIO_7
SSP_RXD0_GPIO_8
SSP_TXD0_GPIO_9

SPI_CLK
SPI_CS
SPI_RXD
SPI_TXD

+3.3V_ALW

@ R666
0_0402_5%~D
2
1

1

M3
M5
N6

LPC
SPI

PLTRST1#_USH
USH_LPCEN
LPD#

SM BUS
Smard Card

1
1
3

1
2

USBH_OC1

FP_USBD- 23
FP_USBD+ 23
1
4.7K_0402_5%~D

RST_N

UART_TX/GPIO1
UART_RX/GPIO0

@

USBH_DN_1
USBH_UP_1
USBH_OC_1

P11
P12
P10

G1

D4
C4
B3
A3

UART_TX_GPIO_1
UART_RX_GPIO_0
UART_CTS_GPIO_2
UART_RTS_GPIO_3

@

P7
P8
P9

C

2
10M_0402_5%~D

REFCLK_XTALIN
REFCLK_XTALOUT

@

LCLK
LAD0_GPIO_20
LAD1_GPIO_21
LAD2_GPIO_22
LAD3_GPIO_23
LFRAME_N_GPIO_18
LSERIRQ_GPIO_19

2 USH_PWR_STATE#_R
0_0402_5%~D
1
2
R619
1K_0402_5%~D
1
2
R622
1K_0402_5%~D
1
2
R624
1K_0402_5%~D

1
R613

42 USH_PWR_STATE#

P2
N3
M4
K5
N4
K4
L4

2
2
2
2
2

FP_USBDFP_USBD+
USBH_OC0#
2
R590

USBH_DN_0
USBH_UP_0
USBH_OC_0

USBD_DN
USBD_UP
USBD_ATTACH_GPIO_27

0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
IRQ_SERIRQ_R

R593 1
R594 1
R595 1
R597 1
R598 1
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D

SC_DET
R606 1
BT_COEX_STATUS2
1
@ R1581

P5
P6
N7

JTAG_TDO_USH
@ R599
0_0402_5%~D
1
2

@

@ C486
4.7P_0402_50V8C~D

PCI_TPM_TERM

USBP7USBP7+

RST_N

BCM5882

@@@@

17 PLTRST_USH#
35,42 SP_TPM_LPC_EN

1
@ R612

BCM5882
G14
F14

U33A
R587
0_0402_5%~D
USBP7-_R
1
2
USBP7+_R
1
2
R588
USB_GPIO27
0_0402_5%~D

CLK_PCI_TPM
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
1
@ R600
1
R602
1
R604

15 CLK_PCI_TPM
14,35,42,43 LPC_LAD0
14,35,42,43 LPC_LAD1
14,35,42,43 LPC_LAD2
14,35,42,43 LPC_LAD3
14,35,42,43 LPC_LFRAME#
14,35,42,43 IRQ_SERIRQ

1
R627

U33D
REF_XIN
REF_XOUT

CLK
UART

2
2
G

2USB_GPIO27
17
G
17

43 USH_SMBCLK
43 USH_SMBDAT
42 BCM5882_ALERT#

1

JTAG_CLK_USH
@ R591
0_0402_5%~D
1
2
JTAG_TDI_USH

Q37
SSM3K7002FU_SC70-3~D

S

2JTAG_RST#_USH
1K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D

2 RST_N
4.7K_0402_5%~D
2 OVSTB
4.7K_0402_5%~D
2 FP_RESET#
4.7K_0402_5%~D

1
R577
1
R578
1
R582

R580
4.7K_0402_5%~D

D

@ R603
10_0402_5%~D

1

@

2 PLTRST1#_USH
10K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D
2 LPD#
4.7K_0402_5%~D
2 IRQ_SERIRQ_R
4.7K_0402_5%~D
2 USH_SMBCLK
2.2K_0402_5%~D
2 USH_SMBDAT
2.2K_0402_5%~D
2 BCM5882_ALERT#
2.2K_0402_5%~D
2 USH_PWR_STATE#
4.7K_0402_5%~D
2 USBH_OC1
4.7K_0402_5%~D

1
R610
1 2@
R615

2

3

D

1

CLK_PCI_TPM

2

3

+3.3V_ALW

S

2
0_0402_5%~D
2
1.5K_0402_5%~D

1
@ R579
1
1@ R583
1
@ R584
1
R581
1
R589
1
R585
1
R592
1
R586
1
R596

D

4

+3.3V_ALW_PCH
Q36
SI2301CDS-T1-GE3_SOT23-3~D

USB_GPIO27 1
@ R575
USBP7+
1
R576
+3.3V_ALW

A

Compal Electronics, Inc.
Title

USH BCM5882 (1/2)
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

34

of

64

5

4

3

2

1

U33B

H14
A11
A12

+1.2V_ALW_PLL
+1.2V_ALW_AVDD
+2.5V_ALW_AVDD

H13
E10
E11

+3.3V_ALW

1

+1.2V_ALW_PLL

2

+3.3V_ALW

2

1

2

C526
10U_0603_6.3V6M~D

A14

D11
P13

2

2

1

C535
0.1U_0402_16V4Z~D

1

+1.2V_ALW_PLL

+VDDC_5882

+VDDC_5882
+3.3V_ALW

1

1

2

C549
10U_0603_6.3V6M~D

1

2

C548
1U_0402_6.3V6K~D

1

2

C547
1U_0402_6.3V6K~D

1

2

C546
1U_0402_6.3V6K~D

1

2

C545
1U_0402_6.3V6K~D

1

2

C544
1U_0402_6.3V6K~D

C

C543
1U_0402_6.3V6K~D

2

AVSS_LDO25_B13
AVSS_LDO25_C12
AVSS_PLL

AVDD25_LDO12_A13
AVDD25_LDO12_B12

AVSS_REF
PLL_AVSS

AVDD25_PLL_A14

POR_AVSS

D13
F3
J4
J5
J6
J7
J8
J10
J11
K7
K8

VDDC_D13
VDDC_F3
VDDC_J4
VDDC_J5
VDDC_J6
VDDC_J7
VDDC_J8
VDDC_J10
VDDC_J11
VDDC_K7
VDDC_K8

E4
J2
K3
L8
N10

VDDO_33_E4
VDDO_33_J2
VDDO_33_K3
VDDO_33_L8
VDDO_33_N10

L6
M6
K10
K12
L12
L13
D5
E5
N5

B14
F13

D

D12
E13

G13

OTP_PWR
PLL_AVDD_1P2I
PLL_AVDD_1P2O
PLL_DVDD_1P2I

G4
H3
H4
J3

C11
B13
C12

AVDD33_LDO25

D14
E14
C14

M13
N13

LOW:Power Down Mode
High:Working Mode

AVSS_LDO12

AVDD_2P5I
AVDD_2P5O_E10
AVDD_2P5O_E11

PLL_DVSS

+SC_PWR
C1161
1U_0402_6.3V6K~D

2

2

1

C525
1U_0402_6.3V6K~D

1

1

1

C542
1U_0402_6.3V6K~D

2

2

C534
10U_0603_6.3V6M~D

1

C533
1U_0402_6.3V6K~D

1

2

C541
1U_0402_6.3V6K~D

2

C532
1U_0402_6.3V6K~D

1

1

C540
1U_0402_6.3V6K~D

2

2

C531
1U_0402_6.3V6K~D

1

1

C539
1U_0402_6.3V6K~D

2

2

C530
1U_0402_6.3V6K~D

1

1

C538
1U_0402_6.3V6K~D

1

2

2

C529
1U_0402_6.3V6K~D

2

1

C537
1U_0402_6.3V6K~D

1

C536
1U_0402_6.3V6K~D

2

2

C528
1U_0402_6.3V6K~D

1

C527
1U_0402_6.3V6K~D

2

C524
1U_0402_6.3V6K~D

1

A13
B12

C523
4.7U_0603_6.3V6K~D

D

BCM5882
AVDD_1P2I_REF
AVDD_1P2O_A11
AVDD_1P2O_A12

VSSC_F4
VSSC_F5
VSSC_F6
VSSC_F7
VSSC_F10
VSSC_F11
VSSC_F12
VSSC_G5
VSSC_G6
VSSC_G7
VSSC_G8
VSSC_G9
VSSC_G10
VSSC_G11
VSSC_G12
VSSC_H5
VSSC_H6
VSSC_H7
VSSC_H8
VSSC_H9
VSSC_H10
VSSC_H11
VSSC_H12
VSSC_J9
VSSC_J12
VSSC_K2
VSSC_K6
VSSC_K13
VSSC_K14
VSSC_L5
VSSC_M8
VSSC_M14
VSSC_N9
VSSC_N11
VSSC_N12
VSSC_P3
VSSC_P4

VDDO_33CORE_G4
VDDO_33CORE_H3
VDDO_33CORE_H4
VDDO_33CORE_J3
VDDO_33SC_M13
VDDO_33SC_N13
VDDO_LPC_L6
VDDO_LPC_M6
VDDO_SC_K10
VDDO_SC_K12
VDDO_SC_L12
VDDO_SC_L13

F4
F5
F6
F7
F10
F11
F12
G5
G6
G7
G8
G9
G10
G11
G12
H5
H6
H7
H8
H9
H10
H11
H12
J9
J12
K2
K6
K13
K14
L5
M8
M14
N9
N11
N12
P3
P4

C

VDDO_VAR_D5
VDDO_VAR_E5
VESD
BCM5882KFBG_FBGA196~D

China TCM: NationZ & Jetway co-lay
+3.3V_RUN
4@ U37

B

1
1
1
1
1

2
2
2
2
2

0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D

4@ R653 1
4@ R654 1

2 0_0402_5%~D
2 0_0402_5%~D

4@ R655 1

2 0_0402_5%~D

C_TPM_LPC_EN
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R

28
26
23
20
17

21
22
16
27
15
7
3
9

LPC_LFRAME#_R
PCI_RST#_R
IRQ_SERIRQ
CLKRUN#_R
TCM_BA1
TCM_BA0

LPCPD#
LAD0
LAD1
LAD2
LAD3

LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP
BA_1
BA_0

+3.3V_RUN

GND_11
GND_18
GND_25
GND_4

11
18
25
4

2

NC_5
NC_12
NC_13

5
12
13

NC_1
NC_2
NC_6
NC_8
NC_P

1
2
6
8
14

1

JETWAY_CLK14M

1

1

2

All 4@

POP

@

PU R583

@

POP

@

PD R615

POP

@

@

@

SIO 5028 ->SP_TPM_LPC_EN

PU R772

@

@

@

PCH GPIO39 ->TPM_ID1

PU RH268

@

@

POP

PD RH271

POP

POP

@

PCH GPIO38 ->TPM_ID0

PU RH267

POP

POP

@

PD RH270

@

@

POP

JETWAY_PIN5
C554 4@
1U_0402_6.3V6K~D

2
@C555
@C555
0.1U_0402_16V4Z~D

TCM Vender

A

POP

NationZ

R659, R660, C554, C550

Jetway

C555, RH315

DELL CONFIDENTIAL/PROPRIETARY

1

1

Compal Electronics, Inc.

R660 4@
1K_0402_5%~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

4@ R659
1K_0402_5%~D
2

2

TCM circuit
USH_LPCEN

JETWAY_CLK14M 15

1

TCM_BA0
TCM_BA1

5

1

1

B

USH BCM5882 and China TCM Z8H172T Option
Ref Des TCM Enable
TPM Enable
ALL TPM/TCM Disable

PART/PIN

2

2

A

SSX44-B_TSSOP28~D

@ R658
10K_0402_5%~D

1

2

JETWAY_PIN5

1

@ R657
10K_0402_5%~D

2

4@C550
10U_0603_6.3V6M~D

R650
R649
R648
R651
R652

4@C553
0.1U_0402_16V4Z~D

15 CLK_PCI_TPM_CHA
14,34,42,43 LPC_LFRAME#
14,17,37,38,42,43 PCH_PLTRST#_EC
+3.3V_RUN
14,34,42,43 IRQ_SERIRQ
16,42,43 CLKRUN#
1
2
@ R656
4.7K_0402_5%~D

4@
4@
4@
4@
4@

4@C552
0.1U_0402_16V4Z~D

SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

10
19
24

4@C551
0.1U_0402_16V4Z~D

34,42
14,34,42,43
14,34,42,43
14,34,42,43
14,34,42,43

VDD_0
VDD_1
VDD_2

4

3

2

Title

USH BCM5882 (2/2)
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

35

of

64

A

B

C

D

E

1

1

PE_TXP
PE_TXM
PE_RXP
PE_RXM
PE_REXT

33
13

17 PLTRST_MMI#

14
31

15 MMICLK_REQ#

GPAD
PE_RST#
MULTI-IO1
MULTI-IO2

SD_D1
SD_D2
MMI_D0
MS_D1
MS_D2
MMI_D3
MMI_D4
MMI_D5
MMI_D6
MMI_D7

28
26
29
27
25
24
23
22
21
20

MS_CD#
SD_CMD/MS_BS
MMI_CLK
SD_CD#
SD_WPI

11
19
18
12
30

SD/MMCDAT1_R R663 1
SD/MMCDAT2_R R664 1
SD/MMCDAT0_R R665 1

2

1

2

2

2 33_0402_5%~D
2 33_0402_5%~D
2 33_0402_5%~D

SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT0

33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D

SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7

2 33_0402_5%~D
2 33_0402_5%~D

SD/MMCCMD
SD/MMC_CLK
SD/MMCCD#
SDWP

2

1

2
SD/MMCDAT3_R
SD/MMCDAT4_R
SD/MMCDAT5_R
SD/MMCDAT6_R
SD/MMCDAT7_R

R668
R669
R670
R672
R673

1
1
1
1
1

SD/MMCCMD_R R674 1
SD/MMC_CLK_R R676 1

2
2
2
2
2

+3.3V_RUN_CARD

+3.3V_RUN_CARD

1

2

1

6
7
5
4
3

1

R826
10K_0402_5%~D

1
R677

PCIE_PRX_MMITX_P6_C
PCIE_PRX_MMITX_N6_C
PCIE_PTX_MMIRX_P6_C
PCIE_PTX_MMIRX_N6_C
2
191_0402_1%~D

17
15

+SKT_VCC

2

C572
4.7U_0603_10V6K~D

PCIE_PRX_MMITX_P6
PCIE_PRX_MMITX_N6
PCIE_PTX_MMIRX_P6
PCIE_PTX_MMIRX_N6

0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D

SKT_VCC
MMI_VCC_OUT

2

JSD1 CONN@
SD/MMCDAT3
SD/MMCCMD

C570
0.1U_0402_16V4Z~D

PE_REFCLKP
PE_REFCLKM

10
8

1

C564
4.7U_0603_10V6K~D

2
1

DVDD
AVDD

1

C563
0.1U_0402_16V4Z~D

3.3VDDH
VDDH
PE_VDDH

1

C574
4.7U_0603_10V6K~D

15
15
15
15

2
2
2
2

1

U38
16
9
1
2 +PE_VDDH 32
BLM18BD601SN1D_0603~D
L44

15 CLK_PCIE_MMI
15 CLK_PCIE_MMI#
1
1
1
1

+OZ_DVDD
+OZ_AVDD

2

C569
C571
C567
C568

C560

C573
0.1U_0402_16V4Z~D

2

1

C566
4.7U_0603_10V6K~D

2

1

2

C565
0.1U_0402_16V4Z~D

2

2

1

C558
0.1U_0402_16V4Z~D

1

0.1U_0402_16V4Z~D
C562

2

4.7U_0603_10V6K~D
C561

1

1

C557
0.1U_0402_16V4Z~D

1

+VDDH_SD

C556
4.7U_0603_10V6K~D

@ R661
0_0402_5%~D
1
2

+1.5V_RUN R662
0_0402_5%~D
1
2

C559

2

+3.3V_RUN

2

0.01U_0402_16V7K~D

0.1U_0402_16V4Z~D

+PE_VDDH

SD/MMCDAT0
SD/MMCDAT1
SD/MMCDAT2

14
12
10
9
8
6
4
3
15

SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7

13
11
7
5

DAT4/MMC10
DAT5/MMC11
DAT6/MMC12
DAT7/MMC13

16
17

CD_WP_SW/GND
CD_WP_SW/GND

19
20
2
1

CD_SW/SD
WP_SW/SD
CD_SW_TAISOL/SD
WP/SW_TAISOL/SD

SD/MMC_CLK

SD/MMCCD#
SDWP
SD/MMCCD#
SDWP

DAT3/SD1
CMD/SD2
VSS1/SD3
VCC/SD4
CLK/SD5
GND/VSSS2/SD6
DAT0/SD7
DAT1/SD8
DAT2/SD9

18

OZ600FJ0LN_QFN32_5X5~D

2

GND_SW
T-SOL_156-4000000901_NR~D

>ŝŶŬŽŶĞ

3

3

4

4

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

OZ600FJ0
Size

B

C

D

Rev
0.3

LA-6591P
Date:

A

Document Number
Wednesday, January 26, 2011

Sheet
E

36

of

64

5

4

3

2

1

+3.3V_PCIE_WWAN

+3.3V_RUN

+3.3V_ALW_PCH
1

1
0_0402_5%~D
1
0_0402_5%~D

1

42 WLAN_RADIO_DIS#

WLAN_RADIO_DIS#_R

2

Mini WLAN/WIMAX H=4

WWAN_SMBCLK
WWAN_SMBDAT

D

+3.3V_WLAN

PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1

15 PCIE_PRX_WANTX_N1
15 PCIE_PRX_WANTX_P1

0.1U_0402_10V7K~D
2 PCIE_PTX_WANRX_N1_C
2 PCIE_PTX_WANRX_P1_C
0.1U_0402_10V7K~D
2 PCIE_MCARD2_DET#_R
0_0402_5%~D

C597 1
15 PCIE_PTX_WANRX_N1
C599 1
15 PCIE_PTX_WANRX_P1
1
R725

17 PCIE_MCARD2_DET#

C

53

GND1

GND2

54

+1.5V_RUN
+SIM_PWR

UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

15 MINI2CLK_REQ#

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

15 CLK_PCIE_MINI2#
15 CLK_PCIE_MINI2

WWAN_RADIO_DIS#
1
2
R704
0_0402_5%~D

43 HOST_DEBUG_RX
43
MSCLK
WWAN_RADIO_DIS# 42
PCH_PLTRST#_EC 14,17,35,38,42,43

15 PCIE_PTX_WLANRX_N2
15 PCIE_PTX_WLANRX_P2

USBP5USBP5+
USB_MCARD2_DET#
LED_WWAN_OUT#

17
USBP5USBP5+
17
USB_MCARD2_DET# 18

0.1U_0402_10V7K~D
2 PCIE_PTX_WLANRX_N2_C
2 PCIE_PTX_WLANRX_P2_C
0.1U_0402_10V7K~D
PCIE_MCARD1_DET#

C596 1
C598 1

18 PCIE_MCARD1_DET#
COEX2_WLAN_ACTIVE
15 PCH_CL_CLK1
15 PCH_CL_DATA1
1
15 PCH_CL_RST1#
R707

1
@ C600
33P_0402_50V8J~D
USB_MCARD2_DET# 1
@ R697

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2

15 PCIE_PRX_WLANTX_N2
15 PCIE_PRX_WLANTX_P2

WWAN_SMBCLK
WWAN_SMBDAT

2 PCIE_MCARD2_DET#
0_0402_5%~D

+1.5V_RUN

+1.5V_RUN

2
0_0402_5%~D

2

53

+3.3V_WLAN

Aux Power

+3.3V

+-9%

1000

750

+3.3Vaux

+-9%

330

250

+1.5V

+-5%

500

375

15 CLK_PCIE_MINI3#
15 CLK_PCIE_MINI3

Normal

15 PCIE_PRX_WPANTX_N5
15 PCIE_PRX_WPANTX_P5

250 (Wake enable)
5 (Not wake enable)

+1.5V_RUN

2
R718

1
R711

2

1

2

2

1

2

1

2

1

2

1

2

1

2

1

2

53

C626
4.7U_0603_6.3V6K~D

1

2
100K_0402_5%~D

C625
0.1U_0402_16V4Z~D

SRV05-4.TCT_SOT23-6~D

UIM_DATA

0.1U_0402_10V7K~D
PCIE_PTX_WPANRX_N5_C
PCIE_PTX_WPANRX_P5_C
0.1U_0402_10V7K~D
PCIE_MCARD3_DET#
2
2

C624
0.1U_0402_16V4Z~D

4

2

1

C623
0.047U_0402_16V4Z~D

3

+SIM_PWR

1

C622
0.047U_0402_16V4Z~D

5

@ C631
33P_0402_50V8J~D

4

2

@ C630
33P_0402_50V8J~D

2

@ C629
33P_0402_50V8J~D

@ C628
33P_0402_50V8J~D

2

1

UIM_VPP

6

@ C621
0.1U_0402_16V4Z~D

1

UIM_CLK

1

C

43

DMN66D0LDW-7_SOT363-6~D

4
2

PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5

+3.3V_PCIE_FLASH

C620
0.047U_0402_16V4Z~D

UIM_RESET
UIM_VPP
UIM_DATA

C619
0.047U_0402_16V4Z~D

U40 @

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

CLK_PCIE_MINI3#
CLK_PCIE_MINI3

C617 1
C618 1

15 PCIE_PTX_WPANRX_N5
15 PCIE_PTX_WPANRX_P5

NA

JSIM1 CONN@

5

1

2

2
R719
1

100K_0402_5%~D

Normal

>ŝŶŬŽŶĞ

MSDATA

WIMAX_LED# STUDY FOR DEBUG
+3.3V_WLAN

WIRELESS_LED#

3

Q124B
DMN66D0LDW-7_SOT363-6~D

1

6

2 PCIE_MCARD3_DET#
0_0402_5%~D

1
@ R708

+3.3V_PCIE_FLASH

JMINI3

+SIM_PWR

2

@ R706
0_0402_5%~D
1
2

WIMAX_LED#

PCIE_WAKE#
COEX2_WLAN_ACTIVE
1
2
0_0402_5%~D
R709
MINI3CLK_REQ#
15 MINI3CLK_REQ#

SIM Card Push-Push

C616
1U_0402_6.3V6K~D

USBP4- 17
USBP4+ 17
USB_MCARD1_DET# 18

1/2 Minicard Flash Card H=4

18 PCIE_MCARD3_DET#

1

2

+3.3V_PCIE_FLASH

Peak

5
6
7
8
9
10

USBP4USBP4+
USB_MCARD1_DET#
WIMAX_LED#
WLAN_LED#

USB_MCARD3_DET#

Voltage
Tolerance

GND
VPP
I/O
NC
GND
GND
MOLEX_475531001~D

HOST_DEBUG_TX 43

WIRELESS_LED# 42,46

Q77
SSM3K7002FU_SC70-3~D

PWR
Rail

VCC
RST
CLK
NC

2

WLAN_RADIO_DIS#_R
2
1 PCH_PLTRST#_EC
0_0402_5%~D
R703

@

+3.3V_RUN

1
2
3
4

1

C595 4700P_0402_25V7K~D

Q124A
1

Primary Power

UIM_RESET
UIM_CLK

2

1

C608
4.7U_0603_6.3V6K~D

2

1

C607
0.1U_0402_16V4Z~D

2

1

C606
0.1U_0402_16V4Z~D

2

1

C605
0.047U_0402_16V4Z~D

2

1

C604
0.047U_0402_16V4Z~D

2

1

@ C603
0.1U_0402_16V4Z~D

1

B

A

GND1

2
100K_0402_5%~D
2
100K_0402_5%~D

MSDATA

WLAN_LED#

3

D

2

LED_WWAN_OUT#

S

2

+

GND2

54

PCIE_MCARD1_DET# 1
R699 @
USB_MCARD1_DET#
1
R701

G

+

1

C1176
330U_D2E_6.3VM_R25~D

2

1

C615
330U_D2E_6.3VM_R25~D

2

1

2

C614
33P_0402_50V8J~D

2

1

C613
22U_0805_6.3VAM~D

2

1

C612
33P_0402_50V8J~D

1

C611
0.047U_0402_16V4Z~D

2

C610
0.047U_0402_16V4Z~D

1

1

C602
0.047U_0402_16V4Z~D

+3.3V_PCIE_WWAN

+3.3V_PCIE_WWAN

C601
0.047U_0402_16V4Z~D

2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

>ŝŶŬŽŶĞ

>ŝŶŬŽŶĞ

C594
0.047U_0402_16V4Z~D

C593
33P_0402_50V8J~D

2

1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

MOLEX_48338-1088~D

MOLEX_48338-1088~D

1

+1.5V_RUN

JMINI2 CONN@
44 COEX2_WLAN_ACTIVE
44 COEX1_BT_ACTIVE

5

15 CLK_PCIE_MINI1#
15 CLK_PCIE_MINI1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2

CLK_PCIE_MINI1#
CLK_PCIE_MINI1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

+3.3V_RUN

2 PCIE_MCARD1_DET#
0_0402_5%~D

100K_0402_5%~D

MINI1CLK_REQ#

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

PCIE_WAKE#
1
2
0_0402_5%~D
R7001
2
R702
0_0402_5%~D

29,38,42 PCIE_WAKE#
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE

JMINI1 CONN@

15 MINI1CLK_REQ#

USB_MCARD1_DET#
1
@ R698
+3.3V_WLAN

+3.3V_PCIE_WWAN

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

2
100K_0402_5%~D

D31
RB751S40T1_SOD523-2~D

Mini WWAN/GPS/LTE/UWB H=5.2
+3.3V_PCIE_WWAN

PCIE_MCARD1_DET# 1
R692

R705

12,13,15,28 DDR_XDP_WAN_SMBDAT

2
0_0402_5%~D

1

2
R1157
2
R1158

12,13,15,28 DDR_XDP_WAN_SMBCLK

2
100K_0402_5%~D

1
@ R693

100K_0402_5%~D

PCIE_MCARD2_DET# 1
R695
D

2

1
2

+3.3V_PCIE_WWAN

@R1160
@
R1160
2.2K_0402_5%~D

1
100K_0402_5%~D

R1159
@R1159
@
2.2K_0402_5%~D

USB_MCARD2_DET# 2
R694

CONN@

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

B

+1.5V_RUN

2
R710

1 PCH_PLTRST#_EC
0_0402_5%~D

USBP6USBP6+
USB_MCARD3_DET#

USBP6- 17
USBP6+ 17

2
@ R712

1
100K_0402_5%~D

+3.3V_ALW_PCH

WPAN Noise
USB_MCARD3_DET#

54
1

LOTES_AAA-PCI-073-P02-A

>ŝŶŬŽŶĞ

2

C627@
4700P_0402_25V7K~D
A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Mini Card
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

37

of

64

5

4

3

2

1

WŽǁĞƌŽŶƚƌŽůĨŽƌDŝŶŝĐĂƌĚϮ
ǆƉƌĞƐƐĂƌĚWtZ^ͬt

+3.3V_SUS
+15V_ALW

+3.3V_ALW

+3.3V_WLAN

4

S

1
2

G
3

2
3

1
2
6
1

R716
100K_0402_5%~D

R717

1

2 0_0402_5%~D EXPRCRD_STBY_R#
PCH_PLTRST#_EC

2

11,42,45,50 RUN_ON
14,17,35,37,42,43 PCH_PLTRST#_EC

U41
17
2
12
20
1
6
19

SHDN#
STBY#
SYSRST#
OC#

4
5
13
14
16

NC
NC
NC
NC
NC

WŽǁĞƌŽŶƚƌŽůĨŽƌDŝŶŝĐĂƌĚϭ

C

AUXIN
3.3VIN
1.5VIN

AUXOUT
3.3VOUT
1.5VOUT

15
3
11

PERST#
CPPE#
CPUSB#

8
10
9

RCLKEN

18

GND
PAD

7
21

1

2

CARD_RESET#
EXPRCRD_CPPE#
CPUSB#

1

2

C638
10U_0603_6.3V6M~D

2

1

2

2
1

2

C641
10U_0603_6.3V6M~D

1

C640
0.1U_0402_16V4Z~D

2

1
+1.5V_CARD

1

2

C643
10U_0603_6.3V6M~D

1

C637
0.1U_0402_16V4Z~D

2

2

+3.3V_CARD
+1.5V_RUN

C635
0.1U_0402_16V4Z~D

1

1
R715
20K_0402_5%~D

C642
0.1U_0402_16V4Z~D

Q38
SI3456DDV-T1-GE3_TSOP6~D

C634
0.1U_0402_16V4Z~D

1

+3.3V_CARDAUX
+3.3V_RUN

4
C633
0.1U_0402_16V4Z~D

2

42 AUX_EN_WOWL

6
5
2
1

C632
4700P_0402_25V7K~D

Q39A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D
R714
Q39B
100K_0402_5%~D

R713
100K_0402_5%~D
5

D

D

1

D

TPS2231MRGPR-2_QFN20_4X4~D
C

+3.3V_PCIE_WWAN

R726
100K_0402_5%~D

D

S

+3.3V_RUN

1

@ R720
0_0805_5%~D
2

G

+1.5V_CARD
R723
1K_0402_5%~D

2

2

1
1
@ R724

1

1

D

2
G

2
0_0402_5%~D
2

MCARD_WWAN_PWREN#
1
@ R727
4 4

S

3

4
1

1

42 MCARD_WWAN_PWREN

1

3

2
3

1
2
6

2

4

SSM3K7002FU_SC70-3~D
Q73

Q41A
DMN66D0LDW-7_SOT363-6~D

6
5
2
1

C644
4700P_0402_25V7K~D

R721
100K_0402_5%~D
MCARD_WWAN_PWREN# 5

DMN66D0LDW-7_SOT363-6~D
R722
Q41B
100K_0402_5%~D

+3.3V_ALW
Q40
SI3456DDV-T1-GE3_TSOP6~D

1

+15V_ALW

17

USBP10-

2
0_0402_5%~D
3 3

JEXP1 CONN@
EXPRCRD_DET#
USBP10_DUSBP10_D+
CPUSB#

18 EXPRCRD_DET#
17

1

USBP10+

1
L49

2

2

DLW21SN900SQ2L_0805_4P~D

2

CARD_SMBCLK
CARD_SMBDAT

B

WŽǁĞƌŽŶƚƌŽůĨŽƌDŝŶŝĐĂƌĚϯ

29,37,42 PCIE_WAKE#

+3.3V_CARDAUX

CARD_RESET#
+3.3V_CARD
1

D

S

C649
0.1U_0402_16V4Z~D

1

1
2

1

2

2

2

EXPRCRD_CPPE#

15 CLK_PCIE_EXP#
15 CLK_PCIE_EXP
2

15 PCIE_PRX_EXPTX_N3
15 PCIE_PRX_EXPTX_P3

15 PCIE_PTX_EXPRX_N3
15 PCIE_PTX_EXPRX_P3

G

1

R733
100K_0402_5%~D

C647
C648

1
1

2 0.1U_0402_10V7K~D PCIE_PTX_EXPRX_N3_C
2 0.1U_0402_10V7K~D PCIE_PTX_EXPRX_P3_C

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
GND
GND

B

TYCO_2-2041070-6~D

>ŝŶŬŽŶĞ

43 CARD_SMBCLK
43 CARD_SMBDAT

A

2

A

+3.3V_SUS
R730
20K_0402_5%~D

3

1
2
3
4

6
1

1

4
Q42
SI3456DDV-T1-GE3_TSOP6~D

15 EXPCLK_REQ#

1
2

R732
2.2K_0402_5%~D

2

42 MCARD_MISC_PWREN

6
5
2
1

R731
2.2K_0402_5%~D

Q43A
DMN66D0LDW-7_SOT363-6~D

C646
0.1U_0402_16V4Z~D

+3.3V_PCIE_FLASH

C650
4700P_0402_25V7K~D

5

DMN66D0LDW-7_SOT363-6~D
R729
Q43B
100K_0402_5%~D

2

+3.3V_ALW

R728
100K_0402_5%~D

1

+15V_ALW

C645
0.1U_0402_16V4Z~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

PCIE-SATA SW / PCIE PWR
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

38

of

64

5

4

3

2

1

D

D

17

USBP1+

L52 DLW21SN900SQ2L_0805_4P~D
USBP1_D+
4 4
3 3

17

USBP1-

1

1

USBP1_D-

2

2

1
@ R737

2
0_0402_5%~D

1
@ R739

2
0_0402_5%~D

C

C

USBP1_D+
+USB_SIDE_PWR

2

PESD5V0U2BT_SOT23-3~D

1

@

+
2

1

2

C658
0.1U_0402_16V4Z~D

D73

1

C657
150U_B2_6.3V-M~D

3

USBP1_D-

1
2
3
4

USBP1_DUSBP1_D+

JUSB1 CONN@
VBUS G4 8
DG3 7
D+
G2 6
GND G1 5

SUYIN_020173GR004M57QZL

>ŝŶŬŽŶĞ
B

B

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

USB x1
Size

4

3

2

Rev
0.3

LA-6611P
Date:

5

Document Number
Wednesday, January 26, 2011

Sheet
1

39

of

64

5

4

3

2

1

+3.3V_RUN

ESATA_PRX_DTX_P4_RP
ESATA_PRX_DTX_N4_RP

MAX4951BECTP+TGH7_TQFN20_4X4~D

2
1

2

1
2

1
2

1

R1591 R1592
1

11
12

2

15
14

BINP
BINM

1

AOUTP
AOUTM

2

1
2
1
2

1
2

depop

depop

pop

R1585
0_0402_5%~D

R1588
0_0402_5%~D

1

@ R1587
10K_0402_5%~D

@ R1586
10K_0402_5%~D

2

pop

@ R746
0_0402_5%~D

GND
GND
GND
GND
EP

ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP

@ R745
0_0402_5%~D

+3.3V_RUN

C

3
13
17
19
21

+ESATA_EQ1
+ESATA_EQ2

D

TI

ESATA_PE1
ESATA_PE2

9
8

1

1

PA
PB

BOUTM
BOUTP

R1589 R1590

X76@ R1592
10K_0402_5%~D

2

4
5

MAXIM

+ESATA_DEW1

2

1

AINP
AINM

+ESATA_DEW2

6
10
16
20

1

1

2

VCC
VCC
VCC
VCC

2

2

1
2

EN
CAD

X76@ R1591
10K_0402_5%~D

14 ESATA_PRX_DTX_P4_C

1

SA00003LH1L SA00003ZX0L

R743
0_0402_5%~D

14 ESATA_PRX_DTX_N4_C

2

U44 X76M@
7
18

ESATA_PTX_DRX_P4
0.01U_0402_16V7K~D
ESATA_PTX_DRX_N4
0.01U_0402_16V7K~D
ESATA_PRX_DTX_N4
0.01U_0402_16V7K~D
ESATA_PRX_DTX_P4
0.01U_0402_16V7K~D

@ R742
0_0402_5%~D

14 ESATA_PTX_DRX_N4_C

ESATA_PTX_DRX_P4_C
C664
ESATA_PTX_DRX_N4_C
C663
ESATA_PRX_DTX_N4_C
C666
ESATA_PRX_DTX_P4_C
C665

R1590
0_0402_5%~D

+3.3V_RUN

14 ESATA_PTX_DRX_P4_C

2 ESATA_PWRSAVE
0_0402_5%~D

1
R741

2

X76M@ X76M@
R1589
0_0402_5%~D

2
D

1

C662
0.1U_0402_16V4Z~D

1

C661
0.01U_0402_16V7K~D

ESATA Repeater

C

+USB_SIDE_PWR +SATA_SIDE_PWR
+5V_ALW
U45
1

JUMP_43X79

1
2
3
4
5

+5V_ALW_FUSE
42 USB_SIDE_EN#
42 ESATA_USB_PWR_EN#

GND FAULT1#
IN
OUT1
IN
OUT2
EN1#
ILIM
EN2# FAULT#2
T-PAD

10
9
8
7
6
11

USB_OC0#

17

USB_OC1#

17
1

TPS2560DRCR-PG1.1_SON10_3X3~D

+

2

R747
24.9K_0402_1%~D

B

17

USBP2+

4

17

USBP2-

1

2

USBP2_D-

2

@

1
R734

2
0_0402_5%~D

@

1
R735

2
0_0402_5%~D

2

1

2

ESATA_PTX_DRX_P4_RP
1
C671
ESATA_PTX_DRX_N4_RP
1
C672
ESATA_PRX_DTX_N4_RP
1
C673
ESATA_PRX_DTX_P4_RP
1
C674

L50 DLW21SN900SQ2L_0805_4P~D
USBP2_D+
4
3 3
1

+SATA_SIDE_PWR

C668
0.1U_0402_16V4Z~D

2

1

C667
150U_B2_6.3V-M~D

1

C670
0.1U_0402_16V4Z~D

2

C669
10U_0805_10V4Z~D

1

2

1

PJP7
2

JESA1 CONN@
USBP2_DUSBP2_D+

2 SATA_PTX_DRX_P4
0.01U_0402_16V7K~D
2 SATA_PTX_DRX_N4
0.01U_0402_16V7K~D
2 SATA_PRX_DTX_N4
0.01U_0402_16V7K~D
2 SATA_PRX_DTX_P4
0.01U_0402_16V7K~D

1
2
3
4

VBUS
DD+
GND

USB

B

5
6
7
8
9
10
11

GND
A+
ESATA
AGND
BB+
GND

12
13
14
15

GND
GND
GND
GND
TYCO_2129160-3

>ŝŶŬŽŶĞ

USBP2_D-

A

2
D72

1

PESD5V0U2BT_SOT23-3~D

3

USBP2_D+

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

USB/ESATA/IO
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

40

of

64

2

1

>ŝŶŬŽŶĞ

JDOCK1 CONN@

16 DPD_PCH_LANE_P1
16 DPD_PCH_LANE_N1
16 DPD_PCH_LANE_P2
16 DPD_PCH_LANE_N2
16 DPD_PCH_LANE_P3
16 DPD_PCH_LANE_N3

C690
C679

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPD_DOCK_LANE_P0
DPD_DOCK_LANE_N0

C681
C683

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPD_DOCK_LANE_P1
DPD_DOCK_LANE_N1

C692
C685

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPD_DOCK_LANE_P2
DPD_DOCK_LANE_N2

C687
C689

2
2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPD_DOCK_LANE_P3
DPD_DOCK_LANE_N3
DPD_DOCK_AUX
DPD_DOCK_AUX#

27 DPD_DOCK_AUX
27 DPD_DOCK_AUX#

B

16 DPD_PCH_DOCK_HPD

DPD_PCH_DOCK_HPD
+NBDOCK_DC_IN_SS
1

BLUE_DOCK

25 BLUE_DOCK

C695
0.033U_0402_16V7K~D

2

Close to DOCK
Its for Enhance ESD on dock issue.

25

RED_DOCK

RED_DOCK

GREEN_DOCK

25 GREEN_DOCK
25 HSYNC_DOCK
25 VSYNC_DOCK

DPD_PCH_DOCK_HPD

CLK_MSE
43
DAT_MSE

1

43

2

R757
110K_0402_1%~D

30
30

DAI_BCLK#
DAI_LRCK#

30
30

DAI_DI
DAI_DO#

30 DAI_12MHZ#

42
42

D_LAD0
D_LAD1

42
42

D_LAD2
D_LAD3

42
42

D_LFRAME#
D_CLKRUN#
42
42

CLK_PCI_DOCK

D_SERIRQ
D_DLDRQ1#

1

17 CLK_PCI_DOCK

2

R756
33_0402_5%~D

1

2

43 DOCK_SMB_CLK
43 DOCK_SMB_DAT
43,47,57 DOCK_SMB_ALERT#
47 DOCK_PSID

C704
12P_0402_50V8J~D

43 DOCK_PWR_BTN#
SLICE_BAT_PRES#

42,47,57 SLICE_BAT_PRES#

2
D33

SM24.TCT_SOT23-3~D

2

@
1

1

145
146
147
148
153
154
155
156
157
158

GND1
PWR1
PWR1
PWR1
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
PWR2
PWR2
PWR2
GND2
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

DOCK_AC_OFF
DPC_CA_DET

C691 2
C680 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1

C682 2
C684 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2

C693 2
C686 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3

C688 2
C694 2

1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D

DPC_DOCK_AUX
DPC_DOCK_AUX#

DPC_PCH_LANE_P0 16
DPC_PCH_LANE_N0 16
DPC_PCH_LANE_P1 16
DPC_PCH_LANE_N1 16
DPC_PCH_LANE_P2 16
DPC_PCH_LANE_N2 16
DPC_PCH_LANE_P3 16
DPC_PCH_LANE_N3 16

DPC_DOCK_AUX 27
DPC_DOCK_AUX# 27

B

DPC_PCH_DOCK_HPD

DPC_PCH_DOCK_HPD 16
ACAV_DOCK_SRC# 57

1

DAT_DDC2_DOCK 25
CLK_DDC2_DOCK 25
2
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5

C697 2
C698 2

1 0.01U_0402_16V7K~D
1 0.01U_0402_16V7K~D

SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5

C699 1
C700 1

2 0.01U_0402_16V7K~D
2 0.01U_0402_16V7K~D

C696
0.033U_0402_16V7K~D

SATA_PRX_DKTX_P5_C 14
SATA_PRX_DKTX_N5_C 14

Close to DOCK
Its for Enhance ESD on dock issue.

SATA_PTX_DKRX_P5_C 14
SATA_PTX_DKRX_N5_C 14

USBP8+ 17
USBP8- 17

DPC_PCH_DOCK_HPD

USBP9+ 17
USBP9- 17
CLK_KBD 43
DAT_KBD 43

R758
110K_0402_1%~D

BREATH_LED# 43,46
DOCK_LOM_ACTLED_YEL# 32
DOCK_LOM_TRD0+ 32
DOCK_LOM_TRD0- 32
DOCK_LOM_TRD1+ 32
DOCK_LOM_TRD1- 32

+LOM_VCT
1

+LOM_VCT
DOCK_LOM_TRD2+ 32
DOCK_LOM_TRD2- 32

2

@C701
@C701
1U_0402_6.3V6K~D

DOCK_LOM_TRD3+ 32
DOCK_LOM_TRD3- 32
DOCK_DCIN_IS+ 55
DOCK_DCIN_IS- 55
DOCK_POR_RST# 43
DOCK_DET_R#

149
150
151
152

D32
RB751S40T1_SOD523-2~D
1
2

DOCK_DET#

42

+DOCK_PWR_BAR

1
159
160
161
162
163
164

DOCK_AC_OFF 42,57
DOCK_LOM_SPD100LED_ORG# 32
DPC_CA_DET 27

DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0

2

C703
0.1U_0603_50V4Z~D

2

@

C702
0.1U_0603_50V4Z~D

A

C1162
4.7U_0805_25V6K~D

1

3

+DOCK_PWR_BAR

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

1

16 DPD_PCH_LANE_P0
16 DPD_PCH_LANE_N0

DPD_CA_DET

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

2

DOCK_DET_1
32 DOCK_LOM_SPD10LED_GRN#
27 DPD_CA_DET

+3.3V_ALW

DOCK_DET#

1
R755

2
100K_0402_5%~D

A

JAE_WD2F144WB3R300~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2

DOCKING CONN
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
1

Sheet

41

of

64

5

4

3

1

+3.3V_ALW

1

+3.3V_ALW
R805
100K_0402_5%~D
1

2
LID_CL_SIO#

2
R807

7 CPU_DETECT#
29 MOD_SATA_PCIE#_DET

29 ZODD_WAKE#
34 BCM5882_ALERT#
16
SUSACK#

USB_SIDE_EN#
EN_I2S_NB_CODEC#
USH_PWR_STATE#
EN_DOCK_PWR_BAR
PANEL_BKEN_EC
ENVDD_PCH
LCD_TST
PSID_DISABLE#
PBAT_PRES#
DOCKED
DOCK_DET#
AUD_NB_MUTE#
MCARD_WWAN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR_EN#

+3.3V_ALW

1
R800

VGA_ID
2
100K_0402_5%~D

31 WIRELESS_ON#/OFF
44 BT_RADIO_DIS#
37 WWAN_RADIO_DIS#
7,16 SYS_PWROK

VGA_ID
Discrete

0

UMA

1

52,56 CPU_VTT_ON
16 PCH_DPWROK

A33
B36
A34
B37
A35
B38
A36
A37
B40
A38
B41
A39
B42
A40
B43
A41
B44

MODULE_ON
SLICE_BAT_ON
SLICE_BAT_PRES#
MODULE_BATT_PRES#
CHARGE_MODULE_BATT
CHARGE_PBATT
DEFAULT_OVRDE

B32
A31
B33
B15
A15
B16
A16

CPU_DETECT#

A1
B2
A2
B3
A3
B45
A42
B4

MOD_SATA_PCIE#_DET

ZODD_WAKE#
BCM5882_ALERT#
1
2 SUSACK#_EC
R1132
0_0402_5%~D

SLP_ME_CSW_DEV#
LAN_DISABLE#_R
CHARGE_EN
SYS_LED_MASK#
DYN_TUR_PWR_ALRT#
R797 1
2 0_0402_5%~D
WIRELESS_LED#
PCH_PCIE_WAKE#
WLAN_RADIO_DIS#
WIRELESS_ON#/OFF
BT_RADIO_DIS#
WWAN_RADIO_DIS#
SYS_PWROK

A59
B62
A58
B61
A56
B59
A55
B58
B47
A45
B48
A46
B49
A47
B50
A48

B13
A13
A53
B57
B14
A14
CPU_VTT_ON
B17
1
2
B18
R802
@R802
@
0_0402_5%~D

GPIOB0
GPIOB1
GPOC2
GPOC3
GPOC4
GPOC5
GPOC6/TACH4
GPIOC7
GPIOD0
GPIOC1
GPIOC0
GPIOB7
GPIOB6
GPIOB5
GPIOB4
GPIOB3
GPIOB2
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD7
GPIOE0/RXD
GPIOE1/TXD
GPIOE2/RTS#
GPIOE3/DSR#
GPIOE4/CTS#
GPIOE5/DTR#
GPIOE6/RI#
GPIOE7/DCD#
GPIOF0
GPIOF1
GPIOF2
GPIOF3/TACH8
GPIOF4/TACH7
GPIOF5
GPIOF6
GPIOF7
GPIOG0/TACH5
GPIOG1
GPIOG2
GPIOG3
GPIOG4
GPIOG5
GPIOG6
GPIOG7/TACH6

B63
A60
A61
B65
A62
B66
A63

16,51
SIO_SLP_A#
0.75V_DDR_VTT_ON 50
SIO_SLP_S4# 16
SIO_SLP_S3# 16
IMVP_PGOOD 53
IMVP_VR_ON 53

1
2

DOCK_AC_OFF_EC
AUX_EN_WOWL
WLAN_LAN_DISB#
SIO_SLP_LAN#
SIO_SLP_SUS#
GPIO_PSID_SELECT
MODC_EN
DOCK_HP_DET
DOCK_MIC_DET

GPIOJ0
GPIOJ1/TACH1
GPIOJ2/TACH2
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7

B67
A64
A5
B6
A6
B7
A7
B8

GPIOK0
GPIOK1/TACH3
GPIOK2
GPIOK3
GPIOK4
GPIOK5
GPIOK6
GPIOK7

A8
B9
B10
A10
B11
A11
B12
A12

GPIOL0/PWM7
GPIOL1/PWM8
GPIOL2/PWM0
GPIOL3/PWM1
GPIOL4/PWM3
GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5

B60
A57
B64
B68
A9
B1
A18
A44

ME_FWP
ME_FWP
14
MASK_SATA_LED#
MASK_SATA_LED# 46
1.8V_RUN_PWRGD
1.8V_RUN_PWRGD 50
LED_SATA_DIAG_OUT#
LED_SATA_DIAG_OUT# 46
TEMP_ALERT#_R 1
2
TEMP_ALERT# 18
R773
0_0402_5%~D
RUN_ON
RUN_ON
11,38,45,50
SPI_WP#_SEL
SPI_WP#_SEL 14
5048_GPIOL0 @ R1567 2
1 10K_0402_5%~D
5048_GPIOL1 R1568 1
2 10K_0402_5%~D
5048_GPIOL2 R1569 1
2 0_0402_5%~D
5048_GPIOL3 @ R1570 1
2 0_0402_5%~D
5048_GPIOL4 R1571 1
2 0_0402_5%~D
5048_GPIOL5 @ R1572 1
2 0_0402_5%~D
5048_GPIOL6 R1573 1
2 0_0402_5%~D
5048_GPIOL7 R1574 1
2 0_0402_5%~D

GPIOM1
GPIOM3/PWM4
GPIOM4/PWM6

B34
B39
B51

5048_GPI0M1@ R1575 1
5048_GPI0M3 R1576 1
5048_GPI0M4 R1577 1

LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ
14.318MHZ/GPIOM0
CLK32/GPIOM2

A27
A26
B26
B25
A21
B22
A28
B20
A23
A22
B21
A32
B35

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
CLK_PCI_5048
CLKRUN#
LPC_LDRQ0#
LPC_LDRQ1#
IRQ_SERIRQ
CLK_SIO_14M
EC_32KHZ_ECE5048

B29
B28
A25
A24
B23
A19
B24
A20

D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_LFRAME#
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ

A29
B31
A30

BC_INT#_ECE5048
BC_DAT_ECE5048
BC_CLK_ECE5048

DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT#
BC_DAT
BC_CLK

GPIOH0
GPIOH1
SYSOPT1/GPIOH2
SYSOPT0/GPIOH3
GPIOH4
GPIOH5
GPIOH6
GPIOH7

PWRGD
OUT65
TEST_PIN
CAP_LDO
VSS
EP
DB Version 0.4
ECE5048-LZY_DQFN132_11X11~D

AUX_EN_WOWL 38
WLAN_LAN_DISB# 32
SIO_SLP_LAN# 16,32
SIO_SLP_SUS# 16
GPIO_PSID_SELECT 47
MODC_EN
29
DOCK_HP_DET 30
DOCK_MIC_DET 30

B
A

A4

RUNPWROK
SP_TPM_LPC_EN

B19

2
R804
+CAP_LDO

2 C711
0.1U_0402_16V4Z~D

1
O 4D34 2
RB751S40T1_SOD523-2~D
U47
TC7SH08FU_SSOP5~D

DOCK_AC_OFF 41,57

R770
33K_0402_5%~D

DOCK_AC_OFF_EC 57

+3.3V_ALW
WLAN_LAN_DISB#
2
@ R771

1
100K_0402_5%~D

ME_FWP

1
1K_0402_5%~D

2
@ R793

Dͺ&tWW,ŚĂƐŝŶƚĞƌŶĂůϮϬŝŶŬŽŶĞ

>ŝŶŬŽŶĞ

+3.3V_BT

@ R1133
1K_0402_5%~D
1
2BT_COEX_STATUS2

1

@ R1134
1K_0402_5%~D
1
2 BT_PRI_STATUS

2

R904
10K_0402_5%~D

TYCO_2041070-8

1

2

@ C754
100P_0402_50V8J~D

1
2
3
4
5
6
7
8

C753
33P_0402_50V8J~D

10P_0402_50V8J~D
C749

10P_0402_50V8J~D
C750

10P_0402_50V8J~D
C751

10P_0402_50V8J~D
C752

2

1

1
2
3
4
5
6
7
8

PS2_CLK_TS
PS2_DAT_TS

1

DAT_TP_SIO

2

1
2
3
4
5
6
7
8
9
10
11
12

17
BT_DET#
37 COEX1_BT_ACTIVE
34 BT_COEX_STATUS2
34 BT_PRI_STATUS
46 BT_ACTIVE
42 BT_RADIO_DIS#
37 COEX2_WLAN_ACTIVE

2

43

1

1

C748
0.1U_0402_16V4Z~D

1

@ R1162

2
0_0603_5%~D
2
0_0603_5%~D

2
0_0603_5%~D
2
0_0603_5%~D

2

2

2.2K_0402_5%~D
R902

4.7K_0402_5%~D
R903

D

1

1

1
R1129
1
@ R1130

+3.3V_TP

2

1
2

WůĂĐĞĐůŽƐĞƚŽ:dWϭ͘ϳ

@ D37
SD05.TCT_SOD323-2~D

2

C755
0.1U_0402_16V4Z~D

@ D36
SD05.TCT_SOD323-2~D

1

C

1

TP_CLK
TP_DATA

WŽǁĞƌ^ǁŝƚĐŚĨŽƌĚĞďƵŐ
1

31,43 POWER_SW#_MB

1

2

C

2

1
@ C759
100P_0402_50V8J~D

WůĂĐĞĐůŽƐĞƚŽ:dWϭĐŽŶŶĞĐƚŽƌ

@ PWRSW1
@SHORT PADS~D

2

Place on Bottom

<ĞǇďŽĂƌĚ

<ŽŶŶ͘WŝƚĐŚсϭ͘Ϭŵŵ
JKB1CONN@

18

KB_DET#
PS2_CLK_TS
PS2_DAT_TS

KB_DET#

+3.3V_ALW
+5V_RUN
43 BC_INT#_ECE1117
43 BC_DAT_ECE1117

B

43 BC_CLK_ECE1117

1
2
3
4
5
6
7
8
9
10
11
12

1
2
3
4
5
6
7
8
9
10

B

GND
GND

TYCO_1-2041084-0~D

>ŝŶŬŽŶĞ
+3.3V_ALW
+5V_RUN

1

2

1
C758
0.1U_0402_16V4Z~D

WůĂĐĞĐůŽƐĞƚŽ:<ϭ͘ϰ

2

C756
0.1U_0402_16V4Z~D

WůĂĐĞĐůŽƐĞƚŽ:<ϭ͘ϯ

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Int KB/Touch PAD/BT
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

44

of

64

5

4

3

2

1

ͬ/ŶƚĞƌĨĂĐĞ

нϯ͘ϯsͺ>tͺW,^ŽƵƌĐĞ

4

2

2

2

3
RUN_ON_ENABLE#

43 RUN_ON_ENABLE#

Q52B
DMN66D0LDW-7_SOT363-6~D

5

1

6

2

Q52A
DMN66D0LDW-7_SOT363-6~D
2
11,38,42,50 RUN_ON

R910
20K_0402_5%~D
D

1

1

1

1

1

1
1

5V_RUN_ENABLE

4

@
Q51A
DMN66D0LDW-7_SOT363-6~D
2
43 PCH_ALW_ON

R909
100K_0402_5%~D

@
C762
3300P_0402_50V7K~D

6

5

1

@ R908
20K_0402_5%~D

2

+5V_RUN

C763
2200P_0402_50V7K~D

ALW_ON_3.3V#

@
Q51B
DMN66D0LDW-7_SOT363-6~D

1

PAD-OPEN1x1m

2

3

D

2
1

2

G
3

2

4

ALW_ENABLE

ALW_ENABLE

PJP63

S

1
1
2

20

+5V_ALW Q50
SI4164DY-T1-GE3_SO8~D
8
1
7
2
R906
6
3
100K_0402_5%~D
5

C761
10U_0805_10V4Z~D

6
5
2
1

@
R905
100K_0402_5%~D

+15V_ALW

2

+3.3V_ALW2
C760
10U_0805_6.3V6M~D

@
R907
100K_0402_5%~D

нϱsͺZhE^ŽƵƌĐĞ

+3.3V_ALW

D

+3.3V_ALW2

+3.3V_ALW_PCH

4

@ Q49
+3.3V_ALW
SI3456DDV-T1-GE3_TSOP6~D

+15V_ALW

2

2

3.3V_RUN_ENABLE
1

4

6

C767
4700P_0402_25V7K~D

S

Q56
SSM3K7002FU_SC70-3~D

1

2

D

2
G

1

Q53A
DMN66D0LDW-7_SOT363-6~D
2
43
SUS_ON

1

+3.3V_RUN

4

R914
20K_0402_5%~D

3

3

3

1

1

S
G

2
1
2

Q53B
DMN66D0LDW-7_SOT363-6~D

5

1

C766
470P_0402_50V7K~D

SUS_ON_3.3V#
C

C765
10U_0805_6.3V6M~D

4

+3.3V_ALW Q55
NTMS4920NR2G_SO8~D
8
1
7
2
6
3
R912
5
100K_0402_5%~D

C764
10U_0805_6.3V6M~D

6
5
2
1

SUS_ENABLE

R915
100K_0402_5%~D

+15V_ALW

D

1

SI3456DDV-T1-GE3_TSOP6~D +3.3V_SUS
R911
100K_0402_5%~D

+3.3V_ALW2

нϯ͘ϯsͺZhE^ŽƵƌĐĞ

Q54

+3.3V_ALW

1

R913
20K_0402_5%~D

2

2

+15V_ALW

2

нϯ͘ϯsͺ^h^^ŽƵƌĐĞ

1
C

2

ŝƐĐŚĂƌŐŝƌĐƵŝƚ

G
3

2
Q62
SSM3K7002FU_SC70-3~D

1
3

1

S
2

1
1
2

2

2
1
3

4

1

1

1
1
3

1
3

1
3

2

2

2

2
1
3

1
3

1

1

1

1
2

2

2

1
3

S

1

2

D
Q64
SSM3K7002FU_SC70-3~D

+1.05V_RUN

C773
2200P_0402_50V7K~D

D

2
G

1.05V_RUN_ENABLE

2
G

Q72
SSM3K7002FU_SC70-3~D

S

2
G

+1.05V_M Q63
SI4164DY-T1-GE3_SO8~D
8
1
7
2
R930
6
3
100K_0402_5%~D
5

R927
22_0603_5%~D

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

B

+15V_ALW

+DDR_CHG

S

D

Q71
SSM3K7002FU_SC70-3~D

S

D

2
G

+1.5V_CPU_VDDQ_CHG

S

D

2
G

+0.75V_DDR_VTT

R926
220_0402_5%~D

7,11 RUN_ON_CPU1.5VS3#
@ Q70
SSM3K7002FU_SC70-3~D

D

2
G

+1.5V_CPU_VDDQ

@ R925
39_0402_5%~D
+1.05V_RUN_CHG

1

R929
39_0603_5%~D

Q69
SSM3K7002FU_SC70-3~D

S

+1.05V_RUN

+3.3V_RUN_CHG

D

2
G

C771
4700P_0402_25V7K~D

R931
20K_0402_5%~D

@ R924
1K_0402_5%~D

@ Q68
SSM3K7002FU_SC70-3~D

3

+3.3V_RUN

+1.5V_RUN_CHG

RUN_ON_ENABLE#

@ Q67
SSM3K7002FU_SC70-3~D

S

+5V_RUN_CHG

D

ALW_ON_3.3V# 2
G

@ Q66
SSM3K7002FU_SC70-3~D

S

@ Q65
SSM3K7002FU_SC70-3~D

D

2
G

2

S

нϭ͘ϬϱsͺZhE^ŽƵƌĐĞ
+1.5V_RUN

@ R923
1K_0402_5%~D

+3.3V_ALWPCH_CHG

+3.3V_SUS_CHG

A

@ R928
1K_0402_5%~D

R921
20K_0402_5%~D

2

C772
10U_0805_6.3V6M~D

@ R922
1K_0402_5%~D

SUS_ON_3.3V#

+5V_RUN

1

1

+3.3V_ALW_PCH

1

1

D

2
G

ŝƐĐŚĂƌŐŝƌĐƵŝƚ
+3.3V_SUS

4

1.5V_RUN_ENABLE

1

1
3

4

S

2
G

C770
4700P_0402_25V7K~D

1

2

A_ON_3.3V#

D

R920
100K_0402_5%~D

2

2

1
2

1

6

A_ON_3.3V# 5
Q57A
DMN66D0LDW-7_SOT363-6~D
2
43,51
A_ON

6
5
2
1

1

S
3

G
2

Q57B
DMN66D0LDW-7_SOT363-6~D

D

D
1

1

3

2

@ R919
20K_0402_5%~D

Q60
SSM3K7002FU_SC70-3~D

2

A_ENABLE

+3.3V_M_CHG

1

C768
10U_0805_6.3V6M~D

R918
100K_0402_5%~D

4

+15V_ALW

C769
10U_0805_6.3V6M~D

6
5
2
1

R917
100K_0402_5%~D

Q59
NTGS4141NT1G_TSOP6~D
+1.5V_RUN

+1.5V_MEM
R916
39_0603_5%~D

S

+3.3V_M

3

+15V_ALW
+3.3V_ALW2

1

Q58
SI3456DDV-T1-GE3_TSOP6~D

+3.3V_ALW

B

нϭ͘ϱsͺZhE^ŽƵƌĐĞ

+3.3V_M

нϯ͘ϯsͺD^ŽƵƌĐĞ

4

3

2

Title

POWER CONTROL
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

45

of

64

5

4

3

2

1

1

A

1

42 LED_SATA_DIAG_OUT#

SATA_LED
2
4.7K_0402_5%~D

1

D

2
Q82B
DMN66D0LDW-7_SOT363-6~D

31

SATA_LED

31

dŽ>ďŽĂƌĚ

Q83B
DMN66D0LDW-7_SOT363-6~D
4
3

5
1
R934

2

R942
100K_0402_5%~D

2
Q84
PDTA114EU_SC70-3~D

4

D62

1

BAT2_LED

4

Y

BATT_WHITE

+5V_ALW

3

U54
NC7SZ04P5X-G_SC70-5~D

ĂƚƚĞƌǇ>

2
4.7K_0402_5%~D

3

P
2

BAT2_LED#

1
R941

1

1

5
2
43
Q75
PDTA114EU_SC70-3~D

2

5

MASK_SATA_LED#

C774
0.1U_0402_16V4Z~D

1

42 MASK_SATA_LED#

+5V_ALW

NC

2

RB751S40T1_SOD523-2~D

Q81
PDTA114EU_SC70-3~D

2

G

1

2

3

2

3
14 SATA_ACT#

1

SYS_LED_MASK#

5

1
D

Q74A
DMN66D0LDW-7_SOT363-6~D
1
6
2

D59

MASK_BASE_LEDS#

R940
47K_0402_5%~D

2

2

Q82A
DMN66D0LDW-7_SOT363-6~D

R932
10K_0402_5%~D
Q74B
DMN66D0LDW-7_SOT363-6~D
4
3

+5V_ALW

+3.3V_ALW

+5V_ALW

Q83A
DMN66D0LDW-7_SOT363-6~D
1
6

6

+3.3V_ALW

R938
100K_0402_5%~D
1
2

3

+5V_ALW

,>ƐŽůƵƚŝŽŶĨŽƌtŚŝƚĞ>

1

RB751S40T1_SOD523-2~D
+3.3V_ALW
R945
100K_0402_5%~D
Q92A
1
2
DMN66D0LDW-7_SOT363-6~D
1
6
2

+3.3V_ALW

Y

3

1
1

BAT1_LED

4

2

NC7SZ04P5X-G_SC70-5~D

3

SYS_LED_MASK#

1
R939

4

2
4.7K_0402_5%~D

BATT_YELLOW_LED

24

31

WLAN_LED

1

+5V_ALW
+5V_ALW

BREATH_LED#_R

3

6

NC7SZ04P5X-G_SC70-5~D

2

0
1
1

X
0
1

1

Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)

2

3
5

1

BREATH_WHITE_LED
2
2K_0402_5%~D

BREATH_WHITE_LED

24

Q101B
DMN66D0LDW-7_SOT363-6~D
4
3 2
Q96
PDTA114EU_SC70-3~D
B

1

4

LID_CL#

SYS_LED_MASK#
B

1
R955

+5V_ALW

U57
Y

G

LED Circuit Control Table

A

SYS_LED_MASK#
R956
100K_0402_5%~D

5

2

1

5
P

41,43 BREATH_LED#

NC

2

1

R954
47K_0402_5%~D

Q94
PDTA114EU_SC70-3~D

+5V_ALW

3

2

2

1

C777
0.1U_0402_16V4Z~D
1
2

Q95B
DMN66D0LDW-7_SOT363-6~D
4
3 2

1

6

+3.3V_ALW

Q95A
DMN66D0LDW-7_SOT363-6~D

R953
100K_0402_5%~D

Q101A
DMN66D0LDW-7_SOT363-6~D

2
1
R959
100K_0402_5%~D

24

DMN66D0LDW-7_SOT363-6~D
Q78B

5

44 BT_ACTIVE

BATT_WHITE_LED

C

R951
150_0402_5%~D
1
2

1

MASK_BASE_LEDS#

31

Q93
PDTA114EU_SC70-3~D

5

2

Q89B
DMN66D0LDW-7_SOT363-6~D

R949
2K_0402_5%~D
1
2

4

5
Q79
PDTA114EU_SC70-3~D

BATT_YELLOW

dŽ>ƉĂŶĞů

Q92B
DMN66D0LDW-7_SOT363-6~D
4
3
2

2

C

2
150_0402_5%~D

+3.3V_ALW

1

37,42 WIRELESS_LED#

A

1
R946
R948
100K_0402_5%~D

G

Q78A
DMN66D0LDW-7_SOT363-6~D
1
6

+3.3V_ALW

2

3

2

BAT1_LED#

NC

P

2

2

3

43

2
C775
U55 0.1U_0402_16V4Z~D

3

5

1

1

R947
47K_0402_5%~D

+5V_ALW
R937
100K_0402_5%~D

1

1

1

t/Z>^^>ƐŽůƵƚŝŽŶĨŽƌtŚŝƚĞ>

MASK_BASE_LEDS#

6

Q89A
DMN66D0LDW-7_SOT363-6~D
+3.3V_ALW

Q88
PDTA114EU_SC70-3~D

2

+3.3V_ALW

3

MASK_BASE_LEDS#

MASK_BASE_LEDS#

LED1
BREATH_WHITE_LED_SNIFF
2
560_0402_5%~D

1
R957

2

1

LTW-C193TS5_WHITE~D

WůĂĐĞ>ϭĐůŽƐĞƚŽ^tϭ
+3.3V_ALW

42 SYS_LED_MASK#

CLIP1
EMI_CLIP

LID_CL#

1

LID_CL#

2

B
A

GND

U58
O

3

31,42

SYS_LED_MASK#

P

EMI CLIP

G

5

C778
0.1U_0402_16V4Z~D
1
2

4

MASK_BASE_LEDS#

TC7SH08FU_SSOP5~D

1

Fiducial Mark
@ FD1
1
FIDUCIAL MARK~D

>s^ƐƚĂŶĚŽĨĨ

A

@ FD2
1

@ H2
H_2P8

@ H3
H_2P8

@ H4
H_2P0

@ H5
H_2P8

@ H6
CLIP_C5

@ H7
CLIP_C5

A

@ H9
H_2P8

@ H10
H_2P8

@ H11
H_2P8

@ H12
H_2P6

@ H13
H_2P6

1

1

1

1

1

1

1

1

1

1

@ FD3
1

1

FIDUCIAL MARK~D

W,ƐƚĂŶĚŽĨĨ

FIDUCIAL MARK~D
@ FD4
1

@ H15
H_2P8

@ H16
H_3P4

@ H17
H_2P3

@ H18
H_3P4

@ H19
H_2P3

@ H20
H_2P8

@ H21
H_2P8

@ H22
H_2P0X2P5

@ H24
H_2P8

@ H25
H_2P8

@ H26
H_2P8

@ H27
H_2P8

@ H28
CLIP_C5

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

@ H29
CLIP_C5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FIDUCIAL MARK~D

3

2

Title

PAD & ME & LED
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

46

of

64

5

4

3

2

1

GND
GND

PR77
100_0402_5%~D
1
2

1

PR105
100_0402_5%~D
1
2

BAY_SMBCLK
BAY_SMBDAT

29,43
29,43

MPBATT+

PR1
1K_0402_5%~D
+3.3V_RTC_LDO

MODULE_BATT_PRES#

42,57

1 G
2 G

3
4
D

TYCO_2-1775293-2~D

7
8
PD1

RB715F_SOT323~D
GND

PL20
FBMJ4516HS720NT_2P~D
1
2

+3.3V_ALW

PC1
1U_0603_10V4Z~D

2

PL1
FBMJ4516HS720NT_2P~D
1
2

ESD Diodes

@

PJP43
PBATT+_C

1

Z4304
Z4305
Z4306

PR3
100_0402_5%~D
1
2

PR5
100_0402_5%~D
1
2

PBAT_SMBCLK
PBAT_SMBDAT

43
43

2

PBATT+

PAD-OPEN 4x4m

PC2
0.1U_0603_25V7K~D
2
1

PBATT1
PR4
100_0402_5%~D
1
2

+3.3V_ALW

PR2
100K_0402_5%~D
2
1

@

PD4
DA204U_SOT323~D
3
1
2

PD3
DA204U_SOT323~D
3
1
2

PD2
DA204U_SOT323~D
3
1
2

@

9
8
7
6
5
4
3
2
1

1

Move to power schematic

Primary Battery Connector

PBAT_PRES#

42,57

@ PQ1

C

GND

3

2

1

RB751V-40_SOD323-2~D
@ PR6
1
2
SLICE_BAT_PRES#
0_0402_5%~D

3

+5V_ALW

DCIN_CBL_DET#

2

B

2
G

2

2

PD6
DA204U_SOT323~D
3

1

DOCK_PSID

2
NB_PSID_TS5A63157

3

NO

IN

GND

V+

NC

COM

6

GPIO_PSID_SELECT

5

+5V_ALW

4

PS_ID

42

43

TS5A63157DCKR_SC70-6~D

@
PR13

1
@

PD8
DA204U_SOT323~D
3
1
2

1
2

3

PR11
10K_0402_1%~D


PQ3
MMST3904-7-F_SOT323~D
E

2

PSID_DISABLE#

42

10K_0402_5%~D

42

PC5
.47U_0402_6.3V6-K~D
1
2

1

PU1
41

+5V_ALW

C

2
B

PR12
15K_0402_1%~D
1
2

1

GND

@
PR14
0_0402_5%~D

GND

PQ2
FDV301N_NL_SOT23-3~D

1

3
1

@

@
PD7
SM24_SOT23

PC4 @
1500P_0402_7K~D

+5V_ALW

2

3

PD9
DA204U_SOT323~D

2

+5V_ALW

3

PR9
33_0402_5%~D
1
2

PR8
2.2K_0402_5%~D
1
2

1
PR10
100K_0402_1%~D
1
2

NB_PSID

D

PL2
BLM18BD102SN1D_0603~D
2
1

S

1
2
0_0402_5%~D

1

PR7

41,43,57
C

+3.3V_ALW

@

DOCK_SMB_ALERT#

1

41,42,57

1

FDN338P_NL_SOT23-3~D
@ PD5
1

SUYIN_200277MR009F515ZR~D

2
2

PC3
2200P_0402_50V7K~D
2
1

JRTC1
1
2

+COINCELL

+RTC_CELL

SUYIN_150010GR006M500ZR

GND
GND
7
6
5
4
3
2
1

Link Done
2

1

Z4012

Z5304
Z5305
Z5306

2

PAD-OPEN 2x2m~D

3

1
2
3
4
5
6

PJP51
MBATT+_C

1

1
2
3
4
5
6

PC141
2200P_0402_50V7K~D
2
1

D

PR106
100_0402_5%~D
1
2

COIN RTC Battery

+3.3V_ALW

2

PBATT2

+COINCELL

PL19
FBMJ4516HS720NT_2P~D
1
2

ESD Diodes

@

PR108
100K_0402_5%~D
2
1

2nd Battery Connector

@

PC136
0.1U_0603_25V7K~D
2
1

@

PD32
DA204U_SOT323~D
3
1
2

PD33
DA204U_SOT323~D
3
1
2

PD34
DA204U_SOT323~D
3
1
2

+3.3V_ALW

B

DC_IN+ Source

@


PQ4
FDS6679AZ_SO8~D
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D

+DC_IN

PL3
FBMJ4516HS720NT_2P~D
1
2

@

PL4
FBMJ4516HS720NT_2P~D
1
2

1
2

PC11
10U_1206_25V6M~D

PR16
100K_0402_5%~D
2
1

PC9
0.1U_0603_25V7K~D
2
1

57

PC8
0.1U_0603_25V7K~D
2
1

SOFT_START_GC

PC7
0.1U_0603_25V7K~D
2
1

2

PR15

1M_0402_5%~D

2

PC13
0.1U_0603_25V7K~D
2
1

MOLEX_87438-0743~D

A

2

PR18
1

10K_0402_5%~D

1M_0402_5%~D
2
1

+DCIN_JACK

@

PR19

-DCIN_JACK

PC6
0.022U_0805_50V7K~D
1
2

1
2
3
4
5
6
7

1
2
3
4
5
6
7

PC10
0.1U_0603_25V7K~D
2
1

1

PJPDC1

@ PR17
4.7K_0805_5%~D
2
1

Link Done

PD10
VZ0603M260APT_0603
PC12
0.1U_0603_25V7K~D
2
1

1

+DC_IN

+DC_IN_SS

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

+DCIN
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.1

LA-6611P
Sheet
1

47

of

57

5

4

3

2

1

+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP/ +3.3V_RTC_LDO

+DC1_PWR_SRC
PJP44
2

PC23
10U_1206_25V6M~D
2
1

2

1

PC22
10U_1206_25V6M~D
2
1

PC21
10U_1206_25V6M~D

PC19
2200P_0402_50V7K~D
2
1
1
2

PQ6
FDS8884 1N SO8

5
6
7
8

+3.3V_ALWP

2

@ PR37
4.7_1206_5%~D

@
@

@

+5V_ALW_LGATE

C

+3.3V_ALWP

PC38
330U_D3L_6.3VM_R25~D

+3.3V_ALW_LGATE

2

G

PC32
0.1U_0603_25V7K~D

1

4

@

PC37
0.1U_0402_10V7K~D
2
1

5
6
7
8

GNDA_3V5V

PR33
0_0402_5%~D
2
1

1

PL6
4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
2
1

PR39
0_0402_5%~D
2
1

D
D
D
D
S
S
S

G

PQ8
FDS6690AS-T1-G 1N SO8

PR35
1_0603_5%~D
+3.3V_ALW_BOOT 1
2

4

3
2
1

@

PR29
182K_0402_1%~D
GNDA_3V5V
1
2
+3.3V_OUT2
2 PR31
10_0402_5%~D
POK2
EN_3V_5V
+3.3V_ALW_UGATE
+3.3V_ALW_PHASE

32
31
30
29
28
27
26
25

D
D
D
D

PAD

PR28
@
1
2
0_0402_5%~D

S
S
S

REFIN2
TRIP2
VOUT2
SKIPSEL
PGOOD2
EN2
DRVH2
LL2

SN0608098_QFN32_5X5~D

17
18
19
20
21
22
23
24

GNDA_3V5V
PR34
1_0603_5%~D
1
2+5V_ALW_BOOT

PR27
0_0402_5%~D

3
2
1

2

S

G

33

D

PC34
0.1U_0603_25V7K~D
5V_BOOT_1
2
1

3

+5V_ALW_PHASE

VSW
VOUT1
VFB1
TRIP1
PGOOD1
EN1
DRVH1
LL1

1

EN_3V_5V

@ PR26
0_0603_5%~D

VBST1
DRVL1
V5DRV
SECFB
GND
PGND
DRVL2
VBST2

1
2
3

+5V_FB1
2
POK1

+5V_ALW_UGATE

1

PQ7
AON6788_1N POWER56-8

NC

PC31
0.1U_0603_25V7K~D
2
2
1

PR32
0_0402_5%~D
2
1

@

PR36
4.7_1206_5%~D
1

2

AON7408L_DFN8-5~D

PL5
3.0UH_HMP1362-3R0-R_17A_20%~D
2

@

@

PR38
0_0402_5%~D
2
1

+

PC36
0.1U_0402_10V7K~D
2
1

1

1

PR30
169K_0402_1%~D
1

GNDA_3V5V

9
10
11
12
13
14
15
16

GNDA_3V5V

3.3V_BOOT_1

PC33
330U_D3L_6.3VM_R25~D

+5V_ALWP

1
2
3

+5V_ALWP
C

4

&ƐǁсϯϬϬ<,ǌ

@

2
PC30
0.1U_0402_10V7K~D
2
1

@
4

1

8
7
6
5
4
3
2
1

PU2

+5V_ALWP

+5V_3V_REF PC28
0.1U_0603_25V7K~D
1
2

LDOREFIN
LDO
VIN
VREF3
EN_LDO
V5FILT
TONSEL
VREF2

AON7408L_DFN8-5~D

GNDA_3V5V

@ PR25
0_0402_5%~D
1
2

SECFB

PC29
0.1U_0402_10V7K~D
2
1

5

5

LDOREFIN

D

PC27
1U_0603_10V6K~D
2
1

@ PR24
0_0402_5%~D
1
2

2

2

@ PR23
0_0402_5%~D

+5V_ALW2P
VIN
+3.3V_ALW2
EN_3V_5V

1

PC26
1U_0402_6.3V4Z~D
2
1

PC25
0.1U_0603_25V7K~D
2
1

+3.3V_ALW2

PC35
0.1U_0603_25V7K~D

@

GNDA_3V5V

PQ12

@ PR22
10_0603_5%~D
2
1

PAD-OPEN1x1m

+3.3V_RTC_LDO

PQ5

+5V_VCC1

2

PC20
0.1U_0805_50V7M~D
2
1

PJP45

1

+5V_ALW2

PC24
4.7U_0603_6.3V6K~D
2
1

PC18
10U_1206_25V6M~D
2
1

PC17
10U_1206_25V6M~D
2
1

&ƐǁсϰϬϬ<,ǌ

PC16
10U_1206_25V6M~D
2
1

PC15
0.1U_0805_50V7M~D
2
1

PC14
2200P_0402_50V7K~D
2
1

ϱsŽůƚнͬͲϱй
dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚ͗ϭϬ͘ϰ
WĞĂŬƵƌƌĞŶƚ͗ϭϰ͘ϴ
KWͺD/E͗ϭϳ͘ϴ

ϯ͘ϯsŽůƚнͬͲϱй
dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚ͗ϯ͘ϴ
WĞĂŬĐƵƌƌĞŶƚ͗ϱ͘ϰ
KWͺD/E͗ϲ͘ϱ

WŽƉϭϬKŚŵĨŽƌDyϭϳϬϮϬ

PR21
0_0805_5%~D
1
2

PR20
0_0805_5%~D
1
2

PAD-OPEN 4x4m
D

REFIN2

1

+PWR_SRC

1
+
2

GNDA_3V5V

PD11
BAT54SW-7-F_SOT323-3~D
PC42
0.1U_0603_25V7K~D
1 1
2

2

2

+3.3V_ALWP

PAD-OPEN1x1m
GNDA_3V5V

PD13
BAT54CW_SOT323~D

3

B

@

POK2

PAD-OPEN 4x4m
PJP48
1
2

POK1

PJP49
+15V_ALW

+5V_ALW

2

1

+15V_ALWP

PAD-OPEN 4x4m
PAD-OPEN1x1m

(100mA,20mils ,Via NO.=1)
PJP50
+3.3V_ALWP

1

2

+3.3V_ALW

PAD-OPEN 4x4m
PJP9
1
2

ALW_PWRGD_3V_5V

43

PR46
200K_0402_1%~D
2
1
PC43
0.1U_0603_25V7K~D
2
1

+5V_ALWP

@

2

2

PR43
0_0402_5%~D
PJP47
1

@
PR45
0_0402_5%~D

2

1

PR47
39K_0402_5%~D
1

2

22 THERM_STP#

PR44
200K_0402_5%~D
1
2

1

BAT54SW-7-F_SOT323-3~D

2

ALWON

PD12
3

43

PR42
2K_0402_5%~D
2
1

+3.3V_ALWP

PR41
100K_0402_1%~D
1
2

+5V_ALW2

3

PJP46
1

PR40
100K_0402_1%~D
1
2

B

2

1

PC41
0.1U_0603_25V7K~D
2
1

+5V_ALWP

PC39
0.1U_0603_25V7K~D
1 1
2

PC40
1U_0603_10V6K~D
2
1

GNDA_3V5V
GNDA_3V5V

PAD-OPEN 4x4m
GNDA_3V5V

A

A

PU2

PR22

Main

X7629631L90

SN0608098

un-pop

2nd

X7629631L91

MAX8878

10_ohm

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

2

DC/DC +3V/ +5V
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.1

LA-6611P
Sheet
1

48

of

57

5

4

3

2

1

+1.5V_SUS_P(TPS51318)

1.5 Volt +/-5%
Thermal Design Current: 9.8A
Peak current: 13.9
OCP_MIN:16.7A
D

D

PJP10
+1.5V_PWR_SRC

PC48
0.1U_0603_25V7K~D
2
1

PC47
0.1U_0603_25V7K~D
2
1

@ PC46
10U_1206_25V6M~D
2
1

PC45
10U_1206_25V6M~D
2
1

16
MODE
IMON

10 TPS51318_IMON

2
1

1

GNDA_TPS_1.5V

PR57
2

C

@ PR58
4.7_0805_5%~D

0_0402_5%~D
1

PC65
0.1U_0603_25V7K~D
2
1

PC64
0.1U_0603_25V7K~D
2
1

PC63
22U_1206_6.3V6M~D
2
1

@ PC62
10U_1206_25V6M~D
2
1

@ PC61
22U_1206_6.3V6M~D
2
1

@ PC60
22U_1206_6.3V6M~D
2
1

PC59
22U_1206_6.3V6M~D
2
1

PC58
22U_1206_6.3V6M~D
2
1

@ PC57
10U_1206_25V6M~D
2
1

PC56
22U_1206_6.3V6M~D
2
1

1

GNDA_TPS_1.5V

PC382
22U_1206_6.3V6M~D
2
1

1
@

+1.5V_SUS_P

PC55
0.1U_0603_25V7K~D

SN1003055RUWR_QFN17_3P5X3P5~D

@ PR56
2

GNDA_TPS_1.5V

@

PC381
22U_1206_6.3V6M~D
2
1

SS

1
12 TPS51318_FSET 2
PR51 22.1K_0402_1%~D
@
11 TPS51318_MODE

2

FSET

VOUT

PL7
0.42UH_ETQP4LR42AFM_17A_20%~D
2
1

2

6

EN

VFB

43,50

2

TPS51318_SS

COMP

+1.5V_VX
DDR_ON

PR55
0_0402_5%~D

5

13 1.5V_DDR_EN

+1.5V_VX

GNDA_TPS_1.5V

4

+1.5V_SUS_P

PGND

1800P_0402_50V7K~D
PC53

PC54
0.01U_0402_25V7K~D
2
1

2

2

0_0402_5%~D
PR53

1

1

1

1.33K_0402_1%~D
PR54

+1.5V_SUS_P

C

2

2K_0402_1%~D
1

PGOOD

PC50
0.22U_0603_10V7K~D

1.33K_0402_1%~D

TPS51318_VFB
PR52
2

GND

TPS51318_BST_1

@ PR50
0_0402_5%~D
2
1

14 1.5V_SUS_PWRGD

1

TPS51318_COMP 3

PR48
3.3_0603_1%~D
1
2
15 TPS51318_BST

PGND

PC52 680P_0402_50V7K~D
2
1

VBST

7

PR49 5.6K_0402_5%~D
2
1

VCCA

9

2

+5V_ALW

+1.5V_VX

VIN

VIN
1

SW

PC51 100P_0402_50V8J~D
2
1

17

PU3

+3.3V_ALW

8

PC49
2
1

GNDA_TPS_1.5V

1U_0402_6.3V6K~D

@

2

PAD-OPEN 4x4m
PC44
10U_1206_25V6M~D
2
1

PC378
22U_0805_6.3V4Z~D
1
2

1

GNDA_TPS_1.5V

PJP12

+3.3V_ALW

1

2

PAD-OPEN 4x4m
PJP11
2

PJP13

PR59
100K_0402_1%~D
2
1

1

B

PAD-OPEN1x1m
GNDA_TPS_1.5V

+1.5V_SUS_P

1

B

+1.5V_MEM

2

PAD-OPEN 4x4m

1.5V_SUS_PWRGD

43

A

A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

+1.5V_MEM
Size

4

3

2

Rev
0.1

LA-6611P
Date:

5

Document Number
Wednesday, January 26, 2011

Sheet
1

49

of

57

5

4

3

2

1

+1.8V_RUNP

+3.3V_ALW

1.8 Volt +/-5%
Thermal Design Current: 0.99 A
Peak current: 1.415 A
OCP_MIN: 1.698 A

@ PJP14
2

D

+1.8V_PWR_SRC

1

D

PR60
0_0603_5%~D

1

2

12

16

17

15

TPAD

PGND

14

PGND

VIN

PU4

VIN

+1.8V_VDD

PC69

13

2

@

1

PC68
0.1U_0603_25V7K~D
2
1

PC67
22U_0805_6.3V4Z~D
1
2

PC66
10U_0805_6.3V6M~D
1
2

PAD-OPEN 2x2m~D

VDD

PR61
24k_0402_1%~D
2
1

+1.8V_EN

1

EN

RUN_ON

11,38,42,45

.1U_0402_16V7K~D

GNDA_1.8V

11

AGND

2

RES
TPS51311RGTR_QFN16_3X3~D

10

FB

COMP

1

5

PR67

SW

2

MODE
+1.8V_MODE 8

42

C

PL8
2UH_#A915AY-H-2R0M=P3_3.3A_20%~D
2
1

PC77
47P_0402_50V8J~D
2
1

@

PC76
22U_0805_6.3V4Z~D
1
2

1
2

1

2

GNDA_1.8V

+1.8V_RUNP

PC74
680P_0603_50V8J~D

1

GNDA_1.8V

PC75
22U_0805_6.3V4Z~D
1
2

2

0.22U_0603_10V7K~D
+1.8V_SW

PR70
4.7_0805_5%~D

1
PR68
2
PAD-OPEN1x1m

1.8V_RUN_PWRGD

PC73
2
1+1.8V_VBST_1

PR69
57.6K_0402_1%~D

2

+3.3V_RUN

+1.8V_VBST

4

VBST

3.3_0603_1%~D

9

PC72 100P_0402_50V8J~D
2
1

GNDA_1.8V
@ PJP15
1

1

PR64
10K_0402_5%~D

2K_0402_5%~D

C

2

3

PGOOD

SW

PR66
PC71
1.43K_0402_1%~D 0.018U_0402_50V7K~D
+1.8V_COMP
2
1
2
1

6

+1.8V_FB

1

SW

2

0.012U_0402_16V7K~D
10_0402_1%~D
PR65
2
1

7

PR63
2

1K_0402_1%~D

+1.8V_RUNP

PC70
1

@

+0.75V_DDR_VTT
B

B

DDR3 Termination

@
2

+1.8V_RUNP
PJP17
PU5
10

VLDOIN

S5
S3

PC78
1U_0603_10V6K~D

8
6
9
7

RT9026GFP_MSOP10~D

PC79
0.1U_0603_25V7K~D
1
2

VTTSNS
GND

5

GND
VTTREF
VTT

PGND

PC81
10U_0805_6.3V6M~D
1
2

PC80
10U_0805_6.3V6M~D
1
2

VIN

2

2

3

+0.75V_P

+V_DDR_REF

VDDQSNS

1

1

4

PAD-OPEN 2x2m~D

0.75Volt +/-5%
Thermal Design Current: 0.7A
Peak current: 1A

+5V_ALW

DC_1+0.75V_VTT_PWR_SRC

11

1

PC83
0.1U_0603_25V7K~D
2
1

2

PC82
10U_0805_6.3V6M~D
1
2

+1.5V_MEM

PJP18
2

1

+0.75V_P

+0.75V_DDR_VTT

PJP16
1

+1.8V_RUN

PAD-OPEN 2x2m~D

VOUT=1.8V
L=3.3uF
Fsw=290KHz
D=0.092
Input Ripple Current=TDC*(D*(1-D))^0.5=0.884A
Output Ripple Current=1.707A
Output Ripple Voltage=1.707*15m=20.5mV

PAD-OPEN 2x2m~D

+0.75V_S5

2

1

DDR_ON

A

0_0402_5%~D
+0.75V_S3

2
0_0402_5%~D

PR72

1

43,49

A

@

0.75V_DDR_VTT_ON

42

PR71 @

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

+0.75V_DDR_VT/+1.8V_RUN
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.1

LA-6611P
Sheet
1

50

of

57

5

4

3

2

1

+1.05V_M

D

D

PC84
PJP19
+1.05V_PWR_SRC

1U_0402_6.3V6K~D

10 +1.05VM_IMON

PGND

IMON

SN1003055RUWR_QFN17_3P5X3P5~D


PC89
0.1U_0603_25V7K~D
2
1

PC88
0.1U_0603_25V7K~D
2
1

PC87
10U_1206_25V6M~D
2
1

43,45

PR78 0_0402_5%~D
@

GNDA_1.05VM

+1.05V_MP

PL9
0.42UH_ETQP4LR42AFM_17A_20%~D
+1.05VM_VX
2
1

PC106
0.1U_0603_25V7K~D
2
1

PC107
6800P_0402_25V7K~D
2
1

GNDA_1.05VM

PC105
22U_0805_6.3V6M
2
1

PC104
22U_0805_6.3V6M
2
1

PC103
22U_0805_6.3V6M
2
1

PC102
22U_0805_6.3V6M
2
1

PC101
22U_0805_6.3V6M
2
1

PC100
22U_0805_6.3V6M
2
1

PC99
22U_0805_6.3V6M
2
1

PC98
22U_0805_6.3V6M
2
1

@ PR86
7.68K_0805_1%~D

PC97
10U_0603_6.3V6M~D
2
1

@
PC95
0.1U_0603_25V7K~D

PC96
10U_0603_6.3V6M~D
2
1

2

1

1

0_0402_5%~D
1

2

PR85
2

A_ON

1

@

1

GNDA_1.05VM

@ PR84
2

GNDA_1.05VM

PC86
10U_1206_25V6M~D
2
1

2
1
MODE

SS

16,42

SIO_SLP_A#

C

2

1

6

PR75 @
0_0402_5%~D
2
1

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dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚ͗Ϯ͘ϳ
WĞĂŬĐƵƌƌĞŶƚ͗ϯ͘ϵ
KWͺD/E͗ϰ͘ϳ

2

FSET

VOUT

+1.05VM_VX

GNDA_1.05VM

VFB

5

+1.05VM_BST_1

22.1K_0402_1%~D
2
1
12 +1.05VM_FSET
@ PR79
11 +1.05VM_MODE

1.33K_0402_1%~D

2

PC93

4

PC90
0.22U_0603_10V7K~D

13 +1.05VM_EN

EN

PGND

1800P_0402_50V7K~D

PR81

COMP

7

2
PC94
2
1

1

+1.05VM_SS

3

0.01U_0402_25V7K~D

1

+1.05V_MP

1

0_0402_5%~D

2K_0402_1%~D
1

2.67K_0402_1%~D
PR82

+1.05V_MP

2

+5V_ALW

14 1.05VA_PWRGD

PGOOD

9

+1.05VM_VFB
PR80
2

GND

SW

+1.05VM_COMP

VBST

8

PC92 680P_0402_50V7K~D
2
1

PR74
3.3_0603_1%~D
1
2
15 +1.05VM_BST

PR83
10K_0402_1%~D

VCCA

2

C

16

VIN
1

VIN

PU6

+3.3V_ALW

PC91 100P_0402_50V8J~D
2
1

17

GNDA_1.05VM

5.6K_0402_5%~D
1

2

PAD-OPEN 4x4m
+1.05VM_VX

PR76
2

1

1
@ PC85
10U_1206_25V6M~D
2
1

2

B

B

PR87
100K_0402_1%~D
2
1

+3.3V_ALW

1.05VA_PWRGD

PJP21
PJP20
1

1

2

2
PAD-OPEN 4x4m

2

1

PR88

1.05V_A_PWRGD

0_0402_5%~D

PJP22

PAD-OPEN1x1m

43

+1.05V_MP

1

2

+1.05V_M

GNDA_1.05VM
PAD-OPEN 4x4m

@

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

+1.05V_M
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.1

LA-6611P
5

4

3

2

Sheet
1

51

of

57

5

4

3

2

1

+1.05VTT

PC108
PJP23
+1.05VTT_PWR_SRC

10 +1.05VTT_IMON

+1.05VTTP

PL10
0.42UH_ETQP4LR42AFM_17A_20%~D
+1.05VTT_VX
2
1

PC131
6800P_0402_25V7K~D
2
1

PC127
22U_0805_6.3V6M
2
1

PC126
22U_0805_6.3V6M
2
1

PC125
22U_0805_6.3V6M
2
1

PC124
47U_0805_4V6M~D
2
1

PC123
22U_0805_6.3V6M
2
1

PC130
22U_0805_6.3V6M
2
1

PC122
22U_0805_6.3V6M
2
1

PC128
0.1U_0603_25V7K~D
2
1

1

PC121
47U_0805_4V6M~D
2
1

2
2

@ PR99
7.68K_0805_1%~D

GNDA_1.05VTT

PC129
22U_0805_6.3V6M
2
1

GNDA_1.05VTT

@
PC119
0.1U_0603_25V7K~D

PC120
22U_0805_6.3V6M
2
1

1

1
@ PR97
2

0_0402_5%~D
1

1.33K_0402_1%~D

PR98
2

PC113
0.1U_0603_25V7K~D
2
1

GNDA_1.05VTT

SN1003055RUWR_QFN17_3P5X3P5~D

C

@

PC112
0.1U_0603_25V7K~D
2
1

CPU_VTT_ON 42,56

GNDA_1.05VTT

GNDA_1.05VTT

D

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dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚ͗ϵ͘Ϯ
WĞĂĐŬĐƵƌƌĞŶƚ͗ϭϯ͘ϭ
KWͺD/E͗ϭϱ͘ϴ

10_0402_5%~D
2
1
PR100

PGND

IMON

PC111
10U_1206_25V6M~D
2
1

1
MODE

SS

PC110
10U_1206_25V6M~D
2
1

2

16

VOUT

7

PC118
2
1
PR96

2

PR130
2

FSET

+1.05VTT_VX

20K_0402_0.5%~D

6

EN

VFB

+5V_ALW

2

+1.05VTT_SS

2

1800P_0402_50V7K~D
PC117

COMP

1

5

@ PR91
0_0402_5%~D
1
2
13 +1.05VTT_EN
22.1K_0402_1%~D
1
12 +1.05VTT_FSET 2
@ PR92
11 +1.05VTT_MODE

@

2

14 +1.05VTT_PWRGD

PGND

+1.05VTT_SENSE

PGOOD

9

4

VBST

GND

SW

3

+1.05VTT_VFB

1

1

+1.05VTT_COMP

VCCA

0.01U_0402_25V7K~D

1

2K_0402_0.5%~D
1

3.09K_0402_5%~D

2

2

1

+1.05VTT_SENSE

PR93
2

0_0402_5%~D
PR94

1

PC116
680P_0402_50V7K~D
2
1

8

PC115 100P_0402_50V8J~D
2
1
PR90
5.6K_0402_5%~D
2
1

@
PC114
0.22U_0603_10V7K~D

PR89
3.3_0603_1%~D
1
2
15 +1.05VTT_BST

PR95
0_0402_5%~D

+3.3V_ALW

VIN

VIN

PU7

17

+1.05VTT_VX
GNDA_1.05VTT

1

PAD-OPEN 4x4m
PC109
10U_1206_25V6M~D
2
1

1

PC376
22U_0805_6.3V4Z~D
1
2

2

PC377
22U_0805_6.3V4Z~D
1
2

1U_0402_6.3V6K~D
D

C

PR101
2

1

PR102

+5V_RUN

+1.05VTT_SENSE

1

2

9.31K_0402_1%~D

VTT_SENSE

10

VTT_GND

10

0_0402_5%~D
+1.05VTT_PWRGD

1
@

2

PR103

1.05V_VTTPWRGD

43,56

0_0402_5%~D
PR104

PR118

2

1

GNDA_1.05VTT

13.3K_0402_1%~D

1

2

0_0402_5%~D

B

B

PJP25

PJP24
1

2

2

PAD-OPEN 43X118

1
PAD-OPEN1x1m

PJP26
+1.05VTTP

1

2

+1.05V_RUN_VTT

GNDA_1.05VTT

PAD-OPEN 43X118

A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

ISL95870A +1.05V_RUN_VTT
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.1

LA-6611P
Sheet
1

52

of

57

5

4

3

2

1

3
9

GND

DL

4

EP

LGATE3

4

MAX17491GTA+T_TQFN8_3X3~D

+1.05V_RUN_VTT
+GFX_POKB

2

3
2
1

1

PR127
165K_0402_1%
1
2

PR126
107K_0402_1%~D
1
2

1
2

PC135
4.7U_0805_25VAK
2
1

PC134
4.7U_0805_25VAK

BOST1

PC174
0.22U_0603_10V7K~D
1
2

4

@ PC176
1000P_0402_50V7K~D

1

1
1
2

PC172
4.7U_0805_25VAK
2
1

PC171
4.7U_0805_25VAK

1

1

PR170
1_0402_5%~D

2K_0402_0.5%~D
PR169

PR176
2
1
3.24K_0402_1%~D

@

2

@

3
2
1

1

PR171
0_0402_5%~D

@

+VCC_CORE

2

4

B

P1_SW

2

LGATE1

2

@

PC175
1500P_0603_50V7K~D

VIDSCLK

PC156
100U_25V_M_R0.7~D

PC166
0.22U_0402_16V7K~D
2
1

PL13
0.42UH_ETQP4LR42AFM_17A_20%~D
1
2

PR173
1_1206_5%
2
1

10

2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D

+Vcore_POKA

1

2

PC159
1500P_0603_50V7K~D
1
2
1

1

1000P_0402_50V7K~D

PC170
2200P_0402_50V7K~D
2
1

@
PR161
2.2_0603_5%~D
2
1 BT1_1

5

VIDALERT_N

PR145
1_0402_5%~D

+VCC_PWR_SRC

AON6704L_DFN8-5

@
2

IMVP_PGOOD

10

1
PR164
1
PR167
1
PR168

+VCC_CORE

+Vcore_CSNA

PQ14

PR166

0_0402_5%~D
1
2

2
PR165
1

10K_0402_1%~D
42

VIDSOUT

C

2
PC164
2

P1_SW
10

PC155
100U_25V_M_R0.7~D

PC154
100U_25V_M_R0.7~D

PC153
4.7U_0805_25VAK
2
1

1

PC151
2200P_0402_50V7K~D
2
1

PC148
0.1U_0603_25V7K~D
2
1

PC214
4.7U_0805_25VAK
2
1

5

AON6414AL 1N DFN

POKA

@
1

3
2
1

+3.3V_RUN

+
2

PR152
2
1
3.24K_0402_1%~D

1000P_0402_50V7K~D

UGATE1

1
130_0402_1%~D
1
130_0402_1%~D
1
54.9_0402_1%~D

2

1

@ PC162
1
2

GNDA_VCC
2
PR159
2
@ PR160
2
PR162

+PWR_SRC

+Vcore_CSPA2

+Vcore_POKA 19

CLK
18

PC173 0.1U_0402_25V6K~D
1
2

PR158 10_0402_5%~D

+

2K_0402_0.5%~D

@

GNDA_VCC

+Vcore_CLK

ALERT#

VDIO

VDDB
15

+Vcore_ALERT# 17

+GFX_DLB

+Vcore_VDIO 16

+GFX_DHB

54

DLB

+Vcore_VDD

54

14

DHB
13

LXB

BSTB

PC167
1000P_0402_50V7K~D

+GFX_LXB

2

1

PR144

PC276
4.7U_0805_25VAK
2
1

2

+GFX_BSTB

54

2

1

54
GNDA_VCC
7.5K_0402_1%~D
1+VGFX_FBB

21
20

@ PC161
1000P_0402_50V7K~D

AON6414AL 1N DFN

+VCC_GFXCORE

PR157
2

22

2

P2_SW

@

2

BSTA1

PC163
1000P_0402_50V7K~D

2

1

1
PR156 10_0402_5%~D
1
2

1

11 VCC_AXG_SENSE

2

@ PC165
1000P_0402_50V7K~D

B

+Vcore_VDD

23

+

PR148
1_1206_5%

POKB

+VGFX_GNDSB

AON6704L_DFN8-5

DHA1

11

PR153 10_0402_5%~D
1
2

PQ11

+Vcore_PWMA

CSNB

1000P_0402_50V7K~D
11 VSS_AXG_SENSE

24

1

3
2
1

+Vcore_SR

31
DRVPWMA
DLA1

PC205
2

1

5

+Vcore_THERMA

32
SR

CSPB1

12

GNDA_VCC

LGAT2

4

LXA1

54 +GFX_CSPB1

UGATE2
@

25

PJP27

PAD-OPEN 4x4m

PL12
0.42UH_ETQP4LR42AFM_17A_20%~D
1
2

5

9

+GFX_CSNB

10
10_0402_5%~D
2

PR141
PC157
2.2_0603_5%~D
0.22U_0603_10V7K~D
2
1 BT2_1
1
2

MAX17511GTL+T_TQFN40_5X5~D

GNDSB

VDDA

43P_0402_50V8J
54

PR149
1

4

PQ15

+VGFX_THERMB

33
THERMA

DLA2

26

PR135
105K_0402_1%~D
1
2

+Vcore_CSPAAVE

34
THERMB

FBB

27

P2_SW

@

3
2
1

6

+VGFX_GNDSB 7

@ PR146
0_0402_5%~D

2

PR125
1K_0402_5%~D
1
2

2
+VGFX_FBB

GNDA_VCC

2

BOST2

PR134
154K_0402_1%~D
1
2

+Vcore_CSPA1

35
CSPAAVE

LXA2

+Vcore_IMAXA

28

PR133
10K_0402_1%~D
1
2

+Vcore_CSNA

36
CSPA1

CSNA

VRHOT#

29

PH3
100K_0402_1%_TSM0B104F4251RZ~D
1
2

+Vcore_CSPA2

37

PH2
100K_0402_1%_TSM0B104F4251RZ~D
1
2

+Vcore_CSPA3

38

BSTA2

DHA2

8

PC269

IMAXA

FBA

+GFX_IMAXB

1

1

GNDA_VCC

GNDSA

30

+Vcore_CSNA

PQ13

1

PC146
0.22U_0402_16V7K~D
2
1

1

GNDA_VCC

PC160

+1.05V_RUN_VTT
7,43 H_PROCHOT#

1000P_0402_50V7K~D

+VCC_PWR_SRC

1

75_0402_5%~D
1
2

IMAXB

@

2

@ PR143

GNDA_VCC

2

1
2

10_0402_5%~D

5

TON

2

1
@ PR142

+Vcore_VRHOT#
PC158
1000P_0402_50V7K~D

@ PC144
1
2
PC145
2

@
1

1000P_0402_50V7K~D

2.2U_0603_10V7K~D

2

GNDA_VCC
3
8.45K_0402_1%~D
PR140
2
1 +Vcore_FBA 4

PR139 10_0402_5%~D
1
2

VCCSENSE

2

CSPA2

1
@

1000P_0402_50V7K~D
10

PC149
1000P_0402_50V7K~D

2

1

PC150

CSPA3

41

+Vcore_GNDSA

EN

VSSSENSE

C

VCC

PR138 10_0402_5%~D
1
2

TPAD

PU9
10

+Vcore_VCC

+VGFX_TONB

39

2
100K_0402_5%~D

PR120
2
1
3.24K_0402_1%~D

@

+Vcore_CSPA3

+GFX_IMAXB

10_0402_5%~D
2

PR137
1

@ PC140
1000P_0402_50V7K~D

PR113

+Vcore_IMAXA

2
0_0402_5%~D

+Vcore_EN

1
PR132

2
0_0402_5%~D

PR129

1
PR131

1

@

42 IMVP_VR_ON

PR124
5.62K_0402_1%~D
1
2

1

43 1.05V_0.8V_PWROK

+VCC_PWR_SRC

PR123
5.62K_0402_1%~D
1
2

PC143
2.2U_0603_10V7K~D
1
2

GNDA_VCC

40

PC142

10_0402_5%~D
2

PR122
1

@

@

12.7K_0402_1%~D
+Vcore_VCC

2.2U_0603_10V7K~D
2
1

PC277
@

1U_0603_10V6K~D
2
1

+5V_ALW

+Vcore_VDD

PR114
1_0402_5%~D

2K_0402_0.5%~D

@

2

PR115
@ PR121
0_0402_5%~D
1
2

1

P3_SW

D

2

12.7K_0402_1%~D
1

1

P2_SW

PR112
2

+VCC_CORE

P3_SW

PC169
0.1U_0603_25V7K~D
2
1

1

3.09K_0402_1%~D

@

PC152
4.7U_0805_25VAK

2

P3_SW

7

PC226
4.7U_0805_25VAK
2
1

2

LX

PL11
0.42UH_ETQP4LR42AFM_17A_20%~D
1
2

8

PC192
4.7U_0805_25VAK
2
1

1

10K_0402_1%_ERTJ0EG103FA~D

PWM

1

2

2
12.7K_0402_1%~D
1

DH

PR117
1_1206_5%

P1_SW

1

PR110
2

BST

SKIP

AON6704L_DFN8-5

2
PR111

VDD

3
2
1

5
6

PH1

Layout Note:
PC142 close to PIN19

4

5

PR109

PC137
0.22U_0603_10V7K~D
1
2

PU8

PC139
1500P_0603_50V7K~D
1
2
1

PC138
1U_0603_10V6K~D
2
1

2
1
5.9K_0402_1%~D

D

PR107
2.2_0603_5%~D
BOST3 2
1 BT3_1

2

0_0402_5%~D

PC133
2200P_0402_50V7K~D
2
1

+5V_ALW

PR330
1

PQ10

PC278
1
2
.1U_0402_16V7K~D

PC132
0.1U_0603_25V7K~D
2
1

UGATE3
0.01U_0402_25V7K~D

PC147
4.7U_0805_25VAK
2
1

@
2

AON6414AL 1N DFN

PQ9

5

PC281
1

PC168
4.7U_0805_25VAK
2
1

+VCC_PWR_SRC

@ PC177
1
2
+Vcore_CSPA1
GNDA_VCC

PC178
2

1000P_0402_50V7K~D

PQ9,PQ11,PQ13 PQ10,PQ14,PQ15

A

@
1

1000P_0402_50V7K~D
PC179
0.22U_0402_16V7K~D
2
1

A

PJP28
1

2

Main

X7629631L88

AON6414AL

AON6704L

2nd

X7629631L89

MDU2657RH

MDU2653RH

+Vcore_CSNA
GNDA_VCC

PAD-OPEN1x1m
GNDA_VCC

@
1

PC180
2

1000P_0402_50V7K~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Vcore
Size

4

3

2

Rev
0.1

DB-609
Date:

5

Document Number
Wednesday, January 26, 2011

Sheet
1

53

of

57

5

4

3

2

1

D

D

+VGFX_PWR_SRC
C

C

PJP29
1

2

+PWR_SRC

PC204
10U_1206_25VAK~D
2
1

2

1

PC196
10U_1206_25VAK~D
2
1

PC195
10U_1206_25VAK~D

PC194
2200P_0402_50V7K~D
2
1

5

PQ21

2

1

+
2

PC206
470U_D2_2VM_R4.5M~D

1

PC199
2200P_0402_50V7K~D
2
1

+
2

PC202
470U_D2_2VM_R4.5M~D

PC201

1

470U_D2_2VM_R4.5M~D

+VCC_GFXCORE
PC200
0.1U_0402_10V7K~D
2
1

3GP1_Vo

@

@

3
2
1

GP1_SW 2

PR193
2.2_1206_1%~D

4

2

1

PC203
4700P_0402_25V7K~D

PC198
470P_0603_50V8J~D
1
2
1

4

+GFX_DLB

PQ26
AON6704L_DFN8-5

@
53

3
2
1

AON6704L_DFN8-5

PQ25

5

PL15
0.36UH_FDUE1040J-H-R36M=P3_33A_20%~D
1
4

+GFX_LXB

5

53

@
4

3
2
1

PR189
PC197
2.2_0603_5%~D
0.22U_0603_10V7K~D
2
1 GBT1_1 1
2

53 +GFX_BSTB

PC193
0.1U_0603_25V7K~D
2
1

4

+GFX_DHB

AON6414AL_DFN8~D

@
53

3
2
1

AON6414AL_DFN8~D

PQ24

5

PAD-OPEN 4x4m

@

1
+
2

1.37K_0402_1%~D

@

PR190
B

53 +GFX_CSPB1

PC208
1

2

0.068U_0402_16V7K~D
2

PC282
1

PR191
0_0402_5%~D

1

2

B

PR192
2
1
0_0402_5%~D

2

0.33U_0402_10V6K

PQ21,PQ24

@ PR201
2
1
40.2K_0402_1%~D

PQ25,PQ26

PH4

Main

X7629631L88

AON6414AL

AON6704L

1

PR203
2

2

10K_0402_1%_ERTJ0EG103FA~D

2nd

X7629631L89

MDU2657RH

1

2.1K_0402_1%~D

MDU2653RH
53 +GFX_CSNB

GNDA_VCC

1

PC207
2

1000P_0402_50V7K~D
A

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

ISL95870A +1.05V_RUN_VTT

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.1

LA-6611P
5

4

3

2

Sheet
1

54

of

57

5

4

PR205
0.01_1206_1%~D

+SDC_IN

2

1

2

PR212
100K_0402_1%~D
2
1

PR211
100K_0402_1%~D
1

2

4

DOCK_DCIN_IS-

41

3

PC221
10U_1206_25V6M~D
2
1

Maximum charging current support 6A
Fsw=700kHz

3

3

0_0402_5%~D
1
2

41

G

PC213
0.1U_0603_25V7K~D
1
2

DOCK_DCIN_IS+

PQ30B
NTGD4161PT1G_TSOP6~D
D

@ PR208
10K_0402_5%~D
2
1

6

S

PR209

D

5

G

PC212
0.1U_0603_25V7K~D
1
2

PQ30A
NTGD4161PT1G_TSOP6~D

@

S
S

2
G
PQ29
NTR4502PT1G_SOT23-3~D

PQ28
NTR4502PT1G_SOT23-3~D
S

PC220
10U_1206_25V6M~D
2
1

PC209
47P_0402_50V8J~D
2
1

1
D
2
G

D

PC219
0.1U_0603_25V7K~D
2
1

PAD-OPEN 4x4m

PC218
2200P_0402_50V7K~D
2
1

2

D

CSSP_1

@

3

CSSN_1

2

PR207
0_0402_5%~D

1

2
1
0_0402_5%~D
PR210

2
1

CSS_GC

@

1

1

1

PC210
0.1U_0603_25V7K~D

1
57

CHAGER_SRC

4
@

4
2
PR206
0_0402_5%~D

+PWR_SRC
PJP33

D

57 DC_BLOCK_GC

1

PL16
FBMJ4516HS720NT_2P~D
2
1

1

SBR3A40SA-13_SMA2
PQ27
SI4835DDY-T1-E3_SO8~D
8
1
7
2
6
3
5

+DC_IN_SS

2

PC211
0.1U_0603_25V7K~D
2
1

@ PD14
2

3

@
PR216
0_0402_5%~D
1

2

DK_CSS_GC

57

GNDA_CHG

PL17
3.3UH_SPC-1040R-3R3 HF_7.5A_30%~D
2
1

E3 AC_OK=17.7 Volt
+SDC_IN

+VCHGR_phase

2

1

1
2

PC223
0.1U_0402_10V7K~D

ACAV_IN

5

PR231
1.8K_1206_5%~D
2
1
1
3

PC239
10U_1206_25V6M~D
2
1

PC238
10U_1206_25V6M~D
2
1

PC237
10U_1206_25V6M~D
2
1

PC236
0.1U_0603_25V7K~D
2
1

B

PC215
0.1U_0805_50V7M~D
1
2

22,43,57

+3.3V_ALW

PL_PHOT 2
1

LM393DR_SO8~D

8

PU12A
O

-

@

P

+

1

G

2

PR239
10K_0402_1%~D
2
1

PR238
100K_0402_1%~D
2
1

PR237
47K_0402_1%~D
2
1

PR235
232K_0402_1%~D
2
1

3

4

@

H_PROCHOT#
7,43

LM393DR_SO8~D

1
PR243
41.2K_0402_1%~D
2
1

4

PR336
0_0402_5%~D

+5V_ALW

PC243
100P_0402_50V8J~D
2
1

7

0_0402_5%~D
1
2

DYN_TUR_PWR_ALRT#

bq24765_REF
PR236
1M_0402_1%~D
1
2

2

ACAV_IN_NB

42,43,57

PR240
0_0402_5%~D
@

@

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.

2
G

Title
3

PQ38
RHU002N06_SOT323-3~D

57

@

PR242
42.2K_0402_1%~D
2
1

3
2
6

P

8
-

4

PC279
100P_0402_50V8J~D
2
1

6

O
G

ICREF

5
PU12B

2

PR241
22.6K_0402_1%~D
2
1

1

2
1

100P_0402_50V8J~D
PC244

2
1

PR474
10K_0402_1%~D

PR259
100K_0402_1%~D
2
1
PR260
42.2K_0402_1%~D
2
1

@ PR337
1

PQ58B

D

+5V_ALW

+

+CHGR_DC_IN

bq24765_REF

+5V_ALW
@

5

PR233
0_0402_5%~D
2
1

PR232
0_0402_5%~D
2
1

2
1

@
DCIN_A

@

1

GNDA_CHG

PQ58A

PR261
93.1K_0402_1%~D
1
2
1

PR213
2
1_0805_5%~D

+DC_IN

PR295
2M_0402_1%~D
1
2

DYN_TUR_CURRNT_SET#

bq24765_LDO

GNDA_CHG

2N7002DW-T/R7_SOT363-6~D

ICOUT

bq24765_REF

+VCHGR

chg_CE

2N7002DW-T/R7_SOT363-6~D

A

@
PQ34
RHU002N06_SOT323-3~D

10K_0402_1%~D
PR214

BQ24765RUVR_QFN34_7X3P5~D

1

PR230
100_0402_5%~D
1
2

2

@

S

ACAV_IN

+5V_ALW

2

VFB

43 CHARGER_SMBCLK

bq24765_REF

D

2
G

PL_PHOT

PR221
0_0402_5%~D

0.01U_0402_25V7K~D
PC245

>Žǁ

PC241
1
2

18

ACOK

43 CHARGER_SMBDAT

ϵϬt

PC240
0.1U_0603_25V7K~D
1
2

@

GNDA_CHG

GNDA_CHG

,ŝŐŚ

PR234
4.7_1206_5%~D

GNDA_CHG

+5V_ALW

ϲϱt

2
1

VFB

20
19

1

13

14

PR228

zEͺdhZͺhZZEdͺ^dη

2

PR332
10K_0402_1%~D

@ PC280
1U_0603_10V6K~D

21

AGND

FBO

PC217
0.1U_0603_25V7K~D
2
1

1

30

PHASE

PHASE

31

32

33

PGND

34

PGND

EAI

bq24765_REF

1
2
10K_0402_5%~D

3

0.1U_0603_25V7K~D

15.8K_0402_1%~D
PR222

GNDA_CHG

PGND

VFB

0_0402_5%~D

22

1

10K_0402_5%~D
PR215

12

CSON

EAO

2

2

chg_FBO

1
2 chg_EAO
PR225
7.5K_0402_5%~D

ACIN

CE

11

1

GNDA_CHG
2

1

2

PAD-OPEN1x1m

10

chg_EAI

CSOP

@ PR331
1

ICOUT

23

PC242
100P_0402_50V8J~D
2
1

1

chg_EAO

chg_EAI

ICOUT

ICREF

bq24765_LDO

24

PC230
1000P_0603_50V7K~D

PC222
1U_0603_10V6K~D
1
2

2

PJP34

PC228
120P_0402_50VNPO~D
1
2

2
1
PC225
2200P_0402_50V7K~D

chg_FBO

VREF

chg_CE

B

PR224
200K_0402_5%~D

9

PC234
1U_0603_10V6K~D
2
1

PC229
220P_0402_50V8J~D
2
1

22 BQ24765_IINP

2

PC227
56P_0402_50V8~D
1
2

PR226
4.7K_0402_5%~D
2
1

1

8

VDDP

DCIN_A

25

2

ICREF
bq24765_IINP

CSSP

27
26 BOOT

PD15
PR219
BAT54HT1G_SOD323-2~D
2.2_0603_1%~D
BOOT_D 1
1
2
2

1

GNDA_CHG

DCIN_A

28

PC224
0.1U_0603_25V7K~D

7

CSSN

VDDSMB

bq24765_REF

BOOT

17

6
0.01U_0402_25V7K~D

PHASE

DCIN_P

SCL

1

DCIN_P

29

bq24765_IINP

2

PHASE

16

4
5

DCIN_P

SDA

3

PC216

PHASE

VICM

2

PR218
49.9K_0402_1%~D
2
1

PGND

15

PR217
316K_0402_1%~D
1
2

TP

PU11

1

4

C

GNDA_CHG

35

+SDC_IN=19.5V-->ACIN=2.66V
ACIN>2.4V-->ACOK High

C

+VCHGR

PR227
0.01_1206_1%~D
+VCHGR_L

Charger

S
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

3

2

Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.1

LA-6611P
Sheet
1

55

of

57

5

4

3

2

1

+1.05V_RUN

2
+5V_RUN

PR249
@PR249
@
10K_0402_5%~D

PR244
100K_0402_5%~D
2
1

2
@

1

PR303
10_0402_1%~D
2
1

1

2

+5V_RUN

PC250
2.2U_0603_10V7K~D
1
2

PC252
1U_0603_10V6K~D

@

1

PR258
0_0402_5%~D

PR255
0_0402_5%~D

CPU_VTT_ON

43,52

42,52

PL18
0.42UH_ETQP4LR42AFM_17A_20%~D
2
1

7

MODE

TP

25

6

VOUT

COMP

VREF
2

3

GND
1

SLEW

VIN

PJP35

@ PR335
2

1

33K_0402_5%~D

PR250 @
100K_0402_5%~D
1

PR247
4.99K_0402_1%~D
PC262
0.01U_0402_25V7K~D
1
2

PC383
3300P_0402_50V7K~D

2

PR253
0_0402_5%~D
2
1

@

PR251
66.5K_0402_1%~D
2
1

PR267
1
100_0402_1%~D

+VCCSA_SENSE

11

+VCCSA_VID1
2

1

1

2

2

2

0.22U_0402_10V6K~D

B

2

1

PC251
2
1

@ PR252
7.5K_0402_1%~D

GNDA_VCCSA

PC259
22U_1206_6.3V6M~D
2
1

@

2

SW

24

@
PR248
@PR248
@
2.2_1206_1%~D

8

VIN

PC255
22U_1206_6.3V6M~D
2
1

SW

@ PC254
1000P_0603_50V7K~D

PC258
0.1U_0402_10V7K~D
2
1

9

C

+VCCSA_P
PC182
22U_0805_6.3V4Z~D
1
2

SW

PC181
22U_0805_6.3V4Z~D
1
2

1

10

PC260
22U_1206_6.3V6M~D
2
1

+VCCSA_PHASE

PC257
22U_1206_6.3V6M~D
2
1

11

PR245
PC253
2.2_0603_1%~D
2+VCCSA_BT_1 1
2

VIN

23
+VCCSA_PWR_SRC

+VCCSA_BT 1

1 2

TPS51461RGER_QFN24_4X4~D

1

12

PGND

22

4

10U_1206_25V6M~D
PC246

10U_1206_25V6M~D
PC247

0.1U_0603_25V7K~D
PC248
1
2

2200P_0402_50V7K~D
PC249

2

0.22U_0603_10V7K~D

SW

21

2

+VCCSA_PWR_SRC

1.05V_VTTPWRGD

PGND

5

+3.3V_ALW

1

2
PR254

PC256
2200P_0402_50V7K~D
2
1

EN
BST
SW

20

2

@
1

13

14

15
VID1

VID0

16

17
V5FILT

PGND

C

PAD-OPEN 43X118
2
1

11

@

1

+VCCSA_EN

PGOOD

18
V5DRV

19

2

H_VCCSA_VID0

0_0402_5%~D

PU13

1

1

PR300
1K_0402_5%~D

+VCCSA_VID0

2

VCCSAPWROK

+VCCSA_PWRGD

43

D

PR265
0_0402_5%~D

2

1

ϭ͘ϬϱsŽůƚнͬͲϱй
dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚ͗ϰ͘Ϯ
WĞĂĐŬĐƵƌƌĞŶƚ͗ϲ
KWͺD/E͗ϳ͘Ϯ

2

PR266
1K_0402_5%~D

de-pop for BGA1023 0.85V

de-pop for BGA1023 0.85V

+1.05V_RUN

2

PR264
0_0402_5%~D

output voltage adjustable network

D

PR334 @
0_0402_5%~D

1

1

2
@

11 H_VCCSA_VID1

PR333 @
0_0402_5%~D
2

1

@ PR263
10K_0402_5%~D

1

0.85V
1

1

2

+VCCSA_VID1

0.9V
VCCSA_VID_1
0

1

+GND_VCC_SA

11

PR256
0_0402_5%~D

B

GNDA_VCCSA

A

A

PJP37
2

1
PAD-OPEN1x1m

PJP38
+VCCSA_P

1

2

+VCC_SA

DELL CONFIDENTIAL/PROPRIETARY

GNDA_VCCSA

Compal Electronics, Inc.

PAD-OPEN 4x4m
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

ISL95870A 0.8V_VCC_SA
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.1

LA-6611P
Sheet
1

56

of

57

4

PR471
510K_0402_5%~D
2
1

@ PR473
1

1

2

PR472
1

PDS5100H-13_POWERDI5-3~D
PQ46
1
D
S
2
D
S
3
D
S
4
D
G

@
2

MODULE_BATT_PRES#

2

PR289
499K_0402_1%~D

1

1

2

@

@

42,47

PR301 @
0_0402_5%~D

ERC1

PR314
0_0402_5%~D

CD3301_SDC_IN

55 DC_BLOCK_GC

1
@

2

TP

PR321
0_0402_5%~D
@

5

PC272
1500P_0402_7K~D

4

ERC2

PC275
0.1U_0402_25V4Z~D
2
1

2

ERC3

1

1

41,43,47

27
26
25
24
23
22
21
20
19

@

1

SLICE_BAT_ON

2

PR311
PR313

+5V_ALW

2

0_0402_5%~D

PR309

0_0402_5%~D

1

P50ALW
PBATT_OFF
DK_AC_OFF_EN
ACAV_IN_NB
GND
DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS

CSS_GC
DK_CSS_GC

55
55

PC274
0.047U_0603_25V7K~D
2
1

DOCK_SMB_ALERT#

2
2

3

PC273
0.1U_0603_25V7K~D
2
1

1

FDN338P_NL_SOT23-3~D

1
@

CD_PBATT_OFF
@

2
@

DOCK_AC_OFF

41,42

0_0402_5%~D

DK_AC_OFF

1
1
@

2

3301_ACAV_IN_NB

0_0402_5%~D
1
@
PR317
BLKNG_MOSFET_GC

DK_AC_OFF_EN
SL_BAT_PRES#

PR316

1
@

PR320

1
@

2

ACAV_IN_NB

2

42,43,55
DOCK_AC_OFF_EC

2

1M_0402_5%~D
PR315
42

0_0402_5%~D

SLICE_BAT_PRES#

41,42,47

0_0402_5%~D
2

+NBDOCK_DC_IN_SS

PR322
0_0402_5%~D

CD3301RHHR_QFN36_6X6~D

10
11
12
13
14
15
16
17
18

PR319
0_0402_5%~D

3

1
PD28
2

2

DC_IN
SS_GC
ERC1
ACAVDK_SRC
GND
SDC_IN
DC_BLK_GC
ACAV_IN
P33ALW2

PQ57

2

SLICE_BAT_PRES#

1
@

37
+3.3V_ALW2

1

,42,47

ACAV_IN

1
2
3
4
5
6
7
ACAVIN
8
P33ALW2 9

PR318
0_0402_5%~D

RB751V-40_SOD323~D

1
PD29
2

A

RB751V-40_SOD323~D

22,43,55

1

2ACAVDK_SRC

2

P50ALW

36
35
34
33
32
31
30
29
28

100K_0402_5%~D

1
@

B

@ PR306
0_0402_5%~D

CHGVR_DCIN
DC_IN_SS
DK_PWRBAR

1

@

PR312
0_0402_5%~D
+SDC_IN

PC268
0.1U_0603_25V7K~D
2
1

42

DEFAULT_OVRDE

PR323
0_0402_5%~D

2

PU14

1
@

PC263
0.47U_0805_25V7K~D

C

0_0402_5%~D

NC
CHARGERVR_DCIN
DC_IN_SS
DK_PWRBAR
GND
NC
BLK_MOSFET_GC
DSCHRG_MOSFET_GC
PBatt+

PR310

PC267
2200P_0402_50V7K~D
2
1

PR292
499K_0402_1%~D
2
1

1

PC270
0.22U_0603_25V7K~D

PD23
RB751V-40_SOD323~D
2
1

PBATT+

PR305
0_0402_5%~D

47 SOFT_START_GC
2

41 ACAV_DOCK_SRC#

+PWR_SRC

100K_0402_5%~D
2

CSS_GC
DK_CSS_GC
ERC3
ERC2
GND
PWR_SRC
SS_DCBLK_GC
EN_DK_PWRBAR
P33ALW

1

+3.3V_ALW2

1

PBATT_IN_SS

2

0.1U_0603_50V4Z~D

2

1
3

0_0402_5%~D

2
0_0402_5%~D
2

PR302

1

CD3301_DCIN

2
47_0805_5%~D
PC271

2
1

2

1

@

55 +CHGR_DC_IN
1
PR307

@
PR269
0_0402_5%~D

2

1
@ PR299

+DOCK_PWR_BAR
+DC_IN_SS

+DC_IN

D

PD21
RB751V-40_SOD323~D
2
1

2

2

4
2
1
3

MPBATT+

FDS6679AZ_SO8~D

PD20

2

6

2
3

MODULE_ON
42

1
2
3
4

4

5

1

S
S
S
G

PR268
330K_0402_5%~D

PR275
499K_0402_1%~D
2
1

1
2

PD19
RB751V-40_SOD323~D
2
1

D
D
D
D

2

PBAT_PRES#

2

0_0402_5%~D

RB751V-40_SOD323~D
PD27

PD26
RB751V-40_SOD323~D
1
2

SLICE_BAT_PRES#

1

390K_0402_5%~D

1
PR291

2
1
6
PD25
RB751V-40_SOD323~D
1
2
1
1
2

41,42,47

@
PR287
51

8
7
6
5

+DOCK_PWR_BAR

PD18
RB751V-40_SOD323~D
2
1

1

PQ37

FDS6679AZ_SO8~D

1

1
6
3
2 4

42,47

@
B

@ PR298
0_0402_5%~D

@
PR296
0_0402_5%~D

1

PR288
499K_0402_1%~D
2
1

@

1
2
1

4
2
1

2

PR294
0_0402_5%~D

5

PQ51A
2N7002DW-T/R7_SOT363-6~D

1

42 DEFAULT_OVRDE

PD24
RB751V-40_SOD323~D
1
2

2
1

RB751V-40_SOD323~D

42 SLICE_BAT_ON

2N7002DW-T/R7_SOT363-6~D
PQ50B

@

PQ51B
2N7002DW-T/R7_SOT363-6~D

PR328
0_0402_5%~D

PBATT+

1

RB751V-40_SOD323~D
PD22

3

2

2

PR290
200K_0402_1%~D
6
2
1

2

2

2

FDS6679AZ_SO8~D

PC265
0.22U_0603_25V7K~D

PR272
620K_0402_5%~D
2
1
4
PR282
620K_0402_5%~D
2
1

2

4

PC266
0.1U_0603_25V7K~D
2
1

6

1
PR279
100K_0402_5%~D
1
2
1
PR286
10K_0402_5%~D

3
4

PD31
1

MPBATT_IN_SS

PD16
ES2AA_SMA2

PDS5100H-13_POWERDI5-3~D
PQ41
1
D
S
2
D
S
3
D
S
4
D
G

8
7
6
5

PR284
33_0603_5%~D
1
2

2N7002DW-T/R7_SOT363-6~D
PQ50A

RB751V-40_SOD323~D
CHARGE_EN

1
3

2

8
7
6
5

PQ49A

1

2

2N7002DW-T/R7_SOT363-6~D
PQ48B

2

@
PR285
0_0402_5%~D

PR280
20K_0402_1%~D
PQ48A
2N7002DW-T/R7_SOT363-6~D

PD30

5

PQ47B
2N7002DW-T/R7_SOT363-6~D

5

@

2N7002DW-T/R7_SOT363-6~D
PQ47A

2

PR293
0_0402_5%~D

1

PR274
33_0603_5%~D
1
2

PQ45
FDS6679AZ_SO8~D
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D

2N7002DW-T/R7_SOT363-6~D

PR297
20K_0402_1%~D

PQ49B

CHARGE_PBATT
1

PR283
330K_0402_5%~D

8
7
6
5

D
D
D
D

FDS6679AZ_SO8~D
PQ40

PBATT+

PQ44
SI4835DDY-T1-E3_SO8~D
1
8
2
7
3
6
5

2

2N7002DW-T/R7_SOT363-6~D

C

S
S
S
G

PR278
330K_0402_5%~D

+VCHGR

42

1
2
3
4

STSTART_DCBLOCK_GC

@

PR276
390K_0402_5%~D
2
1

2
6

2

PR277
0_0402_5%~D

5

PR281
390K_0402_5%~D
2
1

2

3

PR273
10K_0402_5%~D

1

4

PR271
390K_0402_5%~D
2
1

MPBATT+

PQ42A

CHARGE_MODULE_BATT
1

2N7002DW-T/R7_SOT363-6~D

42

1

PD17
2

PQ42B

D

2



2N7002DW-T/R7_SOT363-6~D

PC264
0.1U_0603_25V7K~D
2
1

+VCHGR
PR270
100K_0402_5%~D
1
2

3

PQ39
SI4835DDY-T1-E3_SO8~D
1
8
2
7
3
6
5

1

5

A

P33ALW

1
@

2

PR324

EN_DK_PWRBAR
@

1
PR325

+3.3V_ALW

0_0402_5%~D
2
0_0402_5%~D

EN_DOCK_PWR_BAR
1

42

DELL CONFIDENTIAL/PROPRIETARY

2

1M_0402_5%~D
@ PR326

STSTART_DCBLOCK_GC

Compal Electronics, Inc.
Title

3301_PWRSRC

1
@

2

+PWR_SRC

PR327
0_0402_5%~D

3

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2

Selector
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.1

LA-6611P
Sheet
1

57

of

57

5

4

3

2

1

9HUVLRQ&KDQJH/LVW 3,5/LVW
7LWOH

,WHP 3DJH
D

'DWH

5HTXHVW
2ZQHU

,VVXH'HVFULSWLRQ

6ROXWLRQ'HVFULSWLRQ

1

14

HW

7/13/2010

COMPAL

Modify TAA SPI ROM topology

Add R933 0 ohm & Remove SPI_HOLD#0 and SPI_WP#0 connect to JP1

X01

2

11,56

HW

7/22/2010

COMPAL

Modify net name

Change +0.8V_VCC_SA to +VCC_SA

X01

3

22,25,28
32,42,43
45,11,20
37,11,

4

14

HW

HW

7/22/2010

COMPAL

Follow PPM recommendation to change material

Change capacitors from 10uF_0805_10V_Y5V to
10uF_0805_6.3V_X5R:
C305,C316,C387,C1181, C705,C728,C760,C764,
C765,C768,C769,C772,CC135,CH58,CH73,CH80
Change capacitors from 10uF_0805_6.3V to 10uF_0603_6.3V:
C475,C638,C641,C643
Change resistors to 0402 size: RC134, RH201,RH253,RH208,RH213
Delete RH192 and add PJP52

7/22/2010

COMPAL

De-pop PCH XDP

De-pop RH36,RH283,RH21,RH24,CH1,CH6

A

X01

7/22/2010

COMPAL

Modify Module Bay circuit

7/22/2010

COMPAL

Follow Intel Design Guide Rev1.0

Change RH149 to 1k and RH150 to 4.7k

HW

7/22/2010

COMPAL

Change MAX8731_IINP connection

Change to VCP

X01

22

HW

7/22/2010

SMSC

Per SMSC request

Add

X01

9

26

HW

7/22/2010

COMPAL

For Safety request

Add D4 and

10

40

HW

7/22/2010

COMPAL

Change ESATA repeater

Add R1585~R1588, and change U44 to MAX4951BECTP

X01

11

30

HW

7/22/2010

COMPAL

Change codec to ZB version

Change Codec part number to

X01

12

34

HW

7/22/2010

COMPAL

Change RFID capacitors for more popular

Change C502,C505 from 1uF to 0.1uF

X01

13

24,46

HW

7/22/2010

COMPAL

Correct net name for LED signal

Modify signal name BREATH_BLUE_LED to BREATH_WHITE_LED and
BREATH_BLUE_LED_SNIFF to BREATH_WHITE_LED_SNIFF

X01

14

42

HW

7/22/2010

COMPAL

Add 0 ohm resistor for SUSACK#

Add R1132 and add net name SUSACK#_EC

X01

15

32

HW

7/22/2010

INTEL

Remove useless resistors

Remove R556, R558, R559, R560 and short it.

X01

16

32,28,29
38,45

HW

7/22/2010

COMPAL

Change part for Halogen free

Change Q18,Q27,Q30,Q34,Q38,Q40,Q42,Q49,Q54,Q58 to HF part

X01

17

10

HW

7/22/2010

COMPAL

CC129~CC134 D2T LESR5M EOL

Change CC129~CC134 to SGA00004X0L

X01

18

37

HW

7/22/2010

COMPAL

Modify Module Bay circuit

19

7

HW

7/22/2010

COMPAL

For support XDP device

De-pop RC9

X01

20

42

HW

7/22/2010

COMPAL

Base on GPIO map to modify

Change SLICE_BAT_PRES# pull up power rail from +3.3V_ALW2 to +3.3V_ALW

X01

5

14,29,43

6

18

7

22

8

HW
HW

D

X01

Change net name ODD_DET# to PCH_SATA_MOD_EN#, r and USB_MCARD3_DET#
to remove R1069,R1182,R1188,R425, Add R513,Q76,Q123B, change BAY
SM bus PU rail to +3.3V_ALW

C

B

5HY

X01
C

X01

R404 10K pull down of TEST1 pin
R5 co-lay with F2,

X01

SA00003ZZ1L and stuff C962

De-pop C627,R712

B

X01

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

EE P.I.R 1
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

58

of

64

5

4

3

2

1

9HUVLRQ&KDQJH/LVW 3,5/LVW
7LWOH

,WHP 3DJH
D

'DWH

5HTXHVW
2ZQHU

,VVXH'HVFULSWLRQ

5HY

6ROXWLRQ'HVFULSWLRQ

21

43

HW

7/22/2010

COMPAL

Base on GPIO map to modify

Add R889 for CPU1.5V_S3_GATE pull down

X01

22

15,18

HW

7/22/2010

COMPAL

Base on GPIO map to modify

Remove RH238,RH172 and change connection form
SLP_ME_CSW_DEV# from GPIO45 to GPIO28

X01

23

24

HW

7/22/2010

COMPAL

PWM function

Remove R1139,R1140 and add D68,D69, pop R1137

X01

24

37,46

HW

7/22/2010

COMPAL

Modify LED circuit

Remove R1578,R1579,R1580,D42,D60,D61, add Q77,Q124,R705,R718,R719

X01

25

15,32

HW

7/22/2010

COMPAL

EOL concern

Change Y3 and YH2 from 1Y725000CE1A to 7A25000110

X01

26

24,27,46

HW

7/22/2010

COMPAL

Change part for Halogen free part

Change QC5 to NTR4501NT1G, U21,U24,U54,U55,U57
change to NC7SZ04P5X-G, Q21 change to FDC654P-G

X01

27

36

HW

7/22/2010

O2-Mirco

Add discharge circuit for +3.3V_RUN_CARD

Add R826 on +3.3V_RUN_CARD

X01

28

31,42,46

HW

7/22/2010

COMPAL

Remove mute function and LED

Remove R1109,Q119,Q105,Q102,R1059,R1061

HW

7/22/2010

COMPAL

29

17,18,43

To solve back drive issue

Remove USB_OC7# signal and RH254, change connection from PCH GPIO1 to
GPIO14,and change RH164 pull up power rail from +3.3V_RUN to
+3.3V_ALW_PCH

X01

D

C

B

A

C

HW

7/22/2010

COMPAL

X01

30

18

HW

7/22/2010

COMPAL

Add pull up for PCH GPIO1

Change RH254 to 10K and pull high to +3.3V_RUN

X01

31

29,45

HW

7/22/2010

COMPAL

For cost saving

Add PJP63,RH202, no stuff QH4,Q49,RH278,R908

X01

32

42

HW

7/22/2010

COMPAL

Follow GPIO 0720

Add DYN_TUR_PWR_ALRT# up power rail and change R796 pull from
+3.3V_RUN to +3.3V_ALW

X01

33

43

HW

7/22/2010

COMPAL

Follow GPIO 0720

Add DYN_TUR_CURRNT_SET# up power rail and change R837 pull from
+3.3V_RUN to +3.3V_ALW

X01

34

28,46

HW

7/22/2010

COMPAL

Part leverage select

Change D16,D59,D62 to SC100000S0L

X01

35

14

HW

7/22/2010

COMPAL

Follow Intel XDP design guide

Change RH43,RH44,RH45 to 200 ohm

X01

36

24,40

HW

7/22/2010

INTEL

Change material for small size

Change C300,C669 from 1206 16V to 0805 10V

X01

37

39,40

HW

7/22/2010

COMPAL

Remove useless capacitors

Remove C1151~C1154

X01

38

37

HW

7/22/2010

COMPAL

Add 0 ohm R on PCIE_MCARD2_DET#

Add R725

X01

39

43

HW

7/22/2010

COMPAL

Follow GPIO MAP 0720

Add R1578 for XFR.

X01

40

42

HW

7/22/2010

COMPAL

Add 0 ohm for TEMP_ALERT#

Add R773

X01

41

44

HW

7/22/2010

COMPAL

Solution +1.5V_RUN voltage drop issue

Change Q59 from SI3456BDV to NTGS4141NT1G

X01

42

46

HW

7/27/2010

COMPAL

Add pull down 100k on BT_ACTIVE

Add R959

B

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

EE P.I.R 2
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

59

of

64

5

4

3

2

1

9HUVLRQ&KDQJH/LVW 3,5/LVW
7LWOH

,WHP 3DJH
D

'DWH

5HTXHVW
2ZQHU

,VVXH'HVFULSWLRQ

5HY

6ROXWLRQ'HVFULSWLRQ

44

40

HW

7/27/2010

COMPAL

Follow Vender request.

R1589~R1592

X01

45

43

HW

7/27/2010

COMPAL

BID change

Change R875 to 130K

X01

45

22

HW

7/27/2010

COMPAL

Chnage thermal diode connection

Remove C268

X01

46

18,30

HW

7/28/2010

COMPAL

Remove SPEAKER_DET# PAID.

Chnage SPEAKER_DET# to GPIO17, and change speaker
connector to SP02000H900

X01

47

14,47

HW

7/28/2010

COMPAL

Remove RTC_DET# PAID.

Remove RH31, add T132

X01

48

22

HW

7/28/2010

COMPAL

Follow connector list

change FAN connector to SP02000TI00

X01

49

33

HW

7/28/2010

COMPAL

Follow connector list

Re-link RJ45 symbol

50

44

HW

7/28/2010

COMPAL

Follow connector list

Chnage keyboard connector to pitch 1

X01

51

34

HW

7/28/2010

COMPAL

Remove Broadcom debug connector

Remove JBRCM1 and add

X01

52

47

HW

7/28/2010

COMPAL

Change RTC connector

Change to TYCO_2-1775293-2

X01

53

43

HW

08/05/2010

COMPAL

Change signal net name

Change 0.8V_VCCPWROK net name to VCCSAPWROK

X01

54

30

HW

08/13/2010

COMPAL

Fix Speaker EMI issue

Change R1183~R1186 to L78~L81 pop C973~C976,C267,C283 and C284

X01

55

39,40

HW

08/13/2010

COMPAL

Fix USB EMI issue

pop L50,L52,depop R737,R739,R734,R735

X01

56

29

HW

08/13/2010

COMPAL

Change ODD repeater

Chnage ODD repesater to MAX4951B and R1174,R1176,R1169,R1171 to 0 ohm

X01

57

43

HW

08/13/2010

COMPAL

EOL concern

Change Y6 to SJ132P7KW1L same as YH1

X01

58

22

HW

08/13/2010

COMPAL

Change FAN conn type for ME request

change FAN connector to SP02000CB0L

X01

59

14

HW

08/13/2010

COMPAL

Change TAA topology

redefine JP1 TAA pin define

X01

60

10

HW

08/16/2010

COMPAL

D

C

B

C

R666 no stuff

remove CC199,CC103,CC120,CC142,CC141,CC171,CC139,CC134,CC133,CC200
CC101,CC128,CC153,CC102,CC126,CC105 16pcs
depop 4 pcs CC152,CC121,CC127 and CC160

Follow PPDG1.2 Vcore 2.2uf 0402
QTY from 55 to 35 pcs

A

X01

X01

61

18

HW

08/16/2010

COMPAL

Follow INTEL DG DF_TVS pull high value

Change RH150 to 0 ohm RH149 to 2.2K ohm

X01

62

14 15 43

HW

08/16/2010

COMPAL

Crystal EA

Change C743=39pF CH2,CH3=15pF CH18,CH19=10pF and YH2 to SJ100008E0L

X01

63

22

HW

08/17/2010

COMPAL

reserve cap for CPU remote

Add C286

X01

64

14

HW

08/17/2010

COMPAL

reserve Resistance and Cap for SPI EA

diode

Add CH107,CH108,R935

B

A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

EE P.I.R 3
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

60

of

64

5

4

3

2

1

9HUVLRQ&KDQJH/LVW 3,5/LVW
7LWOH

,WHP 3DJH
D

C

B

'DWH

5HTXHVW
2ZQHU

65

34

HW

8/20/2010

COMPAL

66

14

HW

8/23/2010

COMPAL

67

30

HW

8/23/2010

68

42

HW

69

14

70

6ROXWLRQ'HVFULSWLRQ

,VVXH'HVFULSWLRQ
BRCM request RFID filter need have 400mA max

5HY

Change L39 and L40 to SHI0000CH0L.Reserve L45,L46 colay

X01

Improve SPI EA for SPI_CLK

Change R899 and R897 to 56 ohm

X01

COMPAL

Follow connector list

Change Speaker CONN to SP021007221

X01

8/24/2010

COMPAL

RF noise

pop R794 R795 to 10 ohm,C712 C713 to 10p

X01

HW

8/25/2010

COMPAL

Improve SPI power path

Always pop C745

X01

36

HW

8/25/2010

COMPAL

O2 recommend add cap for

add C559 0.1uF C560 0.01uF

X01

71

14 18

HW

8/26/2010

COMPAL

Follow INTEL DPDG

reserve RH31,RH355 for GPIO19/GPIO28

X01

72

14

HW

8/27/2010

COMPAL

remove double reserve cap for BIT_CLK

remove CH100

X01

73

16

HW

8/27/2010

COMPAL

reserve ME_SUS_PWR_ACK pull down

reserve RH145

X01

74

26

HW

8/27/2010

COMPAL

75

11

HW

8/30/2010

COMPAL

76

37

HW

9/1/2010

77

24

HW

78

24

79

14,18

+PE_VDDH

Follow INTEL HDMI DG

remove R1164,R458,R1128-->20K add R1593 depop D65

X01

Change QC5 VGS to 20V part

Change QC5 to SB00000HK0L

X01

COMPAL

Depop SIM card ESD diode

Depop U40

X01

10/6/2010

COMPAL

Change RB751V to HF part

Change D63,D64,D68,D69 to SCS00004L0L

X02

HW

10/6/2010

COMPAL

AUO panel can't adjust brightness

Change R1137 from 100k to 10k

X02

HW

10/6/2010

Intel

Follow DG1.5 and schematic check list rev1

Add RH41,depop RC96 and RC97,change RH177 to 10K

X02

To solve pop noise and detect issue

Add U6,Q33,Q46,D70,D71,R425,R33,R38,R430,R352,R1088,C967,C307,C308,R161
add U15, C478 change TP_DET# netname to WLAN_LAN_DISB#
JTP1 pin1 change to GND

X02

80

30,31

HW

10/6/2010

81

32,42

HW

10/11/2010

COMPAL

LOM Cable Detect

82

42

HW

10/11/2010

COMPAL

Change Board ID to X02

Change R875 to 62K

X02

83

17

HW

10/11/2010

Intel

Follow Intel check list rev1.2

Add @RH332

X02

84

46

HW

10/11/2010

COMPAL

LED brightness test result

Change R957 to 560,R941,R939,R934 to 4.7k,R955,R949 to 2K

X02

85

24, 30

HW

10/19/2010

EMI issue for PWM and DMIC_CLK

Add L83,change R1582 to L82

X02

86

30

HW

10/19/2010

COMPAL

Change Codec rev to YA

Change U72 to SA00003ZZ2L

X02

87

32

HW

10/19/2010

COMPAL

Change LAN stepping to C0

Change U31 to SA00003SI2L

X02

88

39,40

HW

10/19/2010

ESD

PT ESD test result

Change U91,U92 to D72,D73. Pop D73

X02

IDT

EMI

function

D

C

B

X02

A

A

89

24

HW

10/19/2010

Compal

PT ESD test result

remove D7,D8,DE1~DE4

X02

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

EE P.I.R 4
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

61

of

64

5

4

3

2

1

9HUVLRQ&KDQJH/LVW 3,5/LVW
7LWOH

,WHP 3DJH
D

C

B

A

'DWH

5HTXHVW
2ZQHU

6ROXWLRQ'HVFULSWLRQ

,VVXH'HVFULSWLRQ

5HY

90

32

HW

10/19/2010

COMPAL

IEEE test result

Change L30~L37 to 12nH

X02

91

28

HW

10/19/2010

COMPAL

Support SSD hard drive

Add PJP64,C399,C402

X02

92

31,43

HW

10/19/2010

COMPAL

Non-support Latitude on

depop SW2,C740,R877

X02

93

22

HW

10/19/2010

COMPAL

Change OTP set to 91 degree

Change R406 to 1.15k

X02

94

26

HW

10/20/2010

COMPAL

HDMI SDVO CTRL PU same as 14"

del D65,R1593

X02

95

30,42

HW

10/20/2010

COMPAL

GPIO map change AUD_NB_MUTE to AUD_NB_MUTE#

change AUD_NB_MUTE to AUD_NB_MUTE#

X02

96

14

HW

10/26/2010

COMPAL

Follow Intel CRB FAB2 PCH XDP schematic

Add @RH284

X02

97

41

HW

11/1/2010

COMPAL

EMI dock clk issue

pop R756=33ohm C704=12pf

X02

98

18

HW

11/1/2010

COMPAL

Follow schmaitc check list

depop RH174 RH175

X02

99

14

HW

11/8/2010

COMPAL

For easy control TAA/nonTAA BOM

Add R936 colay R895,R944 colay R897,R943 colay R900

X02

100

15

HW

11/8/2010

COMPAL

DF416400 AMT_Run MEflow Stress test fai

depop RH296 RH297,pop QH5 RH302,RH303

101

25

HW

11/10/2010

COMPAL

Pericom VGA SW

Change C321,C318 from 0.1uF to 0.01uF(pin4,pin23)

X02

102

6-11,14-21

HW

11/10/2010

COMPAL

Change CPU PCH PN to QS sample

Change UH4 PN to SA00004IW1L ,U1 PN to SA00004EL1L

X02

103

46

HW

11/10/2010

ME

Change KB screw hole

Change H12 H13 from 2.3 to 2.6

X02

104

22

HW

11/10/2010

COMPAL

Thermal request change OTP set to 94 degree

Change R406 to 1.4k

X02

105

28

HW

11/18/2010

COMPAL

Follow Intel CRB SMBUS PU value

Change R501 R502 from 2.2k to 10k

X02

106

28,45

HW

11/19/2010

COMPAL

For cost saving(+5V_HDD / +3.3V_ALW_PCH)

De-pop R499,R500,C393,Q28,R905,R907,C762,Q51

X02

107

17,39

HW

12/23/2010

COMPAL

SW WHQL request USB debug need USB port1

Change USB port0 to port1

A00

108

43

HW

12/27/2010

COMPAL

Change Board ID to A00

Change R875 to 33k

A00

109

43

HW

12/27/2010

COMPAL

To solve backdrive issue

Pop Q45

A00

200

34-35

HW

12/27/2010

COMPAL

Change USH chip to CID7

Change U33 to SA00003AO2L

A00

201

30-31

HW

1/3/2011

COMPAL

remove MIC external detect

del U6,Q33,Q46,D70,D71,R425,R33,R38,R430,R352,R1088,C967,C307,C308,R161

A00

202

14

HW

1/5/2011

COMPAL

For cost saving

De-pop RH47,RH48,RH49,RH288

A00

203

22

HW

1/18/2011

COMPAL

Same as 14

Change R385 to 10K

A00

204

44

HW

1/21/2011

COMPAL

high EOS failure rate

D

C

X02

DF445509:TP will malfunction intermittently. Change R902 to 2.2K

B

A

A00

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5

4

3

2

EE P.I.R 5
Size

Document Number

Date:

Wednesday, January 26, 2011

Rev
0.3

LA-6611P
Sheet
1

62

of

64

5

4

3

2

1

9HUVLRQ&KDQJH/LVW 3,5/LVW
,WHP 3DJH
1

47

7LWOH

'DWH

5HTXHVW
2ZQHU

+DCIN

7/15

Compal

,VVXH'HVFULSWLRQ
System can't recognize battery issue

D

C

B

2

47

+DCIN

7/15

3

55

Charger

7/15

4

47

+DCIN

5

48

6

Change PR77 pin2 connection from BAY_SMBCLK to BAY_SMBDAT

Compal

System can't recognize battery issue

Change PU11 pin 15 connection from CHARGER_SMBCLK to CHARGER_SMBDAT
Change PU11 pin 16 connection from CHARGER_SMBDAT to CHARGER_SMBCLK

8/4

Compal

Follow Macallan 14
for new battery cell

Change PL1 from SM01002078L to SM010009C8L and add PL20
Change PL19 from SM01002078L to SM010009C8L

3/5V

8/4

Compal

Follow Macallan 14

Change PC24 from 4.7u/6.3V/0805 (SE093475K8L) to 4.7u/6.3V/0603
(SE107475K8L)

47

+DCIN

8/4

Compal

RTC remove detect function
(7/29 EE mail)

Delete JRTC1 pin2 RTC_DET# connection

7

56

+VCC_SA

8/4

Compal

Follow Macallan 14
VCCSA not fix at 0.8V. change net name
from +0.8V_VCC_SA to +VCC_SA

Change +0.8V_VCC net name to +VCCSA_P
Change 0.8V_VCCPWROK net name to VCCSAPWROK

8

55

Charger

8/4

Compal

Follow Macallan 14

Depop PD14 SBR3A40SA (SC100003J00)

9

57

Selector

8/4

Compal

Follow Macallan 14
Leakage issue on PD16

Change PD16 from SBR3A40SA (SC100003J00) to ES2AA (SC100005A0L)

10

55

11

56

Charger

VCCSA

12

53,54

Vcore, VGFX

13

53,54

Vcore, VGFX

53,54

Vcore, VGFX

15

56

VCCSA

16

56

VCCSA

17

55

Charger

8/4

8/18

8/18

8/18

8/18

8/23
8/23
8/24

Compal

Compal

Intel

Follow Macallan 14
Add adapter protection circuit
for turbo mode

Add
Add
Add
Add
Add

Change VID setting

Maxim

Reserve 0402 cap pad for transient
fine tune

Add PC281 and PC282 0402 cap location

Maxim

change setting for Pass2 sample

TI
TI
Dell

C

Change
Change
Change
Change
Change
Change
de-pop
Change

PR330
PR127
PR135
PR157
PR190
PR192
PR201
PR110

from
from
from
from
from
from

B

2_ohm to 0_ohm
150K_ohm to 165K_ohm
100K_ohm to 105K_ohm
8.66K_ohm to 10.2K_ohm
1.43K_ohm to 1.37K_ohm
2_ohm to 0_ohm

PR112 PR115 from 12.7K_ohm to 13.3K_ohm

Change PQ9 PQ10 PQ11 to prevent COS issue

Change PQ9 form CSD86350Q5D to PQ9 AON6414AL + PQ10 AON6704L
Change PQ10 form CSD86350Q5D to PQ11 AON6414AL + PQ15 AON6704L
Change PQ11 form CSD86350Q5D to PQ3 AON6414AL + PQ14 AON6704L

Change Thermal pad to PGND

Change PU13 pin 25 from GNDA_VCCSA to PGND

For batter output voltage accuracy

Add PC383 from PR247 pin2 to PU13 pin2

Add turbo mode adapter protection by
H_PROCHOT#

D

PU11 pin8 connection ICREF
PU11 pin23 connection ICOUT
PR259,PR260,PR261,PR295, PR331,PR332
PC279,PC280
PQ38

Intel change BGA1023 VID table
VID0 0 VID1 1 voltage from 0.8V to 0.85V

Compal

5HY

Change PBATT2 Pin2 connection from Z4304 to Z5304
Change PBATT2 Pin2 connection from Z4305 to Z5305
Change PBATT2 Pin2 connection from Z4306 to Z5306

System can't recognize battery issue

14

A

6ROXWLRQ'HVFULSWLRQ

A

Add PR336 PR337 for pop opton to select H_PROCHOT# or DYN_TUR_PWR_ALRT#

Title

Size
C
Date:
5

4

3

2

Document Number
<Doc>

Rev
0.3

Wednesday, January 26, 2011
1

Sheet

63

of

64

5

4

3

2

1

9HUVLRQ&KDQJH/LVW 3,5/LVW
,WHP 3DJH
18

50

D

7LWOH
+0.75_DDR_VT/
+1.8V_RUN

'DWH
8/26

5HTXHVW
2ZQHU
TI

,VVXH'HVFULSWLRQ
for more phase margin

5HY

Change PC71 from 1800pF to 18nF
D

19

47

+DCIN

9/1

Dell

reduce leakage current

20

56

VCCSA

9/1

Intel

Intel update VCCSA voltage change only
for UL ULV type. our project is SV type
hence keep no change

de-pop PR250 PR251 PR252 PR333 PR334 PR335
pop PR264 PR265 PR266 PR300

21

51

1.05V_M

10/20

Compal

22u/1206/6.3V COS issue

Change PC98~PC105 from 22u/1206 (SE077226M8L) to 22u/0805 (SE00000110L)

22

52

1.05V_RUN_VTT

10/20

Compal

22u/1206/6.3V COS issue

23

51

1.05V_M

10/20

TI

TI IC OCP setting value change (as PT memo)

Change PR2 PR108 from 10K_ohm to 100K_ohm

Change PC120~PC127 PC129 PC130 from 22u/1206 (SE077226M8L)
to 22u/0805 (SE00000110L)
Change PR83 from SD03457628L 57.6K_ohm 0402 to SD03410028L 10K_ohm 0402

24

53

Vcore

11/05

Maxim

Initial voltage accurate

PR110 PR112 PR115 change from 13.3K_ohm to 12.7K_ohm
PR109 change from 6.49K_ohm to 5.9K_ohm

25

53

Vcore

11/05

Maxim

Load line modify
Transient compensation

PR140 change from 9.76K_ohm to 8.45K_ohm
PC281 pop 10n

26

53,54

Vcore,VGFX

11/05

Maxim

Load line modify
Transient compensation

PR157 change form 10.2K_ohm to 7.5K_ohm
PC282 pop 68nF

27

57

Selector

11/10

Compal

28

55

Charger

11/10

Compal

C

B

6ROXWLRQ'HVFULSWLRQ

29

55

Charger

11/10

Compal

Fine tune main and media battery
switching to slice battery transient
time (follow 14")

C

Change PC270 and PC265 from 1uF (SE00000698L) to 0.22uF (SE000005Z8L)

Change PR295 from 1.87M (SD00000WN0L) to 649K (SD03464938L)
Change adapter protection circuit
Change PR261 from 73.2K (SD00000B18L) to 95.3k (SD03495328L)
trip point. (Adapter rated current + 0.75A)
(follow 14")

Change adapter protection event
to HW from SW

B

Pop PR336
De-pop PR332 PR337

A

A

Title
<Title>
Size
C
Date:
5

4

3

2

Document Number
<Doc>

Rev
0.3

Wednesday, January 26, 2011
1

Sheet

64

of

64

www.s-manuals.com

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