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User Manual: Motherboard Compal LA-733 N32N Hurricane 1.6 - Schematics. Free.

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A

B

C

D

E

1

1

2

2

Hurricane 1.6

N32N LA-733 REV. 4A SCHEMATIC DOCUMENT
uPGA2 COPPERMINE with Geyserville

3

3

4

4

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

1

of

47

A

B

Compal confidential
Model Name : N32N
Board Name : LA-733
HP Model Name : Hurricane 1.6

C

Revision History
Date:06/28/2000
Date:12/20/2000
Date:02/02/2001
Date:03/05/2001

Rev#:
Rev#:
Rev#:
Rev#:

D

E

2.0 description: MP-test for H1.5
3.0 description: C1-test for H1.6
4.0 description: C2-test for H1.6
4A description: C3-test for H1.6

1

1

SPR CONN.

Gerserville
Tech.

page 33

page 6

Coppermine (uPGA2) CPU
HCLK_CPU

page 3,4,5
HA#(3..31)

Y1

HD#(0..63)

14.318MHZ

Clock
Generator
Buffer

PCLK_MTXC

CRT CONN.
2

page 24

440ZXM

14M_3V

MD(0..63)

Dot-Matrix, Button
Board, FDD,
Touch-PAD
CONN.page 32

3

14M_5V
PCLK_DOCK
PCLK_PCM

+3V
+3VS

2

AD(0..31)
CLK_SDRAM(0..3)

144Pin S.O.Dimm
Socket
page 11,12

CardBus
TI1420 Solt1/2

ESS
ES1988

page 15,16

page 31

page 10

DCLKO

AGP Bus

page 23

Mini PCI
Socket

DCLKWR

page 7,8,9

14M_3V

MA(0..13)

VGA Board
CONN.

HCLK_CPU

IDE (HDD/CR-ROM)

PCLK_PIIX4
+3V

PCI BUS
Audio CD-DJ
OZ163

PIIX4M

page 20

page 21,22

CLK_48MHZ
14M_3V

page 13,14

page 17

page 28

EQ &
Speaker AMP.

3

+3V / +3VS
(5VS Tolerant)

USB Port 0
and Port 1

SA(0..15)
SD(0..15)

PCLK_SIO

ISA BUS
page 18,19

Super IO
37N869
page 27

PIO

14M_5V

RESET CKT
page 32

page 28

FIR

FDD

SMBus
page 25

SUS_ON

page 34

4

page 28

KBD

page 26

page 29

PS/2

page 29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Power CKT DC/DC MAX1632
MAX1711

SM Bus

Battery Charge

Title

B
Date:
D

Compal Electronics, inc.
SCHEMATIC, M/B LA-733

Size

page 35
C

4

page 34,36,37,38

page 29

BIOS

A

page 39

page 30

page 25,26

Touch Pad
CONN.

SIO

page 28

Screw Hole

DC-DC
Interface & RTC

KeyBoard
87570

Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

2

of

47

HCLK

AA10
AC9
A6

INIT#
FLUSH#
RESET#

AA18
AB21
Y20

PICCLK
PICD0
PICD1

COPPERMINE SOCKET

V20
T21
U21
R21
V18
P21
P20
U19

AA3
T1

PC Compatibility Signals

Debug & Test Signals

Thermal Diode

Error Signals
APIC

2
21
C360
15PF

T4
U4
C6
R1

TESTHI

2

TESTLO1

2

TESTLO2

1K
R89

1

CPURST#

2

1

+3V

R248

1

1

2

R95
1K

56.2_1%

2
10K

C281
.1UF
U25

Change
value. by
Charles at
6/22

SMC 5,20,25,26,32,33,38
SMD 5,20,25,26,32,33,38
ATF# 26

NE1617DS

Change
value. by
Charles at
6/22

1

2

16
15
14
13
12
11
10
9
R255
1K

+VCPU_IO
R275
1

R262
10K

+3V

1
+VCPU_IO
1

RP25
1
2
3
4

8
7
6
5

TDI

2

TDO

@1K
R82

2

TCK

@1K
R273

2

TMS

2

TRST#

1K

PREQ#
IERR#
FLUSH#
SLP#

RP2
5
6
7
8

8P4R-1.5K

4
3
2
1

TCK
TDI
TMS

8P4R-1K

Signal name

+3VS

GT_A20M#

2

@150
1 R80
@150
R277
1

2

THERMDC

NC
STBY
SMBCLK
NC
SMBDATA
ALERT
ADD0
NC

1

C279
2200PF
R256
1
+3V
1K

NC
VCC
DXP
DXN
NC
ADD1
GND
GND

2

1
2
3
4
5
6
7
8

2

THERMDA

BNR# 7
BPRI# 7
BREQ0# 7
HLOCK# 7

R85
1.5K

6

GT_IGNNE#
6
PWRGD_CPU 6
GT_SMI# 6
TCK
TDO
TDI
TMS
TRST#
PREQ#

1
+VCPU_IO

1.5K
R92

+VCPU_IO

FERR_CPU#
R282
33

1

BNR#
BPRI#
BREQ0#
LOCK#

THERMDC
THERMDA

7 DEFER#
7 HIT#
7 HITM#

IERR#

2

DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#

DBSY#
DRDY#

Arbitration Phase Signals

+VCPU_IO
R77
1

HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63

1

AD20
H4
AA17
G4

AD19

AD17
Y5
N5
TESTHI
TESTLO1
TESTLO2

RTTIMPEDP

TESTP1
TESTP2
TESTP3
TESTP4

1

1
2

2
RSVD

AB19

BCLK

1
2

R64
1K

Snoop Phase Signals

D10
D11
C7
C8
B9
A9
C10
B11
C12
B13
A14
B12
E12
B16
A13
D13
D15
D12
B14
E14
C13
A19
B17
A18
C17
D17
C18
B19
D18
B20
A20
B21
D19
C21
E18
C20
F19
D20
D21
H18
F18
J18
F21
E20
H19
E21
J20
H21
L18
G20
P18
G21
K18
K21
M18
L21
R19
K19
T20
J21
L20
M19
U18
R18

2

FLUSH#
CPURST#

7 CPURST#

Execution Control Signals

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

R109
10K
3

1
1

STPCLK#
SLP#

6 GT_CPUINIT#

L2
M2

Debug Break Point

LINT0/INTR
LINT1/NMI

M3

R2

Response Phase Signals

AC11
AB12

7,10 HCLK

PLL1
PLL2

Request Phase Request

6 GT_STPCLK#

HCLK

AA16

H-PBGA
495 Ball

6 GT_INTR
6 GT_NMI
SLP#

Data Phase Signals

Coppermine

AB18
AC19

EDGCTRLP

Default Mode

Software Debug Mode

TDI

1K PULL-DOWN

150 PULL-UP TO +CPU_IO

TCK

1K PULL-DOWN

1K PULL-UP TO +CPU_IO

TMS

1K PULL-DOWN

1K PULL-UP TO +CPU_IO

TRST#

1K PULL-DOWN

X

X

150 PULL-UP TO +CPU_IO

TDO
FERR# 13

Q10
2SC2412K
2

BPM1#
BPM0#
BP3#
BP2#

2
110_1%

2

W19
W21
Y21
AA21

RTTIMPEDP

R249
1

1

RS0#
RS1#
RS2#
RSP#
TRDY#

Geyserville

AA15
THERMDA
AB16
THERMDC

U1
AA2
W1
Y1
U2

2

BSEL1

2
0

AB10
SMI#
V5
PWRGOOD
AC13
IGNNE#
AC12
FERR#
AD10
A20M#

ADS#

1
56.2_1%

1

Data Phase Signals

Address Lines

R75
BSEL0

2

1.5K
R250

CMOS Test Inputs

W20
PRDY#
AB20
PREQ#
AA14
TRST#
AD14
TMS
AD13
TDI
AC15
TDO
AA11
TCK

HTRDY#

7 HTRDY#

AB2

.01UF

+VCPU_IO
R276
1

DBSY# 7
DRDY# 7

Add
CAP. by
Charles
at 6/22

C552

AERR#
AP0#
AP1#
BERR#
BINIT#
IERR#

7 RS#[0..2]

RS#0
RS#1
RS#2

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
RP#

+

AA1
AB1
Y2
E6
V21
AD9

RS#[0..2]

T2
V4
V2
W3
W5
W2

TESTLO2

Analog

DEFER#
HIT#
HITM#

7 HADS#

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#

GHI#

BSEL0
BSEL1
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

L3
K3
J2
L4
L1
K5
K1
J1
J3
K4
G1
H1
E4
F1
F4
F2
E1
C4
D3
D1
E2
D5
D4
C3
C1
B3
A3
B2
C2
A4
A5
B4
C5

U3
V1
Y4

HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16
HA17
HA18
HA19
HA20
HA21
HA22
HA23
HA24
HA25
HA26
HA27
HA28
HA29
HA30
HA31

EDGECTRLP

U7A

HD[0..63]
HREQ#[0..4]
HA[3..31]

9 HD[0..63]
7 HREQ#[0..4]
7 HA[3..31]

AA12
AB15

TESTLO1
TESTHI
RTTIMPEDP
1
2
+VCPU_IO
L7 LQG21N4R7K10
C107
10UF_10V_1206
LO/HI#
6 CPU_LO/HI#
EDGCTRLP
BSEL1
BSEL0

1

R104

2

+VCPU_IO

1K
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet

3

of

47

A

B

C

D

E

1

+VCPU_IO

R81
1K_1%
VGTLREF

VGTLREF

1
2

1
2

1
2

4

A15
A16
A17
C14
D8
D14
D16
E15
G2
G5
G18
H3
H5

1

1

1

2
1

2

1000PF

2

2

C324

1

1

1

2

VCLKREF

C104

2

2

.1UF

+VCPU_IO

1

C66

C282

.1UF

+ C89
220U_TPB_4V

2

1

1

C68

2

2

2

2

2

2

C67

1000PF.01UF 1UF
2

C288 C287 C91

1000PF.01UF 1000PF.01UF .1UF

1

1

1

C338 C344

1

1

Change value by Charles at 6/24

2

+VCPU_IO

1000PF.01UF 1UF

.1UF

C555

C284
+

.1UF

150UF_TPC_4V
2

C553 C554

1

C64

2

1000PF.01UF 1UF

C63

1

C59

1

C60

M6
M17
N6
N17
P1
P6
P17
R6
R17
T6
T17
U6
U17
V6
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
W6
W7
W8
W9
W10
W11
W12
W13

VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT

2

1UF

C61

1

C62

1

1

Change value by Charles at 6/24

2

1
2

C79
.1UF

2

1
2

2

2

C292
C364
C349
C350
C299
10UF_10V_1206 10UF_10V_120610UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206
C354

1000PF

3

2

1

1
2

2

1
2

1

1

+VCC_CORE

C309

C58

VCMOSREF

R93
2K_1%

2

220UF_TPB_4V 220UF_TPB_4V

+VCPU_IO

1

C94
+

H-PBGA
495 Ball

AD8
AD7
AD6
AC8
AC7
AC6
AB8
AB7
AB6
AA8
AA7
AA6
Y8
Y7
Y6
W17
W16
W15
W14
G17
G16
G15
G14
G13
G12
G11
G10
G9
G8
G7
G6
H6
H17
K6
K17
L6
L17
J6
J17

2

10UF_10V_1206

C109
+

2

10UF_10V_1206

1

1

1

C103
+

2

2

2

220UF_TPB_4V

C366
+

2

1

1

C98
+

Coppermine

VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT

1

150UF_TPB_6.3V 150UF_TPB_6.3V

+VCC_CORE

2

1UF

Change value by
Charles at 6/24

VCLKREF

1

C329, C315, C357,
C94, C98, C109
Change from TPC to
TPB for cost down

C357
+

C291

R96
2K_1%

2

C341
1UF

2

C334
1000PF

2

1

1
2

1
2

C328
.1UF

.01UF

+VCLK

1

C315
+

C319
.1UF

C70

R278
2K_1%

2

2

2

150UF_TPB_6.3V

1

C329
+

C313
1000PF

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

J5
M4
M5
P3
P4
AA5
AA19
AC3
AC17
AC20
AD15

1

2

2

H8
H10
H12
H14
H16
J7
J9
J11
J13
J15
K8
K10
K12
K14
K16
L7
L9
L11
L13
L15
M8
M10
M12
M14
M16
N7
N9
N11
N13
N15
P8
P10
P12
P14
P16
R7
R9
R11
R13
R15
T8
T10
T12
T14
T16
U7
U9
U11
U13
U15

2

1

1

+VCC_CORE

1

1
C305
1UF

2

2

2

.1UF

2

2

.1UF

.1UF

2

1
C108
.1UF

3

2

C339

1

1

1

1

C100

NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24

C343
C65
1000PF .01UF

+VCC_CORE

C93

.1UF

VCMOSREF

1

1

1
C85
.1UF
2

C327
1UF

2

C333
1000PF
2

C304
1UF

1

1

1

2

2

C303
.1UF

2

1

1

1
2

1
2

C302
.1UF

C73

R279
1K_1%

+VCC_CORE
C312
1000PF

C57

1000PF .01UF

+VCPU_IO

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13

AA9
AD18

P2
CLKREF

VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF

+VCC_CORE

CMOSREF
CMOSREF

1UF
U7B

C318
.01UF

1

C75

2

.1UF

1

C69

1

1

.1UF

2

C84
E5
E16
E17
F5
F17
U5
Y17
Y18

.1UF

1

C92

2

1
C332
.1UF

2

1
C326
.1UF

2

C317
1000PF

2

2

C311
1UF

1

1

1
C310
.01UF

2

1
C316
.1UF

2

C325
.1UF

2

1

1
C331
.01UF

2

2

1

4

C56

2

R79
2K_1%

2

VCLKREF

2

VGTLREF

2

1

+VCC_CORE

1

2

VCMOSREF

COPPERMINE SOCKET
+VCC_CORE

10UF_10V_1206

C298

1

1

C300

10UF_10V_1206

C361

1

10UF_10V_1206

+VCC_CORE

2

2

1

2

1

Change value by
Charles at 12/20

Change by
Charles at 9/2

Compal Electronics, inc.

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

4

of

47

B

VID[0..4]

C

D

U7C

VID[0..4] 36

E

A2
A7
A8
A12
A21
B1
B5
B6
B7
B8
B10
B15
B18
C9
C11
C15
C16
C19
D2
D6
D7
D9
E3
E7
E8
E9
E10
E11
E13
E19
F3
F6
F7
F8
F9
F10
F11
F12
F13

A

4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

4

AD21
AD16
AD5
AD4
AD3
AD2
AD1
AC21
AC18
AC16
AC14
AC10
AC5
AC4
AC2
AC1
AB17
AB14
AB13
AB11
AB9
AB5
AB4
AB3
AA20
AA13
AA4
Y19
Y16
Y15
Y14
Y13
Y12
Y11
Y10
Y9
Y3
W18
W4

CPU_VID2
CPU_VID1
CPU_VID0

CPU_VID3

CPU_VID4
3

1

2
1

2

3,20,25,26,32,33,38 SMD
12,13 SDAP4
+3V

1

2
1

2

1
2
3
4

1

L@8P4R-4.7K
VID4
2

1

L@4.7K

Add by
Charles at
3/27 to
reserved for
LA733L

8
7
6
5

I-0
I-1
I-2
I-3
I-4

L@8P4R-0
2
R69
L@0

CPU_VID4

9
10

ASEL
WP
Non_Mux_Out
Mux_Sel

17
16

1

15
14
13
12
11

VID0
VID1
VID2
VID3
VID4

Y-0
Y-1
Y-2
Y-3
Y-4

Level
GND

LN_.1UF

1

4
5
6
7
8

19
18
R59 LN_0
2

R265
LN_0

D

LN_FM3560
6 VR_HI/LO#

H-PBGA
495 Ball

3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VID0
VID1
VID2
VID3

20

Coppermine

F14
F15
F16
F20
G3
G19
H2
H7
H9
H11
H13
H15
H20
J4
J8
J10
J12
J14
J16
J19
K2
K7
K9
K11
K13
K15
K20
L5
L8
L10
L12
L14
L16
L19
M7
M9
M11
M13
M15
M20
N2
N3
N4

V19
V3
U20
U16
U14
U12
U10
U8
T19
T18
T15
T13
T11
T9
T7
T5
T3
R20
R16
R14
R12
R10
R8
R5
R4
R3
P19
P15
P13
P11
P9
P7
P5
N20
N19
N18
N16
N14
N12
N10
N8

8
7
6
5

VCC3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3

R58
LN_0

2

SCL
SDA
Override#

RP1

1
2
3
4

R461

C286

U27
1
2
3

1

R57
@0

1

3,20,25,26,32,33,38 SMC
12,13 SCKP4

RP65

COPPERMINE SOCKET
Q5

2
G

2

S

LN_SI2302DS

3

2

+3V

R68
LN_0

R67
@0

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

ADDRESS: ASEL = LOW => 6E/6F

1

VID4

VID3

VID2

VID1

VID0

0

1

1

1

0

+VCC_CORE
1.3V

0

1

1

0

1

1.35V

0

1

0

1

0

1.5V

0

1

0

0

1

1.55V

0

1

0

0

0

1.6V

0

0

1

1

1

1.65V

0

0

1

1

0

1.70V

0

0

1

0

1

1.75V

0

0

1

0

0

1.80V

0

0

0

1

1

1.85V

1

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

5

of

47

A

B

26,36,37 VR_ON
36,37 V_GATE

V_GATE
R447 1
LN_1K

2

Add by Charles at 3/21 for
ATE testing
CRESET#

7 CRESET#

R298
10 14.3M_GCL

2

1

STPCLK#
SUSSTAT1#
CPU_STP#

14

G_LO/HI#

15
29
43

VR_ON
VGATE
IGN_VGATE#

2

28
44

VR100/50#
PLL30/60#

41

CRESET#

26
25
45

Y5
1

23
19
13

2

@0

Add by Charles at 2/16

@14.318MHZ
Y6
1
2

38
37
36

G_STPCLK#
G_SUSSTAT1#
G_CPU_STP#

3
11
47

RESERVED

46

GHI#

10

CPUPWRGD
VRPWRGD

9
32

PWRGD_CPU
G_VR_POK

VRCHGNG#
VR_HI/LO#
LP_TRANS#

12
33
34

VRCHGNG#
VR_HI/LO#

GT_A20M#
2 GT_IGNNE#

GT_STPCLK#
GT_SUSTAT1#
1 R115
2 GT_CPU_STP#
LN_0

1

GT_STPCLK# 3
GT_SUSTAT1# 8
GT_CPU_STP# 10

PWRGD_CPU 3
G_VR_POK 29
VRCHGNG# 13
VR_HI/LO# 5
CPU_LO/HI#

35
39
40

RESERVED
RESERVED
RESERVED

R123
1
LN_10K

Change by
Charles at
2/10

D19
CPU_STP#

1

VRCHGNG#

2

3

GT_CPU_STP#

CPU_LO/HI# 3

D

@RB717F

2 2
G
S

STB#
DIN
DOUT

GT_NMI
3
GT_INTR
3
GT_CPUINIT# 3
GT_A20M#
3
GT_IGNNE#
3
GT_SMI# 3

Change by Charles at 2/16

Q12
LN_SI2302DS

Add by Charles
at 1/18

6
18
31
42
27

1

C378
LN_15PF
2

1
2

2

+3V
1

2

1
4
8
48
2
5

CLK_IN
CLK_OUT
CLKEN#L

LN_14.318MHZ

C379
LN_15PF

GT_NMI
GT_INTR
GT_CPUINIT#
1 R111
2
@0
1 R106
GT_SMI#
@0

G_NMI
G_INTR
G_INIT#
G_A20M#
G_IGNNE#
G_SMI#

1

13 GT_LO/HI#

NMI
INTR
INIT#
A20M#
IGNNE#
SMI#

1

13 PIIX4_STPCLK#
13 SUS_STAT#
13 CPU_STP#

20
16
22
24
21
17

3

NMI
INTR
CPUINIT#
A20M# 1 R294
2
IGNNE# 1 @0
2
SMI#
R292
@0
STPCLK#
SUSTAT1#
CPU_STP#
R108
GT_CPU_STP# 1
GT_LO/HI#
@0

PIIX4_NMI
PIIX4_INTR
PIIX4_INIT#
PIIX4_A20M#
PIIX4_IGNNE#
PIIX4_SMI#

E

7
30

1

13
13
13
13
13
13

D

U10
LN_AMI11686-001

GND
GND
GND
GND
GND

2

VCC3
VCC3

R117 1
LN_1K
R121 1
LN_1K

2

C

C367
LN_.01UF

without Geyserville,
GHI#(CPU_LO/HI#) can
OPEN

C385

2

2

LN_.1UF

1
2
3
4

+VCPU_IO

RP24

GT_NMI
GT_INTR
GT_IGNNE#
GT_A20M#

8
7
6
5

8P4R-1.5K
A20M#

2 R295
0

1

GT_A20M#

IGNNE#

2 R293
0

1

GT_IGNNE#

Change by
Charles at
2/16

1
R100
1
R87
1
R86
1
R88

CPU_LO/HI#
2
L@1.5K
GT_CPUINIT#
2
1K
GT_STPCLK#
2
680
GT_SMI#
2
330

+3V

1
R296

VR_HI/LO#
2
LN_10K

+3VS

1
R304

G_VR_POK
2
LN_10K

+VCLK

1
R289

2
1.5K

PWRGD_CPU 2

+3VS

1
R300

2
4.7K

GT_CPU_STP#

2
10K

GT_SUSTAT1#

RP27
CPU_STP#
INTR
SMI#
CPUINIT#

9
10
11
12
13
14
15
16

NMI
SUSTAT1#
3

Add by
Charles at
3/22

L@16P8R-0
1
2
R448
L@0
1
2
R122
L@0

V_GATE
STPCLK#

GT_CPU_STP#
GT_INTR
GT_SMI#
GT_CPUINIT#

8
7
6
5
4
3
2
1

Change by
Charles at
2/10

GT_NMI
GT_SUSTAT1#

G_VR_POK

+3V

+3VS

VR_POK 37

L@RB751V

1
R99
8
7
6
5

RP18

1
2
3
4

CPUINIT#
NMI
INTR
SMI#

LN_8P4R-4.7K
U13

13,14 PIIX4_SLP#

1

5

1

C161 @.1UF
2

2
3

4

VGA_SUS_STAT# 23
+3V

@7SH08
1
R175

+3VS

2
0

+3V

4

1
R301
1
R103

STPCLK#
2
LN_4.7K
VRCHGNG#
2
10K

1
R119
1
R113
1
R291

CRESET#
2
1K
GT_LO/HI#
2
10K
SUSTAT1#
2
LN_10K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

3

VR_POK

+3V
GT_SUSTAT1#

A

1

GT_STPCLK#

for without Geyserville

Add by
Charles at
1/18

D20

C

D

Title

4

Compal Electronics, inc.
SCHEMATIC, M/B LA-733

Size

B
Date:

Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

6

of

47

A

B

443ZXM-100_ A

C

B23
K21
H24
H26

CPURST#
ADS#
BNR#
BPRI#

3 DBSY#
3 DEFER#
3 DRDY#
3 HIT#
3 HITM#
3 HLOCK#
3 HTRDY#
3 BREQ0#

L23
J26
K23
L24
L22
K22
H25
B26

DBSY#
DEFER#
DRDY#
HIT#
HITM#
HLOCK#
HTRDY#
BREQ0#

K26
L26
L25

RS#0
RS#1
RS#2

J22
J23
K24
K25
J25

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

N23

HCLKIN

M25
M26

TESTIN#
CRESET#

2
C120
10UF_10V_1206

2
2

RS#0
RS#1
RS#2

3 RS#[0..2]

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

3 HREQ#[0..4]

R329 = @10K (no load) 2/16

HCLK

R150

R329
1
+3V
6 CRESET#

33

13,16,31 PCIRST#

3

A3

PCIRST#

C148

MAB#0
MAB#1
MAB#2
MAB#3
MAB#4
MAB#5
MAB#6
MAB#7
MAB#8
MAB#9
MAB10
MAB#11
MAB#12
MAB#13

AD16
AC16
AD17
AB17
AE18
AD19
AB18
AB19
AF20
AC20
AB20
AE21
AD21
AF22

CSA#0
CSA#1
CSA#2
CSA#3
CSA#4
CSA#5
CKE2/CSA#6
CKE3/CSA#7

AB14
AF15
AE15
AC15
AD15
AE16
AE24
AD23

CSB#0
CSB#1
CSB#2
CSB#3
CSB#4
CSB#5
CKE4/CSB#6
CKE5/CSB#7

AE25
AD24
AD26
AC24
AC26
AB23
AC23
AF24

DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7

AD13
AC13
AC25
AB26
AE14
AC14
AA22
AA24

DQMB1
DQMB5

AE13
AD14

CKE0/FENA
CKE1/GCKE

AC22
AF23

SRAS_A#
SRAS_B#
SCAS_A#
SCAS_B#

AF16
AA17
AF12
AB13

WE_A#
WE_B#

AE12
AC12

11 CKE[2..5]

CKE[2..5]

1

MMA0
MMA1
MMA2
MMA3
MMA4
MMA5
MMA6
MMA7
MMA8
MMA9
MMA10
MMA11
MMA12
MMA13
RAS0#_BX
RAS1#_BX
RAS2#_BX
RAS3#_BX

R1931
R1781
R1941
R1951

2
2
2
2

R186
1
1
R185

CKE4_BX
CKE5_BX

47
47
47
47

RRAS#2
RRAS#3
RRAS#4
RRAS#5

11
11
11
11

33
2
CKE4 11
2
CKE5 11
33
PLACE THE RESISTOR ON THE 443ZX

2

RCAS#0
RCAS#1
RCAS#2
RCAS#3
RCAS#4
RCAS#5
RCAS#6
RCAS#7
RCAS#[0..7] 11

2 33
2 33

R1971
R1961

CKE2_BX
CKE3_BX

CKE2 11
CKE3 11

SRASA# 12

3

SCASA# 12

1

PLACE THE
TERMINATOR ON THE
STUB TO CPU

@10K
2 TESTIN#
CRESET#

2

1

3,10 HCLK

492 BGA

AF17
AB16
AE17
AC17
AF18
AE19
AF19
AC18
AC19
AE20
AD20
AF21
AC21
AF25

Add by Charles
at 5/20

AE22
AE23
P22

CRESVA
CRESVB
CRESVC

DCLKO
DCLKWR
DCLKRD

RMWEA# 12
R168

AB21
AD25
AB22

W=5mils DCLKO_R
W=5mils

A1
A14
A26
C5
C9
C18
C22
E3
E12
E15
E24
F6
F8
F19
F21
H6
H21
J3
J24

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2

15PF

1

DCLKRW 10

2
18

W=5mils

DCLKO 10

1

1000PF
2

.1UF
2

.1UF
2

2

2

2

.01UF

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

C163
R170

2

+
.01UF

82443ZXM-100

U31A
443ZXM-A

2

C155

1

C156

1

C159

1

C158

1

C157

1

C154

1

1

+3V

1000PF

V21
Y21
F7
F9
F18
F20
G6
G21
J6
J21
AA7
AA9
AA18
AA20

3 CPURST#
3 HADS#
3 BNR#
3 BPRI#

C146
10UF_10V_1206

1000PF
2

.1UF
2

.1UF
2

2

2

2

.01UF

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HOST INTERFACE

G25
H22
G23
H23
G24
F26
G26
G22
F22
F23
F24
F25
E23
E26
E25
D25
D26
B25
C26
A25
C25
A24
D24
C23
B24
C24
A23
E22
D23

DRAM INTERFACE

C135

+
.01UF

+3V
HA[3..31] 3

HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16
HA17
HA18
HA19
HA20
HA21
HA22
HA23
HA24
HA25
HA26
HA27
HA28
HA29
HA30
HA31

1

C132

1

C131

1

C130

1

C134

1

1

1

C137

1000PF

E

MMA[0..13] 12
HA[3..31]

+3V

1

D

22PF

place closely to 443zx

Add by Charles
at 5/20

1

1

33

2

C162
15PF

AB22 leave to be NC. 2/16
4

4

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

7

of

47

A

B

C

D

E

443ZXM-100_ B

R129

2

TO DOCKING
GNT#0
31
31 GNT#1
17 GNT#4
1

15 GNT#3

2

R128

13,29 RSMRST#
10K
13,14,23,27,31 CLKRUN#
10 PCLK_BX

REFVCC5
W=5mils

D7
place closely to 443zx
2

+3V
1

1

1K

1

R143

C128

C393
1UF

PIPE#
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

M3
K1
M2
M1
N2
P2
P4
P3
R1

PIPE#
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

RBF#

M4

RBF# 23

ST0
ST1
ST2

L4
L2
L1

ST0 23
ST1 23
ST2 23

AC2
T5
N3

AD_STBA 23
AD_STBB 23
SBSTB 23

1
2

.1UF

2

2

1

1

1
2

PIPE# 23

1

1
C147

C416

.1UF

.1UF

1000PF

W=10mils
1
2
R162
18

R166
1

1

1
C412

C387

.1UF

.1UF

1000PF

18
2 W=5mils

GCLKO 23

** Trace lengths of GCLKOUT & GCLKIN
must be matched. Stub to teebshould be 1"
MAX.

C160
22PF

R165
1
R158
GIRDY# 1
R161
GDEVSEL#1
R338
GSTOP# 1
R340
AD_STBA 1
R156
AD_STBB 1
R335
GFRAME# 1
R145
GREQ#
1
R328
GGNT#
1
R332
SBSTB
1
R149
RBF#
1
R331
PIPE#
1

8.2K
2
8.2K
2
8.2K
2
8.2K
2
8.2K
2
8.2K
2
8.2K
2
8.2K
2
8.2K
2
8.2K
2
8.2K
2
8.2K
2

R337
1

100K
2

GTRDY#

SBA[0..7]

W=20mils

SBA[0..7] 23
+3V
1

1000PF

C145
.01UF

2

C139

.01UF

2

2

C152
2

C143
.01UF

1

1

2

Add by
Charles at
5/20

AGPREFV

2

C403

.01UF

2

C153
2

2

1

1

1
2

C149
1000PF

GREQ# 23
GGNT# 23
W=5mils

C536

C384

.1UF

+3V

1

P1
AE1
V6
Y6

GCLKOUT

N4

C150

.01UF

C535
2

1UF
R152
3.48K_1%

C537

R154

1UF

2.32K_1%

Change
value by
Charles
at 2/16

+3V

3

15PF

2

2

GCLKOUT
GCLKIN

P5
N5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2

+5V

L5
L3

AGPREFV

10

RB751V
2

GREQ#
GGNT#

GADSTB-A
GADSTB-B
SB-STB

R308

1

GREQ#
GGNT#

1

+3VS

3

GFRAME# 23
GDEVSEL# 23
GIRDY# 23
GTRDY# 23
GSTOP# 23
GPAR 23

23
23
23
23

2

PGNT0#/IOGNT#
PGNT1#
PGNT2#
PGNT3#
PGNT4#
BXPWROK
CLKRUN#
REFVCC5
PCLKIN

C151

1

E7
D7
E10
E8
E9
AF3
AC4
C2
B2

W3
W5
V5
W4
Y1
Y2

C167
.01UF

2

GNT#0
GNT#1
GNT#2
GNT#3
GNT#4

6 GT_SUSTAT1#

GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3

1

10K

1

1

+3VS

1

PREQ0#/IOREQ#
PREQ1#
PREQ2#
PERQ3#
PERQ4#
SUSTAT#

2

A6
C7
F10
D8
D10
AD4

1

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4

PCI ARB & PWR MGT

TO DOCKING
31 REQ#1
13 REQ#2
15 REQ#3

2

PHOLD#
PHLDA#
WSC#

GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR

AB2
Y4
V4
U2

1

B6
D6
AE3

13,14 PHLD#
13,14 PHLDA#

VDD_AGP
VDD_AGP
VDD_AGP
VDD_AGP

FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
PAR
SERR#
PLOCK#

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

E2
F3
E1
F5
F4
G5
F1
F2

FRAME#_BX
DEVSEL#_BX
IRDY#_BX
TRDY#_BX

GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3

C166
1000PF

2

2
2
2
2

C/BE#0
C/BE#1
C/BE#2
C/BE#3

C138
.01UF

+3V

1

0
0
0
0

J4
G3
E4
C4

C141
1000PF

2

1R314
1R322
1R313
1R130

13,14,31 FRAME#
13,14,31 DEVSEL#
13,14,31 IRDY#
13,14,31 TRDY#
13,14,31 STOP#
13,14,31 PAR
13,14,31 SERR#
14 PLOCK#

C/BE#0
C/BE#1
C/BE#2
C/BE#3

492 BGA

1

2

2

PCI INTERFACE

+3VS

82443ZXM-100

+3V

1

10P8R_10K

443BX as possible.

2

31

** Place as close to

1

REQ#0

GAD[0..31]

23 GAD[0..31]

2

REQ#0
REQ#1
REQ#2
REQ#3

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

U31B
443ZXM-A
GAD0
AB5
GAD1
AE2
GAD2
AD3
GAD3
AD2
GAD4
AD1
GAD5
AC3
GAD6
AC1
GAD7
AB4
GAD8
AB1
GAD9
AA5
GAD10
AA3
GAD11
AA4
GAD12
AA2
GAD13
AA1
GAD14
Y5
GAD15
Y3
GAD16
W1
GAD17
V2
GAD18
W2
GAD19
U5
GAD20
V1
GAD21
U4
GAD22
U3
GAD23
U1
GAD24
T3
GAD25
T4
GAD26
T2
GAD27
T1
GAD28
U6
GAD29
R3
GAD30
R4
GAD31
R2

2

10
9
8
7
6

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

N1
M5
L12
L15
M11
M13
M14
M16
M22
N12
N13
N14
N15
P12
P13
P14
P15
P26
T12
T15
R5
R11
R13
R14
R16
R22
V3
V24
W6
W21

1
2
3
4
5

K6
K2
K4
K3
K5
J1
J2
H2
H1
J5
H3
H5
H4
G1
G2
G4
D1
D3
D2
C1
A2
C3
B3
D4
E5
A4
D5
B4
B5
A5
E6
C6

AGP INTERFACE

RP4
GNT#0
GNT#1
GNT#2
GNT#3

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

AD[0..31]

13,31 AD[0..31]

+3V
L11
L13
L14
L16
M12
M15
N11
N16
P11
P16
R12
R15
T11
T13
T14
T16
N26

+3VS
1

C/BE#[0..3]

13,31 C/BE#[0..3]
+3V

** Place as close to
443BX as possible.

GPAR

U30C
74LVC08
13 PX4_REQ1#

9

REQ#1

10

REQ#3

8

4

4

+3VS POWER

Compal Electronics, inc.

U30D
74LVC08
13 PX4_REQ2#

12

REQ#0

13

REQ#4

11
REQ#4 17

+3VS POWER

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:

A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

8

of

47

A

B

C

D

E

443ZXM-100_ C

1

1

1

1

1

C123

C144

.01UF

.1UF

.1UF

2

C133
2

C170
.01UF

2

C171
1000PF

2

CAP. closeed to 443BX.

HD[0..63]

HD[0..63] 3

2

+VCPU_IO
3

+VCPU_IO

R476
1K_1%

C538
1UF
2

VGTLREF_BX

1

1
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7

492 BGA

1

AE11
AA10
AA23
AA26
AF11
AD12
AA25
Y22

82443ZXM-100

+3V

2

MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

2
1

C122
1UF

R477
2K_1%

C142
1UF

Add by Charles at 5/3

Add by Charles at 5/3
C533
4.7UF_10V_0805
2

C541
.01UF
2

2

C532
4.7UF_10V_0805

1

1

1

2

2

2

C540
.01UF
2

C539
.01UF

1

1

1

M23
E16
M24
F17

2

GTLREFA
GTLREFB
VTTA
VTTB

W=40mils

AB25
VSS
N24
VSS
AA6
VSS
AA8
VSS
AA19
VSS
AA21
VSS
AB3
VSS
AB12
VSS
AB15
VSS
AB24
VSS
AD5
VSS
AD9
VSS
AD18
VSS
AD22
VSS
AF1
VSS
AF13
VSS
AF26
VSS

3

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

MEMORY DATA BUS

2

AF4
AE4
AF5
AD6
AE6
AB7
AC7
AF7
AB8
AB9
AC9
AE9
AB10
AC10
AF10
AD11
Y24
Y25
W23
W24
W26
W25
V26
U24
U23
T22
T23
T26
R24
R25
P23
N25
AC5
AE5
AB6
AC6
AF6
AD7
AE7
AC8
AD8
AF8
AE8
AF9
AD10
AE10
AB11
AC11
Y23
Y26
W22
V22
V23
V25
U22
U25
U26
T24
T25
U21
R23
R26
P24
P25

U31C
443ZXM-A
B22 HD0
D22 HD1
E21 HD2
A22 HD3
D21 HD4
C21 HD5
A21 HD6
C20 HD7
B21 HD8
E20 HD9
A20 HD10
E19 HD11
B20 HD12
E18 HD13
D20 HD14
D19 HD15
D18 HD16
C19 HD17
B19 HD18
A18 HD19
A19 HD20
B18 HD21
C17 HD22
E17 HD23
D17 HD24
B17 HD25
C16 HD26
A17 HD27
C15 HD28
B16 HD29
D16 HD30
A16 HD31
B15 HD32
A15 HD33
D14 HD34
D15 HD35
B13 HD36
C14 HD37
E14 HD38
D13 HD39
A13 HD40
D12 HD41
B12 HD42
B14 HD43
C13 HD44
E13 HD45
D11 HD46
A12 HD47
B11 HD48
A11 HD49
B7 HD50
C12 HD51
C8 HD52
B10 HD53
A10 HD54
A9 HD55
A7 HD56
E11 HD57
D9 HD58
C11 HD59
C10 HD60
B8 HD61
A8 HD62
B9 HD63

1

12 MECC[0..7]
1

MECC[0..7]

MMD0
MMD1
MMD2
MMD3
MMD4
MMD5
MMD6
MMD7
MMD8
MMD9
MMD10
MMD11
MMD12
MMD13
MMD14
MMD15
MMD16
MMD17
MMD18
MMD19
MMD20
MMD21
MMD22
MMD23
MMD24
MMD25
MMD26
MMD27
MMD28
MMD29
MMD30
MMD31
MMD32
MMD33
MMD34
MMD35
MMD36
MMD37
MMD38
MMD39
MMD40
MMD41
MMD42
MMD43
MMD44
MMD45
MMD46
MMD47
MMD48
MMD49
MMD50
MMD51
MMD52
MMD53
MMD54
MMD55
MMD56
MMD57
MMD58
MMD59
MMD60
MMD61
MMD62
MMD63

HOST DATA BUS

12 MMD[0..63]

MMD[0..63]

VDD
VDD
VDD
VDD
VDD

B1
N22
AF14
AF2
AE26

+3V

** Place as close to
Add by Charles at 5/3

443BX as possible.

4

4

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

9

of

47

A

B

C

D

E

CLOCK GENERATOR & BUFFER

+3VPCI
L29
1
2
HB1M2012-121JT

C376
.01UF

2

C372
4.7UF_10V_0805

1

1

1

C381
.1UF

1

L30
1

1
C114
.1UF
2

C382
4.7UF_10V_0805

C118
.01UF

2

2

4.7UF_10V_0805

VDDPCI
VDDPCI
VDD
VDD
VDD

CPUCLK0

24

CPUCLK1

23

25

VDDCPU

PCICLK1

5

1

PCICLK2

7

1

PCICLK3

8

1

PCICLK4

10

1

PCICLK5

11

1

PCICLKF

XIN

C370
1000PF

1

XIN

Y1
1

XOUT

2

14.318MHZ
Y2
1
2

2

2

10K

1

6 GT_CPU_STP#
13 PCI_STP#

SUSA# 1

2

D5

RB751V

14.3M_SIO 27

2

R114@22

14.3M_VGA 23

2

14.3M_GCL 6

1

XOUT

R118

2

Add by Charles at 2/16

R116

22
HCLK 3,7

33

2

R120

PCLK_BX 8
15

2

R124

PCLK_MINI 31
33

2

2 33

PCLK_AUD 17

R136

2 33

PCLK_SIO 27

4

1 R112

2 33

PCLK_PIIX4 13

R127 15
1
2

CPU_STP#

48M

16

19

PCI_STP#

17

PWRDWN#

15

SEL100/66#

GND
GND
GND
GND
GND
GND

3
12
14
20
22
28

Change value by Charles for
EA at 5/26

PCLK_PCM 15

R126

18

PWRDWN#

2

13,25 SUSA#

C112
10PF

2

1
C113
10PF

1

R125

@14.318MHZ
1
2
R107
2M

2

+3VS

14MOSC 13

Add by Charles at 1/4

2

48M 13

Change value by
Charles at 5/21
1

C116
.01UF

C369

14.3M

26

6
9
13
21
27

1

1

L28
1
2
HB1M2012-121JT

2

U11

CLK_CPUIO
+VCLK

R110 22

1
C383
1000PF

2

1
2
HB1M2012-121JT

1

+3VS

R105 22

R101 22
1
2

VCLK_+3VS

Reserved
by Charles
at 6/24

2

+3VS

2

1

C121
@33PF

W48C111-17

1

2

R132

@0

13 FSQ0
1

+3VS

2

R131

FQS 0 : 66MHZ

10K

1 : 100MHZ

3

3

9

BUF_IN

12 CLK_SMD

SDACLK 14

SDATA

12 CLK_SMC

SCKCLK 15

C420
1000PF

2

C414
.01UF

1

VDD
VDD
VDD
VDD
VDD
VDD
VDDIIC

1

1
C421
.01UF

U32
1
5
24
28
10
19
13

2

C415
.1UF

2

1

1
C417
.1UF

2

2

C168
4.7UF_10V_0805

2

+3V

1

VCLK_SDRAM
L33
1
2
HB1M2012-121JT

C418
1000PF

1

7 DCLKO

Add by
Charles at
C169
5/20

12

R187
33

SUSA# 1
D11

20

+3V

1

R345
10K

4

CLK_SDRAM1

3

For EA
requirment
at 6/26.

CLK_SDRAM2

6

1

CLK_SDRAM3

7

1

CLK_SDRAM4

22

1

CLK_SDRAM5

23

1

SCLCOK

R349
10
R347
10
R346
10
R348

2

CLK_SDRAM2 11

2

CLK_SDRAM3 11

2

CLK_SDRAM4 11

2

CLK_SDRAM5 11

10
OE

2

22PF

2
RB751V

CLK_SDRAM0

2

CLK_SDRAM6

26

CLK_SDRAM7

27

CLK_SDRAM8

11

2
17
12
4
8
21
25
16

GND
GND
GND
GND
GND
GND
VSSIC

1

R354

2

DCLKRW 7

22
18

CLK_SDRAM9

4

C419
15PF_5%

W40S11-02

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

10

of

47

A

B

C

D

E

SO-DIM 144 PINS RAM MODULE CONN.
+3V

+3V
+3V

+3V

1

1

JP28
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
RCAS#0
RCAS#1
MA0
MA1
MA2
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
2

SMECC0
SMECC1

10 CLK_SDRAM3
12 S_RASA#
12 RM_WEA#

RRAS#3
RRAS#2
SMECC2
SMECC3

R384
33

MD16
MD17
MD18
MD19

C458
22PF

MD20
MD21
MD22
MD23
MA6
MA8
3

MA9
MA10
RCAS#2
RCAS#3
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
12 DIMM0_SMD

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65

VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC

RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

MD32
MD33
MD34
MD35

JP27
MD0
MD1
MD2
MD3

MD36
MD37
MD38
MD39

MD4
MD5
MD6
MD7

RCAS#4
RCAS#5

RCAS#0
RCAS#1

MA3
MA4
MA5

MA0
MA1
MA2

MD40
MD41
MD42
MD43

MD8
MD9
MD10
MD11

MD44
MD45
MD46
MD47

MD12
MD13
MD14
MD15

SMECC4
SMECC5

SMECC0
SMECC1
CKE3
S_CASA# 12

CKE2
MA12
MA13

10 CLK_SDRAM4
12 S_RASA#
12 RM_WEA#

SMECC6
SMECC7
MD48
MD49
MD50
MD51

R385
33

R382

MD52
MD53
MD54
MD55

SMECC2
SMECC3

33
C444
C460
22PF

MD16
MD17
MD18
MD19

22PF
MD20
MD21
MD22
MD23

MA7
MA11

MA6
MA8

MA12
MA13

MA9
MA10

RCAS#6
RCAS#7

RCAS#2
RCAS#3

MD56
MD57
MD58
MD59

MD24
MD25
MD26
MD27

MD60
MD61
MD62
MD63

MD28
MD29
MD30
MD31

DIMM0_SMC 12
12 DIMM1_SMD

SO-DIMM144(R)

RRAS#4
RRAS#5

CLK_SDRAM2 10

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65

VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC

RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
RCAS#4
RCAS#5
MA3
MA4
MA5
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47

2

SMECC4
SMECC5
CKE4
S_CASA# 12

CKE5
MA12
MA13

CLK_SDRAM5 10
SMECC6
SMECC7
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55

R383
33

C445
22PF

MA7
MA11

3

MA12
MA13
RCAS#6
RCAS#7
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DIMM1_SMC 12

SO-DIMM144

DIMM0
4

7 RCAS#[0..7]
12 MD[0..63]
12 MA[0..13]
7 RRAS#[2..5]
7 CKE[2..5]
12 SMECC[0..7]

A

DIMM1
4

RCAS#[0..7]
MMD[0..63]
MA[0..13]
RRAS#[2..5]
Title
CKE[2..5]

Compal Electronics, inc.
SCHEMATIC, M/B LA-733

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:

SMECC[0..7]

B

C

D

Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

11

of

47

A

B

C

D

E

SO-DIM 144 PINS RAM MODULE CONN.
RP19
11 RM_WEA#
11 S_RASA#
11 S_CASA#
16P8R-10

8
7
6
5
4
3
2
1

MMD0
MMD1
MMD2
MMD3
MMD4
MMD5
MMD6
MMD7

MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31

9
10
11
12
13
14
15
16

16P8R-10

S_RASA#

R353
10

SRASA#

S_CASA#

R351
10

SCASA#

MMD24
MMD25
MMD26
MMD27
MMD28
MMD29
MMD30
MMD31

8
7
6
5
4
3
2
1

R184
10K

+3V

R182
10K

RP42

9
10
11
12
13
14
15
16

8
7
6
5
4
3
2
1

MMD8
MMD9
MMD10
MMD11
MMD12
MMD13
MMD14
MMD15

MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39

9
10
11
12
13
14
15
16

MMD32
MMD33
MMD34
MMD35
MMD36
MMD37
MMD38
MMD39

8
7
6
5
4
3
2
1

16P8R-10

16P8R-10

RP37

RP43

1
2
3
4
5

C173
.1UF

RMWEA# 7
SRASA# 7
SCASA# 7
13 INHIB
13 ENDIM1
13 ENDIM2

6
10
9

5,13 SCKP4

3

X

5,13 SDAP4

13

Y

INH
A
B

U14
X0
X1
X2
X3

1
5
2
4

Y0
Y1
Y2
Y3

12
14
15
11

MMA9

@10K
R180

MMA7

@10K
R179

MMA6

R183

MMA11

16P8R-10

Low

High

Int.Res.50K

Host Freq.
Select

66MHz

100MHz

Pulldown

In-Order
Queue
Depth
Enable

1
No
Pipeline

4
Max

Pullup

Quick
Start
Select

Stop
Clock
Mode

Quick
Start
Mode

Pulldown

Pulldown

Enable

Disable

Normal
Oper.

Tristates
certain
Memory
signal

Desktop
GTL+

Mobile
Low
Power
GTL+

C443
4.7UF_10V_0805

MMA6

2

C456
1000PF

Host Bus
Buffer
Mode
Select

C454
1UF

1
2

9 MMD[0..63]

+3V

11 MD[0..63]

MA[0..13]
MMD[0..63]
MD[0..63]

C451
1000PF

4

2

C463
1000PF
2

2

C442
1000PF

11 MA[0..13]

C446
1UF

MMA[0..13]

1

2

C447
1000PF

1

2
1

1

2

C462
1000PF

C464
.01UF
2

1

1

1

1
1

2

C452
.01UF

C213
.01UF
2

2

C211
.01UF

C453
.1UF
2

C207
.1UF

@16P8R-10

4

C210
.1UF
2

C457
.1UF

1

9
9
9
9
9
9
9
9

2

MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7

1

MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7

1

1
RP47
8
7
6
5
4
3
2
1

SMECC[0..7]

+3V

16P8R-10

9
10
11
12
13
14
15
16

3

2

2

C461
1000PF

7 MMA[0..13]

SMECC0
SMECC1
SMECC2
SMECC3
SMECC4
SMECC5
SMECC6
SMECC7

Pulldown

1

1

1
C455
1000PF
2

C449
.01UF
2

C440
.01UF
2

C441
.1UF

1

1

1
C459
.1UF

11 SMECC[0..7]
16P8R-10

Pulldown

+3V
MMD16
MMD17
MMD18
MMD19
MMD20
MMD21
MMD22
MMD23

8
7
6
5
4
3
2
1

2

9
10
11
12
13
14
15
16

1

MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23

AGP
MM Config

1

1
C465
1000PF
2

C448
.01UF
2

C450
.01UF

1

1

1
C212
.1UF

2

C439
.1UF

2

MMD56
MMD57
MMD58
MMD59
MMD60
MMD61
MMD62
MMD63

CLK_SMD 10

Function

MMA7

RP40
8
7
6
5
4
3
2
1

DIMM0_SMD 11
DIMM1_SMD 11

T1
TPAD

1

MMA12

MMA9

16P8R-10

RP34
9
10
11
12
13
14
15
16

CLK_SMC 10

Pin Name

MMA11

3

MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

DIMM0_SMC 11
DIMM1_SMC 11

T2
TPAD

1

+3V

2

MMD40
MMD41
MMD42
MMD43
MMD44
MMD45
MMD46
MMD47

8
7
6
5
4
3
2
1

1

9
10
11
12
13
14
15
16

2

MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47

MMD48
MMD49
MMD50
MMD51
MMD52
MMD53
MMD54
MMD55

10P8R-10K

2

@10K

1

8
7
6
5
4
3
2
1

1

MMA10

R181

10K

2

9
10
11
12
13
14
15
16

+3V

MMA12

MMA10
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55

10
9
8
7
6

74HC4052

16P8R-10

RP44
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15

RMWEA#

RP32

9
10
11
12
13
14
15
16

2

R352
10

16P8R-10

RP41
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7

RM_WEA#

16

MMA6
MMA7
MMA8
MMA9
MMA10
MMA11
MMA12
MMA13

8
7
6
5
4
3
2
1

VCC

9
10
11
12
13
14
15
16

GND
GND

MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13

MMA0
MMA1
MMA2
MMA3
MMA4
MMA5

8
7
6
5
4
3
2
1

1

9
10
11
12
13
14
15
16

7
8

1

MA0
MA1
MA2
MA3
MA4
MA5

+3V

RP46

2

RP45

SM BUS

+3V

Charles add new Damping resistor for address bus and control signals at 6/21

RP47 change to be no load. 2/16

Compal Electronics, inc.

Placement near to 440ZXM
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

12

of

47

U11
T11
W11
Y11
T10
W10
U9
V9
Y9
T8
W8
U7
V7
Y7
V6
Y6
T5
W5
U4
V4
V3
W3
U2
T2
W2
Y2
T1
V1
W16
T16
Y17
V17
Y18
W18
Y19
W19

48M 10
14MOSC 10
PCLK_PIIX4 10
RTCCLK 15,16,23
+3V
SPKR 19

RTCX1
RTCX2

OC0#
OC1#
USBP1+
USBP1USBP0+
USBP0-

J1
J2
F1
H2
G2
H3

OVCUR#0 28,33
OVCUR#1 28,33
USBP1+ 28
USBP1- 28
USBP0+ 28
USBP0- 28

PDIOR#
PDIOW#
PIORDY
PDDREQ
PDDACK#
PDCS1#
PDCS3#

F17
F16
G20
F18
G19
H17
H16

PDIOR# 22
PDIOW# 22
PIORDY 21,22
PDDREQ 21,22
PDDACK# 22
PDCS1# 22
PDCS3# 22

SDIOR#
SDIOW#
SIORDY
SDDREQ
SDDACK#
SDCS1#
SDCS3#
PDA0
PDA1
PDA2
SDA0
SDA1
SDA2
NC1
NC2
NC3

C16
B16
D16
A16 SDDREQ
A17
B18
C18
G16
G18
G17
C17
B17
A18
J4
N18
N3

1

RTCX1
RTCX2
VBAT
PWROK

3

C399

CLK_PX

.1UF

1

14MOSC
R148

R330

10

10

C388
1000PF

C400

C136
2

D22
LID#

2

PBTN#

2

EC_LID_SW# 26
+3V

1LIDSW#
RB751V

LID_SW# 25,26,32

1
RB751V

ON/OFF 25,29,32

D9

2 VLB#

1

STOP#
TRDY#
PCIRST#

STOP# 8,14,31
TRDY# 8,14,31
PCIRST# 7,16,31

D50
2
A

1
@RB751V

ON/OFF_EC# 25,29,32

Add by Charles at 4/20
that reserved for S/W
B

+3V

Load R167 by Peter Liu 3/30
8,31 C/BE#[0..3]
14,22,25 IRQ[0..15]
22 SDD[0..15]
22 PDD[0..15]
27 DACK#[0..3]
14,27 DRQ[0..7]
25,27 SA[0..18]
14,25,27 SD[0..15]

C/BE#[0..3]
IRQ[0..15]
SDD[0..15]
PDD[0..15]
DACK#[0..3]
DRQ[0..7]
SA[0..19]
SD[0..15]
C

2

15PF

R177 @100K
1
2

4

CONFIG2
1

1
R167

R173 10K

SDD15
SDD14
SDD13
SDD12
SDD11
SDD10
SDD9
SDD8
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0

1
@RB751V

PDD15
PDD14
PDD13
PDD12
PDD11
PDD10
PDD9
PDD8
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

D10
2

IRQ15
IRQ14
IRQ12
IRQ11
IRQ10
IRQ9
IRQ8#
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
IRQ1
IRQ0

12PF

4

DRQ7
DRQ6
DRQ5
DRQ3
DRQ2
DRQ1
DRQ0

12PF

15PF

15PF
DACK#3
DACK#2
DACK#1
DACK#0

C164

C124

SDIOR# 22
SDIOW# 22
SIORDY 20,22
SDDREQ 20,22
SDDACK# 22
SDCS1# 22
SDCS3# 22
PDA0 22
PDA1 22
PDA2 22
SDA0 22
SDA1 22
SDA2 22

+3VS

PIIX4M

R137
10

+RTCVCC
SPWROFF# 29

12

J9
J10
J11
J12
K9
K10
K11
K12

J16
VREF

K5
J5
VCCUSB
VSSUSB

T6
P15
R7
G6
F14
F5
E16
E12
E9

R16
N16
R15
R6
F15
E11
F6
VCCSUS1
VCCSUS2
VCC1
VCC2
VCC3
VCC4
VCC5

VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9

INHIB
ENDIM1
ENDIM2
PHDRST
SHDRST

FLASH#

HDDPW#
SHDPW#

G4
Y15
T14
W14
U13
V13
Y13
T12
T19
G5
F2
F3
F4
GPO0
GPO1/LA17
GPO2/LA18
GPO3/LA19
GPO4/LA20
GPO5/LA21
GPO6/LA22
GPO7/LA23
GPO8
GPO27
GPO28
GPO29
GPO30

GPI1
GPI13
GPI14
GPI15
GPI16
GPI17
GPI18
GPI19
GPI20
GPI21

*

SD15
SD14
SD13
SD12
SD11
SD10
SD9
SD8
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0

C165

14 PBTN#

IDE

ISA

2

W=5mils
L3 48M
V11 14MOSC W=5mils
W=5mils
D11 CLK_PX
W=5mils
P17
R174
10K
V18
1
2
K17

1

R172 22M

14 LID#

SERIRQ/GPI7
PIRQA#
PIRQB#
PIRQC#
PIRQD#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SA18
SA17
SA16
SA15
SA14
SA13
SA12
SA11
SA10
SA9
SA8
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0

2

1

1

RTCX1
32.768KHZ
2

2

RTCX2

CPU

TEST#
SPKR

SYS_VOL_UP# 17
SYS_VOL_DW# 17
CONFIG1
CONFIG2

N19
R20
L16
M18

*

SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15

X1

PCI

SLP#
CPURST
INIT
FERR#
IGNNE#
INTR
NMI
SMI#
STPCLK#
RCIN#
A20GATE
A20M#
TC
MEMCS16#
MEMR#
MEMW#
SMEMR#
SMEMW#
SYSCLK
BALE
IOCHK#/GPI0
REFRESH#
I0CS16#
ZEROWS#
SBHE#
RSTDRV
IOR#
IOW#
IOCHRDY
AEN

*
*

BIOSCS# 25
GPO25
GT_LO/HI# 6

2

3

*

CONFIG1

2

R169 100K

12

PIIX4_SLP# K20
M19
L18
6 PIIX4_INIT#
K19
3 FERR#
L17
6 PIIX4_IGNNE#
L19
6 PIIX4_INTR
L20
6 PIIX4_NMI
P20
6 PIIX4_SMI#
J18
6 PIIX4_STPCLK#
N20
25 RC#
P1
25 GATEA20
M20
6 PIIX4_A20M#
27
TC
1K
V10
R151 2 MEMCS16# Y12
1
+5VS
V15
14,25 MEMR#
U15
14,25 MEMW#
W4
U3
T7
U10
10 FSQ0
Y1
REFRESH# W7
1
2
+5VS
1R315
21K IOCS16#
V12
+5VS
R155 1K
Y3
14 ZWS#
SBHE#
1
2
W12
+5VS
R153
1K
W1
21,27 RSTDRV
Y5
14,25,27 IOR#
T4
14,25,27 IOW#
T3
14,25,27 IOCHRDY
Y4
25,27 AEN
6,14 PIIX4_SLP#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

*

+3V
1

M2
L1
K2
K1
M4
M3
R17
R18
L4
N5
N4

1

2

C8
C6
D4
D2

CLK48
OSC
PCICLK
SUSCLK

L9
L10
L11
L12
M9
M10
M11
M12
D10
E7
E13
M5
R5
M16

1

C/BE#0
C/BE#1
C/BE#2
C/BE#3

MISC

INHIB 12
ENDIM1 12
ENDIM2 12
REQA# 14
REQB# 14
REQC# 14
GNTA# 14
GNTB# 14
GNTC# 14
PHDRST 21
SHDRST 21

12

8,29 RSMRST#

PM

*

FLASH# 26
SIRQ 14,15,27

INHIB
ENDIM1
ENDIM2
REQA#
REQB#
REQC#
GNTA#
GNTB#
GNTC#
PHDRST
SHDRST

SDDO
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

5,12 SDAP4
5,12 SCKP4
25 ATF_INT#
6 CPU_STP#
10 PCI_STP#

E15
B15
D14
C14
A14
C13
A13
C12
D12
B13
D13
B14
E14
A15
C15
D15

14 SMBALT#
14,26 PIIX4_RI#

*
*

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

2

BIOSCS#
RTCALE/GPO25
RTCCS#/GPO24
KBCCS#/GPO26
XOE#/GPO23
XDIR#/GPO22
*
CONFIG1
*
CONFIG2
PCS0#
PCS1#
MCCS#

F20
E18
E20
D18
D20
C20
B20
A20
A19
B19
C19
D19
D17
E19
E17
F19

VLB#
PBTN#
LID#
SMBALT#
PIIX4_RI#

26 VLB#

EXTSMI# *
SUSA#
*
SUSB#/GPO15
*
SUSC#/GPO16
SUS_ST1#/GPO20
SUS_ST2#/GPO21
*
BATLOW#/GPI9
*
PWRBTN#
*
LID/GPI10
SMBALERT#/GPI11
*
RI#/GPI12 *
SMBDATA*
SMBCLK
THRM#/GPI8
CPU_STP#/GPO17
PCI_STP#/GPO18
ZZ/GPO19 *
RSMRST#

U12

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
NC
NC

*

FLASH#
SIRQ

+3VS

RB425D
1UF
2

MASTER

IRQ0/GPO14
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8#/GPI6
IRQ9
IRQ10
IRQ11
IRQ12
IRQ14
IRQ15

V20
W20
V19
U18
T17
T18
U19
U20
P16
N17
P18
T20
R19
H19
R1
R2
K16
M17

25 EXTSMI#
10,25 SUSA#
25 SUSB#
25 SUSC#
6 SUS_STAT#

PCI

D24
C413
1

1

P19
L2
J3
L5
K3
K4
H1
H4
H5
G3

8 PX4_REQ1#
8 PX4_REQ2#
23 GGREQ#
8 REQ#2

PC/PCI DMA

+3VS

PWR

H20
J20
T9
W9
U8
V8
Y8
Y20
U1
U12
W13
T13
V14
Y14

@47PF
2

+3VS

GPI/O

DREQ0
DREQ1
DREQ2
DREQ3
DREQ5
DREQ6
DREQ7

C126
1

PHLD#
PHLDA#
SERR#
STOP#
TRDY#

*

+3V

+5VS

1

PID0
PID1
MID0
MID1
MID2
MID3
PID2
PID3

J19
R3
R4
P5
G1

PCIRST#

1

W15
U6
V2
U5
Y16
U16
U17

2
100

CLKRUN#
DEVSEL#
FRAME#
IDSEL
IRDY#
PAR
PCIRST#
PHOLD#
PHLDA#
SERR#
STOP#
TRDY#
PCIREQ1#
PCIREQ2#
PCIREQ3#
PCIREQ4#

DACK0#
DACK1#
DACK2#
DACK3#
DACK5#
DACK6#
DACK7#

1
R141

C10
E5
A5
A3
B5
B6
A1
B12
A12
A6
D5
C5
E10
A11
B11
C11

U14
W6
Y10
V5
T15
V16
W17

AD18

CLKRUN#
DEVSEL#
FRAME#
PIIX4_IDSEL
IRDY#
PAR

2
R342 1K

2

SIRQ
PIRQA#
PIRQB#
PIRQC#
PIRQD#

M1
N2
P3
N1
P2
P4
J17
H18
K18

1

E

2 1
3

2

REQA#
REQB#
REQC#
GNTA#
GNTB#
GNTC#

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQA#/GPI2
REQB#/GPI3
REQC#/GPI4
GNTA#/GPO9
GNTB#/GPO10
GNTC#/GPO11
APICACK#/GPO12
APICCS#/GPO13
APICREQ#/GPI5

MID0
MID1
MID2
MID3

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PIRQA#
PIRQB#
PIRQC#
PIRQD#

D

VRCHGNG# 6
25 SCI#

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

14,15,23
14,15,23,31
14,17,23
14,31

8
7
6
5

C

30 ACIN_SYS#

B10
A10
D9
C9
B9
A9
D8
E8
B8
A8
D7
C7
B7
A7
D6
E6
E4
C4
B4
A4
D3
E3
C3
B3
E2
C2
B2
A2
D1
E1
C1
B1

+3VS

B

AD[0..31]

8,31 AD[0..31]

GND
GND
GND
GND
GND
GND
GND
GND

A

RP28
8P4R_10K
1
2
3
4

+3V

1K
IRQ8# 25

PID[0..3]
CLKRUN#
DEVSEL#
FRAME#
IRDY#
PAR
PCIRST#
PHLD#
PHLDA#
SERR#

PID[0..3] 23
CLKRUN# 8,14,23,27,31
DEVSEL# 8,14,31
FRAME# 8,14,31
IRDY# 8,14,31
PAR 8,14,31
PCIRST# 7,16,31
PHLD# 8,14
PHLDA# 8,14
SERR# 8,14,31
D

2

R176 100K

Title

Compal Electronics, inc.
SCHEMATIC, M/B LA-733

Size

B
Date:

Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

13

of

47

D

FOR PIIX4

1

1
C395
.01UF

C394
.01UF
2

1
C405
.01UF
2

C402
.1UF

1
C406
.01UF

2

1000PF

C409
.01UF
2

C397

2

.1UF

+3V

1

1

1

C411
C408
.1UF

2

2

C396
.1UF

2

SA[0..19]

1

+3VS

1

SD[0..15]

13,25,27 SA[0..19]

C392
.1UF

1

+3VS

13,25,27 SD[0..15]

1

1
C390
.1UF

2

PCI BUS Pull-up

C407
.1UF
2

ISA BUS Pull-up

2

C398
.1UF

+3VS

2

1

1

+3VS

1

E

2

C

1

B

2

A

+5VS

5
6
7
8

RP11

RP9
4
3
2
1

31 PERR#
8,13 PHLDA#
8,13,31 STOP#
8,13,31 SERR#

IOW#
13,25
MEMR# 13,25
MEMW#
13,25,27
IOR# 13,25,27

PERR#
PHLDA#
STOP#
SERR#
+3VS

8P4R_4.7K

1
2
3
4
5

10
9
8
7
6

PIRQ#A
PIRQ#B
PHLD#
CLKRUN#

+3VS
PIRQA# 13,15,23
PIRQB# 13,15,23,31
PHLD# 8,13
CLKRUN# 8,13,23,27,31

10P8R_10K
1 R312

2

IRQ5 13

10K
5
6
7
8

2

RP31

+3VS
4
3
2
1

IRQ11
IRQ12
IRQ14
IRQ15

NOTE: +3V 8.2K
RP29
1
2
3
4

13
13,25
13,22
13,22

8
7
6
5

8P4R_10K
+3VS
R140 1K
1
2 ZWS#
R307 1K
1
2 IOCHRDY

1
ZWS# 13

1
2
3
4
5

2

IOCHRDY 13,25,27

RP10
1
2
3
4

10
9
8
7
6

+5VS
IRQ4
IRQ6
IRQ7
IRQ9

SIRQ 13,15,27

R171 10K
+3VS

RP30
IRQ0
IRQ1
IRQ10
IRQ3
+5VS

2

8P4R_10K

+5VS

13
13,25
13
13

PIRQC# 13,17,23
PIRQD# 13,31
PAR 8,13,31
PLOCK# 8

IRDY#
DEVSEL#
TRDY#
FRAME#

8
7
6
5

IRDY# 8,13,31
DEVSEL# 8,13,31
TRDY# 8,13,31
FRAME# 8,13,31

8P4R_10K
13
13
13
13

+3V

RP39
4 PBTN#
3
2 SMBALT#
1 PIIX4_RI#

5
6
7
8

10P8R_10K

PBTN# 13
LID# 13
SMBALT# 13
PIIX4_RI# 13,26

RP8
3

SD4
SD7
SD2
SD3
+5VS

6
7
8
9
10

5
4
3
2
1

SD5
SD0
SD1
SD6

+3VS
R133
1
R134
1
R302
1

10P8R_4.7K
RP13
SD9
SD10
SD8
SD15
+5VS

6
7
8
9
10

5
4
3
2
1

SD11
SD12
SD13
SD14

13
13
13
13,27

DRQ7
DRQ6
DRQ5
DRQ0

4

GNTA# 13
GNTB# 13
GNTC# 13

+3VS

1
2
3
4

RP7

8
7
6
5

REQA#
REQB#
REQC#
PIIX4_SLP#

REQA# 13
REQB# 13
REQC# 13
PIIX4_SLP# 6,13

8P4R_10K

RP35
10
9
8
7
6

10K
2
10K
2
10K
2

+5VS

10P8R_4.7K

DRQ7
DRQ6
DRQ5
DRQ0

3

8P4R_4.7K

+5VS

1
2
3
4
5

DRQ1 13,27
DRQ3 13,27
DRQ2 13,27

4

10P8R_4.7K

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

14

of

47

SLATCH 16
PCM_SPK# 19
Add by Charles at 3/27

Add by Charles at 1/4
Q7
2N7002
2
SYSON_ALW 30

S
D

R83

22K

S2_VCC

1

C72

C40

1

1
1

1

C42

C48

C321

.1UF
.1UF
2

.1UF
2

.1UF
2

.1UF

2

S1_VCC

2

S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A7
S1_A8
S1_A9
S1_A10
S1_A11
S1_A12
S1_A13
S1_A14
S1_A15
SA_A16
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25

A_BVD1/CSTSCHG
A_BVD2/CAUDIO
A_CD1#/CCD1#
A_CD2#/CCD2#
A_READY/CINT#
A_WAIT#/CSERR#
A_WP/CCLKRUN#
A_INPACK/CREQ#

138
137
82
140
135
136
139
127

S1_BVD1
S1_BVD2
S1_CD1#
S1_CD2#
S1_RDY#
S1_WAIT#
S1_WP
S1_INPACK#

A_CE1#/CC/BE0#
A_CE2#/CAD10
A_WE#/CGNT#
A_IORD#/CAD13
A_IOWR#/CAD15
A_OE#/CAD11
A_VS1#/CVS1
A_VS2#/CVS2
A_REG#/CC/BE3#
A_RESET/CRST#

94
97
110
99
101
98
134
122
130
124

C41

1

133
132
131
128
126
125
123
119
104
102
95
100
117
106
108
115
112
103
105
107
109
111
114
116
118
121

1000PF

C53

1000PF

C80

1000PF

1000PF
2

A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A7/CAD18
A_A8/CC/BE1#
A_A9/CAD14
A_A10/CAD9
A_A11/CAD12
A_A12/CC/BE2#
A_A13/CPAR
A_A14/CPERR#
A_A15/CIRDY#
A_A16/CCLK
A_A17/CAD16
A_A18/RSVD
A_A19/CBLOCK#
A_A20/CSTOP#
A_A21/CDEVSEL#
A_A22/TRDY#
A_A23/CFRAME#
A_A24/CAD17
A_A25/CAD19

C322

1

S1_D0
S1_D1
S1_D2
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_D8
S1_D9
S1_D10
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15

2

141
144
146
83
85
88
90
92
142
145
147
84
87
89
91
93

1

A_D0/CAD27
A_D1/CAD29
A_D2/RSVD
A_D3/CAD0
A_D4/CAD1
A_D5/CAD3
A_D6/CAD5
A_D7/CAD7
A_D8/CAD28
A_D9/CAD30
A_D10/CAD31
A_D11/CAD2
A_D12/CAD4
A_D13/CAD6
A_D14/RSVD
A_D15/CAD8

+3VALW

1

+3VALW

U28

2
R281
1

2 S1_A16
47
Placement near
to PCMCIA
controller

R78

S1_RST

1

22K
2

S1_VCC

1

2

S1_VCC

R62

22K

1

+3V
1

S1_CE1# 16
S1_CE2# 16
S1_WE# 16
S1_IORD# 16
S1_IOWR# 16
S1_OE# 16
S1_VS1 16
S1_VS2 16
S1_REG# 16
S1_RST 16

S1_WP

R50
22K

R49
22K
D16

PCM_INTA#

2

S1_VS1
S1_VS2

S1_A23

S1_BVD1 16
S1_BVD2 16
S1_CD1# 16
S1_CD2# 16
S1_RDY# 16
S1_WAIT# 16
S1_WP 16
S1_INPACK# 16

2

S2_VCC_R

+3VALW

2

120

38

S2_VCC

1

GND

2

PIRQA# 13,14,23

RB751V
D15

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

1
RIOUT#/PME#

+3V_PCMCIA

.1UF

VCCA

VCCB

1

W=40mils 1
2
C74
R71
0_0805
2

13
22
44
75
96
129
153
167
181
194
207

163

182
1
100

+3VALW

R72
W=40mils 1 0_0805 2

2
7
31
64
86
113
143
164
187
201
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

1
178

148
VCCI

VCCP
VCCP

175

168

169

152
151
150
149
R47

2

S2_VCC

2

15
14
12
11
10
9
8
6
4
3
2
172
208
206
205
204
191
190
189
188
186
185
184
183
179
165
177
176
174
173
171
170
1

2

S_AD0
S_AD1
S_AD2
S_AD3
S_AD4
S_AD5
S_AD6
S_AD7
S_AD8
S_AD9
S_AD10
S_AD11
S_AD12
S_AD13
S_AD14
S_AD15
S_AD16
S_AD17
S_AD18
S_AD19
S_AD20
S_AD21
S_AD22
S_AD23
S_AD24
S_AD25
S_AD26
S_AD27
S_AD28
S_AD29
S_AD30
S_AD31

S2_A23

22K

IRQ/DMA

PCM_INTB#
PCM_INTA#

R84
1

A

S_AD15

S2_WP

Slot

B

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

S2_RST

Slot

INTA#/MFUNC0
INTB#/MFUNC1
SUSPEND#
DMAREQ#/MFUNC2
IRQSER/MFUNC3
LOCK#/MFUNC4
DMAGNT#/MFUNC5
CLKRUN#/MFUNC6

S2_VS1
S2_VS2

Interface

IDSEL

B_CE1#/CC/BE0#
B_CE2#/CAD10
B_WE#/CGNT#
B_IORD#/CAD13
B_IOWR#/CAD15
B_OE#/CAD11
B_VS1#/CVS1
B_VS2#/CVS2
B_REG#/CC/BE3#
B_RESET/CRST#

PCI

.1UF

2

S1_VCC_R

Power

154
155
156
157
158
159
160
161

28
30
46
33
35
32
68
56
63
58

16 S2_CE1#
16 S2_CE2#
16 S2_WE#
16 S2_IORD#
16 S2_IOWR#
16 S2_OE#
16 S2_VS1
16 S2_VS2
16 S2_REG#
16 S2_RST

DATA
CLOCK
LATCH
SPKOUT#

B_BVD1/CSTSCHG
B_BVD2/CAUDIO
B_CD1#/CCD1#
B_CD2#/CCD2#
B_READY/CINT#
B_WAIT#/CSERR#
B_WP/CCLKRUN#
B_INPACK/CREQ#

S2_BVD1
S2_BVD2
S2_CD1#
S2_CD2#
S2_RDY#
S2_WAIT#
S2_WP
S2_INPACK#

G_RST#

72
71
16
74
69
70
73
61

16 S2_BVD1
16 S2_BVD2
16 S2_CD1#
16 S2_CD2#
16 S2_RDY#
16 S2_WAIT#
16 S2_WP
16 S2_INPACK#

GNT#

B_A0/CAD26
B_A1/CAD25
B_A2/CAD24
B_A3/CAD23
B_A4/CAD22
B_A5/CAD21
B_A6/CAD20
B_A7/CAD18
B_A8/CC/BE1#
B_A9/CAD14
B_A10/CAD9
B_A11/CAD12
B_A12/CC/BE2#
B_A13/CPAR
B_A14/CPERR#
B_A15/CIRDY#
B_A16/CCLK
B_A17/CAD16
B_A18/RSVD
B_A19/CBLOCK#
B_A20/CSTOP#
B_A21/CDEVSEL#
B_A22/CTRDY#
B_A23/CFRAME#
B_A24/CAD17
B_A25/CAD19

REQ#

67
66
65
62
60
59
57
54
39
36
29
34
52
41
43
50
48
37
40
42
45
47
49
51
53
55

5
203
192
162

2
202
200
199
198
195
196
166
197
193

S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A7
S2_A8
S2_A9
S2_A10
S2_A11
S2_A12
S2_A13
S2_A14
R280
S2_A15
S2_A16
1
2 SB_A16
S2_A17
S2_A18
47
S2_A19
Placement near
S2_A20
to PCMCIA
S2_A21
controller
S2_A22
S2_A23
S2_A24
S2_A25

1

+3V_PCMCIA +3VALW

PAR
SERR#
PERR#
STOP#
IRDY#
TRDY#
RSTIN#
DEVSEL#
FRAME#

B_D0/CAD27
B_D1/CAD29
B_D2/RSVD
B_D3/CAD0
B_D4/CAD1
B_D5/CAD3
B_D6/CAD5
B_D7/CAD7
B_D8/CAD28
B_D9/CAD30
B_D10/CAD31
B_D11/CAD2
B_D12/CAD4
B_D13/CAD6
B_D14/RSVD
B_D15/CAD8

2

12

D
76
78
80
17
19
21
24
26
77
79
81
18
20
23
25
27

C77

.1UF

10PF

17,31 S_PAR

S2_D0
S2_D1
S2_D2
S2_D3
S2_D4
S2_D5
S2_D6
S2_D7
S2_D8
S2_D9
S2_D10
S2_D11
S2_D12
S2_D13
S2_D14
S2_D15

C271

C270

C/BE0#
C/BE1#
C/BE2#
C/BE3#

3
S

31 S_SERR#

2N7002
Q9
1

.1UF
33

180

G

100K

C43

R244

PCLK

2
2

1

1

1

+3VALW

1
17,31 S_FRAME#
17,31 S_DEVSEL#
17,31 S_PCIRST#
17,31 S_TRDY#
17,31 S_IRDY#
17,31 S_STOP#
31 S_PERR#

R55
+12VS

CARDBUS
PCI1420

+3V
3

CBRST#
1
2
1R458 10 2
R459 10

G

13,16,23 RTCCLK
16 SLDATA
16,23 DEV_RST#
8 GNT#3
8 REQ#3
17,31 S_C/BE#3
17,31 S_C/BE#2
17,31 S_C/BE#1
17,31 S_C/BE#0
10 PCLK_PCM

S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]
S_AD[0..31]
S_C/BE#[0..3]

16 S1_D[0..15]
16 S1_A[0..25]
16 S2_D[0..15]
16 S2_A[0..25]
17,31 S_AD[0..31]
17,31 S_C/BE#[0..3]

PCM_INTB#
PCI1420

1

2

PIRQB# 13,14,23,31

@RB751V

S_PME# 17,31
S_CLKRUN# 31
PCM_RI#
PCM_RI# 28
1
2
SIRQ 13,14,27
R460 10
Add by Charles at 3/27

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

R48
1
2
D14

22K
2
1

Compal Electronics, inc.

+3V
PCM_SUSP# 25

Title

SCHEMATIC, M/B LA-733

RB751V
Size

B
Date:

Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet

15

of

47

A

B

C

D

E

PCMCIA POWER CTRL.
CARDBUS

SOCKET

+12VALW
S1_VPP

S1_VPP

1

1

S1_VCC

15 S1_RDY#
15 S1_WE#

3

15 S1_IOWR#
15 S1_IORD#
15 S1_VS1
15 S1_OE#
15 S1_CE2#

15 S1_CE1#

S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3

1
C296 .1UF

S2_BVD1 15
S2_BVD2 15

+3VALW

S2_REG# 15

DATA
LATCH
CLOCK

R270

13
19
18

NC
STBY#
OC#

@100K

2

C295
4.7UF_10V_0805

NC
NC
NC
MODE

26
27
28
29

GND

12

DEV_RST#

TPS2216AI

S2_INPACK# 15

S2_WAIT#
S2_A4
S2_RST
S2_A5
S2_VS2
S2_A6
S2_A25

S2_VCC
TPAD1

6 TP
14

RESET
RESET#

3
5
4

15 SLDATA
15 SLATCH
13,15,23 RTCCLK

S2_VPP

S2_WAIT# 15

2

S2_RST 15
S2_VS2 15

S2_A7
S2_A24
S2_A12
S2_A23
S2_A15
S2_A22

S1_VCC
C337
.1UF

C352
.01UF

C355
4.7UF_10V_0805

+3VALW

S2_A16

C71
.1UF

S2_VPP
S2_VCC

PCMRST# 25

S2_A21
S2_RDY#
S2_A20
S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13

14
S2_VCC

S2_RDY# 15
S2_WE# 15

C340
.1UF

C294
.01UF

2

7,13,31 PCIRST#
C347
4.7UF_10V_0805

7
+3VALW POWER

DEV_RST#

3
U5A
74LVC125

R51

S2_A17
S2_A8
S2_IOWR#
S2_A9
S2_IORD#

DEV_RST# 15,23

10K
+3VALW

3

S1_VPP
S2_IOWR# 15
C335
.01UF

S2_IORD# 15

S2_A11
S2_VS1
S2_OE#
S2_CE2#
S2_A10

C356
4.7UF_25V_1206

S2_VS1 15
S2_OE# 15
S2_CE2# 15
C351

S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6

S2_CE1# 15

S1_CD1# 1
1000PF

S2_VPP

2

C293
.01UF

C353
S1_CD2# 1
2
1000PF
C346
S2_CD1# 1
2
1000PF

S2_D12
S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3

C348
4.7UF_25V_1206

C345
S2_CD1# 15

S2_CD2# 1

2

1000PF

78
79
80
81

78
79
80
81

15 S1_CD1#

S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13

C323 .1UF

S2_VPP

1

S1_VPP

3.3V
3.3V
3.3V

23
20
21
22

1

S1_A16

15
16
17

BVPP
BVCC
BVCC
BVCC

2

S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22

C301 .1UF

S2_A0
S2_BVD2
S2_A1
S2_REG#
S2_A2
S2_INPACK#
S2_A3

5V
5V
5V

1

15 S1_VS2

C320 .1UF

S2_D10
S2_D2
S2_D9
S2_D1
S2_D8
S2_D0
S2_BVD1

1
2
30

C336
4.7UF_10V_0805

2

15 S1_RST

C330 .1UF

S2_CD2# 15
S2_WP 15

8
9
10
11

1

15 S1_WAIT#

C307 .1UF
S2_CD2#
S2_WP

AVPP
AVCC
AVCC
AVCC

2

2

S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25

B77
B76
B75
B74
B73
B72
B71
B70
B69
B68
B67
B66
B65
B64
B63
B62
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
B51
B50
B49
B48
B47
B46
B45
B44
B43
B42
B41
B40
B39
B38
B37
B36
B35
B34
B33
B32
B31
B30
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1

12V
12V

1

15 S1_INPACK#

b68
b34
b67
b33
GND
b66
b32
b65
b31
b64
b30
b63
GND
b29
b62
b28
b61
b27
b60
b26
GND
b59
b25
b58
b24
b57
b23
b56
GND
b22
b55
b21
b54
b20
b53
GND
b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13
GND
b46
b12
b45
b11
b44
GND
b10
b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1

NC

7
24

2

15 S1_REG#

S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3

a68
a34
a67
a33
GND
a66
a32
a65
a31
a64
a30
a63
GND
a29
a62
a28
a61
a27
a60
a26
GND
a59
a25
a58
a24
a57
a23
a56
GND
a22
a55
a21
a54
a20
a53
GND
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
GND
a46
a12
a45
a11
a44
GND
a10
a43
a9
a42
a8
GND
a41
a7
a40
a6
a39
a5
GND
a38
a4
a37
a3
a36
a2
a35
a1

1

15 S1_BVD2

S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1

A77
A76
A75
A74
A73
A72
A71
A70
A69
A68
A67
A66
A65
A64
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
A51
A50
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1

1UF_25V_0805

2

15 S1_BVD1

S1_CD2#
S1_WP

S1_VCC

25
+3VALW
C83

15 S1_CD2#
15 S1_WP

U29

1

JP4

+5VALW

2

15 S1_D[0..15]
15 S1_A[0..25]
15 S2_D[0..15]
15 S2_A[0..25]

S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]

4

PCMC154PIN

4

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

16

of

47

A

B

Reserved
by Charles
at 6/25

C

1

+5VAU
L18
1

2

2

1

+12VALW
C267

+5VALW

HB-1M2012-121JT

Place component's to Es1988

1

8

U24A

D13
AS2431L

S_AD[0..31]
S_C/BE#[0..3]

1

2

20,21 CD_AGND

R17
0
R2
0

2

33 DOCK_LIN_L
33 DOCK_LIN_R

2

R20 1
6.8K
2
2 R5
1
6.8K

2
1UF

PC_BEEP

1
1

R19 1
6.8K
R4
1
6.8K

19 MICIN
CD_GNA
CD_L_R
1
CD_R_R C13

2
1UF

1
C17

2
1UF

18,20 LEFT_EQ
18,20 RIGHT_EQ

1
C255
1
C16
1
C14
1
C15
1
C18
1
C31
1
C34

2
1UF
2
1UF
2
1UF
2
1UF
2
1UF
2
1UF
2
1UF

65
81

PHONE
MONO_OUT

69

MIC

67
66
68

CD_GND
CD_L
CD_R

70
71
79
80
75
76
77
78

C232
3

C242

1000PF 1000PF

C25

C28

.1UF

.1UF
AGND
C245
10UF_10V_1206

AVSS1
AVSS2
GND
GND
GND
GND

R481
33

2

C275
1

2
1

1

2

R258
5.11K_0.5%

2

5.11K_0.5%

Q66
2N7002

R259
1

2 2

C276
1

+5VAMP

220PF
C273
.1UF

0

Change by Charles
at 2/16

1

MD_SDATAI 31
MD_RST# 31

1

39

49
48
47
63
62
61
60
56
53
52
51
50
59
85
84

2

3
R54
442_1%

U3
ES1988

+12VS
R46

AVDD_AC97

1 Q3

1
VCC
VCC
VCC

90
41
12

AVDD1
AVDD2

72
83

VREF

74

REQ#
GNT#

92
91

2 2
3 SI2304DS

2

100K
AVDD

AUD_VREF
Add by Charles at 3/27
REQ#4 8
GNT#4 8

PCICLK

88

2
1
2R455 10 1
R456 10
PCLK_AUD

INT#
RST#

87
86

2
1
R457 10

PIRQC# 13,14,23
S_PCIRST# 15,31

C/BE3#
C/BE2#
C/BE1#
C/BE0#

1
13
20
30

PME# / SPDIFO / VOLDN#
SPDIFO / R0# / IDSEL
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
VAUX

54
2
19
18
17
16
15
14
55

LINE_OUT_L
LINE_OUT_R
AFILT1
AFILT2
VCM
VREFADC

Add
discharge
CKT at
6/27 by
Charles

PCLK_AUD 10

S_C/BE#3
S_C/BE#2
S_C/BE#1
S_C/BE#0
2 R243
100

1 S_AD19

AVDD_AC97
L15

15,31
15,31
15,31
15,31

1

AVDD

2

HB1M2012-121JT

S_PME# 15,31
S_PAR 15,31
S_STOP# 15,31
S_DEVSEL# 15,31
S_TRDY# 15,31
S_IRDY# 15,31
S_FRAME# 15,31

C251
.1UF

C231
4.7UF_10V_0805

3

+3VALW

4

R3
0

12

Change by
Charles at
2/25

C243
.1UF

C11
1UF

C5
.1UF

15PF

2

1

L17
0_0805
1
L13
0_0805
1

2

4

Compal Electronics, inc.

2
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

L3
0_0805

Date:
A

C244
1UF

2

R18
@24K

C38

1

CD_R_R

10

20 CDROM_R

2

CD_L_R

1

1

1

2

2

2

AUD_VREF

1

1

Change
value by
Charles
at 2/10

2

2

20 CDROM_L

+3VALW
R44

1

1

2

R1
0

2

Place closely to Es1988
PCLK_AUD
1

R16
@24K

S_AD0
S_AD1
S_AD2
S_AD3
S_AD4
S_AD5
S_AD6
S_AD7
S_AD8
S_AD9
S_AD10
S_AD11
S_AD12
S_AD13
S_AD14
S_AD15
S_AD16
S_AD17
S_AD18
S_AD19
S_AD20
S_AD21
S_AD22
S_AD23
S_AD24
S_AD25
S_AD26
S_AD27
S_AD28
S_AD29
S_AD30
S_AD31

38
37
36
35
34
33
32
31
29
28
27
26
25
24
23
22
11
10
9
8
7
6
5
4
100
99
98
97
96
95
94
93

C238
10UF_10V_1206

73
82
89
40
21
3

LINE_IN_L
LINE_IN_R

CLKRUN# / ECS

1
C12

R257
5.1K

1

2

1
6.8K

LM358

1

31 MOD_SPK
31 MOD_MIC

19 MONO_IN

1
6.8K2
R15

GPIO15 / GD7
GPIO14 / GD6
GPIO13 / GD5
GPIO12 / PCGNT# / GTO# / GS0
GPIO11 / SDO2 / VauxD
GPIO10 / SCLK2
GPIO9 / SDFS2
GPIO8 / SDI2
GPIO7 / MC97_DI / PCREQ# / VOLUP#
GPIO6 / ISDATA / R0#
GPIO5 / ISLR / GS0 / GT0#
GPIO4 / ISCLK / SIRQ#
GPIO3 / SRESET2
GPIO2 / TXD
GPIO1 / RXD

64

C221 1500PF
NPO
2
R14

46
45
44
43
42
OSCI
OSCO

GD4
GD3 / ECLK / VOLDN#
GD2 / EDIN / VOLUP#
GD1 / EDOUT
GD0

57
58

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

2

2

-

2

2

2 1

+3VS

R40

Add by Charles at
12/1

LK1608-1R0K

1

1
22

10K
L12

3 SI2306DS

2

@4.7K

2
R423

2

68PF
R251

Add by
Charles
at 1/4

R240

19 MUTE
31 MD_SYNC
31 MD_BITCLK
31 MD_SDATAO
26 AUTO_GAIN_CONTROL
13 SYS_VOL_UP#
13 SYS_VOL_DW#

1

2

1
0

2

1

1
2
R220

1

C226 33PF
NPO

2

R26
1M
Y3
@49.152 MHz

Y4
49.152 MHz

1

1 Q28

+

EN_CDPLAY# 20

Q2
2N7002

2

Add by
Charles
at 3/1
C225 10PF
NPO

2
2

3
2

2

3

1

Delete for D3
cold

Change by
Charles at
2/16

2
R245
100K
C272
.1UF

4

3

1

1

2

1

15,31 S_AD[0..31]
15,31 S_C/BE#[0..3]

+5VALW

2

.1UF

R242
2.4K

1

C259
.01UF

1

1

C257
4.7UF_10V_0805
2

1

1

C258
.1UF

C266
.01UF
2

C264
.1UF

2

C265
4.7UF_10V_0805

4.7UF_10V_0805

1

C39

+

.01UF

2

C262

2

.01UF

1

1
C268

2
L16
@HB1M2012-601JT

2

.01UF

1

1

C35

2

.1UF

2

C261

2

.1UF

1

1

C269

2

2

.1UF

2

C263

1

1

1

AVDD

+5VALW

.1UF
2

E

+3VS
1

C32

D

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

17

of

47

A

B

C

D

E

Change power
source by
Charles at
2/2

560K_1%

OUT4

11

OUT4_L

EQ_L_INPUT5

12

IN5

OUT5

13

OUT5_L

14

IN6

OUT6

15

Change power
source by
Charles at
2/2
L2
1
2
HB1M2012-601JT

+5VEQR

+5VAMP

1
1

2

2

C7

300K_1%

L_EQ

1

2

300K_1%

2

OUT4_L

82PF
R218
75K_1%

18299HZ
+6dB
Q=1.41

1

C10

R22
L_EQ

75K_1%

U49B
74HCT4066

R25

220PF
1

C3

R10

10

HPS_DIS

R11

82PF

U49A
74HCT4066

14
11
7
12

2

Add by Charles
at 5/20

2

HPS_PLUG

3410HZ
-6dB
Q=0.707

1
2
127K_1%

1

OUT5_L

2

220PF
R227
39K_1%

7646HZ
+1.45dB
Q=1.59

2

1

1UF

OUT3_L

2

330PF
R213
200K_1%

EQ_L_INPUT5

1

.01UF

LMV801

Add by
Charles at
4/19

2

C2
14
1
7
13

C19

1

EQ_IN_L

9

1

22K

C543

16

R7

LEFT 19

1

SUM_OUT

LEFT

2
@0

2

REF

1

EQ_L_INPUT4

1

2

8

1
2
200K_1%

2230HZ
-6dB
Q=0.72

R42
LEFT_EQ

L_EQ

1

1

22K

OUT2_L

2

470PF
R27
200K_1%

2

IN4

536HZ
+6dB
Q=1.41

1

1

OUT3

10

1
2
220K_1%

1

IN3

EQ_L_INPUT4

L_EQ

2

OUT3_L

OUT1_L

2

1500PF
R31
140K_1%

1

200K_1%
C4

R6

2

OUT2_L

6

IN2

1

2

4

7

2
140K_1%
2

OUT2

5

EQ_L_INPUT3

1

1UF

C9

R21

1

1

C22

R30

R13

330PF

1

OUT1_L

OUT1

EQ_L_INPUT2

R8

LEFT_EQ

17,20 LEFT_EQ

5V

IN1

GND

2

+5VEQL

3

2

U1
EQ_L_INPUT1

C1

220K_1%

470PF

1

1500PF
C517
L_EQ

EQ_L_INPUT3

R24

1

C6

2

2

EQ_L_INPUT2

R28

2

4.7UF_10V_0805

C21

1

.1UF

1

2

C26

2

EQ_L_INPUT1

Add by
Charles
at 3/22

C23

2

L1
1
2
HB1M2012-601JT +5VAMP

+5VEQL

R464
EQ_IN_L

C24

C27

.1UF

4.7UF_10V_0805

1

2
@0

EQ_R_INPUT3

7

IN3

OUT3

6

OUT3_R

EQ_R_INPUT4

10

IN4

OUT4

11

OUT4_R

IN5

OUT5

13

OUT6

15

EQ_R_INPUT5

12

22K

IN6

8

REF

SUM_OUT

9

1

2

1500PF
R231
140K_1%

OUT5_R

1
2
220K_1%

536HZ
+6dB
Q=1.41

2
200K_1%

1

OUT2_R

2

470PF
R223
200K_1%

C223

R9
R_EQ

1
2
200K_1%

2230HZ
-6dB
Q=0.72

1

1

1

R_EQ

2

2
C230

R222
OUT1_R

R217

330PF

1

2
140K_1%

EQ_IN_R

2

2
2
1

C237

R230

1UF

C222

220K_1%

OUT3_R

2

330PF
R12
200K_1%

3410HZ
-6dB
Q=0.707

2 RIGHT

1

RIGHT 19

@0

1

C224
C527

R221

+5VCD

C229

300K_1%

82PF

2

2

82PF
R214
75K_1%

1
OUT4_R

R_EQ

18299HZ
+6dB
Q=1.41

1

14
8
7

3 Q54
2N7002

1

9

1
2
127K_1%
2

2

300K_1%
C234

R225
1

OUT5_R

2

220PF
R232
39K_1%

7646HZ
+1.45dB
Q=1.59

1

U49D
74HCT4066

1
75K_1%

2

5
2

6

1
2

1

19 HPS

3
U49C
74HCT4066

HPS_PLUG

2
1

R_EQ

.1UF 14
4
7

R465
10K
R466
10K

C227

R219

1

+5VCD

Add by Charles
at 5/20

R229

220PF

1

+5VCD

3

EQ_R_INPUT5
2

EQ_R_INPUT4

R241

LMV801

1

1UF

2

C236

.01UF

1

C544

RIGHT_EQ
22K

2

R216

2

3

16

2

1

14

RIGHT_EQ

17,20 RIGHT_EQ

C518
R_EQ 1

R226

470PF

1

R215

C228

560K_1%

1

OUT2

R233

1500PF

2

IN2

OUT2_R

1

OUT1_R

4

EQ_R_INPUT3

1

1

EQ_R_INPUT2

2

OUT1

IN1

2

5

EQ_R_INPUT1

1

3

EQ_R_INPUT2

5V

EQ_R_INPUT1

GND

2

+5VEQR

Add by
Charles
at 3/22 C235

2

U21

3
HPS_DIS

Q55
2N7002

R467
EQ_IN_R

Add by Charles at 4/19

1

2
@0

Change value by Charles at 5/26

4

4

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

18

of

47

A

B

C

Add by Charles at
5/20 for PO-PO
sound
+5VAMPP

1

Q61
2N7002
2

26 EC_MUTE
+5VAMP

2

D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3
1

L14
HB1M2012-601JT

+

R_UP/DOWN#

6

L_UP/DOWN#

7

2

MODE

R36
100K

4

ADJVOL_UP/DW# 26
AVDD

14
16

SVR

Modify by Charles at 2/16
R246
18K_1%

TDA8552TS

2

C278
1UF

Q16
SI2304DS
1
3 MIC

32 INT_MIC

+5VS
R157

2

+5VS

R144

2

100K

1

2

33 INTMICOFF#

2

2

7

+

2

-

2

1

R272
1

1UF

1
2

Q26
3 2SC2411EK

2

1

Modify by Charles at 2/16

U22B
@TDA1308
MICIN

7

+

5

-

6

R29
@0
1

14

+3VALW POWER

1

1UF

1

MIC

0

2

R269
1

0

2
560

C8
1

R271
10K

D18
RB751V

4

1

R470

2
1

+12VS

100K
Title

2

2

2

@15PF MUTE_AUD 2
3 Q59
2N7002

Compal Electronics, inc.
SCHEMATIC, M/B LA-733

Size

B
Date:
A

C20
2

R23
C290
1
2

2

4

2
Q58
SI2304DS
3
1

4

17 MICIN

1

3

13 SPKR

U26B
74LVC14

1

7
4

2

AVDD

1UF_16V_0805
R235
@10K

560
2

U26C
74LVC14
+3VALW POWER

1

C246
4.7UF_10V_0805

2

2

MONO_IN 17

7

6

14

5

+
C239
@.1UF

C240
@.1UF

C241
C306

15 PCM_SPK#
Change
value by
Charles at
5/3

3

4

.22UF

AUD_VREF

1UF
R237
10K

2

2

1

1

2

+3VALW POWER

R32

1

2.2K

2

1

C248
1

2

@0

U22A
@TDA1308
1
1

2

3

Q1
3 2SC2411EK

3

1

C285

R234

1

R268
560
1

1

Change
value by
Charles at
5/3

2

6
+3VALW POWER

C289
1UF

U26A
74LVC14

2

14

4

2
5

1
2

R239
10K

.1UF

R266 10K_1%
1
2

JOPEN9
2MM

AVDD

8

R267
100K_1%
U5B
74LVC125

1
330PF

AVDD

C280
2

FOXCONN JA6033L-101
2

C50

AVDD

1

1
26 BEEP#

C277

330PF

3 Q13
2N7002

Q15
DTC124EK

+3VALW
+3VALW

+12VS

22K
22K

1

2

100K

2

1

10K

3

R147

1

1
1
1

2

2

Add by Charles at 3/21
(Only for reserved)

3
6
2
1

2

R471
10K

5
4

L20
HB1M1608-601JT
1
2
EXT_MIC
1
2
L19
HB1M1608-601JT

DOCK_MIC 33

U48
NC7ST32_SC70
+5VALW POWER
2

R473
@10K

EXT_MIC

MIC
JP24

R53
2.2K
2

MUTE_AUD

2
3

1

1

R438
@0

R260
100K

2

1

4

26 EC_MUTE

Q6
3 2SC2411EK

2

2

2

1

1

.1UF 5
1

AVDD

8

17 MUTE

R444
0
2

R247
18K_1%

1

7

D49
@RB751V

5

7
8

+5VALW
C526
1
2

5

6

1

2
@100K

GND1
GND2
GND3
GND4

1

1

U37B
74HCT125
+5VALW POWER
+5VALW
R445
C76
30dB/20dB#
2
1
1
2
+5VAMP
100K
.1UF
2
1
R43
@100K
D48
HPS
2
1
2
1
U6A
74HCT14
C249
C33
RB751V
+5VALW POWER
.1UF
2.2UF_16V_0805

1

+5VAMP

1
10
11
20

7

R33

14

2

2

14

HPS

Add by
Charles at
1/4 for
PC99

DIS_ADJVOL 26

R45
0
4

Add pullup
to pin 4
by Charles
at 6/22

U46D
74HCT32
+5VALW POWER

4
U6B
74HCT14
+5VALW POWER

SPKL- 32

7

2

GAINSEL

3

33 INTSPKOFF#

3

2

HPS 1

11

1
2

INTSPL_L- 1
Q65
SI2304DS

SPKL+ 32
LINEOUT_L 32,33

LINEOUTL
150UF_TPB_6.3V

14

2

14
12

18 HPS
2

Control
by SPR

9

R482
100K

2

D46
RB751V

13
7

LOUT-

2

2

R238
820K

+5VALW

R41
100K

R37
@10K

2

1

1

R35
@10K

LOUT+

3
Q64
SI2304DS C254

1

LLINEIN

SPKR- 32
1

1

2
15
2.2UF_16V_0805

+5VALW

32,33 LINE_OUT_PLUG

3

1

SPKR+ 32
LINEOUT_R 32,33

LINEOUTR
150UF_TPB_6.3V

2

1
C36

+5VAMP

Control by
headphone
out

19

C253

+

1
1

2

+5VALW

3
Q62
SI2304DS

INTSPK_L+
1

LEFT

ROUT-

Q63
SI2304DS
INTSPK_R- 1

RLINEIN

R39
0
18 LEFT

12

1

2
17
2.2UF_16V_0805

ROUT+

1

1
C30

1

+12VALW

2

1

INTSPK_R+

2

100K

2

2

R480

1

2

R34
0
18 RIGHT

C256
4.7UF_10V_0805+
C247
4.7UF_10V_0805

1

3
8
13
18

1

RIGHT

U2

2

+

C29
.1UF

VDD1
VDD2
VDD3
VDD4

C260
.1UF

B

C

Document Number

Rev
4C

401138
Tuesday, August 21, 2001
D

Sheet

19

of

47

+5VCD

1
2
3
4

Q4
2N7002

+5VCD
CDD[0..15]

1

CDD[0..15] 21

SDD_[0..15]

8P4R-10K

C430
.1UF

SDD_[0..15] 22

Modify by Charles
at 2/25

2

L41
HB1M2012-601JT
C432
.1UF

C435
.1UF

+5VAMP

2

DM_ON

D29
FRD#

REVBTN# 26,32

RB751V
1

2
D27

FRDBTN# 26,32

RB751V
1

STOPCD# 2

STOPBTN# 26,32

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

HDA0
HDA1
HDA2

CDA0
CDA1
CDA2

69
71
67

CD_SBA0
CD_SBA1
CD_SBA2

HCS0
HCS1

CCS0
CCS1

64
62

CD_SCS1#
CD_SCS3#

S_DA0
S_DA1
S_DA2

68
70
66

S_DCS1#
S_DCS3#

63
61

2

R434 1
33K

2

R435 1
20K

LEFT_EQ 17,18

13

44

58
VDD

RB751V
1

77
79
82
84
87
91
96
98
1
3
7
10
14
17
19
21

HDD0
HDD1
HDD2
HDD3
HDD4
HDD5
HDD6
HDD7
HDD8
HDD9
HDD10
HDD11
HDD12
HDD13
HDD14
HDD15

R432 1
33K

2

R427 1
@10K

2

R436 1
@10K

2

R437 1
@10K

Input
to EQ

DM_ON

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

76
78
81
83
86
90
95
97
2
4
8
11
15
18
20
22

2

1UF
2

21 INT_CD_R

2

R428 1
@10K
C503

+5VAMP

2

14
11
7

INT_CD_R2

INT_CD_R1

U23B
74HCT4066

1UF
R429 1
@10K

10

RIGHT_EQ 17,18

12

D30

SDD_0
SDD_1
SDD_2
SDD_3
SDD_4
SDD_5
SDD_6
SDD_7
SDD_8
SDD_9
SDD_10
SDD_11
SDD_12
SDD_13
SDD_14
SDD_15

21 INT_CD_L

DM_ON
U23C
14
4
7

INT_CD_L2

3
5

2

PLAYBTN# 26,32

VDD

9
REV#

RB751V
1

VDD

D28
2

U33
OZ163

U23A
74HCT4066

.1UF 14
1
7

INT_CD_L2

INT_CD_L1

R433 1
20K

2

Modify by Charles
at 2/25

+5VCD

C37

R426 1
@10K
C502

PLAY#

3

+5VCD_1

8
7
6
5

2

ISCDROM
CD_IRQ
CDASPN
MODE1

1

17,21 CD_AGND

RP49

CDROM_L 17

74HCT4066

DM_ON#
22 S_DA0
22 S_DA1
22 S_DA2

22 S_DIOR#
22 S_DIOW#

S_DIOR#
S_DIOW#

99
6
72
93

14
8
7

INT_CD_R2

CD_SCS1# 21
CD_SCS3# 21

IRQ_15

74
12
88

HINTRQ
HDMARQ
HDMACK#

24
59

HRESET#
HDASPN

13,22 SIORDY
22 IRQ_15
13,22 SDDREQ
22 S_DDACK#

X2

S_DDACK#

CD_SIOR#
CD_SIOW#
CIOCS16#
CD_SIORDY

9

CHINTRQ
CDMARQ
CHDMACK#

75
13
89

CD_IRQ
CD_DREQ
CD_DACK#

CRESET#
CDASPN

23
60

CD_RSTDRV#
CDASPN

SSYNC
SBIT_CLK
SDATA_OUT
SDATA_IN
SACRSTN

47
52
54
49
45

CD_SIORDY 21

RP52
S_DCS3#
S_DCS1#
S_DA2
S_DA0
S_DA1
S_DIOW#
S_DIOR#
S_DDACK#

CD_IRQ 21
CD_DREQ 21
CD_DACK# 21

R360
+5VCD
C427
10PF

10K
D26
DM_ON

1

Change value by Charles at 2/17
1UF
100K
2
1

3

2

1
2
R368 10K

2N7002 +5VCD

1
2
R367 10K

Q33

2
1N4148

3,5,25,26,32,33,38 SMD
3,5,25,26,32,33,38 SMC

+5VCD

26

1

3

27

R394
2

OSC1
OSC2

100K

2 EN_CDPLAY#

U35

+

GPIO[1]/VOL_UP
GPIO[0]/VOL_DN

GPIO_1
GPIO_0

MODE0
MODE1

56
57

PAVMODE

38

CSN
INCN
UDN

41
42
43

R393
100K

1
2
3
4

SCLK
OSCI
OSCO

1
R363

+5VCD

10
9
8
7
6

CIOCS16#

1

26,32 CD_PLAY_ON#

CD_PLAY_ON#

2 EN_CDPLAY#

12

13

3

.1UF

C468
C469
4.7UF_10V_0805 1UF_16V_0805

Q43
2N7002

U6F
74HCT14
+5VALW POWER

CDPLAY

2

R374

47K

SDD_0
SDD_1
SDD_2
SDD_3
SDD_4
SDD_5
SDD_6
SDD_7

1
2
3
4
5
6
7
8

+5VCD

3

CDD0
CDD1
CDD2
CDD3
+5VCD

1
2
3
4
5

10
9
8
7
6

CDD4
CDD5
CDD6
CDD7

10P8R_4.7K
@16P8R_0
SDD_8
SDD_9
SDD_10
SDD_11
SDD_12
SDD_13
SDD_14
SDD_15

16
15
14
13
12
11
10
9

+5VCD

RP50

RP51

CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

1
2
3
4
5
6
7
8

CDD11
CDD10
CDD9
CDD8
+5VCD

1
2
3
4
5

10
9
8
7
6

CDD12
CDD13
CDD14
CDD15

10P8R_4.7K

Modify
by
Charles
at 2/2

11

@16P8R_0

+5VCD

R379
SIORDY

1

IRQ_15

R376
1

R358
10K

2 CD_SIORDY
@0

DM_ON#

10

DM_ON

Q32

CD_IRQ

R377
SDDREQ

2

1

2N7002
U6E
74HCT14
+5VALW POWER

2
@0

2 CD_DREQ
@0
R370

21 SIDERST#

SIDERST# 1

2 CD_RSTDRV#
@33

CD_RSTDRV# 21

CD_PLAY 26

Compal Electronics, inc.

2
Q42
2N7002

RP53

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7

16
15
14
13
12
11
10
9

GPIO_0
GPIO_1
INTN

10P8R_10K

2
10K

Modify by
Charles at
1/4

7
C472

Change value
by Charles at R391
33
6/22

+5VCD

1
2
3
4
5

+5VCD
2

2

RP48
PLAY#
REV#
FRD#
STOPCD#

R366 10K
1
MODE1

1

SDATA

2

S
S
S
G

SI4800
+5VCD

ISCDROM

39
40

1

D
D
D
D

1

8
7
6
5

12

16V

80

16
33
65
85
92
+5VCD

+5VALW
4.7UF_10V_0805

ISCDROM

+5VCD

RP54

R375 5.6K

+12VALW
1

C466
1UF_16V_0805

C467

PCSYSTEM_OFF
INTN
RESET#

51

EN_CDPLAY# 17

Q44
2N7002
3

+5VALW

31
32

PWR_CTL

1

+12VALW

29
25
30

PAV_EN
PLAY/PAUSE
FFORWARD
REWIND
STOP/EJECT

CD_DREQ

+5VCD

1

D25
1

INTN

Q34
2N7002

28
36
35
34
37

2
10K
2
@10K

CD_SCS3# 21
CD_SCS1# 21
CD_SBA2 21
CD_SBA0 21
CD_SBA1 21
CD_SIOW# 21
CD_SIOR# 21
CD_DACK# 21

@16P8R_33

2 CD_SIORDY
1K

7

R359
1

+5VCD

PLAY#
FRD#
REV#
STOPCD#

1
R364
1
R362

14

C429

2
RB751V

R355
1

+5VCD

Change by Charles
at 5/20

CD_SCS3#
CD_SCS1#
CD_SBA2
CD_SBA0
CD_SBA1
CD_SIOW#
CD_SIOR#
CD_DACK#

16
15
14
13
12
11
10
9

14

C428
10PF

HSYNC
HBIT_CLK
HDATA_OUT
HDATA_IN
HACRSTN

CD_RSTDRV# 21

1
2
3
4
5
6
7
8

3

R361
1M

48
53
55
50
46

GND
GND
GND
GND
GND

1
2
R369 33

21 SIDERST#
8MHZ

CDROM_R 17

74HCT4066

DM_ON#

CD_SIOR# 21
CD_SIOW# 21

OSC2

OSC1

+

100
5
73
94

CDIOR#
CDIOW#
CIOCS16#
CIORDY

HDIOR#
HDIOW#
HIOCS16#
HIORDY

Input to
ES1988

U23D

6

22 S_DCS1#
22 S_DCS3#

CD_SBA0 21
CD_SBA1 21
CD_SBA2 21

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet

20

of

47

A

B

C

D

E

IDE,CD-ROM & FDD Module CONN.

C377

1

C373

1

C380

1

1

+5VS

C374

+

2

2

2

1000PF

2

1UF_25V_0805 .1UF
10UF_10V_1206

1

1

Place component's closely IDE CONN.

22 PDD_[0..15]
20 CDD[0..15]

PDD_[0..15]
CDD[0..15]

R138
1

10K
2
JP12

Modify by Charles at 2/29
2

13,22 PDDREQ
22 P_DIOW#
22 P_DIOR#
13,22 PIORDY
22 P_DDACK#
22 IRQ_14
22 P_DA1
22 P_DA0
22 P_DCS1#
32 HDDLED#
+5VS

DASP#

1

+5VS

2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

PDD_8
PDD_9
PDD_10
PDD_11
PDD_12
PDD_13
PDD_14
PDD_15

+5VS
1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

R321
100K
2

PIDERST#
PDD_7
PDD_6
PDD_5
PDD_4
PDD_3
PDD_2
PDD_1
PDD_0
R320
1
2
33
R309
1
2
33

2

PHDD# 26
R310
PCSEL 1

2

470
P_DA2 22
P_DCS3# 22
+5VS

R299 10K
HDD CONN

R189

10K

+

1

1

C423

2

2

2

Place component's closely CD-ROM CONN.

R356
1

Add by Charles at 2/16

C424

1000PF 10UF_10V_1206 1UF_25V_0805 .1UF
2

2 CDLED#

1

+5VCD

Place component's closely
to route trace middle.

W=80mils
C172
C425
1

1

+5VCD

Add by Charles at 2/16

2

0
2

CD_AGND 17,20

0

JP16
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

CD_RSTDRV#
CDD7
2
CDD6
R191
10K
CDD5
CDD4
CDD3
CDD2
CDD1
CDD0
at 2/29

20 CD_RSTDRV#
1

Modify by Charles
20 CD_SIOW#
20 CD_SIORDY
20 CD_IRQ
20 CD_SBA1
20 CD_SBA0
20 CD_SCS1#
26,32 CDLED#

CD_SIOW#
CD_SIORDY 1
CD_IRQ
R378
CD_SBA1
CD_SBA0
CD_SCS1#
CDLED#

2
0

+5VCD

2

+5VCD
SEC_CSEL
R190

CD_DACK#
R357
PDIAG#
1
CD_SBA2
CD_SCS3#
W=80mils

1

2

3

Change by Charles at
2/25

INT_CD_R 20
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15
1
2
R380 33

+5VS

1 R135
100K

PIDERST#

2

Q11
DTC124EK

D3
RSTDRV

1

Modify by Charles at 2/29
CD_DREQ
CD_SIOR#
CD_DACK# 20
100K
2
CD_SBA2 20
CD_SCS3# 20
+5VCD
+5VCD
+5VCD

3
13 PHDRST

CD_DREQ 20
CD_SIOR# 20

22K

2

2

22K
RB425D

+5VCD

R303
+5VCD

1

Modify by Charles at
2/17

SIDERST#

2
100K

13,27 RSTDRV

CD-ROM CONN.

SIDERST# 20

Q30
DTC124EK

D21

C422 .1UF

13 SHDRST

470

RSTDRV 1
3

2

2

22K
22K

RB425D
4

3

1

4

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

1

20 INT_CD_L

3

3

1
R288

1

Place component's
closely CD-ROM conn.

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

21

of

47

A

B

C

IDE Series Resistor
Place them close PIIX4M

D

E

SDD[0..15]
PDD[0..15]

13 SDD[0..15]
13 PDD[0..15]

SDD_[0..15]
PDD_[0..15]

20 SDD_[0..15]
21 PDD_[0..15]

RP16
PDD12
PDD4
PDD14
PDD1
PDD13
PDD2
PDD15
PDD0

1

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10
9

PDD_12
PDD_4
PDD_14
PDD_1
PDD_13
PDD_2
PDD_15
PDD_0

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7

Modify by Charles at 2/29

16P8R-33
1

13,14 IRQ14

RP15

2

R306
PDD8
PDD7
PDD9
PDD6
PDD10
PDD5
PDD3
PDD11

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10
9

PDD_8
PDD_7
PDD_9
PDD_6
PDD_10
PDD_5
PDD_3
PDD_11

16
15
14
13
12
11
10
9

IRQ_14 21

RP12

1
2
3
4
5
6
7
8

SDD_0
SDD_1
SDD_2
SDD_3
SDD_4
SDD_5
SDD_6
SDD_7

Modify by Charles at 2/29
1

1

13,14 IRQ15

2

R333

+5VS

16P8R-33

33

IRQ_15 20

33

1

2

R341

SIORDY 13,20

10K

RP33
+5VS

1
R311

2

1
R327

SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

PIORDY 13,21

10K
2

PDDREQ 13,21

5.6K

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10
9

SDD_8
SDD_9
SDD_10
SDD_11
SDD_12
SDD_13
SDD_14
SDD_15

R159
1

2

SDDREQ

SDDREQ 13,20

5.6K

16P8R-33
16P8R-33

PDCS3#
PDCS1#
PDA2
PDA0

4
3
2
1

13 PDA1

1

13
13
13
13

RP17

5
6
7
8

P_DA2
P_DA0

2

P_DA1

RP14

P_DCS3# 21
P_DCS1# 21
P_DA2 21
P_DA0 21

13
13
13
13

8P4R-33
2

R336

1
2
3
4

SDCS3#
SDCS1#
SDA2
SDA0

8
7
6
5

S_DCS3#
S_DCS1#
S_DA2
S_DA0

S_DCS3# 20
S_DCS1# 20
S_DA2 20
S_DA0 20

8P4R-33

33

P_DA1 21

2 33S_DA1

R163 1

13 SDA1

2

S_DA1 20

RP38
1
2
3
4

13 PDIOW#
13 PDIOR#
13 PDDACK#

8
7
6
5

P_DIOW# 21
P_DIOR# 21

RP36
13 SDIOW#
13 SDIOR#

P_DDACK# 21

8P4R-22

SDDACK#

13 SDDACK#

1
2
3
4

8
7
6
5

S_DIOW#
S_DIOR#
S_DDACK#

S_DIOW# 20
S_DIOR# 20
S_DDACK# 20

8P4R-22

+5VS

C505
1
2

+5VS

.1UF
C508
1
2

+3VS

+3V

.1UF
C510
1
2

+3VS

+3V

.1UF
C511
1
2

+3VS

+3VALW

.1UF
C513
1
2

+3V

+3VALW

.1UF
C515
1
2

3

+5VS
C44
1

2

-

4
1

5

+

6

-

6
5

U4A
LMC6482IM
U30B
74LVC08
+3VS POWER

4

+

2

4

3

8

8

.1UF

7

.1UF
U24B
LM358
+12VALW POWER

+3VS
+3VS

C506
1
2

+5VS

.1UF
C509
1
2

+3VS

+3V
+3VS

C507
1
2

+3V

.1UF
+3V
3

For AGP Bus

.1UF

For HDD IDE Bus

+5VS

C512
1
2

+3VS

.1UF
C514
1
2

+5VS

.1UF
C516
1
2

+3V

+3V

+5VCD

.1UF

For PCI Bus

For CD-ROM IDE Bus

4

4

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

22

of

47

A

B

C

D

E

1

1

GAD[0..31]

8 GAD[0..31]

ST[0..2]

8 ST[0..2]
8 SBA[0..7]

JP14

24,33 TV_GND
24,33 COMPS
24,33 TV_GND
2

26,31 PME#
6 VGA_SUS_STAT#
25 VGASUSP#
30 SUSP
8,13,14,27,31 CLKRUN#
15,16 DEV_RST#
13,14,17 PIRQC#
13,14,15,31 PIRQB#
13,14,15 PIRQA#
25 DAC_CONTR

AGP_BUSY#

JP15
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

PID0
PID1
PID2
PID3

13
13
13
13

+3V

DDC_MD2 33
+5V
+3V

79
77
75
73
71
69
67
65
63
61
59
57
55
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

8 GPAR
8 GFRAME#
8 GIRDY#
8 GTRDY#

Add by
Charles at
5/3

1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

8 GDEVSEL#
8 GREQ#
8 GGNT#
8 GSTOP#

C534
2

24,25,33 M_SEN#
24,33 CRTGND
24,33 G
24,33 R
24,33 B
24,33 CRTGND
24,33 HSYNC
24,33 VSYNC
24,33 DDC_DATA
24,33 DDC_CLK

SBA[0..7]

10UF_10V_1206

GREQ#
SBA5
SBA6
SBA4
SBA7

8 SBSTB
8 ST1
8 RBF#

ENVEE 26
BKOFF# 25
DISPOFF# 32
+12VS

8 GC/BE#3

+3VS

ST1
RBF#
GAD25
GAD30
GAD24
GAD29
GC/BE#3
GAD26
GAD31
GAD27
GAD28

+5VS
8 AD_STBB

CONT-60P
8 GC/BE#2

GAD23
GAD17
GAD20
GAD16
GC/BE#2
GAD18
GAD22
GAD21
GAD19

80
78
76
74
72
70
68
66
64
62
60
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

PIPE# 8
RTCCLK 13,15,16
14.3M_VGA 10
GCLKO

GCLKO 8

SBA3
SBA0
SBA1
SBA2
ST0
ST2
GAD1
GAD4
GAD2
GAD3
GC/BE#0
GAD0

ST0 8
ST2 8

2

GC/BE#0 8

GAD7
GAD5
GAD6
AD_STBA 8

GAD8
GAD13
GAD12
GAD10

GC/BE#1

GC/BE#1 8

GAD15
GAD11
GAD14
GAD9

CONT-80P
+3VS
3

3

C365
1
U30A
74LVC08
13 GGREQ#

2
.1UF

14
1

AGP_BUSY#

3
2
7

+3VS POWER

GREQ#

GREQ# 8

4

4

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

23

of

47

A

B

C

D

E

1

1

CRT Connector
+5VALW

2

1

C410
.1UF

R297
2.2K

R334
2.2K
2

2

3

2

3

2

3

JP11
CRT-15P

68PF
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

L9
1
2
FCM2012C-800_0805
L10
1
2
FCM2012C-800_0805
L11
1
2
FCM2012C-800_0805
1

1

1

DDC_MD2
C127
10PF

JOPEN7

1
2 L31
FCM1608C-121T

G

220PF
2

100PF

C404

2N7002
Q17

220PF

C531

1

1

26 BT_RST#

FCM1608C-121T
2

+3VALW

1

2

3

+12VS

100K

2
4
6
8
10
12
14
16
18
20

BT_ON# 26
BT_PRE# 25
TO_USB1_D+ 28
TO_USB1_D- 28
+5VALW

AXN420C530P

.1UF
JOPEN6

DAC_GND

C491

1
3
5
7
9
11
13
15
17
19

2

330PF

Add by Charles at
3/27 for EMI testing

2

330PF

C105
1

C106
1

R94
75

23,33 TV_GND

28 BT_USB1_D+
28 BT_USB1_D-

2

FCM1608C-121T

2

2

1

23,33 COMPS

2

26 BT_DET
25 BT_WAKE_UP

JP6
RCA JACK

27PF
L6

L8
1

DDC_CLK 23,33

JP20

2

1

1

DDC_DATA 23,33

Q31
2N7002

R160

CRTVDD

Add and change
value by Charles
at 5/3

3

2
1

1

1

C386
C140

68PF

100K
2

R146

1
3

G

10K

68PF

1

2

10K

2

R164

DDCC

2

3

C401

C389

R305

2

DDCD

2

+12VS

1

1

2

G

Q18
2N7002

2

2

D

S

0603

1

Add by
Charles at
4/19 for
EMI

1
2 L32
FCM1608C-121T

1

S

0603

3

23,33 VSYNC

2
2MM

D

1

1

D

S

3
2N7002
Q14

23,33 HSYNC

18
19

1

1

2

10PF

2

2

10PF

C119

10PF

2

2

2

10PF

2

75

C117

C375

10PF
2

75
23,33 CRTGND

C125

1

1
C129

R142

1

R139

2

R290
75

1

1

1

23,33 B

2

23,33 G

2

D

M_SEN#
23,33 R

S

2

M_SEN# 23,25,33

2

CRTVDD

G

1

2

2

C371
2

W=40mils

1

RB420D

1

R425
100K

D23

CRTVDD

1

D8
DAN217

1

D6
DAN217

1

1

D45
DAN217

D4
DAN217

1

+5VALW

1

+5VS

3

2

Modify by
Charles at
2/25 for
monitor
sense

1

2
2MM

Modify by Charles at 1/4

BLUETOOTH CONN.

4

Pin modify by
Charles at 3/21
option for
bluetooth
4

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

24

of

47

B

C

D

R405
1 100K
R472
1 10K

2N7002
Q49

2
G

51VCC

3
S

13,14 IRQ1
13 IRQ8#
R414 10K
1
2
EC_HPOWON

IRQ1
IRQ8#
IRQ11
IRQ12

79
165
28

PFAIL#
HPWRON
VBAT

S

D

IRD

0

0

Development

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13/BE0
A14/BE1
A15/PG1
A16/PA5
A17/PA6
D0
D1
D2
D3
D4
D5
D6
D7

137
138
139
140
141
142
143
144

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

RD#
SEL0#
WR0#

111
105
112

HDEN#
HRMS#

PG0/SELIO#
PG2/CLK
PG3/SEL1#
PG4/WR1#

110
107
106
113

PF0/D8
PF1/D9
PF2/D10
PF3/D11
PF4/D12
PF5/D13
PF6/D14
PF7/D15

145
146
147
148
149
150
151
152

SELIO#
SELIO# 26
VGASUSP#_1
PCMRST#
PCMRST# 16
ATFOUT#
1
2
R479
L@10K +5VALW1
2
R420 LN_10K

HMR

164

HRMS#

Reset host when shared
memory access can not
be completed

1

Extend access until completed

0

1

1

0

FXBUSEN#(FX Bus Interface Enable)
(P136)
SHBM#(Shared/Non-Shared BIOS Memory)

Mode

1

FX Bus Interface Enabled

Non Shared Memories

0

FXBUSEN#

(P130)

1

ISA Bus Compatible Mode

Shared Memories

0

HDEN#(Host Device Enable)
Mode

(P111)

HDEN#

TRIS(TRI-STATE)

(P102)

Device are enabled o reset

1

0

Normally

Devices are disabled on reset

0

1

TriState

+5VS

SA18
KBA18

R401
2CRY2

1
22M

R400

4

51K
X3

13,29,32 ON/OFF
32 SCROLLED#
32 NUMLED#
32 CAPSLED#

LI/NIMH# 35,38
BT_PRE# 24
BT_WAKE_UP 24
FIR_PRE# 28
M_SEN# 23,24,33

FIR_PRE#
BATT_TEMP
EXT_DATA
EXT_CLK
KBD_DATA
KBD_CLK
PS2_DATA
PS2_CLK

EC_ACT#

1

1

32 EC_ACT#

LI/NIMH#
BT_PRE#
SCROLLED#
NUMLED#
CAPSLED#

C474
33PF

BATT_TEMP 38
EXT_DATA 29,33
EXT_CLK 29,33
KBD_DATA 29,33
KBD_CLK 29,33
PS2_DATA 32
PS2_CLK 32

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A

B

51ON 29

10K
D36
ATFOUT# 1

ATF_INT# 13

2

R395
10K

D35
570SCI#
FRD# 26
FSEL# 26
FWR# 26

1
R416
1
R488

ACIN 30,38
BKOFF# 23
2
R469

SCI# 13

2
DN_10K
2
@10K

10
9
8
7
6

1
2
3
4
5

HRMS#
ECSMI#
KBA18
ENV0

10P8R_10K

+5VALW

RP57
+5VS

VGASUSP#_1

51RST 29

R468
10K

2

RP59
ENV1
KBA15
KBA16
KBA17

SUSA# 10,13
SUSB# 13
SUSC# 13

1
RB751V

R479 for 733C
R420 for 733

EXT_DATA
EXT_CLK

10
9
8
7
6

3

1
2
3
4
5

KBD_DATA
KBD_CLK
PS2_DATA
PS2_CLK
+5VS

+5VALW

Modify by
2
1
2
Charles at +5VALW
Q56
100K
2/16 option
2N7002
2
GATE_RST# for
bluetooth
Q57
26
2N7002
and FIR

ACOFF 35

Add by Charles at 4/19

HDEN#
SELIO#
CLK_SMB
DAT_SMB

10P8R_10K
RP56
1
2
3
4

8 PCMRST#
7 BT_PRE#
6
5 FIR_PRE#

LID_SW# 13,26,32

RP58

10
9
8
7
6

8P4R_10K
1
2
3
4
5

EC_ACT#
BKOFF#
G20
RCL#
+5VALW

10P8R_10K

Add by Charles at 2/10
Add by Charles at 2/25

C496
LI/NIMH#

1

.01UF
2

4

Compal Electronics, inc.

ECAGND
Title

C495
BATT_TEMP
1

.01UF
2

SCHEMATIC, M/B LA-733
Size

B
Date:
C

2
RB751V

+5VALW

DAC_BRIG 32
DAC_CONTR 23
EN_DFAN 30
TRICKLE 35

2

1
2

32.768KHZ
C476
10PF

+5VALW

G20
RCL#
2

CRY1

CLK_SMB
DAT_SMB

ECSMI#
TRIS
ENV1
ENV0

1

28 RING#
3,5,20,26,32,33,38 SMC
3,5,20,26,32,33,38 SMD
32 INVT_PWM
15 PCM_SUSP#

10K

R396

1

89
90
131
132
133
134
175
176
570SCI#

RB751V

+3VS

SYSON
ACIN
BKOFF#

3
R419

2

CRY1
CRY2

1 RCL#

VGASUSP# 23

+3V

NC
NC
NC
NC
NC
NC
NC
NC

PH0/BST0
PH1/BST1
PH2/BST2
PH3/PFS#
PH4/PLI#
PH5/ISE#
104
103
102
101
100
99

DA0
DA1
DA2
DA3
95
96
97
98

PD0/AD0
PD1/AD1
PD2/AD2
PD3/AD3
PD4/AD4
PD5/AD5
PD6/AD6
PD7/AD7
81
82
83
84
85
86
93
94

PSCLK1
PSCLK2
PSDAT1
PSDAT2
58
60
57
59

RB751V
D41
2

13 RC#

PC0
PC1
PC2
PC3/EXINT0
PC4/EXTINT11
PC5/EXINT15
PC6/PSCLK3
PC7/PSDAT3

2

61
62
63
64
65
68
70
69

13 GATEA20

1 G20

25
27

1

1

D40

PB0/RING
PB1/SCL
PB2/SDA
PB3/TA
PB4/TB
PB5/GA20
PB6/HRSTO
PB7/SWIN

10K

71
72
73
74
75
76
77
78

32KX1
32KX2

R411

12
PE0/HA18
136
PE1/A18

2

2

3

2

2

(P105)

1

1
2
43
44
45
46
87
88
NC
NC
NC
NC
NC
NC
NC
NC

HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7

157
162
163
13
158
159
14

15
16
17
18
19
20
21
22

166
167
168
169
170
171
172
173
174
3
4
5
6
7
8
9
10
11

92

AVCC
AVREF

AGND

91
80

2

1
2

1
2

0

IRE

Mode

ENV1
(P103)

1
RB751V

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17

1

R407
100K

ENV0
(P104)

VGASUSP#_1

114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
135

HRMS#(Host Reset Mode Select)
Environment

10K
D38

PC87570-176PIN

3

2

+RTCVCC

156
155
154
153

R406
U41

1

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

1

+3V

1

56
55
54
53
52
51
50
49
48
47
42
41
40
39
38
37

+3V

EXTSMI# 13

+3VALW POWER

1

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

2

11 EXTSMI#

MEMW# 13,14
AEN 13,27
IOR# 13,14,27
IOW# 13,14,27
IOCHRDY 13,14,27

HMEMCS#/PA0
HMEMRD#/PA1
HMEMWR#/PA2
HAEN/FXASTB#
HIOR#
HIOW#
HIOCHRDY

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

HA0
HA1
HA2
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16/PA3
HA17/PA4

36
35
34
33
32
31
30
29

R66
1

ECSMI# 12

1

2

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

VCC
VCC
VCC
VCC

GND
GND
GND
GND
GND

24
26
66
109
160

2

2

2

1000PF

23
67
108
161

1

1

1

1
2

.1UF

SYSON# 30

U6C
74HCT14
+5VALW POWER
U5D
74LVC125

8.2K

Q47
2N7002
3

SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0

C479
1000PF

SA17
SA16
SA15
SA14
SA13
SA12
SA11
SA10
SA9
SA8
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0

C477
.1UF

C493
1000PF
ECAGND

C480
.1UF

C478 C475

6

MEMR# 13,14

1

10K

5

13

S

Q48
2N7002

L39
FBM-11-160808-700T

R410

SYSON

SYSON

7
3
2
G

1

1

29 EC_HPOWON

+5VS

Add resistor by Charles at 5/3

D

2

.1UF

FBM-11-160808-700T
+5VALW

+5VALW

+12VS

2

C494
L40

13,14 IRQ12

2

BIOSCS# 13
2
G

1
D

1

W=40mils

2

KBA[0..18]
ADB[0..7]
SA[0..18]
SD[0..7]
KSO[0..15]
KSI[0..7]

26 KBA[0..18]
26 ADB[0..7]
13,27 SA[0..18]
13,14,27 SD[0..7]
29 KSO[0..15]
29 KSI[0..7]

E

14

A

D

Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

25

of

47

B

C

D

INPUT

OUTPUT

+5VALW

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

18
16
14
12
9
7
5
3

1
PX4_RIA#

1G
2G

VCC

GND
10

2
+5VALW

C485
2
.1UF

@RB751V
Add resistor by Charles at 5/3
R474
2
GATE_RST# 13
0
D37
+5VALW
2
PIIX4_RI# 13,14
U45C
74HCT32

14
9
10
7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

3
4
7
8
13
14
17
18

D0
D1
D2
D3
D4
D5
D6
D7

BB
LARST#

11
1

CLK
CLR

+5VALW POWER

74HCT244

PLAYBTN#
REVBTN#
FRDBTN#
STOPBTN#

U39
2
5
6
9
12
15
16
19

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

EC_LID_SW# 13
EC_MUTE 19

PX4_RIA#

CD_PLAY 20
SUSP# 28,30,34

SUSP#
VLBA#

2

CD_PLAY_ON# 20,32
BEEP# 19

74HCT273

Change by
Charles
at 3/1

+5VALW

+5VALW

1
19

1G
2G

18
16
14
12
9
7
5
3

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

10

U46B
74HCT32

DJ_ON/OFF#
VOL_UP#
VOL_DW#
CONA#

+5VALW
1

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

C484
2
.1UF

10P8R_10K

U38

VCC

10
9
8
7
6

Add by Charles at 2/10

+5VALW

14
1

KBA6

U46A
74HCT32

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

3
4
7
8
13
14
17
18

D0
D1
D2
D3
D4
D5
D6
D7

LARST#

11
1

CLK
CLR

3

GND

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

1
2
3
4
5

SELIO#

2
7

74HCT244

+5VALW POWER

U40
Q0 2
Q1 5
Q2 6
Q3 9
Q4 12
Q5 15
Q6 16
Q7 19

TPAD_LED# 32
BACKLED# 32
DIS_ADJVOL 19
ADJVOL_UP/DW# 19
DOT_CLK 32
DOT_DATA 32
DOT_CS# 32
DOT_A0 32
3

GND

2

20
KBA5

2
4
6
8
11
13
15
17

+5VALW

14
4

1

1UF_25V_0805

VLB# 13

RP55

1

.1UF

74HCT273

DD

DJ_ON/OFF#
VOL_UP#
VOL_DW#

C498

2

8

.1UF

2

CLK
CLR

Add by Charles at
4/20 that
reserved for S/W 1

24

FSTCHG 35
BT_ON# 24
EN_WOL# 31
PULSEBTN 29

1

SELIO#

1

3

11
1

MMO_ON

ON/OFF_EC#
BT_RST# 24
BT_DET 24

C482

20K

KBA4

+5VALW POWER

USER_BTN1#
USER_BTN2#
USER_BTN3#
USER_BTN4#
SUSPBTN#
DJ_ON/OFF#
VOL_UP#
VOL_DW#

1

VR_ON 6,36,37

RB751V

+5VALW
C483

32
32
32
32
32,33
32
32
32

1

AA
LARST#

U42
2
5
6
9
12
15
16
19

10

13
7

20

U43

C473 .1UF
2

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

20

11
SELIO#

1

RB751V
D39
2

D0
D1
D2
D3
D4
D5
D6
D7

R403
+5VALW

2

3
4
7
8
13
14
17
18

+5VALW POWER

R421 10K
2

1

C486 .1UF
2

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

10

14
12

KBA2

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

1
19

U45D
74HCT32

2
7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

20

20

COVER#
PME_51#

14
1

D43
MMO_ON

VCC

CONA#

1

VLBA#

2
4
6
8
11
13
15
17

U45A
74HCT32
3

GND

2

2

2
2

32 DOT_PRES#
21,32 CDLED#
33 CONA#
21 PHDD#
13,25,32 LID_SW#
23,31 PME#
32 LCD_MODE#
32 TPAD_ON/OFF#

2

KBA3

+3V

1

+5VALW

.1UF

74HCT244

R339
100K

R408
100K

1

SELIO#

1

1

1

R350
@100K

C497

10

VCC

1G
2G

+5VALW

Delete by
Charles at 5/21

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

18
16
14
12
9
7
5
3

VCC

SELIO#

U44
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

20

STOPBTN#

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

+5VALW
1
U45B
19
74HCT32
+5VALW POWER
14
4
CC
6
5
7
+5VCD +5VALW +5VALW

KBA1
25 SELIO#

2
4
6
8
11
13
15
17

REVBTN#
FRDBTN#

1
KBA[0..18]

25 KBA[0..18]

GND

2
3 ATF#
20,32 REVBTN#
20,32 FRDBTN#
23 ENVEE
20,32 STOPBTN#

2
.1UF

10

1

R409
@100K

PLAYBTN#

20,32 PLAYBTN#
17 AUTO_GAIN_CONTROL

1

ADB[0..7]

25 ADB[0..7]

C487

2

R487
@100K

+5VALW

+5VALW

1

1

+5VALW +5VALW

Add by
Charles at
12/1

E

GND

A

74HCT273

6
C437

+5VALW
C481

1

+5VALW

.1UF

NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

VCC
WE*
A17
A14
A13
A8
A9
A11
OE*
A10
CE*
DQ7
DQ6
DQ5
DQ4
DQ3

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11

8
10
7

1

2

+12VS

1
FWR# 25

1K

U36

.1UF

100K
Q46 2N7002
3
FLASH# 13

R399

2

8
7
6
5

3,5,20,25,32,33,38 SMC
3,5,20,25,32,33,38 SMD

VCC
WC
SCL
SDA

1
2
3
4

A0
A1
A2
GND

U46C
74HCT32
+5VALW POWER

R397

R398

NM24C16

1K

1K

2

4

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

D

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

2

U34
14
9

1

R404
R418
100K

+5VALW

1

4.7UF_10V_0805
C438
1
2

+5VALW

KBA10

FRD# 25

ADB7
ADB6
ADB5
ADB4
ADB3

FSEL# 25

2

+

+5VALW

1

1

2

2

1

+5VALW POWER

2
G

5
7

S

SELIO#

4

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

29F040

Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

26

of

47

A

B

C

D

E

SUPER I/O 37N869
SD[0..7]

13,14,25 SD[0..7]
4

SA[0..15]

13,25 SA[0..15]

4

U15

8
7
6
5

CTS#2
DSR#2
DCD#2
RI#2

46
47
48
49
51
52
53
54

D0
D1
D2
D3
D4
D5
D6
D7

SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10

26
27
28
29
30
31
32
39
40
41
95

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10

97
50

PDRQ(DRQ_C)
FDRQ(DRQ_B)

8P4R-4.7K

13,14 DRQ3
13,14 DRQ2

DRQ2

13,14,15 SIRQ
8,13,14,23,31 CLKRUN#

R205
Change
10
value
by
C176
Charles
at 2/10 15PF

Place
closely to
super I/O

PDACK#(DACK_C#)
FDACK#(DACK_B#)

SA11
SA12

35
36

A11
A12

CLKRUN#

37
92
38

SIRQ
CLKRUN#
CLK33

1

2

13,21 RSTDRV
13,14,25 IOCHRDY
13,25 AEN
13 TC

55
98
44
33

RESET
IOCHRDY
AEN
TC

13,14,25 IOR#
13,14,25 IOW#

42
43

IOR#
IOW#

10 14.3M_SIO
C174
2 1

R199

22PF

33

13,14 DRQ0

2

1

+5VS

INDEX#
MTR0#
SA14
DRV0#

32 DRV0#

SA13
FDDIR#
STEP#
WDATA#
WGATE#
TRACK0#
WP#
RDATA#
HDSEL#
DSKCHG#

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
R202
1

LPD[0..7]

CLK14

19

DRQ_A

1

LPD[0..7] 28,33

10K
2

+3VS
96
13
70

3

C181
4.7UF_10V_0805

C175
.1UF

VSS
VSS
VSS
VSS

4
45
65
93
R204
1

DTR2#
CTS2#
RTS2#
DSR2#
TXD2/IRTX
RXD2/IRRX
DCD2#
RI2#

91
90
89
88
87
86
85
84

CTS#2

R203
1

@820
2
47K
2

DSR#2
R206
1

C180
.1UF

Selecting
3F0 HEX
Selecting
370 HEX
+3VS

1K
2

DCD#2
RI#2
2

99
10
100
3
2
1
5
6
7
8
11
12
14
9
15
17
16

DRVDEN0
INDEX#
MTR0#
A14
DS0#
A13
DIR#
STEP#
WDATA#
WGATE#
TRK0#
WRTPRT#
RDATA#
HDSEL#
DSKCHG#
DRQ_D
DRVDEN1

DTR1#
CTS1#
RTS1#
DSR1#
TXD1
RXD1
DCD1#
RI1#

81
80
79
78
77
76
83
82

IRMODE
DACK_D#
IRRX2
IRTX2
A15
DACK_A#
PWRGD/GAMECS#

21
22
23
24
25
20
56

DTRA# 28
CTSA# 28
RTSA# 28
DSRA# 28
TXDA 28
RXDA 28
DCDA# 28
RIA# 28
IRMODE
DACK#1
IRRX
IRTX
SA15

Change by
Charles at
2/10

IRMODE 28
DACK#1 13
IRRX 28
IRTX 28
DACK#0 13

R209
1

2

+3VS

1K

1

32 FDDIR#
32 STEP#
32 WDATA#
32 WGATE#
32 TRACK0#
32 WP#
32 RDATA#
32 HDSEL#
32 DSKCHG#
13,14 DRQ1

69
68
67
66
64
63
62
61

2
10K

32 3MODE#
32 INDEX#
32 MTR0#

18

R201

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

LPTSTB# 28,33
LPTAFD# 28,33
LPTERR# 28,33
LPTINIT# 28,33
LPTSLCTIN# 28,33
LPTACK# 28,33
LPTBUSY 28,33
LPTPE 28,33
LPTSLCT 28,33

2

94
34

10 PCLK_SIO

75
74
73
72
71
60
59
58
57

IRQIN
VCC
VCC

3

13 DACK#3
13 DACK#2

STROBE#
AUTOFD#
ERROR#
INIT#
SLCTIN#
ACK#
BUSY
PE
SLCT

1

1
2
3
4

SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7

2

RP21

1

+3VS

C182
.1UF

1

2

Change by Charles at 1/4
FDC37N869

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

27

of

47

A

B

C

D

E

Change by Charles at 5/20

SERIAL

R102
1

2
@10K
R98

1

25 FIR_PRE#

2

+3VALW

1

SERIAL / PARALLEL PORT
FIR / USB CONNECTOR

(1)
(6)
(2)
(7)
(3)
(8)
(4)
(9)
(5)

DCD1#
DSR1#
RXD1
RTS1#
TXD1
CTS1#
DTR1#
RI1#

+5VALW

+5VALW

C184

10K

1
6
2
7
3
8
4
9
5

JP18
COM-DB9

2
JOPEN10
2MM

+5VS

T = 20mil

.1UF

100PF

2

C2TIN1
TIN2
TIN3
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUTB2

SUSP#

23

FORCEON

D

T = 12mil IRTXOUT
T = 12mil IRMODE
T = 12mil IRRX

2
G
S

IRTX 27
IRMODE 27
IRRX 27

27 DTRA#
27 RTSA#
27 TXDA
27 CTSA#
27 RIA#
27 RXDA
27 DCDA#
27 DSRA#

RIA#

26,30,34 SUSP#

12
13

VCC

RIA0

2
14
13
12
19
18
17
16
15
20

2

14

Q35
2N7002

22

V+

27

V-

3 1

2
C433
.47UF_16V_0805

TOUT1
TOUT2
TOUT3
RIN1
RIN2
RIN3
RIN4
RIN5

9
10
11
4
5
6
7
8

INVLD#

21

GND

25

DTR1#
RTS1#
TXD1
CTS1#
RI1#
RXD1
DCD1#
DSR1#

DTR1# 33
RTS1# 33
TXD1 33
CTS1# 33
RI1# 33
RXD1 33
DCD1# 33
DSR1# 33

FORCEOFF#
U16
MAX3243

TFDU6101E

C111,C525,C556 MUST PLACE AS
CLOSE TO IR AS POSSIBLE

2

LED_C
RXD
VCC
GND

1
3
5
7

C1C2+

R316, R323, R326, R319

NO
Bluetooth

R317, R324, R325, R318

1R317 0

2

USB1_D+_1

1R324 0

2

USBP1_D+ 1

2

27,33 LPTSLCTIN#

F2

JP2
1
2
3
4

C297
2

USB_ASB
FBM-11-451616-800T
L25
.1UF
L5
W=40mils
FCM2012C-800T06
1
2
4516
USB0_D1
2
+
USB0_D+
C342
1
2
C88
L26
.1UF
FCM2012C-800T06
R63
150UF_10V_E

5
6
7
8
1

470K
2

L4
FBM-11-451616-800T

G1
VCC G2
D1- G3
D1+ G4
VSS G5

PARALLEL

LPTSLCTIN#_1
+5V_PRN

1
2
3
4
5

10
9
8
7
6

+5VS
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

1w=10mils
RB420D
R343
33

LPTSTB#

1
AFD#/3M#

+5V_PRN

9
10
11
12
13

RP20
FD0
FD1
FD2
FD3
+5V_PRN

1
2
3
4
5

10
9
8
7
6

27,33 LPTAFD#
FD7
FD6
FD5
FD4

C431

27,33 LPTERR#

2

R188 33
1
2
FD0
LPTERR#
FD1
LPTINIT#_1
FD2
LPTSLCTIN#_1
FD3

10P8R_2.7K
FD4

.1UF

C391

R70

1000PF

560K

FD5
FD6

RP22

2

Modify by Charles at
2/16 option for
bluetooth

1R319 @0 2

The component's most place cloely PIIX4.

1
2
3
4

RP6

1
2
3
4

8P4R_33
CP5
8P4C_33PF

USB1_D+
USB1_DUSB0_D+
USB0_D-

5
6
7
8

RP5
8P4R_15K
8
7
6
5

BT_USB1_D+ 24
BT_USB1_D- 24

1R325 0

2 USB1_D+_1

1R318 0

2 USB1_D-_1

9
10
11
12
13
14
15
16

8
7
6
5
4
3
2
1

FD3
FD2
FD1
FD0
FD7
FD6
FD5
FD4

FD7
27,33 LPTACK#
27,33 LPTBUSY

LPTACK#
LPTBUSY
LPTPE

27,33 LPTPE
LPTSLCT

16P8R_68

3

CP1
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13

AFD#/3M#
LPTERR#
LPTINIT#_1
LPTSLCTIN#_1

1
2
3
4

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

1
2
3
4

8
7
6
5

8P4C_220PF
CP4
8
7
6
5
8P4C_220PF
CP2

FD0
FD1
FD2
FD3

1
2
3
4

8
7
6
5
8P4C_220PF
CP3

27,33 LPTSLCT

FD4
FD5
FD6
FD7

1
2
3
4

USB0_D+ 33
USB0_D- 33

8
7
6
5

4

8P4C_220PF

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:

A

JP17
LPTCN-25

4
3
2
1

8
7
6
5

USBP1+
USBP1USBP0+
USBP0-

LPD3
LPD2
LPD1
LPD0
LPD7
LPD6
LPD5
LPD4

C426
.1UF

4.7UF_10V_0805

R344
2.7K

27,33 LPTSTB#

Guide Pins

+5V_PRN

D32
2

2

1

1
2

33
2

C51

1R326 @0 2

4

R192
1

10P8R_2.7K

Molex-67300

2

13,33 OVCUR#0

13
13
13
13

+5V_PRN
VCC
D0D0+
VSS

1

2

1

POLYSWITCH_0.75A

LPTSLCTIN#_1
LPTINIT#_1
LPTERR#
AFD#/3M#

L22

1

W=40mils

33
2 LPTINIT#_1

RP23

L23
FCM2012C-800T06

1

R198
1

+5V_PRN

2

1
2
FBM-11-451616-800T

3

+5VS_USB

C86
150UF_10V_E

USB1_D-_1

USB_VCCB

8P4C_220PF
CP7

+

L21
FCM2012C-800T06
USBP1_D- 1
2

33 USBP1_D+

LPD[0..7]

27,33 LPD[0..7]

27,33 LPTINIT#

33 USBP1_D-

2

Modify by
Charles for
USB leakage at
5/21

R73
560K

8
7
6
5

2

2
C81
1000PF

1R323 @0 2

C314
.1UF

1R316 @0 2

24 TO_USB1_D+

1

1

OVCUR#1
13,33

1

+12VS

Modify by Charles at 2/16
option for bluetooth
24 TO_USB1_D-

R478
100K

W=40mils

28
29

22

R76
470K

1
2
3
4

1

G

POLYSWITCH_0.75A

USB_ASA

FBM-11-451616-800T
L24
1
2

W=40mils

2
w=10mils

USB_VCCA

F1

W=40mils

1

1

1

D

3

RTS1#
RXD1
DSR1#
DCD1#

2

Bluetooth

2

SI2306DS

S

+5VS

CP6
8P4C_220PF
1
8
2
7
3
6
4
5

Resistor Location

Q60

W=80mils

RI1#
DTR1#
CTS1#
TXD1

1

22U_10V_1206
2

10UF_10V_1206

2
4
6
8

LED_A
TXD
SD
MODE

24
1

2

1

.47UF_16V_0805
C185
1
2

2

+

C525

C1+

1

1

1

U9
C111

28

C188
.47UF_16V_0805

12

U37D
74HCT125
+5VALW POWER

T = 20mil

T = 20mil

11

25 RING#

5.6_1206

C556

1

RB751V

R446

+3VS

C115

2

3

1

D31

7

2
JOPEN11
2MM

2
.1UF

from cardbus
PCM_RI# 1
15 PCM_RI#

Change by Charles
at 12/12 to met
FIR specification

13

1

1
100K

1

FIR Module

C183

R365

+5VS FOR INCREASING LED'S
LIGHT AND THE COMMUNICATION
DISTANCE

26

1

2

.1UF

1

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

28

of

47

A

B

C

D

INT_KBD CONN.

1

+3V

7

7

1

1

KSI6

3

3

KSI4

5

5

9

8

11

10

RSMRST#

RSMRST# 8,13

1

U26D
74LVC14
+3VALW POWER

2

14

C47
.1UF

U26E
74LVC14
+3VALW POWER

14

330K

1

2

R253
2

CP8

JP1
KSI1
R254
47K

1

E

+5V

7

7

KSI3

9

9

KSO1

11

KSO2

13

4

4

KSO9

6

6

KSI5

8

8

KSI2

10

10

KSO5

12

12

KSI0

14

14

KSO4

16

16

KSO8

18

18

KSO3

20

20

KSO13

22

22

KSO11

24

24

KSO15

13

15

15

KSO6

17

17

KSO12

19

19

KSO14

21

21

23

23

KSI1
KSI7
KSI6
KSI5

2

13

8P4C_33PF
CP10
KSI4
KSI2
KSI3
KSI0

CP11
KSO2
KSO4
KSO7
KSO8

3

CP12

PFO#

6

9

+3VALW POWER

1

2

1
2
3
4

8
7
6
5

8P4C_33PF

SPWROFF# 13

Add by Charles at
2/22 for EMI

4
R74
10K

2

2

2

MAX6342
2

1

C101
.1UF

2

C359
.01UF

KSO14
KSO11
KSO10
KSO15

7
10
1
VCC

RST#

1
R284
100K

8
7
6
5

8P4C_33PF

U5C
74LVC125
8 SPWROFF#

U8

GND

PFI

EC_HPOWON 25

1

1

3

2

MR#

1
2
3
4

CP13

C102
2

5

8
7
6
5

+5ALWV POWER

.1UF
6 G_VR_POK

1
2
3
4

KSO6
KSO3
KSO12
KSO13

U37A
74HCT125

2
+3VS

R283
113K

8
7
6
5

8P4C_33PF

2

1

1
2
3
4

KSO[0..15]
KSI[0..7]

25 KSO[0..15]
25 KSI[0..7]

+5VALW
1

14

2

U26F
74LVC14
+3VALW POWER

14

Change by
Charles at
2/10

1

8
7
6
5

8P4C_33PF
C308
.1UF

+3VS

1
2
3
4

12

1

2
330K

8
7
6
5

CP9
KSO9
KSO0
KSO1
KSO5

R274
1

1
2
3
4

8P4C_33PF

INT_KB_CONN.

7

R212
47K

2

11

KSO7

KSO10

1

Add by
charles
at 2/10

KSO0

2

KSI7

PS2 CONN.

R91
1

2

1

Q45
@SMO5

1
0

25,33 KBD_CLK

C233

RESET BTN

1

Q23
@SMO5

1

22K
DTC124EK

2
R224
4.7K

51RST

51RST 25

C216

220PF

220PF

4

D

S

2
G
@2N7002
Q51

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:

A

C217

3

E

2

1UF_25V_0805

2

2

1

4

8
7

2

2

3
2

1

25,33 KBD_DATA

Q24
DTA114EK

2

6
8
7
5

1

Change by Charles
at 5/21 for
notebook can't
keep power when
dock SPR and
unplug AC-IN.

3

4

2

3

3

R422
33K

22K
B

1

4.7UF_10V_0805

10K
3

2
2 2

2

4
2
1
3

C214

C220

1000PF
220PF
L36
1
2
FCM1608C-121T
1
2
L35
FCM1608C-121T
0603

220PF

JP19
KBD/PS2_6

2

1

RLZ20A

2

2

25 51ON

1000PF

1

C215

1

Q53

C
4.7K

D42

10K

R228

SW1

C492

2
L34
FBM-11-451616-800T
4516

W=40mils

1

1

R417

1

1

3

S
Q52
2N7002

D12
1N4148

1

1

2
G

51ON# 32,35

DAN202U
1

+5VALW

2

D

POLYSWITCH_1.1A

ON/OFF 13,25,32

2
1

26 PULSEBTN

2

1
3

W=40mils

C219

220PF

1

+5VS

D44
33 ON/OFFBTN#

KB_VCC
F3

C218

2

+5VALW

2

Reset Button

100K

1

1
R415

1
2
FCM1608C-121T
1
2
L37
KB_AS FCM1608C-121T

1

25,33 EXT_CLK
25,33 EXT_DATA

1

+5VALW

2

L38

2

Change by
Charles at
2/25

3

1

3

2.2M

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

29

of

47

A

+3V

+

C203

+3VS
+12VS
1

2

R402

R207
4.7K
+3V

1K
1
C205
4.7UF_10V_0805

SUSP
2N7002

1

Q19

2
G

SUSP#

26,28,34 SUSP#

2N7002

9

8

7

3

S

3

S

SUSP 23

U6D
74HCT14
+5VALW POWER

R52
1
2
@0
Reserved resistor by
Charles at 5/3

1

-

C179

U4B
LMC6482IM

3

JP3

1
2
1

Q20
SI3861

3 Q29
2SA1036K
1

1
2

D1
1SS355

FAN_CON_2P

C542
@10UF_10V_1206

2

2

D

S

4

D2
1SS355

1N4148

8

2

.1UF_25V_0805
R208
1
2

2

1

D17

R60
100K

1UF_25V_0805

+5VS
Q8
FMMT619
2

1

2

C177

7

+

1

5
R61
100K

R261
3.48K_1%

2

+5VS

Change by Charles at 1/4

10M
C274
10UF_10V_1206
2

4

1M

FAN-1
Connector

2

1

25 EN_DFAN
6

+12VALW

+12VS

2

R263 1UF

R56

2

2

C186
4.7UF_10V_0805

+3VALW TO +3VS Transfer

+12VALW

C45

1

R252
3M

C196
1UF

3

S

3

S

+3VS

1
2 SUSP
G Q37
2N7002

2

D

1

D

1

+3VALW

1

12

2

2

C434
.1UF_25V_0805

2

+

C189

2

+

C187

4.7UF_10V_0805 4.7UF_10V_0805

2

R372

1

1
C192
1UF

2

2

1

1

1

1

+12VALW

100K
+5VS_GATE

R373
33

SI4800

1

D

RESET & SUSPEND CKT

1
2
3
4

S
S
S
G

SUSP
2
Q39 G
2N7002

2

Q50

+3VS

D
D
D
D

1
C195
4.7UF_10V_0805

D

2
G

25,38 ACIN

2

2

3

1

1
C198
1UF

R371 change to be 33 ohm
by Peter Liu at 4/5

S

U17

8
7
6
5

ACIN_SYS# 13

3

S

14

+3VALW

12

2 SYSON#
G

2

2
1

Q38
2N7002

D

1

C206

4.7UF_10V_0805 4.7UF_10V_0805

+3VALW TO +3V Transfer
+3VALW

E

1

+

C209
1UF

.1UF_25V_0805
D

SYSON# 2
Q36 G
2N7002

25 SYSON#

+12VALW
2

100K
C436

2

1

1
2

R371
SI4800
33
C202
4.7UF_10V_0805

1

1

R381
SYSON_ALW

1

D

Change by Charles at 1/4

1
2
3
4

S
S
S
G

2

D
D
D
D

1

U20

8
7
6
5

C

1

+3VALW

B

100K

G

6

3

+12VS

1

SUSP# 5
R475
@0
Reserved resistor by
Charles at 5/3

1

2

1

C178
1UF_25V_0805

R200

RTCVREF
BATT1
1

+

1

2

2

2

C471
1

-

51K
3

RTCBATT
D34
2
1
W=30mils

+5V
R387

+

2

C193
4.7UF_10V_0805

1

R390
33K

2

1
2

2
Q41 3
2SC2412K

1

C470
.1UF

10K
1

R388
10K

RTC BATT
CONNECTOR

2

C194
1UF

4

2

S
3

2

+3V

+5V TO +5VS Transfer

+5VALW TO +5VS Transfer

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

2
0_0805

2

R389

1
1

1

1
C208
1UF

D

1

2

2SA1037K

+5V

SYSON# 2
Q21 G
2N7002

1

1

C191
C197
4.7UF_10V_0805 1UF

J1

2

SYSON_ALW

R210
SI4800
33
C190
4.7UF_10V_0805

D

S
3

4

SUSP
2
Q22 G
2N7002

Q403

1
1

1
2
3
4

1

S
S
S
G

2

D
D
D
D

2

2

+5VS

15 SYSON_ALW
U18

2

C200
4.7UF_10V_0805

1

2

C204
1UF
2

C201
4.7UF_10V_0805

SI4800 R211
33
C199
4.7UF_10V_0805

+
2

+5VS_GATE

1

1

1

8
7
6
5

1

+5VALW

W=30mils

B

S
S
S
G

Change by Charles at 1/4

2
RB751V

E

D
D
D
D

1
2
3
4

C

1

+5VS

U19

2
1
W=30mils
100

RB751V

8
7
6
5

D33

R392

1

W=30mils

2

+12VALW TO +12VS Transfer

+5VALW

R386
200_0805

.1UF

+RTCVCC

3

W=30mils

B

C

D

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Friday, August 31, 2001

Sheet
E

30

of

47

A

B

C

D

E

MB+
PL6
FBM-L11-3 22513-201LMAT
2
1 B+

Add those capacitor for EMI at 2/6

<15> V_GATE

15

+5VALWP

REF

FBS

6

ILIM

GNDS

10

GND

TON

8

2

PR218
0

1

PC180
0.1UF_0805_25V
2
1

1

1

220UF_D_4V

+5VALWP

2
PR217
10K_1%

PR220
0

1

PC183
220PF

FBCORE

1

2

PC179
4.7UF_1210_25V
2
1

2

1
PR216
1M_1%

+

PC172
2200P F

2

2

2

PC178
4.7UF_1210_25V

PC177
4.7UF_1210_25V
2
1

PC176
4.7UF_1210_25V
2
1

PC187
0.1UF_0805_25V
2
1

PC186
0.1UF_0805_25V
2
1

PC185
0.1UF_0805_25V
2
1

PC184
0.1UF_0805_25V
2
1

PC188
0.1UF_0805_25V
2
1

5
6
7
8
3
2
1

1

VCCORE

11

PC174

4

9

4

+

2

3

PR219
20

PC173
220UF_D_4V
2
1

7

FB

CC

4
2

EC10QS04
2
1
PD44

VCC

VDD

5

DLCORE

2

1

4

@0

13

V+

PR221

PR225

DL

PGOOD

2

PQ113
SI4404DY
FDS7764A

1
PR215
215K_1%

PC169
0.22UF_0805_16V

PC168
220PF

PC167
1UF_0805_25V

2

SHDN

PQ112
SI4404DY
FDS7764A

1

2
12

14

BSTCOR E

PQ111
@SI4404DY
@FDS7764 A

EC31QS04

0 2
PR214

1

<22,26> VR_ON

PGND

2.2
1

1

D0

22

1
PR226
2

Add the
rsistor for
EMI at 2/6

PD43

20

<4> VID0

BST

MAX1711

LXCORE
DHCORE

2

D1

24

0.002_251 2_1%
2
1

3
2
1

19

23

CPU_COREP

5
6
7
8

<4> VID1

LX
DH

PU12

2
PL8
0.7UH/22A_LPI

3
2
1

D2

PL7
@1UH
1

5
6
7
8

D3

18

1

PQ110
IRF7811A

3
2
1

17

<4> VID2

SKIP

PQ109
IRF7811A

1

<4> VID3

D4

PC171
0.22UF_0805_16V

<4> VID4

21

PR223
2.2

2

2

PR213
100K

16

4

3
2
1

1

<22,24,26,33 > SUSP#

4

BSTCORE 1

2

PC170
0.1UF_0805_25V

0

1

PR212
1

5
6
7
8

1

PD42
RB751V

2

5
6
7
8

+5VALWP

3

3

PQ114
2SB1132

+3VALWP

+2.5VP

SOT-89
3

2
+

<22,24,26,33> VR_ON

1

2
0
PR224

4

VIN

3

ON/OFF#

1
VSS EXT

22UF_1206_1 0V
4

PC182
22UF_B_6.3V

VOUT

5

4

2

PU14
S-816A 25

1

PC181

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

SCHEMATIC, M/B LA-733
Size

B

C

D

Document Number

Rev
4C

401138
Date:

A

Compal Electronics, inc.

Tuesday, August 21, 2001

Sheet
E

36

of

47

A

B

Change value by
Charles at 5/17
Q27

D

JP23

1
2

2

1UF_25V_0805

33 LAN_TX+
33 LAN_TX-

TX+
TX-

33 LAN_RX+
33 LAN_RX-

RX+
RX-

R236
+12VALW

4

N/C

5

N/C

6

RX-

7

N/C

8

N/C

9

N/C

1

S_C/BE#3
S_AD23
100

R264

C283

S_AD17
S_C/BE#2
S_IRDY#

12

10

S_AD21
S_AD19

S_CLKRUN#
S_SERR#

15PF

3

S_PERR#
S_C/BE#1
S_AD14

Change by
Charles at
2/25

S_AD12
S_AD10
S_AD8
S_AD7
S_AD5

1

MD_BITCLK

+5VS

R424
17 MD_SYNC
17 MD_SDATAI
17 MD_BITCLK

MOD_SPK
17 MOD_MIC

+5VS

4

S_AD3
W=30mils
S_AD1

MD_BITCLK
AC_CLK24
2
R90
0

1

W=30mils

127

1

CATHODE2

17

LED2_YELN

ANODE2

18

LED2_YELP

GND

14

S_AD[0..31]
S_C/BE#[0..3]
AD[0..31]
C/BE#[0..3]

TIP

12

N/C

2
1

1

1

1

.1UF

.1UF

2

4.7UF_10V_0805

2

2

2

RP60

1

1

C82

C78

+

C87

C46

+

.1UF

16
15
14
13
12
11
10
9

2

S_AD31
S_AD29
S_AD27
S_AD25
S_AD23

16P8R-33

4.7UF_10V_0805
2

2

2

2

4.7UF_10V_0805 .1UF

1
2
3
4
5
6
7
8

AD31
AD29
AD27
AD25
AD23

+3VS
1

128

128

.1UF

+3VAUX

C95

C54

.1UF

8,13,14 IRDY#
8,13,14,23,27 CLKRUN#
8,13,14 SERR#
14 PERR#

C250

+

.1UF

CLKRUN#
AD1
AD3
AD5
AD7

4.7UF_10V_0805

8
7
6
5
4
3
2
1

RP61

S_IRDY#
S_CLKRUN#
S_SERR#
S_PERR#
S_AD1
S_AD3
S_AD5
S_AD7

9
10
11
12
13
14
15
16

S_IRDY# 15,17
S_CLKRUN# 15
S_SERR# 15
S_PERR# 15

Add by
Charles at
3/27

16P8R-33

3

RP62
AD15
AD13
AD11
AD9
AD6
AD4
AD2
AD0

8
7
6
5
4
3
2
1

RP63

9
10
11
12
13
14
15
16

AD21
AD19
AD17

S_AD15
S_AD13
S_AD11
S_AD9
S_AD6
S_AD4
S_AD2
S_AD0

8,13 C/BE#1

AD14
AD12
AD10
AD8

1
2
3
4
5
6
7
8

S_AD21
S_AD19
S_AD17
S_C/BE#1
S_AD14
S_AD12
S_AD10
S_AD8

16
15
14
13
12
11
10
9

S_C/BE#1 15,17

16P8R-33
16P8R-33
RP64

AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16

8
7
6
5
4
3
2
1

RP66

9
10
11
12
13
14
15
16

1
2
PAR
3
FRAME# 4
TRDY#
5
STOP#
6
DEVSEL# 7
C/BE#0
8

8,13 C/BE#2
8,13 C/BE#3
8,13,14 PAR
8,13,14 FRAME#
8,13,14 TRDY#
8,13,14 STOP#
8,13,14 DEVSEL#
8,13 C/BE#0

S_AD30
S_AD28
S_AD26
S_AD24
S_AD22
S_AD20
S_AD18
S_AD16

16
15
14
13
12
11
10
9

S_C/BE#2
S_C/BE#3
S_PAR
S_FRAME#
S_TRDY#
S_STOP#
S_DEVSEL#
S_C/BE#0

S_C/BE#2 15,17
S_C/BE#3 15,17
S_PAR 15,17
S_FRAME# 15,17
S_TRDY# 15,17
S_STOP# 15,17
S_DEVSEL# 15,17
S_C/BE#0 15,17

16P8R-33

15,17 S_PCIRST#

16P8R-33

15,17 S_PME#

S_PCIRST#1
S_PME#

1

2 PCIRST#
R453 33
2 PME#
R454 33

PCIRST# 7,13,16

4

PME# 23,26

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

B

C489

2

2

2

1000PF
4
LAN RESERVED
6
8
10
LED2_YELP
12
LED2_YELN
14
16
W=30mils
+5VS
18
13,14,15,23
20
1
2 PIRQB#
PIRQB#
C55
22
1 R450 102 GNT#0
GNT#0 8
W=40mils
R484
10
24
+3VAUX
S_PCIRST#
1000PF
26
W=40mils
28
+3VS
30
1
2 GNT#1
GNT#1 8
R452
10
32
Add by Charles at 3/27
S_PME#
34
36
1 R486 102
S_AD30
38
Add by Charles
40
at 12/1
S_AD28
42
S_AD26
44
R65
S_AD24
46
MINI_IDSEL 1
S_AD27
C52
48
2
50
S_AD22
1000PF
52
S_AD20
100
54
S_PAR
56
S_AD18
58
S_AD16
60
62
S_FRAME#
64
S_TRDY#
66
S_STOP#
68
70
S_DEVSEL#
72
74
S_AD15
76
S_AD13
78
S_AD11
80
82
S_AD9
84
S_C/BE#0
86
88
S_AD6
90
S_AD4
92
S_AD2
94
S_AD0
96
98
100
102
104
AC_SDATAO
106
MD_SDATAO 17
108
AC_RST#
110
1
2
MD_RST# 17
R462
@0
112
114
1
2 S_PCIRST#
MOD_SPK
R463
0
116
MOD_SPK 17
118
120
122
Add R462,R463 by Peter Liu 3/30
W=40mils+3VAUX
124

Date:
A

1

1

RING

11

1

10

Mini-PCI SLOT
15,17 S_AD[0..31]
15,17 S_C/BE#[0..3]
8,13 AD[0..31]
8,13 C/BE#[0..3]

LED1_GRNP

1

1

1
127

KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

1

2

R412 75
C488

2

S_AD26 1

16

.1UF

C96

1

S_AD27
S_AD25

R485

PCLK_MINI

ANODE1

C490

LED1_GRNN

+

2

S_AD31
S_AD29

C99

1

8 REQ#1

C49

2

10 PCLK_MINI

C90

1

13,14 PIRQD#
+3VS
8 REQ#0

15

+5VS

2

LED1_GRNP
LED1_GRNN
R449 10
PIRQD#
1
2
W=40mils
REQ#0
1 R483
2
10
PCLK_MINI
R451 10
REQ#1
1
2

Add by Charles at 3/27

KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

CATHODE1

RJ-45 & RJ-11

RING
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

13

1000PF_1206_2KV 1000PF_1206_2KV

1

2

MOD_TIP

HEADER 2

2

LAN RESERVED

C528

VH1
DSSA-P3100SB

1
2

Add by Charles
at 4/19 for EMI

JP25
TIP

2

RX+

2

3

MINI_GNDA

IDSEL : AD27

12

3

2

MOD_RING
JP22

C529

2

RX+

GND

1000PF_2KV_1206

MOD_RING
MOD_TIP
AUDIO
GND

15PF

TX-

RX-

the channel width 50
mils

2N7002

S

C501

2

R413 75

Q25

2
G

10

1
2
3
4
5
6

1

1

2
100K

D

1
2
3
4
5
6

HEADER 6

1

Add by
Charles at
12/1

TX+

TX-

S

D
G
2

1

C97

C252
1UF_25V_0805

26 EN_WOL#

1

3
JP21

1

TX+

1

+3VAUX

SI2304DS
1

E

2

+3VALW

C

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

31

of

47

A

B

+5VS

C

D

E

+5VS

+5VS
JP5

TRACK0#

27 WP#

WP#

27 RDATA#

RDATA#

27 HDSEL#

HDSEL#

RP26

WDATA#
STEP#
FDDIR#
MTR0#

WGATE#
TRACK0#

6
7
8
9
10

+5VS

5
4
3
2
1

Add by Charles at 2/22 for EMI

WDATA#
WGATE#
RDATA#
HDSEL#

+5VS

WP#

JP8
10P8R_1K

RDATA#

19
19
19
19

HDSEL#
+5VS

R285

FDD_CONN

2 DRV0#

1

1K

2

DRV0# 27

14

U37C
74HCT125

C545
220PF

Modify by
Charles
at 1/17

8 FDDLED#

9

1
2
3
4

SPKR+
SPKRSPKL+
SPKL-

1
2
3
4

HEADER 4

2

C548 Add
220PF

C547
220PF

by
Charles at
5/20 for
EMI

7

+5VALW POWER

C546
220PF

1

27 TRACK0#

HEADER 8

C499
C500
@22PF @22PF

8P4R_1K
FDDIR#
3MODE#
STEP#

2

WGATE#

MTR0#

1

WDATA#

27 WGATE#

25 PS2_DATA
25 PS2_CLK

8
7
6
5

2

27 WDATA#

1
2
3
4

1

1
2
3
4
5
6
7
8

1

FDDIR#
3MODE#
STEP#

TRACK0#
DSKCHG#
INDEX#
WP#

DSKCHG#

26 TPAD_ON/OFF#
26 TPAD_LED#

+5VS

2

MTR0#

27 FDDIR#
27 3MODE#
27 STEP#

RP3

DRV0#

1

27 MTR0#

DSKCHG#

1
2
3
4
5
6
7
8

INDEX#

2

27 DSKCHG#

27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

1

DRV0#

JP7
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

2

27 DRV0#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

1

INDEX#

2

27 INDEX#

10

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

1

Add by Charles at 1/4

JP9
1
2
3
4
5
6

19,33 LINE_OUT_PLUG

1
C550
220PF

C551
220PF

2

2

C549
220PF
2

Add by Charles
at 1/4

1

1

19,33 LINEOUT_R
19,33 LINEOUT_L

Add by
Charles at
5/20 for EMI

1
2
3
4
5
6

HEADER 6
2

1

JOPEN8
2MM

JP13
3

+5VALW

+5VS

INVPWR

+5VCD C530
.1UF
1
2

Add by Charles at 4/19
for EMI
Change by Charles
at 2/25
Change by
Charles at
ON/OFF 13,25,29
2/10

JP10

Change by Charles
at 2/25
25 SCROLLED#
25 NUMLED#
25 CAPSLED#
21,26 CDLED#
21 HDDLED#
4

19 INT_MIC
23 DISPOFF#
25 DAC_BRIG
25 INVT_PWM

FDDLED#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

26 VOL_DW#
26 VOL_UP#
25 EC_ACT#
29,35 51ON#
26 LCD_MODE#
26 DJ_ON/OFF#
20,26 PLAYBTN#
20,26 FRDBTN#
20,26 REVBTN#
20,26 STOPBTN#
3,5,20,25,26,33,38 SMC
3,5,20,25,26,33,38 SMD
+5VALW
20,26 CD_PLAY_ON#
26 BACKLED#
26 DOT_CLK
26 DOT_DATA
26 DOT_CS#
26 DOT_A0
26 DOT_PRES#

SUSPBTN# 26,33
USER_BTN1# 26
USER_BTN2# 26
USER_BTN3# 26
USER_BTN4# 26
LID_SW# 13,25,26
EC_ACT# 25

CD_PLAY_ON#
BACKLED#
DOT_CLK
DOT_DATA
DOT_CS#
DOT_A0
DOT_PRES#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25

VOL_DW#
VOL_UP#
EC_ACT#
51ON#
LCD_MODE#
DJ_ON/OFF#
PLAYBTN#
FRDBTN#
REVBTN#
STOPBTN#
SMC
SMD

3

+5VALW
CD_PLAY_ON#
BACKLED#
DOT_CLK
DOT_DATA
DOT_CS#
DOT_A0
DOT_PRES#

4

Change by Charles at 2/22

Title
HEADER 40
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

Change by
Charles at
5/3

HEADER 24

51ON# 29,35

SMC
SMD

VOL_DW#
VOL_UP#
EC_ACT#
51ON#
LCD_MODE#
DJ_ON/OFF#
PLAYBTN#
FRDBTN#
REVBTN#
STOPBTN#
SMC
SMD

C

D

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

32

of

47

A

B

C

D

E

DOCKING 100 PIN

25,29 KBD_DATA
25,29 KBD_CLK
25,29 EXT_CLK
25,29 EXT_DATA
31 LAN_TX+
31 LAN_TX31 LAN_RX+
31 LAN_RX28 DCD1#
28 DSR1#
28 TXD1
28 RXD1
LPD1
LPD3
LPD5
LPD7
27,28 LPTSTB#
27,28 LPTAFD#
27,28 LPTERR#
27,28 LPTINIT#
27,28 LPTSLCTIN#
23,24 COMPS
23,24 TV_GND

2

23,24 R
23,24 G
23,24 B
23,24 CRTGND
19 INTSPKOFF#
19,32 LINE_OUT_PLUG
19 INTMICOFF#
19,32 LINEOUT_L
19,32 LINEOUT_R
17 DOCK_LIN_L
17 DOCK_LIN_R
19 DOCK_MIC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

101
101
102
102
103
103
104
104

1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

LPD[0..7]

27,28 LPD[0..7]

JP26
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

VIN
1

SMD 3,5,20,25,26,32,38
SMC 3,5,20,25,26,32,38
SUSPBTN# 26,32
DTR1# 28
CTS1# 28
RTS1# 28
RI1# 28
ON/OFFBTN# 29

LPD0
LPD2
LPD4
LPD6

LPTSLCT 27,28
LPTPE 27,28
LPTBUSY 27,28
LPTACK# 27,28

2

+5VS
VSYNC 23,24
HSYNC 23,24
M_SEN# 23,24,25
DDC_MD2 23
DDC_CLK 23,24
DDC_DATA 23,24
+5VALW

Modify by Charles at 2/16

OVCUR#0 13,28
OVCUR#1 13,28
USB0_D+ 28
USB0_D- 28

CONA#

USBP1_D+ 28
USBP1_D- 28
CONA# 26

DOCKING 100
3

3

4

4

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

33

of

47

A

B

C

D

E

B+
PD1
B+

1

2

P6
+12VALWP

RB751V
PR1
10_1206
PD2
RB751V

1

7
28

PR131

RUN/ON3

21

1
4

PT1

2

PR130
B+

P7 P8
10UH_SDT-1205P-100-120

PQ3
SI4800

1

3
P9

0

8
7
6
5

PC21
0.1UF_0805_25V

1

PC20
4.7UF_1210_25V

TIME/ON5

PR5 26,28,30 SUSP#
0.015_2512

PC19
4.7UF_1210_25V

PQ4
FDS6690S

PR4
0.015_2512
1W
PD5
@BYS10-45

2

8

2

MAX1632

PR3
22_1206

2

10UH_SPC-1207P-100

CSH3
CSL3
FB3
SKIP#
SHDN#

PD4
EC11FS2

D
D
D
D

1
2
3
10
23

PC18
@1000PF

PL3

LX3
DL3

1

1
2
3
4

2

P5

PU1

0.1UF_0805_25V

4
5
18
16
17
19
20
14
13
12
15
9
6
11

8
7
6
5

26
24

12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#

1
2
3
4

0

PC14

D
D
D
D

DH3

PC12
470PF_0805_100V
PC11
1UF_0805_25V

S
S
S
G

BST3

27

VL

25

PC6
4.7UF_1206_16V

GND

1
2
3
4

1
2
3
4

PR129

PC7
0.1UF_0805_25V

PC4
4.7UF_C_35V
22

PC13
0.1UF_0805_25V

4.7UF_1210_25V 25V

V+

2

+

S
S
S
G

PD35
@BYS10-45

PC10
4.7UF_1210_25V

PC9

S
S
S
G

0.1UF_0805_25V

PQ1
FDS6690S

PC2
2.2UF_1206_25V
25V

PL1
1UH_BLM3216
1
2

1

PQ2
SI4800

D
D
D
D

D
D
D
D

PC8

2

2

S
S
S
G

VL

8
7
6
5

1

8
7
6
5

PC5
0.1UF_0805_25V
1

PC1
4.7UF_1206_25V

@0

+3VALWP

1

1

PR132
10K
PZD1
@RLZ4.3B

+

+

+
PC25
47UF_D_6.3V

+
PC26
47UF_D_6.3V

PR123
@1M

PR6
100K

2

2

PD7
RB051L-40

PC23
@1000PF

PC166
47UF_D_6.3V
+

PR124
@1M

PR125
0

PC28
+ 47UF_D_6.3V

PC29

1

1

+5VALWP
PC27
47UF_D_6.3V

PZD2
@RLZ6.2C

PD8
RB051L-40

2

2

PC24
47UF_D_6.3V

+5VP

VREF

PZD3
1
2

PC30
PR7
47K
5%

RLZ3.6B
PC31
1000PF
50V

PR8
120K
5%

4.7UF_1206_10V
PR126
0

0.047UF
16V

+5VP

3

3

4

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
B
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS,
INC.
Date:
A

B

C

D

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

34

of

47

A

B

ADAPTER CURRENT 2.9A

C

D

E

PR163
@0

P2
P1

B+
PQ5

VIN

8
7
6
5

PR12
10K

PR9
0.02_2512

PQ7

D
D
D
D

S
S
S
G

1
2
3
4

PR11
200K

SI4835

1
2
3
4

S
S
S
G

D
D
D
D

8
7
6
5

PC33
@100P 1
2
3
4

1W

PQ6
S
S
S
G

D
D
D
D

8
7
6
5

P3
PQ13
1
2
3
4

SI4435

SI4435

1

PC40

PR18
150K

PC41

PC42
4.7UF_1210_25V
PC43
0.1UF_0805_25V
4.7UF_1210_25V

2
PR27
0.02_2512
1W

22UH_SPC-1207P-220
P4

PC37

PC102
4.7UF_1210_25V

+

PD13
EA60QC04

PC38
PC39
4.7UF_1210_25V4.7UF_1210_25V

1

33UF_EC_25V

1

VIN

3

4.7UF_1210_25V

PR22
47K

1

1

2

FDS4435

VMB

PL4

8
7
6
5

D
D
D
D

S
S
S
G

2
PACIN 36,38

2

PQ9 3
2N7002

PD11
1SS355

PR205

PR26
47K

Modify by CT
at 2/25

4.7
1

OVP# 38

B+
PU10
1

PQ14
DTC115EK

100K

2

25 ACOFF

1

-INC2

+INC2

24

2

OUTC2 GND

23

3

+INE2

CS

22

4

-INE2 VCC(o)

21

OUT

20

VH

19

VCC

18

PR165
10K

PR184 PR185
0

@0
PC140
2200PF

2

2

PC142
4700PF_0805_50V

30.1K_1%

PR170
10K_1%

5

FB2

6

VREF

7

FB1

8

-INE1

RT

17

+INE1

-INE3

16

OUTC1

FB3

15

11

OUTD

CTL

14

12

-INC1

+INC1

13

10K
PC148
2200PF_0805_50V
PR171
PR172
PC149
0.1UF

10K

PR177

10K

10K_1%
25 TRICKLE

2

1
PQ107
3

2

26 FSTCHG

TRICKLE 25

PC165
0.1UF_0805_25V

68K

PR176

PD40
1SS355

PC146
1

10

PC164
0.1UF_0805_25V

1
PQ100
3

Add by CT at
5/3

PR175

PR183
16.9K 1%

1.2K_0.5%

0.1UF

PR173

24.9K_1%

9
PR174

PC141

2

3

PR169

PD41
1SS355
1

PR168

2

100K

324K_1%
1500PF

MB3878

3

P1

2

PR178
69.8K_0.5%

PR179
150K_0.5%

PD18
RLS4148

1

CC: 2.87A LI-ION FAST
CC: 2A NI-MH FAST
CC: 0.273A LI-ION TRICKLE
CC: 0.265A NI-MH TRICKLE

PR180
VS

3

1
CHGRTCP

215K_0.5%

1

PC56
0.1UF
1

2

1

100K

2
1

1
1

1

PC147
100K

3

3

2

LI/NIMH# 25,38
PC51
10UF_1206_10V

2

PC52
1UF_0805_25V

PC54
0.22UF_1206_25V

PZD6
RLZ16B

2

100K

2
PR62
22K

DTC115EK
2

2

2

PQ102

0.1UF

PZD5
RLZ5.1B

200_0805

RTCVREF

3

1

29,32 51ON#

PR61
150K
PC55
0.1UF_0805_25V
2

2

2

PR60
100K

PR59
10K

+5VP

2

2

1
1

PZD4
RLZ6.2C

1

+5VP
PR58
47_1206

PR45

PU6
S-81235SG

2

38 NIMH/LI#

PR181

1

CHGRTCP 2

PQ24
TP0610T
3
1

1

1

PQ101
2N7002

1

VMB

3

2

PD16
RB751V

CV:LI-ION 13.241V
NI-MH 16.202V

PR191
47K

2N7002
2N7002

4

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R& D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS,
INC.
A

B

C

D

Compal Electronics, inc.
Title

SCHEMATIC, M/B LA-733
Size

B
Date:

Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

35

of

47

A

B

C

D

E

+5VALWP
2

4
5
6

VREF

S
D
D

+5VALWP

PD38

1

3

+

2

-

PU7A
LM393

PC137
1000PF

PR94
300K_0.5%

G
D
D

1

PQ45
2SC2411K

PQ46
2SA1036K

PD30
RB051L-40
2

2

4

PC72
0.047UF
2

SI3443DV

1

1

PR93
100K

PQ99
47K

1
2
3

8

+5VALWP

PR92
200K_0.5%

PR157

1

1

RB751V
PC136
0.1UF_0805_25VPR158
2.2K

3
2
1

Change
value by
Charles at
2/2

100K

PL9
2.2UH_SPC1002

6,26,36 VR_ON

2

PQ30
DTC115EK

PR96
5.1K

PQ31
DTC115EK

100K

PR99
@1M_1%
VREF

1

3

1

100K

CPU_IOP

PC138
@1000PF
25V

+

100K

PC139
47UF_D_6.3V

3

PR98
@1M
PR159
5.6M

PR100
200K_1%

+5VS

8

2

+

6

-

PR154

PR162

10K

10K
JOPEN2

7

+2.5VP

VR_POK 6

1

PD3
1

PR160
100K_1%

2

2

+VCLK

2

+VCPU_IO

2

+5VALW

2

+3VALW

80mil

2MM
2

V_GATE 6,36

4

PR101
200K_1%

5

PU7B
LM393

+3VS

RB751V

JOPEN1
CPU_IOP

PR102
220K

1
2MM
JOPEN4

2
PC76
0.047UF_1206_16V

1

+5VALWP

1

RB751V
PD27

3MM
JOPEN3
+3VALWP

1
3MM

CPU_COREP

+VCC_CORE

3

3

CUT POWER PLANE
JOPEN5
+12VALWP

1

2

+12VALW

2MM

4

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERRED FROM THE
Title
CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
Size
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS,
B
INC.
Date:
A

B

C

D

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

37

of

47

A

B

C

D

E

+5VALWP

PR127
100K

PF1
7A

PCN1

VMB

1
2
3
4
5
6
7

LI/NIMH#

25,35 LI/NIMH#

+5VALWP

1

PD31

B/I

PR128
1K_1%

TS

3

3

2

2

SLD
SLC

PR63
6.49K_1%

1

PC100

1
PR64
1K

+5VALWP
@BAS40-04

PD20
@BAS40-04

Add by CT at 2/25
PR186
@470

8
1

9

BATT CONN.

1000PF
PR67
1K

PC101
0.01UF

25 BATT_TEMP
+5VALWP
PR187
@10K

3
+5VALWP

PR69

1

5

PC150
@100PF

3
PC152
@0.1UF

PD22
@BAS40-04

4

-

+
PC153
@10UF_1206_10V

2

PR189
@100K

INVPWR

G
D
D

PR188
@11K_1%

PQ108
@SI3443DV

+

200

2

3
2
1

1

3,5,20,25,26,32,33 SMD
+5VALWP
PC151
@47UF_D_6.3V

3

200

2

PD23

4
5
6
VREF

@BAS40-04

PR190

+5VALWP

2

PR71

1

S
D
D

2

PU11
@MAX4490

3,5,20,25,26,32,33 SMC
0_0805

VIN

1

3

2

1
PT2

3
2

2
DC JACK

PC62
0.01UF_0805_25V

JBT0385-100805-4
4

PC61
1000PF

1

3

PC63
1000PF

LI/NIMH#

PC64
0.01UF_0805_25V

PR227
PC190
@2.2K_0805 @0.47UF_0805

PR229
@0

1

1

VMB

Change by James
for NIMH battrey
issue.

PD24
BYS10-45

2

PR228
@0

2
3
PQ115
@2N7002

PC189
@1UF_0805

P1
P1

PD25
@1SS355
35 OVP#

2
PR73
@39K

PC163
0.1UF_25V_0805
PR80
1M_1%

PR81
10K

PR79
100K_1%

PR89
32.4K_1%

22K

3
2

LM393
+

+

PU4B
LM393
5

7

-

6

1

PACIN 35,36

PR87
@100K

-

PC66
@1UF_1206

PC67
@1000P

LI-ION OVP 14.55V
NI-MH OVP 17.55V
PR74
@1M_1%

0
PR76
@1M
PR83
@100K_1%

4

8
PR86

2
3
PQ25
@2N7002

PU4A

PR72
@1.2M_1%
PR75

PR82
@324K_1%

1
ACIN 25,30

3

VREF

1

8

VIN

3
PQ116
@2N7002

VMB

PR211
22
PR88 10K

1
2

PD45
PC191
@1SS355@1000PF

1

3

PR230
@470

2

PCN2

1
0

PR85
@1M

PQ26
2 NIMH/LI#

3

PC65
@1UF_0805_16VPR84

NIMH/LI# 35

@2N7002

25V

RTCVREF

4

PC69
0.22UF_0805_16V

PD26
RLZ5.1B

PR90
10K

2

1

4

PC68
1000PF

4

PR91
100K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
B
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS,
INC.
Date:
A

B

C

D

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Wednesday, August 29, 2001

Sheet
E

38

of

47

A

D

E

For HDD
H7
HOLE_HDD_D3

H13
H11
H8
HOLE_HDD_D3.5 HOLE_HDD_D3.5 HOLE_HDD_D3.5

1

3mm +0mm -0.05mm, With ring 8mm PTH
3mm+/- 0.05mm, With ring 8mm, NPTH
4.5mm, NPTH
5.2mm, with ring 8mm PTH

1

Hole
Hole
Hole
Hole

1

:
:
:
:

C

1

HOLEA
HOLEB
HOLEC
HOLED

B

For Tooling

1

1

FD19
FMARK

FD11
FMARK

FD4
FMARK

FD8
FMARK

1

1

1

For Boss
SMC37N869

FD6
FMARK

FD13
FMARK

FD2
FMARK

FD10
FMARK

FD18
FMARK

FD22
FMARK

1

1

1

1

1

FD5
FMARK

1

FD7
FMARK

1

FD14
FMARK

1

FD3
FMARK

1

1

1

FD15
FMARK

NS87570

1

2

FD9
FMARK

440ZXM

1

1

1

H14
H16
H10
H15
HOLED HOLED HOLED HOLED

1

1

1

1

H18
H19
HOLEC HOLEC_1

TI1420

1

PIIX4M

H1
HOLEB

1

FD21
FD20
FMARK FMARK

1

FD1
FMARK

1

1

H3
H12
HOLEA HOLEA

1

1

1

1

H5
H2
H9
H17
HOLEA HOLEA HOLEA HOLEA

1

1

H4
H6
HOLEA HOLEA

FD16
FMARK

1

1

FD17
FD12
FMARK FMARK

1

1

ESS 1988

2

OZ163

3

3

4

4

Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A

B

C

D

SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
E

39

of

47

5

4

3

2

1

P.I.R. (1) LIST
D

Revision History
Date: 2000/01/14

D

REV#:

0.2

Description:

A1-TEST TO A2-TEST

1. PAGE 5 - R388, RP2, R71, R59 delete placement, U38 pin 18 connect to ground, Q2 changed value to SI2302DS.
2. PAGE 6 - R346, R350, R347 delete placement and Y3 and Y4 both pin 2 direct connection U9 pin 25. L27, C371, C373 delete placement and U9 pin 7 and 30
direct connection +3V power.
3. PAGE 6 - R336, R357, R345, R112 delete placement and RP56 pin 16 change connection signal from "VGA_SUS_STAT#" to "SUSTAT1#", RP56 pin 1 signal
short to "VGA_SUS_STAT#" signal, Q59 (SI2302DS), R452 (10K) add for Intel's Geyserville issue.
4. PAGE 6 - "VR_HI/LO#" signal add R443 (10K) pullhigh to +3V power, "GT_SUSTAT1#" signal add R444 (10K) pullhigh to +3V power, R353 and R107 delete
placement, "SUSTAT1#" siganl add R445 (10K) pullhigh to +3V power.
5. PAGE 6 - R119 delete placement and RP19 pin 1 change signal from "IGNNE#" to "CPUINIT#", "PWRGD_CPU" signal of R356 serial D45 (RB751V) to "VR_POK"
signal.
6. PAGE 6 - U9 pin 29 change signal from "VR_POK" to "V_GATE", U9 pin 32 change signal from "V_GOOD" to "VR_POK".

C

7. PAGE 7 - R175 and R177 delete placement, R189 change connection signal from "RRAS#4" to "RRAS#2", R176 change connection signal from "RRAS#5" to
RRAS#3", R190 change connection signal from "RRAS#2" to "RRAS#4", R191 change connection signal from "RRAS#3" to "RRAS#5".
8. PAGE 7 - R192 pin 1 change connection U34 pin AC22, R184 pin 1 change connection U34 pin AF23.

C

9. PAGE 9 - R83 and R338 delete placement, U34 pin M24 and pin F17 change power source from "+VCC_CORE" to "+VCPU_IO".
10. PAGE 10 - Signal "PCLK_SIO" add R427 (22) connection to U10 pin 11.
11. PAGE 11 - JP23 pin 61 change signal to "CLK_SDRAM3", JP23 pin 74 change signal to "CLK_SDRAM2", JP23 pin 69 change signal to "RRAS#3", JP23 pin
71 change signal to "RRAS#2", JP23 pin 62 change signal to "CKE3", JP23 pin 68 change signal to "CKE2".
12. PAGE 13 - U11 pin P16 change signal to "LID#".
13. PAGE 15 - U37 pin 148 used a 2N7002 to gatting leakage by "SYS_ALW" signal.

B

14. PAGE 17 - R398, R403, C494, R44, U42 delete placement, C465, C466, C467 change power source from +8VS to +5VS and serial L44 (HB1M2012-601JT) to
AVDD power, U3 pin 39 add R44 (10K) pullhigh to +3VS power, R1, R2, R3 changed value to 20K, R16, R17, R18 changed value to 24K.
15. PAGE 18 - R8, R7, R425, R426 change value to 22K, C22, C23, C503, C500 change value to 470PF, C6, C10, C510, C508 change value to 8200PF, C1, C4, C515,
C514 change value to 4700PF, C2, C3, C513, C509 change value to 150PF, C7, C11, C507, C502 change value to 68PF.
16. PAGE 19 - Audio AMP. changed to TDA8552, JP1 pin 3 add bais CKT (R429, R430, R428, C517), C9 delete placement and U43 pin 7 connect signal "MICIN",
Gatting internal MIC CKT changed to new one.
17. PAGE 20 - R258, R263, R267 delete placement, U32 pin 93 connect signal "SIORDY", U32 pin 12 connect signal "IRQ_15", U32 pin 12 connect signal
"SDDREQ", Q39 change value to 2N7002 and gate by "CD_PLAY_ON#", Q32, Q31 change value to 2N7002, U30 changed value to SI4800, R455 (100K),
Q60(2N7002) add part to control U30.
18. PAGE 21 - JP11 pin 44 change to no connection, JP11pin 21 serial R431 (82), JP11 pin 27 serial R432 (82), JP15 pin 27 serial R258 (82), JP15 pin 22 serial
R267 (82).
19. PAGE 22 - R322 and R160 both changed value to 5.6K.

B

20. PAGE 24 - C109 pin 2 change connection to L9 pin 2, JP6 pin 2 change connection to C109 pin 1 and signal "TV_GND".
21. PAGE 25 - U24 pin 94 changed to no connection.
22. PAGE 26 - U25 pin 2 and pin5 changed to no connection, U25 pin 9 connect signal "CD_PLAY", U25 pin 16 change connection signal "CD_PLAY_ON#".
23. PAGE 27 - Super I/O change to SMC37N869 CKT.
24. PAGE 28 - R278 and R207 delete placement.
25. PAGE 29 - U35 pin 4 change connection signal "VR_POK", U39 pin 13 add pullhigh R448(10K) to +3V power.
26. PAGE 30 - U18, U15, U17, U16 changed value to SI4800, Q11 changed value to SI3861, C202, C204, C203, C183, C184, C196 changed value to 4.7UF, C210,
C208, C294, R264, C182, C185, C299, R270, C309, C209, C207, C278, R255, C199, C195, C297, R265 delete placement.
27. PAGE 30 - R266, Q35, R47, Q1, C198, C190, R211, R209, Q14, Q16, C197, C194, C218, C215, R213, R212, Q17, Q18, C217, C216 delete placement.
28. PAGE 32 - Delete battery status LED CKT, signal "DRV0#" add level-shift CKT, JP12 changed pin difinition, JP9 pin 21 and pin 22 change to no connection,
JP9 pin 13 and pin 15 connect to "AGND", JP9 pin 14 change connection to signal "INT_MIC", JP9 pin 12 change connection to signal "HDDLED#" and add JP29
to support headphone board.
29. PAGE 33 - JP25 delete placement, JP26 pin 15, pin 17, pin 21, pin 23 direct connection to JP22 in page 31.
29. PAGE 17 - AVDD power supply change by MOS.
A

A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
5

4

3

2

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
1

40

of

47

5

4

3

2

1

P.I.R. (2) LIST
02/25/2000

Revision History
Date: 2000/02/14

REV#:

0.3

Description:

1. Issue A2C008 : Can't mute completely (Page 20)

A2-TEST TO B-TEST

- add resistor divider R1(20K-serial), R16 (24K-to AGND) on INT_CD_L
- add resistor divider R3(20K-serial), R18 (24K-to AGND) on INT_CD_R

D

- add C503 (1UF_0603) to decouple the small signal of INT_CD_R

2. PAGE 6 - U10 (GCL_AMI11686-001) pin 32 and R304 (10K) changed connection net to "G_VR_POK", R304 changed pull-high power source from
+3V to +3VS.
3. PAGE 10 - R127 changed value from 22 to 10 Ohm, C121 (33PF) change to reserved in PCB.

- add R426,R427 (both @10K) on INT_CD_L small signal voltage divider to be 2.5V (reserved)
- add R428,R429 (both @10K) on INT_CD_R small signal voltage divider to be 2.5V (reserved)

4. PAGE 17 - R44 changed value form 33 to 10 Ohm, C38 changed value from 22 to 15PF.

- add R436,R437 (both @10K) on LEFT_EQ and RIGHT_EQ for noise improvement (reserved)

5. PAGE 17 - Audio has one clean power source changed to two, one (+5VAMP) for AMP. and EQ, other (AVDD) for CODEC.

- add R432,R433 (@24K,@20K) on CDROM_L for noise improvement (reserved)

6. PAGE 18 - R8, R215, U1 and U21 changed power source from +5VCD to +5VAMP.

- add R434,R435 (@24K,@20K) on CDROM_R for noise improvement (reserved)

7. PAGE 19 - U2 changed power source from +5VCD to +5VAMP.

2. Correct CD-ROM CD_AGND pin assignment (page 21)

8. PAGE 19 - Q6 pin 3 add a serial resistor (2.2K) to connect JP1 pin 3 and 2.

- change JP16 pin4 connection from CD_AGND to GND

9. PAGE 20 - Q42, Q43 and Q32 swap pin 1 and 3, U33 (OZ163) pin 56 change 1K pull-down ground to 10K pull-high +5VCD of R366.

3. No load D20(level shift gate for VR_POK) for Geyservelli inside (page 6)

10. PAGE 25 -U41 (87570) add "FIR_PRE#" signal at pin 84, RP56 (8P4R_10K) add "FIR_PRE#" signal at pin 5 and "BT_PRE#" signal at pin 7.

4. Add amplify mute AMP_MUTE for reservation only (page 17,19)

11. PAGE 26 - "PLAYBTN#", "REVBTN#", FRDBTN#, STOPBTN#, "DJ_ON/OFF#", VOL_UP#, VOL_DW# and "CONA#" signals add RP55 pull-high array.

- add Q54 (@FDV301), R430(@100K), R431(@10K)

12. PAGE 27 - R205 change value from 33 to 10 ohm, C176 change value from 10 to 15PF.

- AMP_MUTE was inverse from the output of ESS1988 pin63

13. PAGE 27 - U15 pin 81 changed to connect to "DTRA#" signal, pin 80 changed to connect to "CTSA#" signal, pin 79 changed to connect to "RTSA#"
signal, pin 78 changed to connect to "DSRA#" signal, pin 77 changed to connect to "TXDA", pin 76 changed connect to "RXDA" signal, pin 83 changed to
connect to "DCDA#" signal.
14. PAGE 29 - U8 pin 11 changed to connect to "FIR_PRE#" signal.

- AMP_MUTE was connected to TDA8552TS pin5
5. Add M_SEN# for CRT monitor detection (page24,25)
- add D45(DAN217), R425(100K), C371(68PF)
- M_SEN# was coming from JP11 pin11

15. PAGE 29 - U8 (MAX708) pin 1 changed to connect to "G_VR_POK" signal, R283 changed value from 240K to 113K and pin 1 changed to connect to
+3VS power, , U8 (MAX708) pin 5 serial a resistor (2.2M) to R283 pin 2.
16. PAGE 29 - U26F (74LVC14) pin 13 add one +5V RC delay CKT.

C

D

- add C502 (1UF_0603) to decouple the small signal of INT_CD_L

1. PAGE 6 - Q12 (GCL_SI2302DS) swap pin 1, 3.

- M_SEN# was going to EC pin83
6. Exchange IR module pin11 and pin13 (page 28)

17. PAGE 32 - JP12 pin 17 changed power source from +5VS to +5VALW, JP12 pin 17 changed signal from NC to "DOT_PRES#", JP9 pin 25 changed
signal from "ON/OFFBTN#" to "ON/OFF" (Old components' references).
18. PAGE 33 - JP26 pin 80 and 82 changed power source from +5V to +5VALW.

- pin11 will be GND
7. Add CP8,9,10,11,12,13 (@8P4C_22PF) on keyboard signals for reserve(page 29)

C

8. Change MAX708 to be MAX6342 for cost improvement (page 29)
9. Delete three beads HB1M1608-121JT on Mini-PCI connector pin28,19,123 (pass through) (page 31)
10. MD_BITCLK improvement for EMI (page 17,31)

02/18/2000

- add R423(22 ohm) serial on MD_BITCLK(nearby ESS1988)

1. SpeedStep Workarond for CPU_STP# timming (page 6)

- add R424(10 ohm), C501(15PF) AC termination on MD_BITCLK (nearby Mini-PCI CN)

- add D19 (@RB717), pin1 connect CPU_STP#, pin2 connectVRCHGNG#, pin3 connectGCL_CPUSTP#

11. Internal PS2 signals add two decouple CAPs for EMI improvement

2. Remove CPU_LO/HI# pull high (CPU had internal pull high) (page 6)

- C499(@22PF) on PS2_CLK

- no load R100 (@GCL_1.5K)

13. Switch Board change pin definition for Inverter Power (page 32)

- add R298 (@GCL_0) serial on the trace 14.3M_GCL

- JP10 pin3,4,5,6 change from +5VS to be INVPWR

- U11 pin26 add a serial R114 (@22) on 14.3M_GCL
4. Remove North Bridge TESTIN# pull high (according to updated RDDP) (page 7)

- JP10 pin21,22 change from NC to be +5VS

02/29/2000

- no load R329 (@10K)

1. Modify the references of some components for easy layout

5. No connection DCLKRD input of the North Bridge (arrording to RDDP) (page 6)

- R433 <=> R1 => R433=20K,R1=0 ohm

- let U31 pin AB22 to be NC

- R432 <=> R16 => R432=24K,R16=@24k

6. Change AGPREF to meet RDDP (page 8)

- R435 <=> R3 => R435=20K,R3=0 ohm

- R152 change value from 1K_1% to be 3.48K_1%

- R434 <=> R18 => R434=24K,R18=@24K

- R154 change value from 2K_1% to be 2.32K_1%

2. Scheme correct (page 6)

7. Redundance ECC serial resistors remove (page 12)

- D19 pin3 change net from GCL_CPUSTP# to CPU_CPU_STP#

- no load RP47 (@16P8R-10)

- D20 pin1 add a output module VR_POK for external connection

8. Improve PIIX4 32KHz crystal RC value for more reliable (page 13)
B

- C500(@22PF) on PS2_DATA

12. Dot-Matrix connector change from 30 pins 0.5 pitch to 24 pins 1.0 pitch (page 32)

3. Reserve 14.318MHz from Clock generator to Geyserville control logic (page 6,10)

3. A2H001 & A2C045 (CD-ROM copy compare fail & low performance)

- R172 change value from 1M to be 22M

- IRQ14 damping R306 change from 82 ohm to 33 ohm

- C164,C165 change value from 22PF to be 12PF

- IRQ15 damping R333 change from 82 ohm to 33 ohm

9. MIC circuit improve (page 19)
- add a serial R53 (2.2K) on Q6 pin3

- connect JP24 pin2,3 together

- PIORDY pull high R311 change from 1K ohm to 10K ohm

- no load U22,C8,C239,C240,R234

- change R23 from 27K to be 0 ohm

- SIORDY damping R378 change from 82 ohm to 0 ohm

- change R29 from 10K to be 0 ohm

- change C20 from 1UF to be 0 ohm

- SIORDY pull high R341 change from 1K ohm to 10K ohm

- change R32 from 2K to be 2.2K

- add Q1 (2S2411EK) just like Q56 but only pin3 connect to R32 pin1

- PDDREQ damping R320 change from 82 ohm to 33 ohm

10. For layout space improve (page 20)

- CD_DREQ damping R380 change from 82 ohm to 33 ohm

- C429 change value from 10UF_10V_1206 to be 1UF_0603

03/01/2000

- R359 change from 10K to be 100K

1. Add MUTE function for amplify (page 17,19,26)

11. CD_AGND improvement (page 21)

- add "MUTE" signal on U3 pin63

- add R356 (0_0603 ohm) between CD_AGND & GND (at the middle of the trace)

- add "EC_MUTE" signal on U39 pin5

- add R288 (0_0603 ohm) between CD_AGND & GND (close CD-ROM module)

- add U47 (NC7ST32-SC70) to "OR" "MUTE & "EC_MUTE"

12. Modify BlueTooth connector definition

(U47 pin1 = "MUTE", pin2 = "EC_MUTE" , pin4 connect to U2(Amplify) pin5)

- pin 1 : NC -> BT_DET

- pin 6 : GND -> BT_ON#

- add C504(0.1UF) for U47 power decoupling

- pin 3 : NC -> BT_WAKE_UP

- pin 8 : NC -> BT_PRE#

- add R438(0 ohm) serial on "EC_MUTE" for reserve only

- pin 7 : NC -> BT_USB1_D+

- pin 10 : BT_PRE# -> GND

- pin 9 : NC -> BT_USB_D-

- pin 12: BT_WAKE_UP -> TO_USB1_D+

- pin 13 : NC -> BT_RST#

- pin 14 : NC -> TO_USB1_D-

- no load R36 to be @0 ohm (original pull down on U2 pin5
2. Add some CAPs for noise cross reference (help for EMI & signal quality)
- for PCI BUS on +3VS,+5VS : C505,C508 (0.1UF) ; on +3VS,+3V : C510,C511 (0.1UF) ;

- pin 16 : BT_ON# -> GND

A

B

- PIORDY damping R309 change from 82 ohm to 33 ohm

on +3VS,+3VALW : C513 (0.1UF) on +3V,+3VALW : C515 (0.1UF)

- pin 18 : BT_RST# -> NC

- for CD-ROM IDE BUS on +3V,+5VS : C512 (0.1UF) ; on +3VS,+3V : C514 (0.1UF) ; on +5VS,+5VCD : C516 (0.1UF)

- pin 20 : BT_DET -> NC

- for HDD IDE BUS on +3VS,+3V : C506 (0.1UF) ; on +5VS,+3V : C509 (0.1UF)

- add R317,R324,R318,R325 (0 ohm) & R316,R323,R319,R326 (@0)

A

- for AGP BUS on +3V,+3VS : C507 (0.1UF)

for USB1 signals switching (BlueTooth or non-BlueTooth)

03/08/2000
1. Improve EQ quality (page 18)

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

SCHEMATIC, M/B LA-733
Size

Document Number

Rev
4C

401138
Date:

5

Compal Electronics, inc.

4

Tuesday, August 21, 2001

Sheet

41

of

47
3

- R31,R231 change from 120K to 12K

- R28,R233 change from 1M to 180K

- R27,R223 change from 120K to 20K

- R24,R226 change from 1M to 270K

- R213,R12 change from 120K to 16K

- R13,R217 change from 1M to 240K

- R218,R214 change from 120K to 24K

- R11,R221 change from 1M to 330K

- C7,C10,C229,C234 change from 68PF to 0.22UF

- R227,R232 change from 120K to 1.5K

- R25,R229 change from 1M to 24K

- C21,C22,C235,C237 change from 470PF to 3300PF

- C6,C9,C228,C230 change from 8200PF to 330PF

- C1,C4,C222,C223 change from 4700PF to 5600PF

- C2,C3,C224,C227 change from 150PF to 180PF

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P.I.R. (3) LIST
D

Revision History
Date: 2000/03/23

D

REV#:

0.4

Description:

03/23/2000

03/30/2000
2. MODEM can't work was caused by the mal-reset of MD_RST# (page 31)

1. Correct ON/OFF button signal for PIIX4 (page 13)
- D9 pin1 change connection from ON/OFFBTN# to ON/OFF

- add R462 @0 for MD_RST#

2. Correct DM_ON signal for OZ163 direct CD-PLAY function (page 20)
- change D26 pin1 from CD_PLAY_ON# to DM_ON

- add R463 0 for PCIRST# (default)
3. CMOS data lost (caused by +5VALW undershoot too big while unplug the AC) (page 34)

3. Correct Bluetooth power supply (page 24)

- change PD8 from BYS10-45 to RB051L40 (the same as PD30)

- JP20 pin15,17,19 change connection from +3VS to +3VALW

4. IRQ8 need to pullhigh (because BIOS change the programming method) (page 13)

- JP20 pin18,20 change connection from N.C. to +5VALW for USB hub on Bluetooth module
4. Add a option resistor for G_VR_POK for 733L while Geyservilli ASIC was no load (page 6)
- add R448 L@0, pin1 connect V_GATE, pin2 connect G_VR_POK

- load R167 1K

04/05/2000
1. Speed up the +3V discharge time (page 30)

5. For Factory ATE testing (page 6)
C

B1-TEST TO B2-TEST

- R371 change from 470 ohm to 33 ohm

- change R117,R121 from LN_0 to LN_1K

C

- add R447 LN_1K on U10 pin43
6. Improvement for Issue A2C008 (page 20)
- change R432,R434 from 24K to 33K
- add C517,C518 1UF_0603 serial in front of the EQ for LEFT_EQ & RIGHT_EQ respectively
7. Improve the reserved "MUTE" function (page 19)
- add R445 100K
- add D46,D48,D49 RB751V
- add R444 @0
- add C526 @.1UF
- add U48 @NC7ST32
- no load R43,R33 to be @100K
- no load R235 to be @10K

03/28/2000
B

1. Reserve Pull high for VID[0..4] (page 5)

B

- add RP65 @8P4R-4.7K & R461 @4.7K
2. Improve PCI signal quality (add damping resistors)
- for miniPCI : add RP60,RP61,RP62,RP63,RP64,Rp66 16P8R-33 ohm (page 31)
- for miniPCI : R453,R454 33 ohm & R450R452,R449,R451 10 ohm (page 31)
- for PCI1420 : R458,R459,R460 10 ohm (page 15)
- for ESS1988 : R455,R456,R451 10 ohm (page 17)
3. Add pad junction for TV_GND for EMI request (page 24)
- add JOPEN6 2MM for TV_GND

03/30/2000
1. FIR module change from HP3600 to VISHAY TFDS6101E (page 28)
- change R286 from LN_2.2_1206 to @LN_3.3_1206 (change to be on load)
- change R97 from LN_560 to LN_0_0805
- delete R287 (original @0)
A

A

- change R102 from original LN_0 to 100K
- change C111 from LN_220PF to LN_0.1UF
- delete C368 (original LN_0.47UF_16V_0805)
- change U9 from LN_HSDL_3600 to LN_TFDS6101E

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

- add R446 LN_3.3_1206
- add C525 LN_100PF

Date:
5

4

3

2

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
1

42

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P.I.R. (4) LIST
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Revision History
Date: 2000/04/20

D

REV#:

0.5

Description:

04/20/2000

05/03/2000

1. Correct MOS switch (74HCT4066) for switching headphone or Int. speaker (page 18)

17. Add more damping capicator in +VCPU_IO and VGTLREF_BX. (page 9)

- Add Q55 and Q54(2N7002) to use "HPS" signal to switching L-R channel.

- add C541, C539, C540 (.01UF).

- Add R466 (10K) and R465 (10K) pullhigh +5VCD

- add C538 (1UF).

- Add one MOS switch (74HCT4066) to switching L-R channel.

- add R476 (1K).

- Add R464 (@0) and R464 (@0) only for reserved, that can bypass MOS switch.

- add R477 (2K).

2. Add MOS to gatting MIC signal (page 19).

- change value C532, C533 (4.7UF).

- Add Q58(SI2304DS) and Q59(2N7002) to disconnect MIC. signal.

- change value C122, C142 (1UF).

- Add R470(100K) pullhigh resistor.

18. Add more damping capicator in +3V. (page 23)

- Add R471(10K) pulldown resistor.

- add C534 (10UF).
19. Modify and reserved for FAN control function. (page 30)

- Add R473(@10K) pulldown resistor.
C

B2-TEST TO B3-TEST

- Load R444(0), C526(.1UF) and U48(NC7ST32) for control "MUTE_AUD" signal

- add C542 (@10UF).

- No load R29(0).

- direct to connect Q29 pin 2, U4 pin7 and C274 pin 2.

3. Add JOPEN for EMI (page 24)

C

- remove R52 (0) and the resistor reserved for connect "EN_DFAN" signal and Q29 pin 2.

4. Add pullhigh resistor for "BIOSCS#" signal (page 25)
- add R472 (10K).
5. Add a diod to reserved for S/W (page 13)
- add D50 (@RB751V).
6. Add capicator on JP22 (RJ11) for EMI request. (page 31)
- add C529 and C529 (1000PF_2KV_1206).
7. Add capicator on JP10 "+5VCD" power pin for EMI request. (page 32)
- add C530(0.1UF).
8. Change EQ RC value. (page 18)
9. Add damping capicator C532 and C533 (1UF) on U31 power pin VTTA(M24) and
VTTB(F17) for WIN98 Multi-task will be halt. (page 9)
B

- add C532, C533(1UF).

B

10. Diconnect MIC Jack (JP24) pin 3 and pin 2 for EXT. MIC can't record voice.
(page 19)
11. Add capicator and change value for TV-OUT quility. (page 24)
- add C531(27PF).
- change C106 and C105 value (330PF).
12. Add CKT for gatting ME-OFF reset. (page 25)
- add Q56 and Q57(2N7002).
- add R468 (10K).
- add R469 (100K).
- add R474 (0).
13. Add resistor reserved for FAN control function. (page 30)
- add R475(@0).
14. Add +5VALW power pin at LCD status board connector (JP13) pin 15 and 34. (page 32)
15. Add ATE and function testing point.
A

A

16. Change RC value for beep sound is very loud. (page 19)
- change value R266(10K_1%).
- change value C285(.22UF).
- "PCM_SPK#" signal change to connect U26 pin 5 and C306 pin 1 change to connect U26 pin 6.

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:

5

4

3

2

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
1

43

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P.I.R. (5) LIST
D

Revision History
Date: 2000/06/15

D

REV#:

1.0

Description:

B3-TEST TO C-TEST

05/20/2000
1. Fix high pitch noise issue (page 18)
- Add C543 and C544 (0.01UF).
2. Fix PO-PO sound noise when power on (page 19).
- Add Q62, Q63, Q64, Q65 (SI2304DS).
- Add Q61(2N7002).
- Add R480(100K).
3. Fix USB power leakage (page 28)
- Add Q60(SI2306DS).
- Add R478(100K).
4. Fix CD-direct play will into sleep mode after 2 second (page 20)
C

- Delete R362 (10K).

C

- Add R364 (10K).
5. Fix 733 and 733C can't identify M/B (page 25)
- Add R479 (@10K).
6. For EMI change (page 32).
- Add C545, C546, C547, C548, C549, C550, C551 (220PF).
7. BOM change for EMI.
- C121 (@33PF --> 33PF) and R127 (10 --> 15 Ohm) for "48M" (page 10).
- C148 (@15PF --> 15PF) and R150 (@10 --> 33 Ohm) for "HCLK" (page 7).
- C163 (@22PF --> 22PF) for "DCLKO" (page 7).
- C160 (@22PF --> 22PF) for "GCLKO" (page 8).
- C169 (@10PF --> 22PF) and R187 (@33 --> 33 Ohm) for "DCLKO" (page 10).
- C444, C445, C460, C458 (@15PF --> 22PF) for SDRAM_CLK (page 11).
- R384, R385, R382, R383 (@33 --> 33 Ohm) for SDRAM_CLK (page 11).
8. Change value for FIR setting. (page 28)
B

B

- R98 (0 --> 10K).
- R102 (100K --> @10K).
9. Delete double pullup in "CDLED#" signal (The signal already had R189 pullup in page 21). (page 26)
- R350 (100K --> @100K).
10. Fix unplug AC-IN in SPR then system shut down. (page 29)
- Q51 (2N7002 --> @2N7002).
11. Fix "GCLKO" signal waveform quility on the EA report. (page 8)
- R162 (10 --> 22).
12. Fix "PCLK_MINI" signal waveform quility on the EA report. (page 10)
- R120 (33 --> 15).

06/08/2000
13. Fix IR noise. (page 28)
- C110 (10UF_10V_1206 --> @10UF_10V_1206).
A

A

06/15/2000
14. Fix "CLK_SDRAM2"~"CLK_SDRAM5" signal waveform quility on the EA report. (page 10)
- R346, R347, R348, R349 ( 22 --> 15 Ohm ).
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
5

4

3

2

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
1

44

of

47

5

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3

2

1

P.I.R. (6) LIST
D

Revision History
Date: 2000/06/26

D

REV#:

2.0

Description:

C-TEST TO MP-TEST

05/20/2000

11/03/2000 ( Modify for N32N-733B )

1. Fix winstone99 will be hang issue (page 4)
- Add C553(1UF), C554(1000PF) and C555(.01UF) for "CPU_IO" power.

- Change C427,C428 from "10PF" to "BN_10PF".

- Change value C338, C288, C67, C63, C61 and C324 from 0.1UF to 1000PF for "CPU_IO" power.

- Change C115 from "10UF_10V_1206" to "BN_10UF_10V_1206".

- Change value C344, C287, C68, C64 and C60 from 0.1UF to 0.01UF for "CPU_IO" power.

- Change C111,C430,C432,C435 from ".1UF" to "BN_.1UF".

- Change value C62, C59 and C66 from 0.1UF to 1UF for "CPU_IO" power.

- Change C525 from "100PF" to "BN_100PF".
- Change D25 from "1N4148" to "BN_1N4148".

2. Fix noise sound when plug-in headphone (page 17).
- Add Q66(2N7002).

- Change D26,D27,D28,D29,D30 from "RB751V" to "BN_RB751V".

- Add R481(33).

- Change U33 from "OZ163" to "BN_OZ163".
- Change U9 from "TFDU6101E" to "BN_TFDU6101E".

3. Fix T.P mouse move cause audio noise (page 17)

- Change JP13 from "HEADER24" to "BN_HEADER24".

- Delete L17, L13 and L3 (0_0805).
C

- Change JP26 from "DOCKING 100" to "BN_DOCKING 100".

4. Fix U2 pin 4 floting problem (page 19)

C

- Change Q33,Q34,Q44 from "2N7002" to "BN_2N7002".

- Add R482 (100K).
5. Fix +5VCD discharge slowly problem (page 20)
- Change R391 value from 470 to 33 Ohm.
6. Fix EA problem (page 10)
- Change value R346, R347, R348 and R349 from 22 to 10 Ohm for memory clock.
- Delete C121 (33PF) for 48M clock.

11/03/2000 ( Modify for N32N-733B )
1. BOM modified for N32N-733B (page 20,28,32,33)
- Change RP49 from "8P4R-10K" to "BN_8P4R-10K".
- Change RP48 from "10P8R_10K" to "BN_10P8R_10K".
- Change RP51,RP53 from "10P8R_4.7K" to "BN_10P8R_4.7K".
- Change RP52 from "@16P8R_33" to "B@16P8R_33".
B

- Change RP54,RP50 from "@16P8R_0" to "B@16P8R_0".

B

- Change R361 from "1M" to "BN_1M".
- Change R359,R394 from "100K" to "BN_100K".
- Change R361 from "1M" to "BN_1M".
- Change R360,R363,R364,R366,R367,R368,R98 from "10K" to "BN_10K".
- Change R102 from "@10K" to "B@10K".
- Change R355 from "1K" to "BN_1K".
- Change R375 from "5.6K" to "BN_5.6K".
- Change R374 from "47K" to "BN_47K".
- Change R97 from "0_0805" to "BN_0_0805".
- Change R446 from "3.3_1206" to "BN_3.3_1206".
- Change R369 from "33" to "BN_33".
- Change R370 from "@33" to "B@33".
- Change R379,R376,R377 from "@0" to "B@0".
- Change L41 from "HB1M2012-601JT" to "BN_HB1M2012-601JT".
A

A

- Change X2 from "8MHZ" to "BN_8MHZ".

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
5

4

3

2

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
1

45

of

47

5

4

3

2

1

P.I.R. (7) LIST
D

Revision History
Date: 2000/12/20

D

REV#:

3.0

Description: C2-TEST for H1.6/MP-TEST for H1.5

12/20/2000
1. Fix C0-step after CPU (page 4)
- Change U7 P1 pin power source from "+VCPU_IO" to "+VCC_CORE".
2. Mini-PCI add 4 signal for 802.11b combo module (page 31)
- Add R483(10) for "REQ#0" signal on pin 21 of Mini-PCI connector (JP25) .
- Add R485(100) for "S_AD26" signal for IDSEL on pin 43 of Mini-PCI connector (JP25) .
- Add R484(10) for "GNT#0" signal on pin 22 of Mini-PCI connector (JP25) .
- Add R486(10) for "PME#" signal for 802.11b device on pin 36 of Mini PCI connector (JP25) .
3. Fix Microphone feedback sound issue
- Add new signal (AUTO_GAIN_CONTROL) output from U3 (ESS1988) pin 49 (Page 17) that connect U44 pin 4 (Page 26).
4. Capacitor change value to met Intel 1GHz CPU requirement (page 4)
C

C

- C299, C300 change value from 1UF to 10UF.
- C292, C354 change value from 0.1UF to 10UF.
- C309, C350, C364, C361 change value from 0.01UF to 10UF.
- C298, C349 change value from 1000PF to 10UF.

12/26/2000 Power Change List For Hurricane 1.6
1. Use MAX1711 instead of AD3421 (Control PWM IC) and AD3410 (Driver) in CPU-CORE circuitry. (page 36)
2. One MOSFET (FDS7764A) is reserved for 21.1A peak current in 1GHz Intel CPU. (page 36)
3. PU14 is added for 2.5V CLK_VCC (The Linear regulator is included in AD3421 for original LA733 design). (page 36)

Date: 2000/02/02
B

REV#:

4.0

Description: MP-TEST

02/02/2001

B

1. Fix 1GHz CPU voltage transient issue (page 4)
- C555, C319, C326 and C303 change value from 0.01UF to 0.1UF.
- C554 and C325 change value from 1000PF to 0.1UF.
2. Del R97 (0 ohm_0805) because of PCB trace connected. (page 28)

02/02/2001 Power Change List For Hurricane 1.6
1. PR92 change value from 174K to 200K for "CPU_IO" voltage down from 1.58V to 1.5V. (page 37)
2. PR215 change value from 150K to 215K for current limit protection. (page 36)
3. Add PR226 (2.2 Ohm) for EMI requirement. (page 36)
4. Add PC184, PC185, PC186, PC187 and PC188 6 pcs capaciator those value all are 0.1UF_0805_25V for EMI requirement. (page 36)
5. Add one circuit for EMI requirement. (page 38)
- Add PQ116 (2N7002).
- Add PC190 (0.47UF_0805) and PC191 (1000PF).
A

A

- Add PD45 (ISSS355).
- Add PR230 (470 Ohm).
- Reserved PR229 (0 Ohm), PR228 (0 Ohm) and PR227 (2.2K_0805).
- Reserved PQ115 (2N7002).

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

- Reserved PC189 (1UF_0805).

Date:
5

4

3

2

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
1

46

of

47

5

4

3

2

1

P.I.R. (8) LIST
D

Revision History
Date: 2001/03/05

D

REV#:

4A

Description: C3-TEST for H1.6/MP-TEST for H1.5

03/05/2001
1. Modify the Res.'s value to meet U36 NM24C16 2nd source's SPEC (Page 26) .
- R397,R398,R399 change value from 100K ohm to 1K ohm .
2. Modify the FIR related C.K.T. to fix the nun-work issue (Page 28) .
- Cut the connection between C115.2,C111.2,C525.2,U9.8 and GND signal .
- Connect C115.2,C111.2,C525.2,U9.8 to JOPEN11.1 .
- Connect JOPEN11.2 to JOPEN10.1 .
- Connect JOPEN10.2 to GND signal near C98 side .
3. Make a table to show the H1.5/H1.6 ID selection (Page 25) .
- Remove R416(10K ohm),R479(10K ohm) and add R420(10K ohm) when selected for H1.6 Celeron .
- Remove R416(10K ohm),R420(10K ohm) and add R479(10K ohm) when selected for H1.6 PIII .
C

C

- Remove R479(10K ohm) and add R420(10K ohm),R416(10K ohm) when selected for H1.5 PIII .
- Remove R420(10K ohm) and add R479(10K ohm),R416(10K ohm) when selected for H1.5 Celeron .
4. Add three resistors for EMI solution (Page 17) .
- Add L17,L13,L3 (0 ohm 0805) to fix the EMI issue .

03/09/2001
1. Add R488 10K ohm Res. for platform ID (Page 25) .
- C3-test (REV:4A) M/B lose it . It will be put into REV:4B M/B and rework on REV:4A .

03/19/2001
1. Return the making table for showing the H1.5/H1.6 ID selection action (Page 25) .
- Add R416(10K ohm),R479(10K ohm) and remove R420(10K ohm) when selected for H1.6 Celeron .
- Add R416(10K ohm),R420(10K ohm) and remove R479(10K ohm) when selected for H1.6 PIII .
- Remove R479(10K ohm) and add R420(10K ohm),R416(10K ohm) when selected for H1.5 PIII .
B

- Remove R420(10K ohm) and add R479(10K ohm),R416(10K ohm) when selected for H1.5 Celeron .

B

2. Cancel R488 10K ohm Res. rework for platform ID (Page 25) .
- C3-test cancel the R488(10K ohm) rework for platform ID selection action but still reserve that to connect GND on REV:4B PCB for future .
3. Change PR181 from 22uF_6.3V Tan. Cap. to 22uF_10V Ceramic Cap. for ME (Page 36)
.

03/21/2001
1. Add CAP to fix FIR issue (Page 28) .
- Add C556(22U_10V_1206) to close C111 ASAP on REV:4B PCB . Put C556 to close C111 on REV:4A PCB by rework this time .

A

A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
5

4

3

2

Compal Electronics, inc.
SCHEMATIC, M/B LA-733
Document Number

Rev
4C

401138
Tuesday, August 21, 2001

Sheet
1

47

of

47

www.s-manuals.com



---

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