Compal LA 7531P Schematics. Www.s Manuals.com. R0.1 Schematics

User Manual: Motherboard Compal LA-7531P QAZ00 Shuriken 13.3 - Schematics. Free.

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1

Compal Confidential

2

2

QAZ00 (Shuriken 13.3) M/B Schematics Document
Intel Sandy Bridge ULV Processor with DDRIII + Cougar Point PCH SFF

LA-7531P

3

Date : 2011/04/10
Version 0.1 modify

3

4

4

2010/08/03

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Title

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Cover Page
Size Document Number
Custom
Date:

Rev
0.1

LA-7531P

Sunday, April 10, 2011

Sheet
E

1

of

45

A

B

C

D

E

Memory BUS(DDRIII)

Compal Confidential
1

1.5V DDRIII 1066/1333/1600 for CR

Intel
Sandy & Ivy Bridge
SA000042410

Model Name :QAZ00 Shuriken 13.3
eDP (Reserved)

File Name : LA-7531P

Channel A

1

SODIMM
SP07000NN00
Page 11

ULV Processor
FCBGA 1023

2011/04/10

Page 4~10

FDI x8
LVDS Conn.

HDMI Conn.
Page 20

100MHz
2.7GT/s

Page 23

LVDS(UMA)
HDMI(UMA)
PCI-Express x 8 (ARD PCIE2.0 2.5GT/s)

2

X1

100MHz

Page 25

MINI Card x1
WLAN

Page 22

JMINI3

MINI Card x1
WWAN (3G)
mSATA

Page22

JMINI2

X1

X1

X1

1GB/s x4

Power USB 1W

Page 12~19

USB 3.0 x4

X1

CMOS
Camera

X1

USB 2.0 x14

Page 23

3.3V 48MHz

X1
2

HD Audio

X1

3.3V 24MHz

USB 2.0 X1
SPI

HDA Codec

mSATA(MINI
Card) SATA
Conn. Page 24
JMINI1
X1

USB 2.0 or
3.0 X1

PCH SFF
1017 pin BGA

SATA x 6 (GEN1
1.5GT/S ,GEN2 3GT/S)

LAN(Gbe)
RTL8111E-VL
Page 21

DMI x4
100MHz

Intel
CP & PP -M
SA000043Z00

100MHz

X1
X1

Card Reader
RTS5209

1.5V DDRIII 1066/1333 for HR

AUDIO HP
& MIC

ALC269Q
Page 29

BIOS SPI ROM x1,
4MB,U48
Page 12

Power
Button

Page 26

LS-7531P

Mic1 (Analog)
USB 2.0 Bus

Page 29

LPC BUS
33MHz

RJ45
Page 21
3

Power
Button

ENE KB930
/9012 Page 27

PS2

SMBus

3

Page 28

SPI

Touch Pad
HID Sensor

Int.KBD
Page 28

EC ROM
-SPI

Page 27

LEDs

LS-7532P
4

4

Page 28

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/08/01

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Title

Block Diagrams
Size Document Number
Custom

Rev
0.1

LA-7531P

Date:

Sunday, April 10, 2011

Sheet
E

2

of

45

A

B

C

D

E

QAZ00 (LA-7531P Ver:0.1)
Voltage Rails
Power Plane

1

S1

S3

S5

VIN

Adapter power supply (19V)

N/A

N/A

N/A

BATT+

Battery power supply (12.6V)

N/A

N/A

N/A

B+

AC or battery power rail for power circuit.

N/A

N/A

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

+VGFX_CORE

Core voltage for UMA graphic

ON

OFF

OFF

+0.75VS

+0.75VP to +0.75VS switched power rail for DDR terminator

ON

OFF

OFF

+1.05VS_VCCP

SIGNAL

STATE

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

Full ON

+VALW

+V

+VS

Clock

HIGH

HIGH

HIGH

HIGH

ON

ON

ON

ON

S1(Power On Suspend)

LOW

HIGH

HIGH

HIGH

ON

ON

ON

LOW

S3 (Suspend to RAM)

LOW

LOW

HIGH

HIGH

ON

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

LOW

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

LOW

LOW

ON

OFF

OFF

OFF

+V1.05SP to +1.05VS_VCCP switched power rail for CPU

ON

OFF

OFF

+VCCP (1.05V ) power for PCH

ON

OFF

OFF

+1.5V

+1.5VP to +1.5V power rail for DDRIII (1.35V OR 1.5V)

ON

ON

OFF

+1.5VS

+1.5VS switched power rail

ON

OFF

OFF

+1.8VS

(+5VALW ) to 1.8V switched power rail to PCH & GPU

ON

OFF

OFF

+3VALW

+3VALW always on power rail

ON

ON

ON*

+3VALW_EC

+3VALW always to KBC

ON

ON

ON*

+LAN_IO

+3VALW to +LAN_IO power rail for LAN

ON

ON

ON*

+3V_PCH

+3VALW to +3V_PCH power rail for PCH (Short Jumper)

ON

ON

ON*

+3VS

+3VALW to +3VS power rail

ON

OFF

OFF

+5VALW

+5VALWP to +5VALW power rail

ON

ON

ON*

Device

Address

+5V_PCH

+5VALW to +5V_PCH power rail for PCH (Short resister)

ON

ON

ON*

Smart Battery

0001 011X b

+5VS

+5VALW to +5VS switched power rail

ON

OFF

OFF

+VSB

B+ to +VSB always on power rail for sequence control

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

+VCCP

2

Description

1

EC SM Bus1 address
EC SM Bus2 address
Address

Device
PCH (Reserve)

1010 0110b
2

PCH SM Bus address

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Device

Address

DDR DIMM0

1010 0000b

Mini Card1
Mini Card2
Mini Card3

SMBUS Control Table

SOURCE

3

EC_SMB_CK1
EC_SMB_DA1

KB930

EC_SMB_CK2
EC_SMB_DA2

KB930

BATT

MIINI1 MINI2

V X
X X

PCH

PCH_SMLCLK
PCH_SMLDATA

PCH

X
X

SODIMM

X
X

EC_SMB_CK2

PCH_SMBCLK

PCH_SMBDATA

PCH_SMBDATA

X
O

X
X

X
V

CLKOUT DESTINATION
PCI0

PCH_LPBACK

PCI1

PCI_LPC

V
X

V
X

V
X

V

V

X

X

O
X

PCI3

None

PCI4

None

DESTINATION

SATA

m-SATA,JMINI1

SATA1

m-SATA,JMINI2

SATA2

None

SATA3

None

CLKOUT_PCIE0

None

CLKOUTFLEX0

None

SATA4

None

CLKOUT_PCIE1

10/100/1G LAN

CLKOUTFLEX1

None

SATA5

None

CLKOUT_PCIE2

CARD READER

CLKOUTFLEX2

None

CLKOUT_PCIE3

MINI CARD WLAN

CLKOUTFLEX3

None

CLKOUT_PCIE5

None

CLKOUT_PCIE6

None

CLKOUT_PCIE7

None

CLKOUT_PEG_B

None

DESTINATION

SATA0

FLEX CLOCKS

Option

Symbol Note :

UMA

@
X

V

UHCI1
EHCI1
UHCI2
UHCI3
UHCI4
EHCI2

UHCI5
UHCI6

HDMI@
X

UHCI0

EMI@
X

USB 3.0

0
1
2
3
4
5
6
7
8
9
10
11
12
13

3

USB/B (Right Side)
Camera
Mini Card(WLAN)
WWAN (3G)
mSATA
USB/B (Right Side)

2 External
USB Port

Port

X

1
2
3
4

: means Digital Ground

USB/B (Right Side)
4

: means Analog Ground

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/08/01

Deciphered Date

2010/05/28

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

2 External
USB Port

USB 2.0 USB 1.1 Port

DESTINATION

None

2011/04/09 Check

USB Port Table

None

DIFFERENTIAL

CLKOUT_PCIE4
4

X
X

MINI3

PCI2

PCH_SMBCLK
PCH_SMBDATA

CLK

2011/04/07 Modify

B

C

D

Title

Notes List
Size
C
Date:

Document Number
LA-7531P

Rev
0.1
Sheet

Saturday, April 09, 2011
E

3

of

45

5

4

3

2

PEG_ICOMPI and RCOMPO signals should be
shorted and routed
with - max length = 500 mils - typical
impedance = 43 mohms
PEG_ICOMPO signals should be routed with max length = 500 mils
- typical impedance = 14.5 mohms

+V1.05S_VCCP
1

D

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

14
14
14
14

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

N3
P7
P3
P11

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

14
14
14
14

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

K1
M8
N4
R2

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

14
14
14
14

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

K3
M7
P4
T3

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

14
14
14
14
14
14
14
14

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

U7
W11
W1
AA6
W6
V4
Y2
AC9

FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]

14
14
14
14
14
14
14
14

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

U6
W10
W3
AA7
W7
T4
AA3
AC8

FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]

AA11
AC12

14 FDI_FSYNC0
14 FDI_FSYNC1

U11

FDI_INT

1

14 FDI_INT

FDI0_FSYNC
FDI1_FSYNC

B

eDP_COMPIO and ICOMPO signals
should be shorted near balls
and routed with typical
impedance <25 mohms

FDI0_LSYNC
FDI1_LSYNC

AF3
AD2
AG11

eDP_COMPIO
eDP_ICOMPO
eDP_HPD

2

RC2
24.9_0402_1%

14 FDI_LSYNC0
14 FDI_LSYNC1

AA10
AG8

EDP_COMP
23

EDP_HPD#

eDP_AUX#
eDP_AUX

23
EDP_TXN0
23
EDP_TXN1
PAD
T1 @
PAD
T2 @

EDP_TXN2
EDP_TXN3

AC3
AC4
AE11
AE7

eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]

23
EDP_TXP0
23
EDP_TXP1
PAD
T3 @
PAD
T4 @

EDP_TXP2
EDP_TXP3

AC1
AA4
AE10
AE6

eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]

DP

AG4
AF4

23 EDP_AUXN
23 EDP_AUXP

G3
G1
G4

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO

PCI EXPRESS -- GRAPHICS

M2
P6
P1
P10

Intel(R) FDI

+V1.05S_VCCP

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI

C

14
14
14
14

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

H22
J21
B22
D21
A19
D17
B14
D13
A11
B10
G8
A8
B6
H8
E5
K7

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4

PEG_COMP

D

2

RC1
24.9_0402_1%
UCPU1A

1

C

B

SANDY-BRIDGE_BGA1023~D

A

A

Compal Secret Data

Security Classification
Issued Date

2010/04/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PROCESSOR(1/7) DMI,FDI,PEG

Size Document Number
Custom

Rev
0.1

LA-7531P

Date:

Sunday, April 10, 2011

Sheet
1

4

of

45

5

4

3

2

1

Buffered reset to CPU

+3VS

+V1.05S_VCCP
CC1
0.1U_0402_16V4Z

NC

Y

PLT_RST# 2

RC4
43_0402_1%
1
2

G

A

4

BUFO_CPU_RST#

SN74LVC1G07DCKR_SC70-5

+3VS
D

XDP_DBRESET#
BUF_CPU_RST#

RC5

1 1K_0402_5%

2

circuit check 10k
@
RC6
0_0402_5%

2

3

15,21,25,27 PLT_RST#

UC1

P

1

RC3
75_0402_5%

1

D

2

2

5

1

1

H_PROCHOT#

16,27

H_PECI

1
RC9

1
RC10

H_PECI_ISO
2
0_0402_5%

A48

PECI

2 H_PROCHOT#_R
56_0402_5%

C45

PROCHOT#

2 H_THEMTRIP#_R
0_0402_5%

D45

THERMTRIP#

1 10K_0402_5% H_CPUPWRGD_R

2

CATERR#

16 H_THRMTRIP#

16 H_CPUPWRGD

H_PM_SYNC_R
1
2
RC13
0_0402_5%
RC16
0_0402_5%
1
2 H_CPUPWRGD_R

PM_SYS_PWRGD_BUF 1
RC18

C48

PM_SYNC

B46

UNCOREPWRGOOD

2 PM_DRAM_PWRGD_R BE45
130_0402_5%

BUF_CPU_RST#

SM_DRAMPWROK

D44

RESET#

B

PWR MANAGEMENT

14 H_PM_SYNC

1
RC12

J3
H2

CLK_CPU_DMI 13
CLK_CPU_DMI# 13

DPLL_REF_CLK
DPLL_REF_CLK#

AG3
AG1

CLK_CPU_DPLL 13
CLK_CPU_DPLL# 13

BCLK_ITP
BCLK_ITP#

N59
N58

BCLK
BCLK#

SM_DRAMRST#

DDR3
MISC

1 62_0402_5%

2

C49
@

27 H_PROCHOT#
RC11

T5

Processor Pullups

PROC_DETECT#

THERMAL

RC8

2
C57
10K_0402_5%

PAD

+V1.05S_VCCP

C

@ RC7

1

PROC_SELECT#

JTAG & BPM

PROC_DETECT (Processor Detect): pulled to
ground on the processor package. There is no
connection to the processor silicon for this
signal. System board designers may use this
signal to determine if the processor is present

MISC

F49

15 H_SNB_IVB#

CLOCKS

UCPU1B
This pin is for compability with future
platforms. A pull up resistor to VCCIO is
required if connected to the DF_TVS strap
on the PCH.

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

AT30 H_DRAMRST#
BF44
BE43
BG43

PRDY#
PREQ#

N53
N55

TCK
TMS
TRST#

L56
L55
J58

TDI
TDO

M60
L59

DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

CLK_RES_ITP 13
CLK_RES_ITP# 13

H_DRAMRST# 6

XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO

K58 XDP_DBRESET#_R 1 RC17
G58
E55
E59
G55
G59
H60
J59
J61

C

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

2 0_0402_5%

XDP_BPM#4_R
XDP_BPM#5_R
XDP_BPM#6_R
XDP_BPM#7_R

XDP_DBRESET#

RC19
RC20
RC21
RC22

1
1
1
1

@
@
@
@

2
2
2
2

XDP_DBRESET# 14

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

CFG12
CFG13
CFG14
CFG15

7
7
7
7

B

SANDY-BRIDGE_BGA1023~D

+3VALW

Follow DG 0.71

+1.5V_CPU_VDDQ

1

1

CC2
0.1U_0402_16V4Z

DDR3 Compensation Signals

2

RC27
0_0402_5%
2

1
2

14 PM_DRAM_PWRGD

B

O
A

4

PM_SYS_PWRGD_BUF

3

1

RC28
1

+3VS

@
RC29
39_0402_5%

2

200_0402_5%
1 2

Part Number = SA00003Y000
A

SUSP

SUSP

D

2
G
3

31,40

2
1 25.5_0402_1%
SD00000X700
2
1 200_0402_1%

SM_RCOMP2 RC26

1 140_0402_1%

PU/PD for JTAG signals

P

1

SYS_PWROK

RC25
200_0402_5%

UC2
74AHC1G09GW_TSSOP5

2

SM_RCOMP1 RC24

+V1.05S_VCCP

G

14

5

2

SM_RCOMP0 RC23

@
QC1
2N7002_SOT23

XDP_TMS

RC30

2

1 51_0402_5%

XDP_TDI

RC31

2

1 51_0402_5%

XDP_TDO

RC32

2

1 51_0402_5%

XDP_TCK

RC33

2

1 51_0402_5%

XDP_TRST# RC34

2

1 51_0402_5%

A

S

Compal Secret Data

Security Classification
Issued Date

2010/4/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PROCESSOR(2/7) PM,XDP,CLK

Size Document Number
Custom

Rev
0.1

LA-7531P

Date:

Sheet

Sunday, April 10, 2011
1

5

of

45

5

4

3

2

1

UCPU1C
UCPU1D
AG6
AJ6
AP11
AL6
AJ10
AJ8
AL8
AL7
AR11
AP6
AU6
AV9
AR6
AP8
AT13
AU13
BC7
BB7
BA13
BB11
BA7
BA9
BB9
AY13
AV14
AR14
AY17
AR19
BA14
AU14
BB14
BB17
BA45
AR43
AW48
BC48
BC45
AR45
AT48
AY48
BA49
AV49
BB51
AY53
BB49
AU49
BA53
BB55
BA55
AV56
AP50
AP53
AV54
AT54
AP56
AP52
AN57
AN53
AG56
AG53
AN55
AN52
AG55
AK56

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

11 DDR_A_BS0
11 DDR_A_BS1
11 DDR_A_BS2

BD37
BF36
BA28

SA_BS[0]
SA_BS[1]
SA_BS[2]

11 DDR_A_CAS#
11 DDR_A_RAS#
11 DDR_A_WE#

BE39
BD39
AT41

SA_CAS#
SA_RAS#
SA_WE#

D

C

B

SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]

DDR SYSTEM MEMORY A

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AU36
AV36
AY26

M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA

M_CLK_DDR0 11
M_CLK_DDR#0 11
DDR_CKE0_DIMMA 11

SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]

AT40
AU40
BB26

M_CLK_DDR1 11
M_CLK_DDR#1 11
DDR_CKE1_DIMMA 11

SA_CS#[0]
SA_CS#[1]

BB40
BC41

DDR_CS0_DIMMA# 11
DDR_CS1_DIMMA# 11

SA_ODT[0]
SA_ODT[1]

AY40
BA41

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

AL11
AR8
AV11
AT17
AV45
AY51
AT55
AK55

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

AJ11
AR10
AY11
AU17
AW45
AV51
AT56
AK54

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

BG35
BB34
BE35
BD35
AT34
AU34
BB32
AT32
AY32
AV32
BE37
BA30
BC30
AW41
AY28
AU26

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

M_ODT0 11
M_ODT1 11

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

DDR_A_MA[0..15]

11

11

11

AL4
AL1
AN3
AR4
AK4
AK3
AN4
AR1
AU4
AT2
AV4
BA4
AU3
AR3
AY2
BA3
BE9
BD9
BD13
BF12
BF8
BD10
BD14
BE13
BF16
BE17
BE18
BE21
BE14
BG14
BG18
BF19
BD50
BF48
BD53
BF52
BD49
BE49
BD54
BE53
BF56
BE57
BC59
AY60
BE54
BG54
BA58
AW59
AW58
AU58
AN61
AN59
AU59
AU61
AN58
AR58
AK58
AL58
AG58
AG59
AM60
AL59
AF61
AH60

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

BG39
BD42
AT22

SB_BS[0]
SB_BS[1]
SB_BS[2]

AV43
BF40
BD45

SB_CAS#
SB_RAS#
SB_WE#

SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]

BA34
AY34
AR22
D

DDR SYSTEM MEMORY B

11 DDR_A_D[0..63]

SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]

BA36
BB36
BF27

SB_CS#[0]
SB_CS#[1]

BE41
BE47

SB_ODT[0]
SB_ODT[1]

AT43
BG47

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

AL3
AV3
BG11
BD17
BG51
BA59
AT60
AK59

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

AM2
AV1
BE11
BD18
BE51
BA61
AR59
AK61

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

BF32
BE33
BD33
AU30
BD30
AV30
BG30
BD29
BE30
BE28
BD43
AT28
AV28
BD46
AT26
AU22

C

B

SANDY-BRIDGE_BGA1023~D
SANDY-BRIDGE_BGA1023~D

1

+1.5V

RC36
1K_0402_5%
2

@ RC35
0_0402_5%
1
2

D

S

H_DRAMRST#

DDR3_DRAMRST#_R
1
QC2
BSS138_NL_SOT23-3

3
2

5 H_DRAMRST#

RC39
0_0402_5%
1
2

7,13 DRAMRST_CNTRL_PCH

2

1

A

DDR3_DRAMRST# 11

G

RC38
4.99K_0402_1%

RC37
1K_0402_5%
1
2

A

DRAMRST_CNTRL

1

2

Compal Secret Data

Security Classification
CC3
0.047U_0402_16V4Z

Issued Date

2010/04/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PROCESSOR(3/7) DDRIII

Size Document Number
Custom

Rev
0.1

LA-7531P

Date:

Sheet

Sunday, April 10, 2011
1

6

of

45

5

4

3

2

1

1

CFG Straps for Processor

D

+V_DDR_REFA

CFG2
1

QC7
@
SB000002X00
BSS138W-7-F_SOT323-3
2
G

DRAMRST_CNTRL_PCH

RC40
1K_0402_1%

6,13

1

@

2

3

S

D

2 0_0402_5%~D

D

+V_DDR_REFA_R

1

RC15

PEG Static Lane Reversal - CFG2 is for the 16x

2

RC14
1K_0402_1%
@

1: Normal Operation; Lane #
socket pin map definition

CFG2

For Chief River only

*

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

definition matches

0:Lane Reversed

1

CFG4

RC44

1
2
RC45

+VGFX_CORE

RC46
1K_0402_1%
@

1
2
RC43

H45
K45

VAXG_VAL_SENSE
VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48
K48

RSVD6
RSVD7

RC47
1K_0402_1%
@

BA19
AV19
AT21
BB21
BB19
AY21
BA22
AY22
AU19
AU21
BD21
BD22
BD25
BD26
BG22
BE22
BG26
BE26
BF23
BE24

RSVD34
RSVD35
RSVD36
RSVD37
RSVD38

M13
M14
U14
W14
P13

RSVD39
RSVD40

AT49
K24

RSVD41
RSVD42
RSVD43
RSVD44

AH2
AG13
AM14
AM15

RSVD45

N50

Display Port Presence Strap

*

CFG4

C

1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

CFG6

1

2 49.9_0402_1% VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
1
49.9_0402_1%

VCC_VAL_SENSE
VSS_VAL_SENSE

N42
L42
L45
L47

RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

CFG5

DC_TEST_A4
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_C59
DC_TEST_A61
DC_TEST_C61
DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1

1

VCC_VAL_SENSEH43
249.9_0402_1%
VSS_VAL_SENSEK43
1
49.9_0402_1%

RSVD30
RSVD31
RSVD32
RSVD33

+V_DDR_REFA_R

@ RC48
1K_0402_1%

@ RC49
1K_0402_1%

PCIE Port Bifurcation Straps

A4
C4
D3
D1
A58
A59
C59
A61
C61
D61
BD61
BE61
BE59
BG61
BG59
BG58
BG4
BG3
BE3
BG1
BE1
BD1

11: (Default) x16 - Device 1 functions 1 and 2 disabled

CFG[6:5]

*10: x8, x8 - Device 1 function 1 enabled ; function 2

B

disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG7
@RC50
@
RC50
1K_0402_1%
2

2

B

2

1

CPU_RSVD6
CPU_RSVD7

RC42

BE7
BG7

2

+CPU_CORE

RSVD28
RSVD29

1

5
5
5
5

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]

2

C

B50
C51
B54
D53
A51
C53
C55
H49
A55
H51
K49
K53
F53
G53
L51
F51
D52
L53

RC41
1K_0402_1%
@

1

T12
T13
T7
T8
T14
T15
T16
CFG12
CFG13
CFG14
CFG15
T17
T18

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

RESERVED

T9
T6
T10
T11

2

UCPU1E

SANDY-BRIDGE_BGA1023~D

PEG DEFER TRAINING

CFG7

*

1: (Default) PEG Train immediately following
xxRESETB de assertion
0: PEG Wait for BIOS for training

A

Compal Secret Data

Security Classification
Issued Date

2010/04/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

A

Compal Electronics, Inc.
PROCESSOR(4/7) RSVD,CFG

Size Document Number
Custom
Date:

Rev
0.1

LA-7531P

Sunday, April 10, 2011

Sheet
1

7

of

45

5

4

3

2

1

UCPU1F

SV type CPU
+CPU_CORE

2

CC54
1U_0402_6.3V6K

1

2

CC41
1U_0402_6.3V6K

2

1

CC53
1U_0402_6.3V6K

1

2

CC40
1U_0402_6.3V6K

2

1

CC52
1U_0402_6.3V6K

1

2

CC39
1U_0402_6.3V6K

2

1

CC51
1U_0402_6.3V6K

2

1

2

CC38
1U_0402_6.3V6K

2

1

CC50
1U_0402_6.3V6K

1

2

CC37
1U_0402_6.3V6K

PEG AND DDR

2

CC31
1U_0402_6.3V6K

2

1

CC49
1U_0402_6.3V6K

2

1

CC36
1U_0402_6.3V6K

1

2

CC30
1U_0402_6.3V6K

2

1

CC48
1U_0402_6.3V6K

2

1

2

1

CC35
1U_0402_6.3V6K

2

1

2

1

2

CC29
1U_0402_6.3V6K

2

AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15

1

2

1

CC47
1U_0402_6.3V6K

2

1

2

1

CC34
1U_0402_6.3V6K

1

2

1

CC28
1U_0402_6.3V6K

POWER

2

1

CC9
10U_0603_6.3V6M

2

1

CC8
10U_0603_6.3V6M

2

1

CC7
10U_0603_6.3V6M

2

1

CC19
10U_0603_6.3V6M

2

1

CC6
10U_0603_6.3V6M

2

1

CC5
10U_0603_6.3V6M

1

CC18
10U_0603_6.3V6M

CC17
10U_0603_6.3V6M

2

1

CC46
1U_0402_6.3V6K

1

CC33
1U_0402_6.3V6K

C

Cap quantity follow 43890_HR_CHKLST_Rev07

+V1.05S_VCCP
+V1.05S_VCCP
RC51

W16
W17

1

VCCIO50
VCCIO51

1

2

RC52
75_0402_5%
2

0_0805_5%

VCCIO_SEL

BC22

VCCP_PWRCTRL_R

@
110K_0402_5%
2

choose low or high

Voltage selection for VCCIO: For Huron
River platforms, this pin must be pulled high
on the motherboard.

RC53

+1.05VS_VCCPQ
AM25
AN22

1
RC55
130_0402_5%

1
2
0_0805_5%
2
1U_0402_6.3V6K

RC56
75_0402_5%
2

1
CC73

+V1.05S_VCCP
1

VCCPQE[1]
VCCPQE[2]

B

RC54

2

QUIET RAILS

+V1.05S_VCCP +V1.05S_VCCP

SVID

2

2

CC27
1U_0402_6.3V6K

1

2

1

D

1

VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]

CC16
10U_0603_6.3V6M

2

2

1

CC45
1U_0402_6.3V6K

1

1

CC32
1U_0402_6.3V6K

2

2

CC72
2.2U_0402_6.3V6M

1

1

CC68
2.2U_0402_6.3V6M

2

2

CC64
2.2U_0402_6.3V6M

1

1

CC58
2.2U_0402_6.3V6M

2

2

CC71
2.2U_0402_6.3V6M

1

1

CC67
2.2U_0402_6.3V6M

2

2

CC63
2.2U_0402_6.3V6M

1

1

CC57
2.2U_0402_6.3V6M

2

CC70
2.2U_0402_6.3V6M

2

B

CC69
2.2U_0402_6.3V6M

1

1

CC66
2.2U_0402_6.3V6M

2

CC65
2.2U_0402_6.3V6M

1

2

CC62
2.2U_0402_6.3V6M

2

CC61
2.2U_0402_6.3V6M

1

1

CC56
2.2U_0402_6.3V6M

2

CC55
2.2U_0402_6.3V6M

1

AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48

CC26
1U_0402_6.3V6K

High-Frequency Decoupling
C

CORE SUPPLY

+CPU_CORE

A29
A31
A34
A35
A38
A39
A42
C26
C27
C32
C34
C37
C39
C42
D27
D32
D34
D37
D39
D42
E26
E28
E32
E34
E37
E38
F25
F26
F28
F32
F34
F37
F38
F42
G42
H25
H26
H28
H29
H32
H34
H35
H37
H38
H40
J25
J26
J28
J29
J32
J34
J35
J37
J38
J40
J42
K26
K27
K29
K32
K34
K35
K37
K39
K42
L25
L28
L33
L36
L40
N26
N30
N34
N38

VCC[1]
VCC[2]
VCC[3]
VCC[4]
VCC[5]
VCC[6]
VCC[7]
VCC[8]
VCC[9]
VCC[10]
VCC[11]
VCC[12]
VCC[13]
VCC[14]
VCC[15]
VCC[16]
VCC[17]
VCC[18]
VCC[19]
VCC[20]
VCC[21]
VCC[22]
VCC[23]
VCC[24]
VCC[25]
VCC[26]
VCC[27]
VCC[28]
VCC[29]
VCC[30]
VCC[31]
VCC[32]
VCC[33]
VCC[34]
VCC[35]
VCC[36]
VCC[37]
VCC[38]
VCC[39]
VCC[40]
VCC[41]
VCC[42]
VCC[43]
VCC[44]
VCC[45]
VCC[46]
VCC[47]
VCC[48]
VCC[49]
VCC[50]
VCC[51]
VCC[52]
VCC[53]
VCC[54]
VCC[55]
VCC[56]
VCC[57]
VCC[58]
VCC[59]
VCC[60]
VCC[61]
VCC[62]
VCC[63]
VCC[64]
VCC[66]
VCC[67]
VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]

VCCIO[1]
VCCIO[3]
VCCIO[4]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCIO[9]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]

CC4
10U_0603_6.3V6M

53AA26

D

+V1.05S_VCCP

18A

VIDALERT#
VIDSCLK
VIDSOUT

A44
B43
C44

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

1
RC57
1
RC58
1
RC59

2
243_0402_1%
20_0402_5%
0_0402_5%

VR_SVID_ALRT# 43
VR_SVID_CLK 43
VR_SVID_DAT 43

+CPU_CORE

RC61 1
RC62 1

AN16 VCCIO_SENSE_R
AN17 VSS_SENSE_VCCIO

2
2

0_0402_5%
0_0402_5%

VCCSENSE 43
VSSSENSE 43

1
RC65 1

2
+V1.05S_VCCP
10_0402_1%
0_0402_5%
2
VCCIO_SENSE 38,39
VSS_SENSE_VCCIO 38,39

Compal Secret Data

Security Classification
Issued Date

2010/04/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

RC64 Place
100_0402_1%

the PU
resistors close to VR
A

2

RC66
10_0402_1%

SANDY-BRIDGE_BGA1023~D

5

Place the PU
resistors close to CPU

1

RC63

VCCIO_SENSE
VSS_SENSE_VCCIO

A

F43 VCCSENSE_R
G43 VSSSENSE_R

2
100_0402_1%

2

VCC_SENSE
VSS_SENSE

1

SENSE LINES

1
RC60

3

2

Title

Compal Electronics, Inc.
PROCESSOR(5/7) PWR,BYPASS

Size Document Number
Custom

Rev
0.1

LA-7531P

Date:

Sunday, April 10, 2011

Sheet
1

8

of

45

5

4

+1.5V_CPU_VDDQ

+1.5V

CC74

2

1 0.1U_0402_10V7K

CC75

2

1 0.1U_0402_10V7K

3

2

1

‧ Can connect to GND if motherboard only
supports external graphics and if GFX VR is not
stuffed in a common motherboard design,
‧ VAXG can be left floating in a common
motherboard design (Gfx VR keeps VAXG from
floating) if the VR is stuffed
+1.5V_CPU_VDDQ

UCPU1G

2

1
2
2

RUN_ON_CPU1.5VS3

5A
1

2

2

1

2

1

2

1

1

2

2

1

2

1

2

1

2

1

2

CC99
10U_0603_6.3V6M

2

1

CC98
10U_0603_6.3V6M

2

1

CC97
10U_0603_6.3V6M

2

1

CC96
10U_0603_6.3V6M

2

1

CC95
10U_0603_6.3V6M

2

1

CC94
10U_0603_6.3V6M
CC93
10U_0603_6.3V6M

1

1U_0402_6.3V6K
CC92

1
+

CC100
330U_D2_2V_Y

2

C

+1.5V_CPU_VDDQ Source
+1.5V

QC4
AO4728L_SO8

+VSB
+3VALW

1
2
3

4

RC71
470_0603_5%

RUN_ON_CPU1.5VS3

1

3

RC72
100K_0402_5%

1

2

1

RC70
100K_0402_5%

+1.5V_CPU_VDDQ

2

8
7
6
5

1

DDR3

RC69
100_0402_1%

1

+1.5V_CPU_VDDQ

1U_0402_6.3V6K
CC91

POWER

+V_SM_VREF

3

1

D

RC68
100_0402_1%

@ QC3
@QC3
AP2302GN-HF_SOT23-3

2

AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33

1U_0402_6.3V6K
CC90

VDDQ[1]
VDDQ[2]
VDDQ[3]
VDDQ[4]
VDDQ[5]
VDDQ[6]
VDDQ[7]
VDDQ[8]
VDDQ[9]
VDDQ[10]
VDDQ[11]
VDDQ[12]
VDDQ[13]
VDDQ[14]
VDDQ[15]
VDDQ[16]
VDDQ[17]
VDDQ[18]
VDDQ[19]
VDDQ[20]
VDDQ[21]
VDDQ[22]
VDDQ[23]
VDDQ[24]
VDDQ[25]
VDDQ[26]

1U_0402_6.3V6K
CC89

- 1.5V RAILS

CC79
0.1U_0402_16V4Z

1U_0402_6.3V6K
CC88

1

QC5A
2N7002DW-T/R7_SOT363-6

2

+1.5V_CPU_VDDQ

CC118
S
0.1U_0402_16V4Z

3

RC73
330K_0402_5%

1

2

2

RUN_ON_CPU1.5VS3# 5
4

27,31,37,38,39 SUSP#

@ RC75
0_0402_5%
1
2

QC5B
2N7002DW-T/R7_SOT363-6

6

27 CPU1.5V_S3_GATE

2

D
RC74
0_0402_5%
1
2

2 RUN_ON_CPU1.5VS3#
G
QC6
2N7002E-T1-GE3_SOT23-3

Follow DG 0.71 page 6

1

2

+V_SM_VREF_CNT

1U_0402_6.3V6K
CC87

1

AY43

1U_0402_6.3V6K
CC86

2

1U_0402_6.3V6K
CC117

2

1

1U_0402_6.3V6K
CC116

2

1

1U_0402_6.3V6K
CC115

2

1

1U_0402_6.3V6K
CC114

2

1

1U_0402_6.3V6K
CC113

2

1

1U_0402_6.3V6K
CC112

2

1

1U_0402_6.3V6K
CC111

2

1

1U_0402_6.3V6K
CC110

2

1

1U_0402_6.3V6K
CC109

2

1

1U_0402_6.3V6K
CC108

1

1U_0402_6.3V6K
CC107

C

SM_VREF

1U_0402_6.3V6K
CC85

Vaxg

VAXG[1]
VAXG[2]
VAXG[3]
VAXG[4]
VAXG[5]
VAXG[6]
VAXG[7]
VAXG[8]
VAXG[9]
VAXG[10]
VAXG[11]
VAXG[12]
VAXG[13]
VAXG[14]
VAXG[15]
VAXG[16]
VAXG[17]
VAXG[18]
VAXG[19]
VAXG[20]
VAXG[21]
VAXG[22]
VAXG[23]
VAXG[24]
VAXG[25]
VAXG[26]
VAXG[27]
VAXG[28]
VAXG[29]
VAXG[30]
VAXG[31]
VAXG[32]
VAXG[33]
VAXG[34]
VAXG[35]
VAXG[36]
VAXG[37]
VAXG[38]
VAXG[39]
VAXG[40]
VAXG[41]
VAXG[42]
VAXG[43]
VAXG[44]
VAXG[45]
VAXG[46]
VAXG[47]
VAXG[48]
VAXG[49]
VAXG[50]
VAXG[51]
VAXG[52]
VAXG[53]
VAXG[54]
VAXG[55]
VAXG[56]

GRAPHICS

AA46
AB47
AB50
AB51
AB52
AB53
AB55
AB56
AB58
AB59
AC61
AD47
AD48
AD50
AD51
AD52
AD53
AD55
AD56
AD58
AD59
AE46
N45
P47
P48
P50
P51
P52
P53
P55
P56
P61
T48
T58
T59
T61
U46
V47
V48
V50
V51
V52
V53
V55
V56
V58
V59
W50
W51
W52
W53
W55
W56
W61
Y48
Y61

+V_SM_VREF should
have 20 mil trace width

1

26A

D

RC67
0_0402_5%
2
1

1

+VGFX_CORE

RC77
0_0805_5%
1
2

CC120
2

+VCCSA

1

2

1

2

CC122
1U_0402_6.3V6K

+

CC121
1U_0402_6.3V6K

1

330U_D2_2VM_R6M

+1.8VS_VCCPLL

+VCCSA

2

1

2

1U_0402_6.3V6K
CC133

2

1

1U_0402_6.3V6K
CC132

2

1

1U_0402_6.3V6K
CC131

1

1U_0402_6.3V6K
CC130

2

1U_0402_6.3V6K
CC129

1

L17
L21
N16
N20
N22
P17
P20
R16
R18
R21
U15
V16
V17
V18
V21
W20

VCCPLL[1]
VCCPLL[2]
VCCPLL[3]

VCCSA[1]
VCCSA[2]
VCCSA[3]
VCCSA[4]
VCCSA[5]
VCCSA[6]
VCCSA[7]
VCCSA[8]
VCCSA[9]
VCCSA[10]
VCCSA[11]
VCCSA[12]
VCCSA[13]
VCCSA[14]
VCCSA[15]
VCCSA[16]

SA RAIL

A

6A

BB3
BC1
BC4

1.8V RAIL

+1.8VS

VAXG_SENSE
VSSAXG_SENSE

SENSE LINES

F45
G45

43 VCC_AXG_SENSE
43 VSS_AXG_SENSE

SENSE
LINES

B

2

QUIET RAILS

RC76
0_0603_5%

VCCDQ[1]
VCCDQ[2]

AM28
AN26

B

1U_0402_6.3V6K
1

2

CC119

VDDQ_SENSE
VSS_SENSE_VDDQ

VCCSA_SENSE

VCCSA_VID[0]
VCCSA_VID[1]

BC43
BA43

U10 VCCSA_SENSE

D48
D49

1
@RC78
@
RC78

0_0402_5%
RC79 2 VCCSA_VID0
1
RC80 2 VCCSA_VID1
1
0_0402_5%

2
0_0402_5%
VID[0]
0
0
1
1

VCCSA_VID0 41
VCCSA_VID1 41

VID[1]
0
1
0
1

2012
Yes
Yes
Yes
Yes

SANDY-BRIDGE_BGA1023~D

Compal Secret Data

Security Classification

2010/04/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

2011
Yes
Yes
No
No

A

Issued Date

5

0.90 V
0.80 V
0.725 V
0.675 V

3

2

Title

Compal Electronics, Inc.
PROCESSOR(6/7) PWR

Size Document Number
Custom

Rev
0.1

LA-7531P

Date:

Sunday, April 10, 2011

Sheet
1

9

of

45

5

4

3

2

1

UCPU1H

D

C

B

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]

VSS

VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]

AM38
AM4
AM42
AM45
AM48
AM58
AN1
AN21
AN25
AN28
AN33
AN36
AN40
AN43
AN47
AN50
AN54
AP10
AP51
AP55
AP7
AR13
AR17
AR21
AR41
AR48
AR61
AR7
AT14
AT19
AT36
AT4
AT45
AT52
AT58
AU1
AU11
AU28
AU32
AU51
AU7
AV17
AV21
AV22
AV34
AV40
AV48
AV55
AW13
AW43
AW61
AW7
AY14
AY19
AY30
AY36
AY4
AY41
AY45
AY49
AY55
AY58
AY9
BA1
BA11
BA17
BA21
BA26
BA32
BA48
BA51
BB53
BC13
BC5
BC57
BD12
BD16
BD19
BD23
BD27
BD32
BD36
BD40
BD44
BD48
BD52
BD56
BD8
BE5
BG13

UCPU1I
D

BG17
BG21
BG24
BG28
BG37
BG41
BG45
BG49
BG53
BG9
C29
C35
C40
D10
D14
D18
D22
D26
D29
D35
D4
D40
D43
D46
D50
D54
D58
D6
E25
E29
E3
E35
E40
F13
F15
F19
F29
F35
F40
F55
G48
G51
G6
G61
H10
H14
H17
H21
H4
H53
H58
J1
J49
J55
K11
K21
K51
K8
L16
L20
L22
L26
L30
L34
L38
L43
L48
L61
M11
M15

VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]

VSS

NCTF

A13
A17
A21
A25
A28
A33
A37
A40
A45
A49
A53
A9
AA1
AA13
AA50
AA51
AA52
AA53
AA55
AA56
AA8
AB16
AB18
AB21
AB48
AB61
AC10
AC14
AC46
AC6
AD17
AD20
AD4
AD61
AE13
AE8
AF1
AF17
AF21
AF47
AF48
AF50
AF51
AF52
AF53
AF55
AF56
AF58
AF59
AG10
AG14
AG18
AG47
AG52
AG61
AG7
AH4
AH58
AJ13
AJ16
AJ20
AJ22
AJ26
AJ30
AJ34
AJ38
AJ42
AJ45
AJ48
AJ7
AK1
AK52
AL10
AL13
AL17
AL21
AL25
AL28
AL33
AL36
AL40
AL43
AL47
AL61
AM13
AM20
AM22
AM26
AM30
AM34

VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14

M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59

C

A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61

B

SANDY-BRIDGE_BGA1023~D

SANDY-BRIDGE_BGA1023~D

A

A

Compal Secret Data

Security Classification
Issued Date

2010/04/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PROCESSOR(7/7) VSS

Size Document Number
Custom

Rev
0.1

LA-7531P

Date:

Wednesday, April 06, 2011

Sheet
1

10

of

45

5

4

3

2

1

DDR3 SO-DIMM A
+V_DDR_REFA

+1.5V

+1.5V

3.56A@+1.5V
JDDRL
+V_DDR_REFA

1

6 DDR_A_DQS[0..7]
6 DDR_A_DQS#[0..7]

2

6 DDR_A_MA[0..15]

1

2

CD2
2.2U_0603_10V6K

6 DDR_A_D[0..63]

CD1
0.1U_0402_16V7K

All VREF traces should
have 10 mil trace width

D

DDR_A_D0
DDR_A_D1

DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9

Delete DDR_A_DM[0..7]

DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17

+1.5V
1

DDR_A_DQS#2
DDR_A_DQS2

RD1
1K_0402_1%

DDR_A_D18
DDR_A_D19

+V_DDR_REFA

1

2

DDR_A_D24
DDR_A_D25

DDR_A_D26
DDR_A_D27

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

D

DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR3_DRAMRST#

DDR3_DRAMRST# 6

DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21

DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31

2

RD2
1K_0402_1%

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

C

C

Layout Note:
Place near JDIMM1
Layout Note: Place these 4 Caps near Command
and Control signals of DIMMA
+1.5V

2

1
+
2

RD51

2

DDR3 SO-DIMM A

1

2

RD6
10K_0402_5%

1

CD24
0.1U_0402_16V7K

+3VS

CD23
2.2U_0603_10V6K

CD22
330U_D2E_2.5VM_R6M

2

1

CD21
0.1U_0402_16V7K

2

1

CD20
0.1U_0402_16V7K

2

1

CD19
0.1U_0402_16V7K

2

1

CD18
0.1U_0402_16V7K

2

1

CD17
10U_0603_6.3V6M

2

1

CD16
10U_0603_6.3V6M

2

1

CD15
10U_0603_6.3V6M

2

1

CD14
10U_0603_6.3V6M

1

CD13
10U_0603_6.3V6M

2

CD12
10U_0603_6.3V6M

1

205

G1

G2

206

0.6A@+0.75VS

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1

M_CLK_DDR1 6
M_CLK_DDR#1 6

DDR_A_BS1
DDR_A_RAS#

DDR_A_BS1 6
DDR_A_RAS# 6

DDR_CS0_DIMMA#
M_ODT0

DDR_CS0_DIMMA# 6
M_ODT0 6

M_ODT1

M_ODT1

1

+1.5V

RD3
1K_0402_1%

+VREF_CA

2

6

+VREF_CA

1
DDR_A_D38
DDR_A_D39

2

1

2

1

DDR_A_D36
DDR_A_D37

CD11
2.2U_0603_10V6K

B

DDR_A_MA15
DDR_A_MA14

CD10
0.1U_0402_16V7K

2

6 DDR_CS1_DIMMA#

DDR_CKE1_DIMMA 6

RD4
1K_0402_1%
2

1

10U_0603_6.3V6M

2

CD9

1

10U_0603_6.3V6M

2

CD8

1

10U_0603_6.3V6M

2

1U_0402_6.3V6K

1

CD7

2

CD6

1

1U_0402_6.3V6K

2

CD5

1

1U_0402_6.3V6K

CD4

2

1U_0402_6.3V6K

CD3

1

DDR_CKE1_DIMMA

DDR_A_D44
DDR_A_D45

B

DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53

DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PCH_SMBDATA
PCH_SMBCLK

PCH_SMBDATA 13,22,24,27
PCH_SMBCLK 13,22,24,27
+0.75VS
1

1

CD26

6 DDR_A_WE#
6 DDR_A_CAS#

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

FOX_AS0A621-U4SG-7H
@
Part Number = SP07000NN00

A

TOP SLOT
LA-6961P

@

2

A

Compal Secret Data

Security Classification
Issued Date

2

220P_0402_50V7K

6 DDR_A_BS0

+0.75VS

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

220P_0402_50V7K

6 M_CLK_DDR0
6 M_CLK_DDR#0

1

Layout Note:
Place near JDIMM1.203 & JDIMM1.204

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

2

6 DDR_A_BS2

73
75
77
DDR_A_BS2
79
81
DDR_A_MA12
83
DDR_A_MA9
85
87
DDR_A_MA8
89
DDR_A_MA5
91
93
DDR_A_MA3
95
DDR_A_MA1
97
99
M_CLK_DDR0
101
M_CLK_DDR#0
103
105
DDR_A_MA10
107
DDR_A_BS0
109
111
DDR_A_WE#
113
DDR_A_CAS#
115
117
DDR_A_MA13
119
DDR_CS1_DIMMA#
121
123
125
127
DDR_A_D32
129
DDR_A_D33
131
133
DDR_A_DQS#4
135
DDR_A_DQS4
137
139
DDR_A_D34
141
DDR_A_D35
143
145
DDR_A_D40
147
DDR_A_D41
149
151
153
155
DDR_A_D42
157
DDR_A_D43
159
161
DDR_A_D48
163
DDR_A_D49
165
167
DDR_A_DQS#6
169
DDR_A_DQS6
171
173
DDR_A_D50
175
DDR_A_D51
177
179
DDR_A_D56
181
DDR_A_D57
183
185
187
189
DDR_A_D58
191
DDR_A_D59
193
195
2 10K_0402_5% 197
199
201
203

CD25

DDR_CKE0_DIMMA

6 DDR_CKE0_DIMMA

2010/04/26

Deciphered Date

2011/04/26

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

DDRIII DIMM
Size
C
Date:

Document Number

Rev
0.1

LA-7531P
Sheet

Sunday, April 10, 2011
1

11

of

45

5

4

3

2

1

PCH_RTCX1

1

4
NC

OSC
2

YH1

NC

2

3

CH2

32.768KHZ_12.5PF_Q13MC14610002

18P_0402_50V8J

D

1

PCH_RTCX2

2
10M_0402_5%

OSC

1
RH115

1

CH3
18P_0402_50V8J

+RTCVCC

2
RH116 1

2
1M_0402_5%

D

SM_INTRUDER#

UH1A

HDA_RST#
2
33_0402_5%

2
1

SRTCRST#

K22

INTRUDER#

C21

INTVRMEN

H35

HDA_BCLK

HDA_SYNC

H37

HDA_SYNC

HDA_SPKR

N1

HDA_RST#

F35

29
1

HDA_SPKR

HDA_SYNC

SPKR

@

HDA_SDIN0

HDA_SDIN0

2
0_0402_5%

D36

HDA_SDIN0

B36

HDA_SDIN1

C35

HDA_SDIN2

A35

HDA_SDIN3

29 HDA_SDOUT_AUDIO

RH125

1

HDA_SDOUT
2
0_0402_5%

1

HDA_SDOUT
2
33_0402_5%

HDA_SDOUT

K37
K35
M35

1
2

@ RH129
200_0402_5%

PCH_JTAG_TMS

2

2

LPC_FRAME#

LDRQ0#
LDRQ1# / GPIO23

H40
F37

PCH_JTAG_TCK

M17

JTAG_TCK

PCH_JTAG_TMS

M15

JTAG_TMS

PCH_JTAG_TDI

U12

JTAG_TDI

PCH_JTAG_TDO

M12

JTAG_TDO

PCH_SPI_CLK

AD12

PCH_SPI_CS#

AB8

SPI_CS0#

AB6

SPI_CS1#

SPI_CLK

Y4

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

27
27
27
27

LPC_FRAME# 27

SERIRQ

SERIRQ

27

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

AN3
AN1
AU3
AU1

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0

24
24
24
24

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AN6
AN8
AR3
AR1

SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1

22
22
22
22

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AD4
AD2
AL3
AL1

@
@
@
@

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

AD8
AD6
AG3
AG1

@
@
@
@

T23
T24
T25
T26

PAD~D
PAD~D
PAD~D
PAD~D

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AE3
AE1
AH8
AH6

@
@
@
@

T27
T28
T29
T30

PAD~D
PAD~D
PAD~D
PAD~D

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AC3
AC1
AJ3
AJ1

@
@
@
@

T31
T32
T33
T34

PAD~D
PAD~D
PAD~D
PAD~D

HDA_DOCK_RST# / GPIO13

PCH_JTAG_TDI
RH135
100_0402_1%

RH134
100_0402_1%

K40

T19
T20
T21
T22

PAD~D
PAD~D
PAD~D
PAD~D

mSATA PAGE24

Combo MMAX & mSATA mini Card

C

+RTCVCC

AB10

SATAICOMPI

AB12

SATA3RCOMPO

AF10

SATA3COMPI

AF12

SATA3RBIAS

AH4

SATALED#

W10

SATA_LED#

SATA_COMP

2

PCH_INTVRMEN RH126

2

1 330K_0402_5%
@

1 330K_0402_5%

INTVRMEN

H：Integrated
* L：Integrated

VRM enable
VRM disable

1
RH130

2
37.4_0402_1%

+3VS

+1.05VS_SATA3
SATA3_COMP
1
RH132

2
49.9_0402_1%

RBIAS_SATA3
1
RH137

2
750_0402_1%

SERIRQ

RH131

2

1 10K_0402_5%

PCH_GPIO21

RH136

2

1 10K_0402_5%

SATA_LED#

RH138

2

1 10K_0402_5%

+3VS

PCH_SPI_SI

W8

SPI_MOSI

SATA0GP / GPIO21

M2

PCH_GPIO21

PCH_SPI_SO

Y2

SPI_MISO

SATA1GP / GPIO19

R1

BBS_BIT0_R

T39
HDA_SPKR RH139
@

T35 PAD~D

@

2

1 1K_0402_5%

LOW=Default
*HIGH=No Reboot

COUGAR-POINT-SFF_BGA1017~D

B

B

HDA_SDO

Part Number = SA000043Z00

SPI ROM FOR ME ( 4MByte )
2

+3V_PCH

RH141
3.3K_0402_5%

+3V_PCH

ME debug mode , this signal has a weak internal PD

1
2
3
4

CS#
DO
WP#
GND

VCC
HOLD#
CLK
DI

8
7
6
5

W25Q32BVSSIG_SO8

HDA_SYNC
1RH144 3.3K_0402_5%
1 PCH_SPI_CLK
RH146 0_0402_5%
PCH_SPI_SI_R
1
2 PCH_SPI_SI
RH147 0_0402_5%

PCH_SPI_HOLD#
PCH_SPI_CLK_R

2
2

1

CH6
0.1U_0402_16V4Z

2

This signal has a weak internal pull-down
On Die PLL VR is supplied by
1.5V when smapled high
1.8V when sampled low
Needs to be pulled High for Huron River platfrom

+RTCBATT

1

2

HDA_SYNC

Place CH95 close to PCH.

1 1K_0402_5%

10mils

CH7
1U_0603_10V4Z

A

2

W=20mils

2PCH_SPI_CLK
33_0402_5%

2

+CHGRTC

+RTCVCC

1

RH149

W=20mils

20mils

W25X32

22P_0402_50V8J

1 1

DH1

(5)DIO
(6)CLK
(7)HOLD#
(8)VCC

3

@
RH151

(1)CS#
(2)DO
(3)WP#
(4)GND

+3V_PCH

RH148
1K_0402_5%

SPI BIOS Pinout

@
CH1
2
1

1 1K_0402_5%

+3V_PCH

20mils

PCH_JTAG_TCK

@

*

H=>Flash Descriptor Security will be overridden

RTC Battery

1
RH150

2

Low = Disabled
High = Enabled

UH2

PCH_SPI_CS# RH142 1
2 0_0402_5% PCH_SPI_CS#_R
PCH_SPI_SO RH143 1
2 0_0402_5% PCH_SPI_SO_R
PCH_SPI_WP#
1
2
+3V_PCH
RH145
3.3K_0402_5%

2
51_0402_5%

HDA_SDOUT RH140

L=>security measures defined in the Flash
Descriptor will be in effect (default)

SPI ROM FOR ME
( 4MByte )

1

@

A

PCH_INTVRMEN RH124

+1.05VS_VCC_SATA

SATAICOMPO

SPI

RH133
100_0402_1%

HDA_DOCK_EN# / GPIO33

1

2

@ RH128
200_0402_5%

1

PCH_JTAG_TDO

1

2

@ RH127
200_0402_5%

2

+3V_PCH

1

+3V_PCH

1

+3V_PCH

HDA_SDO

JTAG

RH123

FWH4 / LFRAME#

HDA_RST#

@
HDA_SDO

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

SERIRQ

C

27

A37
A39
C39
C37

D

S
1

RTCRST#

A23

HDA_BIT_CLK

SB000002X00
29
BSS138W-7-F_SOT323-3
RH122

F19

PCH_SRTCRST#

+3VS

QH1
3

2 HDA_SYNC_R
33_0402_5%

RH121

PCH_RTCRST#

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

SATA3

RH120

RTCX2

SM_INTRUDER#
CLRP2
SHORT PADS
PCH_INTVRMEN
ME CMOS
CLP1 & CLP2 place near DIMM

2

G

1

29 HDA_SYNC_AUDIO

HDA_BIT_CLK
2
33_0402_5%

C19

SATA

1

29 HDA_RST_AUDIO#

RH119

1

RTCX1

PCH_RTCX2

IHDA

1

29 HDA_BITCLK_AUDIO

2

A19

2

CH5
1U_0603_10V4Z

CMOS
CLRP1
SHORT PADS

PCH_RTCX1

2

CH4
1U_0603_10V4Z
1
2
RH117 20K_0402_5%
1
2
RH118 20K_0402_5%

1

1

RTC

+RTCVCC

LPC

far away hot spot

BAS40-04_SOT23-3

W=20mils

2

Reserve for EMI please close to U48

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/07/06

Deciphered Date

2011/07/06

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

PCH (1/8) SATA,HDA,SPI, LPC
Size

Document Number

Rev
0.1

LA-7531P
Date:

Sheet

Sunday, April 10, 2011
1

12

of

45

5

4

3

2

RH155
1

UH1B

CH10 1
CH11 1

PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3

2 0.1U_0402_10V7K
2 0.1U_0402_10V7K

C

Giga

2 10K_0402_5%

RH2 2
RH3 2
2 RH174

21 CLK_PCIE_LAN#
21 CLK_PCIE_LAN

Lan--->

+3VS

PERN3
PERP3
PETN3
PETP3

BJ37
BL37
BD35
BF35

PERN4
PERP4
PETN4
PETP4

BJ39
BL39
AY35
BB35

PERN5
PERP5
PETN5
PETP5

BH40
BK40
BD37
BF37

PERN6
PERP6
PETN6
PETP6

BJ41
BL41
AY37
BB37

PERN7
PERP7
PETN7
PETP7

BJ43
BL43
AY40
BB40

PERN8
PERP8
PETN8
PETP8

M4

PCIE_LAN#
PCIE_LAN

AE49
AE51

1 0_0402_5%
1 0_0402_5%
1 10K_0402_5%

U8
RH4
RH5

25 CLK_PCIE_CD#
25 CLK_PCIE_CD
RH1772

+3VS

BH36
BK36
BF33
BD33

PCIECLKREQ0#

21 LAN_CLKREQ#

Card Reader--->

PERN2
PERP2
PETN2
PETP2

AD48
AD50

RH171
1

+3V_PCH

BJ35
BL35
BB33
AY33

1 0_0402_5%
1 0_0402_5%

2
2

PCIE_CD# AD40
PCIE_CD AD42

1 10K_0402_5%

T4

10K_0402_5%
2
+3VALW

SMBDATA

1
2
RH152
2.2K_0402_5%
1
2
RH153
2.2K_0402_5%

1
RH156
2.2K_0402_5%

1
RH157
2.2K_0402_5%
1
2
RH159
2.2K_0402_5%
1
2
RH160
2.2K_0402_5%

SMBCLK
SML0CLK

SMBALERT# / GPIO11

F17

SMBCLK

SMBDATA

F10

SMBDATA

CLKOUT_PCIE1N
CLKOUT_PCIE1P

H22 DRAMRST_CNTRL_PCH

SML0DATA

A9

SML0DATA

SML1ALERT# / PCHHOT# / GPIO74

C9

SML1CLK / GPIO58
SML1DATA / GPIO75

2
RH154

EC_LID_OUT# 27

SML0DATA

SML1DATA

SML0CLK

SML0CLK

1
0_0402_5%

SML1CLK

K12

D

DRAMRST_CNTRL_PCH

CLKIN_DMI2#
CLKIN_DMI2
CLKIN_DMI#
CLKIN_DMI
CLKIN_DOT96#
CLKIN_DOT96
CLKIN_SATA#
CLKIN_SATA
CLK_PCH_14M

D12 SML1CLK
C11 SML1DATA

CL_CLK1

L3

CL_DATA1

J1

CL_RST1#

M8

PEG_A_CLKRQ# / GPIO47

R8

+3V_PCH

DRAMRST_CNTRL_PCH 6,7

20090512
add double mosfet prevent
ATI M92 electric leakage

Total device

1
RH161

RH162
RH163
RH164
RH165
RH166
RH167
RH168
RH169
RH170

2
10K_0402_5%

1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%

If use extenal CLK gen, please place close to CLK gen
else, please place close to PCH

RH8

CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73

H12 SMBALERT#

SMBCLK

SML0ALERT# / GPIO60

Link

2 0.1U_0402_10V7K
2 0.1U_0402_10V7K

1
1

PERN1
PERP1
PETN1
PETP1

SMBUS

22 PCIE_PRX_DTX_N3
22 PCIE_PRX_DTX_P3
22 PCIE_PTX_C_DRX_N3
22 PCIE_PTX_C_DRX_P3

--->

PCIE_PRX_DTX_N2
PCIE_PRX_DTX_P2
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2

BJ33
BL33
BB30
AY30

Controller

D

1
1

CH83
CH82

PCIE_PRX_DTX_N1
PCIE_PRX_DTX_P1
PCIE_PTX_DRX_N1
PCIE_PTX_DRX_P1

2 0.1U_0402_10V7K
2 0.1U_0402_10V7K

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLOCKS

25 PCIE_PRX_DTX_N2
25 PCIE_PRX_DTX_P2
25 PCIE_PTX_C_DRX_N2
25 PCIE_PTX_C_DRX_P2

PCIE Card Reader

MiniWWAN

CH8
CH9

PCI-E*

PCIE LAN

21 PCIE_PRX_DTX_N1
21 PCIE_PRX_DTX_P1
21 PCIE_PTX_C_DRX_N1
21 PCIE_PTX_C_DRX_P1

1

CLKOUT_DMI_N
CLKOUT_DMI_P

PCIECLKRQ1# / GPIO18
CLKOUT_DP_N
CLKOUT_DP_P
CLKOUT_PCIE2N
CLKOUT_PCIE2P
CLKIN_DMI_N
CLKIN_DMI_P

PCIECLKRQ2# / GPIO20

PCH_GPIO47

10K_0402_5% 2

1

+3V_PCH

C

AF44
AF46
BB24 CLK_CPU_DMI#_PCH
AY24 CLK_CPU_DMI_PCH

RH172
RH173

1
1

2 0_0402_5%
2 0_0402_5%

CLK_CPU_DMI#
CLK_CPU_DMI

AN10 CLK_CPU_DPLL#_PCH
AN12 CLK_CPU_DPLL_PCH

RH175
RH176

1
1

2 0_0402_5%
2 0_0402_5%

CLK_CPU_DPLL#
CLK_CPU_DPLL

CLK_CPU_DMI# 5
CLK_CPU_DMI 5
CLK_CPU_DPLL# 5
CLK_CPU_DPLL 5

BD17 CLKIN_DMI#
BF17 CLKIN_DMI

25 CDCLK_REQ#
22 CLK_PCIE_MINI1#
22 CLK_PCIE_MINI1
+3VS
22 MINI1_CLKREQ#

+3V_PCH

RH178
RH179
RH180

RH181

1 0_0402_5%
1 0_0402_5%
1 10K_0402_5%

2
2
2

PCIE_MINI1#
PCIE_MINI1
MINI1CLK_REQ#

1 10K_0402_5%

2

AA49
AA51
B8

+3V_PCH

RH1821

2 10K_0402_5%

M19

PCIECLKRQ4# / GPIO26

AF40
AF42
+3V_PCH

RH1831

2 10K_0402_5%

C4
AB44
AB46

RH185

2 10K_0402_5%

1

J3

5 CLK_RES_ITP#
5
CLK_RES_ITP

2

+3V_PCH

RH1891
RH190
RH191

2
2

18P_0402_50V8J

18P_0402_50V8J

2

2

CLK_PCH_14M

CLKIN_PCILOOPBACK

E51

CLK_PCI_LPBACK

B

PCIECLKRQ5# / GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

XTAL25_IN
XTAL25_OUT

CLK_PCI_LPBACK 15

W49 XTAL25_IN
W51 XTAL25_OUT
+3VS

PEG_B_CLKRQ# / GPIO56
XCLK_RCOMP

AC49

XCLK_RCOMP

CLKOUT_PCIE6N
CLKOUT_PCIE6P

1
RH184

2
90.9_0402_1%

PCIECLKRQ6# / GPIO45

2 10K_0402_5%
@
@

1 0_0402_5%
1 0_0402_5%

GPIO46
CLK_BCLK_ITP#
CLK_BCLK_ITP

H4
AR12
AR10

PCIECLKRQ7# / GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

CLKOUTFLEX0 / GPIO64

H50

CLKOUTFLEX1 / GPIO65

D48

CLKOUTFLEX2 / GPIO66

G49

CLKOUTFLEX3 / GPIO67

J51

RH186
2.2K_0402_5%

RH188
2.2K_0402_5%

SMBCLK

6
1

2N7002DW-T/R7_SOT363-6
QH2A
RH192
1 @
2
0_0402_5%

Part Number = SA000043Z00

SMBDATA

@
@
RH193
CH14
2
1
1
2
33_0402_5%
22P_0402_50V8J

PCH_SMBCLK 11,22,24,27

3
4

2N7002DW-T/R7_SOT363-6

PCH_SMBDATA 11,22,24,27
A

QH2B
RH194
1 @
2
0_0402_5%

@
@
RH195
CH15
CLK_PCI_LPBACK2
1
1
2
33_0402_5%
22P_0402_50V8J

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Reserve for EMI please close to
UH1

4

2

CLKOUT_PCIE7N
CLKOUT_PCIE7P

Reserve for EMI please close to UH1

5

+3VS

+1.05VS_VCCDIFFCLKN

COUGAR-POINT-SFF_BGA1017~D

CLK_PCH_14M
A

J49

1

W44
W46

25MHZ_20PF_7A25000012
1
1

CH13 
CH12

REFCLK14IN

1

YH2

1

AK8 CLKIN_SATA#
AK6 CLKIN_SATA

5

XTAL25_OUT
1
RH187 

CLKOUT_PCIE5N
CLKOUT_PCIE5P

M24 CLKIN_DOT96#
K24 CLKIN_DOT96

2

XTAL25_IN

2
1M_0402_5%

CLKIN_SATA_N
CLKIN_SATA_P

BB26 CLKIN_DMI2#
AY26 CLKIN_DMI2

2

+3V_PCH

CLKIN_DOT_96N
CLKIN_DOT_96P
CLKOUT_PCIE4N
CLKOUT_PCIE4P

K8

CLKIN_GND1_N
CLKIN_GND1_P

PCIECLKRQ3# / GPIO25

Y48
Y50

AB40
AB42

B

CLKOUT_PCIE3N
CLKOUT_PCIE3P

FLEX CLOCKS

MiniWLAN (Mini Card)--->

2010/07/06

Deciphered Date

2011/07/06

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

2

Title

PCH (2/8) PCIE, SMBUS, CLK
Size

Document Number

Rev
0.1

LA-7531P
Date:

Sunday, April 10, 2011

Sheet
1

13

of

45

5

4

3

2

1

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

BJ21
BJ23
BL19
BJ17

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

4
4
4
4

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

BD22
BB22
BB19
BB17

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

4
4
4
4

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

BF22
AY22
AY19
AY17

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

+VCCP
DMI_IRCOMP
2
49.9_0402_1%
RBIAS_CPY
2
750_0402_1%

1
RH196
RH197

1

SUSACK#

27

2 SUSACK#_R
0_0402_5%

SYS_PWROK

SYS_PWROK

C

1
RH200

RH202

1

2

PCH_PWROK1
RH203

PCH_PWROK
27 PCH_APWROK

27

RH204

27

2

RH209

ACIN

DH2

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

4
4
4
4
4
4
4
4

FDI_INT

BB10

FDI_INT
FDI_FSYNC0

BK8

FDI_FSYNC1

BK20

DMI2RBIAS

FDI_LSYNC0

BK12

FDI_LSYNC0

FDI_LSYNC1

BH8

FDI_LSYNC1

DSWVRMEN

F22

F15

SUSACK#

L1

SYS_RESET#

M10

SYS_PWROK

M22
G3
B12

PWROK
APWROK
DRAMPWROK

DPWROK

D

FDI_INT 4

FDI_FSYNC1

FDI_FSYNC0

4

FDI_FSYNC1

4

FDI_LSYNC0

4

FDI_LSYNC1

4

DSWODVREN

1 RH199
@

A21 PCH_DPWROK

PCH_RSMRST#
2 0_0402_5%
PCH_DPWROK 27
UH1D

WAKE#

D8

CLKRUN# / GPIO32

T2

WAKE#

1

2

RH201

PCH_PCIE_WAKE# 21,22

0_0402_5%

PM_CLKRUN#

SUS_STAT# / GPIO61

G6

SUS_STAT#

SUSCLK / GPIO62

D3

SUSCLK

T36


2
RH205
0_0402_5%

27
23

ENBKL
PCH_ENVDD

23

DPST_PWM

ENBKL

PCH_LCD_CLK
PCH_LCD_DATA

23 PCH_LCD_CLK
23 PCH_LCD_DATA

PAD~D

CTRL_CLK
CTRL_DATA

SUSCLK_R 27

LVDS_IBG

F6

PM_SLP_S5#

PM_SLP_S5# 27

PAD~D

SLP_S4#

K10

PM_SLP_S4#

PM_SLP_S4# 27

1
RH207

SLP_S3#

D4

PM_SLP_S3#

SLP_S5# / GPIO63

2 SUSWARN#_R
0_0402_5%

C13

SUSWARN#/SUSPWRDNACK/GPIO30

1

2 PBTN_OUT#_R
0_0402_5%

K19

1

2 ACIN_R
H19
CH751H-40PT_SOD323-2

RI#

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

DMI_IRCOMP

RSMRST#

PCH_GPIO72

BJ13
BL15
BF12
BL11
BB15
BB12
BL9
BD10

BD19

2PCH_RSMRST#_R B20
0_0402_5%

1

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_FSYNC0

0_0402_5%

PM_DRAM_PWRGD

RH208

PBTN_OUT#

27,31,35

1

PCH_RSMRST#
1
RH206

SUSWARN#

PM_PWROK_R
0_0402_5%

2

5 PM_DRAM_PWRGD
27 PCH_RSMRST#

0_0402_5%

4
4
4
4
4
4
4
4

DMI_ZCOMP

XDP_DBRESET#

5 XDP_DBRESET#
5

2 SUSACK#_R
0_0402_5%

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

BH12

System Power Management

27

1
RH198

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

BF19

4mil width and place
within 500mil of the PCH
SUSWARN#

BL13
BJ15
BD12
BJ11
AY15
AY12
BJ9
BF10

PWRBTN#

SLP_A#

C7

SLP_A# 27

ACPRESENT / GPIO31

SLP_SUS#

A15

PM_SLP_SUS#

H10

BATLOW# / GPIO72

PMSYNCH

BB8

H_PM_SYNC

F12

RI#

SLP_LAN# / GPIO29

PM_SLP_S3# 27

23
23

PCH_TXCLKPCH_TXCLK+

23
23
23

PCH_TXOUT0PCH_TXOUT1PCH_TXOUT2-

23
23
23

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

RH2101

2 10K_0402_5%

RI#

RH2111

2 10K_0402_5%

WAKE#

RH2121

2 1K_0402_5%

DSWODVREN

RH213

2

1 330K_0402_5%

ACIN

RH2141

2 10K_0402_5%

DSWODVREN

RH215

2

1 330K_0402_5%

SUSWARN#

RH2161

2 10K_0402_5%

PCH_RSMRST#

RH2171

2 10K_0402_5%

@

LVDSA_CLK#
LVDSA_CLK

PCH_TXOUT0PCH_TXOUT1PCH_TXOUT2-

AR46
AN49
AN44
AK40

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

AR44
AN51
AN46
AK42

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

AH46
AH44

LVDSB_CLK#
LVDSB_CLK

AM50
AL49
AJ51
AH50

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

AM48
AL51
AJ49
AH48

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

A7

DSWODVREN - On Die DSW VR Enable

H：Enable
* L：Disable

+3VS

CRT_IREF

IN2

OUT

4

2

2 2.2K_0402_5% CTRL_CLK

1

2 2.2K_0402_5% CTRL_DATA

AR51
AR49

SDVO_INTN
SDVO_INTP

AT50
AT48

M46
R46
U46

CRT_BLUE
CRT_GREEN
CRT_RED

R49
N49

CRT_DDC_CLK
CRT_DDC_DATA

M50
N51

CRT_HSYNC
CRT_VSYNC

R51
T48

DAC_IREF
CRT_IRTN

AW51
AW49
AY42

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

AY48
AY50
AY44
AY46
BB44
BB46
BA49
BA51

DDPC_CTRLCLK
DDPC_CTRLDATA

AU51
AU49
BE46

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

BC49
BC51
BD48
BD50
BF46
BF45
BE49
BE51

DDPD_CTRLCLK
DDPD_CTRLDATA

PCH_DDPB_CLK 20
PCH_DDPB_DAT 20

PCH_DDPB_HPD
PCH_DPB_N2
PCH_DPB_P2
PCH_DPB_N1
PCH_DPB_P1
PCH_DPB_N0
PCH_DPB_P0
PCH_DPB_N3
PCH_DPB_P3

20

20
20
20
20
20
20
20
20

T50
U44

DDPC_AUXN
DDPC_AUXP
DDPC_HPD

mDP

DMC

W42
R44

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

HDMI

C

B

M48
U42

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

AU46
AU44
BK44

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BG51
BG49
BF42
BD42
BJ47
BL47
BL45
BJ45

COUGAR-POINT-SFF_BGA1017~D
RH220
1K_0402_0.5%

RH308
10K_0402_5%

PART_NUMBER = SA000043Z00

A

MC74VHC1G08DFT2G_SC70-5

1 10K_0402_5%

SYS_PWROK
RH224

1
1

1
RH225

2
2.37K_0402_1%
2
100K_0402_5%
2
100K_0402_5%

LVDS_IBG
PCH_ENVDD
ENBKL

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/07/06

2011/07/06

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

SDVO_STALLN
SDVO_STALLP

2

1

EC Request
on 20110309
1

RH219

PM_CLKRUN#

SYS_PWROK

RH222
RH223

2 8.2K_0402_5%

AU40
AU42

2

2

VGATE

VCC

5
27,43

3

A

IN1

GND

PCH_PWROK 1

PM_CLKRUN#

1

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_CTRLCLK
SDVO_CTRLDATA

1

@
RH218

RH221

L_CTRL_CLK
L_CTRL_DATA

AK44
AK46

@

UH3

R42
M40

PCH_TXCLKPCH_TXCLK+

+RTCVCC

+3VS

L_DDC_CLK
L_DDC_DATA

LVD_VREFH
LVD_VREFL

Part Number = SA000043Z00

PCH_GPIO72

L_BKLTCTL

L51
K46

AG51
AG49

2LVD_VREF
0_0402_5%

Check EC for S3 S4 LED
+3V_PCH

L49

LVD_IBG
LVD_VBG

COUGAR-POINT-SFF_BGA1017~D

B

L_BKLTEN
L_VDD_EN

AH42
AH40

T37

PM_SLP_SUS# 27

H_PM_SYNC 5

M44
M42

Digital Display Interface

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

LVDS

4
4
4
4

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

CRT

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

FDI

D

4
4
4
4

BL21
BL23
BJ19
BL17

DMI

UH1C
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

4

3

2

Title

PCH (3/8) DMI,FDI,PM,GFX,DP
Size

Document Number

Rev
0.1

LA-7531P
Date:

Sheet

Sunday, April 10, 2011
1

14

of

45

5

4

3

2

1

External USB 3.0

C

26

USB3_RX2_N

26

USB3_RX2_P

26

USB3_TX2_N

26

USB3_TX2_P

BJ25
BJ27
BJ31
BJ29
BL25
BL27
BL31
BL29
BF26
BB28
BF28
BF30
BD26
AY28
BD28
BD30

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PAD~D

T38 @

D49
C48
C47
C45

B

CLK_PCI_LPBACK
CLK_PCI_LPC

13 CLK_PCI_LPBACK
27 CLK_PCI_LPC

RH230
RH231

2
1

TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40

PIRQA#
PIRQB#
PIRQC#
PIRQD#

DGPU_HOLD_RST#G46
DGPU_SELECT#
K44
DGPU_PWR_EN
F46

REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

WWAN_RADIO_OFF# F42
H42
GPIO55
D44

GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

FFS_INT1
GPIO3
DP_CBL_DET
BT_OFF#

5,21,25,27 PLT_RST#

PLT_RST#

1 22_0402_5%
2 22_0402_5%

CLK_PCI0
CLK_PCI1

A47
C41
F45
F40

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

H2

PME#

F7

PLTRST#

G51
E49
H48
J43
G45

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

BE3
BE1
AU8
BJ7

RSVD5
RSVD6

BA3
BH3

RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

AU6
AW3
AW1
AY6
AY2
AY4
BC3
BC1
BG1
BG3
BE6
BH4
BF7
BJ4
BJ5
BK6

RSVD23
DF_TVS

AY8
BC7

RSVD24

BL5

RSVD25

BB6

RSVD26
RSVD27

BD2
BD4

RSVD28
RSVD29

BA1
BF6

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

F24
H24
C25
A25
C27
A27
H28
F28
M26
K26
D28
B28
H26
F26
D32
B32
M28
K28
C29
A29
C31
A31
H33
F33
H30
F30
M33
K33

USBRBIAS#

C33

USBRBIAS

A33

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

C17
A17
A13
D16
A11
B16
C23
H15

DMI Termination Voltage
Set to Vcc when HIGH
NV_CLE
Set to Vss when LOW

D

+1.8VS

Weak internal
PU,Do not pull low

NV_ALE
NV_CLE

1

RSVD1
RSVD2
RSVD3
RSVD4

1K_0402_5%
RH226

2

TP21
TP22
TP23
TP24
TP41
TP42

USB

BJ48
BL7
W40
K30
BH49
BB42

RSVD

D

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

PCI

BH24
BK24
BH20
BK16
BH16
AN42
AN40
AR40
AR42
D20
M30
E3
AM4
AT4
AT2
AD10
B24
D24
AD44
AD46

RSVD

UH1E

NV_CLE
2
4.7K_0402_5%

1
RH227

H_SNB_IVB# 5

CLOSE TO THE BRANCHING POINT

USB20_N1
USB20_P1

USB20_N1 26
USB20_P1 26

USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5

External USB on mainboard

USB20_N3 23
USB20_P3 23
USB20_N4 22
USB20_P4 22
USB20_N5 22
USB20_P5 22

Intel Anti-Theft Techonlogy

High=Endabled
NV_ALE
Low=Disable(floating)

Camera
MPCIE-WLAN

+1.8VS

WWAN 3G
NV_ALE

USB20_N7
USB20_P7

USB20_N7 24
USB20_P7 24

USB20_N9
USB20_P9

C

*

RH2281

2 1K_0402_5%

mSATA

USB20_N9 26
USB20_P9 26

External USB on daughter board

+3V_PCH
RPH1

USBRBIAS

26

USB_OC0#

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#

26

USB_OC4#

USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

Within 500 mils
1
RH229

2
22.6_0402_1%

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

4
3
2
1

5
6
7
8

10K_1206_8P4R_5%
RPH2
4
5
3
6
2
7
1
8
B

10K_1206_8P4R_5%

(For USB Port 9)

COUGAR-POINT-SFF_BGA1017~D
+3VS

Part Number = SA000043Z00

RPH3

1
2
3
4

8
7
6
5
+3VS

8.2K_0804_8P4R_5%
RPH4

@
RH233
10K_0402_5%

8
7
6
5

5

1
2
3
4

UH4

4

1

2 8.2K_0402_5%

PLT_RST#

SN74AHC1G08DCKR_SC70-5

2 8.2K_0402_5%

RH234
100K_0402_5%

A

2

RH6

IN2

2

3

GPIO3

1

RH7

A

1

O
G

22,24 PLT_RST_BUF#

1

IN1

P

8.2K_0804_8P4R_5%

PCI_PIRQA#

2
0_0402_5%

+3VS

1

WWAN_RADIO_OFF#
BT_OFF#
DP_CBL_DET
FFS_INT1

@
1
RH232

2

GPIO55
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQC#

DGPU_HOLD_RST#

1 RH235 2 10K_0402_5%

DGPU_SELECT#

1 RH236 2 10K_0402_5%

DGPU_PWR_EN

1 RH237 2 10K_0402_5%

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/07/06

Deciphered Date

2011/07/06

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

PCH (4/8) PCI, USB, NVRAM
Size

Document Number

Rev
0.1

LA-7531P
Date:

Sunday, April 10, 2011

Sheet
1

15

of

45

5

4

3

2

1

BMBUSY# / GPIO0

TACH4 / GPIO68

K42

B40

TACH1 / GPIO1

TACH5 / GPIO69

A43

GPIO6

C43

TACH2 / GPIO6

TACH6 / GPIO70

D40

+3VS

A45

TACH3 / GPIO7

TACH7 / GPIO71

A41

H17

GPIO8

EC_SMI#

EC_SMI#

C5

LAN_PHY_PWR_CTRL / GPIO12

PCH_GPIO15

K6

GPIO15

*

H：On-Die voltage regulator enable
L：On-Die PLL Voltage Regulator disable
2 SLP_ME_CSW_DEV#
1K_0402_5%

1
RH241

40

DDR3L_EN

27 SLP_ME_CSW_DEV#

@

B44

TACH0 / GPIO17

PCH_GPIO22

W3

SCLOCK / GPIO22

DDR3L_EN

K15

GPIO24 / MEM_LED

PCH_GPIO27

C15

GPIO27

SLP_ME_CSW_DEV# G1

GPIO28

STP_PCI#
PCH_WAN_RADIO_OFF#

22 PCH_WAN_RADIO_OFF#

GPIO36
PCH_GPIO37

PCH_GPIO37

FDI TERMINATION VOLTAGE OVERRIDE
C

*

LOW - Tx, Rx terminated
to same voltage
(DC Coupling Mode)

+3VS

22,24 HDD_DETECT#

RH245

2

RH246

2

@

1 1K_0402_5%

PCH_GPIO37

1

PCH_GPIO37

100K_0402_5%
DIS@

GPIO27

PCH_GPIO27 (Have internal Pull-High)
VCCVRM VR Enable
*High:
Low: VCCVRM VR Disable
@RH250
@
RH250

1

2

PCH_GPIO27
10K_0402_5%

R3
W12
W6
M6

RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#

GATEA20

AU12

PCH_PECI_R

U6

EC_KBRST#

@
1
2
0_0402_5% RH239

BC9
R6

27

H_PECI 5,27
EC_KBRST# 27

AU10

H_CPUPWRGD 5
H_THERMTRIP#_C 1
390_0402_5%
INIT3_3V#

2
RH240

H_THRMTRIP#

H_THRMTRIP# 5

@
RH242
10K_0402_5%

TS_VSS1

AK10

TS_VSS2

AH12

TS_VSS3

AK12

INIT3_3V

TS_VSS4

AH10

This signal has weak internal
PU, can't pull low

STP_PCI# / GPIO34
GPIO35
SATA2GP / GPIO36
SATA3GP / GPIO37
NC_1

U40

PCH_GPIO38

N3

PCH_GPIO39

U10

SDATAOUT0 / GPIO39

PCH_GPIO48

U1

SDATAOUT1 / GPIO48

VSS_NCTF_15

BL48

SLOAD / GPIO38
C

+3VS

GPIO49

AA1

SATA5GP / GPIO49

VSS_NCTF_16

BL49

HDD_DETECT#

K17

GPIO57

VSS_NCTF_17

BL51

GPIO6

1 RH243

2 10K_0402_5%

VSS_NCTF_18

C3

GPIO1

1 RH244

2 10K_0402_5%

GPIO16

1 RH247

2 10K_0402_5%

DDR3L_EN

1

2 10K_0402_5%

HDD_DETECT#

1

DMC_DET#

1

PCH_GPIO15

1

EC_SMI#

1

A4

VSS_NCTF_1

VSS_NCTF_19

C49

A48

VSS_NCTF_2

VSS_NCTF_20

C51

A49

VSS_NCTF_3

VSS_NCTF_21

D1

VSS_NCTF_22

D51

VSS_NCTF_23

E1

A5

VSS_NCTF_4

A51

VSS_NCTF_5

BH1

VSS_NCTF_6

BH51

VSS_NCTF_7

BJ1

VSS_NCTF_8

BJ3
BJ49

B

SATA4GP / GPIO16

PECI

U3

1

On-Die PLL Voltage Regulator
This signal has a weak internal pull up

AA3

A20GATE

GPIO

GPIO28

1

DMC_DET#

GPIO16

D

RH238
10K_0402_5%

2

EC_SCI#

27

CPU/MISC

27

EC_SCI#

+3V_PCH

VSS_NCTF_9
VSS_NCTF_10

BJ51

VSS_NCTF_11

BL1

VSS_NCTF_12

BL3

VSS_NCTF_13

BL4

NCTF

D

W1

GPIO1

2

UH1F
GPIO0

RH248
RH249
RH251
RH252
RH253

2 10K_0402_5%
2 10K_0402_5%
2 1K_0402_5%
2 10K_0402_5%
B

VSS_NCTF_14
+3VS
COUGAR-POINT-SFF_BGA1017~D
Part Number = SA000043Z00
GPIO0

PCH_GPIO28 needs to be connected to XDP_FN8
PCH_GPIO35 needs to be connected to XDP_FN9
PCH_GPIO15 needs to be connected to XDP_FN16
Please refer to Huron River Debug Board DG 0.5

RH254

1

STP_PCI#

1

PCH_GPIO48

1

PCH_GPIO22

1

PCH_GPIO38

1

PCH_GPIO39

1

PCH_WAN_RADIO_OFF#
GPIO49

2 10K_0402_5%

1

GPIO36

1
1

RH255
RH256

RH257
RH258
RH259
RH260
RH261
RH262

2 10K_0402_5%
2 10K_0402_5%

2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/07/06

Deciphered Date

2011/07/06

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

PCH (5/8) GPIO, CPU, MISC
Size

Document Number

Rev
0.1

LA-7531P
Date:

Sunday, April 10, 2011

Sheet
1

16

of

45

5

4

3

2

1

+VCCP

PCH Power Rail Table

POWER

+VCCAPLLEXP

1
0_0603_5%
@

Place CH35 Near AP19 pin

1

2

CH27
10U_0805_4VAM

2
RH264

AM21

VCCIO[28]

AP19

VCCAPLLEXP

AR15
AT13

C

2925mA
VCCIO[17]

AR25

VCCIO[18]

1

2

CH32
1U_0402_6.3V6K

2

CH31
1U_0402_6.3V6K

2

1

2

VCCALVDS[1]
VCCALVDS[2]

AF33 +VCCA_LVDS
AG33

VSSALVDS[1]
VSSALVDS[2]

AC33
AE33

60mA VCCTX_LVDS[1]

AF37

VCCTX_LVDS[2]

AG37

VCCTX_LVDS[3]

AG39

VCCTX_LVDS[4]

AJ37

VCC3_3[6]

2

VCC3_3[7]

VCCVRM[3]
VCCVRM[4]

VCCIO[20]
VCCIO[21]

AU25

VCCIO[22]

AU27

VCCIO[23]

AU29

VCCIO[24]

AU35

VCCIO[25]

20mA

VCCDMI[1]

VCCIO[26]
VCC3_3[3]

CH35
+VCCAFDI_VRM

0.1U_0402_10V7K

AU19
AW18

VCCVRM[5]
VCCVRM[6]

B

1
0_0603_5%

1

@
@

2

+1.05VS_VCCAPLL_FDI
RH271
1
2+1.05VS_VCCDPLL_FDI AK21
+VCCP
0_0805_5%
+VCCP_VCCDMI

AU15
AW16

V5REF_Sus

5

0.001

Vcc3_3

3.3

0.266

VccADAC

3.3

0.001

LH2 
2
1
0.1UH_MLF1608DR10KT_10%_1608

VccADPLLA

1.05

0.08

0.1uH inductor, 200mA

VccADPLLB

1.05

0.08

VccCore

1.05

1.3

VccDMI

1.05

0.042

VccIO

1.05

2.925

VccASW

1.05

1.01

VccSPI

3.3

0.02

VccDSW

3.3

0.003

VccpNAND

1.8

0.19

VccRTC

3.3

6 uA

VccSus3_3

3.3

0.119

2 0.022_0805_1%

1

CH25

1
22U_0805_6.3V6M

1

CH24
0.01U_0402_16V7K
2

RH265
1
2
0_0805_5%

2

+3VS

U37

AU21
AW21

CH26
0.1U_0402_10V7K

+VCCAFDI_VRM

+VCCP_VCCDMI
+VCCP

AM23 +VCCP_VCCDMI

1
1

VCCCLKDMI

AP39 +1.05VS_VCC_DMI_CCI

2
VccDFTERM[1]

AJ13

VccDFTERM[2]

AJ15

VccDFTERM[3]

AK15

VccDFTERM[4]

AL13

2 1U_0402_6.3V6K

CH34
1U_0402_6.3V6K

1
RH269
1

2

RH272
1

Y19 +3V_VCCPSPI
1

VCCDMI[2]
VCCDMI[3]

+VCCP

CH38
1U_0402_6.3V6K

2

@
2

0_0805_5%
2
0_0603_5%

C

0_0805_5%

+VCCPNAND

20mA

VCCSPI

1
2
0_0805_5%

1

VCCAFDPLL[1]
VCCAFDPLL[2]
VCCIO[27]

2

CH33

FDI

2
RH270

CH37
1U_0402_6.3V6K

Place CH53 Near AP13,AP15 pin
AP13
AP15

0.001
D

RH267

190mA

+VCCP
2

5

RH266

AU23

BK28

V5REF
+3VS

Near AP43

0.01U_0402_16V7K2

S0 Iccmax
Current (A)
0.001

CH22
10U_0805_4VAM

2

Voltage
1.05

V_PROC_IO

2
+1.8VS
0_0805_5%

CH36
0.1U_0402_10V7K

+3VS_VCCA3GBG

1

1

RH263

+VCCTX_LVDS
CH23 1

2

VCCIO[19]

AR29

AW34

LH1
2
1
BLM18PG181SN1D_2P

1

NAND / SPI

2

RH268
0_0805_5%

Voltage Rail

+1.8VS

+3VS_VCC3_3_6

T39

1

CH21
0.1U_0402_10V7K

V50

1

CH20
0.01U_0402_16V7K

VSSADAC

+VCCADAC

1

2

1

CH30
1U_0402_6.3V6K

1

CH29
1U_0402_6.3V6K

2
+3VS

CH28
10U_0805_4VAM

AR27
1

U51

CRT

VCCIO[16]

AR23

VCCADAC

1mA

LVDS

VCCIO[15]

@
+VCCP

1mA

HVCMOS

+VCCP

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
VCCCORE[18]
VCCCORE[19]
VCCCORE[20]
VCCCORE[21]
VCCCORE[22]
VCCCORE[23]

+3VS

DMI

+VCCP

2

AB21
AB23
AC21
AC23
AE21
AE23
AF21
AF23
AG21
AG23
AG25
AG27
AJ21
AJ23
AJ25
AJ27
AJ29
AJ31
AK29
AK31
AK33
AM33
AM35

VCCIO

2

1

CH16
1U_0402_6.3V6K

2

1

CH19
1U_0402_6.3V6K

2

D

1

CH18
1U_0402_6.3V6K

1

CH17
10U_0805_4VAM

1300mA

VCC CORE

UH1G

VccSusHDA

3.3 / 1.5

0.01

VccVRM

1.8 / 1.5

0.16

VccCLKDMI

1.05

0.02

VccSSC

1.05

0.095

VccDIFFCLKN

1.05

0.055

VccALVDS

3.3

0.001

VccTX_LVDS

1.8

0.06

+3V_PCH
1

B

+3VS

RH273

COUGAR-POINT-SFF_BGA1017~D
Part Number = SA000043Z00

VCCVRM = 160mA detal waiting for newest spec
+VCCAFDI_VRM

+1.8VS

+VCCAFDI_VRM
RH274
1
0_0603_5%

2
@

+1.5VS

2

RH275
1
0_0603_5%

5/18 modified
A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/07/06

2011/07/06

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

PCH (6/8) PWR
Size

Document Number

Rev
0.1

LA-7531P
Date:

Thursday, April 07, 2011

Sheet
1

17

of

45

5

4

3

2

1

VCC3_3 = 266mA detal waiting for newest spec

+VCCP

VCCDMI = 42mA detal waiting for newest spec

VCC3_3[5]
VCC3_3[6]

VCCIO[14]

+VCCSUS1
+1.05VM_VCCSUS

1

2

1

2
+3VS

CH50
22U_0805_6.3V6M

1

2

CH54
1U_0402_6.3V6K

+VCCP

2

CH53
1U_0402_6.3V6K

2

@
1

CH46
1U_0402_6.3V6K

1

2

2

AB27

VCCASW[1]

AB29

VCCASW[2]

AB31

VCCASW[3]
VCCASW[4]
VCCASW[5]

AC31

VCCASW[6]

AE27

VCCASW[7]

AE29
AE31

CH61
1U_0402_6.3V6K

CH59
10U_0805_10V4Z

2

VCCSUS3_3[10]

U29

VCCSUS3_3[6]

N27

VCCIO[34]

N18

1mA V5REF_SUS

M37

DCPSUS[2]
DCPSUS[3]

AC29

LH4
10UH_LB2012T100MR_20%
+3VS_VCC_CLKF33
1
2
1
1

2+3VS_VCC_CLKF33_R
RH291

1

U27

DCPSUS[1]

AC27

5/18 delete RH229

0_0805_5%

VCCSUS3_3[9]

1010mA

CH51
22U_0805_6.3V6M

2

1

AR33
AU33

1

@
1U_0402_6.3V6K

V13

R29

VCCASW[8]
VCCASW[9]

U21

VCCASW[10]

V21

VCCASW[11]

V23

VCCASW[12]

V25

VCCASW[13]

Y21

VCCASW[14]

Y23

VCCASW[15]

Y25

VCCASW[16]

DCPSUS[4]

AU31

VCCSUS3_3[1]

AM27

1mA V5REF
VCCSUS3_3[2]

R33

VCCSUS3_3[3]

R35

VCCSUS3_3[4]

U33

VCCSUS3_3[5]

U35

VCC3_3[1]

AB19

VCC3_3[8]

AC19

VCC3_3[4]

Y27

VCCASW[17]

Y29

VCCASW[18]

Y31

VCCASW[19]

N36

1

2

2

+VCCP

VCCIO[5]

CH65

+VCCA_USBSUS
+3V_VCCPSUS_1

+1.05VS_VCCA_B_DPL

AF6

CH71
4.7U_0603_6.3V6K

LH6
10UH_LB2012T100MR_20%
1
2
2

+VCCA_DPLL_L

2
LH7
10UH_LB2012T100MR_20%

0_0805_5%

1

1

2

2

2

1
+
2

1

2

VCCIO[6]

AF15

+5VS

RH289
0_0603_5%
2
1

U17

DCPSST

2
RH290

1

AB15

VCCIO[3]

AC13

VCCIO[4]

AC15

1

C

DH4

RH288
100_0402_5%

+3V_PCH

CH751H-40PT_SOD323-2
+PCH_V5REF_RUN
1

1
0_0805_5%

2

CH58
0.1U_0402_10V7K

2

CH57
1U_0603_10V6K

+3VS

2
RH292

1
0_0603_5%

CH60
0.1U_0402_10V7K

+1.05VS_SATA3

0_0603_5%
CH62
0.1U_0402_10V7K

RH294
2
1

1

CH63
1U_0402_6.3V6K

2

LH5
10UH_LB2012T100MR_20%
1
2 +VCCSATAPLL_R
@
1

+VCCAFDI_VRM
+1.05VS_VCC_SATA
+1.05VS_VCC_SATA

2
1

+VCCP

0_0805_5%

+VCCSATAPLL
+VCCAFDI_VRM

2

2
1

B

RH297
2

1

+VCCP

0_0805_5%
CH66
10U_0805_10V4Z
@
Place

@

CH73 Near AK1 pin

+VCCP

0_0805_5%

+VCCP

VCCASW[22]

U19

+VCCME_22

VCCASW[23]

R19

+VCCME_23

RH302

2

1 0_0603_5%

VCCASW[21]

V19

+VCCME_21

RH304

2

1 0_0603_5%

10mA VCCSUSHDA

V31

FUSE

V_PROC_IO 1mA

VCCIO[2]

CH49
0.1U_0603_25V7K

+3VS

+3VS

+1.05VS_SATA3

AM2
AE19
AF17

2

RH301

2

1 0_0603_5%

+RTCVCC

1

2

+1.05VS_VCCA_B_DPL

1

VCCSSC

AM17

+1.05VS_VCCA_A_DPL

+

5

2

1

2

+3VS_VCCPPCI

2

CH751H-40PT_SOD323-2
+PCH_V5REF_SUS
1

@

2

+VCC3_3_2

DH3

+3V_PCH

RH299

1

2

1

2

N16

VCCRTC

HDA

2

1

1
0_0603_5%

CH56
1U_0402_6.3V6K

AA13

VCCIO[13]

2

1

+3VS_VCCPCORE
1

55mA

2

+V_CPU_IO
1

AC35
+VCCSST

+VCCP

2
RH287

+3V_VCCPSUS

1

AG15

VCCVRM[1]
VCCVRM[2]

CPU

CH69
1U_0402_6.3V6K

VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

CH70
0.1U_0402_10V7K

1
0_0603_5%

1

AG13

VCCAPLLSATA

VCCADPLLB

RTC

2
0_0603_5%

80mA

AJ17
AC37
AE37
AE39

CH76
1U_0402_6.3V6K

1
RH303

1

CH75
0.1U_0402_10V7K

1

2

+VCCP

VCCADPLLA

95mA
+1.05VS_SSCVCC

CH74
0.1U_0402_10V7K

1
0_0603_5%

CH67
1U_0402_6.3V6K

CH73
0.1U_0402_10V7K

2

+VCCP
2
RH300

BD40

+1.05VS_VCCDIFFCLKN

1
0_0603_5% 1

CH81
1U_0402_6.3V6K

2
RH298

BF40

1

+3V_PCH

RH284
100_0402_5%

+PCH_V5REF_RUN

R40

VCCIO[12]

VCCVRM[4]

+1.05VS_VCCDIFFCLKN

1U_0402_6.3V6K

CH72
0.1U_0402_10V7K

2

1
RH307

AC39

DCPRTC[1]
DCPRTC[2]

80mA

CH80
220U_B2_2.5VM_R35

+VCCP

+VCCP

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL
1

A

CH64
0.1U_0402_10V7K

2
RH286

+5V_PCH

+VCCA_USBSUS

+3VS
VCC3_3[2]

+VCCDIFFCLK

1
0_0603_5%

CH79
1U_0402_6.3V6K

2
RH296

CH78
220U_B2_2.5VM_R35

B

R15
U15

1

2

RH293

SATA

+VCCRTCEXT
+1.05VM_VCCSUS

1
0_0603_5%

1
+3V_PCH
0_0603_5%
2
1
+3V_PCH
RH282
0_0603_5%

+PCH_V5REF_SUS

2
@

1

+1.05VS_VCCAUPLL

+VCCP
2
RH295

2
RH281
+3V_VCCAUBG

2

AP27

R27

VCCSUS3_3[8]

1

+VCCDPLL_CPY

119mA VCCSUS3_3[7]

D

RH279
20K_0402_5%

2

VCCAPLLDMI2

+5V_PCH

1

2
0_0603_5%

AW31

2

1

1
RH283

+VCCAPLL_CPY_PCH

+3V_VCCPUSB

2

2

31 PCH_PWR_EN#

1

+VCCP

1

2

2

1

2

V37
V39

CH40
1U_0402_6.3V6K

2

U25

RH278
1
3
0_0603_5%

2

1

CH48
1U_0402_6.3V6K

1

CH45

C

+3VS_VCC_CLKF33

VCCIO[32]

QH3
AO3413_SOT23

+5VALW

+VCCP

CH52

CH42
0.1U_0402_10V7K
@

VCCIO[31]

U23

CH68
1U_0402_6.3V6K

@

@

DCPSUSBYP

R25

CH47
0.1U_0402_10V7K

CH43
10U_0805_10V4Z

0_0805_5%

R10

VCCIO[30]

0.1U_0402_10V7K

2

+PCH_VCCDSW
1

3mA

VCCDSW3_3

1
0_0603_5%

+VCCSUSHDA
1

COUGAR-POINT-SFF_BGA1017~D
CH77
1U_0402_6.3V6K

Part Number = SA000043Z00

@

1
0_0603_5%

+3V_PCH
If it support 3.3V audio signals
POP:RH228
Depop RH233/RH234

2010/07/06

Compal Electronics, Inc.
2011/07/06

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

3

A

If it support 1.5V audio signals
POP:RH233/RH234
Depop R228

Compal Secret Data

Security Classification
Issued Date

2

2
RH305
RH306
150_0402_1%
2
1

2
1

LH3
10UH_LB2012T100MR_20%
+VCCAPLL_CPY 1
2

R12

2
RH285

D

RH280

+VCCPDSW

0.1U_0402_10V7K 2

+1.05VS_VCCUSBCORE

G

+VCCP

2
0_0603_5%

@

VCCIO[29]

R23

S

1
RH309

27 PCH_VREG_EN#

D

VCCACLK

USB

CH39

AC51

1

Clock and Miscellaneous

2
0_0603_5%

CH55
1U_0402_6.3V6K

D

1
RH277

+3V_DSW

G

S

1

2

POWER

UH1J
3

CH41
0.1U_0402_10V7K

+VCCACLK
1
0_0603_5%

CH44
0.1U_0402_10V7K

@

2
RH276

+3V_PCH

1

+3V_DSW

2

+3VALW

PCI/GPIO/LPC

@
QH4
AO3413L_SOT23-3

2

Title

PCH (7/8) PWR
Size

Document Number

Rev
0.1

LA-7531P
Date:

Sunday, April 10, 2011

Sheet
1

18

of

45

5

4

3

2

1

UH1I

D

BA25
BA27
BA29
BA31
BA34
BA36
BA39
BA41
BA43
BA45
BA7
BA9
BB4
F2
BB48
BB50
BC11
BC13
BC16
BC18
BC21
BC23
BC25
BC27
BC29
BC31
BC34
BC36
BC39
BC41
BC43
BC45
BE11
BE13
BE16
BE21
BE23
BE27
BE29
BE31
BE34
BE36
BE39
BE41
BE43
BE45
BE7
BE9
BE18
BF2
BF4
BF48
BF50
BH10
BH14
BH26
BH32
BH34
BH38
BH42
BH44
BH46
G21
BH48
BH6
BK10
BK14
BK18
BK22
BK26
D14
BK32
BK34
BK38
BK42
BK46
D10
D18
D22
D26
D30
D34
D38
D42
D46
F48
F50
G11
G13
G16
G18
G23
G27
G29
G31
G34
G36
G39
G41
D6
G43
G9
J11
J13
J16

UH1H
G7
AA11
AA39
AA41
AA43
AA45
AA7
AA9
AB17
AB2
AB25
AB33
AB35
AB37
AB4
AB48
AB50
AC11
AC17
AC25
AC41
AC43
AC45
AC7
AE13
AE15
AE17
AE25
AE35
AE41
AE43
AE45
AE7
AE9
AF19
AF2
AF25
AF27
AF29
AF31
AF4
AF48
AF50
AG11
AG17
AC9
AE11
AG19
AG29
AG31
AG35
AG41
AG43
AG45
AG7
AG9
AH2
AJ11
AJ19
AJ33
AJ35
AJ39
AJ41
AJ43
AJ45
AJ7
AJ9
AK17
AK19
AK2
AK23
AK25
AK27
AK35
AK37
AK4
AK48
AK50
AL11
AL39

C

B

VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AL41
AL43
AL45
AL7
AL9
AM15
AM19
AM25
AM29
AM31
AM37
AP11
AP17
AP2
AP21
AP23
AP25
AP29
AP31
AP33
AP35
AP37
AP4
AP41
AP43
AP45
AP48
AP50
AP7
AP9
AR19
AR21
AR31
AR35
AR37
AT11
AT39
AT41
AT43
AT45
AT7
AT9
AU17
AU37
AV2
AV4
AV48
AV50
AW11
AW13
AW23
AW25
AW27
AW29
AW36
AW39
AW43
AW45
AW7
AW9
AY10
B10
B14
B18
B22
B26
B30
B34
B38
B42
B46
B6
BA11
BA13
BA16
AW41
BA18
BA21
BA23

COUGAR-POINT-SFF_BGA1017~D
PART_NUMBER = SA000043Z00

A

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]

VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[357]
VSS[358]
VSS[359]
VSS[360]
VSS[361]
VSS[362]
VSS[363]
VSS[364]
VSS[365]
VSS[366]
VSS[367]
VSS[368]
VSS[369]
VSS[370]
VSS[371]
VSS[372]
VSS[373]
VSS[374]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

J18
J21
J23
J25
J27
J29
J31
J34
J36
L25
J41
J45
J7
J9
K2
K4
K48
K50
L11
L13
L16
L18
L29
L21
L23
L27
L9
L31
L34
L36
L39
L41
L43
L45
L7
N13
N21
R37
N23
N29
N31
N34
N39
N41
N43
N45
N7
N9
P2
P4
P48
P50
R17
R21
R31
T11
T13
T41
T43
T45
T7
T9
BH28
N25
AF8
AF35
BB2
BE25
BH30
F4
G25
N11
BH18
BH22
BK30
AR17
J39
U31
U49
V11
V15
V17
V2
V27
V29
V33
V35
V4
V41
V43
V45
V48
V7
V9
Y15
Y17
Y33
Y35
Y37
AR8
AR6
BF15
BD15
BF24
BD24

D

C

B

A

COUGAR-POINT-SFF_BGA1017~D
Part Number = SA000043Z00

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/07/06

2011/07/06

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

PCH (8/8) VSS
Size

Document Number

Rev
0.1

LA-7531P
Date:

Thursday, April 07, 2011

Sheet
1

19

of

45

3

PCH_DPB_P1_C
PCH_DPB_N1_C

0.1U_0402_16V7K
0.1U_0402_16V7K

1
1

2
2

C5
C6

PCH_DPB_P1
PCH_DPB_N1

PCH_DPB_P1 14
PCH_DPB_N1 14

PCH_DPB_P0_C
PCH_DPB_N0_C

0.1U_0402_16V7K
0.1U_0402_16V7K

1
1

2
2

C7
C8

PCH_DPB_P0
PCH_DPB_N0

PCH_DPB_P0 14
PCH_DPB_N0 14

1

2.2K_0402_5%

@

2

R11

2

@

@

@

@

2

2

2

@

499_0402_1%
R10

+3VS

499_0402_1%
R9

2N7002DW-T/R7_SOT363-6

2

HDMI_SCLK

D

1

PCH_DPB_P2 14
PCH_DPB_N2 14

1

PCH_DPB_P2
PCH_DPB_N2

1

C3
C4

1

2
2

1

1
1

499_0402_1%
R8

3

0.1U_0402_16V7K
0.1U_0402_16V7K

499_0402_1%
R7

4

PCH_DPB_P2_C
PCH_DPB_N2_C

2

HDMI_L_SCLK

PCH_DPB_P3 14
PCH_DPB_N3 14

499_0402_1%
R6

2
0_0402_5%

PCH_DPB_P3
PCH_DPB_N3

499_0402_1%
R5

1

C1
C2

2.2K_0402_5%
R4

R2

2
2

499_0402_1%
R3

14 PCH_DDPB_CLK

1
1

1

Q1B

0.1U_0402_16V7K
0.1U_0402_16V7K

2

Follow Intel
Feedback putting
2.2K ohm

2

1

PCH_DPB_P3_C
PCH_DPB_N3_C

1

1

5

D

2.2K_0402_5%

R1

2

+3VS

HDMI

2

1

4

2

5

@

Q1A
HDMI_L_SDATA

2
0_0402_5%

1

6

HDMI_SDATA

0_0402_5%

2N7002DW-T/R7_SOT363-6

1
R14

+3VS

5V PULL UP IN CONNECTER SIDE

2

R15
100K_0402_5%

+3VS

R13

D

2 0_0603_5%

1

D1

Q2
S
2N7002_SOT23

F1

1 +HDMI_5V
@
CH491DPT_SOT23-3
2

+5VS

2

2

1

@

R21

S

0_0402_5%

HDMI_R_CK-

1

2

0_0402_5%

HDMI_R_D0+

C

R18

D2
BAV99-7-F_SOT23-3
@

R20
100K_0402_5%

@
PCH_DPB_P0_C

HDMI_DETECT

2
G

14 PCH_DDPB_HPD

2

1

L2
MBK1608221YZF_2P
HP_DETECT
1
2
1
2
10K_0402_5%
1

1

1

1

1
3

2

2

C10
220P_0402_50V7K

3

R19

3

R16
1M_0402_5%

2

PCH_DPB_N3_C

4

HDMI_R_CK+

1

WCM-2012-900T_0805
L1
1

0_0402_5%

2

2

4

1

3

R17

2

PCH_DPB_P3_C

Place closed to JHDMI1

Q3
SSM3K7002FU_SC70-3

D

1

1.1A_6V_SMD1812P110TF
C9

0.1U_0402_16V4Z 2

SM070001310 400ma 90ohm@100mhz DCR 0.3
@

W=40mils
+HDMI_5V_OUT

2
G

2

C

1

1

3

R12

1

14 PCH_DDPB_DAT

5V Level

+HDMI_5V_OUT

PCH_DPB_N0_C
PCH_DPB_P1_C

R24
R25

PCH_DPB_N1_C
PCH_DPB_P2_C

R26
R27

1

L5
WCM-2012-900T_0805
4
PCH_DPB_N2_C

R28

3

3

1
1

@

R22

2

0_0402_5%

HDMI_R_D0-

2

0_0402_5%

HDMI_R_D1+

4
1

@

3

3

2

2

1

2

0_0402_5%

1

2

0_0402_5%

1

2

2

4

3

3

1

4

C11

2
HDMI_R_D1-

HP_DETECT

1

2

HDMI_SDATA
HDMI_SCLK
HDMI_R_CK-

C12

HDMI_R_CK+
HDMI_R_D0HDMI_R_D0+
HDMI_R_D1-

HDMI_R_D2+
HDMI_R_D1+
HDMI_R_D2HDMI_R_D2+

1

2

0_0402_5%

20
21
22
23

Issued Date

2010/07/06

Deciphered Date

2011/07/06

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification

4

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+

Symbol modify
from
DC232000N00

TAITW_PDVBR0-19FLBS4NN4H0
Part Number = DC232000R00
PCB Footprint = TAITW_PDVBR0-19FLBS4NN4H0_19P

HDMI_R_D2-

A

5

19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

+HDMI_5V_OUT

@

1

B

JHDMI1 conn@

R23
2.2K_0402_5%

10P_0402_50V8J

WCM-2012-900T_0805
L4
1

2

10P_0402_50V8J

4

2

2

L3
WCM-2012-900T_0805
4

B

1

2.2K_0402_5%
2
1

+3VS

1

2

HDMI Conn
Size

Document Number

Rev
0.1

LA-7531P
Date:

Sunday, April 10, 2011

Sheet
1

20

of

45

5

4

@

+LAN_IO

C18
2

C19
2

2

R32
1

2

+LAN_VDD
+LAN_VDDREG

2

1

2

1

2 0.1U_0402_16V7K

PCIE_PRX_C_DTX_P1

22

HSOP

C33

1

2 0.1U_0402_16V7K

PCIE_PRX_C_DTX_N1

23

HSON

17
18

LED3/EEDO
LED1/EESK
LED0

31
37
40

LAN_LED1
LAN_LED0

HSIP
HSIN

EECS/SCL
EEDI/SDA

30
32

R34 1
R36 1

16

CLKREQB

5,15,25,27 PLT_RST#

25

PERSTB

13 CLK_PCIE_LAN
13 CLK_PCIE_LAN#

19
20

REFCLK_P
REFCLK_N

XTLO

1
2
4
5
7
8
10
11

43

MDIP0
MDIN0
MDIP1
MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3

CKXTAL1

XTLI

44

CKXTAL2

DVDD10
DVDD10
DVDD10

13
29
41

13 PCIE_PTX_C_DRX_P1
13 PCIE_PTX_C_DRX_N1

R213 1

EC_PME#

R37

14,22 PCH_PCIE_WAKE#

R38

27

R39

1

2
1K_0402_5%

1
1

@

1

2
0_0402_5%

2 10K_0402_5%

2 0_0402_5%
2 0_0402_5%

28

LANWAKEB

26

ISOLATEB

DVDD33
DVDD33

27
39

14
15
38

NC/SMBCLK
NC/SMBDATA
GPO/SMBALERT

AVDD33
AVDD33
AVDD33
AVDD33

12
42
47
48

33

ENSWREG
EVDD10

21

+LAN_VDDREG

34
35

VDDREG
VDDREG

2 2.49K_0402_1%

46

RSET

AVDD10
AVDD10
AVDD10
AVDD10

3
6
9
45

REGOUT

36

ISOLATEB

2

2
R40
15K_0402_5%

R41
R42

1

+LAN_IO

1
1

2
1 0_0402_5%
+LAN_IO
R44
3.3V : Enable switching regulator
0V
: Disable switching regulator

R45

1

2 10K_0402_5%
2 1K_0402_5%

24
49

GND
PGND

B

+LAN_VDD

27P_0402_50V8J
1

2

XTLI

1

0_0402_5%

LAN_MDIN0
+V_DAC
+V_DAC
LAN_MDIP1
C38

1

2

0.01U_0402_16V7K

A

LAN_MDIN1

2
3

24

TD1-

TX1-

23

TDCT1

4

TDCT2

5
6

TXCT1

+LAN_VDD
SHI0000AA00
L6
W=60mils
+LAN_SROUT1.05
1
2
2.2UH +-5% NLC252018T-2R2J-N
W=60mils
DELTA_1008HC-472EJFS-A_2P
1

TD2+

TX2+

20

RJ45_RX1+

TD2-

TX2-

19

RJ45_RX1-

7

TD3+

TX3+

18

RJ45_TX2+

LAN_MDIN2

8

TD3-

TX3-

17

RJ45_TX2-

2

9

TDCT3

TXCT3

16

+V_DAC

10

TDCT4

TXCT4

15
RJ45_TX3+
RJ45_TX3-

TD4+

TX4+

TD4-

TX4-

13

1

C35
0.1U_0402_16V7K

1 LAN_ACTIVITY#

10

LED-(Y)

9

LED+(Y)

RJ45_TX3-

8

PR4-

RJ45_TX3+

7

PR4+

RJ45_RX1-

6

PR2-

RJ45_TX2-

5

PR3-

RJ45_TX2+

4

PR3+

RJ45_RX1+

3

PR2+

RJ45_TX0-

2

PR1-

+LAN_IO

These components close to U44: Pin 36
( Should be place within 200 mils )

1
1
1
1

2
2
2
2

75_0402_5%
75_0402_5%
75_0402_5%
75_0402_5%

RJ45_GND

2

C39
1000P_1206_2KV7K

LAN_LED1 2
R51
510_0402_5%

1

1

LINK_100_1000#

+LAN_IO
1

+V_DAC

12

2

C34

R46

RJ45_TX0+

LAN_MDIP2

LAN_MDIN3

JLAN1
510_0402_5%
LAN_LED0 2

4.7U_0603_6.3V6K

R47
R48
R49
R50

21

14

+LAN_VDD

RJ45_TX0-

TXCT2

11

H_2P5 (6.0)

C37

+LAN_EVDD10

RJ45_TX0+

22

LAN_MDIP3

XTLO

2

27P_0402_50V8J

TS1
TX1+

2

R43

C36
2

1

+LAN_IO

Part number = SA00004LR00

TD1+

2

1
C31

Y1
25MHZ_12PF_X5H025000FC1H-H

PCB Footprint = RTL8111E-VL-CGT_QFN48_6X6

1

1
C30

C

Value = RTL8111E-VL-CGT_QFN48_6X6

LAN_MDIP0

+LAN_EVDD10

2

0_0603_5%

LAN_MDIP0
LAN_MDIN0
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3

1

+3VS

R35

C29

1

2 10K_0402_5%
2 10K_0402_5%

2

13 LAN_CLKREQ#

R33
1

2

C140
0.1U_0402_16V4Z

1

2

1

B

H8
H_2P5
HOLEA
SHLD2

14

SHLD1

13

PR1+

12

LED-(G)

11

LED+(G)

1

C32

+LAN_IO

2

+LAN_IO

U1

C

2

1U_0402_6.3V6K

C27
0.1U_0603_25V7K

C28

13 PCIE_PRX_DTX_N1

2

1

C26

0.1U_0402_16V7K

1

0.1U_0402_16V7K

1

1.5M_0402_5%

2
Q5
R31
SSM3K7002FU_SC70-3

0_0603_5%

13 PCIE_PRX_DTX_P1

2

1

C25

These caps close to U64: Pin 3,6,9,13,29,41,45

4.7U_0603_6.3V6K

1
1

S

2
G

WOL_EN

2

1

C24

These caps close to U1: Pin 12,27,39,42,47,48

EN_WOL

3

27

2

1
C23

D

R30
470K_0402_5%

D

1

C22

0.1U_0402_16V7K

2

1

C21

0.1U_0402_16V7K

C17

1
C20

0.1U_0402_16V7K

2

1

0.1U_0402_16V7K

C16

0.1U_0402_16V7K

2

1

0.1U_0402_16V7K

D

C15

1

0.1U_0402_16V7K

2

2

1

0.1U_0402_16V7K

C14

1

0.1U_0402_16V7K

2

2
+VSB

0.1U_0402_16V7K

1

G

S

1
AO3413L_SOT23-3

1.5A

D

3

1

+LAN_VDD

0_1206_5%

0.1U_0402_16V7K

Q4

2

0.1U_0402_16V7K

1

1

W=60mils

R29

+3VALW

2

0.1U_0402_16V7K

W=60mils

C13
1U_0402_6.3V6K

3

C139
Value = SANTA_130452-A
Part Number = DC234005S00

4.7U_0603_6.3V6K

A

350UH_NA0069RLF
SP050006X00

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/07/06

2011/07/06

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

LAN Realtek RTL8111E
Size

Document Number

Rev
0.1

LA-7531P
Date:

Sunday, April 10, 2011

Sheet
1

21

of

45

5

4

3

2

+3VS

2

1

C44
4.7U_0805_10V4Z

2

C45

1

12 SATA_PRX_DTX_P1
12 SATA_PRX_DTX_N1
12 SATA_PTX_DRX_N1
12 SATA_PTX_DRX_P1

C43

0.1U_0402_16V4Z
2

0.1U_0402_16V4Z

C46
C47

1
1

2 0.01U_0402_16V7K SATA_PRX_DTX_P1_C
2 0.01U_0402_16V7K SATA_PRX_DTX_N1_C

C48
C49

1
1

2 0.01U_0402_16V7K SATA_PTX_DRX_N1_C
2 0.01U_0402_16V7K SATA_PTX_DRX_P1_C

+3VS
R58
0_0402_5%
1
2 E51TXD_P80DATA2_R
1
2

E51TXD_P80DATA

0_0402_5%
R57

1
3
5
7
9
11
13
15

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
G1

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G2

2

24,27 E51TXD_P80DATA
24,27 E51RXD_P80CLK

1
3
5
7
9
11
13
15

14,21 PCH_PCIE_WAKE#
13 MINI1_CLKREQ#

13 CLK_PCIE_MINI1#
13 CLK_PCIE_MINI1

B

13 PCIE_PRX_DTX_N3
13 PCIE_PRX_DTX_P3
13 PCIE_PTX_C_DRX_N3
13 PCIE_PTX_C_DRX_P3

27 BTooth_OFF#

BTooth_OFF#

0_1206_5%

+3VS

+1.5VS_WWAN R53

1

2

0_1206_5%

+1.5VS
2

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54

R54 1
2 0_0402_5%
PLT_RST_BUF#

MINI2_SMBCLK
MINI2_SMBDATA

R55

+3VS

1
1

R56

PCH_WAN_RADIO_OFF#

2 0_0402_5% PCH_SMBCLK
2 0_0402_5% PCH_SMBDATA

@
@

C40
4.7U_0805_10V4Z

1

2

1

C41
0.1U_0402_16V4Z

2

C42
0.1U_0402_16V4Z

D

16

PCH_SMBCLK 11,13,24,27
PCH_SMBDATA 11,13,24,27

USB20_N5 15
USB20_P5 15

+1.5VS_WLAN
+3VS_WLAN

1
3
5
7
9
11
13
15

1
3
5
7
9
11
13
15

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
G1

CONN@
2 2
4 4
6 6
8 8
10 10
12 12
14 14
16 16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G2

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54

+1.5VS
+1.5VS_WLAN
+3VS_WLAN
R82 0_0603_5%
1
2
1
1
1
1
C82
C83
C84
C85
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2

2

2

2

Mini Card Power Rating
Power

WL_OFF#
PLT_RST_BUF#
R85

WL_OFF# 27
PLT_RST_BUF# 15,24
+3VS

2 0_0603_5%

1

MINI3_SMBCLK
MINI3_SMBDATA

R86
R87

1
1

USB20_N4_R
USB20_P4_R

R88
R89

1
1

2 0_0402_5%
2 0_0402_5%

R90

1

2 0_0402_5%
MINI1_LED#

@
@

2 0_0402_5%
2 0_0402_5%

(9~16mA)

Primary Power (mA)

Auxiliary Power (mA)
Normal

Peak

Normal

+3VS

1000

750

+3V

330

250

250 (wake enable)

+1.5VS

500

375

5 (Not wake enable)

B

PCH_SMBCLK
PCH_SMBDATA
USB20_N4 15
USB20_P4 15

R92
100K_0402_5%
2

ACES_88956-5204

For Wireless LAN

1

C

JMINI3
(WLAN_BT_DATA)
(WLAN_BT_CLK)

2

DC040005D00

+3VS_WLAN
@ R84
@R84
0_0402_5%
1
2

1

1

HDD_DETECT#

16,24 HDD_DETECT#

R52

ACES_88956-5204
R59
0_0402_5%
@

C

+3VS_WWAN

1

D

WWAN/m-SATA

+1.5VS
CONN@
2 2
4 4
6 6
8 8
10 10
12 12
14 14
16 16

JMINI2

+3VS
1

1

DC040005D00
+3VS_WLAN

+3VS_WLAN

R83
0_1206_5%
2
1

60mil
1

A

2

C86
4.7U_0805_10V4Z

1

C87
0.1U_0402_16V4Z

A

2

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/07/06

Issued Date

Deciphered Date

2011/07/06

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

MiniCard WWAN & WLan
Size

Document Number

Rev
0.1

LA-7531P
Date:

Sunday, April 10, 2011

Sheet
1

22

of

45

5

4

+3VS

+3VS

+LCDVDD

2

2
2
G

3

S

2

Place closed to JLVDS1

INVPWR_B+
B+
L7
FBMA-L11-201209-221LMA30T_0805
2
1
L8
FBMA-L11-201209-221LMA30T_0805
2
1

1

C55
4.7U_0805_10V4Z

3

S

1

1
C62
4.7U_0805_10V4Z

3

Q8

2

C59
680P_0402_50V7K

0.1U_0402_16V4Z

1

1

2

2

1

2

S

C60
68P_0402_50V8J

SM010014520 3000ma
220ohm@100mhz
DCR 0.04

+3VS
R64

1

2 1K_0402_5%

R65

1

2 1K_0402_5%

C63
0.1U_0402_16V4Z

@ C64
10P_0402_50V8J

2

C66

2

1 220P_0402_50V7K INVTPWM

C67

2

1 220P_0402_50V7K DISPOFF#

W=60mils

W=60mils
LCD_CLK
LCD_DATA
1

1

2

2

@ C65
10P_0402_50V8J
JLVDS1
+LCDVDD
+3VS
LCD_CLK
LCD_DATA
14 PCH_TXOUT014 PCH_TXOUT0+

C

PCH_TXOUT2PCH_TXOUT2+

14 PCH_TXOUT214 PCH_TXOUT2+

EDP_TXN1
EDP_TXP1

P

1

2

4
4

2

A

2009/12/15
change P/N to SA00000U500

Y

4

DPST_PWM_1

INVTPWM
2
0_0402_5%

1
R71

4
4

INVTPWM 42

EDP_AUXN
EDP_AUXP

INVT_PWM

UMA@

1

2
2

1
1

C68
C69

EDP_TX0#_R
EDP_TX0_R

EDP_TXN1
EDP_TXP1

0.1U_0402_16V7K
0.1U_0402_16V7K

2
2

1
1

C70
C71

EDP_TX1#_R
EDP_TX1_R

EDP_AUXN
EDP_AUXP

0.1U_0402_16V7K
0.1U_0402_16V7K

2
2

1
1

C72
C73

EDP_AUX#_R
EDP_AUX_R
FB4
FB3
FB2
FB1

FB4
FB3
FB2
FB1
+3VS
USB20_N3
USB20_P3
+LG_VOUT

15
15

VBIOS PWM SETTING
CHANGE TO NORMAL

0_0402_5%

PCH_TXCLKPCH_TXCLK+
DISPOFF#
R78 2
EDP_HPD

0.1U_0402_16V7K
0.1U_0402_16V7K

42
42
42
42

U2
74AHCT1G125GW_SOT353-5

PCH_TXCLKPCH_TXCLK+

EDP_TXN0
EDP_TXP0

1

B

Reserved for UMA Only

OE#

2 0_0402_5%

EDP_TXN0
EDP_TXP0

5

DPST_PWM

1 R197

2 0_0402_5%

4
4

3

14

INVT_PWM

eDP

R69
100K_0402_5%
2
1

G

27

@
1 R198

14
14

091211 ADD R734 Fix CPT 4sec shut down flash issue

R68
0_0402_5%

2

R67
0_0402_5%
@

1

1

+3VS

PCH_TXOUT0PCH_TXOUT0+
PCH_TXOUT1PCH_TXOUT1+

14 PCH_TXOUT114 PCH_TXOUT1+

+5VS

R72
10K_0402_5%

DISPOFF#

2

B

Part Number = SP010013I00

1K_0402_5%
R66
DISPOFF# 42
4

UMA@

EDP_HPD#
D

R74
4.7K_0402_5%
@

Q9
2N7002H_SOT23-3

2
G

EDP_HPD
1

1

41
42
43
44
45

2

BKOFF#

G1
G2
G3
G4
G5

1

BKOFF#

1

27

eDP

R73
4.7K_0402_5%
UMA@
2

D4
RB751V_SOD323

C

1

1

1
2
0_0402_5%

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

PCB Footprint = ACES_50398-04071-001_40P

+VCCP
@
R76

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

ACES_50398-04071-001

2

+3VS

D

LCD/LED PANEL Conn.

+LCDVDD

2
D

2
G

2

10U_0603_6.3V6M

C58

Q7
AO3413L_SOT23-3

W=60mils

2N7002E-T1-GE3_SOT23-3
PCH_ENVDD

0.1U_0402_16V4Z

1

C57

D

1

C61
0.047U_0402_16V7K

2

1

C56

G
1

1

R63
1K_0402_5%
2
1

D
Q6

PCH_ENVDD

W=60mils

1

1

1

R62
100K_0402_5%

2

14

1

+3VS

W=60mils

R61
300_0603_5%

2N7002E-T1-GE3_SOT23-3

2

LCD POWER CIRCUIT

+LCDVDD

D

3

2

3

S

R70
100K_0402_5%
A

2

A

14 PCH_LCD_CLK

PCH_LCD_CLK

R193
2
1
0_0402_5%

LCD_CLK

14 PCH_LCD_DATA

LCD_DATA

2
1
0_0402_5%

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

R194

2010/07/06

2011/07/06

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

LVDS Connector
Size

Document Number

Rev
0.1

LA-7531P
Date:

Sunday, April 10, 2011

Sheet
1

LA-7021P

23

of

45

5

4

3

D

+3VS
+1.5VS

100mils

2

SATA_PRX_DTX_P0 C78
SATA_PRX_DTX_N0 C79
SATA_PTX_DRX_N0 C80
SATA_PTX_DRX_P0 C81

1

2

1

2

C77
1000P_0402_50V7K

C

12 SATA_PTX_DRX_N0
12 SATA_PTX_DRX_P0

1

C76
0.1U_0402_16V4Z

12 SATA_PRX_DTX_P0
12 SATA_PRX_DTX_N0

C75
1U_0402_6.3V4Z

2

C74
10U_0805_10V4Z

1

1

mSATA Conn.

+3VS

D

2

JMINI1

1
1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PRX_C_DTX_P0
SATA_PRX_C_DTX_N0

1
1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PTX_C_DRX_N0
SATA_PTX_C_DRX_P0
+3VS

R93

1

100K_0402_5%
22,27 E51TXD_P80DATA
22,27 E51RXD_P80CLK

R91
0_0402_5%
1
2
1
2
0_0402_5%
R103

2

2

16,22 HDD_DETECT#

HDD_DETECT#

1

R171
0_0402_5%

CONN@
2
4
6
8
10
12
14
16

1
3
5
7
9
11
13
15

1
3
5
7
9
11
13
15

2
4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
G1

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G2

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54

PLT_RST_BUF# 15,22
@ R80
2
2
@ R81
USB20_N7
USB20_P7

1 0_0402_5%
1 0_0402_5%

USB20_N7 15
USB20_P7 15

PCH_SMBCLK 11,13,22,27
PCH_SMBDATA 11,13,22,27
C

mSATA

ACES_88956-5204
DC040005D00

@

B

B

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/04/26

Deciphered Date

2010/05/28

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

mSATA Connector
Size
B
Date:

Document Number

Rev
0.1

LA-7531P
Sunday, April 10, 2011

Sheet
1

24

of

45

A

B

C

D

U22
13 PCIE_PTX_C_DRX_P2

1

13 PCIE_PTX_C_DRX_N2
1

RREF

48

2

HSIN

3V3_IN

47

13 CLK_PCIE_CD

3

REFCLKP

CLK_REQ#

46

13 CLK_PCIE_CD#

4

REFCLKN

PERST#

45

5

AV12

EEDO

44

6

HSOP

EECS

43

7

HSON

EESK

42

8

GND

GPIO/EEDI

41

9

DV12

MS_INS#

40

SD_CD#

39

13 PCIE_PRX_DTX_P2

C197

13 PCIE_PRX_DTX_N2

C198

1
C201

+ODR_PWR
+3VS

2

20 mils AV12

2

4.7U_0603_6.3V6K
2 PCIE_PRX_C_DTX_P2
0.1U_0402_10V7K
2 PCIE_PRX_C_DTX_N2
0.1U_0402_10V7K

1
1

20 mils DV12
2
0.1U_0402_10V7K
40 mils
40 mils

20 mils

2

1

2

DV33_18

C206
0.1U_0402_10V7K

1

C205
4.7U_0603_6.3V6K

2

1

C203
0.1U_0402_10V7K

2

C202
10U_0603_6.3V6M

1

1

SD_D1_R 1
R204
SD_D0_R
1
R205
SD_CLK_R
1
2
1
R207
5P_0402_50V8C
SD_CMD_R 1
C208
R206
SD_D3_R
1
R208

SD_D1
2
0_0402_5%
SD_D0
2
0_0402_5%
SD_CLK
2
33_0402_5%
SD_CMD
2
0_0402_5%
SD_D3
2
0_0402_5%

+3VS

10 milsR201

HSIP

C193

E

10

Card1_3V3

11

3V3_IN

SP15

38

12

Card2_3V3

SP14

37

13

XD_CD#

SP13

36

14

DV33_18

SP12

35

15

GND

SP11

34

16

SP1

SP10

33

17

SP2

SP9

32

18

SP3

SP8

31

19

SP4

SP7

30

20

SD_D1

SP6

29

21

SD_D0

SP5

28

22

SD_CLK

DV12_S

27

23

SD_CMD

GND

26

24

SD_D3

SD_D2

25

RREF

2

1 6.2K_0603_1%

40 mils

2
C199

1
0.1U_0402_10V7K

CDCLK_REQ# 13

1

PLT_RST# 5,15,21,27

SD_CD#
SP15_SDWP_XDD7

2

C207
1
2
4.7U_0603_6.3V6K
DV12_S

20 mils

SD_D2
1
R209

1
C209

2
0.1U_0402_10V7K

SD_D2_R
2
0_0402_5%

RTS5209-GR_LQFP48_7X7
JREAD1

SD_CLK_R

2

1

2

1

2

C196
0.1U_0402_10V7K

GND1
GND2
GND3
GND4

2

1

C200
0.1U_0402_10V7K

12
13
14
15

2 in1 SD/MMC

1

C195
10U_0603_6.3V6M

D0
D1
D2
WP
CD

@

C194
0.1U_0402_10V7K

7
8
9
10
11

3

R202
100K_0402_5%

SD_D0_R
SD_D1_R
SD_D2_R
SP15_SDWP_XDD7
SD_CD#

+ODR_PWR

D3
CMD
VSS1
VDD
CLK
VSS2

1

+ODR_PWR

1
2
3
4
5
6

2

SD_D3_R
SD_CMD_R

3

Close to connector

TAITW_PSDAT3-09GLBS1N14N2
Part Number = SP07000MV00
4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/04/26

Deciphered Date

2010/05/28

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Empty
Size
B
Date:

Document Number

Rev
0.1

LA-7531P

Sunday, April 10, 2011

Sheet
E

25

of

45

A

B

C

D

E

1

+5VALW

D9

USB3_RX2_P_R

2 2

9 8

USB3_RX2_P_R

USB3_TX2_N_C

4 4

7 7

USB3_TX2_N_C

USB3_TX2_P_C

5 5

6 6

USB3_TX2_P_C

1

USB_ON
USB_ON#

1

1

Follow EMI Request

R210
10K_0402_5%

2
2

YSCLAMP0524P_SLP2510P8-10-9
Part Number = SC300001D00

@

U8

0_0402_5%
1 R79
2
SW_USB20_N1
SW_USB20_P1

1
2
3
4
9

D

CEN
DM
DP
GND
GND

R101
0_0402_5%
USB_ON
1
2
USB20_N1
USB20_N1 15
USB20_P1
USB20_P1 15
+5VALW

8
7
6
5

CB
TDM
TDP
VCC

C54
0.1U_0402_16V4Z

S

+5VALW

3

10
11

3

2
2

AZC199-02SPR7G_SOT23-3

1

2

9
8
7
6
5

GND1
GND2

12
13

GND3
GND4

USB3_RX2_P_R 1 R95
USB3_RX2_N_R 1 R96

2 0_0402_5%
2 0_0402_5%

USB3_TX2_P 15
USB3_TX2_N 15

USB3_RX2_P
USB3_RX2_N

1

USB3_RX2_P 15
USB3_RX2_N 15

C88

2

1
2
3
4

1
C89

2

GND
IN
IN
EN

8
7
6
5

OUT
OUT
OUT
OC#

G547F1P81U_MSOP8

1
+
C90

2

ACON_TAR24-9V1391

1
C91

2

1
C92

2

2

R94

1

D10

VCC
SSTX+
DSSTXD+
GND_DRAIN
GND
SSRX+
SSRX-

0.1U_0402_16V4Z

1
2
3
4

SW_USB20_N1
SW_USB20_P1

USB3_TX2_P
2 0.1U_0402_10V7K
1
2 0.1U_0402_10V7K USB3_TX2_N

1000P_0402_50V7K

W=80mils

JUSB1

2

W=80mils

+USB_AS

2.1A
U3

150U_B2_6.3VM_R45M

+USB_AS
USB3_TX2_P_C C93 1
USB3_TX2_N_CC94

1

MAX14566EETA+_TDFN-EP8_2X2 1

Q20
2N7002_SOT23-3

2
G

C138
0.1U_0603_50V_X7R

3 3
8

USB_OC0#

R203
100K_0402_5%

0.1U_0402_16V4Z

USB3_RX2_N_R

1000P_0402_50V7K

10 9

2

1 1

3

1

USB3_RX2_N_R

1

BOM Structure = CONN@
27

USB_ON#

USB_OC0# 15

0_0402_5%

@
1 R155

USB_ON#

USB_OC0#

2
1

Part Number = DC021103070
ME Part Number = DC23300A400

2

0_0402_5%

2

R190
4.7K_0402_5%

FFC 16 pin conn Pitch 0.5 mm.

2

OUT
OUT
OUT
OC#

8
7
6
5

G547F1P81U_MSOP8

1
+
C97

2

1
C98

2

1
C99

2

0.1U_0402_16V4Z

GND
IN
IN
EN

1000P_0402_50V7K

C96

0.1U_0402_16V4Z

2

1000P_0402_50V7K

C95

1

1
2
3
4

150U_B2_6.3VM_R45M

U4

W=80mils

1

W=80mils

+USB_BS

2.1A

3

AGND

+5VALW

18
17

R97

1

USB_OC1#

2

USB_OC4# 15

0_0402_5%

USB_ON#

AGND

CONN@
SP01000R700
ACES_88512-1641

G18
G17

16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JUSB2

16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

3

EXT_MIC_L2

EXT_MIC_L2 29

HPL

HPL 29

HPR

HPR 29
HP_JD

PWR_LED+

HP_JD 29

200_0603_5%
+USB_BS

USB20_N9
USB20_P9

1 R216
2
0_0402_5%

2
R60 1

ON/OFFBTN# 28
+3VALW
PWR_LED#

PWR_LED# 27

USB20_N9 15
USB20_P9 15

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/04/26

Deciphered Date

2010/05/28

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

USB Con & Daughter Con
Size
B
Date:

Document Number

Rev
0.1

LA-7531P

Sunday, April 10, 2011

Sheet
E

26

of

45

4

2

C106
0.1U_0402_16V4Z

+5VS

R100 2
0_0402_5%
@

+3VLP

0.1U_0402_16V4Z

1

+3VALW

CLK_PCI_LPC
PLT_RST#
EC_RST#
EC_SCI#
WL_OFF#

15 CLK_PCI_LPC
5,15,21,25 PLT_RST#

10/1 ENE Recommand
R104

1

2 47K_0402_5%

KSO1

R105

1

2 47K_0402_5%

KSO2

R110

1

2 1K_0402_5%

EC_SMI#

R111

1

2 2.2K_0402_5%

EC_SMB_DA1

R113

1

2 2.2K_0402_5%

EC_SMB_CK1

16
22
28

EC_SCI#
WL_OFF#

KSI[0..7]

C

28

+3VS

R120

1 R195
1 R196

16 SLP_ME_CSW_DEV#
14
SLP_A#

2 10K_0402_5% EC_SCI#

1

KSO[0..15]

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
2 0_0402_5%
2 0_0402_5%

EC_SMB_CK1
EC_SMB_DA1
R121 1
@
2 0_0402_5%
R122 1
2 0_0402_5%
@

34,35 EC_SMB_CK1
34,35 EC_SMB_DA1
11,13,22,24 PCH_SMBCLK
11,13,22,24 PCH_SMBDATA

1
2
3
4
5
7
8
10
12
13
37
20
38

GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LPC_FRAME#/LFRAME#
LPC_AD3/LAD3
LPC_AD2/LAD2
LPC_AD1/LAD1
LPC_AD0/LAD0

63
64
65
66
75
76

DAC_BRIG/DA0/GPO3C
EN_DFAN1/DA1/GPO3D
IREF/DA2/GPO3E
DA3/GPO3F

68
70
71
72

EC_MUTE#/PSCLK1/GPIO4A
USB_EN#/PSDAT1/GPIO4B
CAP_INT#/PSCLK2/GPIO4C
Interface
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F

83
84
85
86
87
88

CLK_PCI_EC/PCICLK
PCIRST#/GPIO05
EC_RST#/ECRST#
EC_SCI#/GPIO0E
CLKRUN#/GPIO1D

DA Output

77
78
79
80

EC_SMB_CK1/SCL0/GPIO44
EC_SMB_DA1/SDA0/GPIO45
EC_SMB_CK2/SCL1/GPIO46
EC_SMB_DA2/SDA1/GPIO47

PS2

To prevent debug card unwork issue.

EC_XCLK1

4
OSC

2

NC

1

1
OSC

15P_0402_50V8J

1

NC

C111

EC_XCLK0

2

C112
15P_0402_50V8J

SUSCLK_R

R124

1

@

2

EC_XCLK1
EC_XCLK0
0_0402_5%

122
123

KB930QF-A1_LQFP128_14X14

A

9
10

1
2
3
4
5
6
7
8
GND
GND

R126
1
R127
1
R128
1
R129
1
R130
1

100K_0402_5%
2 PLT_RST#
10K_0402_5%
2 PCH_DPWROK
10K_0402_5%
2 PCH_PWROK
10K_0402_5%
2 PCH_APWROK
10K_0402_5%
2 VR_ON

ACES_50521-00841-001

5

ADP_I

1

2 10K_0402_5%

EC_ACIN

R109

D

1
CH751H-40PT_SOD323-2

PCH_PWROK 14
TP_CLK 28
TP_DATA 28

R118
0_0402_5%
2
1

VR_HOT#

2
G
Q10
2N7002_SOT23

2
2
2
2

100
101
102
103
104
105
106
107
108

PCH_RSMRST#

110
112
114
115
116
117
118

EC_ACIN
EC_ON
EC_ON
ON/OFF
ON/OFF
LID_SW#
LID_SW#
SUSP#
SUSP#
PBTN_OUT#
H_PECI
1
2
@
R123 43_0402_1%
+V18R
Reserved for
1
C113

D

S

C

U6
20mils

2

0_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

H_PROCHOT# 5

SPI ROM 128KB

C110
0.1U_0402_16V4Z

8

VCC

3

W

7

HOLD

EC_SPICS#/FSEL#_R 1
R114
R115
R116
R117

14,31,35

H_PROCHOT#_EC

+3VALW

WOL_EN 21
HDA_SDO 12

1
1
1
1

ACIN

1 100P_0402_50V8J

2

VR_HOT#

EC_SI_SPI_SO_R
EC_SO_SPI_SI_R
EC_SPICLK_L_R
EC_SPICS#/FSEL#_R

VSS

4

Q

2

S

EC_SPICLK_L_R

6

C

EC_SO_SPI_SI_R

5

D

EC_SI_SPI_SO_R

MX25L2005M2C-12G SOP 8P

0_0402_5%
R134 1 ENBKL
73
2
ENBKL 14
EC_PECI
R119 1
74
2 H_PECI
H_PECI 5,16
43_0402_1%
89
RFLED#
28
R217 1 0_0402_5%
90
2
BATT_CHG_LED# 28
CAPS_LED#
91
T41
PWR_LED#
92
PWR_LED# 26
R218
93
2
1 0_0402_5%
BATT_LOW_LED# 28
SYSON
95
SYSON
31,38,39,40
VR_ON
121
VR_ON
43
PM_SLP_S4#
127
PM_SLP_S4# 14

124

2

EC_MUTE# 29
USB_ON# 26

PCH_PWROK
TP_CLK
TP_DATA

EC_SI_SPI_SO
EC_SO_SPI_SI
EC_SPICLK_L
EC_SPICS#/FSEL#

GPIO40
H_PECI/GPIO41
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
PWR_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59

2

C109

0_0402_5%
R200 2
1
PCH_VREG_EN# 18
EN_DFAN1
EN_DFAN1 28
BTooth_OFF#
2
1
BTooth_OFF# 22
R191
0_0402_5%
EC_MUTE#
USB_ON#

1 200K_0402_5%

35

SA00002C100 (S IC FL 1MB MX25L1005AMC-12G SOP 8P
3.3V)

EC_SPICLK_L_R

@ R125
22_0402_5%
2
1

@C114
@
C114
100P_0402_50V8J
1
2

Reserve for EMI please close to U64

PCH_RSMRST# 14
EC_LID_OUT# 13

B

H_PROCHOT#_EC
BKOFF#
CPU1.5V_S3_GATE
PCH_APWROK
SA_PGOOD

BKOFF#
23
CPU1.5V_S3_GATE 9
PCH_APWROK 14
SA_PGOOD 41

28,36
28
28
9,31,37,38,39
PBTN_OUT# 14

KB9012

Co-lay KB930/KB9012 PECI
4.7U_0805_10V4Z 2

20mil

L10

Stuff
KB930

R119

KB9012

R123

A

Compal Secret Data

Security Classification

2010/04/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

2 10K_0402_5%

D5

33

43

119
120
126
128

GPIO

Issued Date

@

ADP_I

SPIDI/MISO
SPIDO/MOSI
SPICLK/GPIO58
SPICS#

JFW1
1
2
3
4
5
6
7
8

1

1 100P_0402_50V8J ECAGND
BATT_TEMP 34

C108 2

BATT_TEMP

WOL_EN
HDA_SDO

ECAGND 2
1
FBMA-L11-160808-800LMT_0603
KSO2
KSO3
KSI5
KSI4
KSI6
KSI7
E51TXD_P80DATA

GFX_CORE_PWRGD R108

29

ACOFF

97
98
99
109

PM_SLP_S3#/GPIO04
EC_RSMRST#/GPXIOA03
PM_SLP_S5#/GPIO07
EC_LID_OUT#/GPXIOA04
EC_SMI#/GPIO08
EC_ON/GPXIOA05
GPIO0A
EC_SWI#/GPXIOA06
GPIO0B
ICH_PWROK/GPXIOA07
GPIO
GPIO0C
BKOFF#/GPXIOA08
GPO RF_OFF#/GPXIOA09
SUS_PWR_DN_ACK/GPIO0D
INVT_PWM/PWM2/GPIO11
GPXIOA10
FAN_SPEED1/FANFB0/GPIO14
GPXIOA11
FANFB1/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PM_SLP_S4#/GPXIOD01
ON_OFF/GPIO18
ENBKL/GPXIOD02
SUSP_LED#/GPIO19
EAPD/GPXIOD03
GPI EC_THERM#/GPXIOD04
NUM_LED#/GPIO1A
SUSP#/GPXIOD05
PBTN_OUT#/GPXIOD06
EC_PME#/GPXIOD07
XCLK1
XCLK0
V18R

X1
32.768KHZ_12.5PF_Q13MC14610002

ACOFF

SDICS#/GPXIOA00
WOL_EN/SDICLK/GPXIOA01
ME_EN/SDIMOSI/GPXIOA02
LID_SW#/GPXIOD00

SPI Flash ROM

GND
GND
GND
GND
GND

3

2

14

4.7K_0402_5%

PCH_DPWROK 14

SPI Device I/F

11
24
35
94
113

B

0_0402_5% R212
PCH_DPWROK
2
1
BEEP#

1

SM Bus
PM_SLP_S3#
6
14
PM_SLP_S3#
PM_SLP_S5#
14
14
PM_SLP_S5#
EC_SMI#
15
16
EC_SMI#
PCH_PWR_EN
R199 2 43_0402_1%16
1
31 PCH_PWR_EN
VGATE
17
14,43
VGATE
GFX_CORE_PWRGD 18
43 GFX_CORE_PWRGD
SUSWARN#
19
14
SUSWARN#
25
23
INVT_PWM
FAN_SPEED1
28
28 FAN_SPEED1
EC_PME#
29
21
EC_PME#
E51TXD_P80DATA
30
22,24 E51TXD_P80DATA
E51RXD_P80CLK
31
22,24 E51RXD_P80CLK
EAPD
32
29
EAPD
SUSACK#
34
14
SUSACK#
PM_SLP_SUS#
36
14 PM_SLP_SUS#

21
23
26
27

BATT_TEMP/AD0/GPI38
BATT_OVP/AD1/GPI39
ADP_I/AD2/GPI3A
AD3/GPI3B
AD Input
AD4/GPI42
AD5/GPI43

LPC & MISC

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

2

AVCC
PWM0/GPIO0F
BEEP#/PWM1/GPIO10
FANPWM0/GPIO12
ACOFF/FANPWM1/GPIO13

PWM Output

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

1

+3VALW

AGND

C107 2

GATEA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

16
GATEA20
16 EC_KBRST#
12
SERIRQ
12 LPC_FRAME#
12
LPC_AD3
12
LPC_AD2
12
LPC_AD1
12
LPC_AD0

R107

R112

EC_RST#

69

1 47K_0402_5%

2

TP_DATA

67

9
22
33
96
111
125
VCC
VCC
VCC
VCC
VCC
VCC

R106 2

1

4.7K_0402_5%

BKOFF#

Reserved for KB9012

+3VALW

R102

+3VS
1

D

U5

TP_CLK

1

1

1
R99

3

1

2

C105
1000P_0402_50V7K

2

2

C104
1000P_0402_50V7K

2

1

C103
0.1U_0402_16V4Z

1

C102
0.1U_0402_16V4Z

2

C101
0.1U_0402_16V4Z

2

1

1

L9
FBMA-L11-160808-800LMT_0603
1
2 +EC_VCCA

+3VALW_EC
1

2

ECAGND

R98
0_0805_5%
1
2
C100
0.1U_0402_16V4Z

2011/04/09

+3VALW

3

0_0402_5%
1
2

5

3

2

Title

Compal Electronics, Inc.
EC ENE-KB930 & 9012

Size Document Number
Custom
Date:

LA-7531P

Sunday, April 10, 2011

Sheet

1

Rev
0.1
27

of

45

Part Number = SP010015W00
ACES_88514-02401-071
27

+3VALW

KSI[0..7]

2
26 ON/OFFBTN#

@
R170

R131
100K_0402_5%

4

27

2
ON/OFFBTN#

ON/OFF

27

51ON#

33

KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

1

2

51ON#

3

1

5
6

D6
CHN202UPT_SC70-3

2

EC_ON

3

2

27,36

R132
PJSOT24CH_SOT23-3

Q11
2N7002E-T1-GE3_SOT23-3
S

10K_0402_5%

GND2
GND1

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JKB1

1

1

D11

Part Number = SCA00000E10

D

2
G
3

Top Side
Power Button

EC_ON

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

KSO[0..15]

1

1

10K_0402_5%
SW1
Part Number = SN111002700
SMT1-05-A_4P
3
1

26
25

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

2

+3VLP

+5VS

Follow EMI Request
1

1

PACDN042Y3R_SOT23-3

@

C115
0.01U_0402_16V7K

2

2

TP/B TO M/B

3

D7
JTP1

27
27

1
2
3
4
5
6
7
8
9
10
11
12

TP_CLK
TP_DATA

TP_CLK
TP_DATA

+5VS
1
2

100P_0402_50V8J

C117

C116

1

2

27 RFLED#
27 BATT_LOW_LED#
27 BATT_CHG_LED#
+3VALW
27

LID_SW#

100P_0402_50V8J

1
2
3
4
5
6
7
8
9
10
11
12

13
14

GND
GND

ACES_51522-01201-001
CONN@
SP01001BX00
+5VS
10U_0805_10V4Z
2

For CPU 3.25mm PTH
H_3P25 (7.0) X4

C168
0.1U_0402_16V4Z

@

@

H3
H_3P25
HOLEA

H4
H_3P25
HOLEA

@

@

2.5mm PTH

H_2P5 (8.0) x 6
HOLEA

HOLEA

HOLEA

HOLEA

HOLEA

1

H12
H_2P5

FD1

FD2

FD3

PCB

FD4

ZZZ1

27 FAN_SPEED1
C171
1000P_0402_50V7K

1
2
3

G1
G2

H_2P0X3P0N

@

FIDUCIAL_C40M80

4
5

@

FIDUCIAL_C40M80

@

FIDUCIAL_C40M80

1

H_2P6X1

1

JFAN1
1
2
3

1

40mil
+VCC_FAN1

1

1

2.0mm
NPTH

H11
H_2P5

1

1

HOLEA

R173
10K_0402_5%

HOLEA

H9
H_2P5

1

H10
H_2P0N

C170
1000P_0402_50V7K
1
2

H14
H_2P0X3P0N
HOLEA

H6
H_2P5

1

H13
H_2P6

H5
H_2P5

1

C169
10U_0805_10V4Z
1
2

+3VS

1

H2
H_3P25
HOLEA

1

H1
H_3P25
HOLEA

APL5607KI-TRG_SO8

1

2

8
7
6
5

1

+VCC_FAN1
1
300_0402_5%

GND
GND
GND
GND

1

2
R172

EN
VIN
VOUT
VSET

1

EN_DFAN1

2

27

1
2
3
4

1

U11

1

C167
1

FAN1 Conn

@

FIDUCIAL_C40M80

LA-7531P

ACES_85204-03001
SP02000CU00

DA80000OG00

2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/04/26

Deciphered Date

2010/05/28

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

BIOS, I/O Port & K/B Connector
Size
A3
Date:

Document Number
Sunday, April 10, 2011

LA-7531P
Sheet
28

Rev
0.1
of

45

A

B

R75
2.2K_0402_5%

C131

SPK_R2
2
FBMA-L11-160808-121LMT_0603

1

2

3

2

Follow EMI Request

1U_0603_16V6K
@
1
2
C133
0.22U_0603_16V7K

JSPK2
SPK_L1
1
SPK_L22

2
2
2
2
place
10U_0805_10V4Z 0.1U_0402_16V4Z
SPKOUT_L1
SPKOUT_L2

SPK_OUT_R+
SPK_OUT_R-

45
44

SPKOUT_R1
SPKOUT_R2

HP_OUT_L
HP_OUT_R

32
33

HP_OUTL
HP_OUTR

SYNC

10

HDA_SYNC_AUDIO

BCLK

6

SDATA_OUT

5

HDA_SDOUT_AUDIO

SDATA_IN

8

SDIN_CODEC

GPIO0/DMIC_DATA

close to chip

3

GPIO1/DMIC_CLK
PD#

EAPD

47

SPDIFO

48

MONO_OUT

20

MIC2_VREFO

29
30
28

RESET#
PCBEEP

SENSE B

1
HDA_SYNC_AUDIO

12
HDA_BITCLK_AUDIO 12

HDA_SDOUT_AUDIO 12

1
R144
1
R145

HDA_SDIN0
2
33_0402_5%

HDA_SDIN0 12

EAPD
2
0_0402_5%

EAPD

27

MIC1_VREFO_L
C162

2

@
R146
2.2K_0402_5%

EXT_MIC_MV_R

CBP
CBN

VREF

27

AC_VREF

JDREF

19

AC_JDREF2 R152

CPVEE

34

CPVEE
1
C146

AVSS1
AVSS2

26
37

1 20K_0402_1%

2
2.2U_0603_6.3V4Z

1

C149

1

C150
2

1

C151

R154
2

2 @

place close to chip

+AVDD

1

2

C145

2

C142
0.1U_0402_16V7K

1

R151
2

1

D

1
C147
2

S

Q12
BSS138W-7-F_SOT323-3

2
G

22K_0402_5%

Follow EMI Request

C153

2

1

EMI@

R156
10K_0402_5%

SB000002X00

1
C148

2

10U_0603_6.3V6M

1

1

EXT_MIC_L2 26

BK1608HS601-T_2P

HDA_RST_AUDIO#

EXT_MIC_L2

C52
470P_0402_50V7K_X7R

EXT_MIC_L2

1

MIC_JD

AGND

2

L15
2

R153
22K_0402_5%

+3VS

2

R214
1
2
1K_0402_5%

10mil

35

MIC2

1

MIC2_VREFO

36

PVSS2
PVSS1
DVSS2
DVSS1

Follow EMI Request

Headphone

MIC1_VREFO_R
LDO_CAP

MIC1_VREFO_L

3
4

Part Number = SP02000IA00

Part Number = SCA00001A00
AZ5125-02S.R7G_SOT23-3
D14

Follow EMI Request

SENSE A

1 NC1
2 NC2

ACES_85204-0200N

HDA_BITCLK_AUDIO

DGND

1

1
L14

2

38

25

1

ALC269Q-VB6-GR _QFN48_7X7
Part Number = SA000028N50
PCB Footprint = ALC269Q-VB6-GR_QFN48_7X7

MIC1

PCB Footprint
used from
CYWM64P0100

C136

40
41

2

31

20110323

3
4

1

100P_0402_50V8J

CBP

1 NC1
2 NC2

Part Number = SCA00001A00
AZ5125-02S.R7G_SOT23-3

2
0.22U_0603_16V7K

1

MIC2_L
MIC2_R

43
42
49
7

WM-64PCY_2

D13

3

2

1

C135

SPKOUT_R2

1
1 C129

100P_0402_50V8J

1
C144

MIC2_VREFO

1
2

1U_0603_16V6K
@
1
2
C126
0.22U_0603_16V7K

4.7K_0402_1%

16
17

18

1

SPK_R1
2
FBMA-L11-160808-121LMT_0603
C130
@

100P_0402_50V8J

MIC1_L
MIC1_R

13

C134

AVDD2

AVDD1

46

PVDD1

PVDD2

39

9
DVDD_IO

21
22

12

CBN
2.2U_0603_6.3V4Z
MIC1_VREFO_L

1
2

2

1
2

ACES_85204-0200N
Part Number = SP02000IA00

EMI@

LINE2_L
LINE2_R

11

U7

SPK_OUT_L+
SPK_OUT_L-

LINE1_L
LINE1_R

14
15

4

SENSE_B

MIC2 Detect pin

Part Number = CY000001C00

SPK_L2
2
FBMA-L11-160808-121LMT_0603

1
L13

1

PD#

2
0_0402_5%

2 20K_0402_5%

R150

1
L12

SPKOUT_R1

2

1

SPKOUT_L2

+5VS

10U_0805_10V6M

1
R143

R139
10U_0805_10V4Z 0.1U_0402_16V4Z 2
1
0_0603_5%

10U_0805_10V4Z

MIC1_L
1
2
C132 4.7U_0603_6.3V6K
MIC1_R
1
2
C137 4.7U_0603_6.3V6K
MIC2_L
2
4.7U_0603_6.3V6K
MIC2_R
2
4.7U_0603_6.3V6K

MONO_IN
1
2
C143
100P_0402_50V8J
2 39.2K_0402_1%
SENSE_A
2 20K_0402_5%

1
1

C121
@

2
10U_0805_10V4Z

SPK_R1
SPK_R2

2
0.22U_0603_16V7K

@

68 mA

HDA_RST_AUDIO#

R148
R149

2

1
1 C118

1

C128
10U_0805_10V4Z
2
2

2

HP_JD
MIC_JD

SPK_L1
2
FBMA-L11-160808-121LMT_0603

C125

2
10U_0805_10V4Z

0.1U_0402_16V4Z

1
C50
1
C51

12 HDA_RST_AUDIO#

1
L11

+AVDD

1

1
EXT_MIC_MV_R

EC_MUTE#

SPKOUT_L1

+5VS

EMI@

DVDD

External MIC

EC_MUTE#

C123
2

23
24

27

1

+3VS_DVDD

35 mA
1

C127

MIC2

1

C122

@
0.1U_0402_16V4Z
1
1
C124

0.1U_0402_16V4Z

2
1
FBMH1608HM601-T

+3VS

1

C120

R135
2
1
0_0603_5%

600 mA 0.1U_0402_16V4Z

+PVDD

R137
1

E

JSPK1
0.1U_0402_16V4Z +DVDD_IO

10U_0805_10V4Z
2
2

place close to chip

D

3

R133
2
1
FBMH1608HM601-T
SM01000B200
1
C119

+3VS

C

2

1U_0603_10V4Z
R159
10K_0402_5%

3

R161
1

1

2

1

2
2
B
3

E

1

1U_0603_10V4Z

R163

2

HP_JD

26

HPR

26

HPL

26

W=10mils
D8
RB751V_SOD323

R165
10K_0402_5%
2

47K_0402_5%

HP_JD

2

560_0402_5%

0_0402_5%
1
2
@

1

SB Beep

R164
1

R215

MONO_IN

2

HP_OUTR

1 R157

BLM15AG121SN1D_L0402_2P
2 HP_R 1
2
L16
75_0603_1%

HP_OUTL

1 R158

2 HP_L 1
75_0603_1%
L17

2

HDA_SPKR

1

HDA_SPKR

12

C158
1
2

0_0402_5%
1
2

1U_0603_10V4Z
1
2
Q13
R162
2SC2411K_SC59 2.4K_0402_5%

C

47K_0402_5%

HP_JD

C155

560_0402_5%

1U_0603_10V4Z

3

R147
2

BEEP#

R160

1

27

EC Beep

C154
1
2

BEEP#

W=10mils

HPR
HPL

2
BLM15AG121SN1D_L0402_2P
2

2

C156
470P_0402_50V7K_X7R
1

1

C157
470P_0402_50V7K_X7R

1

C160
@

1

HDA_BITCLK_AUDIO
2
C161
@

1

10P_0402_50V8J

@

HDA_SDOUT_AUDIO
2

10P_0402_50V8J

2
C159

10P_0402_50V8J

Reserved for TEST
HDA_SYNC_AUDIO

1
R166
1
R167
1
R168

4

GND

2
0_0805_5%
2
0_0805_5%
2
0_0805_5%

4

AGND

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/04/26

Deciphered Date

2010/05/28

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Title

HD AUDIO CODEC ALC269
Size
C
Date:

Document Number

Rev
0.1

LA-7531P
Sheet

Sunday, April 10, 2011
E

29

of

45

5

4

3

2

1

LA-7531P Power Sequence 2011/04/10
PCH_PWR_EN#

16

2

V

A1

121 116

K19
D4
K10
F6
A15

6

95

SYSON

7

PLT_RST#

F7

V

13

15

UC1
7407

BE45

CPU
B46

C

D44

V

U12
+5VS

7
8
SUSP#,SUSP

V

PU8,+VCCP
1.05V
8a

U18
+3VS

B

U9
+1.5VS

NMOS PQ39 or
PJP8
+V1.05S_VCCP
+1.0V~1.05V
For Chief River

14

VTTPWRGOOD

PU11
+VCCSA
(+V0.85V)

10

B

SA_PGOOD

V

8b

V

UH3

+1.5VP (1.35V ,
1.5V) PU9

V

V

SUSP#,SUSP

PCH_PWROK

SA_PGOOD

H_CPUPWRGD

AU10

SYSON

8

8b

UC2

PM_DRAM_PWRGD

SYSON#
SUSP#,SUSP

10

SM_DRAMPWROK

PCH_PWROK

108 86

B12

12

SYS_PWROK
11

V

114

PCH
,UH1

PCH_PWROK 10

VGATE

B6

ON/OFF

5

PBTN_OUT#

6
PM_SLP_S3#
127 PM_SLP_S4#
14 PM_SLP_S5#
36 PM_SLP_SUS#

V

A4

4

B20

117

EC_ON

M22

14

V V

112

G3

SYS_PWROK

V

B7

PCH_RSMRST#

100

M10

VV

A5

PCH_APWROK

107

A21

V

U5
EC

V

V

51ON#

C

PCH_DPWROK

21

PQ4

V

PCH_RSMRST(NC)

2

B4

V

B3

2

V V

V V
B2

B+

B7

V V

B1

A5

+3VALW
+5VALW

V V

BATT

PU4

V

B+

B5

VV

A3

A2

V

V V

PU1

BQ24725

BATT
MODE

+3V_PCH
+5V_PCH

3

VIN

V

AC
MODE

D

U15,+3V_PCH
QH3,+5V_PCH

VV

13

V

PLT_RST#

D

PU10
+0.75VSP

9

V

VR_ON

PU5
+1.8VS

V

V

For PCH 1.5V

PU17,+1.5VS, (Support DDR3L
Function)
G971-120
For Chief River

PU13
+CPU_CORE,
+VGFX_CORE

A

A

Compal Secret Data

Security Classification
Issued Date

2010/04/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
Power Sequence

Size Document Number
Custom
Date:

LA-7531P

Sunday, April 10, 2011

Sheet

1

Rev
0.1
30

of

45

D

E

+5VALW

+5VALW
2

C

+3VALW TO +3VALW(PCH AUX Power)

5VS_GATE

2

SUSP

Q14A
DMN66D0LDW-7_SOT363-6

1

3

C179
0.1U_0603_25V7K

1

3

S

1

1
2

2

D
U14
2N7002H_SOT23-3

R178
10K_0402_5%

S

2

2

1

1

2
G

9,27,37,38,39 SUSP#

2
1

10mil
R181 2

U13
2N7002H_SOT23-3

2
G

R177
100K_0402_5%

2

R179
470_0603_5%

D

U16
2 PCH_PWR_EN#
2N7002H_SOT23-3
G

1 200K_0402_5% 3V_GATE
3

S
1
PCH_PWR_EN#

D

3

1
4

Q14B
DMN66D0LDW-7_SOT363-6

1

20mil
+VSB

2

5

U15
SI4800BDY-T1-GE3_SO8
8
1
7
2
6
3
5

SYSON

27,38,39,40 SYSON

40mil

SUSP

SUSP

1

10U_0603_6.3V6M

1

2

2

4

C176

5,40
D

1

2
R176
470_0603_5%
1

2

1

JUMP_43X79

6

4

SUSP

2

1

C178
1U_0603_10V4Z

2
1
R180
20K_0402_5%

+VSB

1
1

SYSON#

@

C177
10U_0603_6.3V6M

10mil

+3V_PCH
J1

C173
1U_0603_10V4Z

2

+3VALW

+5VS

C172
10U_0805_10V4Z

20mil

1

C175
10U_0805_10V4Z

2

C174
10U_0805_10V4Z

1

U12
SI4800BDY-T1-GE3_SO8
8
1
7
2
6
3
5

1

+5VALW
1

R175
100K_0402_5%
1

R174
100K_0402_5%

Short J1 for PCH VCCSUS3.3

3

+5VALW TO +5VS

1

B

2

A

S

C180
U17
0.1U_0603_25V7K
2N7002H_SOT23-3 2

2
G

+VCCP

+1.5V
2

1

+1.8VS

2

+0.75VS

2

2

2

R182
22_0603_5%

R184
470_0603_5%

@ R185
470_0603_5%

S

1 1

1 1

D
2 SUSP
G
Q16
2N7002E-T1-GE3_SOT23-3

S

D
2 SUSP
G
Q17
S
2N7002E-T1-GE3_SOT23-3

2 SYSON#
G
@ Q18
2N7002E-T1-GE3_SOT23-3

3

3

S

D
2 SUSP
G
Q15
2N7002E-T1-GE3_SOT23-3

3

D

3

1

1 1

2

R183
470_0603_5%

+3VALW TO +3VS

ACIN

2

2
Q19
2
G

2
PCH_PWR_EN#

18 PCH_PWR_EN#

SUSP
2N7002_SOT23-3

S

2

D

S

Q21

2
G

27 PCH_PWR_EN

R192
100K_0402_5%

D

2N7002E-T1-GE3_SOT23-3

2
G
3

ACIN

1

3

S

C53
0.1U_0603_25V7K

2

1

Q22

2
G

2N7002H_SOT23-3
14,27,35

@

D

R211
510K_0402_5%

SUSP

D
1

1

1.5VS_GATE

R189
100K_0402_5%

1

10mil

2
1
R77
20K_0402_5%

1

+VSB

1

20mil

R187
470_0603_5%

1

S

2

3

+5VALW

3

2

1

1

1

3

2
1
1

20mil

2

3

4
1
3

SUSP

2

1

C190
10U_0603_6.3V6M

1
C191
0.1U_0603_25V7K
U21
2N7002H_SOT23-3
2

2
G

2

1

C187
1U_0603_10V4Z

S

U20
2N7002H_SOT23-3

1

U9
SI4800BDY-T1-GE3_SO8
8
1
7
2
6
3
5

C188
0.1U_0402_16V4Z

2
G

2
D

3VS_GATE
D

1

C189
0.1U_0402_16V4Z

10mil

2

+1.5V TO +1.5VS
+1.5VS

R186
470_0603_5%

C186
10U_0603_6.3V6M

SUSP

2

1

C185
10U_0603_6.3V6M

R188
47K_0402_5%
2
1

1

C184
1U_0603_10V4Z

+VSB

2

+1.5V

C183
10U_0603_6.3V6M

20mil

1

C182
10U_0603_6.3V6M

2
3

C181
10U_0603_6.3V6M

1

+3VS

U18
SI4800BDY-T1-GE3_SO8
8
1
7
2
6
3
5

4

+3VALW

S

@ Q23
2N7002E-T1-GE3_SOT23-3

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2010/04/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Title

DC Interface
Size Document Number
Custom
Date:

LA-7531P

Sunday, April 10, 2011

Sheet

E

Rev
0.1
31

of

45

5

4

3

2

Version Change List ( P. I. R. List )
Item Page#
1

Title

xx

xxx

Date
2011/02/XX

Request
Owner

Page 1

Issue Description

XXXX

1

Solution Description

XXXX

Rev.

XXXX

Rev01

D

D

C

C

B

B

2

A

A

Compal Secret Data

Security Classification
Issued Date

2010/04/26

2010/05/28

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
EE P.I.R (1)

Size Document Number
Custom
Date:

LA-7531P

Tuesday, March 15, 2011

Sheet

1

Rev
0.1
32

of

45

5

4

3

ADPIN

PQ1
TP0610K-T1-E3_SOT23-3

PR1
1K_1206_5%
1
2

VIN

PD1
2

1

3

B+

1

1

2

1

470K_0402_5%

PR4
2

PR6
1K_1206_5%
1
2

470K_0402_5%

PR3
1
2

PR5
1K_1206_5%
1
2

PC4
1000P_0402_50V7K
2
1

PR7
470K_0402_5%

PreCHG

27

PQ2
DTC115EUA_SC70-3

PD2

ACOFF

1 2

1

SINGA_2DW-0005-B03_4P

PC3
100P_0402_50V8J
2
1

2

1

+ 1
JDCIN1
Part Number = DC301000AY00

D

PR2
1K_1206_5%
1
2

2

1000P_0402_50V7K

2
1

3

PC2

+

1

LL4148_LL34-2
1

2

4

PC1
100P_0402_50V8J

-

VIN
PL1
SMB3025500YA_2P

CONN@
SINGA_2DW-0005-B03
D

2

PQ3
DTC115EUA_SC70-3

2
1

+5VALW

2

3
2

3

3

RB715F_SOT323-3

2

VIN

PD3
LL4148_LL34-2
PD4
LL4148_LL34-2
2
1
Pre-V

1

PR9
1

BATT+

C

1

C

PR8

68_1206_5%

28

51ON#

PQ4
TP0610K-T1-E3_SOT23-3
1

3

2

1

32.7
PC6
0.1U_0603_25V7K

2

0.22U_0603_25V7K

PR11
22K_0402_1%
1
2

2

PR10
100K_0402_5%

PC5
2
1

1

Pre-V

VS

2

2

68_1206_5%

+COINCELL

PD5
PR13
RB715F_SOT323-3
200_0603_5%
2
CHGRTCP 1
2
1
3

B

1

RTCVREF
PU1

+CHGRTC

1

PR12
560_0603_5%
1
2

+RTCBATT
B

VIN
BATT+

@ MAXEL_ML1220T10
Part Number = SP093MX0000

PR14
200_0603_5%

RTC Battery

2

VOUT

VIN
GND

PC7

1
10U_0603_6.3V6M

2CHGRTCIN
1

3

2

COIN RTC Battery

2

APL5156-33DI-TRL_SOT89-3

2

3.3V
1

PR15
560_0603_5%
1
2

+

JRTC1

PC8
1U_0805_25V6K


A

A

Compal Secret Data

Security Classification
Issued Date

2009/12/01

2010/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PWR-DCIN / Vin Detector

Size Document Number
Custom

Rev
0.1

LA-7531P

Date:

Sunday, April 10, 2011

Sheet
1

33

of

45

5

4

3

2

1

D

D

BATT+

PL2
SMB3025500YA_2P
1
2

BATT++

PH3 under CPU botten side :
CPU thermal protection at 90 degree C
Recovery at 50 degree C

PR16
BI

1

2

Part Number = SP02000I400
ACES_88231-14001

+3VALW

PR17
1K_0402_1%

1

1

1

VL

2

+3VALW

PR19
6.49K_0402_1%
2BATT_TEMP

BATT_TEMP 27
PC12
.1U_0402_16V7K
1

VCC TMSNS1

8

2

GND RHYST1

7

3

OT1 TMSNS2

6

OT2 RHYST2

5

C

PR22
9.53K_0402_1%
@

PU2

1

PR20
1K_0402_5%

1

2

1

PR21@
10K_0402_1%

2

Place clsoe to EC pin

PR18
20.5K_0402_1%
@

1

1

@PC11
@
PC11
.1U_0402_16V7K

2

GND 16
GND 15
14 14
13 13
12 12
11 11
10 10
9 9
8 8
7 7
6 6
5 5
4 4
3 3
2 2
1 1
PJPB1

1

2

PR23
1 100_0402_5%
2

PJPB1 battery connector

EC_SMB_CK1 27,35
EC_SMB_DA1 27,35

4

PR24
100_0402_5%

PH1 @
100K_0402_1%_NCP15WF104F03RC
2

C

2

@ 100K_0402_1%

2

2

PC9
0.01U_0402_25V7K

1

2

1

1

Battery Connect/OTP

PC10
1000P_0402_50V7K

2

BATT+

BATT++

G718TM1U_SOT23-8
@

36

MAINPWON

MAINPWON

PQ5
TP0610K-T1-E3_SOT23-3

1

D

3

S

2

2

1
2

@ PC14
0.1U_0603_25V7K
B

PQ6
2N7002W-T/R7_SOT323-3

2
G
1

SPOK

PC15
0.1U_0402_16V7K

1
36

PR28
0_0402_5%
1
2

@

+VSB

2

PR27
22K_0402_1%
1
2

PR26
100K_0402_1%

PC13
0.22U_1206_25V7K

B

2
1
PR25
100K_0402_1%

2

+5VALW

1

1

3

B+

@

A

A

Compal Secret Data

Security Classification
Issued Date

2009/12/01

2010/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PWR-BATTERY CONN

Size Document Number
Custom

Rev
0.1

LA-7531P

Date:

Sunday, April 10, 2011

Sheet
1

34

of

45

A

B

C

D

1

D

3

for reverse input protection

S

PQ7
SI1304BDL-T1-E3_SC70-3

2
G

PJP22
2

1

@

PR30
3M_0402_5%

P2

B+

BQ24725_ACDRV

4

ACDRV

SRN

12

SRN 1

5

ACOK

BATDRV

11

1

PR34
0_0402_5%

1

PC38
0.01U_0402_50V7K

2

1

PC36
2200P_0402_50V7K

2

PC35
10U_0805_25V6K

2

1

PC34
10U_0805_25V6K

1
2

CSON1
1

PC37
0.1U_0402_25V6

2

CSOP1
1
2

PC39
0.1U_0402_25V6

1

PR43
4.7_1206_5%

2
1

5

ILIM

3

@

+3VALW

3

1
2

PR50
100K_0402_1%

PC42
0.01U_0402_25V7K

10

9

8

2
2

PR53
100_0402_1%

1

PR54
66.5K_0402_1%

1

PC41
0.1U_0603_25V7K

2

1

2
PR49
280K_0402_1%

EC_SMB_CK1 27,34

EC_SMB_DA1 27,34

2

Max.

PC43
0.1U_0402_25V6

Typ
17.33V
16.98V

2

Min.

1

Vin Dectector
H-->L
L--> H

SDA

IOUT
7

2
2

1

PR51
255K_0402_1%
1
2

PD9
RB751V-40_SOD323-2

1

VIN

For KB930 --> Keep PR46
For KB9012 (Red square) --> Remove PR46
Keep PR47

6

PreCHG
EE Modify

PR52
154K_0402_1%

ACIN

2
PR47
@ 1M_0402_1%
1
2
PR48
10K_0402_1%

2 CSON1
PR45
12_0603_5%
BQ24725_BATDRV

PC40
680P_0402_50V7K

13

PR44
15_0603_5%
2 CSOP1

@

2

3
2
1

SRP

SCL

CMSRC

ACDET

3

SRP 1

1

1

+3VLP
14,27,31

BQ24725_CMSRC

PL4
PR42
10UH_FDSD0630-H-100M-P3_3.8A_20% 0.01_1206_1%
BQ24725_LX
1
2 CHG
1
4
PQ12
SIS412DN-T1-GE3_POWERPAK8-5

14

4

3
2
1

GND

DL_CHG

1

17

18

19

20

16

15

BQ24725RGRR_VQFN20_3P5X3P5

3

2

BATT+

PC32
1
2

LODRV

2

4

2

ACP

PC27
0.01U_0402_50V7K

5
DH_CHG
PD8
RB751V-40_SOD323-2

2

1

PR39
10_0603_5%

BQ24725_BST 2

PQ11
SIS412DN-T1-GE3_POWERPAK8-5

REGN

2

BTST

ACN

HIDRV

PAD

1

PHASE

21

VCC

PU3

2

2

DH_CHG

1U_0603_25V6K

@

PR35
4.12K_0603_1%

1U_0603_25V6K

+3VALW

1
BQ24725_BATDRV 1

0.047U_0402_25V7K
PC30

PC31
1
2

PR46
10K_0402_1%
1
2

4

PD7
BAS40CW_SOT323-3

1

1
2
3

2

@

8
7
6
5

PC24
2200P_0402_50V7K

PC23
0.1U_0402_25V6
2
1

1

PC22
10U_0805_25V6K
2
1

2

1

PC21
10U_0805_25V6K

2

PC20
10U_0805_25V6K

1

@

2

1
2
2

PC19
10U_0805_25V6K

VIN

PC25
0.1U_0402_25V6
1
2

PC29
0.1U_0603_25V7K
2
1

2011/03/18
delete VIN voltage
detecting circuit

3

BQ24725_ACN

2

@

PR38
10_1206_1%

PC18
10U_0805_25V6K
2
1

2

4

2

PQ10
AO4474L_SO8

BQ24725_LX

1

1

8
7
6
5

PR37
4.12K_0603_1%

1

PC16
0.1U_0402_25V6

2
2

1

2

1
2
3

PR36
4.12K_0603_1%
2
1

1

PR33
0_0402_5%

1
2
3


PR32
0.02_2512_1%
2
1
4

3

PQ9
AO4466L_SO8

4

PC26
2200P_0402_50V7K
2
1

1

1

P1

@

1

PL3
0.56UH_1127AS-R56N_3.3A_30%

PQ8
AO4474L_SO8
8
7
6
5

1

1

VIN

2

JUMP_43X118

2

PR29
1M_0402_5%

2

PC28
0.1U_0402_25V6
2
1

1

BQ24725_ACP

2

PC17
10U_0805_25V6K

1

ILIM and external DPM
4.36A

2

1

ADP_I

27

PC44
0.1U_0402_16V7K

4

4

Compal Secret Data

Security Classification

Issued Date

2009/01/23

Deciphered Date

2010/01/23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

Title

Compal Electronics, Inc.
PWR-CHARGER

Size

Document Number

Rev
0.1

LA-7531P
Date:

Sunday, April 10, 2011

Sheet
D

35

of

45

A

B

C

D

E

1

2VREF_6182

1

5

1
2

3
2
1

AON7702L_DFN8-5
1
2

1
2
1

B++
2

1

PC59
1U_0603_10V6K
2
1

2

ENTRIP2
3

PC60
4.7U_0805_10V6K

5VALWP
TDC 6.1A
Peak Current 8.8A
OCP current 10.5A

PC61
0.1U_0603_25V7K

2VREF_6182

+5VALWP

1
+
2

2011/03/18
Change Cout from D2
type to B2 type
(PC56/PC55)

3

2011/03/18
Change Low side
MOSFET from SO-8 to
DFN8-5 (PQ15/PQ16)

4

SSM6N7002FU-2N_SOT363-6

2

PC56
220U_B2_2.5VM_R15M

VL

VL

PJP3
1

+5VALWP

2

+5VALW

(5A,180mils ,Via NO.= 9)

+3VALW

(4A,120mils ,Via NO.= 6)

PAD-OPEN 4x4m
PJP4
1

2
PAD-OPEN 4x4m

2
1

2011/03/18
Delete one jump for 3/5 V ourput
PQ18
PDTC115EU_SOT323-3

4

3

PC62
4.7U_0603_6.3V6K

1

2

Compal Secret Data

Security Classification

2007/08/02

Issued Date

For KB930 --> Keep PD8, PR53, PR52, Remove PR76
For KB9012 (Red square) --> Remove PD8, PR53, PR52
Keep PR76
A

18

VIN

VREG5
17

16

GND

EN
13

3
2
1

1
2
3

ENTRIP1

5

1

VS

PQ16

2

2

2

PR73
316K_0402_1%
2
1

SPOK 34
EE Modify

4

@

PC58
680P_0603_50V7K

LG_5V

PR64
4.7_1206_5%
2
1

LGATE1

SNUB_5V

LX_5V

19

5

20

LGATE2

PC51
4.7U_0805_25V6-K

ENTRIP1

PHASE1

PR65
499K_0402_1%
2

@ PR66
0_0402_5%
MAINPWON 1

PR68
100K_0402_5%

2
1
PR72
402K_0402_1%

VIN

1

PHASE2

12

PQ17B

PD11
PR71
LL4148_LL34-2
1M_0402_1%
2
1 1
2

4

ENTRIP1

11

PL7
3.3UH_ETQP3W3R3WFN_7A_20%
1
2

NC

21

+3VALWP

MAINPWON

PR62
BST_5V 1
2
2.2_0603_5%
UG_5V

2

PC54
0.22U_0603_16V7K
BST1_5V 1
2

@

1

34

2

22

4

RT8205LZQW(2) WQFN 24P PWM

N_3_5V_001

2

SSM6N7002FU-2N_SOT363-6

PR70
0_0402_5%
MAINPWON
1

3

BOOT1

PQ14
AON7408L_DFN8-5

AON7702L_DFN8-5

PQ17A

27,28 EC_ON

FB1

BOOT2

3

@ PR69
0_0402_5%
1

REF

4

FB2

PGOOD

SKIPSEL

1

5

1

VREG3

23

RLZ5.1B_LL34

6

2

3.3VALWP
TDC 6A
Peak Current 8.6A
OCP current 10.3A

2

PR67
200K_0402_1%

@

1

24

4

1

2

B+

VO1

VO2

UGATE1

PQ15
PD10

SNUB_3V

+

PR60
140K_0402_1%
2

UGATE2

LG_3V

2

1

9

B++

UG_3V 10

LX_3V

@

PC57
680P_0603_50V7K

+3VALWP

PR63
4.7_1206_5%

PL6
3.3UH_ETQP3W3R3WFN_7A_20%
1
2

BST_3V

8

15

1
2
3

PC53
0.22U_0603_16V7K
PR61
BST1_3V 1
1
2
2
2.2_0603_5%

PR58
20K_0402_1%
2

1

TONSEL

P PAD

2

25
7

2

PC55
220U_B2_2.5VM_R15M

ENTRIP2

1

PU4

PC52
10U_0805_6.3V6M

4

2

6

PQ13
AON7408L_DFN8-5

ENTRIP2

5

1
2

PC48
4.7U_0805_25V6-K

PC47
2200P_0402_50V7K
2
1

PC46
0.1U_0402_25V6
2
1

PR59
140K_0402_1%
1

FB_5V 1

5

+3VLP

2

FB_3V

PR56
30.9K_0402_1%
2

PC50
2200P_0402_50V7K
2
1

PR57
20K_0402_1%
1
2

PL5
HCB2012KF-121T50_0805
1

1

14

B++

B+

2

PC49
0.1U_0402_25V6
2
1

PR55
13.7K_0402_1%
1

1

2

PC45
1U_0603_16V6K

2008/08/02

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

C

D

Title

Compal Electronics, Inc.
PWR-3VALWP/5VALWP

Size Document Number
Custom
LA-7531P
Date:

Rev
0.1

Sunday, April 10, 2011

Sheet
E

36

of

45

A

B

C

D

1

PC63
680P_0603_50V7K

PJP6
1

+1.8VSP

2

+1.8VS

PAD-OPEN 3x3m

2

SNUB_1.8VSP

1

2

1

1

PR74
4.7_1206_5%

(2A, 80mils, Via NO.= 4)

1
@

2

2

1

@
PR77
47K_0402_5%

SY8033BDBC_DFN10_3X3

PR78
10K_0402_1%

1
2

2

NC

TP

@
PC67
22U_0805_6.3VAM

PR76 0_0402_5%

7

EN_1.8VSP

6

+1.8VSP

 VFB=0.6V
Vo=VFB*(1+PR401/PR402)=0.6*(1+20K/10K)=1.8V

2

2

2

11

1

PC68
0.1U_0402_10V7K

SUSP#

1

9,27,31,38,39 SUSP#

EN

PR75
20K_0402_1%

1.8VSP_FB

2

FB

5

2

3

1

SVIN

LX

PC66
22U_0805_6.3VAM

8

2

PC65
22P_0402_50V8J
2
1

PVIN

LX

1

PVIN

9

NC

1

PC64
22U_0805_6.3VAM

10

2

SM01000BW00

PL9
1UH_PH041H-1R0MS_3.8A_20%
1
2

1.8VSP_LX

1

2

HCB1608KF-121T30_0603

PG

1

1.8VSP_VIN

4

PU5

PL8

+5VALW

+3VALW
2011/03/09
Reserve 1.5V for DDR3L application

DDR3L@
PC1079
1U_0402_6.3V6K

PJP21 @

2

+1.5VSP

DDR3L@
PU17
G971ADJF11U SO 8P

FB

2

+1.5VSP

1

FB=0.8V

DDR3L@
PR267
1.54K_0402_1%

1

EN
POK

3
4

DDR3L@

PC221
22U_0805_6.3V6M

DDR3L@
PC223
0.022U_0402_25V7K

 VFB=0.8V
Vo=VFB*(1+PR401/PR402)=0.8*(1+K/K)=1.5V

DDR3L@ PR269
0_0402_5%
1
2

2

PR270
22K_0402_5%
@
2

2

PC222
1U_0402_6.3V6K

(2A, 80mils, Via NO.= 4)

DDR3L@
PR268
6.04K_0402_1%

1

@

1

SUSP#

1

1

2

8
7

VOUT
VOUT

1

DDR3L@
PC224
4.7U_0603_6.3V6K

VCNTL
VIN
VIN

+1.5VS
3

2

1

6
5
9

GND

3

2
PAD-OPEN 3x3m

2

2011/03/23
Delete jump for layout space

1

2

1

+1.8VS

Ien=10uA, Vth=0.3V, notice
the res. and pull high
voltage from HW
4

4

LA-7531P

Compal Secret Data

Security Classification

Issued Date

2009/01/23

Deciphered Date

2010/01/23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

Title

Compal Electronics, Inc.
PWR-1.8VSP

Size

Document Number

Rev
0.1

LA-7531P
Date:

Sheet

Sunday, April 10, 2011
D

37

of

45

5

4

3

2

1

2011/03/15
Change Cout to D2 type
Change PQ26 to TPCA8059(Rds-on)
2011/03/18
Change Cout from D2 type to B2
typt
2011/03/22
delete input jump

D

D

+5VALW

@
PR205

2

2

49.9K_0402_1%

1

PC70
1U_0402_6.3V6K

4

EN VCC

6

2

GNDDRV

5

3

FB POK

4

3
2
1

1

1

9,27,31,37,39 SUSP#

PU16

1
2

2

PC226
4.7U_0805_6.3V6K

1

FB=0.8V

@
PQ39
TPCA8059-H_PPAK56-8-5

27,31,39,40 SYSON

PC71
4.7U_0805_6.3V6K
1
2

5

PR40
0_0402_5%
1
2

PC227
4.7U_0805_6.3V6K

+V1.05SP

Imax=6.2A
Ipeak=8.8A
ESR=14 mohm

+V1.05S_VCCPP

APL5610CI-TRG_SOT23-6

Vo=0.8(1+Rt/Rb)= V
Pd=W

C

PC69

1

47P_0402_50V8J

C

2
1
+

1

2
2

4.7K_0402_1%

1

2

PR204

PC225
220U_B2_2.5VM_R15M

PR147
0_0402_5%

2

1

PR207
29.4K_0402_1%

@ PJP7
2 2
1

+V1.05S_VCCPP

VCCIO_SENSE 8,39

1

JUMP_43X118

1

2

VSS_SENSE_VCCIO 8,39

10_0402_5%
PR85

+VCCP

@ PJP8
2 2
1

Height=75 mil,1.9mm

1

+V1.05S_VCCP

JUMP_43X118
B

B

1
+

2

PC73
330U_D2_2V_Y

2011/03/23
Reserve VCCIO sense for chief rever

1
+

PC72 @
330U_B2_2.5VM_R15M

2

2011/03/18
Change PR72 form D2 type to B2 type.
need to take care the ESR differentia

A

A

Compal Secret Data

Security Classification

Issued Date

2010/07/20

Deciphered Date

2011/07/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PWR-V1.05S_VCCP

Size Document Number
Custom
Date:

Rev
0.1

LA-7531P

Sunday, April 10, 2011

Sheet
1

38

of

45

5

4

3

2

1

@ PJP9
2 2
1

+V1.05SP_B+

1

B+

TRIP

DRVH

9

UG_+V1.05SP

EN_+V1.05SP

3

EN

SW

8

SW_+V1.05SP

V5IN

7

+V1.05SP_5V

DRVL

6

LG_+V1.05SP

FB_+V1.05SP

4

VFB

RF_+V1.05SP

5

RF

27,31,38,40 SYSON

+5VALW
1

PR31
0_0402_5%
1
2

TP

11

TPS51212DSCR_SON10_3X3

PC91
1U_0603_6.3V6M

4

1

1

PC89
4.7U_0805_25V6-K

+V1.05SP

2

VSS_SENSE_VCCIO 8,38

@
PR101
4.7_1206_5%
@
PC94
1000P_0603_50V7K

1
+

2

2

1

2

C

PR102
470K_0402_1%

2

@
PC93
0.1U_0402_16V7K

3
2
1

1

@

2

PL13
1UH_ETQP3W1R0WFN_11.8A_20%
1
2

PC92
220U_B2_2.5VM_R15M

2

1

TRIP_+V1.05SP

2

10

1

VBST

2

9,27,31,37,38 SUSP#

BST_+V1.05SP

PGOOD

PQ23
TPCA8059-H_PPAK56-8-5

PR100
0_0402_5%
1
2

PU8

1

D

5

1
2 PR99
49.9K_0402_1%

PR98
1
2
2.2_0603_5%

4

3
2
1

2

EE Modify
41 VTTPWRGOOD

PC90
0.22U_0603_16V7K
1
2

PC88
4.7U_0805_25V6-K
2
1

1
PR203
10K_0402_5%

PC87
2200P_0402_50V7K
2
1

+3VS

D

PQ22
TPCA8065-H_PPAK56-8-5

5

PC86
0.1U_0402_25V6
2
1

JUMP_43X118

C

10_0402_5%
PR84

PR103
PR117
0_0402_5%
1
2

2

4.99K_0402_1%
2
1

+V1.05SP
TDC 7.9A
Peak Current 11.3A
OCP current 13.5A

PJP10
PR104
10K_0402_1%

2

1

@

+V1.05SP

2

1

1

JUMP_43X118
PJP11

2
@

2

1

1

VCCIO_SENSE 8,38

+VCCP

JUMP_43X118

B

B

A

A

Compal Secret Data

Security Classification

Issued Date

2010/07/20

Deciphered Date

2011/07/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PWR-V1.05SP

Size Document Number
Custom
Date:

Rev
0.1

LA-7531P

Sunday, April 10, 2011

Sheet
1

39

of

45

5

4

3

2

1

@ PJP12
2 2
1

+1.5VP_B+

1

B+

PU9

VBST

10

TRIP_+1.5VP

2

TRIP

DRVH

9

UG_+1.5VP

EN_+1.5VP

3

EN

SW

8

SW_+1.5VP

FB_+1.5VP

4

VFB

V5IN

7

RF_+1.5VP

5

RF

DRVL

6

TPS51212DSCR_SON10_3X3

PC100
1U_0603_6.3V6M

PC98
10U_0805_25V6K

PC97
10U_0805_25V6K
2
1

2

1

PC96
2200P_0402_50V7K
2
1

1
+

PC101
220U_B2_2.5VM_R15M

2

1

@
PC103
1000P_0603_50V7K

+1.5VP
TDC 16A
Peak Current 23A
OCP current 27A

2

3
2
1

2

4

@

2

11
2

1

1

TP
PR109
470K_0402_1%

2

@
PC102
0.1U_0402_16V7K

+1.5VP

PR108
4.7_1206_5%

1

+5VALW

LG_+1.5VP

1

27,31,38,39 SYSON

PL14
1UH_ETQP3W1R0WFN_11.8A_20%
1
2

PQ25
TPCA8059-H_PPAK56-8-5

PR107
0_0402_5%
1
2

3
2
1

PGOOD

D

5

1
2
100K_0402_1%

4

BST_+1.5VP

1
PR106

PC99
0.22U_0603_16V7K
1
2

PR105
1
2
2.2_0603_5%

PQ24
TPCA8065-H_PPAK56-8-5

5

D

PC95
0.1U_0402_25V6
2
1

JUMP_43X118

C

PR110
11.5K_0402_1%
2
1

C

PJP13

2

@

2

PR111
71.5K_0402_1%

+1.5V

1

2
@

2011/03/18
Delete one jump
2011/03/22
Change Cout type from
D2 to B2

2

1

+1.5V

1

JUMP_43X118

DDR3L_EN 16

2011/03/23
Delete jump for layout space

@

PU10

PR115
100K_0402_5%

VIN

2

GND

VCNTL

6

NC

5

+3VALW

VREF

NC

7

B

4

VOUT

NC

8

TP

9

PC106
1U_0603_10V6K

2

PR116
1K_0402_1%

3

2

PC105
4.7U_0805_6.3V6K

1

1

1

PC104

1

@

.01U_0402_16V7K
1
2

S

2

1
1
2
G
3

PQ27

DDR3L@

PR114 DDR3L@
0_0402_5%
2
1

D

2

B

SSM3K7002FU_SC70-3

1

2

PR113
10K_0402_1%

1

PJP14

+1.5VP

PR112
100K_0402_5%

2

JUMP_43X118

1

DDR3L@

@

2

1

+3VS

APL5336KAI-TRL SOP

2

1

0.75VS_N_002

PR118
1K_0402_1%

2
G

2

SUSP

3

5,31

D

S

1

0_0402_5%

PC108
10U_0805_6.3V6M

2

@
PC109
0.1U_0402_10V7K

+0.75VSP
1

PQ28
SSM3K7002FU_SC70-3
PR119

1

EE Modify

2

Vo = 1.5V (DDR3)
Vo = 1.35V (DDR3L)

1

DDR3L_EN = "High" ,
DDR3L_EN = "Low" ,

2
1
PC107
0.1U_0402_16V7K

VREF_APL5336

PJP17

+0.75VSP

A

1

2

(2A,80mils ,Via NO.= 4)

+0.75VS

A

PAD-OPEN 3x3m

Compal Secret Data

Security Classification

Issued Date

2010/07/20

Deciphered Date

2011/07/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PWR-1.5VP/0.75VSP

Size Document Number
Custom
Date:

Rev
0.1

LA-7531P

Sunday, April 10, 2011

Sheet
1

40

of

45

5

4

3

2

1

VID [0]
0
0
1
1

+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 7.2A

VID[1]
0
1
0
1

VCCSA Vout
0.9V
0.8V
0.725V
0.675V

output voltage adjustable network

D

@ PJP18
2 2
1

+VCCSA_B+

1

D

B+

PR120

3

EN

FB_+VCCSA

4

VFB

RF_+VCCSA

5

RF

10

DRVH

9

UG_+VCCSA

SW

8

SW_+VCCSA

V5IN

7

DRVL

6

+5VALW

LG_+VCCSA

TPS51212DSCR_SON10_3X3

2

TP

1

PC115
1U_0603_6.3V6M

4

3
2
1

1

@
PC117
0.1U_0402_16V7K

11

2

EE Modify

PC113
4.7U_0805_25V6-K

1
2

PC112
4.7U_0805_25V6-K
2
1

PL15
1UH_ETQP3W1R0WFN_11.8A_20%
1
2

1

39 VTTPWRGOOD

TRIP

EN_+VCCSA

BST_+VCCSA

VBST

+VCCSAP

@

C

PR123
4.7_1206_5%
@
PC118
1000P_0603_50V7K

1
+

2011/03/18
Change Cout from
D2 type to B2
typt

2

2

2

PR124
470K_0402_1%

PC116
220U_B2_2.5VM_R15M

PR122
0_0402_5%
1
2

PGOOD

2

1

C

1

TRIP_+VCCSA

5

1 PR121 2
49.9K_0402_1%

2

27 SA_PGOOD

1
2
2.2_0603_5%

PU11

4

1

PR202
0_0402_5%
1
2

PC114
0.22U_0603_16V7K
1
2

3
2
1

2

PR201
10K_0402_1%

PQ30
TPCA8059-H_PPAK56-8-5

EE Modify

PQ29
TPCA8065-H_PPAK56-8-5

1

5

PC110
0.1U_0402_25V6
2
1

+3VS

PC111
2200P_0402_50V7K
2
1

JUMP_43X118

PR125
4.99K_0402_1%
2
1

+3VS
1
PR127
10K_0402_1%

PJP19

2

PR126
30.1K_0402_1%
1
2

2

PR128
10K_0402_1%

@

2

1

6

GVID0-2

2

2

PR130
10K_0402_5%
@

2

1

+VCCSA

1

+V1.05SP
TDC 7.9A
Peak Current 11.3A
OCP current 13.5A
B

JUMP_43X118

SSM6N7002FU-2N_SOT363-6

PR131
24K_0402_1%

PC119
0.022U_0402_16V7K

+3VS
1

GVID1-2

2

3

PR132
10K_0402_1%

5

2

2

SSM6N7002FU-2N_SOT363-6
4

PR134
10K_0402_5%
@

PQ31B
2
1
PR133
10K_0402_1%

1

VCCSA_VID1
1

9

JUMP_43X118
PJP20

2
@

2

1

2

1

2
1
PR129
10K_0402_1%

1

1

VCCSA_VID0
1

9

+VCCSAP

PQ31A

1

B

2

PC120
0.022U_0402_16V7K

A

A

Compal Secret Data

Security Classification
Issued Date

2010/07/20

Deciphered Date

2011/07/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PWR-VCC_SAP

Size
C
Date:

Document Number

Rev
0.1

LA-7531P
Sunday, April 10, 2011

Sheet
1

41

of

45

4

3

PQ32
P5103EMG_SOT23-3

2

1

SW

IFB6

0.1U_0603_50V7K

13
IFB5

14

15
EN

16

1

PGND

2

SW

3

VBAT

GND

10

VO

IFB3

9

IFB4

12

DCTRL

11

FB4

23

FB3

23

DCTRL

IFB2
8

IFB1

B

0.1U_0402_10V7K

7

CIN
6
62K_0402_1%
PC135
2
1

ISET
5
PC134
2
1

0.1U_0402_10V7K
PR142
2
1

PC132

100P_0402_50V8J

1

+LG_VOUT 4

2

PR141

1U_0805_50V7K

1

PC131

PC133
2
1

B

10K_0402_1%

2

DISPOFF#

C

TPS61181ARTER_QFN16_3X3
EN
100P_0402_50V8J

23

PR140
2
1M_0402_1%
2
1

1

FAULT

TPAD

PU12

17

EN

51_1206_5%

PR139

2

PC130

C

1

1

1K_0402_1%

0.015U_0603_50V7K

INVTPWM

PR138
DCTRL

100K_0402_1%
2

23

PR137
2

1

1

2

2

PC129

PC126
2
1

2.2U_1206_50V7K

PC125 @
2
1

2.2U_1206_50V7K

PR136

PC124
2
1

SR24_SMA2
2.2U_1206_50V7K

2

@
@P

+LG_VOUT

PD12
SW

PC123
2
1

1

1
2

2

2

100K_0402_5%

PR135

1

1
2

1
2

0.1U_0603_50V7K

1

PC128

2

@

PC127
2.2U_1206_25V7K

PD13

G

PC121

100P_0402_50V8J

INVPWR_B+

1

10_1206_1%
1

D

S

3

1

D

4.7UH_MMD-06BD-4R7M-X2L_5A_20%
PL16
1
2

LL4148_LL34-2

D

1 2

2011/03/23
Delete jump for layout space

2

PC122
C122
2.2U_1206_50V7K

5

1

FB2

23

FB1

23

2
PR143
0_0603_5%

2011/03/22
Change AGND name to GNDA_P

AGND

PGND

A

A

Compal Secret Data

Security Classification
Issued Date

2010/07/20

Deciphered Date

2011/07/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PWR-Panel Driver IC

Size
B
Date:

Document Number

Rev
0.1

LA-7531P
Sunday, April 10, 2011

Sheet
1

42

of

45

5

4

3

2

1

GFX@ PC139
10U_0805_25V6K

1
2

GFX@ PC138
4.7U_0805_25V6-K
2
1

2

1

GFX@ PC137
4.7U_0805_25V6-K

2
1

1

1

UGATE1

22

UGATE1

BOOT1

21

BOOT1

1
2

ISPG

2
1

PC166
4.7U_0805_25V6-K
2
1

5

2

2
1

CPU_B+

PQ35
FDMS7696A_POWER56-8-5
UGATE1

1
1
+

2

2
B+
PL18
FBMA-L11-322513-151LMA50T_1210

PL19
0.36UH_PCMC104T-R36MN1R17_30A_20%
4
1

1
2
1

PC177
PR180
680P_0603_50V7K 4.7_1206_5%

2

PQ38
TPCA8057-H_PPAK56-8-5

5
4

3
2
1

3
2
1

PR184
2.61K_0402_1%

PQ36
TPCA8057-H_PPAK56-8-5

5
1

PC171
0.22U_0603_10V7K
LGATE1
4

1
PR187
11K_0402_1%
1
2

PR179
2.2_0603_5%
BOOT1 2
1 2

3

+CPU_CORE

2
B

VSUM+1
ISEN1
VSUM-

PR186
3.65K_0402_1%
2
10K_0402_1%
1 PR188 2
PR190

1

PR191

2

2

1_0402_5%

VSUM-

1

ISEN2

10K_0402_1%

PC178
.1U_0402_16V7K

+CPU_CORE
Iocp=40A, IccMAX=28A
Load line=1.9mohm
DCR=1.1mohm

5

+GFX_CORE
Iocp=20A, IccMAX=13A
Load line=3.9mohm
DCR=1.1mohm

2

1
2

PC183
0.01U_0402_50V7K

PR194
10_0402_1%

8

VSSSENSE

8

1

@
VCCSENSE

+CPU_CORE

A

330P_0402_50V7K
PC182
2
1

10_0402_1%
1
2

PR193

2

1

@

C

3
2
1

4

PH5
10K_0402_1%_ERTJ0EG103FA

2

PC176
0.022U_0402_16V7K
2
1

1
2

PC175
0.22U_0402_10V6K
2
1

2

PR183
3.32K_0402_1%

@

VSUM+

PR185
1.47K_0402_1%
2
1

2

Connect to +5V can disable
GFX portion

EMI request for ISN issue (1/7)
0.22U_0603_25V7K
PC158

PC165
1U_0603_10V6K

1

0_0402_5%

2011/03/21
delete jump between B+ and GFX_B+
for layout placement-->connect
GFX_B+ to CPU_B+

2011/03/18
reserve two
low side
MOSFET

PR170
2.2_0603_5%

2

1

@ PR167

1

VIN

ISNG

2

+5VS

PC167
4.7U_0805_25V6-K
2
1

PHASE1

2

2

1
3
2
1

1

23

PC148
330U_X_2VM_R6M

GFX@ PR164
953_0402_1%

PC163
33U_D_25VM_R60M

LGATEG

31

2
24

20

VDD
19

ISUMP
18

ISUMN
17

LGATE1
PHASE1

1
PR166
0_0402_5%

1

2

1

2
LGATE1

PC154
GFX@ 0.068U_0402_16V7K

1

PHASEG

32
PHASEG

1
25

2
26

PC155
1U_0603_10V6K

PC169
10U_0805_25V6K

UGATEG

33

LGATEG

VCCP
PWM3

GFX@ PR155
1_0402_5%

2

BOOTG

34
BOOTG

NTCG

ISUMNG

ISUMPG

UGATEG

27

GFX@

GFX@ PC152
.1U_0402_16V7K
1
2

CPU_B+

330P_0402_50V7K

1

1

PC172
470P_0402_50V8J

28

LGATE2

D

+

GFX@ PR157 GFX@ PH2
7.5K_0402_1% 10K_0402_1%_ERTJ0EG103FA
1
2 1
2
GFX@ PC151
.1U_0402_16V7K
1
2
1
2
GFX@ PR161
11K_0402_1%
1
2

PHASE1

VSUM-

2

PHASE2

+5VS

FB

1

29

+VGFX_CORE

2

PC168
4.7U_0805_25V6-K
2
1

NTCG

35

38

39
12
FB

1
PR192
0_0402_5%

PC173
PR182
1000P_0402_50V7K 887_0402_1%

2K_0402_1%
@ PR181
2 1
2

UGATE2

PR174
1_0603_5%

2

+5VS

RTN

VW

16

10

ISEN1

NTC

15

VR_HOT#

9

ISEN1

8

PR189 PC174
100_0402_1%
2
1

2
1
PC170
47P_0402_50V8J

1
1

PC164
680P_0402_50V7K

comp

30

0.22U_0402_6.3V6K 2
PC162

PGOOD

ISEN2

7

14

VR_ON

COMP
1
2
2
PR177
20.5K_0402_1%
1
2

2-ph: PR172=20.5K Vboot=0V, Iccmax=54A
2-ph: PR172=169K Vboot=1.1V, Iccmax=54A

RTNG

FBG

ISL95835HRTZ-T_TQFN40_5X5


6

PC160
1000P_0402_50V7K

1
PR173
8.06K_0402_1%

267K_0402_1%
PR178
2
1 2

2
1

SCLK

GFX@ 27.4K_0402_1%
PR169

PR172
GFX@ 3.83K_0402_1%

GFX@ 470KB_0402_5%_ERTJ0EV474J
PH3
2
1
2
1

5

ISEN2

1
2

PC157

47P_0402_50V8J

NTC

ALERT#

ISEN3/ FB2

0_0402_5%

4

13

2

BOOT2

ISEN3

PR168

SDA

FB

1

VR_ON

PJP23

GFX@ PR154
3.65K_0402_1%

PR162
0_0603_5%

1

8 VR_SVID_CLK

PGOODG

3

11

2

8 VR_SVID_ALRT#

27

CPU_B+

PAD-OPEN 3x3m

1
3

2

ISNG

36

4

2

ISPG

LGATEG

1

BOOTG 2

+5VS

VWG

2

PC159 10P_0402_50V8J
2
1comp

1

1

1

GFX_CORE_PWRGD

PC156
.1U_0402_16V7K

COMPG

PAD

PR158
GFX@ 1.91K_0402_1%

27

8 VR_SVID_DAT

1

1.91K_0402_1%
PR165
1
2

2
1

GFX@ PC147
0.22U_0603_10V7K
1 2
1

2
2
2

PR159
54.9_0402_1%

+3VS

PR171

2
1
27.4K_0402_1%

40

PU13

PR160
130_0402_1%

1

2

@ PC153
.1U_0402_16V7K

PR175
3.83K_0402_1%

470KB_0402_5%_ERTJ0EV474J
PH4
2
1
2

PHASEG

1

+3VS

VR_HOT#

1

2

GFX@ PR152
2.2_0603_5%

GFX@ 8.06K_0402_1%
PR156

1

GFX@ PL17
0.36UH_PCMC104T-R36MN1R17_30A_20%
4
1
PC150
PR153
680P_0603_50V7K 4.7_1206_5%

GFX@ PC144
0.01U_0402_50V7K

GFX@ PC146
1000P_0402_50V7K
2
1

NTCG

B

4

VSS_AXG_SENSE 9

1

VGATE

C

1

37

2

Add 1.0u for sequence control (1/17)

27

UGATEG

VCC_AXG_SENSE 9

2

GFX@ PR148 GFX@ 330P_0402_50V7K
475K_0402_1%
PC143

+V1.05S_VCCP

14,27

GFX@ PR145
10_0402_1%

2

EMI request for ISN issue (1/7)
2

0.1U_0402_16V4Z

PR163
@ 499_0402_1%

FDMS7696A_POWER56-8-5

+VGFX_CORE

GFX@ PQ34
TPCA8057-H_PPAK56-8-5

2

1

GFX@ PC136
4.7U_0805_25V6-K

PR149
GFX@ 422_0402_1%
1
2
1

41

PR150
294K_0402_1%
2
1

1

2

@
PC141
330P_0402_50V7K
1
2

GFX@ PR151
10_0402_1%

GFX_CORE_PWRGD

2

2

GFX@ PC142
150P_0402_50V8J

PC149

1

1

PR146
GFX@ 2.55K_0402_1%
2
1

3
2
1

PC140
GFX@ 39P_0402_50V7K
2
1

5

@ 1K_0402_1%

2

PR144

1

PQ33

2
PC145
1
2

@ 330P_0402_50V7K

D

5

GFX_B+

A

Compal Secret Data

Security Classification
Issued Date

2009/01/23

2010/01/23

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

3

2

Title

Compal Electronics, Inc.
PWR-CPU_CORE/GFX

Size

Document Number

Rev
0.1

LA-7531P
Date:

Sunday, April 10, 2011

Sheet
1

43

of

45

5

4

3

2

+CPU_CORE

1

+VCCSA

+CPU_CORE
+VCCSA

2

+
PC205

2

2

1
+
PC206

2

2

1
D

2

330U_D2_2VM_R6M

PC204

1

330U_D2_2VM_R6M

+

330U_D2_2VM_R6M

1

2

1

2

1

PC203
22U_0805_6.3V6M

2

1

PC202
22U_0805_6.3V6M

2

1

PC201
22U_0805_6.3V6M

1

PC200
22U_0805_6.3V6M

2

PC199
22U_0805_6.3V6M

PC198
22U_0805_6.3V6M

2

1

2

1

10U_0603_6.3V6M
PC197

2
1

2

1

10U_0603_6.3V6M
PC196

PC192 +
330U_D2_2V_Y

1

10U_0603_6.3V6M
PC195

1

10U_0603_6.3V6M
PC194

2

+VCCSA
10U_0603_6.3V6M
PC193

2

1

PC191
22U_0805_6.3V6M

2

1

PC190
22U_0805_6.3V6M

2

1

PC189
22U_0805_6.3V6M

1

PC188
22U_0805_6.3V6M

2

PC187
22U_0805_6.3V6M

2

D

1

PC186
22U_0805_6.3V6M

1

C

C

+VGFX_CORE
+VGFX_CORE

2

2

B

UMA@
PC220
10U_0603_10V6M

1

2

UMA@
PC214
22U_0805_6.3V6M

2

1

UMA@
PC219
10U_0603_10V6M

1

2

UMA@
PC213
22U_0805_6.3V6M

2

1

UMA@
PC218
10U_0603_10V6M

1

2

UMA@
PC212
22U_0805_6.3V6M

2

1

UMA@
PC217
10U_0603_10V6M

2

1

2

UMA@
PC211
22U_0805_6.3V6M

1

2

1

UMA@
PC216
10U_0603_10V6M

2

1

UMA@
PC210
22U_0805_6.3V6M

1

2

UMA@
PC215
10U_0603_10V6M

2

+

UMA@
PC209
22U_0805_6.3V6M

1

B

1

PC208
470U_D2_2VM_R4.5M

+

PC207
470U_D2_2VM_R4.5M

1

A

A

Compal Secret Data

Security Classification

2008/09/15

Issued Date

Deciphered Date

2009/09/15

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PWR - PROCESSOR DECOUPLING

Size

Document Number

Rev
0.1

LA-7531P
Date:

Monday, April 04, 2011

Sheet
1

44

of

45

5

4

3

2

Version Change List ( P. I. R. List )
Item Page#

Title

Date

Request
Owner

1

Page 1

Issue Description

Solution Description

Rev.

D

D

C

C

B

B

A

A

Compal Secret Data

Security Classification

2008/09/15

Issued Date

2009/09/15

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Compal Electronics, Inc.
PWR - PIR

Size

Document Number

Rev
0.1

LA-7531P
Date:

Monday, April 04, 2011

Sheet
1

45

of

45

www.s-manuals.com



---

Source Exif Data:

File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.6
Linearized                      : No
XMP Toolkit                     : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39
Create Date                     : 2011:04:10 23:05:30Z
Creator Tool                    : PScript5.dll Version 5.2.2
Modify Date                     : 2014:04:14 22:54:08+03:00
Metadata Date                   : 2014:04:14 22:54:08+03:00
Format                          : application/pdf
Creator                         : 
Title                           : Compal LA-7531P - Schematics. www.s-manuals.com.
Subject                         : Compal LA-7531P - Schematics. www.s-manuals.com.
Producer                        : GPL Ghostscript 8.15
Document ID                     : uuid:0585de95-d5fe-4f5a-a0f3-c21177dc12c5
Instance ID                     : uuid:62ba74d4-7431-4226-b372-16cec5a0c7c4
Page Count                      : 46
Keywords                        : Compal, LA-7531P, -, Schematics., www.s-manuals.com.

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