Compal LA 7741P Schematics. Www.s Manuals.com. R0.1 Schematics
User Manual: Motherboard Compal LA-7741P QAL70, Dalmore 13 UMA - Schematics. Free.
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Page Count: 57

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Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Cover Sheet
1 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Cover Sheet
1 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Cover Sheet
1 56Thursday, June 23, 2011
Compal Electronics, Inc.
BOM P/N :
PCB NO :
COMPAL CONFIDENTIAL
MODEL NAME :
Dalmore 13 UMA
REV : 0.1 (X00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
@ : Nopop Component
QAL70
2011-06-23
1@
2@
MB Type
TPM EN/ TCM DIS
TPM DIS/ TCM EN
BOM P/N
TPM DIS/ TCM DIS 2@
3@
3@
4@
CONN@ : Connector Component
GPIO MAP:
Ivy Bridge + Panther POINT
@
LA-7741P(DAB00000800)
4619EO31L01 TPM ;4519EO31L02 TPM/TAA
Rev0.9
TAA @TAA
SPI ON BOARD @SPI
Part Number Description
DA80000I700 PCB 0FH LA-6562P REV0 M/B UMA
MB PCB
Part Number Description
DA80000I700 PCB 0FH LA-6562P REV0 M/B UMA
MB PCB

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Title
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Date: Sheet of
LA-7741
0.1
UMA Block Diagram
2 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
UMA Block Diagram
2 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
UMA Block Diagram
2 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
USB 2.0 Port
Block Diagram
USB2.0 [3,8]
SATA5
DOCK LAN
DAI
DOCKING PORT
VGA
VGA
LVDS
PI3V713-AZLEX
Video Switch
CRT CONN
1333/1600 MHz
USB5USB4
100MHz
33MHz
W25Q32BVSSIG
64M 4K sector
100MHz
PCI Express BUS
USB3.0/2.0
USB3.0/2.0+PS
on IO board
On IO board
PCIE4
LVDS CONN
PCI Express BUS
PCIE x1
HD Audio I/F
WWAN
Combo Jack RJ45
S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
1/2 Mini Card
WiFi ON/OFF
PCH XDP Port
CPU XDP Port
DC/DC Interface
Memory BUS (DDR3)
LED
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
DDRIII-DIMM X2
KB CONN
LPC BUS
1/2 Mini Card
TP CONN
BCM5882
USH
Smart Card
Lane x 8
FDI
RFID
16M 4K sector
HDD
SATA Repeater
Parade PS8520B
USB7
E-Module
Dig.
MIC
Trough LVDS Cable
INT.Speaker
ECE5048
PCIE1PCIE3
China TCM1.2
Lane x 4
USB6
PCIE5
92HD90B3
HDA Codec
USB10
Trough Cable
Camera
USB
LAN SWITCH
PI3L720
82579LM
Intel Lewisville
SATA Repeater
PS8511B
PCIE2
TDA8034HN
SSX44B
SATA
E-SATA
SATA
EXPRESS
Card
BT 4.0
Option
SDXC/MMC
OZ600FJ0LN
Card Reader
SPI
To Docking side
SMSC SIO
BGA 2C 1023P
INTEL
DMI2
Ivy Bridge
BGA 989P
Panther POINT-M
BC BUS
Fingerprint
CONN
DAI
DOCK LAN
FP_USB
SMSC KBC
MEC5055
Full Mini Card
WLAN/WiFi
HDMI CONN
DPC
DPD
DPB
For MB/DOCK
VGA
PI5USB1457A USB
Power Share
USB3.0
USB3.0
USB3.0 [4]
W25Q64BVSSIG
PP
FFS LNG3DM
USH Module
Discrete TPM
AT97SC3204
USB3.0
PS8710B USB3.0
Repeater
PWM FAN
BC BUS
SMSC
4021

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Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Index and Config.
3 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Index and Config.
3 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Index and Config.
3 56Thursday, June 23, 2011
Compal Electronics, Inc.
PM TABLE
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
MINI CARD-2 WLAN
PCI EXPRESS
Lane 1
DESTINATION
Lane 2
Lane 3
Lane 4
MINI CARD-1 WWAN
POWER STATES
Lane 5
Lane 6
Express card
MMI
+3.3V_M +3.3V_M
(M-OFF)
ON
ON
ON
ON
OFF
OFF
OFFOFF
+3.3V_SUS
+5V_ALW
+5V_RUN
+3.3V_ALW_PCH
+1.5V_MEM
S0
S3
S5 S4/AC don't exist
ON
power
plane
S5 S4/AC
State
OFFON
ON
ON
ON ON
OFF
OFF
OFF
OFFOFF
+15V_ALW
+3.3V_RTC_LDO
+1.05V_M
E3 Module Bay (USB3)
WLAN
WWAN
DOCKING8
9
USH->BIO
10 Express card
11
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
JESATA1 ( right side)
PCH
Lane 7
Lane 8 None
10/100/1G LOM
12
13
+1.05V_M
+1.8V_RUN
+1.05V_RUN_VTT
+3.3V_RUN
+0.75V_DDR_VTT
+1.5V_RUN
+VCC_CORE
+1.05V_RUN
1/2vMINI CARD-3 PCIE
HDD
NA
ODD/ E3 Module Bay
SATA
SATA 0
DESTINATION
NA
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
ESATA
Dock
0
1
BIO
NA
USH
need to update Power Status and PM
Table
MLK DOCK
JMINI3(PP)
JUSB1 (Right side )
JUSB2 (Rear Left side)
Camera
Bluetooth
Dock DP port 2
UMA DP/HDMI Port
Port C
Connetion
Port D
Port B
Dock DP port 1
MB HDMI Conn
OFF
OFF
OFF
LOW
LOW
OFF
OFF
S0 (Full ON) / M0
SLP
S3#
SLP
S5#
HIGH
Signal
State
SLP
S4#
HIGH HIGH
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
PLANE
RUN
PLANE
CLOCKS
ON ON ON
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
SLP
A#
HIGH
HIGH
LOW HIGH HIGH
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
S4 (Suspend to DISK) / M-OFF HIGH
NA
NA

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Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Power Rail
4 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Power Rail
4 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Power Rail
4 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Pop option
+1.0V_LAN
BATTERY
+PWR_SRC
ADAPTER
FDC654P +BL_PWR_SRC
EN_INVPWR
SI3456BDVSI3456BDV
HDDC_EN
+5V_MOD
MODC_EN
CHARGER
+3.3V_ALW
RT8205LZQW
+15V_ALW
+5V_ALW
ALWON
SI3456
+3.3V_LAN+3.3V_SUS
RUN_ON
RUN_ON
+3.3V_RUN
+5V_HDD
Q21
(Q30)(Q27)
(PU2)
(Q34)
+5V_RUN
TPS22966DPUR
(U78)
+VCC_CORE
MAX17511
(PU9)
+1.5V_MEM +0.75V_DDR_VTT
DDR_ON
0.75V_DDR_VTT_ON
RT8207MZQW
(PU16)
+1.05V_RUN_VTT +1.05V_M
SIO_SLP_A#
SUS_ON
S13456
(Q54)
1.05V_0.8V_PWROK
SI3456
+3.3V_M
(Q58)
M_ON
+3.3V_ALW_PCH
PCH_ALW_ON
SI3456
(Q49)
+1.5V_RUN
RUN_ON
NTGS4141N
(Q59)
AUX_ON
+1.8V_RUN
RUN_ON
(PU15)
+3.3V_WLAN
SI3456
(Q38)
AUX_EN_WOWL
SI4164
(Q63)
+1.05V_RUN
(PU7)
RUN_ON
+3.3V_M
Pop option
CPU_VTT_ON
AO4728
(QC3)
+1.5V_CPU_VDDQ
CPU1.5V_S3_GATE
SY8033BDBC SN1003055
(PU17)
TPS51212DSCR
TPS51461RGER
1.05V_VTTPWRGD
(PU13)
+VCC_SA
RT8207MZQW
(PU16) TPS22966DPUR
(U78)

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Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
SMBUS TOPOLOGY
5 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
SMBUS TOPOLOGY
5 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
SMBUS TOPOLOGY
5 56Thursday, June 23, 2011
Compal Electronics, Inc.
MEC 5065
MEM_SMBDATA
MEM_SMBCLK
KBC
C9
H14
+3.3V_ALW_PCH
2.2K
2.2K
200 DIMMA
SMBUS Address [A4]
202
DIMMB
SMBUS Address [A0]
200
202
C8
G12
+3.3V_LAN
2.2K
2.2K
LAN_SMBCLK
LAN_SMBDATA
+3.3V_ALW
129
127
SMBUS Address
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT DOCKING
2.2K
B4
A3
1A
1A
A4
B5
2.2K
2.2K
LCD_SMBCLK
LCD_SMBDAT
1B
1B
1C
1C
B59
A56
+3.3V_ALW
2.2K
2.2K
100 ohm
100 ohm BATTERY
CONN
7
6SMBUS Address [0x16]
PBAT_SMBCLK
PBAT_SMBDAT
3A
1E
1E
2B
2B
B50
1G
1G
A47
B7
A7
+3.3V_ALW
2.2K
2.2K
2D
2D
30
29
BAY_SMBDAT
BAY_SMBCLK E3 Module Bay SMBUS Address [0xd2]
A49
B52
CARD_SMBCLK
CARD_SMBDAT
+3.3V_SUS
2.2K
2.2K
SMBUS Address [C8]
LOM
CHARGER_SMBCLK
CHARGER_SMBDAT
Charger SMBUS Address [0x12]
SML1_SMBDATA
PCH
SML1_SMBCLK
E14M16
A50
B53
3A
B6A5
+3.3V_ALW_PCH
2.2K
2.2K
USH
+3.3V_ALW
USH_SMBCLK
USH_SMBDAT
+3.3V_ALW
2.2K
2.2K
53
51 SMBUS Address [TBD]
XDP1
SMBUS Address [TBD]
XDP2
53
51
M9
L9 SMBUS Address [0xa4]
10
9
31
28
G Sensor SMBUS Address [3B]
2N7002
2N7002
+3.3V_RUN
2.2K
2.2K
14
13
2.2K
2.2K
Express card
7
8SMBUS Address [TBD]
APR_EC: 0x48
SPR_EC: 0x70
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
SMBUS Address [0x9a] @
@
+3.3V_ALW
WWAN SMBUS Address [TBD]
32
30

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4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CTX_PRX_N0
DMI_CRX_PTX_N2
DMI_CTX_PRX_P2
DMI_CTX_PRX_P1
DMI_CRX_PTX_N0
DMI_CRX_PTX_P0
DMI_CRX_PTX_N3
DMI_CTX_PRX_N3
DMI_CRX_PTX_P3
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_N1
DMI_CRX_PTX_N1
DMI_CTX_PRX_N2
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N6
FDI_CTX_PRX_N5
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P5
FDI_CTX_PRX_P4
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_INT
FDI_LSYNC1
FDI_CTX_PRX_N0
PEG_COMP
EDP_COMP
EDP_COMP
TP_G48
+1.05V_RUN_VTT
+1.05V_RUN_VTT
DMI_CRX_PTX_P0<16>
DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P1<16>
DMI_CRX_PTX_N1<16>
DMI_CRX_PTX_P3<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_P2<16>
DMI_CRX_PTX_N0<16>
DMI_CTX_PRX_N0<16>
DMI_CTX_PRX_N1<16>
DMI_CTX_PRX_N2<16>
DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P0<16>
DMI_CTX_PRX_P1<16>
DMI_CTX_PRX_P2<16>
DMI_CTX_PRX_P3<16>
FDI_CTX_PRX_N1<16>
FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N4<16>
FDI_CTX_PRX_N3<16>
FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N7<16>
FDI_CTX_PRX_N6<16>
FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_P2<16>
FDI_CTX_PRX_P1<16>
FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P5<16>
FDI_CTX_PRX_P4<16>
FDI_CTX_PRX_P3<16>
FDI_FSYNC0<16>
FDI_LSYNC0<16>
FDI_CTX_PRX_P7<16>
FDI_CTX_PRX_P6<16>
FDI_LSYNC1<16>
FDI_FSYNC1<16>
FDI_INT<16>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (1/6)
6 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (1/6)
6 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (1/6)
6 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PEG Compensation
PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms
(1)PEG_RCOMPO (G4) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
eDP Compensation
(1) EDP_COMPIO use 4mil trace to RC1
(2) EDP_ICOMPO use 12mil to RC1
T23
PAD~D
@
T23
PAD~D
@
PCI EXPRESS -- GRAPHICS
DMI Intel(R) FDI eDP
U1A
IVY-BRIDGE_BGA1023~D
PCI EXPRESS -- GRAPHICS
DMI Intel(R) FDI eDP
U1A
IVY-BRIDGE_BGA1023~D
DMI_RX#[0]
M2
DMI_RX#[1]
P6
DMI_RX#[2]
P1
DMI_RX#[3]
P10
DMI_RX[0]
N3
DMI_RX[1]
P7
DMI_RX[2]
P3
DMI_RX[3]
P11
DMI_TX#[0]
K1
DMI_TX#[1]
M8
DMI_TX#[2]
N4
DMI_TX#[3]
R2
DMI_TX[0]
K3
DMI_TX[1]
M7
DMI_TX[3]
T3 DMI_TX[2]
P4
FDI0_TX#[0]
U7
FDI0_TX#[1]
W11
FDI0_TX#[2]
W1
FDI0_TX#[3]
AA6
FDI1_TX#[0]
W6
FDI1_TX#[1]
V4
FDI1_TX#[2]
Y2
FDI1_TX#[3]
AC9
FDI0_TX[0]
U6
FDI0_TX[1]
W10
FDI0_TX[2]
W3
FDI0_TX[3]
AA7
FDI1_TX[0]
W7
FDI1_TX[1]
T4
FDI1_TX[2]
AA3
FDI1_TX[3]
AC8
FDI0_FSYNC
AA11
FDI1_FSYNC
AC12
FDI_INT
U11
FDI0_LSYNC
AA10
FDI1_LSYNC
AG8
PEG_ICOMPI G3
PEG_ICOMPO G1
PEG_RCOMPO G4
PEG_RX#[0] H22
PEG_RX#[1] J21
PEG_RX#[2] B22
PEG_RX#[3] D21
PEG_RX#[4] A19
PEG_RX#[5] D17
PEG_RX#[6] B14
PEG_RX#[7] D13
PEG_RX#[8] A11
PEG_RX#[9] B10
PEG_RX#[10] G8
PEG_RX#[11] A8
PEG_RX#[12] B6
PEG_RX#[13] H8
PEG_RX#[14] E5
PEG_RX#[15] K7
PEG_RX[0] K22
PEG_RX[1] K19
PEG_RX[2] C21
PEG_RX[3] D19
PEG_RX[4] C19
PEG_RX[5] D16
PEG_RX[6] C13
PEG_RX[7] D12
PEG_RX[8] C11
PEG_RX[9] C9
PEG_RX[10] F8
PEG_RX[11] C8
PEG_RX[12] C5
PEG_RX[13] H6
PEG_RX[14] F6
PEG_RX[15] K6
PEG_TX#[0] G22
PEG_TX#[1] C23
PEG_TX#[2] D23
PEG_TX#[3] F21
PEG_TX#[4] H19
PEG_TX#[5] C17
PEG_TX#[6] K15
PEG_TX#[7] F17
PEG_TX#[8] F14
PEG_TX#[9] A15
PEG_TX#[10] J14
PEG_TX#[11] H13
PEG_TX#[12] M10
PEG_TX#[13] F10
PEG_TX#[14] D9
PEG_TX#[15] J4
PEG_TX[0] F22
PEG_TX[1] A23
PEG_TX[2] D24
PEG_TX[3] E21
PEG_TX[4] G19
PEG_TX[5] B18
PEG_TX[6] K17
PEG_TX[7] G17
PEG_TX[8] E14
PEG_TX[9] C15
PEG_TX[10] K13
PEG_TX[11] G13
PEG_TX[12] K10
PEG_TX[13] G10
PEG_TX[14] D8
PEG_TX[15] K4
eDP_AUX
AF4 eDP_AUX#
AG4
eDP_TX[0]
AC1
eDP_TX[1]
AA4
eDP_TX[2]
AE10
eDP_TX[3]
AE6
eDP_COMPIO
AF3
eDP_HPD#
AG11 eDP_ICOMPO
AD2
eDP_TX#[0]
AC3
eDP_TX#[1]
AC4
eDP_TX#[2]
AE11
eDP_TX#[3]
AE7
RC1
24.9_0402_1%~D
RC1
24.9_0402_1%~D
12
VSS
NCTF
U1I
IVY-BRIDGE_BGA1023~D
VSS
NCTF
U1I
IVY-BRIDGE_BGA1023~D
VSS[181]
BG17
VSS[182]
BG21
VSS[183]
BG24
VSS[184]
BG28
VSS[185]
BG37
VSS[186]
BG41
VSS[187]
BG45
VSS[188]
BG49
VSS[189]
BG53
VSS[190]
BG9
VSS[191]
C29
VSS[192]
C35
VSS[193]
C40
VSS[194]
D10
VSS[195]
D14
VSS[196]
D18
VSS[197]
D22
VSS[198]
D26
VSS[199]
D29
VSS[200]
D35
VSS[201]
D4
VSS[202]
D40
VSS[203]
D43
VSS[204]
D46
VSS[205]
D50
VSS[206]
D54
VSS[207]
D58
VSS[208]
D6
VSS[209]
E25
VSS[210]
E29
VSS[211]
E3
VSS[212]
E35
VSS[213]
E40
VSS[214]
F13
VSS[215]
F15
VSS[216]
F19
VSS[217]
F29
VSS[218]
F35
VSS[219]
F40
VSS[220]
F55
VSS[221]
G51
VSS[222]
G6
VSS[223]
G61
VSS[224]
H10
VSS[225]
H14
VSS[226]
H17
VSS[227]
H21
VSS[228]
H4
VSS[229]
H53
VSS[230]
H58
VSS[231]
J1
VSS[232]
J49
VSS[233]
J55
VSS[234]
K11
VSS[235]
K21
VSS[236]
K51
VSS[237]
K8
VSS[238]
L16
VSS[239]
L20
VSS[240]
L22
VSS[241]
L26
VSS[242]
L30
VSS[243]
L34
VSS[244]
L38
VSS[245]
L43
VSS[246]
L48
VSS[268] P14
VSS[269] P16
VSS[270] P18
VSS[271] P21
VSS[272] P58
VSS[273] P59
VSS[274] P9
VSS[275] R17
VSS[276] R20
VSS[277] R4
VSS[278] R46
VSS[279] T1
VSS[280] T47
VSS[281] T50
VSS[282] T51
VSS[283] T52
VSS[284] T53
VSS[285] T55
VSS[286] T56
VSS[287] U13
VSS[288] U8
VSS[289] V20
VSS[290] V61
VSS_NCTF_1 A5
VSS_NCTF_2 A57
VSS_NCTF_3 BC61
VSS_NCTF_4 BD3
VSS_NCTF_5 BD59
VSS_NCTF_6 BE4
VSS_NCTF_7 BE58
VSS_NCTF_8 BG5
VSS_NCTF_9 BG57
VSS_NCTF_10 C3
VSS_NCTF_11 C58
VSS_NCTF_12 D59
VSS_NCTF_13 E1
VSS_NCTF_14 E61
VSS[250] M4
VSS[251] M58
VSS[252] M6
VSS[253] N1
VSS[254] N17
VSS[255] N21
VSS[256] N25
VSS[257] N28
VSS[258] N33
VSS[259] N36
VSS[260] N40
VSS[261] N43
VSS[262] N47
VSS[263] N48
VSS[264] N51
VSS[265] N52
VSS[266] N56
VSS[267] N61
VSS[247]
L61
VSS[248]
M11
VSS[291] W13
VSS[292] W15
VSS[293] W18
VSS[294] W21
VSS[295] W46
VSS[296] W8
VSS[297] Y4
VSS[298] Y47
VSS[299] Y58
VSS[300] Y59
VSS[249]
M15
VSS[301] G48
RC2
24.9_0402_1%~D
RC2
24.9_0402_1%~D
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_HVREF_RST
VCCPWRGOOD_0_R
H_PM_SYNC
H_CATERR#
H_PROCHOT#_R
H_THERMTRIP#_R
PM_DRAM_PWRGD_CPU
VCCPWRGOOD_0_R
H_CATERR#
H_PROCHOT#
H_THERMTRIP#
CPU_DMI
CPU_DMI#
DDR3_DRAMRST#_CPU
XDP_DBRESET#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDO
XDP_TDI
XDP_PREQ#
SYS_PWROK_XDP
CLK_XDP
CLK_XDP#
CLK_XDP_ITP
CLK_XDP_ITP#
SM_RCOMP0
SM_RCOMP2
SM_RCOMP1
XDP_TDIXDP_TDI_R
XDP_TDO_R XDP_TDO
PCH_PLTRST#_R
PCH_PLTRST#_R
PCH_PLTRST#_BUF
RUNPWROK_AND PM_DRAM_PWRGD_CPU
CPU_DPLL
CPU_DPLL#
XDP_TDI_R
XDP_TDO_R
XDP_TRST#
XDP_TCLK
XDP_TMS
XDP_PRDY#
XDP_PREQ#
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
XDP_DBRESET#XDP_DBRESET#_R
XDP_TRST#
XDP_PREQ#
XDP_TDI
CFD_PWRBTN#_XDP
XDP_PRDY#
XDP_TCLK
SYS_PWROK_XDP
CLK_XDP
CLK_XDP#
XDP_DBRESET#
XDP_HOOK2
XDP_TDO
XDP_RST#_R
XDP_TMS
H_CPUPWRGD_XDPH_CPUPWRGD
BPM#6
BPM#7
CLK_XDP_ITP#
CLK_XDP_ITP
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+1.5V_CPU_VDDQ
+3.3V_ALW_PCH
+1.05V_RUN_VTT
+1.05V_RUN_VTT
XDP_DBRESET# <14,16>
DDR3_DRAMRST# <12>
H_THERMTRIP#<22>
H_CPUPWRGD<18>
H_PM_SYNC<16>
CPU_DETECT#<39>
H_PROCHOT#<40,51,53>
CLK_CPU_DMI <15>
PECI_EC<40>
CLK_CPU_ITP <15>
CLK_CPU_ITP# <15>
PCH_PLTRST#<14,17>
DDR_HVREF_RST_GATE<40>
DDR_HVREF_RST_PCH<15>
RUN_ON_CPU1.5VS3#<11,42>
RUNPWROK<39,40>
PM_DRAM_PWRGD<16>
CLK_CPU_DMI# <15>
H_SNB_IVB#<18>
DDR_HVREF_RST <12>
PLTRST_XDP#<17>
CFG0<9>
SYS_PWROK<16,39>
SIO_PWRBTN#_R<14,16>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (2/6)
7 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (2/6)
7 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (2/6)
7 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place near JXDP1
For ESD concern, please put near CPU
Avoid stub in the PWRGD path
while placing resistors RC25 & RC130
place RC129 near CPU 250mils~2530 mils
PU/PD for JTAG signals
Buffered reset to CPU
Open drain buffer
VR1 TOPOLOGY
Follow check list 0.5
M3 control
INTEL suggest RC64 and QC1 NO stuff by default
Max 500mils
SM_RCOMP2 --> 15mil
SM_RCOMP1/0 --> 20mil
place RC57 near CPU 300mils ~1530mils
T133 place near T107;T134 pleace near T127
G
D
S
QC1
SSM3K7002FU_SC70-3~D
@
G
D
S
QC1
SSM3K7002FU_SC70-3~D
@
2
13
RC47 0_0402_5%~D@RC47 0_0402_5%~D@
1 2
RH106 0_0402_5%~DRH106 0_0402_5%~D
1 2
RC42
140_0402_1%~D
RC42
140_0402_1%~D
12
RC44 62_0402_5%~DRC44 62_0402_5%~D
1 2
CC140
0.1U_0402_25V6K~D
CC140
0.1U_0402_25V6K~D
1
2
RC48 0_0402_5%~D@RC48 0_0402_5%~D@
1 2
RC128 49.9_0402_1%~D@RC128 49.9_0402_1%~D@
1 2
T129 PAD~D@T129 PAD~D@
T125 PAD~D@T125 PAD~D@
RC45
200_0402_1%~D
RC45
200_0402_1%~D
12
T127 PAD~D@T127 PAD~D@
RC35 51_0402_1%~DRC35 51_0402_1%~D
12
RH108 0_0402_5%~D@RH108 0_0402_5%~D@
1 2
RC9 0_0402_5%~D@RC9 0_0402_5%~D@
1 2
CC177
0.047U_0402_16V4Z~D
CC177
0.047U_0402_16V4Z~D
1
2
RC28 130_0402_1%~DRC28 130_0402_1%~D
1 2
RC23 0_0402_5%~DRC23 0_0402_5%~D
1 2
RC7 1K_0402_1%~DRC7 1K_0402_1%~D
1 2
JXDP1
MOLEX_52435-2671
@JXDP1
MOLEX_52435-2671
@
OBSFN_A0
1
OBSFN_A1
2
GND
3
OBSDATA_A[0]
4
OBSDATA_A[1]
5
GND
6
OBSDATA_A[2]
7
OBSDATA_A[3]
8
GND
9
HOOK0
10
HOOK1
11
HOOK2
12
HOOK3
13
HOOK4
14
HOOK5
15
VCCOBS_AB
16
HOOK6
17
HOOK7
18
GND
19
TDO
20
TRSTn
21
TDI
22
TMS
23
TCK1
24 GND 27
GND 28
GND
25
TCK0
26
RC15 0_0402_5%~DRC15 0_0402_5%~D
1 2
T134 PAD~D@T134 PAD~D@
RC124
1K_0402_1%~D
@RC124
1K_0402_1%~D
@
12
RC16 1K_0402_5%~DRC16 1K_0402_5%~D
1 2
RC40
51_0402_1%~D
RC40
51_0402_1%~D
12
RC25 0_0402_5%~DRC25 0_0402_5%~D
1 2
RC32 51_0402_1%~D@RC32 51_0402_1%~D@12
RC8 1K_0402_5%~DRC8 1K_0402_5%~D
1 2
RC64
39_0402_5%~D
@RC64
39_0402_5%~D
@
1 2
RC26 0_0402_5%~DRC26 0_0402_5%~D
12
RC12
200_0402_1%~D
RC12
200_0402_1%~D
12
T126 PAD~D@T126 PAD~D@
RC29 51_0402_1%~DRC29 51_0402_1%~D
12
RC57 56_0402_5%~DRC57 56_0402_5%~D
1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D
1 2
RC24 0_0402_5%~DRC24 0_0402_5%~D
1 2
RC46 0_0402_5%~DRC46 0_0402_5%~D
1 2
RC4
75_0402_1%~D
RC4
75_0402_1%~D
12
RC43
25.5_0402_1%~D
RC43
25.5_0402_1%~D
12
T131 PAD~D@T131 PAD~D@
T128 PAD~D@T128 PAD~D@
CC156 0.1U_0402_25V6K~DCC156 0.1U_0402_25V6K~D
1 2
RC41
51_0402_1%~D
RC41
51_0402_1%~D
12
RC130
10K_0402_5%~D
RC130
10K_0402_5%~D
12
RH107 0_0402_5%~DRH107 0_0402_5%~D
1 2
T130 PAD~D@T130 PAD~D@T133 PAD~D@T133 PAD~D@
CC65
0.1U_0402_25V6K~D
CC65
0.1U_0402_25V6K~D
1
2
RC50
4.99K_0402_1%~D
RC50
4.99K_0402_1%~D
12
RC13 0_0402_5%~DRC13 0_0402_5%~D
1 2
RC27 51_0402_1%~DRC27 51_0402_1%~D
12
UC1
SN74LVC1G07DCKR_SC70-5~D
UC1
SN74LVC1G07DCKR_SC70-5~D
NC
1
A
2
GND
3Y4
VCC 5
RC19 1K_0402_1%~DRC19 1K_0402_1%~D
12
RC17 1K_0402_5%~DRC17 1K_0402_5%~D
1 2
RC5 1K_0402_1%~DRC5 1K_0402_1%~D
1 2
G
D
S
QC2
BSS138W-7-F_SOT323-3~D
G
D
S
QC2
BSS138W-7-F_SOT323-3~D
2
13
UC2
74AHC1G09GW_TSSOP5~D
UC2
74AHC1G09GW_TSSOP5~D
B
1
A
2
G
3
O4
P5
RC126 56_0402_5%~D@RC126 56_0402_5%~D@
1 2
RC18 200_0402_1%~DRC18 200_0402_1%~D
1 2
RC129 0_0402_5%~DRC129 0_0402_5%~D
1 2
RH109 0_0402_5%~D@RH109 0_0402_5%~D@
1 2
CLOCKS
MISC THERMAL PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
U1B
IVY-BRIDGE_BGA1023~D
CLOCKS
MISC THERMAL PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
U1B
IVY-BRIDGE_BGA1023~D
SM_RCOMP[1] BE43
SM_RCOMP[2] BG43
SM_DRAMRST# AT30
SM_RCOMP[0] BF44
BCLK# H2
BCLK J3
DPLL_REF_CLK# AG1
DPLL_REF_CLK AG3
CATERR#
C49
PECI
A48
PROCHOT#
C45
THERMTRIP#
D45
SM_DRAMPWROK
BE45
RESET#
D44
PRDY# N53
PREQ# N55
TCK L56
TMS L55
TRST# J58
TDI M60
TDO L59
DBR# K58
BPM#[0] G58
BPM#[1] E55
BPM#[2] E59
BPM#[3] G55
BPM#[4] G59
BPM#[5] H60
BPM#[6] J59
BPM#[7] J61
PM_SYNC
C48
PROC_DETECT#
C57
PROC_SELECT#
F49
UNCOREPWRGOOD
B46
BCLK_ITP N59
BCLK_ITP# N58
RC6 0_0402_5%~DRC6 0_0402_5%~D
1 2
T107 PAD~D@T107 PAD~D@

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D59
DDR_A_D31
DDR_A_D9
DDR_A_BS1
DDR_A_D50
DDR_A_D42
DDR_A_D29
DDR_A_D51
DDR_A_D46
DDR_A_D36
DDR_A_D18
DDR_A_D4
DDR_A_D58
DDR_A_D55
DDR_A_D14
DDR_A_D24
DDR_A_D8
DDR_A_D63
DDR_A_D49
DDR_A_D41
DDR_A_D34
DDR_A_D28
DDR_A_D25
DDR_A_D35
DDR_A_D17
DDR_A_D13
DDR_A_D3
DDR_A_RAS#
DDR_A_D57
DDR_A_D54
DDR_A_D22
DDR_A_D21
DDR_A_D6
DDR_A_D23
DDR_A_D7
DDR_A_BS2
DDR_A_D62
DDR_A_D48
DDR_A_D40
DDR_A_D33
DDR_A_D27
DDR_A_WE#
DDR_A_D44
DDR_A_D16
DDR_A_D12
DDR_A_D2
DDR_A_CAS#
DDR_A_D56
DDR_A_D53
DDR_A_D45
DDR_A_D38
DDR_A_D20
DDR_A_D60
DDR_A_D5
DDR_A_D61
DDR_A_D47
DDR_A_D39
DDR_A_D32
DDR_A_D26
DDR_A_D10
DDR_A_D0
DDR_A_BS0
DDR_A_D43
DDR_A_D15
DDR_A_D11
DDR_A_D1
DDR_A_D52
DDR_A_D37
DDR_A_D30
DDR_A_D19
DDR_B_D29
DDR_B_RAS#
DDR_B_D59
DDR_B_D50
DDR_B_D49
DDR_B_D13
DDR_B_D11
DDR_B_D19
DDR_B_D14
DDR_B_D3
DDR_B_D55
DDR_B_D47
DDR_B_WE#
DDR_B_BS2
DDR_B_D52
DDR_B_D44
DDR_B_D41
DDR_B_D8
DDR_B_D5
DDR_B_CAS#
DDR_B_D56
DDR_B_D48
DDR_B_D38
DDR_B_D35
DDR_B_D26
DDR_B_D25
DDR_B_D4
DDR_B_D63
DDR_B_D34
DDR_B_D32
DDR_B_D10
DDR_B_BS1
DDR_B_D17
DDR_B_D51
DDR_B_D40
DDR_B_D36
DDR_B_D31
DDR_B_D21
DDR_B_D20
DDR_B_D15
DDR_B_D7
DDR_B_D62
DDR_B_D46
DDR_B_D42
DDR_B_D18
DDR_B_D12
DDR_B_D1
DDR_B_D53
DDR_B_D37
DDR_B_D22
DDR_B_D57
DDR_B_D27
DDR_B_D54
DDR_B_D45
DDR_B_D39
DDR_B_D30
DDR_B_D9
DDR_B_D60
DDR_B_D58
DDR_B_D33
DDR_B_D0
DDR_B_D61
DDR_B_D43
DDR_B_D28
DDR_B_D23
DDR_B_D24
DDR_B_D16
DDR_B_D6
DDR_B_D2
DDR_B_BS0
DDR_A_MA0
DDR_A_MA1
DDR_A_MA3
DDR_A_MA7
DDR_A_MA8
DDR_A_MA13
DDR_A_MA2
DDR_A_MA14
DDR_A_MA5
DDR_A_MA10
DDR_A_MA4
DDR_A_MA11
DDR_A_MA9
DDR_A_MA6
DDR_A_MA12
DDR_A_MA15
DDR_B_MA10
DDR_B_MA9
DDR_B_MA14
DDR_B_MA5
DDR_B_MA13
DDR_B_MA11
DDR_B_MA7
DDR_B_MA2
DDR_B_MA0
DDR_B_MA6
DDR_B_MA1
DDR_B_MA12
DDR_B_MA4
DDR_B_MA8
DDR_B_MA3
DDR_B_MA15
M_CLK_DDR#1
M_CLK_DDR#0
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
M_CLK_DDR0
DDR_CKE0_DIMMA
M_CLK_DDR1
DDR_CKE1_DIMMA
M_ODT1
M_ODT0
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_DQS#2
DDR_A_DQS#1
DDR_A_DQS#0
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS5
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS0
DDR_A_DQS6
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB
M_CLK_DDR#2
M_CLK_DDR2
DDR_CKE2_DIMMB
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_ODT2
M_ODT3
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#0
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS2
DDR_B_DQS7
DDR_B_DQS4
DDR_B_DQS1
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS0
DDR_A_D[0..63]<12>
DDR_A_BS0<12>
DDR_A_BS1<12>
DDR_A_BS2<12>
DDR_A_WE#<12>
DDR_A_CAS#<12>
DDR_A_RAS#<12>
DDR_B_D[0..63]<13>
DDR_B_BS2<13>
DDR_B_BS1<13>
DDR_B_WE#<13>
DDR_B_CAS#<13>
DDR_B_RAS#<13>
DDR_B_BS0<13>
DDR_A_MA[0..15] <12>
DDR_B_MA[0..15] <13>
M_CLK_DDR#1 <12>
M_CLK_DDR#0 <12>
DDR_CS0_DIMMA# <12>
DDR_CS1_DIMMA# <12>
M_CLK_DDR0 <12>
DDR_CKE0_DIMMA <12>
M_CLK_DDR1 <12>
DDR_CKE1_DIMMA <12>
M_ODT0 <12>
M_ODT1 <12>
DDR_A_DQS#[0..7] <12>
DDR_A_DQS[0..7] <12>
DDR_CKE3_DIMMB <13>
M_CLK_DDR#3 <13>
M_CLK_DDR3 <13>
DDR_CKE2_DIMMB <13>
M_CLK_DDR#2 <13>
M_CLK_DDR2 <13>
DDR_CS3_DIMMB# <13>
DDR_CS2_DIMMB# <13>
M_ODT3 <13>
M_ODT2 <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (3/6)
8 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (3/6)
8 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (3/6)
8 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DDR SYSTEM MEMORY B
U1D
IVY-BRIDGE_BGA1023~D
DDR SYSTEM MEMORY B
U1D
IVY-BRIDGE_BGA1023~D
SB_CK[0] BA34
SB_CK[1] BA36
SB_CK#[0] AY34
SB_CK#[1] BB36
SB_CKE[0] AR22
SB_CKE[1] BF27
SB_ODT[0] AT43
SB_ODT[1] BG47
SB_DQS[4] BE51
SB_DQS#[4] BG51
SB_DQS[5] BA61
SB_DQS#[5] BA59
SB_DQS[6] AR59
SB_DQS#[6] AT60
SB_DQS[7] AK61
SB_DQS#[7] AK59
SB_DQS[0] AM2
SB_DQS#[0] AL3
SB_DQS[1] AV1
SB_DQS#[1] AV3
SB_DQS[2] BE11
SB_DQS#[2] BG11
SB_DQS[3] BD18
SB_DQS#[3] BD17
SB_MA[0] BF32
SB_MA[1] BE33
SB_MA[2] BD33
SB_MA[3] AU30
SB_MA[4] BD30
SB_MA[5] AV30
SB_MA[6] BG30
SB_MA[7] BD29
SB_MA[8] BE30
SB_MA[9] BE28
SB_MA[10] BD43
SB_MA[11] AT28
SB_MA[12] AV28
SB_MA[13] BD46
SB_MA[14] AT26
SB_MA[15] AU22
SB_DQ[0]
AL4
SB_DQ[1]
AL1
SB_DQ[2]
AN3
SB_DQ[3]
AR4
SB_DQ[4]
AK4
SB_DQ[5]
AK3
SB_DQ[6]
AN4
SB_DQ[7]
AR1
SB_DQ[8]
AU4
SB_DQ[9]
AT2
SB_DQ[10]
AV4
SB_DQ[11]
BA4
SB_DQ[12]
AU3
SB_DQ[13]
AR3
SB_DQ[14]
AY2
SB_DQ[15]
BA3
SB_DQ[16]
BE9
SB_DQ[17]
BD9
SB_DQ[18]
BD13
SB_DQ[19]
BF12
SB_DQ[20]
BF8
SB_DQ[21]
BD10
SB_DQ[22]
BD14
SB_DQ[23]
BE13
SB_DQ[24]
BF16
SB_DQ[25]
BE17
SB_DQ[26]
BE18
SB_DQ[27]
BE21
SB_DQ[28]
BE14
SB_DQ[29]
BG14
SB_DQ[30]
BG18
SB_DQ[31]
BF19
SB_DQ[32]
BD50
SB_DQ[33]
BF48
SB_DQ[34]
BD53
SB_DQ[35]
BF52
SB_DQ[36]
BD49
SB_DQ[37]
BE49
SB_DQ[38]
BD54
SB_DQ[39]
BE53
SB_DQ[40]
BF56
SB_DQ[41]
BE57
SB_DQ[42]
BC59
SB_DQ[43]
AY60
SB_DQ[44]
BE54
SB_DQ[45]
BG54
SB_DQ[46]
BA58
SB_DQ[47]
AW59
SB_DQ[48]
AW58
SB_DQ[49]
AU58
SB_DQ[50]
AN61
SB_DQ[51]
AN59
SB_DQ[52]
AU59
SB_DQ[53]
AU61
SB_DQ[54]
AN58
SB_DQ[55]
AR58
SB_DQ[56]
AK58
SB_DQ[57]
AL58
SB_DQ[58]
AG58
SB_DQ[59]
AG59
SB_DQ[60]
AM60
SB_DQ[61]
AL59
SB_DQ[62]
AF61
SB_DQ[63]
AH60
SB_CS#[0] BE41
SB_CS#[1] BE47
SB_CAS#
AV43
SB_RAS#
BF40
SB_WE#
BD45
SB_BS[0]
BG39
SB_BS[1]
BD42
SB_BS[2]
AT22
DDR SYSTEM MEMORY A
U1C
IVY-BRIDGE_BGA1023~D
DDR SYSTEM MEMORY A
U1C
IVY-BRIDGE_BGA1023~D
SA_CK[0] AU36
SA_CK[1] AT40
SA_CK#[0] AV36
SA_CK#[1] AU40
SA_CKE[0] AY26
SA_CKE[1] BB26
SA_CS#[0] BB40
SA_CS#[1] BC41
SA_ODT[0] AY40
SA_ODT[1] BA41
SA_DQS[0] AJ11
SA_DQS#[0] AL11
SA_DQS[1] AR10
SA_DQS#[1] AR8
SA_DQS[2] AY11
SA_DQS#[2] AV11
SA_DQS[3] AU17
SA_DQS[4] AW45
SA_DQS#[4] AV45
SA_DQS[5] AV51
SA_DQS#[5] AY51
SA_DQS[6] AT56
SA_DQS#[6] AT55
SA_DQS[7] AK54
SA_DQS#[7] AK55
SA_MA[0] BG35
SA_MA[1] BB34
SA_MA[2] BE35
SA_MA[3] BD35
SA_MA[4] AT34
SA_MA[5] AU34
SA_MA[6] BB32
SA_MA[7] AT32
SA_MA[8] AY32
SA_MA[9] AV32
SA_MA[10] BE37
SA_MA[11] BA30
SA_MA[12] BC30
SA_MA[13] AW41
SA_MA[14] AY28
SA_MA[15] AU26
SA_DQ[0]
AG6
SA_DQ[1]
AJ6
SA_DQ[2]
AP11
SA_DQ[3]
AL6
SA_DQ[4]
AJ10
SA_DQ[5]
AJ8
SA_DQ[6]
AL8
SA_DQ[7]
AL7
SA_DQ[8]
AR11
SA_DQ[9]
AP6
SA_DQ[10]
AU6
SA_DQ[11]
AV9
SA_DQ[12]
AR6
SA_DQ[13]
AP8
SA_DQ[14]
AT13
SA_DQ[15]
AU13
SA_DQ[16]
BC7
SA_DQ[17]
BB7
SA_DQ[18]
BA13
SA_DQ[19]
BB11
SA_DQ[20]
BA7
SA_DQ[21]
BA9
SA_DQ[22]
BB9
SA_DQ[23]
AY13
SA_DQ[24]
AV14
SA_DQ[25]
AR14
SA_DQ[26]
AY17
SA_DQ[27]
AR19
SA_DQ[28]
BA14
SA_DQ[29]
AU14
SA_DQ[30]
BB14
SA_DQ[31]
BB17
SA_DQ[32]
BA45
SA_DQ[33]
AR43
SA_DQ[34]
AW48
SA_DQ[35]
BC48
SA_DQ[36]
BC45
SA_DQ[37]
AR45
SA_DQ[38]
AT48
SA_DQ[39]
AY48
SA_DQ[40]
BA49
SA_DQ[41]
AV49
SA_DQ[42]
BB51
SA_DQ[43]
AY53
SA_DQ[44]
BB49
SA_DQ[45]
AU49
SA_DQ[46]
BA53
SA_DQ[47]
BB55
SA_DQ[48]
BA55
SA_DQ[49]
AV56
SA_DQ[50]
AP50
SA_DQ[51]
AP53
SA_DQ[52]
AV54
SA_DQ[53]
AT54
SA_DQ[54]
AP56
SA_DQ[55]
AP52
SA_DQ[56]
AN57
SA_DQ[57]
AN53
SA_DQ[58]
AG56
SA_DQ[59]
AG53
SA_DQ[60]
AN55
SA_DQ[61]
AN52
SA_DQ[62]
AG55
SA_DQ[63]
AK56
SA_CAS#
BE39
SA_RAS#
BD39
SA_WE#
AT41
SA_BS[0]
BD37
SA_BS[1]
BF36
SA_BS[2]
BA28
SA_DQS#[3] AT17

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG4
CFG6
CFG5
CFG2
CFG7
TP_DC_TEST_BD1
DC_TEST_BE59_BE61
TP_DC_TEST_D1
TP_DC_TEST_BG58
TP_DC_TEST_BG4
DC_TEST_A59_C59
DC_TEST_C4_D3
DC_TEST_BE1_BG1
TP_DC_TEST_D61
TP_DC_TEST_A4
TP_DC_TEST_BD61
DC_TEST_BG59_BG61
TP_DC_TEST_A58
DC_TEST_BE3_BG3
DC_TEST_A61_C61
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
TP_VCC_DIESENSE
CFG0
CFG14
CFG15
CFG16
CFG17
CFG12
CFG10
CFG11
CFG13
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
VCC_VAL_SNESE
VSS_VAL_SNESE
+DIMM0_1_CA_CPU
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
+DIMM0_1_VREF_CPUVAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
VSS_VAL_SNESE
+VCC_CORE
+VCC_GFXCORE
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
CFG0<7>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (4/6)
9 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (4/6)
9 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (4/6)
9 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
PCIE Port Bifurcation Straps
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
1: (Default) PEG Train immediately
following xxRESETB de assertion
CFG4
Display Port Presence Strap
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
CFG Straps for Processor
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
0:Lane Reversed
1:(Default) Normal Operation; Lane #
definition matches socket pin map definition
EDS 1.0 RSVD_12 -> VCC_DIE_SENSE
T120 PAD~D@T120 PAD~D@
RC71
100_0402_1%~D
@RC71
100_0402_1%~D
@
12
RC123 49.9_0402_1%~D@RC123 49.9_0402_1%~D@
1 2
T19 PAD~D@T19 PAD~D@
T14 PAD~D@T14 PAD~D@
T123 PAD~D@T123 PAD~D@
RC53
1K_0402_1%~D
@RC53
1K_0402_1%~D
@
12
RC121 49.9_0402_1%~D@RC121 49.9_0402_1%~D@
1 2
T17 PAD~D@T17 PAD~D@
T18 PAD~D@T18 PAD~D@
T119 PAD~D@T119 PAD~D@
T15 PAD~D@T15 PAD~D@
RC54
1K_0402_1%~D
@RC54
1K_0402_1%~D
@
12
RC69
100_0402_1%~D
@RC69
100_0402_1%~D
@
12
T118 PAD~D@T118 PAD~D@
T12 PAD~D@T12 PAD~D@
T124 PAD~D@T124 PAD~D@
T16 PAD~D@T16 PAD~D@
T22PAD~D @T22PAD~D @
RC56
1K_0402_1%~D
@RC56
1K_0402_1%~D
@
12
RC122 49.9_0402_1%~D@RC122 49.9_0402_1%~D@
1 2
T9 PAD~D@T9 PAD~D@
RESERVED
U1E
IVY-BRIDGE_BGA1023~D
RESERVED
U1E
IVY-BRIDGE_BGA1023~D
CFG[0]
B50
CFG[1]
C51
CFG[2]
B54
CFG[3]
D53
CFG[4]
A51
CFG[5]
C53
CFG[6]
C55
CFG[7]
H49
CFG[8]
A55
CFG[9]
H51
CFG[10]
K49
CFG[11]
K53
CFG[12]
F53
CFG[13]
G53
CFG[14]
L51
CFG[15]
F51
CFG[16]
D52
CFG[17]
L53
DC_TEST_A4 A4
DC_TEST_A58 A58
DC_TEST_A59 A59
DC_TEST_A61 A61
DC_TEST_BD1 BD1
DC_TEST_BD61 BD61
DC_TEST_BE1 BE1
DC_TEST_BE3 BE3
DC_TEST_BE59 BE59
DC_TEST_BE61 BE61
DC_TEST_BG1 BG1
DC_TEST_BG3 BG3
DC_TEST_BG4 BG4
DC_TEST_BG58 BG58
DC_TEST_BG59 BG59
DC_TEST_BG61 BG61
DC_TEST_C4 C4
DC_TEST_C59 C59
DC_TEST_C61 C61
DC_TEST_D1 D1
DC_TEST_D3 D3
DC_TEST_D61 D61
VCC_VAL_SENSE
H43
VSS_VAL_SENSE
K43
VAXG_VAL_SENSE
H45
VSSAXG_VAL_SENSE
K45
VCC_DIE_SENSE
F48
RSVD41 AH2
RSVD42 AG13
RSVD43 AM14
RSVD44 AM15
RSVD8
BA19
RSVD9
AV19
RSVD10
AT21
RSVD11
BB21
RSVD12
BB19
RSVD13
AY21
RSVD14
BA22
RSVD15
AY22
RSVD16
AU19
RSVD17
AU21
RSVD18
BD21
RSVD19
BD22
RSVD20
BD25
RSVD21
BD26
RSVD22
BG22
RSVD23
BE22
RSVD24
BG26
RSVD25
BE26
RSVD26
BF23
RSVD27
BE24
RSVD45 N50
RSVD30 N42
RSVD31 L42
RSVD32 L45
RSVD33 L47
RSVD34 M13
RSVD35 M14
RSVD36 U14
RSVD37 W14
RSVD38 P13
RSVD39 AT49
RSVD40 K24
RSVD6
H48
RSVD7
K48
RSVD28 BE7
RSVD29 BG7
RC120 49.9_0402_1%~D@RC120 49.9_0402_1%~D@
1 2
T121 PAD~D@T121 PAD~D@
T10 PAD~D@T10 PAD~D@
RC97 1K_0402_1%~D@RC97 1K_0402_1%~D@
1 2
T122 PAD~D@T122 PAD~D@
RC96 1K_0402_1%~D@RC96 1K_0402_1%~D@
1 2
T132 PAD~D@T132 PAD~D@
RC51
1K_0402_1%~D
@RC51
1K_0402_1%~D
@
12
T13 PAD~D@T13 PAD~D@
T11 PAD~D@T11 PAD~D@
RC52
1K_0402_1%~D
@RC52
1K_0402_1%~D
@
12
T20 PAD~D@T20 PAD~D@

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CPU_SVIDALRT#
VCCSENSE_R
VSSSENSE_R
VIDSOUT
H_CPU_SVIDALRT#
VIDSCLK
+VCC_CORE
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+3.3V_RUN
+1.05V_RUN_VTT
VSSSENSE <51>
VCCSENSE <51>
VIDALERT_N <51>
VTT_SENSE <50>
VIDSCLK <51>
VIDSOUT <51>
VTT_GND <50>
VCCP_PWRCTRL <50>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (5/6)
10 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (5/6)
10 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (5/6)
10 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CPU Power Rail Table
1.5
0.65-0.9
VCC
VCCIO
VAXG
VCCPLL
VDDQ
VCCSA
Voltage Rail
0.65-1.3
1.05/1
1.8
53
8.5
33
1.2
12-16
6
0.0-1.1
Voltage
S0 Iccmax
Current (A)
5A to Mem controller(+1.5V_CPU_VDDQ)
5-6A to 2 DIMMs/channel
2-5A to +1.5V_RUN & +0.75V_DDR_VTT
*
*
Description
5
+1.5V_MEM 1.5
Iccmax current changed for PDDG Rev0.7
Note: Place the PU resistors close to CPU
RC61 close to CPU 300 - 1500mils
CAD Note: Place the PU
resistors close to CPU
RC63 close to CPU 300 - 1500mils
DELL CONFIDENTIAL/PROPRIETARY
Place RC66, RC70 ,RC133near CPU
53A
8.5A
H_CPU_SVIDALRT# must be routed between the
VIDSOUT and VIDSCLK lines to reduce cross
talk. 18 mils spacing to others.
RC70
100_0402_1%~D
RC70
100_0402_1%~D
12
RC75
100_0402_1%~D
@RC75
100_0402_1%~D
@
1 2
RC61 43_0402_5%~DRC61 43_0402_5%~D
1 2
RC98 10_0402_1%~DRC98 10_0402_1%~D
12
RC140 0_0402_5%~DRC140 0_0402_5%~D
1 2
CC573
1U_0402_6.3V6K~D
CC573
1U_0402_6.3V6K~D
1
2
RC60
75_0402_1%~D
RC60
75_0402_1%~D
12
RC66
100_0402_1%~D
RC66
100_0402_1%~D
12
RC63
130_0402_1%~D
RC63
130_0402_1%~D
12
RC68 0_0402_5%~DRC68 0_0402_5%~D
1 2
RC141
10K_0402_5%~D
@
RC141
10K_0402_5%~D
@
1 2
RC67 0_0402_5%~DRC67 0_0402_5%~D
1 2
RC133 10_0402_1%~DRC133 10_0402_1%~D
1 2
POWER
CORE SUPPLY
PEG IO AND DDR IO
SENSE LINES SVID QUIET
RAILS
U1F
IVY-BRIDGE_BGA1023~D
POWER
CORE SUPPLY
PEG IO AND DDR IO
SENSE LINES SVID QUIET
RAILS
U1F
IVY-BRIDGE_BGA1023~D
VCC_SENSE F43
VSS_SENSE G43
VIDALERT# A44
VIDSCLK B43
VIDSOUT C44
VSS_SENSE_VCCIO AN17
VCC[1]
A26
VCC[2]
A29
VCC[3]
A31
VCC[4]
A34
VCC[5]
A35
VCC[6]
A38
VCC[7]
A39
VCC[8]
A42
VCC[9]
C26
VCC[10]
C27
VCC[11]
C32
VCC[12]
C34
VCC[13]
C37
VCC[14]
C39
VCC[15]
C42
VCC[16]
D27
VCC[17]
D32
VCC[18]
D34
VCC[19]
D37
VCC[20]
D39
VCC[21]
D42
VCC[22]
E26
VCC[23]
E28
VCC[24]
E32
VCC[25]
E34
VCC[26]
E37
VCC[27]
E38
VCC[28]
F25
VCC[29]
F26
VCC[30]
F28
VCC[31]
F32
VCC[32]
F34
VCC[33]
F37
VCC[34]
F38
VCC[35]
F42
VCC[36]
G42
VCC[37]
H25
VCC[38]
H26
VCC[39]
H28
VCC[40]
H29
VCC[41]
H32
VCC[42]
H34
VCC[43]
H35
VCC[44]
H37
VCC[45]
H38
VCC[46]
H40
VCC[47]
J25
VCC[48]
J26
VCC[49]
J28
VCC[50]
J29
VCC[51]
J32
VCC[52]
J34
VCC[53]
J35
VCC[54]
J37
VCC[55]
J38
VCC[56]
J40
VCC[57]
J42
VCC[58]
K26
VCC[59]
K27
VCC[60]
K29
VCC[61]
K32
VCC[62]
K34
VCC[63]
K35
VCC[64]
K37
VCC[66]
K39
VCC[67]
K42
VCC[68]
L25
VCC[69]
L28
VCC[70]
L33
VCC[71]
L36
VCC[72]
L40
VCC[73]
N26
VCC[74]
N30
VCC[75]
N34
VCC[76]
N38
VCCIO[1] AF46
VCCIO[3] AG48
VCCIO[4] AG50
VCCIO[5] AG51
VCCIO[6] AJ17
VCCIO[7] AJ21
VCCIO[8] AJ25
VCCIO[9] AJ43
VCCIO[10] AJ47
VCCIO[11] AK50
VCCIO[12] AK51
VCCIO[13] AL14
VCCIO[14] AL15
VCCIO[15] AL16
VCCIO[16] AL20
VCCIO[17] AL22
VCCIO[18] AL26
VCCIO[19] AL45
VCCIO[20] AL48
VCCIO[21] AM16
VCCIO[22] AM17
VCCIO[23] AM21
VCCIO[24] AM43
VCCIO[25] AM47
VCCIO[26] AN20
VCCIO[27] AN42
VCCIO[28] AN45
VCCIO[29] AN48
VCCIO[30] AA14
VCCIO[31] AA15
VCCIO[32] AB17
VCCIO[33] AB20
VCCIO[34] AC13
VCCIO[35] AD16
VCCIO[36] AD18
VCCIO[37] AD21
VCCIO[38] AE14
VCCIO[39] AE15
VCCIO[40] AF16
VCCIO[41] AF18
VCCIO[42] AF20
VCCIO[43] AG15
VCCIO[44] AG16
VCCIO[45] AG17
VCCIO[46] AG20
VCCIO[47] AG21
VCCIO[48] AJ14
VCCIO[49] AJ15
VCCIO50 W16
VCCIO51 W17
VCCPQE[1] AM25
VCCPQE[2] AN22
VCCIO_SENSE AN16
VCCIO_SEL BC22

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUN_ON_CPU1.5VS3
+V_SM_VREF_CNT
+1.8V_RUN
+VCC_GFXCORE
+1.5V_MEM
+1.5V_CPU_VDDQ
+1.5V_CPU_VDDQ
+VCC_SA
+1.5V_CPU_VDDQ
+1.5V_MEM +1.5V_CPU_VDDQ+3.3V_ALW2 +PWR_SRC_S
+V_SM_VREF_CNT
+1.5V_CPU_VDDQ
+VCC_GFXCORE
VCC_AXG_SENSE<51>
VSS_AXG_SENSE<51>
VCCSA_VID_1 <54>
VCCSA_VID_0 <54>
+VCCSA_SENSE <54>
CPU1.5V_S3_GATE<40>
RUN_ON_CPU1.5VS3# <7,42>
SIO_SLP_S3#<16,27,35,39,42,48>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (6/6)
11 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (6/6)
11 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Sandy Bridge (6/6)
11 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
6A
+V_SM_VREF should
have 20 mil trace width
5A
1.2A
33A
+1.5V_CPU_VDDQ Source
RC84
1K_0402_1%~D
RC84
1K_0402_1%~D
12
CC180
10U_0603_6.3V6M~D
CC180
10U_0603_6.3V6M~D
1
2
RC76
100_0402_1%~D
@RC76
100_0402_1%~D
@
1 2
CC258
1U_0402_6.3V6K~D
CC258
1U_0402_6.3V6K~D
1
2
CC175
1U_0402_6.3V6K~D
CC175
1U_0402_6.3V6K~D
1
2
RC138 0_0402_5%~DRC138 0_0402_5%~D
1 2
RC74
100K_0402_5%~D
RC74
100K_0402_5%~D
12
CC181
10U_0603_6.3V6M~D
CC181
10U_0603_6.3V6M~D
1
2
CC161
10U_0603_6.3V6M~D
CC161
10U_0603_6.3V6M~D
1
2
CC264
1U_0402_6.3V6K~D
CC264
1U_0402_6.3V6K~D
1
2
CC250
1U_0402_6.3V6K~D
CC250
1U_0402_6.3V6K~D
1
2
QC4A
DMN66D0LDW-7_SOT363-6~D
QC4A
DMN66D0LDW-7_SOT363-6~D
61
2
CC165
10U_0603_6.3V6M~D
CC165
10U_0603_6.3V6M~D
1
2
CC252
1U_0402_6.3V6K~D
CC252
1U_0402_6.3V6K~D
1
2
RC79 0_0402_5%~D@RC79 0_0402_5%~D@
1 2
CC162
10U_0603_6.3V6M~D
CC162
10U_0603_6.3V6M~D
1
2
CC183
10U_0603_6.3V6M~D
CC183
10U_0603_6.3V6M~D
1
2
RC143
330K_0402_1%~D
RC143
330K_0402_1%~D
12
CC163
10U_0603_6.3V6M~D
CC163
10U_0603_6.3V6M~D
1
2
CC254
1U_0402_6.3V6K~D
CC254
1U_0402_6.3V6K~D
1
2
CC135
10U_0603_6.3V6M~D
CC135
10U_0603_6.3V6M~D
1
2
CC166
10U_0603_6.3V6M~D
CC166
10U_0603_6.3V6M~D
1
2
+
CC176
330U_D2_2.5VM_R6M~D
+
CC176
330U_D2_2.5VM_R6M~D
1
2
QC4B
DMN66D0LDW-7_SOT363-6~D
QC4B
DMN66D0LDW-7_SOT363-6~D
3
5
4
CC255
1U_0402_6.3V6K~D
CC255
1U_0402_6.3V6K~D
1
2
VSS
U1H
IVY-BRIDGE_BGA1023~D
VSS
U1H
IVY-BRIDGE_BGA1023~D
VSS[1]
A13
VSS[2]
A17
VSS[3]
A21
VSS[4]
A25
VSS[5]
A28
VSS[6]
A33
VSS[7]
A37
VSS[8]
A40
VSS[9]
A45
VSS[10]
A49
VSS[11]
A53
VSS[12]
A9
VSS[13]
AA1
VSS[14]
AA13
VSS[15]
AA50
VSS[16]
AA51
VSS[17]
AA52
VSS[18]
AA53
VSS[19]
AA55
VSS[20]
AA56
VSS[21]
AA8
VSS[22]
AB16
VSS[23]
AB18
VSS[24]
AB21
VSS[25]
AB48
VSS[26]
AB61
VSS[27]
AC10
VSS[28]
AC14
VSS[29]
AC46
VSS[30]
AC6
VSS[31]
AD17
VSS[32]
AD20
VSS[33]
AD4
VSS[34]
AD61
VSS[35]
AE13
VSS[36]
AE8
VSS[37]
AF1
VSS[38]
AF17
VSS[39]
AF21
VSS[40]
AF47
VSS[41]
AF48
VSS[42]
AF50
VSS[43]
AF51
VSS[44]
AF52
VSS[45]
AF53
VSS[46]
AF55
VSS[47]
AF56
VSS[48]
AF58
VSS[49]
AF59
VSS[50]
AG10
VSS[51]
AG14
VSS[52]
AG18
VSS[53]
AG47
VSS[54]
AG52
VSS[55]
AG61
VSS[56]
AG7
VSS[57]
AH4
VSS[58]
AH58
VSS[59]
AJ13
VSS[60]
AJ16
VSS[61]
AJ20
VSS[62]
AJ22
VSS[63]
AJ26
VSS[64]
AJ30
VSS[65]
AJ34
VSS[66]
AJ38
VSS[67]
AJ42
VSS[68]
AJ45
VSS[69]
AJ48
VSS[70]
AJ7
VSS[71]
AK1
VSS[72]
AK52
VSS[73]
AL10
VSS[74]
AL13
VSS[75]
AL17
VSS[76]
AL21
VSS[77]
AL25
VSS[78]
AL28
VSS[79]
AL33
VSS[80]
AL36
VSS[81]
AL40
VSS[82]
AL43
VSS[83]
AL47
VSS[84]
AL61
VSS[85]
AM13
VSS[86]
AM20
VSS[87]
AM22
VSS[88]
AM26
VSS[89]
AM30
VSS[90]
AM34
VSS[91] AM38
VSS[92] AM4
VSS[93] AM42
VSS[94] AM45
VSS[95] AM48
VSS[96] AM58
VSS[97] AN1
VSS[98] AN21
VSS[99] AN25
VSS[100] AN28
VSS[101] AN33
VSS[102] AN36
VSS[103] AN40
VSS[104] AN43
VSS[105] AN47
VSS[106] AN50
VSS[107] AN54
VSS[108] AP10
VSS[109] AP51
VSS[110] AP55
VSS[111] AP7
VSS[112] AR13
VSS[113] AR17
VSS[114] AR21
VSS[115] AR41
VSS[116] AR48
VSS[117] AR61
VSS[118] AR7
VSS[119] AT14
VSS[120] AT19
VSS[121] AT36
VSS[122] AT4
VSS[123] AT45
VSS[124] AT52
VSS[125] AT58
VSS[126] AU1
VSS[127] AU11
VSS[128] AU28
VSS[129] AU32
VSS[130] AU51
VSS[131] AU7
VSS[132] AV17
VSS[133] AV21
VSS[134] AV22
VSS[135] AV34
VSS[136] AV40
VSS[137] AV48
VSS[138] AV55
VSS[139] AW13
VSS[140] AW43
VSS[141] AW61
VSS[142] AW7
VSS[143] AY14
VSS[144] AY19
VSS[145] AY30
VSS[146] AY36
VSS[147] AY4
VSS[148] AY41
VSS[149] AY45
VSS[150] AY49
VSS[151] AY55
VSS[152] AY58
VSS[153] AY9
VSS[154] BA1
VSS[155] BA11
VSS[156] BA17
VSS[157] BA21
VSS[158] BA26
VSS[159] BA32
VSS[160] BA48
VSS[161] BA51
VSS[162] BB53
VSS[163] BC13
VSS[164] BC5
VSS[165] BC57
VSS[166] BD12
VSS[167] BD16
VSS[168] BD19
VSS[169] BD23
VSS[170] BD27
VSS[171] BD32
VSS[172] BD36
VSS[173] BD40
VSS[174] BD44
VSS[175] BD48
VSS[176] BD52
VSS[177] BD56
VSS[178] BD8
VSS[179] BE5
VSS[180] BG13
POWER
GRAPHICS
DDR3 - 1.5V RAILS
1.8V RAIL
SENSE
LINES
SA RAIL
SENSE LINES
QUIET RAILS
VREF
VCCSA VID
lines
U1G
IVY-BRIDGE_BGA1023~D
POWER
GRAPHICS
DDR3 - 1.5V RAILS
1.8V RAIL
SENSE
LINES
SA RAIL
SENSE LINES
QUIET RAILS
VREF
VCCSA VID
lines
U1G
IVY-BRIDGE_BGA1023~D
SM_VREF AY43
VAXG[1]
AA46
VAXG[2]
AB47
VAXG[3]
AB50
VAXG[4]
AB51
VAXG[5]
AB52
VAXG[6]
AB53
VAXG[7]
AB55
VAXG[8]
AB56
VAXG[9]
AB58
VAXG[10]
AB59
VAXG[11]
AC61
VAXG[12]
AD47
VAXG[13]
AD48
VAXG[14]
AD50
VAXG[15]
AD51
VAXG[16]
AD52
VAXG[17]
AD53
VAXG[18]
AD55
VAXG[19]
AD56
VAXG[20]
AD58
VAXG[21]
AD59
VAXG[22]
AE46
VAXG[23]
N45
VAXG[24]
P47
VAXG[25]
P48
VAXG[26]
P50
VAXG[27]
P51
VAXG[28]
P52
VAXG[29]
P53
VAXG[30]
P55
VAXG[31]
P56
VAXG[32]
P61
VAXG[33]
T48
VAXG[34]
T58
VAXG[35]
T59
VAXG[36]
T61
VAXG[37]
U46
VAXG[38]
V47
VAXG[39]
V48
VAXG[40]
V50
VAXG[41]
V51
VAXG[42]
V52
VAXG[43]
V53
VAXG[44]
V55
VAXG[45]
V56
VAXG[46]
V58
VAXG[47]
V59
VAXG[48]
W50
VAXG[49]
W51
VAXG[50]
W52
VAXG[51]
W53
VAXG[52]
W55
VAXG[53]
W56
VAXG[54]
W61
VDDQ[11] AM40
VDDQ[12] AN30
VDDQ[13] AN34
VDDQ[14] AN38
VDDQ[15] AR26
VDDQ[1] AJ28
VDDQ[2] AJ33
VDDQ[3] AJ36
VDDQ[4] AJ40
VDDQ[5] AL30
VDDQ[6] AL34
VDDQ[7] AL38
VDDQ[8] AL42
VDDQ[9] AM33
VDDQ[10] AM36
VCCPLL[1]
BB3
VCCPLL[2]
BC1
VCCSA_SENSE U10
VCCSA_VID[1] D49
VAXG[55]
Y48
VAXG[56]
Y61
VCCPLL[3]
BC4
VAXG_SENSE
F45
VSSAXG_SENSE
G45
VCCSA[1]
L17
VCCSA[10]
R21
VCCSA[12]
V16
VCCSA[13]
V17
VCCSA[14]
V18
VCCSA[4]
N20
VCCSA[5]
N22
VCCSA[6]
P17
VCCSA[9]
R18
VDDQ[16] AR28
VDDQ[17] AR30
VDDQ[18] AR32
VDDQ[19] AR34
VDDQ[20] AR36
VDDQ[21] AR40
VDDQ[22] AV41
VDDQ[23] AW26
VDDQ[24] BA40
VDDQ[25] BB28
VDDQ[26] BG33
VCCSA[11]
U15
VCCSA[15]
V21
VCCSA[16]
W20
VCCSA[2]
L21
VCCSA[3]
N16
VCCDQ[1] AM28
VCCDQ[2] AN26
VCCSA[7]
P20
VCCSA[8]
R16
VDDQ_SENSE BC43
VSS_SENSE_VDDQ BA43
VCCSA_VID[0] D48
CC179 0.1U_0402_10V7K~DCC179 0.1U_0402_10V7K~D
12
CC164
10U_0603_6.3V6M~D
CC164
10U_0603_6.3V6M~D
1
2
CC256
1U_0402_6.3V6K~D
CC256
1U_0402_6.3V6K~D
1
2
RC82 0_0402_5%~DRC82 0_0402_5%~D
1 2
CC174
1U_0402_6.3V6K~D
CC174
1U_0402_6.3V6K~D
1
2
CC149 0.1U_0402_10V7K~DCC149 0.1U_0402_10V7K~D
12
CC171
10U_0603_6.3V6M~D
CC171
10U_0603_6.3V6M~D
1
2
RC72
100K_0402_5%~D
RC72
100K_0402_5%~D
12
CC253
1U_0402_6.3V6K~D
CC253
1U_0402_6.3V6K~D
1
2
+
CC167
330U_D2_2VM_R6M~D
+
CC167
330U_D2_2VM_R6M~D
1
2
RC100
100_0402_1%~D
RC100
100_0402_1%~D
12
RC99
100_0402_1%~D
RC99
100_0402_1%~D
12
CC178 0.1U_0402_10V7K~DCC178 0.1U_0402_10V7K~D
12
QC3
AO4728L_SO8~D
QC3
AO4728L_SO8~D
4
7
8
6
5
1
2
3
CC168
10U_0603_6.3V6M~D
CC168
10U_0603_6.3V6M~D
1
2
CC251
1U_0402_6.3V6K~D
CC251
1U_0402_6.3V6K~D
1
2
CC263
1U_0402_6.3V6K~D
CC263
1U_0402_6.3V6K~D
1
2
CC150 0.1U_0402_10V7K~DCC150 0.1U_0402_10V7K~D
12
CC257
1U_0402_6.3V6K~D
CC257
1U_0402_6.3V6K~D
1
2
CC170
10U_0603_6.3V6M~D
CC170
10U_0603_6.3V6M~D
1
2
RC73
20K_0402_5%~D
@
RC73
20K_0402_5%~D
@
12
CC262
1U_0402_6.3V6K~D
CC262
1U_0402_6.3V6K~D
1
2
CC261
1U_0402_6.3V6K~D
CC261
1U_0402_6.3V6K~D
1
2
CC169
10U_0603_6.3V6M~D
CC169
10U_0603_6.3V6M~D
1
2
CC574
1U_0402_6.3V6K~D
CC574
1U_0402_6.3V6K~D
1
2
CC259
1U_0402_6.3V6K~D
CC259
1U_0402_6.3V6K~D
1
2
RC78
1K_0402_1%~D
RC78
1K_0402_1%~D
12
RC139 0_0402_5%~DRC139 0_0402_5%~D
1 2
+
CC172
330U_D2_2VM_R6M~D
+
CC172
330U_D2_2VM_R6M~D
1
2
CC260
1U_0402_6.3V6K~D
CC260
1U_0402_6.3V6K~D
1
2
CC136
0.1U_0603_50V7K~D
CC136
0.1U_0603_50V7K~D
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D10
DDR_A_D11
DDR_A_D18
DDR_A_D19
DDR_A_D21
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D32
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D45
DDR_A_D46
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_MA2
DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA4DDR_A_MA5
DDR_A_MA6DDR_A_MA8
DDR_A_MA7DDR_A_MA9
DDR_A_MA10
DDR_A_MA11DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
M_ODT0
M_ODT1
DDR_A_D63
DDR_A_MA15
DDR_A_D23
DDR_A_D31
DDR_A_D17
DDR_A_D9 DDR_A_D13
DDR_A_D20DDR_A_D16
DDR_A_D25
DDR_A_D30
DDR_A_D24
DDR_A_D14
DDR_A_D15
DDR_A_D12
DDR_A_D22
DDR_A_D39
DDR_A_D54
DDR_A_D33
DDR_A_D38
DDR_A_D47
DDR_A_D44
DDR_A_D48
DDR3_DRAMRST#_R
DDR3_DRAMRST#_R
DDR_HVREF_RST
DDR_HVREF_RST
+0.75V_DDR_VTT
+1.5V_MEM
+1.5V_MEM+1.5V_MEM
+3.3V_RUN
+0.75V_DDR_VTT
+0.75V_DDR_VTT
+DIMM1_VREF_CA
+1.5V_MEM
+V_DDR_REF
+1.5V_MEM
+DIMM1_VREF_DQ
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
+V_DDR_REFA_M3
+V_DDR_REFB_M3
+V_DDR_REFA_M3
+V_DDR_REF
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
DDR_A_DQS#[0..7]<8>
DDR_CKE0_DIMMA<8>
DDR_A_BS2<8>
DDR_CS1_DIMMA#<8>
DDR_A_WE#<8>
DDR_A_CAS#<8>
DDR_A_BS0<8>
DDR_A_BS1 <8>
M_ODT0 <8>
DDR_A_RAS# <8>
M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>M_CLK_DDR#0<8>
M_CLK_DDR0<8>
DDR_CKE1_DIMMA <8>
DDR_CS0_DIMMA# <8>
M_ODT1 <8>
DDR3_DRAMRST# <7>DDR3_DRAMRST#_R<13>
DDR_XDP_WAN_SMBCLK <13,15,27,34>
DDR_XDP_WAN_SMBDAT <13,15,27,34>
DDR_HVREF_RST<7>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DDRIII-SODIMM SLOT1
12 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DDRIII-SODIMM SLOT1
12 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DDRIII-SODIMM SLOT1
12 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:
Place near JDIMM1
Layout Note:
Place near JDIMM1.203,204
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
JDIMM1 H=4
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
All VREF traces should
have 10 mil trace width
2-3A to 1 DIMMs/channel
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
CD16
0.1U_0402_25V6K~D
CD16
0.1U_0402_25V6K~D
1
2
CD18
1U_0402_6.3V6K~D
CD18
1U_0402_6.3V6K~D
1
2
CD13
10U_0603_6.3V6M~D
@CD13
10U_0603_6.3V6M~D
@
1
2
RD27
1K_0402_1%~D
RD27
1K_0402_1%~D
12
CD19
1U_0402_6.3V6K~D
CD19
1U_0402_6.3V6K~D
1
2
JDIMM1
TYCO_2-2013022-2~D
JDIMM1
TYCO_2-2013022-2~D
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201
VTT
203
GND1
205
SCL 202
VTT 204
GND1 206
+
CD14
330U_SX_2VY~D
+
CD14
330U_SX_2VY~D
1
2
CD7
10U_0603_6.3V6M~D
CD7
10U_0603_6.3V6M~D
1
2
CD17
1U_0402_6.3V6K~D
CD17
1U_0402_6.3V6K~D
1
2
CD21
0.1U_0402_25V6K~D
CD21
0.1U_0402_25V6K~D
1
2
CD51
10U_0603_6.3V6M~D
CD51
10U_0603_6.3V6M~D
1
2
RD2 10K_0402_5%~DRD2 10K_0402_5%~D
1 2
CD8
10U_0603_6.3V6M~D
CD8
10U_0603_6.3V6M~D
1
2
CD22
2.2U_0603_6.3V6K~D
CD22
2.2U_0603_6.3V6K~D
1
2
CD1
2.2U_0603_6.3V6K~D
CD1
2.2U_0603_6.3V6K~D
1
2
CD20
1U_0402_6.3V6K~D
CD20
1U_0402_6.3V6K~D
1
2
CD2
0.1U_0402_25V6K~D
CD2
0.1U_0402_25V6K~D
1
2
CD4
1U_0402_6.3V6K~D
CD4
1U_0402_6.3V6K~D
1
2
RD7 0_0402_5%~DRD7 0_0402_5%~D
1 2
CD5
1U_0402_6.3V6K~D
CD5
1U_0402_6.3V6K~D
1
2
CD9
10U_0603_6.3V6M~D
CD9
10U_0603_6.3V6M~D
1
2
CD11
10U_0603_6.3V6M~D
CD11
10U_0603_6.3V6M~D
1
2
CD15
2.2U_0603_6.3V6K~D
CD15
2.2U_0603_6.3V6K~D
1
2
G
D
S
QD2
BSS138_NL_SOT23-3
G
D
S
QD2
BSS138_NL_SOT23-3
2
13
CD6
1U_0402_6.3V6K~D
CD6
1U_0402_6.3V6K~D
1
2
RD29 0_0402_5%~D@RD29 0_0402_5%~D@1 2
CD10
10U_0603_6.3V6M~D
CD10
10U_0603_6.3V6M~D
1
2
G
D
S
QD1
BSS138_NL_SOT23-3
G
D
S
QD1
BSS138_NL_SOT23-3
2
13
CD3
1U_0402_6.3V6K~D
CD3
1U_0402_6.3V6K~D
1
2
RD30 0_0402_5%~D@RD30 0_0402_5%~D@1 2
RD28 1K_0402_1%~DRD28 1K_0402_1%~D
1 2
RD11 0_0402_5%~DRD11 0_0402_5%~D
12
RD1 0_0402_5%~DRD1 0_0402_5%~D
1 2
RD3 10K_0402_5%~DRD3 10K_0402_5%~D
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_MA7
DDR_B_D22
DDR_B_D19
DDR_B_D20
DDR_B_D62
DDR_B_D59
DDR_CS3_DIMMB#
DDR_B_BS0
DDR_B_D27
DDR_B_D8
DDR_B_D52
M_ODT2
DDR_B_MA14
DDR_B_D57
DDR_B_DQS6
DDR_B_D43
DDR_B_DQS4
DDR_B_BS2
DDR_B_DQS#2
DDR3_DRAMRST#_R
DDR_B_D37
DDR_B_D36
DDR_B_MA6
DDR_B_D23
DDR_B_D21
DDR_B_D41
DDR_B_MA3
DDR_B_D24
DDR_B_D63
DDR_B_D44
DDR_B_DQS#3
DDR_B_D40
DDR_CKE2_DIMMB
DDR_B_D5
DDR_B_DQS1
DDR_B_D9
DDR_B_D54
DDR_B_D53
DDR_B_D46
DDR_CKE3_DIMMB
DDR_B_D50
DDR_B_D48
DDR_B_D14
DDR_B_D61
DDR_B_MA4
DDR_B_MA1
DDR_B_D45
DDR_B_D38
DDR_B_BS1
DDR_B_DQS3
DDR_B_WE#
DDR_B_D7
DDR_B_D6
DDR_B_D10
DDR_B_DQS#1
DDR_B_D55
DDR_B_D47
M_ODT3
DDR_B_D49
DDR_B_MA12
DDR_B_D15
DDR_B_D2
DDR_B_D0
M_CLK_DDR3
DDR_B_D28
DDR_B_DQS2
DDR_B_D4
DDR_B_RAS#
DDR_B_D34
DDR_B_D32
DDR_B_CAS#
DDR_B_D11
DDR_B_DQS#6
DDR_B_MA8
DDR_B_D25
DDR_B_D1
DDR_B_DQS7
DDR_B_DQS#7
M_CLK_DDR#3
DDR_B_MA2
DDR_B_MA15
DDR_B_D29
DDR_B_DQS#5
DDR_B_MA11
DDR_B_D30
DDR_B_D51
DDR_B_D35
DDR_B_D33
M_CLK_DDR2
DDR_B_D12
DDR_B_DQS#0
DDR_B_D16
DDR_B_D60
DDR_B_MA5
DDR_B_D18
DDR_B_D39
DDR_B_MA0
DDR_B_D58
DDR_B_MA10
DDR_B_D26
DDR_B_D3
DDR_B_DQS5
DDR_CS2_DIMMB#
DDR_B_D31
DDR_B_D56
DDR_B_D42
DDR_B_DQS#4
DDR_B_MA13
M_CLK_DDR#2
DDR_B_MA9
DDR_B_D17
DDR_B_D13
DDR_B_DQS0
+1.5V_MEM
+0.75V_DDR_VTT
+3.3V_RUN
+3.3V_RUN
+1.5V_MEM
+0.75V_DDR_VTT
+1.5V_MEM
+DIMM2_VREF_CA
+1.5V_MEM
+0.75V_DDR_VTT
+DIMM2_VREF_DQ
+V_DDR_REFB_M3
+V_DDR_REF
+V_DDR_REF
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
DDR_B_DQS#[0..7]<8>
DDR_B_CAS#<8>
DDR_CKE3_DIMMB <8>
DDR_B_WE#<8>
DDR_CKE2_DIMMB<8>
DDR_B_BS0<8> DDR_B_RAS# <8>
DDR_B_BS1 <8>
DDR_B_BS2<8>
M_ODT2 <8>
DDR_CS3_DIMMB#<8>
DDR_CS2_DIMMB# <8>
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
M_ODT3 <8>
M_CLK_DDR2<8>
M_CLK_DDR#2<8>
DDR3_DRAMRST#_R <12>
DDR_XDP_WAN_SMBCLK <12,15,27,34>
DDR_XDP_WAN_SMBDAT <12,15,27,34>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DDRIII-SODIMM SLOT2
13 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DDRIII-SODIMM SLOT2
13 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DDRIII-SODIMM SLOT2
13 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:
Place near JDIMM2
Layout Note:
Place near JDIMM2.203,204
JDIMMB H=8
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
All VREF traces should
have 10 mil trace width
2-3A to 1 DIMMs/channel
Populate RD4, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD4 for Intel DDR3
VREFDQ multiple methods M3
CD39
1U_0402_6.3V6K~D
CD39
1U_0402_6.3V6K~D
1
2
JDIMM2
TYCO_2-2013297-2~D
CONN@JDIMM2
TYCO_2-2013297-2~D
CONN@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201
VTT
203
GND1
205
SCL 202
VTT 204
GND1 206
CD42
1U_0402_6.3V6K~D
CD42
1U_0402_6.3V6K~D
1
2
+
CD36
330U_SX_2VY~D
+
CD36
330U_SX_2VY~D
1
2
CD38
0.1U_0402_25V6K~D
CD38
0.1U_0402_25V6K~D
1
2
CD44
2.2U_0603_6.3V6K~D
CD44
2.2U_0603_6.3V6K~D
1
2
RD15 0_0402_5%~DRD15 0_0402_5%~D
12
CD25
1U_0402_6.3V6K~D
CD25
1U_0402_6.3V6K~D
1
2
CD32
10U_0603_6.3V6M~D
CD32
10U_0603_6.3V6M~D
1
2
RD8 0_0402_5%~DRD8 0_0402_5%~D
1 2
CD37
2.2U_0603_6.3V6K~D
CD37
2.2U_0603_6.3V6K~D
1
2
CD43
0.1U_0402_25V6K~D
CD43
0.1U_0402_25V6K~D
1
2
CD31
10U_0603_6.3V6M~D
CD31
10U_0603_6.3V6M~D
1
2
CD23
2.2U_0603_6.3V6K~D
CD23
2.2U_0603_6.3V6K~D
1
2
CD41
1U_0402_6.3V6K~D
CD41
1U_0402_6.3V6K~D
1
2
RD6
10K_0402_5%~D
RD6
10K_0402_5%~D
12
CD33
10U_0603_6.3V6M~D
CD33
10U_0603_6.3V6M~D
1
2
CD24
0.1U_0402_25V6K~D
CD24
0.1U_0402_25V6K~D
1
2
CD29
10U_0603_6.3V6M~D
CD29
10U_0603_6.3V6M~D
1
2
CD40
1U_0402_6.3V6K~D
CD40
1U_0402_6.3V6K~D
1
2
RD4 0_0402_5%~DRD4 0_0402_5%~D
1 2
CD34
10U_0603_6.3V6M~D
CD34
10U_0603_6.3V6M~D
1
2
CD26
1U_0402_6.3V6K~D
CD26
1U_0402_6.3V6K~D
1
2
CD27
1U_0402_6.3V6K~D
CD27
1U_0402_6.3V6K~D
1
2
CD28
1U_0402_6.3V6K~D
CD28
1U_0402_6.3V6K~D
1
2
RD5 10K_0402_5%~DRD5 10K_0402_5%~D
12
CD35
10U_0603_6.3V6M~D
@CD35
10U_0603_6.3V6M~D
@
1
2
CD30
10U_0603_6.3V6M~D
CD30
10U_0603_6.3V6M~D
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_AZ_SDOUT
LPC_LDRQ1#
LPC_LDRQ0#
PCH_JTAG_TCK
PCH_AZ_RST#
SATA_COMP
PCH_AZ_BITCLK
SRTCRST#
SATA_ACT#
PCH_RTCX1
PCH_RTCRST#
LPC_LAD0
PCH_RTCX2_R
PCH_INTVRMEN
PCH_JTAG_TDI
LPC_LAD3
INTRUDER#
PCH_AZ_SYNC_Q
IRQ_SERIRQ
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_INTVRMEN
PCH_RTCX2
+3.3V_ALW_PCH_JTAG
LPC_LAD2
LPC_LAD1
LPC_LFRAME#
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_AZ_BITCLK
HDD_DET#_R
BBS_BIT0_R
PCH_AZ_SYNC
RBIAS_SATA3
SATA3_COMP
SPKR
IRQ_SERIRQ
PCH_SPI_CLK
PCH_SPI_CS1#
PCH_SPI_DIN
PCH_SPI_DO
PCH_GPIO33
SPI_CLK64
SPI_DO64
SPI_WP#_SEL SPI_WP#_SEL_R
PCH_SPI_DIN SPI_DIN64
PCH_SPI_DO
PCH_SPI_CLK
SPI_WP#_SEL_R
PCH_SPI_DO
SPI_CLK32
SPI_DO32
PCH_SPI_CS0#
PCH_AZ_SYNC
PCH_AZ_SYNC
PCH_GPIO33
USB30_SMI#
PCH_SPI_CS0# PCH_SPI_CS0_R# PCH_SPI_CS1# PCH_SPI_CS1_R#
BBS_BIT0_R
PCH_AZ_SYNC_Q
XDP_DBRESET#
PCH_JTAG_TDI
RSMRST#_XDP
PCH_PWRBTN#_XDP
RSMRST#_XDP
PCH_JTAG_TCK
PCH_JTAG_TDO
PCH_JTAG_TMSPCH_RSMRST#_Q RSMRST#_XDP
SIO_PWRBTN#_R
1.05V_0.8V_PWROK_R
PCH_SPI_CS0#
SPI_DIN32
SPI_DO32
SPI_CLK32
PCH_SPI_CS1_R#
SPI_HOLD#
SPI_DIN32PCH_SPI_DINSPI_HOLD#
PCH_SPI_CLK
PCH_SPI_CLK
+RTC_CELL
+3.3V_RUN
+1.05V_RUN
+RTC_CELL
+1.05V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_M +3.3V_M
+3.3V_RUN
+3.3V_ALW_PCH
+5V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH+1.05V_RUN
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_M
PCH_AZ_CODEC_SDIN0<29>
PCH_AZ_CODEC_SYNC<29>
PCH_AZ_CODEC_SDOUT<29>
IRQ_SERIRQ <32,39,40>
PCH_AZ_CODEC_RST#<29>
SATA_ACT# <43>
SPKR<29>
HDD_DET# <27>
PCH_AZ_CODEC_BITCLK<29>
PSATA_PRX_DTX_N0_C <27>
PSATA_PTX_DRX_P0_C <27>
PSATA_PTX_DRX_N0_C <27>
PSATA_PRX_DTX_P0_C <27>
SATA_PRX_DKTX_P5_C <38>
SATA_PRX_DKTX_N5_C <38>
SATA_PTX_DKRX_P5_C <38>
SATA_PTX_DKRX_N5_C <38>
ESATA_PTX_DRX_P4_C <37>
ESATA_PRX_DTX_P4_C <37>
ESATA_PRX_DTX_N4_C <37>
ESATA_PTX_DRX_N4_C <37>
SATA_ODD_PRX_DTX_P1_C <28>
SATA_ODD_PTX_DRX_N1_C <28>
SATA_ODD_PTX_DRX_P1_C <28>
SATA_ODD_PRX_DTX_N1_C <28>
PCH_SATA_MOD_EN# <40>
ME_FWP<39>
LPC_LAD0 <32,34,39,40>
LPC_LAD1 <32,34,39,40>
LPC_LAD2 <32,34,39,40>
LPC_LAD3 <32,34,39,40>
LPC_LFRAME# <32,34,39,40>
LPC_LDRQ0# <39>
LPC_LDRQ1# <39>
PCH_PLTRST#<7,17>
SPI_WP#_SEL<39>
USB30_SMI#<28>
1.05V_0.8V_PWROK<40,51>
XDP_DBRESET#<7,16>
SIO_PWRBTN#_R<7,16>
PCH_RSMRST#_Q<16,41>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (1/8)
14 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (1/8)
14 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (1/8)
14 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable Internal VRs
Low - Enable External VRs
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
CMOS place near DIMM
HDD
E-SATA
DOCK
Low = Default
High = No Reboot
SPKR
No Reboot Strap
ODD/ E Module Bay
BBS_BIT0 - BIOS BOOT STRAP BIT 0
CMOS settingCMOS_CLR1
Open
Clear CMOSShunt
ME_CLR1
Keep CMOS
TPM setting
Shunt
Keep ME RTC Registers
Clear ME RTC Registers
Open
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
*
200 MIL SO8
64Mb Flash ROM 32Mb Flash ROM
200 MIL SO8
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
INTEL feedback 0302
INTEL HDA_SYNC
isolation circuit
CH1 clsoe to JXDP2
CH6 clsoe to JXDP2
Link Done
RF team request
TAA config R895,R897,R900 need change to 0 ohm SD02800008L
RH355 100K_0402_5%~DRH355 100K_0402_5%~D
12
JTAA1
TYCO_5-1775013-4~D
CONN@JTAA1
TYCO_5-1775013-4~D
CONN@
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
G1
13 G2 14
G3
15 G4 16
G5
17 G6 18
R899 33_0402_5%~D@SPI R899 33_0402_5%~D@SPI
1 2
R936 0_0402_5%~DR936 0_0402_5%~D
1 2
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
RH27 33_0402_5%~DRH27 33_0402_5%~D
1 2
JXDP2
MOLEX_52435-2671
@JXDP2
MOLEX_52435-2671
@
OBSFN_A0
1
OBSFN_A1
2
GND
3
OBSDATA_A[0]
4
OBSDATA_A[1]
5
GND
6
OBSDATA_A[2]
7
OBSDATA_A[3]
8
GND
9
HOOK0
10
HOOK1
11
HOOK2
12
HOOK3
13
HOOK4
14
HOOK5
15
VCCOBS_AB
16
HOOK6
17
HOOK7
18
GND
19
TDO
20
TRSTn
21
TDI
22
TMS
23
TCK1
24 GND 27
GND 28
GND
25
TCK0
26
RH43 200_0402_1%~DRH43 200_0402_1%~D
12
RH282
100K_0402_5%~D
@RH282
100K_0402_5%~D
@
12
RH39
330K_0402_1%~D
@RH39
330K_0402_1%~D
@
12
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1 2
CH6
0.1U_0402_16V4Z~D
PXDP@
CH6
0.1U_0402_16V4Z~D
PXDP@
1
2
RH283 1K_0402_5%~D@RH283 1K_0402_5%~D@
1 2
RH29 33_0402_5%~DRH29 33_0402_5%~D
1 2
RH35 10K_0402_5%~D@RH35 10K_0402_5%~D@
12
R894 33_0402_5%~D@SPI R894 33_0402_5%~D@SPI
1 2
ME1 SHORT PADS~D
@
ME1 SHORT PADS~D
@
1
122
RH284 0_0402_5%~D
PXDP@
RH284 0_0402_5%~D
PXDP@
1 2
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D
1 2
CH101
27P_0402_50V8J~D
@CH101
27P_0402_50V8J~D
@
1
2
RH26 33_0402_5%~DRH26 33_0402_5%~D
1 2
RH38
330K_0402_1%~D
RH38
330K_0402_1%~D
12
RH24 1K_0402_1%~DPXDP@ RH24 1K_0402_1%~DPXDP@
1 2
R897 33_0402_5%~DR897 33_0402_5%~D
1 2
CH4 1U_0402_6.3V6K~D
CH4 1U_0402_6.3V6K~D
1 2
RH50 1K_0402_1%~DRH50 1K_0402_1%~D
1 2
CH1
0.1U_0402_16V4Z~D
PXDP@
CH1
0.1U_0402_16V4Z~D
PXDP@
1
2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
1 2
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D
12
RH49
100_0402_1%~D
RH49
100_0402_1%~D
12
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH44 200_0402_1%~DRH44 200_0402_1%~D
12
RH66
1K_0402_1%~D
RH66
1K_0402_1%~D
12
R890
3.3K_0402_5%~D
@SPI R890
3.3K_0402_5%~D
@SPI
12
RH47
100_0402_1%~D
RH47
100_0402_1%~D
12
R900 33_0402_5%~DR900 33_0402_5%~D
1 2
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D
1 2
U52
W25Q64CVSSIG_SO8~D
@SPIU52
W25Q64CVSSIG_SO8~D
@SPI
CLK 6
GND
4DIO 5
DO
2
/WP
3
VCC 8
/HOLD 7
/CS
1
R935 0_0402_5%~D@SPI R935 0_0402_5%~D@SPI
1 2
RH288
0_0603_5%~D
RH288
0_0603_5%~D
12
RH287 1K_0402_1%~D@RH287 1K_0402_1%~D@
1 2
CMOS1 SHORT PADS~D
@
CMOS1 SHORT PADS~D
@
1
122
RH52 4.7K_0402_5%~DRH52 4.7K_0402_5%~D
1 2
R901 33_0402_5%~D@SPI R901 33_0402_5%~D@SPI
1 2
C746
0.1U_0402_25V6K~D
@SPIC746
0.1U_0402_25V6K~D
@SPI
1 2
RH2
10M_0402_5%~D
RH2
10M_0402_5%~D
12
RH21 0_0402_5%~D
PXDP@
RH21 0_0402_5%~D
PXDP@
1 2
RH45 200_0402_1%~DRH45 200_0402_1%~D
12
RH41 10K_0402_5%~DPXDP@ RH41 10K_0402_5%~DPXDP@
12
RH46 750_0402_1%~DRH46 750_0402_1%~D
1 2
G
D
S
QH1 BSS138W-7-F_SOT323-3~D
G
D
S
QH1 BSS138W-7-F_SOT323-3~D
2
1 3
R898 0_0402_5%~D@R898 0_0402_5%~D@
1 2
CH3
15P_0402_50V8J~D
CH3
15P_0402_50V8J~D
12
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
12
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
UH4A
BD82PPSM-QNHN-A0_BGA989~D
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
UH4A
BD82PPSM-QNHN-A0_BGA989~D
RTCX1
A20
RTCX2
C20
INTVRMEN
C17
INTRUDER#
K22
HDA_BCLK
N34
HDA_SYNC
L34
HDA_RST#
K34
HDA_SDIN0
E34
HDA_SDIN1
G34
HDA_SDIN2
C34
HDA_SDO
A36
SATALED# P3
FWH0 / LAD0 C38
FWH1 / LAD1 A38
FWH2 / LAD2 B37
FWH3 / LAD3 C37
LDRQ1# / GPIO23 K36
FWH4 / LFRAME# D36
LDRQ0# E36
RTCRST#
D20
HDA_SDIN3
A34
HDA_DOCK_EN# / GPIO33
C36
HDA_DOCK_RST# / GPIO13
N32
SRTCRST#
G22
SATA0RXN AM3
SATA0RXP AM1
SATA0TXN AP7
SATA0TXP AP5
SATA1RXN AM10
SATA1RXP AM8
SATA1TXN AP11
SATA1TXP AP10
SATA2RXN AD7
SATA2RXP AD5
SATA2TXN AH5
SATA2TXP AH4
SATA3RXN AB8
SATA3RXP AB10
SATA3TXN AF3
SATA3TXP AF1
SATA4RXN Y7
SATA4RXP Y5
SATA4TXN AD3
SATA4TXP AD1
SATA5RXN Y3
SATA5RXP Y1
SATA5TXN AB3
SATA5TXP AB1
SATAICOMPI Y10
SPI_CLK
T3
SPI_CS0#
Y14
SPI_CS1#
T1
SPI_MOSI
V4
SPI_MISO
U3
SATA0GP / GPIO21 V14
SATA1GP / GPIO19 P1
JTAG_TCK
J3
JTAG_TMS
H7
JTAG_TDI
K5
JTAG_TDO
H1
SERIRQ V5
SPKR
T10
SATAICOMPO Y11
SATA3COMPI AB13
SATA3RCOMPO AB12
SATA3RBIAS AH1
RH25 33_0402_5%~DRH25 33_0402_5%~D
1 2
U53
W25Q32BVSSIG_SO8~D
@SPIU53
W25Q32BVSSIG_SO8~D
@SPI
CS#
1
DO
2
WP#
3
GND
4
VCC 8
HOLD# 7
CLK 6
DI 5
G
D
S
QH7
SSM3K7002FU_SC70-3~D
G
D
S
QH7
SSM3K7002FU_SC70-3~D
2
13
RH30
10K_0402_5%~D
RH30
10K_0402_5%~D
12
C1204
12P_0402_50V8J~D
@
C1204
12P_0402_50V8J~D
@
1
2
RH48
100_0402_1%~D
RH48
100_0402_1%~D
12
C745
0.1U_0402_25V6K~D
C745
0.1U_0402_25V6K~D
1 2
RH286 0_0402_5%~DRH286 0_0402_5%~D
1 2
R891
3.3K_0402_5%~D
@SPIR891
3.3K_0402_5%~D
@SPI
12
RH59 51_0402_1%~DRH59 51_0402_1%~D
12
R895 33_0402_5%~DR895 33_0402_5%~D
1 2
CH2
15P_0402_50V8J~D
CH2
15P_0402_50V8J~D
12
RH290 0_0402_5%~DRH290 0_0402_5%~D
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SML1_SMBCLK
SML1_SMBDATA
PCH_SMB_ALERT#
MEM_SMBDATA
LAN_SMBCLK
LAN_SMBDATA
XTAL25_IN
PCH_CL_RST1#
SML1_SMBCLK
PCH_CL_CLK1
SML1_SMBDATA
XTAL25_OUT
PCH_CL_DATA1
MEM_SMBCLK
MEM_SMBDATA
MEM_SMBCLK
JETWAY_14M
PCIE_PRX_EXPTX_N3
PCIE_PTX_EXPRX_P3
PCIE_PTX_EXPRX_N3
PCIE_PRX_EXPTX_P3
PCIE_PRX_EMBTX_P4
PCIE_PRX_EMBTX_N4
PCIE_PTX_EMBRX_P4
PCIE_PTX_EMBRX_N4
PCIE_PTX_WLANRX_N2
PCIE_PRX_WLANTX_P2
PCIE_PRX_WLANTX_N2
PCIE_PTX_WLANRX_P2
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1
PCIE_PRX_WANTX_P1
PCIE_PRX_WANTX_N1
MINI3CLK_REQ#
MINI2CLK_REQ#
LANCLK_REQ#
PCIE_PTX_WPANRX_N5
PCIE_PRX_WPANTX_P5
PCIE_PRX_WPANTX_N5
PCIE_PTX_WPANRX_P5
EXPCLK_REQ#
MEM_SMBCLK
MEM_SMBDATA
LAN_SMBCLK
LAN_SMBDATA
PCH_SMB_ALERT#
DDR_HVREF_RST_PCH
+XCLK_RCOMP
CLK_CPU_DMI
CLK_CPU_DMI#
PCH_GPIO74
CLK_PCI_LOOPBACK
CLK_BUF_DOT96
CLK_BUF_DOT96#
CLK_BUF_CKSSCD
CLK_BUF_CKSSCD#
CLK_BUF_DMI#
CLK_BUF_BCLK
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_PCH_14M
DDR_HVREF_RST_PCH
PCH_GPIO74
CLK_BUF_CKSSCD
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_DMI#
CLK_PCH_14M
CLK_BUF_BCLK
CLK_BUF_DMI
PEG_B_CLKRQ#
MINI1CLK_REQ#
PCIE_PRX_GLANTX_P7
PCIE_PRX_GLANTX_N7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
PCIE_PRX_MMITX_P6
PCIE_PRX_MMITX_N6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6
EMBCLK_REQ#
PCI_TPM_TCM
SIO_14M
MMICLK_REQ#
PEG_A_CLKRQ#
PEG_A_CLKRQ#
CLK_80H
CLK_SIO_14M
CLK_PCI_TPM_TCM
PCLK_80H
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_LAN
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
PCH_CL_DATA1 <34>
PCH_CL_CLK1 <34>
PCH_CL_RST1# <34>
SML1_SMBDATA <40>
DDR_XDP_WAN_SMBDAT <12,13,27,34>
DDR_XDP_WAN_SMBCLK <12,13,27,34>
PCIE_PRX_WLANTX_P2<34>
PCIE_PRX_WLANTX_N2<34>
PCIE_PRX_WANTX_P1<34>
PCIE_PRX_WANTX_N1<34>
PCIE_PTX_WLANRX_N2<34>
PCIE_PTX_WLANRX_P2<34>
PCIE_PTX_WANRX_P1<34>
PCIE_PTX_WANRX_N1<34>
PCIE_PTX_EMBRX_N4<28>
PCIE_PRX_EMBTX_P4<28>
PCIE_PRX_EMBTX_N4<28>
PCIE_PTX_EMBRX_P4<28>
CLK_PCIE_EXP#<35>
CLK_PCIE_EXP<35>
PCIE_PRX_EXPTX_P3<35>
PCIE_PRX_EXPTX_N3<35>
EXPCLK_REQ#<35>
PCIE_PTX_EXPRX_P3<35>
PCIE_PTX_EXPRX_N3<35>
CLK_PCIE_MINI2<34>
PCIE_PRX_WPANTX_N5<34>
MINI2CLK_REQ#<34>
CLK_PCIE_MINI2#<34>
CLK_PCIE_MINI3#<34>
PCIE_PTX_WPANRX_P5<34>
PCIE_PTX_WPANRX_N5<34>
PCIE_PRX_WPANTX_P5<34>
MINI3CLK_REQ#<34>
CLK_PCIE_MINI3<34>
CLK_PCIE_LAN#<31>
LANCLK_REQ#<31>
CLK_PCIE_LAN<31>
LAN_SMBDATA <31>
CLK_CPU_DMI# <7>
CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <17>
JETWAY_CLK14M <32>
CLK_PCIE_MINI1#<34>
CLK_PCIE_MINI1<34>
MINI1CLK_REQ#<34>
PCIE_PTX_GLANRX_N7<31>
PCIE_PRX_GLANTX_P7<31>
PCIE_PTX_GLANRX_P7<31>
PCIE_PRX_GLANTX_N7<31>
DDR_HVREF_RST_PCH <7>
PCIE_PTX_MMIRX_N6<33>
PCIE_PRX_MMITX_P6<33>
PCIE_PTX_MMIRX_P6<33>
PCIE_PRX_MMITX_N6<33>
CLK_CPU_ITP#<7>
CLK_CPU_ITP<7>
CLK_PCI_TPM_TCM <32>
CLK_SIO_14M <39>
CLK_PCIE_EMB<28>
CLK_PCIE_EMB#<28>
EMBCLK_REQ#<28>
CLK_PCIE_MMI#<33>
CLK_PCIE_MMI<33>
SML1_SMBCLK <40>
LAN_SMBCLK <31>
MMICLK_REQ#<33>
PCLK_80H <34>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (2/8)
15 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (2/8)
15 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (2/8)
15 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
EXPRESS Card--->
Express card--->
MiniWLAN (Mini Card 2)--->
MiniWWAN (Mini Card 1)--->
E3 Module Bay--->
MiniWLAN (Mini Card 2)--->
10/100/1G LAN --->
1/2vMINI CARD-3 PCIE
(Mini Card 3)--->
MiniWPAN (Mini Card 3)--->
MiniWWAN (Mini Card 1)--->
10/100/1G LAN --->
CLOCK TERMINATION for FCIM and need close to PCH
MMI --->
eModule Bay--->
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
MMI Card--->
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Follow DG0.9 Device
down & Express/Mini
card topology
RF request
CH18
12P_0402_50V8J~D
CH18
12P_0402_50V8J~D
1
2
RH183 10K_0402_5%~DRH183 10K_0402_5%~D
1 2
RH152 10K_0402_5%~DRH152 10K_0402_5%~D
12
RH300 1K_0402_1%~DRH300 1K_0402_1%~D
12
RH104 10K_0402_5%~DRH104 10K_0402_5%~D
12
RH99
1M_0402_5%~D
RH99
1M_0402_5%~D
12
RH87 10K_0402_5%~DRH87 10K_0402_5%~D
1 2
RH94 10K_0402_5%~DRH94 10K_0402_5%~D
12
RH309 0_0402_5%~DRH309 0_0402_5%~D
12
RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D
12
RH79 10K_0402_5%~DRH79 10K_0402_5%~D
1 2
QH5B
DMN66D0LDW-7_SOT363-6~D
QH5B
DMN66D0LDW-7_SOT363-6~D
3
5
4
RH311 22_0402_5%~DRH311 22_0402_5%~D
12
RH91 10K_0402_5%~DRH91 10K_0402_5%~D
1 2
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
UH4B
BD82PPSM-QNHN-A0_BGA989~D
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
UH4B
BD82PPSM-QNHN-A0_BGA989~D
PERN1
BG34
PERP1
BJ34
PERN2
BE34
PERP2
BF34
PERN3
BG36
PERP3
BJ36
PERN4
BF36
PERP4
BE36
PERN5
BG37
PERP5
BH37
PERN6
BJ38
PERP6
BG38
PERN7
BG40
PERP7
BJ40
PERN8
BE38
PERP8
BC38
PETN1
AV32
PETP1
AU32
PETN2
BB32
PETP2
AY32
PETN3
AV34
PETP3
AU34
PETN4
AY34
PETP4
BB34
PETN5
AY36
PETP5
BB36
PETN6
AU36
PETP6
AV36
PETN7
AY40
PETP7
BB40
PETN8
AW38
PETP8
AY38
CLKOUT_PCIE0N
Y40
CLKOUT_PCIE0P
Y39
CLKOUT_PCIE1N
AB49
CLKOUT_PCIE1P
AB47
CLKOUT_PCIE2N
AA48
CLKOUT_PCIE2P
AA47
CLKOUT_PCIE3N
Y37
CLKOUT_PCIE3P
Y36
CLKOUT_PCIE4N
Y43
CLKOUT_PCIE4P
Y45
CLKOUT_PCIE5N
V45
CLKOUT_PCIE5P
V46
CLKIN_GND1_N BJ30
CLKIN_GND1_P BG30
CLKIN_DMI_N BF18
CLKIN_DMI_P BE18
CLKIN_DOT_96N G24
CLKIN_DOT_96P E24
CLKIN_SATA_N AK7
CLKIN_SATA_P AK5
XTAL25_IN V47
XTAL25_OUT V49
REFCLK14IN K45
CLKIN_PCILOOPBACK H45
CLKOUT_PEG_A_N AB37
CLKOUT_PEG_A_P AB38
PEG_A_CLKRQ# / GPIO47 M10
PCIECLKRQ0# / GPIO73
J2
PCIECLKRQ1# / GPIO18
M1
PCIECLKRQ2# / GPIO20
V10
PCIECLKRQ3# / GPIO25
A8
PCIECLKRQ4# / GPIO26
L12
PCIECLKRQ5# / GPIO44
L14
CLKOUTFLEX0 / GPIO64 K43
CLKOUTFLEX1 / GPIO65 F47
CLKOUTFLEX2 / GPIO66 H47
CLKOUTFLEX3 / GPIO67 K49
CLKOUT_DMI_N AV22
CLKOUT_DMI_P AU22
PEG_B_CLKRQ# / GPIO56
E6
CLKOUT_PEG_B_P
AB40 CLKOUT_PEG_B_N
AB42
XCLK_RCOMP Y47
CLKOUT_DP_P AM13
CLKOUT_DP_N AM12
CLKOUT_PCIE6N
V40
CLKOUT_PCIE6P
V42
PCIECLKRQ7# / GPIO46
K12
CLKOUT_PCIE7N
V38
CLKOUT_PCIE7P
V37
CLKOUT_ITPXDP_N
AK14
CLKOUT_ITPXDP_P
AK13
SMBALERT# / GPIO11 E12
SMBCLK H14
SMBDATA C9
SML0ALERT# / GPIO60 A12
SML0CLK C8
SML0DATA G12
SML1ALERT# / PCHHOT# / GPIO74 C13
SML1CLK / GPIO58 E14
SML1DATA / GPIO75 M16
CL_CLK1 M7
CL_DATA1 T11
CL_RST1# P10
PCIECLKRQ6# / GPIO45
T13
QH5A
DMN66D0LDW-7_SOT363-6~D
QH5A
DMN66D0LDW-7_SOT363-6~D
6 1
2
RH81 10K_0402_5%~DRH81 10K_0402_5%~D
12
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
1 2
RH304 10K_0402_5%~DRH304 10K_0402_5%~D
12
RH98 10K_0402_5%~DRH98 10K_0402_5%~D
1 2
RH313 22_0402_5%~DRH313 22_0402_5%~D
12
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D
12
RH315 22_0402_5%~D@RH315 22_0402_5%~D@12
RH74 10K_0402_5%~DRH74 10K_0402_5%~D
1 2
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D
1 2
RH75 10K_0402_5%~DRH75 10K_0402_5%~D
1 2
CH113
27P_0402_50V8J~D
@CH113
27P_0402_50V8J~D
@
1
2
CH111
27P_0402_50V8J~D
@CH111
27P_0402_50V8J~D
@
1
2
CH19
12P_0402_50V8J~D
CH19
12P_0402_50V8J~D
1
2
RH77 10K_0402_5%~DRH77 10K_0402_5%~D
1 2
CH112
27P_0402_50V8J~D
@CH112
27P_0402_50V8J~D
@
1
2
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D
1 2
YH2
25MHZ_10PF_Q22FA2380049900~D
YH2
25MHZ_10PF_Q22FA2380049900~D
IN 1
GND 2
OUT
3
GND
4
RH301 10K_0402_5%~DRH301 10K_0402_5%~D
12
RH80 10K_0402_5%~DRH80 10K_0402_5%~D
12
RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D
12
RH78 10K_0402_5%~DRH78 10K_0402_5%~D
1 2
RH97 10K_0402_5%~DRH97 10K_0402_5%~D
12
RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D
12
RH314 22_0402_5%~DRH314 22_0402_5%~D
12
RH76 10K_0402_5%~DRH76 10K_0402_5%~D
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_PCIE_WAKE#
CLKRUN#
SIO_SLP_LAN#
ME_SUS_PWR_ACK
PCH_RI#
CRT_IREF
PCH_CRT_DDC_DAT
PCH_CRT_DDC_CLK
HSYNC
VSYNC
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
BIA_PWM_PCH
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_LSYNC0
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
PANEL_BKEN_PCH
SYS_PWROK_R
SIO_PWRBTN#_R
PCH_BATLOW#
DMI_COMP_R
PCH_RI#
DMI_CRX_PTX_N1
DMI_CRX_PTX_P0
DMI_CRX_PTX_P3
DMI_CTX_PRX_P0
DMI_CRX_PTX_N2
DMI_CRX_PTX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_P2
DMI_CTX_PRX_N1
DMI_CRX_PTX_N0
DMI_CTX_PRX_N0
DMI_CTX_PRX_P1
DMI_CRX_PTX_N3
XDP_DBRESET#
PCH_PWROK
AC_PRESENT
SUSACK#_R
PM_APWROK_R
RBIAS_CPY
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SUSCLK
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SIO_SLP_SUS#
SUS_STAT#/LPCPD#
SIO_SLP_LAN#
H_PM_SYNC
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
SUS_STAT#/LPCPD#
PM_DRAM_PWRGD_R
LCD_ACLK+_PCH
LCD_ACLK-_PCH
LCD_A2-_PCH
LCD_A0-_PCH
LCD_A1-_PCH
LCD_A0+_PCH
LCD_A2+_PCH
LCD_A1+_PCH
LVD_IBG
LDDC_CLK_PCH
LDDC_DATA_PCH
PCH_DPWROK PCH_RSMRST#_R
ME_SUS_PWR_ACK_R SUSACK#_R
SYS_PWROKRESET_OUT#
DSWODVREN
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
PCH_RSMRST#_Q
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
+3.3V_ALW _PCH
+3.3V_RUN
+1.05V_RUN
+3.3V_ALW _PCH
+RTC_CELL
+3.3V_RUN
+3.3V_RUN
PCH_CRT_BLU<24>
PCH_CRT_GRN<24>
PCH_CRT_RED<24>
BIA_PWM_PCH<23>
ENVDD_PCH<23,39>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC1 <6>
FDI_LSYNC0 <6>
FDI_CTX_PRX_N0 <6>
FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N3 <6>
FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N5 <6>
FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P1 <6>
FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P3 <6>
FDI_CTX_PRX_P4 <6>
FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P6 <6>
FDI_CTX_PRX_P7 <6>
PANEL_BKEN_PCH<23>
RESET_OUT#<40>
XDP_DBRESET#<7,14>
SIO_PWRBTN#<40>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6>
DMI_CTX_PRX_P1<6>
DMI_CTX_PRX_P2<6>
DMI_CRX_PTX_N2<6>
DMI_CRX_PTX_N1<6>
DMI_CTX_PRX_N1<6>
DMI_CTX_PRX_N0<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_N2<6>
DMI_CRX_PTX_P3<6>
DMI_CRX_PTX_P2<6>
DMI_CRX_PTX_P1<6>
PM_APWROK<40>
SIO_PWRBTN#_R<7,14>
AC_PRESENT<40>
SUSACK#<39> PCH_DPWROK <39>
PCH_PCIE_WAKE# <40>
SIO_SLP_S4# <39>
SIO_SLP_S3# <11,27,35,39,42,48>
SIO_SLP_S5# <40>
H_PM_SYNC <7>
SIO_SLP_A# <39,42,49>
SIO_SLP_LAN# <31,39>
CLKRUN# <32,39,40>
SIO_SLP_SUS# <39>
PCH_RSMRST#_Q<14,41>
ME_SUS_PWR_ACK<40>
PCH_CRT_DDC_DAT <24>
SYS_PWROK<7,39>
PM_DRAM_PWRGD<7>
PCH_CRT_HSYNC<24>
PCH_CRT_VSYNC<24>
PCH_CRT_DDC_CLK <24>
LCD_ACLK-_PCH<23>
LCD_ACLK+_PCH<23>
LCD_A0-_PCH<23>
LCD_A1-_PCH<23>
LCD_A2-_PCH<23>
LCD_A2+_PCH<23>
LCD_A0+_PCH<23>
LCD_A1+_PCH<23>
LDDC_DATA_PCH<23>
LDDC_CLK_PCH<23>
DPC_PCH_LANE_N0 <38>
DPC_PCH_LANE_N1 <38>
DPC_PCH_LANE_N2 <38>
DPC_PCH_LANE_N3 <38>
DPC_PCH_LANE_P0 <38>
DPC_PCH_LANE_P1 <38>
DPC_PCH_LANE_P2 <38>
DPC_PCH_LANE_P3 <38>
DPC_PCH_DOCK_AUX <26>
DPC_PCH_DOCK_HPD <38>
DPC_PCH_DOCK_AUX# <26>
PCH_DDPC_CTRLDATA <26>
PCH_DDPC_CTRLCLK <26>
DPD_PCH_LANE_P0 <38>
DPD_PCH_LANE_P1 <38>
DPD_PCH_LANE_P2 <38>
DPD_PCH_LANE_P3 <38>
PCH_DDPD_CTRLDATA <26>
PCH_DDPD_CTRLCLK <26>
DPD_PCH_DOCK_AUX <26>
DPD_PCH_DOCK_HPD <38>
DPD_PCH_LANE_N0 <38>
DPD_PCH_LANE_N1 <38>
DPD_PCH_LANE_N2 <38>
DPD_PCH_LANE_N3 <38>
DPD_PCH_DOCK_AUX# <26>
TMDSB_PCH_CLK# <25>
TMDSB_PCH_N0 <25>
TMDSB_PCH_N1 <25>
TMDSB_PCH_N2 <25>
TMDSB_PCH_P1 <25>
TMDSB_PCH_P2 <25>
TMDSB_PCH_CLK <25>
TMDSB_PCH_P0 <25>
HDMIB_PCH_HPD <25>
PCH_SDVO_CTRLDATA <25>
PCH_SDVO_CTRLCLK <25>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (3/8)
16 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (3/8)
16 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (3/8)
16 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
DSWODVREN - On Die DSW VR Enable
HIGH: RH127 STUFFED,
RH129 UNSTUFFED
Enabled (DEFAULT)
Disabled
LOW: RH129 STUFFED,
RH127 UNSTUFFED
Minimum speacing of 20mils for LVD_IBG
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DMI
FDI
System Power Management
UH4C
BD82PPSM-QNHN-A0_BGA989~D
DMI
FDI
System Power Management
UH4C
BD82PPSM-QNHN-A0_BGA989~D
DMI0RXN
BC24
DMI1RXN
BE20
DMI2RXN
BG18
DMI3RXN
BG20
DMI0RXP
BE24
DMI1RXP
BC20
DMI2RXP
BJ18
DMI3RXP
BJ20
DMI0TXN
AW24
DMI1TXN
AW20
DMI2TXN
BB18
DMI3TXN
AV18
DMI0TXP
AY24
DMI1TXP
AY20
DMI2TXP
AY18
DMI3TXP
AU18
DMI_ZCOMP
BJ24
DMI_IRCOMP
BG25
FDI_RXN0 BJ14
FDI_RXN1 AY14
FDI_RXN2 BE14
FDI_RXN3 BH13
FDI_RXN4 BC12
FDI_RXN5 BJ12
FDI_RXN6 BG10
FDI_RXN7 BG9
FDI_RXP0 BG14
FDI_RXP1 BB14
FDI_RXP2 BF14
FDI_RXP3 BG13
FDI_RXP4 BE12
FDI_RXP5 BG12
FDI_RXP6 BJ10
FDI_RXP7 BH9
FDI_FSYNC0 AV12
FDI_FSYNC1 BC10
FDI_LSYNC0 AV14
FDI_LSYNC1 BB10
FDI_INT AW16
PMSYNCH AP14
SLP_SUS# G16
SLP_S3# F4
SLP_S4# H4
SLP_S5# / GPIO63 D10
SYS_RESET#
K3
SYS_PWROK
P12
PWRBTN#
E20
RI#
A10
WAKE# B9
SUS_STAT# / GPIO61 G8
SUSCLK / GPIO62 N14
ACPRESENT / GPIO31
H20
BATLOW# / GPIO72
E10
PWROK
L22
CLKRUN# / GPIO32 N3
SUSWARN#/SUSPWRDNACK/GPIO30
K16
RSMRST#
C21
DRAMPWROK
B13
SLP_LAN# / GPIO29 K14
APWROK
L10
DPWROK E22
DMI2RBIAS
BH21
SLP_A# G10
DSWVRMEN A18
SUSACK#
C12
RH133 150_0402_1%~DRH133 150_0402_1%~D
1 2
T61 PAD~DT61 PAD~D
RH123 20_0402_1%~DRH123 20_0402_1%~D
1 2
T58 PAD~DT58 PAD~D
LVDS
Digital Display Interface
CRT
UH4D
BD82PPSM-QNHN-A0_BGA989~D
LVDS
Digital Display Interface
CRT
UH4D
BD82PPSM-QNHN-A0_BGA989~D
L_BKLTCTL
P45
L_BKLTEN
J47
L_CTRL_CLK
T45
L_CTRL_DATA
P39
L_DDC_CLK
T40
L_DDC_DATA
K47
L_VDD_EN
M45
LVDSA_CLK#
AK39
LVDSA_CLK
AK40
LVDSA_DATA#0
AN48
LVDSA_DATA#1
AM47
LVDSA_DATA#2
AK47
LVDSA_DATA#3
AJ48
LVDSA_DATA0
AN47
LVDSA_DATA1
AM49
LVDSA_DATA2
AK49
LVDSA_DATA3
AJ47
LVDSB_CLK#
AF40
LVDSB_CLK
AF39
LVDSB_DATA#0
AH45
LVDSB_DATA#1
AH47
LVDSB_DATA#2
AF49
LVDSB_DATA#3
AF45
LVDSB_DATA0
AH43
DDPB_0N AV42
DDPB_1N AV45
LVD_VREFH
AE48
LVD_VREFL
AE47
DDPD_2N BF42
DDPD_3N BJ42
DDPB_2N AU48
DDPB_3N AV47
DDPC_0N AY47
DDPC_1N AY43
DDPC_2N BA47
DDPC_3N BB47
DDPD_0N BB43
DDPD_1N BF44
DDPB_0P AV40
DDPB_1P AV46
DDPD_2P BE42
DDPD_3P BG42
DDPB_2P AU47
DDPB_3P AV49
LVDSB_DATA1
AH49
LVDSB_DATA2
AF47
LVDSB_DATA3
AF43
LVD_IBG
AF37
LVD_VBG
AF36
DDPC_1P AY45
DDPC_0P AY49
DDPC_2P BA48
DDPC_3P BB49
DDPD_0P BB45
DDPD_1P BE44
CRT_BLUE
N48
CRT_DDC_CLK
T39
CRT_DDC_DATA
M40
CRT_GREEN
P49
CRT_HSYNC
M47
CRT_IRTN
T42
CRT_RED
T49
CRT_VSYNC
M49
DAC_IREF
T43
SDVO_CTRLCLK P38
SDVO_CTRLDATA M39
DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
DDPD_CTRLCLK M43
DDPD_CTRLDATA M36
DDPB_AUXN AT49
DDPC_AUXN AP47
DDPD_AUXN AT45
DDPB_AUXP AT47
DDPC_AUXP AP49
DDPD_AUXP AT43
DDPB_HPD AT40
DDPC_HPD AT38
DDPD_HPD BH41
SDVO_TVCLKINP AP45
SDVO_TVCLKINN AP43
SDVO_STALLP AM40
SDVO_STALLN AM42
SDVO_INTP AP40
SDVO_INTN AP39
RH318 10K_0402_5%~D@RH318 10K_0402_5%~D@
1 2
RH122 0_0402_5%~DRH122 0_0402_5%~D
1 2
RH351 2.2K_0402_5%~DRH351 2.2K_0402_5%~D
12
T60 PAD~DT60 PAD~D
RH142 10K_0402_5%~DRH142 10K_0402_5%~D
1 2
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~D
1 2
RH118 0_0402_5%~DRH118 0_0402_5%~D
1 2
RH132 150_0402_1%~DRH132 150_0402_1%~D
1 2
RH320 0_0402_5%~DRH320 0_0402_5%~D
1 2
RH319 10K_0402_5%~D@RH319 10K_0402_5%~D@
1 2
RH111 49.9_0402_1%~DRH111 49.9_0402_1%~D
1 2
RH127 330K_0402_1%~DRH127 330K_0402_1%~D
1 2
RH121 0_0402_5%~DRH121 0_0402_5%~D
1 2
T57 PAD~DT57 PAD~D
RH323 0_0402_5%~DRH323 0_0402_5%~D
1 2
RH140 10K_0402_5%~DRH140 10K_0402_5%~D
1 2
RH124 20_0402_1%~DRH124 20_0402_1%~D
1 2
T63 PAD~DT63 PAD~D
RH137 8.2K_0402_5%~DRH137 8.2K_0402_5%~D
1 2
RH316
2.2K_0402_5%~D
RH316
2.2K_0402_5%~D
12
RH113 0_0402_5%~DRH113 0_0402_5%~D
1 2
T59 PAD~DT59 PAD~D
RH322 10K_0402_5%~D@RH322 10K_0402_5%~D@
1 2
RH120 0_0402_5%~DRH120 0_0402_5%~D
1 2
RH129 330K_0402_1%~D@RH129 330K_0402_1%~D@
1 2
RH131 150_0402_1%~DRH131 150_0402_1%~D
1 2
RH134 100K_0402_5%~DRH134 100K_0402_5%~D
1 2
RH117 0_0402_5%~DRH117 0_0402_5%~D
1 2
T62 PAD~DT62 PAD~D
T56 PAD~DT56 PAD~D
RH144 10K_0402_5%~DRH144 10K_0402_5%~D
1 2
RH321 0_0402_5%~D@RH321 0_0402_5%~D@
1 2
RH317
2.2K_0402_5%~D
RH317
2.2K_0402_5%~D
12
RH126
1K_0402_0.5%~D
RH126
1K_0402_0.5%~D
12
RH112 750_0402_1%~DRH112 750_0402_1%~D
1 2
RH344 2.37K_0402_1%~DRH344 2.37K_0402_1%~D
1 2
RH116 0_0402_5%~DRH116 0_0402_5%~D
1 2
RH114 0_0402_5%~D@RH114 0_0402_5%~D@
1 2
RH352 2.2K_0402_5%~DRH352 2.2K_0402_5%~D
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAM_MIC_CBL_DET#
PCH_PLTRST#
PCH_PLTRST#_EC
USBP10+
USBP10-
USBP11+
USBP11-
USBP9+
USBP0-
USBP0+
USBP3+
USBP5+
USBP7+
USBP3-
USBP1-
USBP9-
USBP8-
USBP8+
USBP5-
USBP7-
USBP4-
USBP4+
USBP1+
USBRBIAS
USB_OC4#_R
USB_OC3#
USB_OC1#_R
USB_OC0#_R
USB_OC6#
USB_OC5#
PCI_GNT3#
USB_OC2#
BBS_BIT1
BT_DET#
USBP6+
USBP6-
USB_OC0#_R
USB_OC2#
USB_OC3#
USB_OC5#
USB_OC6#
USB_OC4#
USB_OC1#_R
PCI_REQ1#
PCH_PLTRST#
LCD_CBL_DET#
BT_DET#
PCI_GNT3#
FFS_PCH_INT
PCI_LOOPBACKOUT
PCI_MEC
PCI_5048
PCI_DOCK
BBS_BIT1
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQB#
CAM_MIC_CBL_DET#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
USBP12+
USBP12-
SIO_EXT_SMI#
SIO_EXT_SMI#
PCH_GPIO3
PCH_GPIO3
USB_OC4#_R
CLK_PCI_MEC
CLK_PCI_5048
CLK_PCI_DOCK
CLK_PCI_LOOPBACK
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
PCH_PLTRST#_EC <32,34,35,39,40>
USBP10+ <35>
USBP10- <35>
USBP11+ <41>
USBP11- <41>
USBP4+ <34>
USBP5- <34>
USBP3+ <38>
USBP5+ <34>
USBP4- <34>
USBP3- <38>
USBP1+ <36>
USBP1- <36>
USBP0- <36>
USBP0+ <36>
USBP7+ <32>
USBP7- <32>
USBP8+ <38>
USBP8- <38>
USBP9+ <37>
USBP9- <37>
USB_OC0# <36>
USBP6- <34>
USBP6+ <34>
LCD_CBL_DET#<23>
PCIE_MCARD2_DET#<34>
BT_DET#<41>
HDD_FALL_INT<27>
CLK_PCI_MEC<40>
CLK_PCI_5048<39>
CLK_PCI_LOOPBACK<15>
CLK_PCI_DOCK<38>
PLTRST_LAN#<31>
PLTRST_USH#<32>
PLTRST_MMI#<33>
PLTRST_XDP#<7>
USBP12- <23>
USBP12+ <23>
PCH_PLTRST#<7,14>
PLTRST_EMB#<28>
SIO_EXT_SMI# <40>
USB3RN1<36>
USB3TN1<36>
USB3TP1<36>
USB3RP1<36>
USB3RN2<36>
USB3RP2<36>
USB3TN2<36>
USB3TP2<36>
USB3RN4<38>
USB3RP4<38>
USB3TN4<38>
USB3TP4<38>
USB_OC4# <36>
CAM_MIC_CBL_DET#<23>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (4/8)
17 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (4/8)
17 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (4/8)
17 56Thursday, June 23, 2011
Compal Electronics, Inc.
Within 500 mils
DELL CONFIDENTIAL/PROPRIETARY
A16 swap override Strap/Top-Block
PCI_GNT#3
Swap Override jumper
Low = A16 swap
High = Default
Boot BIOS Strap
SATA_SLPD
(BBS_BIT0)
BBS_BIT1 Boot BIOS Location
0 0
Reserved (NAND)
PCI
SPI
LPC
0 1
1 0
1 1
*
INTEL feedback 0307
----->Camera
----->Right side E-SATA
----->MLK DOCK
----->USH
----->Blue Tooth
----->Express Card
----->PP
----->WLAN/WIMAX
----->Right Side
----->WWAN/UWB
----->DOCK
----->Rear Left side
RF request
RH333
1K_0402_1%~D
@RH333
1K_0402_1%~D
@
12
RH356 0_0402_5%~DRH356 0_0402_5%~D
1 2
RH332 10K_0402_5%~D@RH332 10K_0402_5%~D@
1 2
RH151
22.6_0402_1%~D
RH151
22.6_0402_1%~D
1 2
CH107
27P_0402_50V8J~D
@CH107
27P_0402_50V8J~D
@
1
2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
CH109
27P_0402_50V8J~D
@CH109
27P_0402_50V8J~D
@
1
2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
1 2
RPH1
10K_1206_8P4R_5%~D
RPH1
10K_1206_8P4R_5%~D
1 8
2 7
3 6
4 5
RH338 0_0402_5%~DRH338 0_0402_5%~D
1 2
RH337 0_0402_5%~DRH337 0_0402_5%~D
1 2
RH339 0_0402_5%~DRH339 0_0402_5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_0402_5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D
1 2
CH108
27P_0402_50V8J~D
@CH108
27P_0402_50V8J~D
@
1
2
RH335 0_0402_5%~DRH335 0_0402_5%~D
1 2
RH334 0_0402_5%~DRH334 0_0402_5%~D
1 2
RSVD
PCI
USB
USB30
UH4E
BD82PPSM-QNHN-A0_BGA989~D
RSVD
PCI
USB
USB30
UH4E
BD82PPSM-QNHN-A0_BGA989~D
RSVD23 AV5
RSVD1 AY7
RSVD2 AV7
RSVD3 AU3
RSVD4 BG4
RSVD5 AT10
RSVD6 BC8
RSVD7 AU2
RSVD8 AT4
RSVD17 BB5
RSVD18 BB3
RSVD19 BB7
RSVD20 BE8
RSVD21 BD4
RSVD22 BF6
RSVD9 AT3
RSVD10 AT1
RSVD11 AY3
RSVD12 AT5
RSVD13 AV3
RSVD14 AV1
RSVD15 BB1
RSVD16 BA3
RSVD25 AT8
RSVD24 AV10
RSVD26 AY5
RSVD27 BA2
RSVD28 AT12
RSVD29 BF3
PIRQA#
K40
PIRQB#
K38
PIRQC#
H38
PIRQD#
G38
REQ1# / GPIO50
C46
REQ2# / GPIO52
C44
REQ3# / GPIO54
E40
GNT1# / GPIO51
D47
GNT2# / GPIO53
E42
GNT3# / GPIO55
F46
PIRQE# / GPIO2
G42
PIRQF# / GPIO3
G40
PIRQG# / GPIO4
C42
PIRQH# / GPIO5
D44
USBP0N C24
USBP0P A24
USBP1N C25
USBP1P B25
USBP2N C26
USBP2P A26
USBP3N K28
USBP3P H28
USBP4N E28
USBP4P D28
USBP5N C28
USBP5P A28
USBP6N C29
USBP6P B29
USBP7N N28
USBP7P M28
USBP8N L30
USBP8P K30
USBP9N G30
USBP9P E30
USBP10N C30
USBP10P A30
USBP11N L32
USBP11P K32
USBP12N G32
USBP12P E32
USBP13N C32
USBP13P A32
PME#
K10
CLKOUT_PCI0
H49
CLKOUT_PCI1
H43
CLKOUT_PCI2
J48
USBRBIAS# C33
USBRBIAS B33
OC0# / GPIO59 A14
OC1# / GPIO40 K20
OC2# / GPIO41 B17
OC3# / GPIO42 C16
OC4# / GPIO43 L16
OC5# / GPIO9 A16
OC6# / GPIO10 D14
OC7# / GPIO14 C14
CLKOUT_PCI4
H40 CLKOUT_PCI3
K42
PLTRST#
C6
TP1
BG26
TP2
BJ26
TP3
BH25
TP6
AH38
TP7
AH37
TP8
AK43
TP9
AK45
TP16
Y13
TP17
K24
TP18
L24
TP19
AB46
TP20
AB45
TP21
B21
TP22
M20
TP23
AY16
USB3Rn1
BE28
USB3Rn2
BC30
USB3Rn3
BE32
USB3Rn4
BJ32
USB3Rp1
BC28
USB3Rp2
BE30
USB3Rp3
BF32
USB3Rp4
BG32
USB3Tn1
AV26
USB3Tn2
BB26
USB3Tn3
AU28
USB3Tn4
AY30
USB3TP1
AU26
USB3Tp2
AY26
USB3Tp3
AV28
USB3Tp4
AW30
TP4
BJ16
TP5
BG16
TP15
AM5 TP14
AM4 TP13
AH12 TP12
H3 TP11
N30 TP10
C18
TP24
BG46
RPH2
10K_1206_8P4R_5%~D
RPH2
10K_1206_8P4R_5%~D
1 8
2 7
3 6
4 5
RH331 10K_0402_5%~DRH331 10K_0402_5%~D
1 2
RH105 22_0402_5%~DRH105 22_0402_5%~D
12
CH102
0.1U_0402_25V6K~D
CH102
0.1U_0402_25V6K~D
1 2
RH340 0_0402_5%~DRH340 0_0402_5%~D
1 2
RH336 0_0402_5%~DRH336 0_0402_5%~D
1 2
RH103 22_0402_5%~DRH103 22_0402_5%~D
1 2
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
CH110
27P_0402_50V8J~D
@CH110
27P_0402_50V8J~D
@
1
2
RH160 22_0402_5%~DRH160 22_0402_5%~D
12
RH342
1K_0402_1%~D
@RH342
1K_0402_1%~D
@
12
T104PAD~D @T104PAD~D @
UH3
TC7SH08FU_SSOP5~D
UH3
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
RH327 10K_0402_5%~DRH327 10K_0402_5%~D
1 2
RH102 22_0402_5%~DRH102 22_0402_5%~D
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SIO_A20GATE
SIO_RCIN#
PM_LANPHY_ENABLE
MEDIA_DET#
TPM_ID0
PCH_GPIO17
SIO_EXT_SCI#
TPM_ID0
PCH_GPIO37
PCH_GPIO36
PCH_GPIO37
TEMP_ALERT#
TPM_ID1
PCH_GPIO17
TEMP_ALERT#
SIO_EXT_SCI#_R
TPM_ID1
USB_MCARD1_DET#
FFS_INT2
IO_LOOP#
IO_LOOP#
PCH_GPIO7
VSS_NCTF_32
VSS_NCTF_17
VSS_NCTF_29
VSS_NCTF_26
VSS_NCTF_25
VSS_NCTF_23
VSS_NCTF_15
VSS_NCTF_20
VSS_NCTF_16
VSS_NCTF_18
VSS_NCTF_30
VSS_NCTF_19
VSS_NCTF_21
VSS_NCTF_31
VSS_NCTF_28
VSS_NCTF_24
VSS_NCTF_27
VSS_NCTF_22
H_CPUPWRGD
SIO_RCIN#
PCH_GPIO69
INIT3_3V#
SIO_A20GATE
VSS_NCTF_4
VSS_NCTF_11
VSS_NCTF_5
VSS_NCTF_14
VSS_NCTF_2
VSS_NCTF_8
VSS_NCTF_13
VSS_NCTF_7
VSS_NCTF_9
VSS_NCTF_3
VSS_NCTF_10
VSS_NCTF_12
VSS_NCTF_6
VSS_NCTF_1
PCH_GPIO69
PCH_THRMTRIP#_R
SIO_EXT_WAKE# USH_DET#
EXPRCRD_DET#
CONTACTLESS_DET#
DF_TVS
NC_1
SIO_EXT_SCI#
KB_DET#
MEDIA_DET#
DF_TVSDF_TVS_R
CONTACTLESS_DET#
PCH_GPIO36
PCIE_MCARD3_DET#
KB_DET#
PCH_GPIO15
PCH_GPIO15
SLP_ME_CSW_DEV#
SLP_ME_CSW_DEV#
PCH_GPIO17
PCH_GPIO16
PCH_GPIO37
PCH_GPIO36
PCH_GPIO7
USH_DET#
PCH_GPIO16
PCH_GPIO16
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+1.05V_RUN_VTT
+3.3V_ALW_PCH
+VCCDFTERM
+3.3V_ALW_PCH
+3.3V_ALW_PCH
PM_LANPHY_ENABLE<31>
SIO_EXT_SCI#<40>
PCIE_MCARD1_DET#<34>
TEMP_ALERT#<39>
USB_MCARD1_DET#<34>
FFS_INT2<27>
SIO_A20GATE <40>
H_CPUPWRGD <7>
SIO_RCIN# <40>
IO_LOOP#<30>
MEDIA_DET#<30>
KB_DET#<41>
CONTACTLESS_DET# <32>
PCIE_MCARD3_DET# <34>
SIO_EXT_WAKE#<39>
USB_MCARD2_DET# <34>
SLP_ME_CSW_DEV#<39>
H_SNB_IVB#<7>
EXPRCRD_DET#<35>
USH_DET#<32>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (5/8)
18 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (5/8)
18 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (5/8)
18 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
TPM_ID1TPM_ID0
0
1
0
0
01
1 1
China TPM
USH1.0 (For SSI)
USH2.0
No TPM, No China TPM
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
DMI & FDI Termination Voltage
DF_TVS Set to Vss when LOW
Set to Vcc when HIGH
PLACE RH150 CLOSE TO THE BRANCHING POINT
( TO CPU and NVRAM CONNECTOR)
RH149 need to close to CPU
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE
ENABLED - HIGH DEFAULT
DISABLED - LOW
Note: PCH has internal pull up 20k ohm on
E3_PAID_TS_DET# (GPIO27)
RH53
4.7K_0402_5%~D
RH53
4.7K_0402_5%~D
1 2
RH172 10K_0402_5%~DRH172 10K_0402_5%~D
12
RH177 10K_0402_5%~DRH177 10K_0402_5%~D
12
RH273 1K_0402_1%~D@RH273 1K_0402_1%~D@
12
RH171 10K_0402_5%~D@RH171 10K_0402_5%~D@
12
RH358 1K_0402_1%~DRH358 1K_0402_1%~D
1 2
RH267
10K_0402_5%~D
1@ RH267
10K_0402_5%~D
1@
1 2
CH97
0.1U_0402_25V6K~D
CH97
0.1U_0402_25V6K~D
1
2
RH150 0_0402_5%~DRH150 0_0402_5%~D
1 2
RH178 10K_0402_5%~DRH178 10K_0402_5%~D
1 2
RH149
2.2K_0402_5%~D
RH149
2.2K_0402_5%~D
12
RH266 10K_0402_5%~DRH266 10K_0402_5%~D
12
RH270
10K_0402_5%~D
2@ RH270
10K_0402_5%~D
2@
1 2
RH265 10K_0402_5%~D@RH265 10K_0402_5%~D@
12
RH164 100K_0402_5%~DRH164 100K_0402_5%~D
1 2
RH163 10K_0402_5%~DRH163 10K_0402_5%~D
1 2
RH353
1K_0402_1%~D
@
RH353
1K_0402_1%~D
@
12
T106PAD~D
@
T106PAD~D
@
T108PAD~D @T108PAD~D @
CPU/MISC
NCTF
GPIO
UH4F
BD82PPSM-QNHN-A0_BGA989~D
CPU/MISC
NCTF
GPIO
UH4F
BD82PPSM-QNHN-A0_BGA989~D
GPIO27
E16
GPIO28
P8
GPIO24
E8
GPIO57
D6
LAN_PHY_PWR_CTRL / GPIO12
C4
VSS_NCTF_1
A4
VSS_NCTF_2
A44
VSS_NCTF_3
A45
VSS_NCTF_4
A46
VSS_NCTF_5
A5
VSS_NCTF_6
A6
VSS_NCTF_7
B3
VSS_NCTF_8
B47
VSS_NCTF_9
BD1
VSS_NCTF_10
BD49
VSS_NCTF_11
BE1
VSS_NCTF_12
BE49
TACH2 / GPIO6
H36
TACH0 / GPIO17
D40
TACH3 / GPIO7
E38
SATA3GP / GPIO37
M5
SATA5GP / GPIO49 / TEMP_ALERT#
V3
SCLOCK / GPIO22
T5
SLOAD / GPIO38
N2
SDATAOUT0 / GPIO39
M3
SDATAOUT1 / GPIO48
V13
PROCPWRGD AY11
RCIN# P5
PECI AU16
THRMTRIP# AY10
GPIO8
C10
BMBUSY# / GPIO0
T7
GPIO15
G2
TACH1 / GPIO1
A42
SATA2GP / GPIO36
V8
INIT3_3V# T14
STP_PCI# / GPIO34
K1
GPIO35
K4
SATA4GP / GPIO16
U2
VSS_NCTF_32 F49
A20GATE P4
TACH4 / GPIO68 C40
TACH6 / GPIO70 C41
TACH7 / GPIO71 A40
TACH5 / GPIO69 B41
VSS_NCTF_17 BH3
VSS_NCTF_18 BH47
VSS_NCTF_19 BJ4
VSS_NCTF_20 BJ44
VSS_NCTF_21 BJ45
VSS_NCTF_22 BJ46
VSS_NCTF_23 BJ5
VSS_NCTF_24 BJ6
VSS_NCTF_25 C2
VSS_NCTF_26 C48
VSS_NCTF_27 D1
VSS_NCTF_28 D49
VSS_NCTF_29 E1
VSS_NCTF_30 E49
VSS_NCTF_31 F1
TS_VSS4 AK10
TS_VSS3 AH10
TS_VSS2 AK11
TS_VSS1 AH8
NC_1 P37
VSS_NCTF_13
BF1
VSS_NCTF_14
BF49
VSS_NCTF_15 BG2
VSS_NCTF_16 BG48
DF_TVS AY1
RH263 10K_0402_5%~DRH263 10K_0402_5%~D
1 2
RH271
2.2K_0402_5%~D
4@ RH271
2.2K_0402_5%~D
4@
12
RH268
20K_0402_5%~D
3@ RH268
20K_0402_5%~D
3@
12
RH170 10K_0402_5%~DRH170 10K_0402_5%~D
12
RH256 10K_0402_5%~DRH256 10K_0402_5%~D
12
RH354 1K_0402_1%~DRH354 1K_0402_1%~D
1 2
RH174 10K_0402_5%~DRH174 10K_0402_5%~D
12
RH259 0_0402_5%~DRH259 0_0402_5%~D
1 2
RH158 10K_0402_5%~DRH158 10K_0402_5%~D
12
RH262 56_0402_5%~DRH262 56_0402_5%~D
12
RH269 8.2K_0402_5%~DRH269 8.2K_0402_5%~D
1 2
RH260 1.5K_0402_1%~DRH260 1.5K_0402_1%~D
1 2
RH173 1K_0402_1%~D@RH173 1K_0402_1%~D@
12
RH181 10K_0402_5%~DRH181 10K_0402_5%~D
12
RH272 10K_0402_5%~DRH272 10K_0402_5%~D
1 2
RH203 10K_0402_5%~DRH203 10K_0402_5%~D
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_RUN_VCCCLKDMI
+VCCADAC
+1.8V_RUN_LVDS
+VCCSPI
+VCCAPLLEXP
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
+1.8V_RUN
+VCCDFTERM
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+3.3V_RUN
+1.05V_RUN
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
+3.3V_RUN
+1.05V_RUN_VTT
+1.05V_+1.5V_1.8V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VTT
+3.3V_M
+3.3V_RUN
+1.05V_RUN
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (6/8)
19 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (6/8)
19 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (6/8)
19 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
0.1uH inductor, 200mA
CPN: SHI0110BJ0L
INTEL feedback 0302
INTEL feedback 0307
3.3
1.05
1.05
1.1
1.05
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccASW
VccADAC3
VccADPLLA
VccADPLLB
VccSPI
Voltage Rail
VccCore
VccDMI
1.05
5
3.3
1.05
0.001
0.001
0.001
0.228
0.903
0.063
0.08
0.08
0.047
1.7
0.01
5
Voltage
S0 Iccmax
Current (A)
1.05
VccDSW3_3 0.001
3.3
3.3
VccDIFFCLKN 0.055
1.05VccIO 3.711
1.8 0.002VCCDFTERM
3.3VccRTC 2 (mA)
1.05VccClkDMI 0.07
3.3VccSus3_3
3.3VccSusHDA
0.095
0.01
VccVRM 1.5 0.167
1.05VccSSC
VccALVDS 3.3
1.8VccTX_LVDS 0.04
0.001
0.095
PCH Power Rail Table
CH47
1U_0402_6.3V6K~D
CH47
1U_0402_6.3V6K~D
1
2
PJP66
PAD-OPEN1x1m
PJP66
PAD-OPEN1x1m
1 2
RH202 0_0603_5%~DRH202 0_0603_5%~D
12
LH8
100NH_HK1608R10J-T_5%_0603~D
LH8
100NH_HK1608R10J-T_5%_0603~D
12
CH105
22U_0805_6.3V6M~D
CH105
22U_0805_6.3V6M~D
1
2
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
DFT / SPI HVCMOS
UH4G
BD82PPSM-QNHN-A0_BGA989~D
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
DFT / SPI HVCMOS
UH4G
BD82PPSM-QNHN-A0_BGA989~D
VCCCORE[1]
AA23
VCCCORE[2]
AC23
VCCCORE[3]
AD21
VCCCORE[4]
AD23
VCCCORE[5]
AF21
VCCCORE[6]
AF23
VCCCORE[7]
AG21
VCCCORE[8]
AG23
VCCCORE[9]
AG24
VCCCORE[10]
AG26
VCCCORE[11]
AG27
VCCCORE[12]
AG29
VCCCORE[13]
AJ23
VCCCORE[14]
AJ26
VCCCORE[15]
AJ27
VCCDFTERM[4] AJ17
VCCDFTERM[3] AJ16
VCCIO[17]
AN21
VCCIO[18]
AN26
VCCIO[19]
AN27
VCCIO[20]
AP21
VCCIO[23]
AP26
VCCIO[24]
AT24
VCCIO[15]
AN16
VCCIO[16]
AN17
VCCIO[21]
AP23
VCCIO[22]
AP24
VCCADAC U48
VCCTX_LVDS[1] AM37
VCCTX_LVDS[2] AM38
VCCALVDS AK36
VCCVRM[3] AT16
VCCVRM[2]
AP16
VCCAPLLEXP
BJ22
VccAFDIPLL
BG6
VCCIO[28]
AN19 VCCTX_LVDS[4] AP37
VCCTX_LVDS[3] AP36
VSSADAC U47
VSSALVDS AK37
VCCIO[27]
AP17
VCC3_3[6] V33
VCC3_3[7] V34
VCC3_3[3]
BH29 VCCDFTERM[2] AG17
VCCDFTERM[1] AG16
VCCDMI[1] AT20
VCCIO[25]
AN33
VCCIO[26]
AN34
VCCCORE[16]
AJ29
VCCCORE[17]
AJ31
VCCSPI V1
VCCCLKDMI AB36
VCCDMI[2]
AU20
LH1
BLM18PG181SN1_0603~D
LH1
BLM18PG181SN1_0603~D
12
CH106
10U_0603_6.3V6M~D
@
CH106
10U_0603_6.3V6M~D
@
1
2
CH33
1U_0402_6.3V6K~D
CH33
1U_0402_6.3V6K~D
1
2
CH104
0.01U_0402_16V7K~D
CH104
0.01U_0402_16V7K~D
1
2
CH40
10U_0603_6.3V6M~D
@
CH40
10U_0603_6.3V6M~D
@
1
2
CH31
1U_0402_6.3V6K~D
CH31
1U_0402_6.3V6K~D
1
2
RH197 0_0603_5%~DRH197 0_0603_5%~D
12
CH54
1U_0402_6.3V6K~D
CH54
1U_0402_6.3V6K~D
1
2
CH103
0.01U_0402_16V7K~D
CH103
0.01U_0402_16V7K~D
1
2
CH46
1U_0402_6.3V6K~D
CH46
1U_0402_6.3V6K~D
1
2
CH44
10U_0603_6.3V6M~D
CH44
10U_0603_6.3V6M~D
1
2
CH30
10U_0603_6.3V6M~D
CH30
10U_0603_6.3V6M~D
1
2
CH35
0.1U_0402_10V7K~D
CH35
0.1U_0402_10V7K~D
1
2
CH45
1U_0402_6.3V6K~D
CH45
1U_0402_6.3V6K~D
1
2RH205 0_0603_5%~DRH205 0_0603_5%~D
12
CH49
1U_0402_6.3V6K~D
CH49
1U_0402_6.3V6K~D
1 2
RH204 0_0603_5%~D@RH204 0_0603_5%~D@
12
CH34
0.01U_0402_16V7K~D
CH34
0.01U_0402_16V7K~D
1
2
RH247 1UH_LB2012T1R0M_20%~D
@RH247 1UH_LB2012T1R0M_20%~D
@
1 2
CH52
0.1U_0402_10V7K~D
CH52
0.1U_0402_10V7K~D
1
2
CH48
1U_0402_6.3V6K~D
CH48
1U_0402_6.3V6K~D
1
2
CH43
0.1U_0402_10V7K~D
CH43
0.1U_0402_10V7K~D
1
2
CH50
1U_0402_6.3V6K~D
CH50
1U_0402_6.3V6K~D
1
2
CH51
0.1U_0402_10V7K~D
CH51
0.1U_0402_10V7K~D
1
2
CH32
1U_0402_6.3V6K~D
CH32
1U_0402_6.3V6K~D
1
2
CH36
10U_0603_6.3V6M~D
CH36
10U_0603_6.3V6M~D
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+VCCDSW3_3
+3.3V_RUN_VCC_CLKF33
+3.3V_RUN_VCC_CLKF33
+VCCRTCEXT
+VCCSST
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+VCCSATAPLL
+VCCAPLL_CPY_PCH
+3.3V_RUN+5V_RUN
+3.3V_ALW_PCH+5V_ALW_PCH
+5V_ALW_PCH+5V_ALW
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_RUN
+1.05V_M
+3.3V_ALW_PCH
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+1.05V_M
+3.3V_ALW_PCH
+3.3V_RUN
+1.05V_RUN
+1.05V_RUN_VTT
+RTC_CELL
+1.05V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
+3.3V_ALW2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
+1.05V_RUN
ALW_ENABLE<42>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (7/8)
20 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (7/8)
20 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (7/8)
20 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
CRB 0.7 RH208,RH213 trace width 20mil.
Note: Place VCCDIFFCLKN with a trace
specially for XCLK_RCOMP (RH100.2)
Note: If EMI concern, pop
with SHI00008S0L, 10UH +-20%
CH85
4.7U_0603_6.3V6K~D
CH85
4.7U_0603_6.3V6K~D
1
2
CH66
0.1U_0402_10V7K~D
CH66
0.1U_0402_10V7K~D
1
2
CH71
1U_0603_10V7K~D
CH71
1U_0603_10V7K~D
1
2
CH92
1U_0402_6.3V6K~D
CH92
1U_0402_6.3V6K~D
1
2
RH278
20K_0402_5%~D
RH278
20K_0402_5%~D
12
+
CH95
220U_B2_2.5VM_R35M~D
+
CH95
220U_B2_2.5VM_R35M~D
1
2
CH89
0.1U_0402_10V7K~D
CH89
0.1U_0402_10V7K~D
1
2
CH55
0.1U_0402_10V7K~D
CH55
0.1U_0402_10V7K~D
1
2
CH80
10U_0603_6.3V6M~D
@CH80
10U_0603_6.3V6M~D
@
1
2
DH2
RB751S40T1_SOD523-2~D
DH2
RB751S40T1_SOD523-2~D
21
CH81
1U_0402_6.3V6K~D
CH81
1U_0402_6.3V6K~D
1 2
CH69
1U_0402_6.3V6K~D
CH69
1U_0402_6.3V6K~D
1
2
CH68
1U_0402_6.3V6K~D
CH68
1U_0402_6.3V6K~D
1
2
CH84
0.1U_0402_10V7K~D
CH84
0.1U_0402_10V7K~D
1
2
CH73
10U_0603_6.3V6M~D
@
CH73
10U_0603_6.3V6M~D
@
1
2
CH96
1U_0402_6.3V6K~D
CH96
1U_0402_6.3V6K~D
1
2
CH64
22U_0805_6.3V6M~D
CH64
22U_0805_6.3V6M~D
1
2
+
CH94
220U_B2_2.5VM_R35M~D
+
CH94
220U_B2_2.5VM_R35M~D
1
2
LH3
10UH_LBR2012T100M_20%~D
@LH3
10UH_LBR2012T100M_20%~D
@
1 2
CH59
0.1U_0402_10V7K~D
CH59
0.1U_0402_10V7K~D
1
2
CH60
0.1U_0402_10V7K~D
CH60
0.1U_0402_10V7K~D
1
2
LH5
10UH_LBR2012T100M_20%~D
@LH5
10UH_LBR2012T100M_20%~D
@
1 2
CH72
0.1U_0402_10V7K~D
CH72
0.1U_0402_10V7K~D
1
2
CH93
1U_0402_6.3V6K~D
CH93
1U_0402_6.3V6K~D
1
2
CH82
1U_0402_6.3V6K~D
CH82
1U_0402_6.3V6K~D
1
2
RH208
10_0402_1%~D
RH208
10_0402_1%~D
12
CH77
1U_0402_6.3V6K~D
CH77
1U_0402_6.3V6K~D
1
2
CH76
0.1U_0402_10V7K~D
CH76
0.1U_0402_10V7K~D
1
2
RH201 0_0402_5%~DRH201 0_0402_5%~D
1 2
RH215 0.022_0805_1%RH215 0.022_0805_1%
1 2
CH98
0.1U_0402_10V7K~D
CH98
0.1U_0402_10V7K~D
1
2
CH74
1U_0402_6.3V6K~D
CH74
1U_0402_6.3V6K~D
1
2
CH70
1U_0603_10V7K~D
CH70
1U_0603_10V7K~D
1
2
CH75
0.1U_0402_10V7K~D
CH75
0.1U_0402_10V7K~D
1
2
CH79
1U_0402_6.3V6K~D
CH79
1U_0402_6.3V6K~D
1
2
LH7
10UH_LBR2012T100M_20%~D
LH7
10UH_LBR2012T100M_20%~D
1 2
CH67
1U_0402_6.3V6K~D
CH67
1U_0402_6.3V6K~D
1
2
CH65
22U_0805_6.3V6M~D
CH65
22U_0805_6.3V6M~D
1
2
CH91
0.1U_0402_10V7K~D
CH91
0.1U_0402_10V7K~D
1
2
CH58
10U_0603_6.3V6M~D
@
CH58
10U_0603_6.3V6M~D
@
1
2
CH78
0.1U_0402_10V7K~D
CH78
0.1U_0402_10V7K~D
1
2
RH253 0_0402_5%~D@RH253 0_0402_5%~D@
1 2
G
D
S
QH4
SSM3K7002FU_SC70-3~D
G
D
S
QH4
SSM3K7002FU_SC70-3~D
2
1 3
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
UH4J
BD82PPSM-QNHN-A0_BGA989~D
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
UH4J
BD82PPSM-QNHN-A0_BGA989~D
DCPSUSBYP
V12
VCCASW[1]
AA19
VCCASW[2]
AA21
VCCASW[3]
AA24
VCCASW[5]
AA27
VCCASW[6]
AA29
VCCSUSHDA P32
VCCSUS3_3[6] P24
VCCIO[34] T26
VCCIO[4] AD17
VCCASW[7]
AA31
VCCASW[8]
AC26
VCCASW[9]
AC27
VCCASW[10]
AC29
VCCASW[11]
AC31
VCCASW[12]
AD29
V5REF P34
VCC3_3[4] T34
VCCRTC
A22
VCCSUS3_3[10] V24
VCCSUS3_3[9] V23
VCCSUS3_3[8] T24
VCCSUS3_3[7] T23
VCCIO[2] AC16
VCCADPLLB
BF47
VCCDIFFCLKN[1]
AF33
V5REF_SUS M26
VCCIO[3] AC17
DCPSUS[1]
T17
VCCSSC
AG33
VCCADPLLA
BD47
VCCVRM[4]
Y49
VCCACLK
AD49
DCPRTC
N16
VCCASW[4]
AA26
VCCDIFFCLKN[2]
AF34
VCCIO[7]
AF17
DCPSST
V16
VCCIO[5] AF13
VCCASW[22] T21
VCCASW[23] V21
VCCASW[21] T19
VCC3_3[1] AA16
VCC3_3[8] W16
VCCSUS3_3[2] N20
VCCSUS3_3[3] N22
VCCSUS3_3[4] P20
VCCSUS3_3[5] P22
VCCIO[29] N26
VCCIO[30] P26
VCCIO[31] P28
VCCIO[32] T27
V_PROC_IO
BJ8
VCCIO[33] T29
VCCDIFFCLKN[3]
AG34
VCCASW[13]
AD31
VCCASW[14]
W21
VCCASW[15]
W23
VCCASW[16]
W24
VCCASW[17]
W26
VCCASW[18]
W29
VCCASW[19]
W31
VCCASW[20]
W33
VCCIO[6] AF14
VCCVRM[1] AF11
VCCIO[12] AH13
VCCIO[13] AH14
VCC3_3[2] AJ2
VCCAPLLSATA AK1
DCPSUS[3]
AL24
VCCIO[14]
AL29
DCPSUS[4] AN23
VCCSUS3_3[1] AN24
VCCAPLLDMI2
BH23
DCPSUS[2]
V19
VCCDSW3_3
T16
VCC3_3[5]
T38
CH87
0.1U_0402_10V7K~D
CH87
0.1U_0402_10V7K~D
1
2
CH63
0.1U_0402_10V7K~D
CH63
0.1U_0402_10V7K~D
1
2
DH3
RB751S40T1_SOD523-2~D
DH3
RB751S40T1_SOD523-2~D
21
CH88
0.1U_0402_10V7K~D
CH88
0.1U_0402_10V7K~D
1
2
RH213
10_0402_1%~D
RH213
10_0402_1%~D
12
LH6
10UH_LBR2012T100M_20%~D
LH6
10UH_LBR2012T100M_20%~D
1 2
CH90
1U_0402_6.3V6K~D
CH90
1U_0402_6.3V6K~D
1
2
CH86
0.1U_0402_10V7K~D
CH86
0.1U_0402_10V7K~D
1
2
CH56
1U_0402_6.3V6K~D
CH56
1U_0402_6.3V6K~D
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (8/8)
21 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (8/8)
21 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCH (8/8)
21 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
UH4I
BD82PPSM-QNHN-A0_BGA989~D
UH4I
BD82PPSM-QNHN-A0_BGA989~D
VSS[159]
AY4
VSS[160]
AY42
VSS[161]
AY46
VSS[162]
AY8
VSS[163]
B11
VSS[164]
B15
VSS[165]
B19
VSS[166]
B23
VSS[167]
B27
VSS[168]
B31
VSS[169]
B35
VSS[170]
B39
VSS[171]
B7
VSS[173]
BB12
VSS[174]
BB16
VSS[175]
BB20
VSS[176]
BB22
VSS[177]
BB24
VSS[178]
BB28
VSS[179]
BB30
VSS[180]
BB38
VSS[181]
BB4
VSS[182]
BB46
VSS[183]
BC14
VSS[184]
BC18
VSS[185]
BC2
VSS[186]
BC22
VSS[187]
BC26
VSS[188]
BC32
VSS[189]
BC34
VSS[190]
BC36
VSS[191]
BC40
VSS[192]
BC42
VSS[193]
BC48
VSS[194]
BD46
VSS[195]
BD5
VSS[196]
BE22
VSS[197]
BE26
VSS[198]
BE40
VSS[199]
BF10
VSS[200]
BF12
VSS[201]
BF16
VSS[202]
BF20
VSS[203]
BF22
VSS[204]
BF24
VSS[205]
BF26
VSS[206]
BF28
VSS[207]
BD3
VSS[208]
BF30
VSS[209]
BF38
VSS[210]
BF40
VSS[211]
BF8
VSS[212]
BG17
VSS[213]
BG21
VSS[214]
BG33
VSS[215]
BG44
VSS[216]
BG8
VSS[217]
BH11
VSS[218]
BH15
VSS[219]
BH17
VSS[220]
BH19
VSS[222]
BH27
VSS[223]
BH31
VSS[224]
BH33
VSS[225]
BH35
VSS[226]
BH39
VSS[227]
BH43
VSS[228]
BH7
VSS[229]
D3
VSS[230]
D12
VSS[231]
D16
VSS[232]
D18
VSS[233]
D22
VSS[234]
D24
VSS[235]
D26
VSS[236]
D30
VSS[237]
D32
VSS[264] K7
VSS[265] L18
VSS[266] L2
VSS[267] L20
VSS[268] L26
VSS[269] L28
VSS[270] L36
VSS[271] L48
VSS[272] M12
VSS[273] P16
VSS[274] M18
VSS[275] M22
VSS[276] M24
VSS[277] M30
VSS[278] M32
VSS[279] M34
VSS[280] M38
VSS[281] M4
VSS[282] M42
VSS[283] M46
VSS[284] M8
VSS[285] N18
VSS[286] P30
VSS[288] P11
VSS[289] P18
VSS[290] T33
VSS[291] P40
VSS[292] P43
VSS[293] P47
VSS[294] P7
VSS[295] R2
VSS[296] R48
VSS[297] T12
VSS[298] T31
VSS[299] T37
VSS[300] T4
VSS[301] W34
VSS[302] T46
VSS[303] T47
VSS[304] T8
VSS[305] V11
VSS[306] V17
VSS[307] V26
VSS[308] V27
VSS[309] V29
VSS[310] V31
VSS[311] V36
VSS[312] V39
VSS[313] V43
VSS[314] V7
VSS[315] W17
VSS[316] W19
VSS[238]
D34
VSS[239]
D38
VSS[240]
D42
VSS[241]
D8
VSS[242]
E18
VSS[243]
E26
VSS[244]
G18
VSS[245]
G20
VSS[246]
G26
VSS[247]
G28
VSS[248]
G36
VSS[249]
G48
VSS[250]
H12
VSS[251]
H18
VSS[317] W2
VSS[318] W27
VSS[319] W48
VSS[320] Y12
VSS[321] Y38
VSS[322] Y4
VSS[323] Y42
VSS[324] Y46
VSS[325] Y8
VSS[328] BG29
VSS[329] N24
VSS[330] AJ3
VSS[287] N47
VSS[252]
H22
VSS[253]
H24
VSS[254]
H26
VSS[255]
H30
VSS[256]
H32
VSS[257]
H34
VSS[258]
F3
VSS[262] K39
VSS[263] K46
VSS[259] H46
VSS[260] K18
VSS[261] K26
VSS[331] AD47
VSS[333] B43
VSS[334] BE10
VSS[335] BG41
VSS[337] G14
VSS[338] H16
VSS[340] T36
VSS[342] BG22
VSS[343] BG24
VSS[344] C22
VSS[345] AP13
VSS[172]
F45
VSS[221]
H10
VSS[346] M14
VSS[347] AP3
VSS[348] AP1
VSS[349] BE16
VSS[350] BC16
VSS[351] BG28
VSS[352] BJ28
UH4H
BD82PPSM-QNHN-A0_BGA989~D
UH4H
BD82PPSM-QNHN-A0_BGA989~D
VSS[1]
AA17
VSS[2]
AA2
VSS[3]
AA3
VSS[5]
AA34
VSS[6]
AB11
VSS[7]
AB14
VSS[8]
AB39
VSS[9]
AB4
VSS[10]
AB43
VSS[11]
AB5
VSS[12]
AB7
VSS[13]
AC19
VSS[14]
AC2
VSS[15]
AC21
VSS[16]
AC24
VSS[17]
AC33
VSS[18]
AC34
VSS[19]
AC48
VSS[20]
AD10
VSS[21]
AD11
VSS[22]
AD12
VSS[23]
AD13
VSS[24]
AD19
VSS[25]
AD24
VSS[26]
AD26
VSS[27]
AD27
VSS[28]
AD33
VSS[29]
AD34
VSS[30]
AD36
VSS[31]
AD37
VSS[33]
AD39
VSS[34]
AD4
VSS[35]
AD40
VSS[36]
AD42
VSS[37]
AD43
VSS[38]
AD45
VSS[39]
AD46
VSS[43]
AF10
VSS[44]
AF12
VSS[46]
AD16
VSS[47]
AF16
VSS[48]
AF19
VSS[49]
AF24
VSS[50]
AF26
VSS[51]
AF27
VSS[52]
AF29
VSS[53]
AF31
VSS[54]
AF38
VSS[55]
AF4
VSS[56]
AF42
VSS[57]
AF46
VSS[59]
AF7
VSS[60]
AF8
VSS[61]
AG19
VSS[62]
AG2
VSS[63]
AG31
VSS[64]
AG48
VSS[65]
AH11
VSS[66]
AH3
VSS[67]
AH36
VSS[68]
AH39
VSS[69]
AH40
VSS[70]
AH42
VSS[71]
AH46
VSS[72]
AH7
VSS[73]
AJ19
VSS[76]
AJ33
VSS[77]
AJ34
VSS[78]
AK12
VSS[79]
AK3
VSS[80] AK38
VSS[81] AK4
VSS[82] AK42
VSS[83] AK46
VSS[84] AK8
VSS[85] AL16
VSS[86] AL17
VSS[87] AL19
VSS[88] AL2
VSS[89] AL21
VSS[90] AL23
VSS[91] AL26
VSS[92] AL27
VSS[93] AL31
VSS[96] AL48
VSS[97] AM11
VSS[98] AM14
VSS[99] AM36
VSS[100] AM39
VSS[102] AM45
VSS[103] AM46
VSS[104] AM7
VSS[105] AN2
VSS[106] AN29
VSS[107] AN3
VSS[108] AN31
VSS[109] AP12
VSS[110] AP19
VSS[111] AP28
VSS[112] AP30
VSS[113] AP32
VSS[114] AP38
VSS[116] AP42
VSS[117] AP46
VSS[118] AP8
VSS[119] AR2
VSS[120] AR48
VSS[121] AT11
VSS[122] AT13
VSS[123] AT18
VSS[124] AT22
VSS[125] AT26
VSS[126] AT28
VSS[127] AT30
VSS[128] AT32
VSS[131] AT42
VSS[132] AT46
VSS[133] AT7
VSS[134] AU24
VSS[135] AU30
VSS[136] AV16
VSS[137] AV20
VSS[138] AV24
VSS[139] AV30
VSS[140] AV38
VSS[141] AV4
VSS[142] AV43
VSS[143] AV8
VSS[144] AW14
VSS[145] AW18
VSS[146] AW2
VSS[147] AW22
VSS[148] AW26
VSS[149] AW28
VSS[150] AW32
VSS[151] AW34
VSS[152] AW36
VSS[153] AW40
VSS[154] AW48
VSS[155] AV11
VSS[156] AY12
VSS[157] AY22
VSS[158] AY28
VSS[40]
AD8
VSS[42]
AE3
VSS[45]
AD14
VSS[115] AP4
VSS[0]
H5
VSS[58]
AF5
VSS[32]
AD38
VSS[4]
AA33
VSS[74]
AJ21
VSS[75]
AJ24
VSS[41]
AE2
VSS[129] AT34
VSS[130] AT39
VSS[101] AM43
VSS[95] AL34
VSS[94] AL33

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
REM_DIODE1_P_4022
REM_DIODE1_N_4022
REM_DIODE2_N_4022
BC_INT#_EMC4022
POWER_SW#
FAN1_TACH_FB
VSET_4022
REM_DIODE1_P_4022
REM_DIODE1_N_4022
+VCC_4022
3V_PWROK#
VDD_PWRGD
THERMATRIP2#
VSET_4022
+ADDR_XEN
FAN1_TACH_FB
BC_INT#_EMC4022
POWER_SW#
FAN1_DET#
REM_DIODE2_P_4022
VCP2
THERMATRIP2#
+FAN1_VOUT
FAN1_TACH_FB
FAN1_DET#
THERMATRIP3#
THERMATRIP3#
REM_DIODE2_P_4022
REM_DIODE2_N_4022
FAN1_DET#
+3.3V_M
+RTC_CELL
+3.3V_M
+RTC_CELL
+3.3V_M
+5V_RUN
+3.3V_RUN
+RTC_CELL
+FAN1_VOUT
+FAN1_VOUT
+VCC_4022
+1.05V_RUN_VTT
+3.3V_M
+3.3V_M
DOCK_PWR_SW# <40>
POWER_SW_IN# <40>
BC_CLK_EMC4022 <40>
BC_DAT_EMC4022 <40>
PCH_PWRGD#<40>
BC_INT#_EMC4022 <40>
ACAV_IN <40,53,55>
THERM_STP# <46>
H_THERMTRIP#<7>
MAX8731_IINP<53>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
FAN & Thermal Sensor
22 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
FAN & Thermal Sensor
22 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
FAN & Thermal Sensor
22 56Thursday, June 23, 2011
Compal Electronics, Inc.
Place under CPU
Place C266 close to the Q12 as possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Rest=1400 Tp=94degree
DELL CONFIDENTIAL/PROPRIETARY
(1) DP3/DN3 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14
(2) DP5/DN5 for Skin on Q13, place Q13 close to Vcore VR choke.
SMSC request
Change to EMC4021 for cost saving
Link Done
SMSC request
E
B
C
Q14
MMBT3904WT1G_SC70-3~D
E
B
C
Q14
MMBT3904WT1G_SC70-3~D
2
3 1
R3874.7K_0402_5%~D R3874.7K_0402_5%~D
12
C219
22U_0805_6.3V6M~D
C219
22U_0805_6.3V6M~D
1
2
C271 2200P_0402_50V7K~DC271 2200P_0402_50V7K~D
12
C273
0.1U_0402_25V6K~D
C273
0.1U_0402_25V6K~D
1
2
R390 47K_0402_1%~D@R390 47K_0402_1%~D@
1 2
R388
22_0402_5%~D
R388
22_0402_5%~D
12
R391 1K_0402_1%~DR391 1K_0402_1%~D
1 2
E
B
C
Q16
PMST3904_SOT323-3~D
E
B
C
Q16
PMST3904_SOT323-3~D
2
3 1
10U_0805_10V6K~D
C276
10U_0805_10V6K~D
C276
1
2
R399
2.2K_0402_5%~D
R399
2.2K_0402_5%~D
1 2
D2
RB751S40T1_SOD523-2~D
D2
RB751S40T1_SOD523-2~D
2 1
R395
8.2K_0402_5%~D
R395
8.2K_0402_5%~D
12
C277
100P_0402_50V8J~D
@
C277
100P_0402_50V8J~D
@
1
2
C275
0.1U_0402_25V6K~D
C275
0.1U_0402_25V6K~D
1
2
U10
TC7SH08FU_SSOP5~D
U10
TC7SH08FU_SSOP5~D B1
A2
G
3
O
4
P5
C281 0.1U_0402_25V6K~DC281 0.1U_0402_25V6K~D
1 2
C1179
1U_0402_6.3V6K~D
C1179
1U_0402_6.3V6K~D
1
2
C282
0.1U_0402_25V6K~D
C282
0.1U_0402_25V6K~D
1
2
C305
10U_0603_6.3V6M~D
C305
10U_0603_6.3V6M~D
1
2
C274
1U_0402_6.3V6K~D
C274
1U_0402_6.3V6K~D
1
2
R385 10K_0402_5%~DR385 10K_0402_5%~D
12
C270 2200P_0402_50V7K~DC270 2200P_0402_50V7K~D
1 2
JFAN1
TYCO_2-1775293-4~D
CONN@JFAN1
TYCO_2-1775293-4~D
CONN@
1
1
2
2
3
3
GND
5
GND
6
4
4
E
B
C
Q12
MMBT3904WT1G_SC70-3~D
E
B
C
Q12
MMBT3904WT1G_SC70-3~D
2
3 1
E
B
C
Q13
MMBT3904WT1G_SC70-3~D
E
B
C
Q13
MMBT3904WT1G_SC70-3~D
2
31
C272
100P_0402_50V8J~D
@C272
100P_0402_50V8J~D
@
1
2
R404
10K_0402_5%~D
R404
10K_0402_5%~D
12
R426 10K_0402_5%~DR426 10K_0402_5%~D
12
C280
0.1U_0402_25V6K~D
C280
0.1U_0402_25V6K~D
1
2
C738
0.1U_0402_25V6K~D
C738
0.1U_0402_25V6K~D
1
2
R389 10K_0402_5%~DR389 10K_0402_5%~D
1 2
U6
EMC4022-1-EZK-TR_QFN32_5X5~D
U6
EMC4022-1-EZK-TR_QFN32_5X5~D
VDDH
2
VDDH
3
DP1/VREF_T
24
DN2/DP4
26
FAN_OUT 4
FAN_OUT 5
THERMTRIP2# 17
VDDL
6
SMDATA/BC_DATA 7
SMCLK/BC_CLK 8
POWER_SW# 20
ACAVAIL_CLR 21
DP2/DN4
27
VSET
28
DN1/THERM
23
SYS_SHDN# 19
THERMTRIP3# 18
GPIO2
11
ATF_INT#/BC_IRQ# 9
TACH/GPIO1
10
3V_PWROK#
12
RTC_PWR3V
16
DN3/DP5
29 DP3/DN5
30
VCP
31
ADDR_MODE/XEN 32
VDD 1
VSS 33
VDD_PWRGD
13
GPIO3/PWM/THERMTRIP_SIO
15
VIN
25
TEST1 14
TEST2 22
R402 10K_0402_5%~DR402 10K_0402_5%~D
12
R3934.7K_0402_5%~D R3934.7K_0402_5%~D
1 2
R403
10K_0402_5%~D
R403
10K_0402_5%~D
12
C266
100P_0402_50V8J~D
@
C266
100P_0402_50V8J~D
@
1
2
R405
8.2K_0402_5%~D
R405
8.2K_0402_5%~D
12
C278
0.1U_0402_25V6K~D
C278
0.1U_0402_25V6K~D
1
2
R406
1.4K_0402_1%~D
R406
1.4K_0402_1%~D
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_SRC_ON
EN_LCDPWR
CCD_OFF
EN_INVPWR
USBP12- USBP12_D-
USBP12_D+USBP12+
LDDC_CLK_PCH
LDDC_DATA_PCH
BIA_PWM_LVDS DISP_ON
BATT_YELLOW_LED
BATT_WHITE_LED
BIA_PWM_LVDS_L
DISP_ON
BIA_PWM_LVDS
USBP12_D+
USBP12_D-
LCD_A2+_PCH
LCD_A1+_PCH
LCD_A1-_PCH
LCD_ACLK+_PCH
LCD_ACLK-_PCH
LCD_A2-_PCH
LCD_A0-_PCH
LCD_A0+_PCH
CAM_MIC_CBL_DET#
DMIC0
DMIC_CLK
LDDC_CLK_PCH
LCD_ACLK-_PCH
LCD_ACLK+_PCH
LDDC_DATA_PCH
LDDC_CLK_PCH
BREATH_WHITE_LED
+3.3V_ALW
+PWR_SRC_S +3.3V_ALW
+LCDVDD
+LCDVDD
+PWR_SRC
+BL_PWR_SRC
+CAMERA_VDD
+3.3V_RUN
+3.3V_RUN
+LCDVDD +3.3V_RUN
+BL_PWR_SRC
+CAMERA_VDD
+BL_PWR_SRC
+5V_ALW
+LCDVDD
+3.3V_RUN
+5V_ALW
LCD_VCC_TEST_EN<39>
ENVDD_PCH<16,39>
CCD_OFF<39>
EN_INVPWR<40>
USBP12-<17>
USBP12+<17>
PANEL_BKEN_PCH <16>BIA_PWM_PCH <16>
PANEL_BKEN_EC <39>BIA_PWM_EC <40>
BREATH_WHITE_LED <43>
BATT_YELLOW_LED <43>
BATT_WHITE_LED <43>
LCD_CBL_DET# <17>
DMIC0 <29>
DMIC_CLK <29>
LCD_A1+_PCH <16>
LCD_A1-_PCH <16>
LCD_ACLK+_PCH <16>
LCD_ACLK-_PCH <16>
LCD_A2+_PCH <16>
LCD_A2-_PCH <16>
LCD_A0+_PCH <16>
LCD_A0-_PCH <16>
CAM_MIC_CBL_DET# <17>
LDDC_CLK_PCH <16>
LDDC_DATA_PCH <16>
LCD_TST <39>
PANEL_HDD_LED <43>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
LVDS
23 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
LVDS
23 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
LVDS
23 56Thursday, June 23, 2011
Compal Electronics, Inc.
Panel backlight power control by EC
LCD Power
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
FDC654P: P CHANNAL
40mil
40mil
For Webcam
Close to JLVDS1.7,8
Place near to JLVDS1
Close to JLVD1.9
Close to JLVDS1.6
RF TEAM request
Q19B
DMN66D0LDW-7_SOT363-6~D
Q19B
DMN66D0LDW-7_SOT363-6~D
3
5
4
D8
PESD5V0U2BT_SOT23-3~D
D8
PESD5V0U2BT_SOT23-3~D
2
3
1
R413
130_0402_1%~D
R413
130_0402_1%~D
12
G
D
S
Q22
SSM3K7002FU_SC70-3~D
G
D
S
Q22
SSM3K7002FU_SC70-3~D
2
1 3
R1632
1M_0402_5%~D
R1632
1M_0402_5%~D
12
Q19A
DMN66D0LDW-7_SOT363-6~D
Q19A
DMN66D0LDW-7_SOT363-6~D
61
2
C298
0.1U_0402_25V6K~D
C298
0.1U_0402_25V6K~D
1
2
D6
BAT54CW_SOT323-3~D
D6
BAT54CW_SOT323-3~D
1
2
3
R412
100K_0402_5%~D
R412
100K_0402_5%~D
12
C1202
12P_0402_50V8J~D
@
C1202
12P_0402_50V8J~D
@
1
2
C1203
12P_0402_50V8J~D
@
C1203
12P_0402_50V8J~D
@
1
2
D68
RB751V-40GTE-17_SOD323-2~D
D68
RB751V-40GTE-17_SOD323-2~D
21
S
G
D
Q18
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q18
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
4 5
1
C1201
12P_0402_50V8J~D
@
C1201
12P_0402_50V8J~D
@
1
2
C301
0.1U_0402_25V6K~D
C301
0.1U_0402_25V6K~D
1
2
C243
0.1U_0402_25V6K~D
C243
0.1U_0402_25V6K~D
1
2
L10 DLW21SN121SQ2L_4P~D@L10 DLW21SN121SQ2L_4P~D@
1
1
4
433
22
D66
RB751V-40GTE-17_SOD323-2~D
D66
RB751V-40GTE-17_SOD323-2~D
21
D69
RB751V-40GTE-17_SOD323-2~D
D69
RB751V-40GTE-17_SOD323-2~D
21
R427 0_0402_5%~DR427 0_0402_5%~D
1 2
R422
100K_0402_5%~D
R422
100K_0402_5%~D
12
R159 2.2K_0402_5%~DR159 2.2K_0402_5%~D
1 2
C296
0.1U_0603_50V7K~D
C296
0.1U_0603_50V7K~D
1
2
C302
0.1U_0402_25V6K~D
C302
0.1U_0402_25V6K~D
1
2
R1138
100K_0402_5%~D
R1138
100K_0402_5%~D
12
R428 0_0402_5%~DR428 0_0402_5%~D
1 2
R160 2.2K_0402_5%~DR160 2.2K_0402_5%~D
1 2
S
G
D
Q21
FDC654P-G_SSOT-6~D
S
G
D
Q21
FDC654P-G_SSOT-6~D
3
6
2
4 5
1
C297
1000P_0402_50V7K~D
C297
1000P_0402_50V7K~D
1
2
D67
RB751V-40GTE-17_SOD323-2~D
D67
RB751V-40GTE-17_SOD323-2~D
21
C299
0.1U_0402_25V6K~D
C299
0.1U_0402_25V6K~D
1
2
10U_0805_10V6K~D
C300
10U_0805_10V6K~D
C300
1
2
JLVDS1
AMPHE_G47D4022101EU~D
CONN@
JLVDS1
AMPHE_G47D4022101EU~D
CONN@
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
25 25
26 26
27 27
28 28
29 29
30 30
31 31
32 32
33 33
34 34
35 35
36 36
37 37
38 38
39 39
40 40
G1
41 G2
42 G3
43 G4
44 G5
45
C293
0.1U_0402_25V6K~D
C293
0.1U_0402_25V6K~D
1
2
Q20
PDTC124EU_SC70-3~D
Q20
PDTC124EU_SC70-3~D
2
13
G
D
S
Q23
PMV65XP_SOT23-3~D
G
D
S
Q23
PMV65XP_SOT23-3~D
2
1 3
C246
0.1U_0603_50V7K~D
C246
0.1U_0603_50V7K~D
1
2
R1137
10K_0402_5%~D
R1137
10K_0402_5%~D
12
LE92 BLM18BB221SN1D_2P~DLE92 BLM18BB221SN1D_2P~D
1 2
C292
0.1U_0402_25V6K~D
C292
0.1U_0402_25V6K~D
1
2
R414
10K_0402_5%~D
R414
10K_0402_5%~D
12
R423 47K_0402_5%~DR423 47K_0402_5%~D
1 2

2
2
1
1
B B
A A
CLK_DDC2_CRT
DAT_DDC2_CRT
VSYNC_BUF
HSYNC_BUF
GREEN_CRT
RED_CRT
BLUE_CRT
GREEN_DOCK
BLUE_DOCK
RED_DOCK
HSYNC_DOCK
VSYNC_DOCK
CLK_DDC2_DOCK
DAT_DDC2_DOCK
PCH_CRT_DDC_CLK
PCH_CRT_BLU
PCH_CRT_GRN
CRT_SWITCH
PCH_CRT_DDC_DAT
PCH_CRT_VSYNC
PCH_CRT_RED
PCH_CRT_HSYNC
+3.3V_RUN
+5V_RUN +3.3V_RUN
+5V_RUN
+3.3V_RUN
GREEN_DOCK <38>
RED_DOCK <38>
CLK_DDC2_DOCK <38>
DAT_DDC2_DOCK <38>
BLUE_DOCK <38>
VSYNC_BUF <30>
VSYNC_DOCK <38>
HSYNC_DOCK <38>
GREEN_CRT <30>
RED_CRT <30>
HSYNC_BUF <30>
CLK_DDC2_CRT <30>
DAT_DDC2_CRT <30>
BLUE_CRT <30>
PCH_CRT_DDC_DAT<16>
CRT_SWITCH<39>
PCH_CRT_DDC_CLK<16>
PCH_CRT_HSYNC<16>
PCH_CRT_VSYNC<16>
PCH_CRT_BLU<16>
PCH_CRT_GRN<16>
PCH_CRT_RED<16>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
CRT/Video switch
24 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
CRT/Video switch
24 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
CRT/Video switch
24 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Source
APR/SPR
MBA=B1
A=B2
ChanelSEL1/SEL2
0
1
SW for MB/DOCK
R556
4.7K_0402_5%~D
R556
4.7K_0402_5%~D
12
C339
0.1U_0402_25V6K~D
C339
0.1U_0402_25V6K~D
1
2
C332
0.01U_0402_16V7K~D
@
C332
0.01U_0402_16V7K~D
@
1
2
C334
0.1U_0402_25V6K~D
C334
0.1U_0402_25V6K~D
1
2
C335
0.1U_0402_25V6K~D
C335
0.1U_0402_25V6K~D
1
2
C336
0.1U_0402_25V6K~D
C336
0.1U_0402_25V6K~D
1
2
U18
PI3V713-AZLEX_TQFN32_6X3~D
U18
PI3V713-AZLEX_TQFN32_6X3~D
R
1
G
2
GND
3
VDD 4
B
5
H_SOURCE
6
V_HOURCE
7
V2_OUT 17
V1_OUT 18
H1_OUT 20
H2_OUT 19
R2 26
R1 27
G1 25
G2 24
GND
31
VDD 32
SDA_SOURCE
9
Reserved
8
SCL_SOURCE
10
GND
11
SDA1 12
SDA2 13
SCL1 14
B2 21
B1 22
VDD 23
TEST
29
GND
28
SEL
30
SCL2 15
5V VDD 16
GPAD
33
C333
0.01U_0402_16V7K~D
@
C333
0.01U_0402_16V7K~D
@
1
2

2
2
1
1
B B
A A
TMDSB_CON_CLK#
TMDSB_CON_P0
TMDSB_CON_CLK
TMDSB_CON_N0
TMDSB_CON_N0
TMDSB_CON_CLK#
TMDSB_CON_N1
TMDSB_CON_N2
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2
TMDSB_CON_N1
HDMI_HPD_SINK
PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R
+5V_RUN_HDMI
HDMI_CEC
TMDSB_CON_CLK
TMDSB_CON_P0
TMDSB_CON_P1
TMDSB_CON_P2
PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R +5V_HDMI_DDC_CLK
+5V_HDMI_DDC_DAT
HDMI_HPD_SINK
TMDSB_PCH_N2_C
TMDSB_PCH_P2_C HDMI_OB
TMDSB_PCH_N1_C
TMDSB_PCH_P1_C
TMDSB_PCH_N0_C
TMDSB_PCH_P0_C
TMDSB_PCH_CLK#_C
TMDSB_PCH_CLK_C
HDMI_CEC
TMDSB_PCH_CLK_C
TMDSB_PCH_CLK#_C
TMDSB_PCH_N0_C
TMDSB_PCH_P0_C
TMDSB_PCH_P1_C
TMDSB_PCH_N1_C
TMDSB_PCH_P2_C
TMDSB_PCH_N2_C
+VDISPLAY_VCC
+5V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+5V_RUN
PCH_SDVO_CTRLCLK<16>
PCH_SDVO_CTRLDATA<16>
HDMIB_PCH_HPD<16>
TMDSB_PCH_N1<16>
TMDSB_PCH_P1<16>
TMDSB_PCH_CLK<16>
TMDSB_PCH_CLK#<16>
TMDSB_PCH_N2<16>
TMDSB_PCH_P2<16>
TMDSB_PCH_P0<16>
TMDSB_PCH_N0<16>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
HDMI port
25 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
HDMI port
25 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
HDMI port
25 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
fuse P/N ok only, symbol not ready
R452 680_0402_5%~DR452 680_0402_5%~D
1 2
R451 0_0402_5%~D@R451 0_0402_5%~D@
1 2
R1168
1M_0402_5%~D
R1168
1M_0402_5%~D
1 2
R1164
0_0402_5%~D
R1164
0_0402_5%~D
12
JHDMI1
BELLW_80079-1021
CONN@JHDMI1
BELLW_80079-1021
CONN@
D2_shield
1D2+
2D2-
3D1_shield
4D1+
5D1-
6D0_shield
7D0+
8D0-
9CK_shield
10 CK+
11 CK-
12 DDC/CEC_GND
13 CEC
14 SCL
15 SDA
16 Reserved
17 +5V
18 HP_DET
19
GND1 20
GND2 21
GND3 22
GND4 23
R449 680_0402_5%~DR449 680_0402_5%~D
1 2
L21
DLW21SN900HQ2L_0805_4P~D
L21
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
R453 680_0402_5%~DR453 680_0402_5%~D
1 2
F2
0.5A_15V_SMD1812P050TF
F2
0.5A_15V_SMD1812P050TF
21
L19
DLW21SN900HQ2L_0805_4P~D
L19
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
R466 0_0402_5%~D@R466 0_0402_5%~D@
1 2
D65
RB751V-40GTE-17_SOD323-2~D
@D65
RB751V-40GTE-17_SOD323-2~D
@
21
L22
DLW21SN900HQ2L_0805_4P~D
L22
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
C347 0.1U_0402_10V7K~DC347 0.1U_0402_10V7K~D
12
R1153 2.2K_0402_5%~DR1153 2.2K_0402_5%~D
1 2
R456 680_0402_5%~DR456 680_0402_5%~D
1 2
R468 0_0402_5%~D@R468 0_0402_5%~D@
1 2
R471 0_0402_5%~D@R471 0_0402_5%~D@
1 2
L20
DLW21SN900HQ2L_0805_4P~D
L20
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
C349 0.1U_0402_10V7K~DC349 0.1U_0402_10V7K~D
12
R470 0_0402_5%~D@R470 0_0402_5%~D@
1 2
C346 0.1U_0402_10V7K~DC346 0.1U_0402_10V7K~D
12
R462 0_0402_5%~D@R462 0_0402_5%~D@
1 2
R1128 20K_0402_5%~DR1128 20K_0402_5%~D
1 2
C350 0.1U_0402_10V7K~DC350 0.1U_0402_10V7K~D
12
C351 0.1U_0402_10V7K~DC351 0.1U_0402_10V7K~D
12
R469 0_0402_5%~D@R469 0_0402_5%~D@
1 2
R458 10K_0402_5%~DR458 10K_0402_5%~D
1 2
C352 0.1U_0402_10V7K~DC352 0.1U_0402_10V7K~D
12
C337
0.1U_0402_10V7K~D
C337
0.1U_0402_10V7K~D
1
2
D70
RB751V-40GTE-17_SOD323-2~D
@D70
RB751V-40GTE-17_SOD323-2~D
@
21
R450 680_0402_5%~DR450 680_0402_5%~D
1 2
Q120A
DMN66D0LDW-7_SOT363-6~D
Q120A
DMN66D0LDW-7_SOT363-6~D
61
2
10U_0805_10V6K~D
C338
10U_0805_10V6K~D
C338
1
2
Q120B
DMN66D0LDW-7_SOT363-6~D
Q120B
DMN66D0LDW-7_SOT363-6~D
3
5
4
G
D
S
Q26
SSM3K7002FU_SC70-3~D
G
D
S
Q26
SSM3K7002FU_SC70-3~D
2
13
R448 680_0402_5%~DR448 680_0402_5%~D
1 2
R1163
0_0402_5%~D
R1163
0_0402_5%~D
12
G
D
S
Q121
SSM3K7002FU_SC70-3~D
G
D
S
Q121
SSM3K7002FU_SC70-3~D
2
13
R459 0_0402_5%~D@R459 0_0402_5%~D@
1 2
C348 0.1U_0402_10V7K~DC348 0.1U_0402_10V7K~D
12
R1165 10K_0402_5%~DR1165 10K_0402_5%~D
12
R454 680_0402_5%~DR454 680_0402_5%~D
1 2
NC
D4
BAT1000-7-F_SOT23-3~D
NC
D4
BAT1000-7-F_SOT23-3~D
21
3
R455 680_0402_5%~DR455 680_0402_5%~D
1 2
R1152 2.2K_0402_5%~DR1152 2.2K_0402_5%~D
1 2
C353 0.1U_0402_10V7K~DC353 0.1U_0402_10V7K~D
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DPC_AUX_C
DPC_AUX#_C
DPC_DOCK_AUX
DPC_CA_DET#DPC_CA_DET
DPC_DOCK_AUX#
DPD_AUX_C
DPD_AUX#_C
DPD_DOCK_AUX
DPD_CA_DET#DPD_CA_DET
DPD_DOCK_AUX#
DPD_CA_DET
DPC_CA_DET
PCH_DDPD_CTRLCLK
PCH_DDPD_CTRLDATA
PCH_DDPC_CTRLCLK
PCH_DDPC_CTRLDATA
+5V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+3.3V_RUN
DPC_CA_DET<38>
DPC_PCH_DOCK_AUX#<16>
DPC_PCH_DOCK_AUX<16>
PCH_DDPC_CTRLDATA <16>
PCH_DDPC_CTRLCLK <16>
DPC_DOCK_AUX#<38>
DPC_DOCK_AUX<38>
DPD_CA_DET<38>
DPD_PCH_DOCK_AUX#<16>
DPD_PCH_DOCK_AUX<16>
PCH_DDPD_CTRLDATA <16>
PCH_DDPD_CTRLCLK <16>
DPD_DOCK_AUX#<38>
DPD_DOCK_AUX<38>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DP125
26 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DP125
26 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DP125
26 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
AUX/DDC SW for DPC to E-DOCK
AUX/DDC SW for DPD to E-DOCK
Intel WW18 Strapping option
Intel WW18 Strapping option
There is a new die for PI3C3125. Sample availabe on May.
C367
0.1U_0402_10V7K~D
C367
0.1U_0402_10V7K~D
12
U21
NC7SZ04P5X-G_SC70-5~D
U21
NC7SZ04P5X-G_SC70-5~D
A
2Y4
P5
NC 1
G
3
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V7K~D
12
R488 2.2K_0402_5%~DR488 2.2K_0402_5%~D
1 2
C356
0.1U_0402_25V6K~D
C356
0.1U_0402_25V6K~D
1 2
U24
NC7SZ04P5X-G_SC70-5~D
U24
NC7SZ04P5X-G_SC70-5~D
A
2Y4
P5
NC 1
G
3
C365
0.1U_0402_25V6K~D
C365
0.1U_0402_25V6K~D
12
C357
0.1U_0402_10V7K~D
C357
0.1U_0402_10V7K~D
12
C366
0.1U_0402_25V6K~D
C366
0.1U_0402_25V6K~D
1 2
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~D
12
C369
0.1U_0402_25V6K~D
C369
0.1U_0402_25V6K~D
12
R487 2.2K_0402_5%~DR487 2.2K_0402_5%~D
1 2
R491 1M_0402_5%~DR491 1M_0402_5%~D
1 2
R492 1M_0402_5%~DR492 1M_0402_5%~D
1 2
R489 2.2K_0402_5%~DR489 2.2K_0402_5%~D
1 2
U23
PI3C3125LEX_TSSOP14~D
U23
PI3C3125LEX_TSSOP14~D
B3 11
B1
6
BE1
4
A1
5
A2 9
GND
7
A3 12
VCC 14
B2 8
BE3 13
A0
2
B0
3
BE0
1
BE2 10
U20
PI3C3125LEX_TSSOP14~D
U20
PI3C3125LEX_TSSOP14~D
B3 11
B1
6
BE1
4
A1
5
A2 9
GND
7
A3 12
VCC 14
B2 8
BE3 13
A0
2
B0
3
BE0
1
BE2 10
R490 2.2K_0402_5%~DR490 2.2K_0402_5%~D
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
HDD_DET#
HDD_EN_5V
FFS_INT2
HDD_FALL_INT
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK
FFS_INT2_Q
HDD_FALL_INT
+3.3V_RUN_HDD
FFS_INT2_Q
FFS_INT2
+5V_HDD
+5V_HDD
+5V_HDD
+5V_ALW
+5V_RUN
+3.3V_ALW2
+3.3V_RUN
+3.3V_RUN_HDD
+3.3V_RUN
+PWR_SRC_S
+3.3V_RUN
+5V_HDD
+3.3V_RUN
HDD_DET#<14>
HDD_FALL_INT<17>
DDR_XDP_WAN_SMBCLK<12,13,15,34>
DDR_XDP_WAN_SMBDAT<12,13,15,34>
PSATA_PTX_DRX_P0_C<14>
PSATA_PTX_DRX_N0_C<14>
PSATA_PRX_DTX_P0_C<14>
PSATA_PRX_DTX_N0_C<14>
SIO_SLP_S3#<11,16,35,39,42,48>
RUN_ON<35,39,42,48>
FFS_INT2<18>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
HDD CONNECTOR
27 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
HDD CONNECTOR
27 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
HDD CONNECTOR
27 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Pleace near HDD CONN
Main SATA +5V Default
SHORT DEFAULT
+5V_HDD Source
HDD PWR
DELL CONFIDENTIAL/PROPRIETARY
Free Fall Sensor
For HDD Temp.
Pleace near HDD CONN
R504
100K_0402_5%~D
R504
100K_0402_5%~D
12
10U_0805_10V6K~D
C394
10U_0805_10V6K~D
C394
1
2
C396
0.1U_0402_25V6K~D
C396
0.1U_0402_25V6K~D
1
2
Q28A
DMN66D0LDW-7_SOT363-6~D
Q28A
DMN66D0LDW-7_SOT363-6~D
61
2
R500
100K_0402_5%~D
R500
100K_0402_5%~D
12
C391 0.01U_0402_16V7K~DC391 0.01U_0402_16V7K~D
12
R508
100K_0402_5%~D
R508
100K_0402_5%~D
12
C395
1000P_0402_50V7K~D
C395
1000P_0402_50V7K~D
1
2
PJP64
PAD-OPEN1x1m
PJP64
PAD-OPEN1x1m
1 2
Q28B
DMN66D0LDW-7_SOT363-6~D
Q28B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R506
100K_0402_5%~D
@R506
100K_0402_5%~D
@
12
R502 10K_0402_5%~DR502 10K_0402_5%~D
1 2
Q29A
DMN66D0LDW-7_SOT363-6~D
Q29A
DMN66D0LDW-7_SOT363-6~D
61
2
C392 0.01U_0402_16V7K~DC392 0.01U_0402_16V7K~D
12
C387
10U_0603_6.3V6M~D
C387
10U_0603_6.3V6M~D
1
2
C388
0.1U_0402_25V6K~D
C388
0.1U_0402_25V6K~D
1
2
R503 100K_0402_5%~DR503 100K_0402_5%~D
1 2
C393
0.1U_0603_50V7K~D
C393
0.1U_0603_50V7K~D
1
2
C389 0.01U_0402_16V7K~DC389 0.01U_0402_16V7K~D
12
C402
0.1U_0402_25V6K~D
C402
0.1U_0402_25V6K~D
1
2
LNG3DM
U88
LNG3DMTR_LGA16_3X3~D
LNG3DM
U88
LNG3DMTR_LGA16_3X3~D
VDD_IO
1
NC 2
NC 3
SCL/SPC
4
GND 5
VDD
14
CS
8
INT 1
11
INT 2
9
RES 10
GND 12
SDO/SA0
7
SDA / SDI / SDO
6
RES 13
RES 16
RES 15
R501 10K_0402_5%~DR501 10K_0402_5%~D
1 2
C390 0.01U_0402_16V7K~DC390 0.01U_0402_16V7K~D
12
R505
100K_0402_5%~D
R505
100K_0402_5%~D
12
R1624 0_0402_5%~DR1624 0_0402_5%~D
1 2
PJP3
JUMP_43X79
PJP3
JUMP_43X79
1
122
Q29B
DMN66D0LDW-7_SOT363-6~D
Q29B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C399
0.1U_0402_25V6K~D
C399
0.1U_0402_25V6K~D
1
2
R499
100K_0402_5%~D
R499
100K_0402_5%~D
12
S
G
D
Q27
SI3456DDV-T1-GE3_TSOP6~D
@
S
G
D
Q27
SI3456DDV-T1-GE3_TSOP6~D
@
3
6
2
4 5
1
R1621 0_0402_5%~D@R1621 0_0402_5%~D@
1 2
JSATA1
TYCO_1775770-3~D
CONN@JSATA1
TYCO_1775770-3~D
CONN@
GND1 23
GND2 24
GND
1
RX+
2
RX-
3
GND
4
TX-
5
TX+
6
GND
7
3.3V
8
3.3V
9
3.3V
10
GND
11
GND
12
GND
13
5V
14
5V
15
5V
16
GND
17
Reserved
18
GND
19
12V
20
12V
21
12V
22

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MODC_EN#
SATA_ODD_PRX_DTX_P1_RP
SATA_ODD_PRX_DTX_N1_RP
SATA_ODD_PTX_DRX_P1_RP
SATA_ODD_PTX_DRX_N1_RP
PCIE_WAKE#
EMBCLK_REQ#
BAY_SMBDAT
BAY_SMBCLK
PLTRST_EMB#
MOD_MD
ZODD_WAKE#
MOD_MD
MODC_EN#
ZODD_WAKE#
USB30_SMI#
MOD_MD
USB30_EN
MOD_SATA_PCIE#_DET
USB30_EN
USB30_SMI#
PCIE_PTX_EMBRX_P4_C
PCIE_PTX_EMBRX_N4_C
MOD_EN
+ODD_EQ1
+ODD_EQ2
+ODD_DEW2
+ODD_PE1
+ODD_PE2
+ODD_DEW1
+ODD_EQ2
SATA_ODD_PTX_DRX_N1_RP
SATA_ODD_PTX_DRX_P1_RP
SATA_ODD_PRX_DTX_N1_RP
SATA_ODD_PRX_DTX_P1_RP
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1
SATA_ODD_PRX_DTX_N1
SATA_ODD_PTX_DRX_N1
SATA_ODD_PTX_DRX_P1
SATA_ODD_PRX_DTX_P1
+ODD_EQ1
+5V_ALW
+3.3V_ALW2
+5V_MOD
+5V_MOD
+3.3V_ALW
+3.3V_ALW
+5V_MOD
+5V_MOD
+3.3V_ALW
+3.3V_ALW_PCH
+PWR_SRC_S
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
MODC_EN<39>
PCIE_PRX_EMBTX_P4<15>
EMBCLK_REQ#<15>
PLTRST_EMB#<17>
MOD_SATA_PCIE#_DET<39>
PCIE_WAKE#<34,35,40>
BAY_SMBDAT<40,45>
BAY_SMBCLK<40,45>
CLK_PCIE_EMB<15>
CLK_PCIE_EMB#<15>
PCIE_PRX_EMBTX_N4<15>
DEVICE_DET#<40>
ZODD_WAKE# <39>
USB30_SMI# <14>
PCIE_PTX_EMBRX_P4<15>
PCIE_PTX_EMBRX_N4<15>
SATA_ODD_PRX_DTX_P1_C<14>
SATA_ODD_PRX_DTX_N1_C<14>
SATA_ODD_PTX_DRX_P1_C<14>
SATA_ODD_PTX_DRX_N1_C<14>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
ODD CONNECTOR
28 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
ODD CONNECTOR
28 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
ODD CONNECTOR
28 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
2
+5VMOD Source
For ODD
Pleace near ODD CONN
C4080.1U_0402_10V7K~D C4080.1U_0402_10V7K~D 12
R511
100K_0402_5%~D
R511
100K_0402_5%~D
12
Q31A
DMN66D0LDW-7_SOT363-6~D
Q31A
DMN66D0LDW-7_SOT363-6~D
61
2
10U_0805_10V6K~D
C401
10U_0805_10V6K~D
C401
1
2
C405 0.01U_0402_16V7K~DC405 0.01U_0402_16V7K~D
12
C382
0.1U_0402_25V6K~D
C382
0.1U_0402_25V6K~D
1
2
R1181
0_0402_5%~D
R1181
0_0402_5%~D
12
R493
0_0402_5%~D
@R493
0_0402_5%~D
@
1 2
G
D
S
Q76
SSM3K7002FU_SC70-3~D
G
D
S
Q76
SSM3K7002FU_SC70-3~D
2
13
R1172
10K_0402_5%~D
@R1172
10K_0402_5%~D
@
12
R1173
10K_0402_5%~D
@R1173
10K_0402_5%~D
@
12
R1177
0_0402_5%~D
R1177
0_0402_5%~D
12
C383 0.01U_0402_16V7K~DC383 0.01U_0402_16V7K~D
12
R1176
0_0402_5%~D
R1176
0_0402_5%~D
12
C384 0.01U_0402_16V7K~DC384 0.01U_0402_16V7K~D
12
R514 100K_0402_5%~DR514 100K_0402_5%~D
1 2
S
G
D
Q30
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q30
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
4 5
1
C397
1000P_0402_50V7K~D
C397
1000P_0402_50V7K~D
1
2
R512
100K_0402_5%~D
R512
100K_0402_5%~D
12
JSATA2
TYCO_2-2129116-1
CONN@JSATA2
TYCO_2-2129116-1
CONN@
GND
1
A+
2
A-
3
GND
4
B-
5
B+
6
GND
7
DP
8
+5V
9
+5V
10
MD
11
GND
12
GND
13
GND
14
PERX+
22
PERX-
23
GND
24
+5V
25
CLKREQ#
26
WAKE#
27
PERST#
28
SMB_DATA
29
REFCLK+
15
REFCLK-
16
GND
17
PETX+
18
PETX-
19
GND
20
GND
21
SMB_CLK
30
HPD
31
GND1 32
GND2 33
C407 0.01U_0402_16V7K~DC407 0.01U_0402_16V7K~D
12
C404 0.01U_0402_16V7K~DC404 0.01U_0402_16V7K~D
12
R515
100K_0402_5%~D
R515
100K_0402_5%~D
12
Q31B
DMN66D0LDW-7_SOT363-6~D
Q31B
DMN66D0LDW-7_SOT363-6~D
3
5
4
U25
MAX4951CCTPLFT_TQFN20_4X4~D
U25
MAX4951CCTPLFT_TQFN20_4X4~D
HAP
1
HAM
2
VCC 20
OL
19
HBP
5
VCC 6
EN
7
PB 8
PA 9
VCC 10
DD
18
GND
13 DBP 11
DBM 12
GND
17
DAM 14
DAP 15
VCC 16
GND
3
HBM
4
EP
21
R510 10K_0402_5%~DR510 10K_0402_5%~D
1 2
C398
0.1U_0402_25V6K~D
C398
0.1U_0402_25V6K~D
1
2
C386 0.01U_0402_16V7K~DC386 0.01U_0402_16V7K~D
12
R495
0_0402_5%~D
R495
0_0402_5%~D
12
R507
100K_0402_5%~D
R507
100K_0402_5%~D
12
R1178
10K_0402_5%~D
@R1178
10K_0402_5%~D
@
12
R494
0_0402_5%~D
@R494
0_0402_5%~D
@
1 2
C385 0.01U_0402_16V7K~DC385 0.01U_0402_16V7K~D
12
C400
0.1U_0603_50V7K~D
C400
0.1U_0603_50V7K~D
1
2
R1175
10K_0402_5%~D
@R1175
10K_0402_5%~D
@
12
R1174
0_0402_5%~D
R1174
0_0402_5%~D
12
C381
0.01U_0402_16V7K~D
C381
0.01U_0402_16V7K~D
1
2
R496
0_0402_5%~D
R496
0_0402_5%~D
12
R509
100K_0402_5%~D
R509
100K_0402_5%~D
12
C406 0.01U_0402_16V7K~DC406 0.01U_0402_16V7K~D
12
R513 10K_0402_5%~DR513 10K_0402_5%~D
1 2
Q123A
DMN66D0LDW-7_SOT363-6~D
Q123A
DMN66D0LDW-7_SOT363-6~D
61
2
Q123B
DMN66D0LDW-7_SOT363-6~D
Q123B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C4090.1U_0402_10V7K~D C4090.1U_0402_10V7K~D 12
R1183 10K_0402_5%~DR1183 10K_0402_5%~D
1 2

2
2
1
1
B B
A A
I2S_DI#
I2S_LRCLK
AUD_SENSE_A
AUD_SENSE_B
I2S_DO
DMIC_CLK_L
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
AUD_SENSE_B
AUD_HP_OUT_L
AUD_HP_OUT_R
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
+VDDA_AVDD
I2S_LRCLK
I2S_BCLK DAI_BCLK#
DAI_LRCK#
DAI_DO#
DAI_DI
I2S_DO
I2S_DI#
EN_I2S_NB_CODEC#
DAI_12MHZ#I2S_MCLK
AUD_PC_BEEP
+VDDA_PVDD
MIC_IN_L
MIC_IN_R
+VREFOUT
INT_SPKL_L-
I2S_MCLK I2S_MCLK_R
I2S_BCLK I2S_BCLK_R
INT_SPK_R-
INT_SPK_R+
INT_SPK_L-
INT_SPK_L+
AUD_SENSE_A
INT_SPKL_L+
+VREFOUT
DAI_BCLK#
DAI_LRCK#
DAI_DO#
DAI_12MHZ#
DAI_DI
INT_SPK_L-
INT_SPK_R+
INT_SPK_R-
INT_SPK_L+
INT_SPKR_R+
INT_SPKR_R-
+3.3V_RUN
+3.3V_RUN
+VDDA_AVDD
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+VDDA_AVDD
+3.3V_RUN
+5V_RUN
+VREFOUT
PCH_AZ_CODEC_SDIN0<14>
AUD_NB_MUTE#<39>
DMIC_CLK <23>
DMIC0 <23>
PCH_AZ_CODEC_BITCLK<14>
PCH_AZ_CODEC_RST#<14>
PCH_AZ_CODEC_SYNC<14>
PCH_AZ_CODEC_SDOUT<14>
DOCK_MIC_DET <39>DOCK_HP_DET<39>
AUD_HP_OUT_L <30>
AUD_HP_OUT_R <30>
DAI_DO# <38>
EN_I2S_NB_CODEC#<39>
DAI_DI <38>
DAI_12MHZ# <38>
DAI_LRCK# <38>
DAI_BCLK# <38>
AUD_HP_NB_SENSE <30,39>
MIC_IN_R <30>
BEEP <40>
SPKR <14>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Azalia (HD) Codec
29 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Azalia (HD) Codec
29 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Azalia (HD) Codec
29 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
Place C994, C952~C957 close to Codec
Place R1096 close to codec
Place C962 close to Codec
Place C963~C966 close to Codec
Place R1097 close to codec
Place LE3 close to codec
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely to Pin 14
Close to U72 pin5 Close to U72 pin6
BCLK: Audio serial data bus bit clock input/output
LRCK: Audio serial data bus word clock input/output
Place closely to Pin 13.
place at Codec bottom side
place at AGND and DGND plane
DVDD_IO should match
with HDA Bus level
15 mils trace
Internal Speakers Header
place close to pin27 place close to pin38
NA
SPDIFOUT0
Pull-up to AVDD
PORT E
PORT F
DMIC0
SPDIFOUT1 (DMIC1)
Resistor SENSE_A SENSE_B
39.2K
20K
10K
5.11K
2.49K
PORT A
PORT B
HeadPhone Out
Dock Audio
Internal SPK
External MICPORT A
PORT B
PORT C
PORT D
R162, R163, R164, R165,R166 CO-lay with U73
R162 22_0402_5%~D@R162 22_0402_5%~D@
1 2
C975 680P_0402_50V7K~D@C975 680P_0402_50V7K~D@
1
2
R164 0_0402_5%~D@R164 0_0402_5%~D@
1 2
JSPK1
TYCO_2-1775765-4~D
CONN@
JSPK1
TYCO_2-1775765-4~D
CONN@
1
1
2
2
3
3
GND
5
GND
6
4
4
10U_0805_10V6K~D
C954
10U_0805_10V6K~D
C954
1
2
R1141 10K_0402_5%~D@R1141 10K_0402_5%~D@
1 2
R1077
47_0402_5%~D
@R1077
47_0402_5%~D
@
12
C978
0.1U_0402_10V7K~D
@C978
0.1U_0402_10V7K~D
@
1
2
R1078
2.49K_0402_1%~D
R1078
2.49K_0402_1%~D
12
T90 PAD~D@T90 PAD~D@
R1540
1K_0402_1%~D
R1540
1K_0402_1%~D
12
Q107A
DMN66D0LDW-7_SOT363-6~D
@
Q107A
DMN66D0LDW-7_SOT363-6~D
@
61
2
R1095
0_0805_5%~D
R1095
0_0805_5%~D
1 2
C965
1U_0603_10V7K~D
C965
1U_0603_10V7K~D
1
2
DE1
PESD5V0U2BT_SOT23-3~D
@DE1
PESD5V0U2BT_SOT23-3~D
@
2
3
1
C974 680P_0402_50V7K~D@C974 680P_0402_50V7K~D@
1
2
R1079
39.2K_0402_1%~D
R1079
39.2K_0402_1%~D
12
R1083
2.49K_0402_1%~D
R1083
2.49K_0402_1%~D
12
C983
100P_0402_50V8J~D
@
C983
100P_0402_50V8J~D
@
1 2
Q106B
DMN66D0LDW-7_SOT363-6~D
Q106B
DMN66D0LDW-7_SOT363-6~D
3
5
4
PJP62
PAD-OPEN1x1m
PJP62
PAD-OPEN1x1m
1 2
10U_0805_10V6K~D
C966
10U_0805_10V6K~D
C966
1
2
L91 BLM18BD121SN1D_2P~DL91 BLM18BD121SN1D_2P~D
1 2
C952
1U_0603_10V7K~D
C952
1U_0603_10V7K~D
1
2
10K_0402_5%~DR1099 10K_0402_5%~DR1099
1 2
C962
4.7U_0603_6.3V6K~D
C962
4.7U_0603_6.3V6K~D
1
2
C982
100P_0402_50V8J~D
@
C982
100P_0402_50V8J~D
@
1 2
10U_0805_10V6K~D
C960
10U_0805_10V6K~D
C960
1
2
R1086
20K_0402_1%~D
R1086
20K_0402_1%~D
12
C979
1000P_0402_50V7K~D
C979
1000P_0402_50V7K~D
1
2
10U_0805_10V6K~D
C958
10U_0805_10V6K~D
C958
1
2
LE3 BLM18BB221SN1D_2P~DLE3 BLM18BB221SN1D_2P~D
1 2
R1082
100K_0402_5%~D
R1082
100K_0402_5%~D
12
U73
CD74HC366M96_SO16~D
U73
CD74HC366M96_SO16~D
1A
2
OE1#
1
VCC
16
2A
4
3A
6
6A
14
4A
10
5A
12
GND 8
OE2#
15
6Y# 13
5Y# 11
4Y# 9
3Y# 7
2Y# 5
1Y# 3
L92 BLM18BD121SN1D_2P~DL92 BLM18BD121SN1D_2P~D
1 2
R166 0_0402_5%~D@R166 0_0402_5%~D@
1 2
RE10 0_0402_5%~DRE10 0_0402_5%~D
1 2
C959
0.1U_0402_25V6K~D
C959
0.1U_0402_25V6K~D
1
2
C1105 0.1U_0402_25V6K~DC1105 0.1U_0402_25V6K~D
12
C994
0.1U_0402_25V6K~D
C994
0.1U_0402_25V6K~D
12
C953
0.1U_0402_25V6K~D
C953
0.1U_0402_25V6K~D
1
2
C980
0.1U_0402_10V7K~D
C980
0.1U_0402_10V7K~D
1
2
R1143 2.2K_0402_5%~DR1143 2.2K_0402_5%~D
1 2
DE2
PESD5V0U2BT_SOT23-3~D
@DE2
PESD5V0U2BT_SOT23-3~D
@
2
3
1
R1120 100K_0402_5%~DR1120 100K_0402_5%~D
1 2
R165 22_0402_5%~D@R165 22_0402_5%~D@
1 2
R1142 10K_0402_5%~D@R1142 10K_0402_5%~D@
1 2
33_0402_5%~D
R1096
33_0402_5%~D
R1096
1 2
U72
92HD90B2X5NLGXYAX8_QFN48_7X7~D
U72
92HD90B2X5NLGXYAX8_QFN48_7X7~D
DVDD_CORE
1
DMIC_CLK/GPIO 1 2
DVDD_IO
3
DMIC_0/GPIO 2 4
SDATA_OUT
5
BITCLK
6
DVSS
7
SDATA_IN
8
DVDD
9
SYNC
10
RESET#
11
PC_BEEP 12
SENSE_A 13
SENSE_B 14
I2S_MCLK
15
I2S_SCLK
16
I2S_DOUT
17
I2S_LRCLK
18
No Connect
19
No Connect
20
VREFFILT 21
CAP2 22
VrefOut_A 23
I2S_DIN
24
MONO_OUT 25
AVSS1 26
AVDD1 27
PORTA_L 28
PORTA_R 29
AVSS 30
PORTB_L 31
PORTB_R 32
AVSS 33
V- 34
CAP- 35
CAP+ 36
Vreg 37
AVDD2 38
PVDD 39
PORTD_+L 40
PORTD_-L 41
PVSS
42
PORTD_-R 43
PORTD_+R 44
PVDD 45
DMIC1/GPIO0/SPDIFOUT1 46
EAPD
47
SPDIFOUT0//GPIO3/Aux_Out 48
GND
49
L77
BLM21PG600SN1D_0805~D
L77
BLM21PG600SN1D_0805~D
1 2
C973 680P_0402_50V7K~D@C973 680P_0402_50V7K~D@
1
2
RE9 0_0402_5%~DRE9 0_0402_5%~D
1 2
C957
0.1U_0402_25V6K~D
C957
0.1U_0402_25V6K~D
1
2
2.2U_0603_6.3V6K~DC1163 2.2U_0603_6.3V6K~DC1163
1 2
C964
4.7U_0603_6.3V6K~D
C964
4.7U_0603_6.3V6K~D
1
2
R1119 100K_0402_5%~DR1119 100K_0402_5%~D
1 2
C961
0.1U_0402_25V6K~D
C961
0.1U_0402_25V6K~D
1
2
C963
4.7U_0603_6.3V6K~D
C963
4.7U_0603_6.3V6K~D
1
2
Q106A
DMN66D0LDW-7_SOT363-6~D
Q106A
DMN66D0LDW-7_SOT363-6~D
61
2
R1076
10_0402_1%~D
@R1076
10_0402_1%~D
@
12
R1087
100K_0402_5%~D
R1087
100K_0402_5%~D
12
C956
1U_0603_10V7K~D
C956
1U_0603_10V7K~D
1
2
C976 680P_0402_50V7K~D@C976 680P_0402_50V7K~D@
1
2
R163 0_0402_5%~D@R163 0_0402_5%~D@
1 2
L93 BLM18BD121SN1D_2P~DL93 BLM18BD121SN1D_2P~D
1 2
Q107B
DMN66D0LDW-7_SOT363-6~D
Q107B
DMN66D0LDW-7_SOT363-6~D
3
5
4
10U_0805_10V6K~D
C955
10U_0805_10V6K~D
C955
1
2
C1180
1U_0603_10V7K~D
C1180
1U_0603_10V7K~D
1
2
33_0402_5%~DR1097 33_0402_5%~DR1097
1 2
C981
100P_0402_50V8J~D
@
C981
100P_0402_50V8J~D
@
1 2
C1103
0.1U_0402_10V7K~D
C1103
0.1U_0402_10V7K~D
1
2
R1081
100K_0402_5%~D
R1081
100K_0402_5%~D
12
R169 0_0402_5%~D@R169 0_0402_5%~D@
1 2
L94 BLM18BD121SN1D_2P~DL94 BLM18BD121SN1D_2P~D
1 2
R1080
20K_0402_1%~D
R1080
20K_0402_1%~D
12
C1106 0.1U_0402_25V6K~DC1106 0.1U_0402_25V6K~D
12
C977
10P_0402_50V8J~D
@C977
10P_0402_50V8J~D
@
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DAT_DDC2_CRT
CLK_DDC2_CRT
VSYNC_BUF
HSYNC_BUF
BLUE_CRT
RED_CRT
GREEN_CRT
MEDIA_DET#
LID_CL#
BATT_WHITE
VOL_UP
BATT_YELLOW
WIRELESS_ON#/OFF
VOL_DOWN
WLAN_LED
SATA_LED
VOL_MUTE
POWER_SW#_MB
+5V_RUN
+5V_RUN
+3.3V_ALW
+5V_ALW
POWER_SW#_MB<40,41>
AUD_HP_OUT_R <29>
RED_CRT<24>
GREEN_CRT<24>
HSYNC_BUF<24>
BLUE_CRT<24>
DAT_DDC2_CRT<24>
CLK_DDC2_CRT<24>
VSYNC_BUF<24>
AUD_HP_NB_SENSE <29,39>
MIC_IN_R <29>
IO_LOOP# <18>
MEDIA_DET#<18>
BATT_WHITE<43>
VOL_UP<40>
BATT_YELLOW<43>
WIRELESS_ON#/OFF<39>
VOL_DOWN<40>
LID_CL#<39,43>
WLAN_LED<43>
SATA_LED<43>
VOL_MUTE<40>
AUD_HP_OUT_L <29>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PWR SW/Sub-board Connector
30 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PWR SW/Sub-board Connector
30 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PWR SW/Sub-board Connector
30 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
POWER & INSTANT ON SWITCH
I/O board CONN.
Link Done
Place close
to JIO1.3,5
DETECT_GND
Link Done
LS-6612P
LS-6613P
LinK Done
Defult on,
WIRELESS_ON/OFF#:
LOW: ON
HIGH: OFF Media Board
LED Board with Lid
C457
0.1U_0402_10V7K~D
C457
0.1U_0402_10V7K~D
1
2
C1002
0.1U_0402_25V6K~D
C1002
0.1U_0402_25V6K~D
1
2
D23
PESD24VS2UT_SOT23-3~D
@D23
PESD24VS2UT_SOT23-3~D
@
2
3
1
SW1
NTC033-XJ1J-X260CM_4P
SW1
NTC033-XJ1J-X260CM_4P
1
2
3
4
JIO1
TYCO_2041300-1~D
CONN@JIO1
TYCO_2041300-1~D
CONN@
11
2
2
33
4
4
55
6
6
77
8
8
99
10
10
11 11
13 13
12
12
14
14
15 15
17 17
19 19
21 21
G1 23
16
16
18
18
20
20
22
22
G2
24
G3 25
G5 27
G4
26
G6
28
JMEDIA1
TYCO_1-2041070-0~D
CONN@JMEDIA1
TYCO_1-2041070-0~D
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
G1 11
G2 12
9
9
10
10
C1000
0.1U_0402_16V4Z~D
C1000
0.1U_0402_16V4Z~D
1
2
JLED1
TYCO_2041322-8~D
CONN@JLED1
TYCO_2041322-8~D
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
G1 9
G2 10

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_TX1-
LAN_TX1+
LAN_TX3-
LAN_TX0-
LAN_TX0+
+3.3V_LAN_OUT
REGCTL_PNP10
LANCLK_REQ#_R
LAN_TX2+
LAN_TX3+
LAN_TX2-
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_PRX_GLANTX_P7_C
PCIE_PRX_GLANTX_N7_C
LOM_ACTLED_YEL#
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
LAN_TEST_EN
RES_BIAS
XTALI
LAN_DISABLE#_R
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
+RSVD_VCC3P3_2
+RSVD_VCC3P3_1
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
XTALO
LOM_ACTLED_YEL#
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
DOCK_LOM_SPD100LED_ORG#
LED_10_GRN#
LED_100_ORG#
LAN_TX1-R
LAN_TX1+R
LAN_TX1-
LAN_TX1+
LAN_TX2-R
LAN_TX2+RLAN_TX2+
LAN_TX2-
LAN_TX3-R
LAN_TX3+RLAN_TX3+
LAN_TX3-
SW_LAN_TX0-
SW_LAN_TX0+
SW_LAN_TX1-
SW_LAN_TX1+
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3-
SW_LAN_TX3+
DOCK_LOM_TRD0-
DOCK_LOM_TRD0+
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
DOCK_LOM_TRD2-
DOCK_LOM_TRD2+
DOCK_LOM_TRD3-
DOCK_LOM_TRD3+
DOCK_LOM_ACTLED_YEL#
LAN_ACTLED_YEL#
DOCKED
LAN_TX0-RLAN_TX0-
LAN_TX0+RLAN_TX0+
REGCTL_PNP10
LAN_SMBCLK_R
LAN_SMBDATA_R
PCIE_PTX_GLANRX_N7_C
PCIE_PTX_GLANRX_P7_C
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
ENAB_3VLAN
+3.3V_LAN
+1.0V_LAN
+1.0V_LAN
+1.0V_LAN
+3.3V_RUN
+3.3V_LAN
+3.3V_LAN+3.3V_ALW
+3.3V_LAN
+3.3V_ALW2
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+PWR_SRC_S
LANCLK_REQ#<15>
PLTRST_LAN#<17>
CLK_PCIE_LAN#<15>
CLK_PCIE_LAN<15>
PCIE_PRX_GLANTX_P7<15>
PCIE_PRX_GLANTX_N7<15>
PM_LANPHY_ENABLE<18>
SIO_SLP_LAN#<16,39>
SW_LAN_TX0- <44>
SW_LAN_TX0+ <44>
SW_LAN_TX1- <44>
SW_LAN_TX1+ <44>
SW_LAN_TX2+ <44>
SW_LAN_TX2- <44>
SW_LAN_TX3- <44>
SW_LAN_TX3+ <44>
DOCK_LOM_TRD0- <38>
DOCK_LOM_TRD0+ <38>
DOCK_LOM_TRD1+ <38>
DOCK_LOM_TRD1- <38>
DOCK_LOM_TRD2- <38>
DOCK_LOM_TRD2+ <38>
DOCK_LOM_TRD3- <38>
DOCK_LOM_TRD3+ <38>
DOCKED<39>
DOCK_LOM_ACTLED_YEL# <38>
DOCK_LOM_SPD10LED_GRN# <38>
DOCK_LOM_SPD100LED_ORG# <38>
LAN_ACTLED_YEL# <44>
LED_10_GRN# <44>
LED_100_ORG# <44>
LAN_SMBDATA<15>
LAN_SMBCLK<15>
PCIE_PTX_GLANRX_N7<15>
PCIE_PTX_GLANRX_P7<15>
WLAN_LAN_DISB# <39>
LAN_DISABLE#_R<39>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Intel 82579 (Hanksville) / LAN SW
31 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Intel 82579 (Hanksville) / LAN SW
31 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Intel 82579 (Hanksville) / LAN SW
31 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
SMBus Device Address 0xC8
FROM NIC DOCKED 1: TO DOCK
0: TO RJ45
LAN ANALOG
SWITCH
TO
DOCK
Layout Notice : Place bead as
close PI3L500 as possible
Place C462, C463 and L29 close to U31
Note:
+1.0V_LAN will work at 0.95V to 1.15V
Idc max=330mA
Place C1178 close to pin5
R1144
0_0402_5%~D
R1144
0_0402_5%~D
1 2
Q35A
DMN66D0LDW-7_SOT363-6~D
Q35A
DMN66D0LDW-7_SOT363-6~D
61
2
R561
1K_0402_1%~D
R561
1K_0402_1%~D
12
L32 12NH_0603CS-120EJTS_5%~DL32 12NH_0603CS-120EJTS_5%~D
1 2
U32
PI3L720ZHEX_TQFN42_9X3P5~D
U32
PI3L720ZHEX_TQFN42_9X3P5~D
SEL
13
A0+
2
A0-
3
A1+
6
A1-
7
A2+
9
A2-
10
A3+
11
B0+ 38
C0+ 36
B0- 37
C0- 35
B1+ 34
C1+ 32
B1- 33
C1- 31
B2+ 29
C2+ 27
B2- 28
C2- 26
B3+ 25
C3+ 23
B3- 24
C3- 22
A3-
12
LEDA0
15
LEDA1
16
LEDA2
42
LEDB0 17
LEDC0 19
LEDB1 18
LEDC1 20
LEDB2 41
LEDC2 40
PAD_GND
43
VDD 1
VDD 4
VDD 8
VDD 14
VDD 21
VDD 30
VDD 39
PD
5
C471
33P_0402_50V8J~D
C471
33P_0402_50V8J~D
1
2
C469
0.1U_0402_10V7K~D
C469
0.1U_0402_10V7K~D
1
2
R551 0_0402_5%~DR551 0_0402_5%~D
1 2
C477
2200P_0402_50V7K~D
C477
2200P_0402_50V7K~D
1
2
R557
10K_0402_5%~D
@R557
10K_0402_5%~D
@
12
C478
0.1U_0402_10V7K~D
C478
0.1U_0402_10V7K~D
1 2
C460 0.1U_0402_10V7K~DC460 0.1U_0402_10V7K~D
1 2
R553 4.7K_0402_5%~DR553 4.7K_0402_5%~D
12
S
G
D
Q34
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q34
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
45
1
C462
10U_0603_6.3V6M~D
C462
10U_0603_6.3V6M~D
1
2
C458 0.1U_0402_10V7K~DC458 0.1U_0402_10V7K~D
12
R546 10K_0402_5%~D@R546 10K_0402_5%~D@
1 2
C476
0.1U_0402_10V7K~D
C476
0.1U_0402_10V7K~D
1
2
C466
0.1U_0402_10V7K~D
C466
0.1U_0402_10V7K~D
1
2
PCIE
MDI
SMBUS
JTAG LED
U31
82579_QFN48_6X6~D
PCIE
MDI
SMBUS
JTAG LED
U31
82579_QFN48_6X6~D
RSVD_VCC3P3_1 1
RSVD_VCC3P3_2 2
LAN_DISABLE_N
3
VDD3P3_OUT 4
VDD3P3_IN 5
RSVD_NC 6
CTRL_1P0 7
VDD1P0_8 8
XTAL_OUT
9
XTAL_IN
10
VDD1P0_11 11
RBIAS
12
MDI_PLUS0 13
MDI_MINUS0 14
VDD3P3_15 15
VDD1P0_16 16
MDI_PLUS1 17
MDI_MINUS1 18
VDD3P3_19 19
MDI_PLUS2 20
MDI_MINUS2 21
VDD1P0_22 22
MDI_PLUS3 23
MDI_MINUS3 24
LED2
25
LED0
26
LED1
27
SMB_CLK
28
VDD3P3_29 29
TEST_EN
30
SMB_DATA
31
JTAG_TDI
32
JTAG_TMS
33 JTAG_TDO
34
JTAG_TCK
35
PE_RST_N
36
VDD1P0_37 37
PETp
38
PETn
39
VDD1P0_40 40
PERp
41
PERn
42
VDD1P0_43 43
PE_CLKP
44
PE_CLKN
45
VDD1P0_46 46
VDD1P0_47 47
CLK_REQ_N
48
VSS_EPAD 49
L37 12NH_0603CS-120EJTS_5%~DL37 12NH_0603CS-120EJTS_5%~D
1 2
C464
1U_0603_10V7K~D
C464
1U_0603_10V7K~D
1
2
R564
100K_0402_5%~D
R564
100K_0402_5%~D
12
R1187 0_0402_5%~DR1187 0_0402_5%~D
1 2
L30 12NH_0603CS-120EJTS_5%~DL30 12NH_0603CS-120EJTS_5%~D
1 2
R555 0_0402_5%~DR555 0_0402_5%~D
1 2
L36 12NH_0603CS-120EJTS_5%~DL36 12NH_0603CS-120EJTS_5%~D
1 2
C467
0.1U_0402_10V7K~D
C467
0.1U_0402_10V7K~D
1
2
R552 0_0402_5%~DR552 0_0402_5%~D
1 2
C463
0.1U_0402_10V7K~D
C463
0.1U_0402_10V7K~D
1
2
R562
3.01K_0402_1%~D
R562
3.01K_0402_1%~D
12
C1178
22U_0805_6.3V6M~D
C1178
22U_0805_6.3V6M~D
1
2
C468
0.1U_0402_10V7K~D
C468
0.1U_0402_10V7K~D
1
2
U15
TC7SH08FU_SSOP5~D
U15
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
C473
0.1U_0402_25V6K~D
C473
0.1U_0402_25V6K~D
1
2
C475
10U_0603_6.3V6M~D
C475
10U_0603_6.3V6M~D
1
2
R554 4.7K_0402_5%~DR554 4.7K_0402_5%~D
12
C459 0.1U_0402_10V7K~DC459 0.1U_0402_10V7K~D
12
Q35B
DMN66D0LDW-7_SOT363-6~D
Q35B
DMN66D0LDW-7_SOT363-6~D
3
5
4
L33 12NH_0603CS-120EJTS_5%~DL33 12NH_0603CS-120EJTS_5%~D
1 2
C1177
22U_0805_6.3V6M~D
C1177
22U_0805_6.3V6M~D
1
2
C474
0.1U_0402_25V6K~D
C474
0.1U_0402_25V6K~D
1
2
L29
4.7UH_CBC2012T4R7M_20%~D
L29
4.7UH_CBC2012T4R7M_20%~D
1 2
C461 0.1U_0402_10V7K~DC461 0.1U_0402_10V7K~D
1 2
R565
100K_0402_5%~D
R565
100K_0402_5%~D
12
T142 PAD~DT142 PAD~D
C472
0.1U_0402_25V6K~D
C472
0.1U_0402_25V6K~D
1
2
L31 12NH_0603CS-120EJTS_5%~DL31 12NH_0603CS-120EJTS_5%~D
1 2
R1638
470K_0402_5%~D
R1638
470K_0402_5%~D
12
L34 12NH_0603CS-120EJTS_5%~DL34 12NH_0603CS-120EJTS_5%~D
1 2
R549
10K_0402_5%~D
R549
10K_0402_5%~D
12
C470
33P_0402_50V8J~D
C470
33P_0402_50V8J~D
1
2
R547
10K_0402_5%~D
R547
10K_0402_5%~D
12
Y3
25MHZ_18PF_X3G025000DI1H-H~D
Y3
25MHZ_18PF_X3G025000DI1H-H~D
IN
1
GND
2
OUT 3
GND 4
R545 10K_0402_5%~D@R545 10K_0402_5%~D@
1 2
L35 12NH_0603CS-120EJTS_5%~DL35 12NH_0603CS-120EJTS_5%~D
1 2
T143 PAD~DT143 PAD~D

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_TPM_TCM
JETWAY_CLK14M
JETWAY_CLK14M
TCM_BA0
TCM_BA0
TCM_BA1
CLKRUN#
IRQ_SERIRQ
LPC_LFRAME#
PCH_PLTRST#_EC
SP_TPM_LPC_EN
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
NC_P
TCM_BA1
TCM_BA0
JETWAY_CLK14MCLK_PCI_TPM_TCM
NC_P
CLK_PCI_TPM_TCM
CLKRUN#
PCH_PLTRST#_EC
IRQ_SERIRQ
LPC_LFRAME#
SP_TPM_LPC_EN
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
PP
PP
TCM_BA1
USH_SMBDAT
USH_SMBCLK
+3.3V_SB3V
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_SB3V
+3.3V_RUN
+3.3V_SB3V
+3.3V_SUS
+5V_RUN
+3.3V_SUS
+3.3V_RUN
JETWAY_CLK14M <15>
SP_TPM_LPC_EN<39>
LPC_LAD0<14,34,39,40>
LPC_LAD2<14,34,39,40>
LPC_LAD1<14,34,39,40>
LPC_LAD3<14,34,39,40>
CLK_PCI_TPM_TCM<15>
LPC_LFRAME#<14,34,39,40>
PCH_PLTRST#_EC<17,34,35,39,40>
IRQ_SERIRQ<14,39,40>
CLKRUN#<16,39,40>
USBP7-<17>
USBP7+<17>
USH_SMBDAT<40>
BT_COEX_STATUS2<41>
BT_PRI_STATUS<41>
USH_DET#<18>
BCM5882_ALERT#<39>
USH_SMBCLK<40>
PLTRST_USH#<17>
USH_PWR_STATE#<39>
CONTACTLESS_DET#<18>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
TPM/TCM
32 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
TPM/TCM
32 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
TPM/TCM
32 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
USH board conn
LPC layout: Place TCM first and then end LPC with TPM.
Co-lay U37 and U39
LOW:Power Down Mode
High:Working Mode
ATMEL TPM for E4
China TCM: NationZ & Jetway co-lay
R658
10K_0402_5%~D
@R658
10K_0402_5%~D
@
12
R873 0_0402_5%~D1@ R873 0_0402_5%~D1@
1 2
C552
2200P_0402_50V7K~D
C552
2200P_0402_50V7K~D
1
2
R659
10K_0402_5%~D
R659
10K_0402_5%~D
12
C53
0.1U_0402_25V6K~D
C53
0.1U_0402_25V6K~D
1
2
C550
2200P_0402_50V7K~D
C550
2200P_0402_50V7K~D
1
2
CE4
27P_0402_50V8J~D
@
CE4
27P_0402_50V8J~D
@
1
2
U37
SSX44-B-D-T1_TSSOP28~D
4@ U37
SSX44-B-D-T1_TSSOP28~D
4@
LAD3
17 LAD2
20 LAD1
23 LAD0
26
LCLK
21
LFRAME#
22
LRESET#
16
SERIRQ
27
CLKRUN#
15
PP
7NC_1 1
NC_2 2
NC_6 6
NC_8 8
BA_0
9
VDD_0 10
VDD_1 19
VDD_2 24
GND_4 4
GND_11 11
GND_18 18
GND_25 25
BA_1
3
NC_5 5
NC_12 12
NC_13 13
NC_P 14
LPCPD#
28
RE5
33_0402_5%~D
@RE5
33_0402_5%~D
@
12
R656 4.7K_0402_5%~D@R656 4.7K_0402_5%~D@
1 2
R589 2.2K_0402_5%~DR589 2.2K_0402_5%~D
1 2
C554 1U_0402_6.3V6K~DC554 1U_0402_6.3V6K~D
1 2
R657
10K_0402_5%~D
@R657
10K_0402_5%~D
@
12
C44
0.1U_0402_25V6K~D
1@
C44
0.1U_0402_25V6K~D
1@
1
2
JUSH1
TYCO_2-2041070-0
CONN@JUSH1
TYCO_2-2041070-0
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
GND1
21
GND2
22
C45
4700P_0402_25V7K~D
1@
C45
4700P_0402_25V7K~D
1@
1
2
RE6
33_0402_5%~D
@
RE6
33_0402_5%~D
@
12
CE3
27P_0402_50V8J~D
@
CE3
27P_0402_50V8J~D
@1
2
C551
2200P_0402_50V7K~D
C551
2200P_0402_50V7K~D
1
2
C51
0.1U_0402_25V6K~D
C51
0.1U_0402_25V6K~D
1
2
C52
0.1U_0402_25V6K~D
C52
0.1U_0402_25V6K~D
1
2
U39
AT97SC3204-X2A14-AB_TSSOP28
1@U39
AT97SC3204-X2A14-AB_TSSOP28
1@
LAD3
17 LAD2
20 LAD1
23 LAD0
26
LCLK
21
LFRAME#
22
LRESET#
16
SERIRQ
27
CLKRUN#
15
NC_7 7
ATEST_1
1
ATEST_2
2
GPIO6 6
TESTI 8
TESTBI 9
VCC_0 10
VCC_1 19
VCC_2 24
GND_4 4
GND_11 11
GND_18 18
GND_25 25
ATEST_3
3
SB3V
5
V_BAT 12
NBO_13 13
NBO_14 14
LPCPD#
28
R660
10K_0402_5%~D
R660
10K_0402_5%~D
12
C553
0.1U_0402_25V6K~D
C553
0.1U_0402_25V6K~D
1
2
R585 2.2K_0402_5%~DR585 2.2K_0402_5%~D
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SD/MMCCD#
SD/MMCCD#
SDWP
SDWP
SD/MMCCMD
SD/MMCDAT3
SD/MMCDAT0
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT4
SD/MMCDAT7
SD/MMCDAT6
SD/MMCDAT5
SD/MMCCLK
+PE_VDDH
+3.3VDDH
+VDDH_SD
+PE_VDDH
PCIE_PRX_MMITX_N6_C
PCIE_PRX_MMITX_P6_C
PCIE_PTX_MMIRX_N6_C
PCIE_PTX_MMIRX_P6_C
+OZ_AVDD
+OZ_DVDD
+SKT_VCC
SD/MMCCLK
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT0SD/MMCDAT0_R
SD/MMCDAT1_R
SD/MMCDAT2_R
SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7SD/MMCDAT7_R
SD/MMCDAT5_R
SD/MMCDAT6_R
SD/MMCDAT4_R
SD/MMCDAT3_R
SD/MMCCMD
SD/MMCCLKSD/MMCCLK_R
SD/MMCCMD_R
SDWP
SD/MMCCD#
+3.3V_RUN_CARD
+1.5V_RUN
+3.3V_RUN
+3.3V_RUN_CARD
MMICLK_REQ#<15>
PLTRST_MMI#<17>
CLK_PCIE_MMI<15>
CLK_PCIE_MMI#<15>
PCIE_PRX_MMITX_P6<15>
PCIE_PRX_MMITX_N6<15>
PCIE_PTX_MMIRX_N6<15>
PCIE_PTX_MMIRX_P6<15>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Card Reader
33 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Card Reader
33 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Card Reader
33 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Link Done
place close to pin U38.32
EMI request
C573 0.1U_0402_10V7K~DC573 0.1U_0402_10V7K~D
1 2
R673 33_0402_5%~DR673 33_0402_5%~D
1 2
C575
0.1U_0402_25V6K~D
C575
0.1U_0402_25V6K~D
1
2
C569 0.1U_0402_10V7K~DC569 0.1U_0402_10V7K~D
1 2
R664 33_0402_5%~DR664 33_0402_5%~D
1 2
JSD1
T-SOL_156-4000000901_NR~D
CONN@JSD1
T-SOL_156-4000000901_NR~D
CONN@
GND_SW
16
DAT3/SD1
14
CMD/SD2
12
VSS1/SD3
10
VCC/SD4
9
CLK/SD5
8
GND/VSSS2/SD6
6
DAT0/SD7
4
DAT1/SD8
3
DAT2/SD9
15
DAT4/MMC10
13
DAT5/MMC11
11
DAT6/MMC12
7
DAT7/MMC13
5
CD_WP_SW/GND
19
CD_WP_SW/GND
20
CD_SW_TAISOL/SD
2
WP/SW_TAISOL/SD
1
CD_SW/SD
17
WP_SW/SD
18
C568 0.1U_0402_10V7K~DC568 0.1U_0402_10V7K~D
1 2
R676 33_0402_5%~DR676 33_0402_5%~D
1 2
C561
4.7U_0603_6.3V6K~D
C561
4.7U_0603_6.3V6K~D
1
2
C564
4.7U_0603_6.3V6K~D
C564
4.7U_0603_6.3V6K~D
1
2
L44 BLM18BD601SN1D_0603~DL44 BLM18BD601SN1D_0603~D
1 2
C579
4.7U_0603_6.3V6K~D
C579
4.7U_0603_6.3V6K~D
1
2
U38
OZ600FJ0LN_QFN32_5X5~D
U38
OZ600FJ0LN_QFN32_5X5~D
AVDD 8
PE_TXP
6
PE_TXM
7
PE_RST#
13
MMI_D3 24
MMI_D4 23
PE_REXT
3
DVDD 10
MS_CD# 11
MULTI-IO1
14
MULTI-IO2
31
MMI_D6 21
MMI_D7 20
MMI_D5 22
MS_D1 27
PE_RXP
5
VDDH
9
SD_D2 26
MS_D2 25
SKT_VCC 17
PE_RXM
4
MMI_CLK 18
SD_WPI 30
SD_CD# 12
3.3VDDH
16
SD_CMD/MS_BS 19
PE_REFCLKM
1PE_REFCLKP
2MMI_VCC_OUT 15
SD_D1 28
MMI_D0 29
PE_VDDH
32
GPAD
33
C578
0.1U_0402_25V6K~D
C578
0.1U_0402_25V6K~D
1
2
C577
4.7U_0603_6.3V6K~D
C577
4.7U_0603_6.3V6K~D
1
2
C574
0.01U_0402_16V7K~D
C574
0.01U_0402_16V7K~D
1
2
C560
4.7U_0603_6.3V6K~D
C560
4.7U_0603_6.3V6K~D
1
2
C566
4.7U_0603_6.3V6K~D
C566
4.7U_0603_6.3V6K~D
1
2
R672 33_0402_5%~DR672 33_0402_5%~D
1 2
C563
0.1U_0402_25V6K~D
C563
0.1U_0402_25V6K~D
1
2
C571
0.1U_0402_25V6K~D
C571
0.1U_0402_25V6K~D
1
2
R674 33_0402_5%~DR674 33_0402_5%~D
1 2
C572
4.7U_0603_6.3V6K~D
C572
4.7U_0603_6.3V6K~D
1
2
CE757
10P_0402_50V8J~D
@CE757
10P_0402_50V8J~D
@
1
2
C565
0.1U_0402_25V6K~D
C565
0.1U_0402_25V6K~D
1
2
R670 33_0402_5%~DR670 33_0402_5%~D
1 2
L45
BLM18PG471SN1D_2P~D
L45
BLM18PG471SN1D_2P~D
1 2
L47
BLM18BD601SN1D_0603~D
L47
BLM18BD601SN1D_0603~D
1 2
RE678
33_0402_5%~D
@RE678
33_0402_5%~D
@
1 2
R665 33_0402_5%~DR665 33_0402_5%~D
1 2
C559
0.1U_0402_25V6K~D
C559
0.1U_0402_25V6K~D
1
2
R826
10K_0402_5%~D
R826
10K_0402_5%~D
12
R669 33_0402_5%~DR669 33_0402_5%~D
1 2
C562
0.1U_0402_25V6K~D
C562
0.1U_0402_25V6K~D
1
2
R677 191_0402_1%~DR677 191_0402_1%~D
1 2
R668 33_0402_5%~DR668 33_0402_5%~D
1 2
C567 0.1U_0402_10V7K~DC567 0.1U_0402_10V7K~D
1 2
R663 33_0402_5%~DR663 33_0402_5%~D
1 2
C576
0.1U_0402_25V6K~D
C576
0.1U_0402_25V6K~D
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP5-
USBP5+
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
MINI1CLK_REQ#
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
USBP4-
USBP4+PCIE_MCARD1_DET#
WLAN_LED#
PCIE_PRX_WLANTX_P2
PCIE_PRX_WLANTX_N2
WLAN_RADIO_DIS#_R
PCH_PLTRST#_EC
PCIE_WAKE#
COEX2_WLAN_ACTIVE
PCIE_MCARD2_DET#_R
WLAN_RADIO_DIS#_R
COEX2_WLAN_ACTIVE
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
WIMAX_LED#
UIM_RESET
UIM_CLK
UIM_VPP
PCIE_MCARD1_DET#
PCIE_MCARD1_DET#
COEX1_BT_ACTIVE
LED_WWAN_OUT#LED_WWAN_OUT#
USBP6-
USBP6+
PCH_PLTRST#_EC
PCIE_MCARD3_DET#
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
MINI3CLK_REQ#
PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
COEX2_WLAN_ACTIVE
PCIE_WAKE#
UIM_DATA
PCIE_MCARD2_DET#USB_MCARD2_DET#
USB_MCARD2_DET#
PCIE_MCARD1_DET#USB_MCARD1_DET#
USB_MCARD1_DET#
USB_MCARD1_DET#
USB_MCARD2_DET#
WWAN_SMBCLK
WWAN_SMBDAT
WWAN_SMBCLK
WWAN_SMBDAT
MSDATA
MSDATA
USB_MCARD3_DET# PCIE_MCARD3_DET#
USB_MCARD3_DET#
USB_MCARD3_DET#
LED_WWAN_OUT#
WIMAX_LED#
WLAN_LED#
WIRELESS_LED#WIRELESS_LED#
PCIE_PTX_WANRX_N1_C
PCIE_PTX_WANRX_P1_C
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C
PCIE_PTX_WPANRX_N5_C
PCIE_PTX_WPANRX_P5_C
PCIE_MCARD2_DET#_R
PCIE_WAKE#
LPC_LAD1
LPC_LFRAME#
LPC_LAD0
LPC_LAD3
LPC_LAD2
PCLK_80H
PCH_PLTRST#_EC
+1.5V_RUN
+3.3V_PCIE_WWAN
+1.5V_RUN
+3.3V_PCIE_WWAN+3.3V_PCIE_WWAN
+3.3V_WLAN
+1.5V_RUN
+3.3V_WLAN
+3.3V_PCIE_WWAN
+3.3V_WLAN
+1.5V_RUN
+SIM_PWR
+SIM_PWR
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_PCIE_FLASH+3.3V_PCIE_FLASH
+1.5V_RUN
+3.3V_PCIE_FLASH
+1.5V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_PCIE_WWAN
+3.3V_ALW_PCH
+3.3V_PCIE_WWAN
+3.3V_WLAN
PCIE_PRX_WANTX_N1<15>
PCIE_PRX_WANTX_P1<15>
CLK_PCIE_MINI1<15>
CLK_PCIE_MINI1#<15>
MINI1CLK_REQ#<15>
WWAN_RADIO_DIS# <39>
PCIE_MCARD2_DET#<17>
PCH_PLTRST#_EC <17,32,35,39,40>
PCIE_MCARD1_DET#<18>
PCIE_PRX_WLANTX_P2<15>
PCIE_PRX_WLANTX_N2<15>
MINI2CLK_REQ#<15>
WLAN_RADIO_DIS#<39>
PCH_CL_RST1#<15>
PCH_CL_DATA1<15>
HOST_DEBUG_TX <40>
HOST_DEBUG_RX<40>
MSCLK<40>
MSDATA <40>
PCIE_MCARD3_DET#<18>
MINI3CLK_REQ#<15>
CLK_PCIE_MINI3#<15>
CLK_PCIE_MINI3<15>
COEX2_WLAN_ACTIVE<41>
COEX1_BT_ACTIVE<41>
USB_MCARD2_DET# <18>
USB_MCARD1_DET# <18>
USBP4+ <17>
USBP4- <17>
USBP6- <17>
USBP6+ <17>
PCIE_PRX_WPANTX_P5<15>
PCIE_PRX_WPANTX_N5<15>
PCIE_WAKE#<28,35,40>
USBP5- <17>
USBP5+ <17>
CLK_PCIE_MINI2#<15>
CLK_PCIE_MINI2<15>
PCH_CL_CLK1<15>
DDR_XDP_WAN_SMBDAT<12,13,15,27>
DDR_XDP_WAN_SMBCLK<12,13,15,27>
WIRELESS_LED# <39,43>
PCIE_PTX_WANRX_N1<15>
PCIE_PTX_WANRX_P1<15>
PCIE_PTX_WLANRX_P2<15>
PCIE_PTX_WLANRX_N2<15>
PCIE_PTX_WPANRX_N5<15>
PCIE_PTX_WPANRX_P5<15>
PCIE_WAKE#<28,35,40>
HW_GPS_DISABLE2#<39>
LPC_LAD1 <14,32,39,40>
LPC_LFRAME# <14,32,39,40>
LPC_LAD0 <14,32,39,40>
LPC_LAD3 <14,32,39,40>
LPC_LAD2 <14,32,39,40>
PCLK_80H<15>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Mini Card
34 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Mini Card
34 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Mini Card
34 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+-9%
+3.3Vaux
+3.3V
Voltage
Tolerance
+1.5V
+-9%
+-5%
PWR
Rail
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
250 (Wake enable)
5 (Not wake enable)
NA
1/2 Minicard Flash Card H=4
Mini WLAN/WIMAX H=6.7
Mini WWAN/GPS/LTE/UWB H=5.2
SIM Card Push-Push
WIMAX_LED# STUDY FOR DEBUG
check
WPAN Noise
just reserve
R705
100K_0402_5%~D
R705
100K_0402_5%~D
1 2
C595 4700P_0402_25V7K~DC595 4700P_0402_25V7K~D
1 2
D31
RB751S40T1_SOD523-2~D
D31
RB751S40T1_SOD523-2~D
21
C596 0.1U_0402_10V7K~DC596 0.1U_0402_10V7K~D
1 2
JSIM1
SUYIN_254070FB008S205ZL
CONN@JSIM1
SUYIN_254070FB008S205ZL
CONN@
VCC
1
RST
2
CLK
3
GND 5
VPP 6
I/O 7
NC 8
NC
4
GND 9
GND 10
Q124B
DMN66D0LDW-7_SOT363-6~D
Q124B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C593
33P_0402_50V8J~D
C593
33P_0402_50V8J~D
1
2
R1157 0_0402_5%~DR1157 0_0402_5%~D
12
R1160
2.2K_0402_5%~D
@R1160
2.2K_0402_5%~D
@
12
R693 0_0402_5%~D@R693 0_0402_5%~D@
1 2
C607
0.1U_0402_25V6K~D
C607
0.1U_0402_25V6K~D
1
2
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D
1 2
R1158 0_0402_5%~DR1158 0_0402_5%~D
12
R699 100K_0402_5%~D@R699 100K_0402_5%~D@
1 2
R709 0_0402_5%~DR709 0_0402_5%~D
1 2
R700 0_0402_5%~DR700 0_0402_5%~D
1 2
C606
0.1U_0402_25V6K~D
C606
0.1U_0402_25V6K~D
1
2
C623
0.047U_0402_16V4Z~D
C623
0.047U_0402_16V4Z~D
1
2
R719
100K_0402_5%~D
R719
100K_0402_5%~D
1 2
R707 0_0402_5%~DR707 0_0402_5%~D
1 2
R711 100K_0402_5%~DR711 100K_0402_5%~D
1 2
R698 0_0402_5%~D@R698 0_0402_5%~D@
1 2
C605
0.047U_0402_16V4Z~D
C605
0.047U_0402_16V4Z~D
1
2
C600
33P_0402_50V8J~D
@C600
33P_0402_50V8J~D
@
1
2
R704
0_0402_5%~D
R704
0_0402_5%~D
1 2
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D
1 2
C603
0.1U_0402_25V6K~D
@C603
0.1U_0402_25V6K~D
@
1
2
C619
0.047U_0402_16V4Z~D
C619
0.047U_0402_16V4Z~D
1
2
R718
100K_0402_5%~D
R718
100K_0402_5%~D
1 2
C602
0.047U_0402_16V4Z~D
C602
0.047U_0402_16V4Z~D
1
2
C608
4.7U_0603_6.3V6K~D
C608
4.7U_0603_6.3V6K~D
1
2
C618 0.1U_0402_10V7K~DC618 0.1U_0402_10V7K~D
1 2
C612
33P_0402_50V8J~D
C612
33P_0402_50V8J~D
1
2
R695 100K_0402_5%~DR695 100K_0402_5%~D
1 2
R725 0_0402_5%~DR725 0_0402_5%~D
1 2
R694 100K_0402_5%~DR694 100K_0402_5%~D
12
+
C615
330U_D2E_6.3VM_R25~D
+
C615
330U_D2E_6.3VM_R25~D
1
2
R703 0_0402_5%~DR703 0_0402_5%~D
12
C598 0.1U_0402_10V7K~DC598 0.1U_0402_10V7K~D
1 2
G
D
S
Q77
SSM3K7002FU_SC70-3~D
G
D
S
Q77
SSM3K7002FU_SC70-3~D
2
13
C621
0.1U_0402_25V6K~D
@C621
0.1U_0402_25V6K~D
@
1
2
C627
4700P_0402_25V7K~D
@C627
4700P_0402_25V7K~D
@
1
2
C614
33P_0402_50V8J~D
C614
33P_0402_50V8J~D
1
2
C601
0.047U_0402_16V4Z~D
C601
0.047U_0402_16V4Z~D
1
2
C616
1U_0402_6.3V6K~D
C616
1U_0402_6.3V6K~D
1
2
C613
22U_0805_6.3V6M~D
C613
22U_0805_6.3V6M~D
1
2
C611
0.047U_0402_16V4Z~D
C611
0.047U_0402_16V4Z~D
1
2
C626
4.7U_0603_6.3V6K~D
C626
4.7U_0603_6.3V6K~D
1
2
R702 0_0402_5%~DR702 0_0402_5%~D
1 2
JMINI1
MOLEX_48338-1088~D
CONN@JMINI1
MOLEX_48338-1088~D
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
+
C1176
330U_D2E_6.3VM_R25~D
@
+
C1176
330U_D2E_6.3VM_R25~D
@
1
2
C622
0.047U_0402_16V4Z~D
C622
0.047U_0402_16V4Z~D
1
2
R692 100K_0402_5%~DR692 100K_0402_5%~D
1 2
C594
0.047U_0402_16V4Z~D
C594
0.047U_0402_16V4Z~D
1
2
C610
0.047U_0402_16V4Z~D
C610
0.047U_0402_16V4Z~D
1
2
R1159
2.2K_0402_5%~D
@R1159
2.2K_0402_5%~D
@
12
Q124A
DMN66D0LDW-7_SOT363-6~D
Q124A
DMN66D0LDW-7_SOT363-6~D
61
2
R712 100K_0402_5%~D@R712 100K_0402_5%~D@
12
R706 0_0402_5%~D@R706 0_0402_5%~D@
1 2
R710 0_0402_5%~DR710 0_0402_5%~D
12
C624
0.1U_0402_25V6K~D
C624
0.1U_0402_25V6K~D
1
2
C604
0.047U_0402_16V4Z~D
C604
0.047U_0402_16V4Z~D
1
2
R701 100K_0402_5%~DR701 100K_0402_5%~D
1 2
C620
0.047U_0402_16V4Z~D
C620
0.047U_0402_16V4Z~D
1
2
R708 0_0402_5%~D@R708 0_0402_5%~D@
1 2
R697 0_0402_5%~D@R697 0_0402_5%~D@
1 2
JMINI3
LOTES_AAA-PCI-073-P02-A
CONN@JMINI3
LOTES_AAA-PCI-073-P02-A
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
JMINI2
MOLEX_48338-1088~D
CONN@JMINI2
MOLEX_48338-1088~D
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
C617 0.1U_0402_10V7K~DC617 0.1U_0402_10V7K~D
1 2
C625
0.1U_0402_25V6K~D
C625
0.1U_0402_25V6K~D
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCARD_WWAN_PWREN#
MCARD_WWAN_PWREN#
USBP10_D+
USBP10_D-
CARD_SMBCLK
CARD_SMBDAT
CARD_RESET#
CPUSB#
EXPRCRD_CPPE#
EXPRCRD_CPPE#
CARD_RESET#
CPUSB#
EXPRCRD_STBY_R#
PCIE_PTX_EXPRX_N3_C
PCIE_PTX_EXPRX_P3_C
+3.3V_ALW +3.3V_PCIE_FLASH
+3.3V_PCIE_WWAN
+3.3V_ALW
+3.3V_WLAN+3.3V_ALW
+3.3V_SUS +1.5V_CARD
+3.3V_CARDAUX
+3.3V_CARD
+1.5V_RUN +1.5V_CARD+3.3V_SUS
+3.3V_RUN +3.3V_CARD
+3.3V_CARDAUX
+3.3V_RUN
+1.5V_RUN
+1.5V_CARD
+3.3V_CARD
+PWR_SRC_S
+3.3V_ALW
+3.3V_ALW
+PWR_SRC_S
+PWR_SRC_S
+3.3V_ALW
MCARD_MISC_PWREN<39>
MCARD_WWAN_PWREN<39>
AUX_EN_WOWL<39>
USBP10+<17>
USBP10-<17>
CARD_SMBCLK<40>
CARD_SMBDAT<40>
PCIE_WAKE#<28,34,40>
EXPCLK_REQ#<15>
CLK_PCIE_EXP#<15>
CLK_PCIE_EXP<15>
PCIE_PRX_EXPTX_N3<15>
PCIE_PRX_EXPTX_P3<15>
PCH_PLTRST#_EC<17,32,34,39,40>
RUN_ON<27,39,42,48>
PCIE_PTX_EXPRX_N3<15>
PCIE_PTX_EXPRX_P3<15>
SIO_SLP_S3#<11,16,27,39,42,48>
EXPRCRD_DET#<18>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCIE-SATA SW / PCIE PWR
35 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCIE-SATA SW / PCIE PWR
35 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PCIE-SATA SW / PCIE PWR
35 56Thursday, June 23, 2011
Compal Electronics, Inc.
Power Control for Mini card3
Express Card Conn.
Express Card PWR S/W
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Power Control for Mini card1
Power Control for Mini card2
Note: Add connection on pin4, pin5, pin 13
and pin14 to support GMT 2nd source part
Q41B
DMN66D0LDW-7_SOT363-6~D
Q41B
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q41A
DMN66D0LDW-7_SOT363-6~D
Q41A
DMN66D0LDW-7_SOT363-6~D
61
2
Q39A
DMN66D0LDW-7_SOT363-6~D
Q39A
DMN66D0LDW-7_SOT363-6~D
61
2
C647 0.1U_0402_10V7K~DC647 0.1U_0402_10V7K~D
1 2
R1628
1M_0402_5%~D
R1628
1M_0402_5%~D
12
R732
2.2K_0402_5%~D
R732
2.2K_0402_5%~D
12
C643
10U_0603_6.3V6M~D
C643
10U_0603_6.3V6M~D
1
2
C650
4700P_0402_25V7K~D
C650
4700P_0402_25V7K~D
1
2
C633
0.1U_0402_25V6K~D
C633
0.1U_0402_25V6K~D
1
2
R729
100K_0402_5%~D
R729
100K_0402_5%~D
12
S
G
D
Q38
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q38
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
45
1
R713
100K_0402_5%~D
R713
100K_0402_5%~D
12
R721
100K_0402_5%~D
R721
100K_0402_5%~D
12
C645
0.1U_0402_25V6K~D
C645
0.1U_0402_25V6K~D
1
2
C634
0.1U_0402_25V6K~D
C634
0.1U_0402_25V6K~D
1
2
R717 0_0402_5%~D@R717 0_0402_5%~D@
1 2
R731
2.2K_0402_5%~D
R731
2.2K_0402_5%~D
12
R715
20K_0402_5%~D
R715
20K_0402_5%~D
12
C644
4700P_0402_25V7K~D
C644
4700P_0402_25V7K~D
1
2
C635
0.1U_0402_25V6K~D
C635
0.1U_0402_25V6K~D
1
2
C649
0.1U_0402_25V6K~D
C649
0.1U_0402_25V6K~D
1
2
R716
100K_0402_5%~D
R716
100K_0402_5%~D
12
R734 0_0402_5%~DR734 0_0402_5%~D
1 2
R730
20K_0402_5%~D
R730
20K_0402_5%~D
12
L49 DLW21SN900SQ2L_0805_4P~DL49 DLW21SN900SQ2L_0805_4P~D
1
122
33
4
4
R726
100K_0402_5%~D
R726
100K_0402_5%~D
12
R733
100K_0402_5%~D
R733
100K_0402_5%~D
12
C648 0.1U_0402_10V7K~DC648 0.1U_0402_10V7K~D
1 2
R728
100K_0402_5%~D
R728
100K_0402_5%~D
12
C642
0.1U_0402_25V6K~D
C642
0.1U_0402_25V6K~D
1
2
R714
100K_0402_5%~D
R714
100K_0402_5%~D
12
Q43B
DMN66D0LDW-7_SOT363-6~D
Q43B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C632
4700P_0402_25V7K~D
C632
4700P_0402_25V7K~D
1
2
C641
10U_0603_6.3V6M~D
C641
10U_0603_6.3V6M~D
1
2
R724 0_0402_5%~D@R724 0_0402_5%~D@
1 2
C637
0.1U_0402_25V6K~D
C637
0.1U_0402_25V6K~D
1
2
C638
10U_0603_6.3V6M~D
C638
10U_0603_6.3V6M~D
1
2
S
G
D
Q42
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q42
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
45
1
C640
0.1U_0402_25V6K~D
C640
0.1U_0402_25V6K~D
1
2
G
D
S
Q73
SSM3K7002FU_SC70-3~D
G
D
S
Q73
SSM3K7002FU_SC70-3~D
2
13
R1620
1M_0402_5%~D
R1620
1M_0402_5%~D
12
R722
100K_0402_5%~D
R722
100K_0402_5%~D
12
Q43A
DMN66D0LDW-7_SOT363-6~D
Q43A
DMN66D0LDW-7_SOT363-6~D
61
2
R1625
1M_0402_5%~D
R1625
1M_0402_5%~D
12
S
G
D
Q40
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q40
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
45
1
R727 0_0402_5%~D@R727 0_0402_5%~D@
1 2
R723
1K_0402_1%~D
R723
1K_0402_1%~D
12
JEXP1
TYCO_2-2041070-6~D
CONN@JEXP1
TYCO_2-2041070-6~D
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
GND
27
GND
28
Q39B
DMN66D0LDW-7_SOT363-6~D
Q39B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C646
0.1U_0402_25V6K~D
C646
0.1U_0402_25V6K~D
1
2
U41
TPS2231MRGPR-2_QFN20_4X4~D
U41
TPS2231MRGPR-2_QFN20_4X4~D
STBY#
1
3.3VIN
23.3VOUT 3
NC
4
NC
5
SYSRST#
6
GND 7
PERST# 8
CPUSB# 9
CPPE# 10
1.5VOUT 11
1.5VIN
12
NC
13
NC
14
AUXOUT 15
NC
16
AUXIN
17
RCLKEN 18
OC#
19
SHDN#
20
PAD 21

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP1_D-
USBP1_D+
USBP0_D-
USBP0_D+ USBP0_R_D+
USBP0_R_D-
USBP0_R_D+
USBP0_R_D-
USB3RP1_D+
USB3TN1_D-
USB3TP1_D+
USB3RN1_D-
USB3RN1_RP
USB3RP1_RP USB3RP1_D+
USB3TP1_RP_C USB3TP1_D+
USB3TN1_D-USB3TN1_RP_C
USB3TP1_D+
USB3RP1_D+
USB3TP1_D+
USB3RN1_D-
USB3TN1_D-
USB3RP1_D+
USB3TN1_D-
USB3RN1_D-
USB3RN1_D-
USB3RN2
USB3RP2 USB3RP2_D+
USB3TP2_C USB3TP2_D+
USB3TN2_D-USB3TN2_C
USB3TP2_D+
USB3RP2_D+
USB3TP2_D+
USB3RN2_D-
USB3TN2_D-
USB3RP2_D+
USB3TN2_D-
USB3RN2_D- USB3RN2_D-
USBP1_D+
USBP1_D-
USB3RP2_D+
USB3TN2_D-
USB3TP2_D+
USB3RN2_D-
USB3TN1_RP
USB3TP1_RP
PWRSHARE_EN#
SB#
USBP0_D+
USBP0_D-
PWRSHARE_EN
SEL
USB3TP1_C
USB3TN1_C
USB3RP1_C
USB3RN1_C
USB3TP1_RP
USB3TN1_RP
USB3RP1_RP
USB3RN1_RP
+A_DE1
+B_DE1
+A_EQ0
+B_EQ0
+B_DE0
+A_EQ1
+A_DE0
+B_EQ1
PWRSHARE_EN#
+5V_USB_CHG_PWR
+5V_ALW +5V_ALW
+5V_ALW
+5V_USB_PWR
+3.3V_RUN +3.3V_RUN
+3.3V_RUN
+5V_ALW
+5V_USB_CHG_PWR
+SATA_SIDE_PWR
+5V_ALW
+5V_USB_PWR
USBP1+<17>
USBP1-<17>
USB3RN2<17>
USB3RP2<17>
USB_PWR_SHR_EN#<39>
USBP0+<17>
USBP0-<17>
USB_PWR_SHR_VBUS_EN<39>
USB3TN1<17>
USB3TP1<17>
USB3RN1<17>
USB3RP1<17>
USB3TP2<17>
USB3TN2<17>
USB_OC0# <17>
ESATA_USB_PWR_EN#<39>
USB_OC4# <17>
USB_OC0# <17>
USB_SIDE_EN#<39>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
USB 3.0 x2
36 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
USB 3.0 x2
36 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
USB 3.0 x2
36 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
new conn
new conn
L98
DLW21SN900HQ2L_0805_4P~D
L98
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
R783 4.7K_0402_5%~D@R783 4.7K_0402_5%~D@
1 2
10U_0805_10V6K~D
C678
10U_0805_10V6K~D
C678
1
2
R740 0_0402_5%~D@R740 0_0402_5%~D@
1 2
D72
PESD5V0U2BT_SOT23-3~D
D72
PESD5V0U2BT_SOT23-3~D
2
3
1
R1606 0_0402_5%~D@R1606 0_0402_5%~D@
1 2
8
D78
IP4292CZ10-TB_XSON10U10~D
8
D78
IP4292CZ10-TB_XSON10U10~D
4
5
1
6
2
7
3
10
9
R1626 0_0402_5%~DR1626 0_0402_5%~D
12
C675
0.1U_0402_25V6K~D
C675
0.1U_0402_25V6K~D
1
2
U2
PI5USB1457AZAEX_TDFN8_2X2~D
U2
PI5USB1457AZAEX_TDFN8_2X2~D
INT 1
D+ 3
SEL 4
D- 2
VDD
5Y+
6
SB
8
Y-
7
GND 9
L52
DLW21SN900SQ2L_0805_4P~D
L52
DLW21SN900SQ2L_0805_4P~D
1
122
33
4
4
R751
3.3K_0402_1%~D
R751
3.3K_0402_1%~D
12
R784 0_0402_5%~DR784 0_0402_5%~D
1 2
R1607 0_0402_5%~D@R1607 0_0402_5%~D@
1 2
C669
0.01U_0402_16V7K~D
C669
0.01U_0402_16V7K~D
1
2
R737 0_0402_5%~D@R737 0_0402_5%~D@
1 2
C715
0.1U_0402_25V6K~D
C715
0.1U_0402_25V6K~D
1
2
R753
4.7K_0402_5%~D
@
R753
4.7K_0402_5%~D
@
12
U49
TPS2560DRCR-PG1.1_SON10_3X3~D
U49
TPS2560DRCR-PG1.1_SON10_3X3~D
GND
1
IN
2
ILIM 7
OUT2 8
FAULT1# 10
IN
3
EN1#
4
OUT1 9
T-PAD 11
EN2#
5FAULT#2 6
+
C651
150U_B2_6.3V-M~D
+
C651
150U_B2_6.3V-M~D
1
2
R750
24.9K_0402_1%~D
R750
24.9K_0402_1%~D
12
L95
DLW21SN900HQ2L_0805_4P~D
L95
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
R1609 0_0402_5%~D@R1609 0_0402_5%~D@
1 2
C670
0.1U_0402_25V6K~D
C670
0.1U_0402_25V6K~D
1
2
C654
0.1U_0402_25V6K~D
C654
0.1U_0402_25V6K~D
1
2
+
C652
150U_B2_6.3V-M~D
+
C652
150U_B2_6.3V-M~D
1
2
8
D79
IP4292CZ10-TB_XSON10U10~D
8
D79
IP4292CZ10-TB_XSON10U10~D
4
5
1
6
2
7
3
10
9
R1612 0_0402_5%~D@R1612 0_0402_5%~D@
1 2
R754
4.7K_0402_5%~D
@
R754
4.7K_0402_5%~D
@
12
D73
PESD5V0U2BT_SOT23-3~D
D73
PESD5V0U2BT_SOT23-3~D
2
3
1
JUSB1
SANTA_373280-1
JUSB1
SANTA_373280-1
VBUS
1
D-
2
D+
3
GND
4
StdA-SSRX-
5
StdA-SSRX+
6
GND-DRAIN
7
StdA-SSTX-
8
StdA-SSTX+
9
GND 10
GND 11
GND 12
GND 13
L97
DLW21SN900HQ2L_0805_4P~D
L97
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
C413 0.01U_0402_16V7K~DC413 0.01U_0402_16V7K~D
12
U48
TPS2560DRCR-PG1.1_SON10_3X3~D
U48
TPS2560DRCR-PG1.1_SON10_3X3~D
GND
1
IN
2
ILIM 7
OUT2 8
FAULT1# 10
IN
3
EN1#
4
OUT1 9
T-PAD 11
EN2#
5FAULT#2 6
R1608 0_0402_5%~D@R1608 0_0402_5%~D@
1 2
C414 0.01U_0402_16V7K~DC414 0.01U_0402_16V7K~D
12
C655
0.1U_0402_25V6K~D
C655
0.1U_0402_25V6K~D
1
2
C412 0.01U_0402_16V7K~DC412 0.01U_0402_16V7K~D
12
U90
PS8710BTQFN24GTR-A0_TQFN24_4X4
U90
PS8710BTQFN24GTR-A0_TQFN24_4X4
VDD
1
B_EQ0 2
I2C_R0
3
I2C_R1
4
PD#
5B_DE1 6
REXT 7
B_INn 8
B_INp 9
SCL_CTL
16
A_DE1 18
A_EQ0 17
SDA_CTL
15
TEST 14
VDD
13
A_OUTp 12
A_OUTn 11
GND 10
A_INp
19
A_INn
20
GND 21
B_OUTp
22
B_OUTn
23
12C_EN 24
EPAD 25
10U_0805_10V6K~D
C676
10U_0805_10V6K~D
C676
1
2
R1613
10K_0402_5%~D
@R1613
10K_0402_5%~D
@
1 2
R771
4.7K_0402_5%~D
@
R771
4.7K_0402_5%~D
@
12
C415 0.01U_0402_16V7K~DC415 0.01U_0402_16V7K~D
12
R1603 0_0402_5%~D@R1603 0_0402_5%~D@
1 2
C677
0.1U_0402_25V6K~D
C677
0.1U_0402_25V6K~D
1
2
JUSB2
SANTA_373130-1
JUSB2
SANTA_373130-1
VBUS
1
D-
2
D+
3
GND
4
StdA-SSRX-
5
StdA-SSRX+
6
GND-DRAIN
7
StdA-SSTX-
8
StdA-SSTX+
9
GND 10
GND 11
GND 12
GND 13
R748
24.9K_0402_1%~D
R748
24.9K_0402_1%~D
12
R773 4.7K_0402_5%~D@R773 4.7K_0402_5%~D@
1 2
C411 0.01U_0402_16V7K~DC411 0.01U_0402_16V7K~D
12
R1605 0_0402_5%~D@R1605 0_0402_5%~D@
1 2
R1604 0_0402_5%~D@R1604 0_0402_5%~D@
1 2
R736 0_0402_5%~D@R736 0_0402_5%~D@
1 2
C416 0.01U_0402_16V7K~DC416 0.01U_0402_16V7K~D
12
R816
100K_0402_5%~D
R816
100K_0402_5%~D
1 2
R779 4.7K_0402_5%~D@R779 4.7K_0402_5%~D@
1 2
C410 0.01U_0402_16V7K~DC410 0.01U_0402_16V7K~D
12
R752
4.7K_0402_5%~D
@
R752
4.7K_0402_5%~D
@
12
L96
DLW21SN900HQ2L_0805_4P~D
L96
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
R781 4.7K_0402_5%~D@R781 4.7K_0402_5%~D@
1 2
C417 0.01U_0402_16V7K~DC417 0.01U_0402_16V7K~D
12
L51
DLW21SN900SQ2L_0805_4P~D
L51
DLW21SN900SQ2L_0805_4P~D
1
122
33
4
4
R739 0_0402_5%~D@R739 0_0402_5%~D@
1 2
G
D
S
Q48
SSM3K7002FU_SC70-3~D
G
D
S
Q48
SSM3K7002FU_SC70-3~D
2
13
R1614
10K_0402_5%~D
R1614
10K_0402_5%~D
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP9_D+
USBP9_D-
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP SATA_PRX_DTX_P4
SATA_PRX_DTX_N4
SATA_PTX_DRX_P4
SATA_PTX_DRX_N4
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
USBP9_D+
USBP9_D-
ESATA_PTX_DRX_N4_C
REXT
ESATA_PE1
ESATA_PTX_DRX_P4_RP
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP
ESATA_PE2
ESATA_PTX_DRX_N4_RP
ESATA_PTX_DRX_P4_C
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C ESATA_PRX_DTX_P4
ESATA_PTX_DRX_P4
ESATA_PTX_DRX_N4
ESATA_PRX_DTX_N4
+SATA_SIDE_PWR
+3.3V_RUN
+3.3V_RUN
USBP9-<17>
USBP9+<17>
ESATA_PRX_DTX_P4_C<14>
ESATA_PRX_DTX_N4_C<14>
ESATA_PTX_DRX_P4_C<14>
ESATA_PTX_DRX_N4_C<14>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
USB/ESATA/IO/MDC
37 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
USB/ESATA/IO/MDC
37 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
USB/ESATA/IO/MDC
37 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place D74 close to JESATA1
ESATA Repeater
R1595
0_0402_5%~D
R1595
0_0402_5%~D
12
D74
PESD5V0U2BT_SOT23-3~D
D74
PESD5V0U2BT_SOT23-3~D
2
3
1
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D
1 2
C666 0.01U_0402_16V7K~DC666 0.01U_0402_16V7K~D
12
C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D
1 2
R741 0_0402_5%~DR741 0_0402_5%~D
1 2
C663 0.01U_0402_16V7K~DC663 0.01U_0402_16V7K~D
12
C665 0.01U_0402_16V7K~DC665 0.01U_0402_16V7K~D
12
+
C667
150U_B2_6.3V-M~D
+
C667
150U_B2_6.3V-M~D
1
2
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D
1 2
R742
0_0402_5%~D
@R742
0_0402_5%~D
@
12
C664 0.01U_0402_16V7K~DC664 0.01U_0402_16V7K~D
12
L90
DLW21SN900SQ2L_0805_4P~D
L90
DLW21SN900SQ2L_0805_4P~D
1
122
33
4
4
R1151 0_0402_5%~D@R1151 0_0402_5%~D@
1 2
C662
0.1U_0402_25V6K~D
C662
0.1U_0402_25V6K~D
1
2
R1594
0_0402_5%~D
R1594
0_0402_5%~D
12
C661
0.01U_0402_16V7K~D
C661
0.01U_0402_16V7K~D
1
2
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D
1 2
R1150 0_0402_5%~D@R1150 0_0402_5%~D@
1 2
R743
0_0402_5%~D
R743
0_0402_5%~D
12
USB
ESATA
JESA1
TYCO_2129160-2~D
CONN@
USB
ESATA
JESA1
TYCO_2129160-2~D
CONN@
VBUS
1
D-
2
D+
3
GND
4
GND
5
A+
6
A-
7
GND
8
B-
9
B+
10
GND
11
GND
12
GND
13
GND
14
GND
15
C668
0.1U_0402_25V6K~D
C668
0.1U_0402_25V6K~D
1
2
U44
PS8513BTQFN20GTR-A0_TQFN20_4X4
U44
PS8513BTQFN20GTR-A0_TQFN20_4X4
A_INp
1
A_INn
2
PREXT/NC/VDD 20
NC_GND_VDD
19
B_OUTp
5
VCC 6
EN
7
B_PRE 8
A_PRE 9
NC/GND/VDD 10
NC_GND_VDD
18
GND
13 B_INp 11
B_INn 12
NC_GND_VDD
17
A_OUTn 14
A_OUTp 15
VCC 16
GND
3
B_OUTn
4
GND
21

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SLICE_BAT_PRES#
DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3
DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2
DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1
DPC_DOCK_LANE_N0
DPC_DOCK_LANE_P0
DPC_PCH_DOCK_HPD
DPD_PCH_DOCK_HPD
CLK_PCI_DOCK
DOCK_DET_R#
DOCK_AC_OFF
DOCK_DET#
DPD_PCH_DOCK_HPD
DPC_PCH_DOCK_HPD
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
DAI_12MHZ# DAI_BCLK#
DPC_CA_DET
DPC_DOCK_AUX
DPC_DOCK_AUX#
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
DPD_CA_DET
DPD_DOCK_AUX
DPD_DOCK_AUX#
RED_DOCK
GREEN_DOCK
BLUE_DOCK
DPD_DOCK_LANE_P3
DPD_DOCK_LANE_N3
DPD_DOCK_LANE_P2
DPD_DOCK_LANE_N2
DPD_DOCK_LANE_P1
DPD_DOCK_LANE_N1
DPD_DOCK_LANE_N0
DPD_DOCK_LANE_P0
+DOCK_PWR_BAR
+DOCK_PWR_BAR
+LOM_VCT
+NBDOCK_DC_IN_SS
+3.3V_ALW
+LOM_VCT
DOCK_AC_OFF <39,55>
RED_DOCK<24>
BLUE_DOCK<24>
GREEN_DOCK<24>
VSYNC_DOCK<24>
DAT_MSE<40>
CLK_MSE<40>
DAI_BCLK#<29>
DAI_LRCK#<29>
DAI_DI<29>
DAI_DO#<29>
DAI_12MHZ#<29>
D_LAD1<39>
D_LAD0<39>
D_LAD2<39>
D_LAD3<39>
D_LFRAME#<39>
D_CLKRUN#<39>
D_SERIRQ<39>
D_DLDRQ1#<39>
CLK_PCI_DOCK<17>
DOCK_SMB_CLK<40>
DOCK_SMB_DAT<40>
DOCK_SMB_ALERT#<39,55>
DOCK_PSID<45>
DOCK_PWR_BTN#<40>
DOCK_LOM_SPD10LED_GRN#<31>
HSYNC_DOCK<24>
DOCK_LOM_SPD100LED_ORG# <31>
DAT_KBD <40>
CLK_KBD <40>
DOCK_LOM_TRD0+ <31>
DOCK_LOM_TRD0- <31>
DOCK_LOM_TRD2- <31>
DOCK_LOM_TRD2+ <31>
ACAV_DOCK_SRC# <55>
CLK_DDC2_DOCK <24>
DAT_DDC2_DOCK <24>
SATA_PTX_DKRX_P5_C <14>
SATA_PTX_DKRX_N5_C <14>
SATA_PRX_DKTX_P5_C <14>
BREATH_LED# <39,43>
DOCK_LOM_ACTLED_YEL# <31>
DOCK_LOM_TRD1- <31>
DOCK_LOM_TRD1+ <31>
DOCK_LOM_TRD3- <31>
DOCK_LOM_TRD3+ <31>
DOCK_DCIN_IS+ <53>
DOCK_DCIN_IS- <53>
DOCK_POR_RST# <40>
SATA_PRX_DKTX_N5_C <14>
USBP8- <17>
USBP8+ <17>
USBP3+ <17>
USBP3- <17>
SLICE_BAT_PRES#<39,55> DOCK_DET# <39>
DPC_DOCK_AUX <26>
DPC_DOCK_AUX# <26>
DPC_CA_DET <26>DPD_CA_DET<26>
DPD_PCH_LANE_P0<16>
DPD_PCH_LANE_N0<16>
DPD_PCH_LANE_P1<16>
DPD_PCH_LANE_N1<16>
DPD_PCH_LANE_P2<16>
DPD_PCH_LANE_N2<16>
DPD_PCH_LANE_P3<16>
DPD_PCH_LANE_N3<16>
DPD_DOCK_AUX#<26>
DPD_DOCK_AUX<26>
DPD_PCH_DOCK_HPD<16>
DPC_PCH_LANE_P2 <16>
DPC_PCH_LANE_N2 <16>
DPC_PCH_LANE_P0 <16>
DPC_PCH_LANE_N0 <16>
DPC_PCH_LANE_P3 <16>
DPC_PCH_LANE_N3 <16>
DPC_PCH_LANE_P1 <16>
DPC_PCH_LANE_N1 <16>
DPC_PCH_DOCK_HPD <16>
USB3RN4 <17>
USB3RP4 <17>
USB3TN4 <17>
USB3TP4 <17>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DOCKING CONN
38 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DOCKING CONN
38 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
DOCKING CONN
38 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DOCK_DET_1
Close to DOCK
Its for Enhance ESD on dock issue.
Close to DOCK
Its for Enhance ESD on dock issue.
CE6
4.7U_0805_25V6K~D
@
CE6
4.7U_0805_25V6K~D
@
1
2
C680 0.1U_0402_10V7K~DC680 0.1U_0402_10V7K~D
12
CE9
4.7P_0402_50V8C~D
@CE9
4.7P_0402_50V8C~D
@
1
2
C700 0.01U_0402_16V7K~DC700 0.01U_0402_16V7K~D
1 2
C681 0.1U_0402_10V7K~DC681 0.1U_0402_10V7K~D
12
C704
12P_0402_50V8J~D
C704
12P_0402_50V8J~D
1
2
JDOCK1
JAE_WD2F144WB3R300~D
CONN@JDOCK1
JAE_WD2F144WB3R300~D
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
54 54
56 56
58 58
60 60
62 62
64 64
66 66
68 68
70 70
72 72
74 74
76 76
78 78
80 80
82 82
84 84
86 86
88 88
90 90
92 92
94 94
96 96
98 98
100 100
102 102
104 104
106 106
108 108
110 110
112 112
114 114
116 116
118 118
120 120
122 122
124 124
126 126
128 128
130 130
132 132
134 134
136 136
138 138
GND1
145
PWR1
146 PWR2 149
GND2 152
Shield_G 159
Shield_G 160
Shield_G 161
Shield_G 162
Shield_G 163
Shield_G 164
Shield_G
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G
157
Shield_G
158
139
139 140 140
141
141 142 142
143
143 144 144
PWR1
147
PWR1
148
PWR2 150
PWR2 151
C695
0.033U_0402_16V7K~D
C695
0.033U_0402_16V7K~D
1
2
C689 0.1U_0402_10V7K~DC689 0.1U_0402_10V7K~D
12
C701
1U_0402_6.3V6K~D
@
C701
1U_0402_6.3V6K~D
@
1
2
R757
100K_0402_5%~D
R757
100K_0402_5%~D
12
C679 0.1U_0402_10V7K~DC679 0.1U_0402_10V7K~D
12
RE11
10_0402_1%~D
@RE11
10_0402_1%~D
@
12
C688 0.1U_0402_10V7K~DC688 0.1U_0402_10V7K~D
12
C686 0.1U_0402_10V7K~DC686 0.1U_0402_10V7K~D
12
R758
100K_0402_5%~D
R758
100K_0402_5%~D
12
RE12
10_0402_1%~D
@RE12
10_0402_1%~D
@
12
R756
33_0402_5%~D
R756
33_0402_5%~D
12
C694 0.1U_0402_10V7K~DC694 0.1U_0402_10V7K~D
12
CE8
4.7P_0402_50V8C~D
@CE8
4.7P_0402_50V8C~D
@
1
2
C696
0.033U_0402_16V7K~D
C696
0.033U_0402_16V7K~D
1
2
C693 0.1U_0402_10V7K~DC693 0.1U_0402_10V7K~D
12
C698 0.01U_0402_16V7K~DC698 0.01U_0402_16V7K~D
12
C690 0.1U_0402_10V7K~DC690 0.1U_0402_10V7K~D
12 C691 0.1U_0402_10V7K~DC691 0.1U_0402_10V7K~D
12
C692 0.1U_0402_10V7K~DC692 0.1U_0402_10V7K~D
12
C697 0.01U_0402_16V7K~DC697 0.01U_0402_16V7K~D
12
R755 100K_0402_5%~DR755 100K_0402_5%~D
1 2
C702
0.1U_0603_50V7K~D
C702
0.1U_0603_50V7K~D
1
2
C684 0.1U_0402_10V7K~DC684 0.1U_0402_10V7K~D
12
D32
RB751S40T1_SOD523-2~D
D32
RB751S40T1_SOD523-2~D
21
C683 0.1U_0402_10V7K~DC683 0.1U_0402_10V7K~D
12
C682 0.1U_0402_10V7K~DC682 0.1U_0402_10V7K~D
12
C699 0.01U_0402_16V7K~DC699 0.01U_0402_16V7K~D
1 2
D33
SM24.TCT_SOT23-3~D
@
D33
SM24.TCT_SOT23-3~D
@
2
3
1
C703
0.1U_0603_50V7K~D
C703
0.1U_0603_50V7K~D
1
2
C685 0.1U_0402_10V7K~DC685 0.1U_0402_10V7K~D
12
C687 0.1U_0402_10V7K~DC687 0.1U_0402_10V7K~D
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_5048CLK_SIO_14M
RUN_ON
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
0.75V_DDR_VTT_ON
CPU_VTT_ON
LCD_TST
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
SYS_LED_MASK#
SYS_LED_MASK#
LPC_LAD3
IRQ_SERIRQ
PCH_PLTRST#_EC
LPC_LDRQ1#
CLKRUN#
LPC_LAD1
LPC_LAD2
D_LAD3
D_LAD1
D_DLDRQ1#
CLK_PCI_5048
LPC_LFRAME#
LAN_DISABLE#_R
D_CLKRUN#
D_LFRAME#
LID_CL_SIO#
ME_FWP
WLAN_RADIO_DIS#
D_LAD0
D_LAD2
LPC_LAD0
D_SERIRQ
0.75V_DDR_VTT_ON
CLK_SIO_14M
WWAN_RADIO_DIS#
LPC_LDRQ0#
ESATA_USB_PWR_EN#
SIO_SLP_A#
VGA_ID
VGA_ID
WIRELESS_ON#/OFF
BT_RADIO_DIS#
BC_INT#_ECE5048
BC_DAT_ECE5048
BC_CLK_ECE5048
BCM5882_ALERT#
EN_DOCK_PWR_BAR
PSID_DISABLE#
ENVDD_PCH
PANEL_BKEN_EC
USH_PWR_STATE#
EN_I2S_NB_CODEC#
LCD_TST
AUD_NB_MUTE#
DOCK_DET#
LCD_VCC_TEST_EN
CCD_OFF
DOCKED
MCARD_WWAN_PWREN
AUD_HP_NB_SENSE
ESATA_USB_PWR_EN#
DOCK_AC_OFF_EC
SIO_SLP_LAN#
DOCK_HP_DET
DOCK_MIC_DET
+CAP_LDO
SP_TPM_LPC_EN
ME_FWP
RUN_ON
MODULE_BATT_PRES#
CPU_DETECT#
MOD_SATA_PCIE#_DET
PBAT_PRES#
SLICE_BAT_PRES#
ZODD_WAKE#
MCARD_MISC_PWREN
LID_CL_SIO#
MODULE_ON
CHARGE_MODULE_BATT
CHARGE_PBATT
DEFAULT_OVRDE
CPU_DETECT#
SLP_ME_CSW_DEV#
SYS_PWROK
CPU_VTT_ON
SIO_SLP_SUS#
VGA_ID
SLICE_BAT_ON
CHARGE_EN
SLICE_BAT_ON
WIRELESS_LED#
MASK_SATA_LED#
LED_SATA_DIAG_OUT#
MODC_EN
RUNPWROK
CRT_SWITCH
DYN_TURB_PWR_ALRT#
SLICE_BAT_PRES#
DYN_TURB_PWR_ALRT#
TEMP_ALERT#_R TEMP_ALERT#
SUS_ON
SUS_ON
HW_GPS_DISABLE2#
HW_GPS_DISABLE2#
USH_PWR_ON
BREATH_LED#
BAT1_LED#
BAT2_LED#
USB_PWR_SHR_EN#
USB_PWR_SHR_EN#
WWAN_RADIO_DIS#
PROCHOT_GATE
PROCHOT_GATE
USB_SIDE_EN#
USB_SIDE_EN#
USB_PWR_SHR_VBUS_EN
USB_PWR_SHR_VBUS_EN
MCARD_PCIE_SATA#
MCARD_PCIE_SATA#
CHARGE_EN
DOCK_SMB_ALERT#
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
LPC_LFRAME# <14,32,34,40>
SYS_LED_MASK#<43>
WLAN_RADIO_DIS#<34>
WWAN_RADIO_DIS#<34>
LID_CL# <30,43>
0.75V_DDR_VTT_ON <47>
IMVP_VR_ON <51>
SIO_EXT_WAKE#<18>
LPC_LDRQ0# <14>
D_SERIRQ <38>
D_DLDRQ1# <38>
CLK_PCI_5048 <17>
D_LAD3 <38>
D_CLKRUN# <38>
D_LAD1 <38>
LPC_LDRQ1# <14>
PCH_PLTRST#_EC <17,32,34,35,40>
D_LAD2 <38>
D_LFRAME# <38>
IRQ_SERIRQ <14,32,40>
CLK_SIO_14M <15>
D_LAD0 <38>
CLKRUN# <16,32,40>
SIO_SLP_A# <16,42,49>
AUX_EN_WOWL <35>
SIO_SLP_S4# <16>
SIO_SLP_S3# <11,16,27,35,42,48>
WIRELESS_ON#/OFF<30>
BT_RADIO_DIS#<41>
BC_CLK_ECE5048 <40>
BC_INT#_ECE5048 <40>
BC_DAT_ECE5048 <40>
BCM5882_ALERT#<32>
EN_DOCK_PWR_BAR<55>
PSID_DISABLE#<45>
LCD_TST<23>
EN_I2S_NB_CODEC#<29>
ENVDD_PCH<16,23>
USH_PWR_STATE#<32>
PANEL_BKEN_EC<23>
DOCKED<31>
DOCK_DET#<38>
AUD_NB_MUTE#<29>
LCD_VCC_TEST_EN<23>
AUD_HP_NB_SENSE<29,30>
ESATA_USB_PWR_EN#<36>
CCD_OFF<23>
MCARD_WWAN_PWREN<35>
ACAV_IN_NB <40,53,55>
DOCK_AC_OFF <38,55>
DOCK_AC_OFF_EC <55>
WLAN_LAN_DISB# <31>
SIO_SLP_LAN# <16,31>
GPIO_PSID_SELECT <45>
DOCK_HP_DET <29>
DOCK_MIC_DET <29>
SP_TPM_LPC_EN <32>
ME_FWP <14>
RUN_ON <27,35,42,48>
1.8V_RUN_PWRGD <48>
SPI_WP#_SEL <14>
IMVP_PWRGD <51>
EC_32KHZ_ECE5048 <40>
MODULE_BATT_PRES#<45,55>
PCH_DPWROK<16>
PBAT_PRES#<45,55>
SLICE_BAT_PRES#<38,55>
ZODD_WAKE#<28>
MCARD_MISC_PWREN<35>
MODULE_ON<55>
CHARGE_MODULE_BATT<55>
CHARGE_PBATT<55>
DEFAULT_OVRDE<55>
CPU_DETECT#<7>
MOD_SATA_PCIE#_DET<28>
SLP_ME_CSW_DEV#<18>
SYS_PWROK<7,16>
CPU_VTT_ON<50>
SIO_SLP_SUS# <16>
SLICE_BAT_ON<55>
WIRELESS_LED#<34,43>
MASK_SATA_LED# <43>
LED_SATA_DIAG_OUT# <43>
MODC_EN <28>
RUNPWROK <7,40>
CRT_SWITCH<24>
SUSACK#<16>
TEMP_ALERT# <18>
LAN_DISABLE#_R<31>
LPC_LAD0 <14,32,34,40>
SUS_ON <42>
HW_GPS_DISABLE2# <34>
BREATH_LED# <38,43>
BAT1_LED# <43>
BAT2_LED# <43>
USB_PWR_SHR_EN#<36>
LPC_LAD1 <14,32,34,40>
LPC_LAD2 <14,32,34,40>
LPC_LAD3 <14,32,34,40>
PROCHOT_GATE<53>
USB_PWR_SHR_VBUS_EN<36>
USB_SIDE_EN#<36>
DOCK_SMB_ALERT#<38,55>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
ECE5048
39 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
ECE5048
39 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
ECE5048
39 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+CAP_LDO trace width 20 mils
ME_FWP PCH has internal 20K PD.
(suspend power rail)
VGA_ID0
Discrete
UMA 1
0
trace width 20 mils
trace width 20 mils
C709
0.1U_0402_25V6K~D
C709
0.1U_0402_25V6K~D
1
2
R780 100K_0402_5%~DR780 100K_0402_5%~D
12
R761 100K_0402_5%~DR761 100K_0402_5%~D
1 2
R791 100K_0402_5%~DR791 100K_0402_5%~D
12
R807 10_0402_1%~DR807 10_0402_1%~D
12
R770
33K_0402_5%~D
@R770
33K_0402_5%~D
@
12
U46
ECE5048-LZY_DQFN132_11X11~D
DB Version 0.4
U46
ECE5048-LZY_DQFN132_11X11~D
DB Version 0.4
GPIOA0
B52
GPIOA1
A49
GPIOA2
B53
GPIOA3
A50
GPIOA4
B54
GPIOA5
A51
GPIOA6
B55
GPIOA7
A52
GPIOD1
B32
GPIOD2
A31
GPIOD3
B33
GPIOD4
B15
GPIOD5
A15
GPIOD6
B16
GPIOD7
A16
GPIOF7
B58 GPIOF6
A55 GPIOF5
B59 GPIOF4/TACH7
A56
GPIOL0/PWM7 B60
GPIOL1/PWM8 A57
GPIOF3/TACH8
B61 GPIOF2
A58 GPIOF1
B62 GPIOF0
A59
VCC1 B5
CAP_LDO B46
TEST_PIN B19
LAD0 A27
LAD1 A26
LAD2 B26
LAD3 B25
LFRAME# A21
LRESET# B22
PCICLK A28
CLKRUN# B20
LDRQ0# A23
LDRQ1# A22
SER_IRQ B21
14.318MHZ/GPIOM0 A32
GPIOM4/PWM6 B51
DLAD0 B29
DLAD1 B28
DLAD2 A25
DLAD3 A24
DLFRAME# B23
DCLKRUN# A19
DLDRQ1# B24
DSER_IRQ A20
PWRGD A4
OUT65 B56
VSS B27
GPIOM3/PWM4 B39
GPIOL2/PWM0 B64
VCC1 A17
VCC1 B30
VCC1 A43
VCC1 A54
BC_INT# A29
BC_DAT B31
BC_CLK A30
GPIOB0
A33
GPIOB1
B36
GPOC2
A34
GPOC3
B37
GPOC4
A35
GPOC5
B38
GPOC6/TACH4
A36
GPIOC7
A37
GPIOD0
B40
GPIOC1
A38
GPIOC0
B41
GPIOB7
A39
GPIOB6
B42
GPIOB5
A40
GPIOB4
B43
GPIOB3
A41
GPIOB2
B44
GPIOH0
B13
GPIOH1
A13
SYSOPT1/GPIOH2
A53
SYSOPT0/GPIOH3
B57
GPIOH4
B14
GPIOH5
A14
GPIOH6
B17
GPIOH7
B18
GPIOE0/RXD
A1
GPIOE1/TXD
B2
GPIOE2/RTS#
A2
GPIOE3/DSR#
B3
GPIOE4/CTS#
A3
GPIOE5/DTR#
B45
GPIOE6/RI#
A42
GPIOE7/DCD#
B4
GPIOG0/TACH5
B47
GPIOG1
A45
GPIOG2
B48
GPIOG3
A46
GPIOG4
B49
GPIOG5
A47
GPIOG6
B50
GPIOG7/TACH6
A48
GPIOK0 A8
GPIOK1/TACH3 B9
GPIOK2 B10
GPIOK3 A10
GPIOK4 B11
GPIOK5 A11
GPIOK6 B12
GPIOK7 A12
GPIOI1 B63
GPIOI2/TACH0 A60
GPIOI3 A61
GPIOI4 B65
GPIOI5 A62
GPIOI6 B66
GPIOI7 A63
GPIOJ0 B67
GPIOJ1/TACH1 A64
GPIOJ2/TACH2 A5
GPIOJ3 B6
GPIOJ4 A6
GPIOJ5 B7
GPIOJ6 A7
GPIOJ7 B8
GPIOM1 B34
CLK32/GPIOM2 B35
EP C1
GPIOL3/PWM1 B68
GPIOL4/PWM3 A9
GPIOL5/PWM2 B1
GPIOL6 A18
GPIOL7/PWM5 A44
R765 0_0402_5%~DR765 0_0402_5%~D
1 2
R768 10K_0402_5%~DR768 10K_0402_5%~D
1 2
R760 100K_0402_5%~DR760 100K_0402_5%~D
1 2
R790 100K_0402_5%~DR790 100K_0402_5%~D
12
R786 100K_0402_5%~DR786 100K_0402_5%~D
12
R3 100K_0402_5%~DR3 100K_0402_5%~D
1 2
U47
TC7SH08FU_SSOP5~D
@U47
TC7SH08FU_SSOP5~D
@
B
1
A
2
G
3
O4
P5
R778 100K_0402_5%~DR778 100K_0402_5%~D
1 2
R789 100K_0402_5%~DR789 100K_0402_5%~D
12
R794
10_0402_1%~D
@R794
10_0402_1%~D
@
12
R805
100K_0402_5%~D
R805
100K_0402_5%~D
12
R785 10K_0402_5%~DR785 10K_0402_5%~D
1 2
R803 100K_0402_5%~D@R803 100K_0402_5%~D@
1 2
C711 0.1U_0402_25V6K~D@C711 0.1U_0402_25V6K~D@
1 2
R766 100K_0402_5%~DR766 100K_0402_5%~D
1 2
R795
10_0402_1%~D
@R795
10_0402_1%~D
@
12
R797 0_0402_5%~DR797 0_0402_5%~D
1 2
R774 100K_0402_5%~DR774 100K_0402_5%~D
1 2
C707
0.1U_0402_25V6K~D
C707
0.1U_0402_25V6K~D
1
2
R769 100K_0402_5%~DR769 100K_0402_5%~D
1 2
R738 0_0402_5%~DR738 0_0402_5%~D
1 2
R777 100K_0402_5%~DR777 100K_0402_5%~D
12
R767 100K_0402_5%~DR767 100K_0402_5%~D
1 2
R800 100K_0402_5%~DR800 100K_0402_5%~D
1 2
C714
4.7U_0603_6.3V6K~D
C714
4.7U_0603_6.3V6K~D
1
2
R775 10K_0402_5%~DR775 10K_0402_5%~D
1 2
R457 100K_0402_5%~DR457 100K_0402_5%~D
1 2
T117PAD~D @T117PAD~D @
C708
0.1U_0402_10V7K~D
C708
0.1U_0402_10V7K~D
1
2
C710
0.1U_0402_25V6K~D
C710
0.1U_0402_25V6K~D
1
2
C713
4.7P_0402_50V8C~D
@C713
4.7P_0402_50V8C~D
@
1
2
R878 100K_0402_5%~DR878 100K_0402_5%~D
12
C705
10U_0603_6.3V6M~D
C705
10U_0603_6.3V6M~D
1
2
R802 0_0402_5%~D@R802 0_0402_5%~D@
1 2
R763 100K_0402_5%~DR763 100K_0402_5%~D
1 2 C706
0.1U_0402_25V6K~D
C706
0.1U_0402_25V6K~D
1
2
R793
1K_0402_1%~D
@R793
1K_0402_1%~D
@
12
D34
RB751S40T1_SOD523-2~D
@D34
RB751S40T1_SOD523-2~D
@
2 1
R798 100K_0402_5%~DR798 100K_0402_5%~D
1 2
R772 10K_0402_5%~D@R772 10K_0402_5%~D@
1 2
C716
0.047U_0402_16V4Z~D
C716
0.047U_0402_16V4Z~D
1
2
R804 1K_0402_1%~DR804 1K_0402_1%~D
1 2
C712
4.7P_0402_50V8C~D
@C712
4.7P_0402_50V8C~D
@
1
2
R782 100K_0402_5%~DR782 100K_0402_5%~D
12
R796 10K_0402_5%~DR796 10K_0402_5%~D
1 2
R776 100K_0402_5%~DR776 100K_0402_5%~D
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BC_DAT_ECE5048
JTAG_TDI
BC_DAT_ECE1117
PBAT_SMBDAT
PBAT_SMBCLK
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
CHARGER_SMBDAT
CHARGER_SMBCLK
SYSTEM_ID
CLK_PCI_MEC
JTAG_TDO
JTAG_CLK
FWP#
JTAG_TMS
DOCK_SMB_CLK
DOCK_SMB_DAT
AC_PRESENT
BOARD_ID
1.05V_0.8V_PWROK
1.05V_VTTPWRGD
VCCSAPW ROK
JTAG_RST#
LCD_SMBCLK
LCD_SMBDAT
RUNPWROK
MSDATA
DOCK_POR_RST#
DDR_ON
1.05V_0.8V_PWROK
EN_INVPWR
VCI_IN1#
RESET_OUT#
CPU1.5V_S3_GATE
BAY_SMBDAT
BAY_SMBCLK
DYN_TUR_CURRNT_SET#
PCIE_WAKE#
LAT_ON_SW#
PROCHOT#_EC
VOL_UP
VOL_DOWN
VOL_MUTE
HOST_DEBUG_RX
HOST_DEBUG_TXHOST_DEB_TX
MSCLK
MSDATA
HOST_DEB_RX
PCH_ALW _ON
MEC_XTAL2
MEC_XTAL1
DEVICE_DET#
RESET_OUT#
POWER_SW _IN#
DOCK_PW R_SW #
BC_DAT_ECE5048
BC_INT#_ECE5048
BC_CLK_ECE5048
CPU1.5V_S3_GATE
DYN_TUR_CURRNT_SET#
MSDATA
MSCLK
SIO_A20GATE
IRQ_SERIRQ
CLK_PCI_MEC
PCH_PLTRST#_EC
SIO_PWRBTN#
AC_PRESENT
PCH_RSMRST#
ME_SUS_PW R_ACK
ALW ON
LAT_ON_SW#
PS_ID
PROCHOT#_EC
SML1_SMBCLK
SML1_SMBDATA
CLK_KBD
DAT_TP_SIO
CLK_MSE
DAT_KBD
DAT_MSE
CLK_TP_SIO
PBAT_SMBCLK
PBAT_SMBDAT
HOST_DEBUG_TX
HOST_DEBUG_RX
FWP#
BC_DAT_ECE1117
BC_CLK_ECE1117
BC_INT#_ECE1117
+VR_CAP
LPC_LAD0
LPC_LAD1
LPC_LAD2
SIO_EXT_SCI#
LPC_LAD3
RESET_OUT#
CLKRUN#
LPC_LFRAME#
SYSTEM_ID
BOARD_ID
POWER_SW _IN#
+PECI_VREF
BIA_PWM_EC
JTAG_RST#
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
PCH_ALW _ON
DDR_HVREF_RST_GATE
RUNPWROK
DOCK_SMB_CLK
DOCK_SMB_DAT
BAY_SMBCLK
BAY_SMBDAT
LCD_SMBDAT
CARD_SMBDAT
CARD_SMBCLK
USH_SMBCLK
USH_SMBDAT
CHARGER_SMBCLK
CHARGER_SMBDAT
LCD_SMBCLK
SIO_EXT_SMI#
SIO_RCIN#
1.5V_SUS_PWRGD
PM_APW ROK
MEC_XTAL2 MEC_XTAL2_R
MEC_XTAL1
ACAV_IN
VCI_IN1#
PECI_EC_R
DDR_ON
ALW _PW RGD_3V_5V
1.05V_A_PW RGD
PCH_RSMRST#
BC_CLK_EMC4022
BC_INT#_EMC4022
BC_DAT_EMC4022
GPU_SMBDAT
GPU_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
+RTC_CELL_VBAT
LPC_LDRQ#_MEC
DOCK_PW R_SW #
LPC_LDRQ#_MEC
BEEP
DOCK_POR_RST#
PCIE_WAKE#
PCH_PCIE_WAKE#
SIO_SLP_S5#
ACAV_IN_NB
EN_INVPWR
DEVICE_DET#
BC_DAT_EMC4022
+3.3V_ALW
+3.3V_ALW
+5V_RUN
+RTC_CELL
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW _PCH
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+RTC_CELL
+RTC_CELL
+1.05V_RUN_VTT
+3.3V_RUN
+3.3V_ALW
+3.3V_M
+1.05V_RUN_VTT
+3.3V_ALW
+RTC_CELL
POWER_SW #_MB <30,41>
DOCK_PW R_BTN# <38>
1.05V_VTTPWRGD<50,54>
VCCSAPW ROK<54>
1.05V_0.8V_PWROK <14,51>
RUN_ON_ENABLE#<42>
H_PROCHOT# <7,51,53>
PCH_PW RGD# <22>
POWER_SW _IN#<22>
DOCK_PW R_SW #<22>
BC_INT#_ECE5048<39>
BC_DAT_ECE5048<39>
BC_CLK_ECE5048<39>
MSCLK <34>
MSDATA <34>
CPU1.5V_S3_GATE <11>
DYN_TUR_CURRNT_SET# <53>
SIO_A20GATE <18>
AC_PRESENT <16>
PCH_PLTRST#_EC<17,32,34,35,39>
CLK_PCI_MEC<17>
IRQ_SERIRQ<14,32,39>
SIO_PWRBTN# <16>
PCH_RSMRST# <41>
ME_SUS_PW R_ACK <16>
ALW ON <46>
PS_ID <45>
DAT_TP_SIO<41>
CLK_KBD<38>
DAT_KBD<38>
DAT_MSE<38>
CLK_MSE<38>
PBAT_SMBDAT<45>
SML1_SMBDATA<15>
SML1_SMBCLK<15>
PBAT_SMBCLK<45>
CLK_TP_SIO<41>
HOST_DEBUG_TX <34>
HOST_DEBUG_RX <34>
BC_CLK_ECE1 117<41> BC_DAT_ECE1117<41>
BC_INT#_ECE1117<41>
RESET_OUT# <16>
LPC_LFRAME#<14,32,34,39>
LPC_LAD1<14,32,34,39>
LPC_LAD2<14,32,34,39>
LPC_LAD3<14,32,34,39>
LPC_LAD0<14,32,34,39>
SIO_EXT_SCI#<18>
CLKRUN#<16,32,39>
VOL_MUTE <30>
BIA_PWM_EC<23>
PCH_ALW _ON<42>
RUNPWROK <7,39>
PCH_SATA_MOD_EN# <14>
DDR_HVREF_RST_GATE <7>
DOCK_SMB_DAT <38>
DOCK_SMB_CLK <38>
BAY_SMBDAT <28,45>
BAY_SMBCLK <28,45>
CHARGER_SMBCLK <53>
CARD_SMBDAT <35>
CHARGER_SMBDAT <53>
CARD_SMBCLK <35>
USH_SMBDAT <32>
USH_SMBCLK <32>
SIO_EXT_SMI#<17>
SIO_RCIN#<18>
PM_APW ROK <16>
1.5V_SUS_PWRGD <47>
EC_32KHZ_ECE5048<39>
ACAV_IN <22,53,55>
PECI_EC <7>
DDR_ON <47>
ALW _PW RGD_3V_5V <46>
1.05V_A_PW RGD <49>
BC_CLK_EMC40 22<22> BC_DAT_EMC4022<22>
BC_INT#_EMC4022<22>
EN_INVPWR <23>
BEEP<29>
DOCK_POR_RST#<38>
VOL_DOWN <30>
PCIE_WAKE#<28,34,35>
PCH_PCIE_WAKE#<16>
SIO_SLP_S5#<16>
ACAV_IN_NB<39,53,55>
DEVICE_DET# <28>
VOL_UP <30>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
MEC5055
40 55Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
MEC5055
40 55Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
MEC5055
40 55Thursday, June 23, 2011
Compal Electronics, Inc.
Place closely pin A29
Bat2 = Amber LED
Bat1 = Blue LED
20mA drive pins
1K
4700p
4700p
4700p
4700p
4700p
4700p
X02
X01
X00
62K
33K
8.2K
4.3K
R875 C744
130K 4700p
REV
240K 4700p
2K
*
JTAG_RST# citcuit
close to U51.B57
CHIPSET_ID for BID
function
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
BOARD_ID rise time is measured from 5%~68%.
A00
Modify name net
GPIO024/THSEL_STRAP note
i.THSEL_STRAP =1 (selects thermistor on diode channel 1)
ii.THSEL_STRAP = 0 (selects remote diode on diode channel 1)
32 KHz Clock
least
15mil
15mil
R863 close to
U51& least 250mils
C740 close to U51.B12
EC firmware can configure those un-used SMBUS pins as GPO (Output),
then it's OK to leave these un-used pins No-Connect.
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D
1 2
R823 100K_0402_5%~D@R823 100K_0402_5%~D@
12
G
D
S
Q45
SSM3K7002FU_SC70-3~D
G
D
S
Q45
SSM3K7002FU_SC70-3~D
2
13
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D
1 2
R876 100K_0402_5%~DR876 100K_0402_5%~D
1 2
R1068 0_0402_5%~DR1068 0_0402_5%~D
12
R759 10K_0402_5%~DR759 10K_0402_5%~D
1 2
R812 100K_0402_5%~D@R812 100K_0402_5%~D@
1 2
R420 2.2K_0402_5%~DR420 2.2K_0402_5%~D
12
R882 100K_0402_5%~DR882 100K_0402_5%~D
1 2
R829 2.2K_0402_5%~DR829 2.2K_0402_5%~D
1 2
JTAG1
@SHORT PADS~D
CONN@JTAG1
@SHORT PADS~D
CONN@
11
2
2
R880 100K_0402_5%~DR880 100K_0402_5%~D
1 2
R1156 100K_0402_5%~DR1156 100K_0402_5%~D
12
R881 100K_0402_5%~DR881 100K_0402_5%~D
1 2
R892 10K_0402_5%~DR892 10K_0402_5%~D
1 2
R885
10_0402_1%~D
@R885
10_0402_1%~D
@
12
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D
1 2
C733
1U_0402_6.3V6K~D
@C733
1U_0402_6.3V6K~D
@
1 2
R843 8.2K_0402_5%~D@R843 8.2K_0402_5%~D@
1 2
R1197 100K_0402_5%~DR1197 100K_0402_5%~D
12
R1118 100K_0402_5%~DR1118 100K_0402_5%~D
12
R867 0_0402_5%~DR867 0_0402_5%~D
1 2
R814 100K_0402_5%~DR814 100K_0402_5%~D
1 2
C742
4700P_0402_25V7K~D
C742
4700P_0402_25V7K~D
1
2
R864
49.9_0402_1%~D
R864
49.9_0402_1%~D
12
R862 0_0402_5%~DR862 0_0402_5%~D
1 2
R824
10K_0402_5%~D
R824
10K_0402_5%~D
12
C741
22P_0402_50V8J~D
C741
22P_0402_50V8J~D
1 2
C721
1U_0402_6.3V6K~D
@C721
1U_0402_6.3V6K~D
@
1 2
R799
10K_0402_5%~D
R799
10K_0402_5%~D
12
R418 2.2K_0402_5%~DR418 2.2K_0402_5%~D
12
C735
0.1U_0402_25V6K~D
C735
0.1U_0402_25V6K~D
1
2
C731
0.1U_0402_25V6K~D
C731
0.1U_0402_25V6K~D
1
2
R841 2.2K_0402_5%~DR841 2.2K_0402_5%~D
12
R879
10K_0402_5%~D
@R879
10K_0402_5%~D
@
1 2
R1169 100K_0402_5%~DR1169 100K_0402_5%~D
12
R848
10K_0402_5%~D
R848
10K_0402_5%~D
12
R817 100K_0402_5%~DR817 100K_0402_5%~D
12
R889 100K_0402_5%~DR889 100K_0402_5%~D
1 2
R836
100_0402_1%~D
@
R836
100_0402_1%~D
@
12
R854 2.2K_0402_5%~DR854 2.2K_0402_5%~D
12
R810
100K_0402_5%~D
R810
100K_0402_5%~D
12
C727
0.1U_0402_25V6K~D
C727
0.1U_0402_25V6K~D
1
2
C728
0.1U_0402_25V6K~D
C728
0.1U_0402_25V6K~D
1
2
C729
0.1U_0402_25V6K~D
C729
0.1U_0402_25V6K~D
1
2
R847
10K_0402_5%~D
R847
10K_0402_5%~D
12
R858
10K_0402_5%~D
R858
10K_0402_5%~D
12
U50
TC7SH08FU_SSOP5~D
U50
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
R838 2.2K_0402_5%~DR838 2.2K_0402_5%~D
12
R886 1K_0402_1%~DR886 1K_0402_1%~D
1 2
C734
1U_0402_6.3V6K~D
C734
1U_0402_6.3V6K~D
1
2
C730
10U_0603_6.3V6M~D
C730
10U_0603_6.3V6M~D
1
2
C720
0.1U_0402_25V6K~D
C720
0.1U_0402_25V6K~D
1 2
R852 4.7K_0402_5%~DR852 4.7K_0402_5%~D
12
R815
0_0402_5%~D
R815
0_0402_5%~D
1 2
R822 2.2K_0402_5%~DR822 2.2K_0402_5%~D
1 2
R850
100K_0402_5%~D
@R850
100K_0402_5%~D
@
12
C722
1U_0402_6.3V6K~D
C722
1U_0402_6.3V6K~D
1
2
C726
0.1U_0402_25V6K~D
C726
0.1U_0402_25V6K~D
1
2
R861
10K_0402_5%~D
R861
10K_0402_5%~D
1 2
R859
10K_0402_5%~D
R859
10K_0402_5%~D
12
C739
0.1U_0402_25V6K~D
C739
0.1U_0402_25V6K~D
1
2
R1180 0_0402_5%~DR1180 0_0402_5%~D
1 2
JDEG2
ACES_87153-10411
CONN@
JDEG2
ACES_87153-10411
CONN@
11
2 2 2
33
4 4 4
55
6 6 6
77
8 8 8
G1
11
G2
12
99
10 10 10
G4
14 G3
13
R871
1K_0402_1%~D
R871
1K_0402_1%~D
1 2
R884 1K_0402_1%~DR884 1K_0402_1%~D
1 2
PS/2 INTERFACE
JTAG INTERFACE
FAN PWM & TACH
BC-LINK
HOST INTERFACE
MASTER CLOCK
SMBUS INTERFACE
GENERAL PURPOSE I/O
MISC INTERFACE
DELL PWR SW INF
I2S
PECI
U51
MEC5055-LZY_DQFN132_11X11~D
DB Version 0.12
PS/2 INTERFACE
JTAG INTERFACE
FAN PWM & TACH
BC-LINK
HOST INTERFACE
MASTER CLOCK
SMBUS INTERFACE
GENERAL PURPOSE I/O
MISC INTERFACE
DELL PWR SW INF
I2S
PECI
U51
MEC5055-LZY_DQFN132_11X11~D
DB Version 0.12
GPIO012/I2C1H_DATA/I2C2D_DATA B7
GPIO013/I2C1H_CLK/I2C2D_CLK A7
GPIO021/RC_ID1 A10
VSS[1]
B11
GPIO025/UART_CLK B14
GPIO127/A20M A45
GPIO060/KBRST A25
GPIO110/PS2_CLK2/GPTP-IN6
A37
GPIO111/PS2_DAT2/GPTP-OUT6
B40
GPIO112/PS2_CLK1A
A38
GPIO113/PS2_DAT1A
B41
GPIO114/PS2_CLK0A
A39
GPIO115/PS2_DAT0A
B42
GPIO116/MSDATA A40
GPIO117/MSCLK B43
GPIO145/I2C1K_DATA/JTAG_TDI
A51
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
B56
JTAG_RST#
B57
GPIO146/I2C1K_CLK/JTAG_TDO
B55
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
A53 GPIO153/LED3 A55
GPIO123/BCM_A_CLK
A43
GPIO122/BCM_A_DAT
B45
GPIO121/BCM_A_INT#
A42
XTAL1
A61
XTAL2
A62
nFWP B65
VBAT B64
VTR[1] A11
VTR[2] A22
VTR[3] B35
VTR[4] A41
VTR[5] A58
GPIO160/32KHZ_OUT
B62
VCC_PRWGD B26
I2S_WS B28
GPIO106/HSPI_MOSI A36
AGND
B66
VR_CAP
B12
VSS_RO
B54
VTR[6] A52
GPIO006/I2C1B_CLK B5
GPIO005/I2C1B_DATA A4
GPIO004/I2C1A_CLK B4
GPIO003/I2C1A_DATA A3
GPIO130/I2C2A_DATA B48
GPIO131/I2C2A_CLK B49
GPIO132/I2C1G_DATA A47
GPIO140/I2C1G_CLK B50
GPIO154/I2C1C_DATA/PS2_CLK1B
B59
GPIO155/I2C1C_CLK/PS2_DAT1B
A56
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
A5
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
B6
GPIO141/I2C1F_DATA/I2C2B_DATA B52
GPIO142/I2C1F_CLK/I2C2B_CLK A49
GPIO143/I2C1E_DATA B53
GPIO144/I2C1E_CLK A50
GPIO052/FAN_TACH3
B23 GPIO051/FAN_TACH2
A21 GPIO050/FAN_TACH1
B22
GPIO056/PWM3
A24 GPIO055/PWM2
B25 GPIO054/PWM1
A23 GPIO053/PWM0
B24
GPIO103/ECGP_MISO B37
GPIO102/HSPI_SCLK A34
GPIO101/ECGP_SCLK B36
GPIO104/HSPI_MISO A35
GPIO105/ECGP_MOSI B38
VTR[7] B3
VTR[8] A26
GPIO157/LED2 B61
GPIO156/LED1 A57
I2S_CLK B27
VSS[4]
B60
GPIO022/BCM_B_CLK
A12
GPIO023/BCM_B_DAT
B13
GPIO024/BCM_B_INT#
A13
GPIO042/BCM_C_INT#
B19 GPIO043/BCM_C_DAT
A18 GPIO044/BCM_C_CLK
B20
GPIO045/LSBCM_D_INT#
A19 GPIO046/LSBCM_D_DAT
B21 GPIO047/LSBCM_D_CLK
A20
BGPO0 A59
VCI_IN2# B63
VCI_OUT A60
VCI_IN1# A63
VCI_IN0# B67
VCI_OVRD_IN B1
VCI_IN3# A1
GPIO001/ECSPI_CS1 B2
GPIO002/ECSPI_CS2 A2
GPIO014/GPTP-IN7/HSPI_CS1 B8
GPIO015/GPTP-OUT7 A8
GPIO016/GPTP-IN8 B9
GPIO017/GPTP-OUT8 A9
GPIO020/RC_ID2 B10
GPIO026/GPTP-IN1 A14
GPIO027/GPTP-OUT1 B15
GPIO30/GPTP-IN2/BCM_E_INT#
A15 GPIO31/GPTP-OUT2/BCM_E_DAT
B16 GPIO032/GPTP-IN3/BCM_E_CLK
A16
GPIO040/GPTP-OUT3/HSPI_CS2 B18
GPIO041 A17
GPIO107/nRESET_OUT B39
GPIO120/UART_TX B44
GPIO124/GPTP-OUT5/UART_RX B46
GPIO125/GPTP-IN5 A44
GPIO126 B47
GPIO151/GPTP-IN4 A54
GPIO152/GPTP-OUT4 B58
GPIO011/nSMI
A6
GPIO061/LPCPD#
A27
LDRQ#
B29
SER_IRQ
A28
LRESET#
B30
PCI_CLK
A29
LFRAME#
B31
LAD0
A30
LAD1
B32
LAD2
A31
LAD3
B33
CLKRUN#
A32
GPIO100/nEC_SCI
A33
EP
C1
I2S_DAT B17
NC1
B34
PROCHOT#/PWM4 A46
PECI A48
PECI_VREF B51
NC2
A64
NC3
B68
R860
10K_0402_5%~D
R860
10K_0402_5%~D
12
R825 10K_0402_5%~DR825 10K_0402_5%~D
1 2
C747
4.7P_0402_50V8C~D
@C747
4.7P_0402_50V8C~D
@
1
2
R845 4.7K_0402_5%~DR845 4.7K_0402_5%~D
12
R853 0_0402_5%~DR853 0_0402_5%~D
1 2
R887 1K_0402_1%~DR887 1K_0402_1%~D
12
G
D
S
Q50
SSM3K7002FU_SC70-3~D
G
D
S
Q50
SSM3K7002FU_SC70-3~D
2
13
R1171 100K_0402_5%~DR1171 100K_0402_5%~D
12
R872
10K_0402_5%~D
R872
10K_0402_5%~D
1 2
R835 10K_0402_5%~DR835 10K_0402_5%~D
1 2
R863 43_0402_5%~DR863 43_0402_5%~D
1 2
R846 4.7K_0402_5%~DR846 4.7K_0402_5%~D
12
C744
4700P_0402_25V7K~D
C744
4700P_0402_25V7K~D
1
2
R819
100K_0402_5%~D
R819
100K_0402_5%~D
12
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
1 2
R855 0_0402_5%~DR855 0_0402_5%~D
1 2
R849
10K_0402_5%~D
R849
10K_0402_5%~D
12
R821 100K_0402_5%~DR821 100K_0402_5%~D
12
R870
100K_0402_5%~D
R870
100K_0402_5%~D
12
G
D
S
Q47
SSM3K7002FU_SC70-3~D
@
G
D
S
Q47
SSM3K7002FU_SC70-3~D
@
2
13
R856 2.2K_0402_5%~DR856 2.2K_0402_5%~D
12
R875
240K_0402_5%~D
R875
240K_0402_5%~D
1 2
C725
0.1U_0402_25V6K~D
C725
0.1U_0402_25V6K~D
1
2
C740
4.7U_0603_6.3V6K~D
C740
4.7U_0603_6.3V6K~D
1
2
C736 0.1U_0402_25V6K~DC736 0.1U_0402_25V6K~D
12
R869 10K_0402_5%~DR869 10K_0402_5%~D
12
C723
0.1U_0402_25V6K~D
C723
0.1U_0402_25V6K~D
1
2
C732
0.1U_0402_25V6K~D
C732
0.1U_0402_25V6K~D
1
2
R893
100K_0402_5%~D
R893
100K_0402_5%~D
12
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D
1 2
R1179 10K_0402_5%~D@R1179 10K_0402_5%~D@
1 2
R811 10K_0402_5%~DR811 10K_0402_5%~D
1 2
C743
22P_0402_50V8J~D
C743
22P_0402_50V8J~D
1 2
C737
0.1U_0402_25V6K~D
C737
0.1U_0402_25V6K~D
1
2
R883 10K_0402_5%~DR883 10K_0402_5%~D
1 2
R851 4.7K_0402_5%~DR851 4.7K_0402_5%~D
12
R1125 100K_0402_5%~DR1125 100K_0402_5%~D
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP_DATA
TP_CLK
TP_DATA
TP_CLK
TP_DATA
PS2_CLK_TS
PS2_DAT_TS
TP_CLK
PS2_CLK_TS
PS2_DAT_TS
KB_DET#
BT_PRI_STATUS
BT_COEX_STATUS2
RSMRST#
PCH_RSMRST#_Q
PCH_RSMRST#
+5V_RUN+3.3V_ALW
+3.3V_TP
+3.3V_TP
+3.3V_ALW +3.3V_RUN +3.3V_TP +3.3V_TP
+3.3V_ALW
+5V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_ALW
+3.3V_ALW
+3.3V_ALW
CLK_TP_SIO<40>
DAT_TP_SIO<40>
POWER_SW#_MB<30,40>
BC_DAT_ECE1117<40>
BC_INT#_ECE1117<40>
KB_DET#<18>
BC_CLK_ECE1117<40>
BT_DET#<17>
COEX1_BT_ACTIVE<34>
BT_RADIO_DIS#<39>
COEX2_WLAN_ACTIVE<34>
USBP11+<17>
USBP11-<17>
BT_ACTIVE<43>
BT_COEX_STATUS2<32>
BT_PRI_STATUS<32>
PCH_RSMRST#_Q <14,16>
PCH_RSMRST#<40>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Touch PAD/Int KB/BT
41 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Touch PAD/Int KB/BT
41 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Touch PAD/Int KB/BT
41 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place on Bottom
Power Switch for debug
Touch Pad
Place close to JKB1
Place close to JTP1
Link Done
Link Done
KB Conn. Pitch=1.0mm
BlueTooth
Link Done
EC SIDE
C749
10P_0402_50V8J~D
C749
10P_0402_50V8J~D
1
2
C758
0.1U_0402_25V6K~D
C758
0.1U_0402_25V6K~D
1
2
PWRSW1
@SHORT PADS~D
@PWRSW1
@SHORT PADS~D
@
1
122
R1133
1K_0402_5%~D
R1133
1K_0402_5%~D
1 2
R1134
1K_0402_5%~D
R1134
1K_0402_5%~D
1 2
R903
4.7K_0402_5%~D
R903
4.7K_0402_5%~D
12
R902
4.7K_0402_5%~D
R902
4.7K_0402_5%~D
12
D37
PESD5V0U2BT_SOT23-3~D
D37
PESD5V0U2BT_SOT23-3~D
2
3
1
R1622
10K_0402_5%~D
R1622
10K_0402_5%~D
1 2
C753
33P_0402_50V8J~D
C753
33P_0402_50V8J~D
1
2
U9
RT9818A-46GU3_SC70-3~D
U9
RT9818A-46GU3_SC70-3~D
VCC
1
GND
2RESET# 3
C750
10P_0402_50V8J~D
C750
10P_0402_50V8J~D
1
2
L55 BLM18AG601SN1D_0603~DL55 BLM18AG601SN1D_0603~D
12
R1162
0_0603_5%~D
@R1162
0_0603_5%~D
@
1 2
R1161
0_0603_5%~D
R1161
0_0603_5%~D
1 2
R1623 0_0402_5%~D@R1623 0_0402_5%~D@
1 2
U7
TC7SH08FU_SSOP5~D
U7
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
C751
10P_0402_50V8J~D
C751
10P_0402_50V8J~D
1
2
JTP1
TYCO_2041070-8~D
CONN@JTP1
TYCO_2041070-8~D
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
G1 9
G2 10
JKB1
TYCO_1-2041084-0~D
CONN@JKB1
TYCO_1-2041084-0~D
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
GND
11
GND
12
JBT1
ACES_50228-0127N-001
CONN@JBT1
ACES_50228-0127N-001
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12 GND 13
GND 14
C754
100P_0402_50V8J~D
@C754
100P_0402_50V8J~D
@
1
2
C748
0.1U_0402_16V4Z~D
C748
0.1U_0402_16V4Z~D
1 2
C289
0.01U_0402_16V7K~D
C289
0.01U_0402_16V7K~D
1
2
C288 0.1U_0402_25V6K~DC288 0.1U_0402_25V6K~D
1 2
C752
10P_0402_50V8J~D
C752
10P_0402_50V8J~D
1
2
C755
0.1U_0402_25V6K~D
C755
0.1U_0402_25V6K~D
1
2
R904
10K_0402_5%~D
R904
10K_0402_5%~D
12
C756
0.1U_0402_25V6K~D
C756
0.1U_0402_25V6K~D
1
2
C759
100P_0402_50V8J~D
@C759
100P_0402_50V8J~D
@
1
2
L54 BLM18AG601SN1D_0603~DL54 BLM18AG601SN1D_0603~D
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SUS_ON_3.3V#
+1.5V_RUN_CHG
+5V_RUN_CHG
+3.3V_RUN_CHG
RUN_ON_ENABLE#
SUS_ON_3.3V#
+3.3V_SUS_CHG
ALW_ON_3.3V#
+3.3V_ALWPCH_CHG
+3.3V_M_CHG
ALW_ON_3.3V#
A_ON_3.3V#
A_ON_3.3V#
+1.05V_RUN_CHG
+DDR_CHG
+1.5V_CPU_VDDQ_CHG
1.5V_RUN_ENABLE
1.05V_RUN_ENABLE
A_ENABLE
SUS_ENABLE
ALW_ENABLE
RUN_ON_ENABLE#
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW +3.3V_ALW_PCH
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW2
+3.3V_ALW
+3.3V_M
+3.3V_ALW2
+3.3V_SUS +1.5V_RUN +3.3V_RUN+5V_RUN+3.3V_ALW_PCH
+3.3V_M
+1.5V_RUN
+1.5V_MEM
+1.05V_M
+1.05V_RUN
+1.05V_RUN +0.75V_DDR_VTT+1.5V_CPU_VDDQ
+5V_ALW
+3.3V_ALW
+PWR_SRC_S
+PWR_SRC_S
+PWR_SRC_S
+PWR_SRC_S
+PWR_SRC_S
+5V_RUN
+3.3V_RUN
RUN_ON<27,35,39,48>
PCH_ALW_ON<40>
SUS_ON<39>
SIO_SLP_A#<16,39,49>
ALW_ENABLE<20>
RUN_ON_CPU1.5VS3#<7,11>
RUN_ON_ENABLE#<40>
SIO_SLP_S3#<11,16,27,35,39,48>
RUN_ON<27,35,39,48>
SIO_SLP_S3#<11,16,27,35,39,48>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
POWER CONTROL
42 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
POWER CONTROL
42 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
POWER CONTROL
42 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DC/DC Interface
+3.3V_ALW_PCH Source
+3.3V_SUS Source
+3.3V_M Source
Discharg Circuit
+1.5V_RUN Source
+1.05V_RUN Source
+5V_RUN Source
+3.3V_RUN Source
C770
4700P_0402_25V7K~D
C770
4700P_0402_25V7K~D
1
2
R1618
1M_0402_5%~D
R1618
1M_0402_5%~D
12
C760
10U_0603_6.3V6M~D
C760
10U_0603_6.3V6M~D
1
2
C773
2200P_0402_50V7K~D
C773
2200P_0402_50V7K~D
1
2
S
G
D
Q54
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q54
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
45
1
C768
10U_0603_6.3V6M~D
C768
10U_0603_6.3V6M~D
1
2
C1196
270P_0402_50V7K~D
@C1196
270P_0402_50V7K~D
@
1 2
R911
100K_0402_5%~D
R911
100K_0402_5%~D
12
G
D
S
Q66
SSM3K7002FU_SC70-3~D
@
G
D
S
Q66
SSM3K7002FU_SC70-3~D
@
2
13
R744 0_0402_5%~D@R744 0_0402_5%~D@
1 2
R929
39_0603_5%~D
@R929
39_0603_5%~D
@
12
R928
1K_0402_1%~D
@R928
1K_0402_1%~D
@
12
R931
20K_0402_5%~D
R931
20K_0402_5%~D
12
R930
100K_0402_5%~D
R930
100K_0402_5%~D
12
S
G
D
Q58
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q58
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
45
1
G
D
S
Q72
SSM3K7002FU_SC70-3~D
G
D
S
Q72
SSM3K7002FU_SC70-3~D
2
13
Q53B
DMN66D0LDW-7_SOT363-6~D
Q53B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R913
20K_0402_5%~D
R913
20K_0402_5%~D
12
Q53A
DMN66D0LDW-7_SOT363-6~D
Q53A
DMN66D0LDW-7_SOT363-6~D
61
2
R923
1K_0402_1%~D
@R923
1K_0402_1%~D
@
12
Q52A
DMN66D0LDW-7_SOT363-6~D
Q52A
DMN66D0LDW-7_SOT363-6~D
61
2
R907
100K_0402_5%~D
R907
100K_0402_5%~D
12
R735 0_0402_5%~DR735 0_0402_5%~D
1 2
R918
100K_0402_5%~D
R918
100K_0402_5%~D
12
R917
100K_0402_5%~D
R917
100K_0402_5%~D
12
G
D
S
Q71
SSM3K7002FU_SC70-3~D
G
D
S
Q71
SSM3K7002FU_SC70-3~D
2
13
R910
20K_0402_5%~D
R910
20K_0402_5%~D
12
C1197
270P_0402_50V7K~D
C1197
270P_0402_50V7K~D
1 2
R924
1K_0402_1%~D
@R924
1K_0402_1%~D
@
12
G
D
S
Q60
SSM3K7002FU_SC70-3~D
G
D
S
Q60
SSM3K7002FU_SC70-3~D
2
13
C1198
1U_0603_10V7K~D
C1198
1U_0603_10V7K~D
1
2
G
D
S
Q65
SSM3K7002FU_SC70-3~D
@
G
D
S
Q65
SSM3K7002FU_SC70-3~D
@
2
13
R919
20K_0402_5%~D
@R919
20K_0402_5%~D
@
12
R922
1K_0402_1%~D
@R922
1K_0402_1%~D
@
12
R1617
1M_0402_5%~D
R1617
1M_0402_5%~D
12
C769
10U_0603_6.3V6M~D
C769
10U_0603_6.3V6M~D
1
2
Q51B
DMN66D0LDW-7_SOT363-6~D
Q51B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R905
100K_0402_5%~D
R905
100K_0402_5%~D
12
Q57B
DMN66D0LDW-7_SOT363-6~D
Q57B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R915
100K_0402_5%~D
R915
100K_0402_5%~D
12
R916
39_0603_5%~D
R916
39_0603_5%~D
12
S
G
D
Q49
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q49
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
45
1
Q52B
DMN66D0LDW-7_SOT363-6~D
Q52B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R909
100K_0402_5%~D
R909
100K_0402_5%~D
12
R925
39_0402_5%~D
@R925
39_0402_5%~D
@
12
Q51A
DMN66D0LDW-7_SOT363-6~D
Q51A
DMN66D0LDW-7_SOT363-6~D
61
2
C1199
1U_0603_10V7K~D
C1199
1U_0603_10V7K~D
12
R914
20K_0402_5%~D
R914
20K_0402_5%~D
12
G
D
S
Q64
SSM3K7002FU_SC70-3~D
G
D
S
Q64
SSM3K7002FU_SC70-3~D
2
13
G
D
S
Q69
SSM3K7002FU_SC70-3~D
@
G
D
S
Q69
SSM3K7002FU_SC70-3~D
@
2
13
R926
220_0402_5%~D
R926
220_0402_5%~D
12
R908
20K_0402_5%~D
R908
20K_0402_5%~D
12
U78
TPS22966DPUR_SON14_2X3~D
U78
TPS22966DPUR_SON14_2X3~D
GND 11
VIN2
6
VBIAS
4
ON2
5
VOUT2 9
VIN2
7
CT1 12
VOUT1 14
VOUT2 8
VOUT1 13
VIN1
2
ON1
3
VIN1
1
CT2 10
GPAD 15
S
G
D
Q59
NTGS4141NT1G_TSOP6~D
S
G
D
Q59
NTGS4141NT1G_TSOP6~D
3
6
2
45
1
C765
10U_0603_6.3V6M~D
C765
10U_0603_6.3V6M~D
1
2
C772
10U_0603_6.3V6M~D
C772
10U_0603_6.3V6M~D
1
2
G
D
S
Q67
SSM3K7002FU_SC70-3~D
@
G
D
S
Q67
SSM3K7002FU_SC70-3~D
@
2
13
R920
100K_0402_5%~D
R920
100K_0402_5%~D
12
C767
4700P_0402_25V7K~D
C767
4700P_0402_25V7K~D
1
2
Q63
SI4164DY-T1-GE3_SO8~D
Q63
SI4164DY-T1-GE3_SO8~D
36
5
7
8
2
4
1
C761
0.1U_0402_25V6K~D
C761
0.1U_0402_25V6K~D
1
2
R1611
470K_0402_5%~D
R1611
470K_0402_5%~D
12
R747 0_0402_5%~D@R747 0_0402_5%~D@
1 2
C762
3300P_0402_50V7K~D
C762
3300P_0402_50V7K~D
1
2
R1619
1M_0402_5%~D
R1619
1M_0402_5%~D
12
R921
20K_0402_5%~D
R921
20K_0402_5%~D
12
G
D
S
Q68
SSM3K7002FU_SC70-3~D
@
G
D
S
Q68
SSM3K7002FU_SC70-3~D
@
2
13
R749 0_0402_5%~DR749 0_0402_5%~D
1 2
C764
0.1U_0402_25V6K~D
C764
0.1U_0402_25V6K~D
1
2
R927
22_0603_5%~D
R927
22_0603_5%~D
12
R1610
470K_0402_5%~D
R1610
470K_0402_5%~D
12
C771
4700P_0402_25V7K~D
C771
4700P_0402_25V7K~D
1
2
G
D
S
Q70
SSM3K7002FU_SC70-3~D
@
G
D
S
Q70
SSM3K7002FU_SC70-3~D
@
2
13
Q57A
DMN66D0LDW-7_SOT363-6~D
Q57A
DMN66D0LDW-7_SOT363-6~D
61
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BREATH_WHITE_LED_SNIFFBREATH_LED#_Q
MASK_BASE_LEDS#
MASK_BASE_LEDS#
LID_CL#
SYS_LED_MASK#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
SYS_LED_MASK#
BAT1_LED#_Q
BAT2_LED#_Q
MASK_BASE_LEDS#
MASK_BASE_LEDS#
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
+5V_ALW
+3.3V_ALW
BREATH_LED#<38,39>
BREATH_WHITE_LED <23>
SYS_LED_MASK#<39>
LID_CL#<30,39>
WLAN_LED <30>
WIRELESS_LED#<34,39>
BT_ACTIVE<41>
SATA_ACT#<14>
SATA_LED <30>
LED_SATA_DIAG_OUT#<39>
MASK_SATA_LED#<39>
BAT2_LED#<39>
BAT1_LED#<39>
BATT_WHITE <30>
BATT_YELLOW <30>
BATT_WHITE_LED <23>
BATT_YELLOW_LED <23>
PANEL_HDD_LED <23>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PAD and Standoff
43 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PAD and Standoff
43 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PAD and Standoff
43 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
WLAN LED solution for White LED
Place LED1 close to SW1
EMI CLIP
Fiducial Mark
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
0
1 0
X
LED Circuit Control Table
Do not Mask LEDs (Lid Opened)
11
HDD LED solution for White LED Battery LED
Breath LED
LVDS standoff
H21
H_2P8
@H21
H_2P8
@
1
Q83A
DMN66D0LDW-7_SOT363-6~D
Q83A
DMN66D0LDW-7_SOT363-6~D
61
2
H26
H_2P8
@H26
H_2P8
@
1
R959
330_0402_5%~D
R959
330_0402_5%~D
1 2
H7
CLIP_C5
@H7
CLIP_C5
@
1
R951
330_0402_5%~D
R951
330_0402_5%~D
1 2
H24
H_2P8
@H24
H_2P8
@
1
H4
H_2P0
@H4
H_2P0
@
1
H11
H_2P8
@H11
H_2P8
@
1
H17
H_2P3
@H17
H_2P3
@
1
Q74B
DMN66D0LDW-7_SOT363-6~D
Q74B
DMN66D0LDW-7_SOT363-6~D
3
5
4
D59
RB751S40T1_SOD523-2~D
D59
RB751S40T1_SOD523-2~D
21
H15
H_2P8
@H15
H_2P8
@
1
Q79
PDTA114EU_SC70-3~D
Q79
PDTA114EU_SC70-3~D
2
1 3
H20
H_2P8
@H20
H_2P8
@
1
R937
100K_0402_5%~D
R937
100K_0402_5%~D
12
R932
10K_0402_5%~D
R932
10K_0402_5%~D
12
FD4
FIDUCIAL MARK~D
@FD4
FIDUCIAL MARK~D
@
1
H12
H_2P6
@H12
H_2P6
@
1
R957 1K_0402_1%~DR957 1K_0402_1%~D
1 2
Q80A
DMN66D0LDW-7_SOT363-6~D
Q80A
DMN66D0LDW-7_SOT363-6~D
61
2
R949
4.7K_0402_5%~D
R949
4.7K_0402_5%~D
1 2
C778 0.1U_0402_25V6K~DC778 0.1U_0402_25V6K~D
1 2
H25
H_2P8
@H25
H_2P8
@
1
CLIP1
EMI_CLIP
CLIP1
EMI_CLIP
GND 1
Q81
PDTA114EU_SC70-3~D
Q81
PDTA114EU_SC70-3~D
2
1 3
R950
100K_0402_5%~D
R950
100K_0402_5%~D
12
H27
H_2P8
@H27
H_2P8
@
1
H6
CLIP_C5
@H6
CLIP_C5
@
1
FD2
FIDUCIAL MARK~D
@FD2
FIDUCIAL MARK~D
@
1
H10
H_2P8
@H10
H_2P8
@
1
H18
H_3P4
@H18
H_3P4
@
1
R958
4.7K_0402_5%~D
R958
4.7K_0402_5%~D
1 2
H3
H_2P8
@H3
H_2P8
@
1
D62
RB751S40T1_SOD523-2~D
D62
RB751S40T1_SOD523-2~D
21
H22
H_2P0X2P5
@H22
H_2P0X2P5
@
1
R955
4.7K_0402_5%~D
R955
4.7K_0402_5%~D
1 2
Q83B
DMN66D0LDW-7_SOT363-6~D
Q83B
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q74A
DMN66D0LDW-7_SOT363-6~D
Q74A
DMN66D0LDW-7_SOT363-6~D
61
2
H13
H_2P6
@H13
H_2P6
@
1
Q75
PDTA114EU_SC70-3~D
Q75
PDTA114EU_SC70-3~D
2
1 3
R938 4.7K_0402_5%~DR938 4.7K_0402_5%~D
1 2
FD3
FIDUCIAL MARK~D
@FD3
FIDUCIAL MARK~D
@
1
H5
H_2P8
@H5
H_2P8
@
1
H16
H_3P4
@H16
H_3P4
@
1
H9
H_2P8
@H9
H_2P8
@
1
R939 4.7K_0402_5%~DR939 4.7K_0402_5%~D
1 2
R934 4.7K_0402_5%~DR934 4.7K_0402_5%~D
1 2
H19
H_2P3
@H19
H_2P3
@
1
FD1
FIDUCIAL MARK~D
@FD1
FIDUCIAL MARK~D
@
1
Q78B
DMN66D0LDW-7_SOT363-6~D
Q78B
DMN66D0LDW-7_SOT363-6~D
3
5
4
LED1
LTW-193ZDS5_WHITE~D
LED1
LTW-193ZDS5_WHITE~D
21
Q84A
DMN66D0LDW-7_SOT363-6~D
Q84A
DMN66D0LDW-7_SOT363-6~D
61
2
U58
TC7SH08FU_SSOP5~D
U58
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
Q78A
DMN66D0LDW-7_SOT363-6~D
Q78A
DMN66D0LDW-7_SOT363-6~D
61
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+TRM_CT3
+TRM_CT4
+TRM_CT1
+TRM_CT2
NB_LAN_TX0+
NB_LAN_TX0-
NB_LAN_TX1-
NB_LAN_TX1+
NB_LAN_TX2-
NB_LAN_TX2+
NB_LAN_TX3-
NB_LAN_TX3+
Z2805
Z2807
Z2806
Z2808
GND_CHASSIS
LAN_ACTLED_YEL#_R
NB_LAN_TX3-
NB_LAN_TX3+
NB_LAN_TX2-
NB_LAN_TX2+
NB_LAN_TX1-
NB_LAN_TX1+
NB_LAN_TX0-
NB_LAN_TX0+
+3.3V_LAN
LED_100_ORG#<31>
LED_10_GRN#<31>
LAN_ACTLED_YEL#<31>
SW _LAN_TX1+<31>
SW _LAN_TX0+<31>
SW _LAN_TX0-<31>
SW _LAN_TX1-<31>
SW _LAN_TX3+<31>
SW _LAN_TX3-<31>
SW _LAN_TX2+<31>
SW _LAN_TX2-<31>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.3
RJ45
44 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.3
RJ45
44 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.3
RJ45
44 56Thursday, June 23, 2011
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DELL CONFIDENTIAL/PROPRIETARY
GND
CHASSIS
Link Done
1:1
T1/A
T1/B
1:1
T1/B
T1/A
1:1
1:1
T1/B
T1/A
T1/B
T1/A
TR1
350UH_H5120DNL~D
1:1
T1/A
T1/B
1:1
T1/B
T1/A
1:1
1:1
T1/B
T1/A
T1/B
T1/A
TR1
350UH_H5120DNL~D
TD1-
2
TDCT1
3
TDCT2
4
TD2+
5
TD2-
6
TD3+
7
TD3-
8
TDCT3
9
TDCT4
10
TD4+
11
TD4-
12
TX4- 13
TXCT3 16
TX3+ 18
TX2- 19
TX2+ 20
TXCT2 21
TXCT1 22
TX1- 23
TX4+ 14
TXCT4 15
TX3- 17
TD1+
1
TX1+ 24
JLOM1
TYCO_2041341-1~D
CONN@JLOM1
TYCO_2041341-1~D
CONN@
PR1-
2
PR1+
1
PR2+
3
PR3+
4
PR3-
5
PR2-
6
PR4+
7
PR4-
8
Orange LED-
13
Green LED-
11
Yellow LED-
10
Yellow LED+
9
GND 15
GND 14
Green-Orange LED+
12
R1112 75_0402_1%~DR1112 75_0402_1%~D
12
C1104 1000P_1808_3KV7K~DC1104 1000P_1808_3KV7K~D
1 2
C39
0.47U_0603_10V7K~D
C39
0.47U_0603_10V7K~D
1
2
C1168
0.1U_0402_10V7K~D
C1168
0.1U_0402_10V7K~D
1
2
C38
0.47U_0603_10V7K~D
C38
0.47U_0603_10V7K~D
1
2
C37
0.47U_0603_10V7K~D
C37
0.47U_0603_10V7K~D
1
2
C1167
470P_0402_50V7K~D
C1167
470P_0402_50V7K~D
1
2
R1091 150_0402_5%~DR1091 150_0402_5%~D
1 2
R1111 75_0402_1%~DR1111 75_0402_1%~D
12
R1114 75_0402_1%~DR1114 75_0402_1%~D
12
R1090 150_0402_5%~DR1090 150_0402_5%~D
1 2
C36
0.47U_0603_10V7K~D
C36
0.47U_0603_10V7K~D
1
2
R1089 150_0402_5%~DR1089 150_0402_5%~D
1 2
R1113 75_0402_1%~DR1113 75_0402_1%~D
12
C1169
1U_0603_10V4Z~D
C1169
1U_0603_10V4Z~D
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NB_PSID_TS5A63157
+DC_IN
PBATT+_C
Z4012
NB_PSID
MBATT+_C
VSB_N_003
VSB_N_002
VSB_N_001
Z5306
Z5305
Z5304
Z4306
Z4305
Z4304
+DCIN_JACK
-DCIN_JACK
+3.3V_ALW
+5V_ALW
+DC_IN_SS
PBATT+
GND
+3.3V_ALW
+DC_IN
+5V_ALW
+COINCELL
+RTC_CELL
+3.3V_RTC_LDO
+COINCELL
GND
+3.3V_ALW
MPBATT+
+3.3V_ALW
+PWR_SRC +PWR_SRC_S
PSID_DISABLE# <39>
PBAT_PRES# <39,55>
PBAT_SMBDAT <40>
PBAT_SMBCLK <40>
DOCK_PSID<38> GPIO_PSID_SELECT <39>
PS_ID <40>
SOFT_START_GC<55>
BAY_SMBCLK <28,40>
MODULE_BATT_PRES# <39,55>
BAY_SMBDAT <28,40>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+DCIN
45 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+DCIN
45 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+DCIN
45 56Thursday, June 23, 2011
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
DC_IN+ Source
COIN RTC Battery
Move to power schematic
ESD Diodes
Link Done
Link Done
2nd Battery Connector
Primary Battery Connector
ESD Diodes
PQ902
TP0610K-T1-E3_SOT23-3
PQ902
TP0610K-T1-E3_SOT23-3
2
13
PC141
2200P_0402_50V7K~D
PC141
2200P_0402_50V7K~D
12
PU1
TS5A63157DCKR_SC70-6~D
<BOM Structure>
PU1
TS5A63157DCKR_SC70-6~D
<BOM Structure>
V+ 5
NC
3COM 4
GND
2
IN 6
NO
1
PR9
33_0402_5%~D
PR9
33_0402_5%~D
1 2
PC9
0.1U_0603_25V7K~D
PC9
0.1U_0603_25V7K~D
12
PR106
100_0402_5%~D
PR106
100_0402_5%~D
1 2
PR108
100K_0402_5%~D
PR108
100K_0402_5%~D
12
PR18
10K_0402_5%~D
PR18
10K_0402_5%~D
1 2
PC901
0.1U_0402_16V7K
PC901
0.1U_0402_16V7K
12
PR901
0_0402_5%
PR901
0_0402_5%
1 2
PC903
0.1U_0603_25V7K
PC903
0.1U_0603_25V7K
12
PD10
VZ0603M260APT_0603
@
PD10
VZ0603M260APT_0603
@
1
2
PR8
2.2K_0402_5%~D
PR8
2.2K_0402_5%~D
1 2
PC10
0.1U_0603_25V7K~D
PC10
0.1U_0603_25V7K~D
12
PR902
22K_0402_1%
PR902
22K_0402_1%
1 2
PR4
100_0402_5%~D
PR4
100_0402_5%~D
1 2
PL2
BLM18BD102SN1D_0603~D
PL2
BLM18BD102SN1D_0603~D
12
PL1
FBMJ4516HS720NT_2P~D
PL1
FBMJ4516HS720NT_2P~D
1 2
PR12
15K_0402_1%~D
PR12
15K_0402_1%~D
1 2
PD7
PESD24VS2UT_SOT23-3~D
@PD7
PESD24VS2UT_SOT23-3~D
@
2
3
1
PR3
100_0402_5%~D
PR3
100_0402_5%~D
1 2
PL20
FBMJ4516HS720NT_2P~D
PL20
FBMJ4516HS720NT_2P~D
1 2
PR77
100_0402_5%~D
PR77
100_0402_5%~D
1 2
PL4
FBMJ4516HS720NT_2P~D
PL4
FBMJ4516HS720NT_2P~D
1 2
1M_0402_5%~D
PR19
1M_0402_5%~D
PR19
12
G
D
S
PQ901
SSM3K7002FU_SC70-3
G
D
S
PQ901
SSM3K7002FU_SC70-3
2
13
PD2
PESD24VS2UT_SOT23-3~D
@PD2
PESD24VS2UT_SOT23-3~D
@
2
3
1
PL3
FBMJ4516HS720NT_2P~D
PL3
FBMJ4516HS720NT_2P~D
1 2
PR903
100K_0402_1%
PR903
100K_0402_1%
12
PJP51
PAD-OPEN 2x2m~D
PJP51
PAD-OPEN 2x2m~D
2 1
PR1
1K_0402_5%~D
PR1
1K_0402_5%~D
12
PR105
100_0402_5%~D
PR105
100_0402_5%~D
1 2
PR7
0_0402_5%~D
@PR7
0_0402_5%~D
@
1 2
PD3
PESD24VS2UT_SOT23-3~D
@PD3
PESD24VS2UT_SOT23-3~D
@
2
3
1
PC13
0.1U_0603_25V7K~D
PC13
0.1U_0603_25V7K~D
12
PC1
1U_0603_10V4Z~D
PC1
1U_0603_10V4Z~D
1
2
PR10
100K_0402_1%~D
PR10
100K_0402_1%~D
1 2
PBATT2
SUYIN_150010GR006M500ZR
PBATT2
SUYIN_150010GR006M500ZR
11
33
44
55
66
22
GND 7
GND 8
PR11
10K_0402_1%~D
PR11
10K_0402_1%~D
12
PC902
0.22U_0603_25V7K
PC902
0.22U_0603_25V7K
12
PR15
1M_0402_5%~D
PR15
1M_0402_5%~D
12
PJP43
PAD-OPEN 4x4m
PJP43
PAD-OPEN 4x4m
1 2
PR16
100K_0402_5%~D
PR16
100K_0402_5%~D
12
PJPDC1
MOLEX_87438-0743~D
PJPDC1
MOLEX_87438-0743~D
11
33
44
55
22
66
77
PC11
10U_1206_25V6M~D
PC11
10U_1206_25V6M~D
12
PD1
RB715FGT106_UMD3
PD1
RB715FGT106_UMD3
2
3
1
JRTC1
TYCO_2-1775293-2~D
JRTC1
TYCO_2-1775293-2~D
1
1
2
2G4
G3
PL19
FBMJ4516HS720NT_2P~D
PL19
FBMJ4516HS720NT_2P~D
1 2
G
D
S
PQ2
FDV301N_NL_SOT23-3~D
G
D
S
PQ2
FDV301N_NL_SOT23-3~D
2
1 3
E
B
C
PQ3
MMST3904-7-F_SOT323~D
E
B
C
PQ3
MMST3904-7-F_SOT323~D
2
3 1
PR2
100K_0402_5%~D
PR2
100K_0402_5%~D
12
PC7
0.1U_0603_25V7K~D
PC7
0.1U_0603_25V7K~D
12
PR5
100_0402_5%~D
PR5
100_0402_5%~D
1 2
PR13
10K_0402_5%~D@
PR13
10K_0402_5%~D@
1 2
PC3
2200P_0402_50V7K~D
PC3
2200P_0402_50V7K~D
12
PC136
0.1U_0603_25V7K~D
PC136
0.1U_0603_25V7K~D
12
PC2
0.1U_0603_25V7K~D
PC2
0.1U_0603_25V7K~D
12
PD6
PESD24VS2UT_SOT23-3~D
@PD6
PESD24VS2UT_SOT23-3~D
@
2
3
1
PBATT1
SUYIN_200277MR009F515ZR~D
PBATT1
SUYIN_200277MR009F515ZR~D
11
33
44
55
66
GND 8
GND 9
22
77
PC12
0.1U_0603_25V7K~D
@
PC12
0.1U_0603_25V7K~D
@
12
PC6
0.022U_0805_50V7K~D
PC6
0.022U_0805_50V7K~D
1 2
PQ4
FDS6679AZ_SO8~D
PQ4
FDS6679AZ_SO8~D
S
1
S
2
S
3
G
4
D8
D7
D6
D5
PR17
4.7K_0805_5%~D
@PR17
4.7K_0805_5%~D
@
12
PC8
0.1U_0603_25V7K~D
PC8
0.1U_0603_25V7K~D
12

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BST_5V
ENTRIP2
LX_5V
BST1_5VBST1_3V
UG_5V
BST_3V
ENTRIP1
FB_3V
LG_5V
SNUB_3V
SNUB_5V
LG_3V
UG_3V
LX_3V
FB_5V
ENTRIP1
ENTRIP2
+DC1_PWR_SRC
+5V_ALWP
+5V_ALW2
+3.3V_ALWP
+DC1_PWR_SRC
+DC1_PWR_SRC
2VREF_6182
+PWR_SRC
+3.3V_ALW2
2VREF_6182
+5V_ALWP
+3.3V_ALW
+5V_ALW
+3.3V_ALWP
+3.3V_RTC_LDO
+3.3V_ALW
+PWR_SRC
+5V_ALW2
ALW_PWRGD_3V_5V <40>
ALWON<40>
THERM_STP#<22>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-7741
0.1
+5V/+3.3V
Custom
46 56Thursday, June 23, 2011
2007/08/02 <Deciphered_Date>
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-7741
0.1
+5V/+3.3V
Custom
46 56Thursday, June 23, 2011
2007/08/02 <Deciphered_Date>
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-7741
0.1
+5V/+3.3V
Custom
46 56Thursday, June 23, 2011
2007/08/02 <Deciphered_Date>
Compal Electronics, Inc.
(5A,180mils ,Via NO.= 9)
(4A,120mils ,Via NO.= 6)
3.3VALWP +/- 5%
TDC=5.45A
Peak Current=7.786A
OCP min=10.122A
L/S RDS(on) 14.2m ohm(typ),17.5m ohm(max)
FSW=375KHz
Delta_Iin=1.246A
Delta_Io=3.3231A
5VALWP +/- 5%
TDC=8.41A
Peak Current=12.012A
OCP min=15.62A
L/S RDS(on) 14.2m ohm(typ),17.5m ohm(max)
FSW=300KHz
Delta_Iin=1.64A
Delta_Io=3.756A
SKIPSEL Connect to REF : DEM Mode
@DEM VFBx=2.0V
Charlie_note :
Typ: 175mA
Typ: 175mA
TONSEL
Frequency Selectable Input for VOUT1(+5v)/VOUT2(+3.3v)
respectively.
300kHz/375kHz : Connect to REF
+5V_ALWP/ +3.3V_ALWP
Max: 100uA
PQ6
AON7408L_DFN8-5
PQ6
AON7408L_DFN8-5
3 5
2
4
1
PC20
10U_0805_25V6K
@
PC20
10U_0805_25V6K
@
12
PR150
100K_0402_1%
PR150
100K_0402_1%
1 2
PR42
20K_0402_1%
PR42
20K_0402_1%
1 2
PC34
680P_0603_50V7K
@
PC34
680P_0603_50V7K
@
12
PJP9
PAD-OPEN 4x4m
PJP9
PAD-OPEN 4x4m
1 2
PR147
2K_0402_1%~D
PR147
2K_0402_1%~D
1 2
PQ70A
2N7002DW-T/R7_SOT363-6~D
PQ70A
2N7002DW-T/R7_SOT363-6~D
61
2
PR20
100K_0402_1%
PR20
100K_0402_1%
1 2
PQ7
FDMS7692 1N POWER56-8
PQ7
FDMS7692 1N POWER56-8
G
2
D3
S
1
PR43
20K_0402_1%
PR43
20K_0402_1%
1 2
PQ8
IRF8707GTRPBF_SO8
PQ8
IRF8707GTRPBF_SO8
4
7
8
6
5
1
2
3
PD37
MMSZ5229BS_SOD323-2
PD37
MMSZ5229BS_SOD323-2
1 2
PQ70B
2N7002DW-T/R7_SOT363-6~D
PQ70B
2N7002DW-T/R7_SOT363-6~D
3
5
4
PR27
0_0402_5%
PR27
0_0402_5%
1 2
PC37
0.22U_0603_25V7K~D
PC37
0.22U_0603_25V7K~D
1 2
PR39
4.7_1206_5%
@
PR39
4.7_1206_5%
@
12
PC119
1U_0603_10V6K
@
PC119
1U_0603_10V6K
@
12
PC38
0.22U_0603_25V7K~D
PC38
0.22U_0603_25V7K~D
1 2
PC28
10U_0805_6.3V6M
PC28
10U_0805_6.3V6M
12
PR40
4.7_1206_5%
@
PR40
4.7_1206_5%
@
12
PR151
0_0402_5%
PR151
0_0402_5%
1 2
+
PC35
220U_D_6.3VM_R25M
+
PC35
220U_D_6.3VM_R25M
1
2
PU2
RT8205LZQW(2) WQFN 24P PWM
PU2
RT8205LZQW(2) WQFN 24P PWM
FB1 2
REF 3
VO1 24
ENTRIP1 1
TONSEL 4
FB2 5
SKIPSEL
14
NC
18
VREG5
17
VO2
7
VREG3
8
VIN
16
GND
15
UGATE1 21
BOOT1 22
ENTRIP2 6
PGOOD 23
PHASE1 20
LGATE1 19
EN
13
BOOT2
9
UGATE2
10
PHASE2
11
LGATE2
12
P PAD
25
PR41
2.2_0603_5%
PR41
2.2_0603_5%
1 2
PC26
4.7U_0805_10V6K
PC26
4.7U_0805_10V6K
12
PC23
10U_0805_25V6K
PC23
10U_0805_25V6K
12
PR34
232K_0402_1%~D
PR34
232K_0402_1%~D
1 2
PR46
499K_0402_1%~D
PR46
499K_0402_1%~D
12
PJP10
PAD-OPEN 4x4m
PJP10
PAD-OPEN 4x4m
1 2
PJP74
PAD-OPEN 4x4m
PJP74
PAD-OPEN 4x4m
1 2
PC36
1U_0603_16V6K
PC36
1U_0603_16V6K
12
PR38
2.2_0603_5%
PR38
2.2_0603_5%
1 2
+
PC40
220U_D_6.3VM_R25M
+
PC40
220U_D_6.3VM_R25M
1
2
PR47
300K_0402_1%
PR47
300K_0402_1%
12
PC19
1U_0603_10V6K
@
PC19
1U_0603_10V6K
@
12
PJP6
PAD-OPEN 4x4m
PJP6
PAD-OPEN 4x4m
1 2
PR33
140K_0402_1%
PR33
140K_0402_1%
1 2
PL24
HCB2012KF-121T50_0805
@PL24
HCB2012KF-121T50_0805
@
1 2
PJP5
PAD-OPEN 4x4m
PJP5
PAD-OPEN 4x4m
1 2
PC18
10U_0805_25V6K
PC18
10U_0805_25V6K
12
PC17
0.1U_0402_25V6
PC17
0.1U_0402_25V6
12
PR37
13.7K_0402_1%
PR37
13.7K_0402_1%
1 2
PC33
680P_0603_50V7K
@
PC33
680P_0603_50V7K
@
12
PL8
2.2UH_ETQP3W2R2WFN_8.5A_20%
PL8
2.2UH_ETQP3W2R2WFN_8.5A_20%
1 2
PC24
10U_0805_25V6K
@
PC24
10U_0805_25V6K
@
12
PC21
2200P_0402_50V7K
PC21
2200P_0402_50V7K
12
PQ105
PDTC115EU_SOT323-3
PQ105
PDTC115EU_SOT323-3
2
13
PL7
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
PL7
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
1 2
PC16
2200P_0402_50V7K
PC16
2200P_0402_50V7K
12
PR36
30.9K_0402_1%
PR36
30.9K_0402_1%
1 2
PC27
0.1U_0603_25V7K
PC27
0.1U_0603_25V7K
12
PQ5
FDS8878_G 1N SO8
PQ5
FDS8878_G 1N SO8
G
2
D3
S
1
PC22
0.1U_0402_25V6
PC22
0.1U_0402_25V6
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.5V_B+
VDD_1.5V VDDQ_1.5V
S5_1.5V
1.5V_SUS_PW RGD
S3_1.5V
BOOT_1.5V
DH_1.5V
SW _1.5V
DL_1.5V
1.5V_B+
VLDOIN_1.5V
CS_1.5V
+1.5V_MEN_P_FB
SNUB_1.5V
+1.5V_MEN_P +1.5V_MEM +0.75V_DDR_VTT
+0.75V_P
+PWR_SRC
+1.5V_MEN_P
+5V_ALW
+5V_ALW
+1.5V_MEN_P
+1.5V_MEN_P
+V_DDR_REF
+0.75V_P
+3.3V_ALW
+1.5V_MEN_P
1.5V_SUS_PW RGD<40>
DDR_ON<40>
0.75V_DDR_VTT_ON<39>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+1.5V_MEN/+0.75V_DDR_VTT
47 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+1.5V_MEN/+0.75V_DDR_VTT
47 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+1.5V_MEN/+0.75V_DDR_VTT
47 56Thursday, June 23, 2011
Compal Electronics, Inc.
1.5Volt +/- 5%
TDC=7.18A
Peak Current=10.25A
OCP min=13.33A
L/S RDS(on) 3.8m ohm(typ),4.8m ohm(max)
FSW=253KHz for RTON=1M ohm, spec. On-Time =303.947ns
Delta_Iin=1.458A
Delta_Io=5.4728A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
0.75Volt +/- 5%
TDC=0.525A
Peak Current=0.75A
OCP min=0.975A
(2A,80mils ,Via NO.= 4)
Mode Level +0.75V_P +V_DDR_REF
S5 L off off
S3 L off on
S0 H on on
Note: S3 - sleep ; S5 - power off
+1.5V_MEN_P/ +0.75V_P
20110602 modify item
1. delete PU16.4 another net name VTTREF_1.5V
, only left +V_DDR_REF
PR485
100K_0402_1%~D
PR485
100K_0402_1%~D
12
+
PC423
330U_SX_2VY~R9M
+
PC423
330U_SX_2VY~R9M
1
2
PC415
2200P_0402_50V7K~D
PC415
2200P_0402_50V7K~D
12
PR486
1M_0402_1%~D
PR486
1M_0402_1%~D
1 2
PC425
0.033U_0402_16V7~D
PC425
0.033U_0402_16V7~D
PJP404
PAD-OPEN 4x4m
PJP404
PAD-OPEN 4x4m
1 2
PJP204
PAD-OPEN1x1m
PJP204
PAD-OPEN1x1m
12
PR905
0_0402_5%~D
PR905
0_0402_5%~D
1 2
PU16
RT8207MZQW _W QFN20_3X3
PU16
RT8207MZQW _W QFN20_3X3
VTTSNS 2
FB
6
S5
8
PGOOD
10
VDDP
12
PHASE 16
BOOT 18
VTTREF 4
PGND
14
VTTGND 1
GND 3
VDDQ 5
S3
7
TON
9
VDD
11
CS
13
LGATE
15
UGATE 17
VTT 20
VLDOIN 19
PAD 21
PQ68
SIR466DP-T1-GE3_POWERPAK8-5
PQ68
SIR466DP-T1-GE3_POWERPAK8-5
4
5
1
2
3
PQ67
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ67
SIR472DP-T1-GE3_POWERPAK8-5~D
4
5
1
2
3
PC416
0.22U_0603_16V7K~D
PC416
0.22U_0603_16V7K~D
1 2
PC904
0.1U_0603_25V7K
@PC904
0.1U_0603_25V7K
@
1 2
PR489
0_0402_5%~D
PR489
0_0402_5%~D
1 2
PC231
0.1U_0603_25V7K~D
@PC231
0.1U_0603_25V7K~D
@
12
PC414
0.1U_0402_25V6K~D
PC414
0.1U_0402_25V6K~D
12
PL27
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
PL27
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
1 2
PJP405
JUMP_43X118
PJP405
JUMP_43X118
11
2
2
PC419 1U_0603_10V6K~D
PC419 1U_0603_10V6K~D
PR220
4.7_1206_5%
@PR220
4.7_1206_5%
@
12
PC418
10U_0805_6.3V6M~D
PC418
10U_0805_6.3V6M~D
12
PR484
5.1_0603_5%~D
PR484
5.1_0603_5%~D
1 2
PC424
1U_0603_10V6K~D
PC424
1U_0603_10V6K~D
PR483
5.1K_0402_1%~D
PR483
5.1K_0402_1%~D
1 2
PR482
2.2_0603_5%~D
PR482
2.2_0603_5%~D
1 2
+
PC422
330U_SX_2VY~R9M
@
+
PC422
330U_SX_2VY~R9M
@
1
2
PR904
0_0402_5%~D
@PR904
0_0402_5%~D
@
12
PR487
0_0402_5%~D
PR487
0_0402_5%~D
1 2
PC426
0.1U_0402_16V7K~D
@PC426
0.1U_0402_16V7K~D
@
12
PC413
4.7U_0805_25V6K~D
PC413
4.7U_0805_25V6K~D
12
PC412
4.7U_0805_25V6K~D
PC412
4.7U_0805_25V6K~D
12
PJP407
PAD-OPEN 3x3m
PJP407
PAD-OPEN 3x3m
1 2
PC417
10U_0805_6.3V6M~D
PC417
10U_0805_6.3V6M~D
12
PJP406
JUMP_43X118
PJP406
JUMP_43X118
11
2
2

A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
1.8VSP_FB
1.8VSP_VIN
1.8VSP_LX
SNUB_1.8VSP
EN_1.8VSP
+1.8V_RUNP
+1.8V_RUNP +1.8V_RUN
+3.3V_ALW
+3.3V_RUN
RUN_ON<27,35,39,42>
1.8V_RUN_PW RGD <39>
SIO_SLP_S3#<11,16,27,35,39,42>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+1.8V_RUN
48 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+1.8V_RUN
48 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+1.8V_RUN
48 56Thursday, June 23, 2011
Compal Electronics, Inc.
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR477/PR480)=0.6*(1+20K/10K)=1.8V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
1.8Volt +/-5%
TDC=0.81A
Peak Current=1.157A
OCP min=1.5A
FSW=1MHz
Delta_Iin=0.407A
Delta_Io=0.8182A
+1.8V_RUNP
PC408
22U_0805_6.3VAM
PC408
22U_0805_6.3VAM
12
PC409
22U_0805_6.3VAM
PC409
22U_0805_6.3VAM
12
PC410
0.1U_0402_10V7K
@PC410
0.1U_0402_10V7K
@
12
PC407
22P_0402_50V8J
PC407
22P_0402_50V8J
12
PR475
10K_0402_5%~D
PR475
10K_0402_5%~D
12
PR477
20K_0402_1%
PR477
20K_0402_1%
12
PC306
47P_0402_50V8J~D
PC306
47P_0402_50V8J~D
12
PR481
0_0402_5%
PR481
0_0402_5%
1 2
PU15
SYN470DBC_DFN10_3X3
PU15
SYN470DBC_DFN10_3X3
EN
5
PG 4
LX 3
FB 6
SVIN
8
TP
11
LX 2
PVIN
10
NC
7
PVIN
9
NC
1
PR480
10K_0402_1%
PR480
10K_0402_1%
12
PR478
0_0402_5%
@PR478
0_0402_5%
@
1 2
PL25
HCB1608KF-121T30_0603
PL25
HCB1608KF-121T30_0603
1 2
PJP403
PAD-OPEN 3x3m
PJP403
PAD-OPEN 3x3m
1 2
PC406
22U_0805_6.3VAM
PC406
22U_0805_6.3VAM
12
PL26
1UH_PH041H-1R0MS_3.8A_20%
PL26
1UH_PH041H-1R0MS_3.8A_20%
1 2
PR479
47K_0402_5%
@PR479
47K_0402_5%
@
12
PC411
680P_0603_50V7K
@
PC411
680P_0603_50V7K
@
12
PR476
4.7_1206_5%
@
PR476
4.7_1206_5%
@
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_+V1.05SP
SW _+V1.05SP
UG_+V1.05SP
LG_+V1.05SP
V5IN_+V1.05SP
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
+V1.05SP_B+
+PWR_SRC
+5V_ALW
+1.05V_MP
+1.05V_MP +1.05V_M
+3.3V_ALW
SIO_SLP_A#<16,39,42>
1.05V_A_PWRGD<40>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+1.05V_M
49 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+1.05V_M
49 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
+1.05V_M
49 56Thursday, June 23, 2011
Compal Electronics, Inc.
+1.05Volt +/- 5%
TDC=2.38A
Peak Current=3.396A
OCP min=4.42A
L/S RDS(on) 11.7m ohm(typ),14.12m ohm(max)
FSW=290KHz
Delta_Iin=0.234A
Delta_Io=1.038A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
S0 mode be high level
+1.05V_MP
PR403
0_0402_5%
PR403
0_0402_5%
1 2
PR406
4.99K_0402_1%
PR406
4.99K_0402_1%
12
PJP402
JUMP_43X118
PJP402
JUMP_43X118
11
2
2
PC405
1U_0603_6.3V6M
PC405
1U_0603_6.3V6M
12
PR401
2.2_0603_5%
PR401
2.2_0603_5%
1 2
PC433
0.1U_0603_25V7K
@
PC433
0.1U_0603_25V7K
@
12
+
PC430
220U_D2_4VM
+
PC430
220U_D2_4VM
1
2
PC432
1000P_0603_50V7K
@PC432
1000P_0603_50V7K
@
12
PC402
2200P_0402_50V7K
PC402
2200P_0402_50V7K
12
PJP400
JUMP_43X118
PJP400
JUMP_43X118
11
2
2
PC401
0.1U_0402_25V6
PC401
0.1U_0402_25V6
12
PC403
4.7U_0805_25V6K
PC403
4.7U_0805_25V6K
12
PC400
4.7U_0805_25V6K
PC400
4.7U_0805_25V6K
12
PC404
0.1U_0603_25V7K
PC404
0.1U_0603_25V7K
1 2
PJP401
JUMP_43X118
PJP401
JUMP_43X118
11
2
2
PR407
10K_0402_1%
PR407
10K_0402_1%
1 2
PL400
3.3UH_PCMB064T-3R3MS_7A_20%
PL400
3.3UH_PCMB064T-3R3MS_7A_20%
1 2
PR405
470K_0402_1%
PR405
470K_0402_1%
12
PC431
0.1U_0402_16V7K
@PC431
0.1U_0402_16V7K
@
12
PR404
4.7_1206_5%
@PR404
4.7_1206_5%
@
12
PR400
100K_0402_1%~D
PR400
100K_0402_1%~D
12
PU17
TPS51212DSCR_SON10_3X3
PU17
TPS51212DSCR_SON10_3X3
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
RF
5
VFB
4
PGOOD
1
TP 11
PR402
66.5K_0402_1%~D
PR402
66.5K_0402_1%~D
1 2
PQ401
AO4710_SO8
PQ401
AO4710_SO8
4
7
8
6
5
1
2
3
PQ400
AO4466_SO8
PQ400
AO4466_SO8
3 6
5
7
8
2
4
1

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VTT_VX
+1.05VTT_VX
+1.05VTT_SENSE
+1.05VTT_SS
+1.05VTT_FSET
+1.05VTT_PWRGD
+1.05VTT_VFB
+1.05VTT_SENSE
+1.05VTT_BST
+1.05VTT_COMP
+1.05VTT_MODE
+1.05VTT_EN
+1.05VTT_SENSE
+1.05VTT_PWRGD
+1.05VTT_PWR_SRC
+1.05VTT_VX
SNUB_1.05VTT
+1.05VTTP
+1.05VTTP
+1.05V_RUN_VTT GNDA_1.05VTT
+5V_RUN
GNDA_1.05VTT
GNDA_1.05VTT
GNDA_1.05VTT
+3.3V_ALW
+5V_ALW
GNDA_1.05VTT
GNDA_1.05VTT
GNDA_1.05VTT
+3.3V_RUN
GNDA_1.05VTT
VTT_SENSE <10>
1.05V_VTTPWRGD <40,54>
CPU_VTT_ON <39>
VTT_GND <10>
VCCP_PWRCTRL <10>
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
50 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
50 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
50 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
1.05Volt +/-5%
TDC=4.49A
Peak Current=6.411A
OCP min=8.334A
FSW=1MHz
Delta_Iin=0.804A
Delta_Io=1.975A
+1.05VTTP
From GPIO
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)
Vth =1~x~2.5v
VFB=0.6V
PC112
0.1U_0603_25V7K~D
PC112
0.1U_0603_25V7K~D
12
PR118
0_0402_5%~D
PR118
0_0402_5%~D
1 2
PC116
680P_0402_50V7K~D
PC116
680P_0402_50V7K~D
12
PJP23
PAD-OPEN 4x4m
PJP23
PAD-OPEN 4x4m
1 2
PJP26
PAD-OPEN 43X118
PJP26
PAD-OPEN 43X118
1 2
PR94
0_0402_5%~D
PR94
0_0402_5%~D
12
PC130
22U_0805_6.3V6M
PC130
22U_0805_6.3V6M
12
PR100
10_0402_5%~D
PR100
10_0402_5%~D
12
PC131
6800P_0402_25V7K~D
PC131
6800P_0402_25V7K~D
12
PR102
0_0402_5%~D
PR102
0_0402_5%~D
1 2
PC128
0.1U_0603_25V7K~D
PC128
0.1U_0603_25V7K~D
12
PC121
47U_0805_4V6M~D
PC121
47U_0805_4V6M~D
12
PC301
10U_0805_25V6K
PC301
10U_0805_25V6K
12
PC125
22U_0805_6.3V6M
PC125
22U_0805_6.3V6M
12
PC113
0.1U_0603_25V7K~D
PC113
0.1U_0603_25V7K~D
12
PR101
9.31K_0402_1%~D
PR101
9.31K_0402_1%~D
12
PC183
0.01U_0402_16V7K~D
@
PC183
0.01U_0402_16V7K~D
@
12
PC111
10U_0805_25V6K
PC111
10U_0805_25V6K
12
PC126
22U_0805_6.3V6M
PC126
22U_0805_6.3V6M
12
PC115
100P_0402_50V8J~D
PC115
100P_0402_50V8J~D
12
PJP24
PAD-OPEN 43X118
PJP24
PAD-OPEN 43X118
1 2
PR130
20K_0402_0.5%~D
PR130
20K_0402_0.5%~D
12
PR90
5.6K_0402_5%~D
PR90
5.6K_0402_5%~D
12
PR93 2K_0402_0.5%~DPR93 2K_0402_0.5%~D
12
PC108
1U_0402_6.3V6K~D
PC108
1U_0402_6.3V6K~D
12
PL10
0.42UH_ETQP4LR42AFM_17A_20%~D
PL10
0.42UH_ETQP4LR42AFM_17A_20%~D
12
PC127
22U_0805_6.3V6M
PC127
22U_0805_6.3V6M
12
PC123
22U_0805_6.3V6M
PC123
22U_0805_6.3V6M
12
G
D
S
PQ17
SSM3K7002FU_SC70-3
G
D
S
PQ17
SSM3K7002FU_SC70-3
2
13
PR116
100K_0402_5%
@PR116
100K_0402_5%
@
1 2
PR95
0_0402_5%~D
PR95
0_0402_5%~D
1 2
PC120
22U_0805_6.3V6M
PC120
22U_0805_6.3V6M
12
PR128
10K_0402_5%
PR128
10K_0402_5%
1 2
PC117
1800P_0402_50V7K~D
PC117
1800P_0402_50V7K~D
1 2
PC513
0.1U_0603_25V7K~D
@
PC513
0.1U_0603_25V7K~D
@
12
PR92
22.1K_0402_1%~D
@PR92
22.1K_0402_1%~D
@
12
PC110
10U_0805_25V6K
PC110
10U_0805_25V6K
12
PR89
3.3_0603_1%~D
PR89
3.3_0603_1%~D
1 2
PC109
10U_0805_25V6K
PC109
10U_0805_25V6K
12
PC300
10U_0805_25V6K
PC300
10U_0805_25V6K
12
PR96
3.01K_0402_1%
PR96
3.01K_0402_1%
12
PR91
0_0402_5%~D
@PR91
0_0402_5%~D
@
1 2
PC124
47U_0805_4V6M~D
PC124
47U_0805_4V6M~D
12
PR104
13.3K_0402_1%~D
PR104
13.3K_0402_1%~D
12
PJP25
PAD-OPEN1x1m
PJP25
PAD-OPEN1x1m
12
PC129
22U_0805_6.3V6M
PC129
22U_0805_6.3V6M
12
PU7
SN1003055RUWR_QFN17_3P5X3P5~D
PU7
SN1003055RUWR_QFN17_3P5X3P5~D
SS
6
VCCA
1
GND
2
PGND
9
SW
8
VIN 17
VBST 15
FSET 12
MODE 11
VIN 16
IMON 10
PGND
7
COMP
3
VFB
4
VOUT
5
PGOOD 14
EN 13
PC114
0.1U_0603_25V7K
PC114
0.1U_0603_25V7K
1 2
PR103
0_0402_5%~D
@PR103
0_0402_5%~D
@
1 2
PC122
22U_0805_6.3V6M
PC122
22U_0805_6.3V6M
12
PC118
0.01U_0402_25V7K~D
PC118
0.01U_0402_25V7K~D
12
PR511
7.68K_0805_1%~D
@PR511
7.68K_0805_1%~D
@
1 2
PR119
0_0402_5%~D
PR119
0_0402_5%~D
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VGFX_TONB
+Vcore_GNDSA
+Vcore_FBA
+Vcore_VRHOT#
+VGFX_FBB
+VGFX_GNDSB
+VGFX_GNDSB
+VGFX_FBB
+GFX_POKB
+Vcore_VDIO
+Vcore_ALERT#
+Vcore_CLK
+Vcore_POKA
+Vcore_POKA
BOST1
P1_SW
BT1_1
P1_SW
UGATE1
+Vcore_CSPA1
LGATE1
+Vcore_CSPA1
+Vcore_CSPA2
BT2_1
P2_SW
+Vcore_CSNA
+Vcore_CSNA
+Vcore_CSPA3
BT3_1
P3_SW
UGATE3
LGATE3
+Vcore_CSNA
LGAT2
P2_SW
BOST2
UGATE2
+Vcore_CSPA3
+Vcore_CSPA2
+Vcore_CSNA
BOST3
P3_SW
+Vcore_PWMA
P1_SW
P2_SW
P3_SW
+Vcore_CSPAAVE
+VGFX_THERMB
+Vcore_THERMA
+Vcore_SR
+GFX_IMAXB
+Vcore_IMAXA
+Vcore_IMAXA
+GFX_IMAXB
+Vcore_VDD
+Vcore_VDD
+Vcore_VDD
+Vcore_VCC
+Vcore_EN
GNDA_VCC
GNDA_VCC
GNDA_VCC
GNDA_VCC
+VCC_GFXCORE
+3.3V_RUN +1.05V_RUN_VTT
+VCC_PWR_SRC
+VCC_CORE
GNDA_VCC
+VCC_CORE
GNDA_VCC
GNDA_VCC
+VCC_PWR_SRC
+VCC_CORE
GNDA_VCC
+5V_ALW
GNDA_VCC
+5V_ALW
+PWR_SRC
GNDA_VCC
+Vcore_VCC
+VCC_PWR_SRC
GNDA_VCC
GNDA_VCC
+1.05V_RUN_VTT
GNDA_VCC
+VCC_CORE
+VCC_PWR_SRC
VCCSENSE<10>
VSSSENSE<10>
VCC_AXG_SENSE<11>
VSS_AXG_SENSE<11>
+GFX_CSNB<52>
H_PROCHOT#<7,40,53>
IMVP_PWRGD<39>
+GFX_BSTB<52>
+GFX_LXB<52>
+GFX_DHB<52>
+GFX_DLB<52>
VIDSCLK<10>
VIDALERT_N<10>
VIDSOUT<10>
IMVP_VR_ON<39>
1.05V_0.8V_PWROK<14,40>
+GFX_CSPB1<52>
Title
Size Document Number Rev
Date: Sheet of
0.1
Vcore
51 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
Vcore
51 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
Vcore
51 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Layout Note:
PC142 close to PIN15
AON6414AL
MDU2657RH
PQ9,PQ11,PQ13 PQ10,PQ14,PQ15
AON6704L
MDU2653RH
Main
2nd
X7629631L88
X7629631L89
Charlie_note :
20110509 Maxim FAE-Allen reply:There are total 3 pcs
2.2uF capacitor for VCC(PC143), VDDA(PC160)
and VDDB(PC142) pin.
+VCC_CORE
+VCC_CORE
TDC=37.1A
Peak Current=53A
OCP min=69A
Fsw=270KHZ
Choke DCR=1.55± 7% mΩ
PQ10
SIR818DP-T1-GE3_POWERPAK8-5
PQ10
SIR818DP-T1-GE3_POWERPAK8-5
4
5
1
2
3
PH3
100K_0402_1%_TSM0B104F4251RZ~D
PH3
100K_0402_1%_TSM0B104F4251RZ~D
1 2
PC281
0.01U_0402_25V7K~D
PC281
0.01U_0402_25V7K~D
1 2
PC161
2200P_0402_50V7K~D
PC161
2200P_0402_50V7K~D
12
PC158
1000P_0402_50V7K~D
PC158
1000P_0402_50V7K~D
12
PR165
10K_0402_1%~D
PR165
10K_0402_1%~D
1 2
PR330
0_0402_5%~D
PR330
0_0402_5%~D
1 2
PR167 0_0402_5%~DPR167 0_0402_5%~D
1 2
PC160
2.2U_0603_10V7K~D
PC160
2.2U_0603_10V7K~D
12
PC144
1000P_0402_50V7K~D
@PC144
1000P_0402_50V7K~D
@
1 2
PQ15
SIR818DP-T1-GE3_POWERPAK8-5
PQ15
SIR818DP-T1-GE3_POWERPAK8-5
4
5
1
2
3
PR143
75_0402_5%~D
@PR143
75_0402_5%~D
@
1 2
PR161
2.2_0603_5%~D
PR161
2.2_0603_5%~D
12
PR148
1_1206_5%
@PR148
1_1206_5%
@
12
PC176
2200P_0402_50V7K~D
PC176
2200P_0402_50V7K~D
12
PR144
2K_0402_0.5%~D
PR144
2K_0402_0.5%~D
12
PC163
1000P_0402_50V7K~D
PC163
1000P_0402_50V7K~D
12
PR153
10_0402_5%~D
PR153
10_0402_5%~D
1 2
PU9
MAX17511GTL+T_TQFN40_5X5~D
PU9
MAX17511GTL+T_TQFN40_5X5~D
FBB
6
GNDSA
3
GNDSB
7
CSPB1
8
TON
2
FBA
4
VRHOT#
5
CSNB
9
POKB
10
BSTB
11
LXB
12
DHB
13
DLB
14
VDDB
15
ALERT#
17
CLK
18
POKA
19
VDIO
16
IMAXB 30
IMAXA 29
BSTA2 28
LXA2 27
DHA2 26
DLA2 25
VDDA 24
DLA1 23
DHA1 22
LXA1 21
BSTA1 20
EN 1
VCC 40
CSPA3 39
CSPA2 38
CSNA 37
CSPA1 36
CSPAAVE 35
THERMB 34
THERMA 33
SR 32
DRVPWMA 31
TPAD 41
PQ9
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ9
SIR472DP-T1-GE3_POWERPAK8-5~D
3 5
2
4
1
PC192
4.7U_0805_25VAK
PC192
4.7U_0805_25VAK
12
PL11
0.42UH_ETQP4LR42AFM_17A_20%~D
PL11
0.42UH_ETQP4LR42AFM_17A_20%~D
1 2
PC138
1U_0603_10V6K~D
PC138
1U_0603_10V6K~D
12
PC162
1000P_0402_50V7K~D
@PC162
1000P_0402_50V7K~D
@
1 2
PC179
0.22U_0402_16V7K~D
PC179
0.22U_0402_16V7K~D
12
PC150
1000P_0402_50V7K~D
@
PC150
1000P_0402_50V7K~D
@
12
PC147
4.7U_0805_25VAK
PC147
4.7U_0805_25VAK
12
PC278
0.1U_0402_16V7K~D
PC278
0.1U_0402_16V7K~D
1 2
PL13
0.42UH_ETQP4LR42AFM_17A_20%~D
PL13
0.42UH_ETQP4LR42AFM_17A_20%~D
1 2
PH2
100K_0402_1%_TSM0B104F4251RZ~D
PH2
100K_0402_1%_TSM0B104F4251RZ~D
1 2
PQ14
SIR818DP-T1-GE3_POWERPAK8-5
PQ14
SIR818DP-T1-GE3_POWERPAK8-5
4
5
1
2
3
PR145
1_0402_5%~D
PR145
1_0402_5%~D
12
PR137
10_0402_5%~D
@PR137
10_0402_5%~D
@
1 2
PR162 54.9_0402_1%~DPR162 54.9_0402_1%~D
12
PC146
0.22U_0402_16V7K~D
PC146
0.22U_0402_16V7K~D
12
PR135
105K_0402_1%~D
PR135
105K_0402_1%~D
1 2
PR132
100K_0402_5%~D
PR132
100K_0402_5%~D
1 2
PR158
10_0402_5%~D
PR158
10_0402_5%~D
1 2
PR176
3.24K_0402_1%~D
PR176
3.24K_0402_1%~D
12
PR171
0_0402_5%~D
@PR171
0_0402_5%~D
@
12
PQ13
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ13
SIR472DP-T1-GE3_POWERPAK8-5~D
3 5
2
4
1
PC134
4.7U_0805_25VAK
PC134
4.7U_0805_25VAK
12
PR170
1_0402_5%~D
PR170
1_0402_5%~D
12
PR107
2.2_0603_5%~D
PR107
2.2_0603_5%~D
12
PC178
1000P_0402_50V7K~D
@PC178
1000P_0402_50V7K~D
@
1 2
PC175
1500P_0603_50V7K~D
@PC175
1500P_0603_50V7K~D
@
12
PJP28
PAD-OPEN1x1m
PJP28
PAD-OPEN1x1m
1 2
PC166
0.22U_0402_16V7K~D
PC166
0.22U_0402_16V7K~D
12
PR138
10_0402_5%~D
PR138
10_0402_5%~D
1 2
PR112
12.7K_0402_1%~D
PR112
12.7K_0402_1%~D
12
PC135
4.7U_0805_25VAK
PC135
4.7U_0805_25VAK
12
PC137
0.22U_0603_10V7K~D
PC137
0.22U_0603_10V7K~D
1 2
PR160 130_0402_1%~D@PR160 130_0402_1%~D@
12
PC269
43P_0402_50V8J
PC269
43P_0402_50V8J
1 2
PR164 0_0402_5%~DPR164 0_0402_5%~D
1 2
+
PC154
100U_25V_M_R0.7~D
+
PC154
100U_25V_M_R0.7~D
1
2
PR168 0_0402_5%~DPR168 0_0402_5%~D
1 2
PR125
1K_0402_5%~D
PR125
1K_0402_5%~D
1 2
PC140
2200P_0402_50V7K~D
PC140
2200P_0402_50V7K~D
12
PR117
1_1206_5%
@PR117
1_1206_5%
@
12
PR124
5.62K_0402_1%~D
PR124
5.62K_0402_1%~D
1 2
PC157
0.22U_0603_10V7K~D
PC157
0.22U_0603_10V7K~D
1 2
PC170
2200P_0402_50V7K~D
PC170
2200P_0402_50V7K~D
12
PR141
2.2_0603_5%~D
PR141
2.2_0603_5%~D
12
PQ11
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ11
SIR472DP-T1-GE3_POWERPAK8-5~D
3 5
2
4
1
PR156
10_0402_5%~D
PR156
10_0402_5%~D
1 2
PR121
0_0402_5%~D
@PR121
0_0402_5%~D
@
1 2
PC149
1000P_0402_50V7K~D
PC149
1000P_0402_50V7K~D
12
PR109
6.49K_0402_1%~D
PR109
6.49K_0402_1%~D
12
PR129
0_0402_5%~D
@PR129
0_0402_5%~D
@
1 2
PR157
8.45K_0402_1%~D
PR157
8.45K_0402_1%~D
12
PR166
0_0402_5%~D
@PR166
0_0402_5%~D
@
1 2
PR122
10_0402_5%~D
PR122
10_0402_5%~D
1 2
PU8
MAX17491GTA+T_TQFN8_3X3~D
PU8
MAX17491GTA+T_TQFN8_3X3~D
BST 1
SKIP
6
VDD
5
PWM
2
DL 4
GND
3
LX 7
DH 8
EP
9
PR123
5.62K_0402_1%~D
PR123
5.62K_0402_1%~D
1 2
+
PC156
100U_25V_M_R0.7~D
+
PC156
100U_25V_M_R0.7~D
1
2
PC169
0.1U_0603_25V7K~D
PC169
0.1U_0603_25V7K~D
12
PC139
1500P_0603_50V7K~D
@PC139
1500P_0603_50V7K~D
@
12
PR159 130_0402_1%~D
PR159 130_0402_1%~D
12
PR133
10K_0402_1%~D
@
PR133
10K_0402_1%~D
@
1 2
PC277
1U_0603_10V6K~D
@
PC277
1U_0603_10V6K~D
@
12
PR139
10_0402_5%~D
PR139
10_0402_5%~D
1 2
PR140
9.76K_0402_1%~D
PR140
9.76K_0402_1%~D
12
PR149
10_0402_5%~D
PR149
10_0402_5%~D
1 2
PC132
0.1U_0603_25V7K~D
PC132
0.1U_0603_25V7K~D
12
PR110
12.7K_0402_1%~D
PR110
12.7K_0402_1%~D
12
PR152
3.24K_0402_1%~D
PR152
3.24K_0402_1%~D
12
PC148
0.1U_0603_25V7K~D
PC148
0.1U_0603_25V7K~D
12
PC214
4.7U_0805_25VAK
PC214
4.7U_0805_25VAK
12
PC205
1000P_0402_50V7K~D
PC205
1000P_0402_50V7K~D
1 2
PJP27
PAD-OPEN 4x4m
PJP27
PAD-OPEN 4x4m
1 2
PR142
10_0402_5%~D
@PR142
10_0402_5%~D
@
1 2
PC180
1000P_0402_50V7K~D
@PC180
1000P_0402_50V7K~D
@
1 2
PR114
1_0402_5%~D
PR114
1_0402_5%~D
12
PR173
1_1206_5%
@PR173
1_1206_5%
@
12
PC168
4.7U_0805_25VAK
PC168
4.7U_0805_25VAK
12
PC174
0.22U_0603_10V7K~D
PC174
0.22U_0603_10V7K~D
1 2
PC151
2200P_0402_50V7K~D
PC151
2200P_0402_50V7K~D
12
PR115
12.7K_0402_1%~D
PR115
12.7K_0402_1%~D
12
PC165
1000P_0402_50V7K~D
@PC165
1000P_0402_50V7K~D
@
12
PR126
107K_0402_1%~D
PR126
107K_0402_1%~D
1 2
PR127
165K_0402_1%
PR127
165K_0402_1%
1 2
PC145
1000P_0402_50V7K~D
@PC145
1000P_0402_50V7K~D
@
1 2
PR169
2K_0402_0.5%~D
PR169
2K_0402_0.5%~D
12
PC171
4.7U_0805_25VAK
PC171
4.7U_0805_25VAK
12
PR120
3.24K_0402_1%~D
PR120
3.24K_0402_1%~D
12
PR131
0_0402_5%~D
@PR131
0_0402_5%~D
@
1 2
PR113
2K_0402_0.5%~D
PR113
2K_0402_0.5%~D
12
PC167
1000P_0402_50V7K~D
PC167
1000P_0402_50V7K~D
12
PC172
4.7U_0805_25VAK
PC172
4.7U_0805_25VAK
12
PC152
4.7U_0805_25VAK
PC152
4.7U_0805_25VAK
12
PC133
2200P_0402_50V7K~D
PC133
2200P_0402_50V7K~D
12
PC177
1000P_0402_50V7K~D
@PC177
1000P_0402_50V7K~D
@
1 2
PC143
2.2U_0603_10V7K~D
PC143
2.2U_0603_10V7K~D
1 2
PR111
3.09K_0402_1%~D
PR111
3.09K_0402_1%~D
12
PC173 0.1U_0402_25V6K~DPC173 0.1U_0402_25V6K~D
1 2
PC142
2.2U_0603_10V7K~D
PC142
2.2U_0603_10V7K~D
12
+
PC155
100U_25V_M_R0.7~D
+
PC155
100U_25V_M_R0.7~D
1
2
PL12
0.42UH_ETQP4LR42AFM_17A_20%~D
PL12
0.42UH_ETQP4LR42AFM_17A_20%~D
1 2
PC164
1000P_0402_50V7K~D
@PC164
1000P_0402_50V7K~D
@
1 2
PR146
0_0402_5%~D
@PR146
0_0402_5%~D
@
1 2
PR134
154K_0402_1%~D
PR134
154K_0402_1%~D
1 2
PC159
1500P_0603_50V7K~D
@PC159
1500P_0603_50V7K~D
@
12
PH1
10K_0402_1%_ERTJ0EG103FA~D
PH1
10K_0402_1%_ERTJ0EG103FA~D
1 2
PC276
4.7U_0805_25VAK
PC276
4.7U_0805_25VAK
12
PC226
4.7U_0805_25VAK
PC226
4.7U_0805_25VAK
12
PC153
4.7U_0805_25VAK
PC153
4.7U_0805_25VAK
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GBT1_1
GP1_SW GP1_Vo
+VGFX_PWR_SRC
+PWR_SRC
+VCC_GFXCORE
GNDA_VCC
+GFX_DHB<51>
+GFX_BSTB<51>
+GFX_LXB<51>
+GFX_DLB<51>
+GFX_CSNB<51>
+GFX_CSPB1<51>
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
52 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
52 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
52 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DELL CONFIDENTIAL/PROPRIETARY
AON6414AL
MDU2657RH
PQ21,PQ24 PQ25,PQ26
AON6704L
MDU2653RH
Main
2nd
X7629631L88
X7629631L89
+VCC_GFXCORE
+VCC_GFXCORE
TDC=23.1A
Peak Current=33A
OCP min=43A
Fsw=330KHZ
Choke DCR=0.82± 5% mΩ
PL15
0.36UH_FDUE1040J-H-R36M=P3_33A_20%~D
PL15
0.36UH_FDUE1040J-H-R36M=P3_33A_20%~D
1
3
4
2
PQ21
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ21
SIR472DP-T1-GE3_POWERPAK8-5~D
3 5
2
4
1
PQ26
SIR818DP-T1-GE3_POWERPAK8-5
PQ26
SIR818DP-T1-GE3_POWERPAK8-5
4
5
1
2
3
PC197
0.22U_0603_10V7K~D
PC197
0.22U_0603_10V7K~D
1 2
+
PC201
470U_D2_2VM_R4.5M~D
+
PC201
470U_D2_2VM_R4.5M~D
1
2
PC200
0.1U_0402_10V7K~D
PC200
0.1U_0402_10V7K~D
12
PC208
0.33U_0402_10V6K
PC208
0.33U_0402_10V6K
1 2
PR192
0_0402_5%~D
PR192
0_0402_5%~D
12
PR203
2.21K_0402_1%~D
PR203
2.21K_0402_1%~D
12
PC203
4700P_0402_25V7K~D
PC203
4700P_0402_25V7K~D
12
PR191
0_0402_5%~D
PR191
0_0402_5%~D
12
PH4
10K_0402_1%_ERTJ0EG103FA~D
PH4
10K_0402_1%_ERTJ0EG103FA~D
1 2
PC282
0.068U_0402_16V7K~D
PC282
0.068U_0402_16V7K~D
1 2
PC204
10U_1206_25VAK~D
PC204
10U_1206_25VAK~D
12
PC195
10U_1206_25VAK~D
PC195
10U_1206_25VAK~D
12
PR189
2.2_0603_5%~D
PR189
2.2_0603_5%~D
12
PJP29
PAD-OPEN 4x4m
PJP29
PAD-OPEN 4x4m
1 2
PC196
10U_1206_25VAK~D
PC196
10U_1206_25VAK~D
12
PC199
2200P_0402_50V7K~D
PC199
2200P_0402_50V7K~D
12
+
PC202
470U_D2_2VM_R4.5M~D
+
PC202
470U_D2_2VM_R4.5M~D
1
2
PC193
0.1U_0603_25V7K~D
PC193
0.1U_0603_25V7K~D
12
PQ25
SIR818DP-T1-GE3_POWERPAK8-5
PQ25
SIR818DP-T1-GE3_POWERPAK8-5
4
5
1
2
3
PR190
1.37K_0402_1%~D
PR190
1.37K_0402_1%~D
12
PR201
40.2K_0402_1%~D
@PR201
40.2K_0402_1%~D
@
12
PQ24
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ24
SIR472DP-T1-GE3_POWERPAK8-5~D
3 5
2
4
1
PR193
2.2_1206_1%~D
@PR193
2.2_1206_1%~D
@
12
PC198
470P_0603_50V8J~D
@PC198
470P_0603_50V8J~D
@
12
PC194
2200P_0402_50V7K~D
PC194
2200P_0402_50V7K~D
12
PC207
1000P_0402_50V7K~D
PC207
1000P_0402_50V7K~D
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAX8731_REF
MAX8731_REF
MAX8731_IINP
MAX8731_REF
ICOUT
CHG_LGATE
BOOT_D
CHG_UGATE
+VCHGR_B
CSSN_1
MAX8731_IINP
+VCHGR_L
MAX8731_REF
VFB
MAX8731A_LDO
+DCIN
CSSP_1
BOOT
MAX8731A_LDO
+DC_IN
+5V_ALW
CHAGER_SRC
+PWR_SRC
GNDA_CHG
+SDC_IN
+DC_IN_SS
+5V_ALW +5V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW2
GNDA_CHG
+5V_ALW
+SDC_IN
+VCHGR
+VCHGR
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
+DOCK_PWR_BAR
+DC_IN_SS
ACAV_IN_NB <39,40,55>
CSS_GC<55>
DC_BLOCK_GC<55>
DYN_TUR_CURRNT_SET#
<40>
H_PROCHOT# <7,40,51>
PROCHOT_GATE <39> ACAV_IN <22,40,55>
CHARGER_SMBDAT<40>
ACAV_IN<22,40,55>
DOCK_DCIN_IS- <38>
CHARGER_SMBCLK<40>
DOCK_DCIN_IS+ <38>
+CHGR_DC_IN<55>
DK_CSS_GC <55>
MAX8731_IINP<22>
Title
Size Document Number Rev
Date: Sheet of
LA-7741P
0.1
Charger
53 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741P
0.1
Charger
53 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741P
0.1
Charger
53 56Thursday, June 23, 2011
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
90W
High
Low
DYN_TUR_CURRENT_SET#
65W
To preset system to throtlle
switching from AC to DC
Adapter Protection Circuit fot Turbo Mode
Maximum charging current is 7.2A
Adapter Protection Event
PR510
0 Ohm@
100k0 Ohm @
@
PR521
HW
SW
PR522
E2 AC_OK=17.7 Volt
PR813
TI bq24745 = 316K
Intersil ISL88731 = 226K
Maxim = 383K
PR828
0_0402_5%~D
PR828
0_0402_5%~D
12
PR239
10K_0402_1%~D
PR239
10K_0402_1%~D
12
PR850
10_0402_5%~D
PR850
10_0402_5%~D
12
PR847
20K_0402_1%~D
PR847
20K_0402_1%~D
1 2
PR827
10_0402_1%~D
PR827
10_0402_1%~D
12
G
D
S
PQ38
RHU002N06_SOT323-3~D
G
D
S
PQ38
RHU002N06_SOT323-3~D
2
13
PR846
1.8M_0402_1%
PR846
1.8M_0402_1%
1 2
PR240
0_0402_5%~D
@PR240
0_0402_5%~D
@
1 2
G
D
S
PQ803A
NTGD4161PT1G_TSOP6~D
G
D
S
PQ803A
NTGD4161PT1G_TSOP6~D
1
65
PQ804
AON7408L_DFN8-5
PQ804
AON7408L_DFN8-5
4
5
1
2
3
G
S
D
PQ802
NTR4502PT1G_SOT23-3~D
G
S
D
PQ802
NTR4502PT1G_SOT23-3~D
2
13
PC244
100P_0402_50V8J~D
@PC244
100P_0402_50V8J~D
@
12
PR819
0_0603_5%~D
PR819
0_0603_5%~D
12
PC842
220P_0402_50V8J~D
PC842
220P_0402_50V8J~D
12
PR803
0_0402_5%~D
PR803
0_0402_5%~D
1 2
PC807
1U_0603_10V6K~D
PC807
1U_0603_10V6K~D
12
PC803
0.1U_0603_25V7K~D
PC803
0.1U_0603_25V7K~D
1 2
PC808
0.01U_0402_25V7K~D
PC808
0.01U_0402_25V7K~D
12
PR336
0_0402_5%~D
@PR336
0_0402_5%~D
@
1 2
PC829
10U_1206_25V6M~D
PC829
10U_1206_25V6M~D
12
PR242
42.2K_0402_1%~D
PR242
42.2K_0402_1%~D
12
PR829
4.7_1206_5%~D
PR829
4.7_1206_5%~D
1 2
PC243
100P_0402_50V8J~D
PC243
100P_0402_50V8J~D
12
PC814
10U_1206_25V6M~D
PC814
10U_1206_25V6M~D
12
PR833
10_0402_5%~D
PR833
10_0402_5%~D
12
PR825
8.45K_0402_1%~D
@PR825
8.45K_0402_1%~D
@
12
PR818
0_0402_5%~D
PR818
0_0402_5%~D
1 2
PC804
0.047U_0603_25V7M~D
PC804
0.047U_0603_25V7M~D
1 2
PC813
0.1U_0603_25V7K~D
PC813
0.1U_0603_25V7K~D
12
G
S
D
PQ801
NTR4502PT1G_SOT23-3~D
G
S
D
PQ801
NTR4502PT1G_SOT23-3~D
2
13
PR474
221K_0402_1%~D
PR474
221K_0402_1%~D
1 2
PJP801
PAD-OPEN1x1m
PJP801
PAD-OPEN1x1m
1 2
PC245
0.01U_0402_25V7K~D
@PC245
0.01U_0402_25V7K~D
@
12
PU12A
LM393DR_SO8~D
PU12A
LM393DR_SO8~D
+
3
-
2O1
P8
G
4
PR260
66.5K_0402_1%~D
PR260
66.5K_0402_1%~D
12
G
D
S
PQ808
RHU002N06_SOT323-3~D
G
D
S
PQ808
RHU002N06_SOT323-3~D
2
13
PC809
0.1U_0603_25V7K~D
PC809
0.1U_0603_25V7K~D
12
PC825
0.01U_0402_25V7K~D
PC825
0.01U_0402_25V7K~D
12
PR813
226K_0402_1%~D
PR813
226K_0402_1%~D
1 2
PD801
BAT54CW_SOT323~D
PD801
BAT54CW_SOT323~D
3
2
1
PC834
0.1U_0603_25V7K~D
@PC834
0.1U_0603_25V7K~D
@
1 2
PQ806A
2N7002DW-T/R7_SOT363-6~D
PQ806A
2N7002DW-T/R7_SOT363-6~D
61
2
PR815
49.9K_0402_1%~D
PR815
49.9K_0402_1%~D
12
PR807
100K_0402_1%~D
PR807
100K_0402_1%~D
12
PR236
1M_0402_1%~D
PR236
1M_0402_1%~D
1 2
PR812
0_0402_5%~D
PR812
0_0402_5%~D
1 2
PUH800
TC7SH08FU_SSOP5~D
PUH800
TC7SH08FU_SSOP5~D
B1
A2
G
3
O
4
P5
PQ806B
2N7002DW-T/R7_SOT363-6~D
PQ806B
2N7002DW-T/R7_SOT363-6~D
3
5
4
PR809
1_0805_5%~D
@PR809
1_0805_5%~D
@
1 2
PR808
100K_0402_1%~D
PR808
100K_0402_1%~D
12
PR817
4.7_0603_5%~D
PR817
4.7_0603_5%~D
1 2
PR241
22.6K_0402_1%~D
PR241
22.6K_0402_1%~D
12
G
D
S
PQ803B
NTGD4161PT1G_TSOP6~D
G
D
S
PQ803B
NTGD4161PT1G_TSOP6~D
3
42
PC815
0.1U_0402_10V7K~D
PC815
0.1U_0402_10V7K~D
12
PR237
47K_0402_1%~D
PR237
47K_0402_1%~D
12
PR243
41.2K_0402_1%~D
@
PR243
41.2K_0402_1%~D
@
12
PR826
100_0402_5%~D
PR826
100_0402_5%~D
1 2
PC830
10U_1206_25V6M~D
PC830
10U_1206_25V6M~D
12
PC279
100P_0402_50V8J~D
PC279
100P_0402_50V8J~D
12
PC242
100P_0402_50V8J~D
PC242
100P_0402_50V8J~D
12
PC823
0.01U_0402_25V7K~D
PC823
0.01U_0402_25V7K~D
12
PC828
0.1U_0603_25V7K~D
PC828
0.1U_0603_25V7K~D
12
PC831
10U_1206_25V6M~D
PC831
10U_1206_25V6M~D
12
PU801
ISL88731CHRTZ-T T_QFN28P__5X5
PU801
ISL88731CHRTZ-T T_QFN28P__5X5
UGATE 24
CSOP 18
PHASE 23
VFB 15
SDA
9
VICM
8
ICREF 1
DCIN
22
ACIN
2
VDDSMB
11
SCL
10
ACOK
13
NC
14
BOOT 25
NC 16
EAO
4
VDDP 21
ICOUT 26
CSSP 28
CSON 17
PGND 19
LGATE 20
FBO
6
EAI
5
CSSN 27
VREF
3
CE
7
GND
12
TP
29
PJP800
PAD-OPEN 4x4m
PJP800
PAD-OPEN 4x4m
1 2
PR261
150K_0402_1%~D
PR261
150K_0402_1%~D
12
PC812
2200P_0402_50V7K~D
PC812
2200P_0402_50V7K~D
12
PC833
0.22U_0603_25V7K~D
PC833
0.22U_0603_25V7K~D
1 2
PC800
0.1U_0603_25V7K~D
@PC800
0.1U_0603_25V7K~D
@
12
PR823
0.01_1206_1%~D
PR823
0.01_1206_1%~D
1
3
4
2
PL800
1UH_PCMB053T-1R0MS_7A_20%
@PL800
1UH_PCMB053T-1R0MS_7A_20%
@
12
PQ805
SI7716ADN-T1-GE3_POWERPAK8-5
PQ805
SI7716ADN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PR811
10K_0402_5%~D
@PR811
10K_0402_5%~D
@
12
PC806
0.1U_0805_50V7M~D
PC806
0.1U_0805_50V7M~D
12
PC810
10U_1206_25V6M~D
PC810
10U_1206_25V6M~D
12
PR814
15.8K_0402_1%~D
PR814
15.8K_0402_1%~D
12
PC832
0.1U_0603_25V7K~D
@PC832
0.1U_0603_25V7K~D
@
1 2
PC841
0.1U_0402_25V4Z~D
PC841
0.1U_0402_25V4Z~D
12
PR206
0_0402_5%~D
@PR206
0_0402_5%~D
@
12
PR810
10K_0402_1%~D
PR810
10K_0402_1%~D
12
PC801
47P_0402_50V8J~D
PC801
47P_0402_50V8J~D
12
PC802
0.1U_0603_25V7K~D
@
PC802
0.1U_0603_25V7K~D
@
12
PR235
232K_0402_1%~D
PR235
232K_0402_1%~D
12
PL801
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
PL801
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
12
PR259
150K_0402_1%~D
PR259
150K_0402_1%~D
12
PR804
10K_0402_5%~D
PR804
10K_0402_5%~D
12
PC805
0.1U_0603_25V7K~D
PC805
0.1U_0603_25V7K~D
1 2
PR816
2.2_0603_1%~D
PR816
2.2_0603_1%~D
1 2
PC821
1000P_0603_50V7K~D
PC821
1000P_0603_50V7K~D
12
PC811 1U_0603_10V6K~DPC811 1U_0603_10V6K~D
1 2
ES2AA-13-F
PD14@
ES2AA-13-F
PD14@
2 1
PR822
2.2K_0402_1%~D
PR822
2.2K_0402_1%~D
12
PR801
0.01_1206_1%~D
PR801
0.01_1206_1%~D
1
3
4
2
PR852
100K_0402_5%~D
PR852
100K_0402_5%~D
12
PU12B
LM393DR_SO8~D
PU12B
LM393DR_SO8~D
+
5
-
6O7
P8
G
4
PQ27
SI4835DDY-T1-E3_SO8~D
PQ27
SI4835DDY-T1-E3_SO8~D
36
5
7
8
2
4
1

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCSA_BT_1+VCCSA_BT
+VCCSA_PWR_SRC +VCCSA_PWR_SRC
+VCCSA_EN
+VCCSA_VID0
+VCCSA_PWRGD+VCCSA_PWRGD
+VCCSA_PHASE
+VCCSA_P
+3.3V_ALW
+VCCSA_P
+VCC_SA
GNDA_VCCSA
GNDA_VCCSA
+5V_ALW
+3.3V_RUN
+VCCSA_SENSE <11>
1.05V_VTTPWRGD <40,50>
VCCSAPWROK<40>
VCCSA_VID_0 <11>
VCCSA_VID_1 <11>
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A 0.8V_VCC_SA
54 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A 0.8V_VCC_SA
54 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A 0.8V_VCC_SA
54 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
+VCCSA_P VCCSA_VID_0 VCCSA_VID_1 VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
output voltage adjustable network
VCCSA
TDC=3.15A
Peak Current=4.5A
OCP min=5.85A
FSW=1MHz
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.
Vo=2v
PC383
3300P_0402_50V7K~D
PC383
3300P_0402_50V7K~D
12
PR258
0_0402_5%~D
@PR258
0_0402_5%~D
@
12
PC249
2200P_0402_50V7K~D
PC249
2200P_0402_50V7K~D
1
2
PC258
0.1U_0402_10V7K~D
PC258
0.1U_0402_10V7K~D
12
PC247
10U_0805_25V6K
PC247
10U_0805_25V6K
1
2
PC256
2200P_0402_50V7K~D
PC256
2200P_0402_50V7K~D
12
PR300
1K_0402_5%~D
PR300
1K_0402_5%~D
1 2
PR266
1K_0402_5%~D
PR266
1K_0402_5%~D
1 2
PR245
2.2_0603_1%~D
PR245
2.2_0603_1%~D
1 2
PR253
0_0402_5%~D
PR253
0_0402_5%~D
12
PR248
2.2_1206_1%~D
@PR248
2.2_1206_1%~D
@
12
PC250
2.2U_0603_10V7K~D
PC250
2.2U_0603_10V7K~D
1 2
PU13
TPS51461RGER_QFN24_4X4~D
PU13
TPS51461RGER_QFN24_4X4~D
V5DRV 18
PGND
20 SW 11
EN 13
SW 9
VIN
24
VOUT
5
PGOOD 16
COMP
3
VID0 14
MODE
6
SW 10
SLEW
4
PGND
21
PGND
19
SW 8
GND
1
VIN
23
VIN
22
VREF
2
VID1 15
V5FILT 17
SW 7
BST 12
TP 25
PR244
100K_0402_5%~D
PR244
100K_0402_5%~D
12
PJP35
PAD-OPEN 43X118
PJP35
PAD-OPEN 43X118
12
PR247
5.1K_0402_1%~D
PR247
5.1K_0402_1%~D
12
PC182
22U_0805_6.3V6M
@
PC182
22U_0805_6.3V6M
@
1 2
PR264
0_0402_5%~D
@PR264
0_0402_5%~D
@
1 2
PC259
22U_0805_6.3V6M
PC259
22U_0805_6.3V6M
12
PJP38
PAD-OPEN 4x4m
PJP38
PAD-OPEN 4x4m
1 2
PC257
22U_0805_6.3V6M
PC257
22U_0805_6.3V6M
12
PR265
0_0402_5%~D
@PR265
0_0402_5%~D
@
12
PC262
0.01U_0402_25V7K~D
PC262
0.01U_0402_25V7K~D
1 2
PR255
0_0402_5%~D
@PR255
0_0402_5%~D
@
1 2
PC253
0.1U_0603_25V7K
PC253
0.1U_0603_25V7K
1 2
PC252
1U_0603_10V6K~D
PC252
1U_0603_10V6K~D
1 2
PR303
10_0402_1%~D
PR303
10_0402_1%~D
12
PR335
33K_0402_5%~D
@PR335
33K_0402_5%~D
@
12
PJP37
PAD-OPEN1x1m
PJP37
PAD-OPEN1x1m
12
PL18
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
PL18
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
12
PC251
0.22U_0402_10V6K~D
PC251
0.22U_0402_10V6K~D
12
PC255
22U_0805_6.3V6M
PC255
22U_0805_6.3V6M
12
PC254
1000P_0603_50V7K~D
@PC254
1000P_0603_50V7K~D
@
12
PC260
22U_0805_6.3V6M
PC260
22U_0805_6.3V6M
12
PR267
100_0402_1%~D
PR267
100_0402_1%~D
12
PC246
10U_0805_25V6K
PC246
10U_0805_25V6K
1
2
PC248
0.1U_0603_25V7K~D
PC248
0.1U_0603_25V7K~D
1 2
PC181
22U_0805_6.3V6M
@
PC181
22U_0805_6.3V6M
@
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BLKNG_MOSFET_GC
PBATT_IN_SS
EN_DK_PWRBAR
STSTART_DCBLOCK_GC
DK_AC_OFF
CHGVR_DCIN
SL_BAT_PRES#
ERC2
ERC1
P33ALW
ACAVDK_SRC
ERC3
DK_AC_OFF_ENCD3301_SDC_IN
3301_ACAV_IN_NB
3301_PWRSRC
STSTART_DCBLOCK_GC
P50ALW
DK_PWRBAR
DC_IN_SS
CD_PBATT_OFF
ACAVIN
CD3301_DCIN
P33ALW2
MPBATT_IN_SS
PBATT+
+PWR_SRC
+VCHGR
+DOCK_PWR_BAR
+DC_IN_SS
+DC_IN
+SDC_IN
+3.3V_ALW2
+PWR_SRC
+3.3V_ALW
+5V_ALW
+NBDOCK_DC_IN_SS
+3.3V_ALW2
PBATT+
+VCHGR
MPBATT+
+DOCK_PWR_BAR
MPBATT+
PBATT+
+3.3V_ALW2
+3.3V_ALW2
CSS_GC<53>
DK_CSS_GC<53>
+CHGR_DC_IN<53>
ACAV_IN_NB <39,40,53>
DOCK_AC_OFF_EC <39>
SLICE_BAT_PRES# <38,39>
SOFT_START_GC<45>
ACAV_DOCK_SRC#<38>
DC_BLOCK_GC<53>
ACAV_IN<22,40,53>
EN_DOCK_PWR_BAR <39>
DEFAULT_OVRDE<39>
SLICE_BAT_PRES#
<38,39>
DOCK_SMB_ALERT# <38,39>
SLICE_BAT_ON<39>
MODULE_ON <39>
PBAT_PRES#<39,45>
SLICE_BAT_PRES#<38,39>
MODULE_BATT_PRES# <39,45>
PBAT_PRES#
<39,45>
SLICE_BAT_ON <39>
DOCK_AC_OFF <38,39>
ACAV_IN<22,40,53>
CHARGE_MODULE_BATT
<39>
MODULE_BATT_PRES#
<39,45>
ACAV_IN <22,40,53>
DEFAULT_OVRDE<39>
CHARGE_PBATT
ACAV_IN
<22,40,53>
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Selector
55 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Selector
55 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
Selector
55 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
PR270
100K_0402_5%~D
PR270
100K_0402_5%~D
1 2
PR281
390K_0402_5%~D
PR281
390K_0402_5%~D
12
PR283
330K_0402_5%~D
PR283
330K_0402_5%~D
1 2
G
D
S
PQ911
2N7002W-7-F_SOT323-3~D
G
D
S
PQ911
2N7002W-7-F_SOT323-3~D
2
13
PR274
820_0603_1%~D
PR274
820_0603_1%~D
1 2
PR324
0_0402_5%~D
@PR324
0_0402_5%~D
@
1 2
G
D
S
PQ910
2N7002W-7-F_SOT323-3~D
G
D
S
PQ910
2N7002W-7-F_SOT323-3~D
2
13
PC232
0.1U_0402_10V7K~D
PC232
0.1U_0402_10V7K~D
1 2
PR306
0_0402_5%~D
@PR306
0_0402_5%~D
@
1 2
PC266
0.1U_0603_25V7K~D
@
PC266
0.1U_0603_25V7K~D
@
12
PR273
10K_0402_5%~D
PR273
10K_0402_5%~D
12
PQ42A
2N7002DW-T/R7_SOT363-6~D
PQ42A
2N7002DW-T/R7_SOT363-6~D
61
2
PD26
RB751V-40_SOD323~D
PD26
RB751V-40_SOD323~D
1 2
PR268
330K_0402_5%~D
PR268
330K_0402_5%~D
1 2
PR296
0_0402_5%~D
@PR296
0_0402_5%~D
@
12
PR290
200K_0402_1%~D
PR290
200K_0402_1%~D
12
PR292
499K_0402_1%~D
PR292
499K_0402_1%~D
12
PC233
0.1U_0402_10V7K~D
PC233
0.1U_0402_10V7K~D
1 2
PR473
100K_0402_5%~D
@PR473
100K_0402_5%~D
@
1 2
PD28
RB751V-40_SOD323~D
PD28
RB751V-40_SOD323~D
12
PR257
1K_0402_5%~D
PR257
1K_0402_5%~D
1 2
PQ47A
2N7002DW-T/R7_SOT363-6~D
PQ47A
2N7002DW-T/R7_SOT363-6~D
61
2
PC265
0.01U_0603_25V7K~D
PC265
0.01U_0603_25V7K~D
12
ES2AA-13-F_SMA2~D
PD16
ES2AA-13-F_SMA2~D
PD16
2 1
PC273
0.1U_0603_25V7K~D
PC273
0.1U_0603_25V7K~D
12
PQ37
FDS6679AZ_SO8~D
PQ37
FDS6679AZ_SO8~D
S1
S2
S3
G4
D
8
D
7
D
6
D
5
PQ50B
2N7002DW-T/R7_SOT363-6~D
PQ50B
2N7002DW-T/R7_SOT363-6~D
3
5
4
PD21
RB751V-40_SOD323~D
PD21
RB751V-40_SOD323~D
12
PQ46
FDS6679AZ_SO8~D
PQ46
FDS6679AZ_SO8~D
S1
S2
S3
G4
D
8
D
7
D
6
D
5
PD18
RB751V-40_SOD323~D
PD18
RB751V-40_SOD323~D
12
PR271
390K_0402_5%~D
PR271
390K_0402_5%~D
12
PR291
390K_0402_5%~D
PR291
390K_0402_5%~D
12
PR278
330K_0402_5%~D
PR278
330K_0402_5%~D
1 2
PR302
0_0402_5%~D
@PR302
0_0402_5%~D
@
1 2
PR288
499K_0402_1%~D
@
PR288
499K_0402_1%~D
@
12
PR318
0_0402_5%~D
@PR318
0_0402_5%~D
@
1 2
PR275
499K_0402_1%~D
PR275
499K_0402_1%~D
12
PD27
RB751V-40_SOD323~D
PD27
RB751V-40_SOD323~D
1 2
PQ48A
2N7002DW-T/R7_SOT363-6~D
PQ48A
2N7002DW-T/R7_SOT363-6~D
61
2
PC264
0.1U_0603_25V7K~D
@
PC264
0.1U_0603_25V7K~D
@
12
PR325
0_0402_5%~D
@PR325
0_0402_5%~D
@
1 2
PR327
0_0402_5%~D
@PR327
0_0402_5%~D
@
1 2
PR321
0_0402_5%~D
@PR321
0_0402_5%~D
@
1 2
PR312
0_0402_5%~D
@PR312
0_0402_5%~D
@
1 2
PD22
RB751V-40_SOD323~D
PD22
RB751V-40_SOD323~D
1 2
PQ39
SI4835DDY-T1-E3_SO8~D
PQ39
SI4835DDY-T1-E3_SO8~D
3 6
5
7
8
2
4
1
2
1
3
PQ57
FDN338P_NL_SOT23-3~D
2
1
3
PQ57
FDN338P_NL_SOT23-3~D
2
1 3
PR317
0_0402_5%~D
@PR317
0_0402_5%~D
@
1 2
PR305
0_0402_5%~D
@PR305
0_0402_5%~D
@
1 2
PC263
0.47U_0805_25V7K~D
PC263
0.47U_0805_25V7K~D
12
PR923
10K_0402_5%~D
PR923
10K_0402_5%~D
1 2
PQ44
SI4835DDY-T1-E3_SO8~D
PQ44
SI4835DDY-T1-E3_SO8~D
3 6
5
7
8
2
4
1
PC267
2200P_0402_50V7K~D
PC267
2200P_0402_50V7K~D
12
PR326
1M_0402_5%~D
@PR326
1M_0402_5%~D
@
1 2
PR314
0_0402_5%~D
@PR314
0_0402_5%~D
@
1 2
PC272
1500P_0402_7K~D
PC272
1500P_0402_7K~D
12
PR285
0_0402_5%~D
@PR285
0_0402_5%~D
@
1 2
PR313
0_0402_5%~D
@PR313
0_0402_5%~D
@
1 2
PC268
0.1U_0603_25V7K~D
PC268
0.1U_0603_25V7K~D
12
PR322
0_0402_5%~D
@PR322
0_0402_5%~D
@
1 2
G
D
S
PQ909
2N7002W-7-F_SOT323-3~D
G
D
S
PQ909
2N7002W-7-F_SOT323-3~D
2
13
PC274
0.047U_0603_25V7K~D
PC274
0.047U_0603_25V7K~D
12
PR287
0_0402_5%~D
@PR287
0_0402_5%~D
@
1 2
PQ41
FDS6679AZ_SO8~D
PQ41
FDS6679AZ_SO8~D
S1
S2
S3
G4
D
8
D
7
D
6
D
5
PD17
PDS5100H-13_POWERDI5-3~D
PD17
PDS5100H-13_POWERDI5-3~D
2
3
1
PR272
620K_0402_5%~D
PR272
620K_0402_5%~D
12
PR279
100K_0402_5%~D
PR279
100K_0402_5%~D
1 2
PR298
0_0402_5%~D
@PR298
0_0402_5%~D
@
1 2
PD23
RB751V-40_SOD323~D
PD23
RB751V-40_SOD323~D
12
PR276
390K_0402_5%~D
PR276
390K_0402_5%~D
12
PR320
0_0402_5%~D
@PR320
0_0402_5%~D
@
1 2
PU14
CD3301ARHHR_QFN36_6X6~D
PU14
CD3301ARHHR_QFN36_6X6~D
DC_IN
1
SS_GC
2
ERC1
3
ACAVDK_SRC
4
GND
5
SDC_IN
6
DC_BLK_GC
7
ACAV_IN
8
SS_DCBLK_GC
16
CSS_GC
10
DK_CSS_GC
11
ERC3
12
ERC2
13
GND
14
PWR_SRC
15
BLKNG_MOSFET_GC 20
SL_BAT_PRES# 21
DK_AC_OFF_EN 22
GND 23
ACAV_IN_NB 24
DK_AC_OFF_EN 25
PBATT_OFF 26
P50ALW 27
PBatt+ 28
DSCHRG_MOSFET_GC 29
BLK_MOSFET_GC 30
NC 31
DK_PWRBAR 33
DC_IN_SS 34
CHARGERVR_DCIN 35
P33ALW2
9
EN_DK_PWRBAR
17
P33ALW
18
TP
37
NBDK_DCINSS 19
NC 36
GND 32
PQ42B
2N7002DW-T/R7_SOT363-6~D
PQ42B
2N7002DW-T/R7_SOT363-6~D
3
5
4
PQ51A
2N7002DW-T/R7_SOT363-6~D
PQ51A
2N7002DW-T/R7_SOT363-6~D
61
2
PR286
10K_0402_5%~D
PR286
10K_0402_5%~D
12
PUH3
TC7SH08FU_SSOP5~D
PUH3
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
PD24
RB751V-40_SOD323~D
PD24
RB751V-40_SOD323~D
1 2
PC275
0.1U_0402_25V4Z~D
@
PC275
0.1U_0402_25V4Z~D
@
12
PQ48B
2N7002DW-T/R7_SOT363-6~D
PQ48B
2N7002DW-T/R7_SOT363-6~D
3
5
4
PR471
510K_0402_5%~D
PR471
510K_0402_5%~D
12
PR282
620K_0402_5%~D
PR282
620K_0402_5%~D
12
PR315
1M_0402_5%~D
PR315
1M_0402_5%~D
1 2
PR304
1K_0402_5%~D
PR304
1K_0402_5%~D
12
PR297
20K_0402_1%~D
PR297
20K_0402_1%~D
1 2
PR472
0_0402_5%~D
@PR472
0_0402_5%~D
@
1 2
PR299
0_0402_5%~D
@PR299
0_0402_5%~D
@
1 2
PC270
0.01U_0603_25V7K~D
PC270
0.01U_0603_25V7K~D
12
PR294
0_0402_5%~D
@PR294
0_0402_5%~D
@
1 2
PD20
PDS5100H-13_POWERDI5-3~D
PD20
PDS5100H-13_POWERDI5-3~D
2
3
1
PR289
499K_0402_1%~D
@
PR289
499K_0402_1%~D
@
12
PR316
0_0402_5%~D
@PR316
0_0402_5%~D
@
1 2
PR311
0_0402_5%~D
@PR311
0_0402_5%~D
@
1 2
PUH5
TC7SH08FU_SSOP5~D
PUH5
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
PQ51B
2N7002DW-T/R7_SOT363-6~D
PQ51B
2N7002DW-T/R7_SOT363-6~D
3
5
4
PR301
0_0402_5%~D
@PR301
0_0402_5%~D
@
1 2
PC271
0.1U_0603_50V4Z~D
PC271
0.1U_0603_50V4Z~D
12
PQ40
FDS6679AZ_SO8~D
PQ40
FDS6679AZ_SO8~D
S
1
S
2
S
3
G
4
D8
D7
D6
D5
PQ49B
2N7002DW-T/R7_SOT363-6~D
PQ49B
2N7002DW-T/R7_SOT363-6~D
3
5
4
PR307
47_0805_5%~D
PR307
47_0805_5%~D
1 2
PR284
820_0603_1%~D
PR284
820_0603_1%~D
1 2
PR280
20K_0402_1%~D
PR280
20K_0402_1%~D
1 2
PR319
0_0402_5%~D
@PR319
0_0402_5%~D
@
1 2
PQ49A
2N7002DW-T/R7_SOT363-6~D
PQ49A
2N7002DW-T/R7_SOT363-6~D
61
2
PQ47B
2N7002DW-T/R7_SOT363-6~D
PQ47B
2N7002DW-T/R7_SOT363-6~D
3
5
4
PR310
100K_0402_5%~D
PR310
100K_0402_5%~D
1 2
PD25
RB751V-40_SOD323~D
PD25
RB751V-40_SOD323~D
1 2
PD29
RB751V-40_SOD323~D
PD29
RB751V-40_SOD323~D
12
PQ50A
2N7002DW-T/R7_SOT363-6~D
PQ50A
2N7002DW-T/R7_SOT363-6~D
61
2
PQ45
FDS6679AZ_SO8~D
PQ45
FDS6679AZ_SO8~D
S
1
S
2
S
3
G
4
D8
D7
D6
D5
PR309
0_0402_5%~D
@PR309
0_0402_5%~D
@
1 2
PD19
RB751V-40_SOD323~D
PD19
RB751V-40_SOD323~D
12
PR269
0_0402_5%~D
@PR269
0_0402_5%~D
@
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_RUN_VTT
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_GFXCORE
+1.05V_RUN_VTT
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PROCESSOR DECOUPLING
56 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PROCESSOR DECOUPLING
56 56Thursday, June 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7741
0.1
PROCESSOR DECOUPLING
56 56Thursday, June 23, 2011
Compal Electronics, Inc.
+VCC_CORE +VCC_GFXCORE
Socket Bottom
Socket Top
5 x 22 µF (0805)
5 x (0805) no-stuff
sites
7 x 22 µF (0805)
2 x (0805) no-stuff
sites
Below is 458544_CRV_PDDG_0.5 Table 5-8.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
+VCC_CORE
Charlie note: Vcore_Cout1
1.2.2uF*35 (SE00000888L)
2.22uF*25 (SE000008L80)
Vcore_Cout2
1.470uF 4.5m *4 (SGA00004X80) Charlie note:
iGfx_Cout1
1.22uF*6 (SE000000I10)
2.10uF*6 (SE000005T8L)
3.1uF*11 (SE000000K8L)
iGfx_Cout2
1.470uF 4.5m *2 (SGA00004200)
Charlie note:
+1.05V_RUN_VTT_1
3.1uF*26 (SE000000K8L)
4.10uF*10 (SE000005T8L)
+1.05V_RUN_VTT_2
5.330uF 6m *2 (SGA00001Q80)
PC1230
1U_0402_6.3V6K~D
PC1230
1U_0402_6.3V6K~D
12
PC1247
22U_0805_6.3VAM
PC1247
22U_0805_6.3VAM
1
2
+
PC1272
470U_D2_2VM_R4.5M
+
PC1272
470U_D2_2VM_R4.5M
1
2 3
PC1221
22U_0805_6.3VAM
PC1221
22U_0805_6.3VAM
1
2
PC1228
1U_0402_6.3V6K~D
PC1228
1U_0402_6.3V6K~D
12
PC1212
22U_0805_6.3V6M
PC1212
22U_0805_6.3V6M
1
2
PC1298
22U_0805_6.3VAM
PC1298
22U_0805_6.3VAM
1
2
PC1206
2.2U_0402_6.3V6M~D
PC1206
2.2U_0402_6.3V6M~D
12
PC1240
1U_0402_6.3V6K~D
PC1240
1U_0402_6.3V6K~D
12
PC1235
10U_0603_6.3V6M~D
PC1235
10U_0603_6.3V6M~D
12
PC1241
1U_0402_6.3V6K~D
PC1241
1U_0402_6.3V6K~D
12
PC1253
1U_0402_6.3V6K~D
PC1253
1U_0402_6.3V6K~D
12
PC1213
22U_0805_6.3V6M
PC1213
22U_0805_6.3V6M
1
2
PC1239
1U_0402_6.3V6K~D
PC1239
1U_0402_6.3V6K~D
12
PC1216
22U_0805_6.3V6M
PC1216
22U_0805_6.3V6M
1
2
PC1246
22U_0805_6.3VAM
PC1246
22U_0805_6.3VAM
1
2
PC1321
10U_0603_6.3V6M~D
PC1321
10U_0603_6.3V6M~D
12
PC1325
10U_0603_6.3V6M~D
PC1325
10U_0603_6.3V6M~D
12
PC1286
2.2U_0402_6.3V6M~D
PC1286
2.2U_0402_6.3V6M~D
12
PC1308
1U_0402_6.3V6K~D
PC1308
1U_0402_6.3V6K~D
12
PC1242
1U_0402_6.3V6K~D
PC1242
1U_0402_6.3V6K~D
12
PC1310
1U_0402_6.3V6K~D
PC1310
1U_0402_6.3V6K~D
12
PC1299
22U_0805_6.3VAM
PC1299
22U_0805_6.3VAM
1
2
PC1254
1U_0402_6.3V6K~D
PC1254
1U_0402_6.3V6K~D
12
PC1318
10U_0603_6.3V6M~D
PC1318
10U_0603_6.3V6M~D
12
PC1291
2.2U_0402_6.3V6M~D
PC1291
2.2U_0402_6.3V6M~D
12
PC1255
1U_0402_6.3V6K~D
PC1255
1U_0402_6.3V6K~D
12
PC1297
2.2U_0402_6.3V6M~D
PC1297
2.2U_0402_6.3V6M~D
12
PC1203
2.2U_0402_6.3V6M~D
PC1203
2.2U_0402_6.3V6M~D
12
PC1306
1U_0402_6.3V6K~D
PC1306
1U_0402_6.3V6K~D
12
PC1281
2.2U_0402_6.3V6M~D
PC1281
2.2U_0402_6.3V6M~D
12
PC1248
1U_0402_6.3V6K~D
PC1248
1U_0402_6.3V6K~D
12
PC1250
1U_0402_6.3V6K~D
PC1250
1U_0402_6.3V6K~D
12
PC1260
22U_0805_6.3VAM
PC1260
22U_0805_6.3VAM
1
2
PC1233
1U_0402_6.3V6K~D
PC1233
1U_0402_6.3V6K~D
12
PC1245
22U_0805_6.3VAM
PC1245
22U_0805_6.3VAM
1
2
PC1227
1U_0402_6.3V6K~D
PC1227
1U_0402_6.3V6K~D
12
PC1313
1U_0402_6.3V6K~D
PC1313
1U_0402_6.3V6K~D
12
PC1324
10U_0603_6.3V6M~D
PC1324
10U_0603_6.3V6M~D
12
PC1215
22U_0805_6.3V6M
PC1215
22U_0805_6.3V6M
1
2
PC1284
2.2U_0402_6.3V6M~D
PC1284
2.2U_0402_6.3V6M~D
12
PC1301
22U_0805_6.3VAM
PC1301
22U_0805_6.3VAM
1
2
PC1232
1U_0402_6.3V6K~D
PC1232
1U_0402_6.3V6K~D
12
PC1293
2.2U_0402_6.3V6M~D
PC1293
2.2U_0402_6.3V6M~D
12
PC1218
10U_0603_6.3V6M~D
PC1218
10U_0603_6.3V6M~D
12
PC1225
1U_0402_6.3V6K~D
PC1225
1U_0402_6.3V6K~D
12
PC1292
2.2U_0402_6.3V6M~D
PC1292
2.2U_0402_6.3V6M~D
12
PC1300
22U_0805_6.3VAM
PC1300
22U_0805_6.3VAM
1
2
+
PC1273
470U_D2_2VM_R4.5M
+
PC1273
470U_D2_2VM_R4.5M
1
2 3
PC1208
2.2U_0402_6.3V6M~D
PC1208
2.2U_0402_6.3V6M~D
12
+
PC1275
470U_D2_2VM_R4.5M
+
PC1275
470U_D2_2VM_R4.5M
1
2 3
PC1236
10U_0603_6.3V6M~D
PC1236
10U_0603_6.3V6M~D
12
+
PC1265
330U_X_2VM_R6M
+
PC1265
330U_X_2VM_R6M
1
2
PC1263
22U_0805_6.3VAM
PC1263
22U_0805_6.3VAM
1
2
PC1323
10U_0603_6.3V6M~D
PC1323
10U_0603_6.3V6M~D
12
+
PC1274
470U_D2_2VM_R4.5M
+
PC1274
470U_D2_2VM_R4.5M
1
2 3
PC1311
1U_0402_6.3V6K~D
PC1311
1U_0402_6.3V6K~D
12
PC1289
2.2U_0402_6.3V6M~D
PC1289
2.2U_0402_6.3V6M~D
12
PC1296
2.2U_0402_6.3V6M~D
PC1296
2.2U_0402_6.3V6M~D
12
PC1270
22U_0805_6.3VAM
PC1270
22U_0805_6.3VAM
1
2
PC1322
10U_0603_6.3V6M~D
PC1322
10U_0603_6.3V6M~D
12
PC1276
2.2U_0402_6.3V6M~D
PC1276
2.2U_0402_6.3V6M~D
12
PC1217
10U_0603_6.3V6M~D
PC1217
10U_0603_6.3V6M~D
12
+
PC1266
330U_X_2VM_R6M
+
PC1266
330U_X_2VM_R6M
1
2
PC1252
1U_0402_6.3V6K~D
PC1252
1U_0402_6.3V6K~D
12
+
PC1257
470U_D2_2VM_R4.5M
+
PC1257
470U_D2_2VM_R4.5M
1
2
PC1207
2.2U_0402_6.3V6M~D
PC1207
2.2U_0402_6.3V6M~D
12
PC1264
22U_0805_6.3VAM
PC1264
22U_0805_6.3VAM
1
2
PC1282
2.2U_0402_6.3V6M~D
PC1282
2.2U_0402_6.3V6M~D
12
PC1251
1U_0402_6.3V6K~D
PC1251
1U_0402_6.3V6K~D
12
PC1223
22U_0805_6.3VAM
PC1223
22U_0805_6.3VAM
1
2
PC1307
1U_0402_6.3V6K~D
PC1307
1U_0402_6.3V6K~D
12
PC1278
2.2U_0402_6.3V6M~D
PC1278
2.2U_0402_6.3V6M~D
12
PC1214
22U_0805_6.3V6M
PC1214
22U_0805_6.3V6M
1
2
PC1237
10U_0603_6.3V6M~D
PC1237
10U_0603_6.3V6M~D
12
PC1238
10U_0603_6.3V6M~D
PC1238
10U_0603_6.3V6M~D
12
PC1277
2.2U_0402_6.3V6M~D
PC1277
2.2U_0402_6.3V6M~D
12
PC1226
1U_0402_6.3V6K~D
PC1226
1U_0402_6.3V6K~D
12
PC1224
1U_0402_6.3V6K~D
PC1224
1U_0402_6.3V6K~D
12
PC1243
22U_0805_6.3VAM
PC1243
22U_0805_6.3VAM
1
2
PC1220
22U_0805_6.3VAM
PC1220
22U_0805_6.3VAM
1
2
PC1316
1U_0402_6.3V6K~D
PC1316
1U_0402_6.3V6K~D
12
PC1200
2.2U_0402_6.3V6M~D
PC1200
2.2U_0402_6.3V6M~D
12
PC1312
1U_0402_6.3V6K~D
PC1312
1U_0402_6.3V6K~D
12
PC1262
22U_0805_6.3VAM
PC1262
22U_0805_6.3VAM
1
2
PC1269
22U_0805_6.3VAM
PC1269
22U_0805_6.3VAM
1
2
PC1288
2.2U_0402_6.3V6M~D
PC1288
2.2U_0402_6.3V6M~D
12
PC1222
22U_0805_6.3VAM
PC1222
22U_0805_6.3VAM
1
2
PC1204
2.2U_0402_6.3V6M~D
PC1204
2.2U_0402_6.3V6M~D
12
PC1280
2.2U_0402_6.3V6M~D
PC1280
2.2U_0402_6.3V6M~D
12
PC1302
22U_0805_6.3VAM
PC1302
22U_0805_6.3VAM
1
2
PC1268
22U_0805_6.3VAM
PC1268
22U_0805_6.3VAM
1
2
PC1219
22U_0805_6.3VAM
PC1219
22U_0805_6.3VAM
1
2
PC1231
1U_0402_6.3V6K~D
PC1231
1U_0402_6.3V6K~D
12
PC1309
1U_0402_6.3V6K~D
PC1309
1U_0402_6.3V6K~D
12
PC1201
2.2U_0402_6.3V6M~D
PC1201
2.2U_0402_6.3V6M~D
12
PC1209
2.2U_0402_6.3V6M~D
PC1209
2.2U_0402_6.3V6M~D
12
PC1202
2.2U_0402_6.3V6M~D
PC1202
2.2U_0402_6.3V6M~D
12
PC1211
22U_0805_6.3V6M
PC1211
22U_0805_6.3V6M
1
2
PC1234
1U_0402_6.3V6K~D
PC1234
1U_0402_6.3V6K~D
12
PC1259
2.2U_0402_6.3V6M~D
PC1259
2.2U_0402_6.3V6M~D
12
PC1305
1U_0402_6.3V6K~D
PC1305
1U_0402_6.3V6K~D
12
PC1271
22U_0805_6.3VAM
PC1271
22U_0805_6.3VAM
1
2
+
PC1256
470U_D2_2VM_R4.5M
+
PC1256
470U_D2_2VM_R4.5M
1
2
PC1317
10U_0603_6.3V6M~D
PC1317
10U_0603_6.3V6M~D
12
PC1205
2.2U_0402_6.3V6M~D
PC1205
2.2U_0402_6.3V6M~D
12
PC1303
22U_0805_6.3VAM
PC1303
22U_0805_6.3VAM
1
2
PC1294
2.2U_0402_6.3V6M~D
PC1294
2.2U_0402_6.3V6M~D
12
PC1290
2.2U_0402_6.3V6M~D
PC1290
2.2U_0402_6.3V6M~D
12
PC1319
10U_0603_6.3V6M~D
PC1319
10U_0603_6.3V6M~D
12
PC1258
2.2U_0402_6.3V6M~D
PC1258
2.2U_0402_6.3V6M~D
12
PC1244
22U_0805_6.3VAM
PC1244
22U_0805_6.3VAM
1
2
PC1261
22U_0805_6.3VAM
PC1261
22U_0805_6.3VAM
1
2
PC1320
10U_0603_6.3V6M~D
PC1320
10U_0603_6.3V6M~D
12
PC1249
1U_0402_6.3V6K~D
PC1249
1U_0402_6.3V6K~D
12
PC1267
1U_0402_6.3V6K~D
PC1267
1U_0402_6.3V6K~D
12
PC1326
10U_0603_6.3V6M~D
PC1326
10U_0603_6.3V6M~D
12
PC1210
2.2U_0402_6.3V6M~D
PC1210
2.2U_0402_6.3V6M~D
12
PC1315
1U_0402_6.3V6K~D
PC1315
1U_0402_6.3V6K~D
12
PC1314
1U_0402_6.3V6K~D
PC1314
1U_0402_6.3V6K~D
12
PC1283
2.2U_0402_6.3V6M~D
PC1283
2.2U_0402_6.3V6M~D
12
PC1304
1U_0402_6.3V6K~D
PC1304
1U_0402_6.3V6K~D
12
PC1229
1U_0402_6.3V6K~D
PC1229
1U_0402_6.3V6K~D
12
PC1285
2.2U_0402_6.3V6M~D
PC1285
2.2U_0402_6.3V6M~D
12
PC1279
2.2U_0402_6.3V6M~D
PC1279
2.2U_0402_6.3V6M~D
12
PC1295
2.2U_0402_6.3V6M~D
PC1295
2.2U_0402_6.3V6M~D
12
PC1287
2.2U_0402_6.3V6M~D
PC1287
2.2U_0402_6.3V6M~D
12