Compal LA 8481P Schematics. Www.s Manuals.com. R1.0 Schematics

User Manual: Motherboard Compal LA-8481P Q3ZMC UMA - Schematics. Free.

Open the PDF directly: View PDF .
Page Count: 52

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Intel Ivy/Sandy Bridge SFF BGA 1023p Processor

/Panther Point 989p PCH

/ DDR3L Memory Down *8

Q3ZMC UMA M/B Schematics Document

REV:1.0(MP SMT)

Compal Confidential

2012-04-11

Model Name : Q3ZMC

File Name : LA-8481P

Compal Confidential

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Cover Page

Custom

1 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Cover Page

Custom

1 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Cover Page

Custom

1 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

page 23

HDMI Conn.

TMDS

100MHz

33MHz

100MHz

100MHz

1GB/s x4

DMI x4

100MHz

FDI x8

page 32

port 2

page 30

LPC

SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)

RTC CKT.

page 13

3.3V 24MHz

WLAN

PCI-Express x 8 (PCIE2.0 5GT/s)

Two Channel

2.7GT/s

Power On/Off CKT.

Touch Pad

LPC BUS

page 32

Processor

Int.KBD

USB 3.0 conn x2

ALC271X-VB6/ALC281X

DC/DC Interface CKT.

Ivy Bridge ULV

3.3V 48MHz

page 33

Fan Control

Power Circuit DC/DC

page 33

page 35

Intel

page 33

HDA Codec

Memory BUS(DDR3L)

PCH

HD Audio

page 34

page 4~10

Panther Point-M

page 33

ENE

KB930/KB9012

page 28

page 31

BGA1023

Intel

TPM

page 32

page 36~45

USBx14

page 13~21

Int. Speaker x 2 Phone Jack x 1

989pin BGA

page 33

EC ROM x1

@ for KB930

port 0

mSATA

page 29

DDR3L-ON BOARD

page 11,12

eDP Conn.

page 22

eDP

Card reader

page 22

port 1

120MHz

PCB

page 24~27

Thunderbolt

DP

page 24~27

Thunderbolt

port 5~8

page 32

Int. DMIC x 1

USB3.0 port 1,2

USB2.0 port 0,1

LS-8481P Audio/B

page 32

LS-8482P Card Reader/B

page 22

LS-8483P LED/B

page 32

1.35V DDR3L 1333Mhz

LS-8484P Battery/B

USB port 10

Camera

page 22

USB port 8

page 28

Bluetooth

USB port 9

Debug Port

page 31

USB port 12

page 28

mSATA

(Reserve)

D/B

SPI

page 13

SPI ROM x2

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Block Diagrams

Custom

2 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Block Diagrams

Custom

2 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Block Diagrams

Custom

2 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

ZZZ1

LA-8481P

DAZ0NS00100

ZZZ1

LA-8481P

DAZ0NS00100

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

USB 2.0 USB 1.1 Port 2 External

USB Port

Camera

BlueTooth

0

1

2

3

4

5

6

7

8

9

10

11

12

13

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

EHCI1

EHCI2

USB Port Table

Board ID / SKU ID Table for AD channel

BOARD ID Table

STATE SIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

Vcc 3.3V +/- 5%

100K +/- 5%Ra/Rc/Re

Board ID

Rb / Rd / Rf V min

0

1

2

3

0

8.2K +/- 5%

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

0.503 V

0.819 V

0.538 V

0.875 V

AD_BID

V typ

AD_BID

V

AD_BID

max

18K +/- 5%

33K +/- 5%

56K +/- 5%

100K +/- 5%

200K +/- 5%

3.300 V

0 V 0 V

4

5

6

7NC

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

1.185 V 1.264 V

Board ID

0

1

2

3

4

5

6

7

PCB Revision

0.1,

Voltage Rails

0.2

BTO Option Table

Unpop

BTO Item BOM Structure

ON

ON

ON

ON

ON

ON

ON ON

ON

ON

ON

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

LOW

LOW LOW LOW LOW

LOWLOWLOW

LOW

LOW

LOW

HIGH HIGH HIGH HIGH

HIGHHIGHHIGH

HIGH

HIGH

HIGH

0.3 DVT:unknown MCU+MKS Motor,With TB IC

1.0

On Board DRAM

@

Debug Port

mSATA(Reserve)

X76@

UMA UMA@

eDP@

LVDS@

eDP

LVDS

CONN@Connector

BOM Config

4319HNBOL01:UMA@/DDR3L@/eDP@/USB3.0@/9012@/TB@/IVB@/HM77@/DS3@/TXM@/TPM@/128@/

4319HNBOL02:UMA@/DDR3L@/eDP@/USB3.0@/9012@/TB@/IVB@/HM77@/DS3@/TXM@/TPM@

EC SM Bus1 address

Device

PCH SM Bus address

Device Address

Address Address

EC SM Bus2 address

Device

Smart Battery

0001 011X b

ChannelA

ChannelB

A0

A4

1010 000X

1010 010X

USB port (Rear side 3.0)

USB2.0@USB2.0 Conn

USB3.0 Conn USB3.0@

USB port (Rear side 3.0)

930@

9012@

TB@

DDR3@

DDR3L@

IVB@

HM77@

KB930

KB9012

Thunderbolt

DDR3

DDR3L

CPU

PCH

Normal S3

Deep S3

S3@

DS3@

128bit RAM 128@

TPM+TCM

TPM

TCM

TXM@

TPM@

TCM@

+1.5VS +1.5VSP to +1.5VS power rail for PCH

ON OFF OFF

ON ON OFF

ON OFF OFF

+0.675VS +0.675VSP to +0.675VS switched power rail for DDR3L terminator

+RTCVCC RTC power

+1.35VS

+1.8VS +3VALW to 1.8VS switched power rail for PCH

+3VS

+5VALW

+3VALW +3VALWP to +3VALW always on power rail

+VSB +VSBP to +VSB always on power rail for sequence control ON ON*

ONON

ON

ON

OFF

+1.35V to +1.35VS switched power rail

+CPU_CORE

VIN

B+

+1.05VS_VTT

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

+1.05VS_VTTP to +1.05VS_VTT switched power rail for CPU

ON

OFF

ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

ON

ON

ON ON*

OFF

OFF

ON ON*

+3VALW_PCH +3VALW to +3VALW_PCH power rail for PCH (Short Resistor) ON ON

S1 S3 S5

ON

N/A N/A N/A

N/AN/AN/A

Power Plane Description

OFF

+1.35VP to +1.35V power rail for DDR3L

OFF

+1.35V

ON OFF OFF+1.05VS_PCH +1.05VS_VTT to +1.05VS_PCH power for PCH

ON OFF OFF

ON OFF OFF

+VGFX_CORE Core voltage for UMA graphic ON OFF OFF

BATT+ Battery power supply (12.6V) N/A N/A N/A

ON*

+3VALW to +3VS power rail

+5VALWP to +5VALW always on power rail

+5VS +5VALW to +5VS switched power rail OFFON OFF

0.4 PVT1:PADAUK MCU+MKS Motor,Without TB IC

0.4 PVT2:PADAUK MCU+MKS Motor,With TB IC

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Notes List

Custom

3 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Notes List

Custom

3 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Notes List

Custom

3 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

PEG_ICOMPI and RCOMPO signals should be shorted and routed

with - max length = 500 mils - typical impedance = 43 mohms

PEG_ICOMPO signals should be routed with - max length = 500 mils-

typical impedance = 14.5 mohms

eDP_COMPIO and ICOMPO signals

should be shorted near balls and

routed with typical impedance

<25 mohms

should not be left floating

,even if disable eDP function...

ULV type P/N:

1.SA00005B000:S IC AV8063801057400 QBP7 K0 1.7G BGA

2.SA00005AZ30:S IC AV8063801057401 QBTP K0 1.5G BGA

Add eDP circuit

UMA only=>PEG NC

W=4mil,S=15mil,L=500mil

W=12mil,S=15mil,L=500mil

G1,W=12mil,S=15mil,L=500mil

G3,W=4mil,S=15mil,L=500mil

G4,W=4mil,S=15mil,L=500mil

EDP_COMP

PEG_COMP

EDP_HPD#

EDP_HPD#

DMI_CTX_PRX_P0<15>

DMI_CRX_PTX_P0<15>

DMI_CTX_PRX_N1<15>

DMI_CRX_PTX_N1<15>

DMI_CTX_PRX_P3<15>

DMI_CRX_PTX_P3<15>

DMI_CTX_PRX_P2<15>

DMI_CTX_PRX_N0<15>

DMI_CRX_PTX_N3<15>

DMI_CRX_PTX_P2<15>

DMI_CTX_PRX_N3<15>

DMI_CTX_PRX_P1<15>

DMI_CRX_PTX_N0<15>

DMI_CRX_PTX_N2<15>

DMI_CRX_PTX_P1<15>

DMI_CTX_PRX_N2<15>

FDI_CTX_PRX_N0<15>

FDI_CTX_PRX_N1<15>

FDI_CTX_PRX_N2<15>

FDI_CTX_PRX_N3<15>

FDI_CTX_PRX_N4<15>

FDI_CTX_PRX_N5<15>

FDI_CTX_PRX_N6<15>

FDI_CTX_PRX_N7<15>

FDI_CTX_PRX_P0<15>

FDI_CTX_PRX_P1<15>

FDI_CTX_PRX_P2<15>

FDI_CTX_PRX_P3<15>

FDI_CTX_PRX_P4<15>

FDI_CTX_PRX_P5<15>

FDI_CTX_PRX_P6<15>

FDI_CTX_PRX_P7<15>

FDI_FSYNC0<15>

FDI_FSYNC1<15>

FDI_INT<15>

FDI_LSYNC0<15>

FDI_LSYNC1<15>

EDP_HPD#<22>

EDP_TXP0<22>

EDP_TXP1<22>

EDP_TXN1<22>

EDP_TXN0<22>

EDP_AUXN<22>

EDP_AUXP<22>

+1.05VS_VTT

+1.05VS_VTT

+1.05VS_VTT

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(1/7) DMI,FDI,PEG

Custom

4 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(1/7) DMI,FDI,PEG

Custom

4 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(1/7) DMI,FDI,PEG

Custom

4 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R809

1K_0402_5%eDP@

R809

1K_0402_5%eDP@

12

R532

24.9_0402_1%

R532

24.9_0402_1%

12

PCI EXPRESS -- GRAPHICS

DMI Intel(R) FDI eDP

UCPU1A

IVY-BRIDGE_BGA1023

IVB@

PCI EXPRESS -- GRAPHICS

DMI Intel(R) FDI eDP

UCPU1A

IVY-BRIDGE_BGA1023

IVB@

DMI_RX#[0]

M2

DMI_RX#[1]

P6

DMI_RX#[2]

P1

DMI_RX#[3]

P10

DMI_RX[0]

N3

DMI_RX[1]

P7

DMI_RX[2]

P3

DMI_RX[3]

P11

DMI_TX#[0]

K1

DMI_TX#[1]

M8

DMI_TX#[2]

N4

DMI_TX#[3]

R2

DMI_TX[0]

K3

DMI_TX[1]

M7

DMI_TX[3]

T3 DMI_TX[2]

P4

FDI0_TX#[0]

U7

FDI0_TX#[1]

W11

FDI0_TX#[2]

W1

FDI0_TX#[3]

AA6

FDI1_TX#[0]

W6

FDI1_TX#[1]

V4

FDI1_TX#[2]

Y2

FDI1_TX#[3]

AC9

FDI0_TX[0]

U6

FDI0_TX[1]

W10

FDI0_TX[2]

W3

FDI0_TX[3]

AA7

FDI1_TX[0]

W7

FDI1_TX[1]

T4

FDI1_TX[2]

AA3

FDI1_TX[3]

AC8

FDI0_FSYNC

AA11

FDI1_FSYNC

AC12

FDI_INT

U11

FDI0_LSYNC

AA10

FDI1_LSYNC

AG8

PEG_ICOMPI G3

PEG_ICOMPO G1

PEG_RCOMPO G4

PEG_RX#[0] H22

PEG_RX#[1] J21

PEG_RX#[2] B22

PEG_RX#[3] D21

PEG_RX#[4] A19

PEG_RX#[5] D17

PEG_RX#[6] B14

PEG_RX#[7] D13

PEG_RX#[8] A11

PEG_RX#[9] B10

PEG_RX#[10] G8

PEG_RX#[11] A8

PEG_RX#[12] B6

PEG_RX#[13] H8

PEG_RX#[14] E5

PEG_RX#[15] K7

PEG_RX[0] K22

PEG_RX[1] K19

PEG_RX[2] C21

PEG_RX[3] D19

PEG_RX[4] C19

PEG_RX[5] D16

PEG_RX[6] C13

PEG_RX[7] D12

PEG_RX[8] C11

PEG_RX[9] C9

PEG_RX[10] F8

PEG_RX[11] C8

PEG_RX[12] C5

PEG_RX[13] H6

PEG_RX[14] F6

PEG_RX[15] K6

PEG_TX#[0] G22

PEG_TX#[1] C23

PEG_TX#[2] D23

PEG_TX#[3] F21

PEG_TX#[4] H19

PEG_TX#[5] C17

PEG_TX#[6] K15

PEG_TX#[7] F17

PEG_TX#[8] F14

PEG_TX#[9] A15

PEG_TX#[10] J14

PEG_TX#[11] H13

PEG_TX#[12] M10

PEG_TX#[13] F10

PEG_TX#[14] D9

PEG_TX#[15] J4

PEG_TX[0] F22

PEG_TX[1] A23

PEG_TX[2] D24

PEG_TX[3] E21

PEG_TX[4] G19

PEG_TX[5] B18

PEG_TX[6] K17

PEG_TX[7] G17

PEG_TX[8] E14

PEG_TX[9] C15

PEG_TX[10] K13

PEG_TX[11] G13

PEG_TX[12] K10

PEG_TX[13] G10

PEG_TX[14] D8

PEG_TX[15] K4

eDP_AUX

AF4 eDP_AUX#

AG4

eDP_TX[0]

AC1

eDP_TX[1]

AA4

eDP_TX[2]

AE10

eDP_TX[3]

AE6

eDP_COMPIO

AF3

eDP_HPD#

AG11 eDP_ICOMPO

AD2

eDP_TX#[0]

AC3

eDP_TX#[1]

AC4

eDP_TX#[2]

AE11

eDP_TX#[3]

AE7

R118

24.9_0402_1%

R118

24.9_0402_1%

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Buffered reset to CPU

Follow DG 1.2 & CRB1.0

Follow DG 1.2 & CRB1.0

PCH->CPU

UNCOREPWRGOOD: CORE OK

SM_DRAMPWROK:DRAM power ok

RESET#: ok CPU reset

CRB1.0 PH 1K +3VS

Check list 1.0 PH 5K +3VS

Check list 1.2 PH 10K +3VS

Debug port DG1.1-1.2 50~5K ohm

Follow DG 1.2 & CRB1.0 Checklist1.0 P.64 Processor Graphis Disable Guide

DIS only SKU or UMA eDP disable

DPLL_REF_SSCLK PD 1K_5% to GND

DPLL_REF_SSCLK# PH 1K_5% to +1.05VS_VTT

RESET#: ok CPU reset

Use open drain MOS:

+1.05VS_VTT PH pop 75ohm

series resister pop 43ohm

Use open drain MOS:

+1.35VS PH pop 200ohm

series resister pop 130ohm

Processor Pullups follow CRB1.0

XBOX

CPU

PROC_SELECT#

Future platforms,PH VCPLL and connect to PCH DF_TVS

SM_DRAMPWROK:DRAM power ok

UNCOREPWRGOOD: CPU_CORE OK

DDR3 Compensation Signals

Trace:10mil ,Spacing:13mil, Max.Length:500mil

For EMI

H_CPUPWRGD

XDP_TCK

XDP_TMS

XDP_TRST#

BUF_CPU_RST#

XDP_DBRESET#

CLK_CPU_DPLL#

CLK_CPU_DPLL

XDP_TDI

XDP_TDO

PM_DRAM_PWRGD_R

BUFO_CPU_RST#

PM_SYS_PWRGD_BUF

H_CPUPWRGD

CLK_CPU_DPLL#

CLK_CPU_DPLL

SM_RCOMP1

SM_RCOMP2

SM_RCOMP0

SM_DRAMRST#

H_PROCHOT#_RH_PROCHOT#

H_PECI

H_CATERR#

PM_DRAM_PWRGD_R

BUF_CPU_RST#

XDP_DBRESET#

SUSP

H_CPUPWRGD_R

PM_DRAM_PWRGD

PM_DRAM_PWRGD<15>

XDP_DBRESET# <15>

SYS_PWROK<15>

CLK_CPU_DMI# <14>

CLK_CPU_DMI <14>

CLK_CPU_DPLL# <14>

CLK_CPU_DPLL <14>

SM_DRAMRST# <6>

H_THRMTRIP#<18>

H_PROCHOT#<32>

H_PECI<18,32>

H_SNB_IVB#<17>

H_PM_SYNC<15>

PLT_RST#<17,22,24,30,32>

SUSP<35,40>

H_CPUPWRGD<18>

+3VALW

+3VS

+3VS

+1.05VS_VTT

+1.05VS_VTT

+1.35VS

+1.05VS_VTT

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(2/7) PM,XDP,CLK

Custom

5 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(2/7) PM,XDP,CLK

Custom

5 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(2/7) PM,XDP,CLK

Custom

5 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R80

0_0402_5%

@R80

0_0402_5%

@

1 2

C101

0.1U_0402_16V4Z

C101

0.1U_0402_16V4Z

1

2

R117 1K_0402_5%@R117 1K_0402_5%@12

R149 140_0402_1%R149 140_0402_1%

12

U5

MC74VHC1G09DFT2G_SC70-5

U5

MC74VHC1G09DFT2G_SC70-5

B

2

A

1Y4

P5

G

3

C102

100P_0201_25V8J

C102

100P_0201_25V8J

1 2

G

D

S

Q74

SSM3K7002FU_SC70-3

@

G

D

S

Q74

SSM3K7002FU_SC70-3

@

2

13

R220 62_0402_5%R220 62_0402_5%

12

C784 0.1U_0402_10V7K

@

C784 0.1U_0402_10V7K

@

12

C787

100P_0201_25V8J

C787

100P_0201_25V8J

1

2

R486 25.5_0402_1%R486 25.5_0402_1%

12

R216

56_0402_5%

R216

56_0402_5%

1 2

T3PAD@T3PAD@

R225

0_0402_5%

@

R225

0_0402_5%

@

12

R484 200_0402_1%R484 200_0402_1%

12

T4PAD@T4PAD@

R569 1K_0402_5%R569 1K_0402_5%

12

T2PAD@T2PAD@

CLOCKS

MISC THERMAL PWR MANAGEMENT

DDR3

MISC

JTAG & BPM

UCPU1B

IVY-BRIDGE_BGA1023

IVB@

CLOCKS

MISC THERMAL PWR MANAGEMENT

DDR3

MISC

JTAG & BPM

UCPU1B

IVY-BRIDGE_BGA1023

IVB@

SM_RCOMP[1] BE43

SM_RCOMP[2] BG43

SM_DRAMRST# AT30

SM_RCOMP[0] BF44

BCLK# H2

BCLK J3

DPLL_REF_CLK# AG1

DPLL_REF_CLK AG3

CATERR#

C49

PECI

A48

PROCHOT#

C45

THERMTRIP#

D45

SM_DRAMPWROK

BE45

RESET#

D44

PRDY# N53

PREQ# N55

TCK L56

TMS L55

TRST# J58

TDI M60

TDO L59

DBR# K58

BPM#[0] G58

BPM#[1] E55

BPM#[2] E59

BPM#[3] G55

BPM#[4] G59

BPM#[5] H60

BPM#[6] J59

BPM#[7] J61

PM_SYNC

C48

PROC_DETECT#

C57

PROC_SELECT#

F49

UNCOREPWRGOOD

B46

R226

75_0402_5%

R226

75_0402_5%

12

T5PAD@T5PAD@

T6PAD@T6PAD@

R829

@

39_0402_5%

R829

@

39_0402_5%

12

R227

43_0402_1%

R227

43_0402_1%

1 2

R223 10K_0402_5%R223 10K_0402_5%

12

C396

0.1U_0201_10V6K

C396

0.1U_0201_10V6K

1

2

R97 130_0402_5%R97 130_0402_5%

1 2

T1 PAD

@

T1 PAD

@

R88

200_0402_5%

R88

200_0402_5%

12

U15

SN74LVC1G07DCKR_SC70-5

U15

SN74LVC1G07DCKR_SC70-5

NC

1

A

2

G

3

Y4

P5

R116 1K_0402_5%@R116 1K_0402_5%@12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

CPU DIMM reset

S0

DRAMRST_CNTRL_PCH hgih ,MOS ON

SM_DRAMRST# HIGH,DDR3 DRAMRST# HIGH

Dimm not reset

S3

DRAMRST_CNTRL_PCH Low ,MOS OFF

SM_DRAMRST# Low,DDR3 DRAMRST# HIGH

Dimm not reset

S4,S5

DRAMRST_CNTRL_PCH Low ,MOS OFF

SM_DRAMRST# Low,DDR3 DRAMRST# Low

Dimm reset

Follow CRB1.0

Address 0~13:For 128*16

Address 0~14:For 256*16

Address 0~15:For 512*16

DDR_A_D63

DDR_A_D62

DDR_A_D8

DDR_A_D3

DDR_A_D4

DDR_A_D7

DDR_A_D5

DDR_A_D6

DDR_A_D59

DDR_A_D58

DDR_A_D57

DDR_A_D56

DDR_A_D47

DDR_A_D46

DDR_A_D42

DDR_A_D43

DDR_A_D34

DDR_A_D39

DDR_A_D44

DDR_A_D45

DDR_A_D35

DDR_A_D41

DDR_A_D40

DDR_A_D38

DDR_A_D36

DDR_A_D37

DDR_A_D32

DDR_A_D33

DDR_A_D61

DDR_A_D60

DDR_A_D2

DDR_A_D1

DDR_A_D0

DDR_A_D55

DDR_A_D54

DDR_A_D51

DDR_A_D48

DDR_A_D50

DDR_A_D49

DDR_A_D52

DDR_A_D53

DDR_A_D31

DDR_A_D14

DDR_A_D15

DDR_A_D25

DDR_A_D24

DDR_A_D26

DDR_A_D27

DDR_A_D30

DDR_A_D9

DDR_A_D13

DDR_A_D12

DDR_A_D10

DDR_A_D11

DDR_A_D29

DDR_A_D28

DDR_A_D19

DDR_A_D20

DDR_A_D16

DDR_A_D21

DDR_A_D17

DDR_A_D22

DDR_A_D18

DDR_A_D23

DDR_A_MA0

DDR_A_MA14

DDR_A_MA5

DDR_A_MA4

DDR_A_MA1

DDR_A_MA2

DDR_A_MA3

DDR_A_MA9

DDR_A_MA7

DDR_A_MA6

DDR_A_MA12

DDR_A_MA13

DDR_A_MA8

DDR_A_MA11

DDR_A_MA10

DIMM_DRAMRST#_RSM_DRAMRST#

DDR_A_CLK1

DDR_A_CLK1#

DDR_A_DQS#7

DDR_A_DQS#0

DDR_A_DQS#2

DDR_A_DQS#5

DDR_A_DQS#3

DDR_A_DQS#1

DDR_A_DQS#4

DDR_A_DQS#6

DDR_A_DQS0

DDR_A_DQS2

DDR_A_DQS1

DDR_A_DQS6

DDR_A_DQS5

DDR_A_DQS4

DDR_A_DQS3

DDR_A_DQS7

DDR_A_MA15

DDR_B_D33

DDR_B_D14

DDR_B_D42

DDR_B_D59

DDR_B_D63

DDR_B_D43

DDR_B_D55

DDR_B_D53

DDR_B_D29

DDR_B_D24

DDR_B_D34

DDR_B_D4

DDR_B_D26

DDR_B_D13

DDR_B_D10

DDR_B_D21

DDR_B_D11

DDR_B_D57

DDR_B_D44

DDR_B_D0

DDR_B_D7

DDR_B_D46

DDR_B_D3

DDR_B_D15

DDR_B_D27

DDR_B_D30

DDR_B_D35

DDR_B_D40

DDR_B_D49

DDR_B_D23

DDR_B_D25

DDR_B_D19

DDR_B_D37

DDR_B_D48

DDR_B_D36

DDR_B_D18

DDR_B_D8

DDR_B_D47

DDR_B_D9

DDR_B_D60

DDR_B_D50

DDR_B_D62

DDR_B_D52

DDR_B_D2

DDR_B_D51

DDR_B_D56

DDR_B_D39

DDR_B_D22

DDR_B_D28

DDR_B_D6

DDR_B_D45

DDR_B_D17

DDR_B_D58

DDR_B_D61

DDR_B_D31

DDR_B_D54

DDR_B_D1

DDR_B_D41

DDR_B_D5

DDR_B_D12

DDR_B_D20

DDR_B_D38

DDR_B_D32

DDR_B_D16

DDR_B_DQS#1

DDR_B_DQS#7

DDR_B_DQS#5

DDR_B_DQS#4

DDR_B_DQS#0

DDR_B_DQS#3

DDR_B_DQS#6

DDR_B_DQS#2

DDR_B_MA0

DDR_B_MA9

DDR_B_MA7

DDR_B_MA13

DDR_B_MA2

DDR_B_MA4

DDR_B_MA11

DDR_B_MA3

DDR_B_MA5

DDR_B_MA6

DDR_B_MA10

DDR_B_MA8

DDR_B_MA1

DDR_B_MA12

DDR_B_MA14

DDR_B_DQS7

DDR_B_DQS0

DDR_B_DQS1

DDR_B_DQS5

DDR_B_DQS4

DDR_B_DQS3

DDR_B_DQS2

DDR_B_DQS6

DDR_B_CLK1

DDR_B_CLK1#

DDR_B_MA15

DIMM_DRAMRST# SM_DRAMRST#

DDR_A_D[0..63]<11>

DDR_A_BS0<11>

DDR_A_BS1<11>

DDR_A_BS2<11>

DDR_A_WE#<11>

DDR_A_RAS#<11>

DDR_A_CAS#<11>

DIMM_DRAMRST# <11,12>

SM_DRAMRST#<5>

DDR_A_MA[0..15] <11>

DDR_A_CLK0 <11>

DDR_A_CLK0# <11>

DDR_A_CKE0 <11>

DDR_A_CS0# <11>

DDR_A_ODT0 <11>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_B_BS0<12>

DDR_B_BS1<12>

DDR_B_BS2<12>

DDR_B_D[0..63]<12>

DDR_B_WE#<12>

DDR_B_RAS#<12>

DDR_B_CAS#<12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_CS0# <12>

DDR_B_ODT0 <12>

DDR_B_MA[0..15] <12>

DDR_B_CLK0 <12>

DDR_B_CLK0# <12>

DDR_B_CKE0 <12>

DRAMRST_CNTRL_PCH<11,12,14>

DRAMRST_CNTRL_EC<32>

+1.35V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(3/7) DDRIII

Custom

6 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(3/7) DDRIII

Custom

6 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(3/7) DDRIII

Custom

6 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R413 0_0402_5%DS3@R413 0_0402_5%DS3@

1 2

G

D

S

Q6

BSS138-G_SOT23-3

G

D

S

Q6

BSS138-G_SOT23-3

2

13

R63

1K_0402_5%

R63

1K_0402_5%

1 2

C786

100P_0402_50V8J

C786

100P_0402_50V8J

1

2

R263

75_0402_1%

R263

75_0402_1%

12

C785

100P_0201_25V8J

C785

100P_0201_25V8J

1

2

R416

0_0402_5%

@

R416

0_0402_5%

@

1 2

R264

75_0402_1%

R264

75_0402_1%

12

R79

4.99K_0402_1%

R79

4.99K_0402_1%

1 2

C78

.047U_0402_16V7K

C78

.047U_0402_16V7K

1

2

R66

1K_0402_5%

R66

1K_0402_5%

12

DDR SYSTEM MEMORY B

UCPU1D

IVY-BRIDGE_BGA1023

IVB@

DDR SYSTEM MEMORY B

UCPU1D

IVY-BRIDGE_BGA1023

IVB@

SB_CK[0] BA34

SB_CK[1] BA36

SB_CK#[0] AY34

SB_CK#[1] BB36

SB_CKE[0] AR22

SB_CKE[1] BF27

SB_ODT[0] AT43

SB_ODT[1] BG47

SB_DQS[4] BE51

SB_DQS#[4] BG51

SB_DQS[5] BA61

SB_DQS#[5] BA59

SB_DQS[6] AR59

SB_DQS#[6] AT60

SB_DQS[7] AK61

SB_DQS#[7] AK59

SB_DQS[0] AM2

SB_DQS#[0] AL3

SB_DQS[1] AV1

SB_DQS#[1] AV3

SB_DQS[2] BE11

SB_DQS#[2] BG11

SB_DQS[3] BD18

SB_DQS#[3] BD17

SB_MA[0] BF32

SB_MA[1] BE33

SB_MA[2] BD33

SB_MA[3] AU30

SB_MA[4] BD30

SB_MA[5] AV30

SB_MA[6] BG30

SB_MA[7] BD29

SB_MA[8] BE30

SB_MA[9] BE28

SB_MA[10] BD43

SB_MA[11] AT28

SB_MA[12] AV28

SB_MA[13] BD46

SB_MA[14] AT26

SB_MA[15] AU22

SB_DQ[0]

AL4

SB_DQ[1]

AL1

SB_DQ[2]

AN3

SB_DQ[3]

AR4

SB_DQ[4]

AK4

SB_DQ[5]

AK3

SB_DQ[6]

AN4

SB_DQ[7]

AR1

SB_DQ[8]

AU4

SB_DQ[9]

AT2

SB_DQ[10]

AV4

SB_DQ[11]

BA4

SB_DQ[12]

AU3

SB_DQ[13]

AR3

SB_DQ[14]

AY2

SB_DQ[15]

BA3

SB_DQ[16]

BE9

SB_DQ[17]

BD9

SB_DQ[18]

BD13

SB_DQ[19]

BF12

SB_DQ[20]

BF8

SB_DQ[21]

BD10

SB_DQ[22]

BD14

SB_DQ[23]

BE13

SB_DQ[24]

BF16

SB_DQ[25]

BE17

SB_DQ[26]

BE18

SB_DQ[27]

BE21

SB_DQ[28]

BE14

SB_DQ[29]

BG14

SB_DQ[30]

BG18

SB_DQ[31]

BF19

SB_DQ[32]

BD50

SB_DQ[33]

BF48

SB_DQ[34]

BD53

SB_DQ[35]

BF52

SB_DQ[36]

BD49

SB_DQ[37]

BE49

SB_DQ[38]

BD54

SB_DQ[39]

BE53

SB_DQ[40]

BF56

SB_DQ[41]

BE57

SB_DQ[42]

BC59

SB_DQ[43]

AY60

SB_DQ[44]

BE54

SB_DQ[45]

BG54

SB_DQ[46]

BA58

SB_DQ[47]

AW59

SB_DQ[48]

AW58

SB_DQ[49]

AU58

SB_DQ[50]

AN61

SB_DQ[51]

AN59

SB_DQ[52]

AU59

SB_DQ[53]

AU61

SB_DQ[54]

AN58

SB_DQ[55]

AR58

SB_DQ[56]

AK58

SB_DQ[57]

AL58

SB_DQ[58]

AG58

SB_DQ[59]

AG59

SB_DQ[60]

AM60

SB_DQ[61]

AL59

SB_DQ[62]

AF61

SB_DQ[63]

AH60

SB_CS#[0] BE41

SB_CS#[1] BE47

SB_CAS#

AV43

SB_RAS#

BF40

SB_WE#

BD45

SB_BS[0]

BG39

SB_BS[1]

BD42

SB_BS[2]

AT22

DDR SYSTEM MEMORY A

UCPU1C

IVY-BRIDGE_BGA1023

IVB@

DDR SYSTEM MEMORY A

UCPU1C

IVY-BRIDGE_BGA1023

IVB@

SA_CK[0] AU36

SA_CK[1] AT40

SA_CK#[0] AV36

SA_CK#[1] AU40

SA_CKE[0] AY26

SA_CKE[1] BB26

SA_CS#[0] BB40

SA_CS#[1] BC41

SA_ODT[0] AY40

SA_ODT[1] BA41

SA_DQS[0] AJ11

SA_DQS#[0] AL11

SA_DQS[1] AR10

SA_DQS#[1] AR8

SA_DQS[2] AY11

SA_DQS#[2] AV11

SA_DQS[3] AU17

SA_DQS[4] AW45

SA_DQS#[4] AV45

SA_DQS[5] AV51

SA_DQS#[5] AY51

SA_DQS[6] AT56

SA_DQS#[6] AT55

SA_DQS[7] AK54

SA_DQS#[7] AK55

SA_MA[0] BG35

SA_MA[1] BB34

SA_MA[2] BE35

SA_MA[3] BD35

SA_MA[4] AT34

SA_MA[5] AU34

SA_MA[6] BB32

SA_MA[7] AT32

SA_MA[8] AY32

SA_MA[9] AV32

SA_MA[10] BE37

SA_MA[11] BA30

SA_MA[12] BC30

SA_MA[13] AW41

SA_MA[14] AY28

SA_MA[15] AU26

SA_DQ[0]

AG6

SA_DQ[1]

AJ6

SA_DQ[2]

AP11

SA_DQ[3]

AL6

SA_DQ[4]

AJ10

SA_DQ[5]

AJ8

SA_DQ[6]

AL8

SA_DQ[7]

AL7

SA_DQ[8]

AR11

SA_DQ[9]

AP6

SA_DQ[10]

AU6

SA_DQ[11]

AV9

SA_DQ[12]

AR6

SA_DQ[13]

AP8

SA_DQ[14]

AT13

SA_DQ[15]

AU13

SA_DQ[16]

BC7

SA_DQ[17]

BB7

SA_DQ[18]

BA13

SA_DQ[19]

BB11

SA_DQ[20]

BA7

SA_DQ[21]

BA9

SA_DQ[22]

BB9

SA_DQ[23]

AY13

SA_DQ[24]

AV14

SA_DQ[25]

AR14

SA_DQ[26]

AY17

SA_DQ[27]

AR19

SA_DQ[28]

BA14

SA_DQ[29]

AU14

SA_DQ[30]

BB14

SA_DQ[31]

BB17

SA_DQ[32]

BA45

SA_DQ[33]

AR43

SA_DQ[34]

AW48

SA_DQ[35]

BC48

SA_DQ[36]

BC45

SA_DQ[37]

AR45

SA_DQ[38]

AT48

SA_DQ[39]

AY48

SA_DQ[40]

BA49

SA_DQ[41]

AV49

SA_DQ[42]

BB51

SA_DQ[43]

AY53

SA_DQ[44]

BB49

SA_DQ[45]

AU49

SA_DQ[46]

BA53

SA_DQ[47]

BB55

SA_DQ[48]

BA55

SA_DQ[49]

AV56

SA_DQ[50]

AP50

SA_DQ[51]

AP53

SA_DQ[52]

AV54

SA_DQ[53]

AT54

SA_DQ[54]

AP56

SA_DQ[55]

AP52

SA_DQ[56]

AN57

SA_DQ[57]

AN53

SA_DQ[58]

AG56

SA_DQ[59]

AG53

SA_DQ[60]

AN55

SA_DQ[61]

AN52

SA_DQ[62]

AG55

SA_DQ[63]

AK56

SA_CAS#

BE39

SA_RAS#

BD39

SA_WE#

AT41

SA_BS[0]

BD37

SA_BS[1]

BF36

SA_BS[2]

BA28

SA_DQS#[3] AT17

R418 0_0402_5%R418 0_0402_5%

1 2

C788

100P_0402_50V8J

C788

100P_0402_50V8J

1

2

R78

0_0402_5%

@

R78

0_0402_5%

@

1 2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

These pins are for solder joint

reliability and non-critical to

function. For BGA only.

10: 2x8 PCI Express

PCIE Port Bifurcation Straps

CFG[6:5]

11: (Default) 1x16 PCI Express

CFG7

PEG DEFER TRAINING

0: PEG Wait for BIOS for training

1: (Default) PEG Train immediately following

xxRESETB de assertion

CFG4

eDP enable

0:Enable

1:Disable

CFG Straps for Processor

01: Reserved

00: 1x8,2x4 PCI Express

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

0:Lane Reversed

1: Normal Operation; Lane # definition matches

socket pin map definition

*

*

*

CRB1.0 P.12

Default "1",EDS R1.0 P.88

VAXG_VAL_SENSE

VSSAXG_VAL_SENSE

VAXG_VAL_SENSE

VCC_VAL_SENSE

VSS_VAL_SENSE

CFG2

CFG0

CFG4

CFG5

CFG6

CFG7

VSSAXG_VAL_SENSE

VCC_VAL_SENSE

VSS_VAL_SENSE

DC_TEST_C4_D3

DC_TEST_A59_C59

DC_TEST_A61_C61

DC_TEST_BE59_BE61

DC_TEST_BG59_BG61

DC_TEST_BE3_BG3

DC_TEST_BE1_BG1

CFG4

CFG6

CFG5

CFG2

CFG7

+VGFX_CORE

+CPU_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(4/7) RSVD,CFG

Custom

7 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(4/7) RSVD,CFG

Custom

7 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(4/7) RSVD,CFG

Custom

7 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R811

49.9_0402_1%

@

R811

49.9_0402_1%

@

1 2

T72 PAD @T72 PAD @

R810

49.9_0402_1%

@

R810

49.9_0402_1%

@

1 2

R812

49.9_0402_1%

@

R812

49.9_0402_1%

@

1 2

R224

1K_0402_1%@

R224

1K_0402_1%@

12

R204

1K_0402_1%

eDP@

R204

1K_0402_1%

eDP@

12

RESERVED

UCPU1E

IVY-BRIDGE_BGA1023

IVB@

RESERVED

UCPU1E

IVY-BRIDGE_BGA1023

IVB@

CFG[0]

B50

CFG[1]

C51

CFG[2]

B54

CFG[3]

D53

CFG[4]

A51

CFG[5]

C53

CFG[6]

C55

CFG[7]

H49

CFG[8]

A55

CFG[9]

H51

CFG[10]

K49

CFG[11]

K53

CFG[12]

F53

CFG[13]

G53

CFG[14]

L51

CFG[15]

F51

CFG[16]

D52

CFG[17]

L53

DC_TEST_A4 A4

DC_TEST_A58 A58

DC_TEST_A59 A59

DC_TEST_A61 A61

DC_TEST_BD1 BD1

DC_TEST_BD61 BD61

DC_TEST_BE1 BE1

DC_TEST_BE3 BE3

DC_TEST_BE59 BE59

DC_TEST_BE61 BE61

DC_TEST_BG1 BG1

DC_TEST_BG3 BG3

DC_TEST_BG4 BG4

DC_TEST_BG58 BG58

DC_TEST_BG59 BG59

DC_TEST_BG61 BG61

DC_TEST_C4 C4

DC_TEST_C59 C59

DC_TEST_C61 C61

DC_TEST_D1 D1

DC_TEST_D3 D3

DC_TEST_D61 D61

VCC_VAL_SENSE

H43

VSS_VAL_SENSE

K43

VAXG_VAL_SENSE

H45

VSSAXG_VAL_SENSE

K45

VCC_DIE_SENSE

F48

RSVD41 AH2

RSVD42 AG13

RSVD43 AM14

RSVD44 AM15

RSVD8

BA19

RSVD9

AV19

RSVD10

AT21

RSVD11

BB21

RSVD12

BB19

RSVD13

AY21

RSVD14

BA22

RSVD15

AY22

RSVD16

AU19

RSVD17

AU21

RSVD18

BD21

RSVD19

BD22

RSVD20

BD25

RSVD21

BD26

RSVD22

BG22

RSVD23

BE22

RSVD24

BG26

RSVD25

BE26

RSVD26

BF23

RSVD27

BE24

RSVD45 N50

RSVD30 N42

RSVD31 L42

RSVD32 L45

RSVD33 L47

RSVD34 M13

RSVD35 M14

RSVD36 U14

RSVD37 W14

RSVD38 P13

RSVD39 AT49

RSVD40 K24

RSVD6

H48

RSVD7

K48

BCLK_ITP N59

BCLK_ITP# N58

R234

1K_0402_1%

R234

1K_0402_1%

12

R230

1K_0402_1% @

R230

1K_0402_1% @

12

R813

49.9_0402_1%

@

R813

49.9_0402_1%

@

1 2

T56 PAD @T56 PAD @

R228

1K_0402_1%@

R228

1K_0402_1%@

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

8.5A

Should change to connect from

power cirucit & layout differential

with VCCIO_SENSE.

ULV SC/DC 33A

Place the PU,PD

resistors close to CPU

*

A19

VCCIO_SEL For 2012 CPU support

0: +1.0VS_VTT

1 : +1.05VS_VTT

INTEL Recommend VCC

3*330uF,12*22uF(0805),16*2.2uF(0402)

PD0.9

INTEL Recommend VCCIO

PD 0.9

330uF 1+1

10uF (0603) *5

1uF (0201) *16

330uF 1

10uF (0603) *5

1uF (0201) *10

Check List R1.5

VIDALERT#:75ohm ±5% pull-up to VCCIO close to IMVP7

VIDSCLK: 55ohm ±5% pull-up to VCCIO close to IMVP7

VIDSOUT: 130ohm ±5% pull-up to VCCIO close to CPU

130ohm ±5% pull-up to VCCIO close to IMVP7

Check List R1.5

VCCSENSE:100ohm ±1% pull-up to VCC near processor.

VSSSENSE:100ohm ±1% pull-down to GND near processor.

VSSIO_SENSE

VSSSENSE_R

VCCSENSE_R

H_CPU_SVIDALRT#

H_CPU_SVIDCLK

VCCIO_SEL_R

VCCIO_SEL

VCCIO_SENSE

H_CPU_SVIDDAT

VCCIO_SENSE <41>

VCCSENSE <43>

VSSSENSE <43>

VR_SVID_ALRT# <43>

VR_SVID_CLK <43>

VR_SVID_DAT <43>

+CPU_CORE

+1.05VS_VTT

+1.05VS_VTT

+CPU_CORE

+1.05VS_VTT

+3VALW

+1.05VS_VTT

+1.05VS_VTT

+1.05VS_VTT

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(5/7) PWR,BYPASS

Custom

8 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(5/7) PWR,BYPASS

Custom

8 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(5/7) PWR,BYPASS

Custom

8 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R588

100_0402_1%

R588

100_0402_1%

12

C951

1U_0201_4V6M

C951

1U_0201_4V6M

12

R576 43_0402_1%R576 43_0402_1%

1 2

R581 0_0402_5%@R581 0_0402_5%@

1 2

R574

130_0402_5%

R574

130_0402_5%

12

R105

10_0402_5%

R105

10_0402_5%

12

R589

100_0402_1%

R589

100_0402_1%

12

R577 0_0402_5%@R577 0_0402_5%@

1 2

R520

10K_0402_5% @

R520

10K_0402_5% @

12

POWER

CORE SUPPLY

PEG IO AND DDR IO

SENSE LINES SVID QUIET

RAILS

UCPU1F

IVY-BRIDGE_BGA1023

IVB@

POWER

CORE SUPPLY

PEG IO AND DDR IO

SENSE LINES SVID QUIET

RAILS

UCPU1F

IVY-BRIDGE_BGA1023

IVB@

VCC_SENSE F43

VSS_SENSE G43

VIDALERT# A44

VIDSCLK B43

VIDSOUT C44

VSS_SENSE_VCCIO AN17

VCC[1]

A26

VCC[2]

A29

VCC[3]

A31

VCC[4]

A34

VCC[5]

A35

VCC[6]

A38

VCC[7]

A39

VCC[8]

A42

VCC[9]

C26

VCC[10]

C27

VCC[11]

C32

VCC[12]

C34

VCC[13]

C37

VCC[14]

C39

VCC[15]

C42

VCC[16]

D27

VCC[17]

D32

VCC[18]

D34

VCC[19]

D37

VCC[20]

D39

VCC[21]

D42

VCC[22]

E26

VCC[23]

E28

VCC[24]

E32

VCC[25]

E34

VCC[26]

E37

VCC[27]

E38

VCC[28]

F25

VCC[29]

F26

VCC[30]

F28

VCC[31]

F32

VCC[32]

F34

VCC[33]

F37

VCC[34]

F38

VCC[35]

F42

VCC[36]

G42

VCC[37]

H25

VCC[38]

H26

VCC[39]

H28

VCC[40]

H29

VCC[41]

H32

VCC[42]

H34

VCC[43]

H35

VCC[44]

H37

VCC[45]

H38

VCC[46]

H40

VCC[47]

J25

VCC[48]

J26

VCC[49]

J28

VCC[50]

J29

VCC[51]

J32

VCC[52]

J34

VCC[53]

J35

VCC[54]

J37

VCC[55]

J38

VCC[56]

J40

VCC[57]

J42

VCC[58]

K26

VCC[59]

K27

VCC[60]

K29

VCC[61]

K32

VCC[62]

K34

VCC[63]

K35

VCC[64]

K37

VCC[66]

K39

VCC[67]

K42

VCC[68]

L25

VCC[69]

L28

VCC[70]

L33

VCC[71]

L36

VCC[72]

L40

VCC[73]

N26

VCC[74]

N30

VCC[75]

N34

VCC[76]

N38

VCCIO[1] AF46

VCCIO[3] AG48

VCCIO[4] AG50

VCCIO[5] AG51

VCCIO[6] AJ17

VCCIO[7] AJ21

VCCIO[8] AJ25

VCCIO[9] AJ43

VCCIO[10] AJ47

VCCIO[11] AK50

VCCIO[12] AK51

VCCIO[13] AL14

VCCIO[14] AL15

VCCIO[15] AL16

VCCIO[16] AL20

VCCIO[17] AL22

VCCIO[18] AL26

VCCIO[19] AL45

VCCIO[20] AL48

VCCIO[21] AM16

VCCIO[22] AM17

VCCIO[23] AM21

VCCIO[24] AM43

VCCIO[25] AM47

VCCIO[26] AN20

VCCIO[27] AN42

VCCIO[28] AN45

VCCIO[29] AN48

VCCIO[30] AA14

VCCIO[31] AA15

VCCIO[32] AB17

VCCIO[33] AB20

VCCIO[34] AC13

VCCIO[35] AD16

VCCIO[36] AD18

VCCIO[37] AD21

VCCIO[38] AE14

VCCIO[39] AE15

VCCIO[40] AF16

VCCIO[41] AF18

VCCIO[42] AF20

VCCIO[43] AG15

VCCIO[44] AG16

VCCIO[45] AG17

VCCIO[46] AG20

VCCIO[47] AG21

VCCIO[48] AJ14

VCCIO[49] AJ15

VCCIO50 W16

VCCIO51 W17

VCCPQE[1] AM25

VCCPQE[2] AN22

VCCIO_SENSE AN16

VCCIO_SEL BC22

R107 10_0402_5%R107 10_0402_5%

1 2

R579 0_0402_5%@R579 0_0402_5%@

1 2

R578 0_0402_5%@R578 0_0402_5%@

1 2

R582 0_0402_5%@R582 0_0402_5%@

1 2

R521

10K_0402_5%

R521

10K_0402_5%

1 2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

ULV SC/DC GT1: 18A

GT2: 33A

INTEL Recommend VCCPLL

1*330uF,2*1uF(0402)

PD 0.9

VCCSA_VID

For 2012 future CPU

VCCSA voltage select

5A

6A

CPU EDS1.3 P.93

VCCSA_VID0 Must PD

1.2A

1

SNB IVB

0

0

0 X1

1 1

V

V V

V

V

VX

Vout

0.9V

0.8V

0.725V

VCCSA

VID0

0.675V

VID1

0

INTEL Recommend VAXG

2*330uF,5*22uF(0805),6*10uF(0603),6*1uF(0402)

PD 0.9

INTEL Recommend VDDQ

1*330uF,8*10uF(0603) ,10*1uF(0402)

PD0.9

INTEL Recommend VCCSA

1*330uF,5*10uF(0603) ,5*1uF(0402)

PD0.9

+V_SM_VREF should

have 20 mil trace width

Place BOT OUT Conn

Short for +1.35VS to +1.35V_CPU_VDDQ

SA_DIMM_VREFDQ

SB_DIMM_VREFDQ

For Future CPU M3 support,

Sandey bridge not support M3,

Check list1.0 & CRB say can NC

ULV

0.85V V

V

V

V

Check List R1.5

VCCAXG_SENSE:100ohm ±5% pull-up to VCC near processor.

VSSAXG_SENSE:100ohm ±5% pull-down to GND near processor.

+1.8VS_VCCPLL

H_VCCSA_VID0

H_VCCSA_VID1

+V_SM_VREF

SA_DIMM_VREFDQ

SB_DIMM_VREFDQ

+VCCSA

VCCSA_SENSE <42>

VCC_AXG_SENSE<43>

VSS_AXG_SENSE<43>

H_VCCSA_VID1 <42>

H_VCCSA_VID0 <42>

SA_DIMM_VREFDQ <11>

SB_DIMM_VREFDQ <12>

+VGFX_CORE

+VCCSA

+1.8VS

+1.35VS

+1.35VS

+1.35VS

+VGFX_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(6/7) PWR

Custom

9 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(6/7) PWR

Custom

9 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(6/7) PWR

Custom

9 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

C981

1U_0201_4V6M

C981

1U_0201_4V6M

12

R69

1K_0402_1%

@

R69

1K_0402_1%

@

12

C988

1U_0201_4V6M

C988

1U_0201_4V6M

12

C980

1U_0201_4V6M

C980

1U_0201_4V6M

12

C979

1U_0201_4V6M

C979

1U_0201_4V6M

12

C991

1U_0201_4V6M

C991

1U_0201_4V6M

12

C984

1U_0201_4V6M

C984

1U_0201_4V6M

12

C990

10U_0603_6.3V6M

C990

10U_0603_6.3V6M

12

C997

10U_0603_6.3V6M

C997

10U_0603_6.3V6M

12

R381

100_0402_5%

R381

100_0402_5%

1 2

C986

0.1U_0201_10V6K

C986

0.1U_0201_10V6K

12

R396

100_0402_5%

R396

100_0402_5%

1 2

C985

1U_0201_4V6M

C985

1U_0201_4V6M

12

C970

10U_0603_6.3V6M

C970

10U_0603_6.3V6M

12

C994

0.1U_0201_10V6K

C994

0.1U_0201_10V6K

12

C996

10U_0603_6.3V6M

C996

10U_0603_6.3V6M

12

C987

10U_0603_6.3V6M

C987

10U_0603_6.3V6M

12

C999

1U_0201_4V6M

C999

1U_0201_4V6M

12

C1002

0.1U_0201_10V6K

C1002

0.1U_0201_10V6K

12

+

C606

220U_B2_2.5VM_R15M

SGA00004I00

+

C606

220U_B2_2.5VM_R15M

SGA00004I00

1

2

C1179

1U_0201_4V6M

C1179

1U_0201_4V6M

12

C1006

0.1U_0201_10V6K

C1006

0.1U_0201_10V6K

12

C995

10U_0603_6.3V6M

C995

10U_0603_6.3V6M

12

R540

1K_0402_5%

R540

1K_0402_5%

12

C998

1U_0201_4V6M

C998

1U_0201_4V6M

12

C983

1U_0201_4V6M

C983

1U_0201_4V6M

12

C1007

0.1U_0201_10V6K

C1007

0.1U_0201_10V6K

12

C583

1U_0201_4V6M

C583

1U_0201_4V6M

1

2

C647

0.1U_0201_10V6K

C647

0.1U_0201_10V6K

1

2

C1180

1U_0201_4V6M

C1180

1U_0201_4V6M

12

+

C599

330U_B2_2VM_R15M

SGA00004400

+

C599

330U_B2_2VM_R15M

SGA00004400

1

2

C978

1U_0201_4V6M

C978

1U_0201_4V6M

12

C1008

0.1U_0201_10V6K

C1008

0.1U_0201_10V6K

12

R129

0_0402_5%

@

R129

0_0402_5%

@

12

C584

1U_0201_4V6M

C584

1U_0201_4V6M

1

2

C992

0.1U_0201_10V6K

C992

0.1U_0201_10V6K

12

C1181

1U_0201_4V6M

C1181

1U_0201_4V6M

12

C982

1U_0201_4V6M

C982

1U_0201_4V6M

12

C1009

0.1U_0201_10V6K

C1009

0.1U_0201_10V6K

12

R534

1K_0402_5%

R534

1K_0402_5%

12

C989

10U_0603_6.3V6M

C989

10U_0603_6.3V6M

12

C977

1U_0201_4V6M

C977

1U_0201_4V6M

12

C1010

0.1U_0201_10V6K

C1010

0.1U_0201_10V6K

12

R477

0_0805_5%

R477

0_0805_5%

1 2

R68

1K_0402_1%

@

R68

1K_0402_1%

@

12

C993

0.1U_0201_10V6K

C993

0.1U_0201_10V6K

12

POWER

GRAPHICS

DDR3 - 1.5V RAILS

1.8V RAIL

SENSE

LINES

SA RAIL

SENSE LINES

QUIET RAILS

VREF

VCCSA VID

lines

UCPU1G

IVY-BRIDGE_BGA1023

IVB@

POWER

GRAPHICS

DDR3 - 1.5V RAILS

1.8V RAIL

SENSE

LINES

SA RAIL

SENSE LINES

QUIET RAILS

VREF

VCCSA VID

lines

UCPU1G

IVY-BRIDGE_BGA1023

IVB@

SM_VREF AY43

VAXG[1]

AA46

VAXG[2]

AB47

VAXG[3]

AB50

VAXG[4]

AB51

VAXG[5]

AB52

VAXG[6]

AB53

VAXG[7]

AB55

VAXG[8]

AB56

VAXG[9]

AB58

VAXG[10]

AB59

VAXG[11]

AC61

VAXG[12]

AD47

VAXG[13]

AD48

VAXG[14]

AD50

VAXG[15]

AD51

VAXG[16]

AD52

VAXG[17]

AD53

VAXG[18]

AD55

VAXG[19]

AD56

VAXG[20]

AD58

VAXG[21]

AD59

VAXG[22]

AE46

VAXG[23]

N45

VAXG[24]

P47

VAXG[25]

P48

VAXG[26]

P50

VAXG[27]

P51

VAXG[28]

P52

VAXG[29]

P53

VAXG[30]

P55

VAXG[31]

P56

VAXG[32]

P61

VAXG[33]

T48

VAXG[34]

T58

VAXG[35]

T59

VAXG[36]

T61

VAXG[37]

U46

VAXG[38]

V47

VAXG[39]

V48

VAXG[40]

V50

VAXG[41]

V51

VAXG[42]

V52

VAXG[43]

V53

VAXG[44]

V55

VAXG[45]

V56

VAXG[46]

V58

VAXG[47]

V59

VAXG[48]

W50

VAXG[49]

W51

VAXG[50]

W52

VAXG[51]

W53

VAXG[52]

W55

VAXG[53]

W56

VAXG[54]

W61

VDDQ[11] AM40

VDDQ[12] AN30

VDDQ[13] AN34

VDDQ[14] AN38

VDDQ[15] AR26

VDDQ[1] AJ28

VDDQ[2] AJ33

VDDQ[3] AJ36

VDDQ[4] AJ40

VDDQ[5] AL30

VDDQ[6] AL34

VDDQ[7] AL38

VDDQ[8] AL42

VDDQ[9] AM33

VDDQ[10] AM36

VCCPLL[1]

BB3

VCCPLL[2]

BC1

VCCSA_SENSE U10

VCCSA_VID[1] D49

VAXG[55]

Y48

VAXG[56]

Y61

VCCPLL[3]

BC4

VAXG_SENSE

F45

VSSAXG_SENSE

G45

VCCSA[1]

L17

VCCSA[10]

R21

VCCSA[12]

V16

VCCSA[13]

V17

VCCSA[14]

V18

VCCSA[4]

N20

VCCSA[5]

N22

VCCSA[6]

P17

VCCSA[9]

R18

VDDQ[16] AR28

VDDQ[17] AR30

VDDQ[18] AR32

VDDQ[19] AR34

VDDQ[20] AR36

VDDQ[21] AR40

VDDQ[22] AV41

VDDQ[23] AW26

VDDQ[24] BA40

VDDQ[25] BB28

VDDQ[26] BG33

VCCSA[11]

U15

VCCSA[15]

V21

VCCSA[16]

W20

VCCSA[2]

L21

VCCSA[3]

N16

VCCDQ[1] AM28

VCCDQ[2] AN26

VCCSA[7]

P20

VCCSA[8]

R16

VDDQ_SENSE BC43

VSS_SENSE_VDDQ BA43

VCCSA_VID[0] D48

SA_DIMM_VREFDQ BE7

SB_DIMM_VREFDQ BG7

+

C607

330U_B2_2VM_R15M

SGA00004400

+

C607

330U_B2_2VM_R15M

SGA00004400

1

2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

CR CheckList Rev1.5

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(7/7) VSS

Custom

10 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(7/7) VSS

Custom

10 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PROCESSOR(7/7) VSS

Custom

10 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

T58PAD@T58PAD@

T63PAD@T63PAD@

T59PAD@T59PAD@

T64PAD@T64PAD@

T68PAD@T68PAD@

VSS

NCTF

UCPU1I

IVY-BRIDGE_BGA1023

IVB@

VSS

NCTF

UCPU1I

IVY-BRIDGE_BGA1023

IVB@

VSS[181]

BG17

VSS[182]

BG21

VSS[183]

BG24

VSS[184]

BG28

VSS[185]

BG37

VSS[186]

BG41

VSS[187]

BG45

VSS[188]

BG49

VSS[189]

BG53

VSS[190]

BG9

VSS[191]

C29

VSS[192]

C35

VSS[193]

C40

VSS[194]

D10

VSS[195]

D14

VSS[196]

D18

VSS[197]

D22

VSS[198]

D26

VSS[199]

D29

VSS[200]

D35

VSS[201]

D4

VSS[202]

D40

VSS[203]

D43

VSS[204]

D46

VSS[205]

D50

VSS[206]

D54

VSS[207]

D58

VSS[208]

D6

VSS[209]

E25

VSS[210]

E29

VSS[211]

E3

VSS[212]

E35

VSS[213]

E40

VSS[214]

F13

VSS[215]

F15

VSS[216]

F19

VSS[217]

F29

VSS[218]

F35

VSS[219]

F40

VSS[220]

F55

VSS[221]

G51

VSS[222]

G6

VSS[223]

G61

VSS[224]

H10

VSS[225]

H14

VSS[226]

H17

VSS[227]

H21

VSS[228]

H4

VSS[229]

H53

VSS[230]

H58

VSS[231]

J1

VSS[232]

J49

VSS[233]

J55

VSS[234]

K11

VSS[235]

K21

VSS[236]

K51

VSS[237]

K8

VSS[238]

L16

VSS[239]

L20

VSS[240]

L22

VSS[241]

L26

VSS[242]

L30

VSS[243]

L34

VSS[244]

L38

VSS[245]

L43

VSS[246]

L48

VSS[268] P14

VSS[269] P16

VSS[270] P18

VSS[271] P21

VSS[272] P58

VSS[273] P59

VSS[274] P9

VSS[275] R17

VSS[276] R20

VSS[277] R4

VSS[278] R46

VSS[279] T1

VSS[280] T47

VSS[281] T50

VSS[282] T51

VSS[283] T52

VSS[284] T53

VSS[285] T55

VSS[286] T56

VSS[287] U13

VSS[288] U8

VSS[289] V20

VSS[290] V61

VSS_NCTF_1 A5

VSS_NCTF_2 A57

VSS_NCTF_3 BC61

VSS_NCTF_4 BD3

VSS_NCTF_5 BD59

VSS_NCTF_6 BE4

VSS_NCTF_7 BE58

VSS_NCTF_8 BG5

VSS_NCTF_9 BG57

VSS_NCTF_10 C3

VSS_NCTF_11 C58

VSS_NCTF_12 D59

VSS_NCTF_13 E1

VSS_NCTF_14 E61

VSS[250] M4

VSS[251] M58

VSS[252] M6

VSS[253] N1

VSS[254] N17

VSS[255] N21

VSS[256] N25

VSS[257] N28

VSS[258] N33

VSS[259] N36

VSS[260] N40

VSS[261] N43

VSS[262] N47

VSS[263] N48

VSS[264] N51

VSS[265] N52

VSS[266] N56

VSS[267] N61

VSS[247]

L61

VSS[248]

M11

VSS[291] W13

VSS[292] W15

VSS[293] W18

VSS[294] W21

VSS[295] W46

VSS[296] W8

VSS[297] Y4

VSS[298] Y47

VSS[299] Y58

VSS[300] Y59

VSS[249]

M15

VSS[301] G48

T60PAD@T60PAD@

T69PAD@T69PAD@

T65PAD@T65PAD@

T70PAD@T70PAD@

T61PAD@T61PAD@

T71PAD@T71PAD@

T66PAD@T66PAD@

T67PAD@T67PAD@

T62PAD@T62PAD@

VSS

UCPU1H

IVY-BRIDGE_BGA1023

IVB@

VSS

UCPU1H

IVY-BRIDGE_BGA1023

IVB@

VSS[1]

A13

VSS[2]

A17

VSS[3]

A21

VSS[4]

A25

VSS[5]

A28

VSS[6]

A33

VSS[7]

A37

VSS[8]

A40

VSS[9]

A45

VSS[10]

A49

VSS[11]

A53

VSS[12]

A9

VSS[13]

AA1

VSS[14]

AA13

VSS[15]

AA50

VSS[16]

AA51

VSS[17]

AA52

VSS[18]

AA53

VSS[19]

AA55

VSS[20]

AA56

VSS[21]

AA8

VSS[22]

AB16

VSS[23]

AB18

VSS[24]

AB21

VSS[25]

AB48

VSS[26]

AB61

VSS[27]

AC10

VSS[28]

AC14

VSS[29]

AC46

VSS[30]

AC6

VSS[31]

AD17

VSS[32]

AD20

VSS[33]

AD4

VSS[34]

AD61

VSS[35]

AE13

VSS[36]

AE8

VSS[37]

AF1

VSS[38]

AF17

VSS[39]

AF21

VSS[40]

AF47

VSS[41]

AF48

VSS[42]

AF50

VSS[43]

AF51

VSS[44]

AF52

VSS[45]

AF53

VSS[46]

AF55

VSS[47]

AF56

VSS[48]

AF58

VSS[49]

AF59

VSS[50]

AG10

VSS[51]

AG14

VSS[52]

AG18

VSS[53]

AG47

VSS[54]

AG52

VSS[55]

AG61

VSS[56]

AG7

VSS[57]

AH4

VSS[58]

AH58

VSS[59]

AJ13

VSS[60]

AJ16

VSS[61]

AJ20

VSS[62]

AJ22

VSS[63]

AJ26

VSS[64]

AJ30

VSS[65]

AJ34

VSS[66]

AJ38

VSS[67]

AJ42

VSS[68]

AJ45

VSS[69]

AJ48

VSS[70]

AJ7

VSS[71]

AK1

VSS[72]

AK52

VSS[73]

AL10

VSS[74]

AL13

VSS[75]

AL17

VSS[76]

AL21

VSS[77]

AL25

VSS[78]

AL28

VSS[79]

AL33

VSS[80]

AL36

VSS[81]

AL40

VSS[82]

AL43

VSS[83]

AL47

VSS[84]

AL61

VSS[85]

AM13

VSS[86]

AM20

VSS[87]

AM22

VSS[88]

AM26

VSS[89]

AM30

VSS[90]

AM34

VSS[91] AM38

VSS[92] AM4

VSS[93] AM42

VSS[94] AM45

VSS[95] AM48

VSS[96] AM58

VSS[97] AN1

VSS[98] AN21

VSS[99] AN25

VSS[100] AN28

VSS[101] AN33

VSS[102] AN36

VSS[103] AN40

VSS[104] AN43

VSS[105] AN47

VSS[106] AN50

VSS[107] AN54

VSS[108] AP10

VSS[109] AP51

VSS[110] AP55

VSS[111] AP7

VSS[112] AR13

VSS[113] AR17

VSS[114] AR21

VSS[115] AR41

VSS[116] AR48

VSS[117] AR61

VSS[118] AR7

VSS[119] AT14

VSS[120] AT19

VSS[121] AT36

VSS[122] AT4

VSS[123] AT45

VSS[124] AT52

VSS[125] AT58

VSS[126] AU1

VSS[127] AU11

VSS[128] AU28

VSS[129] AU32

VSS[130] AU51

VSS[131] AU7

VSS[132] AV17

VSS[133] AV21

VSS[134] AV22

VSS[135] AV34

VSS[136] AV40

VSS[137] AV48

VSS[138] AV55

VSS[139] AW13

VSS[140] AW43

VSS[141] AW61

VSS[142] AW7

VSS[143] AY14

VSS[144] AY19

VSS[145] AY30

VSS[146] AY36

VSS[147] AY4

VSS[148] AY41

VSS[149] AY45

VSS[150] AY49

VSS[151] AY55

VSS[152] AY58

VSS[153] AY9

VSS[154] BA1

VSS[155] BA11

VSS[156] BA17

VSS[157] BA21

VSS[158] BA26

VSS[159] BA32

VSS[160] BA48

VSS[161] BA51

VSS[162] BB53

VSS[163] BC13

VSS[164] BC5

VSS[165] BC57

VSS[166] BD12

VSS[167] BD16

VSS[168] BD19

VSS[169] BD23

VSS[170] BD27

VSS[171] BD32

VSS[172] BD36

VSS[173] BD40

VSS[174] BD44

VSS[175] BD48

VSS[176] BD52

VSS[177] BD56

VSS[178] BD8

VSS[179] BE5

VSS[180] BG13

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Layout Note:

Place near each memory part

M3 support

SA00003PU00

S IC W83L771AWG-2 TSSOP 8P SENSOR

External DDR Thermal Sensor

DDR3 CLK Termination

1.CAD Note: Cterm= 1.6pF should be kept

near feeding point of first SDRAM

2.CAD Note: Rtt= 30.1ohms, Ctt= 0.1uF

should be kept within 600mils from last SDRAM

END topology

Channel A

DDR3 CTL/ADD Termination

near U56 near U57 near U58 near U59

Delete U70 SPD EEROM circuit

SA00004KS00

S IC EE 2K AT24C02C-XHM-T TSSOP 8P

DDR_A_MA14

DDR_A_CS0#

DIMM_DRAMRST#

DDR_A_WE#

DDR_A_CAS#

DDR_A_RAS#

DDR_A_BS0

DDR_A_BS2

DDR_A_BS1

DDR_A_MA1

DDR_A_MA12

DDR_A_MA10

DDR_A_MA9

DDR_A_MA8

DDR_A_MA5

DDR_A_MA3

DDR_A_MA6

DDR_A_MA4

DDR_A_MA0

DDR_A_MA2

DDR_A_MA13

DDR_A_MA11

DDR_A_MA7

DDR_A_CLK0

DDR_A_ODT0

DDR_A_CKE0

DDR_A_CLK0#

DDR_A_MA14

DIMM_DRAMRST#

DDR_A_CS0#

DDR_A_BS0

DDR_A_RAS#

DDR_A_CAS#

DDR_A_WE#

DDR_A_BS2

DDR_A_MA10

DDR_A_MA12

DDR_A_MA1

DDR_A_BS1

DDR_A_MA9

DDR_A_MA4

DDR_A_MA6

DDR_A_MA3

DDR_A_MA5

DDR_A_MA8

DDR_A_MA0

DDR_A_MA7

DDR_A_MA11

DDR_A_MA13

DDR_A_MA2

DDR_A_CLK0

DDR_A_CKE0

DDR_A_ODT0

DDR_A_CLK0#

DDR_A_MA14

DDR_A_CS0#

DIMM_DRAMRST#

DDR_A_WE#

DDR_A_CAS#

DDR_A_RAS#

DDR_A_BS0

DDR_A_BS2

DDR_A_BS1

DDR_A_MA1

DDR_A_MA12

DDR_A_MA10

DDR_A_MA9

DDR_A_MA8

DDR_A_MA5

DDR_A_MA3

DDR_A_MA6

DDR_A_MA4

DDR_A_MA0

DDR_A_MA2

DDR_A_MA13

DDR_A_MA11

DDR_A_MA7

DDR_A_DQS3

DDR_A_DQS#3

DDR_A_DQS7

DDR_A_DQS#7

DDR_A_D[0..63]

DDR_A_MA[0..15]

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

DDR_A_DQS2

DDR_A_DQS#2

DDR_A_DQS#0

DDR_A_DQS0

DDR_A_DQS1

DDR_A_DQS#1

DDR_A_DQS#5

DDR_A_DQS5

DDR_A_CLK0

DDR_A_ODT0

DDR_A_CKE0

DDR_A_CLK0#

DDR_A_DQS4

DDR_A_DQS#4

DDR_A_MA14

DIMM_DRAMRST#

DDR_A_DQS6

DDR_A_DQS#6

DDR_A_CS0#

DDR_A_BS0

DDR_A_RAS#

DDR_A_CAS#

DDR_A_WE#

DDR_A_BS2

DDR_A_MA10

DDR_A_MA12

DDR_A_MA1

DDR_A_BS1

DDR_A_MA9

DDR_A_MA4

DDR_A_MA6

DDR_A_MA3

DDR_A_MA5

DDR_A_MA8

DDR_A_MA0

DDR_A_MA7

DDR_A_MA11

DDR_A_MA13

DDR_A_MA2

DDR_A_CLK0

DDR_A_CKE0

DDR_A_ODT0

DDR_A_CLK0#

DDR_A_ODT0

DDR_A_MA8

DDR_A_MA10

DDR_A_MA9

DDR_A_MA7

DDR_A_MA1

DDR_A_MA3

DDR_A_MA5

DDR_A_MA12

DDR_A_MA13

DDR_A_MA2

DDR_A_MA0

DDR_A_MA4

DDR_A_MA6

DDR_A_MA11

DDR_A_MA14

DDR_A_WE#

DDR_A_BS0

DDR_A_BS2

DDR_A_BS1

DDR_A_RAS#

DDR_A_CAS#

DDR_A_MA15

DDR_A_CS0#

DDR_A_CKE0

DDR_A_MA15 DDR_A_MA15 DDR_A_MA15 DDR_A_MA15

DDR_A_D3

DDR_A_D4

DDR_A_D5

DDR_A_D6

DDR_A_D2

DDR_A_D0

DDR_A_D7

DDR_A_D1

DDR_A_D15

DDR_A_D14

DDR_A_D8

DDR_A_D11

DDR_A_D10

DDR_A_D12

DDR_A_D13

DDR_A_D9

DDR_A_D25

DDR_A_D24

DDR_A_D26

DDR_A_D27

DDR_A_D30

DDR_A_D29

DDR_A_D28

DDR_A_D31

DDR_A_D21

DDR_A_D17

DDR_A_D22

DDR_A_D18

DDR_A_D19

DDR_A_D23

DDR_A_D20

DDR_A_D16

DDR_A_D38

DDR_A_D35

DDR_A_D32

DDR_A_D37

DDR_A_D39

DDR_A_D34

DDR_A_D33

DDR_A_D36

DDR_A_D42

DDR_A_D47

DDR_A_D41

DDR_A_D46

DDR_A_D40

DDR_A_D45

DDR_A_D44

DDR_A_D43

DDR_A_D51

DDR_A_D53

DDR_A_D48

DDR_A_D50

DDR_A_D55

DDR_A_D54

DDR_A_D49

DDR_A_D52

DDR_A_D59

DDR_A_D58

DDR_A_D57

DDR_A_D56

DDR_A_D61

DDR_A_D60

DDR_A_D63

DDR_A_D62

SA_DIMM_VREFDQ<9>

DRAMRST_CNTRL_PCH<12,14,6>

EC_SMB_CK2 <14,24,32>

EC_SMB_DA2 <14,24,32>

DDR_A_CLK0#<6>

DDR_A_CLK0<6>

DDR_A_D[0..63]<6>

DDR_A_DQS#[0..7]<6>

DDR_A_DQS[0..7]<6>

DDR_A_MA[0..15]<6>

DIMM_DRAMRST#<12,6>

DDR_A_ODT0 <6>

DDR_A_RAS# <6>

DDR_A_CS0# <6>

DDR_A_CAS# <6>

DDR_A_WE# <6>

DDR_A_CKE0 <6>

DDR_A_BS1 <6>

DDR_A_BS0 <6>

DDR_A_BS2 <6>

+0.675VS

+1.35V

+1.35V

+VREFDQ_A

+1.35V

+VREFCA_A

+1.35V

+3VS

+3VS

+1.35V

+VREFCA_A

+VREFDQ_A

+1.35V+1.35V +1.35V

+VREFCA_A

+VREFDQ_A

+VREFCA_A

+VREFDQ_A

+VREFCA_A

+VREFDQ_A

+0.675VS

+0.675VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

DDRIII DIMMA

Custom

11 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

DDRIII DIMMA

Custom

11 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

DDRIII DIMMA

Custom

11 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

C1462

1U_0201_4V6M

C1462

1U_0201_4V6M

12

C1465

10U_0603_6.3V6M

C1465

10U_0603_6.3V6M

12

R296 36_0201_1%R296 36_0201_1%

1 2

96-BALL

SDRAM DDR3

U56

H5TQ2G63BFR-11C_FBGA96

X76@

96-BALL

SDRAM DDR3

U56

H5TQ2G63BFR-11C_FBGA96

X76@

WE

L3

RAS

J3

CAS

K3

CS/CS0

L2

CKE/CKE0

K9

CK

J7

CK

K7

DQSU

B7

BA0

M2

BA1

N8

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

DQL0 E3

DQL1 F7

DQL2 F2

DQL3 F8

DQL4 H3

DQL5 H8

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9

VSS E1

VSS B3

NC/ODT1

J1

VDD B2

VDD D9

VDDQ A1

VDDQ A8

VDDQ C1

VDDQ C9

NC/CS1

L1

NC/CE1

J9

VDDQ E9

ZQ/ZQ0

L8

RESET

T2

DQSL

F3

DMU

D3 DML

E7

VSSQ B1

VSSQ B9

VSSQ D8

VSSQ E2

DQSU

C7

VSSQ E8

DQSL

G3

VDDQ F1

VSSQ F9

VSSQ G1

VDDQ H2

VDDQ H9

VSSQ G9

VREFCA

M8

VSS G8

VDD G7

ODT/ODT0

K1

A0

N3

A1

P7

VDD K2

A12

N7

VSS J2

VDD K8

DQU1 C3

DQU2 C8

DQU3 C2

DQU4 A7

DQU5 A2

DQU6 B8

DQU7 A3

DQU0 D7

A13

T3

A14

T7

A15/BA3

M7

BA2

M3

VREFDQ

H1

NCZQ1

L9

VDD N1

VDD N9

VDD R1

VDD R9

VSS J8

VSS M1

VSS M9

VSS P1

VSS P9

VSS T1

VSS T9

VDDQ D2

R312 36_0201_1%R312 36_0201_1%

1 2

R999

240_0402_1%

R999

240_0402_1%

1 2

C1478

1U_0402_6.3V6K

C1478

1U_0402_6.3V6K

12

C1466

0.1U_0201_10V6K

C1466

0.1U_0201_10V6K

12

R323 36_0201_1%R323 36_0201_1%

1 2

C1254

0.1U_0402_16V4Z

C1254

0.1U_0402_16V4Z

1

2

R284 36_0201_1%R284 36_0201_1%

1 2

C1479

10U_0603_6.3V6M

C1479

10U_0603_6.3V6M

12

R294 36_0201_1%R294 36_0201_1%

1 2

C1260

0.1U_0402_16V4Z

C1260

0.1U_0402_16V4Z

1

2

C1519

10U_0603_6.3V6M

C1519

10U_0603_6.3V6M

12

R1102

30.1_0402_1%

R1102

30.1_0402_1%

12

C1467

0.1U_0201_10V6K

C1467

0.1U_0201_10V6K

12

R342 36_0201_1%R342 36_0201_1%

1 2

C1263

2.2U_0603_6.3V6K

C1263

2.2U_0603_6.3V6K

12

R1104

1K_0402_1%

R1104

1K_0402_1%

12

R998

240_0402_1%

R998

240_0402_1%

1 2

R325 36_0201_1%R325 36_0201_1%

1 2

C1468

1U_0402_6.3V6K

C1468

1U_0402_6.3V6K

12

R1103

30.1_0402_1%

R1103

30.1_0402_1%

12

C1253

0.1U_0402_16V4Z

C1253

0.1U_0402_16V4Z

1

2

C1252

0.1U_0402_16V4Z

C1252

0.1U_0402_16V4Z

1

2

R309 36_0201_1%R309 36_0201_1%

1 2

C1257

0.1U_0402_16V4Z

C1257

0.1U_0402_16V4Z

1

2

C97

0.1U_0402_16V4Z

C97

0.1U_0402_16V4Z

1 2

R306 36_0201_1%R306 36_0201_1%

1 2

G

D

S

Q78

BSS138_NL_SOT23-3 @

G

D

S

Q78

BSS138_NL_SOT23-3 @

2

13

C1469

10U_0603_6.3V6M

C1469

10U_0603_6.3V6M

12

C1255

0.1U_0402_16V4Z

C1255

0.1U_0402_16V4Z

1

2

R311 36_0201_1%R311 36_0201_1%

1 2

R1107

1K_0402_1%

R1107

1K_0402_1%

12

C1470

0.1U_0201_10V6K

C1470

0.1U_0201_10V6K

12

C1480

2.2U_0603_6.3V6K

C1480

2.2U_0603_6.3V6K

12

R303 36_0201_1%R303 36_0201_1%

1 2

R304 36_0201_1%R304 36_0201_1%

1 2

R1108

1K_0402_1%

R1108

1K_0402_1%

12

R997

240_0402_1%

R997

240_0402_1%

1 2

U4

W83L771AWG-2 TSSOP8P

SA00003PU00

U4

W83L771AWG-2 TSSOP8P

SA00003PU00

VDD

1

ALERT# 6

THERM#

4GND 5

D+

2

D-

3

SCLK 8

SDATA 7

R332 36_0201_1%R332 36_0201_1%

1 2

96-BALL

SDRAM DDR3

U59

H5TQ2G63BFR-11C_FBGA96

X76@

96-BALL

SDRAM DDR3

U59

H5TQ2G63BFR-11C_FBGA96

X76@

WE

L3

RAS

J3

CAS

K3

CS/CS0

L2

CKE/CKE0

K9

CK

J7

CK

K7

DQSU

B7

BA0

M2

BA1

N8

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

DQL0 E3

DQL1 F7

DQL2 F2

DQL3 F8

DQL4 H3

DQL5 H8

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9

VSS E1

VSS B3

NC/ODT1

J1

VDD B2

VDD D9

VDDQ A1

VDDQ A8

VDDQ C1

VDDQ C9

NC/CS1

L1

NC/CE1

J9

VDDQ E9

ZQ/ZQ0

L8

RESET

T2

DQSL

F3

DMU

D3 DML

E7

VSSQ B1

VSSQ B9

VSSQ D8

VSSQ E2

DQSU

C7

VSSQ E8

DQSL

G3

VDDQ F1

VSSQ F9

VSSQ G1

VDDQ H2

VDDQ H9

VSSQ G9

VREFCA

M8

VSS G8

VDD G7

ODT/ODT0

K1

A0

N3

A1

P7

VDD K2

A12

N7

VSS J2

VDD K8

DQU1 C3

DQU2 C8

DQU3 C2

DQU4 A7

DQU5 A2

DQU6 B8

DQU7 A3

DQU0 D7

A13

T3

A14

T7

A15/BA3

M7

BA2

M3

VREFDQ

H1

NCZQ1

L9

VDD N1

VDD N9

VDD R1

VDD R9

VSS J8

VSS M1

VSS M9

VSS P1

VSS P9

VSS T1

VSS T9

VDDQ D2

C1471

1U_0402_6.3V6K

C1471

1U_0402_6.3V6K

12

C1481

0.1U_0402_16V4Z

C1481

0.1U_0402_16V4Z

12

C1511

1U_0201_4V6M

C1511

1U_0201_4V6M

12

R297 36_0201_1%R297 36_0201_1%

1 2

R319 36_0201_1%R319 36_0201_1%

1 2

96-BALL

SDRAM DDR3

U57

H5TQ2G63BFR-11C_FBGA96

X76@

96-BALL

SDRAM DDR3

U57

H5TQ2G63BFR-11C_FBGA96

X76@

WE

L3

RAS

J3

CAS

K3

CS/CS0

L2

CKE/CKE0

K9

CK

J7

CK

K7

DQSU

B7

BA0

M2

BA1

N8

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

DQL0 E3

DQL1 F7

DQL2 F2

DQL3 F8

DQL4 H3

DQL5 H8

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9

VSS E1

VSS B3

NC/ODT1

J1

VDD B2

VDD D9

VDDQ A1

VDDQ A8

VDDQ C1

VDDQ C9

NC/CS1

L1

NC/CE1

J9

VDDQ E9

ZQ/ZQ0

L8

RESET

T2

DQSL

F3

DMU

D3 DML

E7

VSSQ B1

VSSQ B9

VSSQ D8

VSSQ E2

DQSU

C7

VSSQ E8

DQSL

G3

VDDQ F1

VSSQ F9

VSSQ G1

VDDQ H2

VDDQ H9

VSSQ G9

VREFCA

M8

VSS G8

VDD G7

ODT/ODT0

K1

A0

N3

A1

P7

VDD K2

A12

N7

VSS J2

VDD K8

DQU1 C3

DQU2 C8

DQU3 C2

DQU4 A7

DQU5 A2

DQU6 B8

DQU7 A3

DQU0 D7

A13

T3

A14

T7

A15/BA3

M7

BA2

M3

VREFDQ

H1

NCZQ1

L9

VDD N1

VDD N9

VDD R1

VDD R9

VSS J8

VSS M1

VSS M9

VSS P1

VSS P9

VSS T1

VSS T9

VDDQ D2

C1460

1U_0201_4V6M

C1460

1U_0201_4V6M

12

C1482

2.2U_0603_6.3V6K

C1482

2.2U_0603_6.3V6K

12

C1256

0.1U_0402_16V4Z

C1256

0.1U_0402_16V4Z

1

2

C1458

0.1U_0402_16V4Z

C1458

0.1U_0402_16V4Z

1 2

C1512

0.1U_0201_10V6K

C1512

0.1U_0201_10V6K

12

C1472

10U_0603_6.3V6M

C1472

10U_0603_6.3V6M

12

R1105

0_0402_5%

@R1105

0_0402_5%

@

1 2

R994

240_0402_1%

R994

240_0402_1%

1 2

R995

240_0402_1%

R995

240_0402_1%

1 2

R315 36_0201_1%R315 36_0201_1%

1 2

R291 36_0201_1%R291 36_0201_1%

1 2

C1483

0.1U_0402_16V4Z

C1483

0.1U_0402_16V4Z

12

C1258

2.2U_0603_6.3V6K

@

C1258

2.2U_0603_6.3V6K

@

12

C1513

0.1U_0201_10V6K

C1513

0.1U_0201_10V6K

12

C1262

0.1U_0402_16V4Z

C1262

0.1U_0402_16V4Z

1

2

C1473

10U_0603_6.3V6M

C1473

10U_0603_6.3V6M

12

R1106

1K_0402_1%

R1106

1K_0402_1%

12

R301 36_0201_1%R301 36_0201_1%

1 2

R313 36_0201_1%R313 36_0201_1%

1 2

R992

240_0402_1%

R992

240_0402_1%

1 2

C1457

1.8P_0201_50V8C

C1457

1.8P_0201_50V8C

12

R290 36_0201_1%R290 36_0201_1%

1 2

C1474

10U_0603_6.3V6M

C1474

10U_0603_6.3V6M

12

R996

240_0402_1%

R996

240_0402_1%

1 2

C1261

2.2U_0603_6.3V6K

C1261

2.2U_0603_6.3V6K

12

R546 10K_0402_5%R546 10K_0402_5%

1 2

R295 36_0201_1%R295 36_0201_1%

1 2

R317 36_0201_1%R317 36_0201_1%

1 2

C1259

2.2U_0603_6.3V6K

@

C1259

2.2U_0603_6.3V6K

@

12

C1475

10U_0603_6.3V6M

C1475

10U_0603_6.3V6M

12

R993

240_0402_1%

R993

240_0402_1%

1 2

C1459

0.1U_0201_10V6K

C1459

0.1U_0201_10V6K

12

C1463

10U_0603_6.3V6M

C1463

10U_0603_6.3V6M

12

R318 36_0201_1%R318 36_0201_1%

1 2

C1476

1U_0402_6.3V6K

C1476

1U_0402_6.3V6K

12

+

C1464

330U_D2_2V_Y

@

+

C1464

330U_D2_2V_Y

@

12

R333 36_0201_1%R333 36_0201_1%

1 2

R298 36_0201_1%R298 36_0201_1%

1 2

C1477

1U_0402_6.3V6K

C1477

1U_0402_6.3V6K

12

96-BALL

SDRAM DDR3

U58

H5TQ2G63BFR-11C_FBGA96

X76@

96-BALL

SDRAM DDR3

U58

H5TQ2G63BFR-11C_FBGA96

X76@

WE

L3

RAS

J3

CAS

K3

CS/CS0

L2

CKE/CKE0

K9

CK

J7

CK

K7

DQSU

B7

BA0

M2

BA1

N8

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

DQL0 E3

DQL1 F7

DQL2 F2

DQL3 F8

DQL4 H3

DQL5 H8

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9

VSS E1

VSS B3

NC/ODT1

J1

VDD B2

VDD D9

VDDQ A1

VDDQ A8

VDDQ C1

VDDQ C9

NC/CS1

L1

NC/CE1

J9

VDDQ E9

ZQ/ZQ0

L8

RESET

T2

DQSL

F3

DMU

D3 DML

E7

VSSQ B1

VSSQ B9

VSSQ D8

VSSQ E2

DQSU

C7

VSSQ E8

DQSL

G3

VDDQ F1

VSSQ F9

VSSQ G1

VDDQ H2

VDDQ H9

VSSQ G9

VREFCA

M8

VSS G8

VDD G7

ODT/ODT0

K1

A0

N3

A1

P7

VDD K2

A12

N7

VSS J2

VDD K8

DQU1 C3

DQU2 C8

DQU3 C2

DQU4 A7

DQU5 A2

DQU6 B8

DQU7 A3

DQU0 D7

A13

T3

A14

T7

A15/BA3

M7

BA2

M3

VREFDQ

H1

NCZQ1

L9

VDD N1

VDD N9

VDD R1

VDD R9

VSS J8

VSS M1

VSS M9

VSS P1

VSS P9

VSS T1

VSS T9

VDDQ D2

C1461

0.1U_0201_10V6K

C1461

0.1U_0201_10V6K

12

C1514

1U_0201_4V6M

C1514

1U_0201_4V6M

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Layout Note:

Place near each memory part

Channel B

DDR3 CLK Termination

1.CAD Note: Cterm= 1.6pF should be kept

near feeding point of first SDRAM

2.CAD Note: Rtt= 30.1ohms, Ctt= 0.1uF

should be kept within 600mils from last SDRAM

END topology

DDR3 CTL/ADD Termination

M3 support

near U60 near U61 near U62 near U63

Delete U71 SPD EEROM circuit

SA00004KS00

S IC EE 2K AT24C02C-XHM-T TSSOP 8P

DDR_B_CS0#

DDR_B_ODT0 DDR_B_ODT0

DDR_B_CS0#

DDR_B_RAS#

DDR_B_WE#

DDR_B_CAS#

DDR_B_CLK0

DDR_B_CKE0

DDR_B_CLK0#

DDR_B_CLK0

DDR_B_CKE0

DDR_B_CLK0#

DDR_B_MA4

DDR_B_MA6

DDR_B_DQS5

DDR_B_MA11

DDR_B_MA14

DIMM_DRAMRST#

DDR_B_MA0

DDR_B_MA7

DDR_B_DQS#5

DDR_B_BS1

DDR_B_DQS#0

DDR_B_DQS0

DDR_B_MA2

DIMM_DRAMRST#

DDR_B_DQS#3

DDR_B_DQS3

DDR_B_MA14

DDR_B_MA11

DDR_B_MA6

DDR_B_MA4

DDR_B_BS1

DDR_B_MA7

DDR_B_MA0

DDR_B_RAS#

DDR_B_MA2

DDR_B_ODT0

DDR_B_CS0#

DDR_B_MA8

DDR_B_BS2

DDR_B_MA3

DDR_B_MA5

DDR_B_MA9

DDR_B_MA12

DDR_B_BS0

DDR_B_MA10

DDR_B_MA1

DDR_B_MA13

DDR_B_MA4

DDR_B_MA6

DDR_B_MA11

DDR_B_MA14

DIMM_DRAMRST#

DDR_B_RAS#

DDR_B_MA0

DDR_B_MA7

DDR_B_BS1

DDR_B_MA2

DDR_B_CLK0

DDR_B_CKE0

DDR_B_CLK0#

DDR_B_MA8

DDR_B_BS2

DDR_B_MA3

DDR_B_MA5

DDR_B_MA9

DDR_B_MA12

DDR_B_BS0

DDR_B_MA10

DDR_B_MA1

DDR_B_MA13

DDR_B_CAS#

DDR_B_WE#

DDR_B_MA6

DDR_B_MA4

DDR_B_MA7

DDR_B_MA0

DDR_B_RAS#

DIMM_DRAMRST#

DDR_B_MA14

DDR_B_MA11

DDR_B_BS1

DDR_B_MA2

DDR_B_BS2

DDR_B_MA8

DDR_B_BS0

DDR_B_MA12

DDR_B_MA9

DDR_B_MA5

DDR_B_MA3

DDR_B_WE#

DDR_B_CAS#

DDR_B_MA13

DDR_B_MA1

DDR_B_MA10

DDR_B_DQS#4

DDR_B_DQS4

DDR_B_MA8

DDR_B_MA5

DDR_B_MA3

DDR_B_BS2

DDR_B_MA1

DDR_B_MA10

DDR_B_BS0

DDR_B_MA12

DDR_B_MA9

DDR_B_WE#

DDR_B_CAS#

DDR_B_MA13

DDR_B_DQS#1

DDR_B_DQS1

DDR_B_DQS#2

DDR_B_DQS2

DDR_B_ODT0

DDR_B_CS0#

DDR_B_CLK0

DDR_B_CKE0

DDR_B_CLK0#

DDR_B_ODT0

DDR_B_MA8

DDR_B_MA10

DDR_B_MA9

DDR_B_MA7

DDR_B_MA1

DDR_B_MA3

DDR_B_MA5

DDR_B_MA12

DDR_B_MA13

DDR_B_MA2

DDR_B_MA0

DDR_B_MA4

DDR_B_MA6

DDR_B_MA11

DDR_B_MA14

DDR_B_WE#

DDR_B_BS0

DDR_B_BS2

DDR_B_BS1

DDR_B_RAS#

DDR_B_CAS#

DDR_B_MA15

DDR_B_CS0#

DDR_B_CKE0

DDR_B_MA15 DDR_B_MA15 DDR_B_MA15 DDR_B_MA15

DDR_B_D15

DDR_B_D13

DDR_B_D14

DDR_B_D10

DDR_B_D8

DDR_B_D9

DDR_B_D11

DDR_B_D12

DDR_B_D7

DDR_B_D5

DDR_B_D4

DDR_B_D1

DDR_B_D0

DDR_B_D2

DDR_B_D3

DDR_B_D6

DDR_B_D23

DDR_B_D20

DDR_B_D22

DDR_B_D21

DDR_B_D18

DDR_B_D17

DDR_B_D16

DDR_B_D19

DDR_B_D28

DDR_B_D29

DDR_B_D30

DDR_B_D27

DDR_B_D24

DDR_B_D26

DDR_B_D25

DDR_B_D31

DDR_B_D36

DDR_B_D35

DDR_B_D32

DDR_B_D39

DDR_B_D38

DDR_B_D37

DDR_B_D34

DDR_B_D33

DDR_B_D47

DDR_B_D44

DDR_B_D46

DDR_B_D40

DDR_B_D41

DDR_B_D42

DDR_B_D43

DDR_B_D45

DDR_B_DQS7

DDR_B_DQS6

DDR_B_DQS#6

DDR_B_DQS#7

DDR_B_D60

DDR_B_D57

DDR_B_D61

DDR_B_D56

DDR_B_D63

DDR_B_D58

DDR_B_D59

DDR_B_D62

DDR_B_D48

DDR_B_D49

DDR_B_D53

DDR_B_D52

DDR_B_D55

DDR_B_D54

DDR_B_D50

DDR_B_D51

DDR_B_MA[0..15] <6>

DDR_B_DQS#[0..7] <6>

DDR_B_DQS[0..7] <6>

DDR_B_D[0..63] <6>

DIMM_DRAMRST#<11,6>

DDR_B_CLK0#<6>

DDR_B_CLK0<6>

SB_DIMM_VREFDQ<9>

DRAMRST_CNTRL_PCH<11,14,6>

DDR_B_ODT0 <6>

DDR_B_RAS# <6>

DDR_B_CAS# <6>

DDR_B_CS0# <6>

DDR_B_WE# <6>

DDR_B_BS0 <6>

DDR_B_CKE0 <6>

DDR_B_BS1 <6>

DDR_B_BS2 <6>

+1.35V+1.35V

+VREFDQ_B

+VREFCA_B+VREFCA_B

+VREFDQ_B

+VREFCA_B

+VREFDQ_B+VREFDQ_B

+VREFCA_B

+1.35V +1.35V

+0.675VS

+1.35V

+1.35V

+0.675VS

+VREFCA_B

+1.35V

+VREFDQ_B

+1.35V

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

DDRIII DIMMB

Custom

12 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

DDRIII DIMMB

Custom

12 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

DDRIII DIMMB

Custom

12 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R1012

240_0402_1%

128@

R1012

240_0402_1%

128@

1 2

C1291

2.2U_0603_6.3V6K

C1291

2.2U_0603_6.3V6K

12

R1119

1K_0402_1%

128@

R1119

1K_0402_1%

128@

12

C1490

10U_0603_6.3V6M

128@

C1490

10U_0603_6.3V6M

128@

12

96-BALL

SDRAM DDR3

U61

H5TQ2G63BFR-11C_FBGA96

X76@

96-BALL

SDRAM DDR3

U61

H5TQ2G63BFR-11C_FBGA96

X76@

WE

L3

RAS

J3

CAS

K3

CS/CS0

L2

CKE/CKE0

K9

CK

J7

CK

K7

DQSU

B7

BA0

M2

BA1

N8

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

DQL0 E3

DQL1 F7

DQL2 F2

DQL3 F8

DQL4 H3

DQL5 H8

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9

VSS E1

VSS B3

NC/ODT1

J1

VDD B2

VDD D9

VDDQ A1

VDDQ A8

VDDQ C1

VDDQ C9

NC/CS1

L1

NC/CE1

J9

VDDQ E9

ZQ/ZQ0

L8

RESET

T2

DQSL

F3

DMU

D3 DML

E7

VSSQ B1

VSSQ B9

VSSQ D8

VSSQ E2

DQSU

C7

VSSQ E8

DQSL

G3

VDDQ F1

VSSQ F9

VSSQ G1

VDDQ H2

VDDQ H9

VSSQ G9

VREFCA

M8

VSS G8

VDD G7

ODT/ODT0

K1

A0

N3

A1

P7

VDD K2

A12

N7

VSS J2

VDD K8

DQU1 C3

DQU2 C8

DQU3 C2

DQU4 A7

DQU5 A2

DQU6 B8

DQU7 A3

DQU0 D7

A13

T3

A14

T7

A15/BA3

M7

BA2

M3

VREFDQ

H1

NCZQ1

L9

VDD N1

VDD N9

VDD R1

VDD R9

VSS J8

VSS M1

VSS M9

VSS P1

VSS P9

VSS T1

VSS T9

VDDQ D2

R349 36_0201_1%

128@

R349 36_0201_1%

128@

1 2

R1009

240_0402_1%

128@

R1009

240_0402_1%

128@

1 2

C1488

0.1U_0201_10V6K

128@

C1488

0.1U_0201_10V6K

128@

12

R390 36_0201_1%

128@

R390 36_0201_1%

128@

1 2

C1292

2.2U_0603_6.3V6K

@

C1292

2.2U_0603_6.3V6K

@

12

R1005

240_0402_1%

128@

R1005

240_0402_1%

128@

1 2

96-BALL

SDRAM DDR3

U62

H5TQ2G63BFR-11C_FBGA96

X76@

96-BALL

SDRAM DDR3

U62

H5TQ2G63BFR-11C_FBGA96

X76@

WE

L3

RAS

J3

CAS

K3

CS/CS0

L2

CKE/CKE0

K9

CK

J7

CK

K7

DQSU

B7

BA0

M2

BA1

N8

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

DQL0 E3

DQL1 F7

DQL2 F2

DQL3 F8

DQL4 H3

DQL5 H8

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9

VSS E1

VSS B3

NC/ODT1

J1

VDD B2

VDD D9

VDDQ A1

VDDQ A8

VDDQ C1

VDDQ C9

NC/CS1

L1

NC/CE1

J9

VDDQ E9

ZQ/ZQ0

L8

RESET

T2

DQSL

F3

DMU

D3 DML

E7

VSSQ B1

VSSQ B9

VSSQ D8

VSSQ E2

DQSU

C7

VSSQ E8

DQSL

G3

VDDQ F1

VSSQ F9

VSSQ G1

VDDQ H2

VDDQ H9

VSSQ G9

VREFCA

M8

VSS G8

VDD G7

ODT/ODT0

K1

A0

N3

A1

P7

VDD K2

A12

N7

VSS J2

VDD K8

DQU1 C3

DQU2 C8

DQU3 C2

DQU4 A7

DQU5 A2

DQU6 B8

DQU7 A3

DQU0 D7

A13

T3

A14

T7

A15/BA3

M7

BA2

M3

VREFDQ

H1

NCZQ1

L9

VDD N1

VDD N9

VDD R1

VDD R9

VSS J8

VSS M1

VSS M9

VSS P1

VSS P9

VSS T1

VSS T9

VDDQ D2

C1493

10U_0603_6.3V6M

128@

C1493

10U_0603_6.3V6M

128@

12

R350 36_0201_1%

128@

R350 36_0201_1%

128@

1 2

C1293

2.2U_0603_6.3V6K

@

C1293

2.2U_0603_6.3V6K

@

12

R1122

0_0402_5%

@R1122

0_0402_5%

@

1 2

C1489

0.1U_0201_10V6K

128@

C1489

0.1U_0201_10V6K

128@

12

R1120

1K_0402_1%

128@

R1120

1K_0402_1%

128@

12

R392 36_0201_1%

128@

R392 36_0201_1%

128@

1 2

C1301

0.1U_0402_16V4Z

128@

C1301

0.1U_0402_16V4Z

128@

1

2

R1007

240_0402_1%

128@

R1007

240_0402_1%

128@

1 2

C1494

10U_0603_6.3V6M

128@

C1494

10U_0603_6.3V6M

128@

12

R351 36_0201_1%

128@

R351 36_0201_1%

128@

1 2

C1294

0.1U_0402_16V4Z

128@

C1294

0.1U_0402_16V4Z

128@

1

2

C1507

2.2U_0603_6.3V6K

128@

C1507

2.2U_0603_6.3V6K

128@

12

C1491

1U_0402_6.3V6K

128@

C1491

1U_0402_6.3V6K

128@

12

C1505

1.8P_0201_50V8C128@

C1505

1.8P_0201_50V8C128@

12

C1517

1U_0201_4V6M

128@

C1517

1U_0201_4V6M

128@

12

R398 36_0201_1%

128@

R398 36_0201_1%

128@

1 2

C1300

0.1U_0402_16V4Z

128@

C1300

0.1U_0402_16V4Z

128@

1

2

C1495

10U_0603_6.3V6M

128@

C1495

10U_0603_6.3V6M

128@

12

C1503

1U_0201_4V6M

128@

C1503

1U_0201_4V6M

128@

12

R1117

30.1_0402_1%

128@

R1117

30.1_0402_1%

128@

12

C1515

0.1U_0201_10V6K

128@

C1515

0.1U_0201_10V6K

128@

12

C1492

1U_0402_6.3V6K

128@

C1492

1U_0402_6.3V6K

128@

12

R407 36_0201_1%

128@

R407 36_0201_1%

128@

1 2

R352 36_0201_1%

128@

R352 36_0201_1%

128@

1 2

C1298

0.1U_0402_16V4Z

128@

C1298

0.1U_0402_16V4Z

128@

1

2

R336 36_0201_1%

128@

R336 36_0201_1%

128@

1 2

C1297

0.1U_0402_16V4Z

128@

C1297

0.1U_0402_16V4Z

128@

1

2

R1118

30.1_0402_1%

128@

R1118

30.1_0402_1%

128@

12

C1516

0.1U_0201_10V6K

128@

C1516

0.1U_0201_10V6K

128@

12

C1496

10U_0603_6.3V6M

128@

C1496

10U_0603_6.3V6M

128@

12

R1123

1K_0402_1%

128@

R1123

1K_0402_1%

128@

12

96-BALL

SDRAM DDR3

U63

H5TQ2G63BFR-11C_FBGA96

X76@

96-BALL

SDRAM DDR3

U63

H5TQ2G63BFR-11C_FBGA96

X76@

WE

L3

RAS

J3

CAS

K3

CS/CS0

L2

CKE/CKE0

K9

CK

J7

CK

K7

DQSU

B7

BA0

M2

BA1

N8

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

DQL0 E3

DQL1 F7

DQL2 F2

DQL3 F8

DQL4 H3

DQL5 H8

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9

VSS E1

VSS B3

NC/ODT1

J1

VDD B2

VDD D9

VDDQ A1

VDDQ A8

VDDQ C1

VDDQ C9

NC/CS1

L1

NC/CE1

J9

VDDQ E9

ZQ/ZQ0

L8

RESET

T2

DQSL

F3

DMU

D3 DML

E7

VSSQ B1

VSSQ B9

VSSQ D8

VSSQ E2

DQSU

C7

VSSQ E8

DQSL

G3

VDDQ F1

VSSQ F9

VSSQ G1

VDDQ H2

VDDQ H9

VSSQ G9

VREFCA

M8

VSS G8

VDD G7

ODT/ODT0

K1

A0

N3

A1

P7

VDD K2

A12

N7

VSS J2

VDD K8

DQU1 C3

DQU2 C8

DQU3 C2

DQU4 A7

DQU5 A2

DQU6 B8

DQU7 A3

DQU0 D7

A13

T3

A14

T7

A15/BA3

M7

BA2

M3

VREFDQ

H1

NCZQ1

L9

VDD N1

VDD N9

VDD R1

VDD R9

VSS J8

VSS M1

VSS M9

VSS P1

VSS P9

VSS T1

VSS T9

VDDQ D2

C1497

0.1U_0201_10V6K

128@

C1497

0.1U_0201_10V6K

128@

12

C1508

0.1U_0402_16V4Z

128@

C1508

0.1U_0402_16V4Z

128@

12

R354 36_0201_1%

128@

R354 36_0201_1%

128@

1 2

R408 36_0201_1%

128@

R408 36_0201_1%

128@

1 2

R1006

240_0402_1%

128@

R1006

240_0402_1%

128@

1 2

R355 36_0201_1%

128@

R355 36_0201_1%

128@

1 2

R1010

240_0402_1%

128@

R1010

240_0402_1%

128@

1 2

C1499

1U_0402_6.3V6K

128@

C1499

1U_0402_6.3V6K

128@

12

C1500

10U_0603_6.3V6M

128@

C1500

10U_0603_6.3V6M

128@

12

R339 36_0201_1%

128@

R339 36_0201_1%

128@

1 2

C1299

0.1U_0402_16V4Z

128@

C1299

0.1U_0402_16V4Z

128@

1

2

96-BALL

SDRAM DDR3

U60

H5TQ2G63BFR-11C_FBGA96

X76@

96-BALL

SDRAM DDR3

U60

H5TQ2G63BFR-11C_FBGA96

X76@

WE

L3

RAS

J3

CAS

K3

CS/CS0

L2

CKE/CKE0

K9

CK

J7

CK

K7

DQSU

B7

BA0

M2

BA1

N8

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

DQL0 E3

DQL1 F7

DQL2 F2

DQL3 F8

DQL4 H3

DQL5 H8

DQL6 G2

DQL7 H7

VSSQ D1

VSS A9

VSS E1

VSS B3

NC/ODT1

J1

VDD B2

VDD D9

VDDQ A1

VDDQ A8

VDDQ C1

VDDQ C9

NC/CS1

L1

NC/CE1

J9

VDDQ E9

ZQ/ZQ0

L8

RESET

T2

DQSL

F3

DMU

D3 DML

E7

VSSQ B1

VSSQ B9

VSSQ D8

VSSQ E2

DQSU

C7

VSSQ E8

DQSL

G3

VDDQ F1

VSSQ F9

VSSQ G1

VDDQ H2

VDDQ H9

VSSQ G9

VREFCA

M8

VSS G8

VDD G7

ODT/ODT0

K1

A0

N3

A1

P7

VDD K2

A12

N7

VSS J2

VDD K8

DQU1 C3

DQU2 C8

DQU3 C2

DQU4 A7

DQU5 A2

DQU6 B8

DQU7 A3

DQU0 D7

A13

T3

A14

T7

A15/BA3

M7

BA2

M3

VREFDQ

H1

NCZQ1

L9

VDD N1

VDD N9

VDD R1

VDD R9

VSS J8

VSS M1

VSS M9

VSS P1

VSS P9

VSS T1

VSS T9

VDDQ D2

R340 36_0201_1%

128@

R340 36_0201_1%

128@

1 2

C1498

0.1U_0201_10V6K

128@

C1498

0.1U_0201_10V6K

128@

12

R1008

240_0402_1%

128@

R1008

240_0402_1%

128@

1 2

R356 36_0201_1%

128@

R356 36_0201_1%

128@

1 2

R308 36_0201_1%

128@

R308 36_0201_1%

128@

1 2

C1518

0.1U_0201_10V6K

128@

C1518

0.1U_0201_10V6K

128@

12

C1295

0.1U_0402_16V4Z

128@

C1295

0.1U_0402_16V4Z

128@

1

2

C1506

0.1U_0402_16V4Z

128@ C1506

0.1U_0402_16V4Z

128@

1 2

C1296

0.1U_0402_16V4Z

128@

C1296

0.1U_0402_16V4Z

128@

1

2

R343 36_0201_1%

128@

R343 36_0201_1%

128@

1 2

R359 36_0201_1%

128@

R359 36_0201_1%

128@

1 2

R1121

1K_0402_1%

128@

R1121

1K_0402_1%

128@

12

C1502

0.1U_0201_10V6K

128@

C1502

0.1U_0201_10V6K

128@

12

C1501

1U_0201_4V6M

128@

C1501

1U_0201_4V6M

128@

12

R367 36_0201_1%

128@

R367 36_0201_1%

128@

1 2

+

C1484

330U_D2_2V_Y

+

C1484

330U_D2_2V_Y

12

G

D

S

Q79

BSS138_NL_SOT23-3 @

G

D

S

Q79

BSS138_NL_SOT23-3 @

2

13

R344 36_0201_1%

128@

R344 36_0201_1%

128@

1 2

R370 36_0201_1%

128@

R370 36_0201_1%

128@

1 2

C1504

1U_0201_4V6M

128@

C1504

1U_0201_4V6M

128@

12

C1302

2.2U_0603_6.3V6K

128@

C1302

2.2U_0603_6.3V6K

128@

12

C1485

10U_0603_6.3V6M

128@

C1485

10U_0603_6.3V6M

128@

12

C1509

2.2U_0603_6.3V6K

128@

C1509

2.2U_0603_6.3V6K

128@

12

R348 36_0201_1%

128@

R348 36_0201_1%

128@

1 2

R1011

240_0402_1%

128@

R1011

240_0402_1%

128@

1 2

R377 36_0201_1%

128@

R377 36_0201_1%

128@

1 2

R335 36_0201_1%

128@

R335 36_0201_1%

128@

1 2

C1486

10U_0603_6.3V6M

128@

C1486

10U_0603_6.3V6M

128@

12

C1510

0.1U_0402_16V4Z

128@

C1510

0.1U_0402_16V4Z

128@

12

C1487

0.1U_0201_10V6K

128@

C1487

0.1U_0201_10V6K

128@

12

R380 36_0201_1%

128@

R380 36_0201_1%

128@

1 2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

H Integrated VRM enable

L Integrated VRM disable

INTVRMEN

*

LOW= Disable (Default internal PD)

HIGH= Enable ( No Reboot)Disable TCO timer system reboot feature

*

*

Low = Disabled (Default)

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by

*

(INTVRMEN should always be pull high.)

Prevent back drive issue.

ME debug mode,this signal has a weak internal PD

HDA_SDO

Boot BIOS

GPIO19

0

1

GPIO51

Boot BIOS Strap

0 0

1

0

SPI

-

Reserved

LPC

1 1

GPIO19 has internal Pull up

High = Enabled [Flash Descriptor Security Overide]

1.5V when smapled high

1.8V when sampled low

Needs to be pulled High for Huron River platfrom

*

No use PH 10K +3VS

GPIO21

0

1

Switchable

Non SG

*

Switchable Graph

Debug Port DG 1.2 PH 4.7K +3VS

4MB=32Mb

RTC Battery:Chargeable

CRB:10K ohm

Check List 1.0:8.2K ohm

20MIL

Reserve for EMI

2MB=16Mb

PCH_RTCX1

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

SM_INTRUDER#

PCH_SPKR

PCH_SPI_CLK

PCH_SPI_MOSI

PCH_SPI_MISO

PCH_JTAG_TCK

PCH_SATALED#

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

HDA_SYNC_PCH

HDA_RST_PCH#

HDA_SDIN0

HDA_SDOUT_PCH

PCH_GPIO21

PCH_RTCX2

HDA_BITCLK_PCH

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

LPC_AD2

LPC_FRAME#

LPC_AD0

LPC_AD3

LPC_AD1

SERIRQ

PCH_GPIO19

SATA_COMP

RBIAS_SATA3

SATA3_COMP

HDA_BITCLK_PCH

HDA_RST_PCH#

HDA_SDOUT_PCH

PCH_INTVRMEN

PCH_SPKR

HDA_SDOUT_PCH

HDA_SYNC_PCH

HDA_SYNC_PCH_R

PCH_SPI_CLK_1

PCH_SPI_CS0#

PCH_SPI_MOSI_1

PCH_SPI_MISO_0

HDA_SYNC_PCH

SERIRQ

PCH_SATALED#

PCH_GPIO21

PCH_GPIO19

SPI_WP0#

PCH_SPI_MISO_0

PCH_SPI_CS0#

SPI_HOLD0#

PCH_SPI_CLK_0

PCH_SPI_MOSI_0

PCH_SPI_CS1# PCH_SPI_CS1#_R

PCH_SPI_MOSI_0

PCH_SPI_MISO_1

PCH_SPI_CLK_0

PCH_RTCX2

PCH_RTCX1

PCH_SRTCRST#

PCH_RTCRST#

PCH_GPIO23

PCH_SPI_CLK

SPI_HOLD1#

PCH_SPI_CLK_1

PCH_SPI_MOSI_1

SPI_WP1#

PCH_SPI_MISO_1

PCH_SPI_CS1#

PCH_SPKR<33>

HDA_SDIN0<33>

SERIRQ <30,32>

LPC_AD0 <30,32>

LPC_AD1 <30,32>

LPC_AD2 <30,32>

LPC_AD3 <30,32>

LPC_FRAME# <30,32>

HDA_SYNC_AUDIO<33>

HDA_SDOUT_AUDIO<33>

HDA_RST_AUDIO#<33>

HDA_BITCLK_AUDIO<33>

HDA_SDO<32>

PCH_GPIO23 <18>

SATA_PRX_DTX_P0 <29>

SATA_PTX_DRX_N0 <29>

SATA_PTX_DRX_P0 <29>

SATA_PRX_DTX_N0 <29>

SATA_PRX_DTX_P1 <29>

SATA_PTX_DRX_N1 <29>

SATA_PTX_DRX_P1 <29>

SATA_PRX_DTX_N1 <29>

+RTCVCC

+3VALW_PCH +3VALW_PCH+3VALW_PCH

+1.05VS_PCH

+1.05VS_PCH

+3VS

+VCCSUS3_3

+VCCSUS3_3

+3VS

+3VS

+3VS

+3VS

+3VS

+5VS

+CHGRTC

+RTCBATT

+RTCVCC

+RTCVCC

+3VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (1/8) SATA,HDA,SPI, LPC, XDP

Custom

13 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (1/8) SATA,HDA,SPI, LPC, XDP

Custom

13 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (1/8) SATA,HDA,SPI, LPC, XDP

Custom

13 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R389

37.4_0402_1%

R389

37.4_0402_1%

1 2

C1216

22P_0402_50V8J

@

C1216

22P_0402_50V8J

@

1 2

R738 33_0402_5%R738 33_0402_5%

12

R737 33_0402_5%R737 33_0402_5%

12

R322

1K_0402_5%

@R322

1K_0402_5%

@

12

C757

18P_0402_50V8J

C757

18P_0402_50V8J

1

2

G

D

S

Q20

BSS138W-7-F_SOT323-3

G

D

S

Q20

BSS138W-7-F_SOT323-3

2

13

C197

0.1U_0402_16V4Z

C197

0.1U_0402_16V4Z

1

2

X1

32.768KHZ_12.5PF_9H03200019

SJ100004Z00

X1

32.768KHZ_12.5PF_9H03200019

SJ100004Z00

12

R660

200_0402_5%

@

R660

200_0402_5%

@

12

R704 33_0402_5%R704 33_0402_5%

12

R302

0_0402_5%@

R302

0_0402_5%@

1 2

R468

1M_0402_5%

R468

1M_0402_5%

12

R658

200_0402_5%

@

R658

200_0402_5%

@

12

R677

33_0402_5%

R677

33_0402_5%

1 2

R671

100_0402_1%

@

R671

100_0402_1%

@

12

C516

1U_0402_6.3V6K

C516

1U_0402_6.3V6K

1

2

R669

100_0402_1%

@

R669

100_0402_1%

@

12

R328 1K_0402_5%R328 1K_0402_5%

12

R665

33_0402_5%

R665

33_0402_5%

1 2

R388

49.9_0402_1%

R388

49.9_0402_1%

1 2

R701 3.3K_0402_5%R701 3.3K_0402_5%

12

R659

200_0402_5%

@

R659

200_0402_5%

@

12

R673

33_0402_5%

R673

33_0402_5%

1 2

R674

4.7K_0402_5%

R674

4.7K_0402_5%

12

R687

10K_0402_5%

R687

10K_0402_5%

12

RTCIHDA

SATA

LPC

SPI JTAG

SATA 6G

U37A

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

RTCIHDA

SATA

LPC

SPI JTAG

SATA 6G

U37A

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

RTCX1

A20

RTCX2

C20

INTVRMEN

C17

INTRUDER#

K22

HDA_BCLK

N34

HDA_SYNC

L34

HDA_RST#

K34

HDA_SDIN0

E34

HDA_SDIN1

G34

HDA_SDIN2

C34

HDA_SDO

A36

SATALED# P3

FWH0 / LAD0 C38

FWH1 / LAD1 A38

FWH2 / LAD2 B37

FWH3 / LAD3 C37

LDRQ1# / GPIO23 K36

FWH4 / LFRAME# D36

LDRQ0# E36

RTCRST#

D20

HDA_SDIN3

A34

HDA_DOCK_EN# / GPIO33

C36

HDA_DOCK_RST# / GPIO13

N32

SRTCRST#

G22

SATA0RXN AM3

SATA0RXP AM1

SATA0TXN AP7

SATA0TXP AP5

SATA1RXN AM10

SATA1RXP AM8

SATA1TXN AP11

SATA1TXP AP10

SATA2RXN AD7

SATA2RXP AD5

SATA2TXN AH5

SATA2TXP AH4

SATA3RXN AB8

SATA3RXP AB10

SATA3TXN AF3

SATA3TXP AF1

SATA4RXN Y7

SATA4RXP Y5

SATA4TXN AD3

SATA4TXP AD1

SATA5RXN Y3

SATA5RXP Y1

SATA5TXN AB3

SATA5TXP AB1

SATAICOMPI Y10

SPI_CLK

T3

SPI_CS0#

Y14

SPI_CS1#

T1

SPI_MOSI

V4

SPI_MISO

U3

SATA0GP / GPIO21 V14

SATA1GP / GPIO19 P1

JTAG_TCK

J3

JTAG_TMS

H7

JTAG_TDI

K5

JTAG_TDO

H1

SERIRQ V5

SPKR

T10

SATAICOMPO Y11

SATA3COMPI AB13

SATA3RCOMPO AB12

SATA3RBIAS AH1

R700 3.3K_0402_5%R700 3.3K_0402_5%

1 2

R568

0_0603_5%

@

R568

0_0603_5%

@

12

R733 0_0402_5%R733 0_0402_5%

12

R736 33_0402_5%R736 33_0402_5%

12

R672

51_0402_5%

R672

51_0402_5%

12

R699 3.3K_0402_5%R699 3.3K_0402_5%

1 2

R688

10K_0402_5%

@R688

10K_0402_5%

@

1 2

R353 1M_0402_5%R353 1M_0402_5%

1 2

R734 33_0402_5%R734 33_0402_5%

12

R405 1K_0402_5%

@

R405 1K_0402_5%

@

1 2

U42

MX25L1606EM2I-12G_SO8

SA00003FO10

U42

MX25L1606EM2I-12G_SO8

SA00003FO10

CS#

1

SO

2

WP#

3

GND

4

VCC 8

HOLD# 7

SCLK 6

SI 5

C502

1U_0402_6.3V6K

C502

1U_0402_6.3V6K

1

2

R320 0_0402_5%

@

R320 0_0402_5%

@

12

R650 750_0402_1%R650 750_0402_1%

1 2

U40

MX25L3206EM2I-12G_SO8

SA00003K800

U40

MX25L3206EM2I-12G_SO8

SA00003K800

CS#

1

SO 2

WP#

3

GND

4SI 5

SCLK 6

HOLD#

7

VCC 8

R739 33_0402_5%R739 33_0402_5%

12

R703 3.3K_0402_5%R703 3.3K_0402_5%

1 2

R977

22_0402_5%

@

R977

22_0402_5%

@

1 2

R338 20K_0402_5%R338 20K_0402_5%

1 2

R676

33_0402_5%

R676

33_0402_5%

1 2

R403 10K_0402_5%R403 10K_0402_5%

12

R670

100_0402_1%

@

R670

100_0402_1%

@

12

C756

18P_0402_50V8J

C756

18P_0402_50V8J

1

2

R337 20K_0402_5%R337 20K_0402_5%

1 2

R347 330K_0402_5%R347 330K_0402_5%

1 2

R662 10K_0402_5%R662 10K_0402_5%

12

R638 10M_0402_5%R638 10M_0402_5%

1 2

D5

BAS40-04_SOT23-3

D5

BAS40-04_SOT23-3

1

2

3

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Mini Card 1

On Board WLAN

Reserve for EMI please close to PCH

120MHz for eDP.

Mini Card 1

(On Board WLAN)

Pull up at EC side.

For DDR,EC

Pull down 10K ohm

for using internal Clock

No use PH 10K +3VALW

No use PH 10K +3VALW

S3 reduse

No use PH 10K +3VALWS3 reduse

No use PH 10K +3VALW

PH 2.2K +3VALW

PH 2.2K +3VALW

No use PH 10K +3VS

No use PH 10K +3VALW

No use PH 10K +3VS

No use PH 10K +3VALW

GPIO67

0

1

DIS,Optimus

UMA

DGPU_PRSNT#

No use PH 10K +3VALW

Card Reader

Card Reader

Thunderbolt

Check List R1.0 p.37

Clock Req# pull high power source

CLKIN_GND1_N

CLKIN_GND1_P

AK14:CLKOUT_ITPXDP_N

AK13:CLKOUT_ITPXDP_P

No use PH 10K +3VALW

No use PH 10K +3VALW

No use PH 10K +3VALW

For TP

PCH_SMBCLK

PCH_SMBDATA

XTAL25_IN

XTAL25_OUT

PCH_SML1CLK

PCH_SML1DATA

XCLK_RCOMP

CLK_CPU_DMI

CLK_CPU_DMI#

TB_CLKREQ#

PCIE_PTX_DRX_N2

PCIE_PRX_DTX_P2

PCIE_PRX_DTX_N2

PCIE_PTX_DRX_P2

MINI1_CLKREQ#

PCH_GPIO45

XTAL25_OUT

XTAL25_IN

DRAMRST_CNTRL_PCH

CLK_FLEX2

PCH_SML1CLK

PCH_SML1DATA

EC_SMB_CK2

EC_SMB_DA2

CLKIN_GND1#

CLKIN_GND1

LAN_CLKREQ#

PEG_CLKREQ#

PCH_GPIO73

PCH_GPIO47

SMB_ALERT#

PCH_SMBCLK

PCH_SMBDATA

PCH_SML1CLK

PCH_SML1DATA

PCH_GPIO47

TB_SMB_DA_GPIO6

PCH_GPIO74

PCH_GPIO74

D_CK_SCLK

D_CK_SDATAPCH_SMBDATA

PCH_SMBCLK

CLK_BUF_CPU_DMI#

CLK_BUF_CPU_DMI

CLK_BUF_DREF_96M

CLK_BUF_DREF_96M#

CLK_BUF_PCIE_SATA

CLK_BUF_PCIE_SATA#

CLK_BUF_ICH_14M

CLK_PCI_LPBACK

DRAMRST_CNTRL_PCH

CLK_FLEX1

DGPU_PRSNT#

CLK_CPU_DPLL

CLK_CPU_DPLL#

CLK_FLEX0

DGPU_PRSNT#

TB_SMB_DA_GPIO6

PCH_GPIO73

MINI1_CLKREQ#

LAN_CLKREQ#

CARD_CLKREQ#

MINI2_CLKREQ#

PCIE_PRX_DTX_N5

PCIE_PRX_DTX_P5

PCIE_PTX_DRX_N5

PCIE_PTX_DRX_P5

CLK_TB_REFCLK#

CLK_TB_REFCLK

PEG_CLKREQ#

PCH_GPIO45

TB_CLKREQ#

PCIE_PRX_DTX_P6

PCIE_PRX_DTX_N6

PCIE_PTX_DRX_N6

PCIE_PTX_DRX_P6

PCIE_PRX_DTX_P7

PCIE_PRX_DTX_N7

PCIE_PTX_DRX_N7

PCIE_PTX_DRX_P7

PCIE_PRX_DTX_P8

PCIE_PRX_DTX_N8

PCIE_PTX_DRX_N8

PCIE_PTX_DRX_P8

SMB_ALERT#

PCIE_PTX_DRX_N1

PCIE_PRX_DTX_P1

PCIE_PRX_DTX_N1

PCIE_PTX_DRX_P1

CARD_CLKREQ#

MINI2_CLKREQ#

CLK_CPU_DMI# <5>

CLK_CPU_DMI <5>

PCIE_PRX_DTX_N2<28>

PCIE_PRX_DTX_P2<28>

PCIE_PTX_C_DRX_N2<28>

PCIE_PTX_C_DRX_P2<28>

CLK_PCIE_MINI1#<28>

CLK_PCIE_MINI1<28>

MINI1_CLKREQ#<28>

CLK_PCI_LPBACK <17>

DRAMRST_CNTRL_PCH <11,12,6>

EC_SMB_CK2 <11,24,32>

EC_SMB_DA2 <11,24,32>

D_CK_SDATA <33>

D_CK_SCLK <33>

CLK_CPU_DPLL# <5>

CLK_CPU_DPLL <5>

PCIE_PRX_DTX_N5<24>

PCIE_PRX_DTX_P5<24>

PCIE_PTX_C_DRX_P5<24>

PCIE_PTX_C_DRX_N5<24>

CLK_TB_REFCLK<24>

CLK_TB_REFCLK#<24>

TB_CLKREQ#<24>

PCIE_PRX_DTX_N6<24>

PCIE_PRX_DTX_P6<24>

PCIE_PTX_C_DRX_P6<24>

PCIE_PTX_C_DRX_N6<24>

PCIE_PRX_DTX_N7<24>

PCIE_PRX_DTX_P7<24>

PCIE_PTX_C_DRX_P7<24>

PCIE_PTX_C_DRX_N7<24>

PCIE_PRX_DTX_N8<24>

PCIE_PRX_DTX_P8<24>

PCIE_PTX_C_DRX_P8<24>

PCIE_PTX_C_DRX_N8<24>

PCIE_PRX_DTX_N1<22>

PCIE_PRX_DTX_P1<22>

PCIE_PTX_C_DRX_N1<22>

PCIE_PTX_C_DRX_P1<22>

CARD_CLKREQ#<22>

CLK_PCIE_CARD#<22>

CLK_PCIE_CARD<22>

SMB_ALERT# <33>

TB_SMB_DA_GPIO6<24>

+1.05VS_PCH

+3VS

+VCCSUS3_3

+3VS

+3VS

+3VS

+3VS

+VCCSUS3_3

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (2/8) PCIE, SMBUS, CLK

Custom

14 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (2/8) PCIE, SMBUS, CLK

Custom

14 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (2/8) PCIE, SMBUS, CLK

Custom

14 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

T52 PAD

@T52 PAD

@

R684 10K_0402_5%R684 10K_0402_5%

12

R293 33_0402_5%

@

R293 33_0402_5%

@

12

R330 10K_0402_5%R330 10K_0402_5%

1 2

R383 10K_0402_5%R383 10K_0402_5%

1 2

C688 0.1U_0201_10V6KC688 0.1U_0201_10V6K

1 2

C617 0.1U_0201_10V6KC617 0.1U_0201_10V6K

1 2

R410 10K_0402_5%R410 10K_0402_5%

12

R331 10K_0402_5%R331 10K_0402_5%

1 2

R652 10K_0402_5%R652 10K_0402_5%

12

R387 10K_0402_5%R387 10K_0402_5%

1 2

C678 0.1U_0201_10V6KC678 0.1U_0201_10V6K

1 2

R683 10K_0402_5%R683 10K_0402_5%

1 2

R648 1K_0402_5%R648 1K_0402_5%

1 2

R686 10K_0402_5%R686 10K_0402_5%

12

R611 1M_0402_5%R611 1M_0402_5%

1 2

C572 0.1U_0201_10V6KC572 0.1U_0201_10V6K

1 2

R357 10K_0402_5%R357 10K_0402_5%

1 2

R414 10K_0402_5%R414 10K_0402_5%

12

R345 10K_0402_5%R345 10K_0402_5%

1 2

G

S

D

Q22B

DMN66D0LDW-7_SOT363-6

G

S

D

Q22B

DMN66D0LDW-7_SOT363-6

6 1

2

R292 10K_0402_5%R292 10K_0402_5%

1 2

R424 10K_0402_5%R424 10K_0402_5%

12

S

GD

Q22A

DMN66D0LDW-7_SOT363-6

S

GD

Q22A

DMN66D0LDW-7_SOT363-6

5

3 4

S

GD

Q27A

DMN66D0LDW-7_SOT363-6

S

GD

Q27A

DMN66D0LDW-7_SOT363-6

5

3 4

R647 10K_0402_5%R647 10K_0402_5%

1 2

C683 0.1U_0201_10V6KC683 0.1U_0201_10V6K

1 2

C682 0.1U_0201_10V6KC682 0.1U_0201_10V6K

1 2

T21 PAD

@T21 PAD

@

R610

10K_0402_5%

UMA@

R610

10K_0402_5%

UMA@

12

R369 2.2K_0402_5%R369 2.2K_0402_5%

1 2

R400 10K_0402_5%R400 10K_0402_5%

12

C684 0.1U_0201_10V6KC684 0.1U_0201_10V6K

1 2

C744

8.2P_0402_50V8D

C744

8.2P_0402_50V8D

1

2

C685 0.1U_0201_10V6KC685 0.1U_0201_10V6K

1 2

R628

10K_0402_5%

@

R628

10K_0402_5%

@

12

T53 PAD

@T53 PAD

@

R664 2.2K_0402_5%R664 2.2K_0402_5%

1 2

C686 0.1U_0201_10V6KC686 0.1U_0201_10V6K

1 2

Y1

25MHZ_10PF_7V25000014

Y1

25MHZ_10PF_7V25000014

GND

2

3

311

GND

4

R425 10K_0402_5%R425 10K_0402_5%

12

C681 0.1U_0201_10V6KC681 0.1U_0201_10V6K

1 2

R346 10K_0402_5%R346 10K_0402_5%

1 2

R393 10K_0402_5%R393 10K_0402_5%

1 2

G

S

D

Q27B

DMN66D0LDW-7_SOT363-6

G

S

D

Q27B

DMN66D0LDW-7_SOT363-6

6 1

2

R289

90.9_0402_1%

R289

90.9_0402_1%

1 2

R415

4.7K_0402_5%

R415

4.7K_0402_5%

1 2

R375 2.2K_0402_5%R375 2.2K_0402_5%

1 2

R668 2.2K_0402_5%R668 2.2K_0402_5%

1 2

C745

8.2P_0402_50V8D

C745

8.2P_0402_50V8D

1

2

R427

4.7K_0402_5%

R427

4.7K_0402_5%

1 2

R358 10K_0402_5%R358 10K_0402_5%

1 2

R399 10K_0402_5%R399 10K_0402_5%

12

C421 22P_0402_50V8J

@

C421 22P_0402_50V8J

@

1 2

PCI-E*

CLOCKS

FLEX CLOCKS

SMBUSController

Link

U37B

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

PCI-E*

CLOCKS

FLEX CLOCKS

SMBUSController

Link

U37B

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

PERN1

BG34

PERP1

BJ34

PERN2

BE34

PERP2

BF34

PERN3

BG36

PERP3

BJ36

PERN4

BF36

PERP4

BE36

PERN5

BG37

PERP5

BH37

PERN6

BJ38

PERP6

BG38

PERN7

BG40

PERP7

BJ40

PERN8

BE38

PERP8

BC38

PETN1

AV32

PETP1

AU32

PETN2

BB32

PETP2

AY32

PETN3

AV34

PETP3

AU34

PETN4

AY34

PETP4

BB34

PETN5

AY36

PETP5

BB36

PETN6

AU36

PETP6

AV36

PETN7

AY40

PETP7

BB40

PETN8

AW 38

PETP8

AY38

CLKOUT_PCIE0N

Y40

CLKOUT_PCIE0P

Y39

CLKOUT_PCIE1N

AB49

CLKOUT_PCIE1P

AB47

CLKOUT_PCIE2N

AA48

CLKOUT_PCIE2P

AA47

CLKOUT_PCIE3N

Y37

CLKOUT_PCIE3P

Y36

CLKOUT_PCIE4N

Y43

CLKOUT_PCIE4P

Y45

CLKOUT_PCIE5N

V45

CLKOUT_PCIE5P

V46

CLKIN_DMI2_N BJ30

CLKIN_DMI2_P BG30

CLKIN_DMI_N BF18

CLKIN_DMI_P BE18

CLKIN_DOT_96N G24

CLKIN_DOT_96P E24

CLKIN_SATA_N / CKSSCD_N AK7

CLKIN_SATA_P / CKSSCD_P AK5

XTAL25_IN V47

XTAL25_OUT V49

REFCLK14IN K45

CLKIN_PCILOOPBACK H45

CLKOUT_PEG_A_N AB37

CLKOUT_PEG_A_P AB38

PEG_A_CLKRQ# / GPIO47 M10

PCIECLKRQ0# / GPIO73

J2

PCIECLKRQ1# / GPIO18

M1

PCIECLKRQ2# / GPIO20

V10

PCIECLKRQ3# / GPIO25

A8

PCIECLKRQ4# / GPIO26

L12

PCIECLKRQ5# / GPIO44

L14

CLKOUTFLEX0 / GPIO64 K43

CLKOUTFLEX1 / GPIO65 F47

CLKOUTFLEX2 / GPIO66 H47

CLKOUTFLEX3 / GPIO67 K49

CLKOUT_DMI_N AV22

CLKOUT_DMI_P AU22

PEG_B_CLKRQ# / GPIO56

E6

CLKOUT_PEG_B_P

AB40 CLKOUT_PEG_B_N

AB42

XCLK_RCOMP Y47

CLKOUT_DP_P / CLKOUT_BCLK1_P AM13

CLKOUT_DP_N / CLKOUT_BCLK1_N AM12

CLKOUT_PCIE6N

V40

CLKOUT_PCIE6P

V42

PCIECLKRQ7# / GPIO46

K12

CLKOUT_PCIE7N

V38

CLKOUT_PCIE7P

V37

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AK14

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

AK13

SMBALERT# / GPIO11 E12

SMBCLK H14

SMBDATA C9

SML0ALERT# / GPIO60 A12

SML0CLK C8

SML0DATA G12

SML1ALERT# / PCHHOT# / GPIO74 C13

SML1CLK / GPIO58 E14

SML1DATA / GPIO75 M16

CL_CLK1 M7

CL_DATA1 T11

CL_RST1# P10

PCIECLKRQ6# / GPIO45

T13

C573 0.1U_0201_10V6KC573 0.1U_0201_10V6K

1 2

C687 0.1U_0201_10V6KC687 0.1U_0201_10V6K

1 2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

4mil width and place

within 500mil of the PCH

Can be left NC

when IAMT is not

support on the

platfrom

*

not support AMT APWROK can mux

with PWROK (check list1.0 P.40)

L Disable

Must always PH at +RTCVCC

DSWODVREN - On Die DSW VR Enable

H Enable internal DSW +1.05VS

ALL power OK

tell PCH all power ok

but cpu core

not support

Deep S4,S5 can NC

PCH EDS1.2 P.74

not support Deep S4,S5 mux

with SUS_PWR_DN_ACK

not support Deep S4,S5 DPWROK mux with RSMRST#

check list1.0 P.42

No use PH 10K +3VS

No use PH 10K +3VALW

No use PH 10K +3VALW

Ring Indicator CRB1.0 PH 10K +3VALW

CRB=>1k ohm

Follow Check List R1.5

NC

DMI_IRCOMP

DMI_CRX_PTX_N1

DMI_CRX_PTX_P0

DMI_CRX_PTX_P3

DMI_CTX_PRX_P0

DMI_CRX_PTX_N2

DMI_CRX_PTX_P1

DMI_CTX_PRX_P2

DMI_CTX_PRX_N2

DMI_CTX_PRX_N3

DMI_CTX_PRX_P3

DMI_CRX_PTX_P2

DMI_CTX_PRX_N1

DMI_CRX_PTX_N0

DMI_CTX_PRX_N0

DMI_CTX_PRX_P1

DMI_CRX_PTX_N3

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC1

FDI_LSYNC0

FDI_CTX_PRX_N0

FDI_CTX_PRX_N1

FDI_CTX_PRX_N2

FDI_CTX_PRX_N3

FDI_CTX_PRX_N4

FDI_CTX_PRX_N5

FDI_CTX_PRX_N6

FDI_CTX_PRX_N7

FDI_CTX_PRX_P0

FDI_CTX_PRX_P1

FDI_CTX_PRX_P2

FDI_CTX_PRX_P3

FDI_CTX_PRX_P4

FDI_CTX_PRX_P6

FDI_CTX_PRX_P7

FDI_CTX_PRX_P5

PCH_GPIO72

RI#

DMI2RBIAS

PM_DRAM_PWRGD

PCH_RSMRST#

PBTN_OUT#

PCH_ACIN

DSWODVREN

PCH_PCIE_WAKE#

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

SUS_STAT#

H_PM_SYNC

SUSCLK_R

PCH_GPIO29

XDP_DBRESET#_R

PCH_PCIE_WAKE#

DSWODVREN

CLKRUN#

CLKRUN#

SYS_PWROK

PCH_PWROK

PCH_GPIO29

SYS_PWROK

PCH_PWROK_R

PM_DRAM_PWRGD

PCH_RSMRST#

PCH_GPIO72

PCH_GPIO30

RI#

SLP_A#

SUSACK#_R

PCH_GPIO30

PCH_ACIN

SLP_SUS#

PCH_RSMRST#

DPWROK

PCH_ACIN

DPWROK

SYS_PWROK

VGATE VGATE

DMI_CTX_PRX_N0<4>

DMI_CRX_PTX_N2<4>

DMI_CTX_PRX_N1<4>

DMI_CTX_PRX_N3<4>

DMI_CTX_PRX_N2<4>

DMI_CTX_PRX_P0<4>

DMI_CTX_PRX_P1<4>

DMI_CTX_PRX_P3<4>

DMI_CTX_PRX_P2<4>

DMI_CRX_PTX_N3<4>

DMI_CRX_PTX_N1<4>

DMI_CRX_PTX_N0<4>

DMI_CRX_PTX_P2<4>

DMI_CRX_PTX_P3<4>

DMI_CRX_PTX_P1<4>

DMI_CRX_PTX_P0<4>

FDI_CTX_PRX_N0 <4>

FDI_CTX_PRX_N1 <4>

FDI_CTX_PRX_N2 <4>

FDI_CTX_PRX_N3 <4>

FDI_CTX_PRX_N4 <4>

FDI_CTX_PRX_N5 <4>

FDI_CTX_PRX_N6 <4>

FDI_CTX_PRX_N7 <4>

FDI_CTX_PRX_P0 <4>

FDI_CTX_PRX_P1 <4>

FDI_CTX_PRX_P2 <4>

FDI_CTX_PRX_P3 <4>

FDI_CTX_PRX_P4 <4>

FDI_CTX_PRX_P5 <4>

FDI_CTX_PRX_P6 <4>

FDI_CTX_PRX_P7 <4>

FDI_FSYNC1 <4>

FDI_LSYNC0 <4>

FDI_FSYNC0 <4>

FDI_INT <4>

FDI_LSYNC1 <4>

XDP_DBRESET#<5>

PM_DRAM_PWRGD<5>

PCH_RSMRST#<32>

PBTN_OUT#<32>

ACIN<32,35,38,39>

PCH_PCIE_WAKE# <24,28>

H_PM_SYNC <5>

PM_SLP_S3# <32>

PM_SLP_S4# <32>

PM_SLP_S5# <32>

PCH_PWROK<32>

VGATE<43>

SYS_PWROK <5>

SUSCLK <32>

SUSACK#<32>

SUSWARN#<32>

SLP_SUS# <32>

DPWROK <32>

CLKRUN# <30>

ACPRESENT<32>

+1.05VS_PCH

+RTCVCC

+VCCSUS3_3

+3VS

+3VS

+VCCSUS3_3

+3VALW_PCH

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (3/8) DMI,FDI,PM

Custom

15 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (3/8) DMI,FDI,PM

Custom

15 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (3/8) DMI,FDI,PM

Custom

15 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R402 10K_0402_5%R402 10K_0402_5%

12

C791

100P_0201_25V8J

C791

100P_0201_25V8J

1

2

R360 330K_0402_5%@R360 330K_0402_5%@12

C790

100P_0402_50V8J

C790

100P_0402_50V8J

1

2

R373 200_0402_5%R373 200_0402_5%

12

R426 0_0402_5%

S3@

R426 0_0402_5%

S3@

1 2

R361 330K_0402_5%R361 330K_0402_5%

12

DMI

FDI

System Power Management

U37C

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

DMI

FDI

System Power Management

U37C

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

DMI0RXN

BC24

DMI1RXN

BE20

DMI2RXN

BG18

DMI3RXN

BG20

DMI0RXP

BE24

DMI1RXP

BC20

DMI2RXP

BJ18

DMI3RXP

BJ20

DMI0TXN

AW24

DMI1TXN

AW20

DMI2TXN

BB18

DMI3TXN

AV18

DMI0TXP

AY24

DMI1TXP

AY20

DMI2TXP

AY18

DMI3TXP

AU18

DMI_ZCOMP

BJ24

DMI_IRCOMP

BG25

FDI_RXN0 BJ14

FDI_RXN1 AY14

FDI_RXN2 BE14

FDI_RXN3 BH13

FDI_RXN4 BC12

FDI_RXN5 BJ12

FDI_RXN6 BG10

FDI_RXN7 BG9

FDI_RXP0 BG14

FDI_RXP1 BB14

FDI_RXP2 BF14

FDI_RXP3 BG13

FDI_RXP4 BE12

FDI_RXP5 BG12

FDI_RXP6 BJ10

FDI_RXP7 BH9

FDI_FSYNC0 AV12

FDI_FSYNC1 BC10

FDI_LSYNC0 AV14

FDI_LSYNC1 BB10

FDI_INT AW16

PMSYNCH AP14

SLP_SUS# G16

SLP_S3# F4

SLP_S4# H4

SLP_S5# / GPIO63 D10

SYS_RESET#

K3

SYS_PWROK

P12

PWRBTN#

E20

RI#

A10

WAKE# B9

SUS_STAT# / GPIO61 G8

SUSCLK / GPIO62 N14

ACPRESENT / GPIO31

H20

BATLOW# / GPIO72

E10

PWROK

L22

CLKRUN# / GPIO32 N3

SUSWARN# / SUS_PWR_DN_ACK / GPIO30

K16

RSMRST#

C21

DRAMPWROK

B13

SLP_LAN# / GPIO29 K14

APWROK

L10

DPWROK E22

DMI2RBIAS

BH21

SLP_A# G10

DSWVRMEN A18

SUSACK#

C12

T15 PAD

@

T15 PAD

@

R634 10K_0402_5%R634 10K_0402_5%

12

R395 10K_0402_5%@R395 10K_0402_5%@

1 2

R649 10K_0402_5%R649 10K_0402_5%

12

R421 0_0402_5%

@

R421 0_0402_5%

@

1 2

R382 0_0402_5%

@

R382 0_0402_5%

@

1 2

R653 8.2K_0402_5%R653 8.2K_0402_5%

1 2

C603

.047U_0402_16V7K

@

C603

.047U_0402_16V7K

@

1

2

R681

10K_0402_5%

R681

10K_0402_5%

12

R625 49.9_0402_1%R625 49.9_0402_1%

1 2

R463

100K_0402_5%

R463

100K_0402_5%

12

R680

10K_0402_5%

R680

10K_0402_5%

12

R378 10K_0402_5%R378 10K_0402_5%

12

T51 PAD

@

T51 PAD

@

R656 10K_0402_5%R656 10K_0402_5%

1 2

U39

MC74VHC1G08DFT2G_SC70-5

U39

MC74VHC1G08DFT2G_SC70-5

B

2

A

1Y4

P5

G

3

R456 0_0402_5%R456 0_0402_5%

1 2

R973

0_0402_5%

@R973

0_0402_5%

@

1 2

R632 750_0402_1%R632 750_0402_1%

1 2

R341 10K_0402_5%@R341 10K_0402_5%@12

R372 0_0402_5%

@

R372 0_0402_5%

@

1 2

R412 0_0402_5%

@

R412 0_0402_5%

@

1 2

D19 RB751V-40_SOD323-2

@

D19 RB751V-40_SOD323-2

@21

C789

100P_0402_50V8J

C789

100P_0402_50V8J

1

2

R661 0_0402_5%

@

R661 0_0402_5%

@

1 2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

LVDS disable:

DATA/Clock/Control can NC

VCC_TX_LVDS,VCCA_LVDS connected to GND

CRT disable:

DATA/Clock/Control can NC

DAC_IREF still need PD

VCCADAC connected to +3VS

SDVO_CTRLDATA strap pull high

at level shift page

HDMI D2

HDMI D1

HDMI D0

HDMI CLK

UMA Panel Backlight ON/OFF

PD 100K

at EC side

Thunderbolt

For CRT diable

=>Change 1K 0.5% to 5%

Delete LVDS function

PCH_DPB_N3

PCH_DPB_P0

PCH_DPB_P1

PCH_DPB_N2

PCH_DPB_P3

PCH_DPB_N1

PCH_DPB_P2

PCH_DPB_N0

PCH_DPB_HPD

SDVO_SDATA

SDVO_SCLK

CRT_IREF

IGPU_BKLT_EN

IGPU_BKLT_ENENBKL

PCH_DPD_N3

PCH_DPD_P3

PCH_DPD_N2

PCH_DPD_P2

PCH_DPD_N1

PCH_DPD_P1

PCH_DPD_N0

PCH_DPD_P0

PCH_DPD_AUXN

PCH_DPD_AUXP

DPD_HPD

PCH_DPD_CLK

PCH_DPD_DAT

PCH_DPD_DAT

PCH_DPD_CLK

SDVO_SCLK <23>

SDVO_SDATA <23>

PCH_DPB_HPD <23>

PCH_ENVDD<22>

DPST_PWM<22>

PCH_DPB_N1 <23>

PCH_DPB_N3 <23>

PCH_DPB_P1 <23>

PCH_DPB_P3 <23>

PCH_DPB_N0 <23>

PCH_DPB_P0 <23>

PCH_DPB_N2 <23>

PCH_DPB_P2 <23>

ENBKL<32>

PCH_DPD_N3 <24>

PCH_DPD_P3 <24>

PCH_DPD_N2 <24>

PCH_DPD_P2 <24>

PCH_DPD_N1 <24>

PCH_DPD_P1 <24>

PCH_DPD_N0 <24>

PCH_DPD_P0 <24>

PCH_DPD_AUXN <24>

PCH_DPD_AUXP <24>

DPD_HPD <24>

PCH_DPD_DAT <25>

PCH_DPD_CLK <25>

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (4/9) LVDS,CRT,DP,HDMI

Custom

16 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (4/9) LVDS,CRT,DP,HDMI

Custom

16 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (4/9) LVDS,CRT,DP,HDMI

Custom

16 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R307

1K_0402_5%

R307

1K_0402_5%

12

R252 2.2K_0402_5%R252 2.2K_0402_5%

1 2

R254 2.2K_0402_5%R254 2.2K_0402_5%

1 2

LVDS

Digital Display Interface

CRT

U37D

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

LVDS

Digital Display Interface

CRT

U37D

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

L_BKLTCTL

P45

L_BKLTEN

J47

L_CTRL_CLK

T45

L_CTRL_DATA

P39

L_DDC_CLK

T40

L_DDC_DATA

K47

L_VDD_EN

M45

LVDSA_CLK#

AK39

LVDSA_CLK

AK40

LVDSA_DATA#0

AN48

LVDSA_DATA#1

AM47

LVDSA_DATA#2

AK47

LVDSA_DATA#3

AJ48

LVDSA_DATA0

AN47

LVDSA_DATA1

AM49

LVDSA_DATA2

AK49

LVDSA_DATA3

AJ47

LVDSB_CLK#

AF40

LVDSB_CLK

AF39

LVDSB_DATA#0

AH45

LVDSB_DATA#1

AH47

LVDSB_DATA#2

AF49

LVDSB_DATA#3

AF45

LVDSB_DATA0

AH43

DDPB_0N AV42

DDPB_1N AV45

LVD_VREFH

AE48

LVD_VREFL

AE47

DDPD_2N BF42

DDPD_3N BJ42

DDPB_2N AU48

DDPB_3N AV47

DDPC_0N AY47

DDPC_1N AY43

DDPC_2N BA47

DDPC_3N BB47

DDPD_0N BB43

DDPD_1N BF44

DDPB_0P AV40

DDPB_1P AV46

DDPD_2P BE42

DDPD_3P BG42

DDPB_2P AU47

DDPB_3P AV49

LVDSB_DATA1

AH49

LVDSB_DATA2

AF47

LVDSB_DATA3

AF43

LVD_IBG

AF37

LVD_VBG

AF36

DDPC_1P AY45

DDPC_0P AY49

DDPC_2P BA48

DDPC_3P BB49

DDPD_0P BB45

DDPD_1P BE44

CRT_BLUE

N48

CRT_DDC_CLK

T39

CRT_DDC_DATA

M40

CRT_GREEN

P49

CRT_HSYNC

M47

CRT_IRTN

T42

CRT_RED

T49

CRT_VSYNC

M49

DAC_IREF

T43

SDVO_CTRLCLK P38

SDVO_CTRLDATA M39

DDPC_CTRLCLK P46

DDPC_CTRLDATA P42

DDPD_CTRLCLK M43

DDPD_CTRLDATA M36

DDPB_AUXN AT49

DDPC_AUXN AP47

DDPD_AUXN AT45

DDPB_AUXP AT47

DDPC_AUXP AP49

DDPD_AUXP AT43

DDPB_HPD AT40

DDPC_HPD AT38

DDPD_HPD BH41

SDVO_TVCLKINP AP45

SDVO_TVCLKINN AP43

SDVO_STALLP AM40

SDVO_STALLN AM42

SDVO_INTP AP40

SDVO_INTN AP39

R612 0_0402_5%@R612 0_0402_5%@

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

USB3 ( side)

Within 500 mils

CMOS Camera (LVDS)

WLAN USB(Bluetooth)

Debug Port

Bit11

GNT1#/

GPIO51

Internal

PH

Boot BIOS Strap

Bit10

0 1

Boot BIOS

Destination

Reserved

PCI

SPI

LPC

USB3 ( side)

Some PCH config not support USB port 6 & 7.

EHCI 1

EHCI 2

Used as GPIO only.

PH(Internal PH), GPIO PH +3VS

Only GPIO

function

Used as GPIO only. External pull-up of

8.2 kOhms to 10 kOhms to +V3.3S required.

PCI Interrupt Requests

GPIO51GPIO19

*

1

1 1

0

00

USB3 ( side)

USB3 ( side)

USB3.0

Set to Vcc when HIGH

DMI,FDI Termination Voltage

DF_TVS Set to Vss when LOW

DG1.2 CRB1.0 PH 2.2K series 1K

For 2012 support

CLOSE TO THE BRANCHING POINT

BE28:USB3Rn1

BC30:USB3Rn2

BE32:USB3Rn3

BJ32:USB3Rn4

BC28:USB3Rp1

BE30:USB3Rp2

BF32:USB3Rp3

BG32:USB3Rp4

AV26:USB3Tn1

BB26:USB3Tn2

AU28:USB3Tn3

AY30:USB3Tn4

AU26:USB3Tp1

AY26:USB3Tp2

AV28:USB3Tp3

AW30:USB3Tp4

Mini Card (mSATA)

USBRBIAS

PLT_RST#

PCI_PIRQA#

PCI_PIRQD#

PCI_PIRQC#

PCI_PIRQB#

ODD_DA#

PCH_GPIO4

PCH_GPIO52

CLK_PCI0

CLK_PCI1

CLK_PCI2

CLK_PCI3

CLK_PCI4

USB20_P0

USB20_N0

USB_OC7#

USB_OC4#

USB_OC5#

USB_OC6#

USB_OC3#

USB_OC1#

USB_OC0#

USB_OC2#

PCH_GPIO53

DF_TVS

CLK_PCI_LPBACK

CLK_PCI_LPC

USB20_N10

USB20_P10

USB20_N1

USB20_P1

DGPU_PWR_EN

DGPU_HOLD_RST#

DGPU_HOLD_RST#

PCH_GPIO53

PCH_GPIO5

PCH_GPIO52

DGPU_PWR_EN

PCH_GPIO5

PCI_PIRQC#

PCI_PIRQB#

PCI_PIRQA#

PCI_PIRQD#

PCH_GPIO4

ODD_DA#

PCH_GPIO51

PCH_GPIO55

PCH_GPIO55

PCH_GPIO51

PCH_USB3_TX1_P

PCH_USB3_TX2_P

PCH_USB3_RX1_P

PCH_USB3_RX2_P

PCH_USB3_TX1_N

PCH_USB3_TX2_N

PCH_USB3_RX1_N

PCH_USB3_RX2_N

USB20_N9

USB20_P9

USB_OC0#

USB_OC7#

USB_OC5#

USB_OC2#

USB_OC4#

USB_OC3#

USB_OC1#

USB_OC6#

PCH_GPIO2

PCH_GPIO2

CLK_PCI_TXM

USB20_N8

USB20_P8

PLT_RST#

IRST_RST#

IRST_RST_R#

USB20_N0 <31>

USB20_P0 <31>

CLK_PCI_LPBACK<14>

CLK_PCI_LPC<32>

USB20_N10 <22>

USB20_P10 <22>

PLT_RST#<22,24,30,32,5>

USB20_N1 <31>

USB20_P1 <31>

PLT_RST_BUF# <28>

PCH_USB3_TX1_P<31>

USB_OC0# <31>

PCH_USB3_TX2_P<31>

PCH_USB3_RX2_P<31>

PCH_USB3_RX1_P<31>

PCH_USB3_TX2_N<31>

PCH_USB3_TX1_N<31>

PCH_USB3_RX2_N<31>

PCH_USB3_RX1_N<31>

USB20_N9 <31>

USB20_P9 <31>

H_SNB_IVB# <5>

CLK_PCI_TXM<30>

USB20_N8 <28>

USB20_P8 <28>

IRST_RST#<32>

+3VS

+3VS

+3VS

+1.8VS

+VCCSUS3_3

+VCCSUS3_3

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (5/9) PCI, USB, NVRAM

Custom

17 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (5/9) PCI, USB, NVRAM

Custom

17 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (5/9) PCI, USB, NVRAM

Custom

17 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

RSVD

NVRAM

PCI

USB

U37E

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

RSVD

NVRAM

PCI

USB

U37E

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

NV_ALE AV5

NV_CE#0 AY7

NV_CE#1 AV7

NV_CE#2 AU3

NV_CE#3 BG4

NV_CLE AY1

NV_DQS0 AT10

NV_DQS1 BC8

NV_DQ0 / NV_IO0 AU2

NV_DQ1 / NV_IO1 AT4

NV_DQ10 / NV_IO10 BB5

NV_DQ11 / NV_IO11 BB3

NV_DQ12 / NV_IO12 BB7

NV_DQ13 / NV_IO13 BE8

NV_DQ14 / NV_IO14 BD4

NV_DQ15 / NV_IO15 BF6

NV_DQ2 / NV_IO2 AT3

NV_DQ3 / NV_IO3 AT1

NV_DQ4 / NV_IO4 AY3

NV_DQ5 / NV_IO5 AT5

NV_DQ6 / NV_IO6 AV3

NV_DQ7 / NV_IO7 AV1

NV_DQ8 / NV_IO8 BB1

NV_DQ9 / NV_IO9 BA3

NV_RB# AT8

NV_RCOMP AV10

NV_RE#_WRB0 AY5

NV_RE#_WRB1 BA2

NV_WE#_CK0 AT12

NV_WE#_CK1 BF3

PIRQA#

K40

PIRQB#

K38

PIRQC#

H38

PIRQD#

G38

REQ1# / GPIO50

C46

REQ2# / GPIO52

C44

REQ3# / GPIO54

E40

GNT1# / GPIO51

D47

GNT2# / GPIO53

E42

GNT3# / GPIO55

F46

PIRQE# / GPIO2

G42

PIRQF# / GPIO3

G40

PIRQG# / GPIO4

C42

PIRQH# / GPIO5

D44

USBP0N C24

USBP0P A24

USBP1N C25

USBP1P B25

USBP2N C26

USBP2P A26

USBP3N K28

USBP3P H28

USBP4N E28

USBP4P D28

USBP5N C28

USBP5P A28

USBP6N C29

USBP6P B29

USBP7N N28

USBP7P M28

USBP8N L30

USBP8P K30

USBP9N G30

USBP9P E30

USBP10N C30

USBP10P A30

USBP11N L32

USBP11P K32

USBP12N G32

USBP12P E32

USBP13N C32

USBP13P A32

PME#

K10

CLKOUT_PCI0

H49

CLKOUT_PCI1

H43

CLKOUT_PCI2

J48

USBRBIAS# C33

USBRBIAS B33

OC0# / GPIO59 A14

OC1# / GPIO40 K20

OC2# / GPIO41 B17

OC3# / GPIO42 C16

OC4# / GPIO43 L16

OC5# / GPIO9 A16

OC6# / GPIO10 D14

OC7# / GPIO14 C14

CLKOUT_PCI4

H40 CLKOUT_PCI3

K42

PLTRST#

C6

TP1

BG26

TP2

BJ26

TP3

BH25

TP6

AH38

TP7

AH37

TP8

AK43

TP9

AK45

TP16

Y13

TP17

K24

TP18

L24

TP19

AB46

TP20

AB45

TP21

B21

TP22

M20

TP23

AY16

TP25

BE28

TP26

BC30

TP27

BE32

TP28

BJ32

TP29

BC28

TP30

BE30

TP31

BF32

TP32

BG32

TP33

AV26

TP34

BB26

TP35

AU28

TP36

AY30

TP37

AU26

TP38

AY26

TP39

AV28

TP40

AW30

TP4

BJ16

TP5

BG16

TP15

AM5 TP14

AM4 TP13

AH12 TP12

H3 TP11

N30 TP10

C18

TP24

BG46

R620 22.6_0402_1%R620 22.6_0402_1%

1 2

T7PAD @T7PAD @

R439 8.2K_0402_5%R439 8.2K_0402_5%

1 2

R651

2.2K_0402_5%

R651

2.2K_0402_5%

12

R374 10K_0402_5%R374 10K_0402_5%

12

R442 8.2K_0402_5%R442 8.2K_0402_5%

1 2

R428 8.2K_0402_5%R428 8.2K_0402_5%

1 2

R376

100K_0402_5%

R376

100K_0402_5%

12

R654 1K_0402_5%R654 1K_0402_5%

12

R371

0_0402_5%

@

R371

0_0402_5%

@

12

R443 8.2K_0402_5%R443 8.2K_0402_5%

1 2

T13PAD @T13PAD @

R444 8.2K_0402_5%R444 8.2K_0402_5%

1 2

R431 8.2K_0402_5%R431 8.2K_0402_5%

1 2

R401 10K_0402_5%R401 10K_0402_5%

12

R445 8.2K_0402_5%R445 8.2K_0402_5%

1 2

R386 10K_0402_5%R386 10K_0402_5%

12

U26

MC74VHC1G08DFT2G_SC70-5

U26

MC74VHC1G08DFT2G_SC70-5

B

2

A

1Y4

P5

G

3

R432 8.2K_0402_5%R432 8.2K_0402_5%

1 2

R446 10K_0402_5%R446 10K_0402_5%

12

R447 10K_0402_5%R447 10K_0402_5%

12

R433 8.2K_0402_5%R433 8.2K_0402_5%

1 2

R423 8.2K_0402_5%R423 8.2K_0402_5%

1 2

R604 22_0402_5%R604 22_0402_5%

12

R310 8.2K_0402_5%R310 8.2K_0402_5%

1 2

R448 10K_0402_5%R448 10K_0402_5%

12

R462 0_0402_5%@R462 0_0402_5%@

1 2

R267 10K_0402_5%R267 10K_0402_5%

1 2

T8PAD @T8PAD @

R384 10K_0402_5%R384 10K_0402_5%

12

R434 8.2K_0402_5%R434 8.2K_0402_5%

1 2

R461 0_0402_5%R461 0_0402_5%

1 2

R435 8.2K_0402_5%R435 8.2K_0402_5%

1 2

R316 22_0402_5%R316 22_0402_5%

1 2

R327 22_0402_5%R327 22_0402_5%

1 2

R379 10K_0402_5%R379 10K_0402_5%

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

*

This signal has a weak internal pull up

On-Die PLL Voltage Regulator

L On-Die PLL Voltage Regulator disable

GPIO28

H On-Die PLL voltage regulator enable

INIT3_3V

This signal has weak internal

PU, can't pull low,leave NC

PCH_GPIO27 (Have internal Pull-High)

Deep S4,S5 wake event signal

No use PD to GND,HR Check list1.0 P.70

TS_VSS1~4

PD to GND

PECI CPU-EC

Check list1.0 P.59

CTRL+ALT+DEL

non CPU power ok

130c shut sown

HDA_SYNC PH(PLL =+1.5VS)

Deep S4,S5 wake event signal

RTC alarm,Power BTN,GPIO27

GPIO24 Unmultiplexed

NOTE: GPIO24 configuration

register bits are not cleared by

CF9h reset event.

CRB1.0 PH10K to +3VALW

No use can NC(+3VS power plane)

No use PH 10K +3VS

No use PH 10K +3VALW

No use PD 10K to GND

No use PH 10K +3VS

Can't PH

CRB1.0 PH 10K +3VALW

Can't PH

No use PH 10K +3VS

SATA5GP&TEMP_ALERT# CRB PH 10K +3VS

No use PH +3VALW

No use PH +3VS

No use PH +3VALW

No use PH 10K +3VS

No use PH 10K +3VS

No use PH 10K +3VS

No use PH 10K +3VS

No use PH 10K +3VS

GPIO38

0

1

*

Muxless

nonMuxless

OPTIMUS_EN#

Optimus(L)/ non optimus(H)

Project ID GPIO70

0

GPIO69

x

*

SATA2GP/GPIO36,SATA3GP/GPIO37

1.Used as for Mechanical Presence detect -

Use a weak external pull-up (150K-200k Ohms) to Vcc3_3

or use 10K external pull-up that is enabled only

after PLTRST# de-assertion.

2.Used as GP Input (Pin HW default) -

Ensure GPI is not driven high during strap sampling window

3.Unused as GPIO or SATA*GP -

Use 8.2K-10K pull-down to ground.

x

0

0

0

1

11

1

Debug Port DG 1.2 PH 4.7K +3VALW_PCH

x

GPIO36/GPIO37 is Strap functionality

that requires internal pull down to be sampled at rising PWROK.

When uses as SATA2GP/SATA3GP for mechanical presence detect

-use a external pull up 150K-200K ohm to Vcc3_3

When used as GP input

-ensure GPI is not driven high during strap sampling window

When Unused as GPIO or SATA*GP

-use 8.2K-10K pull-down

check list page 47

HR Check List

GPIO24

0

1

DDR3L(Q3ZMC)

*

DDR3

PCH_GPIO24

0

0

0

0

1

1

0

GPIO22GPIO23GPIO39

0

0

EC LID SW OUT

No use PH +3VALW

Remove NCTF test point

2011/9/23

LVDS/eDP

LVDS

eDP 0

1

GPIO71

Define Q5LJ1(DDR3) or Q3ZMC(DDR3L)

Elpida DDP 1GB*8 (Ch A,B)

Elpida DDP 1GB*4 (Ch A)

Elpida Mono 512MB*8(Ch A,B)

x

0 1 1

Hynix Mono 512MB*8(Ch A,B)

For eDP only,

eDP or LVDS

PCH_THRMTRIP#_R

EC_SCI#

PCH_GPIO39

TB_SMB_CK_GPIO7

PCH_GPIO28

PCH_GPIO34

PCH_PECI_R

PCH_GPIO71

EC_KBRST#

H_THRMTRIP#

EC_SMI#

DGPU_PWROK

DGPU_HPD_INT#

PCH_GPIO1

WWAN_OFF#

OPTIMUS_EN#

PCH_GPIO27

RAID0_DET

PCH_GPIO57

PCH_GPIO48

PCH_GPIO24

PCH_GPIO22

TB_FORCE_PWR

WWAN_OFF#

PCH_GPIO27

PCH_GPIO1

DGPU_HPD_INT#

PCH_GPIO34

PCH_GPIO48

PCH_GPIO57

EC_LID_OUT#

TB_FORCE_PWR

DGPU_PWROK

TB_SMB_CK_GPIO7

ODD_DETECT#

MSATA_DET#

PCH_GPIO69

PCH_GPIO70

ODD_EN#

MSATA_DET#

TB_PLUG_EVENT

OPTIMUS_EN#

EC_KBRST#

PCH_GPIO28

ODD_DETECT#

OPTIMUS_EN#

PCH_GPIO69 PCH_GPIO70

PCH_GPIO24

PCH_GPIO23

PCH_GPIO39

PCH_GPIO22

TB_PLUG_EVENT

ODD_EN#

EC_LID_OUT#

PCH_GPIO71

GATEA20 <32>

EC_SCI#<32>

H_PECI <32,5>

H_CPUPWRGD <5>

EC_KBRST# <32>

H_THRMTRIP# <5>

EC_SMI#<32>

PCH_GPIO23 <13>

TB_PLUG_EVENT<24>

EC_LID_OUT#<32>

MSATA_DET#<29>

RAID0_DET<29>

TB_FORCE_PWR<24>

TB_SMB_CK_GPIO7<24>

+3VS

+3VS

+3VS

+3VS

+3VS +3VS

+VCCSUS3_3

+3VS

+3VS

+VCCSUS3_3

+VCCSUS3_3

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (6/9) GPIO, CPU, MISC

Custom

18 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (6/9) GPIO, CPU, MISC

Custom

18 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (6/9) GPIO, CPU, MISC

Custom

18 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R420 10K_0402_5%R420 10K_0402_5%

1 2

R2480_0402_5%

@

R2480_0402_5%

@

1 2

R618

10K_0402_5%

@

R618

10K_0402_5%

@

1 2

R619

10K_0402_5%

R619

10K_0402_5%

1 2

R391 1K_0402_5%R391 1K_0402_5%

1 2

R385 390_0402_5%R385 390_0402_5%

1 2

R274 10K_0402_5%X76@R274 10K_0402_5%X76@

1 2

R275 10K_0402_5%X76@R275 10K_0402_5%X76@

1 2

R305 10K_0402_5%R305 10K_0402_5%

1 2

R278 10K_0402_5%X76@R278 10K_0402_5%X76@

1 2

R279 10K_0402_5%X76@R279 10K_0402_5%X76@

1 2

R281 10K_0402_5%X76@R281 10K_0402_5%X76@

1 2

R282 10K_0402_5%X76@R282 10K_0402_5%X76@

1 2

R617

10K_0402_5%

@R617

10K_0402_5%

@

12

R364 10K_0402_5%R364 10K_0402_5%

1 2

R430 10K_0402_5%

@

R430 10K_0402_5%

@

1 2

R406 10K_0402_5%@R406 10K_0402_5%@

1 2

R326 10K_0402_5%R326 10K_0402_5%

1 2

R614 10K_0402_5%R614 10K_0402_5%

1 2

R621

10K_0402_5%

R621

10K_0402_5%

1 2

R397 10K_0402_5%R397 10K_0402_5%

1 2

R429 10K_0402_5%

UMA@

R429 10K_0402_5%

UMA@

1 2

R422

4.7K_0402_5%

R422

4.7K_0402_5%

12

R657 10K_0402_5%@R657 10K_0402_5%@

1 2

R404 10K_0402_5%R404 10K_0402_5%

1 2

R457 10K_0402_5%

DDR3L@

R457 10K_0402_5%

DDR3L@

1 2

R363 10K_0402_5%R363 10K_0402_5%

1 2

R458 10K_0402_5%

DDR3@

R458 10K_0402_5%

DDR3@

1 2

R417

1K_0402_5%

@

R417

1K_0402_5%

@

1 2

R679 10K_0402_5%R679 10K_0402_5%

1 2

R675 10K_0402_5%R675 10K_0402_5%

1 2

CPU/MISC

NCTF

GPIO

U37F

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

CPU/MISC

NCTF

GPIO

U37F

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

GPIO27

E16

GPIO28

P8

GPIO24 / MEM_LED

E8

GPIO57

D6

LAN_PHY_PWR_CTRL / GPIO12

C4

VSS_NCTF_1

A4

VSS_NCTF_2

A44

VSS_NCTF_3

A45

VSS_NCTF_4

A46

VSS_NCTF_5

A5

VSS_NCTF_6

A6

VSS_NCTF_7

B3

VSS_NCTF_8

B47

VSS_NCTF_9

BD1

VSS_NCTF_10

BD49

VSS_NCTF_11

BE1

VSS_NCTF_12

BE49

TACH2 / GPIO6

H36

TACH0 / GPIO17

D40

TACH3 / GPIO7

E38

SATA3GP / GPIO37

M5

SATA5GP / GPIO49

V3

SCLOCK / GPIO22

T5

SLOAD / GPIO38

N2

SDATAOUT0 / GPIO39

M3

SDATAOUT1 / GPIO48

V13

PROCPWRGD AY11

RCIN# P5

PECI AU16

THRMTRIP# AY10

GPIO8

C10

BMBUSY# / GPIO0

T7

GPIO15

G2

TACH1 / GPIO1

A42

SATA2GP / GPIO36

V8

INIT3_3V# T14

STP_PCI# / GPIO34

K1

GPIO35

K4

SATA4GP / GPIO16

U2

VSS_NCTF_32 F49

A20GATE P4

TACH4 / GPIO68 C40

TACH6 / GPIO70 C41

TACH7 / GPIO71 A40

TACH5 / GPIO69 B41

VSS_NCTF_17 BH3

VSS_NCTF_18 BH47

VSS_NCTF_19 BJ4

VSS_NCTF_20 BJ44

VSS_NCTF_21 BJ45

VSS_NCTF_22 BJ46

VSS_NCTF_23 BJ5

VSS_NCTF_24 BJ6

VSS_NCTF_25 C2

VSS_NCTF_26 C48

VSS_NCTF_27 D1

VSS_NCTF_28 D49

VSS_NCTF_29 E1

VSS_NCTF_30 E49

VSS_NCTF_31 F1

NC_4 AK10

NC_3 AH10

NC_2 AK11

NC_1 AH8

NC_5 P37

VSS_NCTF_13

BF1

VSS_NCTF_14

BF49

VSS_NCTF_15 BG2

VSS_NCTF_16 BG48

R419

10K_0402_5%

R419

10K_0402_5%

1 2

R663 10K_0402_5%R663 10K_0402_5%

1 2

R362 10K_0402_5%R362 10K_0402_5%

1 2

R324 10K_0402_5%R324 10K_0402_5%

1 2

R616

10K_0402_5%

@R616

10K_0402_5%

@

12

R615

10K_0402_5%

@

R615

10K_0402_5%

@

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

1.05

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

Voltage Rail

VccCore

VccDMI

1.05

5

3.3

0.001

0.266

0.001

0.08

1.3

0.042

5

Voltage

S0 Iccmax

Current(A)

VccIO 2.925

VccASW 1.01

VccSPI 0.02

VccDSW 0.003

1.8 0.19VccpNAND

VccRTC 6 uA

VccSus3_3

3.3 / 1.5VccSusHDA

0.266

0.01

VccVRM 1.8 / 1.5 0.16

VccCLKDMI

VccALVDS

VccTX_LVDS 0.06

0.001

0.02

PCH Power Rail Table

VCCVRM = 160mA detal waiting for newest spec

VccSSC 0.095

VccDIFFCLKN 0.055

VCCVRM==>1.5V FOR MOBILE

VCCVRM==>1.8V FOR DESKTOP

PPT:1700mA

CPT:1300mA

PPT:63mA

CPT:1mA

1mA

40mA

PPT:3711mA

CPT:3709mA

PPT:47mA

CPT:42mA

2mA

10mA

228mA

Thermal Senser share with VCCADAC power rail

so can't remove this power

HDA_SYNC PH(PLL =+1.5VS)

VccDFTERM should PH +1.8VS or +3VS

For SPI control logi

Core Well I/O Buffer

DMI buffer logic

Internal PLL and VRM(+1.5VS)

I/O Buffer Voltage

I/O Buffer Voltage

1.8 V Internal PLL and VRMs (1.8 V for

Desktop)

Processor I/F

PCH Core Well Reference Voltage

Suspend Well Reference Voltag

Display DAC Analog Power. This power is

supplied by the core well.

Display PLL A power

Display PLL B power

Internal Logic Voltage

DMI Buffer Voltage

Core Well I/O buffers

1.05 V Supply for Intel R Management

Engine and Integrated LAN

3.3 V Supply for SPI Controller Logic

3.3v supply for Deep S4/S5 well

1.8V power supply for DF_TVS

Battery Voltage

Suspend Well I/O Buffer Voltage

High Definition Audio Controller Suspend

Voltage

DMI Clock Buffer Voltage

Spread Modulators Power Supply

Differential Clock Buffers Power Supply

Analog power supply for LVDS (Mobile

Only)

Analog power supply for LVDS (Mobile

Only)

place

near AT20

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2

,VCCAPLLSATA

On-Die PLL Voltage Regulator

H On-Die PLL voltage regulator enable

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2

,VCCAPLLSATA

On-Die PLL Voltage Regulator

H On-Die PLL voltage regulator enable

3.3

1.05

1.05

1.05

1.05

1.05

3.3

3.3

3.3

3.3

1.05

1.05

1.05

3.3

1.8

0.001

0.001

0.08

Place Near AA23

Place Near AN16,AN21,AN33

Place Near

BH29

Place Near U48

Place Near AM37

Place Near V33

Trace 20mil

Near

AU20

place

near AG16

place

near AB36

Trace 20mil

VCCPNAND change to VccDFTERM

PPT:167mA

CPT:175mA

+VCCAPLLEXP

+1.05VS_PCH +VCCADAC

+VCCA_LVDS

+1.05VS_VCCAPLL_FDI

+VCCTX_LVDS

+VCCAFDI_VRM

+1.5VS

+1.05VS_VCCPP

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+3VS

+1.8VS

+3VS

+3VS

+3VS

+1.8VS

+3VS

+1.05VS_PCH

+1.05VS_PCH

+VCCAFDI_VRM

+VCCAFDI_VRM

+VCCAFDI_VRM

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (7/9) PWR

Custom

19 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (7/9) PWR

Custom

19 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (7/9) PWR

Custom

19 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

T33PAD @T33PAD @

C505

0.1U_0201_10V6K

C505

0.1U_0201_10V6K

1

2

C419

0.01U_0402_16V7K

C419

0.01U_0402_16V7K

1

2

POWER

VCC CORE

DMI

VCCIO

CRTLVDS

FDI

NAND / SPI HVCMOS

U37G

COUGARPOINT_FCBGA989~D

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!

SA00005AGI0

HM77@

POWER

VCC CORE

DMI

VCCIO

CRTLVDS

FDI

NAND / SPI HVCMOS

U37G

COUGARPOINT_FCBGA989~D

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!

SA00005AGI0

HM77@

VCCCORE[1]

AA23

VCCCORE[2]

AC23

VCCCORE[3]

AD21

VCCCORE[4]

AD23

VCCCORE[5]

AF21

VCCCORE[6]

AF23

VCCCORE[7]

AG21

VCCCORE[8]

AG23

VCCCORE[9]

AG24

VCCCORE[10]

AG26

VCCCORE[11]

AG27

VCCCORE[12]

AG29

VCCCORE[13]

AJ23

VCCCORE[14]

AJ26

VCCCORE[15]

AJ27

VCCPNAND[4] AJ17

VCCPNAND[3] AJ16

VCCIO[17]

AN21

VCCIO[18]

AN26

VCCIO[19]

AN27

VCCIO[20]

AP21

VCCIO[23]

AP26

VCCIO[24]

AT24

VCCIO[15]

AN16

VCCIO[16]

AN17

VCCIO[21]

AP23

VCCIO[22]

AP24

VCCADAC U48

VCCTX_LVDS[1] AM37

VCCTX_LVDS[2] AM38

VCCALVDS AK36

VCCVRM[3] AT16

VCCVRM[2]

AP16

VCCAPLLEXP

BJ22

VCCFDIPLL

BG6

VCCIO[28]

AN19 VCCTX_LVDS[4] AP37

VCCTX_LVDS[3] AP36

VSSADAC U47

VSSALVDS AK37

VCCIO[27]

AP17

VCC3_3[6] V33

VCC3_3[7] V34

VCC3_3[3]

BH29 VCCPNAND[2] AG17

VCCPNAND[1] AG16

VCCDMI[1] AT20

VCCIO[25]

AN33

VCCIO[26]

AN34

VCCCORE[16]

AJ29

VCCCORE[17]

AJ31

VCCSPI V1

VCCIO[1] AB36

VCCDMI[2]

AU20

R272 0_0402_5%LVDS@R272 0_0402_5%LVDS@

1 2

R270

0_0402_5%

eDP@

R270

0_0402_5%

eDP@

12

T14PAD

@

T14PAD

@

C749

0.1U_0201_10V6K

C749

0.1U_0201_10V6K

1

2

C474

1U_0201_4V6M

C474

1U_0201_4V6M

1

2

R394 0_0402_5%@R394 0_0402_5%@

1 2

L23

MBK1608221YZF_2P

L23

MBK1608221YZF_2P

12

C523

0.1U_0201_10V6K

C523

0.1U_0201_10V6K

1

2

C480

1U_0201_4V6M

C480

1U_0201_4V6M

1

2

C491

1U_0201_4V6M

C491

1U_0201_4V6M

1

2

R280

0_0402_5%

eDP@

R280

0_0402_5%

eDP@

12

C420

.1U_0402_16V7K

C420

.1U_0402_16V7K

1

2

C543

10U_0603_6.3V6M

C543

10U_0603_6.3V6M

1

2

J3

PAD-OPEN 4x4m

@

JUMP_43X79

J3

PAD-OPEN 4x4m

@

JUMP_43X79

12

C754

10U_0603_6.3V6M

C754

10U_0603_6.3V6M

12

C517

1U_0201_4V6M

C517

1U_0201_4V6M

1

2

C492

1U_0201_4V6M

C492

1U_0201_4V6M

1

2

C477

1U_0201_4V6M

C477

1U_0201_4V6M

1

2

C418

10U_0603_6.3V6M

C418

10U_0603_6.3V6M

1

2

C486

1U_0201_4V6M

C486

1U_0201_4V6M

1

2

C449

0.1U_0201_10V6K

C449

0.1U_0201_10V6K

1

2

C496

1U_0201_4V6M

@

C496

1U_0201_4V6M

@

1

2

R271 0_0402_5%LVDS@R271 0_0402_5%LVDS@

1 2

C770

1U_0402_6.3V6K

C770

1U_0402_6.3V6K

1

2

C519

1U_0201_4V6M

C519

1U_0201_4V6M

1

2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

1mA

1mA

903mA

1mA

PPT:80mA

CPT:75mA

55mA

95mA

1mA

10mA Need +3VALW and 0.1U close PCH

Near P32

Place near

AA16,W16

Place near

T34

Place near

AJ2

Not support Deep S4,S5

connect to +3VALW

suppied by internal

1.05V VR must NC

+1.05V analog

internal clock PLL

Can NC

Place

near BJ8

Near P24Near T23VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2

,VCCAPLLSATA

GPIO28

On-Die PLL Voltage Regulator

H On-Die PLL voltage regulator enable

suppied by internal

1.05V VR Must NC

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2

,VCCAPLLSATA

GPIO28

On-Die PLL Voltage Regulator

H On-Die PLL voltage regulator enable

Place

near AF33,

AF34,AG34

Place

near AF17

isolation between SSC (AG33)

and DIFFCLKN(AF33,AF34,AG34)

18mil width(DIFFCLKN)

10mil (SSC)

Near T16

Near T38

Near AA19

Near N16

Near BD47

Near BF47

Near V16

Near A22

Near AC16

Near AH13,AH14,AF13

Near N20 Near P34

Near N26

Near M26

Place

near AG33

suppied by internal

1.05V VR Must NC

suppied by internal

1.05V VR must NC

VCCIO[8,9,11] change to VccDIFFCLKN

VCCIO[10] change to VccSSC

Deep S3

PPT:126mA

CPT:119mA

For Deep SX turn off +V5REF_SUS,+VCCSUS3_3

10mil20mil

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+VCCA_USBSUS

+3VS_VCC_CLKF33

+3VS_VCC_CLKF33

+VCCSUS1

+VCCACLK

+VCCRTCEXT

+VCCSST

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+VCCSATAPLL

+VCCAPLL_CPY_PCH

+PCH_VCCDSW

+1.05VM_VCCSUS

+PCH_V5REF_RUN

+PCH_V5REF_SUS

PCH_PWR_EN#

PCH_PWR_EN#<35>

+1.05VS_PCH

+VCCSUS3_3

+1.05VS_PCH

+3VS

+1.05VS_PCH

+VCCSUS3_3

+1.05VS_PCH

+VCCSUS3_3

+3VALW_PCH

+3VS

+1.05VS_PCH

+RTCVCC

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+VCCSUS3_3 +V5REF_SUS

+3VS +5VS

+1.05VS_PCH

+1.05VS_PCH

+VCCSUS3_3

+1.05VS_PCH

+V5REF_SUS

+5VALW

+VCCSUS3_3

+3VALW

+VCCAFDI_VRM

+VCCAFDI_VRM

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (8/9) PWR

Custom

20 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (8/9) PWR

Custom

20 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (8/9) PWR

Custom

20 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

T10PAD

@

T10PAD

@

C495

0.1U_0201_10V6K

C495

0.1U_0201_10V6K

1

2

L49

10UH_LB2012T100MR_20%

L49

10UH_LB2012T100MR_20%

1 2

C524

1U_0201_4V6M

C524

1U_0201_4V6M

1

2

C518

1U_0201_4V6M

C518

1U_0201_4V6M

1

2

C426

1U_0201_4V6M

C426

1U_0201_4V6M

1

2

T11

PAD @

T11

PAD @

C482

1U_0201_4V6M

C482

1U_0201_4V6M

1

2

C820

0.01U_0402_16V7K

C820

0.01U_0402_16V7K

1

2

R755

20K_0402_5%

R755

20K_0402_5%

12

C484

0.1U_0402_16V4Z

C484

0.1U_0402_16V4Z

1 2

R752

20K_0402_5%

R752

20K_0402_5%

12

C771

0.1U_0201_10V6K

C771

0.1U_0201_10V6K

1

2

L54

10UH_LB2012T100MR_20%

L54

10UH_LB2012T100MR_20%

1 2

C440

1U_0402_6.3V6K

C440

1U_0402_6.3V6K

1

2

C490

0.1U_0201_10V6K

C490

0.1U_0201_10V6K

1

2

C817

.1U_0402_16V7K

C817

.1U_0402_16V7K

1

2R757

1K_0402_5%

R757

1K_0402_5%

1 2

C816

.1U_0402_16V7K

C816

.1U_0402_16V7K

1

2

T9PAD @T9PAD @

C476

1U_0201_4V6M

C476

1U_0201_4V6M

1

2

R756

2.2K_0402_5%

R756

2.2K_0402_5%

1 2

R273

0_0402_5%

@R273

0_0402_5%

@

1 2

C752

22U_0805_6.3V6M

C752

22U_0805_6.3V6M

1

2

C751

22U_0805_6.3V6M

C751

22U_0805_6.3V6M

1

2

C544

4.7U_0603_6.3V6K

C544

4.7U_0603_6.3V6K

1

2

C537

0.1U_0201_10V6K

C537

0.1U_0201_10V6K

1

2

C513

1U_0201_4V6M

C513

1U_0201_4V6M

1

2

C494

0.1U_0201_10V6K

C494

0.1U_0201_10V6K

1

2

Q68

AP2301GN-HF_SOT23-3 DS3@

Q68

AP2301GN-HF_SOT23-3 DS3@

2

3 1

T48 PAD@T48 PAD@

C493

1U_0402_6.3V6K

C493

1U_0402_6.3V6K

1

2

POWER

SATA USB

Clock and Miscellaneous

HDA

CPURTC

PCI/GPIO/LPCMISC

U37J

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

POWER

SATA USB

Clock and Miscellaneous

HDA

CPURTC

PCI/GPIO/LPCMISC

U37J

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

DCPSUSBYP

V12

VCCASW[1]

AA19

VCCASW[2]

AA21

VCCASW[3]

AA24

VCCASW[5]

AA27

VCCASW[6]

AA29

VCCSUSHDA P32

VCCSUS3_3[6] P24

VCCIO[34] T26

VCCIO[4] AD17

VCCASW[7]

AA31

VCCASW[8]

AC26

VCCASW[9]

AC27

VCCASW[10]

AC29

VCCASW[11]

AC31

VCCASW[12]

AD29

V5REF P34

VCC3_3[4] T34

VCCRTC

A22

VCCSUS3_3[10] V24

VCCSUS3_3[9] V23

VCCSUS3_3[8] T24

VCCSUS3_3[7] T23

VCCIO[2] AC16

VCCADPLLB

BF47

VCCIO[8]

AF33

V5REF_SUS M26

VCCIO[3] AC17

DCPSUS[1]

T17

VCCIO[10]

AG33

VCCADPLLA

BD47

VCCVRM[4]

Y49

VCCACLK

AD49

DCPRTC

N16

VCCASW[4]

AA26

VCCIO[9]

AF34

VCCIO[7]

AF17

DCPSST

V16

VCCIO[5] AF13

VCCASW[22] T21

VCCASW[23] V21

VCCASW[21] T19

VCC3_3[1] AA16

VCC3_3[8] W16

VCCSUS3_3[2] N20

VCCSUS3_3[3] N22

VCCSUS3_3[4] P20

VCCSUS3_3[5] P22

VCCIO[29] N26

VCCIO[30] P26

VCCIO[31] P28

VCCIO[32] T27

V_PROC_IO

BJ8

VCCIO[33] T29

VCCIO[11]

AG34

VCCASW[13]

AD31

VCCASW[14]

W21

VCCASW[15]

W23

VCCASW[16]

W24

VCCASW[17]

W26

VCCASW[18]

W29

VCCASW[19]

W31

VCCASW[20]

W33

VCCIO[6] AF14

VCCVRM[1] AF11

VCCIO[12] AH13

VCCIO[13] AH14

VCC3_3[2] AJ2

VCCAPLLSATA AK1

DCPSUS[3]

AL24

VCCIO[14]

AL29

DCPSUS[4] AN23

VCCSUS3_3[1] AN24

VCCAPLLDMI2

BH23

DCPSUS[2]

V19

VCCDSW3_3

T16

VCC3_3[5]

T38

D16

RB751V-40_SOD323-2

D16

RB751V-40_SOD323-2

21

C470

1U_0603_10V6K

C470

1U_0603_10V6K

1

2

C497

0.1U_0201_10V6K

C497

0.1U_0201_10V6K

1

2

C533

1U_0201_4V6M

C533

1U_0201_4V6M

1

2

C547

22U_0805_6.3V6M

C547

22U_0805_6.3V6M

1

2

R334

100_0402_5%

R334

100_0402_5%

12

C465

10U_0603_6.3V6M

C465

10U_0603_6.3V6M

1

2

C522

0.1U_0201_10V6K

C522

0.1U_0201_10V6K

1

2

D14

RB751V-40_SOD323-2

D14

RB751V-40_SOD323-2

21

C501

0.1U_0201_10V6K

C501

0.1U_0201_10V6K

1

2

C473

0.1U_0201_10V6K

C473

0.1U_0201_10V6K

1

2

C819

0.01U_0402_16V7K

C819

0.01U_0402_16V7K

1

2

L26

10UH_LB2012T100MR_20%

L26

10UH_LB2012T100MR_20%

1 2

Q64

AP2301GN-HF_SOT23-3 DS3@

Q64

AP2301GN-HF_SOT23-3 DS3@

2

3 1

C429

1U_0201_4V6M

C429

1U_0201_4V6M

1

2

C478

1U_0201_4V6M

@

C478

1U_0201_4V6M

@

1

2

C541

0.1U_0201_10V6K

C541

0.1U_0201_10V6K

1

2

T12PAD @T12PAD @

C552

22U_0805_6.3V6M

C552

22U_0805_6.3V6M

1

2

T32PAD @T32PAD @

C471

0.1U_0201_10V6K

C471

0.1U_0201_10V6K

1

2

C468

1U_0201_4V6M

C468

1U_0201_4V6M

1

2

C520

0.1U_0201_10V6K

C520

0.1U_0201_10V6K

1

2

C526 0.1U_0201_10V6KC526 0.1U_0201_10V6K

12

C467

1U_0201_4V6M

C467

1U_0201_4V6M

1

2

R321

100_0402_5%

R321

100_0402_5%

12

C521 0.1U_0201_10V6KC521 0.1U_0201_10V6K

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (9/9) VSS

Custom

21 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (9/9) VSS

Custom

21 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PCH (9/9) VSS

Custom

21 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

U37I

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

U37I

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

VSS[159]

AY4

VSS[160]

AY42

VSS[161]

AY46

VSS[162]

AY8

VSS[163]

B11

VSS[164]

B15

VSS[165]

B19

VSS[166]

B23

VSS[167]

B27

VSS[168]

B31

VSS[169]

B35

VSS[170]

B39

VSS[171]

B7

VSS[173]

BB12

VSS[174]

BB16

VSS[175]

BB20

VSS[176]

BB22

VSS[177]

BB24

VSS[178]

BB28

VSS[179]

BB30

VSS[180]

BB38

VSS[181]

BB4

VSS[182]

BB46

VSS[183]

BC14

VSS[184]

BC18

VSS[185]

BC2

VSS[186]

BC22

VSS[187]

BC26

VSS[188]

BC32

VSS[189]

BC34

VSS[190]

BC36

VSS[191]

BC40

VSS[192]

BC42

VSS[193]

BC48

VSS[194]

BD46

VSS[195]

BD5

VSS[196]

BE22

VSS[197]

BE26

VSS[198]

BE40

VSS[199]

BF10

VSS[200]

BF12

VSS[201]

BF16

VSS[202]

BF20

VSS[203]

BF22

VSS[204]

BF24

VSS[205]

BF26

VSS[206]

BF28

VSS[207]

BD3

VSS[208]

BF30

VSS[209]

BF38

VSS[210]

BF40

VSS[211]

BF8

VSS[212]

BG17

VSS[213]

BG21

VSS[214]

BG33

VSS[215]

BG44

VSS[216]

BG8

VSS[217]

BH11

VSS[218]

BH15

VSS[219]

BH17

VSS[220]

BH19

VSS[222]

BH27

VSS[223]

BH31

VSS[224]

BH33

VSS[225]

BH35

VSS[226]

BH39

VSS[227]

BH43

VSS[228]

BH7

VSS[229]

D3

VSS[230]

D12

VSS[231]

D16

VSS[232]

D18

VSS[233]

D22

VSS[234]

D24

VSS[235]

D26

VSS[236]

D30

VSS[237]

D32

VSS[264] K7

VSS[265] L18

VSS[266] L2

VSS[267] L20

VSS[268] L26

VSS[269] L28

VSS[270] L36

VSS[271] L48

VSS[272] M12

VSS[273] P16

VSS[274] M18

VSS[275] M22

VSS[276] M24

VSS[277] M30

VSS[278] M32

VSS[279] M34

VSS[280] M38

VSS[281] M4

VSS[282] M42

VSS[283] M46

VSS[284] M8

VSS[285] N18

VSS[286] P30

VSS[288] P11

VSS[289] P18

VSS[290] T33

VSS[291] P40

VSS[292] P43

VSS[293] P47

VSS[294] P7

VSS[295] R2

VSS[296] R48

VSS[297] T12

VSS[298] T31

VSS[299] T37

VSS[300] T4

VSS[301] W34

VSS[302] T46

VSS[303] T47

VSS[304] T8

VSS[305] V11

VSS[306] V17

VSS[307] V26

VSS[308] V27

VSS[309] V29

VSS[310] V31

VSS[311] V36

VSS[312] V39

VSS[313] V43

VSS[314] V7

VSS[315] W17

VSS[316] W19

VSS[238]

D34

VSS[239]

D38

VSS[240]

D42

VSS[241]

D8

VSS[242]

E18

VSS[243]

E26

VSS[244]

G18

VSS[245]

G20

VSS[246]

G26

VSS[247]

G28

VSS[248]

G36

VSS[249]

G48

VSS[250]

H12

VSS[251]

H18

VSS[317] W2

VSS[318] W27

VSS[319] W48

VSS[320] Y12

VSS[321] Y38

VSS[322] Y4

VSS[323] Y42

VSS[324] Y46

VSS[325] Y8

VSS[328] BG29

VSS[329] N24

VSS[330] AJ3

VSS[287] N47

VSS[252]

H22

VSS[253]

H24

VSS[254]

H26

VSS[255]

H30

VSS[256]

H32

VSS[257]

H34

VSS[258]

F3

VSS[262] K39

VSS[263] K46

VSS[259] H46

VSS[260] K18

VSS[261] K26

VSS[331] AD47

VSS[333] B43

VSS[334] BE10

VSS[335] BG41

VSS[337] G14

VSS[338] H16

VSS[340] T36

VSS[342] BG22

VSS[343] BG24

VSS[344] C22

VSS[345] AP13

VSS[172]

F45

VSS[221]

H10

VSS[346] M14

VSS[347] AP3

VSS[348] AP1

VSS[349] BE16

VSS[350] BC16

VSS[351] BG28

VSS[352] BJ28

U37H

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

U37H

COUGARPOINT_FCBGA989~D

HM77@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH ABO!SA00005AGI0

VSS[1]

AA17

VSS[2]

AA2

VSS[3]

AA3

VSS[5]

AA34

VSS[6]

AB11

VSS[7]

AB14

VSS[8]

AB39

VSS[9]

AB4

VSS[10]

AB43

VSS[11]

AB5

VSS[12]

AB7

VSS[13]

AC19

VSS[14]

AC2

VSS[15]

AC21

VSS[16]

AC24

VSS[17]

AC33

VSS[18]

AC34

VSS[19]

AC48

VSS[20]

AD10

VSS[21]

AD11

VSS[22]

AD12

VSS[23]

AD13

VSS[24]

AD19

VSS[25]

AD24

VSS[26]

AD26

VSS[27]

AD27

VSS[28]

AD33

VSS[29]

AD34

VSS[30]

AD36

VSS[31]

AD37

VSS[33]

AD39

VSS[34]

AD4

VSS[35]

AD40

VSS[36]

AD42

VSS[37]

AD43

VSS[38]

AD45

VSS[39]

AD46

VSS[43]

AF10

VSS[44]

AF12

VSS[46]

AD16

VSS[47]

AF16

VSS[48]

AF19

VSS[49]

AF24

VSS[50]

AF26

VSS[51]

AF27

VSS[52]

AF29

VSS[53]

AF31

VSS[54]

AF38

VSS[55]

AF4

VSS[56]

AF42

VSS[57]

AF46

VSS[59]

AF7

VSS[60]

AF8

VSS[61]

AG19

VSS[62]

AG2

VSS[63]

AG31

VSS[64]

AG48

VSS[65]

AH11

VSS[66]

AH3

VSS[67]

AH36

VSS[68]

AH39

VSS[69]

AH40

VSS[70]

AH42

VSS[71]

AH46

VSS[72]

AH7

VSS[73]

AJ19

VSS[76]

AJ33

VSS[77]

AJ34

VSS[78]

AK12

VSS[79]

AK3

VSS[80] AK38

VSS[81] AK4

VSS[82] AK42

VSS[83] AK46

VSS[84] AK8

VSS[85] AL16

VSS[86] AL17

VSS[87] AL19

VSS[88] AL2

VSS[89] AL21

VSS[90] AL23

VSS[91] AL26

VSS[92] AL27

VSS[93] AL31

VSS[96] AL48

VSS[97] AM11

VSS[98] AM14

VSS[99] AM36

VSS[100] AM39

VSS[102] AM45

VSS[103] AM46

VSS[104] AM7

VSS[105] AN2

VSS[106] AN29

VSS[107] AN3

VSS[108] AN31

VSS[109] AP12

VSS[110] AP19

VSS[111] AP28

VSS[112] AP30

VSS[113] AP32

VSS[114] AP38

VSS[116] AP42

VSS[117] AP46

VSS[118] AP8

VSS[119] AR2

VSS[120] AR48

VSS[121] AT11

VSS[122] AT13

VSS[123] AT18

VSS[124] AT22

VSS[125] AT26

VSS[126] AT28

VSS[127] AT30

VSS[128] AT32

VSS[131] AT42

VSS[132] AT46

VSS[133] AT7

VSS[134] AU24

VSS[135] AU30

VSS[136] AV16

VSS[137] AV20

VSS[138] AV24

VSS[139] AV30

VSS[140] AV38

VSS[141] AV4

VSS[142] AV43

VSS[143] AV8

VSS[144] AW14

VSS[145] AW18

VSS[146] AW2

VSS[147] AW22

VSS[148] AW26

VSS[149] AW28

VSS[150] AW32

VSS[151] AW34

VSS[152] AW36

VSS[153] AW40

VSS[154] AW48

VSS[155] AV11

VSS[156] AY12

VSS[157] AY22

VSS[158] AY28

VSS[40]

AD8

VSS[42]

AE3

VSS[45]

AD14

VSS[115] AP4

VSS[0]

H5

VSS[58]

AF5

VSS[32]

AD38

VSS[4]

AA33

VSS[74]

AJ21

VSS[75]

AJ24

VSS[41]

AE2

VSS[129] AT34

VSS[130] AT39

VSS[101] AM43

VSS[95] AL34

VSS[94] AL33

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Panel POWER CIRCUIT

eDP panel + Card Reader Conn.

W=60mils

W=60mils

W=40mils

SM010014520 3000ma

220ohm@100mhz

DCR 0.04

W=40mils

40mils

60mils

20mils

To LED/B Conn.

20mils

EDP_HPD

EDP_AUXN_C

EDP_AUXP_C

EDP_TXN1_C

EDP_TXP1_C

EDP_TXN0_C

EDP_TXP0_C

USB20_P10

USB20_N10

CLK_PCIE_CARD#

PCIE_PTX_C_DRX_N1

CLK_PCIE_CARD

PCIE_PTX_C_DRX_P1

PCIE_DTX_C_PRX_P1

PCIE_DTX_C_PRX_N1

LID_SW#

CARD_CLKREQ#

ON/OFFBTN#

PLT_RST#

DPST_PWM

EDP_HPD

BKOFF#

BKOFF#

DPST_PWM

USB20_P10

USB20_N10

BATT_AMB_LED#

BATT_BLUE_LED#

PWR_LED#

PWR_SUSP_LED#

PCH_ENVDD<16>

EDP_HPD#<4>

EDP_AUXN<4>

EDP_AUXP<4>

EDP_TXN1<4>

EDP_TXP1<4>

EDP_TXP0<4>

EDP_TXN0<4>

USB20_P10<17>

USB20_N10<17>

CLK_PCIE_CARD<14>

CLK_PCIE_CARD#<14>

PCIE_PRX_DTX_P1<14>

PCIE_PRX_DTX_N1<14>

PCIE_PTX_C_DRX_P1<14>

PCIE_PTX_C_DRX_N1<14>

ON/OFFBTN#<33>

LID_SW#<32>

CARD_CLKREQ#<14>

PLT_RST#<17,24,30,32,5>

BKOFF#<32>

DPST_PWM<16>

BATT_AMB_LED#<32>

BATT_BLUE_LED#<32>

PWR_SUSP_LED#<32>

PWR_LED#<32>

+3VS

+LCDVDD

+LCDVDD +3VALW

+INVPWR_B+

B+ +INVPWR_B+

+3VS

+3VS

+LCDVDD

+3VS

+3VALW

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

LVDS Connector

Custom

22 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

LVDS Connector

Custom

22 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

LVDS Connector

Custom

22 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

C9130.1U_0201_10V6K eDP@ C9130.1U_0201_10V6K eDP@

1 2

C479

4.7U_0603_6.3V6K

C479

4.7U_0603_6.3V6K

1

2

G

D

S

Q29

SSM3K7002FU_SC70-3

eDP@

G

D

S

Q29

SSM3K7002FU_SC70-3

eDP@

2

13

C9120.1U_0201_10V6K eDP@ C9120.1U_0201_10V6K eDP@

1 2

R4

100K_0402_5%

R4

100K_0402_5%

12

R2

1K_0402_5%

R2

1K_0402_5%

12

S

G

D

Q1A

DMN66D0LDW-7_SOT363-6

S

G

D

Q1A

DMN66D0LDW-7_SOT363-6

5

34

JLVDS1

ACES_50398-04071-001

CONN@

JLVDS1

ACES_50398-04071-001

CONN@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

G1 41

G2 42

G3 43

G4 44

G5 45

L1

FBMA-L11-201209-221LMA30T_0805

L1

FBMA-L11-201209-221LMA30T_0805

12

Q28

AP2301GN-HF_SOT23-3

Q28

AP2301GN-HF_SOT23-3

2

31

C9150.1U_0201_10V6K eDP@ C9150.1U_0201_10V6K eDP@

1 2

C5 100P_0201_25V8JC5 100P_0201_25V8J

1 2

JLED1

ACES_88058-060N

CONN@

JLED1

ACES_88058-060N

CONN@

1

12

23

34

45

56

6

GND

7GND

8

R6

10K_0402_5%

R6

10K_0402_5%

1 2

C8 100P_0201_25V8JC8 100P_0201_25V8J

1 2

C10

0.1U_0402_16V4Z

C10

0.1U_0402_16V4Z

1

2

G

S

D

Q1B

DMN66D0LDW-7_SOT363-6

G

S

D

Q1B

DMN66D0LDW-7_SOT363-6

61

2

C9140.1U_0201_10V6K eDP@ C9140.1U_0201_10V6K eDP@

1 2

R480

100K_0402_5%

eDP@

R480

100K_0402_5%

eDP@

12

C7

68P_0402_50V8J

C7

68P_0402_50V8J

1

2

R18 10K_0402_5%R18 10K_0402_5%

1 2

C562

4.7U_0603_6.3V6K

C562

4.7U_0603_6.3V6K

1

2

R5

300_0603_5%

R5

300_0603_5%

12

R86 10K_0402_5%R86 10K_0402_5%

1 2

C9100.1U_0201_10V6K eDP@ C9100.1U_0201_10V6K eDP@

1 2

D15

AZC099-04S.R7G_SOT23-6

@D15

AZC099-04S.R7G_SOT23-6

@

I/O4

6

VDD

5

I/O3

4

I/O2 3

GND 2

I/O1 1

C9110.1U_0201_10V6K eDP@ C9110.1U_0201_10V6K eDP@

1 2

C11

680P_0402_50V7K

C11

680P_0402_50V7K

1

2

C2

.047U_0402_16V7K

C2

.047U_0402_16V7K

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HDMI connector

W=40mils

Pull high at connector side

Place closed to JHDMI1

HDMI_CLK-

HDMI_CLK+

HDMI_TX0+

HDMI_TX0-

HDMI_TX1+

HDMI_TX1-

HDMI_TX2-

HDMI_TX2+

HDMI_HPD

HDMI_SCLK

HDMI_SDATA

HDMI_GND

HDMI_TX0-

HDMI_TX0+

HDMI_CLK-

HDMI_CLK+

HDMI_TX1-

HDMI_TX1+

HDMI_TX2+

HDMI_TX2-

HDMI_TX0-

HDMI_TX0+

HDMI_CLK-

HDMI_CLK+

HDMI_TX1-

HDMI_TX1+

HDMI_TX2+

HDMI_TX2-

HDMI_SDATA

HDMI_SCLK

SDVO_SDATA

SDVO_SCLK

SDVO_SCLK

SDVO_SDATA

HDMI_HPDHDMI_HPD

PCH_DPB_N3<16>

PCH_DPB_P3<16>

PCH_DPB_N2<16>

PCH_DPB_P2<16>

PCH_DPB_N1<16>

PCH_DPB_P1<16>

PCH_DPB_N0<16>

PCH_DPB_P0<16>

SDVO_SCLK<16>

SDVO_SDATA<16>

PCH_DPB_HPD<16>

+HDMI_5V_OUT

+3VS

+HDMI_5V_OUT

+5VS

+HDMI_5V_OUT

+3VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

HDMI Connector

Custom

23 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

HDMI Connector

Custom

23 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

HDMI Connector

Custom

23 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

C281 .1U_0402_16V7KC281 .1U_0402_16V7K

12

S

G

D

Q16A

DMN66D0LDW-7_SOT363-6

S

G

D

Q16A

DMN66D0LDW-7_SOT363-6

5

34

F1

1.1A_6VDC_FUSE

F1

1.1A_6VDC_FUSE

21

JHDMI1

CONCR_099AMAC19CBACNF

CONN@

JHDMI1

CONCR_099AMAC19CBACNF

CONN@

D2+

1D2_shield

2D2-

3D1+

4D1_shield

5D1-

6D0+

7D0_shield

8D0-

9CK+

10 CK_shield

11 CK-

12 CEC

13 Reserved

14 SCL

15 SDA

16 DDC/CEC_GND

17 +5V

18 HP_DET

19

GND 20

GND 21

GND 22

GND 23

C287 .1U_0402_16V7KC287 .1U_0402_16V7K

12

C283 .1U_0402_16V7KC283 .1U_0402_16V7K

12

R255

2.2K_0402_5%

R255

2.2K_0402_5%

1 2

R590 680_0402_5%R590 680_0402_5%

1 2

G

S

D

Q16B

DMN66D0LDW-7_SOT363-6

G

S

D

Q16B

DMN66D0LDW-7_SOT363-6

61

2

S

G

D

Q14A

DMN66D0LDW-7_SOT363-6

S

G

D

Q14A

DMN66D0LDW-7_SOT363-6

5

34

C282 .1U_0402_16V7KC282 .1U_0402_16V7K

12

C285 .1U_0402_16V7KC285 .1U_0402_16V7K

12

G

S

D

Q14B

DMN66D0LDW-7_SOT363-6

G

S

D

Q14B

DMN66D0LDW-7_SOT363-6

61

2

R257

2.2K_0402_5%

R257

2.2K_0402_5%

1 2

C324

100P_0201_25V8J

C324

100P_0201_25V8J

1

2

C280 .1U_0402_16V7KC280 .1U_0402_16V7K

12

R198

1M_0402_5%

R198

1M_0402_5%

12

R573 680_0402_5%R573 680_0402_5%

1 2

R253 2.2K_0402_5%R253 2.2K_0402_5%

1 2

R219

100K_0402_5%

R219

100K_0402_5%

12

R570 680_0402_5%R570 680_0402_5%

1 2

R785

0_0402_5%

@

R785

0_0402_5%

@

1 2

C345

0.1U_0402_16V4Z

C345

0.1U_0402_16V4Z

1

2

R250 2.2K_0402_5%R250 2.2K_0402_5%

1 2

C286 .1U_0402_16V7KC286 .1U_0402_16V7K

12

R592 680_0402_5%R592 680_0402_5%

1 2

R564 680_0402_5%R564 680_0402_5%

1 2

R583 680_0402_5%R583 680_0402_5%

1 2

C284 .1U_0402_16V7KC284 .1U_0402_16V7K

12

R587 680_0402_5%R587 680_0402_5%

1 2

R594 680_0402_5%R594 680_0402_5%

1 2

TO PCH

intra pair skew: 5 mil.

inter pair skew: 10 mil

EC control~~ trig after SUSP# asserted for 30ms

ATMEL: AT25512(64KB):SA000055T00

AT25256B(32KB):SA00005G500

CAT:CAT25256VI-GT3(32KB):SA00005DB00

INTEL Recommend 32K EEPROM

PCIE_PTX_C_DRX_P5

PCIE_PTX_C_DRX_N5

PCIE_PTX_C_DRX_P6

PCIE_PTX_C_DRX_N6

PA_HV_EN

PCIE_PTX_C_DRX_P7

PCIE_PTX_C_DRX_N7

PCIE_PTX_C_DRX_P8

TB_GPIO11

PCIE_PTX_C_DRX_N8

TB_GPIO15

PCIE_PRX_C_DTX_P5

TB_GO2SX

EN_LC_PWR

TMU_CLK_IN

EE_CLK

TB_GPIO13

PCIE_PRX_C_DTX_N8

PCIE_PRX_C_DTX_P8

PCIE_PRX_C_DTX_P6

PCIE_PRX_C_DTX_N5

PCIE_PRX_C_DTX_N6

PCIE_PRX_C_DTX_P7

PCIE_PRX_C_DTX_N7

TB_OK2GO2SX#

TB_GPIO11

TB_GPIO14

TB_GPIO15

PERST#

TB_CLKREQ#TB_CLKREQ#_R

PA_HV_EN

EN_LC_PWR

TB_PWRON_POC_RST#

PA_CIO_SEL

EN_CIO_PWR#

TB_GPIO1

TB_WAKE#

CIO_PLUG_EVENT

TB_SMB_DA

TB_SMB_CK

PA_DP_PWRDN

CLK_TB_REFCLK#

CLK_TB_REFCLK

TB_GPIO14

TB_FORCE_PWR_R

CRYSTAL_N

CRYSTAL_P

EE_DI

EE_CLK_R

EE_CS_N

EE_DO

EN_CIO_PWR#

EE_CLK

EE_DI

EE_CS_N

EE_DO

PCH_DPD_AUXN_C

TB_CLKREQ#_R

PCH_DPD_AUXP_C

PCH_DPD_P3_C

PCH_DPD_N3_C

PCH_DPD_P2_C

PCH_DPD_N2_C

TB_PLUG_EVENT

PCH_DPD_P1_C

PCH_DPD_N1_C

PCH_DPD_P0_C

PCH_DPD_N0_C

CIO_PLUG_EVENT

PCH_DPD_P3

DPD_HPD

PCH_DPD_N3

PCH_DPD_P2

PCH_DPD_N2

PCH_DPD_P1

PCH_DPD_N1

PCH_DPD_P0

PCH_DPD_N0

PCH_DPD_AUXP

PCH_DPD_AUXN

TMU_CLK_IN

PA_DP_PWRDN

TB_GPIO13

EN_CIO_PWR#

TB_OK2GO2SX#

CR_JTCK

CR_JTDI

CR_JTMS

CR_TDO

CRYSTAL_P

CRYSTAL_N

PCIE_PRX_DTX_P8

PCIE_PRX_DTX_N8

PCIE_PRX_DTX_N6

PCIE_PRX_DTX_P6

PCIE_PRX_DTX_P7

PCIE_PRX_DTX_N7

PCIE_PRX_DTX_P5

PCIE_PRX_DTX_N5

TB_GPIO1

TB_CLKREQ#_R

TB_SMB_DA

TB_SMB_CK

TB_SMB_DA

TB_SMB_CK

TB_GO2SX

DPSNK1_HPD

PCIE_RST_0_N

PCIE_RST_1_N

PCIE_RST_2_N

PCIE_RST_3_N

TB_FORCE_PWR_R

TB_SMB_CK

TB_SMB_DA

TB_SMB_CK

TB_SMB_DA

PCH_DPD_P3<16>

PCH_DPD_N3<16>

PCH_DPD_P2<16>

PCH_DPD_N2<16>

PCH_DPD_P1<16>

PCH_DPD_N1<16>

PCH_DPD_P0<16>

PCH_DPD_N0<16>

PCH_DPD_AUXP<16>

PCH_DPD_AUXN<16>

PA_HV_EN <45>

PA_CIO_SEL <25>

EN_CIO_PWR# <27>

PA_DP_PWRDN <25>

TB_GO2SX <32>

CLK_TB_REFCLK <14>

CLK_TB_REFCLK# <14>

TB_OK2GO2SX# <32>

DPD_HPD<16>

EC_SMB_DA2 <11,14,32>

PLT_RST#<17,22,30,32,5>

TB_PWRON_POC_RST# <32>

EN_LC_PWR <42>

TB_PLUG_EVENT <18>

TB_CLKREQ# <14>

PCIE_PRX_DTX_P6<14>

PCIE_PRX_DTX_N6<14>

PCIE_PRX_DTX_P8<14>

PCIE_PRX_DTX_N8<14>

PCIE_PRX_DTX_P5<14>

PCIE_PRX_DTX_N5<14>

PCIE_PRX_DTX_P7<14>

PCIE_PRX_DTX_N7<14>

PCIE_PTX_C_DRX_N8 <14>

PCIE_PTX_C_DRX_P8 <14>

PCIE_PTX_C_DRX_N6 <14>

PCIE_PTX_C_DRX_P6 <14>

PCIE_PTX_C_DRX_N7 <14>

PCIE_PTX_C_DRX_P7 <14>

PCIE_PTX_C_DRX_N5 <14>

PCIE_PTX_C_DRX_P5 <14>

PCH_PCIE_WAKE# <15,28>

TB_FORCE_PWR <18>

TB_SMB_CK_GPIO7 <18>

TB_SMB_DA_GPIO6 <14>

EC_SMB_CK2 <11,14,32>

+3VS_LC +3VS_LC

+3VS_POC

+3VS_POC +3VS_POC

+3VS_LC

+3VS_LC

+3VS_LC

+3VS_LC

+3VS_POC

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(1/4)

Custom

24 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(1/4)

Custom

24 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(1/4)

Custom

24 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R1025

3.3K_0402_5%

TB@

R1025

3.3K_0402_5%

TB@

12

C1333 0.1U_0201_10V6KTB@C1333 0.1U_0201_10V6KTB@ 12

C1331

0.1U_0402_16V4Z

TB@

C1331

0.1U_0402_16V4Z

TB@

1

2

R1028 10K_0402_5%TB@R1028 10K_0402_5%TB@ 12

R1044 10K_0402_5%TB@R1044 10K_0402_5%TB@ 12

R1036 2.2K_0402_5%@R1036 2.2K_0402_5%@

1 2

R1033 10K_0402_5%TB@R1033 10K_0402_5%TB@ 12

R1131 0_0402_5%@R1131 0_0402_5%@12

R1024

3.3K_0402_5%

TB@

R1024

3.3K_0402_5%

TB@

12

C1330

0.01U_0402_16V7K

@

C1330

0.01U_0402_16V7K

@

1

2

C1335 0.1U_0201_10V6KTB@C1335 0.1U_0201_10V6KTB@ 12

R1129 0_0402_5%TB@R1129 0_0402_5%TB@ 12

R1050

10K_0402_5%

TB@

R1050

10K_0402_5%

TB@

1 2

T77PAD@T77PAD@

R1040 1K_0402_5%TB@R1040 1K_0402_5%TB@ 12

R1097 0_0402_5%TB@R1097 0_0402_5%TB@ 12

R1026

3.3K_0402_5%

TB@

R1026

3.3K_0402_5%

TB@

12

R1023

3.3K_0402_5%

TB@

R1023

3.3K_0402_5%

TB@

12

C1334 0.1U_0201_10V6KTB@C1334 0.1U_0201_10V6KTB@ 12

R1018

0_0402_5%

@

R1018

0_0402_5%

@

1 2

R1130 0_0402_5%@R1130 0_0402_5%@12

C1352 0.1U_0201_10V6KTB@C1352 0.1U_0201_10V6KTB@ 12

R1128 0_0402_5%TB@R1128 0_0402_5%TB@ 12

C1336 0.1U_0201_10V6KTB@C1336 0.1U_0201_10V6KTB@ 12

C1351 0.1U_0201_10V6KTB@C1351 0.1U_0201_10V6KTB@ 12

R1048 10K_0402_5%TB@R1048 10K_0402_5%TB@ 12

C1345 0.1U_0201_10V6KTB@C1345 0.1U_0201_10V6KTB@ 12

C1346 0.1U_0201_10V6KTB@C1346 0.1U_0201_10V6KTB@ 12

C1332 0.1U_0201_10V6KTB@C1332 0.1U_0201_10V6KTB@ 12

R1027 10K_0402_5%TB@R1027 10K_0402_5%TB@ 12

R1034 10K_0402_5%TB@R1034 10K_0402_5%TB@ 12

C1349 0.1U_0201_10V6KTB@C1349 0.1U_0201_10V6KTB@ 12

R102110K_0402_5% TB@ R102110K_0402_5% TB@

1 2

C1344

0.1U_0402_16V4Z

TB@

C1344

0.1U_0402_16V4Z

TB@

12

C1337 0.1U_0201_10V6KTB@C1337 0.1U_0201_10V6KTB@ 12

R1031 10K_0402_5%TB@R1031 10K_0402_5%TB@ 12

R102210K_0402_5% TB@ R102210K_0402_5% TB@

1 2

R1032 1K_0402_1%TB@R1032 1K_0402_1%TB@

1 2

Y2

25MHZ_10PF_7V25000014

TB@

Y2

25MHZ_10PF_7V25000014

TB@

GND

2

3

311

GND

4

R1029 10K_0402_5%TB@R1029 10K_0402_5%TB@ 12

R1038 0_0402_5%

TB@

R1038 0_0402_5%

TB@ 12

R101910K_0402_5% TB@ R101910K_0402_5% TB@

1 2

R1053

0_0402_5%

@

R1053

0_0402_5%

@

12

R1042 10K_0402_5%TB@R1042 10K_0402_5%TB@ 12

U65

AT25512N-SH-T_SO8

TB@

SA00005G500

U65

AT25512N-SH-T_SO8

TB@

SA00005G500

CS# 1

SO 2

WP# 3

GND 4

SI

5SCK

6HOLD#

7VCC

8

T78PAD@T78PAD@

R1101 1M_0402_5%

TB@

R1101 1M_0402_5%

TB@

1 2

C1342 0.1U_0201_10V6KTB@C1342 0.1U_0201_10V6KTB@ 12

T75PAD @T75PAD @

C1348 0.1U_0201_10V6KTB@C1348 0.1U_0201_10V6KTB@ 12

S

G

D

Q89A

DMN66D0LDW-7_SOT363-6

TB@

S

G

D

Q89A

DMN66D0LDW-7_SOT363-6

TB@

5

34

R102010K_0402_5% TB@ R102010K_0402_5% TB@

1 2

R1049

100K_0402_5%

TB@

R1049

100K_0402_5%

TB@

12

C1340

6.8P_0402_50V8C

TB@

C1340

6.8P_0402_50V8C

TB@ 1

2

T79PAD@T79PAD@

C1343 0.1U_0201_10V6KTB@C1343 0.1U_0201_10V6KTB@ 12

R1051

10K_0402_5%

TB@

R1051

10K_0402_5%

TB@

12

R1047 2.2K_0402_5%TB@R1047 2.2K_0402_5%TB@

1 2

R1052 0_0402_5%

TB@

R1052 0_0402_5%

TB@

1 2

C1338

6.8P_0402_50V8C

TB@

C1338

6.8P_0402_50V8C

TB@ 1

2

G

S

D

Q89B

DMN66D0LDW-7_SOT363-6

TB@

G

S

D

Q89B

DMN66D0LDW-7_SOT363-6

TB@

61

2

C1347 0.1U_0201_10V6KTB@C1347 0.1U_0201_10V6KTB@ 12

C1341 0.1U_0201_10V6KTB@C1341 0.1U_0201_10V6KTB@ 12

R1046 2.2K_0402_5%TB@R1046 2.2K_0402_5%TB@

1 2

R1045 100K_0402_5%TB@R1045 100K_0402_5%TB@

1 2

R1041 10K_0402_5%TB@R1041 10K_0402_5%TB@ 12

T76PAD@T76PAD@

R1035 10K_0402_5%TB@R1035 10K_0402_5%TB@ 12

R1039 0_0402_5%TB@R1039 0_0402_5%TB@ 12

C1339 0.1U_0201_10V6KTB@C1339 0.1U_0201_10V6KTB@ 12

SINK PORT 0

SOURCE PORT 0

SINK PORT 1

Display Port

MISC

PCIe

TRANSMIT

RECEIVE

U66A

CACTUS-RIDGE_FCBGA288

TB@ SA00005QT20

SINK PORT 0

SOURCE PORT 0

SINK PORT 1

Display Port

MISC

PCIe

TRANSMIT

RECEIVE

U66A

CACTUS-RIDGE_FCBGA288

TB@ SA00005QT20

MONDC0

AD23

MONDC1

AC24

MONOBS_P

W18

MONOBS_N

W16

EE_DI

R4

EE_DO

P5

EE_CS_N

AD3

EE_CLK

W4

TEST_EN

N4

TEST_PWR_GOOD

AB5

RSENSE

U20

RBIAS

W20

XTAL_25_IN

AA24

XTAL_25_OUT

AB23

TCK

AA6

TMS

AB3

TDI

V1

TDO

R2

THERMDA

Y7

NC

U4

DPSNK0_3_P

E14

DPSNK0_3_N

D13

DPSNK0_2_P

E16

DPSNK0_2_N

D15

DPSNK0_1_P

E18

DPSNK0_1_N

D17

DPSNK0_0_P

E20

DPSNK0_0_N

D19

DPSNK0_AUX_P

A6

DPSNK0_AUX_N

B5

DPSNK0_HPD

U6

DPSNK1_3_P

E6

DPSNK1_3_N

D5

DPSNK1_2_P

E8

DPSNK1_2_N

D7

DPSNK1_1_P

E10

DPSNK1_1_N

D9

DPSNK1_0_P

E12

DPSNK1_0_N

D11

DPSNK1_AUX_P

A4

DPSNK1_AUX_N

B3

DPSNK1_HPD

T5

DPSRC_3_P A14

DPSRC_3_N B15

DPSRC_2_P A12

DPSRC_2_N B13

DPSRC_1_P A10

DPSRC_1_N B11

DPSRC_0_P A8

DPSRC_0_N B9

DPSRC_AUX_P C2

DPSRC_AUX_N D3

DPSRC_HPD_OD V3

PETP_0

AD5

PETN_0

AD7

PETP_1

AD9

PETN_1

AD11

PETP_2

AD13

PETN_2

AD15

PETP_3

AD17

PETN_3

AD19

PERST_N

R6

PCIe_RST_0_N N6

PCIe_RST_1_N T1

PCIe_RST_2_N Y5

PCIe_RST_3_N U2

PCIE_CLKREQ_OD_N W6

TMU_CLK_OUT AA4

TMU_CLK_IN Y3

GPIO_0__PA_HV_EN__BYP0 G2

GPIO_1__PB_HV_EN__BYP0 M1

GPIO_2__GO2SX Y1

GPIO_3 W2

GPIO_4_WAKE_OD_N J4

GPIO_5_CIO_PLUG_EVENT AA2

GPIO_6_OD__CIO_SDA_OD AB1

GPIO_7_OD__CIO_SCL_OD AC2

GPIO__8_EN_CIO_PWR_N_OD P3

GPIO_9__OK2GO2SX_N_OD M5

GPIO_10__PA_CIO_SEL__BYP1 M3

GPIO_11__PB_CIO_SEL__BYP1 L2

GPIO_12__PA_DP_PWRDN__BYP2 H3

GPIO_13__PB_DP_PWRDN__BYP2 L4

GPIO_14 T3

GPIO_15 V5

PWR_ON_POC_RSTN J2

EN_LC_PWR K5

PERP_0 AB9

PERN_0 AA10

PERP_1 AA12

PERN_1 AB13

PERP_2 AB15

PERN_2 AA16

PERP_3 AA18

PERN_3 AB19

REFCLK_100_IN_P AB21

REFCLK_100_IN_N AD21

R1043 10K_0402_5%TB@R1043 10K_0402_5%TB@ 12

R1066 10K_0402_5%@R1066 10K_0402_5%@12

U67

MC74VHC1G08DFT2G_SC70-5

TB@

U67

MC74VHC1G08DFT2G_SC70-5

TB@

B

2

A

1Y4

P5

G

3

R1037 2.2K_0402_5%@R1037 2.2K_0402_5%@

1 2

C1350 0.1U_0201_10V6KTB@C1350 0.1U_0201_10V6KTB@ 12

All Thunderbolt TX traces have pi filter

when embedded capacitors before and after

inductor should be 0.45pF

Route Thunderbolt traces as 85 Ohm control impedance.

Match inside pair 2 mil.Match between lanes NA

Thunderbolt lenght must be between 0.8 inch to 2 inch

HPD CFG1 CFG2 LSrx Mode

1 0 0 X DP

1 1 X X HDMI

0 0 1 0 TBT

PA_CFG1_LSEO0, PA_CFG2_LSOE0

should be used by GPU as the

DP CONFIG1/CONFIG2 inputs,

if required

VCC_DP@3V , max current 500mA

VCC_DP@12V, max current 0.8A

Current limited:

Ilim = 40Kohm/Rset

Function

Port A is active

Port B is active

SEL/HPD_SEL

/AUX_SEL

H

L

40mil

40mil

40mil

60mil

EN HV_EN OUT

0 0

0

0

1

1

1 1

0V

0V

3.3V

12V

0 X 0 X None

40mil

0 0 1 1 TBT

Comments

Cable is disconnected

TBT mode

TBT cable but no TBT link

Pull High +3VS at PCH side

PA_DPSRC_HPD

PA_CIO_SEL

PA_DPSRC_3P_C

PA_DPSRC_3N_C

TB_CIO_TX_P0_C

TB_CIO_TX_N0_CTB_CIO_TX_N0

TB_CIO_TX_P0

PA_DPSRC_1P_C

PA_DPSRC_1N_C

PA_AUX_P_C

PA_AUX_N_C

TB_CIO_RX_P0TB_CIO_RX_P0_C

TB_CIO_RX_N0TB_CIO_RX_N0_C

PA_DPSRC_3N

PA_DPSRC_1P

PA_DPSRC_3P

PA_DPSRC_1N

PA_AUX_P

PA_AUX_N

PA_LSTX_LSEO1_R

PA_LSRX_LSOE1_R

PA_LSTX_LSEO1_R

PA_LSRX_LSOE1_U

PA_CFG1_LSEO0

TB_CIO_TX_P1_C

TB_CIO_TX_N1_CTB_CIO_TX_N1

TB_CIO_TX_P1

TB_CIO_RX_P1TB_CIO_RX_P1_C

TB_CIO_RX_N1TB_CIO_RX_N1_C

TB_CIO_TX_N0

TB_CIO_TX_P0

TB_CIO_TX_P1

TB_CIO_TX_N1

PA_SRC_3N

DPA_AUX_HPD

PA_LSRX_LSOE1

PA_CFG2_LSOE0

DPA_AUX_HPD

PA_SRC_3P

PA_AUX_N_C

PA_DPSRC_1P_C

PA_DPSRC_1N_C

PA_DPSRC_3N_C

PA_DPSRC_3P_C

PA_AUX_P_C

PA_LSTX_SRC_1P

PA_LSRX_SRC_1N

DPA_AUX_P

DPA_AUX_N

PA_DP_PWRDN

DPA_AUX_N

DPA_AUX_P

D0-B

D0+B

PA_LSTX_LSEO1

PA_CIO_SEL

TB_CIO_RX_P1_C

TB_CIO_RX_N1_C

AUX_CHP

AUX_CHN

DPA_AUX_N

TB_CIO_RX_N0_C

TB_CIO_RX_P0_C

PA_CFG1_LSEO0_A

DPA_AUX_P

TB_CIO_TX_P0

TB_CIO_TX_N0

PA_LSTX_SRC_1P

PA_LSRX_SRC_1N

TB_CIO_TX_P1

TB_CIO_TX_N1

PA_SRC_3P

PA_SRC_3N

AUX_CHP

AUX_CHN

TB_CIO_RX_P0_C

TB_CIO_RX_N0_C

mDP_HPD_RMDP_HPD

RETURN

PA_LSTX_LSEO1_R

PA_LSRX_LSOE1_U

+VCC3V3_PA

PA_CFG1_LSEO0

PCH_DPD_CLK

PA_CFG1_LSEO0

PA_DPSRC_HPD

MDP_HPD

PA_CFG2_LSOE0

PA_CFG1_LSEO0

HV_EN

TB_CIO_RX_N0_C

TB_CIO_RX_P0_C

TB_CIO_RX_N0_C

TB_CIO_RX_P0_C

TB_CIO_TX_P0

TB_CIO_TX_N0

TB_CIO_TX_P0

TB_CIO_TX_N0

PA_LSRX_SRC_1N

PA_LSTX_SRC_1P

PA_LSRX_SRC_1N

PA_LSTX_SRC_1P

PA_SRC_3N

PA_SRC_3P

PA_SRC_3N

PA_SRC_3P

TB_CIO_TX_P1

TB_CIO_TX_N1

TB_CIO_TX_P1

TB_CIO_TX_N1

AUX_CHP

AUX_CHN

AUX_CHP

AUX_CHN

HV_EN

PA_LSRX_LSOE1_R

PA_LSRX_LSOE1_U

D0+B

D0-B

PA_AUX_N_C PCH_DPD_DAT PA_AUX_P_C

PA_CFG1_LSEO0

PA_DP_PWRDN<24>

PA_CIO_SEL<24>

PCH_DPD_DAT <16> PCH_DPD_CLK <16>

TB_LED<32>

TB_EJECT_BTN<32>

+3VS_POC

+3VS_POC

+3VS_POC

+VCC_DP

+3VS_POC

+VCC_DP_L

+VCC_DP

+HV_12V+3VS_POC

+3VS_POC

+3VS_POC

+3VS_POC

+HV_12V

+3VS_POC

+3VS_POC

+3VS_POC

+3VS_POC

+3VS_POC

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(2/4)

Custom

25 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(2/4)

Custom

25 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(2/4)

Custom

25 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

S

G

D

Q86A

DMN66D0LDW-7_SOT363-6

TB@

S

G

D

Q86A

DMN66D0LDW-7_SOT363-6

TB@

5

34

R1072 470K_0402_5%

TB@

R1072 470K_0402_5%

TB@

1 2

C1381

0.01U_0402_50V7K

TB@

C1381

0.01U_0402_50V7K

TB@

1

2

C1364 0.22U_0402_10V6KTB@C1364 0.22U_0402_10V6KTB@

1 2

L64

650NH +-5% LQW18CNR65J00D

TB@

L64

650NH +-5% LQW18CNR65J00D

TB@

12

C1368

0.1U_0201_10V6K

TB@

C1368

0.1U_0201_10V6K

TB@

1

2

T80

PAD

@T80

PAD

@

C1373

0.1U_0201_10V6K

TB@

C1373

0.1U_0201_10V6K

TB@

1

2

R712

10K_0402_5%

TB@

R712

10K_0402_5%

TB@

12

C1378

0.01U_0402_50V7K

TB@

C1378

0.01U_0402_50V7K

TB@

1

2

S

G

D

Q82A

DMN66D0LDW-7_SOT363-6

TB@

S

G

D

Q82A

DMN66D0LDW-7_SOT363-6

TB@

5

34

C1366 0.22U_0402_10V6KTB@C1366 0.22U_0402_10V6KTB@

1 2

8

7

65

4

3

2

1

9

10

D42

L05ESDL5V0NA-4 SLP2510P8

@

8

7

65

4

3

2

1

9

10

D42

L05ESDL5V0NA-4 SLP2510P8

@

4

5

1

6

2

7

3

9

8

R1088

0_0402_5%

TB@

R1088

0_0402_5%

TB@

12

G

D

S

Q91B

NTGD4161PT1G_TSOP6~D

TB@

G

D

S

Q91B

NTGD4161PT1G_TSOP6~D

TB@

3

42

D47 BAR90-02LRH_TSLP-2-7-2

TB@

D47 BAR90-02LRH_TSLP-2-7-2

TB@

12

R1069 10K_0402_5%

TB@

R1069 10K_0402_5%

TB@

1 2

C1362 0.22U_0402_10V6KTB@C1362 0.22U_0402_10V6KTB@

1 2

R1076

1.5K_0402_5%

TB@

R1076

1.5K_0402_5%

TB@

12

C1355 0.22U_0402_10V6KTB@C1355 0.22U_0402_10V6KTB@

1 2

R1127

10K_0402_5%

TB@

R1127

10K_0402_5%

TB@

1 2

S

G

D

Q81A

DMN66D0LDW-7_SOT363-6

TB@

S

G

D

Q81A

DMN66D0LDW-7_SOT363-6

TB@

5

34

R1074 10K_0402_5%TB@R1074 10K_0402_5%TB@

1 2

R1091

1M_0402_5%

TB@

R1091

1M_0402_5%

TB@

1 2

R1060 0_0402_5%TB@R1060 0_0402_5%TB@

1 2

R1075 100K_0402_5%

TB@

R1075 100K_0402_5%

TB@

1 2

G

D

S

Q91A

NTGD4161PT1G_TSOP6~D

TB@

G

D

S

Q91A

NTGD4161PT1G_TSOP6~D

TB@

1

6 5

C1363 0.22U_0402_10V6KTB@C1363 0.22U_0402_10V6KTB@

1 2

U2

TPS22980RGPR_VQFN20_4X4

TB@

U2

TPS22980RGPR_VQFN20_4X4

TB@

EN

5

GND

3GND

2

GND

4

GND

1

HV_EN

11

S0

17

ISET_V3P3

8

ISET_S0

10 ISET_S3

9

OUT 12

OUT 14

V3P3OUT 18

RSVD 15

RSVD 16

GND

13

TPad

21

V3P3 19

V3P3 20

VHV 6

VHV 7

C1387

330P_0402_50V7K

TB@

C1387

330P_0402_50V7K

TB@

1

2

R1110 35.7K_0402_1%TB@R1110 35.7K_0402_1%TB@

1 2

C1358 0.22U_0402_10V6KTB@C1358 0.22U_0402_10V6KTB@

1 2

+

C1000

150U_B2_6.3VM_R35M

TB@

+

C1000

150U_B2_6.3VM_R35M

TB@

1

2

U3

74AHC1G125GW_SOT353-5

TB@U3

74AHC1G125GW_SOT353-5

TB@

OE#

1

IN

2

GND

3OUT 4

VCC 5

C1386

330P_0402_50V7K

TB@

C1386

330P_0402_50V7K

TB@

1

2

C1371

0.1U_0201_10V6K

TB@

C1371

0.1U_0201_10V6K

TB@

1

2

C1374 0.1U_0201_10V6K

TB@

C1374 0.1U_0201_10V6K

TB@

12

Q84

BC846B_SOT23-3

TB@Q84

BC846B_SOT23-3

TB@

2

1

3

R1125

10K_0402_5%

LEGO@

R1125

10K_0402_5%

LEGO@

12

C1380

30P_0402_50V8J

TB@

C1380

30P_0402_50V8J

TB@

1

2

T73

PAD

@

T73

PAD

@

C1356 0.22U_0402_10V6KTB@C1356 0.22U_0402_10V6KTB@

1 2

L66

BLM31PG500SN1L 1206

TB@

L66

BLM31PG500SN1L 1206

TB@

12

D46

BAR90-02LRH_TSLP-2-7-2TB@

D46

BAR90-02LRH_TSLP-2-7-2TB@

12

R1113

10K_0402_5%

TB@

R1113

10K_0402_5%

TB@

1 2

R1112 36.5K_0402_1%TB@R1112 36.5K_0402_1%TB@

1 2

R1065

10K_0402_5%

TB@

R1065

10K_0402_5%

TB@

1 2

C1004

0.1U_0402_16V4Z

TB@

C1004

0.1U_0402_16V4Z

TB@

1

2

R1085

1K_0402_5%

TB@

R1085

1K_0402_5%

TB@

1 2

R1073 470K_0402_5%

TB@

R1073 470K_0402_5%

TB@

1 2

R1077

1.5K_0402_5%

TB@

R1077

1.5K_0402_5%

TB@

12

U68

PI3VEDP212ZLEX_TQFN32_6X3~D

TB@

U68

PI3VEDP212ZLEX_TQFN32_6X3~D

TB@

VDD

3

VDD

9

VDD

12

VDD

16

VDD

20

VDD

29

AUX_SEL

32

D0+A 31

D0-A 30

D1-A 26

D1+A 27

D1+B 23

D1-B 22

D0-B 24

D0+B 25

GND 21

GND 28

D0-

2D0+

1

D1+

4

D1-

5

AUX+

6

AUX-

7

HPD

8

AUX+A 19

AUX-A 18

HPD_A 17

AUX-B 14

AUX+B 15

HPD_B 13

SEL

10

HPD_SEL

11

GPAD 33

R1082 0_0402_5%TB@R1082 0_0402_5%TB@

1 2

R1055

1K_0402_5%

TB@

R1055

1K_0402_5%

TB@

1 2

8

7

65

4

3

2

1

9

10

D43

L05ESDL5V0NA-4 SLP2510P8

@

8

7

65

4

3

2

1

9

10

D43

L05ESDL5V0NA-4 SLP2510P8

@

4

5

1

6

2

7

3

9

8

R1064

10K_0402_5%

TB@

R1064

10K_0402_5%

TB@

1 2

G

D

S

Q30

SSM3K7002FU_SC70-3

LEGO@

G

D

S

Q30

SSM3K7002FU_SC70-3

LEGO@

2

13

R1083 0_0402_5%TB@R1083 0_0402_5%TB@

1 2

G

S

D

Q81B

DMN66D0LDW-7_SOT363-6

TB@

G

S

D

Q81B

DMN66D0LDW-7_SOT363-6

TB@

6 1

2

L65

FBMA-L11-201209-221LMA30T_0805

TB@

L65

FBMA-L11-201209-221LMA30T_0805

TB@

1 2

R1059 100K_0402_5%

TB@

R1059 100K_0402_5%

TB@

1 2

C1353 0.22U_0402_10V6KTB@C1353 0.22U_0402_10V6KTB@

1 2

R1067 1M_0402_5%

TB@

R1067 1M_0402_5%

TB@

1 2

G

D

S

Q31

SSM3K7002FU_SC70-3

LEGO@

G

D

S

Q31

SSM3K7002FU_SC70-3

LEGO@

2

13

C1360 0.22U_0402_10V6KTB@C1360 0.22U_0402_10V6KTB@

1 2

R1080

0_0402_5%

TB@R1080

0_0402_5%

TB@

1 2

G

D

S

Q32

SSM3K7002FU_SC70-3

TB@

G

D

S

Q32

SSM3K7002FU_SC70-3

TB@

2

13

HPD

LANE3_N

LANE3_P

CONFIG1

GND

LANE0_P

GND

GND

LANE0_N

CONFIG2

LANE1_P

LANE1_N

GND

GND

LANE2_P

AUX_CHP

LANE2_N

AUX_CHN

RETURN

GND

DP_PWR

JTB1

JAE_SP11-11986-T01

HPD

LANE3_N

LANE3_P

CONFIG1

GND

LANE0_P

GND

GND

LANE0_N

CONFIG2

LANE1_P

LANE1_N

GND

GND

LANE2_P

AUX_CHP

LANE2_N

AUX_CHN

RETURN

GND

DP_PWR

JTB1

JAE_SP11-11986-T01

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

R1115

10K_0402_5%

TB@

R1115

10K_0402_5%

TB@

12

R1070 470K_0402_5%

TB@

R1070 470K_0402_5%

TB@

1 2

R1079

100K_0402_5%

TB@

R1079

100K_0402_5%

TB@

1 2

DPSRC Port A

PORT0PORT1

PORT2PORT3

DPSRC Port B

CIO

U66B

CACTUS-RIDGE_FCBGA288

TB@ SA00005QT20

DPSRC Port A

PORT0PORT1

PORT2PORT3

DPSRC Port B

CIO

U66B

CACTUS-RIDGE_FCBGA288

TB@ SA00005QT20

PA_DPSRC_3_P

A18

PA_DPSRC_3_N

B19

PA_DPSRC_1_P

A16

PA_DPSRC_1_N

B17

PA_AUX_P

F3

PA_AUX_N

F1

PA_CIO1_TX_P__DPSRC_2_P

L24

PA_CIO1_TX_N__DPSRC_2_N

J24

PA_CIO1_RX_P

L22

PA_CIO1_RX_N

J22

PA_LSTX__CIO_1_LSEO

N2

PA_LSRX__CIO_1_LSOE

J6

PA_CIO0_TX_P__DPSRC_0_P

G24

PA_CIO0_TX_N__DPSRC_0_N

E24

PA_CIO0_RX_P

G22

PA_CIO0_RX_N

E22

PA_CONFIG1__CIO_0_LSEO

K1

PA_CONFIG2__CIO_0_LSOE

G4

PA_DPSRC_HPD

H1

PB_DPSRC_3_P A22

PB_DPSRC_3_N B23

PB_DPSRC_1_P A20

PB_DPSRC_1_N B21

PB_AUX_P D1

PB_AUX_N E2

PB_DPSRC_HPD K3

PB_CIO2_TX_P__DPSRC_0_P R24

PB_CIO2_TX_N__DPSRC_0_N N24

PB_CIO2_RX_P R22

PB_CIO2_RX_N N22

PB_CONFIG1__CIO_2_LSEO P1

PB_CONFIG2__CIO_2_LSOE H5

PB_CIO3_TX_P__DPSRC_2_P W24

PB_CIO3_TX_N__DPSRC_2_N U24

PB_CIO3_RX_P W22

PB_CIO3_RX_N U22

PB_LSTX__CIO_3_LSEO L6

PB_LSRX__CIO_3_LSOE G6

C1354 0.22U_0402_10V6KTB@C1354 0.22U_0402_10V6KTB@

1 2

R1058 0_0402_5%TB@R1058 0_0402_5%TB@

1 2

R1124

1K_0402_5%

TB@

R1124

1K_0402_5%

TB@

12

C1003

0.1U_0402_16V4Z

TB@

C1003

0.1U_0402_16V4Z

TB@

1

2

R1057

49.9_0402_1%

@

R1057

49.9_0402_1%

@

1 2

G

D

S

Q92A

NTGD4161PT1G_TSOP6~D

TB@

G

D

S

Q92A

NTGD4161PT1G_TSOP6~D

TB@

1

6 5

G

S

D

Q82B

DMN66D0LDW-7_SOT363-6

TB@

G

S

D

Q82B

DMN66D0LDW-7_SOT363-6

TB@

6 1

2

L63

650NH +-5% LQW18CNR65J00D

TB@

L63

650NH +-5% LQW18CNR65J00D

TB@

12

R1061 10K_0402_5%

TB@

R1061 10K_0402_5%

TB@

1 2

R1126

10K_0402_5%

TB@

R1126

10K_0402_5%

TB@

1 2

R1086

0_0402_5%

@

R1086

0_0402_5%

@

12

R1111 35.7K_0402_1%TB@R1111 35.7K_0402_1%TB@

1 2

R1054

1K_0402_5%

TB@

R1054

1K_0402_5%

TB@

1 2

R1062

10K_0402_5%

TB@

R1062

10K_0402_5%

TB@

1 2

C1369

0.1U_0201_10V6K

TB@

C1369

0.1U_0201_10V6K

TB@

1

2

C1005

0.1U_0402_16V4Z

TB@

C1005

0.1U_0402_16V4Z

TB@

1

2

C1376

0.01U_0402_50V7K

TB@

C1376

0.01U_0402_50V7K

TB@

1 2

C1361 0.22U_0402_10V6KTB@C1361 0.22U_0402_10V6KTB@

1 2

R711

10K_0402_5%

TB@

R711

10K_0402_5%

TB@

12

G

D

S

Q92B

NTGD4161PT1G_TSOP6~D

TB@

G

D

S

Q92B

NTGD4161PT1G_TSOP6~D

TB@

3

42

C1365 0.22U_0402_10V6KTB@C1365 0.22U_0402_10V6KTB@

1 2

R1090

1M_0402_5%

TB@

R1090

1M_0402_5%

TB@

1 2

C1377

0.01U_0402_50V7K

TB@

C1377

0.01U_0402_50V7K

TB@

1 2

C1417

0.01U_0402_16V7K

TB@

C1417

0.01U_0402_16V7K

TB@

1

2

C1367

0.1U_0201_10V6K

TB@

C1367

0.1U_0201_10V6K

TB@

1

2

C1370

0.1U_0201_10V6K

TB@

C1370

0.1U_0201_10V6K

TB@

1

2

R1089

0_0402_5%

TB@R1089

0_0402_5%

TB@

1 2

8

7

65

4

3

2

1

9

10

D44

L05ESDL5V0NA-4 SLP2510P8

@

8

7

65

4

3

2

1

9

10

D44

L05ESDL5V0NA-4 SLP2510P8

@

4

5

1

6

2

7

3

9

8

S

GD

Q88A

DMN66D0LDW-7_SOT363-6

TB@

S

GD

Q88A

DMN66D0LDW-7_SOT363-6

TB@

5

34

R1056

49.9_0402_1%

@

R1056

49.9_0402_1%

@

1 2

C1379

30P_0402_50V8J

TB@

C1379

30P_0402_50V8J

TB@

1

2

R1081 0_0402_5%TB@R1081 0_0402_5%TB@

1 2

Q85

BC846B_SOT23-3

TB@

Q85

BC846B_SOT23-3

TB@

2

1

3

C1001

0.1U_0402_16V4Z

TB@

C1001

0.1U_0402_16V4Z

TB@

1

2

R1063

10K_0402_5%

TB@

R1063

10K_0402_5%

TB@

1 2

R1084 0_0402_5%TB@R1084 0_0402_5%TB@

1 2

C1359 0.22U_0402_10V6KTB@C1359 0.22U_0402_10V6KTB@

1 2

G

S

D

Q86B

DMN66D0LDW-7_SOT363-6

TB@

G

S

D

Q86B

DMN66D0LDW-7_SOT363-6

TB@

61

2

R1116

10K_0402_5%

TB@

R1116

10K_0402_5%

TB@

12

R1068 100K_0402_5%

TB@

R1068 100K_0402_5%

TB@

1 2

G

S

D

Q88B

DMN66D0LDW-7_SOT363-6

TB@

G

S

D

Q88B

DMN66D0LDW-7_SOT363-6

TB@

61

2

C1357 0.22U_0402_10V6KTB@C1357 0.22U_0402_10V6KTB@

1 2

R1087

1K_0402_5%

TB@

R1087

1K_0402_5%

TB@

1 2

R1078

0_0402_5%

TB@R1078

0_0402_5%

TB@

1 2

R1114

2.05K_0402_1%

TB@

R1114

2.05K_0402_1%

TB@

1 2

R1071 470K_0402_5%

TB@

R1071 470K_0402_5%

TB@

1 2

C1372

0.1U_0201_10V6K

TB@

C1372

0.1U_0201_10V6K

TB@

1

2

+1.05VS_LC

+3VS_POC

+3VS_LC

+1.05VS_CIO

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(3/4)

Custom

26 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(3/4)

Custom

26 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(3/4)

Custom

26 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

C1415

0.01U_0201_10V7K

TB@

C1415

0.01U_0201_10V7K

TB@ 1

2

C1435

0.1U_0201_10V6K

TB@

C1435

0.1U_0201_10V6K

TB@ 1

2

C1406

0.1U_0201_10V6K

TB@

C1406

0.1U_0201_10V6K

TB@ 1

2

C1412

0.01U_0201_10V7K

TB@

C1412

0.01U_0201_10V7K

TB@ 1

2

VCC

U66C

CACTUS-RIDGE_FCBGA288

TB@ SA00005QT20

VCC

U66C

CACTUS-RIDGE_FCBGA288

TB@ SA00005QT20

VCC1P0_ON

J8

VCC1P0_ON

J10

VCC1P0_ON

J12

VCC1P0_ON

J14

VCC1P0_ON

J16

VCC1P0_ON

K17

VCC1P0_ON

T15

VCC1P0_ON

U14

VCC1P0_ON

V7

VCC1P0_ON

W8

VCC1P0_PE

G10

VCC1P0_PE

G12

VCC1P0_PE

G14

VCC1P0_PE

G16

VCC1P0_PE

G18

VCC1P0_PE

H19

VCC1P0_PE

K19

VCC1P0_PE

M19

VCC1P0_PE

P19

VCC1P0_PE

T19

VCC1P0_PE

V15

VCC1P0_PE

V19

VCC1P0_PE

W12

VCC1P0_PE

W14

VCC1P0_DPAUX

G8

VCC1P0_DPAUX

H9

VCC1P0 W10

VCC1P0 V11

VCC1P0 U10

VCC1P0 T11

VCC1P0 R14

VCC1P0 R10

VCC1P0 P15

VCC1P0 P11

VCC1P0 N14

VCC1P0 N10

VCC1P0 M15

VCC1P0 M11

VCC1P0 L14

VCC1P0 L10

VCC1P0 K15

VCC1P0 K11

VCC3P3 M7

VCC3P3 P7

VCC3P3 T7

VCC3P3_CIO L18

VCC3P3_CIO N18

VCC3P3_CIO R18

VCC3P3_DP H11

VCC3P3_DP H13

VCC3P3_DP H15

VCC3P3_DP H17

VCC3P3_DPAUX H7

VCC3P3_POC K7

C1409

0.1U_0201_10V6K

TB@

C1409

0.1U_0201_10V6K

TB@ 1

2

GND

U66D

CACTUS-RIDGE_FCBGA288

TB@ SA00005QT20

GND

U66D

CACTUS-RIDGE_FCBGA288

TB@ SA00005QT20

VSSPE

A2

VSSPE

A24

VSSPE

B1

VSSPE

B7

VSSPE

C4

VSSPE

C6

VSSPE

C8

VSSPE

C10

VSSPE

C12

VSSPE

C14

VSSPE

C16

VSSPE

C18

VSSPE

C20

VSSPE

C22

VSSPE

C24

VSSPE

D21

VSSPE

D23

VSSPE

E4

VSSPE

F5

VSSPE

F7

VSSPE

F9

VSSPE

F11

VSSPE

F13

VSSPE

F15

VSSPE

F17

VSSPE

F19

VSSPE

F21

VSSPE

F23

VSSPE

G20

VSSPE

H21

VSSPE

H23

VSSPE

J18

VSSPE

J20

VSSPE

K21

VSSPE

K23

VSSPE

L20

VSSPE

M21

VSSPE

M23

VSSPE

N20

VSSPE

P21

VSSPE

P23

VSSPE

R20

VSSPE

T21

VSSPE

T23

VSSPE

U18

VSSPE

V13

VSSPE

V17

VSSPE

V21

VSSPE

V23

VSSPE

Y9

VSS K9

VSS K13

VSS L8

VSS L12

VSS L16

VSS M9

VSS M13

VSS M17

VSS N8

VSS N12

VSS N16

VSS P9

VSS P13

VSS P17

VSS R8

VSS R12

VSS R16

VSS T9

VSS T13

VSS T17

VSS U8

VSS U12

VSS U16

VSS V9

VSS AD1

VSSPE Y11

VSSPE Y13

VSSPE Y15

VSSPE Y17

VSSPE Y19

VSSPE Y21

VSSPE Y23

VSSPE AA8

VSSPE AA14

VSSPE AA20

VSSPE AA22

VSSPE AB7

VSSPE AB11

VSSPE AB17

VSSPE AC4

VSSPE AC6

VSSPE AC8

VSSPE AC10

VSSPE AC12

VSSPE AC14

VSSPE AC16

VSSPE AC18

VSSPE AC20

VSSPE AC22

C1398

1000P_0201_16V7K

TB@

C1398

1000P_0201_16V7K

TB@

1

2

C1397

1000P_0201_16V7K

TB@

C1397

1000P_0201_16V7K

TB@

1

2

C1407

0.1U_0201_10V6K

TB@

C1407

0.1U_0201_10V6K

TB@ 1

2

C1427

0.1U_0201_10V6K

TB@

C1427

0.1U_0201_10V6K

TB@ 1

2

C1428

0.01U_0201_10V7K

TB@

C1428

0.01U_0201_10V7K

TB@ 1

2

C1413

0.01U_0201_10V7K

TB@

C1413

0.01U_0201_10V7K

TB@ 1

2

C1443

0.1U_0201_10V6K

TB@

C1443

0.1U_0201_10V6K

TB@ 1

2

C1416

0.01U_0201_10V7K

TB@

C1416

0.01U_0201_10V7K

TB@ 1

2

C1424

.1U_0402_16V7K

TB@

C1424

.1U_0402_16V7K

TB@ 1

2

C1434

0.1U_0201_10V6K

TB@

C1434

0.1U_0201_10V6K

TB@ 1

2

C1425

.1U_0402_16V7K

TB@

C1425

.1U_0402_16V7K

TB@ 1

2

C1445

0.1U_0201_10V6K

TB@

C1445

0.1U_0201_10V6K

TB@ 1

2

C1444

0.1U_0201_10V6K

TB@

C1444

0.1U_0201_10V6K

TB@ 1

2

C1433

1000P_0201_16V7K

TB@

C1433

1000P_0201_16V7K

TB@

1

2

C1408

0.1U_0201_10V6K

TB@

C1408

0.1U_0201_10V6K

TB@ 1

2

+1.05VS_LC to +1.05VS_CIO

VCC1V05_LC, max current 750mA

VCC1V05_CIO, max current 1.5A

+12VS_TB

TB_GO2SX

CACTUS RIDGE

+3VS_POC

VV

TB_PWRON_POC_RST#

A1

A2

S1

1.05VS_LC_PG

EN_LC_PWR Q70, +3VS_LC

EC

V

S2

PU11, +1.05VS_LC

TB_OK2GO2SX#

V

V V

S3

S4A3

U74, +1.05VS_CIO

V

EN_CIO_PWR#

A4

PU16, PQ47

V

H1

PA_HV_EN

+3VS_POC to +3VS_LC VCC3V3_LC max current 350mA

PA_CIO_SEL

PA_DP_PWRDN

Discharge circuit

V

U68

0=DP

1=TB

PCH_PCIE_WAKE#

TB_PLUG_EVENT

PCH

+3VALW to +3VS_POC

V V

VCC3V3POC, DP CONN max current 500mA ,

VCC3V3POC, IC CONN max current 500mA ,

VCC3V3POC to VCC3V3 max current 350mA ,

U66

+3VS_POC

TB_PWRON_POC_RST#

T1?

T2

+1.05VS_LC

+3VS_LC

60mil40mil 40mil

80mil 80mil

_VCC1V05_LC,max current 750mA

_VCC1V05_CIO,max current 1.5A

_VCC3V3POC,max current 5mA

_VCC3V3_LC,max current 350mA

_VCC_DP@3V,max current 500mA

_VCC_DP@12V,max current 0.8A

in the case of 12V min power should be 10W

Rds=2.6mΩ(Typ)

3.2mΩ(Max)

EN_CIO_PWR#

1.05CIO_GATE

3VS_LC_GATE

EN_3VLC_PWR#

EN_3VLC_PWR#

3VS_LC_CHG

EN_3VLC_PWR#

1.05LC_CHG

1.05VS_CIO_CHG

EN_CIO_PWR#

1.05VS_LC_PG<42>

EN_CIO_PWR#<24>

+3VS_LC

+3VS_LC +1.05VS_LC +1.05VS_CIO

+3VS_POC

+5VALW

+3VS_POC

+3VALW

+VSB

+1.05VS_CIO+1.05VS_LC

+3VS_POC

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(4/4)

Custom

27 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(4/4)

Custom

27 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Intel Thunderbolt(4/4)

Custom

27 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

G

D

S

Q72

SSM3K7002FU_SC70-3

TB@

G

D

S

Q72

SSM3K7002FU_SC70-3

TB@

2

13

R1100

10K_0402_5%

TB@

R1100

10K_0402_5%

TB@

1 2

R1109

1M_0402_5%

@

R1109

1M_0402_5%

@

12

J4

JUMP_43X79

J4

JUMP_43X79

11

2

2

C1447

1U_0402_6.3V6K

TB@

C1447

1U_0402_6.3V6K

TB@

1

2

C1454

10U_0603_6.3V6M

TB@

C1454

10U_0603_6.3V6M

TB@ 1

2

C1448

.1U_0603_25V7K

TB@

C1448

.1U_0603_25V7K

TB@

1

2

R1093

220_0402_5%

TB@

R1093

220_0402_5%

TB@

12

G

S

D

Q71B

DMN66D0LDW-7_SOT363-6

TB@

G

S

D

Q71B

DMN66D0LDW-7_SOT363-6

TB@

61

2

C1452

10U_0603_6.3V6M

TB@

C1452

10U_0603_6.3V6M

TB@ 1

2

Q70

AP2301GN-HF_SOT23-3

TB@

Q70

AP2301GN-HF_SOT23-3

TB@

2

3 1

R1094

220_0402_5%

TB@

R1094

220_0402_5%

TB@

12

S

G

D

Q71A

DMN66D0LDW-7_SOT363-6

TB@

S

G

D

Q71A

DMN66D0LDW-7_SOT363-6

TB@

5

34

J2

JUMP_43X79

J2

JUMP_43X79

11

2

2

R1099

100K_0402_5%

TB@

R1099

100K_0402_5%

TB@

1 2

R1096

100K_0402_5%

TB@

R1096

100K_0402_5%

TB@

1 2

S

G

D

Q75A

DMN66D0LDW-7_SOT363-6

TB@

S

G

D

Q75A

DMN66D0LDW-7_SOT363-6

TB@

5

34

G

S

D

Q75B

DMN66D0LDW-7_SOT363-6

TB@

G

S

D

Q75B

DMN66D0LDW-7_SOT363-6

TB@

61

2

R1092

220_0402_5%

TB@

R1092

220_0402_5%

TB@

12

R1095

100K_0402_5%

TB@

R1095

100K_0402_5%

TB@

12

C1456

.1U_0603_25V7K

TB@

C1456

.1U_0603_25V7K

TB@

1

2

C1453

0.1U_0402_16V4Z

TB@

C1453

0.1U_0402_16V4Z

TB@ 1

2

U74

SI7716ADN-T1-GE3_POWERPAK8-5

TB@

U74

SI7716ADN-T1-GE3_POWERPAK8-5

TB@

4

5

1

2

3

C1446

1U_0402_6.3V6K

TB@

C1446

1U_0402_6.3V6K

TB@ 1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

60mil Mini Card Power Rating

For Wireless LAN

40mil(1A)

Enable Disable

L H

H L

BT BT

BT_CTRL

BT_ON#

BT_CTRL_R

3VSWLAN_GATE3VSW LAN_GATE_R

BT_CTRL

BT_CTRL

PCH_PCIE_W AKE#_R

BT_LED_R

PCH_PCIE_W AKE#_R

BT_LED

PLT_RST_BUF#<17>

USB20_N8<17>

USB20_P8<17>

MINI1_CLKREQ#<14>

PCH_PCIE_W AKE#<15,24>

WL_OFF#<32>

CLK_PCIE_MINI1#<14>

CLK_PCIE_MINI1<14>

AOAC_ON<32>

PCIE_PRX_DTX_P2<14>

PCIE_PRX_DTX_N2<14>

PCIE_PTX_C_DRX_N2<14>

PCIE_PTX_C_DRX_P2<14>

BT_ON#<32>

EC_PME#<32>

BT_LED<32>

+3VS_WLAN

+3VS_WLAN

+3VS_WLAN+3VS +3VS_WLAN

+3VALW

+3VS_WLAN+3VALW

+3VS_WLAN

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

On Board WLAN

Custom

28 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

On Board WLAN

Custom

28 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

On Board WLAN

Custom

28 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R490 0_0402_5%R490 0_0402_5%

1 2

C735

0.1U_0201_10V6K

C735

0.1U_0201_10V6K

1

2

J10

JUMP_43X79

@

J10

JUMP_43X79

@

1 2

R702 0_0402_5%@R702 0_0402_5%@

1 2

Control

Power

USB signal

Clock

PCIE signal

GND

U1

T77H281.01_81P

Control

Power

USB signal

Clock

PCIE signal

GND

U1

T77H281.01_81P

WIFI_DISABLE

G6

WIFI_LED

G7

PERN0

L6

PERP0

L7

PETN0

L8

PETP0

L9

BT_DISABLE

E12

BT_LED

G8

USB_D+

G9

USB_D-

G10

PERST_L

D1

WAKE_L

E1

CLKREQ_L

F1

REFCLK-

L4

REFCLK+

L5

NC

F4

3V3

F12

3.3VAUX

G4 GND[18] A1

GND[19] A2

GND[20] A3

GND[21] A4

GND[22] A5

GND[23] A6

GND[24] A7

GND[25] A8

GND[26] A9

GND[27] A10

GND[28] A11

GND[29] A12

GND[30] B1

GND[31] B2

GND[32] B11

GND[33] B12

GND[34] C1

GND[35] C4

GND[36] C5

GND[37] C6

GND[38] C7

GND[39] C8

GND[40] C9

GND[41] C10

GND[42] C12

GND[43] D3

GND[61] F5

GND[60] F3

GND[59] E10

GND[58] E9

GND[57] E8

GND[56] E7

GND[55] E6

GND[54] E5

GND[53] E4

GND[52] E3

GND[51] D12

GND[50] D10

GND[49] D9

GND[48] D8

GND[47] D7

GND[46] D6

GND[45] D5

GND[44] D4

GND[62] F6

GND[63] F7

GND[17]

F8 GND[16]

F9 GND[15]

F10

GND[1]

G1

GND[2]

G3

GND[3]

G5

GND[4]

G12

GND[5]

H1

GND[6]

H2

GND[7]

H11

GND[8]

H12

GND[9]

L1

GND[10]

L2

GND[11]

L3

GND[12]

L10

GND[13]

L11

GND[14]

L12

C387

0.1U_0201_10V6K

C387

0.1U_0201_10V6K

1

2

G

D

S

Q61

SSM3K7002FU_SC70-3

G

D

S

Q61

SSM3K7002FU_SC70-3

2

13

C403

4.7U_0805_10V4Z

C403

4.7U_0805_10V4Z

1

2

R492 0_0402_5%@R492 0_0402_5%@

1 2

C539

0.1U_0201_10V6K

C539

0.1U_0201_10V6K

12

Q47

AP2301GN-HF_SOT23-3

Q47

AP2301GN-HF_SOT23-3

2

3 1

C500

.1U_0402_16V7K

C500

.1U_0402_16V7K

12

R491 0_0402_5%R491 0_0402_5%

1 2

R962 10K_0402_5%R962 10K_0402_5%

1 2

R472 1K_0402_5%

R472 1K_0402_5%

1 2

R185

1K_0402_5%

R185

1K_0402_5%

1 2

R451 100K_0402_5%R451 100K_0402_5%

1 2

G

D

S

Q62

SSM3K7002FU_SC70-3

G

D

S

Q62

SSM3K7002FU_SC70-3

2

13

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

40mil

For mSATA

From DG=>Change to 0.01u

20mil

Function

Port0,1

Port0

RAID0_DET

L

H

SATA_PTX_C_DRX_N0

SATA_PTX_C_DRX_P0

SATA_PRX_C_DTX_P0

SATA_PRX_C_DTX_N0

MSATA_DET#

E51TXD_P80DATA_R

E51RXD_P80CLK_R

SATA_PTX_C_DRX_N1

SATA_PTX_C_DRX_P1

SATA_PRX_C_DTX_P1

SATA_PRX_C_DTX_N1

SATA_PTX_DRX_P0<13>

SATA_PTX_DRX_N0<13>

SATA_PRX_DTX_P0<13>

SATA_PRX_DTX_N0<13>

MSATA_DET# <18>

E51RXD_P80CLK<32>

E51TXD_P80DATA<32>

SATA_PTX_DRX_P1<13>

SATA_PTX_DRX_N1<13>

SATA_PRX_DTX_P1<13>

SATA_PRX_DTX_N1<13>

RAID0_DET <18>

+3VS_FULL +1.5VS+3VS +3VS_FULL

+3VS_FULL

+3VS_FULL

+1.5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

mSATA HDD Connector

Custom

29 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

mSATA HDD Connector

Custom

29 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

mSATA HDD Connector

Custom

29 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

R288

1K_0402_5%

R288

1K_0402_5%

12

C628 0.01U_0201_10V7KC628 0.01U_0201_10V7K

1 2

JMINI1

BELLW_80060-1021

JMINI1

BELLW_80060-1021

3

344

5

566

7

788

9

910 10

11

11 12 12

13

13 14 14

15

15 16 16

17

17 18 18

19

19 20 20

21

21 22 22

23

23 24 24

25

25 26 26

27

27 28 28

29

29 30 30

31

31 32 32

33

33 34 34

35

35 36 36

37

37 38 38

39

39 40 40

41

41 42 42

43

43 44 44

45

45 46 46

47

47 48 48

49

49 50 50

51

51 52 52

1

122

G1

53

G2

54

G3

55

G4

56

C622 0.01U_0201_10V7KC622 0.01U_0201_10V7K

1 2

J8

JUMP_43X39

@J8

JUMP_43X39

@

1

122

C442

0.1U_0402_16V4Z

@

C442

0.1U_0402_16V4Z

@

1

2

C441

0.1U_0402_16V4Z

C441

0.1U_0402_16V4Z

1

2

C455

4.7U_0603_6.3V6K

C455

4.7U_0603_6.3V6K

1

2

C475

0.1U_0201_10V6K

C475

0.1U_0201_10V6K

1

2

C466

0.1U_0201_10V6K

C466

0.1U_0201_10V6K

1

2

R329

100K_0402_5%

R329

100K_0402_5%

12

C625 0.01U_0201_10V7KC625 0.01U_0201_10V7K

1 2

C624 0.01U_0201_10V7KC624 0.01U_0201_10V7K

1 2

C623 0.01U_0201_10V7KC623 0.01U_0201_10V7K

1 2

R287 0_0402_5%R287 0_0402_5%

1 2

C627 0.01U_0201_10V7KC627 0.01U_0201_10V7K

1 2

R299 0_0402_5%R299 0_0402_5%

1 2

C621 0.01U_0201_10V7KC621 0.01U_0201_10V7K

1 2

C626 0.01U_0201_10V7KC626 0.01U_0201_10V7K

1 2

R300

100K_0402_5%

R300

100K_0402_5%

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TPM

MOTOR/RTC

TPM -Address:

Pin9 BADD

1: 7Eh-7Fh (Default)

0: EEh-EFh

near pin24 near pin19 near pin5

10mil 10mil

40mil

20mil

40mils40mils

10mils

CLK_PCI_TXM

LPC_FRAME#

SERIRQ

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

CLKRUN#

PLT_RST#

BADD_BA0

CLK_PCI_TXM

+3VALW_TPM_R

MOTOR_PPS_L

MOTOR_PPS_R

VR_LEFT

VR_RIGHT

MOTOR_PWR_ON# MOTOR_GATE

LPC_FRAME#<13,32>

SERIRQ<13,32>

LPC_AD0<13,32>

LPC_AD1<13,32>

LPC_AD2<13,32>

LPC_AD3<13,32>

CLKRUN#<15>

CLK_PCI_TXM<17>

PLT_RST#<17,22,24,32,5>

MOTOR_PPS_L <32>

MOTOR_PPS_R <32>

VR_LEFT <32>

VR_RIGHT <32>

MOTOR_PWR_ON<32,45>

+3VS

+3VALW +3VALW_TPM

+3V_TXM

+3V_TXM

+3VALW

+3VALW_TPM

+RTCBATT_R

+MT_VCC

+3V_MCU

+3V_MCU

+3VALW

+3VALW

+VSB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

TPM

Custom

30 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

TPM

Custom

30 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

TPM

Custom

30 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

C6

10U_0603_6.3V6M

TPM@

C6

10U_0603_6.3V6M

TPM@

12

C724

22P_0402_50V8J

@C724

22P_0402_50V8J

@

1 2

J16

JUMP_43X39

@J16

JUMP_43X39

@

1

122

J15

JUMP_43X39

@J15

JUMP_43X39

@

1

122

Q93A

DMN66D0LDW-7_SOT363-6

Q93A

DMN66D0LDW-7_SOT363-6

61

2

J17

JUMP_43X39

@J17

JUMP_43X39

@

1

122

JMR1

E-T_4260K-Q08N-13L

CONN@

JMR1

E-T_4260K-Q08N-13L

CONN@

11

22

33

44

55

66

77

88

GND 9

GND 10

C811

0.1U_0603_25V7K

C811

0.1U_0603_25V7K

1

2

R789

470K_0402_5%

R789

470K_0402_5%

1 2

S

G

D

Q87

SI3456DDV-T1-GE3_TSOP6

S

G

D

Q87

SI3456DDV-T1-GE3_TSOP6

3

6

2

45

1

Q93B

DMN66D0LDW-7_SOT363-6

Q93B

DMN66D0LDW-7_SOT363-6

34

5

R21

10K_0402_5%

R21

10K_0402_5%

12

C4

0.1U_0201_10V6K

TXM@

C4

0.1U_0201_10V6K

TXM@

1

2

U7

NPCT42XAA0WX_TSSOP28

SA00005PH00

TPM@U7

NPCT42XAA0WX_TSSOP28

SA00005PH00

TPM@

LAD3

17 LAD2

20 LAD1

23 LAD0

26

LCLK

21

LFRAME#

22

LRESET#

16

SERIRQ

27

GPIO4/CLKRUN#

15

PP

7

GPIO0/XOR_OUT

1

GPIO1

2

GPIO2/GPX

6

GPIO3/BADD

9

VSB 5

VDD1 19

LPCPD#

28

TEST 8

NC 3

NC 13

NC 14

NC 10

NC 11

NC 12

VSS1 4

VSS2 18

VSS3 25

VDD2 24

R963 10K_0402_5%@R963 10K_0402_5%@

1 2

C3

0.1U_0201_10V6K

TXM@

C3

0.1U_0201_10V6K

TXM@

1

2

R966 0_0402_5%TPM@R966 0_0402_5%TPM@

1 2

C9

0.1U_0201_10V6K

TPM@

C9

0.1U_0201_10V6K

TPM@

1

2

R716

33_0402_5%

@

R716

33_0402_5%

@

1 2

C1

10U_0603_6.3V6M

TXM@

C1

10U_0603_6.3V6M

TXM@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

For ESD request

SGA00001E00

S POLY C 150U 6.3V M B2LESR45M PSL H1.9

W=80mils

USB3.0 Conn.

For USB2.0 ESD request

Resister overlap with L52

For ESD request W=80mils

USB3.0 Conn.

For USB2.0 ESD request

SGA00001E00

S POLY C 150U 6.3V M B2LESR45M PSL H1.9

U3TXDP1

U3TXDN1

U3RXDN1U3RXDN1

U3TXDN1

U3RXDP1

U3TXDP1

U3RXDP1

U3TXDP1

U3RXDN1

U2DP0

U3RXDP1

U3TXDN1

U2DN0

U3TXDP2

U3TXDN2

U3RXDN2U3RXDN2

U3TXDN2

U3RXDP2

U3TXDP2

U3RXDP2

U3TXDP2

U3RXDN2

U2DP1

U3RXDP2

U3TXDN2

U2DN1

USB20_P0P9

USB20_N0N9

USB20_N0N9

USB20_P0P9

USB_HPD#

U3TXDP1

U3TXDN1

PCH_USB3_TX1_P_C

PCH_USB3_TX1_N_C

U3RXDP1

U3RXDN1PCH_USB3_RX1_N

PCH_USB3_RX1_P

U3TXDP2

U3TXDN2

PCH_USB3_TX2_P_C

PCH_USB3_TX2_N_C

U3RXDP2

U3RXDN2

PCH_USB3_RX2_P

PCH_USB3_RX2_N

U2DP1

USB20_N0N9 U2DN0

U2DP0

U2DN1

USB20_P0P9

U2DN1

U2DP1

U2DN0

U2DP0

USB_EN#<32> USB_OC0# <17>

USB20_P0<17>

USB20_N0<17>

USB20_N9<17>

USB20_P9<17>

USB_HPD#<32>

PCH_USB3_TX1_P<17>

PCH_USB3_TX1_N<17>

PCH_USB3_RX1_N<17>

PCH_USB3_RX1_P<17>

PCH_USB3_TX2_P<17>

PCH_USB3_TX2_N<17>

PCH_USB3_RX2_P<17>

PCH_USB3_RX2_N<17>

USB20_N1<17>

USB20_P1<17>

+USB3_VCCA

+USB3_VCCA

+USB3_VCCA

+5VALW

+3VALW

+3VALW

+USB3_VCCA

+USB3_VCCA

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

USB3.0

Custom

31 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Q3ZMC M/B LA-8481P Schematic

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

USB3.0

Custom

31 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Q3ZMC M/B LA-8481P Schematic

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

USB3.0

Custom

31 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Q3ZMC M/B LA-8481P Schematic

C417

0.1U_0402_16V4Z

@

C417

0.1U_0402_16V4Z

@

1

2

R714 0_0402_5%

@

R714 0_0402_5%

@

1 2

R10 0_0402_5%@R10 0_0402_5%@

1 2

R710 0_0402_5%R710 0_0402_5%

1 2

R743 0_0402_5%

@

R743 0_0402_5%

@

1 2

R9 0_0402_5%@R9 0_0402_5%@

1 2

R715 0_0402_5%

@

R715 0_0402_5%

@

1 2

C427 .1U_0402_16V7K

USB3.0@

C427 .1U_0402_16V7K

USB3.0@

12

C432

0.01U_0402_16V7K

C432

0.01U_0402_16V7K

1 2

U17

AP2301MPG-13_MSOP8

U17

AP2301MPG-13_MSOP8

FLG 5

VIN

3VOUT 6

GND

1

EN

4

VOUT 7

VIN

2VOUT 8

EPAD

9

L6 OCE2012120YZF_4P

USB3.0@

L6 OCE2012120YZF_4P

USB3.0@

11

2

2

3

344

R713 0_0402_5%R713 0_0402_5%

1 2

C391

470P_0402_50V7K

C391

470P_0402_50V7K

1

2

L53 WCM2012F2S-900T04_0805

USB3.0@

L53 WCM2012F2S-900T04_0805

USB3.0@

11

2

2

3

344

R691 0_0402_5%

@

R691 0_0402_5%

@

1 2

R11 0_0402_5%@R11 0_0402_5%@

1 2

R693 0_0402_5%

@

R693 0_0402_5%

@

1 2

R689 0_0402_5%

@

R689 0_0402_5%

@

1 2

R15 0_0402_5%@R15 0_0402_5%@

1 2

R745

100K_0402_5%

R745

100K_0402_5%

12

+

C394

150U_B2_6.3VM_R35M

+

C394

150U_B2_6.3VM_R35M

1

2

L52 WCM2012F2S-900T04_0805

USB3.0@

L52 WCM2012F2S-900T04_0805

USB3.0@

11

2

2

3

344

C424 0.1U_0201_10V6K

USB3.0@

C424 0.1U_0201_10V6K

USB3.0@

12

R20 0_0402_5%@R20 0_0402_5%@

1 2

L4 OCE2012120YZF_4P

USB3.0@

L4 OCE2012120YZF_4P

USB3.0@

11

2

2

3

344

R12 0_0402_5%@R12 0_0402_5%@

1 2

D33

AZC099-04S.R7G_SOT23-6

D33

AZC099-04S.R7G_SOT23-6

I/O4

6

VDD

5

I/O3

4

I/O2 3

GND 2

I/O1 1

R744

100K_0402_5%

R744

100K_0402_5%

12

8

7

65

4

3

2

1

9

10

D36

L05ESDL5V0NA-4 SLP2510P8

@

8

7

65

4

3

2

1

9

10

D36

L05ESDL5V0NA-4 SLP2510P8

@

4

5

1

6

2

7

3

9

8

R314

0_0402_5%

@R314

0_0402_5%

@

1 2

JUSB2

TAIW I_USB005-107CRL-TW

CONN@

JUSB2

TAIW I_USB005-107CRL-TW

CONN@

VBUS

1

D-

2

D+

3

GND

4

SSRX-

5

SSRX+

6

GND

7

SSTX-

8

SSTX+

9

DET

10

GND 11

GND 12

GND 13

GND 14

D24

AZC099-04S.R7G_SOT23-6

D24

AZC099-04S.R7G_SOT23-6

I/O4

6

VDD

5

I/O3

4

I/O2 3

GND 2

I/O1 1

8

7

65

4

3

2

1

9

10

D35

L05ESDL5V0NA-4 SLP2510P8

@

8

7

65

4

3

2

1

9

10

D35

L05ESDL5V0NA-4 SLP2510P8

@

4

5

1

6

2

7

3

9

8

R16 0_0402_5%@R16 0_0402_5%@

1 2

C428 .1U_0402_16V7K

USB3.0@

C428 .1U_0402_16V7K

USB3.0@

12

L3 OCE2012120YZF_4P

USB3.0@

L3 OCE2012120YZF_4P

USB3.0@

11

2

2

3

344

JUSB1

TAIW I_USB005-107CRL-TW

CONN@

JUSB1

TAIW I_USB005-107CRL-TW

CONN@

VBUS

1

D-

2

D+

3

GND

4

SSRX-

5

SSRX+

6

GND

7

SSTX-

8

SSTX+

9

DET

10

GND 11

GND 12

GND 13

GND 14

C422 0.1U_0201_10V6K

USB3.0@

C422 0.1U_0201_10V6K

USB3.0@

12

L5 OCE2012120YZF_4P

USB3.0@

L5 OCE2012120YZF_4P

USB3.0@

11

2

2

3

344

R17 0_0402_5%@R17 0_0402_5%@

1 2

C393

470P_0402_50V7K

C393

470P_0402_50V7K

1

2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

20mil

Board ID

Ra

Rb

Analog Board ID definition,

Please see page 3.

Latest design guide suggest change to 74LVC1G06.

Follow KB930 checking List

ESD request

KB930&9012 Co-Layout Item

Pin 111 is a power source for HW operation of KB9012.

So, power plan will be different between KB930 and KB9012.

Pin74(KB930),Pin118(KB9012) are with different PECI pin location,

so HW must co-layout for it.

Please make sure which EC pin will be connected to PECI circuit.

Pin104 co-layout circuit is for power fail function of KB930 and KB9012.

At KB930, PCH_PWROK will be connected to pin 104.

At KB9012,PCH_PWROK will be connected to pin 32,

and VCOUT0_PH will be connected to pin 104.

KSO[0..15]

KSI[0..7]

ECAGND

ECAGND

TP_DATA

TP_CLK

EC_MUTE#

CLK_PCI_LPC

SYSON

EC_SMB_CK1

KSI1

KSO9

BKOFF#

KSI7

FAN_SPEED1

LPC_AD1

AD_BID0

KSI3

KSO4

PLT_RST#

+V18REC_XCLK0

PCH_RSMRST#

KSO8

KSO2

EC_SMI#

VR_ON

SUSP#

BATT_TEMP

KSI0

KSO1

SERIRQ

FSTCHG

EC_RST#

LPC_AD2

ECAGND

KSO14

EC_KBRST#

EC_SMB_DA1

ADP_I

KSI4

EC_SCI#

LPC_AD3

KSO15

KSO10

KSO0

ACOFF

LPC_AD0

LPC_FRAME#

KSO13

GATEA20

KSI2

KSO11

KSO3

KSI6

BEEP#

+EC_VCCA

KSO12

PM_SLP_S5#

TP_CLK

KSI5

KSO7

E51TXD_P80DATA

TP_DATA

KSO6

KSO5

PM_SLP_S3#

E51RXD_P80CLK

VR_LEFT

EC_SMB_CK2

EC_SMB_DA2

BATT_AMB_LED#

HDA_SDO

H_PROCHOT#_EC

EC_MUTE#

VR_HOT#

+3VALW_EC

EC_ACIN

H_PROCHOT#_EC

EC_LID_OUT#

AD_BID0

SA_PGOOD

ON/OFF

BATT_BLUE_LED#

PWR_LED#

EAPD

EC_ACIN

PM_SLP_S4#

PWR_SUSP_LED#

EC_ON

LID_SW#

GPXIOA07

PBTN_OUT#

ENBKL

KB9012_PECI

VCIN0_PH_R

VCIN1_PROCHOT_R

+EC_VCC

9012_PCH_PWROK

EC_PME#

EC_SMI#

EC_SCI#

EC_SMB_DA1

EC_SMB_DA2

EC_SMB_CK2

EC_RST#

CLK_PCI_LPC

EC_SMB_CK1

EC_PME#

VR_RIGHT

VR_RIGHT

BKOFF#

LID_SW#

KSO1

KSO2

VCIN1_PROCHOT_R

VCIN0_PH_R

+EC_VCC

KB9012_PECI

GPXIOA07

9012_PCH_PWROK

PLT_RST#

FAN_PWM

TB_GO2SX

TB_PWRON_POC_RST#

TB_OK2GO2SX#

AOAC_ON

SUSACK#

MOTOR_PPS_L

MOTOR_PPS_R

SUSWARN#

USB_HPD#

SLP_SUS#

PCH_PWR_EN

DPWROK

MOTOR_PWR_ON

DRAMRST_CNTRL_EC

VR_LEFT

WL_OFF#

MOTOR_LED#

BI_DET

MOTOR_BTN

BT_ON#

USB_EN#_R

ACPRESENT

FAN_PWMFAN_SPEED1

BT_LED

IRST_RST#

EC_SPOK

MOTOR_VID0

MOTOR_VID1

IRST_RST#

TB_EJECT_BTN

TB_LED

KSI[0..7]<33>

KSO[0..15]<33>

LPC_FRAME#<13,30>

LPC_AD2<13,30>

LPC_AD0<13,30>

LPC_AD3<13,30>

LPC_AD1<13,30>

SERIRQ<13,30>

TP_CLK <33>

EC_SMB_DA1<37,38>

EC_SMB_CK1<37,38>

BEEP# <33>

FSTCHG <38>

EC_SMI#<18>

EC_KBRST#<18>

GATEA20<18>

BATT_TEMP <37>

FAN_SPEED1<34>

ADP_I <37,38>

TP_DATA <33>

BKOFF# <22>

PCH_RSMRST# <15>

SYSON <35,40>

VR_ON <43>

CLK_PCI_LPC<17>

EC_SMB_DA2<11,14,24>

EC_SMB_CK2<11,14,24>

EC_MUTE# <33>

ACOFF <36>

SUSP# <35,38,40,41>

EC_SCI#<18>

E51RXD_P80CLK<29>

PLT_RST#<17,22,24,30,5>

E51TXD_P80DATA<29>

BATT_AMB_LED# <22>

PM_SLP_S3#<15>

PM_SLP_S5#<15>

SUSCLK<15>

H_PROCHOT# <5>

VR_HOT#<43>

ACIN <15,35,38,39>

HDA_SDO <13>

EC_LID_OUT# <18>

SA_PGOOD <42>

BATT_BLUE_LED# <22>

PWR_LED# <22>

EC_ON <39>

PWR_SUSP_LED#<22>

LID_SW# <22>

ENBKL <16>

EAPD <33>

PBTN_OUT# <15>

ON/OFF <33>

PM_SLP_S4# <15>

H_PECI <18,5>

PCH_PWROK <15>

MAINPWON <39>

VCIN1_PROCHOT <37>

VCIN0_PH <37>

FAN_PWM <34>

TB_GO2SX <24>

TB_PWRON_POC_RST# <24>

TB_OK2GO2SX# <24>

AOAC_ON<28>

SUSACK# <15>

MOTOR_PPS_L <30>

MOTOR_PPS_R <30>

SUSWARN# <15>

USB_HPD# <31>

SLP_SUS# <15>

PCH_PWR_EN<35>

DPWROK<15>

MOTOR_PWR_ON <30,45>

DRAMRST_CNTRL_EC <6>

VR_RIGHT <30>

VR_LEFT <30>

EC_PME#<28>

BT_ON# <28>

WL_OFF# <28>

MOTOR_LED#<33>

BI_DET<33>

MOTOR_BTN<33>

USB_EN#<31> ACPRESENT<15>

SYSON# <35>

BT_LED <28>

IRST_RST#<17>

EC_SPOK <37>

ECAGND <37>

+EC_VCC <37>

MOTOR_VID0 <45>

MOTOR_VID1 <45>

TB_LED<25>

TB_EJECT_BTN <25>

+3VS

+3VS

+3VALW

+3VALW

+3VLP

+3VALW

+3VALW_EC

+3VS

+3VALW_EC

+3VALW

+3VALW_EC

+3VLP

+3VALW

+3VLP

+3VALW_EC

+3VALW_EC

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

EC ENE-KB930/KB9012

Custom

32 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

EC ENE-KB930/KB9012

Custom

32 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

EC ENE-KB930/KB9012

Custom

32 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

C1201

0.1U_0201_10V6K

C1201

0.1U_0201_10V6K

1

2

R941 2.2K_0402_5%R941 2.2K_0402_5%

1 2

L57

FBMA-L11-160808-800LMT_0603

L57

FBMA-L11-160808-800LMT_0603

12

G

D

S

Q60

SSM3K7002FU_SC70-3

G

D

S

Q60

SSM3K7002FU_SC70-3

2

13

C1203

1000P_0201_16V7K

C1203

1000P_0201_16V7K

1

2

R955 0_0402_5%930@R955 0_0402_5%930@

12

C1199

0.1U_0201_10V6K

C1199

0.1U_0201_10V6K

1

2

J11

JUMP_43X39

@J11

JUMP_43X39

@

1

122

C1213

0.1U_0201_10V6K

C1213

0.1U_0201_10V6K

1

2

R943 10K_0402_5%@R943 10K_0402_5%@

1 2

R939 1K_0402_5%@R939 1K_0402_5%@

1 2

R954 0_0402_5%9012@R954 0_0402_5%9012@

12

R935 200K_0402_5%930@R935 200K_0402_5%930@ 12

C1215 20P_0402_50V8C1215 20P_0402_50V8

1 2

C451

1000P_0201_16V7K

C451

1000P_0201_16V7K

1

2

R960

56K_0402_5%

R960

56K_0402_5%

1 2

R957

100K_0402_5%

R957

100K_0402_5%

1 2

R936 47K_0402_5%930@R936 47K_0402_5%930@ 12

R959 0_0402_5%

@

R959 0_0402_5%

@

1 2

R950 100K_0402_5%R950 100K_0402_5%

12

R946 10K_0402_5%R946 10K_0402_5%

1 2

C1202

1000P_0201_16V7K

C1202

1000P_0201_16V7K

1

2

R958 43_0402_1%9012@R958 43_0402_1%9012@

1 2

R938 47K_0402_5%R938 47K_0402_5%

12

LPC & MISC

Int. K/B

Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

U53

KB9012QF-A3_LQFP128_14X14

9012@

LPC & MISC

Int. K/B

Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

U53

KB9012QF-A3_LQFP128_14X14

9012@

GATEA20/GPIO00

1

KBRST#/GPIO01

2

SERIRQ

3

LPC_FRAME#

4

LPC_AD3

5

PM_SLP_S3#/GPIO04

6

LPC_AD2

7

LPC_AD1

8

EC_VDD/VCC 9

LPC_AD0

10

GND/GND

11

CLK_PCI_EC

12

PCIRST#/GPIO05

13

PM_SLP_S5#/GPIO07

14

EC_SMI#/GPIO08

15

GPIO0A

16

GPIO0B

17

GPIO0C

18

GPIO0D

19

EC_SCII#/GPIO0E

20

GPIO0F 21

EC_VDD/VCC 22

BEEP#/GPIO10 23

GND/GND

24

EC_INVT_PWM/GPIO11

25

GPIO12 26

ACOFF/GPIO13 27

FAN_SPEED1/GPIO14

28

EC_PME#/GPIO15

29

EC_TX/GPIO16

30

EC_RX/GPIO17

31

PCH_PWROK/GPIO18

32

EC_VDD/VCC 33

SUSP_LED#/GPIO19

34

GND/GND

35

NUM_LED#/GPIO1A

36

EC_RST#

37

GPIO1D

38

KSO0/GPIO20

39

KSO1/GPIO21

40

KSO2/GPIO22

41

KSO3/GPIO23

42

KSO4/GPIO24

43

KSO5/GPIO25

44

KSO6/GPIO26

45

KSO7/GPIO27

46

KSO8/GPIO28

47

KSO9/GPIO29

48

KSO10/GPIO2A

49

KSO11/GPIO2B

50

KSO12/GPIO2C

51

KSO13/GPIO2D

52

KSO14/GPIO2E

53

KSO15/GPIO2F

54

KSI0/GPIO30

55

KSI1/GPIO31

56

KSI2/GPIO32

57

KSI3/GPIO33

58

KSI4/GPIO34

59

KSI5/GPIO35

60

KSI6/GPIO36

61

KSI7/GPIO37

62

BATT_TEMP/GPIO38 63

GPIO39 64

ADP_I/GPIO3A 65

GPIO3B 66

EC_VDD/AVCC 67

DAC_BRIG/GPIO3C 68

AGND/AGND

69

EN_DFAN1/GPIO3D 70

IREF/GPIO3E 71

CHGVADJ/GPIO3F 72

ENBKL/GPIO40 73

PECI_KB930/GPIO41 74

GPIO42 75

IMON/GPIO43 76

EC_SMB_CK1/GPIO44

77

EC_SMB_DA1/GPIO45

78

EC_SMB_CK2/GPIO46

79

EC_SMB_DA2/GPIO47

80

KSO16/GPIO48

81

KSO17/GPIO49

82

EC_MUTE#/GPIO4A 83

USB_EN#/GPIO4B 84

CAP_INT#/GPIO4C 85

EAPD/GPIO4D 86

TP_CLK/GPIO4E 87

TP_DATA/GPIO4F 88

FSTCHG/GPIO50 89

BATT_CHG_LED#/GPIO52 90

CAPS_LED#/GPIO53 91

PWR_LED#/GPIO54 92

BATT_LOW_LED#/GPIO55 93

GND/GND

94

SYSON/GPIO56 95

EC_VDD/VCC 96

CPU1.5V_S3_GATE/GPXIOA00 97

WOL_EN/GPXIOA01 98

HDA_SDO/GPXIOA02 99

EC_RSMRST#/GPXIOA03 100

EC_LID_OUT#/GPXIOA04 101

PROCHOT_IN/GPXIOA05 102

H_PROCHOT#_EC/GPXIOA06 103

VCOUT0_PH/GPXIOA07 104

BKOFF#/GPXIOA08 105

PBTN_OUT#/GPXIOA09 106

PCH_APWROK/GPXIOA10 107

SA_PGOOD/GPXIOA11 108

VCIN0_PH/GPXIOD00 109

AC_IN/GPXIOD01 110

EC_VDD0 111

EC_ON/GPXIOD02 112

GND0

113

ON/OFF/GPXIOD03 114

LID_SW#/GPXIOD04 115

SUSP#/GPXIOD05 116

GPXIOD06 117

PECI_KB9012/GPXIOD07 118

SPIDI/GPIO5B 119

SPIDO/GPIO5C 120

VR_ON/GPIO57 121

XCLKI/GPIO5D

122

XCLKO/GPIO5E

123 V18R 124

EC_VDD/VCC 125

SPICLK/GPIO58 126

PM_SLP_S4#/GPIO59 127

SPICS#/GPIO5A 128

R944 2.2K_0402_5%R944 2.2K_0402_5%

1 2

C1207 100P_0402_50V8JC1207 100P_0402_50V8J

12

R965 10K_0402_5%R965 10K_0402_5%

1 2

R945 2.2K_0402_5%R945 2.2K_0402_5%

1 2

R937 47K_0402_5%930@R937 47K_0402_5%930@ 12

R928 10K_0402_5%@R928 10K_0402_5%@12

C1205

22P_0402_50V8J

@C1205

22P_0402_50V8J

@

12

R940

0_0402_5%

@

R940

0_0402_5%

@12

C1208 0.1U_0201_10V6KC1208 0.1U_0201_10V6K

12

R956 0_0402_5%

@

R956 0_0402_5%

@12

R948 100K_0402_5%R948 100K_0402_5%

12

R951 0_0402_5%R951 0_0402_5%

12

R934 10K_0402_5%@R934 10K_0402_5%@

1 2

C1200

0.1U_0201_10V6K

C1200

0.1U_0201_10V6K

1

2

R932 0_0402_5%

9012@

R932 0_0402_5%

9012@

1 2

R942 2.2K_0402_5%R942 2.2K_0402_5%

1 2

C1214

4.7U_0603_6.3V6K

C1214

4.7U_0603_6.3V6K

1

2

R454

100K_0402_1%

R454

100K_0402_1%

1 2

J9

JUMP_43X39

@J9

JUMP_43X39

@

1

122

R947 0_0402_5%

@

R947 0_0402_5%

@

1 2

R930 0_0402_5%

930@

R930 0_0402_5%

930@

1 2

R931 4.7K_0402_5%R931 4.7K_0402_5%

1 2

R1017 200K_0402_5%9012@R1017 200K_0402_5%9012@ 12

L56

FBMA-L11-160808-800LMT_0603

L56

FBMA-L11-160808-800LMT_0603

1 2

R952 0_0402_5%@R952 0_0402_5%@12

R961 100K_0402_5%R961 100K_0402_5%

12

R455

100K_0402_1%

R455

100K_0402_1%

1 2

C1209 0.01U_0402_16V7K

@

C1209 0.01U_0402_16V7K

@

1 2

R933

33_0402_5%

@R933

33_0402_5%

@

12

C450

1000P_0201_16V7K

C450

1000P_0201_16V7K

1

2

C1204

0.1U_0201_10V6K

C1204

0.1U_0201_10V6K

1

2

R929 4.7K_0402_5%R929 4.7K_0402_5%

1 2

R976 2.2K_0402_5%R976 2.2K_0402_5%

1 2

R949 100K_0402_5%R949 100K_0402_5%

1 2

D37 RB751V-40_SOD323-2D37 RB751V-40_SOD323-2

2 1

C1198

0.1U_0201_10V6K

C1198

0.1U_0201_10V6K

1

2

R953 0_0402_5%

@

R953 0_0402_5%

@

1 2

C1206 100P_0402_50V8JC1206 100P_0402_50V8J

12

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A A

B B

C C

D D

ON/OFF BTNKB Conn.

EMI request

TP Conn.

BOT side

Audio/B 20pin

Need Check Gate Threshold Voltage

Battery BI Low voltage is 0.8V

10mil

Battery Reset

60mil

20mil

10mil

Motor BTN

KSI3

KSO8

KSI2

KSO9

KSO14

KSO15

KSO13

KSO12

KSI0

KSO10

KSI1

KSO11

KSI6

KSI7

KSI5

KSO0

KSO5

KSO7

KSO4

KSO6

KSO3

KSI4

KSO2

KSO1

KSO[0..15]

KSI[0..7]

ON/OFFBTN#

TP_CLK

TP_DATA

KSO4

KSO3

KSO5

KSO6

KSO7

KSO8

KSO12

KSO10

KSO13

KSO11

KSO9

KSO15

KSO14

KSI1

KSI6

KSI5

KSI2

KSI0

KSI3

KSI4

KSO1

KSO0

KSO2

KSI7

D_CK_SDATA

D_CK_SCLK

BEEP

BI_GATE#

BI_GATE#

BEEP

MOTOR_BTN_SW#

MOTOR_BTN_SW#

SMB_ALERT#_R

SMB_ALERT#_R

KSO[0..15] <32>

KSI[0..7] <32>

ON/OFF <32>ON/OFFBTN#<22>

BEEP#<32>

PCH_SPKR<13>

BI_DET <32>

BI <37>

TP_CLK <32>

TP_DATA <32>

D_CK_SDATA <14>

D_CK_SCLK <14>

EC_MUTE# <32>

EAPD <32>

HDA_SDIN0 <13>

HDA_SDOUT_AUDIO <13>

HDA_SYNC_AUDIO <13>

HDA_BITCLK_AUDIO <13>

HDA_RST_AUDIO# <13>

MOTOR_LED# <32>

MOTOR_BTN <32>

SMB_ALERT#<14>

+3VALW +3VLP

+3VS

+3VS

+RTCVCC

+3VS

+5VS

+3VS

+3VALW

+3VS

+3VS

+3VALW_EC +3VLP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

BIOS, I/O Port & K/B Connector

Custom

33 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

BIOS, I/O Port & K/B Connector

Custom

33 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

BIOS, I/O Port & K/B Connector

Custom

33 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

C253 100P_0201_25V8J@C253 100P_0201_25V8J@

1 2

C266 100P_0201_25V8J@C266 100P_0201_25V8J@

1 2

JTP1

E-T_6701K-Q08N-00R

CONN@

JTP1

E-T_6701K-Q08N-00R

CONN@

11

22

33

44

55

66

77

88

G9

G10

D6

AZ5125-02S.R7G_SOT23-3

@D6

AZ5125-02S.R7G_SOT23-3

@

2

3

1

BAV70W_SOT323-3

D22

BAV70W_SOT323-3

D22

2

3

1

D41

RB751V-40_SOD323-2

D41

RB751V-40_SOD323-2

12

R967 0_0402_5%@R967 0_0402_5%@

1 2

C255 100P_0201_25V8J@C255 100P_0201_25V8J@

1 2

R850 510K_0402_5%R850 510K_0402_5%

1 2

G

D

S

Q8

SSM3K7002FU_SC70-3

G

D

S

Q8

SSM3K7002FU_SC70-3

2

13

C258 100P_0201_25V8J@C258 100P_0201_25V8J@

1 2

R974

0_0402_5%

R974

0_0402_5%

1 2

C267 100P_0201_25V8J@C267 100P_0201_25V8J@

1 2

C260 100P_0201_25V8J@C260 100P_0201_25V8J@

1 2

JKB1

ACES_85208-24071

CONN@

JKB1

ACES_85208-24071

CONN@

11

22

33

44

55

66

77

88

99

10 10

11 11

12 12

13 13

14 14

15 15

16 16

17 17

18 18

19 19

20 20

21 21

22 22

23 23

24 24

GND1 25

GND2 26

C245 100P_0201_25V8J@C245 100P_0201_25V8J@

1 2

C259 100P_0201_25V8J@C259 100P_0201_25V8J@

1 2

JAUDIO

ACES_50406-02071-001

CONN@

JAUDIO

ACES_50406-02071-001

CONN@

11

22

33

44

55

66

77

88

99

10 10

11 11

12 12

13 13

14 14

15 15

16 16

17 17

18 18

19 19

20 20

G1 21

G2 22

G3 23

G4 24

G

D

S

Q9

SSM3K7002FU_SC70-3

G

D

S

Q9

SSM3K7002FU_SC70-3

2

1 3

R909

100K_0402_5%

@

R909

100K_0402_5%

@

1 2

C265 100P_0201_25V8J@C265 100P_0201_25V8J@

1 2

C249 100P_0201_25V8J@C249 100P_0201_25V8J@

1 2

C251 100P_0201_25V8J@C251 100P_0201_25V8J@

1 2

R968

10K_0402_5%

R968

10K_0402_5%

12

C268 100P_0201_25V8J@C268 100P_0201_25V8J@

1 2

C250 100P_0201_25V8J@C250 100P_0201_25V8J@

1 2

C269 100P_0201_25V8J@C269 100P_0201_25V8J@

1 2

R971

10K_0402_5%

R971

10K_0402_5%

12

R969

1K_0402_5%

R969

1K_0402_5%

12

R970

560_0402_5%

R970

560_0402_5%

1 2

C247 100P_0201_25V8J@C247 100P_0201_25V8J@

1 2

R975 0_0402_5%@R975 0_0402_5%@

1 2

C246 100P_0201_25V8J@C246 100P_0201_25V8J@

1 2

C1224

1U_0402_6.3V6K

C1224

1U_0402_6.3V6K

1 2

D4

AZ5125-02S.R7G_SOT23-3

@D4

AZ5125-02S.R7G_SOT23-3

@

2

3

1

C252 100P_0201_25V8J@C252 100P_0201_25V8J@

1 2

C272 100P_0201_25V8J@C272 100P_0201_25V8J@

1 2

C270 100P_0201_25V8J@C270 100P_0201_25V8J@

1 2

R972

560_0402_5%

R972

560_0402_5%

1 2

R907

100K_0402_5%

9012@

R907

100K_0402_5%

9012@

1 2

C216

100P_0402_50V8J

C216

100P_0402_50V8J

1

2

C254 100P_0201_25V8J@C254 100P_0201_25V8J@

1 2

C196

0.1U_0201_10V6K

C196

0.1U_0201_10V6K

1

2

C1227

1U_0402_6.3V6K

C1227

1U_0402_6.3V6K

1 2

C248 100P_0201_25V8J@C248 100P_0201_25V8J@

1 2

C271 100P_0201_25V8J@C271 100P_0201_25V8J@

1 2

R144

100K_0402_5%

930@

R144

100K_0402_5%

930@

1 2

C217

100P_0402_50V8J

C217

100P_0402_50V8J

1

2

R908

100K_0402_5%

R908

100K_0402_5%

1 2

C256 100P_0201_25V8J@C256 100P_0201_25V8J@

1 2

C263 100P_0201_25V8J@C263 100P_0201_25V8J@

1 2

Stand-Off

Thermal module

FAN Conn

20mil

FAN_SPEED1

FAN_PWM

FAN_SPEED1<32>

FAN_PWM<32>

+5VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Step Motor,FAN,Screw Hole

Custom

34 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Step Motor,FAN,Screw Hole

Custom

34 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Step Motor,FAN,Screw Hole

Custom

34 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

H8

H_4P0

@

H8

H_4P0

@

1

C585

10U_0805_25V6K

C585

10U_0805_25V6K

1 2

R489

10K_0402_5%

R489

10K_0402_5%

12

H6

H_4P0

@

H6

H_4P0

@

1

C579

1000P_0402_50V7K@

C579

1000P_0402_50V7K@

1

2

FD4

@

FIDUCIAL_C40M80

FD4

@

FIDUCIAL_C40M80

1

C587

1000P_0402_50V7K

C587

1000P_0402_50V7K

1 2

H10

H_2P5x3P0

@

H10

H_2P5x3P0

@

1

FD2

@

FIDUCIAL_C40M80

FD2

@

FIDUCIAL_C40M80

1

FD1

@

FIDUCIAL_C40M80

FD1

@

FIDUCIAL_C40M80

1

H3

H_5P2

@

H3

H_5P2

@

1

FD3

@

FIDUCIAL_C40M80

FD3

@

FIDUCIAL_C40M80

1

H4

H_5P2

@

H4

H_5P2

@

1

JFAN1

ACES_88266-04001

CONN@

JFAN1

ACES_88266-04001

CONN@

1

12

23

34

4

G1 5

G2 6

H5

H_5P2

@

H5

H_5P2

@

1

H2

H_5P2

@

H2

H_5P2

@

1

H9

H_4P0

@

H9

H_4P0

@

1

H1

H_5P2

@

H1

H_5P2

@

1

H11

H_4P0N

@

H11

H_4P0N

@

1

H7

H_4P0

@

H7

H_4P0

@

1

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

+5VALW to +5VS +3VALW to +3VALW_PCH(PCH AUX Power)

20mil

20mil

10mil

10mil

20mil

+3VALW to +3VS

20mil

10mil

+1.35V to +1.35VS

Rds=2.6m

Ω

(Typ)

3.2m

Ω

(Max)

Rds=13.5m

Ω

(Typ)

16.5m

Ω

(Max)

Rds=13.5m

Ω

(Typ)

16.5m

Ω

(Max)

SUSP

3VS_GATE

SUSP

5VS_GATE

SUSP

SUSP

SUSP

SYSON

ACIN

1.35VS_GATE SUSP

SUSP

SUSP SUSPSUSPSYSON#

SYSON#

SUSP#<32,38,40,41>

SYSON<32,40>

ACIN<15,32,38,39>

SUSP<40,5>

PCH_PWR_EN<32>

PCH_PWR_EN#<20>

SYSON#<32>

+5VALW

+3VS

+VSB

+5VS

+3VALW +3VALW_PCH

+VSB

+3VALW

+5VALW

+5VALW

+1.35V

+VSB

+1.35VS

+1.8VS+0.675VS +1.05VS_VTT+1.35V

+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

DC Interface

Custom

35 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

DC Interface

Custom

35 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

DC Interface

Custom

35 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

C458

1U_0402_6.3V6K

C458

1U_0402_6.3V6K

1

2

C464

4.7U_0603_10V6K

C464

4.7U_0603_10V6K

1

2

R438

100K_0402_5%

R438

100K_0402_5%

12

C338

1U_0402_6.3V6K

C338

1U_0402_6.3V6K

1

2

R368

47K_0402_5%

R368

47K_0402_5%

12

G

S

D

Q15B

DMN66D0LDW-7_SOT363-6

G

S

D

Q15B

DMN66D0LDW-7_SOT363-6

61

2

C499

.1U_0603_25V7K

C499

.1U_0603_25V7K

1

2

R441

100K_0402_5%

R441

100K_0402_5%

1 2

C377

0.1U_0402_16V4Z

C377

0.1U_0402_16V4Z

1

2

G

D

S

Q24

SSM3K7002FU_SC70-3

@

G

D

S

Q24

SSM3K7002FU_SC70-3

@

2

13

R245

470_0603_5%

R245

470_0603_5%

1 2

R269

200K_0402_5%

R269

200K_0402_5%

12

R29

470_0603_5%

R29

470_0603_5%

1 2

C375

10U_0603_6.3V6M

C375

10U_0603_6.3V6M

12

C380

.1U_0603_25V7K

C380

.1U_0603_25V7K

1

2

C463

.1U_0603_25V7K

C463

.1U_0603_25V7K

1

2

R365

470_0603_5%

@R365

470_0603_5%

@

1 2

R366

22_0603_5%

R366

22_0603_5%

12

G

S

D

Q25B

DMN66D0LDW-7_SOT363-6

G

S

D

Q25B

DMN66D0LDW-7_SOT363-6

61

2

R268

510K_0402_5%

@

R268

510K_0402_5%

@

12

R277

1M_0402_5%

@

R277

1M_0402_5%

@

12

R437

20K_0402_5%

R437

20K_0402_5%

12

C498

4.7U_0603_10V6K

C498

4.7U_0603_10V6K

1

2

C469

1U_0603_10V6K

C469

1U_0603_10V6K

1

2

G

D

S

Q5

SSM3K7002FU_SC70-3

G

D

S

Q5

SSM3K7002FU_SC70-3

2

13

G

S

D

Q59B

DMN66D0LDW-7_SOT363-6

G

S

D

Q59B

DMN66D0LDW-7_SOT363-6

61

2

C460

10U_0603_6.3V6M

C460

10U_0603_6.3V6M

12

R440

470_0603_5%

R440

470_0603_5%

1 2

R629 0_0402_5%@R629 0_0402_5%@12

U22

SI7716ADN-T1-GE3_POWERPAK8-5

U22

SI7716ADN-T1-GE3_POWERPAK8-5

4

5

1

2

3

G

D

S

Q23

SSM3K7002FU_SC70-3

G

D

S

Q23

SSM3K7002FU_SC70-3

2

13

G

D

S

Q21

SSM3K7002FU_SC70-3

@

G

D

S

Q21

SSM3K7002FU_SC70-3

@

2

13

R246

100K_0402_5%

R246

100K_0402_5%

1 2

G

D

S

Q34

SSM3K7002FU_SC70-3

G

D

S

Q34

SSM3K7002FU_SC70-3

2

13

G

D

S

Q26

SSM3K7002FU_SC70-3

G

D

S

Q26

SSM3K7002FU_SC70-3

2

13

G

S

D

Q19B

DMN66D0LDW-7_SOT363-6

G

S

D

Q19B

DMN66D0LDW-7_SOT363-6

61

2

R436

470_0603_5%

R436

470_0603_5%

1 2

S

G

D

Q15A

DMN66D0LDW-7_SOT363-6

S

G

D

Q15A

DMN66D0LDW-7_SOT363-6

5

34

C339

4.7U_0603_6.3V6K

C339

4.7U_0603_6.3V6K

1

2

R508

470_0603_5%

R508

470_0603_5%

1 2

R450

100K_0402_5%

R450

100K_0402_5%

12

U12

SI7716ADN-T1-GE3_POWERPAK8-5

U12

SI7716ADN-T1-GE3_POWERPAK8-5

4

5

1

2

3

S

G

D

Q59A

DMN66D0LDW-7_SOT363-6

S

G

D

Q59A

DMN66D0LDW-7_SOT363-6

5

34

R449

100K_0402_5%

R449

100K_0402_5%

1 2

U21

SI7716ADN-T1-GE3_POWERPAK8-5

U21

SI7716ADN-T1-GE3_POWERPAK8-5

4

5

1

2

3

S

G

D

Q25A

DMN66D0LDW-7_SOT363-6

S

G

D

Q25A

DMN66D0LDW-7_SOT363-6

5

34

C461

4.7U_0603_6.3V6K

C461

4.7U_0603_6.3V6K

1

2

C701

4.7U_0603_6.3V6K

C701

4.7U_0603_6.3V6K

1

2

C376

0.1U_0402_16V4Z

C376

0.1U_0402_16V4Z

1

2

R251

10K_0402_5%

R251

10K_0402_5%

12

S

G

D

Q19A

DMN66D0LDW-7_SOT363-6

S

G

D

Q19A

DMN66D0LDW-7_SOT363-6

5

34

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

Chief River VC

DC_IN_S1

ACOFF<32>

+VSBP +VSB

+0.675VS+0.675VSP

+1.35V+1.35VP

+1.8VSP +1.8VS

VS

BATT+

+3VLP

+CHGRTC

+1.05VS_VCCPP +1.05VS_VTT

VIN

VIN B+

Pre_CHG

+VCCSAP +VCCSA

+5VALWP

+RTCBATT

+HV_12VP +HV_12V

+1.05VS_LCP +1.05VS_LC

+RTCBATT_R

+3VALWP +3VALW +5VALWP +5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

DCIN/PRECHARGE

Custom

36 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

DCIN/PRECHARGE

Custom

36 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

DCIN/PRECHARGE

Custom

36 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

PJ2

JUMP_43X79

PJ2

JUMP_43X79

1

122

PQ1

TP0610K-T1-E3_SOT23-3

PQ1

TP0610K-T1-E3_SOT23-3

2

13

PJP1

ACES_88266-04001

PJP1

ACES_88266-04001

11

33

44

22

GND 5

GND 6

PD4

LL4148_LL34-2

@PD4

LL4148_LL34-2

@

12

PR4

1K_1206_5%

PR4

1K_1206_5%

1 2

PJ10

JUMP_43X39

PJ10

JUMP_43X39

1

122

PC3

100P_0402_50V8J

PC3

100P_0402_50V8J

12

PJ9

JUMP_43X39

PJ9

JUMP_43X39

1

122

PR102

560_0603_5%

PR102

560_0603_5%

1 2

PC1

1000P_0402_50V7K

PC1

1000P_0402_50V7K

12

PD1

LL4148_LL34-2

PD1

LL4148_LL34-2

12

PD2

BAS40CW _SOT323-3

PD2

BAS40CW _SOT323-3

2

3

1

PR2

1K_1206_5%

PR2

1K_1206_5%

1 2

PJ3

JUMP_43X39

PJ3

JUMP_43X39

1

122

PR57

560_0603_5%

PR57

560_0603_5%

1 2

PJ11

JUMP_43X118

PJ11

JUMP_43X118

1

122

PJ15

JUMP_43X39

PJ15

JUMP_43X39

1

122

PR7

100K_0402_5%

PR7

100K_0402_5%

12

PC2

100P_0402_50V8J

PC2

100P_0402_50V8J

12

PJ4

JUMP_43X79

PJ4

JUMP_43X79

1

122

PR12

0_0402_5%

PR12

0_0402_5%

1 2

PQ2

PDTC115EU_SOT323-3

<BOM Structure>

PQ2

PDTC115EU_SOT323-3

<BOM Structure>

2

13

PQ3

PDTC115EU_SOT323-3

<BOM Structure>

PQ3

PDTC115EU_SOT323-3

<BOM Structure>

2

13

PJ1

JUMP_43X79

PJ1

JUMP_43X79

1

122

PR5

100K_0402_5%

PR5

100K_0402_5%

12

PR1

1K_1206_5%

PR1

1K_1206_5%

1 2

PR22

0_0402_5%

PR22

0_0402_5%

12

PR6

100K_0402_5%

PR6

100K_0402_5%

12

PJ8

JUMP_43X39

PJ8

JUMP_43X39

1

122

PJ5

JUMP_43X79

PJ5

JUMP_43X79

1

122

PJ7

JUMP_43X79

PJ7

JUMP_43X79

1

122

PJ6

JUMP_43X39

PJ6

JUMP_43X39

1

122

PR3

1K_1206_5%

PR3

1K_1206_5%

1 2

PL1

SMB3025500YA_2P

PL1

SMB3025500YA_2P

1 2

PC4

1000P_0402_50V7K

PC4

1000P_0402_50V7K

12

PJ12

JUMP_43X39

PJ12

JUMP_43X39

1

122

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

<40,41>

<40,41>

CPU thermal protection at 92 degree C for reference

PH1 under CPU botten side :

For 65W adapter==>action 70W , Recovery 54W

For 90W adapter==>action 97W , Recovery 75W

Chief River VC

G718 ENE9012

65W

90W

3.92K

8.87K

2.21K

6.98K

VCIN1 1.456V

1.148V

1.2V

0.925V

EC side

For 40W thunder bolt adapter==>action 50W , Recovery 38W

VCIN1=0.9V recover = 0.683V

TH

EC_SMCA

EC_SMDA

BI+

BATT_S1

ECAGNDECAGND

SPOK<39>

BATT_TEMP <32>

EC_SMB_CK1 <32,38>

EC_SMB_DA1 <32,38>

ADP_I <32,38>

VCIN0_PH <32>

VCIN1_PROCHOT <32>

BI <33>

EC_SPOK<32>

ECAGND <32>

+EC_VCC <32>

B+ +VSBP

VL

+3VALW

BATT+

VMB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

BATTERY CONN / OTP

Custom

37 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

BATTERY CONN / OTP

Custom

37 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

BATTERY CONN / OTP

Custom

37 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

PL2

SMB3025500YA_2P

PL2

SMB3025500YA_2P

1 2

PC8

1000P_0402_50V7K

PC8

1000P_0402_50V7K

12

PR17

100_0402_1%

PR17

100_0402_1%

12

PR15

100_0402_1%

PR15

100_0402_1%

12

PC14

.1U_0402_16V7K

PC14

.1U_0402_16V7K

12

PR20

6.49K_0402_1%

PR20

6.49K_0402_1%

12

PC12

0.22U_0603_25V7K

@

PC12

0.22U_0603_25V7K

@

12

PR27

22K_0402_1%

PR27

22K_0402_1%

12

PC9

0.01U_0402_25V7K

PC9

0.01U_0402_25V7K

12

PR26

100K_0402_1%

PR26

100K_0402_1%

12

PR34

1K_0402_5%

@PR34

1K_0402_5%

@

1 2

PR19

1K_0402_5%

PR19

1K_0402_5%

12

PH1

100K_0201_1%_TSMAB104F4251RZ

PH1

100K_0201_1%_TSMAB104F4251RZ

12

PJP2

ACES_88231-08001

CONN@

PJP2

ACES_88231-08001

CONN@

11

22

33

44

55

66

77

88

GND1 9

GND2 10

PQ6

TP0610K-T1-E3_SOT23-3

PQ6

TP0610K-T1-E3_SOT23-3

2

13

PC17

.1U_0402_16V7K

PC17

.1U_0402_16V7K

12

PR33

1.65K_0402_1%

65W @ PR33

1.65K_0402_1%

65W @

PR28

100K_0402_1%

@PR28

100K_0402_1%

@

12

PR38

10K_0402_1%

PR38

10K_0402_1%

12

PR33

6.98K_0402_1%

90W @ PR33

6.98K_0402_1%

90W @

12

PR21

1K_0402_1%

PR21

1K_0402_1%

12

PC15

1U_0402_6.3V6K

@PC15

1U_0402_6.3V6K

@

12

PR29

12.4K_0402_1%

PR29

12.4K_0402_1%

12

PC13

0.1U_0603_25V7K

PC13

0.1U_0603_25V7K

12

G

D

S

PQ7

SSM3K7002FU_SC70-3

G

D

S

PQ7

SSM3K7002FU_SC70-3

2

13

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

for reverse input protection

Close EC

Compal Electronics, Inc.

Min. Typ Max.

L-->H 17.852V 18.063V 18.275V

H-->L 17.476V 17.687V 17.898V

Vin Dectector

ILIM and external DPM

Min. Typ Max.

3.906A 4.006A 4.108A

battery 4.35/cell *4 =17.4, battery voltage -->

back to back --> Vin

BQ24725_ACDRV

BQ24725_ACN

BQ24725_ACP

BQ24725_BATDRV

BQ24725_BATDRV

BQ24725_CMSRC

BQ24725_LX

BQ24725_LX CHG

CSON1

CSOP1

DH_CHG

DH_CHG

DL_CHG

ACDET

ACOK

BQ24725_BST

CSON1

CSOP1

SRP

SRN

DH_CHG-1

ADP_I <32,37>

EC_SMB_CK1 <32,37>

EC_SMB_DA1 <32,37>

ACIN<15,32,35,39>

SUSP#<32,35,40,41>

FSTCHG<32>

P2

+3VLP

P1 B+VIN

+3VALW

VIN

BATT+

VIN

Pre_CHG

ACDET

CHG_B+

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PWR DCIN / Pre-charge

2012/4/6

51

2013/4/6

38

Custom

Thursday, April 12, 2012

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PWR DCIN / Pre-charge

2012/4/6

51

2013/4/6

38

Custom

Thursday, April 12, 2012

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PWR DCIN / Pre-charge

2012/4/6

51

2013/4/6

38

Custom

Thursday, April 12, 2012

PR62

2M_0402_1%

PR62

2M_0402_1%

12

PD7

RB751V-40_SOD323-2

PD7

RB751V-40_SOD323-2

12

PC40

@

680P_0402_50V7K

PC40

@

680P_0402_50V7K

12

PC22

10U_0805_25V6K

PC22

10U_0805_25V6K

12

PC35

10U_0805_25V6K

PC35

10U_0805_25V6K

12

PC26

0.1U_0402_25V6

PC26

0.1U_0402_25V6

1 2

PC44

100P_0402_50V8J

PC44

100P_0402_50V8J

12

G

D

S

PQ15

SSM3K7002FU_SC70-3

G

D

S

PQ15

SSM3K7002FU_SC70-3

2

13

PQ14

PDTC115EU_SOT323-3

<BOM Structure>

PQ14

PDTC115EU_SOT323-3

<BOM Structure>

2

13

PC43

0.1U_0402_16V7K

PC43

0.1U_0402_16V7K

12

G

D

S

PQ8

SI1304BDL-T1-E3_SC70-3

G

D

S

PQ8

SI1304BDL-T1-E3_SC70-3

1

2

3

PC25

2200P_0402_50V7K

PC25

2200P_0402_50V7K

12

PR47

10_1206_1%

PR47

10_1206_1%

12

PC16

0.1U_0402_25V6

PC16

0.1U_0402_25V6

12

PR66

0_0402_5%

PR66

0_0402_5%

1 2

PR64

100K_0402_1%

PR64

100K_0402_1%

1 2

PR44

4.12K_0603_1%

PR44

4.12K_0603_1%

1 2

PC23

<BOM STRUCTURE>

0.1U_0402_25V6

PC23

<BOM STRUCTURE>

0.1U_0402_25V6

12

PR60

280K_0603_0.1%

PR60

280K_0603_0.1%

1 2

PQ10

SIS412DN-T1-GE3_POW ERPAK8-5

PQ10

SIS412DN-T1-GE3_POW ERPAK8-5

4

5

1

2

3

PQ9

SIS412DN-T1-GE3_POW ERPAK8-5

PQ9

SIS412DN-T1-GE3_POW ERPAK8-5

4

5

1

2

3

PR46

4.12K_0603_1%

PR46

4.12K_0603_1%

12

PD9

RB751V-40_SOD323-2

PD9

RB751V-40_SOD323-2

12

PC41

0.1U_0603_25V7K

PC41

0.1U_0603_25V7K

12

PC31

1U_0603_25V6K

PC31

1U_0603_25V6K

1 2

PC37

0.1U_0402_25V6

PC37

0.1U_0402_25V6

12

PR40

3M_0402_5%

PR40

3M_0402_5%

1 2

PR63

154K_0603_0.1%

PR63

154K_0603_0.1%

12

PC45

0.1U_0402_16V7K

@PC45

0.1U_0402_16V7K

@

12

PQ13

SIS412DN-T1-GE3_POWERPAK8-5

PQ13

SIS412DN-T1-GE3_POWERPAK8-5

4

5

1

2

3

PC30

0.1U_0603_25V7K

PC30

0.1U_0603_25V7K

12

PC36

0.01U_0402_50V7K

PC36

0.01U_0402_50V7K

12

PR50

0_0402_5%

PR50

0_0402_5%

1 2

PR61

100K_0402_1%

PR61

100K_0402_1%

12

PQ11

SIS412DN-T1-GE3_POW ERPAK8-5

PQ11

SIS412DN-T1-GE3_POW ERPAK8-5

4

5

1

2

3

PR54

10_0603_5%

PR54

10_0603_5%

1 2

PR41

0.02_1206_1%

PR41

0.02_1206_1%

1

3

4

2

PC34

10U_0805_25V6K

PC34

10U_0805_25V6K

12

PR43

@

0_0402_5%

PR43

@

0_0402_5%

12

PR52

0.01_1206_1%

PR52

0.01_1206_1%

1

3

4

2

PC21

10U_0805_25V6K

PC21

10U_0805_25V6K

12

PR48

2.2_0603_5%

PR48

2.2_0603_5%

12

PC29

0.047U_0402_25V7K

PC29

0.047U_0402_25V7K

1 2

PC27

0.01U_0402_50V7K

PC27

0.01U_0402_50V7K

12

PR55

6.8_0603_5%

PR55

6.8_0603_5%

1 2

PQ12

SIS412DN-T1-GE3_POW ERPAK8-5

PQ12

SIS412DN-T1-GE3_POW ERPAK8-5

4

5

1

2

3

PL4

4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%

PL4

4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%

1 2

PR53

@

4.7_1206_5%

PR53

@

4.7_1206_5%

12

PC39

2200P_0402_50V7K

PC39

2200P_0402_50V7K

12

PC24

2200P_0402_50V7K

PC24

2200P_0402_50V7K

12

PC33

1U_0603_25V6K

PC33

1U_0603_25V6K

1 2

PD6

BAS40CW _SOT323-3

PD6

BAS40CW _SOT323-3

1

2

3

PC42

0.01U_0402_25V7K

PC42

0.01U_0402_25V7K

12

PC38

0.1U_0402_25V6

PC38

0.1U_0402_25V6

12

PU4

BQ24725RGRR_VQFN20_3P5X3P5

PU4

BQ24725RGRR_VQFN20_3P5X3P5

ACN

1

ACP

2

CMSRC

3

ACDRV

4

ACOK

5

ACDET

6

IOUT

7

SDA

8

SCL

9

ILIM

10

BATDRV 11

SRN 12

SRP 13

GND 14

LODRV 15

REGN 16

BTST 17

HIDRV 18

PHASE 19

VCC 20

PAD

21

PR58

316K_0402_1%

PR58

316K_0402_1%

1 2

PR39

1M_0402_5%

PR39

1M_0402_5%

1 2

PR59

2M_0402_1%

PR59

2M_0402_1%

12

PR56

100K_0402_1%

PR56

100K_0402_1%

1 2

PR45

4.12K_0603_1%

PR45

4.12K_0603_1%

12

PJ21

JUMP_43X79

PJ21

JUMP_43X79

1

122

PC28

0.1U_0402_25V6

PC28

0.1U_0402_25V6

12

PR42

@

0_0402_5%

PR42

@

0_0402_5%

12

PR65

66.5K_0603_0.1%

PR65

66.5K_0603_0.1%

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3VALW/5VALW

VFB=2.0V

Typ: 175mA

Typ: 175mA

Note:

Use TPS51125 IC can remove RTC refernece LDO

Use TPS51427 IC must keep RTC refernece LDO

RT8205

TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP)

(2)SMPS2=375KHZ(+3VALWP)

+3.3VALWP Ipeak=7A ; Imax=4.9A

Delta I=2.2036A=>1/2Delta I=1.1017A (F=375K Hz)

Rds(on)=16.5m ohm(max) ; Rds(on)=13.5m ohm(typical)

Ilimit_min=(147K*10uA)/(10*16.5m*1.2)=7.42A

Ilimit_max=(147K*10uA)/(10*13.5m*1.2)=9.07A

Iocp=Ilimit+1/2Delta I=8.52A~10.174A

+5VALWP Ipeak=7A ; Imax=4.9A

Delta I=2.6129A=>1/2Delta I=1.3064A (F=300K Hz)

Rds(on)=16.5m ohm(max) ; Rds(on)=13.5m ohm(typical)

Ilimit_min=(147K*10uA)/(10*16.5m*1.2)=7.42A

Ilimit_max=(147K*10uA)/(10*13.5m*1.2)=9.074A

Iocp=Ilimit+1/2Delta I=8.7264A ~ 10.38A

TPS51125A

TONSEL=VREF (1)SMPS1=245KHZ (+5VALWP)

(2)SMPS2=305KHZ(+3VALWP)

3.3VALWP Delta I = 2.709A (Freq=305KHz)

Iocp = 8.7746A ~ 10.42

5VALWP Delta I = 3.199A (Freq=245KHz)

Iocp = 9.0195A ~ 10.673A

Chief River VC

Typ 13.5m ohm

max 16.5m ohm

Typ 13.5m ohm

max 16.5m ohm

ENTRIP1

BST_5V

LX_5V

RT8205_B+

UG_5V

BST_3V

ENTRIP2

LG_5V

ENTRIP1

ENTRIP2

RT8205_B+

LX_3V

UG_3V

LG_3V

SPOK <37>

MAINPWON<32>

ACIN

EC_ON<32>

+5VALWP

+3VALWP

B+

+3VLP

2VREF_8205

VL

VL

VS

B+

RT8205_B+

2VREF_8205

VIN

VL

VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

39 51

Thursday, April 12, 2012

2012/4/6

Compal Electronics, Inc.

2013/4/6

Custom

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

39 51

Thursday, April 12, 2012

2012/4/6

Compal Electronics, Inc.

2013/4/6

Custom

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

39 51

Thursday, April 12, 2012

2012/4/6

Compal Electronics, Inc.

2013/4/6

Custom

PR76

4.7_1206_5%

@

PR76

4.7_1206_5%

@

12

PR75

4.7_1206_5%

@

PR75

4.7_1206_5%

@

12

PC63

680P_0402_50V7K

@

PC63

680P_0402_50V7K

@

12

+

PC62

150U_B2_6.3VM_R35M

+

PC62

150U_B2_6.3VM_R35M

1

2

PD10

RLZ5.1B_LL34

PD10

RLZ5.1B_LL34

1 2

PC56

4.7U_0805_25V6-K

PC56

4.7U_0805_25V6-K

12

PC67

1U_0603_10V6K

PC67

1U_0603_10V6K

12

PC66

0.1U_0603_25V7K

PC66

0.1U_0603_25V7K

12

PR83

316K_0402_1%

930@ PR83

316K_0402_1%

930@

1 2

G

D

S

PQ20B

DMN66D0LDW -7_SOT363-6

G

D

S

PQ20B

DMN66D0LDW -7_SOT363-6

5

34

PC52

2200P_0402_50V7K

PC52

2200P_0402_50V7K

12

PC65

4.7U_0805_10V6K

PC65

4.7U_0805_10V6K

12

G

D

S

PQ23A

DMN66D0LDW -7_SOT363-6

930@

G

D

S

PQ23A

DMN66D0LDW -7_SOT363-6

930@

2

61

PQ19

SI7716ADN-T1-GE3_POW ERPAK8-5

PQ19

SI7716ADN-T1-GE3_POW ERPAK8-5

4

5

1

2

3

PQ18

SI7716ADN-T1-GE3_POW ERPAK8-5

PQ18

SI7716ADN-T1-GE3_POW ERPAK8-5

4

5

1

2

3

PQ21

PDTC115EU_SOT323-3

<BOM Structure>

PQ21

PDTC115EU_SOT323-3

<BOM Structure>

2

13

PR82

402K_0402_1%

930@ PR82

402K_0402_1%

930@

12

PQ17

SIS412DN-T1-GE3_POW ERPAK8-5

PQ17

SIS412DN-T1-GE3_POW ERPAK8-5

4

5

1

2

3

PL6

3.3UH_FDSD0630-H-3R3M-P3_6.6A_20%

PL6

3.3UH_FDSD0630-H-3R3M-P3_6.6A_20%

12

G

D

S

PQ20A

DMN66D0LDW -7_SOT363-6

G

D

S

PQ20A

DMN66D0LDW -7_SOT363-6

2

61

PR100

2.2K_0402_1%

9012@ PR100

2.2K_0402_1%

9012@

1 2

PC61

680P_0402_50V7K

@

PC61

680P_0402_50V7K

@

12

PC51

4.7U_0805_25V6-K

PC51

4.7U_0805_25V6-K

12

PC46

1U_0603_10V6K

PC46

1U_0603_10V6K

12

PC58

0.1U_0603_25V7K

PC58

0.1U_0603_25V7K

12

PR72

147K_0402_1%

PR72

147K_0402_1%

1 2

PC49

0.1U_0603_25V7K

PC49

0.1U_0603_25V7K

12

PJ17

JUMP_43X79

PJ17

JUMP_43X79

1

122

PR73

2.2_0603_5%

PR73

2.2_0603_5%

12

PC57

0.1U_0603_25V7K

PC57

0.1U_0603_25V7K

12

PQ16

SIS412DN-T1-GE3_POW ERPAK8-5

PQ16

SIS412DN-T1-GE3_POW ERPAK8-5

4

5

1

2

3

PR71

147K_0402_1%

PR71

147K_0402_1%

12

PR80

0_0402_5%

PR80

0_0402_5%

1 2

G

D

S

PQ23B

DMN66D0LDW -7_SOT363-6

930@

G

D

S

PQ23B

DMN66D0LDW -7_SOT363-6

930@

5

34

+

PC60

150U_B2_6.3VM_R35M

+

PC60

150U_B2_6.3VM_R35M

1

2

PR84

1M_0402_1%

930@ PR84

1M_0402_1%

930@

1 2

PC55

4.7U_0805_25V6-K

PC55

4.7U_0805_25V6-K

12

PC59

0.1U_0603_25V7K

PC59

0.1U_0603_25V7K

1 2

PR70

20K_0402_1%

PR70

20K_0402_1%

1 2

PR81

1M_0402_1%

930@ PR81

1M_0402_1%

930@

1 2

PR67

13.7K_0402_1%

PR67

13.7K_0402_1%

1 2

PC50

4.7U_0805_25V6-K

PC50

4.7U_0805_25V6-K

12

PQ22

PDTC115EU_SOT323-3

930@ PQ22

PDTC115EU_SOT323-3

930@

2

13

PR78

150K_0402_1%

PR78

150K_0402_1%

12

PC53

2200P_0402_50V7K

PC53

2200P_0402_50V7K

12

PC54

4.7U_0805_10V6K

PC54

4.7U_0805_10V6K

12

PR77

499K_0402_1%

PR77

499K_0402_1%

1 2

PR68

30K_0402_1%

PR68

30K_0402_1%

12

PR79

100K_0402_1%

PR79

100K_0402_1%

12

PU5

RT8205LZQW(2)_W QFN24_4X4

<BOM Structure>

PU5

RT8205LZQW(2)_W QFN24_4X4

<BOM Structure>

FB1 2

REF 3

VOUT1 24

ENTRIP1 1

TONSEL 4

FB2 5

SKIPSEL

14

SECFB

18

VREG5

17

VOUT2

7

VREG3

8

VIN

16

GND

15

UGATE1 21

BOOT1 22

ENTRIP2 6

PGOOD 23

PHASE1 20

LGATE1 19

EN

13

BOOT2

9

UGATE2

10

PHASE2

11

LGATE2

12

P PAD

25

PL7

4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%

PL7

4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%

1 2

PC64

1U_0603_10V6K

PC64

1U_0603_10V6K

12

PR85

10K_0402_1%

930@ PR85

10K_0402_1%

930@

12

PR74

2.2_0603_5%

PR74

2.2_0603_5%

1 2

PD11

LL4148_LL34-2

930@ PD11

LL4148_LL34-2

930@

12

PR69

20K_0402_1%

PR69

20K_0402_1%

12

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

Rds=13.5mΩ(Typ)

16.5mΩ(Max)

Note:Iload(max)=3.5A

FB=0.6V

Chief River VC

FB=0.75V

To GND = 1.5V

To VDD = 1.35V

Note: S3 - sleep ; S5 - power off

STATE S3 S5 1.35VP VTT_REFP 0.675VSP

S0

S3

S4/S5

Hi Hi

HiLo

Lo Lo

On

On

On

On

On

Off

(Hi-Z)

Off

(Discharge)

Off

(Discharge)

Off

(Discharge)

Output Cap PAD

need change OCP setting

Ipeak = 9.8A, Imax = 6.86A

Delta I = 2.88A, F= 290KHz, Rton= 887K ohm

Rtrip = 19.6K ohm

OCP= 13.45~16.56A

SY8033B enable pin without internal pull down, and

RT8061or other 2nd source has 500K pull down resistor!So

please review your application if R1>249K will cause

enable pin logic high level is not enough

BST_1.5V-1

1.5V_B+

FB_1.8V

LX_1.8V

+1.8VSP_ON

LX_1.5V

UG_1.5V

BST_1.5V

1.5V_B+

S3_1.5V

S5_1.5V

PGOOD_1.5V

LG_1.5V

SUSP#

SUSP#<32,35,38,41>

SYSON<32,35>

SUSP<35,5>

+1.35VP

B+

+3VALW

+1.8VSP

+5VALW

+3VALW

+1.35VP

+VTT_REFP

+0.675VSP

+1.35VP+1.35VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

1.5VP/0.75VSP/1.8VSP

Custom

40 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

1.5VP/0.75VSP/1.8VSP

Custom

40 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

1.5VP/0.75VSP/1.8VSP

Custom

40 51Thursday, April 12, 2012

2012/4/6 2013/4/6

PR98

1M_0402_5%

PR98

1M_0402_5%

12

PC76

0.033U_0402_16V7K

PC76

0.033U_0402_16V7K

12

+

PC74

330U_B2_2.5VM_R15M

+

PC74

330U_B2_2.5VM_R15M

1

2

PQ25

SI7716ADN-T1-GE3_POW ERPAK8-5

PQ25

SI7716ADN-T1-GE3_POW ERPAK8-5

4

5

1

2

3

PR99

10K_0402_1%

PR99

10K_0402_1%

12

PR89

5.1_0603_5%

PR89

5.1_0603_5%

12

PC77

1U_0603_10V6K

PC77

1U_0603_10V6K

12

PC87

47P_0402_50V8J

@

PC87

47P_0402_50V8J

@

12

PR257

100K_0402_1%

<BOM Structure>

PR257

100K_0402_1%

<BOM Structure>

1 2

PC80

22U_0805_6.3VAM

PC80

22U_0805_6.3VAM

12

PC84

0.1U_0402_16V7K

PC84

0.1U_0402_16V7K

12

PR96

4.7_0805_5%

PR96

4.7_0805_5%

12

PJ14

JUMP_43X39

PJ14

JUMP_43X39

1

122

PC81

68P_0402_50V8J

PC81

68P_0402_50V8J

12

PU6

RT8207MZQW _W QFN20_3X3

PU6

RT8207MZQW _W QFN20_3X3

VTTSNS

2

FB

6

S5

8

PGOOD

10

VDDP 12

PHASE 16

BOOT 18

VTTREF

4

PGND 14

VTTGND

1

GND

3

VDDQ

5

S3

7

TON

9

VDD 11

CS 13

LGATE 15

UGATE 17

VTT 20

VLDOIN 19

PAD

21

PL10

1UH_PH041H-1R0MS_3.8A_20%

PL10

1UH_PH041H-1R0MS_3.8A_20%

1 2

PC79

0.1U_0402_16V7K

@PC79

0.1U_0402_16V7K

@

12

PR91

680K_0402_1%

PR91

680K_0402_1%

1 2

PJ24

JUMP_43X39

PJ24

JUMP_43X39

11

2

2

PQ24

SIS412DN-T1-GE3_POW ERPAK8-5

PQ24

SIS412DN-T1-GE3_POW ERPAK8-5

4

5

1

2

3

PR93

887K_0402_1%

PR93

887K_0402_1%

12

PC325

.1U_0402_16V7K <BOM Structure>

PC325

.1U_0402_16V7K <BOM Structure>

12

PC68

10U_0805_25V6K

PC68

10U_0805_25V6K

12

PL9

1.5UH_MMD-06CZ-1R5M-V1_9A_20%

PL9

1.5UH_MMD-06CZ-1R5M-V1_9A_20%

12

PC82

22U_0805_6.3VAM

PC82

22U_0805_6.3VAM

12

PR86

2.2_0603_5%

PR86

2.2_0603_5%

1 2

PR88

19.6K_0402_1%

PR88

19.6K_0402_1%

12

PR87

4.7_1206_5%

@PR87

4.7_1206_5%

@

12

PC85

680P_0402_50V7K

PC85

680P_0402_50V7K

12

PJ13

JUMP_43X39

PJ13

JUMP_43X39

11

2

2

PC78

1U_0603_10V6K

PC78

1U_0603_10V6K

12

PC73

10U_0805_25V6K

PC73

10U_0805_25V6K

12

PR94

4.64K_0402_1%

PR94

4.64K_0402_1%

12

PC71

0.1U_0603_25V7K

PC71

0.1U_0603_25V7K

1 2

G

D

S

PQ26

SSM3K7002FU_SC70-3

G

D

S

PQ26

SSM3K7002FU_SC70-3

2

13

PR90

10K_0402_5%

@

PR90

10K_0402_5%

@

12

PR95

5.76K_0402_1%

PR95

5.76K_0402_1%

12

PC75

680P_0402_50V7K

@PC75

680P_0402_50V7K

@

12

PC72

10U_0805_25V6K

PC72

10U_0805_25V6K

12

PJ18

JUMP_43X79

PJ18

JUMP_43X79

1

122

PR92

0_0402_5%

PR92

0_0402_5%

1 2

PR97

20K_0402_1%

PR97

20K_0402_1%

12

PU7

SY8033BDBC_DFN10_3X3

PU7

SY8033BDBC_DFN10_3X3

EN

5

PG 4

LX 3

FB 6

SVIN

8

TP

11

LX 2

PVIN

10

NC

7

PVIN

9

NC

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Chief River VC

VFB=0.7V

Rds=2.6m

Ω

(Typ)

3.2m

Ω

(Max)

IVB ES2 1.05V

IVB ES2 1.05V 0.1U_0402_16V7K

VFB= 0.704V

Vo=VFB*(1+PR116/PR119)= 1.05V

Freq= 266~314KHz , 290KHz(typ)

Cesr= 15m ohm

Ipeak= 15.24A Imax= 10.668A

Delta I= 3.306A ==>1/2 Delta I= 1.653A

Vtrip=Rtrip*10uA= 0.523V

Iocp= 18.74A~22.66A

BST_+1.05VS_VTTP

LG_+1.05VS_VTTP

UG_+1.05VS_VTTP

SW_+1.05VS_VTTPEN_+1.05VS_VTTP

TRIP_+1.05VS_VTTP

FB_+1.05VS_VTTP

+1.05VS_VTTP_B+

RF_+1.05VS_VTTP

SUSP#

VCCIO_SENSE <8>

VCCPPWRGOOD<42>

SUSP#<32,35,38,40>

B+

+1.05VS_VCCPP

+5VALW

+3VS

+1.8VS

+1.5VS

+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

+1.05VS_VTTP/+1.0VSP

Custom

41 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

+1.05VS_VTTP/+1.0VSP

Custom

41 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

+1.05VS_VTTP/+1.0VSP

Custom

41 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

PQ30

MDU1511RH_POWERDFN56-8-5

PQ30

MDU1511RH_POWERDFN56-8-5

4

5

1

2

3

PR105

1.54K_0402_1%

PR105

1.54K_0402_1%

12

PR274

0_0402_5%

@PR274

0_0402_5%

@

12

PU9

TPS51212DSCR_SON10_3X3

PU9

TPS51212DSCR_SON10_3X3

EN

3

TRIP

2

V5IN 7

DRVH 9

SW 8

DRVL 6

VBST 10

TST

5

VFB

4

PGOOD

1

TP 11

PR104

1.74K_0402_1%

PR104

1.74K_0402_1%

12

PR118

100_0402_1%

PR118

100_0402_1%

1 2

PC88

22U_0805_6.3V6M

PC88

22U_0805_6.3V6M

12

PR106

100K_0402_5%

PR106

100K_0402_5%

1 2

PR113

330K_0402_1%

PR113

330K_0402_1%

1 2

PC96

2200P_0402_50V7K

PC96

2200P_0402_50V7K

12

PQ29

MDV1525URH_PDFN33-8-5

<BOM Structure>

PQ29

MDV1525URH_PDFN33-8-5

<BOM Structure>

4

5

1

2

3

PC101

1U_0603_10V6K

PC101

1U_0603_10V6K

12

PR114

470K_0402_1%

PR114

470K_0402_1%

12

PR117

1.2K_0402_1%

PR117

1.2K_0402_1%

12

PC91

4.7U_0805_6.3V6K

PC91

4.7U_0805_6.3V6K

12

PR116

4.87K_0402_1%

PR116

4.87K_0402_1%

12

PC100

0.1U_0402_16V7K

PC100

0.1U_0402_16V7K

12

PU8

APL5915KAI-TRL_SO8

PU8

APL5915KAI-TRL_SO8

GND

1

VOUT 4

POK

7

EN

8

VCNTL 6

VIN 5

VOUT 3

FB 2

VIN 9

PC95

0.1U_0402_25V6

PC95

0.1U_0402_25V6

12

PR101

0_0402_5%

PR101

0_0402_5%

12

PR115

4.7_1206_5%

@PR115

4.7_1206_5%

@

12

PC103

.1U_0402_16V7K

PC103

.1U_0402_16V7K

12

PJ20

@

JUMP_43X39

PJ20

@

JUMP_43X39

1

122

PC104

680P_0402_50V7K

@PC104

680P_0402_50V7K

@

12

PR261

10K_0402_1%

PR261

10K_0402_1%

12

PC90

0.01U_0402_25V7K

PC90

0.01U_0402_25V7K

12

PR103

47K_0402_5%

PR103

47K_0402_5%

12

PC99

0.1U_0603_25V7K

PC99

0.1U_0603_25V7K

1 2

PR119

10K_0402_1%

PR119

10K_0402_1%

12

PR111

2.2_0603_5%

PR111

2.2_0603_5%

1 2

PC89

0.1U_0402_16V7K

PC89

0.1U_0402_16V7K

12

+

PC102

330U_B2_2.5VM_R15M

+

PC102

330U_B2_2.5VM_R15M

1

2

PC86

1U_0402_6.3V6K

PC86

1U_0402_6.3V6K

12

PC97

10U_0805_25V6K

PC97

10U_0805_25V6K

12

PJ19

JUMP_43X79

PJ19

JUMP_43X79

1

122

PL14

1UH_VMPI0703AR-1R0M-Z01_11A_20%

PL14

1UH_VMPI0703AR-1R0M-Z01_11A_20%

1 2

PC105

1000P_0402_50V7K

PC105

1000P_0402_50V7K

12

PR112

52.3K_0402_1%

PR112

52.3K_0402_1%

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

output voltage adjustable network

VID [0] VID[1] VCCSA Vout

0 0 0.9V

0 1 0.8V

1 0 0.725V

1 1 0.675V

Chief River VC

+VCC_SAP

TDC 4.2A

Peak Current 6A

OCP current 7.2A

The 1k PD on the VCCSA VIDs are empty.

These should be stuffed to ensure that

VCCSA VID is 00 prior to VCCIO stability.

FB=0.6V

+VCCSA_PHASE+VCCSA_PWR_SRC

+VCCSA_PWRGD

+VCCSA_VID1

+VCCSA_EN

+VCCSA_VID0

+1.05TPP_ONEN_LC_PWR

FB_1.05TPP

LX_1.05TPP

SA_PGOOD <32>

H_VCCSA_VID1 <9>

H_VCCSA_VID0 <9>

VCCPPWRGOOD <41>

VCCSA_SENSE <9>

EN_LC_PWR<24>

1.05VS_LC_PG<27>

+3VALW +VCCSAP

+3VS

+1.05VS_LCP

+3VALW

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Compal Electronics, Inc.

1.0C

42 51

Thursday, April 12, 2012

2012/4/6 2013/4/6

VCC_SAP/+1.5VSDGPUP/+1.05VS_DGPU

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Compal Electronics, Inc.

1.0C

42 51

Thursday, April 12, 2012

2012/4/6 2013/4/6

VCC_SAP/+1.5VSDGPUP/+1.05VS_DGPU

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Compal Electronics, Inc.

1.0C

42 51

Thursday, April 12, 2012

2012/4/6 2013/4/6

VCC_SAP/+1.5VSDGPUP/+1.05VS_DGPU

PC112

.1U_0402_16V7K

<BOM Structure>

PC112

.1U_0402_16V7K

<BOM Structure>

12

PR124

0_0402_5%

PR124

0_0402_5%

1 2

PR108

10K_0402_1%

PR108

10K_0402_1%

12

PR121

1K_0402_5%

PR121

1K_0402_5%

12

PC119

0.1U_0603_25V7K

PC119

0.1U_0603_25V7K

1 2

PC114

22U_0805_6.3V6M

PC114

22U_0805_6.3V6M

1 2

PC115

2200P_0402_50V7K

<BOM Structure>

PC115

2200P_0402_50V7K

<BOM Structure>

12

PJ16

JUMP_43X39

PJ16

JUMP_43X39

1

122

PC94

68P_0402_50V8J

PC94

68P_0402_50V8J

12

PC111

680P_0402_50V7K

PC111

680P_0402_50V7K

12

PC106

68P_0402_50V8J

PC106

68P_0402_50V8J

12

PU11

SY8032ABC_SOT23-6

PU11

SY8032ABC_SOT23-6

IN

4

PG

5

LX 3

FB

6EN 1

GND 2

PR109

7.5K_0402_1%

PR109

7.5K_0402_1%

12

PL8

1UH_PH041H-1R0MS_3.8A_20%

PL8

1UH_PH041H-1R0MS_3.8A_20%

1 2

PR107

1M_0402_1%

PR107

1M_0402_1%

12

PR110

4.7_0805_5%

PR110

4.7_0805_5%

12

PC93

22U_0805_6.3VAM

PC93

22U_0805_6.3VAM

12

PR122

1K_0402_5%

PR122

1K_0402_5%

12

PU10 SY8037DCC_DFN12_3X3

<BOM Structure>

PU10 SY8037DCC_DFN12_3X3

<BOM Structure>

LX 3

LX 2

FB

9

PVIN

11

SVIN

10

VOUT

8

PVIN

12

EN 5

PG 4

LX 1

VID1

7

GND

13

VID0 6

PR123

100K_0402_5%

PR123

100K_0402_5%

12

PC109

680P_0402_50V7K

@PC109

680P_0402_50V7K

@

12

PJ23

JUMP_43X79

PJ23

JUMP_43X79

1

122

PC118

2200P_0402_50V7K

PC118

2200P_0402_50V7K

1

2

PR126

4.7_0805_5%

@PR126

4.7_0805_5%

@

12

PC117

0.1U_0402_16V7K

@

PC117

0.1U_0402_16V7K

@

12

PL15

0.47UH +-20% PCMC042T-R47MN 6A

PL15

0.47UH +-20% PCMC042T-R47MN 6A

1 2

PR258

0_0402_5%

PR258

0_0402_5%

1 2

PC107

.1U_0402_16V7K

@PC107

.1U_0402_16V7K

@

1 2

PR128

100_0402_5%

PR128

100_0402_5%

12

PC113

22U_0805_6.3V6M

PC113

22U_0805_6.3V6M

1 2

PC92

22U_0805_6.3VAM

PC92

22U_0805_6.3VAM

12

PC120

22U_0805_6.3V6M

PC120

22U_0805_6.3V6M

1 2

PR130

0_0402_5%

PR130

0_0402_5%

12

PC108

22U_0805_6.3VAM

PC108

22U_0805_6.3VAM

12

PR120

100K_0402_5%

PR120

100K_0402_5%

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Compal Electronics, Inc.

Chief River VC

DCR: 1.19mΩ±5%

DCR: 1.19mΩ±5%

Close Phase 1 choke

For ULV 17W 1+1

CPU_CORE LL= -2.9mΩ,

GFX_CORE LL= -3.9mΩ,

local sense revese HW

local sense revese HW

Rds(on)typ : 2.4m ohm

max: 3.3m ohm

Rds(on)typ : 2.4m ohm

max: 3.3m ohm

VSUM+

BOOT1G

NTCG

LGATE1G

SCLK

BOOT1G

UGATE1

ALERT#

UGATE1G

VSUM-

VSUMG-

CPU_B+

VSUMG+

PHASE1

BOOT1

VSUMG+

PHASE1G

VSUM+

BOOT1

VSUM-

UGATE1G

PHASE1

UGATE1

LGATE1

LGATE1

PHASE1G

LGATE1G

SDA

UGATE1-1

VSUMG-

ISEN2G

CPU_B+

VR_SVID_DAT<8>

VR_SVID_ALRT#<8>

VR_SVID_CLK<8>

VR_ON<32>

VGATE <15>

VR_HOT#<32>

VCCSENSE<8>

VSSSENSE<8>

VSS_AXG_SENSE<9>

VCC_AXG_SENSE<9>

+CPU_CORE

+5VS

+3VS

+1.05VS_VTT

+3VS

+VGFX_CORE

+5VS

B+

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

CPU_CORE

Custom

43 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

CPU_CORE

Custom

43 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

CPU_CORE

Custom

43 51Thursday, April 12, 2012

2012/4/6 2013/4/6

PC176

10U_0805_25V6K

PC176

10U_0805_25V6K

12

PC162

470P_0402_50V7K

PC162

470P_0402_50V7K

12

PQ38

MDV1525URH_PDFN33-8-5

<BOM Structure>

PQ38

MDV1525URH_PDFN33-8-5

<BOM Structure>

4

5

1

2

3

PC186

0.01UF_0402_25V7K

PC186

0.01UF_0402_25V7K

12

PR189

1.91K_0402_1%

PR189

1.91K_0402_1%

12

PH3

10K_0402_1%_ERTJ0EG103FA

PH3

10K_0402_1%_ERTJ0EG103FA

1 2

PR174 1.91K_0402_1%PR174 1.91K_0402_1%

12

PR158

3.83K_0402_1%

PR158

3.83K_0402_1%

1 2

PC167

470P_0402_50V7K

PC167

470P_0402_50V7K

12

PC169

1000P_0402_50V7K

@PC169

1000P_0402_50V7K

@

12

PR176

2K_0402_1%

PR176

2K_0402_1%

12

PH4

470K_0402_5%_ TSM0B474J4702RE

PH4

470K_0402_5%_ TSM0B474J4702RE

12

PL21

0.24UH_FDUE0630J-H-R24M-P3_22A_20%

<BOM Structure>

PL21

0.24UH_FDUE0630J-H-R24M-P3_22A_20%

<BOM Structure>

1 2

PR203

3.65K_0603_1%

PR203

3.65K_0603_1%

1 2

PC126

0.1U_0402_16V7K

@PC126

0.1U_0402_16V7K

@

12

PR159

0_0603_5%

PR159

0_0603_5%

12

PR184 11K_0402_1%PR184 11K_0402_1%

12

PR143

36.5K_0402_1%

PR143

36.5K_0402_1%

12

PR141

2.61K_0402_1%

PR141

2.61K_0402_1%

1 2

PC179

10U_0805_25V6K

PC179

10U_0805_25V6K

12

+

PC157

33U_D_25VM_R60M

+

PC157

33U_D_25VM_R60M

1

2

PC190

680P_0402_50V7K

PC190

680P_0402_50V7K

12

PU13

ISL95836HRTZ-T_TQFN40_5X5~D

<BOM Structure>

PU13

ISL95836HRTZ-T_TQFN40_5X5~D

<BOM Structure>

COMPG 37

RTNG 39

FBG 38

PGOODG 36

SDA

7

SCLK

5

ISEN2

12

FB

17

ISUMP

14

ISEN3/FB2

11

COMP

18

NTC

10

VR_HOT#

8

ALERT#

6

PGOOD

19

ISUMN

15

VDD 25

RTN

16

ISEN1

13

VR_ON

9

BOOT1

20

UGATE1 21

PHASE1 22

LGATE1 23

PWM3 24

VCCP 26

LGATE2 27

PHASE2 28

UGATE2 29

BOOT2 30

PWM2G 35

LGATE1G 34

PHASE1G 33

UGATE1G 32

BOOT1G 31

NTCG

4

ISUMNG 40

ISUMPG

1

ISEN2G

3ISEN1G

2

TP

41

PC125

1000P_0402_50V7K

@PC125

1000P_0402_50V7K

@

12

PR194

2.2_0603_5%

PR194

2.2_0603_5%

12

PR136

137K_0402_1%

PR136

137K_0402_1%

12

PC188

680P_0402_50V7K

@

PC188

680P_0402_50V7K

@

12

PR204

1_0402_5%

PR204

1_0402_5%

12

PR155

0_0402_5%

PR155

0_0402_5%

1 2

PC175

.1U_0402_16V7K

PC175

.1U_0402_16V7K

12

PR192

0_0603_5%

PR192

0_0603_5%

1 2

PC181

10U_0805_25V6K

PC181

10U_0805_25V6K

12

PC134

470P_0402_50V7K

PC134

470P_0402_50V7K

12

PR206

2.2_0603_5%

PR206

2.2_0603_5%

12

PQ40

MDU1511RH_POWERDFN56-8-5

<BOM Structure>

PQ40

MDU1511RH_POWERDFN56-8-5

<BOM Structure>

4

5

1

2

3

PC166

0.1U_0603_25V7K

PC166

0.1U_0603_25V7K

1 2

PR200

4.7_1206_5%

PR200

4.7_1206_5%

12

PC174

150P_0402_50V8J

PC174

150P_0402_50V8J

12

PC141

1000P_0402_50V7K

@PC141

1000P_0402_50V7K

@

12

PC178

10U_0805_25V6K

PC178

10U_0805_25V6K

12

PR195

4.7_1206_5%

@

PR195

4.7_1206_5%

@

12

PR196

0_0402_5%

PR196

0_0402_5%

1 2

PC184

10U_0805_25V6K

<BOM Structure>

PC184

10U_0805_25V6K

<BOM Structure>

12

PR169

130_0402_1%

PR169

130_0402_1%

1 2

PR171

54.9_0402_1%

PR171

54.9_0402_1%

1 2

PC137

.1U_0402_16V7K

PC137

.1U_0402_16V7K

12

PR190

137K_0402_1%

PR190

137K_0402_1%

12

PR170

75_0402_5%

PR170

75_0402_5%

1 2

PC177

10U_0805_25V6K

PC177

10U_0805_25V6K

12

PC156

47P_0402_50V8J

@PC156

47P_0402_50V8J

@

12

PR165 0_0402_5%PR165 0_0402_5%

1 2

PC180

330P_0402_50V7K

@PC180

330P_0402_50V7K

@

12

PR162

1_0603_5%

PR162

1_0603_5%

12

PR168

0_0402_5%

@

PR168

0_0402_5%

@

1 2

PL16

FBMA-L11-322513-151LMA50T_1210

PL16

FBMA-L11-322513-151LMA50T_1210

12

PR160 0_0402_5%PR160 0_0402_5%

1 2

PC127

0.01UF_0402_25V7K

PC127

0.01UF_0402_25V7K

1 2

PC189

0.22U_0603_16V7K

PC189

0.22U_0603_16V7K

1 2

PH5

470K_0402_5%_ TSM0B474J4702RE

PH5

470K_0402_5%_ TSM0B474J4702RE

12

PC154

1U_0603_10V6K

PC154

1U_0603_10V6K

12

PR180

2.61K_0402_1%

PR180

2.61K_0402_1%

12

PC155

1U_0603_10V6K

PC155

1U_0603_10V6K

12

PC187

0.22U_0603_16V7K

PC187

0.22U_0603_16V7K

1 2

PR172

27.4K_0402_1%

PR172

27.4K_0402_1%

12

PR147 1.91K_0402_1%PR147 1.91K_0402_1%

12

PR201

1_0402_5%

PR201

1_0402_5%

12

PC135

150P_0402_50V8J

PC135

150P_0402_50V8J

12

PC133

68P_0402_50V8J

PC133

68P_0402_50V8J

12

PH6

10K_0402_1%_ERTJ0EG103FA

PH6

10K_0402_1%_ERTJ0EG103FA

12

PR137

2.61K_0402_1%

PR137

2.61K_0402_1%

12

PR187

523_0402_1%

<BOM Structure>

PR187

523_0402_1%

<BOM Structure>

1 2

PR177

42.2K_0402_1%

PR177

42.2K_0402_1%

12

PQ37

MDV1525URH_PDFN33-8-5

<BOM Structure>

PQ37

MDV1525URH_PDFN33-8-5

<BOM Structure>

4

5

1

2

3

PR164 0_0402_5%PR164 0_0402_5%

1 2

PR134

499_0402_1%

PR134

499_0402_1%

12

PR161 0_0402_5%PR161 0_0402_5%

1 2

PC183

10U_0805_25V6K

PC183

10U_0805_25V6K

12

PL23

0.24UH_FDUE0630J-H-R24M-P3_22A_20%

<BOM Structure>

PL23

0.24UH_FDUE0630J-H-R24M-P3_22A_20%

<BOM Structure>

1 2

PR198

3.65K_0603_1%

PR198

3.65K_0603_1%

1 2

PR135

523_0402_1%

PR135

523_0402_1%

12

PR183

499_0402_1%

PR183

499_0402_1%

12

PC140

0.1U_0603_25V7K

PC140

0.1U_0603_25V7K

1 2

PR152

27.4K_0402_1%

PR152

27.4K_0402_1%

12

PC170

68P_0402_50V8J

PC170

68P_0402_50V8J

12

PR173

3.83K_0402_1%

PR173

3.83K_0402_1%

12

PR142

11K_0402_1%

PR142

11K_0402_1%

1 2

PC182

10U_0805_25V6K

@

PC182

10U_0805_25V6K

@

12

PQ39

MDU1511RH_POWERDFN56-8-5

<BOM Structure>

PQ39

MDU1511RH_POWERDFN56-8-5

<BOM Structure>

4

5

1

2

3

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Compal Electronics, Inc.

Chief River VC

Can connect to GND if motherboard only

supports external graphics and if GFX VR is not

stuffed in a common motherboard design,

VAXG can be left floating in a common

motherboard design (Gfx VR keeps VAXG from

floating) if the VR is stuffed

Vaxg

INTEL Recommend

3*330uF(1 in other page),12*22uF, 5 no stuff

from PDDG 1.0

For BOT side

For TOP side

PWR Rule

CPU LL=2.9m ohm dedign 330uF/9m *4, 22uF *12, 2.2uF*16

GFX LL=3.9m ohm design 330uF/9m *2, 22uF*6, 10uF*6 , 1uF*11

1.05V 330uF*2 10uF*10, 1u*26

PC273 need link SGA00006J00.

+CPU_CORE

+CPU_CORE

+VGFX_CORE

+1.05VS_VTT

+CPU_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

CPU_CORE_CAP

Custom

44 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

CPU_CORE_CAP

Custom

44 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

CPU_CORE_CAP

Custom

44 51Thursday, April 12, 2012

2012/4/6 2013/4/6

PC356

1U_0201_4V6M

PC356

1U_0201_4V6M

12

+

PC271

330U_D2_2V_Y

+

PC271

330U_D2_2V_Y

1

2

PC331

1U_0201_4V6M

PC331

1U_0201_4V6M

12

PC267

22U_0805_6.3V6M

PC267

22U_0805_6.3V6M

1

2

PC266

22U_0805_6.3V6M

PC266

22U_0805_6.3V6M

1

2

PC282

22U_0805_6.3V6M

PC282

22U_0805_6.3V6M

12

PC327

1U_0201_4V6M

PC327

1U_0201_4V6M

12

PC321

1U_0201_4V6M

PC321

1U_0201_4V6M

12

PC284

1U_0201_4V6M

PC284

1U_0201_4V6M

12

PC323

1U_0201_4V6M

PC323

1U_0201_4V6M

12

+

PC273

560U 2V M D2

+

PC273

560U 2V M D2

1

2

PC254

47U_0805_6.3V6M

PC254

47U_0805_6.3V6M

12

PC250

22U_0805_6.3V6M

PC250

22U_0805_6.3V6M

1

2

PC264

1U_0201_4V6M

PC264

1U_0201_4V6M

12

PC320

2.2U_0402_6.3V6M

PC320

2.2U_0402_6.3V6M

12

PC240

1U_0201_4V6M

PC240

1U_0201_4V6M

12

PC246

10U_0603_6.3V6M

PC246

10U_0603_6.3V6M

12

+

PC291

330U_B2_2.5VM_R15M

+

PC291

330U_B2_2.5VM_R15M

1

2

PC316

1U_0201_4V6M

PC316

1U_0201_4V6M

12

PC258

1U_0201_4V6M

PC258

1U_0201_4V6M

12

PC281

22U_0805_6.3V6M

PC281

22U_0805_6.3V6M

12

PC251

22U_0805_6.3V6M

PC251

22U_0805_6.3V6M

1

2

PC351

1U_0201_4V6M

PC351

1U_0201_4V6M

12

PC319

1U_0201_4V6M

PC319

1U_0201_4V6M

12

+

PC272

330U_D2_2V_Y

@

+

PC272

330U_D2_2V_Y

@

1

2

PC244

10U_0603_6.3V6M

PC244

10U_0603_6.3V6M

12

PC260

47U_0805_6.3V6M

PC260

47U_0805_6.3V6M

12

PC228

1U_0201_4V6M

PC228

1U_0201_4V6M

12

PC239

2.2U_0402_6.3V6M

PC239

2.2U_0402_6.3V6M

12

PC318

2.2U_0402_6.3V6M

PC318

2.2U_0402_6.3V6M

12

PC285

1U_0201_4V6M

PC285

1U_0201_4V6M

12

PC252

47U_0805_6.3V6M

PC252

47U_0805_6.3V6M

12

PC230

1U_0201_4V6M

PC230

1U_0201_4V6M

12

PC288

1U_0201_4V6M

PC288

1U_0201_4V6M

12

PC259

47U_0805_6.3V6M

PC259

47U_0805_6.3V6M

12

PC242

10U_0603_6.3V6M

PC242

10U_0603_6.3V6M

12

PC353

1U_0201_4V6M

PC353

1U_0201_4V6M

12

PC234

1U_0201_4V6M

PC234

1U_0201_4V6M

12

PC231

1U_0201_4V6M

PC231

1U_0201_4V6M

12

PC293

1U_0201_4V6M

PC293

1U_0201_4V6M

12

PC265

22U_0805_6.3V6M

PC265

22U_0805_6.3V6M

1

2

PC283

22U_0805_6.3V6M

PC283

22U_0805_6.3V6M

12

PC229

1U_0201_4V6M

PC229

1U_0201_4V6M

12

PC225

1U_0201_4V6M

PC225

1U_0201_4V6M

12

PC324

1U_0201_4V6M

PC324

1U_0201_4V6M

12

PC280

22U_0805_6.3V6M

PC280

22U_0805_6.3V6M

12

PC354

1U_0201_4V6M

PC354

1U_0201_4V6M

12

PC322

1U_0201_4V6M

PC322

1U_0201_4V6M

12

PC275

1U_0201_4V6M

PC275

1U_0201_4V6M

12

PC226

1U_0201_4V6M

PC226

1U_0201_4V6M

12

PC243

10U_0603_6.3V6M

PC243

10U_0603_6.3V6M

12

+

PC255

330U_B_2.5VM_R9M

+

PC255

330U_B_2.5VM_R9M

1

2

PC236

1U_0201_4V6M

PC236

1U_0201_4V6M

12

PC292

1U_0201_4V6M

PC292

1U_0201_4V6M

12

+

PC256

330U_D2_2V_Y

+

PC256

330U_D2_2V_Y

1

2

PC286

1U_0201_4V6M

PC286

1U_0201_4V6M

12

PC249

22U_0805_6.3V6M

PC249

22U_0805_6.3V6M

1

2

PC232

1U_0201_4V6M

PC232

1U_0201_4V6M

12

PC235

1U_0201_4V6M

PC235

1U_0201_4V6M

12

PC289

1U_0201_4V6M

PC289

1U_0201_4V6M

12

PC237

2.2U_0402_6.3V6M

PC237

2.2U_0402_6.3V6M

12

PC247

10U_0603_6.3V6M

PC247

10U_0603_6.3V6M

12

PC233

1U_0201_4V6M

PC233

1U_0201_4V6M

12

PC332

1U_0201_4V6M

PC332

1U_0201_4V6M

12

PC355

1U_0201_4V6M

PC355

1U_0201_4V6M

12

PC253

47U_0805_6.3V6M

PC253

47U_0805_6.3V6M

12

PC317

1U_0201_4V6M

PC317

1U_0201_4V6M

12

PC279

22U_0805_6.3V6M

PC279

22U_0805_6.3V6M

12

PC357

1U_0201_4V6M

PC357

1U_0201_4V6M

12

PC238

1U_0201_4V6M

PC238

1U_0201_4V6M

12

PC294

1U_0201_4V6M

PC294

1U_0201_4V6M

12

PC326

1U_0201_4V6M

PC326

1U_0201_4V6M

12

PC261

47U_0805_6.3V6M

PC261

47U_0805_6.3V6M

12

PC227

1U_0201_4V6M

PC227

1U_0201_4V6M

12

PC334

1U_0201_4V6M

PC334

1U_0201_4V6M

12

PC328

1U_0201_4V6M

PC328

1U_0201_4V6M

12

PC352

1U_0201_4V6M

PC352

1U_0201_4V6M

12

PC333

1U_0201_4V6M

PC333

1U_0201_4V6M

12

PC329

1U_0201_4V6M

PC329

1U_0201_4V6M

12

PC287

1U_0201_4V6M

PC287

1U_0201_4V6M

12

PC330

1U_0201_4V6M

PC330

1U_0201_4V6M

12

PC245

10U_0603_6.3V6M

PC245

10U_0603_6.3V6M

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FB =1.24V

Rdc=40ohm(max)

3V3/2V JACKET

>1.6V ENABLE

L/RDC=C*R

2.2uL/40mohm=0.00022uF*250Kohm

VID0 VID1

0

1

0

0

+MT_VCC

2

3.3

0 1

51 1

reserve

FB=0.815V

LX_12VSP

FB_12VSP

EN_12VSP

FREQ_12VSP SS_12VSP

COMP_12VSP

Motor_FB

Motor_FREQ

Motor_VCC

Motor_EN

Motor_FB

5V_BST#

Motor_Compensate

Motor_IN

Motor_SW

Motor_FB

Motor_BST

Motor_FB

PA_HV_EN<24>

MOTOR_VID0 <32>

MOTOR_PWR_ON<30,32>

MOTOR_VID1 <32>

+HV_12VP+5VALW

+5VALW

B+

+3VALW

+MT_VCC

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

12V & MOTOR Power

45 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

12V & MOTOR Power

45 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

12V & MOTOR Power

45 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

PR301

8.45K_0402_1%

PR301

8.45K_0402_1%

12

PR305

10K_0402_5%

<BOM Structure>PR305

10K_0402_5%

<BOM Structure>

1 2

PC366

1U_0402_16V6K

PC366

1U_0402_16V6K

12

PC371 4.7U_0603_10V6KPC371 4.7U_0603_10V6K

12

PU16

RT9297GQW_WDFN10_3X3

PU16

RT9297GQW_WDFN10_3X3

COMP 1

FB 2

EN

3

Vin

8

FREQ

9SS 10

GND

5

GND

4LX 6

LX 7

PAD

11

PR299

10K_0402_5%

PR299

10K_0402_5%

1 2

PC358

0.01U_0402_16V7K

PC358

0.01U_0402_16V7K

12

PR303

7.68K_0402_1%

PR303

7.68K_0402_1%

12

PR295

10K_0402_1%

PR295

10K_0402_1%

1 2

PR289

86.6K_0402_1%

PR289

86.6K_0402_1%

1 2

PR306

10K_0402_5%

PR306

10K_0402_5%

1 2

PJ22

JUMP_43X39

PJ22

JUMP_43X39

1

122

PC374

0.1U_0201_10V6K

@

PC374

0.1U_0201_10V6K

@

12

PR300 432K_0402_1%PR300 432K_0402_1%

12

PL27

4.7UH_MMD-04BZ-4R7M-S1L_2.4A_20%

<BOM Structure>

PL27

4.7UH_MMD-04BZ-4R7M-S1L_2.4A_20%

<BOM Structure>

1 2

PC360

1U_0402_6.3V6K

PC360

1U_0402_6.3V6K

12

PC367

470P_0402_50V7K

PC367

470P_0402_50V7K

12

PC365

0.01U_0402_16V7K

PC365

0.01U_0402_16V7K

12

PC363

0.1U_0402_10V7K

PC363

0.1U_0402_10V7K

12

PR304

5.76K_0402_1%

PR304

5.76K_0402_1%

12

PC372

10U_0805_25V6K

PC372

10U_0805_25V6K

12

PR292

10K_0402_5%

PR292

10K_0402_5%

1 2

PR298

10_0402_5%

PR298

10_0402_5%

12

PR288

100K_0402_5%

PR288

100K_0402_5%

1 2

PR309

10K_0402_5%

@PR309

10K_0402_5%

@

12

PC361

10U_0805_25V6K

PC361

10U_0805_25V6K

12

PR294

0_0402_5%

PR294

0_0402_5%

1 2

PC375

0.1U_0402_25V6

PC375

0.1U_0402_25V6

12

PC369

22U_0805_6.3V6M

PC369

22U_0805_6.3V6M

1

2

PR293

100K_0402_5%

PR293

100K_0402_5%

1 2

PR308

100K_0402_5%

PR308

100K_0402_5%

1 2

PR307

100K_0402_5%

PR307

100K_0402_5%

1 2

PC362

10U_0805_25V6K

PC362

10U_0805_25V6K

12

PQ47

AON7403L_DFN8-5

PQ47

AON7403L_DFN8-5

3

52

4

1

PC376

0.1U_0402_25V6

PC376

0.1U_0402_25V6

12

PD15

SX34 SMA

PD15

SX34 SMA

12

PR310

10K_0402_5%

@PR310

10K_0402_5%

@

12

PR297

12K_0402_1%

PR297

12K_0402_1%

12

G

D

S

PQ49A

DMN66D0LDW-7_SOT363-6

G

D

S

PQ49A

DMN66D0LDW-7_SOT363-6

2

61

PC364

4700P_0402_25V7K

PC364

4700P_0402_25V7K

12

G

D

S

PQ49B

DMN66D0LDW-7_SOT363-6

G

D

S

PQ49B

DMN66D0LDW-7_SOT363-6

5

34

PC368

0.01U_0402_25V7K

PC368

0.01U_0402_25V7K

12

PR290

10K_0402_5%

PR290

10K_0402_5%

1 2

PJ26

JUMP_43X39

PJ26

JUMP_43X39

1

122

PR302

100K_0402_5%

PR302

100K_0402_5%

12

PU17

MP2334DD-LF-Z_QFN12_2X3

PU17

MP2334DD-LF-Z_QFN12_2X3

BST

3

SW

2

FB 7

IN 9

FREQ 8

PG

6

SW 10

EN

5

VCC

4

GND

1GND 12

GND 11

SW 13

PR291

10K_0402_1%

<BOM Structure>

PR291

10K_0402_1%

<BOM Structure>

1 2

PC373

1000P_0402_25V8J

PC373

1000P_0402_25V8J

12

G

D

S

PQ48

SSM3K7002FU_SC70-3

G

D

S

PQ48

SSM3K7002FU_SC70-3

2

13

PL28

2.2UH_1231AS-H-2R2M-P3_1.9A_20%

<BOM Structure>PL28

2.2UH_1231AS-H-2R2M-P3_1.9A_20%

<BOM Structure>

1 2

PR296

300K_0402_1%

PR296

300K_0402_1%

1 2

PC359

0.01U_0402_16V7K

PC359

0.01U_0402_16V7K

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Compal Electronics, Inc.

BATTERY

B+

ADAPTER

CHARGER

ISL6266ACRZ-T

VR_ON

(PU1000)

APW7138NITRL

VGA_ON

(PU998)

+CPU_CORE

+VGA_CORE

RT8209BGQW

SYSON

(PU5) +1.5V APL5331KAC-TRL

SUSP

(PU8)

+0.75VS

RT8209BGQW

VS_ON

(PU6) +1.05V_VCCP

RT8205EGQW

(PU3)

+5VALW

Page 55TQFN48

Page 54SSOP16

SO8 Page 53

(SUSP#)

WQFN14

WQFN14 Page 53

SUSP

Page 44

VGA_ON#

Page 44

AO4430L

(U40)

+1.5VSDGPU

SO8

+CLK_1.05VS

L76

WQFN24 Page 49

SO8 Page 44

RT8205EGQW

(PU3)

WQFN24 Page 49

VCCPWRGOOD

+3VALW_PCH

(U14)

PCH_PWR_EN#

SO8 Page 44

SI4800BDY SI4800BDY

SO8 Page 44

SY8033BDBC

(PU6)

SUSP

DFN10 Page 51

+1.8VS

RT9701-PB

SOT23-5 Page 45

SUSP

(UB1)

+3V

+VCCSA

SO23-3 Page 24SO23-3 Page 30

+5VS_ODD

+3V_DMC

+1.5VS_DMC

SO23-3 Page 37

ENVDD

AO3413L

(Q51)

+BT_VCC

+5VAMP +VDDA

SUSP

+5VS

SI4800BDY

(U49)

+CRT_VCC

TPS2062ADR

(U46)

+USB_VCCB

SYSON#

+3VALW

R599

+3V_LAN

BCM57780

(U39)

+1.2V_LAN

+1.05VS_PCH

PJP25

(RE1)

+3VALW_EC

SUSP

(U68)

+3VS

+3VS_CK505

+DVDD_AUDIO

+3V_WLAN

+HDMI_5V_OUT

+5VS_HDD1

ENVDD

AO3413L

(Q30)

+LCDVDD

VGA_ON

AO3413L

(Q34)

+3VSDGPU

SI4800BDY-T1-GE3

(U13)

+1.5VS

Page 51

U38

+1.05VSDGPU

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Power Rail

Custom

46 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Power Rail

Custom

46 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Power Rail

Custom

46 51Thursday, April 12, 2012

2012/4/6 2013/4/6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Compal Electronics, Inc.

PU10

+VCCSA

PU9

+1.05VS_VCCP

V

A1

B1

A3

B4

A5

PCH

U14,+3VALW_PCH

QH4,+5VALW_PCH

B3

51ON#

ON/OFF

+3VALW

B+

EC_ON

VIN

BATT

PM_SLP_S3#

PM_SLP_S4#

PM_SLP_S5#

PM_SLP_A#

PM_SLP_SUS# 6

PBTN_OUT#

4

V

V V V

V

VV

V

V

V

V

V

PCH_PWR_EN#

+3VALW_PCH

+5VALW_PCH

3

V

A5 B7

SYSON +1.35V

PU6

A4 B6

SUSP#,SUSP 8

V

V

U22

+5VS

U21

+3VS

U12

+1.35VS

PU6

+0.675V

V

V

VV

VR_ON

11

VGATE

PM_DRAM_PWRGD

H_CPUPWRGD

PLT_RST#

B5

SYS_PWROK

B7 2

2

V

V

V

PCH_RSMRST#

5

7SYSON#

9

V

PU13

+CPU_CORE

14

13

CPU

15

V

2

V

V

V

PU6

EC

AC

MODE

BATT

MODE

PU4

A2

B+

B2

PQ4

VCCPPWRGOOD

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Power sequence

Custom

47 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Power sequence

Custom

47 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

Power sequence

Custom

47 51Thursday, April 12, 2012

2012/4/6 2013/4/6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Version change list (P.I.R. List) Page 1 of 2

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

Add ADP_ID circuit Acer will add pull down resistor in adapter to

detect ADP_ID.

0.1 36

2011/12/05

EVT2

Add PU1 SA003310280 (S IC LMV331IDCKRG4 SC70 5P COMPARATORS)

Add PQ27 SB000009Q80(S TR 2N7002KW 1N SOT323-3)

Add PR13 PR16 SD034100280(S RES 1/16W 10K +-1% 0402)

Add PR14 SD034100380(S RES 1/16W 100K +-1% 0402)

Add Jack_TEMP and PH1 circuit Acer request add a thermistor on jack of

DC in cable to protect jack. 0.1 37

Add PU3 SA00003K300 (S IC G718TM1U SOT23 8P OTP)

Add PR30 SD000009R00(S RES 1/16W 46.4K +-1% 0402)

Add PR35 SD034953180(S RES 1/16W 9.53K +-1% 0402)

Add PR37 SD034232280(S RES 1/16W 23.2K +-1% 0402)

Del PR127 SD028000080(S RES 1/16W 0 +-5% 0402)

2011/12/05

EVT2

Adjust 1.35V ocp setting and

add boost resistor

Adjust 1.35V ocp setting

Add boost resistor 0.1 40

Change PR88 to SD000003580(S RES 1/16W 19.6K +-1% 0402)

Change PR86 to SD013220B80(S RES 1/10W 2.2 +-5% 0603) 2011/12/05

EVT2

Add 1.05V boost resistor and

adjust output voltage

Change choke to 1uH

Add 1.05V boost resistor and adjust output voltage

Change choke to 1uH for efficiency of heavy load

0.1 41

Change PR111 to SD013220B80(S RES 1/10W 2.2 +-5% 0603)

Change PR116 to SD034487100(S RES 1/16W 4.87K +-1% 0402 (LF))

Change PL14 to SH00000KS00(S COIL 1UH +-20%

VMPI0703AR-1R0M-Z01 11A)

2011/12/05

EVT2

Adjust GFX frequence Adjust GFX frequence to 400kHz for reduce ripple 0.1 43

Change PR143 to SD034365280(S RES 1/16W 36.5K +-1% 0402) 2011/12/05

EVT2

Adjust CPU output cap Adjust CPU output cap for transient 0.1 44

Change PC273 to SGA00006J00(S POLY C 560U 2V M

D2 LESR4.5M SX H1.9)

unpop PC272 SGA20331E10(S POLY C 330U 2V Y D2

LESR9M EEFSX H1.9)

2011/12/05

EVT2

Adjust 0.675V enable timing 0.1 40Adjust 0.675V enable timing

Change PC325 to SE076104K80(S CER CAP .1U 16V K X7R 0402) 2011/12/05

EVT2

Adjust 1.05VS_LCP sequence Change 1.05VS_LCP from APL5930 to SY8032 for

thoundbolt sequence. 0.2 42

2012/01/05

DVT

Change PU11 to SA000055100(S IC SY8032ABC SOT23 6P PWM)

Change PR107 to SD034100480(S RES 1/16W 1M +-1% 0402)

Add PL8 to SH00000MN00(S COIL 1UH +-20% PH041H-1R0MS 3.8A)

Add PR110 to SD002470B80(S RES 1/8W 4.7 +-5% 0805)

Change PC111 to SE074681K80(S CER CAP 680P 50V K X7R 0402)

Change PC92 to SE000008L80(S CER CAP 22U 6.3V M X6S 0805 H1.25)

Add PR123 to SD028100380(S RES 1/16W 100K +-5% 0402)

Change PR108 to SD034100280(S RES 1/16W 10K +-1% 0402)

Change PR109 to SD034750180(S RES 1/16W 7.5K +-1% 0402)

Change PC94 to SE071680J80(S CER CAP 68P 50V J NPO 0402)

add boost resistor add Charger boost resistor 0.2 38

Change PR48 to SD013220B80(S RES 1/10W 2.2 +-5% 0603) 2012/01/05

DVT

add boost resistor add 3V5V boost resistor 0.2 39

Change PR73 and PR74 to SD013220B80(S RES 1/10W 2.2 +-5% 0603) 2012/01/05

DVT

Change PR194 and PR206 to SD013220B80(S RES 1/10W 2.2 +-5% 0603)

43

2012/01/05

DVT0.2

add boost resistor add CPU and GFX boost resistor

Change main source Change main source for reduce component kind 0.2 39

Change PL7 to SH00000MB00(S COIL 4.7UH +-20%

FDSD0630-H-4R7M=P3 5.5A (7*7*3))

2012/01/05

DVT

Adjust Jack_TEMP resistor Adjust Jack_TEMP resistor, because PCCP change

thermistor to 0603 size(TSM1A104F4361RZ)

0.2 37

change PR30 to SD034442280(S RES 1/16W 44.2K +-1% 0402)

change PR37 to SD034215280(S RES 1/16W 21.5K +-1% 0402) 2012/01/05

DVT

Add ADP_ID circuit Add ADP_ID circuit(65W) 0.2 36

Add PR23 to SD028000080(S RES 1/16W 0 +-5% 0402)

change PR16 to SD034270280(S RES 1/16W 27K +-1% 0402)

Add PC142 to SE074102K80(S CER CAP 1000P 50V K X7R 0402)

2012/01/05

DVT

Change main source Change main source for with HW 0.2

change PQ7,PQ26,PQ15,PQ27,PQ48 from SB000009Q80

to SB000009610(S TR SSM3K7002FU 1N SC70-3) 2012/01/31

DVT

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PIR (PWR)

Custom

48 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PIR (PWR)

Custom

48 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PIR (PWR)

Custom

48 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Version change list (P.I.R. List) Page 2 of 2

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

Del ADP_ID circuit Acer will change adapter type to from PoGo,

so del ADP_ID circuit.

0.3 36

2012/03/13

PVT

Del PU1 SA003310280 (S IC LMV331IDCKRG4 SC70 5P COMPARATORS)

Del PQ27 SB000009Q80(S TR 2N7002KW 1N SOT323-3)

Del PR13 SD034100280(S RES 1/16W 10K +-1% 0402)

Del PR14 SD034100380(S RES 1/16W 100K +-1% 0402)

Del PR23 to SD028000080(S RES 1/16W 0 +-5% 0402)

Del PR16 to SD034270280(S RES 1/16W 27K +-1% 0402)

Del PC142 to SE074102K80(S CER CAP 1000P 50V K X7R 0402)

Acer will change adapter type to from PoGo,

so del jack_temp protect circuit.

Del jack_temp circuit 0.3 37

Del PU3 SA00003K300 (S IC G718TM1U SOT23 8P OTP)

Del PR30 to SD034442280(S RES 1/16W 44.2K +-1% 0402)

Del PR35 SD034953180(S RES 1/16W 9.53K +-1% 0402)

Del PR37 to SD034215280(S RES 1/16W 21.5K +-1% 0402)

Add PC17 SE076104K80(S CER CAP .1U 16V K X7R 0402)

Change PR29 to SD00000AJ80(S RES 1/16W 12.4K +-1% 0402)

2012/03/13

PVT

SPOK change to EC_SPOK For reduce power consumption of DS3, so close +VSB

power in DS3, DS4, DS5.

0.3 37

Del PR28 SD034100380(S RES 1/16W 100K +-1% 0402)

Del PR34 SD028100180(S RES 1/16W 1K +-5% 0402)

Del PC15 SE000000K80(S CER CAP 1U 6.3V K X5R 0402)

2012/03/13

PVT

change VCCSA IC version SY8037C IC version change to SY8037D for accord with

intel VCCSA spec.

0.3 42

Change PU10 to SA00005O000(S IC SY8037DDCC DFN 12P PWM)

2012/03/13

PVT

Add snubber Add snubber of GFX by hw request. 0.3 43

Add PR200 SD001470B80(S RES 1/4W 4.7 +-5% 1206)

Add PC190 SE074681K80(S CER CAP 680P 50V K X7R 0402)

2012/03/13

PVT

Add MOTOR POWER HW change motor power solution to PWM. 0.3 45

2012/03/13

PVT

Add PU17 SA00005NY00(S IC MP2334DD-LF-Z QFN 12P PWM)

Add PL28 SH00000N000(S COIL 2.2UH +-20% 1231AS-H-2R2M=P3 1.9A)

Add PC366 SE00000OU00(S CER CAP 1U 16V K X5R 0402)

Add PC367 SE074471K80(S CER CAP 470P 50V K X7R 0402)

Add PC368 SE075103K80(S CER CAP .01U 25V K X7R 0402)

Add PC369, PC371 SE00000MA00(S CER CAP 4.7U 10V K X5R 0603)

Add PC372 SE00000QK00(S CER CAP 10U 25V K X5R 0805 H1.25)

Add PC373 SE068102J80(S CER CAP 1000P 25V J NPO 0402)

Add PC375, PC376 SE00000G880(S CER CAP 0.1U 25V K X5R 0402)

Add PR296 SD034300380(S RES 1/16W 300K +-1% 0402)

Add PR297 SD034120280(S RES 1/16W 12K +-1% 0402)

Add PR298 SD028100A00(S RES 1/16W 10 +-5% 0402)

Add PR300 SD034432380(S RES 1/16W 432K +-1% 0402)

Add PR301 SD000000680(S RES 1/16W 8.45K +-1% 0402)

Add PR302, PR307, PR308 SD028100380(S RES 1/16W 100K +-5% 0402)

Add PR303 SD000002300(S RES 1/16W 7.68K +-1% 0402)

Add PR304 SD034576180(S RES 1/16W 5.76K +-1% 0402)

Add PR299, PR305, PR306 SD028100280(S RES 1/16W 10K +-5% 0402)

Add PQ49 SB00000DH00(S TR DMN66D0LDW-7 2N SOT363-6)

Adjust HW throttling point

Because thunder bolt adapter is 40W, OCP 130%

adjust HW throttling to 125% 50W

recover point 38W 0.3 37

Change PR33 to SD034165180(S RES 1/16W 1.65K +-1% 0402) 2012/03/13

PVT

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PIR (PWR)

Custom

49 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PIR (PWR)

Custom

49 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

PIR (PWR)

Custom

49 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Compal Electronics, Inc.

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Page 1

Page 1Page 1

Page 1

Solution Description

Solution DescriptionSolution Description

Solution Description Rev.

Rev.Rev.

Rev.Page#

Page#Page#

Page# Title

TitleTitle

Title

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Item

ItemItem

Item Issue Description

Issue DescriptionIssue Description

Issue DescriptionDate

DateDate

Date Request

RequestRequest

Request

Owner

OwnerOwner

Owner

Compal Electronics, Inc.

0919(In Layout)

1.Update R,C 0201,0402,0603,0805,1206 PCB footprint to small size

2.Swap DDR Data BUS

0920

1.Change U74,U21,U22 mos to 3*3 thermal pad package:SB00000GW00

0921

1.TB chip:U66 footprint add "-NH" for Non HDI

2.1.8p_0402:C402,C404 change to 75ohm_0402:R263,R264

0922

1.Change C1457,C1505 form 1.8P 0402 to 0201:SE00000HB80

2.Del DDR CHA,B no use CLK1,CLK1# circuit

3.Change C606,C607 from D2 330uF to B2 330uF 2.5V ESR 15mohm:SGA00004400

4.Swap total KB connector:JKB1 pin define

0923

1.Add DS3 function:SUSWARN#,SUSACK#,EC_DRAMRST_GATE

2.Add Motor function:Motor_IN1,Motor_IN2,Motor_IN3,Motor_IN4,

Door_Det_L,Button: KSI0 & KSO10

3.Remove PCH NCTF test point

4.HDMI Fuse:F1 change to P5WS5 use footprint:F_1812

5.Remove HDMI common mode choke:L36,L38,L39,L40

6.Change 0.1uF_0402_16V7K to 0.1uF_0201_10V6K:SE00000SV00

=>C521,C520,C526,C449,C523,C537,C541,C494,C495,C490,C497,C771,C522,C471,C473

7.Change 0.01uF_0402_16V7K to 0.01uF_0201_10V7K:SE172103K80

=>C425,C462

8.Change C751,C752 to B2 220uF 2.5V ESR 15mohm:SGA00004500

0924

1.Make MB to Audio/B connector pin define

2.Change RP 8.2K:R256,R262,R276,R386 to 8.2K_0402

3.Change RP 10K:R386 to 10K_0402

4.Update TB schematic p.24,25,27

5.Change Q64,Q68 from AO3419L:SB000006R10 to AP2301GN-HF:SB000007H10

6.Integration of all 2N7002 SOT23 parts to SSM3K7002F_SC59-3:SB000009080

=>Q74,Q20,Q1,Q2,Q32,Q16,Q17,Q14,Q37,Q7,Q21,Q23,Q24,Q5,Q34,Q29,Q60,Q66,Q67,Q72

Not yet=>Q6,Q78,Q79

0925

1.Delete LVDS function,Combine eDP,Card Reader function to JLVDS1

Remove:R259,R260,R285,R286,R156,R157,TXCLK+-,TX0+1,TX1+-,TX2+-,DDC CLK,DATA

Remove:C462,C425,C412,L20,only place PU:R271,R272,PD:R270,R280

2.Change all SSM3K7002F_SC59-3:SB000009080 to SSM37K002FU_SC70-3:SB000009610

=>Q74,Q20,Q1,Q2,Q32,Q16,Q17,Q14,Q37,Q7,Q21,Q23,Q24,Q5,Q34,Q29,Q60,Q66,Q67,Q72

Not yet=>Q6,Q78,Q79

3.Change 10U_0805_6.3V6M:SE093106M80 to 10U_0603_6.3V6M:SE000005T80

=>C754,C543,C418,C465

4.Remove 0_0603_5%:R416,R421,R426,R327

0926

1.Change HDMI level shift Q16,Q17 to DMN66D0LDW-7_SOT363-6:SB00000DH00

2.Modify TB schematic 0402 cap to 0201

0927

1.Remove J7

2.Change C599 330U D2 2V ESR 9mohm to 330U B2 2.5V ESR 15mohm:SGA00004400

3.Change EC +3VALW_EC

0.1U_0402_16V4Z to 0.1U_0201_10V6K:SE00000SV00

=>C1198,C1199,C1200,C1201,C1204

1000P_0402_50V7K to 1000P_0201_16V7K:SE000007U80

=>C1202,C1203

4.Remove R329

5.Change C751,C752 to 22U_0805_6.3V6M:SE000000I10

6.Remove J4(one of +1.05VS_VTT to +1.05VS_PCH jumper)

0928

1.Change RTC cap from 1U 0603 to 1U 0402:C502,C516

2.Remove FAN some parts:R753,C788,D51,D52

3.Change USB connector foot print to TAIWI_USB005-107CRL-TW_10P-T

4.Change C196,C387,C735,C102 to 0.1uF_0201_10V6K:SE00000SV00

5.Remove L2

0929

1.Remove C510,C511

2.Remove Camera Choke:L7,R13,R14

3.Q1,Q2 change to DMN66D0LDW-7_SOT363-6:SB00000DH00

4.R273,R394 change from 0_0603 to 0_0402

5.Remove Step Motor SW1

6.Change LED/B connector from 8 pin to 4 pin

7.Change Jumper from 43*118 to 43*79

=>J2,J8,J10,J11

0930

1.Remove +VCCSA cap:C1182,C1183

2.Remove +USB3_VCCA cap:C390

3.Change C427,C428 to 0.1U_0201_10V6K

4.Add ESD diode:D6 for TP SMBUS

5.Change L65 to 220ohm 3A 0805

6.Swap DDR ChB Data,DQS# 6,7

7.Change U12 mos to 3*3 thermal pad package:SB00000GW00

8.Remove X2,C1361,C1362

9.C378+C375 change to 10uF*1

10.C460+C459 change to 10uF*1

11.Remove C986,C987,C989,C990

=>Add 1uF 0201*10

1003

1.Change EC side GPIO:PWR_LED to PWR_LED#,Remove Q32,R512

2.For separate coaxial and wire,update eDP MB connector pin define

3.Remove JLED1 connector

4.Change C427:0.1U_0402_16V4Z to 0.1U_0201_10V6K:SE00000VS00

1005

1.Swap DDR ChB Data,DQS# 6,7

2.Change PCH PCIE 0.1U_0402_16V7K to 0.1U_0201_10V6K:SE00000SV00

=>C572,C573,C617,C618,C681,C682,C683,C684,C685,C686,C687,C688

2.Change eDP cap from 0.1U_0402_16V7K to 0.1U_0201_10V6K:SE00000SV00

=>C910,C911,C912,C913,C914,C915

3.Add R80:0ohm of H_CPU_PWRGD for ESD request

4.Remove On Board WLAN:MD225

5.Add Motor parts(Not Ready)

6.Add iSSD i100 parts(Not Ready)

1006

1.Change R754,R751 0ohm from 0603 to 0402

2.Change C484 0.1U from 0603 to 0402

3.For DS3,Change power source from +3VALW_PCH to +VCCSUS3_3

4.Change R629 from 0_0805 to 0_0402

5.Change SATA cap from 0.1U_0402_16V7K to 0.01U_0201_10V7K

=>C621~C628

1010

1.Add BATT_RST#,VR_LEFT,VR_RIGHT pin

2.Add iSSD i100 128GB*2 schematic

3.Add USB_HPD# pin

1011

1.Add Battery Reset function

2.Swap USB2.0,3.0 choke for connector side

1013

1.Add Step Motor circuit

2.On Board iSSD:i100 change to mSATA SSD

3.WLAN change to on board:MD225

4.Change Card Reader

PCIE from Port4 to Port1

CLK from Port5 to Port4

5.Change mSATA SATA port from Port1 to Port0

6.Add USB port 12 for mSATA

7.Remove D11,D12 and C357,C358 (HDMI RF request)

8.C396,C324 change to 0201

9.Remove C472 for +5VALW source cap

1014

1.Remove DPST_PWM buffer:U13,R783,R85

2.Change +3VS_FULL cap:C475,C466 from 0.1uF_0402 to 0201

3.Change SATA cap:C621,C622,C623,C624 from 0.01uF_0402 to 0201

1017

1.Add power source of +VCCAFDI_VRM at P.20

2.Update DS3,AOAC control signal connected to EC

1018~1021

1024

1.Remove R130

2.Define DRAM ID

3.Update TB schematic

4.Swap USB2.0 ESD pin

5.Add on/off BTN for debug

1027

1.Swap JTP1 pin for new module

2.Gerber schematic

1028

For Load BOM

1.Update Block Diagram

2.Update CPU,PCH part number

3.Update BOM config

1101

1.For

2.Combine PWR schematic

3.A test SMT schematic

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

EE P.I.R

Custom

50 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

EE P.I.R

Custom

50 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

EE P.I.R

Custom

50 51Thursday, April 12, 2012

2012/4/6 2013/4/6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Page 2

Page 2Page 2

Page 2

Solution Description

Solution DescriptionSolution Description

Solution Description Rev.

Rev.Rev.

Rev.Page#

Page#Page#

Page# Title

TitleTitle

Title

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Item

ItemItem

Item Issue Description

Issue DescriptionIssue Description

Issue DescriptionDate

DateDate

Date Request

RequestRequest

Request

Owner

OwnerOwner

Owner

Compal Electronics, Inc.

1201(EVT2 Gerber)

1.Modify EVT1 SMT memo into Schematic

2.Add 1U_0201_4V_6M *4(C1511,C1512,C1513,C1514) for ChA

3.Add 1U_0201_4V_6M *4(C1515,C1516,C1517,C1518) for ChB

4.Delete ChA,ChB SPD ROM(U70,U72) circuit

5.JLVDS.15 change from VR_LEFT to GND

6.TB,pull high PCH_DPD_CLK,PCH_DPD_DAT to +3VS(R252,R254)

7.TB,add Buffer:U3 EN pin pull down resistor:R1075

8.TB,Change R1067 pull down form PA_LSRX_LSOE1_R to PA_LSRX_LSOE1_U

9.WLAN,Modify PCIE TX,RX,change P/N of RX signal

10.WL_OFF# connected to EC_Pin71

BT_ON# connected to EC_Pin117

11.mSATA,+3VS_FULL:Change C455 to 4.7U_0603_6.3V_6K,+1.5VS:Delete C433

12.Update Motor circuit,P.30

13.Add TPM/TCM co-layout circuit,P.30

14.USB PWR SW IC enable pin co-lay SYSON# and USB_EN#_R(EC_Pin81)

15.EC,P.32

(1)power source co-lay +3VALW/+3VLP

(2)DC mode S4/S5 turn on +3VALW,+5VALW for Motor, MOTOR_BTN(EC_Pin17)

(3)PPS_L connected to MOTOR_PPS_L(EC_Pin85)

(4)PPS_R connected to MOTOR_PPS_R(EC_Pin91)

(5)Turn on/off Motor +5VALW connected to MOTOR_PWR_ON(EC_Pin21)

(6)Audio/B add Motor LED connected to MOTOR_LED#(EC_Pin36)

(7)BI_DET changed to EC_Pin25

(8)Adapter ID pin connected to ADP_ID(EC_Pin64)

16.Update JAUDIO connector type and pin define,P.33

17.Add Motor BTN circuit,P.33

1207

1.PCH_ACIN pull high R341 Change from 200K to 10K

0108(DVT)

1.For DS3,change P.18 PCH power source from +3VALW_PCH to +VCCSUS3_3

(R422,R657,R391,R397,R458)

2.Change TB_CLKREQ#_R power source from +3VS_POC to +3VS_LC (Q67,R1031)

3.Change Q67 direction

4.Change TB_SMB_DA,TB_SMB_CLK from PH +3VS_LC(R1036,R1037) to PL(R1046,R1047)

5.Change Q71 +3VS_LC enable pin from EN_LC_PWR to 1.05VS_LC_PG

6.Change R1110 from 348K_0402_1% to 35.7K_0402_1%

7.Change TB_GO2SX from PL to PH +3VS_POC(R1066)

8.Add TCM (U8) package into board file

9.For EC_PME#,R490 change to pop

10.For Motor BTN,R974 change to pop

11.Add MSATA RAID0 function (C625,C627,C626,C628)

12.Add PCH:GPIO35 to RAID0_DET,external pull down(R329)

13.Change TP from 6 pin to 8 pin,Add level shift Q9

14.Combine Q66,Q67 to Q89 dual package

15.For DS3,Add EC.82 ACPRESENT to PCH_ACIN(pop R456,unpop D19)

16.For eDP only,PCH_GPIO71 change from PL to NC(unpop R618)

17.For Motor VR,change from PH to PL 100K(R454,R455)

0113

1.Remove mSATA USB port12

2.For ESD request,Reserve 0.1uf for FAN_SPEED1,FAN_PWM (C451,C450)

0117 (Final Schematic for Gerber)

1.Add Q30,Q31 for "LED" TB cable

2.Add MD222 BT_LED test point:T74

3.Add test point T75,T76,T77,T78,T79,T80 for TB boundary scan

0120

1.Unpop Power BTN(SW1)

2.For change BID from 0 to 1,pop R957:8.2K

3.For DS3,S3,Change R418 BOM config from S3@ to normal

0131

1.For ,Change C394,C1000 from SGA00001E00 to SGA00002N80

2.For ,Change C599,C607 main source:SGA00004700,2nd source:SGA00004400

3.For ,Change C1484,C1464 main source from SGA20331E10 to SGA19331D10

4.For Vendor Report,

Change Y1,Y2 from SJ10000DJ00:25MHZ 20PF +-30PPM 7V25000016 to

SJ10000E800:25MHZ 10PF +-20PPM 7V25000014

Change C744,C745 form 27pf to 10pf

Change C1338,C1340 from 20pf to 6.8pf

5.For cost,C496,C478 change to unpop

6.For cost,Change C505 from 1uF 0201 to 0.1uF 0201

7.For cost,Change C993,C992,C1009,C994,C1006,C1008,C1007,C1010,C986,C1002

from 1uF 0201 to 0.1uF 0201

8.For ESD request,pop 1000pf for FAN_SPEED1,FAN_PWM (C451,C450)

and Unpop C579 1000p of FAN_SPEED1

9.For IOAC power control by EC,pop Q47

0303 (PVT)

Modify DVT SMT memo for BOM

1.C744,C745 change from 10P 25V J NPO 0402:SE00000F180

to 10P 50V J NPO 0402:SE071100J80

2.For INTEL TB review,pop R1036,R1037,R1048,unpop R1046,R1047,R1066

3.TB,C1424,C1425 change from SE000000K80:1U_0402_6.3V6K

to SE076104K80:.1U_0402_16V7K

4.For USB enable pin change from SYSON#:R952 to USB_EN#:R951

Modify PVT layout

0.Remove on/off# BTN SW1 footprint

1.Change BT port from Port13 to Port8

2.Remove TCM parts:U8,R964,R965,C12,C1225

3.Remove EC 930 SPI ROM:U38,R694,R690,R698,R705,R692,C722,R695,C727

4.Remove SUS_PWR_DN_ACK for S3:EC U53.19,R409,R411

5.Update JLVDS1 pin define for +3VALW short issue

6.Add JLED1 connector

7.Remove JMT1,JMT2,JRTC1 and Change to JMR1 8pin conn.

8.Add EC U53.19:IRST_RST# (R461) to U26.1 for IOAC+IRST issue

9.Change 0ohm to 0ohm_short:R80,R314,R320,R372,R382,R394,R412,R421,

R577,R578,R579,R581,R582,R612,R629,R661,R785,R940,R947,R953,R956,

R959,R967,R973,R974

10.For WLAN issue,Change PCH_PCIE_WAKE#_R(EC_PME#) pull high

from +3VALW to +3VS_WLAN.Add R962,Remove R943

11.Change Motor Power source from PMOS to NMOS

Remove:R452,R453,Q69,C818,R754,J14

Add:U23,Q90,R459,C472,C503,C504,C481,R460

12.Remove net :ADP_ID

13.For TB ref. design,Add dual PMOS Q91,Q92,NMOS Q32,R1124

0306

14.Add DPWROK PL:R463 for INTEL suggestion

15.Remove JP1 EC debug port

16.Remove MDP_HPD ESD:D45

17.Add H11:H_4P0N for eDP connector

18.Add EC_SPOK(U53.120) to control +VSBP

19.add BT_LED U53.119 control pin,R492

20.add TB_FORCE_PWR:R1097 to PCH_GPIO12

21.Add WLAN discharge circuit:Q62B,R473=>Remove

22.For ACER TB request,add PH R1125 to +3VS_POC

0308

23.Remove ME RST# 0ohm:R561

24.Add C785,C786,C787,C788,C789 for ESD request

25.Add Q69 group(Q69,Q62B,R452,R453,R754,C818,R474,C540) for +3V_MCU

26.Change +3VS_FULL:J8 from 43*79 to 43*39

0309

27.Change Q62 dual 2N7002 to normal 2N7002

28.Add IRST_RST# PH:R965 to +3VALW_EC

29.Motor +3V_MCU design:

Delete PMOS:Q69 group(Q69,Q62B,R452,R453,R754,C818,R474,C540)

Add NMOS:Q87 group(Q87,Q93,R21,R789,C811)

0312 Modify for PVT SMT

1.For EC_SMI#,R939 change to @

2.For PCH_ACIN,R341 change to @

3.For ACER only,TPM change from SA00005EG00 to SA00005PH00

4.Change SPOK control function from PWR to EC_SPOK

5.Change HDMI cap form SE076103K80:0.01u to SE076104K80:0.1u:C280~C287

6.Change Board ID form 1 to 2,R960 chnage to 18K_0402_5%

7.For Vgs(th) issue,change Q20 from 2N7002 to BSS138(SB000002X00)

8.For Q5LJ1 RTC issue,

change X1 from SJ10000DM00:S CRYSTAL 32.768KHZ 12.5PF 9H03200019 to

SJ100004Z00:S CRYSTAL 32.768K 12.5PF 1TJF125DP1A000D

9.Remove KB cap 100P_0201*24pcs

C245,C246,C247,C248,C249,C250,C251,C252,C253,C254,C255,C256,C258,C259,

C260,C263,C265,C266,C267,C268,C269,C270,C271,C272

10.For ME PE review,remove C442

11.For cost,Change DDR C1464 to @

12.For cost,Change DDR C1258,C1259,C1261,C1291,C1292,C1293 to @

13.For cost,Change DDR cap from 1uF_0201 to 0.1uF_0201

C1462,C1461,C1460,C1459,C1514,C1513,C1512,C1511,

C1466,C1476,C1477,C1467,C1470,C1471,C1478,C1468

C1504,C1503,C1502,C1501, C1518,C1517,C1516,C1515,

C1487,C1497,C1498,C1488,C1491,C1492,C1499,C1489

14.For cost,Change TB C1406,C1407,C1443,C1444 from 1uF_0201 to 0.1uF_0201

0314

15.For HF parts,change Q6 from SB501380020 to SB501380050

16.For HF parts,change Q87 from SB534560020 to SB534560030

0315

17.Combine Power latest schematic

0402 Modify for 1.0 layout

1.Add soft start R756,C819 of Q68:+VCCSUS3_3 and R757,C820 of Q64:+V5REF_SUS

2.Add TB GPIO7(R1129) to PCH GPIO49,GPIO6(R1128) to PCH GPIO20

3.Add TB wake# colay:R1098 to U53.64(EC GPIO49),PH R976 to +3VALW_EC

4.Add TB +3VS_POC jumper colay +3VS(J4) and +3VALW(J2)

5.Delete colay J13(+3VALW to +VCCSUS3_3),R751(+5VALW to +V5REF_SUS)

6.Add C1519:10U_0603 for +0.675VS

7.Change C1468,C1471,C1476,C1477,C1478,C1491,C1492,C1499 from

0.1U_0201_10V6K to 1U_0402_6.3V6K

8.Add R277,R1109 for MOS Vgs(th) reserve.

9.Change Motor BTN SW:R974 from 0ohm_short to normal 0ohm

10.Add C790,C791 of VGATE for ESD team

11.Reduce Jumper size from 43*118 to 43*79:PJ17,PJ7,J3

Change Jumper sixe from 43*118(PJ1) to 43*79(PJ1)+43*39(PJ8)

Change Jumper sixe from 43*118(PJ2) to 43*79(PJ2)+43*39(PJ10)

0411 Modify for PreMP SMT

update PVT SMT memo

1.Add C787:100P_0201_25V8J for PM_DRAM_PWRGD

2.Add C785:100P_0201_25V8J and C786:100P_0402_50V8J for DIMM_DRAMRST#

3.Add C788:100P_0402_50V8J for SM_DRAMRST#

4.Add C789:100P_0402_50V8J for SYS_PWROK

5.For TB GPIO6,GPIO7,change PH to PL,unpop R1036,R1037,pop R1046,R1047

6.Delete Q65 for TB GPIO6,GPIO7

7.Add TB_FORCE_PWR_R to PCH,pop R1097,unpop PH:R657 at PCH side

8.For TB_PLUG_EVENT,unpop PCH side PH:R406

update for PreMP

1.Add C790:100P_0402_50V8J,C791:100P_0201_25V8J for VGATE

2.Change Board ID to "4" for 1.0=>R960:56K

3.Change PCH from SA00005AG00:HM77 QPRG to MP version SA00005AGI0:HM77 SLJ8C

4.TB chip change to MP version:NA

5.Change LA8481P from DA6:DAA00003N00 to DAZ:DAZ0NS00100

6.Change Y1:25MHz cap:C744,C745 from 10P to 8.2P_0402_50V8D

7.For VR,change R454,R455 from 100K_5% to 100K_1%

8.Add C1261,C1291 2.2U_0603_6.3V6K for DDR Memory test issue

9.Change C1504,C1501,C1517,C1503,C1511,C1460,C1462,C1514

from 0.1uF 0201 to 1uF 0201

10.Change TB R1083,R1078,R1089,R1080,R1081,R1082,R1088,R1086

from 12.1ohm to 0ohm,R1086 change to @

0412 Modify for 1A layout

11.For Motor_BTN,add PH:R909 to +3VLP

12.Remove EC_TB_WAKE#:R1098

13.For LEGO,Change control pin from PCH to EC

(1)LED:PCH_GPIO34 change to EC_GPIO122(TB_LED)

(2)Eject:PCH_GPIO48 change to EC_GPIO64,pop R976(TB_EJECT_BTN)

(3)pop Q30,Q31,R1125,unpop R1056,R1057

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

EE P.I.R

Custom

51 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

EE P.I.R

Custom

51 51Thursday, April 12, 2012

2012/4/6 2013/4/6

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

Q3ZMC M/B LA-8481P Schematic

1.0

EE P.I.R

Custom

51 51Thursday, April 12, 2012

2012/4/6 2013/4/6

www.s-manuals.com