Compal LA 9532P Schematics. Www.s Manuals.com. R1.0 Schematics

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Compal Confidential
Model Name : V5WE2/T2 (EA/EG)
File Name : LA-9532P
1

1

Compal Confidential
2

2

EA50 UMA M/B Schematics Document
Intel Shark Bay ULT (Hasswell + Lynx PointLP)

2013-04-18

3

3

REV:1.0

ZZZ

Part Number
4

DAZ0VR00200
V5WE2_PCB

Description
4

PCB V5WE2 LA-9532P LS-9531P/9532P/9533P

ZZZ1

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
HDMI_ROYALTY
ROYALTY HDMI W/LOGO+HDCP

2012/07/10

2013/07/10

Deciphered Date

Title

Cover Page

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RO0000003HM
45@

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Sheet

Thursday, April 18, 2013
E

1

of

42

Rev
0.2

A

B

CRT Conn.

C

D

E

eDP & LVDS
Co-lay Conn.

page 21

Fan Control

page 30

page 18

1

DP to VGA
ITE IT6511FN

eDP to LVDS
RTD2132R

HDMI Conn.
page 19

1

page 17

page 20
DP x 2 lanes

HDMI x 4 lanes

2.7GT/s

2.97GT/s

204pin DDR3L-SO-DIMM X1

Intel Haswell ULT
DDI

page 15

BANK 0, 1, 2, 3

Memory BUS

eDP

Dual Channel

Haswell ULT

204pin DDR3L-SO-DIMM X1

1.35V DDR3L 1333/1600

Processor

page 16

BANK 4, 5, 6, 7

OPI

MINI Card
WLAN
USB port 8 page 24
PCIe 2.0
5GT/s

2

port 4

Flexible IO

Lynx Point - LP
PCH

PCIe 2.0
5GT/s

port 3

USBx8
SATA3.0

SATA3.0

6.0 Gb/s

6.0 Gb/s

port 0

LAN(GbE)
Boardcom
57786 page

3

SATA HDD
Conn.
22

port 1

page 04~14

LPC BUS

2 in 1
(SD/MMC)

PWR/B

Touch Pad

page 26

USB port 6

page 18

2

page 18

48MHz

3.3V 24MHz

HDA Codec
ALC3225

page 29

SPI

3

Int. Speaker

Int. MIC

page 29

Combo Jack

page 29

page 29

page 28

LS-9532P
USB/B

(port 1,2)
page 26

EC ROM x1
(KB932)
page 27

page 31

LS-9533P
page 32~40

USB port 7

Int.KBD

page 28

4

Power Circuit DC/DC

USB/B (port 1,2)
page 26

LS-9531P

Power On/Off CKT.

DC/DC Interface CKT.

USB port 0
page 26

page 07

ENE
KB9012/KB932
page 27

Sub Board

page 28

Touch
Module

SPI ROM x2

CLK=24MHz

page 23

page 06

CMOS
Camera

1168pin BGA

page 25

Card Reader

RTC CKT.

USB 2.0
conn x2

HD Audio

SATA CDROM
Conn.

page 25

USB 3.0
conn x1

4

BATT/B
page 33

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

Block Diagrams

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Sheet

Monday, April 08, 2013
E

2

of

42

Rev
0.2

A

B

C

D

SIGNAL

STATE

Voltage Rails
Power Plane

1

S1

S3

S5

VIN

Adapter power supply (19V)

N/A

N/A

N/A

BATT+

Battery power supply (12.6V)

N/A

N/A

N/A

B+

AC or battery power rail for power circuit.

N/A

N/A

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

+0.675VS

+0.675VSP to +0.675VS switched power rail for DDR terminator

ON

OFF

OFF

+1.35V

+1.35VP to +1.35V power rail for DDRIIIL

ON

ON

OFF

+1.5VS

+1.5V to +1.5VS switched power rail

ON

OFF

OFF

+1.8VS

+3VS to 1.8V switched power rail to CPU

ON

OFF

OFF

+3VALW

+3VALW always on power rail

ON

ON

ON*

+3VLP

B+ to +3VLP power rail for suspend power

ON

ON

ON

+3VS

+3VALW to +3VS power rail

ON

OFF

OFF

+5VALW

+5VALWP to +5VALW power rail

ON

ON

ON*

+5VS

+5VALW to +5VS switched power rail

ON

OFF

OFF

+VSB

+VSBP to +VSB always on power rail for sequence control

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

+1.05VS_VTT

+1.05VSP to +1.05VS_VTT switched power rail for cpu

ON

OFF

OFF

+VALW

+V

+VS

Clock

HIGH

HIGH

HIGH

HIGH

ON

ON

ON

ON

S1(Power On Suspend)

LOW

HIGH

HIGH

HIGH

ON

ON

ON

LOW

S3 (Suspend to RAM)

LOW

LOW

HIGH

HIGH

ON

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

LOW

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

LOW

LOW

ON

OFF

OFF

OFF

Full ON
Description

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

E

1

Board ID / SKU ID Table for AD channel
Vcc
Ra/Rc/Re
Board ID

0
1
2
3
4
5
6
7

3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

2

2

BOARD ID Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

EC SM Bus1 address
Device

Address

Smart Battery

0001 011X b

EC SM Bus2 address
Device
On Board Thermal Senser

Address
1001_101xb

PCH SM Bus address
Device
ChannelA

BTO Item
BOM Structure
EC 9012
9012@
EC 940
940@
Unpop
@
TPM Circuit
TPM@
eDP mode
EDP@
eDP to LVDS
TL@
Connector
CONN@
GSEN@
G‐Sensor
XDP (Debug Port)
XDP@
BL@
KB Backlight
Debug Only
DEG@
MEC requirement
EMC@
MEC requirement unpop
XEMC@
VGA@
GPU_Select
reserve 3,5V MOS
35V@
BIOS 8M Solution
1ROM@
BIOS 4+2M Solution
2ROM@
IOAC Function
IOAC@
Touch screen Function
TS@

Address
DIMM0

A0

1010 000X

JDIMM1(SPD)

USB Port Table

BOM config
3

PCB P/N
DA60000XR00 : PCB 0VR LA-9532P REV0 M/B
EVT BOM config 9012@ ; AMIC@ ; CHR@ ; BL@ ; EMC@ ; AOAC@
11/1 Del XDP@
DVT BOM config 9012@ ; BL@ ; EMC@ ; EDP@ (L01~L04)
9012@ ; BL@ ; EMC@ ; TL@ (L05)
PVT BOM config 9012@ ; EMC@ ; EDP@ ; 1ROM@ ; IOAC@
PreMP BOM config 9012@ ; EMC@ ; EDP@ ; 1ROM@ ; IOAC@

USB 3.0 Port
1
2
XHCI
3
4

43 level BOM table
43 Level
4319LWBOL01
4319LWBOL02
4319LWBOL03
4319LWBOL04
4319LWBOL05
4319LWBOL06
4319LWBOL07
4319LWBOL08
4319LWBOL09
4319LWBOL10
4319LWBOL21
4319LWBOL22

UHCI1
EHCI1

Description

UHCI2

SMT MB A9532 V5WE2 UMA I7 QDA7 HDMI
SMT MB A9532 V5WE2 UMA I5 QDJB HDMI
SMT MB A9532 V5WE2 UMA I5 QDJ7 HDMI
SMT MB A9532 V5WE2 UMA I5 QDJ9 HDMI
SMT MB A9532 V5WE2 UMA I5 QDJB LVDS HDMI
SMT MB A9532 V5WE2 UMA WO/CPU HDMI
SMT MB A9532 V5WE2 UMA I5 QEA4 HDMI
SMT MB A9532 V5WE2 UMA I5-4200 HDMI
SMT MB A9532 V5WE2 UMA I3-4010 HDMI
SMT MB A9532 V5WE2 UMA I5-4250 HDMI
SMT MB A9532 V5WC2 UMA I5-4200 HDMI
SMT MB A9532 V5WC2 UMA I3-4010 HDMI

USB Port(Left 3.0)

USB 2.0 USB 1.1 Port
UHCI0

4

BTO Option Table

PCB Revision
0.1
0.2
0.3
0.4
1.0

Board ID
0
1
2
3
4
5
6
7

UHCI3

0
1
2
3
4
5
6
7

3 External
USB Port
USB Port(Left 3.0)
USB Port(Right 2.0)
USB Port(Right 2.0)
Mini Card(WLAN)
Touch Screen
Camera

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

2013/07/10

Deciphered Date

Title

Notes List

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

3

B

C

D

Sheet

Friday, April 12, 2013
E

3

of

42

Rev
0.2

5

4

3

2

DP to CRT

20
20
20
20

C54
C55
B58
C58
B55
A55
A57
B57

CPU_DP1_N0
CPU_DP1_P0
CPU_DP1_N1
CPU_DP1_P1

D

19
19
19
19
19
19
19
19

HDMI

C51
C50
C53
B54
C49
B50
A53
B53

CPU_DP2_N0
CPU_DP2_P0
CPU_DP2_N1
CPU_DP2_P1
CPU_DP2_N2
CPU_DP2_P2
CPU_DP2_N3
CPU_DP2_P3

DDI1_TXN0
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
DDI1_TXN3
DDI1_TXP3

1

HASWELL_MCP_E

U1A

EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1

DDI

EDP

DDI2_TXN0
DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3

EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL

C45
B46
A47
B47

EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1

18
18
18
18

C47
C46
A49
B49

+VCCIOA_OUT
D

A45
B45
D20
A43

EDP_AUXN
EDP_AUXP

18
18
R1 1
24.9_0402_1%

EDP_COMP

EDP_DISP_UTIL

18

2

Trace width=20 mils
Spacing=25mil
Max length=100mils

Rev1p2

1 OF 19
HASWELL-MCP-E-ULT_BGA1168
+1.35V

1

Reserved for ESD
C94 1
XEMC@

R184
470_0603_5%

2

+1.05VS_VTT
DIMM_DRAMRST#

27,32,33

15,16

T20
T2

1
R68
62_0402_5%

H_PROCHOT#

Reserved for ESD

C

D61
K61
N62

@
@

H_PECI

2

27

1

R6

Reserved for ESD

1
1
1
15

2

R8
56_0402_5%
1
2 H_PROCHOT#_R K63

2 6.8P_0402_50V8C
C95 1
XEMC@
2 10K_0402_5% H_CPUPWRGD

C60 1
XEMC@
R11
R13
R41

HASWELL_MCP_E

U1B

2 6.8P_0402_50V8C

C61

PROC_DETECT
CATERR
PECI

MISC

PRDY
PREQ
PROC_TCK
PROC_TMS
PROC_TRST
PROC_TDI
PROC_TDO

JTAG

PROCHOT

PROCPWRGD

THERMAL

AU60
AV60
AU61
AV15
AV61

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_DRAMRST
SM_PG_CNTL1

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7

DDR3

DDR3 Compensation Signals

C993
6.8P_0402_50V8C
1
XEMC@

XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO

@
@
@
@
@
@
@

T157
T158
T159
T160
T161
T162
T163

XDP_OBS0 @
XDP_OBS1 @

T164
T165

C

PWR

2 6.8P_0402_50V8C

2 200_0402_1% SM_RCOMP0
2 120_0402_1% SM_RCOMP1
2 100_0402_1% SM_RCOMP2
DIMM_DRAMRST#
DDR_PG_CTRL
DDR_PG_CTRL

J62
K62
E60
E61
E59
F63
F62

J60
H60
H61
H62
K59
H63
K60
J61

Rev1p2

2 OF 19
HASWELL-MCP-E-ULT_BGA1168

Reserved for ESD

B

A

B

U1

U1

CPU_SR170 _C1
SR170@

CPU_SR16Q _C1
SR16Q@

SA00006SMB0

SA00006SX70

U1

U1

A

U1

U1

U1

U1

2012/07/10

Issued Date
CPU_QDJB_B1
QDJB@

CPU_QDJ7_B1
QDJ7@

CPU_QDJ6_B1
QDJ6@

CPU_QDJ9_B1
QDJ9@

CPU_QEVE _C0
QEVE@

CPU_QEVG_C0
QEVG@

SA000067060

SA000067H50

SA00006FY20

SA00006G120

SA00006SM30

SA00006SX30

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2013/07/10

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

HSW MCP(1/11) DDI,MSIC,XDP

3

2

Sheet

Friday, April 12, 2013
1

4

of

42

Rev
0.2

5

4

U1C

3

2

HASWELL_MCP_E

U1D

D

C

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AH63
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51

1

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0
SA_BA1
SA_BA2

DDR CHANNEL A

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1

AU37
AV37
AW36
AY36

SA_CLK_DDR#0
SA_CLK_DDR0
SA_CLK_DDR#1
SA_CLK_DDR1

AU43
AW43
AY42
AY43

DDRA_CKE0_DIMMA
DDRA_CKE1_DIMMA

AP33
AR32
AP32 DDRA_ODT0

15
15
15
15

DDRA_CS0_DIMMA#
DDRA_CS1_DIMMA#
@

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

15
15

15
15

T4

AY34
AW34
AU34
AU35
AV35
AY41

DDR_A_RAS#
DDR_A_WE#
DDR_A_CAS#

15
15
15

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

15
15
15

AU36 DDR_A_MA0
AY37 DDR_A_MA1
AR38 DDR_A_MA2
AP36 DDR_A_MA3
AU39 DDR_A_MA4
AR36 DDR_A_MA5
AV40 DDR_A_MA6
AW39DDR_A_MA7
AY39 DDR_A_MA8
AU40 DDR_A_MA9
AP35 DDR_A_MA10
AW41DDR_A_MA11
AU41 DDR_A_MA12
AR35 DDR_A_MA13
AV42 DDR_A_MA14
AU42 DDR_A_MA15
AJ61 DDR_A_DQS#0
AN62 DDR_A_DQS#1
AM58 DDR_A_DQS#2
AM55 DDR_A_DQS#3
AV57 DDR_A_DQS#4
AV53 DDR_A_DQS#5
AL43 DDR_A_DQS#6
AL48 DDR_A_DQS#7
AJ62 DDR_A_DQS0
AN61 DDR_A_DQS1
AN58 DDR_A_DQS2
AN55 DDR_A_DQS3
AW57DDR_A_DQS4
AW53DDR_A_DQS5
AL42 DDR_A_DQS6
AL49 DDR_A_DQS7
AP49
AR51
AP51

15
15
15
15

DDR_A_D[0..63]
DDR_A_MA[0..15]

DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]

SM_DIMM_VREFCA
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

15,16
15
16

AY31
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18

HASWELL_MCP_E

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0
SB_BA1
SB_BA2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15

DDR CHANNEL B

SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7

AM38
AN38
AK38
AL38

SB_CLK_DDR#0
SB_CLK_DDR0
SB_CLK_DDR#1
SB_CLK_DDR1

AY49
AU50
AW49
AV50

DDRB_CKE0_DIMMB
DDRB_CKE1_DIMMB

16
16
D

AM32
AK32

DDRB_CS0_DIMMB#
DDRB_CS1_DIMMB#

AL32 DDRB_ODT0
AM35
AK35
AM33

@

16
16

T5
DDR_B_RAS#
DDR_B_WE#
DDR_B_CAS#

AL35
AM36
AU49

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

16
16
16
16
16
16

AP40 DDR_B_MA0
AR40 DDR_B_MA1
AP42 DDR_B_MA2
AR42 DDR_B_MA3
AR45 DDR_B_MA4
AP45 DDR_B_MA5
AW46DDR_B_MA6
AY46 DDR_B_MA7
AY47 DDR_B_MA8
AU46 DDR_B_MA9
AK36 DDR_B_MA10
AV47 DDR_B_MA11
AU47 DDR_B_MA12
AK33 DDR_B_MA13
AR46 DDR_B_MA14
AP46 DDR_B_MA15

C

AW30DDR_B_DQS#0
AV26 DDR_B_DQS#1
AN28 DDR_B_DQS#2
AN25 DDR_B_DQS#3
AW22DDR_B_DQS#4
AV18 DDR_B_DQS#5
AN21 DDR_B_DQS#6
AN18 DDR_B_DQS#7
AV30 DDR_B_DQS0
AW26DDR_B_DQS1
AM28 DDR_B_DQS2
AM25 DDR_B_DQS3
AV22 DDR_B_DQS4
AW18DDR_B_DQS5
AM21 DDR_B_DQS6
AM18 DDR_B_DQS7

16
16
16

B

16
16
16
16

16

DDR_B_D[0..63]
DDR_B_MA[0..15]

DDR_B_DQS#[0..7]

B

DDR_B_DQS[0..7]

Rev1p2

3 OF 19
HASWELL-MCP-E-ULT_BGA1168

Rev1p2

4 OF 19
HASWELL-MCP-E-ULT_BGA1168

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

HSW MCP(2/11) DDRIII

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

5

of

42

Rev
0.2

5

4

3

2

1

PCH_RTCX1

2
10M_0402_5%

PCH_RTCX2
C149
1U_0402_10V6K

+RTCVCC
Y1

1

D

2

32.768KHZ_12.5PF_Q13FC
1
C153
18P_0402_50V8J

1

2

2

R69
20K_0402_1%
1
2
1
2
R70
20K_0402_1%
C150
1U_0402_10V6K

C154
18P_0402_50V8J

ME CMOS

2

R72

1
@

PCH_RTCX1
PCH_RTCX2
2 1M_0402_5% SM_INTRUDER#
PCH_INTVRMEN
PCH_SRTCRST#
PCH_RTCRST#

1

2
1
1

R73
R74

INTVRMEN

H：Integrated
* L：Integrated

T95

29

1
2
3
4

HDA_BITCLK_AUDIO
HDA_SYNC_AUDIO
HDA_RST_AUDIO#
HDA_SDOUT_AUDIO

@

2 R97
T21
T19
T15
T10
T11
T22
T12

RP14
29
29

T6
T7
T8
T9

VRM enable
VRM disable

HDA for AUDIO

29

HDA_SDIN0

RTCRST close RAM door

HDA_BIT_CLK
HDA_SYNC
HDA_RST#
HDA_SDIN0
@
HDA_SDOUT
@
@
@

AW8
AV11
AU8
AY10
AU12
AU11
AW10
AV10
AY8

8
7
6
5

@
PCH_JTAG_RST#
PCH_JTAG_TCK
@ PCH_JTAG_TDI
@ PCH_JTAG_TDO
@ PCH_JTAG_TMS
@
@
@ PCH_TCK_JTAGX
@

27

AUDIO

SATA

SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37

AU62
AE62
AD61
AE61
AD62
AL11
AC4
AE63
AV2

PCH_TRST
PCH_TCK
PCH_TDI
PCH_TDO
PCH_TMS
RSVD
RSVD
JTAGX
RSVD

HDA_BIT_CLK
HDA_SYNC
HDA_RST#
HDA_SDOUT

SATA_IREF
RSVD
RSVD
SATA_RCOMP
SATALED

JTAG

J5
H5
B15
A15

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0

25
25
25
25

HDD

J8
H8
A17
B17

SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1

25
25
25
25

ODD

D

J6
H6
B14
C15
F5
E5
C17
D17
V1
U1
V6
AC1
A12
L11 @
K10 @
C12
U3

GPIO34_SCI#

1

GPIO34_SCI#
PCH_GPIO35
PCH_GPIO36
PCH_GPIO37

R937
2 0_0402_5%

@

PCH_GPIO35
PCH_GPIO36
PCH_GPIO37

SATA_IREF
T13
T14
SATA_RCOMP
PCH_SATALED#
R10 1
10K_0402_5%

2

R75

1

9
9
9
@

9

EC_SCI#
27,9
+1.05VS_ASATA3PLL

2 0_0603_5%

within 500 mils

R2

1

2 3.01K_0402_1%

PCH_SATALED#

28

+3VS
C

Rev1p2

5 OF 19
33_0804_8P4R_5%
EMC@

25,27,7

HDA_BCLK/I2S0_SCLK
HDA_SYNC/I2S0_SFRM
HDA_RST/I2S_MCLK
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_SDO/I2S0_TXD
HDA_DOCK_EN/I2S1_TXD
HDA_DOCK_RST/I2S1_SFRM
I2S1_SCLK

2 330K_0402_5%
2 330K_0402_5%

@

SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3

RTC

CMOS

51_0402_5% 1

C

RTCX1
RTCX2
INTRUDER
INTVRMEN
SRTCRST
RTCRST

SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2

29

PCH_INTVRMEN

AW5
AY5
AU6
AV7
AV6
AU7

R71
0_0603_5%

2

+RTCVCC

HASWELL_MCP_E

U1E

+RTCVCC

1

1

1
R101

HASWELL-MCP-E-ULT_BGA1168

R163 1 9012@ 2 0_0402_5%

HDA_SDO

R161 1 940@

SPI_WP1#_R

2 4.7K_0402_5%

ME Debug
+RTCBATT1

1

+CHGRTC

2

+RTCBATT1

3 1

2

B

20mil

+

R446
@ 1K_0402_5%

B

+RTCBATT_R

20mil

@

1

-

D32 @
CHN202UPT_SC70-3

2

1

+RTCVCC

C168
0.1U_0402_16V4Z

JBATT1
LOTES_AAA-BAT-054-K01
CONN@

SP07000H700

2

Reserve only

W=20mils

trace width 10mil

+RTCBATT

+CHGRTC

W=20mils
+RTCVCC

D22

2
1
3

A

BAS40-04_SOT23-3

A

1

C151
0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

HSW MCP(3/11) RTC,SATA,XDP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Thursday, April 18, 2013
1

6

of

42

Rev
0.2

5

4

3

2

XTAL24_IN

HASWELL_MCP_E

U1F

2
1M_0402_5%

1
R48

XTAL24_OUT

Y2
24MHZ_12PF_X3G024000DC1H
1
3
2
4

1
D

2

9

1
C2
12P_0402_50V8J

2

C3
12P_0402_50V8J

PCH_GPIO18

9

PCIE LAN
WLAN

22
22
22
24
24
24,8

PCH_GPIO19

PCH_GPIO18

C43
C42
U2

PCH_GPIO19

B41
A41
Y5

CLK_PCIE_LAN#
CLK_PCIE_LAN
+3VS
LAN_CLKREQ#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
MINI1_CLKREQ#

CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
PCIECLKRQ0/GPIO18

PCH_GPIO23

PCH_GPIO22

A39
B39
U5

PCH_GPIO23

B37
A37
T2

SIGNALS

CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
PCIECLKRQ3/GPIO21

2 10K_0402_5%

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

27,28
LPC_AD0
27,28
LPC_AD1
27,28
LPC_AD2
27,28
LPC_AD3
27,28
LPC_FRAME#

PCH_GPIO22

C

R140
R141
R142
R148

1
1
1
1

2
2
2
2

CLKOUT_LPC0
CLKOUT_LPC1

B35
A35

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
PCIECLKRQ4/GPIO22

T16
T17
XCLK_BIASREF

AN15
AP15

CLKOUT_LPC_0
CLKOUT_LPC_1

1

R78

2 3.01K_0402_1%

D

+1.05VS_AXCK_LCPLL

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%

2 EMC@ 1 22_0402_5%
2 TPM@ 1 22_0402_5%

R390
R395

CLK_BCLK_ITP#
CLK_BCLK_ITP

@
@

CLK_PCI_LPC
CLK_PCI_TPM

27
28

T184
T183

CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
PCIECLKRQ5/GPIO23
Rev1p2

6 OF 19
HASWELL-MCP-E-ULT_BGA1168
HASWELL_MCP_E
U1G
+3VS

C35
C34
AK8
AL8

TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8

CLOCK

XTAL24_IN
XTAL24_OUT

K21 @
M21 @
C26

RSVD
RSVD
DIFFCLK_BIASREF

CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
PCIECLKRQ2/GPIO20

B38
C37
N1

CLK_PCIE_MINI1#
CLK_PCIE_MINI1

A25
B25

XTAL24_IN
XTAL24_OUT

CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
PCIECLKRQ1/GPIO19

C41
B42
AD1

CLK_PCIE_LAN#
CLK_PCIE_LAN
2 10K_0402_5%
R52 1

9

R216 1

1

AU14
AW12
AY12
AW11
AV12

LAD0
LAD1
LAD2
LAD3
LFRAME

AA3
Y7
Y4
AC2
AA2
PCH_SPI_MOSI
AA4
PCH_SPI_MISO
Y6
PCH_SPI_WP1#
PCH_SPI_HOLD1# AF1
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#

SPI_CLK
SPI_CS0
SPI_CS1
SPI_CS2
SPI_MOSI
SPI_MISO
SPI_IO2
SPI_IO3

AN2
AP2
AH1
AL2
AN1
AK1
AU4
AU3
AH3

SMBALERT/GPIO11
SMBCLK
SMBDATA
SML0ALERT/GPIO60
SMBUS
SML0CLK
SML0DATA
SML1ALERT/PCHHOT/GPIO73
SML1CLK/GPIO75
SML1DATA/GPIO74

LPC

SPI

PCH_GPIO11
9
PCH_SMBCLK
24
PCH_SMBDATA
24
PCH_GPIO60
9
SML0DATA

PCH_GPIO73
SML1CLK
SML1DATA

AF2 @
AD2 @
AF4 @

CL_CLK
CL_DATA
CL_RST

C-LINK

PCH_GPIO11
PCH_SMBCLK
PCH_SMBDATA
PCH_GPIO60
SML0CLK

C

PCH_GPIO73

9

+3VALW_PCH

T23
T24
T25

SML0CLK
RP8
SML0DATA
PCH_SMBDATA
PCH_SMBCLK
SML1CLK
SML1DATA

1
2
3
4

8 2.2K_0804_8P4R_5%
7
6
5

R114 1
R113 1

2 2.2K_0402_5%
2 2.2K_0402_5%

Rev1p2

7 OF 19
HASWELL-MCP-E-ULT_BGA1168

D29 design for Debug
board flash SPI ROM
(can be short after MP)

+BIOS_SPI

+3VS

D29

1

2 940@ RB751V40_SC76-2

C66
PCH_SPI_CLK_1_R
PCH_SPI_CS0#_1_R
PCH_SPI_MOSI_1_R
PCH_SPI_MISO_1_R
25
SPI_HOLD1#_R

1
1
1
1
1

DEG@
DEG@
DEG@
DEG@
DEG@

2
2
2
2
2

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

PCH_SPI_CLK_1
PCH_SPI_CS0#
PCH_SPI_MOSI_1
PCH_SPI_MISO_1
PCH_SPI_HOLD1#

1

2 0.1U_0402_16V7K

R108

1
PCH_SPI_WP1# 2
33_0402_5%
2ROM@

1
2
3
4

PCH_SPI_CS0#
PCH_SPI_MISO_1
PCH_SPI_IO2_1

CS#
VCC
DO(IO1) HOLD#(IO3)
WP#(IO2)
CLK
GND
DI(IO0)

8
7
6
5

RP19
PCH_SPI_IO3_1
PCH_SPI_CLK_1
PCH_SPI_MOSI_1

PCH_SPI_MOSI_1 1
PCH_SPI_CLK_1 2
PCH_SPI_IO3_1 3
PCH_SPI_MISO_1 4

EN25QH16-104HIP_SO8
2ROM@

PCH_SPI_HOLD1#
PCH_SPI_WP1#

1
PCH_SPI_WP1# 2
33_0402_5%
2ROM@

A

4

D_CK_SCLK

CS#
DO
WP#
GND

VCC
HOLD#
CLK
DI

8
7
6
5

U6

15,16

+3VS

+3VS
C67
2ROM@
0.1U_0402_16V7K
1
2
RP20
PCH_SPI_IO3_2
PCH_SPI_CLK_2
PCH_SPI_MOSI_2

Reserve for EMI(Near SPI ROM)

NOTE : R106 & RP19 value
1 ROM solution use 15 ohm
2 ROM solution use 33 ohm

PCH_SPI_MOSI_2
PCH_SPI_CLK_2
PCH_SPI_IO3_2
PCH_SPI_MISO_2

1
2
3
4

SML1CLK

8
7
6
5

PCH_SPI_MOSI
PCH_SPI_CLK
PCH_SPI_HOLD1#
PCH_SPI_MISO

PU 2.2K at EC side (+3VS)

6

1

EC_SMB_CK2

27,30

EC_SMB_DA2

27,30

Q8A
DMN66D0LDW-7_SOT363-6

3

SML1DATA

33_8P4R_5%
2ROM@

C453
10P_0402_50V8J
1
2
2
1 PCH_SPI_CLK_2
R402 XEMC@
33_0402_5%
XEMC@

4

A

Q8B
DMN66D0LDW-7_SOT363-6

RP19

2012/07/10

Issued Date

MX25L6406EM2I-12G_SO8
940@

EN25QH64-104HIP SO8
1ROM@

15_8P4R_5%
1ROM@

SA00004G600

SA00006MK00

SD300001P00
4

Compal Electronics, Inc.

Compal Secret Data

Security Classification
1ROM@
2 R108 1
15_0402_5%

5

D_CK_SCLK

EN25QH32-104HIP_SO8

SPI ROM
( 8MByte for Chrome)
U6

1
2
3
4

15,16

R119
4.7K_0402_5%
1
2 +3VS

U7 2ROM@
PCH_SPI_CS1#
PCH_SPI_MISO_2
PCH_SPI_IO2_2

B

D_CK_SDATA

Q7B
DMN66D0LDW-7_SOT363-6

2 1K_0402_5%
R109

+3VS

D_CK_SDATA

3

PCH_SMBCLK

C152
10P_0402_50V8J
1
2
2
1 PCH_SPI_CLK_1
R104 XEMC@
33_0402_5%
XEMC@

SPI ROM ( 4MByte )

1

2

R103 1 2ROM@ 2 1K_0402_5%
R102 1 2ROM@ 2 1K_0402_5%

6

Q7A
DMN66D0LDW-7_SOT363-6

Reserve for EMI(Near SPI ROM)

PCH_SPI_IO3_1
PCH_SPI_IO2_1

R564 1 940@

SPI_WP1#_R

PCH_SPI_MOSI
PCH_SPI_CLK
PCH_SPI_HOLD1#
PCH_SPI_MISO

5

25,27,6

PCH_SMBDATA

8
7
6
5
33_8P4R_5%
2ROM@

+BIOS_SPI

R105 1 1ROM@ 2 1K_0402_5%
R106 1 1ROM@ 2 1K_0402_5%

R116
4.7K_0402_5%
1
2

U6

5

25
25
25
25

R572
R599
R603
R602
R604

2

SPI ROM ( 2MByte )
B

+3VS

R305 1 9012@ 2 0_0402_5%

Deciphered Date

2013/07/10

Title

HSW MCP(4/11) CLK,SPI,SMBUS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

3

2

Sheet

Monday, April 08, 2013
1

7

of

42

Rev
0.2

5

4

3

2

1

1

+3VS

25

1 DEG@ 2 0_0402_5%

R59

XDP_DBRESET#

2

R227
10K_0402_5%

DSWODVREN - On Die DSW VR Enable

H：Enable(DEFAULT)
* L：Disable

SYS_RESET#

PU at Page 4 (double PU)

D

PM_APWROK

27

1

R64

1
R110
0_0402_5%

PBTN_OUT#

2 0_0402_5%

2

@

R124 1
R125 1

PCH_PWROK_R

PBTN_OUT#_R

27
11,27

SUSWARN#

1

@

SYS_PWROK R61
R62
R63

1
1
1

@

PCH_PWROK
VCCST_PG_EC

SUSACK#
SYS_RESET#
SYS_PWROK_R
PCH_PWROK_R
PM_APWROK
PLT_RST#

2 0_0402_5%
2 0_0402_5%
2 0_0402_5%

27,28
R117 1

PCH_RSMRST#

PLT_RST#

AK2
AC3
AG2
AY7
AB5
AG7

SUSACK
SYS_RESET
SYS_PWROK
PCH_PWROK
APWROK
PLTRST

DSWVRMEN
DPWROK
WAKE
CLKRUN/GPIO32
SUS_STAT/GPIO61
SUSCLK/GPIO62
SLP_S5/GPIO63

2 10K_0402_5%
27

1

R79

PCH_RSMRST#

9

Note: EC is +3VL change to @

2 0_0402_5%

@

PCH_RSMRST#_R
SUSWARN#
PBTN_OUT#_R
PCH_ACIN
2 8.2K_0402_5% PCH_BATLOW#
T31
@

SUSWARN#

R156 1

+3VALW_PCH

AW6
AV4
AL7
AJ8
AN4
AF3
AM5

RSMRST
SUSWARN/SUSPWRDNACK/GPIO30
PWRBTN
ACPRESENT/GPIO31
BATLOW/GPIO72
SLP_S0
SLP_WLAN/GPIO29

AW7
AV5
AJ5

DSWODVREN
PCH_RSMRST#_R
PCH_PCIE_WAKE#

D

V5
AG4
AE6
AP5

8.2K_0402_5%
CLKRUN#
LPCPD#
SUSCLK
PM_SLP_S5#

AJ6
AT4
AL5
AP4
AJ7

PM_SLP_S4#
PM_SLP_S3#
@
@
PM_SLP_LAN#

2 R120 +3VALW_PCH

2 R157

@
@

SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN

1

1K_0402_1%

1

+3VS
CLKRUN#
28
LPCPD#
28
SUSCLK
27
PM_SLP_S5#
27

T27
T28

T30
T96
R118 1

@

T29

2 10K_0402_5%

@

PM_SLP_S4#
PM_SLP_S3#

27
27

+3VALW_PCH

1

+3VALW_PCH

2 330K_0402_5%
2 330K_0402_5%

@

SYSTEM POWER MANAGEMENT

R206
2 0_0402_5%

@

+RTCVCC

HASWELL_MCP_E

U1H

R245
100K_0402_5% @

27,32,34

2

2

@ D21
1

ACIN

not support Deep S4,S5 can NC

Rev1p2

8 OF 19
HASWELL-MCP-E-ULT_BGA1168

DDPB_CTRLDATA: Port B Detected

PCH_ACIN

DDPC_CTRLDATA: Port C Detected

RB751V40_SC76-2
C

C

*

1: Port B or C is detected
0: Port B or C is not detected
(Have internal PD)

HASWELL_MCP_E

U1I

+3VS

17,18
27
18

B8
A9
C6

PCH_INV_PWM
ENBKL
PCH_ENVDD

EDP_BKLCTL
EDP_BKLEN
EDP_VDDEN

DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA

eDP SIDEBAND

B9
2 2.2K_0402_5%
C9
R271 1
D9 DDI2_CTRL_CK
DDI2_CTRL_CK
D11 DDI2_CTRL_DATA
DDI2_CTRL_DATA

+3VS
+1.05VS_VTT

1
11,39

2

VGATE

3

@

NC

VCC

A
Y

R310
10K_0402_5%

5
4

VGATE_3V

@

T26
9

2

U17

1

EC_SMI#
PCH_GPIO78
PCH_GPIO79
PCH_GPIO80

27
EC_SMI#
PCH_GPIO78
PCH_GPIO79

9
9

VGATE_3V

PCH_GPIO55

27

GND
9

74AUP1G07GW_TSSOP5

PCH_GPIO51

@

PCH_GPIO55
PCH_GPIO52
Project_ID1
PCH_GPIO51
Project_ID0

U6
P4
N4
N2
AD4
U7
L1
L3
R5
L4

19
19

1 R420 @2
100K_0402_5%

PIRQA/GPIO77
PIRQB/GPIO78
PIRQC/GPIO79
PIRQD/GPIO80
PME

DISPLAY

GPIO

GPIO55
GPIO52
GPIO54
GPIO51
GPIO53

DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP

DDPB_HPD
DDPC_HPD
EDP_HPD

+3VS

C5
B6
B5
A6

DDI1_AUX_DN

20

DDI1_AUX_DP

20

1
2
R421 @
100K_0402_5%
C8
A8
D6

CPU_DP_HPD
20
CPU_HDMI_HPD
19
CPU_EDP_HPD
18

B

B

9 OF 19

5

SYS_PWROK

2

PCH_PWROK

+3VS

2

8
PCH_GPIO52
7
PCH_GPIO80
6
MINI1_CLKREQ#
5
DEVSLP0
10K_0804_8P4R_5%

MINI1_CLKREQ#
DEVSLP0
25,9

24,7
PLT_RST#

1

IN1
IN2

OUT

4

PLT_RST_BUF#

R205
10K_0402_5%

2

1
2

R214
10K_0402_5%

R215
10K_0402_5%

1

2

Project_ID0

2

2

@
Project_ID1

A

R204
10K_0402_5% @

1

A

U30
MC74VHC1G08DFT2G_SC70-5

+3VS

1

+3VS

22,24

R416
100K_0402_5%

3

2

1

3

@

RP27 1
2
3
4

R207
10K_0402_5%

5

+3VS

U43
@
MC74VHC1G08DFT2G_SC70-5

VCC

4

GND

Y
A

2

R208
10K_0402_5% @

B

R403
0_0402_5%
2
1
@

1

1

P

VGATE_3V

R65
0_0402_5%
1

G

2

1

PCH_PWROK

Rev1p2

HASWELL-MCP-E-ULT_BGA1168

+3VS

Project ID
*V5WE2/T2
Reserved
Reserved
Reserved

Project_ID1 Project_ID0
GPIO54 GPIO53
0
0
1
0
1
0
1
1

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

HSW MCP(5/11) PM,GPIO,DDI

3

2

Sheet

Monday, April 08, 2013
1

8

of

42

Rev
0.2

5

4

3

2

1

+3VS
+3VS

RP25 1
2
3
4

D

RP26 1
2
3
4
RP16 1
2
3
4
RP28 1
2
3
4
RP29 1
2
3
4
RP30 8
7
6
5
C

RP31 8
7
6
5
RP32 8
7
6
5
R311 1
10K_0402_5%

PCH_GPIO51

8

PCH_GPIO55

8

RP36

1
2
3
4

8
7
6
5

PCH_GPIO88
PCH_GPIO92
PCH_GPIO85
PCH_GPIO39
10K_0804_8P4R_5%

D

+1.05VS_VTT

7
6
8

PCH_GPIO18
PCH_GPIO35

7
6

GPIO34_SCI#

PCH_GPIO37

R144
1K_0402_5%

27

EC_LID_OUT#

P1
PCH_GPIO76
PCH_GPIO8 AU2
AM7
AD6
Y1
PCH_GPIO16
T3
PCH_GPIO17
PCH_GPIO24 AD5
PCH_GPIO27 AN5
PCH_GPIO28 AD7
PCH_GPIO26 AN3

EC_LID_OUT#

6

6

PCH_GPIO23

PCH_GPIO56
PCH_GPIO57
PCH_GPIO58
PCH_GPIO59
PCH_GPIO44
PCH_GPIO47
PCH_GPIO48
PCH_GPIO49
PCH_GPIO50
PCH_GPIO71
PCH_GPIO13
PCH_GPIO14
PCH_GPIO25
PCH_GPIO45
PCH_GPIO46

7

27,6
25,8

EC_SCI#
DEVSLP0

R939 @
0_0402_5%
2
EC_SCI# 1
DEVSLP0

RP38 1
2
3
4
RP39 1
2
3
4
RP40 1
2
3
4
R248 1
10K_0402_5%

USB_OC1#

THERMTRIP
RCIN/GPIO82
SERIRQ
PCH_OPI_RCOMP
RSVD
RSVD

CPU/
MISC

GPIO

LPIO

GPIO9
GPIO10
DEVSLP0/GPIO33
SDIO_POWER_EN/GPIO70
DEVSLP1/GPIO38
DEVSLP2/GPIO39
SPKR/GPIO81

GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69

D60
H_THERMTRIP#
V4
T4
SERIRQ
AW15
PCH_OPIRCOMP
AF20 @
T106
AB21 @
T32

R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2

PCH_GPIO83
PCH_GPIO84
PCH_GPIO85
PCH_GPIO86
DGPU_PRSNT#
PCH_GPIO88
PCH_GPIO89
PCH_GPIO90
PCH_GPIO91
PCH_GPIO92
PCH_GPIO93
PCH_GPIO94
PCH_GPIO0
PCH_GPIO1
PCH_GPIO2
PCH_GPIO3
PCH_GPIO4
PCH_GPIO5
PCH_GPIO6
PCH_GPIO7
PCH_GPIO64
PCH_GPIO65
PCH_GPIO66
PCH_GPIO67
EC_IN_RW
PCH_GPIO69

1

EC_IN_RW

28

Rev1p2

10 OF 19
HASWELL-MCP-E-ULT_BGA1168

10
+3VALW_PCH
B

PCH_GPIO79

R301
10K_0402_5%

8

+3VALW_PCH
R303
10K_0402_5%
R247 1

PCH_GPIO56

PCH_GPIO57

*

USB_OC2#
10
PCH_GPIO60
7
USB_OC0#
10,26
PCH_GPIO73

0: Intel ME TLS with no confidentiality
(Have internal PD)

+3VS

7

PCH_GPIO66

R270 1

@

2 1K_0402_1%

+3VS
R272 1
R273 1

2 1K_0402_1%
2 1K_0402_5%

@

1

R269 1

SDIO_D0 / GPIO66 : Top-Block Swap Override
2

R306
10K_0402_5%

*

GPIO87

DGPU_PRSNT#

2

DGPU_PRSNT#

DIS,Optimus
UMA

1

EC_LID_OUT#

1: Intel ME TLS with confidentiality

PCH_GPIO86

R219
10K_0402_5%
VGA@

2 10K_0402_5%

@

GPIO15 : TLS Confidentiality

+3VS

A

EC_KBRST#
27
SERIRQ
27,28

2 R145
49.9_0402_1%

C

1

+3VS

RP37 1
2
3
4

GPIO56
GPIO57
GPIO58
GPIO59
GPIO44
GPIO47
GPIO48
GPIO49
GPIO50
HSIOPC/GPIO71
GPIO13
GPIO14
GPIO25
GPIO45
GPIO46

AM3
AM2
P2
C4
PCH_GPIO70
L2
PCH_GPIO38
N5
PCH_GPIO39
V2
PCH_SPKR

PCH_SPKR

1

B

29

AG6
AP1
AL4
AT5
AK4
AB6
U4
Y3
P3
Y2
AT3
AH4
AM4
AG5
AG3

PCH_GPIO11
7
SUSWARN#
8
USB_OC3#
10

2

RP35 8
7
6
5

GPIO10_SCI#
PCH_GPIO11
SUSWARN#
USB_OC3#
10K_0804_8P4R_5%
1
PCH_GPIO8
2
USB_OC1#
3
PCH_GPIO13
4
PCH_GPIO26
10K_0804_8P4R_5%
8
PCH_GPIO45
7
PCH_GPIO14
6
PCH_GPIO44
5
PCH_GPIO46
10K_0804_8P4R_5%
8
PCH_GPIO79
7
PCH_GPIO47
6
PCH_GPIO24
5
PCH_GPIO28
10K_0804_8P4R_5%
8
PCH_GPIO58
7
PCH_GPIO59
6
PCH_GPIO27
5
PCH_GPIO25
10K_0804_8P4R_5%
8
USB_OC2#
7
PCH_GPIO60
6
USB_OC0#
5
PCH_GPIO9
10K_0804_8P4R_5%
2
PCH_GPIO73

2

8
7
6
5

BMBUSY/GPIO76
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
GPIO15
GPIO16
GPIO17
GPIO24
GPIO27
GPIO28
GPIO26

PCH_GPIO9
GPIO10_SCI#

+3VALW_PCH
RP34 1
2
3
4

HASWELL_MCP_E

U1J
PCH_GPIO19
PCH_GPIO36
PCH_GPIO78

1

RP24 1
2
3
4

8
PCH_GPIO51
7
PCH_GPIO83
6
PCH_GPIO55
5
SERIRQ
10K_0804_8P4R_5%
8
EC_IN_RW
7
PCH_GPIO69
6
PCH_GPIO4
5
PCH_GPIO7
10K_0804_8P4R_5%
8
PCH_GPIO5
7
PCH_GPIO1
6
PCH_GPIO94
5
PCH_GPIO93
10K_0804_8P4R_5%
8
PCH_GPIO2
7
PCH_GPIO91
6
PCH_GPIO90
5
PCH_GPIO38
10K_0804_8P4R_5%
8
PCH_GPIO19
7
PCH_GPIO36
6
PCH_GPIO78
5
EC_KBRST#
10K_0804_8P4R_5%
8
PCH_GPIO18
7
PCH_GPIO35
6
PCH_GPIO48
5
GPIO34_SCI#
10K_0804_8P4R_5%
8
PCH_GPIO71
7
PCH_GPIO49
6
PCH_GPIO16
5
PCH_GPIO37
10K_0804_8P4R_5%
1
PCH_GPIO67
2
PCH_GPIO65
3
PCH_GPIO6
4
PCH_GPIO64
10K_0804_8P4R_5%
1
PCH_GPIO84
2
PCH_GPIO0
3
PCH_GPIO3
4
PCH_GPIO89
10K_0804_8P4R_5%
1
PCH_GPIO17
2
PCH_GPIO23
3
PCH_GPIO76
4
PCH_GPIO50
10K_0804_8P4R_5%
2
PCH_GPIO70

2

RP23 1
2
3
4

0
1

GSPI0_MOSI / GPIO86 : Boot BIOS Strap

@

2 1K_0402_1%

SPKR / GPIO81 :

NO

PCH_SPKR

REBOOT

1: ENABLED (Have internal PU)

1: ENABLED

1: ENABLED

0: DISABLED

0: SPI ROM (Have internal PL)

0: DISABLED (Have internal PD)

*

*

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

A

2013/07/10

Title

HSW MCP(6/11) GPIO,LPIO

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

9

of

42

Rev
0.2

5

4

3

2

HASWELL_MCP_E

U1K

F10
E10
C23
C22
F8
E8
B23
A23

D

H10
G10
B21
C21
E6
F6
B22
A21

PCIE LAN

22
22

PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3

22
22

PCIE_PTX_C_DRX_N3
PCIE_PTX_C_DRX_P3
24
24

WLAN
24
24

C155
C160

1
1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
C156
C157

PCIE_PTX_C_DRX_N4
PCIE_PTX_C_DRX_P4

1
1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3

G11
F11

PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3

C29
B30

PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4

F13
G13

PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4

B29
A29
G17
F17

C

C30
C31
F15
G15
B31
A31

PERN5_L0
PERP5_L0

USB2N0
USB2P0

PETN5_L0
PETP5_L0

USB2N1
USB2P1

PERN5_L1
PERP5_L1

USB2N2
USB2P2

PETN5_L1
PETP5_L1

USB2N3
USB2P3

PERN5_L2
PERP5_L2

USB2N4
USB2P4

PETN5_L2
PETP5_L2

USB2N5
USB2P5

PERN5_L3
PERP5_L3

USB2N6
USB2P6

PETN5_L3
PETP5_L3

USB2N7
USB2P7

PERN3
PERP3
USB3.0 P1

PETN3
PETP3

USB

PCIe

USB3.0 P2

PETN4
PETP4

R232 1
R155 1

@

2 3.01K_0402_1%
2 0_0603_5%

Trace width=15 mils
Spacing=12mil
Max length=500mils

@ E15
@ E13
A27
B27

USB3RN1
USB3RP1
USB3TN1
USB3TP1

PERN4
PERP4

USB3RN2
USB3RP2
USB3TN2
USB3TP2

AN8
AM8

USB20_N0
USB20_P0

AR7
AT7

USB20_N1
USB20_P1

AR8
AP8

USB20_N2
USB20_P2

USB20_N0
USB20_P0

26
26

USB2 Port 0 (USB3.0 P0)

USB20_N1
USB20_P1

26
26

USB2 Port 1

USB20_N2
USB20_P2

26
26

USB2 Port 2

AR10
AT10

D

AM15
AL15

USB20_N4
USB20_P4

USB20_N4
USB20_P4

24
24

Mini Card(WLAN+BT)

USB20_N6
USB20_P6

18
18

Touch Module

USB20_N7
USB20_P7

18
18

Camera

AM13
AN13
AP11
AN11

USB20_N6
USB20_P6

AR13
AP13

USB20_N7
USB20_P7

G20
H20

PCH_USB3_RX0_N
PCH_USB3_RX0_P

C33
B34

PCH_USB3_TX0_N
PCH_USB3_TX0_P

26
26

USB3 Port 0

26
26

E18
F18
B33
A33

PERN1/USB3RN3
PERP1/USB3RP3

C

USB3.0 P3 / PCIE P1

PETN1/USB3TN3
PETP1/USB3TP3
PERN2/USB3RN4
PERP2/USB3RP4

USB3.0 P4 / PCIE P2

USBRBIAS
USBRBIAS
RSVD
RSVD

PETN2/USB3TN4
PETP2/USB3TP4
OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43

+1.05VS_AUSB3PLL
T33
T34
PCIE_RCOMP
PCIE_IREF

1

RSVD
RSVD
PCIE_RCOMP
PCIE_IREF

11 OF 19

AJ10
USBRBIAS
AJ11
AN10 @
T35
AM10@
T36

AL3
AT1
AH2
AV3

R154 1

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#

2 22.6_0402_1%

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#

CAD note:
Route single‐end 50‐ohms and max 450‐mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils
26,9
9
9
9

Rev1p2

HASWELL-MCP-E-ULT_BGA1168

B

B

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

HSW MCP(7/11) PCIE,USB

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

10

of

42

Rev
0.2

5

4

3

2

1

Shark Bay ULT have internal gate for VDDQ
+1.35V

+1.35V_CPU

T37
T38

+1.35V_CPU

@
@

L59
J58

@ J2

1

2

AH26
AJ31
AJ33
AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50

JUMP_43X118
Q5
@
AO4304L_SO8

8
7
6
5

D

1
2
3

4

+CPU_CORE

31

1

3VS_GATE

2

@

R182
0_0402_5%

1

2

+1.05VS_VTT
C5
0.1U_0603_25V7K
@

2
+VCCIOA_OUT

+3VS

39

U16

2

1

27,8

2

VCCST_PG_EC

3

C

NC

VCC

A
Y

R309
10K_0402_5%

5
4

VCCST_PG_EC_R

VR_SVID_CLK
39
39,8

1

+3VALW_PCH

R422
100K_0402_5%
@

VR_ON
VGATE

@
@

VCC_SENSE_R
T41

@

T42
T43
T44

@
@
@

R164

0_0402_5%

1

0_0402_5%
0_0402_5%

1
1

2 R165

@

2 R167
2 R168
@ C167
2 0.1U_0402_16V7K

VCCST_PWRGD

T45
T46
T47
T48
T98
T109
T110
T111
T112
T113
T114
T115
T117

27,38

GND

+1.05VS_VTT

1

@
@
@
@
@
@
@
@
@
@
@
@
@

+1.05VS_VTT

Place the PU
resistors close to CPU

AC22
AE22
AE23

+CPU_CORE

2

R171
75_0402_1%

H_CPU_SVIDALRT#

AB57
AD57
AG57
C24
C28
C32

XDP@
R169
150_0402_1%

1

2

D63
H59
P62
P60
P61
N59
N61
T59
AD60
AD59
AA59
AE60
AC59
AG58
U59
V59

CPU_PWR_DEBUG

+1.05VS_VTT

VR_ALERT#

L62
N63
L63
B59
F60
C59

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
VIDSOUT
VCCST_PG_EC_R
PCH_VR_EN
VR_READY

SVID ALERT

39

E63
AB23
A59
E20
AD23
AA23
AE59

0_1206_5%

74AUP1G07GW_TSSOP5

R172
43_0402_1%
2
1

F59
N58
AC58

1

@

1
R166
0_0402_5%
1
2
@

2

1

+1.05VS_VTT

T39
T40

+VCCIO_OUT

CPU_PWR_DEBUG

+CPU_CORE

HASWELL_MCP_E

U1L

RSVD
RSVD

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VCC
RSVD
RSVD
VCC_SENSE
RSVD
VCCIO_OUT
VCCIOA_OUT
RSVD
RSVD
RSVD
VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY

HSW ULT POWER

VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCST
VCCST
VCCST
VCC
VCC
VCC
VCC
VCC
VCC

C36
C40
C44
C48
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57

D

C

Rev1p2

12 OF 19
HASWELL-MCP-E-ULT_BGA1168

SVID DATA
+1.35V_CPU

+1.05VS_VTT

1

B

2

2

2

2

1

2

1

2

C17
10U_0603_6.3V6M

1

C16
10U_0603_6.3V6M

EMC@
1

C15
10U_0603_6.3V6M

2

EMC@
1

C14
10U_0603_6.3V6M

2

1

C13
10U_0603_6.3V6M

2

1

C12
10U_0603_6.3V6M

+1.05VS_VTT

2

1

C11
2.2U_0402_6.3V6M

2

1

C10
2.2U_0402_6.3V6M

VR_SVID_DATA

VIDSOUT

1

C9
2.2U_0402_6.3V6M

39

@

C8
2.2U_0402_6.3V6M

R173
130_0402_1%
R174
0_0402_5%
2
1
@

B

VDDQ DECOUPLING

Place the PU
resistors close to CPU

1
+

C18
330U_2.5V_M

2

330UF/2.5V/3528

2

VCC_SENSE_R

@

Note: 0 ohm PLACED CLOSE TO CPU

A

1 R178
0_0402_5%

VCC_SENSE

39

2

@

1 R235
0_0402_5%

VSS_SENSE

39

2

1
EMC@

2

+1.35V : 470UF/2V/7343 *2
10UF/6.3V/0603 * 6
2.2UF/6.3V/0402 * 4
A

1

VSS_SENSE_R

@

R233
100_0402_1%

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

2

13

2

1

C7
10U_0603_6.3V6M

R177
100_0402_1%

C6
22U_0805_6.3V6M

1

+CPU_CORE

Deciphered Date

2013/07/10

Title

HSW MCP(8/11) Power

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

11

of

42

Rev
0.2

4

+

2

Near PJ602

D

1

2

1

2

1
+1.05VS_AUSB3PLL
+1.05VS_ASATA3PLL

C31
1U_0402_6.3V6K
2
EMC@

T99
+1.05VS_APLLOPI

Near L10 Near M9

@ Y20
AA21
W21

+3VALW_PCH

VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL

C30
mPHY

VCCSUS3_3
VCCRTC
DCPRTC

RTC

SPI

RSVD
VCCAPLL
VCCAPLL

VCCSPI

OPI

VCCASW
VCCASW
+1.05VS_VTT

HDA --> 3.3V or 1.5V
I2C --> 1.8V

+1.05VS_AUSB3PLL

C42
1
2
L1
C32
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%

1
1

Near B18

2 1U_0402_6.3V6K
2 100U_1206_6.3V6M

2

T116

1
1

Near B11

2 1U_0402_6.3V6K
2 100U_1206_6.3V6M

Near AC9

2

Near AH10

2

Near V8

2

1
1

2 1U_0402_6.3V6K
2 100U_1206_6.3V6M

AH14
@ AH13

+3VALW_PCH
C28
1 22U_0805_6.3V6M
AC9
AA9
C59 EMC@
1 0.1U_0402_16V7K
AH10
V8
C29
1 22U_0805_6.3V6M
W9

+1.05VS_AXCK_DCB

Near J17

+1.05VS_AXCK_DCB

1
1

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1

AXALIA/HDA

VCCHDA
DCPSUS2

2

Near R21

Near J18

2

2 1U_0402_6.3V6K
2 100U_1206_6.3V6M

C57
1 1U_0402_6.3V6K
C56
1 1U_0402_6.3V6K

T100
T101
T102

+3VALW_PCH

J18
K19
A20
J17
R21
T21
@ K18
@ M20
@ V21
AE20
AE21

VRM/USB2/AZALIA
CORE

VCCSUS3_3
VCCSUS3_3
VCCDSW3_3
VCC3_3
VCC3_3

VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3

2 1U_0402_6.3V6K

AH11
AG10
AE7 +VCCRTCEXT 1
C54
+3VS
Y8

C58

2

GPIO/LCC

SDIO/PLSS

VCCTS1_5
VCC3_3
VCC3_3

VCCSDIO
VCCSDIO

+RTCVCC
0.1U_0402_16V7K

2
@

1 0.1U_0402_16V7K

AG14
AG13

1

2

@

1

2

@

1

2
D

+1.05VS_VTT
+1.05VS_VTT

USB3

DCPSUS3

THERMAL SENSOR

+1.05VS_AXCK_LCPLL

C

C48
1
2
L4
C23
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%

J13

Near AA21

+1.05VS_VTT
+1.05VS_VTT

@

+3VS

+1.05VS_APLLOPI

C47
1
2
L3
C22
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%

T105

1 C38
1U_0402_6.3V6K

+1.05VS_ASATA3PLL

C46
1
2
L2
C61
2.2UH_LQM2MPN2R2NG0L_30%

+3VALW_PCH

+RTCVCC

1

0.1U_0402_16V7K
C50

C998
220U_6.3V_M

C20
1U_0402_6.3V6K

1

1

HASWELL_MCP_E

U1M

K9
L10
M9
N8
P9
B18
B11

2

0.1U_0402_16V7K
C51

+1.05VS_VTT

C21
1U_0402_6.3V6K

+1.05VS_VTT

3

1U_0402_6.3V6K
C52

5

J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
J15
K14
K16

U8
T9

C27 1
C33 1
C40 1
EMC@

2 10U_0603_6.3V6M
2 1U_0402_6.3V6K
2 10U_0603_6.3V6M

+PCH_VCCDSW1
R209
C36 1
C37 1
C43 @1

C55

1

@

C41
1U_0402_6.3V6K
2 +PCH_VCCDSW_R 1
2
0_0402_5%

2 22U_0805_6.3V6M
2 1U_0402_6.3V6K
2 1U_0402_6.3V6K

2 0.1U_0402_16V7K

C44 1

2

1U_0402_6.3V6K

+1.05VS_VTT

+1.5VS
+3VS

+3VS
C

LPT LP POWER
SUS OSCILLATOR

USB2

DCPSUS4
RSVD
VCC1_05
VCC1_05

AB8
AC20
AG16
AG17

C53 @1
C25 @1
@

2 1U_0402_6.3V6K
2 100U_1206_6.3V6M
T103

+1.05VS_VTT
C45 1

2

1U_0402_6.3V6K

+1.05VS_AXCK_LCPLL

1
2
L5
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%

C999 1
C49 1
C24 1

2 1U_0402_6.3V6K
2 1U_0402_6.3V6K
2 100U_1206_6.3V6M

13 OF 19

reserve on PVT

Rev1p2

HASWELL-MCP-E-ULT_BGA1168

Near A20

B

B

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

HSW MCP(9/11) Power

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

12

of

42

Rev
0.2

5

U1N
D

C

B

A11
A14
A18
A24
A28
A32
A36
A40
A44
A48
A52
A56
AA1
AA58
AB10
AB20
AB22
AB7
AC61
AD21
AD3
AD63
AE10
AE5
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG1
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29

4

3

HASWELL_MCP_E

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

U1O

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

14 OF 19
HASWELL-MCP-E-ULT_BGA1168

AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20

AP22
AP23
AP26
AP29
AP3
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49
AR5
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63
AU1
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2

HASWELL_MCP_E

U1P

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
15 OF 19 Rev1p2 VSS
HASWELL-MCP-E-ULT_BGA1168

AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31

D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49
D5
D50
D51
D53
D54
D55
D57
D59
D62
D8
E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61
G18
G22
G3
G5
G6
G8
H13

1

HASWELL_MCP_E

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS_SENSE
16 OF 19 Rev1p2 VSS
HASWELL-MCP-E-ULT_BGA1168

H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63

D

C

V58
AH46
V23
E62
AH16

VSS_SENSE_R

11

B

Rev1p2

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

HSW MCP(10/11) GND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

13

of

42

Rev
0.2

5

4

U1Q

AY2
DC_TEST_AY2_AW2
AY3
DC_TEST_AY3_AW3
AY60
@
DC_TEST_AY61_AW61 AY61
DC_TEST_AY62_AW62 AY62
B2
@
B3
DC_TEST_A3_B3
B61
DC_TEST_A61_B61
B62
DC_TEST_B62_B63
B63
C1
DC_TEST_C1_C2
C2

T49
T50

D

3

2

HASWELL_MCP_E

DAISY_CHAIN_NCTF_AY2
DAISY_CHAIN_NCTF_AY3
DAISY_CHAIN_NCTF_AY60
DAISY_CHAIN_NCTF_AY61
DAISY_CHAIN_NCTF_AY62
DAISY_CHAIN_NCTF_B2
DAISY_CHAIN_NCTF_B3
DAISY_CHAIN_NCTF_B61
DAISY_CHAIN_NCTF_B62
DAISY_CHAIN_NCTF_B63
DAISY_CHAIN_NCTF_C1
DAISY_CHAIN_NCTF_C2

1

HASWELL_MCP_E

U1R

DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4
DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62
DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3
DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
17 OF 19 Rev1p2

A3
A4
A60
A61
A62
AV1
AW1
AW2
AW3
AW61
AW62
AW63

DC_TEST_A3_B3
@
@
DC_TEST_A61_B61
@
@
@
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
@

T58
T59
T60
T61
T62

T51
T52
T53
T54

@
@
@
@

AT2
AU44
AV44
D15

T55
T56
T57

@
@
@

F22
H22
J21

RSVD
RSVD
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD

RSVD
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

T63

N23
R23
T23
U10

@
@
@
@

T64
T65
T66
T67

AL1
AM11
AP7
AU10
AU15
AW14
AY14

@
@
@
@
@
@
@

T68
T69
T70
T71
T72
T73
T74

D

HASWELL-MCP-E-ULT_BGA1168
Rev1p2

18 OF 19
HASWELL-MCP-E-ULT_BGA1168

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

AC60
AC62
AC63
AA63
AA60
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60

T176
T175
T174
T173

@
@
@
@

CFG16
CFG18
CFG17
CFG19

AA62
U63
AA61
U62
V63

CFG_RCOMP
T90

@

A5

T91
T92
T93
T94
TD_IREF

@
@
@
@

E1
D1
J20
H18
B12

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD_TP
RSVD_TP
RSVD_TP

RESERVED

RSVD
RSVD
RSVD
PROC_OPI_RCOMP

CFG16
CFG18
CFG17
CFG19

RSVD
RSVD

CFG_RCOMP

VSS
VSS

RSVD
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD
TD_IREF

AV63
AU63

@
@

T75
T76

C63
C62
B43

@
@
@

T77
T78
T79

A51
B51

@
@

T80
T81

L60

@

T82

N60

@

T83

W23
Y22
AY15

@
@

T84
T85
OPI_COMP

AV62
D58

@
@

T86
T87

@
@

T88
T89

CFG Straps for Processor
C

CFG3

1

@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@

R224
1K_0402_1%
@

2

C

T104
T107
T108
T166
T167
T168
T169
T170
T171
T172
T182
T181
T180
T179
T178
T177

HASWELL_MCP_E

Physical Debug Enable

P22
N21
P20
R20

(DFX Privacy)

1: DISABLED

CFG3

0: ENABLED; SET DFX ENABLED BIT
IN DEBUG INTERFACE MSR
CFG4

1

U1S

Rev1p2

19 OF 19

R225
1K_0402_1%

HASWELL-MCP-E-ULT_BGA1168

B

2

B

2

1
CFG_RCOMP
49.9_0402_1%
1
OPI_COMP
49.9_0402_1%
1
TD_IREF
8.2K_0402_5%

R222

2
R223

2
R226

Display Port Presence Strap

1 : Disabled; No Physical Display Port
attached to Embedded Display Port

CFG4

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

HSW MCP(11/11) RSVD

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

14

of

42

Rev
0.2

A

B

C

D

E

+1.35V
+1.35V

DDR_A_D44
DDR_A_D41
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D43
DDR_A_D47

+1.35V

All VREF traces should
have 10 mil trace width

Layout Note:
Place near JDIMM1

DDR_A_D51
DDR_A_D50

DDR_A_D49
DDR_A_D48

2

@

1

2

1

2

C110
1U_0402_6.3V6K

1

C109
1U_0402_6.3V6K

2

C108
1U_0402_6.3V6K

1

C107
1U_0402_6.3V6K

@

5

DDRA_CKE0_DIMMA

DDRA_CKE0_DIMMA
5

DDR_A_BS2

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9
2

+1.35V

2

1

2

DDR_A_MA3
DDR_A_MA1

C114
10U_0603_6.3V6M

2

1

C113
10U_0603_6.3V6M

1

C112
10U_0603_6.3V6M

2

C111
10U_0603_6.3V6M

1

DDR_A_MA8
DDR_A_MA5

5
5

5

+1.35V
EMC@

DDR_A_BS0

5
5

DDR_A_WE#
DDR_A_CAS#

DDR_A_WE#
DDR_A_CAS#

DDRA_CS1_DIMMA#

DDR_A_MA13
DDRA_CS1_DIMMA#

2

1
+
@

DDR_A_DQS#0
DDR_A_DQS0

C118
330U_2.5V_M

DDR_A_D2
DDR_A_D6

2

DDR_A_D21
DDR_A_D20

SF000002Z00
330U 2.5V H4.2
17mohm OSCON

3

DDR_A_D17
DDR_A_D16

+0.675VS

DDR_A_D36
DDR_A_D33

2

1

2

1

2

C124
1U_0402_6.3V6K

1

C123
1U_0402_6.3V6K

2

@

C122
1U_0402_6.3V6K

1

C121
1U_0402_6.3V6K

@

DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D38
DDR_A_D62
DDR_A_D58

DDR_A_D60
DDR_A_D61

Layout Note:
Place near JDIMM1.203,204
+3VS

2
@

1

@

1

2

205
R212
0_0402_5%

1

R211
0_0402_5%

4

@

C126
2.2U_0402_6.3V6M

2

C125
0.1U_0402_16V7K

1

2

+0.675VS

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

G1

G2

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

+5VALW

16,4

2

2

R186
R191
100K_0402_5% 100K_0402_5%

1

1
Y

4

+1.35V

74AUP1G07GW_TSSOP5

DDR_A_D45
DDR_A_D40

LBSS138LT1G_SOT-23-3
D Q18
S

DDR_VTT_PG_CTRL
DDR_A_DQS#[0..7]

DDR_A_D[0..63]

DDR_A_D52
DDR_A_D53

2

SA_ODT1

R189 1
66.5_0402_1%

2

SB_ODT0

M_A_B_DIMM_ODT

R190 1
66.5_0402_1%

2

SB_ODT1

SB_ODT0

16

SB_ODT1

16

1

36

5

DDR_A_DQS[0..7]

DDR_A_D42
DDR_A_D46

R188 1
66.5_0402_1%

2
G

GND

DDR_A_D27
DDR_A_D26

SA_ODT0

5
1

DIMM_DRAMRST#

VCC

A

3

2

@

NC

2

DDR_PG_CTRL

R187 1
66.5_0402_1%

2

3

4
DIMM_DRAMRST#

+5VS

1

U45

1

DDR_A_D25
DDR_A_D24

5
5

DDR_A_MA[0..15]

5

DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D54
DDR_A_D55

DDRA_CKE1_DIMMA

DDRA_CKE1_DIMMA

5

DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
2

DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
SA_CLK_DDR1
SA_CLK_DDR#1

SA_CLK_DDR1
SA_CLK_DDR#1

DDR_A_BS1
DDR_A_RAS#

DDR_A_BS1
DDR_A_RAS#

DDRA_CS0_DIMMA#
SA_ODT0

DDRA_CS0_DIMMA#

5
5
5

+1.35V

5
5

R56
1.8K_0402_1%

SA_ODT1
+VREF_CA
DDR_A_D5
DDR_A_D4
@
DDR_A_D3
DDR_A_D7
DDR_A_D18
DDR_A_D19

1

2

1

2

C120
0.1U_0402_16V7K

1

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

DDR_A_D15
DDR_A_D11

C119
2.2U_0402_6.3V6M

2

5

DDR_A_MA10
DDR_A_BS0

DDR_A_D0
DDR_A_D1

C164
10U_0603_6.3V6M

2

1

SA_CLK_DDR0
SA_CLK_DDR#0

EMC@

C117
10U_0603_6.3V6M

1

C116
10U_0603_6.3V6M

2

C115
10U_0603_6.3V6M

1

SA_CLK_DDR0
SA_CLK_DDR#0

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

@

DDR_A_DQS#1
DDR_A_DQS1

R296
1
2
2_0402_1%

SM_DIMM_VREFCA
@

R295
1.8K_0402_1%

16,5

1

2

C162
0.022U_0402_25V7K

1

DDR_A_D30
DDR_A_D31

DDR_A_D9
DDR_A_D12

@

R294
24.9_0402_1%

2

DDR_A_DQS#3
DDR_A_DQS3

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

1

DDR_A_D29
DDR_A_D28

2

2

DDR_A_D14
DDR_A_D10

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

2

2

R176 @
24.9_0402_1%

1

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

1

2

1
1

1

C106
0.1U_0402_16V7K

@
R185
1.8K_0402_1%

2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

2

1
2
1

1
@
C158
0.022U_0402_25V7K

DDR_A_D13
DDR_A_D8

C34
0.1U_0402_16V7K

SA_DIMM_VREFDQ

+1.35V

JDIMM1
+V_DDR_REFA
R54
1.8K_0402_1%
C105
2.2U_0402_6.3V6M

5

R293
2_0402_1%
1
2

+1.35V

DDR_A_DQS#2
DDR_A_DQS2

3

DDR_A_D22
DDR_A_D23

1

DDR_A_D37
DDR_A_D32

R302
2
@

+VREF_CB

16

0_0402_5%

DDR_A_D35
DDR_A_D39
DDR_A_D63
DDR_A_D59
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D56
DDR_A_D57
D_CK_SDATA
D_CK_SCLK

D_CK_SDATA
D_CK_SCLK

16,7
16,7

+0.675VS

206

TYCO_2-2013022-1
CONN@

Channel A

SP07000JN10
4



DIMM_1 STD H:4mm
Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Deciphered Date

2013/07/10

Title

DDRIII DIMMA

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Sheet

Monday, April 08, 2013
E

15

of

42

Rev
0.2

A

B

C

D

E

+1.35V

2

2

DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3

2

R179 @
24.9_0402_1%

DDR_B_D10
DDR_B_D11

DDR_B_D26
DDR_B_D27
DDR_B_D40
DDR_B_D41
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D42

+1.35V

All VREF traces should
have 10 mil trace width

Layout Note:
Place near JDIMM1

DDR_B_D56
DDR_B_D57

DDR_B_D59
DDR_B_D58

2

@

1

2

1

2

C132
1U_0402_6.3V6K

1

C131
1U_0402_6.3V6K

2

C130
1U_0402_6.3V6K

1

C129
1U_0402_6.3V6K

@

5

DDRB_CKE0_DIMMB

DDRB_CKE0_DIMMB
5

DDR_B_BS2

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9
2

+1.35V

2

1

2

DDR_B_MA3
DDR_B_MA1

C136
10U_0603_6.3V6M

2

1

C135
10U_0603_6.3V6M

1

C134
10U_0603_6.3V6M

2

C133
10U_0603_6.3V6M

1

DDR_B_MA8
DDR_B_MA5

5
5

5

+1.35V

5

DDR_B_BS0

DDR_B_MA10
DDR_B_BS0

5
5

DDR_B_WE#
DDR_B_CAS#

DDR_B_WE#
DDR_B_CAS#

DDRB_CS1_DIMMB#

DDR_B_MA13
DDRB_CS1_DIMMB#

DDR_B_D4
DDR_B_D1

DDR_B_D3
DDR_B_D7
DDR_B_D21
DDR_B_D20

3

DDR_B_D22
DDR_B_D23

+0.675VS

DDR_B_D36
DDR_B_D33

2

@

1

2

DDR_B_D35
DDR_B_D39
DDR_B_D52
DDR_B_D49

+3VS

2

2

1

C146
1U_0402_6.3V6K

1

C145
1U_0402_6.3V6K

@

C144
1U_0402_6.3V6K

2

C143
1U_0402_6.3V6K

1

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D48
DDR_B_D53

1

Layout Note:
Place near JDIMM1.203,204

R229
10K_0402_5%

+3VS
+0.675VS

2

205

2
@

1

1

R231
0_0402_5%

4

@

C148
2.2U_0402_6.3V6M

2

C147
0.1U_0402_16V7K

1

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

G1

G2

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

5

DDR_B_DQS[0..7]
DDR_B_D[0..63]

DDR_B_DQS#1
DDR_B_DQS1

5
5

DDR_B_MA[0..15]

5

DDR_B_D13
DDR_B_D15
DDR_B_D25
DDR_B_D24
1

DIMM_DRAMRST#

DIMM_DRAMRST#

15,4

DDR_B_D30
DDR_B_D31
DDR_B_D45
DDR_B_D44

DDR_B_D47
DDR_B_D43
DDR_B_D61
DDR_B_D60
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D63
DDR_B_D62

DDRB_CKE1_DIMMB

DDRB_CKE1_DIMMB

5

DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
2

DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
SB_CLK_DDR1
SB_CLK_DDR#1

SB_CLK_DDR1
SB_CLK_DDR#1

DDR_B_BS1
DDR_B_RAS#

DDR_B_BS1
DDR_B_RAS#

DDRB_CS0_DIMMB#
SB_ODT0

DDRB_CS0_DIMMB#
SB_ODT0
15

SB_ODT1

SB_ODT1

5
5
5

+1.35V

5
5

15

+VREF_CB
DDR_B_D5
DDR_B_D0
@
DDR_B_D2
DDR_B_D6
DDR_B_D16
DDR_B_D17

1

2

1

2

C142
0.1U_0402_16V7K

DDR_B_DQS#0
DDR_B_DQS0

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

DDR_B_DQS#[0..7]
DDR_B_D12
DDR_B_D9

C141
2.2U_0402_6.3V6M

2

1
@
2

SB_CLK_DDR0
SB_CLK_DDR#0

C139
10U_0603_6.3V6M

1

C138
10U_0603_6.3V6M

2

C137
10U_0603_6.3V6M

1

SB_CLK_DDR0
SB_CLK_DDR#0

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

@
R58
1.8K_0402_1%
R300
0_0402_5%
1
2
@
@
R298
1.8K_0402_1%

SM_DIMM_VREFCA

1

2

15,5

@
C163
0.022U_0402_25V7K

1

2

1
1

1

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

1

R213
1.8K_0402_1%

2

1

C128
0.1U_0402_16V7K

@

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

2

2
1

1
@
C159
0.022U_0402_25V7K

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

1

SB_DIMM_VREFDQ

R297
2_0402_1%
2

DDR_B_D8
DDR_B_D14

2

1

JDIMM2
+V_DDR_REFB
R57
1.8K_0402_1%
C127
2.2U_0402_6.3V6M

5

1

+1.35V

@
R299
24.9_0402_1%

2

+1.35V

DDR_B_DQS#2
DDR_B_DQS2

3

+VREF_CB

DDR_B_D19
DDR_B_D18

15

DDR_B_D37
DDR_B_D32

DDR_B_D34
DDR_B_D38
DDR_B_D51
DDR_B_D55
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D54
DDR_B_D50
D_CK_SDATA
D_CK_SCLK

D_CK_SDATA
D_CK_SCLK

15,7
15,7

+0.675VS

206

TYCO_2-2013022-1
CONN@

Channel B

SP07000JN10
4



DIMM_2 STD H:4mm
Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Deciphered Date

2013/07/10

Title

DDRIII DIMMB

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9531P Schematic

Date:

A

B

C

D

Monday, April 08, 2013

Sheet
E

16

of

42

Rev
0.2

5

4

3

2

1

+3VS_TL
+3VS_TL

2
R928

U50 TL@

1
TL@

0_0603_5%

+1.2V_TL

D

60mil

40mil 3
60mil13
18

60mil12

11
27
7

+1.2V_TL

60mil

DP_V33

TXEC+
TXEC-

SWR_VDD
PVCC

TXE2+
TXE2-

SWR_LX
SWR_VCCK
VCCK
DP_V12

Close to Pin3

2

1

18
18

EDP_TXP0_C_TL
EDP_TXN0_C_TL

1

EDP_HPD

2

Close to P18

2

TXOUT_CLK+
TXOUT_CLK-

21
22

TXOUT2+
TXOUT2-

TXOUT2+
TXOUT2-

18
18

23
24

TXOUT1+
TXOUT1-

TXOUT1+
TXOUT1-

18
18

25
26

TXOUT0+
TXOUT0-

TXOUT0+
TXOUT0-

18
18

LANE0P
LANE0N

GPIO(PWM OUT)
GPIO(Panel_VCC)
GPIO(PWM IN)
GPIO(BL_EN)

14
15
16
17

TL_INVTPWM

1

2

8
4

TL@
R938
12K_0402_1%

CIICSCL1
CIICSDA1
HPD

LVDS
EDID
ROM

DP_REXT
DP_GND

MIICSCL1
MIICDA1

1 TL@
R9321 TL@
R9481 TL@
R934

MIICSCL0
MIICSDA0
GND

29
28

I2CC_SCL
I2CC_SDA

31
30

MODE_CFG1
MODE_CFG0

18
18

D

2
20_0402_5%
20_0402_5%
0_0402_5%

INVTPWM
18
TL_ENVDD
18
PCH_INV_PWM
18,8
TL_BKOFF#
18

I2CC_SCL
I2CC_SDA

18
18

C

33

RTD2132R-CG_QFN32_5X5
Part Number = SA000069200
I2CC_SDA
I2CC_SCL
CSCL
CSDA

use 2132S symbol

1

+3VS_TL

TL@
RP41

1

C988
TL@
0.1U_0402_16V4Z

C987
TL@
0.1U_0402_16V4Z

C986
TL@
22U_0805_6.3V6M

C985
TL@
0.1U_0402_16V4Z

C984
TL@
10U_0603_6.3V6M

2

1

32

TL_HPD

R936
1K_0402_5%
TL@

SWR_VDD

2

AUX_P
AUX_N

Other

Close to Pin13

1

9
10

CSCL
CSDA

18

1

TXOUT_CLK+
TXOUT_CLK-

2

C

Close to L64

5
6

2

1

TXE0+
TXE0-

DP-IN

2

C983
TL@
0.1U_0402_16V4Z

C982
TL@
0.1U_0402_16V4Z

C981
TL@
10U_0603_6.3V6M

1

2
1

EDP_AUXP_C_TL
EDP_AUXN_C_TL

TXE1+
TXE1-

19
20

RTD2132S

DP_V33
18
18

Power

TL@
1 DP_V33
L63 2
HCB2012KF-221T30 0805
TL@
1 SWR_VDD
L64 2
HCB2012KF-221T30 0805
2 +1.2V_TL_OUT
TL@ L6 1
4.7UH_PG031B-4R7MS_1.1A_20%

30mil

LVDS

30mil

GPIO

+3VS

2

1
2
3
4

8
7
6
5

4.7K_8P4R_5%

+3VS_TL

1
2

2

1

1

2

1

R944
4.7K_0402_5%
TL@
1

1

C992
TL@
0.1U_0402_16V4Z

C991
TL@
0.1U_0402_16V4Z

2

C990
TL@
0.1U_0402_16V4Z

C989
TL@
10U_0603_6.3V6M

1

2

@
R943
4.7K_0402_5%

+1.2V_TL
B

2

Close to
Pin7

2

Close to
Pin27

1

Close to
L6

B

MODE_CFG0
MODE_CFG1

2

R945
4.7K_0402_5%
TL@

@
R946
4.7K_0402_5%

MODE_CFG0(PIN30)
0
1
X
EP MODE
0
MODE_CFG1(PIN31)
1 ROM ONLY MODE EEPROM MODE

A

Compal Secret Data

Security Classification
Issued Date

A

2011/07/08

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

LVDS Translator - RTD2132R
Document Number

Rev
0.2

V5WE2 M/B LA-9532P Schematic
Monday, April 08, 2013

Sheet
1

17

of

42

A

B

C

D

E

LCD POWER CIRCUIT

Place closed to JLVDS1
+LCDVDD
+3VS

+3VS

+LCDVDD
U8
OUT

5

IN

1

2

1

2
C367 2
4.7U_0603_6.3V6K

3

+INVPWR_B+

2

XEMC@ 1
C364
1000P_0402_50V7K
2

+3VS
U20
@
M74VHC1GT125DF2G_SC70-5
2
1
5
Vcc
100K_0402_5% OE

1
@
R363
1
R404 @

PCH_INV_PWM
EDP_DISP_UTIL

1

INVTPWM

2
0_0402_5%
2
0_0402_5%

2

TL_BKOFF#

1

R393
@ 10K_0402_5%

Y
A

4

DISPOFF#

XEMC@
C549 1
XEMC@
C528 1

eDP
4
4

4
4

C374 1
C373 1

EDP_TXN1
EDP_TXP1

EDP_TXN0
EDP_TXP0

2 220P_0402_50V7K

W=60mils

2 220P_0402_50V7K

+LCDVDD

@

2 0_0402_5%

R280 1

@

2 10K_0402_5%

+3VS

17
17

2 100K_0402_5%

3

4
4

EDP_AUXN
EDP_AUXP

17
17

2 0.1U_0402_16V7K EDP_TXN1_C
2 0.1U_0402_16V7K EDP_TXP1_C

I2CC_SCL
I2CC_SDA
17
17

TXOUT0TXOUT0+

17
17

TXOUT1TXOUT1+

17
17

TXOUT2TXOUT2+

TXOUT_CLKTXOUT_CLK+

INVTPWM
DISPOFF#

I2CC_SCL
I2CC_SDA
+5VS_TS

TXOUT0TXOUT0+

TS_EN_1
TXOUT1TXOUT1+
TS_EN_2
TXOUT2TXOUT2+
TXOUT_CLKTXOUT_CLK+
EDP_TXN0_C
EDP_TXP0_C
EDP_TXN1_C
EDP_TXP1_C

EDP@
C372 1
C371 1
EDP@

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

EDP_TXN0_C
EDP_TXP0_C

TL@
C389 1
C388 1
TL@

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

EDP_TXN0_C_TL
EDP_TXP0_C_TL

+5VS

EDP_TXN0_C_TL
EDP_TXP0_C_TL

+5VS_TS

EDP_AUXN_C
EDP_AUXP_C

R81
0_0603_5%
1
TS@ 2

17
17

Touch Module
For Camera

TL@
C369 1
C370 1
TL@

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

EDP@
C377 1
C376 1
EDP@

2 0.1U_0402_16V7K EDP_AUXN_C R613 2
2 0.1U_0402_16V7K EDP_AUXP_C R614 2

EDP_AUXN_C_TL
EDP_AUXP_C_TL

EDP_AUXN_C_TL
EDP_AUXP_C_TL

17
17
+3VS

10
10
10
10

USB20_P6
USB20_N6
USB20_P7
USB20_N7

EDP_HPD
USB20_P6
USB20_N6
USB20_P7
USB20_N7

+3VS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

G1
G2
G3
G4
G5
G6

41
42
43
44
45
46

2

3

ACES_50203-04001-001
27

TS_EN

1 100K_0402_1%
1 100K_0402_1%

@
@

1

JLVDS1

+INVPWR_B+

U22 TL@
NC7SZ08P5X_NL_SC70-5

R949 1

R951 1 TL@

0.1U_0402_16V4Z

@
1 R959
2
100K_0402_5%

2

INVTPWM

B

2

C419

W=60mils
INVTPWM

3

4

BKOFF#

1

LCD/ LED PANEL Conn.

SM010014520 3000ma
220ohm@100mhz
DCR 0.04

+3VS

R401
27
BKOFF#
1K_0402_5%
@
17
TL_BKOFF#

GND OUT Y

0.1U_0402_16V4Z

+3VS

IN A

3

2

2

@

1 XEMC@
C365
68P_0402_50V8J

5

TL_ENVDD

2
0_0402_5%

@

P

17

1
R947

G

PCH_ENVDD

@

W=60mils

EMC@ L11
HCB2012KF-221T30 0805
2
1
8

C375

B+

W=60mils

1

C140
1U_0402_6.3V6K

EN

2

C368
0.1U_0402_16V4Z
@

G5243T11U_SOT23-5

2

17

1

1

IN

1

2

4

GND

4

1
R362

17,8

W=60mils

1

R414 1
R424 1

TS@ 2 0_0402_5%
2 0_0402_5%
@

TS_EN_1

R425 1
R426 1

2 0_0402_5%
@
TS@ 2 0_0402_5%

TS_EN_2

SP010014B00
CONN@

TS_INT_1 for TS one chip solution
TS_INT_2 for TS two chip solution

+3VS
1

+5VS

2

G

2

R383
10K_0402_5%
@
CPU_EDP_HPD

3

EDP_HPD

EDP_HPD

17

4

1

D

1
@
R406
0_0402_5%

2
R364
100K_0402_5%

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2

8

S

4

Q13
L2N7002LT1G_SOT23-3
@
1

2012/07/10

Deciphered Date

2013/07/10

Title

eDP Connector

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Monday, April 08, 2013

Sheet
E

18

of

42

Rev
0.2

A

B

C

D

E

W=40mils
1

+HDMI_5V_OUT

R367
0_0603_5%
1
2
@

1

OUT
1

3
EMC@

IN
GND

2

AP2330W-7_SC59-3

1

2

C378
0.1U_0402_16V4Z

2

C396
0.1U_0402_16V4Z

EMC@

CPU_DP2_N1
CPU_DP2_P1
CPU_DP2_N0
CPU_DP2_P0

C381
C382
C379
C380

2
2
2
2

1
1
1
1

0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K

HDMI_TX1HDMI_TX1+
HDMI_TX2HDMI_TX2+

4
3
2
1

4
4
4
4

CPU_DP2_N2
CPU_DP2_P2
CPU_DP2_N3
CPU_DP2_P3

C383
C384
C385
C386

2
2
2
2

1
1
1
1

0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K

HDMI_TX0HDMI_TX0+
HDMI_CLKHDMI_CLK+

4
3
2
1

HDMI_GND

U52

4
4
4
4

SM070001310 400ma 90ohm@100mhz DCR 0.3

RP17
680_8P4R_5%
5
6
7
8
5
6
7
8
680_8P4R_5%
RP18

3

+5VS

5

+3VS

4

Q14B
DMN66D0LDW-7_SOT363-6

HDMI_CLK-

R368 2

@

1 0_0402_5%

HDMI_R_CK-

HDMI_CLK+

R369 2

@

1 0_0402_5%

HDMI_R_CK+

HDMI_TX0-

R370 2

@

1 0_0402_5%

HDMI_R_D0-

HDMI_TX0+

R371 2

@

1 0_0402_5%

HDMI_R_D0+

HDMI_TX1-

R372 2

@

1 0_0402_5%

HDMI_R_D1-

HDMI_TX1+

R373 2

@

1 0_0402_5%

HDMI_R_D1+

HDMI_TX2-

R374 2

@

1 0_0402_5%

HDMI_R_D2-

HDMI_TX2+

R375 2

@

1 0_0402_5%

HDMI_R_D2+

1

1

+3VS
+3VS

R376
1M_0402_5%

2

2

2

2

1

CPU_HDMI_HPD

6

HDMI_HPD
1

8

Q14A
DMN66D0LDW-7_SOT363-6

1

2

EMC@
C387
220P_0402_50V7K

2

R121
100K_0402_5%

1
2
3
4

+HDMI_5V_OUT
+3VS

RP15
2.2K_0804_8P4R_5%
8
HDMI_SCLK
7
HDMI_SDATA
6 DDI2_CTRL_CK
5 DDI2_CTRL_DATA

HDMI connector

3

3

JHDMI1
25

HDMI_HPD

HDMI_HPD
+HDMI_5V_OUT

3

+3VS

2

HDMI_SDATA
HDMI_SCLK

2

HDMI_R_CK-

DDI2_CTRL_DATA

6

HDMI_R_CK+
HDMI_R_D0HDMI_SCLK
D2
XEMC@

4

3
HDMI_SDATA
Q15B
DMN66D0LDW-7_SOT363-6

HDMI_R_D0+
HDMI_R_D1-

YSLC05CH_SOT23-3

5

8

DDI2_CTRL_CK

1

1

8

Q15A
DMN66D0LDW-7_SOT363-6

HDMI_R_D1+
HDMI_R_D2-

Reserved for ESD

HDMI_R_D2+

19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKCK_shield
CK+
D0D0_shield
D0+
D1D1_shield
D1+
GND
D2GND
D2_shield GND
D2+
GND

20
21
22
23

ACON_HMR2U-AK120C
CONN@

+3VS

DC232002700

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Deciphered Date

4

2013/07/10

Title

HDMI Conn

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.2

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Monday, April 08, 2013

Sheet
E

19

of

42

2

2

C457
0.1U_0402_16V4Z

2

C456
0.1U_0402_16V4Z

C455
10U_0603_6.3V6M

2
1

1

+1.8VS_DAC

1

2

@

L48
0_0603_5%
Rated current 500mA, DC 0.1ohm
1

@ Q25
DMG2301U-7_SOT23-3

2

3

1

G

2

G
3

R396
1K_0402_5%
2
1
@

DP_HPD
6511_PWR_EN#

D

S

CPU_DP_HPD

@

1

S

@

1

+1.8VS

2 0_0603_5%

@

D

+5VS

8

+3VS_6511

1

R80

@

1

2

@

1

2

@

1

2

C581
0.1U_0402_16V4Z

+3VS

C580
0.1U_0402_16V4Z

+3VS_6511
R399
0_0402_5%
2
1
@

1

C579
0.1U_0402_16V4Z

3

C75
1U_0402_6.3V6K

4

2

5

D

D

1M_0402_5% 2
1M_0402_5% 2

@
@

2
2

1 0.1U_0402_16V7K DDI1_AUX_C_DP 24
1 0.1U_0402_16V7K DDI1_AUX_C_DN 23
22
21

1 R50
1 R51

ISPSCL
ISPSDA
RXAUXP
RXAUXN

VGADDCCLK
VGADDCSDA

DCAUXP
DCAUXN

VSYNC
HSYNC

OSCOUT
35
29

+1.8VS_RXVCC

26
38

+1.8VS_RXVCC

AVCC
AVCC

IT6511FN

PVCC
PVCC

VDDC
VDDC
VDDC

28
37
36

IOBN
IOBP

DVDD18
DVDD18
DVSS18

IORN
IORP
VGADETECT

39

+1.8VS_RXVCC

RSET
VDDA

@

2 10K_0402_5%
PCSDA
PCSCL

6511_PWR_EN

6511_PWR_EN

48
47
43

INT#
COMP
PCSDA
PCSCL
XTALIN
XTALOUT
SYSRSTN

57

38

42

C474
0.1U_0402_16V4Z

2

@

1
1
1
1

T97

19
20

ISPSCL_R
ISPSDA_R

27
25

R397 1
R398 1

@
@

2
2
2
2

R413
R412
R411
R410

1
2

VSYNC
HSYNC

@

22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%

2 22_0402_5%
2 22_0402_5%

2 0_0603_5%

ISPSCL
ISPSDA

CRT_CLK_1
CRT_DATA_1

1

2

21
21

@

1

2

1

2

C498
0.1U_0402_16V4Z

32

@

C

CRT_CLK_1
CRT_DATA_1

21
21

21
21

45
8
11
14

+1.8VS_DAC

+HDMI_5V_OUT

13
12

R53

1

2

37.4_0402_1%

10
9

R76

1

2

37.4_0402_1%

7
6

R147 1

CRT_B

CRT_B

CRT_G
2

VGADETECT

3

R196 1

CRT_G

21

CRT_R

21

1

21

RP42

2 100_0402_1%

5

4
3
2
1

+3VS

+1.8VS_DAC

4
41
40

1

R123
2.2K_0402_5%

37.4_0402_1%
CRT_R

18

21

2 C500
0.1U_0402_16V4Z

XTALIN_6511
XTALOUT_6511

6

CRT_DATA

Q27A
DMN66D0LDW-7_SOT363-6
3

21

5
6
7
8

CRT_DATA_1
CRT_CLK_1
PCSDA
PCSCL

4

CRT_CLK

21
B

Q27B
DMN66D0LDW-7_SOT363-6

4.7K_8P4R_5%

GND

R134 1

53

1

L47

Rated current 500mA, DC 0.1ohm

ASPVCC

B

+3VS

2 0.1U_0402_16V4Z
C496 1
1
2
2
1
R133
4.7K_0402_5%
C614
MCURSTN
0.1U_0402_16V7K

50

+3VS

IOGN
IOGP
+1.8VS_RXVDD

1

1

+3VS

C72
C73

2

@

17
15
49
52
IVDD
IVDD
IVDD
IVDD

16
46
54

MCURSTN
URDBG

DDI1_AUX_DP
DDI1_AUX_DN

1

C637
0.1U_0402_16V4Z

2
2

RX1P
RX1N

C

8
8

2

@

2

33
34

1

+1.8VS_RXVCC

C497
0.1U_0402_16V4Z

1 0.1U_0402_16V7K CPU_DP1_C_P1
1 0.1U_0402_16V7K CPU_DP1_C_N1

MCUVDD

+1.8VS

C477
2 0.1U_0402_16V4Z

1

C519
4.7U_0603_6.3V6K

2
2

RX0P
RX0N

51

R127
2.2K_0402_5%
2
1

C70
C71

MCUVDDH

2

30
31

2

@

+3VS

5

1 0.1U_0402_16V7K CPU_DP1_C_P0
1 0.1U_0402_16V7K CPU_DP1_C_N0

1

1

CPU_DP1_P1
CPU_DP1_N1

2
2

2

1

4
4

C68
C69

2 0_0603_5%

+1.8VS_RXVDD

1

CPU_DP1_P0
CPU_DP1_N0

@

1
+3VS_6511

R197
75_0402_1% 2
R199
75_0402_1% 2
R201
75_0402_1% 2

4
4

HPD

1

L30

Rated current 500mA, DC 0.1ohm

OVDD
OVDD
OVDD

44

DP_HPD

R408
22_0402_5%

1
1
U42

55
56

+3VS

DDCSCL
DDCSDA

R407
22_0402_5%
R240
4.7K_0402_5%
1
2
@
1
2
@
R241
4.7K_0402_5%

C411
0.1U_0402_16V7K

2

C473
0.1U_0402_16V4Z

ISPSCL_R
ISPSDA_R

+1.8VS_RXVDD

C472
0.1U_0402_16V4Z

R418
4.7K_0402_5%

+1.8VS

C476
4.7U_0603_6.3V6K

1

1
@

2

Q24
L2N7002LT1G_SOT23-3
@

IT6511FN_QFN56_7X7

+3VS
R419
1M_0402_5%

2

XTALOUT_6511

6511_PWR_EN#

2
1

1
2
G
@ Q52
L2N7002LT1G_SOT23-3

D

6511_PWR_EN

3

C65
S

A

IN

1
1
C74

2

2012/07/10

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

2

GND

15P_0402_50V8J

6511_PWR_EN#

18P_0402_50V8J

31

XTALIN_6511

X4
27MHZ_10PF_X3G027000BA1H-U
Crystal
3
4
OUT
GND

1

R584
@ 100K_0402_5%

2013/07/10

Deciphered Date

Title

ITE IT6511FN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

20

of

42

Rev
0.2

A

B

C

D

E

W=40mils
1

1

+HDMI_5V_OUT

@

1

C450
0.1U_0402_16V4Z

2

CRB1.0 use 47ohm@100Mhz Bead

20

CRT_G

20

CRT_B

CRT_B_2

2

1

2

1

2

C616
10P_0402_50V8J

1

C618
10P_0402_50V8J

2

JCRT1

@

1

2
+HDMI_5V_OUT
U24
1

20

R439
0_0402_5%
2
1
@

HSYNC

2

CRT_HSYNC

3

OE

Vcc

@
0.1U_0402_16V4Z 2

5

R175 1

@

2 0_0603_5%

R180 1

@

2 0_0603_5%
@
C448
10P_0402_50V8J

4

CRT_HSYNC_1

CRT_VSYNC_2
1
@
C449
10P_0402_50V8J
2

1

2

20

VSYNC

1

16
17

2

C-H_13-12201560CP
CONN@

100P_0402_50V8J

DC060006E00

CRT_HSYNC_2

VGADETECT

@

20

CRT_DATA

1

CRT_CLK
C646 2
68P_0402_50V8J 1
@
2

M74VHC1GT125DF2G_SC70-5

20
20

@
C607
68P_0402_50V8J

R898
0_0402_5%

+HDMI_5V_OUT

R239
0_0402_5%
2
1
@
2
@
R441
0_0402_5%

G
G

C606

1 C447

IN A
GND OUT Y

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

CRT_G_2

C647
10P_0402_50V8J

2

1

C611
10P_0402_50V8J

1

C615
10P_0402_50V8J

2
2

C648
10P_0402_50V8J

1

CRT_R_2

2

CRT_R

CRT Connector

ISPSDA
ISPSCL

1

20

20
20

L42 EMC@
BLM18BA470SN1D_2P
1
2
L45 EMC@
BLM18BA470SN1D_2P
1
2
L46 EMC@
BLM18BA470SN1D_2P
1
2

U23
1
2

CRT_VSYNC

3

OE

Vcc

5

IN A
GND OUT Y

4

CRT_VSYNC_1

3

3

M74VHC1GT125DF2G_SC70-5

@
2
2
@

+HDMI_5V_OUT
+3VS
C451
0.1U_0402_16V4Z
C452
0.1U_0402_16V4Z

VCC_SYNC
VCC_VIDEO
VCC_DDC

U10

1
2
7

1
1

4

CRT_CLK_1
CRT_DATA_1

10
11

1
2
C454
0.1U_0402_16V4Z
@
For contact

8

discharge ESD +/-8kV

VIDEO_1
VIDEO_2
VIDEO_3

SYNC_IN1
SYNC_IN2
DDC_IN1
DDC_IN2

SYNC_OUT1
SYNC_OUT2
DDC_OUT1
DDC_OUT2

BYP
GND

CRT_CLK_1
CRT_DATA_1

13
15

6

20
20

HSYNC
VSYNC

3
4
5

CRT_R_2
CRT_G_2
CRT_B_2

14
16

CRT_HSYNC_1
CRT_VSYNC_1

9
12

CRT_CLK
CRT_DATA

4

DDC_CLK/DAT reserved PU Resistor
CM2009-00QR_QSOP16
@

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

2013/07/10

Deciphered Date

Title

CRT Connector

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Sheet

Monday, April 08, 2013
E

21

of

42

Rev
0.2

5

4

3

2

1

+1.2V_LAN
+VDDO_CR

R03 modify

AVDDH
AVDDH

+3V_LAN

D

VDDO
VDDO
VDDO

TRD2_N
TRD2_P
39
45
51

R02 modify

for ESD

+LAN_GPHYPLLVDDL

36

+LAN_PCIEPLLVDD

32

AVDDL
AVDDL
AVDDL

TRD1_N
TRD1_P
TRD0_N
TRD0_P

GPHY_PLLVDDL

SO_LINKLED#

.1U_0402_16V7K 1
.1U_0402_16V7K 1

2 C788
2 C791

SPD100LED#_SERIALDO
PCIE_PRX_C_DTX_P3 28
PCIE_PRX_C_DTX_N3 27
33
34

PCIE_TXD_P
PCIE_TXD_N
PCIE_RXD_P
PCIE_RXD_N

TRAFFICLED#_SERIALDI
GPIO1_LR_OUT
GPIO_0

27

C

R763 1

EC_PME#

R764 1

+3V_LAN
24,8
7
7

2 0_0402_5%

@

SI_EEDATA
CS#_EECLK

3

2 4.7K_0402_5% LAN_PME#

PREST#
PCIE_REFCLK_P
PCIE_REFCLK_N
SD_DETECT/XD_WE#

23
23
23
23

CR_DATA0 R768
CR_DATA1 R769
CR_DATA2 R770
CR_DATA3 R771

CR_DATA0
CR_DATA1
CR_DATA2
CR_DATA3

1
1
1
1

EMC@
EMC@
EMC@
EMC@

2
2
2
2

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

CR_DATA0_R
CR_DATA1_R
CR_DATA2_R
CR_DATA3_R

SR_DISABLE/XD_DETECT#

25
24
23
22
52
53
54
55

CR_DATA0
CR_DATA1
CR_DATA2
CR_DATA3
CR_DATA4
CR_DATA5
CR_DATA6
CR_DATA7

MS_INS#/XD_CE#
GPIO2_MEDIA_SENSE/XD_RE#
CR_WP#/XD_WP#
CR_LED_CR_BUS_PWR/XD_ALE
CR_CLK/XD_RY_BY#

+3VS
R776 1

2 1K_0402_5% 58

R777 1

2 4.7K_0402_5% 6

49
50

LAN_MIDI3LAN_MIDI3+

47
46

LAN_MIDI2LAN_MIDI2+

43
44

LAN_MIDI1LAN_MIDI1+

41
40

LAN_MIDI0LAN_MIDI0+

LAN_MIDI3LAN_MIDI3+

23
23

LAN_MIDI2LAN_MIDI2+

23
23

LAN_MIDI1LAN_MIDI1+

23
23

1

LAN_MIDI0LAN_MIDI0+

23
23

2

2

2

2

2

C465
0.1U_0402_16V4Z
1

2
R242
10K_0402_5%

LAN_PWR_EN#

65

LAN_LINK#

20mil
C464
0.1U_0402_16V4Z

+LAN_XTALVDDH
C785

20mil

66

1

1

2
D

1
2
BLM18AG601SN1D_2P
0.1U_0402_16V4Z

2
L58

@
C789
0.1U_0402_16V4Z

23

+3V_LAN

L57

1
2
BLM18AG601SN1D_2P

+LAN_AVDDH

LAN_ACTIVITY#

2

L56
1
2
BLM18AG601SN1D_2P
0.1U_0402_16V4Z

2

20mil

2
67

1

@

27

23

8

1

1

C790

2

1

2

0.1U_0402_16V4Z

+VDDO_CR

5

5IN1_LED#

64
63

SPROM_DOUT
SPROM_CLK

1

CR_XD_WE#_SD_DETECT_R

28

C

WAKE#

11
31
30

PLT_RST_BUF#
CLK_PCIE_LAN
CLK_PCIE_LAN#

2

60mil

1
@

C787

SCLK_SPD1000LED#

PCIE_PRX_DTX_P3
PCIE_PRX_DTX_N3
PCIE_PTX_C_DRX_P3
PCIE_PTX_C_DRX_N3

1

@

1

+LAN_BIASVDDH

PCIE_PLLVDDL

R02 Modify

10
10
10
10

3

+LAN_AVDDH

+3V_LAN
1

PCIE_PLLVDDL

29

EMC@
2 0.1U_0402_16V4Z PLT_RST_BUF#
C786 1

48
42

Q6
DMG2301U-7_SOT23-3
1
TRD3_N
TRD3_P

+LAN_AVDDL

+LAN_XTALVDDH

G

7
56
62

17

C784
0.1U_0402_16V4Z

XTALVDDH

C783
4.7U_0603_6.3V6K

2

VDDC
VDDC

C781
0.1U_0402_16V4Z

2

35
61

+3V_LAN
L65 EMC@
1
2
EMC@
BLM31PG601SN1_2P
1

C780
0.1U_0402_16V4Z

2

1

VDDO_CR

C779
4.7U_0603_6.3V6K

1

+1.2V_LAN

@ R759
10_0805_5%2

1U_0402_6.3V6K
C782

2

1
@

+3VALW

+LAN_BIASVDDH

2

1

0.1U_0402_16V4Z
C803

2

@

C777
4.7U_0603_6.3V6K

2

1
@

C778
0.1U_0402_16V4Z

1
@

C776
0.1U_0402_16V4Z

2

C775
0.1U_0402_16V4Z

1
@

C774
0.1U_0402_16V4Z

2

C773
0.1U_0402_16V4Z

2

1

37

D

C772
0.1U_0402_16V4Z

1

BIASVDDH

S

C771
4.7U_0603_6.3V6K

U48
20

EMC@

CR_CMD_XD_CLE

R767 2

1

@

0_0402_5%

CR_XD_WE#_SD_DETECT

CR_XD_WE#_SD_DETECT

23,25

68
59
9
57

CR_WP#_XD_WP#

60

CR_PWR_EN

21

CR_CLK_XD_RY_BY#_R

R774

1

26

CR_CMD_XD_CLE_R

R775

1

CR_WP#_XD_WP#
CR_PWR_EN
2 56_0402_5%

For EMI request

CR_CLK_XD_RY_BY#

EMC@
2 22_0402_5%

CR_CMD_XD_CLE

EMC@

VMAIN_PRSNT

23
23

23

23

+3V_LAN

1

TEST1

10

2

R778

TEST2

4.7K_0402_5%

SR_LX
4

B

LOW_PWR

19
18

LAN_XTALO_R
LAN_XTALI

SR_VFB

LAN_CLKREQ#

L59
2
+1.2V_LAN_OUT 1
4.7UH_PG031B-4R7MS_1.1A_20%

13
C793
0.1U_0402_16V4Z

15mil38

2 LAN_RDAC
1.24K_0402_1%

RDAC

12

40mil
+1.2V_LAN
1

1

2

2

EMI Request...2010/07/27

C794
10U_0603_6.3V6M

B

SM010005500 500ma 600ohm@100mhz DCR 0.38

R02 Modify
GND PLANE

7

40mil

XTALO
XTALI

Reserved for leakage current
1
R780

16

CLK_REQ#

SR_VDDP
SR_VDD

15
14

20mil

40mil
+3V_LAN
1

2

2

L60
1
2
BLM18AG601SN1D_2P

+LAN_PCIEPLLVDD

4.7U_0603_6.3V6K
C796

C797
0.1U_0402_16V4Z

1

1

2

2

+1.2V_LAN

C798
4.7U_0603_6.3V6K

69

BCM57786XA1KMLG_QFN68_8X8

1 0.1U_0402_16V4Z
C795

PLACE NEXT P14

20mil

+3V_LAN

L61
1
2
BLM18AG601SN1D_2P

1

3
GND

2
C799
15P_0402_50V8J
2

GND

SPROM_CLK
(EECLK)

SPROM_DOUT
(EEDATA)

On chip

1

0

AT24C02

1

1

3LAN_XTALO
1

4
2

C800
15P_0402_50V8J

1

1

1

2

2

1

1

2

2

+1.2V_LAN

C802
4.7U_0603_6.3V6K

1

SPROM_CLK
2

SPROM_DOUT

2
1
A

0.1U_0402_16V4Z

1

20mil

R779
200_0402_1%

Y6
25MHZ 10PF X3G025000DA1H-X

C801

2012/07/10

Issued Date

C804
0.1U_0402_16V4Z

+1.2V_LAN

C805
4.7U_0603_6.3V6K
A

Compal Electronics, Inc.

Compal Secret Data

Security Classification

L62
1
2
BLM18AG601SN1D_2P

+LAN_AVDDL

R784
1K_0402_5%

1

@
LAN_XTALI
LAN_XTALO_R

1
2
R783
1K_0402_5%

2
R782
1K_0402_5%

+LAN_GPHYPLLVDDL

2013/07/10

Deciphered Date

Title

Broadcom BCM57785

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

22

of

42

Rev
0.2

5

4

3

2

1

D

D

+3V_LAN

22
22

LAN_MIDI1+
LAN_MIDI1-

LAN_MIDI1+
LAN_MIDI1-

7
8
9

22
22

LAN_MIDI0LAN_MIDI0+

LAN_MIDI0LAN_MIDI0+

EMC@

2

EMC@

1

2

EMC@

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

1
RJ45_MIDI2RJ45_MIDI2+

18
17
16

RJ45_MIDI1+
RJ45_MIDI1-

15
14
13

GST5009-E
SP050006B10
1

2

2
EMC@

R786
1K_0402_5%

LAN Connector

R787
1K_0402_5%
XEMC@
2 220P_0402_50V7K

C806 1
C807 1

2 220P_0402_50V7K
XEMC@

JRJ45
1

RJ45_MIDI0+

RJ45_MIDI0RJ45_MIDI0+

2

C813
0.1U_0402_16V4Z

1

MCT2
MX2+
MX2-

2

CARD READER_2in1 SP07000TF00

2

C812
0.1U_0402_16V4Z

C

1

C811
0.1U_0402_16V4Z

C810
0.1U_0402_16V4Z

10
11
12

TCT2
TD2+
TD2-

1

2

LAN_MIDI2LAN_MIDI2+

EMC@

2

LAN_MIDI2LAN_MIDI2+

RJ45_MIDI3+
RJ45_MIDI3-

21
20
19

C395
0.1U_0402_16V4Z

22
22

4
5
6

R790
75_0402_1%
1
R791
75_0402_1%

LAN_MIDI3+
LAN_MIDI3-

24
23
22

RJ45_MIDI0-

2

RJ45_MIDI1+

3

RJ45_MIDI2+

4

RJ45_MIDI2-

5

RJ45_MIDI1-

6

RJ45_MIDI3+

7

RJ45_MIDI3-

8

PR1+
LED_YELLOW_A1
PR1LED_YELLOW_A2

9

LAN_ACTIVITY#

10

C808 1

PR3+
LED_GREEN_B1
PR3LED_GREEN_B2

11

LAN_LINK#

12

C809 1

GND
GND

22

LAN_LINK#

22

2 68P_0402_50V8J
XEMC@

PR2PR4+

LAN_ACTIVITY#

2 68P_0402_50V8J
XEMC@

PR2+

13
14

40mil

PR4-

C

SANTA_130451-F
CONN@

2

LAN_MIDI3+
LAN_MIDI3-

MCT1
MX1+
MX1-

1
R788
75_0402_1%
2
1
R789
75_0402_1%
1

22
22

TCT1
TD1+
TD1-

1

+5VS

T1
1
2
3

DC234005300

RJ45_GND

Place close to TCT pin
BOTHHAND: S X'FORM_ GST5009-E LF LAN, SP050006B10
TIMAG:S X'FORM_ IH-160 LAN , SP050006F00
XEMC@ JP1
B88069X9231T203_4P5X3P2-2
2
1
EMC@
C814 1

RJ45_GND

JREAD1

EMC@
CR_CMD_XD_CLE

CR_CMD_XD_CLE

3
4
5
6
7

CR_DATA0
CR_DATA1
CR_DATA2
CR_DATA3

8
9
1
2

EMC@
22

2 CR_CLK
R897 1
BLM15BA220SN1D 0402

CR_CLK_XD_RY_BY#

SM01000LU00 not have create symbol.
Use (MURATA BLM15AG102SN1D 0402)

22
22
22
22

CR_DATA0
CR_DATA1
CR_DATA2
CR_DATA3

DAT0
DAT1
DAT2
CD/DAT3

+3VALW

+XDPWR_SDPWR_MSPWR

22

2
XEMC@

1

C26
1

D

S

2

1

EMC@

2

R794
10K_0402_5%

6.8P_0402_50V8C

0.1U_0402_16V7K
C822

2
XEMC@
22_0402_5%

L2N7002LT1G_SOT23-3
2
CR_PWR_EN
G

3

Q23

R26

2

2

1

SP07000TF00

1

Q9
DMG2301U-7_SOT23-3

C819
1U_0402_6.3V6K

R793
10K_0402_5%

T-SOL_156-1000302601_NR
CONN@

CR_CLK

1

1

WP SW
CD SW
GND SW
GND SW

G

22,25

10
11
12
13

CR_WP#_XD_WP#
CR_XD_WE#_SD_DETECT

L66 EMC@
1
2
BLM31PG601SN1_2P

D

S
3

22
CR_WP#_XD_WP#
CR_XD_WE#_SD_DETECT

1

B

CMD
VSS
VDD
CLK
VSS

40mil
1

2

C818
0.1U_0402_16V4Z

22

C817
4.7U_0603_6.3V6K

B

3

2

2

+XDPWR_SDPWR_MSPWR

JP2
XEMC@
B88069X9231T203_4P5X3P2-2

1

J15
JUMP_43X118
@

2

2

40mil

LANGND

D39
L30ESDL5V0C3-2

1
1

Card Reader Connector

2

10P_0402_50V8J

1
@
2

1

2

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

2013/07/10

Deciphered Date

Title

LAN Magnetic & RJ45

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

23

of

42

Rev
0.2

A

B

C

D

E

For Wireless LAN
60mil

+3VS
J3
1

+1.5VS
+3VS_WLAN

1

@

2
1

JUMP_43X118
+3VALW

2

@ J4

1
1

C458

@

1

1

C459

4.7U_0603_6.3V6K

2

2
0.1U_0402_16V4Z

J13
JUMP_43X39
2
1
2

+1.5VS_WLAN

1
@ C461

@
C460
0.1U_0402_16V4Z

2

@

4.7U_0603_6.3V6K

1

C462
@
0.1U_0402_16V4Z

2

1

C463
0.1U_0402_16V4Z

2

2

JUMP_43X118

1

+3VS_WLAN

Mini Card Power Rating
+3VS_WLAN R429
4.7K_0402_5%
1

+1.5VS_WLAN

2
JMINI1

27
7,8

WLAN_PME#
R423 1

MINI1_CLKREQ#

7
7

2 0_0402_5%

@

CLK_PCIE_MINI1#
CLK_PCIE_MINI1

+3VS_WLAN
+3VALW
U9

GND

10
10

2

PCIE_PTX_C_DRX_N4
PCIE_PTX_C_DRX_P4

IN
3
+3VS_WLAN

G5243T11U_SOT23-5
IOAC@
27
27

E51TXD_P80DATA
E51RXD_P80CLK

For DVT2 verify IOAC function

2

R437
100K_0402_5%

27

BT_ON#

1

WLAN_ON

1

27

R435 @
0_0402_5%
1
2
1
2

E51TXD_P80DATA_R
E51RXD_P80CLK_R

R436 @
0_0402_5%
R438
1K_0402_5%

@

53

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GNDGND

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

WL_OFF#
PLT_RST_BUF#

WL_OFF#
27
PLT_RST_BUF#

MINI1_SMBCLK R432 1
MINI1_SMBDATA R434 1
USB20_N4
USB20_P4
R443 1

22,8

2 0_0402_5%
2 0_0402_5%

@
@

PCH_SMBCLK
PCH_SMBDATA

7
7

10
10

2 100K_0402_5%

+3VS_WLAN
MINI1_LED#

27

2

54

BELLW_80053-1021
CONN@

DC040009P00

2

EN
IOAC@
2

1

IN

1

C165
1U_0402_6.3V6K

2

4
1

OUT

W=60mils

PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4

D

3

5

10
10

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

S

2
G

@
Q20
L2N7002LT1G_SOT23-3

3

3

4

4

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

MINI CARD (WLAN)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Sheet

Monday, April 08, 2013
E

24

of

42

Rev
0.2

A

B

C

D

E

SATA HDD1 Conn.
JHDD1

6
6

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0

C392 1
C393 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0

C391 1
C394 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0

+3VS

8,9

R307 1

DEVSLP0

@

R308 2
@
0_0402_5%
2 0_0402_5%

1

+3VS_HDD

+5VS

2

2

1

2

C397
0.1U_0402_16V4Z

1
@

C161
1U_0402_10V6K

2

C420
10U_0603_6.3V6M

2

C390
0.1U_0402_16V4Z

@

1

100mils
1

JODD1

6
6

SATA_PTX_DRX_P1
SATA_PTX_DRX_N1

6
6

SATA_PRX_DTX_N1
SATA_PRX_DTX_P1

C401 1
C402 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PTX_C_DRX_P1
SATA_PTX_C_DRX_N1

C403 1
C405 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PRX_C_DTX_N1
SATA_PRX_C_DTX_P1

1
2
3
4
5
6
7

1

GND
A+
AGND
BB+
GND

+5VS

8
9
10
11
12
13

80mils

GND
GND
GND
GND

23
24
25
26

1

2

C407
0.1U_0402_16V4Z

+5VS

V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12

SATA ODD Conn.

C404
10U_0603_6.3V6M

+3VS

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

GND
A+
AGND
BB+
GND

1

1

SATA_PTX_DRX_P0
SATA_PTX_DRX_N0

2

6
6

1
2
3
4
5
6
7

T185@

ODD_MD

DP
+5V
+5V
MD
GND
GND

GND
GND

14
15

SANTA_201902-1_13P-T
CONN@

CCM_C127043HR022M27FZR_22P-T

LTCX004HZ00

CONN@

DC231211190
2

Debug Board
JDB1
7
7

PCH_SPI_CS0#_1_R
PCH_SPI_MISO_1_R
7
SPI_HOLD1#_R
27
EC_SPICLK
27
EC_SO_SPI_SI_R1
+EC_SPI

3

22,23

CR_XD_WE#_SD_DETECT

27

EC UART_TXD
19

8

HDMI_HPD

XDP_DBRESET#
27,28
KSI0
27,28
KSO2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

G1

G2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

PCH_SPI_CLK_1_R
PCH_SPI_MOSI_1_R

7
7

+BIOS_SPI
EC_SPICS#/FSEL#_R
27
EC_SI_SPI_SO_R1
27
EC_RST#
27,28
3

ON/OFFBTN#

REC_MODE_L
EC UART_RXD
+3VALW_EC

SPI_WP1#_R

26,28

27
27

Kill SPI_WP1#_R
SW

27,6,7
940@
1 R569
2
1K_0402_1%

LID_SW#
26,27
KSI2
27,28
KSO3
27,28
KSO4
27,28

JP5

1
2

1
2

CONN@
3
4

G1
G2

ACES_87212-02G0

52

+3VALW

E&T_1001K-F50C-05R
CONN@

4

4

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

HDD/ODD/USB3.0 Conn

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Sheet

Monday, April 08, 2013
E

25

of

42

Rev
0.2

A

B

C

D

E

+5VALW

For ESD request

SM070000S80 WCM2012F2SF-670T04 67ohm
10
10

PCH_USB3_TX0_P
PCH_USB3_TX0_N

2
C484

1
PCH_USB3_TX0_P_C
0.1U_0402_16V7K

2
C482

1
PCH_USB3_TX0_N_C
0.1U_0402_16V7K

L24

1
4

U3RXDN0

D15
1 1

109

U3RXDN0

U3RXDP0

2 2

98

U3RXDP0

U3TXDN0

4 4

77

U3TXDN0

U3TXDP0

5 5

66

U3TXDP0

EMC@

1

2

4

3

2
3

U3TXDP0

+USB3_VCCA
U25

C483 EMC@
0.1U_0402_16V7K
1
2
27

1
2
3
4

USB_CHARGE_2A#

GND
IN
IN
EN/ENB

OUT
OUT
OUT
OCB

W=60mils

8
7
6
5

1

R454
0_0402_5%
2
@

USB_OC0#

10,9

SY6288D10CAC_MSOP8

U3TXDN0

DLW21SN900HQ2L-0805_4P
1

1

3 3
L25
10
10

PCH_USB3_RX0_P

PCH_USB3_RX0_P

PCH_USB3_RX0_N

PCH_USB3_RX0_N

1
4

EMC@

1

2

4

3

2
3

U3RXDP0

+USB3_VCCA

8
XEMC@
L05ESDL5V0NA-4 SLP2510P8

W=100mils

U3RXDN0

C486

10

USB20_P0

10

USB20_N0

USB20_P0
USB20_N0

2

2

@
@

2 0_0402_5%
2 0_0402_5%
4
1

220U_6.3V_M

4
1

USB20_P0_L
USB20_N0_L

+

1
2

1

C994
0.1U_0402_16V4Z

DLW21SN900HQ2L-0805_4P
R458 1
R461 1
L26
3
3

XEMC@ EMC@
2
2
C487
1000P_0402_50V7K

1

USB20_N0_L
USB20_P0_L

WCM2012F2SF-670T04_0805
XEMC@

U3RXDN0
U3RXDP0
U3TXDN0
U3TXDP0

SF000002Y00
220U 6.3V OSCON
ESR 17mohm@100Khz

USB3.0 Conn.
JUSB1

1
2
3
4
5
6
7
8
9

VBUS
DD+
GND
StdA-SSRXStdA-SSRX+
GND-DRAIN
StdA-SSTXStdA-SSTX+

GND
GND
GND
GND

10
11
12
13

OCTEK_USB-09EAAB
CONN@

2

2

DC233008O20

3

3

USB/B
(USB Port 1, Port2)
+5VALW

PWR/B

JUSB2

JPWR1

1
2
3
4
5
6
GND
GND

1
2
3
4
5
6

LID_SW#
PWR_LED#
ON/OFFBTN#

+3VALW
+3VLP
LID_SW#
25,27
PWR_LED#
28
ON/OFFBTN#
25,28

7
8

27

USB_EN#

10
10

USB20_N1
USB20_P1

10
10

USB20_N2
USB20_P2

USB_EN#
USB20_N1
USB20_P1
USB20_N2
USB20_P2

ACES_88514-00601-071
CONN@

SP010014M00

1
2
3
4
5
6
7
8
9
10
11
12
13
14

1
2
3
4
5
6
7
8
9
10
11
12
13
14
ACES_88514-01201-071
CONN@

SP01001BF00
4

4

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

HDD/ODD/USB3.0 Conn

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Sheet

Monday, April 08, 2013
E

26

of

42

Rev
0.2

A

B

6,9
EC_SCI#
24
WLAN_ON

12
13
37
20
38

2 0.01U_0402_16V7K
XEMC@

25,28

2

25,28

X1 @
32.768KHZ_12.5PF_FC-135
1 EC_XCLK0
EC_XCLK1 2

@

2

C514
15P_0402_50V8J

EC UART_TXD

25

EC UART_RXD

2

@

25

R565
0_0402_5%

REC_MODE_L

2

@

D26
RB751V40_SC76-2
2
@ 1

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

PM_SLP_S3#
PM_SLP_S5#
8
EC_SMI#
31
PCH_PWR_EN
18
TS_EN
11,8
VCCST_PG_EC
24
WL_OFF#
33
EC_SPOK
30
FAN_SPEED1
1
24
24

E51TXD_P80DATA
E51RXD_P80CLK

28

PWR_SUSP_LED#
30
G_SEN_INT

SUSCLK

EC_XCLK1
1
2
EC_XCLK0
@
R502
0_0402_5%
2 940@ 1
R504
100K_0402_5%
940@ 1
C516

2
20P_0402_50V8

PCH_RSMRST#

122
123

EC_SMB_CK1/GPIO44
EC_SMB_DA1/GPIO45
SM
EC_SMB_CK2/GPIO46
EC_SMB_DA2/GPIO47

63
64
65
66
75
76

BATT_TEMP

68
70
71
72

CPU1.5V_S3_GATE/GPXIOA00
WOL_EN/GPXIOA01
HDA_SDO/GPXIOA02
VCIN0_PH/GPXIOD00

1 100P_0402_50V8J ECAGND
BATT_TEMP

ADP_I
AD_BID0

ADP_I

EC_PME#

EC_PME#

EN_DFAN1

EC_MUTE#
LAN_PWR_EN#
WLAN_PME#
EC_ENTERING_RW
TP_CLK
TP_DATA

97
98
99
109

VGATE_3V
USB_CHARGE_2A#
HDA_SDO
VCIN0_PH_R

SPI Flash ROM

GPIO
Bus

GPIO

SPIDI/GPIO5B
SPIDO/GPIO5C
SPICLK/GPIO58
SPICS#/GPIO5A

119
120
126
128

EC_SI_SPI_SO
EC_SO_SPI_SI
EC_SPICLK_R
EC_SPICS#/FSEL#

73
74
89
90
91
92
93
95
121
127

ENBKL/GPIO40
PECI_KB930/GPIO41
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
PWR_LED#/GPIO54
BATT_LOW_LED#/GPIO55
SYSON/GPIO56
VR_ON/GPIO57
PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05
H_PROCHOT#_EC/GPXIOA06
VCOUT0_PH/GPXIOA07
GPO BKOFF#/GPXIOA08
PBTN_OUT#/GPXIOA09
PCH_APWROK/GPXIOA10
SA_PGOOD/GPXIOA11
AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
LID_SW#/GPXIOD04
SUSP#/GPXIOD05
GPXIOD06
PECI_KB9012/GPXIOD07

GPI

XCLKI/GPIO5D
XCLKO/GPIO5E

4.7K_0402_5%
4.7K_0402_5%

+3VS

@

2 10K_0402_5%
@

R482
0_0402_5%
2
1
@

VR_HOT#

1

2 10K_0402_5%

H_PROCHOT#

32,33,4

32,33
D

S

Q50
L2N7002LT1G_SOT23-3

Latest design guide suggest change to
74LVC1G06.

30

V18R

1
1
1
1

R158
R159
R160
R146

R509
0_0402_5%
2
1
@
EC_ACIN

C512

26

ENBKL

2
EMC@

ACIN

32,34,8

1 100P_0402_50V8J
2

110
112
114
115
116
117
118

EC_ACIN
EC_ON
ON/OFF
LID_SW#
SUSP#
VCCST_PWRGD
9012_PECI

124

+V18R

2

KB9012QF-A3_LQFP128_14X14

20mil

25,6,7

+3VALW

0_0402_5%
1 0_0402_5%

+3VLP

930_PECI

R496 1 940@

9012_PECI

R497 1 9012@ 2 43_0402_1%

2 43_0402_1%

33

2 9012@ 1
9012_PCH_PWROK
R498
0_0402_5%
2 940@ 1
GPXIOA07
R499
0_0402_5%
2 9012@ 1
R500
0_0402_5%

+3VALW_EC

24

EC_ON
28,35
ON/OFF
28
LID_SW#
25,26
SUSP#
31,34,36,37,38
VCCST_PWRGD
11,38

@

@
R697
10K_0402_5%

PCH_PWROK

EC_SPICS#/FSEL#_R

SPI_WP1#_R

R510 1

8
33,35

R696
10K_0402_5%
R501 1

VCIN0_PH_R

2 0_0402_5%

@

VCIN0_PH
33
VCIN1_PROCHOT

33

+3VALW_EC

KSO1

R507 2 940@

1 47K_0402_5%

KSO2

R508 2 940@

1 47K_0402_5%

+EC_SPI
KB932 use 256KB ROM
D28
KB9012 Embedded 128KB ROM

+3VALW_EC
2 940@ RB751V40_SC76-2

1

EC_SPICS#/FSEL#_R
U29
1 DEG@ 2EC_SI_SPI_SO_R
R598 0_0402_5%
24.7K_0402_5%
@
SPI_WP#

SPI_WP1#_R 1 940@ 2
R601
1K_0402_5%

1
2
3
4

/CS
VCC
DO_IO1 /HOLD
/WP
CLK
GND DIO_IO0

8
7
6
5

W25X20BVSNIG_SO8
SA00003GM10
940@

2 940@ 0.1U_0402_16V4Z
C518 1
R511
1 940@ 2 4.7K_0402_5%
SPI_HOLD#
+EC_SPI
EC_SPICLK
1 DEG@ 2
EC_SO_SPI_SI_R
EC_SO_SPI_SI_R1
R600
0_0402_5%
EC_SPICLK

R506
@
56K_0402_5%

Rb

U28
1

2
1
R513 XEMC@ 0_0402_5%

25

4

XEMC@
C520
33P_0402_50V8K

Issued Date

2
2

KB932QF-A0_LQFP128
940@

SA000055I00

Compal Electronics, Inc.

Compal Secret Data

Security Classification

C517
0.1U_0402_16V4Z

2012/07/10

2013/07/10

Deciphered Date

Title

EC ENE-KB9012

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

3

Pin104 This co-layouted circuit is for power fail function of
KB930 and KB9012.At KB930, PCH_PWROK will be connected to pin 104.
At KB9012,PCH_PWROK will be connected to pin 32,
and VCOUT0_PH will be connected to pin 104.

D28 design for Debug board flash SPI ROM
(can be short after MP)

EC_SI_SPI_SO_R1

4

MAINPWON

XEMC@

2

H_PECI

Pin74(KB930),Pin118(KB9012) are with different PECI pin location,
so HW must co-layout for it.
Please make sure which EC pin will be connected to PECI circuit.

8

BKOFF#
18
PBTN_OUT#
8
MINI1_LED#

2

Pin 111 is a power source for HW operation of KB9012.
So, power plan will be different between KB930 and KB9012.

9

H_PROCHOT#_EC

1

1 @
R494
R495 2
@

+EC_VCC

8

PCH_RSMRST#
EC_LID_OUT#

+EC_SPI

Analog Board ID definition,
Please see page 3.

25

8

PCH_PWROK

25

KB930&9012 Co-Layout Item
EC_SPICLK

FSTCHG
34
BATT_BLUE_LED#
28
EC_WLAN_LED#
28
PWR_LED
28
BATT_AMB_LED#
28
SYSON
31,36

MINI1_LED#

1

2 940@ 49.9_0402_1% EC_SI_SPI_SO_R
2 940@ 49.9_0402_1% EC_SO_SPI_SI_R
2 940@ 49.9_0402_1%
EC_SPICLK
2 49.9_0402_1% EC_SPICS#/FSEL#_R
940@
1 100K_0402_5%

PM_SLP_S4#

PCH_RSMRST#
EC_LID_OUT#
VCIN1_PROCHOT
H_PROCHOT#_EC
GPXIOA07
BKOFF#
PBTN_OUT#

Board ID

2

2
2

H_PROCHOT#_EC 2
G

VGATE_3V
8
USB_CHARGE_2A#
HDA_SDO
6

PM_SLP_S4#

100
101
102
103
104
105
106
107
108

2
ECAGND 1
L32
BLM18AG121SN1D_2P

Follow KB930 checking List

AD_BID0

@
@

1

1

39

+5VS

1

R588

EC_MUTE#
29
LAN_PWR_EN#
22
WLAN_PME#
24
EC_ENTERING_RW
28
TP_CLK
28
TP_DATA
28

R691 2
ENBKL
930_PECI
FSTCHG
BATT_BLUE_LED#
EC_WLAN_LED#
PWR_LED
BATT_AMB_LED#
SYSON

25

Ra

1

4.7K_0402_5%
4.7K_0402_5%

22

EN_DFAN1

83
84
85
86
87
88

+3VALW_EC

R503
100K_0402_5%

R481

33,34

KB932&9012 Co-Layout Item

4

1
1

2
2

SPI Device Interface

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
GPIO0A
GPIO0B
GPIO0C
GPIO0D
EC_INVT_PWM/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/GPIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A

9012@

BATT_TEMP/GPIO38
GPIO39
ADP_I/GPIO3A
GPIO3B
GPIO42
IMON/GPIO43

EC_MUTE#/GPIO4A
USB_EN#/GPIO4B
CAP_INT#/GPIO4C
EAPD/GPIO4D
TP_CLK/GPIO4E
TP_DATA/GPIO4F

PS2 Interface

R478
R479

BT_ON#
24
BEEP#
29
USB_EN#
26

C398
0.1U_0402_16V4Z

D25
RB751V40_SC76-2
1
2

EC_SPOK

PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
PCH_PWR_EN
TS_EN
VCCST_PG_EC
WL_OFF#
EC_SPOK
FAN_SPEED1
REC_MODE_L_R
E51TXD_P80DATA
E51RXD_P80CLK
9012_PCH_PWROK
PWR_SUSP_LED#
G_SEN_INT

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

BT_ON#
BEEP#
USB_EN#

C515
4.7U_0603_6.3V6K

8

For abnormal shutdown

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

8
8

R605 1 DEG@ 2 E51TXD_P80DATA
0_0402_5%
R606 1 DEG@ 2 E51RXD_P80CLK
0_0402_5%

3

77
78
79
80

KSO[0..17]

KSO[0..17]

33,34
33,34
30,7
30,7

25

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

KSI[0..7]

KSI[0..7]

1
C513
15P_0402_50V8J

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

PLT_RST#

ESD request

1

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

EC_SMI#
EC_SCI#

21
23
26
27

C510 2

DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D
IREF/GPIO3E
CHGVADJ/GPIO3F

DA Output

GND/GND
GND/GND
GND/GND
GND/GND
GND0

1

C511

2 10K_0402_5%
2 10K_0402_5%

@
@

ECAGND

AD Input

CLK_PCI_EC
PCIRST#/GPIO05
EC_RST#
EC_SCII#/GPIO0E
GPIO1D

1
1

EC_ENTERING_RW
GPIO0F
BEEP#/GPIO10
GPIO12
ACOFF/GPIO13

PWM Output

11
24
35
94
113

1
1

R488
R492

EC_MUTE#

R485
R483

1

CLK_PCI_LPC
PLT_RST#
EC_RST#_R
EC_SCI#
WLAN_ON

GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC & MISC
LPC_AD0

2.2K_0804_8P4R_5%

+3VS

+3VALW_EC

2 100K_0402_5%

3

7
CLK_PCI_LPC
28,8
PLT_RST#

EC_SMB_DA1
EC_SMB_CK1
EC_SMB_CK2
EC_SMB_DA2

1
2
3
4
5
7
8
10

TP_CLK
TP_DATA

33

2

8
7
6
5

KBL_EN#
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

ECAGND

2

RP12

1

R476

C508
0.1U_0402_16V4Z

1

PU at LAN side

1
2
3
4

EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC

28
KBL_EN#
9
EC_KBRST#
28,9
SERIRQ
28,7
LPC_FRAME#
28,7
LPC_AD3
28,7
LPC_AD2
28,7
LPC_AD1
28,7
LPC_AD0

2

1

U28

1

+EC_VCC

2
DEG@ 0_0402_5%

2 100K_0402_5% EC_PME#

@

LID_SW#

+EC_VCCA

67

1

2

EC_VDD/AVCC

2

2

AGND/AGND

1

+3VS

1

C507
1000P_0402_50V7K

1
R591

+3VALW_EC

+3VALW_EC

2

@

1 0.1U_0402_16V7K

EC_RST#

R484

1

C506
1000P_0402_50V7K

EC_RST#_R

2

@

C505
0.1U_0402_16V4Z

C509 2
1

25,28

2

1

C504
0.1U_0402_16V4Z

1 47K_0402_5%

1

1
0_0805_5%

C503
0.1U_0402_16V4Z

R480 2

@

E

1

0_0805_5%

2
R236

C502
0.1U_0402_16V4Z

+3VALW_EC

+3VLP
2 XEMC@ 1
CLK_PCI_LPC
R477
33_0402_5%

2

@

D

(PU at Hall Sensor)

L31
BLM18AG121SN1D_2P
1
2 +EC_VCCA
XEMC@ XEMC@

69

1
C501
22P_0402_50V8J
2
1
XEMC@

C

+3VALW_EC

R24

9
22
33
96
111
125

+3VALW

D

Sheet

Monday, April 08, 2013
E

27

of

42

Rev
0.2

B

KSI0_SW
KSO5_SW

KB Conn.

C

1 9012@ 2
1 9012@ 2

R577
R585
KSI[0..7]

KSI[0..7]

KSO[0..17]

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5_SW
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0_SW
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

TP_CLK
TP_DATA

25,27

KSO[0..17]

25,27

JKB2

G1
G2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5_SW
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0_SW
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

27
28

1
1
XEMC@ XEMC@
C551
100P_0402_50V8J
2
2

1

+3VALW_EC

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

C522
1
940@
0.1U_0603_25V7K
U44

1

2

940@

VDD

ON/OFF 2

GND

PWR_BTN#

F3_BTN 3

4

EC_ENT_RW

BTN_A

EC_IN_RW

BTN_B

EC_RST#
PAD

5
6

EC_ENTERING_RW

7 R586 1 940@ 2
0_0402_5%
8 R589 1 940@ 2
0_0402_5%
9

EC_IN_RW
EC_RST#

27
9

To TP/B Conn.

25,27

SLG4N059VTR_TDFN8_2X2

+5VS

F3 + Power BTN --> Reset EC

G1
G2

+3VALW_EC
C523 940@
0.1U_0603_25V7K
U41
2
1
1
VCC

27
28

E-T_6905-E26N-01R
CONN@

E-T_6905-E26N-01R
CONN@

SP01000IJ00

SP01000IJ00

KSI0_SW

3
KSO5_SW
9 1Z
2Z
6
11

GND
PAD

1
2
3
4
5
6

1
2
3
4
5
6
1Y1
1Y0
1S
2Y1
2Y0
2S

0.1U_0402_16V4Z
2
C663 1
TP_DATA
TP_CLK

JTP2

2
5
4

KSO5

10
7
8

KSI0
F3_BTN
ON/OFF

3

LEFT_BTN#

SW4
TJE-532QR5_4P
1

4

RIGHT_BTN#
LEFT_BTN#

3

RIGHT_BTN#

2

7
8

GND
GND

ON/OFF

TP_DATA
27
TP_CLK
27

SW5
TJE-532QR5_4P
1

4

2

CONN@
ACES_88514-00601-071

5
6

1

KSI0
KSO5

E

5
6

JKB1

0_0402_5%
0_0402_5%

D

C553
100P_0402_50V8J

A

2

100g for Press

SP010014M00

100g for Press

NX3L4684TK_MO-229-10_3X3
940@

KB BackLight Conn.

LED

+5VS
JBL1

4
3
2
1

4
3
2
1

6
5

G2
G1

PWR_LED#

1

1 +5VS_BL

BL@
Q44
DMG2301U-7_SOT23-3
1
BL@ 2KBL_EN_R
ACES_50504-0040N-001
R451
CONN@
1
@
100K_0402_5%
SP01000Z300
1
2
@
C525
R592
0.1U_0603_25V7K
1
D
2
0_0402_5%
2
C524
@ G
0.1U_0603_25V7K
2
Q26
S
@
L2N7002LT1G_SOT23-3

KBL_EN#

27

Q17
L2N7002LT1G_SOT23-3

27

S

HDD LED

+3VS

P

LED4

A

1

MEDIA_LED#

4

51ON#

3

PWR_SUSP_LED#

4

1
R698

2
680_0402_5%

PWR_LED#

1

PWR_SUSP_LED#

3

A

B

2

1
R700

2
51_0402_5%

A

4

1
R701

2
680_0402_5%

3

Need check CIS Symbol
+3VS

5IN1_LED#

1

LED8

22

PCH_SATALED#

27

6

EC_WLAN_LED# 1

EC_WLAN_LED#

A

2

1
R702

2
499_0402_1%

LTST-C191KFKT-2CA_ORANGE

CLKRUN#
PLT_RST#

JTPM1

1
3
5
7
9
11
13
15

CLKRUN#
PLT_RST#

51ON#

+3VALW
+3VS

32

BAV70W_SOT323-3

1
EC_ON

FOX_QT510166-L010-7H
CONN@

2
G
S Q39
L2N7002LT1G_SOT23-3
940@

2
4
6
8
10
12
14
16

2
4
6
8
10
12
14
16

LPC_AD3
LPC_AD2
CLK_PCI_TPM
LPC_FRAME#
LPC_AD1
LPC_AD0
LPCPD#_R
SERIRQ

LPC_AD3
27,7
LPC_AD2
27,7
CLK_PCI_TPM
7
LPC_FRAME#
27,7
LPC_AD1
27,7
R392
LPC_AD0
27,7
2 TPM@
SERIRQ

+3VS

1

27,9
10K_0402_5%

12/9 modify pin define

D

1
3
5
7
9
11
13
15

8

SP020011OA0

LPCPD#

R444
1
2
@
0_0402_5%

3

2

EC_ON

2
51_0402_5%

LTST-C295TBKF-CA_AMBER-BLUE

27

4

27,35

A

1
R699

MC74VHC1G08DFT2G_SC70-5

8
27,8

1

1

ON/OFF

1
3

B

2

2

2
ON/OFFBTN#

ON/OFFBTN#

27

TPM Board

R534
100K_0402_5%
9012@

2
25,26

3

+3VLP

R522
100K_0402_5%
940@
D24

BATT_AMB_LED#

R632
10K_0402_5%
U39
2
B

Y
G

2

LTST-C191TBKT-CA_BLUE
+3VALW_EC

BATT_AMB_LED#

1

5

+3VS

ON/OFF BTN

BATT_BLUE_LED#

1

LTST-C295TBKF-CA_AMBER-BLUE
LED7

+3VS

R740
51_0402_5%
1
2

+3VALW

LED6

BATT_BLUE_LED#

2

3

26

1

R452
100K_0402_5%

PWR_LED#

3

27

D

2
G

PWR_LED

2

27

1

2

G

+5VALW

3

D

S

3

R624
10K_0402_5%
940@

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Deciphered Date

2013/07/10

Title

KB & TP & TPM Connector & LED

1

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Sheet

Monday, April 08, 2013
E

28

of

42

Rev
0.2

4

A

B

C

D

E

Int. Speaker Conn.
+VDDA

1

1

C554

JUMP_43X118
@

4.75V

@
@
@
@

2
2
2
2

1
2
3
4

SPK_R+
SPK_RSPK_L+
SPK_L-

1
2
3
4

G1
G2

5
6

ACES_88266-04001
CONN@
GND

SP02000K200

D27
AZ5125-02S.R7G_SOT23-3
XEMC@

+VDDA

(output = 300 mA)

JSPK1

40mil

0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%

2

GND

D37
AZ5125-02S.R7G_SOT23-3
XEMC@

1

+PVDD_HDA

Place near Pin46

GNDA

HD Audio Codec

35

1

2

37
29

10mil
30

3

+INTMIC_VREFO
C584 1

GNDA

C574 1

GND

C583 1
R546 2

GND

2
2

39.2K_0402_1%
20K_0402_1%

1
1

C575 1

2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
1 20K_0402_1%

10mil31
10mil27
39
7
15

2 2.2U_0402_6.3V6M

CPVEE

SENSE_A

34

10mil13
14

MIC2JD

48

42

SPKL+

43

SPKL-

MIC2_R

SPK_OUT_L-

LINE1_L

SPK_OUT_R+

LINE1_R
SPK_OUT_RMIC1_L
HPOUT_L
MIC1_R
HPOUT_R
CBN
CBP

SDATA_OUT

MIC2_VREFO

SYNC
RESETB

MIC1_VREFO_R
BCLK

45

SPKR+

44

SPKR-

32

HP_LEFT

33

HP_RIGHT

8

11

LDO2_CAP
GPIO0/DMIC_DATA
LDO3_CAP
GPIO1/DMIC_CLK
JDREF

CPVEE

PCBEEP

SENSE A
SENSE B

MONO_OUT
AVSS2
VREF

2

3

1

SM010004010 300ma 70ohm@100mhz DCR 0.3
R417
10K_0402_5%

6

INT_MIC_R

1

6

2

Int. MIC

For EMI

1
L51

@

2 INT_MIC_R_1
0_0603_5%

JMIC1

15mil

1
2

C550
XEMC@
220P_0402_50V7K

1
2
3

3
4

GND

GND

G1
G2

ACES_88266-02001_2P
CONN@

SP020008Y00

3

GNDA

47

12

EC_MUTE#

2

MONO_IN

16
38
28

BEEP#_R

CODEC_VREF
1
@

2

1
1

2

1

@

2

BEEP#

27

R529
47K_0402_5%

1

2

GNDA Place next pin27

2

1

2

XEMC@
100P_0402_50V8J
C556

GND

1
C555
1U_0402_6.3V6K

10mil
25

27

4.7K_0402_5%
R531

AVSS1

2

GND

15mil

2

SPDIFO
DVSS

GNDA

COM_MIC

GNDA

6

6

HDA_BITCLK_AUDIO

LDO1_CAP

DC230009K00

D1
AZ5125-02S.R7G_SOT23-3
EMC@

R543
22K_0402_5%

6

HDA_RST_AUDIO#

C578@
10U_0603_6.3V6M

GND

HDA_SYNC_AUDIO
HDA_RST_AUDIO#

6

7
SINGA_2SJ3053-100111F
CONN@

R539
2.2K_0402_5%

2

XEMC@
For EMI
1 XEMC@ 2
1
2 C573
R548 0_0402_5%
22P_0402_50V8J

PCH_SPKR

9

R530
47K_0402_5%

GNDA
4

GNDA

J12
JUMP_43X39
1
2
2
@ 1

GNDA

HDA_SDIN0

HDA_SDOUT_AUDIO

10

6

+INTMIC_VREFO

2
HDA_SDIN0_AUDIO 1 R547
33_0402_5%

5

MIC1_VREFO_L

GND

GND

R542
22K_0402_5%
1
2

GNDA

MIC2_L

J14
JUMP_43X39
1
2
2
@ 1

J11
JUMP_43X39
1
2
2
@ 1

2
5

1

1

36

SPK_OUT_L+

ALC3225-CG_MQFN48_6X6

4

1

HPOUT_R_2

HP_PLUG#

GNDA

35mA

C577
2.2U_0402_6.3V6M

49

S

Q28 @
LBSS138LT1G_SOT-23-3
2
MIC2JD
G
1
C571

9

DVDD

DVDD_IO

68mA 600mA

CPVDD

46

41

40

LINE2_R

C576
0.1U_0402_16V4Z

4

J7
JUMP_43X39
1
2
2
@ 1

D

2

10U_0603_6.3V6M

PD#

Place near
codec

1
C636

GND Place near Pin1, 9

SDATA_IN

C570
2.2U_0402_6.3V6M

+MIC2_VREFO

GNDA

LINE2_L

PVDD2

24
LINE2_C_L
1U_0603_6.3V6M
23
2
LINE2_C_R
1U_0603_6.3V6M
17
2
MIC2_C_L
2.2U_0603_6.3V6M~N
18
2
MIC2_C_R
2.2U_0603_6.3V6M~N
22
2

PVDD1

U34

26

2
0.1U_0402_16V4Z

20

@

HPOUT_L_2

COM_MIC

MIC2JD_1

2
0.1U_0402_16V4Z

19

R545
R549

L36
2 0_0603_5%
L38
2 0_0603_5%

+MIC2_VREFO
+3VS

1
C564

2

C562

GNDA

JHP1

4

1

1

AVDD2

2

1
@ C582

2

@

1

@

21

HP_PLUG#_1
MIC2JD_1

@

2

20mil

C561

1
INT_MIC
C770 1
1K_0402_5%
2
C769 1
1000P_0402_50V7K
C568 1
1 COM_MIC_R
1K_0402_5%
C569 1

GNDA

@

1

2

2
R540

1

2 60.4_0603_1% HPOUT_R_1

3

0.1U_0402_16V4Z
1

L52 1
0_0603_5%

10U_0603_6.3V6M

2

GNDA

COM_MIC

1

Headphone Out

2

+3VS_DVDD 0.1U_0402_16V4Z

1

Combo MIC

2 60.4_0603_1% HPOUT_L_1

HP_RIGHT R237 1

SM010030010 200ma 120ohm@100mhz DCR 0.2

20mil

AVDD1

1
2
2
R726
1
C62 EMC@

INT_MIC_R

HP_LEFT R238 1

1

GNDA

Place near Pin25, 38

Internal MIC

GND

GNDA
C445
XEMC@
COM_MIC
330P_0402_50V7K
1

2

2

C567
10U_0603_6.3V6M

+VDDA
2

2

GNDA
HP_PLUG#

+AVDD1_HDA

2

C444
XEMC@
330P_0402_50V7K

S

+3VS_VDDA

Place near Pin40

@

HP_PLUG#

3

SM010030010 200ma 120ohm@100mhz DCR 0.2

L54 1
0_0603_5%

2
G

GND

0.1U_0402_16V4Z
1
C604

2

C605
10U_0603_6.3V6M

1

2

@

2

2

GND

GND

D
Q31
L2N7002LT1G_SOT23-3

3

2

Place near Pin41

L55 1
0_0603_5%

+3VS

HP_PLUG#_1

0.1U_0402_16V4Z
1
C559 @

1

0.1U_0402_16V4Z
1
C558

2

C608
10U_0603_6.3V6M

1

40mil
1
L33 2
HCB2012KF-221T30 0805

1

SM010014520 3000ma 220ohm@100mhz DCR 0.04
+VDDA

R523
100K_0402_5%

1

1

1

40mil

1
1
1
1

2

EMC@
0.1U_0402_16V4Z

2

R527
R528
R532
R533

3

40mil

SPKR+
SPKRSPKL+
SPKL-

2

J6

3

+5VS

GNDA
Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Deciphered Date

2013/07/10

Title

HD Audio Codec ALC3225

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Monday, April 08, 2013

Sheet
E

29

of

42

Rev
0.2

FAN1 Conn

1

40mil
2

1

1

1

1

1

1

1

1

@

@

@

@

@
H16
H_3P2

1

1

1

@

@

@

@

@

@

H22
H_2P5N

1

@

FIDUCIAL_C40M80

FD3

FD4

1

H20
H_3P2

@
H21
H_3P0

@ C631
1000P_0402_50V7K
1
2

R516
10K_0402_5%

@

@

FIDUCIAL_C40M80

H23
H_2P5X3P5N

@

@

JFAN1
1
2
3

+VCC_FAN1

FAN_SPEED1
1 XEMC@
C630
1000P_0402_50V7K

1
2 GND
3 GND

4
5

ACES_88231-03041
CONN@

2

SP020020710

1

+3VS

+3VS

R518
10K_0402_5%
GSEN@
U2
2

27

@

FIDUCIAL_C40M80

FIDUCIAL_C40M80

C627
4.7U_0603_10V6K
1
2

+3VS

@

FD2

1

2

@

H13
H14
H15
H24
H_4P0 H_4P0 H_4P0 H_4P0

AP2113AMTR-G1_SO8
@
C626
0.1U_0402_16V4Z

1

@

1

R515
0_0402_5%

@

1

1

GND
GND
GND
GND

1

EN_DFAN1

EN
VIN
VOUT
VSET

1

27

+VCC_FAN1
2
@

8
7
6
5

1

U31
1
2
3
4

FD1

1

H3
H4
H5
H6
H9
H10
H11
H12
H17
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0

1

C632
4.7U_0603_10V6K
1
2

1

+5VS

27,7
27,7
+3VS

EC_SMB_CK2
EC_SMB_DA2
R519 1
@
2 10K_0402_5%
R520 1 GSEN@ 2 10K_0402_5%

Vdd_IO

8
4
6
7

CS
SCLSPC
SDA/SDI/SDO
SDO/SA0

16
15
13

INT1
INT2

ADC1
ADC2
ADC3

2
3

Vdd

RES

NC
NC

GND
GND

1

C633 1

14

C628 1

11
9

G_SEN_INT

GSEN@
2 10U_0603_6.3V6M
GSEN@
2 0.1U_0402_16V4Z

G_SEN_INT

27

10
5
12

LIS3DHTR_LGA16_3X3
GSEN@

LIS3DH
SA0 ->0, Address is 0011 000 (0x30h)
SA0 ->1, Address is 0011 001 (0x32h)

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Deciphered Date

2013/07/10

Title

FAN & Screw Hole & G-Sensor

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

Monday, April 08, 2013

Sheet

30

of

42

Rev
0.2

A

B

C

D

E

Normall Platform (Not support M-STATE and Deep Sleep)

+5VALW TO +5VS
+5VALW

2
R551
470_0603_5%
35V@

1

2

5
4

6

35V@

1

U11

C592
0.1U_0603_25V7K

2
1
3VS_ON
R927 47K_0402_5%
2
1
+5VALW
C980
0.1U_0402_16V7K
1
2
@
5VS_ON
R926
0_0402_5%

SUSP#

SUSP

1@
C979

Q30B 35V@
DMN66D0LDW-7_SOT363-6

2
0.1U_0402_16V4Z

VIN1
VIN1

3

ON1

4

VBIAS

5
6
7

+5VALW

@ J36

VOUT1
VOUT1
CT1
GND

ON2

CT2

VIN2
VIN2

VOUT2
VOUT2
GPAD

2

Q30A
DMN66D0LDW-7_SOT363-6

1
2

+3VALW

+5VS_R

5VS_GATE

2

SUSP

1

35V@
2

3

4

10mil

2 35V@ 1
R553
100K_0402_1%

+VSB

1

20mil

1

C588
1U_0402_10V6K

35V@
2

1

C587
4.7U_0603_10V6K

1

C586
4.7U_0603_10V6K

2

C585
4.7U_0603_10V6K

1

+5VS
U33 35V@
DMN3030LSS-13_SOP8L-8
8
1
7
2
6
3
5

1

Reserved

35V@

14
13

1

12

1

2

2

+3VS

2

C976
JUMP_43X118
1 330P_0402_50V7K

2

1

11
10

330P_0402_50V7K
C967
@ J37
1
1
2

9
8
15

2

+5VS

JUMP_43X118
EMC@1
C995
EMC@1
C996

TPS22966DPUR_SON14_2X3

2
22U_0805_6.3V6M
2
22U_0805_6.3V6M

+3VALW TO +3VS
+3VALW

2

1

35V@
R568
470_0603_5%

SYSON#

3

+1.35V_R
Q40B
DMN66D0LDW-7_SOT363-6
35V@
5
SYSON

4

1

5

20

35V@
3VS_GATE

+1.8VS_R
D

S

27,36

2

Q32B
DMN66D0LDW-7_SOT363-6

1

Q32A 35V@
DMN66D0LDW-7_SOT363-6

1
Q40A
DMN66D0LDW-7_SOT363-6
35V@
2
SYSON#

+1.8VS

1

2

2

2

SUSP

R554
100K_0402_5%
35V@

3

3

1
35V@ C598
0.1U_0603_25V7K

R573
470_0603_5%
35V@

+3VS_R

2

3VS_GATE

R559
150K_0402_1%
SUSP

35V@
2

R558
470_0603_5%
35V@

6

1

1

6 1

4

1

10mil

2 35V@

+VSB

4

20mil

+1.35V +5VALW

2

C597
1U_0402_6.3V6K

35V@
1

U35 35V@
DMN3030LSS-13_SOP8L-8
1
2
3

C596
4.7U_0603_6.3V6K

2

8
7
6
5

C595
4.7U_0603_6.3V6K

1

C594
4.7U_0603_6.3V6K

2

2

+3VS

1

2

6511_PWR_EN#

11

2
G
Q38
L2N7002LT1G_SOT23-3
35V@

3

3

+5VALW

+5VALW

2

2
1

2
G
Q37
L2N7002LT1G_SOT23-3
35V@

1

S

D

2
G
Q36
S
L2N7002LT1G_SOT23-3
35V@
SUSP

+1.05VS_VTT_R
D

3

35V@
R563
100K_0402_5%

35V@
Q33
2N7002K_SOT23-3

2
D

2
G

S

SUSP

3

S

PCH_PWR_EN

1

27

+0.675VS_R

1

1
1

D

3

R555
10K_0402_5%
35V@

1

2
27,34,36,37,38

35V@
R567
470_0603_5%

2

1

@

1 EMC@
C997
10U_0603_6.3V6M

@

2

1

40mil

2

PCH_PWR_EN#

Q29
L2N7002LT1G_SOT23-3
35V@
2
SUSP#
G

1

2

C591
1U_0402_6.3V6K

1

1

JUMP_43X79

C590
4.7U_0603_6.3V6K

@
C589
4.7U_0603_6.3V6K

2

SUSP

SUSP

2

1

20mil

@

1

J5

36

3

+3VALW_PCH

2

+3VALW

35V@
R566
22_0603_5%

R561
100K_0402_5%
35V@

1

R552
100K_0402_5%
35V@

Short J5 for PCH VCCSUS3.3

+1.05VS_VTT

2

+0.675VS

+3VALW TO +3VALW(PCH AUX Power)

4

4

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DC Interface

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Sheet

Monday, April 08, 2013
E

31

of

42

Rev
0.2

A

B

C

D

+5VS

VIN

1

@ PR102
47K_0402_1%
2
-

3

BATT_TEMP

27,33

2

1

@ PR104
1.5M_0402_5%
@ PC106
100P_0402_50V8J

@ PR101
100K_0402_1%

1

2

2

2

@ PD102
LL4148_LL34-2

+

O

1

1

S

1

@ PU102A
LM393DR_SO8

1

1

2

2

6

G

8

@ PC105
0.022U_0402_16V7K
2
1

D
@ PQ101A
DMN66D0LDW-7_SOT363-6

@ PR103
10K_0402_1%

P

H_PROCHOT#

G

27,33,4

4

EMI@ PC104
1000P_0603_50V7K

1

1

1
EMI@ PC102
100P_0603_50V8

2

ESD@ PC101
0.1U_0603_25V7K

2

1
2

+3VALW

1

DC_IN_S1

1
2
3
4
GND
GND

1

EMI@ PL101
HCB2012KF-121T50_0805
1
2

2

CONN@ PJP101
ACES_50305-00441-001_4P

PR106
@
47K_0402_1%

3

2

@ PR109
68_1206_5%

8
+
-

5
6

ACIN

27,34,8

4

1

O

@ PR107
1.5M_0402_5%
2

@ PR108
68_1206_5%

930@ PQ102
TP0610K-T1-E3_SOT23-3
1

VS

28

51ON#

1

@ PC109
0.1U_0603_25V7K

2

2

930@ PC108
0.22U_0603_25V7K

2

930@ PR111
22K_0402_1%
1
2

2

930@ PR110
100K_0402_1%

1

1

N1

1

4

JUMP_43X39

@ PD103
LL4148_LL34-2
2

2

S
1

2

7

2

1

5

P

3

1

@ PJ101
1

G

@ PQ101B
DMN66D0LDW-7_SOT363-6

1

BATT+

930@ PD104
LL4148_LL34-2
2
1

@ PC107
0.022U_0402_16V7K
2
1

D

@ PD101
LL4148_LL34-2

2

@ PU102B
LM393DR_SO8

G

2

H_PROCHOT#

2

VIN

2

3

3

@ PR105
0_0402_5%
1
2

+3VLP

-

PBJ101 @
2

+
1

PR113
560_0603_5%
1
2

PR112
560_0603_5%
1
2

+CHGRTC

+RTCBATT

ML1220T13RE

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Deciphered Date

2013/07/10

Title

DCIN
V5WE2 M/B LA-9532P Schematic

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

Monday, April 08, 2013

Sheet
D

32

of

42

Rev
0.2

A

B

C

D

27,34

EC_SMB_CK1

27,34

EC_SMB_DA1

100_0402_1%
2
1
PR201 100_0402_1%
2
1

EC_SMCK 13
EC_SMDA 15
17
19

8

9

10

11

12

13

14

15

16

17

18

19

20

1

8

@ PU204
1

@ PR231
100K_0402_1%

2

EMI@ PC202
1000P_0402_50V7K
MAINPWON

2

2

4
6

@ PR230
10K_0402_1%

3

10
4
12

8

VCC TMSNS1

7

GND RHYST1

2

6

OT1 TMSNS2

1
1

7

1

6

@ PR229
10K_0402_1%

BATT+ <45,47>

@ PR232
47K_0402_1%

5

OT2 RHYST2

@ PH202
100K_0402_1%_NCP15WF104F03RC

G718TM1U_SOT23-8
14

BI

16

TH

2
1
PR206
6.49K_0402_1%
1
2
PR208
1K_0402_1%

18
20

2

9
11
PR202

4

5

1

BATT_S1

2

7

3

2

1

5

2

2

3

1

EMI@ PL201
HCB2012KF-121T50_0805
1
2

+3VLP
BATT_TEMP

27,32

1

1

@ PC209
0.1U_0603_25V7K

2

CONN@ PJP201
WAFER SUYIN 200109MS020G209ZR 20P P2

1

1

1

+3VLP

2

PR203
1K_0402_1%

2

2

For KB9012
OTP

@ PQ202
TP0610K-T1-E3_SOT23-3

65W

84W,1.2V

56W,0.793V

56℃

2.255V, Recovery

90W

117W,1.2V

77W,0.791V

PH201 under CPU botten side :
CPU thermal protection at 92 degree C ( shutdown )
Recovery at 56 degree C
+3VLP

120W

3

2

2

2

G
3

S

MAINPWON

3

MAINPWON

2

1

@ PQ204
2N7002KW_SOT323-3

@ PR221
1_0402_1%

2

4

8

VCC TMSNS1

7

GND RHYST1

6

~OT1TMSNS2

1

PH201
100K_0402_1%_NCP15WF104F03RC
1

2

2

B value:4250K±1%

+VSB

@ PR204
127K_0402_1%
1
2

27

H_PROCHOT#_EC 27

PR225
10K_0402_1%

2

1

+VSBP

@
PR222
10.5K_0402_1%

27

VCIN1_PROCHOT

2

@
PR222
16.2K_0402_1%

G718TM1U_SOT23-8

@ PJ201

1

1

VCIN0_PH

5

~OT2 RHYST2

90W@ PR218
10.5K_0402_1%

2
1
@ PR220
9.53K_0402_1%

1

27,35

D

S

PU201

65W@ PR218
4.87K_0402_1%

2

@
1

27,34

1

@ PR217
100K_0402_1%

PR228
12.4K_0402_1%
2

1

@ PR214
21K_0402_1%
2

2

1
3

H_PROCHOT#
1

1

27,32,4

@ PQ203
2N7002KW_SOT323-3

2

@ PC208
1U_0402_6.3V6K

@ PC207
0.1U_0603_25V7K

@ PR216
100K_0402_1%

D

2
G
1

SPOK

+EC_VCCA
ADP_I

1

1

1.2V, Active

1
2

35

Recovery

@

@ PR213
100K_0402_1%
@ PR219
0_0402_5%
1
2

Active

92℃

1

@

PC206
0.1U_0603_25V7K

VL

2

@ PR212
22K_0402_1%
2
1

+VSBP

2

2

@ PR211
100K_0402_1%

EC_SPOK

1

2

1

1
27
3

PC205
0.22U_0603_25V7K

3

B+

For KB9012
sense 20mΩ

27

1

PR227
1_0402_1%

@
2

@

4

ECAGND

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

2

For 65W adapter==>action 70W , Recovery 54W
For 90W adapter==>action 97W , Recovery 75W

4

PR226
0_0402_5%

1

2

JUMP_43X39

2012/07/10

Deciphered Date

2013/07/10

Title

BATTERY CONN / OTP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.2

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

Monday, April 08, 2013
D

Sheet

33

of

42

A

B

C

D

1

D

3

for reverse input protection

S

2
G

2
2

11

1
2

PR322
422K_0402_1%

1

PC324
100P_0402_50V8J
S

1

PR305
1_0402_1%

2

2

L-->H
H-->L
EC_SMB_CK1

27,33

EC_SMB_DA1

27,33

1

PC318
10U_0805_25V6K

2

1

PC315
10U_0805_25V6K

2

1 CSON1

PC317
0.1U_0402_25V6

Typ
18.006V
17.593V

Max.
18.504V
18.237V

ILIM and external DPM
Min.
3.906A

Close EC
ADP_I

Min.
17.520V
16.967V

Typ
Max.
4.006A 4.108A

27,33

@ PC325
0.1U_0402_16V7K

4

2

3

4

2

Vin Dectector

1
2

2

3

D

PC326
2200P_0402_50V7K
2
1

PQ308
2N7002KW_SOT323-3
2
G

@ PR325
0_0402_5%
1
2

1 CSOP1

1
2
1

+3VALW

PR324
64.9K_0402_1%

1

SUSP#

2

BATT+

3

3

2
1 2

7,31,36,37,38

FSTCHG

1

27

2

5

2 CSON1
PR315
6.8_0603_5%
BQ24735_BATDRV

ACDET
PQ307
PDTC115EU_SOT323-3

PR323
100K_0402_1%
1
2

PC308
0.01U_0402_50V7K

1

SRN 1

2

12

PR314
10_0603_5%
2 CSOP1

PC322
0.01U_0402_25V7K

1

2

2
1
PR321
2M_0402_1%

SRP 1

PR317
316K_0402_1%
2
1
PR320
100K_0402_1%

1

1

VIN

PR318
2M_0402_1%

13

2

ILIM

SCL

ACIN

ACDET

BATDRV

9

ACOK

4

DL_CHG

14

10

5

SRN

SDA

ACOK

ACDRV

8

2
PR316
100K_0402_1%

SRP

IOUT

1

CMSRC

PL302
PR312
10UH_FDSD0630-H-100M-P3_3.8A_20%
0.01_1206_1%
2
4
BQ24735_LX 1
CHG 1
PQ306
SIS412DN-T1-GE3_POWERPAK8-5

GND

15

3
2
1

ACP

7

4

2

PC314
0.1U_0402_25V6

2

EMI@ PC316
EMI@ PR313
680P_0402_50V7K 4.7_1206_5%

3
2
1

2
LODRV

6

27,32,8

3

BQ24735_ACDRV

4

5

1
PR310
0_0603_5%
1
BQ24735_BST 2
17

ACN

ACDET

+3VLP

3

PQ305
SIS412DN-T1-GE3_POWERPAK8-5

PC313
1U_0603_25V6K

16

BTST

18

DH_CHG

BQ24735_LX

1

BQ24735RGRR_QFN20_3P5X3P5
BQ24735_CMSRC

PR306
4.12K_0603_1%

4

DH_CHG-1

PC321
0.1U_0603_25V7K

2

PAD

@

2

PD303
RB751V-40_SOD323-2

REGN

1

HIDRV

21

VCC

PU301

19

2

PHASE

1

PC312
1U_0603_25V6K

PR311
0_0603_5%
2
DH_CHG 1

1

3
1
1
2

BQ24735_ACP

BQ24735_ACN

2

BQ24735_BATDRV 1

1

PC310
0.047U_0402_25V7K
1
2
PR309
10_1206_1%

1

1
2

PD302
BAS40CW_SOT323-3

EMI@ PC307
2200P_0402_50V7K

1
VIN

@EMI@ PC305
0.1U_0402_25V6
2
1

4x4x2

2

3

1

2

EMI@ PL301
1.2UH_PNS40201R2YAF_3A_30%
1
2
PC304
10U_0805_25V6K
2
1

4

2

1

PC306
0.1U_0402_25V6
1
2

PR308
4.12K_0603_1%

1

PR307
4.12K_0603_1%
2
1

2

CHG_B+

PR303
0.02_1206_1%

2

1

PC302
0.1U_0402_25V6

2

1

4

2

@

B+

PC303
10U_0805_25V6K

P2
PQ303
SIS412DN-T1-GE3_POWERPAK8-5
1
2
3
5

1
2
3

5
PC301
2200P_0402_50V7K
2
1

100ppm

P1

PQ302
AON6414AL_DFN8-5

PR304
1_0402_1%

VIN

PR301
3M_0402_5%

PC311
0.1U_0603_25V7K

PR302
1M_0402_5%

1

PQ304
SIS412DN-T1-GE3_POWERPAK8-5
1
2
5
3

2

20

1

PC309
0.1U_0402_25V6

2

4

1

PQ301
2N7002KW_SOT323-3

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Deciphered Date

2013/07/10

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CHARGER

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

Monday, April 08, 2013

Sheet
D

34

of

42

Rev
0.2

5

4

3

2

1

D

D

@ PR415
0_0402_5%
1
2

LDO

5

+3VLP
PC422
4.7U_0603_6.3V6K

1

2

SY8208BQNC_QFN10_3X3

PR416
100K_0402_1%

33

SPOK

1
2

PL402
2

+3VALWP

1

1UH_FDSD0630-H-1R0M-P3_11A_20%

@EMI@ PC423
2

3.3V LDO 150mA~300mA

2

C

1K_0402_1%
2

@

B+

PR405
150K_0402_1%
2
1

4

@
1

PR414
1

PC413
22U_0805_6.3V6M

PG

LX_3V

0.01U_0402_25V7K
1
2
FB-1_3V

PR401
499K_0402_1%
1
2

ENLDO_3V5V

PC414
22U_0805_6.3V6M
2
1

OUT

10

PC428

PC416
22U_0805_6.3V6M
2
1

2

+3VALWP

GND

PR404
PC401
2BST-1_3V
1
2
0_0603_5%
0.1U_0603_25V7K

1

9

1
BST_3V

@ PR413
0_0402_5%
1
2

2

LX

6

3V5V_EN

PC411
22U_0805_6.3V6M
2
1

@

FB_3V

2

BS

3

PR410
1K_0402_1%
1
2
PC426
4.7U_0603_6.3V6K

EN2

3V_EN_R

680P_0603_50V7K 4.7_1206_5%

IN

1

@EMI@ PR409
13V_SN
2
1

PC405
10U_0805_25V6K
2
1

PC408
10U_0805_25V6K
2
1

EMI@ PC410
2200P_0402_50V7K
2
1

EN1

1

8

3V_VIN

IN

PC425
4.7U_0603_6.3V6K

EN1 and EN2 dont't floating

PU401
7

EMI@ PL401
HCB2012KF-121T50_0805
1
2
@EMI@ PC403
0.1U_0402_25V6
2
1

B+

C

Vout is 3.234V~3.366V
TDC=8A
@ PJ401
1

+3VALWP

1

2

2

+3VALW

1ENLDO_3V5V

JUMP_43X118

@ PR411
0_0402_5%

BS

3V5V_EN

3

FB_5V

6

PR403
BST_5V 1

0_0603_5% PC404
2BST-1_5V 1

PC427
6800P_0402_25V7K
1
2
FB-1_5V
0.1U_0603_25V7K
2

PR412
1K_0402_1%
1
2
B

PL403

7

VL

SY8208CQNC_QFN10_3X3

2

+5VALWP

1UH_FDSD0630-H-1R0M-P3_11A_20%
PC412
22U_0805_6.3V6M

LDO

1

LX_5V

4

PC415
22U_0805_6.3V6M
2
1

PG

10

PC418
22U_0805_6.3V6M
2
1

OUT

PC417
22U_0805_6.3V6M
2
1

LX

VCC

1

2

GND

2

5

680P_0603_50V7K 4.7_1206_5%

9

@ PJ402

+5VALWP

1

1

2

2

+5VALW

JUMP_43X118

Vout is 4.998V~5.202V

5V LDO 150mA~300mA

PR407
2.2K_0402_5%
1
2
1

1

PC421
4.7U_0603_6.3V6K

PC420
4.7U_0603_6.3V6K

1

27,33 MAINPWON

EN2

SPOK

2

27,28 EC_ON

EN1

1

VCC_3.3V

IN

2

@

@EMI@ PC402
0.1U_0402_25V6
2
1

EMI@ PC409
2200P_0402_50V7K
2
1

PC407
10U_0805_25V6K
2
1

B

8

5V_VIN

2

PU402

@EMI@ PC424 @EMI@ PR408
2
15V_SN
2
1

EMI@ PL404
HCB2012KF-121T50_0805
1
2
PC406
10U_0805_25V6K
2
1

B+

TDC=8A

@ PR402
2

0_0402_5%

A

A

1
2

PR406
1M_0402_1%

PC419
4.7U_0603_6.3V6K

2

1

3V5V_EN

2012/07/10

Issued Date

EN1 and EN2 dont't floating
5

Compal Secret Data

Security Classification

@

4

2013/07/10

Deciphered Date

Title

Compal Electronics, Inc.
3VALW/5VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Monday, April 08, 2013
Date:

Rev
0.2

V5WE2 M/B LA-9532P Schematic

3

2

Sheet
1

35

of

42

A

STATE

1.35VP

1
2

1
2

EMI@ PC503
2200P_0402_50V7K

2

PC502
10U_0805_25V6K

1
3
2
1
2

1

PR505
5.1_0603_5%

+3VALW

1

1

ESD@ PC507
680P_0402_50V7K

2

1

2

ESD@ PR503
4.7_1206_5%

+

PC506
330U_2.5V_M

+5VALW

@ PJ504
1

1

+1.35VP

2

PC509
1U_0603_10V6K
2
1

10

DCR:8.5mΩ

Rds=4.2mΩ(Typ)
5.0mΩ(Max)

12
11

PR506
10K_0402_1%
2
1

PHASE
PGOOD

TON

S5

PR504
8.45K_0402_1%
2
1

+1.35VP

6.6x7.3x3.8 TAI-TECH

2

5

16

17
UGATE

18
BOOT

19
VLDOIN

4

LG_1.35V

PQ503
S TR MDU1512RH 1N POWERDFN56-8

PL501
S COIL 1.5UH 20% TMPB0604M-1R5MN-Z01 11A
1
2

14
13

PQ502
MDV1525URH_PDFN33-8-5

5
3
2
1

1

JUMP_43X79

VDD

15

B+

@ PC511
0.1U_0402_16V7K

1

2

+1.35V

1

2

2

JUMP_43X118

PGOOD_1.35V

@ PJ506
1

+0.675VSP

1

2

1

2

+0.675VS

JUMP_43X79

FB=0.75V
To GND = 1.5V
To VDD = 1.8V

2

S

2

@ PJ505
1

@

PR509
8.06K_0402_1%
2
1

PR510
10K_0402_1%

1

JUMP_43X118
PC510
1U_0603_10V6K

PR508
887K_0402_1%
2
1 1.35V_B+

2

1

D

2

1

@ PQ501
2N7002KW_SOT323-3
2
SUSP
G

S3

S5

S0

Hi

Hi

On

On

S3

Lo

Hi

On

On

Lo

Lo

S4/S5

20

@ PR507
0_0402_5%
2

CS
VDDP

VDDQ
FB

1
1

@ PC512
0.1U_0402_16V7K

31 SUSP

RT8207MZQW_WQFN20_3X3

6

27,31 SYSON

PGND

VTTREF

@ PR501
680K_0402_1%
1
2

3

1

PC508
0.033U_0402_16V7K

GND

1

7,31,34,37,38 SUSP#

+1.35VP

2

15 DDR_VTT_PG_CTRL

5

VTTSNS

9

4

+VTT_REFP

LGATE

S5_1.35V 8

3

VTTGND

S3

1

PAD

PC504
0.1U_0603_25V7K
1
BST_1.35V-1 2

LX_1.35V

VTT

1

PU501
21

2

@ PR513
0_0402_5%
1
2

PR502
2.2_0603_5%
1
BST_1.35V 2

靠近Output Cap PAD

S3_1.35V 7

2

1

PC501
10U_0805_25V6K

+0.675VSP

PC505
10U_0805_25V6K

120%

2

115%

4

UG_1.35V

2

@

2

PJ503

1

+1.35VP

2011/9/19

OVP=110%

EMI@ PL507
HCB2012KF-121T50_0805
2
1

1.35V_B+

ESD@ PC521
0.1U_0402_25V6

+1.35VP
Ipeak = max{ 0.7*Ibudget, 1st +2nd max loading}
Ipeak = max{ 12.34*0.7 ,
4.2+8.14
}
Ipeak=12.34A ; 1.2Ipeak=14.808A ;Imax=8.638A
1/2Delta I=0.7353A (F=300K Hz)
PR504=(1.2Ipeak-1/2Delta I) *Rds(on)(max)*1.2/9uA=8.45Kohm
choose PR504=8.45Kohm (for safety >1.2Ipeak)
Rds(on)=5.0m ohm(max) ; Rds(on)=4.2m ohm(typical)
Ilimit_min=(8.366K*9uA)/(5.0m*1.2)=15.058A
Ilimit_max=(8.535K*11uA)/(4.2m*1.2)=22.352A
Iocp=Ilimit+1/2Delta I=15.79A~23.09A
Iocp(min)>1.2Ipeak

VTT_REFP

0.675VSP
On
Off
(Hi-Z)

Off
Off
Off
(Discharge) (Discharge) (Discharge)

Issued Date

Note: S3 - sleep ; S5 - power off

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Deciphered Date

2013/07/10

Title

1.35VP/0.675VSP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.2

V5WE2 M/B LA-9532P Schematic

Date:

A

Monday, April 08, 2013

Sheet

36

of

42

5

4

3

2

1

D

D

C

C

1

+3VS

2

@ PC526
1U_0402_6.3V6K

Note:Iload(max)=3A

1

1

PC524
22U_0805_6.3V6M

1

PR521
22.6K_0402_1%

2

@ PR522
22K_0402_5%

PC527
0.1U_0402_16V7K

@

B

2

2

FB_1.5VSP

2

+1.5VSP_ON

PC525
22U_0805_6.3V6M

1

FB=0.8V

2

1

PR519
20K_0402_1%

+1.5VSP

1

SUSP#

2

1

27,31,34,36,38

@ PR523
0_0402_5%
1
2

FB

3
4

2

EN
POK

VOUT
VOUT
GND

8
7

VCNTL
VIN
VIN

2

PC528
4.7U_0603_6.3V6K

1

B

PC529
0.022U_0402_16V7K
2
1

PU503
APL5930KAI-TRG_SO8

6
5
9

Ien=10uA, Vth=0.3V, notice
the res. and pull high
voltage from HW

@ PJ508

A

+1.5VSP

1

1

2

2

A

+1.5VS

JUMP_43X39

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.5VSP
Rev
0.2

V5WE2 M/B LA-9531P Schematic

Date:

5

4

3

2

Monday, April 08, 2013

Sheet
1

37

of

42

5

4

3

2

1

+1.05VSP Ipeak=5.36A ; Imax=3.752A ; 1.2Ipeak=6.432
Delta I=0.xxxxA=>1/2Delta I=0.xxxxA,F= 800K Hz(typ)

PR603
1K_0402_1%
2
1

D

SUSP#

D

27,31,34,36,37

@ PR607
1M_0402_1%
1
2

B+

PC606
0.1U_0402_16V7K
1
2

2

2

1

PC629
22U_0805_6.3V6M

1
2

PC628
22U_0805_6.3V6M

1
2

1

PC627
22U_0805_6.3V6M

@

2

@EMI@ PC607
680P_0402_50V7K

VFB=0.6V

VCCST_PWRGD

C

PR605
100K_0402_1%
2
1
PC609
4700P_0402_25V7K
2
1

@ PJ602
1

+1.05VSP

1

2

2

+1.05VS_VTT

JUMP_43X118
@ PJ603
1
2
1
2

1

11,27

PC608
4.7U_0603_6.3V6K

1
+3VS

PC601
4.7U_0603_6.3V6K
2
1

2
PR618
10K_0402_1%
2
1

C

@EMI@ PR604
4.7_0805_5%

SY8208DQNC_QFN10_3X3

2

+3VALW

5

PC626
22U_0805_6.3V6M

7

1

LDO

FB_+1.05VSP

+1.05VSP

2

1
1

@ PC614
0.1U_0402_16V7K

2
PR619
1M_0402_1%

4

PL601
0.68UH_PCMC063T-R68MN_15.5A_20%
1
2

PC625
22U_0805_6.3V6M

PG

FB

SW_+1.05VSP

1

BYP

BST_+1.05VSP

2

ILMT

6
10

PR602
PC605
0_0603_5% 0.1U_0603_25V7K
1
2
1
2

PC624
22U_0805_6.3V6M

LX

EN_+1.05VSP

1

GND

1

1 2

PC623
10U_0805_25V6K
2
1

PC604
10U_0805_25V6K
2
1

EMI@ PC603
2200P_0402_50V7K
2
1

EN
BS

9

3

1
2
@ PR613
10K_0402_1%

+3VS

IN

2

@EMI@ PC602
0.1U_0402_25V6
2
1

PU601
8

JUMP_43X118

2

PR608
127K_0402_1%

1

+3VS

2

@ PC615
1U_0402_6.3V6K

1

1

PC612
22U_0805_6.3V6M

@

2

2

+1.8VSP_ON

PR611
15.8K_0402_1%
2

@ PR612
22K_0402_5%
2

2

@ PC616
0.1U_0402_16V7K

FB_1.8VSP

1

FB=0.8V

1

@ PR610
0_0402_5%
2

B

+1.8VS
PC613
22U_0805_6.3V6M

1
PR609
20K_0402_1%

1

1

2

1

20 6511_PWR_EN

FB

2

EN
POK

GND

8
7

2

PC610
4.7U_0603_6.3V6K

1

B

PC611
0.022U_0402_16V7K
2
1

Note:Iload(max)=3A
PU602
APL5930KAI-TRG_SO8
6
5 VCNTL
3
VOUT 4
9 VIN
VIN
VOUT

Ien=10uA, Vth=0.3V, notice
the res. and pull high
voltage from HW
A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

2013/07/10

Deciphered Date

Title

+1.05VSP/1.8VSP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

38

of

42

Rev
0.2

5

4

3

2

1

3

VGATE

1

1

1

+3VS

@ PR724
0_0402_5%
PC746
1U_0402_6.3V6K

PC706
68U_25V_M_R0.36

1
2

1
2

@EMI@ PC705
0.1U_0402_25V6

PR715
2.21K_0402_1%
2
1

PC711
0.082U_0402_16V7K
1
2

Use X7R is better or far away inductor.

Close choke.

B value:3435K

C

CSN1

Maximum current: 32A

@ PR725
2K_0402_1%

2

1

PC741
0.1U_0402_16V7K

1
PR731
130_0402_1%

1

PR730
75_0402_1%

@

2

2

51622_VREF

2

1
PR729
54.9_0402_1%

+1.05VS_VTT

1
2

B

1

PR716
24.9K_0402_1%
1
2
PH702
PR717
10K_0402_1%_TSM0A103F34D1RZ
3.01K_0402_1%
1
2
1
2

11,8

2

2

VDD

Close to PWR IC

11
11

VR_SVID_CLK

2

3

DCR:0.82mΩ±5%

1

2

VR_HOT#
V5A

CSP1-1 2

CSP1

VR_ALERT#

1

PC743
PR728
PC744
1500P_0402_50V7K 10K_0402_1% 0.33U_0402_10V6K
2
1 1
2

D

PC712
0.082U_0402_16V7K
1
2

2

4

EMI@ PC714
EMI@ PR714
680P_0402_50V7K 4.7_1206_5%

1 2
PR734
10K_0402_1%

5

VR_SVID_DATA

2

COMP
PR727
3.48K_0402_1%
2
1

EMI@ PC704
2200P_0402_50V7K

1
2

PC709
10U_0805_25V6K

1

2
PWM1

11

33

32

31

30

29

28

27

26

25
PR726
10K_0402_1%
2
1

2

CPU_PHASE1
PC740
1U_0603_10V6K

1

6

DROOP
PC742
100P_0402_50V8J
2
1

2

B+

+CPU_CORE

9

10
F-IMAX

12

13

14

11
B-RAMP

OCP-I

IMON

THERM

O-USR
VDIO

VR_ON
SKIP#

2

VFB

VDD

8
7

PAD

24

PGOOD

GFB

ALERT#

VFB

N/C

N/C

VCLK

23

TPS51622RSM_QFN32_4X4~D

PU3

VR_HOT#

GFB

PWM2

GND

VCC_SENSE

0_0402_5%
2
0_0402_5%
2

PWM1
PU701

CSP2

V5A

11

@ PR721
1
@ PR722
1

CSN2

VREF

VSS_SENSE

15

16
22
11

SLEWA

VBAT
21

+3VS

SKIP#

COMP

C

VR_ON

CSN1

+

PL702
0.22UH_PCMB104T-R22MS_35A_20%
1
4

+5VS

1

PU702
CSD97374CQ4M_SON8_3P5X4P5
5
1 SKIP#
SKIP# 2
6 VIN
BOOT_R VDD 3
PGND1 4
7
BOOT
VSW
8
9 PWM
PGND2

1

2.2_0603_5%
1CPU_BOOT1
0.1U_0603_25V7K
2CPU_BOOT1-1
PWM1

2

PR701
2
PC701
1

CSP1

DROOP

17

1

2

EMI@ PC749
1000P_0402_50V7K

F-IMAX

PR713
10K_0402_1%
1
2 VBAT

CSP1

EMI@ PL701
HCB2012KF-121T50_0805
2
1

1

B-RAMP

O-USR

18
CSN1
@ PR718 0_0402_5%
2
1
19
@ PR719 0_0402_5%
1
2
20

@

OCP-I

PR712
39K_0402_1%
2
1

CPU_B+

PC703
10U_0805_25V6K

1
2

PR709
PR710
392K_0402_1% 56K_0402_1%
1
2
1
2

@ PR711
10K_0402_1%
1
2 SLEWA

CPU_B+

PC702
10U_0805_25V6K

THERM

PC747
0.1U_0402_25V6
2
1

D

@

PR707
PR704
150K_0402_1% 8.87K_0402_1%
2
1
2
1

PC748
4700P_0402_25V7K
1
2

2

PR708
10K_0402_1%
2
1

PR705
PR702
150K_0402_1% 100K_0402_1%
2
1
2
1

1

Close MOS.

B value:4250K

PR706
PR703
39K_0402_1% 270K_0402_1%
2
1
2
1

51622_VREF
PH705
100K_0402_1%_TSM0B104F4251RZ

11

27

+5VS

PR732
10_0603_5%
PC745
1U_0402_6.3V6K

B

Consider use 0603 for inrush power.

VIN

12V-20V

MAX current

32A

Thermal current

10A

Dynamic current

27A

Over current level

45A

Switching frequency

600KHz

Boot voltage

1.7V

DC Load- line

2m Ohm

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

2013/07/10

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+CPU_CORE

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Monday, April 08, 2013

Sheet
1

39

of

42

Rev
0.2

4

3

2

PWR Rule
CPU DCLL=1.5m ohm dedign 330uF/9m *0, 22uF *30

1

1
2
1
2

1
2
1
2

1
2
1
2

1
2
1
2

1
2
1

2
1
2

2

1

1
2
1

2
1
2

D

For BOT side

PC927
22U_0805_6.3V6M

PC926
22U_0805_6.3V6M

PC925
22U_0805_6.3V6M

PC924
22U_0805_6.3V6M

PC923
22U_0805_6.3V6M

PC922
22U_0805_6.3V6M

PC921
22U_0805_6.3V6M

PC920
22U_0805_6.3V6M

@

PC909
22U_0805_6.3V6M

PC908
22U_0805_6.3V6M

@

PC907
22U_0805_6.3V6M

PC906
22U_0805_6.3V6M

PC905
22U_0805_6.3V6M

PC904
22U_0805_6.3V6M

D

PC903
22U_0805_6.3V6M

PC902
22U_0805_6.3V6M

1

+CPU_CORE

2

5

+CPU_CORE

2

1

2

For TOP side

C

PC956
22U_0805_6.3V6M

2

1

PC941
22U_0805_6.3V6M

2

1

PC955
22U_0805_6.3V6M

1

2

PC940
22U_0805_6.3V6M

2

2

1

PC954
22U_0805_6.3V6M

1

1

PC939
22U_0805_6.3V6M

2

2

PC953
22U_0805_6.3V6M

1

1

PC938
22U_0805_6.3V6M

2

2

@

PC952
22U_0805_6.3V6M

2

1

@

1

PC937
22U_0805_6.3V6M

1

PC951
22U_0805_6.3V6M

@

2

PC950
22U_0805_6.3V6M

2

PC949
22U_0805_6.3V6M

1

2

1

PC936
22U_0805_6.3V6M

22u *27, @*5

C

1

PC935
22U_0805_6.3V6M

2

PC934
22U_0805_6.3V6M

1

B

B

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

Issued Date

Deciphered Date

2013/07/10

Title

CPU_CORE_CAP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V5WE2 M/B LA-9532P Schematic

5

4

3

2

Date:

Monday, April 08, 2013

1

Sheet

40

of

42

Rev
0.2

A

B

C

D

E

1

1

2

2

3

3

4

4

2012/07/10

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/07/10

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PIR-HW

V5WE2 M/B LA-9532P Schematic

Date:

A

B

C

D

Sheet

Monday, April 08, 2013
E

41

of

42

Rev
0.2

5

4

3

2

Version change list (P.I.R. List)
Item
1
D

Fixed Issue

Reason for change

Module Design

2

Change RTC type to non-charge

3

TPS51622 update to ES2.1

4
5
6
7

EMI request
EMI request

8
9
10
11
12
13
14

Module Design change 3/5V solution

Costdown

+1.05V ripple close
upper and mean too low

ESD request
ESD request

Compensation modify
Cut-in EMI solution
EMI confirm remove

Rev.

PG#

1

Page 1 of 2
for PWR

Modify List

Date

31

Un-pop PR112, PR113

39

Change PR701 to 2.2, PR703 to 270K, PR727 to 3.48K
Un-pop PC742

11/13 DVT

SY8208B/C update

35
35

Adjust output voltage and add Cff

36

Improve CPU transient character
Tune sequence

40
35

11/16
11/20
Delete PL102, PC103, PC101, PL202, PC201 and PL703
11/26
Change PL402, PL403 from 5x5x3 to 7x7x3 12/13
Add PR411, PR413
12/22
Add PC609 into 4700P
12/22
Change PR608 from 133K to 127K
01/09
Unpop PC926
Change PC428 from 4700p to 10n,
02/04

35
32
36

Change PR507,PR513,PR523 to R-pad
Add PR416
Add PC101 into 0.1uF
Add PC521, PR503, PC507

0 ohm reduce
Provide 3/5V PG signal to EC

Phase

11/13 DVT

3/5V

EMI
EMI

Add PR313, PC316, PR714, PC714, PC749

PC427 from 0.047u to 6.8n

02/22
02/22
02/26
02/26

DVT
DVT
DVT
DVT2
DVT2

PVT
PVT
PVT
PVT

D

DVT2
DVT2
PVT

C

B

C

12

B

13
14

15
16

A

17

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

2013/07/10

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PIR (PWR)

V5WE2 M/B LA-9532P Schematic

Date:

5

4

3

2

Sheet

Monday, April 08, 2013
1

42

of

42

Rev
0.2

www.s-manuals.com



---

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XMP Toolkit                     : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39
Producer                        : Acrobat Distiller 6.0 (Windows)
Create Date                     : 2013:04:29 10:22:19+08:00
Modify Date                     : 2014:10:12 21:57:33+03:00
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Format                          : application/pdf
Title                           : Compal LA-9532P - Schematics. www.s-manuals.com.
Creator                         : 
Subject                         : Compal LA-9532P - Schematics. www.s-manuals.com.
Page Count                      : 43
Keywords                        : Compal, LA-9532P, -, Schematics., www.s-manuals.com.
Warning                         : [Minor] Ignored duplicate Info dictionary

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