Compal LA 9591P Schematics. Www.s Manuals.com. R0.4 Schematics

User Manual: Motherboard Compal LA-9591P VAUA0 Goliad 14 - Schematics. Free.

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Page Count: 59

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BOM P/N :
PCB NO :
COMPAL CONFIDENTIAL
MODEL NAME :
Goliad 14"
REV : 1.0 (A00)
@ : Nopop Component
VAUA0
2013-05-17
CONN@ : Connector Component
Haswell ULT
LA-9591P (DAA00005W10)
4319LK31L01
GPIO MAP: 3.0
1@ : M/B SPI ROM
2@ : TAA/B SPI ROM
EMC@ : EMI, ESD and RF Component
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
XDP@ : XDP Component
3@ : M/B for non support WWAN
5@ : TAA/B SPI 4M ROM Component
Vpro
non-Vpro
SPI on M/B TAA
1@/3@/4@/EMC@ 2@/3@/5@/EMC@
1@/EMC@ 2@/EMC@
4@ : M/B SPI 4M ROM Component
7@ : M/B for Non-Vpro
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Cover Sheet
1 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Cover Sheet
1 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Cover Sheet
1 58Friday, May 17, 2013
Compal Electronics, Inc.
Part Number Description
DAA00005W10 PCB 0VN LA-9591P REV1 M/B
MB PCB
Part Number Description
DAA00005W10 PCB 0VN LA-9591P REV1 M/B
MB PCB
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCI Express BUS
PCIE5_L0
HD Audio I/F
WWAN+mSATA
Combo Jack
Transformer
SATA0
WiFi ON/OFF
Automatic Power
Switch (APS)
CPU XDP Port
Power On/Off
SW & LED
DC/DC Interface
Memory BUS (DDR3L)
BANK 0, 1, 2, 3
DDR3L-DIMM X2
Goliad 14 Block Diagram
KB and TP CONN
BCM5882
USH
Smart Card
RFID Dig. MIC
INT.Speaker
ALC3226
HDA Codec
LAN SWITCH
PI3L720
Intel Clarkville
I218LM
TDA8034HN
eDP CONN
Reduce Level
Shifter
USB3.0/2.0
DOCKING
PORT
SPI
To Docking side
INTEL
HASWELL ULT
SATA1
DAI
BC BUS
Fingerprint
CONN
FP_USB
SMSC KBC
MEC5075
Full Mini CardWLAN+BT/
IO/B
RJ45
1333/1600MHz
W25Q32BVSSIQ
64M 4K sector
32M 4K sector
W25Q64CVSSIQ
SD4.0
O2 Micro OZ777FJ2LN
Card reader
Discrete TPM
ECE5048
SMSC SIO
USH board
AT97SC3204
PAGE 34
PAGE 30 PAGE 30
PAGE 37 PAGE 37
PAGE 36
PAGE 38
PAGE 29
PAGE 7
PAGE 26
PAGE 26
PAGE 33
SATA Conn60GHz
Mini-DP
DOCK _USB2.0[5]
PI3USB3102
PAGE 32
USB3&2 Switch
PAGE 22
PAGE 27
PAGE 23
PAGE 28
PAGE 28
SW_USB2.0[0]
USB
SW_USB2.0[5]
USB3.0[3]
PCIE3 PCIE4
SATA3
USB2.0[6]USB2.0[2]
eDP
DDI1
DP
DP
FAN CONN
DOCK_USB3.0[3]
DOCK_USB2.0[0]
USB2.0[5]
DOCK_USB2.0[5]
USB2.0[4]
DAI
PAGE 25
PAGE 35
USB2.0[7]
PAGE 9
PAGE 9
PAGE 40
PAGE 40
Vol bottom SW
PAGE 39
PAGE 31 PAGE 31
PAGE 35
PAGE 6~17
PAGE 18 19
PAGE 22 Trough eDP Cable
Camera
USB2.0[3]
IO/B
PAGE 22
PAGE 35
PAGE 29
PAGE 20
Near Field
Communications con
NX3DV221
PAGE 33
USB20 Switch
DOCK _USB2.0[0]
Trough eDP Cable
LPC
Touch Screen
Conn
PCIE6_L0
PAGE 25
Free Fall sensor
PAGE 27
Pericom
PI3VDP12412
PAGE 21
For MB/Dock
Video Switch
IDT VMM2320
DDI2
DP
DP
VGA
SW_USB3.0[3]
DOCK_USB3.0[3]
PAGE 33
USB3.0/2.0+PS
USB2.0[0]
PAGE 35
IO/B
USB3.0/2.0
USB2.0[1]
SLGC55584A
USB POWER SHARE
PAGE 33
PAGE 23
HDMI CONN
HDMI
PAGE 22
Trough eDP Cable
USB3.0[2]
USB3.0[1]
DOCKED_LIO_EN
DOCKED
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Block diagram
2 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Block diagram
2 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Block diagram
2 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM TABLE
PCIE
PCIE 1
PCIE 2
PCIE 3
POWER STATES
PCIE 4
PCIE 5
LOM
+3.3V_M +3.3V_M
(M-OFF)
ON
ON
ON
ON
OFF
OFF
OFFOFF
+3.3V_SUS+5V_ALW +5V_RUN
+3.3V_ALW_PCH
+1.35V_MEM
S0
S3
S5 S4/AC don't exist
ON
power
plane
S5 S4/AC
State
OFFON
ON
ON
ON ON
OFF
OFF
OFF
OFFOFF
+3.3V_RTC_LDO
+1.05V_M
WLAN + BT
WWAN
CAMERA
USH->SMART CARD
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
HSW
ULT
+1.05V_M+3.3V_RUN
+0.675V_DDR_VTT
+VCC_CORE
+1.05V_RUN
WLAN (WiGi)
NA
DOCK
SATA
SATA 0
DESTINATION
HDDSATA 1
SATA 2
SATA 3
0
1
BIO
NA
USH
need to update Power Status and
PM Table
JUSB2 // E-Dock 2
TOUCH
IO/ JUSB3
OFF
OFF
OFF
LOW
LOW
OFF
OFF
S0 (Full ON) / M0
SLP
S3#
SLP
S5#
HIGH
Signal
State
SLP
S4#
HIGH HIGH
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
PLANE
RUN
PLANE
CLOCKS
ON ON ON
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
SLP
A#
HIGH
HIGH
LOW HIGH HIGH
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
S4 (Suspend to DISK) / M-OFF HIGH
JUSB1-->Rear left
JUSB3-->IO-->Right
JUSB2-->Rear Right//DOCK
USB3.0
USB3.0 1
USB3.0 2
USB3.0 3
+3.3V_ALW
MMI (CARD READER)
PCIE 6 WWAN(PP/mSATA)
JUSB1 // E-Dock 1
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Port assignment
3 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Port assignment
3 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Port assignment
3 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATTERY +PWR_SRC
ADAPTER FDC654P
+BL_PWR_SRC
EN_INVPWR
CHARGER
+3.3V_ALW
TPS51225 +5V_ALW
ALWON
RUN_ON
+3.3V_RUN
(Q2)
(PU100)
+VCC_CORE
TPS51622
(PU500)
+1.35V_MEM
SUS_ON
0.675V_DDR_VTT_ON
RT8207
(PU11)
+0.675V_DDR_VTT
+3.3V_M
TPS22966
A_ON
+5V_RUN
RUN_ON
H_VR_EN
TPS22966
(U31)
+3.3V_RUN_VMM
+3.3V_SUS
SUS_ON
(U45)
TPS22966
(U46)
TPS22966
(U18)
RUN_ON
+5V_RUN
_AUDIO
+3.3V_RUN
_AUDIO
RUN_ON
(Q1)
LP2301ALT1G
(Q3)
LP2301ALT1G
3.3V_TS_EN
+3.3V_CAM
+5V_TSP
+3.3V_ALW_PCH
PCH_ALW_ON
TPS22966
(U43)
RUN_ON
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN_VMM
3.3V_CAM_EN#
AUX_EN_WOWL
MCARD_WWAN_PWREN
+3.3V_mSATA
_WWAN
+3.3V_WLAN
TPS22966
(U3)
TPS22966
+3.3V_LAN
3.3V_HDD_EN
+3.3V_HDD
(U22)
SIO_SLP_LAN#
DOCKED
+3.3V_RUN
APL3512
(U9)
EN_LCDPWR
+LCDVDD
USB_SIDE_EN#
(IO/B)
G471
+USB_IO_PWR
PWRSHARE_EN#
(U35)
G471
ESATA_USB_PWR_EN#
+5V_USB_
CHG_PWR
(U35)
G471
+USB_PWR
SI3456
(Q125) +1.05V_MOD_PHY
MPHYP_PWR_EN
+1.05V_M
A_ON
(PU300)
TPS51212
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Power rails
4 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Power rails
4 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Power rails
4 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MEC 5075
MEM_SMBDATA
MEM_SMBCLK
KBC
AH1
AP2
+3.3V_ALW_PCH
2.2K
2.2K
200
DIMMA
202
DIMMB
200
202
AN1
AK1
LAN_SMBCLK
LAN_SMBDATA
+3.3V_ALW
129
127
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT
DOCKING
2.2K
B4
A3
1A
1A
A4
B5
2.2K
2.2K
LCD_SMBCLK
LCD_SMDATA
1B
1B
1C
1C
B59
A56
+3.3V_ALW
2.2K
2.2K
100 ohm
100 ohm BATTERY
CONN
7
6
PBAT_SMBCLK
PBAT_SMBDAT
3A
1E
1E
2B
2B
B50
1G
1G
A47
B7
A7
+3.3V_ALW
2.2K
2.2K
2D
2D
BAY_SMBDAT
BAY_SMBCLK
A49
B52
CARD_SMBCLK
CARD_SMBDAT
+3.3V_ALW
2.2K
2.2K
LOM
CHARGER_SMBCLK
CHARGER_SMBDAT
Charger
SML1_SMBDATA
PCH
SML1_SMBCLK
AU3AH3
A50
B53
3A
B6A5
+3.3V_ALW_PCH
2.2K
2.2K
USH
+3.3V_SUS
USH_SMBCLK
USH_SMBDAT
+3.3V_ALW
10K
10K
53
51
XDP
M9
L9
9
8
31
28
G Sensor
2N7002
2N7002
+3.3V_RUN
10K
10K
4
6
2.2K
2.2K
SMBUS Address [0x9a]
+3.3V_ALW
WWAN
32
30
B48
B49
+3.3V_ALW
2.2K
2.2K
GPU_SMBDAT
GPU_SMBCLK
2A
2A
NFC
1K
NFC_SMBCLK
NFC_SMBDATA
0ohm
0ohm
0ohm
0ohm
SML0CLK
SML0DATA
+3.3V_ALW_PCH
1K
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
SMbus Block diagram
5 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
SMbus Block diagram
5 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
SMbus Block diagram
5 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
High - Enable Internal VRs
Low - Enable External VRs
INTVRMEN - INTEGRATED SUS 1.05V VRM
ENABLE
CMOS setting
Shunt Clear CMOS
Keep CMOS
TPM setting
Shunt Clear ME RTC Registers
Keep ME RTC Registers
ME_CLR1
Open
CMOS_CLR1
Open
CMOS place near DIMM
CAD note:
Place the resistor within 500 mils of the PCH. Avoid
routing next to clock pins.
SATA Impedance Compensation
LOW = ENABLE (DEFAULT)
HIGH = DISABLE
FLASH DESCRIPTOR SECURITY OVERRIDE
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
WWAN mSATA
HDA for Codec
Reserve for EMI
DOCK
SATA HDD
+1.05V_M_JTAG
HDD_DET#
INTRUDER#
mCARD_PCIE_SATA#
PCH_AZ_BITCLK
PCH_AZ_BITCLK
PCH_AZ_CODEC_SDIN0
PCH_AZ_RST#
PCH_AZ_RST#
PCH_AZ_SDOUT
PCH_AZ_SDOUT
PCH_AZ_SDOUT
PCH_AZ_SYNC
PCH_AZ_SYNC
PCH_INTVRMEN
PCH_INTVRMEN
PCH_JTAG_JTAGX
PCH_JTAG_TCK
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_JTAG_TMS
PCH_JTAG_TRST#
PCH_RTCRST#
PCH_RTCX1PCH_RTCX1_R
SATA_ACT#
SATA_COMP
SATA_COMP
SATA_IREF
SRTCRST#
PCH_RTCX2
MPCIE_RST#
HDD_DET#
+RTC_CELL
+RTC_CELL
+PCH_ASATA3PLL
+PCH_ASATA3PLL
+3.3V_ALW_PCH
+3.3V_RUN
+1.05V_M
PCH_AZ_CODEC_SDIN0<26>
ME_FWP<36>
PCH_AZ_CODEC_SYNC<26>
PCH_AZ_CODEC_BITCLK<26>
PCH_AZ_CODEC_RST#<26>
PCH_AZ_CODEC_SDOUT<26>
SATA_ACT# <40>
PCH_JTAG_TDI<9>
PCH_JTAG_TDO<9>
PCH_JTAG_TMS<9>
PCH_RTCRST#<9>
PCH_JTAG_TCK<9>
PCH_JTAG_TRST#<9>
PCH_JTAG_JTAGX<9>
PCH_GPIO36 <12>
SATA_PTX_MSATARX_P3 <31>
SATA_PTX_MSATARX_N3 <31>
SATA_PRX_MSATATX_P3 <31>
SATA_PRX_MSATATX_N3 <31>
MCARD_PCIE_SATA# <36>
SATA_PRX_DKTX_P0_C <34>
SATA_PTX_DKRX_N0_C <34>
SATA_PTX_DKRX_P0_C <34>
SATA_PRX_DKTX_N0_C <34>
SATA_PTX_DRX_P1_C <25>
SATA_PTX_DRX_N1_C <25>
SATA_PRX_DTX_P1_C <25>
SATA_PRX_DTX_N1_C <25>
MPCIE_RST# <12,31>
HDD_DET# <25>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (1/12)
6 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (1/12)
6 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (1/12)
6 58Friday, May 17, 2013
Compal Electronics, Inc.
RC25 33_0402_5%RC25 33_0402_5%
1 2
T2 @PAD~D T2 @PAD~D
RC9 1K_0402_5%RC9 1K_0402_5%
1 2
RC11100K_0402_5% RC11100K_0402_5%
1 2
RC5
10M_0402_5%
RC5
10M_0402_5%
12
YC1
32.768KHZ_12.5PF_Q13FC135000040
YC1
32.768KHZ_12.5PF_Q13FC135000040
12
CC2
18P_0402_50V8J
CC2
18P_0402_50V8J
1 2
RC23 33_0402_5%RC23 33_0402_5%
1 2
T3@PAD~DT3@PAD~D
RC16
0_0603_5%
@
RC16
0_0603_5%
@
12
RC22@51_0402_1%RC22@51_0402_1%
12
T1 @PAD~D T1 @PAD~D
RC10@1K_0402_1%RC10@1K_0402_1%
12
RC18 51_0402_1%RC18 51_0402_1%
12
CC4 1U_0402_6.3V6K
CC4 1U_0402_6.3V6K
1 2
RC7 1M_0402_5%RC7 1M_0402_5%
1 2
RC3@1K_0402_5%RC3@1K_0402_5%
1 2
RC1210K_0402_5% RC1210K_0402_5%
1 2
ME1
@
SHORT PADS~DME1
@
SHORT PADS~D
1
122
CC1
18P_0402_50V8J
CC1
18P_0402_50V8J
1 2
CC5@
27P_0402_50V8J
CC5@
27P_0402_50V8J
12
RC193.01K_0402_1% RC193.01K_0402_1%
1 2
T4@PAD~DT4@PAD~D
RC26 33_0402_5%
EMC@
RC26 33_0402_5%
EMC@
1 2
RC2@
330K_0402_1%
RC2@
330K_0402_1%
12
RC20 51_0402_1%RC20 51_0402_1%
12
CMOS1
@
SHORT PADS~DCMOS1
@
SHORT PADS~D
1
122
RC1
330K_0402_1%
RC1
330K_0402_1%
12
RC8 20K_0402_5%RC8 20K_0402_5%
1 2
CC3 1U_0402_6.3V6KCC3 1U_0402_6.3V6K
1 2
RC24 33_0402_5%RC24 33_0402_5%
1 2
T5@PAD~DT5@PAD~D
RC17 51_0402_1%RC17 51_0402_1%
12
SATAAUDIO
RTC
JTAG
HASWELL_MCP_E
Rev1p2
UC1E
5 OF 19
SATAAUDIO
RTC
JTAG
HASWELL_MCP_E
Rev1p2
UC1E
5 OF 19
INTVRMEN
AV7
SRTCRST
AV6
RTCRST
AU7
RTCX1
AW5
SATA_RN0/PERN6_L3 J5
SATA_RP0/PERP6_L3 H5
SATA_TN0/PETN6_L3 B15
SATA_TP0/PETP6_L3 A15
SATA_RP1/PERP6_L2 H8
SATA_RN1/PERN6_L2 J8
SATA_TN1/PETN6_L2 A17
SATA_TP1/PETP6_L2 B17
SATA_RP2/PERP6_L1 H6
SATA_RN2/PERN6_L1 J6
SATA_TN2/PETN6_L1 B14
SATA_TP2/PETP6_L1 C15
SATA_RN3/PERN6_L0 F5
SATA_RP3/PERP6_L0 E5
SATA_TN3/PETN6_L0 C17
SATA_TP3/PETP6_L0 D17
SATA0GP/GPIO34 V1
SATA1GP/GPIO35 U1
SATA2GP/GPIO36 V6
SATA3GP/GPIO37 AC1
SATA_IREF A12
SATA_RCOMP C12
INTRUDER
AU6 RTCX2
AY5
JTAGX
AE63
SATALED U3
I2S1_SCLK
AY8
RSVD
AV2
RSVD
AL11
RSVD
AC4
HDA_BCLK/I2S0_SCLK
AW8
HDA_SYNC/I2S0_SFRM
AV11
HDA_RST/I2S_MCLK
AU8
HDA_SDI0/I2S0_RXD
AY10
HDA_SDO/I2S0_TXD
AU11 HDA_SDI1/I2S1_RXD
AU12
HDA_DOCK_EN/I2S1_TXD
AW10
HDA_DOCK_RST/I2S1_SFRM
AV10
PCH_TRST
AU62
PCH_TCK
AE62
PCH_TDI
AD61
PCH_TDO
AE61
PCH_TMS
AD62 RSVD K10
RSVD L11
RC14@0_0402_5%RC14@0_0402_5%
12
RC4@0_0402_5%RC4@0_0402_5%
1 2
RC6 20K_0402_5%RC6 20K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
64Mb Flash ROM
32Mb Flash ROM
Reserve for EMI
TAA Config
WWAN (Mini Card 1)--->
MMI --->
WLAN (Mini Card 2)--->
10/100/1G LAN --->
CLK_BIASREF
CLK_BIASREF
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
MCP_TESTLOW1
MCP_TESTLOW1
MCP_TESTLOW2
MCP_TESTLOW2
MCP_TESTLOW3
MCP_TESTLOW3
MCP_TESTLOW4
MCP_TESTLOW4
MEM_SMBCLK
MEM_SMBCLK
MEM_SMBCLK
MEM_SMBDATA
MEM_SMBDATA
MEM_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
PCH_SMB_ALERT#
PCH_SMB_ALERT#
PCH_SPI_CLK
PCH_SPI_CLK
PCH_SPI_CLK
PCH_SPI_CLK
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS0#
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_CS1# PCH_SPI_CS1#
PCH_SPI_DIN
PCH_SPI_DIN
PCH_SPI_DIN
PCH_SPI_DIN
PCH_SPI_DIN
PCH_SPI_DO
PCH_SPI_DO
PCH_SPI_DO
PCH_SPI_DO
PCH_SPI_DO
PCH_SPI_DO2
PCH_SPI_DO2
PCH_SPI_DO2
PCH_SPI_DO2
PCH_SPI_DO2
PCH_SPI_DO2
PCH_SPI_DO3
PCH_SPI_DO3
PCH_SPI_DO3
PCH_SPI_DO3
PCH_SPI_DO3
PCH_SPI_DO3
PCI_CLK_LPCPCI_CLK_LPC_0
PCI_CLK_LPC_0
PCI_CLK_LPC_1
PCI_CLK_LPC_1
SML0CLK
SML0CLK
SML0CLK
SML0DATA
SML0DATA
SML0DATA
SML1_SMBCLK
SML1_SMBCLK
SML1_SMBDATA
SML1_SMBDATA
SPI_CLK32
SPI_CLK32
SPI_CLK64
SPI_CLK64
SPI_DIN32
SPI_DIN64
SPI_DO32
SPI_DO64
SPI_PCH_CS0#_R
SPI_PCH_CS1#_R
SPI_PCH_DO2_32
SPI_PCH_DO2_64
SPI_PCH_DO3_32
SPI_PCH_DO3_64
SPI_WP#_SEL
SPI_WP#_SEL
TAA_CLK32
TAA_CLK64
TAA_CS0#_R
TAA_CS1#_R
TAA_DIN32
TAA_DIN64
TAA_DO2_32
TAA_DO2_64
TAA_DO32
TAA_DO3_32
TAA_DO3_64
TAA_DO64
XTAL24_IN
XTAL24_IN_R
XTAL24_OUT
PCI_CLK_LPC
PCIECLK_REQ0#
+PCH_VCCACLKPLL
+3.3V_M
+3.3V_M
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_M
+3.3V_M
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
LPC_LAD0<29,36,37>
LPC_LAD1<29,36,37>
LPC_LAD2<29,36,37>
LPC_LAD3<29,36,37>
LPC_LFRAME#<29,36,37>
SPI_WP#_SEL<36>
DDR_XDP_WAN_SMBDAT <18,19,25,31,9>
DDR_XDP_WAN_SMBCLK <18,19,25,31,9>
PCH_CL_DATA1 <31>
PCH_CL_CLK1 <31>
PCH_CL_RST1# <31>
SML1_SMBDATA <37>
LAN_SMBDATA <28>
NFC_SMBDATA <20>
CLK_PCI_DOCK <34>
SML1_SMBCLK <37>
LAN_SMBCLK <28>
NFC_SMBCLK <20>
CLK_PCI_LPDEBUG <37>
PCH_GPIO73 <12>
CLK_PCI_MEC <37>
CLK_PCI_5048 <36>
CLK_PCI_TPM_TCM <29>
PCH_TPM_LPC_EN<29>
LANCLK_REQ#<12,28>
MINI2CLK_REQ#<12,31>
MMICLK_REQ#<30>
MINI1CLK_REQ#<12,31>
CLK_PCIE_MINI1#<31>
CLK_PCIE_MINI1<31>
CLK_PCIE_MMI#<30>
CLK_PCIE_MMI<30>
CLK_PCIE_MINI2#<31>
CLK_PCIE_MINI2<31>
CLK_PCIE_LAN#<28>
CLK_PCIE_LAN<28>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (2/12)
7 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (2/12)
7 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (2/12)
7 58Friday, May 17, 2013
Compal Electronics, Inc.
C64@
0.1U_0402_25V6
C64@
0.1U_0402_25V6
1 2
RC33@0_0402_5%RC33@0_0402_5%
12
QC1B
DMN66D0LDW-7_SOT363-6
QC1B
DMN66D0LDW-7_SOT363-6
3 4
5
R51@ 33_0402_5%R51@ 33_0402_5%
1 2
RC64 EMC_3@22_0402_5% RC64 EMC_3@22_0402_5%
1 2
R125@ 33_0402_5%R125@ 33_0402_5%
1 2
R204@ 33_0402_5%R204@ 33_0402_5%
1 2
R71@ 33_0402_5%R71@ 33_0402_5%
1 2
RC31@0_0402_5%RC31@0_0402_5%
12
U1 1@
W25Q64FVSSIQ_SO8
U1 1@
W25Q64FVSSIQ_SO8
/CS
1
DO(IO1)
2
/WP(IO2)
3
GND
4DI(IO0) 5
CLK 6
/HOLD(IO3) 7
VCC 8
R595@ 33_0402_5%R595@ 33_0402_5%
1 2
RC391K_0402_5% RC391K_0402_5%
12
R31@ 0_0402_5%R31@ 0_0402_5%
1 2
HASWELL_MCP_E
CLOCK
SIGNALS
Rev1p2
UC1F
6 OF 19
HASWELL_MCP_E
CLOCK
SIGNALS
Rev1p2
UC1F
6 OF 19
PCIECLKRQ0/GPIO18
U2
CLKOUT_PCIE_N1
B41
CLKOUT_PCIE_P1
A41
PCIECLKRQ1/GPIO19
Y5
CLKOUT_ITPXDP_P A35
CLKOUT_ITPXDP_N B35
CLKOUT_LPC_1 AP15
CLKOUT_LPC_0 AN15
XTAL24_OUT B25
XTAL24_IN A25
PCIECLKRQ5/GPIO23
T2 CLKOUT_PCIE_P5
A37 CLKOUT_PCIE_N5
B37
PCIECLKRQ4/GPIO22
U5
CLKOUT_PCIE_N4
A39
CLKOUT_PCIE_P4
B39
PCIECLKRQ3/GPIO21
N1 CLKOUT_PCIE_P3
C37 CLKOUT_PCIE_N3
B38
PCIECLKRQ2/GPIO20
AD1
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
B42
CLKOUT_PCIE_P0
C42 CLKOUT_PCIE_N0
C43
DIFFCLK_BIASREF C26
RSVD K21
RSVD M21
TESTLOW_C35 C35
TESTLOW_C34 C34
TESTLOW_AK8 AK8
TESTLOW_AL8 AL8
RC362.2K_0402_5% RC362.2K_0402_5%
1 2
R194@ 33_0402_5%R194@ 33_0402_5%
1 2
CC15@12P_0402_50V8J CC15@12P_0402_50V8J
12
RC66 EMC@22_0402_5% RC66 EMC@22_0402_5%
1 2
RC63 EMC@ 22_0402_5%RC63 EMC@ 22_0402_5%
1 2
RC372.2K_0402_5% RC372.2K_0402_5%
1 2
RC56 10K_0402_5%RC56 10K_0402_5%
1 2
R144@ 0_0402_5%R144@ 0_0402_5%
1 2
SPI C-LINK
SMBUS
LPC
HASWELL_MCP_E
Rev1p2
UC1G
7 OF 19
SPI C-LINK
SMBUS
LPC
HASWELL_MCP_E
Rev1p2
UC1G
7 OF 19
LAD0
AU14
LAD1
AW12
LAD2
AY12
LAD3
AW11
LFRAME
AV12
SPI_CS0
Y7 SPI_CLK
AA3
SPI_CS1
Y4
SPI_CS2
AC2
SPI_MOSI
AA2
SPI_MISO
AA4
SPI_IO2
Y6
SPI_IO3
AF1
SMBALERT/GPIO11 AN2
SMBCLK AP2
SML0ALERT/GPIO60 AL2
SMBDATA AH1
SML0CLK AN1
SML0DATA AK1
SML1ALERT/PCHHOT/GPIO73 AU4
SML1DATA/GPIO74 AH3
SML1CLK/GPIO75 AU3
CL_CLK AF2
CL_DATA AD2
CL_RST AF4
R45@
33_0402_5%
R45@
33_0402_5%
1 2
R164@ 33_0402_5%R164@ 33_0402_5%
1 2
R432@ 33_0402_5%R432@ 33_0402_5%
1 2
RC2710K_0402_5% RC2710K_0402_5%
12
R1 1K_0402_5%R1 1K_0402_5%
1 2
R582@ 33_0402_5%R582@ 33_0402_5%
1 2
RC29@0_0402_5%RC29@0_0402_5%
12
RC5210K_0402_5% RC5210K_0402_5%
1 2
R222@ 33_0402_5%R222@ 33_0402_5%
1 2
C76
@
33P_0402_50V8J
C76
@
33P_0402_50V8J
1 2
R2 1K_0402_5%R2 1K_0402_5%
1 2
RC35@0_0402_5%RC35@0_0402_5%
12
RC381K_0402_5% RC381K_0402_5%
12
R91@ 33_0402_5%R91@ 33_0402_5%
1 2
T7 @
PAD~D T7 @
PAD~D
RC4710K_0402_5% RC4710K_0402_5%
1 2
R485@ 33_0402_5%R485@ 33_0402_5%
1 2
JTAA1
CONN@
ACES_50185-02041-001
JTAA1
CONN@
ACES_50185-02041-001
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
G
21 G22
G
23 G24
RC4610K_0402_5% RC4610K_0402_5%
1 2
RC282.2K_0402_5% RC282.2K_0402_5%
12
R41@ 33_0402_5%R41@ 33_0402_5%
1 2
R61@ 33_0402_5%R61@ 33_0402_5%
1 2
R415@ 33_0402_5%R415@ 33_0402_5%
1 2
CC6
18P_0402_50V8J
CC6
18P_0402_50V8J
12
T6 @
PAD~D T6 @
PAD~D
R175@ 0_0402_5%R175@ 0_0402_5%
1 2
CC14@12P_0402_50V8J CC14@12P_0402_50V8J
12
R112@ 33_0402_5%R112@ 33_0402_5%
1 2
RC58 EMC@ 22_0402_5%RC58 EMC@ 22_0402_5%
1 2
RC44
1M_0402_5%
RC44
1M_0402_5%
1 2
U2 4@
W25Q32FVSSIQ_SO8
U2 4@
W25Q32FVSSIQ_SO8
/CS
1
DO/IO1
2
/WP/IO2
3
GND
4DI/IO0 5
CLK 6
/HOLD/IO3 7
VCC 8
R102@ 0_0402_5%R102@ 0_0402_5%
1 2
R23@0_0402_5%R23@0_0402_5%
12
R57@
33_0402_5%
R57@
33_0402_5%
1 2
YC2
24MHZ_12PF_X3G024000DC1H
YC2
24MHZ_12PF_X3G024000DC1H
1
2
3
4
RC65 @0_0402_5% RC65 @0_0402_5%
1 2
RC40@0_0402_5%RC40@0_0402_5%
1 2
R214@ 33_0402_5%R214@ 33_0402_5%
1 2
R8@0_0402_5%R8@0_0402_5%
12
R132@ 33_0402_5%R132@ 33_0402_5%
1 2
RC57 10K_0402_5%RC57 10K_0402_5%
1 2
RC302.2K_0402_5% RC302.2K_0402_5%
12
RC453.01K_0402_1% RC453.01K_0402_1%
1 2
R185@ 33_0402_5%R185@ 33_0402_5%
1 2
RC61 EMC@ 22_0402_5%RC61 EMC@ 22_0402_5%
1 2
RC55 10K_0402_5%RC55 10K_0402_5%
1 2
C51@
0.1U_0402_25V6
C51@
0.1U_0402_25V6
1 2
RC5010K_0402_5% RC5010K_0402_5%
1 2
C85@
33P_0402_50V8J
C85@
33P_0402_50V8J
1 2
CC7
18P_0402_50V8J
CC7
18P_0402_50V8J
12
R154@ 33_0402_5%R154@ 33_0402_5%
1 2
QC1A
DMN66D0LDW-7_SOT363-6
QC1A
DMN66D0LDW-7_SOT363-6
1
2
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_D0
DDR_A_D1
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D2
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D3
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D4
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D5
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D6
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_RAS#
DDR_A_WE#
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_D0
DDR_B_D1
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D2
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D3
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D4
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D5
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D6
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_RAS#
DDR_B_WE#
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
DDR_CS0_DIMMA#
DDR_CS1_DIMMA# DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
+SM_VREF_CA
+SM_VREF_DQ0
+SM_VREF_DQ1
DDR_A_D[0..63]<18>
DDR_A_DQS#[0..7] <18>
DDR_A_DQS[0..7] <18>
DDR_A_MA[0..15] <18>
M_CLK_DDR0 <18>
M_CLK_DDR#0 <18>
M_CLK_DDR1 <18>
M_CLK_DDR#1 <18>
DDR_CKE0_DIMMA <18>
DDR_CKE1_DIMMA <18>
DDR_CS0_DIMMA# <18>
DDR_CS1_DIMMA# <18>
DDR_A_BS0 <18>
DDR_A_BS1 <18>
DDR_A_BS2 <18>
DDR_A_RAS# <18>
DDR_A_WE# <18>
DDR_A_CAS# <18>
DDR_B_D[0..63]<19>
M_CLK_DDR#2 <19>
M_CLK_DDR2 <19>
M_CLK_DDR#3 <19>
M_CLK_DDR3 <19>
DDR_CKE2_DIMMB <19>
DDR_CKE3_DIMMB <19>
DDR_CS3_DIMMB# <19>
DDR_CS2_DIMMB# <19>
DDR_B_BS2 <19>
DDR_B_BS1 <19>
DDR_B_BS0 <19>
DDR_B_CAS# <19>
DDR_B_WE# <19>
DDR_B_RAS# <19>
DDR_B_MA[0..15] <19>
DDR_B_DQS#[0..7] <19>
DDR_B_DQS[0..7] <19>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (3/12)
8 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (3/12)
8 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (3/12)
8 58Friday, May 17, 2013
Compal Electronics, Inc.
DDR CHANNEL B
HASWELL_MCP_E
Rev1p2
UC1D
4 OF 19
DDR CHANNEL B
HASWELL_MCP_E
Rev1p2
UC1D
4 OF 19
SB_DQSP4 AV22
SB_DQSP5 AW18
SB_DQSP6 AM21
SB_DQSP3 AM25
SB_DQSP7 AM18
SB_DQSP2 AM28
SB_DQSN7 AN18
SB_DQSP0 AV30
SB_DQSP1 AW26
SB_DQSN6 AN21
SB_DQSN2 AN28
SB_DQSN3 AN25
SB_DQSN4 AW22
SB_DQSN5 AV18
SB_DQSN1 AV26
SB_DQSN0 AW30
SB_MA14 AR46
SB_MA15 AP46
SB_MA13 AK33
SB_MA9 AU46
SB_MA10 AK36
SB_MA11 AV47
SB_MA8 AY47
SB_MA12 AU47
SB_MA4 AR45
SB_MA5 AP45
SB_MA6 AW46
SB_MA3 AR42
SB_MA7 AY46
SB_MA2 AP42
SB_MA0 AP40
SB_MA1 AR40
SB_BA2 AU49
SB_WE AK35
SB_CAS AM33
SB_BA0 AL35
SB_BA1 AM36
SB_RAS AM35
SB_CS#1 AK32
SB_ODT0 AL32
SB_CS#0 AM32
SB_CKE1 AU50
SB_CKE2 AW49
SB_CKE3 AV50
SB_CKE0 AY49
SB_CK#1 AK38
SB_CK1 AL38
SB_CK0 AN38
SB_CK#0 AM38
SB_DQ61
AM20
SB_DQ63
AP18 SB_DQ62
AR18
SB_DQ57
AR20 SB_DQ56
AN20
SB_DQ58
AK18
SB_DQ59
AL18
SB_DQ60
AK20
SB_DQ51
AM22
SB_DQ52
AN22
SB_DQ53
AP21
SB_DQ54
AK21
SB_DQ55
AK22
SB_DQ46
AV17
SB_DQ47
AU17
SB_DQ48
AR21
SB_DQ49
AR22
SB_DQ50
AL21
SB_DQ45
AU19
SB_DQ41
AW19
SB_DQ42
AY17
SB_DQ43
AW17
SB_DQ44
AV19
SB_DQ40
AY19
SB_DQ36
AV23
SB_DQ37
AU23
SB_DQ38
AV21
SB_DQ39
AU21
SB_DQ35
AW21
SB_DQ31
AL25
SB_DQ32
AY23
SB_DQ33
AW23
SB_DQ30
AK25
SB_DQ34
AY21
SB_DQ26
AR25 SB_DQ25
AR26
SB_DQ27
AP25
SB_DQ28
AK26
SB_DQ29
AM26
SB_DQ20
AR29
SB_DQ21
AN29
SB_DQ22
AR28
SB_DQ23
AP28
SB_DQ24
AN26
SB_DQ15
AU25
SB_DQ16
AM29
SB_DQ17
AK29
SB_DQ18
AL28
SB_DQ19
AK28
SB_DQ10
AY25
SB_DQ11
AW25
SB_DQ13
AU27
SB_DQ5
AU31
SB_DQ6
AV29
SB_DQ7
AU29
SB_DQ8
AY27
SB_DQ9
AW27
SB_DQ0
AY31
SB_DQ1
AW31
SB_DQ2
AY29
SB_DQ3
AW29
SB_DQ4
AV31
SB_DQ14
AV25
SB_DQ12
AV27
DDR CHANNEL A
HASWELL_MCP_E
Rev1p2
UC1C
3 OF 19
DDR CHANNEL A
HASWELL_MCP_E
Rev1p2
UC1C
3 OF 19
SA_DQ25
AR55
SA_DQ28
AL55
SA_CLK1 AY36
SA_CLK#1 AW36
SA_CLK0 AV37
SA_CLK#0 AU37
SA_DQ0
AH63
SA_DQ1
AH62
SA_DQ2
AK63
SA_DQ3
AK62
SA_DQ4
AH61
SA_DQ5
AH60
SA_DQ6
AK61
SA_DQ7
AK60
SA_DQ8
AM63
SA_DQ9
AM62
SA_DQ10
AP63
SA_DQ11
AP62
SA_DQ12
AM61
SA_DQ13
AM60
SA_DQ14
AP61
SA_DQ16
AP58
SA_DQ17
AR58
SA_DQ18
AM57
SA_DQ19
AK57
SA_DQ20
AL58
SA_DQ21
AK58
SA_DQ22
AR57
SA_DQ23
AN57
SA_DQ24
AP55
SA_DQ27
AK54 SA_DQ26
AM54
SA_DQ29
AK55
SA_DQ30
AR54
SA_DQ31
AN54
SA_DQ32
AY58
SA_DQ33
AW58
SA_DQ34
AY56
SA_DQ35
AW56
SA_DQ36
AV58
SA_DQ37
AU58
SA_DQ38
AV56
SA_DQ39
AU56
SA_DQ40
AY54
SA_DQ41
AW54
SA_DQ42
AY52
SA_DQ43
AW52
SA_DQ44
AV54
SA_DQ45
AU54
SA_DQ46
AV52
SA_DQ47
AU52
SA_DQ48
AK40
SA_DQ49
AK42
SA_DQ50
AM43
SA_DQ51
AM45
SA_DQ52
AK45
SA_DQ53
AK43
SA_DQ54
AM40
SA_DQ55
AM42
SA_DQ56
AM46
SA_DQ57
AK46
SA_DQ58
AM49
SA_DQ59
AK49
SA_DQ60
AM48
SA_DQ61
AK48
SA_DQ62
AM51
SA_DQ63
AK51
SA_DQ15
AP60
SA_CKE2 AY42
SA_CKE1 AW43
SA_CKE0 AU43
SA_CKE3 AY43
SA_CS#1 AR32
SA_CS#0 AP33
SA_ODT0 AP32
SA_RAS AY34
SA_CAS AU34
SA_WE AW34
SA_BA0 AU35
SA_BA1 AV35
SA_BA2 AY41
SA_MA1 AY37
SA_MA0 AU36
SA_MA2 AR38
SA_MA3 AP36
SA_MA4 AU39
SA_MA5 AR36
SA_MA7 AW39
SA_MA6 AV40
SA_MA9 AU40
SA_MA8 AY39
SA_MA11 AW41
SA_MA12 AU41
SA_MA10 AP35
SA_MA14 AV42
SA_MA13 AR35
SA_MA15 AU42
SA_DQSN0 AJ61
SA_DQSN2 AM58
SA_DQSN1 AN62
SA_DQSN3 AM55
SA_DQSN5 AV53
SA_DQSN4 AV57
SA_DQSN7 AL48
SA_DQSN6 AL43
SA_DQSP1 AN61
SA_DQSP0 AJ62
SA_DQSP4 AW57
SA_DQSP3 AN55
SA_DQSP2 AN58
SA_DQSP6 AL42
SA_DQSP5 AW53
SA_DQSP7 AL49
SM_VREF_CA AP49
SM_VREF_DQ1 AP51
SM_VREF_DQ0 AR51
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HIGH = ENABLED (DEFAULT)
LOW = DISABLED
DSWODVREN - ON DIE DSW VR ENABLE
RC5 need to close to JCPU1
Place near JXDP1
Place near JXDP1.47
Place near JXDP1.48
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
CAD Note:
Avoid stub in the PWRGD path
while placing resistors RC115
CAD Note:
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mil
DDR3 COMPENSATION SIGNALS
reference Shark Bay ULT Validation Customer Debug Port
Implementation Requirement Rev 1.0
EMI request add
ESD request add
AC_PRESENT
AC_PRESENT
CFD_PWRBTN#_XDP
CFG0
CFG1
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG2
CFG3
CFG3CFG3_R
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CLKRUN#
CPU_DETECT#
CPU_PW R_DEBUG#_R
CPU_XDP_PRDY#
CPU_XDP_PRDY#
CPU_XDP_PREQ#
CPU_XDP_PREQ#
CPU_XDP_PREQ#
CPU_XDP_TCLK
CPU_XDP_TCLK
CPU_XDP_TCLK
CPU_XDP_TCLK
CPU_XDP_TCLK
CPU_XDP_TDI
CPU_XDP_TDI
CPU_XDP_TDI
CPU_XDP_TDO
CPU_XDP_TDO
CPU_XDP_TDO
CPU_XDP_TMS
CPU_XDP_TMS
CPU_XDP_TMS
CPU_XDP_TRST#
CPU_XDP_TRST#
CPU_XDP_TRST#
CPU_XDP_TRST#
DDR_XDP_SMBCLK_R1
DDR_XDP_SMBDAT_R1
DSWODVREN
DSWODVREN
H_CATERR#
H_CATERR#
H_CPUPWRGD
H_CPUPWRGD
H_CPUPWRGD
H_PROCHOT#
H_PROCHOT#_R
H_VCCST_PWRGD_XDP
ME_RESET#
ME_RESET#
ME_SUS_PW R_ACK
ME_SUS_PW R_ACK_R
ME_SUS_PW R_ACK_R
PCH_BATLOW#
PCH_BATLOW#
PCH_DPWROK
PCH_DPWROK
PCH_JTAG_TCK
PCH_JTAG_TCK_R
PCH_JTAG_TDO
PCH_PCIE_WAKE#
PCH_PCIE_WAKE#
PCH_PLTRST#
PCH_PLTRST#
PCH_PLTRST#_EC
PCH_PLTRST#_EC
PCH_PW ROK
PCH_RSMRST#_R
PCH_RSMRST#_R
PCH_RTCRST#
PECI_EC
PM_APW ROK
PM_APW ROK_R
PM_APW ROK_R
RESET_OUT#
RUNPWROK
RUNPWROK
RUNPWROK
RUNPWROK
SIO_PWRBTN#
SIO_SLP_A#
SIO_SLP_A#
SIO_SLP_A#
SIO_SLP_LAN#
SIO_SLP_S0#
SIO_SLP_S0#
SIO_SLP_S3#
SIO_SLP_S3#
SIO_SLP_S4#
SIO_SLP_S4#
SIO_SLP_S5#
SIO_SLP_S5#
SIO_SLP_SUS#
SIO_SLP_WLAN#
SM_RCOMP0
SM_RCOMP0
SM_RCOMP1
SM_RCOMP1
SM_RCOMP2
SM_RCOMP2
SUSACK#
SUSACK#_R
SUSACK#_R
SUSCLK
SUS_STAT#/LPCPD#
SUS_STAT#/LPCPD#
SYS_PWROK
SYS_PWROK_R
SYS_PWROK_R
SYS_PWROK_XDP
SYS_PWROK_XDP
SYS_RESET#
SYS_RESET#
SYS_RESET#
TDI_XDP
TDI_XDP TDI_XDP_R
TDI_XDP_R
TDO_XDP
TDO_XDP
TDO_XDP
TDO_XDP
TMS_XDP
TMS_XDP
TRST#_XDP
TRST#_XDP
XDP_DBRESET#
XDP_DBRESET#
XDP_DBRESET#
XDP_DBRESET#
XDP_OBS0_R
XDP_OBS0_R
XDP_OBS1_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R
XDP_RST#_R
PCH_RSMRST#_R
H_PROCHOT#
H_CPUPWRGD
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW _PCH
+RTC_CELL
+3.3V_RUN
+1.05V_VCCST
+1.05V_RUN
+3.3V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW _PCH
+PCH_VCCDSW 3_3
+PCH_VCCDSW 3_3
+1.05V_RUN
+3.3V_RUN
+3.3V_ALW _PCH
+PCH_VCCDSW 3_3
+3.3V_ALW 2
SUSACK#<36>
RESET_OUT#<15,37>
PLTRST_LAN#<28>
PLTRST_USH#<29>
PLTRST_MMI#<30>
PCH_PLTRST#_EC <29,31,36,37>
PCH_RSMRST#_Q<38>
ME_SUS_PW R_ACK<37>
SIO_PWRBTN#<37,9>
AC_PRESENT<37>
SIO_SLP_WLAN#<36>
PCH_DPWROK <36>
PCH_PCIE_WAKE# <37>
CLKRUN# <12,29,36,37>
SIO_SLP_S5# <37>
SIO_SLP_S4# <36,39,43>
SIO_SLP_S3# <36,39,43>
SIO_SLP_A# <36,39,44>
SIO_SLP_SUS# <36>
SIO_SLP_LAN# <28,36>
CPU_DETECT#<36>
PECI_EC<37>
H_PROCHOT#<37,46,47,48>
DDR_PG_CTRL<18>
CFG18 <13>
CFG17 <13>
CFG16 <13>
CFG3<13>
SIO_PWRBTN#<37,9>
DDR_XDP_WAN_SMBDAT<18,19,25,31,7>
DDR_XDP_WAN_SMBCLK<18,19,25,31,7>
CFG1<13>
CFG0<13>
CFG4<13>
CFG2<13>
CPU_PW R_DEBUG#<15>
CFG7<13>
CFG6<13>
CFG5<13>
CFG9 <13>
CFG10 <13>
CFG11 <13>
CFG8 <13>
CFG13 <13>
CFG14 <13>
CFG15 <13>
CFG12 <13>
CFG19 <13>
H_VCCST_PWRGD<15>
DDR3_DRAMRST#_CPU<18>
PLTRST_VMM2320#<21>
PCH_RTCRST#<6>
PCH_JTAG_TCK<6>
PCH_JTAG_JTAGX<6>
PCH_JTAG_TRST#<6>
RUNPWROK<36,37>
PCH_JTAG_TMS<6>
PCH_JTAG_TDI<6>
PCH_JTAG_TDO<6>
SIO_SLP_S0#<37>
PM_APW ROK<37>
PLTRST_NFC#<20>
PCH_AUDIO_EN <12>
POWER_SW #_MB<37,40>
SYS_PWROK<36>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (4/12)
9 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (4/12)
9 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (4/12)
9 58Friday, May 17, 2013
Compal Electronics, Inc.
RC136 10K_0402_5%RC136 10K_0402_5%
1 2
RC127
51_0402_1%
RC127
51_0402_1%
12
RC114 62_0402_5%RC114 62_0402_5%
1 2
RC74@10K_0402_5%RC74@10K_0402_5%
1 2
RC105 1K_0402_5%
XDP@
RC105 1K_0402_5%
XDP@
1 2
UC6
74CBTLV3126BQ_DHVQFN14_2P5X3
XDP@
UC6
74CBTLV3126BQ_DHVQFN14_2P5X3
XDP@
1OE
1
1A
21B 3
2OE
4
2A
52B 6
GND 7
3B 8
3A
9
3OE
10
4B 11
4A
12
4OE
13
VCC
14
GND PAD 15
RC96 0_0402_5%
XDP@
RC96 0_0402_5%
XDP@
1 2
UC7
TC7SH08FU_SSOP5~D
UC7
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
RC76@8.2K_0402_5%RC76@8.2K_0402_5%
12
RC97@0_0402_5% RC97@0_0402_5%
12
RC94@0_0402_5%RC94@0_0402_5%
1 2
CC41
0.1U_0402_25V6
XDP@CC41
0.1U_0402_25V6
XDP@
12
RC99 1K_0402_5%
XDP@
RC99 1K_0402_5%
XDP@
1 2
RC129121_0402_1% RC129121_0402_1%
12
RC112@0_0402_5%RC112@0_0402_5%
1 2
RC108@0_0402_5%RC108@0_0402_5%
1 2
RC102
XDP@
1K_0402_5%
RC102
XDP@
1K_0402_5%
1 2
RC107@0_0402_5%RC107@0_0402_5%
1 2
RC84@0_0402_5%RC84@0_0402_5%
1 2
T11 @PAD~DT11 @PAD~D
RC117 56_0402_5%RC117 56_0402_5%
1 2
RC79 0_0402_5%@RC79 0_0402_5%@
1 2
RC122
51_0402_1%
RC122
51_0402_1%
12
RC142@0_0402_5%RC142@0_0402_5%
1 2
CC10
@
0.1U_0402_25V6
CC10
@
0.1U_0402_25V6
12
CC68
0.1U_0402_25V6
XDP@CC68
0.1U_0402_25V6
XDP@
12
CC82@
0.1U_0402_25V6
CC82@
0.1U_0402_25V6
1 2
T129 @PAD~D T129 @PAD~D
RC124 @0_0402_5% RC124 @0_0402_5%
12
RC91@0_0402_5%RC91@0_0402_5%
1 2
T130 @PAD~D T130 @PAD~D
RC72@0_0402_5%RC72@0_0402_5%
1 2
T131 @PAD~D T131 @PAD~D
RC98 10K_0402_5%RC98 10K_0402_5%
1 2
T10 @PAD~DT10 @PAD~D
RC70 10K_0402_5%RC70 10K_0402_5%
1 2
RC133100_0402_1% RC133100_0402_1%
12
RC113@49.9_0402_1%RC113@49.9_0402_1%
1 2
RC89@0_0402_5%RC89@0_0402_5%
1 2
RC92@0_0402_5%RC92@0_0402_5%
1 2
RC101 0_0402_5%
XDP@
RC101 0_0402_5%
XDP@
1 2
T126 @PAD~D T126 @PAD~D
RC73
330K_0402_1%
RC73
330K_0402_1%
1 2
RC95 0_0402_5%
XDP@
RC95 0_0402_5%
XDP@
1 2
RC86@0_0402_5%RC86@0_0402_5%
1 2
JAPS1
CONN@
ACES_50506-01841-P01
JAPS1
CONN@
ACES_50506-01841-P01
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
GND
19
GND
20
RC109 1K_0402_5%
XDP@
RC109 1K_0402_5%
XDP@
12
CC9@
0.1U_0402_25V6
CC9@
0.1U_0402_25V6
1 2
RC131
51_0402_1%
@
RC131
51_0402_1%
@
12
CC90
@
100P_0402_50V8J
CC90
@
100P_0402_50V8J
12
RC116
1K_0402_5%
RC116
1K_0402_5%
12
RC144@0_0402_5%RC144@0_0402_5%
1 2
CC149
22P_0402_50V8J
@
CC149
22P_0402_50V8J
@
1
2
T12 @
PAD~DT12 @
PAD~D
RC81@8.2K_0402_5%RC81@8.2K_0402_5%
1 2
T132 @PAD~D T132 @PAD~D
RC119@
51_0402_1%
RC119@
51_0402_1%
12
RC139@0_0402_5%RC139@0_0402_5%
1 2
RC125200_0402_1% RC125200_0402_1%
12
RC104 @0_0402_5% RC104 @0_0402_5%
12
RC123 @0_0402_5% RC123 @0_0402_5%
12
RC93@0_0402_5%RC93@0_0402_5%
1 2
RP12
10K_8P4R_5%
RP12
10K_8P4R_5%
1
2
3
4 5
6
7
8
RC90@0_0402_5%RC90@0_0402_5%
1 2
RC115
10K_0402_5%
RC115
10K_0402_5%
12
RC280@51_0402_1% RC280@51_0402_1%
12
JXDP1
CONN@SAMTE_BSH-030-01-L-D-A
JXDP1
CONN@SAMTE_BSH-030-01-L-D-A
GND0
1GND1 2
OBSFN_A0
3OBSFN_C0 4
OBSFN_A1
5OBSFN_C1 6
GND2
7GND3 8
OBSDATA_A0
9OBSDATA_C0 10
OBSDATA_A1
11 OBSDATA_C1 12
GND4
13 GND5 14
OBSDATA_A2
15 OBSDATA_C2 16
OBSDATA_A3
17 OBSDATA_C3 18
GND6
19 GND7 20
OBSFN_B0
21 OBSFN_D0 22
OBSFN_B1
23 OBSFN_D1 24
GND8
25 GND9 26
OBSDATA_B0
27 OBSDATA_D0 28
OBSDATA_B1
29 OBSDATA_D1 30
GND10
31 GND11 32
OBSDATA_B2
33 OBSDATA_D2 34
OBSDATA_B3
35 OBSDATA_D3 36
GND12
37 GND13 38
PWRGOOD/HOOK0
39 ITPCLK/HOOK4 40
HOOK1
41 ITPCLK#/HOOK5 42
VCC_OBS_AB
43 VCC_OBS_CD 44
HOOK2
45 RESET#/HOOK6 46
HOOK3
47 DBR#/HOOK7 48
GND14
49 GND15 50
SDA
51 TD0 52
SCL
53 TRST# 54
TCK1
55 TDI 56
TCK0
57 TMS 58
GND16
59 GND17 60
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
Rev1p2
UC1H
8 OF 19
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
Rev1p2
UC1H
8 OF 19
SUSACK
AK2
PLTRST
AG7
PCH_PWROK
AY7 SYS_PWROK
AG2 SYS_RESET
AC3
APWROK
AB5
RSMRST
AW6
ACPRESENT/GPIO31
AJ8
BATLOW/GPIO72
AN4
PWRBTN
AL7 SUSWARN/SUSPWRDNACK/GPIO30
AV4
SLP_S0
AF3
SLP_WLAN/GPIO29
AM5
DPWROK AV5
DSWVRMEN AW7
WAKE AJ5
SUS_STAT/GPIO61 AG4
CLKRUN/GPIO32 V5
SUSCLK/GPIO62 AE6
SLP_S4 AJ6
SLP_S5/GPIO63 AP5
SLP_S3 AT4
SLP_LAN AJ7
SLP_SUS AP4
SLP_A AL5
RC135@0_0402_5% RC135@0_0402_5%
12
RC82 0_0402_5%@RC82 0_0402_5%@
1 2
CC11
@
0.1U_0402_25V6
CC11
@
0.1U_0402_25V6
12
RC110@0_0402_5%RC110@0_0402_5%
1 2
RC120@
51_0402_1%
RC120@
51_0402_1%
12
RC88@0_0402_5%RC88@0_0402_5%
1 2
CC8@
0.1U_0402_25V6
CC8@
0.1U_0402_25V6
1 2
MISC
JTAG
DDR3
PWR
THERMAL
HASWELL_MCP_E
Rev1p2
UC1B
2 OF 19
MISC
JTAG
DDR3
PWR
THERMAL
HASWELL_MCP_E
Rev1p2
UC1B
2 OF 19
PREQ K62
PRDY J62
PROC_TCK E60
PROC_TRST E59
PROCHOT
K63
PROCPWRGD
C61
CATERR
K61
PECI
N62
PROC_DETECT
D61
PROC_TMS E61
PROC_TDI F63
PROC_TDO F62
BPM#0 J60
BPM#2 H61
BPM#1 H60
BPM#3 H62
BPM#7 J61
SM_RCOMP0
AU60
SM_RCOMP1
AV60
SM_RCOMP2
AU61
SM_PG_CNTL1
AV61
BPM#6 K60
BPM#5 H63
BPM#4 K59
SM_DRAMRST
AV15
RC106@1K_0402_5%RC106@1K_0402_5%
1 2
RC111@0_0402_5%RC111@0_0402_5%
1 2
RC78@
330K_0402_1%
RC78@
330K_0402_1%
1 2
CC48@
0.1U_0402_25V6
CC48@
0.1U_0402_25V6
12
RC87@0_0402_5%RC87@0_0402_5%
1 2
T122 @PAD~D T122 @PAD~D
UC3
TC7SH08FU_SSOP5~D
UC3
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
UC2@
74AHC1G09GW_TSSOP5
UC2@
74AHC1G09GW_TSSOP5
B
1
A
2
G
3
O4
P5
RC103 0_0402_5%
XDP@
RC103 0_0402_5%
XDP@
1 2
RC118@
51_0402_1%
RC118@
51_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
COMPENSATION PU FOR eDP
CAD Note:Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.
CODEC_IRQ
CODEC_IRQ
CONTACTLESS_DET#
CPU_DPB_AUX
CPU_DPB_AUX
CPU_DPB_AUX#
CPU_DPB_AUX#
CPU_DPB_CTRLCLK
CPU_DPB_CTRLCLK
CPU_DPB_CTRLDAT
CPU_DPB_CTRLDAT
CPU_DPC_AUX
CPU_DPC_AUX
CPU_DPC_AUX#
CPU_DPC_AUX#
CPU_DPC_CTRLCLK
CPU_DPC_CTRLCLK
CPU_DPC_CTRLDAT
CPU_DPC_CTRLDAT
DDI1_LANE_N0
DDI1_LANE_N1
DDI1_LANE_N2
DDI1_LANE_N3
DDI1_LANE_P0
DDI1_LANE_P1
DDI1_LANE_P2
DDI1_LANE_P3
DDI2_LANE_N0
DDI2_LANE_N1
DDI2_LANE_N2
DDI2_LANE_N3
DDI2_LANE_P0
DDI2_LANE_P1
DDI2_LANE_P2
DDI2_LANE_P3
DGPU_PWROK
DGPU_PWROK
DPB_HPD
DPC_HPD
DPC_HPD
EDP_BIA_PWM
EDP_COMP
EDP_COMP
EDP_CPU_AUX
EDP_CPU_AUX#
EDP_CPU_LANE_N0
EDP_CPU_LANE_N1
EDP_CPU_LANE_P0
EDP_CPU_LANE_P1
ENVDD_PCH
ENVDD_PCH
PIRQD#
PIRQD#
PANEL_BKLEN
PIRQC#
PIRQC#
TOUCHPAD_INTR#
TOUCHPAD_INTR#
PIRQC#
PIRQD#
+VCCIOA_OUT
+3.3V_RUN
+3.3V_RUN
DDI1_LANE_N3<23>
DDI1_LANE_N2<23>
DDI1_LANE_N1<23>
DDI1_LANE_N0<23>
DDI1_LANE_P1<23>
DDI1_LANE_P0<23>
DDI1_LANE_P3<23>
DDI1_LANE_P2<23>
DDI2_LANE_N0<27>
DDI2_LANE_N1<27>
DDI2_LANE_N2<27>
DDI2_LANE_N3<27>
DDI2_LANE_P0<27>
DDI2_LANE_P1<27>
DDI2_LANE_P2<27>
DDI2_LANE_P3<27>
CPU_DPC_AUX# <27>
CPU_DPC_AUX <27>
DPB_HPD <23>
DPC_HPD <27>
PANEL_BKLEN<22>
ENVDD_PCH<22,36>
CONTACTLESS_DET#<29>
EDP_CPU_LANE_P0 <22>
EDP_CPU_LANE_N0 <22>
EDP_CPU_LANE_P1 <22>
EDP_CPU_LANE_N1 <22>
EDP_CPU_AUX <22>
EDP_CPU_AUX# <22>
CPU_DPB_CTRLDAT <23>
CPU_DPB_CTRLCLK <23>
CPU_DPC_CTRLCLK <27>
CPU_DPC_CTRLDAT <27>
EDP_CPU_HPD <22>
EDP_BIA_PWM<22>
TOUCH_RST_N_GYRO_INT1<12>
HDD_FALL_INT<25>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (5/12)
10 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (5/12)
10 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (5/12)
10 58Friday, May 17, 2013
Compal Electronics, Inc.
HASWELL_MCP_E
DDI EDP
Rev1p2
UC1A
1 OF 19
HASWELL_MCP_E
DDI EDP
Rev1p2
UC1A
1 OF 19
EDP_DISP_UTIL A43
EDP_RCOMP D20
DDI2_TXP3
B53 DDI2_TXN3
A53 DDI2_TXP2
B50 DDI2_TXN2
C49
DDI2_TXN1
C53
DDI2_TXN0
C51
DDI2_TXP0
C50
DDI2_TXP1
B54
DDI1_TXP3
B57
EDP_AUXN A45
EDP_AUXP B45
EDP_TXP3 B49
EDP_TXN3 A49
EDP_TXP2 C46
EDP_TXN2 C47
EDP_TXP1 B47
EDP_TXN1 A47
EDP_TXN0 C45
EDP_TXP0 B46
DDI1_TXN3
A57 DDI1_TXP2
A55 DDI1_TXN2
B55 DDI1_TXP1
C58 DDI1_TXN1
B58 DDI1_TXP0
C55 DDI1_TXN0
C54
RP3
2.2K_0804_8P4R_5%
RP3
2.2K_0804_8P4R_5%
1
2
3
4 5
6
7
8
RC151100K_0402_5% RC151100K_0402_5%
12
R494 0_0402_5%R494 0_0402_5%
1 2
RC154@1K_0402_5%RC154@1K_0402_5%
12
RC158
100K_0402_5%
RC158
100K_0402_5%
12
T13@PAD~DT13@PAD~D
RC148 10K_0402_5%RC148 10K_0402_5%
1 2
RC138 10K_0402_5%RC138 10K_0402_5%
1 2
RC147100K_0402_5% RC147100K_0402_5%
12
RC152@100K_0402_5%RC152@100K_0402_5%
1 2
RC13424.9_0402_1% RC13424.9_0402_1%
12
RC149100K_0402_5% RC149100K_0402_5%
12
RC146 10K_0402_5%RC146 10K_0402_5%
1 2
RC140 10K_0402_5%RC140 10K_0402_5%
1 2
RC155100K_0402_5% RC155100K_0402_5%
12
DISPLAY
GPIO
eDP SIDEBAND
HASWELL_MCP_E
Rev1p2
UC1I
9 OF 19
DISPLAY
GPIO
eDP SIDEBAND
HASWELL_MCP_E
Rev1p2
UC1I
9 OF 19
EDP_BKLCTL
B8
DDPB_AUXN C5
DDPC_HPD A8
EDP_HPD D6
DDPB_HPD C8
DDPC_CTRLDATA D11
DDPC_CTRLCLK D9
DDPB_CTRLDATA C9
DDPB_CTRLCLK B9
PIRQA/GPIO77
U6
PIRQB/GPIO78
P4
PIRQC/GPIO79
N4
PIRQD/GPIO80
N2
PME
AD4
GPIO55
U7
GPIO52
L1
GPIO54
L3
GPIO51
R5
GPIO53
L4
EDP_BKLEN
A9
DDPB_AUXP B5
DDPC_AUXP A6
DDPC_AUXN B6
EDP_VDDEN
C6
R495@0_0402_5%R495@0_0402_5%
1 2
RC153100K_0402_5% RC153100K_0402_5%
12
RC137 10K_0402_5%RC137 10K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAD NOTE:
Route single-end 50-ohms and max 500-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15
mils.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
MMI -->
10/100/1G LAN --->
WLAN (Mini Card 2)--->
Ext USB Port 2 <----
-----> Ext Port 1 and DOCK2 (USB SW)
----->Ext Port 2 IO/B
----->WLAN/BT
----->Camera
----->USH
----->Ext Port 3 and DOCK1(USB SW)
----->WWAN
----->Touch
----->Ext USB3 Port 1
----->Ext USB3 Port 3 IO/B
PCH_PCIE_IREF
PCH_PCIE_RCOMP
PCIE_PRX_GLANTX_N3
PCIE_PRX_GLANTX_P3
PCIE_PRX_MMITX_N5
PCIE_PRX_MMITX_P5
PCIE_PRX_WLANTX_N4
PCIE_PRX_WLANTX_P4
PCIE_PTX_GLANRX_N3
PCIE_PTX_GLANRX_P3
PCIE_PTX_MMIRX_N5
PCIE_PTX_MMIRX_P5
PCIE_PTX_WLANRX_N4
PCIE_PTX_WLANRX_P4
USBP0+
USBP0-
USBP1+
USBP1-
USBP2+
USBP2-
USBP3+
USBP3-
USBP4+
USBP4-
USBP5+
USBP5-
USBP6+
USBP6-
USBP7+
USBP7-
USBRBIAS
USBRBIASUSB_OC0#
USB_OC0#
USB_OC3#
USB_OC1#
USB_OC1#
USB_OC2#
USB_OC3#
+PCH_AUSB3PLL
+3.3V_ALW_PCH
USBP0- <33>
USBP0+ <33>
USB3RN1 <35>
USB3RN2 <33>
USB3RP2 <33>
USB3TN2 <33>
USB3TP2 <33>
USB3RP1 <35>
USB3TN1 <35>
USB3TP1 <35>
PCIE_PTX_GLANRX_N3<28>
PCIE_PTX_GLANRX_P3<28>
PCIE_PRX_GLANTX_P3<28>
PCIE_PRX_GLANTX_N3<28>
USB3RN3<32>
USB3RP3<32>
USB3TN3<32>
USB3TP3<32>
PCIE_PRX_WLANTX_P4<31>
PCIE_PRX_WLANTX_N4<31>
PCIE_PTX_WLANRX_N4<31>
PCIE_PTX_WLANRX_P4<31>
USBP2+ <31>
USBP2- <31>
USBP3- <22>
USBP3+ <22>
USBP4+ <29>
USBP4- <29>
USBP5- <32>
USBP5+ <32>
USBP7+ <22>
USBP7- <22>
USBP6+ <31>
USBP6- <31>
USBP1+ <35>
USBP1- <35>
USB_OC0# <33>
PCIE_PRX_MMITX_N5<30>
PCIE_PTX_MMIRX_N5<30>
PCIE_PRX_MMITX_P5<30>
PCIE_PTX_MMIRX_P5<30>
USB_OC2# <12,33>
USB_OC1# <35>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (6/12)
11 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (6/12)
11 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (6/12)
11 58Friday, May 17, 2013
Compal Electronics, Inc.
T16@PAD~DT16@PAD~D
RC159
22.6_0402_1%
RC159
22.6_0402_1%
12
RC16510K_0402_5% RC16510K_0402_5%
1 2
T15@PAD~D T15@PAD~D
PCIe USB
HASWELL_MCP_E
Rev1p2
UC1K
11 OF 19
PCIe USB
HASWELL_MCP_E
Rev1p2
UC1K
11 OF 19
PETP5_L2
C21
PERP5_L0
E10
PERN5_L1
F8
PETN5_L3
B22
PETP5_L3
A21
PERP3
F11
PETN3
C29
PETN1/USB3TN3
C30
OC3/GPIO43 AV3
OC2/GPIO42 AH2
OC1/GPIO41 AT1
OC0/GPIO40 AL3
PCIE_RCOMP
A27
PCIE_IREF
B27
PERN5_L0
F10
PERN5_L2
H10
PERP5_L2
G10
PETN5_L2
B21
PERP5_L3
F6 PERN5_L3
E6
PETP3
B30
PERN4
F13
PERP4
G13
PETP4
A29 PETN4
B29
PERP1/USB3RP3
F17
PETP1/USB3TP3
C31
PERN2/USB3RN4
F15
PETN2/USB3TN4
B31
PERP2/USB3RP4
G15
USB2N0 AN8
USB2N1 AR7
USB2N2 AR8
USB2P2 AP8
USB2N3 AR10
USB2P3 AT10
USB2N4 AM15
USB2P4 AL15
USB2P6 AN11
USB2N5 AM13
USB2P5 AN13
USB2N6 AP11
USB2P7 AP13
USB2N7 AR13
USB3TN2 B33
USB3TP2 A33
USB3RP2 F18
USB3RN2 E18
USB3TN1 C33
USB3TP1 B34
USB3RP1 H20
USB3RN1 G20
PETP5_L1
A23 PETN5_L1
B23
PERP5_L1
E8
USBRBIAS AJ11
USBRBIAS AJ10
PETP5_L0
C22 PETN5_L0
C23
PERN3
G11
USB2P0 AM8
USB2P1 AT7
PERN1/USB3RN3
G17
PETP2/USB3TP4
A31
RSVD
E15
RSVD
E13
RSVD AN10
RSVD AM10
T14@PAD~D T14@PAD~D
T17@PAD~DT17@PAD~D
RC161 3.01K_0402_1%RC161 3.01K_0402_1%
1 2
RC16610K_0402_5% RC16610K_0402_5%
1 2
RC16010K_0402_5% RC16010K_0402_5%
1 2
RC163@0_0402_5%RC163@0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NO REBOOT STRAP
HIGH depop RC288 HIGH
LOW(DEFAULT)
BOOT BIOS STRAP BIT BBS
HIGH
LOW(DEFAULT)
TLS CONFIDENTIALITYTOP-BLOCK SWAP OVERRIDE
HIGH
LOW(DEFAULT)
LPC
SPI
LOW pop RC288 (DEFAULT)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
ENABLE
DISABLE
ENABLE
DISABLE
ESD request add
3.3V_CAM_EN#
3.3V_CAM_EN#
3.3V_HDD_EN
PCH_GPIO85
PCH_GPIO85
3.3V_TP_EN
3.3V_TP_EN
3.3V_TS_EN
PCH_GPIO84
PCH_GPIO84
PCH_GPIO83
PCH_GPIO83
BBS_BIT
BBS_BIT
CAM_MIC_CBL_DET#
CAM_MIC_CBL_DET#
CPPE#
CPPE#
CPUSB#
CPUSB#
PCH_GPIO87
PCH_GPIO87
EC_WAKE#
FFS_INT2
FFS_INT2
H_THERMTRIP#
H_THERMTRIP#_R
I2C0_SCL
I2C0_SCL
I2C0_SDA
I2C0_SDA
I2C1_SCL_TCH_PAD
I2C1_SCL_TCH_PAD I2C1_SCL_TCH_PAD
I2C1_SDA_TCH_PAD
I2C1_SDA_TCH_PAD
I2C1_SDA_TCH_PAD
IRQ_SERIRQ
IRQ_SERIRQ
KB_DET#
KB_DET#
LCD_CBL_DET#
LCD_CBL_DET#
MEDIACARD_IRQ#
MEDIACARD_PWREN
MEDIACARD_RST#
MEDIACARD_RST#
MPHYP_PWR_EN
MPHYP_PWR_EN
MPHYP_PWR_EN
NFC_IRQ
NFC_IRQ
PCH_AUDIO_EN
PCH_GPIO10
PCH_GPIO14
PCH_GPIO15
PCH_GPIO15
PCH_GPIO17
PCH_GPIO44
PCH_GPIO44
PCH_GPIO46
PCH_GPIO48
PCH_GPIO49
PCH_GPIO66
PCH_GPIO66
PCH_GPIO9
PCH_GPIO9
PCH_OPI_COMP
PM_LANPHY_ENABLE
SIO_EXT_SCI#
SIO_EXT_SCI#
SIO_EXT_SMI#
SIO_EXT_SMI#
SIO_EXT_WAKE#
SIO_EXT_WAKE#
SIO_RCIN#
SIO_RCIN#
SLATE_MODE_R
SLATE_MODE_R
SLP_ME_CSW_DEV#
SLP_ME_CSW_DEV#
SPKR
SPKR
TOUCH_PANEL_INTR#
TPM_ID0
TPM_ID0
TPM_ID1
TPM_ID1
USH_DET#
USH_DET#
PCH_OPI_COMP
EC_WAKE#
PCH_GPIO46
H_THERMTRIP#_R
PCH_GPIO83
+3.3V_RUN
+1.05V_VCCST
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_RUN +3.3V_RUN
+3.3V_ALW_PCH
+PCH_VCCDSW3_3
+PCH_VCCDSW3_3
SIO_EXT_WAKE#<36>
PM_LANPHY_ENABLE<28>
LAN_RST#<28>
SIO_RCIN# <37>
IRQ_SERIRQ <29,36,37>
FFS_INT2 <25>
LCD_CBL_DET# <22>
SPKR<26>
KB_DET#<38>
3.3V_CAM_EN#<22>
MPHYP_PWR_EN<39>
MEDIACARD_IRQ#<30>
NFC_IRQ<20>
PCH_NFC_RST<20>
USH_DET# <29>
CAM_MIC_CBL_DET# <22>
CPPE# <31>
CPUSB# <31>
H_THERMTRIP# <37>
I2C1_SDA_VMM <21>
I2C1_SCL_VMM <21>
I2C1_SDA_TCH_PAD <38>
I2C1_SCL_TCH_PAD <38>
MEDIACARD_RST#<30>
SIO_EXT_SCI#<37>
MEDIACARD_PWREN<30>
PCH_AUDIO_EN<9>
3.3V_TS_EN <22>
3.3V_HDD_EN <28>
SLP_ME_CSW_DEV# <36>
TOUCH_PANEL_INTR#<22>
EC_WAKE#<37>
TOUCH_RST_N_GYRO_INT1<10>
LANCLK_REQ#<28,7>
MPCIE_RST#<31,6>
MINI1CLK_REQ#<31,7>
MINI2CLK_REQ#<31,7>
CLKRUN#<29,36,37,9>
PCH_GPIO36<6>
USB_OC2# <11,33>
PCH_GPIO73 <7>
LAN_WAKE# <28,37>
mSATA_DEVSLP<31>
NFC_DET#<20>
HDD_DEVSLP<25>
SIO_EXT_SMI#<37>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (7/12)
12 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (7/12)
12 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (7/12)
12 58Friday, May 17, 2013
Compal Electronics, Inc.
T19@PAD~DT19@PAD~D
RC183100K_0402_5% RC183100K_0402_5%
12
RC177 @0_0402_5% RC177 @0_0402_5%
1 2
RC199 100K_0402_5%RC199 100K_0402_5%
12
RC288@
1K_0402_5%
RC288@
1K_0402_5%
12
RC175 10K_0402_5%RC175 10K_0402_5%
12
T18@PAD~DT18@PAD~D
RC185100K_0402_5% RC185100K_0402_5%
12
T138@PAD~DT138@PAD~D
RC210 100K_0402_5%RC210 100K_0402_5%
12
RC29110K_0402_5% RC29110K_0402_5%
12
RC211 100K_0402_5%RC211 100K_0402_5%
12
RC16849.9_0402_1% RC16849.9_0402_1%
1 2
T141@PAD~DT141@PAD~D
RC172@0_0402_5% RC172@0_0402_5%
12
RC170 100K_0402_5%RC170 100K_0402_5%
12
RP11
10K_8P4R_5%
RP11
10K_8P4R_5%
1
2
3
45
6
7
8
RC190
1K_0402_5%
RC190
1K_0402_5%
12
RP6
10K_8P4R_5%
RP6
10K_8P4R_5%
1
2
3
45
6
7
8
RC283@
1K_0402_5%
RC283@
1K_0402_5%
12
RC28410K_0402_5% RC28410K_0402_5%
12
R241K_0402_5% R241K_0402_5%
12
RC197 10K_0402_5%RC197 10K_0402_5%
12
RC292100_0402_5%
7@
RC292100_0402_5%
7@
1 2
RC171 10K_0402_5%RC171 10K_0402_5%
12
RC19310K_0402_5% RC19310K_0402_5%
12
RC218
@
10K_0402_5%
RC218
@
10K_0402_5%
12
CC91
@
100P_0402_50V8J
CC91
@
100P_0402_50V8J
12
RP4
10K_8P4R_5%
RP4
10K_8P4R_5%
1
2
3
45
6
7
8
RC222@
1K_0402_5%
RC222@
1K_0402_5%
12
RC28910K_0402_5% RC28910K_0402_5%
12
RC200 10K_0402_5%RC200 10K_0402_5%
12
RC176@0_0402_5%RC176@0_0402_5%
12
RC29010K_0402_5% RC29010K_0402_5%
12
RC206 10K_0402_5%RC206 10K_0402_5%
12
RP14
10K_8P4R_5%
RP14
10K_8P4R_5%
1
2
3
4 5
6
7
8
RP13
10K_8P4R_5%
RP13
10K_8P4R_5%
1
2
3
4 5
6
7
8
LPIO
GPIO
CPU/
HASWELL_MCP_E
MISC
Rev1p2
UC1J
10 OF 19
LPIO
GPIO
CPU/
HASWELL_MCP_E
MISC
Rev1p2
UC1J
10 OF 19
GPIO56
AG6
GPIO57
AP1
GPIO27
AN5
GPIO28
AD7
GPIO26
AN3
SDIO_D1/GPIO67 E4
SDIO_D2/GPIO68 C3
SDIO_D3/GPIO69 E2
SDIO_D0/GPIO66 D3
SDIO_CLK/GPIO64 E3
SDIO_CMD/GPIO65 F4
I2C1_SCL/GPIO7 F1
I2C1_SDA/GPIO6 G4
I2C0_SCL/GPIO5 F3
I2C0_SDA/GPIO4 F2
UART1_RST/GPIO2 J3
UART1_CTS/GPIO3 J4
UART1_RXD/GPIO0 K4
UART1_TXD/GPIO1 G2
UART0_CTS/GPIO94 G1
UART0_TXD/GPIO92 K3
UART0_RTS/GPIO93 J2
UART0_RXD/GPIO91 J1
GSPI1_MISO/GPIO89 N7
GSPI_MOSI/GPIO90 K2
GSPI1_CLK/GPIO88 L5
GSPI1_CS/GPIO87 R7
GSPI0_MOSI/GPIO86 L8
GSPI0_CLK/GPIO84 L6
GSPI0_MISO/GPIO85 N6
GSPI0_CS/GPIO83 R6
RCIN/GPIO82 V4
THERMTRIP D60
DEVSLP2/GPIO39
N5
SPKR/GPIO81
V2
DEVSLP1/GPIO38
L2 SDIO_POWER_EN/GPIO70
C4 DEVSLP0/GPIO33
P2
GPIO9
AM3
GPIO10
AM2
GPIO45
AG5
GPIO46
AG3
GPIO14
AH4
GPIO25
AM4
GPIO13
AT3 HSIOPC/GPIO71
Y2 GPIO50
P3 GPIO49
Y3
GPIO47
AB6
GPIO48
U4
GPIO59
AT5
GPIO16
Y1
GPIO17
T3
GPIO15
AD6
GPIO8
AU2
GPIO24
AD5
BMBUSY/GPIO76
P1
GPIO44
AK4
GPIO58
AL4
LAN_PHY_PWR_CTRL/GPIO12
AM7 SERIRQ T4
PCH_OPI_RCOMP AW15
RSVD AF20
RSVD AB21
RC28520K_0402_5% RC28520K_0402_5%
12
RC287@
1K_0402_5%
RC287@
1K_0402_5%
12
RC174@0_0402_5%RC174@0_0402_5%
12
RC230 10K_0402_5%RC230 10K_0402_5%
1 2
RC29410K_0402_5% RC29410K_0402_5%
12
T137@PAD~DT137@PAD~D
T139@PAD~DT139@PAD~D
RC28210K_0402_5% RC28210K_0402_5%
12
T140@PAD~DT140@PAD~D
RP7
2.2K_0804_8P4R_5%
RP7
2.2K_0804_8P4R_5%
1
2
3
4 5
6
7
8
RP5
10K_8P4R_5%
RP5
10K_8P4R_5%
1
2
3
45
6
7
8
RC169
@10K_0402_5%RC169
@10K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG4
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
Display Port Presence Strap
1: Enable(Default): Noa will be disable in
locked units and enable in un-locked
units
CFG8
ALLOW THE USE OF NOA ON LOCKED UNITS
0: Enable Noa will be available pegardless of
the locking of the unit
EAR-STALL/NOT STALL RESET SEQUENCE AFTER PCU PLL IS LOCKE
CFG0 1:(Default) Normal Operation; No stall
0:Lane Reversed
PCH/PCH LESS MODE SELECTION
CFG1 1:(Default) Normal Operation
0:Lane Reversed
1: VRS support SVID protocol are present
CFG9
NO SVID PROTOCOL CAPABLE VR CONNECTED
0:No VR support SVID is present
The chip will not generate(OR Respond to)
SVID activity
1: POWER FEATURES ACTIVATED DURING
RESET
CFG10
SAFE MODE BOOT
0: POWER FEATURES (ESPECIALLY CLOCK
GATINE ARE NOT ACTIVATED
CFG STRAPS for CPU
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
CFG0
CFG0
CFG1
CFG1
CFG10
CFG10 CFG4
CFG4
CFG8
CFG8
CFG9
CFG9
CFG_RCOMP
CFG_RCOMP
PROC_OPI_RCOMP
PROC_OPI_RCOMP
TDI_IREF
TDI_IREF
CFG0<9>
CFG2<9>
CFG4<9>
CFG5<9>
CFG6<9>
CFG7<9>
CFG1<9>
CFG3<9>
CFG8<9>
CFG9<9>
CFG10<9>
CFG11<9>
CFG12<9>
CFG13<9>
CFG14<9>
CFG15<9>
CFG16<9>
CFG19<9>
CFG18<9>
CFG17<9>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (8/12)
13 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (8/12)
13 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (8/12)
13 58Friday, May 17, 2013
Compal Electronics, Inc.
T30@
PAD~D T30@
PAD~D
T37@PAD~DT37@PAD~D
T38@PAD~DT38@PAD~D
T25@PAD~D T25@PAD~D
RC23749.9_0402_1% RC23749.9_0402_1%
1 2
T34 @PAD~D T34 @PAD~D
RC241@
1K_0402_1%
RC241@
1K_0402_1%
12
T22@PAD~D T22@PAD~D
RESERVED
HASWELL_MCP_E
Rev1p2
UC1S
19 OF 19
RESERVED
HASWELL_MCP_E
Rev1p2
UC1S
19 OF 19
CFG17
AA61 CFG18
U63
CFG7
Y60
CFG11
U60
CFG12
T63
RSVD_TP AU63
RSVD_TP C63
RSVD_TP C62
RSVD_TP L60
RSVD_TP B51
RSVD_TP A51
CFG10
V60 CFG9
V61 CFG8
V62
CFG6
Y61
RSVD
A5
RSVD B43
RSVD N60
RSVD Y22
RSVD W23
RSVD D58
RSVD AV62
RSVD_TP AV63
VSS N21
VSS P22
CFG_RCOMP
V63
CFG19
U62
CFG13
T62
RSVD R20
RSVD P20
PROC_OPI_RCOMP AY15
TD_IREF
B12
RSVD
E1
RSVD
D1
RSVD
J20
RSVD
H18
CFG5
Y62 CFG4
AA60 CFG3
AA63 CFG2
AC63 CFG1
AC62 CFG0
AC60
CFG16
AA62
CFG15
T60 CFG14
T61
T27@PAD~D T27@PAD~D
T28@PAD~D T28@PAD~D
T33@PAD~DT33@PAD~D
RC235 49.9_0402_1%RC235 49.9_0402_1%
12
T24@PAD~D T24@PAD~D
T23@PAD~D T23@PAD~D
T21@PAD~D T21@PAD~D
RC238
1K_0402_1%
RC238
1K_0402_1%
12
T31 @PAD~D T31 @PAD~D
T35@PAD~DT35@PAD~D
RC233@
1K_0402_1%
RC233@
1K_0402_1%
12
T29@PAD~D T29@PAD~D
T39@PAD~DT39@PAD~D
RC232@
1K_0402_1%
RC232@
1K_0402_1%
12
T20@PAD~D T20@PAD~D
T26@PAD~D T26@PAD~D
T36 @PAD~D T36 @PAD~D
T32 @PAD~D T32 @PAD~D
RC239@
1K_0402_1%
RC239@
1K_0402_1%
12
RC236 8.2K_0402_1%RC236 8.2K_0402_1%
1 2
RC240@
1K_0402_1%
RC240@
1K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1
2
4
3
1.B2-PKG-C1-PCB-C2-PKG-B3-PCB-A3-PKG-A4
2.A62-PKG-A61-PCB-B61-PKG-B62-PCB-B63-PKG-A60
3.AY60-PKG-AW61-PCB-AY61-PKG-AW62-PCB-AY62-PKG-AW63
4.AW1-PKG-AW3-PCB-AY3-PKG-AW2-PCB-AY2-PKG-AV1
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Package Daisy Chain:
DC_TEST_A3_B3
DC_TEST_A3_B3
DC_TEST_A4
DC_TEST_A60
DC_TEST_A61_B61
DC_TEST_A61_B61
DC_TEST_A62
DC_TEST_AV1
DC_TEST_AW1
DC_TEST_AW63
DC_TEST_AY2_AW2
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
DC_TEST_AY3_AW3
DC_TEST_AY60
DC_TEST_AY61_AW61
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
DC_TEST_AY62_AW62
DC_TEST_B62_B63
DC_TEST_C1_C2
RSVD_AL1
RSVD_AM11
RSVD_AP7
RSVD_AT2
RSVD_AU10
RSVD_AU15
RSVD_AU44
RSVD_AV44
RSVD_AW14
RSVD_AY14
RSVD_D15
RSVD_F22
RSVD_H22
RSVD_J21
RSVD_N23
RSVD_R23
RSVD_T23
RSVD_U10
TP_DC_TEST_B2
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (9/12)
14 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (9/12)
14 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (9/12)
14 58Friday, May 17, 2013
Compal Electronics, Inc.
T55@PAD~DT55@PAD~D
T62@PAD~DT62@PAD~D
T57 @
PAD~D T57 @
PAD~D
RC268@0_0402_5% RC268@0_0402_5%
12
T64 @
PAD~D T64 @
PAD~D
T49 @
PAD~D T49 @
PAD~D
T63 @
PAD~D T63 @
PAD~D
RC266@0_0402_5% RC266@0_0402_5%
12
T58@PAD~DT58@PAD~D
T53 @
PAD~D T53 @
PAD~D
HASWELL_MCP_E
Rev1p2
UC1Q
17 OF 19
HASWELL_MCP_E
Rev1p2
UC1Q
17 OF 19
DAISY_CHAIN_NCTF_AW62 AW62
DAISY_CHAIN_NCTF_AW63 AW63
DAISY_CHAIN_NCTF_AW61 AW61
DAISY_CHAIN_NCTF_AW3 AW3
DAISY_CHAIN_NCTF_AW2 AW2
DAISY_CHAIN_NCTF_A62 A62
DAISY_CHAIN_NCTF_AV1 AV1
DAISY_CHAIN_NCTF_AW1 AW1
DAISY_CHAIN_NCTF_A60 A60
DAISY_CHAIN_NCTF_A61 A61
DAISY_CHAIN_NCTF_A4 A4
DAISY_CHAIN_NCTF_A3 A3
DAISY_CHAIN_NCTF_C2
C2 DAISY_CHAIN_NCTF_C1
C1 DAISY_CHAIN_NCTF_B63
B63 DAISY_CHAIN_NCTF_B62
B62
DAISY_CHAIN_NCTF_B2
B2
DAISY_CHAIN_NCTF_B3
B3
DAISY_CHAIN_NCTF_B61
B61
DAISY_CHAIN_NCTF_AY61
AY61
DAISY_CHAIN_NCTF_AY62
AY62
DAISY_CHAIN_NCTF_AY3
AY3
DAISY_CHAIN_NCTF_AY60
AY60
DAISY_CHAIN_NCTF_AY2
AY2
T65 @
PAD~D T65 @
PAD~D
T60@PAD~DT60@PAD~D
T48 @
PAD~D T48 @
PAD~D
RC269 @0_0402_5% RC269 @0_0402_5%
12
T54@PAD~DT54@PAD~D
T61 @
PAD~D T61 @
PAD~D
T52@PAD~DT52@PAD~D
HASWELL_MCP_E
Rev1p2
UC1R
18 OF 19
HASWELL_MCP_E
Rev1p2
UC1R
18 OF 19
RSVD AP7
RSVD U10
RSVD AL1
RSVD AM11
RSVD AU10
RSVD AU15
RSVD R23
RSVD N23
RSVD T23
RSVD
J21 RSVD
H22 RSVD
F22
RSVD
D15 RSVD
AV44 RSVD
AU44 RSVD
AT2
RSVD AW14
RSVD AY14
T59 @
PAD~D T59 @
PAD~D
T50@PAD~DT50@PAD~D
T56 @
PAD~D T56 @
PAD~D
T51 @
PAD~D T51 @
PAD~D
RC254 @0_0402_5% RC254 @0_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAD Note: Place the PU resistors close to CPU
RC249close to CPU 300 - 1500mils
CAD Note: Place the PU resistors close to CPU
RC224 close to CPU 300 -
1500mils
CAD Note: RC250 SHOULD BE PLACED CLOSE TO CPU
check
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
RESISTOR STUFFING OPTIONS ARE
PROVIDED FOR TESTING PURPOSES
VDDQ DECOUPLING
VCC_SENSE
SVID ALERT
SVID DATA
ESD test request
CPU_PWR_DEBUG#
H_CPU_SVIDALRT#
H_CPU_SVIDALRT#
H_VCCST_PWRGD
H_VR_EN H_VR_READY
VCCSENSE
VCCSENSE
VCCST_PWRGD
VIDSCLK
VIDSOUT
VIDSOUT
VR_EN
VR_READY
VCCST_PWRGD
+1.35V_MEM
+VCC_CORE
+1.05V_RUN +VCCIO_OUT
+VCCIO_OUT
+VCCIOA_OUT
+1.05V_VCCST
+1.05V_VCCST
+VCC_CORE
+1.05V_RUN
+1.05V_RUN +1.05V_VCCST
+1.05V_VCCST
+VCC_CORE
+1.35V_MEM
+VCC_CORE
+1.05V_VCCST +3.3V_RUN
+1.05V_VCCST
+3.3V_ALW
+VCC_CORE +1.35V_MEM
VCCSENSE<46>
VIDSCLK<46>
VIDALERT_N<46>
VIDSOUT<46>
CPU_PWR_DEBUG#<9>
H_VR_EN<46>
H_VCCST_PWRGD<9>
H_VR_READY<46>
RESET_OUT#<37,9>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (10/12)
15 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (10/12)
15 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (10/12)
15 58Friday, May 17, 2013
Compal Electronics, Inc.
T71@PAD~D
T71@PAD~D
RC253
150_0402_1%
RC253
150_0402_1%
12
T76@PAD~D
T76@PAD~D
CC16
10U_0603_6.3V6M
CC16
10U_0603_6.3V6M
12
CC18
10U_0603_6.3V6M
CC18
10U_0603_6.3V6M
12
T68@PAD~D
T68@PAD~D
T72@PAD~D
T72@PAD~D
CC50
22U_0603_6.3V6M
CC50
22U_0603_6.3V6M
12
CC13
2.2U_0402_6.3V6M
CC13
2.2U_0402_6.3V6M
12
T84@PAD~D
T84@PAD~D
CC21
10U_0603_6.3V6M
CC21
10U_0603_6.3V6M
12
RC242 0_0603_5%
@
RC242 0_0603_5%
@
12
RC25610K_0402_5% RC25610K_0402_5%
12
RC263@0_0402_5%RC263@0_0402_5%
12
T78@PAD~D
T78@PAD~D
RC244
75_0402_1%
RC244
75_0402_1%
12
CC57
22U_0603_6.3V6M
EMC@
CC57
22U_0603_6.3V6M
EMC@
1 2
T67@PAD~DT67@PAD~D
CC19
10U_0603_6.3V6M
CC19
10U_0603_6.3V6M
12
RC246@0_0402_5%RC246@0_0402_5%
1 2
T83@PAD~D
T83@PAD~D
RC259@
10K_0402_5%
RC259@
10K_0402_5%
12
T85@PAD~D
T85@PAD~D
T81@PAD~D
T81@PAD~D
T77@PAD~D
T77@PAD~D
HSW ULT POWER
HASWELL_MCP_E
Rev1p2
UC1L
12 OF 19
HSW ULT POWER
HASWELL_MCP_E
Rev1p2
UC1L
12 OF 19
VCCST
AE22
VCCST
AE23
VCC
AB57
VCC
AD57
VCC K23
VCC C44
VCC C40
VCC C36
VCC C52
VCC C48
VCC E25
VCC E23
VCC C56
VCC E29
VCC E27
VCC E35
VCC E33
VCC E31
VCC E39
VCC E37
VCC E45
VCC E43
VCC E41
VCC E49
VCC E47
VCC E55
VCC E53
VCC E51
VCC E57
VCC F24
VCC F36
VCC F32
VCC F28
VCC F40
VCC F44
VCC F48
VCC F56
VCC F52
VCC G23
VCC G25
VCC G27
VCC G31
VCC G29
VCC G33
VCC G35
VCC G37
VCC G41
VCC G39
VCC G43
VCC G47
VCC G45
VCC G53
VCC G51
VCC G49
VCC G57
VCC G55
VCC J23
VCC H23
VCC K57
VCC L22
VCC P57
VCC M57
VCC M23
VCC U57
VCC W57
VCC
AG57
VCC
C32 VCC
C28 VCC
C24
RSVD
L59
RSVD
J58
VDDQ
AH26
VDDQ
AJ31
VDDQ
AJ33
VDDQ
AJ37
VDDQ
AN33
VDDQ
AP43
VDDQ
AR48
VIDSCLK
N63
VIDSOUT
L63
VR_EN
F60
RSVD_TP
P60 VSS
P62 PWR_DEBUG
H59 VSS
D63
VR_READY
C59
VCCST_PWRGD
B59
VIDALERT
L62
RSVD
AE59 RSVD
AA23
VCC_SENSE
E63
RSVD
N58
VDDQ
AY50
RSVD_TP
P61
VCCST
AC22
RSVD_TP
N59
RSVD
T59
RSVD
AD60
RSVD
AD59
RSVD
AE60
RSVD
AC59
RSVD
AG58
RSVD
V59 RSVD
U59
RSVD
AA59
RSVD_TP
N61
VDDQ
AY35
VDDQ
AY40
VDDQ
AY44
VCC
F59
RSVD
AC58
RSVD
AB23
RSVD
AD23 VCCIOA_OUT
E20 VCCIO_OUT
A59
CC22
@
100P_0402_50V8J
CC22
@
100P_0402_50V8J
1 2
UC4
74AUP1G07GW_TSSOP5
UC4
74AUP1G07GW_TSSOP5
NC
1
A
2
GND
3Y4
VCC 5
T70@PAD~D
T70@PAD~D
T66@PAD~DT66@PAD~D
CC81
@
2.2U_0402_6.3V6M
CC81
@
2.2U_0402_6.3V6M
12
T80@PAD~D
T80@PAD~D
CC24@0.1U_0402_25V6CC24@0.1U_0402_25V6
1 2
RC247@0_0402_5%RC247@0_0402_5%
1 2
RC258
@
10K_0402_5%
RC258
@
10K_0402_5%
12
T69@PAD~D
T69@PAD~D
RC249
110_0402_1%
RC249
110_0402_1%
12
T79@PAD~D
T79@PAD~D
T75@PAD~D
T75@PAD~D
T82@PAD~D
T82@PAD~D
CC52
@
2.2U_0402_6.3V6M
CC52
@
2.2U_0402_6.3V6M
12
RC255@
10K_0402_5%
RC255@
10K_0402_5%
12
T73@PAD~D
T73@PAD~D
RC24843_0402_5% RC24843_0402_5%
12
PJP11
PAD-OPEN1x1m
@PJP11
PAD-OPEN1x1m
@
1 2
RC245@0_0402_5%RC245@0_0402_5%
1 2
RC250
100_0402_1%
RC250
100_0402_1%
12
T74@PAD~D
T74@PAD~D
RC243
1K_0402_5%
RC243
1K_0402_5%
1 2
CC20
@
10U_0603_6.3V6M
CC20
@
10U_0603_6.3V6M
12
CC17
@
10U_0603_6.3V6M
CC17
@
10U_0603_6.3V6M
12
CC12
2.2U_0402_6.3V6M
CC12
2.2U_0402_6.3V6M
12
T86@PAD~D
T86@PAD~D
CC26
@
1U_0402_6.3V6K
CC26
@
1U_0402_6.3V6K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CC63 close to Pin J17
CC64 close to Pin R21
CC43 place near V8
CC28 place near AC9
CC44 place near AH14
CC60 place near AG16
CC45 place near U8
CC59 place near K14
CC35,CC38, CC39 place near AG10
CC46 CC47 place near AE9
CC34 and CC33 place near
J11; CC37 place near AE8
CC40 place near Y8
CC32 place near AH10
CC66 place near AH13
CC61 CC62 place near J13
CC56 place near AA21
CC49 place near B11
CC42 place near B18
CC29 place near K9;
CC27 place near L10
CC74 place near M9
CC51 place near J18
CC58 place near A20
CC65 place near AG19
CC30 place near AH11
CC54 place near AD10
CC53 place near AB8
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
ESD test request
+DCPRRTC
+PCH_VCCDSW
+PCH_VCCDSW
+PCH_VCCDSW_R
+1.05V_MODPHY +1.05V_MODPHY_PCH
+1.05V_MODPHY_PCH
+PCH_AUSB3PLL
+1.05V_MODPHY
+PCH_AUSB3PLL
+PCH_ASATA3PLL+1.05V_MODPHY
+PCH_ASATA3PLL
+V1.05S_APLLOPI+1.05V_RUN
+V1.05S_APLLOPI
+1.05V_M
+3.3V_ALW_PCH
+PCH_VCCDSW3_3
+PCH_VCC1P05
+PCH_VCCACLKPLL
+1.05V_RUN
+PCH_RTC_VCCSUS3_3 +3.3V_ALW_PCH
+3.3V_ALW
+PCH_RTC_VCCSUS3_3
+3.3V_M
+1.05V_M
+1.05V_M
+1.05V_M+PCH_DCPSUS1
+PCH_DCPSUS1
+1.5V_THERMAL +3.3V_RUN
+3.3V_RUN
+PCH_DCPSUS4 +1.05V_M
+PCH_DCPSUS4
+1.05V_RUN
+1.05V_RUN+1.05V_M
+3.3V_RUN
+3.3V_ALW_PCH
+1.05V_RUN
+PCH_VCCDSW3_3+3.3V_ALW_PCH
+3.3V_ALW
+3.3V_ALW_PCH
+PCH_DCPSUS
+PCH_DCPSUS
+1.05V_RUN
+PCH_VCC1P05+1.05V_RUN
+PCH_VCCACLKPLL
+1.05V_RUN
+RTC_CELL
+1.05V_RUN +VCC_CORE
+1.05V_RUN +3.3V_RUN
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (11/12)
16 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (11/12)
16 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (11/12)
16 58Friday, May 17, 2013
Compal Electronics, Inc.
CC55
100U_1206_6.3V6M
CC55
100U_1206_6.3V6M
12
RC275 5.11_0402_1%RC275 5.11_0402_1%
12
CC58
1U_0402_6.3V6K
CC58
1U_0402_6.3V6K
12
CC29
1U_0402_6.3V6K
CC29
1U_0402_6.3V6K
12
LC2
2.2UH_LQM2MPN2R2NG0L_30%
LC2
2.2UH_LQM2MPN2R2NG0L_30%
1 2
CC44
0.1U_0402_10V7K
CC44
0.1U_0402_10V7K
12
CC45
1U_0402_6.3V6K
CC45
1U_0402_6.3V6K
12
CC77
22U_0603_6.3V6M
CC77
22U_0603_6.3V6M
12
RC272 @0_0402_5% RC272 @0_0402_5%
12
CC83 22U_0603_6.3V6MEMC@ CC83 22U_0603_6.3V6MEMC@
1 2
CC37
1U_0402_6.3V6K
CC37
1U_0402_6.3V6K
12
CC65
1U_0402_6.3V6K
CC65
1U_0402_6.3V6K
12
+
CC71
330U_D3_2.5VY_R6M
@
+
CC71
330U_D3_2.5VY_R6M
@
12
CC79
100U_1206_6.3V6M
CC79
100U_1206_6.3V6M
12
LC4@
2.2UH_LQM2MPN2R2NG0L_30%
LC4@
2.2UH_LQM2MPN2R2NG0L_30%
12
CC53@
1U_0402_6.3V6K
CC53@
1U_0402_6.3V6K
12
CC36 0.1U_0402_10V7KCC36 0.1U_0402_10V7K
1 2
CC47
@
22U_0805_6.3V6M
CC47
@
22U_0805_6.3V6M
12
CC43
22U_0603_6.3V6M
CC43
22U_0603_6.3V6M
12
RC264 @0_0402_5% RC264 @0_0402_5%
12
RC262@0_0805_5%RC262@0_0805_5%
1 2
CC39
0.1U_0402_10V7K
CC39
0.1U_0402_10V7K
12
CC64
1U_0402_6.3V6K
CC64
1U_0402_6.3V6K
12
LC6
2.2UH_LQM2MPN2R2NG0L_30%
LC6
2.2UH_LQM2MPN2R2NG0L_30%
1 2
CC66@
1U_0402_6.3V6K
CC66@
1U_0402_6.3V6K
12
RC267@0_0402_5%RC267@0_0402_5%
1 2
CC49
22U_0603_6.3V6M
CC49
22U_0603_6.3V6M
12
CC84 22U_0603_6.3V6MEMC@ CC84 22U_0603_6.3V6MEMC@
1 2
CC54@
1U_0402_6.3V6K
CC54@
1U_0402_6.3V6K
12
+
CC72
330U_D3_2.5VY_R6M
@
+
CC72
330U_D3_2.5VY_R6M
@
12
CC35
1U_0402_6.3V6K
CC35
1U_0402_6.3V6K
12
LC3
2.2UH_LQM2MPN2R2NG0L_30%
LC3
2.2UH_LQM2MPN2R2NG0L_30%
1 2
CC32
@
1U_0402_6.3V6K
CC32
@
1U_0402_6.3V6K
12
LC1
2.2UH_LQM2MPN2R2NG0L_30%
LC1
2.2UH_LQM2MPN2R2NG0L_30%
1 2
LC5
2.2UH_LQM2MPN2R2NG0L_30%
LC5
2.2UH_LQM2MPN2R2NG0L_30%
1 2
CC27
1U_0402_6.3V6K
CC27
1U_0402_6.3V6K
12
RC261 @0_0402_5% RC261 @0_0402_5%
12
CC40
@
0.1U_0402_10V7K
CC40
@
0.1U_0402_10V7K
12
CC61@
1U_0402_6.3V6K
CC61@
1U_0402_6.3V6K
12
CC38
@
0.1U_0402_10V7K
CC38
@
0.1U_0402_10V7K
12
CC85 22U_0603_6.3V6MEMC@ CC85 22U_0603_6.3V6MEMC@
1 2
CC78
100U_1206_6.3V6M
CC78
100U_1206_6.3V6M
12
CC75@
100U_1206_6.3V6M
CC75@
100U_1206_6.3V6M
12
CC59
0.1U_0402_10V7K
CC59
0.1U_0402_10V7K
12
CC63
1U_0402_6.3V6K
CC63
1U_0402_6.3V6K
12
CC31
@
1U_0402_6.3V6K
CC31
@
1U_0402_6.3V6K
12
CC62
@
10U_0603_6.3V6M
CC62
@
10U_0603_6.3V6M
12
CC74
@
1U_0402_6.3V6K
CC74
@
1U_0402_6.3V6K
12
RC265 0_0402_5%@RC265 0_0402_5%@
1 2
CC30
1U_0402_6.3V6K
CC30
1U_0402_6.3V6K
12
CC33
1U_0402_6.3V6K
CC33
1U_0402_6.3V6K
12
CC56
1U_0402_6.3V6K
CC56
1U_0402_6.3V6K
12
CC51
1U_0402_6.3V6K
CC51
1U_0402_6.3V6K
12
CC60
1U_0402_6.3V6K
CC60
1U_0402_6.3V6K
12
+
CC73
@
330U_D3_2.5VY_R6M
+
CC73
@
330U_D3_2.5VY_R6M
12
CC42
22U_0603_6.3V6M
CC42
22U_0603_6.3V6M
12
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
THERMAL SENSOR
HASWELL_MCP_E
mPHY
OPI
CORE
USB2
LPT LP POWER
USB3
SDIO/PLSS
SUS OSCILLATOR
RTC
SPI
Rev1p2
UC1M
13 OF 19
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
THERMAL SENSOR
HASWELL_MCP_E
mPHY
OPI
CORE
USB2
LPT LP POWER
USB3
SDIO/PLSS
SUS OSCILLATOR
RTC
SPI
Rev1p2
UC1M
13 OF 19
VCCHSIO
K9
VCCHSIO
M9
VCC1_05
N8
VCC1_05
P9
RSVD
Y20
DCPSUS2
AH13
VCCAPLL
W21
DCPSUS3
J13
VCCSUS3_3
AC9
VCCSUS3_3
AA9
VCCUSB3PLL
B18
VCCSATA3PLL
B11
VCCDSW3_3
AH10
VCCSDIO U8
VCCSDIO T9
VCC3_3 K14
VCC3_3 K16
VCCASW AG13
VCCASW AG14
VCCSPI Y8
DCPRTC AE7
VCCRTC AG10
VCCSUS3_3 AH11
VCCCLK
J18
VCCACLKPLL
A20 VCCCLK
K19
VCCCLK
J17
RSVD
M20
VCCCLK
T21 VCCCLK
R21
VCCSUS3_3
AE20
VCCSUS3_3
AE21
VCCAPLL
AA21
VCCASW AG8
VCCASW AF9
VCCASW AE9
VCC1_05 AE8
VCC1_05 H15
VCC1_05 H11
VCC1_05 J11
VCC3_3
W9 VCC3_3
V8
DCPSUS4 AB8
RSVD AC20
VCC1_05 AG16
VCC1_05 AG17
RSVD
V21
RSVD
K18
VCCHSIO
L10
VCC1_05 AF22
DCPSUSBYP AG19
DCPSUSBYP AG20
DCPSUS1 AD10
DCPSUS1 AD8
VCCTS1_5 J15
VCCHDA
AH14
CC76
22U_0603_6.3V6M
CC76
22U_0603_6.3V6M
12
CC34
10U_0603_6.3V6M
CC34
10U_0603_6.3V6M
12
CC28
22U_0603_6.3V6M
CC28
22U_0603_6.3V6M
12
RC276@0_0603_5%RC276@0_0603_5%
1 2
CC46
1U_0402_6.3V6K
CC46
1U_0402_6.3V6K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAD Note: RC260 SHOULD BE PLACED CLOSE TO CPU
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
VSSSENSE
VSSSENSE <46>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (12/12)
17 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (12/12)
17 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
CPU (12/12)
17 58Friday, May 17, 2013
Compal Electronics, Inc.
HASWELL_MCP_E
Rev1p2
UC1N
14 OF 19
HASWELL_MCP_E
Rev1p2
UC1N
14 OF 19
VSS
AH34
VSS
AH36
VSS AJ39
VSS AJ41
VSS AJ35
VSS AJ47
VSS AJ54
VSS
AF15
VSS
AF18
VSS AP20
VSS AP17
VSS AN7
VSS AN63
VSS AN60
VSS AN52
VSS AN51
VSS AN48
VSS AN46
VSS AN45
VSS AN43
VSS AN42
VSS AN39
VSS AN36
VSS AN35
VSS AN32
VSS AN31
VSS AN17
VSS AM52
VSS AM31
VSS AM23
VSS AM17
VSS AL61
VSS AL60
VSS AL57
VSS AL54
VSS AL52
VSS AL46
VSS AL45
VSS AL40
VSS AL39
VSS AL36
VSS AL33
VSS AL31
VSS AL29
VSS AL26
VSS AL23
VSS AL22
VSS AL20
VSS AL17
VSS AL13
VSS AL10
VSS AK52
VSS AK3
VSS AK23
VSS AJ63
VSS AJ60
VSS AJ58
VSS AJ56
VSS AJ52
VSS AJ50
VSS AJ45
VSS AJ43
VSS
AJ29 VSS
AJ27 VSS
AJ25 VSS
AJ23 VSS
AJ14 VSS
AJ13 VSS
AH57 VSS
AH55 VSS
AH53
VSS
AH42 VSS
AH40
VSS
AH32 VSS
AH30 VSS
AH28 VSS
AH24 VSS
AH22 VSS
AH20 VSS
AH19 VSS
AH17 VSS
AG63 VSS
AG62 VSS
AG61 VSS
AG60 VSS
AG23 VSS
AG21 VSS
AG11 VSS
AG1
VSS
AF17
VSS
AF14 VSS
AF12 VSS
AF11 VSS
AE58 VSS
AE5 VSS
AE10 VSS
AD63 VSS
AD3 VSS
AD21 VSS
AC61 VSS
AB7 VSS
AB22 VSS
AB20 VSS
AB10 VSS
AA58 VSS
AA1 VSS
A56 VSS
A52 VSS
A48 VSS
A44 VSS
A40 VSS
A36 VSS
A32
VSS
A24 VSS
A18 VSS
A14 VSS
A11
VSS
A28
VSS AL51
VSS AM1
VSS AN23
VSS AN40
VSS AN49
VSS AP10
VSS
AH38
VSS
AH51 VSS
AH49 VSS
AH44
HASWELL_MCP_E
Rev1p2
UC1P
16 OF 19
HASWELL_MCP_E
Rev1p2
UC1P
16 OF 19
VSS
D49
VSS V3
VSS V7
VSS W20
VSS W22
VSS_SENSE E62
VSS V23
VSS AH46
VSS V58
VSS J10
VSS
D33
VSS L7
VSS H57
VSS
D41
VSS
D42
VSS
H13 VSS
G8
VSS
G5 VSS
G3
VSS
G18 VSS
F61 VSS
F58 VSS
F54
VSS
F46
VSS
F26 VSS
F20
VSS
E11 VSS
D8 VSS
D62
VSS
D57 VSS
D55 VSS
D54 VSS
D53 VSS
D51 VSS
D50 VSS
D5
VSS
D47 VSS
D46 VSS
D45 VSS
D43
VSS
D34
VSS
D35
VSS
D37
VSS
D38
VSS
D39
VSS
G6
VSS
G22
VSS
F30
VSS
E17
VSS
F34
VSS
F42
VSS AH16
VSS
F50
VSS
F38
VSS H17
VSS J22
VSS J59
VSS J63
VSS K1
VSS K12
VSS L13
VSS L15
VSS L17
VSS L18
VSS L20
VSS L58
VSS L61
VSS M22
VSS N10
VSS N3
VSS P59
VSS P63
VSS R10
VSS R8
VSS R22
VSS T1
VSS T58
VSS U20
VSS U61
VSS U22
VSS U9
VSS V10
VSS Y10
VSS Y59
VSS Y63
VSS
D59
RC260 100_0402_1%RC260 100_0402_1%
1 2
HASWELL_MCP_E
Rev1p2
UC1O
15 OF 19
HASWELL_MCP_E
Rev1p2
UC1O
15 OF 19
VSS
AU28
VSS C14
VSS C11
VSS AW60
VSS AW40
VSS AW16
VSS AV8
VSS AV59
VSS
AP22
VSS
AV34
VSS D31
VSS D30
VSS D29
VSS D21
VSS D2
VSS D18
VSS D14
VSS D12
VSS C57
VSS C39
VSS C38
VSS C27
VSS C25
VSS C20
VSS C18
VSS B60
VSS B56
VSS B52
VSS B48
VSS B44
VSS B40
VSS B4
VSS B36
VSS B32
VSS B28
VSS B26
VSS B24
VSS B20
VSS AY6
VSS AY59
VSS AY57
VSS AY53
VSS AY51
VSS AY4
VSS AY33
VSS AY30
VSS AY26
VSS AY24
VSS AY22
VSS AY18
VSS AY16
VSS AY11
VSS AW59
VSS AW51
VSS AW50
VSS AW47
VSS AW44
VSS AW42
VSS AW4
VSS AW37
VSS AW35
VSS AW33
VSS AW24
VSS
AV51 VSS
AV49 VSS
AV46 VSS
AV43 VSS
AV41 VSS
AV39 VSS
AV36
VSS
AV14 VSS
AU59 VSS
AU57
VSS
AU53 VSS
AU51
VSS
AU30
VSS
AU26 VSS
AU24 VSS
AU22 VSS
AU20 VSS
AU18 VSS
AU16 VSS
AU1 VSS
AT63 VSS
AT62 VSS
AT61 VSS
AT49 VSS
AT46 VSS
AT43 VSS
AT42 VSS
AT40 VSS
AT37 VSS
AT35 VSS
AT13 VSS
AR52 VSS
AR5 VSS
AR49 VSS
AR43 VSS
AR39 VSS
AR33 VSS
AR31 VSS
AR23 VSS
AR17 VSS
AR15
VSS
AP57 VSS
AP54 VSS
AP52 VSS
AP48 VSS
AP39
VSS
AP31
VSS
AP29 VSS
AP26 VSS
AP23
VSS
AP38
VSS
AP3
VSS
AV55
VSS D23
VSS D25
VSS D27
VSS D26
VSS
AU55
VSS
AU33
VSS
AR11
VSS
AV20
VSS
AV28
VSS
AV33
VSS
AV24
VSS
AV16
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H=4mm
Reverse Type
CAD NOTE
PLACE THE CAP NEAR TO DIMM RESET PIN
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
Layout Note:
Place near JDIMM1
Layout Note:
Place near
JDIMM1.203,204
DDR3L SODIMM ODT GENERATION
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
DDR3_DRAMRST#
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_D0
DDR_A_D1
DDR_A_D10 DDR_A_D11
DDR_A_D12DDR_A_D13
DDR_A_D14 DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D2
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D3
DDR_A_D30
DDR_A_D31
DDR_A_D32DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36 DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D4
DDR_A_D40DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44 DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D5
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D6
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0DDR_A_MA1
DDR_A_MA10
DDR_A_MA11DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
DDR_A_MA2DDR_A_MA3
DDR_A_MA4DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_RAS#
DDR_A_WE#
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
M_CLK_DDR#0 M_CLK_DDR#1
M_CLK_DDR0 M_CLK_DDR1
M_ODT0
M_ODT1
0.675V_DDR_VTT_ON
0.675V_DDR_VTT_ON
M_ODT0
M_ODT1
+0.675V_DDR_VTT
+1.35V_MEM
+1.35V_MEM
+1.35V_MEM
+1.35V_MEM+1.35V_MEM
+3.3V_RUN
+0.675V_DDR_VTT
+DIMM1_VREF_DQ
+0.675V_DDR_VTT
+SM_VREF_CA_DIMM
+SM_VREF_DQ0_DIMM1
+5V_ALW
+1.35V_MEM
+1.35V_MEM
+SM_VREF_CA_DIMM1
+SM_VREF_DQ0
+1.35V_MEM
+SM_VREF_DQ0_DIMM1
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
DDR_A_DQS#[0..7]<8>
DDR3_DRAMRST#_CPU <9>DDR3_DRAMRST#<19>
DDR_CKE0_DIMMA<8>
DDR_A_BS2<8>
DDR_CS1_DIMMA#<8>
DDR_A_WE#<8>
DDR_A_CAS#<8>
DDR_A_BS0<8>
DDR_A_BS1 <8>
DDR_A_RAS# <8>
M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>M_CLK_DDR#0<8>
M_CLK_DDR0<8>
DDR_CKE1_DIMMA <8>
DDR_CS0_DIMMA# <8>
DDR_XDP_WAN_SMBCLK <19,25,31,7,9>
DDR_XDP_WAN_SMBDAT <19,25,31,7,9>
DDR_PG_CTRL<9>
M_ODT2 <19>
M_ODT3 <19>
0.675V_DDR_VTT_ON <43>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DDR3L
18 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DDR3L
18 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DDR3L
18 58Friday, May 17, 2013
Compal Electronics, Inc.
RD6@0_0402_5%RD6@0_0402_5%
1 2
CD30
10U_0603_6.3V6M
CD30
10U_0603_6.3V6M
12
R33 66.5_0402_1%R33 66.5_0402_1%
1 2
CD1
2.2U_0402_6.3V6M
CD1
2.2U_0402_6.3V6M
12
RC279@0_0402_5%RC279@0_0402_5%
1 2
CD6
1U_0402_6.3V6K
CD6
1U_0402_6.3V6K
12
CD12
2.2U_0402_6.3V6M
CD12
2.2U_0402_6.3V6M
12
CD21
10U_0603_6.3V6M
CD21
10U_0603_6.3V6M
12
R29 66.5_0402_1%R29 66.5_0402_1%
1 2
U5
74AUP1G07GW_TSSOP5
U5
74AUP1G07GW_TSSOP5
NC
1
A
2
GND
3Y4
VCC 5
CD29
0.1U_0402_25V6
CD29
0.1U_0402_25V6
12
CD26
0.1U_0402_25V6
CD26
0.1U_0402_25V6
12
+
CD22
330U_D3_2.5VY_R6M
+
CD22
330U_D3_2.5VY_R6M
12
CD4
1U_0402_6.3V6K
CD4
1U_0402_6.3V6K
12
CD9
1U_0402_6.3V6K
CD9
1U_0402_6.3V6K
12
CD8
1U_0402_6.3V6K
CD8
1U_0402_6.3V6K
12
CD2
0.1U_0402_25V6
CD2
0.1U_0402_25V6
12
RD1@0_0402_5%RD1@0_0402_5%
1 2
CD24
0.1U_0402_25V6
CD24
0.1U_0402_25V6
12
CC70
0.022U_0402_16V7K
CC70
0.022U_0402_16V7K
12
R30 66.5_0402_1%R30 66.5_0402_1%
1 2
RD5@0_0402_5%RD5@0_0402_5%
1 2
CD23@0.1U_0402_25V6CD23@0.1U_0402_25V6
1 2
R28
220K_0402_5%
R28
220K_0402_5%
12
CD25
@
2.2U_0402_6.3V6M
CD25
@
2.2U_0402_6.3V6M
12
CD3@
0.1U_0402_25V6
CD3@
0.1U_0402_25V6
12
CD14
10U_0603_6.3V6M
CD14
10U_0603_6.3V6M
12
CD20
10U_0603_6.3V6M
CD20
10U_0603_6.3V6M
12
CD27
0.1U_0402_25V6
CD27
0.1U_0402_25V6
12
RC217
1.8K_0402_1%
RC217
1.8K_0402_1%
12
R31 66.5_0402_1%R31 66.5_0402_1%
1 2
CD15@
10U_0603_6.3V6M
CD15@
10U_0603_6.3V6M
12
CD5
1U_0402_6.3V6K
CD5
1U_0402_6.3V6K
12
CD28
0.1U_0402_25V6
CD28
0.1U_0402_25V6
12
CD17
10U_0603_6.3V6M
CD17
10U_0603_6.3V6M
12
JDIMM1
CONN@
FOX_AS0A621-U4R6-7H
JDIMM1
CONN@
FOX_AS0A621-U4R6-7H
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
RD3
470_0402_5%
RD3
470_0402_5%
12
RC195
24.9_0402_1%
RC195
24.9_0402_1%
12
RD12@0_0402_5% RD12@0_0402_5%
1 2
CD11
1U_0402_6.3V6K
CD11
1U_0402_6.3V6K
12
CD10
1U_0402_6.3V6K
CD10
1U_0402_6.3V6K
12
CD7
1U_0402_6.3V6K
CD7
1U_0402_6.3V6K
12
G
D
S
QD1
BSS138-G_SOT23-3
G
D
S
QD1
BSS138-G_SOT23-3
1
2
3
RC221
1.8K_0402_1%
RC221
1.8K_0402_1%
12
CD31
10U_0603_6.3V6M
CD31
10U_0603_6.3V6M
12
CD13
0.1U_0402_25V6
CD13
0.1U_0402_25V6
12
CD16
10U_0603_6.3V6M
CD16
10U_0603_6.3V6M
12
R32@
2M_0402_5%
R32@
2M_0402_5%
1 2
RC173 2_0402_1%RC173 2_0402_1%
1 2
CD19
10U_0603_6.3V6M
CD19
10U_0603_6.3V6M
12
CD18
@
10U_0603_6.3V6M
CD18
@
10U_0603_6.3V6M
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H=4mm
Reverse Type
CAD NOTE
PLACE THE CAP NEAR TO DIMM RESET PIN
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
Layout Note:
Place near JDIMM2
Layout Note:
Place near
JDIMM2.203,204
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
DDR3_DRAMRST#
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_D0DDR_B_D1
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D2
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D3
DDR_B_D30
DDR_B_D31
DDR_B_D32DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36 DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D4
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D5
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D6
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_D7
DDR_B_D8 DDR_B_D9
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0DDR_B_MA1
DDR_B_MA10
DDR_B_MA11DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
DDR_B_MA2DDR_B_MA3
DDR_B_MA4DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_RAS#
DDR_B_WE#
DDR_CKE2_DIMMB DDR_CKE3_DIMMB
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_CLK_DDR#2 M_CLK_DDR#3
M_CLK_DDR2 M_CLK_DDR3
M_ODT2
+1.35V_MEM
+1.35V_MEM +1.35V_MEM
+1.35V_MEM
+0.675V_DDR_VTT
+DIMM2_VREF_DQ
+3.3V_RUN
+3.3V_RUN
+0.675V_DDR_VTT +0.675V_DDR_VTT
+SM_VREF_CA_DIMM
+1.35V_MEM
+SM_VREF_CA+SM_VREF_CA_DIMM
+SM_VREF_DQ1
+1.35V_MEM
+SM_VREF_DQ1_DIMM2
+SM_VREF_DQ1_DIMM2
+SM_VREF_CA_DIMM2
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
DDR_B_DQS#[0..7]<8>
DDR3_DRAMRST# <18>
DDR_B_CAS#<8>
DDR_B_WE#<8>
DDR_CKE2_DIMMB<8>
DDR_B_BS0<8>
DDR_B_BS2<8>
DDR_CS3_DIMMB#<8>
M_CLK_DDR2<8>
M_CLK_DDR#2<8>
DDR_CKE3_DIMMB <8>
DDR_B_RAS# <8>
DDR_B_BS1 <8>
M_ODT2 <18>
DDR_CS2_DIMMB# <8>
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
M_ODT3 <18>
DDR_XDP_WAN_SMBCLK <18,25,31,7,9>
DDR_XDP_WAN_SMBDAT <18,25,31,7,9>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DDR3L
19 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DDR3L
19 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DDR3L
19 58Friday, May 17, 2013
Compal Electronics, Inc.
CD48
10U_0603_6.3V6M
CD48
10U_0603_6.3V6M
12
RD11@
0_0402_5%
RD11@
0_0402_5%
12
CD41
1U_0402_6.3V6K
CD41
1U_0402_6.3V6K
12
CD61
@
2.2U_0402_6.3V6M
CD61
@
2.2U_0402_6.3V6M
12
CD34@
0.1U_0402_25V6
CD34@
0.1U_0402_25V6
12
CD32
2.2U_0402_6.3V6M
CD32
2.2U_0402_6.3V6M
12
CD43
2.2U_0402_6.3V6M
CD43
2.2U_0402_6.3V6M
12
+
CD53
330U_D3_2.5VY_R6M
+
CD53
330U_D3_2.5VY_R6M
12
RC67
1.8K_0402_1%
RC67
1.8K_0402_1%
12
CD58
10U_0603_6.3V6M
CD58
10U_0603_6.3V6M
12
RD13@0_0402_5% RD13@0_0402_5%
1 2
CD59
10U_0603_6.3V6M
CD59
10U_0603_6.3V6M
12
RC126 2_0402_1%RC126 2_0402_1%
1 2
CD57
0.1U_0402_25V6
CD57
0.1U_0402_25V6
12
CC67
0.022U_0402_16V7K
CC67
0.022U_0402_16V7K
12
CD33
0.1U_0402_25V6
CD33
0.1U_0402_25V6
12
CD52
10U_0603_6.3V6M
CD52
10U_0603_6.3V6M
12
CD45
10U_0603_6.3V6M
CD45
10U_0603_6.3V6M
12
RC68 2_0402_1%RC68 2_0402_1%
1 2
CD55
0.1U_0402_25V6
CD55
0.1U_0402_25V6
12
CD56
0.1U_0402_25V6
CD56
0.1U_0402_25V6
12
CD51
10U_0603_6.3V6M
CD51
10U_0603_6.3V6M
12
CD49
10U_0603_6.3V6M
CD49
10U_0603_6.3V6M
12
RC130
1.8K_0402_1%
RC130
1.8K_0402_1%
12
CD39
1U_0402_6.3V6K
CD39
1U_0402_6.3V6K
12
RC83
24.9_0402_1%
RC83
24.9_0402_1%
12
CD44
0.1U_0402_25V6
CD44
0.1U_0402_25V6
12
RC128
24.9_0402_1%
RC128
24.9_0402_1%
12
CD42
1U_0402_6.3V6K
CD42
1U_0402_6.3V6K
12
CD47@
10U_0603_6.3V6M
CD47@
10U_0603_6.3V6M
12
CD35
1U_0402_6.3V6K
CD35
1U_0402_6.3V6K
12
CD50
10U_0603_6.3V6M
CD50
10U_0603_6.3V6M
12
CD60
0.1U_0402_25V6
CD60
0.1U_0402_25V6
12
CD40
1U_0402_6.3V6K
CD40
1U_0402_6.3V6K
12
RD10@0_0402_5%RD10@0_0402_5%
12
JDIMM2 CONN@
FOX_AS0A621-U4R6-7H
JDIMM2 CONN@
FOX_AS0A621-U4R6-7H
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
CD38
1U_0402_6.3V6K
CD38
1U_0402_6.3V6K
12
CC69
0.022U_0402_16V7K
CC69
0.022U_0402_16V7K
12
RC69
1.8K_0402_1%
RC69
1.8K_0402_1%
12
RD7@0_0402_5%RD7@0_0402_5%
1 2
CD54
0.1U_0402_25V6
CD54
0.1U_0402_25V6
12
CD36
1U_0402_6.3V6K
CD36
1U_0402_6.3V6K
12
RC132
1.8K_0402_1%
RC132
1.8K_0402_1%
12
CD46@
10U_0603_6.3V6M
CD46@
10U_0603_6.3V6M
12
CD37
1U_0402_6.3V6K
CD37
1U_0402_6.3V6K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
C1 close to JNFC1
NFC CONN
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
NFC_DET#
NFC_DET#
NFC_RST
NFC_RST
NFC_SMBCLK
NFC_SMBDATA
TP_NFC_RSVD1
TP_NFC_RSVD3
TP_NFC_RSVD3
TP_NFC_RSVD4
TP_NFC_SWP_PWR_RSVD
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
NFC_IRQ<12>
NFC_SMBDATA<7>
PLTRST_NFC#<9>
PCH_NFC_RST<12>
NFC_DET#<12>
NFC_SMBCLK<7>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
NFC
20 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
NFC
20 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
NFC
20 58Friday, May 17, 2013
Compal Electronics, Inc.
U29
TC7SH08FU_SSOP5~D
U29
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
JNFC1
E-T_6705K-Y15N-00L
CONN@
JNFC1
E-T_6705K-Y15N-00L
CONN@
1
12
23
34
45
56
67
78
89
910
10 11
11 12
12 13
13 14
14 15
15 GND 16
GND 17
T87@PAD~DT87@PAD~D
T88@PAD~DT88@PAD~D
C1
@
0.1U_0402_16V4Z
C1
@
0.1U_0402_16V4Z
12
C388@
0.1U_0402_25V6
C388@
0.1U_0402_25V6
12
R38 100K_0402_5%R38 100K_0402_5%
1 2
R37@0_0402_5%R37@0_0402_5%
1 2
T89@PAD~DT89@PAD~D
2
2
1
1
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
EEPROM
+1.05V_VMM_VDD
+1.05V_VMM_VDDTX
CLK_27M_IN
CLK_27M_IN_R
CLK_27M_OUT
CLK_DDC2_DOCK
DAT_DDC2_DOCK
DOCKED
DOCKED
DP12412_AUX#_C
DP12412_AUX_C
DP12412_HPD
DP12412_N0_C
DP12412_N1_C
DP12412_N2_C
DP12412_N3_C
DP12412_P0_C
DP12412_P1_C
DP12412_P2_C
DP12412_P3_C
HSYNC_DOCK
LP_CTL
SRCDET
SRCDET
SW_DPB_AUX
SW_DPB_AUX#
SW_DPB_AUX#
SW_DPC_AUX
SW_DPC_AUX#
VMM2310_AUXN
VMM2310_AUXN
VMM2310_AUXP
VMM2310_HDP
VMM2310_HDP
VMM2310_SCL
VMM2310_SCL
VMM2310_SDA
VMM2310_SDA
VMM2310_TX2N0
VMM2310_TX2N0
VMM2310_TX2N1
VMM2310_TX2N1
VMM2310_TX2N2
VMM2310_TX2N2
VMM2310_TX2N3
VMM2310_TX2N3
VMM2310_TX2P0
VMM2310_TX2P0
VMM_DPB_CTRLCLK
VMM_DPB_CTRLCLK
VMM_DPB_CTRLDAT
VMM_DPB_CTRLDAT
VMM_DPC_CTRLCLK
VMM_DPC_CTRLDAT
VMM_GPIO6
VMM_GPIO6
VMM_GPIO7
VMM_GPIO7
VMM_GPIO8
VMM_GPIO8
VMM_GPIO9
VMM_MESCL
VMM_MESCL
VMM_MESDA
VMM_MESDA
VMM_SPI_CLK
VMM_SPI_CS#
VMM_SPI_DIN
VMM_SPI_DO
VMM_SPI_WP#
VSYNC_DOCK
+3.3V_RUN_VDDIO
VMM_SPI_CLK
VMM_SPI_CS#
VMM_SPI_DIN
VMM_SPI_DO
VMM_SPI_HOLD
VMM_SPI_WP#
VMM_GPIO9
BLUE_DOCK
GREEN_DOCK
RED_DOCK
SW_DPB_AUX
SW_DPC_AUX
SW_DPC_AUX#
VMM_DPC_CTRLCLK
VMM_DPC_CTRLDAT
VMM_SPI_CS#
VMM_SPI_HOLD
LP_CTL
RED_DOCK
GREEN_DOCK
BLUE_DOCK
+3.3V_RUN_VMM
+1.05V_RUN_VMM
+3.3V_RUN_VMM
+3.3V_RUN_VMM
+5V_ALW
+1.05V_RUN +1.05V_RUN_VMM
+3.3V_RUN +3.3V_RUN_VMM
+1.05V_RUN_VMM
+3.3V_RUN_VMM
+3.3V_RUN_VDDA
+3.3V_RUN_VDDA
+3.3V_RUN_VMM
PLTRST_VMM2320#<9>
HSYNC_DOCK <34>
VSYNC_DOCK <34>
CLK_DDC2_DOCK <34>
DAT_DDC2_DOCK <34>
I2C1_SDA_VMM <12>
I2C1_SCL_VMM <12>
DP12412_HPD<27>
DP12412_AUX#<27>
DP12412_AUX<27>
DP12412_P3<27>
DP12412_N0<27>
DP12412_P0<27>
DP12412_N1<27>
DP12412_P1<27>
DP12412_N2<27>
DP12412_P2<27>
DP12412_N3<27>
VMM_DPC_CTRLDAT <24>
SW_DPC_AUX# <24>
SW_DPC_AUX <24>
VMM_DPC_CTRLCLK <24>
DPC_DOCK_HPD <34>
DPC_LANE_P0 <34>
DPC_LANE_P1 <34>
DPC_LANE_N1 <34>
DPC_LANE_P2 <34>
DPC_LANE_N2 <34>
DPC_LANE_P3 <34>
DPC_LANE_N3 <34>
DPC_LANE_N0 <34>
DPC_CA_DET <24,34>
VMM_DPB_CTRLDAT <24>
DPB_LANE_N3 <34>
DPB_LANE_P3 <34>
DPB_LANE_N2 <34>
DPB_LANE_P2 <34>
DPB_LANE_N0 <34>
DPB_LANE_P1 <34>
DPB_LANE_P0 <34>
SW_DPB_AUX <24>
SW_DPB_AUX# <24>
DPB_LANE_N1 <34>
DPB_CA_DET <24,34>
VMM_DPB_CTRLCLK <24>
DPB_DOCK_HPD <34>
DOCKED<27,28,32,36>
RED_DOCK <34>
GREEN_DOCK <34>
BLUE_DOCK <34>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DP 1.2 MST HUB
21 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DP 1.2 MST HUB
21 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DP 1.2 MST HUB
21 58Friday, May 17, 2013
Compal Electronics, Inc.
C190.1U_0402_10V7K C190.1U_0402_10V7K
1 2
C1590.1U_0402_10V7K C1590.1U_0402_10V7K
1 2
R911M_0402_5% R911M_0402_5%
1 2
C24
0.01U_0402_16V7K
C24
0.01U_0402_16V7K
12
L1
BLM18AG102SN1D_2P
L1
BLM18AG102SN1D_2P
1 2
R81@0_0402_5%R81@0_0402_5%
1 2
C433 470P_0402_50V7KC433 470P_0402_50V7K
1 2
C15
0.1U_0402_25V6
C15
0.1U_0402_25V6
12
R311150_0402_1% R311150_0402_1%
12
C23
0.01U_0402_16V7K
C23
0.01U_0402_16V7K
12
C1550.1U_0402_10V7K C1550.1U_0402_10V7K
1 2
U7
W25X10CVSNIG_SO8
U7
W25X10CVSNIG_SO8
CS#
1
DO(IO1)
2
WP#(IO2)
3
GND
4DI(IO0) 5
CLK 6
HOLD#(IO3) 7
VCC 8
C1620.1U_0402_10V7K C1620.1U_0402_10V7K
1 2
C22
0.1U_0402_25V6
C22
0.1U_0402_25V6
12
R76@0_0402_5%R76@0_0402_5%
1 2
R522.2K_0402_5% R522.2K_0402_5%
1 2
C27
0.1U_0402_25V6
C27
0.1U_0402_25V6
12
R471M_0402_5% R471M_0402_5%
12
T40@PAD~DT40@PAD~D
L2
BLM18AG102SN1D_2P
L2
BLM18AG102SN1D_2P
1 2
C1570.1U_0402_10V7K C1570.1U_0402_10V7K
1 2
R207 @100K_0402_5% R207 @100K_0402_5%
12
R88@0_0402_5%R88@0_0402_5%
1 2
C42
22P_0402_50V8J
C42
22P_0402_50V8J
12
C1600.1U_0402_10V7K C1600.1U_0402_10V7K
1 2
R691M_0402_5% R691M_0402_5%
1 2
C200.1U_0402_10V7K C200.1U_0402_10V7K
1 2
C392
0.1U_0402_10V7K
C392
0.1U_0402_10V7K
1 2
R312150_0402_1% R312150_0402_1%
12
C43
22P_0402_50V8J
C43
22P_0402_50V8J
12
R441M_0402_5% R441M_0402_5%
1 2
R107@0_0402_5%R107@0_0402_5%
1 2
RP9
2.2K_0804_8P4R_5%
RP9
2.2K_0804_8P4R_5%
1
2
3
4 5
6
7
8
C8
1U_0603_10V6K
C8
1U_0603_10V6K
12
R422.2K_0402_5% R422.2K_0402_5%
1 2
C26
1U_0603_10V6K
C26
1U_0603_10V6K
12
C9
0.1U_0402_25V6
C9
0.1U_0402_25V6
12
C21
1U_0603_10V6K
C21
1U_0603_10V6K
12
R402.2K_0402_5% R402.2K_0402_5%
1 2
C11
0.1U_0402_25V6
C11
0.1U_0402_25V6
12
C29
0.01U_0402_16V7K
C29
0.01U_0402_16V7K
12
L4
BLM18AG102SN1D_2P
L4
BLM18AG102SN1D_2P
1 2
C10
0.01U_0402_16V7K
C10
0.01U_0402_16V7K
12
R631M_0402_5% R631M_0402_5%
12
C12
0.01U_0402_16V7K
C12
0.01U_0402_16V7K
12
R7410K_0402_5% 3@ R7410K_0402_5% 3@
12
C1580.1U_0402_10V7K C1580.1U_0402_10V7K
1 2
R77@0_0402_5%R77@0_0402_5%
1 2
R462.2K_0402_5% R462.2K_0402_5%
1 2
R853.74K_0402_1% 3@ R853.74K_0402_1% 3@
1 2
C25
1U_0603_10V6K
C25
1U_0603_10V6K
12
Y1
27MHZ_12PF_X1E000021042600
Y1
27MHZ_12PF_X1E000021042600
IN
1
GND
2
OUT 3
GND 4
R652.2K_0402_5% R652.2K_0402_5%
12
C432 0.1U_0402_10V7KC432 0.1U_0402_10V7K
1 2
R75@0_0402_5%R75@0_0402_5%
1 2
R921M_0402_5% R921M_0402_5%
12
C1610.1U_0402_10V7K C1610.1U_0402_10V7K
1 2
R66
1M_0402_5%
R66
1M_0402_5%
12
C17
0.1U_0402_25V6
C17
0.1U_0402_25V6
12
U6A
IDTVMM2320BKG8_BGA168
U6A
IDTVMM2320BKG8_BGA168
RxN3
D2 RxP3
D1 RxN2
E2 RxP2
E1
RxP1
F1
RxN1
F2
RxN0
G2 RxP0
G1
RxAUXP
H1
RXAUXN
H2
RxSRCDET
C2
RxHPD
J1
Tx0N1 A8
Tx0N3 A10
Tx0N2 A9
CAD0 A14
Tx0N0 A7
Tx0AUXN A11
Tx0P2 B9
Tx0P3 B10
Tx0DDCSDA A12
Tx0HPD A6
Tx0DDCSCL B12
Tx0AUXP B11
Tx0P0 B7
Tx0P1 B8
Tx1HPD K14
Tx1DDCSDA L14
Tx1DDCSCL K13
Tx1AUXN J14
Tx1AUXP J13
CAD1 M14
Tx1N3 H14
Tx1P3 H13
Tx1N2 G14
Tx1P2 G13
Tx1N1 F14
Tx1P1 F13
Tx1N0 E14
Tx1P0 E13
VGA_GP M7
VGA_RP M6
VGA_IREF M5
VGA_SDA M4
VGA_DET M3
RSTN_IN
A13
XIN
K1
XOUT
L1
SSCL A2
SSDA A1
VGA_SCL L4
VGA_NC L5
VGA_RN L6
TCK M10
TMS L12
TMS2 L13
TDO L10
MESCL
B5
ROMWP
B1
SPICLK
B3
SPIDO
A3
GPIO1
D13
GPIO3
C13
GPIO5
B13
GPIO6/INT
C1
GPIO7/MSCL
M12
GPIO8/MSDA
M13
VGA_BN L8
VGA_VSYNC L9
VGA_HSYNC M9
VGA_BP M8
VGA_GN L7
TRSTN M11
MESDA
B6
TDI L11
SPICS
A4
SPIDI
B4
GPIO0
D14
GPIO2
C14
GPIO4
B14
LP_CTL
B2 GPIO9
L3
RX_STS
K2
TX0_STS
L2
TX1_STS
M1
TX2_STS
M2
LP_EN
A5
R492.2K_0402_5% R492.2K_0402_5%
1 2
C16
1U_0603_10V6K
C16
1U_0603_10V6K
12
L5
BLM18AG102SN1D_2P
L5
BLM18AG102SN1D_2P
1 2
U31
TPS22966DPUR_SON14_2X3
U31
TPS22966DPUR_SON14_2X3
VIN1
1
VIN1
2
ON1
3
VBIAS
4
ON2
5
VIN2
6
VIN2
7VOUT2 8
VOUT2 9
CT2 10
GND 11
CT1 12
VOUT1 13
VOUT1 14
GPAD 15
C132
10U_0603_6.3V6M
C132
10U_0603_6.3V6M
12
C34
0.1U_0402_25V6
C34
0.1U_0402_25V6
1 2
R6410K_0402_5% R6410K_0402_5%
12
C1560.1U_0402_10V7K C1560.1U_0402_10V7K
1 2
C18
0.01U_0402_16V7K
C18
0.01U_0402_16V7K
12
C28
0.01U_0402_16V7K
C28
0.01U_0402_16V7K
12
C14
0.01U_0402_16V7K
C14
0.01U_0402_16V7K
12
R351150_0402_1% R351150_0402_1%
12
R84@0_0402_5%R84@0_0402_5%
1 2
C394 470P_0402_50V7KC394 470P_0402_50V7K
1 2
1V Digital 1 V Analog 3.3V IO
3.3V Analog
U6B
IDTVMM2320BKG8_BGA168
1V Digital 1 V Analog 3.3V IO
3.3V Analog
U6B
IDTVMM2320BKG8_BGA168
VDD
E6
VDD
E7
VDD
E8
VDD
E9
VDD
H7 VDD
H6
VDD
H8
VDD
H9
VDDRX
E3
VDDRX
G3
VDDTX0
C8
VDDTX0
C9
VDDLP
E5
VDDTX0A0
E10
VDDRXA1
F3
VDDTX0A1
C7
VDDTX1
G12
VDDTX1A0
H11
VDDRXA0
H3
VDDRXA2
D3
VDDTX1A2
D12
VGA_AVDD
J10
VDDTX1A1
E12
VDDTX0A2
C6
VDDTX1
F12
VDDXT1V
J3
VDDRX_33 H5
VDDXT3V
J4 VDDIO
K12 VDDIO
K11 VDDIO
K4 VDDIO
K3 VDDIO
C12 VDDIO
C11 VDDIO
C4 VDDIO
C3
VDDSA
J2
VGA_AVDD
K10 VGA_AVDD
K9 VGA_AVDD
K8
VSS D5
VSS D7
VSS D9
VSS D11
VSS E4
VSS E11
VSS F4
VSS F5
VSS F6
VSS F7
VSS D10
VSS D8
VSS D6
VSS F9
VSS F10
VSS F11
VSS G5
VSS G6
VSS G8
VSS G10
VSS H4
VSS J11
VSS K5
VGA_AVSS J6
VGA_AVSS J7
VGA_AVSS J8
VGA_AVSS J9
VGA_AVDD33 K6
VDDTX0_33 C10
VDDTX1_33 H12
VGA_AVDD33 K7
VSS C5
VSS F8
VSS G7
VSS G4
VSS G9
VSS G11
VSS J5
VSS J12
VGA_AVSS H10
VSS D4
C13
0.01U_0402_16V7K
C13
0.01U_0402_16V7K
12
R73@0_0402_5%R73@0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Close to JEDP1.11,12
change back to CCD_OFF at Goliad project
For Touchscreen
Close to JEDP1.33 Close to JLED1.1 Close to JLED1.40 Close to JLED1.2
LCDVDD POWER
Backlight POWER
WebCAM
LED CONN
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Close to JEDP1.24~27
ESD depop location
2nd source SA000028Y10
+3.3V_CAM_Q
+5V_TSP_Q
BIA_PWM
BIA_PWM
BIA_PWM_EC
DISP_ON
DISP_ON
EDP_BIA_PWM
EDP_CPU_AUX#_C
EDP_CPU_AUX_C
EDP_CPU_LANE_N0_C
EDP_CPU_LANE_N1_C
EDP_CPU_LANE_P0_C
EDP_CPU_LANE_P1_C
EN_LCDPWR
PWR_SRC_ON
USBP3_D+
USBP3_D-
LOOP_BACK
LOOP_BACK
USBP3_D+
USBP3_D-
+PWR_SRC
+LCDVDD +5V_TSP
+5V_TSP
+5V_RUN+5V_RUN
+3.3V_CAM
+3.3V_RUN
+3.3V_CAM +5V_ALW
+LCDVDD
+BL_PWR_SRC
+3.3V_CAM
+5V_ALW
+BL_PWR_SRC
+5V_TSP
+3.3V_ALW
+LCDVDD
+3.3V_RUN
+BL_PWR_SRC
+3.3V_RUN
EN_INVPWR<37>USBP3-<11>
USBP3+<11>
3.3V_TS_EN<12>
EDP_CPU_LANE_P0 <10>
EDP_CPU_LANE_P1 <10>
EDP_CPU_AUX# <10>
EDP_CPU_LANE_N1 <10>
EDP_CPU_LANE_N0 <10>
EDP_CPU_AUX <10>
LCD_TST <36>
EDP_CPU_HPD <10>
DMIC_CLK <26>
DMIC0 <26>
CAM_MIC_CBL_DET# <12>
BREATH_WHITE_LED#<40>
CCD_OFF<36>
3.3V_CAM_EN#<12>
BATT_YELLOW_LED#<40>
BATT_WHITE_LED#<40>
PANEL_HDD_LED#<40>
TOUCH_PANEL_INTR#<12>
USBP7+ <11>
USBP7- <11>
LCD_VCC_TEST_EN<36>
ENVDD_PCH<10,36>
PANEL_BKLEN <10>
PANEL_BKEN_EC <36>
EDP_BIA_PWM <10>
BIA_PWM_EC <37>
LCD_CBL_DET# <12>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
eDP CONN & Touch screen
22 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
eDP CONN & Touch screen
22 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
eDP CONN & Touch screen
22 58Friday, May 17, 2013
Compal Electronics, Inc.
C54 0.1U_0402_10V7KC54 0.1U_0402_10V7K
12
C63
@
0.1U_0402_25V6
C63
@
0.1U_0402_25V6
12
LE1
BLM15BB221SN1D_2P~D
EMC@
LE1
BLM15BB221SN1D_2P~D
EMC@
1 2
C65
0.1U_0603_50V7K
C65
0.1U_0603_50V7K
12
R101@0_0402_5%R101@0_0402_5%
1 2
JEDP1
CONN@
ACES_50398-04071-001
JEDP1
CONN@
ACES_50398-04071-001
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
25 25
26 26
27 27
28 28
29 29
30 30
31 31
32 32
33 33
34 34
35 35
36 36
37 37
38 38
39 39
40 40
G1
41 G2
42 G3
43 G4
44 G5
45
U9
APL3512ABI-TRG_SOT23-5
U9
APL3512ABI-TRG_SOT23-5
VOUT
1
GND
2
EN
3
SS 4
VIN 5
R108
1K_0402_5%
R108
1K_0402_5%
12
CE1@
100P_0402_50V8J
CE1@
100P_0402_50V8J
12
C62
@
0.1U_0402_25V6
C62
@
0.1U_0402_25V6
12
C66
1000P_0402_50V7K
C66
1000P_0402_50V7K
12
C67
0.1U_0402_25V6
C67
0.1U_0402_25V6
12
R106@0_0402_5%R106@0_0402_5%
1 2
G
D
S
LP2301ALT1G_SOT23-3
Q1
G
D
S
LP2301ALT1G_SOT23-3
Q1
1
2
3
C3
@
0.1U_0402_16V4Z
C3
@
0.1U_0402_16V4Z
12
C59 0.1U_0402_10V7KC59 0.1U_0402_10V7K
12
R96
100K_0402_5%
R96
100K_0402_5%
12
CE2@
100P_0402_50V8J
CE2@
100P_0402_50V8J
12
R102@0_0402_5%R102@0_0402_5%
1 2
D8@
L30ESDL5V0C3-2_SOT23-3
D8@
L30ESDL5V0C3-2_SOT23-3
1
2
3
S
G
D
Q2
FDC654P-G_SSOT-6
S
G
D
Q2
FDC654P-G_SSOT-6
1
2
3
4 5
6
Q17B
DMN66D0LDW-7_SOT363-6
Q17B
DMN66D0LDW-7_SOT363-6
34
5
R95
10K_0402_5%
R95
10K_0402_5%
12
R94
47K_0402_5%
R94
47K_0402_5%
12
C60 0.1U_0402_10V7KC60 0.1U_0402_10V7K
12
C430
0.01U_0402_16V7K
@
C430
0.01U_0402_16V7K
@
12
R100@0_0402_5%R100@0_0402_5%
1 2
PJP10
PAD-OPEN1x1m
@
PJP10
PAD-OPEN1x1m
@
12
G
D
S
LP2301ALT1G_SOT23-3
Q3
G
D
S
LP2301ALT1G_SOT23-3
Q3
1
2
3
R99 47K_0402_5%R99 47K_0402_5%
1 2
C57 0.1U_0402_10V7KC57 0.1U_0402_10V7K
12
C431@
10U_0603_6.3V6M
C431@
10U_0603_6.3V6M
12
D21
BAT54CW_SOT323-3
D21
BAT54CW_SOT323-3
1
2
3
C55 0.1U_0402_10V7KC55 0.1U_0402_10V7K
12
L8
EMC@
DLW21HN900SQ2L_4P
L8
EMC@
DLW21HN900SQ2L_4P
1
1
4
433
22
C61
0.1U_0402_25V6
C61
0.1U_0402_25V6
12
D2
BAT54CW_SOT323-3
D2
BAT54CW_SOT323-3
1
2
3
Q17A
DMN66D0LDW-7_SOT363-6
Q17A
DMN66D0LDW-7_SOT363-6
1
2
6
C52
0.1U_0603_50V7K
C52
0.1U_0603_50V7K
12
C64
@
0.1U_0402_25V6
C64
@
0.1U_0402_25V6
12
G
D
S
Q4
L2N7002WT1G_SC-70-3
G
D
S
Q4
L2N7002WT1G_SC-70-3
1
2
3
D10
BAT54CW_SOT323-3
D10
BAT54CW_SOT323-3
1
2
3
C56 0.1U_0402_10V7KC56 0.1U_0402_10V7K
12
C68
@
0.1U_0402_25V6
C68
@
0.1U_0402_25V6
12
R97
100K_0402_5%
R97
100K_0402_5%
12
R104
100K_0402_5%
R104
100K_0402_5%
1 2
PJP9
PAD-OPEN1x1m
@
PJP9
PAD-OPEN1x1m
@
12
JLED1
CONN@
E-T_4260K-Q06N-23L
JLED1
CONN@
E-T_4260K-Q06N-23L
1
1
2
2
3
3
4
4
5
5
6
6
GND
7
GND
8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
+5V_HDMI_DDC
CPU_DPB_CTRLCLK_R
CPU_DPB_CTRLCLK_R
CPU_DPB_CTRLDAT_R
CPU_DPB_CTRLDAT_R
HDMI_CEC
HDMI_CEC
HDMI_HPD_SINK
HDMI_HPD_SINK
HDMI_OB
TMDSB_CON_CLK
TMDSB_CON_CLK
TMDSB_CON_CLK#
TMDSB_CON_CLK#
TMDSB_CON_N0
TMDSB_CON_N0
TMDSB_CON_N1
TMDSB_CON_N1
TMDSB_CON_N2
TMDSB_CON_N2
TMDSB_CON_P0
TMDSB_CON_P0
TMDSB_CON_P1
TMDSB_CON_P1
TMDSB_CON_P2
TMDSB_CON_P2
TMDS_CLK#_C
TMDS_CLK#_C
TMDS_CLK_C
TMDS_CLK_C
TMDS_N0_C
TMDS_N0_C
TMDS_N1_C
TMDS_N1_C
TMDS_N2_C
TMDS_N2_C
TMDS_P0_C
TMDS_P0_C
TMDS_P1_C
TMDS_P1_C
TMDS_P2_C
TMDS_P2_C
+5V_RUN
+VHDMI_VCC
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
DDI1_LANE_P3<10>
DDI1_LANE_N3<10>
DDI1_LANE_P1<10>
DDI1_LANE_N1<10>
CPU_DPB_CTRLCLK<10>
CPU_DPB_CTRLDAT<10>
DPB_HPD<10>
DDI1_LANE_P2<10>
DDI1_LANE_N2<10>
DDI1_LANE_P0<10>
DDI1_LANE_N0<10>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
HDMI CONN
23 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
HDMI CONN
23 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
HDMI CONN
23 58Friday, May 17, 2013
Compal Electronics, Inc.
C382
@
1.8P_0402_50V8
C382
@
1.8P_0402_50V8
12
G
D
S
Q29
L2N7002WT1G_SC-70-3
G
D
S
Q29
L2N7002WT1G_SC-70-3
1
2
3
Q120A
DMN66D0LDW-7_SOT363-6
Q120A
DMN66D0LDW-7_SOT363-6
1
2
6
C87@
0.1U_0402_10V7K
C87@
0.1U_0402_10V7K
12
C279
@
1.8P_0402_50V8
C279
@
1.8P_0402_50V8
12
C278
@
1.8P_0402_50V8
C278
@
1.8P_0402_50V8
12
R471 2.2K_0402_5%R471 2.2K_0402_5%
1 2
D65
@
RB751VM-40TE-17_SOD323-2
D65
@
RB751VM-40TE-17_SOD323-2
1 2
L20 @
9NH_0402HS-9N0EJTS_5%
L20 @
9NH_0402HS-9N0EJTS_5%
1 2
L10EMC@
DLW21SN900HQ2L-0805_4P
L10EMC@
DLW21SN900HQ2L-0805_4P
1
122
33
4
4
JHDMI1 CONN@
LCN_AUF05-1922S10-0019
JHDMI1 CONN@
LCN_AUF05-1922S10-0019
D2+
1D2_shield
2D2-
3D1+
4D1_shield
5D1-
6D0+
7D0_shield
8D0-
9CK+
10 CK_shield
11 CK-
12 CEC
13 Reserved
14 SCL
15 SDA
16 DDC/CEC_GND
17 +5V
18 HP_DET
19
GND 20
GND 21
GND 22
GND 23
R466 470_0402_1%R466 470_0402_1%
1 2
C274
@
1.8P_0402_50V8
C274
@
1.8P_0402_50V8
12
L9 @
9NH_0402HS-9N0EJTS_5%
L9 @
9NH_0402HS-9N0EJTS_5%
1 2
R462 470_0402_1%R462 470_0402_1%
1 2
C271 0.1U_0402_10V7KC271 0.1U_0402_10V7K
12
Q120B
DMN66D0LDW-7_SOT363-6
Q120B
DMN66D0LDW-7_SOT363-6
34
5
R469 470_0402_1%R469 470_0402_1%
1 2
C275
@
1.8P_0402_50V8
C275
@
1.8P_0402_50V8
12
C277
@
1.8P_0402_50V8
C277
@
1.8P_0402_50V8
12
C199 0.1U_0402_10V7KC199 0.1U_0402_10V7K
12
R468 470_0402_1%R468 470_0402_1%
1 2
R474 20K_0402_5%R474 20K_0402_5%
1 2
G
D
S
Q121
L2N7002WT1G_SC-70-3
G
D
S
Q121
L2N7002WT1G_SC-70-3
1
2
3
C209 0.1U_0402_10V7KC209 0.1U_0402_10V7K
12
R470 2.2K_0402_5%R470 2.2K_0402_5%
1 2
C269 0.1U_0402_10V7KC269 0.1U_0402_10V7K
12
C276
@
1.8P_0402_50V8
C276
@
1.8P_0402_50V8
12
L18 @
9NH_0402HS-9N0EJTS_5%
L18 @
9NH_0402HS-9N0EJTS_5%
1 2
L15 @
9NH_0402HS-9N0EJTS_5%
L15 @
9NH_0402HS-9N0EJTS_5%
1 2
L19 EMC@
DLW21SN900HQ2L-0805_4P
L19 EMC@
DLW21SN900HQ2L-0805_4P
1
122
33
4
4
R465 470_0402_1%R465 470_0402_1%
1 2
C333
@
0.1U_0402_16V4Z
C333
@
0.1U_0402_16V4Z
12
R463 470_0402_1%R463 470_0402_1%
1 2
L12 @
9NH_0402HS-9N0EJTS_5%
L12 @
9NH_0402HS-9N0EJTS_5%
1 2
L14 @
9NH_0402HS-9N0EJTS_5%
L14 @
9NH_0402HS-9N0EJTS_5%
1 2
R473@10K_0402_5% R473@10K_0402_5%
12
C270 0.1U_0402_10V7KC270 0.1U_0402_10V7K
12
U48
AP2330W-7_SC59-3
U48
AP2330W-7_SC59-3
IN 1
GND
2
OUT
3
R460 10K_0402_5%R460 10K_0402_5%
1 2
C191 0.1U_0402_10V7KC191 0.1U_0402_10V7K
12
L17 @
9NH_0402HS-9N0EJTS_5%
L17 @
9NH_0402HS-9N0EJTS_5%
1 2
L13 EMC@
DLW21SN900HQ2L-0805_4P
L13 EMC@
DLW21SN900HQ2L-0805_4P
1
122
33
4
4
R467 470_0402_1%R467 470_0402_1%
1 2
R464 470_0402_1%R464 470_0402_1%
1 2
C103 0.1U_0402_10V7KC103 0.1U_0402_10V7K
12
C273
@
1.8P_0402_50V8
C273
@
1.8P_0402_50V8
12
R472@
0_0402_5%
R472@
0_0402_5%
12
L11 @
9NH_0402HS-9N0EJTS_5%
L11 @
9NH_0402HS-9N0EJTS_5%
1 2
L16 EMC@
DLW21SN900HQ2L-0805_4P
L16 EMC@
DLW21SN900HQ2L-0805_4P
1
122
33
4
4
C272 0.1U_0402_10V7KC272 0.1U_0402_10V7K
12
R475
1M_0402_5%
R475
1M_0402_5%
1 2
C88
10U_0603_6.3V6M
C88
10U_0603_6.3V6M
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUX/DDC SW for DPB to E-DOCK
AUX/DDC SW for DPC to E-DOCK
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
DPB_CA_DET
DPB_CA_DET
DPB_CA_DET#
DPB_DOCK_AUX#
DPC_CA_DET
DPC_CA_DET
DPC_CA_DET#
DPC_DOCK_AUX
DPC_DOCK_AUX#
SW_DPB_AUX#_C
SW_DPB_AUX_C
SW_DPC_AUX#_C
SW_DPC_AUX_C
DPB_DOCK_AUX
+3.3V_RUN_VMM
+3.3V_RUN_VMM
+3.3V_RUN_VMM
+3.3V_RUN_VMM
SW_DPB_AUX#<21>
SW_DPB_AUX<21>
VMM_DPB_CTRLDAT <21>
DPB_DOCK_AUX#<34>
DPB_DOCK_AUX<34>
SW_DPC_AUX#<21>
SW_DPC_AUX<21>
VMM_DPC_CTRLDAT <21>
VMM_DPC_CTRLCLK <21>
DPC_DOCK_AUX#<34>
DPC_DOCK_AUX<34>
DPC_CA_DET<21,34>
DPB_CA_DET<21,34>
VMM_DPB_CTRLCLK <21>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DP SW
24 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DP SW
24 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
DP SW
24 58Friday, May 17, 2013
Compal Electronics, Inc.
C94 0.1U_0402_10V7KC94 0.1U_0402_10V7K
12
R120 1M_0402_5%R120 1M_0402_5%
1 2
C98 0.1U_0402_10V7KC98 0.1U_0402_10V7K
12
C95 0.1U_0402_10V7KC95 0.1U_0402_10V7K
12
C97
0.1U_0402_25V6
C97
0.1U_0402_25V6
1 2
U11
PI3C3125LEX_TSSOP14~D
U11
PI3C3125LEX_TSSOP14~D
BE0
1
A0
2
B0
3
BE1
4
A1
5
B1
6
GND
7B2 8
A2 9
BE2 10
B3 11
A3 12
BE3 13
VCC 14
G
D
S
Q10
BSS138W-7-F_SOT323-3
G
D
S
Q10
BSS138W-7-F_SOT323-3
1
2
3
U13
PI3C3125LEX_TSSOP14~D
U13
PI3C3125LEX_TSSOP14~D
BE0
1
A0
2
B0
3
BE1
4
A1
5
B1
6
GND
7B2 8
A2 9
BE2 10
B3 11
A3 12
BE3 13
VCC 14
C93
0.1U_0402_25V6
C93
0.1U_0402_25V6
1 2
R56
100K_0402_5%
R56
100K_0402_5%
12
G
D
S
Q6
BSS138W-7-F_SOT323-3
G
D
S
Q6
BSS138W-7-F_SOT323-3
1
2
3
C99 0.1U_0402_10V7KC99 0.1U_0402_10V7K
12
R60
100K_0402_5%
R60
100K_0402_5%
12
R121 1M_0402_5%R121 1M_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Free Fall Sensor
Place near HDD CONN
+3.3V_RUN_FFS
+5V_HDD
DDR_XDP_WAN_SMBCLK
DDR_XDP_WAN_SMBDAT
FFS_INT2
FFS_INT2
FFS_INT2_Q
FFS_INT2_Q
HDD_DET#
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1
HDD_DEVSLP
+3.3V_RUN
+3.3V_RUN
+5V_HDD
+3.3V_RUN
+5V_HDD +3.3V_HDD
+3.3V_HDD
+5V_RUN
+3.3V_HDD
DDR_XDP_WAN_SMBCLK<18,19,31,7,9>
FFS_INT2<12>
HDD_DET#<6>
SATA_PTX_DRX_P1_C<6>
SATA_PTX_DRX_N1_C<6>
SATA_PRX_DTX_P1_C<6>
SATA_PRX_DTX_N1_C<6>
HDD_FALL_INT<10>
DDR_XDP_WAN_SMBDAT<18,19,31,7,9>
HDD_DEVSLP<12>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
HDD CONN
25 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
HDD CONN
25 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
HDD CONN
25 58Friday, May 17, 2013
Compal Electronics, Inc.
PJP2
PAD-OPEN1x1m
@PJP2
PAD-OPEN1x1m
@
12
Q19B
DMN66D0LDW-7_SOT363-6
Q19B
DMN66D0LDW-7_SOT363-6
34
5
C101
10U_0603_6.3V6M
C101
10U_0603_6.3V6M
12
C106 0.01U_0402_16V7KC106 0.01U_0402_16V7K
12
R188@10K_0402_5%R188@10K_0402_5%
1 2
C111
1000P_0402_50V7K
C111
1000P_0402_50V7K
12
Q19A
DMN66D0LDW-7_SOT363-6
Q19A
DMN66D0LDW-7_SOT363-6
1
2
6
PJP3@
PAD-OPEN1x1m
PJP3@
PAD-OPEN1x1m
1 2
C102
0.1U_0402_25V6
C102
0.1U_0402_25V6
12
R126
100K_0402_5%
R126
100K_0402_5%
12
C109 0.01U_0402_16V7KC109 0.01U_0402_16V7K
12
C112
0.1U_0402_25V6
C112
0.1U_0402_25V6
12
C114
0.1U_0402_25V6
C114
0.1U_0402_25V6
12
LNG3DM
U15
LNG3DMTR_LGA16_3X3~D
LNG3DM
U15
LNG3DMTR_LGA16_3X3~D
VDD_IO
1
NC 2
NC 3
SCL/SPC
4
GND 5
SDA / SDI / SDO
6SDO/SA0
7
CS
8
INT 2
9
RES 10
INT 1
11
GND 12
RES 13
VDD
14 RES 15
RES 16
R123 10K_0402_5%R123 10K_0402_5%
1 2
C105 0.01U_0402_16V7KC105 0.01U_0402_16V7K
12
R122 10K_0402_5%R122 10K_0402_5%
1 2
C108 0.01U_0402_16V7KC108 0.01U_0402_16V7K
12
JSATA1
CONN@
ACES_50406-02071-001
JSATA1
CONN@
ACES_50406-02071-001
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
G1
21
G2
22
G3
23
G4
24
C113
@
0.1U_0402_25V6
C113
@
0.1U_0402_25V6
12
R125@
100K_0402_5%
R125@
100K_0402_5%
12
2
2
1
1
B B
A A
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
Place R136 close to codec
Place R142 close to codec
Add for solve pop noise and detect issue
40 mils trace keep 10 mil spacing
Close to U17
Place close to Codec
Place C134 close to Codec
SLEEVE/RING2 please keep 40 mils trace width
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
AUD_HP_OUT_L/ AUD_HP_OUT_Rplease keep 15 mils trace width
Internal Speakers Header
Close to U17 pin5 Close to U17 pin6
Place closely to Pin 13.
Place closely to Pin 14
place at AGND and DGND plane
Realtek feedback
Prevent the Noise from Combo Jack
while system entry into S3 / S4 /S5
place close to pin27
place close to pin38
place close to pin45place close to pin39
place close to pin2
+ALC290_LDO_CAP
+ALC3226_CPVEE
+ALC3226_VREF
+DVDD_CORE
+VDDA_AVDD1
+VDDA_AVDD2
+VDDA_PVDD
+VREFOUT
AUD_HP_OUT_L
AUD_HP_OUT_R
AUD_NB_MUTE#
AUD_NB_MUTE#
AUD_OUT_L
AUD_OUT_R
AUD_PC_BEEP
AUD_SENSE_A
AUD_SENSE_A
AUD_SENSE_B
AUD_SENSE_B
DMIC_CLK
DMIC_CLK
DMIC_CLK_L
I2S_BCLK
I2S_DI#
I2S_DO
I2S_LRCLK
I2S_MCLK
INT_SPKR_L+
INT_SPKR_L-
INT_SPKR_R+
INT_SPKR_R-
INT_SPK_L+
INT_SPK_L+
INT_SPK_L-
INT_SPK_L-
INT_SPK_R+
INT_SPK_R+
INT_SPK_R-
INT_SPK_R-
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_SDOUT
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
RING2
RING2
SLEEVE
SLEEVE
SLEEVE
+3.3V_RUN_AUDIO
+3.3V_RUN_AUDIO +3.3V_RUN_AUDIO
+3.3V_RUN_AUDIO
+3.3V_ALW
+5V_ALW
+5V_RUN_AUDIO
+3.3V_RUN_AUDIO
+3.3V_RUN_AUDIO
+5V_RUN_AUDIO
+VREFOUT
+5V_RUN_AUDIO
+3.3V_RUN_AUDIO
+VREFOUT
+RTC_CELL
PCH_AZ_CODEC_SDIN0<6>
AUD_NB_MUTE#<36>
PCH_AZ_CODEC_BITCLK<6>
PCH_AZ_CODEC_RST#<6>
PCH_AZ_CODEC_SYNC<6>
PCH_AZ_CODEC_SDOUT<6>
DOCK_MIC_DET <36>DOCK_HP_DET<36>
AUD_HP_NB_SENSE <35,36>
DAI_BCLK#<34>
DAI_LRCK#<34>
DAI_DO#<34>
DAI_12MHZ#<34>
DAI_DI<34>
RUN_ON<36,37,39>
DMIC_CLK <22>
DMIC0 <22>
EN_I2S_NB_CODEC# <36>
RING2 <35>
SLEEVE <35>
AUD_HP_OUT_L <35>
AUD_HP_OUT_R <35>
BEEP <37>
SPKR <12>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Codec _ALC3226
26 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Codec _ALC3226
26 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Codec _ALC3226
26 58Friday, May 17, 2013
Compal Electronics, Inc.
R147 1K_0402_5%R147 1K_0402_5%
1 2
R156
39.2K_0402_1%
R156
39.2K_0402_1%
12
R202
100K_0402_5%
R202
100K_0402_5%
12
C130
@
22P_0402_50V8J
C130
@
22P_0402_50V8J
12
C141@0.1U_0402_25V6C141@0.1U_0402_25V6
1 2
R213@0_0402_5%R213@0_0402_5%
1 2
R137EMC_3@ 22_0402_5%R137EMC_3@ 22_0402_5%
1 2
C136@
10P_0402_50V8J
C136@
10P_0402_50V8J
12
C120
0.1U_0402_25V6
C120
0.1U_0402_25V6
12
R150 10K_0402_5%R150 10K_0402_5%
1 2
C118
1U_0603_10V6K
C118
1U_0603_10V6K
12
L23 BLM18PG330SN1_2P
EMC@
L23 BLM18PG330SN1_2P
EMC@
1 2
Q123A
DMN66D0LDW-7_SOT363-6
Q123A
DMN66D0LDW-7_SOT363-6
1
2
6
C385 10U_0603_6.3V6MC385 10U_0603_6.3V6M
1 2
R140@
0_0603_5%
R140@
0_0603_5%
12
C124@
1000P_0402_50V7K
C124@
1000P_0402_50V7K
12
R153@10K_0402_5%R153@10K_0402_5%
1 2
C119
0.1U_0402_25V6
C119
0.1U_0402_25V6
12
C116
10U_0603_6.3V6M
C116
10U_0603_6.3V6M
12
C142@0.1U_0402_25V6C142@0.1U_0402_25V6
1 2
R1872.2K_0402_5% R1872.2K_0402_5%
1 2
C128
10U_0603_6.3V6M
C128
10U_0603_6.3V6M
12
C145 0.1U_0402_25V6C145 0.1U_0402_25V6
12
R143@0_0402_5%R143@0_0402_5%
1 2
C146 0.1U_0402_25V6C146 0.1U_0402_25V6
12
PJP4@
PAD-OPEN1x1m
PJP4@
PAD-OPEN1x1m
1 2
R144@0_0402_5%R144@0_0402_5%
1 2
R148@
47_0402_5%
R148@
47_0402_5%
12
Q21B
DMN66D0LDW-7_SOT363-6
Q21B
DMN66D0LDW-7_SOT363-6
34
5
C131
@
1U_0603_10V4Z
C131
@
1U_0603_10V4Z
12
C140
10U_0603_6.3V6M
C140
10U_0603_6.3V6M
12
Q123B
DMN66D0LDW-7_SOT363-6
Q123B
DMN66D0LDW-7_SOT363-6
34
5
R158
100K_0402_5%
R158
100K_0402_5%
12
JSPK1
CONN@
E-T_4280K-F04N-05L
JSPK1
CONN@
E-T_4280K-F04N-05L
1
1
2
2
3
3
4
4
GND1
5
GND2
6
U17
ALC3226-CG_QFN48_7X7
U17
ALC3226-CG_QFN48_7X7
DREG_OUT
1
GPIO0/DMIC-CLK 2
DVDD-IO
3
GPIO1/DMIC-DATA 4
SDATA-OUT
5
BIT-CLK
6
DVSS
7
SDATA-IN
8
DVDD
9
SYNC
10
RESET#
11
PCBEEP 12
Sense A 13
Sense B 14
I2S_MCLK
15
I2S_SCLK
16
I2S_DOUT
17
I2S_LRCK
18
MIC1-L
19
MIC1-R
20
LDO-CAP 21
JDREF 22
LINE1-VREFO 23
I2S_DIN
24
VREF 25
AVSS1 26
AVDD1 27
LINE1-L/RING2 28
LINE1-R/SLEEVE 29
MIC1-VREFO 30
HPOUT-L/MIC-CAP 31
HP-OUT-R 32
AVSS2/HPOUT-L 33
CPVEE 34
CBN 35
CBP/AVSS2 36
MONO-OUT/CBP 37
AVDD2/HVDD(3.3) 38
PVDD1 39
SPK-L+ 40
SPK-L- 41
PVSS
42
SPK-R- 43
SPK-R+ 44
PVDD2 45
DMIC1/GPIO2 46
EAPD/PD
47
GPIO3 48
GND
49
C169
2.2U_0603_6.3V6K
C169
2.2U_0603_6.3V6K
12
C139
0.1U_0402_10V7K
@C139
0.1U_0402_10V7K
@
12
C115
0.1U_0402_25V6
C115
0.1U_0402_25V6
12
R130@
0_0805_5%
R130@
0_0805_5%
12
C122
10U_0603_6.3V6M
C122
10U_0603_6.3V6M
12
R166 18_0402_5%R166 18_0402_5%
1 2
L24 BLM18PG330SN1_2P
EMC@
L24 BLM18PG330SN1_2P
EMC@
1 2
R162 18_0402_5%R162 18_0402_5%
1 2
C125@
1000P_0402_50V7K
C125@
1000P_0402_50V7K
12
R136 33_0402_5%R136 33_0402_5%
1 2
R152
39.2K_0402_1%
R152
39.2K_0402_1%
12
Q21A
DMN66D0LDW-7_SOT363-6
Q21A
DMN66D0LDW-7_SOT363-6
1
2
6
C137
0.1U_0402_25V6
C137
0.1U_0402_25V6
12
C188 0.1U_0402_10V7K@C188 0.1U_0402_10V7K@
1 2
C121
10U_0603_6.3V6M
C121
10U_0603_6.3V6M
12
R149@
33_0402_5%
R149@
33_0402_5%
12
C135@
0.1U_0402_10V7K
C135@
0.1U_0402_10V7K
12
U18
TPS22966DPUR_SON14_2X3
U18
TPS22966DPUR_SON14_2X3
VIN1
1
VIN1
2
ON1
3
VBIAS
4
ON2
5
VIN2
6
VIN2
7VOUT2 8
VOUT2 9
CT2 10
GND 11
CT1 12
VOUT1 13
VOUT1 14
GPAD 15
R186@0_0402_5%R186@0_0402_5%
1 2
C167
0.1U_0402_25V6
C167
0.1U_0402_25V6
1 2
R1972.2K_0402_5% R1972.2K_0402_5%
1 2
R151 1K_0402_5%R151 1K_0402_5%
1 2
Q20B
DMN66D0LDW-7_SOT363-6
Q20B
DMN66D0LDW-7_SOT363-6
34
5
R159
100K_0402_5%
R159
100K_0402_5%
12
C147 470P_0402_50V7KC147 470P_0402_50V7K
1 2
C405
1U_0603_10V6K
@
C405
1U_0603_10V6K
@
12
R154@0_0402_5%R154@0_0402_5%
1 2
R139EMC_3@ 22_0402_5%R139EMC_3@ 22_0402_5%
1 2
R220@0_0402_5%R220@0_0402_5%
1 2
C138
2.2U_0603_6.3V6K
C138
2.2U_0603_6.3V6K
12
L22 BLM18PG330SN1_2P
EMC@
L22 BLM18PG330SN1_2P
EMC@
1 2
C144@0.1U_0402_25V6C144@0.1U_0402_25V6
1 2
R39
20K_0402_1%
R39
20K_0402_1%
12
C410
1U_0603_10V6K
C410
1U_0603_10V6K
12
C150
0.1U_0402_25V6
C150
0.1U_0402_25V6
12
C134 2.2U_0603_6.3V6KC134 2.2U_0603_6.3V6K
12
L21
PBY160808T-600Y-N_2P
L21
PBY160808T-600Y-N_2P
1 2
C148 1000P_0402_50V7KC148 1000P_0402_50V7K
1 2
C129
0.1U_0402_25V6
C129
0.1U_0402_25V6
12
R194@10K_0402_5%R194@10K_0402_5%
1 2
L25 BLM18PG330SN1_2P
EMC@
L25 BLM18PG330SN1_2P
EMC@
1 2
C123
0.1U_0402_25V6
C123
0.1U_0402_25V6
12
R142 33_0402_5%
3@
R142 33_0402_5%
3@
1 2
R157
20K_0402_1%
R157
20K_0402_1%
12
C408@
10U_0603_6.3V6M
C408@
10U_0603_6.3V6M
12
R170EMC@ 33_0402_5%R170EMC@ 33_0402_5%
1 2
C127@
1000P_0402_50V7K
C127@
1000P_0402_50V7K
12
Q20A
DMN66D0LDW-7_SOT363-6
Q20A
DMN66D0LDW-7_SOT363-6
1
2
6
C117
10U_0603_6.3V6M
C117
10U_0603_6.3V6M
12
C126@
1000P_0402_50V7K
C126@
1000P_0402_50V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCKED
1
0
function
Dock
mini DP
AUX/DDC SW for DPC to Mini DP
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
DOCKED
DOCKED
DPB_MB_P14
DPB_MB_P14
mDP_AUX
mDP_AUX
mDP_AUX#
mDP_AUX#
mDP_AUX#_C
mDP_AUX#_C
mDP_AUX#_C
mDP_AUX_C
mDP_AUX_C
mDP_AUX_C
mDP_CA_DET
mDP_CA_DET
mDP_CA_DET
mDP_CA_DET#
mDP_HPD
mDP_HPD
mDP_HPD
mDP_LANE_N0
mDP_LANE_N0_C
mDP_LANE_N0_C
mDP_LANE_N1
mDP_LANE_N1_C
mDP_LANE_N1_C
mDP_LANE_N2
mDP_LANE_N2_C
mDP_LANE_N2_C
mDP_LANE_N3
mDP_LANE_N3_C
mDP_LANE_N3_C
mDP_LANE_P0
mDP_LANE_P0_C
mDP_LANE_P0_C
mDP_LANE_P1
mDP_LANE_P1_C
mDP_LANE_P1_C
mDP_LANE_P2
mDP_LANE_P2_C
mDP_LANE_P2_C
mDP_LANE_P3
mDP_LANE_P3_C
mDP_LANE_P3_C
SW_mDP_AUX#_C
SW_mDP_AUX_C
+VDISPLAY_VCC
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
CPU_DPC_CTRLDAT <10>
CPU_DPC_CTRLCLK <10>
DOCKED<21,28,32,36>
DPC_HPD<10>
DDI2_LANE_P3<10>
DDI2_LANE_N0<10>
DDI2_LANE_P0<10>
DDI2_LANE_N1<10>
DDI2_LANE_P1<10>
DDI2_LANE_N2<10>
DDI2_LANE_P2<10>
DDI2_LANE_N3<10>
CPU_DPC_AUX#<10>
CPU_DPC_AUX<10>
DP12412_P0 <21>
DP12412_P1 <21>
DP12412_N1 <21>
DP12412_P2 <21>
DP12412_N2 <21>
DP12412_P3 <21>
DP12412_N3 <21>
DP12412_N0 <21>
DP12412_AUX# <21>
DP12412_AUX <21>
DP12412_HPD <21>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Mini DP
27 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Mini DP
27 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Mini DP
27 58Friday, May 17, 2013
Compal Electronics, Inc.
U19
PI3VDP12412ZHEX_TQFN42_9X3P5~D
U19
PI3VDP12412ZHEX_TQFN42_9X3P5~D
GND
1
GPU_SEL
2
D0-
3
D0+
4
AUX_HPD_SEL
5
D1-
6
D1+
7
D2-
8
D2+
9
D3-
10
D3+
11
VDD
12
AUX-
13
AUX+
14
HPD_B 15
HPD_A 16
GND
17
HPD
18
AUX-B 19
AUX+B 20
VDD
21
GND
22
AUX+A 23
AUX-A 24
OE 25
D3+B 26
D3-B 27
D2+B 28
D2-B 29
D1+B 30
D1-B 31
D0+B 32
D0-B 33
VDD
34
D3+A 35
D3-A 36
D2+A 37
D2-A 38
D1+A 39
D1-A 40
D0+A 41
D0-A 42
HGND
43
C163 0.1U_0402_10V7KC163 0.1U_0402_10V7K
1 2
C175 0.1U_0402_10V7KC175 0.1U_0402_10V7K
12
C168 0.1U_0402_10V7KC168 0.1U_0402_10V7K
1 2
R168 5.1M_0402_5%R168 5.1M_0402_5%
1 2
C154
0.1U_0402_25V6
C154
0.1U_0402_25V6
12
C383
@
0.1U_0402_16V4Z
C383
@
0.1U_0402_16V4Z
12
C171
0.01U_0402_16V7K
C171
0.01U_0402_16V7K
12
JmDP1 CONN@
ACON_MAR2F-20K1800
JmDP1 CONN@
ACON_MAR2F-20K1800
GND
1HOT_PLUG
2LANE0_P
3CONFIG1
4LANE0_N
5CONFIG2
6GND
7GND
8LANE1_P
9LANE3_P
10 LANE1_N
11 LANE3_N
12 GND
13 GND
14 LANE2_P
15 AUX_CH_P
16 LANE2_N
17 AUX_CH_N
18 GND
19 DP_PWR
20
GND1 21
GND2 22
GND3 23
GND4 24
R163 100K_0402_5%R163 100K_0402_5%
1 2
R165 100K_0402_5%R165 100K_0402_5%
1 2
C153@
0.1U_0402_25V6
C153@
0.1U_0402_25V6
12
C170 0.1U_0402_10V7KC170 0.1U_0402_10V7K
1 2
C174 0.1U_0402_10V7KC174 0.1U_0402_10V7K
12
R167 1M_0402_5%R167 1M_0402_5%
12
C164 0.1U_0402_10V7KC164 0.1U_0402_10V7K
1 2
U50
AP2337SA-7 SOT-23
U50
AP2337SA-7 SOT-23
IN 1
GND
2
OUT
3
C411
0.1U_0402_25V6
C411
0.1U_0402_25V6
1 2
C166 0.1U_0402_10V7KC166 0.1U_0402_10V7K
1 2
U49
PI3C3125LEX_TSSOP14~D
U49
PI3C3125LEX_TSSOP14~D
BE0
1
A0
2
B0
3
BE1
4
A1
5
B1
6
GND
7B2 8
A2 9
BE2 10
B3 11
A3 12
BE3 13
VCC 14
C151
4.7U_0603_6.3V6K
C151
4.7U_0603_6.3V6K
12
C152
0.1U_0402_25V6
C152
0.1U_0402_25V6
12
R164 100K_0402_5%R164 100K_0402_5%
1 2
R161 4.7K_0402_5%R161 4.7K_0402_5%
12
C165 0.1U_0402_10V7KC165 0.1U_0402_10V7K
1 2
C173 0.1U_0402_10V7KC173 0.1U_0402_10V7K
1 2
G
D
S
Q31
BSS138W-7-F_SOT323-3
G
D
S
Q31
BSS138W-7-F_SOT323-3
1
2
3
R67
100K_0402_5%
R67
100K_0402_5%
12
C172 0.1U_0402_10V7KC172 0.1U_0402_10V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Place C177, C180 and L26 close to U21
Note:
+1.0V_LAN will work at 0.95V to 1.15V
LAN ANALOG SWITCH
Layout Notice : Place bead as
close PI3L500 as possible
DOCKED 1: TO DOCK
0: TO RJ45
SMBus Device Address 0xC8
Pin 6 is SVR_EN in Clarkville
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
+3.3V_LAN_OUT
+RSVD_VCC3P3_1
DOCKED
DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
DOCK_LOM_TRD0+
DOCK_LOM_TRD0-
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
DOCK_LOM_TRD2+
DOCK_LOM_TRD2-
DOCK_LOM_TRD3+
DOCK_LOM_TRD3-
LANCLK_REQ#_R
LAN_DISABLE#_R
LAN_SMBCLK_R
LAN_SMBDATA_R
LAN_TEST_EN
LAN_TX0+
LAN_TX0+ LAN_TX0+R
LAN_TX0-
LAN_TX0- LAN_TX0-R
LAN_TX1+
LAN_TX1+ LAN_TX1+R
LAN_TX1-
LAN_TX1- LAN_TX1-R
LAN_TX2+
LAN_TX2+ LAN_TX2+R
LAN_TX2-
LAN_TX2- LAN_TX2-R
LAN_TX3+
LAN_TX3+ LAN_TX3+R
LAN_TX3-
LAN_TX3- LAN_TX3-R
LAN_WAKE#_R
LAN_WAKE#_R
LOM_ACTLED_YEL#
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD100LED_ORG#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
LOM_SPD10LED_GRN#
LOM_SPD10LED_GRN#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
PCIE_PRX_GLANTX_N3_C
PCIE_PRX_GLANTX_P3_C
PCIE_PTX_GLANRX_N3_C
PCIE_PTX_GLANRX_P3_C
PLT_LAN_RST#
REGCTL_PNP10
REGCTL_PNP10
RES_BIAS
SW_100_ORG#
SW_100_ORG#
SW_10_GRN#
SW_10_GRN#
SW_ACTLED_YEL#
SW_ACTLED_YEL#
SW_LAN_TX0+
SW_LAN_TX0-
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3+
SW_LAN_TX3-
TP_LAN_JTAG_TCK
TP_LAN_JTAG_TCK
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TMS
VCT_LAN_R1
XTALI
XTALOXTALO_R
LAN_RST#
PLT_LAN_RST#
+3.3V_LAN
+0.9V_LAN
+0.9V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_ALW
+3.3V_LAN
+3.3V_HDD
+5V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_LAN
+0.9V_LAN
LANCLK_REQ#<12,7>
CLK_PCIE_LAN#<7>
CLK_PCIE_LAN<7>
PCIE_PRX_GLANTX_P3<11>
PCIE_PRX_GLANTX_N3<11>
SW_LAN_TX0- <35>
SW_LAN_TX0+ <35>
SW_LAN_TX1- <35>
SW_LAN_TX1+ <35>
SW_LAN_TX2+ <35>
SW_LAN_TX2- <35>
SW_LAN_TX3- <35>
SW_LAN_TX3+ <35>
DOCK_LOM_TRD0- <34>
DOCK_LOM_TRD0+ <34>
DOCK_LOM_TRD1+ <34>
DOCK_LOM_TRD1- <34>
DOCK_LOM_TRD2- <34>
DOCK_LOM_TRD2+ <34>
DOCK_LOM_TRD3- <34>
DOCK_LOM_TRD3+ <34>
DOCKED<21,27,32,36>
DOCK_LOM_ACTLED_YEL# <34>
DOCK_LOM_SPD10LED_GRN# <34>
DOCK_LOM_SPD100LED_ORG# <34>
LAN_SMBDATA<7>
LAN_SMBCLK<7>
PCIE_PTX_GLANRX_N3<11>
PCIE_PTX_GLANRX_P3<11>
WLAN_LAN_DISB# <36>
PM_LANPHY_ENABLE<12>
LAN_DISABLE#_R<36>
MASK_BASE_LEDS# <40>
3.3V_HDD_EN<12>
SIO_SLP_LAN#<36,9>
LAN_ACTLED_YEL# <35>
LED_100_ORG# <35>
LED_10_GRN# <35>
LAN_WAKE#<12,37>
PLTRST_LAN#<9>
LAN_RST#<12>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
LAN
28 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
LAN
28 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
LAN
28 58Friday, May 17, 2013
Compal Electronics, Inc.
C185
0.1U_0402_10V7K
C185
0.1U_0402_10V7K
12
R181@0_0603_5%R181@0_0603_5%
12
L30EMC@ 12NH_0603CS-120EJTS_5%L30EMC@ 12NH_0603CS-120EJTS_5%
1 2
C194
0.1U_0402_25V6
C194
0.1U_0402_25V6
12
C182
1U_0603_10V6K
C182
1U_0603_10V6K
12
R171@10K_0402_5%R171@10K_0402_5%
1 2
L28EMC@ 12NH_0603CS-120EJTS_5%L28EMC@ 12NH_0603CS-120EJTS_5%
1 2
C176 0.1U_0402_10V7KC176 0.1U_0402_10V7K
12
C178 0.1U_0402_10V7KC178 0.1U_0402_10V7K
1 2
R179 0_0402_5%@R179 0_0402_5%@
1 2
C426 0.1U_0402_10V7KC426 0.1U_0402_10V7K
1 2
R196@0_0402_5%R196@0_0402_5%
12
L27EMC@ 12NH_0603CS-120EJTS_5%L27EMC@ 12NH_0603CS-120EJTS_5%
1 2
L264.7UH_CBC2012T4R7M_20% L264.7UH_CBC2012T4R7M_20%
1 2
L29EMC@ 12NH_0603CS-120EJTS_5%L29EMC@ 12NH_0603CS-120EJTS_5%
1 2
Q32B
DMN66D0LDW-7_SOT363-6
Q32B
DMN66D0LDW-7_SOT363-6
34
5
R173@
10K_0402_5%
R173@
10K_0402_5%
12
R176 4.7K_0402_5%@R176 4.7K_0402_5%@
12
U24
NL17SZ08DFT2G_SSOP5~D
U24
NL17SZ08DFT2G_SSOP5~D
B
1
A
2
G
3
O4
P5
R174 0_0402_5%@R174 0_0402_5%@
1 2
C406@
0.1U_0402_10V7K
C406@
0.1U_0402_10V7K
12
R183@0_0402_5%R183@0_0402_5%
1 2
Y3
25MHZ_18PF_7V25000034
Y3
25MHZ_18PF_7V25000034
IN 1
GND 2
OUT
3
GND
4
C180
10U_0603_6.3V6M
C180
10U_0603_6.3V6M
12
C183
0.1U_0402_10V7K
C183
0.1U_0402_10V7K
12
C189
33P_0402_50V8J
C189
33P_0402_50V8J
1 2
C186
0.1U_0402_10V7K
C186
0.1U_0402_10V7K
12
T93@PAD~DT93@PAD~D
R129@0_0402_5%R129@0_0402_5%
1 2
Q32A
DMN66D0LDW-7_SOT363-6
Q32A
DMN66D0LDW-7_SOT363-6
1
2
6
U22
TPS22966DPUR_SON14_2X3
U22
TPS22966DPUR_SON14_2X3
VIN1
1
VIN1
2
ON1
3
VBIAS
4
ON2
5
VIN2
6
VIN2
7VOUT2 8
VOUT2 9
CT2 10
GND 11
CT1 12
VOUT1 13
VOUT1 14
GPAD 15
C428
0.1U_0402_10V7K
@C428
0.1U_0402_10V7K
@
12
R178 4.7K_0402_5%R178 4.7K_0402_5%
12
R185
3.01K_0402_1%
R185
3.01K_0402_1%
12
L31EMC@ 12NH_0603CS-120EJTS_5%L31EMC@ 12NH_0603CS-120EJTS_5%
1 2
R25@
100K_0402_5%
R25@
100K_0402_5%
12
R175 0_0402_5%@R175 0_0402_5%@
12
R331 10K_0402_5%R331 10K_0402_5%
12
C187
22U_0805_6.3V6M
C187
22U_0805_6.3V6M
12
C198@
0.1U_0402_10V7K
C198@
0.1U_0402_10V7K
1 2
R180 0_0402_5%@R180 0_0402_5%@
1 2
R184
1K_0402_5%
R184
1K_0402_5%
12
R177 0_0402_5%@R177 0_0402_5%@
1 2
PCIE
MDI
SMBUS
JTAG LED
U21
WGI218LM-SLK3A-B1_QFN48_6X6~D
PCIE
MDI
SMBUS
JTAG LED
U21
WGI218LM-SLK3A-B1_QFN48_6X6~D
RSVD_VCC3P3_1 1
LANWAKE_N
2
LAN_DISABLE_N
3
VDD3P3_4 4
VDD3P3_IN 5
SVR_EN_N 6
CTRL0P9 7
VDD0P9_8 8
XTAL_OUT
9
XTAL_IN
10
VDD0P9_11 11
RBIAS
12
MDI_PLUS0 13
MDI_MINUS0 14
VDD3P3_15 15
VDD0P9_16 16
MDI_PLUS1 17
MDI_MINUS1 18
VDD3P3_19 19
MDI_PLUS2 20
MDI_MINUS2 21
VDD0P9_22 22
MDI_PLUS3 23
MDI_MINUS3 24
LED2
25
LED0
26
LED1
27
SMB_CLK
28
VDD3P3_29 29
TEST_EN
30
SMB_DATA
31
JTAG_TDI
32
JTAG_TMS
33 JTAG_TDO
34
JTAG_TCK
35
PE_RST_N
36
VDD0P9_37 37
PETp
38
PETn
39
VDD0P9_40 40
PERp
41
PERn
42
VDD0P9_43 43
PE_CLKP
44
PE_CLKN
45
VDD0P9_46 46
VDD0P9_47 47
CLK_REQ_N
48
VSS_EPAD 49
R206
1M_0402_5%
R206
1M_0402_5%
12
C184
0.1U_0402_10V7K
C184
0.1U_0402_10V7K
12
R182@
10K_0402_5%
R182@
10K_0402_5%
12
U20
TC7SH08FU_SSOP5~D
@U20
TC7SH08FU_SSOP5~D
@
B
1
A
2
G
3
O4
P5
L32EMC@ 12NH_0603CS-120EJTS_5%L32EMC@ 12NH_0603CS-120EJTS_5%
1 2
R172@10K_0402_5%R172@10K_0402_5%
1 2
C407 470P_0402_50V7KC407 470P_0402_50V7K
1 2
C177
0.1U_0402_10V7K
C177
0.1U_0402_10V7K
12
U23
PI3L720ZHEX_TQFN42_9X3P5~D
U23
PI3L720ZHEX_TQFN42_9X3P5~D
VDD 1
A0+
2
A0-
3
VDD 4
PD
5
A1+
6
A1-
7
VDD 8
A2+
9
A2-
10
A3+
11
A3-
12
SEL
13
VDD 14
LEDA0
15
LEDA1
16
LEDB0 17
LEDB1 18
LEDC0 19
LEDC1 20
VDD 21
C3- 22
C3+ 23
B3- 24
B3+ 25
C2- 26
C2+ 27
B2- 28
B2+ 29
VDD 30
C1- 31
C1+ 32
B1- 33
B1+ 34
C0- 35
C0+ 36
B0- 37
B0+ 38
VDD 39
LEDC2 40
LEDB2 41
LEDA2
42
PAD_GND
43
C181 0.1U_0402_10V7KC181 0.1U_0402_10V7K
1 2
Q33B
DMN66D0LDW-7_SOT363-6
Q33B
DMN66D0LDW-7_SOT363-6
34
5
R169 0_0402_5%@R169 0_0402_5%@
1 2
L33EMC@ 12NH_0603CS-120EJTS_5%L33EMC@ 12NH_0603CS-120EJTS_5%
1 2
L34EMC@ 12NH_0603CS-120EJTS_5%L34EMC@ 12NH_0603CS-120EJTS_5%
1 2
C190
33P_0402_50V8J
C190
33P_0402_50V8J
1 2
C429 470P_0402_50V7KC429 470P_0402_50V7K
1 2
C179 0.1U_0402_10V7KC179 0.1U_0402_10V7K
12
C193
0.1U_0402_25V6
C193
0.1U_0402_25V6
12
R145@0_0402_5% R145@0_0402_5%
12
C192
0.1U_0402_25V6
C192
0.1U_0402_25V6
12
Q33A
DMN66D0LDW-7_SOT363-6
Q33A
DMN66D0LDW-7_SOT363-6
1
2
6
T92@PAD~DT92@PAD~D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ATMEL TPM for E4
USH CONN
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Close to JUSH1
CLKRUN#
IRQ_SERIRQ
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
USH_PWR_STATE#
USH_SMBCLK
USH_SMBDAT
SP_TPM_LPC_EN_R
+3.3V_RUN_TPM
+3.3V_RUN_TPM+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN_TPM
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS+3.3V_RUN+5V_RUN
BCM5882_ALERT#<36>
USBP4-<11>
USBP4+<11>
USH_SMBDAT<37>
PLTRST_USH#<9>
USH_PWR_STATE#<36>
CONTACTLESS_DET#<10>
USH_SMBCLK<37>
LPC_LAD0<36,37,7>
LPC_LAD2<36,37,7>
LPC_LAD1<36,37,7>
LPC_LAD3<36,37,7>
LPC_LFRAME#<36,37,7>
IRQ_SERIRQ<12,36,37>
CLKRUN#<12,36,37,9>
SP_TPM_LPC_EN<36>
PCH_PLTRST#_EC<31,36,37,9>
CLK_PCI_TPM_TCM<7>
USH_DET#<12>
PCH_TPM_LPC_EN<7>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
USH & TPM
29 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
USH & TPM
29 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
USH & TPM
29 58Friday, May 17, 2013
Compal Electronics, Inc.
C384@
2200P_0402_50V7K
C384@
2200P_0402_50V7K
12
R193
@0_0402_5%
R193
@0_0402_5%
1 2
C202
2200P_0402_50V7K
C202
2200P_0402_50V7K
12
C201
4700P_0402_25V7K
C201
4700P_0402_25V7K
12
C200@
0.1U_0402_25V6
C200@
0.1U_0402_25V6
12
C204
0.1U_0402_25V6
C204
0.1U_0402_25V6
12
JUSH1
CONN@
ACES_50506-02041-P01
JUSH1
CONN@
ACES_50506-02041-P01
1
12
23
34
45
56
67
78
89
910
10 11
11 12
12 13
13 14
14 15
15 16
16 17
17 18
18 19
19 20
20 GND1
21 GND2
22
PJP5@
PAD-OPEN1x1m
PJP5@
PAD-OPEN1x1m
1 2
R190 2.2K_0402_5%R190 2.2K_0402_5%
1 2
C208
@
0.1U_0402_25V6
C208
@
0.1U_0402_25V6
12
R195 1M_0402_5%R195 1M_0402_5%
1 2
C207
@
0.1U_0402_25V6
C207
@
0.1U_0402_25V6
12
R198
10_0402_5%@
R198
10_0402_5%@
1 2
C203
2200P_0402_50V7K
C203
2200P_0402_50V7K
12
R191 2.2K_0402_5%R191 2.2K_0402_5%
1 2
C206
@
0.1U_0402_25V6
C206
@
0.1U_0402_25V6
12
U25
AT97SC320412-ABF _TSSOP28
U25
AT97SC320412-ABF _TSSOP28
ATEST_1
1
ATEST_2
2
ATEST_3
3
GND_4 4
SB3V
5
GPIO6 6
NC_7 7
TESTI 8
TESTBI 9
VCC_0 10
GND_11 11
V_BAT 12
NBO_13 13
NBO_14 14
CLKRUN#
15
LRESET#
16
LAD3
17
GND_18 18
VCC_1 19
LAD2
20
LCLK
21
LFRAME#
22
LAD1
23
VCC_2 24
GND_25 25
LAD0
26
SERIRQ
27
LPCPD#
28
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Near to JSD1
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
C215 close to U27.9
C213 C214 close to
U27.35
C210 close to U27.42
C211 C212 close to
U27.23
please routing daisy chain
1. from U27.38 (SD_D0) -> U27.32 (SD_RCLK_P) -> L46.4
2. From U27.37 (SD_D1) -> U27.33 (SD_RCLK_N) -> L46.1
EMI depop location
C227 near U27.22 C228 C229 near U27.24
EMI solution for SD card
R231,R297,R306,R315,R333,R337 for EMI solution
+AUX_LDO
+SD_IO_LDO
IO_LDOSEL
IO_LDOSEL
PCIE_PRX_MMITX_N5_C
PCIE_PRX_MMITX_P5_C
PCIE_PTX_MMIRX_N5_C
PCIE_PTX_MMIRX_P5_C
PE_REXT
PE_RST#
SD/MMCCD#
SD/MMCCD#
SD/MMCCLK
SD/MMCCLK
SD/MMCCLK_R
SD/MMCCMD
SD/MMCCMD
SD/MMCDAT0
SD/MMCDAT0_D
SD/MMCDAT1
SD/MMCDAT1_D
SD/MMCDAT2 SD/MMCDAT2_R
SD/MMCDAT2_R
SD/MMCDAT3 SD/MMCDAT3_R
SD/MMCDAT3_R
SDWP
SDWP
SD_UHS2_D0N
SD_UHS2_D0N_D
SD_UHS2_D0P
SD_UHS2_D0P_D
SD_UHS2_D1N
SD_UHS2_D1N_D
SD_UHS2_D1P
SD_UHS2_D1P_D
SD/MMCDAT0 SD/MMCDAT0_D
SD/MMCDAT1 SD/MMCDAT1_D
SD_UHS2_D0N SD_UHS2_D0N_D
SD_UHS2_D0P SD_UHS2_D0P_D
SD_UHS2_D1N SD_UHS2_D1N_D
SD_UHS2_D1P SD_UHS2_D1P_D
PE_RST#
+1.2V_LDO_AIN
+3.3V_RUN_AIN
+3.3V_RUN
+1.2V_LDO
+3.3V_RUN_CARD
+1.8V_RUN_CARD
+3.3V_RUN
+3.3V_RUN_CARD
+1.8V_RUN_CARD
+3.3V_RUN_CARD +1.8V_RUN_CARD
+3.3V_RUN_CARD
+3.3V_RUN
+1.8V_RUN_CARD
+1.2V_LDO
+3.3V_RUN
+3.3V_RUN
PCIE_PTX_MMIRX_N5<11>
PCIE_PTX_MMIRX_P5<11>
PCIE_PRX_MMITX_P5<11>
PCIE_PRX_MMITX_N5<11>
CLK_PCIE_MMI<7>
CLK_PCIE_MMI#<7>
MMICLK_REQ#<7>
MEDIACARD_IRQ#<12>
MEDIACARD_PWREN<12>
PLTRST_MMI#<9>
MEDIACARD_RST#<12>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Card Reader
30 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Card Reader
30 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Card Reader
30 58Friday, May 17, 2013
Compal Electronics, Inc.
R306 0_0402_5%@R306 0_0402_5%@
1 2
R27@
100K_0402_5%
R27@
100K_0402_5%
12
C239
0.1U_0402_25V6
C239
0.1U_0402_25V6
12
JSD1
ALPS_SCDADA0101_NR
CONN@JSD1
ALPS_SCDADA0101_NR
CONN@
CD/DAT3
1
CMD
2
VSS1
3
VDD/VDD1
4
CLK
5
VSS2
6
DAT0/RCLK+
7
DAT1/RCLK-
8
DAT2
9
VSS3
10
D0+
11
DO-
12
VSS4
13
VDD2
14
D1-
15 D1+
16
VSS5
17
CARD DETECT
18
WRITE PROTEC
19
GND1 20
GND2 21
GND3 22
GND4 23
GND5 24
GND6 25
GND7 26
C233
0.1U_0402_25V6
C233
0.1U_0402_25V6
1 2
L47
DLW21SN900SQ2L-0805_4P
@L47
DLW21SN900SQ2L-0805_4P
@
1
122
33
4
4
R410@0_0402_5%R410@0_0402_5%
1 2
C226
0.1U_0402_25V6
C226
0.1U_0402_25V6
1 2
C217
0.1U_0402_25V6
C217
0.1U_0402_25V6
1 2
C229@
0.1U_0402_25V6
C229@
0.1U_0402_25V6
12
C212
0.1U_0402_25V6
C212
0.1U_0402_25V6
12
C246
0.1U_0402_25V6
C246
0.1U_0402_25V6
12
C234
0.1U_0402_25V6
C234
0.1U_0402_25V6
1 2
R443 0_0402_5%@R443 0_0402_5%@
1 2
C236 0.1U_0402_10V7KC236 0.1U_0402_10V7K
1 2
R212
100K_0402_5%
R212
100K_0402_5%
12
C225
4.7U_0603_6.3V6K
C225
4.7U_0603_6.3V6K
1 2
R297 0_0402_5%@R297 0_0402_5%@
1 2
R333 0_0402_5%@R333 0_0402_5%@
1 2
C341 @
0.1U_0402_25V6
C341 @
0.1U_0402_25V6
12
C247
4.7U_0603_6.3V6K
C247
4.7U_0603_6.3V6K
12
C214
0.1U_0402_25V6
C214
0.1U_0402_25V6
12
R493
1M_0402_5%
R493
1M_0402_5%
12
L36
BLM15AG601SN1D_2P
L36
BLM15AG601SN1D_2P
1 2
OZ777FJ2LN
U27
OZ777FJ2LN_QFN48_6X6
OZ777FJ2LN
U27
OZ777FJ2LN_QFN48_6X6
PE_12VCCAIN
1
PE_REFCLKM
2
PE_REFCLKP
3
PE_REXT
4
PE_RXM
5PE_RXP
6
PE_TXP
7
PE_TXM
8
PE_33VCCAIN
9
MAIN_LDO_12VOUT
10
MAIN_LDO_VIN
11
AUX_LDO_CAP 12
AUX _33VIN
13
MAIN_LDO_EN
14
PE_RST#_GATE#
15
DEV_WAKE#
16
CLKREQ#
17
IO0_LDOSEL
18
LED# 19
SD_WPI 20
SD_CD# 21
SD_SKT_33VOUT 22
SD_SKT_33VIN
23
SD_SKT_18VOUT 24
SD_IO_LDO_CAP 25
SD_REXT/NC 26
UHSII_33VCCAIN/NC
27
UHSII_12VCCAIN/NC
28
SD_RCLK_M/NC 29
SD_RCLK_P/NC 30
UHSII_12VCCAIN/NC
31
SD_D1P/NC 32
SD_D1M/NC 33
SD_D0M/NC 34
SD_D0P/NC 35
UHSII_12VCCAIN/NC
36
SD_D1 37
SD_D0 38
MMC_D7 39
MMC_D6 40
CORE_12VCCD
41
SD_33VCCD
42
SD_CLK 43
MMC_D5 44
SD_CMD 45
MMC_D4 46
SD_D3 47
SD_D2 48
GND 49
R231 0_0402_5%@R231 0_0402_5%@
1 2
C255
@
5P_0402_50V8C
C255
@
5P_0402_50V8C
12
C238 0.1U_0402_10V7KC238 0.1U_0402_10V7K
1 2
U26
TC7SH08FU_SSOP5~D
@U26
TC7SH08FU_SSOP5~D
@
B
1
A
2
G
3
O4
P5
C211
4.7U_0603_6.3V6K
C211
4.7U_0603_6.3V6K
12
C222
1U_0402_6.3V6K
C222
1U_0402_6.3V6K
1
2
R230 EMC@ 10_0402_5%R230 EMC@ 10_0402_5%
1 2
C221@
4.7U_0603_6.3V6K
C221@
4.7U_0603_6.3V6K
1 2
C215
0.1U_0402_25V6
C215
0.1U_0402_25V6
12
C232
@
0.1U_0402_25V6
C232
@
0.1U_0402_25V6
1 2
C237 0.1U_0402_10V7KC237 0.1U_0402_10V7K
1 2
C223
4.7U_0603_6.3V6K
C223
4.7U_0603_6.3V6K
1 2
R315 0_0402_5%@R315 0_0402_5%@
1 2
C216
0.1U_0402_25V6
C216
0.1U_0402_25V6
1 2
C210
0.1U_0402_25V6
C210
0.1U_0402_25V6
12
L46
DLW21SN900SQ2L-0805_4P
@L46
DLW21SN900SQ2L-0805_4P
@
1
122
33
4
4
L35 BLM15AG601SN1D_2PL35 BLM15AG601SN1D_2P
1 2
R211 4.7K_0402_1%R211 4.7K_0402_1%
1 2
C231
0.1U_0402_25V6
C231
0.1U_0402_25V6
1 2
C256
0.1U_0402_25V6
C256
0.1U_0402_25V6
12
R341@0_0402_5%R341@0_0402_5%
1 2
C228@
4.7U_0603_6.3V6K
C228@
4.7U_0603_6.3V6K
12
C219
0.1U_0402_25V6
C219
0.1U_0402_25V6
1 2
C213
4.7U_0603_6.3V6K
C213
4.7U_0603_6.3V6K
12
C240
@
4.7U_0603_6.3V6K
C240
@
4.7U_0603_6.3V6K
12
C230
4.7U_0603_6.3V6K
C230
4.7U_0603_6.3V6K
1 2
C235 0.1U_0402_10V7KC235 0.1U_0402_10V7K
1 2
C220
4.7U_0603_6.3V6K
C220
4.7U_0603_6.3V6K
1 2
R205 191_0402_1%R205 191_0402_1%
1 2
L48
DLW21SN900SQ2L-0805_4P
@L48
DLW21SN900SQ2L-0805_4P
@
1
122
33
4
4
C227@
0.1U_0402_25V6
C227@
0.1U_0402_25V6
12
R214@
100K_0402_5%
R214@
100K_0402_5%
12
C218
0.1U_0402_25V6
C218
0.1U_0402_25V6
1 2
R337 0_0402_5%@R337 0_0402_5%@
1 2
C224
4.7U_0603_6.3V6K
C224
4.7U_0603_6.3V6K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+-9%
+3.3Vaux
+3.3V
Voltage
Tolerance
+-9%
PWR
Rail
Primary Power Aux Power
Peak Normal Normal
1000 750
330 250 250 (Wake enable)
5 (Not wake enable)
Mini WWAN/GPS/LTE/mSATA/PP H=4
LED control circuit
SIM Card Push-Push
Mini WLAN/WIiGi/BT H=4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
BT_LED#
BT_LED#
BT_RADIO_DIS#_R
BT_RADIO_DIS#_R
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
LED_WW AN_OUT#
LED_WW AN_OUT#
MINI1CLK_REQ#
MINI_CARD_RST#
MINI_CARD_RST#
MINI_CARD_RST#
mSATA_DEVSLP
MSDATA
PCIE_PRX_WLANTX_N4
PCIE_PRX_WLANTX_P4
PCIE_PTX_WLANRX_N4_C
PCIE_PTX_WLANRX_P4_C
PCIE_WAKE#
PCIE_WAKE#
SATA_PRX_MSATATX_N3
SATA_PRX_MSATATX_P3
SATA_PTX_mSATARX_N3_C
SATA_PTX_mSATARX_P3_C
UIM_CLK
UIM_CLK
UIM_CLK
UIM_DATA
UIM_DATA
UIM_DATA
UIM_RESET
UIM_RESET
UIM_RESET
UIM_VPP
UIM_VPP
UIM_VPP
WIGIG60GHZ_DIS#_R
WIGIG60GHZ_DIS#_R
WIMAX_LED#
WIMAX_LED#
WLAN_LED#
WLAN_LED#
WLAN_RADIO_DIS#_R
WLAN_RADIO_DIS#_R
WWAN_SMBCLK
WWAN_SMBCLK
WWAN_SMBDAT
WWAN_SMBDAT
MCARD_WWAN_PW REN
AUX_EN_W OW L
+3.3V_mSATA_WWAN
+SIM_PWR
+3.3V_mSATA_WWAN+3.3V_mSATA_WW AN
+3.3V_W LAN +3.3V_WLAN
+SIM_PWR
+SIM_PWR
+3.3V_RUN +3.3V_m SATA_W W AN
+5V_ALW
+3.3V_W LAN
+3.3V_mSATA_WWAN+3.3V_ALW
+3.3V_mSATA_WWAN
+3.3V_W LAN
+3.3V_W LAN
+3.3V_mSATA_WWAN
CLK_PCIE_MINI1<7>
CLK_PCIE_MINI1#<7>
MINI1CLK_REQ#<12,7>
WWAN_RADIO_DIS# <36>
PCIE_PRX_WLANTX_P4<11>
PCIE_PRX_WLANTX_N4<11>
MINI2CLK_REQ#<12,7>
PCH_CL_RST1#<7>
PCH_CL_DATA1<7>
HOST_DEBUG_TX <37>
EC5048_TX<36,37>
MSCLK<37>
MSDATA <37>
USBP6- <11>
USBP6+ <11>
CLK_PCIE_MINI2#<7>
CLK_PCIE_MINI2<7>
PCH_CL_CLK1<7>
DDR_XDP_WAN_SMBDAT<18,19,25,7,9>
DDR_XDP_WAN_SMBCLK<18,19,25,7,9>
SATA_PTX_MSATARX_N3<6>
SATA_PTX_MSATARX_P3<6>
PCIE_PTX_WLANRX_P4<11>
PCIE_PTX_WLANRX_N4<11>
PCIE_WAKE#<37>
HW_GPS_DISABLE2#<36>
USBP2- <11>
USBP2+ <11>
WIGIG60GHZ_DIS#<36>
BT_RADIO_DIS#<36>
PCH_PLTRST#_EC<29,36,37,9>
MPCIE_RST#<12,6>
CPPE#<12>
CPUSB# <12>
WIRELESS_LED# <36,40>
WLAN_RADIO_DIS#<36>
SATA_PRX_MSATATX_P3<6>
SATA_PRX_MSATATX_N3<6>
mSATA_DEVSLP <12>
AUX_EN_W OW L<36>
MCARD_WWAN_PW REN<36>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Mini Card
31 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Mini Card
31 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Mini Card
31 58Friday, May 17, 2013
Compal Electronics, Inc.
C267@
33P_0402_50V8J
C267@
33P_0402_50V8J
12
JSIM1
T-SOL_159-1000302602
CONN@
JSIM1
T-SOL_159-1000302602
CONN@
VCC
1
RST
2
CLK
3
GND_1
5
VPP
6
I/O
7
D-
8
D+
4
DET
9
GND_3 12
GND_4 13
COM
10
GND_2 11
GND_5 14
GND_6 15
GND_7 16
GND_8 17
GND_9 18
Q30B
DMN66D0LDW -7_SOT363-6
Q30B
DMN66D0LDW -7_SOT363-6
34
5
U30
TC7SH08FU_SSOP5~D
@U30
TC7SH08FU_SSOP5~D
@
B
1
A
2
G
3
O4
P5
C263
1U_0402_6.3V6K
3@
C263
1U_0402_6.3V6K
3@
12
R217@
2.2K_0402_5%
R217@
2.2K_0402_5%
12
C258
0.047U_0402_16V4Z
C258
0.047U_0402_16V4Z
12
+
C254@
150U_B2_6.3VM_R35M
+
C254@
150U_B2_6.3VM_R35M
12
R26@
100K_0402_5%
R26@
100K_0402_5%
12
R219@0_0402_5%R219@0_0402_5%
12
C244 0.1U_0402_10V7KC244 0.1U_0402_10V7K
1 2
C425 0.1U_0402_10V7K@C425 0.1U_0402_10V7K@
1 2
R223@0_0402_5%R223@0_0402_5%
1 2
R225 0_0402_5%@R225 0_0402_5%@
1 2
C245 0.1U_0402_10V7KC245 0.1U_0402_10V7K
1 2
C242 0.1U_0402_10V7KC242 0.1U_0402_10V7K
1 2
C260
0.1U_0402_25V6
C260
0.1U_0402_25V6
1 2
Q22B
DMN66D0LDW -7_SOT363-6
Q22B
DMN66D0LDW -7_SOT363-6
34
5
Q22A
DMN66D0LDW -7_SOT363-6
Q22A
DMN66D0LDW -7_SOT363-6
1
2
6
C427
470P_0402_50V7K
C427
470P_0402_50V7K
1 2
C409 470P_0402_50V7KC409 470P_0402_50V7K
1 2
R226
100K_0402_5%
R226
100K_0402_5%
1 2
R51 100K_0402_5%R51 100K_0402_5%
1 2
U3
TPS22966DPUR_SON14_2X3
U3
TPS22966DPUR_SON14_2X3
VIN1
1
VIN1
2
ON1
3
VBIAS
4
ON2
5
VIN2
6
VIN2
7VOUT2 8
VOUT2 9
CT2 10
GND 11
CT1 12
VOUT1 13
VOUT1 14
GPAD 15
D13
RB751S40T1G_SOD523-2
D13
RB751S40T1G_SOD523-2
1 2
C241
4700P_0402_25V7K
C241
4700P_0402_25V7K
1 2
C261
0.1U_0402_25V6
C261
0.1U_0402_25V6
1 2
JMINI2
CONN@
LCN_DAN08-52406-0500
JMINI2
CONN@
LCN_DAN08-52406-0500
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
45
45 46 46
47
47 48 48
49
49 50 50
51
51 52 52
GND1
53 GND2 54
D14
RB751S40T1G_SOD523-2
D14
RB751S40T1G_SOD523-2
1 2
+
C253
150U_B2_6.3VM_R35M
3@
+
C253
150U_B2_6.3VM_R35M
3@
12
C250
33P_0402_50V8J
C250
33P_0402_50V8J
12
Q30A
DMN66D0LDW -7_SOT363-6
Q30A
DMN66D0LDW -7_SOT363-6
1
2
6
R222@0_0402_5%R222@0_0402_5%
1 2
R50 100K_0402_5%R50 100K_0402_5%
1 2
C264@
33P_0402_50V8J
C264@
33P_0402_50V8J
12
C422
0.1U_0402_10V7K
@C422
0.1U_0402_10V7K
@
12
R227
100K_0402_5%
R227
100K_0402_5%
1 2
C257@
0.1U_0402_25V6
C257@
0.1U_0402_25V6
12
R216@
2.2K_0402_5%
R216@
2.2K_0402_5%
12
C248
0.047U_0402_16V4Z
C248
0.047U_0402_16V4Z
12
C243 0.1U_0402_10V7KC243 0.1U_0402_10V7K
1 2
R232@0_0402_5%R232@0_0402_5%
1 2
R218@0_0402_5%R218@0_0402_5%
12
U28@
SRV05-4.TCT_SOT23-6~D
U28@
SRV05-4.TCT_SOT23-6~D
1
2
3 4
5
6
JMINI1
CONN@
LCN_DAN08-52406-0500
JMINI1
CONN@
LCN_DAN08-52406-0500
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
45
45 46 46
47
47 48 48
49
49 50 50
51
51 52 52
GND1
53 GND2 54
C265@
33P_0402_50V8J
C265@
33P_0402_50V8J
12
R224 0_0402_5%@R224 0_0402_5%@
1 2
C259
0.047U_0402_16V4Z
C259
0.047U_0402_16V4Z
12
D12
RB751S40T1G_SOD523-2
D12
RB751S40T1G_SOD523-2
1 2
C251
22U_0805_6.3V6M
C251
22U_0805_6.3V6M
12
R229
100K_0402_5%
R229
100K_0402_5%
1 2
C266@
33P_0402_50V8J
C266@
33P_0402_50V8J
12
R215 0_0402_5%@R215 0_0402_5%@
1 2
C249
0.047U_0402_16V4Z
C249
0.047U_0402_16V4Z
12
C338@
0.1U_0402_25V6
C338@
0.1U_0402_25V6
1 2
R160@10K_0402_5%R160@10K_0402_5%
1 2
C262
4.7U_0603_6.3V6K
C262
4.7U_0603_6.3V6K
12
C252
33P_0402_50V8J
C252
33P_0402_50V8J
12
R228
100K_0402_5%
R228
100K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
function
Dock
M/B
1
0
DOCKED
check port mapping
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
+3.3V_SUS
USB3TP3<11>
USB3TN3<11>
USB3RP3<11>
USB3RN3<11>
USBP5-<11>
USBP5+<11>
DOCKED<21,27,28,36>
SW_USB3TP3 <33>
SW_USB3TN3 <33>
SW_USB3RP3 <33>
SW_USB3RN3 <33>
SW_USBP5- <33>
SW_USBP5+ <33>
DOCK_USB3TP3 <34>
DOCK_USB3TN3 <34>
DOCK_USB3RP3 <34>
DOCK_USB3RN3 <34>
DOCK_USBP5- <34>
DOCK_USBP5+ <34>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
USB SW
32 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
USB SW
32 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
USB SW
32 58Friday, May 17, 2013
Compal Electronics, Inc.
C419@
0.1U_0402_25V6
C419@
0.1U_0402_25V6
12
C415
0.1U_0402_25V6
C415
0.1U_0402_25V6
12
C418@
0.1U_0402_25V6
C418@
0.1U_0402_25V6
12
C414
0.1U_0402_25V6
C414
0.1U_0402_25V6
12
C420
4.7U_0603_6.3V6K
C420
4.7U_0603_6.3V6K
12
C416
0.1U_0402_25V6
C416
0.1U_0402_25V6
12
U33
PI3USB3102ZLEX_TQFN32_6X3
U33
PI3USB3102ZLEX_TQFN32_6X3
TX+
1
TX-
2
VDD
3
RX+
4
RX-
5
D+
6
D-
7
USB_ID
8
VDD
9
SS_SEL
10
OE# 11
VDD
12
USB_IDB 13
D-B 14
D+B 15
VDD
16
USB_IDA 17
D-A 18
D+A 19
VDD
20
GND 21
RX-B 22
RX+B 23
TX-B 24
TX+B 25
RX-A 26
RX+A 27
GND 28
VDD
29
TX-A 30
TX+A 31
HS_SEL
32
HGND 33
C417@
0.1U_0402_25V6
C417@
0.1U_0402_25V6
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
function
Dock
M/B
1
0
DOCKED_LIO_EN
check port mapping
support APR/SPR/LIO Dock
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
PS_USBP0_D+
PS_USBP0_D+
PS_USBP0_D-
PS_USBP0_D-
PWRSHARE_EN
PWRSHARE_EN#
PWRSHARE_EN#
SB#
SEL
SW_USB3TN3_C
SW_USB3TP3_C
SW_USBP0+
SW_USBP0+
SW_USBP0-
SW_USBP0-
USB3RN2_D- USB3RN2_D-
USB3RN2_D-
USB3RN2_D-
USB3RN3_D- USB3RN3_D-USB3RN3_D-
USB3RN3_D-
USB3RP2_D+
USB3RP2_D+ USB3RP2_D+
USB3RP2_D+
USB3RP3_D+
USB3RP3_D+ USB3RP3_D+
USB3RP3_D+
USB3TN2_C USB3TN2_D-
USB3TN2_D- USB3TN2_D-
USB3TN2_D-
USB3TN3_D-
USB3TN3_D- USB3TN3_D-
USB3TN3_D-
USB3TP2_C USB3TP2_D+
USB3TP2_D+USB3TP2_D+
USB3TP2_D+
USB3TP3_D+
USB3TP3_D+ USB3TP3_D+
USB3TP3_D+
USBP0_D+
USBP0_D+
USBP0_D-
USBP0_D-
USBP5_D+
USBP5_D+
USBP5_D-
USBP5_D-
SEL
+5V_ALW +USB_PWR
+5V_ALW +5V_USB_CHG_PWR
+5V_ALW
+5V_ALW
+5V_ALW
+3.3V_ALW
+USB_PWR
+5V_USB_CHG_PWR
USB3RN2<11>
USB3RP2<11>
USB3TP2<11>
USB3TN2<11>
SW_USB3RP3<32>
SW_USB3RN3<32>
SW_USB3TP3<32>
SW_USB3TN3<32>
ESATA_USB_PWR_EN#<36> USB_OC2# <11,12>
USB_OC0# <11>
USB_PWR_SHR_EN#<36>
USB_PWR_SHR_VBUS_EN<36>
DOCKED_LIO_EN<36>
DOCK_USBP0- <34>
DOCK_USBP0+ <34>
USBP0-<11>
USBP0+<11>
SW_USBP5-<32>
SW_USBP5+<32>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
USB3.0
33 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
USB3.0
33 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
USB3.0
33 58Friday, May 17, 2013
Compal Electronics, Inc.
R241@0_0402_5%R241@0_0402_5%
1 2
C281
0.1U_0402_25V6
C281
0.1U_0402_25V6
12
L37 EMC@
DLW21SN900HQ2L-0805_4P
L37 EMC@
DLW21SN900HQ2L-0805_4P
1
122
33
4
4
R248@0_0402_5%R248@0_0402_5%
1 2
R240@0_0402_5%R240@0_0402_5%
1 2
C291
0.1U_0402_25V6
C291
0.1U_0402_25V6
12
R246@0_0402_5%R246@0_0402_5%
1 2
R251@0_0402_5%R251@0_0402_5%
1 2
C293 0.1U_0402_10V7KC293 0.1U_0402_10V7K
12
C284
10U_0603_6.3V6M
C284
10U_0603_6.3V6M
12
U36
NX3DV221GM_XQFN10U10_2X1P55
U36
NX3DV221GM_XQFN10U10_2X1P55
1D+ 1
1D- 2
2D+ 3
2D- 4
GND 5
OE#
6D-
7D+
8S
9VCC
10
C292 0.1U_0402_10V7KC292 0.1U_0402_10V7K
12
U32
G547I2P81U_MSOP8
U32
G547I2P81U_MSOP8
GND
1
VIN
2
VIN
3
EN
4FLG 5
VOUT 6
VOUT 7
VOUT 8
R250@0_0402_5%R250@0_0402_5%
1 2
R247@0_0402_5%R247@0_0402_5%
1 2
JUSB1
TAITW_PUBAU4-09FLBS1NN4H0
CONN@
JUSB1
TAITW_PUBAU4-09FLBS1NN4H0
CONN@
VBUS
1
D-
2
D+
3
GND
4
StdA-SSRX-
5
StdA-SSRX+
6
GND-DRAIN
7
StdA-SSTX-
8
StdA-SSTX+
9
GND 10
GND 11
GND 12
GND 13
G
D
S
Q7
L2N7002WT1G_SC-70-3
G
D
S
Q7
L2N7002WT1G_SC-70-3
1
2
3
C322
0.1U_0402_25V6
C322
0.1U_0402_25V6
12
D17 EMC@
TVWDF1004AD0_DFN9
D17 EMC@
TVWDF1004AD0_DFN9
1
2
3
4
5 6
7
8
9
R236@0_0402_5%R236@0_0402_5%
1 2
C282 0.1U_0402_10V7KC282 0.1U_0402_10V7K
12
JUSB2 CONN@
SANTA_373070-1
JUSB2 CONN@
SANTA_373070-1
VBUS
1
D-
2
D+
3
GND
4
SSRX-
5
SSRX+
6
GND
7
SSTX-
8
SSTX+
9
GND 10
GND 11
GND 12
GND 13
R243
100K_0402_5%
R243
100K_0402_5%
1 2
C89
100U_1206_6.3V6M
C89
100U_1206_6.3V6M
12
+
C280@
150U_D2_6.3VY_R15M
+
C280@
150U_D2_6.3VY_R15M
12
C287
0.1U_0402_25V6
C287
0.1U_0402_25V6
12
R24410K_0402_5% R24410K_0402_5%
1 2
U35
G547I2P81U_MSOP8
U35
G547I2P81U_MSOP8
GND
1
VIN
2
VIN
3
EN
4FLG 5
VOUT 6
VOUT 7
VOUT 8
U39
SLGC55594AVTR_TDFN8_2X2
U39
SLGC55594AVTR_TDFN8_2X2
CEN 1
DM 2
DP 3
SELCDP 4
VDD
5TDP
6TDM
7CB
8
Thermal Pad 9
L38 EMC@
DLW21SN900HQ2L-0805_4P
L38 EMC@
DLW21SN900HQ2L-0805_4P
1
122
33
4
4
R239@0_0402_5%R239@0_0402_5%
1 2
D15 EMC@
TVWDF1004AD0_DFN9
D15 EMC@
TVWDF1004AD0_DFN9
1
2
3
4
5 6
7
8
9
R238@0_0402_5%R238@0_0402_5%
1 2
L42
CMM0805-120Y-N_4P
EMC@
L42
CMM0805-120Y-N_4P
EMC@
1 2
34
R237@0_0402_5%R237@0_0402_5%
1 2
+
C290@
150U_D2_6.3VY_R15M
+
C290@
150U_D2_6.3VY_R15M
12
C283 0.1U_0402_10V7KC283 0.1U_0402_10V7K
12
R235@0_0402_5%R235@0_0402_5%
1 2
R249@0_0402_5%R249@0_0402_5%
1 2
D18 EMC@
L30ESDL5V0C3-2_SOT23-3
D18 EMC@
L30ESDL5V0C3-2_SOT23-3
1
2
3
C288
10U_0603_6.3V6M
C288
10U_0603_6.3V6M
12
D16 EMC@
L30ESDL5V0C3-2_SOT23-3
D16 EMC@
L30ESDL5V0C3-2_SOT23-3
1
2
3
L41 EMC@
DLW21SN900HQ2L-0805_4P
L41 EMC@
DLW21SN900HQ2L-0805_4P
1
122
33
4
4
L39
EMC@
DLW21HN900SQ2L_4P
L39
EMC@
DLW21HN900SQ2L_4P
1
1
4
433
22
R242@0_0402_5%R242@0_0402_5%
1 2
C285
0.1U_0402_25V6
C285
0.1U_0402_25V6
12
L40 EMC@
DLW21SN900HQ2L-0805_4P
L40 EMC@
DLW21SN900HQ2L-0805_4P
1
122
33
4
4
C86
100U_1206_6.3V6M
C86
100U_1206_6.3V6M
12
C289
0.1U_0402_25V6
C289
0.1U_0402_25V6
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_DET_1
Close to DOCK
Its for Enhance ESD on
dock issue.
Close to DOCK
Its for Enhance ESD on dock
issue.
EMI solution for E-Docking USB
EMI depop location
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
BLUE_DOCK
CLK_PCI_DOCKDAI_12MHZ# DAI_BCLK#
DOCK_AC_OFF
DOCK_DET#
DOCK_DET_R#
DOCK_USBP0_D+
DOCK_USBP0_D-
DPB_CA_DET
DPB_DOCK_AUX
DPB_DOCK_AUX#
DPB_DOCK_HPD
DPB_DOCK_HPD
DPB_DOCK_LANE_N0
DPB_DOCK_LANE_N1
DPB_DOCK_LANE_N2
DPB_DOCK_LANE_N3
DPB_DOCK_LANE_P0
DPB_DOCK_LANE_P1
DPB_DOCK_LANE_P2
DPB_DOCK_LANE_P3
DPB_LANE_N0_C
DPB_LANE_N1_C
DPB_LANE_N2_C
DPB_LANE_N3_C
DPB_LANE_P0_C
DPB_LANE_P1_C
DPB_LANE_P2_C
DPB_LANE_P3_C
DPC_CA_DET
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPC_DOCK_HPD
DPC_DOCK_HPD
DPC_DOCK_LANE_N0
DPC_DOCK_LANE_N1
DPC_DOCK_LANE_N2
DPC_DOCK_LANE_N3
DPC_DOCK_LANE_P0
DPC_DOCK_LANE_P1
DPC_DOCK_LANE_P2
DPC_DOCK_LANE_P3
DPC_LANE_N0_C
DPC_LANE_N1_C
DPC_LANE_N2_C
DPC_LANE_N3_C
DPC_LANE_P0_C
DPC_LANE_P1_C
DPC_LANE_P2_C
DPC_LANE_P3_C
GREEN_DOCK
RED_DOCK
SATA_PRX_DKTX_N0
SATA_PRX_DKTX_P0
SATA_PTX_DKRX_N0
SATA_PTX_DKRX_P0
SLICE_BAT_PRES#
+DOCK_PWR_BAR +DOCK_PWR_BAR
+LOM_VCT
+NBDOCK_DC_IN_SS
+3.3V_ALW
+LOM_VCT
DOCK_AC_OFF <48>
RED_DOCK<21>
BLUE_DOCK<21>
GREEN_DOCK<21>
VSYNC_DOCK<21>
DAT_MSE<37>
CLK_MSE<37>
DAI_BCLK#<26>
DAI_LRCK#<26>
DAI_DI<26>
DAI_DO#<26>
DAI_12MHZ#<26>
D_LAD1<36>
D_LAD0<36>
D_LAD2<36>
D_LAD3<36>
D_LFRAME#<36>
D_CLKRUN#<36>
D_SERIRQ<36>
D_DLDRQ1#<36>
CLK_PCI_DOCK<7>
DOCK_SMB_CLK<37>
DOCK_SMB_DAT<37>
DOCK_SMB_ALERT#<36,41,48>
DOCK_PSID<41>
DOCK_PWR_BTN#<37>
DOCK_LOM_SPD10LED_GRN#<28>
HSYNC_DOCK<21>
DOCK_LOM_SPD100LED_ORG# <28>
DAT_KBD <37>
CLK_KBD <37>
DOCK_LOM_TRD0+ <28>
DOCK_LOM_TRD0- <28>
DOCK_LOM_TRD2- <28>
DOCK_LOM_TRD2+ <28>
ACAV_DOCK_SRC# <48>
CLK_DDC2_DOCK <21>
DAT_DDC2_DOCK <21>
SATA_PTX_DKRX_P0_C <6>
SATA_PTX_DKRX_N0_C <6>
SATA_PRX_DKTX_P0_C <6>
BREATH_LED# <36,40>
DOCK_LOM_ACTLED_YEL# <28>
DOCK_LOM_TRD1- <28>
DOCK_LOM_TRD1+ <28>
DOCK_LOM_TRD3- <28>
DOCK_LOM_TRD3+ <28>
DOCK_DCIN_IS+ <47>
DOCK_DCIN_IS- <47>
DOCK_POR_RST# <37>
SATA_PRX_DKTX_N0_C <6>
DOCK_USBP5+ <32>
DOCK_USBP5- <32>
SLICE_BAT_PRES#<36,41,48> DOCK_DET# <36,48>
DPB_DOCK_AUX <24>
DPB_DOCK_AUX# <24>
DPB_CA_DET <21,24>DPC_CA_DET<21,24>
DPC_DOCK_AUX#<24>
DPC_DOCK_AUX<24>
DPC_DOCK_HPD<21> DPB_DOCK_HPD <21>
DOCK_USB3RN3 <32>
DOCK_USB3RP3 <32>
DOCK_USB3TN3 <32>
DOCK_USB3TP3 <32>
DPC_LANE_P0<21>
DPC_LANE_N0<21>
DPC_LANE_P1<21>
DPC_LANE_N1<21>
DPC_LANE_P2<21>
DPC_LANE_N2<21>
DPC_LANE_P3<21>
DPC_LANE_N3<21>
DPB_LANE_P2 <21>
DPB_LANE_N2 <21>
DPB_LANE_P0 <21>
DPB_LANE_N0 <21>
DPB_LANE_P3 <21>
DPB_LANE_N3 <21>
DPB_LANE_P1 <21>
DPB_LANE_N1 <21>
DOCK_USBP0- <33>
DOCK_USBP0+ <33>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
E-Dock
34 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
E-Dock
34 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
E-Dock
34 58Friday, May 17, 2013
Compal Electronics, Inc.
L43
DLW21SN900SQ2L-0805_4P
@
L43
DLW21SN900SQ2L-0805_4P
@
11
2
2
3
344
R263 33_0402_5%EMC@ R263 33_0402_5%EMC@
1 2
C301 0.1U_0402_10V7KC301 0.1U_0402_10V7K
12
RE4@
10_0402_1%
RE4@
10_0402_1%
12
R260 33_0402_5%EMC@ R260 33_0402_5%EMC@
1 2
C298 0.1U_0402_10V7KC298 0.1U_0402_10V7K
12
R262 33_0402_5%EMC@ R262 33_0402_5%EMC@
1 2
C317
0.1U_0603_50V7K
C317
0.1U_0603_50V7K
12
C297 0.1U_0402_10V7KC297 0.1U_0402_10V7K
12
C315 0.01U_0402_16V7KC315 0.01U_0402_16V7K
1 2
CE7
@
4.7U_0805_25V6-K
CE7
@
4.7U_0805_25V6-K
12
C307 0.1U_0402_10V7KC307 0.1U_0402_10V7K
12
C316
@
1U_0402_6.3V6K
C316
@
1U_0402_6.3V6K
12
R269 0_0402_5%@R269 0_0402_5%@
12
R271
100K_0402_5%
R271
100K_0402_5%
12
R267 33_0402_5%EMC@ R267 33_0402_5%EMC@
1 2
R255 33_0402_5%EMC@ R255 33_0402_5%EMC@
1 2
C306 0.1U_0402_10V7KC306 0.1U_0402_10V7K
12
R268
100K_0402_5%
R268
100K_0402_5%
12
R254 33_0402_5%EMC@ R254 33_0402_5%EMC@
1 2
R270 0_0402_5%@R270 0_0402_5%@
12
R265 33_0402_5%EMC@ R265 33_0402_5%EMC@
1 2
C302 0.1U_0402_10V7KC302 0.1U_0402_10V7K
12
C303 0.1U_0402_10V7KC303 0.1U_0402_10V7K
12
C313 0.01U_0402_16V7KC313 0.01U_0402_16V7K
12
D19
RB751S40T1G_SOD523-2
D19
RB751S40T1G_SOD523-2
1 2
R252 33_0402_5%EMC@ R252 33_0402_5%EMC@
1 2
C294 0.1U_0402_10V7KC294 0.1U_0402_10V7K
12
R264 33_0402_5%EMC@ R264 33_0402_5%EMC@
1 2
C311
@
0.033U_0402_16V7K
C311
@
0.033U_0402_16V7K
12
WD2F144WB7
JDOCK1 CONN@
JAE_WD2F144WB7-DT
WD2F144WB7
JDOCK1 CONN@
JAE_WD2F144WB7-DT
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
45
45 46 46
47
47 48 48
49
49 50 50
51
51 52 52
53
53 54 54
55
55 56 56
57
57 58 58
59
59 60 60
61
61 62 62
63
63 64 64
65
65 66 66
67
67 68 68
69
69 70 70
71
71 72 72
73
73 74 74
75
75 76 76
77
77 78 78
79
79 80 80
81
81 82 82
83
83 84 84
85
85 86 86
87
87 88 88
89
89 90 90
91
91 92 92
93
93 94 94
95
95 96 96
97
97 98 98
99
99 100 100
101
101 102 102
103
103 104 104
105
105 106 106
107
107 108 108
109
109 110 110
111
111 112 112
113
113 114 114
115
115 116 116
117
117 118 118
119
119 120 120
121
121 122 122
123
123 124 124
125
125 126 126
127
127 128 128
129
129 130 130
131
131 132 132
133
133 134 134
135
135 136 136
137
137 138 138
139
139 140 140
141
141 142 142
143
143 144 144
GND1
145
PWR1
146
PWR1
147
GND2 148
PWR2 149
PWR2 150
Shield_G
151
Shield_G
152
Shield_G
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G 157
Shield_G 158
Shield_G 159
Shield_G 160
Shield_G 161
Shield_G 162
C299 0.1U_0402_10V7KC299 0.1U_0402_10V7K
12
RE5@
10_0402_1%
RE5@
10_0402_1%
12
C308 0.1U_0402_10V7KC308 0.1U_0402_10V7K
12
CE9@
4.7P_0402_50V8C
CE9@
4.7P_0402_50V8C
12
C318
0.1U_0603_50V7K
C318
0.1U_0603_50V7K
12
R27210K_0402_5% R27210K_0402_5%
1 2
R257 33_0402_5%EMC@ R257 33_0402_5%EMC@
1 2
C300 0.1U_0402_10V7KC300 0.1U_0402_10V7K
12
CE8@
4.7P_0402_50V8C
CE8@
4.7P_0402_50V8C
12
C312 0.01U_0402_16V7KC312 0.01U_0402_16V7K
12
C310@
0.033U_0402_16V7K
C310@
0.033U_0402_16V7K
12
C296 0.1U_0402_10V7KC296 0.1U_0402_10V7K
12
C295 0.1U_0402_10V7KC295 0.1U_0402_10V7K
12
R256 33_0402_5%EMC@ R256 33_0402_5%EMC@
1 2
C319@
12P_0402_50V8J
C319@
12P_0402_50V8J
12
R259 33_0402_5%EMC@ R259 33_0402_5%EMC@
1 2
R266 33_0402_5%EMC@ R266 33_0402_5%EMC@
1 2
C305 0.1U_0402_10V7KC305 0.1U_0402_10V7K
12
C314 0.01U_0402_16V7KC314 0.01U_0402_16V7K
1 2
R273@
33_0402_5%
R273@
33_0402_5%
12
R258 33_0402_5%EMC@ R258 33_0402_5%EMC@
1 2
R253 33_0402_5%EMC@ R253 33_0402_5%EMC@
1 2
C304 0.1U_0402_10V7KC304 0.1U_0402_10V7K
12
C309 0.1U_0402_10V7KC309 0.1U_0402_10V7K
12
R261 33_0402_5%EMC@ R261 33_0402_5%EMC@
1 2
D20 @
L30ESD24VC3-2_SOT23-3
D20 @
L30ESD24VC3-2_SOT23-3
1
2
3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3.3V_LAN:20mils
GND
CHASSIS
GND
CHASSIS
use 40mil trace if necessary
I/O CONN
RJ45 LOM circuit
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
USB3.0 repeater
+GND_CHASSIS
LAN_ACTLED_YEL_R#
LED_100_ORG_R#
LED_10_GRN_R#
NB_LAN_TX0+
NB_LAN_TX0+
NB_LAN_TX0-
NB_LAN_TX0-
NB_LAN_TX1+
NB_LAN_TX1+
NB_LAN_TX1-
NB_LAN_TX1-
NB_LAN_TX2+
NB_LAN_TX2+
NB_LAN_TX2-
NB_LAN_TX2-
NB_LAN_TX3+
NB_LAN_TX3+
NB_LAN_TX3-
NB_LAN_TX3-
SW_LAN_TX0+
SW_LAN_TX0-
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3+
SW_LAN_TX3-
USB3RN1_IO
USB3RP1_IO
Z2805
Z2806
Z2807
Z2808
USB3RN1_RP
USB3RP1_RP
USB3RN1_IO
USB3RP1_IO
EQ1EQ0
DE
EQ0
EQ1
DE
+3.3V_LAN
+5V_ALW
+3.3V_ALW
+3.3V_RUN
+5V_ALW +3.3V_ALW +3.3V_RUN
+3.3V_RUN +3.3V_RUN
+3.3V_RUN
LED_100_ORG#<28>
LED_10_GRN#<28>
WIRELESS_ON#/OFF<36>
USB_OC1#<11>
LAN_ACTLED_YEL#<28>
SW_LAN_TX3-<28>
SW_LAN_TX3+<28>
SW_LAN_TX2+<28>
SW_LAN_TX2-<28>
SW_LAN_TX0-<28>
SW_LAN_TX0+<28>
SW_LAN_TX1-<28>
SW_LAN_TX1+<28>
USB3TN1<11>
USB3TP1<11>
SLEEVE<26>
LID_CL#<36,40>
AUD_HP_NB_SENSE<26,36>
USB_SIDE_EN#<36>
USBP1+<11>
USBP1-<11>
RING2<26>
AUD_HP_OUT_R<26>
AUD_HP_OUT_L<26>
USB3RN1 <11>
USB3RP1 <11>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
RJ45 & I/O
35 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
RJ45 & I/O
35 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
RJ45 & I/O
35 58Friday, May 17, 2013
Compal Electronics, Inc.
C326
0.47U_0603_10V7K
C326
0.47U_0603_10V7K
12
R276 150_0402_5%R276 150_0402_5%
1 2
C325
0.47U_0603_10V7K
C325
0.47U_0603_10V7K
12
U51
PS8711BTQFN20GTR-A0_TQFN20_3X3
U51
PS8711BTQFN20GTR-A0_TQFN20_3X3
I2C_EN 5
VDD
6
GND
13 GND
3
NC 8
OUTn 15
INn
1
PD# 20
EQ_INC# 11
NC 12
NC
4
REXT
10
EQ1 17
VDD 16
INp
2
DE
18 EQ0
19
OUTp 14
NC 9
NC 7
GND
21
rev1
JLOM1
SANTA_130456-341
CONN@
rev1
JLOM1
SANTA_130456-341
CONN@
PR1+
1
PR1-
2
PR2+
3
PR3+
4
PR3-
5
PR2-
6
PR4+
7
PR4-
8
Yellow LED+
9
Yellow LED-
10
Green LED-
11
Green-Orange LED+
12
Orange LED-
13
GND 14
GND 15
R479
4.7K_0402_5%
R479
4.7K_0402_5%
12
R280 75_0402_1%R280 75_0402_1%
12
C395
0.01U_0402_16V7K
C395
0.01U_0402_16V7K
12
C381
0.1U_0402_10V7K
C381
0.1U_0402_10V7K
12
C320
470P_0402_50V7K
C320
470P_0402_50V7K
12
C4
@
0.1U_0402_16V4Z
C4
@
0.1U_0402_16V4Z
12
C323
0.47U_0603_10V7K
C323
0.47U_0603_10V7K
12
R476
3.01K_0402_1%
R476
3.01K_0402_1%
12
C77
@
0.1U_0402_16V4Z
C77
@
0.1U_0402_16V4Z
12
R480
4.7K_0402_5%
@
R480
4.7K_0402_5%
@
12
R278 75_0402_1%R278 75_0402_1%
12
C50
@
0.1U_0402_16V4Z
C50
@
0.1U_0402_16V4Z
12
C321
0.1U_0402_10V7K
C321
0.1U_0402_10V7K
12
C286 0.1U_0402_10V7KC286 0.1U_0402_10V7K
12
C324
0.47U_0603_10V7K
C324
0.47U_0603_10V7K
12
R275 150_0402_5%R275 150_0402_5%
1 2
R277 75_0402_1%R277 75_0402_1%
12
R279 75_0402_1%R279 75_0402_1%
12
R477
4.7K_0402_5%
@
R477
4.7K_0402_5%
@
1 2
R478
4.7K_0402_5%
R478
4.7K_0402_5%
12
C335 0.1U_0402_10V7KC335 0.1U_0402_10V7K
12
C327
EMC@
150P_1808_2.5KV8JC327
EMC@
150P_1808_2.5KV8J
1 2
R274 150_0402_5%R274 150_0402_5%
1 2
JIO1
CONN@
ACES_50506-02641-P01
JIO1
CONN@
ACES_50506-02641-P01
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
GND
27
GND
28
1:1
1:1
1:1
1:1
T94
350uH_IH-115-F
1:1
1:1
1:1
1:1
T94
350uH_IH-115-F
TD1+
1
TD1-
2
TDCT1
3
TDCT2
4
TD2+
5
TD2-
6
TD3+
7
TD3-
8
TDCT3
9
TDCT4
10
TD4+
11
TD4-
12 TX4- 13
TX4+ 14
TXCT4 15
TXCT3 16
TX3- 17
TX3+ 18
TX2- 19
TX2+ 20
TXCT2 21
TXCT1 22
TX1- 23
TX1+ 24
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+CAP_LDO trace width 20 mils
ME_FWP PCH has internal 20K PD.
(suspend power rail)
trace width 20 mils
trace width 20 mils
VGA_ID0
Discrete
UMA 1
0
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
+CAP_LDO
ALS_INT#
ALS_INT#
AUD_HP_NB_SENSE
AUD_NB_MUTE#
AUX_EN_WOWL
BAT1_LED#
BAT2_LED#
BCM5882_ALERT#
BC_CLK_ECE5048
BC_DAT_ECE5048
BC_INT#_ECE5048
BREATH_LED#
BT_RADIO_DIS#
BT_RADIO_DIS#
CCD_OFF
CHARGE_EN
CHARGE_EN
CHARGE_PBATT
CLKRUN#
CLK_PCI_5048
CLK_PCI_5048
CPU_DETECT#
CPU_DETECT#
CPU_VTT_ON
CPU_VTT_ON
DGPU_SELECT#
DOCKED
DOCK_DET#
DOCK_HP_DET
DOCK_MIC_DETDOCK_SMB_ALERT#
DOCK_SMB_ALERT#
DP_HDMI_HPD
D_CLKRUN#
D_CLKRUN#
D_DLDRQ1#
D_DLDRQ1#
D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_LFRAME#
D_SERIRQ
D_SERIRQ
EC5048_TX
EDID_SELECT#
ENVDD_PCH
EN_DOCK_PWR_BAR
EN_I2S_NB_CODEC#
ESATA_USB_PWR_EN#
ESATA_USB_PWR_EN#
FP_POA_EN
HW_GPS_DISABLE2#
HW_GPS_DISABLE2#
IRQ_SERIRQ
LAN_DISABLE#_R
LCD_TST
LCD_TST
LCD_VCC_TEST_EN
LED_SATA_DIAG_OUT#
LID_CL_SIO#
LID_CL_SIO#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LDRQ1#
LPC_LDRQ1#
LPC_LFRAME#
MASK_SATA_LED#
MCARD_MISC_PWREN
mCARD_PCIE_SATA#
MCARD_WWAN_PWREN
ME_FWP
ME_FWP
MODC_EN
MODULE_BATT_PRES#
MODULE_ON
SIO_EXT_WAKE#
PANEL_BKEN_EC
PBAT_PRES#
PCH_PLTRST#_EC
PROCHOT_GATE
PROCHOT_GATE
PSID_DISABLE#
RUNPWROK
RUN_ON
RUN_ON
SIO_SLP_A#
SIO_SLP_LAN#
SIO_SLP_SUS#
SLICE_BAT_ON
SLICE_BAT_ON
SLICE_BAT_PRES#
SLICE_BAT_PRES#
SLP_ME_CSW_DEV#
SP_TPM_LPC_EN
SP_TPM_LPC_EN
SUS_ON
SUS_ON
SYS_LED_MASK#
SYS_LED_MASK#
SYS_PWROK
TOUCH_SCREEN_PD#
USB_PWR_SHR_EN#
USB_PWR_SHR_EN#
USB_PWR_SHR_VBUS_EN
USB_SIDE_EN#USB_SIDE_EN#
USH_PWR_STATE#
VGA_ID
VGA_ID
WIGIG60GHZ_DIS#
WIGIG60GHZ_DIS#
WIRELESS_LED#
WIRELESS_ON#/OFF
WIRELESS_ON#/OFF
WLAN_RADIO_DIS#
WW AN_RADIO_DIS#
WW AN_RADIO_DIS#
XFR_ID_BIT#
XFR_ID_BIT#
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW +3.3V_ALW_U37
+3.3V_ALW
LPC_LFRAME# <29,37,7>
SYS_LED_MASK#<40>
WLAN_RADIO_DIS#<31>
WW AN_RADIO_DIS#<31>
LID_CL# <35,40>
IMVP_VR_ON <46>
SIO_EXT_WAKE#<12>
D_SERIRQ <34>
D_DLDRQ1# <34>
CLK_PCI_5048 <7>
D_LAD3 <34>
D_CLKRUN# <34>
D_LAD1 <34>
PCH_PLTRST#_EC <29,31,37,9>
D_LAD2 <34>
D_LFRAME# <34>
IRQ_SERIRQ <12,29,37>
D_LAD0 <34>
CLKRUN# <12,29,37,9>
SIO_SLP_A# <39,44,9>
SIO_SLP_S4# <39,43,9>
SIO_SLP_S3# <39,43,9>
WIRELESS_ON#/OFF<35> BC_CLK_ECE5048 <37>
BC_INT#_ECE5048 <37>
BC_DAT_ECE5048 <37>
BCM5882_ALERT#<29>
EN_DOCK_PWR_BAR<48>
PSID_DISABLE#<41>
LCD_TST<22>
ENVDD_PCH<10,22>
USH_PWR_STATE#<29>
PANEL_BKEN_EC<22>
DOCKED<21,27,28,32>
DOCK_DET#<34,48>
AUD_NB_MUTE#<26>
LCD_VCC_TEST_EN<22>
AUD_HP_NB_SENSE<26,35>
DOCK_AC_OFF_EC <48>
WLAN_LAN_DISB# <28>
SIO_SLP_LAN# <28,9>
GPIO_PSID_SELECT <41>
DOCK_HP_DET <26>
DOCK_MIC_DET <26>
ME_FWP <6>
RUN_ON <26,37,39>
SPI_WP#_SEL <7>
IMVP_PWRGD <46>
EC_32KHZ_ECE5048 <37>
PCH_DPWROK<9>
PBAT_PRES#<41,48>
SLICE_BAT_PRES#<34,41,48>
CPU_DETECT#<9>
SLP_ME_CSW_DEV#<12>
SYS_PWROK<9>
SIO_SLP_SUS# <9>
SLICE_BAT_ON<48>
WIRELESS_LED#<31,40>
MASK_SATA_LED# <40>
LED_SATA_DIAG_OUT# <40>
RUNPWROK <37,9>
SUSACK#<9>
LAN_DISABLE#_R<28>
LPC_LAD0 <29,37,7>
SUS_ON <39,43>
HW_GPS_DISABLE2# <31>
BREATH_LED# <34,40>
BAT1_LED# <40>
BAT2_LED# <40>
LPC_LAD1 <29,37,7>
LPC_LAD2 <29,37,7>
LPC_LAD3 <29,37,7>
PROCHOT_GATE<47>
USB_PWR_SHR_VBUS_EN<33>
DOCK_SMB_ALERT#<34,41,48>
SIO_SLP_WLAN#<9>
USB_SIDE_EN#<35>
ESATA_USB_PWR_EN#<33>
WIGIG60GHZ_DIS#<31>
BT_RADIO_DIS#<31>
MCARD_PCIE_SATA#<6>
EN_I2S_NB_CODEC#<26>
DIS_BAT_PROCHOT# <48>
SP_TPM_LPC_EN <29>
AC_DIS <41,48>CCD_OFF<22>
USH_PWR_ON <39>
USB_PWR_SHR_EN# <33>
EC5048_TX<31,37>
DOCKED_LIO_EN<33>
AUX_EN_WOWL <31>
MCARD_WWAN_PWREN<31>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
ECE5048
36 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
ECE5048
36 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
ECE5048
36 58Friday, May 17, 2013
Compal Electronics, Inc.
T110@PAD~DT110@PAD~D
R308 100K_0402_5%R308 100K_0402_5%
12
R313 100K_0402_5%R313 100K_0402_5%
1 2
R303 100K_0402_5%R303 100K_0402_5%
12
R293 100K_0402_5%R293 100K_0402_5%
1 2
PJP6
PAD-OPEN1x1m
PJP6
PAD-OPEN1x1m
1 2
R282 100K_0402_5%R282 100K_0402_5%
1 2
R286 100K_0402_5%R286 100K_0402_5%
1 2
T97@PAD~DT97@PAD~D
R292 100K_0402_5%R292 100K_0402_5%
1 2
RP8
100K_0804_8P4R_5%
RP8
100K_0804_8P4R_5%
1
2
3
4 5
6
7
8
C332
0.1U_0402_25V6
C332
0.1U_0402_25V6
12
R310 10K_0402_5%R310 10K_0402_5%
1 2
R291 100K_0402_5%R291 100K_0402_5%
1 2
R298 100K_0402_5%R298 100K_0402_5%
1 2
C331
0.1U_0402_25V6
C331
0.1U_0402_25V6
12
R287 100K_0402_5%R287 100K_0402_5%
1 2
T115@PAD~DT115@PAD~D
R283 100K_0402_5%R283 100K_0402_5%
1 2
T118@PAD~DT118@PAD~D
R305 100K_0402_5%R305 100K_0402_5%
12
U37
DB Version 0.4
ECE5048-LZY_DQFN132_11X11~D
U37
DB Version 0.4
ECE5048-LZY_DQFN132_11X11~D
GPIOA0
B52
GPIOA1
A49
GPIOA2
B53
GPIOA3
A50
GPIOA4
B54
GPIOA5
A51
GPIOA6
B55
GPIOA7
A52
GPIOD1
B32
GPIOD2
A31
GPIOD3
B33
GPIOD4
B15
GPIOD5
A15
GPIOD6
B16
GPIOD7
A16
GPIOF7
B58 GPIOF6
A55 GPIOF5
B59 GPIOF4/TACH7
A56
GPIOL0/PWM7 B60
GPIOL1/PWM8 A57
GPIOF3/TACH8
B61 GPIOF2
A58 GPIOF1
B62 GPIOF0
A59
VCC1 B5
CAP_LDO B46
TEST_PIN B19
LAD0 A27
LAD1 A26
LAD2 B26
LAD3 B25
LFRAME# A21
LRESET# B22
PCICLK A28
CLKRUN# B20
GPIOI0 A23
LDRQ1# A22
SER_IRQ B21
14.318MHZ/GPIOM0 A32
GPIOM4/PWM6 B51
DLAD0 B29
DLAD1 B28
DLAD2 A25
DLAD3 A24
DLFRAME# B23
DCLKRUN# A19
DLDRQ1# B24
DSER_IRQ A20
PWRGD A4
OUT65 B56
VSS B27
GPIOM3/PWM4 B39
GPIOL2/PWM0 B64
VCC1 A17
VCC1 B30
VCC1 A43
VCC1 A54
BC_INT# A29
BC_DAT B31
BC_CLK A30
GPIOB0
A33
GPIOB1
B36
GPOC2
A34
GPOC3
B37
GPOC4
A35
GPOC5
B38
GPOC6/TACH4
A36
GPIOC7
A37
GPIOD0
B40
GPIOC1
A38
GPIOC0
B41
GPIOB7
A39
GPIOB6
B42
GPIOB5
A40
GPIOB4
B43
GPIOB3
A41
GPIOB2
B44
GPIOH0
B13
GPIOH1
A13
SYSOPT1/GPIOH2
A53
SYSOPT0/GPIOH3
B57
GPIOH4
B14
GPIOH5
A14
GPIOH6
B17
GPIOH7
B18
GPIOE0/RXD
A1
GPIOE1/TXD
B2
GPIOE2/RTS#
A2
GPIOE3/DSR#
B3
GPIOE4/CTS#
A3
GPIOE5/DTR#
B45
GPIOE6/RI#
A42
GPIOE7/DCD#
B4
GPIOG0/TACH5
B47
GPIOG1
A45
GPIOG2
B48
GPIOG3
A46
GPIOG4
B49
GPIOG5
A47
GPIOG6
B50
GPIOG7/TACH6
A48
GPIOK0 A8
GPIOK1/TACH3 B9
GPIOK2 B10
GPIOK3 A10
GPIOK4 B11
GPIOK5 A11
GPIOK6 B12
GPIOK7 A12
GPIOI1 B63
GPIOI2/TACH0 A60
GPIOI3 A61
GPIOI4 B65
GPIOI5 A62
GPIOI6 B66
GPIOI7 A63
GPIOJ0 B67
GPIOJ1/TACH1 A64
GPIOJ2/TACH2 A5
GPIOJ3 B6
GPIOJ4 A6
GPIOJ5 B7
GPIOJ6 A7
GPIOJ7 B8
GPIOM1 B34
CLK32/GPIOM2 B35
EP C1
GPIOL3/PWM1 B68
GPIOL4/PWM3 A9
GPIOL5/PWM2 B1
GPIOL6 A18
GPIOL7/PWM5 A44
R285 100K_0402_5%R285 100K_0402_5%
1 2
R281 10K_0402_5%R281 10K_0402_5%
1 2
R324@
33_0402_5%
R324@
33_0402_5%
12
R309 100K_0402_5%R309 100K_0402_5%
1 2
R320@
100K_0402_5%
R320@
100K_0402_5%
1 2
R325 10_0402_1%R325 10_0402_1%
12
R317
100K_0402_5%
R317
100K_0402_5%
1 2
T101 @PAD~D T101 @PAD~D
R307 100K_0402_5%R307 100K_0402_5%
12
T100 @PAD~D T100 @PAD~D
C337
0.047U_0402_16V4Z
C337
0.047U_0402_16V4Z
12
R295 100K_0402_5%R295 100K_0402_5%
1 2
C330
0.1U_0402_25V6
C330
0.1U_0402_25V6
12
R322
100K_0402_5%
R322
100K_0402_5%
12
C328
10U_0603_6.3V6M
C328
10U_0603_6.3V6M
12
R326@
1K_0402_5%
R326@
1K_0402_5%
12
T106@PAD~DT106@PAD~D
R304@10K_0402_5%R304@10K_0402_5%
1 2
R289 100K_0402_5%R289 100K_0402_5%
1 2
T98@PAD~DT98@PAD~D
C336
4.7U_0603_6.3V6K
C336
4.7U_0603_6.3V6K
12
R321 1K_0402_5%R321 1K_0402_5%
1 2
C329
0.1U_0402_25V6
C329
0.1U_0402_25V6
12
R319@0_0402_5%R319@0_0402_5%
1 2
R288 10K_0402_5%R288 10K_0402_5%
1 2
C334
0.1U_0402_10V7K
C334
0.1U_0402_10V7K
12
T107@PAD~DT107@PAD~D
C339@
33P_0402_50V8J
C339@
33P_0402_50V8J
12
R284 100K_0402_5%R284 100K_0402_5%
1 2
R302 100K_0402_5%@R302 100K_0402_5%@
1 2
T121@PAD~DT121@PAD~D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1K
4700p
4700p
4700p
4700p
4700p
4700p
X02
X01
X00
62K
33K
8.2K
4.3K
R392 C368
130K 4700p
REV
240K 4700p
2K
*
CHIPSET_ID for BID function
BOARD_ID rise time is measured from 5%~68%.
A00
R866 close to U38 at least 250mils
15mil
1: Channel 1 will provide Thermistor Readings
0: Channel 1 will provide Diode Readings
Rest=1.58K , Tp=96 degree
Place close pin A29
32 KHz Clock
Place close pin A21
C283, C285, C286, C287 Place near U38
ESR <2ohms
V.R
DP1/DN1
DP2/DN2
DP4/DN4
Location
CPU
DIMM
Thermal diode mapping
5075 Channel
Place under CPU
Place C266 close to the Q11 as possible
DP2/DN2 for SODIMM on Q13, place Q13 close
to SODIMM and C372 close to Q13
DP4/DN4 for Skin on Q14, place Q14 close to Vcore VR choke.
Pin8 5075_TXD for EC Debug
pin9 5048_TXD for SBIOS
debug
reserve for DC fan
EMI depop location
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
***
***
***
***
+3.3V_VTR
+3.3V_VTR_ADC
+PECI_VREF
+RTC_CELL_VBAT
+VR_CAP
1.05V_A_PWRGD
1.35V_SUS_PWRGD
ACAV_IN
ACAV_IN_NB
AC_PRESENT
ALWON
A_ONA_ON
BAY_SMBCLK
BAY_SMBCLK
BAY_SMBDAT
BAY_SMBDAT
BC_CLK_ECE1117
BC_CLK_ECE5048
BC_DAT_ECE1117
BC_DAT_ECE1117
BC_DAT_ECE5048
BC_DAT_ECE5048
BC_INT#_ECE1117
BC_INT#_ECE5048
BEEP
BIA_PWM_EC
BOARD_ID
BOARD_ID
CARD_SMBCLK
CARD_SMBCLK
CARD_SMBDAT
CARD_SMBDAT
CHARGER_SMBCLK
CHARGER_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBDAT
CLKRUN#
CLK_KBD
CLK_KBD
CLK_MSE
CLK_MSE
CLK_PCI_MEC
CLK_PCI_MEC
CLK_TP_SIO
DAT_KBD
DAT_KBD
DAT_MSE
DAT_MSE
DAT_TP_SIO
DDR_HVREF_RST_GATE
DDR_HVREF_RST_GATE
DEVICE_DET#
DEVICE_DET#
DOCK_POR_RST#
DOCK_POR_RST#
DOCK_POR_RST#
DOCK_PWR_SW#
DOCK_PWR_SW#
DOCK_SMB_CLK DOCK_SMB_CLK
DOCK_SMB_DAT DOCK_SMB_DAT
DYN_TUR_CURRNT_SET#
EN_INVPWR
EN_INVPWR
FAN1_PWM
FAN1_PWM
FAN1_PWM
FAN1_TACH
FAN1_TACH
FAN1_TACH
FWP#
FWP#
GPU_SMBCLK
GPU_SMBCLK
GPU_SMBDAT
GPU_SMBDAT
HOST_DEBUG_RX
HOST_DEBUG_RX
HOST_DEBUG_TX
HOST_DEBUG_TX
HOST_DEB_TX
IRQ_SERIRQ
JTAG_CLK
JTAG_CLK
JTAG_RST#
JTAG_RST#
JTAG_TDI
JTAG_TDI
JTAG_TDO
JTAG_TDO
JTAG_TMS
JTAG_TMS
LAN_WAKE#
LCD_SMBCLK LCD_SMBCLK
LCD_SMBDAT LCD_SMBDAT
LPC_LAD0
LPC_LAD0
LPC_LAD1
LPC_LAD1
LPC_LAD2
LPC_LAD2
LPC_LAD3
LPC_LAD3
LPC_LFRAME#
LPC_LFRAME#
MEC_XTAL1
MEC_XTAL1
MEC_XTAL2
MEC_XTAL2 MEC_XTAL2_R
MSCLK
MSCLK
MSDATA
MSDATA
MSDATA
PBAT_SMBCLK
PBAT_SMBCLK
PBAT_SMBDAT
PBAT_SMBDAT
PCH_ALW_ON
PCH_ALW_ON
PCH_PCIE_WAKE#
PCH_PLTRST#_EC
PCH_PLTRST#_EC
PCH_RSMRST#
PCH_RSMRST#
PCH_SATA_MOD_EN#
PCIE_WAKE#
PCIE_WAKE#
PECI_EC_RPECI_EC_R
PM_APWROK
POA_WAKE#
POA_WAKE#
POWER_SW_IN#
POWER_SW_IN#
PROCHOT#_EC
PROCHOT#_EC
PS_ID
REM_DIODE1_N
REM_DIODE1_N
REM_DIODE1_P
REM_DIODE1_P
REM_DIODE2_N
REM_DIODE2_N
REM_DIODE2_P
REM_DIODE2_P
REM_DIODE4_N
REM_DIODE4_N
REM_DIODE4_P
REM_DIODE4_P
RESET_OUT#
RESET_OUT#
RUNPWROK
RUNPWROK
RUN_ON#
SIO_EXT_SCI#
SIO_EXT_SMI#
SIO_PWRBTN#
SIO_RCIN#
SIO_SLP_S5#
SML1_SMBCLK
SML1_SMBDATA
SYSTEM_ID
SYSTEM_ID
THERMATRIP2#
THERMATRIP2#
THERMATRIP3#
THERMATRIP3#
THSEL_STRAP
THSEL_STRAP
USH_SMBCLK
USH_SMBDAT
VCI_IN2#
VCI_IN2#
VOL_DOWN
VOL_MUTE
VOL_UP
VSET_5075
VSET_5075
+3.3V_ALW
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+1.05V_RUN
+RTC_CELL
+1.05V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW2
+5V_RUN
+1.05V_RUN
+3.3V_ALW
+3.3V_ALW +3.3V_ALW_U38
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+5V_RUN
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW_U38
+3.3V_ALW_U38
POWER_SW#_MB <40,9> DOCK_PWR_BTN# <34>
H_PROCHOT# <46,47,48,9>
LPC_LAD1<29,36,7>
LPC_LAD2<29,36,7>
LPC_LAD3<29,36,7>
LPC_LAD0<29,36,7>
SIO_EXT_SCI#<12>
CLKRUN#<12,29,36,9>
PCIE_WAKE# <31>
DOCK_POR_RST#<34>
EC_32KHZ_ECE5048<36>
PCH_RSMRST# <38>
DYN_TUR_CURRNT_SET# <47>
AC_PRESENT <9>
SML1_SMBDATA<7>
SML1_SMBCLK<7>
PS_ID <41>
MSCLK <31>
MSDATA <31>
SIO_PWRBTN# <9>
PCH_PCIE_WAKE# <9>
VOL_MUTE <40>
CLK_KBD<34>
DAT_KBD<34>
VOL_UP <40>
DOCK_SMB_CLK <34>
ALWON <42>
ME_SUS_PWR_ACK <9>
HOST_DEBUG_TX <31>
1.35V_SUS_PWRGD <43>
DAT_MSE<34>
CLK_MSE<34>
PECI_EC <9>
PM_APWROK <9>
BC_CLK_ECE1117<38>
PCH_ALW_ON<39>
BC_DAT_ECE1117<38>
BC_INT#_ECE1117<38>
RESET_OUT# <15,9>
BIA_PWM_EC<22>
SIO_EXT_SMI#<12>
PBAT_SMBDAT<41>
PBAT_SMBCLK<41>
SIO_RCIN#<12>
RUNPWROK <36,9>
IRQ_SERIRQ<12,29,36>
EN_INVPWR <22>
PCH_PLTRST#_EC<29,31,36,9>
CHARGER_SMBCLK <47>
CHARGER_SMBDAT <47>
CLK_PCI_MEC<7>
BC_DAT_ECE5048<36>
BC_INT#_ECE5048<36>
BC_CLK_ECE5048<36>
LPC_LFRAME#<29,36,7>
USH_SMBDAT <29>
USH_SMBCLK <29>
VOL_DOWN <40>
ALW_PWRGD_3V_5V <42>
V_SYS <47>
H_THERMTRIP#<12>
A_ON<39,44>
BEEP<26>
SIO_SLP_S5#<9>
1.05V_A_PWRGD <44>
ACAV_IN <47,48>
ACAV_IN_NB<47,48>
CLK_PCI_LPDEBUG <7>
CLK_TP_SIO<38>
DAT_TP_SIO<38>
RUN_ON<26,36,39>
EC5048_TX <31,36>
VCP <47>
SLICE_PERF_EN <48>
SIO_SLP_S0# <9>
DOCK_SMB_DAT <34>
LAN_WAKE# <12,28>
EC_WAKE#<12>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
MEC5075
37 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
MEC5075
37 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
MEC5075
37 58Friday, May 17, 2013
Compal Electronics, Inc.
R336@0_0402_5%R336@0_0402_5%
1 2
R403 2.2K_0402_5%R403 2.2K_0402_5%
1 2
Y4
32.768KHZ_12.5PF_Q13FC135000040
Y4
32.768KHZ_12.5PF_Q13FC135000040
1 2
C340@
1U_0402_6.3V6K
C340@
1U_0402_6.3V6K
1 2
R378@0_0402_5%R378@0_0402_5%
12
C7
22U_0805_6.3V6M
C7
22U_0805_6.3V6M
12
C352
1U_0402_6.3V4Z
C352
1U_0402_6.3V4Z
12
R408 10K_0402_5%R408 10K_0402_5%
1 2
R379@0_0402_5%R379@0_0402_5%
1 2
R370
100K_0402_5%
R370
100K_0402_5%
12
R381 4.7K_0402_5%R381 4.7K_0402_5%
1 2
R375 43_0402_5%R375 43_0402_5%
1 2
C359 2200P_0402_50V7KC359 2200P_0402_50V7K
1 2
R376 10K_0402_5%R376 10K_0402_5%
1 2
R329 10K_0402_5%R329 10K_0402_5%
1 2
R371 100K_0402_5%R371 100K_0402_5%
1 2
R362@100K_0402_5%R362@100K_0402_5%
1 2
C344
1U_0402_6.3V6K
C344
1U_0402_6.3V6K
12
C342@
1U_0402_6.3V6K
C342@
1U_0402_6.3V6K
1 2
C370@
100P_0402_50V8J
C370@
100P_0402_50V8J
1 2
C366
4.7U_0603_6.3V6K
C366
4.7U_0603_6.3V6K
12
RP16
2.2K_0804_8P4R_5%
RP16
2.2K_0804_8P4R_5%
1
2
3
4 5
6
7
8
C372@
100P_0402_50V8J
C372@
100P_0402_50V8J
12
C343
1U_0402_6.3V6K
C343
1U_0402_6.3V6K
12
JFAN1
CONN@
ACES_50271-0040N-001
JFAN1
CONN@
ACES_50271-0040N-001
11
22
33
44
GND1 5
GND2 6
C360
0.1U_0402_25V6
C360
0.1U_0402_25V6
12
R402
8.2K_0402_5%
R402
8.2K_0402_5%
12
R382@
10_0402_1%
R382@
10_0402_1%
12
R353100K_0402_5% R353100K_0402_5%
12
RP18
100K_0804_8P4R_5%
RP18
100K_0804_8P4R_5%
1
2
3
45
6
7
8
C373
@
100P_0402_50V8J
C373
@
100P_0402_50V8J
1 2
R352 1K_0402_5%R352 1K_0402_5%
1 2
R360@100K_0402_5%R360@100K_0402_5%
1 2
R332@0_0402_5%R332@0_0402_5%
1 2
R363100K_0402_5% R363100K_0402_5%
12
R397
10K_0402_5%
R397
10K_0402_5%
12
C347
1U_0402_6.3V4Z
C347
1U_0402_6.3V4Z
12
R398@
100K_0402_5%
R398@
100K_0402_5%
12
C363
@
4.7P_0402_50V8C
C363
@
4.7P_0402_50V8C
12
G
D
S
Q9@
L2N7002WT1G_SC-70-3
G
D
S
Q9@
L2N7002WT1G_SC-70-3
1
2
3
C365
22P_0402_50V8J
C365
22P_0402_50V8J
12
C350
0.1U_0402_25V6
C350
0.1U_0402_25V6
12
R366 10K_0402_5%R366 10K_0402_5%
1 2
R338 1K_0402_5%R338 1K_0402_5%
1 2
R349 1K_0402_5%R349 1K_0402_5%
1 2
R4532.2K_0402_5% R4532.2K_0402_5%
12
C351
0.1U_0402_25V6
C351
0.1U_0402_25V6
12
R388
49.9_0402_1%
R388
49.9_0402_1%
12
PJP7
PAD-OPEN1x1m
PJP7
PAD-OPEN1x1m
1 2
T123 @
PAD~D T123 @
PAD~D
C368
4700P_0402_25V7K
C368
4700P_0402_25V7K
12
RP1
10K_8P4R_5%
RP1
10K_8P4R_5%
1
2
3
4 5
6
7
8
R339 2.2K_0402_5%R339 2.2K_0402_5%
1 2
R395
10K_0402_5%
R395
10K_0402_5%
12
R35
10K_0402_5%
R35
10K_0402_5%
12
C355
0.1U_0402_25V6
C355
0.1U_0402_25V6
12
R380
100K_0402_5%
R380
100K_0402_5%
12
R394
1.58K_0402_1%
R394
1.58K_0402_1%
12
C358 2200P_0402_50V7KC358 2200P_0402_50V7K
1 2
C362
1U_0402_6.3V6K
C362
1U_0402_6.3V6K
12
C367
0.1U_0402_25V6
C367
0.1U_0402_25V6
12
RP2
4.7K_8P4R_5%
RP2
4.7K_8P4R_5%
1
2
3
4 5
6
7
8
C348
10U_0603_6.3V6M
C348
10U_0603_6.3V6M
12
R330 10K_0402_5%R330 10K_0402_5%
1 2
R343 100K_0402_5%R343 100K_0402_5%
1 2
R345 2.2K_0402_5%R345 2.2K_0402_5%
1 2
C354
0.1U_0402_25V6
C354
0.1U_0402_25V6
12
JTAG1 CONN@
@SHORT PADS~D
JTAG1 CONN@
@SHORT PADS~D
11
2
2
R392
1K_0402_5%
R392
1K_0402_5%
12
E
B
C
Q11
MMBT3904WT1G_SC70-3~D
E
B
C
Q11
MMBT3904WT1G_SC70-3~D
2
3 1
C361 2200P_0402_50V7KC361 2200P_0402_50V7K
1 2
U38
MEC5075-LZY_DQFN132_11X11~D
U38
MEC5075-LZY_DQFN132_11X11~D
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA/GANG_BUSY
A5
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK/GANG_ERROR
B6
GPIO011/nSMI/GANG_DATA0
A6
GPIO030/GPTP-IN2/BCM_E_INT#
B19 GPIO031/GPTP-OUT2/BCM_E_DAT
A18 GPIO032/BCM_E_CLK
B20
GPIO045/LSBCM_D_INT#
A19 GPIO046/LSBCM_D_DAT
B21 GPIO047/LSBCM_D_CLK
A20
GPIO061/LPCPD#
A27
GPIO024/THSEL_STRAP B29
SER_IRQ
A28
LRESET#
B30
GPIO100/NEC_SCI
A33
GPIO110/PS2_CLK2/GPTP-IN6
A37
GPIO111/PS2_DAT2/GPTP-OUT6
B40
GPIO160/32KHZ_OUT
B62
XTAL1
A61
XTAL2
A62
GPIO112/PS2_CLK1A
A38
GPIO113/PS2_DAT1A
B41
GPIO114/PS2_CLK0A
A39
GPIO115/PS2_DAT0A
B42
GPIO154/I2C1C_DATA/PS2_CLK1B
B59
GPIO155/I2C1C_CLK/PS2_DAT1B
A56
GPIO145/I2C1K_DATA/JTAG_TDI
A51
GPIO146/I2C1K_CLK/JTAG_TDO
B55
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
B56
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
A53
GPIO156/LED0 B57
GPIO050/FAN_TACH1/GTACH
B22
GPIO051/FAN_TACH2
A21
GPIO052/FAN_TACH3
B23
GPIO053/PWM0
B24
GPIO054/PWM1
A23
GPIO055/PWM2
B25
GPIO056/PWM3/GPWM
A24
GPIO121/BCM_A_INT#
A42 GPIO122/BCM_A_DAT
B45 GPIO123/BCM_A_CLK
A43
PCI_CLK
A29
LFRAME#
B31
LAD0
A30
LAD1
B32
LAD2
A31
LAD3
B33
CLKRUN#
A32
GPIO001/ECSPI_CS1 B2
GPIO015/GPTP-OUT7/GANG_DATA3 A8
GPIO016/GPTP-IN8/GANG_DATA4 B9
GPIO017/GPTP-OUT8 A9
GPIO020/RC_ID2 B10
GPIO021/RC_ID1 A10
VCC_PWRGD B26
GPIO060/KBRST/BCM_B_INT# A25
GPIO101/ECGP_SCLK/GANG_DATA5 B36
GPIO102/BCM_C_INT#/GANG_DATA6 A34
GPIO103/ECGP_MISO/GANG_DATA7 B37
GPIO104 A35
GPIO105/ECGP_MOSI B38
GPIO106 A36
GPIO107/NRESET_OUT B39
GPIO116/MSDATA/V2P_COUT_LO/TAP_SEL_STRAP A40
GPIO117/MSCLK/V2P_COUT_HI B43
GPIO120/UART_TX B44
GPIO124/GPTP-OUT5/UART_RX B46
GPIO125/GPTP-IN5 A44
GPIO126 B47
GPIO127/A20M A45
PROCHOT_IN#/PROCHOT_IO# A46
GPIO151/GPTP-IN4 A54
GPIO152/GPTP-OUT4 B58
GPIO153/LED2 A55
JTAG_RST#
A57
NFWP B65
VBAT
B64
H_VTR
A22
PECI_DAT A48
VREF_PECI B51
VCI_OVRD_IN A64
VCI_IN3# B68
GPIO003/I2C1A_DATA/GANG_MODE A3
GPIO004/I2C1A_CLK/GANG_START B4
GPIO005/I2C1B_DATA/BCM_B_DAT/GANG_STROBE A4
GPIO006/I2C1B_CLK/BCM_B_CLK/GANG_FULL B5
GPIO012/I2C1H_DATA/I2C2D_DATA/GANG_DATA1 B7
GPIO013/I2C1H_CLK/I2C2D_CLK/GANG_DATA2 A7
GPIO130/I2C2A_DATA/BCM_C_DAT B48
GPIO131/I2C2A_CLK/BCM_C_CLK B49
GPIO132/I2C1G_DATA A47
GPIO140/I2C1G_CLK B50
GPIO141/I2C1F_DATA/I2C2B_DATA B52
GPIO142/I2C1F_CLK/I2C2B_CLK A49
GPIO143/I2C1E_DATA B53
GPIO144/I2C1E_CLK A50
SYSPWR_PRES A59
VCI_IN2# B63
VCI_OUT A60
VCI_IN1# A63
VCI_IN0# B67
VTR_ADC
A58
GPIO157/LED1 B1
GPIO027/GPTP-OUT1 A1
DN1-THERM B13
DP1-VREF_T A13
VSET A17
DN2 B14
DP2 A14
VIN B15
DN3 A15
DP3 B16
VCP A12
DN4 A16
DP4 B17
THERMTRIP2# B34
GPIO002/THERMTRIP3# A2
VTR
B3
VTR
A11
VTR
A26
VTR
B35
VTR
A41
VTR
A52
AGND
B66
VSS
B11
VSS_ADC
B60
VR_CAP
B12
VSS_RO
B54
H_VSS
B18
EP
C1
GPIO026/GPTP-IN1 B28
GPIO025/UART_CLK B27
V_ISYS B61
GPIO014/GPTP-IN7/RC_ID3 B8
R328
100K_0402_5%
R328
100K_0402_5%
12
R374 0_0402_5%@R374 0_0402_5%@
1 2
C371
0.1U_0402_25V6
C371
0.1U_0402_25V6
12
R342@
100K_0402_5%
R342@
100K_0402_5%
1 2
C357
0.1U_0402_25V6
C357
0.1U_0402_25V6
12
R386
1K_0402_5%
R386
1K_0402_5%
12
R36
100K_0402_5%
R36
100K_0402_5%
12
R393
10K_0402_5%
R393
10K_0402_5%
12
Q5A
DMN66D0LDW-7_SOT363-6
Q5A
DMN66D0LDW-7_SOT363-6
1
2
6
C364
22P_0402_50V8J
C364
22P_0402_50V8J
12
C346
0.1U_0402_25V6
C346
0.1U_0402_25V6
12
R335@
10K_0402_5%
R335@
10K_0402_5%
12
R383 1K_0402_5%R383 1K_0402_5%
1 2
R367 1K_0402_5%R367 1K_0402_5%
1 2
E
B
C
Q13
MMBT3904WT1G_SC70-3~D
E
B
C
Q13
MMBT3904WT1G_SC70-3~D
2
3 1
JDEG1
CONN@
HB_A531015-SCHR21
JDEG1
CONN@
HB_A531015-SCHR21
11
22
33
44
55
66
77
88
99
10 10
G1
11
G2
12
R334 0_0402_5%@R334 0_0402_5%@
1 2
R384@
100_0402_1%
R384@
100_0402_1%
12
JLPDE1
CONN@
HB_A531015-SCHR21
JLPDE1
CONN@
HB_A531015-SCHR21
11
22
33
44
55
66
77
88
99
10 10
G1
11
G2
12
R340 10K_0402_5%R340 10K_0402_5%
1 2
D1@
RB751V40_SC76-2
D1@
RB751V40_SC76-2
12
R396
10K_0402_5%
R396
10K_0402_5%
12
C353
0.1U_0402_25V6
C353
0.1U_0402_25V6
12
R4522.2K_0402_5% R4522.2K_0402_5%
12
R400@0_0402_5%R400@0_0402_5%
1 2
E
B
C
Q14
MMBT3904WT1G_SC70-3~D
E
B
C
Q14
MMBT3904WT1G_SC70-3~D
2
3 1
R327
100K_0402_5%
R327
100K_0402_5%
12
RP19
10K_8P4R_5%
RP19
10K_8P4R_5%
1
2
3
4 5
6
7
8
R358@100K_0402_5%R358@100K_0402_5%
1 2
C356
0.1U_0402_25V6
C356
0.1U_0402_25V6
12
R399@
10K_0402_5%
R399@
10K_0402_5%
1 2
RP17
100K_0804_8P4R_5%
RP17
100K_0804_8P4R_5%
1
2
3
4 5
6
7
8
R354@0_0402_5%R354@0_0402_5%
1 2
R373 8.2K_0402_5%@R373 8.2K_0402_5%@
1 2
C345
0.1U_0402_25V6
C345
0.1U_0402_25V6
12
C349
@
0.1U_0402_25V6
C349
@
0.1U_0402_25V6
12
C369
4700P_0402_25V7K
C369
4700P_0402_25V7K
12
RP15
2.2K_0804_8P4R_5%
RP15
2.2K_0804_8P4R_5%
1
2
3
4 5
6
7
8
Q5B
DMN66D0LDW-7_SOT363-6
Q5B
DMN66D0LDW-7_SOT363-6
34
5
E
B
C
Q12
MMST3904-7-F_SOT323-3
E
B
C
Q12
MMST3904-7-F_SOT323-3
1
2
3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EMI depop location
Touch Pad
Place close to JKBTP1
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Keyboard
RSMRST circuit
+5V_ALW_U41
RSMRST#
TP_CLK
TP_CLK
TP_DATA
TP_DATA
+3.3V_TP
+3.3V_TP
+5V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN +3.3V_TP
+5V_ALW
+5V_RUN+3.3V_ALW+3.3V_TP
BC_CLK_ECE1117<37>
BC_INT#_ECE1117<37>
BC_DAT_ECE1117<37>
KB_DET#<12>
PCH_RSMRST#<37>
PCH_RSMRST#_Q <9>
I2C1_SDA_TCH_PAD<12>
CLK_TP_SIO<37>
I2C1_SCL_TCH_PAD<12>
DAT_TP_SIO<37>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Keyboard
38 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Keyboard
38 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Keyboard
38 58Friday, May 17, 2013
Compal Electronics, Inc.
Part Number Description
DA30000GZ00 FPC 0VN LF-9591P REV0 M/B-IO/B
@IO FFC
Part Number Description
DA30000GZ00 FPC 0VN LF-9591P REV0 M/B-IO/B
@IO FFC
Part Number Description
NBX0001CZ00 FFC 15P G P.5 PAD.3 85MM MB-NFC MODU 0VN
@KBTP FFC
Part Number Description
NBX0001CZ00 FFC 15P G P.5 PAD.3 85MM MB-NFC MODU 0VN
@KBTP FFC
U41
RT9818A-44GU3_SC70-3
U41
RT9818A-44GU3_SC70-3
VCC
1
GND
2RESET# 3
R404
4.7K_0402_5%
R404
4.7K_0402_5%
12
R441@0_0402_5%R441@0_0402_5%
1 2
R411
33_0402_5%
R411
33_0402_5%
12
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
@Speak
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
@Speak
C374@
0.1U_0402_25V6
C374@
0.1U_0402_25V6
12
Part Number Description
DC30100MF00 CONN SET 0VN DCJACK-MB 2DW1003-038110F
@DC-IN Cable
Part Number Description
DC30100MF00 CONN SET 0VN DCJACK-MB 2DW1003-038110F
@DC-IN Cable
Part Number Description
NBX0001D100 FFC 6P G P0.5 PAD=0.3 75MM USH/B-FP 0VN
@FP FFC
Part Number Description
NBX0001D100 FFC 6P G P0.5 PAD=0.3 75MM USH/B-FP 0VN
@FP FFC
Part Number Description
NBX0001CW00 FFC 8P G P0.5 PAD0.3 50MM MB-MEDIA/B 0VN
@MEDIA Board FFC
Part Number Description
NBX0001CW00 FFC 8P G P0.5 PAD0.3 50MM MB-MEDIA/B 0VN
@MEDIA Board FFC
Part Number Description
NBX0001CZ00 FFC 15P G P.5 PAD.3 85MM MB-NFC MODU 0VN
@NFC Board FFC
Part Number Description
NBX0001CZ00 FFC 15P G P.5 PAD.3 85MM MB-NFC MODU 0VN
@NFC Board FFC
C387
0.01U_0402_16V7K
C387
0.01U_0402_16V7K
12
C376@
0.1U_0402_25V6
C376@
0.1U_0402_25V6
12
U42
TC7SH08FU_SSOP5~D
U42
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
R444@0_0402_5%R444@0_0402_5%
1 2
R450@0_0402_5%R450@0_0402_5%
1 2
Part Number Description
DC02C004S00 H-CONN SET 0VN MB-LCD-LED-CAM-TS
@eDP TS Cable
Part Number Description
DC02C004S00 H-CONN SET 0VN MB-LCD-LED-CAM-TS
@eDP TS Cable
R440
10K_0402_5%
R440
10K_0402_5%
12
Part Number Description
NBX0001CY00 FFC 20P G P0.5 PAD=0.3 75MM MB-USH/B 0VN
@USH Board FFC
Part Number Description
NBX0001CY00 FFC 20P G P0.5 PAD=0.3 75MM MB-USH/B 0VN
@USH Board FFC
R405
4.7K_0402_5%
R405
4.7K_0402_5%
12
PJP8
PAD-OPEN1x1m
PJP8
PAD-OPEN1x1m
1 2
C379@
10P_0402_50V8J
C379@
10P_0402_50V8J
12
C377@
10P_0402_50V8J
C377@
10P_0402_50V8J
12
R414@0_0402_5%R414@0_0402_5%
1 2
JKBTP1
CONN@
ACES_50506-01641-P01
JKBTP1
CONN@
ACES_50506-01641-P01
1
12
23
34
45
56
67
78
89
910
10 11
11 12
12 13
13 14
14 15
15 16
16
GND1
17 GND2
18
C380@
10P_0402_50V8J
C380@
10P_0402_50V8J
12
C386@
0.1U_0402_25V6
C386@
0.1U_0402_25V6
1 2
R413@0_0402_5%R413@0_0402_5%
1 2
Part Number Description
DC02C004K00 H-CONN SET 0VN MB-HDD
@SATA Cable
Part Number Description
DC02C004K00 H-CONN SET 0VN MB-HDD
@SATA Cable
C375@
0.1U_0402_25V6
C375@
0.1U_0402_25V6
12
Part Number Description
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
@FAN
Part Number Description
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
@FAN
Part Number Description
DC02C004T00 H-CONN SET 0VN MB-LCD-LED-CAM
@eDP Cable
Part Number Description
DC02C004T00 H-CONN SET 0VN MB-LCD-LED-CAM
@eDP Cable
Part Number Description
DC30100MF00 CONN SET 0VN DCJACK-MB 2DW1003-038110F
@RTC BATT
Part Number Description
DC30100MF00 CONN SET 0VN DCJACK-MB 2DW1003-038110F
@RTC BATT
C378@
10P_0402_50V8J
C378@
10P_0402_50V8J
12
R449@0_0402_5%R449@0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+1.05V_MODPHY +3.3V_ALW_PCH/+1.05V_RUN source
+3.3V_SUS/+3.3V_M source
+3.3V_RUN/+5V_RUN source
1.05V_MODPHY_EN
MPHYP_PWR_EN#
RUN_ON
SIO_SLP_S3#
+5V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_SUS
+3.3V_M
+5V_ALW
+3.3V_ALW_PCH
+5V_ALW
+3.3V_ALW
+1.05V_RUN
+1.05V_M
+3.3V_ALW2
+5V_ALW
+1.05V_M +1.05V_MODPHY
+3.3V_ALW
+5V_ALW
SUS_ON<36,43>
SIO_SLP_S4#<36,43,9>
A_ON<37,44>
SIO_SLP_A#<36,44,9>
PCH_ALW_ON<37>
RUN_ON<26,36,37>
USH_PWR_ON<36>
MPHYP_PWR_EN<12>
SIO_SLP_S3#<36,43,9>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Power control
39 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Power control
39 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Power control
39 58Friday, May 17, 2013
Compal Electronics, Inc.
C397 470P_0402_50V7KC397 470P_0402_50V7K
1 2
R426@0_0402_5%R426@0_0402_5%
1 2
C399
0.1U_0402_10V7K
C399
0.1U_0402_10V7K
12
R418@0_0402_5%R418@0_0402_5%
1 2
R421@0_0402_5%R421@0_0402_5%
1 2
C396 0.1U_0402_10V7KC396 0.1U_0402_10V7K
1 2
C403
0.1U_0402_10V7K
C403
0.1U_0402_10V7K
12
Q124A
DMN66D0LDW-7_SOT363-6
Q124A
DMN66D0LDW-7_SOT363-6
1
2
6
C401 470P_0402_50V7KC401 470P_0402_50V7K
1 2
C393
0.1U_0402_10V7K
C393
0.1U_0402_10V7K
1 2
C391 470P_0402_50V7KC391 470P_0402_50V7K
1 2
C402 1000P_0402_50V7KC402 1000P_0402_50V7K
1 2
C389 0.1U_0402_10V7KC389 0.1U_0402_10V7K
1 2
R420@0_0402_5%R420@0_0402_5%
1 2
R442
100K_0402_5%
R442
100K_0402_5%
12
C412
2200P_0402_50V7K
C412
2200P_0402_50V7K
12
S
G
D
Q125
SI3456DDV-T1-GE3_TSOP6
S
G
D
Q125
SI3456DDV-T1-GE3_TSOP6
1
2
3
45
6
R424@0_0402_5%R424@0_0402_5%
1 2
R423@0_0402_5%R423@0_0402_5%
1 2
R445
10K_0402_5%
R445
10K_0402_5%
12
R447@
20K_0402_5%
R447@
20K_0402_5%
12
Q124B
DMN66D0LDW-7_SOT363-6
Q124B
DMN66D0LDW-7_SOT363-6
34
5
R416@0_0402_5%R416@0_0402_5%
1 2
C398 470P_0402_50V7KC398 470P_0402_50V7K
1 2
U46
TPS22966DPUR_SON14_2X3
U46
TPS22966DPUR_SON14_2X3
VIN1
1
VIN1
2
ON1
3
VBIAS
4
ON2
5
VIN2
6
VIN2
7VOUT2 8
VOUT2 9
CT2 10
GND 11
CT1 12
VOUT1 13
VOUT1 14
GPAD 15
U45
TPS22966DPUR_SON14_2X3
U45
TPS22966DPUR_SON14_2X3
VIN1
1
VIN1
2
ON1
3
VBIAS
4
ON2
5
VIN2
6
VIN2
7VOUT2 8
VOUT2 9
CT2 10
GND 11
CT1 12
VOUT1 13
VOUT1 14
GPAD 15
R417@0_0402_5%R417@0_0402_5%
1 2
R422@0_0402_5%R422@0_0402_5%
1 2
R439@0_0402_5%R439@0_0402_5%
1 2
C413
10U_0603_6.3V6M
C413
10U_0603_6.3V6M
12
R425@0_0402_5%R425@0_0402_5%
1 2
C400 0.1U_0402_10V7KC400 0.1U_0402_10V7K
1 2
U43
TPS22966DPUR_SON14_2X3
U43
TPS22966DPUR_SON14_2X3
VIN1
1
VIN1
2
ON1
3
VBIAS
4
ON2
5
VIN2
6
VIN2
7VOUT2 8
VOUT2 9
CT2 10
GND 11
CT1 12
VOUT1 13
VOUT1 14
GPAD 15
C390 470P_0402_50V7KC390 470P_0402_50V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Place LED1 close to SW5
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
0
1 0
X
LED Circuit Control Table
Do not Mask LEDs (Lid Opened) 11
HDD LED solution for White LED
WLAN LED solution for White LED
POWER & INSTANT ON SWITCH Media board CONN
Battery LED
Breath LED
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EMI CLIP
Fiducial Mark
BAT1_LED#_Q
BAT2_LED#_Q BATT_WHITE#
BATT_YELLOW#
BREATH_LED#_Q BREATH_WHITE_LED_SNIFF
MASK_BASE_LEDS#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
SATA_LED
SYS_LED_MASK#
WLAN_LED
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
+5V_ALW
+3.3V_ALW
+5V_ALW
BREATH_LED#<34,36>
BREATH_WHITE_LED# <22>
SYS_LED_MASK#<36>
LID_CL#<35,36>
WIRELESS_LED#<31,36>
SATA_ACT#<6>
LED_SATA_DIAG_OUT#<36>
MASK_SATA_LED#<36>
BAT2_LED#<36>
BAT1_LED#<36>
BATT_WHITE_LED# <22>
BATT_YELLOW_LED# <22>
POWER_SW #_MB<37,9>
PANEL_HDD_LED# <22>
MASK_BASE_LEDS# <28>
VOL_UP<37>
VOL_DOWN<37>
VOL_MUTE<37>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PAD, LED
40 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PAD, LED
40 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PAD, LED
40 58Friday, May 17, 2013
Compal Electronics, Inc.
R434 330_0402_5%R434 330_0402_5%
1 2
Q28A
DMN66D0LDW-7_SOT363-6
Q28A
DMN66D0LDW-7_SOT363-6
1
2
6
H2@
H_2P8
H2@
H_2P8
1
CLIP1
EMI_CLIP
CLIP1
EMI_CLIP
GND 1
H11@
H_3P8
H11@
H_3P8
1
LED1
LTW-193ZDS5_W HITE
LED1
LTW-193ZDS5_W HITE
1 2
FD3@
FIDUCIAL MARK~D
FD3@
FIDUCIAL MARK~D
1
Q16
PDTA114EU_SC70-3
Q16
PDTA114EU_SC70-3
1
2
3
H5@
H_2P8
H5@
H_2P8
1
ST2@
CLIP_C5P5
ST2@
CLIP_C5P5
1
Q28B
DMN66D0LDW-7_SOT363-6
Q28B
DMN66D0LDW-7_SOT363-6
34
5
LED5
LTW-193ZDS5_W HITE
LED5
LTW-193ZDS5_W HITE
12
H21@
H_1P0N
H21@
H_1P0N
1
H22@
H_1P0N
H22@
H_1P0N
1
Q23A
DMN66D0LDW-7_SOT363-6
Q23A
DMN66D0LDW-7_SOT363-6
1
2
6
R435 390_0402_5%R435 390_0402_5%
1 2
FD2@
FIDUCIAL MARK~D
FD2@
FIDUCIAL MARK~D
1
JMEDIA
CONN@
ACES_50506-00641-P01
JMEDIA
CONN@
ACES_50506-00641-P01
1
1
2
2
3
3
4
4
5
5
6
6GND 7
GND 8
C404@
0.1U_0402_25V6
C404@
0.1U_0402_25V6
1 2
H18@
H_2P8
H18@
H_2P8
1
SW1
SKRBAAE010_4P
SW1
SKRBAAE010_4P
1
3
2
4
H6@
H_3P1
H6@
H_3P1
1
R430 330_0402_5%R430 330_0402_5%
1 2
R431 330_0402_5%R431 330_0402_5%
1 2
H14@
H_2P3
H14@
H_2P3
1
H4@
H_2P8
H4@
H_2P8
1
FD1@
FIDUCIAL MARK~D
FD1@
FIDUCIAL MARK~D
1
R433 330_0402_5%R433 330_0402_5%
1 2
D23
RB751S40T1G_SOD523-2
D23
RB751S40T1G_SOD523-2
1 2
H15@
H_2P8
H15@
H_2P8
1
W
Y
LED7
LTW-295DSKS-5A_YEL-WHITE
W
Y
LED7
LTW-295DSKS-5A_YEL-WHITE
1 2
3 4
R432
100K_0402_5%
R432
100K_0402_5%
12
H10@
H_3P8
H10@
H_3P8
1
Q25B
DMN66D0LDW-7_SOT363-6
Q25B
DMN66D0LDW-7_SOT363-6
34
5
R436 220_0402_5%R436 220_0402_5%
1 2
H3@
H_3P1
H3@
H_3P1
1
H24@
H_2P1X2P6
H24@
H_2P1X2P6
1
R429 220_0402_5%R429 220_0402_5%
1 2
R427 390_0402_5%R427 390_0402_5%
1 2
H9@
H_3P8
H9@
H_3P8
1
H1@
H_2P8
H1@
H_2P8
1
H23@
H_2P1
H23@
H_2P1
1
H12@
H_5P0
H12@
H_5P0
1
LED6
LTW-193ZDS5_W HITE
LED6
LTW-193ZDS5_W HITE
12
Q15
PDTA114EU_SC70-3
Q15
PDTA114EU_SC70-3
1
2
3
U47
TC7SH08FU_SSOP5~D
U47
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
ST1@
CLIP_C5P5
ST1@
CLIP_C5P5
1
H19@
H_2P8
H19@
H_2P8
1
Q26
PDTA114EU_SC70-3
Q26
PDTA114EU_SC70-3
1
2
3
Q25A
DMN66D0LDW-7_SOT363-6
Q25A
DMN66D0LDW-7_SOT363-6
1
2
6
Q24A
DMN66D0LDW-7_SOT363-6
Q24A
DMN66D0LDW-7_SOT363-6
1
2
6
H16@
H_2P8
H16@
H_2P8
1
H8@
H_3P8
H8@
H_3P8
1
R428
10K_0402_5%
R428
10K_0402_5%
12
D24
RB751S40T1G_SOD523-2
D24
RB751S40T1G_SOD523-2
1 2
Q24B
DMN66D0LDW-7_SOT363-6
Q24B
DMN66D0LDW-7_SOT363-6
34
5
Q23B
DMN66D0LDW-7_SOT363-6
Q23B
DMN66D0LDW-7_SOT363-6
34
5
H13@
H_2P8
H13@
H_2P8
1
H17@
H_2P8
H17@
H_2P8
1
R438 150_0402_5%R438 150_0402_5%
1 2
FD4@
FIDUCIAL MARK~D
FD4@
FIDUCIAL MARK~D
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
DC_IN+ Source
COIN RTC Battery
Primary Battery Connector
change from 0603 to 0402 size PN: SM010028600
NB_PSID_TS5A63157
+DC_IN
NB_PSID
+DCIN_JACK
-DCIN_JACK
Z4012
PBATT+_C
Z4304
Z4306
Z4305
+3.3V_ALW
+5V_ALW
+DC_IN_SS
+DC_IN
+5V_ALW
+COINCELL
+RTC_CELL
+3.3V_RTC_LDO
+COINCELL
GND
+5V_ALW
+3.3V_ALW
GND
+PBATT
PSID_DISABLE# <36>
DOCK_PSID<34> GPIO_PSID_SELECT <36>
PS_ID <37>
SOFT_START_GC <48>
PBAT_PRES# <36,48>
PBAT_SMBCLK <37>
PBAT_SMBDAT <37>
DOCK_SMB_ALERT# <34,36,48>
SLICE_BAT_PRES#<34,36,48>
AC_DIS <36,48>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+DCIN
41 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+DCIN
41 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+DCIN
41 57Friday, May 17, 2013
Compal Electronics, Inc.
PR17
10K_0402_5%~D
PR17
10K_0402_5%~D
1 2
PQ4
FDMC6679AZ_MLP8-5
PQ4
FDMC6679AZ_MLP8-5
3 5
2
4
1
PQ6B
DCX124EK-7-F PNP/NPN_SC74-6~D
PQ6B
DCX124EK-7-F PNP/NPN_SC74-6~D
2
4 3
PJPDC1
ACES_50299-00501-003
@
PJPDC1
ACES_50299-00501-003
@
11
22
33
44
55
GND 6
GND 7
PR18
1M_0402_5%~D
PR18
1M_0402_5%~D
12
PD1
TVNST52302AB0_SOT523-3
PD1
TVNST52302AB0_SOT523-3
2
3
1
PC2
0.1U_0603_25V7K~D
@
PC2
0.1U_0603_25V7K~D
@
12
PJP1
PAD-OPEN 1x3m
PJP1
PAD-OPEN 1x3m
1 2
PD4
SDMK0340L-7-F_SOD323-2~D
PD4
SDMK0340L-7-F_SOD323-2~D
1 2
PR12
15K_0402_1%~D
PR12
15K_0402_1%~D
1 2
PC5
0.022U_0805_50V7K~D
PC5
0.022U_0805_50V7K~D
1 2
PC3
2200P_0402_50V7K~D
PC3
2200P_0402_50V7K~D
12
PD3
BAS40CW SOT-323
PD3
BAS40CW SOT-323
2
3
1
PC11
0.1U_0603_25V7K~D
@
PC11
0.1U_0603_25V7K~D
@
12
PR14
1M_0402_5%~D
PR14
1M_0402_5%~D
12
PL1
FBMJ4516HS720NT_2P~D
PL1
FBMJ4516HS720NT_2P~D
1 2
PC9
1000P_0603_50V7K~D
PC9
1000P_0603_50V7K~D
12
PR10
100K_0402_1%~D
PR10
100K_0402_1%~D
1 2
PC4
1500P_0402_7K~D
PC4
1500P_0402_7K~D
12
2
1
3
PQ1
ME2301D-G 1P SOT-23-3
2
1
3
PQ1
ME2301D-G 1P SOT-23-3
2
1 3
PR2
100K_0402_5%~D
PR2
100K_0402_5%~D
12
PR9
33_0402_5%~D
PR9
33_0402_5%~D
1 2
PU111
TS5A63157DCKR_SC70-6~D
PU111
TS5A63157DCKR_SC70-6~D
V+ 5
NC
3COM 4
GND
2
IN 6
NO
1
JRTC1
TYCO_2-1775293-2~D
@
JRTC1
TYCO_2-1775293-2~D
@
1
1
2
2G4
G3
PR16
4.7K_0805_5%~D
@
PR16
4.7K_0805_5%~D
@
12
PL4
FBMJ4516HS720NT_2P~D
PL4
FBMJ4516HS720NT_2P~D
1 2
PL2
FBMJ4516HS720NT_2P~D
PL2
FBMJ4516HS720NT_2P~D
1 2
PC6
0.1U_0603_25V7K~D
@
PC6
0.1U_0603_25V7K~D
@
12
G
D
S
PQ2
FDV301N_G_NL_SOT23-3~D
G
D
S
PQ2
FDV301N_G_NL_SOT23-3~D
2
1 3
PC1
1U_0603_10V4Z~D
PC1
1U_0603_10V4Z~D
1
2
PR13
10K_0402_5%~D
@
PR13
10K_0402_5%~D
@
1 2
E
B
C
PQ3
MMST3904-7-F_SOT323~D
E
B
C
PQ3
MMST3904-7-F_SOT323~D
2
3 1
PRP2
100_0804_8P4R_5%
PRP2
100_0804_8P4R_5%
18
27
36
45
PC7
0.1U_0603_25V7K~D
@
PC7
0.1U_0603_25V7K~D
@
12
PR7
0_0402_5%~D
@
PR7
0_0402_5%~D
@
1 2
PR11
10K_0402_1%~D
PR11
10K_0402_1%~D
12
PBATT1
LLTOP_ALLTOP C144LS-109A9-L 9P BATT P2
@
PBATT1
LLTOP_ALLTOP C144LS-109A9-L 9P BATT P2
@
11
33
44
55
66
88
99
22
77
GND 10
GND 11
PQ6A
DCX124EK-7-F PNP/NPN_SC74-6~D
PQ6A
DCX124EK-7-F PNP/NPN_SC74-6~D
5
16
PR1
1K_0402_5%~D
PR1
1K_0402_5%~D
12
PD5
DA204U_SOT323~D
@
PD5
DA204U_SOT323~D
@
2
3
1
PC12
0.1U_0603_25V7K~D
@
PC12
0.1U_0603_25V7K~D
@
12
PR15
100K_0402_5%~D
PR15
100K_0402_5%~D
12
PC8
0.1U_0603_25V7K~D
@
PC8
0.1U_0603_25V7K~D
@
12
PR8
2.2K_0402_5%~D
PR8
2.2K_0402_5%~D
1 2
PR6
0_0402_5%
@
PR6
0_0402_5%
@
1 2
PD2
TVNST52302AB0_SOT523-3
PD2
TVNST52302AB0_SOT523-3
2
3
1
PD6
VZ0603M260APT_0603
@
PD6
VZ0603M260APT_0603
@
1
2
PC10
10U_0805_25V6K
PC10
10U_0805_25V6K
12
PL3
BLM15AG102SN1D_2P
PL3
BLM15AG102SN1D_2P
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5VALWP
TDC 4.88 A
Peak Current 6.89 A
OCP Current 8.268 A
Rds(on):13.6m ohm (max)
3VALWP
TDC 6.7 A
Peak Current 8.1 A
OCP Current 9.72 A
Rds(on): 13.6m ohm (max)
20130510:
PC113_X76 to control
X7651731L21 for ECAP MAIN
X7651731L22 for ECAP 2ND
20130510:
PC115_X76 to control
X7651731L21 for ECAP MAIN
X7651731L22 for ECAP 2ND
LG_3V
EN
SW1
PGOOD_3V_5V
UG_5V
BST_5V
LG_5V
EN
BST_3V
UG_3V
SW2
EN
+3.3V_ALW2
+DC1_PWR_SRC
+5V_ALWP
+DC1_PWR_SRC
+DC1_PWR_SRC
+3.3V_ALWP
+PWR_SRC
+5V_ALW2
+3.3V_RTC_LDO
+5V_ALWP
+3.3V_ALW
+5V_ALW
+3.3V_ALWP
+3.3V_ALW
ALWON<37>
ALW_PWRGD_3V_5V<37>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+5V_ALW/3.3V_ALW
42 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+5V_ALW/3.3V_ALW
42 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+5V_ALW/3.3V_ALW
42 57Friday, May 17, 2013
Compal Electronics, Inc.
PR110
2.2_0603_5%
PR110
2.2_0603_5%
1 2
PR102
10K_0402_5%~D
PR102
10K_0402_5%~D
1 2
PC114
680P_0603_50V7K
@
PC114
680P_0603_50V7K
@
12
PR101
15K_0402_1%
PR101
15K_0402_1%
12
PR112
4.7_1206_5%
@
PR112
4.7_1206_5%
@
12
PR107
100K_0402_1%~D
PR107
100K_0402_1%~D
1 2
PC103
10U_0805_25V6K
@
PC103
10U_0805_25V6K
@
12
+
PC115
220U_6.3V_R18M
@
+
PC115
220U_6.3V_R18M
@
1
2
PL100
1UH_PCMB053T-1R0MS_7A_20%
PL100
1UH_PCMB053T-1R0MS_7A_20%
12
PR114
200_0402_1%
PR114
200_0402_1%
12
PR105
20K_0402_1%~D
PR105
20K_0402_1%~D
1 2
PC111
680P_0603_50V7K
@
PC111
680P_0603_50V7K
@
12
PJP101
PAD-OPEN 1x3m
PJP101
PAD-OPEN 1x3m
1 2
PR100
6.49K_0402_1%~D
PR100
6.49K_0402_1%~D
1 2
PC107
10U_0805_25V6K
PC107
10U_0805_25V6K
12
PQ101
FDMC8884_POWER33-8-5
PQ101
FDMC8884_POWER33-8-5
3 5
2
4
1
PQ102
FDMC7692S_POWER33-8-5
PQ102
FDMC7692S_POWER33-8-5
3 5
2
4
1
PQ103
FDMC7692S_POWER33-8-5
PQ103
FDMC7692S_POWER33-8-5
3 5
2
4
1
PR106
16.9K_0402_1%
PR106
16.9K_0402_1%
1 2
PJP102
PAD-OPEN 1x3m
PJP102
PAD-OPEN 1x3m
1 2
PC116
0.1U_0603_25V7K
@
PC116
0.1U_0603_25V7K
@
12
+
PC113
220U_6.3V_R18M
@
+
PC113
220U_6.3V_R18M
@
1
2
PC117
0.1U_0603_25V7K
PC117
0.1U_0603_25V7K
12
PJP100
PAD-OPEN 1x3m
@
PJP100
PAD-OPEN 1x3m
@
1 2
PC112
0.1U_0603_25V7K
@
PC112
0.1U_0603_25V7K
@
12
PR104
10K_0402_5%~D
PR104
10K_0402_5%~D
12
PR103
0_0402_5%
@
PR103
0_0402_5%
@
1 2
PC106
2200P_0402_50V7K
@
PC106
2200P_0402_50V7K
@
12
PC108
0.1U_0402_25V6
@
PC108
0.1U_0402_25V6
@
12
PQ100
FDMC8884_POWER33-8-5
PQ100
FDMC8884_POWER33-8-5
3 5
2
4
1
PC101
0.1U_0402_25V6
@
PC101
0.1U_0402_25V6
@
12
PL102
3.3UH_ETQP3W3R3WFN_7A_20%
PL102
3.3UH_ETQP3W3R3WFN_7A_20%
1 2
PC100
4.7U_0603_10V6K
PC100
4.7U_0603_10V6K
12
PC104
10U_0805_25V6K
@
PC104
10U_0805_25V6K
@
12
PC109
0.1U_0603_25V7K
PC109
0.1U_0603_25V7K
1 2
PR108
0_0402_5%
@
PR108
0_0402_5%
@
1 2
PC119
1U_0603_10V6K
@
PC119
1U_0603_10V6K
@
12
PC105
2200P_0402_50V7K
@
PC105
2200P_0402_50V7K
@
12
TPS51285BRUKR QFN 20P
PU100
TPS51285BRUKR QFN 20P
PU100
CS1 1
VFB1 2
VREG3 3
VFB2 4
CS2 5
EN2
6
PGOOD
7
SW2
8
VBST2
9
DRVH2
10
DRVL2
11
VIN
12
VREG5
13
VO1 14
DRVL1
15
DRVH1 16
VBST1 17
SW1 18
VCLK 19
EN1
20
PAD 21
PR113
0_0402_5%
@
PR113
0_0402_5%
@
12
PR109
2.2_0603_5%
PR109
2.2_0603_5%
1 2
PL101
2.2UH_ETQP3W2R2WFN_8.5A_20%
PL101
2.2UH_ETQP3W2R2WFN_8.5A_20%
12
PC102
10U_0805_25V6K
PC102
10U_0805_25V6K
12
PC110
0.1U_0603_25V7K
PC110
0.1U_0603_25V7K
1 2
PC118
4.7U_0603_10V6K
PC118
4.7U_0603_10V6K
12
PR111
4.7_1206_5%
@
PR111
4.7_1206_5%
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
OCP Current 0.9A
Mode S3 S5 +1.5V_MEN +V_DDR_REF +0.75V_P
S5 L L off off off
S3 L H on on off(Hi-Z)
S0 H H on on on
FB sense trace
FB sense trace
when FB pull down to GND
1.35Volt +/- 5%
TDC: 7.2 A
Peak Current: 10 A
OCP current: 12 A
Rds(on): 13.6m ohm(max)
20130510:
PC207_X76 to control
X7651731L21 for ECAP MAIN
X7651731L22 for ECAP 2ND
DH_1.35V
SW _1.35V
CS_1.35V
1.35V_SUS_PWRGD
1.35V_B+
VDD_1.35V
+VLDOIN_1.35V
S5_1.35V
SNUB_1.35V
BOOT_1.35V
1.35V_B+
+V_DDR_REF
1.35V_FB
+1.35V_MEN_P
DL_1.35V
+1.35V_MEN_P +1.35V_MEM +0.675V_DDR_VTT
+0.675V_P
+PWR_SRC
+5V_ALW
+5V_ALW
+1.35V_MEN_P
+0.675V_P
+3.3V_ALW
+1.35V_MEN_P
+V_DDR_REF
+1.35V_MEN_P
0.675V_DDR_VTT_ON<18>
1.35V_SUS_PWRGD<37>
SIO_SLP_S4#<36,39,9>
SUS_ON<36,39>
SIO_SLP_S3#<36,39,9>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+1.35V_MEN/+0.675V_DDR_VTT
43 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+1.35V_MEN/+0.675V_DDR_VTT
43 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+1.35V_MEN/+0.675V_DDR_VTT
43 57Friday, May 17, 2013
Compal Electronics, Inc.
PC209
1U_0603_10V6K~D
PC209
1U_0603_10V6K~D
PC211
1U_0603_10V6K~D
PC211
1U_0603_10V6K~D
PQ201
FDMC7692S_POW ER33-8-5
PQ201
FDMC7692S_POW ER33-8-5
3 5
2
4
1
PQ200
FDMC8884_POW ER33-8-5
PQ200
FDMC8884_POW ER33-8-5
3 5
2
4
1
PR204
100K_0402_1%~D
PR204
100K_0402_1%~D
12
PR207
0_0402_5%~D
@
PR207
0_0402_5%~D
@
1 2
PC203
2200P_0402_50V7K~D
@
PC203
2200P_0402_50V7K~D
@
12
PJP200
PAD-OPEN 1x2m~D
PJP200
PAD-OPEN 1x2m~D
2 1
PR205
8.06K_0402_1%~D
PR205
8.06K_0402_1%~D
12
PC200
4.7U_0805_25V6K~D
PC200
4.7U_0805_25V6K~D
12
PC204
0.22U_0603_16V7K~D
PC204
0.22U_0603_16V7K~D
1 2
PC214
0.1U_0402_16V7K~D
@
PC214
0.1U_0402_16V7K~D
@
12
PR206
1M_0402_1%~D
PR206
1M_0402_1%~D
1 2
PC212
0.033U_0402_16V7~D
PC212
0.033U_0402_16V7~D
PR208
0_0402_5%
@
PR208
0_0402_5%
@
1 2
PJP204
JUMP_1x3m
PJP204
JUMP_1x3m
11
2
2
PC202
0.1U_0402_25V6
@
PC202
0.1U_0402_25V6
@
12
PC215
0.1U_0402_16V7K~D
@
PC215
0.1U_0402_16V7K~D
@
12
PU11
RT8207MZQW_WQFN20_3X3
PU11
RT8207MZQW_WQFN20_3X3
VTTSNS 2
FB
6
S5
8
PGOOD
10
VDDP
12
PHASE 16
BOOT 18
VTTREF 4
PGND
14
VTTGND 1
GND 3
VDDQ 5
S3
7
TON
9
VDD
11
CS
13
LGATE
15
UGATE 17
VTT 20
VLDOIN 19
PAD 21
PR202
5.1_0603_5%~D
PR202
5.1_0603_5%~D
1 2
PJP203
JUMP_1x3m
PJP203
JUMP_1x3m
11
2
2
PC201
4.7U_0805_25V6K~D
PC201
4.7U_0805_25V6K~D
12
PR209
10K_0402_1%
PR209
10K_0402_1%
1 2
PC205
22U_0805_6.3V6M
PC205
22U_0805_6.3V6M
12
PR203
4.7_1206_5%
@
PR203
4.7_1206_5%
@
12
+
PC207
330U_2.5V_ESR16M
@
+
PC207
330U_2.5V_ESR16M
@
1
2
PL200
1UH_PCMB063T-1R0MS_12A_20%
PL200
1UH_PCMB063T-1R0MS_12A_20%
1 2
PC213
100P_0402_50V8J~D
PC213
100P_0402_50V8J~D
12
PR211
0_0402_5%~D
@
PR211
0_0402_5%~D
@
1 2
PR201
23.7K_0402_1%
PR201
23.7K_0402_1%
1 2
PJP202
PAD-OPEN1x1m
PJP202
PAD-OPEN1x1m
12
PJP201
PAD-OPEN1x1m
PJP201
PAD-OPEN1x1m
12
PC208
680P_0603_50V7K
@
PC208
680P_0603_50V7K
@
12
PR210
0_0402_5%
@
PR210
0_0402_5%
@
1 2
PR200
2.2_0603_5%~D
PR200
2.2_0603_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05Volt +/- 5%
TDC 3.67 A
Peak Current 5.25 A
OCP current 6.3 A
Rds(on): 13.6m ohm (max)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
S0 mode be high level
BST_+V1.05SP
SW_+V1.05SP
UG_+V1.05SP
LG_+V1.05SP
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
+V1.05SP_B+
+PWR_SRC
+5V_ALW
+1.05V_MP
+1.05V_MP +1.05V_M
+3.3V_ALW
SIO_SLP_A#<36,39,9>
1.05V_A_PWRGD<37>
A_ON<37,39>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+1.05V_M
44 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+1.05V_M
44 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+1.05V_M
44 57Friday, May 17, 2013
Compal Electronics, Inc.
PC303
10U_0805_25V
PC303
10U_0805_25V
12
PR300
100K_0402_1%~D
PR300
100K_0402_1%~D
12
PJP300
PAD-OPEN 1x2m~D
PJP300
PAD-OPEN 1x2m~D
2 1
PR306
4.7_1206_5%
@
PR306
4.7_1206_5%
@
12
PR308
10K_0402_1%
PR308
10K_0402_1%
1 2
PC301
2200P_0402_50V7K
@
PC301
2200P_0402_50V7K
@
12
PC300
0.1U_0402_25V6
@
PC300
0.1U_0402_25V6
@
12
PC302
4.7U_0805_25V6K~D
@
PC302
4.7U_0805_25V6K~D
@
12
PQ301
FDMC7692S_POWER33-8-5
PQ301
FDMC7692S_POWER33-8-5
3 5
2
4
1
PQ300
FDMC8884_POWER33-8-5
PQ300
FDMC8884_POWER33-8-5
3 5
2
4
1
PR305
470K_0402_1%
PR305
470K_0402_1%
12
PR301
2.2_0603_5%
PR301
2.2_0603_5%
1 2
PR304
0_0402_5%
@
PR304
0_0402_5%
@
1 2
PU300
TPS51212DSCR_SON10_3X3
PU300
TPS51212DSCR_SON10_3X3
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
RF
5
VFB
4
PGOOD
1
TP 11
PC304
0.1U_0603_25V7K
PC304
0.1U_0603_25V7K
1 2
PJP301
PAD-OPEN 1x2m~D
PJP301
PAD-OPEN 1x2m~D
2 1
PR307
4.99K_0402_1%
PR307
4.99K_0402_1%
12
PL300
2.2UH_ETQP3W2R2WFN_8.5A_20%
PL300
2.2UH_ETQP3W2R2WFN_8.5A_20%
1 2
PR302
95.3K_0402_1%
PR302
95.3K_0402_1%
1 2
+
PC307
220U_B2_2.5VM_R15M
+
PC307
220U_B2_2.5VM_R15M
1
2
PC305
1U_0402_6.3V6K~D
PC305
1U_0402_6.3V6K~D
12
PC308
0.1U_0402_16V7K
@
PC308
0.1U_0402_16V7K
@
12
PC306
680P_0603_50V7K
@
PC306
680P_0603_50V7K
@
12
PR303
0_0402_5%~D
@
PR303
0_0402_5%~D
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Chief River VC
1.5VSP
+3.3V_RUN
+1.5V_THERMAL
+5V_ALW
+3.3V_RUN
+3.3V_ALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.4
+1.05VS_VTTP/+1.0VSP
Custom
45 57Friday, May 17, 2013
<Issued_Date> <Deciphered_Date>
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.4
+1.05VS_VTTP/+1.0VSP
Custom
45 57Friday, May 17, 2013
<Issued_Date> <Deciphered_Date>
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.4
+1.05VS_VTTP/+1.0VSP
Custom
45 57Friday, May 17, 2013
<Issued_Date> <Deciphered_Date>
Compal Electronics, Inc.
PC402
0.1U_0402_16V7K
@
PC402
0.1U_0402_16V7K
@
12
PC400
1U_0402_6.3V6K
PC400
1U_0402_6.3V6K
12
PU400
APL5930KAI-TRG_SO8
PU400
APL5930KAI-TRG_SO8
GND
1
VOUT 4
POK
7
EN
8
VCNTL 6
VIN 5
VOUT 3
FB 2
VIN 9
PC404
22U_0805_6.3V6M
PC404
22U_0805_6.3V6M
12
PR400
100K_0402_5%~D
PR400
100K_0402_5%~D
1 2
PR401
47K_0402_5%
@
PR401
47K_0402_5%
@
12
PR403
1.74K_0402_1%
PR403
1.74K_0402_1%
12
PC403
0.01U_0402_25V7K
PC403
0.01U_0402_25V7K
12
PJP401
PAD-OPEN1x1m
PJP401
PAD-OPEN1x1m
12
PJP400
PAD-OPEN1x1m
PJP400
PAD-OPEN1x1m
12
PJP402
PAD-OPEN1x1m
@
PJP402
PAD-OPEN1x1m
@
12
PC401
4.7U_0805_6.3V6K
PC401
4.7U_0805_6.3V6K
12
PR402
1.54K_0402_1%
PR402
1.54K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
TI recommend 1nF
from processor
CPU
TDC 10 A
Peak Current 32 A
OCP Current 38.4 A
DCR: 0.82m +-5% ohm
PH500 B value: 4250k 1%
PH501 B value: 3435k 1%
20120911 TI-Alex Note: Although there is no pulse-overlap in 1-phase mode, during USR, the pulse comes in immediately.
So, the problem with PR504 = DNP is that if there is a high ripple, and USR is faultily detected, you will get a double-pulse.
So, we want to make sure USR is not active if it is not necessary. So, I moved it all the way to highest level so PR504 works to 8.87k.
O-USR
PWM1
CSP1
CSN1
IMON
OCP-I
+VCC_PWR_SRC
VFB
GFB
SLEWA
VREF
B-RAMP
VIDALERT_N
VIDSCLK
VFB
GFB
SKIP#
PWM1
F-IMAX
VIDSOUT
+VCC_PWR_SRC
VR_HOT#
CSN1
CSP1
VREF
SKIP#SKIP#1
+VCC_CORE
+3.3V_RUN
+5V_RUN
+5V_ALW
+3.3V_RUN
+3.3V_RUN
+1.05V_VCCST
+PWR_SRC
+3.3V_RUN
H_PROCHOT#<37,47,48,9>
VCCSENSE<15>
VSSSENSE<17>
IMVP_VR_ON <36>
IMVP_PWRGD <36>
VIDALERT_N<15>
VIDSCLK<15>
H_VR_EN <15>
H_VR_READY <15>
VIDSOUT<15>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+VCC_CORE
46 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+VCC_CORE
46 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+VCC_CORE
46 57Friday, May 17, 2013
Compal Electronics, Inc.
PR522
4.7_1206_5%~D
@
PR522
4.7_1206_5%~D
@
12
PC734
10U_0805_25V6K
PC734
10U_0805_25V6K
12
PC504
0.1U_0402_25V6
PC504
0.1U_0402_25V6
1 2
PC508
680P_0603_50V7K~D
@
PC508
680P_0603_50V7K~D
@
12
PC731
10U_0805_25V6K
PC731
10U_0805_25V6K
12
PC510
1U_0603_10V7K~D
PC510
1U_0603_10V7K~D
1 2
PH501
10K_0402_1%_TSM0A103F34D1RZ
PH501
10K_0402_1%_TSM0A103F34D1RZ
12
PU501
CSD97374CQ4M_SON8_3P5X4P5
PU501
CSD97374CQ4M_SON8_3P5X4P5
PGND1 3
VDD 2
SKIP# 1
VSW 4
PWM
8
VIN
5
BOOT
7
BOOT_R
6
PGND2
9
PR515
3.01K_0402_1%
PR515
3.01K_0402_1%
12
PR506
75K_0402_1%
PR506
75K_0402_1%
1 2
PC732
10U_0805_25V6K
PC732
10U_0805_25V6K
12
PR517
0_0603_5%~D
PR517
0_0603_5%~D
12
PC509
1U_0603_10V7K~D
PC509
1U_0603_10V7K~D
1 2
PR535
4.87K_0402_1%
PR535
4.87K_0402_1%
1 2
PC511
0.1U_0402_25V6
PC511
0.1U_0402_25V6
12
PC512
1500P_0402_50V7K
PC512
1500P_0402_50V7K
1 2
PC503
1000P_0402_50V7K~D
PC503
1000P_0402_50V7K~D
1 2
PC507
0.33U_0603_10V7K~D
PC507
0.33U_0603_10V7K~D
1 2
PR540
0_0402_5%
@PR540
0_0402_5%
@
12
PR503
1M_0402_1%
PR503
1M_0402_1%
1 2
PL500
0.22UH_FDUE0640J-H-R22M=P3_25A_20%
PL500
0.22UH_FDUE0640J-H-R22M=P3_25A_20%
1
3
4
2
PR523
10K_0402_5%~D
PR523
10K_0402_5%~D
1 2
PL501
FBMA-L11-453215-121LMA90T
PL501
FBMA-L11-453215-121LMA90T
1 2
PR539
0_0402_5%
@PR539
0_0402_5%
@
12
PR520
0_0402_5%@
PR520
0_0402_5%@
1 2
PR528
75_0402_1%
@
PR528
75_0402_1%
@
12
+
PC739
330U_2.5V_ESR17M
@
+
PC739
330U_2.5V_ESR17M
@
1
2
PC502
0.068U_0402_16V7K
PC502
0.068U_0402_16V7K
1 2
PR534
0_0402_5%
@
PR534
0_0402_5%
@
12
PC736
10U_0805_25V6K
PC736
10U_0805_25V6K
12
PC514
47P_0402_50V8J~D
PC514
47P_0402_50V8J~D
1 2
PJP500
PAD-OPEN 4x4m
@PJP500
PAD-OPEN 4x4m
@
1 2
PR527
54.9_0402_1%
PR527
54.9_0402_1%
12
PR510
39K_0402_5%~D
PR510
39K_0402_5%~D
1 2
PR519
1_0603_5%
PR519
1_0603_5%
12
PR521
2.32K_0402_1%
PR521
2.32K_0402_1%
1 2
PH500
100K_0402_1%_NCP15WF104F03RC
PH500
100K_0402_1%_NCP15WF104F03RC
12
PR502
75_0402_1%
@
PR502
75_0402_1%
@
1 2
PR532
0_0402_5%
@PR532
0_0402_5%
@
12
PR500
75_0402_1%
@PR500
75_0402_1%
@
1 2
PR516
1.91K_0402_1%~D
@PR516
1.91K_0402_1%~D
@
1 2
PC500
4700P_0603_50V7K
PC500
4700P_0603_50V7K
1 2
PR536
0_0402_5%
@PR536
0_0402_5%
@
12
PR512
2.1K_0402_1%~D
PR512
2.1K_0402_1%~D
12
PC505
1U_0603_10V6K
PC505
1U_0603_10V6K
1 2
PU500
TPS51622RSM
PU500
TPS51622RSM
SLEWA 15
VBAT 16
THERM 14
GFB
23
PU3
21
COMP
26
VCLK
31
V5A
28
DROP
25
ALERT#
32
VFB
24
N/C
22
GND
33
GND
29
PGOOD 3
VR_HOT#
30
VREF
27
VDIO 1
VDD 2
N/C 4
PWM2 5
PWM1 6
SKIP# 7
VR_ON 8
IMON 13
OCP-I 12
B-RAMP 11
F-IMAX 10
O-USR 9
CSP2
20
CSP1
17
CSN2
19 CSN1
18
PR531
0_0402_5%
@PR531
0_0402_5%
@
12
PC513
0.068U_0402_16V7K
PC513
0.068U_0402_16V7K
1 2
PR514
43.2K_0402_1%
PR514
43.2K_0402_1%
12
PR508
150K_0402_1%
PR508
150K_0402_1%
1 2
PR511
10K_0402_5%~D
PR511
10K_0402_5%~D
1 2
PR504
8.87K_0402_1%
PR504
8.87K_0402_1%
1 2
PC501
0.1U_0402_16V7K~D
PC501
0.1U_0402_16V7K~D
12
PR509
150K_0402_1%
PR509
150K_0402_1%
1 2
PR526
10_0603_1%
PR526
10_0603_1%
12
PR529
110_0402_1%
PR529
110_0402_1%
12
+
PC738
100U_D3L_20VM_R55M
+
PC738
100U_D3L_20VM_R55M
1
2
PR513
75_0402_1%
@PR513
75_0402_1%
@
1 2
PR505
10K_0402_5%~D
PR505
10K_0402_5%~D
1 2
PR501
365K_0402_1%
PR501
365K_0402_1%
1 2
PC506
100P_0402_50V8~D
@PC506
100P_0402_50V8~D
@
1 2
+
PC735
33U_D_25VM_R60M
@
+
PC735
33U_D_25VM_R60M
@
1
2
PR507
150K_0402_1%
PR507
150K_0402_1%
1 2
PR537 0_0402_5%
@PR537 0_0402_5%
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
Adapter Protection Circuit for Turbo Mode
DYN_TUR_CURRENT_SET#
Low
High
65W
45W
Discrete current monitor circuit
sense adapter
CHG_LGATE
CSSN_1
CSSP_1
BQ24715_REGN
VCP
BQ24715_REGN
CHG_UGATE
+DCIN
CSSN_1
BQ24715_REGN
CSSP_1
BQ24715_REGN
GNDA_CHG
+SDC_IN
+VCHGR
CHAGER_SRC
+PWR_SRC
GNDA_CHG
GNDA_CHG
+SDC_IN
+DC_IN_SS
GNDA_CHG
GNDA_CHG
GNDA_CHG
+DOCK_PWR_BAR
+DC_IN_SS
GNDA_CHG
+5V_ALW
+5V_ALW
+DC_IN
+5V_ALW
+3.3V_ALW2
+3.3V_ALW
+3.3V_ALW
GNDA_CHG
GNDA_CHG
+SDC_IN
+3.3V_ALW
+SDC_IN
+PWR_SRC_AC
+3.3V_ALW2
+3.3V_ALW2
CHARGER_SMBDAT<37>
ACAV_IN<37,47,48>
DOCK_DCIN_IS- <34>
CHARGER_SMBCLK<37>
DOCK_DCIN_IS+ <34>
CSS_GC<48>
DC_BLOCK_GC <48>
+CHGR_DC_IN<48>
DK_CSS_GC <48>
ACAV_IN_NB <37,48>
DYN_TUR_CURRNT_SET#<37>
PROCHOT_GATE <36>
H_PROCHOT# <37,46,48,9>
ACAV_IN <37,47,48>
V_SYS<37>
BATDRV# <48>
VCP<37>
CHARGER_CELL_PIN<48>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+GPU_CORE
47 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+GPU_CORE
47 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
+GPU_CORE
47 57Friday, May 17, 2013
Compal Electronics, Inc.
PR738
48.7K_0402_1%
PR738
48.7K_0402_1%
12
PR747
100K_0402_1%~D
PR747
100K_0402_1%~D
12
PC745
10U_0805_25V6K
@
PC745
10U_0805_25V6K
@
12
PR734
210K_0402_1%
PR734
210K_0402_1%
12
PR711
10K_0402_1%~D
PR711
10K_0402_1%~D
1 2
PU3
TC7SH08FU_SSOP5~D
PU3
TC7SH08FU_SSOP5~D
B1
A2
G
3
O
4
P5
PU700
BQ24715RGRR_QFN
PU700
BQ24715RGRR_QFN
PHASE 19
SRN 12
LODRV 15
TP
21
SCL
9
IOUT
7
ACP 2
VCC
20
CMSRC
3
ACDET
6
SDA
8
ACDRV
4
ACOK
5
BTST 17
HIDRV 18
REGN 16
ACN 1
/BATDRV 11
SRP 13
GND 14
CELL
10
PQ706
SIRA06DP-T1-GE3_POWERPAKSO-8
PQ706
SIRA06DP-T1-GE3_POWERPAKSO-8
4
5
1
2
3
PR713
261K_0402_1%
PR713
261K_0402_1%
1 2
PR717
0_0402_5%
@
PR717
0_0402_5%
@
1 2
PC744
22U_0805_25V6M
@
PC744
22U_0805_25V6M
@
12
PC718
10U_0805_25V6K
PC718
10U_0805_25V6K
12
PC715
0.1U_0603_25V7K~D
@
PC715
0.1U_0603_25V7K~D
@
12
PC726
100P_0402_50V8J~D
PC726
100P_0402_50V8J~D
12
PR737
232K_0402_1%~D
PR737
232K_0402_1%~D
12
PU2B
LM393DR_SO8~D
PU2B
LM393DR_SO8~D
+
5
-
6O7
P8
G
4
PC701
47P_0402_50V8J~D
@
PC701
47P_0402_50V8J~D
@
12
PR743
42.2K_0402_1%~D
PR743
42.2K_0402_1%~D
12
PR732
20K_0402_1%~D
PR732
20K_0402_1%~D
1 2
G
D
S
PQ703B
SI3993CDV-T1-GE3_TSOP6~D
G
D
S
PQ703B
SI3993CDV-T1-GE3_TSOP6~D
3
42
PR746
121K_0402_1%~D
PR746
121K_0402_1%~D
12
PR725
0_0402_5%
@
PR725
0_0402_5%
@
1 2
PQ712A
DMN66D0LDW-7 2N SOT363-6
PQ712A
DMN66D0LDW-7 2N SOT363-6
61
2
PR744
10K_0402_1%~D
PR744
10K_0402_1%~D
12
PC743
22U_0805_25V6M
@
PC743
22U_0805_25V6M
@
12
PD702
BAT54HT1G_SOD323-2~D
PD702
BAT54HT1G_SOD323-2~D
1 2
PR708
1_0805_1%~D
@
PR708
1_0805_1%~D
@
1 2
PR700
0.01_1206_1%~D
PR700
0.01_1206_1%~D
1
3
4
2
G
S
D
PQ702
NTR4502PT1G_SOT23-3~D
G
S
D
PQ702
NTR4502PT1G_SOT23-3~D
2
13
PC706
10U_0805_25V6K
PC706
10U_0805_25V6K
12
PC716
10U_0805_25V6K
PC716
10U_0805_25V6K
12
PC724
100P_0402_50V8J~D
@
PC724
100P_0402_50V8J~D
@
12
PR716
0.01_1206_1%~D
PR716
0.01_1206_1%~D
1
3
4
2
PR719
0_0402_5%
@
PR719
0_0402_5%
@
1 2
PR701
0_0402_5%
@
PR701
0_0402_5%
@
1 2
PD701
BAT54CW_SOT323~D
PD701
BAT54CW_SOT323~D
3
2
1
PR728
0_0402_5%
@
PR728
0_0402_5%
@
1 2
PR729
1.8M_0402_1%
PR729
1.8M_0402_1%
1 2
G
D
S
PQ703A
SI3993CDV-T1-GE3_TSOP6~D
G
D
S
PQ703A
SI3993CDV-T1-GE3_TSOP6~D
1
65
PR727
221K_0402_1%~D
PR727
221K_0402_1%~D
1 2
PR736
1M_0402_1%~D
PR736
1M_0402_1%~D
1 2
PC712
22U_0805_25V6M
PC712
22U_0805_25V6M
12
PC713
0.047U_0603_25V7M
PC713
0.047U_0603_25V7M
12
PR724
4.7_1206_5%~D
@
PR724
4.7_1206_5%~D
@
1 2
PJP701
PAD-OPEN1x1m
PJP701
PAD-OPEN1x1m
1 2
PR709
0_0402_5%
@
PR709
0_0402_5%
@
1 2
PC727
220P_0402_50V8J~D
PC727
220P_0402_50V8J~D
12
PC709
1U_0603_10V6K~D
PC709
1U_0603_10V6K~D
1 2
G
S
D
PQ701
NTR4502PT1G_SOT23-3~D
G
S
D
PQ701
NTR4502PT1G_SOT23-3~D
2
13
PC708 0.1U_0402_25V6PC708 0.1U_0402_25V6
12
PC719
100P_0402_50V8J~D
PC719
100P_0402_50V8J~D
1 2
PR730
150K_0402_1%
PR730
150K_0402_1%
12
PC707
2200P_0402_50V7K~D
PC707
2200P_0402_50V7K~D
12
PU703
INA199A1DCKR_SC70-6~D
PU703
INA199A1DCKR_SC70-6~D
V+
3
IN- 5
IN+ 4
GND
2
Out 6
REF
1
PC714
1000P_0603_50V7K~D
@
PC714
1000P_0603_50V7K~D
@
12
PR704
10_0402_5%~D
PR704
10_0402_5%~D
12
PQ710A
DMN66D0LDW-7 2N SOT363-6
PQ710A
DMN66D0LDW-7 2N SOT363-6
61
2
PR710
0_0402_5%
@
PR710
0_0402_5%
@
1 2
PC721
0.1U_0603_25V7K~D
PC721
0.1U_0603_25V7K~D
1 2
PC728
0.1U_0402_25V4Z~D
PC728
0.1U_0402_25V4Z~D
12
PC720
0.1U_0603_25V7K~D
@
PC720
0.1U_0603_25V7K~D
@
1 2
PR740
100K_0402_5%~D
PR740
100K_0402_5%~D
12
PC742
22U_0805_25V6M
PC742
22U_0805_25V6M
12
PR735
69.8K_0402_1%
PR735
69.8K_0402_1%
12
PC717
10U_0805_25V6K
PC717
10U_0805_25V6K
12
PC704
0.1U_0603_25V7K~D
PC704
0.1U_0603_25V7K~D
1 2
PC740
220P_0402_50V8J
@
PC740
220P_0402_50V8J
@
12
PR706
100K_0402_1%~D
PR706
100K_0402_1%~D
12
PU2A
LM393DR_SO8~D
PU2A
LM393DR_SO8~D
+
3
-
2O1
P8
G
4
PR748
44.2_0402_1%~D
PR748
44.2_0402_1%~D
12
PQ704
SIRA14DP-T1GE3_POWERPAK-SO8-5
PQ704
SIRA14DP-T1GE3_POWERPAK-SO8-5
4
5
1
2
3
PR718
0_0402_5%
@
PR718
0_0402_5%
@
1 2
PC702
0.1U_0603_25V7K~D
@
PC702
0.1U_0603_25V7K~D
@
12
PQ700 V30415-T1-GE3 1P POWERPAK1212-8PQ700 V30415-T1-GE3 1P POWERPAK1212-8
35
2
4
1
PC725
0.01U_0402_25V7K~D
@
PC725
0.01U_0402_25V7K~D
@
12
PC746
10U_0805_25V6K
@
PC746
10U_0805_25V6K
@
12
PR751
10K_0402_1%~D
@
PR751
10K_0402_1%~D
@
1 2
PL701
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
PL701
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
12
PR742
22.6K_0402_1%~D
PR742
22.6K_0402_1%~D
12
PR726
10K_0402_1%~D
@
PR726
10K_0402_1%~D
@
1 2
PR722
4.02K_0402_1%
PR722
4.02K_0402_1%
1 2
PC703
1U_0603_25V6K
PC703
1U_0603_25V6K
1 2
PR750
0_0402_5%
@
PR750
0_0402_5%
@
1 2
PR703
10K_0402_5%~D
PR703
10K_0402_5%~D
12
PC710
0.1U_0603_25V7K~D
@
PC710
0.1U_0603_25V7K~D
@
12
PC730
100P_0402_50V8J~D
PC730
100P_0402_50V8J~D
12
PR714
49.9K_0402_1%~D
PR714
49.9K_0402_1%~D 12
PQ710B
DMN66D0LDW-7 2N SOT363-6
PQ710B
DMN66D0LDW-7 2N SOT363-6
3
5
4
PR745
10_1206_5%~D
PR745
10_1206_5%~D
12
PR702
0_0402_5%
@
PR702
0_0402_5%
@
1 2
PL700
1UH_PCMB042T-1R0MS_4.5A_20%
PL700
1UH_PCMB042T-1R0MS_4.5A_20%
12
PQ712B
DMN66D0LDW-7 2N SOT363-6
PQ712B
DMN66D0LDW-7 2N SOT363-6
3
5
4
PC737
10U_0805_25V6K
PC737
10U_0805_25V6K
12
PR705
10_0402_5%~D
PR705
10_0402_5%~D
12
PR715
2.2_0603_5%
PR715
2.2_0603_5%
1 2
PC711
22U_0805_25V6M
PC711
22U_0805_25V6M
12
PC700
0.1U_0603_25V7K~D
@
PC700
0.1U_0603_25V7K~D
@
12
PC733
0.1U_0603_25V7K~D
PC733
0.1U_0603_25V7K~D
12
PJP700
PAD-OPEN 4x4m
@
PJP700
PAD-OPEN 4x4m
@
1 2
PC722
0.1U_0603_25V7K~D
PC722
0.1U_0603_25V7K~D
1 2
PR739
10K_0402_1%~D
PR739
10K_0402_1%~D
12
PC729
100P_0402_50V8J~D
PC729
100P_0402_50V8J~D
12
PR749
59_0402_1%
PR749
59_0402_1%
12
PC741
22U_0805_25V6M
PC741
22U_0805_25V6M
12
PC705
0.1U_0603_25V7K~D
PC705
0.1U_0603_25V7K~D
1 2
PR707
100K_0402_1%~D
PR707
100K_0402_1%~D
12
PR741
0_0402_5%
@
PR741
0_0402_5%
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Purpose: Trigger PROCHOT# when
active battery is removed from
system.
Allows EC to re-establish
system performance for battery
next in line.
Purpose: Turn on the PQ817
for primary or module bay
battery to provide power to
dock side without AC exist.
Purpose: Turn on the PQ817
for Slice battery discharge
without AC exist
DK_AC_OFF
CHGVR_DCIN
SL_BAT_PRES#
ERC2
ERC1
P33ALW
ACAVDK_SRCACAVDK_SRC
ERC3
DK_AC_OFF_ENCD3301_SDC_IN
3301_PWRSRC
3301_ACAV_IN_NB
STSTART_DCBLOCK_GC
P50ALW
CD_PBATT_OFF
DK_PWRBAR
DC_IN_SS
ACAVIN
CD3301_DCIN
P33ALW2
EN_DK_PWRBAR
+BATT_SUM
SLICE_BAT_PRES#
SLICE_BAT_ON
PBAT_PRES#
STSTART_DCBLOCK_GC
+PBATT_IN_SS
SLICE_BAT_ON
ACAV_IN#
ACAV_IN#
ACAV_IN#
3301_DSCHRG_FET_GC
DSCHRG_MOSFET_GC
3301_DSCHRG_FET_GC
+PWR_SRC_AC
+DC_IN_SS
+DC_IN
+SDC_IN
+3.3V_ALW2
+PWR_SRC_AC
+3.3V_ALW
+5V_ALW
+3.3V_ALW2
+PBATT
+PBATT
+DOCK_PWR_BAR
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+VCHGR
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW2
+DOCK_PWR_BAR
+NBDOCK_DC_IN_SS
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW2
+NBDOCK_DC_IN_SS
+DC_IN_SS
+3.3V_ALW2
+NBDOCK_DC_IN_SS
+3.3V_ALW2
+3.3V_ALW2
+PBATT
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW
CSS_GC<47>
DK_CSS_GC<47>
+CHGR_DC_IN<47>
SLICE_BAT_ON <36,48>
ACAV_IN_NB <37,47>
DOCK_AC_OFF_EC <36>
SLICE_BAT_PRES# <34,36,41,48>
SOFT_START_GC<41>
ACAV_DOCK_SRC#<34>
DC_BLOCK_GC<47>
ACAV_IN<37,47,48>
PBAT_PRES#<36,41> SLICE_BAT_ON <36,48>
H_PROCHOT# <37,46,47,9>
DOCK_AC_OFF <34>
EN_DOCK_PWR_BAR <36>
BATDRV#<47>
DOCK_DET# <34,36,48>
SLICE_BAT_PRES# <34,36,41,48>
DIS_BAT_PROCHOT#<36>
SLICE_BAT_ON <36,48>
SLICE_BAT_PRES# <34,36,41,48>
SLICE_PERF_EN <37,48>
SLICE_PERF_EN
<37,48>
SLICE_PERF_EN<37,48>
SLICE_PERF_EN<37,48>
CHARGER_CELL_PIN <47>
ACAV_IN<37,47,48>
DOCK_SMB_ALERT# <34,36,41>
DOCK_DET#
<34,36,48>
DOCK_DET#
<34,36,48>
SLICE_BAT_PRES# <34,36,41,48>
DOCK_DET# <34,36,48>
SLICE_BAT_PRES# <34,36,41,48>
SLICE_BAT_PRES# <34,36,41,48>
DOCK_DET# <34,36,48>
AC_DIS<36,41>
SLICE_BAT_PRES#<34,36,41,48>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Selector
48 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Selector
48 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
Selector
48 57Friday, May 17, 2013
Compal Electronics, Inc.
PR853
0_0402_5%
@
PR853
0_0402_5%
@
1 2
PQ813A
DMN66D0LDW-7 2N_SOT363-6~D
PQ813A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR814
330K_0402_5%~D
PR814
330K_0402_5%~D
12
PQ809
SI4835DDY-T1-GE3_SO8~D
PQ809
SI4835DDY-T1-GE3_SO8~D
3 6
5
7
8
2
4
1
G
D
S
PQ817
DMN65D8LW-7_SOT323-3~D
G
D
S
PQ817
DMN65D8LW-7_SOT323-3~D
2
13
PR859
0_0402_5%
@
PR859
0_0402_5%
@
1 2
PD818
SDMK0340L-7-F_SOD323-2~D
@
PD818
SDMK0340L-7-F_SOD323-2~D
@
1 2
PQ805B
DMN66D0LDW-7 2N_SOT363-6~D
PQ805B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PQ821B
DMN66D0LDW-7 2N_SOT363-6~D
PQ821B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PD816
SDMK0340L-7-F_SOD323-2~D
PD816
SDMK0340L-7-F_SOD323-2~D
12
PR818
100K_0402_5%~D
PR818
100K_0402_5%~D
1 2
PQ826
FDMC6679AZ_MLP8-5
PQ826
FDMC6679AZ_MLP8-5
4
5
1
2
3
PR808
100K_0402_5%~D
PR808
100K_0402_5%~D
12
PC817
0.1U_0402_25V4Z~D
@
PC817
0.1U_0402_25V4Z~D
@
12
PQ810
FDS6679AZ-G_SO8~D
PQ810
FDS6679AZ-G_SO8~D
36
5
7
8
2
4
1
PQ824B
DMN66D0LDW-7 2N_SOT363-6~D
@
PQ824B
DMN66D0LDW-7 2N_SOT363-6~D
@
3
5
4
PD808
PDS5100H-13_POWERDI5-3~D
PD808
PDS5100H-13_POWERDI5-3~D
2
3
1
PR860
0_0402_5%
@
PR860
0_0402_5%
@
1 2
PR817
330K_0402_5%~D
PR817
330K_0402_5%~D
1 2
2
1
3
PQ822
NTR4502PT1G 1P SOT23-3
2
1
3
PQ822
NTR4502PT1G 1P SOT23-3
2
13
PD820
SDMK0340L-7-F_SOD323-2~D
PD820
SDMK0340L-7-F_SOD323-2~D
1 2
PR863
0_0402_5%
@
PR863
0_0402_5%
@
1 2
PQ811
FDS6679AZ-G_SO8~D
PQ811
FDS6679AZ-G_SO8~D
3 6
5
7
8
2
4
1
PR828
10K_0402_5%~D
PR828
10K_0402_5%~D
1 2
PR824
100K_0402_5%~D
@
PR824
100K_0402_5%~D
@
1 2
PC807
0.47U_0805_25V7K~D
PC807
0.47U_0805_25V7K~D
1 2
PD814
SDMK0340L-7-F_SOD323-2~D
PD814
SDMK0340L-7-F_SOD323-2~D
1 2
PR894
0_0402_5%~D
@
PR894
0_0402_5%~D
@
1 2
PR864
100K_0402_5%~D
PR864
100K_0402_5%~D
12
PR823
100K_0402_5%~D
PR823
100K_0402_5%~D
1 2
PR816
100K_0402_5%~D
PR816
100K_0402_5%~D
1 2
PR836
100K_0402_5%~D
PR836
100K_0402_5%~D
12
PD813
SDMK0340L-7-F_SOD323-2~D
PD813
SDMK0340L-7-F_SOD323-2~D
12
PR832
0_0402_5%
@
PR832
0_0402_5%
@
12
PR877
0_0402_5%
@
PR877
0_0402_5%
@
1 2
PU800
CD3301BRHHR_QFN36_6X6~D
PU800
CD3301BRHHR_QFN36_6X6~D
DC_IN
1
SS_GC
2
ERC1
3
ACAVDK_SRC
4
GND
5
SDC_IN
6
DC_BLK_GC
7
ACAV_IN
8
SS_DCBLK_GC
16
CSS_GC
10
DK_CSS_GC
11
ERC3
12
ERC2
13
GND
14
PWR_SRC
15
BLKNG_MOSFET_GC 20
SL_BAT_PRES# 21
DK_AC_OFF_EN 22
GND 23
ACAV_IN_NB 24
DK_AC_OFF_EN 25
PBATT_OFF 26
P50ALW 27
PBatt+ 28
DSCHRG_MOSFET_GC 29
BLK_MOSFET_GC 30
NC 31
DK_PWRBAR 33
DC_IN_SS 34
CHARGERVR_DCIN 35
P33ALW2
9
EN_DK_PWRBAR
17
P33ALW
18
TP
37
NBDK_DCINSS 19
NC 36
GND 32
PC810
0.1U_0402_10V7K
PC810
0.1U_0402_10V7K
12
PR833
0_0402_5%
@
PR833
0_0402_5%
@
1 2
PD807
SDMK0340L-7-F_SOD323-2~D
PD807
SDMK0340L-7-F_SOD323-2~D
12
PQ807B
DMN66D0LDW-7 2N_SOT363-6~D
PQ807B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PD815
BAT54CW_SOT323~D
PD815
BAT54CW_SOT323~D
3
2
1
PC809
1500P_0402_7K~D
@
PC809
1500P_0402_7K~D
@
12
PQ813B
DMN66D0LDW-7 2N_SOT363-6~D
PQ813B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PQ800
SI4835DDY-T1-GE3_SO8~D
PQ800
SI4835DDY-T1-GE3_SO8~D
3 6
5
7
8
2
4
1
G
D
S
PQ832
DMN65D8LW-7_SOT323-3~D
G
D
S
PQ832
DMN65D8LW-7_SOT323-3~D
2
13
G
D
S
PQ818
DMN65D8LW-7_SOT323-3~D
G
D
S
PQ818
DMN65D8LW-7_SOT323-3~D
2
13
PR830
100K_0402_5%~D
PR830
100K_0402_5%~D
12
PC814
0.1U_0402_10V7K
PC814
0.1U_0402_10V7K
12
PC815
0.1U_0603_25V7K~D
PC815
0.1U_0603_25V7K~D
12
PR821
820_0603_5%~D
PR821
820_0603_5%~D
1 2
PR849
100K_0402_5%~D
PR849
100K_0402_5%~D
12
PQ806B
DMN66D0LDW-7 2N_SOT363-6~D
PQ806B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PR872
0_0402_5%
@
PR872
0_0402_5%
@
1 2
PC816
0.047U_0603_25V7M
PC816
0.047U_0603_25V7M
12
PR855
0_0402_5%
@
PR855
0_0402_5%
@
1 2
PC801
0.1U_0402_10V7K
PC801
0.1U_0402_10V7K
1 2
PR825
0_0402_5%
@
PR825
0_0402_5%
@
1 2
PC813
0.1U_0603_50V4Z~D
PC813
0.1U_0603_50V4Z~D
12
PR811
0_0402_5%
@
PR811
0_0402_5%
@
12
PR850
0_0402_5%
@
PR850
0_0402_5%
@
1 2
PQ807A
DMN66D0LDW-7 2N_SOT363-6~D
PQ807A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR870
47K_0402_5%~D
@
PR870
47K_0402_5%~D
@
1 2
PR852
0_0402_5%
@
PR852
0_0402_5%
@
1 2
PQ819B
DMN66D0LDW-7 2N_SOT363-6~D
@
PQ819B
DMN66D0LDW-7 2N_SOT363-6~D
@
3
5
4
PR868
0_0402_5%
@
PR868
0_0402_5%
@
1 2
2
1
3
PQ823
ME2301D-G 1P SOT-23-3
@
2
1
3
PQ823
ME2301D-G 1P SOT-23-3
@
2
13
PR810
100K_0402_5%~D
PR810
100K_0402_5%~D
12
G
D
S
PQ825
DMN65D8LW-7_SOT323-3~D
G
D
S
PQ825
DMN65D8LW-7_SOT323-3~D
2
13
G
D
S
PQ816
AO3418_SOT23-3
G
D
S
PQ816
AO3418_SOT23-3
2
13
PR874
1M_0402_5%~D
PR874
1M_0402_5%~D
1 2
PD821
SDMK0340L-7-F_SOD323-2~D
PD821
SDMK0340L-7-F_SOD323-2~D
12
PR812
0_0402_5%
@
PR812
0_0402_5%
@
1 2
PC805
0.1U_0402_10V7K
PC805
0.1U_0402_10V7K
1 2
PQ812B
DMN66D0LDW-7 2N_SOT363-6~D
PQ812B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
2
1
3
PQ801
NTR4502PT1G 1P SOT23-3
2
1
3
PQ801
NTR4502PT1G 1P SOT23-3
2
13
2
1
3
PQ814
NTR4502PT1G 1P SOT23-3
2
1
3
PQ814
NTR4502PT1G 1P SOT23-3
2
13
PD819
SDMK0340L-7-F_SOD323-2~D
PD819
SDMK0340L-7-F_SOD323-2~D
1 2
PR869
240K_0402_5%~D
@
PR869
240K_0402_5%~D
@
1 2
PR826
100K_0402_5%~D
PR826
100K_0402_5%~D
12
PC806
2200P_0402_50V7K~D
PC806
2200P_0402_50V7K~D
1 2
PR866
0_0402_5%
@
PR866
0_0402_5%
@
12
PU805
TC7SH08FU_SSOP5~D
PU805
TC7SH08FU_SSOP5~D
B1
A2
G
3
O
4
P5
PR831
0_0402_5%
@
PR831
0_0402_5%
@
1 2
PR802
100K_0402_5%~D
PR802
100K_0402_5%~D
1 2
PQ821A
DMN66D0LDW-7 2N_SOT363-6~D
PQ821A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR822
10K_0402_5%~D
PR822
10K_0402_5%~D
12
G
D
S
PQ831
DMN65D8LW-7_SOT323-3~D
G
D
S
PQ831
DMN65D8LW-7_SOT323-3~D
2
1 3
PU807
TC7SH08FU_SSOP5~D
PU807
TC7SH08FU_SSOP5~D
B1
A2
G
3
O
4
P5
PU806
TC7SH08FU_SSOP5~D
PU806
TC7SH08FU_SSOP5~D
B1
A2
G
3
O
4
P5
PR847
0_0402_5%
@
PR847
0_0402_5%
@
1 2
PR819
100K_0402_5%~D
PR819
100K_0402_5%~D
1 2
PR838
0_0402_5%
@
PR838
0_0402_5%
@
12
PR862
0_0402_5%
@
PR862
0_0402_5%
@
1 2
PR829
100K_0402_5%~D
PR829
100K_0402_5%~D
12
PR840
100K_0402_5%~D
PR840
100K_0402_5%~D
1 2
PU804
TC7SH08FU_SSOP5~D
PU804
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
PQ819A
DMN66D0LDW-7 2N_SOT363-6~D
@
PQ819A
DMN66D0LDW-7 2N_SOT363-6~D
@
61
2
PR848
0_0402_5%~D
@
PR848
0_0402_5%~D
@
1 2
PR846
100K_0402_5%~D
PR846
100K_0402_5%~D
1 2
PQ812A
DMN66D0LDW-7 2N_SOT363-6~D
PQ812A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PC812
0.1U_0402_10V7K
PC812
0.1U_0402_10V7K
12
PR835
47_0805_5%~D
PR835
47_0805_5%~D
1 2
PR841
0_0402_5%
@
PR841
0_0402_5%
@
12
PQ815
FDS6679AZ-G_SO8~D
PQ815
FDS6679AZ-G_SO8~D
36
5
7
8
2
4
1
PR827
100K_0402_5%~D
PR827
100K_0402_5%~D
1 2
PR843
0_0402_5%
@
PR843
0_0402_5%
@
1 2 PR844
10K_0402_5%~D
@
PR844
10K_0402_5%~D
@
12
PR813
100K_0402_5%~D
PR813
100K_0402_5%~D
1 2
G
D
S
PQ828
DMN65D8LW-7_SOT323-3~D
G
D
S
PQ828
DMN65D8LW-7_SOT323-3~D
2
1 3
PD806
PDS5100H-13_POWERDI5-3~D
PD806
PDS5100H-13_POWERDI5-3~D
2
3
1
2
1
3
PQ829
SI2301CDS-T1-GE3 1P_SOT23-3
2
1
3
PQ829
SI2301CDS-T1-GE3 1P_SOT23-3
2
13
PR875
100K_0402_5%~D
@
PR875
100K_0402_5%~D
@
1 2
PQ802A
DMN66D0LDW-7 2N_SOT363-6~D
PQ802A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR851
0_0402_5%~D
@
PR851
0_0402_5%~D
@
1 2
PC808
0.1U_0402_10V7K
PC808
0.1U_0402_10V7K
12
2
1
3
PQ830
NTR4502PT1G_SOT23-3~D
2
1
3
PQ830
NTR4502PT1G_SOT23-3~D
2
13
PR839
100K_0402_5%~D
PR839
100K_0402_5%~D
12
PR856
0_0402_5%~D
@
PR856
0_0402_5%~D
@
12
PD810
SDMK0340L-7-F_SOD323-2~D
PD810
SDMK0340L-7-F_SOD323-2~D
1 2
PR815
10K_0402_5%~D
PR815
10K_0402_5%~D
12
PR861
0_0402_5%
@
PR861
0_0402_5%
@
1 2
PR804
100K_0402_5%~D
PR804
100K_0402_5%~D
12
PR820
0_0402_5%
@
PR820
0_0402_5%
@
1 2
PR857
0_0402_5%
@
PR857
0_0402_5%
@
1 2
PR858
1M_0402_5%~D
PR858
1M_0402_5%~D
1 2
PD811
SDMK0340L-7-F_SOD323-2~D
PD811
SDMK0340L-7-F_SOD323-2~D
1 2
PC803
0.1U_0603_25V7K~D
PC803
0.1U_0603_25V7K~D
1 2
PQ806A
DMN66D0LDW-7 2N_SOT363-6~D
PQ806A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR854
0_0402_5%
@
PR854
0_0402_5%
@
1 2
PU801
TC7SH08FU_SSOP5~D
PU801
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
PR895
0_0402_5%
@
PR895
0_0402_5%
@
1 2
PQ805A
DMN66D0LDW-7 2N_SOT363-6~D
PQ805A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR837
100K_0402_5%~D
PR837
100K_0402_5%~D
12
G
D
S
PQ827
DMN65D8LW-7_SOT323-3~D
@
G
D
S
PQ827
DMN65D8LW-7_SOT323-3~D
@
2
13
PR834
0_0402_5%
@
PR834
0_0402_5%
@
1 2
PQ824A
DMN66D0LDW-7 2N_SOT363-6~D
@
PQ824A
DMN66D0LDW-7 2N_SOT363-6~D
@
61
2
PU808
TC7SH08FU_SSOP5~D
PU808
TC7SH08FU_SSOP5~D
B1
A2
G
3
O
4
P5
PR801
100K_0402_5%~D
PR801
100K_0402_5%~D
12
PC811
0.01U_0603_25V7K~D
PC811
0.01U_0603_25V7K~D
12
PR807
100K_0402_5%~D
PR807
100K_0402_5%~D
12
PD800
PDS5100H-13_POWERDI5-3~D
PD800
PDS5100H-13_POWERDI5-3~D
2
3
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Based on PDDG rev 0.7 Table 5-1.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PROCESSOR DECOUPLING
49 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PROCESSOR DECOUPLING
49 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PROCESSOR DECOUPLING
49 57Friday, May 17, 2013
Compal Electronics, Inc.
PC921
22U_0805_6.3V6M
PC921
22U_0805_6.3V6M
1
2
PC913
22U_0805_6.3V6M
PC913
22U_0805_6.3V6M
1
2
PC902
22U_0805_6.3V6M
@
PC902
22U_0805_6.3V6M
@
1
2
PC906
22U_0805_6.3V6M
PC906
22U_0805_6.3V6M
1
2
PC903
22U_0805_6.3V6M
@
PC903
22U_0805_6.3V6M
@
1
2
+
PC930
330U_D2_2.5VY_R9M
+
PC930
330U_D2_2.5VY_R9M
1
2
PC908
22U_0805_6.3V6M
@
PC908
22U_0805_6.3V6M
@
1
2
PC905
22U_0805_6.3V6M
PC905
22U_0805_6.3V6M
1
2
PC915
22U_0805_6.3V6M
@
PC915
22U_0805_6.3V6M
@
1
2
PC919
22U_0805_6.3V6M
@
PC919
22U_0805_6.3V6M
@
1
2
PC924
22U_0805_6.3V6M
@
PC924
22U_0805_6.3V6M
@
1
2
PC923
22U_0805_6.3V6M
PC923
22U_0805_6.3V6M
1
2
PC922
22U_0805_6.3V6M
@
PC922
22U_0805_6.3V6M
@
1
2
PC917
22U_0805_6.3V6M
PC917
22U_0805_6.3V6M
1
2
PC904
22U_0805_6.3V6M
@
PC904
22U_0805_6.3V6M
@
1
2
PC907
22U_0805_6.3V6M
@
PC907
22U_0805_6.3V6M
@
1
2
PC911
22U_0805_6.3V6M
@
PC911
22U_0805_6.3V6M
@
1
2
PC912
22U_0805_6.3V6M
@
PC912
22U_0805_6.3V6M
@
1
2
PC914
22U_0805_6.3V6M
PC914
22U_0805_6.3V6M
1
2
PC900
22U_0805_6.3V6M
@
PC900
22U_0805_6.3V6M
@
1
2
PC928
22U_0805_6.3V6M
@
PC928
22U_0805_6.3V6M
@
1
2
PC901
22U_0805_6.3V6M
PC901
22U_0805_6.3V6M
1
2
PC909
22U_0805_6.3V6M
PC909
22U_0805_6.3V6M
1
2
PC918
22U_0805_6.3V6M
PC918
22U_0805_6.3V6M
1
2
PC910
22U_0805_6.3V6M
PC910
22U_0805_6.3V6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Page 1
Page 1Page 1
Page 1
Solution Description
Solution DescriptionSolution Description
Solution Description Rev.
Rev.Rev.
Rev.Page#
Page#Page#
Page# Title
TitleTitle
Title
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Item
ItemItem
Item Issue Description
Issue DescriptionIssue Description
Issue DescriptionDate
DateDate
Date Request
RequestRequest
Request
Owner
OwnerOwner
Owner
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
2
3
4
5
6
1P45 1.5VSP 8/17 Compal
Base power budget request, add 1.5V powre rail Add PU400
P42 +5V/+3.3V 8/17 Compal
reserver PR114 for TPS51282 application ADD @PR114
P47 Charger 8/17 Compal
modify SMBus net for correct connectEC can't detect charger IC cause can't charger
P46 Vcore 8/17 Compal
schematic control error cause can't set OCP add Vref net for correct connect
P48 Selector 8/17 Compal
in order to meet latest multi-battery request change control signal for meet E5 request
P43 1.35V/0.675V 8/17 Compal
chagne OCP setting change PR201 from 20k to 24.9k.
Reserve 0ohm for 3v5v enable debug
Compal
10/22
+1.05V_MP
P44
8
7
+1.05V_MP EA for ripple portion can't meet
spec. 31.5mv, after change from 1u to 2.2u test is pass
Change PL300
from SH00000PJ00 (S COIL 1UH +-20% PCMB063T-1R0MS 12A)
to SH00000MR00 (S COIL 2.2UH +-20% ETQP3W2R2WFN 8.5A)
P42 +5V/+3.3V 10/22 Compal
Original 3v5v IC -TPS51225 can't support 2cell battery
follow TI suggestion, When TPS51285A/B is used,
please update the below four components.
1)VREG5 cap to 4.7uF
2)VREG3 cap to 4.7uF
3)CS1 resistor to 1/5 of the Tps51275’s value
4)CS2 resistor to 1/5 of the Tps51275’s value
5)VCLK connection (when not be used): add 200-ohm to GND
10/22 Compal
+5V/+3.3VP429
X01
Change PR113
from SD03420018L (S RES 1/16W 2K +-1% 0402)
to SD028000080 (S RES 1/16W 0 +-5% 0402)
X01
Change PU100
from SA00005LS00 (S IC TPS51225CRUKR QFN 20P PWM)
to SA000064T00 (S IC TPS51285BRUKR QFN 20P PWM)
1)2)Change PC118(VREG5 Cap) and PC100(VREG3 Cap)
from SE080105K80(S CER CAP 1U 10V K X5R 0603)
to SE00000MA00(S CER CAP 4.7U 10V K X5R 0603)
X01
3) Change PR106(for CS1)
from SD03484528L (S RES 1/16W 84.5K +-1% 0402)
to SD034169280 (S RES 1/16W 16.9K +-1% 0402)
4) Change PR105(for CS2)
from SD03410038L (S RES 1/16W 100K +-1% 0402)
to SD034200280 (S RES 1/16W 20K +-1% 0402)
5) Add PR114 SD034200080(S RES 1/16W 200 +-1% 0402)
To avoid HW and Power SMT materials can't entirely
replace Change PU3,PU801,PU804,PU805,PU806,PU807
from SA74108040L(S IC 74AHC1G08GW SOT353 AND)
to SA00708012L(S IC TC7SH08FU SSOP 5P AND)
X01
P47 Charger
P48 Selector
Compal
10/22
10
ChargerP4711 10/22 Compal
follow E5- Salado 14"15" schematic 1) @PQ819, @PQ824
X01
2) EMI request for add PL700
SH00000IW00(S COIL 1UH +-20% PCMB042T-1R0MS 4.5A)
12
follow TI suggestion modify setting value to meet Intel
VR12.6(ULV) validation EA
1) Imon
2) Loadline
3) transient
Compal
11/02
Vcore
P46
1) Change PR501
from SD034422380 (S RES 1/16W 422K +-1% 0402)
to SD034365380 (S RES 1/16W 365K +-1% 0402)
2) Change PR521
from SD000009M80 (S RES 1/16W 2.61K +-1% 0402)
to SD00000WS8L(S RES 1/16W 2.32K +-1% 0402)
3) @PC506 100p_0402 and change PR535
from SD02810028L(S RES 1/16W 10K +-5% 0402)
to SD034487100 (S RES 1/16W 4.87K +-1% 0402 (LF))
X01
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 1
50 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 1
50 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 1
50 57Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Page 1
Page 1Page 1
Page 1
Solution Description
Solution DescriptionSolution Description
Solution Description Rev.
Rev.Rev.
Rev.Page#
Page#Page#
Page# Title
TitleTitle
Title
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Item
ItemItem
Item Issue Description
Issue DescriptionIssue Description
Issue DescriptionDate
DateDate
Date Request
RequestRequest
Request
Owner
OwnerOwner
Owner
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
14
15
13 Compal
P42 +5V/+3.3V Compal
P47 Charger
Compal
Compal
- EMC team
Wen. Andy
P48
+1.05VTTP
1.35V/0.675V
11/05
+1.05V_MP
18 +5V/+3.3V
2) Reserve 0 ohm for debug
1) TI suggestion BQ24715 cell pin pull high 3.3V change
to V_regn(6v) for sequence issue
Delete @PR731, @PR733, @PU702
1) Change PR711
from SD02800008L (S RES 1/16W 0 +-5% 0402)
to SD034100280 (S RES 1/16W 10K +-1% 0402)
,add PR750 SD028000080(S RES 1/16W 0 +-5% 0402)
2) Add @PR751
Improve charger efficiency Change PR715
from SD028200A80 (S RES 1/16W 20 +-5% 0402)
to SD013220B80 (S RES 1/10W 2.2 +-5% 0603)
11/05 X01
follow E5- Salado 14"15" schematic
X01
11/05
1) @PR863, @PR870, @PR869, @PR824, @PR875, @PQ823
2) Add @PR848, @PR851
and add PR834, PR852, PR853, all is
SD028000080(S RES 1/16W 0 +-5% 0402)
P47 Charger 11/05 X01
3) Add PR874 SD028100480(S RES 1/16W 1M +-5% 0402)
4) Add PD819 SCS0340L01L(S SCH DIO SDMK0340L-7-F SOD-323)
X01
16 P47 Charger 11/05 Compal
17
X01
follow E5- Salado 14"15" schematic
P44 11/05
Compal
-QAD team
-Huang.Hanks
(PCP)
Support QAD WCEPTA analysis, to modify 1.05 OCP Rtrip
resistance to 95K, Cpk value will pass specification.
Change PR302
from SD00000H880 (S RES 1/16W 54.9K +-1% 0402)
to SD034953280 (S RES 1/16W 95.3K +-1% 0402 )
X01
EMC team suggestion @PC105, @PC203, @PC301
19
follow E5- Salado 14"15" schematic Add
PQ827 SB00000UO00 (S TR DMN65D8LW-7 1N SOT323-3),
@PR856 SD028000080 (S RES 1/16W 0 +-5% 0402),
PQ816 SB534020000 (S TR AO3402 1N SOT-23),
PQ828 SB00000UO00 (S TR DMN65D8LW-7 1N SOT323-3),
PR861 SD028000080 (S RES 1/16W 0 +-5% 0402)
PR802, PR827, PR840 change
from SD028240380 (S RES 1/16W 240K +-5% 0402)
to SD028470280 (S RES 1/16W 47K +-5% 0402),
PR804, PR826, PR839 change
from SD028470280 (S RES 1/16W 47K +-5% 0402),
to SD028240380 (S RES 1/16W 240K +-5% 0402)
11/15 Compal
SelectorP48 X01
X01
20 P47 Charger
P48 Selector
12/12 Compal
Change PR713
from SD034294380 (S RES 1/16W 294K +-1% 0402)
to SD034261380 (S RES 1/16W 261K +-1% 0402)
@PR844
P41
ESD team's PD1 vendor(NXP) proposal PD1 pin 5
connected to the VCC (5V or 3.3V).
21 +DCIN 2013
/01/11
Compal-
ESD team
PD1 pin5 connect to +3.3V_ALW
X01_2
for undock shutdown issue
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 2
51 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 2
51 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 2
51 57Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Page 1
Page 1Page 1
Page 1
Solution Description
Solution DescriptionSolution Description
Solution Description Rev.
Rev.Rev.
Rev.
Page#
Page#Page#
Page# Title
TitleTitle
Title
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Item
ItemItem
Item Issue Description
Issue DescriptionIssue Description
Issue DescriptionDate
DateDate
Date Request
RequestRequest
Request
Owner
OwnerOwner
Owner
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
22 P48
1). Add PU808
P/N: SA007080120 (S IC TC7SH08FU SSOP 5P AND)
2). Add PQ830
P/N: SB000007900 (S TR NTR4502PT1G 1P SOT23-3)
3). Add PQ831
P/N: SB00000UO00 (S TR DMN65D8LW-7 1N SOT323-3)
4). Add PD821
P/N: SCS0340L010 (S SCH DIO SDMK0340L-7-F SOD-323)
5). Add PR836, PR837
P/N: SD028100380 (S RES 1/16W 100K +-5% 0402)
6). Add PC814
P/N: SE102104K00 (S CER CAP 0.1U 10V +-10% X7R 0402)
X01_2
To avoid +DOCK_PWR_BAR leakage voltage when system
only with main battery
Selector 2013/
01/23
Compal
P41 +DCIN 2013
/02/07
Compal
23 X02
PPM-Jovins_Chang and Sourcer-Willie_Zeng highlight
SB000009N8L will shortage after 2013/05
Change PQ6
From : SB000009N8L (S TR IMD2AT-108 PNP/NPN SC74-62)
To : SB000009P80 (TR DCX124EK-7-F PNP/NPN SC74R-6)
Selector 2013/
02/18
Compal
24 P48
AC_DIS# should be change to AC_DIS because it’s
high active not low active for our application.
1). Change PQ6A.5 and PR828.1 net name from AC_DIS#
to AC_DIS
2). Add PQ829
P/N: SB00000H500 (S TR SI2301CDS-T1-GE3 1P SOT23-3)
, PQ832
P/N: SB00000UO00 (S TR DMN65D8LW-7 1N SOT323-3)
, PD820
P/N: SCS0340L010 (S SCH DIO SDMK0340L-7-F SOD-323)
, @PR894
, PR895
P/N: SD028000080 (S RES 1/16W 0 +-5% 0402)
3). modify PR828,PR830
4). Delete PQ820
5). Delete PL5, add PJP1
P41 +DCIN
25 2013/
02/18
Compal-ME
DFX highlight Battery connetor(locattion:PBATT1)
hard to insert.
Battery connetor(locattion:PBATT1) footprint follow
ME team Iris requesti to change
from SUYIN_200277GR009M262ZR_9P-T
to ALLTO_C144LS-109A9-L_9P-T
X02
X02
Selector 2013/
02/18
26 CompalP48
layout spec limit Delete PD817, modify PD815 footprint same as PD701,
from SDMK0340L-7-F_SOD323-2
to RB717F_SOT323-3
X02
P41 +DCIN 2013
/02/21
Compal-
ESD team
Anderson
27 X02
Goliad 14 need change PD1(6 pin*1) as Goliad 12
(3 pin*2), the main and 2nd source also,
these two ESD diode need to close battery connector
as possible.
Change PD1 and add PD2
From : SC300001100 (S DIO(BR) IP4223CZ6 SO-6 ESD)
To : SCA00001W00 (S ZEN ROW TVNST52302AB0 C/C SOT523
ESD after check 1.75X1.7xH=0.9mm <ME H=1.5mm)
follow ESD team request
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 3
52 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 3
52 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 3
52 57Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Page 1
Page 1Page 1
Page 1
Solution Description
Solution DescriptionSolution Description
Solution Description Rev.
Rev.Rev.
Rev.
Page#
Page#Page#
Page# Title
TitleTitle
Title
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Item
ItemItem
Item Issue Description
Issue DescriptionIssue Description
Issue DescriptionDate
DateDate
Date Request
RequestRequest
Request
Owner
OwnerOwner
Owner
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
28 P48
1). Change PC703 from 0.1U to 1U
P/N: SE000006900 (S CER CAP 1UF 25V K X5R 0603)
2). Change PC706 from 1U to 10U
P/N: SE00000QK00 (S CER CAP 10U 25V K X5R 0805 H1.25)
3). Change PC708 from 0.01U to 0.1U
P/N: SE00000G880 (S CER CAP 0.1U 25V K X5R 0402)
4). Change PR734 from 100K ohm to 210K ohm
P/N: SD034210380 (S RES 1/16W 210K +-1% 0402)
Change PR735 from 46.4K ohm to 69.8K ohm
P/N: SD034698280 (S RES 1/16W 69.8K +-1% 0402)
5). Add @PC740
6). Change PR738.pin1 from BQ24715_REGN connect to +3.3V_ALW2.
Change PR738 from 118K ohm to 48.7K ohm
P/N: SD034487280 (S RES 1/16W 48.7K +1% 0402)
Change PR744 from 12K ohm to 10K ohm
P/N: SD034100280 (S RES 1/16W 10K +-1%
7). Change PR748 from 6.8 ohm to 210K ohm
P/N: SD034442A80 (S RES 1/16W 44.2 +-1% 0402)
Change PR749 from 10 ohm to 69.8K ohm
P/N: SD00000W200 (S RES 1/16W 59 +-1% 0402)
1) For Input current sense stablilze
2) To provent charger into sleep mode dual
AC transient.
3) Fine tune ACOK response time.
4) Adapter protect rating setting
5) Fine tune H_PROCHOT# response time.
6) Improve ACAV_IN_NB ref voltage accuracy.
7) Improve current sense accuracy.
Selector 2013/
02/21
Compal X02
follow E5- Salado 14"15" schematic
X02
29 P48 Selector 2013/
02/27
Compal Modify resistor value to meet voltage
tolerence
1). Change PR802,PR827,PR840 from 47K ohm to 100K
P/N: SD028100380 (S RES 1/16W 100K +-5% 0402)
2). Change PR804,PR826,PR839 from 240K to 100K
P/N: SD028100380 (S RES 1/16W 100K +-5% 0402)
X02_1
30 2013/
03/18
Compal follow E5- Salado 14"15" schematic to
add charger input MLCC to 88u
1). Add PC741, PC742
P/N: SE00000XH80 (S CER CAP 22U 25V M X5R 0805 H1.25)
Charger
P47
+5V/+3.3V
P42
1.35V/0.675V
P43
+1.05V_MP
P44
31 2013/
03/20
Compal support DFX team change choke layout pad
to avoid soldering issue
1). Change PL101, PL102, PL200, PL300 PCB FootPrint
change
from CYNTE_PCMC063T-2R2MN_2P
to CYNTE_PCMB064T-3R3MS_2P
X02_1
X02_1
32 2013/
03/21
Compal Support acoustic team to reduce noise
1). Add PC930
P/N: SGA00002680 (S POLY C 330U 2.5V Y D2 LESR9M
EEFS H1.9)
P47 Charger
2). Del PC916, PC920, PC925, PC926, PC927, PC929
P/N: SE000001120 (S CER CAP 22U 6.3V M X5R 0805 H0.85)
P49 PROCESSOR
DECOUPLING
Vcore
P46
3). Change PC738
from 33U(SGA00005M00) to 100U
P/N: SGA00008R00 (S POLY C 100U 20V M D ESR55M
(D3L_H=2.8mm)
4). Depop PC928, PC924, PC919, PC915, PC911
and Add PC901
P/N: SE000001120 (S CER CAP 22U 6.3V M X5R 0805 H0.85)
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 4
53 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 4
53 57Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
PWR_PIR 4
53 57Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page# Title
X01DELL40 36
3 HW
HW
1 HW
2 X01
X01
4 HW X01COMPAL
HW5 COMPAL X01
6 HW
10/23/2012
COMPAL X01
7 HW
COMPAL
X01
8
COMPAL
9
X01COMPAL
HW
COMPAL10
X01
HW COMPAL11 X01
HW12 COMPAL X01
13 HW COMPAL X01
14 HW COMPAL X01
15 HW COMPAL X01
DELL drop Media LED function Remove backlight LED function and change connector to 6pin
21
10/23/2012
22 DELL10/23/2012 DELL drop ALS function Remove ALS interface from EC and CPU side than move touch screen
signal to eDP side
22 10/23/2012 change LCDVDD power control circuit change U9 from TPS22966 to APL3512 solution
22 10/23/2012 change Webcam power enable from PCH pop R106 and de-pop R102
10 10/23/2012 remove eDP backlight control pull up resistor Remove RC150
10
10/23/2012
Remove EMI solution at Speaker side Remove R132, R133, R134 and R135
21
Vendor update schematic for power saving
change +1.05V_RUN_VMM power enable signal from LP_EN to DOCKED and add
+3.3V_RUN_VMM for DP2320 series 3.3V power rail
remove L3 and move U6.E5 to +1.05V_VMM_VDD power rail
change U6.J4 to +3.3V_RUN_VDDA
R85 change to 3.74K_1%
remove LP_EN, R232 and U6A.A5 to NC
remove R55 and pop-option R207 when use VMM2310
HW 10/23/2012 change VMM2320 config remove DP to VGA PTN3392 circuit and add 0ohm pop option for 2320 config
18 19 10/23/2012 COMPAL Remove DIMM VERF power rail from power side Remove RD2, RD4, RD8 and RD9
X01HW 10/23/2012
26 10/23/2012 refer salado 14" to change PCBEEP circuit remove C132,C146,R146,R138,C133 and C143 than add C145,C146,R147,R151
and de-pop R194 R153
26 10/23/2012 If doesn't has external power, Sleeve will
be floating mode and no reference GND.
Add AUD_NB_MUTE# to control Sleeve pin.
26
10/23/2012
change miniDP OCP solution remove D10 R160 F2 and add U50 de-pop C383
37,36,12 20
11/8/2012
GPIO map update to 2.7 version
Move EC_WAKE# from ECE5048[L]5 to MEC5075 GPIO52.
Change name: 1.5V_SUS_PWRGD to 1.35V_SUS_PWRGD for DDR3L.
Add NFC_DET# ECE5048 GPIOL[5] to NFC moudle and add pull
up 10K resistor
37 Change board ID to X01 change R392 form 240K to 130Kohm
10
12
21
36
37
11/8/2012 change to network resistor
remove RC167,RC202,RC293 and RC290 then add RP4
remove RC295,RC189,RC191 and RC51 then add RP5
remove RC177,RC15,RC62 and RC43 then add RP6
remove RC201,RC203,RC204 and RC208 then add RP7
remove R299,RC300,R301 and R296 then add RP8
remove R53,R54,R70 and R72 then add RP9
remove RC216,RC178,RC80 and RC21 then add RP11
remove RC77,RC85,RC71 and RC215 then add RP12
remove RC207,RC214,RC205 and RC164 then add RP13
remove RC229,RC188,RC34 and RC196 then add RP14
remove R359,R361,R451 and R387 then add RP15
remove R445,R456,R457 and R454 then add RP16
remove R346,R347,R364 and R365 then add RP17
remove R344,R368,R369 and R372 then add RP18
remove R401,R348,R350 and R377 then add RP19
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (1/5)
54 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (1/5)
54 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (1/5)
54 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page# Title
X01
HW
HW
HW
X01
X01
ME X01
COMPAL
HW COMPAL X01
HW
COMPAL
X0121
HW
COMPAL
X01
23
COMPAL
X01
COMPAL
HW
COMPAL26
X01
HW COMPAL27 X01
HW28 COMPAL X01
29 HW COMPAL X01
30 HW COMPAL X01
31 HW COMPAL X01
16
HW X01
17
HW COMPAL X01
34
HW COMPAL X01
35
HW COMPAL X01
COMPAL
ME COMPAL
X01
HW
11/8/201222
11/8/2012
Add Mic power and remove DBC function Add 3.3V_RUN for Mic power and remove DBC function at JeDP.2
39 +1.05V_MODPHY can't meet INTEL timing spec change +1.05V_MODPHY to MOS solution
18 19 11/8/2012 refer PDG1.0 to change SODIMM control
circuit resistor
change RC68, RC126 and RC173 from 2.2 to 2ohm 1%
change RC67,RC69,RC130,RC132,RC217 and RC221
from 1.82K to 1.8Kohm 1%
19 27,32,26,20,40 11/8/2012 COMPAL ME change connector change JmDP1,JSIM1,JSPK1,JNFC1,JMEDIA,SW1,JSD1
20 2, 3, 6, 34 11/13/2012 update SATA topology fro Mainstream CPU exchange SATA1&SATA2 topology
12 11/13/2012 refer Goliad 12" add LAN_WAKE# T-topology add RC177 to link LAN_WAKE# and EC_WAKE#
22 15 11/13/2012 remove RC252 for cost saving change RC252 to PJP11(1mm jumper-short)
34 11/14/2012 ME change Docking connector change JDOCK1
24 16 11/14/2012 INTEL MOW_WW46 request change for VCCUSB3PLL and
VCCSATA3PLL
change CC42 and CC49 from 1u_0402 to 22u_0603
change CC76 and CC77 from 100u_1206 to
22u_0603
25 COMPALHW 11/14/2012 change AND gate to same source Change U20, U26, U29 and U30 from SA74108040L to SA00708012L 20,28,30,31
33 11/14/2012
11/14/2012
add USB power cap 150u co-layout with 100u add C86,C89(1206) co-layout with C280,C290(B2) X01
24 change AUX/DDC power rail same as VMM2320 Change U11,U13 power rail from +3.3V_RUN to +3.3V_RUN_VMM
11/14/201238,12 remove +3.3V_TP power load switch solution remove U40, R458,C424 and C423
31 11/14/2012 remove TPS22965 solution remove U51(TPS22965) and U34(TPS22965) than add U3(TPS22966)
22 11/15/2012 change diode to daul-diode fro cost saving remove D4,D5,D6,D7 and add D10,D21
9 11/16/2012 change APS pin 11 net_name for DELL APS debug Change JAPS1.11 net name from SIO_PWRBTN# to POWER_SW#_MB
32
12,28
11/16/2012
support TLS confidentility change net name from HOST_ALERT1_R_N to PCH_GPIO15, and pop RC190
remove R188
33
11/16/2012 add mSATA_DSLP for mSATA HDD
add mSATA_DEVSLP from UC1.P2(DEVSLP1/GPIO38) to mSATA_HDD(JMINI2.44)
and pull up 10K(R160 depop) to +3.3V_mSATA_WWAN.
de pop HDD_DEVSLP pull up resistor R155
11/16/2012
31,12
37
11/16/2012
change thermal diode for cost saving change D11,D13 and D14 form SB000008P0L to SB33904510L
38,26,30,22 change Bead for cost reduce
change L44 and L45 from SM01000558L to SM01000C500
change L35 and L36 from SM01000AM0L to SM01000C500
change LE1 from SM01000DH0L to SM01000BV00
change L21 from SM01001788L to SM010005N00
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (2/5)
55 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (2/5)
55 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (2/5)
55 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page# Title
X01
HW
HW
HW
X01
X01
HW X01
COMPAL
HW COMPAL X01
COMPAL
X01
COMPAL
X01
X01
X01
X01
X01
X01
X01
36
X01
37
X01
X01
X01
X01
X01
11/19/2012
29
37
39
11/19/2012
COMPAL
40
11/19/2012 exchange JUSH1,JMEDIA pin define for ME update exchange JUSH1 and JMEDIA pin define
38
25 remove HDD_DEVSLP resisrtor
change thermal OTP to 98 degree change R394 from 1.24K to 1.82K_1%
remove R189
28 11/20/2012 LOM LED issue reverse Q32,Q33 of C & D gate
22 40 38
26 11/22/2012 Remove ESD reserve location Per ESD experiment, D3,D27,D22,DE1,DE2 can be remove
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
HW COMPAL41 15 11/23/2012 Per Intel CRB updated Change VCCST_PWRGD pull high value from 10K ohm to 1K ohm.
HW42 COMPAL26 11/23/2012 Universal Jack no longer supported on X5 Remove D9,D11,R209,R210,C195,C196,R198,R199
43 HW12 11/27/2012 COMPAL Change GPIO connection change NFC_DET# connection from EC GPIOL[5]/PWM2 to LPT_LP GPIO59
44 6 HW 11/28/2012 COMPAL To support mainstream and Premium CPU,
change to SATA port assignment.
Change docking SATA port form SATA port 1 to SATA port 0 and spindle HDD
from port 0 to port 1
45 12 HW 11/28/2012 COMPAL To support the SATA DevSLP
function for new SATA port assignment.
Change DEVSLP0/GPIO33 to mSATA_DEVSLP
and DEVSLP1 to HDD_DEVSLP
46 12 HW 11/28/2012 COMPAL USB port 0 EA result Change L42 from DLW21SN900SQ2L to OCE2012120YZF
47 31 HW 11/28/2012 COMPAL Change WWAN power control. Change power control signal from 3.3V_WWAN_EN
& 3.3V_mSATA_EN to MCARD_WWAN_PWREN
3148 HW 11/28/2012 COMPAL Change WLAN power control. Change power control signal from 3.3_1.5V_WLAN_EN
to AUX_EN_WOWL
3849 HW 11/28/2012 COMPAL Per EMI test result Remove L44,L45
50 34 HW 11/28/2012 COMPAL Per EMI test result Change R259,R252,R253,R255,R257,R263,R265,R266
R260,R261,R254,R256,R262,R264,R258,R267 from 0 ohm to 33 ohm.
51 9 HW 1/9/2013 COMPAL add RSMRST pull down resistor add RC136
52 38 HW 1/9/2013 COMPAL add repeater at USB3 RX IO connector side add U51 circuit
53 22 HW 1/9/2013 COMPAL change LCDVDD power chip soft start cap change C430 from 0.1u to 0.01u
54 36 1/9/2013 COMPAL change dock SMbus alert pull up resistor change R292 from 10K to 100Kohm
55 40
HW
HW 1/17/2013 COMPAL change LED series resistor form LED measure change R435 from 1.8K to 390ohm, change R430 from 2.2K to 220ohm,
change R434 from 220 to 150ohm, change R427 from 1K to 390ohm. X01
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (3/5)
56 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (3/5)
56 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (3/5)
56 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page# Title
X02
HW
HW
HW
X02
HW
COMPAL
HW
COMPAL
X02
COMPAL
X02
COMPAL
X02
X02
X02
X02
X02
X02
56
X02
57
X02
X02
X02
X02
X02
1/23/2013
1 9 1/23/2013 add XDP@ for XDP component change XDP circuit to XDP@
37 change board ID to ST config change R392 from 130K to 33Kohm
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
HW COMPAL update XDP circuit for INTEL ITE can't boot
X02
58 37 1/30/2013 change HW thermal shortdwon temperature change R394 from 1.82K to 1.58Kohm
2/1/2013
X02
X0259 22 change eDP connector pin define for factory
burn out issue
1.add pull down 1Kohm at JEDP1.29
2.Swap JEDP1.1 and JEDP1.2
60 26 2/1/2013 COMPAL update speaker EMI bead for audio precsison
fail issue change L22~L25 from SM01000L300 to SM010019400
61 26 2/1/2013 remove RC121 and pop RC102
62 36 HW 2/18/2013 COMPAL power update AC_DIS# circuit to high active change AC_DIS# net name to AC_DIS
63 11 35 HW 2/21/2013 COMPAL Fixed 2 USB IO Port use the same OC# signal
issue
1.change IO/B USB OC# from USB_OC0# to USB_OC1#
2.change USB_OC1#/3# to USB_OC1#, USB_OC3# and add RC166 for OC3# pull
up resistor
64 7 HW 2/21/2013 COMPAL add jumper for clock buffer co-layout add PJP12, PJP13 and PJP14 beween UC5
65 7 HW 2/21/2013 COMPAL change TAA connector from ME request change JTAA1 from ACES_50185-02041-001 to PANAS_AXK820145WG
66 16 HW 2/22/2013 add ESD solution
1.Pop CC71 and CC72
2.Add two 22u 0603 between +VCC_CORE and +1.05V_RUN power plan
3.Add 22u 0603 between +1.05V_RUN and +3.3V_RUN power plan
67 33 HW 2/22/2013
COMPAL
COMPAL change USB charge solution for SAMSUNG phone change U39 from SA00004VH00 to SA00006L600
68 7 HW 2/25/2013 COMPAL add RF noise solution at clock buffer 1. add CC86~CC89 between clock signal
2. add RC62 for UC5 power rail
3. change RC100 from 0ohm short to 10ohm
4. change UC5 from IDT_5V60034DCG8 to CYPRESS_CY2304SXI-1T
69 23 HW 2/25/2013 COMPAL refer INTEL MOW to update HDMI cost reduce
level shifter main link
cahnge R462~R469 resistor from 680(SD034680080) to 470ohm(SD034470080)
70
9
HW 2/25/2013 COMPAL
add EMI solution at H_PROCHOT#
change net name from USB_OC3# to SIO_EXT_SMI#, and change SIO_EXT_SMI#
to PCH_GPIO45
11 12 For AOAC function, can’t wake up from S3
through SIO_EXT_SMI#
add CC149_22P_0402(SE071220J80) depop for EMI requestCOMPAL71 HW 2/26/2013
72 26 HW 2/26/2013 COMPAL for Fixed BIOS flash HOTSOS issue change R154 from PCH_AUDIO_EN to RUN_ON
73 7 HW 2/28/2013 COMPAL remove clock Buffer solution 1.remove item 68 location and CC25 CC57 CC80 CC22 UC5 RC100 and CC23
2.change RC65 to 0ohm_short
74 7 29 HW 2/28/2013 COMPAL refer GPIO3.0 to add PCH_TPM_LPC_EN add RC56 for pull up enable signal and add R198 for pop option
X0275 30 HW 3/12/2013 COMPAL For O2 enters into test mode unexpectedly
with SD card inserted incompletely issue.
1. SD/MMCCD# add C256(0.1uF) & R493(1M) pull-down to GND
2. C222 change to 1uF(SE000000K80) from 0.1u(SE00000G880)
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (4/5)
57 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (4/5)
57 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (4/5)
57 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page# Title
HW X02COMPAL
X02
X02
X02
X02
X02
76
A00
A00
A00
A00
7 3/13/2013 Base on INTEL EDS SPEC Update Rev 1.5.1
1. LANCLK_REQ# change to UC1.AD1 from UC1.Y5
2. MINI1CLK_REQ# change to UC1.T2 from UC1.U2
3. MINI2CLK_REQ# change to UC1.N1 from UC1.T2
4. MMICLK_REQ# change to UC1.U5 from UC1.AD1
5. PCH_TPM_LPC_EN change to UC1.Y5 from UC1.U5
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
A00
X02
X02
77 HW7 3/14/2013 COMPAL For PCIE CLK & PCIE CLK REQ signal mapping
1. CLK_PCIE_LAN change CLKOUT_PCIE port2
2. CLK_PCIE_MINI2 change CLKOUT_PCIE port3
3. CLK_PCIE_MMI change CLKOUT_PCIE port4
4. CLK_PCIE_MINI1 change CLKOUT_PCIE port5
78 21 HW 3/15/2013 COMPAL remove VMM2310 co-layout schematic remove U8, R93, R98, R105 circuit
79 15 HW 3/15/2013 COMPAL add ESD solution add CC22 and CC57
80 7 HW 3/18/2013 COMPAL For INTEL request PCIECLK_REQ0# add RC57(10k) pull-high to+3.3V_RUN
81
21 HW 3/20/2013 COMPAL For Synaptics vender request 1. Delete R78/R80/R82
2. add C132
X02
82 9 12 HW 3/21/2013 COMPAL add ESD solution add CC90 and CC91
83 HW COMPAL
84
35
HW
4/02/2013
COMPAL
For USB3.0 1M cable Pop R478, R479 and change R476 to 3.01K ohm
85 33 HW
4/25/2013
COMPAL
change board ID to A00 version change R392 from 33K to 1K ohm A0037
4/25/2013 for JUSB2 can't wake from S3 issue change U33 power rail from +3.3V_RUN to +3.3V_SUS
A0086 9 HW 4/25/2013 COMPAL for XDP signal should be contact to PCH change RC97 and RC135 to 0ohm short
87 28 HW 4/25/2013 COMPAL for support Vpro reset pin depop U20 and add R145
88 12 HW 4/25/2013 COMPAL reserve for support non vpro pop option pin reserve RC292 pull down
89 40 HW 4/25/2013 COMPAL current LED resistor for LED EA measure
R434 change from 150 to 330ohm, R430 change from 220 to 330ohm, R438
change to 2.2K to 150ohm, R436 change from 2.2K to 220ohm and R429
change from 620 to 220ohm
90 10 HW 5/14/2013 COMPAL HDD Free Fall Sensor A00add R494 & R495
91 15 16 HW 5/16/2013 COMPAL add ESD solution Pop CC57, depop CC71 , CC72
Follow Goliad12, Pop RC290 & change RC292 from 10K to 100ohm.91 12 HW 5/16/2013 COMPAL reserve for support non vpro pop option pin
A00
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (5/5)
58 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (5/5)
58 58Friday, May 17, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9591P
0.4
EE P.I.R (5/5)
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