Compal LA 9941P Schematics. Www.s Manuals.com. R0.1 Schematics

User Manual: Motherboard Compal LA-9941P VAUB0 - Schematics. Free.

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Page Count: 63

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Dell/Compal Confidential
Schematic Document
VAUB0
PCB NO :
BOM P/N :
MODEL NAME :
LA-9941P
DAA0006W000
TBD
Phantom(Shark Bay)
Rev: 0.1 (X00)
DISCRETE VGA N14P(optimus) --- Testarossa
DISCRETE VGA N15P(optimus) --- Testarossa-P
Hasweill(BGA) + Lynx Point
2013-01-02
@ : Nopop Component
CONN@ : Connector Component
TPM@ : TPM function
N14@ : DGPU N14P-GT
Hynix 2G
N15@ : DGPU N15P-Q1
DSP@ : DSP function
Samsung 2G
Hynix 2G
Samsung 2G
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
1 62Wednesday, September 04, 2013
2011/08/25 2011/08/25
Compal Electronics, Inc.
Cover Page
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
1 62Wednesday, September 04, 2013
2011/08/25 2011/08/25
Compal Electronics, Inc.
Cover Page
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
1 62Wednesday, September 04, 2013
2011/08/25 2011/08/25
Compal Electronics, Inc.
Cover Page
UV6
K4G41325FC-HC04_FBGA170P~D
VRAMSR3@
UV6
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR1@
U7
PCH
R1@
UV5
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR1@
U6
CPU
R1@
UV1
N14P-GT
N14R1@
UV9
K4G41325FC-HC04_FBGA170P~D
VRAMSR1@
UV1
N15P-Q1
N15R1@
UV10
K4G41325FC-HC04_FBGA170P~D
VRAMSR1@
UV9
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR3@
UV6
K4G41325FC-HC04_FBGA170P~D
VRAMSR1@
ZZZ
PCB
R1@
UV5
K4G41325FC-HC04_FBGA170P~D
VRAMSR1@
UV10
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR3@
UV6
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR3@
U6
CPU
R3@
UV5
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR3@
U7
PCH
R3@
UV9
K4G41325FC-HC04_FBGA170P~D
VRAMSR3@
UV9
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR1@
UV1
N15P-Q1
N15R3@
UV5
K4G41325FC-HC04_FBGA170P~D
VRAMSR3@
ZZZ
PCB
R3@
UV10
K4G41325FC-HC04_FBGA170P~D
VRAMSR3@
UV10
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR1@
UV1
N14P-GT
N14R3@
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
100MHz
5GB/s
DMI x4
Processor
Haswell
Intel
P.5~13
Lynx Point LP
Intel
SPI Flash
(BIOS 8MB)
P16~23
Port 0
PCI-E x1
Dual Channel
Memory Bus (DDR3L)
35W QC
BGA 695 Balls
BGA 1364
P.16
P.39
RTC CKT.
Power On/Off CKT.
DC/DC Interface CKT.
P.33~34
SATA3.0 HDDP.43
Compal Electronics,Inc.
page 14,15
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
DDRIII-DIMM X2
1.35V DDR3L 1600 MHz
Port 1
Port 2 SATA ODD Conn. P.43
Audio Codec
ALC3661
Int. Speaker x2
HD Audio
Port 1,2
USB 3.0
Digital Camera
Port 12
P.35
USB2.0 Port 0,1
LPC Bus
P.38
P.39
ENE KBC
KB9012 +
KC3810
Int.KBD
P.39
Touch Pad
16GB Max
PEG 3.0 x16
P.42
( Full )
Mini Card-2 (mSATA)
P.45
USB 3.0 Conn. X2
( USB Charger )
PS/2
Discrete TPM
AT97SC3204
33MHz
P.40
P.16
SATA3 Re-driver
PS8520 P.43
P.44
USB Powershare
TPS2543 X2
P.48
( Combo )
Digi Mic
Headphone / Mic. Jack
Port 3 Port 4
AMP TI 3113P.48
eDP
Mini DP P.37
DP
HDMI HDMI
Redriver P.36
SPI
NFC
Magnetic Peak
P.49
SMBus
ALS Sensor
SMBus
P.35
P.39
Fan Control
CPU XDP
Conn. P.6
VRAM * 4
GDDR5
128M*16 x4 =1G
P.29~30
GPU
N14P-GT
P.24~28
GB4-128
PWM
FFS P.43
RTC Counter
IDT 1337
P.46
HDMI P.36
P.40
Touch Panel
Conn.
P.35
Port 9
P.42
Port 4
USB2.0
Mini Card-1 (Half)
(WLAN+BT4.0)
Daughter board
Card Reader
3 in 1
RTS5249
Socket
ALC5505
DSP
P.46
P.47 P.47
P.45
USB 3.0
Re-driver
mDP
Redriver P.37
Daughter board
FHD
(eDP 1.3)
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1C
2 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1C
2 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1C
2 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LA-9941P M/B
Project Code : VAUB0
File Name : LA-9941P
Compal Confidential
Touch Pad
HDD
LCD Panel
Wire
40 pin
Wire
24 pin
JHDD
JeDP
FFC
I/O B
90 pin
JTB1
JIO1
FFC
8 pin
Touch screen
Wire
6 pin
JTS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
3 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
3 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
3 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
A
A
1 1
CAMERA
JMINI1 (WLAN)
None
8
9
None
10
USB Conn 2 (Power share)
11
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
12
13
PCH
USB Conn 3 (Power share)
Touch screen
None
USB Conn 4 (Power share)
None
None
None
None
USB Conn 1 (Power share)
MINI CARD-1 WLAN
Lane 7
Lane 8 None
None
Lane 5
Lane 6
None
PCI EXPRESS
Lane 1
DESTINATION
Lane 2
Lane 3
Lane 4
None
None
CARD READER
None
None
HDD
SATA5
SATA4
SATA3
SATA2
SATA1
DESTINATION
SATA0
SATA
None
None
SSD
None None
None
PCH_LOOPBACK
EC LPC
PCI0
CLKOUT
None
PCI1
PCI2
PCI3
DESTINATION
PCI4
None
CLKOUT_PCIE7 None
None
CLKOUT_PCIE6
CLKOUT_PCIE4
CLKOUT_PCIE5
CLKOUT_PCIE1
CLKOUT_PCIE2
CLKOUT_PCIE3
CLKOUT_PCIE0
DESTINATIONDIFFERENTIAL
CLK
CLKOUT_PEG_B
FLEX CLOCKS DESTINATION
CLKOUTFLEX1
CLKOUTFLEX2
CLKOUTFLEX3
CLKOUTFLEX0None
MINI CARD-1 WLAN
None
None
CARD READER
None
CLK_PCI_TPM
None
None
None
USB Conn 2 (Power share)
USB Conn 3 (Power share)
USB3
1
DESTINATION
2
3
4
USB Conn 1 (Power share)
USB Conn 4 (Power share)
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
4 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Notes List
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
4 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Notes List
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
4 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Notes List
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SMBDATA
SMBCLK
U11
R10
+3V_PCH
2.2K
2.2K
DIMMA SMBUS Address [A0]
U8
R7
+3V_PCH
2.2K
2.2K
SML0CLK
SML0DATA
PCH
K6N11
SMBUS Address [0x9a]
SMBUS Address [TBD]
TP
DMN66D0
DMN66D0
2.2K
2.2K
+3VS
KBC
+3V_PCH
2.2K
2.2K
SML1CLK
SML1DATA
DMN66D0 DMN66D0
Compal Electronics, Inc.
+3VS
DIMMB SMBUS Address [A0]
FFS SMBUS Address [TBD]
DMN66D0
DMN66D0
SMBUS Address [TBD]NGFF
60
58
2.2K
2.2K
+3VS_NGFF
XDP
51
53
SMBUS Address [TBD]
Touch
Screen
9
10
SMBUS Address [TBD]
NFC
DMN66D0
DMN66D0
8
9
2.2K
2.2K
+3VS
SMBUS Address [TBD]
9
10
ALS
6
4
4
5
202
200
202
200
SMBUS Address [TBD]
B8
A6
EC_SMB_CK1
EC_SMB_DA1
2.2K
2.2K +3VS
SMBUS Address [12]
4
5
8
CHARGER
9
A7
A8
+3VALW_EC
2.2K
2.2K
100 ohm
100 ohm BATT SMBUS Address [16]
EC_SMB_CK1
EC_SMB_DA1
SMBUS Address [TBD]
7
ADS1115
8
7
SMBUS Address [TBD]
ADS1115
8
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
SMBus Block Diagram
Custom
5 62Tuesday, September 03, 2013
2011/08/25 2012/07/15
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
SMBus Block Diagram
Custom
5 62Tuesday, September 03, 2013
2011/08/25 2012/07/15
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
SMBus Block Diagram
Custom
5 62Tuesday, September 03, 2013
2011/08/25 2012/07/15
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDP CONN
The resistor
for HOOK2 should be
placed such that the
stub is very small
on CFG0 net
PT
PT
PT
XDP_PRDY#
XDP_PREQ#
CFG3
CFG2
CFG5
CFG4
CFG7
CFG6
H_CPUPWRGD_XDP
XDP_TCK
CLK_CPU_ITP#
CLK_CPU_ITP
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
IMVP_VR_PG
CFG15
CFG14
CFG13
CFG12
CFG18
CFG19
CFG10
CFG11
CFG8
CFG9
CFG16
CFG17
XDP_BPM#1
XDP_BPM#0
CFG1
CFG0
PBTN_OUT#[18,38]
IMVP_VR_PG[18,38,58]
PCH_SMBCLK[14,15,17,39,43]
PCH_SMBDATA[14,15,17,39,43]
CLK_CPU_ITP# [17]
CLK_CPU_ITP [17]
XDP_TDO [8]
XDP_TDI [8]
XDP_TMS [8]
XDP_PREQ#[8]
XDP_PRDY#[8]
CFG2[10]
CFG3[10]
CFG4[10]
CFG5[10]
CFG6[10]
CFG7[10]
H_CPUPWRGD[20,8]
XDP_TCK[8]
PLT_RST# [18,38,40,42,8]
XDP_TRST# [8]
XDP_DBRESET# [18,8]
CFG14 [10]
CFG15 [10]
CFG12 [10]
CFG13 [10]
CFG19 [10]
CFG18 [10]
CFG10 [10]
CFG11 [10]
CFG8 [10]
CFG9 [10]
CFG17 [10]
CFG16 [10]
XDP_BPM#0[8]
XDP_BPM#1[8]
CFG0[10]
CFG1[10]
CPU_PWR_DEBUG[12]
+VCCIO_OUT +VCCIO_OUT
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
6 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
6 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
6 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
JXDP
SAMTE_BSH-030-01-L-D-A-TR
CONN@
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
45
45 46 46
47
47 48 48
49
49 50 50
51
51 52 52
53
53 54 54
55
55 56 56
57
57 58 58
59
59 60 60
RU7 1K_0402_5%~D
1 2
RU36 1K_0402_5%
1 2
RU12 1K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Compal Electronics, Inc.
PEG_COMP
CAD Note:
Trace width=12 mils ,Spacing=15mil
Max length= 400 mils.
PEG_HTX_GRX_P7 PEG_HTX_C_GRX_P7
PEG_HTX_GRX_P12 PEG_HTX_C_GRX_P12
PEG_HTX_GRX_P1 PEG_HTX_C_GRX_P1
PEG_HTX_GRX_P6 PEG_HTX_C_GRX_P6
PEG_HTX_GRX_P11 PEG_HTX_C_GRX_P11
PEG_HTX_GRX_P0 PEG_HTX_C_GRX_P0
PEG_HTX_GRX_P5 PEG_HTX_C_GRX_P5
PEG_HTX_GRX_P10 PEG_HTX_C_GRX_P10
PEG_HTX_GRX_P15 PEG_HTX_C_GRX_P15
PEG_HTX_GRX_P4 PEG_HTX_C_GRX_P4
PEG_HTX_GRX_P9 PEG_HTX_C_GRX_P9
PEG_HTX_GRX_P14 PEG_HTX_C_GRX_P14
PEG_GTX_C_HRX_N6
PEG_GTX_C_HRX_N11
PEG_GTX_C_HRX_N0
PEG_GTX_C_HRX_N5
PEG_GTX_C_HRX_N10
PEG_GTX_C_HRX_N15
PEG_GTX_C_HRX_N4
PEG_GTX_C_HRX_N9
PEG_GTX_C_HRX_N3
PEG_GTX_C_HRX_N14
PEG_GTX_C_HRX_N8
PEG_GTX_C_HRX_N13
PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_N7
PEG_GTX_C_HRX_N12
PEG_GTX_C_HRX_N1
PEG_GTX_C_HRX_P13
PEG_GTX_C_HRX_P6
PEG_GTX_C_HRX_P11
PEG_GTX_C_HRX_P0
PEG_GTX_C_HRX_P5
PEG_GTX_C_HRX_P10
PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_P9
PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_P15
PEG_GTX_C_HRX_P8
PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_P14
PEG_GTX_C_HRX_P7
PEG_GTX_C_HRX_P12
PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_P[0..15]
PEG_GTX_C_HRX_N[0..15]
PEG_HTX_C_GRX_N[0..15]
PEG_HTX_C_GRX_P[0..15]
PEG_COMP
PEG_HTX_GRX_N8 PEG_HTX_C_GRX_N8
PEG_HTX_GRX_N13 PEG_HTX_C_GRX_N13
PEG_HTX_GRX_N2 PEG_HTX_C_GRX_N2
PEG_HTX_GRX_N7 PEG_HTX_C_GRX_N7
PEG_HTX_GRX_N12 PEG_HTX_C_GRX_N12
PEG_HTX_GRX_N1 PEG_HTX_C_GRX_N1
PEG_HTX_GRX_N6 PEG_HTX_C_GRX_N6
PEG_HTX_GRX_N11 PEG_HTX_C_GRX_N11
PEG_HTX_GRX_N0 PEG_HTX_C_GRX_N0
PEG_HTX_GRX_N5 PEG_HTX_C_GRX_N5
PEG_HTX_GRX_N10 PEG_HTX_C_GRX_N10
PEG_HTX_GRX_N15 PEG_HTX_C_GRX_N15
PEG_HTX_GRX_N4 PEG_HTX_C_GRX_N4
PEG_HTX_GRX_N9 PEG_HTX_C_GRX_N9
PEG_HTX_GRX_N14 PEG_HTX_C_GRX_N14
PEG_HTX_GRX_N3 PEG_HTX_C_GRX_N3
PEG_HTX_GRX_P3 PEG_HTX_C_GRX_P3
PEG_HTX_GRX_P8 PEG_HTX_C_GRX_P8
PEG_HTX_GRX_P13 PEG_HTX_C_GRX_P13
PEG_HTX_GRX_P2 PEG_HTX_C_GRX_P2
DMI_CRX_PTX_P0[18]
DMI_CRX_PTX_N1[18]
DMI_CRX_PTX_P3[18]
DMI_CRX_PTX_N3[18]
DMI_CRX_PTX_P2[18]
DMI_CRX_PTX_N0[18]
DMI_CRX_PTX_N2[18]
DMI_CRX_PTX_P1[18]
DMI_CTX_PRX_P0[18]
DMI_CTX_PRX_N1[18]
DMI_CTX_PRX_P3[18]
DMI_CTX_PRX_P2[18]
DMI_CTX_PRX_N0[18]
DMI_CTX_PRX_N3[18]
DMI_CTX_PRX_P1[18]
DMI_CTX_PRX_N2[18]
FDI_INT[18]
FDI_CSYNC[18]
PEG_HTX_C_GRX_N[0..15] [24]
PEG_HTX_C_GRX_P[0..15] [24]
PEG_GTX_C_HRX_N[0..15] [24]
PEG_GTX_C_HRX_P[0..15] [24]
+VCCIOA_OUT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(1/7) DMI,FDI,PEG
Custom
7 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(1/7) DMI,FDI,PEG
Custom
7 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(1/7) DMI,FDI,PEG
Custom
7 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
CU5 0.22U_0402_16V7K~D
1 2
CU29 0.22U_0402_16V7K~D
1 2
PEG
DMI
FDI
HASWELL_BGA
1 OF 12
U6A
HASWELL_BGA1364
@
PEG_RCOMP AH6
PEG_RXN0 E10
PEG_RXN1 C10
PEG_RXN2 B10
PEG_RXN3 E9
PEG_RXN4 D9
PEG_RXN5 B9
PEG_RXN6 L5
PEG_RXN8 M4
PEG_RXN7 L2
PEG_RXN9 L4
PEG_RXN10 M2
PEG_RXN11 V5
PEG_RXN12 V4
PEG_RXN13 V1
PEG_RXN14 Y3
PEG_RXP0 F10
PEG_RXN15 Y2
PEG_RXP1 D10
PEG_RXP2 A10
PEG_RXP3 F9
PEG_RXP5 A9
PEG_RXP4 C9
PEG_RXP7 L1
PEG_RXP6 M5
PEG_RXP8 M3
PEG_RXP10 M1
PEG_RXP9 L3
PEG_RXP11 Y5
PEG_RXP12 V3
PEG_RXP13 V2
PEG_RXP15 Y1
PEG_RXP14 Y4
PEG_TXN0 B6
PEG_TXN1 C5
PEG_TXN2 E6
PEG_TXN5 E3
PEG_TXN7 G3
PEG_TXN6 J5
PEG_TXN8 J3
PEG_TXN9 J2
PEG_TXN10 T6
PEG_TXN11 R6
PEG_TXN12 R2
PEG_TXN13 R4
PEG_TXN14 T4
PEG_TXN15 T1
PEG_TXP1 B5
PEG_TXP0 C6
PEG_TXP2 D6
PEG_TXP3 E4
PEG_TXP4 G5
PEG_TXP5 E2
PEG_TXP6 J6
PEG_TXP7 G2
PEG_TXP9 J1
PEG_TXP8 J4
PEG_TXP10 T5
PEG_TXP11 R5
PEG_TXP12 R1
PEG_TXP14 T3
PEG_TXP13 R3
PEG_TXP15 T2
DMI_RXN1
AB3
DMI_RXP0
AB1
DMI_RXP1
AB4
DMI_TXN2
AG4
FDI_CSYNC
F11
DMI_TXP1
AF3
DMI_RXN3
AC1 DMI_RXN2
AC3
DMI_RXN0
AB2
DISP_INT
F12
DMI_TXP3
AG1 DMI_TXP2
AG3
DMI_TXP0
AF1
DMI_TXN3
AG2
DMI_TXN1
AF4 DMI_TXN0
AF2
DMI_RXP3
AC2 DMI_RXP2
AC4
PEG_TXN4 G4
PEG_TXN3 D4
CU7 0.22U_0402_16V7K~D
1 2
CU28 0.22U_0402_16V7K~D
1 2
CU18 0.22U_0402_16V7K~D
1 2
CU10 0.22U_0402_16V7K~D
1 2
CU31 0.22U_0402_16V7K~D
1 2
CU20 0.22U_0402_16V7K~D
1 2
CU9 0.22U_0402_16V7K~D
1 2
CU30 0.22U_0402_16V7K~D
1 2
CU19 0.22U_0402_16V7K~D
1 2
CU12 0.22U_0402_16V7K~D
1 2
CU17 0.22U_0402_16V7K~D
1 2
CU23 0.22U_0402_16V7K~D
1 2
CU11 0.22U_0402_16V7K~D
1 2
CU21 0.22U_0402_16V7K~D
1 2
CU14 0.22U_0402_16V7K~D
1 2
RU1 24.9_0402_1%
1 2
CU32 0.22U_0402_16V7K~D
1 2
CU22 0.22U_0402_16V7K~D
1 2
CU13 0.22U_0402_16V7K~D
1 2
CU25 0.22U_0402_16V7K~D
1 2
CU2 0.22U_0402_16V7K~D
1 2
CU16 0.22U_0402_16V7K~D
1 2
CU4 0.22U_0402_16V7K~D
1 2
CU15 0.22U_0402_16V7K~D
1 2
CU3 0.22U_0402_16V7K~D
1 2
CU24 0.22U_0402_16V7K~D
1 2
CU1 0.22U_0402_16V7K~D
1 2
CU6 0.22U_0402_16V7K~D
1 2
CU27 0.22U_0402_16V7K~D
1 2
CU8 0.22U_0402_16V7K~D
1 2
CU26 0.22U_0402_16V7K~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Compal Electronics, Inc.
SM_DRAMPWROK
DDR3L Compensation Signals
place RU33,RU30 near CPU
Processor Pullups
PU/PD for JTAG signals
Buffered reset to CPU
S3 circuit:DRAM_RST# to memory
should be high during S3
For ESD concern, please put near CPU
SSC CLOCK TERMINATION,
IF NOT USED, stuff RU40,RU44
CAD Note:
PLACE PULL-UP RESISTOR WITHIN 2 INCH OF THE CPU
NOTE: S3 POWER REDUCTION IS NOT POR
THIS CIRCUIT IS FOR INTERNAL TESTING PURPOSES ONLY.
For deep S3
CAD Note:
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mil
EDP_COMP
CAD Note:Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.
close CPU chip
PT
PT
ST
ST
ST
ST
PM_SYS_PWRGD_BUF
SM_RCOMP1
SM_RCOMP2
SM_RCOMP0
H_DRAMRST#
XDP_DBRESET#
XDP_TMS
XDP_TRST#
XDP_TCK
XDP_PRDY#
XDP_PREQ#
EDP_COMP
H_PROCHOT#_RH_PROCHOT#
PM_SYS_PWRGD_BUF_R
BUF_CPU_RST#
SM_RCOMP1
SM_RCOMP2
SM_RCOMP0
H_CPUPWRGD
H_PROCHOT#
DRAMRST_CNTRL_S3
DDR3_DRAMRST#_RH_DRAMRST#
XDP_TDO
XDP_TCK
XDP_TRST#
XDP_DBRESET#
BUF_CPU_RST#BUFO_CPU_RST#
PLT_RST#
PM_SYS_PWRGD_BUF_R
CLK_CPU_SSC_DPLL
CLK_CPU_SSC_DPLL#
CLK_CPU_SSC_DPLL#
CLK_CPU_SSC_DPLL
DRAMRST_CNTRL_S3
PM_SYS_PWRGD_BUF PM_SYS_PWRGD_BUF_R
CPU1.5V_S3_GATE_R
PM_DRAM_PWRGD[18]
+V1.05S_VCCP_PWRGOOD[38,56]
XDP_BPM#1 [6]
XDP_BPM#0 [6]
XDP_DBRESET# [18,6]
XDP_TDI [6]
XDP_TDO [6]
XDP_TCK [6]
XDP_TMS [6]
XDP_TRST# [6]
XDP_PRDY# [6]
XDP_PREQ# [6]
EDP_TXN0 [35]
EDP_TXP0 [35]
EDP_TXN1 [35]
EDP_TXP1 [35]
EDP_AUXN [35]
EDP_AUXP [35]
EDP_HPD [35]
HDMI_A2N_VGA[36]
HDMI_A2P_VGA[36]
HDMI_A1N_VGA[36]
HDMI_A1P_VGA[36]
HDMI_A0N_VGA[36]
HDMI_A0P_VGA[36]
HDMI_A3N_VGA[36]
HDMI_A3P_VGA[36]
H_PECI[38]
H_PROCHOT#[38,53,58]
H_THERMTRIP#[20]
H_PM_SYNC[18]
H_CPUPWRGD[20,6]
CLK_CPU_DMI#[17]
CLK_CPU_DMI[17]
DDR3_DRAMRST# [14,15]
PLT_RST#[18,38,40,42,6]
CPU_PLTRST#[20]
DRAMRST_CNTRL_S3[14,38]
CLK_CPU_SSC_DPLL#[17]
CLK_CPU_SSC_DPLL[17]
DPLL_REF_CLK#[17]
DPLL_REF_CLK[17]
VCIN0_PH[38]
+1.35V_PWROK[55]
EDP_TXN2 [35]
EDP_TXP2 [35]
EDP_TXN3 [35]
EDP_TXP3 [35]
mDP_A0N_CPU[37]
mDP_A0P_CPU[37]
mDP_A1N_CPU[37]
mDP_A1P_CPU[37]
mDP_A2N_CPU[37]
mDP_A2P_CPU[37]
mDP_A3N_CPU[37]
mDP_A3P_CPU[37]
+1.35V_CPU_VDDQ
+VCCIOA_OUT
+VCCIO_OUT
+1.35V
+VCCP
+3VS
+3VS
+VCCIO_OUT
+VCCP+3VS
+3VALW
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(2/7) PM,XDP,CLK
Custom
8 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(2/7) PM,XDP,CLK
Custom
8 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(2/7) PM,XDP,CLK
Custom
8 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
RU76 200_0402_5%
1 2
RU118
10K_0402_1%~D
1 2
RU40 10K_0402_5%~D@
1 2
RU60
1.82K_0402_1%
12
RU43 0_0402_5%@
1 2
RU58 100_0402_1%~D
1 2
RU56 0_0402_5%~D@
1 2
RU32 56_0402_5%
1 2
RU67 51_0402_5%
1 2
G
D
S
QU7
BSS138-G_SOT23-3
2
1 3
RU61 100_0402_1%~D
1 2
RU62 100K_0402_5%~D
1 2
RU44 10K_0402_5%~D@
1 2
RU59 75_0402_1%~D
1 2
RU11
20K_0402_5%~D
1 2
RU68 51_0402_5%
1 2
RU13
1K_0402_5%~D
1 2
RU33 10K_0402_5%~D
1 2
MISC
THERMAL CLOCK
JTAG
DDR3L
HASWELL_BGA
PWR
2 OF 12
U6B
HASWELL_BGA1364
@
PLTRSTIN
L54
SM_RCOMP0 BB51
SM_RCOMP1 BB53
SM_RCOMP2 BB52
SM_DRAMRST BE51
DPLL_REF_CLKP
AE6
PM_SYNC
D52
SM_DRAMPWROK
AP48
THERMTRIP
D53
PWRGOOD
F50
SSC_DPLL_REF_CLKP
Y6
DPLL_REF_CLKN
AC6
BCLKN
AB6
BCLKP
AA6
SSC_DPLL_REF_CLKN
V6
BPM#7 P51
BPM#6 U51
BPM#5 P53
BPM#3 N50
BPM#4 R49
BPM#2 P49
BPM#1 R50
BPM#0 R51
DBR F53
TDO M49
TRST M53
TDI N49
TMS M51
TCK N54
PREQ N52
PRDY N53
PROCHOT
E50
PECI
G51 CATERR
G50
PROC_DETECT
C51
RU54 0_0402_5%~D@
1 2
RU50 0_0402_5%~D@
1 2
RU42
75_0402_5%
@
12
G
D
S
QU3
BSS138-G_SOT23-3
2
13
CU39
0.047U_0402_16V7K
1
2
RU30 62_0402_5%
1 2
RU72
1K_0402_5%~D
12
RU66 51_0402_5%
1 2
RU35 1K_0402_5%~D
1 2
RU2 24.9_0402_1%
1 2
RU37 0_0402_5%@
1 2
UU3
74AHC1G09GW_TSSOP5
B
1
A
2
G
3
O4
P5
RU53 0_0402_5%@
1 2
RU74
4.99K_0402_1%~D
12
R29
100K_0402_5%~D
12
HASWELL_BGA
10 OF 12
U6J
HASWELL_BGA1364
@
EDP_DISP_UTIL E12
DDIB_TXN3
A24
DDIB_TXP3
B24
DDIC_TXN0
C21
DDIC_TXN1
A21
EDP_HPD E14
EDP_AUXP F14
EDP_TXN0 C14
EDP_TXP1 B12
EDP_TXN1 A12
EDP_TXP0 D14
EDP_RCOMP AG6
FDI_TXN0 C12
FDI_TXP0 D12
FDI_TXN1 A14
FDI_TXP1 B14
DDIB_TXN0
C25
DDIB_TXP0
D25
DDIB_TXN1
A25
DDIB_TXN2
C24 DDIB_TXP1
B25
DDIB_TXP2
D24
DDIC_TXP0
D21
DDIC_TXP1
B21
DDIC_TXN2
C20
DDIC_TXP2
D20
DDIC_TXN3
A20
DDIC_TXP3
B20
DDID_TXN2
C16
DDID_TXP2
D16
DDID_TXN3
A16
DDID_TXP3
B16
DDID_TXN0
C17
DDID_TXP0
D17
DDID_TXN1
A17
DDID_TXP1
B17
EDP_AUXN F15
RU73 1K_0402_5%~D
1 2
UU2
SN74LVC1G07DCKR_SC70-5
NC
1
A
2
G
3
Y4
P5
RU51 0_0402_5%~D@
1 2
RU48 43_0402_1%@
1 2
R59
3.32K_0402_1%~D
12
HU101
100K_0402_1%_TSM0B104F4251RZ
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Compal Electronics, Inc.
Close CPU side
20mil
DDR_A_DQS#7
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#3
DDR_A_DQS#1
DDR_A_DQS#4
DDR_A_DQS#6
DDR_B_D33
DDR_B_D14
DDR_B_D42
DDR_B_D59
DDR_B_D63
DDR_B_D43
DDR_B_D55
DDR_B_D53
DDR_B_D29
DDR_B_D24
DDR_B_D34
DDR_B_D4
DDR_B_D26
DDR_B_D13
DDR_B_D10
DDR_B_D21
DDR_B_D11
DDR_B_D57
DDR_B_D44
DDR_B_D0
DDR_B_D7
DDR_B_D46
DDR_B_D3
DDR_B_D15
DDR_B_D27
DDR_B_D30
DDR_B_D35
DDR_B_D40
DDR_B_D49
DDR_B_D23
DDR_B_D25
DDR_B_D19
DDR_B_D37
DDR_B_D48
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D47
DDR_B_D9
DDR_B_D60
DDR_B_D50
DDR_B_D62
DDR_B_D52
DDR_B_D2
DDR_B_D51
DDR_B_D56
DDR_B_D39
DDR_B_D22
DDR_B_D28
DDR_B_D6
DDR_B_D45
DDR_B_D17
DDR_B_D58
DDR_B_D61
DDR_B_D31
DDR_B_D54
DDR_B_D1
DDR_B_D41
DDR_B_D5
DDR_B_D12
DDR_B_D20
DDR_B_D38
DDR_B_D32
DDR_B_D16
DDR_B_MA15
DDR_B_MA0
DDR_B_MA9
DDR_B_MA7
DDR_B_MA13
DDR_B_MA2
DDR_B_MA4
DDR_B_MA11
DDR_B_MA3
DDR_B_MA5
DDR_B_MA6
DDR_B_MA10
DDR_B_MA8
DDR_B_MA1
DDR_B_MA12
DDR_B_MA14
DDR_B_DQS7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS5
DDR_B_DQS4
DDR_B_DQS3
DDR_B_DQS2
DDR_B_DQS6
DDR_B_DQS#1
DDR_B_DQS#7
DDR_B_DQS#5
DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#2
DDR_A_D63
DDR_A_D62
DDR_A_D8
DDR_A_D3
DDR_A_D4
DDR_A_D7
DDR_A_D5
DDR_A_D6
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D47
DDR_A_D46
DDR_A_D42
DDR_A_D43
DDR_A_D34
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_D35
DDR_A_D41
DDR_A_D40
DDR_A_D38
DDR_A_D36
DDR_A_D37
DDR_A_D32
DDR_A_D33
DDR_A_D61
DDR_A_D60
DDR_A_D2
DDR_A_D1
DDR_A_D0
DDR_A_D55
DDR_A_D54
DDR_A_D51
DDR_A_D48
DDR_A_D50
DDR_A_D49
DDR_A_D52
DDR_A_D53
DDR_A_D31
DDR_A_D14
DDR_A_D15
DDR_A_D25
DDR_A_D24
DDR_A_D26
DDR_A_D27
DDR_A_D30
DDR_A_D9
DDR_A_D13
DDR_A_D12
DDR_A_D10
DDR_A_D11
DDR_A_D29
DDR_A_D28
DDR_A_D19
DDR_A_D20
DDR_A_D16
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D23
DDR_A_MA15
DDR_A_MA0
DDR_A_MA14
DDR_A_MA5
DDR_A_MA4
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA9
DDR_A_MA7
DDR_A_MA6
DDR_A_MA12
DDR_A_MA13
DDR_A_MA8
DDR_A_MA11
DDR_A_MA10
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DQS1
DDR_A_DQS6
DDR_A_DQS5
DDR_A_DQS4
DDR_A_DQS3
DDR_A_DQS7
DDR_A_DQS#[0..7] [14]
DDR_A_BS0 [14]
DDR_A_BS1 [14]
DDR_A_BS2 [14]
DDR_A_RAS# [14]
DDR_A_WE# [14]
DDR_A_CAS# [14]
M_ODT1 [14]
M_ODT0 [14]
M_CLK_DDR0 [14]
M_CLK_DDR#0 [14]
DDR_CKE0_DIMMA [14]
M_CLK_DDR#1 [14]
M_CLK_DDR1 [14]
DDR_CKE1_DIMMA [14]
DDR_CS1_DIMMA# [14]
DDR_CS0_DIMMA# [14]
+V_DDR_REFA_R[14]
DDR_B_D[0..63][15]
DDR_B_MA[0..15] [15]
DDR_B_DQS[0..7] [15]
DDR_B_DQS#[0..7] [15]
M_ODT3 [15]
M_ODT2 [15]
DDR_CS3_DIMMB# [15]
DDR_CS2_DIMMB# [15]
M_CLK_DDR2 [15]
M_CLK_DDR#2 [15]
DDR_CKE2_DIMMB [15]
M_CLK_DDR3 [15]
M_CLK_DDR#3 [15]
DDR_CKE3_DIMMB [15]
+V_DDR_REFB_R[14]
DDR_B_BS1 [15]
DDR_B_BS0 [15]
DDR_B_BS2 [15]
DDR_B_WE# [15]
DDR_B_RAS# [15]
DDR_B_CAS# [15]
DDR_A_D[0..63][14]
DDR_A_MA[0..15] [14]
DDR_A_DQS[0..7] [14]
+V_SM_VREF
+1.35V_CPU_VDDQ
+V_SM_VREF
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(3/7) DDRIII
Custom
9 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(3/7) DDRIII
Custom
9 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(3/7) DDRIII
Custom
9 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
HASWELL_BGA
3 OF 12
U6C
HASWELL_BGA1364
@
SA_BS0 BC20
SA_ODT3 BD17
SA_BS1 BD21
SA_WE BF21
SA_ODT2 BF17
SA_CS#3 BD16
SA_CS#2 BE17
SA_CS#1 BC17
SA_CS#0 BE16
SA_CKE3 BD34
SA_CKE1 BF34
SA_CKN1 BD25
SA_DQ6
AK52
SA_DQ7
AK53
SA_DQ8
AN54
SA_DQ9
AN52
SA_DQ10
AR51
SA_DQ12
AN53 SA_DQ11
AR53
SA_DQ13
AN51
SA_DQ15
AR54 SA_DQ14
AR52
SA_DQ16
AV52
SA_DQ17
AV53
SA_DQ18
AY52
SA_DQ20
AV51 SA_DQ19
AY51
SA_DQ21
AV54
SA_DQ22
AY54
SA_DQ23
AY53
SA_DQ25
AY49 SA_DQ24
AY47
SA_DQ26
BA47
SA_DQ27
BA45
SA_DQ28
AY45
SA_DQ30
BA49 SA_DQ29
AY43
SA_DQ31
BA43
SA_DQ32
BF14
SA_DQ33
BC14
SA_DQ35
BF11 SA_DQ34
BC11
SA_DQ38
BD11 SA_DQ37
BD14 SA_DQ36
BE14
SA_DQ39
BE11
SA_DQ40
BC9
SA_DQ41
BE9
SA_DQ42
BE6
SA_DQ44
BD9
SA_DQ49
BC2
SA_DQ50
AW3
SA_DQ51
AW2
SA_DQ53
BB2 SA_DQ52
BB3
SA_DQ54
AW4
SA_DQ55
AW1
SA_DQ56
AU3
SA_DQ57
AU1
SA_DQ58
AR1
SA_DQ59
AR4
SA_DQ61
AU4 SA_DQ60
AU2
SA_DQ63
AR3 SA_DQ62
AR2
SA_DIMM_VREFDQ
AR6 SM_VREF
AM6
SB_DIMM_VREFDQ
AN6
RSVD
BC53
SA_CK1 BC25
SA_CKE0 BE34
SA_CKE2 BC34
SA_ODT0 BC16
SA_MA2 BF28
SA_MA1 BD27
SA_MA0 BD28
SA_MA3 BE28
SA_MA4 BF32
SA_MA5 BC27
SA_MA6 BF27
SA_MA7 BC28
SA_MA9 BC32
SA_MA8 BE27
SA_MA10 BD20
SA_MA12 BC31
SA_MA11 BF31
SA_MA14 BE32
SA_MA13 BE20
SA_DQSN3 AY46
SA_DQSN2 AW52
SA_DQSN5 BE7
SA_DQSN7 AT2
SA_DQS0 AJ53
SA_ODT1 BF16
SA_DQ48
BB4 SA_DQ47
BD6 SA_DQ46
BE5 SA_DQ45
BF9
SA_DQ43
BC6
SA_CK2 BF23
SA_CKN2 BE23
SA_CKN3 BD23
SA_CK3 BC23
SA_CK0 BF25
SA_CKN0 BE25
RSVD BD31
SA_BS2 BD32
VSS BC21
SA_RAS BF20
SA_CAS BE21
SA_DQ0
AH54
SA_DQ1
AH52
SA_DQ2
AK51
SA_DQ3
AK54
SA_DQ4
AH53
SA_DQ5
AH51
SA_MA15 BE31
SA_DQSN0 AJ52
SA_DQSN1 AP53
SA_DQSN4 BD12
SA_DQSN6 BA3
SA_DQS1 AP52
SA_DQS2 AW53
SA_DQS3 BA46
SA_DQS4 BE12
SA_DQS5 BD7
SA_DQS6 BA2
SA_DQS7 AT3
RSVD BA40
RSVD AY40
RSVD BA39
RSVD AY39
RSVD AV40
RSVD AU40
RSVD AV39
RSVD AU39
RSVD AW40
RSVD AW39
HASWELL_BGA
4 OF 12
U6D
HASWELL_BGA1364
@
SB_CS#1 AY19
SB_CS#2 AU19
SB_CS#3 AW20
SB_ODT0 AY20
SB_ODT1 BA19
SB_ODT2 AV19
SB_ODT3 AW19
SB_CS#0 BA20
SB_DQS3 BE43
SB_DQS4 AW15
SB_DQS2 BE48
SB_DQSN5 AW10
SB_MA5 AY32
SB_MA3 AV30
SB_MA1 AW30
SB_WE AW23
SB_CK1 AV26
SB_CKE0 AU36
SB_CK0 AV27
SB_CKN0 AW27
RSVD AY36
SB_DQ62
AK2
SB_DQ63
AK3
SB_DQ60
AM1
SB_DQ61
AM4
SB_DQ59
AK4
SB_DQ57
AM3
SB_DQ58
AK1
SB_DQ56
AM2 SB_DQ55
AY6 SB_DQ54
AU6
SB_DQ52
AV8
SB_DQ53
AY8
SB_DQ51
BA6 SB_DQ50
AV6 SB_DQ49
BA8 SB_DQ48
AU8 SB_DQ47
AV10 SB_DQ46
AY10 SB_DQ45
BA12 SB_DQ44
AV12
SB_DQ42
BA10
SB_DQ43
AU10
SB_DQ41
AY12 SB_DQ40
AU12 SB_DQ39
AU15 SB_DQ38
AY15 SB_DQ37
AV16 SB_DQ36
AY16
SB_DQ34
BA15
SB_DQ35
AV15
SB_DQ33
AU16 SB_DQ32
BA16 SB_DQ31
BE42
SB_DQ29
BC44
SB_DQ30
BD42
SB_DQ28
BF44
SB_DQ26
BC42
SB_DQ27
BF42
SB_DQ24
BE44
SB_DQ25
BD44
SB_DQ23
BF47 SB_DQ22
BE47 SB_DQ21
BD50
SB_DQ19
BC47
SB_DQ20
BD49
SB_DQ18
BD47 SB_DQ17
BE49 SB_DQ16
BC49 SB_DQ15
AV49 SB_DQ14
AV47 SB_DQ13
AU45
SB_DQ11
AV45
SB_DQ12
AU43
SB_DQ10
AV43 SB_DQ9
AU49 SB_DQ8
AU47 SB_DQ7
AE53 SB_DQ6
AE52 SB_DQ5
AC51 SB_DQ4
AC53 SB_DQ3
AE54 SB_DQ2
AE51 SB_DQ1
AC52
SB_DQSN7 AL2
SB_DQSN6 AW8
SB_DQSN0 AD52
SB_MA15 BA35
SB_MA14 AW36
SB_MA13 AU20
SB_MA12 AW35
SB_MA10 AU23
SB_MA9 AU32
SB_MA8 BA32
SB_MA7 AV32
SB_MA6 AT30
SB_MA4 AW32
SB_MA2 AY30
SB_MA0 BA30
SB_CAS AV20
SB_BS1 BA23
SB_CK3 AY27
SB_CKN3 BA27
SB_CKE2 AV35
SB_CK2 AY26
SB_CKN2 BA26
SB_CKE1 AU35
SB_CKN1 AW26
SB_BS2 BA36
VSS AU30
SB_DQSN4 AW16
SB_DQSN3 BD43
SB_DQSN2 BD48
SB_DQSN1 AU46
SB_DQS1 AV46
SB_DQS0 AD53
RSVD BE38
RSVD BD39
SB_MA11 AY35
SB_CKE3 AV36
SB_DQ0
AC54
SB_BS0 AY23
SB_RAS AV23
RSVD BD37
RSVD BC37
SB_DQS5 AW12
SB_DQS6 AW6
SB_DQS7 AL3
RSVD BD38
RSVD BE37
RSVD BC39
RSVD BF37
RSVD BE39
RSVD BF39
RU83
1K_0402_1%~D
12
RU84
1K_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
PCIE Port Bifurcation Straps
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
1: (Default) PEG Train immediately following xxRESETB
de assertion
CFG4
Display Port Presence Strap
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
CFG Straps for Processor
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
CFG2
0:Lane Reversed
1: Normal Operation; Lane # definition matches
socket pin map definition
Compal Electronics, Inc.
*
*
*
CFG4
CFG6
CFG5
CFG2
CFG7
CFG10
CFG11
CFG13
CFG14
CFG15
CFG12
CFG1
CFG2
CFG0
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CPU_TESTLOW1
CPU_TESTLOW0
CFG_RCOMP
CFG16
CFG17
CFG19
CFG18
B3_A3
A52_B52
A53_B53
C3_B2
B3_A3
A52_B52
A53_B53
B54_C54
BE1_BD1
BE54_BD54
BE1_BD1
BE2_BF2
BE3_BF3
BE52_BF52
BE53_BF53
BE54_BD54
BE2_BF2
BE3_BF3
BE53_BF53
BE52_BF52
C3_B2
C1_C2
C1_C2
B54_C54
CFG15[6]
CFG0[6]
CFG12[6]
CFG13[6]
CFG14[6]
CFG10[6]
CFG11[6]
CFG1[6]
CFG2[6]
CFG3[6]
CFG4[6]
CFG5[6]
CFG6[6]
CFG7[6]
CFG8[6]
CFG9[6]
CFG18 [6]
CFG17 [6]
CFG19 [6]
CFG16 [6]
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(4/7) RSVD,CFG
Custom
10 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(4/7) RSVD,CFG
Custom
10 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(4/7) RSVD,CFG
Custom
10 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
RU115
1K_0402_1%~D
12
RU77
1K_0402_1%~D
12
RU86
1K_0402_1%~D
@
12
RH30
49.9_0402_1%
12
RH27
49.9_0402_1%
12
RU87
1K_0402_1%~D
@
12
RH31
49.9_0402_1%
12
RU85
1K_0402_1%~D
@
12
HASWELL_BGA
11 OF 12
U6K
HASWELL_BGA1364
@
RSVD_TP F1
RSVD_TP G12
RSVD_TP G10
VSS H54
VSS H53
RSVD_TP
BE4
RSVD_TP
BD3
RSVD_TP
G24
CFG0
AG49
CFG15
R52 CFG14
R53 CFG13
V54 CFG12
U53 CFG11
W53 CFG10
Y53 CFG9
Y54 CFG8
Y49 CFG7
W51 CFG6
V51 CFG5
AB49 CFG4
Y50 CFG3
AE49 CFG2
AC49 CFG1
AD49
RSVD
L49
RSVD
E5
RSVD
L50
RSVD F8
RSVD AL6
RSVD AU26
RSVD BD4
RSVD BC4
RSVD AM48
RSVD AU27
RSVD B50
RSVD AH49
CFG19 V52
CFG17 Y51
CFG18 V53
CFG_RCOMP R54
CFG16 Y52
RSVD_TP A6
RSVD_TP A5
RSVD_TP E1
RSVD_TP
L51
RSVD_TP
F24
RSVD_TP
F25
RSVD H50
RSVD G53
RSVD N51
VSS H51
VSS H52
VSS
G19
VSS
F51
RSVD_TP
G21
RSVD_TP
G6 RSVD_TP
F6
RSVD F16
RSVD_TP
L53 RSVD_TP
L52
VCC
F22 VSS
F52
TESTLOW_F20
F20
TESTLOW_F21
F21
HASWELL_BGA
12 OF 12
U6L
HASWELL_BGA1364
@
RSVD BF51
RSVD BF52
RSVD BF53
RSVD C1
RSVD C2
RSVD C3
RSVD D1
RSVD C54
RSVD D54
RSVD AN35
RSVD AN37
RSVD AF9
RSVD AE9
RSVD G14
RSVD G17
RSVD AD45
RSVD AG45
RSVD
A4 RSVD
A3
RSVD
A53
RSVD
A51
RSVD
A52
RSVD
B2
RSVD
B52
RSVD
B53
RSVD
B3
RSVD
B54
RSVD
BC1
RSVD
BC54
RSVD
BD1
RSVD
BE1 RSVD
BD54
RSVD
BE2
RSVD
BE52 RSVD
BE3
RSVD
BE54 RSVD
BE53
RSVD
BF2
RSVD
BF4 RSVD
BF3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
55A
+VCC_CORE+VCC_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(5/7) PWR,BYPASS
Custom
11 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(5/7) PWR,BYPASS
Custom
11 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(5/7) PWR,BYPASS
Custom
11 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
HASWELL_BGA
6 OF 12
U6F
HASWELL_BGA1364
@
VCC H34
VCC H33
VCC H37
VCC H36
VCC H38
VCC H40
VCC H39
VCC H42
VCC H43
VCC H45
VCC H46
VCC H48
VCC H8
VCC H9
VCC J10
VCC J14
VCC J19
VCC J24
VCC J33
VCC J29
VCC J36
VCC J37
VCC J38
VCC J39
VCC J40
VCC J42
VCC J43
VCC J45
VCC J48
VCC J46
VCC J8
VCC J9
VCC K38
VCC K40
VCC K43
VCC K44
VCC K46
VCC K45
VCC K48
VCC K8
VCC K9
VCC L38
VCC L37
VCC L40
VCC L39
VCC L42
VCC L44
VCC L43
VCC L46
VCC L47
VCC L8
VCC M38
VCC M37
VCC M39
VCC M40
VCC M42
VCC M43
VCC M44
VCC M45
VCC M8
VCC M46
VCC M9
VCC N37
VCC N38
VCC N39
VCC N40
VCC N42
VCC N43
VCC N44
VCC N47
VCC N46
VCC N8
VCC N9
VCC P45
VCC P46
VCC P8
VCC R46
VCC R8
VCC R47
VCC R9
VCC T45
VCC T46
VCC U47
VCC U46
VCC U8
VCC U9
VCC V45
VCC V8
VCC V46
VCC W46
VCC W47
VCC W8
VCC Y46
VCC Y45
VCC A27
VCC Y8
VCC A28
VCC A31
VCC A32
VCC A34
VCC B28
VCC B27
VCC B31
VCC B32
VCC B34
VCC B38
VCC B36
VCC B39
VCC B42
VCC
AB46
VCC
AB8
VCC
AC47
VCC
AC9 VCC
AC8
VCC
AD46
VCC
AD8
VCC
AE46
VCC
AE47
VCC
AE8
VCC
AF8
VCC
AG46
VCC
AG8
VCC
AH46
VCC
AH47
VCC
AH8
VCC
AJ46 VCC
AJ45
VCC
AK46
VCC
AK47
VCC
AK8
VCC
AL45
VCC
AL46
VCC
AL8
VCC
AL9
VCC
AM46
VCC
AM8 VCC
AM47
VCC
AM9
VCC
AN10
VCC
AN12
VCC
AN13
VCC
AN14
VCC
AN15
VCC
AN17 VCC
AN16
VCC
AN19
VCC
AN20
VCC
AN21
VCC
AN24 VCC
AN23
VCC
AN26 VCC
AN25
VCC
AN27
VCC
AN30 VCC
AN29
VCC
AN32
VCC
AN34
VCC
AN36
VCC
AN39 VCC
AN38
VCC
AN40
VCC
AN41
VCC
AN42
VCC
AN43
VCC
AN44
VCC
AN45
VCC
AN8 VCC
AN46
VCC
AN9
VCC
AP10
VCC
AP12
VCC
AP13
VCC
AP14
VCC
AP15
VCC
AP16
VCC
AP17
VCC
AP19 VCC
AP18
VCC
AP20
VCC
AP21
VCC
AP22
VCC
AP23
VCC
AP24
VCC
AP25
VCC
AP27 VCC
AP26
VCC
AP29
VCC
AP30
VCC
AP31
VCC
AP33 VCC
AP32
VCC
AP34
VCC
AP35
VCC
AP36
VCC
AP38 VCC
AP37
VCC
AP39
VCC
AP40
VCC
AP41
VCC
AP43 VCC
AP42
VCC
AP46 VCC
AP44
VCC
AP47
VCC
AP8
VCC
AP9
VCC
AR35
VCC
AR39 VCC
AR37
VCC
AR41
VCC
AR43
VCC
AR45
VCC
H30 VCC
AR46
VCC
H31
VCC
H32
VCC
AC46
VCC
AB45
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Compal Electronics, Inc.
4210mA
+1.35V_CPU_VDDQ Source
RESISTOR STUFFING OPTIONS ARE
PROVIDED FOR TESTING PURPOSES
CAD Note: Place the PU resistors close to CPU
RU90/RU91 close to CPU 300 - 1500mils
CAD Note: RU96 SHOULD BE PLACED CLOSE TO CPU
CAD Note: CU36 SHOULD BE
PLACED CLOSE TO CPU
300mA
30mA
ST
+VCCIO_OUT
H_CPU_SVIDALRT#VR_SVID_ALRT#
VR_SVID_CLK
VR_SVID_DAT
VR_SVID_ALRT#
VR_SVID_DAT
CPU_PWR_DEBUG
CPU_FC_PWR
CPU_FC_PWROK
CPU_PWR_DEBUG
+VCCIO2PCH
VCCSENSE[58]
VR_SVID_CLK[58]
VR_SVID_DAT[58]
VR_SVID_ALRT#[58]
CPU_PWR_DEBUG[6]
+1.35V_CPU_VDDQ
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCCIOA_OUT
+VCCIO_OUT
+VCCP
+1.35V_CPU_VDDQ
+1.35V_CPU_VDDQ
+1.35V +1.35V_CPU_VDDQ
+1.35V_CPU_VDDQ +1.35V
+VCCP +VCCIO2PCH
+VCCIO_OUT
+VCCIO_OUT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(6/7) PWR
Custom
12 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(6/7) PWR
Custom
12 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
PROCESSOR(6/7) PWR
Custom
12 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
T173PAD @
CU199
1U_0402_6.3V6K~D
1
2
CU174
10U_0603_6.3V6M~D
1
2
CU195
1U_0402_6.3V6K~D
1
2
CU201
1U_0402_6.3V6K~D
1
2
CU175
10U_0603_6.3V6M~D
1
2
CU172
10U_0603_6.3V6M~D
1
2
RU91 75_0402_5%
1 2
CU192
1U_0402_6.3V6K~D
1
2
R58 0_0805_5%@
1 2
CU178 0.1U_0402_10V7K~D
12
CU169
10U_0603_6.3V6M~D
1
2
RU90 130_0402_1%~D
1 2
CU177 0.1U_0402_10V7K~D
12
HASWELL_BGA
5 OF 12
U6E
HASWELL_BGA1364
@
VDDQ
BB30
VDDQ
BB31
VCC F46
VCC F45
VCC F43
VDDQ
BE22
VDDQ
BD30
RSVD
J17
RSVD
J21
VDDQ
BE18
VDDQ
BD22
VDDQ
AW29
VDDQ
BD26
VDDQ
BD33
VCC
AA9 VCC
AA8 VCC
AA47 VCC
AA46 VCC
A48 VCC
A46 VCC
A45 VCC
A43 VCC
A42 VCC
A39 VCC
A38 VCC
A36
VSS
AD50
VSS
AM50
VSS
AB50 VSS
AP49
VSS
AK49 VSS
AG50 VSS
AJ49 VSS
AN49 VSS
V50 RSVD_TP
W49 RSVD_TP
AM49 RSVD_TP
U49 RSVD_TP
V49 VSS
E52 PWR_DEBUG
F19 VSS
B51
VIDSOUT
J50 VIDSCLK
J52 VIDALERT
J53
RSVD
AR49 RSVD
J12 RSVD
W9 RSVD
AN33 VCOMP_OUT
AK6 RSVD
F17 VCCIO_OUT
D51 RSVD
AH9 VCC_SENSE
C50
RSVD
AN18 RSVD
AN22 VCC
M6 VCC
L6 RSVD
AN31
VDDQ
BE33 VDDQ
BE30 VDDQ
BE26
VDDQ
BB36 VDDQ
BB34
VDDQ
BB27 VDDQ
BB26 VDDQ
BB22 VDDQ
BB21 VDDQ
AY18 VDDQ
AW33
VDDQ
AW25 VDDQ
AW22 VDDQ
AV37 VDDQ
AT36 VDDQ
AT32 VDDQ
AT27 VDDQ
AT23 VDDQ
AT19 VDDQ
AT13 VDDQ
AR33 VDDQ
AR31 VDDQ
AR29
RSVD
J31 RSVD
J26
VCC H29
VCC H27
VCC H26
VCC H20
VCC H19
VCC H18
VCC H17
VCC H16
VCC H14
VCC H13
VCC H12
VCC H11
VCC G48
VCC G46
VCC G45
VCC G43
VCC G42
VCC G39
VCC G38
VCC G36
VCC G31
VCC G34
VCC G32
VCC G27
VCC G29
VCC F48
VCC F42
VCC F39
VCC F38
VCC F36
VCC F34
VCC F32
VCC F31
VCC F28
VCC F27
VCC E48
VCC E46
VCC E45
VCC E43
VCC E42
VCC E39
VCC E38
VCC E36
VCC E34
VCC E32
VCC E31
VCC E28
VCC E27
VCC D48
VCC D46
VCC D45
VCC D43
VCC D42
VCC D39
VCC D38
VCC D36
VCC D34
VCC D32
VCC D31
VCC D28
VCC D27
VCC C48
VCC C46
VCC C45
VCC C43
VCC C42
VCC C28
VCC C27
VCC B48
VCC B46
VCC B45
VCC B43
VCC H21
VCC H23
VCC H24
VCC H25
FC_D5 D5
FC_D3 D3
VSS
AJ50
VSS
AP50
VCC C31
VCC C32
VCC C34
VCC C36
VCC C38
VCC C39
CU196
1U_0402_6.3V6K~D
1
2
CU198
1U_0402_6.3V6K~D
1
2
CU200
1U_0402_6.3V6K~D
1
2
RU96
100_0402_1%~D
12
JP4
PAD-OPEN 4x4m
@
1 2
CU171
10U_0603_6.3V6M~D
1
2
CU173
10U_0603_6.3V6M~D
1
2
CU36
0.01U_0402_16V7K~D
1
2
RU93 43_0402_1%
1 2
CU194
1U_0402_6.3V6K~D
1
2
CU176
10U_0603_6.3V6M~D
1
2
RU94
150_0402_1%~D
12
T172PAD @
CU197
1U_0402_6.3V6K~D
1
2
+
CU168
330U_D2_2V_Y
1
2
JP3
PAD-OPEN 4x4m
@
1 2
CU193
1U_0402_6.3V6K~D
1
2
CU170
10U_0603_6.3V6M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Compal Electronics, Inc.
CAD Note: RU99 SHOULD BE PLACED CLOSE TO CPU
VSSSENSE [58]
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(7/7) VSS
Custom
13 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(7/7) VSS
Custom
13 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PROCESSOR(7/7) VSS
Custom
13 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
RU99
100_0402_1%~D
12
HASWELL_BGA
9 OF 12
U6I
HASWELL_BGA1364
VSS G20
VSS G23
VSS G25
VSS G40
VSS G30
VSS G26
VSS G33
VSS G37
VSS G7
VSS G44
VSS G49
VSS G52
VSS G54
VSS G8
VSS H7
VSS G9
VSS H44
VSS H49
VSS J44
VSS K1
VSS J7
VSS J49
VSS J51
VSS J54
VSS K6
VSS K5
VSS K2
VSS K3
VSS K4
VSS M48
VSS L9
VSS K7
VSS L48
VSS L7
VSS N48
VSS M7
VSS M50
VSS M52
VSS M54
VSS P4
VSS P3
VSS N7
VSS P1
VSS P2
VSS P54
VSS P5
VSS P48
VSS P50
VSS P52
VSS T48
VSS P6
VSS P7
VSS R48
VSS R7
VSS U1
VSS U48
VSS U2
VSS U3
VSS U4
VSS U5
VSS U6
VSS U50
VSS U52
VSS U54
VSS U7
VSS W50
VSS W48
VSS V48
VSS V7
VSS V9
VSS Y7
VSS Y48
VSS W52
VSS W54
VSS W7
VSS Y9
VSS AR22
VSS AB48
VSS P9
VSS G18
VSS_NCTF A49
VSS_NCTF A50
VSS_NCTF A8
VSS_NCTF BB54
VSS_NCTF BB1
VSS_NCTF B4
VSS_NCTF BA1
VSS_NCTF BA54
VSS_NCTF BF50
VSS_NCTF BD2
VSS_NCTF BD53
VSS_NCTF BF49
VSS_NCTF BF5
VSS_NCTF F54
VSS_NCTF D2
VSS_NCTF C53
VSS_NCTF BF6
VSS_NCTF E54
VSS_NCTF G1
VSS_SENSE D50
VSS
BC10
VSS
BC12
VSS
BC15
VSS
BC30
VSS
BC18
VSS
BC22
VSS
BC26
VSS
BC3
VSS
BC43
VSS
BC33
VSS
BC36
VSS
BC38
VSS
BC41
VSS
BC46
VSS
BC52
VSS
BC48
VSS
BC5
VSS
BC50
VSS
BC7
VSS
BD41 VSS
BD36
VSS
BD10
VSS
BD15
VSS
BD18
VSS
BE15 VSS
BE10
VSS
BD46
VSS
BD5
VSS
BD51
VSS
BF12 VSS
BF10
VSS
BE36
VSS
BE41
VSS
BE46
VSS
BF30 VSS
BF26
VSS
BF15
VSS
BF18
VSS
BF22
VSS
BF43 VSS
BF41
VSS
BF33
VSS
BF36
VSS
BF38
VSS
C15
VSS
BF48 VSS
BF46
VSS
BF7
VSS
C11
VSS
C33
VSS
C19
VSS
C22
VSS
C26
VSS
C30
VSS
C37
VSS
C49
VSS
C4
VSS
C40
VSS
C44
VSS
C52
VSS
D19
VSS
C8
VSS
D11
VSS
D15
VSS
D22
VSS
D40 VSS
D37
VSS
D26
VSS
D30
VSS
D33
VSS
E15 VSS
E11
VSS
D44
VSS
D49
VSS
D8
VSS
E21 VSS
E20
VSS
E16
VSS
E17
VSS
E19
VSS
E30 VSS
E26
VSS
E22
VSS
E24
VSS
E25
VSS
E49 VSS
E44
VSS
E33
VSS
E37
VSS
E40
VSS
F26
VSS
E51
VSS
E53
VSS
E8
VSS
F2
VSS
F4
VSS
F30 VSS
F3
VSS
F33
VSS
F37
VSS
F40
VSS
G11
VSS
F44
VSS
F49
VSS
F5
VSS
G13
VSS
G16
HASWELL_BGA
7 OF 12
U6G
HASWELL_BGA1364
VSS AT4
VSS AT39
VSS AT35
VSS AT33
VSS AT26
VSS AT25
VSS AT18
VSS AT10
VSS AT1
VSS AR9
VSS AR8
VSS AR7
VSS AR50
VSS AR5
VSS AR48
VSS AR26
VSS AR24
VSS AR20
VSS AR18
VSS AR16
VSS AR14
VSS AR12
VSS AP7
VSS AP54
VSS AP51
VSS AN7
VSS AN50
VSS AN5
VSS AN48
VSS AN4
VSS AN3
VSS AN2
VSS AN1
VSS AM7
VSS AM54
VSS AM53
VSS AM52
VSS AM51
VSS AM5
VSS AL7
VSS AL5
VSS AL48
VSS AL4
VSS AL1
VSS AK9
VSS AK7
VSS AK50
VSS AK5
VSS AK48
VSS AJ54
VSS AJ51
VSS AJ48
VSS
AH7 VSS
AH50 VSS
AH5 VSS
AH48 VSS
AH4 VSS
AH3 VSS
AH2
VSS
AG7 VSS
AG54 VSS
AG53 VSS
AG52 VSS
AG51 VSS
AG5 VSS
AG48 VSS
AF7 VSS
AF6 VSS
AF5 VSS
AE7 VSS
AE50 VSS
AE5 VSS
AE48 VSS
AE4 VSS
AE3 VSS
AE2 VSS
AE1 VSS
AD9 VSS
AD7 VSS
AD54 VSS
AD51 VSS
AD48 VSS
AC7 VSS
AC50 VSS
AC5 VSS
AC48 VSS
AB9 VSS
AB7 VSS
AB54 VSS
AB53 VSS
AB52 VSS
AB51 VSS
AB5 VSS
AA7 VSS
AA5 VSS
AA48 VSS
AA4 VSS
AA3 VSS
AA2 VSS
AA1 VSS
A44 VSS
A40 VSS
A37 VSS
A33 VSS
A30 VSS
A26 VSS
A22 VSS
A19 VSS
A15 VSS
A11
VSS AT37
VSS AT29
VSS AT22
VSS AT20
VSS AT16
VSS AT12
VSS AT15
VSS
AG9
VSS
AH1
HASWELL_BGA
8 OF 12
U6H
HASWELL_BGA1364
VSS BB9
VSS BB7
VSS BB6
VSS BB5
VSS BB49
VSS BB48
VSS BB47
VSS BB46
VSS BB44
VSS BB43
VSS BB42
VSS BB39
VSS BB38
VSS BB33
VSS BB32
VSS BB25
VSS BB20
VSS BB14
VSS BB11
VSS BB10
VSS BA53
VSS BA52
VSS BA51
VSS BA50
VSS BA5
VSS BA42
VSS BA4
VSS BA37
VSS BA33
VSS BA29
VSS BA25
VSS BA22
VSS BA18
VSS BA13
VSS B8
VSS B49
VSS B44
VSS B40
VSS B37
VSS B33
VSS B30
VSS B26
VSS B22
VSS B19
VSS B15
VSS B11
VSS AY9
VSS AY50
VSS
AY42 VSS
AY37 VSS
AY33 VSS
AY29 VSS
AY25 VSS
AY22 VSS
AY13 VSS
AW9 VSS
AW54 VSS
AW51 VSS
AW50 VSS
AW5 VSS
AW49 VSS
AW47 VSS
AW46 VSS
AW45 VSS
AW43 VSS
AW42 VSS
AW37 VSS
AW18 VSS
AW13 VSS
AV9 VSS
AV50 VSS
AV5 VSS
AV42 VSS
AV4 VSS
AV33 VSS
AV3 VSS
AV29 VSS
AV25 VSS
AV22 VSS
AV2 VSS
AV18 VSS
AV13 VSS
AV1 VSS
AU9 VSS
AU5 VSS
AU42 VSS
AU37 VSS
AU33 VSS
AU29 VSS
AU25 VSS
AU22 VSS
AU18 VSS
AU13 VSS
AT9 VSS
AT8 VSS
AT6 VSS
AT54 VSS
AT53 VSS
AT52 VSS
AT51 VSS
AT50 VSS
AT5 VSS
AT49 VSS
AT47 VSS
AT46 VSS
AT45 VSS
AT43 VSS
AT42 VSS
AT40
VSS BB41
VSS BB37
VSS BB28
VSS BB23
VSS BB18
VSS BB17
VSS BB16
VSS BB15
VSS BB12
VSS BA9
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Layout Note:
Place near JDIMM1.203,204
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
M3
M1
Layout Note:
Place near JDIMM1
All VREF traces should
have 10 mil trace width
Layout Note:
Place near JDIMM1.199
For deep S3
For deep S3
All VREF traces should
have 10 mil trace width
+V_DDR_REF
DRAMRST_CNTRL_S3
+V_DDR_REF
+V_DDR_REF
DRAMRST_CNTRL_S3
+V_DDR_REF
DDR_A_D11
DDR_A_D18
DDR_A_D19
DDR_A_D27
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_D17
DDR_A_D16
DDR_A_D5
DDR_A_DQS0
DDR_A_DQS3
DDR_A_DQS#0
DDR_A_DQS#3
DDR3_DRAMRST#
DDR_A_D23
DDR_A_D31
DDR_A_D13
DDR_A_D14
DDR_A_D12
DDR_A_D22
DDR_A_D32
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_MA1
DDR_A_MA3
DDR_A_MA5
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA12
DDR_A_MA13
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_BS0
DDR_A_BS2
DDR_CS1_DIMMA#
M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA
DDR_A_CAS#
DDR_A_WE#
DDR_A_D33
DDR_A_D48
DDR_A_D36
DDR_A_D37
DDR_A_D45
DDR_A_D46
DDR_A_D52
DDR_A_D53
DDR_A_D55
DDR_A_D60
DDR_A_MA2
DDR_A_D61
DDR_A_D62
DDR_A_MA0
DDR_A_MA4
DDR_A_MA6
DDR_A_MA7
DDR_A_MA11
DDR_A_MA14
DDR_A_DQS5
DDR_A_DQS7
DDR_A_DQS#5
DDR_A_BS1
DDR_A_DQS#7
DDR_CS0_DIMMA#
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_A_RAS#
M_ODT0
M_ODT1
PCH_SMBDATA
PCH_SMBCLK
DDR_A_MA15
DDR_A_D63
DDR_A_D39
DDR_A_D38
DDR_A_D44
DDR_A_D54
DDR_A_D47
DDR_A_D0
DDR_A_D4
DDR_A_D1
DDR_A_D3
DDR_A_D7
DDR_A_D2
DDR_A_D6
DDR_A_D9
DDR_A_D8
DDR_A_D10
DDR_A_D15
DDR_A_D21
DDR_A_D20
DDR_A_D25
DDR_A_D30
DDR_A_D24
DDR_A_D26
DDR_A_D28 DDR_A_D29
DDR_A_D[0..63][9]
DDR_A_DQS[0..7][9]
DDR_A_DQS#[0..7][9]
DDR_A_MA[0..15][9]
DRAMRST_CNTRL_S3[38,8]
+V_DDR_REFB_R [9]
+V_DDR_REFA_R [9]
DDR3_DRAMRST# [15,8]
DDR_CS1_DIMMA#[9]
DDR_A_CAS#[9]
DDR_A_WE#[9]
DDR_A_BS0[9]
M_CLK_DDR#0[9]
M_CLK_DDR0[9]
DDR_A_BS2[9]
DDR_CKE0_DIMMA[9] DDR_CKE1_DIMMA [9]
M_CLK_DDR1 [9]
M_CLK_DDR#1 [9]
DDR_A_BS1 [9]
DDR_A_RAS# [9]
DDR_CS0_DIMMA# [9]
M_ODT0 [9]
M_ODT1 [9]
PCH_SMBDATA [15,17,39,43,6]
PCH_SMBCLK [15,17,39,43,6]
+0.675VS
+1.35V
+1.35V
+3VS
+1.35V +1.35V
+V_DDR_REF
+0.675VS
+3VS
+0.675VS
+V_DDR_REF
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
14 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
DDRIII DIMMA
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
14 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
DDRIII DIMMA
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
14 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
DDRIII DIMMA
G
D
S
QD2
BSS138-G_SOT23-3
2
1 3
CD18
1U_0402_6.3V6K~D
1
2
CD9
10U_0603_6.3V6M~D
1
2
CD13
10U_0603_6.3V6M~D
1
2
CD19
1U_0402_6.3V6K~D
@
1
2
CD11
10U_0603_6.3V6M~D
1
2
CD22
2.2U_0603_6.3V6K~D
1
2
+
CD7
330U_D2_2.5VY_R15M~D
1
2
RD9 10K_0402_5%~D
1 2
CD20
1U_0402_6.3V6K~D
@
1
2
G
D
S
QD1
BSS138-G_SOT23-3
2
1 3
CD12
10U_0603_6.3V6M~D
1
2
CD6
1U_0402_6.3V6K~D
1
2
JDIMM1
BELLW_80001-1021
CONN@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201
VTT
203
GND1
205
SCL 202
VTT 204
GND2 206
BOSS1
207 BOSS2 208
CD3
1U_0402_6.3V6K~D
1
2
CD21
0.1U_0402_16V7K~D
1
2
CD2
0.1U_0402_16V7K~D
1
2
RD8 10K_0402_5%~D
1 2
CD17
1U_0402_6.3V6K~D
1
2
CD8
10U_0603_6.3V6M~D
1
2
CD5
1U_0402_6.3V6K~D
1
2
CD16
0.1U_0402_16V7K~D
1
2
CD4
1U_0402_6.3V6K~D
1
2
CD10
10U_0603_6.3V6M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Layout Note:
Place near JDIMMB.203,204
Layout Note:
Place near JDIMMB
All VREF traces should
have 10 mil trace width
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
M1
Layout Note:
Place near JDIMMB.199
All VREF traces should
have 10 mil trace width
+V_DDR_REF
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
+V_DDR_REF
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D22
DDR_B_D20
DDR3_DRAMRST#
DDR_B_D23
DDR_B_D21
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D7
DDR_B_D6
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D57
DDR_CKE2_DIMMB
DDR_B_D59
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D42
DDR_B_D48
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D51
DDR_B_MA15
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
PCH_SMBDATA
PCH_SMBCLK
DDR_B_D63
DDR_B_MA7
M_ODT2
DDR_B_MA14
DDR_B_D37
DDR_B_D36
DDR_B_MA6
DDR_B_D54
DDR_CKE3_DIMMB
DDR_B_MA4
DDR_B_D38
DDR_B_BS1
M_ODT3
M_CLK_DDR3
DDR_B_RAS#
M_CLK_DDR#3
DDR_B_MA2
DDR_B_DQS#5
DDR_B_MA11
DDR_B_D60
DDR_B_D39
DDR_B_MA0
DDR_B_DQS5
DDR_CS2_DIMMB#
DDR_B_D10
DDR_B_D13 DDR_B_D12
DDR_B_D9
DDR_B_D14
DDR_B_D8
DDR_B_D15
DDR_B_D50DDR_B_D55
DDR_B_D49
DDR_B_D53
DDR_B_D52
DDR_B_D43
DDR_B_D47
DDR_B_D46
DDR_B_D45
DDR_B_D41DDR_B_D44
DDR_B_D40
DDR_B_D56
DDR_B_D62 DDR_B_D58
DDR_B_D[0..63][9]
DDR_B_DQS[0..7][9]
DDR_B_DQS#[0..7][9]
DDR_B_MA[0..15][9]
DDR3_DRAMRST# [14,8]
DDR_CS3_DIMMB#[9]
DDR_B_CAS#[9]
DDR_B_WE#[9]
DDR_B_BS0[9]
M_CLK_DDR#2[9]
M_CLK_DDR2[9]
DDR_CKE2_DIMMB[9]
DDR_B_BS2[9]
PCH_SMBDATA [14,17,39,43,6]
PCH_SMBCLK [14,17,39,43,6]
M_CLK_DDR#3 [9]
DDR_B_BS1 [9]
DDR_B_RAS# [9]
DDR_CS2_DIMMB# [9]
M_ODT2 [9]
M_ODT3 [9]
M_CLK_DDR3 [9]
DDR_CKE3_DIMMB [9]
+1.35V
+1.35V
+0.675VS
+1.35V +1.35V
+3VS
+0.675VS
+3VS
+3VS
+0.675VS
+V_DDR_REF
+V_DDR_REF
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
15 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
DDRIII DIMMB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
15 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
DDRIII DIMMB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
15 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
DDRIII DIMMB
RD16 10K_0402_5%~D
1 2
CD35
10U_0603_6.3V6M~D
1
2
CD39
1U_0402_6.3V6K~D
1
2
CD40
1U_0402_6.3V6K~D
1
2
CD31
10U_0603_6.3V6M~D
1
2
CD28
1U_0402_6.3V6K~D
1
2
CD32
10U_0603_6.3V6M~D
1
2
CD34
10U_0603_6.3V6M~D
1
2
CD27
1U_0402_6.3V6K~D
1
2
CD30
10U_0603_6.3V6M~D
1
2
RD15 10K_0402_5%~D
1 2
CD41
1U_0402_6.3V6K~D
@
1
2
CD33
10U_0603_6.3V6M~D
1
2
CD38
0.1U_0402_16V7K~D
1
2
CD26
1U_0402_6.3V6K~D
1
2
CD25
1U_0402_6.3V6K~D
1
2
JDIMM2
BELLW_80001-1021
CONN@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201
VTT
203
GND1
205
SCL 202
VTT 204
GND2 206
BOSS1
207 BOSS2 208
CD24
0.1U_0402_16V7K~D
1
2
CD44
2.2U_0603_6.3V6K~D
1
2
CD42
1U_0402_6.3V6K~D
@
1
2
CD43
0.1U_0402_16V7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H Integrated VRM enable
LIntegrated VRM disable
*
LOW=Default
HIGH=No Reboot
*
This signal has a weak internal pull-down
On Die PLL VR is supplied by
1.5V when smapled high
1.8V when sampled low
Needs to be pulled High for Huron River platfrom
*
Low = Disabled
High = Enabled
If the signal is sampled high, this indicate that
the system is strapped to the "No Reboot" mode
ME debug mode , this signal has a weak internal PD
L=>security measures defined in the Flash
Descriptor will be in effect (default)
H=>Flash Descriptor Security will be overridden
PCH Strap PIN
*
HDD
SSD
for enable ME code programing
Reserve for RF please close to UH1
Reserve for EMI
JTAG
W=20mils
W=20mils
W=20mils
RTC Battery
0
0
1
1
1 1
Boot BIOS Location
LPC
Reserved (NAND)
PCI
SPI
BBS_BIT[0]BBS_BIT[1]
Boot BIOS Strap
0 0
GPIO19 => BBS_BIT0
GPIO51 => BBS_BIT1
*
SATA Impedance Compensation
CAD note:
Place the resistor within 500 mils of the PCH.
Avoid routing next to clock pins.
PT
SM_INTRUDER#
PCH_INTVRMEN
PCH_INTVRMEN
HDA_SPKR
HDA_SYNC
HDA_SDOUT
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
HDA_BIT_CLK
HDA_SYNC
HDA_RST#
HDA_SPKR
HDA_SDIN0
HDA_SDOUT
DP_PCH_HPD
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1
PCH_SATALED#
PCH_GPIO21
BBS_BIT0
SATA_RCOMP
HDA_SDOUT
HDA_BIT_CLK
HDA_SYNC
HDA_RST#
HDA_BITCLK_AUDIO
HDA_BIT_CLK
HDA_SDOUTPCH_JTAG_TCKPCH_JTAG_TMSPCH_JTAG_TDO PCH_JTAG_TDI
BBS_BIT0
PCH_RTCX2
PCH_RTCX1
PCH_RTCX2
PCH_RTCX1
HDA_SPKR[47]
HDA_SDIN0[46]
DP_PCH_HPD[18,37]
SATA_PRX_DTX_P0 [43]
SATA_PRX_DTX_N0 [43]
SATA_PTX_DRX_N0 [43]
SATA_PTX_DRX_P0 [43]
SATA_PRX_DTX_N1 [42]
SATA_PRX_DTX_P1 [42]
SATA_PTX_DRX_P1_C [42]
SATA_PTX_DRX_N1_C [42]
HDA_SDO[38]
HDA_SDOUT_AUDIO[46]
HDA_RST_AUDIO#[46,47]
HDA_SYNC_AUDIO[46]
HDA_BITCLK_AUDIO[46]
BBS_BIT1 [18]
+RTCVCC
+RTCVCC
+3VS
+3V_PCH
+3V_PCH
+RTCVCC
+RTCVCC
+3VS
+3V_PCH +3V_PCH+3V_PCH
+3VLP
+RTCBATT
+RTCVCC
+1.5VS
+1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
16 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (1/8) SATA,HDA
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
16 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (1/8) SATA,HDA
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
16 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (1/8) SATA,HDA
CH2 10P_0402_50V8J~D@
1 2
RH21 7.5K_0402_1%~D
1 2
RH6 33_0402_5%~D
1 2
RH32 1K_0402_5%~D@
1 2
JTAGRTC AZALIA
SATA
LPT_PCH_M_EDS
REV = 5
1 OF 11
U7A
LYNXPOINT_BGA695
@
TP20
AB6
TP25
F8
TP9 BA2
TP22
C26
RTCX1
B5
SATA_RXN_1 BC10
SATA_RXP_1 BE10
JTAG_TDI
AE2
JTAG_TDO
AD3
JTAG_TMS
AD1
JTAG_TCK
AB3
HDA_SDO
A24
HDA_SDI2
G22
HDA_SDI3
F22
HDA_SDI1
K22
HDA_SDI0
L22
RTCRST#
D9
INTRUDER#
A8
INTVRMEN
G10
SRTCRST#
B9
RTCX2
B4
SATA_IREF BD4
SATA0GP/GPIO21 AT1
SATA1GP/GPIO19 AU2
SATALED# AP3
SATA_RCOMP AY5
SATA_TXP5/PETP2 AR15
SATA_RXP5/PERP2 BE14
SATA_TXN5/PETN2 AP15
SATA_RXN5/PERN2 BC14
SATA_TXP4/PETP1 AW15
SATA_TXN4/PETN1 AV15
SATA_RXP4/PERP1 BB13
SATA_RXN4/PERN1 BD13
SATA_TXP_3 AT13
SATA_RXP_3 BE12
SATA_TXN_3 AR13
SATA_RXN_3 BC12
SATA_TXP_2 AW 13
SATA_TXN_2 AY13
SATA_RXN_2 BB9
SATA_RXP_2 BD9
SATA_TXP_1 AW 10
SATA_TXN_1 AV10
SATA_TXP_0 AY8
SATA_TXN_0 AW8
SATA_RXP_0 BE8
SATA_RXN_0 BC8
HDA_RST#
C24
SPKR
AL10
HDA_SYNC
A22
HDA_BCLK
B25
HDA_DOCK_RST#/GPIO13
C22
DOCKEN#/GPIO33
B17
TP8 BB2
CLRP2
SHORT PADS
12
RH3 20K_0402_5%~D
1 2
RH15 33_0402_5%
1 2
RH16 330K_0402_5%@
1 2
YH1
32.768KHZ_12.5PF_FC-135
1 2
RH26
100_0402_1%~D
12
RH12 10K_0402_5%~D
1 2
RH29 10K_0402_5%~D
1 2
CH6
1U_0603_10V6K~D
1
2
RH244 1K_0402_5%~D@
1 2
RH1 10M_0402_5%
1 2
CLRP1
SHORT PADS
12
RH20
210_0402_1%~D
12
CH3
18P_0402_50V8J~D
1
2
RH35
51_0402_5%
12
RH24
100_0402_1%~D
12
RH245 1K_0402_5%~D@
1 2
CH5
1U_0603_10V6K~D
1
2
CH17 0.01U_0402_16V7K~D
1 2
CH1 10P_0402_50V8J~D@
1 2
RH19
210_0402_1%~D
12
RH11 1K_0402_5%~D
1 2
RH2 1M_0402_5%~D
1 2
RH4 20K_0402_5%~D
1 2
RH25
100_0402_1%~D
12
CH4
18P_0402_50V8J~D
1
2
CH12
1U_0603_10V6K~D
1
2
RH5 33_0402_5%~D
1 2
RH13 330K_0402_5%
1 2
RH14 10K_0402_5%~D@
1 2
RH8 1M_0402_5%~D
1 2
RH23 1K_0402_5%~D@
1 2
RH18
210_0402_1%~D
12
RTCR1
1K_0402_5%~D
1 2
RTCD1
BAT54CW_SOT323-3
2
3
1
RH7 33_0402_5%~D
1 2
RH17 1K_0402_5%~D@
1 2
CH18 0.01U_0402_16V7K~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLOCK TERMINATION for FCIM and need
close to PCH
MiniWLAN (Mini Card 1)--->
Card Reader --->
No support iAMT
PCH to DDR, XDP, TP, FFS, AMP
PCH to EC
Reserve for EMI
Reserve for EMI
PCH to NFC
PT
PT
PT
PT
PT
CLK_PCH_14M
CLK_BUF_BCLK#
CLKIN_DOT96
CLKIN_DOT96#
CLKIN_DMI#
CLKIN_DMI
CLKIN_SATA
CLKIN_SATA#
CLK_PCI_TPM_R
CLK_PCH_14M
CLKIN_DMI
CLKIN_DMI#
CLK_BUF_BCLK#
CLK_BUF_BCLK
CLKIN_DOT96
CLKIN_DOT96#
CLKIN_SATA
CLKIN_SATA#
CLK_PCI_LPBACK
CLK_PEG_VGA
CLK_PEG_VGA#
CLK_CPU_DMI
CLK_CPU_DMI#
PCIECLKREQ0#
LANCLK_REQ#
PCH_GPIO20
MINI3CLK_REQ#
CDCLK_REQ#
PCH_GPIO44
PEG_B_CLKREQ#
CLK_PCI_LPBACK CLK_PCI0
CLK_PCI1
CLK_PCI2CLK_PCI_DEBUG
CLK_PCI_LPC
DPLL_REF_CLK
DPLL_REF_CLK#
CLK_CPU_SSC_DPLL
CLK_CPU_SSC_DPLL#
PEG_A_CLKRQ#
CLK_BUF_BCLK
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
LPC_FRAME#
SML1DATA
SML1CLK
NFC_IRQ
SML0CLK
SML0DATA
DRAMRST_CNTRL_PCH
CCD_INT
SMBCLK
SMBDATA
PCH_SPI_CS1#
PCH_SPI_CLK_R
PCH_SPI_CS#
PCH_SPI_SI_R
PCH_SPI_SO_R
SMBDATA
SMBCLK
SML1CLK
SML1DATA
CLK_PCI_TPM
KB_DET#
PCH_CLK_BIASREF
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_WP#
PCH_SPI_HOLD#
PCH_SPI_CS#
PCH_SPI_HOLD#
NFC_IRQ
SMBCLK
SMBDATA
DRAMRST_CNTRL_PCH
CCD_INT
PCH_TD_IREF
CLK_PCI_DEBUG
CLK_PCI_LPC
PCH_SPI_WP#
PCH_SPI_CS#
SERIRQ
PCH_SPI_HOLD#_R
PCH_SPI_WP#_R
PCH_GPIO44
NFC_DET#
CDCLK_REQ#
MINI3CLK_REQ#
PCH_GPIO20
LANCLK_REQ#
XTAL25_IN
XTAL25_OUT
XTAL25_OUT
XTAL25_IN
SML1CLK
SML1DATA
PCH_SMBCLK
PCH_SMBDATA
PCH_SPI_HOLD#
PCH_SPI_WP# PCH_SPI_WP#_R
PCH_SPI_SI_R
PCH_SPI_SO_R
PCH_SPI_CLK_RPCH_SPI_CLK
PCH_SPI_SO
PCH_SPI_SI
PCIECLKREQ0#
NFC_RST#
PCH_SPI_SO
NFC_DET#
NFC_RST#
SML0CLK
SML0DATA
KB_DET# [39]
CLK_PCI_TPM [40]
PEG_A_CLKRQ# [24]
CLK_PEG_VGA [24]
CLK_PEG_VGA# [24]
CLK_CPU_DMI# [8]
CLK_CPU_DMI [8]
CLK_PCIE_MINI3#[40]
CLK_PCIE_MINI3[40]
MINI3CLK_REQ#[40]
CLK_PCIE_CD[40]
CLK_PCIE_CD#[40]
CDCLK_REQ#[40]
CLK_PCI_LPC[38]
CLK_PCI_DEBUG[42]
DPLL_REF_CLK# [8]
DPLL_REF_CLK [8]
CLK_CPU_SSC_DPLL# [8]
CLK_CPU_SSC_DPLL [8]
LPC_AD3[38,40,42]
LPC_AD2[38,40,42]
LPC_AD1[38,40,42]
LPC_AD0[38,40,42]
LPC_FRAME#[38,40,42]
SERIRQ[38,40]
PCH_SMBCLK [14,15,39,43,6]
PCH_SMBDATA [14,15,39,43,6]
PCH_SMLCLK [25,35,38,40]
PCH_SMLDATA [25,35,38,40]
NFC_IRQ [49]
SML0CLK [49]
SML0DATA [49]
PEG_B_CLKREQ# [19]
CLK_CPU_ITP#[6]
CLK_CPU_ITP[6]
NFC_DET#[49]
NFC_RST#[49]
+3V_PCH
+3VS
+3VS
+3VS
+1.5VS
+3V_PCH
+3V_PCH
+3V_PCH
+3VS
+1.5VS
+3V_PCH
+3V_PCH
+3VS
+3VS
+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
17 62Tuesday, September 17, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (2/8) SMBUS, CLK, SPI, LPC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
17 62Tuesday, September 17, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (2/8) SMBUS, CLK, SPI, LPC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
17 62Tuesday, September 17, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (2/8) SMBUS, CLK, SPI, LPC
LPT_PCH_M_EDS
SMBus
C-Link
Thermal
SPILPC
3 OF 11
REV = 5
U7D
LYNXPOINT_BGA695
@
SML1ALERT#/PCHHOT#/GPIO74 H6
SPI_IO3
AJ2
SPI_MISO
AH3
SPI_IO2
AJ4
SPI_MOSI
AH1
SPI_CS2#
AJ10
SPI_CS1#
AL7
SPI_CS0#
AJ7
SPI_CLK
AJ11
LDRQ1#/GPIO23
G20
SERIRQ
AL11
LDRQ0#
D21
LFRAME#
B21
LAD_3
C18
LAD_2
A18
LAD_1
C20
LAD_0
A20
TD_IREF AY43
CL_DATA AF10
CL_RST# AF7
CL_CLK AF11
SML1DATA/GPIO75 N11
SML1CLK/GPIO58 K6
SML0DATA R7
SML0CLK U8
SML0ALERT#/GPIO60 N8
SMBDATA U11
SMBCLK R10
SMBALERT#/GPIO11 N7
TP2 BC45
TP4 BE43
TP1 BA45
TP3 BE44
RH145 22_0402_5%
1 2
RPH24
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RH65 10K_0402_5%~D@
1 2
RH63 10K_0402_5%~D
1 2
RH146 22_0402_5%
1 2
RH33 3.3K_0402_5%@
1 2
RH40 1K_0402_5%~D
1 2
CH26 10P_0402_50V8J~D@
1 2
RH68 10K_0402_5%~D
1 2
RPH27
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
YH2
25MHZ_10PF_X3G025000DA1H~D
NC
4
OSC
1
OSC 3
NC 2
RH66 10K_0402_5%~D
1 2
RH38 1K_0402_5%~D
1 2
QH2B
DMN66D0LDW-7_SOT363-6~D
3
5
4
RH322
8.2K_0402_1%
12
CH14 10P_0402_50V8J~D@
1 2
RH62 10K_0402_5%~D
1 2
CH27
12P_0402_50V8J
1
2
T7PAD~D @
RH144 22_0402_5%
1 2
RH41 15_0402_1%
1 2
CH13
10P_0402_50V8J~D
@
12
RH28 7.5K_0402_1%~D
1 2
RPH25
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RH724 499_0402_1%
N14@
1 2
QH3A
DMN66D0LDW-7_SOT363-6~D
6 1
2
RPH5
15_0804_8P4R_5%
1 8
2 7
3 6
4 5
RH89 1M_0402_5%~D
1 2
QH3B
DMN66D0LDW-7_SOT363-6~D
3
5
4
RH53
1K_0402_5%~D
1 2
RH69 10K_0402_5%~D
1 2
RH725 499_0402_1%
N14@
1 2
RH67 10K_0402_5%~D
1 2
RH456 2.2K_0402_5%~D
1 2
CH11
0.1U_0402_16V7K~D
1
2
RH448 2.2K_0402_5%~D
1 2
RPH14
2.2K_8P4R_5%
1 8
2 7
3 6
4 5
RH97 22_0402_1%
1 2
RH98 100K_0402_5%~D
1 2
LPT_PCH_M_EDS
CLOCK SIGNAL
REV = 5
2 OF 11
U7C
LYNXPOINT_BGA695
@
PCIECLKRQ4#/GPIO26
V3 CLKOUT_PCIE_P_4
AF45
CLKOUT_PCIE_P_5
AE42
PCIECLKRQ5#/GPIO44
AA2
CLKOUT_PCIE_N_6
AB40
CLKOUT_PCIE_P_6
AB39
PCIECLKRQ6#/GPIO45
AE4
CLKOUT_PCIE_N_7
AJ44
CLKOUT_PCIE_P_7
AJ42
CLKOUTFLEX2/GPIO66 F36
CLKIN_SATA BE6
CLKIN_GND AR24
CLKIN_DMI AY24
PCIECLKRQ1#/GPIO18
AF1
CLKOUT_DP AJ40
CLKOUT_DMI AF39
CLKOUT_PCIE_N_0
Y43
CLKOUT_PCIE_P_0
Y45
CLKOUT_PEG_B Y39
CLKOUT_PEG_A AB35
PCIECLKRQ0#/GPIO73
AB1
CLKOUT_PEG_A_P AB36
PEGA_CLKRQ#/GPIO47 AF6
CLKOUT_PEG_B_P Y38
PEGB_CLKRQ#/GPIO56 U4
CLKOUT_PCIE_P_1
AA42
CLKOUT_PCIE_N_2
AB43
CLKOUT_ITPXDP
AH43
XTAL25_IN AL44
XTAL25_OUT AM43
CLKOUTFLEX0/GPIO64 C40
CLKOUTFLEX1/GPIO65 F38
DIFFCLK_BIASREF AN44
ICLK_IREF AM45
CLKOUTFLEX3/GPIO67 F39
CLKIN_33MHZLOOPBACK D17
REFCLK14IN F45
CLKIN_SATA_P BC6
CLKIN_DOT96P G33
CLKIN_DOT96N H33
CLKIN_GND_P AT24
CLKIN_DMI_P AW24
CLKOUT_DP_P AJ39
CLKOUT_DMI_P AF40
CLKOUT_PCIE_N_1
AA44
PCIECLKRQ7#/GPIO46
Y3
CLKOUT_ITPXDP_P
AH45
CLKOUT_33MHZ1
E44
CLKOUT_33MHZ0
D44
CLKOUT_33MHZ2
B42
CLKOUT_33MHZ3
F41
CLKOUT_33MHZ4
A40
CLKOUT_PCIE_N_4
AF43
CLKOUT_PCIE_N_3
AD43
CLKOUT_PCIE_P_3
AD45
PCIECLKRQ3#/GPIO25
T3
CLKOUT_PCIE_N5
AE44
CLKOUT_DPNS_P AF36
CLKOUT_DPNS AF35
PCIECLKRQ2#/GPIO20/SMI#
AF3
CLKOUT_PCIE_P_2
AB45
TP19 AD39
TP18 AD38
QH2A
DMN66D0LDW-7_SOT363-6~D
6 1
2
RH75 10K_0402_5%~D
1 2
CH28
12P_0402_50V8J
1
2
UH2
W25Q64FVQ_SO8
CS#
1
DO(IO1)
2
WP#(IO2)
3
GND
4
VCC 8
HOLD#(IO3) 7
CLK 6
DI(IO0) 5
RH64 10K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H Enable
LDisable
If strap is sampled high, the Integrated Deep S4/S5 Well
(DSW) On-Die VR mode is enabled
*
PCH Strap PIN
PCH Strap PIN
H Enable
L Default
*
For deep S3
For deep S3, connector to EC
For deep S3
For deep S3
For deep S3
PT
PT
PT
PT
PT
PT
PT
PT
ST
PCH_PWROK_EC
DSWODVREN
DMI_CTX_PRX_N1
DMI_CTX_PRX_N0
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CRX_PTX_N1
DMI_CRX_PTX_N0
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P3
DMI_CRX_PTX_P2
FDI_CSYNC
XDP_DBRESET#
SYS_PWROK
PCH_PWROK_EC
PM_DRAM_PWRGD
PCH_GPIO72
RI#
DSWODVREN
WAKE#
PM_CLKRUN#
PM_SLP_A#
H_PM_SYNC
eDP_LVDDEN
eDP_PWM
ENBKL
HDMI_DDB_CTRLDATA
HDMI_DDB_CTRLCLK
HDMI_PCH_HPD
PCI_PIRQD#
PCI_PIRQC#
PCI_PIRQB#
PCI_PIRQA#
BBS_BIT1
EN_CAM
DGPU_HOLD_RST#
WL_OFF#
PCH_GPIO52
PCH_PLTRST#
CAB_DET_SINK
ODD_DA#
PCH_GPIO5
FFS_INT1
DMI_RCOMP
SLP_WLAN#
PCH_RSMRST#
SYS_PWROK
SLP_LAN#
PM_CLKRUN#
PCH_PLTRST#
PCH_GPIO5
ENBKL
eDP_LVDDEN
PCH_PLTRST#
WL_OFF#
AC_PRESENT
IMVP_VR_PG
SYS_PWROK
PCH_PWROK_EC
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQC#
PCH_GPIO52
WL_OFF#
DGPU_HOLD_RST#
RI#
PCH_SUSWARN#
WAKE#
PCH_GPIO72
PBTN_OUT#
AC_PRESENT
PCH_RSMRST#
DGPU_HOLD_RST#
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#
mDP_DDC_CTRLDATA
mDP_DDC_CTRLCLK
mDP_AUXN_PCH
mDP_AUXP_PCH
DP_PCH_HPD
HDMI_DDB_CTRLDATA
HDMI_DDB_CTRLCLK
mDP_DDC_CTRLDATA
mDP_DDC_CTRLCLK
ODD_DA#
DGPU_PWR_EN#
DGPU_PWR_EN#
DGPU_PWR_EN#
PCH_PWROK_EC[38]
DMI_CTX_PRX_N0[7]
DMI_CTX_PRX_N1[7]
DMI_CTX_PRX_N3[7]
DMI_CTX_PRX_N2[7]
DMI_CTX_PRX_P0[7]
DMI_CTX_PRX_P1[7]
DMI_CTX_PRX_P3[7]
DMI_CTX_PRX_P2[7]
DMI_CRX_PTX_N1[7]
DMI_CRX_PTX_N0[7]
DMI_CRX_PTX_N2[7]
DMI_CRX_PTX_N3[7]
DMI_CRX_PTX_P1[7]
DMI_CRX_PTX_P0[7]
DMI_CRX_PTX_P2[7]
DMI_CRX_PTX_P3[7]
FDI_CSYNC [7]
XDP_DBRESET#[6,8]
PM_DRAM_PWRGD[8]
PCH_RSMRST#[38]
PCH_SUSWARN#[38]
PBTN_OUT#[38,6]
AC_PRESENT[38]
PM_CLKRUN# [40]
SUSCLK_R [38,40]
PM_SLP_S5# [38]
PM_SLP_S4# [38,55]
PM_SLP_S3# [34,38,40,43,55,56]
H_PM_SYNC [8]
ENBKL[35,38]
eDP_LVDDEN[35]
eDP_PWM[35]
HDMI_DDB_CTRLDATA [36]
HDMI_DDB_CTRLCLK [36]
HDMI_PCH_HPD [36]
WL_OFF#[40]
CAB_DET_SINK [37]
FFS_INT1 [43]
PLT_RST#[38,40,42,6,8]
DGPU_PWR_EN[24,33,59]
PLTRST_VGA#[24]
BBS_BIT1[16]
SUSACK#[38]
PM_SLP_SUS# [34,38]
IMVP_VR_PG[38,58,6]
FDI_INT [7]
POK [52,54]
mDP_DDC_CTRLDATA [37]
mDP_DDC_CTRLCLK [37]
mDP_AUXN_PCH [37]
mDP_AUXP_PCH [37]
DP_PCH_HPD [16,37]
+RTCVCC
+3VS
+1.5VS
+1.5VS
+3VS
+3VS
+3VS
+3VS_DELAY
+3VALW
+3VS
+3VS
+3VS
+3V_PCH+3V_PCH
+3VALW +3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
18 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (3/8) DMI,FDI,PM,GFX,DP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
18 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (3/8) DMI,FDI,PM,GFX,DP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
18 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (3/8) DMI,FDI,PM,GFX,DP
T40 PAD~D @
CH99
0.01U_0402_16V7K~D
@
1
2
RH247
10K_0402_5%~D
@
1 2
RH155
100K_0402_5%~D
12
RH127 10K_0402_5%~D
1 2
RPH2
8.2K_0804_8P4R_5%
18
27
36
45
UH5
SN74AHC1G08DCKR_SC70-5
IN1 1
IN2 2
G
3
O
4
P5
T8PAD~D@
T178PAD~D@
RH122 330K_0402_5%@
12
RPH1
8.2K_0804_8P4R_5%
18
27
36
45
T41 PAD~D @
T176PAD~D@
RH130 10K_0402_5%~D
1 2
RH99 7.5K_0402_1%~D
1 2
T46 PAD~D @
RH154
100K_0402_5%~D
12
RH243 1K_0402_5%~D@
1 2
RH164 8.2K_0402_5%~D@
1 2
T39 PAD~D @
LPT_PCH_M_EDS
DMI
Management
FDI
System Power
REV = 5
4 OF 11
U7B
LYNXPOINT_BGA695
@
TP21
AB10
TP10 AW44
TP16 AV43
TP12
AW17
TP17 AU42
TP7
AV17
TP5 AY45
TP13 AU44
SUSWARN#/SUSPWRNACK/GPIO30
J4
DMI_IREF
BE16
DMI_RCOMP
AY17
FDI_RCOMP AR44
SLP_W LAN#/GPIO29
D2
DRAMPWROK
H3
APW ROK
AB7
PWROK
F10
SYS_RESET#
AM1
DMI_RXP_2
AR17
DMI_RXP_3
AW20
DMI_TXN_0
BD21
DMI_TXN_1
BE20
SLP_LAN# G5
PMSYNCH AY3
SLP_SUS# F1
SLP_A# F3
SLP_S3# H1
SLP_S4# C6
SLP_S5#/GPIO63 Y7
SUSCLK/GPIO62 Y6
SUS_STAT#/GPIO61 U7
CLKRUN# AN7
WAKE# K3
DPW ROK L13
FDI_IREF AT45
FDI_CSYNC AL39
FDI_RXP_1 AL36
FDI_RXP_0 AJ36
FDI_RXN_1 AL35
FDI_RXN_0 AJ35
ACPRESENT/GPIO31
E6
SYS_PWROK
AD7
SUSACK#
R6
DMI_TXP_2
BB17
DMI_TXP_0
BB21
DMI_RXP_1
AP20
DMI_RXN_2
AP17
DMI_TXP_3
BC18
DMI_TXP_1
BC20
DMI_TXN_3
BE18 DMI_TXN_2
BD17
DMI_RXP_0
AY22
DMI_RXN_3
AV20
PWRBTN#
K1
RI#
N4
BATLOW#/GPIO72
K7
RSMRST#
J2
FDI_INT AL40
DSW VRMEN C8
DMI_RXN_1
AR20 DMI_RXN_0
AW22
TP15 AV45
RH416 0_0402_5%@
1 2
RH119 330K_0402_5%
12
RH193 10K_0402_5%~D@
1 2
RH167 8.2K_0402_5%~D
1 2
RH120 10K_0402_5%~D@
1 2
RH121 10K_0402_5%~D
1 2
RPH4
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
T175PAD~D@
UH3
MC74VHC1G08DFT2G_SC70-5
IN1
1
IN2
2OUT 4
VCC 5
GND
3
UH4
SN74AHC1G08DCKR_SC70-5
IN1 1
IN2 2
G
3
O
4
P5
RH138 100K_0402_5%~D
1 2
RPH16
2.2K_8P4R_5%
1 8
2 7
3 6
4 5
T42 PAD~D @
G
D
S
QH6
2N7002_SOT23-3
@
2
13
RH132 100K_0402_5%~D
1 2
RH136 8.2K_0402_5%~D
1 2
T44 PAD~D @
T170PAD~D@
T6 PAD~D @
T81PAD~D@
T38 PAD~D @
LPT_PCH_M_EV
DISPLAY
LVDSCRT
PCI
5 OF 11
REV = 5
U7E
LYNXPOINT_BGA695
@
VGA_BLUE
T45
VGA_GREEN
U44
VGA_RED
V45
VGA_DDC_CLK
M43
DAC_IREF
U40
VGA_IRTN
U39
EDP_BKLTCTL
N36
EDP_BKLTEN
K36
EDP_VDDEN
G36
PIRQA#
H20
PIRQB#
L20
PIRQC#
K17
PIRQD#
M20
GPIO50
A12
GPIO52
B13
GPIO54
C12
GPIO51
C10
GPIO53
A10
GPIO55
AL6
DDPB_CTRLCLK R40
DDPB_CTRLDATA R39
DDPC_CTRLCLK R35
DDPC_CTRLDATA R36
DDPD_CTRLCLK N40
DDPD_CTRLDATA N38
DDPB_AUXN H45
DDPC_AUXN K43
DDPD_AUXN J42
DDPB_AUXP H43
DDPC_AUXP K45
DDPD_AUXP J44
DDPB_HPD K40
DDPC_HPD K38
DDPD_HPD H39
PIRQE#/GPIO2 G17
PIRQH#/GPIO5 M15
PME# AD10
PLTRST# Y11
PIRQG#/GPIO4 L15
PIRQF#/GPIO3 F17
VGA_VSYNC
N44
VGA_HSYNC
N42
VGA_DDC_DATA
M45
T177PAD~D@
T37 PAD~D @
T171PAD~D@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB Conn 1 (Power share)
USB Conn 2 (Power share)
USB Conn 3 (Power share)
Camera
Mini Card(WLAN)
CARD_READER --->
MiniWLAN (Mini Card 1)--->
USB Conn 3 (Power share)
USB Conn 1 (Power share)
USB Conn 2 (Power share)
USBRBIAS
CAD NOTE:
Route single-end 50-ohms and max 500-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils.
USB Conn 4 (Power share)
Touch Screen
PT
USB20_N1
USB20_P1
USB20_N0
USB20_P0
USB20_P2
USB20_N2
USB20_N12
USB20_P12
USB20_N4
USB20_P4
USBRBIAS
USB_OC2#
USB_OC5#
USB_OC7#
USB_OC3#
USB_OC0#
USB_OC1#
USB_OC4#
USB_OC6#
PCIE_PRX_CARDTX_P4
PCIE_PRX_CARDTX_N4
PCIE_PTX_CARDRX_P4_C
PCIE_PTX_CARDRX_N4_C
PCIE_PTX_WLANRX_P3_C
PCIE_PTX_WLANRX_N3_C
PCIE_PRX_WLANTX_P3
PCIE_PRX_WLANTX_N3
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USB3RN3
USB3RP3
USB3TN3
USB3TP3
PCIE_RCOMP
USB20_P3
USB20_N3
USB20_N9
USB20_P9
USB_OC1#
USB_OC0#
USB_OC6#
USB_OC7#
USB_OC4#
USB_OC3#
USB_OC2#
USB_OC5#
PEG_B_CLKREQ#
USB3RN4
USB3RP4
USB3TN4
USB3TP4
USB20_N2 [40]
USB20_P2 [40]
USB20_N1 [44]
USB20_P1 [44]
USB20_N0 [44]
USB20_P0 [44]
USB20_N12 [40]
USB20_P12 [40]
USB20_N4 [40]
USB20_P4 [40]
USB_OC1# [40]
USB_OC0# [44]
PCIE_PRX_CARDTX_N4[40]
PCIE_PTX_CARDRX_N4[40]
PCIE_PRX_CARDTX_P4[40]
PCIE_PTX_CARDRX_P4[40]
PCIE_PRX_WLANTX_N3[40]
PCIE_PTX_WLANRX_N3[40]
PCIE_PRX_WLANTX_P3[40]
PCIE_PTX_WLANRX_P3[40]
USB3RN1 [45]
USB3RP1 [45]
USB3TN1 [45]
USB3TP1 [45]
USB3RN2 [45]
USB3RP2 [45]
USB3TN2 [45]
USB3TP2 [45]
USB3RN3 [40]
USB3RP3 [40]
USB3TN3 [40]
USB3TP3 [40]
USB20_N3 [40]
USB20_P3 [40]
USB20_N9 [35]
USB20_P9 [35]
PEG_B_CLKREQ#[17]
USB3RN4 [40]
USB3RP4 [40]
USB3TN4 [40]
USB3TP4 [40]
+1.5VS
+1.5VS
+3V_PCH
+3V_PCH
+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
19 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (4/8) PCI, USB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
19 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (4/8) PCI, USB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
19 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (4/8) PCI, USB
RH143 22.6_0402_1%
1 2
CH21 0.1U_0402_10V7K~D
1 2
CH22 0.1U_0402_10V7K~D
1 2
RPH29
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
LPT_PCH_M_EDS
USB
PCIe
9 OF 11
REV = 5
U7I
LYNXPOINT_BGA695
@
USB3TP6 BE28
USB3TN6 BD27
USB3RP6 AP29
USB3RN6 AR29
USB3TP5 BC26
USB3TN5 BE26
USB3RP5 AV29
USB3RN5 AW29
PETP1/USB3TP3
BC32
PERP2/USB3RP4
AR31
PETP2/USB3TP4
BB33
USB3TP2 BC24
PETN2/USB3TN4
BD33
PERN2/USB3RN4
AT31
PETN1/USB3TN3
BE32
PERP1/USB3RP3
AY31 PERN1/USB3RN3
AW31
PERN_3
AW33
PERP_3
AY33
PETN_3
BE34
PETN_4
BE36
PERN_5
AW36
PERP_5
AV36
PETN_5
BD37
PERP_6
AW38
PETN_6
BC38
PERN_7
AT40
USB2N13 F24
USB2P13 G24
USB2N12 G26
USB2P12 F26
USB2P11 C28
USB2N11 A28
USB2P10 D29
USB2P9 C30
USB2N10 B29
USB2N9 A30
USB2P8 C32
USB2N8 A32
USB2N7 G29
USB2P7 H29
USB2P6 L31
USB2N6 K31
USB2P5 G31
USB2P4 D33
USB2N5 F31
USB2N4 B33
USB2P3 C34
USB2N3 A34
USB2P2 C36
USB2N2 A36
USB2P1 C38
USB2N1 A38
USB2P0 D37
USB2N0 B37
PETP_8
BD41
PCIE_IREF
BE30
PCIE_RCOMP
BD29
PETP_3
BC34
PERN_4
AT33
PERP_4
AR33
PETP_4
BC36
PETP_5
BB37
PERN_6
AY38
PETP_6
BE38
PERP_7
AT39
PETN_7
BE40
PETP_7
BC40
PERN_8
AN38
PERP_8
AN39
PETN_8
BD42
USB3RN1 AR26
USB3RP1 AP26
USB3TN1 BE24
USB3TP1 BD23
USB3RN2 AW26
USB3RP2 AV26
USB3TN2 BD25
USBRBIAS# K24
USBRBIAS K26
OC0#/GPIO59 P3
OC1#/GPIO40 V1
OC2#/GPIO41 U2
OC3#/GPIO42 P1
OC4#/GPIO43 M3
OC5#/GPIO9 T1
OC6#/GPIO10 N2
OC7#/GPIO14 M1
TP23 L33
TP6
BB29
TP11
BC30
TP24 M33
RH84 10K_0402_5%~D
1 2
CH19 0.1U_0402_10V7K~D
1 2
RPH30
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
CH20 0.1U_0402_10V7K~D
1 2
RH113 7.5K_0402_1%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
*
This signal has a weak internal pull up
L On-Die PLL Voltage Regulator disable
H On-Die voltage regulator enable
When Unused as GPIO or SATA*GP -
Use 8.2K-10K pull-down to ground
Low - Intel ME Crypto Transport Layer Security (TLS)
cipher suite with no confidentiality
High - Intel ME Crypto Transport Layer Security (TLS)
cipher suite with confidentiality
*
PCH Strap PIN
For deep S3,
PCH_GPIO27 connect from EC PCH_WAKE#
config GPIO16,GPIO49
USB X4,PCIEX8,SATAX6
USB X6,PCIEX8,SATAX4
11
01
*
1 = N14P-GT
0 = N15P
N14P
PCH_GPIO1
DGPU Board ID Optional
PT
PT
1
0UMA
PCH_GPIO70
DIS
PT
PT
for ST test
PCH_GPIO28
PCH_GPIO0
PCH_GPIO6
PCIE_MCARD1_DET#
KB_RST#
PCH_GPIO15
EC_RUNTIME_SCI#
LCD_DBC
LCD_DCR
PCH_GPIO1
PCH_GPIO6
PCH_GPIO0
EC_RUNTIME_SCI#
EC_SMI#
PCH_GPIO12
PCH_GPIO15
DGPU_PWROK
BT_RADIO_DIS#
WAKE_PCH#
PCH_GPIO28
FFS_INT2
PCH_GPIO36
PCH_GPIO49
HDD_DETECT#
LCD_DCR
PCH_GPIO37
PCIE_MCARD1_DET#
LCD_DBC
PCH_GPIO70
ODD_EN#
KB_BL_DET
USB_MCARD1_DET#
H_CPUPWRGD
KB_RST#
H_THERMTRIP#_C
GATEA20
CPU_PLTRST#
ODD_EN#
PCH_GPIO24
WAKE_PCH#
H_THERMTRIP#_C
PCH_GPIO16
ODD_DETECT#
PCH_GPIO16
PCH_GPIO49
PCH_GPIO36
DGPU_PWROK
BT_RADIO_DIS#
ODD_DETECT#
PCH_GPIO1
USB_MCARD1_DET#
PCH_GPIO37
PCH_GPIO12
EC_SMI#
HDD_DETECT#
PCH_GPIO24
PCH_GPIO70
LCD_DBC
EC_SMI#[38]
EC_RUNTIME_SCI#[38]
DGPU_PWROK[33,59]
BT_RADIO_DIS#[40]
FFS_INT2[43]
HDD_DETECT#[43]
KB_BL_DET[39]
H_CPUPWRGD [6,8]
KB_RST# [38]
H_THERMTRIP# [8]
GATEA20 [38]
CPU_PLTRST# [8]
WAKE_PCH#[38]
LCD_DBC[35]
LCD_DCR[35]
+3VS
+3V_PCH
+3VS
+3VS
+3VALW
+VCCP
+3VS
+3VS
+3VS
+3VS
+3VS
+3V_PCH
+3VALW
+3V_PCH
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
20 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (5/8) GPIO, CPU, MISC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
20 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (5/8) GPIO, CPU, MISC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
20 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (5/8) GPIO, CPU, MISC
RH176 10K_0402_5%~D
1 2
RH180 10K_0402_5%~D
1 2
RH194 10K_0402_5%~D@1 2
RH177 10K_0402_5%~D
1 2
RH188 10K_0402_5%~D@1 2
RH159 10K_0402_5%~D
1 2
RH165 1K_0402_5%~D@1 2
RU45 1K_0402_1%~D@1 2
LPT_PCH_M_EDS
NCTF
CPU/Misc
GPIO
6 OF 11
REV = 5
U7F
LYNXPOINT_BGA695
@
TACH6/GPIO70
G13
TACH7/GPIO71
H15
VSS BA1
VSS BC1
VSS N10
VSS A2
VSS BD45
VSS BD2
VSS BD44
VSS BD1
VSS B45
VSS B2
VSS B1
VSS A44
VSS A41
LAN_PHY_PWR_CTRL/GPIO12
K13
GPIO15
AB11
VSS A43
VSS A4
VSS E45
VSS E1
VSS D1
VSS BE3
VSS BE2
TACH4/GPIO68
C16
GPIO57
U12
SDATAOUT1/GPIO48
AN4
GPIO35/NMI#
AP1
GPIO28
AD11
GPIO34
AN6
GPIO27
R11
GPIO24
Y10
SCLOCK/GPIO22
BB4
TACH3/GPIO7
G15
TACH1/GPIO1
F13
PLTRST_PROC# AU4
THRMTRIP# AV1
PROCPWRGD AV3
RCIN# AT6
PECI AY1
SATA5GP/GPIO49
AK3
VSS B44
TACH5/GPIO69
D13
SATA3GP/GPIO37
AK1
SATA2GP/GPIO36
AT3
VSS
A5 VSS
C45 VSS
BE5 VSS
BE41
SDATAOUT0/GPIO39
AM3
SLOAD/GPIO38
AT7
TACH0/GPIO17
C14
SATA4GP/GPIO16
AN2
GPIO8
Y1
TACH2/GPIO6
A14
BMBUSY#/GPIO0
AT8
TP14 AN10
RH173 10K_0402_5%~D
1 2
RH178 1K_0402_5%~D@1 2
RPH9
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RH162 390_0402_5%
1 2
RH168
10K_0402_5%~D
N14@
12
RH163 10K_0402_5%~D
1 2
RH191 10K_0402_5%~D@1 2
RH171 200K_0402_5%
1 2
RH169 10K_0402_5%~D
1 2
RH175 10K_0402_5%~D
1 2
RH158 1K_0402_5%~D@1 2
RH172
10K_0402_5%~D
N15@
12
RPH8
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RPH7
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RH170 10K_0402_5%~D@1 2
RH174 8.2K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.29A
3.629A
0.179A
0.098A
0.476A
ST
+1.05VS_VCCCORE
+PCH_VCCDSW_R
+PCH_VCCDSW
+PCH_VCCDSW
+VCCAFDI_VRM
+1.05VM_VCCSUS1
+1.05VM_VCCSUS1
+PCH_USB_DCPSUS3
+PCH_USB_DCPSUS3
+VCCAFDI_VRM
+VCCAFDI_VRM
+VCCAFDI_VRM
+VCCP
+VCCP +1.05VM_VCCASW
+VCCAFDI_VRM
+VCCP
+3VS
+1.5VS
+VCCP
+3V_PCH
+VCCP
+VCCP
+VCCAFDI_VRM
+VCCAFDI_VRM
+VCCP +VCCAFDI_VRM
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
21 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (6/8) PWR
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
21 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (6/8) PWR
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
21 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (6/8) PWR
CH72
1U_0402_6.3V6K~D
1
2
CH60
10U_0805_10V6M~D
@
1
2
CH70
1U_0402_6.3V6K~D
1
2
CH75
10U_0603_6.3V6M~D
1
2
CH35
10U_0805_10V6M~D
1
2
JP2
PAD-OPEN 43x39
@
12
CH76
1U_0402_6.3V6K~D
1
2
R56 0_0805_5%@
1 2
CH36
1U_0402_6.3V6K~D
1
2
CH78
1U_0402_6.3V6K~D
1
2
CH37
1U_0402_6.3V6K~D
1
2
CH62
1U_0402_6.3V6K~D
@
1
2
CH46
1U_0402_6.3V6K~D
1
2
CH38
1U_0402_6.3V6K~D
1
2
CH63
10U_0603_6.3V6M~D
@
1
2
RH2200_0603_5%~D @
1 2
CH94
1U_0402_6.3V6K~D
@
1
2
RH2010_0603_5%~D @
1 2
CH66
10U_0805_10V6M~D
@
1
2
JP19
PAD-OPEN 43x39
@
12
CH33
0.1U_0402_10V7K~D
1
2
CH56
1U_0402_6.3V6K~D
1
2
RH37 5.11_0402_1%~D
1 2
CH65
22U_0805_6.3V6M~D
1
2
CH67
10U_0805_10V6M~D
@
1
2
CH68
10U_0805_10V6M~D
@
1
2
LPT_PCH_M_EDS
Core
PCIe/DMI
VCCMPHY
USB3
HVCMOS
FDI
CRT DAC
SATA
7 OF 11
REV = 5
U7G
LYNXPOINT_BGA695
@
VCCVRM AN11
VCC
AE18
VCC
AE22
VCCASW
U20
VCCASW
U22
VCCASW
U24
VCCASW
V22
VCCASW
V24
VCCASW
Y18
VCCASW
Y20
VCCASW
Y22
VCCADAC1_5 P45
VSS P43
VCCADACBG3_3 M31
VCCVRM BB44
VCCIO AN34
VCCIO AN35
VCC3_3_R30 R30
VCC3_3_R32 R32
DCPSUS1 Y12
VCCSUS3_3 AJ30
VCCSUS3_3 AJ32
DCPSUS3 AJ26
DCPSUS3 AJ28
VCCIO AK20
VCCVRM AK26
VCCVRM AK28
VCCIO AK18
VCCVRM BE22
VCCIO AM22
VCCIO AP22
VCCIO AR22
VCCIO AT22
VCCASW
V18
VCCASW
V20
VCCASW
U18 VCCASW
AA18 DCPSUSBYP
U14
VCC
Y26 VCC
AG24 VCC
AG22 VCC
AG20
VCC
AA24
VCC
AA26
VCC
AD20
VCC
AD24 VCC
AD22
VCC
AD26
VCC
AD28
VCCIO AK22
VCCIO AM20
VCCIO AM18
VCC
AG18 VCC
AE26 VCC
AE24
VCC
AE20
CH95
1U_0402_6.3V6K~D
1
2
CH69
1U_0402_6.3V6K~D
1
2
JP5
JUMP_43X118
@
11
2
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Place near pin AP45
Place near pin Y32,AA30,AA32 Place near pin AD34 Place near pin AD35,AD36
Place near pin AG30,AG32,AE30,AE32
Place near pin M29 Place near pin L29 Place near pin L26,M26 Place near pin U32,V32
For deep S3
0.306A
0.055A
0.133A
0.67A
0.01A
0.022A
0.261A
0.015A
0.004A
0.028A
ST
ST
ST
ST
+VCCSST
+VCCRTCEXT
+PCH_VPROC
+PCH_VPROC
+3V_VCCPSPI
+PCH_VCCCFUSE
+PCH_VCCCFUSE
+PCH_VCCASW
+1.05VM_VCCSUS2
+1.05VM_VCCSUS2
+PCH_VCC
+PCH_VCC
+3V_PCH
+3V_PCH
+3VS
+VCCP
+3V_PCH
+RTCVCC
+VCCIO2PCH
+3V_PCH
+3VS
+VCCP
+VCCP
+3VS
+VCCP
+3VS
+VCCP
+VCCP
+VCCP
+PCH_VCCCLK
+PCH_VCCCLK
+PCH_VCCCLK3_3
+3VS
+VCCP +PCH_VCCCLK
+PCH_VCCCLK3_3
+3VALW
+1.5VS
+VCCAFDI_VRM
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
22 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (7/8) PWR
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
22 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (7/8) PWR
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
22 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (7/8) PWR
CH71
1U_0402_6.3V6K~D
1
2
CH93
0.1U_0402_10V7K~D
1
2
CH64
0.1U_0603_25V7K~D
1
2
R55 0_0805_5%~D@
1 2
CH109
1U_0402_6.3V6K~D
1
2
CH111
1U_0402_6.3V6K~D
1
2
RH219 0_0603_5%~D@
1 2
CH102
10U_0603_6.3V6M~D
1
2
CH55
0.1U_0402_10V7K~D
1
2
CH77
1U_0402_6.3V6K~D
1
2
CH106
1U_0402_6.3V6K~D
1
2
CH90
0.1U_0402_10V7K~D
1
2
LH100
4.7UH_LQM18FN4R7M00D_20%~D
1 2
CH30
15P_0402_50V8J~D
1
2
CH98
0.1U_0402_10V7K~D
1
2
CH108
1U_0402_6.3V6K~D
1
2
JP7 PAD-OPEN 43x39
@
12
CH24
15P_0402_50V8J~D
1
2
CH86
1U_0402_6.3V6K~D
@
1
2
CH101
1U_0402_6.3V6K~D
1
2
CH61
0.1U_0402_10V7K~D
1
2
CH91
0.1U_0402_10V7K~D
1
2
R54 0_0805_5%@
1 2
JP18
PAD-OPEN 43x39
@
12
CH103
1U_0402_6.3V6K~D
1
2
CH105
1U_0402_6.3V6K~D
1
2
RH202 0_0805_5%@
1 2
CH82
1U_0402_6.3V6K~D
1
2
CH110
1U_0402_6.3V6K~D
1
2
CH100
0.1U_0402_10V7K~D
1
2
CH84
0.1U_0402_10V7K~D
1
2
CH88
0.1U_0402_10V7K~D
1
2
JP17
PAD-OPEN 43x39
@
12
RH213 0_0805_5%@
1 2
CH79
0.1U_0402_10V7K~D
1
2
CH54
1U_0402_6.3V6K~D
1
2
R53 0_0805_5%@
1 2
CH73
0.1U_0402_10V7K~D
1
2
CH89
0.1U_0402_10V7K~D
1
2
CH107
1U_0402_6.3V6K~D
1
2
CH87
4.7U_0603_6.3V6K~D
1
2
CH85 0.1U_0402_10V7K~D
1 2
CH104
1U_0402_6.3V6K~D
1
2
CH81
10U_0805_10V6M~D
1
2
CH92
1U_0402_6.3V6K~D
1
2
LPT_PCH_M_EDS
ICC
Thermal
Fuse
SPI
CPU
RTC
Azalia
GPIO/LPC
USB
8 OF 11
REV = 5
U7H
LYNXPOINT_BGA695
@
VCCSUS3_3
R26
VCCSUS3_3
R28
VCCSUS3_3
U26
VSS
M24
VCCUSBPLL
U35
VCC3_3
L24
VCCIO
U30
VCCIO
V30 VCCIO
V28
VCCCLK
Y32
VCCCLK3_3
M29
VCCCLK3_3
L29
VCCCLK3_3
L26
VCCCLK3_3
M26
VCCCLK3_3
U32
VCCCLK3_3
V32
VCCCLK
AD34
VCCCLK
AA30
VCCCLK
AA32
VCCCLK
AD35
VCCCLK
AG30
VCCCLK
AG32
VCCCLK
AD36
VCCCLK
AE30
VCCCLK
AE32
VCCSUS3_3 R20
VCCSUS3_3 R22
VCCDSW3_3 A16
DCPSST AA14
VCC3_3 AE14
VCC3_3 AF12
VCC3_3 AG14
VCCIO U36
VCCSUSHDA A26
VCCSUS3_3 K8
VCCRTC A6
DCPRTC P14
DCPRTC P16
V_PROC_IO AJ12
V_PROC_IO AJ14
VCCSPI AD12
VCC P18
VCC P20
VCCASW L17
VCCASW R18
VCCVRM AW40
VCC3_3 AK30
VCC3_3 AK32
VCC
AP45
VCCVRM
AF34
DCPSUS2
Y35
VCCIO
Y30
VCCSUS3_3
R24
JP6
PAD-OPEN 43x39
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
23 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (8/8) VSS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
23 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (8/8) VSS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
23 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
PCH (8/8) VSS
LPT_PCH_M_EDS
REV = 5
10 OF 11
U7J
LYNXPOINT_BGA695
@
VSS
AV31
VSS
BB25
VSS
AV40
VSS
AV33
VSS
AV13 VSS
D42
VSS
AT36
VSS
AT26 VSS
AT20 VSS
AT17
VSS
AT29
VSS
AV24
VSS N12
VSS N39
VSS N35
VSS N6
VSS P24
VSS P22
VSS P30
VSS P28
VSS P26
VSS P32
VSS R12
VSS R2
VSS R16
VSS R14
VSS R38
VSS R34
VSS R44
VSS T43
VSS R8
VSS U16
VSS U10
VSS U28
VSS U34
VSS U38
VSS U6
VSS U42
VSS V14
VSS V16
VSS V26
VSS W44
VSS W2
VSS V43
VSS Y16
VSS Y14
VSS Y24
VSS Y34
VSS Y28
VSS Y40
VSS Y36
VSS Y8
VSS
AT38
VSS
F43
VSS
AT15 VSS
AT10 VSS
AK16 VSS
AR2 VSS
AP43
VSS
AP24
VSS
AN40 VSS
AN36
VSS
AM30 VSS
AM28
VSS M22
VSS M17
VSS L44
VSS L2
VSS K39
VSS
B15 VSS
B11 VSS
AY7 VSS
AY29 VSS
AY26 VSS
AY20 VSS
AY15 VSS
AY10
VSS
AW2 VSS
AV6
VSS
AP31
VSS
AP13 VSS
AN8
VSS
AM32
VSS
AM26 VSS
AM24 VSS
AM14 VSS
AL8 VSS
AL38 VSS
AL34
VSS
AN42
VSS
AM16
VSS
AV22
LPT_PCH_M_EDS
REV = 5
11 OF 11
U7K
LYNXPOINT_BGA695
@
VSS D4
VSS BC16
VSS G2
VSS G38
VSS G44
VSS G8
VSS H10
VSS H13
VSS
AB8
VSS BD31
VSS BD35
VSS BD39
VSS BD7
VSS AV7
VSS F20
VSS F33
VSS
AA16
VSS H36
VSS H26
VSS H17
VSS H22
VSS H24
VSS F29
VSS F15
VSS D25
VSS
AC2
VSS
AB38
VSS
AJ20 VSS
AJ18
VSS
AJ24 VSS
AJ22
VSS K33
VSS K29
VSS K20
VSS K15
VSS K10
VSS H7
VSS H40
VSS H31
VSS AT43
VSS AY36
VSS BD19
VSS BD15
VSS BD11
VSS BA40
VSS B7
VSS B39
VSS B35
VSS B31
VSS B27
VSS B23
VSS B19
VSS
AL2 VSS
AL12 VSS
AK45 VSS
AK43 VSS
AK24 VSS
AK14 VSS
AJ8 VSS
AJ6 VSS
AJ38 VSS
AJ34
VSS
AJ16
VSS
AG16 VSS
AF8 VSS
AF38 VSS
AE28 VSS
AE16 VSS
AD8
VSS
AD16 VSS
AD14 VSS
AC44
VSS
AB34 VSS
AB12 VSS
AA4 VSS
AA28 VSS
AA22 VSS
AA20
VSS
AG44 VSS
AG28 VSS
AG26 VSS
AG2
VSS
AD32 VSS
AD30 VSS
AD18
VSS
BB42 VSS
BC22
VSS BC28
VSS
AD6 VSS
AD40
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PT
PTPT
PT
PT
PT
ST
PEG_GTX_C_HRX_P[0..15]
PEG_GTX_C_HRX_N[0..15]
PEG_HTX_C_GRX_P[0..15]
PEG_GTX_HRX_N0
PEG_GTX_HRX_P12
PEG_GTX_C_HRX_P11
PEG_GTX_C_HRX_P6
PEG_GTX_C_HRX_N9
PEG_GTX_C_HRX_N5
PEG_GTX_C_HRX_P12
PEG_GTX_C_HRX_N6
PEG_GTX_C_HRX_P0
PEG_GTX_C_HRX_P14
PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_N11
PEG_GTX_C_HRX_P7
PEG_GTX_C_HRX_N1
PEG_GTX_C_HRX_N8
PEG_GTX_C_HRX_P9
PEG_GTX_C_HRX_N14
PEG_GTX_C_HRX_P15
PEG_GTX_C_HRX_N7
PEG_GTX_C_HRX_P10
PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_N15
PEG_GTX_C_HRX_P13
PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_N3
PEG_GTX_C_HRX_N13
PEG_GTX_C_HRX_P5
PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_P8
PEG_GTX_C_HRX_N4
PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_N10
PEG_GTX_C_HRX_N12
PEG_GTX_HRX_P1
PEG_GTX_HRX_N1
PEG_GTX_HRX_N4
PEG_HTX_C_GRX_N[0..15]
PEG_GTX_HRX_P2
PEG_GTX_HRX_N2
PEG_GTX_HRX_P3
PEG_GTX_HRX_N3
PEG_GTX_HRX_P4
PEG_GTX_HRX_P5
PEG_GTX_HRX_N5
PEG_GTX_HRX_P6
PEG_GTX_HRX_N6
PEG_GTX_HRX_P7
PEG_GTX_HRX_N7
PEG_GTX_HRX_P8
PEG_GTX_HRX_N8
PEG_GTX_HRX_P9
PEG_GTX_HRX_N9
PEG_GTX_HRX_P10
PEG_GTX_HRX_N10
PEG_GTX_HRX_P11
PEG_GTX_HRX_N11
PEG_GTX_HRX_N12
PEG_GTX_HRX_N13
PEG_GTX_HRX_N14
PEG_GTX_HRX_N15
PEG_GTX_HRX_P15
PEG_GTX_C_HRX_N0
PEG_GTX_HRX_P14
PEG_GTX_HRX_P13
PEG_GTX_HRX_P0
CLK_REQ#
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
XTALOUTBUFF
XTALSSIN
I2CA_SDA
I2CA_SCL
EC_SMB_CK2_PX
EC_SMB_DA2_PX
I2CB_SDA
I2CB_SCL
I2CC_SCL
I2CC_SDA
PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_N0
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_P4
PEG_HTX_C_GRX_N8
PEG_HTX_C_GRX_N5
PEG_HTX_C_GRX_P8
PEG_HTX_C_GRX_N6
PEG_HTX_C_GRX_P7
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N9
PEG_HTX_C_GRX_N7
PEG_HTX_C_GRX_P6
PEG_HTX_C_GRX_P5
PEG_HTX_C_GRX_N4
PEG_HTX_C_GRX_N3
PEG_HTX_C_GRX_N10
PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_N12
PEG_HTX_C_GRX_P15
PEG_HTX_C_GRX_N14
PEG_HTX_C_GRX_P14
PEG_HTX_C_GRX_N13
PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N11
PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_P13
PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_N15
PEG_GTX_HRX_N0
PEG_GTX_HRX_P0
PEG_GTX_HRX_N1
PEG_GTX_HRX_P3
PEG_GTX_HRX_P1
PEG_GTX_HRX_N3
PEG_GTX_HRX_P2
PEG_GTX_HRX_P4
PEG_GTX_HRX_P7
PEG_GTX_HRX_P5
PEG_GTX_HRX_P6
PEG_GTX_HRX_N5
PEG_GTX_HRX_N2
PEG_GTX_HRX_P11
PEG_GTX_HRX_N8
PEG_GTX_HRX_N11
PEG_GTX_HRX_N9
PEG_GTX_HRX_P9
PEG_GTX_HRX_P8
PEG_GTX_HRX_N7
PEG_GTX_HRX_N6
PEG_GTX_HRX_N4
PEG_GTX_HRX_N12
PEG_GTX_HRX_N10
PEG_GTX_HRX_P12
PEG_GTX_HRX_P13
PEG_GTX_HRX_P15
PEG_GTX_HRX_P14
PEG_GTX_HRX_P10
PEG_GTX_HRX_N14
PEG_GTX_HRX_N13
PEG_GTX_HRX_N15
FBVREF_ALTV
GPU_VID_0
THM_ALERT#
THM_OVERT#_R
GPU_HOT#_R
PEG_HTX_C_GRX_P12
PLTRST_VGA#
CLK_REQ#
FB_CLAMP_MON_R
GPU_GPIO13
+PLLVDD
GPU_GPIO2
GPU_GPIO3
GPU_GPIO4
GPU_GPIO7
CLK_27M_OUT
CLK_27M_IN
CLK_27M_OUT
FB_Clamp_REQ#_Q
CLK_27M_IN
GPU_HOT#_R
THM_OVERT#_R
FBVREF_ALTV
GPU_GPIO2
GPU_GPIO3
GPU_GPIO7
GPU_GPIO4
XTALSSIN
XTALOUTBUFF
FB_Clamp_REQ#_Q
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
+CLK_PLLVDD
I2CC_SCL
I2CC_SDA
CLK_REQ#
THM_ALERT#
FB_Clamp_REQ#_Q
GPU_HOT#_R
THM_OVERT#_R
EC_SMB_CK2_PX [25]
EC_SMB_DA2_PX [25]
PEG_HTX_C_GRX_P[0..15][7]
PEG_HTX_C_GRX_N[0..15][7]
PEG_GTX_C_HRX_P[0..15][7]
PEG_GTX_C_HRX_N[0..15][7]
CLK_PEG_VGA[17]
CLK_PEG_VGA#[17]
GPU_VID_0 [59]
FBVREF_ALTV [29,30,31,32]
PLTRST_VGA#[18]
PEG_A_CLKRQ#[17]
DGPU_PWR_EN[18,33,59]
GPU_PSI [59]
FB_CLAMP_MON [33]
FB_Clamp [28,33,38]
FB_Clamp_REQ# [38]
GPU_HOT# [38]
THM_OVERT# [38]
+3VS_DELAY
+3VS_DELAY
+3VS_DELAY
+1.05VSDGPU
+1.05VSDGPU
+3VS_DELAY
+3VS_DELAY
+3VS_DELAY
+3VS_DELAY
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
24 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
24 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
24 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
CV572
4.7U_0603_6.3V6K~D
1
2
CV560 0.22U_0402_16V7K~D
12
CV540 0.22U_0402_16V7K~D
12
CV552 0.22U_0402_16V7K~D
12
CV548 0.22U_0402_16V7K~D
12
CV543 0.22U_0402_16V7K~D
12
RV300 2.2K_0402_5%~D@1 2
CV773
0.1U_0402_10V7K~D
1
2
CV561 0.22U_0402_16V7K~D
12
CV545 0.22U_0402_16V7K~D
12
CV541 0.22U_0402_16V7K~D
12
RPH12
100K_0804_8P4R_5%
1 8
2 7
3 6
4 5
CV533 0.22U_0402_16V7K~D
12
RV290
2.49K_0402_1%~D
12
RV10 0_0402_5%~D@1 2
CV574
22U_0805_6.3V6M~D
1
2
CV569
0.1U_0402_10V7K~D
@
1
2
CV547 0.22U_0402_16V7K~D
12
CV535 0.22U_0402_16V7K~D
12
G
D
S
QV40
2N7002_SOT23-3
2
13
RV331 2.2K_0402_5%~D
1 2
LV14
BLM18PG300SN1D_2P
1 2
CV532 0.22U_0402_16V7K~D
12
RV319 2.2K_0402_5%~D
1 2
CV546 0.22U_0402_16V7K~D
12
RPH13
2.2K_8P4R_5%
@
1 8
2 7
3 6
4 5
CV570
0.1U_0402_10V7K~D
1
2
CV536 0.22U_0402_16V7K~D
12
CV565 0.22U_0402_16V7K~D
12
RPH32
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
CV571
0.1U_0402_10V7K~D
1
2
CV562 0.22U_0402_16V7K~D
12
RV479 10K_0402_5%~D@1 2
RV289
10K_0402_5%~D
1 2
CV542 0.22U_0402_16V7K~D
12
CV573
22U_0805_6.3V6M~D
1
2
CV559 0.22U_0402_16V7K~D
12
RPH33
100K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RV503 0_0402_5%@1 2
CV531 0.22U_0402_16V7K~D
12
RV505 0_0402_5%~D@1 2
CV576
10P_0402_25V8J
1
2
G
D
S
QV39
2N7002_SOT23-3
2
1 3
CV551 0.22U_0402_16V7K~D
12
CV567 0.22U_0402_16V7K~D
12
CV566 0.22U_0402_16V7K~D
12
CV550 0.22U_0402_16V7K~D
12
LV2
BLM18PG181SN1_0603~D
1 2
CV538 0.22U_0402_16V7K~D
12
YV1
27MHZ_12PF_X3G027000FC1H-H~D
IN
1
GND
2
OUT 3
GND 4
CV534 0.22U_0402_16V7K~D
12
CV568
0.1U_0402_10V7K~D
@
1
2
CV564 0.22U_0402_16V7K~D
12
CV537 0.22U_0402_16V7K~D
12
CV539 0.22U_0402_16V7K~D
12
QV42B
2N7002DW-7-F_SOT363-6
3
5
4
RPH15
2.2K_8P4R_5%
1 8
2 7
3 6
4 5
CV563 0.22U_0402_16V7K~D
12 RV299 2.2K_0402_5%~D@1 2
CV575
10P_0402_25V8J
1
2
RV286 200_0402_1%@1 2
CV558 0.22U_0402_16V7K~D
12
QV42A
2N7002DW-7-F_SOT363-6
61
2
CV557 0.22U_0402_16V7K~D
12
CV544 0.22U_0402_16V7K~D
12
PCI EXPRESS
CLK
Part 1 of 7
DACsI2C GPIO
UV1A
N14P-GT-A2@
PEX_RX0
AN12
PEX_RX0_N
AM12
PEX_RX1
AN14
PEX_RX1_N
AM14
PEX_RX2
AP14
PEX_RX2_N
AP15
PEX_RX3
AN15
PEX_RX3_N
AM15
PEX_RX4
AN17
PEX_RX4_N
AM17
PEX_RX5
AP17
PEX_RX5_N
AP18
PEX_RX6
AN18
PEX_RX6_N
AM18
PEX_RX7
AN20
PEX_RX7_N
AM20
PEX_RX8
AP20
PEX_RX8_N
AP21
PEX_RX9
AN21
PEX_RX9_N
AM21
PEX_RX10
AN23
PEX_RX10_N
AM23
PEX_RX11
AP23
PEX_RX11_N
AP24
PEX_RX12
AN24
PEX_RX12_N
AM24
PEX_RX13
AN26
PEX_RX13_N
AM26
PEX_RX14
AP26
PEX_RX14_N
AP27
PEX_RX15
AN27
PEX_RX15_N
AM27
PEX_TX0
AK14
PEX_TX0_N
AJ14
PEX_TX1
AH14
PEX_TX1_N
AG14
PEX_TX2
AK15
PEX_TX2_N
AJ15
PEX_TX3
AL16
PEX_TX3_N
AK16
PEX_TX4
AK17
PEX_TX4_N
AJ17
PEX_TX5
AH17
PEX_TX5_N
AG17
PEX_TX6
AK18
PEX_TX6_N
AJ18
PEX_TX7
AL19
PEX_TX7_N
AK19
PEX_TX8
AK20
PEX_TX8_N
AJ20
PEX_TX9
AH20
PEX_TX9_N
AG20
PEX_TX10
AK21
PEX_TX10_N
AJ21
PEX_TX11
AL22
PEX_TX11_N
AK22
PEX_TX12
AK23
PEX_TX12_N
AJ23
PEX_TX13
AH23
PEX_TX13_N
AG23
PEX_TX14
AK24
PEX_TX14_N
AJ24
PEX_TX15
AL25
PEX_TX15_N
AK25
PEX_REFCLK
AL13
PEX_REFCLK_N
AK13
PEX_RST_N
AJ12
XTAL_IN H3
XTAL_OUT H2
XTAL_OUTBUFF J4
XTAL_SSIN H1
GPIO0 P6
GPIO1 M3
GPIO2 L6
GPIO3 P5
GPIO4 P7
GPIO5 L7
GPIO6 M7
GPIO7 N8
GPIO8 M1
GPIO9 M2
GPIO10 L1
GPIO11 M5
GPIO12 N3
DACA_HSYNC AM9
DACA_VSYNC AN9
DACA_RED AK9
DACA_BLUE AL9
DACA_GREEN AL10
DACA_RSET AP8
DACA_VREF AP9
PEX_TSTCLK_OUT
AJ26
PEX_TSTCLK_OUT_N
AK26
I2CS_SDA T3
I2CA_SCL R4
I2CA_SDA R5
I2CB_SCL R7
I2CB_SDA R6
I2CC_SCL R2
I2CC_SDA R3
GPIO13 M4
GPIO14 N4
I2CS_SCL T4
GPIO15 P2
GPIO16 R8
GPIO17 M6
GPIO18 R1
GPIO19 P3
GPIO20 P4
GPIO21 P1
PEX_TERMP
AP29
PEX_CLKREQ_N
AK12
PLLVDD AD8
SP_PLLVDD AE8
VID_PLLVDD AD7
DACA_VDD AG10
PEX_WAKE_N AJ11
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Straps
N14x GPU don't support CEC.
Leave the CEC pin as NC
SPI ROM for N14E-GL ( 2M bit/256K byte )
ST
Change to PU35K in N15
for use ext ROM
Hynix “0”. ROM_SI=PD 5K ohm
Samsung”1”. ROM_SI=PD 10K ohm
QT
QT
STRAP0
STRAP1
STRAP2
ROM_SI_GPU
ROM_SO_GPU
ROM_SCLK_GPU
GPU_JTAG_TDI
GPU_JTAG_TDO
GPU_JTAG_TMS
GPU_JTAG_TRST#
GPU_JTAG_TCK
GPU_TESTMODE
STRAP4
STRAP3
MULTI_STRAP_REF0_GND
EC_SMB_DA2_PX
EC_SMB_CK2_PX
STRAP3
STRAP4
STRAP1
STRAP0
STRAP2
ROM_SCLK_GPU
ROM_SI_GPU
ROM_SO_GPU
ROM_CS_GPU ROM_CS_GPU_R
ROM_SI_GPU_RROM_SI_GPU
ROM_SCLK_GPU_RROM_SCLK_GPU
ROM_CS_GPU_R
ROM_SCLK_GPU_R
ROM_SI_GPU_R
ROM_SO_GPU
ROM_CS_GPU
EC_SMB_DA2_PX[24]
EC_SMB_CK2_PX[24]
GPU_VDD_SENSE [59]
GPU_VSS_SENSE [59]
PCH_SMLCLK [17,35,38,40]
PCH_SMLDATA [17,35,38,40]
+3VS_DELAY
+3VS_DELAY
+3VS_DELAY
+3VS_DELAY
+3VS_DELAY +3VS_DELAY
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
25 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
25 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
25 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
RV324
10K_0402_5%~D
12
RV303
4.99K_0402_1%~D
1 2
RV309
45.3K_0402_1%~D
1 2
RV314
24.9K_0402_1%~D
N14@
1 2
T174@
RV509 0_0402_5%~D@1 2
RV305
15K_0402_1%~D
N15@
1 2
RV306
30.1K_0402_1%~D
@
1 2
RV308
45.3K_0402_1%~D
1 2
RV304
34.8K_0402_1%~D
@
1 2
U23
W25X20AVSNIG_SO8
@
CS#
1
DO
2
WP#
3
GND
4
VCC 8
HOLD# 7
CLK 6
DIO 5
RV302
4.99K_0402_1%~D
@
1 2
T11@
RV314
34.8K_0402_1%~D
N15@
RV312
4.99K_0402_1%~D
VRAMH@
RV307
10K_0402_1%~D
@
1 2
QV21A
DMN66D0LDW-7_SOT363-6~D
61
2
RV301
10K_0402_1%~D
@
1 2
RV311
10K_0402_1%~D
@
1 2
RV323
10K_0402_5%~D
12
RV313
15K_0402_1%~D
N14@
1 2
Part 4 of 7
LVDS/TMDS
NC
GENERAL
SERIAL
TEST
UV1D
N14P-GT-A2@
IFPA_TXC_N
AN6 IFPA_TXC
AM6 NC_0 P8
NC_1 AC6
NC_2 AJ28
NC_3 AJ4
NC_4 AJ5
NC_5 AL11
NC_6 C15
NC_7 D19
NC_8 D20
NC_9 D23
NC_10 D26
NC_11 H31
NC_12 T8
IFPA_TXD0
AP3
IFPA_TXD0_N
AN3
IFPA_TXD1
AN5
IFPA_TXD1_N
AM5
IFPA_TXD2
AL6
IFPA_TXD2_N
AK6
IFPA_TXD3
AJ6
IFPA_TXD3_N
AH6
IFPB_TXC
AJ9
IFPB_TXC_N
AH9
IFPB_TXD4
AP6
IFPB_TXD4_N
AP5
IFPB_TXD5
AM7
IFPB_TXD5_N
AL7
IFPB_TXD6
AN8
IFPB_TXD6_N
AM8
IFPB_TXD7
AK8
IFPB_TXD7_N
AL8
IFPC_L0
AK1
IFPC_L0_N
AJ1
IFPC_L1
AJ3
IFPC_L1_N
AJ2
IFPC_L2
AH3
IFPC_L2_N
AH4
IFPC_L3
AG5
IFPC_L3_N
AG4
IFPD_L0
AM1
IFPD_L0_N
AM2
IFPD_L1
AM3
IFPD_L1_N
AM4
NC_13 V32
IFPD_L2_N
AL4
IFPD_L3_N
AK5
IFPD_L2
AL3
IFPD_L3
AK4
IFPE_L0
AD2
IFPE_L0_N
AD3
IFPE_L1
AD1
IFPE_L1_N
AC1
IFPE_L2
AC2
IFPE_L2_N
AC3
IFPE_L3
AC4
IFPE_L3_N
AC5
IFPF_L0
AE3
IFPF_L0_N
AE4
IFPF_L1
AF4
IFPF_L1_N
AF5
IFPF_L2
AD4
IFPF_L2_N
AD5
IFPF_L3
AG1
IFPF_L3_N
AF1
STRAP0 J2
STRAP1 J7
STRAP2 J6
CEC L3
THERMDP K3
THERMDN K4
ROM_CS_N H6
ROM_SI H5
ROM_SO H7
ROM_SCLK H4
IFPF_AUX_I2CZ_SCL
AF3
IFPF_AUX_I2CZ_SDA_N
AF2
IFPE_AUX_I2CY_SCL
AB3
IFPE_AUX_I2CY_SDA_N
AB4
IFPD_AUX_I2CX_SCL
AK3
IFPD_AUX_I2CX_SDA_N
AK2
IFPC_AUX_I2CW_SCL
AG3
IFPC_AUX_I2CW_SDA_N
AG2
VDD_SENSE L4
GND_SENSE L5
BUFRST_N L2
MULTI_STRAP_REF0_GND J1
TESTMODE AK11
JTAG_TCK AM10
JTAG_TDI AM11
JTAG_TDO AP12
JTAG_TMS AP11
JTAG_TRST_N AN11
STRAP3 J5
STRAP4 J3
RV507 0_0402_5%~D@1 2
CV3509
0.1U_0402_10V7K~D
@
1
2
QV21B
DMN66D0LDW-7_SOT363-6~D
3
5
4
RV316
10K_0402_1%~D
@
1 2
RV318
40.2K_0402_1%~D
12
RV326
2.2K_0402_5%~D
12
T13@
RV325
2.2K_0402_5%~D
12
RV508 0_0402_5%~D@1 2
RV310
4.99K_0402_1%~D
1 2
T12@
RV506
10K_0402_1%~D
@
12 RV312
10K_0402_1%~D
VRAMS@
1 2
RV315
4.99K_0402_1%~D
1 2
RV320
10K_0402_5%~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Close to Pinclose to the GPU
PLACE UNDER BGA PLACE NEAR GPU
Near GPUUnder GPU
0.21A
0.15A
PEX_IOVDD/Q 3.3A
PT
ST
+3.3V_RUN_VDD33
+3.3V_RUN_VDD33
+PEX_PLLVDD
+1.05VSDGPU
+1.05VSDGPU
+1.5VSDGPU
+1.5VSDGPU
+1.05VSDGPU
+3VS_DELAY
+1.5VSDGPU
+3VS_DELAY
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
26 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
26 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
26 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
RV329 60.4_0402_1%~D
1 2
CV616
4.7U_0603_6.3V6K~D
1
2
CV584
10U_0603_6.3V6M~D
@
1
2
CV600
22U_0805_6.3V6M~D
1
2
CV585
22U_0805_6.3V6M~D
1
2
CV605
4.7U_0603_6.3V6K~D
1
2
CV617
4.7U_0603_6.3V6K~D
1
2
CV593
0.1U_0402_25V6K~D
1
2
Part 5 of 7
POWER
UV1E
N14P-GT-A2@
PEX_IOVDDQ_0 AG13
PEX_IOVDDQ_1 AG15
PEX_IOVDDQ_2 AG16
PEX_IOVDDQ_3 AG18
PEX_IOVDDQ_4 AG25
PEX_IOVDDQ_5 AH15
PEX_IOVDDQ_6 AH18
PEX_IOVDDQ_7 AH26
PEX_IOVDDQ_8 AH27
PEX_IOVDDQ_9 AJ27
PEX_IOVDDQ_10 AK27
PEX_IOVDDQ_11 AL27
PEX_IOVDDQ_12 AM28
PEX_IOVDDQ_13 AN28
IFPA_IOVDD
AG8
IFPB_IOVDD
AG9
IFPC_IOVDD
AF6
IFPD_IOVDD
AG6
IFPE_IOVDD
AC7
IFPAB_PLLVDD
AH8
IFPC_PLLVDD
AF7
IFPEF_PLLVDD
AB8
IFPD_PLLVDD
AG7
FBVDDQ_0
AA27
FBVDDQ_1
AA30
FBVDDQ_2
AB27
FBVDDQ_3
AB33
FBVDDQ_4
AC27
FBVDDQ_5
AD27
FBVDDQ_7
AF27
FBVDDQ_8
AG27
FBVDDQ_9
B13
FBVDDQ_10
B16
FBVDDQ_11
B19
FBVDDQ_12
E13
FBVDDQ_13
E16
FBVDDQ_14
E19
FBVDDQ_15
H10
FBVDDQ_16
H11
FBVDDQ_17
H12
FBVDDQ_18
H13
FBVDDQ_19
H14
FBVDDQ_20
H15
FBVDDQ_21
H16
FBVDDQ_22
H18
FBVDDQ_23
H19
FBVDDQ_24
H20
FBVDDQ_25
H21
FBVDDQ_26
H22
FBVDDQ_27
H23
FBVDDQ_28
H24
PEX_IOVDD_0 AG19
PEX_IOVDD_1 AG21
PEX_IOVDD_2 AG22
PEX_IOVDD_3 AG24
PEX_IOVDD_4 AH21
FBVDDQ_29
H8
FBVDDQ_30
H9
FBVDDQ_31
L27
FBVDDQ_32
M27
FBVDDQ_33
N27
FBVDDQ_34
P27
FBVDDQ_35
R27
FBVDDQ_36
T27
FBVDDQ_37
T30
PEX_SVDD_3V3 AG12
VDD33_0 J8
VDD33_1 K8
VDD33_2 L8
VDD33_3 M8
PEX_PLLVDD AG26
IFPAB_RSET
AJ8
IFPC_RSET
AF8
IFPD_RSET
AN2
IFPEF_RSET
AD6
FBVDDQ_38
T33
FBVDDQ_39
V27
FBVDDQ_40
W27
FBVDDQ_41
W30
FBVDDQ_42
W33
FBVDDQ_43
Y27
FBVDDQ_6
AE27
IFPF_IOVDD
AC8
PEX_IOVDD_5 AH25
FB_CAL_PD_VDDQ J27
FB_CAL_PU_GND H27
FB_CAL_TERM_GND H25
FB_GND_SENSE F2
FB_VDDQ_SENSE F1
PEX_PLL_HVDD AH12
CV601
22U_0805_6.3V6M~D
1
2
CV599
10U_0603_6.3V6M~D
1
2
CV583
10U_0603_6.3V6M~D
@
1
2
CV607
1U_0402_6.3V6K~D
1
2
CV603
10U_0603_6.3V6M~D
1
2
CV597
4.7U_0603_6.3V6K~D
1
2
RV328 40.2_0402_1%~D
1 2
LV3
BLM18AG121SN1D_0603~D
12
CV596
1U_0402_6.3V6K~D
1
2
CV580
1U_0402_6.3V6K~D
1
2
CV602
22U_0805_6.3V6M~D
1
2
CV615
4.7U_0603_6.3V6K~D
@
1
2
RV337 0_0603_5%@1 2
CV614
0.1U_0402_10V7K~D
1
2
CV610
0.1U_0402_10V7K~D
1
2
CV606
1U_0402_6.3V6K~D
@
1
2
CV588
10U_0603_6.3V6M~D
1
2
CV594
0.1U_0402_25V6K~D
1
2
CV619
1U_0402_6.3V6K~D
1
2
CV611
1U_0402_6.3V6K~D
@
1
2
CV623
0.1U_0402_10V7K~D
1
2
CV591
1U_0402_6.3V6K~D
1
2
CV622
0.1U_0402_10V7K~D
1
2
CV581
1U_0402_6.3V6K~D
@
1
2
CV595
1U_0402_6.3V6K~D
1
2
CV604
4.7U_0603_6.3V6K~D
@
1
2
RV330 100_0402_1%~D
1 2
CV590
4.7U_0603_6.3V6K~D
1
2
RV327 40.2_0402_1%~D
1 2
CV582
4.7U_0603_6.3V6K~D
1
2
CV587
22U_0805_6.3V6M~D
1
2
CV592
1U_0402_6.3V6K~D
@
1
2
CV609
0.1U_0402_25V6K~D
1
2
CV608
0.1U_0402_25V6K~D
@
1
2
CV586
22U_0805_6.3V6M~D
1
2
CV621
0.1U_0402_10V7K~D
1
2
CV598
10U_0603_6.3V6M~D
1
2
RV332 100_0402_1%~D
1 2
CV613
1U_0402_6.3V6K~D
1
2
CV589
4.7U_0603_6.3V6K~D
1
2
CV612
4.7U_0603_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+GPU_CORE
+GPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
27 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
27 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
27 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
POWER
Part 7 of 7
UV1G
N14P-GT-A2@
VDD_0
AA12
VDD_1
AA14
VDD_2
AA16
VDD_3
AA19
VDD_4
AA21
VDD_5
AA23
VDD_6
AB13
VDD_7
AB15
VDD_8
AB17
VDD_9
AB18
VDD_10
AB20
VDD_11
AB22
VDD_12
AC12
VDD_13
AC14
VDD_14
AC16
VDD_15
AC19
VDD_16
AC21
VDD_17
AC23
VDD_18
M12
VDD_19
M14
VDD_20
M16
VDD_21
M19
VDD_22
M21
VDD_23
M23
VDD_24
N13
VDD_25
N15
VDD_26
N17
VDD_27
N18
VDD_28
N20
VDD_29
N22
VDD_30
P12
VDD_31
P14
VDD_32
P16
VDD_33
P19
VDD_34
P21
VDD_35
P23
VDD_36
R13
VDD_37
R15
VDD_38
R17
VDD_39
R18
VDD_40
R20
VDD_41
R22
VDD_42
T12
VDD_43
T14
VDD_44
T16
VDD_45
T19
VDD_46
T21
VDD_47
T23
VDD_48
U13
VDD_49
U15
VDD_50
U17
VDD_51
U18
VDD_52
U20
VDD_53
U22
VDD_54
V13
VDD_55
V15
XVDD_8 U8
XVDD_9 V1
XVDD_10 V2
XVDD_11 V3
XVDD_12 V4
XVDD_13 V5
XVDD_14 V6
XVDD_15 V7
XVDD_16 V8
XVDD_17 W2
XVDD_18 W3
XVDD_19 W4
XVDD_20 W5
XVDD_21 W7
XVDD_22 W8
XVDD_23 Y1
XVDD_24 Y2
XVDD_25 Y3
XVDD_26 Y4
XVDD_27 Y5
XVDD_28 Y6
XVDD_29 Y7
XVDD_30 Y8
XVDD_31 AA1
XVDD_32 AA2
XVDD_33 AA3
XVDD_34 AA4
XVDD_35 AA5
XVDD_36 AA6
XVDD_37 AA7
VDD_58 V20
VDD_59 V22
VDD_60 W12
VDD_61 W14
VDD_62 W16
VDD_63 W19
VDD_64 W21
VDD_65 W23
VDD_66 Y13
VDD_67 Y15
VDD_68 Y17
VDD_69 Y18
VDD_70 Y20
VDD_71 Y22
XVDD_1 U1
XVDD_2 U2
XVDD_3 U3
XVDD_4 U4
XVDD_5 U5
XVDD_6 U6
XVDD_7 U7
VDD_56 V17
VDD_57 V18
XVDD_38 AA8
GND
Part 6 of 7
UV1F
N14P-GT-A2@
GND_0
AG11
GND_1
A2
GND_2
A33
GND_3
AA13
GND_4
AA15
GND_5
AA17
GND_6
AA18
GND_7
AA20
GND_8
AA22
GND_9
AB12
GND_10
AB14
GND_11
AB16
GND_12
AB19
GND_13
AB2
GND_14
AB21
GND_15
AB23
GND_16
AB28
GND_17
AB30
GND_18
AB32
GND_19
AB5
GND_20
AB7
GND_21
AC13
GND_22
AC15
GND_23
AC17
GND_24
AC18
GND_25
AC20
GND_26
AC22
GND_27
AE2
GND_28
AE28
GND_29
AE30
GND_30
AE32
GND_31
AE33
GND_32
AE5
GND_33
AE7
GND_34
AH10
GND_35
AH13
GND_36
AH16
GND_37
AH19
GND_38
AH2
GND_39
AH22
GND_40
AH24
GND_41
AH28
GND_42
AH29
GND_43
AH30
GND_44
AH32
GND_45
AH33
GND_46
AH5
GND_47
AH7
GND_48
AJ7
GND_49
AK10
GND_50
AK7
GND_51
AL12
GND_52
AL14
GND_53
AL15
GND_54
AL17
GND_55
AL18
GND_56
AL2
GND_57
AL20
GND_58
AL21
GND_59
AL23
GND_60
AL24
GND_61
AL26
GND_62
AL28
GND_63
AL30
GND_64
AL32
GND_65
AL33
GND_66
AL5
GND_67
AM13
GND_68
AM16
GND_69
AM19
GND_70
AM22
GND_71
AM25
GND_72
AN1
GND_73
AN10
GND_74
AN13
GND_75
AN16
GND_76
AN19
GND_77
AN22
GND_78
AN25
GND_79
AN30
GND_80
AN34
GND_81
AN4
GND_82
AN7
GND_83
AP2
GND_84
AP33
GND_85
B1
GND_86
B10
GND_87
B22
GND_88
B25
GND_89
B28
GND_90
B31
GND_102 D31
GND_103 D33
GND_104 E10
GND_105 E22
GND_106 E25
GND_107 E5
GND_108 E7
GND_109 F28
GND_110 F7
GND_111 G10
GND_112 G13
GND_113 G16
GND_114 G19
GND_115 G2
GND_116 G22
GND_117 G25
GND_118 G28
GND_119 G3
GND_120 G30
GND_121 G32
GND_122 G33
GND_123 G5
GND_124 G7
GND_125 K2
GND_126 K28
GND_127 K30
GND_128 K32
GND_129 K33
GND_130 K5
GND_131 K7
GND_132 M13
GND_133 M15
GND_134 M17
GND_135 M18
GND_136 M20
GND_137 M22
GND_138 N12
GND_139 N14
GND_140 N16
GND_141 N19
GND_142 N2
GND_143 N21
GND_144 N23
GND_145 N28
GND_146 N30
GND_147 N32
GND_148 N33
GND_149 N5
GND_150 N7
GND_151 P13
GND_152 P15
GND_153 P17
GND_154 P18
GND_155 P20
GND_156 P22
GND_157 R12
GND_158 R14
GND_159 R16
GND_160 R19
GND_161 R21
GND_162 R23
GND_163 T13
GND_164 T15
GND_165 T17
GND_166 T18
GND_167 T2
GND_168 T20
GND_169 T22
GND_170 T28
GND_171 T32
GND_172 T5
GND_173 T7
GND_174 U12
GND_175 U14
GND_176 U16
GND_177 U19
GND_178 U21
GND_179 U23
GND_180 V12
GND_91
B34
GND_92
B4
GND_93
B7
GND_94
C10
GND_95
C13
GND_96
C19
GND_101 D2
GND_181 V14
GND_182 V16
GND_183 V19
GND_184 V21
GND_185 V23
GND_186 W13
GND_187 W15
GND_188 W17
GND_189 W18
GND_190 W20
GND_191 W22
GND_192 W28
GND_97
C22
GND_98
C25
GND_99
C28
GND_100
C7
GND_193 Y12
GND_194 Y14
GND_195 Y16
GND_196 Y19
GND_197 Y21
GND_198 Y23
GND_199 AH11
GND_OPT C16
GND_OPT W32
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
16mil
for Test/Debug for Test/Debug
CKE_H
RST_H*
CKE_L
RST_L*
CKE_H
RST_H*
CKE_L
RST_L*
NEED FIND 30R BEAD
PT
PT
ST
+FBA_PLL_AVDD
FBA_CMD21
FBA_CMD30
FBA_CMD[0..31]
FBA_EDC[4..7]
FBA_DBI[4..7]
FBA_D[0..31]
FBA_DBI4
+FB_VREF
FBA_DBI7
FBA_EDC5
FBA_EDC1
FBA_EDC2
FBA_D22
FBA_D21
FBA_D20
FBA_D6
FBA_D7
FBA_D9
FBA_D8
FBA_D12
FBA_D4
FBA_D14
FBA_D13
FBA_D15
FBA_D11
FBA_D10
FBA_D5
FBA_D29
FBA_D28
FBA_D17
FBA_D25
FBA_D16
FBA_D36
FBA_D24
FBA_D27
FBA_D31
FBA_D23
FBA_D19
FBA_D30
FBA_D18
FBA_D26
FBA_D52
FBA_D38
FBA_D39
FBA_D43
FBA_D35
FBA_D46
FBA_D37
FBA_D42
FBA_D34
FBA_D45
FBA_D41
FBA_D33
FBA_D40
FBA_D44
FBA_D32
FBA_D53
FBA_D59
FBA_D58
FBA_D49
FBA_D57
FBA_D63
FBA_D62
FBA_D61
FBA_D51
FBA_D56
FBA_D54
FBA_D50
FBA_D48
FBA_D55
FBA_D0
FBA_D60
FBA_D2
FBA_D1
FBA_D3
FBA_D47
FBA_CMD18
FBA_EDC4
FBA_DBI6
FBA_CMD10
FBA_CMD8
FBA_CMD14
FBA_CMD26
FBA_CMD24
FBA_CMD0
FBA_EDC0
FBA_CMD5
FBA_CMD17
FBA_EDC3
FBA_DBI5
FBA_DBI3
FBA_CMD20
FBA_CMD13
FBA_CMD23
FBA_CMD29
FBA_CMD4
FBA_CMD16
FBA_DBI2
FBA_CMD12
FBA_CMD22
FBA_CMD28
FBA_CMD3
FBA_EDC7
FBA_DBI1
FBA_CMD19
FBA_EDC6
FBA_CMD11
FBA_CMD9
FBA_CMD15
FBA_CMD27
FBA_CMD25
FBA_CMD7
FBA_CMD2
+FB_VREF
FBA_CMD1
FBA_DBI0
FBA_CMD6
FBA_CMD31
+FBA_PLL_AVDD
+FBA_DLL_AVDD
FBA_WCK67#
FBA_WCK67
FBA_WCK45#
FBA_WCK01#
FBA_WCK23
FBA_WCK45
FBA_WCK01
FBA_WCK23#
FBA_D[32..63]
FBA_DBI[0..3]
FBA_EDC[0..3]
FBB_D22
FBB_D21
FBB_D20
FBB_D6
FBB_D7
FBB_D9
FBB_D8
FBB_D12
FBB_D4
FBB_D14
FBB_D13
FBB_D15
FBB_D11
FBB_D10
FBB_D5
FBB_D29
FBB_D28
FBB_D17
FBB_D25
FBB_D16
FBB_D36
FBB_D24
FBB_D27
FBB_D31
FBB_D23
FBB_D19
FBB_D30
FBB_D18
FBB_D26
FBB_D52
FBB_D38
FBB_D39
FBB_D43
FBB_D35
FBB_D46
FBB_D37
FBB_D42
FBB_D34
FBB_D45
FBB_D41
FBB_D33
FBB_D40
FBB_D44
FBB_D32
FBB_D53
FBB_D59
FBB_D58
FBB_D49
FBB_D57
FBB_D63
FBB_D62
FBB_D61
FBB_D51
FBB_D56
FBB_D54
FBB_D50
FBB_D48
FBB_D55
FBB_D0
FBB_D60
FBB_D2
FBB_D1
FBB_D3
FBB_D47
FBB_CMD21
FBB_CMD30
FBB_DBI4
FBB_DBI7
FBB_EDC5
FBB_EDC1
FBB_EDC2
FBB_CMD18
FBB_EDC4
FBB_DBI6
FBB_CMD10
FBB_CMD8
FBB_CMD14
FBB_CMD26
FBB_CMD24
FBB_CMD0
FBB_EDC0
FBB_CMD5
FBB_CMD17
FBB_EDC3
FBB_DBI5
FBB_DBI3
FBB_CMD20
FBB_CMD13
FBB_CMD23
FBB_CMD29
FBB_CMD4
FBB_CMD16
FBB_DBI2
FBB_CMD12
FBB_CMD22
FBB_CMD28
FBB_CMD3
FBB_EDC7
FBB_DBI1
FBB_CMD19
FBB_EDC6
FBB_CMD11
FBB_CMD9
FBB_CMD15
FBB_CMD27
FBB_CMD25
FBB_CMD7
FBB_CMD2
FBB_CMD1
FBB_DBI0
FBB_CMD6
FBB_CMD31
FBB_WCK67#
FBB_WCK67
FBB_WCK45#
FBB_WCK01#
FBB_WCK23
FBB_WCK45
FBB_WCK01
FBB_WCK23#
FBB_CMD[0..31]
FBB_EDC[4..7]
FBB_DBI[4..7]
FBB_D[0..31]
FBB_D[32..63]
FBB_DBI[0..3]
FBB_EDC[0..3]
FBA_CMD30
FBA_CMD14
FBA_CMD29
FBA_CMD13
FBB_CMD30
FBB_CMD14
FBB_CMD29
FBB_CMD13
+FBA_DLL_AVDD
+FBA_PLL_AVDD +FBA_DLL_AVDD
FBA_EDC[4..7][30]
FBA_EDC[0..3][29]
FBA_DBI[0..3][29]
FBA_DBI[4..7][30]
FBA_CMD[0..31][29,30]
FBA_D[0..31][29]
FBA_D[32..63][30]
CLKB0 [31]
CLKB0# [31]
CLKB1 [32]
CLKB1# [32]
FBB_WCK01 [31]
FBB_WCK01# [31]
FBB_WCK23 [31]
FBB_WCK23# [31]
FBB_WCK45 [32]
FBB_WCK67# [32]
FBB_WCK67 [32]
FBB_WCK45# [32]
CLKA0 [29]
CLKA0# [29]
CLKA1 [30]
CLKA1# [30]
FBA_WCK01 [29]
FBA_WCK01# [29]
FBA_WCK23 [29]
FBA_WCK23# [29]
FBA_WCK45 [30]
FBA_WCK67# [30]
FBA_WCK67 [30]
FBA_WCK45# [30]
FB_Clamp
[24,33,38]
FBB_EDC[4..7][32]
FBB_EDC[0..3][31]
FBB_DBI[0..3][31]
FBB_DBI[4..7][32]
FBB_CMD[0..31][31,32]
FBB_D[0..31][31]
FBB_D[32..63][32]
+1.5VSDGPU
+FBA_PLL_AVDD
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU +1.5VSDGPU
+FBA_DLL_AVDD+1.05VSDGPU
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
28 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
28 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
28 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
RV410
10K_0402_5%~D
1 2
RV342
1.1K_0402_1%~D
@
12
RV510 0_0402_5%@1 2
RV341
10K_0402_5%~D
1 2
RV338
10K_0402_5%~D
1 2
RV344
60.4_0402_1%~D
@
1 2
CV639 0.1U_0402_10V7K~D
1 2
RV501 10K_0402_5%~D
1 2
RV346
60.4_0402_1%~D
@
1 2
RV339
10K_0402_5%~D
1 2
CV637
0.1U_0402_10V7K~D
1
2
RV343
1.1K_0402_1%~D
@
12
RV340
10K_0402_5%~D
1 2
RV418
10K_0402_5%~D
1 2
RV8 0_0402_5%@1 2
RV414
10K_0402_5%~D
1 2
LV21
BLM18PG300SN1D_2P~D
1 2
RV409
10K_0402_5%~D
1 2
RV347
60.4_0402_1%~D
@
1 2
CV3513
22U_0805_6.3V6M~D
1
2
CV3512
1U_0402_6.3V6K~D
1
2
RV345
60.4_0402_1%~D
@
1 2
CV636
0.1U_0402_10V7K~D
1
2
MEMORY INTERFACE
B
Part 3 of 7
THE FBA_ECKBxx ARE
USED ON GK107.
NC ON GF108 AND
GF117
UV1C
N14P-GT-A2@
FBB_D00
G9
FBB_D01
E9
FBB_D02
G8
FBB_D03
F9
FBB_D04
F11
FBB_D05
G11
FBB_D06
F12
FBB_D07
G12
FBB_D08
G6
FBB_D09
F5
FBB_D10
E6
FBB_D11
F6
FBB_D12
F4
FBB_D13
G4
FBB_D14
E2
FBB_D15
F3
FBB_D16
C2
FBB_D17
D4
FBB_D18
D3
FBB_D19
C1
FBB_D20
B3
FBB_D21
C4
FBB_D22
B5
FBB_D23
C5
FBB_D24
A11
FBB_D25
C11
FBB_D26
D11
FBB_D27
B11
FBB_D28
D8
FBB_D29
A8
FBB_D30
C8
FBB_D31
B8
FBB_D32
F24
FBB_D33
G23
FBB_D34
E24
FBB_D35
G24
FBB_D36
D21
FBB_D37
E21
FBB_D38
G21
FBB_D39
F21
FBB_D40
G27
FBB_D41
D27
FBB_D42
G26
FBB_D43
E27
FBB_D44
E29
FBB_D45
F29
FBB_D46
E30
FBB_D47
D30
FBB_D48
A32
FBB_D49
C31
FBB_D50
C32
FBB_D51
B32
FBB_D52
D29
FBB_D53
A29
FBB_D54
C29
FBB_D55
B29
FBB_D56
B21
FBB_D57
C23
FBB_D58
A21
FBB_D59
C21
FBB_D60
B24
FBB_D61
C24
FBB_D62
B26
FBB_D63
C26
FBB_CMD0 D13
FBB_CMD1 E14
FBB_CMD2 F14
FBB_CMD3 A12
FBB_CMD4 B12
FBB_CMD5 C14
FBB_CMD6 B14
FBB_CMD7 G15
FBB_CMD8 F15
FBB_CMD9 E15
FBB_CMD10 D15
FBB_CMD11 A14
FBB_CMD12 D14
FBB_CMD13 A15
FBB_CMD14 B15
FBB_CMD15 C17
FBB_CMD16 D18
FBB_CMD17 E18
FBB_CMD18 F18
FBB_CMD19 A20
FBB_CMD20 B20
FBB_CMD21 C18
FBB_CMD22 B18
FBB_CMD23 G18
FBB_CMD24 G17
FBB_CMD25 F17
FBB_CMD26 D16
FBB_DQM0 E11
FBB_DQM1 E3
FBB_DQM2 A3
FBB_DQM3 C9
FBB_DQM4 F23
FBB_DQM5 F27
FBB_DQM6 C30
FBB_DQM7 A24
FBB_DQS_RN0 D9
FBB_DQS_RN1 E4
FBB_DQS_RN2 B2
FBB_DQS_RN3 A9
FBB_DQS_RN4 D22
FBB_DQS_RN5 D28
FBB_DQS_RN6 A30
FBB_DQS_RN7 B23
FBB_DQS_WP0 D10
FBB_DQS_WP1 D5
FBB_DQS_WP2 C3
FBB_DQS_WP3 B9
FBB_DQS_WP4 E23
FBB_DQS_WP5 E28
FBB_DQS_WP6 B30
FBB_DQS_WP7 A23
FBB_CLK0 D12
FBB_CLK0_N E12
FBB_CLK1 E20
FBB_CLK1_N F20
FBB_CMD27 A18
FBB_CMD28 D17
FBB_CMD29 A17
FBB_CMD30 B17
FBB_DEBUG0
G14
FBB_CMD31 E17
FBB_DEBUG1
G20
FBB_WCK01 F8
FBB_WCK01_N E8
FBB_WCK23 A5
FBB_WCK23_N A6
FBB_WCK45 D24
FBB_WCK45_N D25
FBB_WCK67 B27
FBB_WCK67_N C27
FBB_CMD_RFU0 C12
FBB_CMD_RFU1 C20
FBB_WCKB01 D6
FBB_WCKB01_N D7
FBB_WCKB23 C6
FBB_WCKB23_N B6
FBB_WCKB45 F26
FBB_WCKB45_N E26
FBB_WCKB67 A26
FBB_WCKB67_N A27
FBB_PLL_AVDD
H17
MEMORY INTERFACE
A
Part 2 of 7
THE FBA_ECKBxx ARE
USED ON GK107. NC
ON GF108 AND GF117
UV1B
N14P-GT-A2@
FBA_D00
L28
FBA_D01
M29
FBA_D02
L29
FBA_D03
M28
FBA_D04
N31
FBA_D05
P29
FBA_D06
R29
FBA_D07
P28
FBA_D08
J28
FBA_D09
H29
FBA_D10
J29
FBA_D11
H28
FBA_D12
G29
FBA_D13
E31
FBA_D14
E32
FBA_D15
F30
FBA_D16
C34
FBA_D17
D32
FBA_D18
B33
FBA_D19
C33
FBA_D20
F33
FBA_D21
F32
FBA_D22
H33
FBA_D23
H32
FBA_D24
P34
FBA_D25
P32
FBA_D26
P31
FBA_D27
P33
FBA_D28
L31
FBA_D29
L34
FBA_D30
L32
FBA_D31
L33
FBA_D32
AG28
FBA_D33
AF29
FBA_D34
AG29
FBA_D35
AF28
FBA_D36
AD30
FBA_D37
AD29
FBA_D38
AC29
FBA_D39
AD28
FBA_D40
AJ29
FBA_D41
AK29
FBA_D42
AJ30
FBA_D43
AK28
FBA_D44
AM29
FBA_D45
AM31
FBA_D46
AN29
FBA_D47
AM30
FBA_D48
AN31
FBA_D49
AN32
FBA_D50
AP30
FBA_D51
AP32
FBA_D52
AM33
FBA_D53
AL31
FBA_D54
AK33
FBA_D55
AK32
FBA_D56
AD34
FBA_D57
AD32
FBA_D58
AC30
FBA_D59
AD33
FBA_D60
AF31
FBA_D61
AG34
FBA_D62
AG32
FBA_D63
AG33
FBA_CMD0 U30
FBA_CMD1 T31
FBA_CMD2 U29
FBA_CMD3 R34
FBA_CMD4 R33
FBA_CMD5 U32
FBA_CMD6 U33
FBA_CMD7 U28
FBA_CMD8 V28
FBA_CMD9 V29
FBA_CMD10 V30
FBA_CMD11 U34
FBA_CMD12 U31
FBA_CMD13 V34
FBA_CMD14 V33
FBA_CMD15 Y32
FBA_CMD16 AA31
FBA_CMD17 AA29
FBA_CMD18 AA28
FBA_CMD19 AC34
FBA_CMD20 AC33
FBA_CMD21 AA32
FBA_CMD22 AA33
FBA_CMD23 Y28
FBA_CMD24 Y29
FBA_CMD25 W31
FBA_CMD26 Y30
FBA_DQM0 P30
FBA_DQM1 F31
FBA_DQM2 F34
FBA_DQM3 M32
FBA_DQM4 AD31
FBA_DQM5 AL29
FBA_DQM6 AM32
FBA_DQM7 AF34
FBA_DQS_RN0 M30
FBA_DQS_RN1 H30
FBA_DQS_RN2 E34
FBA_DQS_RN3 M34
FBA_DQS_RN4 AF30
FBA_DQS_RN5 AK31
FBA_DQS_RN6 AM34
FBA_DQS_RN7 AF32
FBA_DQS_WP0 M31
FBA_DQS_WP1 G31
FBA_DQS_WP2 E33
FBA_DQS_WP3 M33
FBA_DQS_WP4 AE31
FBA_DQS_WP5 AK30
FBA_DQS_WP6 AN33
FBA_DQS_WP7 AF33
FBA_CLK0 R30
FBA_CLK0_N R31
FBA_CLK1 AB31
FBA_CLK1_N AC31
FBA_CMD27 AA34
FBA_CMD28 Y31
FBA_CMD29 Y34
FBA_CMD30 Y33
FBA_PLL_AVDD
U27
FB_VREF
H26
FBA_DEBUG0
R28
FBA_CMD31 V31
FBA_DEBUG1
AC28
FBA_WCK01 K31
FBA_WCK01_N L30
FBA_WCK23 H34
FBA_WCK23_N J34
FBA_WCK45 AG30
FBA_WCK45_N AG31
FBA_WCK67 AJ34
FBA_WCK67_N AK34
FBA_CMD_RFU0 R32
FBA_CMD_RFU1 AC32
FBA_WCKB01 J30
FBA_WCKB01_N J31
FBA_WCKB23 J32
FBA_WCKB23_N J33
FBA_WCKB45 AH31
FBA_WCKB45_N AJ31
FBA_WCKB67 AJ32
FBA_WCKB67_N AJ33
FB_CLAMP
E1
FB_DLL_AVDD
K27
CV638
0.01U_0402_16V7K~D
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Memory Partition A - Lower 32
bits 64X32 GDDR5
NORMAL
CLKA0#
CLKA0
FBA_CMD14
FBA_EDC0
FBA_EDC2
FBA_DBI0
FBA_DBI2
CLKA0#
CLKA0
FBA_CMD9
FBA_CMD6
FBA_CMD7
FBA_CMD4
FBA_CMD3
FBA_CMD1
FBA_CMD2
FBA_CMD11
FBA_CMD10
FBA_SEN0
FBA_CMD8
FBA_CMD12
FBA_CMD0
FBA_CMD15
FBA_CMD5
FBA_WCK01#
FBA_WCK01
FBA_WCK23#
FBA_WCK23
+FBA_VREFC_L
FBA_CMD13
+FBA_VREFC_L
+FBA_VREFD_L
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
+FBA_VREFD_L
FBA_EDC1
FBA_EDC3
FBA_DBI1
FBA_DBI3
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_EDC[0..3]
FBA_DBI[0..3]
FBA_CMD[0..31]
FBA_D[0..31]
CLKA0[28]
CLKA0#[28]
FBA_WCK01#[28]
FBA_WCK01[28]
FBA_WCK23#[28]
FBA_WCK23[28]
FBVREF_ALTV[24,30,31,32]
FBA_CMD[0..31] [28,30]
FBA_D[0..31] [28]
FBA_EDC[0..3] [28]
FBA_DBI[0..3] [28]
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
29 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
29 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
29 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
CV651
820P_0402_50V7K~D
1
2
CV654
1U_0402_6.3V6K~D
1
2
RV353 1K_0402_1%~D
1 2
RV355
1.33K_0402_1%~D
12
RV352 1K_0402_1%~D
1 2
CV663
0.1U_0402_10V7K~D
1
2
G
D
S
QV22
L2N7002WT1G
2
13
RV349
40.2_0402_1%~D
1 2
CV657
0.1U_0402_10V7K~D
1
2
CV656
0.1U_0402_10V7K~D
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV5
K4G41325FC-HC04_FBGA170~D
@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/A13
J5
RV354 121_0402_1%~D
1 2
CV776
820P_0402_50V7K~D
1
2
RV358
549_0402_1%~D
12
CV659
10U_0603_6.3V6M~D
1
2
CV653
1U_0402_6.3V6K~D
1
2
RV359
931_0402_1%
12
CV658
0.1U_0402_10V7K~D
@
1
2
CV652
10U_0603_6.3V6M~D
1
2
RV357
931_0402_1%
12
CV655
0.1U_0402_10V7K~D
1
2
RV360
549_0402_1%~D
12
RV356
1.33K_0402_1%~D
12
CV662
0.1U_0402_10V7K~D
@
1
2
CV660
1U_0402_6.3V6K~D
1
2
RV348
40.2_0402_1%~D
1 2
CV643
0.01U_0402_16V7K~D
1
2
CV650
820P_0402_50V7K~D
1
2
CV661
1U_0402_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Memory Partition A - Upper 32 bits NORMAL
ST
CLKA1#
CLKA1
FBA_D32
FBA_D33FBA_EDC4
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_CMD28
FBA_WCK67#
FBA_WCK67
FBA_CMD25
FBA_CMD20
FBA_CMD17
FBA_CMD26
FBA_CMD18
FBA_CMD27
FBA_CMD30
FBA_WCK45#
FBA_WCK45
FBA_EDC6
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_SEN2
FBA_EDC[4..7]
FBA_DBI[4..7]
FBA_CMD29
FBA_CMD19
FBA_CMD16
FBA_CMD24
FBA_DBI6
FBA_DBI4
FBA_CMD31
CLKA1#
CLKA1
FBA_CMD23
FBA_CMD21
FBA_D[32..63]
FBA_CMD22
FBA_CMD[0..31]
FBA_EDC5
FBA_EDC7
FBA_DBI5
FBA_DBI7
+FBA_VREFD_H
+FBA_VREFC_H
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D40
FBA_D41
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
+FBA_VREFC_H
+FBA_VREFD_H
FBA_EDC[4..7] [28]
FBA_D[32..63] [28]
FBA_CMD[0..31] [28,29]
FBA_DBI[4..7] [28]
CLKA1[28]
CLKA1#[28]
FBA_WCK67#[28]
FBA_WCK67[28]
FBA_WCK45#[28]
FBA_WCK45[28]
FBVREF_ALTV[24,29,31,32]
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
30 62Tuesday, September 17, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
30 62Tuesday, September 17, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
30 62Tuesday, September 17, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
CV686
1U_0402_6.3V6K~D
1
2
RV372
931_0402_1%
12
CV688
0.1U_0402_10V7K~D
@
1
2
RV368
1.33K_0402_1%~D
12
CV682
0.1U_0402_10V7K~D
@
1
2
G
D
S
QV23
L2N7002WT1G
2
13
CV684
10U_0603_6.3V6M~D
1
2
RV361
40.2_0402_1%~D
1 2
CV668
0.01U_0402_16V7K~D
1
2
RV363 1K_0402_1%~D
1 2
CV677
10U_0603_4V6M~D
1
2
RV371
549_0402_1%~D
12
RV366 1K_0402_1%~D
1 2
CV676
820P_0402_50V7K~D
1
2
RV362
40.2_0402_1%~D
1 2
CV687
0.1U_0402_10V7K~D
1
2
RV370
931_0402_1%
12
CV777
820P_0402_50V7K~D
1
2
CV680
0.1U_0402_10V7K~D
1
2
RV365 121_0402_1%~D
1 2
CV675
820P_0402_50V7K~D
1
2
CV679
1U_0402_6.3V6K~D
1
2
CV678
1U_0402_6.3V6K~D
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV6
K4G41325FC-HC04_FBGA170~D
@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/A13
J5
CV683
0.1U_0402_10V7K~D
1
2
RV373
549_0402_1%~D
12
CV681
0.1U_0402_10V7K~D
1
2
RV369
1.33K_0402_1%~D
12
CV685
1U_0402_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NORMAL
Memory Partition B - Lower 32
bits 64X32 GDDR5
FBB_D18
FBB_CMD9
FBB_D19
FBB_D0
FBB_CMD5
FBB_CMD4
FBB_EDC2
FBB_D20
FBB_D1
CLKB0#
CLKB0
FBB_D21
FBB_D2
FBB_EDC0
FBB_D22
FBB_D3
FBB_DBI0
FBB_CMD2
+FBB_VREFC_L
FBB_D4
FBB_D23
FBB_CMD8
FBB_CMD14
FBB_D5
FBB_DBI2
FBB_CMD12
FBB_CMD11
FBB_D6
FBB_CMD6
FBB_SEN0
FBB_WCK01#
FBB_CMD3
CLKB0#
CLKB0
FBB_D7
FBB_WCK23#
FBB_WCK23
FBB_CMD0
FBB_WCK01
FBB_D16
FBB_CMD15
FBB_CMD10
FBB_CMD7
FBB_CMD13
FBB_D17
FBB_CMD1
FBB_EDC[0..3]
FBB_CMD[0..31]
FBB_D[0..31]
FBB_DBI[0..3]
+FBB_VREFD_L
FBB_EDC1
FBB_EDC3
FBB_DBI1
FBB_DBI3
FBB_D12
FBB_D11
FBB_D10
FBB_D8
FBB_D9
FBB_D14
FBB_D13
FBB_D15
FBB_D27
FBB_D25
FBB_D26
FBB_D24
FBB_D28
FBB_D31
FBB_D30
FBB_D29
+FBB_VREFC_L
+FBB_VREFD_L
CLKB0[28]
CLKB0#[28]
FBB_WCK01#[28]
FBB_WCK01[28]
FBB_WCK23#[28]
FBB_WCK23[28]
FBB_CMD[0..31] [28,32]
FBB_D[0..31] [28]
FBB_EDC[0..3] [28]
FBB_DBI[0..3] [28]
FBVREF_ALTV[24,29,30,32] +1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
31 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
31 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
31 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
RV379 1K_0402_1%~D
1 2
CV710
1U_0402_6.3V6K~D
1
2
CV778
820P_0402_50V7K~D
1
2
CV707
0.1U_0402_10V7K~D
@
1
2
CV693
0.01U_0402_16V7K~D
1
2
CV708
0.1U_0402_10V7K~D
1
2
CV712
0.1U_0402_10V7K~D
1
2
CV700
820P_0402_50V7K~D
1
2
RV381
1.33K_0402_1%~D
12
RV384
549_0402_1%~D
12
CV705
0.1U_0402_10V7K~D
1
2
CV706
0.1U_0402_10V7K~D
1
2
CV704
1U_0402_6.3V6K~D
1
2
RV383
931_0402_1%
12
RV375
40.2_0402_1%~D
1 2
RV374
40.2_0402_1%~D
1 2
RV386
549_0402_1%~D
12
RV378 1K_0402_1%~D
1 2
CV701
820P_0402_50V7K~D
1
2
RV380 121_0402_1%~D
1 2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV9
K4G41325FC-HC04_FBGA170~D
@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/A13
J5
CV711
1U_0402_6.3V6K~D
1
2
RV382
1.33K_0402_1%~D
12
G
D
S
QV24
L2N7002WT1G
2
13
CV702
10U_0603_6.3V6M~D
1
2
CV709
10U_0603_6.3V6M~D
1
2
CV713
0.1U_0402_10V7K~D
@
1
2
CV703
1U_0402_6.3V6K~D
1
2
RV385
931_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NORMAL
Memory Partition B - Upper 32 bits
FBB_D32
FBB_D33FBB_EDC4
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_CMD28
FBB_WCK67#
FBB_WCK67
FBB_CMD25
FBB_CMD20
FBB_CMD17
FBB_CMD26
FBB_CMD18
FBB_CMD27
FBB_CMD30
FBB_WCK45#
FBB_WCK45
FBB_EDC6
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_SEN2
FBB_EDC[4..7]
FBB_DBI[4..7]
FBB_CMD29
FBB_CMD19
FBB_CMD16
FBB_CMD24
FBB_DBI6
FBB_DBI4
FBB_CMD31
CLKB1#
CLKB1
FBB_CMD23
FBB_CMD21
FBB_D[32..63]
FBB_CMD22
FBB_CMD[0..31]
CLKB1#
CLKB1
FBB_EDC5
FBB_EDC7
FBB_DBI5
FBB_DBI7 FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D40
FBB_D41
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63
+FBB_VREFD_H
+FBB_VREFC_H
+FBB_VREFC_H
+FBB_VREFD_H
FBB_CMD[0..31] [28,31]
FBB_D[32..63] [28]
FBB_EDC[4..7] [28]
FBB_DBI[4..7] [28]
CLKB1[28]
CLKB1#[28]
FBB_WCK67#[28]
FBB_WCK67[28]
FBB_WCK45#[28]
FBB_WCK45[28]
FBVREF_ALTV[24,29,30,31]
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
32 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
32 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
32 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
RV395
1.33K_0402_1%~D
12
CV736
1U_0402_6.3V6K~D
1
2
CV738
0.1U_0402_10V7K~D
@
1
2
RV387
40.2_0402_1%~D
1 2
CV734
10U_0603_6.3V6M~D
1
2
CV789
820P_0402_50V7K~D
1
2
CV727
10U_0603_6.3V6M~D
1
2
CV731
0.1U_0402_10V7K~D
1
2
RV398
931_0402_1%
12
CV718
0.01U_0402_16V7K~D
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV10
K4G41325FC-HC04_FBGA170~D
@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/A13
J5
CV725
820P_0402_50V7K~D
1
2
CV735
1U_0402_6.3V6K~D
1
2
RV388
40.2_0402_1%~D
1 2
RV394
1.33K_0402_1%~D
12
CV730
0.1U_0402_10V7K~D
1
2
CV726
820P_0402_50V7K~D
1
2
RV397
549_0402_1%~D
12
CV729
1U_0402_6.3V6K~D
1
2
CV737
0.1U_0402_10V7K~D
1
2
RV399
549_0402_1%~D
12
G
D
S
QV25
L2N7002WT1G
2
13
RV396
931_0402_1%
12
CV732
0.1U_0402_10V7K~D
@
1
2
RV389 1K_0402_1%~D
1 2
RV391 121_0402_1%~D
1 2
RV392 1K_0402_1%~D
1 2
CV733
0.1U_0402_10V7K~D
1
2
CV728
1U_0402_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3.5A
+1.05VS to +1.05VSDGPU
Discharge
+3VS to +3VS_DELAY
1.4A
T9 T2 T3
Toff < 10ms
T4 T5 T6 T7
T1 Custom
T2 >0
T3 >0
T4 <=0
T5 >=0
T6 Custom
T7 Custom
GPU Disable call
Link tear
down
Driver call
to enable GPU
GPU Power Down Sub-system Sequence
GPU Reset#
Power EN
Power EN
NV3V3Pgood
27Mhz
27Mhz
100MHz
GPU all PG
NV3V3Pgood
Call Return
T1 Custom
T2 >0
T3 >0
T4 >0
T5 >100us
T6 >0
T7 <48ms
T8 500ms
T9 >0
CLK REQ#
100MHz
GPU Reset#
PCIe Training
+3V_GPU
+GPU_CORE
+1.5V_GPU
+1.05V_GPU
GPU Power Up Power Rail Sequence
The ramp time for any rail must be more than 40us.
GPU Power Up Sub-system Sequence
T8
T1
T1 T7
T2 T3 T4 T5 T6
GPU Power Down Sequence
First rail to power down
Last rail to power down
GC6
PT
PT
PTPT
PT
PT
PT
ST
3.3VS_GFX_EN
3.3VS_GFX_ON#
DGPU_PWR_EN
3.3VS_GFX_EN
DGPU_PWR_EN
3.3VS_GFX_ON#
DGPU_FB_EN
FB_Clamp
FB_CLAMP_MON
DGPU_FB_EN
FB_Clamp
DGPU_PWR_EN[18,24,59]
FB_Clamp [24,28,38]
FB_CLAMP_MON [24]
DGPU_FB_EN [57]
DGPU_PWROK[20,59]
+1.05VSDGPU
+VCCP
+1.5VSDGPU +1.05VSDGPU
+3VALW
+GPU_CORE +3VS_DELAY
+3VS +3VS_DELAY
+VSBP
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
33 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
33 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
33 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagram
RZ472
10K_0402_5%~D
1 2
RZ10
10_0402_1%
12
RZ11
1_0402_5%
12
QZ5B
2N7002DW-7-F_SOT363-6
3
5
4
RZ12
100K_0402_5%~D
12
CZ8
0.047U_0402_16V4Z~D
1
2
QZ5A
2N7002DW-7-F_SOT363-6
61
2
G
D
S
QZ18
2N7002_SOT23-3
2
13
S
G
D
QZ1
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
45
1
CZ6
0.047U_0402_16V4Z~D
1
2
RZ15
1_0402_5%
12
QZ17A
2N7002DW-7-F_SOT363-6
61
2
UZ1
SI4634DY-T1-GE3
4
7
8
6
5
1
2
3
QZ17B
2N7002DW-7-F_SOT363-6
3
5
4
D
G
S
QZ25
AO3413_SOT23-3~D
1
3
2
RZ3
100K_0402_5%~D
12
RZ484
10K_0402_5%~D
1 2
RZ485
100K_0402_5%~D
@
12
QZ2B
DMN66D0LDW-7_SOT363-6~D
3
5
4
RZ9 0_0402_5%~D@1 2
G
D
S
QZ19
2N7002_SOT23-3
2
13
RZ6
100_0603_5%~D
12
DZ2
BAT54CW-7-F_SOT323-3~D
2
3
1
QZ2A
DMN66D0LDW-7_SOT363-6~D
61
2
CZ7
0.01U_0402_16V7K~D
1
2
RZ8
100K_0402_5%~D
12
RZ5 60.4K_0402_1%~D
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+5VALW to +5VS
+3VALW to +3VS
+3VS To +1.5VS +3VALW to +3V_PCH
Discharge
1495mA
2041mA
Close UZ4Close UZ4
For deep S3
483mA
464mA
PT
PT
ST
+5VS_TPS
+3VS_TPS
PM_SLP_S3#
PM_SLP_S3#
+3V_PCH_APL
+1.5VS_G9141
VSET
PM_SLP_S3#[18,38,40,43,55,56]
PM_SLP_SUS#[18,38]
+5VALW +5VS
+3VALW +3VS
+5VALW
+3VS+5VS
+3VALW+5VALW
+3VALW
+3VS
+1.5VS
+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
34 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
DC/DC Interface
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
34 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
DC/DC Interface
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
34 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
DC/DC Interface
JP803
JUMP_43X118
@
11
2
2
RZ30
100K_0402_5%~D
12
CZ601
4.7U_0603_6.3VAK
12
UZ4
TPS22966DPUR_SON14_2X3~D
GND 11
VIN2
6
VBIAS
4
ON2
5
VOUT2 9
VIN2
7
CT1 12
VOUT1 14
VOUT2 8
VOUT1 13
VIN1
2
ON1
3
VIN1
1
CT2 10
GPAD 15
CZ28
1U_0603_10V6K~D
@
1
2
UZ14
G5243AT11U_SOT23-5
VIN
5
SS
4
VOUT 1
EN 3
GND 2
UZ600
G9141P11U_SO8
SHDN#
1
IN
2
GND 5
GND 6
GND 8
OUT
3
SET
4
GND 7
CZ29
1U_0603_10V6K~D
@
1
2
JP14 PAD-OPEN 43x39
@
12
RZ602
100K_0603_1%
1 2
CZ600
1U_0603_10V6K
12
CZ32
1U_0603_10V6K~D
1
2
CZ38 470P_0603_50V7K
1 2
CZ602
0.1U_0402_25V6
12
CZ11
10U_0805_10V6M~D
1
2
CZ15 470P_0603_50V7K
1 2
JP11 PAD-OPEN 43x39
@
12
RZ600
11K_0402_1%
12
JP802
JUMP_43X118
@
11
2
2
CZ45
10U_0805_10V6M~D
1
2
RZ601
20K_0402_1%
12
CZ20
10U_0805_10V6M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
eDP Conn.
60mil
60mil
LCD backlight PWR CTRL
LCD PWR CTRL
eDP Redriver
W=60mils
W=60mils
Touch Screen
PCH to EC
W=60mils
W=60mils
PT
PT
PT
PT
QT
QT
QT
QT
QT
ST
ST
ST
ST
QT
QT
QT
QT
QT
PWR_SRC_ON
BKOFF#
DISPOFF#
+LCDVDD_R
INV_PWM
EDP_HPD_S
EDP_TXP0_C
EDP_TXN0_C
EDP_TXP1_C
EDP_TXN1_C
EDP_AUXN_C
EDP_AUXP_C
EDP_TXP0_R
EDP_TXN0_R
EDP_TXN1_R
EDP_AUXN_R
EDP_AUXP_R
EDP_TXP1_R
EDP_TXN2_R
EDP_TXP2_REDP_TXP2_C
EDP_TXN2_C
EDP_TXN3_R
EDP_TXP3_REDP_TXP3_C
EDP_TXN3_C
+LCDVDD_R
eDP_LVDDEN
USB20_P9_R
USB20_N9_R
EDP_TXN3_R
EDP_TXP3_R
EDP_TXP2_R
EDP_TXP1_R
EDP_TXN1_R
EDP_TXN2_R
EDP_TXN0_R
EDP_TXP0_R
EDP_AUXN_R
EDP_AUXP_R
USB20_N9_R
USB20_P9_R
Color_DAT
Color_CLK
DISPOFF#
INV_PWM
Color_DAT
Color_CLK
EDP_HPD_S
EC_ENVDD
BKOFF#
BKOFF#[38]
eDP_PWM[18]
EDP_HPD [8]
eDP_LVDDEN[18]
EC_ENVDD[38]
USB20_P9[19]
USB20_N9[19]
TS_sleep#[38]
ENBKL[18,38]
EDP_AUXP[8]
EDP_AUXN[8]
EDP_TXP0[8]
EDP_TXN0[8]
EDP_TXP1[8]
EDP_TXN1[8]
EDP_TXP2[8]
EDP_TXN2[8]
EDP_TXP3[8]
EDP_TXN3[8]
PCH_SMLCLK [17,25,38,40]
PCH_SMLDATA [17,25,38,40]
LCD_TEST[38]
LCD_DBC[20]
LCD_DCR[20]
LID_SW_IN#[38,40]
LCD_DELAY [38]
EC_INV_PWM[38]
B+ +INV_PWR_SRC
+EDPVDD
+VCCIO_OUT
+EDPVDD
+3VS
+3VS
+EDPVDD
+EDPVDD
+INV_PWR_SRC
+EDPVDD
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
35 62Wednesday, September 04, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
eDP /camera conn.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
35 62Wednesday, September 04, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
eDP /camera conn.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
35 62Wednesday, September 04, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
eDP /camera conn.
RV419 1_0402_5%
1 2
DV17 RB751V40_SC76-2
1 2
CH31 0.1U_0402_10V7K~D
1 2
DV13
BAT54CW-7-F_SOT323-3~D
2
3
1
DV20 RB751V40_SC76-2
1 2
CH40 0.1U_0402_10V7K~D
1 2
JTS
ACES_50208-00601-P01
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
GND
7
GND
8
RI8 0_0402_5%~DEMC@
1 2
LV17
DLP11SN900HL2L_4P
EMC@
1 2
34
RV5 10K_0402_5%~D
1 2
RI9 0_0402_5%~DEMC@
1 2
RV416
1_0402_5%
@
1 2
DV18 RB751V40_SC76-2
12
UV12
APL3512ABI-TRG_SOT23-5
VIN
5
SS
4
VOUT 1
EN 3
GND 2
RV482 0_0402_5%@
1 2
LV20
DLP11SN900HL2L_4P
EMC@
1 2
34
CH32 0.1U_0402_10V7K~D
1 2
RV12 0_0402_5%~D
1 2
DV10
BAT54CW-7-F_SOT323-3~D
2
3
1
CH29 0.1U_0402_10V7K~D
1 2
LV19
DLP11SN900HL2L_4P
EMC@
1 2
34
CH41 0.1U_0402_10V7K~D
1 2
LI4
DLW21SN900HQ2L_0805_4P~D
@
1
122
33
4
4
S
G
D
QV29
SI3457BDV-T1-E3_TSOP6~D
3
6
2
4 5
1
DV19 RB751V40_SC76-2@
12
CH43 0.1U_0402_10V7K~D
1 2
CV752
0.1U_0402_25V6K~D
1
2
QV7A
DMN66D0LDW-7_SOT363-6~D
6 1
2
LV16
DLP11SN900HL2L_4P
EMC@
1 2
34
RV415 0_0402_5%@
1 2
RV470
10K_0402_5%~D
12
CH23 0.1U_0402_10V7K~D
1 2
CV26
1U_0603_10V6K~D
1
2
QV7B
DMN66D0LDW-7_SOT363-6~D
3
5
4
CH44 0.1U_0402_10V7K~D
1 2
CH42 0.1U_0402_10V7K~D
1 2
G
D
S
QV38
SSM3K7002FU_SC70-3~D
2
13
RV408
100K_0402_5%~D
12
DI3
PESD5V0U2BT_SOT23-3~D
@
2
3
1
CH25 0.1U_0402_10V7K~D
1 2
RV412
1M_0402_5%~D
12
RV480 0_0402_5%@
1 2
RV413
1M_0402_5%~D
12
JEDP1
ACES_59003-04006-001
CONN@
VR_SRC
7
LCD_B_CLK-
16
VR_GND
14
VR_SRC
5
BATT_YELLOW_LED
3
GND
1
LVDS_B0-
23
LVDS_B2+
18
VR_GND
13
GND
24 LVDS_A_CLK+
25
GND
27
LVDS_A2-
29 LVDS_A1+
30
LCD_VDD
38
EDID_CLK
35
V_EDID
37
LVDS_A0-
33
VR_SRC
6
LCD_B_CLK+
15
VR_GND
12
BREATH_WHITE_LED
4
BATT_WHITE_LED
2
LVDS_B1-
21 LVDS_B0+
22
GND
17
LVDS_B2-
19 LVDS_B1+
20
LVDS_A_CLK-
26
LVDS_A2+
28
LVDS_A1-
31 LVDS_A0+
32
LCD_VDD
39
BIST
36
EDID_DATA
34
CONNTST
40 MGND1 41
MGND2 42
MGND3 43
MGND4 44
MGND5 45
MGND6 46
NC
8
PWM
10
DISP_ON/OFF#
9
CONNTST_GND
11
LV18
DLP11SN900HL2L_4P
EMC@
1 2
34
RV469
100K_0402_5%~D
12
G
D
S
QV30
SSM3K7002FU_SC70-3~D
2
13
CV3508
10U_0805_10V4Z~D
@
1
2
CV751
0.1U_0402_25V6K~D
1
2
RV11 0_0402_5%~D
1 2
RV333
2.2K_0402_5%~D
12
RV405
10K_0402_5%~D
12
DV21 RB751V40_SC76-2
@
12
CV3501
0.1U_0402_16V7K~D
1
2
RV403
10K_0402_5%~D
12
RV481 0_0402_5%@
1 2
RV334
2.2K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Place close to JHDMI1
HDMI Active Level Shift(ALS type)
HDMI DDC
For EMI
W=40mils
close to JHDMI
For EMI Reserve
Place close to JHDMI1
Enable active DDC buffer;
Internal pull down at ~150KΩ, 3.3V I/O
L: default, passive DDC pass-through
H: active DDC buffer with internal pull up2.36K resistor
M: active DDC buffer without internal pull up resistor
HDMI conn
Receiver equalization setting;
Internal pull down at ~150kΩ, 3.3V I/O.
L: programmable EQ for channel loss up to 5.3dB
H: programmable EQ for channel loss up to 10dB
M: programmable EQ for channel loss up to 14dB
Output pre-emphasis setting;
Internal pull down at ~150kΩ, 3.3V I/O.
L: no pre-emphasis
H: 1.6dB pre-emphasis
M: 3.0dB pre-emphasis
close pin12,37
PS8201A --- SA00005PJ00
PS8401A --- SA00005CW10
for PS8401, PS8201 NC
PT
ST
TMDS_L_TXCN
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX2N
TMDS_RD_TXCN
TMDS_RD_TXCP TMDS_L_TXCP
TMDS_RD_TX0N
TMDS_RD_TX0P
TMDS_L_TX0N
TMDS_L_TX0P
TMDS_RD_TX1N
TMDS_RD_TX1P
TMDS_RD_TX2N
TMDS_RD_TX2P TMDS_L_TX2P
HDMI_Reserved
HDMI_CEC
TMDS_L_TX2N
+VDISPLAY_VCC
DDC_DAT_HDMI
DDC_CLK_HDMI
HDMI_HPLUG
TMDS_L_TX0P
TMDS_L_TXCP
TMDS_L_TX1N
TMDS_L_TX2P
TMDS_L_TX0N
TMDS_L_TX1P
TMDS_L_TXCN
HDMI_Reserved
HDMI_HPLUG
HDMI_CEC
DDC_DAT_HDMI
DDC_CLK_HDMI
+5V_HDMI_DDC
HDMI_BUF
HDMI_PRE HDMI_EQ
TMDS_TXCP
TMDS_TXCN
TMDS_TX0P
TMDS_TX0N
TMDS_TX1N
TMDS_TX1P
TMDS_TX2P
TMDS_TX2N
TMDS_RD_TX2N
TMDS_RD_TX2P
TMDS_RD_TX1P
TMDS_RD_TX1N
TMDS_RD_TX0P
TMDS_RD_TX0N
TMDS_RD_TXCN
TMDS_RD_TXCP
HDMI_PD#
HDMI_BUF
HDMI_EQ
HDMI_PRE
DDC_CLK_HDMI
DDC_DAT_HDMI
HDMI_HPLUG
HDMI_PCH_HPD
HDMI_DDB_CTRLCLK
HDMI_DDB_CTRLDATA
TMDS_L_TXCP
TMDS_L_TXCN
TMDS_L_TX0N
TMDS_L_TX0P
TMDS_L_TXCN
TMDS_L_TXCP
TMDS_L_TX0P
TMDS_L_TX0N
TMDS_L_TX2N
TMDS_L_TX2P
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX2N
TMDS_L_TX2P
TMDS_L_TX1N
TMDS_L_TX1P
HDMI_ISET
HDMI_ISET
HDMI_A3P_VGA[8]
HDMI_A3N_VGA[8]
HDMI_A0P_VGA[8]
HDMI_A0N_VGA[8]
HDMI_A1N_VGA[8]
HDMI_A1P_VGA[8]
HDMI_A2P_VGA[8]
HDMI_A2N_VGA[8]
HDMI_DDB_CTRLCLK [18]
HDMI_DDB_CTRLDATA [18]
HDMI_PCH_HPD [18]
+5VS
+3VS
+3VS +3VS
+1.5VS
+3VS
+3VS
+3VS
+5VS
+3VS
+1.5VS
+3VS
+3VS +1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
HDMI
Custom
36 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
HDMI
Custom
36 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
HDMI
Custom
36 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
LV8
DLW21SN900HQ2L_0805_4P~D
EMC@
1
122
33
4
4
NC
DV8
BAT1000-7-F_SOT23-3~D
2 1
3
8
7
65
4
3
2
1
9
10
DV4
AZ1045-04F_DFN2510P10E-10-9
@
4
5
1
6
2
7
3
9
8
CV775
0.1U_0402_10V7K~D
1
2
RV449
4.7K_0402_5%~D
@
12
RV450
10K_0402_1%~D
12
CV756
0.01U_0402_16V7K~D
1
2
CV795 0.1U_0402_25V6K~D@
1 2
LV9
DLW21SN900HQ2L_0805_4P~D
EMC@
1
122
33
4
4
CV766
0.1U_0402_10V7K~D
1
2
RV431
4.7K_0402_5%~D
@
12
CV763 0.1U_0402_10V7K~D
12
8
7
65
4
3
2
1
9
10
DV5
AZ1045-04F_DFN2510P10E-10-9
@
4
5
1
6
2
7
3
9
8
RV445
2.2K_0402_5%~D
12
RV430
4.7K_0402_5%~D
@
12
RV460
4.7K_0402_5%~D
@
12
T118 PAD@
CV771
0.1U_0402_10V7K~D
1
2
RV459
4.7K_0402_5%~D
@
12
CV796 0.1U_0402_25V6K~D@
1 2
CV765 0.1U_0402_10V7K~D
12
CV774
0.01U_0402_16V7K~D
1
2
CV745
0.01U_0402_16V7K~D
1
2
RV451
10K_0402_1%~D
@
12
CV762 0.1U_0402_10V7K~D
12
U22
PS8201ATQFN40GTR2A0_TQFN40_5X5
VDD15_1
19
VDD15_2
20
VDD15_3
31
VDD15_4
40
VDD33 11
IN_D2+
1
IN_D2-
2
IN_D1+
4
IN_D1-
5
IN_D0+
6
IN_D0-
7
IN_CLK+
9
IN_CLK-
10
DDCBUF/SDA_CTL
14
DCIN_EN/SCL_CTL
13
EQ/I2C_ADDR
17
I2C_CTL_EN
8
HPD_SNK
28
REXT
18
PD#
36
CFG
23
PRE
16
OUT_D2+ 30
OUT_D2- 29
OUT_D1- 26
OUT_D1+ 27
OUT_D0- 24
OUT_D0+ 25
OUT_CLK- 21
OUT_CLK+ 22
SCL_SRC 38
SDA_SRC 39
SCL_SNK 32
SDA_SNK 33
HPD_SRC 3
NC_1 12
NC_2 15
NC_3 34
NC_4 37
GND 35
EPAD 41
RV429 4.7K_0402_5%~D@
1 2
JHDMI
ACON_HMRB9-AK120C
CONN@
D2+
1D2_Shield
2D2-
3D1+
4D1_Shield
5D1-
6D0+
7D0_Shield
8D0-
9CK+
10 CK_Shield
11 CK-
12 CEC
13 Reserved
14 SCL
15 SDA
16 DDC/CEC GND
17 +5V
18 HPD
19
GND1 20
GND2 21
GND3 22
GND4 23
RV444 4.7K_0402_5%~D
1 2
RV448
4.7K_0402_5%~D
@
12
CV744
0.01U_0402_16V7K~D
1
2
CV767
10U_0603_6.3V6M~D
1
2
RV458 4.99K_0402_1%~D
1 2
CV772
0.1U_0402_10V7K~D
1
2
CV764 0.1U_0402_10V7K~D
12
CV760 0.1U_0402_10V7K~D
12
CV758 0.1U_0402_10V7K~D
12
DV11
RB751V40_SC76-2
1 2
HDMIF1 1.5A_6V_1206L150PR~D
12
CV743
0.01U_0402_16V7K~D
1
2
CV759 0.1U_0402_10V7K~D
12
LV7
DLW21SN900HQ2L_0805_4P~D
EMC@
1
122
33
4
4
CV768 0.1U_0402_25V6K~D@
1 2
LV10
DLW21SN900HQ2L_0805_4P~D
EMC@
1
122
33
4
4
CV761 0.1U_0402_10V7K~D
12
RV447
2.2K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDC Dongle SW for DP
DP HPD for DGPU output (Optimus)
DP HPD to PCH (iGPU)
Close to JMDP1
Mini DP
PT
PT
PT
PT
PT
ST
ST
DISP_CEC
CAB_DET_SINK
DISP_CLK_AUXP_CONN
DISP_A1N_R
DISP_A1P_R
DISP_A2N_R
DISP_A2P_R
DISP_A3N_R
DISP_A3P_R
DISP_A0N_R
DISP_A0P_R
DISP_DAT_AUXN_CONNCAB_DET_SINK#
mDP_HPD_SINK
+3VS_DP
mDP_HPD
DISP_A0N_R
DISP_A0P_R
DISP_A1P_R
DISP_A1N_R
DISP_A0N_R
DISP_A1P_R
DISP_A1N_R
DISP_A0P_R
DISP_A3P_R
DISP_A3N_R
DISP_A3P_R
DISP_A3N_R
DISP_A2N_R
DISP_A2P_R
DISP_A2N_R
DISP_A2P_R
mDP_HPD
DISP_C_A2P
DISP_C_A1N
DISP_C_A0P
DISP_C_A1P
DISP_C_A3N
DISP_C_A3P
DISP_C_A0N
DISP_C_A2N
mDP_CFG1_INPUT
mDP_PEQ
mDP_CFG0
mDP_RST#
mDP_HPD_SINK
mDP_A2P_R
mDP_A2N_R
mDP_A1N_R
mDP_A0P_R
mDP_A1P_R
mDP_A3N_R
mDP_A0N_R
mDP_A3P_R
DISP_A0P_R
DISP_A0N_R
DISP_A1P_R
DISP_A1N_R
DISP_A2P_R
DISP_A2N_R
DISP_A3P_R
DISP_A3N_R
CAB_DET_SINK
mDP_RST#
mDP_PEQ
mDP_CFG1_INPUT
mDP_CFG0
DISP_C_A2P
DISP_C_A1N
DISP_C_A0P
DISP_C_A1P
DISP_C_A3N
DISP_C_A3P
DISP_C_A0N
DISP_C_A2N
DISP_CLK_AUXP_CONN
DISP_DAT_AUXN_CONN
mDP_AUXP_PCH_C
mDP_AUXN_PCH_C
DP_PCH_HPD[16,18]
CAB_DET_SINK[18]
mDP_A0N_CPU[8]
mDP_A0P_CPU[8]
mDP_A1P_CPU[8]
mDP_A1N_CPU[8]
mDP_A2P_CPU[8]
mDP_A2N_CPU[8]
mDP_A3N_CPU[8]
mDP_A3P_CPU[8]
mDP_AUXN_PCH[18]
mDP_AUXP_PCH[18]
mDP_DDC_CTRLDATA[18]
mDP_DDC_CTRLCLK[18]
+3VS
+3VS
+3VS_mDPR
+3VS +3VS_mDPR +3VS_mDPR
+3VS_mDPR
+3VS_mDPR
+3VS_mDPR
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Mini DP
Custom
37 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Mini DP
Custom
37 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
Mini DP
Custom
37 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
R2531 4.7K_0402_5%~D@
1 2
R2534 10K_0402_1%~D
1 2
R2535 4.7K_0402_5%~D@
1 2
C57 0.1U_0402_16V7K~D
12
G
D
S
QV37
2N7002_SOT23-3
2
13
CV781 0.1U_0402_10V6K~D
12
C59 0.1U_0402_16V7K~D
12
CV788 0.1U_0402_10V6K~D
1
2
JMDP
600032GB020M207ZL
CONN@
GND
19 AUX_CH_N
18 LANE2_N
17 AUX_CH_P
16 LANE2_P
15 GND
14 GND
13 LANE3_N
12 LANE1_N
11 LANE3_P
10 LANE1_P
9GND
8GND
7CONFIG2
6LANE0_N
5CONFIG1
4LANE0_P
3HPD
2GND
1
DP_PWR
20 GND4 24
GND3 23
GND2 22
GND1 21
CV782 0.1U_0402_10V6K~D
12
CV32
0.01U_0402_16V7K~D
1
2
R2536 4.7K_0402_5%~D@
1 2
U11
PS8330BQFN48GTR-A0_QFN48_7X7
VCC4 25
OUT0p 23
OUT0n 22
OUT1p 20
OUT1n 19
OUT2p 17
OUT2n 16
OUT3p 14
OUT3n 13
VCC5 32
VCC6 36
IN0p
38
IN0n
39
IN1p
41
IN1n
42
IN2p
44
IN2n
45
IN3p
47
IN3n
48
CEXT 2
NC2 15
NC3 21
HPD_SRC
9
CAD_SNK 10
PD#
26
AUX_SNKN 27
AUX_SNKP 28
CFG1 40
HPD_SINK 11
VCC1 1
EPAD
49
VCC2 6
GND3
31
VCC3 12
GND1
18
GND2
24
SCL_CTL/PEQ
4
SDA_CTL/CFG0
5
REXT
7
CAD_SRC
8
I2C_ADDR
3
AUX_SRCN
29 AUX_SRCP
30
SDA_DDC
34 SCL_DDC
33
NC4 37
RST# 35
NC5 43
NC 46
RV456 5.1M_0402_5%
12
C2021 2.2U_0402_6.3V6M~D
1 2
R2533 4.7K_0402_5%~D@
1 2
CV783 0.1U_0402_10V6K~D
12
NC
DV9
BAT1000-7-F_SOT23-3~D
2 1
3
C2020
2.2U_0402_6.3V6M~D
1
2
CV813 0.1U_0402_10V6K~D
12
CV784 0.1U_0402_10V6K~D
12
C43
0.1U_0402_10V7K~D
1
2
C42 0.1U_0402_16V7K~D
12
CV812 0.1U_0402_10V6K~D
12
C53 0.1U_0402_16V7K~D
12
R8 0_0805_5%@
1 2
RV452
100K_0402_5%~D
12
RV411 0_0402_5%@
1 2
CV786 0.1U_0402_10V6K~D
12
C56 0.1U_0402_16V7K~D
12
R25154.99K_0402_1%
1 2
C37
0.1U_0402_10V7K~D
1
2
CV787 22U_0805_6.3V6M~D
1
2
CV785 0.1U_0402_10V6K~D
12
8
7
65
4
3
2
1
9
10
DV2
AZ1045-04F_DFN2510P10E-10-9
@
4
5
1
6
2
7
3
9
8
RV491
100K_0402_5%~D
1 2
C54 0.1U_0402_16V7K~D
12
RV490
100K_0402_5%~D
12
CV770
0.1U_0402_16V7K~D
1
2
C48
0.1U_0402_10V7K~D
1
2
CV769
10U_0603_6.3V6M~D
1
2
CV780 0.1U_0402_10V6K~D
12
DPF1
1.5A_6V_1206L150PR~D
1 2
C38
0.1U_0402_10V7K~D
1
2
R2530 4.7K_0402_5%~D@
1 2
R2532 4.7K_0402_5%~D@
1 2
8
7
65
4
3
2
1
9
10
DV3
AZ1045-04F_DFN2510P10E-10-9
@
4
5
1
6
2
7
3
9
8
C93 0.1U_0402_16V7K~D
12
RV453
1M_0402_5%~D
12
CV779 0.1U_0402_10V6K~D
12
C47 0.1U_0402_16V7K~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Analog Board ID definition,
Please see page 4.
Ra
Rb
Board ID
EC KB9012
20mil
EC to BAT,Charge
T43 revrese under Keyboard
for easy to debug
Close to pin B13
EC to Ambient Light Sensor, GPU,RTC Counter
HWPG
Power on Circuit
60 mil
PT
PT
QT
PT
QT
PT
ST
ST
QT
QT
QT
QT
AD_BID0
LPC_AD1
SERIRQ
LPC_AD2
LPC_AD3
LPC_FRAME#
KB_RST#
ECAGND
+V18R
GATEA20
LPC_AD0
CLK_PCI_LPC
EC_RUNTIME_SCI#
EC_RST#
CLK_PCI_LPC
KSI3
KSI1
KSI0
KSI6
KSI7
KSI4
KSO15
KSI2
KSI5
KSO4
KSO8
KSO14
KSO13
KSO12
KSO9
KSO1
KSO0
KSO3
KSO6
KSO2
KSO10
KSO11
KSO7
KSO5
KSO16
PCH_SUSWARN#
PCH_SMLCLK
EC_SMB_CK1
EC_SMB_DA1
PCH_SMLDATA
EC_SMI#
PS_ID
SYSTEM_FAN_FB
ECAGND
EC_ON
AC_IN
EC_ON_CTRL#
PBTN_OUT#
VCOUT0_PH#
H_PROCHOT#_EC
BKOFF#
PCH_RSMRST#
HWPG
PM_SLP_S4#
HDA_SDO
TP_DATA
TP_CLK
AC_PRESENT
EC_ENVDD
BATT_LED#_LV2
ADP_I
AD_BID0
BEEP#
KB_LED_PWM
BATT_LED#_LV1
EC_ON
+EC_VCCA
AC_IN
KSO3
PLT_RST#
EC_CRY2
EC_TX
EC_PECI
AC_IN
USB0_DET_EC#_D
EAPD#
EC_RST#
ECAGND
KSO[0..16]
KSI[0..7]
EC_RST#
PLT_RST#
USBCHG_DET#_D
USBCHG_DET_D
VCOUT0_PH#
EC_RX
ACOFF
PCH_PWROK_EC
PWRBTN_LED#
BATBTN#
WLAN_WAKE#
EC_BATT_PRS#
USB1_DET_EC#_D
USB2_DET_EC#_D
HWPG
PBTN_SW#
EC_ON_CTRL#BATBTN#
H_PROCHOT# H_PROCHOT#_EC
KC3810_RST#
KC3810_RST#
ESB_CLK
ESB_DAT
ESB_DAT
ESB_CLK
FB_Clamp_REQ#
FB_Clamp_REQ#
USB_ILIM_SEL
ESB_CLK
ESB_DAT
USB2_DET_EC#_D
AUD_MUTE
WAKE_PCH#
WAKE_PCH#
CAPS_LED#
EC_SMB_CK1
EC_SMB_DA1
PCH_SMLDATA
PCH_SMLCLK
TP_DATA
TP_CLK
USBCHG_DET_D
3VA_EN
EC_ON
VCOUT0_PH#
VR_ON
BATT_LED#_LV5
SYSTEM_FAN2_FB
5VA_EN
WLAN_WAKE#
USB3_DET_EC#_D
USB3_DET_EC#_D
EN_WLANPWR#
VR_ON
PM_SLP_SUS#
BATT_LED#_LV4
USB0_DET_EC#_D
USB1_DET_EC#_D
LID_SW_IN#
EC_BATT_PRS#
BATT_LED#_LV3
GPU_HOT#
CCD_INT#
LCD_TEST
CCD_INT#
USB_ILIM_SEL
ENBKL
LPC_FRAME#[17,40,42]
LPC_AD2[17,40,42]
LPC_AD3[17,40,42]
LPC_AD1[17,40,42]
SERIRQ[17,40]
KB_RST#[20]
GATEA20[20]
LPC_AD0[17,40,42]
CLK_PCI_LPC[17]
EC_RUNTIME_SCI#[20]
PLT_RST#[18,40,42,6,8]
EC_SMB_DA1[52,53]
EC_SMB_CK1[52,53]
PCH_SMLDATA[17,25,35,40]
PCH_SMLCLK[17,25,35,40]
EC_SMI#[20]
EC_TX[42]
PM_SLP_S3#[18,34,40,43,55,56]
PM_SLP_S5#[18]
PS_ID[52]
SYSTEM_FAN_FB[39]
PBTN_OUT# [18,6]
H_PECI [8]
BKOFF# [35]
PCH_RSMRST# [18]
HDA_SDO [16]
TP_CLK [39]
TP_DATA [39]
AC_PRESENT [18]
EC_ENVDD [35]
BATT_LED#_LV2 [49]
ADP_I [52,53]
BEEP# [47]
KB_LED_PWM [39]
BATT_LED#_LV1 [49]
BATT_LOW_LED# [49]
PM_SLP_S4# [18,55]
SUSCLK_R[18,40]
USB0_DET_EC#[45]
KSI[0..7][39]
KSO[0..16][39]
AC_IN [53]EC_RX[42]
PCH_SUSWARN#[18]
SUSACK#[18]
ACOFF [53]
SYSTEM_FAN_PWM [39]
PCH_PWROK_EC [18]
PWRBTN_LED# [39]
EC_WLAN_WAKE#[40]
USB1_DET_EC#[45]
USB2_DET_EC#[40]
+V1.05S_VCCP_PWRGOOD[56,8]
BATBTN#[49]
PBTN_SW#[39]
H_PROCHOT#[53,58,8]
FB_Clamp_REQ#[24]
USB2_PWR_EN_EC [40]
AUD_MUTE[48]
WAKE_PCH#[20]
CAPS_LED# [39]
H_PROCHOT#_EC [53]
3VA_EN [54]
BATT_LED#_LV5[49]
SYSTEM_FAN2_PWM [40]
SYSTEM_FAN2_FB[40]
5VA_EN [54]
IMVP_VR_PG [18,58,6]
USB2_CTL1 [40]
USB3_CTL1 [40]
USB3_PWR_EN_EC [40]
USB3_DET_EC#[40]
MEM_TEMP0 [41]
FAN_TEMP0 [41]
MEM_TEMP1 [41]
FAN_TEMP1 [41]
SKIN_TEMP0 [41]
SKIN_TEMP1 [41]
EN_WLANPWR# [40]
USB1_CTL1 [44]
USB0_CTL1 [44]
USB1_PWR_EN_EC [44]
DRAMRST_CNTRL_S3[14,8]
THM_OVERT#[24]
VR_ON[58]
FB_Clamp[24,28,33]
TS_sleep#[35]
USB_D_PD#[40,45]
PM_SLP_SUS# [18,34]
LCD_TEST[35]
DSP_PD# [46]
BATT_LED#_LV4 [49]
USB0_PWR_EN_EC [44]
LID_SW_IN# [35,40]
EC_BATT_PRS# [52,53]
BATT_LED#_LV3 [49]
GPU_HOT#[24]
EAPD# [47]
VCIN0_PH [8]
VCIN1_PH [52]
LCD_DELAY[35]
CCD_INT# [40]
EC_INV_PWM[35]
USB_ILIM_SEL [40,44]
ENBKL [18,35]
+3VALW_EC
+3VS
+3VALW_EC
+3VS
+3VLP
+3VLP
+3VALW_EC
+3VLP
+3VALW
+3VLP
+3VALW_EC
+3VLP
+3VALW_EC
+3VALW_EC
+3VLP
+3VLP
+3VLP
+3VS +3VALW_EC
+3VALW_EC
+3VALW
+3VALW_EC
+3VALW_EC
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
38 62Tuesday, September 17, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
EC ENE-KB930/ ENE3810
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
38 62Tuesday, September 17, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
EC ENE-KB930/ ENE3810
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
38 62Tuesday, September 17, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
EC ENE-KB930/ ENE3810
DE14 RB751V40_SC76-2
1 2
DE17 RB751V40_SC76-2
1 2
RE47 10K_0402_5%~D
1 2
CE10
0.1U_0402_16V7K~D
1
2
CE7
0.1U_0402_16V7K~D
1
2
CE12
0.1U_0402_16V7K~D
@
1
2
DE305 RB751V40_SC76-2
12
RE58 100K_0402_5%~D@
1 2
UE2 SN74LVC1G06DCKR_SC70-5
Y
4A2
P5
G
3
NC
1
RE20 47K_0402_5%~D
1 2
CE14 0.1U_0402_16V7K~D
1 2
DE303 RB751V40_SC76-2
12
RE43 10K_0402_5%~D@
1 2
RE66
10K_0402_5%~D
12
CE5
0.1U_0402_16V7K~D
1
2
RE322
0_0402_5%
@
1 2
DE12 RB751V40_SC76-2
1 2
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
UE1
KB9012BF A4 LFBGA128P
GA20/GPIO00
M2
KBRST#/GPIO01
L2
SERIRQ#
M3
LFRAME#
K4
LAD3
N3
PM_SLP_S3#/GPIO04
J5
LAD2
M4
LAD1
K5
VCC J7
LAD0
N4
GND
J8
PCICLK
N5
PCIRST#/GPIO05
M5
PM_SLP_S5#/GPIO07
N9
EC_SMI#/GPIO08
L13
LID_SW#/GPIO0A
K6
SUSP#/GPIO0B
N7
PBTN_OUT#/GPIO0C
M7
EC_PME#/GPIO0D
N8
SCI#/GPIO0E
N6
INVT_PWM/PWM0/GPIO0F M9
VCC K12
BEEP#/PWM1/GPIO10 M8
GND
J9
EC_THERM#/GPIO11
K8
FANPWM0/GPIO12 M10
ACOFF/FANPWM1/GPIO13 N10
FAN_SPEED1/FANFB0/GPIO14
M11
FANFB1/GPIO15
N11
EC_TX/GPIO16
K10
EC_RX/GPIO17
K9
ON_OFF/GPIO18
N12
VCC M12
PWR_LED#/GPIO19
M13
GND
N13
NUMLED#/GPIO1A
L12
ECRST#
K13
CLKRUN#/GPIO1D
M6
KSO0/GPIO20
J13
KSO1/GPIO21
J12
KSO2/GPIO22
H12
KSO3/GPIO23
H13
KSO4/GPIO24
H10
KSO5/GPIO25
H9
KSO6/GPIO26
G9
KSO7/GPIO27
G10
KSO8/GPIO28
G13
KSO9/GPIO29
G12
KSO10/GPIO2A
F13
KSO11/GPIO2B
F12
KSO12/GPIO2C
F10
KSO13/GPIO2D
F9
KSO14/GPIO2E
E10
KSO15/GPIO2F
E9
KSI0/GPIO30
D9
KSI1/GPIO31
E12
KSI2/GPIO32
E13
KSI3/GPIO33
D12
KSI4/GPIO34
D13
KSI5/GPIO35
C12
KSI6/GPIO36
C13
KSI7/GPIO37
D10
BATT_TEMP/AD0/GPI38 B13
BATT_OVP/AD1/GPI39 A13
ADP_I/AD2/GPI3A B12
AD3/GPI3B A12
AVCC B11
DAC_BRIG/DA0/GPO3C B10
AGND
A11
EN_DFAN1/DA1/GPO3D A9
IREF/DA2/GPO3E A10
DA3/GPO3F B9
CIR_RX/GPIO40 B6
CIR_RLC_TX/GPIO41 B7
AD4/GPI42 E7
SELIO2#/AD5/GPI43 D7
SCL0/GPIO44
A8
SDA0/GPIO45
A7
SCL1/GPIO46
B8
SDA1/GPIO47
A6
KSO16/GPIO48
E8
KSO17/GPIO49
D8
PSCLK1/GPIO4A D6
PSDAT1/GPIO4B E6
PSCLK2/GPIO4C E5
PSDAT2/GPIO4D D5
TP_CLK/PSCLK3/GPIO4E A5
TP_DATA/PSDAT3/GPIO4F B5
FSTCHG/SELIO#/GPIO50 B4
BATT_CHGI_LED#/GPIO52 A4
CAPS_LED#/GPIO53 B3
BATT_LOW_LED#/GPIO54 A3
SUSP_LED#/GPIO55 A2
GND
J10
SYSON/GPIO56 B2
VCC K7
SDICS#/GPXIOA00 B1
SDICLK/GPXIOA01 A1
SDIDO/GPXIOA02 C1
EC_RSMRST#/GPXIOA03 D4
EC_LID_OUT#/GPXIOA04 D1
EC_ON/GPXIOA05 D2
EC_SWI#/GPXIOA06 E2
ICH_PWROK/GPXIOA07 E4
BKOFF#/GPXIOA08 E1
WL_OFF#/GPXIOA09 F4
GPXIOA10 F2
GPXIOA11 F1
SDIDI/GPXIOD00 C2
PM_SLP_S4#/GPXIOD01 F5
VCC J4
ENBKL/GPXIOD02 G1
GND
G2
GPXIOD03 G5
GPXIOD04 H1
GPXIOD05 G4
GPXIOD06 H4
GPXIOD07 H2
MOSI J2
MISO K2
VR_ON/XCLK32K/GPIO57 H5
XCLKI
J1
XCLKO
K1 V18R L1
VCC J6
SPICLK/GPIO58 M1
AC_IN/GPIO59 N1
SPICS# N2
RE27 0_0402_5%@
1 2
CE17
4.7U_0805_10V6
1
2
RE49
100K_0402_5%~D
12
DE8 RB751V40_SC76-2
1 2
RE38 43_0402_1%
1 2
DE304 RB751V40_SC76-2
1 2
RE61 10K_0402_5%~D
1 2
RPH19
2.2K_8P4R_5%
1 8
2 7
3 6
4 5
RE40
100K_0402_5%~D
12
RE44
150K_0402_5%
@
12
RE50
100K_0402_5%~D
12
RE55
10K_0402_5%~D
12
RE469 0_0402_5%~D@
1 2
CE322
1U_0603_10V6K~D
@
12
DE9 RB751V40_SC76-2
1 2
CE13 100P_0402_50V8J~DEMC@
1 2
RE57 10K_0402_5%~D@
1 2
CE9
1000P_0402_50V7K~D
1
2
CE19
0.1U_0402_16V7K~D
1
2
CE8
1000P_0402_50V7K~D
1
2
DE18 RB751V40_SC76-2
1 2
RE12
33K_0402_1%
N14@
12
CE11
22P_0402_50V8J~D
@
1
2
CE20 0.1U_0402_16V7K~D
1 2
T43 PAD@
DE16 RB751V40_SC76-2
1 2
RE59
100K_0402_5%~D
12
RE12
100K_0402_1%
N15@
CE21
47P_0402_50V8J~D
1
2
RE28 10K_0402_5%~D@
1 2
RE72
10K_0402_5%~D
12
CE15
0.1U_0402_16V7K~D
1
2
RE32 10K_0402_5%~D@
1 2
CE16 100P_0402_50V8J~DEMC@
1 2
RE42
100K_0402_5%~D
12
LE1
FBMA-L11-160808-800LMT_0603
1 2
DE15 RB751V40_SC76-2
1 2
RE33 10K_0402_5%~D
1 2
RE29
10K_0402_5%~D
12
RE34 10K_0402_5%~D
1 2
T126PAD @
RE60 0_0402_5%@
1 2
RE69
10K_0402_5%~D
12
RE48 10K_0402_5%~D
1 2
CE22
10U_0603_6.3V6M~D
1
2
RE74 4.7K_0402_5%~D
1 2
RE39 0_0402_5%~DEMC@
1 2
CE6
0.1U_0402_16V7K~D
1
2
RE64 10K_0402_5%~D@
1 2
RE340
2.2K_0402_1%
1 2
CE23 0.1U_0402_16V7K~D
1 2
CE26
0.1U_0402_25V6K~D
1
2
DE10 RB751V40_SC76-2
1 2
UE36
KC3810_QFN24_4X4
GPIO0D/PWM1 19
GPIO0B 17
GPIO0A 16
GPIO09 15
GPIO08/CAS_DAT 14
GND
12
GPIO07/CAS_CLK
11
GPIO06
10
GPIO02
6
GPIO00
2
ESB_DAT
4
GPIO05
9
GPIO03
7
ESB_CLK
1
GPIO01
5
GPIO0E/PWM2 20
RST#
3
GPIO04
8
TEST_EN# 13
GPIO0C/PWM0 18
GPIO0F/PWM3 21
GPIO10/ESB_RUN# 22
GPIO11/BaseAddOpt 23
VCC 24
GND
25
DE306 RB751V40_SC76-2
1 2
RE321
0_0402_5%
@
1 2
RE341
2.2K_0402_1%
1 2
DE7 RB751V40_SC76-2
1 2
RE76 10K_0402_5%~D@
1 2
RE36 10K_0402_5%~D
1 2
G
D
S
QE1
2N7002_SOT23-3
2
13
RE71
10K_0402_5%~D
12
RE13
33_0402_5%~D
@
12
RPE2
4.7K_8P4R_5%
1 8
2 7
3 6
4 5
RE9
100K_0402_5%~D
12
RE56 0_0402_5%~D@
1 2
CE18
20P_0402_50V8J~D
EMC@
1
2
RE11 47K_0402_5%~D
1 2
LE2 FBMA-L11-160808-800LMT_0603
1 2
CE4
0.1U_0402_16V7K~D
1
2
DE13 RB751V40_SC76-2
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
20mil
20mil
PWM FAN
INT_KBD CONN
Touch pad
Keyboard back light
Power on Button
PT
PT
PT
ST
ST
KB_BL_PWM
KB_BL_DET
KSI7
KSI6
KSI4
KSI2
KSI5
KSI1
KSI3
KSI0
KSO5
KB_CAPS_LED
KSO4
KSO7
KSO6
KSO8
KSO3
KSO1
KSO2
KSO0
KSO12
KSO16
KSO15
KSO13
KSO14
KSO9
KSO11
KSO10
KB_DET#
KSI3
KSO8
KSI2
KSO9
KSO14
KSO15
KSO13
KSO12
KSI0
KSO10
KSI1
KSO11
KSI6
KSI7
KSI5
KSO0
KSO5
KSO7
KSO4
KSO6
KSO3
KSI4
KSO2
KSO1
KB_DET#KSO16
TP_CLK_R
TP_DATA_R
KSO[0..16]
KSI[0..7]
KB_CAPS_LED
TP_CLK_R
TP_DATA_R
KB_BL_DET[20]
KB_LED_PWM[38]
KB_DET#[17]
TP_CLK[38]
TP_DATA[38]
KSO[0..16][38]
KSI[0..7][38]
CAPS_LED#[38]
PCH_SMBDATA[14,15,17,43,6]
PCH_SMBCLK[14,15,17,43,6]
SYSTEM_FAN_FB[38]
SYSTEM_FAN_PWM[38]
PBTN_SW# [38]
PWRBTN_LED#[38]
+5VS +5VS_KBL +5VS_KBL
+5VS
+VSBP
+3VALW
+3VS
+3VS +5VS +5VS
+5VS
+5VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
SW/TP/SCREW
Custom
39 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
SW/TP/SCREW
Custom
39 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
SW/TP/SCREW
Custom
39 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
CE32 100P_0402_50V8J~D@1 2
RE52
100K_0402_5%~D
12
CE37 100P_0402_50V8J~D@1 2
C15
10P_0402_50V8J~D
EMC@
12
RE53
10K_0402_5%~D
12
CE46 100P_0402_50V8J~D@1 2
CE30 100P_0402_50V8J~D@1 2
CE41 100P_0402_50V8J~D@1 2
R30 47K_0402_5%~D
1 2
C16
10P_0402_50V8J~D
EMC@
12
CE39 100P_0402_50V8J~D@1 2
R31
100K_0402_5%~D
12
CE28 100P_0402_50V8J~D@1 2
DE6
PESD5V0U2BT_SOT23-3~D
@
2
3
1
CE33 100P_0402_50V8J~D@1 2
C13
10P_0402_50V8J~D
EMC@
12
RE84 470_0402_5%~D
1 2
CE57
2.2U_0603_6.3V6K~D
1
2
SW1
TML-3WWW-Q-T-R_6P
5
3
1
6
4
2
R66 3.3K_0402_1%
1 2
CE49 100P_0402_50V8J~D@1 2
CE44 100P_0402_50V8J~D@1 2
CE43 100P_0402_50V8J~D@1 2
CE50 100P_0402_50V8J~D@1 2
JKBL
A150420-SAHR22
CONN@
1
12
23
3G1 5
G2 6
4
4
CE34 100P_0402_50V8J~D@1 2
CE29 100P_0402_50V8J~D@1 2
C14
10P_0402_50V8J~D
EMC@
12
JKB
ACES_50692-03041-001
CONN@
GND 31
GND 32
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
DE5
PESD5V0U2BT_SOT23-3~D
@
2
3
1
CE35 100P_0402_50V8J~D@1 2
QZ24A
2N7002DW-7-F_SOT363-6
61
2
CE31 100P_0402_50V8J~D@1 2
G
D
S
QZ20
2N7002_SOT23-3
2
13
CE52 100P_0402_50V8J~D@1 2
DE4 CH751H-40PT_SOD323-2~D
2 1
CE51 100P_0402_50V8J~D@1 2
G
D
S
Q11
SSM3K7002FU_SC70-3~D
2
13
CE27
0.01U_0402_16V7K~D
1
2
CE53 100P_0402_50V8J~D@1 2
CE48 100P_0402_50V8J~D@1 2
R67 3.3K_0402_1%
1 2
CE47 100P_0402_50V8J~D@1 2
C11
1U_0603_10V6K~D
1
2
JTP
ACES_50506-00841-P01
CONN@
1
1
2
2
3
3
GND1
9
GND2
10
4
4
5
5
6
6
7
7
8
8
C12
10U_0603_6.3V6M~D
1
2
CE38 100P_0402_50V8J~D@1 2
CE36 100P_0402_50V8J~D@1 2
RE51
100K_0402_5%~D
12
DE2
PESD24VS2UT_SOT23-3~D
@
2
3
1
L1 BLM18AG601SN1D_0603~DEMC@ 1 2
CE45 100P_0402_50V8J~D@1 2
QZ24B
2N7002DW-7-F_SOT363-6
3
5
4
JFAN1
ACES_50224-00401-001
CONN@
1
1
2
2
3
3
4
4
G1
5
G2
6
CE42 100P_0402_50V8J~D@1 2
CE40 100P_0402_50V8J~D@1 2
L2 BLM18AG601SN1D_0603~DEMC@ 1 2
F1
0.5A_13.2V_NANOSMDC050F-13.2-2
2 1
CE58
0.1U_0402_25V6K~D
@
1
2
RE54
100K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Screw Hole
ATMEL TPM M/B to D/B conn.
Lid Switch
CPU x 4
Wedcam PWR CTRL
close JB1 33pin
PCB x 9
GPU x 2
PT
PT
PT
ST
ST
QT
QT
QT
QT
PCH x 2
CLK_PCI_TPM
PLT_RST#
LPC_LFRAME#
PP
CLK_PCI_TPM
LID_SW_IN#
PLT_RST#
DMIC_CLK_R
DMIC0_R
PLT_RST#
DMIC0_R
DMIC_CLK_R
+RTCBATT
LPC_AD0[17,38,42]
LPC_AD1[17,38,42]
LPC_AD2[17,38,42]
LPC_AD3[17,38,42]
CLK_PCI_TPM[17]
LPC_FRAME#[17,38,42]
PLT_RST#[18,38,42,6,8]
SERIRQ[17,38]
PM_CLKRUN#[18]
LID_SW_IN# [35,38]
DMIC_CLK[47]
DMIC0[47]
USB3_CTL1 [38]
USB3_PWR_EN_EC [38]
USB3_DET_EC# [38]
CDCLK_REQ# [17]
PCH_SMLDATA [17,25,35,38]
PCH_SMLCLK [17,25,35,38]
SYSTEM_FAN2_PWM [38]
SYSTEM_FAN2_FB [38]
SUSCLK_R [18,38]
WL_OFF# [18]
MINI3CLK_REQ# [17]
EC_WLAN_WAKE# [38]
BT_RADIO_DIS# [20]
EN_WLANPWR# [38]
USB_D_PD# [38,45]
PM_SLP_S3# [18,34,38,43,55,56]
USB2_DET_EC# [38]
USB2_PWR_EN_EC [38]
USB2_CTL1 [38]
USB_OC1# [19]
USB_ILIM_SEL [38,44]
PCIE_PTX_CARDRX_P4[19]
PCIE_PTX_CARDRX_N4[19]
PCIE_PTX_WLANRX_N3[19]
PCIE_PTX_WLANRX_P3[19]
USB3TN4[19]
USB3TP4[19]
USB3RN4[19]
USB3RP4[19]
USB3RN3[19]
USB3RP3[19]
PCIE_PRX_WLANTX_N3[19]
PCIE_PRX_WLANTX_P3[19]
USB20_N12[19]
USB20_P12[19]
USB20_N2[19]
USB20_P2[19]
USB20_N3[19]
USB20_P3[19]
PCIE_PRX_CARDTX_P4[19]
PCIE_PRX_CARDTX_N4[19]
CLK_PCIE_CD[17]
CLK_PCIE_CD#[17]
USB20_P4[19]
USB20_N4[19]
USB3TN3[19]
USB3TP3[19]
CLK_PCIE_MINI3[17]
CLK_PCIE_MINI3#[17]
CCD_INT# [38]
+3VS
+3VS
+3VS
+3VS
+5VS
+3VALW +3VALW
+3VS
+5VALW
+3VALW
+RTCBATT
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
40 62Thursday, September 05, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
CONN & LID
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
40 62Thursday, September 05, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
CONN & LID
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
40 62Thursday, September 05, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
CONN & LID
R28
47K_0402_5%~D
@
12
H2
H_2P3
@
1
R72 10K_0402_5%~DTPM@
1 2
H29
CLIP_C5
@
1
H7
EMIST_SUL-12A2M_1P
@
1
C1
0.1U_0402_25V6K~D
TPM@
1
2
CM33
0.1U_0402_16V4Z~D
1
2
H26
EMIST_SUL-12A2M_1P
@
1
CV754
10P_0402_50V8J~D
@
12
C4
2200P_0402_50V7K~D
TPM@
1
2
H14
EMIST_SUL-12A2M_1P
@
1
C17
0.1U_0402_16V7K~D
1
2
H17
EMIST_SUL-12A2M_1P
@
1
H9
H_2P3
@
1
RV424 0_0402_5%~DEMC@
1 2
H19
EMIST_SUL-12A2M_1P
@
1
H3
H_3P9
@
1
H4
H_3P7
@
1
H10
H_2P1X2P5
@
1
H27
EMIST_SUL-12A2M_1P
@
1
FD4
FIDUCIAL@
1
C6
0.1U_0402_25V6K~D
TPM@
1
2
H11
H_2P3
@
1
H5
H_4P1X3P7
@
1
C18
10P_0402_50V8J~D
1
2
H20
EMIST_SUL-12A2M_1P
@
1
CM22
1000P_0402_50V7K~D
@
1
2
C8
27P_0402_50V8J~D
@
1
2
C2
4700P_0402_25V7K~D
TPM@
1
2
H15
H_3P3
@
1
H21
EMIST_SUL-12A2M_1P
@
1
FD2
FIDUCIAL@
1
R2
33_0402_5%~D
@
12
FD3
FIDUCAL@
1
H12
H_2P5
@
1
H16
H_2P5
@
1
JTB1
HRS_DF40HC(3P0)-90DS-0P4V(51)
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
54 54
56 56
58 58
60 60
62 62
64 64
66 66
68 68
70 70
72 72
74 74
76 76
78 78
80 80
82 82
84 84
86 86
88 88
90 90
CM32
4.7U_0603_6.3V6K~D
1
2
C5
2200P_0402_50V7K~D
TPM@
1
2
H23
EMIST_SUL-12A2M_1P
@
1
U1
AT97SC3204-X2A1D-AB_TSSOP28TPM@
LAD3
17 LAD2
20 LAD1
23 LAD0
26
LCLK
21
LFRAME#
22
LRESET#
16
SERIRQ
27
CLKRUN#
15
NC_7 7
ATEST_1
1
ATEST_2
2
GPIO6 6
TESTI 8
TESTBI 9
VCC_0 10
VCC_1 19
VCC_2 24
GND_4 4
GND_11 11
GND_18 18
GND_25 25
ATEST_3
3
SB3V
5
V_BAT 12
NBO_13 13
NBO_14 14
LPCPD#
28
H6
H_3P9
@
1
CM30
0.01U_0402_25V7K
1
2
U5
APX9131AAI-TRG_SOT23-3
GND
1
VDD
2VOUT 3
FD1
FIDUCAL@
1
H8
H_3P3
@
1
H18
H_2P1
@
1
H24
EMIST_SUL-12A2M_1P
@
1
C3
2200P_0402_50V7K~D
TPM@
1
2
CM31
0.047U_0402_16V4Z~D
1
2
RV417 68_0402_1%~DEMC@
1 2
R1 4.7K_0402_5%~D@
1 2
CV753
10P_0402_50V8J~D
@
12
H25
EMIST_SUL-12A2M_1P
@
1
H13
H_2P5
@
1
H28
CLIP_C5
@
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Thermal sensor
Close JDIMM1 Close JDIMM2
SKIN_TEMP1[38]
FAN_TEMP1[38]
MEM_TEMP1[38]MEM_TEMP0[38]
SKIN_TEMP0[38]FAN_TEMP0[38]
+3V_Thermal
+3V_Thermal +3V_Thermal
+3V_Thermal
+3V_Thermal
+5VS
+5VS
+3V_Thermal+3V_Thermal
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Thermal Sensor EMC1412
Custom
41 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Thermal Sensor EMC1412
Custom
41 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
Thermal Sensor EMC1412
Custom
41 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
HT4
100K_0402_1%_TSM0B104F4251RZ~D
12
RT3
16.9K_0402_1%
1 2
HT3
100K_0402_1%_TSM0B104F4251RZ~D
12
HT1
100K_0402_1%_TSM0B104F4251RZ~D
12
RT6
16.9K_0402_1%
1 2
RT5
16.9K_0402_1%
1 2
RT2
16.9K_0402_1%
1 2
U4
NCT3705U-33_SOT23-5
IN
1
GND
2
SHDN
3
OUT 5
SET 4
HT5
100K_0402_1%_TSM0B104F4251RZ~D
12
CT21
0.01U_0402_16V7K~D
1
2
HT2
100K_0402_1%_TSM0B104F4251RZ~D
12
RT1
16.9K_0402_1%
1 2
CT44
1U_0402_6.3V6K
1
2
CT22
4.7U_0603_6.3V6K~D
1
2
HT6
100K_0402_1%_TSM0B104F4251RZ~D
12
RT4
16.9K_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
WLAN / BT4.0 PCIE Mini Card
mSATA SSD
SATA_PTX_DRX_P1_C
SATA_PTX_DRX_N1_C
SATA_PRX_DTX_P1
SATA_PRX_DTX_N1
LPC_AD1
LPC_AD0
LPC_LFRAME#
LPC_AD3
LPC_AD2
CLK_PCI_DEBUG
EC_TX
SATA_PTX_DRX_P1_C[16]
SATA_PTX_DRX_N1_C[16]
SATA_PRX_DTX_P1[16]
SATA_PRX_DTX_N1[16]
LPC_FRAME# [17,38,40]
LPC_AD1 [17,38,40]
LPC_AD3 [17,38,40]
LPC_AD0 [17,38,40]
LPC_AD2 [17,38,40]
CLK_PCI_DEBUG[17]
PLT_RST#[18,38,40,6,8]
EC_TX[38]
EC_RX[38]
+3V_mSATA+3V_mSATA
+3V_mSATA+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
WLAN/WWAN/SIM/BT
Custom
42 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
WLAN/WWAN/SIM/BT
Custom
42 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
WLAN/WWAN/SIM/BT
Custom
42 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
CM13
0.1U_0402_25V6K~D
1
2
JSSD
ACES_50711-0520W-001
CONN@
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
33
33 34 34
35
35 36 36
37
37 38 38
39
39 40 40
41
41 42 42
43
43 44 44
45
45 46 46
47
47 48 48
49
49 50 50
51
51 52 52
GND1
53 GND2 54
JP12
JUMP_43X39
@
11
2
2
CM14
4.7U_0805_10V6
1
2
RM12 100K_0402_5%~D
1 2
CM12
0.047U_0402_16V7K
1
2
CM11
0.01U_0402_25V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDD CONN
Place near HDD CONN (JHDD1)
HDD power control for AOAC
Free Fall Sensor
SATA III Re-driver for HDD
1300mA
ST
ST
ST
ST
ST
SATA_PRX_DTX_P0_RC1
SATA_PRX_DTX_N0_RC1
FFS_INT2_Q
SATA_PTX_DRX_P0_RC1
SATA_PTX_DRX_N0_RC1
HDD_DETECT#
FFS_INT2_Q
FFS_INT2
FFS_INT1
FFS_INT2
PCH_SMBDATA
PCH_SMBCLK
FFS_INT1
SATA_PTX_DRX_P0_RC1
SATA_PTX_DRX_N0_RC SATA_PTX_DRX_N0_RC1
SATA_PTX_DRX_P0_RC
SATA_PTX_DRX_N0_C
SATA_PTX_DRX_P0_C
DEW2
REXT_SATA
SATA_APRE1
SATA_TEST
SATA_BPRE1
SATA_APRE0
SATA_BPRE0
SATA_PRX_DTX_P0_C
SATA_PRX_DTX_N0_C
SATA_PRX_DTX_P0_RC
SATA_PRX_DTX_N0_RC
PM_SLP_S3#
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0 SATA_PTX_DRX_P0_C
SATA_PTX_DRX_N0_C
SATA_PRX_DTX_N0 SATA_PRX_DTX_N0_C
SATA_PRX_DTX_P0 SATA_PRX_DTX_P0_C
SATA_PRX_DTX_P0_RC1
SATA_PRX_DTX_N0_RC1
REXT_SATA
PM_SLP_S3#
+5VS_HDDAPL
SATA_TEST
SATA_APRE1
SATA_BPRE1 SATA_APRE0
SATA_BPRE0
DEW2
HDD_DETECT#[20]
FFS_INT1[18]
FFS_INT2[20]
PCH_SMBCLK[14,15,17,39,6] PCH_SMBDATA[14,15,17,39,6]
PM_SLP_S3#
[18,34,38,40,55,56]
SATA_PTX_DRX_P0[16]
SATA_PTX_DRX_N0[16]
SATA_PRX_DTX_N0[16]
SATA_PRX_DTX_P0[16]
+3VS
+5VS
+3VS
+3VS
+3VS
+3VS_RD
+3VS_RD
+3VS +5VS_HDD
+5VS_HDD
+3VS_RD+3VS
+3VS_RD
+3VS
+3VS_RD
+3VS_RD
+5VS_HDD
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
DC/DC INTERFACE
Custom
43 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
DC/DC INTERFACE
Custom
43 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
DC/DC INTERFACE
Custom
43 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
RN21 0_0402_5%~D@
1 2
RN14 0_0402_5%~DHDDP@
1 2
CN29
0.1U_0402_25V6K~D
1
2
RN40
4.99K_0402_1%~D
@
12
UN1
PI3EQX6741STZDEX TQFN 20P _4X4
HDDP@
A_INp
1
A_INn
2
REXT 20
A_PRE1
19
B_OUTp
5
VDD 6
B_PRE0 8
A_PRE0 9
NC 10
TEST
18
GND
13 B_INp 11
B_INn 12
B_PRE1
17
A_OUTn 14
A_OUTp 15
VDD 16
GND
3
B_OUTn
4
EPAD
21
EN
7
RN30
100K_0402_5%~D
12
CN2
0.1U_0402_25V6K~D
1
2
RN15 0_0402_5%~D@
1 2
RN12 0_0402_5%~D@
1 2
RN16
0_0402_5%~D
1 2
JP15
JUMP_43X118
@
11
2
2
RN26
100K_0402_5%~D
12
RN13 0_0402_5%~DHDDT@
1 2
CN4
1000P_0402_50V7K~D
1
2
JP13
PAD-OPEN1x1m
@
1 2
RN42 0_0402_5%~D@
1 2
CN12 0.01U_0402_16V7K~D
1 2
UN1
SN75LVCP601
HDDT@
RN10 0_0402_5%~D@
1 2
CN10 0.01U_0402_16V7K~D
1 2
RN11 0_0402_5%~D@
1 2
LNG3DM
UN2
LNG3DMTR_LGA16_3X3~D
VDD_IO
1
NC 2
NC 3
SCL/SPC
4
GND 5
VDD
14
CS
8
INT 1
11
INT 2
9
RES 10
GND 12
SDO/SA0
7
SDA / SDI / SDO
6
RES 13
RES 16
RES 15
CN13 0.01U_0402_16V7K~D
1 2
CN9 0.01U_0402_16V7K~D
1 2
RN3 0_0402_5%~D@
1 2
CN18 0.01U_0402_16V7K~D
1 2
CN8 0.01U_0402_16V7K~D
1 2
CN14
10U_0603_6.3V6M~D
1
2
RN18
0_0402_5%~D
@
1 2
CN11 0.01U_0402_16V7K~D
1 2
CN19 0.01U_0402_16V7K~D
1 2
CN34
1U_0603_10V6K~D
1
2
RN6 0_0402_5%~DHDDP@
1 2
RN4 0_0402_5%~D@
1 2
UN3
G5243AT11U_SOT23-5
VIN
5
SS
4
VOUT 1
EN 3
GND 2
RN19
0_0402_5%~D
@
1 2
RN33 100K_0402_5%~D
1 2
RN20 0_0402_5%~D@
1 2
CN15
0.1U_0402_25V6K~D
1
2
QN2B
DMN66D0LDW-7_SOT363-6~D
3
5
4
RN23
100K_0402_5%~D
12
CN6
1U_0402_6.3V6K~D
1
2
CN3
0.1U_0402_16V7K~D
1
2
CN5
0.1U_0402_16V7K~D
1
2
CN28
0.01U_0402_16V7K~D
1
2
JHDD
J-L_UCNR2234B020-0
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
GND
21
GND
22
GND
23
GND
24
QN2A
DMN66D0LDW-7_SOT363-6~D
61
2
CN1
0.01U_0402_16V7K~D
1
2
RN17
0_0402_5%~D
1 2
CN7
10U_0805_10V6M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB Powershare
2.1A
2.1A
USBP0_D-
USBP0_D+
USB0_PWR_EN_EC
PWRSHARE_OE#1USB_OC0#
ILIM_HI1
ILIM_LO1
CTL2/3_1
USB0_CTL1
CTL2/3_1
ILIM_HI3USB1_PWR_EN_EC
USBP1_D-
USBP1_D+
CTL2/3_3
ILIM_LO3
USB_OC0# PWRSHARE_OE#3
CTL2/3_3
PWRSHARE_OE#1
PWRSHARE_OE#3
USB0_PWR_EN_EC
USB1_PWR_EN_EC
USB1_CTL1
USB_ILIM_SEL
USB_ILIM_SEL
USB20_N0[19]
USB20_P0[19]
USB0_PWR_EN_EC[38]
USB_OC0#[19]
USBP0_D- [45]
USBP0_D+ [45]
USBP1_D- [45]
USBP1_D+ [45]
USB20_N1[19]
USB20_P1[19]
USB0_CTL1[38]
USB1_PWR_EN_EC[38]
USB1_CTL1[38]
USB_ILIM_SEL[38,40]
+5VALW +5V_CHGUSB_1+5VALW
+5V_CHGUSB_3+5VALW +5VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
44 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
USB Powershare
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
44 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
USB Powershare
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
44 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
USB Powershare
RI30 10K_0402_5%~D
1 2
RE68 100K_0402_5%~D
1 2
R51 22.1K_0402_1%
1 2
RE62 100K_0402_5%~D
1 2
RI32 10K_0402_5%~D
1 2
RE63 100K_0402_5%~D
1 2
RI19 10K_0402_5%~D
1 2
US1
TPS2546RTER_QFN16_3X3
IN
1
DM_OUT
2
DP_OUT
3
ILIM_SEL
4
EN
5
CTL1
6
CTL2
7
CTL3
8
STATUS# 9
DP_IN 10
DM_IN 11
OUT 12
FAULT#
13
GND 14
ILIM_LO 15
ILIM_HI 16
GPAD 17
US2
TPS2546RTER_QFN16_3X3
IN
1
DM_OUT
2
DP_OUT
3
ILIM_SEL
4
EN
5
CTL1
6
CTL2
7
CTL3
8
STATUS# 9
DP_IN 10
DM_IN 11
OUT 12
FAULT#
13
GND 14
ILIM_LO 15
ILIM_HI 16
GPAD 17
RI17 10K_0402_5%~D
1 2
CI24
0.1U_0402_25V6K~D
1
2
R47 48.7K_0402_1%
1 2
R48 22.1K_0402_1%
1 2
R52 48.7K_0402_1%
1 2
RE65 100K_0402_5%~D
1 2
CI26
0.1U_0402_25V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Place close to JUSB3
Place close to JUSB1
USB3.0 / USB2.0 Port1
USB3.0 / USB2.0 Port3
LFPS swing adjust.
3.3V tolerant. Internally pulled down at ~150K.
TST ==
L: Normal LFPS swing (default)
H: Tune down LFPS swing
Programmable output de-emphasis level setting for channel A1&A2/B1&B2
3.3V tolerant. Internally pulled down at ~150K
[DE1, DE0] ==
LL: 3.5dB de-emphasis (default)
LH: No de-emphasis
HL: 2.7dB de-emphasis
HH: 5.0dB de-emphasis
Equalizer control and program for channel A1&A2/B1&B2
3.3V tolerant. Internally pulled down at ~150K
[EQ1, EQ0] ==
LL: equalization for channel loss up to 9.5dB (default)
LH: equalization for channel loss up to 13 dB
HL: equalization for channel loss up to 4.5dB
HH: equalization for channel loss up to 7.5dB
USB3.0 Re-driver
ST
ST
ST
ST
ST
USBP1_D+
USBP1_D- USBP1_R_D-
USBP1_R_D+
USB3RP2_D+USB3RP2_8723
USB3RN2_D-USB3RN2_8723
USB3T_P2
USB3T_N2 USB3TN2_D-
USB3TP2_D+
USBP1_R_D+
USBP1_R_D-
USB3RN2_D-
USB3RP2_D+
USB3TP2_D+
USB3TN2_D-
USB3RN2_D-
USB3TP2_D+
USB3RP2_D+
USB3TN2_D-
USB3RN2_D-
USB3TN2_D-
USB3RP2_D+
USB3TP2_D+
USB1_DET_EC#
USB3T_P1
USB3T_N1 USB3TN1_D-
USB3TP1_D+
USB3RP1_D+USB3RP1_8723
USB3RN1_D-USB3RN1_8723
USBP0_D+
USBP0_D- USBP0_R_D-
USBP0_R_D+
USB0_DET_EC#
USB3RP1_D+
USB3TN1_D-
USBP0_R_D-
USB3RN1_D-
USB3TP1_D+
USBP0_R_D+USB3RP1_D+USB3RP1_D+
USB3TP1_D+
USB3RN1_D-
USB3TN1_D-
USB3TP1_D+
USB3RN1_D-
USB3TN1_D-
USB3RN1_C
USB3RP1_C
USB3TN1_C
USB3TP1_C
USB3RN2_C
USB3RP2_C
USB3TN2_C
USB3TP2_C
USB3TN1_8723
USB3TP1_8723
USB3TN2_8723
USB3TP2_8723
A_EQ0
A_EQ1
A_DE0
A_DE1
B_EQ0
B_EQ1
B_DE0
B_DE1
USB3TP1
USB3TN1
USB3RP1
USB3RN1
USB3TP2
USB3TN2
USB3RP2
USB3RN2
USB3RN2_8723
USB3RP2_8723
USB3RN1_8723
USB3RP1_8723
USB3TN1_8723
USB3TP1_8723
USB3TN2_8723
USB3TP2_8723
A_EQ0
A_EQ1
A_DE0
A_DE1
B_EQ0
B_EQ1
B_DE0
B_DE1
USB8723_test
USB8723_test
I2C_EN8723
I2C_EN8723
USBP1_D-[44]
USBP1_D+[44]
USBP0_D-[44]
USBP0_D+[44]
USB0_DET_EC#[38]
USB1_DET_EC#[38]
USB3TN1[19]
USB3TP1[19]
USB3RP1[19]
USB3RN1[19]
USB3TN2[19]
USB3TP2[19]
USB3RP2[19]
USB3RN2[19]
USB_D_PD#[38,40]
+5V_CHGUSB_3
+5V_CHGUSB_1
+3V_PS8723
+3VALW
+3V_PS8723
+3V_PS8723 +3V_PS8723
+3V_PS8723
+3V_PS8723
+3V_PS8723
+3V_PS8723
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
45 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
USB conn.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
45 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
USB conn.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9941P
0.1
45 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
USB conn.
RI74 0_0805_5%@1 2
CI8 0.1U_0402_10V7K~D
1 2
RI468 4.7K_0402_5%~D@1 2
RI466 4.7K_0402_5%~D@1 2
RI320 4.99K_0402_1%~D
1 2
RI6 0_0402_5%~D
1 2
CI17 0.1U_0402_10V7K~D
1 2
RI464 4.7K_0402_5%~D@1 2
RI465 0_0402_5%~DUSBN@ 1 2
10U_0805_10V6K~D
CI23
1
2
CI50
0.1U_0402_10V7K~D
1
2
RI467 4.7K_0402_5%~D@1 2
JUSB3
TAIWI_USB019-107CRL-TWD
CONN@
SSTX-
8
SSTX+
9
GND 11
GND 12
VBUS
1
D+
3
D-
2
GND
4
SSRX-
5
SSRX+
6
GND
7
GND 14
GND 13
Plug_DET
10
LI2
DLW21SN900HQ2L_0805_4P~D
EMC@
1
122
33
4
4
CI3 0.1U_0402_10V7K~D
1 2
CI11 0.1U_0402_10V7K~D
1 2
JUSB1
TAIWI_USB019-107CRL-TWD
CONN@
SSTX-
8
SSTX+
9
GND 11
GND 12
VBUS
1
D+
3
D-
2
GND
4
SSRX-
5
SSRX+
6
GND
7
GND 14
GND 13
Plug_DET
10
UI5
PS8723BTQFN32GTR-A0_TQFN32_3X6
USBP@
A1_OUTn
1
A1_OUTp
2
GND
3
B1_INn
4
B1_INp
5
PD#
12
B_EQ0/SDA_CTL
13
B_EQ1/SCL_CTL
14
B_DE0
15
B_DE1
16
A_EQ0 32
A_EQ1 31
REXT 30
A_DE0 29
A_DE1 28
A1_INn 27
A1_INp 26
VDD 25
B1_OUTn 24
I2C_EN
6
B1_OUTp 23
A2_OUTn
7
A2_OUTp
8
VDD
9
B2_INn
10
B2_INp
11 TEST 22
A2_INn 21
A2_INp 20
GND 19
B2_OUTn 18
B2_OUTp 17
EPAD 33
CI5 0.1U_0402_10V7K~D
1 2
10U_0805_10V6K~D
CI19
1
2
CI12 0.1U_0402_10V7K~D
1 2
RI461 0_0402_5%~DUSBN@ 1 2
LI1
DLW21SN900HQ2L_0805_4P~D
EMC@
1
122
33
4
4
CI2
0.1U_0402_25V6K~D
1
2
CI6 0.1U_0402_10V7K~D
1 2
CI4 0.1U_0402_10V7K~D
1 2
RI460 0_0402_5%~DUSBN@ 1 2
RI462 4.7K_0402_5%~D@1 2
LI8
DLW21SN900HQ2L_0805_4P~D
EMC@
1
122
33
4
4
8
7
65
4
3
2
1
9
10
DI6
AZ1045-04F_DFN2510P10E-10-9
EMC@
4
5
1
6
2
7
3
9
8
8
7
65
4
3
2
1
9
10
DI1
AZ1045-04F_DFN2510P10E-10-9
EMC@
4
5
1
6
2
7
3
9
8
LI7
DLW21SN900HQ2L_0805_4P~D
EMC@
1
122
33
4
4
RI463 4.7K_0402_5%~D@1 2
CI13 0.1U_0402_10V7K~D
1 2
CI9
47U_1206_6.3V6M~D
1
2
CI27
0.01U_0402_16V7K~D
1
2
CI16 0.1U_0402_10V7K~D
1 2
CI15
0.1U_0402_25V6K~D
1
2
DI5
AZC199-02SPR7G_SOT23-3
EMC@
22
33
1
1
CI20 0.1U_0402_10V7K~D
1 2
DI2
AZC199-02SPR7G_SOT23-3
EMC@
22
33
1
1
CI7 0.1U_0402_10V7K~D
1 2
UI5
PTN36242LBS HVQFN
USBN@
LI9
DLW21SN900HQ2L_0805_4P~D
EMC@
1
122
33
4
4
LI3
DLW21SN900HQ2L_0805_4P~D
EMC@
1
122
33
4
4
CI1
47U_1206_6.3V6M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
30mil 30mil
Close to Pin 13
CA40/CA43 close pin1
CA41/CA44 close pin25
CA42/CA45 close pin37
Close to Pin 40
HD Audio DSP
30mil 30mil
Close pin14 Close pin16 Close pin42
When not support DSP, RA13 change to 0ohm
When support DSP, RA13 change to 33ohm
30mil
When DSP_ON/OFF is high,trun on DSP.
When DSP_ON/OFF is low,trun off DSP.
Recommend : DSP set power up/down state when HD-A should be in D3Cold.
GND_DSP and GND moat 20mil
Green Clock
When not support DSP, need POP
PT
PT
+2.5V_5505LDO_S
+1.2V_5505SWR_S
DDR_VREF_IN
+1.2V_5505SWR
HDA_BITCLK_5505
HDA_BITCLK_5505
HDA_BITCLK_AUDIO
XTAL_5505_IN
+2.5V_5505LDO_S
+1.2V_5505SWR
HDA_SYNC_AUDIO
HDA_SDIN_5505
HDA_SYNC_5505
HDA_RST_5505
XTAL_5505_OUT
HDA_SDIN0_C
HDA_RST_AUDIO#
HDA_SDOUT_5505HDA_SDOUT_AUDIO
+1.2V_5505SWR_S
DSP_PD#
DDR_VREF_IN
+1.2V_5505SWR
HDA_SYNC_AUDIO HDA_BITCLK_AUDIO
HDA_SDOUT_AUDIO
XTAL_5505_IN
XTAL_5505_OUT
DSP_PD#
HDA_BITCLK_AUDIO
HDA_SYNC_AUDIO
HDA_SDIN0_C
HDA_RST_AUDIO#
HDA_SDOUT_AUDIO
HDA_BITCLK_5505
HDA_SDIN_5505
HDA_SYNC_5505
HDA_RST_5505
HDA_SDOUT_5505
HDA_BITCLK_5505_R
HDA_SDOUT_5505_R
HDA_SDIN_5505_R
HDA_SYNC_5505_R
HDA_RST_5505_R
HDA_BITCLK_AUDIO[16]
HDA_BITCLK_5505 [47]
HDA_SYNC_AUDIO[16]
HDA_SDOUT_5505 [47]
HDA_SDIN_5505 [47]HDA_SDIN0[16]
HDA_RST_AUDIO#[16,47]
HDA_SYNC_5505 [47]
HDA_SDOUT_AUDIO[16]
HDA_RST_5505 [47]
DSP_PD#[38]
GND_DSP
+3VS +3VS+3VS
+3VS
GND_DSP
GND_DSP GND_DSP
+3VS
GND_DSP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
RTC Counter/Green Clock
Custom
46 62Wednesday, September 04, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
RTC Counter/Green Clock
Custom
46 62Wednesday, September 04, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
RTC Counter/Green Clock
Custom
46 62Wednesday, September 04, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
10U_0805_10V6K~DCA90DSP@
1 2
RA64 0_0402_5%~DNDSP@
1 2
RA62
20K_0402_1%~D
DSP@
1 2
RA91
10K_0402_5%~D
DSP@
12
RA65 0_0402_5%~DNDSP@
1 2
CA92
0.1U_0402_16V7K~D
DSP@
1
2
CA78
4.7U_0603_6.3V6K~D
DSP@
1
2
RA66 0_0402_5%~DNDSP@
1 2
CA79
0.1U_0402_16V7K~D
DSP@
1
2
YA2
24MHZ_12PF_X3G024000DC1H
DSP@
1
2
3
4
RA67 0_0402_5%~DNDSP@
1 2
CA80
0.1U_0402_16V7K~D
DSP@
1
2
CA91
22P_0402_50V8J~D
@
1
2
RA68 0_0402_5%~DNDSP@
1 2
CA81
0.1U_0402_16V7K~D
DSP@
1
2
CA63
0.1U_0402_16V7K~D
DSP@
1
2
RA81 33_0402_5%~DDSP@
1 2
CA93
10P_0402_50V8J~D
DSP@
12
RA75 10K_0402_5%~DDSP@
1 2
LA3 4.7UH_NRH3010T4R7MN_20%DSP@
1 2
CA64
4.7U_0603_6.3V6K~D
DSP@
1
2
RA89
0_0402_5%~D
@
12
RA56 0_0402_5%~DNDSP@
1 2
CA82
4.7U_0603_6.3V6K~D
DSP@
1
2
ALC5505
U12
ALC5505_QFN48_7X7~D
DSP@
VDIMC-CLK1
47
VDMIC-DAT1
48
DVDD-12-I
1
XTAL-IN
2
XTAL-OUT
3
VGPIO3/VOL-DN/TDI 4
SDTA-OUT/I2SSDO0-2
5BITCLK/I2SCLKI-2
6
VGPIO0/TRST# 7
SDATA-IN/I2SSDI0-2
8
DVDD-IO
9
SYNC/I2SLRCLKI-2
10
VGPIO5/VOL-MUTE/TDO 22
DVDD-12-SWR
13
DVDD-33-SWR 14
FB-SWR
15
DVDD-33-SWR-C 16
VGPIO2/TMS 28
I2SCLKO 29
I2SCLRCKO 30
I2SSDO0 31
MCLKO 32
CS-L 33
SCK 34
SI 35
SO 36
DVDD-12-I
37
I2SCLKI 38
I2SLRCKI 39
DDR-VERF
40 I2SSDI0 41
DVDD-33-LDO-I 42
DVDD-25-LDO-O
43
DVSS
44
VDMIC-CLK2/I2SSDI1
45
VDMIC-DAT2/I2SSDI2
46
RESETB
11
DVSS-SWR
12
DVDD-12-I
25
I2C-MASTER-SDA/I2C-SLAVE-SDA 27
I2C-MASTER-SCL/I2C-SLAVE-SCL 26
VGPIO1/SDATA-IN-V/I2SSDI3 21
VGPIO4/VOL-UP/TCLK 20
SYNC-V/I2SSDO2 19
RESETB-V/I2SSDO3 18
DSP-PD# 17
BITCLK-V/MCLKI-2 23
SDATA-OUT-V/I2SSDO1 24
DGND
49
CA65
0.1U_0402_16V7K~D
DSP@
1
2
CA94
22P_0402_50V8J~D
@
1
2
RA57 0_0402_5%~DNDSP@
1 2
RA76
0_0402_5%~D
@
12
RA81
0_0402_5%~D
NDSP@
CA83
0.1U_0402_16V7K~D
DSP@
1
2
10U_0805_10V6K~D
CA66DSP@
1
2
RA90 0_0805_5%~DDSP@
1 2
RA58 0_0402_5%~DNDSP@
1 2
10U_0805_10V6K~D
CA88DSP@
1
2
CA84
4.7U_0603_6.3V6K~D
DSP@
1
2
10U_0805_10V6K~D
CA85DSP@
1
2
10U_0805_10V6K~D
CA67DSP@
1
2
CA95
10P_0402_50V8J~D
@
12
RA50 0_0402_5%~DNDSP@
1 2
10U_0805_10V6K~D
CA86DSP@
1
2
RA59
20K_0402_1%~D
DSP@
1 2
CA96
18P_0402_50V8J~D
DSP@
1
2
RA63 0_0402_5%~DNDSP@
1 2
CA89
0.1U_0402_16V7K~D
DSP@
1
2
CA87
0.1U_0402_16V7K~D
DSP@
1
2
CA77
0.1U_0402_16V7K~D
DSP@
1
2
CA97
18P_0402_50V8J~D
DSP@
1
2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
HDA_Audio Codec
HeadPhone / Mic. combo JACK
HeadPhone / Mic. combo JACK
For ESD
GND
Close to U2 pin33
Combo JACK
10mil
Close to Chip Side
Close to U2
Prevent S3/S4/S5 Noise Reserved Delay Circuit For De-pop noise
PT
PT
PT
PT
EC Beep
PCI Beep
PT
PT
PT
PT
PT
PT
PT
wait symbol and PN.
PT
ST
ST
ST
HP2_OUTR_R
HP2_OUTL_R
SLEEVE
RING2
HP2_OUTL
MIC2_VREF
MIC1_VREF
MIC2L_CMIC2L
MIC2R MIC2R_C
HP2_OUTR
DMIC_CLK_RA
DMIC0_RA
DMIC_CLK
DMIC0
HDA_SDIN_R
HDA_BITCLK_5505
HDA_SDOUT_5505
SENSE_B# JACK_PLUG#_DL_R
HDA_SYNC_5505
HDA_RST_5505
HDA_SDIN_5505
HDA_BITCLK_R
HDA_BITCLK_R
EAPD#
HP2_OUTR
HP2_OUTL
AUD_SPK_RC_L+_C
MONO_IN
AUD_SPK_RC_R+_C
LDO_OUT
DMIC0
DMIC_CLK
MIC2_VREF
MIC1_VREF
MIC2R
MIC2L
SLEEVE
RING2
SLEEVE
JACK_PLUG#
JACK_PLUG#_DL HP2_OUTL_R
HP2_OUTR_R
MUTE#
EAPD#
MUTE#
JACK_PLUG#
JACK_PLUG#_DL_R
JACK_PLUG#_DL
AUD_SPK_L+ [48]
AUD_SPK_R+ [48]
EAPD# [38]
DMIC_CLK [40]
DMIC0 [40]
HDA_SDIN_5505[46]
HDA_SDOUT_5505[46]
HDA_BITCLK_5505[46]
HDA_SYNC_5505[46]
HDA_RST_5505[46]
MUTE#[48]
HDA_RST_AUDIO#[16,46]
SPK_LC+ [48]
BEEP# [38]
HDA_SPKR [16]
+VDDA +5VS
AGND AGND
AGND
+MIC1_VREFO
AGND
+3VS
AGND
+3VS+3VS
AGND
AGND
+VDDA
AGND
AGND
AGND
AGND
AGND
+3VS
AGND
+MIC1_VREFO
AGND
+RTCVCC
AGND
+3VS
AGND
+3VS
AGND
+3VS
AGND
+3VS
AGND
AGND
+3VS
AGND
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
HD Audio ALC275/Audio Jack
Custom
47 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
HD Audio ALC275/Audio Jack
Custom
47 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
HD Audio ALC275/Audio Jack
Custom
47 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
QA4A
DMN66D0LDW-7_SOT363-6~D
@
61
2
CA14 10U_0805_10V6K
1 2
JP9
PAD-OPEN 43x39
@
12
RA17 8.2_0402_1%~D
1 2
CA17 1U_0402_6.3V6K@
1 2
CA6
0.1U_0402_16V7K~D
1
2
CA33 100P_0402_25V8K
@
1
2
LA5 BLM15GA750SN1D_2PEMC@
1 2
CA9
0.1U_0402_16V7K~D
1
2
RA18 8.2_0402_1%~D
1 2
CA8
4.7U_0603_6.3V6K~D
1
2
RA44
100K_0402_5%~D
@
12
CA34 100P_0402_25V8K
@
1
2
CA16 2.2U_0603_10V6K
1 2
LA6 BLM15GA750SN1D_2PEMC@
1 2
CA22
0.1U_0402_16V7K~D
@
1
2
RA101 0_0402_5%@
1 2
U15
ALC3661-CG_MQFN48_6X6~D
AVSS1
22
HVDD
23
CPVEE
20
MIC2-VREFO
1
VRP
38 VREF
41 LDO-CAP
40
FRONT-L 43
FRONT-R 44
LDO-IN
39
REGREF
10
AVSS2
42
CBP
24
DVDD-IO
7
CBN
21
JDREF
35 LFE 18
CEN 19
SURR-L 26
SURR-R 27
EAPD 14
LINE1-L 45
LINE2-IN-R/SLEEVE 32
LINE2-IN-L/RING2 31
MIC1-R 37
MIC1-L/MIC-CAP 36
MIC2-R 48
MIC2-L 47
LINE1-R 46
LINE2-VREFO
29 SENSE A 34
SENSE B 33
SPDIF-OUT 15
PCBEEP 2
RESETB
6SYNC
9
DVDD-IO-CP
25
SDATA-IN
8
DVDD
11
GPIO/DMIC-CLK 12
GPIO1/DMIC-DATA 13
CPVREF
28
BCLK
5SDATA-OUT
4
Thermal PAD
49
MIC1-VREFO
30
SPDIF-in 16
GPIO2/Combo-Jack1 17
GPIO3/Combo-Jack2 3
CA25 1U_0402_16V6K
1 2
CA39 22P 50V +-5% NPO 0402EMC@
1 2
RA43
100K_0402_5%~D
12
RA22 5.1K_0402_1%~D
1 2
CA19
0.1U_0402_16V7K~D
1
2
CA30 100P_0402_25V8K
12
RA4
10K_0402_1%~D
1 2
JHP2
SINGA_2SJ3080-000111F
CONN@
1
3
2
5
4
6
7
RA54
100K_0402_5%~D
@
12
CA28
0.1U_0402_16V7K~D
@
1
2
10U_0805_10V6K~D
CA5
1
2
CA38 100P_0402_25V8K
@
1
2
RA92 1K_0402_5%~D
1 2
RA70
100K_0402_5%~D
12
RA102 0_0402_5%~D@
1 2
10U_0805_10V6K~D
CA3
1
2
CA23
10P_0402_50V8J~D
EMC@
12
CA4
0.1U_0402_16V7K~D
1
2
CA21 10U_0805_10V6K
1 2
RA55 100K_0402_5%~D@
1 2
CA13
0.1U_0402_16V7K~D
1
2
RA94 1K_0402_5%~D
1 2
RA33
0_0402_5%
@
1 2
RA42
10K_0402_5%~D
@
1 2
RA5
4.7K_0402_5%~D
@
1 2
CA68 2.2U_0603_10V6K
1 2
CA15 1U_0402_6.3V6K
1 2
+
CA26 100U_B2_6.3VM_R35M
12
CA32
100P_0402_25V8K
@
1
2
RA11 1K_0402_5%~D
1 2
CA24 1U_0402_16V6K
1 2
RA98 0_0402_5%@
1 2
CA20 1U_0402_6.3V6K
1 2
RA19 2.2K_0402_5%~D
1 2
CA27
10P_0402_50V8J~D
EMC@
12
RA9 47K_0402_5%~D
1 2
CA29
0.1U_0402_16V7K~D
@
1
2
RA99 0_0402_5%~D@
1 2
RA2 10K_0402_1%~D@
1 2
CA69 2.2U_0603_10V6K
1 2
QA3A
DMN66D0LDW-7_SOT363-6~D
61
2
G
D
S
QA5
SSM3K7002FU_SC70-3~D
2
13
RA96 0_0402_5%~DEMC@
1 2
RA24 22_0402_1%~D
1 2
DA2
PJDLC05_SOT23-3
EMC@
2
3
1
RA10 47K_0402_5%~D
1 2
RA7 20K_0402_1%~D
1 2
RA3 10K_0402_1%~D@
1 2
CA10
0.1U_0402_16V7K~D
1
2
RA20 2.2K_0402_5%~D
1 2
QA3B
DMN66D0LDW-7_SOT363-6~D
3
5
4
RA100 0_0402_5%~D@
1 2
DA3
PJDLC05_SOT23-3
EMC@
2
3
1
CA37 100P_0402_25V8K
@
1
2
RA93 2.2K_0402_5%~D
1 2
UA2
MAX9892ERT+T_UCSP6~D
@
SET
B3
/MUTE
B1 INR
A3
INL
A1
VDD B2
GND
A2
RA26 33_0402_5%~D
1 2
QA4B
DMN66D0LDW-7_SOT363-6~D
@
3
5
4
CA11
4.7U_0603_6.3V6K~D
1
2
CA7
0.1U_0402_16V7K~D
1
2
CA18
10U_0805_10V6K
1
2
LA1 BLM21PG600SN1D_0805~D
1 2
CA31
10U_0805_10V6K
@
1
2
10U_0805_10V6K~D
CA12
1
2
RA97 0_0402_5%~DEMC@
1 2
JP8
PAD-OPEN 43x39
@
12
JP10
PAD-OPEN 43x39
@
12
RA95 2.2K_0402_5%~D
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Audio AMP
Int. Speaker Conn.
40mil = For 4ohm 2W Speaker
For ESD
Close to UA5 pin3,pin4,pin11,pin12 PT
ST
ST
ST
ST
SPK_L-
SPK_R+
SPK_R-
SPK_L+
SPK_L-
MUTE#
+VSBP_AMP_AVCC
+VSBP_AMP_PVCC
SPK_L+
SPK_R-
AUD_SPK_L+_R
AUD_SPK_R+_R
SPK_LC-
SPK_RC+
SPK_RC-
AUD_SPK_L-_R
AUD_SPK_R-_R
SPKR+
SPK_OUT_R-
SPKR-
SPKL-
SPKL+
SPK_OUT_L-
SPK_OUT_L+
SPK_OUT_R+
SPK_LC+
SPK_R+
MUTE# [47]
AUD_MUTE[38]
AUD_SPK_L+[47]
AUD_SPK_R+[47]
SPK_LC+[47]
AGND
+5VS
+VSBP
AGND
AGND
AGND
AGND
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Speaker/Audio Jack
Custom
48 62Tuesday, September 03, 2013
Compal Electronics, Inc.
2012/07/212011/08/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Speaker/Audio Jack
Custom
48 62Tuesday, September 03, 2013
Compal Electronics, Inc.
2012/07/212011/08/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
Speaker/Audio Jack
Custom
48 62Tuesday, September 03, 2013
Compal Electronics, Inc.
2012/07/212011/08/25
CA43
10U_0805_25V6K
1
2
LA7 BLM18PG181SN1D_2PEMC@
1 2
CA54
680P_0603_50V7K
EMC@
12
CA71
1U_0603_25V6-K~D
1
2
RA61
10K_0402_1%~D
12
CA59 0.022U_0402_25V7K
1 2
RA51
30K_0402_1%
1 2
DA4
PJDLC05C_SOT23-3
@
2
3
1
LA11 BLM18PG181SN1D_2PEMC@
1 2
RA60
10K_0402_1%~D
12
CA46
10U_0805_25V6K
1
2
RZ38
100K_0402_5%~D
12
CA60 0.022U_0402_25V7K
1 2
RA45 60.4K_0402_1%~D
1 2
JSPK1
ACES_50224-00401-001
CONN@
1
1
2
2
3
3
4
4
G1
5
G2
6
CA45
10U_0805_25V6K
1
2
CA41
100P_0402_25V8K
1
2
CA75
1U_0603_25V6-K~D
1
2
CA76
1U_0603_25V6-K~D
1
2
RA53 0_0805_5%@
1 2
RA47 10_0805_5%~D
1 2
CA57
680P_0603_50V7K
EMC@
12
G
D
S
QA2
L2N7002WT1G
2
13
RA48 60.4K_0402_1%~D
1 2
CA53 0.022U_0402_25V7K
1 2
CA56
680P_0603_50V7K
EMC@
12
LA9 BLM18PG181SN1D_2PEMC@
1 2
CA61 0.22U_0603_16V7K
1 2
RA46
30K_0402_1%
1 2
RA52
60.4K_0402_1%~D
12
CA62 0.22U_0603_16V7K
1 2
LA8 BLM18PG181SN1D_2PEMC@
1 2
CA55
680P_0603_50V7K
EMC@
12
RA49
60.4K_0402_1%~D
12
CA72 0.22U_0603_16V7K
1 2
CA42
100P_0402_25V8K
1
2
CA58 0.022U_0402_25V7K
1 2
DA5
PJDLC05C_SOT23-3
@
2
3
1
CA73 0.22U_0603_16V7K
1 2
UA5
TPA3113D2PWPR_HTSSOP28
SD#
1
FAULT#
2
LINP
3
LINN
4
GAIN0
5
GAIN1
6
AVCC
7
AGND 8
GVDD 9
PLIMIT 10
RINN
11
RINP
12
NC
13
PBTL 14
PVCCR
15
PVCCR
16
BSPR 17
OUTPR 18
PGND 19
OUTNR 20
BSNR 21
BSNL 22
OUTNL 23
PGND 24
OUTPL 25
BSPL 26
PVCCL
27
PVCCL
28
GND
29
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATT LED
NFC Connector
15. MOD_GND
14. VDD_IO
13. MOD_VDD
12. SWP*1
11. SE_DOUT_CLK*1
10. SE_DIN_DIO*1
9. MOD_GND
8. I2C_SCL
7. I2C_SDA
6. VDD_SIM*2
5. IRQ
4. SE_PWR*1
3. SWP_PW R*1
2. MOD_GND
1. MOD_VDD
RTC counter
BATT LED Power Button
PT
ST
ST
ST
ST
IBAT4
SML0CLK
SML0DATA
NFC_VDD_SIM
NFC_DET#
NFC_VDD_SIM
NFC_IRQ
NFC_RST#
BAT4
BAT3
BAT2
BAT4
BAT1
BATT_LOW_LED#_D
BAT5
IBAT1 BAT1
NFC_DET#
IBAT5 BAT5 IBAT3 BAT3
IBAT2 BAT2
BATT_LOW BATT_LOW_LED#_D
BATBTN#[38]
BATT_LED#_LV3[38]
NFC_IRQ[17]
BATT_LED#_LV2[38]
BATT_LED#_LV1[38] BATT_LOW_LED#[38]
SML0CLK[17]
SML0DATA[17]
NFC_DET#[17]
NFC_RST#[17]
BATT_LED#_LV5[38]
BATT_LED#_LV4[38]
+3V_PCH
+3V_NFC
+3V_NFC
+3V_NFC
+3V_NFC
+5VALW
+5VALW
+5VALW +5VALW
+5VALW
+5VALW
+5VALW +5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Speaker/Audio Jack
Custom
49 62Tuesday, September 17, 2013
Compal Electronics, Inc.
2012/07/152011/08/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Speaker/Audio Jack
Custom
49 62Tuesday, September 17, 2013
Compal Electronics, Inc.
2012/07/152011/08/25
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9941P
0.1
Speaker/Audio Jack
Custom
49 62Tuesday, September 17, 2013
Compal Electronics, Inc.
2012/07/152011/08/25
R27
100K_0402_5%~D
12
R34
100K_0402_5%~D
12
G
D
S
Q17B
DMN66D0LDW-7_SOT363-6~D
5
34
R32
100K_0402_5%~D
12
R18
100K_0402_5%~D
12
JNFC1
HB_A531515-SCHR21
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
GND
16
GND
17
R17
100K_0402_5%~D
12
RN7 0_0402_5%~D@
1 2
R20
100K_0402_5%~D
12
SW2
NTC311-EA1T-A160T_4P
1
2
3
4
RN8 10K_0402_5%~D@
12
LED6 27-21-T3D-CP1Q2B16Y-3C_WHITE
21
R21
100K_0402_5%~D
12
RN9 0_0402_5%@
1 2
G
D
S
Q18A
DMN66D0LDW-7_SOT363-6~D
2
61
G
D
S
Q16A
DMN66D0LDW-7_SOT363-6~D
2
61
LED8 27-21-T3D-CP1Q2B16Y-3C_WHITE
21
D8
PESD24VS2UT_SOT23-3~D
EMC@
2
3
1
White
Yellow
LED3
12-22/Y2ST3D-C30/2C
2
1
3
G
D
S
Q18B
DMN66D0LDW-7_SOT363-6~D
5
34
R19 820_0402_5%~D
1 2
G
D
S
Q16B
DMN66D0LDW-7_SOT363-6~D
5
34
R23 820_0402_5%~D
1 2
R25
100K_0402_5%~D
12
R22 820_0402_5%~D
1 2
G
D
S
Q15A
DMN66D0LDW-7_SOT363-6~D
2
61
R26
100K_0402_5%~D
12
RN5 0_0402_5%@
1 2
R11
100K_0402_5%~D
12
LED9 27-21-T3D-CP1Q2B16Y-3C_WHITE
21
R16 820_0402_5%~D
1 2
R12
100K_0402_5%~D
12
RN1
100K_0402_5%~D
N14@
1 2
G
D
S
Q20A
DMN66D0LDW-7_SOT363-6~D
2
61
G
D
S
Q15B
DMN66D0LDW-7_SOT363-6~D
5
34
R24 820_0402_5%~D
1 2
G
D
S
Q19A
DMN66D0LDW-7_SOT363-6~D
2
61
C1135
0.1U_0402_10V7K~D
N14@
1
2
G
D
S
Q20B
DMN66D0LDW-7_SOT363-6~D
5
34
LED7 27-21-T3D-CP1Q2B16Y-3C_WHITE
21
DN2
PESD5V0U2BT_SOT23-3~D
@
2
3
1
G
D
S
Q19B
DMN66D0LDW-7_SOT363-6~D
5
34
G
D
S
Q17A
DMN66D0LDW-7_SOT363-6~D
2
61
R33
100K_0402_5%~D
12
R10 820_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Module REV Change list From To
X00 Remove Audio codec to DB --- page 47 X X00
X00 Add GC6 function for GPU N14P --- page 24/28/33
Modify USB port detect pin to independent --- page 38 and page 45X00
X
X
X00
X00
X00 Follow GPIO table modify pin assign --- page 38
X00 Change to PWM FAN --- page 39
Change mDP output from GPU --- page 25X00
CCD connector change to 11 pin, add CCD_INT signal. --- page 35X00
X
X
X
X
X00
X00
X00
X00
X00 Change R45 PU to +3VALW for leakage current --- page 38 X X00
X00 Rmovie Audio DSP chip and add KC3801 --- page 46 and page 38 X X00
X00 Add RTC counter and add SSC chip for Audio bit clock --- page 46 and page 40 X X00
X00 Just support N14P-GS, so remove GPU board ID. --- page 20 X X00
X00 Co-layout Sata Re-driver PS8520B/C --- page 43 X X00
EMC request add CM22 to close JTB1 pin17 --- page 40X00 X00X
X00 Buyer request Change YH2/YL1 to SJ10000DE00 --- page 17/41 X X00
X00 Buyer request Change YH1/Y4 to SJ10000DE00 --- page 16/46 X X00
X00 Change RH85 connector to +1.5VS --- page 17 X X00
X00 Change RPH1/RPH2/RPH3/RPH4/RPH5 tp single resister --- page 18/19 X X00
X00 Modify eDP connector pin define, remove +3VS --- page 35 X X00
X00 Modify support quad ROM, add RH10/RH41 --- page 17 X X00
X00 Change HDMI level shift to active --- page 36 X X00
X00 EMC request add CA36 --- page 40 X X00
X00 NFC SMBus change to PCH SMBus0 --- page 17 X X00
X00 CCD SMBus reserve connector to PCH, and CCD INT reserve connector to EC --- page 35 X X00
Modify USB charger schematic, change RI17/RI31/RI32connect to +3VALW, and remove RI18/RI28 --- page 44X00 X X00
X00 Update VRAM PN --- page 1 X X00
SWAP DA4 pin2 and pin3 --- page 48
X00 X X00Remove NFC function --- page 49
X00 X X00
Use array resister to reduce componentX00 X X00
Change RH45/RH46/RH47/RH49 to array resister RPH11 --- page 17
Change RH50/RH51 to array resister RPH14 --- page 17
Change RH66/RH83/RH88/RH90 to array resister RPH24 --- page 17
Change RH69/RH74/RH77/RH81 to array resister RPH25 --- page 17
Change RH71/RH72 to array resister RPH15 --- page 17
Change RH137/RH139/RH140/RH141 to array resister RPH1 --- page 18
Change RH147/RH149/RH150/RH153 to array resister RPH2 --- page 18
Change RH116/RH117/RH118/RH124 to array resister RPH4 --- page 18
Change RH134/RH135/RH142/RH168/RH178/RH186/RH192/RH187 to array resister RPH26 --- page 19
Change RH189/RH183/RH179/RH181 to array resister RPH7 --- page 20
Change RH160/RH185/RH184/RH172 to array resister RPH8 --- page 20
Change RH190/RH178/RH177/RH182 to array resister RPH9 --- page 20
Change RV291/RV293/RV295/RV400 to array resister RPH12 --- page 24
Change RV292/RV294/RV296/RV297 to array resister RPH13 --- page 24
Change RV299/RV300 to array resister RPH16 --- page 24
Change RV325/RV326 to array resister RPH17 --- page 25
Change RV331/RV333/RV334/RV335 to array resiter RPH10 --- page 26
Change RH94/RH96 to array resister RPH27 --- page 35
Change RV445/RV447 to array resister RPH18 --- page 36
Change RE72/RE73 to array resister RPH20 --- page 38
Change RE17/RE18/RE36/RE37 to array resiter RPH19 --- page 38
Change RE14/RE15 to array resister RPH21 --- page 38
Change RH82/RH93 to array resister RPH22 --- page 42
Change R136/R137 to array resister RPH23 --- page 46
X00 Use dual MOSFET to reduce single MOSFET
Change QZ15/QZ20 to dual MOS QZ23 --- page 34
Change QE4/QE6 to dual MOS QZ24 --- page 39
X00 Use Anpec APL3512 to reduce Component
Remove RV401/RV402/QV26/QV28/RV404/CV745/QV27, Add CV26/CV28/UV12 --- page 35
X00 Use TI TPS22966 to reduce Component
Remove RZ20/RZ14/QZ6/QZ10/CZ15/RZ17/QZ9/CZ38/QZ8/QZ7/RZ37, Add UZ4/RZ132/RZ133/CZ28/CZ29/QZ9/RZ17 --- page 34
X00 Add DV9 for display have leakage issue --- page 37
Use Green Clock to reduce componentX00
Unstuff RH1/YH1/CH3/CH4, add RH96 --- page 16
Unstuff RH89/YH2/CH27/CH28, add RH102 --- page 17
Unstuff YV1/CV575/CV576, add RV13 --- page 24
Unstuff YL1/CL22/CL25, Stuff RL10 --- page 41
Add C28/C27/C26/C84/R67/R68/U3/C34/R91/Y5/C41/C32 --- page 46
X X00
X X00
X X00
X X00
X X00
X01 X01X00Remove DV7 for EMC component should close device connector side --- page 40
X01 Remove +1.5V_PWROK and +1.35V_PWROK connect to HWPG for power good issue --- page 38 X00 X01
X01 Change S3_DRAMPWRGD circuit, that change 1.5VPWRGD to +V1.05S_VCCP_PWRGOOD and un-stuff RU50 ---- page 8 X00 X01
X01 Remove RZ13 for power value issue --- page 34 X00 X01
X01 Remove RV471 for Touch screen power issue --- page 35 X01X00
Un-stuff RE56 and stuff RE60 for EC power on issue --- page 38X01 X00 X01
X01 Un-stuff RH32 for +3V backdrive --- page 16 X00 X01
X01 Un-stuff RH158 for +3V backdrive --- page 20 X00 X01
Remove PCH control TPM PD pin for +3V backdrive --- page 40X01 X00 X01
Crete EC 3810 GPIO11 SUS_ON for DDR power enable --- page 38X01 X00 X01
Stuff RV450/RV451 10K ohm for HDMI EA measure issue --- page 36X01 X00 X01
X01X00X01 Change RZ600 to 11K ohm for 1.5V power value issue --- page 34
X01X01
Stuff CZ7 to 0.01u
change CZ6 to 0.047u and add CZ8 0.047u cap for 1.05VDGPU delay --- page 33
Stuff RZ10 10 ohm, RZ11/RZ15 1 ohm, RZ6 100 ohm.
change DZ2 enable pin2 to DGPU_PWROK and remove RZ485
Change RZ5 to 100k ohm
X00For GPU power sequence issue
X01RZ484 change PU to +3VS for GPU GC6 function issue --- page 33X01 X00
Remove RV504 and add QV40 for GPU thermal function --- page 24X01 X00 X01
Audio vendor suggest for Iphone
Add RA11/CA30/RA2/RA3
Change CA26 to 100U
Change RA18/RA17 to 8.2 ohm
X01 X01X00
X01 X01X00Change PCH_GPIO72 and WAKE# PU to +3VALW for DSx issue --- page 18
X01 Update power circuit
Add +1.35V enable signal SUS_ON and rename PM_SLP_S5# to PM_SLP_S4#.
Add 33uF*1 OS-CON for acoustic issue.
X00 X01
X01 Un-stuff QZ26/QZ27 for EC multi SPI function --- page 17 X00 X01
X01 SML0CLK/ SML0DATA PU to 499 ohm and reserve RH65 for NFC suggest --- page 17 X00 X01
X01 Change RPH11 8P4R to RH448/RH456 single type --- page 17 X00 X01
Change DP from GPU output to Internal outputX01 X00 X01
Add DSP bypass circuit --- page 46X01 X00 X01
X01 X00 X01
Add DI15 for Touch screen function --- page 35X01 X00 X01
Add LCD_TEST RE64 PU to +EDPVDD --- page38X01 X00 X01
Power SW LED resistor R66 change to 560 ohm --- page39X01 X00 X01
Add JP802/JP803/JP11/JP14/JP15 for power measureX01 X00 X01
Modify I/O connector JTB1 pin define --- page 40
X01 X00 X01Add JRTC to MB --- page 16
Change JP5 size --- page 21X01 X00 X01
Change FAN connector --- page 39X01 X00 X01
PCH_GPIO12 change to PU +3VALW --- page 20X01 X00 X01
X00 X01X01 change CH27,CH28=12pF,CV575,CV576=10pF
Change LA7/LA8/LA9/LA11 to 180 ohm bead --- page 48X01 X00 X01
Remove JRTC --- page 16X01 X00 X01
Add RV411 for mDP voltage issue --- page 36X01 X00 X01
Add RF shielding EMIST_SUL-15A3M_1P footprint 12pcs --- page 40X01 X01X00
Change ODD_DA# to RPH2, un-stuff RH164, and RH416 for GPU enable issue --- page 18X01 X00 X01
BIOS setting request PCH_GPIO70 for UMA/DIS, PCH_GPIO1 for GPU N14/N15 --- page 20X01 X00 X01
Change SW1 connector --- page 39X01 X00 X01
Change NFC connector --- page 49X01 X00 X01
Stuff RU7/RU12/RU36 --- page 6X01 X00 X01
Change Touch screen sleep circuit, remove DI5, add DV17/DV20/RV5 --- page 35X01 X00 X01
Un-stuff RV466--- page 37X01 X00 X01
Change DSP bypass circuit --- page 46X01 X00 X01
Update power circuitX01 X00 X01
Remove GPU DP HDP circuit --- page 24/37X01 X00 X01
Remove GPU DP port power --- page 26X01 X00 X01
Remove GPU VRAM power for N14E-GL --- page 28X01 X00 X01
Change JHP2 connector --- page 47X01 X00 X01
Add CV639 for vendor request --- page 28X01 X00 X01
Change SD302100280 to SD309100280 for EOLX01 X00 X01
CA17 un-stuff for pop issueX01 X00 X01
Remove DV16, add DV18/DV19/RV415 for LCD power control --- page 35
Add RV416/RV419 for EC control LCD SMBUS --- page 35
X01 X00 X01
Remove RV483 and add RH178 for ST test --- page 20X01 X00 X01
RZ5 change to 60.4K ohm for GPU sequence --- page 33X02 X01 X02
X02 USB3.0 CAP CI5,CI6,CI7,CI8,CI11,CI12,CI13,CI20,CI3,CI4,CI16,CI17 change to 0.1uF for USB3.0 issue --- page 45 X01 X02
X02 modify eDP chock LV16~LV20 for footprint issue --- page 35 X01 X02
X02 LA7/LA8/LA9/LA11 change footprint size --- page 48 X01 X02
CA53/CA58/CA59/CA60 change to 22nf for pop issue --- page 48X02 X01 X02
Hynix “0”. ROM_SI=PD 5K ohm, Samsung”1”. ROM_SI=PD 10K ohm for VRAM SETTING --- page 25X02 X01 X02
RA45/48 change to 60Kohm,RA46/51 changr to 30Kohm for Audio issue --- page 48X02 X01 X02
change F1 to SP040002400 --- page 39X02 X01 X02
Stuff RV460 and change RV458 to 4.7K ohm for HDMI EA issue --- page 36X02 X01 X02
Change CV677 to X6S --- page 30X02 X01 X02
Change UZ14 for G5243 for +3V_PCH issue --- page 34X02 X01 X02
Add TI HDD redriver co-layout --- page 43X02 X02X01
Change LED footprint and change LED control circuit --- page 49X02 X01 X02
Add PD resistor for SATA redriver EA issue --- page 43X02 X01 X02
Change RU118 to 10K for OTP issue --- page 8X02 X01 X02
Change Board ID --- page38X02 X01 X02
Change H10/H18 footprint --- page 40 X02X01X02
Reserve PD resistor for SATA redriver --- page 43X02 X01 X02
Change RA33/RA98/RA101/RE60/RE321/RE322/RN5/RN9/RU37/RU43/RU53/RV8/RV480/RV481/RV482/RV503/RV510/RH416
RV411/RV415/RV337/R8/R53/R54/R56/R58/RA53/RH202/RH213/RI74 to 0ohm short pad
X02 X01 X02
Change UV12 and UN3 to GMT G5243X02 X01 X02
UV12 change to APL3512ABI-TRG_SOT23-5 for bring up issue --- page 35
Remove CV3508 for panel EA issue --- page 35
Add CCD_INT# pin --- page 38
A00 X02 A00
A00X02
EMI shielding clip footprint change to SOLUTION_ICSRC6510-015SFR-B_1P(H7/H14/H17/H27/H19/H20/H21/H23/H25/H24/H26) --- page 40
change SM070002000 to SM070002Q00 --- page 35
A00
EMI shielding clip footprint change to EMIST_SUL-12A2M_1P(H7/H14/H17/H27/H19/H20/H21/H23/H25/H24/H26) --- page 40
Remove N15P external ROM and strap --- page 25
A00 X02 A00
Remove eDP co-layout component, and add EC_INV_PWM conntrol PWM from EC --- page 35
A00 X02 A00
Title
Size Document Num ber Rev
Date: S heet of
Security Classif ication
Compal Secret Data
THIS S HEET OF ENGINEERING DRA WING IS T HE PROPR IETA RY PROPE RTY OF COMPAL E LECT RONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRA DE SECR ET INFORMAT ION. THIS SHEET MAY NOT B E TRA NSFERED FROM THE CUST ODY OF THE COMPETENT DIVIS ION OF R&D
DEPART MENT EX CEPT AS A UTHORIZED B Y COMPAL ELE CTRONICS , INC. NEIT HER T HIS SHE ET NOR T HE INFORMATION IT CONTA INS
MAY BE USE D BY OR DIS CLOSED T O ANY T HIRD PA RTY W ITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.
Issued Date Deciphered Date
0.1
50 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagra m
Title
Size Document Num ber Rev
Date: S heet of
Security Classif ication
Compal Secret Data
THIS S HEET OF ENGINEERING DRA WING IS T HE PROPR IETA RY PROPE RTY OF COMPAL E LECT RONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRA DE SECR ET INFORMAT ION. THIS SHEET MAY NOT B E TRA NSFERED FROM THE CUST ODY OF THE COMPETENT DIVIS ION OF R&D
DEPART MENT EX CEPT AS A UTHORIZED B Y COMPAL ELE CTRONICS , INC. NEIT HER T HIS SHE ET NOR T HE INFORMATION IT CONTA INS
MAY BE USE D BY OR DIS CLOSED T O ANY T HIRD PA RTY W ITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.
Issued Date Deciphered Date
0.1
50 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagra m
Title
Size Document Num ber Rev
Date: S heet of
Security Classif ication
Compal Secret Data
THIS S HEET OF ENGINEERING DRA WING IS T HE PROPR IETA RY PROPE RTY OF COMPAL E LECT RONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRA DE SECR ET INFORMAT ION. THIS SHEET MAY NOT B E TRA NSFERED FROM THE CUST ODY OF THE COMPETENT DIVIS ION OF R&D
DEPART MENT EX CEPT AS A UTHORIZED B Y COMPAL ELE CTRONICS , INC. NEIT HER T HIS SHE ET NOR T HE INFORMATION IT CONTA INS
MAY BE USE D BY OR DIS CLOSED T O ANY T HIRD PA RTY W ITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.
Issued Date Deciphered Date
0.1
50 62Tuesday, September 03, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Block Diagra m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
B+
EN_INVPWR
+INV_PWR_SRC
SI3457BDV
QV29
ADAPTER
CHARGER
BATTERY
RT8205LZQW
PU200
+5VALW
+3VALW
+1.8VS
SUSP#
SUSP#
TPS51212DSCR
PU500 +VCCP
RT8207MZQW
PU300
+1.5V
+0.75VS
SYSON
+VCCSA
+V1.05S_VCCP_PWRGOOD
VR_ON
ISL95836HRTZ
PU700
+VCC_CORE /
+VCC_GFXCORE_AXG
SUSP#
+5VS
SI4800BDY
QZ6
TPS51461RGER
PU600
SY8033BDBC
PU400
SUSP#
+3VS
SI4800BDY
QZ8
PCH_PWR_EN
+3V_PCH
SI3456DDV
QZ12
SUSP#
+1.5VS
SI3456DDV
UZ4
PCH_PWR_EN
+5V_PCH
AO3419L
QH5
+1.5V_CPU_VDDQ
AO4728L
QU6
+LCDVDD
AO3419L
QV27
EC_ENVDD /
VGA_LVDDEN
+3VS_CAM
SI2301CDS
QV31
EN_CAM
APE8873M
UE4 +FAN_POWER
EN_DFAN1
+LAN_IO
EN_WOL
AO3419L
QL3
+3VS_WLAN
SI3456DDV
QM1
WLAN_EN
+5VS_ODD
FDC655BN
QN4
ODD_EN#
PM_SLP_S3#
+5VS_HDD
SI3456DDV
QN1
PWRSHARE_EN_EC#
+5V_CHGUSB
TPS2062ADR
UI2
CPU1.5V_S3_GATE
EC_ON /
VCOUT0_PH
AO3419L
QZ1
+3VS
DGPU_PWR_EN
+3VS_DELAY
ISL62883CHRTZ
PU800
B+
+GPU_CORE
RC delay
SI4634DY
UZ2
+1.5V
+1.5VSDGPU
SI4634DY
UZ1
+VCCP
+1.05VSDGPU
GPU
RC delay RC delay
ON/OFF
Power Button &
BATBTN &
USBCHG_DET
+3V/+5V_ALW
EC_ON
TP0610K
+VSBP
RT8205LZQW
PGOOD
+3V/+5V_PCH
AO3419L/SI3456DDVPCH_PWR_EN
+1.5V/+0.75VS
RT8207MZQW
SYSON
+1.8VS
SY8033BDBC
SUSP#
+3VS
SI4800BDY
+5VS
SI4800BDY
+1.5VS
SI3456DDV
+VCCP
TPS51212DSCR
VR_ON
VGATE
PGOOD
TPS51461RGER
+VCCSA
SA_PGOOD
+VCC_CORE/+VCC_GFXCORE_AXG
ISL95836HRTZ-T
SLP_S5# PM_SLP_S5#
PM_SLP_S3#
SLP_S3#
APWROK PCH_APWROK
PWROK PCH_PWROK
SYS_PWROK
PWRBTN# PBTN_OUT#
RSMRST# PCH_RSMRST#
AC_PRESENT
ACPRESENT
DPWROK PCH_DPWROK
Ta
Tb
Tc
4
4
PGOOD
PGOOD
PGOOD
ENE KB9012
PCH
PGOOD
5
6
7
8
9
10 12
11
14
15
16
17
18
AC mode Ta -> Tb -> Tc
DC mode Tc -> Ta -> Tb
+1.5V_CPU_VDDQ
AO4728L
13
CPU1.5V_S3_GATE
Power Button
BATBTN
USBCHG_DET
ENE KB9012
USBCHG_DET#
BATBTN#
PBTN_SW#
ON/OFF
2
3
+3V/+5V_ALW
EC_ON RT8205LZQW
4
EC check which
button is pressed
+3V_ALW
BATT_CAP_LED#_LV[1...5] Turn on
Battery LED
PWRSHARE_OE# &
PWRSHARE_EN_EC#
Turn on USB
power charge
PCH_PWR_EN
...
PCH_PWROK
Turn on Other
system power
A
B
C
A1
B1
C1
When press power button : A -> 2 -> 3 -> A1
When press Battery button : B -> 2 -> 3 -> B1
When USB charge device plug in : C -> 2 -> 3 -> C1
2n7002
+3VLP
Charger_LDO
100k 100k
150k
+3V_ALW
10k
+3VLP
100k
+3VLP
100k
+3VLP
100k
VCOUT0_PH#
+3V_ALW
10k
Title
Size Doc ument Number Rev
Date: Shee t of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADESECRETINFORMATION. THIS SHEETMAYNOT BETRANSFEREDFROMTHECUSTODY OFTHE COMPETENT DIVISIONOF R&D
DEPARTMENTEXCEPTAS AUTHORIZED BY COMPALELECTRONICS, INC. NEITHERTHISSHEETNORTHE INFORMATIONIT CONTAINS
MAY BEUSEDBY ORDISCLOSEDTO ANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
51 6 2Tues day, Se pte mbe r 03, 2 01 3
2011/08/25 2012/07/25
Compal Electronics, Inc.
Power Sequence
Title
Size Doc ument Number Rev
Date: Shee t of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADESECRETINFORMATION. THIS SHEETMAYNOT BETRANSFEREDFROMTHECUSTODY OFTHE COMPETENT DIVISIONOF R&D
DEPARTMENTEXCEPTAS AUTHORIZED BY COMPALELECTRONICS, INC. NEITHERTHISSHEETNORTHE INFORMATIONIT CONTAINS
MAY BEUSEDBY ORDISCLOSEDTO ANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
51 6 2Tues day, Se pte mbe r 03, 2 01 3
2011/08/25 2012/07/25
Compal Electronics, Inc.
Power Sequence
Title
Size Doc ument Number Rev
Date: Shee t of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADESECRETINFORMATION. THIS SHEETMAYNOT BETRANSFEREDFROMTHECUSTODY OFTHE COMPETENT DIVISIONOF R&D
DEPARTMENTEXCEPTAS AUTHORIZED BY COMPALELECTRONICS, INC. NEITHERTHISSHEETNORTHE INFORMATIONIT CONTAINS
MAY BEUSEDBY ORDISCLOSEDTO ANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
51 6 2Tues day, Se pte mbe r 03, 2 01 3
2011/08/25 2012/07/25
Compal Electronics, Inc.
Power Sequence
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
close EC
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SMART
SMARTSMART
SMART
Battery:
Battery:Battery:
Battery:
01.BAT+
01.BAT+01.BAT+
01.BAT+
02.BAT+
02.BAT+02.BAT+
02.BAT+
03.BAT+
03.BAT+03.BAT+
03.BAT+
04.BAT+
04.BAT+04.BAT+
04.BAT+
05.CLK_SMB
05.CLK_SMB05.CLK_SMB
05.CLK_SMB
06.DAT_SMB
06.DAT_SMB06.DAT_SMB
06.DAT_SMB
07.BATT_PRS
07.BATT_PRS07.BATT_PRS
07.BATT_PRS
08.SYS_PRS
08.SYS_PRS08.SYS_PRS
08.SYS_PRS
09.GND
09.GND09.GND
09.GND
10.GND
10.GND10.GND
10.GND
11.GND
11.GND11.GND
11.GND
12.GND
12.GND12.GND
12.GND
JIMBTY battery connector
EMI Parts
ESD Parts
ESD Parts
ESD Parts
VSB_N_002
VSB_N_003
VSB_N_001
PSID
PSID-1
PSID-2
CLK_SMB
DAT_SMB
BATT_PRS
ADPIN
PSID-3
POK
18,54
VCIN1_PH
38
PS_ID 38
ADP_I
38,53
EC_BATT_PRS# 38,53
EC_SMB_DA1 38,53
EC_SMB_CK1 38,53
VIN
B+
+3VALW
+VSBP
+5VALW
+3VALW+5VALW
BATT++BATT+
+3VALW_EC
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-DCIN / BATT CONN / OTP
52 62W ednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-DCIN / BATT CONN / OTP
52 62W ednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-DCIN / BATT CONN / OTP
52 62W ednesday, September 04, 2013
Compal Electronics, Inc.
PD103
PESD24VS2UT_SOT23-3~D
@
2
3
1
PC101
100P_0402_50V8J
12
PL108
FBMA-L11-201209-221LMA35_2P
12
PR116
13.7K_0402_1%
12
PC106
1000P_0402_50V7K
12
PR107
1M_0402_5%
12
PC110
.1U_0402_16V7K
12
PD100
BAV99W-7-F_SOT323-3
@
2
3
1
BAT100
ACES_50290-01201-P01
CONN@
11
33
44
22
55
66
77
88
99
10 10
11 11
12 12
PC102
1000P_0402_50V7K
12
PC105
0.01UF_0402_25V7K
12
PC121
0.1U_0402_25V6
12
PR109
100_0402_1%
1 2
PC120
0.1U_0402_25V6
12
PR113
100_0402_1%
1 2
PR110
100K_0402_1%
12
PR102
2.2K_0402_1%
12
PC108
0.22U_0603_25V7K
12
PR114
10K_0402_1%
1 2
PC111
0.1U_0402_25V6
@
12
PL106
FBMA-L11-201209-221LMA35_2P
1 2
PR106
15K_0402_1%
12
PL103
FBMA-L11-201209-221LMA35_2P
12
PR118
13.7K_0402_1%
12
PR101
0_0402_5%
@
1 2
PD104
PESD24VS2UT_SOT23-3~D
@
2
3
1
PR105
10K_0402_1%
1 2
G
D
S
PQ100
FDV301N-G_SOT23-3
2
1 3
G
D
S
PQ103
L2N7002W T1G_SC70-3
2
13
PR111
100_0402_1%
1 2
PC130
15P_0402_50V8J
12
G
S
D
PQ102
SI3457CDV-T1-GE3_TSOP6
1
3
4
2
5
6
PL101
BLM15AG102SN1D_2P
1 2
PL105
HCB2012KF-121T50_0805
1 2
PR103
33_0402_5%
1 2
PD102
PESD24VS2UT_SOT23-3~D
@
2
3
1
PL102
HCB2012KF-121T50_0805
1 2
PC103
100P_0402_50V8J
12
PL100
FBMA-L11-201209-221LMA35_2P
1 2
PR112
0_0402_5%
@
1 2
PR104
100K_0402_1%
12
E
B
C
PQ101
MMST3904-7-F_SOT323-3
2
3 1
PC104
100P_0402_50V8J
12
ADP100
ACES_50290-00701-001
CONN@
11
22
33
66
77
55
44
PC107
100P_0402_50V8J
12
PR108
37.4K_0402_1%
1 2
PC109
0.1U_0402_25V6
12
PC100
1000P_0402_50V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
For LEARN mode disable (pulse)
3S3P
CC = 5.28A
CV = 3S (12.6V)
Pull high for 3 CELL operation
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Delay Adaptor OC H_PROCHOT# 200us
while Hybrid power transition
Battery Current Sensor - BMON circuits
For DT mode
For ErpLot6
asserts H_PROCHOT# when adaptor is
unplugged, keep low for 10ms
till SW PROCHOT# is issued by EC
Battery protection:
ST change to short pads
EMI Parts
EMI Parts
EMI Parts
EMI Parts
ACDET
CHG_LX
BTST
CHG_LGATE
CSSP_1
EC_SMB_CK1
CSSN_1
EC_SMB_DA1
CSOP_B CSON_B
REGN
BATDRV#
BATDRV#
ACDRV
CMSRC
REGN
VCC
ADP_I
ACDRV
CMSRC
CELL
ACOK
CHG_UGATE
CHG_UGATE
CHG_LX
CHG_LGATE
REGN
IN-
IN+
BMON_OUT
CSOP_B
CSON_B
H_PROCHOT#
H_PROCHOT#
ACOK
ACP
ACN
SRP
SRN
VCC
EC_SMB_DA1_R
EC_SMB_CK1_R
ACOFF
38
AC_IN
38
EC_BATT_PRS#
38,52
ADP_I
38,52
H_PROCHOT# 38,58,8
H_PROCHOT#_EC
38
+VCHGR
VIN
P1
B+
VIN
BATT+
+VCHGR
+3VALW
+3VALW
VIN
EC_SMB_DA138,52
EC_SMB_CK138,52
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-Charger
53 62W ednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-Charger
53 62W ednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-Charger
53 62W ednesday, September 04, 2013
Compal Electronics, Inc.
PD202
SX34H_SMA2
21
PC222
10U_0805_16V6K
12
G
D
S
PQ203B
DMN66D0LDW-7_SOT363-6
@
5
34
PR210
0_0402_5%
@
12
PC214
1U_0805_25V6K
12
PC231
10U_0805_16V6K
1 2
PR208
4.02K_0402_1%
1 2
PU202
INA199A2DCKR_SC70-6~D
@
V+
3
IN- 5
IN+ 4
GND
2
Out 6
REF
1
PC205
10U_0805_25V6K
12
PC211
0.1U_0402_25V6
1 2
PC215
10U_0805_16V6K
1 2
PR222
4.7_1206_5%
12
PL203
2.2UH_FDVE1040-H-2R2M-P3_14.2A_20%
1 2
PC216
0.047U_0603_25V7K~D
12
PQ200
MDS1521URH_SO8
3
2
1
4
5
6
7
8
PR290
160K_0402_1%
1 2
PQ208
AO4407AL_SO8
3 6
5
7
8
2
4
1
PC218
0.01UF_0402_25V7K
12
PR203
5.1K_0805_1%
@
12
PC217
10U_0805_16V6K
1 2
PR218
0_0402_5%
@
1 2
PR231
0_0402_5%
@
1 2
PR200
4.02K_0402_1%
1 2
PR280
0_0402_5%
@
1 2
G
D
S
PQ231B
DMN66D0LDW-7_SOT363-6
5
34
PC207
10U_0805_25V6K
12
PR284
10_0402_1%
@
12
PC225
0.1U_0402_25V6
@
1 2
PC233
10U_0805_16V6K
1 2
PR225
100K_0402_1%
@
12
G
D
S
PQ231A
DMN66D0LDW-7_SOT363-6
2
61
PC209
1U_0603_25V6K
1 2
PT200
PAD@
PC206
10U_0805_25V6K
12
PR214
499K_0402_1%
12
PC228
0.01UF_0402_25V7K
@
1 2
PR213
10_1206_5%
1 2
PR283
10_0402_1%
@
12
PC271
15P_0402_50V8J
12
PC210
0.1U_0402_25V6
1 2
PR294
100K_0402_1%
12
PC213
.1U_0402_16V7K
@
12
PC227
0.1U_0402_25V6
1 2
PR292
10K_0402_1%
12
PC219
100P_0402_50V8J
1 2
PC202
0.1U_0402_25V6
12
PC224
680P_0603_50V7K
12
PD201
BAT54HT1G_SOD323-2
12
PC203
2200P_0402_50V7K
12
PR211
1M_0402_5%
@
12
PL205
FBMA-L11-201209-221LMA35_2P
1 2
PC230
10U_0805_16V6K
1 2
PL206
FBMA-L11-201209-221LMA35_2P
1 2
PQ201
MDS1521URH_SO8
3
2
1
4
5
6
7
8
PR291
1M_0402_1%
12
PR212
200K_0402_1%
@
1 2
PR282
1_0402_5%
@
1 2
PC208
0.022U_0402_25V7K
12
G
D
S
PQ207
2N7002KW_SOT323-3
@
2
13
PC212
1U_0603_10V6K
1 2
PC200
0.1U_0402_25V6
12
PC221
10U_0805_16V6K
12
PR221
0_0402_5%
@
1 2
PR223
120K_0402_1%
12
PR293
1M_0402_1%
12
PU200
BQ24715RGRR_QFN20_3P5x3P5
ACP 2
ACDET
6
SDA
8
CELL
10
SRN
12
REGN 16
HIDRV 18
ACDRV 4
GND
14
ACN 1
CMSRC 3
ACOK 5
IOUT
7
SCL
9
/BATDRV
11
SRP
13
LODRV
15
BTST 17
VCC 20
PHASE 19
PAD 21
PR201
0.01_2512_1%
1
3
4
2
PQ204
CSD87351Q5D_SON8-7
1
2
5
4
6
7
3
8
PC223
10U_0805_16V6K
12
PC232
10U_0805_16V6K
1 2
PR207
0_0603_5%
@
12
PR202
5.1K_0805_1%
@
12
PR219
0.01_2512_1%
1
3
4
2
PR230
0_0402_5%
@
1 2
PR224
10K_0402_1%
1 2
PC270
15P_0402_50V8J
12
PC220
0.1U_0402_25V6
12
PR215
2.2_0603_5%
1 2
PC261
1U_0603_10V6K
1 2
PD200
RB751V-40_SOD323-2
1 2
PC250
0.1U_0402_25V6
@
12
PC226
0.1U_0402_25V6
1 2
PR209
0_0402_5%
@
12
PC251
1U_0402_6.3V6K
@
1 2
PR217
100K_0402_1%
12
G
D
S
PQ202
2N7002-7-F_SOT23-3
@
2
13
PC204
10U_0805_25V6K
12
PR216
82.5K_0402_1%
12
PR220
0_0402_5%
@
1 2
PR204
1M_0402_5%
@
12
PC260
.01U_0402_16V7K
12
PC252
0.1U_0402_25V6
@
12
PR227
4.02K_0402_1%
1 2
PR281
0_0402_5%
@
1 2
G
D
S
PQ203A
DMN66D0LDW-7_SOT363-6
@
2
61
G
D
S
PQ230
L2N7002WT1G_SC70-3
2
13
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
3.3VALWP
TDC 4.6A
Peak Current 6.5A
OCP current 7.8A
5VALWP
TDC 7.9A
Peak Current 11.3A
OCP current 13.4A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EMI Parts
EMI Parts
EMI Parts
EMI Parts
BST_5V
FB_5V
LX_3V
FB_3V
UG_5V
LG_5V
LX_5V
LG_3V
UG_3V
3VA_EN
5VA_EN
BST1_3V BST_3V
BST1_5V
SNUB_3V
SNUB_5V
POK
18,52
5VA_EN 38
3VA_EN
38
B++
+5VALWP
+3VALWP
B++
B++
B+
+3VLP
+5VALWP
+3VALW +5VALW
+3VALWP
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-3VALWP/5VALWP
54 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-3VALWP/5VALWP
54 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-3VALWP/5VALWP
54 62Wednesday, September 04, 2013
Compal Electronics, Inc.
PR338
0_0402_5%
@
12
PJP301
PAD-OPEN 4x4m
@
1 2
PR306
40.2K_0402_1%
1 2
PR310
4.7_1206_5%
12
PR304
20K_0402_1%
1 2
PQ300
MDV1528URH_PDFN33-8-5
4
5
1
2
3
PR340
0_0402_5%
@
1 2
PR302
20K_0402_1%
1 2
PC304
2200P_0402_50V7K
12
PL301
3.3UH_FDSD0630-H-3R3M-P3_6.6A_20%
1 2
PJP303
PAD-OPEN 4x4m
@
1 2
PC314
.1U_0402_16V7K
@
12
PJP302
PAD-OPEN 4x4m
@
1 2
PJP300
JUMP_43X118
@
1
122
PQ302
MDV1524URH_PDFN33-8-5
5
4
2
1
3
PC319
1U_0603_10V6K
12
PC305
10U_0805_25V6K
12
PR300
13.7K_0402_1%
1 2
PQ303
MDU1512RH_POWERDFN56-8-5
4
5
1
2
3
PC316
680P_0603_50V7K
12
+
PC313
150U_B2_6.3VM_R35M
1
2
PQ301
MDU1516URH_POWERDFN56-8-5
4
5
1
2
3
PC303
0.1U_0402_25V6
12
PC317
680P_0603_50V7K
12
PC311
0.1U_0603_50V7K
1 2
PR301
30.9K_0402_1%
1 2
PC306
0.1U_0402_25V6
12
PR307
2.2_0603_5%
1 2
PR335
0_0402_5%
@
12
PR337
0_0402_5%
@
1 2
PR341
0_0402_5%
@
1 2
TPS51225CRUKR_QFN20_3X3
PU300
CS1 1
VFB1 2
VREG3 3
VFB2 4
CS2 5
EN2
6
PGOOD
7
SW2
8
VBST2
9
DRVH2
10
DRVL2
11
VIN
12
VREG5
13
VO1
14
DRVL1
15
DRVH1 16
VBST1 17
SW1 18
VCLK 19
EN1 20
PAD 21
PC340
15P_0402_50V8J
12
PR308
2.2_0603_5%
1 2
PC315
.1U_0402_16V7K
@
12
+
PC312
150U_B2_6.3VM_R35M
1
2
PC310
0.1U_0603_50V7K
1 2
PL300
1.5UH_ETQP3W1R5WFN_9.5A_20%
1 2
PR350
200_0402_1%
@
1 2
PR309
4.7_1206_5%
12
PC307
1U_0603_10V6K
12
PC309
10U_0805_25V6K
12
PC302
100P_0402_50V8J
@
1 2
PC320
0.1U_0402_25V6
12
PC308
2200P_0402_50V7K
12
PC301
100P_0402_50V8J
@
1 2
PR305
62K_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
0.675Volt +/- 5%
TDC 0.7A
Peak Current 1A
OCP Current 1.1A
FB sense trace
1.35Volt +/- 5%
TDC 7.2A
Peak Current 10.2A
OCP current 12.2A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ST change to short pads
EMI Parts
EMI Parts
DH_1.35V
SW _1.35V
1.35V_B+
VDD_1.35V
+VLDOIN_1.35V
+1.35V_MEN_P
+1.35V_PWROK
SNUB_1.35V
BOOT_1.35V
1.35V_B+
1.35V_FB
+1.35V_MEN_P
+1.35V_MEN_P
DL_1.35V
CS_1.35V
S5_1.35V
PM_SLP_S4#
18,38
+1.35V_PWROK
8
PM_SLP_S3#
18,34,38,40,43,56
+1.35V
B+
+5VALW
+5VALW
+0.675VS
+V_DDR_REF
+0.675VSP
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
+1.35V_MEN/+0.675V_DDR_VTT
55 62Thursday, September 05, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
+1.35V_MEN/+0.675V_DDR_VTT
55 62Thursday, September 05, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
+1.35V_MEN/+0.675V_DDR_VTT
55 62Thursday, September 05, 2013
Compal Electronics, Inc.
PC405
10U_0805_6.3V6M
12
PR408
20K_0402_1%
12
PU400
G5616ARZ1U_TQFN20_3X3
VTTSNS 2
VDDQSET
6
S5
8
PGOOD
10
VPP
12
LX 16
BST 18
VTTREF 4
PGND
14
VTTGND 1
GND 3
VDDQSNS 5
S3
7
TON
9
VCC
11
CS
13
DL
15
DH 17
VTT 20
VLDOIN 19
PAD 21
PR405
16.2K_0402_1%
1 2
PC404
0.22U_0603_16V7K
1 2
PR400
2.2_0603_5%
1 2
PC402
0.1U_0402_25V6
12
PC411
.1U_0402_16V7K
12
PC406
10U_0805_6.3V6M
12
PC400
10U_0805_25V6K
12
PC401
10U_0805_25V6K
12
PL400
1UH_FDSD0630-H-1R0M-P3_11A_20%
1 2
PJP400
JUMP_43X118
@
1
122
PJP404
PAD-OPEN 4x4m
@
12
PR407
0_0402_5%
@
1 2
PR402
5.1_0603_5%
1 2
PC409
680P_0603_50V7K
12
PR403
4.7_1206_5%
12
PR401
7.15K_0402_1%
1 2
PC412
22P_0402_50V8J
@
1 2
PJP401
PAD-OPEN1x1m
@
12
PC403
2200P_0402_50V7K
12
PJP402
PAD-OPEN 3x3m
@
1 2
PQ400
MDV1527URH_POWERDFN33-8-5
4
5
1
2
3
PR406
1M_0402_1%
1 2
PR409
0_0402_5%
@
1 2
PC410
1U_0603_10V6K
12
+
PC408
330U_B2_2.5VM_R9M
1
2
PC407
1U_0603_10V6K
1 2
PQ401
MDV1522URH_PDFN33-8-5
5
4
2
1
3
PJP403
PAD-OPEN 4x4m
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCP(1.05V)
TDC 6.5A
Peak Current 9.2A
OCP current 11.1A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EMI Parts
EMI Parts
BST_+V1.05V
SW_+V1.05V
UG_+V1.05V
LG_+V1.05V
FB_+V1.05V
RF_+V1.05V
+V1.05V_B+
TRIP_+V1.05V
EN_+V1.05V
+V1.05S_VCCP_PW RGOOD
38,8
PM_SLP_S3#
18,34,38,40,43,55
B+
+5VALW
+VCCP
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-V1.05S_VCCPP
56 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-V1.05S_VCCPP
56 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR-V1.05S_VCCPP
56 62Wednesday, September 04, 2013
Compal Electronics, Inc.
PJP500
JUMP_43X118
@
11
2
2
PQ501
MDV1524URH_PDFN33-8-5
5
4
2
1
3
PU500
RT8237EZQW(2)_WDFN10_3X3
EN
3
CS
2
VCC 7
UGATE 9
PHASE 8
LGATE 6
BOOT 10
RF
5
FB
4
PGOOD
1
TP 11
PR507
10.5K_0402_1%
1 2
PC503
10U_0805_25V6K
12
PJP501
PAD-OPEN 4x4m
@
1 2
+
PC507
150U_B2_6.3VM_R35M
1
2
PJP502
PAD-OPEN 4x4m
@
1 2
PC509
1000P_0402_50V7K
12
PC502
10U_0805_25V6K
12
PR505
200K_0402_1%
12
PR501
2.2_0603_5%
1 2
PL500
1UH_FDSD0630-H-1R0M-P3_11A_20%
1 2
PC504
0.1U_0603_50V7K
1 2
PR510
10_0603_5%
1 2
PR502
90.9K_0402_1%
1 2
PC511
0.1U_0402_25V6
12
PC510
1000P_0402_50V7K
@
1 2
PR504
4.7_1206_5%
12
PR503
0_0402_5%
@
1 2
PR508
20K_0402_1%
12
PC506
1U_0603_10V6K
1 2
PQ500
MDV1528URH_PDFN33-8-5
4
5
1
2
3
PC500
0.1U_0402_25V6
12
PC501
2200P_0402_50V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
1.5Volt +/-5%
TDC 9.7A
Peak Current 13.8A
OCP current 16A (Fix)
EMI Parts
EMI Parts
+1.5V_RUN_B+
+1.5V_VSNS
+1.5V_VSNS
REF_+1.5V_RUNP
BST_+1.5VRUN
SW_+1.5VRUN
DGPU_FB_EN
33
B+
+5VALW
+1.5VSDGPU
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR_+1.5VRUN
57 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR_+1.5VRUN
57 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PWR_+1.5VRUN
57 62Wednesday, September 04, 2013
Compal Electronics, Inc.
PC621
4.7U_0805_16V7K
@
12
PR600
100K_0402_1%
1 2
PC610
4.7U_0805_16V7K
12
PJP601
PAD-OPEN 4x4m
@
1 2
PR607
10_1206_5%
12
PC602
4700P_0402_25V7K
12
PT601
PAD
@
PC614
.1U_0603_25V7K
12
PJP602
PAD-OPEN 4x4m
@
1 2
PL600
0.68UH_PCMC063T-R68MN_15.5A_20%
1 2
PJP600
PAD-OPEN 3x3m
@
12
PC613
22U_0805_6.3VAM
1
2
PC612
22U_0805_6.3VAM
1
2
PC603
4.7U_0805_16V7K
12
PR608
5.1_0603_5%
12
PC620
47P_0402_50V8J
12
PC611
22U_0805_6.3VAM
1
2
PC601
2200P_0402_50V7K
12
PC607
33P_0603_50V8J
12
PC605
.1U_0402_16V7K
1 2
PC600
.1U_0402_16V7K
12
PU600
TPS51367RVER_QFN28_4P5X3P5
VREF
26
RA
27
GND 19
PGND 12
REFIN2
24
REFIN
25
VSNS 22
SLEW 21
TRIP 20
PGND 11
NC
4
PGOOD
1
LP#
2
MODE
3
PGND 10
GSNS 23
BST
5
SW
6
SW
7
SW
8
SW
9
PGND 13
PGND 14
VIN 15
VIN 16
VIN 17
V5 18
EN
28
TP
29
PC604
1U_0603_10V7K
1 2
PR602
300K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC_core (Base on PDDG rev 1.0) (1.8V)
TDC 21A
TDC PL2 (40Sec):26A
Peak Current 55A
DC Load line -1.5mV/A
AC Load line -2.4mV/A
Icc_Dyn_VID1 35A
OCP Current 66A
DCR 0.82mohm +/-5%
TYP MAX
H/S Rds(on) : 7.4mohm, 8.8mohm
L/S Rds(on) : 2.6mohm, 3.1mohm
Local sense put on HW site
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
EMI Parts
EMI Parts
EMI Parts
EMI Parts
UGATE2
PHASE2
BOOT2
UGATE2
UGATE1
PHASE2
BOOT2
LGATE2
BOOT1 P1_SW
BOOT1
PHASE1
UGATE1
LGATE1
LGATE1
NTC
LGATE2
+VCC_PWR_SRC1
SCLK
ALERT#
SDA
VR_ON_VCORE
VR_HOT_CPU
COMP
FB
FB2/VSEN
ISEN1
ISUMP
ISUMN
ISUMN
ISUMP
V1N
ISUMN
V2N
ISEN1
P2_SW
ISUMP
V1N
ISEN2
V2N
ISUMN
+VCC_PWR_SRC1
+VCC_PWR_SRC2
IMON
VCORE_VDDP
ISEN2
PHASE1
FB
VCC_PGOOD
VR_SVID_DAT
12
IMVP_VR_PG
18,38,6
VR_SVID_ALRT#
12
VR_SVID_CLK
12
VR_ON
38
H_PROCHOT#
38,53,8
VSSSENSE
13
VCCSENSE
12
+VCC_CORE
+VCC_CORE
+VCCP
B+
+VCCIO_OUT
+3VS
+5VS
+5VS
B+
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
+VCC_CORE
58 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
+VCC_CORE
58 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
+VCC_CORE
58 62Wednesday, September 04, 2013
Compal Electronics, Inc.
PR717
10_0402_1%
12
PR722
499_0402_1%
1 2
PC703
10U_0805_25V6K
12
PC709
1000P_0402_50V8-J
1 2
PC730
0.33U_0603_10V7K
1 2
PR740
2.2_0603_5%
1 2
PC717
10U_0805_25V6K
12
PR726
100K_0402_5%
@
1 2
PL702
0.36UH_FDUE1040J-H-R36M-P3_33A_20%
1
3
4
2
PC702
10U_0805_25V6K
12
PC733
0.022U_0402_25V7K
1 2
PR725
0_0402_5%@
1 2
PR744
1_0402_5%
@
1 2
PC761
47P_0402_50V8J
12
PC737
0.01U_0402_50V7K
1 2
PC701
10U_0805_25V6K
12
PC716
10U_0805_25V6K
12
PC762
47P_0402_50V8J
12
PR709
16.9K_0402_1%
1 2
PC732
0.022U_0402_25V7K
1 2
PR715
100K_0603_1%
1 2
PR733
1.65K_0402_1%
1 2
PR730
1_0603_1%
1 2
PR721
1_0402_5%
@
1 2
PC704
0.1U_0402_25V6
12
PQ700
CSD87351Q5D_SON8-7
1
2
5
4
6
7
3
8
PC724
33P_0402_50V8J
12
PJP701
JUMP_43X118
@
11
2
2
PR734
390_0402_1%
12
PC719
2200P_0402_50V7K
12
PR705
0_0402_5%@
1 2
PC706
0.22U_0603_16V7K
1 2
+
PC700
100U_D2_16VM_R50M
1
2
PC718
100P_0402_50V8J
1 2
PC738
.1U_0402_16V7K
12
PC734
330P_0402_50V7K
@
1 2
PH700
470K_0402_5%_TSM0B474J4702RE
1 2
PR701 75_0402_5%@
1 2
PU700
ISL95812HRZ-T_QFN32_4x4
SCLK
1
VR_ON
2
PGOOD
3
IMON
4
VR_HOT#
5
NTC
6
COMP
7
FB
8
FB2/VSEN
9
ISEN3
10
ISEN2
11
ISEN1
12
RTN
13
ISUMN
14
ISUMP
15
VDD
16
VIN 17
BOOT1 18
UGATE1 19
PHASE1 20
LGATE1 21
PWM3 22
VDDP 23
LGATE2 24
PHASE2 25
UGATE2 26
BOOT2 27
PROG2 28
SLOPE/PROG1 30
SDA 31
ALERT# 32
PAD
33
PROG3 29
PC727
0.22U_0603_16V7K
1 2
PC721
0.1U_0402_25V6
12
PR704
73.2K_0402_1%
1 2
PC728
33P_0603_50V8J
12
PC722
2700P_0402_50V7K
@
12
PC707
33P_0603_50V8J
12
PC708
1U_0603_10V6K
1 2
PR738
2K_0402_1%
@
12
PQ703
CSD87351Q5D_SON8-7
1
2
5
4
6
7
3
8
PC705
2200P_0402_50V7K
12
PR700 130_0402_5%
1 2
PR702 54.9_0402_1%
1 2
PL705
HCB2012KF-121T50_0805
@
1 2
PC731
0.022U_0603_50V7K
1 2
PC729
0.082U_0402_16V7K
@
1 2
PC726
0.022U_0402_16V7K
12
PR727
27.4K_0402_1%
1 2
PR736
2K_0402_1%
12
PR724
3.83K_0402_1%
1 2
PR741
3.65K_0603_1%
1 2
PR712
0_0402_5%
@
12
PR713
2.2_0603_5%
1 2
PJP700
JUMP_43X118
@
11
2
2
PR745
10_0402_1%
12
PR703
0_0402_5%@
1 2
PR718
95.3K_0402_1%
1 2
PR714
3.65K_0603_1%
1 2
PC710
47P_0402_50V8J
12
PR742
100K_0603_1%
1 2
PR749
3.57K_0402_1%
1 2
PR707
3.24K_0402_1%
1 2
PR719
0_0402_5%
@
1 2
PC715
10U_0805_25V6K
12
PR711
1.91K_0402_1%
1 2
PH701
10K_0402_5%_ERTJ0ER103J
1 2
PR706
0_0402_5%@
1 2
PC714
0.1U_0603_16V7K
12
PR747
0_0402_5%
@
1 2
PR748
11K_0402_1%
1 2
PR732
1K_0402_1%
1 2
PC725
330P_0402_50V7K
@
12
PC711
0.22U_0603_25V7K
12
PR739
845_0402_1%
@
12
PR728
6.04K_0402_1%
1 2
PR716
10_1206_5%
12
PR743
10_1206_5%
12
PR710
0_0402_5%
@
1 2
PC736
0.082U_0402_16V7K
@
12
PL701
0.36UH_FDUE1040J-H-R36M-P3_33A_20%
1
3
4
2
PL700
HCB2012KF-121T50_0805
@
1 2
GPU_CORE (0.95V)
TDC 45A
Peak Current 75A
OCP current 86A
DCR 0.97mohm +/- 5%
TYP MAX
H/S Rds(on) : 7.4mohm , 8.1mohm
L/S Rds(on) : 2.6mohm , 3.1mohm
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
Pull high by EE side
Pull high by EE side
EMI Parts
EMI Parts
EMI Parts
EMI Parts
EMI Parts
EMI Parts
U2_BOOT1
U2_BOOT2
U2_PHASE2
U2_BOOT1
U2_UGATE1U2_UGATE2
GPU_PGOOD
U2_PHASE3
GPU_FB
GPU_COMP
GPU_FBRTN
GPU_TON
GPU_VREF
GPU_REFADJ
GPU_EN
GPU_REFIN
GPU_VID
U2_PHASE1
U2_BOOT2
U2_LGATE1
GPU_PVCC
U2_PHASE1
U2_LGATE1
U2_PWM3
U2_LGATE2
U2_PHASE2
U2_LGATE2
U2_UGATE1
U2_UGATE2
U2_PHASE3
U2_LGATE3
U2_UGATE3
U2_PWM3
U2_BOOT3
U2_PHASE2
U2_PHASE1
GPU_VID_0 24
GPU_VSS_SENSE
25
GPU_VDD_SENSE
25
DGPU_PWR_EN 18,24,33
DGPU_PWROK 20,33
GPU_PSI 24
+GPU_CORE
+GPU_CORE
+5VS
+VGA_B+
B+
+VGA_B+
+VGA_B+
+VGA_B+
+5VS
+3VS_DELAY
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
VGA_CORE
59 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
VGA_CORE
59 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
VGA_CORE
59 62Wednesday, September 04, 2013
Compal Electronics, Inc.
PC804
4.7U_0805_16V7K
12
PR819
100_0402_1%
1 2
PC813
0.1U_0603_50V7K
1 2
PC800
0.1U_0603_50V7K
1 2
PC822
33P_0603_50V8J
12
PC850
47P_0402_50V8J
12
PQ802
CSD87351Q5D_SON8-7
1
2
5
4
6
7
3
8
PR852
10K_0402_1%
1 2
PR801
2.2_0603_5%
1 2
PC818
0.1U_0402_25V6
@
12
PC825
0.01UF_0402_25V7K
@
1 2
PR850
10K_0402_1%
1 2
PR824
0_0402_5%
@
1 2
PC807
0.1U_0402_25V6
12
PC821
33P_0402_50V8J
@
1 2
PR815
20_0402_1%
1 2
PR853
0_0402_5%
@
1 2
PC833
4.7U_0805_16V7K
12
PR806
10_1206_5%
12
PR809
20K_0402_1%
1 2
PR832
2.2_0603_5%
1 2
PC811
2700P_0402_50V7K
12
PC851
47P_0402_50V8J
12
PU801
RT9610BZQW_WDFN8_2X2~D
LGATE 7
GND
6
BOOT 4
UGATE 3
PWM
5VCC
8
EN
1
PHASE 2
GND
9
PC812
0.01UF_0402_25V7K
12
PC837
0.1U_0402_25V6
@
12
PC805
0.1U_0402_25V6
@
12
PR825
100_0402_1%
1 2
PQ800
CSD87351Q5D_SON8-7
1
2
5
4
6
7
3
8
PC814
4.7U_0805_16V7K
12
PC852
47P_0402_50V8J
12
PR827
15.8K_0402_1%
@
1 2
PL801
0.22UH_FDUE0640-H-R22M=P3_25A_20%
1 2
PC819
2200P_0402_50V7K
@
12
+
PC830
330U_B2_2.5VM_R9M
1
2
PL803
0.22UH_FDUE0640-H-R22M=P3_25A_20%
1 2
PC809
33P_0603_50V8J
12
PR817
620K_0402_1%
1 2
PR851
10K_0402_1%
1 2
PL802
0.22UH_FDUE0640-H-R22M=P3_25A_20%
1 2
+
PC829
330U_B2_2.5VM_R9M
1
2
PC806
2200P_0402_50V7K
@
12
PR837
10.5K_0402_1%
12
PR818
0_0402_5%
@
1 2
PC834
4.7U_0805_16V7K
12
PC836
2200P_0402_50V7K
@
12
PC824
.01U_0402_16V7K
@
1 2
PR823
0_0402_5%
@
1 2
PR836
0_0402_5%@
1 2
PR842
1_0402_5%
1 2
PR804
19.6K_0402_1%
12
PR813
2.2_0603_5%
1 2
PC832
4.7U_0805_16V7K
12
PJP800
JUMP_43X118
@
11
2
2
PC838
33P_0603_50V8J
12
PC839
0.1U_0603_50V7K
1 2
PR803
2.2K_0402_1%
12
PC820
.01U_0402_16V7K
@
12
PC803
4.7U_0805_16V7K
12
PR830
10_1206_5%
12
PU800
RT8813AGQW_WQFN24_4X4
TON
9
RGND
10
REFIN
7
VREF
8
VSNS
11
SS
12
TALERT/ISEN2
14
BOOT1 1
LGATE1 23
PVCC 21
PSI 4
GND/PWM3 22
LAGTE2 20
BOOT2
18
UGATE2
17
TSNS/ISEN3
13
PGOOD
16 EN 3
VID 5
UGATE1 2
PHASE1 24
VCC/ISNE1
15
REFADJ 6
PHASE2 19
GND
25
PC810
.01U_0402_16V7K
@
12
PR812
18.2K_0402_1%
12
PC815
4.7U_0805_16V7K
12
PR807
2K_0402_1%
1 2
PC802
4.7U_0805_16V7K
12
PR822
10_1206_5%
12
PC816
4.7U_0805_16V7K
12
PQ801
CSD87351Q5D_SON8-7
1
2
5
4
6
7
3
8
PR841
47K_0402_1%
1 2
PC801
4.7U_0805_16V7K
12
+
PC831
330U_B2_2.5VM_R9M
1
2
PC835
4.7U_0805_16V7K
12
PC817
4.7U_0805_16V7K
12
PC823
.1U_0603_25V7K
12
PR821
2.2_0603_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+GPU_CORE (place under GPU)
+GPU_CORE (place near GPU)
Based on PDDG
rev 1.1 Table 5-2.
Design guilde:
+VCC_CORE
1. 470uF*4 (SGA0000420L)
2. 22uF*20 (SE000008L80)
3. 10uF*4 (SE160106M8L)
4. 1uF*20 (SE000000K8L)
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Under:
1. 4.7uF*10 (SE000008L80)
2. 0.1uF*4 (SE160106M8L)
Near:
1. 4.7uF*5 (SE093475K80)
2. 22uF*1 (SE000001120)
3. 47uF*1 (SE00000PL0L)
4. 33uF*1 (SGA20331E10)
EMI Parts
+VCC_CORE
+VCC_CORE
+VCC_CORE
+GPU_CORE
+GPU_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PROCESSOR DECOUPLING
60 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PROCESSOR DECOUPLING
60 62Wednesday, September 04, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9941P
0.1
PROCESSOR DECOUPLING
60 62Wednesday, September 04, 2013
Compal Electronics, Inc.
PC927
1U_0402_6.3V6K
12
PC944
4.7U_0603_6.3VAK
12
PC915
4.7U_0603_6.3VAK
12
PC934
1U_0402_6.3V6K
12
PC993
15P_0402_50V8J
@
12
PC919
4.7U_0603_6.3VAK
12
PC936
.1U_0402_16V7K
12
PC982
22U_0805_6.3VAM
1
2
PC976
22U_0805_6.3VAM
1
2
PC942
4.7U_0603_6.3VAK
12
PC959
22U_0805_6.3V6M
12
PC941
4.7U_0603_6.3VAK
12
PC962
4.7U_0805_6.3V6K
1
2
PC909
1U_0402_6.3V6K
12
PC965
22U_0805_6.3VAM
1
2
PC978
22U_0805_6.3VAM
1
2
PC981
22U_0805_6.3VAM
1
2
PC940
4.7U_0603_6.3VAK
12
PC905
1U_0402_6.3V6K
12
PC954
10U_0805_6.3V6K
1
2
PC999
15P_0402_50V8J
@
12
PC969
22U_0805_6.3VAM
1
2
PC911
4.7U_0603_6.3VAK
12
PC980
22U_0805_6.3VAM
1
2
PC902
1U_0402_6.3V6K
12
PC998
15P_0402_50V8J
@
12
PC971
22U_0805_6.3VAM
1
2
PC935
1U_0402_6.3V6K
12
PC914
4.7U_0603_6.3VAK
12
PC996
15P_0402_50V8J
@
12
PC916
4.7U_0603_6.3VAK
12
+
PC923
330U_D2_2.5VY_R9M
1
2
PC1001
15P_0402_50V8J
@
12
PC926
1U_0402_6.3V6K
12
PC972
22U_0805_6.3VAM
1
2
PC904
1U_0402_6.3V6K
12
PC938
.1U_0402_16V7K
12
PC974
22U_0805_6.3VAM
1
2
PC917
4.7U_0603_6.3VAK
12
PC910
4.7U_0603_6.3VAK
12
+
PC922
330U_D2_2.5VY_R9M
@
1
2
PC983
22U_0805_6.3VAM
1
2
PC918
4.7U_0603_6.3VAK
12
PC977
22U_0805_6.3VAM
1
2
PC933
1U_0402_6.3V6K
12
PC968
22U_0805_6.3VAM
1
2
PC930
1U_0402_6.3V6K
12
PC963
4.7U_0805_6.3V6K
1
2
PC955
10U_0805_6.3V6K
1
2
PC943
4.7U_0603_6.3VAK
12
PC907
1U_0402_6.3V6K
12
PC967
22U_0805_6.3VAM
1
2
+
PC924
330U_D2_2.5VY_R9M
@
1
2
PC992
15P_0402_50V8J
@
12
PC1002
15P_0402_50V8J
@
12
PC961
4.7U_0805_6.3V6K
1
2
PC990
4.7U_0805_6.3V6K
1
2
PC906
1U_0402_6.3V6K
12
PC913
4.7U_0603_6.3VAK
12
PC901
1U_0402_6.3V6K
12
PC937
.1U_0402_16V7K
12
PC991
15P_0402_50V8J
@
12
PC979
22U_0805_6.3VAM
1
2
PC966
22U_0805_6.3VAM
1
2
PC929
1U_0402_6.3V6K
12
PC908
1U_0402_6.3V6K
12
PC997
15P_0402_50V8J
@
12
PC956
10U_0805_6.3V6K
1
2
PC912
4.7U_0603_6.3VAK
12
PC995
15P_0402_50V8J
@
12
PC958
47U_0805_6.3V6M
12
+
PC921
330U_D2_2.5VY_R9M
1
2
PC984
22U_0805_6.3VAM
1
2
PC994
15P_0402_50V8J
@
12
PC975
22U_0805_6.3VAM
1
2
PC1000
15P_0402_50V8J
@
12
PC953
10U_0805_6.3V6K
1
2
PC964
4.7U_0805_6.3V6K
1
2
PC928
1U_0402_6.3V6K
12
PC932
1U_0402_6.3V6K
12
PC900
1U_0402_6.3V6K
12
PC939
.1U_0402_16V7K
12
PC970
22U_0805_6.3VAM
1
2
PC903
1U_0402_6.3V6K
12
PC973
22U_0805_6.3VAM
1
2
PC931
1U_0402_6.3V6K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
B+
DC IN NVDC
CHARGER
BQ24715
Page 53
Battery
(3S3P)
+VCCP TDC:6.5A
RT8237E Page 56
Page 55
+VCCP
+1.35V TDC:7.2A
+0.675VS TDC:0.7A
G5616A
+1.35V
+0.675VS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+3VALW TDC:4.6A
+5VALW TDC:7.9A
TPS51225C Page 54
+5VALW
+1.5V_RUN TDC: 9.7A
TPS51367
+1.5VS
+VCC_CORE TDC: 21A
ISL95812 Page 58
Page 59
VGA_CORE TDC: 45A
RT8813A
+VCC_CORE
+GPU_CORE
+3VALW
Page 57
Title
Size Document Number Rev
Date: Sheet of
0.1
POWER BLOCK DIAGRAM
61 62
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
0.1
POWER BLOCK DIAGRAM
61 62
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
0.1
POWER BLOCK DIAGRAM
61 62
Wednesday, September 04, 2013
Compal Electronics, Inc.
LA-9941P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EC pay attention timing
+VCCP
PCH_DPWROK
PCH_RSMRST#
PCH_PWR_EN
+3V_PCH
PCH_RSMRST# SUSCLK
+3V_PCH
+3V_PCH
[AC in]
Low pluse widthPBTN_OUT#
PBTN_SW#
[Battery only, AC absent]
T1
T2
T3
ITEM Measure Point
PCH_PWR_EN
T16
T17
T6
T4
T5
Time
T19
T20
T21
T22
T7
T13
T14
T15
T23
T24
T25
T18
T26
To
To
To
To
To
To
To
To
To
To
To
To
To
To
To
To
To
To
To
To
To
T1
+3V_PCH
PCH_DPWROK
PCH_PWR_EN T2
PCH_RSMRST#
To
10ms < T4 (RSMRST# de-assert at least 10 ms after VccSUS power are valid)
10ms < T3 (DPWROK assert at least 10 ms after VccDSW power are valid)
AC_PRESENT
To
To
T6 < 90ms
PBTN_OUT# 16ms < T7 < 4s
PM_SLP_S5#
To
To
To
To
To
T9
To
To
To
WLAN_EN
+3VS_WLAN
PM_SLP_S4#
+1.5V
+1.5V_PWROK
SUSP#
+1.8V_PWROK
+1.5VS
+3VS
+5VS
+V1.05S_VCCP_PWRGOOD
HWPG
SYSON
30us < T8
T10
T11
T12
T13
30us < T14
T15
T16
T17
T18
T19
T21
T22
To
SUSP# DGPU_PWREN
+1.8VS T20
T23
GPU power on sequence
Discrete Power On Sequence
Output
Output
Output
Output
Output
Output
Output
Output
Output
DGPU_PWREN
Input
Input
T29
PM_SLP_S3#Input
CPU1.5V_S3_GATEOutput
+1.5V_CPU_VDDQ
+0.75VSP
T26
T27
T24
+VCCSA
SA_PGOOD
VR_ON
Input
T28
PCH_PWROK
PCH_PLTRST#
+VCC_CORE
VGATE
SYS_PWROK
PM_DRAM_PWRGD
SVID
H_CPUPWRGD
T36
T37
99ms < T31
5ms > T34
PCH Output
PCH Output
Output
Input
T35
T33
SUSCLKPCH Output
T5
T32
T38
PCH_RSMRST# AC_PRESENT
To
+3VS_DELAY
+GPU_CORE
T11
T12
T8
T9
T10
To
To
To
To
To
T25
[AC in]
+5VALW
B+
EC_ON
ACIN
+3VALW
Td
Tc
Ta
[Battery only, AC absent]
Tb
B+
ACIN Ta
PBTN_SW#
+5VALW
EC_ON
+3VALW
Td
Tc+3VLP
Te
+VSBP
Tf
Tg
+3VLP
Te
Tf+VSBP
PBTN_SW# 1ns < Tg < 4s
1ns < Tg < 4s
T30
+1.5VSDGPU
+1.05VSDGPU
RC Delay
Minimum duration of PWRBTN # assertion = 16mS after SUSCLK stable
SUSP#
T39
TimeMeasure PointITEM
Tb
Ta
Tf
Te
Td
Tc
Tg
To
Measure PointITEM Time
To
Td
Tc
Tb
Te
To
To
To
Ta
ACINB+
Tg
Tf
EC_ON
PBTN_SW#
+VSBP
ACIN
To
To
To
To
To
To
+3VALW
EC_ON +5VALW
EC_ON
EC_ON
+3VLP
Low pluse width N/A
+3VALW
B+ ACIN
N/ALow pluse widthPBTN_SW #
EC_ON
PBTN_SW# +3VLP
EC_ON
EC_ON +5VALW
To
+VSBPEC_ON
+3VLP
+3VLP
PM_SLP_S5# PM_SLP_S4#
WLAN_ENPM_SLP_S5#
WLAN_EN +3VS_WLAN
PM_SLP_S4# SYSON
+1.5VSYSON
+1.5V_PWROK+1.5V
PM_SLP_S4# PM_SLP_S3#
PM_SLP_S3# SUSP#
SUSP# +5VS
SUSP#
SUSP#
+3VS
+1.5VS
SUSP# +1.8VS
+1.8VS +1.8V_PWROK
SUSP# +VCCP
+VCCP +V1.05S_VCCP_PW RGOOD
+VCCSA
+V1.05S_VCCP_PWRGOOD
+VCCSA SA_PGOOD
SA_PGOOD VR_ON
CPU1.5V_S3_GATE VR_ON
T27
T28
T29
T30
T31
T32
T33
T34
T35
T36
T37
T38
T39
T40
RC Delay
T41
RC Delay
T42
RC Delay
T43
T40
T41
T42
T43
To
To
To
To
DGPU_PWREN
DGPU_PWREN
DGPU_PWREN
DGPU_PWREN
+3VS_DELAY
+GPU_CORE
+1.5VSDGPU
+1.05VSDGPU
CPU1.5V_S3_GATE +1.5V_CPU_VDDQ
+0.75VSPCPU1.5V_S3_GATE
+0.75VSP HWPG
HWPG VR_ON
HWPG PCH_PWROK
PM_DRAM_PWRGDPCH_PWROK
H_CPUPWRGDPM_DRAM_PWRGD
VR_ON SVID
H_CPUPWRGD +VCC_CORE
VGATE+VCC_CORE
SYS_PWROKVGATE
SYS_PWROK PCH_PLTRST#
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERIN G DRAWING IS THE PROPRI ETARY PROPE RTY OF COMPAL ELEC TRONICS, INC . AND CONTAI NS CONFIDENTIA L
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NE ITHER THIS SH EET NOR THE IN FORMATION IT CONTAINS
MAY BE USED B Y OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
62 62Wednesday, September 04, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Power Sequence
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERIN G DRAWING IS THE PROPRI ETARY PROPE RTY OF COMPAL ELEC TRONICS, INC . AND CONTAI NS CONFIDENTIA L
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NE ITHER THIS SH EET NOR THE IN FORMATION IT CONTAINS
MAY BE USED B Y OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
62 62Wednesday, September 04, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Power Sequence
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERIN G DRAWING IS THE PROPRI ETARY PROPE RTY OF COMPAL ELEC TRONICS, INC . AND CONTAI NS CONFIDENTIA L
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NE ITHER THIS SH EET NOR THE IN FORMATION IT CONTAINS
MAY BE USED B Y OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
62 62Wednesday, September 04, 2013
2011/08/25 2012/07/25
Compal Electronics, Inc.
Power Sequence
www.s-manuals.com

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