Compal LA A341P Schematics. Www.s Manuals.com. R1a 20130902a Schematics
User Manual: Motherboard Compal LA-A341P ZIPS1 - Schematics. Free.
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1 2 3 4 5 Compal Confidential A Model Name : ZIPS1 File Name : LA‐A341P BOM P/N: A B B Compal Confidential Stella M/B Schematics Document Intel Shark Bay ULT Processor with DDR3L C C Rev. 1A_20130902A D D Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 Friday, March 07, 2014 Sheet 5 1 of 42 A B C D E Compal Confidential Model Name : ST-Note File Name : Block Diagram 1 1 eDP eDP Conn. mHDMI Conn. P.19 DDI1 Cable Docking P.26 DDI2 RAM-DDR3L On-Board Dual Channel 1.35V P.18 P.16~17 USB 2.0 Intel Shark Bay HDA USB 2.0 USB3.0 2-Ch. SPK Conn. P.20 USB 3.0 P.26 Cable Docking USB 3.0 Conn. P.27 ULT MCP 2 2 DMIC Audio Codec BGA P.20 Combo Jack Conn.P.20 PS8713B PCI-E 1X P.22 WLAN & BT 3 P.28 Sub board ALS P.21 BIOS ROM 8M+4M P.8 (WLAN) 1X TPS2543 Sensor Hub TPM P.30 EC USB 2.0(BT) P.27 Accelerometer & eCompass Touch PanelP.18 LPC mini PCI-E Half Card Conn. P.28 SATA SMBUS SPI Card Reader USB 3.0 Conn AOU4 USB3.0 redriver USB2.0 40mm x 24mm DMIC Gyro Camera & DMIC 3 P.18 P.31 Accelerometer APS NFC Digitizer Int.KBD P.29 P.23 P.21 P.18 NGFF Conn. (mSATA) P.30 Click Pad P.29 Thermal Sensor P.29 m-SATA SSD LID P.29 Track Point P.29 SATA redriver PS8520CT P.24 SSD/HDD P.23 Sub board 4 4 Compal Secret Data Security Classification Issued Date 2013/03/08 Deciphered Date 2015/03/08 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Title Compal Electronics, Inc. SCHEMATIC, MB AA341 Size Document Number Custom 4019P2 Date: Rev C Friday, March 07, 2014 Sheet E 2 of 42 1 2 3 4 5 Voltage Rails SIGNAL +VALW +V +VS Clock HIGH HIGH HIGH HIGH ON ON ON ON S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF STATE Full ON +5VS power plane +3VS +1.5VS +5VALW A +VCCP +1.35V +B A +CPU_CORE +3VM +3VALW +1.05VM State +0.675VS +1.05VS B O S0 O O O O M3 Supported S3 O O O X M3 Supported S5 S4/AC O O X X M3 Supported X X X X S5 S4/ Battery only (AOU Disable) S5 S4/AC & Battery don't exist (AOU Disable) X X SLP_S1# SLP_S3# SLP_S4# SLP_S5# X O O Address HEX Smart Battery 0001 011X b 16H Charger 0001 011X b 12H Board ID 0 1 2 3 4 5 6 7 USB 2.0 Port Table PCB Revision 0.1 BOM Structure Table BTO Item Connector EMI Mount dGPU Intel UMA AOAC TPM SBA Non-SBA DRAM Option X EC SM Bus1 address Device BOARD ID Table BOM Structure ME@ EMI@ DIS@ UMA@ AOAC@ TPM@ SBA@ NOSBA@ DDR1@ Unpop EMI Un-Mount @ @EMI@ EC SM Bus2 address Device Address HEX Thermal Sensor Fintek F75303M 1001_101xb 9AH Synaptics Inter Touch Click Pad 0010_110xb 2CH Device Address HEX Security Rom 1010 100xb A8H USB 2.0 Port 0 1 2 3 4 5 6 7 3 External USB Port USB 3.0 Port + AOU (Left) USB 3.0 Port (Right) USB 3.0 Port (Docking) Mini Card (WLAN/BT) Touch Screen Camera Sensor Hub Digitizer USB 3.0 Port Table PCIE Port Table Port 1 2 3 4 USB 3.0 Port (Left) USB 3.0 Port (Right) USB 3.0 Port (Docking) SATA Port Table B Port 1 2 3 4 5 Port 0 1 2 3 HDD NGFF SSD Lane 6 WLAN Cardreader 0 1 2 3 0 1 2 3 C C PCH SM Bus address D D Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 Friday, March 07, 2014 Sheet 5 3 of 42 1 2 3 4 5 H1 H_2P5 0902A @ @ @ H4 H_2P5 H8 H_2P5 H11 H_2P5 H12 H_2P5 H13 H_2P5 H14 H_2P5 H15 H_2P5 H17 H_2P5 @ @ @ @ @ @ @ @ H2 H_2P1N H18 H_2P5N H20 H_4P0X2P5N H21 NCQF0_MB_SUP_BRK FD1 @ 1 @ 1 @ 1 1 1 1 1 1 1 1 1 FIDUCIAL_C40M80 1 FIDUCIAL_C40M80 1 FD4 1 1 FD3 @ FD2 0509A 1 @ A H6 H_4P0 H9 H_4P0 H10 H_4P0 @ @ @ @ 1 H5 H_4P0 1 FIDUCIAL_C40M80 A 1 FIDUCIAL_C40M80 @ 1 1 1 H7 H_2P8 @ 03/06A H19 H_4P0X2P5 1 ZZZ [AC Mode] @ DAA00074000 [DC Mode] AC_IN BATT+ AC_PRESENT AC_PRESENT B+ B+ +3VLP/+VL +3VLP/+VL T=10ms moniter AC_IN (51_ON) EN_5V/EN_3V ON/OFFBTN# +5VALW/+3VALW T=10ms Moniter ON/OFFBTN# EN_5V/EN_3V ON/OFFBTN# T=10ms +5VALW/+3VALW Moniter ON/OFFBTN# rising edge EC_RSMRST# EC_RSMRST# T=10ms Moniter ON/OFFBTN# and EN_3/5V both of risgin edge SUSCLK PBTN_OUT# SUSCLK 20ms T=110ms PBTN_OUT# Moniter ON/OFFBTN# rising edge 20ms T=110ms Moniter ON/OFFBTN# rising edge B B PM_SLP_S5# Montier PBTN_OUT# falling edge. PM_SLP_S4# PM_SLP_S3# DDR_VTT_PG_CTRL +0.675VS immediately, After PM_SLP_S4# falling edge T=10ms After PM_SLP_S4# moniter PBTN_OUT# SYSON +1.35V immediately, After PM_SLP_S3# falling edge T=10ms After PM_SLP_S3# moniter SYSON rising edge. SUSP# +5VS +3VS +1.8VS C C +1.5VS +1.05VS VCCST_PG_PWR (VCCST Powr Good from PWR IC) D RAM_ID3 RAM_ID2 RAM_ID1 RAM_ID0 GPIO46 GPIO47 GPIO48 GPIO49 0 RAM VCCST_PG_EC (ALL_SYS_PWRGD,non CPU code VR) T=10ms After VCCST_PG_PWR risign edge ,OD pin VR_ON immediately, VCCST_PG_PWR & VCCST_PG_EC risign edge +CPU_CORE 0 0 HYNIX 4GB 0 0 0 1 SAMSUNG 4GB PCH_PWROK 0 0 1 0 MICRON 4GB H_CPUPWRGD 0 0 1 1 ELPIDA 4GB SYS_PWROK 0 1 0 0 SAMSUNG 8GB PCH_PLTRST# 1 0 1 ELPIDA 8GB 0 1 1 0 MICRON 8GB 0 1 1 1 HYNIX 8GB 1 0 0 0 TBD 1 0 0 1 TBD 1 0 1 0 TBD 1 0 1 1 TBD 1 1 0 0 TBD 1 1 0 1 TBD 1 1 1 0 TBD 1 1 1 1 TBD Vboot VGATE 0 0 immediately, After SUSP# falling edge T=10ms After VCCST_PG_EC rising edge T=99ms After VCCST_PG_EC assertion immediately, After SUSP# falling edge immediately, After SUSP# falling edge After CPUPWRGD/PCH_PWRGD/SYS_PWROK assertion D Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Issued Date Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 Friday, March 07, 2014 5 Sheet 4 of 42 5 4 3 2 1 DDI/ MSIC/ XDP D D U1A [26] [26] [26] [26] DP to Docking (2 lane) [19] [19] [19] [19] [19] [19] [19] [19] HDMI C54 C55 B58 C58 B55 A55 A57 B57 CPU_DP1_N0 CPU_DP1_P0 CPU_DP1_N1 CPU_DP1_P1 DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3 C51 C50 C53 B54 C49 B50 A53 B53 CPU_DP2_N0 CPU_DP2_P0 CPU_DP2_N1 CPU_DP2_P1 CPU_DP2_N2 CPU_DP2_P2 CPU_DP2_N3 CPU_DP2_P3 HASWELL_MCP_E @ C45 B46 A47 B47 EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 DDI DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3 [18] [18] [18] [18] C47 C46 A49 B49 EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3 EDP EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 A45 B45 EDP_AUXN EDP_AUXP D20 A43 EDP_RCOMP EDP_DISP_UTIL EDP_COMP CPU_INV_PWM R1 1 2 24.9_0402_1% 1 2 @ R31 0_0402_5% EDP_AUXN [18] EDP_AUXP [18] +VCCIOA_OUT INVPWM [18,9] EDP_COMP: Trace width=20 mils,Spacing=25mil,Max length=100mils 1 OF 19 Rev1p2 C +1.05VS 1 H_CPUPWRGD 2 H_CPUPWRGD C2222 100P_0402_50V8J @EMI@ 0802A [31,33,34,35] H_PROCHOT# @ @ PROC_DET# CATERR# [31] H_PECI D61 K61 N62 PROC_DETECT CATERR PECI MISC JTAG R3 R6 ESD B T111 T2 R2 62_0402_5% HASWELL_MCP_E @ 2 1 U1B 1 2 1 56_0402_5% 2 10K_0402_5% H_PROCHOT#_R H_CPUPWRGD K63 PROCHOT C61 THERMAL 1 [16,17] DIMM_DRAMRST# R29 470_0402_5% SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 DIMM_DRAMRST# DDR_PG_CTRL AU60 AV60 AU61 AV15 AV61 PRDY PREQ PROC_TCK PROC_TMS PROC_TRST PROC_TDI PROC_TDO J62 K62 E60 E61 E59 F63 F62 XDP_PRDY# XDP_PREQ# XDP_TCK XDP_TMS XDP_TRST# XDP_TDI XDP_TDO J60 H60 H61 H62 K59 H63 K60 J61 XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7 XDP_PRDY# XDP_PREQ# XDP_TCK XDP_TMS XDP_TRST# XDP_TDI XDP_TDO 0802A B PROCPWRGD PWR BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7 +1.35V DDR3 Compensation Signals C SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 SM_DRAMRST SM_PG_CNTL1 DDR3 2 2 OF 19To KS RD T16 T107 T15 T97 T98 T99 T100 T101 @ @ @ @ @ @ @ @ PU/PD for JTAG signals Rev1p2 DIMM_DRAMRST# +1.05VS XDP_TMS R15 1 @ 2 51_0402_5% +5VALW XDP_TDI R16 1 @ 2 51_0402_5% XDP_PREQ# R17 1 @ 2 51_0402_5% XDP_TDO R18 1 @ 2 51_0402_5% XDP_TCK R25 1 XDP_TRST# R28 1 1 C90 0.1U_0402_16V4Z DDR3 Compensation Signals 1 +1.35V 2 DDR3 Compensation Signals: 20 mils to comp signals 25 mils to non-comp signals 500 mil for Max trace length U7 DDR_PG_CTRL 2 3 NC VCC A Y R283 220K_0402_5% 5 4 2 1 GND 2 51_0402_5% @ 2 51_0402_5% 74AUP1G07GW_TSSOP5 A R9 R10 R11 1 1 1 2 200_0402_1% 2 120_0402_1% 2 100_0402_1% A SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 DDR_VTT_PG_CTRL [37] Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Sheet Friday, March 07, 2014 1 5 of 42 5 4 3 2 1 Memory I/F D D [16] DDR_A_D[0..63] [17] DDR_B_D[0..63] [16] DDR_A_MA[0..15] [17] DDR_B_MA[0..15] [16] DDR_A_DQS#[0..7] [17] DDR_B_DQS#[0..7] [16] DDR_A_DQS[0..7] [17] DDR_B_DQS[0..7] U1C C B DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 AH63 AH62 AK63 AK62 AH61 AH60 AK61 AK60 AM63 AM62 AP63 AP62 AM61 AM60 AP61 AP60 AP58 AR58 AM57 AK57 AL58 AK58 AR57 AN57 AP55 AR55 AM54 AK54 AL55 AK55 AR54 AN54 AY58 AW58 AY56 AW56 AV58 AU58 AV56 AU56 AY54 AW54 AY52 AW52 AV54 AU54 AV52 AU52 AK40 AK42 AM43 AM45 AK45 AK43 AM40 AM42 AM46 AK46 AM49 AK49 AM48 AK48 AM51 AK51 @ SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63 HASWELL_MCP_E U1D SA_CLK#0 SA_CLK0 SA_CLK#1 SA_CLK1 SA_CKE0 SA_CKE1 SA_CKE2 SA_CKE3 SA_CS#0 SA_CS#1 SA_ODT0 SA_RAS SA_WE SA_CAS SA_BA0 SA_BA1 SA_BA2 3 OF 19 SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15 DDR CHANNEL A SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7 SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7 SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1 AU37 AV37 AW36 AY36 SA_CLK_DDR#0 [16] SA_CLK_DDR0 [16] AU43 AW43 AY42 AY43 AP33 AR32 AP32 DDRA_ODT0 AY34 AW34 AU34 [16] [16] DDRA_CS0_DIMMA# DDRA_CS1_DIMMA# [16] [16] @ DDR_A_RAS# [16] DDR_A_WE# [16] DDR_A_CAS# [16] AU35 AV35 AY41 DDR_A_BS0 [16] DDR_A_BS1 [16] DDR_A_BS2 [16] AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 AP49 AR51 AP51 T4 DDRA_CKE0_DIMMA DDRA_CKE1_DIMMA DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 SM_DIMM_VREFCA [16] SA_DIMM_VREFDQ [16] SB_DIMM_VREFDQ [17] AY31 AW31 AY29 AW29 AV31 AU31 AV29 AU29 AY27 AW27 AY25 AW25 AV27 AU27 AV25 AU25 AM29 AK29 AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26 AM26 AK25 AL25 AY23 AW23 AY21 AW21 AV23 AU23 AV21 AU21 AY19 AW19 AY17 AW17 AV19 AU19 AV17 AU17 AR21 AR22 AL21 AM22 AN22 AP21 AK21 AK22 AN20 AR20 AK18 AL18 AK20 AM20 AR18 AP18 HASWELL_MCP_E @ SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63 SB_CK#0 SB_CK0 SB_CK#1 SB_CK1 SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3 SB_CS#0 SB_CS#1 SB_ODT0 SB_RAS SB_WE SB_CAS SB_BA0 SB_BA1 SB_BA2 4 OF 19 SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15 DDR CHANNEL B SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7 SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7 Rev1p2 AM38 AN38 AK38 AL38 SB_CLK_DDR#0 [17] SB_CLK_DDR0 [17] AY49 AU50 AW49 AV50 AM32 AK32 AL32 DDRB_ODT0 T5 AM35 AK35 AM33 DDRB_CKE0_DIMMA DDRB_CKE1_DIMMA [17] [17] DDRB_CS0_DIMMA# DDRB_CS1_DIMMA# [17] [17] @ C DDR_B_RAS# [17] DDR_B_WE# [17] DDR_B_CAS# [17] AL35 AM36 AU49 DDR_B_BS0 [17] DDR_B_BS1 [17] DDR_B_BS2 [17] AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 B Rev1p2 A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 6 of 42 5 4 3 2 1 RTC/ SATA/ XDP PCH_RTCX1 1 R33 D 2 10M_0402_5% PCH_RTCX2 Y1 1 D 0624A 2 Need to change symbol 32.768KHZ_12.5PF_Q13FC1350000400 0426A 1 2 1 C3 15P_0402_50V8J 2 C4 15P_0402_50V8J 1 +RTCVCC 1 330K_0402_5% 1 330K_0402_5% @ PCH_INTVRMEN R37 20K_0402_1% R36 20K_0402_1% U1E +RTCVCC 2 2 2 2 R39 R40 1 +RTCVCC +RTCVCC R35 1 PCH_RTCX1 PCH_RTCX2 SM_INTRUDER# PCH_INTVRMEN PCH_SRTCRST# PCH_RTCRST# 2 1M_0402_5% +RTCVCC C2 1U_0603_10V6K 1U_0603_10V6K RTC Battery 2 JME2 SHORT PADS @ CMOS 1 2 2 C5 1 1 * H：Integrated VRM enable L：Integrated VRM disable 1 C 2 INTVRMEN (+1.05VA) HASWELL_MCP_E @ RTCX1 RTCX2 INTRUDER INTVRMEN SRTCRST RTCRST SATA_RN0/PERN6_L3 SATA_RP0/PERP6_L3 SATA_TN0/PETN6_L3 SATA_TP0/PETP6_L3 RTC SATA_RN1/PERN6_L2 SATA_RP1/PERP6_L2 SATA_TN1/PETN6_L2 SATA_TP1/PETP6_L2 JME1 SHORT PADS @ ME CMOS AW8 AV11 AU8 AY10 AU12 AU11 AW10 AV10 AY8 HDA_BIT_CLK HDA_SYNC HDA_RST# HDA_SDIN0 [20] HDA_SDIN0 HDA_SDOUT +RTCBATT JME2 Short PAD placement to Bottom side. W=20mils AW5 AY5 AU6 AV7 AV6 AU7 HDA_BCLK/I2S0_SCLK HDA_SYNC/I2S0_SFRM HDA_RST/I2S_MCLK HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_SDO/I2S0_TXD HDA_DOCK_EN/I2S1_TXD HDA_DOCK_RST/I2S1_SFRM I2S1_SCLK AUDIO SATA SATA_RN3/PERN6_L0 SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0 SATA_TP3/PETP6_L0 5 OF 19 1 SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37 0502A C179 1U_0402_6.3V6K T701 2 @ PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS Safty suggestion remove EE side ,Keep PWR side T706 @ PCH_JTAG_RST# PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS PCH_TCK_JTAGX 0813A AU62 AE62 AD61 AE61 AD62 AL11 AC4 AE63 AV2 PCH_TRST PCH_TCK PCH_TDI PCH_TDO PCH_TMS RSVD RSVD JTAGX RSVD SATA_IREF RSVD RSVD SATA_RCOMP SATALED JTAG +3VALW_PCH SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0 [23] [23] [23] [23] HDD J8 H8 A17 B17 SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1 [24] [24] [24] [24] mSATA C J6 H6 B14 C15 F5 E5 C17 D17 SATA RComp within 500 mils V1 U1 V6 AC1 EC_SMI# TS_PRSNC# PCH_GPIO36 PCH_GPIO37 A12 L11 K10 C12 U3 SATA_RCOMP PCH_SATALED# EC_SMI# [31] TS_PRSNC# [10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29, +1.05VS_ASATA3PLL PCH_GPIO36 [10] PCH_GPIO37 [10] R43 1 2 3.01K_0402_1% PCH_SATALED# [10] Rev1p2 B 1 @ R5181 2 1K_0402_5% 1 R53 [31] ME_FLASH 2 0_0402_5% B HDA_SDOUT Closed to U1 HDA_SDOUT * SATA_RN2/PERN6_L1 SATA_RP2/PERP6_L1 SATA_TN2/PETN6_L1 SATA_TP2/PETP6_L1 J5 H5 B15 A15 RP14 ME debug mode,this signal has a weak internal PD Low = Disabled (Default) High = Enabled [Flash Descriptor Security Overide] [20] [20] [20] [20] 1 2 3 4 HDA_SDOUT_AUDIO HDA_SYNC_AUDIO HDA_RST_AUDIO# HDA_BITCLK_AUDIO C5211 68P_0402_50V8J @EMI@ PH/ PD for PCH JTAG 1 EMI 8 7 6 5 HDA_SDOUT HDA_SYNC HDA_RST# HDA_BIT_CLK 33_8P4R_5% EMI@ 2 RF 1 HDA_BIT_CLK RA38 33_0402_5% @EMI@ A 2 A CA79 22P_0402_50V8J @EMI@ 0815A R86 1 @ 2 51_0402_5% PCH_JTAG_TCK Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification EMI 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 7 of 42 5 4 3 2 1 CLK/ SPI/ SMBUS XTAL24_IN 2 R87 HASWELL_MCP_E D 1 1 3 B41 A41 Y5 LAN_CLKREQ# [10] LAN_CLKREQ# WLAN [27] CLK_PCIE_WLAN# [27] CLK_PCIE_WLAN [10,27] WLAN_CLKREQ# CLK_PCIE_WLAN# C41 CLK_PCIE_WLAN B42 WLAN_CLKREQ# AD1 Card Reader [22] CLK_PCIE_CR# [22] CLK_PCIE_CR [10,22] CR_CLKREQ# CLK_PCIE_CR# CLK_PCIE_CR CR_CLKREQ# [10] PEG_CLKREQ# PEG_CLKREQ# A39 B39 U5 PCH_GPIO23 B37 A37 T2 [10] PCH_GPIO23 CLKOUT_PCIE_N0 CLKOUT_PCIE_P0 PCIECLKRQ0/GPIO18 XTAL24_IN XTAL24_OUT RSVD RSVD DIFFCLK_BIASREF CLKOUT_PCIE_N1 CLKOUT_PCIE_P1 PCIECLKRQ1/GPIO19 B38 C37 N1 TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8 CLOCK CLKOUT_PCIE_N2 CLKOUT_PCIE_P2 PCIECLKRQ2/GPIO20 SIGNALS CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 PCIECLKRQ3/GPIO21 CLKOUT_LPC_0 CLKOUT_LPC_1 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P CLKOUT_PCIE_N4 CLKOUT_PCIE_P4 PCIECLKRQ4/GPIO22 CLKOUT_PCIE_N5 CLKOUT_PCIE_P5 PCIECLKRQ5/GPIO23 A25 B25 K21 M21 C26 XTAL24_IN XTAL24_OUT 2 +1.05VS_AXCK_LCPLL XCLK_BIASREF R91 1 R5182 1 R93 1 R94 1 R95 1 C35 C34 AK8 AL8 AN15 AP15 CLKOUT_LPC0 CLKOUT_LPC1 B35 A35 CLK_BCLK_ITP# CLK_BCLK_ITP R96 R97 R99 2 2 2 2 3.01K_0402_1% 2 2 2 2 2 1 1 2 2 C5213 68P_0402_50V8J @EMI@ +3VALW_PCH RP13 1 2 3 4 SMBCLK SMBDATA SML1DATA SML1CLK RF 2 33_0402_5% PCH_SPI_CLK_R1 R107 1 SBA@ 2 33_0402_5% RA39 2 @EMI@ 1 33_0402_5% C5212 68P_0402_50V8J @EMI@ 1 1 2 2 PCH_SPI_CLK PCH_SPI_CS0# PCH_SPI_CS1# +3VM C5214 68P_0402_50V8J @EMI@ CA80 22P_0402_50V8J @EMI@ RF R5001 1 R5002 1 EMI 2 1K_0402_1% 2 1K_0402_1% PCH_SPI_MOSI PCH_SPI_MISO PCH_SPI_WP# PCH_SPI_HOLD# AA3 Y7 Y4 AC2 AA2 AA4 Y6 AF1 LAD0 LAD1 LAD2 LAD3 LFRAME SPI_CLK SPI_CS0 SPI_CS1 SPI_CS2 SPI_MOSI SPI_MISO SPI_IO2 SPI_IO3 LPC SPI SMBALERT/GPIO11 SMBCLK SMBDATA SML0ALERT/GPIO60 SMBUS SML0CLK SML0DATA SML1ALERT/PCHHOT/GPIO73 SML1CLK/GPIO75 SML1DATA/GPIO74 CL_CLK CL_DATA CL_RST C-LINK AN2 AP2 AH1 AL2 AN1 AK1 AU4 AU3 AH3 BNFC_IRQ# SMBCLK SMBDATA PCH_GPIO60 SML0CLK SML0DATA PCH_GPIO73 SML1CLK SML1DATA AF2 AD2 AF4 CL_CLK CL_DAT CL_RST# BNFC_IRQ# [10,30] SMBus :SPD/PCIe/Security/TP/NFC PCH_GPIO60 [10] PCH_GPIO73 [10] +3VS CL_CLK [27] CL_DAT [27] CL_RST# [27] 0819A SMBDATA 0425A +3VS 2 R106 1 EMI@ R132 2.2K_0402_5% 6 R133 2.2K_0402_5% 1 PCH_SPI_CLK_R0 C HASWELL_MCP_E @ 2 U1G AU14 AW12 AY12 AW11 AV12 8 7 6 5 2.2K_0804_8P4R_5% 2 2.2K_0402_5% R122 1 2 2.2K_0402_5% R123 1 SML0CLK SML0DATA LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# 4 1 C7 CK_LPC_KBC [31] CLK_PCI_TPM [30] CLK_PCI_DB [30] C LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# 2 3 0628A EMI@ 1 33_0402_5% EMI@ 1 33_0402_5% 1 22_0402_5% @ T21 @ T26 @ Rev1p2 [30,31] [30,31] [30,31] [30,31] [30,31] GND 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% C5210 68P_0402_50V8J @EMI@ 6 OF 19 GND 18P_0402_50V8J C43 C42 U2 PCH_GPIO18 [10] PCH_GPIO18 18P_0402_50V8J 1 C6 2 @ XTAL24_OUT Y2 24MHZ_12PF_7V24000020 1 1 U1F D 1 1M_0402_5% PCH_SMB_DATA [24,27,29,30] 7 OF 19 5 Q3A DMN66D0LDW-7_SOT363-6 Rev1p2 3 SMBCLK 4 PCH_SMB_CLK [24,27,29,30] Q3B DMN66D0LDW-7_SOT363-6 B SBA - 2 SPI Device = 33 ohm - P/N: SD309330A80 Non-SBA - 1 SPI Device = 15 ohm - P/N: SD300001P00 B Change Symbol RP4 PCH_SPI_MOSI_1 PCH_SPI_WP1# PCH_SPI_MISO_1 PCH_SPI_HOLD1# 1 2 3 4 8 7 6 5 PCH_SPI_MOSI PCH_SPI_WP# PCH_SPI_MISO PCH_SPI_HOLD# 33_8P4R_5% RP5 8 7 6 5 SML1 Bus :EC/Sensors Security ROM +3VS +3VS 33_8P4R_5% SBA@ SPI ROM (8M) +3VM 0624A - Winbond - E-ON - Winbond - E-ON U8 PCH_SPI_CS0# PCH_SPI_MISO_0 PCH_SPI_WP0# 1 2 3 4 8 7 6 5 CS# VCC DO(IO1) HOLD#(IO3) WP#(IO2) CLK GND DI(IO0) 1 PLT_RST_BUF# PLT_RST_BUF# 1 2 3 4 C8 0.1U_0402_16V4Z NC NC PROT# GND VCC WP SCL SDA 8 7 6 5 PCA24S08D_SO8 PCH_SMB_CLK PCH_SMB_DATA 1 2 2 W25Q64FVSSIQ_SO8 PU 2.2K at EC side (+3VS) 1 EC_SMB_CK2 [29,31] U11 [21,22,27,30,31,9] PCH_SPI_HOLD0# PCH_SPI_CLK_R0 PCH_SPI_MOSI_0 6 Q2417A DMN66D0LDW-7_SOT363-6 A SML1DATA 3 4 EC_SMB_DA2 [29,31] C91 0.1U_0402_16V4Z SPI ROM 8MB 1st: SA000039A30 2nd: SA000046400 SPI ROM 4MB 1st: SA00003K820 2nd: SA00004LI00 SML1CLK SPI ROM 1st: SA00004MK00 2nd: SA00004ML00 5 1 2 3 4 2 PCH_SPI_MOSI_0 PCH_SPI_WP0# PCH_SPI_MISO_0 PCH_SPI_HOLD0# Q2417B DMN66D0LDW-7_SOT363-6 Change Symbol 0819A A Need to change symbol SPI ROM (4M) +3VM 0624A U2202 PCH_SPI_CS1# PCH_SPI_MISO_1 PCH_SPI_WP1# 1 2 3 4 CS# SO WP# GND VCC HOLD# SCLK SI 8 7 6 5 Issued Date Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 Rev C 4019P2 Need to change symbol 4 2013/03/08 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. W25Q32FVSSIQ SOIC 8P SBA@ 5 Compal Electronics, Inc. Compal Secret Data Security Classification PCH_SPI_HOLD1# PCH_SPI_CLK_R1 PCH_SPI_MOSI_1 Date: 3 2 Friday, March 07, 2014 Sheet 1 8 of 42 5 4 3 2 1 PM/ GPIO/ DDI 2 +RTCVCC 1 R134 330K_0402_5% DSWODVREN 1 Note: SUSACK# and SUSWARN# can be tied together if EC does not want to involve in the handshake mechanism for the Deep Sleep state entry and exit. CAN be NC ,if not support Deep Sx D U1H @ R139 330K_0402_5% @ DPWROK: Tired toghter with RSMRST# that do not support Deep Sx HASWELL_MCP_E @ 2 D T115 SYSTEM POWER MANAGEMENT R135 1 [10,31] SUSPWRDNACK [10] [31] [31] [31] 0620B SYS_RESET# SYS_PWROK PCH_PWROK PCH_APWROK @ R146 1 SBA@ 2 0_0402_5% 2 0_0402_5% SUSACK#_R SYS_RESET# SYS_PWROK PCH_PWROK PCH_APWROK_R PLT_RST# AK2 AC3 AG2 AY7 AB5 AG7 EC_RSMRST# SUSPWRDNACK PBTN_OUT# AC_PRESENT_R PCH_GPIO72 PM_SLP_S0# SLP_WLAN# AW6 AV4 AL7 AJ8 AN4 AF3 AM5 SUSACK SYS_RESET SYS_PWROK PCH_PWROK APWROK PLTRST DSWVRMEN DPWROK WAKE CLKRUN/GPIO32 SUS_STAT/GPIO61 SUSCLK/GPIO62 SLP_S5/GPIO63 R147 1 NOSBA@2 0_0402_5% [31] EC_RSMRST# 0620B [31] PBTN_OUT# [10] PCH_GPIO72 @ T109 0807A SLP_S4 SLP_S3 SLP_A SLP_SUS SLP_LAN DSWODVREN EC_RSMRST# PCH_PCIE_WAKE# V5 AG4 AE6 AP5 PCH_GPIO32 PCH_GPIO61 SUSCLK PM_SLP_S5# AJ6 AT4 AL5 AP4 AJ7 PM_SLP_S4# PM_SLP_S3# PM_SLP_A# PM_SLP_SUS# PM_SLP_LAN# DSWODVREN - On Die DSW VR Enable PCH_PCIE_WAKE# [10] PCH_GPIO32 [10] PCH_GPIO61 [10] H：Enable (default) * L：Disable T119 @ PM_SLP_S5# [31] PM_SLP_S4# [31] PM_SLP_S3# [31] PM_SLP_A# [31,32,38] T110 @ T112 @ 0620B T117 @ T118 @ 2 [27] SLP_WLAN# RSMRST SUSWARN/SUSPWRDNACK/GPIO30 PWRBTN ACPRESENT/GPIO31 BATLOW/GPIO72 SLP_S0 SLP_WLAN/GPIO29 AW7 AV5 AJ5 R149 10K_0402_5% 8 OF 19 1 Rev1p2 C C PCH_BATLOW# Need pull high to VCCDSW3_3 (If no deep Sx , connect to VCCSUS3_3) +3VALW_PCH R155 0_0402_5% 2 1 1 0628A 0620B +3VS 1 B Y A U5 MC74VHC1G08DFT2G_SC70-5 @ 4 PLT_RST_BUF# [21,22,27,30,31,8] R159 100K_0402_5% 2 C2223 100P_0402_50V8J 2 @EMI@ 1 2 PLT_RST# 1 P 5 AC_PRESENT_R G [31] AC_PRESENT_R 3 2 R643 10K_0402_5% ESD B B U1I [18,5] INVPWM [31] ENBKL [18] PCH_ENVDD [10,27] [10] [10] [10,27] [10,18] [10] [10] [10] [10] WLBT_OFF_5# DGPU_PWR_EN DGPU_HOLD_RST# WLBT_OFF_51# R150 1 2 0_0402_5% EDP_BKCTL WLBT_OFF_5# DGPU_PWR_EN DGPU_HOLD_RST# WLBT_OFF_51# @ T27 TS_ON PCH_GPIO52 PCH_GPIO54 PCH_GPIO51 PCH_GPIO53 TS_ON PCH_GPIO52 PCH_GPIO54 PCH_GPIO51 PCH_GPIO53 B8 A9 C6 U6 P4 N4 N2 AD4 U7 L1 L3 R5 L4 @ EDP_BKLCTL EDP_BKLEN EDP_VDDEN PIRQA/GPIO77 PIRQB/GPIO78 PIRQC/GPIO79 PIRQD/GPIO80 PME HASWELL_MCP_E DDPB_CTRLCLK DDPB_CTRLDATA DDPC_CTRLCLK DDPC_CTRLDATA eDP SIDEBAND DDPB_AUXN DDPC_AUXN DDPB_AUXP DDPC_AUXP DISPLAY GPIO GPIO55 GPIO52 GPIO54 GPIO51 GPIO53 DDPB_HPD DDPC_HPD EDP_HPD 9 OF 19 B9 C9 D9 D11 C5 B6 B5 A6 DDI1_CTRL_DATA DDI2_CTRL_CK DDI2_CTRL_DATA DDI1_AUXN DDI1_AUXP +3VS DDI2_CTRL_CK [19] DDI2_CTRL_DATA [19] DDI1_AUXN [26] DDI1_CTRL_DATA R310 1 2 2.2K_0402_5% DDI2_CTRL_DATA R311 1 2 2.2K_0402_5% DDI2_CTRL_CK R312 1 2 2.2K_0402_5% DDI1_AUXP [26] DDPB_CTRLDATA: Port B Detected DDPC_CTRLDATA: Port C Detected C8 A8 D6 * 1: Port B or C is detected DDI1_DP_HPD [26] DDI2_HDMI_HPD [19] EDP_HPD [18] 0: Port B or C is not detected Port have internal PD Rev1p2 A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 9 of 42 5 4 3 2 1 GPIO/ LPIO +3VS 1 2 10K_0402_5% R1001 10K_0402_5% DDR1@ RAM_ID3 DDR1@ RAM_ID2 DDR1@ RAM_ID1 DDR1@ RAM_ID0 R1008 10K_0402_5% RP16 10K_8P4R_5% PCH_GPIO37 [7] PEG_CLKREQ# [8] SYS_RESET# [9] WLAN_CLKREQ# [27,8] 8 7 6 5 EC_WAKE# * PCH_GPIO76 PCH_GPIO17 8 7 6 5 [31] EC_WAKE# PCH_GPIO23 [8] PCH_GPIO70 PCH_GPIO68 PCH_GPIO69 PCH_GPIO4 8 7 6 5 PCH_GPIO94 PCH_GPIO93 PCH_GPIO2 PCH_GPIO91 RP19 10K_8P4R_5% 8 7 6 5 TS_INT# PCH_GPIO16 PCH_GPIO71 PCH_GPIO18 [8] [31] EC_SCI# [23] HDD_DEVSLP0 [24] MSATA_DEVSLP1 RP24 10K_8P4R_5% [20] SPKR 8 7 6 5 PCH_GPIO76 DOCK_PRSNT# PCH_GPIO12 EC_WAKE# PCH_GPIO16 PCH_GPIO17 PCH_GPIO24 PCH_GPIO27 PCH_GPIO28 PCH_GPIO26 P1 AU2 AM7 AD6 Y1 T3 AD5 AN5 AD7 AN3 PCH_GPIO56 PCH_GPIO57 PCH_GPIO58 PCH_GPIO59 PCH_GPIO44 RAM_ID2 RAM_ID1 RAM_ID0 TS_INT# PCH_GPIO71 PCH_GPIO13 PCH_GPIO14 PCH_GPIO25 PCH_GPIO45 RAM_ID3 AG6 AP1 AL4 AT5 AK4 AB6 U4 Y3 P3 Y2 AT3 AH4 AM4 AG5 AG3 PCH_GPIO9 EC_SCI# HDD_DEVSLP0 PCH_GPIO70 MSATA_DEVSLP1 PCH_GPIO39 SPKR AM3 AM2 P2 C4 L2 N5 V2 HASWELL_MCP_E @ BMBUSY/GPIO76 GPIO8 LAN_PHY_PWR_CTRL/GPIO12 GPIO15 GPIO16 GPIO17 GPIO24 GPIO27 GPIO28 GPIO26 GPIO56 GPIO57 GPIO58 GPIO59 GPIO44 GPIO47 GPIO48 GPIO49 GPIO50 HSIOPC/GPIO71 GPIO13 GPIO14 GPIO25 GPIO45 GPIO46 GPIO 10 OF 19 GPIO9 GPIO10 DEVSLP0/GPIO33 SDIO_POWER_EN/GPIO70 DEVSLP1/GPIO38 DEVSLP2/GPIO39 SPKR/GPIO81 TS_ON [18,9] WLBT_OFF_5# [27,9] DGPU_PWR_EN [9] 8 7 6 5 1 1K_0402_5% CHECK Power plane,for VGA thermtrip R179 1K_0402_1% CPU/ MISC SERIRQ THERMTRIP RCIN/GPIO82 SERIRQ PCH_OPI_RCOMP RSVD RSVD GSPI0_CS/GPIO83 GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86 GSPI1_CS/GPIO87 GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89 GSPI_MOSI/GPIO90 UART0_RXD/GPIO91 UART0_TXD/GPIO92 UART0_RTS/GPIO93 LPIO UART0_CTS/GPIO94 UART1_RXD/GPIO0 UART1_TXD/GPIO1 UART1_RST/GPIO2 UART1_CTS/GPIO3 I2C0_SDA/GPIO4 I2C0_SCL/GPIO5 1.8V rail I2C1_SDA/GPIO6 I2C1_SCL/GPIO7 SDIO_CLK/GPIO64 SDIO_CMD/GPIO65 SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69 D60 V4 T4 AW15 AF20 AB21 H_THERMTRIP# R6 L6 N6 L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4 F2 F3 G4 F1 E3 F4 D3 E4 C3 E2 PCH_GPIO83 PCH_GPIO84 PCH_GPIO85 PCH_GPIO86 DGPU_PRSNT# PCH_GPIO88 PCH_GPIO89 PCH_GPIO90 PCH_GPIO91 PCH_GPIO92 PCH_GPIO93 PCH_GPIO94 P_SENSE P_SENSE2 PCH_GPIO2 PCH_GPIO3 I2C0_SDA_SEN I2C0_SCL_SEN I2C1_SDA_TPNL I2C1_SCL_TPNL BNFC_PRSNT# BNFC_ON PCH_GPIO66 PCH_GPIO67 PCH_GPIO68 PCH_GPIO69 SERIRQ PCH_OPIRCOMP R185 1 2 49.9_0402_1% KB_RST# [31] SERIRQ [30,31] C 0429A P_SENSE [18] P_SENSE2 [30] I2C0_SDA_SEN [21] I2C0_SCL_SEN [21] BNFC_PRSNT# [30] BNFC_ON [30] +3VS 2 Rev1p2 RP25 10K_8P4R_5% 1 2 3 4 R116 2 RAM_ID3 RAM_ID2 RAM_ID1 RAM_ID0 GPIO46 GPIO47 GPIO48 GPIO49 RAM R707 10K_0402_5% UMA@ H_THERMTRIP# HDD_DEVSLP0 KB_RST# 1 1 2 3 4 1 1K_0402_5% I2C1_SCL_TPNL DGPU_PRSNT# PCH_GPIO52 [9] PCH_SATALED# [7] RP26 10K_8P4R_5% 0 0 0 0 HYNIX 4GB 0 0 0 1 SAMSUNG 4GB 0 0 1 0 MICRON 4GB 0 0 1 1 ELPIDA 4GB 0 1 0 0 SAMSUNG 8GB 0 1 0 1 ELPIDA 8GB 0 1 1 0 MICRON 8GB 0 1 1 1 HYNIX 8GB 1 0 0 0 TBD 1 0 0 1 TBD 1 0 1 0 TBD 1 0 1 1 TBD 1 1 0 0 TBD 1 1 0 1 TBD 1 1 1 0 TBD 1 1 1 1 TBD 1 C1001 100P_0402_50V8J @EMI@ 2 1 2 3 4 R117 2 2 WLBT_OFF_51# [27,9] RP18 10K_8P4R_5% 1 2 3 4 1 1K_0402_5% I2C1_SDA_TPNL DDR1@ PCH_GPIO32 [9] 8 7 6 5 1 1K_0402_5% R115 2 +1.05VS U1J RP22 10K_8P4R_5% C DDR1@ R1002 10K_0402_5% CR_CLKREQ# [22,8] [26] DOCK_PRSNT# 1 2 3 4 DDR1@ R1004 10K_0402_5% 1: Intel ME TLS with confidentiality 0: Intel ME TLS with no confidentiality Port have internal PD RP21 10K_8P4R_5% 1 2 3 4 DDR1@ PCH_GPIO39 PCH_GPIO83 R114 2 I2C0_SCL_SEN GPIO15 : TLS Confidentiality RP20 10K_8P4R_5% 1 2 3 4 2 1K_0402_1% R1006 10K_0402_5% 1 8 7 6 5 2 R712 1 1 2 3 4 I2C0_SDA_SEN D +3VALW_PCH 0429A 2 PCH_GPIO5 P_SENSE2 1 BNFC_PRSNT# 2 R1003 10K_0402_5% 2 R1005 10K_0402_5% 1 2 8 7 6 5 +3VS R1007 10K_0402_5% 1 1 2 3 4 1 MSATA_DEVSLP1 RP17 10K_8P4R_5% D +3VS 1 R193 1 PCH_GPIO54 [9] 2 PCH_GPIO90 PCH_GPIO92 1 P_SENSE +3VS 2 8 7 6 5 +3VALW_PCH 2 1 2 3 4 +3VALW_PCH 1 +3VS 0429A 2 R708 10K_0402_5% DIS@ M/B Type 1 2 3 4 8 7 6 5 PCH_GPIO85 PCH_GPIO53 [9] PCH_GPIO36 [7] TS_PRSNC# [11,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29,30,31,32,33,34,35,36,37,38,39,4,40,5,7,8,9] RP23 10K_8P4R_5% 1 2 3 4 8 7 6 5 PCH_GPIO3 PCH_GPIO67 DGPU_HOLD_RST# [9] +3VALW_PCH 5 6 7 8 SUSPWRDNACK PCH_GPIO43 [11] PCH_GPIO73 [8] 8 7 6 5 PCH_GPIO14 [31,9] 1 2 3 4 PCH_GPIO42 [11] 1 2 3 4 RP32 10K_8P4R_5% 8 7 6 5 PCH_GPIO57 PCH_GPIO13 DOCK_PRSNT# 8 7 6 5 EC_SCI# PCH_GPIO84 PCH_GPIO88 PCH_GPIO24 1 2 3 4 8 7 6 5 PCH_GPIO25 PCH_GPIO27 PCH_GPIO12 PCH_GPIO72 [9] 8 7 6 5 8 7 6 5 R709 10K_0402_5% 2 1 BNFC_IRQ# [30,8] PCH_GPIO44 PCH_GPIO58 PCH_GPIO56 4 2 1K_0402_1% 1: LPC BUS 0: SPI BUS (default) *Port have internal PD PCH_PCIE_WAKE# [9] 0614A PCH_GPIO66 PCH_GPIO28 PCH_GPIO45 PCH_GPIO9 PCH_GPIO61 [9] Issued Date 2013/03/08 Deciphered Date 2 4.7K_0402_5% Compal Electronics, Inc. 2015/03/08 Title SCHEMATIC, MB AA341 Rev C 4019P2 3 2 A * THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. PCH_GPIO26 @ 1: Enable 0: Disable Port have internal PD Compal Secret Data Security Classification R189 1 SDIO_D0 / GPIO66 : Top-Block Swap Override Date: 5 2 1K_0402_1% +3VS RP35 10K_8P4R_5% RP30 10K_8P4R_5% @ R711 1 PCH_GPIO41 [11] PCH_GPIO60 [8] USB_OC0# [11,27,28] R710 1 GSPI0_MOSI / GPIO86 : Boot BIOS Strap RP31 10K_8P4R_5% RP27 10K_8P4R_5% 1 2 3 4 8 7 6 5 RP15 10K_8P4R_5% A 1 2 3 4 +3VS PCH_GPIO86 RP33 10K_8P4R_5% 0620B RP29 10K_8P4R_5% 1 2 3 4 PCH_GPIO51 [9] LAN_CLKREQ# [8] 10K_8P4R_5% 1 2 3 4 PCH_GPIO59 PCH_GPIO89 0807A +3VALW_PCH 8 7 6 5 B RP1 4 3 2 1 RP37 10K_8P4R_5% 1 2 3 4 1: UMA 0: dGPU ESD +3VS 1 B Friday, March 07, 2014 Sheet 1 10 of 42 5 4 3 2 1 PCIE/ USB D D U1K F10 E10 C23 C22 F8 E8 B23 A23 H10 G10 C B21 C21 E6 F6 B22 A21 [27] PCIE_PRX_DTX_N3 [27] PCIE_PRX_DTX_P3 WLAN 1 1 C29 C30 [27] PCIE_PTX_C_DRX_N3 [27] PCIE_PTX_C_DRX_P3 2 0.1U_0402_16V7K 2 0.1U_0402_16V7K [22] PCIE_PRX_DTX_N4 [22] PCIE_PRX_DTX_P4 Card Reader C31 1 C5241 1 [22] PCIE_PTX_C_DRX_N4 [22] PCIE_PTX_C_DRX_P4 2 0.1U_0402_16V7K 2 0.1U_0402_16V7K [26] USB3_RX3_N [26] USB3_RX3_P USB 2/3 (Docking) [26] USB3_TX3_N [26] USB3_TX3_P PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 G11 F11 PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3 C29 B30 PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 F13 G13 PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4 B29 A29 USB3_RX3_N USB3_RX3_P G17 F17 USB3_TX3_N USB3_TX3_P C30 C31 F15 G15 B31 A31 B HASWELL_MCP_E @ PERN5_L0 PERP5_L0 USB2N0 USB2P0 PETN5_L0 PETP5_L0 USB2N1 USB2P1 PERN5_L1 PERP5_L1 USB2N2 USB2P2 PETN5_L1 PETP5_L1 USB2N3 USB2P3 PERN5_L2 PERP5_L2 USB2N4 USB2P4 PETN5_L2 PETP5_L2 USB2N5 USB2P5 PERN5_L3 PERP5_L3 USB2N6 USB2P6 PETN5_L3 PETP5_L3 USB2N7 USB2P7 11 OF 19 PERN3 PERP3 PETN3 PETP3 USB3.0 P1 USB PCIe USB3TN1 USB3TP1 PERN4 PERP4 USB3.0 P2 PETN4 PETP4 R235 1 2 3.01K_0402_1% PCIE_RCOMP USB3RN2 USB3RP2 USB3TN2 USB3TP2 USB20_N0 USB20_P0 AR7 AT7 USB20_N1 USB20_P1 AR8 AP8 USB20_N2 USB20_P2 AR10 AT10 USB20_N3 USB20_P3 AM15 AL15 USB20_N4 USB20_P4 AM13 AN13 USB20_N5 USB20_P5 AP11 AN11 USB20_N6 USB20_P6 AR13 AP13 USB20_N7 USB20_P7 G20 H20 USB20_N0 [28] USB20_P0 [28] USB2/3 (Left) USB20_N1 [27] USB20_P1 [27] USB2/3 IO (Right) USB20_N2 [26] USB20_P2 [26] USB2/3 IO (Docking) USB20_N3 [27] USB20_P3 [27] Mini Card(WLAN+BT) USB20_N4 [18] USB20_P4 [18] Touch Screen USB20_N5 [18] USB20_P5 [18] Camera USB20_N6 [21] USB20_P6 [21] Sensor Hub USB20_N7 [18] USB20_P7 [18] Digitizer USB3_RX1_N [28] USB3_RX1_P [28] C33 B34 C USB2/3 (Left) USB3_TX1_N [28] USB3_TX1_P [28] E18 F18 USB3_RX2_N [27] USB3_RX2_P [27] B33 A33 USB2/3 (Right) USB3_TX2_N [27] USB3_TX2_P [27] PERN1/USB3RN3 PERP1/USB3RP3 PETN1/USB3TN3 PETP1/USB3TP3 PERN2/USB3RN4 PERP2/USB3RP4 USB3.0 P3 / PCIE P1 USBRBIAS USBRBIAS RSVD RSVD USB3.0 P4 / PCIE P2 PETN2/USB3TN4 PETP2/USB3TP4 OC0/GPIO40 OC1/GPIO41 OC2/GPIO42 OC3/GPIO43 +1.05VS_AUSB3PLL E15 E13 A27 B27 USB3RN1 USB3RP1 AN8 AM8 RSVD RSVD PCIE_RCOMP PCIE_IREF AJ10 AJ11 AN10 AM10 USBRBIAS AL3 AT1 AH2 AV3 USB_OC0# PCH_GPIO41 PCH_GPIO42 PCH_GPIO43 R233 1 2 22.6_0402_1% CAD note: Route single-end 50-ohms and max 450-mils length. Avoid routing next to clock pins or under stitching capacitors. Recommended minimum spacing to other signal traces is 15 mils B USB_OC0# [10,27,28] PCH_GPIO41 [10] PCH_GPIO42 [10] PCH_GPIO43 [10] Rev1p2 A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 11 of 42 5 4 3 2 1 Power +1.35V 1.4A U1L L59 J58 +1.05VS 1 D AH26 AJ31 AJ33 AJ37 AN33 AP43 AR48 AY35 AY40 AY44 AY50 CAD Note: PU resistor should be close to CPU. Pull-High at Power side. 2 R286 10K_0402_5% VCCST_PG_EC +CPU_CORE Define EC OD pin, need double confirm. F59 N58 AC58 +VCCIOA_OUT @ @ SVID ALERT T38 T87 +VCCIO_OUT_R +1.05VS [31] VCCST_PG_EC [39] VR_ON [39] VGATE H_CPU_SVIDALRT# VR_SVID_CLK H_CPU_SVIDDATA VCCST_PG_EC VR_ON VGATE CPU_PWR_DEBUG CPU_PWR_DEBUG 1 [39] VR_SVID_CLK 2 R252 75_0402_5% C [39] VR_SVID_ALRT# R254 43_0402_1% 2 1 H_CPU_SVIDALRT# Place the PU resistors close to CPU SVID DATA 0801A TBD +1.05VS 1 +1.05VS R256 110_0402_5% @ @ @ @ @ @ @ @ @ @ @ @ @ T39 T40 T41 T42 T43 T44 T45 T46 T47 T48 T49 T50 T51 L62 N63 L63 B59 F60 C59 D63 H59 P62 P60 P61 N59 N61 T59 AD60 AD59 AA59 AE60 AC59 AG58 U59 V59 AC22 AE22 AE23 +CPU_CORE 2 0604A R257 0_0402_5% 2 1 [39] VR_SVID_DAT E63 AB23 A59 E20 AD23 AA23 AE59 VCCSENSE [39] VCCSENSE AB57 AD57 AG57 C24 C28 C32 H_CPU_SVIDDATA @ Place the PU resistors close to CPU +CPU_CORE HASWELL_MCP_E @ 32A RSVD RSVD VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VCC RSVD RSVD VCC_SENSE RSVD VCCIO_OUT VCCIOA_OUT RSVD RSVD RSVD 12 OF 19 VIDALERT VIDSCLK VIDSOUT VCCST_PWRGD VR_EN VR_READY HSW ULT POWER VSS PWR_DEBUG VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD VCCST VCCST VCCST VCC VCC VCC VCC VCC VCC C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23 J23 K23 K57 L22 M23 M57 P57 U57 W57 D C Rev1p2 +1.05VS B 2 B 1 R253 150_0402_1% CPU_PWR_DEBUG 2 VDDQ DECOUPLING +1.35V 1 R255 10K_0402_5% @ 1 C44 2 2 2 2 2 2 2 2 2 2 10U_0603_6.3V6M 1 C43 10U_0603_6.3V6M 1 C42 10U_0603_6.3V6M 1 C41 10U_0603_6.3V6M 1 C40 10U_0603_6.3V6M 1 C5242 10U_0603_6.3V6M 1 C38 2.2U_0402_6.3V6M 1 C37 2.2U_0402_6.3V6M 1 C36 2.2U_0402_6.3V6M 1 C35 2.2U_0402_6.3V6M For XDP Debug only +1.35V @ CRB: 470UF/2V/7343 *2 (Un-mount) 10UF/6.3V/0603 * 6 2.2UF/6.3V/0402 * 4 A Compal Electronics, Inc. Compal Secret Data Security Classification Issued Date A 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 12 of 42 5 4 3 2 1 Power +RTCVCC +1.05VS D 1 2 C58 1U_0402_6.3V6K +1.05VS_ASATA3PLL 42mA +1.05VS 1 2 2 C63 1U_0402_6.3V6K Close to M9 2 2 C5243 100U_1206_6.3V6M @ 1 C5244 1U_0402_6.3V6K @ +1.05VS_ASATA3PLL 1 C50 1 2 2 2 +1.05VS_AUSB3PLL 2 200mA L4 2.2UH_LQM2MPN2R2NG0L_30% 1 2 1 2 C83 1U_0402_6.3V6K Close to AH10 2 1 31mA C81 1U_0402_6.3V4Z @ 41mA 1 2 AH11 AG10 AE7 +VCCRTCEXT C 1 C85 1U_0402_6.3V6K SPI RSVD VCCAPLL VCCAPLL 2 T53 C75 1U_0402_6.3V4Z J13 VCCSPI OPI VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 DCPSUSBYP DCPSUSBYP VCCASW VCCASW VCCASW DCPSUS1 DCPSUS1 AXALIA/HDA VCCHDA 1 T55 Close to V8 1 VRM/USB2/AZALIA DCPSUS2 CORE 13 OF 19 AC9 AA9 AH10 V8 W9 +3VS 2 AH13 C82 22U_0603_6.3V6M VCCSUS3_3 VCCSUS3_3 VCCDSW3_3 VCC3_3 VCC3_3 GPIO/LCC THERMAL SENSOR 2 +1.05VS_AXCK_DCB +1.05VS_AXCK_LCPLL +1.05VS 2 +3VALW_PCH C87 Close to J17 1 +1.05VS VCCCLK VCCCLK VCCACLKPLL VCCCLK VCCCLK VCCCLK RSVD RSVD RSVD VCCSUS3_3 VCCSUS3_3 SDIO/PLSS VCCTS1_5 VCC3_3 VCC3_3 VCCSDIO VCCSDIO 1 J11 H11 H15 AE8 AF22 AG19 AG20 AE9 AF9 AG8 AD10 AD8 DCPSUS4 RSVD VCC1_05 VCC1_05 T58 T59 @ @ +1.5VS 3mA J15 K14 K16 U8 T9 +3VS AB8 T56 AC20 AG16 AG17 @ 1 C76 C78 22U_0603_6.3V6M 2 Rev1p2 2 C61 1U_0402_6.3V6K 2 1 C5245 10U_0603_6.3V6M 2 +1.05VM Close to AC9,AA9, AE20,AE21 17mA 1 C67 1 C66 2 2 1 @ 2 C64 1U_0402_6.3V6K +3VS 1 C73 1 C71 2 2 +1.05VS USB2 1 +PCH_VCCDSW LPT LP POWER SUS OSCILLATOR C62 1U_0402_6.3V6K 2 1U_0402_6.3V6K Close to R21 1 1U_0402_6.3V6K 1U_0402_6.3V6K 2 C88 1741/1632mA AG14 AG13 B 0.1U_0402_16V4Z 1 Y8 1U_0402_6.3V6K B J18 K19 A20 J17 R21 T21 K18 M20 V21 AE20 AE21 C57 0.1U_0402_16V4Z 2@ USB3 DCPSUS3 AH14 +1.05VM 22U_0603_6.3V6M C86 100U_1206_6.3V6M VCCSUS3_3 VCCRTC DCPRTC RTC 658mA +3VM C52 0.1U_0402_16V4Z 1U_0402_6.3V6K 2 mPHY VCCASW VCCASW @ L5 2.2UH_LQM2MPN2R2NG0L_30% 1 2 1 1 +RTCVCC Close to AH14 @ 2 +1.05VS_AXCK_LCPLL 18mA HASWELL_MCP_E @ VCCHSIO VCCHSIO VCCHSIO VCC1_05 VCC1_05 VCCUSB3PLL VCCSATA3PLL Y20 AA21 W21 +3VALW_PCH 1 C51 1U_0402_6.3V6K +1.05VS_APLLOPI VCCHDA=11mA VCCDSW3_3= 114mA C84 100U_1206_6.3V6M U1M K9 L10 M9 N8 P9 B18 B11 C +1.05VS_AXCK_DCB 0604A 1 C49 1U_0402_6.3V6K 57mA Close to K9, L10 1U_0402_6.3V6K +1.05VS_APLLOPI L3 2.2UH_LQM2MPN2R2NG0L_30% 1 2 1U_0402_6.3V6K 1 C53 1 R264 0_0603_5% @ 1 C65 100U_1206_6.3V6M 63/62mA +3VALW_PCH 1838mA L2 2.2UH_LQM2MPN2R2NG0L_30% 1 2 2 1 2 C55 0.1U_0402_16V4Z 1 C59 100U_1206_6.3V6M 1 C54 1U_0402_6.3V6K 1 2 <1mA 41mA 2 D +1.05VS_AUSB3PLL L1 2.2UH_LQM2MPN2R2NG0L_30% 1 2 Only availible on External Suspend VR powered. DcpSus1= 109mA DcpSus2= 25mA DcpSus3= 10mA DcpSus4= 1mA A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Sheet Friday, March 07, 2014 1 13 of 42 5 4 3 2 1 GND D D U1N A11 A14 A18 A24 A28 A32 A36 A40 A44 A48 A52 A56 AA1 AA58 AB10 AB20 AB22 AB7 AC61 AD21 AD3 AD63 AE10 AE5 AE58 AF11 AF12 AF14 AF15 AF17 AF18 AG1 AG11 AG21 AG23 AG60 AG61 AG62 AG63 AH17 AH19 AH20 AH22 AH24 AH28 AH30 AH32 AH34 AH36 AH38 AH40 AH42 AH44 AH49 AH51 AH53 AH55 AH57 AJ13 AJ14 AJ23 AJ25 AJ27 AJ29 C B VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS @ HASWELL_MCP_E 14 OF 19 U1O VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AJ35 AJ39 AJ41 AJ43 AJ45 AJ47 AJ50 AJ52 AJ54 AJ56 AJ58 AJ60 AJ63 AK23 AK3 AK52 AL10 AL13 AL17 AL20 AL22 AL23 AL26 AL29 AL31 AL33 AL36 AL39 AL40 AL45 AL46 AL51 AL52 AL54 AL57 AL60 AL61 AM1 AM17 AM23 AM31 AM52 AN17 AN23 AN31 AN32 AN35 AN36 AN39 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN51 AN52 AN60 AN63 AN7 AP10 AP17 AP20 AP22 AP23 AP26 AP29 AP3 AP31 AP38 AP39 AP48 AP52 AP54 AP57 AR11 AR15 AR17 AR23 AR31 AR33 AR39 AR43 AR49 AR5 AR52 AT13 AT35 AT37 AT40 AT42 AT43 AT46 AT49 AT61 AT62 AT63 AU1 AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14 AV16 AV20 AV24 AV28 AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS @ HASWELL_MCP_E 15 OF 19 U1P VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS Rev1p2 VSS AV59 AV8 AW16 AW24 AW33 AW35 AW37 AW4 AW40 AW42 AW44 AW47 AW50 AW51 AW59 AW60 AY11 AY16 AY18 AY22 AY24 AY26 AY30 AY33 AY4 AY51 AY53 AY57 AY59 AY6 B20 B24 B26 B28 B32 B36 B4 B40 B44 B48 B52 B56 B60 C11 C14 C18 C20 C25 C27 C38 C39 C57 D12 D14 D18 D2 D21 D23 D25 D26 D27 D29 D30 D31 D33 D34 D35 D37 D38 D39 D41 D42 D43 D45 D46 D47 D49 D5 D50 D51 D53 D54 D55 D57 D59 D62 D8 E11 E17 F20 F26 F30 F34 F38 F42 F46 F50 F54 F58 F61 G18 G22 G3 G5 G6 G8 H13 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS HASWELL_MCP_E VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 16 OF 19 VSS VSS VSS VSS_SENSE Rev1p2 VSS H17 H57 J10 J22 J59 J63 K1 K12 L13 L15 L17 L18 L20 L58 L61 L7 M22 N10 N3 P59 P63 R10 R22 R8 T1 T58 U20 U22 U61 U9 V10 V3 V7 W20 W22 Y10 Y59 Y63 C V58 AH46 V23 E62 AH16 VSSSENSE [39] B Rev1p2 A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 14 of 42 1 RSVD U1Q DC_TEST_AY2_AW2 DC_TEST_AY3_AW3 @ T54 DC_TEST_AY61_AW61 DC_TEST_AY62_AW62 @ T61 DC_TEST_A3_B3 DC_TEST_A61_B61 DC_TEST_B62_B63 DC_TEST_C1_C2 AY2 AY3 AY60 AY61 AY62 B2 B3 B61 B62 B63 C1 C2 HASWELL_MCP_E @ DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_AY60 DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_C2 HASWELL_MCP_E U1R DAISY_CHAIN_NCTF_A3 DAISY_CHAIN_NCTF_A4 DAISY_CHAIN_NCTF_A60 DAISY_CHAIN_NCTF_A61 DAISY_CHAIN_NCTF_A62 DAISY_CHAIN_NCTF_AV1 DAISY_CHAIN_NCTF_AW1 DAISY_CHAIN_NCTF_AW2 DAISY_CHAIN_NCTF_AW3 DAISY_CHAIN_NCTF_AW61 DAISY_CHAIN_NCTF_AW62 DAISY_CHAIN_NCTF_AW63 Rev1p2 A3 A4 A60 A61 A62 AV1 AW1 AW2 AW3 AW61 AW62 AW63 DC_TEST_A3_B3 T52 @ T57 @ T62 T64 T66 @ @ @ AT2 AU44 AV44 D15 DC_TEST_A61_B61 DC_TEST_AY2_AW2 DC_TEST_AY3_AW3 DC_TEST_AY61_AW61 DC_TEST_AY62_AW62 F22 H22 J21 T75 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD @ 17 OF 19 N23 R23 T23 U10 AL1 AM11 AP7 AU10 AU15 AW14 AY14 18 OF 19 Rev1p2 U1S @ @ @ T63 T65 T67 @ @ @ @ @ @ @ @ @ @ @ T70 T71 T72 T73 T74 T76 T77 T78 T79 T80 T81 CFG3 0802A A @ @ @ @ T82 T83 T84 T85 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG18 CFG17 CFG19 CFG_RCOMP AC60 AC62 AC63 AA63 AA60 Y62 Y61 Y60 V62 V61 V60 U60 T63 T62 T61 T60 AA62 U63 AA61 U62 V63 A5 TD_IREF E1 D1 J20 H18 B12 @ HASWELL_MCP_E CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 RSVD_TP RSVD_TP RSVD_TP RSVD_TP RSVD RSVD_TP RSVD_TP RSVD_TP RESERVED RSVD RSVD RSVD PROC_OPI_RCOMP CFG16 CFG18 CFG17 CFG19 RSVD RSVD 19 OF 19 CFG_RCOMP VSS VSS RSVD RSVD RSVD RSVD RSVD RSVD RSVD TD_IREF AV63 AU63 CFG Straps for Processor C63 C62 B43 A51 B51 CFG3 R273 1 @ 2 1K_0402_1% L60 A N60 W23 Y22 AY15 CFG3 - Physical Debug Enable (DFX Privacy) 1: DISABLED 0: ENABLED; SET DFX ENABLED BIT IN DEBUG INTERFACE MSR. CFG3 have internal PU. OPI_COMP AV62 D58 P22 N21 P20 R20 CFG4 Rev1p2 R274 1 2 1K_0402_1% CFG4 - Display Port Presence Strap 1 : Disabled; No Physical Display Port attached to Embedded Display Port 0 : Enabled; An external Display Port device is connected to the Embedded Display Port CFG4 have internal PH. R275 2 1 49.9_0402_1% CFG_RCOMP R276 2 1 49.9_0402_1% OPI_COMP R277 2 1 8.2K_0402_5% TD_IREF Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 Friday, March 07, 2014 Sheet 15 of 42 A B C D E On Board A DDR_A_MA[0..15] [6] DDR_A_MA[0..15] DDR_A_DQS#[0..7] [6] DDR_A_DQS#[0..7] DDR_A_DQS[0..7] [6] DDR_A_DQS[0..7] DDR_A_D[0..63] [6] DDR_A_D[0..63] 1 1 +VREF_CA F3 C7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 [6] [6] [6] [6] DDRA_CS0_DIMMA# DDR_A_RAS# DDR_A_CAS# DDR_A_WE# E7 D3 [17,5] DIMM_DRAMRST# [6] DDRA_CS1_DIMMA# [6] DDRA_CKE1_DIMMA DDR_A_DQS#2 DDR_A_DQS#3 G3 B7 DIMM_DRAMRST# T2 DDR_A_ZQ1 L8 MA_ODT DDRA_CS1_DIMMA# DDRA_CKE1_DIMMA DDR_A_ZQ5 J1 L1 J9 L9 DDR_A_MA15 M7 3 BA0 BA1 BA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD B2 D9 G7 K2 K8 N1 N9 R1 R9 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 M2 N8 M3 CK CK CKE A1 A8 C1 C9 D2 E9 F1 H2 H9 MA_ODT DDRA_CS0_DIMMA# DDR_A_RAS# DDR_A_CAS# DDR_A_WE# K1 L2 J3 K3 L3 ODT CS RAS CAS WE DQSL DQSU VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ DDR_A_DQS7 DDR_A_DQS6 F3 C7 DML DMU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DQSL DQSU RESET ZQ NC NC NC NC VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ NC C1605 C1606 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 U1604 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 DDR_A_D56 DDR_A_D58 DDR_A_D60 DDR_A_D59 DDR_A_D61 DDR_A_D63 DDR_A_D57 DDR_A_D62 D7 C3 C8 C2 A7 A2 B8 A3 DDR_A_D53 DDR_A_D55 DDR_A_D52 DDR_A_D54 DDR_A_D50 DDR_A_D48 DDR_A_D51 DDR_A_D49 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 B2 D9 G7 K2 K8 N1 N9 R1 R9 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 M2 N8 M3 A1 A8 C1 C9 D2 E9 F1 H2 H9 MA_ODT DDRA_CS0_DIMMA# DDR_A_RAS# DDR_A_CAS# DDR_A_WE# K1 L2 J3 K3 L3 DDR_A_DQS4 DDR_A_DQS5 F3 C7 +1.35V J7 SA_CLK_DDR0 K7 SA_CLK_DDR#0 DDRA_CKE0_DIMMA K9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 E7 D3 B1 B9 D1 D8 E2 E8 F9 G1 G9 DDR_A_DQS#0 DDR_A_DQS#1 G3 B7 DIMM_DRAMRST# T2 DDR_A_ZQ2 L8 MA_ODT DDRA_CS1_DIMMA# DDRA_CKE1_DIMMA DDR_A_ZQ6 DDR_A_MA15 96-BALL SDRAM DDR3L J1 L1 J9 L9 M7 BA0 BA1 BA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD CK CK CKE ODT CS RAS CAS WE DQSL DQSU VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ DML DMU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DQSL DQSU RESET ZQ NC NC NC NC VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ NC M8 H1 C1607 C1608 1 DDR_A_DQS0 DDR_A_DQS1 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 VREFCA VREFDQ 2 K1 L2 J3 K3 L3 DDR_A_D9 DDR_A_D10 DDR_A_D12 DDR_A_D11 DDR_A_D13 DDR_A_D15 DDR_A_D8 DDR_A_D14 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 1 MA_ODT DDRA_CS0_DIMMA# DDR_A_RAS# DDR_A_CAS# DDR_A_WE# D7 C3 C8 C2 A7 A2 B8 A3 M8 H1 2 A1 A8 C1 C9 D2 E9 F1 H2 H9 DDR_A_D2 DDR_A_D6 DDR_A_D7 DDR_A_D4 DDR_A_D3 DDR_A_D1 DDR_A_D5 DDR_A_D0 1 M2 N8 M3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 E3 F7 F2 F8 H3 H8 G2 H7 2 1 2 2 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 C1604 1 F3 C7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 C1603 2 DDR_A_DQS2 DDR_A_DQS3 B2 D9 G7 K2 K8 N1 N9 R1 R9 1 K1 L2 J3 K3 L3 1 MA_ODT DDRA_CS0_DIMMA# DDR_A_RAS# DDR_A_CAS# DDR_A_WE# N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 .047U_0402_16V7K J7 K7 K9 DDR_A_D25 DDR_A_D30 DDR_A_D28 DDR_A_D27 DDR_A_D24 DDR_A_D26 DDR_A_D29 DDR_A_D31 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 VREFCA VREFDQ +VREF_CA .047U_0402_16V7K SA_CLK_DDR0 SA_CLK_DDR#0 DDRA_CKE0_DIMMA D7 C3 C8 C2 A7 A2 B8 A3 M8 H1 .047U_0402_16V7K [6] SA_CLK_DDR0 [6] SA_CLK_DDR#0 [6] DDRA_CKE0_DIMMA DDR_A_D16 DDR_A_D20 DDR_A_D23 DDR_A_D18 DDR_A_D17 DDR_A_D19 DDR_A_D22 DDR_A_D21 +1.35V 2 +V_DDR_REFA U1603 .047U_0402_16V7K M2 N8 M3 E3 F7 F2 F8 H3 H8 G2 H7 .047U_0402_16V7K DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 C1602 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 .047U_0402_16V7K [6] DDR_A_BS0 [6] DDR_A_BS1 [6] DDR_A_BS2 C1601 .047U_0402_16V7K N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 .047U_0402_16V7K DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 VREFCA VREFDQ 2 M8 H1 +VREF_CA +V_DDR_REFA U1602 1 +V_DDR_REFA U1601 2 +VREF_CA +V_DDR_REFA VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E3 F7 F2 F8 H3 H8 G2 H7 DDR_A_D35 DDR_A_D36 DDR_A_D39 DDR_A_D33 DDR_A_D37 DDR_A_D32 DDR_A_D34 DDR_A_D38 D7 C3 C8 C2 A7 A2 B8 A3 DDR_A_D44 DDR_A_D46 DDR_A_D41 DDR_A_D43 DDR_A_D45 DDR_A_D47 DDR_A_D40 DDR_A_D42 +1.35V J7 SA_CLK_DDR0 K7 SA_CLK_DDR#0 DDRA_CKE0_DIMMA K9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 E7 D3 B1 B9 D1 D8 E2 E8 F9 G1 G9 DDR_A_DQS#7 DDR_A_DQS#6 G3 B7 DIMM_DRAMRST# T2 DDR_A_ZQ3 L8 J1 L1 J9 L9 MA_ODT DDRA_CS1_DIMMA# DDRA_CKE1_DIMMA DDR_A_ZQ7 M7 DDR_A_MA15 BA0 BA1 BA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD CK CK CKE ODT CS RAS CAS WE DQSL DQSU VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ DML DMU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DQSL DQSU RESET ZQ NC NC NC NC VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ NC 96-BALL SDRAM DDR3L +1.35V BA0 BA1 BA2 J7 SA_CLK_DDR0 K7 SA_CLK_DDR#0 DDRA_CKE0_DIMMA K9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 CK CK CKE ODT CS RAS CAS WE B1 B9 D1 D8 E2 E8 F9 G1 G9 G3 B7 DIMM_DRAMRST# T2 DDR_A_ZQ4 L8 DML DMU RESET ZQ NC NC NC NC M7 DDR_A_MA15 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DQSL DQSU J1 L1 J9 L9 MA_ODT DDRA_CS1_DIMMA# DDRA_CKE1_DIMMA DDR_A_ZQ8 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ DQSL DQSU E7 D3 DDR_A_DQS#4 DDR_A_DQS#5 VDD VDD VDD VDD VDD VDD VDD VDD VDD VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ NC 96-BALL SDRAM DDR3L B2 D9 G7 K2 K8 N1 N9 R1 R9 2 A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9 3 96-BALL SDRAM DDR3L K4B4G1646B-HYK0_FBGA96 K4B4G1646B-HYK0_FBGA96 K4B4G1646B-HYK0_FBGA96 K4B4G1646B-HYK0_FBGA96 DDR1@ DDR1@ DDR1@ DDR1@ +1.35VS MA_ODT R1601 1 2 30_0402_5% +0.675VS [6] SM_DIMM_VREFCA SA_DIMM_VREFDQ [6] 1 2 2 2 240_0402_1% DDR_A_ZQ6 R1609 1 2 240_0402_1% DDR_A_ZQ7 R1612 1 2 240_0402_1% DDR_A_ZQ8 +1.35V P/N: SGA00004L00 1 C1620 1 C1627 1 C1628 1 C1624 1 C1621 1 C1629 1 C1622 1 C1625 1 C1630 1 C1623 2 2 2 2 2 2 2 2 2 2 2013/03/08 Deciphered Date 1 + 2 C1626 @ 220U_D2_2VY_R15M 1 DDR_A_ZQ5 R1607 1 4 Compal Electronics, Inc. Compal Secret Data Security Classification Issued Date 2 240_0402_1% 0.1U_0402_10V6K 2 2 DDR_A_ZQ4 R1606 1 0.1U_0402_10V6K 1 2 1 1 2 2 2 240_0402_1% 0.1U_0402_10V6K 1 2 DDR_A_ZQ3 R1605 1 0.1U_0402_10V6K 2 2 2 240_0402_1% 10U_0603_6.3V6M 1 2 DDR_A_ZQ2 R1604 1 10U_0603_6.3V6M 1 2 1 C1613 DDR_A_ZQ1 2 240_0402_1% 10U_0603_6.3V6M 2 1 C1610 2 240_0402_1% R1603 1 10U_0603_6.3V6M R1632 24.9_0402_1% 1 C1612 10U_0603_6.3V6M R1635 24.9_0402_1% R1631 1.8K_0402_1% 1 C1609 10U_0603_6.3V6M R1630 1.8K_0402_1% C1615 0.022U_0402_16V7K 1 C1611 10U_0603_6.3V6M Change Symbol 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 26.1_0402_1% 26.1_0402_1% 1U_0402_6.3V6K C1616 0.022U_0402_16V7K 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1U_0402_6.3V6K 4 R1613 1.8K_0402_1% R1618 2.7_0402_1% 1 2 R1608 1 R1610 1 R1611 1 R1614 1 R1615 1 R1617 1 R1616 1 R1620 1 R1621 1 R1622 1 R1623 1 R1625 1 R1626 1 R1628 1 R1629 1 R1627 1 R1633 1 R1634 1 R1636 1 R1637 1 R1638 1 R1639 1 R1640 1 R1641 1 R1642 1 R1643 1 R1644 1 R1645 1 1U_0402_6.3V6K +VREF_CA R1619 1.8K_0402_1% R1624 4.99_0402_1% 1 2 +V_DDR_REFA DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 DDR_A_WE# DDR_A_CAS# DDR_A_RAS# DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 DDRA_CS0_DIMMA# DDRA_CS1_DIMMA# DDRA_CKE0_DIMMA DDRA_CKE1_DIMMA SA_CLK_DDR0 SA_CLK_DDR#0 1U_0402_6.3V6K +1.35V +1.35V R1602 1 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: A B C D Sheet Friday, March 07, 2014 E 16 of 42 A B C D E On Board B DDR_B_MA[0..15] [6] DDR_B_MA[0..15] DDR_B_DQS#[0..7] [6] DDR_B_DQS#[0..7] DDR_B_DQS[0..7] [6] DDR_B_DQS[0..7] DDR_B_D[0..63] [6] DDR_B_D[0..63] 1 1 +VREF_CA +V_DDR_REFB F3 C7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 B2 D9 G7 K2 K8 N1 N9 R1 R9 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 M2 N8 M3 A1 A8 C1 C9 D2 E9 F1 H2 H9 MB_ODT DDRB_CS0_DIMMA# DDR_B_RAS# DDR_B_CAS# DDR_B_WE# K1 L2 J3 K3 L3 DDR_B_DQS6 DDR_B_DQS7 F3 C7 +1.35V 2 [6] [6] [6] [6] DDRB_CS0_DIMMA# DDR_B_RAS# DDR_B_CAS# DDR_B_WE# E7 D3 [16,5] DIMM_DRAMRST# [6] DDRB_CS1_DIMMA# [6] DDRB_CKE1_DIMMA DDR_B_DQS#2 DDR_B_DQS#3 G3 B7 DIMM_DRAMRST# T2 DDR_B_ZQ1 L8 MB_ODT DDRB_CS1_DIMMA# DDRB_CKE1_DIMMA DDR_B_ZQ5 J1 L1 J9 L9 DDR_B_MA15 M7 3 BA0 BA1 BA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD CK CK CKE ODT CS RAS CAS WE DQSL DQSU VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ DML DMU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DQSL DQSU RESET ZQ NC NC NC NC VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ NC C1705 C1706 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 E3 F7 F2 F8 H3 H8 G2 H7 DDR_B_D53 DDR_B_D49 DDR_B_D50 DDR_B_D52 DDR_B_D48 DDR_B_D51 DDR_B_D54 DDR_B_D55 D7 C3 C8 C2 A7 A2 B8 A3 DDR_B_D63 DDR_B_D61 DDR_B_D62 DDR_B_D60 DDR_B_D56 DDR_B_D58 DDR_B_D57 DDR_B_D59 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 B2 D9 G7 K2 K8 N1 N9 R1 R9 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 M2 N8 M3 A1 A8 C1 C9 D2 E9 F1 H2 H9 MB_ODT DDRB_CS0_DIMMA# DDR_B_RAS# DDR_B_CAS# DDR_B_WE# K1 L2 J3 K3 L3 DDR_B_DQS4 DDR_B_DQS5 F3 C7 +1.35V J7 SB_CLK_DDR0 K7 SB_CLK_DDR#0 DDRB_CKE0_DIMMA K9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 E7 D3 B1 B9 D1 D8 E2 E8 F9 G1 G9 DDR_B_DQS#0 DDR_B_DQS#1 G3 B7 DIMM_DRAMRST# T2 DDR_B_ZQ2 L8 MB_ODT DDRB_CS1_DIMMA# DDRB_CKE1_DIMMA DDR_B_ZQ6 DDR_B_MA15 96-BALL SDRAM DDR3L J1 L1 J9 L9 M7 BA0 BA1 BA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD CK CK CKE ODT CS RAS CAS WE DQSL DQSU VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ DML DMU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DQSL DQSU RESET ZQ NC NC NC NC VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ NC M8 H1 C1707 C1708 1 DDR_B_DQS0 DDR_B_DQS1 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 U1704 VREFCA VREFDQ 2 K1 L2 J3 K3 L3 DDR_B_D9 DDR_B_D10 DDR_B_D12 DDR_B_D11 DDR_B_D13 DDR_B_D15 DDR_B_D8 DDR_B_D14 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 1 MB_ODT DDRB_CS0_DIMMA# DDR_B_RAS# DDR_B_CAS# DDR_B_WE# D7 C3 C8 C2 A7 A2 B8 A3 M8 H1 2 A1 A8 C1 C9 D2 E9 F1 H2 H9 DDR_B_D7 DDR_B_D5 DDR_B_D3 DDR_B_D0 DDR_B_D6 DDR_B_D4 DDR_B_D2 DDR_B_D1 1 M2 N8 M3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 E3 F7 F2 F8 H3 H8 G2 H7 2 1 2 2 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 C1704 1 F3 C7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 C1703 2 DDR_B_DQS2 DDR_B_DQS3 B2 D9 G7 K2 K8 N1 N9 R1 R9 1 K1 L2 J3 K3 L3 1 MB_ODT DDRB_CS0_DIMMA# DDR_B_RAS# DDR_B_CAS# DDR_B_WE# N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 .047U_0402_16V7K J7 K7 K9 DDR_B_D24 DDR_B_D26 DDR_B_D28 DDR_B_D27 DDR_B_D29 DDR_B_D30 DDR_B_D25 DDR_B_D31 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 VREFCA VREFDQ .047U_0402_16V7K SB_CLK_DDR0 SB_CLK_DDR#0 DDRB_CKE0_DIMMA D7 C3 C8 C2 A7 A2 B8 A3 M8 H1 .047U_0402_16V7K [6] SB_CLK_DDR0 [6] SB_CLK_DDR#0 [6] DDRB_CKE0_DIMMA DDR_B_D18 DDR_B_D20 DDR_B_D19 DDR_B_D16 DDR_B_D22 DDR_B_D17 DDR_B_D23 DDR_B_D21 +VREF_CA +V_DDR_REFB U1703 .047U_0402_16V7K M2 N8 M3 E3 F7 F2 F8 H3 H8 G2 H7 .047U_0402_16V7K DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 C1702 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 .047U_0402_16V7K [6] DDR_B_BS0 [6] DDR_B_BS1 [6] DDR_B_BS2 C1701 .047U_0402_16V7K N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 .047U_0402_16V7K DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 VREFCA VREFDQ 2 M8 H1 +VREF_CA U1702 1 +V_DDR_REFB U1701 2 +VREF_CA +V_DDR_REFB VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E3 F7 F2 F8 H3 H8 G2 H7 DDR_B_D39 DDR_B_D32 DDR_B_D34 DDR_B_D33 DDR_B_D38 DDR_B_D36 DDR_B_D35 DDR_B_D37 D7 C3 C8 C2 A7 A2 B8 A3 DDR_B_D44 DDR_B_D47 DDR_B_D40 DDR_B_D43 DDR_B_D45 DDR_B_D42 DDR_B_D41 DDR_B_D46 +1.35V J7 SB_CLK_DDR0 K7 SB_CLK_DDR#0 DDRB_CKE0_DIMMA K9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 E7 D3 B1 B9 D1 D8 E2 E8 F9 G1 G9 DDR_B_DQS#6 DDR_B_DQS#7 G3 B7 DIMM_DRAMRST# T2 DDR_B_ZQ3 L8 MB_ODT DDRB_CS1_DIMMA# DDRB_CKE1_DIMMA DDR_B_ZQ7 DDR_B_MA15 J1 L1 J9 L9 M7 BA0 BA1 BA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD CK CK CKE ODT CS RAS CAS WE VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ DQSL DQSU DML DMU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DQSL DQSU RESET ZQ NC NC NC NC VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ NC 96-BALL SDRAM DDR3L +1.35V J7 SB_CLK_DDR0 K7 SB_CLK_DDR#0 DDRB_CKE0_DIMMA K9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 E7 D3 B1 B9 D1 D8 E2 E8 F9 G1 G9 DDR_B_DQS#4 DDR_B_DQS#5 G3 B7 DIMM_DRAMRST# T2 DDR_B_ZQ4 L8 J1 L1 J9 L9 MB_ODT DDRB_CS1_DIMMA# DDRB_CKE1_DIMMA DDR_B_ZQ8 M7 DDR_B_MA15 BA0 BA1 BA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD CK CK CKE ODT CS RAS CAS WE VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ DQSL DQSU DML DMU VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DQSL DQSU RESET ZQ NC NC NC NC VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ NC 96-BALL SDRAM DDR3L B2 D9 G7 K2 K8 N1 N9 R1 R9 2 A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9 3 96-BALL SDRAM DDR3L K4B4G1646B-HYK0_FBGA96 K4B4G1646B-HYK0_FBGA96 K4B4G1646B-HYK0_FBGA96 K4B4G1646B-HYK0_FBGA96 DDR1@ DDR1@ DDR1@ DDR1@ +0.675VS 1 +V_DDR_REFB DDR_B_ZQ2 R1710 1 2 240_0402_1% DDR_B_ZQ3 R1712 1 2 240_0402_1% DDR_B_ZQ4 R1715 1 2 240_0402_1% DDR_B_ZQ5 R1718 1 2 240_0402_1% DDR_B_ZQ6 R1721 1 2 240_0402_1% DDR_B_ZQ7 R1724 1 2 240_0402_1% DDR_B_ZQ8 P/N: SGA00004L00 1 C1724 1 C1718 1 C1728 1 C1725 1 C1726 1 C1719 1 C1727 2 2 2 2 2 2 2 2 2 2 1 + 4 2 2 C1720 @ 220U_D2_2VY_R15M 1 C1723 0.1U_0402_10V6K 1 C1717 0.1U_0402_10V6K 1 C1716 0.1U_0402_10V6K 2 +1.35V 0.1U_0402_10V6K 1 DDR_B_ZQ1 2 240_0402_1% 10U_0603_6.3V6M 1 2 2 240_0402_1% R1706 1 10U_0603_6.3V6M R1741 24.9_0402_1% 2 R1703 1 10U_0603_6.3V6M R1739 1.8K_0402_1% 2 1 C1713 10U_0603_6.3V6M C1721 0.022U_0402_16V7K 2 1 C1710 10U_0603_6.3V6M 4 2 1 C1712 10U_0603_6.3V6M 1 R1733 4.99_0402_1% 1 2 2 R1727 1.8K_0402_1% 2 1 C1711 10U_0603_6.3V6M +1.35V 1 C1709 1U_0402_6.3V6K SB_DIMM_VREFDQ [6] 2 30_0402_5% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 34.8_0402_1% 26.1_0402_1% 26.1_0402_1% 1U_0402_6.3V6K R1701 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1U_0402_6.3V6K MB_ODT R1702 1 R1704 1 R1705 1 R1707 1 R1708 1 R1711 1 R1709 1 R1713 1 R1714 1 R1716 1 R1717 1 R1719 1 R1720 1 R1722 1 R1723 1 R1725 1 R1726 1 R1728 1 R1729 1 R1730 1 R1731 1 R1732 1 R1734 1 R1735 1 R1737 1 R1736 1 R1738 1 R1740 1 1U_0402_6.3V6K +1.35VS DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 DDR_B_WE# DDR_B_CAS# DDR_B_RAS# DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 DDRB_CS0_DIMMA# DDRB_CS1_DIMMA# DDRB_CKE0_DIMMA DDRB_CKE1_DIMMA SB_CLK_DDR0 SB_CLK_DDR#0 0502A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: A B C D Sheet Friday, March 07, 2014 E 17 of 42 1 2 3 Digitizer & CMOS Conn DMIC & CAMERA module pin define No SIGNAL A 1 2 3 4 5 6 7 8 EMI PIN23 [11] USB20_P5 PIN1 R1802 1 @EMI@ 2 0_0402_5% R1803 1 @EMI@ 2 0_0402_5% eDP Panel Conn L1802 @EMI@ WCM-2012-900T_4P PIN24 PIN22 5 0610A [11] USB20_N5 VCC (3.3V) DD+ GND_CAM GND_DMIC MIC_C MIC_D MIC_VCC 4 USB20_N5 3 USB20_P5 2 3 4 2 1 4 USB20_N5_R 1 USB20_P5_R PIN20 PIN21 A [5] EDP_AUXN C1802 0.1U_0402_10V6K 1 2 CPU_eDP_AUXN [5] EDP_AUXP C1803 0.1U_0402_10V6K 1 2 CPU_eDP_AUXP 0416A +3VALW P/N:SP011211150 JDIGI1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 USB20_P7 USB20_N7 [11] USB20_P7 [11] USB20_N7 1 +3VS 2 +3VS_CDI F1801 2A_32V_0438001.WR 0429A LID_SW# +3VLP_LID USB20_N5_R USB20_P5_R DMIC & CAMERA [20] DMIC_CLK [20] DMIC_DATA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 HOME_BTN# [31] HOME_BTN# R1805 100K_0402_5% 1 2 0326A +3VS B+ +LEDVDD F1803 3A_32V_0438003.WR 1 2 1 GND4 GND3 GND2 GND1 24 23 22 21 W=20mils C1804 0.1U_0402_10V6K 1 Need to change symbol 2 Place closed to JEDP1 2 P/N:SP011302062 C1805 4.7U_0805_25V6-K @ JEDP1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 ACES_50473-0200M-002 ME@ B Need to change symbol [5,9] INVPWM LCD Panel (10 PIN) +LCDVDD_CONN 2 3A_32V_0438003.WR R1807 1 F1805 1 F1808 1 2 750_0402_1% +3VALW_LOGO 2 2A_32V_0438001.WR +3VS_TS 2 1A_32V_0438001.WR +3VLP_LID HOME_BTN# CPU_eDP_AUXN CPU_eDP_AUXP 0326A A LOGO RED LIGHT (2 PIN) 0822A 1 [31] BKOFF# 2 2 EMI@ 33P_0402_50V8J R1808 10K_0402_5% 0402A [31] LID_SW# [10] P_SENSE P_SENSE +3VS_TS SENSE_SCL SENSE_SDA ALS_INT [21] SENSE_SCL [21] SENSE_SDA [21] ALS_INT Sensor/B (10 PIN) EMI For power on screen flash issue EDP_HPD [9] EDP_HPD Home Button (6 PIN) 1 C1812 HPD Inversion for eDP [30,31] LOGO_LED# +3VALW +3VS 0426A +3VLP [21] [21] [21] [21] [21] ACC_INT1 ACC_INT2 GYRO_INT1 GYRO_INT2 DRDY ACC_INT1 ACC_INT2 GYRO_INT1 GYRO_INT2 DRDY DMIC_CLK +3VS_TS Touch Panel (6 PIN) 1 DMIC_DATA [10,9] TS_ON [11] USB20_N4 [11] USB20_P4 R1801 100K_0402_5% C1801 C1808 EMI@ 22P_0402_50V8J EMI@ 22P_0402_50V8J 2 C INVPWM BKOFF# EDP_HPD +LCDVDD_CONN_F F1804 1 [5] [5] [5] [5] LCD Panel (4 PIN) 0424A C1810 C1809 C1807 C1806 EDP_TXP0 EDP_TXN0 EDP_TXP1 EDP_TXN1 1 1 1 1 2 2 2 2 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K EDP_C_TXP0 EDP_C_TXN0 EDP_C_TXP1 EDP_C_TXN1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 B C GND GND GND GND 41 42 43 44 ACES_50473-0400M-002 ME@ EMI Camera Modual POWER CIRCUIT Touch PANEL module pin define No USB/I2C 0402A CMOS SUSPEND 2.4mA LCD POWER CIRCUIT SS table Css 100mS 10nF 10mS W=60mils 5 1 L1801 EMI@ FBMA-L11-201209-221LMA30T_0805 1 2 1mS 2 [9] PCH_ENVDD C1814 0.1U_0402_10V6K @ R1810 2 @ 4 GND 1 2 1 C1815 SS 3 2 APL3512ABI-TRG_SOT23-5 1 0_0402_5% [10,11,12,13,14,15,16,17,19,20,21,22,23,24,26,27,28,29,30,31,32,33,34,35,36,37,38,39,4,40,5,7,8,9] PCH_ENVDD_R TS_PRSNC# W=60mils EMI VIN EN 2 1 2 1 C1816 @2 C1811 0.1U_0402_10V6K @ 4.7U_0805_10V4Z C1813 4.7U_0805_10V4Z 1mS 1 VOUT 1 2 3 4 5 6 7 8 9 10 +3VS_CDI +LCDVDD_CONN 0.1U_0402_10V6K Open or tied to VIN +LCDVDD U1801 Tss 0.1uF 1nF D +3VS Issued Date 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 D Compal Electronics, Inc. Compal Secret Data Security Classification 0109 Remove after test. VCC (3.3V) Reset GND DD+ GND SCL SDA INT PRSENT Friday, March 07, 2014 Sheet 5 18 of 42 1 2 3 4 5 HDMI P/N:SM070001S00 P/N: SP060005JB0 TYPE C Connector A 2 0.1U_0402_16V7K PCH_DPB_P3_C 4 [5] CPU_DP2_N3 C294 1 2 0.1U_0402_16V7K PCH_DPB_N3_C L38 EMI@ 1 [5] CPU_DP2_P2 C548 1 2 0.1U_0402_16V7K PCH_DPB_P2_C 4 [5] CPU_DP2_N2 C545 1 2 0.1U_0402_16V7K PCH_DPB_N2_C L36 EMI@ 1 [5] CPU_DP2_P1 C542 1 2 0.1U_0402_16V7K PCH_DPB_P1_C 4 [5] CPU_DP2_N1 C541 1 2 0.1U_0402_16V7K PCH_DPB_N1_C L37 EMI@ 1 [5] CPU_DP2_P0 C544 1 2 0.1U_0402_16V7K PCH_DPB_P0_C 4 [5] CPU_DP2_N0 C543 1 2 0.1U_0402_16V7K PCH_DPB_N0_C L35 EMI@ 1 4 3 1 2 4 3 1 2 4 3 1 2 3 HDMI_CLK+_CONN WCM-2012HS-900T 2 +5VS HDMI_CLK-_CONN 3 2 WCM-2012HS-900T 2 HDMI_TX0-_CONN 4 3 1 +HDMI_VCC F5002 1.1A_6V_SMD1812P110TF 1 2 RB491D_SC59-3 1 2 2 HDMI_TX1-_CONN 3 HDMI_TX2+_CONN JHDMI1 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 HDMI_DET WCM-2012HS-900T 2 HDMI_TX2-_CONN HDMIDAT_R HDMICLK_R EMI HDMI_CLK-_CONN HDMI_CLK+_CONN HDMI_TX0-_CONN HDMI_TX0+_CONN +5VS_HDMI HDMI_TX1-_CONN HDMI_TX1+_CONN B 1 2 R523 2.2K_0402_5% 5 6 4 [9] DDI2_CTRL_CK 23 22 21 20 B HDMIDAT_R 2N7002DW-T/R7_SOT363-6 Q1901A 3 HP_DET GND +5V GND RESERVED GND SDA GND SCL CEC DDC/CEC_GND CKCK+ CK_SHIELD D0D0+ D0_SHIELD D1D1+ D1_SHIELD D2D2+ D2_SHIELD CONCR_128DA19ABAN ME@ 1 R525 2.2K_0402_5% 1 [9] DDI2_CTRL_DATA HDMI_TX2-_CONN HDMI_TX2+_CONN 2 2 +3VS Pull up R for PCH SIDE C708 0.1U_0402_10V6K HDMI_TX1+_CONN WCM-2012HS-900T 2 3 A +5VS_HDMI D5015 HDMI_TX0+_CONN 1 [5] CPU_DP2_P3 C295 1 HDMICLK_R Q1901B 2N7002DW-T/R7_SOT363-6 PIN22 R5275 R5276 R5277 R5278 1 1 1 1 2 2 2 2 680_0402_5% 680_0402_5% 680_0402_5% 680_0402_5% HDMI_TX2+_CONN HDMI_TX2-_CONN HDMI_TX1+_CONN HDMI_TX1-_CONN R5279 R5280 R5281 R5282 1 1 1 1 2 2 2 2 680_0402_5% 680_0402_5% 680_0402_5% 680_0402_5% PIN23 PIN1 C 1 C HDMI_TX0+_CONN HDMI_TX0-_CONN HDMI_CLK+_CONN HDMI_CLK-_CONN D +3VS Q40 PIN19 2 G S 3 PIN20 D35 HDMICLK_R 1 1 2 +3VS EMI@ 109 HDMICLK_R D39 HDMI_CLK-_CONN 1 1 EMI@ 109 HDMI_CLK-_CONN D33 HDMI_TX2+_CONN 1 1 EMI@ 109 HDMI_TX2+_CONN HDMIDAT_R 2 2 98 HDMIDAT_R HDMI_CLK+_CONN 2 2 98 HDMI_CLK+_CONN HDMI_TX2-_CONN 2 2 98 HDMI_TX2-_CONN +5VS_HDMI 4 4 77 +5VS_HDMI HDMI_TX0-_CONN 4 4 77 HDMI_TX0-_CONN HDMI_TX1+_CONN 4 4 77 HDMI_TX1+_CONN 5 5 66 HDMI_DET HDMI_TX0+_CONN 5 5 66 HDMI_TX0+_CONN HDMI_TX1-_CONN 5 5 66 HDMI_TX1-_CONN G 2 R524 1M_0402_5% 1 HDMI_DET 3 3 3 1 3 3 3 3 HDMI_DET D S [9] DDI2_HDMI_HPD DDI2_HDMI_HPD PIN21 8 Q903 2 D 8 YSCLAMP0524P_SLP2510P8-10-9 8 YSCLAMP0524P_SLP2510P8-10-9 YSCLAMP0524P_SLP2510P8-10-9 D R527 20K_0402_5% 1 P/N: SCA00000U10 ESD Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 Friday, March 07, 2014 Sheet 5 19 of 42 1 2 3 4 5 Audio CX20751 +VREF_1V65 +LDO_OUT_3.3V AVDD_3.3 pinis output of internal LDO. NOT connect to external supply. Speaker - L JSPK1 2 SPK_L1SPK_L2+ 2 2 2 2 C5208 68P_0402_50V8J @EMI@ 1 1 2 2 C5209 68P_0402_50V8J @EMI@ 36 37 Change Symbol RF SPK_L2+ SPK_L1- 12 14 SPK_R2+ SPK_R1- 17 15 1 CA71 @ 1 CA72 2 2 2 2 2 CLASS-D_REF 38 JSENSE JSPK2 W=20mils W=25mils 4 3 SPK_R1-_CONN SPK_R2+_CONN 2 1 EMI SPK_R1SPK_R2+ R1356 R1357 Please bypass caps very close to device. 1 EMI@ 1 EMI@ 2 0_0603_5% 2 0_0603_5% 32 33 30 31 25 26 APPLE_MIC NOKIA_MIC HGNDA HGNDB 22 23 HP_L HP_R 21 19 20 AVEE FLY_P FLY_N External MIC EMI Headphone AVEE FLY_P FLY_N 1 CA50 C1137 2 CA68 1 CX20751-21Z_QFN40 2 1 2.2U_0603_6.3V4Z 1 CA59 0.1U_0402_16V4Z 41 2 JSENSE RA35 1 2 39.2K_0402_1% PLUG_IN C Combo Jack Conn. P/N: DC021301074 2 10 mils CA76 22P_0402_50V8J @EMI@ APPLE_MIC NOKIA_MIC HP_R HP_L ESD D2402 @EMI@ I/O1 D2403 I/O3 4 SPK_L1-_CONN 1 SPK_R2+_CONN 0506B @EMI@ I/O1 RA44 RA42 RA43 RA41 1 1 1 1 2 2 2 2 CA78 1 CA77 1 100_0402_1% 100_0402_1% 15_0402_5% 15_0402_5% 2 2.2U_0402_6.3V6M 2 2.2U_0402_6.3V6M HGNDB HGNDA HP_OUTR HP_OUTL 5 PLUG_IN GNDA HGNDB PC_BEEP_C_R PC_EEP_C 2 D2418 RA2 33K_0402_1% @ EMI@ 2 3 EMI@ 3 2 D2417 2 C1147 0.1U_0402_16V4Z 1 2 PC_BEEP 1 YSDA0502C_SOT23-3 1 YSDA0502C_SOT23-3 1 R1131 10K_0402_5% [10] SPKR 1 BAS40CW_SOT-323 1 GNDA GNDA EMI Issued Date 2 Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Compal Electronics, Inc. SCHEMATIC, MB AA341 Size Document Number Custom 4019P2 Sheet 20 of 42 Friday, March 07, 2014 Date: Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 D 1 2 PCH Beep normal-open type C357 RA3 33K_0402_1% @ 2 1 R1124 33_0402_5% 1 2 3 D2519 3 [31] BEEP# 3 PC Beep C361 2 HGNDA C360 1 Vendor Recommend For Speaker Hum Noise HGNDA HGNDB HP_OUTL HP_OUTR C358 2 I/O4 AZC099-04S.R7G_SOT23-6 C359 1 I/O2 SINGA_2SJ3082-005111F ME@ 6 1 GND VDD 2 AZC099-04S.R7G_SOT23-6 GND 1 3 SPK_R1-_CONN 2 SPK_L2+_CONN 1 I/O4 6 2 I/O2 VDD 1 EMI@ 2 0.1U_0402_16V4Z GND 2 1 3 7 8 EMI@ 1000P_0402_50V7K C1144 G G 5 EMI@ 1000P_0402_50V7K EMI@ 2 0.1U_0402_16V4Z 2 EMI@ 1000P_0402_50V7K 1 5 EMI@ 1000P_0402_50V7K C1143 JHP2 M G R L 6 2 EMI@ 1000P_0402_50V7K C1142 EMI@ 1 2 0.1U_0402_16V4Z 4 3 2 1 4 I/O3 0424A EC Beep 0503B CA68 vendor suggest change to 2.2U CA75 22P_0402_50V8J @EMI@ 1 D C1139 +3VS 1U_0603_10V4Z RA28 33_0402_5% @EMI@ CA69 22P_0402_50V8J @EMI@ B 2 1 ACES_50278-00201-001 ME@ Rdc < 0.05 ohms Rated Current > 2A 34 35 G2 G1 RA36 5.11K_0402_1% RIGHT+ RIGHT- HDA_RST_AUDIO# HDA_BITCLK_AUDIO DMIC_CLK_R 2 Speaker - R LEFT+ LEFT- C RA26 33_0402_5% @EMI@ 0604A 1 1 CA49 2 1 CA52 2 MICBIASB MICBIASC PORTB_L_LINE PORTB_R_LINE MUSIC_REQ/GPIO0/PORTC_L_MIC PORTA_L GPIO1/PORTC_R_MIC PORTA_R EMI 1 1 CA55 27 28 24 29 VREF_1.65V FILT_1.8 VDD_IO VDDO_3.3 DVDD_3.3 AVDD_3.3 AVDD_5V AVDD_HP JSENSE 13 16 11 +5VS RA47 0_0805_5% 1 2 @ GND Internal SPEAKER LPWR_5.0 RPWR_5.0 CLASS-D_REF PORTD_A_MIC PORTD_B_MIC DMIC_DAT/GPIO1 HGNDA DMIC_CLK / MUSIC_REQ/GPIO0 HGNDB 1 40 DMIC_DATA DMIC_CLK_R SBY100505T-301Y-N 2 2 1 EMI@ RA37 0503B @EMI@ 1000P_0402_50V7K 0424A PC_BEEP SPKR_MUTE# 2 @EMI@ 1000P_0402_50V7K [31] EC_MUTE# [18] DMIC_DATA [18] DMIC_CLK BIT_CLK SYNC SDATA_IN SDATA_OUT 10 39 PC_BEEP DMIC RESET# 2 4.7U_0603_6.3V6K 5 8 6 4 2 4.7U_0603_6.3V6K 2 33_0402_5% 9 HDA_BITCLK_AUDIO HDA_SYNC_AUDIO HDA_SDIN0_AUDIO HDA_SDOUT_AUDIO A C1136 2 0_0402_5% @ 0.1U_0402_16V4Z RA25 1 HDA_RST_AUDIO# C1135 Layout Note:Path from +5VS to LPWR_5.0 RPWR_5.0 must be very low resistance (<0.01 ohms) 0.1U_0402_16V4Z UA1 1 CA47 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 4.7U_0603_6.3V6K 1 CA57 3 7 2 18 10 mils 1 CA67 @ 1 +LDO_1.8V 1 CA48 2 1 1 2 1 CA61 @ 0.1U_0402_16V4Z 2 1 RA40 1 CA14 4.7U_0603_6.3V6K 1 CA54 [7] HDA_RST_AUDIO# HDA_BITCLK_AUDIO HDA_SYNC_AUDIO HDA_SDIN0 HDA_SDOUT_AUDIO +3VALW 0610A 2 0_0402_5% @ 0604A B [7] [7] [7] [7] +3VS 2 0_0402_5% @ G2 G1 ACES_50278-00201-001 ME@ EMI 4.7U_0603_6.3V6K 1 CA51 @ Should be same supply rail as used for PCH HDA bus controller section 2 1 +5VS 0.1U_0402_16V4Z 0610A 0.1U_0402_16V4Z 2 0_0402_5% @ RA12 1 +VDD_IO 4.7U_0603_6.3V6K RA27 1 SPK_L1-_CONN SPK_L2+_CONN 2 2 +3VS 2 0_0402_5% 2 0_0603_5% 2 0_0603_5% @EMI@ 1000P_0402_50V7K RA11 1 0.1U_0402_16V4Z 1 CA62 @ 1U_0603_10V4Z 1 CA63 0.1U_0402_16V4Z 1 CA70 1U_0603_10V4Z 1 CA56 @ 0604A RA10 1 @ 1 EMI@ 1 EMI@ Rdc < 0.05 ohms Rated Current > 2A Vendor Recommend For Speaker Hum Noise AVDD_HP +3VALW R1358 R1359 @EMI@ 1000P_0402_50V7K +3VS_VDD33 RA46 0_0402_5% 1 2 @ 4 3 1 1 W=25mils EMI 2 2 W=20mils 1 2 0.1U_0402_16V4Z 1 CA53 2.2U_0603_6.3V4Z 2 CA60 0.1U_0402_16V4Z +3VS 1 CA13 1U_0603_10V4Z A 1 CA12 2 3 4 5 Rev C A B C D E +3VS +3VS 1 R2103 0_0603_5% @ PAD~D PAD~D T2103 @ T2104 @ Y2101 5 6 SENSOR_RST#_R 7 48 36 PC13 PC14 PC15 NRST 2nd G-sensor 18 19 20 39 40 41 42 43 45 46 21 22 25 26 27 28 1 C2105 0.1U_0402_10V6K 2 ACC_INT1 ACC_INT2 GYRO_INT1 GYRO_INT2 ACC_INT1 [18] ACC_INT2 [18] GYRO_INT1 [18] GYRO_INT2 [18] SENSE_SCL SENSE_SDA HUB_PB8 HUB_PB9 I2C0_SCL_SEN_R R2107 I2C0_SDA_SEN_R R2108 SMB_HUB_ALERT# TABLET# DRDY ALS_INT 2 2 @ T2101 PAD~D @ T2102 PAD~D 1 0_0402_5% 1 0_0402_5% @ T2107 PAD~D @ @ I2C0_SCL_SEN [10] I2C0_SDA_SEN [10] DRDY [18] ALS_INT [18] LAPTOP# 44 SENSOR_BOOT0 PAD VSS_3 VSS_2 2 3 4 R2113 20K_0402_5% 49 STM32F103CBU6TRC18_VFQFPN48_7X7 47 2 35 2 BOOT0 1 C2110 15P_0402_50V8J 0.1U_0402_10V6K 2 OSC_IN OSC_OUT 1 2 12MHZ_12PF_X3S012000DC1H-X C2104 1 VBAT VDD_3 24 9 2 SENSOR_32K_IN SENSOR_32K_OUT PA7 PA8 PA9 PA10 PA11/USB_DM PA12/USB_DP PA13/SWDIO PA14/SWCLK PA15 VSS_1 1 C2109 15P_0402_50V8J 17 29 30 31 32 33 34 37 38 PB0 PB1 PB2 PB3 PB4 PB5 PB6/I2C1_SCL PB7/I2C1_SDA PB8 PB9 PB10/I2C2_SCL PB11/I2C2_SDA PB12/I2C2_SMBAL PB13 PB14 PB15 PA1 PA2 PA3 PA4 PA5 PA6 VSSA 3 4 ACC2_INT1 PA0-WKUP 8 2 11 12 13 14 15 16 R2109 1.5K_0402_5% 1 2 HUB_PA10 USB20_N6_R USB20_P6_R HUB_PA13 HUB_PA14 ACC2_INT2 2 0_0402_5% 2 0_0402_5% 0.1U_0402_10V6K 1 @ 10 PA1 PA2 PA3 PA4 PA5 PA6 23 1 1 R2111 R2112 C2103 0325A Change symbol 2 0604A [11] USB20_N6 [11] USB20_P6 PA0_WAKEUP T2106 @ VDD_2 PAD~D VDDA U2102 VDD_1 0.1U_0402_10V6K 2 C2102 1 +SENSOR_VDD 1 2 @ 1 +SENSOR_VDDA @ 2 R2102 0_0402_5% 1 0604A 2 1 1 Sensor Hub +3VS 1 +3VS 2 3 1 C2111 0.1U_0402_10V6K 1 1 1 1 R2106 R2105 R2133 R2134 2 2 2 2 2.2K_0402_5% 2.2K_0402_5% 10K_0402_5% 10K_0402_5% SENSE_SCL [18] SENSE_SDA [18] TABLET# LAPTOP# [31] 0620B 2 10U_0603_6.3V6M C2106 1 2 C2101 1 2 0.1U_0402_10V6K ACC2_INT1 ACC2_INT2 +3VS 1 1 1 R2128 10K_0402_5% R2129 10K_0402_5% R2125 10K_0402_5% 2 2 PA5 1 PA4 @ R2124 10K_0402_5% 1 PA3 @ R2123 10K_0402_5% R2130 10K_0402_5% PA6 @ R2131 10K_0402_5% 2 2 PA2 @ R2127 10K_0402_5% @ R2122 10K_0402_5% 2 R2121 10K_0402_5% R2126 10K_0402_5% 2 +3VS 2 PA1 +3VS 1 @ R2120 10K_0402_5% 1 2 SA00004VF00 +3VS 2 +3VS 2 LIS3DHTR_LGA16_3X3 +3VS 1 10 1 1 14 Vdd RES +3VS 2 NC NC 5 1 2 3 11 9 SENSOR_RST#_R 1 R2132 0_0402_5% INT1 INT2 ADC1 ADC2 ADC3 PLT_RST_BUF# R2114 100K_0402_5% 2 2 16 15 13 CS SCLSPC SDA/SDI/SDO SDO/SA0 [22,27,30,31,8,9] @ R2117 0_0402_5% 2 1 GND 8 4 6 7 GND C2108 1 2 SENSE_SCL SENSE_SDA ACC2_SA0 Vdd_IO U2101 12 1 R2101 0_0402_5% @ 0.1U_0402_10V6K 2 3 1 +3VS 1 +3VS ACC2_SA0 4 H 0x33h 0x32h L 0x31h 0x30h 4 Compal Secret Data Security Classification Issued Date 2013/03/08 Deciphered Date 2015/03/08 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Title Compal Electronics, Inc. SCHEMATIC, MB AA341 Size Document Number Custom Date: Rev C 4019P2 Friday, March 07, 2014 Sheet E 21 of 42 A B C D E 1 1 Card Reader 40mil +3VS_CARD +3VS RTS5227-QFN32 1 1 2 1 2 1 2 1 2 C2206 0.1U_0402_10V6K 2 C2205 10U_0603_6.3V6M @ C2204 0.1U_0402_10V6K 2 1 C2202 0.1U_0402_10V6K +ODR_PWR +3VS_CARD C2203 10U_0603_6.3V6M C2201 4.7U_0603_6.3V6K 40 mils 40mil R2201 0_0603_5% 1 2 Close to Pin 27 P/N: SP07000TF00 Close to Pin 11 Close to JP2 Pin 5 +ODR_PWR DV33_18 AV12 MS_INS# WAKE# Card_3V3 SP2 SP3 3V3aux SP4 9 RREF SP5 SP6 [11] PCIE_PTX_C_DRX_P4 [11] PCIE_PTX_C_DRX_N4 [11] PCIE_PRX_DTX_P4 [11] PCIE_PRX_DTX_N4 PCIE_PTX_C_DRX_P4 3 PCIE_PTX_C_DRX_N4 4 PCIE_PRX_DTX_P4 1 C2212 PCIE_PRX_DTX_N4 1 C2213 2 PCIE_PRX_C_DTX_P4 0.1U_0402_10V6K PCIE_PRX_C_DTX_N4 0.1U_0402_10V6K 2 7 8 HSIP 3 [8] CLK_PCIE_CR# CLK_PCIE_CR 5 CLK_PCIE_CR# 6 SP7 [10,8] CR_CLKREQ# +3VS_CARD 2 CR_CLKREQ# 1 R2210 2 CR_GPIO 28 16 SD_D0 17 SD_CLK 19 SD_CMD 20 SD_D3 21 SD_D2 29 SD_WP SD_D0 SD_D1 SD_D2 SD_D3 @EMI@ 1 R2203 2 SD_CLK_R 0_0402_5% 1 8 9 1 2 2 C2211 5P_0402_50V8C SD_WP# SD_CD 10 11 12 13 CMD VSS VDD CLK VSS DAT0 DAT1 DAT2 CD/DAT3 WP SW CD SW GND SW GND SW GND GND 14 15 T-SOL_156-1000302601_NR ME@ HSON NC REFCLKP NC REFCLKN NC PERST# NC 13 22 23 +3VS GND R2205 100K_0402_5% 26 R2206 100K_0402_5% R2209 @ 0_0402_5% 1 2 33 R2207 @ 10K_0402_5% R2208 @ 0_0402_5% 1 2 SD_CD# SD_WP Q2201A D SD_CD 10K_0402_5% +3VS_CARD 3 25 CLK_REQ# GPIO +3VS 24 2 1 PLT_RST_BUF# SD_D1 3 4 5 6 7 HSOP NC [21,27,30,31,8,9] PLT_RST_BUF# 15 2 10K_0402_5% HSIN NC [8] CLK_PCIE_CR CR_WAKE# R2202 1 1 2 R2204 RREF SD_CMD 32 2 JCR1 +3VS_CARD 2 27 10 mils 40 mils SD_CD# 31 SD_CLK_R SP1 12 30 DV12S +3VS_CARD 6.2K_0402_1% 1 SD_CD# 3 40 mils 3V3_IN 1 11 20 mils 18 20 mils 10 20 mils 14 2 DV33_18 C2208 1 AV12_DV12_S C2209 1 C2210 1 C2207 2 +ODR_PWR 1 1U_0402_6.3V6K 2 0.1U_0402_10V6K 2 4.7U_0603_6.3V6K 2 0.1U_0402_10V6K 6 +3VS_CARD 2 U2201 1 +3VS_CARD 2 Q2201B D 5 SD_WP# G RTS5227-GR_QFN32_4X4 G DMN66D0LDW-7_SOT363-6 S 1 DMN66D0LDW-7_SOT363-6 4 S Change Symbol 0819A 4 4 Compal Secret Data Security Classification 2013/03/08 Issued Date 2015/03/08 Deciphered Date Compal Electronics, Inc. SCHEMATIC, MB AA341 Size Document Number Custom 4019P2 Sheet 22 of 42 Date: Friday, March 07, 2014 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D E Rev C 1 2 3 4 SATA HDD WTB Conn 5 APS G-Sensor 1 +3VLP P/N: SP011211150 R2301 100K_0402_5% A JHDD1 J2302 SHORT PADS 2 HDD_DEVSLP0 HDD_DETECT# ON/OFFBTN# ROT_BTN# VOL_UP# [10] HDD_DEVSLP0 [31] HDD_DETECT# [31] ROT_BTN# [31] VOL_UP# 0424A VOL_DOWN# [31] VOL_DOWN# +5VS +5VS_HDD F2301 3A_32V_0438003.WR 2 0_0603_5% @ R2322 1 2 0_0603_5% 2 0617A ACES_50473-0200M-002 ME@ J2304 @ 2 1 2MM 0326A +5VS_HDD B 1 2 14 15 1 C2302 APS_GND Vs Vs 1 C2303 2 3 5 6 7 12 10 8 COM COM COM COM NC NC NC NC NC NC 1 4 9 11 13 16 VOUTX VOUTY 1 1 R2303 R2304 2 56K_0402_5% 2 56K_0402_5% GS_VOUTX [31] GS_VOUTY [31] 1 C2304 1 C2305 1 C2306 1 C2307 2 2 2 2 0.1U_0402_10V6K ROT_BTN# VOL_UP# VOL_DOWN# 1 +3VALW 24 23 22 21 Xout Yout Zout 0.1U_0402_10V6K 2 100K_0402_5% 2 100K_0402_5% 2 100K_0402_5% R2305 GND4 GND3 GND2 GND1 ST +3VS_GS 0.1U_0402_10V6K 1 1 1 +3VS 0.1U_0402_10V6K R2306 R2307 R2308 2 U2302 2 [31] GS_SELFTEST 0.1U_0402_10V6K 1 R2302 100K_0402_5% 10U_0603_6.3V6M +3VS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 ON TOP J2303 SHORT PADS 1 ON BOTTOM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 SATA_PTX_DRX_P0_C SATA_PTX_DRX_N0_C SATA_PRX_DTX_N0_C SATA_PRX_DTX_P0_C ON/OFFBTN# [26] 2 ON/OFFBTN# 2 [31] ON/OFF D2301 RB751V-40_SOD323-2 2 1 1 2 A LIS34ALTR_LGA16_4X4 APS_GND APS_GND APS_GND Need to change symbol C2301 1000P_0402_50V7K @ 1 2 C2308 1U_0402_6.3V6K @ 1 2 B C2309 10U_0603_6.3V6M @ Place near by JHDD1 HDD SATA Redriver C2310 1 C2313 1 2 0.01U_0402_16V7K 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 1 SATA_PTX_C_DRX_N0 2 C2314 1 C2315 1 2 0.01U_0402_16V7K 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 5 SATA_PRX_C_DTX_N0 4 R2311 2 @ 1 10K_0402_5% A_PRE1_HDD B_PRE1_HDD 19 17 HDD_RTEST 18 3 13 21 1 +3VS 2 1 2 [7] SATA_PRX_DTX_P0 [7] SATA_PRX_DTX_N0 C U2301 7 HDD_REN [7] SATA_PTX_DRX_P0 [7] SATA_PTX_DRX_N0 2 C2312 R2309 10K_0402_5% C2311 @ C 1 0.01U_0402_16V7K 0.1U_0402_10V6K +3VS 1 +3VS 0624A R2321 0_0402_5% EN VDD VDD A_INp A_INn B_OUTp B_OUTn A_PRE1 B_PRE1 TEST GND GND EPAD NC NC A_PRE0 B_PRE0 A_OUTp A_OUTn B_INp B_INn 10 20 @ R2320 1 R2310 1 6 16 2 2 0_0402_5% 4.99K_0402_1% @ 9 8 A_PRE0_HDD B_PRE0_HDD 15 14 SATA_PTX_DRX_P0_R C2316 2 SATA_PTX_DRX_N0_R C2317 2 1 0.01U_0402_16V7K 1 0.01U_0402_16V7K SATA_PTX_DRX_P0_C SATA_PTX_DRX_N0_C 11 12 SATA_PRX_DTX_P0_R C2318 2 SATA_PRX_DTX_N0_R C2319 2 1 0.01U_0402_16V7K 1 0.01U_0402_16V7K SATA_PRX_DTX_P0_C SATA_PRX_DTX_N0_C 2 PI3EQX6741STZDEX_QFN20_4X4 0507A Need to change symbol 1 +3VS 1 R2315 4.7K_0402_5% @ 0326A 1 1 B_PRE1_HDD R2317 4.7K_0402_5% D 2 R2314 4.7K_0402_5% @ B_PRE0_HDD 1 R2316 4.7K_0402_5% @ 0701A 2 2 A_PRE1_HDD 1 A_PRE0_HDD R2313 4.7K_0402_5% @ 2 R2312 4.7K_0402_5% D +3VS 1 +3VS 1 +3VS R2318 4.7K_0402_5% R2319 4.7K_0402_5% 2 2 2 2 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 0628A Rev C 4019P2 Date: 1 2 3 4 Friday, March 07, 2014 Sheet 5 23 of 42 1 2 3 4 5 NGFF SATA Redriver A A B B NGFF mSATA Conn P/N:SP071212280 ME@ JNGFF1 C 1 3 5 7 9 11 [31] mSATA_DETEC# [7] SATA_PRX_DTX_P1 [7] SATA_PRX_DTX_N1 [7] SATA_PTX_DRX_N1 [7] SATA_PTX_DRX_P1 D C2405 1 C2406 1 2 0.01U_0402_16V7K 2 0.01U_0402_16V7K SATA_PRX_DTX_P1_C SATA_PRX_DTX_N1_C C2404 1 C2401 1 2 0.01U_0402_16V7K 2 0.01U_0402_16V7K SATA_PTX_DRX_N1_C SATA_PTX_DRX_P1_C 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 GND GND GND USB_D+ USB_DGND VCC VCC Full_Card_Power_Off# W_DISABLE#1 LED#1 NC NC(CONFIG_0) NC WAKE_ON_WAN# NC DRR W_DISABLE#2 GND NC NC UIM-RESET NC UIM-CLK GND UIM-DATA NC UIM-PWR NC NC GND GNSS_SCL NC GNSS_SDA NC GNSS_IRQ GND SYS_CLK(GNSS0) NC TX_BLANKING(GNSS1) NC NC GND NC NC NC NC NC GND NC ANTCTL0 Coex3 ANTCTL1 Coex2 ANTCTL2 Coex1 ANTCTL3 SIM Detect RESET# NC GND (CONFIG_1) VCC GND VCC GND VCC GND (CONFIG_2) GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 1 J2401 @ JUMP_43X79 2 1 2 MSATA_DEVSLP1 PCH_SMB_CLK PCH_SMB_DATA +3VS C MSATA_DEVSLP1 [10] PCH_SMB_CLK [27,29,30,8] PCH_SMB_DATA [27,29,30,8] D 68 69 BELLW_80149-2121 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 Friday, March 07, 2014 Sheet 5 24 of 42 5 4 3 2 1 D D Remove XDP conn. for non-vPro +1.05VS C [5] [5] [5] [5] [12] [5] [5] [15] [10,9] H_CPUPWRGD XDP_TMS XDP_TDO XDP_TDI CPU_PWR_DEBUG XDP_PREQ# XDP_PRDY# CFG3 SYS_RESET# +3VALW_PCH H_CPUPWRGD XDP_TMS XDP_TDO XDP_TDI CPU_PWR_DEBUG XDP_PREQ# XDP_PRDY# CFG3 SYS_RESET# XDP_TCK XDP_TRST# PCH_JTAG_TDO PCH_JTAG_TDI PCH_JTAG_TMS PCH_JTAG_TCK PLT_RST_BUF# SYS_PWROK EC_RSMRST# XDP_TCK [5] XDP_TRST# [5] PCH_JTAG_TDO [7] PCH_JTAG_TDI [7] PCH_JTAG_TMS [7] PCH_JTAG_TCK [7] PLT_RST_BUF# [21,22,27,30,31,8,9] SYS_PWROK [31,9] EC_RSMRST# [31,9] C 0815A B B A A Compal Secret Data Security Classification Issued Date 2013/03/08 Deciphered Date 2015/03/08 Compal Electronics, Inc. SCHEMATIC, MB AA341 Size Document Number C 4019P2 Date: Sheet Friday, March 07, 2014 25 42 of Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 1 Rev C 1 2 3 4 5 Docking (USB3.0) USB3_TX3_N_C D2603 1 1 USB3_TX3_P_C USB3_RX3_N USB3_RX3_P D2601 USB20_P2 1 I/O1 I/O3 GND VDD 4 2 3 I/O2 I/O4 D2602 1 1 109 DP_AUX_P DP_AUX_N 2 2 98 DP_AUX_N HPD 4 4 77 HPD ON/OFFBTN# 5 5 66 ON/OFFBTN# 3 3 109 USB3_TX3_N_C 2 2 98 USB3_TX3_P_C 4 4 77 USB3_RX3_N 5 5 66 USB3_RX3_P 8 +5VALW A DP_AUX_P 5 6 YSCLAMP0524P_SLP2510P8-10-9 EMI@ A 3 3 USB20_N2 8 AZC099-04S.R7G_SOT23-6 EMI@ YSCLAMP0524P_SLP2510P8-10-9 EMI@ PN: SC300001G00 CPU_DP1_DP_C_P0 D2604 1 1 109 CPU_DP1_DP_C_P0 CPU_DP1_DP_C_N0 2 2 98 CPU_DP1_DP_C_N0 CPU_DP1_DP_C_P1 4 4 77 CPU_DP1_DP_C_P1 CPU_DP1_DP_C_N1 5 5 66 CPU_DP1_DP_C_N1 3 3 8 YSCLAMP0524P_SLP2510P8-10-9 EMI@ Docking (Display Port) B B P/N: DC021212121 0610A LANE0 [5] CPU_DP1_P0 [5] CPU_DP1_N0 LANE1 [5] CPU_DP1_P1 [5] CPU_DP1_N1 1 1 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K CPU_DP1_DP_C_P0 CPU_DP1_DP_C_N0 C2516 C2511 1 1 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K CPU_DP1_DP_C_P1 CPU_DP1_DP_C_N1 1 3 5 7 9 11 13 15 17 19 21 23 DP_AUX_P DP_AUX_N PA_CFG1_LSEO0 +3VS [35] DOCK_CONSUMP 1 HPD R2512 100K_0402_5% 25 27 29 1 1 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K DP_AUX_N DP_AUX_P GND POWER BUTTON ML_LANE0(P) RETURN ML_LANE0(N) VBUS(500mA) GND USB2.0(P) ML_LANE1(P) USB2.0(N) ML_LANE1(N) GND GND USB3.0_RX(P) AUX_CH(P) USB3.0_RX(N) AUX_CH(N) GND CONFIG1 USB3.0_TX(P) CONFIG2 USB3.0_TX(N) HOT PLUG DETECT GND GROUND DETECT GROUND POWER1 POWER2 GROUND 2 4 6 8 10 12 14 16 18 20 22 24 DOCK_PRSNT#_R +5VALW_DOCK 1 ON/OFFBTN# [23] DOCK_PRSNT# [10] 1 2 @ USB20_P2 [11] USB20_N2 [11] 2 F2601 1.1A_6V_SMD1812P110TF USB3_RX3_P [11] USB3_RX3_N [11] USB3_TX3_P_C USB3_TX3_N_C C2601 C2602 1 1 2 2 0.1U_0402_10V6K 0.1U_0402_10V6K USB3_TX3_P [11] USB3_TX3_N [11] Adap+ 26 28 30 C 1 C2520 C2521 2 [33] ADP_ID_DOK [9] DDI1_AUXN [9] DDI1_AUXP C +5VALW R2601 0_0402_5% JDOCK1 C2512 C2514 DRAPH_PJSS0296-MB11H ME@ R2517 100K_0402_5% 2 Footprint: DRAPH_PJSS0296-MB11H_24P-T 2 +5VS G 1 D 2 1M_0402_5% PA_CFG1_LSEO0 R2603 1 2 1M_0402_5% DOCK_CONSUMP @ R2524 100K_0402_5% 0502A 2 Q2501 2N7002K_SOT23-3 R2602 1 HPD 1 3 S [9] DDI1_DP_HPD D D Compal Secret Data Security Classification Issued Date 2013/03/08 Deciphered Date 2015/03/08 Compal Electronics, Inc. SCHEMATIC, MB AA341 Size Document Number C 4019P2 Date: Sheet Friday, March 07, 2014 26 42 of Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 3 4 5 Rev C 1 2 3 4 5 USB30 Conn +USB_VCCA P/N: SM070001S00 x 2 USB20_N1 3 USB20_P1 2 3 4 2 1 4 USB20_N1_C_R 1 USB20_P1_C_R + 2 A [11] USB20_P1 ESD D2701 1 USB20_P1_C_R EMI@ I/O1 2 3 GND 5 VDD I/O2 6 I/O4 3 [11] USB3_RX2_N +USB_VCCA 2 [11] USB3_RX2_P USB20_N1_C_R [11] USB3_TX2_N AZC099-04S.R7G_SOT23-6 P/N: SM070000K00 [11] USB3_TX2_P 3 4 2 1 C2703 0.1U_0402_16V7K 1 2 USB3TXDN2 3 1 2 2 USB3TXDP2 4 USB3_RX2_RC_N 1 USB3_RX2_RC_P 4 2 1 C2704 0.1U_0402_16V7K +5VALW 1 2 3 4 5 6 7 8 9 USB3_TX2_RC_P 98 USB3_TX2_RC_N USB3_RX2_RC_P 4 4 77 USB3_RX2_RC_P USB3_RX2_RC_N 5 5 66 USB3_RX2_RC_N USB3_TX2_RC_N 1 USB3_TX2_RC_P GND GND GND GND 10 11 12 13 ACES_M020068HR009M225ZL ME@ EMI P/N:SP011302071 U2701 1 2 3 4 [31] USB_ON# Low Active 2 8 YSCLAMP0524P_SLP2510P8-10-9 P/N: SC300001G00 8 7 6 5 G547I2P81U_MSOP8 C2705 0.1U_0402_10V6K 3 3 GND VOUT VIN VOUT VIN VOUT EN FLG PIN13 PIN12 USB_OC0# 1 EMI@ 109 2 2 4 VBUS DD+ GND StdA-SSRXStdA-SSRX+ GND-DRAIN StdA-SSTXStdA-SSTX+ +USB_VCCA 2 D2702 1 1 USB3_TX2_RC_N 1 USB3_TX2_RC_P B A L2703 EMI@ WCM-2012HS-900T 3 C2702 1000P_0402_50V7K EMI@ EMI JUSB1 L2701 EMI@ WCM-2012HS-900T 4 I/O3 1 1 2 [11] USB20_N1 150U_B2_6.3VM_R35M C2701 L2702 EMI@ WCM-2012-900T_4P USB_OC0# [10,11,28] PIN5 C2706 1000P_0402_50V7K @ B PIN4 PIN1 PIN9 PIN10 PIN11 Mini-Express Card for WLAN +3VS WLBT_OFF_5# WLAN_CLKREQ# [8] CLK_PCIE_WLAN# [8] CLK_PCIE_WLAN [11] PCIE_PRX_DTX_N3 [11] PCIE_PRX_DTX_P3 [11] PCIE_PTX_C_DRX_N3 [11] PCIE_PTX_C_DRX_P3 +3VS_AOAC 0425A [8] [8] [30,31] [30,31] CL_CLK CL_DAT EC_TX_P80_DATA EC_RX_P80_CLK R2706 R2707 R2701 R2702 1 1 1 1 2 2 2 2 0_0402_5% 0_0402_5% 100_0402_1% 100_0402_1% CL_CLK_R CL_DAT_R CL_RST#_R 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 [10,9] WLBT_OFF_51# 2 1K_0402_5% R2708 1 2 0_0402_5% GND1 GND2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 1 Q2701 AOAC@ AP2301GN-HF_SOT23-3 3 1 2 RF_OFF# PLT_RST_BUF# PCH_SMB_CLK PCH_SMB_DATA RF_OFF# [31] PLT_RST_BUF# [21,22,30,31,8,9] [31] AOAC_PWREN# AOAC@ 2 AOAC_PWREN# 1 150K_0402_5% 2 2 C2710 AOAC@ 0.01U_0402_16V7K USB20_N3 [11] USB20_P3 [11] +3VALW_PCH R2709 10K_0402_5% @ 54 0807A AOAC_PWREN# D [9] SLP_WLAN# R2704 100K_0402_5% 0425A C2709 AOAC@ 0.1U_0402_10V6K 1 PCH_SMB_CLK [24,29,30,8] PCH_SMB_DATA [24,29,30,8] BELLW_80052-2021 ME@ SLP_WLAN# 2 G S Q2702 2N7002K_SOT23-3 @ 2 D C 1 1 R2705 1 [8] CL_RST# 1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 JUMP_43X79 2 53 R2703 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 2 2 WLAN_WAKE# 2 1 For AOAC assessment 1 [10,9] WLBT_OFF_5# [10,8] WLAN_CLKREQ# +3VS_AOAC @ J2703 1 C2707 D 3 [31] WLAN_WAKE# C +3VS_AOAC 1 JMINI1 +1.5VS 10U_0603_6.3V6M J2701 JUMP_43X79 @ Need check WLAN/BT module OFF pin +3VS_AOAC +3VALW Mini-Express Card(WLAN/BT) PN:SP011010130 2 WLAN Mini Card For EC to detect debug card insert. Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 Sheet Friday, March 07, 2014 5 27 of 42 3 4 5 PN: SM070001S00 x 2 +5V_CHGUSB 2 USB3TXDN1 3 2 1 1 USB3_TX1_P_CONN 4 USB3_TX1_N_CONN 1 + 0620B +5VALW 0502A +5V_CHGUSB 1 +5VALW C2801 0.1U_0402_16V4Z 2 1 13 [10,11,27] USB_OC0# 2 3 [11] USB20_N0 [11] USB20_P0 4 5 [31] AOU_EN [31] AOU_CTL1 6 7 8 AOU_CTL2 [31] AOU_CTL3 @ IN OUT FAULT# STATUS# DM_OUT DP_OUT DM_IN DP_IN ILIM_SEL ILIM_LO EN ILIM_HI CTL1 CTL2 CTL3 GND GPAD R2815 10K_0402_5% 12 9 AOU_STATUS# [31] 11 10 15 16 USB3RXDP1 2 USB3RXDN1 3 USB20_N0_C USB20_P0_C R2801 R2802 1 1 R2814 1 4 1 USB3_RX1_P_CONN 4 USB3_RX1_N_CONN 2 A 1 2 3 4 5 6 7 8 9 USB20_N0_C_R USB20_P0_C_R USB20_P0_C 3 2 1 3 4 1 USB20_N0_C_R 4 USB20_P0_C_R EMI@ JUSB2 USB3_RX1_N_CONN USB3_RX1_P_CONN USB20_N0_C USB3_TX1_N_CONN USB3_TX1_P_CONN VBUS DD+ GND StdA-SSRXStdA-SSRX+ GND-DRAIN StdA-SSTXStdA-SSTX+ GND GND GND GND 10 11 12 13 ACES_M020068HR009M225ZL ME@ WCM-2012-900T_4P EMI@ PN: SM070000K00 x 1 2 0_0402_5% @ 1 3 L2803 0624A Need to change symbol AOU_CTL1 2 2 2.2M _0402_1% 2 20K_0402_1% 14 17 +5VALW 1 2 WCM-2012HS-900T EMI@ TPS2546RTER_QFN16_3X3 R2813 4 L2802 U2801 1 2 A 3 WCM-2012HS-900T EMI@ C2803 1000P_0402_50V7K L2801 USB3TXDP1 150U_B2_6.3VM_R35M C2802 USB 3.0 Charger & Conn. 1 2 2 1 2 0_0402_5% AOU_CTL2 USB3_TX1_P_CONN D2802 1 1 USB3_TX1_N_CONN USB3_RX1_P_CONN USB3_RX1_N_CONN D2801 1 0507A I/O1 I/O3 GND VDD 4 USB20_P0_C_R +5V_CHGUSB 2 3 I/O2 B I/O4 5 P/N:SP011302071 109 USB3_TX1_P_CONN 2 2 98 USB3_TX1_N_CONN 4 4 77 USB3_RX1_P_CONN 5 5 66 USB3_RX1_N_CONN PIN11 PIN10 6 3 3 USB20_N0_C_R PIN9 B 8 AZC099-04S.R7G_SOT23-6 EMI@ PIN1 YSCLAMP0524P_SLP2510P8-10-9 EMI@ PN: SC300001G00 PN:SC300001Y00 PIN4 SA00005OR20 6/25 PIN5 +3VS PIN12 PIN13 U2802 VDD VDD 4 3 2 6 B_EQ1 B_DE0 B_EQ0 B_DE1 CPU RX [11] USB3_RX1_P [11] USB3_RX1_N USB3TXDP1 USB3TXDN1 CONN TX C2806 1 C2807 1 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K USB3_RX1_P_C USB3_RX1_N_C 12 11 C2808 1 C2810 1 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K USB3TXDP1_C USB3TXDN1_C 22 23 C 10 21 25 B_EQ1/I2C_ADDR1 B_DE0/I2C_ADDR0 B_EQ0/NC B_DE1/NC A_EQ1/SDA_CTL A_DE0/SCL_CTL A_EQ0/NC A_DE1/NC A_OUTp A_OUTn A_INp A_INn B_OUTp B_OUTn B_INp B_INn PD# REXT TEST I2C_EN GND GND GPAD 1 13 1 C2804 1 C2805 15 16 17 18 A_EQ1 A_DE0 A_EQ0 A_DE1 19 20 USB3RXDP1 USB3RXDN1 9 8 USB3_TX1_P_C USB3_TX1_N_C 5 7 14 24 2 R2803 2 R2804 @ 2 0.01U_0402_16V7K 2 0.1U_0402_16V7K reserved CONN RX 1 C2809 1 C2811 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 1 4.99K_0402_1%~D 1 4.99K_0402_1%~D USB3_TX1_P [11] USB3_TX1_N [11] program loss up program loss up program loss up CPU TX +3VS EQ to EQ to EQ to for channel 7dB for channel 14.5dB for channel 11.5dB A_EQ1/B_EQ1 A_EQ0/B_EQ0 (Internal pull Low) (Internal pull Low) Low Low Low High High Low High High A_DE1/B_DE1 A_DE0/B_DE0 (Internal pull Low) (Internal pull Low) 3.5dB de-emphasis Low Low No de-emphasis Low High 2.7dB de-emphasis High Low 5dB with boost output swing High High C 4.99K_0402_1%~D @ A_DE1 +3VS B_DE0 TEST (Internal pull Low) 2 R2812 4.99K_0402_1%~D @ R2811 4.99K_0402_1%~D @ B_DE1 1 R2810 4.99K_0402_1%~D @ R2809 1 A_DE0 +3VS 2 2 R2808 4.99K_0402_1%~D @ 1 B_EQ1 +3VS 1 B_EQ0 1 A_EQ1 R2807 4.99K_0402_1%~D @ +3VS 2 2 2 +3VS R2806 4.99K_0402_1%~D @ 1 A_EQ0 1 R2805 4.99K_0402_1%~D @ +3VS 1 +3VS 2 +3VS 2 PS8713BTQFN24GTR2_TQFN24_4X4 Normal operation (default) Low Test mode enable High D D PN:SA000059H00 Compal Secret Data Security Classification Issued Date 2013/03/08 Deciphered Date 2015/03/08 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 1 2 3 4 Compal Electronics, Inc. SCHEMATIC, MB AA341 Document Number 4019P2 Sheet Friday, March 07, 2014 28 42 of 5 Rev C 1 2 3 4 5 Track Point Int KB Conn Click PAD P/N:SP011302012 KSI[0..7] [31] KSI[0..7] +5VS_TPCP +5VS_TPCP Vcc 3V for LEDs KB LED1 - Fn KB LED2 - F1 KB LED3 - F4 Fn (S9) D17 (GND) [31] [31] [31] [31] 2 2 2 R2901 R2904 R2905 KB_LED1 KB_LED2 KB_LED3 KSI8 1 100_0402_1% 1 649_0402_1% 1 649_0402_1% KB_LED1_FN KB_LED2_F1 KB_LED3_F4 KSI8 0826A C2902 0.1U_0402_10V6K Pin1 2 1 2 3 4 5 6 7 8 9 10 11 12 TP_DATA2 TP_RESET TP_CLK2 KB_LED_PWM [31] KB_LED_PWM 1 2 3 4 5 6 7 8 9 10 11 GND1 12 GND2 GND1 GND2 33 34 R2910 2 1 10K_0402_5% TP_RESET PIN13 Conn. 2 3 2 REMOTE1- 3 REMOTE2+ 4 REMOTE2- 5 SMCLK DP1 SMDATA DN1 ALERT# DP2/DN3 THERM# DN2/DP3 GND 10 2 4.7K_0402_5% TP_CLK2 1 2 4.7K_0402_5% TP_DATA2 R2909 1 2 10K_0402_5% CP_RESET# B TP_CLK TP_DATA C2905 C2906 C2913 Cable D2902 PJDLC05_SOT23-3 @EMI@ 1 @ 1 @ 1 @ 2 100P_0402_50V8J CP_RESET# 2 100P_0402_50V8J TP_RESET 2 100P_0402_50V8J BYPASS 1 1 PN: SCA00000U11 1 9 8 7 EC_SMB_CK2 EC_SMB_DA2 0624A EC_SMB_DA2 [31,8] R2912 0_0402_5% 1 2 @ MAINPWON [31,36] R2914 1 +VCC_LID +3VLP 6 2 100K_0402_5% VDD U2903 1 OUTPUT C 2 B CPU CORE BOTTOM Q2901 MMST3904-7-F_SOT323-3 REMOTE1,2 (+/-) : Trace width/space:10/10 mil Trace length:<8" 3 2 TAB_SW# TAB_SW# [31] 2 GND C2911 0.1U_0402_16V4Z 1 1 YB8251ST23_SOT23-3 1 Click PAD pin define NO Signal 1 2 3 4 5 6 7 8 9 10 11 12 IPD DATA IPD RST NC NC NC IPD CLK GND VCC5 BKLITE DEC LED VCC5 LED PWM LED GND C GND SMB CLK NC DATA-TP CLK-TP SMB-DATA VDD RESET CLK DATA TP4RST BYPASS C2912 10P_0402_50V8J Need to change symbol E 3 2 1 REMOTE1+ @ C2907 2200P_0402_25V7K 1 2 3 4 5 6 7 8 9 10 11 12 EC_SMB_CK2 [31,8] 2 REMOTE1+ VDD REMOTE1+ 2 1 R2908 Track Point pin define NO Signal Address 1001_101xb 2nd source SA000029210-->EMC1403-2-AIZL-TR C2908 2200P_0402_25V7K 2 HB_A511210-SCHR22 ME@ @ C2904 100P_0402_50V8J R2907 Pin 1 R2911 10K_0402_5% @ F75303M_MSOP10 REMOTE1- D REMOTE1REMOTE2+ 1 REMOTE2- @ C2910 2200P_0402_25V7K REMOTE2- 2 B C WLAN TOP Issued Date E Compal Electronics, Inc. Compal Secret Data Security Classification Q2902 MMST3904-7-F_SOT323-3 3 2 1 REMOTE2+ 1 C2909 2200P_0402_25V7K 2 D 2 ESD Pin 12 +3VS 2 1 1 1 Tablet Switch Fintek thermal sensor placed near by TOP DDR3 Close U2407 1 @ PIN14 PN: SCA00000U10 U2901 2 CP_RESET# TP_CLK TP_DATA TP_RESET BYPASS 12 11 10 9 8 7 6 5 4 3 2 1 0620A Pin 1 THRM Sensor 1 PIN12 TP_DATA2 ESD Cable +3VS 1 @ @ C2903 100P_0402_50V8J PIN1 D2901 PJDLC05_SOT23-3 @EMI@ C TP_DATA2 TP_CLK2 2 0_0402_5% CP_RESET# TP_CLK TP_DATA TP_RESET BYPASS 13 14 +5VS Pin34 Pin 32 R2903 [24,27,30,8] PCH_SMB_DATA [31] [31] [31] [31] [31] 12 11 10 9 8 7 6 5 4 3 2 1 2 0_0402_5% @ +5VS TP_CLK2 Conn. 1 A GND2 GND1 JAE_FL10F012HA1 ME@ Pin32 Pin33 R2902 [24,27,30,8] PCH_SMB_CLK JTP1 JAE_FL10F032HA2 ME@ B JCP1 14 13 0610A 1 2 0502A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 3 +VDDIO_NFC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15 +5VS F2902 1A_32V_0438001.WR 2 1 JKB1 A C2901 0.1U_0402_10V6K P/N:DC021201090 P/N:SP011302013 KSO[0..15] [31] KSO[0..15] 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 Friday, March 07, 2014 Sheet 5 29 of 42 2 3 [10] P_SENSE2 1 2 3 4 5 6 G1 G2 E-T_4260K-Q04N-03L ME@ 1 F3002 1A_32V_0438001.WR [10,8] BNFC_IRQ# JNFC1 [24,27,29,8] PCH_SMB_DATA [24,27,29,8] PCH_SMB_CLK D 2 BNFC_IRQ BNFC_IRQ BNFC_PRSNT# BNFC_ON G S Q3001 2N7002K_SOT23-3 1 2 3 4 5 6 7 8 9 10 11 PCH_SMB_DATA PCH_SMB_CLK [10] BNFC_PRSNT# [10] BNFC_ON 1 JPROX1 1 2 3 4 P_SENSE2 +VDDIO_NFC R3002 100K_0402_5% 12 13 2 +VDDIO_NFC A +3VS Module Pin define 1.IP/VBAT 2.IP/VDDIO 3.IO/I2C-SDA 4.I/I2C-SCL 5.G/GND 6.O/IRQ-NFC 7.O/NFC_Presence# 8.I/REG_UP 9.OP/VDD_Ext_SE 10.IP/UIM_PWR 11.IO/SWP 2 NFC 5 P/N:SP011212051 1 P-Sensor Conn 4 3 1 1 2 3 4 5 6 7 8 9 10 11 A GND1 GND2 ACES_50506-01101-001 ME@ 0507A Conn FAN Conn +3VS +5VS_TPCP B 1 B R3001 10K_0402_5% 2 P/N:DC011201162 +5VS_TPCP W=40mils JFAN1 1 2 3 4 5 6 7 [31] EC_FAN_ID [31] EC_TACH [31] EC_FAN_PWM 1 2 1 C3001 1000P_0402_50V7K @ C3002 1U_0402_6.3V6K 2@ 1 2 3 4 5 GND1 GND2 PIN7 ACES_50281-00501-001 ME@ PIN1 PIN5 PIN6 C C TPM Debug Conn C-logo Conn +3VS 4 11 18 D 5 8 12 13 14 VPS VPS NC VNC GND GND GND NC VNC NC NC NC LPCPD# SERIRQ LAD0 LAD1 LFRAME# LAD2 LAD3 NC LCLK NC NC LRESET# 24 10 28 27 26 23 22 20 17 25 21 19 15 16 LPC_PD# SERIRQ LPC_AD0 LPC_AD1 LPC_FRAME# LPC_AD2 LPC_AD3 +3VALW 1 +3VS +3VS JDB1 1 2 3 4 5 6 7 8 9 10 11 12 1 R3004 0_0402_5% @ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 PLT_RST_BUF# SERIRQ [10,31] LPC_AD0 [31,8] LPC_AD1 [31,8] LPC_FRAME# [31,8] LPC_AD2 [31,8] LPC_AD3 [31,8] [8] CLK_PCI_DB [27,31] EC_TX_P80_DATA [27,31] EC_RX_P80_CLK 1 2 3 4 5 6 7 8 9 10 11 12 ME@ R3003 750_0402_1% 2 NC NC NC PP 2 2 2 6 9 TPM@ +3VALW 1 C3004 TPM@ 10U_0603_6.3V6M 1 2 3 7 U3001 TPM@ 0.1U_0402_10V6K 1 PN:SP02000EZ10 C3003 JCLOGO1 C _LED_3.3VALW [18,31] LOGO_LED# 1 2 3 4 GND GND 13 14 1 2 G1 G2 ACES_50278-00201-001 ME@ ACES_85201-1205N CLK_PCI_TPM PLT_RST_BUF# D CLK_PCI_TPM [8] PLT_RST_BUF# [21,22,27,31,8,9] ST33ZP24AR28PVSP_TSSOP28 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 Friday, March 07, 2014 Sheet 5 30 of 42 2 3 4 EC KB9012 +3VALW_EC 0604A 1 KSO[0..15] [29] KSO[0..15] KSI[0..8] [29] KSI[0..8] +3VS R3105 1 2 100K_0402_5% mSATA_DETEC# R3106 1 2 10K_0402_5% EC_MUTE# R3107 1 @ 2 10K_0402_5% Turbo_V R3109 1 @ 2 10K_0402_5% NTC_V R3110 1 2 100K_0402_5% HDD_DETECT# R3111 1 2 100K_0402_5% LID_SW# R3113 1 2 10K_0402_5% BATT_TEMP R3114 1 2 10K_0402_5% KSI8 @ [23] ROT_BTN# [21] LAPTOP# [34,35] [34,35] [29,8] [29,8] +3VALW_EC RP3101 5 6 7 8 C 4 3 2 1 [9] [9] [7] [29] [29] [12] [27] [29] [30] EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 2.2K_0804_8P4R_5% R3116 1 R3118 1 R3120 1 @ 2 10K_0402_5% EC_SMI# 2 10K_0402_5% EC_FAN_PWM 2 10K_0402_5% 12 13 37 20 38 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 PM_SLP_S3# PM_SLP_S5# EC_SMI# KB_LED3 TP_RESET VCCST_PG_EC RF_OFF# KB_LED_PWM EC_TACH [29] TAB_SW# [27,30] [27,30] [9] [30] [23] EC_TACH [10,9] SUSPWRDNACK [9] AC_PRESENT_R R3123 1 EC_TX_P80_DATA EC_RX_P80_CLK PCH_PWROK EC_FAN_PWM GS_SELFTEST 2 0_0402_5% 0620B KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 ROT_BTN# LAPTOP# 55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 77 78 79 80 PM_SLP_S3# PM_SLP_S5# EC_SMI# KB_LED3 TP_RESET VCCST_PG_EC RF_OFF# KB_LED_PWM EC_TACH TAB_SW# EC_TX_P80_DATA EC_RX_P80_CLK PCH_PWROK EC_FAN_PWM GS_SELFTEST 6 14 15 16 17 18 19 25 28 29 30 31 32 34 36 SUSPWRDNACK AC_PRESENT 122 123 R3126 1 1 2 10K_0402_5% 2 100K_0402_5% A +3VALW_EC 1 67 9 22 33 96 111 125 GATEA20/GPIO00 KBRST#/GPIO01 SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC & MISC LPC_AD0 AD Input CLK_PCI_EC PCIRST#/GPIO05 EC_RST# EC_SCII#/GPIO0E GPIO1D EC_SMB_CK1/GPIO44 EC_SMB_DA1/GPIO45 SM EC_SMB_CK2/GPIO46 EC_SMB_DA2/GPIO47 1 GPIO0F BEEP#/GPIO10 GPIO12 ACOFF/GPIO13 BATT_TEMP/GPIO38 GPIO39 ADP_I/GPIO3A GPIO3B GPIO42 IMON/GPIO43 DAC_BRIG/GPIO3C EN_DFAN1/GPIO3D IREF/GPIO3E CHGVADJ/GPIO3F DA Output KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 Int. K/B KSO6/GPIO26 Matrix KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49 BRDID PWM Output EC_MUTE#/GPIO4A USB_EN#/GPIO4B CAP_INT#/GPIO4C EAPD/GPIO4D TP_CLK/GPIO4E TP_DATA/GPIO4F PS2 Interface CPU1.5V_S3_GATE/GPXIOA00 WOL_EN/GPXIOA01 HDA_SDO/GPXIOA02 VCIN0_PH/GPXIOD00 21 23 26 27 LOGO_LED# BEEP# WLAN_WAKE# ACOFF 63 64 65 66 75 76 BATT_TEMP GS_VOUTX ADP_I GS_VOUTY BRDID CP_RESET# 68 70 71 72 AOU_CTL1 EC_FAN_ID AOU_CTL3 AOAC_PWREN# 83 84 85 86 87 88 EC_MUTE# USB_ON# VOL_DOWN# HOME_BTN# TP_CLK TP_DATA 97 98 99 109 PTC_PROTECT VOL_UP# ME_FLASH NTC_V 119 120 126 128 mSATA_DETEC# PM_SLP_A# BYPASS KB_LED2 SPI Flash ROM SPIDI/GPIO5B SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A 73 74 89 90 91 92 93 95 121 127 ENBKL ADP_ID KSI8 AOU_EN AOU_STATUS# PCH_APWROK VCCST_PG_PWR SYSON SYS_PWROK PM_SLP_S4# 100 101 102 103 104 105 106 107 108 EC_RSMRST# EC_WAKE# Turbo_V H_PROCHOT#_EC MAINPWON BKOFF# PBTN_OUT# EN_5V ADP_90W 110 112 114 115 116 117 118 ACIN EN_3V ON/OFF LID_SW# SUSP# KB_LED1 EC_PECI 124 +V18R R3103 20K_0402_1% LOGO_LED# [18,30] BEEP# [20] WLAN_WAKE# [27] ACOFF [35] 0819A BATT_TEMP [34] GS_VOUTX [23] ADP_I [34,35] GS_VOUTY [23] CP_RESET# [29] AOU_CTL1 [28] EC_FAN_ID [30] AOU_CTL3 [28] AOAC_PWREN# [27] EC_MUTE# [20] USB_ON# [27] VOL_DOWN# [23] HOME_BTN# [18] TP_CLK [29] TP_DATA [29] 03/04 B 03/04 PTC_PROTECT [34] VOL_UP# [23] ME_FLASH [7] NTC_V [34] SPI Device Interface +3VALW_EC mSATA_DETEC# [24] PM_SLP_A# [32,38,9] BYPASS [29] KB_LED2 [29] R3108 100K_0402_5% ADP_65W GPIO Bus PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C GPIO0D EC_INVT_PWM/GPIO11 FAN_SPEED1/GPIO14 EC_PME#/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 PCH_PWROK/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A GPIO ENBKL/GPIO40 PECI_KB930/GPIO41 FSTCHG/GPIO50 BATT_CHG_LED#/GPIO52 CAPS_LED#/GPIO53 PWR_LED#/GPIO54 BATT_LOW_LED#/GPIO55 SYSON/GPIO56 VR_ON/GPIO57 PM_SLP_S4#/GPIO59 EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04 PROCHOT_IN/GPXIOA05 H_PROCHOT#_EC/GPXIOA06 VCOUT0_PH/GPXIOA07 GPO BKOFF#/GPXIOA08 PBTN_OUT#/GPXIOA09 PCH_APWROK/GPXIOA10 SA_PGOOD/GPXIOA11 AC_IN/GPXIOD01 EC_ON/GPXIOD02 ON/OFF/GPXIOD03 GPI LID_SW#/GPXIOD04 SUSP#/GPXIOD05 GPXIOD06 PECI_KB9012/GPXIOD07 XCLKI/GPIO5D XCLKO/GPIO5E KB9012QF A4 LQFP 128P_14X14 11 24 35 94 113 R3125 0x0B 0x1C 0x26 0x30 2 U3101 EC_VDD/AVCC CK_LPC_KBC PLT_RST_BUF# EC_RST# EC_SCI# ADP_65W EC AD 0x00 0x0C 0x1D 0x27 - R3102 100K_0402_1% EC_VDD/VCC EC_VDD/VCC EC_VDD/VCC EC_VDD/VCC EC_VDD0 EC_VDD/VCC 1 2 3 4 5 7 8 10 C3107 0.1U_0402_16V4Z 0.347V 0.423V 0.541V VAD_BID max 0.300V 0.360V 0.438V 0.559V 1 B If +3VS leakage on S3 mode Please check EC_MUTE# HDD_DETECT# KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 1 ECAGND C3109 0.1U_0402_10V6K 2 +3VALW_EC 2 GND/GND GND/GND GND/GND GND/GND GND0 1 [10] EC_SCI# [34,35] ADP_65W 2 2 C3101 1000P_0402_50V7K @ V AD_BID typ 0.000V 0.354V 0.430V 0.550V 2 [8] CK_LPC_KBC [21,22,27,30,8,9] PLT_RST_BUF# 1 C3108 @ AGND/AGND R3104 330K_0402_5% 1 2 2 1 C3106 @ V18R ENBKL [9] ADP_ID [33] R3112 @ 100K_0402_5% AOU_EN [28] AOU_STATUS# [28] PCH_APWROK [9] VCCST_PG_PWR [38] SYSON [37] SYS_PWROK [9] PM_SLP_S4# [9] 0620B +5VALW EC_RSMRST# [9] EC_WAKE# [10] Turbo_V [34,35] H_PROCHOT#_EC [34] MAINPWON [29,36] BKOFF# [18] PBTN_OUT# [9] EN_5V [36] ADP_90W [34,35] USB_ON# 1 2 10K_0402_5% C +5VS ACIN [33,35] EN_3V [36] ON/OFF [23] LID_SW# [18] SUSP# [32,37,38] KB_LED1 [29] 1 2 R3122 43_0402_1% 1 R3115 H_PECI [5] TP_CLK R3117 1 2 4.7K_0402_5% TP_DATA R3119 1 2 4.7K_0402_5% ADP_90W R3121 1 BATT_TEMP C3110 @ 1 2 100P_0402_50V8J ACIN C3112 @ 1 2 100P_0402_50V8J 2 100K_0402_5% @ C3114 4.7U_0805_10V4Z 2 69 +3VALW_EC HDD_DETECT# KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 2 1 C3105 1000P_0402_50V7K [23] [10] [10,30] [30,8] [30,8] [30,8] [30,8] [30,8] 2 1 C3104 1000P_0402_50V7K 2 1 C3103 0.1U_0402_16V4Z 1 C3102 0.1U_0402_16V4Z 6. GPIO4B 7. GPIO4E 8. GPIO4F 9. GPIO50 10.GPIO5B 0.1U_0402_16V4Z GPIO44 GPIO45 GPIO46 GPIO47 GPIO4A 0.1U_0402_16V4Z A 1. 2. 3. 4. 5. VAD_BID min 1 GPIO W/O internal-PH: +EC_AVCC L3101 0_0603_5% 1 2 @ 2 R3101 0_0603_5% 1 2 @ 3.3V +/- 5% Vcc R3102 100K +/- 1% Board ID R3103 0K +/- 5% SDV 12K +/- 1% FVT 15K +/- 1% SIT 20K +/- 1% SVT 2 +3VLP KB9012 A4 v.22 5 2 1 0610A PCH_PWROK ECAGND ECAGND [10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29,30,32,33,34,35,36,37,38,39,4,40,5,7,8,9] PROCHOT ENBKL VR_HOT# R3127 0_0402_5% 1 2 @ H_PROCHOT# [33,34,35,5] 1 [39] VR_HOT# D 0604A H_PROCHOT#_EC 2 Q3101 2N7002K_SOT23-3 G S D 3 D SN111005800 by ME drawing PWR_RESET [36] PWR_RESET 2 SW3101 4 SKRBAAE010_4P 1 3 Compal Secret Data Security Classification Issued Date GND 2013/03/08 Deciphered Date 2015/03/08 Compal Electronics, Inc. SCHEMATIC, MB AA341 Size Document Number Custom 4019P2 Sheet 31 of 42 Friday, March 07, 2014 Date: Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 3 4 5 Rev C 1 2 3 4 5 DC/DC I/F +5VALW TO +5VS +3VALW TO +3VS PJ703 Short => NOSBA PJ703 Open => SBA +5VS_LOAD Rds(on) VGS=4.5V,ID=8.5A,7mOhm(Max) +5VS Check RC value. +1.05VM +1.05VS J3202 @ 2 2 J3203 @ GPAD R3205 100K_0402_5% @ 15 1 +3VSLOAD 5 1 1 J3201 @ 1 2 2 2 1 C3214 @ 2 @ 2 R3207 10K_0402_5% SBA@ 1 C3216 @ 2 10U_0603_6.3V6M 2 C3213 10U_0603_6.3V6M 1 1U_0603_10V6K 2 1 C3212 @ 10U_0603_6.3V6M 1U_0603_10V6K B C3211 10U_0603_6.3V6M 1 C3215 JUMP_43X79 1 2 R3206 2 SBA@ 1 0_0402_5% Q3202A DMN66D0LDW-7_SOT363-6 SBA@ 2 1 C3206 C3207 C3210 0.1U_0402_10V6K SBA@ +3VS SUSP# +5VALW Q3205 MDS1521URH_SO8 SBA@ 1 2 SUSP L TPS22966DPUR_SON14_2X3 +3VALW 2 R3204 100K_0402_5% SBA@ 1 2 3 6 C3208 1 @ 2 1U_0402_6.3V6K 9 8 R3202 100K_0402_5% SBA@ 1 1 11 10 A Change to SB00000TO00 6/25 2 1 C3205 1 @ 2 1U_0402_6.3V6K 12 8 7 6 5 2 VOUT2 VOUT2 +5VALW 3 CT2 VIN2 VIN2 +5VALW 4 ON2 VL 2 6 7 GND 0502A Q3202B DMN66D0LDW-7_SOT363-6 SBA@ Change Symbol 0819A 2 1 2 5 0.01U_0402_16V7K 0.01U_0402_16V7K 1 3VS_GATE C3209 CT1 VBIAS 2 SBA@ 1U_0402_6.3V6K C3201 VOUT1 VOUT1 ON1 4 R3203 470K_0402_5% 1 2 2 VIN1 VIN1 3 5VS_GATE 2 2 SBA@ 10U_0603_6.3V6M R3201 200K_0402_5% 1 2 W=10mils [31,37,38] SUSP# 14 13 1 JUMP_43X79 C3204 SBA@ 10U_0603_6.3V6M 2 U3201 1 2 1 1 C3203 @ 1 @ 4 +5VALW 10U_0603_6.3V6M +3VALW 10U_0805_10V4Z 1 C3202 JUMP_43X79 A 1 1 2 1 0502A B +3VALW TO +3VALW(PCH AUX Power) +3VALW +3VALW_PCH J3204 40mil 1 1 40mil 2 2 JUMP_43X79 @ C C +3VALW TO +3VM (SBA) +3VALW +3VM +3VS +0.675VS R3208 1NOSBA@ 2 0_0402_5% +5VALW 1 VL S 1 1 2 2 SUSP G 3 S 5 4 2 2 2 1 C3218 Q3201A DMN66D0LDW-7_SOT363-6 SBA@ D 3 2 6 1 2 1 1 1 2 2 2 0_0402_5% SBA@ 0620B R3209 22_0603_5% @ R3212 390_0402_5% SBA@ SBA@ R3214 1 C3217 10U_0603_6.3V6M R3213 10K_0402_5% 1 SBA@ 2 0.1U_0402_10V6K [31,38,9] PM_SLP_A# Q3203 SI2301BDS-T1-E3_SOT23-3 SBA@ G R3211 47K_0402_1% SBA@ M_PWR_ON# D 1 D 3 R3210 47K_0402_1% @ M_PWR_ON# Q3204 2N7002K_SOT23-3 @ Q3201B DMN66D0LDW-7_SOT363-6 SBA@ D For Intel S3 Power Reduction Change Symbol Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 0819A 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 Friday, March 07, 2014 Sheet 5 32 of 42 5 4 3 2 1 VIN ADP_ID 1 2 SMB3025500YA_2P PC104 1000P_0603_50V7 1 PL101 PC103 100P_0603_50V8 2 2 [26] ADP_ID_Dok D 2 2 1 PF101 7A_24VDC_429007.WRML 1 1 PC102 100P_0603_50V8 2 PC101 1000P_0603_50V7 1 Adap+ AC Adapter 45W 65W 90W R(ohm) 118 287 549 ADP_ID(V) 0.449 0.913 1.395 Detection <=0.663, <=1.134, <=1.618 -Voltage(V) >0.234 >0.693 >1.172 D PR101 0_0402_5% 2 1 2 1 2 PC107 .1U_0402_16V7K PR106 750_0402_1% 1 2 +3VALW PC108 @ 680P_0603_50V7K 1 ADP_ID [31] A/D C C 2 10K_0402_1% PR117 1 2 PR116 1 PC111 100P_0402_50V8J 2 1 B 8 2 PR118 1 7 0.022U_0402_16V7K 100K_0402_1% 8 P G 2 + - O 5 ACIN [31,35] 6 PU101B AS393MTR-E1 SO 8P OP 4 PQ102B PC110 2 1 5 +3VALW 4 2 H_PROCHOT# +3VLP 2N7002KDW-2N_SOT363-6 4 3 @ 3 BATT_TEMP_1 [34] @ PR102 0_0402_5% 1 2 +5VS P ACES_50271-0020N-001 @ - G @ + O 47K_0402_1% 1 2 GND GND 2 1 2 3 4 PR114 1 2 1 0.022U_0402_16V7K 1.5M_0402_5% 1 S SCH DIO BAS40CW SOT-323 1K_0402_5% PR113 PR115 JRTC1 B 1 3 PD104 1N4148WS-7-F_SOD323-2 2 1 +RTCBATT 2 PU101A AS393MTR-E1 SO 8P OP 1.5M_0402_5% 2 @ PC109 2 1 PD105 1N4148WS-7-F_SOD323-2 2 1 PD103 1 6 PR112 0_0603_5% 1 2 1 PQ102A 2N7002KDW-2N_SOT363-6 PR111 1K_0603_5% 1 2 PR119 1 @ 2 [31,34,35,5] H_PROCHOT# +CHGRTC 47K_0402_1% +5VS A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/07/12 2012/07/01 Deciphered Date Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 33 of 42 1 2 PR220 7.87K_0402_1% 2 1 1 2 1 PH201 100K_0402_1%_TSM0B104F4251RZ ECAGND2 2 2 PR211 @ 1 3 5 [31,35] ADP_65W 4 2 BATT+ 10K_0402_1% 1 4 DCP 1 PC202 0.01U_0603_25V7K 2 1 PC201 1000P_0603_50V7 2 1 1 VL 2 [31,35] ADP_90W PR233 0.01_1206_1% PL201 SMB3025500YA_2P 1 2 10K_0402_1% NTC_V [31] PR210 VMB1 PF201 12A_65V_451012MRL 1 2 D PR207 DCN VMB 1.2V 3 1 EC_SMB_CK1 [31,35] VMB2 +EC_AVCC Turbo_V [31,35] 6 EC_SMB_DA1 [31,35] CPU thermal protection at 93 degree C 2 BATT_TEMP_1 [33] PH201 under CPU botten side : PR206 3.74K_0402_1% BATT_TEMP [31] PQ202A 2N7002KDW-2N_SOT363-6 2 3 1 2 PR205 10K_0402_5% @ 1 @ L30ESD24VC3-2_SOT23-3 ACES_51202-00901-001 +3VALW @ PD201 2 1 PR202 100_0402_1% 2 1 PR201 100_0402_1% D [31,35] ADP_I 1 2 PR208 6.49K_0402_1% EC_SMDA EC_SMCA 1 65/90 W: 8.66 K 45 W: 3.76 K +3VLP PR204 2.94K_0402_1% 1 2 3 4 5 6 7 8 9 10 11 2 1 1 2 PR203 6.49K_0402_1% JBATT1 1 2 3 4 5 6 7 8 9 GND GND 3 10K_0402_1% 4 PQ202B 2N7002KDW-2N_SOT363-6 5 PR221 0_0402_5% [10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29,30,31,32,33,35,36,37,38,39,4,40,5,7,8,9] ECAGND [31] H_PROCHOT#_EC C 2 C PU201 1 2 PC207 1 2 0.1U_0603_25V7K 3 [31] PTC_PROTECT 4 VCC TMSNS1 GND RHYST1 OT1 TMSNS2 OT2 RHYST2 8 PH201: Temp. Rman. Rnor. Rmin. (Kohm) 7 6 TMSNS2 PR235 0_0402_5% 93 7.3419 7.0792 6.8253 5 1 VCP 2 G718TM1U_SOT23-8 @ PR240 PU202 1 REF Out 6 PR237 @PR237 @ 150K_0402_1% 100K_0402_1% 2 1VCP_1 2 1 DCN IN- V+ IN+ 5 4 INA199A1DCKR_SC70-6~D 1 2 PR238 0_0402_5% DCP B +5VS 1 316K_0402_1% 2 2 1K_0402_50% A PR222 100K_0402_1% 1 3 PTC_PROTECT2 G S MOS_OTP: Default:High Active :Low PTC_PROTECT: Default:Low Active :High 8 O - 4 2 S 2 G 1 LM393DR_SO8~D PQ205 2N7002W-T/R7_SOT323-3 Issued Date 2011/07/12 A Compal Electronics, Inc. Compal Secret Data Security Classification 2012/07/01 Deciphered Date Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 D P PU203A Battery Protection Circuit for Turbo Mode MOS_OTP [36] PQ203 2N7002KW_SOT323-3 D + G 2 2 PC212 220P_0402_50V8J 2 3 VL +3VLP PR231 1K_0402_50% 2 1 1K_0402_50% TMSNS21 PR243 20K_0402_1% 1 2 2 2 VCP PC210 100P_0402_50V8J 2 1 1K_0402_50% PR229 1 1 2 1K_0402_50% 2 2 1 1 2 1 1 PR226 PR239 178K_0402_1% 1 PR225 PR223 100K_0402_1% PR224 PR230 4 PR241 100K_0402_1% Posestor H_PROCHOT# [31,33,35,5] PR234 0_0402_5% 1 1 PR236 1.8M_0402_1% 1 2 1 PR244 2 +5VS +3VS 1 PC209 0.1U_0603_25V7K 2 1 B GND 3 3 221K_0402_1% 2 VMB1 PR245 0_0402_5% 1 2 @ 3 2 Sheet Friday, March 07, 2014 1 34 of 42 4 3 2 DCR 換成 15m ohm,CP,Throttling....need redefine with EC P3 4 PC309 2200P_0402_50V7K D PR311 2 V1 DOCK_CONSUMP [26] 1 10_0402_1% ACN PR310 220K_0402_1% 1 P2-1 2 2 PR308 1 1 2 1 200K_0402_1% PR329 1 VIN 47K_0402_5% 1 ACN_1 2 ACP_1 BATT+ @ PC308 4.7U_0805_25V6-K 1 2 3 PC307 10U_0805_25V6K 1 2 2 @ PC329 68P_0402_50V8J 1 2 2 4 1 PR322 15_0402_1% 1 PC304 5600P_0402_25V7K 8 7 6 5 10/19 : reserve for RF demand 1 2 2 2 1 2 1 PC301 0.1U_0603_25V7K 2 1 PR305 200K_0402_1% 3 2 2 1 PR301 47K_0402_5% PQ306 @ PC302 10U_0805_25V6K 1UH_PCMB061H-1R0MS_7A_20% PL301 1 2 D DTA144EUA_SC70-3 PQ302 AO4407A_SO8 1 2 3 PR302 0.015_1206_1% 1 PR317 15_0402_1% 8 7 6 5 1 B+ 2 PQ304 AO4423L SO8 1 2 3 4 VIN P2 1 2 3 4 8 7 6 5 1 SH00000AA00 PC305 10U_0805_25V6K PQ301 AO4407A_SO8 PC306 10U_0805_25V6K 1 2 5 1 V1 2 ACP PQ307 PC311 PC310 DTC115EUA_SC70-3 2 PR323 PC317 2.2_0603_5% 0.047U_0603_25V7M 1 2 2 1 GND SRP SRN BM LODRV BTST 17 BST_CHG PD302 REGN 16 2 4 1 Adapter Protection Circuit for Turbo Mode 3 2 1 1 15 14 2 1 13 PC322 1 PR328 10_0402_5% B 2 11 6.8_0402_5% 2 1 12 PR327 RB751V-40_SOD323-2 PC321 1U_0603_25V6K 2CHG 1 4 2 3 1 PQ315 PQ314 4 BQ24727VDD @ DL_CHG @ SRP SRN PC320 10U_0805_25V6K 2 1 DH_CHG PC318 10U_0805_25V6K 2 1 18 2 S DIO GLZ22B LL-34 ILIM PR326 100K_0402_1% 1 LX_CHG HIDRV PR324 4.7_1206_5% SA000051W00 1 SCL 16251_SN 2 PU301 BQ24737RGRR_VQFN20_3P5X3P5 PC319 680P_0603_50V7K ACN ACP 5 PR319 10_1206_5% 1 2 1 2 3 CMPOUT SDA 2 10 1 1 2 316K_0402_1% PL302 10UH_PCMB103T-100MS_5A_20% PR321 0.01_1206_1% 5 1 +3VALW PQ318 DTC115EUA_SC70-3 3 PD303 2 2ACOFF-1 4 3 2 1 9 2 1U_0603_25V6K 19 C 0_0603_5% IOUT PHASE PACIN_2 SIS412DN-T1-GE3_POWERPAK8-5 1 2 3 2 1 [31,34] EC_SMB_CK1 1 20 SI7716ADN-T1-GE3 [31,34] EC_SMB_DA1 21 PC315 VCC 7 100P_0603_50V8 8 TP 5 PC314 0.1U_0603_25V7K ACDET 2 G S PQ313 PR335 PR325 1 VIN 4 ACOK 6 PC316 1 2 PD301 1SS355_SOD323-2 1 5 2 1 392K_0402_1% 2 59K_0402_1% CMPIN 1 [31,34] ADP_I 12/04 added 10K ohm 2 [31] ACOFF PR318 PQ311 2N7002W-T/R7_SOT323-3 PC312 2 PR333 10K_0402_1% 1 2 P2 0.1U_0402_25V6 VIN PR316 P2-2 3 4 5 2N7002KDW-2N_SOT363-6 PQ310B PR320 47K_0402_1% 2 PACIN 1 2 SI7716ADN-T1-GE3 1 D 3 ACPRN C PACIN_2 0.01U_0402_25V7K 0.1U_0402_25V6 1 1 PR313 150K_0402_1% 1 2 PQ310A 2N7002KDW-2N_SOT363-6 2 PQ309 DTC115EUA_SC70-3 PC313 0.039U_0603_25V7K 2 1 1 6 2 3 3 2 1 @ B 2 @ 1 2 LM393DR_SO8~D PC324 0.1U_0402_25V6 1 1 1 2 2 2 PACIN 1 1 1 1 ACIN [31,33] PR331 10K_0402_1% D 2 G ACPRN PQ320 S D 2 G PR334 PQ316 2 7 PR332 10K_0402_1% 1 2 PR330 47K_0402_1% 3 - 221K_0402_1% PU203B O 4 6 + BQ24727VDD H_PROCHOT# [31,33,34,5] 3 5 @ PR336 0_0402_5% P 8 PR337 1.8M_0402_1% 1 2 1 PR342 2 PC325 0.01U_0402_25V7K 2 1 +5VS G 1.2V PC326 100P_0402_50V8J 2 1 PR339 150K_0402_1% 2 1 PR341 20K_0402_1% 1 2 PC330 220P_0402_50V8J @ PC327 100P_0402_50V8J 2 1 2 [31,34] ADP_65W PR338 84.5K_0402_1% 2 1 1 5 4 2 [31,34] ADP_90W A @ +3VS PQ321B 2N7002KDW-2N_SOT363-6 @ PR345 7.87K_0402_1% 3 1 2 @ PQ321A 2N7002KDW-2N_SOT363-6 PR343 3.74K_0402_1% 1 2 PR344 2.94K_0402_1% 6 1 2 ADP_I 2 PR346 0_0402_5% 2 1 1 +5VS PC323 0.1U_0402_25V6 0.1U_0402_25V6 Turbo_V [31,34] 12K_0402_1% S 2N7002W-T/R7_SOT323-3 2N7002W-T/R7_SOT323-3 Compal Electronics, Inc. Compal Secret Data Security Classification 2011/07/12 Issued Date A Deciphered Date 2012/07/01 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 35 of 42 A B C D E @ FB_5V PR404 30K_0402_1% 1 2 PR406 20K_0402_1% 1 2 PC424 68P_0402_50V8J 2 1 5 PC410 0.1U_0402_25V6 2 1 UG_5V 17 LX_5V 16 LG_5V 4.7U_0603_6.3V6K 2 Typ: 175mA @ 2 PR417 0_0402_5% 1 1 + 2 2 PC413 1 VL 1 PC427 10U_0603_6.3V6M 3 2 1 PC417 4.7U_0603_6.3V6K 1 ENABLE 2 1 PR416 0_0402_5% 3V5V_ENLDO 2 150U_B2_6.3VM_R45M 4 Typ: 175mA +5VALWP @ PC418 680P_0603_25V8J PC416 2 PL402 4.7UH +-20% PCMC063T-4R7MN 5.5A 1 2 LX_5V PR412 4.7_1206_5% 2 1 LDO3 LDO5 18 PQ404 15 ENLDO ENM 14 13 11 2 PR415 0_0402_5% 2 2 1 1 PC419 1U_0402_16V6K 2 1 PR413 499K_0402_1% 1 2 PR418 100K_0402_1% [31] PWR_RESET SIS412DN-T1-GE3 4 SI7716ADN-T1-GE3 1 @ 19 PR411 PC411 2.2_0603_5% 0.1U_0603_50V_X7R 1 2 BST_5V_1 1 2 BST_5V RT8243_B+ @ 5VALW_OCP =10A Ipeak=7.765A MAINPWON [29,31] 3 @ 2 1 MOS_OTP [34] PR420 0_0402_5% 4 5 LGATE1 +3VLP EN Rising=1.2-1.6- 2V Falling0.9-0.95- 1V PQ405B 2N7002KDW-2N_SOT363-6 1 2 PC415 0.1U_0603_50V_X7R 2 1 12 VIN 4 3 PQ405A 2N7002KDW-2N_SOT363-6 LGATE2 5 SI7716ADN-T1-GE3 ENTRIP2-1 6 3 10 LG_3V RT8243_B+ ENTRIP1-1 PHASE2 PQ403 PQ402 SNUB_5V UGATE2 PHASE1 1 2 3 2 PC414 @ PR401 680P_0603_25V8J 4.7_1206_5% 2 1 2 1 1 + PC412 150U_B2_6.3VM_R45M @ 1 2 PC426 10U_0603_6.3V6M 3VALW_OCP =9.37A Ipeak=7.49A 9 LX_3V @ 3 2 1 BOOT2 UGATE1 PL401 4.7UH +-20% PCMC063T-4R7MN 5.5A 1 2 PC409 2200P_0402_50V7K 2 1 1 BYP1 2 @ @ 20 RT8243AZQW_WQFN20_3X3 BOOT1 8 PC407 10U_0805_25V6K 2 1 3 4 2 FB1 21 PAD 5 1 2 3 7 ENTRIP1 PR410 2BST_3V_1 1 2 BST_3V 2.2_0603_5% PC408 UG_3V 0.1U_0603_50V_X7R PGOOD TON 6 ENTRIP2 4 5 PU401 1 +3VALWP RT8243_B+ 5 PQ401 SIS412DN-T1-GE3 FB2 @ PC405 2200P_0402_50V7K 2 1 @ PC422 10U_0805_25V6K 2 1 PC404 10U_0805_25V6K 2 1 2 PC401 0.1U_0402_25V6 2 1 1 PC423 68P_0402_50V8J 2 1 B+ HCB2012KF-121T50_0805 ENTRIP22 PL400 1 PC406 10U_0805_25V6K 2 1 PR405 20K_0402_1% 1 2 RT8243_B+ PC402 100P_0402_50V8J 1 2 ENTRIP11 PR403 13K_0402_1% 1 2 2 1 ENTRIP2-1 PR407 140K_0402_1% 2 3V5V_TON PC403 100P_0402_50V8J 1 2 FB_3V 1 PR408 143K_0402_1% @ 1 PR402 71.5K_0402_1% ENTRIP1-1 TON (1)SMPS1=305KHZ (+5VALWP) (2)SMPS2=357KHZ(+3VALWP) PJ402 +3VALWP PD402 PD401 1 2 2 2 2 1 1 +3VALW @ JUMP_43X79 1 PJ403 RB751V40_SC76-2 RB751V40_SC76-2 +5VALWP 2 2 1 1 +5VALW @ JUMP_43X79 [31] EN_5V PR419 2 PR421 1 EN5V-1 EN3V-1 1 PC425 @4.7U_0402_6.3V6M 2 1 PR423 @ 402K_0402_1% 2 @ 402K_0402_1% 2 PR422 1 4 EN_3V [31] 2 2.2K_0402_5% @4.7U_0402_6.3V6M PC421 2 1 2.2K_0402_5% 1 4 2012/09/04 check the EN circuit 2011/07/12 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2012/07/01 Deciphered Date Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: A B C D Sheet Friday, March 07, 2014 E 36 of 42 A B C D 0.675Volt +/- 5% TDC A Peak Current 1A OCP Current A PJ502 1 PL500 PR502 1 2 2.2_0603_5% 1.35V_B+ 1 PC508 10U_0805_6.3V6M 2 1 20 VTT 18 19 BOOT 2 @ 3 1 +0.675VSP 4 VTTREF_1.35V 1 2 2 +0.675VS JUMP_43X39 @ 1 5 2 +1.35VP 220P_0402_50V8J 1 PC509 0.033U_0402_16V7K 1U_0402_6.3V6K [5] DDR_VTT_PG_CTRL S3_1.35V @ 2 Pull high resistor must be less than 2Mohm 1 PC515 @.1U_0402_16V7K 2 1 PR508 5.76K_0402_1% PR509 0_0402_5% 1 2 @ 2 2 PC516 2 @ PR505 4.64K_0402_1% 1 2 S5_1.35V 1 +1.35V 0.75V PR506 1M_0402_1% 1 2 1.35V_B+ 2 2 PAD-OPEN 4x4m PJ505 1.35V_FB 2 1 PC514 1U_0603_10V6K PR507 0_0402_5% 1 2 PJ503 1 2 PC512 10 2 PC511 1U_0603_10V6K VTTREF VDDQ +5VALW [31] SYSON 1 1 FB 1 VDD S3 11 VDD_1.35V 4 @ 21 6 2 S5 1 Freq=253KHz VDDP 7 +5VALW GND RT8207MZQW_WQFN20_3X3 8 5 PQ502 SI7716ADN-T1-GE3 CS TON 12 PR504 5.1_0603_5% @ 1.35V_OCP =9.62A Ipeak=7.4A CS_1.35V13 VTTSNS 1 2 3 2 2 @ PAD VTTGND PGND PGOOD 1 2 3 14 PR503 14.7K_0402_1% 1 2 680P_0603_50V7K 4.7_1206_5% PC513 PR501 2 1 SNUB_1.35V 2 1 2 2 + PC501 330U_D2_2.5VY_R15M PC510 10U_0603_6.3V6M 1 1 LGATE PU501 +0.675VSP +1.35VP PL501 1 VLDOIN 15 UGATE PQ501 SIS412DN-T1-GE3 +1.35VP 17 DL_1.35V 16 1 PC502 0.1U_0603_50V_X7R 4 1UH_FDSD0630-H-1R0M-P3_11A_20% PC507 10U_0805_6.3V6M 2 SW_1.35V PHASE @ DH_1.35V 5 1 2 1 2 PC505 0.1U_0402_25V6 1 2 PC506 2200P_0402_50V7K @ PC504 4.7U_0805_25V6-K 1 2 1 PC503 4.7U_0805_25V6-K PC524 68P_0402_50V8J 2 1 HCB2012KF-121T50_0805 +1.35VP 2 JUMP_43X39 VLDOIN_1.35V @ BOOT_1.35V 9 2 1 1 2 PC517 0.1U_0402_10V7K B+ 1 STATE S0 S3 S4/S5 +1.35VP S3 Hi Lo Lo S5 Hi Hi Lo VDDQ VTTREF VTT On On On On On Off (Hi-Z) Off Off Off (Discharge) (Discharge) (Discharge) 3 3 1 2 PC521 22U_0805_6.3V6M 1 1 1.5VSP_FB 1 1 1 2 PR513 1M_0402_5% PC523 0.1U_0402_10V7K 2 @ SY8033BDBC_DFN10_3X3 2 FB=0.6Volt PR511 15K_0402_1% PC520 22U_0805_6.3V6M @ +1.5VSP PC519 68P_0402_50V8J 2 1 6 2 FB EN PC522 PR510 680P_0603_50V7K 4.7_1206_5% 1 3 1 2 PR512 0_0402_5% 2 EN_1.5VSP LX 1.5VSP_LX SVIN 11 1 [31,32,38] SUSP# 5 PVIN 2 2 2 1 8 PC518 22U_0805_6.3VAM LX NC 9 @ JUMP_43X79 PVIN PG 10 1.5VSP_VIN NC 1 1 1 7 2 TP 2 PL502 1UH_PH041H-1R0MS_3.8A_20% 1 2 4 PU502 PJ506 +3VALW 2 PR514 10K_0402_1% PJ507 4 +1.5VSP 2 2 1 1 4 +1.5VS JUMP_43X79 @ Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/07/12 Deciphered Date 2012/07/01 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: A B C Friday, March 07, 2014 Sheet D 37 of 42 5 4 3 2 1 D D 2 TRIP pin (OCL) GND = 8A 5V = 12A PR702 0_0402_5% PGND PGND EN SW 2 1 PC714 68P_0402_50V8J 1 2 2 1 PC705 2200P_0402_50V7K PC706 0.1U_0402_25V6 +1.05VMP PL702 0.68UH_PCMC063T-R68MN_15.5A_20% 1 2 @ PC713 680P_0402_50V7K 1 2 1 1.05VS OCP = 8A (Trip = GND) 1.05VS OCP = 12A (Trip = 5V) PC711 22U_0805_6.3V6M 2 PR708 @ 0_0402_5% 2 1 2 @ PR706 4.7_0805_5% PC710 22U_0805_6.3V6M PC712 0.1U_0603_25V7K 1 2 PGOOD_1.05V 2 PR710 0_0402_5% 1 11/28 :change to SH000005K80(H=3) 2 B 2 10 1 [31] VCCST_PG_PWR 1 @ 1 BST_1.05V 2 LP#_1.05V PR707 5.1_0603_5% 1 2 1 2 C 11 SW_1.05V PR709 100K_0402_5% @ B+ 12 9 SW 8 SW 7 SW BST 6 5 NC MODE +3VS PGND 4 TP LP# PGOOD 29 3 28 2 EN_1.05V 1 2 TPS51362RVER_QFN28_4P5X3P5 RA 1 27 VREF 13 PC709 22U_0805_6.3V6M 2 PC707 0.1U_0402_10V6K 26 1 PC708 0.1U_0402_10V6K VREF_1.05V 1 [31,32,37] SUSP# PR705 100K_0402_1% 1 2 @ 1 2 [31,32,9] PM_SLP_A# 2 14 PC704 10U_0805_25V6K 15 VIN 16 VIN V5 17 18 19 REFIN PGND PR711 0_0402_5% 1 2 PL701 HCB2012KF-121T50_0805 1 2 1.05V_B+ VIN TRIP 2 PC703 10U_0805_25V6K 25 @ EMI Part PC702 @ GND TRIP_1.05V 20 21 2.2U_0402_6.3V6M 1 PGND PR704 105K_0402_1% 6/20 change net name from M_PWR_ON to PM_SLP_A# REFIN2 SLEW 24 VSNS REFIN_1.05V 1 1 C 23 PU701 GSNS PR701 0_0402_5% 22 2 SLEW_1.05V +1.05VMP 1 PR703 0_0402_5% 2 1 1 PC701 0.01U_0402_16V7K 2 +5VALW B @ EMI Part @ +1.05VMP PJ701 1 2 +1.05VM PAD-OPEN 4x4m A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2011/07/12 2012/07/01 Deciphered Date Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Sheet Friday, March 07, 2014 1 38 of 42 5 4 3 2 1 PC902 0.1U_0402_25V6 1 2 PR902 54.9_0402_1% 1 2 PR903 @ 75_0402_5% 1 2 +1.05VS D D PR904 110_0402_1% 1 2 10/29 change pull high resistor B+ [12] VR_SVID_DAT 1 PR930 7.5K_0402_1% 1 2 2 1 + PC927 33U_D2_25VM_R60M @ + 2@ C Acoustic 1 1 1 2 2 CSREF_CPU PC915 680P_0603_50V7K @ CSSUM_CPU 2 SNB_SW3 PR917 10_0402_5% PR916 73.2K_0603_1% 1 PQ902 TPCA8057-H_PPAK56-8-5 2 1 PL902 0.36UH_ PCMB103T-R36MS1R335 23A 2 CSN1 3 SWN1 PR920 4.7_1206_5% @ B PR923 24K_0402_1% PC923 100P_0402_50V8J 1 2 1 2 Close to choke PC922 1500P_0402_50V7K 1 PH901 220K_0402_5%_ERTJ0EV224J 2 PR929 15.4K_0402_1% 1 2 CSCOMP_CPU 2 1 PC911 68P_0402_50V8J 2 1 PC910 2200P_0402_50V7K 2 1 PC907 10U_0805_25V6K PC909 0.1U_0402_25V6 2 1 PC906 10U_0805_25V6K 2 1 PC905 10U_0805_25V6K 2 1 2 1 PC903 10U_0805_25V6K 2 1 5 3 2 1 5 4 3 2 1 1 PH902 100K_0402_1%_TSM0B104F4251RZ 1 1 2 1 PC921 4.7U_0603_10V6K ILIM_CPU 1 PC919 470P_0402_50V7K 2@ 1 PR925 165K_0402_1% 1 2 PR924 100K_0402_1% IMVP_IMON PC924 10P_0402_50V8J 1 2 PC925 @ 1500P_0402_50V7K 1 2 PC918 1000P_0402_50V7K 2 PR928 1K_0402_1% 1 2 FB_CPU 2 PC920 330P_0402_50V7K 1 2 + Close to IC side 2 PR926 49.9_0402_1% 1 2 PR919 13K_0402_1% +5VALW 1 PR922 0_0402_5% 2 2 2 1 [14] VSSSENSE PC916 .01U_0402_16V7K 2 21 20 19 18 17 16 15 PC917 1000P_0402_50V7K PR921 100_0402_1% B PU901 NCP81101_QFN28_4X4 1 +CPU_CORE DL_CPU TSNS_CPU VBOOT_CPU PR915 69.8K_0402_1% PL901 HCB2012KF-121T50_0805 1 2 PQ901 TPCA8065-H_PPAK56-8-5 4 1 1 2 Close to CPU BST_CPU DH_CPU LX_CPU ILIM_CPU IOUT_CPU CSCOMP_CPU CSSUM_CPU CSREF_CPU IMAX_CPU PVCC_CPU 1 2 PR918 100_0402_1% 8 9 10 11 12 13 14 PR912 PC913 2.2_0603_5% 0.22U_0603_16V7K 1 2 BST_CPU-1 1 2 2 2 +CPU_CORE 0_0603_5% 29 2 1 PR914 18K_0402_1% BST HG SW PGND LG TSENSE VBOOT @ PVCC_CPU VCC VSP VSN DIFFOUT FB COMP ROSC 4 1 28 27 26 25 24 23 22 AGND 2 1 VCC_CPU VSP_CPU VSN_CPU DIFFOUT_CPU FB_CPU COMP_CPU ROSC_CPU PR910 1 PC912 0.01U_0402_25V7K 2 [12] VCCSENSE PC914 1U_0603_10V6K 1 PR913 0_0402_5% 1 2 2 1 +5VALW ENABLE VR_HOT# SDIO ALERT# SCLK VR_RDY VRMP PR911 2.2_0603_5% 1 2 EMI 1 2 PR909 1K_0402_1% 1 2 CPU_B+ PR927 75K_0402_1% 1EN_CPU 2VRHOT#_CPU 3VR_SVID_DAT 4VR_SVID_ALRT# 5VR_SVID_CLK 6VR_RDY_CPU 7VRMP_CPU [12] VR_ON ILIM IOUT CSCOMP CSSUM CSREF IMAX PVCC 2 1 2 PR908 0_0402_5% 1 CPU_B+ 11/20 change to 0603 size C +1.05VS PR907 0_0402_5% 1 2 [31] VR_HOT# PC901 47P_0402_50V8J RF request 10/11 change pull high voltage PC908 33U_D2_25VM_R60M 1 [12] VR_SVID_CLK PR901 @ 75_0402_5% EMI VGATE [12] PR906 1K_0402_1% 1 2 PC904 33U_D2_25VM_R60M [12] VR_SVID_ALRT# 2 +1.05VS PR905 0_0402_5% 1 2 2 PR931 0_0402_5% A A Compal Electronics, Inc. Compal Secret Data Security Classification 2011/07/12 Issued Date Deciphered Date 2012/07/01 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 39 of 42 5 4 3 2 1 +CPU_CORE 30 X 22u/0805 RF request 1 2 PC1013 68P_0402_50V8J 2 1 @ @ PC1023 22U_0805_6.3V6M 1 2 PC1022 22U_0805_6.3V6M 1 2 PC1021 22U_0805_6.3V6M 1 2 PC1020 22U_0805_6.3V6M 1 2 PC1019 22U_0805_6.3V6M 1 2 PC1018 22U_0805_6.3V6M 1 PC1017 22U_0805_6.3V6M 2 2 2 1 PC1016 22U_0805_6.3V6M 2 1 PC1015 22U_0805_6.3V6M 1 PC1014 22U_0805_6.3V6M @ PC1012 2200P_0402_50V7K 2 1 2 PC1011 0.1U_0402_25V6 2 1 1 PC1010 22U_0805_6.3V6M 1 2 PC1009 22U_0805_6.3V6M 1 2 PC1008 22U_0805_6.3V6M 1 2 PC1007 22U_0805_6.3V6M 1 2 2 PC1006 22U_0805_6.3V6M 2 1 PC1005 22U_0805_6.3V6M 2 1 PC1004 22U_0805_6.3V6M 2 1 PC1003 22U_0805_6.3V6M 1 2 1 PC1002 22U_0805_6.3V6M D PC1001 22U_0805_6.3V6M D 1 2 PC1033 22U_0805_6.3V6M 1 2 PC1032 22U_0805_6.3V6M 1 2 PC1031 22U_0805_6.3V6M 1 2 1 2 PC1030 22U_0805_6.3V6M @ PC1029 22U_0805_6.3V6M 1 2 1 PC1028 22U_0805_6.3V6M @ 2 PC1027 22U_0805_6.3V6M 2 1 2 2 1 PC1026 22U_0805_6.3V6M 1 PC1025 22U_0805_6.3V6M C PC1024 22U_0805_6.3V6M C 1 + 2 PC1034 330U_D2_2VM_R9M @ B B A A Compal Electronics, Inc. Compal Secret Data Security Classification 2011/07/12 Issued Date Deciphered Date 2012/07/01 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 40 of 42 5 4 3 2 Version change list (P.I.R. List) Item D Reason for change PG# 1 Page 1 of 1 for PWR Modify List Date Phase 1 We just have adpter over-load protection circuit to replace the one-shot circuit, so we can reserve the one-shot circuit. P33 Un-mount PR119, PC109, PR115, PD105. 2013.04.24 SDV 2 We want to tune the switching ring to meet the derating spec. P37 Change PC502 from 0.22u to 0.1u. 2013.04.24 SDV 3 For fine tune LL & trainsient of CPU core, we must to change R/C value to meet Intel's spec. For aviod EMI/EMI to damage OP or other components through the loop of BATT_TEMP. P39 Change PR916 from 47k to 73.2k and PC923 from 560p to 100p, PC1025, PC1028, PC1034 to un-mount. 2013.04.24 SDV P34 Reserve PD201 2013.04.30 SDV 4 D 5 6 7 8 C C 9 10 11 12 13 14 B B 15 16 17 A A 2011/07/12 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification Deciphered Date 2012/07/01 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 5 4 3 2 Friday, March 07, 2014 Sheet 1 41 of 42 1 2 3 4 5 Version Change List (P.I.R. List) Phase Date No. BOM Sch Layout Description function A A B B C C D D Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013/03/08 Deciphered Date 2015/03/08 Title SCHEMATIC, MB AA341 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Rev C 4019P2 Date: 1 2 3 4 Sheet Friday, March 07, 2014 5 42 of 42 www.s-manuals.com
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