Compal LA A411P Schematics. Www.s Manuals.com. R0.1 Schematics
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A B C D E Compal Confidential Model Name : Cheetah_CT File Name : ZEJV4 BOM P/N: 1 1 2 2 Compal Confidential ZEJV4 LA-A411P Schematics Document Intel Clover Trail 2013-03-04 REV: 0.1 3 3 4 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Cover Page Cheetah_CT LA-A411P_R01 Date: A B C D Monday, March 04, 2013 Sheet E 1 of 32 Rev 0.1 A B C D E System Block Diagram MIPI_DSIX4 1 MIPI 2LVDS Bridge Renesas UPD60802A Page 12, 13 Page 23 Accelerometer Compass ST LSM303DLHC LVDS LCD 1 I2C_SCL-SENSOR_3P3 Clover View Sensor HUB I2C_SDA-SENSOR_3P3 STM32F103CBU6TR I2C 5 Page 20 I2C 0 Gyro ST L3G4200D HDMI I2C 3 Page 5 ~ 10 ALS Capella Page 19 WIFI/BT Combo USI CM3218 AH663 LS Touch Screen 14mmx14mm I2S 1 UART0 SDIO1 uHDMI conn TypeD MIPI-CSI1 x1 I2C 4 2GB LPDDR2 CO-POP 2.0M Camera Page 15 2.0M Camera 2 MIPI-CSI4 x1 USB2.0 port Page 18 USB ULPI PHY TI/TUSB1211Page 2 Page 15 ULPI 0 18 I2C 5 I2S 3 I2S 0 AUDIO CODEC Realtek I2C 2 ENE IO3737 Digital Mic X 1 ALC5642 Page 22 DC-DC AC Brick SPI_0 System VR 3V 5V 3 PMIC TI PSNB5072A1ZNB Page 28~ 32 Charger EC SVID PMIC_PWRGD I2C TI/BQ24192 Page 23 3 Battery PSS 1S4P 25Whr IPJ-P6001 PMIC_INT EXITSTBY Power rails Fuel gauge TI/BQ27541 Acer/Intel Debug port Page 26 SPI_0 LS EMMC eMMC 4 Sandsisk HomeKey Board SDIN5C4-64GB Page 16 Home botton SPI NOR SDIO0 uSD Page 17 Winbond W25Q32 4 4Mbit Page 11 speaker conn combo jack Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Cover Page Rev 0.1 Cheetah_CT LA-A411P_R01 Date: A B C D Tuesday, February 26, 2013 E Sheet 2 of 32 5 4 3 2 1 Power rail Net name DC_IN +V_BATTERY +VBATA System +V5A +V3.3A +V5S D +V3.3S +V_VCC PMIC BUCK Converter +V_VNN +V_VNNAON +V_1P22_VCCAON +V_1P80_AON +V_1P08_VCCAON +V_1P08_VCCAS +V_1P08_VCC PMIC +V_1P00_VCCAS PMIC LDO +V_1P00_VCCA +V_2P85_1P80_VCCSDIO +V_2P80_VPROG1 +V_2P80_VPROG2 +V_2P85_EMMC1 +V_2P85_EMMC2 +V_1P80_AON +V_1P80_VCCAON C PMIC PWM output +V_1P80_VCC +V_3P30_VCC Voltage 5V or 12V Max 4.2V 3.4V~4.2V 5V 3.3V 5V 3.3V 0.3~1.2V 0.6~1.2V 0.6~1.2V 1.250V 1.836V 1.08V 1.08V 1.08V 1.025V 1.025V 2.85V 1.2V 1.2V 2.85V 2.85V 1.8V 1.8V 1.8V 3.3V Comment adapter input Battery input It's tablet's "B+" Should be 5VALW Should be 3VALW Should be 5VS Should be 3VS 0.95V is default value 0.95V is default value 0.95V is default value 1.25V is default value 1.836V is default value D 2.85V is default value 1.2V is default value 1.2V is default value No routing C IO MAP Interface MIPI DSI MIPI CSI MIPI HSI LPC EMMC HDMI SDIO B SVID SPI ULPI UART I2S I2C A Device LVDS Bridger X1 X1 2M Camera 2M Camera NC NC 0 1 EMMC NC HDMI Conn. 0 1 2 Micro SD B WIFI/BT NC PMIC 0 1 2 3 0 1 0 1 2 0 1 2 3 0 1 2 3 4 5 FLASH ROM/PMIC/XDP XDP Test Point NC Internal USB POGO conn WIFI/BT NC XDP Codec BT PCM NC Codec LVDS / Panel / Touch screen 2M rear camera A Charger / Battery / PSS HDMI 2M front camera Codec / Sensor Hub Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Notes List Rev 0.1 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 3 of 32 5 4 3 2 1 Clock Distribution I2C Routing MB AT28 AN27 D I2C_0_SCL I2C_0_SDA Level shifter +V_1P80_VCCAON LEVEL : 1.8V I2C_0_SCL_LS I2C_0_SDA_LS +V3.3S LEVEL : 3.3V Panel Touch SOC Address:TBD AU27 AT26 OSC_CLK_OUT_0 (19.2MHz) OSC_CLK_OUT_1 (6~27MHZ) OSC_CLK_OUT_2 (6~27MHZ) OSC_CLK_OUT_3 (19.2MHz) Codec JTAG2_TDI 2M Camera JTAG2_TCK 2M Camera I2C_1_SCL I2C_1_SDA (19.2MHz) USB_ULPI_1_REFCLK (19.2MHz) X1 JTAG2_TMS, LVDS bridge Address:TBD USB_ULPI_0_REFCLK D Osc 19.2 MHz USB PHY USB PHY Y1 Crystal 38.4MHz 2M front CAM I2C_2_SCL Address:0x50 AM26 I2C_2_SDA AV26 +V_1P80_VCCAON C C LEVEL : 1.8V SLP_CLKOUT2 (32.768KHz) EC Intel Clover Lake I2C_3_SCL_HDMI Level shifter F8 I2C_3_SDA_HDMI H4 +V_1P22_VCCAON LEVEL : 1.25V Y1201 PMIC PSS WIFI/BT Crystal 32.768KHz SCL_HDMI_CONN SDA_HDMI_CONN +5VS LEVEL : 5V Sensor Hub HDMI Sensor/BD I2C_4_SCL AE5 I2C_4_SDA AF4 +V_1P80_VCCAON Crystal 12MHz LEVEL : 1.8V B B 2M rear CAM Address: I2C_5_SCL AF6 I2C_5_SDA AD2 +V_1P80_VCCAON LEVEL : 1.8V I2C_5_SCL_LS_3P3 I2C_5_SDA_LS_3P3 Level shifter +V3.3A LEVEL : 3.3V Address: Sensor Hub I2C_SCL_SENSOR_3P3 I2C_SDA_SENSOR_3P3 +3VS LEVEL : 3.3V Address: 0x40 CODEC Gyro Address: R=0x39,W=0x38 Address: R=0xD3,W=0xD2 G-Sensor + E-Compass Address: E-Compass R=0x3D,W=0x3C ALS Address: 0x48,0x0C G-Sensor R=0x33,W=0x32 A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title I2C ROUING/Clock Distribution THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 4 of 32 Rev 0.1 5 4 3 2 1 ZZZ MB PCB P/N +V_1P80_VCCAON PCB 10E LA-A411P REV0 M/B HDI MDSI_COMP R3 1 2 150_0201_1% HDMI_EXTR R2 1 2 2.49K_0201_1% DAA00076000 @ DISP_BRDG_RESET_N R607 1 2 10K_0201_5% QC4K@ U1 ES CPU P/N D D U1A S IC A32 DG8065001202400 QC4K A0 1.5G SA00005HU30 15 15 15 15 2.0M Rear Camera QD4T@ U1 MCSI_4_CLK_DP MCSI_4_CLK_DN MCSI_4_DATA0_DP MCSI_4_DATA0_DN MCSI_4_DATA1_DP MCSI_4_DATA1_DN MCSI_4_DATA2_DP MCSI_4_DATA2_DN MCSI_4_DATA3_DP MCSI_4_DATA3_DN TP1310 TP1311 TP1314 TP1315 TP1316 TP1317 QS CPU P/N S IC DG8065001313500 QD4T C0 1.8G FCMB4 SA000061C60 15 15 15 15 MCSI_1_CLK_DP MCSI_1_CLK_DN MCSI_1_DATA_DP MCSI_1_DATA_DN V10 V8 W9 W7 Y8 MCSI_COMP @ MCSI_X4_CLKP MCSI_X4_CLKN MCSI_X4_DP0 MCSI_X4_DN0 MCSI_X4_DP1 MCSI_X4_DN1 MCSI_X4_DP2 MCSI_X4_DN2 MCSI_X4_DP3 MCSI_X4_DN3 MDSI_A_CLKP MDSI_A_CLKN MDSI_A_DP0 MDSI_A_DN0 MDSI_A_DP1 MDSI_A_DN1 MDSI_A_DP2 MDSI_A_DN2 MDSI_A_DP3 MDSI_A_DN3 MDSI_COMP MDSI_C_CLKP MDSI_C_CLKN MCSI_X1_CLKP MCSI_X1_CLKN MCSI_X1_DP MCSI_X1_DN MCSI_COMP GP_MDSI_A_TE GP_MDSI_C_TE 1 2.0M Front Camera W5 W3 AA5 AA3 Y4 Y2 AA7 AA9 V6 V4 HDMI_CLKP HDMI_CLKN HDMI_DP0 HDMI_DN0 HDMI_DP1 HDMI_DN1 HDMI_DP2 HDMI_DN2 HDMI_EXTR RSVD[0] GP_CORE_037 HDMI_5V_DET 2 R10 150_0201_1% BT PCM 22 22 22 22 I2S_0_CLK I2S_0_FS I2S_0_RXD I2S_0_TXD 19 19 19 19 I2S_1_CLK I2S_1_FS I2S_1_RXD I2S_1_TXD D32 D28 B32 C33 R549 1 2 0_0201_5% I2S_1_CLK_R E29 F30 B28 E31 N33 N31 N37 P36 Audio Codec 22 22 22 22 D30 B30 H38 K36 I2S_3_CLK I2S_3_FS I2S_3_RXD I2S_3_TXD +V_1P80_VCCAON R933 1 2 SPI0 :1.2V DEBUG B SPI1 :1.2V or 1.8V(default) 10K_0201_5% 11,26 11,26 11,26 11,26 SPI_0_CLK SPI_0_SDI SPI_0_SDO SPI_0_SS0 25 25 25 25 11 11 11 11 SPI_1_CLK SPI_1_SDI SPI_1_SDO SPI_1_SS0 SPI_1_SS1 SPI_1_SS2 SPI_1_SS3 SPI_1_SS4 TP9 TP10 TP11 TP12 TP13 MHSI_CAWAKE E21 F16 G21 E15 D18 D20 E19 C21 B20 T36 U35 T34 T32 AV28 AM28 AR27 AN29 AT30 AP28 AV30 AR29 SPI_2_CLK SPI_2_SDI SPI_2_SDO SPI_2_SS0 TP_SPI_2_SS1 K34 M34 M38 M32 M36 R02 modify 1/7 JACK_DET#_SOC TP15 REMOVE TPM GP_I2S_1_CLK GP_I2S_1_FS GP_I2S_1_RXD GP_I2S_1_TXD I2S_2_CLK I2S_2_FS I2S_2_RXD I2S_2_TXD GP_I2S_3_CLK GP_I2S_3_FS GP_I2S_3_RXD GP_I2S_3_TXD MHSI_ACDATA MHSI_ACFLAG MHSI_ACREADY MHSI_ACWAKE MHSI_CADATA MHSI_CAFLAG MHSI_CAREADY MHSI_CAWAKE MHSI_RCOMP GP_SPI_0_CLK GP_SPI_0_SDI GP_SPI_0_SDO GP_SPI_0_SS0 GP_SPI_1_CLK GP_SPI_1_SDI GP_SPI_1_SDO GP_SPI_1_SS0 GP_SPI_1_SS1 GP_SPI_1_SS2 GP_SPI_1_SS3 GP_SPI_1_SS4 GP_SPI_2_CLK GP_SPI_2_SDI GP_SPI_2_SDO GP_SPI_2_SS0 GP_SPI_2_SS1 GP_SPI_3_CLK GP_SPI_3_SDI GP_SPI_3_SDO GP_SPI_3_SS0 GP_AON_051 GP_XDP_C0_BPM0# GP_XDP_C0_BPM1# GP_XDP_C0_BPM2# GP_XDP_C0_BPM3# GP_XDP_C1_BPM0# GP_XDP_C1_BPM1# GP_XDP_C1_BPM2# GP_XDP_C1_BPM3# GP_XDP_PREQ# GP_XDP_PRDY# GP_XDP_BLK_DP GP_XDP_BLK_DN GP_AON_042 GP_AON_043 GP_AON_044 GP_AON_045 GP_XDP_PWRMODE0 GP_XDP_PWRMODE1 GP_XDP_PWRMODE2 GP_AON_049 GP_I2C_0_SCL GP_I2C_0_SDA GP_I2C_1_SCL GP_I2C_1_SDA GP_I2C_2_SCL GP_I2C_2_SDA GP_I2C_3_SCL_HDMI GP_I2C_3_SDA_HDMI GP_I2C_4_SCL GP_I2C_4_SDA GP_I2C_5_SCL GP_I2C_5_SDA AV6 AT10 AU7 AV4 AD8 AC5 AB8 AB2 AB6 AC3 AE7 FLASH_TORCH DISP_STBY# FLASH_TRIG CAM_0_PWRDWN COMBO_GPS_RESET_N I2S_RESET# HDMI_CLK_DP HDMI_CLK_DN HDMI_DATA0_DP HDMI_DATA0_DN HDMI_DATA1_DP HDMI_DATA1_DN HDMI_DATA2_DP HDMI_DATA2_DN HDMI_EXTR HDMI_SENSE R11 HDMI_HPD HDMI_5V_DET TP1 TP2 1 DISP_BRDG_TE 12 DISP_BRDG_RESET_N 2 0_0201_5% HDMI_CLK_DP 14 HDMI_CLK_DN 14 HDMI_DATA0_DP 14 HDMI_DATA0_DN 14 HDMI_DATA1_DP 14 HDMI_DATA1_DN 14 HDMI_DATA2_DP 14 HDMI_DATA2_DN 14 2 @ 1 1M_0201_1% 12 HDMI support 1.3A +V_1P80_VCCAON HDMI_HPD 14 TP3 TP1303 C DISP_STBY# TP1309 12 CAM_0_PWRDWN 15 TP1304 TP1302 TP1308 LM3554_RESET# CAM_1_PWRDWN 15 CAM_0_RST_N 15 CAM_1_RST_N 15 AK32 AK34 AJ35 AJ33 AJ37 AG33 AH32 AH38 AH36 AG35 AF32 AE37 AF38 AF36 AB32 AA33 AE33 AD36 AA37 AE35 KBC_RST# KBC_TST SMART_SW# CLV_KBD_DKIN0 CLV_KBD_DKIN1 CLV_KBD_DKIN2 CLV_KBD_DKIN3 CLV_KBD_MKIN0 CLV_KBD_MKIN1 CLV_KBD_MKIN2 CLV_KBD_MKIN3 CLV_KBD_MKIN4 CLV_KBD_MKIN5 CLV_KBD_MKIN6 CLV_KBD_MKIN7 Rear camera Front camera 25 25 25 25 25 25 25 25 25 25 25 25 DISP_PWR_DOWN +V_1P80_VCCAON I2C_1_SCL I2C_1_SDA I2C_2_SCL I2C_2_SDA I2C_5_SCL I2C_5_SDA I2C_0_SCL I2C_0_SDA I2C_4_SCL I2C_4_SDA 12 CLV_KBD_MKOUT4 25 CLV_KBD_MKOUT5 25 CLV_KBD_MKOUT6 25 ACPI_PWR_BUTTON 24 AT28 AN27 AU27 AT26 AM26 AV26 F8 H4 AE5 AF4 AF6 AD2 I2C_1_SCL I2C_1_SDA I2C_2_SCL I2C_2_SDA I2C_3_SCL_HDMI I2C_3_SDA_HDMI I2C_4_SCL I2C_4_SDA I2C_5_SCL I2C_5_SDA I2C_0_SCL 24 I2C_0_SDA 24 I2C_1_SCL 15 I2C_1_SDA 15 I2C_2_SCL 23,24,29 I2C_2_SDA 23,24,29 I2C_3_SCL_HDMI 14 I2C_3_SDA_HDMI 14 I2C_4_SCL 15 I2C_4_SDA 15 I2C_5_SCL 20,22 I2C_5_SDA 20,22 R20 R23 R25 R26 R27 R28 R30 R31 R32 R33 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2.2K_0201_1% 2.2K_0201_1% 2.2K_0201_1% 2.2K_0201_1% 2.2K_0201_1% 2.2K_0201_1% 2.2K_0201_1% 2.2K_0201_1% 2.2K_0201_1% 2.2K_0201_1% touch panel B 2M rear camera Charger,battery,PSS HDMI EDID 2M front camera PMIC_PWRGOOD PMIC_RESET# OSCIN OSCOUT OSC_CLK0 OSC_CLK1 OSC_CLK2 OSC_CLK3 OSC_CLK_CTRL0 OSC_CLK_CTRL1 sensor hub , audio codec ELP@ ULPDDR PMIC_PWRGD PMIC_RESET# C9 E11 G15 D16 G17 H14 C13 E9 XTAL_19P2M_IN XTAL_19P2M_OUT OSC_CLK_OUT_R_0 R35 OSC_CLK_OUT_R_1 R36 OSC_CLK_OUT_R_2 R38 OSC_CLK_OUT_R_3 R37 TP_OSC_CLK_CTRL_0 R34 100K_0201_5% 25,26 26 1 1 1 1 EMC@ 2 EMC@ 2 EMC@ 2 EMC@ 2 TP14 JTAG2_TDO 0_0201_5% 0_0201_5% 0_0201_5% 0_0201_5% OSC_CLK_OUT_0 OSC_CLK_OUT_1 OSC_CLK_OUT_2 OSC_CLK_OUT_3 OSC_CLK_OUT_0 OSC_CLK_OUT_1 OSC_CLK_OUT_2 OSC_CLK_OUT_3 WAKEUP_OUT_N_AP 22 25 25 25 PMIC_SPI_DEBUG TP27 WLAN_BT_WAKE# 1 2 25 1 H36 G31 H32 G33 Y1 1 25,26 2 19 XEMC@ C3 1 2 XEMC@ C4 1 2 XEMC@ C5 1 2 4 IN OUT GND GND C1 12P_0201_50V8J 3 2 1 Y_8Z38420001_4P 2 C2 12P_0201_50V8J 38.4MHz XEMC@ C6 0.1U_0201_10V6K GP_COMS_INT0 GP_COMS_INT1 GP_COMS_INT2 GP_COMS_INT3 R35 T38 0.1U_0201_10V6K GP_LPC_AD0 GP_LPC_AD1 GP_LPC_AD2 GP_LPC_AD3 GP_LPC_CLKOUT GP_LPC_CLKRUN GP_LPC_FRAME# GP_LPC_RESET# GP_AON_089 GP_CAMERA_SB0 GP_CAMERA_SB1 GP_CAMERA_SB2 GP_CAMERA_SB3 GP_CAMERA_SB4 GP_CAMERA_SB5 GP_CAMERA_SB6 GP_CAMERA_SB7 GP_CAMERA_SB8 GP_CAMERA_SB9 GP_CORE_082 0.1U_0201_10V6K KBC_INT AN35 AL35 AT38 AN37 AN33 AK36 AP36 AL33 AM32 INTD_DSI_TE_2_R R9 D2 E3 B8 D8 C7 A7 B6 C5 H6 G3 J7 E5 MDSI Bridge to LVDS @ GP_I2S_0_CLK GP_I2S_0_FS GP_I2S_0_RXD GP_I2S_0_TXD 0.1U_0201_10V6K TP16 L35 K38 L33 J35 K32 AB4 AD4 MDSI_A_CLK_DP 12 MDSI_A_CLK_DN 12 MDSI_A_DATA0_DP 12 MDSI_A_DATA0_DN 12 MDSI_A_DATA1_DP 12 MDSI_A_DATA1_DN 12 MDSI_A_DATA2_DP 12 MDSI_A_DATA2_DN 12 MDSI_A_DATA3_DP 12 MDSI_A_DATA3_DN 12 2 Audio Codec MDSI_A_CLK_DP MDSI_A_CLK_DN MDSI_A_DATA0_DP MDSI_A_DATA0_DN MDSI_A_DATA1_DP MDSI_A_DATA1_DN MDSI_A_DATA2_DP MDSI_A_DATA2_DN MDSI_A_DATA3_DP MDSI_A_DATA3_DN MDSI_COMP TP_MDSI_C_CLK_DP TP_MDSI_C_CLK_DN 1 U1B C M10 M8 N9 N7 N5 N3 L5 L7 K4 K2 L9 M4 M2 OSC_CLK_OUT_0 OSC_CLK_OUT_1 OSC_CLK_OUT_2 OSC_CLK_OUT_3 audio codec CSB_SNSCLK1(rear camera) CSB_SNSCLK2(front camera) DISP_CLKIN(LVDS 60802) XDP JTAG2_TDI XDP JTAG2_TCK XDP JTAG2_TMS HYN@ ULPDDR A A S IC D2 512M32/533 EDBA164B1PF-1D-F ABO! SA00005BA40 S IC D2 512M32 H9TKNNNBPDMRAR-NGM ABO! SA00005JM30 SAM@ ULPDDR Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title CLOVERVIEW (1 OF 6) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. S IC D2 512M32/1066 K3PE0E000A-XGC2 ABO! Cheetah_CT LA-A411P_R01 SA00005GC60 Date: 5 4 3 2 Tuesday, February 26, 2013 1 Sheet 5 of 32 Rev 0.1 5 4 3 2 1 Must Disable internal pull-high for uSD interface !! D D U1C 17 17 STIO_0_CD_N R629 1 EMC@ STIO_0_CLK EMC@ MicroSD 2 1 C39 10P_0201_50V8J 17 17 17 17 17 25 RF request 2/8 19 19 19 19 19 19 WIFI/BT follow FFRD Hybd 0.91 C 25 UART_2_RX 2 R43 @ 1 STIO_0_WP 10K_0201_5% AM2 AP2 AN7 AM4 AN5 AM8 LID_SW# AM6 AP4 AR5 AR3 AU3 AT2 LID_SW# COMBO_BT_RESET# 24 20 SPI_INT_N STIO_1_CLK STIO_1_CMD STIO_1_DATA0 STIO_1_DATA1 STIO_1_DATA2 STIO_1_DATA3 24 19 ULPI1 en (POGO USB PHY) 2 0_0201_5% STIO_0_CLK_R STIO_0_CMD STIO_0_DATA0 STIO_0_DATA1 STIO_0_DATA2 STIO_0_DATA3 TOUCH_INT# ULPI1_CS SENSOR_HUB_WAKE UART_1_RX_3G UART_1_TX_3G UART_1_RTS_GPS UART_2_RX UART_1_CTS_GPS TP65 TP66 TP67 TP68 18 18 18 18 18 18 18 18 18 C37 F34 F38 F36 D36 E35 E37 E33 C35 W35 Y36 AD34 Y32 AC33 W33 AC35 AA35 AB36 V32 Y38 U33 V36 18 ULPI USB 0 (external USB) AL5 AK8 AK6 AJ5 AJ7 AG5 AJ9 AH8 AH4 AG9 AG3 AK4 USB_ULPI_0_CLK USB_ULPI_0_DATA0 USB_ULPI_0_DATA1 USB_ULPI_0_DATA2 USB_ULPI_0_DATA3 USB_ULPI_0_DATA4 USB_ULPI_0_DATA5 USB_ULPI_0_DATA6 USB_ULPI_0_DATA7 18 USB_ULPI_0_DIR 18 USB_ULPI_0_NXT USB_ULPI_0_REFCLK 18 USB_ULPI_0_STP @ GP_SD_0_CD# GP_SD_0_CLK GP_SD_0_CMD GP_SD_0_D0 GP_SD_0_D1 GP_SD_0_D2 GP_SD_0_D3 GP_SD_0_D4 GP_SD_0_D5 GP_SD_0_D6 GP_SD_0_D7 GP_SD_0_WP# AT18 AP24 AR21 AM20 AP20 AT20 AU19 AL19 AM18 AR17 EMMC_0_CLK EMMC_0_CMD EMMC_0_D0 EMMC_0_D1 EMMC_0_D2 EMMC_0_D3 EMMC_0_D4 EMMC_0_D5 EMMC_0_D6 EMMC_0_D7 AN19 EMMC_1_CLK_CPU AM24 AR23 AU23 AN23 AT22 AL21 AM22 AN21 AL23 EMMC_1_CLK EMMC_1_CMD EMMC_1_D0 EMMC_1_D1 EMMC_1_D2 EMMC_1_D3 EMMC_1_D4 EMMC_1_D5 EMMC_1_D6 EMMC_1_D7 GP_SDIO_1_CLK GP_SDIO_1_CMD GP_SDIO_1_D0 GP_SDIO_1_D1 GP_SDIO_1_D2 GP_SDIO_1_D3 SDIO_2_CLK SDIO_2_CMD SDIO_2_D0 SDIO_2_D1 SDIO_2_D2 SDIO_2_D3 AR19 EMMC_RCOMP GP_AON_062 GP_AON_063 GP_AON_060 GP_AON_061 GP_UART_1_RX GP_UART_1_TX GP_UART_1_RTS GP_UART_2_RX GP_UART_1_CTS EMMC_0_CLK 16 EMMC_0_CMD 16 EMMC_0_DATA0 16 EMMC_0_DATA1 16 EMMC_0_DATA2 16 EMMC_0_DATA3 16 EMMC_0_DATA4 16 EMMC_0_DATA5 16 EMMC_0_DATA6 16 EMMC_0_DATA7 16 MPTI_CLK MPTI_D0 MPTI_D1 MPTI_D2 MPTI_D3 FLSH_RCOMP EMMC TP71 R44 1 AR7 AU5 AT8 AT6 AP8 MPTI_HS_CLK MPTI_HS_DATA0 MPTI_HS_DATA1 MPTI_HS_DATA2 MPTI_HS_DATA3 AV36 AT32 AR31 AU33 AU31 AU35 AN31 AR35 AT34 AU37 AP32 AT36 AR33 USB_ULPI_1_CLK USB_ULPI_1_DATA0 USB_ULPI_1_DATA1 USB_ULPI_1_DATA2 USB_ULPI_1_DATA3 USB_ULPI_1_DATA4 USB_ULPI_1_DATA5 USB_ULPI_1_DATA6 USB_ULPI_1_DATA7 USB_ULPI_1_DIR USB_ULPI_1_NXT USB_ULPI_1_REFCLK USB_ULPI_1_STP 2 22_0201_5% MPTI_HS_CLK 25 MPTI_HS_DATA0 25 MPTI_HS_DATA1 25 MPTI_HS_DATA2 25 MPTI_HS_DATA3 25 C ULPI_0_CLK ULPI_0_D0 ULPI_0_D1 ULPI_0_D2 ULPI_0_D3 ULPI_0_D4 ULPI_0_D5 ULPI_0_D6 ULPI_0_D7 ULPI_0_CDIR ULPI_0_NXT ULPI_0_REFCLK ULPI_0_STP ULPI_1_CLK ULPI_1_D0 ULPI_1_D1 ULPI_1_D2 ULPI_1_D3 ULPI_1_D4 ULPI_1_D5 ULPI_1_D6 ULPI_1_D7 ULPI_1_STP ULPI_1_NXT ULPI_1_REFCLK ULPI_1_CDIR Del ULPI1 02/04 Those two pins were labeled in error on the SoC and in the EDS The correct pinout is: ULPI_1_DIR = AU37 ULPI_1_STP = AR33 B B FOR PMIC RTCXTALIN RTCXTALOUT RTCXTALIN 26 RTCXTALOUT 26 Y1201 1 2 1 C85 22P_0402_50V8J C86 22P_0402_50V8J 2 2 1 32.768KHZ_12.5PF_Q13FC135000040 Place close to PU1201 A A Compal Secret Data Security Classification Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title Compal Electronics, Inc. CLOVERVIEW (2 OF 6) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Cheetah_CT LA-A411P_R01 Wednesday, February 27, 2013 1 Sheet 6 of 32 Rev 0.1 3 KSEL_STRAP2 FW_STRAP2 2 R57 100_0201_1% @ R59 100_0201_1% @ D HFPLLN 1 FW_STRAP1 1 FW_STRAP0 KSEL_STRAP1 R50 2.2K_0201_1% @ 2 R49 2.2K_0201_1% @ 2 R48 2.2K_0201_1% KSEL_STRAP0 R58 100_0201_1% @ 2 R51 10K_0201_5% @ 2 1 1 R47 10K_0201_5% @ 2 1 R46 2.2K_0201_1% 1 +V_1P22_VCCAON 2 D 2 LA9421 > 10K FFRD > 2.2K 2 +V_1P80_VCCAON 1 1 +V_1P80_VCCAON 2 1 4 1 5 HFPLLC 2 R65 100_0201_1% @ 1 2 R64 100_0201_1% @ 2 R63 100_0201_1% @ R56 2.2K_0201_1% @ 1 1 1 2 2 R55 2.2K_0201_1% @ 1 R54 2.2K_0201_1% @ 1 R67 10K_0201_5% @ 2 R53 10K_0201_5% @ 2 2 R52 10K_0201_5% @ 2 1 1 1 HFPLLS FW_STRAP0 is also used to detect XDP_PRESENT#, need to connect to XDP connector pin 60 B16 TP21 THRMDA0_R THRMDC0_R THRMDA1_R THRMDC1_R TP22 TP23 TP25 TP20 26 B18 THERMTRIP# +V_1P80_VCCAON V26 U25 V20 U21 R68 1 @ 2 10K_0201_5% E27 F28 D4 F4 +V_1P22_VCCAON B R74 1 2 49.9_0201_1% M0_RPUEXT AT24 R76 1 2 1K_0201_5% M0_SPDEXT AR25 R77 1 2 1K_0201_5% M0_SPUEXT AN25 R79 R80 1 1 2 240_0201_1% 2 240_0201_1% ZQ-A ZQ-B AV20 AM38 CLV_RESETOUT_N TP35 G35 +V_1P80_VCCAON @ IERR# RSVD[12] RSVD[14] RSVD[13] RSVD[15] THERMTRIP# GP_CORE_068 GP_CORE_067 GP_CORE_069 GP_CORE_072 RSVD[6] RSVD[5] RSVD[7] GP_CORE_071 GP_CORE_070 PROCHOT# RSVD[1] GP_AON_093 GP_AON_094 RSVD[2] RSVD[8] RSVD[9] RSVD[10] RSVD[11] RSVD[3] RSVD[4] GP_AON_072 GP_UART_2_TX GP_AON_076 GP_AON_077 GP_AON_078 GP_AON_079 M_RCOMP0 M_RCOMP1 M_RCOMP2 ZQ_A ZQ_B RESETOUT# GP_CORE_012 GP_SD_0_PWR GP_SDIO_1_PWR GP_CORE_015 GP_CORE_016 GP_CORE_017 GP_CORE_018 GP_SDIO_2_PWR GP_CORE_020 GP_EMMC_0_RST# GP_EMMC_1_RST# GP_UART_0_RX GP_UART_0_TX GP_UART_0_CTS GP_UART_0_RTS GP_CORE_030 GP_CORE_031 GP_CORE_032 GP_CORE_033 GP_CORE_073 GP_CORE_074 GP_CORE_075 KSEL_STRAP2 FW_STRAP0 KSEL_STRAP0 FW_STRAP2 HFPLLN HFPLLC HFPLLS KSEL_STRAP1 FW_STRAP1 R60 1 C 25 R93 10K_0201_5% @ 2 0_0201_5% AW37 AM34 AP38 PROCHOT_N PROCHOT_N 26 TP24 CHG_INT# EC_INT# CHG_INT# EC_INT# 29 23 H12 G13 F10 TP30 J37 J33 AP16 AR15 AV16 AT14 Need power confirm battery spec. TP33 ULPI0_OC#_R USB_SPH_OC# R72 R75 1 1 AM16 AN17 AR13 AT16 AP12 AN15 AV14 AR11 AU15 AV12 AN13 AM14 AV8 AN11 AR9 AM12 AM10 AU11 AN9 K6 J5 J9 GPS_WAKEUP_R STIO_0_PWR_R BT_SHUTDOWN# R81 1 AL3 AL7 GPIO_RCOMP18 GPIO_RCOMP30 2 0_0201_5% 2 10K_0201_5% @ TP45 2 0_0201_5% MODEM_PWR_ON 1 @ TP42 TP44 TP39 EMMC_GPO_RST1 TP36 SUS_STAT# NFC_FW_RESET R85 UART_1_RX_GPS UART_1_TX_GPS CAM_FLHD_N TOUCH_RST# 1 GPIO_RCOMP18 GPIO_RCOMP30 D12 G19 B12 C17 U37 B10 AC7 D10 H16 H20 2 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST# 1 B14 D14 J17 E13 E17 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N UART_2_TX 25 ULPI0_OC# 18 +V_1P80_VCCAON Check is it needed ? STIO_0_PWR 17 BT_SHUTDOWN# 19 2 0_0201_5% EMMC_GPO_RST0 16 B UART_0_RX 19 UART_0_TX 19 UART_0_CTS 19 UART_0_RTS 19 TP46 TP47 TP43 TOUCH_RST# 24 COMBO_BT_WAKEUP 19 COMBO_WLAN_EN 19 ULPI0_CS 18 1 U1D 25 25 25 25 25 C 2 R83 51_0201_1% 2 R82 34.8_0603_1% A A Compal Secret Data Security Classification Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title Compal Electronics, Inc. CLOVERVIEW (3 OF 6) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 Sheet 1 7 of 32 Rev 0.1 5 4 +V_1P08_VCC 3 2 +V_1P08_VCCAON 1 +V_1P80_VCCAON +V_2P85_1P80_VCCSDIO 1 1 1 C7 1 C11 1 C152 C153 @ C18 1 1 2 2 VCCSDIO VCC108AS[0] VCC108AS[1] VCC122_180AON_I2C VCC122_180AON_I2S[0] VCC122_180AON_I2S[1] VDD1[0] VDD1[1] VDD1[2] VDD1[3] VDD1[4] VDD1[5] +V_1P00_VCCA V14 T26 +V_1P00_VCCA F6 +V_1P00_VCCAS AK2 +V_2P85_1P80_VCCSDIO AN39 AV18 AE1 A29 C1 C3 +V_1P80_AON AW25 AW17 AW5 AW7 AG1 AH2 A3 B4 A35 B36 V38 AK38 AV34 AW35 +V_1P22_VCCAON 1 +V_1P00_VCCAS 1 1 3 1 AO3413L_SOT23-3 2 162_0402_1% 1 B 2 @ C158 +V_1P80_VCCAON AV22 AV24 AW23 +V_3P30_VCC A11 A9 2 1 1 C588 2 1 @ C21 2 2 @ C169 TOP Side_close U1 VCC180AON[0] VCC180AON[1] VCC180AON[2] VCC180AON[3] +V_1P80_AON VCC330 1 B 1 1 C54 2 1 C55 2 1 C414 2 1 C162 2 C163 2 0.47U_0201_6.3V6K 1 2 C50 0.47U_0201_6.3V6K VNNAON[0] VNNAON[1] VNNAON[2] VNNAON[3] VNNAON[4] VNNAON[5] VNNAON[6] VNNAON[7] VNNAON[8] VNNAON[9] VNNAON[10] VNNAON[11] VNNAON[12] 0.47U_0201_6.3V6K 1 C430 C431 2 0.47U_0201_6.3V6K 0.47U_0201_6.3V6K 0.47U_0201_6.3V6K 2 1 C168 2 0.47U_0201_6.3V6K 1 C381 2 1 C13 2 0.47U_0201_6.3V6K 1 C161 2 2 2.2U_0402_6.3V6M 1 0.47U_0201_6.3V6K 1 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 1 2 C46 2 C 2.2U_0402_6.3V6M +V_VNNAON 2 C45 VCC122AON[0] VCC122AON[1] VCC122AON[2] VCC122AON[3] VCC122AON[4] VCC122AON[5] VCC122AON[6] VCC122AON[7] VCC122AON[8] VDD2[0] VDD2[1] VDD2[2] VDD2[3] VDD2[4] VDD2[5] VDD2[6] VDD2[7] VDD2[8] VDD2[9] VDD2[10] VDD2[11] VDD2[12] VDD2[13] 2 C172 +V_1P00_VCCAS 2 C49 AC29 AF28 AF30 AJ11 AL17 J11 K10 K30 N29 R29 U29 W11 W29 +V_VNNAON D 0.47U_0201_6.3V6K R681 @ C44 2 0.47U_0201_6.3V6K D C43 2 1 0.47U_0201_6.3V6K @ S 0.47U_0201_6.3V6K Q11 2 G @ 1 C167 2 1 C170 0.47U_0201_6.3V6K 1 VCC122AON_MCLK[0] VCC122AON_MCLK[1] 1 C17 0.47U_0201_6.3V6K +V_3P30_VCC 2 0.47U_0201_6.3V6K VCC108AON_SRAM A19 A27 G27 K18 H26 J27 L19 2 C14 0.47U_0201_6.3V6K +V_2P85_EMMC1 1 C166 +V_1P00_VCCA 0.47U_0201_6.3V6K AW11 AF2 L1 N1 G9 H18 J39 L39 AM30 intel request reserve 0205 2 0.47U_0201_6.3V6K VCCA100[0] VCCA100[1] VCCA100AS +V_1P80_VCCAON 0.47U_0201_6.3V6K VCCA100_CPUPLL[0] VCCA100_CPUPLL[1] VCCA100_HFHPLL VCCA100_DSIPLL VCCA100AS_USBPLL VCCA100AS_LFHPLL VCCA100_DPHYPLL AW13 AW15 AJ1 E1 F2 A21 AA39 AC39 N39 W39 0.47U_0201_6.3V6K VCC108[4] VCC108[5] VCC108[6] VCC108[7] VCC108[8] VCC108[9] VCC108[10] VCC108[11] VCC108[12] VCC108[13] VCC108[14] VCC108[15] VCC108[16] VCC108[17] VCC108[18] VCC108[19] VCC180AON[4] VCC180AON[5] VCC180AON[6] VCC180AON[7] VCC180AON[8] VCC180AON[9] VCC180AON[10] VCC180AON[11] VCC180AON[12] VCC180AON[13] 2.2U_0402_6.3V6M +V_1P22_VCCAON 1 C31 @ VCC108[0] VCC108[1] VCC108[2] VCC108[3] VCC108AON_OSC C12 AL25 AK30 1@ C30 0.47U_0201_6.3V6K 2 C587 0.47U_0201_6.3V6K 2 1@ 1 C429 0.47U_0201_6.3V6K 2 1 C428 0.47U_0201_6.3V6K 2 1 C413 0.47U_0201_6.3V6K G39 AL39 2 1 C412 0.47U_0201_6.3V6K AW33 +V_1P80_VCCAON 2 1 C29 0.47U_0201_6.3V6K AB30 F32 1 C28 0.47U_0201_6.3V6K AA29 +V_1P08_VCCAS 1 1 0.47U_0201_6.3V6K +V_1P08_VCCAON 1 2 C24 0.47U_0201_6.3V6K C 1 2 C23 0.47U_0201_6.3V6K 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 C33 2 C22 2.2U_0402_6.3V6M C32 C155 2 2.2U_0402_6.3V6M 1 1 2.2U_0402_6.3V6M AA21 AA23 AA25 AB12 AB22 AB24 AC11 AC21 AC23 AC25 AD12 AE11 N11 N17 K28 L29 +V_1P08_VCC 1 2 @ C154 0.47U_0201_6.3V6K +V_1P08_VCCAON 1 0.47U_0201_6.3V6K +V_1P08_VCCAS 0.47U_0201_6.3V6K 2 U1E AK28 AL27 W23 W21 J15 +V_1P08_VCC @ C20 C19 2 0.47U_0201_6.3V6K 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K D C10 2 0.47U_0201_6.3V6K 2 1 A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title CLOVERVIEW (4 OF 6) Size Document Number Custom Date: 5 4 3 2 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 8 of 32 Rev 0.1 5 4 3 +V_VCC +V_VCC 1A U1F 1 C100 D C57 1 C58 1 C59 1 2 TOP Side_close U1 C94 2 0.47U_0201_6.3V6K 2 1 C601 2 C 1 C590 2 2 1 C95 0.47U_0201_6.3V6K 1 C589 2 2 1 C72 0.47U_0201_6.3V6K 1 1 C71 0.47U_0201_6.3V6K 1 2 0.47U_0201_6.3V6K 2 C38 1 C70 0.47U_0201_6.3V6K 1 2 C600 2 1 C69 0.47U_0201_6.3V6K 2 C37 1 C599 2 0.47U_0201_6.3V6K 1 2 0.47U_0201_6.3V6K 2 C36 1 C598 2 1 C68 C591 2 0.47U_0201_6.3V6K 1 2 0.47U_0201_6.3V6K 28 28 2 C35 1 C67 0.47U_0201_6.3V6K VSSPUSENSE VCCPUSENSE 1 1 0.47U_0201_6.3V6K 28 2 C597 2 1 C66 0.47U_0201_6.3V6K R25 P24 VNNPUSENSE 1 C596 2 0.47U_0201_6.3V6K VCC_VSSSENSE VCCSENSE AA13 Y14 1 0.47U_0201_6.3V6K VNN_VSSSENSE VNNSENSE 2 1 C595 2 1 C65 2.2U_0402_6.3V6M SVID_CLKOUT SVID_DOUT 1 1 C594 2 2 C64 0.47U_0201_6.3V6K 2 C34 SVID_CLKSYNCH SVID_DIN 1 C593 2 2.2U_0402_6.3V6M N35 P32 SVID_CLKOUT SVID_DOUT 1 2.2U_0402_6.3V6M SVID_CLKOUT SVID_DOUT R33 P38 SVID_CLKSYNC SVID_DIN 1 C592 2 2.2U_0402_6.3V6M 26 26 1 2 C63 0.47U_0201_6.3V6K 26 26 1 2.2U_0402_6.3V6M TP99 TP98 SVID_CLKSYNC SVID_DIN 1 2 C62 0.47U_0201_6.3V6K TP96 TP97 2 C61 0.47U_0201_6.3V6K TOP Side_close U1 1 0.47U_0201_6.3V6K C 2 C60 0.47U_0201_6.3V6K @ C96 2 +V_1P22_VCCAON 0.47U_0201_6.3V6K 1 0.47U_0201_6.3V6K 2 @ C97 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 0.47U_0201_6.3V6K 2 1 C76 D 2.2U_0402_6.3V6M 1 C75 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 1 C74 A13 A17 A31 A37 A39 AC1 AE39 AJ39 AN1 AR1 AU1 AV10 AW1 AW27 AW3 AW31 AW9 B34 C39 D38 E39 G1 J1 R39 U39 W1 AL29 AW29 AK10 AL1 AA1 Y10 A15 J13 A33 H28 AG39 AH30 2.2U_0402_6.3V6M 1 C73 VCC122AON_MEM[0] VCC122AON_MEM[1] VCC122AON_MEM[2] VCC122AON_MEM[3] VCC122AON_MEM[4] VCC122AON_MEM[5] VCC122AON_MEM[6] VCC122AON_MEM[7] VCC122AON_MEM[8] VCC122AON_MEM[9] VCC122AON_MEM[10] VCC122AON_MEM[11] VCC122AON_MEM[12] VCC122AON_MEM[13] VCC122AON_MEM[14] VCC122AON_MEM[15] VCC122AON_MEM[16] VCC122AON_MEM[17] VCC122AON_MEM[18] VCC122AON_MEM[19] VCC122AON_MEM[20] VCC122AON_MEM[21] VCC122AON_MEM[22] VCC122AON_MEM[23] VCC122AON_MEM[24] VCC122AON_MEM[25] VCC122AON_MEM[26] VCC122AON_MEM[27] VCC122AON_MEM[28] VCC122AON_MEM[29] VCC122AON_MEM[30] VCC122AON_MEM[31] VCC122AON_MEM[32] VCC122AON_MEM[33] VCC122AON_MEM[34] VCC122AON_MEM[35] VCC122AON_MEM[36] VCC122AON_MEM[37] 2.2U_0402_6.3V6M 1 VCC[0] VCC[1] VCC[2] VCC[3] VCC[4] VCC[5] VCC[6] VCC[7] VCC[8] VCC[9] VCC[10] VCC[11] VCC[12] VCC[13] VCC[14] VCC[15] VCC[16] VCC[17] VCC[18] VCC[19] VCC[20] VCC[21] VCC[22] VCC[23] VCC[24] VCC[25] VCC[26] VCC[27] VCC[28] VCC[29] VCC[30] VCC[31] VCC[32] VCC[33] VCC[34] VCC[35] VCC[36] VCC[37] VCC[38] VCC[39] VCC[40] VCC[41] VCC[42] VCC[43] VCC[44] VCC[45] VCC[46] VCC[47] VCC[48] VCC[49] VCC[50] VCC[51] VCC[52] VCC[53] 2.2U_0402_6.3V6M +V_VCC @ 2.2U_0402_6.3V6M A23 A25 AA19 AA27 AC19 AC27 B22 B24 B26 C23 C25 D22 D24 D26 E23 E25 F22 F24 G23 H22 H24 J21 J23 K22 K24 L21 L23 L25 L27 M20 M22 M24 M26 N19 N21 N23 N25 N27 P20 P22 P26 R19 R21 R23 R27 T22 T24 U19 U23 U27 V22 V24 W19 W27 @ C98 0.47U_0201_6.3V6K 2 @ C56 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 1 1 +V_1P22_VCCAON 3.8A 1 2 B B FFRD Hyprid 0.91 FFRD SLATE 1.1 Tango1116 VNN Power Rail 0.47uF x 7 (@2) 0.47uF x 7 (@2) 0.47uF x 16 (@10) 0.47uF x 15 (@1) Coach 0.47uF x 8 / 2.2uF x 4 Coach 1121 VNNAON 0.47uF x 5 0.47uF x 6 0.47uF x 9 (@7) 0.47uF x 9 (@1) 0.47uF x 4 / 2.2uF x 2 VCC 0.47uF x 11 (@3) 0.47uF x 10 (@2) 0.47uF x 12 (@4) 0.47uF x 12 (@4) 0.47uF x 12 (@4) VCC108 0.47uF x 7 0.47uF x 7 0.47uF x 7 0.47uF x 7 0.47uF x 4 / 2.2uF x 1 VCC108AS 0.47uF x 2(@1) 0.47uF x 2(@1) 0.47uF x 2 0.47uF x 2 0.47uF x 2 VCC108AON 0.47uF x 2 0.47uF x 2 0.47uF x 5 (@3) 0.47uF x 5 (@3) 0.47uF x 5 (@3) VCC122_180AON_I2C/I2S VCC180AON_SRAM 0.47uF x 12 0.47uF x 13 0.47uF x 13 0.47uF x 13 0.47uF x 7 / 2.2uF x 3 VCC122AON VDD2 0.47uF x 25 0.47uF x 9 0.47uF x 25 0.47uF x 10 0.47uF x 24 0.47uF x 24 VCC122AON_MEM 0.47uF x 14 0.47uF x 14 0.47uF x 24(@9) 0.47uF x 24 VCCA100 0.47uF x 7 0.47uF x 7 0.47uF x 7 0.47uF x 7 0.47uF x 7 VCCA100AS 0.47uF x 3 0.47uF x 3 0.47uF x 5 (@2) 0.47uF x 5 (@2) 0.47uF x 5 (@2) VCCSDIO 0.47uF x 2 0.47uF x 2 0.47uF x 2 (@2) 0.47uF x 2 (@2) 0.47uF x 2 (@2) VDD1 0.47uF x 10 0.47uF x 10 0.47uF x 10 0.47uF x 10 0.47uF x 5 / 2.2uF x2 A A VCC330 0.47uF x 1 0.47uF x 1 0.47uF x 23 / 2.2uF x 10 0.47uF x 3 (@2) 0.47uF x 3 (@2) Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title CLOVERVIEW (5 OF 6) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 0.47uF x 3 (@2) Date: 5 4 3 2 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 9 of 32 Rev 0.1 5 4 3 2 1 @ U1G D +V_VNN 3.5A +V_VNN U1H AA15 AA17 AB16 AC15 AC17 AD16 AD18 AE15 AE17 AE19 AE21 AE23 AE25 AE27 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AG13 AG15 AG19 AG23 AG27 AH14 AH16 AH18 AH20 AH22 AH24 AH26 AJ13 AJ15 AJ17 AJ19 AJ21 AJ23 AJ25 AJ27 AW19 C A1 A5 AA11 AA31 AB10 AB14 AB18 AB20 AB26 AB28 AB34 AB38 AC13 AC31 AC37 AC9 AD10 AD14 AD20 AD22 AD24 AD26 AD28 AD30 AD32 AD38 AD6 AE13 AE29 AE3 AE31 AE9 AF10 AF12 AF34 AF8 AG11 AG17 AG21 AG25 AG29 AG31 AG37 AG7 AH10 AH12 AH28 AH34 AH6 AJ29 AJ3 AJ31 AK12 AK14 AK16 AK18 AK20 AK22 AK24 AK26 AL11 AL13 AL15 AL31 AL37 AL9 AM36 AN3 AP10 AP14 AP18 AP22 AP26 AP30 AP34 AP6 AR37 AR39 AT12 AT4 AU13 AU17 AU21 AU25 AU29 AU39 @ VNN[0] VNN[1] VNN[2] VNN[3] VNN[4] VNN[5] VNN[6] VNN[7] VNN[8] VNN[9] VNN[10] VNN[11] VNN[12] VNN[13] VNN[14] VNN[15] VNN[16] VNN[17] VNN[18] VNN[19] VNN[20] VNN[21] VNN[22] VNN[23] VNN[24] VNN[25] VNN[26] VNN[27] VNN[28] VNN[29] VNN[30] VNN[31] VNN[32] VNN[33] VNN[34] VNN[35] VNN[36] VNN[37] VNN[38] VNN[39] VNN[40] VNN[41] VNN[42] VNN[43] VNN[44] VNN[45] VNN[46] VNN[47] VNN[48] VNN[49] VNN[50] VNN[51] VNN[52] VNN[53] VNN[54] VNN[55] VNN[56] VNN[57] VNN[58] VNN[59] VNN[60] VNN[61] VNN[62] VNN[63] VNN[64] VNN[65] VNN[66] VNN[67] VNN[68] VNN[69] VNN[70] VNN[71] VNN[72] VNN[73] VNN[74] VNN[75] VNN[76] VNN[77] VNN[78] VNN[79] VNN[80] VNN[81] VNN[82] VNN[83] AW21 L11 L13 L15 L17 N13 N15 P12 P14 P16 P4 P8 R1 R11 R13 R15 R17 R3 R5 R7 R9 T10 T12 T14 T16 T2 T4 T6 T8 U1 U11 U13 U15 U17 U3 U5 U7 U9 V16 W15 W17 Y16 +V_VNN 2 C77 2 C78 2 C79 2 C80 1 1 B C84 1 C93 1 C91 1 C92 1 C382 1 C416 1 C432 C433 2 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 2200P_0201_50V7K 2 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 2 0.47U_0201_6.3V6K 1 2.2U_0402_6.3V6M 1 2.2U_0402_6.3V6M 1 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 1 VSS[0] VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] D AU9 AV2 AV32 AV38 AW39 B2 B38 C11 C15 C19 C27 C29 C31 D34 D6 E7 F12 F14 F18 F20 F26 G11 G25 G29 G37 G5 G7 H10 H2 H30 H34 H8 J19 J25 J29 J3 J31 K12 K14 K16 K20 K26 K8 L3 L31 L37 M14 M16 M18 M28 M30 M6 P10 P18 P2 P28 P30 P34 P6 R31 R37 T18 T20 T28 T30 U31 V12 V18 V2 V28 V30 V34 W13 W25 W31 W37 Y12 Y18 Y20 Y22 Y24 Y26 Y28 Y30 Y34 Y6 C B A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title CLOVERVIEW (6 OF 6) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 10 of 32 Rev 0.1 5 4 3 2 1 +V_1P22_VCCAON +V3.3A D DIR L H X A PORT Enabled Hi-Z Hi-Z B PORT Hi-Z Enabled Hi-Z SN74AVC4T774RSVR VCCB VCCA QFN 26,5 B data to A data A data to B data Isolation SPI_0_CLK 26,5 26,5 26,5 R841 1 2 0_0201_5% SPI_0_CLK_R SPI_0_SDO SPI_0_SS0 SPI_0_SDI SPI_0_SDO SPI_0_SS0 SPI_0_SDI 12 11 10 9 15 16 5 6 B1 B2 B3 B4 A1 A2 A3 A4 DIR1 DIR2 DIR3 DIR4 QE 2 14 1 2 3 4 SPI_0_CLK_DEBUG SPI_0_SDO_DEBUG SPI_0_SS0_DEBUG SPI_0_SDI_DEBUG 7 SPI0_DBG_EN# GND 8 R923 1 2 0_0201_5% @ R861 10K_0402_5% @ SPI_0_CLK_DEBUG SPI_0_SDO_DEBUG SPI_0_SS0_DEBUG SPI_0_SDI_DEBUG R847 10K_0402_5% 25 25 25 25 R858 10K_0402_5% 1 SN74AVC4T774_UQFN16_2P6X1P8 R848 1 R842 10K_0402_5% @ C559 0.1U_0201_10V6K 1 U21 13 1 C558 0.1U_0201_10V6K 2 OE# L L H 2 OPERATION 1 2 CONTROL INPUTS OUTPUT CIRCUITS 2 1 1 SN74AVC4T774 2 D SPI_0_SS0_DEBUG 2 0_0201_5% C C +V_1P80_VCCAON 1 1 +V3.3A R947 10K_0201_5% 2 R950 10K_0201_5% G 2 2 if without XDP just SPI_1_SS2 used to SOC (1.8V) to SPI ROM (1.8V) Q19 3 SPI_1_SS2 1 SPI_1_SS2_DEBUG D SPI_1_SS2 S 5 S TR BSS138W 1N SOT-323-3 5 5 5 SPI_1_SS2 SPI_1_SS1 SPI_1_SS3 SPI_1_SS4 SPI_1_SS1 SPI_1_SS3 SPI_1_SS4 R930 R928 R929 R931 1 1 1 1 XDPA@ XDPA@ XDPA@ XDPA@ 2 2 2 2 SPI_1_SS2_DEBUG_XDP SPI_1_SS1_DEBUG SPI_1_SS3_DEBUG SPI_1_SS4_DEBUG 0_0201_5% 0_0201_5% 0_0201_5% 0_0201_5% SPI_1_SS2_DEBUG_XDP SPI_1_SS1_DEBUG 25 SPI_1_SS3_DEBUG 25 SPI_1_SS4_DEBUG 25 25 B B U23 +V3.3A SPI_0_SDO_DEBUG 5 SPI_0_CLK_DEBUG 6 SPI_1_SS2_DEBUG 1 R856 1 2 3.32K_0402_1% SPI_NOR_3P3_HOLD# 7 R857 1 2 3.32K_0402_1% SPI_NOR_3P3_WP# 3 8 1 2 C562 0.1U_0201_10V6K D Q 2 SPI_0_SDI_DEBUG C S HOLD W VCC VSS 4 S IC FL 4M W25X40CLSNIG SOIC 8P SPI A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 SPI NOR FLASH Rev Cheetah_CT LA-A411P_R01 0.1 Tuesday, February 26, 2013 1 Sheet 11 of 32 5 4 3 2 1 19.2 MHz OSC DISP_BRDG_RESET_N +V_1P80_VCCAON 5 U5A C513 0.01U_0201_10V7K 5 X1 5 @ OSC 4 2 D 1 VDD DISP_PWR_DOWN DISP_PWR_DOWN OUT 1 2 ENABLE GND 2 J7 CLKIN 25 0_0201_5% 1 DISP_CLKIN DISP_CLKIN R95 2 +V_1P80_VCCAON 5 DISP_BRDG_TE DISP_BRDG_VCSEL_1 DISP_BRDG_VCSEL_0 C7 C8 DISP_BRDG_LANSEL_0 DISP_BRDG_LANSEL_1 B7 A7 DISP_BRDG_TE_R L9 DISP_BRDG_PWM K9 J9 R645 1K_0201_5% 2 A8 13,26 DISP_BRDG_PWM L8 K8 J8 H9 2 R646 1K_0201_5% CLKSEL=0, CLKIN=19.2MHz CLKSEL=1, CLKIN=26MHz 1 R634 2 0_0201_5% DISP_BRDG_CLKSEL 1 1 CLock selection C1 CLKIN 0_0201_5% 19.2MHZ_15PF_8W19200005 * H10 DISP_BRDG_STDBY_N @ R12 3 D8 DISP_BRDG_RESET_N DISP_BRDG_RESET_N 2 R952 10K_0201_5% DISP_BRDG_STDBY_N 2 0_0201_5% RESET_N DRXCP DRXCN DRXD0P DRXD0N DRXD1P DRXD1N DRXD2P DRXD2N DRXD3P DRXD3N PD STANBY_N CLKIN CLKSEL VCSEL[1] VCSEL[0] LANESEL[0] LANESEL(1) BRIDGE UPD60802 TE INT PWM GPIO[0] GPIO[1] GPIO[2] GPIO[3] LTX1CP LTX1CN LTX1D0P LTX1D0N LTX1D1P LTX1D1N LTX1D2P LTX1D2N LTX1D3P LTX1D3N 1 DISP_BRDG_CLKSEL R635 100K_0201_5% I2C_0_SDA_BRDG K7 I2C_0_SCL_BRDG L7 1 1 1 1 1 R640 R641 R642 R643 R644 2 no used I2C ,just pull up 2 2 2 2 2 10K_0201_5% 10K_0201_5% 10K_0201_5% 10K_0201_5% 10K_0201_5% DISP_BRDG_TEST_I_0 DISP_BRDG_TEST_I_1 DISP_BRDG_TEST_I_2 DISP_BRDG_TEST_I_3 DISP_BRDG_TEST_I_4 C10 D9 D10 A9 B8 H7 F8 G8 M7 C Virtual Channel Setting LTX0CP LTX0CN LTX0D0P LTX0D0N LTX0D1P LTX0D1N LTX0D2N LTX0D2P LTX0D3P LTX0D3N SDA SCL TEST_I[0] TEST_I[1] TEST_I[2] TEST_I[3] TEST_I[4] InternalConnect TEST_O[0] TEST_O[1] TEST_O[2] TEST_O[3] Open Open Open B3 C3 B4 C4 C2 B2 C5 B5 A3 A2 MDSI_A_CLK_DP MDSI_A_CLK_DN MDSI_A_DATA0_DP MDSI_A_DATA0_DN MDSI_A_DATA1_DP MDSI_A_DATA1_DN MDSI_A_DATA2_DP MDSI_A_DATA2_DN MDSI_A_DATA3_DP MDSI_A_DATA3_DN H2 H3 F2 F3 G2 G3 J2 J3 H1 J1 LVDS_CH_1_CLK_P LVDS_CH_1_CLK_N LVDS_CH_1_DATA0_P LVDS_CH_1_DATA0_N LVDS_CH_1_DATA1_P LVDS_CH_1_DATA1_N LVDS_CH_1_DATA2_N LVDS_CH_1_DATA2_P LVDS_CH_1_DATA3_P LVDS_CH_1_DATA3_N MDSI_A_CLK_DP 5 MDSI_A_CLK_DN 5 MDSI_A_DATA0_DP 5 MDSI_A_DATA0_DN 5 MDSI_A_DATA1_DP 5 MDSI_A_DATA1_DN 5 MDSI_A_DATA2_DP 5 MDSI_A_DATA2_DN 5 MDSI_A_DATA3_DP 5 MDSI_A_DATA3_DN 5 LVDS_CH_1_CLK_P 13 LVDS_CH_1_CLK_N 13 LVDS_CH_1_DATA0_P 13 LVDS_CH_1_DATA0_N 13 LVDS_CH_1_DATA1_P 13 LVDS_CH_1_DATA1_N 13 LVDS_CH_1_DATA2_N 13 LVDS_CH_1_DATA2_P 13 LVDS_CH_1_DATA3_P 13 LVDS_CH_1_DATA3_N 13 D From SOC(U1) to LVDS conn.(JLVDS1) K4 L4 L2 K2 K3 L3 K5 L5 M3 M4 G9 C6 E7 M9 1 1 2 0_0201_5% @ R951 10K_0201_5% C 2 1 @ @ R627 1 R628 1 DISP_STBY# UPD60802AF1-A10-BND_PBGA144 DISP_BRDG_VCSEL_1 1 1 DISP_BRDG_VCSEL_0 R637 100K_0201_5% 2 2 R636 100K_0201_5% +V_1P80_VCCAON +V_1P80_VCCAON U5B C448 2 C450 2 Virtual Channel Setting (VCSEL[1:0]) VCSEL[1:0] pin 00 1 2.2U_0402_6.3V6M 1 2.2U_0402_6.3V6M DSI-RX Setting Virtual channel for Tremolo-2 sets to 0 +V_1P80_VCCAON Virtual channel for Tremolo-2 sets to 1 2 1 1 1 2 * L2 2-Datalane: DRXCP/N,DRXD0P/N DRXD1P/N Valid DRXD2P, DRXD2N PIN should be left OPEN DRXD3P, DRXD3N PIN should be left OPEN 10 Reserved 11 4-Datalane:DRXCP/N,DRXD0P/N,DRXD1P/N DRXD2P/N,DRXD3P/N Valid F4 E5 M12 M10 M6 M5 M1 Valid left OPEN left OPEN left OPEN 01 F5 D2 D3 F1 J10 K10 L10 E10 F10 G10 SUPPRE_ BLM15AX601SN1D A DSI-RX Setting 1-Datalane: DRXCP/N,DRXD0P/N DRXD1P, DRXD1N PIN should be DRXD2P, DRXD2N PIN should be DRXD3P, DRXD3N PIN should be E1 E2 L1 2 0.01U_0201_10V7K 00 2 2.2U_0402_6.3V6M 2SUPPRE_ BLM15AX601SN1D Data Lane Setting (LANSEL[1:0]) LANSEL[1:0] pin 2 4.7U_0402_6.3V6M K1 0.1U_0201_6.3V6K 2 C463 1 L1 1 C465 1 C462 1 C464 2 1 2 0.1U_0201_6.3V6K DISP_BRDG_LANSEL_1 DISP_BRDG_LANSEL_0 1 2 0.1U_0201_6.3V6K R633 100K_0201_5% +V_1P80_VCCAON C460 R632 100K_0201_5% 2 0.1U_0201_6.3V6K +V_1P80_VCCAON 1 C459 Data Lane Setting 2 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K B 1 C458 Virtual channel for Tremolo-2 sets to 3 D4 E4 J12 K12 L12 F12 G12 H11 +V_1P80_VCCAON C456 Virtual channel for Tremolo-2 sets to 2 11 C455 10 1 1 01 2 * A11 B1 B6 B11 C9 E3 G6 H8 M8 M11 VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDD_MIPI VDD_MIPI VDD_MIPI VDD_LVDS VDD_LVDS VDD_LVDS VDD_LVDS VR_EDVDD_1 VR_EDVDD_1 VR_EDVDD_1 AVDD_1 AVDD_1 AVDD_2 AVDD_2 AVDD_2 AVDD_3 AVDD_3 VSS VR_EDVDD_2 VR_EDVDD_2 VR_EDVDD_2 MIPI_EX12V VR_RVDD VR_RVDD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AVDD_3 VSS VSS VSS VSS VSS BRIDGE VR_PLLVDD UPD60802 VR_PLLVDD_LVDS VDD_PLL_LVDS VSS_PLL_LVDS VSSI_1 VSSI_1 VSSI_1 VSSI_2 VSSI_2 VSSI_2 VSSI_3 VSSI_3 VSSI_3 VSS_PLL VSS VSS VSS VSS VSS A4 D5 E6 H5 H6 G5 M2 C447 1 C449 1 2 0.1U_0201_6.3V6K 2 0.1U_0201_6.3V6K +V_1P80_VCCAON C451 1 C452 1 2 0.1U_0201_6.3V6K 2 0.1U_0201_6.3V6K J11 K11 L11 C453 1 2 4.7U_0402_6.3V6M E11 F11 G11 C457 1 2 4.7U_0402_6.3V6M A5 C461 1 2 1U_0201_6.3V6M A1 A6 A10 A12 B9 B10 B12 C11 C12 D1 D6 D7 D11 D12 E8 E9 E12 F6 F7 F9 G1 G4 G7 H4 H12 J4 J5 J6 K6 L6 B +V_1P80_VCCAON UPD60802AF1-A10-BND_PBGA144 A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 LVDS Bridge Rev Cheetah_CT LA-A411P_R01 0.1 Tuesday, February 26, 2013 1 Sheet 12 of 32 5 4 3 2 1 D D +V3.3A +VDD_3P3 U6 1 2 2 C466 4.7U_0402_6.3V6M 1 VIN_A2 VIN_B2 VOUT_A1 VOUT_B1 JLVDS1 A1 B1 C467 0.1U_0201_10V6K +VDD_3P3 2 1 1 C468 0.1U_0201_10V6K 2 10K_0201_5% 1 10K_0201_5% 1 C469 4.7U_0402_6.3V6M C2 PMIC_PANEL_EN PMIC_PANEL_EN C1 1 26 R655 100K_0201_5% ON 2 C470 1 GND 2 TPS22924CYZPR_DSBGA6 0.1U_0201_10V6K A2 B2 2 R673 2 R674 12 12 LVDS_CH_1_DATA0_N LVDS_CH_1_DATA0_P 12 12 LVDS_CH_1_DATA1_N LVDS_CH_1_DATA1_P 12 12 LVDS_CH_1_DATA0_N LVDS_CH_1_DATA0_P LVDS_CH_1_DATA1_N LVDS_CH_1_DATA1_P LVDS_CH_1_CLK_N LVDS_CH_1_CLK_P LVDS_CH_1_CLK_N LVDS_CH_1_CLK_P 12 12 LVDS_CH_1_DATA2_N LVDS_CH_1_DATA2_P 12 12 LVDS_CH_1_DATA3_N LVDS_CH_1_DATA3_P STBY# RESET LVDS_CH_1_DATA2_N LVDS_CH_1_DATA2_P LVDS_CH_1_DATA3_N LVDS_CH_1_DATA3_P UPDN SHLR +Panel_PWR 31 +Panel_FB SHLR: 10K to 3.3V and 20K to GND UPDN: 10K to GND. C 1 LCD_PWM D S TR BSS138W 1N SOT-323-3 LCD_PWM 31 R676 20K_0201_5% 1 2 10K_0201_5% 1 2 2 2 Q3 3 S DISP_BRDG_PWM G 12,26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 GND2 GND1 32 31 C ACES_50506-03041-P01 CONN@ to backlight power boost circuit R678 SHLR UPDN R660 10K_0201_5% 2 R662 10K_0201_5% @ R675 @ 10K_0201_5% 1 2 1 +V3.3A 1 +V_1P80_VCCAON 10K_0201_5% 1 2 +VDD_3P3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 R684 to backlight boost circuit B B A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 LVDS CONNECTOR Cheetah_CT LA-A411P_R01 Monday, March 04, 2013 Sheet 1 13 of 32 Rev 0.1 5 4 3 HDMI Hot plug circuit 2 1 EDID I2C level shift +V_5P00_HDMI_CONN +V_1P22_VCCAON +V_1P22_VCCAON D 2 B 1 1 2HDMI_HPD_CONN 15K_0201_1% 2 U31 1 E 2 2 R913 10K_0201_5% 5 I2C_3_SCL_HDMI 5 I2C_3_SDA_HDMI I2C_3_SCL_HDMI 3 I2C_3_SDA_HDMI 4 GND EN VREF1 VREF2 SCL1 SCL2 SDA1 SDA2 8 R914 1 7 @ 2 200K_0201_5% C582 1 2 0.1U_0201_10V6K 6 SCL_HDMI_CONN 5 SDA_HDMI_CONN 1 R912 10K_0201_5% 2K_0402_1% R916 2 +V_5P00_HDMI_CONN +V_1P22_VCCAON 1 1 3 HDMI_HPD 2 HDMI_HPD R1095 Q85 MMBT3904_NL_SOT23-3 2 5 C 2K_0402_1% R915 R917 10K_0402_5% 1 1 R918 10K_0402_5% R677 1K_0201_5% @ 2 2 1 D 1 to SOC (1.22V) to HDMI CONN PCA9306DCUR_VSSOP8 (5V) Check SMBUS pull high vaule C HDMI 5V protection and connector C HDMI ESD protection EMC@ +V5S U34 VOUT 1 3 9 1 HDMI_CLK_DN 8 2 HDMI_CLK_DN HDMI_DATA0_DN 7 4 HDMI_DATA0_DN HDMI_DATA0_DP 6 5 HDMI_DATA0_DP 2 HDMI_CLK_DP +V_5P00_HDMI_CONN 1 VIN GND D39 HDMI_CLK_DP C475 1U_0402_6.3V6K 3 TVWDF1004AD0_DFN9 2 APL3517AI-TRG_SOT23-3 JHDMI1 SDA_HDMI_CONN SCL_HDMI_CONN 5 5 5 B HDMI_CLK_DN HDMI_CLK_DP HDMI_DATA0_DN 5 5 HDMI_DATA0_DP HDMI_DATA1_DN 5 5 HDMI_DATA1_DP HDMI_DATA2_DN 5 HDMI_DATA2_DP HDMI_CLK_DN HDMI_CLK_DP HDMI_DATA0_DN HDMI_DATA0_DP HDMI_DATA1_DN HDMI_DATA1_DP HDMI_DATA2_DN HDMI_DATA2_DP HDMI_HPD_CONN 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CONN@ +5V SDA SCL DDC/CEC_GND CEC CKCK_Shield CK+ D0GND3 D0_Shield GND2 D0+ GND1 D1GND0 D1_Shield D1+ D2D2_Shield D2+ Utility HP_DET EMC@ 23 22 21 20 D40 HDMI_DATA2_DN 9 1 HDMI_DATA2_DN HDMI_DATA2_DP 8 2 HDMI_DATA2_DP HDMI_DATA1_DP 7 4 HDMI_DATA1_DP HDMI_DATA1_DN 6 5 HDMI_DATA1_DN B 3 TVWDF1004AD0_DFN9 BELLW_80082-4021 A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 HDMI Cheetah_CT LA-A411P_R01 Wednesday, February 27, 2013 1 Sheet 14 of 32 Rev 0.1 5 4 3 2 1 2M front Camera +V_2P80_VPROG2 L10 2 1 BLM18PG121SN1D_0603 D 1 C478 10P_0201_50V8J +AVDD_2.8V_2M JFCAM1 CONN@ 1 C479 0.1U_0201_10V6K 2 2 5 +V_1P80_VCCAON C476 10P_0201_50V8J C477 0.1U_0201_10V6K 2 CAM_1_PWRDWN 5 CAM_1_PWRDWN 5 MCSI_1_CLK_DP MCSI_1_CLK_DP 5 MCSI_1_DATA_DN MCSI_1_DATA_DN 1 L9 2 1 BLM18PG121SN1D_0603 1 I2C_4_SDA I2C_4_SDA +VDDIO_1.8V C485 10P_0201_50V8J 1 1 3 5 7 9 11 13 15 17 19 21 1 3 5 7 9 11 13 15 17 19 21 D 2 4 6 8 10 12 14 16 18 20 GND GND 2 2 2 4 6 8 10 12 14 16 18 20 +AVDD_2.8V_2M +VDDIO_1.8V CSB_SNSCLK2 CAM_1_RST_N CSB_SNSCLK2 CAM_1_RST_N MCSI_1_CLK_DN MCSI_1_DATA_DP 5 MCSI_1_CLK_DN MCSI_1_DATA_DP I2C_4_SCL I2C_4_SCL 1 5 5 1 C518 10P_0201_50V8J 22 23 2 C519 10P_0201_50V8J 2 HRS_FH35C-21S-0P3SHW(50) RF request 0221 25 5 RF request 0222 RF request 0221 2M rear Camera +V_2P80_VPROG1 L26 2 1 BLM18PG121SN1D_0603 C 1 C616 10P_0201_50V8J +AVDD_2.8V_8M C 1 C614 0.1U_0201_10V6K 2 2 JRCAM2 CONN@ +V_1P80_VCCAON MCSI_4_DATA0_DN MCSI_4_DATA0_DN 5 MCSI_4_CLK_DP MCSI_4_CLK_DP 5 L27 2 1 BLM18PG121SN1D_0603 1 C613 10P_0201_50V8J 5 CAM_0_PWRDWN 5 I2C_1_SDA CAM_0_PWRDWN I2C_1_SDA +VCM_PWR 1 C615 0.1U_0201_10V6K 2 1 C520 10P_0201_50V8J 2 1 3 5 7 9 11 13 15 17 19 21 1 3 5 7 9 11 13 15 17 19 21 2 4 6 8 10 12 14 16 18 20 GND GND 2 4 6 8 10 12 14 16 18 20 MCSI_4_DATA0_DP MCSI_4_CLK_DN MCSI_4_DATA0_DP MCSI_4_CLK_DN I2C_1_SCL CAM_0_RST_N CSB_SNSCLK1 +VCM_PWR +AVDD_2.8V_8M 5 5 I2C_1_SCL CAM_0_RST_N CSB_SNSCLK1 25 1 22 23 C521 10P_0201_50V8J 2 5 5 1 C522 10P_0201_50V8J 2 2 HRS_FH35C-21S-0P3SHW(50) RF request 0221 RF request 0222 RF request 0223 Rear Camera LED Front Camera LED +V_1P80_VCCAON 3 1 1 S 2 CAM_1_PWRDWN S LED LTW-C193TS5 0603 WHITE D S TR DMG2301U-7 1P SOT23-3 3 1 CAM_1_PWRDWN_3P3 3 Q17 2 G S TR BSS138W 1N SOT-323-3 Q18 1 R1100 2 300_0402_1% S 1 2 S LED LTW-C193TS5 0603 WHITE . 1 2 D Q10 2 G 1 2 2 S S TR BSS138W 1N SOT-323-3 Q9 CAM_0_PWRDWN_3P3 D 1 FRONTCAM_LED# 100K_0201_5% 2 S 1 G 3 R683 10K_0201_5% 1 +V3.3S LED3 G R1096 1 2 300_0402_1% REARCAM_LED# 100K_0201_5% R682 2 +V3.3S LED2 R680 10K_0201_5% CAM_0_PWRDWN +V3.3S +V3.3S 1 +V_1P80_VCCAON R679 B 2 B D S TR DMG2301U-7 1P SOT23-3 A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Camera Rev Cheetah_CT LA-A411P_R01 0.1 Tuesday, February 26, 2013 1 Sheet 15 of 32 5 4 eMMC +V3.3A +V_2P85_EMMC1 3 R943 1 +V_2P85_U12_EMMC 2 0_0402_5% R832 1 2 1 +V_1P80_VCCAON 2.7~3.6V 2 0_0402_5% 1 C553 2 2 0.1U_0201_10V6K 1 22U_0603_6.3V6M C552 @ 2 1 C554 0.1U_0201_10V6K D 2 C556 1U_0201_6.3V6M @ M6 N5 T10 U9 VCCQ VCCQ VCCQ VCCQ VCCQ VCC VCC VCC VCC 16G eMSAM64G@ U20 eMSAM32G@ U20 eMHYN16G@ U20 S IC FL 64G KLMCG8GE4A-A001 FBGA169 ABO! S IC FL 32G KE4CN5B6A FBGA 169P ABO ! S IC FL 16G H26M52002EQR FBGA 169P ABO ! SA00005GT10 SA00006DY10 SA00006DW10 U5 EMMC_GPO_RST0 W6 EMMC_0_CLK_R EMMC_0_CMD 6 EMMC_GPO_RST0 R837 1 7 2 0_0201_5% EMMC_0_CLK 1 CLK DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 VDDi AA6 AA4 Y5 Y2 K4 32G EMMC_0_CMD EMI request 11/29 RST_n KLMCG8GE4A-A001_FBGA169 64G W5 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC 2 H3 H4 H5 J2 J3 J4 J5 J6 EMMC_0_DATA0 EMMC_0_DATA1 EMMC_0_DATA2 EMMC_0_DATA3 EMMC_0_DATA4 EMMC_0_DATA5 EMMC_0_DATA6 EMMC_0_DATA7 EMMC_0_DATA0 EMMC_0_DATA1 EMMC_0_DATA2 EMMC_0_DATA3 EMMC_0_DATA4 EMMC_0_DATA5 EMMC_0_DATA6 EMMC_0_DATA7 6 XEMC@ C566 68P_0201_25V8 6 6 6 6 6 6 6 6 K2 2 U1 U2 U3 U6 U7 U10 U12 U13 U14 V1 V2 V3 V12 V13 V14 W1 W2 W3 W7 W8 W9 W10 W11 W12 W13 W14 Y1 Y3 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 AA1 AA2 AA7 AA8 AA9 AA10 AA11 AA12 AA13 AA14 AE1 AE14 AG2 AG13 AH4 AH6 AH9 AH11 1 C555 0.1U_0201_10V6K C 1 2 B C557 1U_0201_6.3V6M @ VSS VSS VSS VSS 1 B CMD U8 R10 P5 M7 C NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC VSSQ VSSQ VSSQ VSSQ VSSQ U20 @ A4 A6 A9 A11 B2 B13 D1 D14 H1 H2 H6 H7 H8 H9 H10 H11 H12 H13 H14 J1 J7 J8 J9 J10 J11 J12 J13 J14 K1 K3 K5 K7 K8 K9 K10 K11 K12 K13 K14 L1 L2 L3 L4 L12 L13 L14 M1 M2 M3 M5 M8 M9 M10 M12 M13 M14 N1 N2 N3 N10 N12 N13 N14 P1 P2 P3 P10 P12 P13 P14 R1 R2 R3 R5 R12 R13 R14 T1 T2 T3 T5 T12 T13 T14 K6 W4 Y4 AA3 AA5 D V4.41 eMKIN32G@ U20 A A S IC FL 32G KE4CN5B6A FBGA 169P ABO ! V4.5 SA00006DZ10 eMHYN32G@ U20 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. S IC FL 32G H26M64003DQR FBGA 169P ABO ! SA000068C20 Date: 5 4 3 2 eMMC Cheetah_CT LA-A411P_R01 Wednesday, February 27, 2013 1 Sheet 16 of 32 Rev 0.1 5 4 3 2 1 Micro SD D D Micro SD power supply circuit +V_2P85_1P80_SD +V_2P85_1P80_VCCSDIO U27 VOUT 5 VIN 1 GND 4 R892 100K_0201_5% D Q5 S TR BSS138W 1N SOT-323-3 S VGS th 0.5~1.5V 1 2 C570 1 2 C571 1 2 C572 C 2 1 @ R895 10K_0201_5% C APL3511DBI-TRG_SOT23-5 3 1 2 G STIO_0_PWR 3 0.1U_0201_10V6K STIO_0_PWR uSD_PWR_EN 2 0.1U_0201_10V6K 2 OCB 4.7U_0402_6.3V6M 1.8V 7 EN# 1 +V_2P85_1P80_SD +V_2P85_1P80_SD +V_1P80_VCCAON 1 1 EMI request 11/29 6 6 6 6 STIO_0_CD_N STIO_0_DATA1 STIO_0_DATA0 6 6 6 STIO_0_CMD STIO_0_DATA3 STIO_0_DATA2 1 2 2 C89 1U_0402_6.3V6K EMC@ C568 10P_0201_50V8J Normal open type JSD1 10 9 8 7 6 5 4 3 2 1 STIO_0_CLK 1 2 STIO_0_CLK 10K_0201_5% 2 STIO_0_DATA0 10K_0201_5% 2 STIO_0_DATA1 10K_0201_5% 2 STIO_0_DATA2 10K_0201_5% 2 STIO_0_DATA3 10K_0201_5% 2 1 R935 1 R936 1 R937 1 R938 1 R939 B 2 +V_2P85_1P80_SD 2 R29 40.2K_0402_1% C88 10U_0603_6.3V6M 1 R22 10K_0402_5% 0205 CONN@ DET TERM (GND) SWITCH TERM CD DAT1 DAT0 VSS G1 CLK G2 VDD G3 CMD G4 CD/DAT3 G5 DAT2 B 11 12 13 14 15 for ESD Request 2 D6 XEMC@ TVNST52302AB0_SOT523-3 SCA00001W00 3 1 2 D5 XEMC@ TVNST52302AB0_SOT523-3 SCA00001W00 3 1 2 D4 XEMC@ TVNST52302AB0_SOT523-3 SCA00001W00 3 1 TVNST52302AB0_SOT523-3 SCA00001W00 2 D3 XEMC@ 1 3 SP07000US00 for Intel Request A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 uSD Rev Cheetah_CT LA-A411P_R01 0.1 Wednesday, February 27, 2013 1 Sheet 17 of 32 5 4 3 2 1 Internal USB ULPI-0_USB2.0 PHY +V_1P80_VCCAON ULPI0_CS_R R764 1 2 10K_0201_5% @ U17 2 0_0201_5% TP_ULPI0_SOF USB_ULPI_0_REFCLK_R USB_PHY0_RST#_1P8 ULPI0_CS_R F6 F5 C4 B3 TP1312 6 USB_ULPI_0_REFCLK 7 6 6 6 6 ULPI0_CS USB_ULPI_0_DIR USB_ULPI_0_NXT USB_ULPI_0_STP USB_ULPI_0_CLK R768 1 2 0_0201_5% R769 1 R770 R771 R772 R773 1 1 1 1 2 2 2 2 0_0201_5% 0_0201_5% 0_0201_5% 22_0201_5% USB_ULPI_0_DIR_R USB_ULPI_0_NXT_R USB_ULPI_0_STP_R USB_ULPI_0_CLK_R E5 D5 D6 A4 R774 R775 R776 R778 R779 R780 R781 R782 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 22_0201_5% 22_0201_5% 22_0201_5% 22_0201_5% 22_0201_5% 22_0201_5% 22_0201_5% 22_0201_5% USB_ULPI_0_DATA0_R USB_ULPI_0_DATA1_R USB_ULPI_0_DATA2_R USB_ULPI_0_DATA3_R USB_ULPI_0_DATA4_R USB_ULPI_0_DATA5_R USB_ULPI_0_DATA6_R USB_ULPI_0_DATA7_R B1 A1 A2 A3 A5 A6 B6 C6 CHRG_DET CHRG_POL CHRG_EN_N CS_N SOF REFCLK RESET_N cS FAULT PSW VBUS ID DM DP DIR NXT STP CLOCK GND GND GND NC 6 6 6 6 6 6 6 6 USB_ULPI_0_DATA0 USB_ULPI_0_DATA1 USB_ULPI_0_DATA2 USB_ULPI_0_DATA3 USB_ULPI_0_DATA4 USB_ULPI_0_DATA5 USB_ULPI_0_DATA6 USB_ULPI_0_DATA7 DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 REG1V5 REG3V3 (E)CFG VDDIO VDDIO VBAT F2 F1 E1 USB_ULPI_0_CHG_DET# CHRG_POL CHRG_EN# R765 1 R766 1 R767 1 E2 D4 @ 2 0_0201_5% 2 0_0201_5% 2 0_0201_5% PMIC_USB_DCP# ULPI0_OC# PHY0_PSW F4 D3 C1 D1 R783 1 2 ULPI0_OC# PHY0_PSW 26 D 7 29 +V_1P80_VCCAON +V_5P00_USB 0_0201_5% USB20_DN USB20_DP 1 C3 R784 2.2K_0201_1% E4 D2 C5 2 D C2 USB_PHY0_RST#_1P8 E6 E3 B4 1 C527 1 C528 R777 1 VDD18_USB_ULPI_0 VDD33_USB_ULPI_0 B2 B5 F3 2 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 0_0201_5% 2 +V_1P80_VCCAON 1 +V3.3A 1 TUSB1211A1ZRQR_TFBGA36 2 2 C530 0.1U_0201_10V6K 2 C529 0.1U_0201_10V6K C C USB power switch +V5A 1 1 R785 100K_0402_5% PHY0_PSW# EN Input Threshold 1.4~1.8V @ Vin=5V 1 R795 100K_0201_5% ULPI0_OC# G547I2P81U_MSOP8 Q6 S TR BSS138W 1N SOT-323-3 3 B D 2 G PHY0_PSW +V_1P80_VCCAON 2 2 +V_5P00_USB 20121116 change RDS on = 70m U32 1 8 2 GND VOUT 7 3 VIN VOUT 6 4 VIN VOUT 5 EN FLG USB power switch (LOW active) S VGS th 0.5~1.5V USB connector B Micro-B type conn +V_5P00_USB JUSB1 1 1 2 4 3 2 3 1 USB20_DN_L 2 USB20_DP_L WCM2012F2S-900T04_0805 1 2 0_0402_5% R6 EMC@ 1 2 2 1 C81 USB20_DN_L 2 USB20_DP_L 3 4 5 CONN@ VBUS GND DGND D+ GND ID GND 6 7 8 9 GND ACON_MUC84-558702 2 XEMC@ 3 4 L3 100U_1206_6.3V6M USB20_DP 1 EMC@2 0_0402_5% C150 10U_0603_6.3V6M USB20_DN 1 1U_0402_6.3V6K C112 R5 1 XEMC@ D50 TVNST52302AB0_SOT523-3 The ID pin on a Micro-A plug shall be connected to the GND pin. The ID pin on a "Micro-B" plug is not connected or is connected to ground by a resistance of greater than Rb_PLUG_ID (100k? MIN). An OnThe-Go device is required to be able to detect whether a Micro-A or Micro-B plug is inserted by determining if the ID pin resistance to ground is less than Ra_PLUG_ID (10? MAX) or if the resistance to ground is greater than Rb_PLUG_ID . Any ID resistance less than Ra_PLUG_ID shall be treated as ID = FALSE and any resistance greater than Rb_PLUG_ID shall be treated as ID = TRUE. A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 A ULPI_0 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 18 of 32 Rev 0.1 5 4 VBAT_IN SR_PA_OUT VDD_WL_PA_A_MODE VDDIO_RF VDD_BT_PA VDD_WL_PA CBUCK_OUT VOUT_2P5_IN VOUT_2P5_OUT VIN_LDO VDD_LN_IN VDD_LN_OUT VDD1P2_CLDO_OUT VDD_CORE VDDIO D +VBATA 3 Power supply for Internal Regulators Power supply out from internal LDO Power supply for internal Power amplifier I/O power supply for RF front-end Power supply for BT PA Power supply for WLAN PA driver Power supply for Internal CLDO/LDO1 Power supply for FM Power supply from internal LDO Power supply to internal Regulator Power supply for Noise Sensitive Block (AFE,PLL…) Power supply for Noise Sensitive Block (AFE,PLL…) Power supply from Internal CLDO Power supply for Core Voltage I/O power supply for BT/FM/GPIO +VBATA_WL +VBATA +VDD_WL_PA +V_1P80_VCCAON 2 2.3~4.8V 3.3V 2.3~5.5V 3.3V 3.3V 2.3~5.5V 1.35~2V 2.5V 2.5V 1.5V 1.14~1.26V 1.14~1.26V 1.14~1.26V 1.14~1.26V 1.2~2.9V WL_SHUTDOWN#_RST# 1 BT_SHUTDOWN# BT_RST# H H H H H L WL off/BT on L H H WL off/BT off L L L AW-NH660 WL on/BT on WL on/BT off D +WLAN_1V8 SR_PA_OUT 2 2 C40 2 1 2 1 C16 1U_0402_6.3V6K 2 C41 EMC@ 1 2 0_0402_5% 1 C114 1 C113 1U_0402_6.3V6K 2 VDD1P2_CLDO_OUT VOUT_2P5 2 R92 2 C42 EMC@ 1 2 VDD_LN_OUT 1 10P_0402_50V8J C9 1U_0402_6.3V6K 1 C15 4.7U_0402_6.3V6M 1 2 0_0402_5% R13 10P_0402_50V8J 1 EMC@ 1 4.7U_0402_6.3V6M 1 C8 10P_0402_50V8J 2 0_0402_5% 4.7U_0402_6.3V6M 1 R14 1 C105 4.7U_0402_6.3V6M 2 1 C111 0.1U_0201_10V6K 2 close to module (A3) 2 close to module (H2) 1 C103 1U_0402_6.3V6K 1 C107 4.7U_0402_6.3V6M 2 close to module (B3,B4) C110 4.7U_0402_6.3V6M 2 close to module (C2) close to module (D1) C C VIN_LDO SR_PA_OUT 1 S COIL 2.2UH +-20% HPC252012NF-2R2M 1.3A 2 CBUCK_OUT 1 VIN_LDO L4 C104 10U_0402_6.3V6M +VBATA_WL +VDD_WL_PA VDD1P2_CLDO_OUT VIN_LDO +WLAN_1V8 close to module (B1) CBUCK_OUT +WLAN_1V8 2 WLAN strapping option WL_GPIO_6 = 0 for SDIO mode 2 R692 200K_0201_5% @ 1 R16 7 R15 R18 COMBO_WLAN_EN 5 WLAN_BT_WAKE# 0_0201_1% 0_0201_1% JP3 3 @ MURAT_MM8030-2600B CONN@ @ D2 F6 @ E3 G7 WL_UART_TX WL_UART_RX RF_WiFi_BT_Main1 2 R103 1 0_0402_5% GND R98 2 1 0_0402_5% 1 2 R100 1 0_0402_5% GND IN R99 0_0402_5% 2 1 2 R97 1 0_0402_5% 4 OUT 1 WL_SHUTDOWN#_RST# 1 WLAN_BT_WAKE#_R 26 R39 SLP_CLK2 2 1 0_0402_5% WL_RTC_CLK H4 J7 H6 D3 BT_I2S_DI BT_I2S_DO BT_I2S_WS BT_I2S_SCK FM_AUDIO_L FM_AUDIO_R 1 R91 10K_0201_5% @ 2 R90 10K_0201_5% @ 2 2 CBUCK_OUT SR_PA_OUT VDD1P2_CLDO_OUT VIN_LDO VDD_LN_IN VDD_LN_OUT VDD_BT_PA VDDIO 1 C1 J3 C2 B9 G9 H2 A2 HSIC_DATA HSIC_STROBE A5 A6 COMBO_BT_WAKEUP COMBO_UART_WAKE COMBO_BT_RESET# H3 J2 HSIC_DATA HSIC_STROBE T1@ T2@ A8 A7 B RF request 1203 I2S_1_CLK_R on SOC side BT_PCM_SYNC BT_PCM_CLK BT_PCM_IN BT_PCM_OUT WL_GPIO_1 WL_GPIO_2 WL_GPIO_5 WL_GPIO_6 BT_DEVICE_WAKE BT_HOST_WAKE BT_RST# BT_SHUTDOWN# WL_SHUTDOWN#_RST# WL_HOST_WAKE BT_UART_RTS# BT_UART_CTS# WL_UART_TX WL_UART_RX BT_UART_TXD BT_UART_RXD VOUT_2P5_OUT VOUT_2P5_IN ANT_MAIN_EN ANT_2G4 ANT_AUX_EN RTC_CLK NC NC G4 F5 F4 G5 C8 B7 C4 C3 I2S_1_FS_R R86 2 1 0_0201_1% I2S_1_TXD_R I2S_1_RXD_R R88 2 R89 2 1 0_0201_1% 1 0_0201_1% 1 BT_WAKE_R COMBO_UART_WAKE_R 1 1 BT_RST#_R 1 BT_SHUTDOWN#_R 2 2 2 2 0_0201_1% 0_0201_1% 0_0201_1% 0_0201_1% E7 F7 UART_0_CTS_R UART_0_RTS_R 1 1 2 2 0_0201_1% 0_0201_1% R41 R21 F8 E8 UART_0_RX_R UART_0_TX_R 1 1 2 2 0_0201_1% 0_0201_1% R40 R24 B3 B4 I2S_1_FS EMI request 11/29 5 I2S_1_CLK I2S_1_TXD I2S_1_RXD R45 R17 R19 R84 5 COMBO_BT_WAKEUP 7 COMBO_UART_WAKE 25 COMBO_BT_RESET# 6 BT_SHUTDOWN# UART_0_CTS UART_0_RTS 7 7 UART_0_RX UART_0_TX 7 7 2 R693 5 XEMC@ C567 68P_0201_25V8 5 BT_SHUTDOWN# 1 @ 200K_0201_5% 7 +WLAN_1V8 VOUT_2P5 H8 D9 From PMIC (32.768kHz) GND2 3 1 CAN4311712112453K_3P @ @ 1 AW-NH660_81 GND1 Feed GND2 BT_WAKE : Host to Device indicating that Host requires attention. BT_HOST_WAKE : Device to Host indicating that BT device requires attention. BT_SHUTDOWN# : (OR-Gate with WL_SHUTDOWN#_RST#) To decide whether or not to power down Int. regulator 2 BT_RST# : Low Asserting Reset for Bluetooth /FM Core. 3 BT_SHUTDOWN# connect to SoC GP_Core , confirm with SW later CAN4311712112453K_3P Ground Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 4 3 2 JANT2 I-PEX_20429-001E CONN@ ANT2 A1 A4 A9 B2 B5 B8 C5 C9 D4 D8 E1 E5 E9 F9 G6 G8 H5 H7 J1 J4 J5 J6 J8 J9 R104 0_0402_5% 2 1 2 R106 1 0_0402_5% Feed 2 2 R105 1 0_0402_5% GND1 4 3 2 1 Ground JANT1 I-PEX_20429-001E CONN@ ANT1 A GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 1 @ 2 R61 1 0_0402_5% 2 R62 1 0_0402_5% @ 2 E6 E4 D6 C6 debug COMBO_WLAN_EN check with SW R42 0_0402_5% 2 1 2 2 WL_GPIO_1 debug WL_GPIO_2 WL_GPIO_5 1 WL_GPIO6 0_0402_5% R87 10K_0201_5% @ ANT_FM_RX ANT_FM_TX 1 D7 D5 C7 B6 B SDIO_CLK_SPI_CLK SDIO_CMD_SPI_DI SDIO_DATA0_SPI_DO SDIO_DATA1_SPI_IRQ SDIO_DATA2_SPI_NC SDIO_DATA3_SPI_CS VDD_WL_PA G1 G3 F2 F1 G2 F3 STIO_1_CLK_R STIO_1_CMD_R STIO_1_DATA0_R STIO_1_DATA1_R STIO_1_DATA2_R STIO_1_DATA3_R VBAT_IN 1 1 1 1 1 1 VDDIO_RF 2 2 2 2 2 2 +WLAN_1V8 1205 RF request 2 WL_GPIO_1 WL_GPIO_2 WL_GPIO_5 WL_UART_TX WL_UART_RX T3 T4 T5 T6 T7 0_0201_1% 0_0201_1% 0_0201_1% 0_0201_1% 0_0201_1% 0_0201_1% VDD_WL_PA_A_MODE @ @ @ @ @ R69 R71 R70 R73 R66 R78 STIO_1_CLK STIO_1_CMD STIO_1_DATA0 STIO_1_DATA1 STIO_1_DATA2 STIO_1_DATA3 VDD_CORE 6 6 6 6 6 6 H9 U153 FOR DEBUG ONLY PAD PAD PAD PAD PAD E2 @ C25 18P_0201_50V8J H1 1 B1 A3 D1 STIO_1_CLK 1 11/26 add for RF 2 2 VDD_LN_OUT 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 WLAN/BT Cheetah_CT LA-A411P_R01 Wednesday, February 27, 2013 1 Sheet 19 of 32 Rev 0.1 A 5 4 3 2 1 Sensor Hub GPIO level shift +V_1P80_VCCAON +V_1P80_VCCAON +V3.3A A1 B1 TO sensor hub (3.3V) VCCA B1 A1 B2 A2 GND 1 2 2 2 VCCB D D2 SENSOR_HUB_RST# Q14 25 6 D1 SENSOR_HUB_INT SENSOR_HUB_WAKE 25 C2 OE 1 SENSOR_HUB_WAKE_LS S TR BSS138W 1N SOT-323-3 TO SOC (1.8V) TO SOC (1.8V) 3 D A2 SENSOR_HUB_INT_LS C1 R926 10K_0201_5% R925 10K_0201_5% S SENSOR_HUB_RST#_LS 2 B2 @ R697 10K_0201_5% 2 @ R696 10K_0201_5% U13 G 2 @ R695 10K_0201_5% 2 @ R694 10K_0201_5% D 1 1 1 1 1 +V3.3A TO sensor hub (3.3V) TXS0102YZPR_DSBGA8 TXS0102 has internal pull high Sensor Hub I2C level shift Sensor Hub I2C pull up +V3.3A +V_1P80_VCCAON +V3.3A U12 1 2 22,5 I2C_5_SCL C 22,5 I2C_5_SDA I2C_5_SCL 3 I2C_5_SDA 4 GND EN VREF1 VREF2 SCL1 SCL2 SDA1 SDA2 8 R691 1 7 2 200K_0201_5% C486 1 6 I2C_5_SCL_LS_3P3 2 0.1U_0201_10V6K @ 2.2K_0402_5% 2 5 I2C_5_SDA_LS_3P3 2.2K_0402_5% TO SOC (1.8V) 2 R1051 1 2 2.2K_0402_5% SENSOR_SCL R1052 1 2 2.2K_0402_5% SENSOR_SDA 1 R1056 1 R1055 C TO sensor hub (3.3V) PCA9306DCUR_VSSOP8 pull up at SOC side TO sensors (3.3V) Sensor Hub RST circuit Sensor Hub circuit +V3.3A +V3.3A 2 0_0402_5% C705 0.1U_0402_16V4Z SENSOR_HUB_RST#_LS 1 SWDIO_SENSORHUB SWCLK_SENSORHUB TP18 TP19 PA10 PA11 PA12 SWDIO_SENSORHUB SWCLK_SENSORHUB TP6 TP7 TP8 SWDIO_SENSORHUB SWCLK_SENSORHUB For USB interface +V3.3A For F/W update used 25 25 7 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 2 1 C710 0.1U_0402_16V4Z C707 0.1U_0402_16V4Z 2 1 C708 1U_0402_6.3V6K 2 1 VBAT 36 48 VDD_3 24 PD0-OSC_IN PD1-OSC_OUT PC13-TAMPER-RTC PC14-OSC32_IN PC15-OSC32_OUT NRST 1 2 2 ACCEL_INT1 ACCEL_INT2 GYRO_INT1 GYRO_INT2 ACCEL_INT1 ACCEL_INT2 GYRO_INT1 GYRO_INT2 SENSOR_SCL SENSOR_SDA SENSOR_SCL SENSOR_SDA I2C_5_SCL_LS_3P3 I2C_5_SDA_LS_3P3 SENSOR_HUB_INT_LS PB13 MAG_DRDY ALS_INT 21 21 21 21 B 21 21 For slate TP17 MAG_DRDY 21 ALS_INT 21 mode 2 3 4 SENSHUB_BOOTS PAD 44 R1071 20K_0402_5% 49 VSS_3 47 VSS_2 35 VSSA 8 1 18 19 20 39 40 41 42 43 45 46 21 22 25 26 27 28 1 C711 12P_0201_50V8J 2 R1070 10K_0402_5% @ VDD_2 9 PB0 PB1 PB2 PB3 PB4 STM32F103CBU6TR_VFQFPN48 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 BOOT0 PA6 R1069 10K_0402_5% @ 2 R1068 10K_0402_5% @ 5 6 PA1 PA2 PA3 PA4 PA5 PA6 Y1204 12MHZ 12PF 5YEA12000122IFA2Q3 3 1 4 2 1 1 1 R1067 10K_0402_5% PA5 17 29 30 31 32 33 34 37 38 PA0-WKUP R1064 10K_0402_5% 2 2 2 R1063 10K_0402_5% PA4 SENSOR_RST#_R 1 1 1 1 R1066 10K_0402_5% @ R1062 10K_0402_5% 2 2 2 R1065 10K_0402_5% @ PA3 1 PA2 1 1 PA1 R1061 10K_0402_5% @ 2 2 2 R1060 10K_0402_5% 2 1 1 SENSHUB_XTALIN SENSHUB_XTALOUT R1059 10K_0402_5% 1 C706 0.1U_0402_16V4Z 2 for firmware update Sensor IC orentation turning 11 12 13 14 15 16 PA1 PA2 PA3 PA4 PA5 PA6 VDDA U39 B 303I 303M 303N 4200I 4200M 4200N 2 @ C709 0.1U_0402_16V4Z SENSOR_HUB_WAKE_LS 10 PA1 PA2 PA3 PA4 PA5 PA6 1 2 VDD_1 2 1 VSS_1 2 R1058 1 SENSOR_RST#_R 23 1 confirm timing R1057 100K_0402_5% C712 12P_0201_50V8J S IC STM32F103CBU6TRC42 VFQFPN HUB V1JV4 A A LSM303 X,Y,Z (I,M,N) about layout is (1,1,0) 3GD20 X,Y,Z (I,M,N) about layout is (1,1,1) Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title Camera/SensorHub/TouchBoard THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 20 of 32 Rev 0.1 5 4 3 2 1 GYROSCOPE Accelerometer & E-COMPASS D 2 +V3.3A C714 0.1U_0402_16V4Z 1 D 1 20 SENSOR_SCL 20 SENSOR_SDA SENSOR_SCL 2 SENSOR_SDA 3 4 5 +V3.3A 20 GYRO_INT2 GYRO_INT2 6 20 GYRO_INT1 GYRO_INT1 7 8 VDD_IO RES_1 SCL/SPC RES_2 SDA/SDI/SDO RES_3 SDO/SA0 RES_4 CS DRDY 1 +V3.3A U40 GND PLLFILT INT RES_5 RES_0 VDD C713 0.1U_0402_16V4Z 2 +V3.3A C715 10U_0402_6.3V6M 9 10 1 2 11 U41 12 1 13 C717 2 14 1 4.7U_0402_6.3V6M 6 PLLFILT 15 C7181 16 1 L3G4200DTR_LGA16_4X4 2 +V3.3A 1 C719 0.1U_0402_16V4Z 2 20 2 0.22U_0402_16V7K 8 9 10 11 MAG_DRDY MAG_DRDY 12 13 C720 10U_0402_6.3V6M 7 Vdd_IO Vdd C1 SDA SETP SETC SCL INT1 Reserved Reserved Reserved Reserved INT2 14 C716 0.1U_0402_16V4Z 1 2 3 SENSOR_SDA 2 SENSOR_SCL 5 ACCEL_INT1 4 ACCEL_INT2 ACCEL_INT1 20 ACCEL_INT2 20 GND LSM303DLHCTR_LGA14_3X5 1 C 1 2 C721 0.01U_0402_25V7K 2 PLLFILT_C 1 PLLFILT C 2 3G4200D need pop, 3GD20 can unpop R1074 10K_0402_5% C722 0.47U_0402_6.3V6K LIGHT SENSOR B B +V3.3A 1 R1075 10K_0402_5% 2 ALS_INT +V3.3A U42 20 ALS_INT ALS_INT 3 SENSOR_SCL 5 SENSOR_SDA 2 INT VDD SCLK SET SDAT GND 6 4 R1076 1 2 604K_0402_1% 1 1 CM3218A3OP-AD_OPLGA6_1P8X2P35 2 C723 0.1U_0402_16V4Z A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Sensor Rev Cheetah_CT LA-A411P_R01 0.1 Tuesday, February 26, 2013 1 Sheet 21 of 32 5 4 Codec input power CAP 3 2 1 Codec R699 1 +V_1P80_VCCAON 2 0_0201_5% +AVDD 1 2 1 C487 10U_0402_6.3V6M 2 C488 0.1U_0201_6.3V6K +V_1P80_VCCAON D D +V5A 2 0_0201_5% +DACREF C490 0.1U_0201_6.3V6K +DACREF 2 DMIC_DATA 1 4 +MICBIAS 2 0_0201_5% DMIC_DATA_R 5 R702 1 "MIC_DATA" pull up to "+MICBIAS" at "JWIN1" side 23 MIC_DATA 23 JACK_DET# 1 2 2 5 5 5 5 5 OSC_CLK_OUT_0 I2S_3_CLK I2S_3_FS I2S_3_TXD I2S_3_RXD R704 R705 R706 R708 R709 1 1 1 1 1 2 2 2 2 2 0_0201_5% 0_0201_5% 0_0201_5% 0_0201_5% 0_0201_5% MCLK BCLK1 LRCK1 DACDAT1 ADCDAT1 37 36 35 33 34 5 5 5 5 I2S_0_CLK I2S_0_FS I2S_0_TXD I2S_0_RXD R710 R711 R712 R713 1 1 1 1 2 2 2 2 0_0201_5% 0_0201_5% 0_0201_5% 0_0201_5% BCLK2 LRCK2 DACDAT2 ADCDAT2 30 29 31 32 1 2 C504 0.1U_0201_6.3V6K MICBIAS1 IN1P/DMIC1_DAT IN1N/DMIC2_DAT/JD1 IN2P IN2N/JD2 VREF2 VREF1 CPP2 CPN2 CPP1 CPN1 CPVPP CPVEE HPO_L HPO_R HPOFB MCLK BCLK1 LRCK1 DACDAT1 ADCDAT1 SPO_LP SPO_LN SPO_RP SPO_RN BCLK2 LRCK2 DACDAT2 ADCDAT2 MONOP MONON AGND DGND C503 10U_0402_6.3V6M 1 4.7U_0402_6.3V6M 1 4.7U_0402_6.3V6M C499 0.1U_0201_6.3V6K +V5A 1 2 1U_0201_6.3V6M C500 2 C502 2 1 C498 2.2U_0402_6.3V6M C 2 C494 1 MIC_DATA JACK_DET# 6 7 8 12 11 9 49 Codec output power CAP LOUTR LOUTL GPIO2/DMIC_SCL GPIO1/IRQ LDO1_IN SCL SDA 19 18 20 21 C495 1 2 2.2U_0402_6.3V6M C496 1 2 2.2U_0402_6.3V6M 24 27 CPVPP CPVEE C497 1 C501 1 28 26 25 HP_L HP_R HP_L HP_R 1 48 45 47 SPEAKER1+ SPEAKER1SPEAKER2+ SPEAKER2- 2 2.2U_0402_6.3V6M 2 2.2U_0402_6.3V6M 23 23 +V_1P80_VCCAON SPEAKER1+ SPEAKER1SPEAKER2+ SPEAKER2- 23 23 23 23 1 2 U14 C493 C492 0.1U_0201_6.3V6K DACREF AVDD MICVDD SPKVDDR SPKVDDL DCVDD DBCDD CPVDD 2 1 C491 10U_0402_6.3V6M 13 14 17 16 41 40 44 38 39 @ R714 10K_0201_5% C 2 4.7U_0402_6.3V6M 1 10 15 3 46 2 42 43 23 +MICBIAS +DCVDD 2 CPGND 2 1 C489 10U_0402_6.3V6M +AVDD +MICVDD 1 22 R956 1 DMIC_CLK_R I2S_INT#_R LDO1_IN I2C_5_SCL_AUD I2C_5_SDA_AUD R720 1 R715 1 2 0_0201_5% 2 0_0201_5% R717 1 R718 1 2 0_0201_5% 2 0_0201_5% DMIC_CLK I2S_INT# I2C_5_SCL I2C_5_SDA 25 20,5 20,5 S IC ALC5642-VF-CGT QFN 48P AUDIO CODEC +DCVDD +MICVDD 1 2 1 C505 2.2U_0402_6.3V6M 2 1 C506 0.1U_0201_6.3V6K 2 1 C507 2.2U_0402_6.3V6M 2 C508 0.1U_0201_6.3V6K B B LDO1 enable control GND & GNDA bridge Digital MIC Conn. LDO1 enable control for digital core power DCVDD Low: Disable High: Enable +V_1P80_VCCAON 1 CS DATA CLK ENHANCE GND DMIC_DATA 4 DMIC_CLK 2 5 R719 1 2 0_0201_5% R723 1 2 0_0201_5% R725 1 2 0_0201_5% LDO1_IN 3 1 VDD R716 100K_0201_5% @ D57 TVNST52302AB0 SOT523 XEMC@ 1 S MIC ST MP45DT02TR 2 2 R948 100K_0201_5% 2 6 @ 3 MIC1 1 +V_1P80_VCCAON A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 AUDIO CODEC Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 22 of 32 Rev 0.1 5 4 3 EC INT# level shift to SOC 2 1 EC I2C level shift to SOC +V_1P80_VCCAON EC_ DEBUG CONN +V3.3A +EC_VCC JP2 +V_1P80_VCCAON 1 1 G 2 2 TO SOC 1.8V Q4 3 EC_INT# 1 24,29,5 I2C_2_SCL 24,29,5 I2C_2_SDA I2C_2_SCL 3 I2C_2_SDA 4 GND EN VREF1 VREF2 SCL1 SCL2 SDA1 SDA2 8 R698 1 7 S TR BSS138W 1N SOT-323-3 I2C_2_SCL_LS_3P3 5 I2C_2_SDA_LS_3P3 2 0.1U_0201_10V6K @ R1072 1 2 2.2K_0201_1% R1073 1 1 2 3 4 5 6 7 8 D 2 2.2K_0201_1% 9 10 TO EC 3.3V pull up at SOC side TO EC 3.3V 2 200K_0201_5% C511 1 6 EC_INT#_LS D EC_INT# S 7 2 R663 10K_0201_5% 2 R665 10K_0201_5% @ D 1 TO SOC 1.8V 1 2 3 4 5 6 7 8 KSO6 EC_EDI_DI EC_EDI_DO EC_EDI_CS EC_EDI_CLK EC_TXD EC_RXD U18 GND1 GND2 PCA9306DCUR_VSSOP8 ACES_50521-0084N-P01 CONN@ EC _ ENE IO3737 +EC_VCC +EC_VCC_R 1 2 0_0603_5% 2 C512 0.1U_0201_10V6K 2 2 R654 +V3.3S R1087 10K_0201_5% 1 1 R1077 10K_0201_5% C 1 2 0.1U_0201_10V6K 1 C514 R02 modify 1/3 24 24 to LED BLUE_LED# RED_LED# RESET# 8~16 mA 5V tolerance BLUE_LED# RED_LED# GREEN_LED# LS TO SOC I2C2 TO BAT , CHG 29 29 I2C_2_SCL_EC I2C_2_SDA_EC U154 17 36 9 26 13 14 15 16 I2C_2_SCL_LS_3P3 I2C_2_SDA_LS_3P3 32 31 I2C_2_SCL_EC I2C_2_SDA_EC 37 35 30 29 39 40 EC_INT#_LS 26,29 CHARGE_DISABLE_EC CHARGE_DISABLE_EC R729 1 2 0_0201_5% 2 1 18 4 19 VCC1 VCC2 AVCC PBIN/GPIO1C PBOUT/GPIO19 RESET# SPI_CLK/GPIO10 SPI_DO/GPIO11 SPI_DI/GPIO12 SPI_CS#/GPIO13 KSI4/EDI_CS/GPIO33 KSI5/EDI_CLK/GPIO34 KSI6/EDI_DI/GPIO00 KSI7/EDI_DO/GPIO01 RX/GPIO1D TX/GPIO1E KSO0/GPIO1F KSO3/GPIO22 KSO6/GPIO04 KSO16/CIRRX/GPIO18 CEC/GPIO17 SCL1/PS2_CLK3/GPIO36 SDA1/PS2_DAT3/GPIO35 DA0/GPO0E DA1/GPO0F SCL2/PS2_CLK2/GPIO2C SDA2/PS2_DAT2/GPIO2B AD0/GPI08 AD1/GPI09 PS2_CLK1/GPIO37 AD2/GPI0A PS2_DAT1/GPIO38 AD3/GPI0B SCL0/GPIO2E SDA0/GPIO2D PWM0/GPIO14 PWM1/GPIO07 PWM2/GPIO15 GND AGND THERMAL PAD 23 22 33 34 1 2 24 25 EC_EDI_CS EC_EDI_CLK EC_EDI_DI EC_EDI_DO EC_RXD EC_TXD 27 28 3 21 20 KSO6 C for update firmware 10 11 5 6 7 8 0_0201_5% 0_0201_5% 2 2 1 R727 1 R728 CHARGER_PWRGD_EC CHARGE_COMPLETE_EC 0_0201_5% 2 1 R730 CHG_INT#_EC CHARGER_PWRGD_EC 29 CHARGE_COMPLETE_EC 29 CHG_INT#_EC 29 for Charger control 38 12 41 IO3737UA0_QFN40_5X5 C515 0.1U_0201_10V6K @ B B 24,25 HOME_BUTTON# 22 22 22 22 SPEAKER2SPEAKER2+ SPEAKER1SPEAKER1+ CLIP11 HOLEA CLIP12 HOLEA 1 1 1 1 1 1 CLIP14 HOLEA 1 CLIP10 HOLEA 1 1 CLIP9 HOLEA 1 1 CLIP8 HOLEA SPEAKER2SPEAKER2+ SPEAKER1SPEAKER1+ H_2P0 H3 HOLEA H_2P0N H_2P0 H4 H5 HOLEA HOLEA FD2 1 H_2P0 H1 HOLEA 1 FD3 FD4 1 1 1 HOME_BUTTON# A CLIP6 HOLEA FD1 H_2P0 H2 HOLEA 1 JACK_DET# JACK_DET# CLIP5 HOLEA SCREW / FD 1 MIC_DATA JWIN1 CONN@ 18 16 G18 17 15 G17 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 HP_L HP_R 1 1 MIC_DATA CLIP4 HOLEA +CHGRTC 2 2 1 2 22 HP_L HP_R CLIP3 HOLEA R101 R7 100K_0402_5% 22 22 22 2.2K_0402_5% R724 10K_0201_5% CLIP2 HOLEA 1 +MICBIAS +V_1P80_VCCAON CLIP1 HOLEA 1 Shielding Clip HOME Key/SPK/Jack SUB Board Conn. A ACES_88512-01601-071 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title HOME CONN /SCREW/EC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: 5 4 3 2 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 23 of 32 Rev 0.1 5 4 3 Power SW +V3.3A 7 1 5 D7 TVNST52302AB0 SOT523 EMC@ 1 2 D2 D1 TOUCH_INT# TOUCH_INT# C2 to SOC B1 A2 B2 OE GND 1 2 VCCB A1 2 VCCA @ R707 10K_0201_5% A2 TOUCH_RST#_LS A1 TOUCH_INT#_LS B1 TXS0102YZPR_DSBGA8 TXS0102 has internal pull high +V3.3A +V_1P80_VCCAON 1 Volume button up / down 1 2 1 5 4 2 R94 VOL_UP#_R C27 2 1 1K_0402_1% 5 GPI_VOLUMEUP# GPI_VOLUMEUP# D8 10P_0402_50V8J 4 I2C_0_SDA SCL1 SCL2 SDA1 SDA2 R672 7 VREF2 1 C471 1 6 I2C_0_SCL_LS 5 I2C_0_SDA_LS R670 10K_0201_5% 2 200K_0201_5% @ 2 0.1U_0201_10V6K R671 10K_0201_5% 2 8 EN VREF1 3 I2C_0_SCL 25 5 GND 2 to SOC 2 U7 1 SW2 TAFG1-12WQR_3P 3 D to touch module Level shift for RST , INT 1 C516 0.1U_0201_10V6K 2 2 S TR BSS138W 1N SOT-323-3 6 3 TOUCH_RST# TOUCH_RST# B2 1 to SOC (1.8V) 2 PWRBTN_N_CN C1 4 D S 1 R891 2 1K_0201_5% PWRBTN_N 3 1 @ R685 10K_0201_5% U15 @ R688 10K_0201_5% 2 @ R703 10K_0201_5% SW1 TAFG1-12WQR_3P 2 2 2 R888 10K_0201_5% 1 1 1 26 G Q7 3 ACPI_PWR_BUTTON ACPI_PWR_BUTTON +V_1P80_VCCAON 1 1 2 PWRBTN_N R787 10K_0201_5% 1 R887 100K_0402_5% 5 TO Touch Board +VBATA 1 to pmic (VBATA) +V_1P80_VCCAON D 2 to touch module pull up to +V_1P80_VCCAON on SOC siede 2 PCA9306DCUR_VSSOP8 1 Level shift for I2C 3 TVNST52302AB0 SOT523 SW4 TAFG1-12WQR_3P JTCH1 2 R96 VOL_DOWN#_R 3 GPI_VOLUMEDOWN# GPI_VOLUMEDOWN# +V5A 25 I2C_0_SCL_LS I2C_0_SDA_LS contorler IC VBUS is 3V rail 10P_0402_50V8J 5 C26 1 1 1K_0402_1% TOUCH_RST#_LS TOUCH_INT#_LS 3 2 2 1 2 3 4 5 6 7 8 9 10 GND GND XEMC@ D53 To touch control connector +V5A 2 U16 4 EN_FSTK EN_FSTK +V3.3A 26 VDD 2 R900 10K_0201_5% MC74VHC1G08DFT2G_SC70-5 1 2 Q13 S TR BSS138W 1N SOT-323-3 B +V_1P80_VCCAON Y A G 1 6 D 2 G 2 R102 LID_SW# LID_SW# 1 1K_0402_1% Q15 S TR BSS138W 1N SOT-323-3 3 GPI_VOLUMEUP# 3 1 C48 S 10P_0402_50V8J 2 U2 2 C47 0.1U_0402_16V4Z B 1 OUTPUT 1 S GPI_VOLUMEUP#_N B P 5 D 2 G 2 3 1 1 1 HOME_BUTTON# HOME_BUTTON#_N 1 2 (Hall Effect Switch) R788 100K_0402_5% 3 HOME_BUTTON# Lid Switch +V5A R786 100K_0402_5% 23,25 11 12 PANAS_AYF531035 CONN@ 1 for into recovery mode C GND 2 4 1 2 3 4 5 6 7 8 9 10 EMC@ 1 C S IC YB8203ST23 SOT-23 3P HALL SENSOR POWER LED Reserve PSS LED4 23 BLUE_LED# 23 RED_LED# PWR_LED# RED_LED# R1097 1 2 330_0402_1% R1099 1 2 330_0402_1% 2 BLUE_LED#_R 1 B +V3.3A +V_1P80_VCCAON 3 RED_LED#_R O @ LTST-S115KFTBKT-CA_AMBER-BLUE 1 2 C510 0.1U_0201_6.3V6K L30 4 RST switch 23,29,5 23,29,5 +CHGRTC I2C_2_SDA I2C_2_SCL DCI RF2P RF2N 5 3 I2C_2_SDA I2C_2_SCL @ SDA SCL RF1P 25,26,29 R722 1M_0402_5% 1 2 8 1 EXTRESET_N SW3 TAFG1-12WQR_3P EXTRESET_N GND RF1N TP1318 6 TP1319 1 TP1320 2 TP1321 A IPJ-P6001-Q2AT_XQFN8_1.6X1.6 29 1 5 4 2 3 BI D 3 A 7 S 2N7002K_SOT23-3 Q16 2 G Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 Title BTN/LED/Touch Board THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Cheetah_CT LA-A411P_R01 Date: 5 4 3 2 Tuesday, February 26, 2013 1 Sheet 24 of 32 Rev 0.1 5 4 3 2 1 +V3.3A ACER DEBUG SECONDARY JTAG U24 +V3.3A 1 2 2 1 XDPA@ C573 0.1U_0201_10V6K 2 XDPA@ C574 0.1U_0201_10V6K JDB2 XDP_PWRMODE_0 5 CLV_KBD_MKOUT4 XDP_PWRMODE_1_R XDP_PWRMODE_2_R TESTMODE_MUX PMIC_PWRGD_R XDP_PREQ_N_BUFF XDP_PRDY_N EXTRESET_N JTAG_TDO JTAG_TRST_N JTAG_TDI JTAG_TMS JTAG2_TDI JTAG2_TMS JTAG2_TDO SEC_JTAG_EN_N MPTI_HS_DATA3 MPTI_HS_DATA2 MPTI_HS_DATA1 MPTI_HS_DATA0 CLV_KBD_MKOUT4 26 TESTMODE_MUX 24,26,29 EXTRESET_N JTAG_TDO JTAG_TRST_N 7 JTAG_TDI 7 JTAG_TMS 7 7 5 6 6 6 6 JTAG2_TDO MPTI_HS_DATA3 MPTI_HS_DATA2 MPTI_HS_DATA1 MPTI_HS_DATA0 6 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 MPTI_HS_CLK MPTI_HS_CLK JTAG2_TCK 7 JTAG_TCK JTAG_TCK 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 15 15 3 6 10 13 CSB_SNSCLK1 CSB_SNSCLK2 12 DISP_CLKIN SPI_INT_N 1 15 SEC_JTAG_EN_N SPI_0_SDI_DEBUG SPI_0_SDO_DEBUG SPI_0_SS0_DEBUG SPI_0_CLK_DEBUG SPI_1_CLK SPI_1_SS0 SPI_1_SDI SPI_1_SDO SPI_1_SS1_DEBUG SPI_1_SS2_DEBUG_XDP SPI_1_SS3_DEBUG SPI_1_SS4_DEBUG SPI_INT_N FW_STRAP0_R UART_2_RX UART_2_TX SWDIO_SENSORHUB SWCLK_SENSORHUB PMIC_SPI_DEBUG PMIC_SPI_DBG_SS# PMIC_SPI_DBG_MOSI PMIC_SPI_DBG_MISO PMIC_SPI_DBG_CLK SPI_0_SDI_DEBUG SPI_0_SDO_DEBUG SPI_0_SS0_DEBUG SPI_0_CLK_DEBUG 11 11 11 11 1 D XDPA@ R875 10K_0201_5% R859 4.7K_0201_5% 3.3V SPI_1_CLK 5 SPI_1_SS0 5 SPI_1_SDI 5 SPI_1_SDO 5 SPI_1_SS1_DEBUG 11 SPI_1_SS2_DEBUG_XDP 11 SPI_1_SS3_DEBUG 11 SPI_1_SS4_DEBUG 11 SPI_INT_N 6 R927 1 XDPA@ 2 1K_0201_5% IA0 IB0 IC0 ID0 VCC YA YB YC YD IA1 IB1 IC1 ID1 SEL EN# GND 2 16 4 7 9 12 OSC_CLK_OUT_1 OSC_CLK_OUT_2 OSC_CLK_OUT_3 5 5 5 D 8 XDPA@ PI5C3257QEX_QSOP16 XDPA@ XDPA@ C563 0.1U_0201_10V6K CSB_SNSCLK1 R872 1 NO_XDPA@ 2 0_0201_5% OSC_CLK_OUT_1 CSB_SNSCLK2 R860 1 NO_XDPA@ 2 0_0201_5% OSC_CLK_OUT_2 DISP_CLKIN R949 NO_XDPA@ 1 2 0_0201_5% OSC_CLK_OUT_3 2 1 2 5 11 14 JTAG2_TDI JTAG2_TCK JTAG2_TMS 2 XDPA@ C569 0.1U_0201_10V6K 1 +V_2P85_1P80_VCCSDIO +V5A 1 +V_1P80_VCCAON LEVEL SHIFT ON DBG BD(1.2/1.8V) +V3.3A LEVEL SHIFT ON DBG BD(1.2/1.8V) UART_2_RX 6 UART_2_TX 7 SWDIO_SENSORHUB 20 SWCLK_SENSORHUB 20 PMIC_SPI_DEBUG 26,5 PMIC_SPI_DBG_SS# 26 PMIC_SPI_DBG_MOSI 26 PMIC_SPI_DBG_MISO 26 PMIC_SPI_DBG_CLK 26 1 XDPA@ FW_STRAP0 7 UART2 BPM SIGNALS sensor hub DB 2 5 11 14 XDP_BPM_0_N XDP_BPM_1_N XDP_BPM_2_N XDP_PRDY_N PMIC DB 3 6 10 13 23,24 HOME_BUTTON# 24 GPI_VOLUMEDOWN# 22 I2S_INT# 20 SENSOR_HUB_RST# XDP_BLK_DP XDP_BLK_DN HRS_DF40C-60DS-0P4V CONN@ 1 15 XDP_MUX_EN 2 C564 0.1U_0201_10V6K U25 IA0 IB0 IC0 ID0 VCC YA YB YC YD IA1 IB1 IC1 ID1 SEL EN# GND 16 4 7 9 12 CLV_KBD_DKIN0 CLV_KBD_DKIN1 CLV_KBD_DKIN2 CLV_KBD_MKIN5 5 5 5 5 8 XDPA@ PI5C3257QEX_QSOP16 C C XDP DEBUG +V_1P80_VCCAON XDP@ C576 0.1U_0201_10V6K +V_1P80_VCCAON 1 JXDP1 XDP_BPM_3_N 5 CLV_KBD_DKIN3 5 5 R882 1 XDP@ 2 0_0201_5% CLV_KBD_DKIN3 XDP_BPM_2_N R883 1 XDP@ R884 1 XDP@ 2 0_0201_5% XDP_BPM_3_N_R 2 0_0201_5% XDP_BPM_2_N_R XDP_BPM_1_N XDP_BPM_0_N R885 1 XDP@ R886 1 XDP@ 2 0_0201_5% XDP_BPM_1_N_R 2 0_0201_5% XDP_BPM_0_N_R R889 1 XDP@ R890 1 XDP@ CLV_KBD_MKIN3 CLV_KBD_MKIN2 CLV_KBD_MKIN3 CLV_KBD_MKIN2 XDP_C1_BPM_1_N XDP_C1_BPM_0_N B XDP_PWRMODE_0 26,5 CLV_KBD_MKOUT4 XDP_PWRMODE_1 XDP_PWRMODE_2 PMIC_PWRGD PMIC_PWRGD R904 1 XDP@ R919 1 XDP@ CLV_KBD_DKIN0 GPI_VOLUMEDOWN# NO_XDPA@ 2 0_0201_5% R863 1 CLV_KBD_DKIN1 I2S_INT# NO_XDPA@ 2 0_0201_5% R864 1 CLV_KBD_DKIN2 SENSOR_HUB_RST# NO_XDPA@ 2 0_0201_5% R865 1 CLV_KBD_MKIN5 1 XDP@ 2 XDP_PREQ_N_BUFF XDP_PRDY_N +V3.3A HOME_BUTTON# NO_XDPA@ 2 0_0201_5% R862 1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 2 0_0201_5% XDP_C1_BPM_3_N 2 0_0201_5% XDP_C1_BPM_2_N 2 0_0201_5% XDP_C1_BPM_1_N_R 2 0_0201_5% XDP_C1_BPM_0_N_R R893 1 XDP@ 2 1K_0201_5%XDP_PWRMODE_0_R R894 1 XDPA@ 2 1K_0201_5%XDP_PWRMODE_1_R R924 1 XDPA@ 2 1K_0201_5%XDP_PWRMODE_2_R R896 1 XDPA@ 2 1K_0201_5% PMIC_PWRGD_R JTAG_TCK 2 CONN@ GND0 OBSFN_A0 OBSFN_A1 GND2 OBSDATA_A0 OBSDATA_A1 GND4 OBSDATA_A2 OBSDATA_A3 GND6 OBSFN_B0 OBSFN_B1 GND8 OBSDATA_B0 OBSDATA_B1 GND10 OBSDATA_B2 OBSDATA_B3 GND12 PWRGOOD/HOOK0 HOOK1 VCC_OBS_AB HOOK2 HOOK3 GND14 SDA SCL TCK1 TCK0 GND16 GND1 OBSFN_C0 OBSFN_C1 GND3 OBSDATA_C0 OBSDATA_C1 GND5 OBSDATA_C2 OBSDATA_C3 GND7 OBSFN_D0 OBSFN_D1 GND9 OBSDATA_D0 OBSDATA_D1 GND11 OBSDATA_D2 OBSDATA_D3 GND13 ITPCLK/HOOK4 ITPCLK#/HOOK5 VCC_OBS_CD RESET#/HOOK6 DBR#/HOOK7 GND15 TD0 TRST# TDI TMS GND17 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 C575 0.1U_0201_10V6K 1 XDPA@ U26 2 5 11 14 XDP_BLK_DP XDP_PWRMODE_2 XDP_PREQ_N_BUFF 19 3 6 10 13 COMBO_UART_WAKE 24 20 GPI_VOLUMEUP# SENSOR_HUB_INT 1 15 XDP_MUX_EN IA0 IB0 IC0 ID0 VCC YA YB YC YD IA1 IB1 IC1 ID1 SEL EN# GND 2 16 C565 0.1U_0201_10V6K 4 7 9 12 CLV_KBD_MKIN6 CLV_KBD_MKOUT6 CLV_KBD_MKIN4 5 5 5 8 XDPA@ PI5C3257QEX_QSOP16 XDP_BLK_DP_R XDP_BLK_DN_R R897 1 XDP@ R898 1 XDP@ XDP_RESET_N R899 1 XDP@ 2 0_0201_5% XDP_BLK_DP 2 0_0201_5% XDP_BLK_DN TESTMODE_MUX 2 0_0201_5% EXTRESET_N JTAG_TDO JTAG_TRST_N JTAG_TDI JTAG_TMS FW_STRAP0_R B COMBO_UART_WAKE NO_XDPA@ 2 0_0201_5% R871 1 CLV_KBD_MKIN6 GPI_VOLUMEUP# NO_XDPA@ 2 0_0201_5% R867 1 CLV_KBD_MKOUT6 SENSOR_HUB_INT NO_XDPA@ 2 0_0201_5% R869 1 CLV_KBD_MKIN4 SAMTE_BSH-030-01-L-D-A DBG_CARD_PRSNT_N control circuits into debug board XDP_C1_BPM_1_N R873 1 XDP@ 2 0_0201_5% CLV_KBD_MKIN1 XDP_BLK_DN R874 1 XDPA@ 2 0_0201_5% CLV_KBD_MKIN7 XDP_PWRMODE_1 R877 1 XDPA@ 2 0_0201_5% CLV_KBD_MKOUT5 XDP_C1_BPM_0_N R876 1 XDPA@ 2 0_0201_5% CLV_KBD_MKIN0 CLV_KBD_MKIN1 5 CLV_KBD_MKIN7 5 CLV_KBD_MKOUT5 CLV_KBD_MKIN0 5 5 +V_1P80_VCCAON +V3.3A +V_1P80_VCCAON Q12 3 FW_STRAP0 D S XDPA@ R868 10K_0201_5% R870 1 S TR BSS138W 1N SOT-323-3 1 1 1 1 1 1 2 2 2 2 2 2 JTAG_TMS JTAG_TDI JTAG_TDO JTAG2_TMS JTAG2_TDI JTAG2_TDO R901 R902 R903 R932 R934 R940 JTAG_TCK JTAG_TRST_N JTAG2_TCK R911 1 XDPA@ 2 56_0402_5% R910 1 XDPA@ 2 56_0402_5% R942 1 XDPA@ 2 56_0402_5% XDPA@ XDPA@ XDPA@ XDPA@ XDPA@ XDPA@ 150_0402_5% 56_0402_5% 150_0402_5% 150_0402_5% 56_0402_5% 150_0402_5% A XDPA@ 2 0_0201_5% XDP_MUX_EN XDPA@ CLRP1 @ SHORT PADS Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2 1 1 2 G 2 1 A 2013./02/04 Deciphered Date 2014/04/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Debug Cheetah_CT LA-A411P_R01 Date: 5 4 3 2 Tuesday, February 26, 2013 1 Sheet 25 of 32 Rev 0.1 5 4 3 2 1 1 PMUX INPUT 2 PR1249 150K_0402_1% 1 +VBATA P 5 2 B PU20@ PR1231 Y A 1 1 2 Change pull high to +VBATA (2/6) 3 PR1253 30K_0402_1% BATT_ACOK BATT_ACOK H=>0.65*+VBATA L=>0.17*+VBATA PR1248 10K_0402_1% 51K_0402_1% PC1203 2.2U_0402_10V6M D 2 2 PR1257 2 @ 2 MC74VHC1G08DFT2G_SC70-5 1 1 2 100K_0402_1% 0_0201_5% 3 2 LTC015EUBFS8TL_UMT3F 1 PR1252 CHARGER_PWRGD 4 PQ1201 1 1 1 29 1 2 2 1 PR1260 100K_0402_1% PR1254 @ 100K_0402_1% 2 D 2 G 1 PR1250 51K_0402_1% PR1247 100K_0402_1% REGN +VBATA +V_1P80_VCCAON 1 PC1201 1U_0201_6.3V6M PU1201C 1 2 1 2 47K_0402_1%_NCP15WB473F03RC 2 PR2517 2 PR2516 2 2 100K_0201_1% PMIC_RESET# EXTRESET_N PROCHOT_N 24 7 25,5 PWRBTN_N THERMTRIP# PMIC_PWRGD @ PR1222 1 @ PR1223 1 TP1218 29 29 IBATTSENSEN IBAYTTSENSEP 19 SLP_CLK2 20_0201_5% 20_0201_5% SDWNB @ PR1227 1 @ PR1230 1 1 2 1 2 1 2 1 PR2515 Close PMIC PR1246 1 TP1217 5 24,25,29 7 BPTHERM @ PR1234 1 SYSTHERM0 SYSTHERM1 SYSTHERM2 SYSTHERM3 PR2514 Close SOC PC1209 1U_0201_6.3V6M +V_1P80_VCCAON 47K_0402_1%_NCP15WB473F03RC 2 1 1 1 1 2 PR1229 24.9K_0402_1% 47K_0402_1%_NCP15WB473F03RC Close LCD Panel PR1228 24.9K_0402_1% 47K_0402_1%_NCP15WB473F03RC PR2513 47K_0402_1% PR1226 24.9K_0402_1% 6 6 RTCXTALIN RTCXTALOUT 20_0201_5% 20_0201_5% 20_0201_5% H11 B10 C12 D12 F11 D11 E10 C11 E8 A12 B12 D13 C13 RTCXTALIN RTCXTALOUT Close Charger IC 9 9 9 9 G5 D4 J12 F14 C17 G4 H15 G6 B8 B9 D9 E9 SVID_CLKOUT SVID_CLKSYNC SVID_DOUT SVID_DIN TESTMODE_MUX# TP1220 TP1221 TP1222 TP1223 E13 F9 M4 L5 K5 RESETB EXTRESETB PROCHOTB SDWNB GPIO1LV7 PWRBTNB THERMTRIPB PWRGD ADCVDD BPTHERM SYSTHERM0 SYSTHERM1 SYSTHERM2 SYSTHERM3 IBATTSENSEN IBATTSENSEP GPADC8 RTCXTALIN RTCXTALOUT SLPCLK1 SLPCLK2 SVIDCLKIN SVIDCLKSYNCH SVIDDIN SVIDDOUT TESTMODE TESTVAN1 TESTVAN2 TESTDIG0 TESTDIG1 VEEPROG VSYS1 VSYS2 VSYS3 VBATTBKUP SPIVDD SPIMISO SPIMOSI SPICLK SPISSB SPIDEBUG SPIGND GND_ANA1 GND_ANA3 GND_ANA5 GND_ANA11 GND_ANA12 GND_DIG1 GND_DIG2 GND_DIG3 GND_DIG11 GND_DIG12 GND_DIG13 GND_GPIO0HV GND_GPIO1HV1 GND_GPIO1HV2 GND_PWM GND_ADC PMIC_SPI_DBG_CLK PMIC_SPI_DBG_SS# PMIC_SPI_DBG_MOSI PMIC_SPI_DBG_MISO N7 1 TP1209 2 V5A_EN PC1212 1U_0201_6.3V6M +VBATA 30 25 25 25 25 PC1213 1U_0201_6.3V6M +VBATA TP1216 N13 L4 D2 H6 PR1221 2 M13 PR1241 0_0201_5% M14 PM_SPI_0_SDI 1 2 K13 PM_SPI_0_SDO 1 PR1242 20_0201_5% L11 PM_SPI_0_CLK 1 PR1243 20_0201_5% L14 PM_SPI_0_SS0 1 2 N12 PR12440_0201_5% SPI_0_SDI SPI_0_SDO SPI_0_CLK SPI_0_SS0 1 0_0603_5% L12 D14 B11 E4 T11 R11 +CHGRTC +V_1P22_VCCAON 11,5 11,5 11,5 11,5 PC1208 1U_0201_6.3V6M PC1214 1U_0201_6.3V6M 1 MODEM_RSTB SDPBOOT USBDCPZ VOTG_CNTRL TP1207 PC1205 PC1206 PC1207 0.1U_0201_6.3V6K PR1225 24.9K_0402_1% PMIC_USB_DCP# ILIM +VBATA TP1206 0.1U_0201_6.3V6K PR1224 24.9K_0402_1% 1 E6 E14 A5 A3 20_0201_5% 20_0201_5% 1U_0201_6.3V6M 2 1 2 0_0201_5% SDPBOOT 18 PR1245 @ 10K_0201_1% 2 @ PR1220 1 20_0201_5% @ PR1237 1 @ PR1236 1 PWR_MUX_SEL 2 BATTID BATT_PSEL V_1P50_VREFBUFF +V_2P80_CORE B 29 2 20_0201_5% 2 200K_0402_1% @ PR1238 1 PMIC_OTG 1 CHARGE_DISABLE_EC Change Net name to CHARGE_DISABLE_EC 1/3 TP1215 PR1217 0_0201_5% 1 @ PR1218 1 PR1219 1 P12 R10 T9 P9 P10 U8 R7 R8 T8 R9 2 23,29 PMIC_CHARGE_COMPLETE VDD_GPIO0HV GPIO0HV0 GPIO0HV1 GPIO0HV2 GPIO0HV3 VDD_GPIO1HV GPIO1HV0 GPIO1HV1 GPIO1HV2 GPIO1HV3 1 29 27 @ BATTID Short to GND 1/3 0.47U_0402_10V4Z TP1210 TP1212 TP1214 24 VBUS CHRLED BATTID ACOK BCUDISCRIT BCUDISA BCUDISB CHGCOMP CHRDIS MBI MBI: 1.5V 31 13 2 BATT_ACOK C4 E11 F13 C5 G12 G13 H12 C3 D5 E12 PMIC_PANEL_EN 1 CHRLED 1 EN_FSTK PMIC_BACKLIGHT_EN V3.3S_EN 30 V5S_EN 30 TP1203 TP1205 2 CHR_LED# 2 0_0201_5% N4 N6 N5 P8 M6 L6 1 PC1204 29 @ PR1259 BACKLIGHTEN EXT3P3SVREN EXT5SVREN EXTVDD1FBEN EXTVDD1VREN PANELEN 2 @ 2 2 2 1U_0201_6.3V6M 1 0_0201_5% PWM0 PWM1 PWM2 DFLT_LOWBATTLS0 DFLT_LOWBATTLS1 DFLT_LOWBATT 1 PR1208 10K_0201_1% 1 2 PR1203 10K_0201_1% 2 2 PR1206 10K_0201_1% @ 1 1 1 1 2 PR1207 10K_0201_1% @ @ PR1258 2 0_0201_5% PWMVDD 2 intel request 0108 PC12021 TP1208 +V_5P00_USB PR1216 1 C15 F12 J11 B5 C6 D6 PWM0 DISP_SEC_BKLT_PWM PWM2 +V_1P80_VCCAON 1 2 0_0201_5% TP1202 TP1204 G14 J6 C8 M5 P7 U11 PR1233 @ 10K_0201_1% 2 @ PR1214 1 DISP_BRDG_PWM PMIC_SPI_DEBUG T10 T7 U7 25,5 B 1 12,13 PR1235 10K_0201_1% H14 G11 2 C14 2 @ PR1204 10K_0201_1% @ 2 PR1205 10K_0201_1% 2 PR1202 10K_0201_1% 2 2 PR1201 10K_0201_1% 1 1 1 C 1 C AGND_AVP_PMIC 1 +V_1P22_VCCAON +V3.3A 2 TESTMODE_MUX TESTMODE_MUX# D 2 PQ1205 @ NTS4001NT1G_SC70-3 G 3 25 1 1 2 PR1256 10K_0201_1% @ PR1255 10K_0201_1% @ S A A Security Classification Issued Date Compal Electronics, Inc. Compal Secret Data 2013./02/04 Deciphered Date 2014/04/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title PMIC (1 of 3) Size A1 Document Number 5 4 3 2 Rev Cheetah_CT LA-A411P_R010.2 Date: Tuesday, February 26, 2013 1 Sheet 26 of 32 5 4 3 2 1 +V_1P08_VCC 1 +V_1P80_AON PC1318 PC1302 1U_0201_6.3V6M PU1201B +V3.3A 2 U9 C VREF075 VREF126 VDDLP VMSIC VCC330VIN 1 2 U10 PC1315 K3 K1 PJ504 1 2 PC1317 1U_0201_6.3V6M 1 PC1301 1U_0201_6.3V6M 2 2 1 1 PC1316 1U_0201_6.3V6M 1 2 2 1 PC1326 2.2U_0402_6.3V6M PC1328 2.2U_0402_6.3V6M H4 F6 PC1314 PC1312 2.2U_0402_6.3V6M SNB5072AZNBR_NFBGA289 1 2 +V_3P30_VCC B6 2 1 +V3.3A 2 1 2 B4 2 VCC330 +V_2P80_VPROG2 E7 1 VPROG2FB LDOGND1P22 LDOAGND1P22 LDOGND3P0 LDOAGND3P0 GND_REFSYS 26 PC1313 2 LDOVIN1P22 V_1P50_VREFBUFF D7 2 +V_1P22_VCCAON VPROG2 PC1322 2.2U_0402_6.3V6M +V_2P80_VPROG1 C10 1 PC1311 4.7U_0402_6.3V6M VPROG1FB VCCA100VIN VCCSDIOVIN K2 1 1 K6 C7 B3 A14 H5 VPROG1 +V_2P80_CORE PC1310 2.2U_0402_6.3V6M C 2 2 A15 VREFBUF VCC108AS VCC108AON PC1306 2.2U_0402_6.3V6M E1 F5 1 1 2 +V_1P80_AON PC1329 2.2U_0402_6.3V6M VCORE Q122VIN Q180VIN PC1305 4.7U_0402_6.3V6M 2 C9 D1 PC1327 4.7U_0402_6.3V6M VCCSDIO VCCSDIOFB VEMMC1 VEMMC2 A8 C16 1U_0201_6.3V6M 1 +V_1P08_VCCAON VEMMC1VIN VEMMC2VIN D8 1 B14 C1 VCCA100 VCCA100AS 2 2 2 1 2 1 C2 D3 PC1325 2.2U_0402_6.3V6M VCC108FB VPROG1VIN VPROG2VIN PC1303 4.7U_0402_6.3V6M 2.2U_0402_6.3V6M A11 A10 2 +V_1P08_VCCAS D10 PC1331 A9 22U_0603_6.3V6M V_2P85_EMMC2 1 PC1321 1U_0201_6.3V6M PC1324 1U_0201_6.3V6M VCC108VIN +V_2P85_1P80_VCCSDIO A7 1 +V_1P80_AON 1 PC1323 4.7U_0402_6.3V6M A6 A4 2 B7 PC1320 4.7U_0402_6.3V6M 1 1 1 2 VCC108 TP1301 +V_1P22_VCCAON 2 1U_0201_6.3V6M 1 2 D10 A4 PC1308 PC1309 1U_0201_6.3V6M 2 1 1U_0201_6.3V6M 1U_0201_6.3V6M A6 A9 PC1304 PC1307 +V_1P00_VCCAS 2 +V_2P85_EMMC1 D +V_1P00_VCCA 10U_0402_6.3V6M +V3.3A 2 A6:0.1A,6mil,1via A4:0.1A,6mil,1via D10:0.4A,16mil,1via A9:0.4A,16mil,1via 1 1 2 10U_0402_6.3V6M D JUMP_43X39 @ AGND_AVP_PMIC PU1201D F8 F10 G7 G8 G9 G10 H3 H8 H9 H10 J1 J2 J3 J4 J5 J7 J8 J9 J10 J13 J14 K4 K7 K8 K9 K10 K11 K12 K14 K15 K16 K17 L1 L2 L3 L7 L8 L9 L10 L13 L15 L16 L17 B VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 PBKG1 PBKG2 PBKG3 PBKG4 PBKG5 PBKG6 PBKG7 PBKG8 M7 M8 M9 M10 M11 M12 N8 P11 B NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 A1 A2 B1 B2 A16 A17 B16 B17 T1 T2 U1 U2 T16 T17 U16 U17 F4 SNB5072AZNBR_NFBGA289 A A Compal Secret Data Security Classification Issued Date 2013./02/04 Deciphered Date 2014/04/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Size A2 Date: Compal Electronics, Inc. PMIC (2 of 3) Document Number Rev 0.2 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 27 of 32 5 4 3 2 1 D D +VBATA 0.1A ,10mil ,1via 1 A13 1 2 1 1 2 2 22U_0603_6.3V6M 1 DON,0.95V AON,1.25V C 2 1 PC1416 22U_0603_6.3V6M 1 2 1 2 2 1 1 PC1415 22U_0603_6.3V6M 9 PC1414 22U_0603_6.3V6M 9 VSSPUSENSE PC1413 22U_0603_6.3V6M VCCPUSENSE PC1412 22U_0603_6.3V6M 1 N10 3.5A ,140mil ,7via PC1411 22U_0603_6.3V6M N9 22U_0603_6.3V6M +V_VCC 20_0201_5% 0.47UH_MVLS-252012-R47M_2.2A_20% 2 0.47UH_MVLS-252012-R47M_2.2A_20% 2 0.47UH_MVLS-252012-R47M_2.2A_20% 2 0.47UH_MVLS-252012-R47M_2.2A_20% 2 2 @ PR1401 1 PL1406 1 PL1407 1 PL1408 1 PL1409 1 PC1418 2 1 2 22U_0603_6.3V6M 1 2 22U_0603_6.3V6M 1 2 22U_0603_6.3V6M 1 2 22U_0603_6.3V6M 1 2 22U_0603_6.3V6M 22U_0603_6.3V6M 2 PC1410 E5 E2 E3 F3 G3 +V_1P80_VCC PAD T1401 PC1426 PC1427 AON,1.836V PC1425 PR14031 2 0_0201_5% 1UH_PHI25201B-1R0MS_1.8A_20% 2 2 0_0201_5% 1 +V_VNNAON 0.2A ,10mil ,1via PC1430 4.7U_0402_6.3V6M PC1431 AON,0.95V +VBATA PC1432 4.7U_0402_6.3V6M 0.108A ,10mil ,1via +V_1P80_AON PQ1401 FDMA510PZ_MICROFET6-8 3 +V_1P80_AON 0.6A ,24mil ,1via 1 +V_1P80_VCCAON 1UH_PHI25201B-1R0MS_1.8A_20% 4 8 +V_1P80_VCCAON 1 2 5 6 7 1 F1 G1 H1 2 PL1411 1 @ PR1404 H16 J15 J17 H17 20_0201_5% PL1410 1 2 J16 H13 0.1A ,10mil ,1via @ PR1402 1 1 F2 G2 H2 H7 2 B13 F7 PC1428 1U_0201_6.3V6M PC1429 10U_0402_6.3V6M B SNB5072AZNBR_NFBGA289 2 1U_0201_6.3V6M PC1433 VCC180VIN V180AONGND1 V180AONGND2 V180AONGND3 V180AONGND4 PC1409 2 +V_1P80_AON B +V_1P22_VCCAON 1A 40mil,2via 1 V180AONVIN1 V180AONVIN2 V180AONVIN3 DON,0.95V 2 VNNAONGND1 VNNAONGND2 VNNAONVIN1 VNNAONVIN2 PC1407 10U_0402_6.3V6M VNNAONLX VNNAONFB PC1406 1U_0201_6.3V6M VCCGND_1_1 VCCGND_1_2 VCCGND_2_1 VCCGND_2_2 VCCGND_3_1 VCCGND_3_2 VCCGND_3_3 VCCGND_4_1 VCCGND_4_2 VCCGND_4_3 PC1405 1 M3 N3 P3 R3 P4 P5 R4 P6 R5 R6 V180AONLX1 V180AONLX2 V180AONLX3 V180AONFB PC1404 2 4.7U_0402_6.3V6M 2 1 PC1423 PC1424 4.7U_0402_6.3V6M 2 1 PC1422 4.7U_0402_6.3V6M 2 1 4.7U_0402_6.3V6M 2 1 PC1421 GVCC180AON VCC180 VCC180AONFB M2 N2 P2 R2 T4 T3 T6 T5 PC1403 22U_0603_6.3V6M 1.2A,48mail,2via VCCSENSE VSSSENSE VCCVIN_1_1 VCCVIN_1_2 VCCVIN_2_1 VCCVIN_2_2 VCCVIN_3_1 VCCVIN_3_2 VCCVIN_4_1 VCCVIN_4_2 B15 VNNPUSENSE 9 1UH_PHI25201B-1R0MS_1.8A_20% 2 PL1405 1 22U_0603_6.3V6M 4.7U_0402_6.3V6M 2 1 +VBATA M1 N1 P1 R1 U3 U4 U5 U6 VCC122AONGND1 VCC122AONGND2 VCC122AONGND3 VCC122AONGND4 D16 E16 F16 G16 PC1408 1 4.7U_0402_6.3V6M 2 1 D15 E15 F15 G15 VCC122AONVIN1_1 VCC122AONVIN1_2 VCC122AONVIN2_1 VCC122AONVIN2_2 VCCLX_1_1 VCCLX_1_2 VCCLX_2_1 VCCLX_2_2 VCCLX_3_1 VCCLX_3_2 VCCLX_4_1 VCCLX_4_2 N11 +V_VNN 3.8A,160mil,8via 0.47UH_MVLS-252012-R47M_2.2A_20% 2 0.47UH_MVLS-252012-R47M_2.2A_20% 2 0.47UH_MVLS-252012-R47M_2.2A_20% 2 0.47UH_MVLS-252012-R47M_2.2A_20% 2 2 PC2511 VCC122AONFB PL1401 1 PL1402 1 PL1403 1 PL1404 1 22U_0603_6.3V6M PC2510 D17 E17 F17 G17 VNNSENSE VCC122AONLX1_1 VCC122AONLX1_2 VCC122AONLX2_1 VCC122AONLX2_2 M16 N16 P16 R16 T15 T14 T13 T12 1 PC1417 4.7U_0402_6.3V6M 2 1 1.1A,44mail,2via VNNGND_1_1 VNNGND_1_2 VNNGND_1_3 VNNGND_2_1 VNNGND_2_2 VNNGND_3_1 VNNGND_3_2 VNNGND_3_3 VNNGND_4_1 VNNGND_4_2 VNNLX_1_1 VNNLX_1_2 VNNLX_2_1 VNNLX_2_2 VNNLX_3_1 VNNLX_3_2 VNNLX_4_1 VNNLX_4_2 2 +VBATA M15 N15 N14 P15 R15 P14 P13 R14 R13 R12 VNNVIN_1_1 VNNVIN_1_2 VNNVIN_2_1 VNNVIN_2_2 VNNVIN_3_1 VNNVIN_3_2 VNNVIN_4_1 VNNVIN_4_2 1 4.7U_0402_6.3V6M 2 1 4.7U_0402_6.3V6M 2 1 PC1434 PC1402 4.7U_0402_6.3V6M 2 1 PC1401 PU1201A M17 N17 P17 R17 U15 U14 U13 U12 2 C PC1435 4.7U_0402_6.3V6M 2 1 1.2A,48mail,2via A A Compal Secret Data Security Classification Issued Date 2013./02/04 Deciphered Date 2014/04/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Size A2 Date: Compal Electronics, Inc. PMIC (3 of 3) Document Number Rev 0.2 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 1 Sheet 28 of 32 5 4 3 2 1 Change input to +VBATA (2/6) Add LDO for EC power 1/3 @ D Change net name 1/3 PR1544 2 PR1542 2 PR1530 1 PR1532 1 1 100_0201_1% 1 100_0201_1% 2 100_0201_1% 2 100_0201_1% I2C_2_SDA_EC I2C_2_SCL_EC TS 29 BI 24 23 23 BATT++ PL1501 HCB2012KF-121T50_0805 1 2 PR1535 @ 0_0201_5% 1 del Pc1527 for reset function 0220 2 2 Swap Pin order 1/3 PQ1501 AON7403L_DFN8-5 1 3 1 1 2 PR107 100K_0402_1% Change to 5 pin DCIN connector 1/3 LTC015EUBFS8TL_UMT3F 1 1 PQ1503 2 DC_IN 2 ACIN_detect# 2 PR108 100K_0402_1% 1 2 3 4 5 6 7 1 1 2 3 4 5 GND1 GND2 PC1526 100P_0402_50V8J LTA044EUBFS8TL_UMT3F PL1503 HCB2012KF-121T50_0805 1 2 JP1 2 2 ACIN_detect# 1 PQ1612 PC1524 1000P_0402_25V8J 2 1 1 PC1505 2 2 PR109 100K_0402_1% 3 2 PC102 1U_0603_25V6K 5 1500P_0402_50V7K 1 1 PR106 10K_0402_5% PC126 0.1U_0402_25V6 4 2 1 2 3 D PMUX INPUT PQ1502 AON7403L_DFN8-5 1 2 3 5 4 DC_IN +V_BATTERY 1 4 2 NC 2 EN ACES_50458-00801-001 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 GND 10 GND PJP2801 +EC_VCC PC1510 0.01U_0402_25V7K 5 PC1508 1000P_0402_25V8J VOUT GND PC1529 4.7U_0402_6.3V6M 3 VIN 1 2 PC1528 4.7U_0402_6.3V6M 2 1 1 2 2 EXTRESET_N 1 PR1534@ 1 2 0_0201_5% PC1527 2.2U_0402_6.3V6M 24,25,26 PU301 1 PR1525 0_0201_5% 1 +VBATA C C +V3.3A +VBATA CHR_LED# 22 PR1521 10K_0201_1% REGN PR1523 10K_0402_1% REGN TS2 TS1 22U_0603_6.3V6M 1 2 2 PR1520 1 2 324_0402_1% PC1515 4.7U_0402_6.3V6M 12 +V_BATTERY REGN 11 BQ24192IRGER_QFN24_4X4 4A,160mil,8via IBATTSENSEN PC1518 1U_0603_25V6K PR1524 5.23K_0402_1% 26 1 3 10 IBAYTTSENSEP 1 B 26 29 PR1527 30.1K_0402_1% 2 1U_0402_16V6K 1 2 TS 1 TS 1 BTST 2 10U_0402_6.3V6M 2 4 2 PC1516 Need modify the OTP setting (2/6) BATT_PSEL 2 26 0.02_1206_1% 1 14 RB551V-30_SOD323-2 +VBATA @ PR1526 10K_0201_1% 10U_0402_6.3V6M PR1543 13 2 PSEL ILIM 18 PC1522 2 1 /CE 17 1 BAT_2 1 1 OTG PD1501 1 @ PR1522 10K_0201_1% 1 BAT_1 PC1523 10U_0402_6.3V6M PQ1505 @ NTS4001NT1G_SC70-3 2 BATT_PSEL Change net name to link EC 1/3 INT 16 intel request 0108 1U_0201_6.3V6M Add net name to link EC 1/3 9 CHARGE_DISABLE_EC PGND_2 2 PC1514 0.047U_0402_16V7K 1U_0201_6.3V6M 23,26 PGND_1 SDA BTST 1 15 2 CHG_INT#_EC SYS_2 SCL 21 PC1521 2 1 8 /PG 20 1U_0201_6.3V6M S 2 G 1 0_0201_5% SYS_1 PC1520 1 D @ STAT 19 1U_0201_6.3V6M PR1518 2 BTST 1 2 10K_0201_1% SW2 PMID 2 6 SW1 VBUS_2 PC1525 PC1519 5 Add net name to link EC 1/3 VBUS_1 PC1517 2 2 3 I2C_2_SCL_EC 4A,160mil,8via 1 1 2 1 2 1 2 1 0_0201_5% 7 3 PHY0_PSW 4 I2C_2_SDA_EC 23 18 23 PC1512 1 @ PR1519 1 +VBATA 10K_0201_1% 2 2 CHARGER_PWRGD PR1533 Mount PR1533 for PMIC sequence 1/3 PJ1501 JUMP_43X79 2 1 2 1 2 1 0_0201_5% 1 10U_0603_25V6M 1 @ 24 PC1513 2 2 PR1516 2 1 PR1513 30.1K_0402_1% 25 1 0_0201_5% PU1501 2 1 0_0201_5% @ PC1511 PC1530 1U_0603_25V6K 10U_0805_25V6K 2 B CHG_INT# @ PR1515 2 PR1517 @ 0_0201_5% 2 7 PR1514 2 +VBATA 1 0_0201_5% @ 1 I2C_2_SDA CHARGER_PWRGD_EC CHARGE_COMPLETE_EC 2 I2C_2_SCL 23,24,5 23 2 PMIC_CHARGE_COMPLETEPR1531 26 23,24,5 PR1512 THERMAL PAD 26 23 1 1 1 10K_0201_1% 2 10K_0201_1% 2 PR1528 PR1511 PL1502 2.2UH_TMPC0515HP-2R2MN-Z01_4A_20% 1 2 2A,80mil,4via change to 0805 25V 0220 1 26 Add net name to link EC 1/3 1 PR1529 10K_0201_1% A A Issued Date 2013./02/04 Deciphered Date 2014/04/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Compal Electronics, Inc. BATTERY CHARGER Compal Secret Data Security Classification Title Size D Document Number 1 Rev 0.2 Cheetah_CT LA-A411P_R01 Tuesday, February 26, 2013 Date: Sheet 29 of 32 4 3 17 2 PR1624 100K_0201_1% PC1634 10U_0402_6.3V6M 1 PR1618 1K_0201_1% TPS61032RSAR_QFN16_4X4 1 2 D S 2 G V5S_EN 2 26 PQ1609 NTS4001NT1G_SC70-3 1 +VBATA 3 PL1606 2.2UH_PCMB041B-2R2MS_2.75A_20% 2 HCB2012KF-121T50_0805 PC1601 2 PL1608 1 PC1636 1500P_0402_50V7K 2 4 1 5 7 8 1 PC1630 0.022U_0402_25V7K PGND SW PGND LBI 6 9 PGND PR1625 0_0201_5% @ VBAT 1 2 1 PC1635 22U_0603_6.3V6M 2 PC1633 0.1U_0201_6.3V6K @ 2 PR1620 499K_0201_1% PC1632 150U_B2_6.3VM_R35M 1 1 3 2 SW 1 SYNC + 10 8 4 PAD-OPEN 2x2m 2 2 NC D 7 6 5 2 1 3 VOUT EN 1 11 +V5A 1 16 15 LBO Just change PN to 61030 2 10K_0201_1% 1 1 PR1622 1 2 5V_VOUT +V5S PQ1608 FDMA510PZ_MICROFET6-8 +V5A PJ1603 1 2 V5A_EN 1 2 Spec: Ven >0.8*VBAT VBAT=5V-->Ven>4V 26,30 PADGND 12 VOUT GND FB PU1604 D 2 Delete error net (2/6) PR1601 1M_0402_1% 1 2 14 13 PR1602 88.7K_0402_1% 1 2 VOUT 5 0.1U_0201_6.3V6K 1 Current limit:3.6A~4.5A 2 PC1631 10U_0402_6.3V6M C C PQ1606 FDMA510PZ_MICROFET6-8 +V3.3A V5A_EN 15 PC1610 10U_0402_6.3V6M 1 2 2 3 1 PC1616 10U_0402_6.3V6M 1 S 2 G V3.3S_EN PQ1607 NTS4001NT1G_SC70-3 1 PJ1604 0.1U_0201_6.3V6K PAD-OPEN 2x2m 1 PC1611 22U_0603_6.3V6M PC1602 1 2 2 1 PC1615 22U_0603_6.3V6M 1 2 26 1 2 VDD_3V3_SYS_FB 3V3_VOUT TPS63020DSJR_QFN14_4X3 +V3.3A PR1626 560K_0402_1% D 3 1 2 0.1U_0201_6.3V6K B++ 2 1 PC1609 10U_0402_6.3V6M 2 2 1 B 1 2 3 4 5 6 7 1 B++ VINA GND FB VOUT VOUT L2 L2 2 3V3_SYNC 3V3_EN PG PS/SYNC EN VIN VIN L1 L1 PGND 14 13 12 11 10 9 8 2 PC1614 1 1 PL1607 2 HCB2012KF-121T50_0805 PC1613 1500P_0402_50V7K PR1627 1K_0201_1% PC1617 33P_0402_50V8J PU1603 +VBATA 2 improve the dynamic transient 0225 PR1623 0_0201_5% @ 1 2 PR1616 100K_0201_1% PC1612 0.022U_0402_25V7K 2 3V3_SYNC 2 3V3_EN PR1619 100K_0201_1% B PR1617 100K_0402_1% 2 2 PR1621 0_0201_5% @ 1 1 PR1630 0_0402_5% @ 1 1 2 1 26,30 +V3.3S 7 6 5 2 1 8 4 OVP:5.5V~7V 2 PL1609 1 1.5UH_TMPC0412HP-1R5M-Z02_3A_20% Current limit:3.5A~4.5A +V5A/+V3.3A discharge +V5A 1 +VBATA PR1628 100K_0201_1% PQ1610B 2 2 +V3.3A 4 L2N7002DW1T1G_SC88-6 Id 500mA 2 1 L2N7002DW1T1G_SC88-6 D 3 1 PR1631 330_0402_1% 1 V5A_EN 5 V5A_EN# 6 PQ1610A 3 2 1 PR1629 470_0603_5% S 2 G PQ1611 NTS4001NT1G_SC70-3 Id 270mA A A Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Deciphered Date 2014/04/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title DCDC (3/5V) Size A2 Date: Document Number Rev Cheetah_CT LA-A411P_R010.2 Tuesday, February 26, 2013 1 Sheet 30 of 32 4 3 2 Just change PN to Vth <2V 0219 1 0.1U_0603_50V7K PC1420 2 1 @ PC1440 2 2.2U_1206_50V7K 1 2.2U_1206_50V7K PC1436 2 1 2.2U_1206_50V7K 10_1206_1% PR1409 1 1 2 13 C IFB5 IFB6 14 15 13 PGND IFB4 SW DCTRL 12 11 +PANEL_FB DCTRL TPS61181ARTER_QFN16_3X3 3 EN VBAT GND VO IFB3 PR1410 2 B @ 1 10 +PANEL_FB IFB2 9 8 IFB1 7 CIN 0.1U_0402_10V7K 1 62K_0402_1% PC1439 2 1 6 ISET 5 1 2 PC1438 2 1 @ PC1446 100P_0402_50V8J +Panel_PW4R 1U_0402_16V6K 1 100P_0402_50V8J 2 PR1408 @ PC1441 2 10K_0402_1% 2 EN 2 51_1206_5% 1 PR1412 2 SW +PANEL_FB 1 1 1M_0402_1% PMIC_BACKLIGHT_EN 1 FAULT PU1401 PR1413 26 16 EN Change jump (11/29) 17 1 C +V5A TPAD 2 PR1407 2 2 1 PC1444 2 2 LL4148_LL34-2 1 1 2 DCTRL 100P_0402_50V8J 10K_0402_1% 2 @ PJ503 JUMP_43X39 PR1406 2 PC1437 2 1 1 LCD_PWM 1M_0402_1% 13 SW +Panel_PWR PD1402 1 SX34_SMA2 PC1447 S CER CAP 220P 50V J NPO 0603 1 PD1401 2 2 PR1411 1 100K_0402_5% PC1443 100P_0402_50V8J 2 1 1 2 0.1U_0402_10V7K 1 G PC1445 4.7UH_MMD-06AH-4R7M-V1_3A_20% PL1412 1 2 D S 3 +VBATA X1 code change material 0219 D PQ1402 P5103EMG_SOT23-3 2.2U_1206_50V7K D 1 PC1442 2 5 +PANEL_FB B +PANEL_FB PJ1401 2 PAD-OPEN1x1m A A Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Issued Date Deciphered Date 2014/04/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Backlight LED Power Size A3 Date: Document Number Rev Cheetah_CT LA-A411P_R010.2 Sheet Tuesday, February 26, 2013 1 31 of 32 5 4 3 2 Version change list (P.I.R. List) Item 1 Reason for change Page 1 of 1 for PWR PG# 27,30 Add EC to control charger 1 Modify List Date Phase Change Net name PMIC_CHARGER_DISABLE to CHARGER_DISABLE_EC 1/3 DVT 1/3 DVT 1/3 DVT D D Add EC to control charger 3 Swap battery connector pin order to follow Acer define 30 Add net name I2C_2_SCL_EC,I2C_2_SDA_EC,CHARGER_PWRGD_EC, CHARGE_COMPLETE_EC,CHG_INT#_EC Swap PJP2801 pin order 4 Add +EC_VCC power rail 30 Add PU301,PC1527,PC1528,PC1529 1/3 DVT 5 Change DCIN connector from 4pin to 5pin 30 Change JP1 to ACES_88266-05001 1/3 DVT 7 PMIC sequence issue 30 Mount PR1533 1/3 DVT 8 POWER rail V5A need to set higher change PU1604 PN to TPS61030 31 change PU1604 PN to TPS61030 1/8 DVT 9 POWER rail V5A need to set higher change PU1604 PN to TPS61030 change vender to common material 31 mount PR1601 PR1602 1/8 DVT PC102,PC1511,PC1518 PC15130 PC1526 1/8 DVT 11 Follow intel schematic 30 PC1525 PC1516 PC1530 1/8 DVT 12 TI PMIC AC only bug 2 30 6 C 10 C 13 14 15 B 16 B 17 18 19 20 A A Compal Electronics, Inc. Compal Secret Data Security Classification 2013./02/04 Issued Date Deciphered Date 2014/04/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title PWR PIR Size A3 Date: Document Number Rev Cheetah_CT LA-A411P_R010.2 Tuesday, February 26, 2013 Sheet 1 32 of 32 www.s-manuals.com
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