Compal LA A621P Schematics. Www.s Manuals.com. R0.3 Schematics

User Manual: Motherboard Compal LA-A621P Z5WE3/Z5WT3 EA50 BM - Schematics. Free.

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D

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Model Name : Z5WE3/Z5WT3
File Name : LA-A621P
1

1

Compal Confidential
2

2

EA50_BM UMA M/B Schematics Document
Intel Bay Trail M
3

3

2013-09-03
REV:0.3
4

4

PCB@
ZZZ
PCB 12R LA-A621P REV0 M/B

Part

Number

DA60012W000

Issued Date

PCB 12R LA-A621P REV0 M/B

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Description

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Date:
A

B

C

D

Cover Page
Document Number

Rev
0.3

Bay Trail M LA-A621P
Tuesday, September 03, 2013

Sheet
E

1

of

37

A

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C

D

E

204pin DDR3L-SO-DIMM X1
port 0
1

HDMI Conn.
P.17

P.14

port 1

Memory BUS

XDP-SFF-26Pin
Debug
P.13
Conn.

eDP Conn.

Dual Channel

1

1.35V DDR3L 1066/1333

204pin DDR3L-SO-DIMM X1

P.16

P.15

DDI x2
VGA x1

CRT Conn.

USB2.0 x4

port 0

port 1

port 2

port 3

P.18

PCIE x4

port 0

P.19

P.20

port 1

SATA ODD
Conn.

P.19

P.21

HD Camera
Conn.

P.16

P.16

FCBGA 1170 Pin
HD Audio

port 0

USB 2.0
Conn P.22

HDA Codec
ALC3225

page 06~13

2 in 1
(SD/MMC)

Touch Panel
Conn.

2

SATA II x2

Card Reader

USB HUB
FE1.1s(STT)
P.22

SOC

WLAN
MINI CARD

RTL8411-CG

USB 3.0
Conn P.22

port 1

2

LAN(GbE)

USB3.0 x1

VALLEYVIEW-M

SATA HDD
Conn.

LPC BUS

P.25

Speaker

Int. MIC

P.25

SPI ROM
1.8V (8MB)

3

EC
ENE KB9012

TPM
P.25

P.20

Sub Board

SPI

P.21

BT
MINI CARD

USB 2.0
Conn P.22

P.25
3

Combo Jack

P.08

P.25

P.23

RTC CKT.
Touch Pad

P.08

P.24

Int.KBD
P.24

DC/DC Interface CKT.
P.26

4

Power Circuit DC/DC
P.28~P.36

4

Issued Date

P.24

Compal Electronics, Inc.

Compal Secret Data

Security Classification

LED/Power On/Off

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Date:
A

B

C

D

Block Diagrams
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
E

2

of

37

A

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C

Voltage Rails
S0

S3

S4/S5

19V Adapter power supply

ON

ON

ON

BATT+

12V Battery power supply

ON

ON

ON

B+

AC or battery power rail for power circuit. (19V/12V)

ON

ON

ON

1

2

E

Board ID / SKU ID Table for AD channel
Description

Power Plane
VIN

D

+RTCVCC

RTC Battery Power

ON

ON

ON

+1.0VALW

+1.0v Always power rail

ON

ON

ON

+1.8VALW

+1.8v Always power rail

ON

ON

ON

+3VALW

+3.3v Always power rail

ON

ON

ON

+5VALW

+5.0v Always power rail

ON

ON

ON

+1.35V

+1.35V power rail for DDR3L

ON

ON

OFF

+SOC_VCC

Core voltage for SOC

ON

OFF

OFF

+SOC_VNN

GFX voltage for SOC

ON

OFF

OFF

+0.675VS

+0.675V power rail for DDR3L Terminator

ON

OFF

OFF

+1.0VS

+1.0v system power rail

ON

OFF

OFF

+1.05VS

+1.05v system power rail

ON

OFF

OFF
OFF

+1.35VS

+1.35v system power rail

ON

OFF

+1.5VS

+1.5v system power rail

ON

OFF

OFF

+1.8VS

+1.8v system power rail

ON

OFF

OFF

+3VS

+3.3v system power rail

ON

OFF

OFF

+5VS

+5.0v system power rail

ON

OFF

OFF

Vcc
3.3V +/- 5%
Ra/Rc/Re 100K +/- 5%
Board ID Rb / Rd / Rf
0
0
1
8.2K +/- 5%
18K +/- 5%
2
33K +/- 5%
3
4
56K +/- 5%
5
100K +/- 5%
6
200K +/- 5%
7
NC

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

1

BOARD ID Table
Board ID
0
1
2
3
4
5
6

PCB

BOM Option Table

Revision

Item
BOM Structure
Unpop
@
Connector
CONN@
XDP (Debug Port)
XDP@
EMC requirement
EMC@
EMC requirement unpop
@EMC@
TPM
TPM@
Touch Screen
TS@
R short
RS@
Test Point
TEST@

2

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

3

3

EC SM Bus1 address
Device

Address

Smart Battery

0001 011X b

EC SM Bus2 address
Device

Address

SOC SM Bus address
Device

Address

SO-DIMM A (JDIMM1)
SO-DIMM B (JDIMM2)

A0h
A2h

43 level BOM table
43 Level
4319QPBOL01
4319QPBOL02
4319QPBOL03
4319QPBOL04

SMT
SMT
SMT
SMT

MB
MB
MB
MB

Description
AA621 Z5WE3 BTM 1.67G HDMI
AA621 Z5WE3 N2910 1.67G HDMI
AA621 Z5WE3 N3510 2.16G HDMI
AA621 Z5WE3 N2910 B2 1.67G HDMI

USOC1
N2910@

USOC1
N3510@

S IC FH8065301546401 QF9D B1 1.67G ABO!
Part Number = SA000072B20

4

Issued Date

USOC1
N2910B2@

S IC FH8065301546300 QF9E B1 2.16G ABO!
Part Number = SA000075O10

S IC FH8065301546402 QFH0 B2 1.6G ABO!
Part Number = SA000072B60

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Date:
A

B

C

4

Compal Electronics, Inc.

Compal Secret Data

Security Classification

BOM Structure
DBG@/EMC@/TS@/XDP@/B0@
DBG@/EMC@/TS@/XDP@/N2910@
DBG@/EMC@/TS@/XDP@/N3510@
DBG@/EMC@/TS@/XDP@/N2910B2@

D

Notes List
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
E

3

of

37

5

4

Z5WE3_DVT Power Sequence AC mode
2013-08-08
BIOS:v0.05
EC:v0.05

3

G3->S0

2

S0->S3

1

S3->S0

S0->S5
ACIN

ACIN

+3VLP

+3VLP

EC_ON

EC_ON

1.53ms

+3VALW

1.58ms

D

+5VALW

+5VALW

SPOK

SPOK

7.28ms

+1.0VALW

8.23ms

+1.0VALW
+1.8VALW

+1.8VALW

ON/OFF

ON/OFF

95.38ms

EC_RSMRST#

101ms

EC_RSMRST#

PBTN_OUT#

101ms

PBTN_OUT#

102ms

EC_SLP_S4#

EC_SLP_S4#
102ms

EC_SLP_S3#

EC_SLP_S3#
222ms

SYSON
C

D

+3VALW

204ms

SYSON

0.6ms

+1.35V

3.29ms

+1.35V

3.29ms

DDR_PWROK

C

1.71ms
33.68ms

DDR_PWROK

22.32ms

21ms

36.20ms

VR_ON

VR_ON

2.50ms

2.49ms
8.85ms

+SOC_VCC

+SOC_VCC

11.5ms

+SOC_VNN

2.50ms

2.50ms
10.55ms

+SOC_VNN

9.81ms

279us

0.28ms

VGATE

VGATE

42.56ms
11.71ms

263ms

SUSP#

5.57ms

2.56ms

+1.0VS

2.18ms

1.56ms

1.52ms

8ms

8.12ms

10.71ms

10.71ms

16.59ms

15.31ms

20.48ms

+3VS

20.27ms

19.61ms

19.60ms

+0.675VS

49.87ms

49.83ms

148.3ms

KBRST#

144ms

KBRST#

110ms

110ms
11.71ms

PMC_CORE_PWROK

PMC_CORE_PWROK
110ms

110ms
11.71ms

DDR_CORE_PWROK

DDR_CORE_PWROK
116ms

116ms
8.8ms

584ms

B

+5VS

12.77ms

12.83ms

+0.675VS

+1.8VS

15.34ms
4.41ms

4.41ms

B

+5VS

16.63ms
3.77ms

3.77ms

+3VS

+1.5VS

2.08ms

2.11ms

+1.8VS

+1.35VS

2.8ms

2.79ms

+1.5VS

+1.05VS

1.83ms

1.84ms

+1.35VS

+1.0VS

1.29ms

1.30ms

+1.05VS

SUSP#

31.12us

31.28us

SUSP#

PMC_PLTRST#

PMC_PLTRST#
2.38ms

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C

Date:
5

4

3

2

Power Sequence
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013
1

Sheet

4

of

37

5

4

3

2

1

D

D

USOC1A
<14>

<14>

C

DDR_A_MA[0..15]

DDR_A_MA0
K45
DDR_A_MA1
H47
DDR_A_MA2
L41
DDR_A_MA3
H44
DDR_A_MA4
H50
DDR_A_MA5
G53
DDR_A_MA6
H49
DDR_A_MA7
D50
DDR_A_MA8
G52
DDR_A_MA9
E52
DDR_A_MA10 K48
DDR_A_MA11 E51
DDR_A_MA12 F47
DDR_A_MA13 J51
DDR_A_MA14 B49
DDR_A_MA15 B50

DDR_A_DM[0..7]

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

<14>
<14>
<14>

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

<14>
<14>
<14>

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

<14>

DDR_A_CS0#

<14>

DDR_A_CS2#

<14>

DDR_A_CKE0

<14>

DDR_A_CKE2

<14>

DDR_A_ODT0

<14>

DDR_A_ODT2

<14>
<14>

DDR_A_CLK0
DDR_A_CLK0#

<14>
<14>

<14>

M45
M44
H51
K47
K44
D52
P44
P45
C47
D48
F44
E46
T41
P42
M50
M48
P50
P48

DDR_A_CLK2
DDR_A_CLK2#

P41

DDR_A_RST#

AF44

+DDR_SOC_VREF
100K_0402_5% 1
100K_0402_5% 1

B

<32>
<8>

2 R960
2 R961

DDR_TERMN0
DDR_TERMN1

1
1
1

2 R962
2 R963
2 R964

AF42
AH42

AD42
AB42

DDR_PWROK
DDR_CORE_PWROK

23.2_0402_1%
29.4_0402_1%
162_0402_1%

G36
B36
F38
B42
P51
V42
Y50
Y52

DDR_RCOMP0
DDR_RCOMP1
DDR_RCOMP2

AD44
AF45
AD45

USOC1B

DRAM0_MA_0
DRAM0_MA_1
DRAM0_MA_2
DRAM0_MA_3
DRAM0_MA_4
DRAM0_MA_5
DRAM0_MA_6
DRAM0_MA_7
DRAM0_MA_8
DRAM0_MA_9
DRAM0_MA_10
DRAM0_MA_11
DRAM0_MA_12
DRAM0_MA_13
DRAM0_MA_14
DRAM0_MA_15

DRAM0_DQ_0
DRAM0_DQ_1
DRAM0_DQ_2
DRAM0_DQ_3
DRAM0_DQ_4
DRAM0_DQ_5
DRAM0_DQ_6
DRAM0_DQ_7
DRAM0_DQ_8
DRAM0_DQ_9
DRAM0_DQ_10
DRAM0_DQ_11
DRAM0_DQ_12
DRAM0_DQ_13
DRAM0_DQ_14
DRAM0_DQ_15
DRAM0_DQ_16
DRAM0_DQ_17
DRAM0_DQ_18
DRAM0_DQ_19
DRAM0_DQ_20
DRAM0_DQ_21
DRAM0_DQ_22
DRAM0_DQ_23
DRAM0_DQ_24
DRAM0_DQ_25
DRAM0_DQ_26
DRAM0_DQ_27
DRAM0_DQ_28
DRAM0_DQ_29
DRAM0_DQ_30
DRAM0_DQ_31
DRAM0_DQ_32
DRAM0_DQ_33
DRAM0_DQ_34
DRAM0_DQ_35
DRAM0_DQ_36
DRAM0_DQ_37
DRAM0_DQ_38
DRAM0_DQ_39
DRAM0_DQ_40
DRAM0_DQ_41
DRAM0_DQ_42
DRAM0_DQ_43
DRAM0_DQ_44
DRAM0_DQ_45
DRAM0_DQ_46
DRAM0_DQ_47
DRAM0_DQ_48
DRAM0_DQ_49
DRAM0_DQ_50
DRAM0_DQ_51
DRAM0_DQ_52
DRAM0_DQ_53
DRAM0_DQ_54
DRAM0_DQ_55
DRAM0_DQ_56
DRAM0_DQ_57
DRAM0_DQ_58
DRAM0_DQ_59
DRAM0_DQ_60
DRAM0_DQ_61
DRAM0_DQ_62
DRAM0_DQ_63

DRAM0_DM_0
DRAM0_DM_1
DRAM0_DM_2
DRAM0_DM_3
DRAM0_DM_4
DRAM0_DM_5
DRAM0_DM_6
DRAM0_DM_7
DRAM0_RAS#
DRAM0_CAS#
DRAM0_WE#
DRAM0_BS_0
DRAM0_BS_1
DRAM0_BS_2
DRAM0_CS_0#
DRAM0_CS_2#
DRAM0_CKE_0
RESERVED_D48
DRAM0_CKE_2
RESERVED_E46
DRAM0_ODT_0
DRAM0_ODT_2
DRAM0_CKP_0
DRAM0_CKN_0
DRAM0_CKP_2
DRAM0_CKN_2

DRAM0_DRAMRST#

DRAM_VREF

0.675V

ICLK_DRAM_TERMN_AF42
ICLK_DRAM_TERMN_AH42

DRAM0_DQSP_0
DRAM0_DQSN_0
DRAM0_DQSP_1
DRAM0_DQSN_1
DRAM0_DQSP_2
DRAM0_DQSN_2
DRAM0_DQSP_3
DRAM0_DQSN_3
DRAM0_DQSP_4
DRAM0_DQSN_4
DRAM0_DQSP_5
DRAM0_DQSN_5
DRAM0_DQSP_6
DRAM0_DQSN_6
DRAM0_DQSP_7
DRAM0_DQSN_7

DRAM_VDD_S4_PWROK
DRAM_CORE_PWROK
DRAM_RCOMP_0
DRAM_RCOMP_1
DRAM_RCOMP_2

Follow CRB v1.15
AF40
AF41
AD40
AD41
DDR_CORE_PWROK

1
2
C1159
EMC@
0.01U_0402_16V7K

RESERVED_AF40
RESERVED_AF41
RESERVED_AD40
RESERVED_AD41

M36
J36
P40
M40
P36
N36
K40
K42
B32
C32
C36
A37
C33
A33
C37
B38
F36
G38
F42
J42
G40
C38
G44
D42
A41
C41
A45
B46
C40
B40
B48
B47
K52
K51
T52
T51
L51
L53
R51
R53
T47
T45
Y40
V41
T48
T50
Y42
AB40
V45
V47
AD48
AD50
V48
V50
AB44
Y45
V52
W51
AC53
AC51
W53
Y51
AD52
AD51

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

J38
K38
C35
B34
D40
F40
B44
C43
N53
M52
T42
T44
Y47
Y48
AB52
AA51

DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7

DDR_A_D[0..63]

<15>

<15>

DDR_B_MA[0..15]

DDR_B_DM[0..7]

<15> DDR_B_RAS#
<15> DDR_B_CAS#
<15> DDR_B_WE#
<15>
<15>
<15>

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

<15>

DDR_B_CS0#

<15>

DDR_B_CS2#

<15>

DDR_B_CKE0

<15>

DDR_B_CKE2

<15>

DDR_B_ODT0

<15>

DDR_B_ODT2

<15> DDR_B_CLK0
<15> DDR_B_CLK0#

<15> DDR_B_CLK2
<15> DDR_B_CLK2#

<15>

DDR_B_RST#

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

AY45
BB47
AW41
BB44
BB50
BC53
BB49
BF50
BC52
BE52
AY48
BE51
BD47
BA51
BH49
BH50

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

BD38
BH36
BC36
BH42
AT51
AM42
AK50
AK52
AV45
AV44
BB51
AY47
AY44
BF52
AT44
AT45
BG47
BE46
BD44
BF48
AP41
AT42
AV50
AV48

AT50
AT48

AT41

DRAM1_MA_0
DRAM1_MA_1
DRAM1_MA_2
DRAM1_MA_3
DRAM1_MA_4
DRAM1_MA_5
DRAM1_MA_6
DRAM1_MA_7
DRAM1_MA_8
DRAM1_MA_9
DRAM1_MA_10
DRAM1_MA_11
DRAM1_MA_12
DRAM1_MA_13
DRAM1_MA_14
DRAM1_MA_15

DRAM1_DQ_0
DRAM1_DQ_1
DRAM1_DQ_2
DRAM1_DQ_3
DRAM1_DQ_4
DRAM1_DQ_5
DRAM1_DQ_6
DRAM1_DQ_7
DRAM1_DQ_8
DRAM1_DQ_9
DRAM1_DQ_10
DRAM1_DQ_11
DRAM1_DQ_12
DRAM1_DQ_13
DRAM1_DQ_14
DRAM1_DQ_15
DRAM1_DQ_16
DRAM1_DQ_17
DRAM1_DQ_18
DRAM1_DQ_19
DRAM1_DQ_20
DRAM1_DQ_21
DRAM1_DQ_22
DRAM1_DQ_23
DRAM1_DQ_24
DRAM1_DQ_25
DRAM1_DQ_26
DRAM1_DQ_27
DRAM1_DQ_28
DRAM1_DQ_29
DRAM1_DQ_30
DRAM1_DQ_31
DRAM1_DQ_32
DRAM1_DQ_33
DRAM1_DQ_34
DRAM1_DQ_35
DRAM1_DQ_36
DRAM1_DQ_37
DRAM1_DQ_38
DRAM1_DQ_39
DRAM1_DQ_40
DRAM1_DQ_41
DRAM1_DQ_42
DRAM1_DQ_43
DRAM1_DQ_44
DRAM1_DQ_45
DRAM1_DQ_46
DRAM1_DQ_47
DRAM1_DQ_48
DRAM1_DQ_49
DRAM1_DQ_50
DRAM1_DQ_51
DRAM1_DQ_52
DRAM1_DQ_53
DRAM1_DQ_54
DRAM1_DQ_55
DRAM1_DQ_56
DRAM1_DQ_57
DRAM1_DQ_58
DRAM1_DQ_59
DRAM1_DQ_60
DRAM1_DQ_61
DRAM1_DQ_62
DRAM1_DQ_63

DRAM1_DM_0
DRAM1_DM_1
DRAM1_DM_2
DRAM1_DM_3
DRAM1_DM_4
DRAM1_DM_5
DRAM1_DM_6
DRAM1_DM_7
DRAM1_RAS#
DRAM1_CAS#
DRAM1_WE#
DRAM1_BS_0
DRAM1_BS_1
DRAM1_BS_2
DRAM1_CS_0#
DRAM1_CS_2#
DRAM1_CKE_0
RESERVED_BE46
DRAM1_CKE_2
RESERVED_BF48
DRAM1_ODT_0
DRAM1_ODT_2
DRAM1_CKP_0
DRAM1_CKN_0

DRAM1_CKP_2
DRAM1_CKN_2

DRAM1_DRAMRST#

DRAM1_DQSP_0
DRAM1_DQSN_0
DRAM1_DQSP_1
DRAM1_DQSN_1
DRAM1_DQSP_2
DRAM1_DQSN_2
DRAM1_DQSP_3
DRAM1_DQSN_3
DRAM1_DQSP_4
DRAM1_DQSN_4
DRAM1_DQSP_5
DRAM1_DQSN_5
DRAM1_DQSP_6
DRAM1_DQSN_6
DRAM1_DQSP_7
DRAM1_DQSN_7
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]

1 OF 13

<14>

<14>
<14>

BG38
BC40
BA42
BD42
BC38
BD36
BF42
BC44
BH32
BG32
BG36
BJ37
BG33
BJ33
BG37
BH38
AU36
AT36
AV40
AT40
BA36
AV36
AY42
AY40
BJ41
BG41
BJ45
BH46
BG40
BH40
BH48
BH47
AY52
AY51
AP52
AP51
AW51
AW53
AR51
AR53
AP47
AP45
AK40
AM41
AP48
AP50
AK42
AH40
AM45
AM47
AF48
AF50
AM48
AM50
AH44
AK45
AM52
AL51
AG53
AG51
AL53
AK51
AF52
AF51

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

BF40
BD40
BG35
BH34
BA38
AY38
BH44
BG43
AU53
AV52
AP42
AP44
AK47
AK48
AH52
AJ51

DDR_B_DQS0
DDR_B_DQS#0
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS#7

DDR_B_D[0..63]

C

B

DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]

2 OF 13

FH8065301546401_FCBGA131170

<15>

<15>
<15>

FH8065301546401_FCBGA131170

Close To SOC Pin

+1.35V

+DDR_SOC_VREF
1

1

2
R965
4.7K_0402_1%

1

2
R966
4.7K_0402_1%

2

C1132
.1U_0402_16V7K

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C

Date:
5

4

3

2

VLV-M SOC Memory DDR3L
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013
1

Sheet

5

of

37

4

3

2

1

USOC1C

B28
C27
B26
1 R968
2 DDI0_RCOMPP
402_0402_1% DDI0_RCOMPN

Follow CRB v1.15 0ohm till to GND

AK12
AK13
AM14
AM13
AM3
AM2

DDI0_DDCDATA
DDI0_DDCCLK

1.8V
1.8V

1.8V
1.8V

DDI1_DDCDATA
DDI1_DDCCLK

1.8V
1.8V
1.8V

DDI1_VDDEN
DDI1_BKLTEN
DDI1_BKLTCTL

DDI0_VDDEN
DDI0_BKLTEN
DDI0_BKLTCTL

VSS_AH3
VSS_AH2

DDI0_RCOMP_P
DDI0_RCOMP_N
RESERVED_AM14
RESERVED_AM13
VSS_AM3
VSS_AM2

RESERVED_AH14
RESERVED_AH13
RESERVED_AF14
RESERVED_AF13

C

VGA_RED
VGA_BLUE
VGA_GREEN
VGA_IREF
VGA_IRTN

3.3V
3.3V
3.3V
3.3V

+1.8VS

1

B

2

@
R970
10K_0402_5%

1

T186
T187

GPIO_NC12

RESERVED_T2
RESERVED_T3
RESERVED_AB3
RESERVED_AB2
RESERVED_Y3
RESERVED_Y2
RESERVED_W3
RESERVED_W1
RESERVED_V2
RESERVED_V3
RESERVED_R3
RESERVED_R1
RESERVED_AD6
RESERVED_AD4
RESERVED_AB9
RESERVED_AB7
RESERVED_Y4
RESERVED_Y6
RESERVED_V4
RESERVED_V6
GPIO_S0_NC_13
GPIO_S0_NC14
RESERVED_AB14
GPIO_S0_NC_12
RESERVED_C30

VGA_DDCCLK
VGA_DDCDATA

RESERVED_T7
RESERVED_T9
RESERVED_AB13
RESERVED_AB12
RESERVED_Y12
RESERVED_Y13
RESERVED_V10
RESERVED_V9
RESERVED_T12
RESERVED_T10
RESERVED_V14
RESERVED_V13
RESERVED_T14
RESERVED_T13
RESERVED_T6
RESERVED_T4
RESERVED_P14

2

R971
10K_0402_5%

GPIO_NC13
GPIO_NC14

T2
T3
AB3
AB2
Y3
Y2
W3
W1
V2
V3
R3
R1
AD6
AD4
AB9
AB7
Y4
Y6
V4
V6
A29
C29
AB14
B30
C30

VGA_HSYNC
VGA_VSYNC

3 OF 10

Follow CRB v1.15

GPIO_S0_NC_15
GPIO_S0_NC_16
GPIO_S0_NC_17
GPIO_S0_NC_18
GPIO_S0_NC_19
GPIO_S0_NC_20
GPIO_S0_NC_21
GPIO_S0_NC_22
GPIO_S0_NC_23
GPIO_S0_NC_24
GPIO_S0_NC_25
GPIO_S0_NC_26

EDP_AUXP
EDP_AUXN

<16>
<16>

EDP_HPD#

<16>

K30
P30 DDI1_ENABLE R967 1
G30

2 2.2K_0402_5%

+1.8VS

5

DDI1_HPD

AK3
AK2

+1.8VS

1

N30 DDI1_ENVDD
J30 DDI1_ENBKL
M30 DDI1_PWM
AH3
AH2

DDI1_ENBKL

NC

Y

2

A

4

ENBKL

<23>

NL17SZ07DFT2G_SC70-5
SA00004BV00

Follow CRB v1.15 0ohm till to GND
+1.8VS

AH14
AH13
AF14
AF13
BA3
AY2
BA1
AW1
AY3

U61

P

1.8V

D

eDP Panel

G

C26
C28

1.8V

<16>
<16>
<16>
<16>

3

HDMI_DDCDATA
HDMI_DDCCLK

DDI0_HPD

EDP_TXP0
EDP_TXN0
EDP_TXP1
EDP_TXN1

5

<17>
<17>

DDI1_AUXP
DDI1_AUXN

AG3
AG1
AF3
AF2
AD3
AD2
AC3
AC1

1

CRT_R
CRT_B
CRT_G
CRT_IREF

R969 1

BD2 CRT_HSYNC
BF2 CRT_VSYNC

2 357_0402_1%

CRT_R
CRT_B
CRT_G

<18>
<18>
<18>

CRT_HSYNC
CRT_VSYNC

BC1 CRT_DDC_CLK
BC2 CRT_DDC_DATA

DDI1_ENVDD

U62

P

HDMI_HPD#

1.0V
1.0V

DDI0_AUXP
DDI0_AUXN

DDI1_TXP_0
DDI1_TXN_0
DDI1_TXP_1
DDI1_TXN_1
DDI1_TXP_2
DDI1_TXN_2
DDI1_TXP_3
DDI1_TXN_3

NC

Y

2

A

4

ENVDD

<16>

C

G

<17>

1.0V

3

AL3
AL1
D27

1.0V

NL17SZ07DFT2G_SC70-5
SA00004BV00

CRT

<18>
<18>

+1.8VS

CRT_DDC_CLK
<18>
CRT_DDC_DATA
<18>

5

HDMI

DDI0_TXP_0
DDI0_TXN_0
DDI0_TXP_1
DDI0_TXN_1
DDI0_TXP_2
DDI0_TXN_2
DDI0_TXP_3
DDI0_TXN_3

RP43
150_0804_8P4R_1%
1
2
3
4

1

T7
T9
AB13
AB12
Y12
Y13
V10
V9
T12
T10
V14
V13
T14
T13
T6
T4
P14

DDI1_PWM

2

U64

P

D

AV3
AV2
AT2
AT3
AR3
AR1
AP3
AP2

HDMI_TX2+
HDMI_TX2HDMI_TX1+
HDMI_TX1HDMI_TX0+
HDMI_TX0HDMI_CLK+
HDMI_CLK-

8
7
6
5

NC

Y
A

3

<17>
<17>
<17>
<17>
<17>
<17>
<17>
<17>

CRT_R
CRT_G
CRT_B

4

INVT_PWM_SOC

<16>

G

5

NL17SZ07DFT2G_SC70-5
SA00004BV00

+3VS
RP44
ENBKL
ENVDD
INVT_PWM_SOC

5
6
7
8

4
3
2
1

B

4.7K_0804_8P4R_5%

F34
M32
D28
J28
K34
D34
F32
F28
K28
J34
N32
D32

DDI1_ENBKL
DDI1_ENVDD
DDI1_PWM

RP45

8
7
6
5

1
2
3
4
100K_0804_8P4R_5%

FH8065301546401_FCBGA131170

GPIO_S0_NC[13]:
Multiplexed with

Hardware

Straps

Pin:MDSI_DDCDATA

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/04/12

Issued Date

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number
Custom

4

3

2

Rev
0.3

Intel BayTrail-M Platform

Date:
5

VLV-M SOC Display
Tuesday, September 03, 2013

Sheet
1

6

of

37

5

4

3

2

1

USOC1D

<21>
<21>

BD10
BF10

SATA_PTX_DRX_P1
SATA_PTX_DRX_N1

AY16
BA16

SATA_PRX_DTX_P1
SATA_PRX_DTX_N1

BB10
BC10

Follow CRB V1.15 0ohm till to GND
<8>

SOC_SCI#
BA12
DEVSLP_SOC
AY14
SATA_LED#_SOC AY12

SOC_SCI#

Follow CRB v1.15

T188

1 R972
2 SATA_RCOMPP
402_0402_1% SATA_RCOMPN

AU18
AT18
AT22
AV20
AU22
AV22
AT20
AY24
AU26
AT26
AU20

C

AV26
BA24
AY18
BA18
AY20
BD20
BA20
BD18
BC18

AY26
AT28
BD26
AU28
BA26
BC24
AV28
BF22
BD22

B

BF26

SATA_RXP_0
SATA_RXN_0

PCIE_RXP_1
PCIE_RXN_1

VSS_BB10
VSS_BC10

PCIE_TXP_2
PCIE_TXN_2

SATA_GP0 / GPIO_S0_SC_0
SATA_GP1 / SATA_DEVSLP_0 / GPIO_S0_SC_1
SATA_LED# / GPIO_S0_SC_2

PCIE_RXP_2
PCIE_RXN_2

BB7
BB5

WLAN

<20>
<20>

8
7
6
5
10K_0804_8P4R_5%

Follow CRB V1.15 0ohm till to GND
8411 Pin 36 O/D

PCIE_RCOMP_P
PCIE_RCOMP_N

BG3
BD7
BG5
BE3
BD5

LAN_CLKREQ#
WLAN_CLKREQ#
PCIE_CLKREQ_2#
PCIE_CLKREQ_3#

AP14
AP13

PCIE_RCOMPP
PCIE_RCOMPN

LAN_CLKREQ# <19>
WLAN_CLKREQ# <20>

C

HDA_BITCLK_AUDIO 1
2
C1001
@EMC@
22P_0402_50V8J

1 R975
2
402_0402_1%

BB4
BB3

RESERVED_BB4
RESERVED_BB3

BF20
BG22
BH20
BJ21
BG20
BG19
BG21
BH18
BG18

HDA_LPE_RCOMP
HDA_RST# / LPE_I2S0_CLK / GPIO_S0_SC_8
HDA_SYNC / LPE_I2S0_FRM / GPIO_S0_SC_9
HDA_CLK / LPE_I2S0_DATAOUT / GPIO_S0_SC_10
HDA_SDO / LPE_I2S0_DATAIN / GPIO_S0_SC_11
HDA_SDI0 / LPE_I2S1_CLK / GPIO_S0_SC_12
HDA_SDI1 / LPE_I2S1_FRM / GPIO_S0_SC_13
SD3_CLK / GPIO_S0_SC_33 HDA_DOCKRST# / LPE_I2S1_DATAOUT / GPIO_S0_SC_14
SD3_D0 / GPIO_S0_SC_34
HDA_DOCKEN# / LPE_I2S1_DATAIN / GPIO_S0_SC_15
SD3_D1 / GPIO_S0_SC_35
SD3_D2 / GPIO_S0_SC_36
LPE_I2S2_CLK / SATA_DEVSLP_1 / GPIO_S0_SC_62
SD3_D3 / GPIO_S0_SC_37
LPE_I2S2_FRM / GPIO_S0_SC_63
SD3_CD# / GPIO_S0_SC_38
LPE_I2S2_DATAIN / GPIO_S0_SC_64
SD3_CMD / GPIO_S0_SC_39
LPE_I2S2_DATAOUT / GPIO_S0_SC_65
SD3_1P8EN / GPIO_S0_SC_40
SD3_PWREN# / GPIO_S0_SC_41
RESERVED_P34
RESERVED_N34
SD3_RCOMP
RESERVED_AK9
RESERVED_AK7

BF28
BA30
BD28
BC30

HDA_RCOMP
HDA_RST#
HDA_SYNC
HDA_BIT_CLK
HDA_SDOUT
HDA_SDIN0

49.9_0402_1% 1

HDA_SDIN0

HDA_SYNC_AUDIO
<25>
HDA_SDOUT_AUDIO <25>
HDA_BITCLK_AUDIO <25>
HDA_RST_AUDIO# <25>

GPIO_S0_SC_63:
GPIO_S0_SC_65:
BIOS/EFI Boot Strap (BBS) Security Flash Descriptors
BIOS Boot Selection
0 = Override
0 = LPC
1 = Normal Operation
1 = SPI
(Internal PU)

GPIO_S0_SC_63
GPIO_S0_SC_65

+1.8VS
R979
33.2_0402_1%
1
2

C24
2

1

B

+1.8VS

+1.0VS
H_PROCHOT#

Internal PD 2K

+1.8VS

1
2
3
4

<25>

T189
T190
T191

AK9
AK7

FH8065301546401_FCBGA131170

2 R976

8
7
6
5

33_0804_8P4R_5%
EMC@

P34
N34

PROCHOT#

RP46

HDA_SYNC
HDA_SDOUT
HDA_BIT_CLK
HDA_RST#

AV10
AV9

RESERVED_AV10
RESERVED_AV9

4 OF 10

<20>
<20>

RP51
1
2
3
4

AP9
AP7

PCIE_CLKREQ_0# / GPIO_S0_SC_3
PCIE_CLKREQ_1# / GPIO_S0_SC_4
PCIE_CLKREQ_2# / GPIO_S0_SC_5
PCIE_CLKREQ_3# / GPIO_S0_SC_6
SD3_WP / GPIO_S0_SC_7

SD2_CLK / GPIO_S0_SC_27
SD2_D0 / GPIO_S0_SC_28
SD2_D1 / GPIO_S0_SC_29
SD2_D2 / GPIO_S0_SC_30
SD2_D3_CD# / GPIO_S0_SC_31
SD2_CMD / GPIO_S0_SC_32

D

+1.8VS
LAN_CLKREQ#
WLAN_CLKREQ#
PCIE_CLKREQ_2#
PCIE_CLKREQ_3#

AP6
AP4

VSS_BB7
VSS_BB5

MMC1_RCOMP

PCIE LAN

<19>
<19>

PCIE_PTX_C_DRX_P1
PCIE_PTX_C_DRX_N1
PCIE_PRX_DTX_P1
PCIE_PRX_DTX_N1

AP12
AP10

PCIE_RXP_3
PCIE_RXN_3

MMC1_CMD / GPIO_S0_SC_25
MMC1_RST# / SATA_DEVSLP_0 / GPIO_S0_SC_26

2 C1135
2 C1000

<19>
<19>

AT7
AT6

MMC1_CLK / GPIO_S0_SC_16
MMC1_D0 / GPIO_S0_SC_17
MMC1_D1 / GPIO_S0_SC_18
MMC1_D2 / GPIO_S0_SC_19
MMC1_D3 / GPIO_S0_SC_20
MMC1_D4 / GPIO_S0_SC_21
MMC1_D5 / GPIO_S0_SC_22
MMC1_D6 / GPIO_S0_SC_23
MMC1_D7 / GPIO_S0_SC_24

.1U_0402_16V7K 1
.1U_0402_16V7K 1

AT10 PCIE_PRX_DTX_P1
AT9 PCIE_PRX_DTX_N1

PCIE_TXP_3
PCIE_TXN_3

SATA_RCOMP_P
SATA_RCOMP_N

PCIE_PTX_C_DRX_P0
PCIE_PTX_C_DRX_N0
PCIE_PRX_DTX_P0
PCIE_PRX_DTX_N0

AV6 PCIE_PTX_DRX_P1
AV4 PCIE_PTX_DRX_N1

PCIE_TXP_1
PCIE_TXN_1

SATA_RXP_1
SATA_RXN_1

2 C1133
2 C1134

AT14 PCIE_PRX_DTX_P0
AT13 PCIE_PRX_DTX_N0

PCIE_RXP_0
PCIE_RXN_0

SATA_TXP_1
SATA_TXN_1

.1U_0402_16V7K 1
.1U_0402_16V7K 1

1

<21>
<21>

SATA_PRX_DTX_P0
SATA_PRX_DTX_N0

AY7 PCIE_PTX_DRX_P0
AY6 PCIE_PTX_DRX_N0

PCIE_TXP_0
PCIE_TXN_0

R977
10K_0402_5%

<23>

GPIO_S0_SC_63

R978
10K_0402_5%
GPIO_S0_SC_65

@EMC@
C1002
10P_0402_50V8J

2

ODD

AU16
AV16

SATA_TXP_0
SATA_TXN_0

EC programing :
"High"for Flash BIOS

1

<21>
<21>

D

SATA_PTX_DRX_P0
SATA_PTX_DRX_N0

1

<21>
<21>

2

HDD

BF6
BG7

D

2

TXE_DBG

G

3

S

R980
10K_0402_5%
1
2

<23>

Q62
MESS138W-G_SOT323-3

Pull High 10k at LED Page
2
1

3
S

SOC_SATALED#

D

<24>

A

G

A

SATA_LED#_SOC

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Q63
MESS138W-G_SOT323-3

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Date:
5

4

3

2

VLV-M SOC SATA/PCI-E/HDA
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
1

7

of

37

5

4

3

2

XTAL_25M_IN

+1.8VS

1

+3VS

2

GND
4

2

2

1
PMC_PLTRST# 2

C1004
10P_0402_25V8K

R982
4.7K_0402_5%

U53

NC

4

Y

R983
2.2K_0402_5%

3.3V

2

P

1

1.8V

PLT_RST_BUF#

<19,20,23,24>

2

GND

XTAL_25M_OUT
1

G

C1003
10P_0402_25V8K

D

3

3

A

3

1

2

1

5

Y7
25MHZ_10PF_7V25000014

1

1

1

+1.8VALW
R981
1M_0402_5%

D40

PMC_ACIN

2

NL17SZ07DFT2G_SC70-5
SA00004BV00

1

ACIN

<23,30>
D

RB751V40_SC76-2

PLT_RST Buffer
USOC1E

<19>
<19>

LAN
WLAN

<20>
<20>

AF6
AF4

CLK_PCIE_LAN#
CLK_PCIE_LAN

AF9
AF7

CLK_PCIE_WLAN#
CLK_PCIE_WLAN

AK4
AK6
AM4
AM6

Close To SOC <1000mil

+1.8VALW

2 51_0402_5% XDP_H_PRDY#
2 51_0402_5% XDP_H_TDO
2 200_0402_5% XDP_H_PREQ_BUF#

R989 1 XDP@
R1026 1 XDP@
R1024 1 XDP@
RP52

C

4
3
2
1

AM9
AM10

XDP_H_TDI
XDP_H_TMS
XDP_H_TCK
XDP_H_TRST#

5
6
7
8

BH7
BH5
BH4
BH8
BH6
BJ9

51_0804_8P4R_5%
XDP@
XDP_H_TCK
XDP_H_TRST#
XDP_H_TMS
XDP_H_TDI
XDP_H_TDO
XDP_H_PRDY#
XDP_H_PREQ_BUF#
SOC_SPI_CS0#
T193

SPI_CS0#
SPI_MISO
SPI_MOSI
SPI_CLK

RP48
1
2
3
4

8
7
6
5

SOC_SPI_CS0#
SOC_SPI_MISO
SOC_SPI_MOSI
SOC_SPI_CLK

SOC_SPI_MISO
SOC_SPI_MOSI
SOC_SPI_CLK
SOC_KBRST#

22_0804_8P4R_5%
EMC@

SOC_LID_OUT#
SOC_SMI#

D14
G12
F14
F12
G16
D18
F16
AT34
C23
C21
B22
A21
C22
B18
B16
C18
A17
C17
C16
B14
C15

C13
A13
C19

B

1 R995
2 GPIO_RCOMP
49.9_0402_1%

N26

ICLK_ICOMP
ICLK_RCOMP

SIO_UART2_RXD / GPIO_S0_SC_74
SIO_UART2_TXD / GPIO_S0_SC_75
SIO_UART2_RTS# / GPIO_S0_SC_76
SIO_UART2_CTS# / GPIO_S0_SC_77

RESERVED_AD10
RESERVED_AD12
PCIE_CLKN_0
PCIE_CLKP_0

PMC_SUSPWRDNACK / GPIO_S5_11
PMC_SUSCLK_0 / GPIO_S5_12
PMC_SLP_S0IX# / GPIO_S5_13
PMC_SLP_S4#
PMC_SLP_S3#
GPIO_S5_14
PMC_ACPRESENT
PMC_WAKE_PCIE_0# / GPIO_S5_15
PMC_BATLOW#
PMC_PWRBTN# / GPIO_S5_16
PMC_RSTBTN#
PMC_PLTRST#
GPIO_S5_17
PMC_SUS_STAT# / GPIO_S5_18

PCIE_CLKN_1
PCIE_CLKP_1
PCIE_CLKN_2
PCIE_CLKP_2
PCIE_CLKN_3
PCIE_CLKP_3
RESERVED_AM9
RESERVED_AM10

ILB_RTC_TEST#
ILB_RTC_RST#

PMC_PLT_CLK_0 / GPIO_S0_SC_96
PMC_PLT_CLK_1 / GPIO_S0_SC_97
PMC_PLT_CLK_2 / GPIO_S0_SC_98
PMC_PLT_CLK_3 / GPIO_S0_SC_99
PMC_PLT_CLK_4 / GPIO_S0_SC_100
PMC_PLT_CLK_5 / GPIO_S0_SC_101

PMC_RSMRST#
PMC_CORE_PWROK

RTC

1
2
3
4

8
7
6
5

+1.8VALW

D26
G24
F18
F22
D22
J20
D20
F26
K26
J26
BG9
F20
J24
G18

+3VALW_EC
U54
2

10K_0804_8P4R_5%
PMC_SLP_S3#
PMC_SLP_S4#
SOC_KBRST#
SOC_LID_OUT#
SOC_SERIRQ
SOC_SMI#
SOC_SCI#
PMC_PWRBTN#

FOR EMI/ESD Require 01/15

PMC_SUSCLK

T192

PMC_SLP_S4#
PMC_SLP_S3#
GPIO_S5_14
PMC_ACIN
PMC_PCIE_WAKE#
PMC_BATLOW#
PMC_PWRBTN#
PMC_RSTBTN#
PMC_PLTRST#
GPIO_S5_17

32.768k

output
<9>

SOC_SERIRQ

<7>

SOC_SCI#

PMC_PLTRST# 1
2
C1006
EMC@
.1U_0402_16V7K

T209

LS_OE

1
3
4
5
6
7
8
9
10

VCCA

19

VCCB

A1
A2
A3
A4
A5
A6
A7
A8

B1
B2
B3
B4
B5
B6
B7
B8

OE

GND

20
18
17
16
15
14
13
12

EC_SLP_S3#
<23>
EC_SLP_S4#
<23>
EC_KBRST#
<23>
EC_LID_OUT#
<23>
EC_SERIRQ
<23,24>
EC_SMI# <23>
EC_SCI#
<23>
PBTN_OUT# <23>

11

TXB0108PWR_TSSOP20

T205

C11 RTC_TEST#
C12 RTC_RST#

EC_RSMRST#

B10 EC_RSMRST#
PMC_CORE_PWROK
B7

EC_RSMRST#

C

1
R990

2
100K_0402_5%

1
2
C1155
EMC@
.1U_0402_16V7K

<23>
+1.0VS

domain
ILB_RTC_X1
ILB_RTC_X2
ILB_RTC_EXTPAD
RTC_VCC_P22

TAP_TCK
TAP_TRST#
TAP_TMS
TAP_TDI
TAP_TDO
TAP_PRDY#
TAP_PREQ#
RESERVED_AT34

SVID_ALERT#
SVID_DATA
SVID_CLK

PCU_SPI_CS_0#
PCU_SPI_CS_1# / GPIO_S5_21
PCU_SPI_MISO
PCU_SPI_MOSI
PCU_SPI_CLK

PMC_PCIE_WAKE#
PMC_BATLOW#
GPIO_S5_14
LS_OE

BF34
BD34
BD32
BF32

SIO_PWM_0 / GPIO_S0_SC_94
SIO_PWM_1 / GPIO_S0_SC_95

C9 ILB_RTC_X1
ILB_RTC_X2
A9
ILB_RTC_EXTPAD
B8
P22
+RTCVCC
B24 VR_SVID_ALERT#_SOC
A25 VR_SVID_DATA_SOC
C25

1
2
C1008
.1U_0402_16V7K
R1065 1
R1066 1

PMC_CORE_PWROK 1
2
C1007
EMC@
0.047U_0402_25V7K

R1064
73.2_0402_1%
2 20_0402_1%
2 16.9_0402_1%

VR_SVID_ALERT#
<35>
VR_SVID_DATA
<35>
VR_SVID_CLK
<35>
+3VALW

AU32
AT32

+1.35VS
1

AD10
AD12

RESERVED_AD9

1
2
C1174
@EMC@
0.01U_0402_16V7K

GPIO_S5_0
GPIO_S5_1 / PMC_WAKE_PCIE_1
GPIO_S5_2 / PMC_WAKE_PCIE_2
GPIO_S5_3 / PMC_WAKE_PCIE_3
GPIO_S5_4
GPIO_S5_5 / PMU_SUSCLK_1
GPIO_S5_6 / PMU_SUSCLK_2
GPIO_S5_7 / PMU_SUSCLK_3

GPIO_S5_22
GPIO_S5_23
GPIO_S5_24
GPIO_S5_25
GPIO_S5_26
GPIO_S5_27
GPIO_S5_28
GPIO_S5_29
GPIO_S5_30

GPIO_S5_8
GPIO_S5_9
GPIO_S5_10
GPIO_RCOMP

5 OF 13

SIO_SPI_CS# / GPIO_S0_SC_66
SIO_SPI_MISO / GPIO_S0_SC_67
SIO_SPI_MOSI / GPIO_S0_SC_68
SIO_SPI_CLK / GPIO_S0_SC_69

ILB_RTC_X1
ILB_RTC_X2

K24
N24
M20
J18
M18
K18
K20
M22
M24

3.3V
1
2
R994
10M_0402_5%

<23>

1

NC

Y

2

PMC_CORE_PWROK

A

32.768KHZ_12.5PF_Q13FC135000040
2
Y8 1
1

AV32
BA28
AY28
AY30

2

R993
10K_0402_5%

U55
4

1.35V

2

AD14
AD13

+1.8VALW
RP47

5

ICLK_ICOMP
ICLK_RCOMP

PLT_RST_BUF#

AU34
AV34
BA34
AY34

P

2 4.02K_0402_1%
2 47.5_0402_1%

SIO_UART1_RXD / GPIO_S0_SC_70
SIO_UART1_TXD / GPIO_S0_SC_71
SIO_UART1_RTS# / GPIO_S0_SC_72
SIO_UART1_CTS# / GPIO_S0_SC_73

DDR_CORE_PWROK

<5>

G

R984 1
R985 1

ICLK_OSCIN
ICLK_OSCOUT

3

AD9

1

AH12
AH10

2

XTAL_25M_IN
XTAL_25M_OUT

NL17SZ07DFT2G_SC70-5
SA00004BV00

1
C1009
15P_0402_50V8J

2

DDR_CORE_PWROK

C1010
15P_0402_50V8J

B

1
2
C1158
EMC@
0.01U_0402_16V7K

0705:for

ESD

request

FH8065301546401_FCBGA131170

+RTCBATT1

R1001 1

2 3.3K_0402_5%
2 3.3K_0402_5%

SPI_CS0#
SPI_MISO
SPI_WP#

C1013

1

2 0_0402_5%
2 .1U_0402_16V7K

R996
20K_0402_1%
1
2

2

1
2
R997
20K_0402_1%

1

CS#
VCC
DO(IO1) HOLD#(IO3)
WP#(IO2)
CLK
GND
DI(IO0)

R1000 1
SPI_HOLD#
SPI_CLK
SPI_MOSI

2 3.3K_0402_5%

+RTCBATT_R

1

RTC_RST#

2

Reserve for EMI(Near SPI ROM)

2

3
BAS40-04_SOT23-3

1

C1012
1U_0402_6.3V6K

2

20mil

20mil
+RTCVCC
C151
.1U_0402_16V7K

D32 @
BAV70W-7-F_SOT323-3

2

W25Q64DWSSIG_SO8

8
7
6
5

+RTCVCC

D22

RTC_TEST#

U56
1
2
3
4

+CHGRTC

+RTCBATT1
@
R446
1K_0402_5%
1
2

1

+RTCBATT
C1011
1U_0402_6.3V6K

+CHGRTC

3

R999 1

R998 1 RS@

SPI ROM ( 8MByte ) 1.8V

W=20mils

2

+RTCVCC
+BIOS_SPI

trace width 10mil

+

1

-

W=20mils

+1.8VALW

1

+BIOS_SPI

2
1
R1002
@EMC@
33_0402_5%

CLR_CMOS
1

1
2
C1014
@EMC@
10P_0402_50V8J

SPI_CLK

2

A

SP@
CLRP1
SHORT PADS

JBATT1 @
LOTES_AAA-BAT-054-K01
SP07000H700

RTC_TEST#

1
2
R1088
0_0402_5%
RTC_RST#
1
2
@
R1089
0_0402_5%

A

Clear CMOS
Close to RAM door

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C

Date:
5

4

3

2

VLV-M SOC CLK/PMU/SPI
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013
1

Sheet

8

of

37

5

4

3

2

1

USOC1F

D

G2
M3
L1
K2
K3
M2
N3
P2
L3

J3
P3
H3
B12

USB2 Port 0 (USB3.0 P0)

<22>
<22>

USB20_P0
USB20_N0

USB Hub

<22>
<22>

USB20_P1
USB20_N1

Touch Panel

<16>
<16>

USB20_P2
USB20_N2

Camera

<16>
<16>

USB20_P3
USB20_N3

M16
K16
J14
G14
K12
J12
K10
H10
1
1

1K_0402_1%
1K_0402_1%

2 R1004 ICLK_USB_TERMP
2 R1005 ICLK_USB_TERMN

D10
F10

D

GPIO_S5_31

RESERVED_M10
RESERVED_M9

GPIO_S5_32
GPIO_S5_33
GPIO_S5_34
GPIO_S5_35
GPIO_S5_36
GPIO_S5_37
GPIO_S5_38
GPIO_S5_39

RESERVED_P6
RESERVED_P7
RESERVED_M7
USB3_REXT0
RESERVED_P10
RESERVED_P12
RESERVED_M4
RESERVED_M6

GPIO_S5_40
GPIO_S5_41
GPIO_S5_42
GPIO_S5_43

USB3_RXP0
USB3_RXN0
USB3_TXP0
USB3_TXN0

USB_DP0
USB_DN0

USB_OC1#

C20
B20

M7
M12 USB3_REXT0

1

P10
P12

2
R1003
1.24K_0402_1%

M4
M6
D4
E3

PCH_USB3_RX0_P
PCH_USB3_RX0_N

K6
K7

PCH_USB3_TX0_P
PCH_USB3_TX0_N

<22>
<22>

USB3 Port 0

<22>
<22>

USB_DP2
USB_DN2
USB_DP3
USB_DN3

RESERVED_H8
RESERVED_H7

ICLK_USB_TERMP
ICLK_USB_TERMN

RESERVED_H4
RESERVED_H5

H8
H7
H4
H5

+1.8VS
C

USB_OC_0# / GPIO_S5_19
USB_OC_1# / GPIO_S5_20

1

USB_OC0#

P6
P7

USB_DP1
USB_DN1

C

<22>

M10
M9

2

USB_RCOMP

R1010 1
@
0_0402_5%

2

USB_PLL_MON

D6
C7
M13

B4
B5

NOTE: Ref checklist rev1.0 p.25
USB_HSIC_RCOMP must NOT float if they are not being used.
1
R1012
49.9_0402_1% 1

ILB_LPC_CLK_0
:
Output
Need
Check
with
EC

of

<23,24>
<23,24>
<23,24>
<23,24>
<23,24>
<23>
<24>

25MHz,

ILB_LPC_CLK_1 is for CLK_0 feedback.(Input)
Set to Outpot for Normal Usage

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_CLK_EC
LPC_CLK_TPM

<8>

22_0402_5% 1 EMC@
22_0402_5% 1 EMC@

SOC_SERIRQ

HSIC_RCOMP
2
45.3_0402_1%

E2
D2
A7

2 R1013 LPC_RCOMP

BF18
BH16
BJ17
BJ13
BG14
BG17
BG15
2 R1014 LPC_CLK_0
LPC_CLK_1
2 R1015
BH14
LPC_CLKRUN# BG16
BG13

USB_RCOMPO
USB_RCOMPI

GPIO_S0_SC_55
GPIO_S0_SC_56
GPIO_S0_SC_57 / PCU_UART_TXD
GPIO_S0_SC_58
GPIO_S0_SC_59
GPIO_S0_SC_60
GPIO_S0_SC_61 / PCU_UART_RXD

USB_PLL_MON

BD12
BC12
BD14
BC14
BF14
BD16
BC16

GPIO_S0_SC_56
DBG_UART_TXD

DBG_UART_RXD

T203

1

R1008 1
45.3_0402_1%

T204

@
R1011
10K_0402_5%

GPIO_S0_SC_56:
A16 Swap Override
0 = Enable
1 = Disable
Reference EDS Page 216

2

2 10K_0402_5% USB_OC0#
2 10K_0402_5% USB_OC1#

R1007 1
R1009 1

@
R1006
10K_0402_5%

2

+1.8VALW

USB_HSIC0_DATA
USB_HSIC0_STROBE

ILB_8254_SPKR / GPIO_S0_SC_54

USB_HSIC1_DATA
USB_HSIC1_STROBE
SIO_I2C0_DATA / GPIO_S0_SC_78
SIO_I2C0_CLK / GPIO_S0_SC_79

BH12

SOC_SPKR
SOC_SPKR

<25>

BH22
BG23

USB_HSIC_RCOMP
SIO_I2C1_DATA / GPIO_S0_SC_80
SIO_I2C1_CLK / GPIO_S0_SC_81
LPC_RCOMP / VGA_RCOMP
ILB_LPC_AD_0 / GPIO_S0_SC_42
ILB_LPC_AD_1 / GPIO_S0_SC_43
ILB_LPC_AD_2 / GPIO_S0_SC_44
ILB_LPC_AD_3 / GPIO_S0_SC_45
ILB_LPC_FRAME# / GPIO_S0_SC_46
ILB_LPC_CLK_0 / GPIO_S0_SC_47
ILB_LPC_CLK_1 / GPIO_S0_SC_48
ILB_LPC_CLKRUN# / GPIO_S0_SC_49
ILB_LPC_SERIRQ / GPIO_S0_SC_50

SIO_I2C2_DATA / GPIO_S0_SC_82
SIO_I2C2_CLK / GPIO_S0_SC_83
SIO_I2C3_DATA / GPIO_S0_SC_84
SIO_I2C3_CLK / GPIO_S0_SC_85
SIO_I2C4_DATA / GPIO_S0_SC_86
SIO_I2C4_CLK / GPIO_S0_SC_87

B

BG24
BH24
BG25
BJ25
BG26
BH26
BF27
BG27

B

+3VS
2

Check Intel for PU
1

TPM@
R1016
8.2K_0402_5%

<24>

PCU_SMB_DATA
PCU_SMB_CLK
PCU_SMB_ALERT#
LPC_CLK_0
2
1
C1015
@EMC@
10P_0402_50V8J

LPC_CLKRUN#

LPC_CLKRUN#

BG12
BH10
BG11

SIO_I2C5_DATA / GPIO_S0_SC_88
SIO_I2C5_CLK / GPIO_S0_SC_89

PCU_SMB_DATA / GPIO_S0_SC_51
PCU_SMB_CLK / GPIO_S0_SC_52
PCU_SMB_ALERT# / GPIO_S0_SC_53

SIO_I2C6_DATA / GPIO_S0_SC_90
SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP

LPC_CLK_1
2
1
C1016
@EMC@
10P_0402_50V8J

GPIO_S0_SC_092
GPIO_S0_SC_093

6 OF 13

BH28
BG28

SOC_I2C0_DATA
SOC_I2C0_CLK

BJ29
BG29
BH30
BG30

T207
T208

0705 : Reserved
GPIO_S0_SC_92
GPIO_S0_SC_93

T201
T202

PDA (Platform Debug Assistant) Test Points

FH8065301546401_FCBGA131170

+1.8VS

+1.8VS
RP49
5
6
7
8

4
3
2
1

PCU_SMB_CLK
PCU_SMB_DATA
PCU_SMB_ALERT#

1

4.7K_0804_8P4R_5%
PCU_SMB_CLK

3
S

D

2
EC_SMB_DA2

D

<14,15,20,23>

A

G

DDR(15,16)
Minicard(21)
EC(24)

1

EC_SMB_CK2

Q64
MESS138W-G_SOT323-3
PCU_SMB_DATA

3
S

<14,15,20,23>

G

2

Pull High at EC side

Q65
MESS138W-G_SOT323-3

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C

Date:
5

4

3

2

VLV-M SOC USB/LPC/SMBus
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013
1

Sheet

9

of

37

5

4

3

2

1

+1.35V

12A

+SOC_VCC

USOC1G
AA27
AA29
AA30
AC27
AC29
AC30

D

AD27
AD29
AD30
AF27
AF29
AG27
AG29
AG30
P26
P27
U27
U29
V27
V29
V30
Y27
Y29
Y30
C

TP2_CORE_VCC_S0iX

T194

AA22

20mil

CORE_VCC_S0iX_AA27
CORE_VCC_S0iX_AA29
CORE_VCC_S0iX_AA30
CORE_VCC_S0iX_AC27
CORE_VCC_S0iX_AC29
CORE_VCC_S0iX_AC30

DRAM_VDD_S4_AD38
DRAM_VDD_S4_AF38
DRAM_VDD_S4_A48
DRAM_VDD_S4_AK38
DRAM_VDD_S4_AM38
DRAM_VDD_S4_AV41
DRAM_VDD_S4_AV42
DRAM_VDD_S4_BB46
DRAM_VDD_S4_BD49
DRAM_VDD_S4_BD52
DRAM_VDD_S4_BD53
DRAM_VDD_S4_BF44
DRAM_VDD_S4_BG51
DRAM_VDD_S4_BJ48
DRAM_VDD_S4_C51
DRAM_VDD_S4_D44
DRAM_VDD_S4_F49
DRAM_VDD_S4_F52
DRAM_VDD_S4_F53
DRAM_VDD_S4_H46
DRAM_VDD_S4_M41
DRAM_VDD_S4_M42
DRAM_VDD_S4_V38
DRAM_VDD_S4_Y38

CORE_VCC_S0iX_AD27
CORE_VCC_S0iX_AD29
CORE_VCC_S0iX_AD30
CORE_VCC_S0iX_AF27
CORE_VCC_S0iX_AF29
CORE_VCC_S0iX_AG27
CORE_VCC_S0iX_AG29
CORE_VCC_S0iX_AG30
CORE_VCC_S0iX_P26
CORE_VCC_S0iX_P27
CORE_VCC_S0iX_U27
CORE_VCC_S0iX_U29
CORE_VCC_S0iX_V27
CORE_VCC_S0iX_V29
CORE_VCC_S0iX_V30
CORE_VCC_S0iX_Y27
CORE_VCC_S0iX_Y29
CORE_VCC_S0iX_Y30

AD38
AF38
A48
AK38
AM38
AV41
AV42
BB46
BD49
BD52
BD53
BF44
BG51
BJ48
C51
D44
F49
F52
F53
H46
M41
M42
V38
Y38

DRAM_VDD_S4_CLK R1017 1 RS@
C1017 1
C1018 1

JP3 JP@
2 0_0402_5%
JUMP_43X118
JP4 JP@

2 1U_0402_6.3V6K
2 .1U_0402_16V7K

D

JUMP_43X118

1250mA
+1.35V_SOC
+1.35V_SOC
C1019 2
C1020 2
C1021 2
C1022 2

1
1
1
1

C1147 1
C1148 1

2 10U_0603_6.3V6M
2 10U_0603_6.3V6M

2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M

C

TP2_CORE_VCC_S0iX
+1.35VS

14A +SOC_VNN
420mA

BB8
P28
N28

VGFX_VSNS
VCORE_VSNS
VCORE_GSNS

DRAM_V1P35_S0iX_F1_AD36
UNCORE_V1P35_S0iX_F2_AG32
UNCORE_V1P35_S0iX_F3_V36
UNCORE_V1P35_S0iX_F4_U36

VGA_V1P35_S3_F1

1
L49

AD36

@

C1023 1
C1182 1

2
BLM15AG601SN1D_2P

@

2 10U_0603_6.3V6M
2 22U_0805_6.3V6M

0708:Change

Size

0705 : For CRT Flicker

AG32
V36
U36

0715 Add for CRT fliker

AA25

+3VALW

U65

VGA_V1P35_S3_F1

5

OUT

IN

1

UNCORE_V1P35_S0iX_F5_AA25

BD1

GND

UNCORE_V1P35_S0iX_F6_AF19
UNCORE_VNN_SENSE
UNCORE_V1P35_S0iX_F1_AG19
CORE_VCC_SENSE_P28 7 OF 13
CORE_VSS_SENSE_N28

AF19
AG19

C1024 1
C1025 1
C1026 1
C1027 1
C1028 1
C1029 1
C1030 1
C1031 1
C1032 1
C1033 1

1

<35>
<35>
<35>

VGA_V1P35_S3_F1_BD1

AG18
AJ19

FH8065301546401_FCBGA131170

2

R1020
100_0402_1%

2
2
2
2
2
2
2
2
2
2

4

R1084
8.06K_0402_1%

22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K

BYP

SHDN

1
2

1

3

C1179
1U_0402_6.3V6K

2

G916T1UF_SOT23-5

2

B

ICLK_V1P35_S3_F2_AG18
ICLK_V1P35_S3_F1_AJ19

B

1

2

R1019
100_0402_1%
2

R1018
100_0402_1%

UNCORE_VNN_S3_AM22
UNCORE_VNN_S3_AK32
UNCORE_VNN_S3_AK30
UNCORE_VNN_S3_AK29
UNCORE_VNN_S3_AK27
UNCORE_VNN_S3_AK25
UNCORE_VNN_S3_AK24
UNCORE_VNN_S3_AK22
UNCORE_VNN_S3_AJ24
UNCORE_VNN_S3_AJ22
UNCORE_VNN_S3_AG24
UNCORE_VNN_S3_AG22
UNCORE_VNN_S3_AF24
UNCORE_VNN_S3_AF22
UNCORE_VNN_S3_AD22
UNCORE_VNN_S3_AC24
UNCORE_VNN_S3_AC22
UNCORE_VNN_S3_AA24
UNCORE_VNN_S3_AD24

R1085
100K_0402_1%
2

+SOC_VCC

1

1

+SOC_VNN

AM22
AK32
AK30
AK29
AK27
AK25
AK24
AK22
AJ24
AJ22
AG24
AG22
AF24
AF22
AD22
AC24
AC22
AA24
AD24

<23,26,30,32,33,34>

VOUT

2
1
R1087
36K_0402_5%

SUSP#

= 1.25 (1 + R1/R2).

1
C1181
.1U_0402_16V7K

2

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Date:
5

4

3

2

VLV-M SOC Power
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
1

10

of

37

5

4

3

2

1

D

D

Follow

CRBv1.15
R1021 RS@
0_0402_5%
1
2

USOC1H

325mA
+1.0VALW
UNCORE_V1P0_G3

USB3_V1P0_G3

1uF*4

0.01uF*1

C1034
C1035
C1036
C1037

1
1
1
1

2
2
2
2

C1039

1

2 0.01U_0402_16V7K

1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K

U22
V22
C5
B6
Y19
C3

UNCORE_V1P0_G3_U22
UNCORE_V1P0_G3_V22
UNCORE_V1P0_G3_C5
UNCORE_V1P0_G3_B6
USB3_V1P0_G3_Y19
USB3_V1P0_G3_C3

2750mA
+1.0VS

DRAM_V1P0_S0iX

1uF*4

C

DDI_V1P0_S0iX 1uF*4

UNCORE_V1P0_S0iX

22uF*3
1uF*2

PCIE_SATA_V1P0_S3 1uF*1
UNCORE_V1P0_S3 1uF*1
PCIE_V1P0_S3 1uF*1
VGA_V1P0_S3 1uF*1
USB_V1P0_S3 0.1uF*1
USB3DEV_V1P0_S3 0.01uF*1
GPIO_V1P0_S3 1uF*1
SVID_V1P0_S3 1uF*1

C1043
C1044
C1046
C1047

1
1
1
1

2
2
2
2

1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K

C1048
C1049
C1050
C1052

1
1
1
1

2
2
2
2

1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K

C1056 1
C1057 1
C1059 1
C1060 1
C1061 1

2
2
2
2
2

22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K

C1062 1
C1064 1
C1066 1
C1068 1
C1069 1
C1070 1
C1071 1
C1072 1

2
2
2
2
2
2
2
2

1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
0.01U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K

B

V32
BJ6
AD35
AF35
AF36
AA36
AJ36
AK35
AK36
Y35
Y36
AK19
AK21
AJ18
AM16
AN29
AN30
V24
Y22
Y24
AF16
AF18
Y18
G1
AK18
AM18
AM21
AN21
AN18
AN19
AF21
AG21
M14
U18
U19
AN25

SVID_V1P0_S3_V32
VGA_V1P0_S3_BJ6
DRAM_V1P0_S0iX_AD35
DRAM_V1P0_S0iX_AF35
DRAM_V1P0_S0iX_AF36
DRAM_V1P0_S0iX_AA36
DRAM_V1P0_S0iX_AJ36
DRAM_V1P0_S0iX_AK35
DRAM_V1P0_S0iX_AK36
DRAM_V1P0_S0iX_Y35
DRAM_V1P0_S0iX_Y36
DDI_V1P0_S0iX_AK19
DDI_V1P0_S0iX_AK21
DDI_V1P0_S0iX_AJ18
DDI_V1P0_S0iX_AM16
VIS_V1P0_S0iX_AN29
VIS_V1P0_S0iX_AN30
VIS_V1P0_S0iX_V24
VIS_V1P0_S0iX_Y22
VIS_V1P0_S0iX_Y24
UNCORE_V1P0_S3_AF16
UNCORE_V1P0_S3_AF18
UNCORE_V1P0_S3_Y18
UNCORE_V1P0_S3_G1
PCIE_V1P0_S3_AK18
PCIE_V1P0_S3_AM18
PCIE_V1P0_S3_AM21
PCIE_V1P0_S3_AN21
PCIE_SATA_V1P0_S3_AN18
SATA_V1P0_S3_AN19
UNCORE_V1P0_S0iX_AF21
UNCORE_V1P0_S0iX_AG21
USB_V1P0_S3_M14
USB_V1P0_S3_U18
USB_V1P0_S3_U19
GPIO_V1P0_S3_AN25

1000mA
CORE_V1P0_S3_AC32
CORE_V1P0_S3_Y32
CORE_V1P05_S3_AA33
CORE_V1P05_S3_AF33
CORE_V1P05_S3_AG33
CORE_V1P05_S3_AG35
CORE_V1P05_S3_U33
CORE_V1P05_S3_U35
CORE_V1P05_S3_V33

F1
TP_CORE_V1P05_S4 AF30

AA33
AF33
AG33
AG35
U33
U35
V33

C1038 1

2 0.47U_0402_6.3V6K

C1040 1
C1041 1
C1042 1

2 1U_0402_6.3V6K
2 1U_0402_6.3V6K
2 1U_0402_6.3V6K

+1.05VS

CORE_V1P05_S3 1uF*3

+1.8VALW
UNCORE_V1P8_G3_U24
PCU_V1P8_G3_V25
USB_V1P8_G3_N20
65mA PMU_V1P8_G3_U25
UNCORE_V1P8_G3_AA18

U24
V25
N20
U25
AA18

C1045 1

2 1U_0402_6.3V6K

PMC_V1P8_G3 1uF*1
C

+1.8VS

10mA
UNCORE_V1P8_S3_AM30
UNCORE_V1P8_S3_AN32
UNCORE_V1P8_S3_U38

AM30
AN32
U38

C1051 1
C1053 1
C1054 1
C1055 1

2
2
2
2

C1058 1

2 1U_0402_6.3V6K

UNCORE_V1P8_S3

1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K

1uF*4

+1.5VS

58mA
HDA_V1P5_S3_AM32

50mA PCU_V3P3_G3_N22
USB_V3P3_G3_N18
USB_V3P3_G3_P18

33mA
VGA_V3P3_S3_AN24
SD3_V1P8V3P3_S3_AN27
LPC_V1P8V3P3_S3_AM27

AM32
HDA_LPE_V1P5V1P8_S3

N22 +3VALW_SOC
1 RS@
2
R1022
0_0603_5%
2 .1U_0402_16V7K
N18
C1063 1
P18
2 1U_0402_6.3V6K
C1065 1
2 1U_0402_6.3V6K
C1067 1
AN24 +3VS_SOC

1 RS@
R1023

1uF*1

+3VALW

USB_V3P3_G3 0.1uF*1
USB_ULPI_V1P8_S3 1uF*1
PCU_V3P3_G3 1uF*1

+3VS

2
0_0603_5%

AN27
AM27

1
C1073

B

VGA_V3P3_S3 1uF*1

2
1U_0402_6.3V6K

+1.0VALW

35mA
USB_HSIC_V1P2_G3_V18

T195

AC32
Y32

+1.05VS_SOC

RESERVED_F1

VSS_AD16
VSS_AD18

USB_HSIC_V1P2_G3

V18
C1074 1
@
AD16
AD18

2 1U_0402_6.3V6K

1uF*1

Disable HSIC
If the USB HSIC is not used, pin V18 can be connected
to either +V1P2A or +V1P0A.

Pop when use +1.2VALW

TP_CORE_V1P05_S4_AF30
8 OF 13
FH8065301546401_FCBGA131170

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VLV-M SOC Power
Size
B

Date:
5

4

3

2

Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
1

11

of

37

5

4

3

2

1

D

D

USOC1I

C

B

A11
A15
A19
A23
A27
A31
A35
A39
A43
A47
AA1
AA16
AA19
AA21
AA3
AA32
AA35
AA38
AA53
AB10
AB4
AB41
AB45
AB47
AB48
AB50
AB51
AB6
AC16
AC18
AC19
AC21
AC25
AC33
AC35
B2
A6
A52
A51
A5
A49
A3
BH53
BH52
BH2
BH1
BG53
E53
U16
AN16

VSS_A11
VSS_A15
VSS_A19
VSS_A23
VSS_A27
VSS_A31
VSS_A35
VSS_A39
VSS_A43
VSS_A47
VSS_AA1
VSS_AA16
VSS_AA19
VSS_AA21
VSS_AA3
VSS_AA32
VSS_AA35
VSS_AA38
VSS_AA53
VSS_AB10
VSS_AB4
VSS_AB41
VSS_AB45
VSS_AB47
VSS_AB48
VSS_AB50
VSS_AB51
VSS_AB6
VSS_AC16
VSS_AC18
VSS_AC19
VSS_AC21
VSS_AC25
VSS_AC33
VSS_AC35
VSS_B2
VSS_A6
VSS_A52
VSS_A51
VSS_A5
VSS_A49
VSS_A3
VSS_BH53
VSS_BH52
VSS_BH2
VSS_BH1
VSS_BG53
VSS_E53

USOC1J
VSS_AC36
VSS_AC38
VSS_AD19
VSS_AD21
VSS_AD25
VSS_AD32
VSS_AD33
VSS_AD47
VSS_AD7
VSS_AE1
VSS_AE11
VSS_AE12
VSS_AE14
VSS_AE3
VSS_AE4
VSS_AE40
VSS_AE42
VSS_AE43
VSS_AE45
VSS_AE46
VSS_AE48
VSS_AE50
VSS_AE51
VSS_AE53
VSS_AE6
VSS_AE8
VSS_AE9
VSS_AF10
VSS_AF12
VSS_AF25
VSS_AF32
VSS_AF47
VSS_AG16
VSS_AG25
9 OF 13VSS_AG36
VSS_B52
VSS_B53
VSS_BE1
VSS_BE53
VSS_BG1
VSS_BJ2
VSS_BJ3
VSS_BJ5
VSS_BJ49
VSS_BJ51
VSS_BJ52
VSS_C1
VSS_C53
VSS_E1

AC36
AC38
AD19
AD21
AD25
AD32
AD33
AD47
AD7
AE1
AE11
AE12
AE14
AE3
AE4
AE40
AE42
AE43
AE45
AE46
AE48
AE50
AE51
AE53
AE6
AE8
AE9
AF10
AF12
AF25
AF32
AF47
AG16
AG25
AG36
B52
B53
BE1
BE53
BG1
BJ2
BJ3
BJ5
BJ49
BJ51
BJ52
C1
C53
E1

AG38
AH4
AH41
AH45
AH7
AH9
AJ1
AJ16
AJ21
AJ25
AJ27
AJ29
AJ3
AJ30
AJ32
AJ33
AJ35
AJ38
AJ53
AK10
AK14
AK16
AK33
AK41
AK44
AM12
AM19
AM24
AM25
AM29
AM33
AM35
AM36
AM40
M28

USOC1K

VSS_AG38
VSS_AH47
VSS_AH4
VSS_AH48
VSS_AH41
VSS_AH50
VSS_AH45
VSS_AH51
VSS_AH7
VSS_AH6
VSS_AH9
VSS_AM44
VSS_AJ1
VSS_AM51
VSS_AJ16
VSS_AM7
VSS_AJ21
VSS_AN1
VSS_AJ25
VSS_AN11
VSS_AJ27
VSS_AN12
VSS_AJ29
VSS_AN14
VSS_AJ3
VSS_AN22
VSS_AJ30
VSS_AN3
VSS_AJ32
VSS_AN33
VSS_AJ33
VSS_AN35
VSS_AJ35
VSS_AN36
VSS_AJ38
VSS_AN38
VSS_AJ53
VSS_AN40
VSS_AK10
VSS_AN42
VSS_AK14
VSS_AN43
VSS_AK16
VSS_AN45
VSS_AK33
VSS_AN46
VSS_AK41
VSS_AN48
VSS_AK44
VSS_AN49
VSS_AM12
VSS_AN5
VSS_AM19
VSS_AN51
VSS_AM24
VSS_AN53
VSS_AM25
VSS_AN6
VSS_AM29
VSS_AN8
VSS_AM33
VSS_AN9
VSS_AM35
VSS_AP40
VSS_AM36
VSS_AT12
VSS_AM40
VSS_AT16
VSS_M28 10 OF 13 VSS_AT19

AH47
AH48
AH50
AH51
AH6
AM44
AM51
AM7
AN1
AN11
AN12
AN14
AN22
AN3
AN33
AN35
AN36
AN38
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN5
AN51
AN53
AN6
AN8
AN9
AP40
AT12
AT16
AT19

FH8065301546401_FCBGA131170

AT24
AT27
AT30
AT35
AT38
AT4
AT47
AT52
AU1
AU24
AU3
AU30
AU38
AU51
AV12
AV13
AV14
AV18
AV19
AV24
AV27
AV30
AV35
AV38
AV47
AV51
AV7
AW13
AW19
AW27
AW3
AW35
AY10
AY22
AY32

USOC1L

VSS_AT24
VSS_AY36
VSS_AT27
VSS_AY4
VSS_AT30
VSS_AY50
VSS_AT35
VSS_AY9
VSS_AT38
VSS_BA14
VSS_AT4
VSS_BA19
VSS_AT47
VSS_BA22
VSS_AT52
VSS_BA27
VSS_AU1
VSS_BA32
VSS_AU24
VSS_BA35
VSS_AU3
VSS_BA40
VSS_AU30
VSS_BA53
VSS_AU38
VSS_BB19
VSS_AU51
VSS_BB27
VSS_AV12
VSS_BB35
VSS_AV13
VSS_BC20
VSS_AV14
VSS_BC22
VSS_AV18
VSS_BC26
VSS_AV19
VSS_BC28
VSS_AV24
VSS_BC32
VSS_AV27
VSS_BC34
VSS_AV30
VSS_BC42
VSS_AV35
VSS_BD19
VSS_AV38
VSS_BD24
VSS_AV47
VSS_BD27
VSS_AV51
VSS_BD30
VSS_AV7
VSS_BD35
VSS_AW13
VSS_BE19
VSS_AW19
VSS_BE2
VSS_AW27
VSS_BE35
VSS_AW3
VSS_BE8
VSS_AW35
VSS_BF12
VSS_AY10
VSS_BF16
VSS_AY22
VSS_BF24
VSS_AY32 11 OF 13
VSS_BF38

AY36
AY4
AY50
AY9
BA14
BA19
BA22
BA27
BA32
BA35
BA40
BA53
BB19
BB27
BB35
BC20
BC22
BC26
BC28
BC32
BC34
BC42
BD19
BD24
BD27
BD30
BD35
BE19
BE2
BE35
BE8
BF12
BF16
BF24
BF38

FH8065301546401_FCBGA131170

BF30
BF36
BF4
BG31
BG34
BG39
BG42
BG45
BG49
BJ11
BJ15
BJ19
BJ23
BJ27
BJ31
BJ35
BJ39
BJ43
BJ47
BJ7
C14
C31
C34
C39
C42
C45
C49
D12
D16
D24
D30
D36
D38
E19
E35

USOC1M

VSS_BF30
VSS_BF36
VSS_BF4
VSS_BG31
VSS_BG34
VSS_BG39
VSS_BG42
VSS_BG45
VSS_BG49
VSS_BJ11
VSS_BJ15
VSS_BJ19
VSS_BJ23
VSS_BJ27
VSS_BJ31
VSS_BJ35
VSS_BJ39
VSS_BJ43
VSS_BJ47
VSS_BJ7
VSS_C14
VSS_C31
VSS_C34
VSS_C39
VSS_C42
VSS_C45
VSS_C49
VSS_D12
VSS_D16
VSS_D24
VSS_D30
VSS_D36
VSS_D38
VSS_E19
VSS_E35 12 OF 13

VSS_E8
VSS_F19
VSS_F2
VSS_F24
VSS_F27
VSS_F30
VSS_F35
VSS_F5
VSS_F7
VSS_G10
VSS_G20
VSS_G22
VSS_G26
VSS_G28
VSS_G32
VSS_G34
VSS_G42
VSS_H19
VSS_H27
VSS_H35
VSS_J1
VSS_J16
VSS_J19
VSS_J22
VSS_J27
VSS_J32
VSS_J35
VSS_J40
VSS_J53
VSS_K14
VSS_K22
VSS_K32
VSS_K36
VSS_K4
VSS_K50

E8
F19
F2
F24
F27
F30
F35
F5
F7
G10
G20
G22
G26
G28
G32
G34
G42
H19
H27
H35
J1
J16
J19
J22
J27
J32
J35
J40
J53
K14
K22
K32
K36
K4
K50

K9
L13
L19
L27
L35
M19
M26
M27
M34
M35
M38
M47
M51
N1
N16
N38
N51
P13
P16
P19
P20
P24
P32
P35
P38
P4
P47
P52
P9
T40
U1
U11
U12
U14
U21

FH8065301546401_FCBGA131170

VSS_K9
VSS_L13
VSS_L19
VSS_L27
VSS_L35
VSS_M19
VSS_M26
VSS_M27
VSS_M34
VSS_M35
VSS_M38
VSS_M47
VSS_M51
VSS_N1
VSS_N16
VSS_N38
VSS_N51
VSS_P13
VSS_P16
VSS_P19
VSS_P20
VSS_P24
VSS_P32
VSS_P35
VSS_P38
VSS_P4
VSS_P47
VSS_P52
VSS_P9
VSS_T40
VSS_U1
VSS_U11
VSS_U12
VSS_U14
VSS_U21 13 OF 13

VSS_U3
VSS_U30
VSS_U32
VSS_U40
VSS_U42
VSS_U43
VSS_U45
VSS_U46
VSS_U48
VSS_U49
VSS_U5
VSS_U51
VSS_U53
VSS_U6
VSS_U8
VSS_U9
VSS_V12
VSS_V16
VSS_V19
VSS_V21
VSS_V35
VSS_V40
VSS_V44
VSS_V51
VSS_V7
VSS_Y10
VSS_Y14
VSS_Y16
VSS_Y21
VSS_Y25
VSS_Y33
VSS_Y41
VSS_Y44
VSS_Y7
VSS_Y9

U3
U30
U32
U40
U42
U43
U45
U46
U48
U49
U5
U51
U53
U6
U8
U9
V12
V16
V19
V21
V35
V40
V44
V51
V7
Y10
Y14
Y16
Y21
Y25
Y33
Y41
Y44
Y7
Y9

C

B

FH8065301546401_FCBGA131170

USB_VSSA_U16
VSSA_AN16
FH8065301546401_FCBGA131170

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Date:
5

4

3

2

VLV-M SOC GND
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
1

12

of

37

5

4

3

2

1

D

D

C

C

PVT 0827: Remove Debug Connector for ESD request.

B

B

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Date:
5

4

3

2

VLV-M SOC Debug
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
1

13

of

37

A

B

+DDR_A_VREF_DQ

+1.35V

DDR_A_D0
DDR_A_D1
DDR_A_DM0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
1

DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19

All VREF traces should
have 10 mil trace width

Layout Note:
Place near JDIMM1

DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27

+1.35V
C111
C112
C113
C114

1
1
1
1

2
2
2
2

10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M

<5>

DDR_A_CKE0

<5>

DDR_A_BS2
DDR_A_MA12
DDR_A_MA9

2

C110
C109
C108
C107
C115
C116
C117
C164

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K

DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
<5>
<5>

DDR_A_CLK0
DDR_A_CLK0#
DDR_A_MA10

0604 remove for layout space limit

<5>

DDR_A_BS0

<5>
<5>

DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13

<5>

DDR_A_CS2#

DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49

+0.675VS

3

C123 1

2 10U_0603_6.3V6M

C124 1
C122 1

2 1U_0402_6.3V6K
2 1U_0402_6.3V6K

DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59

Layout Note:
Place near JDIMM1.203,204

+3VS

2

RS@
R212

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207

0_0402_5%

0_0402_5%

2

1

1
C125
.1U_0402_16V7K

RS@
R211

1

2

+0.675VS

C

VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
GND1
BOSS1

D

+1.35V

CONN@
JDIMM1
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
GND2
BOSS2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208

TYCO_2-2013022-1
Part Number = SP07000JN10
PCB Footprint = TYCO_2-2013022-1_204P

DDR_A_D4
DDR_A_D5

DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D[0..63]
DDR_A_D6
DDR_A_D7

DDR_A_MA[0..15]
DDR_A_DM[0..7]

DDR_A_D12
DDR_A_D13

<5>
<5>
<5>

+1.35V

<5>

DDR_A_D14
DDR_A_D15

2
R1027
4.7K_0402_1%
1
2
R1028
4.7K_0402_1%

<5>
DDR_A_RST#

DDR_A_D20
DDR_A_D21

+DDR_A_VREF_DQ
1

<5>

DDR_A_DM1
DDR_A_RST#

E

Signal voltage level = 0.675 V
PLACE TWO 4.7K RESISTORS CLOSE TO
DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ
Decoupling caps are needed; one 0.1 µ F placed close to VREF pins of each DDR3 SODIMM.

1
2
C1077
.1U_0402_16V7K

1

2

C1076
.1U_0402_16V7K

+1.35V

1

+DDR_A_VREF_CA

FOR EMI/ESD Require 01/15

DDR_A_DM2

1

DDR_A_D22
DDR_A_D23

1

DDR_A_D28
DDR_A_D29

2
R1029
4.7K_0402_1%
2
R1030
4.7K_0402_1%

1

2

C1078
.1U_0402_16V7K

DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31

DDR_A_CKE2

<5>

DDR_A_CLK2
DDR_A_CLK2#

<5>
<5>

DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
2

DDR_A_BS1
<5>
DDR_A_RAS#
<5>
DDR_A_CS0#
DDR_A_ODT0

<5>
<5>

DDR_A_ODT2

<5>

+DDR_A_VREF_CA
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
3

DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63

EC_SMB_DA2
EC_SMB_CK2

<9,15,20,23>
<9,15,20,23>

+0.675VS

Channel A



DIMM_1 STD H:4mm

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C

Date:
A

B

C

D

DDR3L DIMMA
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013
E

Sheet

14

of

37

A

B

+DDR_B_VREF_DQ

DDR_B_D0
DDR_B_D1
DDR_B_DM0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
1

DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19

All VREF traces should
have 10 mil trace width

Layout Note:
Place near JDIMM2

DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27

+1.35V
C133
C134
C135
C136

C129
C130
C131
C132
C137
C138
C139

1
1
1
1

1
1
1
1
1
1
1

2
2
2
2

2
2
2
2
2
2
2

10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M

<5>

DDR_B_CKE0

<5>

DDR_B_BS2
DDR_B_MA12
DDR_B_MA9

.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K

DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

2

<5>
<5>

DDR_B_CLK0
DDR_B_CLK0#
DDR_B_MA10

<5>

DDR_B_BS0

<5>
<5>

DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13

<5>

DDR_B_CS2#

DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
+0.675VS
DDR_B_D48
DDR_B_D49
C143 1

3

C145 1
C146 1

2 10U_0603_6.3V6M

DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51

2 1U_0402_6.3V6K
2 1U_0402_6.3V6K

+3VS
2

DDR_B_D56
DDR_B_D57
DDR_B_DM7

R229
10K_0402_5%
1

Layout Note:
Place near JDIMM2.203,204

DDR_B_D58
DDR_B_D59

+3VS
+0.675VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
G1

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
G2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

E

DDR_B_D4
DDR_B_D5

DDR_B_DQS#[0..7]
DDR_B_DQS[0..7]

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D[0..63]
DDR_B_D6
DDR_B_D7

DDR_B_MA[0..15]
DDR_B_DM[0..7]

DDR_B_D12
DDR_B_D13

<5>
<5>

+1.35V

<5>

+DDR_B_VREF_DQ
1

2
R1069
4.7K_0402_1%
1
2
R1067
4.7K_0402_1%

<5>
<5>

1

2

C128
.1U_0402_16V7K

DDR_B_DM1
DDR_B_RST#

<5>

1

DDR_B_D14
DDR_B_D15

+1.35V
DDR_B_RST#

DDR_B_D20
DDR_B_D21
DDR_B_DM2

1
2
C84
.1U_0402_16V7K

+DDR_B_VREF_CA
1
1

FOR EMI/ESD Require 01/15

DDR_B_D22
DDR_B_D23

2
R1070
4.7K_0402_1%
2
R1068
4.7K_0402_1%

1

2

C142
.1U_0402_16V7K

DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31

DDR_B_CKE2

<5>

DDR_B_CLK2
DDR_B_CLK2#

<5>
<5>

DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
2

DDR_B_BS1
<5>
DDR_B_RAS#
<5>
DDR_B_CS0#
DDR_B_ODT0

<5>
<5>

DDR_B_ODT2

<5>

+DDR_B_VREF_CA
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DM6
DDR_B_D54
DDR_B_D55

3

DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63

EC_SMB_DA2
EC_SMB_CK2

<9,14,20,23>
<9,14,20,23>

+0.675VS

206

TYCO_2-2013287-1
Part Number = SP07000KW00
PCB Footprint = TYCO_2-2013287-1_204P

RS@
R231
0_0402_5%

D

Channel B

1

2

C

+1.35V

CONN@
JDIMM2

205

2
1
C147
.1U_0402_16V7K

+1.35V



SA0/SA1 Follow INTEL demo board

DIMM_2 REV H:4mm

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C

Date:
A

B

C

D

DDR3L DIMMB
Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013
E

Sheet

15

of

37

A

B

C

D

E

LCD POWER CIRCUIT
+3VS
VOUT

5

1

GND

4

EN
2

W=60mils

<6>
<23>

INVT_PWM_SOC
EC_BKOFF#

1
2
@EMC@
C549
220P_0402_50V7K
1
2
@EMC@
C528
220P_0402_50V7K

B+

L11 EMC@
2
1
HCB2012KF-221T30_2P

1

W=60mils
+LCDVDD
+3VS

ENVDD

+INVPWR_B+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

+INVPWR_B+

C367
4.7U_0603_6.3V6K

G5243AT11U_SOT23-5

<6>

@EMC@
C364
1000P_0402_50V7K

2

3

JLVDS1

W=60mils

1

2

VIN

1

2

W=60mils

VIN

1

C140
1U_0402_6.3V6K

R959 @
100K_0402_5%
1
2

+LCDVDD
U8

W=60mils

1

@EMC@
SM010014520 3000ma
C365
220ohm@100mhz
68P_0402_50V8J DCR 0.04
2

2

<6> EDP_TXN0
<6> EDP_TXP0
<6> EDP_TXN1
<6> EDP_TXP1
<6> EDP_AUXN
<6> EDP_AUXP

C372 1
C371 1

2 .1U_0402_16V7K
2 .1U_0402_16V7K

EDP_TXN0_C
EDP_TXP0_C

C374 1
C373 1

2 .1U_0402_16V7K
2 .1U_0402_16V7K

EDP_TXN1_C
EDP_TXP1_C

C377 1
C376 1

2 .1U_0402_16V7K
2 .1U_0402_16V7K

EDP_AUXN_C
EDP_AUXP_C
EDP_HPD_CONN

+3VS
<9> USB20_P3
<9> USB20_N3
+1.8VS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

1

G1
G2
G3
G4
G5
G6

41
42
43
44
45
46

LCD/ LED PANEL Conn.
2

ACES_50203-04001-001

+LCDVDD

SP010014B00

1

1

CONN@

@
R1063
100K_0402_5%

R383
10K_0402_5%
EDP_HPD#

EDP_AUXN_C
EDP_AUXP_C

1

<6>

G

1

EDP_HPD_CONN

S

3

TS_EN_1
TS_EN_2

@
R1062
100K_0402_5%

1

2

1
2
3
4
5 G1
6 G2

3

Touch Module
7
8

ACES_88460-00601-P01
PCB Footprint = ACES_88460-00601-P01_6P

2

2

R364
100K_0402_5%

CONN@
JTS1
1
2
3
4
5
6

<9> USB20_N2
<9> USB20_P2

D

Q13
2N7002K_SOT23-3

+5VS

2

2

3

Intel recommends having a pull-up
resistor of 100 kΩ for AUXN and a
pull-down resistor of 100 kΩ for AUXP
between the AC capacitor and the
connector, to assist source detection
by the sink device.

<23>

TS_EN

R1033 1 TS@
R1034 1
@

2 0_0402_5%
2 0_0402_5%

TS_EN_1

R1035 1
@
R1036 1 TS@

2 0_0402_5%
2 0_0402_5%

TS_EN_2

TS_INT_1 for TS one chip solution
TS_INT_2 for TS two chip solution
4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

eDP CONN.
Size
B

Date:
A

B

C

D

Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
E

16

of

37

A

B

+5VS

C

D

E

+HDMI_5V_OUT

W=40mils
U52

1

3
1

IN
GND

2

2

C378
.1U_0402_16V7K

C381
C382
C379
C380

2
2
2
2

1
1
1
1

.1U_0402_16V7K HDMI_C_TX1.1U_0402_16V7K HDMI_C_TX1+
.1U_0402_16V7K HDMI_C_TX2.1U_0402_16V7K HDMI_C_TX2+

R1071 1
R1072 1
R1073 1
R1074 1

2
2
2
2

619_0402_1%
619_0402_1%
619_0402_1%
619_0402_1%

<6>
<6>
<6>
<6>

HDMI_TX0HDMI_TX0+
HDMI_CLKHDMI_CLK+

C383
C384
C385
C386

2
2
2
2

1
1
1
1

.1U_0402_16V7K HDMI_C_TX0.1U_0402_16V7K HDMI_C_TX0+
.1U_0402_16V7K HDMI_C_CLK.1U_0402_16V7K HDMI_C_CLK+

R1075 1
R1076 1
R1077 1
R1078 1

2
2
2
2

619_0402_1%
619_0402_1%
619_0402_1%
619_0402_1%

3

OUT

HDMI_TX1HDMI_TX1+
HDMI_TX2HDMI_TX2+

HDMI_GND

1

<6>
<6>
<6>
<6>

AP2330W-7_SC59-3
G

5

D

+3VS

S

R368 RS@ 2
R369 RS@ 2

1 0_0402_5%
1 0_0402_5%

HDMI_R_CKHDMI_R_CK+

HDMI_C_TX0HDMI_C_TX0+

R370 RS@ 2
R371 RS@ 2

1 0_0402_5%
1 0_0402_5%

HDMI_R_D0HDMI_R_D0+

HDMI_C_TX1HDMI_C_TX1+

R372 RS@ 2
R373 RS@ 2

1 0_0402_5%
1 0_0402_5%

HDMI_R_D1HDMI_R_D1+

HDMI_C_TX2HDMI_C_TX2+

R374 RS@ 2
R375 RS@ 2

1 0_0402_5%
1 0_0402_5%

HDMI_R_D2HDMI_R_D2+

1

1

4

+1.8VS

Q14A
DMN66D0LDW-7_SOT363-6

HDMI_C_CLKHDMI_C_CLK+

2

R376
10K_0402_5%

HDMI_HPD#
6

<6>

HDMI_HPD

2

2

G
S

1

1

D

Q14B
DMN66D0LDW-7_SOT363-6

2

2

R121
100K_0402_5%

+1.8VS

5
6
7
8

+HDMI_5V_OUT

4
3
2
1

HDMI connector
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

+HDMI_5V_OUT

2.2K_0804_8P4R_5%

HDMI_SDATA
HDMI_SCLK
3

3

JHDMI1

HDMI_HPD

+1.8VS

2

RP15
HDMI_DDCDATA
HDMI_DDCCLK
HDMI_SDATA
HDMI_SCLK

HDMI_R_CKG

2

HDMI_R_CK+
HDMI_R_D0-

2

3

1

S

D

HDMI_DDCDATA

D

G

<6>

1

HDMI_SCLK
Q57
MESS138W-G_SOT323-3

D2
@EMC@
YSLC05CH_SOT23-3

HDMI_SDATA
Q58
MESS138W-G_SOT323-3

HDMI_R_D0+
HDMI_R_D1-

1

3

HDMI_DDCCLK

S

<6>

HDMI_R_D1+
HDMI_R_D2-

Reserved for ESD

HDMI_R_D2+

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKCK_shield
CK+
D0D0_shield
D0+
D1D1_shield
D1+
GND
D2GND
D2_shield GND
D2+
GND

3

20
21
22
23

ACON_HMR2U-AK120C
CONN@

DC232002700
4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDMI CONN.
Size
B

Date:
A

B

C

D

Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
E

17

of

37

A

B

C

D

E

+HDMI_5V_OUT

07/05 : ripple reduce

1

C450
.1U_0402_16V7K

Video Filter

W=40mils
T196

2

1

1

JCRT1
L42 EMC@
BLM15BB470SN1D_2P
1
2
L45 EMC@
BLM15BB470SN1D_2P
1
2
L46 EMC@
BLM15BB470SN1D_2P
1
2

77MHz@1920x1200x60Hz
<6>

CRT_R

<6>

CRT_G

<6>

CRT_B

2

1

2

CRT_DATA
CRT_G_2
CRT_B_2

1

2

1

2

C616 EMC@
10P_0402_50V8J

2

1

CRT_R_2

C618 EMC@
10P_0402_50V8J

150_0804_8P4R_1%

1

C647 EMC@
10P_0402_50V8J

1
2
3
4

C611 EMC@
10P_0402_50V8J

RP50
8
7
6
5

C615 EMC@
10P_0402_50V8J

C648 EMC@
10P_0402_50V8J

CRT_R
CRT_G
CRT_B

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

T206

1

CRT_CLK
2

16
17

C-H_13-12201560CP
CONN@
T197

2

G
G

DC060006E00

2

+3VS

1

CRT_HSYNC_B
1
2

CRT_HSYNC
1

<6>

U24

2

74kHz@1920x1200x60Hz

CRT Connector

+HDMI_5V_OUT

@
R1037
1K_0402_5%

3

2

@
R1038
1K_0402_5%
1

OE

Vcc

1

5

2

@EMC@
C448
10P_0402_50V8J

IN A
GND OUT Y

CRT_VSYNC_B

4
1

M74VHC1GT125DF2G_SC70-5
U23
5
OE
Vcc

2

@EMC@
C449
10P_0402_50V8J

60Hz@1920x1200x60Hz
<6>

2

CRT_VSYNC

3

3

1
@ C1152
1
@ C1154
1
C1151
1
@ C1149
1
@ C1153

+3VS

IN A
GND OUT Y

4

M74VHC1GT125DF2G_SC70-5

2
4.7U_0603_6.3V6K
2
1U_0402_6.3V6K
2
.1U_0402_16V7K
2
.1U_0402_16V7K
2
.1U_0402_16V7K

3

0705 : For ripple reduce

2

+3VS

G

+3VS
CRT_DATA
CRT_DDC_DATA
CRT_DDC_CLK
CRT_DATA
CRT_CLK

D

6
S

CRT_DDC_DATA

1

Q27B
DMN66D0LDW-7_SOT363-6
G

5

<6>

CRT_DDC_DATA

CRT_DDC_CLK

4

3

CRT_CLK

5
6
7
8

D

CRT_DDC_CLK

S

<6>

+HDMI_5V_OUT

RP42
4
3
2
1
2.2K_0804_8P4R_5%

Q27A
DMN66D0LDW-7_SOT363-6
4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CRT CONN.
Size
B

Date:
A

B

C

D

Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
E

18

of

37

5

4

+3VALW

3

2

1

+3V_LAN
JP40 JP@
+3V_LAN

+LAN_VDD

2

1

2

1

2

1

2

1

2

C1111
.1U_0402_16V7K

2

1

C1110
.1U_0402_16V7K

2

1

C1109
.1U_0402_16V7K

2

1

C1108
.1U_0402_16V7K

2

1

C1107
4.7U_0603_6.3V6K

2

1

C1106
.1U_0402_16V7K

2

1

C1105
1U_0402_6.3V6K

2

1

C1104
.1U_0402_16V7K

From EC

High active.
EN threshold voltage min:1.2V typ:1.6V max:2.0V
Current limit threshold 1.5~2.8A

1.4A W=60mil

1

2

D

Using for Switch mode
The trace length from Lx to
PIN48 (REGOUT) and from C to Lx
must < 200mils.

LAN_PWR_EN

W=60mil
C1103
.1U_0402_16V7K

2

1

C1102
.1U_0402_16V7K

<23>

2

1

C1101
.1U_0402_16V7K

G5243AT11U_SOT23-5

D

1

C1100
.1U_0402_16V7K

1
2
C1183
.1U_0402_16V7K
@EMC@

C1099
.1U_0402_16V7K

3

EN

C1098
.1U_0402_16V7K

2

VIN

C1097
4.7U_0603_6.3V6K

L50
2.2UH_NLC252018T-2R2J-N_5%

GND

300mA

2

Place near Pin 3,8,41,52,61

Place near Pin 29

Place near Pin 11,12,39,58,63,64

Using for Switch mode
The trace length
from C to
PIN46,47(VDDREG)
must < 200mils.

Close to Card Reader CONN

U48

+3V_LAN Rising time must >0.5ms and <100ms

+CARD_3V3

JREAD1

Power Manahement/Isolation

PCIE_PRX_C_DTX_P0
PCIE_PRX_C_DTX_N0

REFCLK_P
REFCLK_N
PERSTB
CLKREQB

30
31
25
26

HSOP
HSON
HSIP
HSIN
EEPROM(TWSI)

44
42

T198
<24>

5IN1_LED#

SDA
SCL/LED_CR

GPO Pin
Transceiver Interface

LAN_MIDI0+
LAN_MIDI0LAN_MIDI1+
LAN_MIDI1LAN_MIDI2+
LAN_MIDI2LAN_MIDI3+
LAN_MIDI3-

Y6
25MHZ_10PF_7V25000014
XTLI

C

1

1

1

2

3

3
GND

GND

2

4

C799
12P_0402_50V8J

Change To 12pF
0701

XTLO
1

C800
12P_0402_50V8J

2

1
2
4
5
6
7
9
10

XTLI
XTLO

59
60

REGOUT

48
45

DVDD33
DVDD33
AVDD33
AVDD33
AVDD33
AVDD33
DVDD10
DVDD10

CKXTAL1
CKXTAL2

Clock

AVDD10
AVDD10
AVDD10

+3V_LAN

for Vendor Suggest.

Regulator and Reference

+3V_LAN

SWR mode

REGOUT
ENSWREG_H

RSET

51
49
43

GND
GND
GND9(Exposed Pad)

LEDs

R1044
15K_0402_5%

2 R774
2 R775

SD_CLK_R
SD_CMD_R

10_0402_5%
0_0402_5%

1

2
C26
@EMC@
5P_0402_50V8C

1

2

1

2

SD_D0_R
SD_D1_R
SD_D2_R
SD_D3_R

8
9
1
2

SD_WP#
SD_CD

10
11
12
13

CMD
VSS
VDD
CLK
VSS
DAT0
DAT1
DAT2
CD/DAT3
WP SW
CD SW
GND SW
GND SW

+3VS
R1039 @
10K_0402_5%
2
1

T-SOL_156-1000302601_NR
CONN@

SP07000TF00

12
39
+3V_LAN

11
58
63
64

+LAN_VDD

41
52

R1081
100K_0402_5%

SD_CD#

300mA
3
8
61
+CARD_3V3
29

1000mA
13
33
53

C

+3VS

1500mA

5

SD_CD

DMN66D0LDW-7_SOT363-6
Q73A

VDD33_18

24
32
65

1

2

2

ISOLATEB

LED0
LED1
LED3

SD_CLK_R

RTL8411-CG_QFN64_9X9

1

2

@

1

2

Place near Pin 33

1

2

C1116
4.7U_0603_6.3V6K

LAN_LED0
LAN_LED1

VDD33/18
VDD33/18

1
RS@ 1

C1115
.1U_0402_16V7K

1

VDDREG
VDDREG

62

SD_D0_R
SD_D1_R
SD_D2_R
SD_D3_R

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

C1114
4.7U_0603_6.3V6K

R1041
2.49K_0402_1%

LAN_RST

GPO

SD_CLK
SD_CMD
SD_WP
SD_CD#

C1113
.1U_0402_16V7K

R1042
1K_0402_5%

1

50

R768
R769
R770
R771

Reserve for EMI please close to IC

C1112
.1U_0402_16V7K

2

EVDD10
Card_3V3

46
47

+3VS

2

MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3

GPO

2
2
2
2

1

37
36

1
1
1
1

RS@
RS@
RS@
RS@

@

+CARD_3V3

1

1

27
28

PLT_RST_BUF#
LAN_CLKREQ#

SD_D0
SD_D1
SD_D2
SD_D3

3

CLK_PCIE_LAN
CLK_PCIE_LAN#

19
18
23
22
17
16
15
14
20
21
35
54
34
55
56
57

4

Reserved

2 .1U_0402_16V7K
2 .1U_0402_16V7K

SD_D0/MS_D7/xD_D5
SD_D1/MS_CLK/xD_D6
SD_D2/xD_D7
SD_D3/MS_D2/xD_D2
SD_D4/xD_WE#
SD_D5/xD_CE#
SD_D6/MS_INS#/xD_RE#
SD_D7/xD_RDY
SD_CLK/MS_D3/xD_D4
SD_CMD/MS_D6/xD_D3
SD_WP/MS_D1/xD_WP#
SD_CD#/MS_D5/xD_ALE
MS_BS/xD_CLE
MS_D4/xD_D0
MS_D0/xD_D1
XD_CD#

2

R1082
100K_0402_5%

SD_WP

Place near Pin 53

6

C788 1
C791 1

<7> PCIE_PRX_DTX_P0
<7> PCIE_PRX_DTX_N0
<7> PCIE_PTX_C_DRX_P0
<7> PCIE_PTX_C_DRX_N0

Card Reader

PCI-Express

3
4
5
6
7

S

EMC

CLK_PCIE_LAN
CLK_PCIE_LAN#

<8,20,23,24>
PLT_RST_BUF#
<7> LAN_CLKREQ#

1
2
C1150
0.01U_0402_16V7K
@EMC@

0705:

1
2
C1184
.1U_0402_16V7K
@EMC@

C818
.1U_0402_16V7K

PLT_RST_BUF#

EC_PME#

C817
4.7U_0603_6.3V6K

<8>
<8>

LAN_CLKREQ# pull high 10K to +1.8VS at SOC

<23>

SD_CMD_R

D

EC_PME# pull high 100K to +3VALW

ISOLATEB
LANWAKEB

G

38
40

ISOLATEB

2

1

REGOUT

VIN

4
2

1

1200mA W=60mil

1

VOUT

5

C1096
1U_0402_6.3V6K

60mil

U57

2

JUMP_43X79

60mil

2

D
G

SD_WP#

1

S

+3V_LAN

change T38 01/14

MCT4
MX4+
MX4-

GST5009-E
SP050006B10
1

2

C810
.1U_0402_16V7K

RJ45_MIDI1RJ45_MIDI1+

3

RJ45_MIDI2+

4

RJ45_MIDI2-

5

RJ45_MIDI1-

6

RJ45_MIDI3+

15
14
13

RJ45_MIDI0RJ45_MIDI0+

RJ45_MIDI3-

7
8

PR1LED_YELLOW_A2

9

LINK_100_1000#

10

B

PR2+
PR3+
LED_GREEN_B1
PR3LED_GREEN_B2

11

JP1 @EMC@
B88069X9231T203_4P5X3P2-2
2
1

LAN_ACTIVITY#

40mil

12

RJ45_GND

PR2PR4+

GND
GND

13
14

40mil

PR4-

JP@
JUMP_43X118
JP15

SANTA_130451-F
CONN@
DC234005300

RJ45_GND

LAN_LED0

2
R786

@

LAN_ACTIVITY#
1
510_0402_5%

1
2
C808 @EMC@
470P_0402_50V7K

LAN_LED1

2
R787

@

LINK_100_1000#
1
510_0402_5%

1
2
C809 @EMC@
470P_0402_50V7K

Place close to TCT pin

1
2
C814
10P_0402_50V8J

LANGND

1

TCT4
TD4+
TD4-

18
17
16

2

RJ45_MIDI1+

LED_YELLOW_A1

LANGND
JP2
@EMC@
B88069X9231T203_4P5X3P2-2

2

LAN_MIDI0LAN_MIDI0+

MCT3
MX3+
MX3-

RJ45_MIDI2RJ45_MIDI2+

PR1+

D39 EMC@
L30ESDL5V0C3-2_SOT23-3

10
11
12

TCT3
TD3+
TD3-

21
20
19

JRJ45
1

RJ45_MIDI0-

3

7
8
9

MCT2
MX2+
MX2-

RJ45_MIDI3RJ45_MIDI3+

2

LAN_MIDI1LAN_MIDI1+

TCT2
TD2+
TD2-

24
23
22

1
R788
75_0402_1%
1
R789
75_0402_1%
2
1
R790
75_0402_1%
2
1
R791
75_0402_1%

4
5
6

MCT1
MX1+
MX1-

2

LAN_MIDI2LAN_MIDI2+

B

RJ45_MIDI0+

TCT1
TD1+
TD1-

2

LAN_TERMAL 1
2
3

1

T1
LAN_MIDI3LAN_MIDI3+

DMN66D0LDW-7_SOT363-6
Q73B

1

LAN Connector

0705 : Unpop for cost down LED
A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

LAN RTL8411-CG
Size
C

Date:
5

4

3

2

Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013
1

Sheet

19

of

37

A

B

C

D

E

1

1

+1.5VS

For Wireless LAN
60mil

+3VS

1

+3VS_WLAN

JP8 JP@
2

JUMP_43X118

C441
470P_0402_50V7K
1
EMC@

1

2

+1.5VS_WLAN
JP13JP@

1
C458
4.7U_0603_6.3V6K

2

@
C459
.1U_0402_16V7K

2

1

2

JUMP_43X39
@
C1168
.1U_0402_16V7K

1

2

@
C463
.1U_0402_16V7K

C460
.1U_0402_16V7K

+3VS_WLAN
+3VS_WLAN
+1.5VS_WLAN
R429 1
<23>

2

<7>

2 4.7K_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

WLAN_PME#

WLAN_CLKREQ#

<8> CLK_PCIE_WLAN#
<8> CLK_PCIE_WLAN

<7> PCIE_PRX_DTX_N1
<7> PCIE_PRX_DTX_P1

+3VS_WLAN
+3VALW
U9 @

4
1

3

2

VOUT

1

W=60mils

<7> PCIE_PTX_C_DRX_N1
<7> PCIE_PTX_C_DRX_P1

VIN
GND

2
+3VS_WLAN

VIN

3
@
EN
C165
1U_0402_6.3V6K AP2821KTR-G1_SOT23-5

WLAN_ON

<23>
<23> E51TXD_P80DATA
<23> E51RXD_P80CLK
<23>

BT_OFF#

R1079 0_0402_5%
R1080 0_0402_5%

1 RS@
1 RS@

2
2

2
1
R438
1K_0402_5%

1

5

CONN@
JMINI1

53

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GNDGND

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2

WL_OFF# <23>
PLT_RST_BUF# <8,19,23,24>

MINI1_SMBCLK R432 1
MINI1_SMBDATA R434 1

@
@

2 0_0402_5%
2 0_0402_5%

EC_SMB_CK2
EC_SMB_DA2
USB20_Hub_N0
USB20_Hub_P0

R443 1

2 100K_0402_5%

+3VS_WLAN
MINI1_LED#

<9,14,15,23>
<9,14,15,23>
<22>
<22>
<23>
3

54

BELLW_80053-1021
R437
100K_0402_5%
2

DC040009P00

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Mini PCIE(WLAN)
Size
B

Date:
A

B

C

D

Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
E

20

of

37

A

B

C

D

E

SATA HDD1 Conn.
JHDD1

<7>
<7>

SATA_PTX_DRX_P0
SATA_PTX_DRX_N0

1

<7> SATA_PRX_DTX_N0
<7> SATA_PRX_DTX_P0

C392 1
C393 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0

C391 1
C394 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

+5VS

+5VS

100mils

@

1

2

C397
.1U_0402_16V7K

2

C161
1U_0402_6.3V6K

C420
10U_0603_6.3V6M

2

1

1
2
3
4
5
6
7

GND
A+
AGND
BB+
GND

SATA ODD Conn.

V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12

<7> SATA_PTX_DRX_P1
<7> SATA_PTX_DRX_N1
<7>
<7>

SATA_PRX_DTX_N1
SATA_PRX_DTX_P1

C401 1
C402 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PTX_C_DRX_P1
SATA_PTX_C_DRX_N1

C403 1
C405 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PRX_C_DTX_N1
SATA_PRX_C_DTX_P1

1
2
3
4
5
6
7

GND
A+
AGND
BB+
GND

+5VS
8
9
10
11
12
13

80mils
1
GND
GND
GND
GND

23
24
25
26

C404
10U_0603_6.3V6M

2

1
C407
.1U_0402_16V7K

ODD_MD
T185

2

DP
+5V
+5V
MD
GND
GND

GND
GND

14
15

SANTA_201902-1_13P-T
CONN@

CCM_C127043HR022M27FZR_22P-T
CONN@

1

1

JODD1

LTCX004HZ00

2

DC231211190
2

FAN1 Conn

APE8875M_SO8

1

1

1

1

1

8
7
6
5

@

@

@

@

@

@

@

@

@

H13 H14 H15
H_4P0 H_4P0 H_4P0

H20
H_3P2

FD2

FIDUCIAL_C40M80

FD3

FD4

H16
H_3P2

@

FIDUCIAL_C40M80
1

1

1

1

1

@

@

@

@
3

0708:Change to SA000050J00 for EOL

@

1

@

FIDUCIAL_C40M80

1

EN_DFAN1

GND
GND
GND
GND

1

+VCC_FAN1
<23>

EN
VIN
VOUT
VSET

1

1
2
3
4

1

U31

3

FD1

1

H3
H4
H5
H6
H9
H10 H11 H12 H17
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0

1

C632
4.7U_0603_6.3V6K
1
2

1

+5VS

@

FIDUCIAL_C40M80

+3VS

<23>

FAN_SPEED1
1

4

2

EMC@
C630
.1U_0402_16V7K

@
H22
H_2P5N

H23
H_2P5X3P5N

JFAN1
@

1
2 GND
3 GND

4
5

@

@

1

1
2
3

1

2

40mil
+VCC_FAN1

H21
H_3P0

1

1

C629
4.7U_0603_6.3V6K
1
2

R516
10K_0402_5%

4

ACES_88231-03041
CONN@

SP020020710

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDD/ODD/FAN/Screw Hole
Size
B

Date:
A

B

C

D

Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
E

21

of

37

A

B

C

D

E

+5VALW

SM070000S80 WCM2012F2SF-670T04 67ohm
<9>

PCH_USB3_TX0_P

2
C484

PCH_USB3_TX0_P_C
1
.1U_0402_16V7K

2

<9>

PCH_USB3_TX0_N

2
C482

PCH_USB3_TX0_N_C
1
.1U_0402_16V7K

3

1

D15
1 1

10 9

U3RXDN0

U3RXDP0

2 2

9 8

U3RXDP0

U3TXDN0

4 4

7 7

U3TXDN0

U3TXDP0

5 5

6 6

U3TXDP0

L24

EMC@
2

1

3

4

1

U3TXDP0

4

U3RXDN0

U3TXDN0

DLW21SN900HQ2L-0805_4P

<9>

3

3

4

1

8

U3RXDP0

@EMC@
L05ESDL5V0NA-4 SLP2510P8
4

U3RXDN0

DLW21SN900HQ2L-0805_4P
R458 1

RS@ 2 0_0402_5%

<9>
<9>

2

USB20_P0

2

USB20_N0

3

4

2

1

4

USB20_P0_L

1

USB20_N0_L

+

2

W=60mils

8
7
6
5

1

R454
0_0402_5%
2
@

USB_OC0#

<9>

1

1

2

USB3.0 Conn.

1

CONN@
JUSB1
USB20_N0_L
USB20_P0_L

WCM2012F2SF-670T04-0805_4P
R461 1

1

2

L26 @EMC@
3

OUT
OUT
OUT
OCB

SF000002Y00
220U 6.3V OSCON
ESR 17mohm@100Khz

W=100mils
@EMC@
C994
.1U_0402_16V7K

PCH_USB3_RX0_N

1

GND
IN
IN
EN/ENB

+USB3_VCCA

3 3

L25

2

USB_PWR_EN#

1
2
3
4

SY6288D10CAC_MSOP8

C487
@EMC@
1000P_0402_50V7K

PCH_USB3_RX0_N

EMC@
2

1
2
C483
@EMC@
.1U_0402_16V7K

C486
220U_6.3V_M

<9>

PCH_USB3_RX0_P

PCH_USB3_RX0_P

+USB3_VCCA
U25

For ESD request

U3RXDN0
U3RXDP0

PCB Footprint = SW_WCM2012F2S_4P

RS@ 2 0_0402_5%

U3TXDN0
U3TXDP0

1
2
3
4
5
6
7
8
9

VBUS
DD+
GND
StdA-SSRXStdA-SSRX+
GND-DRAIN
StdA-SSTXStdA-SSTX+

2

10
11
12
13

GND
GND
GND
GND

OCTEK_USB-09EAAB

DC233008O20

C1120
2
10U_0603_6.3V6M

1
C1117
.1U_0402_16V7K

2

1
C1118
.1U_0402_16V7K

U58

<20>
<20>

To BT

USB20_P1
USB20_N1
1

<9>
<9>

USB20_Hub_P0
USB20_Hub_N0

USB20_Hub_P0
USB20_Hub_N0
USB20_Hub_P1
USB20_Hub_N1
USB20_Hub_P2
USB20_Hub_N2
HUB_BUSJ
HUB_VBUSM
HUB_XRSTJ

+3V_HUB
R1047 1

2 100K_0402_5% HUB_XRSTJ

R1049 1

2 100K_0402_5% HUB_BUSJ

R1050 1

2 10K_0402_5%

C1122

1

2

C1119
10U_0603_10V6M

DP1
DM1
DP2
DM2
DP3
DM3
BUSJ
VBUSM
XRSTJ
DPU
DMU
REXT

USB/B
(USB Port 1, Port2)

+5V_HUB

OVCJ
TESTJ
XOUT
XIN
DM4
DP4
DRV
LED1
LED2
PWRJ

FE1.1S-BQFN24B_WQFN24_4X4

2.7K_0402_1%
R1048

1
2
3
4
5
6
21
22
23
24

HUB_OVCJ

JUSB2

<23>

1

HUB_XOUT
HUB_XIN

2
Y9
4

1

HUB_XOUT3

2

1
2
3
4
5
6
7
8
9
10
11
12
13
14

USB_PWR_EN#

USB_PWR_EN#

USB20_Hub_N2
USB20_Hub_P2

C1121
0.01U_0402_16V7K

USB20_Hub_N1
USB20_Hub_P1

HUB_XIN

1
2
3
4
5
6
7
8
9
10
11
12
13
14
ACES_88514-01201-071
CONN@

12MHZ_18PF_7V12000001
Part Number = SJ10000C210
PCB Footprint = Y_CRG3201212_4P

SP01001BF00
need apply footprint

4

HUB_VBUSM

Compal Electronics, Inc.

Compal Secret Data

Security Classification

0.01U_0402_16V7K

Issued Date

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USB Conn & Hub FE1.1S
Size
B

Date:
A

3

+5VALW
R1046
10K_0402_5%

2

4

12
11
10
9
8
7
18
17
16
15
14
13

2

C1119
Vonder suggest Voltage up 10V

1

2

1

19
20
25

3

+3V_HUB

+5V_HUB

VDD5
VD33F
VSS

1

+5V_HUB
1
2
R1045
0_0603_5%

2

+5VALW

B

C

D

Document Number

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
E

22

of

37

Rev
0.3

B

1

ECAGND

+3VALW_EC
RP12

1
2
3
4

EC_RST#

<8> EC_SCI#
<20> WLAN_ON

1
1

@
@

2 10K_0402_5%
2 10K_0402_5%

1
2
C511
@EMC@
0.01U_0402_16V7K

EC_SMI#
EC_SCI#

PLT_RST_BUF#

ESD request
<24>

2

<24>

Charger and BATT
To SOC

KSI[0..7]

KSI[0..7]

KSO[0..17]

KSO[0..17]

<29,30>
<29,30>
<9,14,15,20>
<9,14,15,20>

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

<24>

+3VALW_EC
3

2

Board ID
@
R503
100K_0402_5%

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

EC_WLAN_LED#

<20> WL_OFF#
<31,33,34> SPOK
<21> FAN_SPEED1
<20> E51TXD_P80DATA
<20> E51RXD_P80CLK
<8> PMC_CORE_PWROK
<24> PWR_SUSP_LED#
<16> TS_EN

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
EC_MUTE#/GPIO4A
KSI4/GPIO34
USB_EN#/GPIO4B
KSI5/GPIO35
CAP_INT#/GPIO4C
PS2
Interface
KSI6/GPIO36
EAPD/GPIO4D
KSI7/GPIO37
TP_CLK/GPIO4E
KSO0/GPIO20
TP_DATA/GPIO4F
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
CPU1.5V_S3_GATE/GPXIOA00
KSO4/GPIO24
W OL_EN/GPXIOA01
KSO5/GPIO25 Int. K/B
ME_EN/GPXIOA02
KSO6/GPIO26 Matrix
VCIN0_PH/GPXIOD00
SPI Device Interface
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
SPIDI/GPIO5B
KSO10/GPIO2A
SPIDO/GPIO5C
SPI Flash ROM SPICLK/GPIO58
KSO11/GPIO2B
KSO12/GPIO2C
SPICS#/GPIO5A
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
ENBKL/AD6/GPIO40
KSO16/GPIO48
PECI_KB930/AD7/GPIO41
KSO17/GPIO49
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
GPIO
EC_SMB_CK1/GPIO44
PW R_LED#/GPIO54
EC_SMB_DA1/GPIO45
BATT_LOW _LED#/GPIO55
SM Bus
EC_SMB_CK2/GPIO46
SYSON/GPIO56
EC_SMB_DA2/GPIO47
VR_ON/GPIO57
PM_SLP_S4#/GPIO59
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
GPIO0A
GPIO0B
GPIO0C
GPIO0D
EC_INVT_PW M/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PW ROK/GPIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A

GPIO

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05
H_PROCHOT#_EC/GPXIOA06
VCOUT0_PH/GPXIOA07
GPO
BKOFF#/GPXIOA08
PBTN_OUT#/GPXIOA09
PCH_APW ROK/GPXIOA10
SA_PGOOD/GPXIOA11

GPI

2

@
C517
.1U_0402_16V7K

T199
T200

EC_XCLKI
EC_XCLK0

122
123

XCLKI/GPIO5D
XCLKO/GPIO5E

11
24
35
94
113

KB9012QF-A4_LQFP128_14X14
Part Number = SA00004OB30
PMC_CORE_PWROK
1
2
C1157
EMC@
0.047U_0402_25V7K

AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
LID_SW #/GPXIOD04
SUSP#/GPXIOD05
GPXIOD06
PECI_KB9012/GPXIOD07

AGND/AGND

1

DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D
IREF/GPIO3E
CHGVADJ/GPIO3F

DA Output

69

1
R506
8.2K_0402_5%

Rb

AD

CLK_PCI_EC
PCIRST#/GPIO05
EC_RST#
EC_SCII#/GPIO0E
GPIO1D

BATT_TEMP/AD0/GPIO38
AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
IMON/AD5/GPIO43

AD_BID0

2

1

Analog Board ID definition,
Please see page 3.

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
77
78
79
80

<8> EC_SLP_S3#
<8> EC_SLP_S4#
<8> EC_SMI#

Ra

12
13
37
20
38

2.2K_0804_8P4R_5%

+3VALW_EC

R488
R492

<9> LPC_CLK_EC
<8,19,20,24> PLT_RST_BUF#

PWM Output

GND/GND
GND/GND
GND/GND
GND/GND
GND0

+3VS

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

8
7
6
5

GPIO0F
BEEP#/GPIO10
GPIO12
ACOFF/GPIO13

TP_CLK
TP_DATA

R478
R479

1
1

EC_MUTE#

R481

1

2

47K_0402_5%

<29>

21
23
26
27

BT_OFF#
BEEP#
USB_PWR_EN#

63
64
65
66
75
76

BATT_TEMP

BT_OFF# <20>
BEEP# <25>
USB_PWR_EN#
C510 2

<22>

1 100P_0402_50V8J ECAGND

<35>

@

2
2

4.7K_0402_5%
4.7K_0402_5%

2

10K_0402_5%

R482
0_0402_5%
2 RS@
1

VR_HOT#

ADP_I

<29,30>

EC_PME#

<7>

D

H_PROCHOT#_EC

2

Q50
2N7002K_SOT23-3

G

EC_PME#

1

H_PROCHOT#

BATT_TEMP <29>

ADP_I
AD_BID0

+5VS

1

2 100K_0402_5% EC_PME#

GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC & MISC
LPC_AD0

1

S

<19>

3

+3VALW_EC

R484 1

1
2
3
4
5
7
8
10

<24> KBL_EN#
<8> EC_KBRST#
<8,24> EC_SERIRQ
<9,24> LPC_FRAME#
<9,24> LPC_AD3
<9,24> LPC_AD2
<9,24> LPC_AD1
<9,24> LPC_AD0

R476

V18R

68
70
71
72

Latest design guide suggest change to
74LVC1G06.
EN_DFAN1

EN_DFAN1

83
84
85
86
87
88

EC_MUTE#
LAN_PWR_EN
WLAN_PME#

97
98
99
109

VGATE

TP_CLK
TP_DATA

<21>

EC_MUTE# <25>
LAN_PWR_EN <19>
WLAN_PME# <20>
TP_CLK <24>
TP_DATA <24>
VGATE

TXE_DBG
VCIN0_PH

R509 2 RS@
EC_ACIN

<35>

C512
EMC@

2

1 0_0402_5%

ACIN

<8,30>

1 100P_0402_50V8J
2

TXE_DBG <7>
VCIN0_PH <29>

119
120
126
128

+3VALW_EC

73
74
89
90
91
92
93
95
121
127

ENBKL

100
101
102
103
104
105
106
107
108

EC_RSMRST#
EC_LID_OUT#
VCIN1_PROCHOT
H_PROCHOT#_EC

110
112
114
115
116
117
118

EC_ACIN
EC_ON
ON/OFF
LID_SW#
SUSP#

124

+V18R

ENBKL

FSTCHG
BATT_BLUE_LED#
PWR_LED
BATT_AMB_LED#
SYSON
VR_ON

PBTN_OUT#

<6>

FSTCHG <30>
BATT_BLUE_LED#
PWR_LED <24>
BATT_AMB_LED#
SYSON <32>
VR_ON <35>

2

.1U_0402_16V7K

1

LID_SW#

2

1

2

+3VALW_EC

C508
.1U_0402_16V7K

67

U28

2

C509

1

E

+EC_VCCA

1
2

EC_VDD/AVCC

2

2

C507 @EMC@
1000P_0402_50V7K

2

1

C506 @EMC@
1000P_0402_50V7K

2

1

C505
@
.1U_0402_16V7K

1

C504
@
.1U_0402_16V7K

2

C503
.1U_0402_16V7K

C502
.1U_0402_16V7K

EC_RST#

1 47K_0402_5%

1

D

@
R696
10K_0402_5%

<24>

VCIN0_PH
VCIN1_PROCHOT

<24>

EC_RSMRST# <8>
EC_LID_OUT# <8>
VCIN1_PROCHOT
<29>
H_PROCHOT#_EC <29>
MAINPWON <29,31>
EC_BKOFF# <16>
PBTN_OUT# <8>

EC_RSMRST#

@
R697
10K_0402_5%

1

RS@ 1
R236
0_0805_5%

R480 2

L31
BLM15AG121SN1D_L0402_2P
1
2 +EC_VCCA

9
22
33
96
111
125

2

+3VALW_EC

C

+3VALW_EC

EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC

+3VLP

1

A

1
2
C1156
EMC@
.1U_0402_16V7K

0705:for

ESD

request
3

EC_ON <31>
ON/OFF <24>
LID_SW# <24>
SUSP# <10,26,30,32,33,34>
MINI1_LED#

<20>

1

2

C515
4.7U_0603_6.3V6K

20mil
2
ECAGND 1
L32
BLM15AG121SN1D_L0402_2P

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

2014/04/12

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

EC ENE KB9012
Size Document Number
Custom

A

B

C

D

Rev
0.3

Intel BayTrail-M Platform

Date:

Tuesday, September 03, 2013

Sheet
E

23

of

37

A

B

C

D

E

KB Conn.

To TP/B Conn.

3

D

SP01000IJ00

6
5

ACES_88514-00601-071
@EMC@
C551
100P_0402_50V8J

SP010014M00

@

S

1

2

@

1
LEFT_BTN#

2

3

SW 4
TJE-532QR5_6P
1

4

RIGHT_BTN#

4

100g for Press

2

@EMC@
C553
100P_0402_50V8J

2

100g for Press

LED

1
2

PW R_LED

Q17
2N7002K_SOT23-3

2

G

BATT_AMB_LED#

JPW R1
+3VALW
+3VLP
LID_SW #

+3VS

SP010014M00

1

1
R698

2
680_0402_5%

1

PW R_SUSP_LED#

PWR_SUSP_LED#

B

2

1
R700

2
51_0402_5%

R10
10K_0402_5%

3

A

4

1
R701

2
680_0402_5%

LTST-C295TBKF-CA_AMBER-BLUE

MEDIA_LED#

4

OUT

3

LTST-C191TBKT-CA_BLUE

3

1

1

5

A

4

Need check CIS Symbol

LED4

2

2
51_0402_5%

2

2
R740
51_0402_5%
1
2

R632
10K_0402_5%

+3VS

MEDIA LED

VCC

ACES_88514-00601-071
CONN@

1
R699

+3VS
<23>

+3VS

A

2

LTST-C295TBKF-CA_AMBER-BLUE
LED7

<23>

7
8

B

3

PW R_LED#

GND

LID_SW#
PWR_LED#
ON/OFF

1

BATT_AMB_LED#

1

PWR/B

<23>

BATT_BLUE_LED#

BATT_BLUE_LED#

3

R452
100K_0402_5%

+3VALW

LED6
<23>

S

GND
GND

2

2

<23>

3

1

<23>

D

1
2
3
4
5
6

1

SW 5
TJE-532QR5_6P
1

3

2

PW R_LED#

1
2
3
4
5
6

1

TP_CLK
TP_DATA

7
8

GND
GND

<23>

KSO[0..17]

2

2
@ Q26 G
2N7002K_SOT23-3

KBL_EN#

G2
G1

TP_DATA <23>
TP_CLK <23>

RIGHT_BTN#
LEFT_BTN#

6
5

<23>

27
28

G1
G2

4
3
2
1

.1U_0402_16V7K
2
C663 1

TP_DATA
TP_CLK

ACES_50504-0040N-001
SP01000Z300
C524
.1U_0402_16V7K

1 RS@
2
R592
0_0402_5%

E-T_6905-E26N-01R
CONN@

KSI[0..7]

4
3
2
1

2

1
2 KBL_EN_R
R451 BL@
100K_0402_5%

SP01000IJ00

KSO[0..17]

+5VS_BL

1

1
2
3
4
5
6

CONN@
JBL1

+5VALW

1
2
3
4
5
6

6
5

+5VS

E-T_6905-E26N-01R
CONN@

KSI[0..7]

BL@
Q44
DMG2301U-7_SOT23-3

+5VS

CONN@
JTP2

KB BackLight Conn.

C525
.1U_0402_16V7K

27
28

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

G

G1
G2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

D

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

S

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

1

1

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

JKB2

3

JKB1

+3VS
LED8

IN1
IN2

1

SOC_SATALED#

<7>
<23>

2

5IN1_LED#

EC_W LAN_LED#

EC_W LAN_LED# 1

2

A

<19>

1
R702

2
499_0402_1%

LTST-C191KFKT-2CA_ORANGE
U39
MC74VHC1G08DFT2G_SC70-5

TPM Board
CONN@
JTPM1

ON/OFF BTN

+3VLP

LPC_CLKRUN#
PLT_RST_BUF#

2

<9>
<8,19,20,23>
R534
100K_0402_5%

2

4

+3VALW
+3VS

1

SW 1 DBG@
TJE-532QR5_6P
1
3
ON/OFF

ON/OFF

12/9 modify pin define

<23>

1
3
5
7
9
11
13
15

2
4
6
8
10
12
14
16

2
4
6
8
10
12
14
16

LPC_AD3
LPC_AD2
LPC_CLK_TPM
LPC_FRAME#
LPC_AD1
LPC_AD0
LPCPD#
EC_SERIRQ

LPC_AD3
LPC_AD2

<9,23>
<9,23>

LPC_CLK_TPM <9>
LPC_FRAME# <9,23>
LPC_AD1 <9,23>
LPC_AD0 <9,23>
2
EC_SERIRQ

<8,23>

+3VS

1

4

R392
10K_0402_5%
TPM@

FOX_NQT510166-LOAO-7F

5
6

4

1
3
5
7
9
11
13
15

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Issued Date

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

KB/TP/LED/TPM
Size Document Number
Custom
Date:

A

B

C

D

Intel BayTrail-M Platform
Sheet

Tuesday, September 03, 2013
E

24

of

37

Rev
0.3

A

B

C

D

E

Int. Speaker Conn.

2

EMC@
C554
.1U_0402_16V7K

JUMP_43X79

2

1

HD Audio Codec

40mil

+VDDA

1
2
5
3 G1 6
4 G2
ACES_88266-04001
CONN@

D27
AZ5125-02S.R7G_SOT23-3
@EMC@

D37
SP02000K200
AZ5125-02S.R7G_SOT23-3
@EMC@

1

1

1

JSPK1

1
2
3
4
3

40mil

40mil

SPKR+
SPKRSPKL+
SPKL-

2

+VDDA
JP9 JP@

3

+5VS

HP_PLUG#_1

+PVDD_HDA

40mil

2
1
L33
HCB2012KF-221T30_2P

1

1

220ohm/0.04/3000mA

HP_PLUG#

2
G

GNDA

S

C444
@EMC@
330P_0402_50V7K

2
GNDA

Place near Pin41
Place near Pin46

20mil

1

Place near Pin40

2

1
C636
.1U_0402_16V7K

GNDA

COM_MIC

1 COM_MIC_R
1K_0402_5%

2
R540

2

C564
10U_0603_6.3V6M

17
18

19
20
HDA_CBN

1

HDA_CBP

2

37
29

+MIC2_VREFO

10mil
30

+INTMIC_VREFO

1

GNDA

C584

1

GNDA

C574

1
C583
2
R546

GNDA

Place near
codec
GNDA

1 39.2K_0402_1%

2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
1
20K_0402_1%

1
2
CPVEE
C575
2.2U_0402_6.3V6M SENSE_A

10mil31
10mil27
39
7
15

MIC2_R

SPK_OUT_L-

LINE1_L

SPK_OUT_R+

LINE1_R
SPK_OUT_RMIC1_L
HPOUT_L
MIC1_R
HPOUT_R
CBN

10mil13
48

SPKL-

SDATA_OUT

MIC2_VREFO

SYNC
RESETB

MIC1_VREFO_R

45

SPKR+

BCLK

44

SPKR-

32

HP_LEFT

33

HP_RIGHT

8
5

HDA_SDIN0_AUDIO 1 R547
2
33_0402_5%
HDA_SDOUT_AUDIO

10

HDA_SYNC_AUDIO

11

HDA_RST_AUDIO#

GPIO0/DMIC_DATA
LDO3_CAP
GPIO1/DMIC_CLK
JDREF

PCBEEP
MONO_OUT
AVSS2
VREF
AVSS1

JP42 JP@

JUMP_43X39

JUMP_43X39

JP10JP@

JP14 JP@

JUMP_43X39
JP11JP@

JUMP_43X39
JP12 JP@

HDA_SYNC_AUDIO

<7>

HDA_RST_AUDIO#

<7>

2

INT_MIC_R

1

<7>

For EMI

2

1
2
C573 @EMC@
22P_0402_50V8J

JMIC1

15mil

1
2

C550
@EMC@
220P_0402_50V7K

3
4

G1
G2

SP020008Y00
ACES_88266-02001

47

EC_MUTE#

12

MONO_IN

GNDA
EC_MUTE#

16
38
28

3

1
2

ACES_88266-02001_2P
CONN@

2

25

GND
GNDA

1

2

<23>

BEEP#_R

2
1
C555
1U_0402_6.3V6K

1
2
@
R529
47K_0402_5%

CODEC_VREF

10mil

ALC3225-CG_MQFN48_6X6
JP41JP@

Int. MIC

R417
10K_0402_5%

<7>

3

SPDIFO
DVSS

R543
22K_0402_5%

GNDA

<7>

HDA_BITCLK_AUDIO

LDO1_CAP
LDO2_CAP

HDA_SDIN0

HDA_SDOUT_AUDIO

6
1 @EMC@2
R548
0_0402_5%

SENSE A
SENSE B

D1
AZ5125-02S.R7G_SOT23-3
PCB Footprint = AZ5125-02SPR7G_SOT23-3
EMC@

COM_MIC

+INTMIC_VREFO

MIC1_VREFO_L

CPVEE

C571
10U_0603_6.3V6M

GNDA

C578
10U_0603_6.3V6M

49

SPKL+

C577
2.2U_0402_6.3V6M

4

42
43

1

R531
4.7K_0402_5%

C556
@EMC@
100P_0402_50V8J

14
MIC2JD

CBP

GNDA

1

SPK_OUT_L+

MIC2_L

PD#

10mil34

1

9

36

1
DVDD

35mA

DVDD_IO

68mA 600mA

CPVDD

46
PVDD2

41

40

26

LINE2_R

DC230009K00
2

R539
2.2K_0402_5%

R542
22K_0402_5%
1
2

MIC2JD
C1137
10U_0603_6.3V6M

2

SDATA_IN

C570
2.2U_0402_6.3V6M
3

35

LINE2_L

PVDD1

23

AVDD2

24

AVDD1

1
C770
1
C769
1
C568
1
C569

LINE2_C_L
2
1U_0603_6.3V6M
LINE2_C_R
2
1U_0603_6.3V6M
MIC2_C_L
2
2.2U_0603_6.3V6K
MIC2_C_R
2
2.2U_0603_6.3V6K

2

7
SINGA_2SJ3053-100111F
CONN@

HP_PLUG#

1

2

6

COM_MIC

+MIC2_VREFO

+1.5VS
C1136
.1U_0402_16V7K

21

R545 2

2

1

2

22

HP_PLUG#_1

HP_PLUG#

1

2

Combo MIC

INT_MIC
1
1K_0402_5%
2
1000P_0402_50V7K

2
5

2

C561
.1U_0402_16V7K

U34

2
R726
1
C62 EMC@

1

1

GNDA

GNDA

HPOUT_R

Place near Pin1, 9

Place near Pin25, 38

Internal MIC

HPOUT_L

2 60.4_0603_1%

1

2

2 60.4_0603_1%

2

1

R238 1

HP_RIGHT R237 1

GNDA

20mil
C567
10U_0603_6.3V6M

JHP1

4

+3VS

2

+VDDA

Headphone Out
COM_MIC

2

C604
.1U_0402_16V7K

1

2

1

C445
@EMC@
330P_0402_50V7K

1

1
C605
10U_0603_6.3V6M

1

2

3
HP_LEFT

+1.5VS

2

1

2

C558
.1U_0402_16V7K

3

C608
10U_0603_6.3V6M

INT_MIC_R

1

D

Q31
2N7002K_SOT23-3

1

3

+VDDA

2

1

R523
100K_0402_5%

1

2

1
2
R530
47K_0402_5%

BEEP#

<23>

SOC_SPKR

<9>

2

4

4

Place next pin27

GNDA

JUMP_43X39
GNDA

Issued Date

GNDA

Compal Electronics, Inc.

Compal Secret Data

Security Classification
JUMP_43X39

2013/04/12

2014/04/12

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

HD Audio Codec_ALC3225
Size Document Number
Custom
Date:

A

B

C

D

Rev
0.3

Intel BayTrail-M Platform
Sheet

Tuesday, September 03, 2013
E

25

of

37

A

B

SUSP#

0701

update

1
2
C1143 @
1U_0402_6.3V6K

R927
100K_0402_5%
2
1

1

SUSP#

0701

update

U11
1
2

3VS_ON

2
C980
.1U_0402_16V7K
2
R926
120K_0402_5%
1
C979
.1U_0402_16V7K

1

3
4

+5VALW
5VS_ON

5
6
7

+5VALW

2

1
2
C1144 @
1U_0402_6.3V6K

VIN1
VIN1

VOUT1
VOUT1

ON1

CT1

VBIAS

GND

ON2

CT2

VIN2
VIN2

VOUT2
VOUT2
GPAD

+3VS_OUT

14
13
12

+3VS

2

C976
JUMP_43X118
1 330P_0402_50V7K
1@ .1U_0402_16V7K
C1138 2

2

1

1

11
C1139 2
10

330P_0402_50V7K
C967
+5VS_OUT

9
8
15

1@ .1U_0402_16V7K

JP37JP@
+5VS
JUMP_43X118

TPS22966DPUR_SON14_2X3

1
2
C1145 @
1U_0402_6.3V6K

R1055
82K_0402_5%
2
1

U59
1
2

1.8VS_ON

1
C1125
.1U_0402_16V7K
2
1
R1056
47K_0402_5%
1
C1128
.1U_0402_16V7K

2

3
4

+5VALW
1.35VS_ON

5
6
7

+1.35V

2

E

Rise Time:
3.3V@330pF = 889.68us
5.0V@330pF = 1348us

JP36JP@

+1.8VALW

VIH=1.2~5.5V
3.3V@82k/0.1uF=3.042ms
3.3V@47k/0.1uF=1.893ms
2

D

+3VALW

VIH=1.2~5.5V
3.3V@100k/0.1uF=3.538ms
3.3V@120k/0.1uF=4.272ms
1

C

1
2
C1146 @
1U_0402_6.3V6K

VIN1
VIN1

VOUT1
VOUT1

ON1

CT1

VBIAS

GND

ON2

CT2

VIN2
VIN2

VOUT2
VOUT2
GPAD

14
13
12

Rise Time:
1.8V@330pF = 485.28us
1.35V@330pF = 363.96us

JP38JP@

+1.8VS_OUT

+1.8VS

2

C1123
JUMP_43X79
1 330P_0402_50V7K
1@ .1U_0402_16V7K
C1124 2

2

1

2

11
C1126 2
10

330P_0402_50V7K
C1127
+1.35VS_OUT

9
8
15

1@ .1U_0402_16V7K

JP39JP@
+1.35VS
JUMP_43X79

TPS22966DPUR_SON14_2X3

+1.0VALW TO +1.0VS

+5VALW
+0.675VS

1
D

2
G
S

R1059
10K_0402_5%

+1.0VS_R

SUSP

Q69
2N7002K_SOT23-3

2
G

@ Q72
2N7002K_SOT23-3

S

3

SUSP#
1

<10,23,30,32,33,34>

2

D

1@
C1131
.1U_0402_16V7K

2

SUSP

G
S

3

2

G

Q71 @
2N7002K_SOT23-3

S
4

3

Q70
2N7002K_SOT23-3

2

1
1
D

SUSP

1
+0.675VS_R

1
1.0VS_GATE

2
1
R1061
10K_0402_5%

SUSP

SUSP

D

@
R1052
470_0603_5%

+5VALW

4

<32>

@
R1053
22_0603_5%
2

C1130
4.7U_0603_6.3V6K

1

4

1

2

2

C1129
4.7U_0603_6.3V6K

1
2
3

3

R1057
100K_0402_5%
1

8
7
6
5

2

+1.0VS

1

U60
ME4856_SO8

3

+1.0VALW

2

0708:Change to SB00000PZ00 / need apply footprint

3

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DC INTERFACE
Size
B

Date:
A

B

C

D

Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
E

26

of

37

5

D

C

4

3

2

1

1. Change U8,U57 (SA000028Y10) to SA00006EE00 (S IC AP2821KTR-G1 SOT-23 5P PWR SW)
2. Change U28 to SA00004OB30(S IC KB9012QF A4 LQFP 128P KB CONTROLLER)
3. Change U31 to SA000050J00 (S IC APE8875M SO 8P FAN CONTROL)
4. Change Q57,Q58,Q62,Q63,Q64,Q65 to SB00000S700(S TR MESS138W-G 1N SOT323-3)
5. Change D40 to SCS00003500 (S SCH DIO RB751V-40 SOD-323 YEASHIN)
6. Unpop R1025 for +1.8VS leakage
7. Pop R1061 for +1.0VS leakage
8. Change RP53 to R1081,R1082 and change SD_CD PU to +3VS for Card Reader un-plug issue
9. Change R927 to 100k for +3VS power sequence
10. Change R926 to 120k for +5VS power sequence
11. Change R1055 to 82k for +1.8VS power sequence
12. Change R1056 to 47k for +1.35VS power sequence
13. Unpop R786,R787 for cost down RJ45 Conn.
14. Pop C449,C450 for CRT_VSYNC_B reduce noise
15. Change C1003,C1004 to 10P for System 25MHz Crystal fine tune
16. Change C799,C800 to 12P for LAN 25MHz Crystal fine tune
17. Change C1009,C1010 to 15P for System 32.768kHz Crystal fine tune
18. Change C1006 from 0.01U to 0.1U for ESD request
19. ADD C1151,C1152 for CRT flicker
20. Change L31,L32,L49 to 0402 Size
21. Add C1169 0.1uF for ESD request
22. Pop C1007 0.047uF for ESD request
23. 0708:Changg U60 to ME4856_SO8(SB00000PZ00)
24. Unpop L49 and Add U65,R1084,R1085,R1087,C1179,C1181 for +1.35VS LDO for CRT
25. Unpop Q71,Q72,R1052,R1053 for power discharge
26. Add C1155,C1156,C1157,C1158,C1159 for ESD request
26. Add C1160~C1167,C1167~C1173 for Debug Port for ESD

D

C

B

B

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HW RIR
Size
B

Date:
5

4

3

2

Document Number

Rev
0.3

Intel BayTrail-M Platform
Tuesday, September 03, 2013

Sheet
1

27

of

37

A

B

C

D

1

1

VIN

EMI@ PL101
HCB2012KF-121T50_0805
1
2

DC_IN_S1

EMI@ PC102
100P_0603_50V8

2

2

1

1
2
3
4
GND
GND

1

CONN@ PJP101
ACES_50305-00441-001_4P

EMI@ PC104
1000P_0603_50V7K

2

2

RS@ PR105
0_0402_5%
1
2

+3VLP

3

-

PBJ101 @
2

+
1

PR113
560_0603_5%
1
2

+CHGRTC

PR112
560_0603_5%
1
2

3

+RTCBATT

ML1220T13RE

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
B

Date:
A

B

C

DCIN
Bay Trail M LA-A621P

Document Number

Tuesday, September 03, 2013
D

Sheet

Rev
0.3
28

of

37

A

B

C

D

<23,30>

EC_SMB_CK1

<23,30>

EC_SMB_DA1

100_0402_1%
2
1
PR201 100_0402_1%
2
1

EC_SMCK 13
EC_SMDA 15

17
19

8

9

10

11

12

13

14

15

16

17

18

19

20

1

6
8

@ PU204

1

@ PR231
100K_0402_1%

2

EMI@ PC202
1000P_0402_50V7K
<23,31>

10

MAINPWON

MAINPWON

2

2

4

3
4

12

VCC TMSNS1
GND RHYST1
OT1 TMSNS2
OT2 RHYST2

8
7

2

6

1
1

7

1

6

@ PR232
47K_0402_1%

5

@ PH202
100K_0402_1%_TSM0B104F4251RZ

G718TM1U_SOT23-8

14

BI

16

TH

18
20

2
1
PR206
6.49K_0402_1%
1
2
PR208
1K_0402_1%

2

9
11
PR202

4

5

2

7

2

3

@ PR230
10K_0402_1%

@ PR229
10K_0402_1%

BATT+ <45,47>

1

5

1

1

BATT_S1

2

3

2

EMI@ PL201
HCB2012KF-121T50_0805
1
2

+3VLP
BATT_TEMP <23>

1

1

@ PC209
0.1U_0603_25V7K

2

CONN@ PJP201
WAFER SUYIN 200109MS020G209ZR 20P P2

1

1

1

+3VLP

2

PR203
1K_0402_1%

2

2

For KB9012 OTP

For KB9012
sense 20mΩ

Active

Recovery

92℃

1.2V, Active

40W

50W,0.7V

40W,0.7V

56℃

2.255V, Recovery

65W

84W,1.2V

56W,1.2V

90W

117W,1.2V

77W,1.2V

PH201 under CPU botten side :
CPU thermal protection at 92 degree C ( shutdown )
Recovery at 56 degree C
3

3

+EC_VCCA

ADP_I <23,30>

1

1

65W@ PR218
23.2K_0402_1%
90W@ PR218
33.2K_0402_1%

2

2

PR228
12.4K_0402_1%

40W@ PR218
8.87K_0402_1%

VCIN0_PH <23>
VCIN1_PROCHOT <23>
1

PR204
127K_0402_1%
1
2

H_PROCHOT#_EC <23>

PH201
100K_0402_1%_TSM0B104F4251RZ

value:4250K± 1%
2

B

1

65W@ PR225
78.7K_0402_1%

40W@ PR225
19.6K_0402_1%

90W@ PR225
41.2K_0402_1%
4

4

2

For 65W adapter==>action 70W , Recovery 54W
For 90W adapter==>action 97W , Recovery 75W
<23> ECAGND

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

BATTERY CONN / OTP
Size Document Number
Custom
Date:

A

B

C

Rev
0.3

Bay Trail M LA-A621P

Tuesday, September 03, 2013
D

Sheet

29

of

37

A

B

C

D

1

D

3

for reverse input protection

S

2

PQ301
2N7002KW_SOT323-3

G

1
2

2

1

PC324
100P_0402_50V8J

4

1

PR305
1_0402_1%

2

1
2

1

PC318
10U_0805_25V6K

2

1

PC315
10U_0805_25V6K

2

1 CSON1

PC317
0.1U_0402_25V6

2

Min.
17.520V
16.967V

Typ
18.006V
17.593V

Max.
18.504V
18.237V

EC_SMB_CK1

<23,29>

EC_SMB_DA1

<23,29>

ILIM and external DPM
Min.
3.906A

Close EC
ADP_I

Typ
Max.
4.006A 4.108A

<23,29>

@ PC325
0.1U_0402_16V7K

4

2

S

RS@PR325
0_0402_5%
1
2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

CHARGER
Size Document Number
Custom

B

C

Rev
0.3

Bay Trail M LA-A621P

Date:
A

PC308
0.01U_0402_50V7K

4

L-->H
H-->L

1

PC326
2200P_0402_50V7K
2
1

2

G

3

1 CSOP1

Vin Detector

PR324
64.9K_0402_1%

3

D

2

+3VALW

PC322
0.01U_0402_25V7K

PR322
422K_0402_1%

1

SUSP#

PQ308
2N7002KW_SOT323-3
2

PC314
0.1U_0402_25V6

1
2
1
2

3
2
1

3

2
1 2

3,26,32,33,34>

FSTCHG

1

<23>

2

BATT+

3

ACDET
PQ307
PDTC115EU_SOT323-3

PR323
100K_0402_1%
1
2

2

ILIM

SCL

1
2

2

1

5

2 CSON1
SRN 1
PR315
6.8_0603_5%
BQ24735_BATDRV

PC321
0.1U_0603_25V7K

12

1

SRP 1

PR317
316K_0402_1%
2
1
PR320
100K_0402_1%

6

1

VIN

PR318
2M_0402_1%

PR314
10_0603_5%
2 CSOP1

13

11

BATDRV

9

ACOK

4

PQ306
SIS412DN-T1-GE3_POWERPAK8-5

REGN
SRN

PL302
PR312
10UH_FDSD0630-H-100M-P3_3.8A_20%
0.01_1206_1%
BQ24735_LX 1
2
4
CHG 1
@EMI@ PC316 @EMI@ PR313
680P_0402_50V7K 4.7_1206_5%

3
2
1

2

ACDRV

<8,23> ACIN

1

5

1
PR310
2.2_0603_5%
1

BQ24735_BST 2

16

17
BTST

DH_CHG

18

19

SRP

ACDET

PR321
2M_0402_1%

DL_CHG

14

10

PR316
100K_0402_1%

CMSRC

SDA

5

2

4

2

15

GND

8

4
ACOK

PR306
4.12K_0603_1%

PQ305
SIS412DN-T1-GE3_POWERPAK8-5

DH_CHG-1

PC313
1U_0603_25V6K

ACP

IOUT

+3VLP

1

LODRV

7

BQ24735_ACDRV

2

ACN

ACDET

3

@

2

PD303
RB751V-40_SOD323-2

BQ24725ARGRR_QFN20_3P5X3P5

BQ24735_CMSRC

1

PR311
0_0603_5%
DH_CHG 1
2

2

2

PAD

HIDRV

1

VCC

21

PHASE

20

PC312
1U_0603_25V6K

BQ24735_LX

2
2

PU301

EMI@ PC307
2200P_0402_50V7K

1
2
2

3
1

1

1

BQ24735_ACP

BQ24735_ACN

1

BQ24735_BATDRV 1

PC310
0.047U_0402_25V7K
1
2
PR309
10_1206_1%

2

PD302
BAS40CW_SOT323-3

@EMI@ PC305
0.1U_0402_25V6
2
1

4x4x2

1

3

PC304
10U_0805_25V6K
2
1

4

2

2

1

PC306
0.1U_0402_25V6
1
2

2

3

CHG_B+
EMI@ PL301
1.2UH_PNS40201R2YAF_3A_30%
1
2

VIN

PR308
4.12K_0603_1%

1

PR307
4.12K_0603_1%
2
1

2

B+
PR303
0.02_1206_1%

1

2

1

PC302
0.1U_0402_25V6

2

1

4

P2

PC303
10U_0805_25V6K

PQ303
SIS412DN-T1-GE3_POWERPAK8-5
1
2
3
5

1
2
3

@

1

100ppm

P1

PQ302
AON6414AL_DFN8-5

5
PC301
2200P_0402_50V7K
2
1

PR301
3M_0402_5%

PR304
1_0402_1%

VIN

PC311
0.1U_0603_25V7K

PR302
1M_0402_5%

1

PQ304
SIS412DN-T1-GE3_POWERPAK8-5
1
2
5
3

2

2

1

PC309
0.1U_0402_25V6

2

4

1

Tuesday, September 03, 2013
D

Sheet

30

of

37

5

4

3

2

1

D

D

RS@ PR415
0_0402_5%
1
2

2

+3VALWP

GND

OUT

PG

LDO

PR405
150K_0402_1%
2
1

1
2

2

+3VALWP

1UH_FDSD0630-H-1R0M-P3_11A_20%

5

+3VLP

2

1

@EMI@ PR409
4.7_1206_5%

PC422
4.7U_0603_6.3V6K

PR416
100K_0402_1%

2

3.3V LDO 150mA~300mA

2

1
PL402
1

4

SY8208BQNC_QFN10_3X3

C

2

LX_3V

@

B+

PC413
22U_0805_6.3V6M

9

10

@ PC426
4.7U_0603_6.3V6K

PC414
22U_0805_6.3V6M
2
1

LX

0.022U_0402_16V7K PR414 1K_0402_1%
FB-1_3V
2
1
2
0_0603_5% PC401 0.1U_0603_25V7K
2 BST-1_3V 1
2

PC416
22U_0805_6.3V6M
2
1

@

6

3

1

BS

3V_EN_R
PC428
FB_3V 1
PR404
BST_3V
1

1

2

EN2

PC411
22U_0805_6.3V6M
2
1

EN1

IN

1

IN

13V_SN
2

8
PC405
10U_0805_25V6K
2
1

@EMI@ PC403
0.1U_0402_25V6
2
1

EMI@ PC410
2200P_0402_50V7K
2
1

3V_VIN

1

7

EMI@ PL401
HCB2012KF-121T50_0805
1
2

PC408
10U_0805_25V6K
2
1

B+

PR410
1K_0402_1%
1
2 3V5V_EN

PC425
4.7U_0603_6.3V6K

EN1 and EN2 dont't floating
PU401

PR401
499K_0402_1%
1
2

ENLDO_3V5V

C

@EMI@ PC423
680P_0603_50V7K

Vout is 3.234V~3.366V
<23,33,34>

SPOK

TDC=8A
@ PJ401
1

+3VALWP

1

2

2

+3VALW

JUMP_43X118

LDO

1

4

2

7

VL

@EMI@ PR408
4.7_1206_5%

SY8208CQNC_QFN10_3X3

@EMI@ PC424
680P_0603_50V7K

@ PJ402

<23>

EC_ON
MAINPW ON

1

+5VALWP

1

2

2

+5VALW

JUMP_43X118

Vout is 4.998V~5.202V

5V LDO 150mA~300mA

<23,29>

+5VALWP

1UH_FDSD0630-H-1R0M-P3_11A_20%
PC412
22U_0805_6.3V6M

PG

10 LX_5V

PC415
22U_0805_6.3V6M
2
1

OUT

B

PL403

PC418
22U_0805_6.3V6M
2
1

VCC

0_0603_5% PC404
2BST-1_5V 1

PR412
1K_0402_1%
1
2

1

LX

PR403
BST_5V 1

FB-1_5V

2

1
2

2

GND

6

PC427
6800P_0402_25V7K
1
2
0.1U_0603_25V7K
2

15V_SN
2

5

FB_5V

2

9

3V5V_EN

3

PC417
22U_0805_6.3V6M
2
1

BS

1

1

EN2

SPOK
PC420
4.7U_0603_6.3V6K

EN1

1

VCC_3.3V

IN

PC421
4.7U_0603_6.3V6K

@

8
@EMI@ PC402
0.1U_0402_25V6
2
1

EMI@ PC409
2200P_0402_50V7K
2
1

PC407
10U_0805_25V6K
2
1

B

PU402

5V_VIN

2

EMI@ PL404
HCB2012KF-121T50_0805
1
2
PC406
10U_0805_25V6K
2
1

B+

TDC=8A

PR407
2.2K_0402_5%
1
2
RS@PR402
0_0402_5%
1
2

A

A

1
2

PR406
1M_0402_1%

PC419
4.7U_0603_6.3V6K

2

1

3V5V_EN

Compal Secret Data

Security Classification

@

2013/04/12

Issued Date

EN1 and EN2 dont't floating

2014/04/12

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

3VALW/5VALW
Size Document Number
Custom

4

3

2

R ev
0.3

Bay Trail M LA-A621P

Date:
5

Compal Electronics, Inc.

Tuesday, September 03, 2013

Sheet
1

31

of

37

A

S3

S5

1.35VP

3
2
1

12

1
2

1
2

EMI@ PC503
2200P_0402_50V7K

2
1

2

1

2
@EMI@ PC507
680P_0402_50V7K

+

PC506
330U_2.5V_M

Rds=4.2mΩ (Typ)
5.0mΩ (Max)

11

2

1

PR505
5.1_0603_5%

+5VALW

+1.35VP

@ PJ504

1

1

1

PC510
1U_0603_10V6K

PR506
10K_0402_1%

1
PR510
10K_0402_1%

2

2

+1.35V

@ PJ505

1
DDR_PWROK

1

JUMP_43X118

2

2

PC509
1U_0603_10V6K

1

+1.35VP

2

PGOOD
10

PR504
8.45K_0402_1%
2
1

1

2

16
PHASE

17
UGATE
TON

14
13

PC502
10U_0805_25V6K

1
3
2
1

1
19

18
BOOT
S5

4

@EMI@ PR503
4.7_1206_5%

DDR_PWROK

1

2

2

JUMP_43X118

<5>

@ PJ506

1

+0.675VSP

PR509
8.06K_0402_1%
2
1

1

PC511
0.1U_0402_16V7K

S

VTT_REFP

S0

Hi

Hi

On

On

S3

Lo

Hi

On

On

Lo

Lo

S4/S5

LG_1.35V

+1.35VP

TAI-TECH

DCR:8.5mΩ

1

2

1

2

+0.675VS

JUMP_43X79

FB=0.75V
To GND = 1.5V
To VDD = 1.8V

2

3

STATE

VDD

15

6.6x7.3x3.8

PR508
887K_0402_1%
2
1 1.35V_B+

2

1

G

2

<26> SUSP

1

@ PC512
0.1U_0402_16V7K
D

CS
VDDP

VDDQ

PR507
680K_0402_1%
1
2

@ PQ501
2N7002KW_SOT323-3
2
SUSP

VLDOIN

20

VTTREF

PR501
200K_0402_1%
1
2

<23> SYSON

PGND

RT8207MZQW_WQFN20_3X3

FB

PC508
0.033U_0402_16V7K

GND

6

1

+1.35VP

2

5

VTTSNS

9

4

+VTT_REFP

LGATE

S5_1.35V 8

3

VTTGND

S3

1

PAD

VTT

PU501

21

2

1

LX_1.35V

p PA D

B+

PL501
1.5UH_TMPB0604M-1R5MN-Z01_11A_20%
1
2
PQ503
S TR MDU1512RH 1N POWERDFN56-8

t Ca

PC504
0.1U_0603_25V7K
BST_1.35V-1 2
1

5

靠Outpu

S3_1.35V 7

1

PC505
10U_0805_25V6K

2

1

PC501
10U_0805_25V6K

+0.675VSP

3,26,30,33,34> SUSP#

PR502
2.2_0603_5%
BST_1.35V 2
1

120%

2

115%

4

JUMP_43X79

2

@

2

PJ503

1

UG_1.35V

PQ502
MDV1525URH_PDFN33-8-5

5

+1.35VP

2011/9/19

OVP=110%

EMI@ PL507
HCB2012KF-121T50_0805
2
1

1.35V_B+

@EMI@ PC521
0.1U_0402_25V6

+1.35VP
Ipeak = max{ 0.7*Ibudget, 1st +2nd max loading}
Ipeak = max{ 12.34*0.7 ,
4.2+8.14
}
Ipeak=12.34A ; 1.2Ipeak=14.808A ;Imax=8.638A
1/2Delta I=0.7353A (F=300K Hz)
PR504=(1.2Ipeak-1/2Delta
I)
*Rds(on)(max)*1.2/9uA=8.45Kohm
choose PR504=8.45Kohm (for safety >1.2Ipeak)
Rds(on)=5.0m ohm(max) ; Rds(on)=4.2m ohm(typical)
Ilimit_min=(8.366K*9uA)/(5.0m*1.2)=15.058A
Ilimit_max=(8.535K*11uA)/(4.2m*1.2)=22.352A
Iocp=Ilimit+1/2Delta
I=15.79A~23.09A
Iocp(min)>1.2Ipeak

0.675VSP
On
Off
(Hi-Z)

Off
Off
Off
(Discharge) (Discharge) (Discharge)

Issued Date

Note: S3 - sleep ; S5 - power off

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

1.35VP/0.675VSP
Size Document Number
Custom
Date:

A

Rev
0.3

Bay Trail M LA-A621P

Tuesday, September 03, 2013

Sheet

32

of

37

5

4

3

2

PR601
10K_0402_1%
1
2

<23,31,34>

1

1

SPOK

1

PC601
0.1U_0402_16V7K

1

+1.0VALWP

2

@
PR602
1M_0402_1%

D

PU601

2

Pin3 I-LIMIT state

LDO_3V

1
2

1
2

PC612
22U_0805_6.3VAM

2

PR609
20K_0402_1%

Rdown

C

2

Current Limit

PC611
22U_0805_6.3VAM

LDO

SY8206DQNC_QFN10_3X3

Rup

FB = 0.6V

+3VALW

1

PG

LDO_3V

1

PR607
10K_0402_1%

7
5

PC614
4.7U_0603_6.3V6K

2

2

+1.0V_PGOOD

1

2

PC613
4.7U_0603_6.3V6K

1

1

4

2

BYP

FB
ILMT_1.0V 3

+1.0VALWP
PC610
47U_0805_6.3V6M

ILMT

PL602
1UH_PCMB063T-1R0MS_12A_20%
1
2

LX_1.0V

10

1

LX

2

GND

1

9

PR604
PC603
0_0603_5% 0.1U_0603_25V7K
BST_1.0V 1
2
1
2

PC609
47U_0805_6.3V6M

6

BS

1

1

EN

2

IN

PC608
330P_0402_50V7K

8

PR606
13.7K_0402_1%

10U_0805_25V6K
PC607
2
1

10U_0805_25V6K
PC606
2
1

@EMC@ PC605
0.1U_0402_25V6
2
1

B+_1.0V

+3VALW

C

+1.0VALW

@EMC@ PR603
@EMC@ PC602
4.7_1206_5%
680P_0603_50V7K
1
2SNB_1.0V 1
2

EMC@ PL601
HCB2012KF-121T50_0805
1
2
EMC@ PC604
2200P_0402_50V7K
2
1

B+

JP@ PJ601
2
1
2
JUMP_43X118

2

D

1

Pin 7 BYP is for CS.
Common NB can delete

Low

6A

+3VALW and PC15

@ PR605
0_0402_5%

8A

High

12A

VFB=0.6V
Vout=0.6V*

ILMT_1.0V

1

2

Floating

RS@ PR608
0_0402_5%

(1+Rup/Rdown)

Vout=1.05V
1

2

+3VALW

2

@ PC615
1U_0402_6.3V6K

Note:Iload(max)=3A

1

1

2

2

2

PR612
22.6K_0402_1%

@ PR613
22K_0402_5%

PC620
0.15U_0402_10V6K

@

B

PC619
22U_0805_6.3V6M

2

1

FB_1.5VSP

+1.5VSP_ON

1

SUSP#

FB=0.8V

1

<10,23,26,30,32,34>

PR611
51K_0402_1%
1
2

2

PR610
20K_0402_1%

+1.5VSP

1

1

2

2

FB

3
4

PC618
22U_0805_6.3V6M

EN
POK

VOUT
VOUT
GND

8
7

VCNTL
VIN
VIN

2

PC616
4.7U_0603_6.3V6K

1

B

PC617
0.022U_0402_16V7K
2
1

PU602
APL5930KAI-TRG_SO8

6
5
9

Ien=10uA, Vth=0.3V, notice
the res. and pull high
voltage from HW

@ PJ602

A

+1.5VSP

1

1

2

2

A

+1.5VS

JUMP_43X39

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Issued Date

Deciphered Date

2014/04/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

+1.5VSP
Size Document Number
Custom

V5WE2 M/B LA-9531P Schematic

Date:
5

4

3

2

Tuesday, September 03, 2013

Sheet
1

33

of

37

Rev
0.3

4

3

+3VS

PR702
2.55K_0402_1%
1
2

5

PL701
1UH_PH041H-1R0MS_3.8A_20%
1
2

SY8003DFC_DFN8_2X2

+1.05VSP

PR705
15K_0402_1%

Rup

2
C

PR706
20K_0402_1%

Rdown
C

2

1

FB=0.6V

Note:Iload(max)=3A

@EMI@ PC706
680P_0402_50V7K

1

FB_1.05V

1

NC

LX_1.05V

2

PGND

7
6

PC705
22U_0805_6.3VAM

4

LX

2

PC702
22U_0805_6.3VAM

EN

IN

1

JUMP_43X79

3

2

2

Note:Iload(max)=2.5A

1

2

1

1

PGND
SGND

PG

<10,23,26,30,32,33>

@ PR703
1M_0402_5%

2

@ PJ701

1

2

+3VALW

FB

1

2

@EMI@ PR704
4.7_0603_5%

1

9
8

D

SUSP#

2

2

PU701

1

1

PC701
0.1U_0402_16V7K
2
1

1

+1.05VSP_ON

@ PR701
100K_0402_5%

2

PC704
22U_0805_6.3VAM

D

PC703
68P_0402_50V8J
2
1

5

@ PJ702

1

+1.05VSP

1

2

2

+1.05VS

JUMP_43X79

@ PJ703

1

+1.8VALWP

+3VALW

1

2

2

+1.8VALW

1

JUMP_43X79

2

@ PC707
1U_0402_6.3V6K

1

PC711
22U_0805_6.3V6M

@

2

2

1

1

1

+1.8VSP_ON

PR709
15.8K_0402_1%

2

@ PR710
22K_0402_5%

2

2

PC712
0.1U_0402_16V7K

FB_1.8VSP

1

PR707
20K_0402_1%

FB=0.8V

B

+1.8VALWP
PC710
22U_0805_6.3V6M

1

2

1

PR708
20K_0402_1%
1
2

<23,31,33> SPOK

FB

2

EN
POK

GND

8
7

2

PC708
4.7U_0603_6.3V6K

1

B

PC709
0.022U_0402_16V7K
2
1

Note:Iload(max)=3A
PU702
APL5930KAI-TRG_SO8
6
5 VCNTL
3
VOUT 4
9 VIN
VIN
VOUT

Ien=10uA, Vth=0.3V, notice
the res. and pull high
voltage from HW

Note:
When design Vin=5V, please stuff snubber
to prevent Vin damage

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

A

2013/04/12

2014/04/12

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

+1.05VSP/1.8VSP
Size Document Number
Custom
Date:

5

4

3

2

Rev
0.3

Bay Trail M LA-A621P
Tuesday, September 03, 2013

Sheet
1

34

of

37

4

3

2

1

1

5

2

@ PC802
1000P_0402_50V7K
VGFX_VSNS

1
PC805
470P_0402_50V7K
1
2
1
2
PR802
PC807
499_0402_1%
150P_0402_50V8J
1
2 1
2
1
2
PR804
PR805
137K_0402_1%
2.21K_0402_1%

2

PHASE1

PC810
10U_0805_25V6K

1

1

1
2

2
VSUMG-

5

S2
G1

4

S2
D1

3

CPU_B+

+

2

1
PC819
33U_25V_M

1

+

2

PC820
33U_25V_M

PC824
0.1U_0402_25V6

0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A

3

1

4

2

1

1

PR836
1_0402_5%

2

PR835
3.65K_0603_1%

2

1
2
2

1

PR834
2.61K_0402_1%

1
2

+SOC_VCC

1

1
11K_0402_1%
2
PR840

1

PH804

Close CPU choke

VSUM+

10K_0402_1%_TSM0A103F34D1RZ

2

2

PC833
0.1U_0402_16V7K

VSUM-

2

PC837
0.1U_0402_16V7K

VSUM-

1

1
2

PC832
0.047U_0402_25V7K

B

PL805
0.22UH_FDUE0640J-H-R22M-P3_25A_20%

@
PC829
PR831
680P_0402_50V7K 4.7_1206_5%
@EMC@
@EMC@

1
2

PC823
10U_0805_25V6K
2
1

<23>

PC822
10U_0805_25V6K
2
1

16
1

6

G2
S1/D2

S2

1.91K_0402_1%

PR839
232_0402_1%

VSUMG+

2

1

EMC@ PL802
HCB2012KF-121T50_0805
1
2

+3VALWP

2

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

2013/04/12

2014/04/12

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

CPU_CORE/VGFX_CORE

Size Document Number
Custom
Bay Trail

4

3

2

Rev
0.3

M LA-A621P

Date:
5

C

PQ803

7

2

VSUM+

2

1_0402_5%
PR816

PC817 @EMC@
680P_0402_50V7K

PHASE1
PR830
PC827
2.2_0603_5%
0.1U_0603_25V7K
2 1
2
BOOT1 1
RS@ PR827 0_0603_5%
2 UGATE1-1
UGATE1 1

B+

2
VCORE_GSNS

3

AON6932A_DFN5X6-8-7

A

<10>

2

+SOC_VNN

17

Close CPU L/S MOS

PC838
0.01UF_0402_25V7K

4

1
18

UGATE1

PR828

1

1

PR815
3.65K_0603_1%

1 2
LGATE1

VGATE

@ PC836
330P_0402_50V7K
1
2

VCORE_VSNS

PL803
0.22UH_FDUE0640J-H-R22M-P3_25A_20%

LGATE1

2

1.91K_0402_1%
1
2

19

UGATE1

1

PR842
137K_0402_1%

<10>

0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A

1

1
2

PC818
1U_0603_10V6K
2
1
@ PR801

20

NTC_1

PC834
150P_0402_50V8J
2
1
2

3

AON6932A_DFN5X6-8-7

PR820
1_0603_5%

PC801
1U_0603_10V6K
2
1

PHASE1
BOOT1

NTC
PGOOD

LGATE1

ISEN2

4

25
UGATEG

26
BOOTG

28

27
PGOODG

29
FBG

COMPG

31

30
RTNG

ISUMNG

33

VR_HOT#

RS@ PR819
0_0603_5%

21

VDD
PW M2

15

1
2

8

22

BOOT1

PC831
68P_0402_50V8J
1
2

1

S2

+5VALW

@ PR833
42.2K_0402_1%
1
2

PC830
470P_0402_50V7K
1
2
1
2
PR837
499_0402_1%
PR841
2.21K_0402_1%
1
2

32

PR812
PC828
PR832
680P_0402_50V7K 2K_0402_1%
1
2
1
2

PH803
470K_0402_5%_TSM0B474J4702RE
2
1
2

1
2

@ PC826
0.1U_0402_16V7K

PR826
PR829
27.4K_0402_1% 3.83K_0402_1%

1
PR825
69.8_0402_1%

1

+1.0VS
B

2
RS@PR822
0_0402_5%

+5VALW

2

1
PR824
69.8_0402_1%

@

2

1
PR823
499_0402_1%
2

2

@ PC825
47P_0402_50V8J

1

1

SDA

COMP

7

NTC

ISL95833HRTZ-T_TQFN32_4X4

14

6

24
23

VCCP

ALERT#

FB

5

SCLK

RTN

4

VR_HOT#

For VR_HOT#, already
pull high at power side.

ISUMPG

PAD

VR_SVID_ALERT#

13

<23>

3

LGATEG

12

VR_SVID_DATA

S2
D1

D

5

PR814 @EMC@
4.7_1206_5%

LGATEG

PHASEG

PC835
PR838
6800P_0402_25V7K 649 +-1% 0402
2
1
2
1

<8>

VR_SVID_CLK_R

VR_SVID_DATA_R

G1

6

BOOTG

VR_ON

ISUMN

VR_SVID_ALERT#

1 PR843 2
20_0402_1%
PR844
16.9_0402_1%
1
2

PC812
1000P_0402_50V7K

S2

UGATEG1

NTCG

ISUMP

VR_SVID_CLK

<8>

1

NTCG

2
0_0402_5%

11

<8>

2
RS@ PR821

10

1

VR_ON

ISEN1

<23>

PR818
3.83K_0402_1%
1
2

9

PH802
470K_0402_5%_TSM0B474J4702RE
NTCG_1
1
2

Close GFX L/S MOS

@EMC@ PC808
2200P_0402_50V7K
2
1

PR806
2K_0402_1%

2
1
1.91K_0402_1%

PC815
0.047U_0402_25V7K
2
1

PC814
0.1U_0402_16V7K
2
1

PR811
11K_0402_1%
2
1

PR810
2.61K_0402_1%
2
1 2

.1U_0402_16V7K
PC813
2
1
C

1

G2
S1/D2

PHASEG

PU801

PR817
27.4K_0402_1%
1
2

PQ801

7

2

1

PR807
240_0402_1%
1
2

+3VALWP

VSUMG+

CPU_B+

1 2

1

PH801
10K_0402_1%_TSM0A103F34D1RZ
VSUMG-

2

2
1
PR808
20.5K_0402_1%

PR803
649 +-1% 0402
2
1

PC806
6800P_0402_25V7K

Close GFX choke

PR813
PC816
2.2_0603_5%
0.1U_0603_25V7K
1
2
1
2
BOOTG
RS@ PR809 0_0603_5%
1
2 UGATEG1-1
UGATEG1

PC804
68P_0402_50V8J
1
2

D

1

PHASEG

2

VCORE_GSNS

LGATEG

2

PC803
0.01UF_0402_25V7K

PC809
10U_0805_25V6K
2
1

<10>

Sheet
1

35

of

37

5

4

3

2

1

D

D

+SOC_VNN
PC913 1
PC914 1
PC915 1
PC916 1

+SOC_VCC
PC901 1
PC903 1
PC905 1
PC907 1

2
2
2
2

22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M

2
2
2
2

PC917 2

22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 330U_D2_2.5VY_R9M

+

1 330U_D2_2.5VY_R9M
1 330U_D2_2.5VY_R9M

C

1 330U_D2_2.5VY_R9M
+

PC911 2

Output Cap

1 330U_D2_2.5VY_R9M

PC919 2

+

C

PC909 2

+

Output Cap

PC918 2

+

+SOC_VCC

Package Edge Cap

Back Side Cap

PC929 1

+SOC_VNN

2 22U_0805_6.3V6M

PC930 1

2 10U_0603_6.3V6M

PC931 1
PC932 1

2 10U_0603_6.3V6M
2 10U_0603_6.3V6M

PC933 1
PC934 1

2 2.2U_0402_6.3V6M
2 2.2U_0402_6.3V6M

PC920 1
PC921 1
PC922 1

2 10U_0603_6.3V6M
2 10U_0603_6.3V6M
2 10U_0603_6.3V6M

Package Edge Cap

PC923 1
PC924 1
PC925 1

2 1U_0402_6.3V6K
2 1U_0402_6.3V6K
2 1U_0402_6.3V6K

Back Side Cap

@ PC926 1
@ PC927 1
@ PC928 1

B

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

B

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/04/12

Deciphered Date

2014/04/12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CPU_CORE_CAP
Size
B

Date:
5

4

3

2

Document Number

Rev
0.3

Bay Trail M LA-A621P
Sheet
1

36

of

37

5

4

3

2

Version change list (P.I.R. List)
Item
1
2
3

D

Fixed Issue

Page 1 of 2
for PWR
Reason for change

Tune Power sequence by HW request

1.05VS & 1.5VS sequence meet SPEC
Change 1.35V voltage close to 1.35

EMI request

Cut-in EMI solution

4

1

Approve CPU transient

Rev.

PG#

Modify List

Date

Change PR702 to 2.5K, PR611 to 51K, PC620 to 150nF
Change PR509 to 7.68K

32
30

Change PR310 to 2.2

CPU

Phase

07/05 DVT
07/05 DVT
07/05 DVT

Change PC931, PC932 from 4.7uF to 10uF
Change PR839 from 240 to 232
Add PR808 to 20.5K
Change PC812 from 330pF to 1000pF
Change PC828 from 470pF to 680pF

07/24 DVT

Add PR411, PR413
Add PC609 into 4700P
Change PR608 from 133K to 127K
Unpop PC926

12/22 DVT2

Delete
08/14
D

5
6

7
8

+1.05V ripple close
upper and mean too low

Adjust output voltage and add Cff

9
10

Improve CPU transient character
Tune sequence

11
12
13
14
15

0 ohm reduce
Provide 3/5V PG signal to EC
ESD request
ESD request
Use HW to control VCIN1 function

40
35

12/22 DVT2
01/09 DVT2
02/04 PVT

Change PC428 from 4700p to 10n,
PC427 from 0.047u to 6.8n

Change PR507,PR513,PR523 to R-pad
Add PR416
Add PC101 into 0.1uF
Add PC521, PR503, PC507
Add PR204

35
32
36
33

02/22
02/22
02/26
02/26
03/05

PVT
PVT
PVT
PVT
PVT

C

B

C

B

12

13

14

15

16

A

17

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/07/10

2014/04/12

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

PIR (PWR)
Size Document Number
Custom

V5WE2 M/B LA-9532P Schematic

Date:
5

4

3

2

Tuesday, September 03, 2013

Sheet
1

37

of

37

R ev
0.3

www.s-manuals.com



---

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XMP Toolkit                     : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39
Create Date                     : 2013:09:03 17:51:50+08:00
Modify Date                     : 2014:06:19 16:04:29+03:00
Metadata Date                   : 2014:06:19 16:04:29+03:00
Format                          : application/pdf
Creator                         : 
Title                           : Compal LA-A621P - Schematics. www.s-manuals.com.
Subject                         : Compal LA-A621P - Schematics. www.s-manuals.com.
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