Compal LA A972P Schematics. Www.s Manuals.com. R0.3 Schematics

User Manual: Motherboard Compal LA-A972P Goliad MLK 12 UMA ENTRY - Schematics. Free.

Open the PDF directly: View PDF .
Page Count: 52

1 1

2 2

3 3

4 4

BOM P/N :

PCB NO :

COMPAL CONFIDENTIAL

MODEL NAME :

Goliad MLK 12" UMA ENTRY

REV : 0.2 (X01)

@ : Nopop Component

Goliad MLK 12 UMA ENTRY

2013-12-23

CONN@ : Connector Component

Broadwell U Processor

LA-A972P

4319RK31LXX

GPIO MAP: 3.3b

EMC@ : EMI, ESD and RF Component

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

CXDP@ : XDP Component

@EMC@ : EMI, ESD and RF Nopop Component

VPRO@ : Vpro Component

Layout Dell logo

REV: X01

PWB: FGFC2

DATE: 1352-01

NVPRO@ : Non-Vpro Component

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Cover Sheet

1 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Cover Sheet

1 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Cover Sheet

1 48Monday, March 17, 2014

Compal Electronics, Inc.

Part Number Description

DA8000ZB000 PCB 14A LA-A972P REV0 MB W/O DOCKING 2

MB PCB

Part Number Description

DA8000ZB000 PCB 14A LA-A972P REV0 MB W/O DOCKING 2

MB PCB

1 1

2 2

3 3

4 4

PCI Express BUS

PCIE1

HD Audio I/F

Universal Jack

Automatic Power

Switch (APS)

CPU XDP Port

Power On/Off

SW & LED

DC/DC Interface

Memory BUS (DDR3L)

BANK 0, 1, 2, 3

DDR3L-DIMM X2

Goliad MLK 12 UMA Entry Block Diagram

KB/TP CONN

BCM5882

USH

Smart Card

RFID

Dig. MIC

INT.Speaker

ALC3234

HDA Codec

Intel Clarkville

I218LM

TDA8034HN

eDP CONN

SPI

INTEL

BROADWELL ULT

SATA1

BC BUS

Fingerprint

CONN

FP_USB

SMSC KBC

MEC5085

WLAN/BT/

1333/1600MHz

W25Q32BVSSIQ

64M 4K sector

32M 4K sector

W25Q64CVSSIQ

SD4.0

O2 Micro OZ777FJ2LN

Card reader

Discrete TPM

ECE1099

SMSC SIO

USH board

AT97SC3205

PAGE 29 PAGE 29

PAGE 36

PAGE 35

PAGE 37

PAGE 27

PAGE 7

PAGE 21

WIGIG

PAGE 23

PAGE 28

PCIE3 PCIE4

Dual Lane eDP1.3

DDI2

FAN CONN

USB2.0[6]

PAGE 9

PAGE 39

PAGE 38

PAGE 30

PAGE 6~17

PAGE 18 19

PAGE 23

Trough eDP Cable

Camera

PAGE 27

LPC

PAGE 24

mDP CONN

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Transformer

RJ45

PAGE 28

PAGE 21

USH CONN

PAGE 27

USB2.0[2]

PCIE5_L0

WIGIG_DP

DDI1

Reverse Type

LID switch

LCD Touch

PAGE 23

Trough eDP Cable

WIGIG_DP

HDMI CONN

PAGE 24

Parade

PS8339

PAGE 25

HDMI

USB3.0/2.0

PAGE 31

USB

USB3.0[4]

USB2.0[3]

USB2.0[4]

PAGE 31

USB3.0/2.0+PS

USB2.0[0]

PAGE 32

USB3.0/2.0

USB3.0[2]

TPS2544

USB POWER SHARE

PAGE 33

USB2.0[1]

USB2.0[5]

SIM+HALL/B

Full Mini Card

mSATA

PAGE 20

USB3.0[1]

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Block diagram

2 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Block diagram

2 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Block diagram

2 48Monday, March 17, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

PM TABLE

PCIE

PCIE 1

PCIE 2

PCIE 3

POWER STATES

PCIE 4

PCIE 5

LOM

+3.3V_M +3.3V_M

(M-OFF)

OFF

OFFOFF

+3.3V_SUS+5V_ALW +5V_RUN

+3.3V_ALW_PCH

+1.35V_MEM

S5 S4/AC doesn't exist

power

plane

S5 S4/AC

State

OFFON

ON ON

OFF

OFFOFF

+3.3V_RTC_LDO

+1.05V_M

WLAN + BT

CAMERA

USH

USB PORT#

DESTINATION

BDW

ULT

+1.05V_M+3.3V_RUN

+0.675V_DDR_VTT

+VCC_CORE

+1.05V_RUN

WLAN - JNGFF1

SATA

SATA 0

DESTINATION

JMINI3SATA 1

SATA 2

SATA 3

BIO

USH

JUSB2

JUSB3

OFF

LOW

OFF

S0 (Full ON) / M0

SLP

S3#

SLP

S5#

HIGH

Signal

State

SLP

S4#

HIGH HIGH

ALWAYS

PLANE

SUS

PLANE

RUN

PLANE

CLOCKS

ON ON ON

S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF

S4 (Suspend to DISK) / M3 ON ON OFF

SLP

HIGH

LOW HIGH HIGH

S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW

S3 (Suspend to RAM) / M-OFF

S5 (SOFT OFF) / M-OFF

LOW HIGH HIGH LOW ON ONOFF OFF OFF

LOW LOW LOW ON OFF OFF OFF OFF

LOW LOW LOW LOW ON OFF OFF OFF OFF

S4 (Suspend to DISK) / M-OFF HIGH

JUSB3-->Right

JUSB1-->Rear left

JUSB2-->Rear Right

USB3.0

USB3.0 1

USB3.0 2

USB3.0 4

+3.3V_ALW

MMI (CARD READER)

PCIE 6

JUSB1

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

USB3.0 3

Touch Screen

WWAN

WiGig - JNGFF1

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Port assignment

3 40Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

LA-A972P

0.1

Port assignment

3 40Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

LA-A972P

0.1

Port assignment

3 40Monday, March 17, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

BATTERY +PWR_SRC

ADAPTER FDC654P +BL_PWR_SRC

EN_INVPWR

CHARGER

+3.3V_ALW

TPS51285 +5V_ALW

ALWON

RUN_ON

+3.3V_RUN

(QV1)

(PU100)

+VCC_CORE

ISL95813

(PU501)

+1.35V_MEM

SUS_ON

0.675V_DDR_VTT_ON

RT8207

(PU200)

+0.675V_DDR_VTT

+3.3V_SUS

TPS22966

SUS_ON

+5V_RUN

RUN_ON

H_VR_EN

+3.3V_ALW_PCH

PCH_ALW_ON

(UZ8) (UZ9)

TPS22966

(QZ1)

LP2301ALT1G

+3.3V_CAM

TPS22966

(UZ2)

RUN_ON

+1.05V_RUN

3.3V_CAM_EN#

A_ON

+3.3V_M

TPS22966

(UZ2)

TPS22966

+3.3V_LAN

(UZ3)

SIO_SLP_LAN#

APL3512

(UV24)

EN_LCDPWR

+LCDVDD

USB_PWR_SHR_EN#

TPS2544

+5V_USB_CHG_PWR

USB_PWR_EN1#

(UI1)

G547I2P81U

+USB_SIDE_PWR +USB_RIGHT_PWR

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

+1.05V_M

(PU300)

SY8208

A_ON

AUX_EN_WOWL

+3.3V_WLAN

SI3456

(QZ6)

MPHYP_PWR_EN

+1.05V_MODPHY

(UI3) (UI2)

G547I2P81U

USB_PWR_EN2#

TPS22965

(UZ11)

+3.3V_HDD

3.3V_HDD_EN

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Power rails

4 40Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Power rails

4 40Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Power rails

4 40Monday, March 17, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

MEC 5085

MEM_SMBDATA

MEM_SMBCLK

KBC

AH1

AP2

+3.3V_ALW_PCH

2.2K

200

DIMMA

202

DIMMB

200

202

AN1

AK1

+3.3V_ALW

2.2K

DOCK_SMB_CLK

DOCK_SMB_DAT

2.2K

LCD_SMBCLK

LCD_SMDATA

B59

A56

+3.3V_ALW

2.2K

100 ohm

100 ohm BATTERY

CONN

PBAT_SMBCLK

PBAT_SMBDAT

B50

A47

+3.3V_ALW

2.2K

BAY_SMBDAT

BAY_SMBCLK

A49

B52

CARD_SMBCLK

CARD_SMBDAT

+3.3V_ALW

2.2K

LOM

CHARGER_SMBCLK

CHARGER_SMBDAT

Charger

SML1_SMBDATA

BDW

SML1_SMBCLK

AU3AH3

A50

B53

B6A5

+3.3V_ALW_PCH

2.2K

USH

+3.3V_SUS

USH_SMBCLK

USH_SMBDAT

+3.3V_ALW

10K

XDP

2N7002

2.2K

SMBUS Address [0x9a]

+3.3V_ALW

B48

B49

+3.3V_ALW

2.2K

GPU_SMBDAT

GPU_SMBCLK

SML0CLK

SML0DATA

+3.3V_ALW_PCH

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

+3.3V_RUN

2.2K

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

SMbus Block diagram

5 40Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

SMbus Block diagram

5 40Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

SMbus Block diagram

5 40Monday, March 17, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

High - Enable Internal VRs

Low - Enable External VRs

INTVRMEN - INTEGRATED SUS 1.05V VRM

ENABLE

CMOS setting

Shunt Clear CMOS

Keep CMOS

TPM setting

Shunt Clear ME RTC Registers

Keep ME RTC Registers

ME_CLR1

Open

CMOS_CLR1

Open

CMOS place near DIMM

CAD note:

Place the resistor within 500 mils of the PCH. Avoid

routing next to clock pins.

SATA Impedance Compensation

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

HDA for Codec

Reserve for EMI

SATA HDD

for DOCK

UMA SATA port

for SATA-CACHE (WWAN)

for PCIe Cache (WWAN)

PCB

G14U_En

G14D_En

G14 UMA

G14 DSC

G12 UMA

SATA2/PCIE6 L1SATA1

M2 3030 WIGIG

E-Dock

SATA0

M2 3042

2nd PCIe Lane for PCIe Cache

SATA3/PCIE6 L0

G12 EntryNA

E-Dock

mSATA

HDD

mSATA

NA NA

M2 3042

SATA-Cache(no HCA)

M2 3042

(HCA & SATA-Cache)

M2 3042

2nd PCIe Lane for PCIe Cache

M2 3030 WIGIG

M2 3042

(HCA & SATA-Cache)

contact to WWAN

SATA2/PCIE6_L1 contact to WWAN

SATA3/PCIE6 L0 contact to WLAN

contact to WLAN

ME_FWP PCH has internal 20K PD.

Service Mode Switch:

Add a switch to ME_FWP signal to unlock the ME region and

allow the entire region of the SPI flash to be updated using FPT.

FLASH DESCRIPTOR SECURITY OVERRIDE

LOW = ENABLE (DEFAULT) -->Pin1 & Pin3 short

HIGH = DISABLE (ME can update) -->Pin2 & Pin3 short

PT, ST pop RC2 & SW1; MP pop RC301.

INTRUDER#

ME_FWP

PCH_AZ_BITCLK

PCH_AZ_CODEC_SDIN0

PCH_AZ_RST#

PCH_AZ_SDOUT

PCH_AZ_SYNC

PCH_INTVRMEN

PCH_JTAG_JTAGX

PCH_JTAG_TCK

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_TMS

PCH_JTAG_TRST#

PCH_RTCRST#

PCH_RTCX1PCH_RTCX1_R

SATA_ACT#

SATA_COMP

SRTCRST#

PCH_RTCX2

MPCIE_RST#

HDD_DET#

MPCIE_RST#

ME_FWP

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_TMS

PM_TEST_RST

ME_FWPME_FWP_EC

+RTC_CELL

+PCH_ASATA3PLL

+3.3V_RUN

+1.05V_M

+3.3V_ALW_PCH

+1.05V_M

PCH_AZ_CODEC_SDIN0<21>

PCH_AZ_CODEC_SYNC<21>

PCH_AZ_CODEC_BITCLK<21>

PCH_AZ_CODEC_RST#<21>

PCH_AZ_CODEC_SDOUT<21>

SATA_ACT# <39>

PCH_JTAG_TDI<9>

PCH_JTAG_TDO<9>

PCH_JTAG_TMS<9>

PCH_RTCRST#<9>

PCH_JTAG_TCK<9>

PCH_JTAG_TRST#<9>

PCH_JTAG_JTAGX<9>

SATA_PTX_DRX_P1 <20>

SATA_PTX_DRX_N1 <20>

SATA_PRX_DTX_P1 <20>

SATA_PRX_DTX_N1 <20>

HDD_DET# <20>

mCARD_PCIE#_SATA_R <36,7>

DGPU_PWROK<10>

ME_FWP_EC<36>

MMICLK_REQ#<29,7>

SATA2_PCIE6_L1 <12>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (1/12)

6 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (1/12)

6 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (1/12)

6 48Monday, March 17, 2014

Compal Electronics, Inc.

RPC18

10K_8P4R_5%

RPC18

10K_8P4R_5%

YC1

32.768KHZ_12.5PF_9H03220008

YC1

32.768KHZ_12.5PF_9H03220008

RC9 1M_0402_5%RC9 1M_0402_5%

1 2

RC11 1K_0402_5%RC11 1K_0402_5%

1 2

SW1

SS3-CMFTQR9_3P

SW1

SS3-CMFTQR9_3P

RC10 20K_0402_5%RC10 20K_0402_5%

1 2

RC300

10K_0402_5%

RC300

10K_0402_5%

1 2

RC21

51_0402_5%RC21

51_0402_5%

RC301

0_0402_5%

@RC301

0_0402_5%

CC3 1U_0402_6.3V6KCC3 1U_0402_6.3V6K

1 2

RC7

10M_0402_5%

RC7

10M_0402_5%

CC4 1U_0402_6.3V6K

1 2

CC100

1U_0402_6.3V6K

CC100

1U_0402_6.3V6K

1 2

BDW_ULT_DDR3L

JTAG

RTC

AUDIO SATA

5 OF 19

UC1E

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

JTAG

RTC

AUDIO SATA

5 OF 19

UC1E

BDW-ULT-DDR3L_BGA1168

RSVD L11

RSVD K10

PCH_TMS

AD62 PCH_TDO

AE61 PCH_TDI

AD61 PCH_TCK

AE62 PCH_TRST

AU62

HDA_DOCK_RST/I2S1_SFRM

AV10 HDA_DOCK_EN/I2S1_TXD

AW10

HDA_SDI1/I2S1_RXD

AU12

HDA_SDO/I2S0_TXD

AU11

HDA_SDI0/I2S0_RXD

AY10 HDA_RST/I2S_MCLK

AU8 HDA_SYNC/I2S0_SFRM

AV11 HDA_BCLK/I2S0_SCLK

AW8

RSVD

AC4 RSVD

AL11

RSVD

AV2

I2S1_SCLK

AY8

SATALED U3

JTAGX

AE63

RTCX2

AY5

SATA_RCOMP C12

SATA_IREF A12

SATA3GP/GPIO37 AC1

SATA2GP/GPIO36 V6

SATA1GP/GPIO35 U1

SATA0GP/GPIO34 V1

SATA_TP3/PETP6_L0 D17

SATA_TN3/PETN6_L0 C17

SATA_RP3/PERP6_L0 E5

SATA_RN3/PERN6_L0 F5

SATA_TP2/PETP6_L1 C15

SATA_TN2/PETN6_L1 B14

SATA_RN2/PERN6_L1 J6

SATA_RP2/PERP6_L1 H6

SATA_TP1/PETP6_L2 B17

SATA_TN1/PETN6_L2 A17

SATA_RN1/PERN6_L2 J8

SATA_RP1/PERP6_L2 H8

SATA_TP0/PETP6_L3 A15

SATA_TN0/PETN6_L3 B15

SATA_RP0/PERP6_L3 H5

SATA_RN0/PERN6_L3 J5

RTCX1

AW5

RTCRST

AU7 SRTCRST

AV6 INTVRMEN

AV7 INTRUDER

AU6

RPC21

51_0804_8P4R_5%

RPC21

51_0804_8P4R_5%

1 8

2 7

3 6

4 5

RC20 33_0402_5%RC20 33_0402_5%

1 2

CMOS1

SHORT PADS~DCMOS1

SHORT PADS~D

122

CC5

@EMC@

27P_0402_50V8J

CC5

@EMC@

27P_0402_50V8J

RC4@0_0402_5%RC4@0_0402_5%

1 2

RC19 33_0402_5%RC19 33_0402_5%

1 2

RC18@1K_0402_1%RC18@1K_0402_1%

RC1

330K_0402_5%

RC1

330K_0402_5%

RC23 33_0402_5%

EMC@

RC23 33_0402_5%

EMC@

1 2

CC2

12P_0402_50V8J

CC2

12P_0402_50V8J

1 2

RC8 20K_0402_5%RC8 20K_0402_5%

1 2

RC22 33_0402_5%RC22 33_0402_5%

1 2

RC173.01K_0402_1% RC173.01K_0402_1%

1 2

CC1

12P_0402_50V8J

CC1

12P_0402_50V8J

1 2

RC2

1K_0402_5%

RC2

1K_0402_5%

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

support SPI TPM

LPC_0 LPC_1 LPC_0 LPC_1

support LPC TPM

SIO

MEC

DOCK

DEBUG SIO

MEC

TPM

DOCK

DEBUG

CLKBUFF

WLAN (NGFF1)--->

10/100/1G LAN --->

MMI --->

PCIECLK for UMA

WGIG (NGFF1)--->

HCA/PCIe cache (NGFF2)--->

PCB

G14U_En

G14D_En

G14 UMA

G14 DSC

G12 UMA

PCIE3PCIE2

SD card

PCIE1 PCIE4

G12 Entry NA

WIGIG

WIGIGSD card

SD card

NA LOM

LOM

WLAN

PCIE5

GPU

WIGIG

GPU

WIGIG

PCIE6

WIGIG

M2 3042

(HCA & SATA-Cache)

M2 3042

(HCA & SATA-Cache)

to SPI ROMfrom CPU

32Mb Flash ROM

64Mb Flash ROM

SOFTWARE TAA

Please place RC224~RC331 with JSPI1 at the same MB side.

Reserve for EMI

CLK_BIASREF

LPC_LAD0

LPC_LAD1

LPC_LAD2

LPC_LAD3

LPC_LFRAME#

MCP_TESTLOW1

MCP_TESTLOW2

MCP_TESTLOW3

MCP_TESTLOW4

MEM_SMBCLK

MEM_SMBDATA

PCH_CL_CLK1

PCH_CL_DATA1

PCH_CL_RST1#

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_CS1#

PCH_SPI_DIN

PCH_SPI_DO

PCH_SPI_DO2

PCH_SPI_DO3

PCI_CLK_LPC_0

SML0_SMBCLK

SML0_SMBDATA

SML1_SMBCLK

SML1_SMBDATA

SPI_CLK32 SPI_CLK64

XTAL24_IN

XTAL24_OUT

PCI_CLK_LPC_0

XTAL24_OUT_R

PCI_CLK_LPC_1

LANCLK_REQ#

WLANCLK_REQ#

MMICLK_REQ#

WIGIGCLK_REQ#

PCH_GPIO23

PCH_SPI_CS2#

PCH_GPIO19

SML0_SMBCLK

SML0_SMBDATA

SML0_SMBCLK

SML0_SMBDATA

SPI_PCH_DO

SPI_PCH_DIN

SPI_PCH_CLK

SPI_PCH_CS1#

SPI_PCH_DO2

SPI_PCH_CS0#

SPI_PCH_DO3PCH_SPI_DO3

PCH_SPI_DIN

PCH_SPI_DO2

PCH_SPI_CS0#

PCH_SPI_DO

PCH_SPI_CS1#

PCH_SPI_CLK

SPI_PCH_CS1#

SPI_PCH_CS0#

SPI_CLK64

SPI_CLK32

SPI_PCH_DO3_32

SPI_PCH_DO2_64

SPI_PCH_DO2_32

SPI_PCH_CS1#_R

SPI_PCH_CS0#_R

SPI_DO64

SPI_DO32

SPI_DIN64

SPI_DIN32

SPI_PCH_DO3_64

SPI_PCH_DO2 SPI_PCH_DO2_64

SPI_PCH_DO2 SPI_PCH_DO2_32

SPI_PCH_DO2

SPI_PCH_DO3

SPI_PCH_DO3_32

SPI_PCH_DIN

SPI_PCH_DO

SPI_PCH_CLK

SPI_PCH_DO3

SPI_PCH_CLK

SPI_PCH_DO

SPI_PCH_DO3

SPI_PCH_DIN

SPI_DO64

SPI_CLK64

SPI_PCH_DO3_64

SPI_DIN64

SPI_DIN32

SPI_DO32

SPI_CLK32

MEM_SMBCLK

MEM_SMBDATA

SML1_SMBCLK

SML1_SMBDATA

LANCLK_REQ#

DDR_XDP_WAN_SMBCLK

DDR_XDP_WAN_SMBDAT

CLK_PCI_MEC

CLK_PCI_LPDEBUG

+PCH_VCCACLKPLL

+3.3V_RUN

+3.3V_ALW_PCH

+3.3V_RUN

+3.3V_M

+3.3V_SPI

+3.3V_RUN

LPC_LAD0<20,36>

LPC_LAD1<20,36>

LPC_LAD2<20,36>

LPC_LAD3<20,36>

LPC_LFRAME#<20,36>

DDR_XDP_WAN_SMBDAT <18,19,9>

DDR_XDP_WAN_SMBCLK <18,19,9>

SML1_SMBDATA <36>

SML1_SMBCLK <36>

PCH_GPIO73 <12>

CLK_PCI_MEC <36>

PCH_CL_CLK1 <30>

PCH_CL_DATA1 <30>

PCH_CL_RST1# <30>

CLK_PCI_LPDEBUG <20,36>

PCH_SMB_ALERT# <11>

CLK_PCIE_W LAN#<30>

CLK_PCIE_W LAN<30>

CLK_PCIE_LAN#<28>

CLK_PCIE_LAN<28>

CLK_PCIE_MMI#<29>

CLK_PCIE_MMI<29>

CLK_PCIE_W IGIG#<30>

CLK_PCIE_W IGIG<30>

PCH_SPI_CS2#<27>

MMICLK_REQ#<29,6>

LANCLK_REQ#<28>

WLANCLK_REQ#<12,30>

WIGIGCLK_REQ#<12,30>

PCH_SPI_CLK<27>

PCH_SPI_DO<27> PCH_SPI_DIN<27>

LAN_SMBDATA <28>

LAN_SMBCLK <28>

mCARD_PCIE#_SATA_R <36,6>

PCH_GPIO16 <12>

CONTACTLESS_DET# <10,27>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (2/12)

7 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (2/12)

7 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (2/12)

7 48Monday, March 17, 2014

Compal Electronics, Inc.

RC55 33_0402_5%

VPRO@

RC55 33_0402_5%

VPRO@

1 2

RC228 0_0402_5%RC228 0_0402_5%

RC65@0_0402_5%RC65@0_0402_5%

1 2

RC229 0_0402_5%RC229 0_0402_5%

RC62

@EMC@

33_0402_5%

RC62

@EMC@

33_0402_5%

1 2

RPC12

33_0804_8P4R_5%

VPRO@

RPC12

33_0804_8P4R_5%

VPRO@

1 8

2 7

3 6

4 5

RC61

@EMC@

33_0402_5%

RC61

@EMC@

33_0402_5%

1 2

CC10

@EMC@

33P_0402_50V8J

CC10

@EMC@

33P_0402_50V8J

1 2

RC231 0_0402_5%RC231 0_0402_5%

YC2

24MHZ_12PF_X3G024000DC1H

YC2

24MHZ_12PF_X3G024000DC1H

BDW_ULT_DDR3L

LPC

SMBUS

C-LINKSPI

7 OF 19

UC1G

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

LPC

SMBUS

C-LINKSPI

7 OF 19

UC1G

BDW-ULT-DDR3L_BGA1168

CL_RST AF4

CL_DATA AD2

CL_CLK AF2

SML1CLK/GPIO75 AU3

SML1DATA/GPIO74 AH3

SML1ALERT/PCHHOT/GPIO73 AU4

SML0DATA AK1

SML0CLK AN1

SMBDATA AH1

SML0ALERT/GPIO60 AL2

SMBCLK AP2

SMBALERT/GPIO11 AN2

SPI_IO3

AF1 SPI_IO2

Y6 SPI_MISO

AA4 SPI_MOSI

AA2 SPI_CS2

AC2 SPI_CS1

SPI_CLK

AA3

SPI_CS0

LFRAME

AV12 LAD3

AW11 LAD2

AY12 LAD1

AW12 LAD0

AU14

RC74EMC@ 22_0402_5%RC74EMC@ 22_0402_5%

1 2

RPC6

10K_8P4R_5%

RPC6

10K_8P4R_5%

4 5

CC11

15P_0402_50V8J

CC11

15P_0402_50V8J

CC13

@EMC@12P_0402_50V8J

CC13

@EMC@12P_0402_50V8J

RC63

1M_0402_5%

RC63

1M_0402_5%

1 2

RC693.01K_0402_1% RC693.01K_0402_1%

1 2

CC8

15P_0402_50V8J

CC8

15P_0402_50V8J

RC50 0_0402_5%

VPRO@

RC50 0_0402_5%

VPRO@

1 2

RC30 0_0402_5%@RC30 0_0402_5%@

RC35 0_0402_5%@RC35 0_0402_5%@

1 2

CC9

@EMC@

33P_0402_50V8J

CC9

@EMC@

33P_0402_50V8J

1 2

JSPI1

E-T_6700K-Y20N-00L

CONN@

JSPI1

E-T_6700K-Y20N-00L

CONN@

2 2

4 4

6 6

8 8

10 10

12 12

14 14

16 16

18 18

G1 21

G2 22

G3 23

G4 24

20 20

CC7

0.1U_0402_25V6

VPRO@

CC7

0.1U_0402_25V6

VPRO@

1 2

RC242 10K_0402_5%RC242 10K_0402_5%

1 2

CC12

@EMC@12P_0402_50V8J

CC12

@EMC@12P_0402_50V8J

RPC14

2.2K_0804_8P4R_5%

RPC14

2.2K_0804_8P4R_5%

4 5

RC240 10K_0402_5%RC240 10K_0402_5%

1 2

CC6

0.1U_0402_25V6

CC6

0.1U_0402_25V6

1 2

RC225 0_0402_5%RC225 0_0402_5%

RC68 10K_0402_5%RC68 10K_0402_5%

1 2

RC34499_0402_1% RC34499_0402_1%

RC224 0_0402_5%RC224 0_0402_5%

UC3

W25Q32FVSSIQ_SO8

VPRO@

UC3

W25Q32FVSSIQ_SO8

VPRO@

/CS

DO/IO1

/WP/IO2

GND

4DI/IO0 5

CLK 6

/HOLD/IO3 7

VCC 8

RC66 10K_0402_5%RC66 10K_0402_5%

1 2

RPC11

33_0804_8P4R_5%

RPC11

33_0804_8P4R_5%

1 8

2 7

3 6

4 5

CLOCK

SIGNALS

BDW_ULT_DDR3L

6 OF 19

UC1F

BDW-ULT-DDR3L_BGA1168

CLOCK

SIGNALS

BDW_ULT_DDR3L

6 OF 19

UC1F

BDW-ULT-DDR3L_BGA1168

CLKOUT_PCIE_N1

B41

CLKOUT_PCIE_P1

A41

PCIECLKRQ1/GPIO19

PCIECLKRQ0/GPIO18

U2 CLKOUT_PCIE_P0

C42

CLKOUT_ITPXDP B35

CLKOUT_LPC_0 AN15

CLKOUT_LPC_1 AP15

PCIECLKRQ4/GPIO22

U5 CLKOUT_PCIE_P4

B39 CLKOUT_PCIE_N4

A39

PCIECLKRQ3/GPIO21

CLKOUT_PCIE_N0

C43

XTAL24_OUT B25

XTAL24_IN A25

PCIECLKRQ5/GPIO23

T2 CLKOUT_PCIE_P5

A37 CLKOUT_PCIE_N5

B37

CLKOUT_PCIE_P3

C37 CLKOUT_PCIE_N3

B38

PCIECLKRQ2/GPIO20

AD1

CLKOUT_PCIE_N2

C41

CLKOUT_PCIE_P2

B42

DIFFCLK_BIASREF C26

RSVD K21

RSVD M21

TESTLOW_C35 C35

TESTLOW_C34 C34

TESTLOW_AK8 AK8

TESTLOW_AL8 AL8

CLKOUT_ITPXDP_P A35

RC227 0_0402_5%RC227 0_0402_5%

RC67EMC@ 22_0402_5%RC67EMC@ 22_0402_5%

1 2

RC241 10K_0402_5%RC241 10K_0402_5%

1 2

RC29 1K_0402_5%RC29 1K_0402_5%

1 2

RC38 33_0402_5%RC38 33_0402_5%

1 2

RC226 0_0402_5%RC226 0_0402_5%

RN42.2K_0402_5% RN42.2K_0402_5%

UC2

W25Q64FVSSIQ_SO8

UC2

W25Q64FVSSIQ_SO8

/CS

DO(IO1)

/WP(IO2)

GND

4DI(IO0) 5

CLK 6

/HOLD(IO3) 7

VCC 8

RC243 10K_0402_5%RC243 10K_0402_5%

1 2

RC32 0_0402_5%@RC32 0_0402_5%@

QC1B

DMN66D0LDW -7_SOT363-6

QC1B

DMN66D0LDW -7_SOT363-6

3 4

RC230 0_0402_5%RC230 0_0402_5%

RC31 1K_0402_5%RC31 1K_0402_5%

1 2

RN32.2K_0402_5% RN32.2K_0402_5%

QC1A

DMN66D0LDW -7_SOT363-6

QC1A

DMN66D0LDW -7_SOT363-6

RC33499_0402_1% RC33499_0402_1%

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

DDR_A_BS0

DDR_A_BS1

DDR_A_BS2

DDR_A_CAS#

DDR_A_D0

DDR_A_D1

DDR_A_D10

DDR_A_D11

DDR_A_D12

DDR_A_D13

DDR_A_D14

DDR_A_D15

DDR_A_D16

DDR_A_D17

DDR_A_D18

DDR_A_D19

DDR_A_D2

DDR_A_D20

DDR_A_D21

DDR_A_D22

DDR_A_D23

DDR_A_D24

DDR_A_D25

DDR_A_D26

DDR_A_D27

DDR_A_D28

DDR_A_D29

DDR_A_D3

DDR_A_D30

DDR_A_D31

DDR_A_D32

DDR_A_D33

DDR_A_D34

DDR_A_D35

DDR_A_D36

DDR_A_D37

DDR_A_D38

DDR_A_D39

DDR_A_D4

DDR_A_D40

DDR_A_D41

DDR_A_D42

DDR_A_D43

DDR_A_D44

DDR_A_D45

DDR_A_D46

DDR_A_D47

DDR_A_D48

DDR_A_D49

DDR_A_D5

DDR_A_D50

DDR_A_D51

DDR_A_D52

DDR_A_D53

DDR_A_D54

DDR_A_D55

DDR_A_D56

DDR_A_D57

DDR_A_D58

DDR_A_D59

DDR_A_D6

DDR_A_D60

DDR_A_D61

DDR_A_D62

DDR_A_D63

DDR_A_D7

DDR_A_D8

DDR_A_D9

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#2

DDR_A_DQS#3

DDR_A_DQS#4

DDR_A_DQS#5

DDR_A_DQS#6

DDR_A_DQS#7

DDR_A_DQS0

DDR_A_DQS1

DDR_A_DQS2

DDR_A_DQS3

DDR_A_DQS4

DDR_A_DQS5

DDR_A_DQS6

DDR_A_DQS7

DDR_A_MA0

DDR_A_MA1

DDR_A_MA10

DDR_A_MA11

DDR_A_MA12

DDR_A_MA13

DDR_A_MA14

DDR_A_MA15

DDR_A_MA2

DDR_A_MA3

DDR_A_MA4

DDR_A_MA5

DDR_A_MA6

DDR_A_MA7

DDR_A_MA8

DDR_A_MA9

DDR_A_RAS#

DDR_A_WE#

DDR_B_BS0

DDR_B_BS1

DDR_B_BS2

DDR_B_CAS#

DDR_B_D0

DDR_B_D1

DDR_B_D10

DDR_B_D11

DDR_B_D12

DDR_B_D13

DDR_B_D14

DDR_B_D15

DDR_B_D16

DDR_B_D17

DDR_B_D18

DDR_B_D19

DDR_B_D2

DDR_B_D20

DDR_B_D21

DDR_B_D22

DDR_B_D23

DDR_B_D24

DDR_B_D25

DDR_B_D26

DDR_B_D27

DDR_B_D28

DDR_B_D29

DDR_B_D3

DDR_B_D30

DDR_B_D31

DDR_B_D32

DDR_B_D33

DDR_B_D34

DDR_B_D35

DDR_B_D36

DDR_B_D37

DDR_B_D38

DDR_B_D39

DDR_B_D4

DDR_B_D40

DDR_B_D41

DDR_B_D42

DDR_B_D43

DDR_B_D44

DDR_B_D45

DDR_B_D46

DDR_B_D47

DDR_B_D48

DDR_B_D49

DDR_B_D5

DDR_B_D50

DDR_B_D51

DDR_B_D52

DDR_B_D53

DDR_B_D54

DDR_B_D55

DDR_B_D56

DDR_B_D57

DDR_B_D58

DDR_B_D59

DDR_B_D6

DDR_B_D60

DDR_B_D61

DDR_B_D62

DDR_B_D63

DDR_B_D7

DDR_B_D8

DDR_B_D9

DDR_B_DQS#0

DDR_B_DQS#1

DDR_B_DQS#2

DDR_B_DQS#3

DDR_B_DQS#4

DDR_B_DQS#5

DDR_B_DQS#6

DDR_B_DQS#7

DDR_B_DQS0

DDR_B_DQS1

DDR_B_DQS2

DDR_B_DQS3

DDR_B_DQS4

DDR_B_DQS5

DDR_B_DQS6

DDR_B_DQS7

DDR_B_MA0

DDR_B_MA1

DDR_B_MA10

DDR_B_MA11

DDR_B_MA12

DDR_B_MA13

DDR_B_MA14

DDR_B_MA15

DDR_B_MA2

DDR_B_MA3

DDR_B_MA4

DDR_B_MA5

DDR_B_MA6

DDR_B_MA7

DDR_B_MA8

DDR_B_MA9

DDR_B_RAS#

DDR_B_WE#

DDR_CKE0_DIMMA

DDR_CKE1_DIMMA DDR_CKE2_DIMMB

DDR_CKE3_DIMMB

DDR_CS0_DIMMA#

DDR_CS1_DIMMA# DDR_CS2_DIMMB#

DDR_CS3_DIMMB#

M_CLK_DDR#0

M_CLK_DDR#1

M_CLK_DDR#2

M_CLK_DDR#3

M_CLK_DDR0

M_CLK_DDR1

M_CLK_DDR2

M_CLK_DDR3

+SM_VREF_CA

+SM_VREF_DQ0

+SM_VREF_DQ1

DDR_A_D[0..63]<18>

DDR_A_DQS#[0..7] <18>

DDR_A_DQS[0..7] <18>

DDR_A_MA[0..15] <18>

M_CLK_DDR0 <18>

M_CLK_DDR#0 <18>

M_CLK_DDR1 <18>

M_CLK_DDR#1 <18>

DDR_CKE0_DIMMA <18>

DDR_CKE1_DIMMA <18>

DDR_CS0_DIMMA# <18>

DDR_CS1_DIMMA# <18>

DDR_A_BS0 <18>

DDR_A_BS1 <18>

DDR_A_BS2 <18>

DDR_A_RAS# <18>

DDR_A_WE# <18>

DDR_A_CAS# <18>

DDR_B_D[0..63]<19>

M_CLK_DDR#2 <19>

M_CLK_DDR2 <19>

M_CLK_DDR#3 <19>

M_CLK_DDR3 <19>

DDR_CKE2_DIMMB <19>

DDR_CKE3_DIMMB <19>

DDR_CS3_DIMMB# <19>

DDR_CS2_DIMMB# <19>

DDR_B_BS2 <19>

DDR_B_BS1 <19>

DDR_B_BS0 <19>

DDR_B_CAS# <19>

DDR_B_WE# <19>

DDR_B_RAS# <19>

DDR_B_MA[0..15] <19>

DDR_B_DQS#[0..7] <19>

DDR_B_DQS[0..7] <19>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (3/12)

8 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (3/12)

8 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (3/12)

8 48Monday, March 17, 2014

Compal Electronics, Inc.

BDW_ULT_DDR3L

DDR CHANNEL A

3 OF 19

UC1C

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

DDR CHANNEL A

3 OF 19

UC1C

BDW-ULT-DDR3L_BGA1168

SM_VREF_DQ0 AR51

SM_VREF_DQ1 AP51

SM_VREF_CA AP49

SA_DQSP7 AL49

SA_DQSP5 AW53

SA_DQSP6 AL42

SA_DQSP2 AN58

SA_DQSP3 AN55

SA_DQSP4 AW57

SA_DQSP0 AJ62

SA_DQSP1 AN61

SA_DQSN6 AL43

SA_DQSN7 AL48

SA_DQSN4 AV57

SA_DQSN5 AV53

SA_DQSN3 AM55

SA_DQSN1 AN62

SA_DQSN2 AM58

SA_DQSN0 AJ61

SA_MA15 AU42

SA_MA13 AR35

SA_MA14 AV42

SA_MA10 AP35

SA_MA12 AU41

SA_MA11 AW41

SA_MA8 AY39

SA_MA9 AU40

SA_MA6 AV40

SA_MA7 AW39

SA_MA5 AR36

SA_MA4 AU39

SA_MA3 AP36

SA_MA2 AR38

SA_MA0 AU36

SA_MA1 AY37

SA_BA2 AY41

SA_BA1 AV35

SA_BA0 AU35

SA_WE AW 34

SA_CAS AU34

SA_RAS AY34

SA_ODT0 AP32

SA_CS#0 AP33

SA_CS#1 AR32

SA_CKE3 AY43

SA_CKE0 AU43

SA_CKE1 AW43

SA_CKE2 AY42

SA_DQ15

AP60

SA_DQ63

AK51 SA_DQ62

AM51 SA_DQ61

AK48 SA_DQ60

AM48 SA_DQ59

AK49 SA_DQ58

AM49 SA_DQ57

AK46 SA_DQ56

AM46 SA_DQ55

AM42 SA_DQ54

AM40 SA_DQ53

AK43 SA_DQ52

AK45 SA_DQ51

AM45 SA_DQ50

AM43 SA_DQ49

AK42 SA_DQ48

AK40 SA_DQ47

AU52 SA_DQ46

AV52 SA_DQ45

AU54 SA_DQ44

AV54 SA_DQ43

AW52 SA_DQ42

AY52 SA_DQ41

AW54 SA_DQ40

AY54 SA_DQ39

AU56 SA_DQ38

AV56 SA_DQ37

AU58 SA_DQ36

AV58 SA_DQ35

AW56 SA_DQ34

AY56 SA_DQ33

AW58 SA_DQ32

AY58 SA_DQ31

AN54 SA_DQ30

AR54 SA_DQ29

AK55

SA_DQ26

AM54

SA_DQ27

AK54

SA_DQ24

AP55 SA_DQ23

AN57 SA_DQ22

AR57 SA_DQ21

AK58 SA_DQ20

AL58 SA_DQ19

AK57 SA_DQ18

AM57 SA_DQ17

AR58 SA_DQ16

AP58

SA_DQ14

AP61 SA_DQ13

AM60 SA_DQ12

AM61 SA_DQ11

AP62 SA_DQ10

AP63 SA_DQ9

AM62 SA_DQ8

AM63 SA_DQ7

AK60 SA_DQ6

AK61 SA_DQ5

AH60

SA_DQ3

AK62 SA_DQ2

AK63 SA_DQ1

AH62 SA_DQ0

AH63 SA_CLK#0 AU37

SA_CLK0 AV37

SA_CLK#1 AW 36

SA_CLK1 AY36

SA_DQ28

AL55

SA_DQ25

AR55

SA_DQ4

AH61

BDW_ULT_DDR3L

DDR CHANNEL B

4 OF 19

UC1D

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

DDR CHANNEL B

4 OF 19

UC1D

BDW-ULT-DDR3L_BGA1168

SB_DQ14

AV25

SB_DQSN5 AV18

SB_DQSN7 AN18

SB_DQSP4 AV22

SB_DQSP5 AW18

SB_DQSP6 AM21

SB_DQSP3 AM25

SB_DQSP7 AM18

SB_DQSP2 AM28

SB_DQSP0 AV30

SB_DQSP1 AW26

SB_DQSN6 AN21

SB_DQSN2 AN28

SB_DQSN3 AN25

SB_DQSN4 AW 22

SB_DQSN1 AV26

SB_DQSN0 AW 30

SB_MA14 AR46

SB_MA15 AP46

SB_MA13 AK33

SB_MA9 AU46

SB_MA10 AK36

SB_MA11 AV47

SB_MA8 AY47

SB_MA12 AU47

SB_MA4 AR45

SB_MA5 AP45

SB_MA6 AW46

SB_MA3 AR42

SB_MA7 AY46

SB_MA2 AP42

SB_MA0 AP40

SB_MA1 AR40

SB_BA2 AU49

SB_WE AK35

SB_CAS AM33

SB_BA0 AL35

SB_BA1 AM36

SB_RAS AM35

SB_CS#1 AK32

SB_ODT0 AL32

SB_CS#0 AM32

SB_CKE1 AU50

SB_CKE2 AW49

SB_CKE3 AV50

SB_CKE0 AY49

SB_CK#1 AK38

SB_CK1 AL38

SB_CK0 AN38

SB_CK#0 AM38

SB_DQ61

AM20

SB_DQ63

AP18 SB_DQ62

AR18

SB_DQ57

AR20 SB_DQ56

AN20

SB_DQ58

AK18

SB_DQ59

AL18

SB_DQ60

AK20

SB_DQ51

AM22

SB_DQ52

AN22

SB_DQ53

AP21

SB_DQ54

AK21

SB_DQ55

AK22

SB_DQ46

AV17

SB_DQ47

AU17

SB_DQ48

AR21

SB_DQ49

AR22

SB_DQ50

AL21

SB_DQ45

AU19

SB_DQ41

AW19

SB_DQ42

AY17

SB_DQ43

AW17

SB_DQ44

AV19

SB_DQ40

AY19

SB_DQ36

AV23

SB_DQ37

AU23

SB_DQ38

AV21

SB_DQ39

AU21

SB_DQ35

AW21

SB_DQ31

AL25

SB_DQ32

AY23

SB_DQ33

AW23

SB_DQ30

AK25

SB_DQ34

AY21

SB_DQ26

AR25 SB_DQ25

AR26

SB_DQ27

AP25

SB_DQ28

AK26

SB_DQ29

AM26

SB_DQ20

AR29

SB_DQ21

AN29

SB_DQ22

AR28

SB_DQ23

AP28

SB_DQ24

AN26

SB_DQ15

AU25

SB_DQ16

AM29

SB_DQ17

AK29

SB_DQ18

AL28

SB_DQ19

AK28

SB_DQ10

AY25

SB_DQ11

AW25

SB_DQ13

AU27

SB_DQ5

AU31

SB_DQ7

AU29

SB_DQ8

AY27

SB_DQ9

AW27

SB_DQ0

AY31

SB_DQ1

AW31

SB_DQ2

AY29

SB_DQ3

AW29

SB_DQ4

AV31

SB_DQ12

AV27

SB_DQ6

AV29

D D

C C

B B

A A

HIGH = ENABLED (DEFAULT)

LOW = DISABLED

DSWODVREN - ON DIE DSW VR ENABLE

RC5 need to close to JCPU1

Place near JXDP1

Place near JXDP1.47

Place near JXDP1.48

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

CAD Note:

Avoid stub in the PWRGD path

while placing resistors RC123

CAD Note:

Trace width=12~15 mil, Spcing=20 mils

Max trace length= 500 mil

DDR3 COMPENSATION SIGNALS

reference Shark Bay ULT Validation Customer Debug Port

Implementation Requirement Rev 1.0

EMI request add

20130726 same as Goliad

Fix Intel 7260 can not detect issue.

It will cause “floating” situation before 3V_RUN coming of AND gate

AC_PRESENT

SIO_PWRBTN#

CFG0

CFG1

CFG10

CFG11

CFG12

CFG13

CFG14

CFG15

CFG16

CFG17

CFG18

CFG19

CFG2

CFG3

CFG3CFG3_R

CFG4

CFG5

CFG6

CFG7

CFG8

CFG9

CLKRUN#

CPU_XDP_PRDY#

CPU_XDP_PREQ#

CPU_XDP_TCLK

CPU_XDP_TDI

CPU_XDP_TDO

CPU_XDP_TMS

CPU_XDP_TRST#

DSWODVREN

H_CATERR#

H_CPUPWRGD

H_PROCHOT#

H_PROCHOT#_R

H_VCCST_PWRGD_XDP

ME_RESET#

ME_SUS_PWR_ACK

PCH_BATLOW#

PCH_DPWROK

PCH_JTAG_TCK

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_PCIE_WAKE#

PCH_PLTRST#

PCH_PLTRST#_EC

PCH_RSMRST#_Q PCH_RTCRST#

PECI_EC

PM_APWROK_R

RUNPWROK

SIO_PWRBTN#

SIO_SLP_A#

SIO_SLP_LAN#

SIO_SLP_S0#

SIO_SLP_S3#

SIO_SLP_S4#

SIO_SLP_S5#

SIO_SLP_SUS#

SIO_SLP_WLAN#

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

SUSACK#

SUS_STAT#/LPCPD#

SYS_PWROK

SYS_RESET#

PCH_JTAG_TDI

TDI_XDP_R

TDO_XDP

PCH_JTAG_TMS

TRST#_XDP

XDP_DBRESET#

XDP_OBS0_R

XDP_OBS1_R

XDP_OBS2_R

XDP_OBS3_R

XDP_OBS4_R

XDP_OBS5_R

XDP_OBS6_R

XDP_OBS7_R

XDP_RST#_R

H_PROCHOT#

PCH_PLTRST#

SUSCLK_R

H_CPUPWRGD

PCH_PCIE_WAKE#

PM_APWROK PM_APWROK_L

PCH_PLTRST#_EC

PCH_RSMRST#_Q

PM_LANPHY_ENABLE

+3.3V_RUN

+3.3V_ALW_PCH

+RTC_CELL

+3.3V_RUN

+1.05V_VCCST

+1.05V_RUN

+3.3V_RUN

+1.05V_RUN

+3.3V_ALW_PCH

+PCH_VCCDSW3_3

+1.05V_RUN

+3.3V_RUN

+3.3V_ALW_PCH

+PCH_VCCDSW3_3

+3.3V_ALW2

+PCH_VCCDSW3_3

PCH_PLTRST#_EC <20,27,30,36>

SIO_PWRBTN#<36>

AC_PRESENT<36,9>

SIO_SLP_WLAN#<35>

PCH_DPWROK <36>

PCH_PCIE_WAKE# <35,36>

CLKRUN# <10,36>

SIO_SLP_S5# <36>

SIO_SLP_S4# <36>

SIO_SLP_S3# <36>

SIO_SLP_A# <36>

SIO_SLP_SUS# <36>

SIO_SLP_LAN# <36,38>

PECI_EC<36>

H_PROCHOT#<36,45,46>

DDR_PG_CTRL<18>

CFG18 <13>

CFG17 <13>

CFG16 <13>

CFG3<13>

CFG1<13>

CFG0<13>

CFG4<13>

CFG2<13>

CFG7<13>

CFG6<13>

CFG5<13>

CFG9 <13>

CFG10 <13>

CFG11 <13>

CFG8 <13>

CFG13 <13>

CFG14 <13>

CFG15 <13>

CFG12 <13>

CFG19 <13>

H_VCCST_PWRGD<15>

DDR3_DRAMRST#_CPU<18>

PCH_RTCRST#<6>

PCH_JTAG_JTAGX<6>

PCH_JTAG_TRST#<6>

RUNPWROK<36>

PCH_JTAG_TDI<6>

PCH_JTAG_TDO<6>

POWER_SW#_MB<36,39>

PLTRST_LAN#<28>

PLTRST_USH#<27>

PLTRST_MMI#<29>

SUSCLK <30>

PCH_RSMRST#_Q<37>

ME_SUS_PWR_ACK<36>

RESET_OUT#<15,36>

SUSACK#<36>

SYS_PWROK<36>

CPU_PWR_DEBUG#<15>

DDR_XDP_WAN_SMBDAT<18,19,7>

DDR_XDP_WAN_SMBCLK<18,19,7>

PCH_JTAG_TCK<6>

PCH_JTAG_TMS<6>

PCH_BATLOW#<9>

AC_PRESENT <36,9>

PCH_BATLOW# <9>

PM_APWROK<36>

1.05V_M_PWRGD<43>

PM_LANPHY_ENABLE <12,28>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (4/12)

9 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (4/12)

9 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (4/12)

9 48Monday, March 17, 2014

Compal Electronics, Inc.

RC130200_0402_1% RC130200_0402_1% 12

UC5

TC7SH08FU_SSOP5~D

UC5

TC7SH08FU_SSOP5~D

CC18

0.1U_0402_25V6

CC18

0.1U_0402_25V6

T13 @PAD~D T13 @PAD~D

RC91 47K_0402_5%RC91 47K_0402_5%

1 2

RC95@8.2K_0402_5%RC95@8.2K_0402_5%

1 2

T8 @PAD~DT8 @PAD~D

JAPS1

CONN@

ACES_50506-01841-P01

JAPS1

CONN@

ACES_50506-01841-P01

GND

RC79 10K_0402_5%RC79 10K_0402_5%

1 2

RC119 @0_0402_5% RC119 @0_0402_5%

RC1120_0402_5% CXDP@RC1120_0402_5% CXDP@

RC87@0_0402_5%RC87@0_0402_5%

1 2

RC122

1K_0402_5%

RC122

1K_0402_5%

RC129

51_0402_5%

RC129

51_0402_5%

RC27 0_0402_5%@RC27 0_0402_5%@

1 2

T14 @PAD~D T14 @PAD~D

DDR3L

BDW_ULT_DDR3L

MISC

THERMAL

PWR

JTAG

2 OF 19

UC1B

BDW-ULT-DDR3L_BGA1168

DDR3L

BDW_ULT_DDR3L

MISC

THERMAL

PWR

JTAG

2 OF 19

UC1B

BDW-ULT-DDR3L_BGA1168

BPM#4 K59

BPM#5 H63

BPM#6 K60

SM_RCOMP0

AU60

BPM#7 J61

BPM#3 H62

BPM#1 H60

BPM#2 H61

BPM#0 J60

PROC_TDO F62

PROC_TDI F63

PROC_TMS E61

PECI

N62 CATERR

K61

PROCPW RGD

C61

PROCHOT

K63 PROC_TRST E59

PROC_TCK E6 0

PRDY J62

PREQ K62

SM_PG_CNTL1

AV61 SM_DRAMRST

AV15 SM_RCOMP2

AU61 SM_RCOMP1

AV60

PROC_DETECT

D61

JXDP1

CONN@SAMTE_BSH-030-01-L-D-A

JXDP1

CONN@SAMTE_BSH-030-01-L-D-A

GND0

1GND1 2

OBSFN_A0

3OBSFN_C0 4

OBSFN_A1

5OBSFN_C1 6

GND2

7GND3 8

OBSDATA_A0

9OBSDATA_C0 10

OBSDATA_A1

11 OBSDATA_C1 12

GND4

13 GND5 14

OBSDATA_A2

15 OBSDATA_C2 16

OBSDATA_A3

17 OBSDATA_C3 18

GND6

19 GND7 20

OBSFN_B0

21 OBSFN_D0 22

OBSFN_B1

23 OBSFN_D1 24

GND8

25 GND9 26

OBSDATA_B0

27 OBSDATA_D0 28

OBSDATA_B1

29 OBSDATA_D1 30

GND10

31 GND11 32

OBSDATA_B2

33 OBSDATA_D2 34

OBSDATA_B3

35 OBSDATA_D3 36

GND12

37 GND13 38

PWRGOOD/HOOK0

39 ITPCLK/HOOK4 40

HOOK1

41 ITPCLK#/HOOK5 42

VCC_OBS_AB

43 VCC_OBS_CD 44

HOOK2

45 RESET#/HOOK6 46

HOOK3

47 DBR#/HOOK7 48

GND14

49 GND15 50

SDA

51 TD0 52

SCL

53 TRST# 54

TCK1

55 TDI 56

TCK0

57 TMS 58

GND16

59 GND17 60

CC22@

0.1U_0402_25V6

CC22@

0.1U_0402_25V6

RC78

330K_0402_5%

RC78

330K_0402_5%

1 2

RC118 @0_0402_5% RC118 @0_0402_5%

T15 @PAD~D T15 @PAD~D

CC83

100P_0402_50V8J

@EMC@

CC83

100P_0402_50V8J

@EMC@

CC20

22P_0402 _50V8J

@EMC@

CC20

22P_0402 _50V8J

@EMC@

T11 @PAD~D T11 @PAD~D RC126

51_0402_5%

RC126

51_0402_5%

RC113 1K_0402_5%

CXDP@

RC113 1K_0402_5%

CXDP@

1 2

RC136 0_0402_5%@RC136 0_0402_5%@

1 2

RC132100_0402_1% RC132100_0402_1% 12

RC98 0_0402_5%

CXDP@

RC98 0_0402_5%

CXDP@

1 2

UC7

74CBTLV3126BQ_DHVQFN14_2P5X3

CXDP@

UC7

74CBTLV3126BQ_DHVQFN14_2P5X3

CXDP@

1OE

21B 3

2OE

52B 6

GND 7

3B 8

3OE

4B 11

4OE

VCC

GND PAD 15

RC127

51_0402_5%

RC127

51_0402_5%

UC6

TC7SH08FU_SSOP5~D

UC6

TC7SH08FU_SSOP5~D

RC114@49.9_0402_1%RC114@49.9_0402_1%

1 2

RC99 0_0402_5%

CXDP@

RC99 0_0402_5%

CXDP@

1 2

RC77@0_0402_5%RC77@0_0402_5%

1 2

RC103@1K_0402_5%RC103@1K_0402_5%

1 2

T12 @PAD~D T12 @PAD~D

RC89@0_0402_5%RC89@0_0402_5%

1 2

RC116 62_0402_5%RC116 62_0402_5%

1 2

CC21

0.1U_0402_25V6

CXDP@CC21

0.1U_0402_25V6

CXDP@

RC106 1K_0402_5%

CXDP@

RC106 1K_0402_5%

CXDP@

RC115 @0_0402_5% RC115 @0_0402_5%

CC17

0.1U_0402_25V6

CXDP@CC17

0.1U_0402_25V6

CXDP@

RC124

51_0402_5%

RC124

51_0402_5%

RC82@10K_0402_5%RC82@10K_0402_5%

1 2

RC102 1K_0402_5%

CXDP@

RC102 1K_0402_5%

CXDP@

1 2

RC88@0_0402_5%RC88@0_0402_5%

1 2

RC121 56_0402_5%RC121 56_0402_5%

1 2

T9 @

PAD~DT9 @

PAD~D

RC117

51_0402_5% RC117

51_0402_5%

RC128

51_0402_5%

RC128

51_0402_5%

RC26 0_0402_5%@RC26 0_0402_5%@

1 2

RC81 10K_0402_5%RC81 10K_0402_5%

1 2

RC125

51_0402_5%

RC125

51_0402_5%

RC120

CXDP@

1K_0402_5%

RC120

CXDP@

1K_0402_5%

1 2

BDW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

8 OF 19

UC1H

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

8 OF 19

UC1H

BDW-ULT-DDR3L_BGA1168

SLP_A AL5

SLP_SUS AP4

SLP_LAN AJ7

SLP_S3 AT4

SLP_S5/GPIO63 AP5

SLP_S4 AJ6

SUSCLK/GPIO62 AE6

CLKRUN/GPIO32 V5

SUS_STAT/GPIO61 AG4

WAKE AJ5

DSWVRMEN AW7

DPWROK AV5

SLP_WLAN/GPIO29

AM5 SLP_S0

AF3

SUSWARN/SUSPW RDNACK/GPIO30

AV4

PWRBTN

AL7

BATLOW/GPIO72

AN4 ACPRESENT/GPIO31

AJ8

RSMRST

AW6

PCH_PW ROK

AY7

SUSACK

AK2

PLTRST

AG7 APWROK

AB5

SYS_PWROK

AG2 SYS_RESET

AC3

RC304

100K_0402_5%

@RC304

100K_0402_5%

RPC1

10K_8P4R_5%

RPC1

10K_8P4R_5%

4 5

RC131121_0402_1% RC131121_0402_1% 12

RC80@8.2K_0402_5%RC80@8.2K_0402_5%

RC123

10K_0402_5%

RC123

10K_0402_5%

CC19

0.1U_0402_25V6

CC19

0.1U_0402_25V6

RC92 10K_0402_5%@RC92 10K_0402_5%@

1 2

RC1090_0402_5% CXDP@RC1090_0402_5% CXDP@

T10 @PAD~D T10 @PAD~D

UC4@

74AHC1G09GW_ TSSOP5

UC4@

74AHC1G09GW_ TSSOP5

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

COMPENSATION PU FOR eDP

CAD Note:Trace width=20 mils ,Spacing=25mil,

Max length=100 mils.

PCH_GPIO53

DPB_HPD

DPC_HPD

EDP_BIA_PWM

EDP_COMP

EDP_CPU_AUX

EDP_CPU_AUX#

EDP_CPU_HPD

EDP_CPU_LANE_N0

EDP_CPU_LANE_N1

EDP_CPU_LANE_P0

EDP_CPU_LANE_P1

ENVDD_PCH

PANEL_BKLEN

HDD_FALL_INT

DGPU_PWROK

CPU_DPC_CTRLCLK

CPU_DPC_CTRLDAT

EDP_CPU_HPD

DPB_HPD

CPU_DPB_AUX

CPU_DPC_AUX

CPU_DPC_AUX#

CPU_DPB_AUX#

CPU_DPB_CTRLDAT

CPU_DPB_CTRLCLK

CPU_DPB_AUX

CPU_DPB_AUX#

CPU_DPB_CTRLCLK

CPU_DPB_CTRLDAT

CPU_DPC_AUX

CPU_DPC_AUX#

CPU_DPC_CTRLCLK

CPU_DPC_CTRLDAT

+VCCIOA_OUT

+3.3V_RUN

DDI1_LANE_N3<25>

DDI1_LANE_N2<25>

DDI1_LANE_N1<25>

DDI1_LANE_N0<25>

DDI1_LANE_P1<25>

DDI1_LANE_P0<25>

DDI1_LANE_P3<25>

DDI1_LANE_P2<25>

DPB_HPD <25>

DPC_HPD <24>

PANEL_BKLEN<23>

ENVDD_PCH<23,36>

CONTACTLESS_DET#<27,7>

EDP_CPU_LANE_P0 <23>

EDP_CPU_LANE_N0 <23>

EDP_CPU_LANE_P1 <23>

EDP_CPU_LANE_N1 <23>

EDP_CPU_AUX <23>

EDP_CPU_AUX# <23>

EDP_CPU_HPD <23>

EDP_BIA_PWM<23>

PCH_GPIO52<12>

DDI2_LANE_N3<24>

DDI2_LANE_N0<24>

DDI2_LANE_N1<24>

DDI2_LANE_N2<24>

DDI2_LANE_P3<24>

DDI2_LANE_P0<24>

DDI2_LANE_P1<24>

DDI2_LANE_P2<24>

TOUCHPAD_INTR#<12>

DGPU_PWROK<6>

PCH_GPIO80<12>

CPU_DPC_CTRLDAT <24>

CPU_DPC_CTRLCLK <24>

CPU_DPB_AUX <25>

CPU_DPB_AUX# <25>

CPU_DPC_AUX# <24>

CPU_DPC_AUX <24>

CPU_DPB_CTRLDAT <25>

CPU_DPB_CTRLCLK <25>

HDD_FALL_INT<12>

IRQ_SERIRQ <12,36>

USH_DET# <12,27>

SIO_RCIN# <12,36>

CLKRUN# <36,9>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (5/12)

10 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (5/12)

10 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (5/12)

10 48Monday, March 17, 2014

Compal Electronics, Inc.

RPC2

2.2K_0804_8P4R_5%

RPC2

2.2K_0804_8P4R_5%

4 5

RC141100K_0402_5% RC141100K_0402_5%

BDW_ULT_DDR3L

EDPDDI

1 OF 19

UC1A

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

EDPDDI

1 OF 19

UC1A

BDW-ULT-DDR3L_BGA1168

DDI1_TXN0

C54

DDI1_TXP0

C55

DDI1_TXN1

B58

DDI1_TXP1

C58

DDI1_TXN2

B55

DDI1_TXP2

A55

DDI1_TXN3

A57

EDP_TXP0 B46

EDP_TXN0 C45

EDP_TXN1 A47

EDP_TXP1 B47

EDP_TXN2 C47

EDP_TXP2 C46

EDP_TXN3 A49

EDP_TXP3 B49

EDP_AUXP B45

EDP_AUXN A45

DDI1_TXP3

B57

DDI2_TXP1

B54

DDI2_TXP0

C50 DDI2_TXN0

C51

DDI2_TXN1

C53

DDI2_TXN2

C49

DDI2_TXP2

B50

DDI2_TXN3

A53

DDI2_TXP3

B53

EDP_RCOMP D20

EDP_DISP_UTIL A43

RPC20

100K_0804_8P4R_5%

RPC20

100K_0804_8P4R_5%

4 5

RC142100K_0402_5% RC142100K_0402_5%

RC13324.9_0402_1% RC13324.9_0402_1%

T16@PAD~DT16@PAD~D

RC140@1K_0402_5%RC140@1K_0402_5%

BDW_ULT_DDR3L

eDP SIDEBAND

PCIE

DISPLAY

9 OF 19

UC1I

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

eDP SIDEBAND

PCIE

DISPLAY

9 OF 19

UC1I

BDW-ULT-DDR3L_BGA1168

DDPC_AUXN B6

DDPC_AUXP A6

DDPB_AUXP B5

EDP_BKLEN

GPIO53

L4 GPIO51

R5 GPIO54

L3 GPIO52

L1 GPIO55

PME

AD4 PIRQD/GPIO80

N2 PIRQC/GPIO79

DDPB_CTRLCLK B9

DDPB_CTRLDATA C9

DDPC_CTRLCLK D9

DDPC_CTRLDATA D11

DDPB_HPD C8

EDP_HPD D6

DDPC_HPD A8

DDPB_AUXN C5

EDP_VDDEN

EDP_BKLCTL

PIRQA/GPIO77

PIRQB/GPIO78

RC139@100K_0402_5%RC139@100K_0402_5%

1 2

RPC15

10K_8P4R_5%

RPC15

10K_8P4R_5%

D D

C C

B B

A A

CAD NOTE:

Route single-end 50-ohms and max 500-mils length.

Avoid routing next to clock pins or under stitching capacitors.

Recommended minimum spacing to other signal traces is 15

mils.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

10/100/1G LAN --->

WLAN (Mini Card 2)--->

-----> Ext Port 1 Charge

-----> Ext Port 3

-----> WLAN/BT

-----> Ext USB3 Port 3

-----> Ext USB3 Port 1 Charge

MMI -->

-----> USH

-----> Camera

-----> Ext Port 2

-----> Touch

-----> WWAN

PCIE for UMA

WIGIG --->

-----> USB Port0 (JUSB1)

-----> USB Port1 (JUSB3)

-----> USB Port3 (JUSB2)

PCB

G14U_En

G14D_En

G14 UMA

G14 DSC

G12 UMA WWAN

USB2 7

G12 Entry

WWAN

PCB

G14U_En

G14D_En

G14 UMA

G14 DSC

G12 UMA

PCIE3PCIE2

SD card

PCIE1 PCIE4

G12 Entry NA

WIGIG

WIGIGSD card

SD card

NA LOM

LOM

WLAN

PCIE5

GPU

WIGIG

GPU

WIGIG

PCIE6

WIGIG

M2 3042

(HCA & SATA-Cache)

M2 3042

(HCA & SATA-Cache)

PCH_PCIE_RCOMP

PCIE_PRX_GLANTX_N3

PCIE_PRX_GLANTX_P3

PCIE_PRX_WLANTX_N4

PCIE_PRX_WLANTX_P4

PCIE_PTX_GLANRX_N3

PCIE_PTX_GLANRX_P3

PCIE_PTX_WLANRX_N4

PCIE_PTX_WLANRX_P4

USBP0+

USBP0-

USBP1+

USBP1-

USBP2+

USBP2-

USBRBIAS

USB_OC0#

USB_OC3#

USB_OC1#

USB_OC2#

PCIE_PRX_MMITX_N1

PCIE_PRX_MMITX_P1

PCIE_PTX_MMIRX_N1

PCIE_PTX_MMIRX_P1

USBP6+

USBP6-

USBP5+

USBP5-

USBP3+

USBP3-

USBP4+

USBP4-

PCIE_PRX_WIGIGTX_N5

PCIE_PRX_WIGIGTX_P5

PCIE_PTX_WIGIGRX_N5

PCIE_PTX_WIGIGRX_P5

USB_OC0#

+PCH_AUSB3PLL

+3.3V_ALW_PCH

USBP0- <31>

USBP0+ <31>

USB3RN1 <31>

USB3RN2 <32>

USB3RP2 <32>

USB3TN2 <32>

USB3TP2 <32>

USB3RP1 <31>

USB3TN1 <31>

USB3TP1 <31>

PCIE_PTX_GLANRX_N3<28>

PCIE_PTX_GLANRX_P3<28>

PCIE_PRX_GLANTX_P3<28>

PCIE_PRX_GLANTX_N3<28>

PCIE_PRX_WLANTX_P4<30>

PCIE_PRX_WLANTX_N4<30>

PCIE_PTX_WLANRX_N4<30>

PCIE_PTX_WLANRX_P4<30>

USBP2+ <30>

USBP2- <30>

USBP1+ <32>

USBP1- <32>

USB_OC0# <31>

USB_OC2# <12,31>

USB_OC1# <12,32>

PCIE_PRX_MMITX_N1<29>

PCIE_PTX_MMIRX_N1<29>

PCIE_PRX_MMITX_P1<29>

PCIE_PTX_MMIRX_P1<29>

USBP6+ <27>

USBP6- <27>

USBP5- <23>

USBP5+ <23>

USBP3+ <31>

USBP3- <31>

USB3RN4<31>

USB3RP4<31>

USB3TN4<31>

USB3TP4<31>

USBP4+ <23>

USBP4- <23>

PCIE_PTX_WIGIGRX_N5<30>

PCIE_PTX_WIGIGRX_P5<30>

PCIE_PRX_WIGIGTX_P5<30>

PCIE_PRX_WIGIGTX_N5<30>

USB_OC3# <12>

PCH_GPIO44<12>

PCH_SMB_ALERT#<7>

KB_DET#<12,37>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (6/12)

11 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (6/12)

11 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (6/12)

11 48Monday, March 17, 2014

Compal Electronics, Inc.

BDW_ULT_DDR3L

PCIE USB

11 OF 19

UC1K

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

PCIE USB

11 OF 19

UC1K

BDW-ULT-DDR3L_BGA1168

RSVD AM10

RSVD AN10

USB2P1 AT7

USB2P0 AM8

PERN3

G11

PETN5_L0

C23

USBRBIAS AJ10

USBRBIAS AJ11

PETN5_L1

B23

PETP5_L1

A23

USB2N7 AR13

USB2P7 AP13

USB2N6 AP11

USB2P5 AN13

USB2N5 AM13

USB2P6 AN11

USB2P4 AL15

USB2N4 AM15

USB2P3 AT10

USB2N3 AR10

USB2P2 AP8

USB2N2 AR8

USB2N1 AR7

USB2N0 AN8

PETP4

A29

PERP4

G13

PERN5_L3

PERP5_L3

PETN5_L2

B21

PERP5_L2

G10 PERN5_L2

H10

OC0/GPIO40 AL3

OC1/GPIO41 AT1

OC2/GPIO42 AH2

OC3/GPIO43 AV3

PETN3

C29

PERP3

F11

PERN5_L1

PETN5_L3

B22

PETP5_L3

A21

PERP5_L1

PETN4

B29

PETP5_L0

C22

PERP5_L0

E10 PERN5_L0

F10

PERN4

F13

PETP3

B30

PCIE_IREF

B27 PCIE_RCOMP

A27 RSVD

E13

PETP5_L2

C21

PERP1/USB3RP3

F17 PERN1/USB3RN3

G17

RSVD

E15

PETP1/USB3TP3

C31 PETN1/USB3TN3

C30

PERN2/USB3RN4

F15

PETP2/USB3TP4

A31 PETN2/USB3TN4

B31

PERP2/USB3RP4

G15

USB3RN1 G20

USB3RP1 H20

USB3TN1 C33

USB3TP1 B34

USB3RN2 E18

USB3RP2 F18

USB3TN2 B33

USB3TP2 A33

RC152

22.6_0402_1%

RC152

22.6_0402_1%

RC149 3.01K_0402_1%RC149 3.01K_0402_1%

1 2

RPC19

10K_8P4R_5%

RPC19

10K_8P4R_5%

4 5

D D

C C

B B

A A

No Reboot on TCO Timer expiration

HIGH

LOW(DEFAULT)

TLS CONFIDENTIALITYTOP-BLOCK SWAP OVERRIDE

HIGH

LOW(DEFAULT)

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

ENABLE

DISABLE

ENABLE

DISABLE

PCH_NFC_RST for Goliad

HIGH

LOW(DEFAULT)

ENABLE

DISABLE

HIGH

LOW

DIMM Detect

1 DIMM

2 DIMM

3.3V_CAM_EN#

PCH_GPIO85

3.3V_TP_EN

BBS_BIT

CAM_MIC_CBL_DET#

CPPE#

CPUSB#

PCH_GPIO87

LAN_WAKE#

FFS_INT2

H_THERMTRIP#_R

I2C0_SCL

I2C0_SDA

I2C1_SCL_VMM

I2C1_SDA_VMM

IRQ_SERIRQ

KB_DET#

LCD_CBL_DET#

PCH_GPIO57

MEDIACARD_RST#

MPHYP_PWR_EN

NFC_IRQ

PCH_GPIO10

HOST_ALERT1_R_N

PCH_GPIO44

PCH_GPIO66

PCH_GPIO9

PCH_OPI_COMP

SIO_EXT_SCI#

SIO_EXT_SMI#

SIO_EXT_WAKE# SIO_RCIN#

SLATE_MODE

SPKR

TOUCH_PANEL_INTR#

USH_DET#

PCH_OPI_COMP

LAN_WAKE#

PCH_GPIO59

PCH_GPIO76

PCH_GPIO69

3.3V_CAM_EN#

NFC_IRQ

PCH_GPIO59

SIO_EXT_SMI#

MEDIACARD_IRQ#

MEDIACARD_RST#

SLATE_MODE

PCH_GPIO9

MPHYP_PWR_EN

I2C1_SCL_VMM

I2C1_SDA_VMM

CPPE#

FFS_INT2

H_THERMTRIP#

TOUCH_PANEL_INTR#

LCD_CBL_DET#

CPUSB#

3.3V_TS_EN

PCH_GPIO49

PCH_GPIO67

PCH_GPIO68

PCH_GPIO67

PCH_GPIO68

GPU_GC6_FB_EN

GC6_EVENT#_Q

TPM_PIRQ#

I2C0_SDA

I2C0_SCL

PCH_GPIO76

PCH_GPIO85

3.3V_TP_EN

GPU_GC6_FB_EN

CAM_MIC_CBL_DET#

GC6_EVENT#_Q

PCH_GPIO87

PCH_GPIO69

PCH_GPIO57

TPM_PIRQ#

PCH_GPIO14

DIMM_DETDIMM_DET

DIMM_DET

+3.3V_RUN

+3.3V_ALW_PCH

+PCH_VCCDSW3_3

+3.3V_ALW_PCH

+1.05V_VCCST

+3.3V_RUN

SIO_EXT_WAKE#<12,36>

PM_LANPHY_ENABLE<28,9>

SIO_RCIN# <10,36>

IRQ_SERIRQ <10,36>

LCD_CBL_DET# <23>

SPKR<21>

KB_DET#<11,37>

3.3V_CAM_EN#<23>

MEDIACARD_IRQ#<29>

USH_DET# <10,27>

CAM_MIC_CBL_DET# <23>

H_THERMTRIP# <36>

SIO_EXT_SCI#<36>

LAN_WAKE#<28,36>

HDD_DEVSLP<20>

SIO_EXT_SMI#<36>

MPHYP_PWR_EN<38>

3.3V_TS_EN <23>

TOUCH_PANEL_INTR#<23>

PCH_GPIO80<10>

HDD_FALL_INT<10>

PCH_GPIO16<7>

PCH_GPIO46<12>

3.3V_HDD_EN <20>

WLANCLK_REQ#<30,7>

USB_OC3# <11>

SIO_EXT_WAKE# <12,36>

USB_OC1# <11,32>

PCH_GPIO52<10>

WIGIGCLK_REQ#<30,7>

TOUCHPAD_INTR#<10>

SATA2_PCIE6_L1<6>

USB_OC2# <11,31>

PCH_GPIO46 <12>

PCH_GPIO44<11>

PCH_GPIO73 <7>

TPM_PIRQ#<27>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (7/12)

12 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (7/12)

12 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (7/12)

12 48Monday, March 17, 2014

Compal Electronics, Inc.

RC161@0_0402_5% RC161@0_0402_5%

RC180@

1K_0402_5%

RC180@

1K_0402_5%

RC303

10K_0402_5%

RC303

10K_0402_5%

RPC17

10K_8P4R_5%

RPC17

10K_8P4R_5%

RC171

@10K_0402_5%RC171

@10K_0402_5%

RC176@

1K_0402_5%

RC176@

1K_0402_5%

RPC4

10K_8P4R_5%

RPC4

10K_8P4R_5%

RC174 100K_0402_5%RC174 100K_0402_5%

RPC16

10K_8P4R_5%

RPC16

10K_8P4R_5%

RPC3

10K_8P4R_5%

RPC3

10K_8P4R_5%

T21

@PAD~D

T21

@PAD~D

T22

@PAD~D

T22

@PAD~D

RC247 10K_0402_5%RC247 10K_0402_5%

1 2

RC175 100K_0402_5%RC175 100K_0402_5%

RPC5

10K_8P4R_5%

RPC5

10K_8P4R_5%

4 5

BDW_ULT_DDR3L

SERIAL IO

GPIO

MISC

CPU/

10 OF 19

UC1J

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

SERIAL IO

GPIO

MISC

CPU/

10 OF 19

UC1J

BDW-ULT-DDR3L_BGA1168

RSVD AB21

RSVD AF20

SERIRQ T4

LAN_PHY_PWR_CTRL/GPIO12

AM7

GPIO58

AL4

GPIO44

AK4

BMBUSY/GPIO76

GPIO8

AU2

GPIO15

AD6

GPIO17

T3 GPIO16

GPIO59

AT5

GPIO48

U4 GPIO47

AB6

GPIO49

GPIO50

HSIOPC/GPIO71

GPIO13

AT3

GPIO25

AM4 GPIO14

AH4

GPIO46

AG3

GPIO10

AM2 GPIO9

AM3

DEVSLP0/GPIO33

SDIO_POWER_EN/GPIO70

DEVSLP1/GPIO38

SPKR/GPIO81

V2 DEVSLP2/GPIO39

THRMTRIP D60

RCIN/GPIO82 V4

GSPI0_CS/GPIO83 R6

GSPI0_MISO/GPIO85 N6

GSPI0_CLK/GPIO84 L6

GSPI0_MOSI/GPIO86 L8

GSPI1_CS/GPIO87 R7

GSPI1_CLK/GPIO88 L5

GSPI_MOSI/GPIO90 K2

GSPI1_MISO/GPIO89 N7

UART0_RXD/GPIO91 J1

UART0_RTS/GPIO93 J2

UART0_TXD/GPIO92 K3

UART0_CTS/GPIO94 G1

UART1_TXD/GPIO1 G2

UART1_RXD/GPIO0 K4

I2C0_SCL/GPIO5 F3

I2C1_SDA/GPIO6 G4

I2C1_SCL/GPIO7 F1

SDIO_CMD/GPIO65 F4

SDIO_CLK/GPIO64 E3

SDIO_D0/GPIO66 D3

SDIO_D3/GPIO69 E2

SDIO_D2/GPIO68 C3

SDIO_D1/GPIO67 E4

GPIO28

AD7

GPIO57

AP1 GPIO56

AG6

GPIO45

AG5

GPIO24

AD5

GPIO27

AN5

GPIO26

AN3

UART1_RST/GPIO2 J3

I2C0_SDA/GPIO4 F2

UART1_CTS/GPIO3 J4

PCH_OPI_RCOMP AW15

RC179

1K_0402_5%

RC179

1K_0402_5%

RC16310K_0402_5% RC16310K_0402_5%

RC245 100K_0402_5%RC245 100K_0402_5%

RC251K_0402_5% RC251K_0402_5%

RC158100K_0402_5% RC158100K_0402_5%

T27@PAD~DT27@PAD~D

RC156 100K_0402_5%RC156 100K_0402_5%

RPC10

10K_8P4R_5%

RPC10

10K_8P4R_5%

4 5

RC153 10K_0402_5%RC153 10K_0402_5%

RC16410K_0402_5% RC16410K_0402_5%

RC17849.9_0402_1% RC17849.9_0402_1%

1 2

RC155 100K_0402_5%RC155 100K_0402_5%

RPC9

10K_8P4R_5%

RPC9

10K_8P4R_5%

RC160100K_0402_5% RC160100K_0402_5%

RPC8

2.2K_0804_8P4R_5%

RPC8

2.2K_0804_8P4R_5%

4 5

RC302@

10K_0402_5%

RC302@

10K_0402_5%

RPC7

10K_8P4R_5%

RPC7

10K_8P4R_5%

4 5

T109

@PAD~DT109

@PAD~D

D D

C C

B B

A A

CFG4

1 : Disabled; No Physical Display Port

attached to Embedded Display Port

0 : Enabled; An external Display Port device is

connected to the Embedded Display Port

Display Port Presence Strap

1: Enable(Default): Noa will be disable in

locked units and enable in un-locked

units

CFG8

ALLOW THE USE OF NOA ON LOCKED UNITS

0: Enable Noa will be available pegardless of

the locking of the unit

EAR-STALL/NOT STALL RESET SEQUENCE AFTER PCU PLL IS LOCKE

CFG0 1:(Default) Normal Operation; No stall

0:Lane Reversed

PCH/PCH LESS MODE SELECTION

CFG1 1:(Default) Normal Operation

0:Lane Reversed

1: VRS support SVID protocol are present

CFG9

NO SVID PROTOCOL CAPABLE VR CONNECTED

0:No VR support SVID is present

The chip will not generate(OR Respond to)

SVID activity

1: POWER FEATURES ACTIVATED DURING

RESET

CFG10

SAFE MODE BOOT

0: POWER FEATURES (ESPECIALLY CLOCK

GATINE ARE NOT ACTIVATED

CFG STRAPS for CPU

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

CFG0

CFG1

CFG10

CFG10 CFG4

CFG4

CFG8

CFG9

CFG_RCOMP

PROC_OPI_RCOMP

TDI_IREF

CFG0<9>

CFG2<9>

CFG4<9>

CFG5<9>

CFG6<9>

CFG7<9>

CFG1<9>

CFG3<9>

CFG8<9>

CFG9<9>

CFG10<9>

CFG11<9>

CFG12<9>

CFG13<9>

CFG14<9>

CFG15<9>

CFG16<9>

CFG19<9>

CFG18<9>

CFG17<9>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (8/12)

13 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (8/12)

13 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (8/12)

13 48Monday, March 17, 2014

Compal Electronics, Inc.

T34 @PAD~D T34 @PAD~D

RC184@

1K_0402_1%

RC184@

1K_0402_1%

RC190@

1K_0402_1%

RC190@

1K_0402_1%

RC183@

1K_0402_1%

RC183@

1K_0402_1%

RC188@

1K_0402_1%

RC188@

1K_0402_1%

T33 @PAD~D T33 @PAD~D

T30 @PAD~D T30 @PAD~D

RESERVED

BDW_ULT_DDR3L

19 OF 19

UC1S

BDW-ULT-DDR3L_BGA1168

RESERVED

BDW_ULT_DDR3L

19 OF 19

UC1S

BDW-ULT-DDR3L_BGA1168

CFG4

AA60

CFG5

Y62

CFG17

AA61 CFG18

U63

CFG7

Y60

CFG11

U60

RSVD_TP AU63

RSVD_TP C63

RSVD_TP C62

RSVD_TP L60

RSVD_TP B51

RSVD_TP A51

CFG10

V60 CFG9

V61 CFG8

V62

RSVD N60

RSVD Y22

RSVD W23

RSVD D58

RSVD AV62

RSVD_TP AV63

VSS N21

VSS P22

CFG19

U62

RSVD R20

RSVD P20

RSVD

J20

CFG3

AA63 CFG2

AC63 CFG1

AC62

CFG16

AA62

CFG15

T60 CFG14

T61

CFG_RCOMP

V63

RSVD

TD_IREF

B12 RSVD

H18

PROC_OPI_RCOMP AY15

CFG12

T63

CFG13

T62

CFG0

AC60

CFG6

Y61 RSVD B43

T28 @PAD~D T28 @PAD~D

RC186 8.2K_0402_1%RC186 8.2K_0402_1%

1 2

RC18749.9_0402_1% RC18749.9_0402_1%

1 2

T35 @PAD~D T35 @PAD~D

RC189@

1K_0402_1%

RC189@

1K_0402_1%

RC185 49.9_0402_1%RC185 49.9_0402_1%

T31 @PAD~D T31 @PAD~D

T29 @PAD~D T29 @PAD~D

RC191

1K_0402_5%

RC191

1K_0402_5%

D D

C C

B B

A A

1.B2-PKG-C1-PCB-C2-PKG-B3-PCB-A3-PKG-A4

2.A62-PKG-A61-PCB-B61-PKG-B62-PCB-B63-PKG-A60

3.AY60-PKG-AW61-PCB-AY61-PKG-AW62-PCB-AY62-PKG-AW63

4.AW1-PKG-AW3-PCB-AY3-PKG-AW2-PCB-AY2-PKG-AV1

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Package Daisy Chain:

DC_TEST_A3_B3

DC_TEST_A4

DC_TEST_A60

DC_TEST_A61_B61

DC_TEST_A62

DC_TEST_AV1

DC_TEST_AW1

DC_TEST_AW63

DC_TEST_AY2_AW2

DC_TEST_AY3_AW3

DC_TEST_AY60

DC_TEST_AY61_AW61

DC_TEST_AY62_AW62

DC_TEST_B62_B63

DC_TEST_C1_C2

TP_DC_TEST_B2

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (9/12)

14 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (9/12)

14 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (9/12)

14 48Monday, March 17, 2014

Compal Electronics, Inc.

BDW_ULT_DDR3L

18 OF 19

UC1R

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

18 OF 19

UC1R

BDW-ULT-DDR3L_BGA1168

RSVD AY14

RSVD AW14

RSVD

AT2

RSVD

AU44

RSVD

AV44

RSVD

D15

RSVD

F22

RSVD

H22

RSVD

J21

RSVD T23

RSVD N23

RSVD R23

RSVD AU15

RSVD AU10

RSVD AM11

RSVD AL1

RSVD U10

RSVD AP7

RC194@0_0402_5% RC194@0_0402_5%

RC195@0_0402_5% RC195@0_0402_5%

RC192@0_0402_5% RC192@0_0402_5%

RC193@0_0402_5% RC193@0_0402_5%

BDW_ULT_DDR3L

17 OF 19

UC1Q

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

17 OF 19

UC1Q

BDW-ULT-DDR3L_BGA1168

DAISY_CHAIN_NCTF_AY2

AY2

DAISY_CHAIN_NCTF_AY60

AY60

DAISY_CHAIN_NCTF_AY61

AY61

DAISY_CHAIN_NCTF_B2

DAISY_CHAIN_NCTF_A3 A3

DAISY_CHAIN_NCTF_A4 A4

DAISY_CHAIN_NCTF_A61 A61

DAISY_CHAIN_NCTF_A60 A60

DAISY_CHAIN_NCTF_AW1 AW1

DAISY_CHAIN_NCTF_AV1 AV1

DAISY_CHAIN_NCTF_A62 A62

DAISY_CHAIN_NCTF_AW2 AW2

DAISY_CHAIN_NCTF_AW3 AW3

DAISY_CHAIN_NCTF_AW61 AW61

DAISY_CHAIN_NCTF_AW63 AW63

DAISY_CHAIN_NCTF_AW62 AW62

DAISY_CHAIN_NCTF_C1

DAISY_CHAIN_NCTF_B62

B62

DAISY_CHAIN_NCTF_B3

DAISY_CHAIN_NCTF_AY3

AY3

DAISY_CHAIN_NCTF_AY62

AY62

DAISY_CHAIN_NCTF_B61

B61

DAISY_CHAIN_NCTF_B63

B63

DAISY_CHAIN_NCTF_C2

D D

C C

B B

A A

CAD Note: Place the PU resistors close to CPU

RC208close to CPU 300 - 1500mils

CAD Note: Place the PU resistors close to CPU

RC204 close to CPU 300 -

1500mils

CAD Note: RC209 SHOULD BE PLACED CLOSE TO CPU

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

RESISTOR STUFFING OPTIONS ARE

PROVIDED FOR TESTING PURPOSES

VDDQ DECOUPLING

VCC_SENSE

SVID ALERT

SVID DATA

ESD Request

CPU_PWR_DEBUG#

H_CPU_SVIDALRT#

H_VCCST_PWRGD

H_VR_EN

H_VR_READY

VCCSENSE

VIDSCLK

VIDSOUT

H_VCCST_PWRGD

+1.35V_MEM

+VCC_CORE

+1.05V_RUN +VCCIO_OUT

+VCCIO_OUT

+VCCIOA_OUT

+1.05V_VCCST

+VCC_CORE

+1.05V_RUN

+1.05V_RUN +1.05V_VCCST

+1.05V_VCCST

+VCC_CORE

+1.35V_MEM

+VCC_CORE

+1.05V_VCCST

+3.3V_ALW

+1.05V_RUN

+VCC_CORE

+1.35V_MEM

+1.05V_RUN +3.3V_RUN

VCCSENSE<45>

VIDSCLK<45>

VIDALERT_N<45>

VIDSOUT<45>

CPU_PWR_DEBUG#<9>

H_VR_EN<45>

H_VCCST_PWRGD<9>

H_VR_READY<45>

RESET_OUT#<36,9>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (10/12)

15 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (10/12)

15 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (10/12)

15 48Monday, March 17, 2014

Compal Electronics, Inc.

CC85

22U_0603_6.3V6M@EMC@

CC85

22U_0603_6.3V6M@EMC@

1 2

CC34

10U_0603_6.3V6M

CC34

10U_0603_6.3V6M

BDW_ULT_DDR3L

HSW ULT POWER

12 OF 19

UC1L

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

HSW ULT POWER

12 OF 19

UC1L

BDW-ULT-DDR3L_BGA1168

VCCIO_OUT

A59

VCCIOA_OUT

E20

RSVD

AD23

RSVD

AB23

RSVD

AC58

VCC

F59

VDDQ

AY44 VDDQ

AY40 VDDQ

AY35

RSVD

AA59

RSVD

U59

RSVD

V59

RSVD

AG58 RSVD

AC59 RSVD

AE60

RSVD

AD59

VCCST

AC22

VDDQ

AY50

RSVD

N58

VCC_SENSE

E63

RSVD

AA23

RSVD

AE59

VCCST_PWRGD

B59

VR_READY

C59 VR_EN

F60

VDDQ

AR48 VDDQ

AP43 VDDQ

AN33 VDDQ

AJ37 VDDQ

AJ33 VDDQ

AJ31 VDDQ

AH26

RSVD

J58 RSVD

L59

VCC

C24

VCC

C28

VCC

C32

VCC

AG57

VCC W57

VCC U57

VCC M23

VCC M57

VCC P57

VCC L22

VCC K57

VCC H23

VCC J23

VCC G55

VCC G57

VCC G49

VCC G51

VCC G53

VCC G45

VCC G47

VCC G43

VCC G39

VCC G41

VCC G37

VCC G35

VCC G33

VCC G29

VCC G31

VCC G27

VCC G25

VCC G23

VCC F52

VCC F56

VCC F48

VCC F44

VCC F40

VCC F28

VCC F32

VCC F36

VCC F24

VCC E57

VCC E51

VCC E53

VCC E55

VCC E47

VCC E49

VCC E41

VCC E43

VCC E45

VCC E37

VCC E39

VCC E31

VCC E33

VCC E35

VCC E27

VCC E29

VCC C56

VCC E23

VCC E25

VCC C48

VCC C52

VCC C36

VCC C40

VCC C44

VCC K23

VCC

AD57 VCC

AB57

VCCST

AE23 VCCST

AE22

VIDSOUT

L63 VIDSCLK

N63 VIDALERT

L62

VSS

P62

RSVD_TP

P60

RSVD_TP

P61

RSVD_TP

N59

RSVD_TP

N61

RSVD

T59

RSVD

AD60

VSS

D63

PWR_DEBUG

H59

RC197

150_0402_5%

RC197

150_0402_5%

T74@PAD~D

CC27

2.2U_0402_6.3V6M

CC27

2.2U_0402_6.3V6M

RC208

110_0402_1%

RC208

110_0402_1%

CC36

22U_0603_6.3V6M

CC36

22U_0603_6.3V6M

PJP23

PAD-OPEN1x1m

@PJP23

PAD-OPEN1x1m

1 2

CC30

10U_0603_6.3V6M

CC30

10U_0603_6.3V6M

CC79

22U_0603_6.3V6M@EMC@

CC79

22U_0603_6.3V6M@EMC@

1 2

UC8

74AUP1G07GW_TSSOP5

UC8

74AUP1G07GW_TSSOP5

GND

3Y4

VCC 5

RC199@

10K_0402_5%

RC199@

10K_0402_5%

CC29

10U_0603_6.3V6M

CC29

10U_0603_6.3V6M

RC196 0_0603_5%@RC196 0_0603_5%@

CC35@0.1U_0402_25V6CC35@0.1U_0402_25V6

1 2

CC32

10U_0603_6.3V6M

CC32

10U_0603_6.3V6M

T75@PAD~D

RC202

1K_0402_5%

RC202

1K_0402_5%

1 2

RC2011.5K_0402_5% RC2011.5K_0402_5%

CC37

1U_0402_6.3V6K

CC37

1U_0402_6.3V6K

CC28

2.2U_0402_6.3V6M

CC28

2.2U_0402_6.3V6M

RC20743_0402_5% RC20743_0402_5%

CC26

2.2U_0402_6.3V6M

CC26

2.2U_0402_6.3V6M

CC84

22U_0603_6.3V6M@EMC@

CC84

22U_0603_6.3V6M@EMC@

1 2

T77@PAD~D

CC23

22U_0603_6.3V6M@EMC@

CC23

22U_0603_6.3V6M@EMC@

1 2

RC209

100_0402_1%

RC209

100_0402_1%

CC24

100P_0402_50V8J

@EMC@

CC24

100P_0402_50V8J

@EMC@

RC198

10K_0402_5%

RC198

10K_0402_5%

RC204

75_0402_1%

RC204

75_0402_1%

CC31

10U_0603_6.3V6M

CC31

10U_0603_6.3V6M

T76@PAD~D

CC33

10U_0603_6.3V6M

CC33

10U_0603_6.3V6M

CC25

2.2U_0402_6.3V6M

CC25

2.2U_0402_6.3V6M

D D

C C

B B

A A

CC70 close to Pin J17

CC71 close to Pin R21

CC64 place near V8

CC63 place near AC9

CC57 place near AH14

CC72 place near AG16

CC69 place near U8

CC48,CC49, CC50 place near AG10

CC61 CC62 place near AE9

CC59 and CC60 place near

J11; CC58 place near AE8

CC54 place near Y8

CC80 place near AH10

CC68 place near AA21

CC56 place near B11

CC47 place near B18

CC40 place near K9;

CC44 place near L10

CC43 place near M9

CC78 place near J18

CC82 place near A20

CC65 place near AG19

CC73 place near AH11

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

VCCHSIO

S0 Iccmax = 1.838A

VCCUSB3PLL

S0 Iccmax = 41mA

VCCSATA3PLL

S0 Iccmax = 42mA

VCCAPLL

S0 Iccmax = 57mA

VCCDSW3_3

S0 Iccmax = 114mA

VCCCLK

S0 Iccmax = 200mA

VCCACLKPLL

S0 Iccmax = 31mA

VCCSUS3_3

S0 Iccmax = 63mA

2013/06/10 refer 6L_WP chnage to +3.3V_M, 6/14 change back

2013/06/10 refer 6L_WP chnage to float,6/14 change back

Reminder below power rail need isolation for layout refer

attach file for more detail that from Intel review feedback.

intel DG Rev 1.2 , page 500

47.3 Boot Strap Capacitor

CC97 place near AH10

+DCPRRTC

+PCH_VCCDSW

+PCH_VCCDSW_R

+1.05V_MODPHY +1.05 V_MODPHY_PCH

+1.05V_MODPHY_PCH

+PCH_AUSB3PLL

+1.05V_MODPHY

+PCH_AUSB3PLL

+PCH_ASATA3PLL+1.05V_MODPHY

+PCH_ASATA3PLL

+V1.05S_APLLOPI+1.05V_RUN

+V1.05S_APLLOPI

+3.3V_ALW _PCH

+PCH_VCCDSW 3_3

+PCH_VCC1P05

+PCH_VCCACLKPLL

+1.05V_RUN

+PCH_RTC_VCCSUS3_3 +3.3V_ALW_PCH

+3.3V_ALW

+PCH_RTC_VCCSUS3_3

+3.3V_M

+1.05V_M

+1.5V_RUN

+3.3V_RUN

+1.05V_RUN

+1.05V_RUN+1.05V_M

+3.3V_RUN

+3.3V_ALW _PCH

+1.05V_RUN

+PCH_VCCDSW 3_3+3.3V_ALW _PCH

+3.3V_ALW

+3.3V_ALW _PCH

+1.05V_RUN

+PCH_VCC1P05+1.05V_RUN

+PCH_VCCACLKPLL

+1.05V_RUN

+RTC_CELL

+3.3V_RUN

+PCH_VCCDSW+PCH_VCCDSW 3_3

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (11/12)

16 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (11/12)

16 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (11/12)

16 48Monday, March 17, 2014

Compal Electronics, Inc.

LC5

2.2UH_LQM2MPN2R2NG0L_30%

LC5

2.2UH_LQM2MPN2R2NG0L_30%

1 2

CC49

0.1U_0402_10V7K

CC49

0.1U_0402_10V7K

CC77

100U_1206_6.3V6M

CC77

100U_1206_6.3V6M

CC50

1U_0402_6.3V6K

CC50

1U_0402_6.3V6K

CC80

1U_0402_6.3V6K

CC80

1U_0402_6.3V6K

RC212 @0_0402_5% RC212 @0_0402_5%

CC44

1U_0402_6.3V6K

CC44

1U_0402_6.3V6K

RC211 5.11_0402_1%RC211 5.11_0402_1%

CC70

1U_0402_6.3V6K

CC70

1U_0402_6.3V6K

RC216 0_0402_5%@RC2 16 0_0402_5%@

1 2

CC51

22U_0603_6.3V6M

CC51

22U_0603_6.3V6M

CC63

22U_0603_6.3V6M

CC63

22U_0603_6.3V6M

RC217@0_ 0402_5%RC217@0_0402_5%

1 2

CC78

1U_0402_6.3V6K

CC78

1U_0402_6.3V6K

CC39

330U_D3_2.5VY_R6M

CC39

330U_D3_2.5VY_R6M

CC73

1U_0402_6.3V6K

CC73

1U_0402_6.3V6K

CC59

1U_0402_6.3V6K

CC59

1U_0402_6.3V6K

CC41

330U_D3_2.5VY_R6M

@EMC@

CC41

330U_D3_2.5VY_R6M

@EMC@

CC48

0.1U_0402_10V7K

CC48

0.1U_0402_10V7K

LC2

2.2UH_LQM2MPN2R2NG0L_30%

LC2

2.2UH_LQM2MPN2R2NG0L_30%

1 2

USB2

THERMAL SENSOR

HSIO

BDW_ULT_DDR3L

USB3

OPI

RTC

GPIO/LPC

VRM

HDA

SERIAL IO

SUS OSCILLATOR

SPI

LPT LP POWER

CORE

13 OF 19

UC1M

BDW-ULT-DDR3L_BGA1168

USB2

THERMAL SENSOR

HSIO

BDW_ULT_DDR3L

USB3

OPI

RTC

GPIO/LPC

VRM

HDA

SERIAL IO

SUS OSCILLATOR

SPI

LPT LP POWER

CORE

13 OF 19

UC1M

BDW-ULT-DDR3L_BGA1168

VCCHDA

AH14

VCCTS1_5 J15

DCPSUS1 AD8

DCPSUS1 AD10

DCPSUSBYP AG20

DCPSUSBYP AG19

DCPSUS4 AB8

VCCASW AE9

VCCASW AF9

VCCASW AG8

VCCSUS3_3 AH11

VCCRTC AG10

DCPRTC AE7

VCCSPI Y8

VCCASW AG14

VCCASW AG13

VCC3_3 K16

VCC3_3 K14

VCCSDIO T9

VCCSDIO U8

DCPSUS3

J13

VCCAPLL

W21

VCCHSIO

L10

VCCHSIO

VCCAPLL

AA21 RSVD

Y20

VCCSATA3PLL

B11 VCCUSB3PLL

B18

VCC1_05

VCC1_05 J 11

VCC1_05 H11

VCC1_05 H15

VCC1_05 AE8

VCC1_05 AF2 2

VCCSUS3_3

AE21 VCCSUS3_3

AE20 RSVD

V21 RSVD

M20 RSVD

K18 VCCCLK

T21 VCCCLK

R21 VCCCLK

J17 VCCACLKPLL

A20

VCC3_3

W9 VCC3_3

V8 VCCDSW3_3

AH10

VCCSUS3_3

AC9

RSVD AC20

VCCSUS3_3

AA9

DCPSUS2

AH13

VCC1_05 AG16

VCC1_05 AG17

VCCCLK

J18

VCCCLK

K19

CC57

0.1U_0402_10V7K

CC57

0.1U_0402_10V7K

CC97 0.47U_0402_10V6K@CC97 0.47U_0402_10V6K@

1 2

CC58

1U_0402_6.3V6K

CC58

1U_0402_6.3V6K

CC64

22U_0603_6.3V6M

CC64

22U_0603_6.3V6M

PJP51 @

PAD-OPEN1x1m

PJP51 @

PAD-OPEN1x1m

1 2

CC71

1U_0402_6.3V6K

CC71

1U_0402_6.3V6K

CC67

100U_1206_6.3V6M

CC67

100U_1206_6.3V6M

LC4

2.2UH_LQM2MPN2R2NG0L_30%

LC4

2.2UH_LQM2MPN2R2NG0L_30%

1 2

CC82

1U_0402_6.3V6K

CC82

1U_0402_6.3V6K

CC42

330U_D3_2.5VY_R6M

@EMC@

CC42

330U_D3_2.5VY_R6M

@EMC@

LC1

2.2UH_LQM2MPN2R2NG0L_30%

LC1

2.2UH_LQM2MPN2R2NG0L_30%

1 2

LC3

2.2UH_LQM2MPN2R2NG0L_30%

LC3

2.2UH_LQM2MPN2R2NG0L_30%

1 2

CC56

22U_0603_6.3V6M

CC56

22U_0603_6.3V6M

CC47

22U_0603_6.3V6M

CC47

22U_0603_6.3V6M

CC53

1U_0402_6.3V6K

CC53

1U_0402_6.3V6K

CC66

0.1U_0402_10V7K

CC66

0.1U_0402_10V7K

CC43

1U_0402_6.3V6K

CC43

1U_0402_6.3V6K

CC60

10U_0603_6.3V6M

CC60

10U_0603_6.3V6M

CC54

0.1U_0402_10V7K

CC54

0.1U_0402_10V7K

CC55

22U_0603_6.3V6M

CC55

22U_0603_6.3V6M

CC81

100U_1206_6.3V6M

CC81

100U_1206_6.3V6M

CC68

1U_0402_6.3V6K

CC68

1U_0402_6.3V6K

CC61

1U_0402_6.3V6K

CC61

1U_0402_6.3V6K

CC40

1U_0402_6.3V6K

CC40

1U_0402_6.3V6K

CC69

1U_0402_6.3V6K

CC69

1U_0402_6.3V6K

CC65

1U_0402_6.3V6K

CC65

1U_0402_6.3V6K

CC72

1U_0402_6.3V6K

CC72

1U_0402_6.3V6K

CC52 0.1U_0402_10V7KCC52 0.1U_0402_10V7K

1 2

CC62

22U_0603_6.3V6M

CC62

22U_0603_6.3V6M

RC213 @0_0402_5% RC213@0_0402_5%

D D

C C

B B

A A

CAD Note: RC218 SHOULD BE PLACED CLOSE TO CPU

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

VSSSENSE

VSSSENSE <45>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (12/12)

17 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (12/12)

17 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

CPU (12/12)

17 48Monday, March 17, 2014

Compal Electronics, Inc.

BDW_ULT_DDR3L

15 OF 19

UC1O

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

15 OF 19

UC1O

BDW-ULT-DDR3L_BGA1168

VSS

AV16

VSS

AV24

VSS

AV33 VSS

AV28

VSS

AV20

VSS

AR11

VSS

AU33

VSS

AU55

VSS D26

VSS D27

VSS D25

VSS D23

VSS

AV55

VSS

AP38

VSS

AP29

VSS

AP31

VSS

AP39

VSS

AP52

VSS

AP54

VSS

AP57

VSS

AR15

VSS

AR17

VSS

AR23

VSS

AR31

VSS

AR33

VSS

AR39

VSS

AR43

VSS

AR49

VSS

AR5

VSS

AR52

VSS

AT13

VSS

AT35

VSS

AT37

VSS

AT40

VSS

AT42

VSS

AT43

VSS

AT46

VSS

AT49

VSS

AT61

VSS

AT62

VSS

AT63

VSS

AU1

VSS

AU18

VSS

AU22

VSS

AU30

VSS

AU51

VSS

AU53

VSS

AU57

VSS

AU59

VSS

AV14

VSS

AV36

VSS

AV39

VSS

AV41

VSS

AV43

VSS

AV46

VSS

AV49

VSS

AV51

VSS AW24

VSS AW33

VSS AW35

VSS AW37

VSS AW4

VSS AW42

VSS AW44

VSS AW47

VSS AW50

VSS AW51

VSS AW59

VSS AY11

VSS AY16

VSS AY18

VSS AY22

VSS AY24

VSS AY26

VSS AY30

VSS AY33

VSS AY4

VSS AY51

VSS AY53

VSS AY57

VSS AY59

VSS AY6

VSS B20

VSS B24

VSS B26

VSS B28

VSS B32

VSS B36

VSS B4

VSS B40

VSS B44

VSS B48

VSS B52

VSS B56

VSS B60

VSS C18

VSS C20

VSS C25

VSS C27

VSS C38

VSS C39

VSS C57

VSS D12

VSS D14

VSS D18

VSS D2

VSS D21

VSS D29

VSS D30

VSS D31

VSS

AV34

VSS AV59

VSS AV8

VSS AW16

VSS AW40

VSS AW60

VSS C11

VSS C14

VSS

AU28 VSS

AU26 VSS

AU24

VSS

AU20

VSS

AU16

VSS

AP48

VSS

AP26

VSS

AP22

VSS

AP23

VSS

AP3

RC218 100_0402_1%RC218 100_0402_1%

1 2

BDW_ULT_DDR3L

16 OF 19

UC1P

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

16 OF 19

UC1P

BDW-ULT-DDR3L_BGA1168

VSS

D59

VSS Y63

VSS Y59

VSS Y10

VSS V10

VSS U9

VSS U22

VSS U61

VSS U20

VSS T58

VSS T1

VSS R22

VSS R8

VSS R10

VSS P63

VSS P59

VSS N3

VSS N10

VSS M22

VSS L61

VSS L58

VSS L20

VSS L18

VSS L17

VSS L15

VSS L13

VSS K12

VSS K1

VSS J63

VSS J59

VSS J22

VSS H17

VSS

F38

VSS

F50

VSS AH16

VSS

F42

VSS

F34

VSS

E17

VSS

G22

VSS

D39 VSS

D38 VSS

D37 VSS

D35 VSS

D34

VSS

D43

VSS

D45

VSS

D46

VSS

D47

VSS

D50

VSS

D51

VSS

D53

VSS

D54

VSS

D55

VSS

D57

VSS

D62

VSS

E11

VSS

F46

VSS

F54

VSS

F58

VSS

F61

VSS

G18

VSS

H13

VSS

D42 VSS

D41

VSS H57

VSS L7

VSS

D33

VSS J10

VSS V58

VSS AH46

VSS V23

VSS_SENSE E62

VSS W22

VSS W20

VSS V7

VSS V3

VSS

D49

VSS

F30 VSS

F26 VSS

F20

BDW_ULT_DDR3L

14 OF 19

UC1N

BDW-ULT-DDR3L_BGA1168

BDW_ULT_DDR3L

14 OF 19

UC1N

BDW-ULT-DDR3L_BGA1168

VSS

AH44

VSS

AH49

VSS

AH51

VSS

AH38

VSS AP10

VSS AN49

VSS AN40

VSS AN23

VSS AM1

VSS AL51

VSS

A28

VSS

A11

VSS

A14

VSS

A18

VSS

A24

VSS

A32

VSS

A36

VSS

A40

VSS

A44

VSS

A48

VSS

A52

VSS

A56

VSS

AA1

VSS

AA58

VSS

AB10

VSS

AB20

VSS

AB22

VSS

AB7

VSS

AC61

VSS

AD21

VSS

AD3

VSS

AD63

VSS

AE10

VSS

AE5

VSS

AE58

VSS

AF11

VSS

AF12

VSS

AF14

VSS

AF17

VSS

AG1

VSS

AG11

VSS

AG23

VSS

AG60

VSS

AG62

VSS

AG63

VSS

AH19

VSS

AH24

VSS

AH28

VSS

AH30

VSS

AH32

VSS

AH40

VSS

AH42

VSS

AH53

VSS

AH55

VSS

AH57

VSS

AJ13

VSS

AJ14

VSS

AJ23

VSS

AJ25

VSS

AJ27

VSS

AJ29

VSS AJ43

VSS AJ45

VSS AJ50

VSS AJ52

VSS AJ56

VSS AJ58

VSS AJ60

VSS AJ63

VSS AK23

VSS AK3

VSS AK52

VSS AL10

VSS AL13

VSS AL17

VSS AL20

VSS AL22

VSS AL23

VSS AL26

VSS AL29

VSS AL31

VSS AL33

VSS AL36

VSS AL39

VSS AL40

VSS AL45

VSS AL46

VSS AL52

VSS AL54

VSS AL57

VSS AL60

VSS AL61

VSS AM17

VSS AM23

VSS AM31

VSS AM52

VSS AN17

VSS AN31

VSS AN32

VSS AN35

VSS AN36

VSS AN39

VSS AN42

VSS AN43

VSS AN45

VSS AN46

VSS AN48

VSS AN51

VSS AN52

VSS AN60

VSS AN63

VSS AN7

VSS AP17

VSS AP20

VSS

AF18

VSS

AF15

VSS AJ54

VSS AJ47

VSS AJ35

VSS AJ41

VSS AJ39

VSS

AH36 VSS

AH34

VSS

AH22 VSS

AH20

VSS

AH17

VSS

AG61

VSS

AG21

D D

C C

B B

A A

H=4mm

Reverse Type

CAD NOTE

PLACE THE CAP NEAR TO DIMM RESET PIN

Note:

Check voltage tolerance of

VREF_DQ at the DIMM socket

Layout Note:

Place near JDIMM1

Layout Note:

Place near

JDIMM1.203,204

DDR3L SODIMM ODT GENERATION

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

20130730 SP07000LT00 CIS Link OK

DDR3_DRAMRST#

DDR_A_BS0

DDR_A_BS1

DDR_A_BS2

DDR_A_CAS#

DDR_A_D0

DDR_A_D1

DDR_A_D10 DDR_A_D1 1

DDR_A_D12DDR_A_D13

DDR_A_D14 DDR_A_D1 5

DDR_A_D16

DDR_A_D17

DDR_A_D18

DDR_A_D19

DDR_A_D2

DDR_A_D20

DDR_A_D21

DDR_A_D22

DDR_A_D23

DDR_A_D24

DDR_A_D25

DDR_A_D26

DDR_A_D27

DDR_A_D28

DDR_A_D29

DDR_A_D3

DDR_A_D30

DDR_A_D31

DDR_A_D32DDR_A_D33

DDR_A_D34

DDR_A_D35

DDR_A_D36 DDR_A_D3 7

DDR_A_D38

DDR_A_D39

DDR_A_D4

DDR_A_D40DDR_A_D41

DDR_A_D42

DDR_A_D43

DDR_A_D44 DDR_A_D4 5

DDR_A_D46

DDR_A_D47

DDR_A_D48

DDR_A_D49

DDR_A_D5

DDR_A_D50

DDR_A_D51

DDR_A_D52

DDR_A_D53

DDR_A_D54

DDR_A_D55

DDR_A_D56

DDR_A_D57

DDR_A_D58

DDR_A_D59

DDR_A_D6

DDR_A_D60

DDR_A_D61

DDR_A_D62

DDR_A_D63

DDR_A_D7

DDR_A_D8

DDR_A_D9

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#2

DDR_A_DQS#3

DDR_A_DQS#4

DDR_A_DQS#5

DDR_A_DQS#6

DDR_A_DQS#7

DDR_A_DQS0

DDR_A_DQS1

DDR_A_DQS2

DDR_A_DQS3

DDR_A_DQS4

DDR_A_DQS5

DDR_A_DQS6

DDR_A_DQS7

DDR_A_MA0DDR_A_MA1

DDR_A_MA10

DDR_A_MA11DDR_A_MA12

DDR_A_MA13

DDR_A_MA14

DDR_A_MA15

DDR_A_MA2DDR_A_MA3

DDR_A_MA4DDR_A_MA5

DDR_A_MA6

DDR_A_MA7

DDR_A_MA8

DDR_A_MA9

DDR_A_RAS#

DDR_A_W E#

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

DDR_CS0_DIMMA#

DDR_CS1_DIMMA#

M_CLK_DDR#0 M_CLK_DDR#1

M_CLK_DDR0 M_CLK_DDR1

M_ODT0

M_ODT1

0.675V_DDR_VTT_ON

M_ODT0

M_ODT1

+0.675V_DDR_VTT

+1.35V_MEM

+1.35V_MEM+1.35V_MEM

+3.3V_RUN

+0.675V_DDR_VTT

+DIMM1_VREF_DQ

+0.675V_DDR_VTT

+5V_ALW

+1.35V_MEM

+SM_VREF_CA_DIMM

+SM_VREF_DQ0

+1.35V_MEM

+DIMM1_VREF_DQ

DDR_A_D[0..63]<8>

DDR_A_DQS[0..7]<8 >

DDR_A_MA[0..15]<8>

DDR_A_DQS#[0..7]<8>

DDR3_DRAMRST#_CPU <9>DDR3_DRAMRST#<19>

DDR_CKE0_DIMMA<8>

DDR_A_BS2<8>

DDR_CS1_DIMMA#<8>

DDR_A_W E#<8>

DDR_A_CAS#<8>

DDR_A_BS0<8>

DDR_A_BS1 <8>

DDR_A_RAS# <8>

M_CLK_DDR1 <8>

M_CLK_DDR#1 <8>M_CLK_DDR#0<8>

M_CLK_DDR0<8>

DDR_CKE1_DIMMA <8>

DDR_CS0_DIMMA# <8>

DDR_XDP_W AN_SMBCLK <19,7,9>

DDR_XDP_W AN_SMBDAT <19,7,9>

DDR_PG_CTRL<9>

M_ODT2 <19>

M_ODT3 <19>

0.675V_DDR_VTT_ON <42>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DDR3L

18 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DDR3L

18 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DDR3L

18 48Monday, March 17, 2014

Compal Electronics, Inc.

RD13 66.5_0402_1%RD13 66.5_0402_1%

1 2

RD15@0_0402_5%RD15@0_0402_5%

1 2

CD27

0.1U_0402_25V6

CD27

0.1U_0402_25V6

CD13@

10U_0603_6.3V6M

CD13@

10U_0603_6.3V6M

RD6

1.8K_0402_1%

RD6

1.8K_0402_1%

CD24

0.1U_0402_25V6

CD24

0.1U_0402_25V6

RD11 66.5_0402_1%RD11 66.5_0402_1%

1 2

CD26

0.1U_0402_25V6

CD26

0.1U_0402_25V6

CD22

0.1U_0402_25V6

CD22

0.1U_0402_25V6

JDIMM1

CONN@

LCN_DAN06-K4406-0103

JDIMM1

CONN@

LCN_DAN06-K4406-0103

VREF_DQ

VSS

DQ0

DQ1

VSS

DM0

VSS

DQ2

DQ3

VSS

DQ8

DQ9

VSS

DQS1#

DQS1

VSS

DQ10

DQ11

VSS

DQ16

VSS 2

DQ4 4

DQ5 6

VSS 8

DQS0# 10

DQS0 12

VSS 14

DQ6 16

DQ7 18

VSS 20

DQ12 22

DQ13 24

VSS 26

DM1 28

RESET# 30

VSS 32

DQ14 34

DQ15 36

VSS 38

DQ20 40

DQ17

VSS

DQS2#

DQS2

VSS

DQ18

DQ19

VSS

DQ24

DQ25

VSS

DM3

VSS

DQ26

DQ27

VSS

CKE0

VDD

BA2

VDD

A12/BC#

VDD

CK0

101

CK0#

103

VDD

105

A10/AP

107

BA0

109

VDD

111

WE#

113

CAS#

115

VDD

117

A13

119

S1#

121

VDD

123

TEST

125

VSS

127

DQ32

129

DQ33

131

VSS

133

DQS4#

135

DQS4

137

VSS

139

DQ34

141

DQ35

143

VSS

145

DQ40

147

DQ41

149

VSS

151

DM5

153

VSS

155

DQ42

157

DQ43

159

VSS

161

DQ48

163

DQ49

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SA0

197

VDDSPD

199

DQ21 42

VSS 44

DM2 46

VSS 48

DQ22 50

DQ23 52

VSS 54

DQ28 56

DQ29 58

VSS 60

DQS3# 62

DQS3 64

VSS 66

DQ30 68

DQ31 70

VSS 72

CKE1 74

VDD 76

A15 78

A14 80

VDD 82

A11 84

A7 86

VDD 88

A6 90

A4 92

VDD 94

A2 96

A0 98

VDD 100

CK1 102

CK1# 104

VDD 106

BA1 108

RAS# 110

VDD 112

S0# 114

ODT0 116

VDD 118

ODT1 120

NC 122

VDD 124

VREF_CA 126

VSS 128

DQ36 130

DQ37 132

VSS 134

DM4 136

VSS 138

DQ38 140

DQ39 142

VSS 144

DQ44 146

DQ45 148

VSS 150

DQS5# 152

DQS5 154

VSS 156

DQ46 158

DQ47 160

VSS 162

DQ52 164

DQ53 166

VSS 168

DM6 170

VSS 172

DQ54 174

DQ55 176

VSS 178

DQ60 180

DQ61 182

VSS 184

DQS7# 186

DQS7 188

VSS 190

DQ62 192

DQ63 194

VSS 196

EVENT# 198

SDA 200

SA1

201

VTT

203

GND1

205

SCL 202

VTT 204

GND2 206

BOSS1

207 BOSS2 208

CD7

1U_0402_6.3V6K

CD7

1U_0402_6.3V6K

RD9

220K_0402_5%

RD9

220K_0402_5%

CD2

1U_0402_6.3V6K

CD2

1U_0402_6.3V6K

CD5

2.2U_0402_6.3V6M

CD5

2.2U_0402_6.3V6M

CD29

10U_0603_6.3V6M

CD29

10U_0603_6.3V6M

CD20

330U_D3_2.5VY_R6M

CD20

330U_D3_2.5VY_R6M

CD6@

0.1U_0402_25V6

CD6@

0.1U_0402_25V6

UD1

74AUP1G07GW_TSSOP5

UD1

74AUP1G07GW_TSSOP5

GND

3Y4

VCC 5

RD2

470_0402_5%

RD2

470_0402_5%

CD14

10U_0603_6.3V6M

CD14

10U_0603_6.3V6M

RD3@0_0402_5%RD3@0_0402_5%

1 2

CD9

1U_0402_6.3V6K

CD9

1U_0402_6.3V6K

CD31

2.2U_0402_6.3V6M

CD31

2.2U_0402_6.3V6M

CD15

10U_0603_6.3V6M

CD15

10U_0603_6.3V6M

RD14@

2M_0402_5%

RD14@

2M_0402_5%

1 2

CD3

1U_0402_6.3V6K

CD3

1U_0402_6.3V6K

QD1

L2N700 2W T1G_SC-70-3

QD1

L2N700 2W T1G_SC-70-3

1 3

CD4

1U_0402_6.3V6K

CD4

1U_0402_6.3V6K

RD7

24.9_0402_1%

RD7

24.9_0402_1%

CD18

10U_0603_6.3V6M

CD18

10U_0603_6.3V6M

CD17

10U_0603_6.3V6M

CD17

10U_0603_6.3V6M

CD23

2.2U_0402_6.3V6M

CD23

2.2U_0402_6.3V6M

CD1

0.1U_0402_25V6

CD1

0.1U_0402_25V6

CD11

1U_0402_6.3V6K

CD11

1U_0402_6.3V6K

CD12

10U_0603_6.3V6M

CD12

10U_0603_6.3V6M

RD5 2_0402_1%RD5 2_0402_1%

1 2

CD19

10U_0603_6.3V6M

CD19

10U_0603_6.3V6M

CD21

0.022U_0402_16V7K

CD21

0.022U_0402_16V7K

CD10

1U_0402_6.3V6K

CD10

1U_0402_6.3V6K

CD25

0.1U_0402_25V6

CD25

0.1U_0402_25V6

CD16

10U_0603_6.3V6M

CD16

10U_0603_6.3V6M

RD16@0_0402_5%RD16@0_0402_5%

1 2

CD32

0.1U_0402_25V6

CD32

0.1U_0402_25V6

CD8

1U_0402_6.3V6K

CD8

1U_0402_6.3V6K

RD4

1.8K_0402_1%

RD4

1.8K_0402_1%

CD28

10U_0603_6.3V6M

CD28

10U_0603_6.3V6M

CD30@0.1U_0402_25V6CD30@0.1U_0402_25V6

1 2

RD10 66.5_0402_1%RD10 66.5_0402_1%

1 2

RD12 66.5_0402_1%RD12 66.5_0402_1%

1 2

D D

C C

B B

A A

H=4mm

Reverse Type

CAD NOTE

PLACE THE CAP NEAR TO DIMM RESET PIN

Note:

Check voltage tolerance of

VREF_DQ at the DIMM socket

Layout Note:

Place near JDIMM2

Layout Note:

Place near

JDIMM2.203,204

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

20130730 SP07000LT00 CIS Link OK

DDR3_DRAMRST#

DDR_B_BS0

DDR_B_BS1

DDR_B_BS2

DDR_B_CAS#

DDR_B_D0DDR_B_D1

DDR_B_D10

DDR_B_D11

DDR_B_D12

DDR_B_D13

DDR_B_D14

DDR_B_D15

DDR_B_D16

DDR_B_D17

DDR_B_D18

DDR_B_D19

DDR_B_D2

DDR_B_D20

DDR_B_D21

DDR_B_D22

DDR_B_D23

DDR_B_D24

DDR_B_D25

DDR_B_D26

DDR_B_D27

DDR_B_D28

DDR_B_D29

DDR_B_D3

DDR_B_D30

DDR_B_D31

DDR_B_D32DDR_B_D33

DDR_B_D34

DDR_B_D35

DDR_B_D36 DDR_B_D37

DDR_B_D38

DDR_B_D39

DDR_B_D4

DDR_B_D40

DDR_B_D41

DDR_B_D42

DDR_B_D43

DDR_B_D44

DDR_B_D45

DDR_B_D46

DDR_B_D47

DDR_B_D48

DDR_B_D49

DDR_B_D5

DDR_B_D50

DDR_B_D51

DDR_B_D52

DDR_B_D53

DDR_B_D54

DDR_B_D55

DDR_B_D56

DDR_B_D57

DDR_B_D58

DDR_B_D59

DDR_B_D6

DDR_B_D60

DDR_B_D61

DDR_B_D62

DDR_B_D63

DDR_B_D7

DDR_B_D8 DDR_B_D9

DDR_B_DQS#0

DDR_B_DQS#1

DDR_B_DQS#2

DDR_B_DQS#3

DDR_B_DQS#4

DDR_B_DQS#5

DDR_B_DQS#6

DDR_B_DQS#7

DDR_B_DQS0

DDR_B_DQS1

DDR_B_DQS2

DDR_B_DQS3

DDR_B_DQS4

DDR_B_DQS5

DDR_B_DQS6

DDR_B_DQS7

DDR_B_MA0DDR_B_MA1

DDR_B_MA10

DDR_B_MA11DDR_B_MA12

DDR_B_MA13

DDR_B_MA14

DDR_B_MA15

DDR_B_MA2DDR_B_MA3

DDR_B_MA4DDR_B_MA5

DDR_B_MA6

DDR_B_MA7

DDR_B_MA8

DDR_B_MA9

DDR_B_RAS#

DDR_B_WE#

DDR_CKE2_DIMMB DDR_CKE3_DIMMB

DDR_CS2_DIMMB#

DDR_CS3_DIMMB#

M_CLK_DDR#2 M_CLK_DDR#3

M_CLK_DDR2 M_CLK_DDR3

M_ODT2

+1.35V_MEM

+1.35V_MEM +1.35V_MEM

+1.35V_MEM

+0.675V_DDR_VTT

+DIMM2_VREF_DQ

+3.3V_RUN

+0.675V_DDR_VTT +0.675V_DDR_VTT

+1.35V_MEM

+SM_VREF_CA+SM_VREF_CA_DIMM

+SM_VREF_DQ1

+1.35V_MEM

+DIMM2_VREF_DQ

+SM_VREF_CA_DIMM

DDR_B_D[0..63]<8>

DDR_B_DQS[0..7]<8>

DDR_B_MA[0..15]<8>

DDR_B_DQS#[0..7]<8>

DDR3_DRAMRST# <18>

DDR_B_CAS#<8>

DDR_B_WE#<8>

DDR_CKE2_DIMMB<8>

DDR_B_BS0<8>

DDR_B_BS2<8>

DDR_CS3_DIMMB#<8>

M_CLK_DDR2<8>

M_CLK_DDR#2<8>

DDR_CKE3_DIMMB <8>

DDR_B_RAS# <8>

DDR_B_BS1 <8>

M_ODT2 <18>

DDR_CS2_DIMMB# <8>

M_CLK_DDR3 <8>

M_CLK_DDR#3 <8>

M_ODT3 <18>

DDR_XDP_WAN_SMBCLK <18,7,9>

DDR_XDP_WAN_SMBDAT <18,7,9>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DDR3L

19 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DDR3L

19 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DDR3L

19 48Monday, March 17, 2014

Compal Electronics, Inc.

CD43

1U_0402_6.3V6K

CD43

1U_0402_6.3V6K

CD64

0.1U_0402_25V6

CD64

0.1U_0402_25V6

CD49

10U_0603_6.3V6M

CD49

10U_0603_6.3V6M

CD39

1U_0402_6.3V6K

CD39

1U_0402_6.3V6K

RD23 2_0402_1%RD23 2_0402_1%

1 2

CD63

2.2U_0402_6.3V6M

CD63

2.2U_0402_6.3V6M

CD42

1U_0402_6.3V6K

CD42

1U_0402_6.3V6K

RD22

1.8K_0402_1%

RD22

1.8K_0402_1%

CD60

0.1U_0402_25V6

CD60

0.1U_0402_25V6

CD35@

0.1U_0402_25V6

CD35@

0.1U_0402_25V6

RD27@0_0402_5%RD27@0_0402_5%

CD41

1U_0402_6.3V6K

CD41

1U_0402_6.3V6K

CD36

0.022U_0402_16V7K

CD36

0.022U_0402_16V7K

CD33

2.2U_0402_6.3V6M

CD33

2.2U_0402_6.3V6M

RD21

24.9_0402_1%

RD21

24.9_0402_1%

CD34

0.1U_0402_25V6

CD34

0.1U_0402_25V6

CD40

1U_0402_6.3V6K

CD40

1U_0402_6.3V6K

CD56

2.2U_0402_6.3V6M

CD56

2.2U_0402_6.3V6M

JDIMM2

CONN@

LCN_DAN06-K4406-0103

JDIMM2

CONN@

LCN_DAN06-K4406-0103

VREF_DQ

VSS

DQ0

DQ1

VSS

DM0

VSS

DQ2

DQ3

VSS

DQ8

DQ9

VSS

DQS1#

DQS1

VSS

DQ10

DQ11

VSS

DQ16

VSS 2

DQ4 4

DQ5 6

VSS 8

DQS0# 10

DQS0 12

VSS 14

DQ6 16

DQ7 18

VSS 20

DQ12 22

DQ13 24

VSS 26

DM1 28

RESET# 30

VSS 32

DQ14 34

DQ15 36

VSS 38

DQ20 40

DQ17

VSS

DQS2#

DQS2

VSS

DQ18

DQ19

VSS

DQ24

DQ25

VSS

DM3

VSS

DQ26

DQ27

VSS

CKE0

VDD

BA2

VDD

A12/BC#

VDD

CK0

101

CK0#

103

VDD

105

A10/AP

107

BA0

109

VDD

111

WE#

113

CAS#

115

VDD

117

A13

119

S1#

121

VDD

123

TEST

125

VSS

127

DQ32

129

DQ33

131

VSS

133

DQS4#

135

DQS4

137

VSS

139

DQ34

141

DQ35

143

VSS

145

DQ40

147

DQ41

149

VSS

151

DM5

153

VSS

155

DQ42

157

DQ43

159

VSS

161

DQ48

163

DQ49

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SA0

197

VDDSPD

199

DQ21 42

VSS 44

DM2 46

VSS 48

DQ22 50

DQ23 52

VSS 54

DQ28 56

DQ29 58

VSS 60

DQS3# 62

DQS3 64

VSS 66

DQ30 68

DQ31 70

VSS 72

CKE1 74

VDD 76

A15 78

A14 80

VDD 82

A11 84

A7 86

VDD 88

A6 90

A4 92

VDD 94

A2 96

A0 98

VDD 100

CK1 102

CK1# 104

VDD 106

BA1 108

RAS# 110

VDD 112

S0# 114

ODT0 116

VDD 118

ODT1 120

NC 122

VDD 124

VREF_CA 126

VSS 128

DQ36 130

DQ37 132

VSS 134

DM4 136

VSS 138

DQ38 140

DQ39 142

VSS 144

DQ44 146

DQ45 148

VSS 150

DQS5# 152

DQS5 154

VSS 156

DQ46 158

DQ47 160

VSS 162

DQ52 164

DQ53 166

VSS 168

DM6 170

VSS 172

DQ54 174

DQ55 176

VSS 178

DQ60 180

DQ61 182

VSS 184

DQS7# 186

DQS7 188

VSS 190

DQ62 192

DQ63 194

VSS 196

EVENT# 198

SDA 200

SA1

201

VTT

203

GND1

205

SCL 202

VTT 204

GND2 206

BOSS1

207 BOSS2 208

CD55

0.1U_0402_25V6

CD55

0.1U_0402_25V6

CD54

0.022U_0402_16V7K

CD54

0.022U_0402_16V7K

CD52

10U_0603_6.3V6M

CD52

10U_0603_6.3V6M

CD53

330U_D3_2.5VY_R6M

CD53

330U_D3_2.5VY_R6M

RD25

24.9_0402_1%

RD25

24.9_0402_1%

RD20

1.8K_0402_1%

RD20

1.8K_0402_1%

CD45

10U_0603_6.3V6M

CD45

10U_0603_6.3V6M

RD18

1.8K_0402_1%

RD18

1.8K_0402_1%

CD44

1U_0402_6.3V6K

CD44

1U_0402_6.3V6K

CD57

0.1U_0402_25V6

CD57

0.1U_0402_25V6

RD19 2_0402_1%RD19 2_0402_1%

1 2

CD47@

10U_0603_6.3V6M

CD47@

10U_0603_6.3V6M

CD38

1U_0402_6.3V6K

CD38

1U_0402_6.3V6K

CD58

0.1U_0402_25V6

CD58

0.1U_0402_25V6

CD48

10U_0603_6.3V6M

CD48

10U_0603_6.3V6M

CD59

0.1U_0402_25V6

CD59

0.1U_0402_25V6

RD24

1.8K_0402_1%

RD24

1.8K_0402_1%

CD37

1U_0402_6.3V6K

CD37

1U_0402_6.3V6K

CD61

10U_0603_6.3V6M

CD61

10U_0603_6.3V6M

RD28@

0_0402_5%

RD28@

0_0402_5%

CD46@

10U_0603_6.3V6M

CD46@

10U_0603_6.3V6M

CD50

10U_0603_6.3V6M

CD50

10U_0603_6.3V6M

CD51

10U_0603_6.3V6M

CD51

10U_0603_6.3V6M

CD62

10U_0603_6.3V6M

CD62

10U_0603_6.3V6M

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Place near JMINI3

Mini mSATA H=4

+3.3V_HDD source

HDD_DEVSLP

HDD_DET#

HDD_DEVSLP

LPC_LFRAME#

LPC_LAD3

LPC_LAD2

LPC_LAD1

LPC_LAD0

PCH_PLTRST#_EC

+3.3V_HDD_UZ11

SATA_PTX_DRX_N1_C

SATA_PTX_DRX_P1_C

SATA_PRX_DTX_N1_C

SATA_PRX_DTX_P1_C

3.3V_HDD_EN

+3.3V_HDD

+3.3V_HDD +3.3V_HDD

+3.3V_RUN

+5V_ALW

+3.3V_HDD

+3.3V_RUN

HDD_DET#<6>

HDD_DEVSLP <12>

LPC_LFRAME# <36,7>

LPC_LAD3 <36,7>

LPC_LAD2 <36,7>

LPC_LAD1 <36,7>

LPC_LAD0 <36,7>

CLK_PCI_LPDEBUG<36,7>

PCH_PLTRST#_EC<27,30,36,9>

3.3V_HDD_EN<12>

SATA_PTX_DRX_N1<6>

SATA_PTX_DRX_P1<6>

SATA_PRX_DTX_N1<6>

SATA_PRX_DTX_P1<6>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

HDD CONN

20 56Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

HDD CONN

20 56Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

HDD CONN

20 56Monday, March 17, 2014

Compal Electronics, Inc.

CN4 .01U_0402_16V7KCN4 .01U_0402_16V7K

CN6 .01U_0402_16V7KCN6 .01U_0402_16V7K12

CZ65

470P_0402_50V7K

CZ65

470P_0402_50V7K

RN1 10K_0402_5%

1 2

UZ11

TPS22967DSGR_SON8_2X2

UZ11

TPS22967DSGR_SON8_2X2

VIN

VBIAS

VOUT 7

VOUT 8

6GND 5

GND 9

JMINI3

LCN_DAN08-52406-0500

CONN@

JMINI3

LCN_DAN08-52406-0500

CONN@

GND1

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

42 42

44 44

46 46

48 48

50 50

52 52

GND2 54

PJP4@

PAD-OPEN1x3m

PJP4@

PAD-OPEN1x3m

1 2

RN7

10K_0402_5%

RN7

10K_0402_5%

CN1

0.1U_0402_25V6

CN1

0.1U_0402_25V6

RN6

10K_0402_5%

RN6

10K_0402_5%

CZ64

0.1U_0402_10V7K

CZ64

0.1U_0402_10V7K

1 2

CN5 .01U_0402_16V7KCN5 .01U_0402_16V7K12

CN2

0.1U_0402_25V6

CN2

0.1U_0402_25V6

CN3 .01U_0402_16V7KCN3 .01U_0402_16V7K

B B

A A

Add for solve

pop noise and

detect issue

40 mils trace keep 20 mil spacing

Close to UA1

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Internal Speakers Header

Close to UA1 pin6

Place closely to Pin 13.

Realtek feedback

Prevent the Noise from Combo Jack

while system entry into S3 / S4 /S5

place close to pin3

Digital Mic (Goliad MLK no single Mic)

place at AGND and DGND plane

1W x 1ch, 4ohm (Transducer spec is 8Ohm/0.5W att per unit, there are two transducer units in one speaker box.)

HP-Out-Left

Global Headset

HP-Out-Right Nokia-MIC

iPhone-MIC

Verb table configures as 1 JD mode with

internal 47K pull high to save external rBOM.

20130730 CIS Link OK

Normal

Open

Combo Jack

EMI De-pop

CIS Link OK

Place CA29 close to Codec

SLEEVE & RING2 trace width require least

40mil and its length as short as possible.

place close to pin12

AUD_HP_OUT_L/ AUD_HP_OUT_Rplease keep 15 mils trace width

place close to pin26

place close to pin40

place close to pin36

CA10,CA11 close to pin1

Place RA9 close to UA1

place close to pin41 place close to pin46

+MIC2_VREF_OUT

JD1

DMIC_CLK

INT_SPKR_L +

INT_SPKR_L -

INT_SPKR_R+

INT_SPK_L+

INT_SPK_L-

INT_SPK_R+

INT_SPK_R-

AUD_NB_MUTE#

PCH_AZ_CODEC_BITCLK

SLEEVE

MIC1_L

MIC1_R AUD_HP_OUT_R

AUD_HP_OUT_L

INT_SPKR_R+

INT_SPKR_R-

AUD_HP_OUT_R AUD_HP_OUT_R1

AUD_HP_OUT_L1AUD_HP_OUT_L

AUD_HP_NB_SENSE

+MIC1_VREFO_R

+MIC1_VREFO_L

AUD_PC_BEEP

DMIC_CLKDMIC_CLK_L

INT_SPK_R+

INT_SPK_R-

+5V_RUN_PVDD

RING2

SLEEVE

AUD_NB_MUTE#

+VDDA_AVDD1

+1.5V_RUN_AUDIO

+VDDA_PVDD

AUD_HP_OUT_L

AUD_HP_OUT_R

AUD_OUT_L

AUD_OUT_R

MIC1_R

JD1

MIC1_L

+MIC1_VREFO_R

+MIC1_VREFO_L INT_SPK_L+

INT_SPK_L-

PCH_AZ_CODEC_BITCLK

PCH_AZ_CODEC_RST#

PCH_AZ_CODEC_SDOUT

PCH_AZ_SDIN0_R

RING2

SLEEVE

RING2 RING2_R

SLEEVE

+RTC_CELL

+5V_RUN

+3.3V_RUN +3.3V_RUN_AUDIO

+5V_RUN_AUDIO

+3.3V_RUN_AUDIO

+3.3V_RUN_AUDIO+5V_RUN_AUDIO +1.5V_RUN +5V_RUN_AUDIO

+MIC2_VREF_OUT

+3.3V_RUN_AUDIO

+MIC2_VREF_OUT

AUD_HP_NB_SENSE <35>

PCH_AZ_CODEC_SDIN0<6>

PCH_AZ_CODEC_BITCLK<6>

PCH_AZ_CODEC_RST#<6>

PCH_AZ_CODEC_SYNC<6>

PCH_AZ_CODEC_SDOUT<6>

BEEP <36 >

SPKR <12 >

DMIC_CLK <23>

DMIC0 <23>

AUD_NB_MUTE#<35>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Codec _ALC3235

21 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Codec _ALC3235

21 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Codec _ALC3235

21 48Monday, March 17, 2014

Compal Electronics, Inc.

DA1

L03ESDL5V0CC3-2_SOT23-3

EMC@

DA1

L03ESDL5V0CC3-2_SOT23-3

EMC@

CA13 680P_0402_50V7K

@EMC@

CA13 680P_0402_50V7K

@EMC@

QA2B

DMN66D0LDW-7_SOT363-6

QA2B

DMN66D0LDW-7_SOT363-6

CA19@EMC@

1000P_0402_50V7K

CA19@EMC@

1000P_0402_50V7K

LA5

BLM15PX600SN1D_2P

LA5

BLM15PX600SN1D_2P

1 2

LA8 BLM15PX330SN1D_2P

EMC@

LA8 BLM15PX330SN1D_2P

EMC@

1 2

RA17@EMC@

33_0402_5%

RA17@EMC@

33_0402_5%

CA35 2.2U_0603_6.3V6KCA35 2.2U_0603_6.3V6K

RA2

100K_0402_5%

RA2

100K_0402_5%

DA4

RB751S40T1G_SOD523-2

DA4

RB751S40T1G_SOD523-2

PJP6@

PAD-OPEN1x2m

PJP6@

PAD-OPEN1x2m

1 2

CA43

4.7U_0603_6.3V6K

CA43

4.7U_0603_6.3V6K

1 2

RA8 24.9_0402_1%RA8 24.9_0402_1%

1 2

CA25 10U_0603_6.3V6MCA25 10U_0603_6.3V6M

LA9 BLM15PX330SN1D_2P

EMC@

LA9 BLM15PX330SN1D_2P

EMC@

1 2

RA40 0_0402_5%

1 2

DA2

L03ESDL5V0CC3-2_SOT23-3

EMC@

DA2

L03ESDL5V0CC3-2_SOT23-3

EMC@

RA36

0_0402_5%

@EMC@

RA36

0_0402_5%

@EMC@

1 2

CA28 0.1U_0402_25V6CA28 0.1U_0402_25V6

CA16

4.7U_0603_6.3V6K

CA16

4.7U_0603_6.3V6K

DA6

L03ESDL5V0CC3-2_SOT23-3

@EMC@

DA6

L03ESDL5V0CC3-2_SOT23-3

@EMC@

CA53

10U_0603_6.3V6M

CA53

10U_0603_6.3V6M

CA10

4.7U_0603_6.3V6K

CA10

4.7U_0603_6.3V6K

UA1

ALC3234-CG_MQFN48_6X6

UA1

ALC3234-CG_MQFN48_6X6

DVDD

GPIO0/DMIC-DATA 2

GPIO1/DMIC-CLK 3

DVSS

SDATA-OUT

BCLK

LDO3-CAP

SDATA-IN

DVDD-IO

SYNC

RESETB

PCBEEP 12

HP/LINE1 JD(JD1) 13

MIC2/LINE2 JD(JD2) 14

SPDIFO/FRONT JD(JD3)/GPIO3 15

MONO-OUT

MIC2-L(PORT-F-L)/RING

MIC2-R(PORT-F-R)/SLEEVE

MIC_CAP

LINE1-R(PORT-C-R)

LINE1-L(PORT-C-L)

LINE2-R(PORT-E-R)

LINE2-L(PORT-E-L)

AVSS1 25

AVDD1 26

LDO1-CAP

VREF 28

MIC2-VREFO

LINE1-VREFO-R

LINE1-VREFO-L

HPOUT-L(PORT-I-L) 32

HPOUT-R(PORT-I-R) 33

CPVEE 34

CBN 35

CPVDD 36

CBP 37

AVSS2 38

LDO2-CAP

AVDD2 40

PVDD1 41

SPK-OUT-L+ 42

SPK-OUT-L- 43

SPK-OUT-R- 44

SPK-OUT-R+ 45

PVDD2 46

PDB

SPDIF-OUT/GPIO2 48

GND

RA41 0_0402_5%

1 2

RA24

4.7K_0402_5%

RA24

4.7K_0402_5%

1 2

RA1

10K_0402_5%

RA1

10K_0402_5%

CA22@EMC@

1000P_0402_50V7K

CA22@EMC@

1000P_0402_50V7K

CA27 0.1U_0402_25V6CA27 0.1U_0402_25V6

DA7

L03ESDL5V0CC3-2_SOT23-3

@EMC@

DA7

L03ESDL5V0CC3-2_SOT23-3

@EMC@

RA7 24.9_0402_1%RA7 24.9_0402_1%

1 2

CA47

0.1U_0402_25V6

CA47

0.1U_0402_25V6

CA51

10U_0603_6.3V6M

CA51

10U_0603_6.3V6M

PJP9@

PAD-OPEN1X2m

PJP9@

PAD-OPEN1X2m

1 2

CA50

0.1U_0402_25V6

CA50

0.1U_0402_25V6

CA31

1U_0603_10V6K

CA31

1U_0603_10V6K

RA9 33_0402_5%RA9 33_0402_5%

1 2

DA3

L03ESDL5V0CC3-2_SOT23-3

EMC@

DA3

L03ESDL5V0CC3-2_SOT23-3

EMC@

CA1

680P_0402_50V7K

@EMC@ CA1

680P_0402_50V7K

@EMC@

LA10 BLM15PX330SN1D_2PEMC@ LA10 BLM15PX330SN1D_2PEMC@

1 2

RA14EMC@ 33_0402_5%RA14EMC@ 33_0402_5%

1 2

CA44

4.7U_0603_6.3V6K

CA44

4.7U_0603_6.3V6K

1 2

CA29 1U_0603_10V6KCA29 1U_0603_10V6K

CA24@EMC@

1000P_0402_50V7K

CA24@EMC@

1000P_0402_50V7K

CA33@EMC@

10P_0402_50V8J

CA33@EMC@

10P_0402_50V8J

PJP10@

PAD-OPEN1x1m

PJP10@

PAD-OPEN1x1m

1 2

CA45

0.1U_0402_25V6

CA45

0.1U_0402_25V6

CA3

220P_0402_50V7K

@EMC@ CA3

220P_0402_50V7K

@EMC@

CA4

680P_0402_50V7K

@EMC@ CA4

680P_0402_50V7K

@EMC@

LA3

BLM15BD601SN1D_2P

EMC@ LA3

BLM15BD601SN1D_2P

EMC@

1 2

RA37

0_0402_5%

@EMC@

RA37

0_0402_5%

@EMC@

1 2

DA5

RB751S40T1G_SOD523-2

DA5

RB751S40T1G_SOD523-2

RA12 1K_0402_5%RA12 1K_0402_5%

1 2

CA46

10U_0603_6.3V6M

CA46

10U_0603_6.3V6M

CA48

10U_0603_6.3V6M

CA48

10U_0603_6.3V6M

RA35

0_0402_5%

@EMC@

RA35

0_0402_5%

@EMC@

1 2

RA25

4.7K_0402_5%

RA25

4.7K_0402_5%

1 2

RA13 1K_0402_5%RA13 1K_0402_5%

1 2

LA2

BLM15BD601SN1D_2P

EMC@ LA2

BLM15BD601SN1D_2P

EMC@

1 2

RA21

100K_0402_5%

RA21

100K_0402_5%

RA18 10K_0402_5%RA18 10K_0402_5%

1 2

CA41

0.1U_0402_25V6

CA41

0.1U_0402_25V6

CA8

0.1U_0402_25V6

CA8

0.1U_0402_25V6

CA52

10U_0603_6.3V6M

CA52

10U_0603_6.3V6M

JSPK1

ACES_50279-0040N-001

CONN@

JSPK1

ACES_50279-0040N-001

CONN@

GND

CA9

10U_0603_6.3V6M

CA9

10U_0603_6.3V6M

LA11 BLM15PX330SN1D_2PEMC@ LA11 BLM15PX330SN1D_2PEMC@

1 2

RA5 2.2K_0402_5%RA5 2.2K_0402_5%

CA18

4.7U_0603_6.3V6K

CA18

4.7U_0603_6.3V6K

CA26

1U_0603_10V4Z

CA26

1U_0603_10V4Z

CA17

0.1U_0402_25V6

CA17

0.1U_0402_25V6

CA30

@EMC@

22P_0402_50V8J

CA30

@EMC@

22P_0402_50V8J

QA2A

DMN66D0LDW-7_SOT363-6

QA2A

DMN66D0LDW-7_SOT363-6

RA6 2.2K_0402_5%RA6 2.2K_0402_5%

RA39@

0_0805_5%

RA39@

0_0805_5%

LA6 BLM15PX330SN1D_2P

EMC@

LA6 BLM15PX330SN1D_2P

EMC@

1 2

CA12 680P_0402_50V7K

@EMC@

CA12 680P_0402_50V7K

@EMC@

CA49 1U_0603_10V6KCA49 1U_0603_10V6K

RA44 100K_0402_5%RA44 100K_0402_5%

CA23@EMC@

1000P_0402_50V7K

CA23@EMC@

1000P_0402_50V7K

JHP1

SINGA_2SJ3080-003111F

CONN@

JHP1

SINGA_2SJ3080-003111F

CONN@

RA3@

0_0603_5%

RA3@

0_0603_5%

CA11

0.1U_0402_25V6

CA11

0.1U_0402_25V6

CA2

220P_0402_50V7K

@EMC@ CA2

220P_0402_50V7K

@EMC@

RA4@

0_0603_5%

RA4@

0_0603_5%

QA1

L2N7002WT1G_SC-70-3

QA1

L2N7002WT1G_SC-70-3

LA7 BLM15PX330SN1D_2P

EMC@

LA7 BLM15PX330SN1D_2P

EMC@

1 2

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Shee t of

LA-A972P

0.1

DP 1.2 MST HUB

22 48Monday, March 1 7, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Shee t of

LA-A972P

0.1

DP 1.2 MST HUB

22 48Monday, March 1 7, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Shee t of

LA-A972P

0.1

DP 1.2 MST HUB

22 48Monday, March 1 7, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

Close to JEDP1.11,12

change back to CCD_OFF at Goliad project

Close to JEDP1.33 Close to JEDP1.40 Close to JEDP1.1

LCDVDD POWERBacklight POWER

WebCAM

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Close to JEDP1.24~27

For Touchscreen

ESD depop location

20130822

LED CONN

2nd source SA00003AR00

pin 15: LOOP_BACK

BIA_PWM

BIA_PWM_EC

DISP_ON

EDP_BIA_PWM

EN_LCDPWR

PWR_SRC_ON

USBP4_D-

USBP4_D+

BIA_PWM

DISP_ON

EDP_CPU_AUX#_C

EDP_CPU_AUX_C

EDP_CPU_LANE_N0_C

EDP_CPU_LANE_N1_C

EDP_CPU_LANE_P0_C

EDP_CPU_LANE_P1_C

USBP5_D+

USBP5_D-

USBP5_D+

USBP5_D-

+PWR_SRC

+LCDVDD

+3.3V_CAM +3.3V_RUN

+3.3V_CAM +3.3V_TSP

+BL_PWR_SRC

+3.3V_ALW

+LCDVDD

+3.3V_RUN

+BL_PWR_SRC +3.3V_RUN+3.3V_RUN +3.3V_TSP

+3.3V_TSP

+LCDVDD

+BL_PWR_SRC

+3.3V_CAM

+3.3V_RUN

+5V_ALW

EN_INVPWR<36>

3.3V_CAM_EN#<12>

LCD_VCC_TEST_EN<36>

ENVDD_PCH<10,36>

PANEL_BKLEN <10>

PANEL_BKEN_EC <35>

EDP_BIA_PWM <10>

BIA_PWM_EC <36>

3.3V_TS_EN<12>

USBP4- <11>

USBP4+ <11>

EDP_CPU_LANE_P0 <10>

EDP_CPU_LANE_P1 <10>

EDP_CPU_AUX# <10>

EDP_CPU_LANE_N1 <10>

EDP_CPU_LANE_N0 <10>

EDP_CPU_AUX <10>

LCD_TST <36>

EDP_CPU_HPD <10>

DMIC_CLK <21>

DMIC0 <21>

CAM_MIC_CBL_DET# <12>

LCD_CBL_DET# <12>

TOUCH_PANEL_INTR# <12>

USBP5+<11>

USBP5-<11>

BREATH_WHITE_LED#<39>

BATT_YELLOW_LED#<39>

BATT_WHITE_LED#<39>

PANEL_HDD_LED#<39>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

eDP CONN & Touch screen

23 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

eDP CONN & Touch screen

23 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

eDP CONN & Touch screen

23 48Monday, March 17, 2014

Compal Electronics, Inc.

JLED1

CONN@

ACES_50277-0060N-001

JLED1

CONN@

ACES_50277-0060N-001

GND1 7

GND2 8

CV12

0.1U_0603_50V7K

CV12

0.1U_0603_50V7K

RV4

100K_0402_5%

RV4

100K_0402_5%

CA5@EMC@

100P_0402_50V8J

CA5@EMC@

100P_0402_50V8J

CV4 0.1U_0402_10V7KCV4 0.1U_0402_10V7K

CV2 0.1U_0402_10V7KCV2 0.1U_0402_10V7K

RV6

10K_0402_5%

RV6

10K_0402_5%

CZ1

0.1U_0402_25V6

CZ1

0.1U_0402_25V6

CV10

0.01U_0402_16V7K

CV10

0.01U_0402_16V7K

DV3

BAT54CW_SOT323-3

DV3

BAT54CW_SOT323-3

QV1

AO6405_TSOP6

QV1

AO6405_TSOP6

4 5

CV1 0.1U_0402_10V7KCV1 0.1U_0402_10V7K

RV2

4.7K_0402_5%

RV2

4.7K_0402_5%

CA6@EMC@

100P_0402_50V8J

CA6@EMC@

100P_0402_50V8J

CV7

0.1U_0603_50V7K

CV7

0.1U_0603_50V7K

LP2301ALT1G_SOT23-3

QV8

LP2301ALT1G_SOT23-3

QV8

CV3 0.1U_0402_10V7KCV3 0.1U_0402_10V7K

RV3

100K_0402_5%

RV3

100K_0402_5%

1 2

LP2301ALT1G_SOT23-3

QZ1

LP2301ALT1G_SOT23-3

QZ1

QV2

L2N7002WT1G_SC-70-3

QV2

L2N7002WT1G_SC-70-3

JEDP1

CONN@

ACES_50398-04041-001

JEDP1

CONN@

ACES_50398-04041-001

10 10

11 11

12 12

13 13

14 14

15 15

16 16

17 17

18 18

19 19

20 20

21 21

22 22

23 23

24 24

25 25

26 26

27 27

28 28

29 29

30 30

31 31

32 32

33 33

34 34

35 35

36 36

37 37

38 38

39 39

40 40

RV5 47K_0402_5%RV5 47K_0402_5%

1 2

CA7

0.1U_0402_25V6

CA7

0.1U_0402_25V6

CV11

1000P_0402_50V7K

CV11

1000P_0402_50V7K

LV27

DLW21HN900HQ2L_4P

EMC@

LV27

DLW21HN900HQ2L_4P

EMC@

433

CV9@

10U_0603_6.3V6M

CV9@

10U_0603_6.3V6M

LV1

BLM15BB221SN1D_2P~D

EMC@

LV1

BLM15BB221SN1D_2P~D

EMC@

1 2

CV5 0.1U_0402_10V7KCV5 0.1U_0402_10V7K

LZ1

DLW21HN900HQ2L_4P

EMC@

LZ1

DLW21HN900HQ2L_4P

EMC@

433

CV6 0.1U_0402_10V7KCV6 0.1U_0402_10V7K

DV2

BAT54CW_SOT323-3

DV2

BAT54CW_SOT323-3

DV1

BAT54CW_SOT323-3

DV1

BAT54CW_SOT323-3

QV7

L2N7002WT1G_SC-70-3

QV7

L2N7002WT1G_SC-70-3

DV4

AZC199-02SPR7G_SOT23-3

@EMC@

DV4

AZC199-02SPR7G_SOT23-3

@EMC@

UV24

AP2821KTR-G1_SOT23-5

UV24

AP2821KTR-G1_SOT23-5

VIN 5

VIN 4

VOUT

GND

CV8

0.1U_0402_25V6

CV8

0.1U_0402_25V6

RV1

4.7K_0402_5%

RV1

4.7K_0402_5%

CZ2

0.1U_0402_16V4Z

CZ2

0.1U_0402_16V4Z

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

mDP connector

AUX/DDC SW for DDI2 to Mini DP

mDP_CA_DET

function

mDP

HDMI

HDMI connector

20130730 DC232002PB0 CIS Link OK

20130730 DC060008GB0 CIS Link OK

mDP_AUX#_C

mDP_HPD

mDP_LANE_N1_C

mDP_LANE_P2_C

mDP_LANE_N2_C

mDP_LANE_P3_C

mDP_LANE_N3_C

mDP_CA_DET

DPB_MB_P14

mDP_LANE_P0_C

mDP_LANE_N0_C

mDP_LANE_P1_C

mDP_HPD

mDP_CA_DET

DPB_MB_P14

mDP_AUX_C

mDP_AUX#_C

mDP_AUX_C

mDP_HPD

mDP_LANE_N2_C

mDP_LANE_P2_C

mDP_LANE_N3_C

mDP_LANE_P3_C

mDP_LANE_N1_C

mDP_LANE_P1_C

mDP_LANE_N0_C

mDP_LANE_P0_C

mDP_AUX_C

mDP_AUX#_C

SW_mDP_AUX_C

SW_mDP_AUX#_C

mDP_CA_DET#

mDP_CA_DET

TMDS_CON_CLK

TMDS_CON_CLK#

TMDS_CON_N1

TMDS_CON_P1

HDMI_CLK_AUX

HDMI_DAT_AUX#

HDMI_CEC

TMDS_CON_CLK

TMDS_CON_CLK#

TMDS_CON_N0

TMDS_CON_N1

TMDS_CON_N2

TMDS_CON_P0

TMDS_CON_P1

TMDS_CON_P2

HDMI_CLK_AUX

HDMI_DAT_AUX#

TMDS_CON_N0

TMDS_CON_P0

TMDS_CON_N2

TMDS_CON_P2

+VDISPLAY_VCC

+3.3V_RUN

+5V_RUN

+3.3V_RUN

+5V_RUN

+VHDMI_VCC

DPC_HPD<10>

DDI2_LANE_P3<10>

DDI2_LANE_N3<10>

DDI2_LANE_P1<10>

DDI2_LANE_N1<10>

DDI2_LANE_P2<10>

DDI2_LANE_N2<10>

DDI2_LANE_P0<10>

DDI2_LANE_N0<10>

CPU_DPC_CTRLDAT <10>

CPU_DPC_CTRLCLK <10>

CPU_DPC_AUX#<10>

CPU_DPC_AUX<10>

HDMI_LANE_P3<25>

HDMI_LANE_N3<25>

HDMI_LANE_P1<25>

HDMI_LANE_N1<25>

HDMI_LANE_P2<25>

HDMI_LANE_N2<25>

HDMI_LANE_P0<25>

HDMI_LANE_N0<25>

HDMI_HPD<25>

HDMI_DAT_AUX#<25>

HDMI_CLK_AUX<25>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

HDMI CONN

24 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

HDMI CONN

24 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

HDMI CONN

24 48Monday, March 17, 2014

Compal Electronics, Inc.

CV510

0.1U_0402_16V4Z

CV510

0.1U_0402_16V4Z

CV509

.01U_0402_16V7K

CV509

.01U_0402_16V7K

QV501

L2N7002WT1G_SC-70-3

QV501

L2N7002WT1G_SC-70-3

RV503 5.1M_0402_5%RV503 5.1M_0402_5%

1 2

CV30@

0.1U_0402_10V7K

CV30@

0.1U_0402_10V7K

CV506 0.1U_0402_10V7KCV506 0.1U_0402_10V7K

CV508 0.1U_0402_10V7KCV508 0.1U_0402_10V7K

RV505 100K_0402_5%RV505 100K_0402_5%

1 2

CV513

0.1U_0402_10V7K

CV513

0.1U_0402_10V7K

CV501 0.1U_0402_10V7KCV501 0.1U_0402_10V7K

QV502

L2N7002WT1G_SC-70-3

QV502

L2N7002WT1G_SC-70-3

CV503 0.1U_0402_10V7KCV503 0.1U_0402_10V7K

UV501

AP2337SA-7_SOT23-3

UV501

AP2337SA-7_SOT23-3

IN 1

GND

OUT

CV24

0.1U_0402_16V4Z

CV24

0.1U_0402_16V4Z

RV8@10K_0402_5% RV8@10K_0402_5%

LV3

DLW21HN900HQ2L_4P

EMC@

LV3

DLW21HN900HQ2L_4P

EMC@

433

CV511

0.1U_0402_25V6

CV511

0.1U_0402_25V6

1 2

RV504 1M_0402_5%RV504 1M_0402_5%

RV502 100K_0402_5%RV502 100K_0402_5%

1 2

JmDP1

CONN@

ACON_MAR2E-20K1800

JmDP1

CONN@

ACON_MAR2E-20K1800

GND

AUX_CH_N

LANE2_N

AUX_CH_P

LANE2_P

GND

LANE3_N

LANE1_N

LANE3_P

LANE1_P

GND

CONFIG2

LANE0_N

CONFIG1

LANE0_P

HOT-PLUG

GND

DP_PWR

GND4 24

GND3 23

GND2 22

GND1 21

LV6

DLW21HN900HQ2L_4P

EMC@

LV6

DLW21HN900HQ2L_4P

EMC@

433

RV507

100K_0402_5%

RV507

100K_0402_5%

JHDMI1

LCN_AUF05-1922S10-0019

CONN@

JHDMI1

LCN_AUF05-1922S10-0019

CONN@

D2+

1D2_shield

2D2-

3D1+

4D1_shield

5D1-

6D0+

7D0_shield

8D0-

9CK+

10 CK_shield

11 CK-

12 CEC

13 Reserved

14 SCL

15 SDA

16 DDC/CEC_GND

17 +5V

18 HP_DET

GND 20

GND 21

GND 22

GND 23

CV507 0.1U_0402_10V7KCV507 0.1U_0402_10V7K

UV10

AP2330W-7_SC59-3

UV10

AP2330W-7_SC59-3

IN 1

GND

OUT

LV10

DLW21HN900HQ2L_4P

EMC@

LV10

DLW21HN900HQ2L_4P

EMC@

433

CV504 0.1U_0402_10V7KCV504 0.1U_0402_10V7K

RV7 2.2K_0402_5%RV7 2.2K_0402_5%

1 2

RV501 100K_0402_5%RV501 100K_0402_5%

1 2

LV12

DLW21HN900HQ2L_4P

EMC@

LV12

DLW21HN900HQ2L_4P

EMC@

433

RV9 2.2K_0402_5%RV9 2.2K_0402_5%

1 2

UV502

PI3C3125LEX_TSSOP14~D

UV502

PI3C3125LEX_TSSOP14~D

B3 11

BE1

A2 9

GND

A3 12

VCC 14

B2 8

BE3 13

BE0

BE2 10

CV27

10U_0603_6.3V6M

CV27

10U_0603_6.3V6M

CV502 0.1U_0402_10V7KCV502 0.1U_0402_10V7K

CV505 0.1U_0402_10V7KCV505 0.1U_0402_10V7K

CV512

0.1U_0402_10V7K

CV512

0.1U_0402_10V7K

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

PCB

G14U_En

G14D_En

G14 UMA

G14 DSC

G12 UMA PS8339+PS8338

DP SWITCH

G12 Entry PS8339

MODE = L: Control Switching Mode, HDMI ID disable

= H: Automatic Switching Mode, HDMI ID disable

= M: Automatic Switching Mode, HDMI ID enable

TMDS_RT = L: Standard open drain driver

= H: Open drain driver with termination resistors

TMDS_DDCBUF = L: DDC pass through

= H: DDC active buffer

= M: DDC pass through with 40 kohm pull up resistor

DP_CFG1 = L: default, auto test disable & input offset cancellation enable

= H: auto test enable & input offset cancellation enable

= M: auto test disable & input offset cancellation disable

PEQ = L: default, LEQ, compensate channel loss up to 12dB @ HBR2

= H: HEQ, compensate channel loss up to 15dB @ HBR2

= M: LLEQ, compensate channel loss up to 5dB @ HBR2

TMDS_PRE = L: no pre-emphasis

= H: 1.5dB pre-emphasis

= M: 3.0dB pre-emphasis

DP_CFG0 = L: default, automatic EQ enable & AUX interception enable

= H: automatic EQ disable & AUX interception enable

= M: automatic EQ disable & AUX interception disable, no pre-emphasis, 800mVpp swing

PS8339+PS8338

PS8339

PS8339+PS8338

PS8339

PS8339B_DP_CFG1

PS8339B_TMDS_RT

PS8339B_TMDS_PRE

PS8339B_MODE

PS8339B_INPUT_EQ

PS8339B_TMDS_DDCBUF

DDI1_LANE_P0_C

DDI1_LANE_N0_C

DDI1_LANE_P1_C

DDI1_LANE_N1_C

DDI1_LANE_P2_C

DDI1_LANE_N2_C

DDI1_LANE_P3_C

DDI1_LANE_N3_C

CPU_DPB_AUX_C

CPU_DPB_AUX#_C

PS8339B_MODE

CPU_DPB_CTRLCLK

CPU_DPB_CTRLDAT

PS8339B_TMDS_RT

PS8339B_TMDS_PRE

PS8339B_DP_CFG1

PS8339B_OUT_CA_DET

PS8339B_TMDS_DDCBUF

PS8339B_INPUT_EQ

PS8339B_IN_CA_DET

PS8339B_DP_CFG0

PS8339B_MODE_SW

PS8339B_DP_CFG0

PS8339B_MODE_SW

PS8339B_IN_CA_DET

WIGIG_AUX#

WIGIG_AUX

PS8339B_OUT_CA_DET

+3.3V_RUN

DDI1_LANE_P3<10>

DDI1_LANE_N0<10>

DDI1_LANE_P0<10>

DDI1_LANE_N1<10>

DDI1_LANE_P1<10>

DDI1_LANE_N2<10>

DDI1_LANE_P2<10>

DDI1_LANE_N3<10>

DPB_HPD<10>

CPU_DPB_AUX#<10>

CPU_DPB_AUX<10> HDMI_LANE_P0 <24>

HDMI_LANE_N0 <24>

HDMI_LANE_P1 <24>

HDMI_LANE_N1 <24>

HDMI_LANE_P2 <24>

HDMI_LANE_N2 <24>

HDMI_LANE_P3 <24>

HDMI_LANE_N3 <24>

WIGIG_LANE_P2 <30>

WIGIG_LANE_P3 <30>

WIGIG_LANE_N3 <30>

WIGIG_LANE_N2 <30>

WIGIG_LANE_P0 <30>

WIGIG_LANE_P1 <30>

WIGIG_LANE_N1 <30>

WIGIG_LANE_N0 <30>

HDMI_CLK_AUX <24>

HDMI_DAT_AUX# <24>

WIGIG_AUX <30>

WIGIG_AUX# <30>

HDMI_HPD <24>

WIGIG_HPD <30>

CPU_DPB_CTRLDAT<10>

CPU_DPB_CTRLCLK<10>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DP SW

25 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DP SW

25 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DP SW

25 48Monday, March 17, 2014

Compal Electronics, Inc.

CV66

0.1U_0402_25V6

CV66

0.1U_0402_25V6

CV62

0.01U_0402_16V7K

CV62

0.01U_0402_16V7K

RV554 100K_0402_5%RV554 100K_0402_5%

1 2

RV52

4.7K_0402_5%

RV52

4.7K_0402_5%

CV60

2.2U_0402_6.3V6M

CV60

2.2U_0402_6.3V6M

RV63

4.7K_0402_5%

RV63

4.7K_0402_5%

RV51

4.7K_0402_5%

RV51

4.7K_0402_5%

CV75 0.1U_0402_25V6CV75 0.1U_0402_25V6

1 2

CV77 0.1U_0402_25V6CV77 0.1U_0402_25V6

1 2

RV550

4.7K_0402_5%

RV550

4.7K_0402_5%

RV61

4.7K_0402_5%

RV61

4.7K_0402_5%

RV56

4.7K_0402_5%

RV56

4.7K_0402_5%

RV60

4.7K_0402_5%

RV60

4.7K_0402_5%

CV69

0.1U_0402_25V6

CV69

0.1U_0402_25V6

RV66

4.7K_0402_5%

RV66

4.7K_0402_5%

CV79 0.1U_0402_25V6CV79 0.1U_0402_25V6

1 2

RV55

4.7K_0402_5%

RV55

4.7K_0402_5%

RV58

4.7K_0402_5%

RV58

4.7K_0402_5%

RV65

4.7K_0402_5%

RV65

4.7K_0402_5%

RV50

4.99K_0402_1%

RV50

4.99K_0402_1%

RV54

4.7K_0402_5%

RV54

4.7K_0402_5%

UV7

PS8339BQFN56GTR2-A0_QFN56_7X7

UV7

PS8339BQFN56GTR2-A0_QFN56_7X7

SW/SDA_CTL

DP_CFG1 29

IN_D0p

IN_D0n

IN_D1p

IN_D1n

VDD33

IN_D2p

IN_D2n

TMDS_HPD 17

IN_D3p

IN_D3n

VDD33

MODE

TMDS_CLKn 15

TMDS_SDA 47

TMDS_SCL 48

DP_CA_DET 42

IN_CA_DET

TMDS_RT 23

CEXT

IN_AUXn

51 IN_AUXp

PEQ

DP_CFG0/SCL_CTL

TMDS_CLKp 16

VDD33

DP_AUXp_SCL 55

TMDS_DDCBUF

TMDS_CH0p 19

TMDS_CH0n 18

TMDS_PRE 20

TMDS_CH1p 22

TMDS_CH1n 21

DP_D0p 40

DP_D0n 39

VDD33

DP_D1p 37

DP_D1n 36

DP_AUXn_SDA 54

DP_D2p 34

DP_D2n 33

GND 26

DP_D3p 31

DP_D3n 30

GND 43

IN_DDC_SDA

49 IN_DDC_SCL

REXT

I2C_CTL_EN

GND 35

TMDS_CH2n 24

TMDS_CH2p 25

IN_HPD

Thermal/GND 57

DP_HPD 32

RV551

4.7K_0402_5%

RV551

4.7K_0402_5%

RV67 1M_0402_5%RV67 1M_0402_5%

1 2

CV78 0.1U_0402_25V6CV78 0.1U_0402_25V6

1 2

CV71 0.1U_0402_25V6CV71 0.1U_0402_25V6

1 2

RV64

4.7K_0402_5%

RV64

4.7K_0402_5%

CV76 0.1U_0402_25V6CV76 0.1U_0402_25V6

1 2

CV80 0.1U_0402_25V6CV80 0.1U_0402_25V6

1 2

CV61

0.01U_0402_16V7K

CV61

0.01U_0402_16V7K

RV68 100K_0402_5%

1 2

RV57

4.7K_0402_5%

RV57

4.7K_0402_5%

CV73 0.1U_0402_25V6CV73 0.1U_0402_25V6

1 2

CV74 0.1U_0402_25V6CV74 0.1U_0402_25V6

1 2

RV62

4.7K_0402_5%

RV62

4.7K_0402_5%

RV555 100K_0402_5%RV555 100K_0402_5%

1 2

CV72 0.1U_0402_25V6CV72 0.1U_0402_25V6

1 2

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DP to VGA & VGA Conn

26 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DP to VGA & VGA Conn

26 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

DP to VGA & VGA Conn

26 47Monday, March 17, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Close to JUSH1

USH CONN

USH_PWR_STATE#

USH_SMBCLK

USH_SMBDAT

SPI_DINTPM

SPI_DOTPM

SPI_CLKTPM

PCH_SPI_CS2#_R

SPI_CLKTPM

+3.3V_M_TPM

+3.3V_SUS

+3.3V_SUS+3.3V_RUN+5V_RUN

+3.3V_M_TPM

+3.3V_M

+5V_RUN

+3.3V_SUS

+3.3V_RUN

PCH_PLTRST#_EC<20,30,36,9>

PCH_SPI_DIN<7>

PCH_SPI_DO<7>

PCH_SPI_CLK<7>

PCH_SPI_CS2#<7>

TPM_PIRQ#<12>

USH_DET#<10,12>

USBP6+<11>

USBP6-<11>

BCM5882_ALERT#<35>

USH_PWR_STATE#<35>

PLTRST_USH#<9>

USH_SMBDAT<36>

USH_SMBCLK<36>

CONTACTLESS_DET#<10,7>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

USH & TPM

27 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

USH & TPM

27 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

USH & TPM

27 48Monday, March 17, 2014

Compal Electronics, Inc.

RZ35

33_0402_5%

@EMC@

RZ35

33_0402_5%

@EMC@

1 2

CZ4@

0.1U_0402_25V6

CZ4@

0.1U_0402_25V6

CZ5

4700P_0402_25V7K

CZ5

4700P_0402_25V7K

CZ10

0.1U_0402_25V6

CZ10

0.1U_0402_25V6

RZ10 1M_0402_5%RZ10 1M_0402_5%

1 2

RZ9 2.2K_0402_5%RZ9 2.2K_0402_5%

1 2

CZ6

2200P_0402_50V7K

CZ6

2200P_0402_50V7K

RZ30

33_0402_5%

RZ30

33_0402_5%

1 2

CZ12

0.1U_0402_25V6

CZ12

0.1U_0402_25V6

RZ26

33_0402_5%

RZ26

33_0402_5%

1 2

CZ9

@EMC@

0.1U_0402_25V6

CZ9

@EMC@

0.1U_0402_25V6

CZ11

0.1U_0402_25V6

CZ11

0.1U_0402_25V6

RZ17 0_0402_5%

1 2

CZ7

2200P_0402_50V7K

CZ7

2200P_0402_50V7K

RZ29

33_0402_5%

RZ29

33_0402_5%

1 2

UZ1

AT97SC3205_TSSOP28~D

UZ1

AT97SC3205_TSSOP28~D

GPIO_3 17

PIRQ#

MOSI

23 MISO

SPI_CLK

SPI_CS#

SPI_RST#

NBO_5 27

NBO_4 15

PP/GPIO 7

GPIO_1 1

GPIO_2 2

GPIO-Express-00 6

TESTI 8

TESTBI 9

VCC

GND

4GND

11 GND

18 GND

VCC

NBO_1 5

V_BAT 12

NBO_2 13

NBO_3 14

NBO_6 28

PJP11@

PAD-OPEN1x1m

PJP11@

PAD-OPEN1x1m

1 2

JUSH1

CONCR_205200FW010

CONN@

JUSH1

CONCR_205200FW010

CONN@

GND 21

GND 22

RZ8 2.2K_0402_5%RZ8 2.2K_0402_5%

1 2

D D

C C

B B

A A

SMBus Device Address 0xC8

Pin 6 is SVR_EN in Clarkville

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

RJ45 LOM circuit

+3.3V_LAN:20mils

GND

CHASSIS

GND

CHASSIS

use 40mil trace if necessary

Note:

+1.0V_LAN will work at 0.95V to 1.15V Place CL3, CL4 and LL1 close to UL1

Idc_min=500mA

DCR=100mohm

20130726 same as Goliad

10/15 change to

SP050006Y00 (S X'FORM_ NS692417 LAN)

Layout Notice : Place bead as

close UL4 as possible

+3.3V_LAN_OUT

+RSVD_VCC3P3_1

VCT_LAN_R1

LAN_DISABLE#_R

LAN_TEST_EN

LANCLK_REQ#

LOM_ACTLED_YEL#

LOM_SPD100LED_ORG#

LOM_SPD10LED_GRN#

PCIE_PRX_GLANTX_N3_C

PCIE_PRX_GLANTX_P3_C

PCIE_PTX_GLANRX_N3_C

PCIE_PTX_GLANRX_P3 _C

REGCTL_PNP10RES_BIAS

TP_LAN_JTAG_TCK

TP_LAN_JTAG_TDI

TP_LAN_JTAG_TDO

TP_LAN_JTAG_TMS

XTALI

XTALOXTALO_R

+GND_CHASSIS

LAN_ACTLED_YEL#LAN_ACTLED_YEL# LAN_ACTLED_YEL_R#

LED_1 00_ORG# LED_100_ ORG_R#

LED_1 0_GRN# LED_10_GRN_R#

NB_LAN_TX0+

NB_LAN_TX0-

NB_LAN_TX1+

NB_LAN_TX1-

NB_LAN_TX2+

NB_LAN_TX2-

NB_LAN_TX3+

NB_LAN_TX3-

Z2805

Z2806

Z2807

Z2808

LAN_ACTLED_YEL#

LED_1 00_ORG#

SYS_LED_MASK#

LOM_SPD100LED_ORG#

LOM_ACTLED_YEL#

LED_1 0_GRN#

SYS_LED_MASK#

LOM_SPD10LED_GRN#

AUX_EN_WOW L

+3.3V_SUS_UZ8

+3.3V_W LAN_UZ8

AUX_EN_WOW L

NB_LAN_TX1+

NB_LAN_TX1-

NB_LAN_TX0+

NB_LAN_TX0-

NB_LAN_TX3+

NB_LAN_TX3-

NB_LAN_TX2+

NB_LAN_TX2-

LAN_TX1+L_R

LAN_TX1-L_R

LAN_TX0+L_R

LAN_TX0-L_R

LAN_TX3+L_R

LAN_TX3-L_R

LAN_TX2+L_R

LAN_TX2-L_R

LOM_SPD10LED_GRN#

LOM_SPD100LED_ORG#

LAN_TX0+L

LAN_TX0-L

LAN_TX3-L

LAN_TX1+L

LAN_TX1-L

LAN_TX2+L

LAN_TX2-L

LAN_TX3+L

LAN_TX0+L_R

LAN_TX0-L_R

LAN_TX1+L_R

LAN_TX1-L_R

LAN_TX2+L_R

LAN_TX2-L_R

LAN_TX3+L_R

LAN_TX3-L_R

LAN_TX0+

LAN_TX0-

LAN_TX1+

LAN_TX1-

LAN_TX2+

LAN_TX2-

LAN_TX3+

LAN_TX3-

LAN_TX0+L

LAN_TX0-L

LAN_TX1+L

LAN_TX1-L

LAN_TX2+L

LAN_TX2-L

LAN_TX3+L

LAN_TX3-L

+3.3V_LAN

+0.9V_LAN

+3.3V_LAN

+0.9V_LAN

+3.3V_LAN

+0.9V_LAN

+3.3V_W LAN

+3.3V_SUS

+5V_ALW

+3.3V_ALW

LANCLK_REQ#<7>

CLK_PCIE_LAN#<7>

CLK_PCIE_LAN<7>

PCIE_PRX_GLANTX_P3<11>

PCIE_PRX_GLANTX_N3<11>

LAN_SMBDATA<7>

LAN_SMBCLK<7>

PCIE_PTX_GLANRX_N3<11>

PCIE_PTX_GLANRX_P3<11>

PM_LANPHY_ENABLE<12,9>

LAN_DISABLE#_R<35>

LAN_WAKE#<12,36>

PLTRST_LAN#<9>

WLAN_LAN_DISBL# <35>

SYS_LED_MASK# <35,39>

AUX_EN_WOW L<30,35>

SUS_ON<36,42 >

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

LAN

28 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

LAN

28 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

LAN

28 48Monday, March 17, 2014

Compal Electronics, Inc.

CZ41 0.1U_0402_10V7K@CZ41 0.1U_0402_10V7K@

1 2

RL15 75_0402_1%RL15 75_0402_1%

CZ53

0.1U_0402_10V7K

CZ53

0.1U_0402_10V7K

LL28 12NH_0603CS-120EJTS_5%

EMC@

LL28 12NH_0603CS-120EJTS_5%

EMC@

1 2

RL10@0_0402_5%RL10@0_0402_5%

1 2

CZ43 470P_0402_50V7KCZ43 470P_0402_50V7K

1 2

RL5@

10K_0402_5%

RL5@

10K_0402_5%

rev1

JLOM1

SANTA_130456-341

CONN@

rev1

JLOM1

SANTA_130456-341

CONN@

PR1+

PR1-

PR2+

PR3+

PR3-

PR2-

PR4+

PR4-

Yellow LED+

Yellow LED-

Green LED-

Green-Orange LED+

Orange LED-

GND 14

GND 15

CL32

3.3P_0402_50V8J

EMC@

CL32

3.3P_0402_50V8J

EMC@

LL27 12NH_0603CS-120EJTS_5%

EMC@

LL27 12NH_0603CS-120EJTS_5%

EMC@

1 2

RL26 5.6_0402_5%RL26 5.6_0402_5%

1 2

QL1A

DMN66D0LDW-7_SOT363-6

QL1A

DMN66D0LDW-7_SOT363-6

CL19

0.1U_0402_10V7K

CL19

0.1U_0402_10V7K

RL19 150_0402_5%RL19 150_0402_5%

1 2

RL11

1M_0402_5%

RL11

1M_0402_5%

RL18 75_0402_1%RL18 75_0402_1%

QL2A

DMN66D0LDW-7_SOT363-6

QL2A

DMN66D0LDW-7_SOT363-6

CL15@

0.1U_0402_10V7K

CL15@

0.1U_0402_10V7K

1 2

CL12

22U_0603_6.3V6M

CL12

22U_0603_6.3V6M

UZ8

TPS22966DPUR_SON14_2X3

UZ8

TPS22966DPUR_SON14_2X3

VIN1

ON1

VBIAS

ON2

VIN2

7VOUT2 8

VOUT2 9

CT2 10

GND 11

CT1 12

VOUT1 13

VOUT1 14

GPAD 15

RL9@

10K_0402_5%

RL9@

10K_0402_5%

RL27 5.6_0402_5%RL27 5.6_0402_5%

1 2

CL6 0.1U_0402_10V7KCL6 0.1U_0402_10V7K

1 2

RL17 75_0402_1%RL17 75_0402_1%

RL22 5.6_0402_5%RL22 5.6_0402_5%

1 2

T88@PAD~DT88@PAD~D

CL3

0.1U_0402_10V7K

CL3

0.1U_0402_10V7K

PCIE

MDI

SMBUS

JTAG LED

UL1

WGI218LM-QQ89-B0_QFN48_6X6~D

PCIE

MDI

SMBUS

JTAG LED

UL1

WGI218LM-QQ89-B0_QFN48_6X6~D

RSVD_VCC3P3_1 1

LANWAKE_N

LAN_DISABLE_N

VDD3P3_4 4

VDD3P3_IN 5

SVR_EN_N 6

CTRL0P9 7

VDD0P9_8 8

XTAL_OUT

XTAL_IN

VDD0P9_11 11

RBIAS

MDI_PLUS0 13

MDI_MINUS0 14

VDD3P3_15 15

VDD0P9_16 16

MDI_PLUS1 17

MDI_MINUS1 18

VDD3P3_19 19

MDI_PLUS2 20

MDI_MINUS2 21

VDD0P9_22 22

MDI_PLUS3 23

MDI_MINUS3 24

LED2

LED0

LED1

SMB_CLK

VDD3P3_29 29

TEST_EN

SMB_DATA

JTAG_TDI

JTAG_TMS

33 JTAG_TDO

JTAG_TCK

PE_RST_N

VDD0P9_37 37

PETp

PETn

VDD0P9_40 40

PERp

PERn

VDD0P9_43 43

PE_CLKP

PE_CLKN

VDD0P9_46 46

VDD0P9_47 47

CLK_REQ_N

VSS_EPAD 49

RZ38 100K_0402_5%RZ38 100K_0402_5%

1 2

CL4

10U_0603_6.3V6M

CL4

10U_0603_6.3V6M

UL2

TC7SH08FU_SSOP5

UL2

TC7SH08FU_SSOP5

2Y4

CL10

0.1U_0402_10V7K

CL10

0.1U_0402_10V7K

RL2@10K_0402_5%RL2@10K_0402_5%

1 2

CL2 0.1U_0402_10V7KCL2 0.1U_0402_10V7K

RL14 150_0402_5%RL14 150_0402_5%

1 2

RL1@10K_0402_5%RL1@10K_0402_5%

1 2

CL33

3.3P_0402_50V8J

EMC@

CL33

3.3P_0402_50V8J

EMC@

RL12

1K_0402_5%

RL12

1K_0402_5%

LL22 12NH_0603CS-120EJTS_5%

EMC@

LL22 12NH_0603CS-120EJTS_5%

EMC@

1 2

RL28 5.6_0402_5%RL28 5.6_0402_5%

1 2

PJP25

PAD-OPEN1x1m

PJP25

PAD-OPEN1x1m

RL23 5.6_0402_5%RL23 5.6_0402_5%

1 2

QL2B

DMN66D0LDW-7_SOT363-6

QL2B

DMN66D0LDW-7_SOT363-6

T89@PAD~DT89@PAD~D

CL17

0.47U_0603_10V7K

CL17

0.47U_0603_10V7K

CL14

27P_0402_50V8J

CL14

27P_0402_50V8J

1 2

RL7 0_0402_5%@RL7 0_0402_5%@

1 2

CL7

1U_0603_10V6K

CL7

1U_0603_10V6K

LL21 12NH_0603CS-120EJTS_5%

EMC@

LL21 12NH_0603CS-120EJTS_5%

EMC@

1 2

RL4 4.7K_0402_5%@RL4 4.7K_0402_5%@

CL13

27P_0402_50V8J

CL13

27P_0402_50V8J

1 2

CL1 0.1U_0402_10V7KCL1 0.1U_0402_10V7K

CL5 0.1U_0402_10V7KCL5 0.1U_0402_10V7K

1 2

RL13

3.01K_0402_1%

RL13

3.01K_0402_1%

RL20 150_0402_5%RL20 150_0402_5%

1 2

LL23 12NH_0603CS-120EJTS_5%

EMC@

LL23 12NH_0603CS-120EJTS_5%

EMC@

1 2

CL31

3.3P_0402_50V8J

EMC@

CL31

3.3P_0402_50V8J

EMC@

CL21

0.47U_0603_10V7K

CL21

0.47U_0603_10V7K

RL24 5.6_0402_5%RL24 5.6_0402_5%

1 2

RL8@0_0603_5%RL8@0_0603_5%

RL6 4.7K_0402_5%RL6 4.7K_0402_5%

CL11

0.1U_0402_10V7K

CL11

0.1U_0402_10V7K

RL16 75_0402_1%RL16 75_0402_1%

LL24 12NH_0603CS-120EJTS_5%

EMC@

LL24 12NH_0603CS-120EJTS_5%

EMC@

1 2

CL16

0.47U_0603_10V7K

CL16

0.47U_0603_10V7K

PJP27

PAD-OPEN1x3m

PJP27

PAD-OPEN1x3m

1 2

RL21 5.6_0402_5%RL21 5.6_0402_5%

1 2

CL18

470P_0402_50V7K

CL18

470P_0402_50V7K

RL3 0_0402_5%@RL3 0_0402_5%@

CL30

3.3P_0402_50V8J

EMC@

CL30

3.3P_0402_50V8J

EMC@

YL1

25MHZ_18PF_7V25000034

YL1

25MHZ_18PF_7V25000034

IN 1

GND 2

OUT

GND

CL20

0.47U_0603_10V7K

CL20

0.47U_0603_10V7K

LL25 12NH_0603CS-120EJTS_5%

EMC@

LL25 12NH_0603CS-120EJTS_5%

EMC@

1 2

CL22

EMC@

150P_1808_2.5KV8JCL22

EMC@

150P_1808_2.5KV8J

1 2

CZ42 470P_0402_50V7KCZ42 470P_0402_50V7K

1 2

1:1

TL1

NS692417

1:1

TL1

NS692417

TD1+

TD1-

TDCT1

TDCT2

TD2+

TD2-

TD3+

TD3-

TDCT3

TDCT4

TD4+

TD4-

12 TX4- 13

TX4+ 14

TXCT4 15

TXCT3 16

TX3- 17

TX3+ 18

TX2- 19

TX2+ 20

TXCT2 21

TXCT1 22

TX1- 23

TX1+ 24

LL1

4.7UH_BRC2012T4R7MD_20%

LL1

4.7UH_BRC2012T4R7MD_20%

1 2

CL8

0.1U_0402_10V7K

CL8

0.1U_0402_10V7K

RL25 5.6_0402_5%RL25 5.6_0402_5%

1 2

CL9

0.1U_0402_10V7K

CL9

0.1U_0402_10V7K

LL26 12NH_0603CS-120EJTS_5%

EMC@

LL26 12NH_0603CS-120EJTS_5%

EMC@

1 2

QL1B

DMN66D0LDW-7_SOT363-6

QL1B

DMN66D0LDW-7_SOT363-6

1 1

2 2

3 3

4 4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

CR3 close to U27.9

CR1 CR2 close to U27.35

CR4 close to U27.42

CR6 close to U27.23

please routing daisy chain

1. from UR1.38 (SD_D0) -> UR1.30 (SD_RCLK_P) -> LR3.4

2. From UR1.37 (SD_D1) -> UR1.29 (SD_RCLK_N) -> LR3.1

EMI depop location

CR31 near UR1.22 CR34 near UR1.24

EMI solution for SD card

R231,R297,R306,R315,R333,R337 for EMI solution

If support RTD3 cold the AUX and MAIN power rail should be

use different power rail; for RTD3 hot please keep this circuit

20130726 SP070011L00 CIS Link OK

+AUX_LDO

+SD_IO_LDO

IO_LDOSEL

MEDIACARD_PWREN SD_REXT

PCIE_PRX_MMITX_N1_C

PCIE_PRX_MMITX_P1_C

PCIE_PTX_MMIRX_N1_C

PCIE_PTX_MMIRX_P1_C

PE_REXT

SD/MMCCD#

SD/MMCCLK

SD/MMCCLK_R

SD/MMCCMD

SD/MMCDAT0

SD/MMCDAT1

SD/MMCDAT2 SD/MMCDAT2_R

SD/MMCDAT2_R

SD/MMCDAT3 SD/MMCDAT3_R

SD/MMCDAT3_R

SDWP

SD_UHS2_D0N

SD_UHS2_D0P

SD_UHS2_D1N

SD_UHS2_D1P

SD/MMCDAT0

SD/MMCDAT1

MEDIACARD_PWREN

+3.3V_MMI

+1.2V_LDO

+3.3V_RUN_CARD

+1.8V_RUN_CARD

+3.3V_MMI

+3.3V_RUN_CARD

+1.8V_RUN_CARD

+1.2V_LDO

+3.3V_MMI

+3.3V_MMI+3.3V_RUN

+1.8V_RUN_CARD+3.3V_RUN_CARD

+3.3V_MMI

PCIE_PTX_MMIRX_N1<11>

PCIE_PTX_MMIRX_P1<11>

PCIE_PRX_MMITX_P1<11>

PCIE_PRX_MMITX_N1<11>

CLK_PCIE_MMI<7>

CLK_PCIE_MMI#<7>

MMICLK_REQ#<6,7>

MEDIACARD_IRQ#<12>

PLTRST_MMI#<9>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Card Reader

29 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Card Reader

29 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Card Reader

29 48Monday, March 17, 2014

Compal Electronics, Inc.

CR25 0.1U_0402_10V7KCR25 0.1U_0402_10V7K

1 2

RR2 191_0402_1%RR2 191_0402_1%

1 2

CR4

0.1U_0402_25V6

CR4

0.1U_0402_25V6

CR3

0.1U_0402_25V6

CR3

0.1U_0402_25V6

CR34

4.7U_0603_6.3V6K

CR34

4.7U_0603_6.3V6K

RR8@

100K_0402_5%

RR8@

100K_0402_5%

RR5 4.7K_0402_1%RR5 4.7K_0402_1%

1 2

CR26 0.1U_0402_10V7KCR26 0.1U_0402_10V7K

1 2

RR15 10K_0402_5%RR15 10K_0402_5%

1 2

RR6

100K_0402_5%

RR6

100K_0402_5%

CR19

0.1U_0402_25V6

CR19

0.1U_0402_25V6

1 2

CR10

0.1U_0402_25V6

CR10

0.1U_0402_25V6

1 2

RR11

1M_0402_5%

RR11

1M_0402_5%

CR35

0.1U_0402_25V6

CR35

0.1U_0402_25V6

CR7

4.7U_0603_6.3V6K

CR7

4.7U_0603_6.3V6K

1 2

CR2

0.1U_0402_25V6

CR2

0.1U_0402_25V6

RR4@EMC@ 0_0402_5%RR4@EMC@ 0_0402_5%

1 2

PJP26

PAD-OPEN1x1m

PJP26

PAD-OPEN1x1m

1 2

CR31

1U_0402_6.3V6K

CR31

1U_0402_6.3V6K

JSD1

ALPS_SCDADA0101_NR

CONN@

JSD1

ALPS_SCDADA0101_NR

CONN@

D1+

VDD2

DO-

VSS3

DAT2

9DAT1/RCLK-

VSS2

VDD/VDD1

VSS1

D1-

VSS4

D0+

DAT0/RCLK+

CLK

5CMD

CD/DAT3

CARD DETECT

WRITE PROTEC

GND1 20

GND2 21

GND3 22

GND4 23

GND5 24

GND6 25

VSS5

17 GND7 26

CR21

0.1U_0402_25V6

CR21

0.1U_0402_25V6

1 2

CR23

@EMC@

5P_0402_50V8C

CR23

@EMC@

5P_0402_50V8C

CR8

0.1U_0402_25V6

CR8

0.1U_0402_25V6

1 2

RR3@EMC@ 0_0402_5%RR3@EMC@ 0_0402_5%

1 2

CR27 0.1U_0402_10V7KCR27 0.1U_0402_10V7K

1 2

CR1

4.7U_0603_6.3V6K

CR1

4.7U_0603_6.3V6K

CR13

0.1U_0402_25V6

CR13

0.1U_0402_25V6

1 2

CR18

4.7U_0603_6.3V6K

CR18

4.7U_0603_6.3V6K

1 2

CR6

0.1U_0402_25V6

CR6

0.1U_0402_25V6

CR14

4.7U_0603_6.3V6K

CR14

4.7U_0603_6.3V6K

1 2

CR9

4.7U_0603_6.3V6K

CR9

4.7U_0603_6.3V6K

1 2

CR17

1U_0402_6.3V6K

CR17

1U_0402_6.3V6K

CR22

0.1U_0402_25V6

CR22

0.1U_0402_25V6

1 2

CR24 0.1U_0402_10V7KCR24 0.1U_0402_10V7K

1 2

CR15

0.1U_0402_25V6

CR15

0.1U_0402_25V6

1 2

RR1 EMC@ 10_0402_5%RR1 EMC@ 10_0402_5%

1 2

OZ777FJ2LN

UR1

OZ777FJ2LN_QFN48_6X6

OZ777FJ2LN

UR1

OZ777FJ2LN_QFN48_6X6

PE_12VCCAIN

PE_REFCLKM

PE_REFCLKP

PE_REXT

PE_RXM

5PE_RXP

PE_TXP

PE_TXM

PE_33VCCAIN

MAIN_LDO_12VOUT

MAIN_LDO_VIN

AUX_LDO_CAP 12

AUX _33VIN

MAIN_LDO_EN

PE_RST#_GATE#

DEV_WAKE#

CLKREQ#

IO0_LDOSEL

LED# 19

SD_WPI 20

SD_CD# 21

SD_SKT_33VOUT 22

SD_SKT_33VIN

SD_SKT_18VOUT 24

SD_IO_LDO_CAP 25

SD_REXT/NC 26

UHSII_33VCCAIN/NC

UHSII_12VCCAIN/NC

SD_RCLK_M/NC 29

SD_RCLK_P/NC 30

UHSII_12VCCAIN/NC

SD_D1P/NC 32

SD_D1M/NC 33

SD_D0M/NC 34

SD_D0P/NC 35

UHSII_12VCCAIN/NC

SD_D1 37

SD_D0 38

MMC_D7 39

MMC_D6 40

CORE_12VCCD

SD_33VCCD

SD_CLK 43

MMC_D5 44

SD_CMD 45

MMC_D4 46

SD_D3 47

SD_D2 48

GND 49

D D

C C

B B

A A

+3.3V

Voltage

Tolerance

PWR

Rail

Primary Power Aux Power

Peak Normal Normal

LED control circuit

NGFF slot A Key A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Power Rating TBD

NGFF for UMA

STATE #

CONFIG_1

GND

CONFIG_0 CONFIG_2

CONFIG_3 Module Type

GND

GNDHIGH

HIGH

HIGH HIGH

HIGH

SSD-SATA

SSD-PCIE

WWAN

HCA-PCIE

3.3V_ALW for LID power

BT_RADIO_DIS#_R

BT_LED#

WLAN_LED#

WLAN_WIGIG60GHZ_DIS#_R

PCIE_PTX_WLANRX_P4_C

PCIE_PTX_WLANRX_N4_C

WIGIG_32KHZ

PCIE_WAKE#

PCH_PLTRST#_EC

BT_RADIO_DIS#_R

WLAN_WIGIG60GHZ_DIS#_R

PCIE_WAKE#

PCH_PLTRST#_EC

BT_LED#

WLAN_LED#

WIGIG_LANE_P2_C

WIGIG_LANE_N3_C

WIGIG_LANE_P3_C

WIGIG_LANE_N2_C

WIGIG_AUX#_C

WIGIG_AUX_C

WIGIG_LANE_N1_C

WIGIG_LANE_P1_C

WIGIG_LANE_N0_C

WIGIG_LANE_P0_C

PCIE_PTX_WIGIGRX_P5_C

PCIE_PTX_WIGIGRX_N5_C

WIGIG_32KHZ_R WIGIG_32KHZ

+3.3V_WLAN

+3.3V_ALW

BT_RADIO_DIS#<35>

WIRELESS_LED# <35,39>

WLAN_WIGIG60GHZ_DIS#<35>

USBP2+<11>

USBP2-<11>

PCIE_PTX_WLANRX_P4<11>

PCIE_PTX_WLANRX_N4<11>

PCIE_PRX_WLANTX_N4<11>

PCIE_PRX_WLANTX_P4<11>

CLK_PCIE_WLAN#<7>

CLK_PCIE_WLAN<7>

WLANCLK_REQ#<12,7>

PCH_CL_RST1# <7>

PCH_CL_DATA1 <7>

PCH_CL_CLK1 <7>

PCIE_WAKE#<35>

PCH_PLTRST#_EC <20,27,36,9>

PCIE_PRX_WIGIGTX_N5<11>

PCIE_PRX_WIGIGTX_P5<11>

CLK_PCIE_WIGIG<7>

CLK_PCIE_WIGIG#<7>

WIGIGCLK_REQ# <12,7>

WIGIG_HPD<25>

WIGIG_LANE_N3<25>

WIGIG_LANE_P3<25>

WIGIG_LANE_N2<25>

WIGIG_LANE_P2<25>

WIGIG_AUX# <25>

WIGIG_LANE_N0 <25>

WIGIG_LANE_P1 <25>

WIGIG_LANE_N1 <25>

WIGIG_AUX <25>

WIGIG_LANE_P0 <25>

PCIE_PTX_WIGIGRX_P5<11>

PCIE_PTX_WIGIGRX_N5<11>

LID_CL#<36,39>

EC_32KHZ_MEC5085<36>

SUSCLK<9>

AUX_EN_WOWL<28,35>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

NGFF Card

30 40Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

NGFF Card

30 40Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

NGFF Card

30 40Monday, March 17, 2014

Compal Electronics, Inc.

CZ22 0.1U_0402_10V7KCZ22 0.1U_0402_10V7K

1 2

DZ2

RB751S40T1G_SOD523-2

DZ2

RB751S40T1G_SOD523-2

1 2

CV1520.1U_0402_25V6 CV1520.1U_0402_25V6

UZ12

TC7SH08FU_SSOP5

UZ12

TC7SH08FU_SSOP5

2Y4

CZ13 0.1U_0402_10V7KCZ13 0.1U_0402_10V7K

1 2

CZ15@

0.1U_0402_25V6

CZ15@

0.1U_0402_25V6

RZ56 0_0402_5%@RZ56 0_0402_5%@

1 2

CZ17

0.1U_0402_25V6

CZ17

0.1U_0402_25V6

1 2

CZ16

0.047U_0402_16V4Z

CZ16

0.047U_0402_16V4Z

CZ20

0.047U_0402_16V4Z

CZ20

0.047U_0402_16V4Z

JSH1

CONCR_205120FW010

CONN@

JSH1

CONCR_205120FW010

CONN@

GND1

13 GND2

910

10 11

11 12

CV145 0.1U_0402_25V6CV145 0.1U_0402_25V6

1 2

RZ57 0_0402_5%RZ57 0_0402_5%

1 2

QZ2B

DMN66D0LDW-7_SOT363-6

QZ2B

DMN66D0LDW-7_SOT363-6

CZ66

47P_0402_50V8J

CZ66

47P_0402_50V8J

C263

0.1U_0402_16V4Z

C263

0.1U_0402_16V4Z

CV1490.1U_0402_25V6 CV1490.1U_0402_25V6

CZ14 0.1U_0402_10V7KCZ14 0.1U_0402_10V7K

1 2

RZ15

100K_0402_5%

RZ15

100K_0402_5%

1 2

CZ21 0.1U_0402_10V7KCZ21 0.1U_0402_10V7K

1 2

CV147 0.1U_0402_25V6CV147 0.1U_0402_25V6

1 2

CV1500.1U_0402_25V6 CV1500.1U_0402_25V6

CV146 0.1U_0402_25V6CV146 0.1U_0402_25V6

1 2

CV1570.1U_0402_25V6 CV1570.1U_0402_25V6

CZ18

0.1U_0402_25V6

CZ18

0.1U_0402_25V6

1 2

CV1530.1U_0402_25V6 CV1530.1U_0402_25V6

QZ2A

DMN66D0LDW-7_SOT363-6

QZ2A

DMN66D0LDW-7_SOT363-6

JNGFF1

BELLW_80148-3521

CONN@

JNGFF1

BELLW_80148-3521

CONN@

122

344

566

910 10

11 12 12

13 14 14

15 16 16

17 18 18

19 20 20

53 54 54

55 56 56

57 58 58

59 60 60

61 62 62

63 64 64

65 66 66

21 22 22

23 24 24

25 26 26

27 28 28

29 30 30

31 32 32

33 34 34

35 36 36

37 38 38

39 40 40

41 42 42

43 44 44

45 46 46

47 48 48

49 50 50

51 52 52

GND 68

GND

CV1560.1U_0402_25V6 CV1560.1U_0402_25V6

CV148 0.1U_0402_25V6CV148 0.1U_0402_25V6

1 2

DZ1

RB751S40T1G_SOD523-2

DZ1

RB751S40T1G_SOD523-2

1 2

RZ14

100K_0402_5%

RZ14

100K_0402_5%

1 2

CZ19

4.7U_0603_6.3V6K

CZ19

4.7U_0603_6.3V6K

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

PCB

G14U_En

G14D_En

G14 UMA

G14 DSC

G12 UMA

USB2 3

USB3102

USB2 0

G12 Entry NA

NX3DV221

USB3102 NX3DV221

20130730 DC23300C0B0 CIS Link OK

CI19 near UI3.1

USB3RN1_D- USB3RN1_D-

USB3RP1_D+ USB3RP1_D+

USB3TN1_D- USB3TN1_D-

USB3TP1_D+ USB3TP1_D+

USBP0_D+

USBP0_D-

USBP3_D+

USBP3_D-

USB3RN4_D-

USB3RN4_D- USB3RN4_D-USB3RP4_D+

USB3RP4_D+ USB3RP4_D+

USB3TN4_D-

USB3TN4_D- USB3TN4_D-

USB3TP4_D+

USB3TP4_D+ USB3TP4_D+

USB3TN1_D-

USB3TP1_D+

USB3RP1_D+

USB3RN1_D-

USBP3_D+

USBP3_D-

USB3TP4_D+

USB3TN4_D-

USB3RP4_D+

USB3RN4_D-

ILIM_SEL

PS_USBP0_D+

PS_USBP0_D-

USB3RP1_D+

USB3RN1_D-

USB3TP1_D+

USB3TN1_D-

USBP0_D-

USBP0_D+

PS_USBP0_D+

PS_USBP0_D-

USB3TP1_C

USB3TN1_C

USB3TN4_C

USB3TP4_C

+5V_ALW +USB_RIGHT_PWR

+5V_USB_CHG_PWR

+USB_RIGHT_PWR

+5V_ALW

+5V_ALW +5V_USB_CHG_PWR

USB_OC2# <11,12>

USB_PWR_EN2#<35>

USB3TP4<11>

USB3TN4<11>

USB3RP4<11>

USB3RN4<11>

USBP3+<11>

USBP3-<11>

USBP0-<11>

USBP0+<11>

USB_OC0#<11>

USB_PWR_SHR_VBUS_EN<35>

USB_PWR_SHR_EN#<35,36>

USB3RP1<11>

USB3RN1<11>

USB3TP1<11>

USB3TN1<11>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

USB3.0

31 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

USB3.0

31 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

USB3.0

31 48Monday, March 17, 2014

Compal Electronics, Inc.

CI12

0.1U_0402_25V6

CI12

0.1U_0402_25V6

DI1

L05ESDL5V0NA-4_SLP2510P8-10-9

EMC@

DI1

L05ESDL5V0NA-4_SLP2510P8-10-9

EMC@

CI3

0.1U_0402_25V6

CI3

0.1U_0402_25V6

LI4

DLW21HN900HQ2L_4P

EMC@

LI4

DLW21HN900HQ2L_4P

EMC@

433

CI27 0.1U_0402_10V7KCI27 0.1U_0402_10V7K

CI19

0.1U_0402_25V6

CI19

0.1U_0402_25V6

DI2

AZC199-02SPR7G_SOT23-3

EMC@

DI2

AZC199-02SPR7G_SOT23-3

EMC@

CI5 0.1U_0402_10V7KCI5 0.1U_0402_10V7K

CI8

100U_1206_6.3V6M

CI8

100U_1206_6.3V6M

DI3

AZC199-02SPR7G_SOT23-3

EMC@

DI3

AZC199-02SPR7G_SOT23-3

EMC@

UI3

TPS2544RTER_WQFN16_3X3

UI3

TPS2544RTER_WQFN16_3X3

NC 9

FAULT#

ILIM_SEL

CTL1

CTL2

CTL3

OUT 12

DP_IN 10

DM_IN 11

DM_OUT

DP_OUT

ILIM_LO 15

ILIM_HI 16

GND 14

GNDP 17

LI9

DLW21HN900HQ2L_4P

EMC@

LI9

DLW21HN900HQ2L_4P

EMC@

433

UI2

SY6288D10CAC_MSOP8

UI2

SY6288D10CAC_MSOP8

GND

VIN

4FLG 5

VOUT 6

VOUT 7

VOUT 8

RI13

10K_0402_5%

RI13

10K_0402_5%

CI1

100U_1206_6.3V6M

CI1

100U_1206_6.3V6M

LI3

DLW21HN900HQ2L_4P

EMC@

LI3

DLW21HN900HQ2L_4P

EMC@

433

JUSB1

CONN@

SANTA_373 070-2

JUSB1

CONN@

SANTA_373 070-2

VBUS

D-

D+

GND

SSRX-

SSRX+

GND

SSTX-

SSTX+

GND 10

GND 11

GND 12

GND 13

RI14

22.1K_0402_1%

RI14

22.1K_0402_1%

DI6

L05ESDL5V0NA-4_SLP2510P8-10-9

EMC@

DI6

L05ESDL5V0NA-4_SLP2510P8-10-9

EMC@

JUSB2

CONN@

SANTA_373 070-2

JUSB2

CONN@

SANTA_373 070-2

VBUS

D-

D+

GND

SSRX-

SSRX+

GND

SSTX-

SSTX+

GND 10

GND 11

GND 12

GND 13

LI8

DLW21HN900HQ2L_4P

EMC@

LI8

DLW21HN900HQ2L_4P

EMC@

433

LI2

DLW21HN900HQ2L_4P

EMC@

LI2

DLW21HN900HQ2L_4P

EMC@

433

CI4 0.1U_0402_10V7KCI4 0.1U_0402_10V7K

CI10

0.1U_0402_25V6

CI10

0.1U_0402_25V6

CI11

10U_0603_6.3V6M

@CI11

10U_0603_6.3V6M

CI28 0.1U_0402_10V7KCI28 0.1U_0402_10V7K

LI1

DLW21HN900HQ2L_4P

EMC@

LI1

DLW21HN900HQ2L_4P

EMC@

433

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

USB3TP2_D+

USB3TN2_D-

USB3RN2_D-

USB3RP2_D+

USBP1_R_D-

USBP1_R_D+

USB3TP2_D+

USB3TN2_D-

USB3TP2_D+

USB3TN2_D-

USB3TP2_D+

USB3RP2_D+

USB3RN2_D-

USB3RP2_D+

USB3RN2_D- USB3RN2_D-

USB3RP2_D+

USBP1_R_D-

USBP1_R_D+

USB3TP2_C

USB3TN2_C

+USB_SIDE_PWR

+5V_ALW +USB_SIDE_PWR

USB3TN2<11>

USB3TP2<11>

USB3RP2<11>

USB3RN2<11>

USB_PWR_EN1#<35> USB_OC1# <11,12>

USBP1-<11>

USBP1+<11>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

USB SW

32 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

USB SW

32 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

USB SW

32 48Monday, March 17, 2014

Compal Electronics, Inc.

DI4

L05ESDL5V0NA-4_SLP2510P8-10-9

EMC@

DI4

L05ESDL5V0NA-4_SLP2510P8-10-9

EMC@

JUSB3

CONN@

TAITW_PUBAUE-09FLBS1FF4H0

JUSB3

CONN@

TAITW_PUBAUE-09FLBS1FF4H0

VBUS

D-

D+

GND

StdA-SSRX-

StdA-SSRX+

GND-DRAIN

StdA-SSTX-

StdA-SSTX+

GND 10

GND 11

GND 12

GND 13

LI6

DLW21HN900HQ2L_4P

EMC@

LI6

DLW21HN900HQ2L_4P

EMC@

433

LI7

DLW21HN900HQ2L_4P

EMC@

LI7

DLW21HN900HQ2L_4P

EMC@

433

CI17

0.1U_0402_25V6K~D

CI17

0.1U_0402_25V6K~D

LI5

DLW21HN900HQ2L_4P

EMC@

LI5

DLW21HN900HQ2L_4P

EMC@

433

CI6

10U_0603_6.3V6M

@CI6

10U_0603_6.3V6M

CI16 0.1U_0402_10V7KCI16 0.1U_0402_10V7K

CI13 0.1U_0402_10V7KCI13 0.1U_0402_10V7K

UI1

SY6288D10CAC_MSOP8

UI1

SY6288D10CAC_MSOP8

GND

VIN

4FLG 5

VOUT 6

VOUT 7

VOUT 8

CI14

100U_1206_6.3V6M

CI14

100U_1206_6.3V6M

CI7

0.1U_0402_25V6

CI7

0.1U_0402_25V6

DI5

AZC199-02SPR7G_SOT23-3

EMC@

DI5

AZC199-02SPR7G_SOT23-3

EMC@

D D

C C

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

NFC on USH/B

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

NFC

33 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

NFC

33 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

NFC

33 48Monday, March 17, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

E-Dock

34 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

E-Dock

34 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

E-Dock

34 48Monday, March 17, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

1UMA

Discrete

VGA_ID0

Stuff RE275 and no stuff RE274 keep E5 design

Stuff RE274 and no stuff RE275 to save two GPIOs on EC(PCH_PCIE_WAKE# should be output with OD)

SYS_LED_MASK#

USB_PWR_SHR_VBUS_EN

USB_DB_DET#

BC_INT#_ECE1099

BC_CLK_ECE1099

BC_DAT_ECE1099

EXPRESS_DET#

SMART_DET#

BT_RADIO_DIS#

SYS_LED_MASK#

WLAN_W IGIG60GHZ_DIS#

MASK_SATA_LED#

USB_PWR_SHR_VBUS_EN

USB_PWR_EN2#

USB_PWR_EN1#

TOUCH_SCREEN_PD#

WLAN_W IGIG60GHZ_DIS#

BT_RADIO_DIS#

VGA_ID

PROCHOT_GATE

VGA_ID

SMB_ADDR

PCIE_WAKE#_R

USB_PWR_EN1#

USB_PWR_EN2#

+3.3V_ALW

+3.3V_ALW +3.3V_ALW_UE3

+3.3V_ALW

AUD_HP_NB_SENSE<21>

AUD_NB_MUTE#<21>

AUX_EN_WOW L<28,30>

BC_INT#_ECE1099<36>

BC_CLK_ECE1099<36>

BC_DAT_ECE1099<36>

SIO_SLP_WLAN#<9>

USH_PWR_STATE# <27>

BT_RADIO_DIS# <30>

SYS_LED_MASK# <28,39>

WIRELESS_LED# <30,39>

WLAN_W IGIG60GHZ_DIS# <30>

MASK_SATA_LED# <39>

USB_PWR_SHR_VBUS_EN <31>

USB_PWR_EN2# <31>

USB_PWR_EN1# <32>

LAN_DISABLE#_R<28>

PANEL_BKEN_EC<23>

WLAN_LAN_DISBL# <28>

LED_SATA_DIAG_OUT# <39>

BCM5882_ALERT# <27>

USB_PWR_SHR_EN# <31,36>

PCH_PCIE_WAKE# <36,9>

PCIE_WAKE# <30>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

ECE5048

35 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

ECE5048

35 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

ECE5048

35 47Monday, March 17, 2014

Compal Electronics, Inc.

T98@PAD~DT98@PAD~D

RE11 100K_0402_5%RE11 100K_0402_5%

1 2

RE2410K_0402_5% RE2410K_0402_5%

CE2

0.1U_0402_25V6

CE2

0.1U_0402_25V6

RE83 100K_0402_5%

1 2

CE1

10U_0603_6.3V6M

CE1

10U_0603_6.3V6M

RE21 10K_0402_5%RE21 10K_0402_5%

1 2

RE87 10K_0402_5%RE87 10K_0402_5%

1 2

T97@PAD~DT97@PAD~D

RE85100K_0402_5%

1 2

RE3510K_0402_5% RE3510K_0402_5%

RE8 100K_0402_5%RE8 100K_0402_5%

1 2

T32@PAD~D T32@PAD~D

PJP14

PAD-OPEN1x1m

PJP14

PAD-OPEN1x1m

1 2

RPE9

100K_0804_8P4R_5%

RPE9

100K_0804_8P4R_5%

T96 @PAD~D T96 @PAD~D

CE3

0.1U_0402_25V6

CE3

0.1U_0402_25V6

RE2740_0402_5% @RE2740_0402_5% @

1 2

UE3

ECE1099-FZG_QFN40_6X6~D

UE3

ECE1099-FZG_QFN40_6X6~D

GPIO12/KSI2

GPIO13/KSI3

GPIO14/KSI4

GPIO15/KSI5

GPIO16/KSI6

GPIO17/KSI7

GPIO20/KSO00

VCC 8

GPIO21/KSO01 9

GPIO22/KSO02 10

GPIO23/KSO03 11

GPIO24/KSO04 12

GPIO25/KSO05 13

GPIO26/KSO06 14

GPIO27/KSO07 15

GPIO30/KSO08 16

GPIO31/KSO09 17

GPIO32/KSO10 18

GPIO33/KSO11 19

GPIO34/KSO12 20

GPIO35/KSO13 21

GPIO36/KSO14 22

GPIO37/KSO15 23

GPIO00/KSO16 24

GPIO01/KSO17 25

GPIO02/KSO18 26

GPIO03/KSO19 27

VCC 28

GPIO04/KSO20 29

GPIO05/KSO21 30

GPIO06/KSO22 31

BC_DAT/SMB_DATA

BC_CLK/SMB_CLK

BC_INT#/SMB_INT#

SMB_ADDR

35 GPIO07 36

RESERVED

TEST_PIN

GPIO10/KSI0

GPIO11/KSI1

Thermal Slug(VSS) 41

RE275 0_0402_5%@RE275 0_0402_5%@

RE84100K_0402_5% RE84100K_0402_5%

1 2

D D

C C

B B

A A

4700p

X02

X01

X00

33K

RE79 CE40

130K 4700p

REV

240K 4700p

BOARD_ID rise time is measured from 5%~68%.

A00

15mil

Place close pin A29

32 KHz Clock

CE24, CE26, CE27 Place near UE2

ESR <2ohms

Pin8 5075_TXD for EC Debug

pin9 5048_TXD for SBIOS

debug

EMI depop location

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

for no-dock : A21 use LID_CL_SIO#

for no-dock : A38 use LCD_TST

for no-dock : A39 use SLP_ME_CSW_DEV#

for no-dock : A43 use BC_CLK_ECE1099

for no-dock : B45 use BC_DAT_ECE1099

for no-dock : A42 use BC_INT#_ECE1099

for no-dock : B2 use Free

for no-dock : B41 use Free

for no-dock : B42 use Free

trace width 20 mils

DN2a/DP2a WiGig

Thermistor Readings

Diode Readings

HIGH

LOW

Channel 1

Thermal Monitoring Interface Strap Option

Rest=1.58K , Tp=96 degree

V.R

DP1/DN1

DP2/DN2

DP4/DN4

Location

CPU

DIMM

Thermal diode mapping

5085 Channel

Place under CPU

Place CE35 close to the QE3 as possible

DP2/DN2 for SODIMM on QE5, place QE5 close

to SODIMM and CE37 close to QE5

DP4/DN4 for Skin on QE6, place QE6 close to Vcore VR choke.

reserve for DC fan

DP3/DN3 VGA

20130730 same as Goliad

Close to UE2 at least 250mils

DN2a/DP2a for WiGig on QE7, place QE7 close

to WiGig/WLAN and CE46 close to QE7

+RTC_CELL_VBAT

+VR_CAP

RUN_ON_EC

AC_PRESENT

ALW_PWRGD_3V_5V_EC

BC_CLK_ECE1117

BC_CLK_ECE1099

BC_DAT_ECE1117

BC_DAT_ECE1099

BC_INT#_ECE1117

BC_INT#_ECE1099

BIA_PWM_EC

BOARD_ID

CHARGER_SMBCLK

CHARGER_SMBDAT

CLKRUN#

CLK_PCI_MEC

CLK_TP_SIO

DAT_TP_SIO BAT1_LED#

EXPRESS_SMBCLK EXPRESS_SMBCLK

EXPRESS_SMBDATA EXPRESS_SMBDATA

SIO_SLP_S3#

EN_INVPWR

FAN1_PWM

FAN1_TACH

FWP#

GPU_SMBCLK

GPU_SMBDAT

ME_FWP_EC

HOST_DEBUG_TX

IRQ_SERIRQ

JTAG_CLK

JTAG_RST#

JTAG_TDI

JTAG_TDO

JTAG_TMS

LAN_WAKE#

LPC_LAD0

LPC_LAD1

LPC_LAD2

LPC_LAD3

LPC_LFRAME#

MEC_XTAL1

MEC_XTAL2

MEC_XTAL2 MEC_XTAL2_R

MSCLK

MSDATA

PBAT_SMBCLK

PBAT_SMBDAT

PCH_PCIE_WAKE#

PCH_PLTRST#_EC

PM_APWROK

POA_WAKE#

POWER_SW_IN#

H_PROCHOT#

BAT2_LED#

REM_DIODE1_N

REM_DIODE1_P

REM_DIODE2_N

REM_DIODE2_P

REM_DIODE4_N

REM_DIODE4_P

RESET_OUT#

RUNPWROK

RUN_ON#

SIO_EXT_SCI#

SIO_EXT_SMI#

SIO_PWRBTN#

SIO_RCIN#

PCH_DPWROK

SIO_SLP_S5#

SML1_SMBCLK

SML1_SMBDATA

THERMATRIP2#

THERMATRIP3#

THSEL_STRAP

USH_SMBCLK

USH_SMBDAT

VCI_IN2#

VSET_5085

PCH_RSMRST#

LID_CL_SIO#

PECI_EC_RPECI_EC_R

POA_WAKE#

POWER_SW_IN#

VCI_IN2#

DOCK_PWR_SW#

ACAV_IN

ALWON

ACAV_IN_NB

+PECI_VREF

GPU_SMBCLK

GPU_SMBDAT

PS_ID

PCH_ALW_ON

A_ON

BEEP

PCH_ALW_ON

A_ON

RUN_ON

THERMATRIP3#

REM_DIODE1_N

REM_DIODE1_P

REM_DIODE2_N

REM_DIODE2_P

REM_DIODE4_N

REM_DIODE4_P

THERMATRIP2#

THSEL_STRAPVSET_5085

BC_DAT_ECE1117

MSDATA

LCD_TST

LCD_VCC_TEST_EN

DOCK_PWR_SW#

LID_CL_SIO#

ACAV_IN ACAV_IN_NB

RUN_ON_EC

SIO_SLP_S3#

LCD_TST

mCARD_PCIE#_SATA

SUS_ON_EC

SUS_ON

SUS_ON SUS_ON_EC

SIO_SLP_S4#

LPC_LAD0

PCH_PLTRST#_EC

LPC_LFRAME#

LPC_LAD3

LPC_LAD2

LPC_LAD1

PCH_RSMRST#

FAN1_PWM

FAN1_TACH

ALW_PWRGD_3V_5V_EC

+3.3V_ALW

+RTC_CELL

+3.3V_ALW

+1.05V_RUN

+RTC_CELL

+3.3V_RUN

+3.3V_ALW

+3.3V_ALW2

+3.3V_RUN

+3.3V_ALW

+RTC_CELL

+3.3V_ALW

+3.3V_ALW_UE2

+3.3V_ALW +3.3V_ALW_UE2

+3.3V_RUN

+1.05V_RUN

+3.3V_ALW

+5V_RUN

+3.3V_ALW

+3.3V_RUN

POWER_SW#_MB <39,9>

H_PROCHOT# <45,46,9>

LPC_LAD1<20,7>

LPC_LAD2<20,7>

LPC_LAD3<20,7>

LPC_LAD0<20,7>

SIO_EXT_SCI#<12>

CLKRUN#<10,9>

AC_PRESENT <9>

SML1_SMBDATA<7>

SML1_SMBCLK<7>

BAT2_LED# <39>

SIO_PWRBTN# <9>

PCH_PCIE_WAKE# <35,9>

ME_SUS_PWR_ACK <9>

PM_APWROK <9>

BC_CLK_ECE1117<37>

BC_DAT_ECE1117< 37>

BC_INT#_ECE1117<37>

RESET_OUT# <15,9>

BIA_PWM_EC<23>

SIO_EXT_SMI#< 12>

PBAT_SMBDAT<40>

PBAT_SMBCLK<40>

SIO_RCIN#<10,12>

RUNPWROK <9>

IRQ_SERIRQ<10,12>

EN_INVPWR <23>

PCH_PLTRST#_EC<20,27,30,9>

CHARGER_SMBCLK <46>

CHARGER_SMBDAT <46>

CLK_PCI_MEC< 7>

BC_DAT_ECE1099< 35>

BC_INT#_ECE1099<35>

BC_CLK_ECE1099<35>

LPC_LFRAME#<20,7>

USH_SMBDAT <27>

USH_SMBCLK <27>

I_BATT <46>

SIO_SLP_S5#<9>

CLK_TP_SIO<37>

DAT_TP_SIO<37>

RUN_ON< 36,38>

I_ADP <46>

LAN_WAKE# <12,28>

USB_PWR_SHR_EN# <31,35>

AC_DIS <46>

PCH_DPWROK <9>

PCH_RSMRST# <37>

PECI_EC <9>

PBAT_PRES# <40,46>

I_SYS <46>

ALWON <41>

ACAV_IN <46>

BAT1_LED# <39>

SIO_EXT_WAKE# <12>

SIO_SLP_SUS# <9>

BREATH_LED# <39>

SYS_PWROK <9>

ENVDD_PCH <10,23>

PS_ID<40>

SUSACK#<9>

PCH_ALW_ON <38>

A_ON <38>

BEEP<21>

SIO_SLP_A# <9>

SIO_SLP_S4# <9>

SIO_SLP_LAN# <38,9>

SIO_SLP_S3# <9>

ME_FWP_EC <6>

H_THERMTRIP#< 12>

LCD_TST<23>

LCD_VCC_TEST_EN<23>

LID_CL# <30,39>

RUN_ON <36,38>

mCARD_PCIE#_SATA_R <6,7>

SUS_ON<28,42>

CLK_PCI_LPDEBUG <20,7>

ALW_PWRGD_3V_5V <37,41>

EC_32KHZ_MEC5085 <30>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

MEC5085

36 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

MEC5085

36 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

MEC5085

36 48Monday, March 17, 2014

Compal Electronics, Inc.

RE60 43_0402_5%RE60 43_0402_5%

1 2

JTAG1 CONN@

@SHORT PADS~D

JTAG1 CONN@

@SHORT PADS~D

CE10@

1U_0402_6.3V6K

CE10@

1U_0402_6.3V6K

1 2

CE27 2200P_0402_50V7KCE27 2200P_0402_50V7K

1 2

RPE5

100K_0804_8P4R_5%

RPE5

100K_0804_8P4R_5%

4 5

CE23

0.1U_0402_25V6

CE23

0.1U_0402_25V6

YE1

32.768KHZ_12.5PF_Q13FC135000040

YE1

32.768KHZ_12.5PF_Q13FC135000040

1 2

CE35@

100P_0402_50V8J

CE35@

100P_0402_50V8J

1 2

CE26 2200P_0402_50V7KCE26 2200P_0402_50V7K

1 2

RE70 2.2K_0402_5%RE70 2.2K_0402_5%

1 2

RE64 4.7K_0402_5%RE64 4.7K_0402_5%

1 2

RE280 0_0402_5%

1 2

CE17

0.1U_0402_25V6

CE17

0.1U_0402_25V6

CE11

0.1U_0402_25V6

CE11

0.1U_0402_25V6

RE91 0_0402_5%

1 2

RE20 100K_0402_5%RE20 100K_0402_5%

1 2

RE58

100K_0402_5%

RE58

100K_0402_5%

RE282 0_0402_5%

1 2

RE78 1K_0402_5%RE78 1K_0402_5%

1 2

JFAN1

ACES_50277-0040N-001

CONN@

JFAN1

ACES_50277-0040N-001

CONN@

GND1 5

GND2 6

RE67

10K_0402_5%

RE67

10K_0402_5%

RE283 0_0402_5%@RE283 0_0402_5%@

1 2

QE6

MMBT3904WT1G_SC70-3~D

QE6

MMBT3904WT1G_SC70-3~D

3 1

RE51 10K_0402_5%RE51 10K_0402_5%

1 2

PJP15

PAD-OPEN1x1 m

PJP15

PAD-OPEN1x1 m

1 2

CE14

1U_0402_6.3V6K

CE14

1U_0402_6.3V6K

RPE10

100K_0 804_8 P4R_5%

RPE10

100K_0 804_8 P4R_5%

RE56 10K_0402_5%RE56 10K_0402_5%

1 2

RE65@

100_0402_1%

RE65@

100_0402_1%

CE38

0.1U_0402_25V6

CE38

0.1U_0402_25V6

RE68

100K_0402_5%

RE68

100K_0402_5%

QE5

MMBT3904WT1G_SC70-3~D

QE5

MMBT3904WT1G_SC70-3~D

3 1

RE81

10K_0402_5%

RE81

10K_0402_5%

CE46@

100P_0402_50V8J

CE46@

100P_0402_50V8J

JLPDE1

CONN@

HB_A5310 15-SCHR 21

JLPDE1

CONN@

HB_A5310 15-SCHR 21

10 10

JDEG1

ACES_50521-01041-P01

CONN@

JDEG1

ACES_50521-01041-P01

CONN@

GND1 11

GND2 12

10 10

RE72

10K_0402_5%

RE72

10K_0402_5%

CE32

10U_0603_6.3V6M

CE32

10U_0603_6.3V6M

CE18

0.1U_0402_25V6

CE18

0.1U_0402_25V6

RE48 10K_0402_5%RE48 10K_0402_5%

1 2

RE69

8.2K_0402_5%

RE69

8.2K_0402_5%

RE32@0_0402_5%RE32@0_0402_5%

1 2

CE19

0.1U_0402_25V6

CE19

0.1U_0402_25V6

CE24 2200P_0402_50V7KCE24 2200P_0402_50V7K

1 2

RE73

10K_0402_5%

RE73

10K_0402_5%

RE8847K_0402_5% RE8847K_0402_5%

1 2

CE16

0.1U_0402_25V6

CE16

0.1U_0402_25V6

QE4

MMBT3904WT1G_SC70-3

QE4

MMBT3904WT1G_SC70-3

3 1

CE39

100P_0402_50V8J

CE39

100P_0402_50V8J

1 2

CE22

0.1U_0402_25V6

CE22

0.1U_0402_25V6

QE2B

DMN66D0L DW-7_SOT3 63-6

QE2B

DMN66D0L DW-7_SOT3 63-6

RE25

100K_0402_5%

RE25

100K_0402_5%

CE30

1U_0402_6.3V6K

CE30

1U_0402_6.3V6K

QE7

MMBT3904WT1G_SC70-3~D

QE7

MMBT3904WT1G_SC70-3~D

RE62 100K_0402_5%RE62 100K_0402_5%

RE26 10_0402_5%RE26 10_0402_5%

RE71

49.9_0402_1%

RE71

49.9_0402_1%

RE75@

100K_0402_5%

RE75@

100K_0402_5%

CE37@

100P_0402_50V8J

CE37@

100P_0402_50V8J

RPE3

2.2K_0804_8P4R_5%

RPE3

2.2K_0804_8P4R_5%

4 5

CE13

0.1U_0402_25V6

CE13

0.1U_0402_25V6

RE43 2.2K_0402_5%RE43 2.2K_0402_5%

1 2

RE82@

10K_0402_5%

RE82@

10K_0402_5%

1 2

RE77

1.58K_0402_1%

RE77

1.58K_0402_1%

RPE7

10K_8P4R_5%

RPE7

10K_8P4R_5%

4 5

CE8

0.047U_0402_16V4Z

CE8

0.047U_0402_16V4Z

RE86 10K_0402_5%RE86 10K_0402_5%

1 2

CE25

0.1U_0402_25V6

CE25

0.1U_0402_25V6

CE36

0.1U_0402_25V6

CE36

0.1U_0402_25V6

CE41

0.1U_0402_25V6

CE41

0.1U_0402_25V6

CE40

4700P_0402_25V7K

CE40

4700P_0402_25V7K

CE15

1U_0402_6.3V6K

CE15

1U_0402_6.3V6K

RE61@0_0402_5%RE61@0_0402_5%

CE20

0.1U_0402_25V6

CE20

0.1U_0402_25V6

RE278 0_0402_5%

1 2

RE36 100K_0402_5%RE36 100K_0402_5%

1 2

RE33 10K_0402_5%RE33 10K_0402_5%

1 2

DE1

RB751S40T1G_SOD523-2

DE1

RB751S40T1G_SOD523-2

2 1

CE12

1U_0402_6.3V6K

CE12

1U_0402_6.3V6K

QE3

MMBT3904WT1G_SC70-3~D

QE3

MMBT3904WT1G_SC70-3~D

3 1

CE42

0.1U_0402_25V6

CE42

0.1U_0402_25V6

CE34

@EMC@

4.7P_0402_50V8C

CE34

@EMC@

4.7P_0402_50V8C

RE37 2.2K_0402_5%RE37 2.2K_0402_5%

1 2

RE79

130K_0402_5%

RE79

130K_0402_5%

RPE6

10K_8P4R_5%

RPE6

10K_8P4R_5%

4 5

RE55 100K_0402_5%RE55 100K_0402_5%

1 2

CE29

22P_0402_50V8J

CE29

22P_0402_50V8J

RE279 0_0402_5%

1 2

CE28

22P_0402_50V8J

CE28

22P_0402_50V8J

RE281 0_0402_5%

1 2

CE31

4.7U_0603_6.3V6K

CE31

4.7U_0603_6.3V6K

RE66

10_0402_5%

@EMC@ RE66

10_0402_5%

@EMC@

CE21

10U_0603_6.3V6M

CE21

10U_0603_6.3V6M

RE57 1K_0402_5%RE57 1K_0402_5%

1 2

RE63

100K_0402_5%

RE63

100K_0402_5%

RE31

100K_0402_5%

RE31

100K_0402_5%

QE2A

DMN66D0L DW-7_SOT3 63-6

QE2A

DMN66D0L DW-7_SOT3 63-6

UE2

MEC5085-LZY_DQFN132_11X11

UE2

MEC5085-LZY_DQFN132_11X11

GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA

GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK/GANG_DATA0

GPIO011/nSMI

GPIO030/GPTP-IN2/BCM_E_INT#/GANG_DATA7

B19 GPIO031/GPTP-OUT2/BCM_E_DAT

A18 GPIO032/BCM_E_CLK

B20

GPIO045/LSBCM_D_INT#

A19 GPIO046/LSBCM_D_DAT/GANG_STROBE

B21 GPIO047/LSBCM_D_CLK

A20

GPIO061/LPCPD#

A27

GPIO024/THSEL_STRAP B29

SER_IRQ

A28

LRESET#

B30

GPIO100/NEC_SCI

A33

GPIO110/PS2_CLK2/GPTP-IN6

A37

GPIO111/PS2_DAT2/GPTP-OUT6

B40

BGP0 B62

XTAL1

A61

XTAL2

A62

GPIO112/PS2_CLK1A

A38

GPIO113/PS2_DAT1A

B41

GPIO114/PS2_CLK0A

A39

GPIO115/PS2_DAT0A

B42

GPIO154/I2C1C_DATA/PS2_CLK1B/GANG_DATA5

B59

GPIO155/I2C1C_CLK/PS2_DAT1B/GANG_DATA6

A56

GPIO145/I2C1K_DATA/JTAG_TDI

A51

GPIO146/I2C1K_CLK/JTAG_TDO

B55

GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK

B56

GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS

A53

GPIO156/LED1/GANG_DATA1 B57

GPIO050/FAN_TACH1/GTACH0/GANG_START

B22

GPIO051/FAN_TACH2/GANG _MODE

A21

GPIO052/FAN_TACH3/GTACH1/GANG_ERROR

B23

GPIO053/PWM0

B24

GPIO054/PWM1/GPWM1

A23

GPIO055/PWM2

B25

GPIO056/PWM3/GPWM0

A24

GPIO121/BCM_A_INT#

A42 GPIO122/BCM_A_DAT

B45 GPIO123/BCM_A_CLK

A43

PCI_CLK

A29

LFRAME#

B31

LAD0

A30

LAD1

B32

LAD2

A31

LAD3

B33

CLKRUN#

A32

GPIO001/ECSPI_CS1/32KHZ_OUT B2

GPIO015/GPTP-OUT7 A8

GPIO016/GPTP-IN8 B9

GPIO017/GPTP-OUT8 A9

GPIO020/RC_ID2 B10

GPIO021/RC_ID1 A10

VCC_PWRGD B26

GPIO060/KBRST/BCM_B_INT# A25

GPIO101/ECGP_SCLK B36

GPIO102/BCM_C_INT# A34

GPIO103/ECGP_MISO B37

GPIO104/SLP_S0# A35

GPIO105/ECGP_MOSI B38

GPIO106 A36

GPIO107/NRESET_OUT B39

GPIO116/MSDATA/V2P_COUT_LO/TAP_SEL_STRAP A40

GPIO117/MSCLK/V2P_COUT_HI B43

GPIO120/UART_TX/V2P_COUT_HI1 B44

GPIO124/GPTP-OUT5/UART_RX/V2P_COUT_LO1 B46

GPIO125/GPTP-IN5/PECI_REQUEST#/GANG_BUSY A44

JTAG_RST#

B47

GPIO127/A20M A45

PROCHOT_IN#/PROCHOT_IO# A46

GPIO151/GPTP-IN4/GANG_DATA2 A54

GPIO152/GPTP-OUT4 B58

GPIO153/LED2/GANG_DATA4 A55

V_ISYS1 A57

nFWP B65

VBAT

B64

H_VTR

A22

PECI_DAT A48

VREF_PECI B51

VCI_OVRD_IN A64

VCI_IN3# B68

GPIO003/I2C1A_DATA A3

GPIO004/I2C1A_CLK B4

GPIO005/I2C1B_DATA/BCM_B_DAT A4

GPIO006/I2C1B_CLK/BCM_B_CLK B5

GPIO012/I2C1H_DATA/I2C2D_DATA B7

GPIO013/I2C1H_CLK/I2C2D_CLK/GANG_DATA3 A7

GPIO130/I2C2A_DATA/BCM_C_DAT B48

GPIO131/I2C2A_CLK/BCM_C_CLK B49

GPIO132/I2C1G_DATA A47

GPIO140/I2C1G_CLK B50

GPIO141/I2C1F_DATA/I2C2B_DATA B52

GPIO142/I2C1F_CLK/I2C2B_CLK A49

GPIO143/I2C1E_DATA B53

GPIO144/I2C1E_CLK A50

SYSPWR_PRES A59

VCI_IN2# B63

VCI_OUT A60

VCI_IN1# A63

VCI_IN0# B67

VTR_ADC

A58

GPIO157/LED0 B1

GPIO027/GPTP-OUT1 A1

DN1_DP1A/THERM B13

DP1_DN1A/VREF_T A13

VSET A17

DN2_DP2A B14

DP2_DN2A A14

VIN B15

DN3_DP3A A15

DP3_DN3A B16

VCP A12

DN4_DP4A A16

DP4_DN4A B17

THERMTRIP2# B34

GPIO002/THERMTRIP3# A2

VTR

A11

VTR

A26

VTR

B35

VTR

A41

VTR

A52

AGND

B66

VSS

B11

VSS_ADC

B60

VR_CAP

B12

VSS_RO

B54

H_VSS

B18

GPIO026/GPTP-IN1 B28

GPIO025/UART_CLK B27

V_ISYS0 B61

GPIO014/GPTP-IN7/RC_ID3 B8

D D

C C

B B

A A

EMI depop location

Touch Pad

Place close to JKBTP1

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Keyboard

20130730 same as Goliad

RSMRST circuit

CLK_TP_SIO

DAT_TP_SIO

+5V_ALW_U41

RSMRST#

+3.3V_TP

+5V_RUN

+3.3V_ALW

+3.3V_RUN +3.3V_TP

+5V_RUN+3.3V_ALW+3.3V_TP

+3.3V_ALW

+5V_ALW +3.3V_ALW

BC_CLK_ECE1117<36>

BC_INT#_ECE1117<36>

BC_DAT_ECE1117<36>

KB_DET#<11,12>

CLK_TP_SIO<36>

DAT_TP_SIO<36>

PCH_RSMRST#_Q <9>

PCH_RSMRST#<36>

ALW_PWRGD_3V_5V<36,41>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Keyboard

37 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Keyboard

37 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Keyboard

37 48Monday, March 17, 2014

Compal Electronics, Inc.

Part Number Description

DC02C007Q00 H-CONN SET 14A MB-EDP-LED-CAMERA-TS

@eDP TS Cable

Part Number Description

DC02C007Q00 H-CONN SET 14A MB-EDP-LED-CAMERA-TS

@eDP TS Cable

RZ19

4.7K_0402_5%

RZ19

4.7K_0402_5%

CZ28@

0.1U_0402_25V6

CZ28@

0.1U_0402_25V6

PJP16

PAD-OPEN1x1m

PJP16

PAD-OPEN1x1m

1 2

Part Number Description

PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG

@Speak

Part Number Description

PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG

@Speak

Part Number Description

DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA

@FAN

Part Number Description

DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA

@FAN

CZ27@

0.1U_0402_25V6

CZ27@

0.1U_0402_25V6

Part Number Description

DC30100MF00 CONN SET 0VN DCJACK-MB 2DW1003-038110F

@RTC BATT

Part Number Description

DC30100MF00 CONN SET 0VN DCJACK-MB 2DW1003-038110F

@RTC BATT

Part Number Description

DC30100MF00 CONN SET 0VN DCJACK-MB 2DW1003-038110F

@DC-IN Cable

Part Number Description

DC30100MF00 CONN SET 0VN DCJACK-MB 2DW1003-038110F

@DC-IN Cable

UZ5

RT9818A-44GU3_SC70-3

@UZ5

RT9818A-44GU3_SC70-3

VCC

GND

2RESET# 3

CZ30@EMC@

10P_0402_50V8J

CZ30@EMC@

10P_0402_50V8J

RZ51 0_0402_5%

1 2

CZ31@EMC@

10P_0402_50V8J

CZ31@EMC@

10P_0402_50V8J

RZ21

33_0402_5%

RZ21

33_0402_5%

JKBTP1

CONCR_205160FW010

CONN@

JKBTP1

CONCR_205160FW010

CONN@

GND1

GND2

CZ35

0.01U_0402_16V7K

CZ35

0.01U_0402_16V7K

UZ6

TC7SH08FU_SSOP5~D

UZ6

TC7SH08FU_SSOP5~D

Part Number Description

NBX0001CR00 FFC 12P G P0.5 PAD=0.3 73.3MM MB-SIM+HALL/B

@SIM+Hall/B FFC

Part Number Description

NBX0001CR00 FFC 12P G P0.5 PAD=0.3 73.3MM MB-SIM+HALL/B

@SIM+Hall/B FFC

Part Number Description

NBX0001KD00 FFC 16P G P0.5 PAD=0.3 82MM MB-KBTP

@KBTP FFC

Part Number Description

NBX0001KD00 FFC 16P G P0.5 PAD=0.3 82MM MB-KBTP

@KBTP FFC

RZ22

10K_0402_5%

RZ22

10K_0402_5%

Part Number Description

NBX0001KC00 FFC 15P F P0.5 PAD=0.3 40.5MM MB-NFC

@NFC Board FFC

Part Number Description

NBX0001KC00 FFC 15P F P0.5 PAD=0.3 40.5MM MB-NFC

@NFC Board FFC

CZ29@

0.1U_0402_25V6

CZ29@

0.1U_0402_25V6

Part Number Description

NBX0001KB00 FFC 8P F P0.5 PAD=0.3 22.5MM MB-FP

@FP FFC

Part Number Description

NBX0001KB00 FFC 8P F P0.5 PAD=0.3 22.5MM MB-FP

@FP FFC

CZ34@

0.1U_0402_25V6

CZ34@

0.1U_0402_25V6

1 2

Part Number Description

DC02C007P00 H-CONN SET 14A MB-EDP-LED-CAMERA

@eDP Cable

Part Number Description

DC02C007P00 H-CONN SET 14A MB-EDP-LED-CAMERA

@eDP Cable

RZ18

4.7K_0402_5%

RZ18

4.7K_0402_5%

Part Number Description

NBX0001KE00 FFC 26P G P0.5 PAD=0.3 47MM MB-USH

@USH Board FFC

Part Number Description

NBX0001KE00 FFC 26P G P0.5 PAD=0.3 47MM MB-USH

@USH Board FFC

D D

C C

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+3.3V_RUN/+5V_RUN source

+1.05V_MODPHY

if support MODPHY off keep DSC solution

MODPHY timing spec 0.7V/us and <65us

+1.05V_RUN/+3.3V_M source

+3.3V_ALW_PCH/+3.3V_LAN source

For No-Vpro HW configs

+1.05V_M

Max Rating: 2495 mA

For No-Vpro HW configs

RUN_ON

+3.3V_RUN_UZ9

+5V_RUN_UZ9

1.05V_MODPHY_EN

MPHYP_PWR_EN#

+3.3V_M_UZ2

RUN_ON

+1.05V_RUN_UZ7

+3.3V_LAN_UZ3

+3.3V_ALW_PCH_UZ3

A_ON

RUN_ON

+5V_RUN

+3.3V_ALW

+5V_ALW

+3.3V_RUN

+3.3V_ALW2

+5V_ALW

+1.05V_M +1.05V_MODPHY

+5V_ALW

+3.3V_M+3.3V_ALW

+1.05V_RUN

+1.05V_M

+3.3V_ALW_PCH

+3.3V_LAN

+5V_ALW

+3.3V_ALW

+3.3V_M+3.3V_RUN

+1.05V_M +1.05V_RUN

+1.05V_MODPHY+1.05V_RUN

MPHYP_PWR_EN<12>

A_ON<36>

RUN_ON<36>

PCH_ALW _ON<36>

SIO_SLP_LAN#<36,9>

EN_+V1.05SP <43>

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Power control

38 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Power control

38 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.1

Power control

38 48Monday, March 17, 2014

Compal Electronics, Inc.

QZ10B

DMN66D0LDW-7_SOT363-6

QZ10B

DMN66D0LDW-7_SOT363-6

CZ36 0.1U_0402_10V7K@CZ36 0.1U_0402_10V7K@

1 2

CZ50

0.1U_0402_10V7K

@CZ50

0.1U_0402_10V7K

CZ23

470P_0402_50V7K

VPRO@ CZ23

470P_0402_50V7K

VPRO@

1 2

RZ52 0.01_1206_1%NVPRO@ RZ52 0.01_1206_1%NVPRO@

1 2

CZ24 0.1U_0402_10V7K@CZ24 0.1U_0402_10V7K@

1 2

PJP18 @

PAD-OPEN1x3m

PJP18 @

PAD-OPEN1x3m

1 2

PJP20

PAD-OPEN1x1m

PJP20

PAD-OPEN1x1m

RZ5

100K_0402_5%

RZ5

100K_0402_5%

CZ38

10U_0603_6.3V6M

CZ38

10U_0603_6.3V6M

CZ47

0.1U_0402_10V7K

CZ47

0.1U_0402_10V7K

PJP19

PAD-OPEN1x1m

PJP19

PAD-OPEN1x1m

UZ2

TPS22966DPUR_SON14_2X3

VPRO@UZ2

TPS22966DPUR_SON14_2X3

VPRO@

VIN1

ON1

VBIAS

ON2

VIN2

7VOUT2 8

VOUT2 9

CT2 10

GND 11

CT1 12

VOUT1 13

VOUT1 14

GPAD 15

RZ54 0_0603_5%NVPRO@ RZ54 0_0603_5%NVPRO@

1 2

CZ45 470P_0402_50V7KCZ45 470P_0402_50V7K

1 2

PJP36@

PAD-OPEN1x1m

PJP36@

PAD-OPEN1x1m

1 2

QZ6

SI3456DDV-T1-GE3_TSOP6

QZ6

SI3456DDV-T1-GE3_TSOP6

CZ62 470P_0402_50V7KCZ62 470P_0402_50V7K

1 2

UZ9

TPS22966DPUR_SON14_2X3

UZ9

TPS22966DPUR_SON14_2X3

VIN1

ON1

VBIAS

ON2

VIN2

7VOUT2 8

VOUT2 9

CT2 10

GND 11

CT1 12

VOUT1 13

VOUT1 14

GPAD 15

QZ10A

DMN66D0LDW-7_SOT363-6

QZ10A

DMN66D0LDW-7_SOT363-6

RZ42 0_0402_5%VPRO@ RZ42 0_0402_5%VPRO@

1 2

CZ63 0.1U_0402_10V7K@CZ63 0.1U_0402_10V7K@

1 2

CZ44 0.1U_0402_10V7K@CZ44 0.1U_0402_10V7K@

1 2

PJP13@

PAD-OPEN1x2m

PJP13@

PAD-OPEN1x2m

1 2

CZ46 1000P_0402_50V7KCZ46 1000P_0402_50V7K

1 2

UZ3

TPS22966DPUR_SON14_2X3

UZ3

TPS22966DPUR_SON14_2X3

VIN1

ON1

VBIAS

ON2

VIN2

7VOUT2 8

VOUT2 9

CT2 10

GND 11

CT1 12

VOUT1 13

VOUT1 14

GPAD 15

CZ37 470P_0402_50V7KCZ37 470P_0402_50V7K

1 2

CZ25

220P_0402_50V7K

CZ25

220P_0402_50V7K

RZ41 0_0402_5%NVPRO@ RZ41 0_0402_5%NVPRO@

1 2

PJP22@

PAD-OPEN1x3m

PJP22@

PAD-OPEN1x3m

1 2

RZ16

100K_0402_5%

RZ16

100K_0402_5%

PJP21

PAD-OPEN1x3m

PJP21

PAD-OPEN1x3m

CZ49

470P_0402_50V7K

VPRO@ CZ49

470P_0402_50V7K

VPRO@

1 2

D D

C C

B B

A A

SYS_LED_MASK# LID_CL#

Mask All LEDs (Sniffer Function)

Mask Base MB LEDs (Lid Closed)

1 0

LED Circuit Control Table

Do not Mask LEDs (Lid Opened) 11

HDD LED solution for White LED

WLAN LED solution for White LED

Battery LED

Breath LED

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Fiducial Mark

POWER & INSTANT ON SWITCH

Place LED3 close to SW3

BAT1_ LED#_Q

BAT2_ LED#_Q BATT_WHITE#

BATT_ YELLOW #

BREAT H_LED#_ Q

MASK_BASE_LEDS#

SYS_LED _MASK#

MASK_BASE_LEDS#

BREAT H_WHITE_LED#

PANEL_HDD_LED#

MASK_BASE_LEDS#

SATA_ LED

SATA_ LED#

BREAT H_WHITE_LEDBREATH_W HITE_LED_SNIFF

WLAN_LED

+3.3V_A LW

+5V_AL W

+5V_AL W +5V _ALW

+5V_AL W

BRE ATH_LE D#<36>

SYS_ LED_MA SK#<2 8,35>

LID _C L#<3 0,36>

WI RE LES S_LED #<30,35 >

SAT A_ACT #<6>

LED _SATA _DIAG _OUT #<3 5>

MASK _SATA _LED#<35>

BAT 2_LED #<3 6>

BAT 1_LED #<3 6>

PANE L_HDD_ LED # <23 >

BAT T_YELL OW _L ED# < 23>

BAT T_WHI TE_LE D# <2 3>

BRE ATH_W HITE_L ED# < 23>

POW ER_S W#_MB<3 6,9 >

Title

Size Document Number Rev

Date: Shee t of

LA-A972P

0.1

PAD, LED

39 48Monday, March 1 7, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Shee t of

LA-A972P

0.1

PAD, LED

39 48Monday, March 1 7, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Shee t of

LA-A972P

0.1

PAD, LED

39 48Monday, March 1 7, 2014

Compal Electronics, Inc.

RZ31

100K_0402_5%

RZ31

100K_0402_5%

H16@

H_3P 4

H16@

H_3P 4

H10@

H_2P 8

H10@

H_2P 8

QZ7 B

DMN66 D0LDW -7_ SO T36 3-6

QZ7 B

DMN66 D0LDW -7_ SO T36 3-6

RZ24

10K_0402_5%

RZ24

10K_0402_5%

H12@

H_2P 8

H12@

H_2P 8

QZ1 2

DDTA114EUA-7-F_SOT323-3

QZ1 2

DDTA114EUA-7-F_SOT323-3

1 3

H18@

H_2P 8

H18@

H_2P 8

LED 7

LTW -295D SKS-5A _YEL -W HITE

LED 7

LTW -295D SKS-5A _YEL -W HITE

H4@

H_2P 8

H4@

H_2P 8

H21@

H_3P 0N

H21@

H_3P 0N

ST3@

H_3P 3

ST3@

H_3P 3

RZ28 330_0402_5%RZ28 330_0402_5%

1 2

DZ4

RB7 51S40 T1G_S OD5 23 -2

DZ4

RB7 51S40 T1G_S OD5 23 -2

1 2

RZ44 390_0402_5%RZ44 390_0402_5%

1 2

H2@

H_2P 5

H2@

H_2P 5

H20@

H_3P 0N

H20@

H_3P 0N

QZ1 4B

DMN66 D0LDW -7_ SO T36 3-6

QZ1 4B

DMN66 D0LDW -7_ SO T36 3-6

RZ32 270_0402_5%RZ32 270_0402_5%

1 2

FD1@

FID UCIAL MA RK~ D

FD1@

FID UCIAL MA RK~ D

UZ10

TC7 SH08FU_ SSO P5 ~D

UZ10

TC7 SH08FU_ SSO P5 ~D

H6@

H_2P 8

H6@

H_2P 8

RZ43 1K_0402_5%RZ43 1K_0402_5%

1 2

QZ1 4A

DMN66 D0LDW -7_ SO T36 3-6

QZ1 4A

DMN66 D0LDW -7_ SO T36 3-6

ST1

CLI P_C5P 1

@ST1

CLI P_C5P 1

H19@

H_2P 1

H19@

H_2P 1

RZ36 270_0402_5%RZ36 270_0402_5%

1 2

QZ3 B

DMN66 D0LDW -7_ SO T36 3-6

QZ3 B

DMN66 D0LDW -7_ SO T36 3-6

H7@

H_2P 5

H7@

H_2P 5

QZ5 A

DMN66 D0LDW -7_ SO T36 3-6

QZ5 A

DMN66 D0LDW -7_ SO T36 3-6

H1@

H_2P 3

H1@

H_2P 3

LED 5

LTW -193Z DS5_W HITE

LED 5

LTW -193Z DS5_W HITE

2 1

H8@

H_2P 8

H8@

H_2P 8

H3@

H_2P 5

H3@

H_2P 5

RZ33 390_0402_5%RZ33 390_0402_5%

1 2

H13@

H_3P 4

H13@

H_3P 4

RZ27 680_0402_5%RZ27 680_0402_5%

1 2

QZ7 A

DMN66 D0LDW -7_ SO T36 3-6

QZ7 A

DMN66 D0LDW -7_ SO T36 3-6

H5@

H_2P 8

H5@

H_2P 8

QZ5 B

DMN66 D0LDW -7_ SO T36 3-6

QZ5 B

DMN66 D0LDW -7_ SO T36 3-6

SW 2

SKR BAAE0 10_4P

SW 2

SKR BAAE0 10_4P

FD2@

FID UCIAL MA RK~ D

FD2@

FID UCIAL MA RK~ D

QZ9

DDTA114EUA-7-F_SOT323-3

QZ9

DDTA114EUA-7-F_SOT323-3

1 3

LED 3

LTW -193Z DS5_W HITE

LED 3

LTW -193Z DS5_W HITE

1 2

H9@

H_2P 8

H9@

H_2P 8

DZ3

RB7 51S40 T1G_S OD5 23 -2

DZ3

RB7 51S40 T1G_S OD5 23 -2

1 2

RZ34 680_0402_5%RZ34 680_0402_5%

1 2

QZ4

DDTA114EUA-7-F_SOT323-3

QZ4

DDTA114EUA-7-F_SOT323-3

1 3

H15@

H_3P 4

H15@

H_3P 4

H11@

H_2P 8

H11@

H_2P 8

RZ25 390_0402_5%RZ25 390_0402_5%

1 2

FD3@

FID UCIAL MA RK~ D

FD3@

FID UCIAL MA RK~ D

FD4@

FID UCIAL MA RK~ D

FD4@

FID UCIAL MA RK~ D

H14@

H_3P 4

H14@

H_3P 4

H17@

H_2P 8

H17@

H_2P 8

LED 6

LTW -193Z DS5_W HITE

LED 6

LTW -193Z DS5_W HITE

2 1

ST2@

H_3P 3

ST2@

H_3P 3

CZ4 8@

0.1U_0402_25V6

CZ4 8@

0.1U_0402_25V6

1 2

QZ3 A

DMN66 D0LDW -7_ SO T36 3-6

QZ3 A

DMN66 D0LDW -7_ SO T36 3-6

D D

C C

B B

A A

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DELL CONFIDENTIAL/PROPRIETARY

DC_IN+ Source

COIN RTC Battery

Primary Battery Connector

NB_PSID

+DCIN_JACK

-DCIN_JACK

+Z4012

PBATT+_C

PBAT_PRES#_C

PBAT_SMBDAT_C

PBAT_SMBCLK_C

+3.3V_ALW

+5V_ALW

+DC_IN

+COINCELL

+RTC_CELL

+3.3V_RTC_LDO

+COINCELL

+3.3V_ALW

+PBATT

GND

PS_ID <36>

PBAT_PRES# <3 6,48 >

PBAT_SMBDAT <37>

PBAT_SMBCLK <37>

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+DCIN

40 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+DCIN

40 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+DCIN

40 47Monday, March 17, 2014

Compal Electronics, Inc.

PC3

2200P_0402_50V7K~D

PC3

2200P_0402_50V7K~D

PR9

33_0402_5%

PR9

33_0402_5%

1 2

PQ3

MMST3904 -7-F_SOT323-3

PQ3

MMST3904 -7-F_SOT323-3

3 1

PR16

4.7K_0805_5%

@PR16

4.7K_0805_5%

PL1

FBMJ4516HS720NT_2P~D

EMC@

PL1

FBMJ4516HS720NT_2P~D

EMC@

1 2

PRP2

100_0804_8P4R_5%

PRP2

100_0804_8P4R_5%

PR11

10K_0402_1%

PR11

10K_0402_1%

PJPDC1

ACES_50299-0050N-001

@PJPDC1

ACES_50299-0050N-001

GND 6

GND 7

PQ2

FDV301N-G_SOT23-3

PQ2

FDV301N-G_SOT23-3

1 3

PL2

FBMJ4516HS720NT_2P~D

EMC@

PL2

FBMJ4516HS720NT_2P~D

EMC@

1 2

PD3

BAS40CW _SOT323-3

PD3

BAS40CW _SOT323-3

PR2

100K_0402_5%

PR2

100K_0402_5%

PR1

1K_0402_5%

PR1

1K_0402_5%

PC1

1U_0603_10V4Z

PC1

1U_0603_10V4Z

PD2

TVNST52302AB0_ SOT523-3

EMC@

PD2

TVNST52302AB0_ SOT523-3

EMC@

PR10

100K_0402_1%

PR10

100K_0402_1%

1 2

PR8

2.2K_0402_5%

PR8

2.2K_0402_5%

1 2

PC22

10U_0805_25V6K

EMC@PC22

10U_0805_25V6K

EMC@

PD1

TVNST52302AB0_ SOT523-3

EMC@

PD1

TVNST52302AB0_ SOT523-3

EMC@

JRTC1

TYCO_2-1775293-2~D

@JRTC1

TYCO_2-1775293-2~D

2G4

PR12

15K_0402_1%

PR12

15K_0402_1%

1 2

PD5

AZC199-02SPR7G_SOT23-3

EMC@

PD5

AZC199-02SPR7G_SOT23-3

EMC@

PL3

BLM15AG102SN1D_2P

EMC@PL3

BLM15AG102SN1D_2P

EMC@

PBATT1

LLTOP_ALLTOP C144LS-1 09A9-L 9P BATT P2

@PBATT1

LLTOP_ALLTOP C144LS-1 09A9-L 9P BATT P2

GND 10

GND 11

PJP1

PAD-OPEN 1x3m

PJP1

PAD-OPEN 1x3m

1 2

PR7

0_0402_5%

@PR7

0_0402_5%

1 2

PL4

FBMJ4516HS720NT_2P

EMC@ PL4

FBMJ4516HS720NT_2P

EMC@

1 2

PC9

1000P_0603_50V7K

EMC@PC9

1000P_0603_50V7K

EMC@

1 1

2 2

3 3

4 4

DELL CONFIDENTIAL/PROPRIETARY

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5 VALWP

TDC: 3.5 A

Peak Current: 5.0 A

OCP Current: 6.0 A

Cap ESR(@20 ): 18 mohm

Choke DCR(@20 ): 25 mohm

TYP MAX

H/S Rds(on) :24.0 mohm , 30.0 mohm

L/S Rds(on) :13.5 mohm , 16.5 mohm

3.3 VALWP

TDC: 4.5 A

Peak Current: 6.4 A

OCP Current: 7.68 A

Cap ESR(@20 ): 18 mohm

Choke DCR(@20 ): 15.5 mohm

TYP MAX

H/S Rds(on) :24.0 mohm , 30.0 mohm

L/S Rds(on) :13.5 mohm , 16.5 mohm

BST_3V_C BST_3V

UG_3V

SW2

LG_3V

PGOOD_3V_5V

SW1

UG_5V

BST_5V BST_5V_C

LG_5V

SNUB_3V

SNUB_5V

+PWR_SRC

+3V5V_PWR_SRC

+3.3V_ALW2

+3V5V_PWR_SRC

+5V_ALWP

+3.3V_ALWP

+3V5V_PWR_SRC

+3.3V_RTC_LDO

+5V_ALW2

+3.3V_ALWP

+5V_ALW

+3.3V_ALW

+5V_ALWP

+3.3V_ALW

ALW_PW RGD_3V_5V<36>

ALWON<36>

Title

Size Document Num ber Rev

Date: Sheet of

LA-A902P

0.1

+5V_ALW/3.3V_ALW

41 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

LA-A902P

0.1

+5V_ALW/3.3V_ALW

41 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

LA-A902P

0.1

+5V_ALW/3.3V_ALW

41 47Monday, March 17, 2014

Compal Electronics, Inc.

PR104

10K_0402_1%

PR104

10K_0402_1%

1 2

PJP100

PAD-OPEN 1x3m

PJP100

PAD-OPEN 1x3m

1 2

PC117

0.1U_0603_25V7K

PC117

0.1U_0603_25V7K

TPS51285BRUKR_QFN20_3X3

PU100

TPS51285BRUKR_QFN20_3X3

PU100

CS1 1

VFB1 2

VREG3 3

VFB2 4

CS2 5

EN2

PGOOD

SW2

VBST2

DRVH2

DRVL2

VIN

VREG5

VO1 14

DRVL1

DRVH1 16

VBST1 17

SW1 18

VCLK 19

EN1

PAD 21

PR110

2.2_0603_5%

PR110

2.2_0603_5%

1 2

PC110

0.1U_0603_25V7K

PC110

0.1U_0603_25V7K

1 2

PC109

0.1U_0603_25V7K

PC109

0.1U_0603_25V7K

1 2

PL100

1UH +-20% 6.6A 5X5X3 MOLDING

@EMC@PL100

1UH +-20% 6.6A 5X5X3 MOLDING

@EMC@

1 2

PC100

4.7U_0603_10V6K

PC100

4.7U_0603_10V6K

PR102

10K_0402_1%

PR102

10K_0402_1%

1 2

PR106

16.9K_0402_1%

PR106

16.9K_0402_1%

PQ101

SIS412DN-T1-GE3_POWERPAK8-5

PQ101

SIS412DN-T1-GE3_POWERPAK8-5

3 5

2200P_0402_50V7K

PC105

EMC12UnonD@

2200P_0402_50V7K

PC105

EMC12UnonD@

PC114

680P_0603_50V7K

@EMC@

PC114

680P_0603_50V7K

@EMC@

PR101

15K_0402_1%

PR101

15K_0402_1%

1 2

PQ102

SI7716ADN-T1-GE3_POWERPAK8-5

PQ102

SI7716ADN-T1-GE3_POWERPAK8-5

3 5

PC101

10U_0805_25V6K

PC101

10U_0805_25V6K

PC113

150U_D_6.3VM_R15M

PC113

150U_D_6.3VM_R15M

PJP101

PAD-OPEN 1x3m

PJP101

PAD-OPEN 1x3m

1 2

PR100

6.49K_0402_1%

PR100

6.49K_0402_1%

1 2

PQ103

SI7716ADN-T1-GE3_POWERPAK8-5

PQ103

SI7716ADN-T1-GE3_POWERPAK8-5

3 5

PR111

4.7_1206_5%

@EMC@ PR111

4.7_1206_5%

@EMC@

PR109

2.2_0603_5%

PR109

2.2_0603_5%

1 2

PR107

100K_0402_1%

PR107

100K_0402_1%

PR103

0_0402_5%

PR103

0_0402_5%

PR114

200_0402_1%

PR114

200_0402_1%

1 2

PR113

0_0402_5%

PR113

0_0402_5%

1 2

PC111

680P_0603_50V7K

@EMC@ PC111

680P_0603_50V7K

@EMC@

PR112

4.7_1206_5%

@EMC@

PR112

4.7_1206_5%

@EMC@

PJP102

PAD-OPEN 1x3m

PJP102

PAD-OPEN 1x3m

1 2

PR105

20K_0402_1%

PR105

20K_0402_1%

PQ100

SIS412DN-T1-GE3_POWERPAK8-5

PQ100

SIS412DN-T1-GE3_POWERPAK8-5

3 5

PC118

4.7U_0603_10V6K

PC118

4.7U_0603_10V6K

PC119

1U_0603_10V6K

PC119

1U_0603_10V6K

PR108

0_0402_5%

PR108

0_0402_5%

1 2

PC115

150U_D_6.3VM_R15M

PC115

150U_D_6.3VM_R15M

PC102

10U_0805_25V6K

PC102

10U_0805_25V6K

PL101

2.2UH +-20% 7.8A 7X7X3 MOLDING

PL101

2.2UH +-20% 7.8A 7X7X3 MOLDING

1 2

PL102

3.3UH +-20% 6.3A 7X7X3 MOLDING

PL102

3.3UH +-20% 6.3A 7X7X3 MOLDING

1 2

PC105

2200P_0402_50V7K

@EMC@ PC105

2200P_0402_50V7K

@EMC@

D D

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DELL CONFIDENTIAL/PROPRIETARY

FB sense trace

when FB pull down to GND

1.35 _MEN

TDC: 6.6 A

Peak Current: 9.5 A

OCP Current: 11.4 A

Cap ESR(@20 ): 17 mohm

Choke DCR(@20 ): 7.4 mohm

TYP MAX

H/S Rds(on) : 24.0 mohm , 30.0 mohm

L/S Rds(on) : 13.5 mohm , 16.5 mohm

0.675 Volt

TDC 0.7 A

Peak Current 1.0 A

OCP Current 2.6 A

Mode S3 S5 +1.35V_MEN +V_DDR_REF +0.675V_P

S5 L L off off off

S3 L H on on off(Hi-Z)

S0 H H on on on

DH_1.35V

CS_1.35V

SW_1.35V

1.35V_B+

BOOT_1.35V_C

+VLDOIN_1.35V

VDD_1.35V

SNUB_1.35V

1.35V_B+

BOOT_1.35V

1.35V_FB

DL_1.35V

+1.35V_MEN_P

S5_1.35V

+V_DDR_REF

+0.675V_P +0.675V_DDR_VTT

+1.35V_MEM

+1.35V_MEN_P

+5V_ALW

+PWR_SRC

+0.675V_P

+1.35V_MEN_P

+V_DDR_REF

+1.35V_MEN_P

0.675V_DDR_VTT_ON<18>

SUS_ON<36,38>

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+1.35V_MEN/+0.675V_DDR_VTT

42 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+1.35V_MEN/+0.675V_DDR_VTT

42 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+1.35V_MEN/+0.675V_DDR_VTT

42 47Monday, March 17, 2014

Compal Electronics, Inc.

PR201

19.6K_0402_1%

PR201

19.6K_0402_1%

1 2

PQ200

SIS412DN-T1-GE3_POWERPAK8-5

PQ200

SIS412DN-T1-GE3_POWERPAK8-5

3 5

PR204

0_0603_5%

PR204

0_0603_5%

PU200

RT8207MZQW _W QFN20_3X3

PU200

RT8207MZQW _W QFN20_3X3

VTTSNS 2

PGOOD

VDDP

PHASE 16

BOOT 18

VTTREF 4

PGND

VTTGND 1

GND 3

VDDQ 5

TON

VDD

LGATE

UGATE 17

VTT 20

VLDOIN 19

PAD 21

PL200

1UH +-20% 11A 7X7X3 MOLDING

PL200

1UH +-20% 11A 7X7X3 MOLDING

1 2

PC209

1U_0603_10V6K

PC209

1U_0603_10V6K

PJP202

PAD-OPEN1x1m

PJP202

PAD-OPEN1x1m

1 2

PC201

10U_0805_25V6K

PC201

10U_0805_25V6K

PR200

2.2_0603_5%

PR200

2.2_0603_5%

1 2

PC211

1U_0603_10V6K

PC211

1U_0603_10V6K

PR206

768K_0402_1%

PR206

768K_0402_1%

1 2

PR209

10K_0402_1%

PR209

10K_0402_1%

PR207

0_0402_5%

PR207

0_0402_5%

1 2

PJP200

PAD-OPEN 1x2m~D

PJP200

PAD-OPEN 1x2m~D

PR210

0_0402_5%

PR210

0_0402_5%

1 2

PR202

5.1_0603_5%

PR202

5.1_0603_5%

1 2

PC203

2200P_0402_50V7K

@EMC@

PC203

2200P_0402_50V7K

@EMC@

PC207

220U_D2_2VY_R17M

PC207

220U_D2_2VY_R17M

PC214

.1U_0402_16V7K

PC214

.1U_0402_16V7K

PJP204

JUMP_1x3m

PJP204

JUMP_1x3m

122

2200P_0402_50V7K

PC203

EMC12UnonD@

2200P_0402_50V7K

PC203

EMC12UnonD@

PC205

22U_0805_6.3V6M

PC205

22U_0805_6.3V6M

PC213

100P_0402_50V8J

PC213

100P_0402_50V8J

1 2

PR203

4.7_1206_5%

@EMC@

PR203

4.7_1206_5%

@EMC@

PQ201

SI7716ADN-T1-GE3_POWERPAK8-5

PQ201

SI7716ADN-T1-GE3_POWERPAK8-5

3 5

PJP201

PAD-OPEN1x1m

PJP201

PAD-OPEN1x1m

1 2

PJP203

JUMP_1x3m

PJP203

JUMP_1x3m

122

PC208

680P_0603_50V7K

@EMC@

PC208

680P_0603_50V7K

@EMC@

PC200

10U_0805_25V6K

PC200

10U_0805_25V6K

PC215

.1U_0402_16V7K

PC215

.1U_0402_16V7K

PC212

0.033U_0402_16V7K

PC212

0.033U_0402_16V7K

PC204

0.22U_0603_16V7K

PC204

0.22U_0603_16V7K

PR205

8.06K_0402_1%

PR205

8.06K_0402_1%

1 2

D D

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DELL CONFIDENTIAL/PROPRIETARY

+1.05V_MEN

TDC: 5.7 A

Peak Current: 8.1 A

OCP Current: 9.7 A fix by IC

Choke DCR(@20 ): 14.0 mohm

FB_+V1.05SP

SNB_1.05V

+V1.05SP_B+

BST_+V1.05SP_CBST_+V1.05SP

SW_+V1.05SP

ILMT_1.05V

1.05V_MP_PWROK

+PWR_SRC

+3.3V_ALW

+1.05V_MP

+3.3V_ALW

+1.05V_MP +1.05V_M

1.05V_M_PWRGD

<15>

EN_+V1.05SP <9,36>

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+1.05V_M

43 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+1.05V_M

43 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+1.05V_M

43 47Monday, March 17, 2014

Compal Electronics, Inc.

PR313

0_0402_5%

PR313

0_0402_5%

1 2

PJP300

PAD-OPEN 1x2m~D

PJP300

PAD-OPEN 1x2m~D

PR312

0_0603_5%

PR312

0_0603_5%

1 2

PC305

47U_0805_6.3V6M

PC305

47U_0805_6.3V6M

PC303

10U_0805_25V6K

PC303

10U_0805_25V6K

PR305

4.7_1206_5%

@EMC@

PR305

4.7_1206_5%

@EMC@

1 2

PC302

0.1U_0603_25V7K

PC302

0.1U_0603_25V7K

1 2

PU300

SY8208DQNC_QFN10_3X3

PU300

SY8208DQNC_QFN10_3X3

BYP 7

ILMT

LX 10

FB 4

LDO 5

GND

EN 1

BS 6PL301

0.68UH +-20% 7.9A 5X5X3 MOLDING

PL301

0.68UH +-20% 7.9A 5X5X3 MOLDING

1 2

PR309

1K_0402_5%

PR309

1K_0402_5%

PJP302

PAD-OPEN 1x2m~D

PJP302

PAD-OPEN 1x2m~D

PR308

0_0402_5%

PR308

0_0402_5%

PR310

10K_0402_1%

PR310

10K_0402_1%

2200P_0402_50V7K

PC300

EMC12UnonD@

2200P_0402_50V7K

PC300

EMC12UnonD@

PC309

4.7U_0603_6.3V6K

PC309

4.7U_0603_6.3V6K

PR307

7.5K_0402_1%

PR307

7.5K_0402_1%

PC304

330P_0402_50V7K

PC304

330P_0402_50V7K

PC300

2200P_0402_50V7K

@EMC@

PC300

2200P_0402_50V7K

@EMC@

PR303

1M_0402_1%

PR303

1M_0402_1%

PC310

4.7U_0603_6.3V6K

PC310

4.7U_0603_6.3V6K

PR306

0_0402_5%

PR306

0_0402_5%

PR315

100K_0402_1%

PR315

100K_0402_1%

1 2

PC306

47U_0805_6.3V6M

PC306

47U_0805_6.3V6M

PC307

22U_0805_6.3VAM

PC307

22U_0805_6.3VAM

PC308

22U_0805_6.3VAM

PC308

22U_0805_6.3VAM

PC301

680P_0603_50V7K

@EMC@

PC301

680P_0603_50V7K

@EMC@

1 2

D D

C C

B B

A A

+1.5V_RUN

TDC: 0.47 A

Peak Current: 0.67 A

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DELL CONFIDENTIAL/PROPRIETARY

+1.5V_VIN

1.5VSP

+3.3V_RUN

+1.5V_RUN

+5V_ALW

+3.3V_RUN

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+1.5VSP

44 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+1.5VSP

44 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+1.5VSP

44 47Monday, March 17, 2014

Compal Electronics, Inc.

PC400

1U_0402_6.3V6K

PC400

1U_0402_6.3V6K

PC401

4.7U_0805_6.3V6K

PC401

4.7U_0805_6.3V6K

PU400

APL5930KAI-TRG_SO8

PU400

APL5930KAI-TRG_SO8

GND

VOUT 4

POK

VCNTL 6

VIN 5

VOUT 3

FB 2

VIN 9

PC404

22U_0805_6.3V6M

PC404

22U_0805_6.3V6M

PR401

47K_0402_5%

PR401

47K_0402_5%

PJP401

PAD-OPEN1x1m

PJP401

PAD-OPEN1x1m

1 2

PR403

10K_0402_1%

PR403

10K_0402_1%

PC403

0.01U_0402_25V7K

PC403

0.01U_0402_25V7K

PJP400

PAD-OPEN1x1m

PJP400

PAD-OPEN1x1m

PC402

.1U_0402_16V7K

@EMC@

PC402

.1U_0402_16V7K

@EMC@

PR400

100K_0402_5%

PR400

100K_0402_5%

1 2

PR402

8.66K_0402_1%

PR402

8.66K_0402_1%

D D

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DELL CONFIDENTIAL/PROPRIETARY

TI recommend 1nF

from processor

CPU 15W

TDC 10 A

Peak Current 32 A

OCP Current 38.4 A

DC Load line -2.0 mV/A

Choke DCR: 0.66m +-7% ohm

Icc_Dyn_VID1 27 A

PH500 B value: 4250k 1%

PH501 B value: 3370k 1%

CORE_SW_CSP

O-USR

PWM1

CORE_SNUB

CSP1

CSN1

CSP1

CSN1

CORE_BOOT_C

IMON

OCP-I

+VCC_PWR_SRC

VFB

VREF

SLEWA

GFB

B-RAMP

VIDALERT_N

VIDSCLK

GFB

VFB

PWM1

SKIP#

F-IMAX

VIDSOUT

VREF

+VCC_PWR_SRC

CORE_SW

CORE_BOOT_R

CORE_BOOT

VR_HOT#

SKIP#

SKIP#1

+VCC_PWR_SRC

OCP-I

+VCC_CORE

+5V_RUN

+3.3V_RUN

+5V_ALW

+1.05V_VCCST

+3.3V_RUN

+PWR_SRC

VIDALERT_N<15>

VSSSENSE<17>

VCCSENSE<15>

H_PROCHOT#<9,36,46>

H_VR_READY <15>

H_VR_EN <15>

VIDSCLK<15>

VIDSOUT<15>

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+VCC_CORE

45 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+VCC_CORE

45 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

+VCC_CORE

45 47Monday, March 17, 2014

Compal Electronics, Inc.

PR522

4.7_1206_5%

@EMC@

PR522

4.7_1206_5%

@EMC@

2200P_0402_50V7K

PC520

EMC12UnonD@

2200P_0402_50V7K

PC520

EMC12UnonD@

PR527

54.9_0402_1%

PR527

54.9_0402_1%

PR505

10K_0402_5%

PR505

10K_0402_5%

PC517

10U_0805_25V6K

PC517

10U_0805_25V6K

PR510

39K_0402_5%~N

PR510

39K_0402_5%~N

PC513

0.068U_0402_16V7K

PC513

0.068U_0402_16V7K

PR531

0_0402_5%

PR531

0_0402_5%

1 2

PH501

10K +-1% 0402 B25/50 3370K

PH501

10K +-1% 0402 B25/50 3370K

PU501

CSD97374CQ4M_SON8_3P5X4P5

PU501

CSD97374CQ4M_SON8_3P5X4P5

PGND1 3

VDD 2

SKIP# 1

VSW 4

PWM

VIN

BOOT

BOOT_R

PGND2

PR501

316K_0402_1%

PR501

316K_0402_1%

PR508

100K_0402_1%

PR508

100K_0402_1%

PC515

10U_0805_25V6K

PC515

10U_0805_25V6K

PR520

0_0402_5%

PR520

0_0402_5%

1 2

PR506

39K_0402_1%

PR506

39K_0402_1%

4.7_1206_5%

PR522

EMC12UnonD@

4.7_1206_5%

PR522

EMC12UnonD@

PL501

FBMA-L11-453215800LMA90T_2P

@EMC@

PL501

FBMA-L11-453215800LMA90T_2P

@EMC@

1 2

PR539

0_0402_5%

PR539

0_0402_5%

1 2

PR524

2M_0402_1%

PR524

2M_0402_1%

1 2

PR509

20K_0402_1%

PR509

20K_0402_1%

PR526

10_0603_1%

PR526

10_0603_1%

1 2 PC509

1U_0603_10V7K

PC509

1U_0603_10V7K

PC519

100U_D_20VM_R55M

PC519

100U_D_20VM_R55M

PC518

10U_0805_25V6K

PC518

10U_0805_25V6K

PR518

2M_0402_1%

PR518

2M_0402_1%

PR517

2.2_0603_5%

PR517

2.2_0603_5%

1 2

PC503

1000P_0402_50V7K

PC503

1000P_0402_50V7K

1 2

PU500

TPS51624RSM QFN 32P VCORE IC

PU500

TPS51624RSM QFN 32P VCORE IC

SLEWA 15

VBAT 16

THERM 14

GFB

PU3

COMP

VCLK

V5A

DROP

ALERT#

VFB

N/C

GND

PGOOD 3

VR_HOT#

VREF

VDIO 1

VDD 2

N/C 4

PWM2 5

PWM1 6

SKIP# 7

VR_ON 8

IMON 13

OCP-I 12

B-RAMP 11

F-IMAX 10

O-USR 9

CSP2

CSP1

CSN2

19 CSN1

PC505

1U_0603_10V6K

PC505

1U_0603_10V6K

PR521

4.22K_0402_1%

PR521

4.22K_0402_1%

1 2

PR511

10K_0402_5%

PR511

10K_0402_5%

1 2

PC507

0.33U_0603_10V7K

PC507

0.33U_0603_10V7K

PR523

10K_0402_5%

PR523

10K_0402_5%

1 2

PC520

2200P_0402_50V7K

@EMC@

PC520

2200P_0402_50V7K

@EMC@

PC506

100P_0402_50V8J

PC506

100P_0402_50V8J

1 2

PC514

47P_0402_50V8J

PC514

47P_0402_50V8J

PR525

27K_0402_1%

PR525

27K_0402_1%

PR502

75_0402_1%

PR502

75_0402_1%

PC501

.1U_0402_16V7K

PC501

.1U_0402_16V7K

PR529

110_0402_1%

PR529

110_0402_1%

PR534

0_0402_5%

PR534

0_0402_5%

PR507

150K_0402_1%

PR507

150K_0402_1%

PC516

10U_0805_25V6K

PC516

10U_0805_25V6K

PJP500

PAD-OPEN 4x4m

PJP500

PAD-OPEN 4x4m

1 2

PR536

0_0402_5%

PR536

0_0402_5%

1 2

PC510

1U_0603_10V7K

PC510

1U_0603_10V7K

PR503

681K_0402_1%

PR503

681K_0402_1%

PR514

20K_0402_1%

PR514

20K_0402_1%

PR515

3.01K_0402_1%

PR515

3.01K_0402_1%

PR535

4.75K_0402_1%

PR535

4.75K_0402_1%

1 2

PC502

0.068U_0402_16V7K

PC502

0.068U_0402_16V7K

PR513

75_0402_1%

PR513

75_0402_1%

1 2

PR519

1_0603_5%

PR519

1_0603_5%

1 2

PC500

4700P_0603_50V7K

PC500

4700P_0603_50V7K

PC508

680P_0603_50V7K

@EMC@

PC508

680P_0603_50V7K

@EMC@

PH500

100K 1% 0402 B25/50 4250K

PH500

100K 1% 0402 B25/50 4250K

PL500

0.15UH_ETQP4LR15AFM_29A_20%

PL500

0.15UH_ETQP4LR15AFM_29A_20%

PR516

1.91K_0402_1%

PR516

1.91K_0402_1%

1 2

PR528

75_0402_1%

PR528

75_0402_1%

PC504

0.1U_0402_25V6

PC504

0.1U_0402_25V6

1 2

680P_0603_50V7K

PC508

EMC12UnonD@

680P_0603_50V7K

PC508

EMC12UnonD@

PR532

0_0402_5%

PR532

0_0402_5%

1 2

PR504

36.5K_0402_1%

PR504

36.5K_0402_1%

PC512

1500P_0402_50V7K

PC512

1500P_0402_50V7K

1 2

PC511

0.1U_0402_25V6

PC511

0.1U_0402_25V6

PR500

75_0402_1%

PR500

75_0402_1%

PR512

2.15K_0402_1%

PR512

2.15K_0402_1%

1 2

1 1

2 2

3 3

4 4

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DELL CONFIDENTIAL/PROPRIETARY

Near PL701

CHARGER_SMBCLK

CHARGER_SMBDAT

pull up 10K in HW side (R827 R828)

Maximum charging current is 7.2A

CHG_SW

CHG_LGATE

CHG_UGATE

BQ24770_REGN

CHG_BTS_CCHG_BTS

+PWR_SRC

CHG_SNUB

BATDRV#

+DCIN

BQ24770_REGN

BATDRV#

CSSN_1

CSSP_1

+DC_IN_SS

BQ24770_REGN

+PWR_SRC_AC CHAGER_SRC

+VCHGR

GNDA_CHG

+SDC_IN

GNDA_CHG

+DC_IN

+PWR_SRC

+VCHGR

+DC_IN

+PBATT

+DC_IN

+PBATT

GNDA_CHG

I_SYS<36>

ACAV_IN<36,46>

CHARGER_SMBDAT<36>

CHARGER_SMBCLK<36>

H_PROCHOT#<9,36,45,46>

I_BATT<36>

I_ADP<36>

AC_DIS <36>

PBAT_PRES#<36,40>

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

Charger

46 47Monday, Marc h 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

Charger

46 47Monday, Marc h 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

Charger

46 47Monday, Marc h 17, 2014

Compal Electronics, Inc.

2200P_0402_50V7K

PC713

EMC12UnonD@

2200P_0402_50V7K

PC713

EMC12UnonD@

PR708

10_1206_5%

PR708

10_1206_5%

PQ708B

DCX124EK-7-F_SC74R-6

@PQ708B

DCX124EK-7-F_SC74R-6

4 3

PR711

49.9K_0402_1%

PR711

49.9K_0402_1%

PR728 0_0402_5%PR728 0_0402_5%

1 2

PR723

10_0603_1%

PR723

10_0603_1%

1 2

PR737

4.7_0402_1%

PR737

4.7_0402_1%

PC719

100P_0402_50V8J

PC719

100P_0402_50V8J

1 2

PJP701

PAD-OPEN1x1m

PJP701

PAD-OPEN1x1m

1 2

PR703

100_0402_1%

PR703

100_0402_1%

1 2

PC725

10U_0805_25V6K

@PC725

10U_0805_25V6K

PR704

0_0402_5%

PR704

0_0402_5%

1 2

PC704

10U_0805_25V6K

PC704

10U_0805_25V6K

PC708

22U_0805_25V6M

PC708

22U_0805_25V6M

PR717 0_0402_5%PR717 0_0402_5%

1 2

PR731

4.02K_0402_1%

PR731

4.02K_0402_1%

PC716

22U_0805_25V6M

PC716

22U_0805_25V6M

PR705

0_0402_5%

PR705

0_0402_5%

1 2

AON6970_DFN5X6D-8-7

PQ704

AON6970_DFN5X6D-8-7

PQ704

5G1 1

D1 2

D2/S1

PR726

4.7_1206_5%

@EMC@

PR726

4.7_1206_5%

@EMC@

1 2

PR715

154K_0402_1%

PR715

154K_0402_1%

PC722

0.1U_0603_25V7K

@EMC@PC722

0.1U_0603_25V7K

@EMC@

PC723

10U_0805_25V6K

PC723

10U_0805_25V6K

PC727

0.1U_0402_25V6

PC727

0.1U_0402_25V6

1 2

PR714 0_0402_5%

1 2

PR799

10K_0402_1%

PR799

10K_0402_1%

1 2

PQ709

SIS496EDNT-T1-GE3 1N POWERPAK1212-8

PQ709

SIS496EDNT-T1-GE3 1N POWERPAK1212-8

PR718 0_0402_5%PR718 0_0402_5%

1 2

PL701

2.2UH +-20% 12A 10X10X4 MOLDING

PL701

2.2UH +-20% 12A 10X10X4 MOLDING

PC701

1U_0603_25V6K

PC701

1U_0603_25V6K

1 2

PD703

PDS5100H-13_POW ERDI5-3

PD703

PDS5100H-13_POW ERDI5-3

PC709

1U_0805_25V6K

PC709

1U_0805_25V6K

PC726

0.1U_0402_25V6

PC726

0.1U_0402_25V6

1 2

PR709

1M_0402_1%

PR709

1M_0402_1%

PR725

1K_0402_1%

PR725

1K_0402_1%

4.7_1206_5%

PR726

EMC12UnonD@

4.7_1206_5%

PR726

EMC12UnonD@

PR721

0.01_1206_1%

PR721

0.01_1206_1%

1000P_0603_50V7K

PC721

EMC12UnonD@

1000P_0603_50V7K

PC721

EMC12UnonD@

PT2

@PAD~D

PT2

@PAD~D

PC718

100P_0402_50V8J

PC718

100P_0402_50V8J

1 2

PR710

294K_0402_1%

PR710

294K_0402_1%

1 2

PQ711

DMN65D8LW -7_SOT323-3

PQ711

DMN65D8LW -7_SOT323-3

PC705

10U_0805_25V6K

PC705

10U_0805_25V6K

PC703

0.1U_0402_25V6

PC703

0.1U_0402_25V6

1 2

PC724

10U_0805_25V6K

PC724

10U_0805_25V6K

PC710

1U_0603_10V6K

PC710

1U_0603_10V6K

1 2

PD705

SDMK0340L-7-F_SOD323-2~D

PD705

SDMK0340L-7-F_SOD323-2~D

PQ708A

DCX124EK-7-F_SC74R-6

@PQ708A

DCX124EK-7-F_SC74R-6

PC731

0.022U_0603_50V7K

PC731

0.022U_0603_50V7K

PR788

20K_0402_1%

PR788

20K_0402_1%

1 2

PC706

22U_0805_25V6M

PC706

22U_0805_25V6M

PR720 0_0402_5%PR720 0_0402_5%

1 2

PC711

0.1U_0402_25V6

PC711

0.1U_0402_25V6

PR713

100K_0402_1%

PR713

100K_0402_1%

PR712

2.2_0603_5%

PR712

2.2_0603_5%

1 2

PR729

154K_0402_1%

@PR729

154K_0402_1%

PC713

2200P_0402_50V7K

@EMC@ PC713

2200P_0402_50V7K

@EMC@

PU700

BQ24777RUYR WQFN 28P CHARGER

PU700

BQ24777RUYR WQFN 28P CHARGER

HIDRV 26

SRP 20

PHASE 27

/BATDRV 18

SDA

IDCHG

ACDRV 4

VCC

CMSRC

ACDET

SCL

ACOK

IADP

BTST 25

BAT 17

CMPIN

REGN 24

GND 22

ACP 2

SRN 19

NC 21

LODRV 23

PMON

/PROCHOT

ACN 1

CMPOUT

/BATPRES

CELL

PWPD

PC730

0.1U_0402_25V6

PC730

0.1U_0402_25V6

PC721

1000P_0603_50V7K

@EMC@PC721

1000P_0603_50V7K

@EMC@

PC715

22U_0805_25V6M

PC715

22U_0805_25V6M

PC728

0.1U_0402_25V6

PC728

0.1U_0402_25V6

1 2

PR722

4.02K_0402_1%

PR722

4.02K_0402_1%

1 2

PT1

@PAD~D

PT1

@PAD~D

PC729

1U_0603_25V6K

PC729

1U_0603_25V6K

1 2

PC717

22U_0805_25V6M

PC717

22U_0805_25V6M

PQ701

SI4835DDY-T1-E3_SO8

PQ701

SI4835DDY-T1-E3_SO8

3 6

PR716 0_0402_5%PR716 0_0402_5%

1 2

PC707

22U_0805_25V6M

@PC707

22U_0805_25V6M

PC712

0.047U_0603_25V7K~D

PC712

0.047U_0603_25V7K~D

PQ710

SI7716ADN-T1-GE3_POWERPAK8-5

PQ710

SI7716ADN-T1-GE3_POWERPAK8-5

3 5

PL700

1UH_PCMB042T-1R0MS_4.5A_20%

EMC@

PL700

1UH_PCMB042T-1R0MS_4.5A_20%

EMC@

PC702

0.1U_0402_25V6

PC702

0.1U_0402_25V6

1 2

PR701

0.01_1206_1%

PR701

0.01_1206_1%

PC714

22U_0805_25V6M

PC714

22U_0805_25V6M

PJP700

PAD-OPEN 1x2m~D

PJP700

PAD-OPEN 1x2m~D

PD704

SDMK0340L-7-F_SOD323-2~D

PD704

SDMK0340L-7-F_SOD323-2~D

PR730

4.02K_0402_1%

PR730

4.02K_0402_1%

D D

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DELL CONFIDENTIAL/PROPRIETARY

Based on _RF Cheng. Hill



(11257) for PT 20131107

962

+VCC_CORE

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

PROCESSOR DECOUPLING

47 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

PROCESSOR DECOUPLING

47 47Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

PROCESSOR DECOUPLING

47 47Monday, March 17, 2014

Compal Electronics, Inc.

PC966

220U 2.5V Y D2 ESR9M H1.9 SX

PC966

220U 2.5V Y D2 ESR9M H1.9 SX

2200P_0402_50V7K

PC300

EMC14UnonD@

2200P_0402_50V7K

PC300

EMC14UnonD@

680P_0603_50V7K

PC721

EMC14UnonD@

680P_0603_50V7K

PC721

EMC14UnonD@

PC916

2.2U_0805_10V6K

PC916

2.2U_0805_10V6K

PC917

22U_0805_6.3V6M

PC917

22U_0805_6.3V6M

PC913

22U_0805_6.3V6M

PC913

22U_0805_6.3V6M

680P_0603_50V7K

PC508

EMC14UnonD@

680P_0603_50V7K

PC508

EMC14UnonD@

0.1U_0402_25V6

PC106

0.1U_0402_25V6

PC106

4.7_1206_5%

PR522

EMC14UnonD@

4.7_1206_5%

PR522

EMC14UnonD@

2200P_0402_50V7K

PC105

EMC14UnonD@

2200P_0402_50V7K

PC105

EMC14UnonD@

2200P_0402_50V7K

PC520

EMC14UnonD@

2200P_0402_50V7K

PC520

EMC14UnonD@

0.1U_0402_25V6

PC521

0.1U_0402_25V6

PC521

PC915

2.2U_0805_10V6K

PC915

2.2U_0805_10V6K

PC901

22U_0805_6.3V6M

PC901

22U_0805_6.3V6M

PC903

22U_0805_6.3V6M

PC903

22U_0805_6.3V6M

0.1U_0402_25V6

PC732

0.1U_0402_25V6

PC732

2200P_0402_50V7K

PC203

EMC14UnonD@

2200P_0402_50V7K

PC203

EMC14UnonD@

2200P_0402_50V7K

PC713

EMC14UnonD@

2200P_0402_50V7K

PC713

EMC14UnonD@

PC900

22U_0805_6.3V6M

PC900

22U_0805_6.3V6M

PC902

22U_0805_6.3V6M

PC902

22U_0805_6.3V6M

0.1U_0402_25V6

PC206@

0.1U_0402_25V6

PC206@

PC904

22U_0805_6.3V6M

PC904

22U_0805_6.3V6M

0.1U_0402_25V6

PC311

0.1U_0402_25V6

PC311

4.7_1206_5%

PR726

EMC14UnonD@

4.7_1206_5%

PR726

EMC14UnonD@

PC914

22U_0805_6.3V6M

PC914

22U_0805_6.3V6M

D D

C C

B B

A A

Version Change List ( P. I. R. List )

Item Issue DescriptionDate Request

Owner Solution Description Rev.Page# Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

X011

2 X01

3 X01

X01

5 X01

47 VCC_CORE 10/8 Compal

Remove PC923, PC924, PC925, PC926, PC927, PC928, PC929, PC930, PC931,

PC940, PC941, PC943, PC946, PC947, PC948

Add PC966

To prevent acoustic noise issue

42 1.35V_MEN 10/8 RICHTEK To prevent IC damage Add PR204

46 Charger 10/8 Compal Fine tune divider voltage Change PR715, PR729 to 154k

41,43,44 +1.05V_M

+1.5V_RUN

+3V/+5V

10/22 Compal To improve the ability of anti-noise

45 VCC_CORE 10/31 Compal Fine tune IMON

Change PR307 to 7.5k

Change PR310, PR102, PR104, PR403 to 10k

Change PR100 to 6.49k

Change PR101 to 15k

Change PR402 to 8.66k

Add PR518, PR524, PR525

X01

Pop PR522,PC508, PR726, PC721, PC713, PL501, PC520ALL ALL 10/31 Compal RF request

X01

Has the same behavior with dock circuit Add PQ71146 Charger 12/05 Compal

To add 2nd source Remove PQ702 Add PQ709, PQ71046 Charger 12/05

Charger 12/05 Compal

Compal

To reduce leakage current Remove PD701 Add PD704, PD70546 X01

10 Charger 3/03 Compal46 To set OVP level Remove PR729 X02

11 Charger 3/03 Compal46 To set IC function Remove PC720 Add PR788, PR799 X02

12 DCIN 3/03 Compal40 For ME change request Change PBATT1 X02

13 DCIN 3/03 Compal40 For EMC change request Add PD5 PC20 PC21 PC22 Remove PC11 X02

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

PWR P.I.R (1/1)

48 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

PWR P.I.R (1/1)

48 48Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A902P

0.1

PWR P.I.R (1/1)

48 48Monday, March 17, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

TitlePage# Rev.Solution Description

Request

Owner

Date Issue DescriptionItem

Version Change List ( P. I. R. List )

HW 2013/10/81 COMPAL 0.2(X01)

0.2(X01)

6 Follow intel reference circuit. Add CC100, RC300 on CPU pin AC4, net name is PM_TEST_RST

Dell drop POA function.

Dell drop POA function. remove POA_WAKE# off page symbol

remove POA_ON/OFF#,make UE2.B62 to be NC pin

Change JUSH1 from 26 pin to 20 pin, pin define follow E5

2013/10/9 COMPAL24 HW correct HDMI schematic error. swap HDMI LANE0 & LANE2 BUS

0.2(X01)

COMPAL2013/10/9HW22

Follow EMC suggestion

Change LI1,LI2,LI3,LI4,LI5,LI6,LI7,LI8,LI9,LV3,LV6,LV10,LV12,LV27

From SM070003K00 (S COM FI_ CHILISIN CMMI21T-900Y-N)

To SM070003Y00 (S COM FI_ MURATA DLW21HN900HQ2L)

0.2(X01)

COMPAL2013/10/9HW23

reserved for S3 within 2s , system shutdown

issue debug. add RC26, reserved RC27.

0.2(X01)

COMPAL2013/10/9HW9

board ID change. RE79 change to 130KCOMPAL2013/10/9HW36

0.2(X01)

COMPALHW

0.2(X01)

COMPAL

2013/10/8

10 2013/10/14 COMPAL follow intel latest design guide. pop RE56 and change from 8.2K to 10K , it's RESET_OUT# pull down

resistor

0.2(X01)

2013/10/9

HW COMPAL RF requirement. add CC14, CC15 and move CC12, CC13 to behind the resistor (RC72)7 2013/10/16 0.2(X01)

HW COMPAL

change all ESD diode CPN

change DI2, DI3, DI5, DV4 from SCA00001100(S ZEN ROW PJDLC05C 3P C/A

SOT23) to SC600001600(S DIO ROW AZC199-02S.R7G C/C SOT23 ESD)

change DI1,DI6,DI4 from SC300002800(S DIO(BR) TVWDF1004AD0 DFN ESD)

to SC300002C00(S DIO(BR) L05ESDL5V0NA-4 SLP2510P8 ESD)

change DA1,DA2,DA3,DA6,DA7 from SCA00001L00(S ZEN ROW L30ESDL5V0C3-2

C/A SOT23 ESD) to SCA00002900(S ZEN ROW L03ESDL5V0CC3-2 C/A SOT-23

ESD)

2013/10/1720,23,31,32 follow ESD recommend list.12

0.2(X01)power doesn't split VPRO & NPRO BOM. add RZ41, RZ42, reserve it for VPRO & NVPRO option.2013/10/17 COMPALHW3813

0.2(X01)SSI design will cause LED behavior error. QL1 Pin2,5 & QL2 Pin2 change from MASK_BASE_LEDS# to SYS_LED_MASK#2013/10/17 COMPALHW3914

SATA ciruit issue Swap mSATA P & N

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.3

EE P.I.R (1/3)

60 70Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.3

EE P.I.R (1/3)

60 70Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.3

EE P.I.R (1/3)

60 70Monday, March 17, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

TitlePage# Rev.Solution Description

Request

Owner

Date Issue DescriptionItem

Version Change List ( P. I. R. List )

To solve Line-on HDD dirty shut down issue.

follow Dell requirement.

UZ8 Pin2 change from +3.3V_ALW to 3.3V_RUN

Add back SUS_ON, change control pin from SUS_ON to SIO_SLP_S4#

1. UZ8.3 from SIO_SLP_S4# to SUS_ON

2. UE2.B23 → SUS_ON_EC , RPE10.2 → SUS_ON

3. add RE282, RE281, RE280, RE279

4. UE2.B9 → RUN_ON_EC

0.2(X01)

COMPAL

2013/10/17

28, 36, 38

HW COMPAL 0.2(X01)2013/10/2412

debug usage. add RC301COMPAL 0.2(X01)2013/10/246 HW

reserve it to prevent PCH_PLTRST# floating

when power on add RC304, 100K pull down, on PCH_PLTRST#_EC 0.2(X01)9 HW 2013/10/28 COMPAL

it's designed for E5 Goliad, E6 GMLK doesn't

need. remove RZ1COMPAL 0.2(X01)HW 2013/10/2923

HW 2013/10/29 COMPAL 0.2(X01)30

2013/10/29 COMPAL To solve backdrive issue. Change TPM_PIRQ# pull up ( RC247) to +3.3V_RUN from +3.3V_ALW_PCH 0.2(X01)12 HW

6, 7, 22,

28 follow xtal vender suggest 2013/10/23 COMPAL

1 CC1 &CC2 change from 18PF to 3PF

2 CC8 & CC11 change from 18PF to 15PF

3 CL13 & CL14 change from 33PF to 27PF

4 RV81 change from 0 ohm to 2.2K & CV113 change to 18PF

HW 0.2(X01)

0.2(X01)add PJP36, depop QZ6, QZ10, RZ16, RZ5, CZ25, CZ38Dell doesn't support MODPHY.COMPAL2013/10/30HW30

2013/11/2 0.2(X01)7

2013/11/2

SMBUS Pull High Add RN3&RN4 pull high to +3.3V_RUN for DDR_XDP_WAN_SMBDAT/SMBCLKHW COMPAL

COMPAL 0.2(X01)HW EMC request. Add RA42, RA43.21

add CA12, CA13

change DA1, DA2, DA3, DA4 from GNDA to GND

follow vender suggestion. It's for 15KV

ESD fail issue. 0.2(X01)COMPAL2013/11/05HW21

GPIO 14 is sus power well, it has risk to

cause back drive. 0.2(X01)move TPM_PIRQ# from PCH_GPIO14 to PCH_GPIO17, add T21 on PCH_GPIO14COMPAL2013/11/05HW1228

0.3(X01)HW21 COMPAL2013/12/1739

0.3(X01)22 COMPALHW 2013/12/1740

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.3

EE P.I.R (2/3)

61 70Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.3

EE P.I.R (2/3)

61 70Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A972P

0.3

EE P.I.R (2/3)

61 70Monday, March 17, 2014

Compal Electronics, Inc.

D D

C C

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

TitlePage# Rev.Solution Description

Request

Owner

Date Issue DescriptionItem

Version Change List ( P. I. R. List )

0.3(X01)22 COMPALHW

Base on Pre-PT RSMRST EA result22 COMPALHW 0.3(X01)1.POP RE88,UZ6,RE51

2. remove QZ12,RZ48,RZ49,RZ50

2013/12/17

COMPALHW 2013/12/17 0.3(X01)

Intel recommendCOMPAL2013/12/27HW32 0.3(X01)Change RC33, RC34 from 1k to 499 ohm7

Title

Size Document Number Rev

Date: Sheet of

LA-A971P

0.3

EE P.I.R (3/3)

62 70Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A971P

0.3

EE P.I.R (3/3)

62 70Monday, March 17, 2014

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

LA-A971P

0.3

EE P.I.R (3/3)

62 70Monday, March 17, 2014

Compal Electronics, Inc.

www.s-manuals.com

Compal LA A972P Schematics. Www.s Manuals.com. R0.3 Schematics

Navigation menu

Versions of this User Manual:

Views

Navigation