CP2102 Data Sheet
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CP2102 SINGLE-CHIP USB TO UART BRIDGE Single-Chip USB to UART Data Transfer - Integrated USB transceiver; no external resistors required - Integrated clock; no external crystal required - Integrated 1024-Byte EEPROM for vendor ID, product ID, serial number, power descriptor, release number, and product description strings - On-chip power-on reset circuit - On-chip voltage regulator: 3.3 V output - 100% pin and software compatible with CP2101 USB Function Controller - USB Specification 2.0 compliant; full-speed (12 Mbps) - USB suspend states supported via SUSPEND pins Asynchronous Serial Data BUS (UART) - All handshaking and modem interface signals - Data formats supported: - Virtual COM Port Device Drivers - Works with Existing COM Port PC Applications - Royalty-Free Distribution License - Windows Vista/XP/Server 2003/2000 - Mac OS-X/OS-9 - Linux USBXpress™ Direct Driver Support - Royalty-Free Distribution License - Windows Vista/XP/Server 2003/2000 - Windows CE Example Applications - Upgrade of RS-232 legacy devices to USB - Cellular phone USB interface cable - PDA USB interface cable - USB to RS-232 serial adapter Supply Voltage - Self-powered: 3.0 to 3.6 V - USB bus powered: 4.0 to 5.25 V - Data bits: 5, 6, 7, and 8 - Stop bits: 1, 1.5, and 2 - Parity: odd, even, mark, space, no parity Baud rates: 300 bps to 1 Mbits 576 Byte receive buffer; 640 byte transmit buffer Hardware or X-On/X-Off handshaking supported Event character support Line break transmission Package - Pb-free 28-pin QFN (5x5 mm) Ordering Part Number - CP2102-GM Temperature Range: –40 to +85 °C CP2102 7 REGIN IN VDD Voltage Regulator RST OUT SUSPEND 6 3 8 USB CONNECTOR VBUS DD+ GND 3.3 V VDD SUSPEND GND RI 48 MHz Oscillator VBUS DCD DTR DSR 1 2 3 5 4 4 5 6 D1 D2 D3 UART DD+ USB Transceiver USB Function Controller 640B 576B 1024B TX RX EEPROM Buffer Buffer TXD RXD RTS CTS 9 12 11 (to external circuitry for USB suspend states) 2 1 28 27 External RS-232 transceiver or UART circuitry 26 25 24 23 Figure 1. Example System Diagram Rev. 1.4 8/10 Copyright © 2010 by Silicon Laboratories CP2102 CP2102 2 Rev. 1.4 CP2102 TABLE OF CONTENTS Section Page 1. System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 3. Pinout and Package Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4. USB Function Controller and Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5. Asynchronous Serial Data Bus (UART) Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6. Internal EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7. CP2102 Device Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 7.1. Virtual COM Port Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.2. USBXpress Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.3. Driver Customization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 7.4. Driver Certification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 8. Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 9. Relevant Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Rev. 1.4 3 CP2102 1. System Overview The CP2102 is a highly-integrated USB-to-UART Bridge Controller providing a simple solution for updating RS-232 designs to USB using a minimum of components and PCB space. The CP2102 includes a USB 2.0 full-speed function controller, USB transceiver, oscillator, EEPROM, and asynchronous serial data bus (UART) with full modem control signals in a compact 5 x 5 mm QFN-28 package. No other external USB components are required. The on-chip EEPROM may be used to customize the USB Vendor ID, Product ID, Product Description String, Power Descriptor, Device Release Number, and Device Serial Number as desired for OEM applications. The EEPROM is programmed on-board via the USB, allowing the programming step to be easily integrated into the product manufacturing and testing process. Royalty-free Virtual COM Port (VCP) device drivers provided by Silicon Laboratories allow a CP2102-based product to appear as a COM port to PC applications. The CP2102 UART interface implements all RS-232 signals, including control and handshaking signals, so existing system firmware does not need to be modified. In many existing RS-232 designs, all that is required to update the design from RS-232 to USB is to replace the RS-232 level-translator with the CP2102. Direct access driver support is available through the Silicon Laboratories USBXpress driver set. An evaluation kit for the CP2102 (Part Number: CP2102EK) is available. It includes a CP2102-based USB-toUART/RS-232 evaluation board, a complete set of VCP device drivers, USB and RS-232 cables, and full documentation. Contact a Silicon Labs sales representatives or go to www.silabs.com to order the CP2102 Evaluation Kit. 4 Rev. 1.4 CP2102 2. Electrical Specifications Table 1. Absolute Maximum Ratings Parameter Conditions Min Typ Max Units Ambient Temperature under Bias –55 — 125 °C Storage Temperature –65 — 150 °C Voltage on any I/O Pin or RST with respect to GND –0.3 — 5.8 V Voltage on VDD with respect to GND –0.3 — 4.2 V Maximum Total Current through VDD and GND — — 500 mA Maximum Output Current sunk by RST or any I/O pin — — 100 mA Note: Stresses above those listed may cause permanent device damage. This is a stress rating only, and functional operation of the devices at or exceeding the conditions in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 2. Global DC Electrical Characteristics VDD = 3.0 to 3.6 V, –40 to +85 °C unless otherwise specified Parameter Conditions Supply Voltage Min Typ Max Units 3.0 3.3 3.6 V Supply Current1 Normal Operation; VREG Enabled — 20 26 mA Supply Current1 Suspended: VREG Enabled — 80 100 µA — 200 228 µA –40 — +85 °C Supply Current - USB Pull-up2 Specified Operating Temperature Range Notes: 1. USB Pull-up Current should be added for total supply current. 2. The USB Pull-up supply current values are calculated values based on USB specifications. Table 3. UART and Suspend I/O DC Electrical Characteristics VDD = 3.0 to 3.6 V, –40 to +85 °C unless otherwise specified Parameters Conditions Min Typ Max UNITS IOH = –3 mA IOH = –10 µA IOH = –10 mA VDD – 0.7 VDD – 0.1 — — — VDD – 0.8 — — — V IOL = 8.5 mA IOL = 10 µA IOL = 25 mA — — — — — 1.0 0.6 0.1 — V Input High Voltage 2.0 — — V Input Low Voltage — — 0.8 V Input Leakage Current — 25 50 µA Output High Voltage Output Low Voltage Rev. 1.4 5 CP2102 Table 4. Reset Electrical Characteristics –40 to +85 °C unless otherwise specified Min Typ Max Units RST Input High Voltage 0.7 x VDD — — V RST Input Low Voltage — — 0.25 x VDD V Minimum RST Low Time to Generate a System Reset 15 — — µs Parameter 6 Conditions Rev. 1.4 CP2102 3. Pinout and Package Definitions Table 5. CP2102 Pin Definitions Name Pin # Type VDD 6 Power In Description 3.0–3.6 V Power Supply Voltage Input. Power Out 3.3 V Voltage Regulator Output. See "8. Voltage Regulator" on page 14. GND 3 RST 9 D I/O Device Reset. Open-drain output of internal POR or VDD monitor. An external source can initiate a system reset by driving this pin low for at least 15 µs. REGIN 7 Power In 5 V Regulator Input. This pin is the input to the on-chip voltage regulator. VBUS 8 D In VBUS Sense Input. This pin should be connected to the VBUS signal of a USB network. A 5 V signal on this pin indicates a USB network connection. D+ 4 D I/O USB D+ D– 5 D I/O USB D– TXD 26 D Out Asynchronous data output (UART Transmit) RXD 25 D In Asynchronous data input (UART Receive) CTS 23* D In Clear To Send control input (active low) RTS 24* D Out Ready to Send control output (active low) DSR 27* D in Data Set Ready control input (active low) DTR 28* D Out DCD 1* D In Data Carrier Detect control input (active low) RI 2* D In Ring Indicator control input (active low) SUSPEND 12* D Out This pin is driven high when the CP2102 enters the USB suspend state. SUSPEND 11* D Out This pin is driven low when the CP2102 enters the USB suspend state. NC 10, 13–22 Ground Data Terminal Ready control output (active low) These pins should be left unconnected or tied to VDD. *Note: Pins can be left unconnected when not used. Rev. 1.4 7 DTR DSR TXD RXD RTS CTS NC 28 27 26 25 24 23 22 CP2102 DCD 1 21 NC RI 2 20 NC GND 3 19 NC D+ 4 18 NC D- 5 17 NC VDD 6 16 NC REGIN 7 15 NC CP2102 Top View 8 9 10 11 12 13 14 VBUS RST NC SUSPEND SUSPEND NC NC GND Figure 2. QFN-28 Pinout Diagram (Top View) 8 Rev. 1.4 CP2102 Figure 3. QFN-28 Package Drawing Table 6. QFN-28 Package Dimensions Dimension Min Typ Max Dimension Min Typ Max A A1 A3 b D D2 e E E2 0.80 0.00 0.90 0.02 0.25 REF 0.23 5.00 BSC. 3.15 0.50 BSC. 5.00 BSC. 3.15 1.00 0.05 L L1 aaa bbb ddd eee Z Y 0.35 0.00 0.55 — 0.15 0.10 0.05 0.08 0.44 0.18 0.65 0.15 0.18 2.90 2.90 0.30 3.35 3.35 Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to the JEDEC Solid State Outline MO-220, variation VHHD except for custom features D2, E2, Z, Y, and L, which are toleranced per supplier designation. 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. Rev. 1.4 9 CP2102 Figure 4. QFN-28 Recommended PCB Land Pattern Table 7. QFN-28 PCB Land Pattern Dimensions Dimension C1 C2 E X1 Min Max Dimension Min Max X2 Y1 Y2 3.20 0.85 3.20 3.30 0.95 3.30 4.80 4.80 0.50 0.20 0.30 Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification. 3. This Land Pattern Design is based on the IPC-7351 guidelines. Solder Mask Design 4. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to be 60 µm minimum, all the way around the pad. Stencil Design 5. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release. 6. The stencil thickness should be 0.125 mm (5 mils). 7. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pins. 8. A 3x3 array of 0.90 mm openings on a 1.1 mm pitch should be used for the center pad to assure the proper paste volume (67% Paste Coverage). Card Assembly 9. A No-Clean, Type-3 solder paste is recommended. 10. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. 10 Rev. 1.4 CP2102 4. USB Function Controller and Transceiver The Universal Serial Bus function controller in the CP2102 is a USB 2.0 compliant full-speed device with integrated transceiver and on-chip matching and pull-up resistors. The USB function controller manages all data transfers between the USB and the UART as well as command requests generated by the USB host controller and commands for controlling the function of the UART. The USB Suspend and Resume signals are supported for power management of both the CP2102 device as well as external circuitry. The CP2102 will enter Suspend mode when Suspend signaling is detected on the bus. On entering Suspend mode, the CP2102 asserts the SUSPEND and SUSPEND signals. SUSPEND and SUSPEND are also asserted after a CP2102 reset until device configuration during USB Enumeration is complete. The CP2102 exits the Suspend mode when any of the following occur: (1) Resume signaling is detected or generated, (2) a USB Reset signal is detected, or (3) a device reset occurs. On exit of Suspend mode, the SUSPEND and SUSPEND signals are de-asserted. Both SUSPEND and SUSPEND temporarily float high during a CP2102 reset. If this behavior is undesirable, a strong pulldown (10 k) can be used to ensure SUSPEND remains low during reset. See Figure 5 for other recommended options. VDD CP2102 7 R1 4.7 k RST SUSPEND 6 C4 4.7 F C2 0.1 F 3 Option 1 REGIN C1 1 F VDD SUSPEND GND RI 9 (to external circuitry for USB suspend states) 12 11 R2 10 k 2 Option 4 Option 2 8 USB CONNECTOR VBUS DD+ GND DCD VBUS DTR DSR 1 2 5 3 4 4 5 6 D1 D2 D- TXD D+ RXD RTS D3 Option 3 Option Option Option Option Option 1: 2: 3: 3: 4: CTS 1 28 27 External RS-232 transceiver or UART circuitry 26 25 24 23 A 4.7 k pull-up resistor can be added to increase noise immunity. A 4.7 µF capacitor can be added if powering other devices from the on-chip regulator. Avalanche transient voltage suppression diodes should be added for ESD protection . Use Littlefuse p/n SP0503BAHT or equivalent. 10 k resistor to ground to hold SUSPEND low on initial power on or device reset. Figure 5. Typical Connection Diagram Rev. 1.4 11 CP2102 5. Asynchronous Serial Data Bus (UART) Interface The CP2102 UART interface consists of the TX (transmit) and RX (receive) data signals as well as the RTS, CTS, DSR, DTR, DCD, and RI control signals. The UART supports RTS/CTS, DSR/DTR, and X-On/X-Off handshaking. The UART is programmable to support a variety of data formats and baud rates. If the Virtual COM Port drivers are used, the data format and baud rate are set during COM port configuration on the PC. If the USBXpress drivers are used, the CP2102 is configured through the USBXpress API. The data formats and baud rates available are listed in Table 8. Table 8. Data Formats and Baud Rates Data Bits 5, 6, 7, and 8 Stop Bits 1, 1.51, and 2 Parity Type 2 Baud Rates None, Even, Odd, Mark, Space 300, 600, 1200, 1800, 2400, 4000, 4800, 7200, 9600, 14400, 16000, 19200, 28800, 38400, 51200, 56000, 57600, 64000, 76800, 115200, 128000, 153600, 230400, 250000, 256000, 460800, 500000, 576000, 9216003 Notes: 1. 5-bit only. 2. Additional baud rates are supported. See “AN205”. 3. 7 or 8 data bits only. 6. Internal EEPROM The CP2102 includes an internal EEPROM that may be used to customize the USB Vendor ID (VID), Product ID (PID), Product Description String, Power Descriptor, Device Release Number and Device Serial Number as desired for OEM applications. If the EEPROM is not programmed with OEM data, the default configuration data shown in Table 9 is used. While customization of the USB configuration data is optional, it is recommended to customize the VID/PID combination. A unique VID/PID combination will prevent the driver from conflicting with any other USB driver. A vendor ID can be obtained from http://www.usb.org/ or Silicon Laboratories can provide a free PID for the OEM product that can be used with the Silicon Laboratories VID. It is also recommended to customize the serial number if the OEM application is one in which it is possible for multiple CP2102-based devices to be connected to the same PC. The internal EEPROM is programmed via the USB. This allows the OEM's USB configuration data and serial number to be written to the CP2102 on-board during the manufacturing and testing process. A stand-alone utility for programming the internal EEPROM is available from Silicon Laboratories. A library of routines provided in the form of a Windows® DLL is also available. This library can be used to integrate the EEPROM programming step into custom software used by the OEM to streamline testing and serial number management during manufacturing. The EEPROM has a typical endurance of 100,000 write cycles with a data retention of 100 years. USB descriptors can be locked to prevent future modification. 12 Rev. 1.4 CP2102 8. Voltage Regulator The CP2102 includes an on-chip 5 to 3 V voltage regulator. This allows the CP2102 to be configured as either a USB bus-powered device or a USB self-powered device. These configurations are shown in Figure 6 and Figure 7. When enabled, the 3 V voltage regulator output appears on the VDD pin and can be used to power external 3 V devices. See Table 10 for the voltage regulator electrical characteristics. Alternatively, if 3 V power is supplied to the VDD pin, the CP2102 can function as a USB self-powered device with the voltage regulator disabled. For this configuration, it is recommended that the REGIN input be tied to the 3 V net to disable the voltage regulator. This configuration is shown in Figure 8. The USB max power and power attributes descriptor must match the device power usage and configuration. See application note “AN144: CP210x Customization Guide” for information on how to customize USB descriptors for the CP2102. Note: It is recommended that additional decoupling capacitance (e.g., 0.1 µF in parallel with 1.0 µF) be provided on the REGIN input. Table 10. Voltage Regulator Electrical Specifications –40 to +85 °C unless otherwise specified. Parameter Conditions Min Typ Max Units 4.0 — 5.25 V 3.0 3.3 3.6 V VBUS Detection Input Threshold 1.0 1.8 2.9 V Bias Current — 90 — µA Input Voltage Range Output Current = 1 to 100 mA* Output Voltage *Note: The maximum regulator supply current is 100 mA. CP2102 VBUS VBUS Sense From VBUS REGIN 5 V In Voltage Regulator (REG0) 3 V Out To 3 V Power Net VDD Device Power Net Figure 6. Configuration 1: USB Bus-Powered 14 Rev. 1.4 CP2102 CP2102 From VBUS VBUS VBUS Sense From 5 V Power Net REGIN 5 V In Voltage Regulator (REG0) 3 V Out To 3V Power Net VDD Device Power Net Figure 7. Configuration 2: USB Self-Powered CP2102 From VBUS VBUS VBUS Sense REGIN 5 V In Voltage Regulator (REG0) 3 V Out From 3 V Power Net VDD Device Power Net Figure 8. Configuration 3: USB Self-Powered, Regulator Bypassed Rev. 1.4 15 CP2102 DOCUMENT CHANGE LIST Revision 1.0 to Revision 1.1 Updated “Linux 2.40” bullet on page 1. Changed MLP to QFN throughout. Revision 1.1 to Revision 1.2 Added additional supported operating systems on page 1. Changed VDD conditions of Tables 2 and 3 from a minimum of 2.7 to 3.0 V. Updated typical and max Supply Current number in Table 2. Removed tantalum requirement in Figure 5. Consolidated Sections 8 and 9. Added Section "9. Relevant Application Notes" on page 16. Revision 1.2 to Revision 1.3 Updated Figure 1 on page 1. Updated Figure 5 on page 11. Updated Maximum VBUS Detection Input Threshold in Table 10 on page 14. Revision 1.3 to Revision 1.4 Updated Table 4 RST Input Low Voltage Updated Table 6, Note 4. Updated Table 7, Note 10. Rev. 1.4 17
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