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April 2012
©2012 Fairchild Semiconductor Corporation
FDMC8884 Rev.E3 www.fairchildsemi.com
1
FDMC8884 N-Channel Power Trench® MOSFET
FDMC8884
N-Channel Power Trench® MOSFET
30 V, 15 A, 19 mΩ
Features
Max rDS(on) = 19 mΩ at VGS = 10 V, ID = 9.0 A
Max rDS(on) = 30 mΩ at VGS = 4.5 V, ID = 7.2 A
High performance technology for extremely low rDS(on)
Termination is Lead-free and RoHS Compliant
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced Power Trench® process that has
been especially tailored to minimize the on-state resistance. This
device is well suited for Power Management and load switching
applications common in Notebook Computers and Portable
Battery Packs.
Application
High side in DC - DC Buck Converters
Notebook battery power management
Load switch in Notebook
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Ratings Units
VDS Drain to Source Voltage 30 V
VGS Gate to Source Voltage ±20 V
ID
Drain Current -Continuous (Package limited) TC = 25 °C 15
A
-Continuous (Silicon limited) TC = 25 °C 24
-Continuous TA = 25 °C (Note 1a) 9.0
-Pulsed 40
EAS Single Pulse Avalanche Energy (Note 3) 24 mJ
PDPower Dissipation TC = 25 °C 18 W
Power Dissipation TA = 25 °C (Note 1a) 2.3
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C
RθJC Thermal Resistance, Junction to Case 6.6 °C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 53
Device Marking Device Package Reel Size Tape Width Quantity
FDMC8884 FDMC8884 MLP 3.3x3.3 13 ’’ 12 mm 3000 units
Bottom
D
D
D
D
S
S
SG
Top
Pin 1
MLP 3.3x3.3
G
S
S
S
D
D
D
D
5
6
7
8
3
2
1
4
FDMC8884 N-Channel Power Trench® MOSFET
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©2012 Fairchild Semiconductor Corporation
FDMC8884 Rev.E3
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 30 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA, referenced to 25 °C 22 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1μA
TJ = 125 °C 250
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA
On Characteristics
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA1.4 1.9 2.5 V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient ID = 250 μA, referenced to 25 °C -6 mV/°C
rDS(on) Static Drain to Source On Resistance
VGS = 10 V, ID = 9.0 A 16 19
mΩVGS = 4.5 V, ID = 7.2 A 22 30
VGS = 10 V, ID = 9.0 A, TJ = 125 °C 22 30
gFS Forward Transconductance VDD = 5 V, ID = 9.0 A 24 S
Dynamic Characteristics
Ciss Input Capacitance VDS = 15 V, VGS = 0 V,
f = 1 MHz
513 685 pF
Coss Output Capacitance 110 150 pF
Crss Reverse Transfer Capacitance 76 115 pF
RgGate Resistance 1.4 2.1 Ω
Switching Characteristics
td(on) Turn-On Delay Time
VDD = 15 V, ID = 9.0 A,
VGS = 10 V, RGEN = 6 Ω
6 12 ns
trRise Time 2 10 ns
td(off) Turn-Off Delay Time 15 27 ns
tfFall Time 2 10 ns
Qg(TOT) Total Gate Charge VGS = 0 V to 10 V
VDD = 15 V
ID = 9.0 A
10 14 nC
Total Gate Charge VGS = 0 V to 4.5 V 5.0 7.0 nC
Qgs Total Gate Charge 1.8 nC
Qgd Gate to Drain “Miller” Charge 2.2 nC
Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 9.0 A (Note 2) 0.86 1.2 V
VGS = 0 V, IS = 1.6 A (Note 2) 0.76 1.2
trr Reverse Recovery Time IF = 9.0 A, di/dt = 100 A/μs 13 18 ns
Qrr Reverse Recovery Charge 3 10 nC
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. EAS of 24 mJ is based on starting TJ = 25 °C, L = 1 mH, IAS = 7 A, VDD = 30 V, VGS = 10 V. 100% test at L = 3 mH, IAS = 4 A .
a. 53 °C/W when mounted on
a 1 in2 pad of 2 oz copper
b.125 °C/W when mounted on
a minimum pad of 2 oz copper
G
DF
DS
SF
SS
G
DF
DS
SF
SS
FDMC8884 N-Channel Power Trench® MOSFET
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©2012 Fairchild Semiconductor Corporation
FDMC8884 Rev.E3
Typical Characteristics TJ = 25 °C unless otherwise noted
Figure 1.
0123
0
10
20
30
40
VGS = 6 V
VGS = 3.5 V
VGS = 4.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 4 V
VGS = 3 V
VGS = 10 V
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
On-Region Characteristics Figure 2.
0 10203040
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VGS = 6 V
VGS = 3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 4 V
VGS = 4.5 V
VGS = 3 V
VGS = 10 V
N ormali z e d O n - R e s i s t a n c e
vs Drain Current and Gate Voltage
Fi g ur e 3. N or ma l iz e d O n - R es i st a n c e
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
ID = 9.0 A
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
TJ, JUNCTION TEMPERATURE (oC)
vs Junction Temperature Figure 4.
246810
10
20
30
40
50
60
70
80
TJ = 125 oC
ID = 9.0 A
TJ = 25 oC
VGS, GATE TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
O n -R es is t an ce v s G at e to
Source Voltage
Figure 5. Transfer Characteristics
12345
0
10
20
30
40
TJ = 150 oC
VDS = 5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
ID, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6.
0.00.20.40.60.81.01.21.4
0.001
0.01
0.1
1
10
100
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
IS, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
S ou r ce to D ra in D io d e
Forward Voltage vs Source Current
FDMC8884 N-Channel Power Trench® MOSFET
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©2012 Fairchild Semiconductor Corporation
FDMC8884 Rev.E3
Figure 7.
036912
0
2
4
6
8
10
ID = 9.0 A
VDD = 20 V
VDD = 10 V
VGS, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = 15V
Gate Charge Characteristics Figure 8.
0.1 1 10
100
1000
50
f = 1 MHz
VGS = 0 V
CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
30
C a p a c i t a n c e v s D r a i n
to Source Voltage
Figure 9.
0.01 0.1 1 10
1
10
20
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVALANCHE (ms)
IAS, AVALANCHE CURRENT (A)
U n c l a m p e d I n d u c t i v e
Switching Capability Figure 10.
25 50 75 100 125 150
0
10
20
30
VGS = 4.5 V
Limited by Package
RθJC = 6.6 oC/W
VGS = 10 V
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
Ma x im um Co nti nu ou s D r ai n
C u r r e n t v s Ca s e T e m p e r a t ur e
Figure 11.
0.01 0.1 1 10 100
0.01
0.1
1
10
100
10 s
1 s
DC
100 ms
10 ms
1 ms
100 us
ID, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
TA = 25 oC
Forward Bias Safe
Operating Area Figure 12.
10-4 10-3 10-2 10-1 110
100 1000
1
10
100
1000
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
0.5
VGS = 10V
P(PK), PEAK TRANSIENT POWER (W)
t, PULSE WIDTH (s)
S i ng l e P u l s e M axi m um
Power Dissipation
Typical Characteristics TJ = 25 °C unless otherwise noted
FDMC8884 N-Channel Power Trench® MOSFET
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©2012 Fairchild Semiconductor Corporation
FDMC8884 Rev.E3
Figure 13. Transient Thermal Response Curve
10-4 10-3 10-2 10-1 110
100 1000
0.001
0.01
0.1
1
SINGLE PULSE
RθJA = 125 oC/W
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE, ZθJA
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0.2
0.1
0.05
0.02
0.01
2
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
Typical Characteristics TJ = 25 °C unless otherwise noted
FDMC8884 N-Channel Power Trench® MOSFET
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©2012 Fairchild Semiconductor Corporation
FDMC8884 Rev.E3
Dimensional Outline and Pad Layout
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FDMC8884 N-Channel Power Trench® MOSFET
©2012 Fairchild Semiconductor Corporation
FDMC8884 Rev.E3 7
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Definition of Terms
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