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User Manual: Motherboard Foxconn 915A01 - Schematics. Free.
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5
4
3
2
1
Foxconn Precision Co. Inc.
915A01 Schematic
D
C
B
A
Page Index
01.
02.
03.
04.
05.
06.
07.
08.
09.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
Fab.B
Date: 2004/05/01
D
Index Page
Topology
Rest Map
Clock Distribution
Power Delivery Map
Power Sequence
CK410 ClockGen
VRD10.1 (SC2646, 3P)
VRD10.1 (SC1211)
DDR2 POWER
Power 1.5V/1.2V
2.5V_MCH
LGA775 -1
LGA775 -2
Grantsdale -GMCH -1
Grantsdale -GMCH -2
Grantsdale -GMCH -3
DDR2 Channel A Term.
DDR2 Channel A DIMM1, 2
DDR2 Channel B Term.
DDR2 Channel B DIMM1, 2
PCI Express x16 Gfx Slot
VGA Connector
ICH6-1
27. LAN RTL8110S
28. RT8110S/C-POWER
29. LAN Connectors
30.SATA Controller/Regulator
31. AC' 97 2.3/Azalia Codec
32. FWH
33. USB Connectors
34. Power Conn. / 3V_SB/FAN
35. Front Panel / MISC Conn.
36. PCI Express x1 Slot 1
37. PCI Express x1 Slot 2
C
38.PCI Express x1 Slot3]
39. PCI Slots 1
25. ICH6-2
40.PCI Slot 2
41.PCI Slot 3
42. Super I/O
43. HW Monitor
44. Keyboard / Mouse
45. Serial / Parallel
46. VT6307_1394
47. 1394 CON
48. TPM
49. VID Controller
50. GPIO / IRQ / IDSEL Map
51. Jumper Setting Table
26. ICH6-3
52. Modify List
B
A
FOXCONN PCEG
Title
Index Page
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
1
of
52
5
4
3
2
Prescott, Tejas
- LGA775 processor
VRD 10.1
3 Phase PWM
Socket T
CK-410 Clock
800/533 FSB
D
Intel SDVO Card
PCI Express x 16
External Graphics
Card
or
Channel A DDR2
DIMM1
DIMM2
GMCH
DDR2 533/400
Channel B DDR2
DIMM1
DIMM2
GrantsDale
USB2.0 Port 1
4 Lanes
USB2.0 Port 2
D
DDR2 533/400
PCI Express x16 Port
VGA Connector
Back Panel
C
1
PCI Express x1 Interface
PCI-E Slot 1
PCI-E Slot 2
Direct Media Interface (DMI)
USB2.0 Port 3
C
PCI-E Slot 3
USB2.0 Port 4
USB2.0 Port 5
USB2.0 Port 6
ICH6
Front Panel
USB2.0 Port 7
PCI
USB2.0 Port 8
PCI
Interface
PCI
Interface
PCI
Interface
uATX Form Factor
PCI Slot 1,2,3
LAN
REALTEK 8100C/8110S
1394
VIA VT6307
Interface
Sil3112A
Serial ATA
SATA Connector 5
SATA Connector 6
B
B
ATA100
Serial ATA
SATA Connector 1
SATA Connector 2
IDE CONN 1
Super I/O
SATA Connector 3
LPC I/F
SATA Connector 4
ITE IT8712F
AC 97 2.3/Azalia Header
Realtek ALC203/ALC650/ALC655
PS2
A
Floppy
Parallel
Keyboard / Mouse
Serial
Firmware HUB
Drive Connector
A
4Mb or 8Mb
FOXCONN PCEG
Title
TPM TCPA1.2
(HEADER)
Topology
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
2
of
52
3
2
CPU (Tejas / Prescott)
LGA775 processor
ATX
Power
1
CPURST#
4
CPU_PWRGD
5
D
D
Translation
Circuitry
PWRGD_PS
PS_ON#
PWRGD_3V
PWROK
CPURST#
GMCH
PCI Express x16
GrantsDale
RSTIN#
LRESET#
TPM
C
C
ICH_PWRGD
PCIRST#
PLTRST#
ICH6
LAN RST#
AC_RST#
1394 RST#
PWROK
FR_RST
B
PCI Slot 1
Buffer
Buffer
RST#
Front Panel
uATX Form Factor
RST#
Buffer
FWH
ATA100
IDE CONN 1
SYS_RESET#
B
SW_ON
PWRBTN#
SLP_S3#
RSMRST#
RST#
KBRST
RCIN#
Super IO
RST#
Audio
RSMRST#
Power on/off
circuit
PSIN
PWRON#
PSOUT#
A
A
FOXCONN PCEG
RSMRST circuit
Title
Reset Map
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
3
of
52
5
4
3
2
1
14.318MHz
CPU
CPU 133/200 MHz Diff Pair
MCH 133/200 MHz Diff Pair
D
PCI Express 100 MHz Diff Pair
D
DDR 4 Slots 12 Diff CLKs
PCI Express x16 Gfx
DOT 96 MHz Diff Pair
Channel A DDR2
GMCH
DIMM1
GrantsDale
DIMM2
PCI Express/DMI 100 MHz Diff Pair
Channel B DDR2
DIMM1
PCI Express/DMI 100 MHz Diff Pair
DIMM2
C
C
CK-410
USB/SIO 48 MHz
ICH 33 MHz
REF 14 MHz
24.576MHz
PCI 33 MHz
AC'97
ICH6
FWH
FWH 33 MHz
PCI Slot 1,2,3
B
AC97 Bit Clock
PCI Express 100 MHz Diff Pair
B
PCI-E SLOT1,2,3
LAN 33 MHz
LAN
32.768KHz
TPM 33 MHz
TPM
1394 33 MHz
1394
Super I/O
A
SIO 33 MHz
A
FOXCONN PCEG
SATA 100 MHz Diff Pair
Title
CLOCK Distribution
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
4
of
52
5
4
3
2
Proceessor
Super I/O
Vccp (CPU Vcore)
Voltage=0.8375~1.6V
Icc(Max)=110A
(Tejas FMB1)
VRD 10.1
Switching
Four Phase
D
3.3V
Icc(Max)=50mA
D
1.2V FSB
Vtt-tbdA
3.3SBV
Icc(Max)=50mA(S0)
ATX P/S
5VSB
5V
Vdd (Core)
3.3V
Ivdd(Max)=560mA
-12V
Vdd (Core)
1.8V
Ivdd(Max)=4A(per channel)
5VDUAL
Icc(Max)=
4.345A(S0,S1)
22mA(S3)
Vtt (Core)
0.9V
Ivterm(Max)=600mA
(per channel)
PS2
+5V DUAL=345mA(S0, S1)
+5V DUAL=2mA(S3)
FWH
Vcore (Core Logic)
1.5V
Icc(Max)=9.6A(Integrated)
Icc(Max)=7.5A(Discrete)
3.3V=107mA(S0, S1)
*1.5V
PCIexpress(X16)=1A
*1.5V
PCIexpress(X1)=0.06A
+12V=4.4A
PCI Express
X16 slot (1)
2.5V DAC
regulator
V_2p5_DAC
100mA
Single Phase Switch
5V to 2.6V
Ivdd(Max)=11.5A
Ivdd(Max)=500mA(S3)
LDO
2.6V to 1.3V
Ivterm(Max)=1.8A
Vdd (Core)
1.8V
Ivdd(Max)=4A(per channel)
Vtt (Core)
0.9V
Ivterm(Max)=600mA
(per channel)
*2.5V DAC=0.07A
2.5V HV=tbdA
+3.3V=3A
PCI
ICH6
V_1p5_core
1.5V
Switching=12A
LDO
12V to 5V
12V
Icc(Max)=0.5A
3.3VSB
Icc(Max)=0.375A(wake)
Icc(Max)=0.02A(no wake)
3.3V VccSus
Icc(Max)=330mA
5VRef=tbduA
PCI LAN (REALTEK 8100C/8110S)
3.3VSB/3.3V_SYS
P(Max)=2W(Gb),
P(Max)=.622W(100Mb),
P(Max)=.512W(10Mb)
5VrefSus=tbduA
LDO
5VSB to 3.3SB
Icc(Max)=1.5A
B
3.3V
Icc(Max)=7.6A
3.3V=180mA
Vcc
3.3V
Icc(Max)=20mA
-12V
5V
Icc(Max)=5A
1.5V Core=1.88A
*1.5V PCI Express=270mA
*1.5V DMI=290mA
1.5V SATA=430mA
AC'97 2.3 Codec
Slot 1
-12V
Icc(Max)=0.1A
1.2V VCC_CPU-tbdmA
B
C
3.3VSB
Icc(Max)=0.375A(wake)
Icc(Max)=0.02A(no wake)
*1.5V SDVO=tbdA
*1.5V DMI=0.25A
DDR Channel B
Vcc
5V
Icc(Max)=48mA
+5V DUAL=4A(S0, S1)
+5V DUAL=20mA(S3)
2.6V DDR1 I/O=5.5A(S0,S1)
2.6V DDR1 I/O=250mA(S3)
DDR2 Channel A
C
USB 8 Ports
FSB_Vtt
1.2V FSB Vtt
Icc(Max)=1.2A
Linear 3.3V
to 1.2V
5A
3.3V
CK 410
3.3SBV
Icc(Max)=38mA(S3)
Grantsdale GMCH
12V
1
RTC=5uA
PCI 1394 (VIAVT6307)
3.3V_SYS
Icc(Max)=0.375A(wake)
Icc(Max)=0.02A(no wake)
A
A
RTC
Battery
*Power derived through filter
FOXCONN PCEG
Title
Power Delivery Map
Size
C
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Sheet
Tuesday, May 18, 2004
1
5
of
52
5
4
S5->S0
D
3
+12V_SYS
+3D3V_SYS
+3D3V_SYS
+2D6V_STR
+2D6V_STR
VTT_VR
VTT_VR
Vcc
Vcc
Vcc_PWRGD
Vcc_PWRGD
VRM_OUTEN
C
VRM_OUTEN
VIDPWRGD
PS_ONJ
VIDPWRGD
PS_ONJ
C
S0->S3
S3->S0
+12V_SYS
+5V_DUAL
+5V_SYS
B
+3D3V_DUAL
VTT_DDR
VTT_DDR
1ms to 10ms
D
+5V_DUAL
+5V_SYS
+5V_SYS
+3D3V_DUAL
1
S0->S5
+12V_SYS
+5V_DUAL
2
+3D3V_SYS
+3D3V_DUAL
+2D6V_STR
+2D6V_STR
+12V_SYS
+5V_DUAL
+5V_SYS
+3D3V_DUAL
+3D3V_SYS
+2D6V_STR
+2D6V_STR
VTT_DDR
B
VTT_DDR
VTT_VR
VTT_VR
Vcc
Vcc
1ms to 10ms
Vcc_PWRGD
Vcc_PWRGD
VRM_OUTEN
VRM_OUTEN
VIDPWRGD
PS_ONJ
VIDPWRGD
PS_ONJ
A
A
FOXCONN PCEG
Title
Power Sequence
Size
C
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Sheet
Tuesday, May 18, 2004
1
6
of
52
*
B
*
R165
49.9
+/-1%
R0603
*
R167
49.9
+/-1%
R0603
*
R178
49.9
+/-1%
R0603
*
R174
49.9
+/-1%
R0603
*
R184
49.9
+/-1%
R0603
R180
49.9
+/-1%
R0603
*
CK_48M_SIO
CK_48M_ICH
CK_33M_PCI1
CK_33M_LAN
CK_33M_1394
CK_33M_SIO
CK_33M_ICH
CK_33M_FWH
CK_33M_TPM
CK_14M_AUDIO
CK_14M_ICH
BC164
10pF
C0603
Dummy
*
BC165
10pF
C0603
Dummy
*
BC152
10pF
C0603
Dummy
*
BC158
10pF
C0603
Dummy
*
BC169
10pF
C0603
Dummy
*
50V,NPO,+/-5%
*
50V,NPO,+/-5%
BC161
10pF
C0603
Dummy
50V,NPO,+/-5%
*
50V,NPO,+/-5%
BC154
10pF
C0603
Dummy
50V,NPO,+/-5%
*
50V,NPO,+/-5%
BC157
10pF
C0603
Dummy
50V,NPO,+/-5%
*
50V,NPO,+/-5%
BC175
10pF
C0603
Dummy
50V,NPO,+/-5%
50V,NPO,+/-5%
50V,NPO,+/-5%
*
1
*
*
BC171 XTAL-14.318MHz
10pF
50V, NPO, +/-5%
C0603
FS2-CV115-24
R133
FS2-CV115
R686
*
FS1-CV115-24 R164
BC162
10pF
C0603
Dummy
FS1-CV115
R687
FS0
R171
*
*
C0603
0.1uF
25V, X7R, +/-10%
C0603
0.1uF
25V, X7R, +/-10%
C0603
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
22
22
+/-5% R0603
+/-5% R0603
33
33
R162
R169
33
33
R151
R158
33
33
BC166
10pF
50V, NPO, +/-5%
C0603
R1609
49.9
+/-1%
R0603
CK_200M_P_GMCH 15
CK_200M_N_GMCH 15
42
R170
49.9 +/-1%
R163
49.9 +/-1%
R159
49.9 +/-1%
CK_PE_100M_P_1PORT3 38
R152
49.9 +/-1%
CK_PE_100M_N_1PORT3 38
+/-5%
+/-5%
+/-5%
+/-5%
CK_PE_100M_P_1PORT2 37
CK_PE_100M_N_1PORT2 37
CK_PE_100M_P_ICH 24
CK_PE_100M_N_ICH 24
*
*
R153
49.9
+/-1%
R0603
C
CK_14M_AUDIO 31
CK_14M_ICH 24
SMB_CLK_MAIN 19,21,44
SMB_DATA_MAIN 19,21,44
CK_200M_P_CPU 13
CK_200M_N_CPU 13
475
TRUBO2J
CK_33M_PCI3 41
CK_33M_LAN 27
CK_33M_FWH 32
****
CLK_IREF R172 +/-1%
FS1-CV115
FS2-CV115
R435
0
PE_100M_P3 R1547
PE_100M_N3 R1697
R0603 +/-5%
3D3V_CLK_CPU_SRC
PE_100M_P2
R182 33
PE_100M_N2
R186 33
PE_100M_P_ICH R191 33
PE_100M_N_ICH R195 33
+/-5% R0603
+/-5% R0603
+/-5% R0603
*
R196
49.9
+/-1%
R0603
R192
49.9
+/-1%
R0603
*
*
R187
49.9
+/-1%
R183 R0603
49.9
+/-1%
R0603
B
2.2K +/-5%
FSBSEL2
C B A FSB Frequency
2.2K +/-5%
Dummy
2.2K
R0603
2.2K +/-5%
Dummy
2.2K +/-5%
R0603
0 0 0 266MHz
0 0 1 133MHz(533)
FSBSEL1
0 1 0 200MHz(800)
FSBSEL0
A
FSB_VTT
R213
R214
R131
470 +/-5%
470 +/-5%
470 +/-5%
FSBSEL0
14,15
FSBSEL1
14,15
FSBSEL2
14,15
FOXCONN PCEG
Title
CK410 ClockGen
Size
Date:
4
2
C0603
* ** **
200M_P_CPU
+/-5%
200M_N_CPU
+/-5%
3D3V_CLK_CPU_SRC
200M_P_GMCH
+/-5%
200M_N_GMCH
+/-5%
1 CLK_OSC1
*
BSEL TABLE
EMI CAPS.
5
0.1uF
C0603
25V, X7R, +/-10%
C0603
0.1uF
0.1uF
25V, X7R, +/-10%
0.1uF
C0603
C0603
25V, X7R, +/-10%
CLK_OSC1
CLK_OSC2
3D3V_CLK_PCI
*
BC170
10pF
C0603
Dummy
X3
CLK_OSC2 2
**
*
R142
R134
33
33
33
IDTCV115-2
SM Bus Address :1101-0010
A
*
2
R189
49.9
+/-1%
R0603
R12401
R121
R126
33M_LAN
33M_FWH
FS0
3D3V_CLK_PCI_SB
FS2-CV115-24
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
*
**
*
*
*
R197
49.9
+/-1%
R0603
PCI_1
PCI_0
FS_A/(REF1/PCI5)
VDD_suspend
FS_C/REF0
VSS_REF
XTAL_IN
XTAL_OUT
VDD_REF
SCL
SDA
CPU_0
CPU_0#
VDD_CPU
CPU_1
CPU_1#
VSS_CPU
IREF
RESET#
Turbo2
CPU_2_ITP/ SRC_7
CPU_2_ITP#/ SRC_7#
VDD_SRC
SRC_6
SRC_6#
SRC_5
SRC_5#
VSS_SRC
****
25 CK_SATA_100M_P_ICH
25 CK_SATA_100M_N_ICH
** ****
22 CK_PE_100M_P_16PORT
22 CK_PE_100M_N_16PORT
36 CK_PE_100M_P_1PORT1
36 CK_PE_100M_N_1PORT1
15 CK_PE_100M_P_GMCH
15 CK_PE_100M_N_GMCH
25V, X7R, +/-10%
1
*
***
** **
**
* *
15 CK_96M_P_GMCH
15 CK_96M_N_GMCH
VDD_PCI
VSS_PCI
PCI2
PCI3
PCI4/Turbo1
VSS_PCI
VDD_PCI
PCIF_0/ITP_EN
PCIF
PCIF2
VDD_48
FS_B/48MHZ
VSS_48
DOTT_96MHz
DOTC_96MHz
(VTT_PwrGd/PD#)
SRC_1
SRC_1#
VDDSRC
VSS
SRC_2
SRC_2#
SRC_3
SRC_3#
VSS_GND
SATA
SATA#
VDD_SRC
*
high frequency decoupling caps. placed
close to power pins
U12
3D3V_CLK_PCI
*
5
** * *
*
C
E
C
E
+/-5%
*
BC195
+/-5%
33
* *
* *
BC188
33
* *
BC182
24 CK_48M_ICH
this cap. placed
close to power pin
1N4148W
10nF C0603
50V, X7R, +/-10%
1
46 CK_33M_1394
2
33M_PCI1
R124 R0603
33 +/-5%
3
39 CK_33M_PCI1
R130 R0603
33 +/-5%
4
48 CK_33M_TPM
R685
0
Dummy
5
42
TRUBO1J
6
3D3V_CLK_PCI
R1438
33 +/-5% R0603
7
30 CK_33M_Sil3112A
XDP_EN
R146 R0603
4.7K +/-5%
8
33M_SIO
R143
22
R132 R0603
33+/-5%
9
42 CK_33M_SIO
33M_ICH
+/-5%
R0603
R135 R0603
33+/-5%
10
26 CK_33M_ICH
3D3V_CLK_48
11
Change R from 43OHM to 33OHM
FS1-CV115-24
R147
22
+/-5%
12
R0603
13
96M_DOT_P
R154 R0603
33 +/-5%
14
96M_DOT_N
R161 R0603
33 +/-5%
15
CLK_VTT_PWRGDJ 16
R160
49.9 +/-1%
R208 33
10,15,24,32,34 PWRGD_3V
R1537 49.9 +/-1%
17
18
PE_100M_P_16PORT
3D3V_CLK_CPU_SRC
R166 R0603
33 +/-5%
19
PE_100M_N_16PORT
R168 R0603
33 +/-5%
20
R175 R0603
33 +/-5% PE_100M_P1
21
R179 R0603
33 +/-5% PE_100M_N1
22
R181 R0603
33 +/-5% PE_100M_P_GMCH23
R185 R0603
33 +/-5% PE_100M_N_GMCH24
25
R190 R0603
33 +/-5% SATA_100M_P_ICH26
R198 R0603
33 +/-5% SATA_100M_N_ICH27
3D3V_CLK_CPU_SRC
28
42 CK_48M_SIO
*
*
R128 R0603
BC586
2
D
3D3V_CLK_CPU_SRC
BC189
ICH_SYS_RSTJ
1
Change decoupling caps from 10nf to 0.1uf
C0603
10V, Y5V, +80%/-20%
Q28
MMBT3904
Dummy
D11
R222
10K
+/-5%
R0603
Dummy
FS1-CV115
FB29
FB L0805 300 Ohm
10uF
Dummy R0603
14,24,35,49 ICH_SYS_RSTJ
CLK_VTT_PWRGDJ
4.7K
+/-5%
Dummy
R12400R0603
40 CK_33M_PCI2
*
0 +/-5%
**
C
Q43
MMBT3904
Dummy
R580
*
BC208
0.1uF
3D3V_CLK_PCI
BC542
B
3D3V_SB
ONLY POP WHEN CV115 POPED
R204
10K
+/-5%
R0603
Dummy
R205
R0603
PWRGD_3V_ACT 15,24
BC187
0.1uF
25V, X7R, +/-10%this cap. placed
close to power pin
C0603
VDD_CPU/VDD_SRC Filter
0 +/-5% R0603 3D3V_CLK_PCI_SB
BC541
B
4
2
R23
0 +/-5% R0603 Dummy
BC168
R219
10K
+/-5%
R0603
Dummy
U31 NC7SZ08
Dummy
1
FS1-CV115
3D3V_SYS
*
R27
10V, Y5V, +80%/-20%
*
R220
220
+/-5%
R0603
Dummy
FB24
FB L0805 300 Ohm
10uF
*
PWRGD_3V
Filter
BC163
3D3V_CLK_PCI
*
3D3V_SB
*
1
BC200
C1206
*
this cap. placed
close to power pin
VCCP
VDD_48 Filter 3D3V_CLK_48
2.2
+/-5%
R0603
3
*
R119
C0603
* * *
1
*
2
25V, X7R, +/-10%
C0603
2
BC147
C1206
10V, Y5V, +80%/-20%
10uF
*
BC153
0.1uF
50V, X7R, +/-10%
BC179
C0603
10nF
10V, Y5V, +80%/-20%
BC148
C1206
10uF
25V, X7R, +/-10%
BC186
C1206
*
D
BC150
0.1uF
FB25
FB L0805 300 Ohm
3
Note :
VDD_PCI
1. When CV115, Pin 54 is FSA. When CV115-2/-4, Pin 54 is FSA/REF1.
2. When CV115, Pin 38 is FSB. When CV115-2/-4, Pin 38 is RESET output and Pin 12 is FSB/48Mhz.
3. When CV115, Pin 37 is FSC. When CV115-2/-4, Pin 37 is TURBO2 input and Pin 52 is FSC/REF0.
4. Pin 5 of CV115-2/-4 is either TURBO1 or PCI4.
5. When CV115-4, Pin 14 and Pin 15 are SRC_0 and SRC_0#.
3D3V_SYS 3D3V_CLK_PCI 3D3V_SB
** **
4
3D3V_SYS
25V, X7R, +/-10%
0.1uF
5
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
7
of
52
5
4
3
2
1
5V_SB_SYS
49
PVID5
BGOUT
OUT3
21
OUT3
5
ERROUT
OUT2
20
OUT2
6
GNDSEN
OUT1
19
OUT1
7
FB
AGND
18
8
OFFSET/MSENSE OSCREF
17
9
VCC
PGOOD
16
10
VID4
VID5
15
11
VID3
VID0
14
VID2
VID1
13
12
R397
R0603
OUT4
OUT3
9
OUT2
9
OUT1
4
5
6
9
*
CN11
5
C
3
2
BC160
0.1uF
25V, X7R, +/-10%
C0603
VIN
ATX12V_P1_2X2
9
*
+/-5%
150K
1
Dummy
L7
R3657
0
R0603
+/-5%
Pop only if 3 phase design is used
*
*
4
BC380
0.1uF
25V, X7R, +/-10%
C0603
Dummy
Choke Coil 1.2uH
EC14
EC9
EC7
EC2
1800uF
1800uF 1800uF 1800uF
CE50D100H300
16V,+/-20%
VRM_SYS
*
*
* * *
SC2646
16V, +/-20%
CE50D100H300
PVID4
OUT4
*
16V,+/-20%
CE50D100H300
49
22
16V,+/-20%
CE50D100H300
PVID3
OUT4
R0603
BC133
4.7uF
16V,Y5V,+80%/-20%
C1206
VTT_OUT_LEFT
PVID1
5V_SB_SYS
PVID2
B
PVID3
R396
PVID4
0 VTT_PWRGD
*
VTT_PWRGD 14
R0603
+/-5%
PVID5
R415
10K
+/-5%
R0603
Dummy
*
R284
*
VRM_FB R283
0 +/-5% R0603
VSS_SENSE 13
R395
B
0 +/-5% R0603
VCC_SENSE 13
*
R411
22.1K
+/-1%
R0603
*
BC374
1uF
16V, Y5V, +80%/-20%
C0603
300 VTT_PWRGD
R0603+/-5%
VTT_PWRGD 14
Q47
G
2N7002
*
R367
0 R0603 +/-5%
2.74K
R0603
+/-1%
R410
Q46
MMBT3904
SOT23_BEC
*
49
OS1
1.5K
LOAD_LINE_SELECT
15K
R0603
+/-5%
Dummy
12V_VRM
D
PVID2
3
23 VRM_SENSE
R417
10K
+/-5%
R0603
Dummy
S
49
PVID0
OUTSEN
LL_ID0
C
PVID1
OS2
R412
13
E
PVID0
49
BC372
1uF
C0603
2
*
49
10
+/-5%
24
G
Q45
2N7002
Dummy
*
R409
R0603
*
470pF
C0603
16V,Y5V,+80%/-20%
B
VRM_SYS
BC373
50V,NPO,+/-5%
12V_VRM
*
MSENSE
*
*
DUMMY
*
*
50V,NPO,+/-5%
R392
+/-1%
20K
R0603
BC365
1uF
16V,Y5V,+80%/-20%
C0603
*
*
20K
+/-1%
R0603
DUMMY
R391
BC367 +/-1%
15pF
20K
C0603 R0603
OS4
*
VTT_PWRGD
R406
OS3
BC344
1.5nF
C0603
50V,X7R,+/-10%
0 +/-5%
R0603
R385 +/-5%
*
VRM_SYS
1
R370
60.4K
+/-1% R0603
Q49
MMDT3946
Dummy
2
R0603 +/-1%
Pop only if 3 phase design is used
R3656
U24
C
+/-1% R0603
R341
25.5K
R371
20K
+/-1%
R0603
1
NONE
47K/NTC
*
*
50V,X7R,+/-10%
RT2
*
4
BC353
C0603
150pF
D
R416
10K
+/-5%
R0603
Dummy
*
3
*
BC375
0.1uF
25V, X7R, +/-10%
C0603
Dummy
LOAD_LINE_SELECT
R353
150K
+/-1%
R0603
1
1
+/-1% +/-1% BC346
R0603 R0603 0.22uF
16V, Y5V, +80%/-20%
C0603
R414
2.7K
R0603
+/-5%
Dummy
R0603
Dummy
D
*
BC350
8.2nF
C0603
1
1
+/-1% +/-1%
R0603 R0603
Dummy
+/-1%
R0603
S
*
R352
150K
+/-1%
R0603
* R155* R1557
* R149* R270
+/-1%
R0603
*
MSENSE
*
*
BC349
8.2nF
C0603
50V,X7R,+/-10%
Dummy
*
R373
150K
+/-1%
R0603
+/-1%
R0603
*
*
BC358
8.2nF
C0603
50V,X7R,+/-10%
*
*
R3733
150K
+/-1%
R0603
* R2739
10K
* R273
10K
+/-1%
*
*
*
50V,X7R,+/-10%
R354
30
+/-1%
R0603
R365
3.6K
+/-1%
BC3582
R0603
8.2nF
Dummy C0603
Dummy
R122
24.9K
+/-1%
R0603
* R148
10K
50V, NPO, +/-5%
*
*
R109
24.9K
+/-1%
R0603
* R156
10K
*
VRM_SYS
*
R292
24.9K
+/-1%
R0603
VCCP
T
*
R2921
24.9K
+/-1%
R0603
Dummy
AUX3
PN4
*
*
AUX2
PN1
*
AUX1
PN2
*
D
AUX4
PN3
BC381
0.1uF
25V, X7R, +/-10%
C0603
Dummy
A
A
FOXCONN PCEG
Title
Voltage Regulator Down 10.1
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
8
of
52
5
VIN
4
5V_SB_SYS
2
1
VIN
D
S
BC204
4.7uF
16V,Y5V,+80%/-20%
C1206
PN1
S
Q39
0
G
R0805
+/-5%
47nF
C0603
25V, X7R, +/-10%
Dummy
NTD110N02R-1
*
*
EC45
EC31
560uF
4V,+/-20%
CE35D80H200
*
D
S
*
D
NTD110N02R-1
S
*
NTD110N02R-1
Dummy
S
EC27
560uF
4V,+/-20%
CE35D80H200
C2
560uF
4V,+/-20%
CE35D80H200
*
BC146
2.2nF
16V,NPO,+/-5%
C0603
NTD110N02R-1
*
*
8
Dummy
D
D
*
S
*
C1
*
S
*
IND Coil 280nH
CK127S110
+/-20%
Dummy
R114
1
+/-5%
R0603
*
EC16
1500uF
Dummy
C
560uF
4V,+/-20%
CE35D80H200
De-pop if 4 phase design is used.
--------------------------------Q37, Q29, Q39, Q9, Q11, Q15, Q12,
Q14, Q20, Q121
B
BC1342
4.7uF
16V,Y5V,+80%/-20% PN4
C1206
Dummy
P N4
*
S
Q200
G
D
0 Dummy
G
R0805
+/-5%
47nF
C0603
25V, X7R, +/-10%
Dummy
Q121 BC5526
0.1uF
C0603
NTD60N02R
25V,
X7R, +/-10%
Dummy
Dummy
D
BC1492
C0603 1nF
50V,X7R,+/-10%
Dummy
S
BC1362
2.2nF
BC593
16V,NPO,+/-5%
C0603
*
*
*
BC1382
1uF
16V,Y5V,+80%/-20%
C0805
*
BC1418
0.47uF
16V,Y5V,+80%/-20%
C0603
Dummy
10K
R0603
+/-5%
*
L304
R1143
1
+/-5%
R0603
Dummy
NTD110N02R-1
S
Q199
R99
*
IND Coil 280nH
CK127S110
+/-20%
Dummy
1211_VIN
A
D
D
S
*
+/-5%
100 R0603
Dummy
NTD110N02R-1
*
G
NTD60N02R
Dummy
R35
*
AUX4
1
DRN
R2682 Dummy
+/-5%
R0603
AUX4
R1181
*
9
BG
VREG
7
VIN
6
5
VPN
PGND
2.2
EC23
1500uF
Dummy
VIN
G
U901
SC1211
Dummy
L9
IND Coil 400nH
CK165S135
L303
+/-20%
NTD110N02R-1
*
3
2
TG
CO
BST
4
OUT4
*
Dummy
16V,Y5V,+80%/-20%
BC134
4.7uF
PN3
C1206
P N3
BC145
2.2nF
16V,NPO,+/-5%
C0603
*
*
OUT4
* *
NTD110N02R-1
Dummy
Q131
1uF
C0805
25V,Y5V,+80%/-20%
EC24
1500uF
Dummy
D
*
8
BC5525
0.1uF
C0603
NTD60N02R
25V, X7R, +/-10%
Dummy
S
*
C0603
*
BC136
2.2nF
BC592
16V,NPO,+/-5%
S
D
8
Q19
0
G
R0805
+/-5%
47nF
C0603
25V, X7R, +/-10%
Dummy
G
Q20
G
50V,X7R,+/-10%
BC1599 Dummy
2
1N4148W
Dummy
10K
R0603
+/-5%
R31
D
AUX3
*
*
BG
100 R0603
BC149
C0603 1nF
*
D88
S
S
DRN
9
BC5114
C0603 1nF
50V,X7R,+/-10%
Dummy
1
NTD60N02R
+/-5%
R0603
*
1
2
TG
VREG
*
Q14
G
Q17
R41
BC138
1uF
16V,Y5V,+80%/-20%
C0805
Q12
G
NTD60N02R
Dummy
AUX3
R118 +/-5%
7
VIN
VPN
6
5
2.2
1211_VIN
BC141
0.47uF
16V,Y5V,+80%/-20%
C0603
Dummy
D
*
3
4
CO
BST
U10
SC1211
PGND
B
R112
*
BC1854
2.2nF
16V,NPO,+/-5%
C0603
Dummy
Dummy
A
*
OUT3
OUT3
G
*
8
Q13
1uF
C0805
25V,Y5V,+80%/-20%
EC37
820uF
Dummy
*
VIN
BC139
2
1N4148W
*
*
*
IND Coil 400nH
CK165S135
+/-20%
L302
IND Coil 280nH
R111
EC28
560uF
CK127S110
1
4V,+/-20%
+/-20%
+/-5%
CE35D80H200
Dummy
R0603
6.3V,+/-20%
D8
1
VCCP
820uF/1500uF co-layout
6.3V,+/-20%
S
560uF
4V,+/-20%
CE35D80H200
6.3V,+/-20%
*
EC29
L8
*
BC5113
C0603 1nF
50V,X7R,+/-10%
Dummy
560uF
4V,+/-20%
CE35D80H200
6.3V,+/-20%
0
G
R0805
+/-5%
47nF
C0603
25V, X7R, +/-10%
Dummy
EC30
P N2
*
*
G
Q16
*
BC108
4.7uF
16V,Y5V,+80%/-20%
PN2
C1206
BC193
68pF
50V, NPO, +/-5%
C0603
*
D
D
G
Q21
D
AUX2
8
BC135
C0603 1nF
50V,X7R,+/-10%
100 R0603
R40
BC109
2.2nF
16V,NPO,+/-5% BC596
C0603
* *
Q15
*
*
BG
VREG
7
S
S
*
DRN
TG
1
2
3
4
CO
BST
AUX2
R107 +/-5%
BC5524
0.1uF
*
CE50D100H300
VIN
R30
2.2 +/-5%
R0603
9
*
Q11
NTD60N02RC0603
25V, X7R, +/-10%
10K
Dummy
Dummy
R0603
+/-5%
BC194
68pF
50V,NPO,+/-5%
C0603
CE50D100H300
VPN
G
NTD60N02R
*
CE50D100H300
6
Q10
G
NTD60N02R
VCCP
CE35D80H200
5
R106
1211_VIN
BC119
1uF
16V,Y5V,+80%/-20%
C0805
Q9
*
C
G
U8
SC1211
PGND
BC124
0.47uF
16V,Y5V,+80%/-20%
C0603
Dummy
D
*
1uF
C0805
25V,Y5V,+80%/-20%
OUT2
OUT2
560uF
4V,+/-20%
CE35D80H200
*
EC26
*
*
8
560uF
VIN
BC130
2
1N4148W
560uF
4V,+/-20%
CE35D80H200
EC47
2.2nF
16V,NPO,+/-5%
C0603
*
D6
1
D
4V,+/-20%
400nH andBC273
280nH choke co-lay
CE35D80H200
NTD110N02R-1
S
*
*
BC5112
C0603 1nF
50V,X7R,+/-10%
Dummy
560uF
4V, +/-20%
CE35D80H200
IND Coil 400nH
CK165S135
+/-20%
L301
R263
IND Coil 280nH
1
CK127S110
+/-5%
R0603 +/-20%
Dummy
*
Q40
G
NTD110N02R-1
Dummy
EC43
*
*
Q38
UNDER HEATSINK
L18
*
G
D
D
BC314
1nF C0603
50V,X7R,+/-10%
VCCP
P N1
S
8
*
100
R0603
+/-5%
R39
BC321
2.2nF
16V,NPO,+/-5% BC594
C0603
*
R29
+/-5%
R0603
D
R293
*
BC322
1uF
16V,Y5V,+80%/-20%
C0805
S
G
NTD60N02R
*
*
AUX1
9
BG
VREG
7
VIN
VPN
6
2.2
1211_VIN
BC320
0.47uF
16V,Y5V,+80%/-20%
C0603
Dummy
Q29
G
NTD60N02R
AUX1
PGND
5
R287
DRN
TG
1
U20
SC1211
BC5523
Q36
0.1uF
C0603
25V, X7R, +/-10%
NTD60N02R
Dummy Dummy
10K
R0603
+/-5%
**
Q37
S
G
*
3
2
4
CO
2
D
D
*
OUT1
OUT1
D34
B120B
2
1uF
C0805
25V,Y5V,+80%/-20%
BST
1
1
2
1N4148W
8
D33
B120B
BC311
1
R303
1
+/-5%
R0805
*
D21
*
D
*
BC5111
C0603 1nF
50V,X7R,+/-10%
Dummy
3
NTD110N02R-1
Dummy
Dummy
FOXCONN PCEG
Title
Voltage Regulator Down 10.1
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Sheet
Tuesday, May 18, 2004
1
9
of
52
*
5
4
3
2
1
*
1" from controller
4.7K +/-5%
R0603
BC525
1uF
16V,Y5V,+80%/-20%
C0805
Dummy
R5457
0
R0603
+/-5%
VDDR_IN
BC516
1uF
16V,Y5V,+80%/-20%
C0805
5V_SB_SYS
3D3V_SB
R520
*
BC598
0.5'' from Controller
*
ACPI_S3
0 +/-5% R0603
Dummy
These two resistors are
necessary. S3# and S5#
must be tied to 5Vstb to
prevent them floating.
VDDQEN
VDDQCOMP
BC524
0.1uF
C0603
Dummy
* *
25V, X7R, +/-10%
*
BC520
0.22uF
16V, Y5V, +80%/-20%
C0603
R570
30K
+/-1%
R0603
5VCC
4
5VSBY
TG
11
S3#
BG
10
S5#
SGND
18
SS/EN
17
AGND
3
LGND
2
VTTSN
NCP5201
*
R560
B
0 +/-5%
R0603
Dummy
R553
0
R0603
+/-5%
BC512
1uF
16V,Y5V,+80%/-20%
C0805
*
D
R519
14
13 DDR_PN R559
7
VDDQIN
8
FB
1
VTTO
6
VTTO1
5
Choke Coil 2.6uH
EC67
3300uF
NTD40N03R
6.3V, +/-20%
CE50D100H300
VDDQSBY
* * * *
0 +/-5%
R0603
R0603 Dummy
0
+/-5%
BC521
10nF
50V, X7R, +/-10%
C0603
*
Only pop for SC2616
BC508
0.1uF
25V, X7R, +/-10%
C0603
*
BC509
4.7uF
6.3V,X5R,+/-10%
C0805
EC63
1500uF
6.3V, +/-20%
CE35D80H200
*
*
*
1D8V_STR
BC517
4.7uF
6.3V,X5R,+/-10%
C0805
C
*
R537
470
+/-1%
R0603
R541
1.2K
+/-1%
R0603
*
*
R662
1.2K
+/-1%
R0603
Dummy
*
R663
1.2K
+/-1%
R0603
Dummy
R664
1.2K
+/-1%
R0603
Dummy
1D8V_STR
BC515
0.1uF
25V, X7R, +/-10%
C0603
BC504
0.1uF
C0603
25V, X7R, +/-10%
*
R525
62K
+/-1%
R0603
*
R536
0
R1206
+/-1%
Value should be tuned
Dummy
R538
16
+/-1%
R0603
VDDQSBY
Trace to PIN7 must be able to carry 2A
Only BC507
pop for SC2616
BC510
*
*
4.7uF
10V, Y5V, +80%/-20%
C0805
Dummy
1uF
10V, Y5V, +80%/-20%
C0603
Dummy
*
A
Place close to PIN8 of SC2616
0 +/-5%
R0603
FOXCONN PCEG
DDR1 2.6V/1.3V
Size
Date:
4
B
49 SUPERGPIO0
49 SUPERGPIO1
49 SUPERGPIO2
Title
5
D
BC514
EC64
4.7uF
2200uF
16V, Y5V, +80%/-20%6.3V, +/-20%
C1206
CE50D100H300
EC56
470uF
16V, +/-20%
CE35D80H200
VDDR_IN
1D8V_STR
R533
*
*
VTT_DDR
VDDR_IN
*
*
BC501
1uF
16V,Y5V,+80%/-20%
C0805
Only pop for NCP5201
VDDQFB
*
*
VDDQFB
Place less than
0.25" from Controller
*
EC62
100uF
16V, +/-20%
CE20D50H110
L27
Q56
Only pop for NCP5201
A
0 R0603
+/-5%
15
*
Only pop for SC2616
NTD40N03R
G
9
VDDQSBY
COMP
12
*
Q57
S
12VCC
BC513
1nF
50V,X7R,+/-10%
C0603
*
DDR_PN
U33
16
**
R568
24,42 SLP_S45J
*
THPAD
12,24,34,42 SLP_S3J
R572
10K
+/-5%
R0603
R546
Close to PIN9
of SC2616
19
*
C
*
5V_SB_SYS
EC66
100uF
BC511
16V, +/-20%
1.0uF
CE20D50H110
C0603
16V,Y5V,+80%/-20%
0 R0805
+/-5%
0.1uF
G
C0603 Dummy
25V, X7R, +/-10%
22uF
ce20d50h110
R571
10K
+/-5%
R0603
*
VDDR_IN
EC65
10V,+/-20%
*
EC61
100uF
16V, +/-20%
CE20D50H110
VDDR_IN
470uF
CE35D80H200
R522
10K
+/-5%
R0603
2 1N4148W
Dummy
1
NTD60N02R
*
EC68
16V, +/-20%
*
D29
R530
2K
+/-5%
R0603
Dummy
*
Q58
G
*
5V_SYS
1
S
R545
D
12V_SYS
2N7002
D
G
FB L1806 60 Ohm
Dummy
L4
FB L1806 60 Ohm
Dummy
S
100 +/-5%
R0603
L3
2
ACPI_S3
Q55
*
R521
+/-5%
S
7,15,24,32,34 PWRGD_3V
*
D
ACPI_S3
Dummy
*
R0603
L26
Choke Coil 1.2uH
*
*
12,24,34,42 SLP_S3J
0
D
R523
2
Only pop for SC2616
R532
10K
+/-5%
R0603
*
*
*
24,42 SLP_S45J
1
5V_SYS
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
10
of
52
5
4
3
12V_SYS
*
3D3V_SB
BC218
0.1uF
25V, X7R, +/-10%
C0603
*
12V_SYS
R200
62
+/-1%
R0603
R207
402
+/-1%
R0603
*
3D3V_SB
-
D
LM358M
SOP8JA
IPD09N03LA
R193
1K +/-5%
R0603
*
BC205
2.2uF
16V,Y5V,+80%/-20%
C0805
1.2V
E
C
*
Q7
MMBT2222A
R210
487
+/-1%
R0603
*
+
6
4
Q34
MMBT2222A
5
BC216
0.1uF
25V, X7R, +/-10%
C0603
D
U14B
Q27
7
C
G
LM358M
SOP8JA
IPD09N03LA
FSB_VTT
S
8
R229
499
+/-1%
R0603
E
*
1D5V_CORE
1K B
+/-5%
R0603
2
G
12V_SYS
B
R230
BC192
0.1uF
25V, X7R, +/-10%
C0603
Q25
1
BC212
0.1uF
25V, X7R, +/-10%
C0603
C
C
*
S
BC207
0.1uF
25V, X7R, +/-10%
C0603
+
*
*
*
*
U14A
8
121
R0603
+/-1%
LM431ACM3
3
4
*
C
D14
R
2.2V
A
BC196
22uF
C1206
10V,Y5V,+80%/-20%
*
EC25
220uF
10V, +/-20%
CE25D60H110
D
R199
2.5V
R227
1K
+/-5%
R0603
*
*
*
5V_SYS
*
1
B
*
EC73
1000uF
6.3V, +/-20%
CE35D80H200
Dummy
BC303
0.1uF
25V, X7R, +/-10%
C0603
*
*
BC229
33pF
50V,NPO,+/-5%
C0603
BC313
4.7uF
16V,Y5V,+80%/-20%
C0805
B
D
2
BC308
1uF
16V, Y5V, +80%/-20%
C0603
*
BC302
0.1uF
25V, X7R, +/-10%
C0603
Q41
G
NTD60N02R
1D5V_CORE
R282
U18
8
7
6
5
1D5V_FB
PHASE
BOOT
OCSET UGATE
FB
GND
VCC
LGATE
0
+/-5%
R0603
L20
1
2
3
4
*
S
*
*
BC248
0.1uF
C0603
SD103AW
*
*
R279
5.62K
+/-1%
R0603
D20
R288
0
+/-5%
R0603
EC46
1000uF
6.3V, +/-20%
CE35D80H200
*
25V, X7R, +/-10%
L31
Choke COIL 1uH +/-20%
BC228
4.7uF
C0805
10V, Y5V, +80%/-20%
EC38
1000uF
6.3V, +/-20%
CE35D80H200
5V_SYS
*
1
placed near the LM358M pin 8
*
*
D
2
3D3V_SYS
EC74
1800uF
6.3V, +/-20%
CE50D100H300
Dummy
RT9202
SOP8JA
D
A
Value should be tuned
Choke Coil 5uH
CK80D160
* *
EC49
EC53
1000uF
1000uF
6.3V, +/-20% 6.3V, +/-20%
CE35D80H200CE35D80H200
*
*
*
Q42
G
*
R285
105
BC326
+/-1%
4.7uF
R0603
16V,Y5V,+80%/-20%
C0805
1D5V_FB
S
NTD80N02
R281
118
+/-1%
R0603
49 SUPERGPIO4
49 SUPERGPIO3
*
BC305
10nF
50V,X7R,+/-10%
C0603
A
*
*
R665
118
+/-1%
R0603
Dummy
R666
118
+/-1%
R0603
Dummy
FOXCONN PCEG
Title
Power 1.5V 1.2V
SUPERGPIO4
SUPERGPIO3
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
11
of
52
5
4
3
SLP_S3J
6
*
B
Q32
MMBT2222A
Dummy
Changed from 3904 to 2222
by Goldstar 9/15/2003
3.3K
+/-5%
R0603
Dummy
*
*
2D5V_MCH
BC199
*0.1uF
U13
C0603
1
25V, X7R, +/-10%
D
MIC5205-2.5BM5
VOUT
5
BYPASS/ADJ
4
VIN
3
3D3V_SYS
Q35
MMDT5551
Dummy
1
*
R241
10,24,34,42 SLP_S3J
BC201
4.7uF
16V,Y5V,+80%/-20%
C1206
SHDN
2.5V/100mA
*
*
R321
100
+/-5%
R0603
BC224
1uF
C0603
10V,Y5V,+80%/-20%
Dummy
*
*
BC267
BC209
0.1uF
4.7uF
25V, X7R, +/-10% C1206
C0603
BC210
0.1uF
25V, X7R, +/-10%
C0603
Dummy
Add
16V,Y5V,+80%/-20%
R231
R235
100
10K
+/-5% R0603
R0603 +/-5%
Dummy Dummy
C
GND
*
BAT54C
E
D
3D3V_SYS
4
2
5
1
1
10,24,34,42
3D3V_SB
2
2D5V_MCH
3
3
D16
2
1D5V_CORE
2
by Goldstar 9/15/2003
3D3V_SB
*
R202
10K
+/-5%
R0603
Dummy
C
4
6
R211
47K
+/-5%
R0603
Dummy
5
*
C
Q30
BC215
1uF
10V,Y5V,+80%/-20%
C0603
Dummy
5V_SYS
U11A
LM393
Dummy
1
8
*
3
10K
+/-5%
R0603
Dummy
2
R226
*
1D5V_CORE
1
MMDT5551
Dummy
5V_SYS
-
B
BC177
0.1uF
25V, X7R, +/-10%
C0603
Dummy
PROCHOTJ
R173
1K
+/-1%
R0603
Dummy
5
+
6
-
R144
680
+/-1%
R0603
Dummy
U11B
LM393
Dummy
7
R145
RT1
6.8K
+/-1%
R0603
Dummy
*
R177
499
+/-1%
R0603
Dummy
R176
*
T
*
*
BC181
0.1uF
25V, X7R, +/-10%
C0603
Dummy
A
13
C
*
130
R0603
+/-1%
Dummy
B
E
R157
1K
+/-1%
R0603
Dummy
*
*
4
placed near the LM393 pin 8
8
*
2
4
5V_SYS
+
*
B
3
Q22
MMBT3904
Dummy
7.5K
R0603
+/-1%
Dummy
A
FOXCONN PCEG
VR Thermal Monitor Circuit
Title
2.5V_MCH
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
12
of
52
5
4
3
HDJ[63..0]
TBD
Pin
CRB
Pin
CRB
CPU Prescott_Socket_LGA775_Rev1.0
D23
0.7: test point TP_VCCPLL
AM5
0.7: test point TP_VID6
B
14
14
14
P2
K3
R3
K1
L1
N2
M3
HVCCA
HVSSA
TP33
A23
B23
D23
C23
VCCA
VSSA
RSVD5
VCCIOPLL
AM2
AL5
AM3
AL6
AK4
AL4
AM5
VID0
VID1
VID2
VID3
VID4
VID5
VID6
F28
G28
BCLK0
BCLK1
AE8
SKTOCC#
AL1
AK1
THERMDA
THERMDC
TP_VCCPLL
HVCCIOPLL
42,49
42,49
42,49
42,49
42,49
42,49
VID0
VID1
VID2
VID3
VID4
VID5
TP4
VID0
VID1
VID2
VID3
VID4
VID5
TP_VID6
1
7 CK_200M_P_CPU
7 CK_200M_N_CPU
34,49
SKTOCCJ
43
43
THERMDA
THERMDC
TP3
TP2
A
8
8
SKTOCCJ
TP_VCCSENSE
TP_VSSSENSE
1
1
VCC_SENSE
VSS_SENSE
HAJ[31..3]
HAJ[31..3]
15
15
15
15
15
HADSTBJ0
HPCREQJ
HAJ17
HAJ18
HAJ19
HAJ20
HAJ21
HAJ22
HAJ23
HAJ24
HAJ25
HAJ26
HAJ27
HAJ28
HAJ29
HAJ30
HAJ31
1TP_LAG775_PIN_AH4
1TP_LAG775_PIN_AH5
1TP_LAG775_PIN_AJ5
1TP_LAG775_PIN_AJ6
TP17
TP12
TP9
TP1
TBD
15
HADSTBJ1
SMI#
A20M#
FERR#/PBE#
LINT0
LINT1
IGNNE#
STPCLK#
TESTHI00
TESTHI01
TESTHI11
TESTHI12
TESTHI02
TESTHI03
TESTHI04
TESTHI05
TESTHI06
TESTHI07
RSVD10
RSVD11
F26
W3
P1
W2
F25
G25
G27
G26
G24
F24
AK6
G6
SLP#
RSVD12
PWRGOOD
PROCHOT#
THERMTRIP#
L2
AH2
N1
AL2
M2
*
TBD
Pin AK6, G6
refer to CRB 0.7
TESTHI_2_7
RSVD_AK6
RSVD_G6
R325
49.9
+/-1%
R0603
CPUSLPJ
24
CPU_PWRG
PROCHOTJ
THERMTRIPJ
24
12
24
*
F3
G3
G4
H5
HBR0J
TESTHI_8
TESTHI_9
TESTHI_10
J16
H15
H16
J17
TP_DPJ0
TP_DPJ1
TP_DPJ2
TP_DPJ3
H1
HGTLREF
G23
B3
F5
A3
1
2
3
4
BC341
1.0uF
10V,Y5V,+80%/-20%
C0603
A13
T1
G2
R1
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
N5
AE6
C9
G10
D16
A20
VCCSENSE
VSSSENSE
RSVD19
VCC_MB_REG
RSVD20
VSS_MB_REG
RSVD21
Changed pin name GTLREF1
COMP4
from
RSV
F29 RSVD9
RSVD24
E23
E24
F23
H2
J2
J3
TP_RSVD_CPU_N5
TP_RSVD_CPU_AE6
TP_RSVD_CPU_C9
TP_RSVD_CPU_G10
TP_RSVD_CPU_D16
TP_RSVD_CPU_A20
1
1
1
1
1
1
BOOTSELECT
LL_ID0
LL_ID1
Y1
V2
AA2
CPU_BOOT
LL_ID0
TP_LL_ID1
1
R319
TBD
R332
Pin N5 ~ Pin J3
CRB 0.7: connections ok?
HIE RRJ
1K R0603
+/-5%
Dummy
62 R0603
+/-5%
Dummy
CPU_BOOT
R312
R330
8
10 mils width
7 mils spacing
100 R0603
+/-1%
100 R0603
+/-1%
HCOMP0
R268
HCOMP1
R331
HBR0J
D
D
R248
619
+/-1%
R0603
Dummy
Q8
G
TP6
TP10
2N7002
Dummy
15
MCH_GTLREF
3D3V_SYS
1
1
1
1
TP31
TP29
TP30
TP28
*
HCPURSTJ
15
HRSJ0
HRSJ1
HRSJ2
15
15
15
R289
249
+/-1%
R0603
Dummy
*
Q31
G
GTLREF_SEL
HBR0J
CRB 0.7: 220 ohm, 5%
DG 0.51: 62 ohm, 5%
R588
110
+/-1%
R0603
Dummy
C
2N7002
Dummy
TESTHI_0
*
R209
TESTHI_0
62 R0603
+/-5%
62 R0603
+/-5%
TESTHI_2_7
R590
62
+/-1%
R0603
Dummy
VTT_OUT_LEFT
Place at CPU end of route
62
R0603 HBR0J
+/-5%
Place at CPU end of route
R328
100 +/-5% R0603 CPU_PWRG
R310
HGTLREF
R317
R313
R316
R329
R318
R314
RSVD_AK6
R357
TESTHI_1
62 R0603
+/-5%
TESTHI_8
62 R0603
+/-5%
TESTHI_9
62 R0603
+/-5%
TESTHI_10
62 R0603
+/-5%
TESTHI_11
62 R0603
+/-5%
TESTHI_12
62 R0603
+/-5%
RSVD_G6
62 R0603
+/-5% Dummy
HCPURSTJ
62 R0603
+/-5%
B
*
BC342
22pF
50V,NPO,+/-5%
C0603
HCOMP2
A
HCOMP3
FOXCONN PCEG
60.4 R0603 +/-1%
60.4 R0603 +/-1%
Title
CPU-HOST
Size
Date:
4
*
R228
10K
+/-5%
R0603
Dummy
FSB_VTT
10 mils width
7 mils spacing
CPU Prescott_Socket_LGA775_Rev1.0
5
VCCP
VTT_OUT_LEFT
TP35
TP34
TP32
TP13
TP14
TP11
TP8
1
1
BC340
220pF
50V, X7R, +/-20%
C0603
62 R0603
+/-5%
*
TP16
14
TBD
VIN
TP7
HDEFERJ 15
HEDRDYJ 15
Place at CPU end of route
R340
LL_ID0
*
0 R0603
+/-5%
1
R311
HCOMP0
HCOMP1
HCOMP2
HCOMP3
COMP0
COMP1
COMP2
COMP3
24
15
15
TP_APJ0
TP_APJ1
should be 0.67*FSB_VTT
15 mils spacing
be within 1.5" of the GTLREF pin
placed near CPU pin
R315
*
TP_BINITJ
INITJ
HLOCKJ
HTRDYJ
R223
GTLREF voltage
12 mils width,
divider should
caps should be
R326
100
+/-1%
R0603
15
15
15
15
U2
U3
VTT_OUT_RIGHT
TESTHI_0
TESTHI_1
TESTHI_11
TESTHI_12
VTT_OUT_RIGHT
AN3
AN4
AN5
AN6
AB6
W6
Y6
Y4
AA4
AD6
AA5
AB5
AC5
AB4
AF5
AF4
AG6
AG4
AG5
AH4
AH5
AJ5
AJ6
AC4
AE4
AD5
HIE RRJ
TP15
HBPRIJ
HDBSYJ
HDRDYJ
HITMJ
1
TP_MCERRJ 1
1 OF 7
CPU Prescott_Socket_LGA775_Rev1.0
3 OF 7
SMIJ
A20MJ
FERRJ
INTR
NMI
IGNNEJ
STPCLKJ
1
15
Pin AL2 PROCHOT#
CRB 0.7: pull up to VTT_OUT_RIGHT
DG/611A: example VR thermal monitor circuit
U16C
24
24
24
24
24
24
24
HDBIJ3
HDSTBNJ3
HDSTBPJ3
15
15
15
15
15
15
S
HDJ48
HDJ49
HDJ50
HDJ51
HDJ52
HDJ53
HDJ54
HDJ55
HDJ56
HDJ57
HDJ58
HDJ59
HDJ60
HDJ61
HDJ62
HDJ63
HDBIJ3
HDBIJ2
HDSTBNJ2
HDSTBPJ2
HREQJ0
HREQJ1
HREQJ2
HREQJ3
HREQJ4
HADSJ
HBNRJ
HITJ
TP_RSPJ
D
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DBI3#
DSTBN3#
DSTBP3#
D20
D17
A14
C15
C14
B15
C18
B16
A17
B18
C21
B21
B19
A19
A22
B22
C20
A16
C17
15 HREQJ[4..0]
D2
C2
D4
H4
G8
B2
C1
E4
AB2
P3
C3
E3
AD3
G7
F2
AB3
S
HDBIJ1
HDSTBNJ1
HDSTBPJ1
HDJ32
HDJ33
HDJ34
HDJ35
HDJ36
HDJ37
HDJ38
HDJ39
HDJ40
HDJ41
HDJ42
HDJ43
HDJ44
HDJ45
HDJ46
HDJ47
HDBIJ2
******** * *
15
15
15
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DBI1#
DSTBN1#
DSTBP1#
G16
E15
E16
G18
G17
F17
F18
E18
E19
F20
E21
F21
G21
E22
D22
G22
D19
G20
G19
A03#
ADS#
A04#
BNR#
A05#
HIT#
A06#
RSP#
A07#
BPRI#
A08#
DBSY#
A09#
DRDY#
A10#
HITM#
A11#
IERR#
A12#
INIT#
A13#
LOCK#
A14#
TRDY#
A15#
BINIT#
A16#
DEFER#
RSVD1
EDRDY#
RSVD2
MCERR#
REQ0#
REQ1#
AP0#
REQ2#
AP1#
REQ3#
REQ4#
BR0#
ADSTB0# TESTHI08
PCREQ# TESTHI09
TESTHI10
A17#
A18#
DP0#
A19#
DP1#
A20#
DP2#
A21#
DP3#
A22#
A23#
GTLREF
A24#
A25#
RESET#
A26#
A27#
RS0#
A28#
RS1#
A29#
RS2#
A30#
A31#
A32#
A33#
1
A34#
2
A35#
3
RSVD3
4
RSVD4
ADSTB1#
**
C
G9
F8
F9
E9
D7
E10
D10
F11
F12
D13
E13
G13
F14
G14
F15
G15
HDBIJ1 G11
G12
E12
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DBI2#
DSTBN2#
DSTBP2#
L5
P6
M5
L4
M4
R4
T5
U6
T4
U5
U4
V5
V4
W5
N4
P5
K4
J5
M6
K6
J6
R6
G5
*
HDJ16
HDJ17
HDJ18
HDJ19
HDJ20
HDJ21
HDJ22
HDJ23
HDJ24
HDJ25
HDJ26
HDJ27
HDJ28
HDJ29
HDJ30
HDJ31
D00#
D01#
D02#
D03#
D04#
D05#
D06#
D07#
D08#
D09#
D10#
D11#
D12#
D13#
D14#
D15#
DBI0#
DSTBN0#
DSTBP0#
1
U16A
HAJ3
HAJ4
HAJ5
HAJ6
HAJ7
HAJ8
HAJ9
HAJ10
HAJ11
HAJ12
HAJ13
HAJ14
HAJ15
HAJ16
**
HDBIJ0
HDSTBNJ0
HDSTBPJ0
HAJ[31..3]
* * *
15
15
15
15
**
D
B4
C5
A4
C6
A5
B6
B7
A7
A10
A11
B10
C11
D8
B12
C12
D11
HDBIJ0
A8
C8
B9
15
2 OF 7
U16B
HD J0
HD J1
HD J2
HD J3
HD J4
HD J5
HD J6
HD J7
HD J8
HD J9
HDJ10
HDJ11
HDJ12
HDJ13
HDJ14
HDJ15
HDJ[63..0]
2
HAJ[31..3]
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
13
of
52
5
4
3
FSB_VTT
HTCK
HTDI
HTDO
HTMS
HTRSTJ
HBPM0J
HBPM1J
HBPM2J
HBPM3J
HBPM4J
HBPM5J
D
AE1
AD1
AF1
AC1
AG1
HBPM0J
HBPM1J
HBPM2J
HBPM3J
HBPM4J
HBPM5J
AJ2
AJ1
AD2
AG2
AF2
AG3
AK3
AJ3
7,15
7,15
7,15
FSBSEL0
FSBSEL1
FSBSEL2
FSBSEL0
FSBSEL1
FSBSEL2
4 OF 7
G29
H30
G30
VTT_OUT1
VTT_OUT2
VTT_SEL
AA1
J1
F27
AG22
K29
AM26
AL8
AE12
AE11
W23
W24
W25
T25
Y28
AL18
AC25
W30
Y30
AN14
AD28
Y26
AC29
M29
U24
J23
AC27
AM18
AM19
AB8
AC26
J8
J28
T30
AM9
AF15
AC8
AE14
N23
W29
U29
AC24
AC23
Y23
AN26
AN25
AN11
AN18
Y27
Y25
AD24
AE23
AE22
AN19
V8
K8
AE21
AM30
AE19
AC30
AE15
M30
K27
M24
AN21
T8
AC28
N25
AE18
W26
AD25
M8
N30
AD26
AJ26
AM29
M25
M26
L8
U25
Y8
AJ12
AD27
U23
M23
AG29
N27
AM22
U28
K28
U8
AK18
AD8
K24
AH28
AH21
VTT_OUT_RIGHT
*
R320
0
+/-5%
R0603
Dummy
VTT_PWRGD 8
VTT_OUT_RIGHT
VTT_OUT_LEFT
R203
1K R0603
Dummy +/-5%
*
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
BPM0#
VTT8
BPM1#
VTT9
BPM2#
VTT10
BPM3#
VTT11
BPM4#
VTT12
BPM5#
VTT13
VTT14
DBR#
VTT15
VTT16
ITPCLKOUT0
VTT17
ITPCLKOUT1
VTT18
VTT19
BSEL0
VTT20
BSEL1
VTT21
BSEL2
VTT22
VTT23
VTT24
VTTPWRGD
A29
B25
B29
B30
C29
A26
B27
C28
A25
A28
A27
C30
A30
C25
C26
C27
B26
D27
D28
D25
D26
B28
D29
D30
AM6
TCK
TDI
TDO
TMS
TRST#
ICH_SYS_RSTJ AC2
7,24,35,49 ICH_SYS_RSTJ
VTT_OUT_RIGHT
VTT_OUT_LEFT
3D3V_SYS
CPU Prescott_Socket_LGA775_Rev1.0
VTT_OUT_RIGHT
Place BPM termination near CPU
R336
R363
R334
R359
R338
R337
*
HBPM5J
HBPM4J
HBPM3J
HBPM2J
HBPM1J
HBPM0J
49.9 +/-1%
49.9 +/-1%
49.9 +/-1%
49.9 +/-1%
49.9 +/-1%
49.9 +/-1%
******
C
*
R335
49.9
+/-1%
R0603
R361
49.9
+/-1%
R0603
*
R358
49.9
+/-1%
R0603
HBPM5J
HBPM4J
HBPM3J
HBPM2J
HBPM1J
HBPM0J
*
R360
49.9
+/-1%
R0603
VTT_OUT_RIGHT
*
R362
49.9
+/-1%
R0603
HTDO
*
BC348
0.1uF
25V, X7R, +/-10%
C0603
*
BC347
0.1uF
25V, X7R, +/-10%
C0603
place TDO termination near XDP connector
HTDI
HTMS
HTCK
place TCK/TDI/TMS terminations near CPU within 1.5 inch
place TRSTJ termination anywhere on route
1
*
13
13
*
EC34
33uF
35V, +/-20%
CE20D50H110
ESL <= 5 nH, ESR < 0.3 ohm
*
HVCCA
HVSSA
HVCCA
HVSSA
VCCP
VCCP
BC289
C1206
BC276
C1206
BC269
C1206
BC260
C1206
BC252
C1206
BC243
C1206
BC290
C1206
BC277
C1206
BC270
C1206
BC261
C1206
BC253
C1206
BC244
C1206
BC291
C1206
BC278
C1206
BC271
C1206
BC262
C1206
BC254
C1206
BC245
C1206
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
10uF
6.3V,X5R,+/-10%
* * * * * * * * * * * * * * * * * *
TC2
100uF
Place these caps. inside CPU socket
10uF/SDK caps. co-layout
*
CTD
TC1
100uF
HVCCIOPLL
BC211
1uF
16V, Y5V, +80%/-20%
R221
C0603
0
+/-5%
R0603
*
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCP25
VCCP26
VCCP27
VCCP28
VCCP29
VCCP30
VCCP31
VCCP32
VCCP33
VCCP34
VCCP35
VCCP36
VCCP37
VCCP38
VCCP39
VCCP40
VCCP41
VCCP42
VCCP43
VCCP44
VCCP45
VCCP46
VCCP47
VCCP48
VCCP49
VCCP50
VCCP51
VCCP52
VCCP53
VCCP54
VCCP55
VCCP56
VCCP57
VCCP58
VCCP59
VCCP60
VCCP61
VCCP62
VCCP63
VCCP64
VCCP65
VCCP66
VCCP67
VCCP68
VCCP69
VCCP70
VCCP71
VCCP72
VCCP73
VCCP74
VCCP75
VCCP76
VCCP77
VCCP78
VCCP79
VCCP80
VCCP81
VCCP82
VCCP83
VCCP84
VCCP85
VCCP86
VCCP87
VCCP88
VCCP89
VCCP90
VCCP91
VCCP92
U16F
5 OF 7
VCCP93
VCCP94
VCCP95
VCCP96
VCCP97
VCCP98
VCCP99
VCCP100
VCCP101
VCCP102
VCCP103
VCCP104
VCCP105
VCCP106
VCCP107
VCCP108
VCCP109
VCCP110
VCCP111
VCCP112
VCCP113
VCCP114
VCCP115
VCCP116
VCCP117
VCCP118
VCCP119
VCCP120
VCCP121
VCCP122
VCCP123
VCCP124
VCCP125
VCCP126
VCCP127
VCCP128
VCCP129
VCCP130
VCCP131
VCCP132
VCCP133
VCCP134
VCCP135
VCCP136
VCCP137
VCCP138
VCCP139
VCCP140
VCCP141
VCCP142
VCCP143
VCCP144
VCCP145
VCCP146
VCCP147
VCCP148
VCCP149
VCCP150
VCCP151
VCCP152
VCCP153
VCCP154
VCCP155
VCCP156
VCCP157
VCCP158
VCCP159
VCCP160
VCCP161
VCCP162
VCCP163
VCCP164
VCCP165
VCCP166
VCCP167
VCCP168
VCCP169
VCCP170
VCCP171
VCCP172
VCCP173
VCCP174
VCCP175
VCCP176
VCCP177
VCCP178
VCCP179
VCCP180
VCCP181
VCCP182
VCCP183
VCCP184
1
U16G
VCCP
AK12
AH22
T29
AM14
AM25
AE9
Y29
AK25
AK19
AG15
J22
T24
AG21
AM21
J25
U30
AL21
AG25
AJ18
J19
AH30
J15
AG12
AJ22
J20
AH18
AH26
W27
AL25
AN8
AH14
U27
T23
R8
AK22
AN29
AG11
AK26
J10
AJ15
AG26
AN9
AH15
AF18
AL15
J26
J18
J21
AG27
AK15
AF11
AD23
AM15
AF8
AK21
AG30
AJ21
AM11
AL11
AJ11
K30
AL14
AN30
AH25
AL12
AJ9
AK11
AG14
N29
AL30
AJ25
AH9
J29
J11
K25
P8
K23
AL19
AM8
T26
N28
AH12
AL22
AN15
AJ8
U26
AJ19
T27
AK8
AN12
AG9
N26
AF9
AF22
AH11
AJ14
AH19
AH29
AH27
AG28
AL26
AM12
J24
J13
T28
W28
J12
J27
AG19
AL9
AD30
AF21
Y24
AK14
J9
M27
AF14
J30
AG18
AA8
AG8
AL29
AD29
W8
AH8
N24
AN22
J14
K26
AF19
N8
AF12
M28
AK9
C10
D12
AM7
C24
K2
C22
AN1
B14
K7
AE16
B11
AL10
AK23
H12
AF7
AK7
H7
E14
L28
Y5
E11
AL16
AL24
AK13
AL3
D21
AL20
D18
AN2
AK16
AK20
AM27
AM1
AL13
AL17
C19
E28
AH7
AK30
D24
6 OF 7
VCCP185
VSS41 AL23
VCCP186
VSS42 A12
VCCP187
VSS43 L25
VCCP188
VSS44 J7
VCCP189
VSS45 AE28
VCCP190
VSS46 AE29
VCCP191
VSS47 K5
VCCP192
VSS48 J4
VCCP193
VSS49 AE30
VCCP194
VSS50 AN20
VCCP195
VSS51 AF10
VCCP196
VSS52 AE24
VCCP197
VSS53 AM24
VCCP198
VSS54 AN23
VCCP199
VSS55 H9
VCCP200
VSS56 H8
VCCP201
VSS57 H13
VCCP202
VSS58 AC6
VCCP203
VSS59 AC7
VCCP204
VSS60 AH6
VCCP205
VSS61 C16
VCCP206
VSS62 AM16
VCCP207
VSS63 AE25
VCCP208
VSS64 AE27
VCCP209
VSS65 AJ28
VCCP210
VSS66 AJ7
VCCP211
VSS67 F19
VCCP212
VSS68 AH13
VCCP213
VSS69 AD7
VCCP214
VSS70 AH16
VCCP215
VSS71 AK17
VCCP216
VSS72 E17
VCCP217
VSS73 AH17
VCCP218
VSS74 AH20
VCCP219
VSS75 AE5
VCCP220
VSS76 AH23
VCCP221
VSS77 AE7
VCCP222
VSS78 AM13
VCCP223
VSS79 AH24
VCCP224
VSS80 AJ30
VCCP225
VSS81 AJ10
VCCP226
VSS82 AF3
VSS83 AK5
VSS84 AJ16
VSS1
VSS85 AF6
VSS2
VSS86 AK29
VID7
VSS87 AJ17
VSS4
VSS88 F22
VSS5
VSS89 AH3
VSS6
VSS90 AK10
VSS7
VSS91 AM10
VSS8
VSS92 F16
VSS9
VSS93 AJ23
VSS10
VSS94 F13
VSS11
VSS95 AG7
VSS12
VSS96 F10
VSS13
VSS97 L26
VSS14
VSS98 AD4
VSS15
VSS99 H11
VSS16
VSS100 L24
VSS17
VSS101 L23
VSS18
VSS102 AM23
VSS19
VSS103 A15
VSS20
VSS104 AH10
VSS21 GTLREF_SEL H29
VSS22
VSS106 B24
VSS23
VSS107 L3
VSS24
VSS108 H27
VSS25
VSS109 A21
VSS26
VSS110 AE2
VSS27
VSS111 AJ29
VSS28
VSS112 A24
VSS29
VSS113 AK27
VSS30
VSS114 AK28
VSS31
VSS115 B20
VSS32
VSS116 AM20
VSS33
VSS117 H26
VSS34
VSS118 B17
VSS35
VSS119 H25
VSS36
VSS120 H24
VSS37
VSS121 AA3
VSS38
VSS122 AA7
VSS39
VSS123 H23
VSS40
VSS124 AA6
VSS125 H10
GTLREF_SEL
4
7 OF 7
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VID_SELECT
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
RSVD25
RSVD26
COMP5
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
D5
A9
D3
B1
B5
B8
AJ4
AE26
AH1
E29
V7
C13
AK24
AB30
L6
L7
AB29
M1
AB28
E8
AG20
AN17
AB27
AB26
AN16
M7
AB25
AB24
AB23
N3
AA30
F4
AG10
AE13
AF30
H28
F7
AF29
AF28
G1
AF27
AF26
AF25
AN28
AN27
AF24
AF23
AG24
AF17
AN24
H3
AN7
P24
AE20
AE17
E27
T7
R30
AJ27
AB1
AM4
V26
AA23
AL28
AF20
AG23
D
C
B
V1
F6
T2
Y3
AE3
W1
E7
B13
D14
E6
D1
E5
A
CPU Prescott_Socket_LGA775_Rev1.0
FOXCONN PCEG
GTLREF_SEL
Title
LGA775 -2
GTLREF_SEL 13
Size
Date:
5
H22
H21
H20
H19
H18
AB7
H17
AJ24
AM17
AC3
H14
P28
V6
AK2
P27
P26
AM28
AJ13
W4
P25
AJ20
W7
P23
AG13
AG16
AG17
C7
Y2
L30
L29
D15
AL27
Y7
L27
AA29
N6
N7
AA28
AN13
AA27
AA26
P4
AA25
AA24
P7
E26
V30
R2
V29
V28
R5
V27
R7
E20
AN10
V25
T3
V24
V23
T6
AL7
E25
U1
R29
R28
R27
R26
R25
U7
R24
R23
P30
V3
P29
AF16
AE10
AF13
H6
A18
A2
E2
D9
C4
A6
D6
CPU Prescott_Socket_LGA775_Rev1.0
CPU Prescott_Socket_LGA775_Rev1.0
CTD
2.5V,+/-20%
Dummy
HVCCIOPLL
125mA
L10
L0805 10uH +/-10%
0805
+/-10%
Notes:
1. Cap. should be within 600 mils of the VCCA and VSSA pins
2. VCCA route should be parallel and next to VSSA route
3. Min. 12 mils trace from the filter to the processor pins
4. The inductors should be close to the cap.
2.5V,+/-20%
Dummy
13
2
1
2
125mA
L11
L0805 10uH +/-10%
0805
+/-10%
A
HTRSTJ
FSB_VTT
PLL Supply Filter
B
VCCP
U16E
U16D
HTCK
HTDI
HTDO
HTMS
HTRSTJ
2
VCCP
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
14
of
52
3
2
1
2 OF 9
C10
C9
A9
A8
C8
C7
A7
A6
C6
C5
C2
D2
E3
F3
F1
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
U21B
HDJ[63..0]
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADSTB0#
HADSTB1#
HDSTBP0#
HDSTBN0#
HDINV0#
HDSTBP1#
HDSTBN1#
HDINV1#
HDSTBP2#
HDSTBN2#
HDINV2#
HDSTBP3#
HDSTBN3#
HDINV3#
13
13
HADSTBJ0
HADSTBJ1
F33
E32
H31
G31
F31
J31
N27
13
13
13
13
13
13
13
13
13
13
13
13
HDSTBPJ0
HDSTBNJ0
HDBIJ0
HDSTBPJ1
HDSTBNJ1
HDBIJ1
HDSTBPJ2
HDSTBNJ2
HDBIJ2
HDSTBPJ3
HDSTBNJ3
HDBIJ3
E33
E35
E34
H26
F26
J26
J19
F19
K19
B29
C29
B26
HDBIJ0
HDBIJ1
HDBIJ2
HDBIJ3
M31
M35
E30
R33
G24
L35
J35
M32
P33
L34
N35
L33
E31
K34
P34
J32
N34
HADSJ
HBNRJ
HBPRIJ
HBR0J
HCPURSTJ
HDBSYJ
HDEFERJ
HDRDYJ
HEDRDYJ
HITJ
HITMJ
HLOCKJ
HPCREQJ
HRSJ0
HRSJ1
HRSJ2
HTRDYJ
FSB_VTT
HADS#
HBNR#
HBPRI#
HBREQ0#
HCPURST#
HDBSY#
HDEFER#
HDRDY#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HRS0#
HRS1#
HRS2#
HTRDY#
HSWING
HSCOMP
HRCOMP
HVREF
A23
D24
B23
A24
HCLKP
HCLKN
M23
M22
60.4
R0603
+/-1%
A
HSWING voltage should be 1/4*FSB_VTT
12 mils width, 10 mils space
max. 3 inches long
caps should be placed near GMCH pin
7,14
7,14
7,14
*
FSBSEL0
FSBSEL1
FSBSEL2
FSBSEL0
FSBSEL1
FSBSEL2
R212
R215
R127
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
CK_PE_100M_P_GMCH
CK_PE_100M_N_GMCH
A11
B11
GCLKP
GCLKN
SDVO_CTRLDATA
SDVO_CTRLCLK
K13
J13
R267 1K
R266 1K
MCH_FSEL0
MCH_FSEL1
MCH_FSEL2
NOA_3
NOA_4
MCH_TYPE
R0603 +/-5%
R0603 +/-5% Dummy M_EXPSLR
NOA_7
NOA_8
NOA_9
1D5V_CORE
Should add a cap
close to this pin
GTLREF voltage should be 0.67*FSB_VTT
12 mils width, 15 mils space
caps should be placed near MCH pin
*
U5
U6
T9
T8
V7
V8
V10
U10
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
CK_200M_P_GMCH 7
CK_200M_N_GMCH 7
R251
100
+/-1%
R0603
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
24
24
24
24
24
24
24
24
U21E
TBD
Check E22
EDS : VTT
MCH_GTLREF
*
EXP_RXP0
EXP_RXN0
EXP_RXP1
EXP_RXN1
EXP_RXP2
EXP_RXN2
EXP_RXP3
EXP_RXN3
EXP_RXP4
EXP_RXN4
EXP_RXP5
EXP_RXN5
EXP_RXP6
EXP_RXN6
EXP_RXP7
EXP_RXN7
EXP_RXP8
EXP_RXN8
EXP_RXP9
EXP_RXN9
EXP_RXP10
EXP_RXN10
EXP_RXP11
EXP_RXN11
EXP_RXP12
EXP_RXN12
EXP_RXP13
EXP_RXN13
EXP_RXP14
EXP_RXN14
EXP_RXP15
EXP_RXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
EXP_COMPO
EXP_COMPI
4
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
24
24
24
24
24
24
24
24
GMCH_EXP_COMPR295
24.9
Y10
W10
D
C
1D5V_PE_GMCH
+/-1%
SDVO_CTRLDATA
SDVO_CTRLCLK
BC256
1uF
C0603
*
BC257
0.22nF
50V,X7R,+/-10%
C0603
1K R0603 +/-5%
1K R0603 +/-5%
1K R0603 +/-5%
MCH_FSEL0
MCH_FSEL1
MCH_FSEL2
H16
E15
D17
M16
F15
C15
A16
B15
C14
K15
BSEL0
BSEL1
BSEL2
RSV24
RSV25
MTYPE
EXP_SLR
RSV21
RSV22
RSV23
L10
M10
VCC
VSS
AN19
AL28
AJ14
AH24
AG6
AD30
P30
L19
L12
K12
J12
H17
H15
H12
G12
F24
F12
E16
C16
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
AJ21
AK21
AK24
AL21
AL20
AK18
AJ24
AJ23
AJ18
AJ20
RSV1
RSV2
RSV3
RSV4
RSV5
RSV6
RSV7
RSV8
RSV9
RSV10
5 OF 9
HSYNC
VSYNC
E12 R260 R0603
D12
R259 R0603
RED
GREEN
BLUE
F14
D14
H14
RED#
GREEN#
BLUE#
G14
E14
J14
DDC_DATA
DDC_CLK
L14
M15
DREFCLKP
DREFCLKN
M13
M12
REFSET
A15
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
EXTTS#
RSV26
RSV27
RSTIN#
PWROK
ICH_SYNC#
NC
RSV11
RSV12
RSV13
RSV14
RSV15
RSV16
RSV17
RSV18
RSV19
RSV20
3
47
+/-5%
47
+/-5%
* R256
*
150
R257
150
+/-1% +/-1%
R0603 R0603
*
HSYNC
VSYNC
23
23
RED
GREEN
BLUE
23
23
23
R258
150
+/-1%
R0603
Place close to GMCH
Within 500mils
B
DACREFSET
AR35
AR34
AR2
AR1
AP35
AP1
B35
B1
A34
A2
DDCA_DATA
DDCA_CLK
CK_96M_P_GMCH
CK_96M_N_GMCH
*
R269
255
+/-1%
R0603
DDCA_DATA 23
DDCA_CLK
23
CK_96M_P_GMCH 7
CK_96M_N_GMCH 7
Place close to GMCH
PWRGD_3V_ACT R473
BC437
10nF
25V,X7R,+/-10%
C0603
Dummy
*
2D5V_MCH
R255
R0603
K16
G16
R35
AF7
AG7
M14
A35
0
PWRGD_3V
+/-5%
R0603
7,10,24,32,34
10K
+/-5%
ICH_PLTRSTJ
ICH_PLTRSTJ 26,42
PWRGD_3V_ACT
PWRGD_3V_ACT 7,24
ICH_S YNCJ
ICH_SYNCJ
24
A
V31
V30
U30
V32
Y30
AB29
R31
R30
AA31
AA30
FOXCONN PCEG
Title
Grantsdale DDR2 GMCH -1
Size
Grantsdale_MCH DDR2_EDS Rev 1.0
5
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
R3
T3
T1
U1
U3
V3
V5
W5
EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
Grantsdale_MCH DDR2_EDS Rev 1.0
HSCOMP
BC247
2.2pF
50V,NPO,+/-0.25pF
C0603
E11
F11
J11
H11
F9
E9
F7
E7
B3
B4
D5
E5
G6
G5
H8
H7
J6
J5
K8
K7
L6
L5
P10
R10
M8
M7
N6
N5
P7
P8
R6
R5
EXP_RXP0
EXP_RXN0
EXP_RXP1
EXP_RXN1
EXP_RXP2
EXP_RXN2
EXP_RXP3
EXP_RXN3
EXP_RXP4
EXP_RXN4
EXP_RXP5
EXP_RXN5
EXP_RXP6
EXP_RXN6
EXP_RXP7
EXP_RXN7
EXP_RXP8
EXP_RXN8
EXP_RXP9
EXP_RXN9
EXP_RXP10
EXP_RXN10
EXP_RXP11
EXP_RXN11
EXP_RXP12
EXP_RXN12
EXP_RXP13
EXP_RXN13
EXP_RXP14
EXP_RXN14
EXP_RXP15
EXP_RXN15
22 SDVO_CTRLDATA
22 SDVO_CTRLCLK
HSWING
HSCOMP
HRCOMP
MCH_GTLREF
R250
49.9
+/-1%
R0603
EXP_RXP0
EXP_RXN0
EXP_RXP1
EXP_RXN1
EXP_RXP2
EXP_RXN2
EXP_RXP3
EXP_RXN3
EXP_RXP4
EXP_RXN4
EXP_RXP5
EXP_RXN5
EXP_RXP6
EXP_RXN6
EXP_RXP7
EXP_RXN7
EXP_RXP8
EXP_RXN8
EXP_RXP9
EXP_RXN9
EXP_RXP10
EXP_RXN10
EXP_RXP11
EXP_RXN11
EXP_RXP12
EXP_RXN12
EXP_RXP13
EXP_RXN13
EXP_RXP14
EXP_RXN14
EXP_RXP15
EXP_RXN15
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
7 CK_PE_100M_P_GMCH
7 CK_PE_100M_N_GMCH
R252
*
*
BC288
10nF
25V,X7R,+/-10%
C0603
*
20
R0603
+/-5%
FSB_VTT
HSWING
*
13
FSB_VTT
*
HRCOMP
R261
301
+/-1%
R0603
R262
100
+/-1%
R0603
HDJ[63..0]
Grantsdale_MCH DDR2_EDS Rev 1.0
R272
*
HD J0
HD J1
HD J2
HD J3
HD J4
HD J5
HD J6
HD J7
HD J8
HD J9
HDJ10
HDJ11
HDJ12
HDJ13
HDJ14
HDJ15
HDJ16
HDJ17
HDJ18
HDJ19
HDJ20
HDJ21
HDJ22
HDJ23
HDJ24
HDJ25
HDJ26
HDJ27
HDJ28
HDJ29
HDJ30
HDJ31
HDJ32
HDJ33
HDJ34
HDJ35
HDJ36
HDJ37
HDJ38
HDJ39
HDJ40
HDJ41
HDJ42
HDJ43
HDJ44
HDJ45
HDJ46
HDJ47
HDJ48
HDJ49
HDJ50
HDJ51
HDJ52
HDJ53
HDJ54
HDJ55
HDJ56
HDJ57
HDJ58
HDJ59
HDJ60
HDJ61
HDJ62
HDJ63
10V, X5R, +/-10%
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
B
HREQJ0
HREQJ1
HREQJ2
HREQJ3
HREQJ4
1 OF 9
J33
H33
J34
G35
H35
G34
F34
G33
D34
C33
D33
B34
C34
B33
C32
B32
E28
C30
D29
H28
G29
J27
F28
F27
E27
E25
G25
J25
K25
L25
L23
K23
J22
J24
K22
J21
M21
H23
M19
K21
H20
H19
M18
K18
K17
G18
H18
F17
A25
C27
C31
B30
B31
A31
B27
A29
C28
A28
C25
C26
D27
A27
E24
B25
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
***
C
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
**
13 HREQJ[4..0]
H29
K29
J29
G30
G32
K30
L29
M30
L31
L28
J28
K27
K33
M28
R29
L26
N26
M26
N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29
*
D
U21A
HAJ3
HAJ4
HAJ5
HAJ6
HAJ7
HAJ8
HAJ9
HAJ10
HAJ11
HAJ12
HAJ13
HAJ14
HAJ15
HAJ16
HAJ17
HAJ18
HAJ19
HAJ20
HAJ21
HAJ22
HAJ23
HAJ24
HAJ25
HAJ26
HAJ27
HAJ28
HAJ29
HAJ30
HAJ31
**
13 HAJ[31..3]
EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
*
4
*
5
Date:
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
15
of
52
AP26
AR24
AL24
AP23
AR23
AP22
AN23
AP21
AN22
AN21
AM27
AM21
AR20
AP31
SMA_A0
SMA_1
SMA_A2
SAMA3
SMA_A4
SMA_A5
SMA_A6
SMA_A7
SMA_A8
SMA_A9
SMA_A10
SMA_A11
SMA_A12
SMA_A13
18,19 M_WE_AJ
18,19 M_CAS_AJ
AN28
AN29
SWE_A#
SCAS_A#
18,19 M_RAS_AJ
AP27
M_BS_A1 AN27
M_BS_A0 AR27
M_BS_A2 AN20
SRAS_A#
SBA_A1
SBA_A0
SBA_A2
AR29
AP32
AR28
AN31
SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#
AP19
AM18
AN18
AR19
SCKE_A0
SCKE_A1
SCKE_A2
SCKE_A3
AP30
AN32
AP29
AP33
SODT_A0
SODT_A1
SODT_A2
SODT_A3
D
18,19 M_BS_A[2..0]
18,19
18,19
18,19
18,19
M_SCS_A0J
M_SCS_A1J
M_SCS_A2J
M_SCS_A3J
18,19 M_SCKE_A[3..0]
M_SCKE_A0
M_SCKE_A1
M_SCKE_A2
M_SCKE_A3
18,19 M_ODT_A[3..0]
C
M_ODT_A0
M_ODT_A1
M_ODT_A2
M_ODT_A3
19
19
19
19
19
19
CK_M_200M_P_DDR0_A
CK_M_200M_N_DDR0_A
CK_M_200M_P_DDR1_A
CK_M_200M_N_DDR1_A
CK_M_200M_P_DDR2_A
CK_M_200M_N_DDR2_A
AN26
AP25
AM2
AM3
AC34
AC35
SCLK_A0
SCLK_A0#
SCLK_A1
SCLK_A1#
SCLK_A2
SCLK_A2#
19
19
19
19
19
19
CK_M_200M_P_DDR3_A
CK_M_200M_N_DDR3_A
CK_M_200M_P_DDR4_A
CK_M_200M_N_DDR4_A
CK_M_200M_P_DDR5_A
CK_M_200M_N_DDR5_A
AN25
AM24
AN3
AN2
AC33
AB34
SCLK_A3
SCLK_A3#
SCLK_A4
SCLK_A4#
SCLK_A5
SCLK_A5#
GMCH_VREF_A
AB33
RSV17
AH15
AE16
RSV_TP1
RSV_TP0
AJ12
AK12
SM_SLEWIN0
SM_SLEWOUT0
AE7
SVREF0
GMCH_VREF_B
1D8V_STR
B
*
*
R394
1K
+/-1%
R0603
*
*
R390
1K
+/-1%
R0603
*
BC379
0.1uF
25V, X7R, +/-10%
C0603
R418
0
+/-5%
R0603
Place this cap close to GMCH
GMCH_VREF_A
BC366
0.1uF
25V, X7R, +/-10%
C0603
Place this cap close to GMCH
spacing 15 mils
trace width 12 mils
5 mils minimum for a max. of 300 mils
in the GMCH break-out area
CHANNEL A
M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A11
M_MAA_A12
M_MAA_A13
3
SDQS_A0
SDQS_A0#
SDM_A0
SDQ_A0
SDQ_A1
SDQ_A2
SDQ_A3
SDQ_A4
SDQ_A5
SDQ_A6
SDQ_A7
AG1
AG2
AF2
AE3
AF3
AH3
AJ2
AE2
AE1
AG3
AH2
M_DQS_A0
M_DQS_AJ0
M_DQM_A0
M_DATA_A0
M_DATA_A1
M_DATA_A2
M_DATA_A3
M_DATA_A4
M_DATA_A5
M_DATA_A6
M_DATA_A7
SDQS_A1
SDQS_A1#
SDM_A1
SDQ_A8
SDQ_A9
SDQ_A10
SDQ_A11
SDQ_A12
SDQ_A13
SDQ_A14
SDQ_A15
AL3
AL2
AL1
AK2
AK3
AN4
AP4
AJ1
AJ3
AP2
AP3
M_DQS_A1
M_DQS_AJ1
M_DQM_A1
M_DATA_A8
M_DATA_A9
M_DATA_A10
M_DATA_A11
M_DATA_A12
M_DATA_A13
M_DATA_A14
M_DATA_A15
SDQS_A2
SDQS_A2#
SDM_A2
SDQ_A16
SDQ_A17
SDQ_A18
SDQ_A19
SDQ_A20
SDQ_A21
SDQ_A22
SDQ_A23
AP7
AR7
AN7
AR5
AP6
AP9
AN9
AN5
AP5
AN8
AR8
M_DQS_A2
M_DQS_AJ2
M_DQM_A2
M_DATA_A16
M_DATA_A17
M_DATA_A18
M_DATA_A19
M_DATA_A20
M_DATA_A21
M_DATA_A22
M_DATA_A23
SDQS_A3
SDQS_A3#
SDM_A3
SDQ_A24
SDQ_A25
SDQ_A26
SDQ_A27
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_A31
AF17
AG17
AH16
AL17
AJ17
AF19
AH18
AK16
AF16
AD17
AE19
M_DQS_A3
M_DQS_AJ3
M_DQM_A3
M_DATA_A24
M_DATA_A25
M_DATA_A26
M_DATA_A27
M_DATA_A28
M_DATA_A29
M_DATA_A30
M_DATA_A31
SDQS_A4
SDQS_A4#
SDM_A4
SDQ_A32
SDQ_A33
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_A37
SDQ_A38
SDQ_A39
AM30
AL29
AK29
AK27
AJ28
AL31
AK31
AH27
AL27
AN30
AL30
M_DQS_A4
M_DQS_AJ4
M_DQM_A4
M_DATA_A32
M_DATA_A33
M_DATA_A34
M_DATA_A35
M_DATA_A36
M_DATA_A37
M_DATA_A38
M_DATA_A39
SDQS_A5
SDQS_A5#
SDM_A5
SDQ_A40
SDQ_A41
SDQ_A42
SDQ_A43
SDQ_A44
SDQ_A45
SDQ_A46
SDQ_A47
AG35
AG33
AG34
AH33
AH35
AF33
AE33
AJ33
AJ34
AG32
AF34
M_DQS_A5
M_DQS_AJ5
M_DQM_A5
M_DATA_A40
M_DATA_A41
M_DATA_A42
M_DATA_A43
M_DATA_A44
M_DATA_A45
M_DATA_A46
M_DATA_A47
SDQS_A6
SDQS_A6#
SDM_A6
SDQ_A48
SDQ_A49
SDQ_A50
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55
AA34
AA35
AA33
AD31
AD35
Y33
W34
AE35
AE34
AA32
Y35
M_DQS_A6
M_DQS_AJ6
M_DQM_A6
M_DATA_A48
M_DATA_A49
M_DATA_A50
M_DATA_A51
M_DATA_A52
M_DATA_A53
M_DATA_A54
M_DATA_A55
SDQS_A7
SDQS_A7#
SDM_A7
SDQ_A56
SDQ_A57
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_A62
SDQ_A63
U34
U35
U33
V34
V33
R32
R34
W35
W33
T33
T35
M_DQS_A7
M_DQS_AJ7
M_DQM_A7
M_DATA_A56
M_DATA_A57
M_DATA_A58
M_DATA_A59
M_DATA_A60
M_DATA_A61
M_DATA_A62
M_DATA_A63
M_DQS_A[7..0] 19
M_DQS_AJ[7..0] 19
M_DQM_A[7..0] 19
M_DATA_A[63..0] 19
2
20,21 M_MAA_B[13..0]
M_MAA_B0
M_MAA_B1
M_MAA_B2
M_MAA_B3
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_MAA_B10
M_MAA_B11
M_MAA_B12
M_MAA_B13
M_DQS_A[7..0] 19
M_DQS_AJ[7..0] 19
M_DQM_A[7..0] 19
M_DATA_A[63..0] 19
AM15
AR15
AN15
AL15
AP14
AM12
AP13
AL12
AN13
AR12
AP15
AP11
AR11
AL33
SMA_B0
SMA_B1
SMA_B2
SMA_B3
SMA_B4
SMA_B5
SMA_B6
SMA_B7
SMA_B8
SMA_B9
SMA_B10
SMA_B11
SMA_B12
SMA_B13
AP17
AP18
AN17
SWE_B#
SCAS_B#
SRAS_B#
AR16
AN16
AN11
SBS_B0
SBS_B1
SBS_B2
AN33
AM34
AP34
AN34
SCS_B0#
SCS_B1#
SCS_B2#
SCS_B3#
M_SCKE_B0
M_SCKE_B1
M_SCKE_B2
M_SCKE_B3
AP10
AN10
AR9
AM9
SCKE_B0
SCKE_B1
SCKE_B2
SCKE_B3
M_ODT_B0
M_ODT_B1
M_ODT_B2
M_ODT_B3
AM33
AL34
AL35
AK34
SODT_B0
SODT_B1
SODT_B2
SODT_B3
20,21 M_WE_BJ
20,21 M_CAS_BJ
20,21 M_RAS_BJ
20,21 M_BS_B[2..0]
M_DQS_A[7..0] 19
M_DQS_AJ[7..0] 19
M_DQM_A[7..0] 19
M_DATA_A[63..0] 19
20,21
20,21
20,21
20,21
M_BS_B0
M_BS_B1
M_BS_B2
M_SCS_B0J
M_SCS_B1J
M_SCS_B2J
M_SCS_B3J
20,21 M_SCKE_B[3..0]
20,21 M_ODT_B[3..0]
M_DQS_A[7..0] 19
M_DQS_AJ[7..0] 19
M_DQM_A[7..0] 19
M_DATA_A[63..0] 19
M_DQS_A[7..0] 19
M_DQS_AJ[7..0] 19
M_DQM_A[7..0] 19
M_DATA_A[63..0] 19
CK_M_200M_P_DDR0_B
CK_M_200M_N_DDR0_B
CK_M_200M_P_DDR1_B
CK_M_200M_N_DDR1_B
CK_M_200M_P_DDR2_B
CK_M_200M_N_DDR2_B
AH22
AG23
AK9
AL9
AE26
AE25
SCLK_B0
SCLK_B0#
SCLK_B1
SCLK_B1#
SCLK_B2
SCLK_B2#
21
21
21
21
21
21
CK_M_200M_P_DDR3_B
CK_M_200M_N_DDR3_B
CK_M_200M_P_DDR4_B
CK_M_200M_N_DDR4_B
CK_M_200M_P_DDR5_B
CK_M_200M_N_DDR5_B
AL23
AK22
AJ11
AL11
AD28
AD29
SCLK_B3
SCLK_B3#
SCLK_B4
SCLK_B4#
SCLK_B5
SCLK_B5#
AD32
RSV16
AK15
AN14
RSV_TP3
RSV_TP2
AF9
AE10
SM_SLEWIN1
SM_SLEWOUT1
SRCOMP[1:0]
10 mils width, 10 mils spacing
place cap/res close to GMCH
R369
R0603
*
80.6
+/-1%
BC354
0.1uF
25V, X7R, +/-10%
C0603
GMCH_VREF_B
SRCOMP1
SRCOMP0
*
M_DQS_A[7..0] 19
M_DQS_AJ[7..0] 19
M_DQM_A[7..0] 19
M_DATA_A[63..0] 19
AE8
SVREF1
AG8
AG4
AE5
AF5
SRCOMP1
SRCOMP0
SOCOMP1
SOCOMP0
R304
40.2
+/-1%
R0603
SMOCOMP[1:0]
10 mils width, 10 mils spacing
place res close to GMCH
*
R300
40.2
+/-1%
R0603
SRCOMP1
M_DQS_A[7..0] 19
M_DQS_AJ[7..0] 19
M_DQM_A[7..0] 19
M_DATA_A[63..0] 19
3 OF 9
21
21
21
21
21
21
1D8V_STR
M_DQS_A[7..0] 19
M_DQS_AJ[7..0] 19
M_DQM_A[7..0] 19
M_DATA_A[63..0] 19
1
U21C
CHANNEL B
4
4OF 9
U21D
*
5
18,19 M_MAA_A[13..0]
*
R379
80.6
+/-1%
R0603
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
SDQS_B0
SDQS_B0#
SDM_B0
SDQ_B0
SDQ_B1
SDQ_B2
SDQ_B3
SDQ_B4
SDQ_B5
SDQ_B6
SDQ_B7
AK5
AL4
AJ5
AH4
AJ6
AL6
AN6
AG9
AH7
AL5
AM5
M_DQS_B0
M_DQS_BJ0
M_DQM_B0
M_DATA_B0
M_DATA_B1
M_DATA_B2
M_DATA_B3
M_DATA_B4
M_DATA_B5
M_DATA_B6
M_DATA_B7
SDQS_B1
SDQS_B1#
SDM_B1
SDQ_B8
SDQ_B9
SDQ_B10
SDQ_B11
SDQ_B12
SDQ_B13
SDQ_B14
SDQ_B15
AK10
AH10
AH9
AJ8
AL8
AF11
AE11
AJ7
AL7
AG10
AG11
M_DQS_B1
M_DQS_BJ1
M_DQM_B1
M_DATA_B8
M_DATA_B9
M_DATA_B10
M_DATA_B11
M_DATA_B12
M_DATA_B13
M_DATA_B14
M_DATA_B15
SDQS_B2
SDQS_B2#
SDM_B2
SDQ_B16
SDQ_B17
SDQ_B18
SDQ_B19
SDQ_B20
SDQ_B21
SDQ_B22
SDQ_B23
AK13
AL14
AH13
AF13
AH12
AD14
AD15
AD12
AE13
AG14
AF14
M_DQS_B2
M_DQS_BJ2
M_DQM_B2
M_DATA_B16
M_DATA_B17
M_DATA_B18
M_DATA_B19
M_DATA_B20
M_DATA_B21
M_DATA_B22
M_DATA_B23
SDQS_B3
SDQS_B3#
SDM_B3
SDQ_B24
SDQ_B25
SDQ_B26
SDQ_B27
SDQ_B28
SDQ_B29
SDQ_B30
SDQ_B31
AD20
AF20
AG20
AK19
AH19
AH21
AD21
AD18
AL18
AE22
AF22
M_DQS_B3
M_DQS_BJ3
M_DQM_B3
M_DATA_B24
M_DATA_B25
M_DATA_B26
M_DATA_B27
M_DATA_B28
M_DATA_B29
M_DATA_B30
M_DATA_B31
SDQS_B4
SDQS_B4#
SDM_B4
SDQ_B32
SDQ_B33
SDQ_B34
SDQ_B35
SDQ_B36
SDQ_B37
SDQ_B38
SDQ_B39
AH25
AG26
AG24
AF24
AF25
AL26
AJ26
AF23
AD23
AL25
AJ25
M_DQS_B4
M_DQS_BJ4
M_DQM_B4
M_DATA_B32
M_DATA_B33
M_DATA_B34
M_DATA_B35
M_DATA_B36
M_DATA_B37
M_DATA_B38
M_DATA_B39
SDQS_B5
SDQS_B5#
SDM_B5
SDQ_B40
SDQ_B41
SDQ_B42
SDQ_B43
SDQ_B44
SDQ_B45
SDQ_B46
SDQ_B47
AH28
AH30
AH31
AK32
AJ31
AG31
AF28
AJ29
AK33
AG30
AG27
M_DQS_B5
M_DQS_BJ5
M_DQM_B5
M_DATA_B40
M_DATA_B41
M_DATA_B42
M_DATA_B43
M_DATA_B44
M_DATA_B45
M_DATA_B46
M_DATA_B47
SDQS_B6
SDQS_B6#
SDM_B6
SDQ_B48
SDQ_B49
SDQ_B50
SDQ_B51
SDQ_B52
SDQ_B53
SDQ_B54
SDQ_B55
AB31
AC30
AD24
AF27
AE27
AC26
AB26
AE31
AE29
AC28
AB27
M_DQS_B6
M_DQS_BJ6
M_DQM_B6
M_DATA_B48
M_DATA_B49
M_DATA_B50
M_DATA_B51
M_DATA_B52
M_DATA_B53
M_DATA_B54
M_DATA_B55
SDQS_B7
SDQS_B7#
SDM_B7
SDQ_B56
SDQ_B57
SDQ_B58
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_B63
W27
Y28
W31
AA28
W29
V28
V29
Y26
AA29
W26
U26
M_DQS_B7
M_DQS_BJ7
M_DQM_B7
M_DATA_B56
M_DATA_B57
M_DATA_B58
M_DATA_B59
M_DATA_B60
M_DATA_B61
M_DATA_B62
M_DATA_B63
M_DQS_B[7..0] 21
M_DQS_BJ[7..0] 21
M_DQM_B[7..0] 21
M_DATA_B[63..0] 21
M_DQS_B[7..0] 21
M_DQS_BJ[7..0] 21
M_DQM_B[7..0] 21
M_DATA_B[63..0] 21
D
M_DQS_B[7..0] 21
M_DQS_BJ[7..0] 21
M_DQM_B[7..0] 21
M_DATA_B[63..0] 21
M_DQS_B[7..0] 21
M_DQS_BJ[7..0] 21
M_DQM_B[7..0] 21
M_DATA_B[63..0] 21
C
M_DQS_B[7..0] 21
M_DQS_BJ[7..0] 21
M_DQM_B[7..0] 21
M_DATA_B[63..0] 21
M_DQS_B[7..0] 21
M_DQS_BJ[7..0] 21
M_DQM_B[7..0] 21
M_DATA_B[63..0] 21
B
M_DQS_B[7..0] 21
M_DQS_BJ[7..0] 21
M_DQM_B[7..0] 21
M_DATA_B[63..0] 21
M_DQS_B[7..0] 21
M_DQS_BJ[7..0] 21
M_DQM_B[7..0] 21
M_DATA_B[63..0] 21
Grantsdale_MCH DDR2_EDS Rev 1.0
A
A
Grantsdale_MCH DDR2_EDS Rev 1.0
FOXCONN PCEG
Title
Grantsdale DDR2 GMCH -2
Size
Date:
5
4
3
2
Document Number
R ev
B
915A01 DDR2
Sheet
Tuesday, May 18, 2004
1
16
of
52
AM20
AM19
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
AM17
AM16
AK35
AM14
AM13
AM11
AM10
FSB_VTT
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
1D5V_PE_GMCH
C
VCCA_HPLL
VCCA_SMPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_EXPPLL
2D5V_MCH
2D5V_DAC
Y9
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
W9
W8
W7
W6
W1
W4
W3
W2
VCC_EXP1
VCC_EXP2
VCC_EXP3
VCC_EXP4
VCC_EXP5
VCC_EXP6
VCC_EXP7
VCC_EXP8
VCC_EXP9
VCC_EXP10
VCC_EXP11
VCC_EXP12
VCC_EXP13
VCC_EXP14
VCC_EXP15
VCC_EXP16
VCC_EXP17
A17
B17
A12
B13
A14
VCCA_HPLL
VCCA_SMPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_EXPPLL
A13
E13
D13
F13
VCC2
VCCA_DAC1
VCCA_DAC2
VCCA_DAC3
H22
G22
G21
F22
F21
F20
E22
E21
E20
E19
D22
D21
D20
D19
C22
C21
C20
C19
B22
B21
B20
B19
A22
A21
A20
A19
Grantsdale_MCH DDR2_EDS Rev 1.0
B
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
AA13
AA14
AA16
AA18
AA20
AA21
AA22
AA23
AA24
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
V24
W13
W14
W22
W24
Y13
Y14
Y15
Y21
Y23
Y24
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
U21G
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
AC25
AB25
AA25
AA11
Y25
Y18
Y11
W25
V25
V20
V16
V11
U25
U11
T25
T18
T11
R25
R11
P25
P11
N25
AD25
N11
M11
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
AA15
AA17
AA19
N17
N19
P16
P18
P20
R17
R19
R21
T22
U15
U21
U23
V22
W15
W21
W23
Y22
RSV1
RSV2
RSV3
RSV4
RSV5
RSV6
RSV7
RSV8
RSV9
RSV10
RSV11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
N12
N22
N23
N24
P12
P23
P24
R12
R24
T12
U12
V12
W12
Y12
AA12
AB12
AC23
AC24
Grantsdale_MCH DDR2_EDS Rev 1.0
2D5V_MCH
from GMCH to 1st cap must be less than 1 inch
L14
1
2D5V_DAC
2
FB L0805 80 Ohm
EC41
100uF
* 16V,
+/-20% *
CE20D50H110
2D5V_DAC Filter
BC281
0.1uF
25V, X7R, +/-10%
C0603
*
2D5V_DAC
BC280
10nF
50V,X7R,+/-10%
C0603
A10
A18
A26
A3
A30
A33
A5
AA1
AA10
AA26
AA2
AA27
AA3
AA4
AA5
AA6
AA7
AA8
AA9
AB28
AB30
AB32
AB35
AC27
AC31
AC32
AD11
AD13
AD16
AD19
AD22
AD26
AD27
AD34
AE12
AE14
AE15
AE17
AE18
AE20
AE21
AE23
AE24
AE28
AE30
AE32
AE4
AE6
AE9
AF1
AF10
AF12
AF15
AF18
AF21
AF26
AF29
AF30
AF31
AF32
AF35
AF4
AF6
AF8
AG12
AG13
AG15
AG16
AG18
AG19
AG21
AG22
AG25
AG28
AG29
AG5
AH1
AH11
AH14
AH17
AH20
AH23
AH26
AH29
AH32
AH34
AH5
AH6
AH8
AJ10
AJ13
AJ15
AJ16
AJ19
AJ22
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
AJ27
AJ30
AJ32
AJ35
AJ4
AJ9
AK1
AK11
AK14
AK17
AK20
AK23
AK25
AK26
AK28
AK30
AK4
AK6
AK7
AK8
AL10
AL13
AL16
AL19
AL22
AL32
AM29
AM31
AM4
AM6
AM7
AM8
AN1
AP8
AR13
AR17
AR21
AR25
AR3
AR30
AR6
B10
B12
B14
B16
B18
B2
B24
B28
B5
B6
B7
B8
B9
C1
C11
C13
C17
C18
C23
C3
C35
C4
D10
D11
D15
D16
D18
D23
D25
D26
D28
D3
D30
D31
D32
D4
D6
D7
D8
D9
E1
E10
E17
E18
E2
E23
E26
E29
E4
E6
E8
F10
F16
F18
F2
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
VSS361
VSS362
VSS363
VSS364
VSS365
VSS366
VSS367
VSS368
VSS369
VSS370
VSS371
VSS372
VSS373
VSS374
VSS375
VSS376
VSS377
VSS378
VSS379
VSS380
VSS381
VSS382
VSS383
VSS384
VSS385
VSS386
VSS387
VSS388
VSS389
VSS390
VSS395
W21(Redundant)
VSS392
F23
F25
F29
F30
F32
F35
F4
F5
F6
F8
G10
G11
G13
G15
G17
G19
G2
G20
G23
G26
G27
G28
G4
G7
G8
G9
H10
H13
H2
H21
H24
H25
H27
H30
H32
H34
H4
H5
H6
H9
J10
J15
J16
J17
J18
J2
J20
J23
J30
J4
J7
J8
J9
K10
K11
K14
K2
K20
K24
K26
K28
K31
K32
K35
K4
K5
K6
K9
L11
L13
L15
L16
L17
L18
L2
L20
L21
L22
L24
L27
L30
L32
L4
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
changed to V18
VSS303
VSS304
VSS394
VSS305
VSS391
VSS306
VSS396
VSS307
VSS397
VSS308
VSS398
VSS309
VSS399
VSS310
VSS400
VSS311
VSS401
VSS312
VSS313
VSS393
VSS314
VSS402
VSS315 Missed pins in
VSS316 Intel V1.0
VSS317
VSS318
VSS319
L7
L8
L9
M17
M2
M20
M24
M25
M27
M29
M34
M4
M5
M6
M9
N10
N2
N28
N30
N32
N4
N7
N8
N9
P2
P27
P29
P31
P32
P35
P4
P5
P6
P9
R2
R26
R27
R4
R7
R8
R9
T10
T2
T28
T30
T32
T34
T4
T5
T6
T7
U17
U19
U2
U27
U29
U31
U32
U4
U7
U8
U9
V1
V2
V26
V27
V35
V4
V6
V9
W11
W30
W19
1D8V_STR
Place with trace leading to the following balls:
AK35, AN35, AR31&AR33, AR21, AR17, AR13
*
BC357
10uF
6.3V,X7R,+/-20%
C0805
BC359
10uF
6.3V,X7R,+/-20%
C0805
BC355
10uF
6.3V,X7R,+/-20%
C0805
*
BC356
10uF
6.3V,X7R,+/-20%
C0805
BC360
10uF
6.3V,X7R,+/-20%
C0805
BC343
10uF
6.3V,X7R,+/-20%
C0805
*
*
D
*
*
2D6V_STR Decoupling
1D5V_CORE
*
BC376
56pF
50V,NPO,+/-10%
C0603
1D5V_CORE
*
BC337
56pF
50V,NPO,+/-10%
C0603
Place in 1D5V_CORE plane as close to the GMCH as possible
C
*
BC327
10uF
6.3V,X7R,+/-20%
C0805
*
BC330
10uF
6.3V,X7R,+/-20%
C0805
*
BC332
10uF
6.3V,X7R,+/-20%
C0805
*
BC334
0.47uF
10V, X7R, +/-10%
C0603
*
EC50
470uF
16V, +/-20%
CE35D80H200
1D5V_CORE Decoupling
1D5V_CORE
R254
L17
R0603
0.5
*
VCCSM20
VCCSM21
AC11
AB11
Y20
Y19
Y17
Y16
W20
W16
U20
U16
T20
T19
T17
T16
1
9 of 9
+/-5%
VCCA_EXPPLL
L0805 1uH
*
BC263
10uF
6.3V,X5R,+/-10%
C1206
*
BC283
0.1uF
25V, X7R, +/-10%
C0603
*
EC42
470uF
16V, +/-20%
CE35D80H200
*
BC265
0.1uF
25V, X7R, +/-10%
C0603
L16
*
AR33
AR31
AR26
AR22
AR18
AR14
AR10
AP28
AP24
AP20
AP16
AP12
AN35
AM32
AM28
AM26
AM25
AM23
AM22
U21I
VCCA_HPLL
L0805 10uH
B
L13
*
D
7 of 9
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
2
U21H
W28
W17
W32
Y27
Y29
Y31
Y32
Y34
VCCA_DPLLA
L0805 10uH
*
EC40
220uF
10V, +/-20%
CE25D60H110
*
EC44
220uF
10V, +/-20%
CE25D60H110
*
EC39
470uF
16V, +/-20%
CE35D80H200
*
BC279
0.1uF
25V, X7R, +/-10%
C0603
*
BC282
0.1uF
25V, X7R, +/-10%
C0603
*
BC284
0.1uF
25V, X7R, +/-10%
C0603
L12
*
U21F 6 OF 9
AD10 VCC1
AD9 VCC35
AD8 VCC3
AD7 VCC4
AD6 VCC5
AD5 VCC6
AD4 VCC7
AD3 VCC8
AD2 VCC9
AD1 VCC10
AC10 VCC11
AC9 VCC12
AC8 VCC13
AC7 VCC14
AC6 VCC15
AC5 VCC16
AC4 VCC17
AC3 VCC18
AC2 VCC19
AC1 VCC20
AB10 VCC21
AB9 VCC22
AB8 VCC23
AB7 VCC24
AB6 VCC25
AB5 VCC26
AB4 VCC27
AB3 VCC28
AB2 VCC29
AB1 VCC30
W18 VCC31
V19 VCC32
V17 VCC33
U18 VCC34
3
8of 9
1D5V_CORE
V18
AC29
VCCA_DPLLB
L0805 10uH
L15
*
4
1D8V_STR
*
5
1D5V_CORE
VCCA_SMPLL
L0805 10uH
from GMCH to 1st cap must be less than 1 inch
Grantsdale_MCH DDR2_EDS Rev 1.0
Grantsdale_MCH DDR2_EDS Rev 1.0
A
A
FSB_VTT
Place in FSB_VTT plane as close to the GMCH as possible
1D5V_CORE
*
BC249
10uF
6.3V,X7R,+/-20%
C0805
*
BC275
10uF
6.3V,X7R,+/-20%
C0805
*
L21
from GMCH to 1st cap must be less than 1 inch
*
FSB_VTT Decoupling
BC264
10uF
6.3V,X7R,+/-20%
C0805
L1211 82nH
PCI Express Filter
1D5V_PE_GMCH
*
EC48
220uF
10V, +/-20%
CE25D60H110
*
BC318
10uF
6.3V,X7R,+/-20%
C0805
*
FOXCONN PCEG
BC317
10uF
6.3V,X7R,+/-20%
C0805
Title
Grantsdale DDR2 GMCH -3
Size
Date:
5
4
3
2
Document Number
R ev
B
915A01 DDR2
Sheet
Tuesday, May 18, 2004
1
17
of
52
5
4
3
2
1
VTT_DDR
*
M_ODT_A[3..0] 16,19
R460
39
+/-5%
R0603 M_ODT_A0
39
+/-5%
R0603 M_ODT_A1
39
+/-5%
R0603 M_ODT_A2
39
+/-5%
R0603 M_ODT_A3
M_SCKE_A[3..0] 16,19
M_BS_A[2..0] 16,19
M_MAA_A[13..0] 16,19
40 ohm
R455
Value change from 47 to 39
R463
R457
R461
VTT_DDR
****
R465
R466
33
R452
+/-5% R0603 M_MAA_A10
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
*
1
3
5
7
*
1
3
5
7
*
1
3
5
7
B
RN21
33
+/-5%
8P4R0603
M_MAA_A3
M_MAA_A2
M_MAA_A1
M_MAA_A0
2
4
6
8
RN20
33
+/-5%
8P4R0603
M_MAA_A5
M_MAA_A8
M_MAA_A6
M_MAA_A4
2
4
6
8
RN19
33
+/-5%
8P4R0603
M_MAA_A12
M_MAA_A11
M_MAA_A7
M_MAA_A9
33
*
R462
2
4
6
8
39
+/-5%
R0603
39
+/-5%
R0603
39
+/-5%
R0603
39
+/-5%
R0603
33
+/-5% R0603
M_BS_A2
33
+/-5% R0603
M_BS_A1
33
+/-5% R0603
M_BS_A0
M_SCS_A2J
16,19
M_SCS_A3J
16,19
M_SCS_A0J
16,19
M_SCS_A1J
16,19
VTT_DDR
C
C
*
1
3
5
7
M_SCKE_A2
M_SCKE_A1
M_SCKE_A3
M_SCKE_A0
RN18
2
4 39
6 +/-5%
8 8P4R0603
VTT_DDR
R454
R456
R459
***
*
R453
R451
D
VTT_DDR
***
R458
*
R464
* *
D
33
33
33
+/-5% R0603
M_RAS_AJ
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
+/-5% R0603
M_WE_AJ
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
+/-5% R0603
M_CAS_AJ
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
16,19
16,19
16,19
M_MAA_A13
+/-5% R0603
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
VTT_DDR
B
VTT_DDR
Channel A VTT_0.9V high-frequency decoupling caps.
As close to termination resistors as possible
Channel A VTT_0.9V bulk decoupling caps.
Place one at each end and one in the
center of termination island
C0603
BC419
C0603
BC417
C0603
BC416
C0603
BC422
C0603
BC496
C0603
BC485
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
0.1uF
4.7uF
C0603
BC423
25V, X7R, +/-10%
0.1uF
BC498
C0603
BC488
25V, X7R, +/-10%
0.1uF
6.3V,X7R,+/-10%
4.7uF
C0603
BC497
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
* *
6.3V,X7R,+/-10%
C0603
BC495
25V, X7R, +/-10%
0.1uF
C0805
BC427
C0603
BC483
25V, X7R, +/-10%
0.1uF
C0805
C0603
BC493
25V, X7R, +/-10%
0.1uF
BC426
C0603
BC492
C0603
* * * * * * * * * * * * * *
A
A
FOXCONN PCEG
Title
DDR2 Channel A Termination
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
18
of
52
5
4
3
2
CN22
1D8V_STR
EC60
470uF
16V, +/-20%
CE35D80H200
*
D
Channel A DDRII_1.8V bulk decoupling caps.
Place at each corner of the DIMMs
*
EC57
470uF
16V, +/-20%
CE35D80H200
1D8V_STR
*
R405
1K
+/-1%
R0603
SMVREF_A
*
R408
1K
+/-1%
R0603
*
BC377
0.1uF
25V, X7R, +/-10%
C0603
Place this cap
close to
divider
C
Channel A DIMM1 DDRII_1.8V high-frequency decoupling caps.
placement
1D8V_STR
BC48
BC70
*
*
1uF
1uF
1uF
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
BC468
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
*
1D8V_STR
7,21,44 SMB_DATA_MAIN
16,18 M_SCKE_A[3..0]
M_SCKE_A1
M_SCKE_A0
16,18 M_SCS_A1J
16,18 M_SCS_A0J
16
16
16
16
16
16
CK_M_200M_N_DDR2_A
CK_M_200M_P_DDR2_A
CK_M_200M_N_DDR1_A
CK_M_200M_P_DDR1_A
CK_M_200M_N_DDR0_A
CK_M_200M_P_DDR0_A
16,18 M_MAA_A[13..0]
M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A11
M_MAA_A12
M_MAA_A13
A
16,18 M_BS_A[2..0]
M_BS_A2
16,18 M_CAS_AJ
16,18 M_RAS_AJ
16,18 M_WE_AJ
101
240
239
SA2
SA1
SA0
190
71
BA1
BA0
171
52
CKE1
CKE0
76
193
S1#
S0#
221
220
138
137
186
185
CK2#/RFU
CK2/RFU
CK1#/RFU
CK1/RFU
CK0#
CK0
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
54
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
74
192
73
CAS#
RAS#
WE#
77
195
CB<0>
CB<1>
CB<2>
CB<3>
CB<4>
CB<5>
CB<6>
CB<7>
42
43
48
49
161
162
167
168
241
243
245
241
243
245
DQS<0>
DQS#<0>
7
6
DQS<1>
DQS#<1>
16
15
DQS<2>
DQS#<2>
28
27
DQS<3>
DQS#<3>
37
36
DQS<4>
DQS#<4>
84
83
DQS<5>
DQS#<5>
93
92
DQS<6>
DQS#<6>
105
104
DQS<7>
DQS#<7>
114
113
DQS<8>
DQS#<8>
46
45
M_ODT_A1
M_ODT_A0
M_DQS_AJ[7..0] 16
M_DQS_A0
M_DQS_AJ0
M_DQS_A1
M_DQS_AJ1
M_DQS_A2
M_DQS_AJ2
M_DQS_A3
M_DQS_AJ3
M_DQS_A4
M_DQS_AJ4
M_DQS_A5
M_DQS_AJ5
M_DQS_A6
M_DQS_AJ6
M_DQS_A7
M_DQS_AJ7
DM0/DQS9
NC/DQS9#
125
126
M_DQM_A0
DM1/DQS10
NC/DQS10#
134
135
M_DQM_A1
DM2/DQS11
NC/DQS11#
146
147
M_DQM_A2
DM3/DQS12
NC/DQS12#
155
156
M_DQM_A3
DM4/DQS13
NC/DQS13#
202
203
M_DQM_A4
DM5/DQS14
NC/DQS14#
211
212
M_DQM_A5
DM6/DQS15
NC/DQS15#
223
224
M_DQM_A6
DM7/DQS16
NC/DQS16#
232
233
M_DQM_A7
DM8/DQS17
NC/DQS17#
164
165
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQ<8>
DQ<9>
DQ<10>
DQ<11>
DQ<12>
DQ<13>
DQ<14>
DQ<15>
DQ<16>
DQ<17>
DQ<18>
DQ<19>
DQ<20>
DQ<21>
DQ<22>
DQ<23>
DQ<24>
DQ<25>
DQ<26>
DQ<27>
DQ<28>
DQ<29>
DQ<30>
DQ<31>
DQ<32>
DQ<33>
DQ<34>
DQ<35>
DQ<36>
DQ<37>
DQ<38>
DQ<39>
DQ<40>
DQ<41>
DQ<42>
DQ<43>
DQ<44>
DQ<45>
DQ<46>
DQ<47>
DQ<48>
DQ<49>
DQ<50>
DQ<51>
DQ<52>
DQ<53>
DQ<54>
DQ<55>
DQ<56>
DQ<57>
DQ<58>
DQ<59>
DQ<60>
DQ<61>
DQ<62>
DQ<63>
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
M_DQS_A[7..0] 16
1D8V_STR
M_DQM_A[7..0] 16
M_DATA_A0
M_DATA_A1
M_DATA_A2
M_DATA_A3
M_DATA_A4
M_DATA_A5
M_DATA_A6
M_DATA_A7
M_DATA_A8
M_DATA_A9
M_DATA_A10
M_DATA_A11
M_DATA_A12
M_DATA_A13
M_DATA_A14
M_DATA_A15
M_DATA_A16
M_DATA_A17
M_DATA_A18
M_DATA_A19
M_DATA_A20
M_DATA_A21
M_DATA_A22
M_DATA_A23
M_DATA_A24
M_DATA_A25
M_DATA_A26
M_DATA_A27
M_DATA_A28
M_DATA_A29
M_DATA_A30
M_DATA_A31
M_DATA_A32
M_DATA_A33
M_DATA_A34
M_DATA_A35
M_DATA_A36
M_DATA_A37
M_DATA_A38
M_DATA_A39
M_DATA_A40
M_DATA_A41
M_DATA_A42
M_DATA_A43
M_DATA_A44
M_DATA_A45
M_DATA_A46
M_DATA_A47
M_DATA_A48
M_DATA_A49
M_DATA_A50
M_DATA_A51
M_DATA_A52
M_DATA_A53
M_DATA_A54
M_DATA_A55
M_DATA_A56
M_DATA_A57
M_DATA_A58
M_DATA_A59
M_DATA_A60
M_DATA_A61
M_DATA_A62
M_DATA_A63
M_DATA_A[63..0] 16
3D3V_SYS
7,21,44 SMB_CLK_MAIN
7,21,44 SMB_DATA_MAIN
SMVREF_A
Place this cap close to DIMM
16,18 M_BS_A[2..0]
*
SMVREF_A
BC405
0.1uF
25V, X7R, +/-10%
SA2 SA1 SA0
C0603
0
0
1
M_BS_A1
M_BS_A0
16,18 M_SCKE_A[3..0]
M_SCKE_A3
M_SCKE_A2
16,18 M_SCS_A3J
16,18 M_SCS_A2J
16
16
16
16
16
16
CK_M_200M_N_DDR5_A
CK_M_200M_P_DDR5_A
CK_M_200M_N_DDR4_A
CK_M_200M_P_DDR4_A
CK_M_200M_N_DDR3_A
CK_M_200M_P_DDR3_A
16,18 M_MAA_A[13..0]
M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A11
M_MAA_A12
M_MAA_A13
M_BS_A2
16,18 M_BS_A[2..0]
16,18 M_CAS_AJ
16,18 M_RAS_AJ
16,18 M_WE_AJ
DDR2_DIMM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
18
55
238
1
120
119
RC1
RC0
VDDSPD
VREF
SCL
SDA
101
240
239
SA2
SA1
SA0
190
71
BA1
BA0
171
52
CKE1
CKE0
76
193
S1#
S0#
221
220
138
137
186
185
CK2#/RFU
CK2/RFU
CK1#/RFU
CK1/RFU
CK0#
CK0
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
54
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
74
192
73
CAS#
RAS#
WE#
NC68
NC/TEST
NC19
68
102
19
ODT1
ODT0
77
195
CB<0>
CB<1>
CB<2>
CB<3>
CB<4>
CB<5>
CB<6>
CB<7>
42
43
48
49
161
162
167
168
241
243
245
241
243
245
M_ODT_A[3..0] 16,18
M_ODT_A3
M_ODT_A2
D
M_DQS_A0
M_DQS_AJ0
DQS<0>
DQS#<0>
7
6
DQS<1>
DQS#<1>
16
15
M_DQS_A1
M_DQS_AJ1
DQS<2>
DQS#<2>
28
27
M_DQS_A2
M_DQS_AJ2
DQS<3>
DQS#<3>
37
36
M_DQS_A3
M_DQS_AJ3
DQS<4>
DQS#<4>
84
83
M_DQS_A4
M_DQS_AJ4
DQS<5>
DQS#<5>
93
92
M_DQS_A5
M_DQS_AJ5
DQS<6>
DQS#<6>
105
104
M_DQS_A6
M_DQS_AJ6
DQS<7>
DQS#<7>
114
113
M_DQS_A7
M_DQS_AJ7
DQS<8>
DQS#<8>
46
45
DM0/DQS9
NC/DQS9#
125
126
M_DQM_A0
DM1/DQS10
NC/DQS10#
134
135
M_DQM_A1
DM2/DQS11
NC/DQS11#
146
147
M_DQM_A2
DM3/DQS12
NC/DQS12#
155
156
M_DQM_A3
DM4/DQS13
NC/DQS13#
202
203
M_DQM_A4
DM5/DQS14
NC/DQS14#
211
212
M_DQM_A5
DM6/DQS15
NC/DQS15#
223
224
M_DQM_A6
DM7/DQS16
NC/DQS16#
232
233
M_DQM_A7
DM8/DQS17
NC/DQS17#
164
165
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQ<8>
DQ<9>
DQ<10>
DQ<11>
DQ<12>
DQ<13>
DQ<14>
DQ<15>
DQ<16>
DQ<17>
DQ<18>
DQ<19>
DQ<20>
DQ<21>
DQ<22>
DQ<23>
DQ<24>
DQ<25>
DQ<26>
DQ<27>
DQ<28>
DQ<29>
DQ<30>
DQ<31>
DQ<32>
DQ<33>
DQ<34>
DQ<35>
DQ<36>
DQ<37>
DQ<38>
DQ<39>
DQ<40>
DQ<41>
DQ<42>
DQ<43>
DQ<44>
DQ<45>
DQ<46>
DQ<47>
DQ<48>
DQ<49>
DQ<50>
DQ<51>
DQ<52>
DQ<53>
DQ<54>
DQ<55>
DQ<56>
DQ<57>
DQ<58>
DQ<59>
DQ<60>
DQ<61>
DQ<62>
DQ<63>
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
C
M_DATA_A0
M_DATA_A1
M_DATA_A2
M_DATA_A3
M_DATA_A4
M_DATA_A5
M_DATA_A6
M_DATA_A7
M_DATA_A8
M_DATA_A9
M_DATA_A10
M_DATA_A11
M_DATA_A12
M_DATA_A13
M_DATA_A14
M_DATA_A15
M_DATA_A16
M_DATA_A17
M_DATA_A18
M_DATA_A19
M_DATA_A20
M_DATA_A21
M_DATA_A22
M_DATA_A23
M_DATA_A24
M_DATA_A25
M_DATA_A26
M_DATA_A27
M_DATA_A28
M_DATA_A29
M_DATA_A30
M_DATA_A31
M_DATA_A32
M_DATA_A33
M_DATA_A34
M_DATA_A35
M_DATA_A36
M_DATA_A37
M_DATA_A38
M_DATA_A39
M_DATA_A40
M_DATA_A41
M_DATA_A42
M_DATA_A43
M_DATA_A44
M_DATA_A45
M_DATA_A46
M_DATA_A47
M_DATA_A48
M_DATA_A49
M_DATA_A50
M_DATA_A51
M_DATA_A52
M_DATA_A53
M_DATA_A54
M_DATA_A55
M_DATA_A56
M_DATA_A57
M_DATA_A58
M_DATA_A59
M_DATA_A60
M_DATA_A61
M_DATA_A62
M_DATA_A63
Channel A DIMM2 DDRII_1.8V high-frequency decoupling caps.
placement
1D8V_STR
*
3
2
*
BC523
BC482
1uF
1uF
C0603
C0603
10V, X5R, +/-10%
10V, X5R, +/-10%
FOXCONN PCEG
Title
DDR2 Channel A DIMM 1, 2
Size
DDR2_DIMM
4
*
A
Date:
5
B
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
SMVREF_A
BC404
0.1uF
25V, X7R, +/-10%
SA2 SA1 SA0
C0603
0
0
0
M_BS_A1
M_BS_A0
ODT1
ODT0
M_ODT_A[3..0] 16,18
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
51
56
62
72
75
78
191
194
181
175
170
53
59
64
197
69
172
187
184
178
189
67
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
16,18 M_BS_A[2..0]
*
RC1
RC0
VDDSPD
VREF
SCL
SDA
68
102
19
1uF
Place this cap close to DIMM
18
55
238
1
120
119
CN23
NC68
NC/TEST
NC19
BC415
3D3V_SYS
7,21,44 SMB_CLK_MAIN
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
B
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
51
56
62
72
75
78
191
194
181
175
170
53
59
64
197
69
172
187
184
178
189
67
1
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
19
of
52
5
4
3
2
1
M_SCKE_B[3..0] 16,21
M_BS_B[2..0] 16,21
VTT_DDR
M_ODT_B[3..0] 16,21
M_MAA_B[13..0] 16,21
VTT_DDR
D
2
4
6
8
RN26
39
+/-5%
8P4R0603
M_ODT_B2
M_ODT_B3
M_ODT_B0
M_ODT_B1
R511
R512
R514
VTT_DDR
R515
R504
*
1
3
5
7
+/-5% R0603 M_MAA_B0
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
33
* *
R505
R503
R507
+/-5% R0603 M_MAA_B10
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
33
2
4
6
8
RN25
33
+/-5%
8P4R0603
M_MAA_B3
M_MAA_B2
M_MAA_B1
2
4
6
8
RN24
33
+/-5%
8P4R0603
M_MAA_B5
M_MAA_B8
M_MAA_B6
M_MAA_B4
2
4
6
8
RN23
33
+/-5%
8P4R0603
M_MAA_B12
M_MAA_B11
M_MAA_B7
M_MAA_B9
R506
39
+/-5%
R0603
39
+/-5%
R0603
39
+/-5%
R0603
39
+/-5%
R0603
33
+/-5% R0603
M_BS_B2
33
+/-5% R0603
M_BS_B1
33
+/-5% R0603
M_BS_B0
***
*
1
3
5
7
****
D
M_SCS_B2J
16,21
M_SCS_B3J
16,21
M_SCS_B0J
16,21
M_SCS_B1J
16,21
VTT_DDR
C
C
*
1
3
5
7
*
1
3
5
7
*
R509
R513
33
VTT_DDR
RN22
2
4 39
6 +/-5%
8 8P4R0603
M_SCKE_B2
M_SCKE_B3
M_SCKE_B0
M_SCKE_B1
VTT_DDR
M_MAA_B13
+/-5% R0603
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
R508
R510
***
*
1
3
5
7
33
33
33
+/-5% R0603
M_RAS_BJ
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
+/-5% R0603
M_WE_BJ
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
+/-5% R0603
M_CAS_BJ
RES, 33 Ohm, +/-5%, 1/10W, SMD0603
16,21
16,21
16,21
VTT_DDR
Channel B VTT_0.9V high-frequency decoupling caps.
As close to termination resistors as possible
Channel B VTT_0.9V bulk decoupling caps.
Place one at each end and one in the
center of termination island
B
B
C0603
BC425
C0603
BC486
C0603
BC484
C0603
BC494
C0603
BC424
C0603
BC413
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
6.3V,X7R,+/-10%
0.1uF
4.7uF
C0603
BC474
25V, X7R, +/-10%
0.1uF
BC477
C0603
BC487
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
* *
6.3V,X7R,+/-10%
4.7uF
C0603
BC489
25V, X7R, +/-10%
0.1uF
C0805
C0603
BC472
25V, X7R, +/-10%
0.1uF
C0805
BC421
C0603
BC473
25V, X7R, +/-10%
0.1uF
BC412
C0603
BC490
25V, X7R, +/-10%
0.1uF
C0603
C0603
BC491
* * * * * * * * * * * * * *
A
A
FOXCONN PCEG
Title
DDR2 Channel B Termination
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
20
of
52
5
4
3
2
CN24
1D8V_STR
D
Channel B DDRII_1.8V bulk decoupling caps.
Place at each corner of the DIMMs
EC58
470uF
16V, +/-20%
CE35D80H200
*
*
EC59
470uF
16V, +/-20%
CE35D80H200
Channel B DIMM1 DDRII_1.8V high-frequency
decoupling caps.
placement
TBD
1D8V_STR
*
BC469
BC467
*
*
1uF
1uF
1uF
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
BC420
1uF
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
BC471
C
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
*
1D8V_STR
*
1D8V_STR
R407
1K
+/-1%
R0603
SMVREF_B
*
R413
1K
+/-1%
R0603
*
SMVREF_B
M_MAA_B0
M_MAA_B1
M_MAA_B2
M_MAA_B3
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_MAA_B10
M_MAA_B11
M_MAA_B12
M_MAA_B13
A
16,20 M_BS_B[2..0]
M_BS_B2
16,20 M_CAS_BJ
16,20 M_RAS_BJ
16,20 M_WE_BJ
76
193
S1#
S0#
221
220
138
137
186
185
CK2#/RFU
CK2/RFU
CK1#/RFU
CK1/RFU
CK0#
CK0
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
54
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
74
192
73
CAS#
RAS#
WE#
16
15
DQS<2>
DQS#<2>
28
27
DQS<3>
DQS#<3>
37
36
DQS<4>
DQS#<4>
84
83
DQS<5>
DQS#<5>
93
92
DQS<6>
DQS#<6>
105
104
DQS<7>
DQS#<7>
114
113
DQS<8>
DQS#<8>
46
45
M_DQS_B0
M_DQS_BJ0
M_DQS_B1
M_DQS_BJ1
M_DQS_B2
M_DQS_BJ2
M_DQS_B3
M_DQS_BJ3
M_DQS_B4
M_DQS_BJ4
M_DQS_B5
M_DQS_BJ5
M_DQS_B6
M_DQS_BJ6
M_DQS_B7
M_DQS_BJ7
DM0/DQS9
NC/DQS9#
125
126
M_DQM_B0
DM1/DQS10
NC/DQS10#
134
135
M_DQM_B1
DM2/DQS11
NC/DQS11#
146
147
M_DQM_B2
DM3/DQS12
NC/DQS12#
155
156
M_DQM_B3
DM4/DQS13
NC/DQS13#
202
203
M_DQM_B4
DM5/DQS14
NC/DQS14#
211
212
M_DQM_B5
DM6/DQS15
NC/DQS15#
223
224
M_DQM_B6
DM7/DQS16
NC/DQS16#
232
233
M_DQM_B7
DM8/DQS17
NC/DQS17#
164
165
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQ<8>
DQ<9>
DQ<10>
DQ<11>
DQ<12>
DQ<13>
DQ<14>
DQ<15>
DQ<16>
DQ<17>
DQ<18>
DQ<19>
DQ<20>
DQ<21>
DQ<22>
DQ<23>
DQ<24>
DQ<25>
DQ<26>
DQ<27>
DQ<28>
DQ<29>
DQ<30>
DQ<31>
DQ<32>
DQ<33>
DQ<34>
DQ<35>
DQ<36>
DQ<37>
DQ<38>
DQ<39>
DQ<40>
DQ<41>
DQ<42>
DQ<43>
DQ<44>
DQ<45>
DQ<46>
DQ<47>
DQ<48>
DQ<49>
DQ<50>
DQ<51>
DQ<52>
DQ<53>
DQ<54>
DQ<55>
DQ<56>
DQ<57>
DQ<58>
DQ<59>
DQ<60>
DQ<61>
DQ<62>
DQ<63>
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
M_DQS_B[7..0] 16
1D8V_STR
M_DQM_B[7..0] 16
M_DATA_B0
M_DATA_B1
M_DATA_B2
M_DATA_B3
M_DATA_B4
M_DATA_B5
M_DATA_B6
M_DATA_B7
M_DATA_B8
M_DATA_B9
M_DATA_B10
M_DATA_B11
M_DATA_B12
M_DATA_B13
M_DATA_B14
M_DATA_B15
M_DATA_B16
M_DATA_B17
M_DATA_B18
M_DATA_B19
M_DATA_B20
M_DATA_B21
M_DATA_B22
M_DATA_B23
M_DATA_B24
M_DATA_B25
M_DATA_B26
M_DATA_B27
M_DATA_B28
M_DATA_B29
M_DATA_B30
M_DATA_B31
M_DATA_B32
M_DATA_B33
M_DATA_B34
M_DATA_B35
M_DATA_B36
M_DATA_B37
M_DATA_B38
M_DATA_B39
M_DATA_B40
M_DATA_B41
M_DATA_B42
M_DATA_B43
M_DATA_B44
M_DATA_B45
M_DATA_B46
M_DATA_B47
M_DATA_B48
M_DATA_B49
M_DATA_B50
M_DATA_B51
M_DATA_B52
M_DATA_B53
M_DATA_B54
M_DATA_B55
M_DATA_B56
M_DATA_B57
M_DATA_B58
M_DATA_B59
M_DATA_B60
M_DATA_B61
M_DATA_B62
M_DATA_B63
M_DATA_B[63..0] 16
3D3V_SYS
7,19,44 SMB_CLK_MAIN
7,19,44 SMB_DATA_MAIN
Place this cap close to DIMM
16,20 M_BS_B[2..0]
*
SMVREF_B
BC428
0.1uF
25V, X7R, +/-10%
SA2 SA1 SA0
C0603
0
1
1
M_BS_B1
M_BS_B0
16,20 M_SCKE_B[3..0]
M_SCKE_B3
M_SCKE_B2
16,20 M_SCS_B3J
16,20 M_SCS_B2J
16
16
16
16
16
16
CK_M_200M_N_DDR5_B
CK_M_200M_P_DDR5_B
CK_M_200M_N_DDR4_B
CK_M_200M_P_DDR4_B
CK_M_200M_N_DDR3_B
CK_M_200M_P_DDR3_B
16,20 M_MAA_B[13..0]
16,20 M_BS_B[2..0]
M_MAA_B0
M_MAA_B1
M_MAA_B2
M_MAA_B3
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_MAA_B10
M_MAA_B11
M_MAA_B12
M_MAA_B13
M_BS_B2
16,20 M_CAS_BJ
16,20 M_RAS_BJ
16,20 M_WE_BJ
DDR2_DIMM
18
55
238
1
120
119
RC1
RC0
VDDSPD
VREF
SCL
SDA
101
240
239
SA2
SA1
SA0
190
71
BA1
BA0
171
52
CKE1
CKE0
76
193
S1#
S0#
221
220
138
137
186
185
CK2#/RFU
CK2/RFU
CK1#/RFU
CK1/RFU
CK0#
CK0
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
54
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
74
192
73
CAS#
RAS#
WE#
42
43
48
49
161
162
167
168
241
243
245
241
243
245
D
DQS<0>
DQS#<0>
7
6
M_DQS_B0
M_DQS_BJ0
DQS<1>
DQS#<1>
16
15
M_DQS_B1
M_DQS_BJ1
DQS<2>
DQS#<2>
28
27
M_DQS_B2
M_DQS_BJ2
DQS<3>
DQS#<3>
37
36
M_DQS_B3
M_DQS_BJ3
DQS<4>
DQS#<4>
84
83
M_DQS_B4
M_DQS_BJ4
DQS<5>
DQS#<5>
93
92
M_DQS_B5
M_DQS_BJ5
DQS<6>
DQS#<6>
105
104
M_DQS_B6
M_DQS_BJ6
DQS<7>
DQS#<7>
114
113
M_DQS_B7
M_DQS_BJ7
DQS<8>
DQS#<8>
46
45
DM0/DQS9
NC/DQS9#
125
126
M_DQM_B0
DM1/DQS10
NC/DQS10#
134
135
M_DQM_B1
DM2/DQS11
NC/DQS11#
146
147
M_DQM_B2
DM3/DQS12
NC/DQS12#
155
156
M_DQM_B3
DM4/DQS13
NC/DQS13#
202
203
M_DQM_B4
DM5/DQS14
NC/DQS14#
211
212
M_DQM_B5
DM6/DQS15
NC/DQS15#
223
224
M_DQM_B6
DM7/DQS16
NC/DQS16#
232
233
M_DQM_B7
DM8/DQS17
NC/DQS17#
164
165
DQ<0>
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQ<8>
DQ<9>
DQ<10>
DQ<11>
DQ<12>
DQ<13>
DQ<14>
DQ<15>
DQ<16>
DQ<17>
DQ<18>
DQ<19>
DQ<20>
DQ<21>
DQ<22>
DQ<23>
DQ<24>
DQ<25>
DQ<26>
DQ<27>
DQ<28>
DQ<29>
DQ<30>
DQ<31>
DQ<32>
DQ<33>
DQ<34>
DQ<35>
DQ<36>
DQ<37>
DQ<38>
DQ<39>
DQ<40>
DQ<41>
DQ<42>
DQ<43>
DQ<44>
DQ<45>
DQ<46>
DQ<47>
DQ<48>
DQ<49>
DQ<50>
DQ<51>
DQ<52>
DQ<53>
DQ<54>
DQ<55>
DQ<56>
DQ<57>
DQ<58>
DQ<59>
DQ<60>
DQ<61>
DQ<62>
DQ<63>
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
DDR2_DIMM
M_DATA_B0
M_DATA_B1
M_DATA_B2
M_DATA_B3
M_DATA_B4
M_DATA_B5
M_DATA_B6
M_DATA_B7
M_DATA_B8
M_DATA_B9
M_DATA_B10
M_DATA_B11
M_DATA_B12
M_DATA_B13
M_DATA_B14
M_DATA_B15
M_DATA_B16
M_DATA_B17
M_DATA_B18
M_DATA_B19
M_DATA_B20
M_DATA_B21
M_DATA_B22
M_DATA_B23
M_DATA_B24
M_DATA_B25
M_DATA_B26
M_DATA_B27
M_DATA_B28
M_DATA_B29
M_DATA_B30
M_DATA_B31
M_DATA_B32
M_DATA_B33
M_DATA_B34
M_DATA_B35
M_DATA_B36
M_DATA_B37
M_DATA_B38
M_DATA_B39
M_DATA_B40
M_DATA_B41
M_DATA_B42
M_DATA_B43
M_DATA_B44
M_DATA_B45
M_DATA_B46
M_DATA_B47
M_DATA_B48
M_DATA_B49
M_DATA_B50
M_DATA_B51
M_DATA_B52
M_DATA_B53
M_DATA_B54
M_DATA_B55
M_DATA_B56
M_DATA_B57
M_DATA_B58
M_DATA_B59
M_DATA_B60
M_DATA_B61
M_DATA_B62
M_DATA_B63
C
Channel B DIMM2 DDRII_1.8V high-frequency
decoupling caps.
placement
*
4
3
*
*
B
FOXCONN PCEG
Title
DDR2 Channel B DIMM 1, 2
Size
2
*
A
Date:
5
TBD
1D8V_STR
1uF
CK_M_200M_N_DDR2_B
CK_M_200M_P_DDR2_B
CK_M_200M_N_DDR1_B
CK_M_200M_P_DDR1_B
CK_M_200M_N_DDR0_B
CK_M_200M_P_DDR0_B
16,20 M_MAA_B[13..0]
CKE1
CKE0
7
6
DQS<1>
DQS#<1>
CB<0>
CB<1>
CB<2>
CB<3>
CB<4>
CB<5>
CB<6>
CB<7>
M_ODT_B[3..0] 16,20
M_ODT_B3
M_ODT_B2
BC410
16
16
16
16
16
16
BA1
BA0
171
52
DQS<0>
DQS#<0>
M_DQS_BJ[7..0] 16
77
195
1uF
16,20 M_SCS_B1J
16,20 M_SCS_B0J
190
71
241
243
245
ODT1
ODT0
BC475
M_SCKE_B1
M_SCKE_B0
SA2
SA1
SA0
241
243
245
68
102
19
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
16,20 M_SCKE_B[3..0]
101
240
239
42
43
48
49
161
162
167
168
NC68
NC/TEST
NC19
1uF
SMVREF_B
BC430
0.1uF
25V, X7R, +/-10%
SA2 SA1 SA0
C0603
0
1
0
M_BS_B1
M_BS_B0
CB<0>
CB<1>
CB<2>
CB<3>
CB<4>
CB<5>
CB<6>
CB<7>
M_ODT_B1
M_ODT_B0
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
BC470
16,20 M_BS_B[2..0]
*
77
195
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
51
56
62
72
75
78
191
194
181
175
170
53
59
64
197
69
172
187
184
178
189
67
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
Place this cap close to DIMM
RC1
RC0
VDDSPD
VREF
SCL
SDA
ODT1
ODT0
M_ODT_B[3..0] 16,20
1uF
7,19,44 SMB_CLK_MAIN
7,19,44 SMB_DATA_MAIN
18
55
238
1
120
119
68
102
19
BC418
3D3V_SYS
B
NC68
NC/TEST
NC19
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
spacing 15 mils
trace width 12 mils
5 mils minimum for a max. of 300 mils
in the GMCH break-out area
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
C0603
10V, X5R, +/-10%
CAP, 1uF, +/-10%, X5R, 10V, SMD0603
BC378
0.1uF
25V, X7R, +/-10%
C0603
Place this cap
close to
divider
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
51
56
62
72
75
78
191
194
181
175
170
53
59
64
197
69
172
187
184
178
189
67
1
CN26
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
21
of
52
5
4
3
3D3V_DUAL
2
3D3V_SYS 12V_SYS
12V_SYS
1
3D3V_SYS
CN16
27,36,37,38,39,40,41 PSCLK
27,36,37,38,39,40,41 PSDATA
D
WAKEJ
24,36,37,38 WAKEJ
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
12V
12V
RSVDB3
GND
SMCLK
SMDAT
GND
3.3V
JTAG1
3.3VAUX
WAKE#
PRSNT1#
12V
12V
GND
JTAG2
JTAG3
JTAG4
JTAG5
3.3V
3.3V
PWRGD
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
D
ICH_G_PLTRSTJ
ICH_G_PLTRSTJ 26,36,37,38
KEY
EXP_TXP10
15
EXP_TXP11
15
EXP_TXP12
15
EXP_TXP13
15
EXP_TXP14
15
EXP_TXP15
EXP_TXP10_C
0.1uF
25V, X7R, +/-10%
EXP_TXP11
BC296
C0603
EXP_TXP11_C
*
*
*
EXP_TXP12
BC298
C0603
0.1uF
25V, X7R, +/-10%
EXP_TXP13
BC301
C0603
EXP_TXP14
BC306
C0603
EXP_TXP15
BC310
C0603
A
*
*
*
15
15
15
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
15
EXP_TXN12
EXP_TXP13_C
0.1uF
25V, X7R, +/-10%
15
EXP_TXN13
15
EXP_TXN14
EXP_TXP14_C
0.1uF
25V, X7R, +/-10%
EXP_TXP15_C
0.1uF
25V, X7R, +/-10%
EXP_TXN6
BC246
C0603
EXP_TXN6_C
0.1uF
25V, X7R, +/-10%
EXP_TXN7
BC255
C0603
EXP_TXN7_C
0.1uF
25V, X7R, +/-10%
GND
REFCLK+
REFCLKGND
HSIP0
HSIN0
GND
A12
A13
A14
A15
A16
A17
A18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
HSOP1
HSON1
GND
GND
HSOP2
HSON2
GND
GND
HSOP3
HSON3
GND
RSVDB30
PRSNT2_B31#
GND
RSVD
GND
HSIP1
HSIN1
GND
GND
HSIP2
HSIN2
GND
GND
HSIP3
HSIN3
GND
RSVDA32
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
HSOP4
HSON4
GND
GND
HSOP5
HSON5
GND
GND
HSOP6
HSON6
GND
GND
HSOP7
HSON7
GND
PRSNT2_B48#
GND
RSVDA33
GND
HSIP4
HSIN4
GND
GND
HSIP5
HSIN5
GND
GND
HSIP6
HSIN6
GND
GND
HSIP7
HSIN7
GND
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
HSOP8
HSON8
GND
GND
HSOP9
HSON9
GND
GND
HSOP10
HSON10
GND
GND
HSOP11
HSON11
GND
GND
HSOP12
HSON12
GND
GND
HSOP13
HSON13
GND
GND
HSOP14
HSON14
GND
GND
HSOP15
HSON15
GND
PRSNT2_B81#
RSVDB82
RSVDA50
GND
HSIP8
HSIN8
GND
GND
HSIP9
HSIN9
GND
GND
HSIP10
HSIN10
GND
GND
HSIP11
HSIN11
GND
GND
HSIP12
HSIN12
GND
GND
HSIP13
HSIN13
GND
GND
HSIP14
HSIN14
GND
GND
HSIP15
HSIN15
GND
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
CK_PE_100M_P_16PORT
CK_PE_100M_N_16PORT
CK_PE_100M_P_16PORT 7
CK_PE_100M_N_16PORT 7
EXP_RXP0
EXP_RXN0
EXP_RXP0
EXP_RXN0
15
15
12V_SYS
*
EXP_RXP1
EXP_RXN1
EXP_RXP2
EXP_RXN2
EXP_RXP3
EXP_RXN3
EXP_RXP4
EXP_RXN4
EXP_RXP5
EXP_RXN5
EXP_RXP6
EXP_RXN6
EXP_RXP7
EXP_RXN7
EXP_RXP1
EXP_RXN1
15
15
EXP_RXP2
EXP_RXN2
15
15
EXP_RXP3
EXP_RXN3
15
15
EXP_RXP4
EXP_RXN4
15
15
EXP_RXP5
EXP_RXN5
15
15
EXP_RXP6
EXP_RXN6
15
15
EXP_RXP7
EXP_RXN7
15
15
3D3V_SYS
EC13
470uF
16V, +/-20%
CE35D80H200
Dummy
*
EC15
100uF
16V, +/-20%
CE20D50H110
Dummy
C
3D3V_SYS
*
3D3V_DUAL
BC172
0.1uF
25V, X7R, +/-10%
C0603
*
BC178
0.1uF
25V, X7R, +/-10%
C0603
12V_SYS
15
EXP_TXP12_C
0.1uF
25V, X7R, +/-10%
EXP_TXN5_C
0.1uF
25V, X7R, +/-10%
*
EXP_TXP10
BC285
C0603
EXP_TXN5
BC239
C0603
*
0.1uF
25V, X7R, +/-10%
EXP_TXN7
EXP_TXN4_C
0.1uF
25V, X7R, +/-10%
*
EXP_TXP9_C
15
EXP_TXN6
EXP_TXN4
BC237
C0603
*
EXP_TXP9
BC272
C0603
*
EXP_TXP8_C
0.1uF
25V, X7R, +/-10%
15
EXP_TXN5
0.1uF
25V, X7R, +/-10%
RSVDB12
GND
HSOP0
HSON0
GND
PRSNT2_B17#
GND
15
EXP_TXN15
EXP_TXN8
BC266
C0603
EXP_TXN8_C
0.1uF
25V, X7R, +/-10%
EXP_TXN9
BC274
C0603
EXP_TXN9_C
0.1uF
25V, X7R, +/-10%
EXP_TXN10
BC295
C0603
EXP_TXN10_C
0.1uF
25V, X7R, +/-10%
EXP_TXN11
BC297
C0603
EXP_TXN11_C
0.1uF
25V, X7R, +/-10%
EXP_TXN12
BC300
C0603
EXP_TXN12_C
0.1uF
25V, X7R, +/-10%
EXP_TXN13
BC304
C0603
EXP_TXN13_C
0.1uF
25V, X7R, +/-10%
EXP_TXN14
BC309
C0603
EXP_TXN14_C
EXP_TXN15
BC312
C0603
0.1uF
25V, X7R, +/-10%
All AC Coupling caps. should be placed within 250 mils of the connector
EXP_TXN15_C
0.1uF
25V, X7R, +/-10%
C1
C2
15
EXP_TXP8
BC259
C0603
15
EXP_TXN4
EXP_TXN3_C
B12
B13
B14
B15
B16
B17
B18
EXP_RXP8
EXP_RXN8
EXP_RXP8
EXP_RXN8
15
15
EXP_RXP9
EXP_RXN9
15
15
EXP_RXP10
EXP_RXN10
15
15
EXP_RXP11
EXP_RXN11
15
15
EXP_RXP12
EXP_RXN12
15
15
EXP_RXP13
EXP_RXN13
15
15
EXP_RXP14
EXP_RXN14
15
15
EXP_RXP15
EXP_RXN15
15
15
EXP_RXP9
EXP_RXN9
EXP_RXP10
EXP_RXN10
EXP_RXP11
EXP_RXN11
EXP_RXP12
EXP_RXN12
EXP_RXP13
EXP_RXN13
EXP_RXP14
EXP_RXN14
EXP_RXP15
EXP_RXN15
*
BC155
0.1uF
25V, X7R, +/-10%
C0603
B
CN20
1
2
PCIE_RM
PCIE_RM
Dummy
A
PCIE-X16_SLOT
PCIE164_X16
C1
C2
EXP_TXP9
0.1uF
25V, X7R, +/-10%
15
EXP_TXN2_C
0.1uF
25V, X7R, +/-10%
*
15
EXP_TXP7_C
0.1uF
25V, X7R, +/-10%
*
EXP_TXP8
EXP_TXP7
BC250
C0603
*
15
EXP_TXP6_C
0.1uF
25V, X7R, +/-10%
*
EXP_TXP7
EXP_TXP6
BC241
C0603
*
15
0.1uF
25V, X7R, +/-10%
*
EXP_TXP6
EXP_TXP5_C
*
15
EXP_TXP5
BC238
C0603
*
EXP_TXP5
EXP_TXP4_C
0.1uF
25V, X7R, +/-10%
*
15
EXP_TXN3
15
EXP_TXN3
BC235
C0603
SDVO_CTRLDATA
15 SDVO_CTRLDATA
EXP_TXP4
BC236
C0603
*
B
EXP_TXP4
EXP_TXN2
0.1uF
25V, X7R, +/-10%
C
15
15
EXP_TXP3_C
EXP_TXN2
BC223
C0603
EXP_TXN1_C
*
EXP_TXP3
BC226
C0603
0.1uF
25V, X7R, +/-10%
EXP_TXN1
BC217
C0603
*
*
EXP_TXP2_C
EXP_TXN1
*
EXP_TXP3
EXP_TXP2
BC219
C0603
15
0.1uF
25V, X7R, +/-10%
*
15
EXP_TXP1_C
0.1uF
25V, X7R, +/-10%
EXP_TXN0_C
*
EXP_TXP2
EXP_TXP1
BC214
C0603
EXP_TXN0
15
EXP_TXN0
BC197
SDVO_CTRLCLK
C0603
15 SDVO_CTRLCLK
*
15
0.1uF
25V, X7R, +/-10%
*
EXP_TXP1
EXP_TXP0_C
*
15
EXP_TXP0
BC198
C0603
*
EXP_TXP0
*
15
FOXCONN PCEG
Title
PCI Express x16 Gfx Slot
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
22
of
52
5
4
3
2
1
2D5V_DAC
Should be placed no more than 0.5'' to VGA conn.
RED
2
*
*
R0603 +/-5% Dummy
5V_HSYNC_R
VSY NC
R88
0
R0603 +/-5% Dummy
5V_VSYNC_R
*
BC19
10pF
50V,NPO,+/-5%
C0603
*
FB9
1
2
FB L0603 47 Ohm
BC76
10pF
50V,NPO,+/-5%
C0603
D
F2
F1210 1.5A
*
L_RED
L_GREEN
L_BLUE
1
FB L0603 47 Ohm
BC45
22pF
50V, NPO, +/-10%
C0603
*
BC20
10pF
50V,NPO,+/-5%
C0603
L_DDCA_CLK
L_DDCA_DATA
3
0
* *
R74
BC44
22pF
50V, NPO, +/-10%
C0603
Dummy
1
FB14
2
*
HSYNC
*
BC111
0.22uF
16V, Y5V, +80%/-20%
C0603
1
R246
150
+/-1%
R0603
BLUE
15 BLUE
VGA_5V
FB L0603 47 Ohm
FB13
*
C
SS12
D4
1
Dummy
1
2
D19
2D5V_DAC BAV99
2
2
BC75
10pF
50V,NPO,+/-5%
C0603
GREEN
15 GREEN
1
FB L0603 47 Ohm
3
D18
2D5V_DAC BAV99
2
R245
150
+/-1%
R0603
FB8
R247
150
+/-1%
R0603
*
FB10
1
2
BC77FB L0603 47 Ohm
10pF
50V,NPO,+/-5%
C0603
*
BC67
0.1uF
25V, X7R, +/-10%
C0603
1
FB L0603 47 Ohm
BC46
22pF
50V, NPO, +/-10%
C0603
*
*
VGA
15 SCL
10 GND
14 VSYNC
9 NC
13 HSYNC
8 GND
12 SDA
7 GND
11 ID1
6 GND
J7
VGA15P
@VGA
GND
5
ID0
4
B
3
G
2
R
1
C
16
17
RED
*
1
FB12
2
15
D
5V_SYS
Dummy
1
3
*
2
BC240
0.22uF
16V, Y5V, +80%/-20%
C0603
2
D17
BAV99
BC21
10pF
50V,NPO,+/-5%
C0603
3D3V_SYS
VSY NC
2
A
3
B
VCC
5
Y
4
5V_SYS
2
Dummy
1
sync terminating res should be 39ohm
GND
NC7SZ125
5V_VSYNC_R
R25
47
R0603 +/-5%
5V_VSYNC
5V_HSYNC_R
R24
47
R0603 +/-5%
5V_HSYNC
**
VSYNC
OE#
D3
BAV99
3
15
1
BC95
0.1uF
25V, X7R, +/-10%
C0603
*
U6
sync impedacne should be 55mils (W=6mil)
3D3V_SYS
*
HSYNC
2
A
3
VCC
5
Y
4
3.3V is better?
5V_SYS
GND
4.7K R0603 +/-5%
R54
4.7K R0603 +/-5%
R71
4.7K R0603 +/-5%
***
R53
S
G
S
15 DDCA_DATA
D
L_DDCA_CLK_R
D
BC30
33pF
50V,NPO,+/-5%
C0603
DUMMY
*
BC29
33pF
50V,NPO,+/-5%
C0603
DUMMY
Dummy
2D5V_DAC
VGA_5V
5V_SYS
*
G
DDCA_GATE
15 DDCA_CLK
1
BAV99
D1
NC7SZ125
A
2
*
R26
2.2K
+/-5%
R0603
R67
2.2K
+/-5%
R0603
R21
*
HSYNC
OE#
100 R0603 +/-1%
L_DDCA_CLK
A
2N7002
Q3
L_DDCA_DATA_R
R55
*
15
1
3
U5
B
100 R0603 +/-1%
L_DDCA_DATA
FOXCONN PCEG
2N7002
Q4
Title
VGA Connector
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
23
of
52
5
4
3
2
1
U27B
1
2
3
4
AF22
42 A20GATE
AF23
13 A20MJ
AE27
13 CPUSLPJ
TP42
1 TP_ICH6_DPRSLPVR AE20
TP45
1 TP_ICH6_DPRSLPJ
AE24
TP26
1 TP_ICH6_DPSTPJ
AD27
AG26
13 IGNNEJ
AE22
32 INITJ_3D3V
AF27
13 INITJ
AG24
13 INTR
AF24
13 FERRJ
AF25
13 NMI
AD23
42 KBRSTJ
AB20
42,48 SERIRQ
AG27
13 SMIJ
AE26
13 STPCLKJ
AE23
13 THERMTRIPJ
DMI_CLKN
DMI_CLKP
ICH6_EDS Rev1.0
0.1uF HSO_P2
25V, X7R, +/-10%
C0603
HSO_N2_SLOT BC183
0.1uF HSO_N2
25V, X7R, +/-10%
C0603
*
R484
0
R0603
+/-5%
*
37 HSO_N2_SLOT
*
*
0.1uF HSO_N1
25V, X7R, +/-10%
C0603
HSO_N3_SLOT BC1919 0.1uF HSO_N3
25V, X7R, +/-10%
C0603
R436
R433
R483
R467
R447
R446
R471
R322
*
*
0.1uF ICH_HSO_P0_LAN
25V, X7R, +/-10%
C0603 Dummy
BC19143
0.1uF ICH_HSO_N0_LAN
25V, X7R, +/-10%
C0603 Dummy
*
HSO_N0_LAN
3D3V_SB
SLP_S3J
G
*
C
B
E
Q75
2N7002
*
R495
10K
+/-5%
R0603
Dummy
R434
10K
+/-5%
R0603
Dummy
R480
10K
+/-5%
R0603
Q74
MMBT3904
SOT23_BEC
Dummy
62
62
RSMRSTJ
THERMTRIPJ
FERRJ
*
*
R470
+/-5%
Dummy
10K
ICH_THRM_UP 42
WAKEJ
22,36,37,38
PWRGD_3V 7,10,15,32,34
0 +/-5%
R0603
RSMRSTJ
R2404
22K
+/-5%
R0603
Q2405
MMBT3906
B
*
R2403
6.8K
+/-5%
R0603
G
GPIO_LAN_DISABLEJ
*
R2402
10K
+/-5%
R0603
BOARD0
BOARD1
BOARD2
BOARD3
R502
1K
+/-5%
R0603
R494
10K
+/-5%
R0603
R437
10K
+/-5%
R0603
R498
10K
+/-5%
R0603
Dummy
3
C
C ICH_LAN_RSTJ
E
2N7002
A
R481
10K
+/-5%
R0603
Dummy
FOXCONN PCEG
Title
ICH6R -1
Size
4
TP37
Q2401
Date:
5
R582
BC383
0.1uF
25V, X7R, +/-10%
C0603
Dummy
S
Dummy
ICH_BATLOW_PU
TP_ICH6_TP3
1
ICH_VRMPWRGD_UP
ICH_THRM_UP
R499
10K
+/-5%
R0603
ICH_GPIO25_CFG
R697
510
+/-5%
R0603
Dummy
D
2
A
1D5V_CORE
R501
1K
+/-5%
R0603
Dummy
32
ICH_GPIO25_CFG 26
FSUSLED
35
GPIO_LAN_DISABLEJ 27
CPU_PWRG 13
8.2K +/-5%
2D5V_ICH
DummyR0603
ICH_SYNCJ 15
PWRBTNJ 35,42
ICH _RIJ
ICH_RIJ
35,45
SLP_S3J 10,12,34,42
R450
0 +/-5%
SLP_S45J 10,42
R448
0
+/-5% Dummy LPCPDJ
LPCPDJ
42,48
TP_SUSCLK 1
TP38
R468
0
+/-5%
ICH_SYS_RSTJ 7,14,35,49
ICH_LAN_RSTJ
3D3V_SB
3D3V_SYS
*
1
5V_SB_SYS
*
FWH_WPL
R28
Place at ICH end of route
*
BC19142
HSO_P0_LAN
D
PWRGD_3V_ACT 7,15
25,42
FSB_VTT
10K L_PMEJ
10K WOLJ
10K SMB_ALERT_PU
10K ICH_BATLOW_PU
1K WAKEJ
8.2K ICH _RIJ
8.2K ICH6_GPIO24_PU
10K LPCPDJ
R0603 +/-5% Dummy
TP39
TP44
TP40
ICH6_EDS Rev1.0
R485
R478
********
38 HSO_N3_SLOT
ICH_THRM_UP
ICH_VRMPWRGD_UP
ICH_GPI6_PU
TRUBO_CTRL
3D3V_SB
*
38 HSO_P3_SLOT
HSO_P3_SLOT BC1909 0.1uF HSO_P3
25V, X7R, +/-10%
C0603
4.7K
10K
10K
10K
*
HSO_N1_SLOT BC191
36 HSO_N1_SLOT
B
****
R479
R482
R500
R432
0.1uF HSO_P1
25V, X7R, +/-10%
C0603
*
HSO_P1_SLOT BC190
36 HSO_P1_SLOT
3D3V_SYS
1
1
1
1
D
HSO_P2_SLOT BC184
*
37 HSO_P2_SLOT
A20GATE
A20M#
CPUSLP#
DPRSLPVR/TP_1
DPRSLP#/TP_2
DPSTP#
IGNNE#
INIT3_3V#
INIT#
INTR
FERR#
NMI
RCIN#
SERIRQ
SMI#
STPCLK#
THRMTRIP#
42
TRUBO_CTRL 42
WOLJ
35
TP41
ICH6_GPIO24_PU
ICH_GPIO25_CFG
FSUSLED
GPIO_LAN_DISABLEJ
BOARD1
BOARD2
BOARD3
B
CK_48M_ICH 7
LAN_CLK
LAN_RSTSYNC
LAN_RXD_0
LAN_RXD_1
LAN_RXD_2
LAN_TXD_0
LAN_TXD_1
LAN_TXD_2
AG21
U1
T2
T4
T5
T6
W3
V6
U2
V5
V2
U3
AF21
AC20
U5
AA1
L_PMEJ
S
CK_48M_ICH
F12
B11
E12
E11
C13
C12
C11
E13
LAN_CLK_ICH
LAN_RST_ICH
LAN_RXD0_ICH
LAN_RXD1_ICH
LAN_RXD2_ICH
LAN_TXD0_ICH
LAN_TXD1_ICH
LAN_TXD2_ICH
22.6
+/-1%
MCH_SYNC#
PWRBTN#
RI#
SLP_S3#
SLP_S4#
SLP_S5#
SUS_STAT*/LPCPD#
SUSCLK
SYS_RESET#
LAN_RST#
BATLOW#
TP_3
VRMPWRGD
THRM#
WAKE#
PWROK
ICH_GPI6_PU
BOARD0
L_PMEJ
SMB_ALERT_PU
TRUBO_CTRL
WOLJ
TP_ICH6_GPO18
TP_ICH6_GPIO19
TP_ICH6_GPO20
TP_ICH6_GPIO21
**
USBRBIAS_ICHR428
R0603
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
AD19
AE19
R1
W6
M2
R6
AC21
AB21
AD22
AD20
AD21
V3
P5
R3
T3
AF19
AF20
AC18
AG25
*
ICH_EE_CS
D12
ICH_EE_DIN
F13
ICH_EE_DOUT D11
ICH_EE_SHCLK B12
USB_OCJ_FRONT 33
BMBUSY#/GPI6
GPI7
GPI8
SMBALERT#/GPIO11
GPI12
GPI13
STP_PCI#/GPO18
GPIO19
STP_CPU#/GPO20
GPIO21
GPIO23
GPIO24
GPIO25
GPIO27
GPIO28
CLKRUN#/GPIO32
GPIO33
GPIO34
CPUPWRGD/GPIO49
*
*
DMI_ZCOMP
DMI_IRCOMP
ICH_SDIN2
ICH_SDOUT
ICH_SYNC
CK_14M_ICH
ACZ_BIT_CLK
ACZ_RST#
ACZ_SDIN_0
ACZ_SDIN_1
ACZ_SDIN_2
ACZ_SDOUT
ACZ_SYNC
CLK14
MISC
USB
1
2
3
4
Dummy
Dummy
**
A27
31
31
31
7
USB_OCJ_BACK 29
*
CLK48
31 ICH_BCLK
31 ICH_RSTJ
R420
R419
C10
A10
10K +/-5% F11
10K +/-5% F10
B10
C9
B9
E10
LDRQ_1/GPIO41
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ_0#
LFRAME#/FWH4
HOST
R431 DMI_COMP_ICH F24
24.9 +/-1%
F23
AC Coupling caps. should be close to ICH6
CK_PE_100M_N_ICH AD25
7 CK_PE_100M_N_ICH
CK_PE_100M_P_ICH AC25
7 CK_PE_100M_P_ICH
1D5V_PE_ICH
C
ICH_HSO_P0_LAN
ICH_HSO_N0_LAN
B22
A22
P4
P2
N3
N5
N4
N6
P3
**
HSI_P0
HSI_N0
USBRBIAS
USBRBIAS#
1
42 L_DRQ0J
32,42,48 L_FRAMEJ
*
HSI_N3
HSI_P3
TP36
L_AD0
L_AD1
L_AD2
L_AD3
*
38
38
C27
B27
B26
C26
C23
D23
C25
C24
32,42,48 L_AD[3..0]
*
HSI_N2
HSI_P2
OC0#
OC1#
OC2#
OC3#
OC_4#_GPIO9
OC_5#_GPIO10
OC_6#_GPIO14
OC_7#_GPIO15
U27D
47
47
47
47
29
29
29
29
33
33
33
33
33
33
33
33
*
37
37
PERn[1]
PERp[1]
PETn[1]
PETp[1]
PERn[2]
PERp[2]
PETn[2]
PETp[2]
PERn[3]
PERp[3]
PETn[3]
PETp[3]
PERn[4]
PERp[4]
PETn[4]
PETp[4]
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
*
H25
H24
G27
G26
K25
K24
J27
J26
M25
M24
L27
L26
P24
P23
N27
N26
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
LAN
HSI_N1
HSI_P1
HSO_N1
HSO_P1
HSI_N2
HSI_P2
HSO_N2
HSO_P2
HSI_N3
HSI_P3
HSO_N3
HSO_P3
C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14
EPROM
HSI_N1
HSI_P1
USBP_0N
USBP_0P
USBP_1N
USBP_1P
USBP_2N
USBP_2P
USBP_3N
USBP_3P
USBP_4N
USBP_4P
USBP_5N
USBP_5P
USBP_6N
USBP_6P
USBP_7N
USBP_7P
AUDIO
36
36
DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP
LPC
T25
T24
R27
R26
V25
V24
U27
U26
Y25
Y24
W27
W26
AB24
AB23
AA27
AA26
PCI EXPRESS
DMI_TXN0
DMI_TXP0
DMI_RXN0
DMI_RXP0
DMI_TXN1
DMI_TXP1
DMI_RXN1
DMI_RXP1
DMI_TXN2
DMI_TXP2
DMI_RXN2
DMI_RXP2
DMI_TXN3
DMI_TXP3
DMI_RXN3
DMI_RXP3
DMI_TXN0
DMI_TXP0
DMI_RXN0
DMI_RXP0
DMI_TXN1
DMI_TXP1
DMI_RXN1
DMI_RXP1
DMI_TXN2
DMI_TXP2
DMI_RXN2
DMI_RXP2
DMI_TXN3
DMI_TXP3
DMI_RXN3
DMI_RXP3
DMI
D
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
24
of
52
5
4
3
2
1
AC16
AB17
AC17
DA0
DA1
DA2
PIDE_CS1J AD16
PIDE_CS3J AE17
IRQ14
AB16
CK_SATA_100M_N_ICH
CK_SATA_100M_P_ICH
SMBCLK
SMBDATA
Y4
W5
LINKALERT#
SMLINK_0
SMLINK_1
Y5
W4
U6
R477
R449
R442
AC19
AE18
AF17
AF18
AG18
AA3
R492
R493
R496
R497
SATALED#
SATA1GP/GPI29
SATA0GP/GPI26
SATA2GP/GPI30
SATA3GP/GPI31
INTRUDER#
C
RSMRSTJ
Y1
Y2
ICH_RTCX1
ICH_RTCX2
AA2
AA5
RTCRSTJ
INTVRMEN
F8
SPKR
BC446 C0603
BC447 C0603
SATA_TXP1
SATA_TXN1
BC454 C0603
BC459 C0603
SATA_RXN1
SATA_RXP1
BC455 C0603
BC460 C0603
3D3V_SB
10K +/-5% R0603
10K +/-5% R0603
10K +/-5% R0603
+/-5%
+/-5%
+/-5%
+/-5%
INTRUDERJ
R0603
R0603
R0603
R0603
3D3V_SYS
SATA_TXP2
SATA_TXN2
BC478 C0603
BC480 C0603
SATA_RXN2
SATA_RXP2
BC479 C0603
BC481 C0603
SATA_TXP3
SATA_TXN3
BC502 C0603
BC505 C0603
SATA_RXN3
SATA_RXP3
BC503 C0603
BC506 C0603
*
RTCRSTJ
35
SPKR
31,35
*
R476
390K
+/-5%
R0603
INTRUDERJ
R475
*
ICH_RTCX1 R469
1M +/-5%
VCCRTC
X5
5V_SYS
*
1
SATA_LED
2
HDD_LED
*
4
BC429
10pF
50V,NPO,+/-5%
C0603
R2857
4.7K
+/-5%
R0603
Dummy
3 BAT54A
2 XTAL-32.768kHz
1
3
1
2
*
D12
PIDE_LED
*
BC433
10pF
C0603
2
10nF 50V, X7R, +/-20%
10nF 50V, X7R, +/-20%
SATA_TXP3C
SATA_TXN3C
10nF 50V, X7R, +/-20%
10nF 50V, X7R, +/-20%
SATA_RXN3C
SATA_RXP3C
R556
8.2K
+/-5%
R0603
*
1
2
3
4
5
6
7
CN28
SATA
8
1
2
3
4
5
6
7
CN30
SATA
8
D
9
9
9
C
R555
4.7K
+/-5%
R0603
P_IDERSTJ
R554 33
+/-5%
ICH_H_PCIRSTJ 26
CN29
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
X
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15
22
24
26
28
30
32
34
36
38
40
Cable detection
high: 40-conductor cable(ATA 33)
low: 80-conductor cable(ATA 66/100)
CBLID_P
PIDE_A2
PIDE_CS3J
*
BC519
0.047uF
25V,Y5V,+80%/-20%
C0603
Dummy
*
32
R557
10K
+/-5%
R0603
B
VCCRTC
width 20 mils
3D3V_SB
2
*
74LVC14A
3
BC401
0.1uF
25V, X7R, +/-10%
C0603
*
U26B
4
RSMRSTJ
RSMRSTJ
R443
10K
+/-5%
R0603
74LVC14A
R206
1K
+/-5%
R0603
24,42
*
BC436
1.0uF
16V,Y5V,+80%/-20%
C0603
R474
180K
+/-5%
R0603
RTCRSTJ
*
RTCRSTJ
35
BC435
0.1uF
25V, X7R, +/-10%
C0603
A
1
14
2
*
BAT54C
BAT1
Battery Holder
FOXCONN PCEG
2
SD103AW
for cap. discharge quickly
7
1
U26A
7
14
1
SD103AW
3
1
D27
A
*
SATA_RXN2C
SATA_RXP2C
CN27
SATA
8
D15
3D3V_SB
BC400
1uF
16V, Y5V, +80%/-20%
C0603
10nF 50V, X7R, +/-20%
10nF 50V, X7R, +/-20%
1
*
*
SATA_TXP2C
SATA_TXN2C
1
2
3
4
5
6
7
9
35
2
R430
51K
+/-5%
R0603
10nF 50V, X7R, +/-20%
10nF 50V, X7R, +/-20%
HDD1
1N4148W
3D3V_SB
SATA_RXN1C
SATA_RXP1C
CN25
SATA
8
D128
FL_DATA00
FL_DATA00
10nF 50V, X7R, +/-20%
10nF 50V, X7R, +/-20%
Header_2X20_20 (IDE)
3D3V_SB
30
SATA_TXP1C
SATA_TXN1C
PIDE_DREQ
PIDE_IOWJ
PIDE_IORJ
PIDE_RDY
PIDE_DAKJ
IRQ14
PIDE_A1
PIDE_A0
PIDE_CS1J
PIDE_LED
10M +/-5%
R0603
*
3D3V_SYS
R529
10K
R0603
+/-5%
Dummy
10nF 50V, X7R, +/-20%
10nF 50V, X7R, +/-20%
P_IDERSTJ
PIDE_D7
PIDE_D6
PIDE_D5
PIDE_D4
PIDE_D3
PIDE_D2
PIDE_D1
PIDE_D0
ICH_RTCX2
R528
10K
R0603
+/-5%
Dummy
SATA_RXN0C
SATA_RXP0C
3D3V_SYS
VCCRTC
35
ICH6_EDS Rev1.0
B
10nF 50V, X7R, +/-20%
10nF 50V, X7R, +/-20%
1
2
3
4
5
6
7
*
Y3
RTCX1
RTCX2
SPKR
R487
R0603
SATA_LED
RSMRST#
RTCRST#
INTVRMEN
24.9
+/-1%
SMB_CLK_RESUME 39,44,49
SMB_DATA_RESUME 39,44,49
10K
10K
10K
10K
SATA_RXN0
SATA_RXP0
SATA_TXP0C
SATA_TXN0C
10nF 50V, X7R, +/-20%
10nF 50V, X7R, +/-20%
CK_SATA_100M_N_ICH 7
CK_SATA_100M_P_ICH 7
SATARBIAS_ICH
AG11
AF11
SATARBIAS#
SATARBIAS
DCS1#
DCS3#
IDEIRQ
AC2
AC1
BC444 C0603
BC445 C0603
** **
PIDE_A0
PIDE_A1
PIDE_A2
SATA_CLKN
SATA_CLKP
SATA_TXP0
SATA_TXN0
** **
DDACK#
DDREQ
DIOR#
DIOW#
IORDY
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1
SATA_RXN2
SATA_RXP2
SATA_TXN2
SATA_TXP2
SATA_RXN3
SATA_RXP3
SATA_TXN3
SATA_TXP3
** **
AB15
AB14
AE16
AC14
AF16
AE3
AD3
AG2
AF2
AC5
AD5
AF4
AG4
AD7
AC7
AF6
AG6
AC9
AD9
AF8
AG8
**** ***
PIDE_DAKJ
PIDE_DREQ
PIDE_IORJ
PIDE_IOWJ
PIDE_RDY
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
*
DD_15
DD_14
DD_13
DD_12
DD_11
DD_10
DD_9
DD_8
DD_7
DD_6
DD_5
DD_4
DD_3
DD_2
DD_1
DD_0
IDE
AD13
AG15
AE15
AC13
AB13
AB12
AF13
AE13
AB11
AD11
AC11
AE14
AD12
AF14
AF15
AD14
SATA
D
PIDE_D15
PIDE_D14
PIDE_D13
PIDE_D12
PIDE_D11
PIDE_D10
PIDE_D9
PIDE_D8
PIDE_D7
PIDE_D6
PIDE_D5
PIDE_D4
PIDE_D3
PIDE_D2
PIDE_D1
PIDE_D0
** **
U27C
Title
ICH6R -2
Size
placed near IDE connector
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
25
of
52
5
4
3
2
1
U27F
1D5V_CORE
INTAJ
INTBJ
INTCJ
INTDJ
INTEJ
INTFJ
INTGJ
INTHJ
N2
L2
M1
L3
D9
C7
C6
M3
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#_GPIO2
PIRQF#_GPIO3
PIRQG#_GPIO4
PIRQH#_GPIO5
C_BE_ 2#
C_BE_ 1#
C_BE_ 0#
G4
H6
J6
CBEJ2
CBEJ1
CBEJ0
FSB_VTT
*
BC399
0.1uF
C0603
*
CBEJ3
27,30,39,40,41,46
CBEJ2
CBEJ1
CBEJ0
27,30,39,40,41,46
near pin E26
27,30,39,40,41,46
place within 100mils
27,30,39,40,41,46
1D5V_CORE
BC441
0.1uF
C0603
*
BC440
0.1uF
C0603
near one of pins AD26,AB22,AG23
place within 100mils
1D5V_CORE LRC filter
L0805 1uH
*
3D3V_SYS
BYP
4
L24
1
MIC5255-2.5BM5
SOT23_5
Dummy
C0603
25V, X7R, +/-10%
ICH_GPIO25_CFG 24
*
*
BC465
0.1uF
25V, X7R, +/-10%
C0603
*
BC462
0.1uF
25V, X7R, +/-10%
C0603
Dummy
0.01uF cap. near pin AC27
place within 100mils
1D5V_PE_ICH
1D5V_CORE
PCI Express filter
1D5V_PE_ICH
2
FB L1206 80 Ohm
BC464
4.7uF
10V, Y5V, +80%/-20%
C0805
*
*
EC55
BC408
1000uF
0.1uF
6.3V, +/-20%
C0603
CE35D80H200
*
*
BC402
0.1uF
C0603
*
BC432
0.1uF
C0603
25V, X7R, +/-10%
EN
OUT
BC439
10nF
C0603
25V, X7R, +/-10%
GND
3
25V, X7R, +/-10%
*
IN
2
BC406 4.7uF
C0805
10V, Y5V, +80%/-20%
*
BC461
0.1uF
*
1D5V_CORE
C1206 16V, Y5V, +80%/-20%
BC463
4.7uF
2D5V_ICH
VCCDMIPLL
1
+/-5%
BC431
10uF
6.3V,X5R,+/-10%
C1206
*
R472
R0603
50V,X7R,+/-10%
*
L25
5
0.1uF caps. near pin F27, P27, AB27
place within 100mils
*
near pin A24
place within 100mils
R425
10
+/-5%
R0603
PCI Decoupling
one near pin A2~A6
one near pin D1~H1
place within 100mils
BC449
0.1uF
25V, X7R, +/-10%
C0603
*
BC450
0.1uF
25V, X7R, +/-10%
C0603
BC443
10nF
50V,X7R,+/-10%
C0603
*
A13
F14
G13
G14
A11
A24
U4
V1
V7
W2
Y7
A17
B17
C16
C17
D16
E16
F15
F16
F18
G15
G16
G17
G18
VCCRTC
AB3
3D3V_SB
5
BC386
10nF
C0603
3D3V_SB
U29C
6
74LVC14A
R429
1K
+/-5%
R0603
BC451
0.1uF
25V, X7R, +/-10%
C0603
*
8
ICH_P_PCIRSTJ 27,30,39,40,41,46,48
for SATA Ctrl./PCI/TPM
74LVC14A
BC414
10nF
C0603
3D3V_SB
3D3V_SB
SD103AW
PLTRSTJ
U29F
13
12
74LVC14A
C0603
R542
4.7K
+/-5%
R0603
for IDE
2
A
ICH_G_PLTRSTJ 22,36,37,38
forPCI-Express x16 Gfx
74LVC14A 3D3V_SB
U29E
10
74LVC14A
2N7002
U29A
1
3D3V_SB
11
3
ICH_PLTRSTJ 15,42
for GMCH/SIO
U29B
4
FOXCONN PCEG
ICH_FWH_PLTRSTJ 32
for FWH
Title
74LVC14A
ICH6R -3
Size
C
Date:
4
BC407
10nF
ICH_H_PCIRSTJ 25
G
REF5V
BC392
0.1uF
25V, X7R, +/-10%
C0603
place cap. near pin
V5REF / 3D3V_SYS Power Sequencing
5
*
Q59
D26
*
*
B
5V_SB_SYS
U29D
9
C
ICH6_EDS Rev1.0
R7 VCCSUS1_5_A_ICH
U7 VCCSUS1_5_B_ICH
G19 VCCSUS1_5_C_ICH
G10
G11
*
3D3V_SB
D
VCCRTC
placed near the 74LVC14A pin 14
1
*
VCCSUS3_3_21
VCCSUS3_3_22
VCCSUS3_3_23
VCCSUS3_3_24
VCCSUS3_3_1
VCCSUS3_3_25
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6
VCCSUS3_3_7
VCCSUS3_3_8
VCCSUS3_3_9
VCCSUS3_3_10
VCCSUS3_3_11
VCCSUS3_3_12
VCCSUS3_3_13
VCCSUS3_3_14
VCCSUS3_3_15
VCCSUS3_3_16
VCCSUS3_3_17
VCCSUS3_3_18
VCCSUS3_3_19
3D3V_SYS
3D3V_SYS
SATA Decoupling
near pin AG10
place within 100mils
SATA Decoupling
0.1uF x2 near pin AG5 and AG9
0.01uF near AE1
place within 100mils
*
REF5V_SUS
BC384
0.1uF
25V, X7R, +/-10%
C0603
place cap. near pin
PCIRSTJ
*
3D3V_SYS
E26
AA10
AA12
AA14
AA15
AA17
AC15
AD17
AG10
AG13
AG16
AG19
A6
B1
E4
H1
H7
J7
L4
L7
M7
P1
FSB_VTT
BC411
0.1uF
25V, X7R, +/-10%
C0603
V5REF_SUS / 3D3V_SB Power Sequencing
5V_SYS
VCC3_3_25
VCC3_3_26
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11
VCC3_3_27
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21
VCC3_3_22
VCC3_3_23
VCC3_3_24
14
*
AB22
AD26
AG23
SD103AW
*
BC403
0.1uF
25V, X7R, +/-10%
C0603
V_CPU_IO_1
V_CPU_IO_2
V_CPU_IO_3
ICH6_EDS Rev1.0
3D3V_SB
14
*
BC393
0.1uF
25V, X7R, +/-10%
C0603
D25
7
BC452
0.1uF
C0603
3D3V_SB
1
5V_SB_SYS
14
*
BC387
0.1uF
C0603
3D3V_SYS
1D5V_CORE
*
USB Decoupling
near pin A17
place within 100mils
*
near pin A18
place within 100mils
TBD
A
BC389
0.1uF
C0603
7
IDE Decoupling
near pin A13~A17
place within 100mils
BC453
0.1uF
C0603
VCC1_5_B_55
VCC1_5_B_56
VCC1_5_B_57
VCC1_5_B_58
VCC1_5_B_59
VCC1_5_B_60
VCC1_5_B_61
VCC1_5_B_62
VCC1_5_B_63
VCC1_5_B_64
VCC1_5_B_65
VCC1_5_B_66
VCC1_5_B_67
VCC1_5_B_68
VCC1_5_B_69
VCC1_5_B_70
VCC1_5_B_71
VCC1_5_B_72
VCC1_5_B_73
VCC1_5_B_74
VCC1_5_B_75
VCC1_5_B_76
VCC1_5_B_77
VCC1_5_B_78
VCC1_5_B_79
VCC1_5_B_80
VCC1_5_B_81
VCC1_5_B_82
VCC1_5_B_83
VCC1_5_B_84
VCC1_5_B_85
VCC1_5_B_86
VCC1_5_B_87
VCC1_5_B_88
VCC1_5_B_89
VCC1_5_B_90
VCC1_5_B_91
VCC1_5_B_92
VCC1_5_B_93
VCC1_5_B_94
VCC1_5_B_95
VCC1_5_B_96
VCC1_5_B_97
VCC1_5_B_98
VCC1_5_B_99
VCC1_5_A_1
VCC1_5_A_2
VCC1_5_A_3
VCC1_5_A_4
VCC1_5_A_5
VCC1_5_A_6
VCC1_5_A_7
VCC1_5_A_8
VCC1_5_A_9
VCC1_5_A_10
VCC1_5_A_11
VCC1_5_A_12
VCC1_5_A_13
VCC1_5_A_14
VCC1_5_A_15
VCC1_5_A_16
VCC1_5_A_17
VCC1_5_A_18
VCC1_5_A_19
VCC1_5_A_20
14
*
*
2D5V_ICH
25V, X7R, +/-10%
*
BC388
0.1uF
C0603
7
near pin A25
place within 100mils
3D3V_SYS
BC448
0.1uF
25V, X7R, +/-10%
C0603
*
2
USB Decoupling
near pin D27
place within 100mils
BC442
10nF
50V,X7R,+/-10%
C0603
VCCUSBPLL
VCCSUS1_5_A
VCCSUS1_5_B
VCCSUS1_5_C
VCCSUS1_5_D
VCCSUS1_5_E
2
*
A25
3D3V_SB
25V, X7R, +/-10%
BC397
0.1uF
C0603
25V, X7R, +/-10%
*
25V, X7R, +/-10%
BC398
0.1uF
C0603
25V, X7R, +/-10%
25V, X7R, +/-10%
*
3D3V_SB
25V, X7R, +/-10%
1D5V_CORE 1D5V_CORE
B
VCCSATAPLL
AA22
AA23
AA24
AA25
AB25
AB26
AB27
F25
F26
F27
G22
G23
G24
G25
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N21
N22
N23
N24
N25
P21
P25
P26
P27
R21
R22
T21
T22
U21
U22
V21
V22
W21
W22
Y21
Y22
AA6
AB4
AB5
AB6
AC4
AD4
AE4
AE5
AG5
AF5
AA7
AA8
AA9
AB8
AC8
AD8
AE8
AE9
AF9
AG9
3D3V_SYS
C
U30
VCCDMIPLL
AE1
1D5V_PE_ICH
ICH6_EDS Rev1.0
1
V5REF_SUS
AC27
AA19
AA20
AA21
L11
L12
L14
L16
L17
M11
M17
P11
P17
T11
T17
U11
U12
U14
U16
U17
G8
D24
D25
D26
D27
E20
E21
E22
E23
E24
F9
F20
G20
D
39,40,41
39,40,41
39,40,41
39,40,41
30,39
39,46
27,39
39
1D5V_CORE
VCC2_5_1
VCC2_5_2
F21
VCC1_5_A_23
VCC1_5_A_24
VCC1_5_A_25
VCC1_5_A_26
VCC1_5_A_27
VCC1_5_A_28
VCC1_5_A_29
VCC1_5_A_30
VCC1_5_A_31
VCC1_5_A_32
VCC1_5_A_33
VCC1_5_A_34
VCC1_5_A_35
VCC1_5_A_36
VCC1_5_A_37
VCC1_5_A_38
VCC1_5_A_39
VCC1_5_A_40
VCC1_5_A_41
VCC1_5_A_42
VCC1_5_A_43
VCC1_5_A_44
VCC1_5_A_45
VCC1_5_A_46
VCC1_5_A_47
VCC1_5_A_48
VCC1_5_A_49
VCC1_5_A_50
VCC1_5_A_51
VCC1_5_A_52
VCC1_5_A_53
VCC1_5_A_54
S
REQ_0#
REQ_1#
REQ_2#
REQ_3#
REQ_4#_GPIO40
REQ_5#_GPIO1
REQ_6#_GPIO0
VCCDMIPLL
1D5V_CORE
V5REF_1
V5REF_2
AB18
P7
50V,X7R,+/-10%
L5
B5
M5
B8
F7
E8
B7
REF5V_SUS
A8
AA18
14
PREQ0J
PREQ1J
PREQ2J
PREQ3J
PREQ4J
PREQ5J
PREQ6J
2D5V_ICH
7
39,46
27,39
39
39,40
39,41
30,39
39
27,30,39,40,41,46
14
GNT_0#
GNT_1#
GNT_2#
GNT_3#
GNT_4#_GPIO48
GNT_5#_GPIO17
GNT_6#_GPIO16
AD[31..0]
7
C1
B6
F1
C8
E7
F6
D8
A D0
A D1
A D2
A D3
A D4
A D5
A D6
A D7
A D8
A D9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBEJ3
7
46
27
39
40
41
30
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4
G2
25V, X7R, +/-10%
GNT0J
GNT1J
GNT2J
GNT3J
GNT4J
GNT5J
PCIRSTJ
PLTRSTJ
IRDYJ
PMEJ
SER RJ
STOPJ
LOCKJ
TR DYJ
PER RJ
FRAMEJ
27,30,39,40,41,46 IRDYJ
27,35,39,40,41,46 PMEJ
27,30,39,40,41 SERRJ
27,30,39,40,41,46 STOPJ
D
39,40,41 LOCKJ
27,30,39,40,41,46 TRDYJ
27,30,39,40,41,46 PERRJ
27,30,39,40,41,46 FRAMEJ
AD_0
AD_1
AD_2
AD_3
AD_4
AD_5
AD_6
AD_7
AD_8
AD_9
AD_10
AD_11
AD_12
AD_13
AD_14
AD_15
AD_16
AD_17
AD_18
AD_19
AD_20
AD_21
AD_22
AD_23
AD_24
AD_25
AD_26
AD_27
AD_28
AD_29
AD_30
AD_31
C_BE_3 #
25V, X7R, +/-10%
PAR
DEVSEL#
PCICLK
PCIRST#
PLTRST#
IRDY#
PME#
SERR#
STOP#
PLOCK#
TRDY#
PERR#
FRAME#
25V, X7R, +/-10%
E1
C3
G6
R2
R5
A3
P6
G5
J1
C5
J2
E3
J3
G21
G7
G9
H23
H26
H27
J23
J24
J25
J4
K1
K23
K26
K27
K7
L13
L15
L23
L24
L25
M12
M13
M14
M15
M16
M23
M26
M27
M4
N1
N11
N12
N13
N14
N15
N16
N17
N7
P12
P13
P14
P15
P16
P22
R11
R12
R13
R14
R15
R16
R17
R23
R24
R25
R4
T1
T12
T13
T14
T15
T16
T23
T26
T27
T7
U13
U15
U23
U24
U25
V23
V26
V27
V4
W1
W23
W25
W7
Y23
Y26
Y27
Y6
AF10
B24
E27
W24
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
50V,X7R,+/-10%
AD[31..0]
U27A
PAR
DEVSELJ
27,30,39,40,41,46 PAR
27,30,39,40,41,46 DEVSELJ
7
CK_33M_ICH
A1
A12
A15
A19
A21
A23
A26
A4
A7
A9
AA11
AA13
AA16
AA4
AB1
AB10
AB19
AB2
AB7
AB9
AC10
AC12
AC22
AC23
AC24
AC26
AC3
AC6
AD1
AD10
AD15
AD18
AD2
AD24
AD6
AE10
AE11
AE12
AE2
AE21
AE25
AE6
AE7
AF1
AF12
AF26
AF3
AF7
AG1
AG12
AG14
AG17
AG20
AG22
AG3
AG7
B13
B15
B19
B21
B23
B25
C14
C18
C20
C22
C4
D1
D10
D13
D14
D18
D20
D22
D7
E14
E15
E18
E19
E25
F17
F19
F22
F4
G1
G12
U27E
50V,X7R,+/-10%
REF5V
3
2
Document Number
Rev
B
915A01 DDR2
Sheet
Tuesday, May 18, 2004
1
26
of
52
3
2
29 LAN_LINK_1000J
29 LAN_LINK_100J
R76
1
R77
1
29 LAN_ACTLEDJ
2 27pF
C0603
TB Change value
R95 1
5.6K
to 2.49K,
but 2+/-1%
R0603lib
no such CIS
MDI_0
MDI_0J
29
29
MDI_1
MDI_1J
28
CTRL_2D5
28
V_12P
29
29
MDI_2
MDI_2J
29
29
MDI_3
MDI_3J
AVDDH
R61
2 0 +/-5%
R0603
1
HSDAC
GPIO_ISOLATEB
1D8V_LAN
26,39
INTGJ
3D3V_LAN
0,39,40,41,46,48 ICH_P_PCIRSTJ
7
CK_33M_LAN
26
GNT1J
26,39 PREQ1J
26,35,39,40,41,46 PMEJ
B
1D8V_LAN
AD31
AD30
AD29
AD28
AD[31..0]
AT93C46-2.7V
2 10K +/-5%
R0603
Dummy
1
8
7
6
5
VCC
NC
ORG
GND
BC96
0.1uF
25V, X7R, +/-10%
C0603
D
3D3V_LAN
LWAKE
35
AD0
AD1
MDI0+
MDI0AVDDL
VSS
MDI1+
MDI1AVDDL
CTRL25
VSS
AVDDH
HSDAC+
HSDACVSS
MDI2+
MDI2AVDDL
VSS
MDI3+
MDI3AVDDL
VSSPST
GND
ISOLATEB
VDD18
INTAB
VDD33
RSTB
CLK
GNTB
REQB
PMEB
VDD18
AD31
AD30
GND
AD29
AD28
VSSPST
AD2
VSSPST
GND
VDD18
AD3
AD4
AD5
AD6
VDD33
AD7
CBE0B
VSSPST
AD8
AD9
M66EN
AD10
AD11
AD12
VDD33
AD13
AD14
VSSPST
GND
AD15
VDD18
CBE1B
PAR
SERRB
SMBDATA
GND
SMBCLK
VDD33
PERRB
STOPB
DEVSELB
TRDYB
VSSPST
CLKRUNB
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
26,30,39,40,41,46 AD[31..0]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
RTL8110S-32
C
29
29
CS
SK
DI
DO
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
AD2
AD3
AD4
AD5
AD6
1D8V_LAN
C
AD7
CBEJ0
26,30,39,40,41,46
1D8V_LAN
CBEJ1
PAR
SERRJ
PSDATA
26,30,39,40,41,46
26,30,39,40,41,46
26,30,39,40,41
22,36,37,38,39,40,41
AD8
AD9
R50
2 1K +/-5%
R0603
1
AD10
AD11
AD12
AD13
AD14
AD15
PSCLK
22,36,37,38,39,40,41
PERRJ
STOPJ
DEVSELJ
TRDYJ
26,30,39,40,41,46
26,30,39,40,41,46
26,30,39,40,41,46
26,30,39,40,41,46
IRDYJ
26,30,39,40,41,46
B
129
U1
1
2
3
4
129
2D5V_LAN
3D3V_LAN
U7
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
R32 value should be 5.6K (1%) at
RTL8100C application, and 2.49K
(1%) at RTL8110S(B) application.
5V_SB_SYS
3D3V_LAN
VSS
RSET
LV2
CTRL18
LG2
HG
XTAL2
XTAL1
HV
VSSPST
GND
LED0
VDD18
LED1
LED2
LED3
GND
EESK
VDD18
EEDI
EEDO
VDD33
EECS
LWAKE
AD0
AD1
DVDD_A
R75
AD27
AD26
VDD33
AD25
AD24
CBE3B
VDD18
IDSEL
AD23
GND
AD22
AD21
VSSPST
GND
AD20
VDD18
AD19
VDD33
AD18
AD17
AD16
CBE2B
FRAMEB
GND
IRDYB
VDD18
28
3D3V_SB
LAN_EECS
LAN_EESK
LAN_EEDI
LAN_EEDO
1D8V_LAN
2 27pF
C0603
CTRL_1D8
1D8V_LAN
2
BC1231
AVDDH
X2
XTAL-25MHz
28
2 5.6K +/-5%
R0603
2 5.6K +/-5%
R0603
Dummy
1
BC1291
D
1
1
4
2
5
3D3V_LAN
AD18
AD17
AD16
AD19
AD20
AD22
AD21
AD23
AD25
AD24
AD27
AD26
1D8V_LAN
3D3V_LAN
26,30,39,40,41,46 CBEJ3
100
R0603
+/-5%
LAN_IDSEL
24 GPIO_LAN_DISABLEJ
3D3V_SYS
R8
R13
*
A
R2
*
AD17
1
GPIO_ISOLATEB
0 R0603 +/-5%
Dummy
2 1K +/-5%
R0603
CN5
1
2
3
1
2
3
HEADER_1X3
Dummy
4
3
26,30,39,40,41,46
CBEJ2
26,30,39,40,41,46
A
TECHNOLOGY COPR.
PIN 1, 2: NORMAL
Title
8110S
PIN 2, 3: Isolate Device
Document Number
Date:
5
FRAMEJ
2
Rev
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
B
27
of
52
5
4
3
2
FB22
2
3D3V_LAN
1
BC125
0.1uF
C0603
2
1
BC32
0.1uF
C0603
2
1
BC83
0.1uF
C0603
2
1
1
1
BC6
0.1uF
C0603
2
* C77 and C78 are for U17
RTL8110S(B) AVDDH pins,
such as 10 and 120.
BC53
0.1uF
C0603
2
25V, X7R, +/-10%
D
BC22
0.1uF
C0603
2
1
*
EC8
BC132
100uF
0.1uF
16V, +/-20%
C0603
CE20D50H110
2
FB L1206 80 Ohm
2
1
1
3D3V_DUAL
1
* C40 to C46 are for U17 RTL8110S(B)/RTL8100C
VDD33 pins, such as 26, 41, 56, 71, 84, 94 and 107.
BC3
0.1uF
C0603
D
AVDDH
FB20
1
1
2
FB L0805 100 Ohm
BC69
0.1uF
C0603
27
1D8V_LAN
* C76 is for U17
RTL8110S(B)/RTL8100C pin 12.
2
FB2
FB L0805 100 Ohm
At RTL8100C application, remove R57 and L7,keep L10. At
RTL8110S application, remove L10 and R57, keep L7. At
RTL8110SB application, remove L10, keep R57 and L7.
When use RT8110C,
3
CTRL_2D5
1
2D5V_LAN is 3.3V
2
4
27
FB21
2
2
BC131
0.1uF
C0603
Q1
BCP69T1
Dummy
1
2 0 +/-5%
R0805
Dummy
1
BC84
0.1uF
C0603
2
FB L0805 100 Ohm
Dummy
At RTL8100C application, keep L2. At
RTL8110S(B) application, remove L2.
3D3V_LAN
V_12P
R104 1
2
1
1
3
1
2
1
1
2
1
BC39
0.1uF
C0603
2
1
2
1
1
2
1
2
2
4
1
1
2
2
25V, X7R, +/-10%
BC127
0.1uF
C0603
25V, X7R, +/-10%
BC126
0.1uF
C0603
25V, X7R, +/-10%
BC91
0.1uF
C0603
25V, X7R, +/-10%
BC5
0.1uF
C0603
25V, X7R, +/-10%
BC43
0.1uF
C0603
25V, X7R, +/-10%
BC18
0.1uF
C0603
25V, X7R, +/-10%
Check the difference between BCP69T1 and
2SB1188(Vendor's solution). It seemed that BCP69T1(1A)
is cheaper than 2SB1188(2A)
BC4
0.1uF
C0603
25V, X7R, +/-10%
2
1
1D8V_LAN
BC2
0.1uF
C0603
25V, X7R, +/-10%
2
2
FB L0805 100 Ohm
25V, X7R, +/-10%
BC40
0.1uF
C0603
When use RT8110C,
27
BC128
0.1uF
C0603
B
25V, X7R, +/-10%
B
2
DVDD_A
FB7
1
EC5
22uF
16V, +/-20%
CE20D50H110
C
* C64 to C67 are for U17 RTL8110S(B)/RTL8100C
AVDDL pins, such as 3, 7, 16, and 20.
Q2
BCP69T1
1
1
CTRL_2D5
2
Q6
BCP69T1
27
Dummy
1
1
CTRL_1D8
BC54
0.1uF
C0603
* C47 to C55 are for U17
RTL8110S(B)/RTL8100C DVDD
pins, such as 24, 32, 45, 54, 64,
78, 99, 110 and 116.
3D3V_LAN
2
4
27
BC58
0.1uF
C0603
2
2 0 +/-5% Dummy
R0603
1
R101 1
BC90
0.1uF
C0603
2
2D5V_LAN
1
2 0 +/-5% Dummy
R0603
BC106
0.1uF
C0603
2
R100 1
3
3D3V_LAN
BC7
0.1uF
C0603
2
2
2
1
EC1
10uF
16V, +/-20%
CE20D50H110
1
C
1
2D5V_LAN
1D8V_LAN is 2.5V
A
A
TECHNOLOGY COPR.
Title
POWER_LAN
Document Number
Date:
5
4
3
2
Rev
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
B
28
of
52
5
4
3
2
47K
2 +/-5%
R0603
R98 1
1
USB_BACK_POWER
1
D
*
BC396
1nF
50V, X7R, +/-10%
C0603
D
2
BACK PANEL ( LAN + 2 USB SLOT )
USB_OCJ_BACK 24
R97
560K
+/-5%
R0603
USE CONNECTOR A74314-001 WITH 10/100 DESIGNS(Foxconn P/N:UB11123-L71-001)
USE CONNECTOR A74307-002 WITH GIGABIT DESIGNS(Foxconn P/N:UB11123-L91X8-1)
R90
470
+/-5%
R0603
*
BC112
470pF
50V, X7R, +/-20%
C0603
Dummy
R89
0
+/-5%
R0603
Dummy
F3
F1813_2.6A
CN10
LED caps. should be placed
next to connector
*
R87
49.9
+/-1%
R0603
*
*
R72
49.9
+/-1%
R0603
R66
49.9
+/-1%
R0603
*
*
R62
49.9
+/-1%
R0603
Dummy
R52
49.9
+/-1%
R0603
Dummy
*
*
R46
49.9
+/-1%
R0603
Dummy
R37
49.9
27 LAN_LINK_1000J
+/-1%
27 LAN_LINK_100J
R0603
Dummy
R91
*
*
R93
49.9
+/-1%
R0603
0
+/-5%
R0603
Dummy
LINK_1000J
*
B
*
BC107
10nF
50V, X7R, +/-10%
C0603
*
BC86
10nF
50V, X7R, +/-10%
C0603
*
BC74
10nF
50V, X7R, +/-10%
C0603
Dummy
*
BC55
10nF
50V, X7R, +/-10%
C0603
Dummy
27
28
29
30
C
1
5
YLW_LED
*
9
10
11
12
13
14
15
16
17
18
RJ45-MJ2
MDI_0
MDI_0J
MDI_1
MDI_1J
MDI_2
MDI_2J
MDI_3
MDI_3J
BC115
470pF
C0603
50V,NPO,+/-5%
USB-1
*
BC118
470pF
C0603
USB-2
27 LAN_ACTLEDJ
50V,NPO,+/-5%
27
27
27
27
27
27
27
27
20
19
GRN_LED
C
2
*
R94
470
+/-5%
R0603
5V_DUAL_BACK
1
*
2D5V_LAN
*
3D3V_DUAL 3D3V_DUAL
22
21
BC113
0.1uF
25V, X7R, +/-10%
C0603
Dummy
2
6
USBP3N_R
USBP2N_R
3
7
USBP3P_R
USBP2P_R
4
8
USB_BACK_POWER
23
24
25
26
RJ45_USB
*
*
BC60
470pF
C0603
50V,NPO,+/-5%
USB4X2_RJ45P10_LED
B
Pin 18 need to be checked
L5
BC117
**
BC116
0.1uF 25V, X7R, +/-10%
C0603
1nF C0603
50V, X7R, +/-10%
1
2
USBP3N
USBP3P_R
4
3
USBP3P
USBP2N_R
Common Choke 90 Ohm 2L
L6
Dummy
1
2
USBP2N
USBP2P_R
4
USBP2P
BC114
470pF
C0603
50V,NPO,+/-5%
USBP3P_R
USBP3N_R
USBP2P_R
USBP2N_R
RN4
2
4
6
8
* 13
0
+/-5%
5 8P4R0603
7
3
USBP3N
24
USBP3P
24
USBP2N
24
USBP2P
24
Common Choke 90 Ohm 2L
LINK_1000J
*
Dummy
USBP3N_R
Place these components close to the LAN controller
A
EC3
1000uF
6.3V, +/-20%
CE35D80H200
USB_BACK_POWER
USBP3P
USBP3N
USBP2P
USBP2N
A
two common chokes and one RN co-layout
FOXCONN PCEG
Title
LAN / XDP Connectors
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
29
of
52
3D3V_SYS
1D8VCC
PCI_PAR
PCI_PERRJ
PCI_SERRJ
FRAMEJ
TR DYJ
IRD YJ
STOPJ
DEVSELJ
IDSEL6
112
117
113
115
116
100
PCI_FRAMEJ
PCI_TRDYJ
PCI_IRDYJ
PCI_STOPJ
PCI_DEVDELJ
PCI_IDSEL
PREQ5J
GNT5J
86
85
PCI_REQJ
PCI_GNTJ
INTEJ
82
PCI_INTAJ
ICH_P_PCIRSTJ 83
PCI_RSTJ
26,39
INTEJ
,39,40,41,46,48 ICH_P_PCIRSTJ
CK_33M_Sil3112A 84
7 CK_33M_Sil3112A
B
R5769
10K
*
3D3V_SYS
67
*
1K +/-1%
R5728 1K +/-5%
131
R0603
*
PLACE CLOSE TO PIN_33
33
TEST_MODE
1
A
XTAL-25MHz
BC5728
10pF
C0603
1
2
1
XTAL9-2
36
XTALO
8
11
14
17
21
24
27
30
34
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
BC5738
10pF
C0603
S_TXP2
S_TXN2
S_RXP2
S_RXN2
9
10
S_RXP2
S_RXN2
FL_ADDR18
FL_ADDR17
FL_ADDR16
FL_ADDR15
FL_ADDR14
FL_ADDR13
FL_ADDR12
FL_ADDR11
FL_ADDR10
FL_ADDR09
FL_ADDR08
FL_ADDR07
FL_ADDR06
FL_ADDR05
FL_ADDR04
FL_ADDR03
FL_ADDR02
FL_ADDR01/BA5_EN
FL_ADDR00/IDE_CFG
66
65
64
63
62
61
60
59
58
55
54
53
52
51
50
49
44
43
42
FL_CSJ
FL_RDJ
FL_WRJ
BC5752
0.1uF
C0603
BC5771
0.1uF
C0603
PLACE CLOSE TO PIN 3
3D3V_A
3D3V_SYS
S_RXN1 BC4462 C0603
S_RXP1 BC4473 C0603
S_TXP2 BC4544 C0603
S_TXN2 BC4595 C0603
S_RXN2 BC4556 C0603
S_RXP2 BC4607 C0603
143
48
45
10nF 50V,X7R,+/-10% S_RXN1_R
10nF 50V,X7R,+/-10% S_RXP1_R
10nF 50V,X7R,+/-10% S_TXP2_R
10nF 50V,X7R,+/-10% S_TXN2_R
10nF 50V,X7R,+/-10% S_RXN2_R
10nF 50V,X7R,+/-10% S_RXP2_R
1
2
3
4
5
6
7
CN251
SATA
8
1
2
3
4
5
6
7
CN271
SATA
8
1
*
2
2
BC5803
10uF
C0805
FB L0805 100 Ohm
10nF 50V,X7R,+/-10% S_TXP1_R
10nF 50V,X7R,+/-10% S_TXN1_R
1D8VCC
3D3V_SYS
3D3V_A
FB357
1
S_TXP1 BC4440 C0603
S_TXN1 BC4451 C0603
D
PLACE CLOSE TO FB360-1
R5783
24.9
+/-1%
R0603
R1/(R1+R2)=1.25/VOUT
R5698
1K
+/-5%
R0603
*
BC5763
10uF
C0805
BC5712
0.1uF
C0603
EC680
100uF
CE20D50H110
1
16
15
*
PLACE CLOSE TO PIN 1
*
BC5168
22uF
C1206
EC710
100uF
CE20D50H110
2
S_TXP2
S_TXN2
*
2
ADJ
S_RXP1
S_RXN1
R5772
56
R0603
+/-1%
1
39
56
79
81
98
118
29
28
3D3V_SYS
C
9
BC5448 BC5326 BC5425 BC5344 BC5403 BC5362 BC5381
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
*
*
C0603
*
C0603
*
C0603
*
C0603
*
C0603
*
C0603
C0603
9
BY PASS CAP close to Every Power Pin
1D8VCC
FL_DATA07
FL_DATA06
FL_DATA05
FL_DATA04
FL_DATA03
FL_DATA02
FL_DATA01
FL_DATA00
77
76
75
74
71
70
69
68
FL_DATA00
BC5521 BC5462 BC5543 BC5484 BC5565 BC5506
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
FL_DATA00
*
25
*
C0603
*
C0603
*
C0603
*
C0603
*
C0603
C0603
High efficiency LED case
B
3D3V_SYS
EEPROM_SDAT
EEPROM_SCLK
XTALI/CLKI
4
SCAN_EN
2
SiI3112
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BY PASS CAP close to Every Power Pin
40
41
SCAN_CLK
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
PCI_M66EN
35
R0603
2 +/-5%
2
X9
S_RXP1
S_RXN1
REXT
XTAL9-1
10M
*
R5747
S_TXP1
S_TXN1
PCI_CLK
+/-5% R0603
R5718
22
23
*
BC5743
0.1uF
C0603
*
5
7
13
18
20
26
31
R5759
510
+/-5%
R0603
1D8VCC_A
1
PREQ5J
GNT5J
S_TXP1
S_TXN1
*
BC5157
22uF
C1206
LED6
LED_Green
High efficiency
BC5782 BC5794 BC5593 BC5615 BC5636 BC5657 BC5678
10uF
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
FL_DATA00
129
119
109
99
88
80
78
73
57
47
38
1
C0805
*
C0805
*
C0603
*
C0603
*
C0603
*
C0603
C0603
BY PASS CAP close to Every Power Pin
AD21
R4037
330 IDSEL6
A
FOXCONN PCEG
145
26,39
26
6
12
19
25
32
37
2
26,27,39,40,41,46 FRAMEJ
26,27,39,40,41,46 TRDYJ
26,27,39,40,41,46 IRDYJ
26,27,39,40,41,46 STOPJ
26,27,39,40,41,46 DEVSELJ
VDDD
VDDD
VDDD
VDDD
VDDD
VDDO
2
121
114
120
2
1
PAR
PERRJ
SERRJ
OUT
2
26,27,39,40,41,46 PAR
26,27,39,40,41,46 PERRJ
26,27,39,40,41 SERRJ
IN
1
PCI_CBE3
PCI_CBE2
PCI_CBE1
PCI_CBE0
3
*
97
111
122
134
3D3V_A
1D8VCC_A
FB360
FB L0805 100 Ohm
1
2
AP1084
** **
CBEJ3
CBEJ2
CBEJ1
CBEJ0
VDDI
VDDI
VDDI
VDDI
VDDI
VDDI
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
CBEJ3
CBEJ2
CBEJ1
CBEJ0
26,27,39,40,41,46
26,27,39,40,41,46
26,27,39,40,41,46
26,27,39,40,41,46
U321
** **
C
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD09
PCI_AD08
PCI_AD07
PCI_AD06
PCI_AD05
PCI_AD04
PCI_AD03
PCI_AD02
PCI_AD01
PCI_AD00
145
D
89
90
91
92
93
94
95
96
101
102
103
104
105
106
107
110
123
124
125
126
127
130
132
133
135
136
137
138
139
140
141
142
1D8VCC_A
*
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
3
46
72
87
108
128
144
26,27,39,40,41,46 AD[31..0]
U39
1
2
1D8VCC
2
1
3D3V_SYS
3
1
4
*
5
Title
SATA Controller/Regulator
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
30
of
52
5
AUX_R
R0603 +/-5%
22
R0603 +/-5%
16V, +/-20%
100uF
Dummy
EC32
R115
*
R136
4.7K
R0603
+/-5%
X
2
1
Dummy
Dummy
10
FRONT_OUT_L
**
R117
39.2K
+/-1%
R0603
Dummy
AUX_L
Dummy
RET-AUX-R
BC79
1uF C0805
10V, X7R, +/-10%
RET-AUX-L
3
4
3
3
BAT54A
Dummy
C0603 BC573
100pF
50V,NPO,+/-5%
C0603 BC574
Dummy
100pF
50V,NPO,+/-5%
C0603 BC575
Dummy
100pF
50V,NPO,+/-5%
C0603 BC576
Dummy
100pF
50V,NPO,+/-5%
Dummy
******
5.1K R0603
Dummy
R110
FRONT_OUT_L
10uFC1206 16V,X5R,+/-10%
Dummy
R704 0 +/-5%
R0603
FRONT_OUT_R
R705 0 +/-5%
BC59
1uF C0805 10V, X7R, +/-10%
BC57
1uF C0805 10V, X7R, +/-10%
CD-R
BC56
1uF C0805 10V, X7R, +/-10%
CN4
1
2
3
4
5
LINE_OUT_R
EC10
LINE_OUT_L
EC6
for ALC880
*
R0603
10uFC1206 16V,X5R,+/-10%
FB4
Dummy
16V, +/-20%
FB L0603 600 Ohm
100uF AUD-FIO-R R78 0 +/-5%
R0603
1
2
FB5
CE20D50H110
Dummy
16V, +/-20%
FB L0603 600 Ohm
100uF AUD-FIO-L R92 0 +/-5%
R0603
1
2
CE20D50H110
Dummy
R57 10K
R0603 +/-5%
Dummy
R48
20K R0603 +/-1%
Dummy
J D3
L_OR_A
J D4
+/-1% 10K
R0603
3.3uF
Dummy
10V,Y5V,+80%/-20%
C0805
BC16
Dummy
CN6B
R20
R19
0
+/-5%
R0603
Dummy
L_OS_A
F-JD
L_OL_A
*
10K +/-1% JD1_1
R0603
*
25
24
23
22
J D5
38
39
JST-CON4-2-Black
R0603
+/-5%
22K
R16
*
R17
22K
+/-5%
R0603
F-JD
L1-JD
MIC1-JD
R669
5.1K R0603 SURRBACK-JD
+/-1% Dummy
R670
10K +/-1% R0603
Dummy
R698
FRONT_OUT_R
20K +/-1%
R0603 Dummy
BC17
100pF
C0603
50V,NPO,+/-5%
BC15
100pF
C0603
50V,NPO,+/-5%
JACK-AUDX3 Vertical
FRONT_OUT
B
C EN-JD
R671
5.1K R0603 +/-1% SU RR-JD
Dummy
R56
FRONT_OUT_L
0 +/-5%
R0603 Dummy
R699
20K
+/-1%
R0603
Dummy
0
R0603 AZ-FIO-SENSE
+/-5% Dummy
R689
*
for ALC880
CD-IN
5
SU RR-JD
+/-1%
FIO_PRESENCEJ
R668
BC143
* *
CD-L
CD -GND
***
39.2K R0603
Dummy +/-1%
R44
+5VA
(1% accuracy resistor
is required for jack detect)
for ALC850/ALC658/ALC655
JST-CON4-2-White
HAUXIN4M
for ALCALC658/ALC655
Dummy
* *
3
4
Header_1X4_2
CN3
1
2
3
4
R667
SENSE_A
(ALC880)
*
1uF C0805
10V, X7R, +/-10%
* *
A
BC71
31
35
34
33
32
R116
20K
+/-1%
R0603
Dummy
D7
* *
AUX_R
R0603
FRONT_OUT_R
R139
4.7K
R0603
+/-5%
BC142
for ALC850 only
L_IR_A
L_IS_A
L1-JD
L_IL_A
MIC2-VREFO
*
+/-5%
R43
22K
R0603
+/-5%
Dummy
SPDIF_OUT
1
**
R42
22K
R0603
Dummy
R691
0
R0603
+/-5%
DUMMY
61
65
64
63
62
SENSE_B
R138
4.7K
R0603
+/-5%
*
C0805
SURRBACK-L_M
10V, X7R, +/-10%
SURR-R_C
SURR_GND
SU RR-JD
SURR-L_C
C
HEADER_2X5_8 Shield
* *
* *
*
1uF
21
25
24
23
22
JP2
1
* *
BC589
Dummy
* *
AUX_L
LINE2-VREFO
for ALC880 ONLY
RET-AUX-R
R690 0 +/-5%
R0603
DUMMY
SURRBACK-JD R692 0 +/-5%
RET-AUX-L
R0603
Dummy
L_OR_A
L_OS_A
F-JD
L_OL_A
*
2
4
6
D9
J9_P8
SURRBACK-R_C
JD0
R638 0 +/-5%
J1
1
3
5
7
9
BAT54A
10V, X7R, +/-10%
1uF
C0805
SURRBACK-R_M
51
55
54
53
52
R0603 +/-5%
JD1
BC144
4.7uF
10V, Y5V, +80%/-20%
C0805
CE20D50H110
R140
4.7K
R0603
+/-5%
5V_SYS
10K
Dummy
16V, +/-20%
100uF
CE20D50H11016V, +/-20%
EC21
100uF
CE20D50H110
Dummy
Dummy
R1410 +/-5%
R0603
Dummy
16V, +/-20%
EC20
100uF
CE20D50H110
Dummy
Dummy
for ALC880 ONLY
LFE_C
CEN_GND
C EN-JD
CEN_C
* *
AUX_L
22
Dummy
AUX_R BC588
Dummy
C0603 BC571
*
* *
J D0
EC33
for ALC655/ALC203
for ALC850 ONLY
1
5
4
3
2
10K
Dummy
R0603 +/-1%
3.3uF
10V,Y5V,+80%/-20%
C0805
BC587
*
R0805
+/-5%
*
M_R_A
M_S_A
MIC1-JD
M_L_A
* *
R703
AZ-FIO-SENSE
HEADER_1X2
R745 0 +/-5%
DUMMY
(ALC850/ALC658/ALC655)
2
+/-5%
BC78
100pF
50V, NPO, +/-10%
C0603
41
45
44
43
42
*
R702
AUD-FIO-L
MIC2-L
MIC2-R
JP1
1
2
SURRBACK-L_C
R0603 +/-5%
1
0
R747 0 +/-5%
DUMMY
LINE-IN
(SURR_OUT)
CEN_C
LFE_C
CN2A
DUMMY
SURRBACK-R_C
SB_P4
SURRBACK-JD
SURRBACK-L_C
*
*
1K
10K +/-5%
*
*
*
B
R68
2.2K
R0603
+/-5%
*
R69
10K
R0603
+/-5%
R746 0 +/-5%
DUMMY
BC41
JACK-AUDX3 Vertical
100pF
C0603
50V,NPO,+/-5%
SURR-L_C
SURR-R_C
CN2B
DUMMY
40
* *
AUD-FIO-R
*
R0603
100pF
50V,NPO,+/-5%
C0603 BC572
Dummy
100pF
50V,NPO,+/-5%
**
R0603
*
R63
10nFC0603
Dummy
*
*
R137
for ALC880
BC73
for ALC650
*
C0805
R15
16V,Y5V,+80%/-20%
**
R64
10K
R0603
+/-5%
50V, X7R, +/-10%
R575
0
2
35
34
33
32
2 DUMMY
FB L0603 600 Ohm
2 DUMMY
FB L0603 600 Ohm
2 DUMMY
FB L0603 600 Ohm
2 DUMMY
FB L0603 600 Ohm
2 DUMMY
FB L0603 600 Ohm
2 DUMMY
FB L0603 600 Ohm
1uF
BC24
+5VA
*
SPDIF_IN
L_IS_A
L1-JD
L_IL_A
ALC850/658/655: INTEL Front Panel I/O Connectivity Design Guide Ver 1.0
ALC880: New Azalia Analog Front Panel I/O Connectivity defined by INTEL
*
1
2
GND
2
BC122
10uF
16V, X5R, +/-10%
C1206
L_IR_A
FB L0603 600 Ohm
FB11
BC31
100pF
C0603
50V,NPO,+/-5%
R34
22K
R0603
+/-5%
*
CN6C
J D3
3.3uF
10V,Y5V,+80%/-20%
C0805
BC72
Dummy
Onboard Header for Front Panel I/O Module
FIO_MIC1
1
*
10K
R0603
+/-1%
for ALC658/ALC850 JACK DETECT
*
BC98 LM78M05
10uF
16V, X5R, +/-10%
C1206
Dummy
3D3V_SYS
*
*
IN
R22
22K
R0603
+/-5%
R59
0
+/-5%
R0603
Dummy
FB6
FB L0603 600 Ohm
1
2
1
BC38
2.2uF
C0805
16V,Y5V,+80%/-20%
*
*
OUT
LINE1_L
*
JD3_1
*
*
U9
3
LINE1_R
R585
2.2K
+/-5%
R0603
10K R0603
+/-1%
R58 Dummy
*
J D3
for ALC650/ALC655/ACL203
C0805
*
*
0 +/-5%
R0805
Dummy
BC23
2.2uF
C0805
16V,Y5V,+80%/-20%
MIC2-VREFO
+/-5%
R0603 Dummy
Dummy
R14
R584
2.2K
+/-5%
R0603
Dummy
Dummy
**
R6 0
R0603
R105
*
R1 0
JD3_1
FB23
FB L0805 300 Ohm
+/-25%
0805
*
J D4
+/-5% R0603
Dummy
R0603 Dummy LINE2-VREFO
+/-5%
MIC1-VREFO-R
+/-5% R0603
Dummy
R3 0
for ALC880
+5VA
LINE1_VREFO_R
for ALC655/850
for ALC850/658
for ALC850/ALC658
5V_SB_SYS
for ALC658/ALC850 JACK DETECT
for ALC655
J D1
SURR-L_M
1uF Dummy
1
FB38
10V, X7R, +/-10%
SURR-R_M
1uF Dummy
1
FB39
10V, X7R, +/-10%
CEN_M
BC579 1uF Dummy
1
FB40
C0805
10V, X7R, +/-10%
LFE
LFE_M
BC580 1uF Dummy
1
FB41
C0805
10V, X7R, +/-10%
SURRBACK-L
SURRBACK-L_M 1
BC581 1uF Dummy
FB42
C0805
10V, X7R, +/-10%
SURRBACK-R
SURRBACK-R_M 1
BC582 1uF Dummy
FB43
C0805
10V, X7R, +/-10%
BC581,BC582 ONLY POPED FOR ALC880
BC577
C0805
BC578
S URR-R
LINE1_VREFO_L
for ALC880
AUD_P40 R32 0 +/-5%
SURR-L
D
* *
*
MIC-IN
for ALC658/ALC850 JACK DETECT
4.7K +/-5%
R0603
Dummy
*
for ALC650
*
R7 0
12V_SYS
(CEN/LFE)
C EN
BC14 0.1uF C0603
25V, X7R, +/-10%
*
*
JACK-AUDX3 Vertical
M_L_A
*
R0603
Dummy
*
BC2510uFC0805
6.3V,X5R,+/-20%
*
BC8
3.3uF
10V,Y5V,+80%/-20%
SURR-L_C
C0805
SURR-R_C
BC11
CEN_C
Dummy
LFE_C
SURRBACK-L_C
SURRBACK-R_C
36
37
for ALC880
0 +/-5% R0603 J D0
0 +/-5% R0603
BC27 1nF C0603
50V,X7R,+/-10%
for ALC850
C0603
Dummy
16V, Y5V,1uF
+80%/-20%
*
R688 0 +/-5%
R33
* *
BC13 1nF C0603
50V,X7R,+/-10%
R0603
Dummy
J D5
MIC1-VREFO-R
5
4
3
2
1
BC9
100pF
C0603
50V, NPO, +/-5%
for ALC850/ALC658/ALC655
BC26 1.0uF C0603
16V,Y5V,+80%/-20%
0 +/-5%
BC87
*
R65
for ALC880
4.7K +/-5%
R0603
4.7K +/-5%
R0603
J D0
*
CN6A
BC1
M_S_A
100pF
C0603 MIC1-JD
50V,NPO,+/-5%
for ALC880
1.0uF C0603
16V,Y5V,+80%/-20%
JD1_1
Dummy
Dummy
Sense_A
C
R224
5.6K BAT54A
+/-5%
R0603
R36
LINE1_VREFO_L
ALC655
PQFP48C
R38
0
+/-5%
R0603
Dummy
R0603 SENSE_B
FIO_MIC1
*
BC12
10uF
C0805
R123
2
R12
22K
+/-5%
R0603
10K
+/-1%
R0603
*
MIC1-VREFO-L
for ALC850/658
Sense_A
*
1
* *
28
27
29
30
31
32
*
D10
3
*
R11
22K
+/-5%
R0603
FB3
FB L0603 600 Ohm
1
2
10V,Y5V,+80%/-20%
*
*
**
VREFOUT
VREF
AFILT1
AFILT2
VRDA
Front-MIC2
*
BC47
1uF
C0603
MIC1-L
*
25V,X7R,+/-10%
DVdd1
DVdd2
AVdd1
AVdd2
ALC655
PC_BEEP
PHONE
AUX_L
AUX_R
JD2
JD1
CD_L
CD_GND
CD_R
MIC1
MIC2
LINE_IN_L
LINE_IN_R
SPDIFI(EAPD)
SPDIFO
FRONT_OUT_L
FRONT_OUT_R
MONO_OUT
NC_33
Front-MIC1
SURR-OUT-L
NC_40
SURR-OUT-R
CEN-OUT
LFE-OUT
JD0(GPIO0)
XTLSEL
4
7
26
42
49
*
RESET#
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
LINE_OUT_L
LINE_OUT_R
LINE1_VREFO_R
VOLUME_C
R5 0 +/-5%
Dummy
SURR-L
AUD_P40
S URR-R
C EN
LFE
SURRBACK-L
R45
SURRBACK-R
R51
**
R82
R583
10K
+/-5%
R0603
Dummy
MIC1-VREFO-L
35
36
37
33
34
39
40
41
43
44
45
46
DVss1
DVss2
AVss1
AVss2
NC_49
*
22pFC0603
BC120
50V,NPO,+/-5%
for ALC655/ALC203
50V, NPO, +/-10%
* ** *
1
9
25
38
25V,X7R,+/-10%
**
*
for ALC650
VOLUME_C
*
FB1
FB L0603 600 Ohm
1
2
10V,Y5V,+80%/-20%
*
BC121 100pF
C0603
*
R85
1K
+/-5%
R0603
22
MIC1-R
R578
10K
+/-5%
R0603
Dummy
XTL_OUT
XTL_IN
11
6
10
8
5
1.0uF 16V,Y5V,+80%/-20%
C0603
12
13
AUX_L
14
AUX_R
15
MIC2-L R60
0
R0603
+/-5% 16
MIC2-R
R0603
+/-5% 17
CD-L
R49
0
18
CD -GND
19
CD-R
20
MIC1-L
21
MIC1-R
22
LINE1_L
23
LINE1_R
24
SPDIF_IN
47
SPDIF_OUT
48
BC105
*
*
+/-5% R0603
10K R0603 +/-5%
3
2
AC_97RSTJ
BC33
0.1uF
25V,X7R,+/-10%
C0603
6.3V,X5R,+/-20%
SPKR
HDA_P3
HDA_P2
R0603
+/-5% R0603
*
*
25,35
R96
50V,NPO,+/-5%
R86
0 +/-5%
R83
0
22R0603 +/-5%
*
ICH_RSTJ
ICH_BCLK
ICH_SYNC
ICH_SDIN2
ICH_SDOUT
C0603 33pF
BC102
50V,NPO,+/-5%
C0603 33pF
BC104
24
24
24
24
24
*
R80
7 CK_14M_AUDIO
BC10
10uF
16V, X5R, +/-10%
C1206
*
R0603 Dummy
*
R10
INSULATOR
*
0 +/-5%
*
BC28
0.1uF
C0603
25V, X7R, +/-10%
C0603
U2
Reserved for Azalia Front Panel
I/O is recognized by driver
R79
FIO_PRESENCEJ
BC93
0.1uF
R9
0
+/-5%
R0603
Dummy
M_R_A
INSULATOR
*
*
C0603
* *
XTAL-24.576MHz
2
BC100
22pF
Dummy
50V,NPO,+/-5%
C0603
Dummy
1
BC103
0.1uF
*
BC42
1uF
C0603
* *
* *
C0805
6.3V,X5R,+/-20%
X1
BC101
22pF
50V,NPO,+/-5%
C0603
Dummy
for ALC880
BC97
10uF
+5VA
*
for ALC850/ALC658/ALC655
*
D
3D3V_SYS
3D3V_SYS
*
*
1
*
BC591
1uF
10V, X5R, +/-10%
C0603
Dummy
2
for ALC880
*
R400
3
*
HDA_P3
4
0 +/-5% R0603
Dummy
0 +/-5% R0603
Dummy
*
R384
*
HDA_P2
SURRBACK-JD
ONLY FOR ALC850
Dummy
A
for ALC658/ALC850 JACK DETECT
AUX LINE-IN
FOXCONN PCEG
Title
AC' 97 2.3/Azalia Codec
Size
Document Number
Custom
Date:
5
4
3
2
915A01 DDR2
Tuesday, May 18, 2004
1
Sheet
31
Rev
B
of
52
5
4
3
2
1
3D3V_SYS
JP2
MODE
NORMAL
(1-2)
Safe Speed
BC456
0.1uF
25V, X7R, +/-10%
C0603
PWRGD_3V
CK_33M_FWH
FWH_TP_IC
7,10,15,24,34
*
R516
4.7K
+/-5%
R0603
26JP4
ICH_FWH_PLTRSTJ
H3M
HEADER_1X3
R517
4.7K
+/-5%
R0603
1
2
3
25
0
32
IC
FWH4
FWH3
FWH2
FWH1
FWH0
23
17
15
14
13
ID0
ID1
ID2
ID3
12
11
10
9
FGPI4
RSTJ
FGPI3
FGPI2
FGPI1
FGPI0
WPJ
TBLJ
*
R489
8.2K
+/-5%
R0603
*
R488
8.2K
+/-5%
R0603
INITJ_3D3V
INITJ_3D3V
24
FWH_TP_RFU0
FWH_TP_RFU1
FWH_TP_RFU2
FWH_TP_RFU3
FWH_TP_RFU4
TBD
L_FRAMEJ
L_AD3
L_AD2
L_AD1
L_AD0
AC_SDOUT functional strap definitions
Platform
signal
usage
865
AC_SDOUT
Safe mode
Grantsdale
ACZ_SDOUT
XOR chain(TBD)
24,42,48
L_AD[3..0]
24,42,48
H2
****
Optics
Optics
BC500
C0603
BC499
C0603
BC476
C0603
Optics
H7
H9
1
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
Default
25V, X7R, +/-10%
0.1uF
25V, X7R, +/-10%
0.1uF
(2-3)
1
3D3V_SYS
BC458
C0603
Lock
H8
1
R0603
R0603
R0603
R0603
(1-2)
Optics
H6
FWH TBL#
Unlock
Optics
1
Optics
H14
B
H10
1
Optics
H11
5
6
7
1
2
3
MH
(NPTH)
H12
5
6
7
MH
1
2
3
(NPTH)
H13
5
6
7
MH
1
2
3
(NPTH)
H15
5
6
7
MH
1
2
3
(NPTH)
B
1
Optics
H16
5
6
7
MH
1
2
3
(NPTH)
4
9
8
(NPTH)
4
9
8
MH
1
2
3
4
9
8
H5
5
6
7
4
9
8
MH
(NPTH)
4
9
8
4
9
8
1
2
3
4
9
8
H4
5
6
7
(NPTH)
4
9
8
H3
1
2
3
C
1
SST49LF004A
PLCC32J
use 8Mb FWH
* * * *
JP4
H17
1
100
+/-5%
100 +/-5%
100 +/-5%
100 +/-5%
R490
8.2K
+/-5%
R0603
16
GND
R0603 +/-5%
Dummy
*
D
27
29
22
21
20
19
18
3
4
5
6
7
8
CBLID_P
VCC
24
RFU22
RFU21
RFU20
RFU19
RFU18
GND
R383
INITJ
CLK
26
FWH_WPL
*
24
VPP
R540
R535
R527
R524
C
1
31
4.7K +/-5%FWH_FGPI4 30
R0603
2
1
2
3
*
*
R491
VCCA
VCC
U32
7
OPEN
Default
GNDA
*
28
*
25
BC457
0.1uF
25V, X7R, +/-10%
C0603
D
(2-3)
RECOVERY
3D3V_SYS
5
6
7
H1
1
MH
Optics
4
9
8
A
(NPTH)
H18
5
6
7
MH
1
2
3
(NPTH)
4
9
8
H19
1
2
3
5
6
7
MH
A
FOXCONN PCEG
Title
FWH
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
32
of
52
5
4
3
2
1
USB Connector: Back side 4 ports and Front side 4 ports.
two common chokes and one RN co-layout
RN30
S2
2
USBP4N_R
7
USBP4P
4
3
USBP4P_R
6
5
Id(N MOS) max= 6.9A
Id(P MOS) max= -5A
*
USBP7N_R
USBP7P_R
HEADER_2X5_9 Shield
2
CN19
BC329
C0603
@intel standard
X
2
4
6
8
10
1
5V_DUAL
C
F1813_2.6A
USBP6N_R
USBP6P_R
for 3D3V_SB / Front panel USB / SBLED
power consumption?
HEADER_2X5_9 Shield
5V_DUAL
@intel standard
Q50
8
1
7
6
D1
25V, X7R, +/-10%
0.1uF
*
1
3
5
7
F6
S2
* *
USB_CON1_PWR
G2
X
USBP5N_R
USBP5P_R
D2
BC19101 25V, X7R, +/-10%
C0603
0.1uF
EC4
1000uF
6.3V, +/-20%
CE35D80H200
2
4
6
8
10
D2
USBP4N_R
USBP4P_R
C
for USB differential trace change layer
25V, X7R, +/-10%
0.1uF
CN201
1
3
5
7
0.1uF
25V, X7R, +/-10%
0.1uF
BC5569
50V,X7R,+/-10%
10nF
USB_CON1_PWR
25V, X7R, +/-10%
0.1uF
* * * *
25V, X7R, +/-10%
D1
5
5V_SB_SYS
* R421
1.5K
+/-1%
R0603
5V_SYS
PWOK+
2
R424
1K
+/-5%
R0603
3
5V_SB_SYS
PWOK+
Q52
4
G
2N7002
PWOKJ
S
AO4600
12V_SYS
D
USBP5P_R
Common Choke 90 Ohm 2L
D
3
BC385
C0603
25V, X7R, +/-10%
0.1uF
BC110
C0603
USBP5N_R
4
BC94
C0603
2
USBP5P
BC81
C0603
1
*
4
S1
Dummy
USBP5N
PWOK+
3
G1
L29
2
BC88
C0603
24 USBP5P
G2
1
Common Choke 90 Ohm 2L
24 USBP5N
S1
USBP4N
3D3V_SYS
Q5
AO4600
1
G1
8
Dummy
D2
L28
D2
24 USBP4P
5V_SYS 5V_SB_SYS
D
0
+/-5%
8P4R0603
24 USBP4N
for KB/MS/Back panel USB
5V_DUAL_BACK
D1
D
USBP5N_R
USBP5P_R
USBP4N_R
USBP4P_R
2
4
6
8
D1
1
3
5
7
*
*
USBP5N
USBP5P
USBP4N
USBP4P
Q51
EC54 Id(N MOS) max= 6.9A
1000uFId(P MOS) max= -5A
6.3V, +/-20%
CE35D80H200
G PWRG_ATX
2N7002
PWRG_ATX
34
B
5V level
S
*
B
two common chokes and one RN co-layout
RN12
2
4
6
8
0
+/-5%
8P4R0603
24
A
24
USBP7N
USBP7P
L23
R2901
47K
2 +/-5%
R0603
1
USB_CON1_PWR
Dummy
USBP7N
4
3
USBP7N_R
USBP7P
1
2
USBP7P_R
USB_OCJ_FRONT 24
R291
560K
+/-5%
R0603
*
BC395
1nF
50V, X7R, +/-10%
C0603
2
*
1
3
5
7
A
Common Choke 90 Ohm 2L
24
USBP6N
24
USBP6P
USBP6N
USBP6P
L22
4
1
Dummy
3
USBP6N_R
2
USBP6P_R
FOXCONN PCEG
Title
USB Connectors
Common Choke 90 Ohm 2L
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
33
of
52
5
4
3
2
1
for some power supplies without pw-ok function
BC3799
C0603
0.1uF
R0603
27
26
25
-
*
BC595
10uF
6.3V, X5R, +/-10%
C1206
Dummy
*
R427
R382
12V_SYS
VOUT
R324
2
*
R388
301
+/-1%
R0603
42
FANOUT1
100
R0603
+/-5%
Dummy
0 +/-5%
R0805
+
2
-
*
*
R387
499
+/-1%
R0603
*
EC51
220uF
10V, +/-20%
CE25D60H110
4.7K +/-5% R0603
0 +/-5% R0603
Dummy
R441
1
LM358M
BC597
10uF
6.3V, X5R, +/-10%
C1206
Dummy
R440
R0603
1N4148W
R563
4.7K
+/-5%
R0603
R564
*
EC71
22uF
HEADER_1X4 (FAN4P)
25V, +/-20%
CE20D50H110
Dummy
BC394
0.1uF
C0603
27K +/-5%
FANIN2
R0603
R565
10K
+/-5%
R0603
42
12V_SYS
*
G
Q53
MMFT2955E
D R401
4
28K
+/-1%
5
*
CN21
4 4
3 3
52 2
1 1
R402
0
12V_SYS
+/-5%
R0805
0 +/-5%
R0805
Dummy
EC72
22uF
25V, +/-20%HEADER_1X4 (FAN4P)
CE20D50H110
Dummy
D24
*
1N4148W
R426
4.7K
+/-5%
R0603
CPU FAN
R423
27K
+/-5%
R0603
FANIN1
42
R422
10K
+/-5%
R0603
A
FOXCONN PCEG
Vout=Vref(1+R2/R1)+IadjR2
R1 is Up Resister.
Iadj=50uA
Vref=1.25V
5
*
5V_SYS
S
470K
+/-5%
R0603
R439
20K
+/-5%
R0603
*
BC382
1.0uF
16V,Y5V,+80%/-20%
C0603
D35
U28A
*
1
ADJ
VIN
Q71
MMFT2955E
4
R403
0 +/-5%
R0805
Dummy
CN38
FAN2_4
4
4
FAN2_3
3 3
FAN2_2
5 52 2
1
1
Rear Chassis FAN
*
AMS1085
3
4
U25
*
3D3V_DUAL
*
5V_DUAL
*
*
2
*
TC3
100uF
16V, +/-20%
CE20D50H110
8
*
BC371
1.0uF
16V,Y5V,+80%/-20%
C0603
R586
3
28K
+/-1%
1
*
*
R389
0 +/-5%
R0603
Dummy
D
LM358M
R592
0
12V_SYS
+/-5%
R0805
B
EC52
220uF
10V, +/-20%
CE25D60H110
*
A DJ
R386
301
+/-1%
R0603
Dummy
*
Dummy
A
U28B
R677
**
*
*
S
*
6
4
100
R0603
+/-5%
Dummy
+
C
*
FANOUT2
5
44
12V_SYS
BC438
0.1uF
25V, X7R, +/-10%
C0603
R675
470K
7
G
R0603
+/-5%
*
ADJ
NCP1117
R438
10K
+/-5%
R0603
25V, X7R, +/-10%
B
2
7,10,15,24,32
PWRGD_3VJ
*
20K
Peak fan current draw: 1.5A
+/-5%
Average fan current draw: 1.1A
R0603
Fan start-up current draw: 2.2A
Fan start-up current draw maximum duration: 1.0 second
Fan header voltage: 12V +/- 10%
3
1
*
2
*
8
R587
New FAN Header Definition
42
pin1. GND
pin2. +12V
pin3. Sense
pin4. Control
3D3V_SB
Vin
74LVC14A
5V_SYS
0 +/-5%
R0603
Dummy
R676
R0603
Q48
4 Vout
PWRGD_3V
1
R674
5V_SB_SYS
4
74LVC14A
*
for 5V_SYS / 5V_SB switching quickly
*
*
BC3909
C0603
0.1uF
25V, X7R, +/-10%
*
BC434
C0603
0.1uF
25V, X7R, +/-10%
*
BC390
C0603
0.1uF
25V, X7R, +/-10%
*
BC233
C0603
0.1uF
25V, X7R, +/-10%
*
25V, X7R, +/-10%
25V, X7R, +/-10%
*
25V, X7R, +/-10%
*
8
+/-1%
4.7K +/-5% R0603
*
R593
2N7002
*
100 G
+/-5%
R0603
3D3V_SYS
BC99
C0603
0.1uF
U26D
9
D
R547
12V_SYS
BC370
C0603
0.1uF
6
33
5V_SYS
BC3719
C0603
0.1uF
U26C
5
Q60
R673
0
R0603
+/-5%
S
*
0 +/-5%
R0603
Dummy
C
100
BC409
0.1uF
25V, X7R, +/-10%
C0603
*
3D3V_SB
D
R445
ATX-PWR_2X12
*
R672
SKTOCCJ
3D3V_SB
PWRG_ATX
PWRG_ATX
13,49
R444
100K
+/-5%
R0603
14
*
7
*
27
26
25
R544
10K
+/-5%
R0603
S
*
2N7002
*
*
*
100 G
+/-5%
R0603
BC3989
C0603
0.1uF
*
R543
10,12,24,42 SLP_S3J
*
5V_SYS
BC1989
C0603
0.1uF
14
25V, X7R, +/-10%
D
Q61
1
2
3
4
5
6
7
8
9
10
11
12
5V_SB_SYS
7
PS_ONJ
PS_ONJ
5V_SYS
0.1uF 25V, X7R, +/-10%
C0603
CN32
13 +3.3V3 +3.3V1
14 -12V
+3.3V2
15 GND4
GND1
16 PSON
+5V1
17 GND5
GND2
18 GND6
+5V2
19 GND7
GND3
20 RSVD PWR0K
21 +5V3 +5V_AUX
22 +5V4
+12V_1
23 +5V5
+12V_2
24 GND8
+3.3V4
D
42
BC3927
*
5V_SYS
25V, X7R, +/-10%
*
3D3V_SYS 12V_SYS
25V, X7R, +/-10%
R558
8.2K
+/-5%
R0603
-12V_SYS 3D3V_SYS
BC2989
C0603
0.1uF
*
*
25V, X7R, +/-10%
5V_SB_SYS
Title
Power Conn. / 3V_SB/ FAN
Size
Date:
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
34
of
52
4
3
2
1
3D3V_SYS
5V_SYS
2
prevent clearing CMOS when power-on
3
2
1
BEEP
*
R339
10K
+/-5%
R0603
(2-3)
Clear
(1-2)
42
SPKR
2
SIO_BEEP
1
R518
3
2.2K
+/-5%
R0603
BAT54C
Default
Q54
MMBT3904
B
*
E
Normal
+
2
-
D
BUZZER
BC466
0.1uF
25V, X7R, +/-10%
C0603
PSIN
PBTNJ
R342
0 +/-5%
R0603
*
42
R368
10K
+/-5%
R0603
CMOS
C
D28
25,31
JP5
1
Buzzer
JP5
Clear CMOS
*
3
4
Header_1X4_2
3
2
1
3D3V_SB
1
3
4
BUZ1
H3M
HEADER_1X3
25 RTCRSTJ
3D3V_SB
1
SD103AW
*
HEADER_1X2
H2M
Chassis Intruder
D
J8
100 +/-5%
R0603
D31
1
2
1
*
25 INTRUDERJ
J2
R526
220
+/-5%
R0603
R534
*
5
PWRBTNJ
5V_SB_SYS
24,42
BC333
0.1uF
25V, X7R, +/-10%
C0603
Dummy
*
27
HDLEDP
HDD_LED
R562 1
2 4.7K
1
3
5
7
9
+/-5% R0603
7,14,24,49 ICH_SYS_RSTJ
B
C0603
25V, X7R, +/-10%
0.1uF
BC526
PBTNJ_SIO
PBTNJ_SIO
X
*
Header_2X5_10 Shield
42
R551
BC361
1nF
C0603
50V, X7R, +/-10%
*
2
4
6
8
0
+/-5%
1-3:
5-7:
6-8:
2-4:
G
S
BC185
1nF
C0603
LWAKE_CON
100
+/-5%
R0603
*
NEED TO REPLACE TO CIS LIB
R188
24,45 ICH_RIJ
SUSLED
42
FSUSLED
24
4
C
HEADER_1X3 (JWOL)
WOL
R276
*
0 R0603
+/-5% Q33
Dummy 2N7002
WOL
D
R201
0
Dummy
R275
10K
R0603
+/-5%
5V_SB_SYS
1
HDD LED
Reset
Power Button
Power/Suspend LED
CMPT3904
Q26
10K
+/-5%
R0603
CN17
1
2
3
R243
*
*
R552
680
+/-5%
R0603
Dummy
*
WOLJ
3
R548
680
+/-5%
R0603
R656
330
+/-5%
R0603
Dummy
42
2
*
R549
330
+/-5%
R0603
*
24
100
0
*
*
5V_SB_SYS
J4
HDD_LED
3D3V_SB
*
BC518
0.1uF
25V, X7R, +/-10%
C0603
PLED
50V, X7R, +/-10%
25
BC391
1nF
C0603
50V, X7R, +/-10%
*
5V_SYS
*
5V_SYS
R194
*
26,27,39,40,41,46 PMEJ
*
C
R576
LWAKE
*
CN18
1
2
3
*
*
4
HEADER_1X3 (JWOL)
R242
100K
+/-5%
R0603
B
WAKE ON MODEM
C3
1nF
50V, X7R, +/-10%
C0603
5V_SYS
100 +/-5%
R0603
3D3V_SB
A
*
R569
10K
+/-5%
R0603
*
14
U26E
11
BC522
0.1uF
25V, X7R, +/-10%
C0603
Dummy
10
74LVC14A
13
7
PBTNJ_SIO
R561
3D3V_SB
7
42
PBTNJ_SIO
R566
4.7K
+/-5%
R0603
*
*
14
5V_SB_SYS
BC527
0.1uF
25V, X7R, +/-10%
C0603
*
IR CONNECTOR
U26F
12
J3
1
PBTNJ
74LVC14A
42
IRRX
42
IRTX
3
4
5
A
Header_1X5_2
for quick rise time
FOXCONN PCEG
Title
Front Panel / MISC Conn.
POP WHEN R357 POPED
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
35
of
52
5
4
3
2
1
D
D
3D3V_SB
3D3V_SYS 12V_SYS
12V_SYS
3D3V_SYS
Note: 20-24 mils
CN13
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
22,27,37,38,39,40,41 PSCLK
22,27,37,38,39,40,41 PSDATA
22,24,37,38 WAKEJ
WAKEJ
12V
12V
RSVDB3
GND
SMCLK
SMDAT
GND
3.3V
JTAG1
3.3VAUX
WAKE#
PRSNT1#
12V
12V
GND
JTAG2
JTAG3
JTAG4
JTAG5
3.3V
3.3V
PWRGD
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
GND
REFCLK+
REFCLKGND
HSIP0
HSIN0
GND
A12
A13
A14
A15
A16
A17
A18
ICH_G_PLTRSTJ
ICH_G_PLTRSTJ 22,26,37,38
KEY
C1
PCI-X1_SLOT
C2
RSVDB12
GND
HSOP0
HSON0
GND
PRSNT2#
GND
CK_PE_100M_P_1PORT
CK_PE_100M_N_1PORT
CK_PE_100M_P_1PORT1 7
CK_PE_100M_N_1PORT1 7
HSI_P1
HSI_N1
C
HSI_P1
HSI_N1
24
24
C2
C
B12
B13
B14
B15
B16
B17
B18
HSO_P1_SLOT
HSO_N1_SLOT
C1
24 HSO_P1_SLOT
24 HSO_N1_SLOT
place this slot near board edge
12V_SYS
*
EC12
470uF
16V, +/-20%
CE35D80H200
*
BC156
0.1uF
25V, X7R, +/-10%
C0603
3D3V_SYS
*
EC22
100uF
16V, +/-20%
CE20D50H110
*
BC167
0.1uF
25V, X7R, +/-10%
C0603
3D3V_SB
*
BC176
0.1uF
25V, X7R, +/-10%
C0603
B
B
A
A
FOXCONN PCEG
Title
PCI Express x1 Slot 1
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
36
of
52
5
4
3
2
1
D
D
3D3V_SB
3D3V_SYS 12V_SYS
12V_SYS
3D3V_SYS
Note: 20-24 mils
CN12
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
22,27,36,38,39,40,41 PSCLK
22,27,36,38,39,40,41 PSDATA
22,24,36,38 WAKEJ
WAKEJ
12V
12V
RSVDB3
GND
SMCLK
SMDAT
GND
3.3V
JTAG1
3.3VAUX
WAKE#
PRSNT1#
12V
12V
GND
JTAG2
JTAG3
JTAG4
JTAG5
3.3V
3.3V
PWRGD
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
GND
REFCLK+
REFCLKGND
HSIP0
HSIN0
GND
A12
A13
A14
A15
A16
A17
A18
ICH_G_PLTRSTJ
ICH_G_PLTRSTJ 22,26,36,38
KEY
RSVDB12
GND
HSOP0
HSON0
GND
PRSNT2#
GND
C2
24 HSO_P2_SLOT
24 HSO_N2_SLOT
B12
B13
B14
B15
B16
B17
B18
HSO_P2_SLOT
HSO_N2_SLOT
C1
C
CK_PE_100M_P_1PORT2 7
CK_PE_100M_N_1PORT2 7
HSI_P2
HSI_N2
HSI_P2
HSI_N2
C
24
24
C2
C1
PCI-X1_SLOT
CK_PE_100M_P_1PORT2
CK_PE_100M_N_1PORT2
place this slot near board edge
12V_SYS
*
EC11
470uF
16V, +/-20%
CE35D80H200
Dummy
*
3D3V_SYS
BC159
0.1uF
25V, X7R, +/-10%
C0603
*
3D3V_SB
EC18
100uF
16V, +/-20%
CE20D50H110
Dummy
*
BC173
0.1uF
25V, X7R, +/-10%
C0603
*
BC180
0.1uF
25V, X7R, +/-10%
C0603
B
B
A
A
FOXCONN PCEG
Title
PCI Express x1 Slot 2
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
37
of
52
5
4
3
2
1
D
D
3D3V_SB
3D3V_SYS 12V_SYS
12V_SYS
3D3V_SYS
Note: 20-24 mils
CN34
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
22,27,36,37,39,40,41 PSCLK
22,27,36,37,39,40,41 PSDATA
WAKEJ
22,24,36,37 WAKEJ
12V
12V
RSVDB3
GND
SMCLK
SMDAT
GND
3.3V
JTAG1
3.3VAUX
WAKE#
PRSNT1#
12V
12V
GND
JTAG2
JTAG3
JTAG4
JTAG5
3.3V
3.3V
PWRGD
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
GND
REFCLK+
REFCLKGND
HSIP0
HSIN0
GND
A12
A13
A14
A15
A16
A17
A18
ICH_G_PLTRSTJ
ICH_G_PLTRSTJ 22,26,36,37
KEY
C2
RSVDB12
GND
HSOP0
HSON0
GND
PRSNT2#
GND
C1
PCI-X1_SLOT
CK_PE_100M_P_1PORT3
CK_PE_100M_N_1PORT3
CK_PE_100M_P_1PORT3 7
CK_PE_100M_N_1PORT3 7
HSI_P3
HSI_N3
HSI_P3
HSI_N3
C
24
24
C2
24 HSO_P3_SLOT
24 HSO_N3_SLOT
B12
B13
B14
B15
B16
B17
B18
HSO_P3_SLOT
HSO_N3_SLOT
C1
C
place this slot near board edge
12V_SYS
*
EC1298
470uF
16V, +/-20%
CE35D80H200
*
3D3V_SYS
BC1569
0.1uF
25V, X7R, +/-10%
C0603
*
3D3V_SB
EC2288
100uF
16V, +/-20%
CE20D50H110
*
BC1678
0.1uF
25V, X7R, +/-10%
C0603
*
BC1768
0.1uF
25V, X7R, +/-10%
C0603
B
B
A
A
FOXCONN PCEG
Title
PCI Express x1 Slot3]
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
38
of
52
5
4
3
2
1
5V_SYS
3D3V_SYS
5V_SYS
12V_SYS
RN10
*
1
3
5
7
Note: 20-24 mils
CN15
INTCJ
INTAJ
7
CK_33M_PCI1
PREQ2J
AD31
AD29
AD27
AD25
CBEJ3
AD23
26,27,30,40,41,46 CBEJ3
AD21
AD19
C
AD17
26,27,30,40,41,46 CBEJ2
26,27,30,40,41,46 IRDYJ
IRD YJ
DEVSELJ
26,27,30,40,41,46 DEVSELJ
LOCKJ
PERRJ
26,40,41 LOCKJ
26,27,30,40,41,46 PERRJ
SERRJ
26,27,30,40,41 SERRJ
CBEJ1
AD14
26,27,30,40,41,46 CBEJ1
AD12
AD10
AD8
AD7
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
AD5
AD3
AD1
B
ACK64J
TRST+12V
TMS
TDI
+5V7
INTAINTC+5V8
RSV_3
+5V9
RSV
GND13
GND14
3.3VAUX
RESET+5V10
GNTGND15
PMEAD(30)
+3.3V7
AD(28)
AD(26)
GND16
AD(24)
IDSEL
+3.3V8
AD(22)
AD(20)
GND17
AD(18)
AD(16)
+3.3V9
FRAMEGND18
TRDYGND19
STOP+3.3V10
SMB_CLK
SMB_DATA
GND20
PAR
AD(15)
+3.3V11
AD(13)
AD(11)
GND21
AD(09)
AD(8)
AD(7)
+3.3V6
AD(5)
AD(3)
GND12
AD(1)
+5V4
ACK64+5V5
+5V6
PCI-W2M120
PCI124
1
2
D
-12V
TCK
GND1
TDO
+5V1
+5V2
INTBINTDPRSNT1RSV_1
PRSNT2GND2
GND3
RSV_2
GND4
CLK
GND5
REQ+5V3
AD(31)
AD(29)
GND6
AD(27)
AD(25)
+3.3V1
C/BE-(3)
AD(23)
GND7
AD(21)
AD(19)
+3.3V2
AD(17)
C/BE-(2)
GND8
IRDY+3.3V3
DEVSELGND9
LOCKPERR+3.3V4
SERR+3.3V5
C/BE-(1)
AD(14)
GND10
AD(12)
AD(10)
GND11
C/BE-(0)
+3.3V12
AD(06)
AD(04)
GND22
AD(02)
AD(00)
+5V11
REQ64+5V12
+5V13
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
RN9
*
INTBJ
INTDJ
1
3
5
7
3D3V_DUAL
ICH_P_PCIRSTJ 26,27,30,40,41,46,48
AD30
GNT2J
26
PMEJ
26,27,35,40,41,46
AD28
AD26
25V, X7R, +/-10%
BC307
0.1uF
C0603
*
*
BC140
0.1uF
25V, X7R, +/-10%
C0603
EC36
100uF
16V, +/-20%
CE20D50H110
*
R249
PSDATA
R253
RN5
*
1
3
5
7
AD22
AD20
AD18
AD16
RN17
FRAMEJ
TR DYJ
STOPJ
PSCLK
PSDATA
PAR
AD15
330 +/-5% AD18
R0603
0
+/-5%
0
+/-5%
SMB_CLK_RESUME 25,44,49
SMB_DATA_RESUME 25,44,49
FRAMEJ
26,27,30,40,41,46
TRDYJ
26,27,30,40,41,46
*
1
3
5
7
STOPJ
26,27,30,40,41,46
PSCLK
PSDATA
22,27,36,37,38,40,41
22,27,36,37,38,40,41
PAR
26,27,30,40,41,46
5V_SYS
RN7
*
1
3
5
7
INTDJ
8.2K
2
INTCJ
+/-5%
4
6 8P4R0603 INTAJ
INTBJ
8
INTDJ
INTCJ
INTAJ
INTBJ
26,40,41
26,40,41
26,40,41
26,40,41
INTEJ
8.2K
2
INTFJ
+/-5%
4
6 8P4R0603 INTGJ
INTHJ
8
INTEJ
INTFJ
INTGJ
INTHJ
26,30
26,46
26,27
26
8.2K
2
+/-5%
4
6 8P4R0603
8
PREQ1J
PREQ2J
PREQ0J
26,27
26
26,46
PREQ3J
PREQ4J
PREQ6J
PREQ5J
26,40
26,41
26
26,30
C
AD13
AD11
RN16
*
AD9
CBEJ0
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
CBEJ0
1
3
5
7
26,27,30,40,41,46
AD6
AD4
2
4
6
8
8.2K
+/-5%
8P4R0603
5V_SYS
AD2
AD0
R286
REQ64_1J
R280
BC258
0.1uF
C0603
EC69
100uF
16V, +/-20%
CE20D50H110
*
*
*
R225
PSCLK
AD24
IDSEL1
-12V_SYS
3D3V_SYS
25V, X7R, +/-10%
A
EC17
100uF
16V, +/-20%
CE20D50H110
12V_SYS
IDSEL1
3D3V_SYS
AD[31..0]
5V_SYS
D
FRAMEJ
2 8.2K
IRD YJ
4 +/-5%
6 8P4R0603 TR DYJ
DEVSELJ
8
2.7K
+/-5%
REQ64_1J
2.7K
+/-5%
ACK64J
B
ACK64J
AD[31..0]
5V_SYS
*
BC137
0.1uF
25V, X7R, +/-10%
C0603
26,27,30,40,41,46
3D3V_SYS
*
*
BC151
0.1uF
25V, X7R, +/-10%
C0603
A
BC206
0.1uF
25V, X7R, +/-10%
C0603
FOXCONN PCEG
Title
PCI Slot 1
Size
Date:
5
40,41
1
2
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
STOPJ
LOCKJ
PERRJ
SERRJ
2 8.2K
4 +/-5%
6 8P4R0603
8
***
5V_SYS
**
3D3V_SYS
-12V_SYS
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
39
of
52
5
4
3
2
1
5V_SYS
3D3V_SYS
-12V_SYS
3D3V_SYS
5V_SYS
12V_SYS
Note: 20-24 mils
CN35
PREQ3J
26,39 PREQ3J
AD31
AD29
AD27
AD25
CBEJ3
AD23
26,27,30,39,41,46 CBEJ3
AD21
AD19
C
AD17
26,27,30,39,41,46 CBEJ2
26,27,30,39,41,46 IRDYJ
IRD YJ
DEVSELJ
26,27,30,39,41,46 DEVSELJ
LOCKJ
PERRJ
26,39,41 LOCKJ
26,27,30,39,41,46 PERRJ
SERRJ
26,27,30,39,41 SERRJ
CBEJ1
AD14
26,27,30,39,41,46 CBEJ1
AD12
AD10
AD8
AD7
AD5
AD3
B
AD1
39,41
ACK64J
ACK64J
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
AD(8)
AD(7)
+3.3V6
AD(5)
AD(3)
GND12
AD(1)
+5V4
ACK64+5V5
+5V6
PCI-W2M120
PCI124
C/BE-(0)
+3.3V12
AD(06)
AD(04)
GND22
AD(02)
AD(00)
+5V11
REQ64+5V12
+5V13
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
D
INTAJ
INTCJ
INTAJ
INTCJ
26,39,41
26,39,41
3D3V_DUAL
ICH_P_PCIRSTJ 26,27,30,39,41,46,48
AD30
GNT3J
26
PMEJ
26,27,35,39,41,46
AD28
AD26
AD24
IDSEL2
IDSEL2
AD22
AD20
C
FRAMEJ
TR DYJ
STOPJ
PSCLK
PSDATA
PAR
AD15
FRAMEJ
26,27,30,39,41,46
TRDYJ
26,27,30,39,41,46
STOPJ
26,27,30,39,41,46
PSCLK
PSDATA
22,27,36,37,38,39,41
22,27,36,37,38,39,41
PAR
26,27,30,39,41,46
5V_SYS
AD13
AD11
AD9
CBEJ0
CBEJ0
26,27,30,39,41,46
AD6
AD4
R581
AD2
AD0
*
25V, X7R, +/-10%
BC3072
0.1uF
C0603
*
BC1403
0.1uF
25V, X7R, +/-10%
C0603
2.7K
+/-5%
REQ64_2J
B
REQ64_2J
EC3633
100uF
16V, +/-20%
CE20D50H110
*
AD[31..0]
-12V_SYS
*
BC2583
0.1uF
C0603
EC6933
100uF
16V, +/-20%
CE20D50H110
*
*
3D3V_SYS
25V, X7R, +/-10%
A
EC1712
100uF
16V, +/-20%
CE20D50H110
12V_SYS
330 +/-5% AD19
R0603
AD18
AD16
AD[31..0]
5V_SYS
R579
*
CK_33M_PCI2
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
*
7
INTBJ
INTDJ
INTBJ
INTDJ
TRST+12V
TMS
TDI
+5V7
INTAINTC+5V8
RSV_3
+5V9
RSV
GND13
GND14
3.3VAUX
RESET+5V10
GNTGND15
PMEAD(30)
+3.3V7
AD(28)
AD(26)
GND16
AD(24)
IDSEL
+3.3V8
AD(22)
AD(20)
GND17
AD(18)
AD(16)
+3.3V9
FRAMEGND18
TRDYGND19
STOP+3.3V10
SMB_CLK
SMB_DATA
GND20
PAR
AD(15)
+3.3V11
AD(13)
AD(11)
GND21
AD(09)
1
2
26,39,41
26,39,41
-12V
TCK
GND1
TDO
+5V1
+5V2
INTBINTDPRSNT1RSV_1
PRSNT2GND2
GND3
RSV_2
GND4
CLK
GND5
REQ+5V3
AD(31)
AD(29)
GND6
AD(27)
AD(25)
+3.3V1
C/BE-(3)
AD(23)
GND7
AD(21)
AD(19)
+3.3V2
AD(17)
C/BE-(2)
GND8
IRDY+3.3V3
DEVSELGND9
LOCKPERR+3.3V4
SERR+3.3V5
C/BE-(1)
AD(14)
GND10
AD(12)
AD(10)
GND11
1
2
D
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
26,27,30,39,41,46
5V_SYS
*
BC1373
0.1uF
25V, X7R, +/-10%
C0603
*
A
BC1513
0.1uF
25V, X7R, +/-10%
C0603
FOXCONN PCEG
Title
PCI Slot 2
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
40
of
52
5
4
3
2
1
5V_SYS
3D3V_SYS
-12V_SYS
3D3V_SYS
5V_SYS
12V_SYS
Note: 20-24 mils
D
D
CK_33M_PCI3
26,39 PREQ4J
PREQ4J
AD31
AD29
AD27
AD25
C
CBEJ3
AD23
26,27,30,39,40,46 CBEJ3
AD21
AD19
AD17
26,27,30,39,40,46 CBEJ2
26,27,30,39,40,46 IRDYJ
IRD YJ
DEVSELJ
26,27,30,39,40,46 DEVSELJ
LOCKJ
PERRJ
26,39,40 LOCKJ
26,27,30,39,40,46 PERRJ
SERRJ
26,27,30,39,40 SERRJ
CBEJ1
AD14
26,27,30,39,40,46 CBEJ1
AD12
AD10
AD8
AD7
B
AD5
AD3
AD1
39,40
ACK64J
ACK64J
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
AD(8)
AD(7)
+3.3V6
AD(5)
AD(3)
GND12
AD(1)
+5V4
ACK64+5V5
+5V6
PCI-W2M120
PCI124
C/BE-(0)
+3.3V12
AD(06)
AD(04)
GND22
AD(02)
AD(00)
+5V11
REQ64+5V12
+5V13
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
INTDJ
INTBJ
INTDJ
INTBJ
3D3V_DUAL
ICH_P_PCIRSTJ 26,27,30,39,40,46,48
AD30
GNT4J
26
PMEJ
26,27,35,39,40,46
AD28
AD26
AD24
IDSEL3
IDSEL3
AD22
AD20
12V_SYS
3D3V_SYS
R5798
330
+/-5%
R0603
C
AD20
AD18
AD16
FRAMEJ
TR DYJ
STOPJ
PSCLK
PSDATA
PAR
AD15
FRAMEJ
26,27,30,39,40,46
TRDYJ
26,27,30,39,40,46
STOPJ
26,27,30,39,40,46
PSCLK
PSDATA
22,27,36,37,38,39,40
22,27,36,37,38,39,40
PAR
26,27,30,39,40,46
5V_SYS
AD13
AD11
AD9
CBEJ0
CBEJ0
26,27,30,39,40,46
B
AD6
AD4
R5811
AD2
AD0
2.7K
REQ64_3J
+/-5%
REQ64_3J
AD[31..0]
5V_SYS
26,39,40
26,39,40
*
INTAJ
INTCJ
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
*
7
INTAJ
INTCJ
TRST+12V
TMS
TDI
+5V7
INTAINTC+5V8
RSV_3
+5V9
RSV
GND13
GND14
3.3VAUX
RESET+5V10
GNTGND15
PMEAD(30)
+3.3V7
AD(28)
AD(26)
GND16
AD(24)
IDSEL
+3.3V8
AD(22)
AD(20)
GND17
AD(18)
AD(16)
+3.3V9
FRAMEGND18
TRDYGND19
STOP+3.3V10
SMB_CLK
SMB_DATA
GND20
PAR
AD(15)
+3.3V11
AD(13)
AD(11)
GND21
AD(09)
1
2
26,39,40
26,39,40
-12V
TCK
GND1
TDO
+5V1
+5V2
INTBINTDPRSNT1RSV_1
PRSNT2GND2
GND3
RSV_2
GND4
CLK
GND5
REQ+5V3
AD(31)
AD(29)
GND6
AD(27)
AD(25)
+3.3V1
C/BE-(3)
AD(23)
GND7
AD(21)
AD(19)
+3.3V2
AD(17)
C/BE-(2)
GND8
IRDY+3.3V3
DEVSELGND9
LOCKPERR+3.3V4
SERR+3.3V5
C/BE-(1)
AD(14)
GND10
AD(12)
AD(10)
GND11
1
2
CN36
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
AD[31..0]
26,27,30,39,40,46
5V_SYS
-12V_SYS
Replace by 1000uF CAP
EC1718
1000uF
6.3V, +/-20%
CE35D80H200
*
*
BC3078
0.1uF
25V, X7R, +/-10%
C0603
*
BC1408
0.1uF
25V, X7R, +/-10%
C0603
EC3638
BC2588
100uF
0.1uF
16V, +/-20%
CE20D50H11025V, X7R, +/-10%
C0603
*
*
EC6938
100uF
16V, +/-20%
CE20D50H110
*
A
*
*
A
BC1378
0.1uF
BC1518
25V, X7R, +/-10%
0.1uF
C0603 25V, X7R, +/-10%
C0603
FOXCONN PCEG
Title
PCI Slot 3
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
41
of
52
4
24,48 LPCPDJ
15,26 ICH_PLTRSTJ
24
L_DRQ0J
B
To
ICH
7
CK_33M_SIO
CK_33M_SIO
0 R0603 +/-5% LPCPDJ_SIO
ICH_PLTRSTJ
Dummy
SIO_LDRQJ
SERIRQ
24,48
SERIRQ
L_FRAMEJ
24,32,48 L_FRAMEJ
L_AD0
24,32,48
L_AD0
L_AD1
24,32,48
L_AD1
L_AD2
24,32,48
L_AD2
L_AD3
24,32,48
L_AD3
R377
CK_48M_SIO
CK_48M_SIO
*
24
BC369
22pF
50V,NPO,+/-10%
24
C0603
24
44
44
44
44
L_PMEJ
0 SIO_PME
+/-5% R0603
R349
KBRSTJ
A20GATE
KBDATA
KBCLK
MSDATA
MSCLK
KBRSTJ
A20GATE
KBDATA
KBCLK
MSDATA
MSCLK
KRST#
GA20
KDAT
KCLK
MDAT
MCLK
A
3D3V_SB
10K +/-5%
10K +/-5%
10K +/-5%
10K +/-5%
2.2K +/-5%
R351
2.2K +/-5% R0603 SIO_PME
Dummy
* *****
3D3V_SYS
R0603
R0603
R0603
R0603
R0603
SERIRQ
L_FRAMEJ
KBRSTJ
SIO_LDRQJ
LPCPDJ_SIO
R398
R399
R404
R378
R376
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
VREF
TMPIN1
TMPIN2
TMPIN3
FAN_CTL3/GP36
FAN_TAC3/GP37
FAN_CTL2/GP51
FAN_TAC2/GP52
FAN_CTL1
FAN_TAC1
VID0/GP30
VID1/GP31
VID2/GP32
VID3/GP33
VID4/GP34
VID5/GP35
98
97
96
95
94
93
92
91
90
89
88
87
12
11
10
9
8
7
19
18
17
16
14
13
VBAT
69
FB32
PBTNJ_SIO
*
BC528
0.1uF
25V, X7R, +/-10%
C0603
Dummy
for ESD solution
1
5V_SYS
*
FB L0805 26 Ohm
+/-25%
BC351
0.1uF
25V, X7R, +/-10%
C0603
*
BC315
0.1uF
25V, X7R, +/-10%
C0603
*
R344
R84
R550
R343
PWROK2
10K +/-5%
R374
5V_SYS
0 +/-5% R0603
ICH_THRM_UP 24
VIN7
SIOVREF
TMPIN1
TMPIN2
FANOUT2
FANIN2
FANOUT1
FANIN1
VID0
VID1
VID2
VID3
VID4
VID5
*
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
43
43
43
43
43
43
TMPIN1
TMPIN2
43
43
FANOUT2
FANIN2
FANOUT1
FANIN1
VID0
VID1
VID2
VID3
VID4
VID5
34
34
34
34
13,49
13,49
13,49
13,49
13,49
13,49
3
PBTNJ_SIO
35
C
*
PSIN
35
0 R0603
+/-5%
SLP_S3J
10,12,24,34
0 R0603
+/-5%
Dummy
SLP_S45J
10,24
SIOVREF
BC335
1uF
10V,Y5V,+80%/-20%
C0603 Place BC678
A
APC POWER BUTTOM
43
B
Note:
close to I T8712, and
Do Not remove thi s 1uF Cap. of
VREF.
No te:
Place BC685 close to
IT 8712 as possible
A
A
*
FOXCONN PCEG
BC324
0.1uF
25V, X7R, +/-10%
C0603
Title
IT8712F/H
Date:
4
To ATX power connector
pin14 PSON#
VCCRTC
BC352
1uF
10V,Y5V,+80%/-20%
C0603
Size
5
PLED
35
5V_SYS
SUSLED
35
PS_ONJ
34
33 R0603
+/-5%
PWRBTNJ 24,35
Dummy
BC345
1uF
10V,Y5V,+80%/-20%
C0603
Dummy
PS _ONJ
R350
R375
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
24,25
*
5V_SYS 3D3V_SB
RE SETCONJ
R366
10K R0603 +/-5%
SIO_RSMRSTJ R333
10K +/-5% R0603
IRTX
IRTX
35
IRRX
IRRX
35
R372
1M
VCCRTC
+/-5% R0603
PWROK1R356
R380
RSMRSTJ
45
45
45
45
45
45
45
45
45
0 R0603 +/-5% Dummy
10K +/-5% R0603
0 +/-5% R0603 Dummy
0 R0603 +/-5%
Dummy
0 R0603 +/-5%
PSONJ
PANSWHJ
PWRONJ_SIO R364
SIO_GNDA
2
STBJ
AFDJ
ERRJ
PINITJ
SLINJ
ACKJ
BUSY
PE
SLCT
* ****
84
34
33
32
31
0
R0603
+/-5%
Dummy
*
VCCH
PCIRST4#/SCRPRES#/GP10
PCIRST3#/SCRCLK/GP11
PCIRST2#/SCRIO/GP12
PWROK1/SCRPFET#/GP13
PCIRST1#/SCRRST/GP14
SIO_RSMRSTJ R327
* *
45
46
80
81
82
83
30
85
66
70
68
45
**
LPCPD#
LRESET#
LDRQ#
SERIRQ
LFRAME#
LAD0
LAD1
LAD2
LAD3
PCICLK
CLKRUN#/GP50
CLKIN
PME#/GP54
RESETCON#/CIRTX/GP15
RSMRST#/CIRRX/GP55
IRTX/GP47
IRRX/GP46
COPEN#
PD[7..0]
*
36
37
38
39
40
41
42
43
44
47
48
49
73
79
78
77
76
75
72
71
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
STBJ
AFDJ
ERRJ
PINITJ
SLINJ
ACKJ
BUSY
PE
SLCT
**
Serial Port 1/2
DENSEL#
INDEX#
MTRA#
DRVB#
DRVA#
MTRB#/THRMO#
DIR#
STEP#
WDATA#
WGATE#
TRK0#
WPT#
RDATA#
HDSEL#
DSKCHG#
15
50
74
117
*
BC368
22pF
50V,NPO,+/-10%
C0603
*
7
0 R0603
+/-5%
51
63
52
55
54
53
57
58
56
60
62
64
61
59
65
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
GP40
PWROK2/GP41
GP53
PSON#/GP42
PANSWH#/GP43
PWRON#GP44
PSIN/GP45
Hardware Monitoring
Header_2X17_3 (FDD)
R393
*
MOTEBJ
DENSELJ
INDEXJ
MOTEAJ
DRVBJ
DRVAJ
MTRBJ/THRMOJ
DIRJ
STEPJ
WDATAJ
WGATEJ
TK00J
WPTJ
RDATAJ
SIDE1J
DSKCHGJ
*
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
SCR I/F
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
IT8712F_v0.7
MISC.
1
X
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
STB#
AFD#
ERR#
INIT#
SLIN#
ACK#
BUSY
PE
SLCT
129
*
J5
1
D
GNDA
150 R0603 +/-5% INDEXJ
R567
JSBB2/GP27
JSBB1/GP26
JSBCY/GP25
JSBCX/GP24
JSAB2/GP23
JSAB1/GP22
JSACY/GP21
JSACX/GP20
MIDI_OUT/GP17
MIDI_IN/GP16
BC364
22uF
10V,Y5V,+80%/-20%
C1206
PD[7..0]
86
35
SIO_BEEP
7
TRUBO2J
7
TRUBO1J
24 TRUBO_CTRL
20
21
22
23
24
25
26
27
28
29
*
67
4
35
99
R355
0 R0603
TRUBO2J +/-5%
TRUBO1J
DCD1#
RI1#
CTS1#
DTR1#/JP1
RTS1#/JP2
DSR1#
SOUT1/JP3
SIN1
DCD2#
RI2#
CTS2#
DTR2#/JP4
RTS2#
DSR2#
SOUT2
SIN2
Gameport/MIDI
TK00J
WPTJ
RDATAJ
DSKCHGJ
118
119
120
121
122
123
124
125
126
127
128
1
2
3
5
6
Floppy I/F
C
2 150
4 +/-5%
6 8P4R0603
8
DCD BJ
R IBJ
CTSBJ
DTRBJ
RTSBJ
DSRBJ
SOUTB
SINB
DCD AJ
R IAJ
CTSAJ
DTRAJ
RTSAJ
DSRAJ
SOUTA
SINA
BC363
0.1uF
25V, X7R, +/-10%
C0603
U22
Power-on Control
RN27
*
*
5V_SYS
*
No te:
*Place CAP close to IT8712.
LPC I/F
FDC Connector
DCDAJ
RIAJ
CTSAJ
DTRAJ
RTSAJ
DSRAJ
SOUTA
SINA
DCDBJ
RIBJ
CTSBJ
DTRBJ
RTSBJ
DSRBJ
SOUTB
SINB
1
5V_SB_SYS
Parallel Port
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
No te:
If 75232 is connected, please use 680 ohm to be the pull
down resistor value. Since powered by 12V, 75232 has a
very strong internal pull-up. It is hard to be pulled low.
(Please see specification for detail of power on strapping
set ting)
1
3
5
7
5V_SYS
VCC
VCC
VCC
RN11
180
+/-5%
8P4R0603
Dummy
DTRAJ
RTSAJ
SOUTA
DTRBJ
RTSBJ
SOUTB
VIN7
TRUBO1J
TRUBO2J
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
KB/MS
2
4
6
8
R0603
R0603
R0603
R0603
R0603
R0603
R0603
R0603
R0603
2
GNDD
GNDD
GNDD
GNDD
*
1
3
5
7
D
4.7K +/-5%
4.7K +/-5%
4.7K +/-5%
4.7K +/-5%
4.7K +/-5%
4.7K +/-5%
4.7K +/-5%
4.7K +/-5%
4.7K +/-5%
*********
R594
R591
R486
R589
R531
R539
R577
R4
R18
5V_SYS
3
129
5
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
42
of
52
5
4
3
R323
2
BC338
0.1uF
25V, X7R, +/-10%
C0603
RT3 10K
10K +/-1%
R0603
R0603
+/-5%
SIOVREF
42
Symbol
BC331
0.1uF
C0603
25V, X7R, +/-10%
DTR1#/JP1
value
KBCEN
1
T
*
1
Power On Strapping Options
SIOVREF
*
TMPIN2
*
42
2
D
RTS1#/JP2
KBC_IROM
SOUT1/JP3
CHIP_SEL
DTR2#/JP4
BUF_SEL
Description
1
KBC is enabled.
0
KBC is disabled.
1
KBC's ROM is built in.
0
KBC's ROM is external.
--
Chip selection in configuration.
1
The output buffers of PCIRST1#, PCIRST2#, PCIRST3#, and PCIRST4# are
enhanced open-drain. It will drive high about 10~20ns when the signal transit
from low to high, and then Hi-Z.
0
The output buffers are push-pull.
D
A
SIOVREF
R309
TMPIN1
*
BC339
3.3nF
16V,NPO,+/-5%
C0603
R308
+/-1%
R0603
10K
R294
*
42
SIOVREF
13
THERMDC
13
1D8V_STR
3D3V_SYS
+/-1%
R0603
10K
R296
*
+/-1%
R0603
10K
R297
*
5V_SYS
+/-1%
R0603
6.81K
R298
*
-12V_SYS
12V_SYS
+/-1%
R0603
30K
R301
*
*
R305
R306
232K
+/-1%
R0603
56K +/-5%
R0603
*
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
THERMDA
Voltage Monitor
VCCP
42
42
42
42
42
42
0 +/-5% R0603
A
A
C
42
BC336
0.1uF
C0603
25V, X7R, +/-10%
0 +/-5% R0603
**
42
R307
30.1K
+/-1%
R0603
*
*
SIOVREF
*Recommended net "VCCH" minimum trace width 12mils.
Pin
13
30
31
32
33
34
77
78
84
85
The different function pins between
IT8712F/H and IT8712F/G
IT8712F/HX
VID5/GP35
RESETCON#/CIRTX/GP15
PCIRST1#/SCRRST/GP14
PWROK1/SCRPFET#/GP13
PCIRST2#/SCRIO/GP12
PCIRST3#/SCRCLK/GP11
GP53
PWROK2/GP41
PCIRST4#/SCRPRES#/GP10
RSMRST#/CIRRX/GP55
Pin
13
30
31
32
33
34
77
78
84
85
IT8712F/GX
WTI#/GP35
CIRTX/GP15
SCRRST/GP14
SCRPFET#/GP13
SCRIO/ GP12
SCRCLK/ GP11
RING#/GP53
GP41
SCRPRES#/GP10
CIRRX/COPENO#/GP55
C
POWER ON SCHEME
ICH
B
C0603
0.1uF
BC316
A
C0603
0.1uF
BC319
*
A
C0603
0.1uF
BC323
*
A
* R299
10K
+/-1%
R0603
A
*
BC325
0.1uF
C0603
*
A
C0603
0.1uF
BC328
*
25V, X7R, +/-10%
*
+/-1%
R0603
10K
R302
A
A
PWBTN#
SLP_S3#
SLP_S5#
PWRON#
(72)
PSIN
(71)
ATX
Power Supply
IT8712F/H
PANSWH#
(75)
B
PSON#
(76)
PSON#
A
A
FOXCONN PCEG
Title
HW Monitor
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
43
of
52
5
4
3
2
1
5V_DUAL_BACK
2
5V_DUAL_BACK
F1
8
6
4
2
1
F1210_1.5A
2
D
FB15
*
FB L0805 300 Ohm
+/-25%
0805
7
5
3
1
RN1
2.2K
8P4R0603
+/-5%
1
D
FB18
42
1
KBCLK
KBCLKC
2
FB L0805 100 Ohm
*
BC64
100pF
50V, NPO, +/-10%
C0603
*
BC65
100pF
50V, NPO, +/-10%
C0603
FB19
42
1
KBDATA
FB16
1
MSCLK
C
15
1
MSDATA
*
UP
BC62
100pF
50V, NPO, +/-10%
C0603
C
*
MSDATAC
2
*
FB L0805 100 Ohm
17
DOWN
PS2-KBMS-2
PWR_NET02
FB17
42
11
9
7
8
10
12
MSCLKC
2
FB L0805 100 Ohm
16
5
3
1
14
2
4
6
KBDATAC
2
FB L0805 100 Ohm
42
CN7
13
BC63
100pF
50V, NPO, +/-10%
C0603
BC61
0.1uF
25V, X7R, +/-10%
C0603
SM Bus Bridge
12V_SYS
*
R113
10K
+/-5%
R0603
*
1
3
5
7
Q24
G
G
7,19,21 SMB_DATA_MAIN
SMB_DATA_RESUME
SMB_CLK_RESUME
SMB_DATA_MAIN
SMB_CLK_MAIN
B
Q18
2N7002
S
D
SMB_DATA_RESUME 25,39,49
for ICH6/Northway/PCI/SIO
G
for clk-gen/DIMMs/PCI-E x16 Gfx/TPM
7,19,21 SMB_CLK_MAIN
2
4
6
8
2N7002
S
34 PWRGD_3VJ
RN6
2.7K
+/-5%
8P4R0603
D
B
3D3V_SYS 3D3V_SB
Q23
2N7002
S
D
SMB_CLK_RESUME 25,39,49
A
A
+/-5%
Dummy
+/-5%
Dummy
**
R150
0
R129
0
FOXCONN PCEG
Title
Keyboard / Mouse
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
44
of
52
GND
GD75232
SSOP20EB
*
-12V_SYS
*
42
42
42
42
42
42
42
42
CN1
11
1
6
2
7
3
8
4
9
5
C4
0.1uF
25V, X7R, +/-10%
C0603
Dummy
RTSBJ
SOUTB
DTRBJ
DCDBJ
DSRBJ
SINB
CTSBJ
RIBJ
RTSBJ
SOUTB
DTRBJ
DCD BJ
DSRBJ
SINB
CTSBJ
R IBJ
16
15
13
19
18
17
14
12
11
+12V
1
DA1
DA2
DA3
RY1
RY2
RY3
RY4
RY5
DY1
DY2
DY3
RA1
RA2
RA3
RA4
RA9
5
6
8
2
3
4
7
9
GND
-12V
10
RTS2
SERIAL_OUT2
NDTRB2
NDCDB_2
NDSRB2
SERIAL_IN2
CTS2
R I2
RS232-9
EMI/ESD/Termination Network
PSTROBE
33
+/-5% R0603
33
33
+/-5% R0603
+/-5% R0603
28
27
1
2
15
12
10
8
AUTOFD
FAULT
INIT
SelectIn
ACK
BUSY
PError
Select
VCC
20
GND
22
1
SD103AW
P_D0
ER RJ
P_D1
INIT1C
P_D2
SLIN1C
P_D3
P_D4
P_D5
P_D6
P_D7
A
ACKJ
BU SY
PE
SLCT
*
*
*
*
*
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
D37
NR IA
1
R I2
1
* R693
1K +/-5%
Dummy
1N4148W
2
R694
D38
R695
0 R0603
+/-5%
ICH_RIJ
24,35
Q73
1N4148W
Dummy
PRT PORT
10K +/-5%
R0603
2
G
BC590
0.1uF
C0603
25V, X7R, +/-10%
*
* R696
10K
2N7002
+/-5%
R0603
28
27
26
A
FOXCONN PCEG
Title
Serial / Parallel
Size
Date:
3
*
B
PRNT25-M
4
*
3D3V_SB
BC85
0.1uF
25V, X7R, +/-10%
C0603
CN8
C0603
AFD1C
*
*
5V_SYS
D2
2
C6
C7
C8
C9
C10
C11
C12
C13
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
C0603
C0603
C0603
C0603
C0603
C0603
C0603
C0603
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
50V, X7R, +/-10%
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
*
50V, X7R, +/-10%
4
5
6
7
9
11
13
14
50V, X7R, +/-10%
PD_0
PD_1
PD_2
PD_3
PD_4
PD_5
PD_6
PD_7
25
24
23
21
19
18
17
16
R I2
50V, X7R, +/-10%
26
50V, X7R, +/-10%
STROBE
50V, X7R, +/-10%
** *
X
Header_2X5_10 Shield
Dummy
50V, X7R, +/-10%
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PACSZ1284
5
2
4
6
8
NDCDB_2
NDSRB2
SERIAL_IN2
RTS2
SERIAL_OUT2
CTS2
NDT RB2
50V, X7R, +/-10%
R73
R70
RTS2
R I2
C
3
R47
1
3
5
7
9
Dummy
PD[7..0]
AFDJ
ERRJ
PINITJ
SLINJ
ACKJ
BUSY
PE
SLCT
COM2
NDCDB_2
SERIAL_OUT2
C5
0.1uF
25V, X7R, +/-10%
C0603
10
BC66 0.1uF
25V, X7R, +/-10%
B
42
42
42
42
42
42
42
42
SERIAL_IN2
-12V_SYS
U3
42 PD[7..0]
NDSRB2
NDT RB2
GD75232
Dummy
placed near connector
42 STBJ
D
CTS2
*
BC37 150pF 50V,NPO,+/-5%
BC35 150pF 50V,NPO,+/-5%
BC52 150pF 50V,NPO,+/-5%
BC34 150pF 50V, NPO, +/-5%
BC51 150pF 50V,NPO,+/-5%
BC50 150pF 50V,NPO,+/-5%
C
BC36 150pF 50V,NPO,+/-5%
BC49 150pF 50V,NPO,+/-5%
* * * * * * **
12V_SYS
C14
0.1uF
25V, X7R, +/-10%
C0603
Dummy
U19
20 VCC
placed near GD75232
RS232 Drivers and Receivers
NDCDA
NDSRA
NSINA
NRTSA
NSOUTA
NCTSA
NDTRA
NR IA
5V_SYS
*
-12V
10
11
*
NRTSA
NDTRA
NSOUTA
NR IA
NCTSA
NDSRA
NSINA
NDCDA
12V_SYS
D
5
6
8
2
3
4
7
9
1
S
DY1
DY2
DY3
RA1
RA2
RA3
RA4
RA9
2
*
DA1
DA2
DA3
RY1
RY2
RY3
RY4
RY5
5V_SYS
C0603
16
15
13
19
18
17
14
12
12V_SYS
BC80 0.1uF
25V, X7R, +/-10%
1
C0603
+12V
BC92
0.1uF
25V, X7R, +/-10%
VCC
C0603
20
BC68
0.1uF
25V, X7R, +/-10%
D
RTSAJ
DTRAJ
SOUTA
RIAJ
CTSAJ
DSRAJ
SINA
DCDAJ
3
*
U4
5V_SYS
42
42
42
42
42
42
42
42
4
-12V_SYS
*
5
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
45
of
52
3
2
R278
510
+/-5%
R0603
BC299
0.1uF
25V, X7R, +/-10%
C0603
3D3V_1394
0.1uF C0603
25V, X7R, +/-10%
*
BC225
1
*
BC286
0.1uF
C0603
BC287
0.1uF
C0603
*
*
BC294
0.1uF
C0603
*
2
BC292
0.1uF
C0603
*
BC293
0.01uF
C0603
*
BC268
0.01uF
C0603
*
BC251
4.7uF
C0805
*
BC234
4.7uF
C0805
BC231
0.01uF
C0603
R240
1K
+/-5%
R0603
FB30 FB L0805 30 Ohm
*
* *
R232
6.34K
+/-1%
R0603
47
47
47
47
TPB0N
TPB0P
TPA0N
TPA0P
47
47
47
47
TPB1N
TPB1P
TPA1N
TPA1P
*
**
R237 54.9
BC221 0.33uF
*
TPBIAS1
+/-1% R0603
TPA1P
+/-1% R0603
TPA1N
10V,X7R,+/-10%
C0603
R239 54.9
+/-1% R0603
R234 4.99K
+/-1% R0603
BC222
270pF C0603
50V, NPO, +/-5%
***
+/-1%
*
B
R238 54.9
R0603
R264
10K
+/-5%
R0603
BC232
47pF
50V,NPO,+/-5%
C0603
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
GNT0J
PREQ0J
AD31
AD30
AD29
AD28
AD27
GNT0J
PREQ0J
TPB1N
VCCARX0
XRES
NC67
GNDARX1
GNDATX1
XTPB0M
XTPB0P
XTPA0M
XTPA0P
XTPBIAS0
VCCARX1
VCCATX1
XTPB1M
XTPB1P
XTPA1M
XTPA1P
XTPBIAS1
GNDARX2
GNDATX2
XTPB2M
XTPB2P
XTPA2M
XTPA2P
XTPBIAS2
VCCARX2
VCCATX2
INTA#
PCIRST#
PCICLK
GND
PGNT#
PREQ#
AD31
AD30
AD29
AD28
AD27
VCC
R217
R218
BC174
54.9
+/-1% R0603
TPB0P
54.9
+/-1% R0603
TPB0N
BC530
0.1uF
C0603
129
NC38
PME#
GND
VCC
GND
VCC
SCL/EECK
SDA/EEDI
EEDO
EECS
AD0
AD1
GND
GNDRAM
VCCRAM
AD2
AD3
AD4
VCC
AD5
AD6
AD7
GND
CBE0#
AD8
AD9
AD10
AD11
AD12
GND
VCC
AD13
AD14
AD15
CBE1#
PAR
PERR#
GND
AD16 R265
270pF C0603
50V, NPO, +/-5%
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R271
0 +/-5%
R0603
PMEJ
26,27,35,39,40,41
SCL
SDA
AD0
AD1
C
AD2
AD3
AD4
AD5
AD6
AD7
CBEJ0
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
CBEJ1
PAR
PERRJ
CBEJ0
26,27,30,39,40,41
CBEJ1
PAR
PERRJ
26,27,30,39,40,41
26,27,30,39,40,41
26,27,30,39,40,41
B
VT6307
STOPJ
DEVSELJ
TRDYJ
IRDYJ
FRAMEJ
CBEJ2
26,27,30,39,40,41 CBEJ3
4.99K +/-1% R0603
129
TRDYJ
DEVSELJ
STOPJ
IDSEL AD16
-REQ0/-GNT0
INT F
CBEJ2
FRAMEJ
I RDYJ
TPA0N
0.33uF C0603
10V, X7R, +/-10%
AD20
AD19
AD18
AD17
AD16
TPA0P
+/-1% R0603
AD21
+/-1% R0603
54.9
AD26
AD25
AD24
CBEJ3
IDSEL
AD23
AD22
54.9
*
U15
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
AD[31..0]
*
R216
**
BC82
*
TPBIAS0
***
R125
*
R120
BC529
0.1uF
C0603
3D3V_1394
INTFJ
ICH_P_PCIRSTJ
CK_33M_1394
TPB1P
26,27,30,39,40,41 AD[31..0]
BC242
0.1uF
C0603
*
BC230
4.7uF
C0805
TPB1N
TPB1P
TPA1N
TPA1P
TPBIAS1
26,39
INTFJ
26,27,30,39,40,41,48 ICH_P_PCIRSTJ
7 CK_33M_1394
26
26,39
*
3D3V_1394_CHIP
TPB0N
TPB0P
TPA0N
TPA0P
TPBIAS0
C
R236 54.9
3D3V_DUAL
I2C EEPROM Enable
D
FB L0805 60 Ohm
*
3D3V_SYS
FB31
*
*
*
R233
11K
+/-5%
R0603
X4
XTAL-24.576MHz
+/-30PPM
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
AT24C02N-2.7V
D
*
BC227
10pF
C0603
R244
1M
+/-5%
R0603
*
SCL
SDA
3D3V_1394
GNDARX0
XCPS
VCCATX0
XO
XI
GNDATX0
PHYRST#
NC57
NC56
NC/PHYPC1
NC/PHYPC0
NC/PHYPC2
NC/PHYCMC
NC51
GNDSUS
VCCSUS
NC/I2CFAST
NC/CARDBUSENA
NC/I2CEEENA
NC45
NC44
MODE0
MODE1
GNDSUS
NC40
VCCSUS
A0
VCC
A1
WP/NC
A2
SCL
VSS/GND SDA
CON_PWR
*
8
7
6
5
*
To be check
R274
4.7K
+/-5%
R0603
1
1
2
3
4
*
R277
4.7K
+/-5%
R0603
2
*
U17
1
BC220
10pF
C0603
1
*
3D3V_1394
2
4
3D3V_1394
GND
AD26
AD25
AD24
CBE3#
IDSEL
AD23
AD22
GND
AD21
VCC
VCC
GND
AD20
AD19
AD18
AD17
AD16
GND
CBE2#
FRAME#
IRDY#
VCC
TRDY#
DEVSEL#
STOP#
5
330 +/-5%
R0603
26,27,30,39,40,41
26,27,30,39,40,41
26,27,30,39,40,41
26,27,30,39,40,41
26,27,30,39,40,41
26,27,30,39,40,41
A
A
FOXCONN PCEG
Title
VT6307_1394
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
46
of
52
5
4
2
1
RN28
2
4
6
8
TPB1N
TPB1P
TPA1N
TPA1P
46
46
46
46
1394_POW_CON
1394_POW_CON
CN14
0
+/-5%
8P4R0603
TA1+
1
3
5
7
TB1+
2
1
TPB1P
46
TB1-
3
4
TPB1N
46
1
TPA1P
46
4
TPA1N
46
2
3
*
FB28
FB L0805 60 Ohm
1
12V_SYS
D13
1
FB27
1
*
BC213
1.0uF
C0805
2
2
FB L0805 60 Ohm B340B
EC35
100uF
16V, +/-20%
*
1394_GND_CON
TF2 Dummy
TA1-
CON_PWR
@intel standard
COMMON CHOKE 90 Ohm 2L
2
TB1-
D
BC202
0.1uF
25V, X7R, +/-10%
C0603
HEADER_2X5_9_Shield
TF1 Dummy
TB1+
TA1+
TA1-
2
4
6
8
10
X
*
1
1
3
5
7
F5
F1813_2.6A
BC203
0.1uF
25V, X7R, +/-10%
C0603
2
*
TB1TB1+
TA1TA1+
D
3
1394_POW_CON
COMMON CHOKE 90 Ohm 2L
C
C
RN2
1
3
5
7
USBP1N_R
USBP1P_R
USBP0N_R
USBP0P_R
2
4
6
8
TB0+
TB0TA0+
TA0-
0
+/-5%
8P4R0603
two common chokes and one RN co-layout
*
24
USBP1N
24
USBP1P
24
USBP0N
24
USBP0P
USBP1N 1
USBP1P
4
2
USBP1N_R
2
3
USBP1P_R
3
TB09
11
TB0-
12
TB0+
1
*
TF10 Dummy
2
1
TPB0N
3
4
TPB0P
TB0+
TF11
Dummy
6
-USBD1
1394D1-
13
TA0-
TA0-
2
1
TPA0N
L1
USBP0P_R
7
+USBD1 1394D1+
14
TA0+
TA0+
3
4
TPA0P
GND3
GND0
GND9
GND2
GND4
GND1
1394GND
10
GND_USB1394
GND5
GND6
GND7
GND8
19
20
21
22
BC19104
10nF
50V,X7R,+/-10%
C0603
2
3
TPB0N
46
TPB0P
46
TPA0N
46
TPA0P
46
*
FB37
FB L0805 60 Ohm
+/-25%
*
B340B
F7
F1813_2.6A
+12V_1394_REAR
A
BC1609
0.1uF
25V, X7R, +/-10%
C0603
USB1 & 2 / 1394
FOXCONN PCEG
Title
1394 CONN
Size
Date:
4
2
+12V_1394_REAR
*
USBX2_1394
5
2
FB L0805 60 Ohm
EC70
100uF
16V, +/-20%
CE20D50H110
COMMON CHOKE 90 Ohm 2L
2
17
4
15
16
18
8
BC19102
1.0uF
C0805
COMMON CHOKE 90 Ohm 2L
USBP0N_R
Dummy
B
12V_SYS
D32
1
FB33
Common Choke 90 Ohm 2L
Common Choke 90 Ohm 2L
A
CN37
USBV1 1394VCC
USBVCC0
1394D0-USBD0
1394D0+
+USBD0
Dummy
4
USBP0N 1
USBP0P
L2
+12V_1394_REAR
5
1
1394_CON_PWR_REAR
0
+/-5%
8P4R0603
USB_BACK_POWER
BC19103
1.0uF
C0603
16V,Y5V,+80%/-20%
TPB0P
TPB0N
TPA0P
TPA0N
2
4
6
8
2
USB_BACK_POWER
1
B
RN29
*
1
3
5
7
1
*
USBP1N
USBP1P
USBP0N
USBP0P
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
47
of
52
5
4
3
2
1
D
D
3D3V_SYS
CN31
C
7 CK_33M_TPM
24,32,42 L_FRAMEJ
R102
*
26,27,30,39,40,41,46 ICH_P_PCIRSTJ
24,32,42 L_AD3
24,32,42 L_AD0
24,42
LPCPDJ
100 +/-5%
R0603
C
1
LCLK
3
LFRAMEn
5
LRESETn NC_3
6
7
LAD3
LAD2
8
L_AD2
24,32,42
9
VDD
LAD1
10
L_AD1
24,32,42
11
LAD0
GND
12
13
NC_1
NC_4
14
15
NC_2
SERIRQ
16
SERIRQ
24,42
17
GND CLKRUNin
18
19
LPCPDn
20
GND
2
KEY
NC_5
LPC connector
H2X10MZO4
B
B
A
A
FOXCONN PCEG
Title
TPM
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
48
of
52
4
3
2
3D3V_SYS
*
3D3V_SB
1K R0603 +/-5%
Dummy
*
*
SUPERGPIO4
SUPERGPIO3
SUPERGPIO0
SUPERGPIO1
SUPERGPIO2
R347
R348
**
C
11 SUPERGPIO4
11 SUPERGPIO3
13,42 VID0
13,42 VID1
13,42 VID2
13,42 VID3
13,42 VID4
13,42 VID5
10 SUPERGPIO0
10 SUPERGPIO1
10 SUPERGPIO2
25,39,44 SMB_DATA_RESUME
25,39,44 SMB_CLK_RESUME
0 +/-5% Dummy
0 +/-5% Dummy
U23
1
2
3
4
5
6
7
8
9
10
11
12
13
14
R574
0
+/-5%
R0603
Dummy
D
2
4
6
8
BC89
1uF
C0805
10V, X7R, +/-10%
Dummy
2
4
6
8
RN13
680
+/-5%
8P4R0603
*
R573
0
+/-5%
R0603
Dummy
*
5
7
* 13
R679
680
+/-5%
R0603
*
R678
680
+/-5%
R0603
*
R381
VTT_OUT_RIGHT
3VSB
GPIO4
GPIO3
VIDIN0
VIDIN1
VIDIN2
VIDIN3
VIDIN4
VIDIN5
GPIO0
GPIO1
GPIO2
SDA
SCL
ASEL
GPIO5
GPIO6
GPIO7
VIDOUT0
VIDOUT1
VIDOUT2
VIDOUT3
VIDOUT4
VIDOUT5
VBAT
SLOTOCC#
GND
RSTOUT#
1
3
5
7
VTT_OUT_RIGHT
28
27
26
25
24
23
22
21
20
19
18
17
16
15
RN32
1K
8P4R0603
+/-5%
Dummy
*
*
R680
1K
R0603
+/-5%
Dummy
R681
1K
R0603
+/-5%
Dummy
PVID0
PVID1
PVID2
PVID3
PVID4
PVID5
R640
*
D
1
0 +/-5%
Dummy
R639
10M +/-5%
*
5
C
SKTOCCJ
1
R683
4.7K
R0603
+/-5%
Dummy
13,42
13,42
13,42
13,42
VID5
R345
0 +/-5%
R0603
PVID5
PVID5
8
VID4
VID4
R346
0 +/-5%
R0603
PVID4
PVID4
8
VID3
VID2
VID1
VID0
VID3
VID2
VID1
VID0
PVID3
PVID2
PVID1
PVID0
PVID3
PVID2
PVID1
PVID0
8
8
8
8
* *
13,42
B
VID5
7
5
3
1
RN14
*
13,42
8
6
4
2
13,34
BC362
0.1uF
C0603
Dummy
25V, X7R, +/-10%
*
0 +/-5% Dummy
2
*
R682
8
8
8
8
8
8
Dummy
IT8266R
Dummy
7,14,24,35 ICH_SYS_RSTJ
PVID0
PVID1
PVID2
PVID3
PVID4
PVID5
VCCRTC
B
0
8P4R0603
+/-5%
For EMI
A
A
FOXCONN PCEG
Title
VID Controller
Size
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
49
of
52
5
4
3
ICH6 GPIO Summary
D
C
B
Power Well
V5REF
V5REF
V5REF
V5REF
V5REF
V5REF
Vcc3_3
Vcc3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
Vcc3_3
VccSus3_3
VccSus3_3
VccSus3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
N/A
Vcc3_3
VccSus3_3
VccSus3_3
Vcc3_3
VccSus3_3
VccSus3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
N/A
N/A
N/A
N/A
N/A
V5REF
Vcc3_3
N/A
N/A
N/A
N/A
N/A
N/A
Vcc3_3
V_CPU_IO
Name
GPI0
GPI1
GPI2
GPI3
GPI4
GPI5
GPI6
GPI7
GPI8
GPI9
GPI10
GPI11
GPI12
GPI13
GPI14
GPI15
GPO16
GPO17
GPO18
GPO19
GPO20
GPO21
GPIO22
GPO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPI40
GPI41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPO48
GPO49
Type
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
O
O
O
O
O
O
N/A
O
I/O
I/O
I
I/O
I/O
I
I
I
I/O
I/O
I/O
N/A
N/A
N/A
N/A
N/A
I
I
N/A
N/A
N/A
N/A
N/A
N/A
O
OD
2
1
Super I/O GPIO Summary
Name
Description
REQ_6#
REQ_5#
PIRQE#
PIRQF#
PIRQG#
PIRQH#
Pull-up through 10K resistor(Unused)
Board ID0
LPC PME#
USB OC4#
USB OC5#
Pull-up through 10K resistor(Unused)
Pull-up through 10K resistor(Unused)
Wake On LAN
USB OC6#
USB OC7#
GNT_6#
GNT_5#
GP018(Unused)
GPO19(Unused)
GPO20(Unused)
GPO21(Unused)
Not Implemented
GPO23(Unused)
GPIO24(Unused)
GPIO25 Strap: 2.5 VRM Enable
SATA_0GP
Board ID2
GPIO LAN Disable
SATA_1GP
SATA_2GP
SATA_3GP
Board ID1
GPIO33(Unused)
Board ID3
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Not Implemented
REQ_4#
TBD
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Not Implemented
GNT_4#
CPUPWRGD
GPIO10-17
GPIO20
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO50
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO51
GPIO52
GPIO53
GPIO54
GPIO55
Power Plane
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
Main
5V_SB
Type
Description
Not Implemented
SIO-BEEP
VID0
VID1
VID2
VID3
VID4
VID5
POWER LED
SUSPEND LED
PS-ON TO ATX POWER CONN.
POWER BUTTON-IN
POWER BUTTON TO ICH6
PS-IN
IRRX
IRTX
Not Implemented
POWER BUTTON-IN
POWER BUTTON TO ICH6
PS-IN
IRRX
IRTX
FAN_CTRL2
FAN_TAC2
THERM-UP TO ICH6
PME
RSMRST
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D
C
FWH GPIO Summary
Name
FGPI0
FGPI1
FGPI2
FGPI3
Power Plane
Type
Main
Main
Main
Main
I
I
I
I
Description
IDE1 Cable Detection(33 or 66/100)
Unused
Unused
Unused
B
PCI Routing Summary
INTA#
INTB#
INTC#
INTD#
INTE#
INTF#
INTG#
INTH#
REG#/GNT#
IDSEL
A
PCI1
B
C
D
A
LAN
A
2
18
1
17
1394
A
0
16
A
FOXCONN PCEG
Title
GPIO / IRQ / IDSEL Map
Size
C
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Sheet
Tuesday, May 18, 2004
1
50
of
52
5
4
3
2
1
Jumper Setting Summary
D
D
Clear CMOS
JP5
TBD
1-2 : Normal (Default)
2-3 : Clear CMOS
FWH TBL#
JP1
GrantsDale Family Option Table
1-2 : Unlock
2-3 : Lock
82570EI and 82562EX Option Table
ALC655, ALC650 and ALC203 Option Table
C
C
B
B
A
A
FOXCONN PCEG
Title
Jumper Setting / Option Table
Size
C
Date:
5
4
3
2
Document Number
Rev
B
915A01 DDR2
Sheet
Tuesday, May 18, 2004
1
51
of
52
5
4
3
2
1
Item\tQuantity\tReference\tValue\tDescription\tFoxconn Part Number\tMfg\tMfg Part Number\tPCB Footprint\tRemark
{Item}\t{Quantity}\t{Reference}\t{Value}\t{Description}\t{Foxconn Part Number}\t{Mfg}\t{Mfg Part Number}\t{PCB Footprint}\t{Remark}
D
C
D
1.Remove R685.Modified 1394/PCI3 clock connection.( P07 )
2.Modified ICH-SYNCJ Net connection.( P24 )
3.Add R13.Fixed Lan Wake up Fail.( P27 )
4.Add R364.Fixed PS/2 Wake up Fail.( P42 )
5.Add R380,R355.Fixed Over thermal Shut down Fail.( P42 )
6.Modified FWH write protection silk screen and connection.( P32 )
7.Modified Silicon Image SATA connector direction.( P30 )
8.Modified Lan 2.5V power plan.( Layout )
9.Modified ICH6R 1.5V core plan.( Layout )
10.Changed audio power capacitors ( BC122,BC98,BC10 ) size to 1206 from 1210.( P31 )
11.Cancel VGA and COM2 co-layout.
12.Changed USB power fuse ( F6,F3 ) and EC1718,FB22 size.
13.Add R23.Fixed over clock Fail.( P07 )
14.Del CN5,R365;Q13,Q20,Q21,Q11,Q36,Q38.( 09 )
15.Del Q45,R385,Q49,BC381,R414,R416,BC375,R417,BC380,R412.
16.Add R29,R30,R31,R35 ( 10K ).( P09 );R321 ( 100 ) ( P12 );J8 ( P35 ).
17.Change L7,L26,L31,FB22,R520,EC46,EC49 Foot print.
18.Changed EC8,EC5 Value to 100uF from 10uF.
19.Add Q7 ( MMBT2222 ).Change Q34 to MMBT2222.Chang R230 Value 19.1K to 1K.( P11 )
20.Changed EC65,EC59 Location.
21.Add R321 ( 100 ), Del Q32,R231,R235,Q35,R241,BC224,R211,R202,Q30,R226,BC215.( P12 ).
22.Add R418,R402,R460,R427;Del R427,R582
23.Del R81
C
B
B
A
A
FOXCONN PCEG
Title
Modify List
Size
Document Number
Custom
Date:
5
4
3
2
Rev
B
915A01 DDR2
Tuesday, May 18, 2004
Sheet
1
52
of
52
www.s-manuals.com
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